# system call counts
# (c) 2010, Tom Zanussi <tzanussi@gmail.com>
# Licensed under the terms of the GNU GPL License version 2
#
# Displays system-wide system call totals, broken down by syscall.
# If a [comm] arg is specified, only syscalls called by [comm] are displayed.

import os
import sys

sys.path.append(os.environ['PERF_EXEC_PATH'] + \
	'/scripts/python/Perf-Trace-Util/lib/Perf/Trace')

from perf_trace_context import *
from Core import *
from Util import syscall_name

usage = "perf script -s syscall-counts.py [comm]\n";

for_comm = None

if len(sys.argv) > 2:
	sys.exit(usage)

if len(sys.argv) > 1:
	for_comm = sys.argv[1]

syscalls = autodict()

def trace_begin():
	print "Press control+C to stop and show the summary"

def trace_end():
	print_syscall_totals()

def raw_syscalls__sys_enter(event_name, context, common_cpu,
	common_secs, common_nsecs, common_pid, common_comm,
	common_callchain, id, args):
	if for_comm is not None:
		if common_comm != for_comm:
			return
	try:
		syscalls[id] += 1
	except TypeError:
		syscalls[id] = 1

def syscalls__sys_enter(event_name, context, common_cpu,
	common_secs, common_nsecs, common_pid, common_comm,
	id, args):
	raw_syscalls__sys_enter(**locals())

def print_syscall_totals():
    if for_comm is not None:
	    print "\nsyscall events for %s:\n\n" % (for_comm),
    else:
	    print "\nsyscall events:\n\n",

    print "%-40s  %10s\n" % ("event", "count"),
    print "%-40s  %10s\n" % ("----------------------------------------", \
                                 "-----------"),

    for id, val in sorted(syscalls.iteritems(), key = lambda(k, v): (v, k), \
				  reverse = True):
	    print "%-40s  %10d\n" % (syscall_name(id), val),
22fe88832a'/><input type='hidden' name='id2' value='63bfd78aae9a90210b0d369bb2836cca90402a95'/><select name='qt'>
<option value='grep'>log msg</option>
<option value='author'>author</option>
<option value='committer'>committer</option>
<option value='range'>range</option>
</select>
<input class='txt' type='search' size='10' name='q' value=''/>
<input type='submit' value='search'/>
</form>
</td></tr></table>
<div class='content'><div class='cgit-panel'><b>diff options</b><form method='get'><input type='hidden' name='id' value='9f32a03e3e0d372c520d829dd4da6022fe88832a'/><input type='hidden' name='id2' value='63bfd78aae9a90210b0d369bb2836cca90402a95'/><table><tr><td colspan='2'/></tr><tr><td class='label'>context:</td><td class='ctrl'><select name='context' onchange='this.form.submit();'><option value='1'>1</option><option value='2'>2</option><option value='3' selected='selected'>3</option><option value='4'>4</option><option value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><div class='diffstat-header'><a href='/cgit/linux.git/diff/?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Diffstat</a></div><table summary='diffstat' class='diffstat'><tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/.clang-format?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>.clang-format</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/.clippy.toml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>.clippy.toml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/.mailmap?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>.mailmap</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/.pylintrc?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>.pylintrc</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/CREDITS?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>CREDITS</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/stable/sysfs-block?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/stable/sysfs-block</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/stable/sysfs-class-backlight?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/stable/sysfs-class-backlight</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/stable/sysfs-driver-mlxreg-io?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/stable/sysfs-driver-mlxreg-io</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/configfs-tsm-report?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/configfs-tsm-report</a> (renamed from Documentation/ABI/testing/configfs-tsm)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/debugfs-alienware-wmi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/debugfs-alienware-wmi</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-bus-wmi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-bus-wmi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-class-power?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-class-power</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-class-power-gaokun?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-class-power-gaokun</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-devices-system-cpu?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-devices-system-cpu</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-driver-qat_ras?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-qat_ras</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-driver-ufs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-ufs</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-firmware-acpi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-firmware-acpi</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-fs-erofs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-fs-erofs</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-fs-f2fs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-fs-f2fs</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-kernel-reboot?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-kernel-reboot</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-platform-alienware-wmi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-platform-alienware-wmi</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/ABI/testing/sysfs-platform-oxp?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-platform-oxp</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/RCU/listRCU.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/RCU/listRCU.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/RCU/whatisRCU.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/RCU/whatisRCU.rst</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/LSM/ipe.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/LSM/ipe.rst</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/blockdev/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/blockdev/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/admin-guide/blockdev/zoned_loop.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/blockdev/zoned_loop.rst</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/bug-hunting.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/bug-hunting.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/cgroup-v2.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/cgroup-v2.rst</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/gpio/gpio-aggregator.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/gpio/gpio-aggregator.rst</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/hw-vuln/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/hw-vuln/index.rst</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/admin-guide/hw-vuln/indirect-target-selection.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/hw-vuln/indirect-target-selection.rst</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/admin-guide/hw-vuln/old_microcode.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/hw-vuln/old_microcode.rst</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/admin-guide/hw-vuln/rsb.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/hw-vuln/rsb.rst</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/kernel-parameters.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/kernel-parameters.txt</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/admin-guide/laptops/alienware-wmi.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/laptops/alienware-wmi.rst</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/laptops/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/laptops/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/admin-guide/media/c3-isp.dot?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/c3-isp.dot</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/admin-guide/media/c3-isp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/c3-isp.rst</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/media/mgb4.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/mgb4.rst</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/media/pci-cardlist.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/pci-cardlist.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/media/v4l-drivers.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/v4l-drivers.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/namespaces/resource-control.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/namespaces/resource-control.rst</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/pm/cpufreq.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/cpufreq.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/pm/intel_idle.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/intel_idle.rst</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/pm/intel_pstate.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/intel_pstate.rst</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/quickly-build-trimmed-linux.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/quickly-build-trimmed-linux.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/reporting-issues.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/reporting-issues.rst</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/sysctl/vm.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/sysctl/vm.rst</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/admin-guide/xfs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/xfs.rst</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/arm64/cpu-feature-registers.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/arm64/cpu-feature-registers.rst</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/arm64/silicon-errata.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/arm64/silicon-errata.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/arm64/sme.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/arm64/sme.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/openrisc/openrisc_port.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/openrisc/openrisc_port.rst</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/arch/powerpc/htm.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/powerpc/htm.rst</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/powerpc/kvm-nested.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/powerpc/kvm-nested.rst</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/riscv/hwprobe.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/riscv/hwprobe.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/arch/x86/amd-debugging.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/amd-debugging.rst</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/x86/amd_hsmp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/amd_hsmp.rst</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/x86/cpuinfo.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/cpuinfo.rst</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/x86/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/index.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/x86/x86_64/5level-paging.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/x86_64/5level-paging.rst</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/arch/x86/x86_64/fsgs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/x86_64/fsgs.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/bpf/bpf_iterators.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/bpf/bpf_iterators.rst</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/dma-api.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/dma-api.rst</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/genericirq.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/genericirq.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/irq/concepts.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/irq/concepts.rst</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/irq/irq-domain.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/irq/irq-domain.rst</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/core-api/printk-formats.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/printk-formats.rst</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/hisilicon,hip06-sec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/hisilicon,hip06-sec.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/img,hash-accelerator.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/img,hash-accelerator.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/img-hash.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/img-hash.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/marvell,orion-crypto.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/marvell,orion-crypto.yaml</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/marvell-cesa.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/marvell-cesa.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/mediatek-crypto.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/mv_cesa.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/mv_cesa.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/crypto/qcom-qce.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/qcom-qce.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/fsl,tcon.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/fsl,tcon.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/imx/ldb.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/ldb.txt</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/hdmi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/hdmi.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/mdp4.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/mdp4.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/boe,td4320.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/boe,td4320.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/sitronix,st7571.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/sitronix,st7571.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/display/truly,nt35597.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/truly,nt35597.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/example-schema.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/example-schema.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/gpio-mxs.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/gpio-vf610.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/sifive,gpio.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml</a> (renamed from Documentation/devicetree/bindings/pci/altr,msi-controller.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ad5820.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ad5820.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/adp1653.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml</a> (renamed from Documentation/devicetree/bindings/media/i2c/adv7180.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/adv7343.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml</a> (renamed from Documentation/devicetree/bindings/media/i2c/adv748x.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml</a> (renamed from Documentation/devicetree/bindings/media/i2c/adv7604.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/mt9v032.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/max2175.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/mt9m111.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/tda1997x.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/mt9m001.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/ov2640.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/ov2659.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/ov7670.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/ov7740.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/ov9650.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml</a> (renamed from Documentation/devicetree/bindings/media/i2c/imx219.yaml)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/ths8200.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/tvp514x.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/tvp5150.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/tvp7002.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt</a> (renamed from Documentation/devicetree/bindings/media/i2c/tc358743.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/imx.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/imx.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/renesas,fcp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,fcp.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/renesas,isp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,isp.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/media/renesas,vsp1.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,vsp1.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mfd/maxim,max77759.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mips/cpus.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mips/cpus.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/mtk-sd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/mtk-sd.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/sdhci-msm.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/sdhci.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/sdhci.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/ethernet-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ethernet-controller.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/ethernet-phy.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ethernet-phy.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/network-class.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/network-class.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/snps,dwmac.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/ti,dp83822.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ti,dp83822.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/via-rhine.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/via-rhine.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/numa.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/numa.txt</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/opp/opp-v1.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/opp/opp-v1.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pci/pci-ep.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pci/pci-ep.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/mediatek,power-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/qcom,rpmpd.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/rockchip,power-controller.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/supply/bq24190.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/bq24190.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/supply/bq25980.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/bq25980.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/powerpc/fsl/pmc.txt</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/vt8500-pwm.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/audio-graph-card2.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/everest,es8375.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/everest,es8375.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/everest,es8389.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/everest,es8389.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/fsl,mqs.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/fsl,mqs.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/maxim,max98925.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/maxim,max98925.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/realtek,alc203.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/realtek,alc203.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/richtek,rt9123.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/richtek,rt9123.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/fsl,dspi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/fsl,dspi.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/samsung,spi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/samsung,spi.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/spi-rockchip.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/spi-rockchip.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/airoha,en7581-thermal.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/thermal/airoha,en7581-thermal.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/thermal/qcom-tsens.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/altr,timer-1.0.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/altr,timer-1.0.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/altr,timer-1.0.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/altr,timer-1.0.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/arm,mps2-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/arm,mps2-timer.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/arm,mps2-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/arm,mps2-timer.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/cnxt,cx92755-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/cnxt,cx92755-timer.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/csky,gx6605s-timer.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/csky,mptimer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/csky,mptimer.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/csky,mptimer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/csky,mptimer.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/digicolor-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/digicolor-timer.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ezchip,nps400-timer.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/fsl,gtm.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/fsl,gtm.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/fsl,gtm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/fsl,gtm.yaml</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/img,pistachio-gptimer.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/jcore,pit.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/jcore,pit.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/jcore,pit.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/jcore,pit.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/lsi,zevio-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/lsi,zevio-timer.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/marvell,armada-370-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/marvell,armada-370-timer.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/marvell,orion-timer.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/nxp,s32g2-stm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/nxp,s32g2-stm.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/renesas,tpu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/renesas,tpu.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/sifive,clint.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/sifive,clint.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/snps,arc-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,arc-timer.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/snps,arc-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,arc-timer.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/snps,archs-gfrc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,archs-gfrc.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,archs-rtc.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/snps,archs-rtc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,archs-rtc.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/st,spear-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/st,spear-timer.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/st,spear-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/st,spear-timer.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ti,keystone-timer.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/timer/ti,keystone-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ti,keystone-timer.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/trivial-devices.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/trivial-devices.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/ufs/qcom,ufs.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/usb/microchip,usb5744.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/usb/xlnx,usb2.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/vendor-prefixes.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/virtio/pci-iommu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/virtio/pci-iommu.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/bindings/writing-schema.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/writing-schema.rst</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/devicetree/overlay-notes.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/overlay-notes.rst</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/doc-guide/sphinx.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/doc-guide/sphinx.rst</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/basics.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/basics.rst</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/driver-api/coco/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/coco/index.rst</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/driver-api/coco/measurement-registers.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/coco/measurement-registers.rst</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/dmaengine/provider.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/dmaengine/provider.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/early-userspace/buffer-format.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/early-userspace/buffer-format.rst</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/gpio/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/gpio/index.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/ipmi.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/ipmi.rst</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/driver-api/usb/usb.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/usb/usb.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/filesystems/bcachefs/future/idle_work.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/bcachefs/future/idle_work.rst</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/genetlink-c.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/genetlink-c.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/genetlink-legacy.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/genetlink-legacy.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/netlink-raw.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/netlink-raw.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/devlink.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/devlink.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/ethtool.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/ethtool.yaml</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/netdev.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/netdev.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/nl80211.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/nl80211.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/ovpn.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/ovpn.yaml</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/ovs_datapath.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/ovs_datapath.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/ovs_vport.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/ovs_vport.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/rt-addr.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt-addr.yaml</a> (renamed from Documentation/netlink/specs/rt_addr.yaml)</td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/rt-link.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt-link.yaml</a> (renamed from Documentation/netlink/specs/rt_link.yaml)</td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/rt-neigh.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt-neigh.yaml</a> (renamed from Documentation/netlink/specs/rt_neigh.yaml)</td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/rt-route.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt-route.yaml</a> (renamed from Documentation/netlink/specs/rt_route.yaml)</td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/rt-rule.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt-rule.yaml</a> (renamed from Documentation/netlink/specs/rt_rule.yaml)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/netlink/specs/tc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/tc.yaml</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/Documentation/networking/dccp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/dccp.rst</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/networking/device_drivers/ethernet/huawei/hinic3.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/device_drivers/ethernet/huawei/hinic3.rst</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/device_drivers/ethernet/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/device_drivers/ethernet/index.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/device_drivers/ethernet/meta/fbnic.rst</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/devlink-info.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devlink/devlink-info.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/devlink-trap.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devlink/devlink-trap.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devlink/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/networking/devlink/ixgbe.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devlink/ixgbe.rst</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/devmem.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devmem.rst</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/ip-sysctl.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/ip-sysctl.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/net_cachelines/net_device.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/net_cachelines/net_device.rst</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/net_cachelines/snmp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/net_cachelines/snmp.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/netdev-features.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/netdev-features.rst</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/netdevices.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/netdevices.rst</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/netmem.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/netmem.rst</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/rds.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/rds.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/networking/rxrpc.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/rxrpc.rst</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_TW/admin-guide/bug-hunting.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/userspace-api/ioctl/ioctl-number.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/ioctl/ioctl-number.rst</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/userspace-api/media/v4l/meta-formats.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/media/v4l/meta-formats.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/userspace-api/mseal.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/mseal.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/userspace-api/netlink/netlink-raw.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/netlink/netlink-raw.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/virt/kvm/api.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/virt/kvm/api.rst</a></td><td class='right'>789</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 8.7%;'/><td class='none' style='width: 81.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/virt/kvm/devices/vcpu.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/virt/kvm/devices/vcpu.rst</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/virt/kvm/x86/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/virt/kvm/x86/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/Documentation/virt/kvm/x86/intel-tdx.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/virt/kvm/x86/intel-tdx.rst</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/wmi/devices/alienware-wmi.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/wmi/devices/alienware-wmi.rst</a></td><td class='right'>425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/wmi/devices/dell-wmi-ddv.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/wmi/devices/dell-wmi-ddv.rst</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Documentation/wmi/devices/msi-wmi-platform.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/wmi/devices/msi-wmi-platform.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/MAINTAINERS?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>MAINTAINERS</a></td><td class='right'>653</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.8%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 85.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/alpha/include/uapi/asm/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/alpha/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/alpha/kernel/perf_event.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/intc-arcv2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/intc-arcv2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/intc-compact.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/intc-compact.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/mcip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/mcip.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arc/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/perf_event.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/compressed/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/compressed/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/amlogic/meson8.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/dts/amlogic/meson8.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/amlogic/meson8b.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/dts/amlogic/meson8b.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/common/sa1111.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/common/sa1111.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/at91_dt_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/at91_dt_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/collie_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/collie_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/davinci_all_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/davinci_all_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/dove_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/dove_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/exynos_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/exynos_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/imx_v6_v7_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/imx_v6_v7_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/lpc18xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/lpc18xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/lpc32xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/lpc32xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/milbeaut_m10v_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/milbeaut_m10v_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/mmp2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/mmp2_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/multi_v4t_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/multi_v4t_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/multi_v5_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/multi_v5_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/multi_v7_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/multi_v7_defconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/mvebu_v5_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/mvebu_v5_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/mxs_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/mxs_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/omap2plus_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/omap2plus_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/orion5x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/orion5x_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/pxa168_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/pxa168_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/pxa910_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/pxa910_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/pxa_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/pxa_defconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/s5pv210_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/s5pv210_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/sama7_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/sama7_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/shmobile_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/shmobile_defconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/spitz_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/spitz_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/stm32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/stm32_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/configs/wpcm450_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/wpcm450_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/Kconfig</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/aes-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/aes-ce-glue.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/aes-neonbs-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/aes-neonbs-glue.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/blake2b-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/blake2b-neon-glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/chacha-glue.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.1%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/ghash-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/ghash-ce-glue.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/poly1305-glue.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.3%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha1-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1-ce-glue.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha1.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha1_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1_glue.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha1_neon_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1_neon_glue.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha2-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha2-ce-glue.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha256_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha256_glue.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha256_glue.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha256_glue.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha256_neon_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha256_neon_glue.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha512-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha512-glue.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha512-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha512-neon-glue.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/crypto/sha512.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha512.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/include/asm/simd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/include/asm/simd.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crc-t10dif.c</a> (renamed from arch/arm/lib/crc-t10dif-glue.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crc32.c</a> (renamed from arch/arm/lib/crc32-glue.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/Kconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/Makefile</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/blake2s-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/blake2s-core.S</a> (renamed from arch/arm/crypto/blake2s-core.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/blake2s-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/blake2s-glue.c</a> (renamed from arch/arm/crypto/blake2s-glue.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/chacha-glue.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/chacha-neon-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/chacha-neon-core.S</a> (renamed from arch/arm/crypto/chacha-neon-core.S)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/chacha-scalar-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/chacha-scalar-core.S</a> (renamed from arch/arm/crypto/chacha-scalar-core.S)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/poly1305-armv4.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/poly1305-armv4.pl</a> (renamed from arch/arm/crypto/poly1305-armv4.pl)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/poly1305-glue.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/sha256-armv4.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/sha256-armv4.pl</a> (renamed from arch/arm/crypto/sha256-armv4.pl)</td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/sha256-ce.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/sha256-ce.S</a> (renamed from arch/arm/crypto/sha2-ce-core.S)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crypto/sha256.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-exynos/suspend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-exynos/suspend.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-imx/avic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-imx/avic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-imx/gpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-imx/gpc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-imx/tzic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-imx/tzic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-omap1/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-omap1/irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-omap2/omap-wakeupgen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-omap2/omap-wakeupgen.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/mach-pxa/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-pxa/irq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm/plat-orion/gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/plat-orion/gpio.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-gxl.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/apple/t8103-j293.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/apple/t8103-j293.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/apple/t8112-j493.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/apple/t8112-j493.dts</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/arm/morello.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/arm/morello.dtsi</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx8mp.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/freescale/imx95.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx95.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/qcom/x1e80100.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/rockchip/rk3588j.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3588j.dtsi</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp211.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/st/stm32mp211.dtsi</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp231.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/st/stm32mp231.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/boot/dts/st/stm32mp251.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/configs/defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/configs/defconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/Kconfig</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/aes-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/aes-glue.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm64/crypto/chacha-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/chacha-neon-glue.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/ghash-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/ghash-ce-glue.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm64/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/poly1305-glue.c</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/polyval-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/polyval-ce-glue.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sha1-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha1-ce-glue.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sha2-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha2-ce-glue.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sha256-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha256-glue.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sha3-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha3-ce-glue.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sha512-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha512-ce-glue.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sha512-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha512-glue.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sm3-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sm3-ce-glue.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sm3-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sm3-neon-glue.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/crypto/sm4-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sm4-ce-glue.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/cpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/cpu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/cputype.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/cputype.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/el2_setup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/el2_setup.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/esr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/esr.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/fixmap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/fixmap.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/fpsimd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/fpsimd.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/hardirq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/hardirq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/hugetlb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/hugetlb.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/insn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/insn.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/kvm_arm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_arm.h</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/kvm_emulate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_emulate.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_host.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/kvm_nested.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_nested.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/kvm_pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_pgtable.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/kvm_pkvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_pkvm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/kvm_ras.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_ras.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/mem_encrypt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/mem_encrypt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/mmu.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/pgtable.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/rqspinlock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/rqspinlock.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/rsi_cmds.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/rsi_cmds.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/sections.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/sections.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/spectre.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/spectre.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/sysreg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/sysreg.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/thread_info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/thread_info.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/vdso/gettimeofday.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/vdso/gettimeofday.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/virt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/virt.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/vmalloc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/vmalloc.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/asm/vncr_mapping.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/vncr_mapping.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/include/uapi/asm/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/uapi/asm/kvm.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/asm-offsets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/asm-offsets.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/cpu_errata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/cpu_errata.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/cpufeature.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/cpufeature.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/cpuinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/cpuinfo.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/efi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/efi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/entry-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/entry-common.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/fpsimd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/fpsimd.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/head.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/head.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/hyp-stub.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/hyp-stub.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/image-vars.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/image-vars.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/kaslr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/kaslr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/pi/kaslr_early.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/pi/kaslr_early.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/pi/map_kernel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/pi/map_kernel.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/pi/pi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/pi/pi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/process.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/proton-pack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/proton-pack.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/ptrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/ptrace.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/setup.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/signal.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/signal32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/signal32.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/traps.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kernel/vmlinux.lds.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/vmlinux.lds.S</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/arm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/arm.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/at.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/at.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/kvm/config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/config.c</a></td><td class='right'>1085</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/emulate-nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/emulate-nested.c</a></td><td class='right'>590</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 86.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/handle_exit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/handle_exit.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/include/hyp/fault.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/hyp/fault.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/include/hyp/switch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/hyp/switch.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/nvhe/mem_protect.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/include/nvhe/memory.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/nvhe/memory.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/include/nvhe/mm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/nvhe/mm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/ffa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/ffa.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/host.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/host.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/hyp-init.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/hyp-init.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/hyp-main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/hyp-main.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/hyp.lds.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/hyp.lds.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/mem_protect.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/mem_protect.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/mm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/mm.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/pkvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/pkvm.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/setup.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/nvhe/switch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/switch.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/pgtable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/pgtable.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/vgic-v3-sr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/vgic-v3-sr.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/vhe/switch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/vhe/switch.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/hyp/vhe/tlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/vhe/tlb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/mmu.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/nested.c</a></td><td class='right'>846</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.7%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 80.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/pkvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/pkvm.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/pmu-emul.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/pmu-emul.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/reset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/reset.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/sys_regs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/sys_regs.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/trace_arm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/trace_arm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/vgic/vgic-debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic-debug.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/vgic/vgic-its.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic-its.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/vgic/vgic-v3-nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic-v3-nested.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/kvm/vgic/vgic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm64/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crc-t10dif.c</a> (renamed from arch/arm64/lib/crc-t10dif-glue.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm64/lib/crc32-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crc32-core.S</a> (renamed from arch/arm64/lib/crc32.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm64/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crc32.c</a> (renamed from arch/arm64/lib/crc32-glue.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/.gitignore</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/Makefile</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/chacha-neon-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/chacha-neon-core.S</a> (renamed from arch/arm64/crypto/chacha-neon-core.S)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/chacha-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/chacha-neon-glue.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/poly1305-armv8.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/poly1305-armv8.pl</a> (renamed from arch/arm64/crypto/poly1305-armv8.pl)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/poly1305-glue.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/sha2-armv8.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/sha2-armv8.pl</a> (renamed from arch/arm64/crypto/sha512-armv8.pl)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/sha256-ce.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/sha256-ce.S</a> (renamed from arch/arm64/crypto/sha2-ce-core.S)</td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/arm64/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crypto/sha256.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/lib/insn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/insn.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/mm/hugetlbpage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/hugetlbpage.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/init.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/mm/pageattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/pageattr.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/mm/proc.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/proc.S</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/net/bpf_jit_comp.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/tools/cpucaps?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/tools/cpucaps</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/tools/sysreg?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/tools/sysreg</a></td><td class='right'>1019</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 76.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/arm64/xen/hypercall.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/xen/hypercall.S</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/csky/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/csky/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/hexagon/configs/comet_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/hexagon/configs/comet_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/configs/loongson3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/configs/loongson3_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/asm-prototypes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/asm-prototypes.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/fpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/fpu.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/kvm_host.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/kvm_vcpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/kvm_vcpu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/lbt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/lbt.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/ptrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/ptrace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/include/asm/uprobes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/uprobes.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/entry.S</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/fpu.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/fpu.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/genex.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/genex.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/kfpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/kfpu.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/lbt.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/lbt.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/process.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/signal.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/time.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/time.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/traps.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kernel/uprobes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/uprobes.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kvm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kvm/exit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/exit.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kvm/intc/ipi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/intc/ipi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kvm/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kvm/mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/mmu.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/kvm/vcpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/vcpu.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/lib/crc32-loongarch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/lib/crc32-loongarch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/mm/hugetlbpage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/mm/hugetlbpage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/mm/init.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/loongarch/power/hibernate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/power/hibernate.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/coldfire/m5272.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/coldfire/m5272.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/amcore_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/amcore_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/amiga_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/amiga_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/apollo_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/apollo_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/atari_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/atari_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/bvme6000_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/bvme6000_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/hp300_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/hp300_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/mac_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/mac_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/multi_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/multi_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/mvme147_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/mvme147_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/mvme16x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/mvme16x_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/q40_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/q40_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/sun3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/sun3_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/configs/sun3x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/sun3x_defconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/kernel/setup_mm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/kernel/setup_mm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/m68k/mac/config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/mac/config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/ath25/ar2315.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/ath25/ar2315.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/ath25/ar5312.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/ath25/ar5312.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/bcm47xx/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/bcm47xx/setup.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/cavium-octeon/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/cavium-octeon/crypto/octeon-md5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/cavium-octeon/crypto/octeon-sha1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-sha1.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/cavium-octeon/crypto/octeon-sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-sha256.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/cavium-octeon/crypto/octeon-sha512.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-sha512.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/cavium-octeon/octeon-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/octeon-irq.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/ath79_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ath79_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/bigsur_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/bigsur_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/cavium_octeon_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/cavium_octeon_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/decstation_64_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/decstation_64_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/decstation_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/decstation_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/decstation_r4k_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/decstation_r4k_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/fuloong2e_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/fuloong2e_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/gcw0_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/gcw0_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/gpr_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/gpr_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/ip22_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip22_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/ip27_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip27_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/ip28_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip28_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/ip30_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip30_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/ip32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip32_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/lemote2f_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/lemote2f_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/mtx1_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/mtx1_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/omega2p_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/omega2p_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/rb532_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/rb532_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/rt305x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/rt305x_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/sb1250_swarm_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/sb1250_swarm_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/vocore2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/vocore2_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/configs/xway_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/xway_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/mips/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/chacha-glue.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/mips/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/poly1305-glue.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/include/asm/idle.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/asm/idle.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/include/asm/ptrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/asm/ptrace.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/include/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/asm/socket.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/uapi/asm/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/kernel/genex.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/genex.S</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/kernel/idle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/idle.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/kernel/perf_event_mipsxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/perf_event_mipsxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/kernel/smp-cps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/smp-cps.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/traps.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/lantiq/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lantiq/irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/lib/crc32-mips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crc32-mips.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/mips/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crypto/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/mips/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crypto/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/mips/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crypto/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/mips/lib/crypto/chacha-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crypto/chacha-core.S</a> (renamed from arch/mips/crypto/chacha-core.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/mips/lib/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crypto/chacha-glue.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/mips/lib/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crypto/poly1305-glue.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/mips/lib/crypto/poly1305-mips.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crypto/poly1305-mips.pl</a> (renamed from arch/mips/crypto/poly1305-mips.pl)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/pci/pci-ar2315.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/pci/pci-ar2315.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/pci/pci-rt3883.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/pci/pci-rt3883.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/mips/ralink/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/ralink/irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/nios2/include/asm/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/include/asm/pgtable.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/nios2/kernel/cpuinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/kernel/cpuinfo.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/nios2/kernel/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/kernel/irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/nios2/mm/tlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/mm/tlb.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/include/asm/cacheflush.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/include/asm/cacheflush.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/include/asm/cpuinfo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/include/asm/cpuinfo.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/cacheinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/kernel/cacheinfo.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/kernel/dma.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/kernel/setup.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/mm/cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/mm/cache.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/openrisc/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/mm/init.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/configs/generic-32bit_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/configs/generic-32bit_defconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/configs/generic-64bit_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/configs/generic-64bit_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/include/uapi/asm/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/parisc/math-emu/driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/math-emu/driver.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/boot/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/boot/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/boot/rs6000.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/boot/rs6000.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/boot/wrapper?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/boot/wrapper</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/44x/sam440ep_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/44x/sam440ep_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/44x/warp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/44x/warp_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc832x_rdb_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/83xx/mpc834x_itx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc834x_itx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc837x_rdb_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/85xx/ge_imp3a_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/85xx/ge_imp3a_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/85xx/stx_gp3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/85xx/stx_gp3_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/86xx-hw.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/86xx-hw.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/amigaone_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/amigaone_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/chrp32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/chrp32_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/fsl-emb-nonhw.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/fsl-emb-nonhw.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/g5_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/g5_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/gamecube_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/gamecube_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/linkstation_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/linkstation_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/mpc83xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/mpc83xx_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/mpc866_ads_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/mpc866_ads_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/mvme5100_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/mvme5100_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/pasemi_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/pasemi_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/pmac32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/pmac32_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/powernv_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/powernv_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/ppc44x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc44x_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/ppc64_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc64_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/ppc64e_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc64e_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/ppc6xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc6xx_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/ps3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ps3_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/skiroot_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/skiroot_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/storcenter_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/storcenter_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/configs/wii_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/wii_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/Kconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/aes_cbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes_cbc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/aes_ctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes_ctr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/aes_xts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes_xts.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/chacha-p10-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/chacha-p10-glue.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/ghash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/ghash.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/md5-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/md5-glue.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/poly1305-p10-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/poly1305-p10-glue.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/sha1-spe-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/sha1-spe-glue.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/sha1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/sha1.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/powerpc/crypto/sha256-spe-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/sha256-spe-glue.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/guest-state-buffer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/guest-state-buffer.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/hvcall.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/hvcall.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/plpar_wrappers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/plpar_wrappers.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/preempt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/preempt.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/include/asm/rtas.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/rtas.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/include/uapi/asm/papr-indices.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/uapi/asm/papr-indices.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/include/uapi/asm/papr-physical-attestation.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/uapi/asm/papr-physical-attestation.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/include/uapi/asm/papr-platform-dump.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/uapi/asm/papr-platform-dump.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/fadump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/fadump.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/interrupt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/interrupt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/iommu.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/module_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/module_64.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/proc_powerpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/proc_powerpc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/process.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/rtas.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/rtas.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kernel/trace/ftrace_entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/trace/ftrace_entry.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kexec/crash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kexec/crash.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/book3s_hv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/book3s_hv.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/book3s_hv_nestedv2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/book3s_hv_nestedv2.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/booke.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/booke.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/guest-state-buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/guest-state-buffer.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/test-guest-state-buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/test-guest-state-buffer.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/kvm/timing.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/timing.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc-t10dif.c</a> (renamed from arch/powerpc/lib/crc-t10dif-glue.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crc-vpmsum-template.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc-vpmsum-template.S</a> (renamed from arch/powerpc/lib/crc32-vpmsum_core.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc32.c</a> (renamed from arch/powerpc/lib/crc32-glue.c)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crc32c-vpmsum_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc32c-vpmsum_asm.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crct10dif-vpmsum_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crct10dif-vpmsum_asm.S</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/chacha-p10-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/chacha-p10-glue.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/chacha-p10le-8x.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/chacha-p10le-8x.S</a> (renamed from arch/powerpc/crypto/chacha-p10le-8x.S)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/poly1305-p10-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/poly1305-p10-glue.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/poly1305-p10le_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/poly1305-p10le_64.S</a> (renamed from arch/powerpc/crypto/poly1305-p10le_64.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/sha256-spe-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/sha256-spe-asm.S</a> (renamed from arch/powerpc/crypto/sha256-spe-asm.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crypto/sha256.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/lib/vmx-helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/vmx-helper.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/mm/book3s64/radix_pgtable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/mm/book3s64/radix_pgtable.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/mm/fault.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/mm/fault.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/mm/nohash/8xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/mm/nohash/8xx.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/net/bpf_jit.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit_comp.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/net/bpf_jit_comp32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit_comp32.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/net/bpf_jit_comp64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit_comp64.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/perf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/perf/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/perf/core-book3s.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/perf/core-book3s.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/perf/core-fsl-emb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/perf/core-fsl-emb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/perf/kvm-hv-pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/perf/kvm-hv-pmu.c</a></td><td class='right'>435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/44x/gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/44x/gpio.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/44x/uic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/44x/uic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/512x/mpc5121_ads_cpld.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/52xx/media5200.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/52xx/media5200.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/52xx/mpc52xx_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/52xx/mpc52xx_pic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/85xx/socrates_fpga_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/85xx/socrates_fpga_pic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/8xx/cpm1-ic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/8xx/cpm1-ic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/8xx/cpm1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/8xx/cpm1.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/8xx/pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/8xx/pic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/embedded6xx/flipper-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/embedded6xx/flipper-pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/powermac/pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/powermac/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/setup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/powermac/smp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/powermac/time.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/time.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/powernv/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powernv/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/powernv/opal-irqchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powernv/opal-irqchip.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/powernv/pci-ioda.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powernv/pci-ioda.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/ps3/device-init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/ps3/device-init.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/ps3/interrupt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/ps3/interrupt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/htmdump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/htmdump.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/iommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/msi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/papr-indices.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/papr-indices.c</a></td><td class='right'>488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/papr-phy-attest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/papr-phy-attest.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/papr-platform-dump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/papr-platform-dump.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/papr-rtas-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/papr-rtas-common.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/papr-rtas-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/papr-rtas-common.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/platforms/pseries/papr-vpd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/papr-vpd.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/cpm2_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/cpm2_pic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/cpm_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/cpm_common.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/ehv_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/ehv_pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/fsl_msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/fsl_msi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/ge/ge_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/ge/ge_pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/i8259.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/i8259.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/ipic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/ipic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/mpic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/mpic.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/tsi108_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/tsi108_pci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/sysdev/xive/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/xive/common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/powerpc/xmon/xmon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/xmon/xmon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/boot/dts/sophgo/cv18xx.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/boot/dts/sophgo/cv18xx.dtsi</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/riscv/crypto/chacha-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/chacha-riscv64-glue.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/crypto/ghash-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/ghash-riscv64-glue.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/riscv/crypto/sha256-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sha256-riscv64-glue.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/crypto/sha512-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sha512-riscv64-glue.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/crypto/sm3-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sm3-riscv64-glue.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/alternative-macros.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/alternative-macros.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/asm-prototypes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/asm-prototypes.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/cacheflush.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/cacheflush.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/kgdb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kgdb.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/kvm_aia.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_aia.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_host.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/kvm_vcpu_sbi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_vcpu_sbi.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/kvm_vcpu_vector.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_vcpu_vector.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/include/asm/syscall.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/syscall.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/entry.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/head.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/head.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/kgdb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/kgdb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/module-sections.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/module-sections.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/module.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/module.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/probes/uprobes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/probes/uprobes.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/process.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/setup.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/traps.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/traps_misaligned.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/traps_misaligned.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kernel/unaligned_access_speed.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/unaligned_access_speed.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/aia_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/aia_device.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/vcpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/vcpu_sbi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_sbi.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/vcpu_sbi_hsm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_sbi_hsm.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/vcpu_sbi_system.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_sbi_system.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/vcpu_vector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_vector.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/kvm/vm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vm.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/riscv/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/crypto/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/riscv/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/crypto/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/riscv/lib/crypto/chacha-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/crypto/chacha-riscv64-glue.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/riscv/lib/crypto/chacha-riscv64-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/crypto/chacha-riscv64-zvkb.S</a> (renamed from arch/riscv/crypto/chacha-riscv64-zvkb.S)</td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/riscv/lib/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S</a> (renamed from arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/riscv/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/crypto/sha256.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/net/bpf_jit.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/net/bpf_jit.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/net/bpf_jit_comp64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/net/bpf_jit_comp64.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/riscv/net/bpf_jit_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/net/bpf_jit_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/ipl_parm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/ipl_parm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/printk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/printk.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/startup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/startup.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/boot/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/string.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/configs/debug_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/configs/debug_defconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/configs/defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/configs/defconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/configs/zfcpdump_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/configs/zfcpdump_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/s390/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/chacha-glue.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/ghash_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/ghash_s390.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/hmac_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/hmac_s390.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/paes_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/paes_s390.c</a></td><td class='right'>1815</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 29.2%;'/><td class='rem' style='width: 12.5%;'/><td class='none' style='width: 58.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/sha.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/sha1_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha1_s390.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/s390/crypto/sha256_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha256_s390.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/sha3_256_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha3_256_s390.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/sha3_512_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha3_512_s390.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/sha512_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha512_s390.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/crypto/sha_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha_common.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/hypfs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/hypfs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/s390/include/asm/asce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/asce.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/cpacf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/cpacf.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/cpufeature.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/cpufeature.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/s390/include/asm/diag288.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/diag288.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/futex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/futex.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/machine.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/machine.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/march.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/march.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/mmu_context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/mmu_context.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/nospec-branch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/nospec-branch.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/pkey.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/pkey.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/ptrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/ptrace.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/string.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/string.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/thread_info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/thread_info.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/uaccess.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/uaccess.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/include/asm/uv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/uv.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/asm-offsets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/asm-offsets.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/cert_store.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/cert_store.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/cpufeature.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/cpufeature.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/crash_dump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/crash_dump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/entry.S</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/ipl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/ipl.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/perf_cpum_cf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/perf_cpum_cf.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/perf_cpum_cf_events.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/perf_cpum_cf_events.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/perf_cpum_sf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/perf_cpum_sf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/processor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/processor.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/ptrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/ptrace.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/smp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/smp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kernel/uv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/uv.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kvm/intercept.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/intercept.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kvm/interrupt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/interrupt.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kvm/kvm-s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/kvm-s390.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/kvm/trace-s390.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/trace-s390.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/s390/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crc32.c</a> (renamed from arch/s390/lib/crc32-glue.c)</td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/s390/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crypto/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/s390/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crypto/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/s390/lib/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crypto/chacha-glue.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/s390/lib/crypto/chacha-s390.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crypto/chacha-s390.S</a> (renamed from arch/s390/crypto/chacha-s390.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/s390/lib/crypto/chacha-s390.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crypto/chacha-s390.h</a> (renamed from arch/s390/crypto/chacha-s390.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/s390/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crypto/sha256.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/lib/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/string.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/lib/uaccess.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/uaccess.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/mm/extmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/mm/extmem.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/mm/pgalloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/mm/pgalloc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/net/bpf_jit_comp.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/pci/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/pci/pci_bus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_bus.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/pci/pci_clp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_clp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/pci/pci_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_event.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/pci/pci_mmio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_mmio.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/s390/tools/gen_facilities.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/tools/gen_facilities.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/mach-se/7343/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/boards/mach-se/7343/irq.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/mach-se/7722/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/boards/mach-se/7722/irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/boards/mach-x3proto/gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/boards/mach-x3proto/gpio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/ap325rxa_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/ap325rxa_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/ecovec24_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/ecovec24_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/edosk7705_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/edosk7705_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/espt_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/espt_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/hp6xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/hp6xx_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/kfr2r09-romimage_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/kfr2r09-romimage_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/landisk_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/landisk_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/lboxre2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/lboxre2_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/magicpanelr2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/magicpanelr2_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/migor_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/migor_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/r7780mp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/r7780mp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/r7785rp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/r7785rp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/rts7751r2d1_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/rts7751r2d1_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/rts7751r2dplus_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/rts7751r2dplus_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/sdk7780_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sdk7780_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/se7206_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7206_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/se7712_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7712_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/se7721_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7721_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/se7724_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7724_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/sh03_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh03_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/sh2007_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh2007_defconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/sh7724_generic_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh7724_generic_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/sh7763rdp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh7763rdp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/sh7770_generic_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh7770_generic_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sh/configs/titan_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/titan_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/configs/sparc64_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/configs/sparc64_defconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/aes_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/aes_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/aes_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/aes_glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/camellia_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/camellia_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/camellia_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/camellia_glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/des_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/des_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/des_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/des_glue.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/md5_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/md5_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/md5_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/md5_glue.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/sha1_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha1_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/sha1_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha1_glue.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/sparc/crypto/sha256_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha256_glue.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/sha512_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha512_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/crypto/sha512_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha512_glue.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/sparc/include/asm/opcodes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/include/asm/opcodes.h</a> (renamed from arch/sparc/crypto/opcodes.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/include/uapi/asm/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/kernel/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/sparc/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/kernel/setup.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/sparc/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crc32.c</a> (renamed from arch/sparc/lib/crc32_glue.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/sparc/lib/crc32c_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crc32c_asm.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/sparc/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crypto/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/sparc/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crypto/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/sparc/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crypto/sha256.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/sparc/lib/crypto/sha256_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crypto/sha256_asm.S</a> (renamed from arch/sparc/crypto/sha256_asm.S)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/um/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/um/include/asm/fpu/api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/include/asm/fpu/api.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/um/include/asm/uaccess.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/include/asm/uaccess.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/um/kernel/trap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/kernel/trap.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/um/kernel/um_arch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/kernel/um_arch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/Kconfig.assembler?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig.assembler</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/Kconfig.cpu?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig.cpu</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/Kconfig.cpufeatures?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig.cpufeatures</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/bioscall.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/bioscall.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/boot.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/boot.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/head_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/head_64.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/mem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/misc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/misc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/misc.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/pgtable.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/pgtable_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/pgtable_64.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/sev-handle-vc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/sev-handle-vc.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/sev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/sev.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/sev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/sev.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/compressed/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/string.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/copy.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/copy.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/header.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/header.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/efi-mixed.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/efi-mixed.S</a> (renamed from drivers/firmware/efi/libstub/x86-mixed.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/gdt_idt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/gdt_idt.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/la57toggle.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/la57toggle.S</a> (renamed from arch/x86/boot/compressed/la57toggle.S)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/map_kernel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/map_kernel.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/sev-shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/sev-shared.c</a> (renamed from arch/x86/coco/sev/shared.c)</td><td class='right'>894</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 19.9%;'/><td class='none' style='width: 79.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/sev-startup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/sev-startup.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/boot/startup/sme.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/startup/sme.c</a> (renamed from arch/x86/mm/mem_encrypt_identity.c)</td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/string.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/boot/video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/video.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/coco/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/coco/sev/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/coco/sev/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/core.c</a></td><td class='right'>2042</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.9%;'/><td class='rem' style='width: 36.0%;'/><td class='none' style='width: 53.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/coco/sev/sev-nmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/sev-nmi.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/coco/sev/vc-handle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/vc-handle.c</a></td><td class='right'>1061</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/coco/sev/vc-shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/vc-shared.c</a></td><td class='right'>504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/coco/tdx/tdx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/tdx/tdx.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/configs/i386_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/configs/i386_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/Kconfig</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aegis128-aesni-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aegis128-aesni-glue.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aes-ctr-avx-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aes-ctr-avx-x86_64.S</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aes-xts-avx-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aes-xts-avx-x86_64.S</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aesni-intel_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aesni-intel_glue.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aria_aesni_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aria_aesni_avx2_glue.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aria_aesni_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aria_aesni_avx_glue.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/aria_gfni_avx512_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aria_gfni_avx512_glue.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/camellia_aesni_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/camellia_aesni_avx2_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/camellia_aesni_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/camellia_aesni_avx_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/cast5_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/cast5_avx_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/cast6_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/cast6_avx_glue.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/crypto/chacha_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/chacha_glue.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/ghash-clmulni-intel_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/ghash-clmulni-intel_asm.S</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/ghash-clmulni-intel_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/ghash-clmulni-intel_glue.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/crypto/poly1305_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/poly1305_glue.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.7%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/polyval-clmulni_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/polyval-clmulni_glue.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/serpent_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/serpent_avx2_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/serpent_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/serpent_avx_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/serpent_sse2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/serpent_sse2_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sha1_ssse3_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha1_ssse3_glue.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/crypto/sha256_ssse3_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha256_ssse3_glue.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.7%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sha512_ssse3_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha512_ssse3_glue.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sm3_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sm3_avx_glue.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sm4_aesni_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sm4_aesni_avx2_glue.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/sm4_aesni_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sm4_aesni_avx_glue.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/crypto/twofish_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/twofish_avx_glue.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/entry.S</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/entry_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/entry_64.S</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/vdso/vma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/vdso/vma.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/entry/vsyscall/vsyscall_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/vsyscall/vsyscall_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/brs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/brs.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/ibs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/ibs.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/iommu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/lbr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/lbr.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/power.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/amd/uncore.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/uncore.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/core.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/bts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/bts.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/core.c</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/cstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/cstate.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/ds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/ds.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/knc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/knc.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/lbr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/lbr.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/p4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/p4.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/p6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/p6.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/pt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/pt.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore_discovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_discovery.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore_nhmex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_nhmex.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore_snb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_snb.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/intel/uncore_snbep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_snbep.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/msr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/msr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/perf_event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/perf_event.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/perf_event_flags.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/perf_event_flags.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/probe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/probe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/rapl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/rapl.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/utils.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/events/zhaoxin/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/zhaoxin/core.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/hyperv/hv_apic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_apic.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/hyperv/hv_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_init.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/hyperv/hv_spinlock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_spinlock.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/hyperv/hv_vtl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_vtl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/hyperv/ivm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/ivm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/acrn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/acrn.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/alternative.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/alternative.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/include/asm/amd/fch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd/fch.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/include/asm/amd/hsmp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd/hsmp.h</a> (renamed from arch/x86/include/asm/amd_hsmp.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/include/asm/amd/ibs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd/ibs.h</a> (renamed from arch/x86/include/asm/amd-ibs.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/include/asm/amd/nb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd/nb.h</a> (renamed from arch/x86/include/asm/amd_nb.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/include/asm/amd/node.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd/node.h</a> (renamed from arch/x86/include/asm/amd_node.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/apic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/apic.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/arch_hweight.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/arch_hweight.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/asm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/asm.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/bitops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/bitops.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/boot.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/boot.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/coco.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/coco.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/cpufeatures.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/cpufeatures.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/cpuid/api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/cpuid/api.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/cpuid/types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/cpuid/types.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/debugreg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/debugreg.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/elf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/elf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/entry-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/entry-common.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/fpu/api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/api.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/fpu/sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/sched.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/fpu/types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/types.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/fpu/xstate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/xstate.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/fred.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fred.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/fsgsbase.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fsgsbase.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/inat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/inat.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/intel-family.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/intel-family.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/io.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/kexec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/kexec.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/kvm-x86-ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/kvm-x86-ops.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/kvm_host.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/linkage.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/linkage.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/mem_encrypt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mem_encrypt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/microcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/microcode.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/mmu_context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mmu_context.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/mshyperv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mshyperv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/msr-index.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/msr-index.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/msr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/msr.h</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/mwait.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mwait.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/nmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/nmi.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/nospec-branch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/nospec-branch.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/page_32_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_32_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/page_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/page_64_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_64_types.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/page_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/paravirt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/paravirt.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/paravirt_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/paravirt_types.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/percpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/percpu.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/perf_event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/perf_event.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/pgalloc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgalloc.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/pgtable-2level_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable-2level_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/pgtable-3level_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable-3level_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/pgtable_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/pgtable_64_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable_64_types.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/posted_intr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/posted_intr.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/processor.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/processor.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/resctrl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/resctrl.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/setup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/setup.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/sev-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/sev-common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/include/asm/sev-internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/sev-internal.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/sev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/sev.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/shared/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/shared/tdx.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/simd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/simd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/smap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/smap.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/spec-ctrl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/spec-ctrl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/special_insns.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/special_insns.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/string_32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/string_32.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/suspend_32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/suspend_32.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/suspend_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/suspend_64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/switch_to.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/switch_to.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/tdx.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/include/asm/tdx_global_metadata.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/tdx_global_metadata.h</a> (renamed from arch/x86/virt/vmx/tdx/tdx_global_metadata.h)</td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/text-patching.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/text-patching.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/include/asm/trace/common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/trace/common.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/trace/fpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/trace/fpu.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/trace/irq_vectors.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/trace/irq_vectors.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/tsc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/tsc.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/uaccess_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/uaccess_64.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/vdso.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/vdso.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/vdso/processor.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/vdso/processor.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/vmx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/vmx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/x86_init.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/x86_init.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/asm/xen/hypervisor.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/xen/hypervisor.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/uapi/asm/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/uapi/asm/kvm.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/include/uapi/asm/vmx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/uapi/asm/vmx.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/acpi/boot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/boot.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/acpi/cppc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/cppc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/acpi/cstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/cstate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/acpi/sleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/sleep.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/alternative.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/alternative.c</a></td><td class='right'>783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 6.5%;'/><td class='none' style='width: 82.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/amd_gart_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/amd_gart_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/amd_nb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/amd_nb.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/amd_node.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/amd_node.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/aperture_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/aperture_64.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/apic/apic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/apic.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/apic/apic_numachip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/apic_numachip.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/apic/io_apic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/io_apic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/apic/vector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/vector.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/asm-offsets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/asm-offsets.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/asm-offsets_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/asm-offsets_32.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/callthunks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/callthunks.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cet.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/amd.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/amd_cache_disable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/amd_cache_disable.c</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/aperfmperf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/aperfmperf.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/bugs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/bugs.c</a></td><td class='right'>1512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.0%;'/><td class='rem' style='width: 13.8%;'/><td class='none' style='width: 65.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/bus_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/bus_lock.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/cacheinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/cacheinfo.c</a></td><td class='right'>1059</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 16.5%;'/><td class='none' style='width: 75.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/common.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/cpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/cpu.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/cpuid-deps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/cpuid-deps.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/cpuid_0x2_table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/cpuid_0x2_table.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/feat_ctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/feat_ctl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/hygon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/hygon.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/intel.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/intel_epb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/intel_epb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/amd.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/core.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/inject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/inject.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/intel.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mce/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/internal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/amd.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/core.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/intel-ucode-defs.h</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/intel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/microcode/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mshyperv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mshyperv.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/mtrr/generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mtrr/generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/core.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/ctrlmondata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/ctrlmondata.c</a></td><td class='right'>635</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.6%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/internal.h</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 8.9%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/monitor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/monitor.c</a></td><td class='right'>921</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 21.0%;'/><td class='none' style='width: 78.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/pseudo_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/pseudo_lock.c</a></td><td class='right'>1119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 25.3%;'/><td class='none' style='width: 74.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h</a> (renamed from arch/x86/kernel/cpu/resctrl/trace.h)</td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/resctrl/rdtgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/rdtgroup.c</a></td><td class='right'>4167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 95.5%;'/><td class='none' style='width: 4.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/scattered.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/scattered.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/sgx/driver.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/sgx/driver.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/sgx/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/sgx/ioctl.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/sgx/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/sgx/main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/topology.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/topology_amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/topology_amd.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/tsx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/tsx.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/umwait.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/umwait.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/cpu/zhaoxin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/zhaoxin.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/dumpstack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/dumpstack.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/e820.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/e820.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/early_printk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/early_printk.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/context.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/core.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/init.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/regset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/regset.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/signal.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/xstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/xstate.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fpu/xstate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/xstate.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/fred.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fred.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/ftrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/ftrace.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/head32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/head64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head64.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 6.3%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/head_32.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head_32.S</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/head_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head_64.S</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/hpet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/hpet.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/i8253.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/i8253.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/jailhouse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/jailhouse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/jump_label.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/jump_label.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/kprobes/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kprobes/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/kprobes/opt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kprobes/opt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/kvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kvm.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/kvmclock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kvmclock.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/machine_kexec_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/machine_kexec_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/machine_kexec_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/machine_kexec_64.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/mmconf-fam10h_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/mmconf-fam10h_64.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/module.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/module.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/nmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/nmi.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/nmi_selftest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/nmi_selftest.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/paravirt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/paravirt.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/process.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/process_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/process_32.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/process_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/process_64.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/reboot_fixups_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/reboot_fixups_32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/relocate_kernel_32.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/relocate_kernel_32.S</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/relocate_kernel_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/relocate_kernel_64.S</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/setup.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/shstk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/shstk.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/signal.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/smpboot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/smpboot.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/static_call.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/static_call.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/trace_clock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/trace_clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/kernel/tracepoint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/tracepoint.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/traps.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/tsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/tsc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/tsc_sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/tsc_sync.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/uprobes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/uprobes.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kernel/vmlinux.lds.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/vmlinux.lds.S</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/cpuid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/cpuid.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/cpuid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/cpuid.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/lapic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/lapic.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/lapic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/lapic.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/mmu/mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/mmu.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/mmu/mmu_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/mmu_internal.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/mmu/page_track.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/page_track.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/mmu/spte.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/spte.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/mmu/spte.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/spte.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/mmu/tdp_mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/tdp_mmu.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/smm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/smm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/smm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/smm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/svm/avic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/avic.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/svm/sev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/sev.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/svm/svm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/svm.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/svm/svm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/svm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/trace.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/common.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/main.c</a></td><td class='right'>1125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.8%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 74.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/nested.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/pmu_intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/pmu_intel.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/pmu_intel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/pmu_intel.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/posted_intr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/posted_intr.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/posted_intr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/posted_intr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/sgx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/sgx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/tdx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/tdx.c</a></td><td class='right'>3526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 81.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 19.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/tdx.h</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/tdx_arch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/tdx_arch.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/tdx_errno.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/tdx_errno.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/vmx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/vmx.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/vmx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/vmx.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/vmx/x86_ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/x86_ops.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/x86.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/x86.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/kvm/x86.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/x86.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crc-t10dif.c</a> (renamed from arch/x86/lib/crc-t10dif-glue.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crc32.c</a> (renamed from arch/x86/lib/crc32-glue.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crc64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crc64.c</a> (renamed from arch/x86/lib/crc64-glue.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/Kconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/blake2s-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/blake2s-core.S</a> (renamed from arch/x86/crypto/blake2s-core.S)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/blake2s-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/blake2s-glue.c</a> (renamed from arch/x86/crypto/blake2s-glue.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/chacha-avx2-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/chacha-avx2-x86_64.S</a> (renamed from arch/x86/crypto/chacha-avx2-x86_64.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/chacha-avx512vl-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/chacha-avx512vl-x86_64.S</a> (renamed from arch/x86/crypto/chacha-avx512vl-x86_64.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/chacha-ssse3-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/chacha-ssse3-x86_64.S</a> (renamed from arch/x86/crypto/chacha-ssse3-x86_64.S)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/chacha_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/chacha_glue.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/poly1305-x86_64-cryptogams.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/poly1305-x86_64-cryptogams.pl</a> (renamed from arch/x86/crypto/poly1305-x86_64-cryptogams.pl)</td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/poly1305_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/poly1305_glue.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/sha256-avx-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/sha256-avx-asm.S</a> (renamed from arch/x86/crypto/sha256-avx-asm.S)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/sha256-avx2-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/sha256-avx2-asm.S</a> (renamed from arch/x86/crypto/sha256-avx2-asm.S)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/sha256-ni-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/sha256-ni-asm.S</a> (renamed from arch/x86/crypto/sha256_ni_asm.S)</td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/sha256-ssse3-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/sha256-ssse3-asm.S</a> (renamed from arch/x86/crypto/sha256-ssse3-asm.S)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/arch/x86/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crypto/sha256.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/delay.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/delay.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/insn-eval.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/insn-eval.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/insn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/insn.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/iomem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/iomem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/kaslr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/kaslr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/memcpy_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/memcpy_64.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/memset_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/memset_64.S</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/msr-smp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/msr-smp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/msr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/msr.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/retpoline.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/retpoline.S</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/string_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/string_32.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/strstr_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/strstr_32.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/usercopy_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/usercopy_32.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/lib/x86-opcode-map.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/x86-opcode-map.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/math-emu/fpu_aux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/math-emu/fpu_aux.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/math-emu/fpu_entry.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/math-emu/fpu_entry.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/math-emu/fpu_system.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/math-emu/fpu_system.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/amdtopology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/amdtopology.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/extable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/extable.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/fault.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/fault.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/init.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/init_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/init_32.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/init_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/init_64.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/mem_encrypt_amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/mem_encrypt_amd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/mm_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/mm_internal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/numa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/mm/numa_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa_32.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/mm/numa_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa_64.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/arch/x86/mm/numa_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa_internal.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/pat/memtype.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pat/memtype.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/pat/set_memory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pat/set_memory.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/pgtable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pgtable.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/pti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pti.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/mm/tlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/tlb.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/net/bpf_jit_comp.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/pci/amd_bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/pci/amd_bus.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/pci/fixup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/pci/fixup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/pci/mmconfig-shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/pci/mmconfig-shared.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/efi/efi_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/efi/efi_64.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/olpc/olpc-xo1-rtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/olpc/olpc-xo1-rtc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/olpc/olpc-xo1-sci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/olpc/olpc-xo1-sci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/platform/pvh/head.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/pvh/head.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/power/cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/cpu.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/power/hibernate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/hibernate.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/power/hibernate_asm_32.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/hibernate_asm_32.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/power/hibernate_asm_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/hibernate_asm_64.S</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/realmode/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/realmode/init.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/tools/gen-insn-attr-x86.awk?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/tools/gen-insn-attr-x86.awk</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/um/shared/sysdep/faultinfo_32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/um/shared/sysdep/faultinfo_32.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/um/shared/sysdep/faultinfo_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/um/shared/sysdep/faultinfo_64.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/virt/svm/sev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/svm/sev.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/virt/vmx/tdx/seamcall.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/seamcall.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/virt/vmx/tdx/tdx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/tdx.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/virt/vmx/tdx/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/tdx.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/virt/vmx/tdx/tdx_global_metadata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/tdx_global_metadata.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/enlighten.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/enlighten.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/enlighten_pv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/enlighten_pv.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/enlighten_pvh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/enlighten_pvh.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/mmu_pv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/mmu_pv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/multicalls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/multicalls.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/pmu.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/setup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/smp_pv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/smp_pv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/suspend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/suspend.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/xen-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/xen-asm.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/x86/xen/xen-ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/xen-ops.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/configs/cadence_csp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/xtensa/configs/cadence_csp_defconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/arch/xtensa/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/xtensa/kernel/perf_event.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bdev.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bfq-iosched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bfq-iosched.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bio-integrity-auto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bio-integrity-auto.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bio-integrity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bio-integrity.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/bio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bio.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-cgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-cgroup.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-crypto-fallback.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-crypto-fallback.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-map.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-map.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-merge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-merge.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq-debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq-debugfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/block/blk-mq-dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq-dma.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq-sched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq-sched.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-mq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-rq-qos.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-rq-qos.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-rq-qos.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-rq-qos.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-settings.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-settings.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-sysfs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-throttle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-throttle.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-throttle.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-throttle.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-wbt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-wbt.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk-zoned.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-zoned.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/blk.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/block/bounce.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bounce.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/elevator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/elevator.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/elevator.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/elevator.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/fops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/fops.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/genhd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/genhd.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/ioctl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/ioprio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/ioprio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/block/mq-deadline.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/mq-deadline.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/842.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/842.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/Kconfig</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/acompress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/acompress.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/adiantum.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/adiantum.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/aead.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aead.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/aegis128-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aegis128-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/aes_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aes_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ahash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ahash.c</a></td><td class='right'>835</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 10.3%;'/><td class='none' style='width: 80.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/akcipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/akcipher.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/algapi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algapi.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/algboss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algboss.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/algif_aead.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algif_aead.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/algif_hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algif_hash.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ansi_cprng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ansi_cprng.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/anubis.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/anubis.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/api.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/arc4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/arc4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/aria_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aria_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/public_key.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/asymmetric_keys/public_key.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/asymmetric_keys/x509_cert_parser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/asymmetric_keys/x509_cert_parser.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/authenc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/authenc.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/authencesn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/authencesn.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/blake2b_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/blake2b_generic.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/blowfish_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/blowfish_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/camellia_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/camellia_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/cast5_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cast5_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/cast6_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cast6_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/cbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cbc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ccm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ccm.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/crypto/chacha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/chacha.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/chacha20poly1305.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/chacha20poly1305.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/crypto/chacha_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/chacha_generic.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/cmac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cmac.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/crypto/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crc32.c</a> (renamed from crypto/crc32_generic.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/crypto/crc32c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crc32c.c</a> (renamed from crypto/crc32c_generic.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/cryptd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cryptd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/crypto_engine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crypto_engine.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/crypto_null.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crypto_null.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ctr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/cts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/curve25519-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/curve25519-generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/deflate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/deflate.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/des_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/des_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/dh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/dh.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/drbg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/drbg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecdh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdh.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecdsa-p1363.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdsa-p1363.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecdsa-x962.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdsa-x962.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecdsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdsa.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/echainiv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/echainiv.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ecrdsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecrdsa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/essiv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/essiv.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/fcrypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/fcrypt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/fips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/fips.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/gcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/gcm.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/geniv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/geniv.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/ghash-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ghash-generic.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/hctr2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/hctr2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/hkdf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/hkdf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/hmac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/hmac.c</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/internal.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/kdf_sp800108.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/kdf_sp800108.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/khazad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/khazad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/kpp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/kpp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/krb5/rfc3961_simplified.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/krb5/rfc3961_simplified.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/krb5enc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/krb5enc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/lrw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lrw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/lskcipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lskcipher.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/lz4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lz4.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/lz4hc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lz4hc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/lzo-rle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lzo-rle.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/lzo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lzo.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/md4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/md4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/md5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/md5.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/michael_mic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/michael_mic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/nhpoly1305.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/nhpoly1305.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/pcbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/pcbc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/pcrypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/pcrypt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/crypto/poly1305_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/poly1305_generic.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/polyval-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/polyval-generic.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/rmd160.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rmd160.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rng.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/rsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rsa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/rsassa-pkcs1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rsassa-pkcs1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/scatterwalk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/scatterwalk.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/scompress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/scompress.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/seed.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/seed.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/seqiv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/seqiv.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/serpent_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/serpent_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/sha1_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha1_generic.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha256.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/crypto/sha256_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha256_generic.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/sha3_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha3_generic.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/sha512_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha512_generic.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/shash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/shash.c</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/sig.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sig.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/skcipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/skcipher.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/sm3_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sm3_generic.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/sm4_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sm4_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/streebog_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/streebog_generic.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/tcrypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/tcrypt.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/tcrypt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/tcrypt.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/tea.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/tea.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/testmgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/testmgr.c</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/testmgr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/testmgr.h</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/twofish_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/twofish_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/wp512.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/wp512.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/xcbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xcbc.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/xctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xctr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/xts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xts.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/xxhash_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xxhash_generic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/crypto/zstd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/zstd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/TODO?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/TODO</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/aie2_ctx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/aie2_ctx.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/aie2_message.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/aie2_message.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/aie2_msg_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/aie2_msg_priv.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/amdxdna_ctx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_ctx.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/amdxdna_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_gem.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/amdxdna_gem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_gem.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/amdxdna_pci_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_pci_drv.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/amdxdna/amdxdna_pci_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_pci_drv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/habanalabs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/habanalabs/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/habanalabs/common/habanalabs_ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/habanalabs/common/habanalabs_ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_drv.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_drv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_fw.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_fw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_fw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_gem.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_hw_btrs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw_btrs.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_hw_btrs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw_btrs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_ipc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_ipc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_job.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_job.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_ms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_ms.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_pm.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/ivpu_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_sysfs.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/vpu_boot_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/vpu_boot_api.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/ivpu/vpu_jsm_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/vpu_jsm_api.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/qaic/qaic_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/qaic/qaic_data.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/accel/qaic/qaic_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/qaic/qaic_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpi_extlog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_extlog.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpi_lpit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_lpit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/acpi/acpi_mrrm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_mrrm.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpi_pad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_pad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpi_pcc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_pcc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acapps.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acapps.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/accommon.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/accommon.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acconvert.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acconvert.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acdebug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acdebug.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acdispat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acdispat.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acevents.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acevents.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acglobal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acglobal.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/achware.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/achware.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acinterp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acinterp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/aclocal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/aclocal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acmacros.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acmacros.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acnamesp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acnamesp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acobject.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acobject.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acopcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acopcode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acparser.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acparser.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acpredef.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acpredef.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acresrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acresrc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acstruct.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acstruct.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/actables.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/actables.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/acutils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acutils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/amlcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/amlcode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/amlresrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/amlresrc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dbhistry.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dbhistry.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsargs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsargs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dscontrol.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dscontrol.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsdebug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsdebug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsfield.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsfield.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsmethod.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsmethod.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsmthdat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsmthdat.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsobject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsobject.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsopcode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsopcode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dspkginit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dspkginit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dsutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsutils.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dswexec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswexec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dswload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswload.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dswload2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswload2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dswscope.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswscope.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/dswstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswstate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evevent.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evevent.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evglock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evglock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evgpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evgpeblk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpeblk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evgpeinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpeinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evgpeutil.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpeutil.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evhandler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evhandler.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evmisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evmisc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evregion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evregion.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evrgnini.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evrgnini.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evxfevnt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxfevnt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evxfgpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxfgpe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/evxfregn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxfregn.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exconcat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exconcat.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exconfig.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exconfig.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exconvrt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exconvrt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/excreate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/excreate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exdebug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exdebug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exdump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exdump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exfield.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exfield.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exfldio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exfldio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exmisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exmisc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exmutex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exmutex.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exnames.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exnames.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exoparg1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exoparg2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exoparg3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exoparg6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg6.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exprep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exprep.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exregion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exregion.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exresnte.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exresnte.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exresolv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exresolv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exresop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exresop.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exserial.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exserial.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exstore.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exstore.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exstoren.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exstoren.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exstorob.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exstorob.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exsystem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exsystem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/extrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/extrace.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/exutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exutils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwacpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwacpi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwesleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwesleep.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwgpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwgpe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwsleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwsleep.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwtimer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwtimer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwvalid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwvalid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwxface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/hwxfsleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwxfsleep.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsarguments.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsarguments.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsconvert.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsconvert.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsdump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsdump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsdumpdv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsdumpdv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsload.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsnames.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsnames.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsparse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsparse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nspredef.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nspredef.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsprepkg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsprepkg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsrepair.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsrepair.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsrepair2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsrepair2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsutils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nswalk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nswalk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/nsxfname.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsxfname.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psargs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psargs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psloop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psloop.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psobject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psobject.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psopcode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psopcode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psopinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psopinfo.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psparse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psparse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psscope.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psscope.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/pstree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/pstree.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psutils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/pswalk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/pswalk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/psxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psxface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/rsaddr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/rsaddr.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/rscalc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/rscalc.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/rslist.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/rslist.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbdata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbdata.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbfadt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbfadt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbfind.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbfind.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbinstal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbinstal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbprint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbprint.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbutils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbxface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbxfload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbxfload.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/tbxfroot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbxfroot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utaddress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utaddress.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utalloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utalloc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utascii.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utascii.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utbuffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utbuffer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utcache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utcache.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utcksum.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utcksum.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utcopy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utcopy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utdebug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utdebug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utdecode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utdecode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utdelete.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utdelete.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/uteval.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/uteval.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utglobal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utglobal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/uthex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/uthex.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utids.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utids.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utlock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utlock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utnonansi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utnonansi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utobject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utobject.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utosi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utosi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utpredef.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utpredef.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utprint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utprint.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utresrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utresrc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/uttrack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/uttrack.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utuuid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utuuid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utxface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/acpica/utxfinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utxfinit.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/apei/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/apei/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/apei/einj-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/apei/einj-core.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/apei/ghes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/apei/ghes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/battery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/battery.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/bus.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/button.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/button.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/cppc_acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/cppc_acpi.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/ec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/ec.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/osi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/osi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/pci_root.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/pci_root.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/platform_profile.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/platform_profile.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/pptt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/pptt.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/processor_idle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/processor_idle.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/processor_perflib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/processor_perflib.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/processor_throttling.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/processor_throttling.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/resource.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/tables.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/tables.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/thermal.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/acpi/viot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/viot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/android/binder.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/android/binder.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/android/binderfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/android/binderfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/libata-sata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/libata-sata.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/libata-scsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/libata-scsi.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/pata_pxa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/pata_pxa.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ata/sata_sx4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/sata_sx4.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/arch_topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/arch_topology.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/auxiliary.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/auxiliary.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/base.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/bus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/component.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/component.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/core.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/cpu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/dd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/dd.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/devres.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/devres.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/devtmpfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/devtmpfs.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/faux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/faux.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/firmware_loader/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/firmware_loader/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/firmware_loader/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/firmware_loader/main.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/memory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/memory.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/module.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/module.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/node.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/node.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/platform-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/platform-msi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/platform.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/power/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/main.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/power/runtime.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/runtime.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/power/sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/sysfs.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/power/wakeup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/wakeup.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/power/wakeup_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/wakeup_stats.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/regmap/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regcache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/regmap/regcache.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/regmap/regmap-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/regmap/regmap-irq.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/swnode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/swnode.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/base/topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/topology.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bcma/driver_gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bcma/driver_gpio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/brd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/brd.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/drbd/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/drbd/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/loop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/loop.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/null_blk/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/null_blk/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/pktcdvd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/pktcdvd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/rnbd/rnbd-srv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/rnbd/rnbd-srv.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/ublk_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/ublk_drv.c</a></td><td class='right'>1187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.2%;'/><td class='rem' style='width: 10.1%;'/><td class='none' style='width: 72.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/block/virtio_blk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/virtio_blk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/block/zloop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/zloop.c</a></td><td class='right'>1385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 31.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 68.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel_pcie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel_pcie.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btintel_pcie.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel_pcie.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btmrvl_sdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btmrvl_sdio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btmtksdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btmtksdio.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btnxpuart.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btnxpuart.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btqca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btqca.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btrtl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btrtl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/btusb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btusb.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_aml.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/hci_aml.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bluetooth/hci_vhci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/hci_vhci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/bus/moxtet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bus/moxtet.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cdrom/cdrom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cdrom/cdrom.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/agp/amd64-agp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/agp/amd64-agp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/agp/intel-gtt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/agp/intel-gtt.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/agp/nvidia-agp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/agp/nvidia-agp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/hw_random/atmel-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/atmel-rng.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/hw_random/mtk-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/mtk-rng.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/hw_random/npcm-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/npcm-rng.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/hw_random/rockchip-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/rockchip-rng.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_msghandler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_msghandler.c</a></td><td class='right'>761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 8.3%;'/><td class='none' style='width: 82.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_si.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_si_intf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_intf.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_si_parisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_parisc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_si_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_pci.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_si_platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_platform.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_ssif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_ssif.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/ipmi/ipmi_watchdog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_watchdog.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/mem.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/misc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/random.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/random.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/eventlog/tpm1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/eventlog/tpm1.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm-buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm-buf.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm2-sessions.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm2-sessions.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm_crb_ffa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm_crb_ffa.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm_svsm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm_svsm.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/tpm/tpm_tis_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm_tis_core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/char/virtio_console.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/virtio_console.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/clk-s2mps11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/clk-s2mps11.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/rockchip/clk-rk3576.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/rockchip/clk-rk3576.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/sunxi-ng/ccu-sun20i-d1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/sunxi-ng/ccu-sun20i-d1.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clk/sunxi-ng/ccu_mp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/sunxi-ng/ccu_mp.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/i8253.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/i8253.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/renesas-ostm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/renesas-ostm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/clocksource/timer-econet-en751221.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/timer-econet-en751221.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/clocksource/timer-nxp-stm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/timer-nxp-stm.c</a></td><td class='right'>495</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/clocksource/timer-tegra186.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/timer-tegra186.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/comedi/drivers/jr3_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/comedi/drivers/jr3_pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/Kconfig.arm?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/Kconfig.arm</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/acpi-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/acpi-cpufreq.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/amd-pstate-ut.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd-pstate-ut.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/amd-pstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd-pstate.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/amd-pstate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd-pstate.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/amd_freq_sensitivity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd_freq_sensitivity.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/apple-soc-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/apple-soc-cpufreq.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cppc_cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cppc_cpufreq.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cpufreq-dt-platdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cpufreq-dt-platdev.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cpufreq.c</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/cpufreq_ondemand.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cpufreq_ondemand.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/e_powersaver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/e_powersaver.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/elanfreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/elanfreq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/freq_table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/freq_table.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/intel_pstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/intel_pstate.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/longhaul.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/longhaul.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/powernow-k7.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/powernow-k7.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/sc520_freq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/sc520_freq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/scmi-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/scmi-cpufreq.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/scpi-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/scpi-cpufreq.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpufreq/sun50i-cpufreq-nvmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/sun50i-cpufreq-nvmem.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/cpuidle-psci-domain.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/cpuidle-psci-domain.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/cpuidle-psci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/cpuidle-psci.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/cpuidle-psci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/cpuidle-psci.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/governors/menu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/governors/menu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cpuidle/governors/teo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/governors/teo.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/amcc/crypto4xx_alg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/amcc/crypto4xx_alg.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/amcc/crypto4xx_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/amcc/crypto4xx_core.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/amcc/crypto4xx_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/amcc/crypto4xx_core.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/atmel-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-aes.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/atmel-sha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-sha.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/atmel-sha204a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-sha204a.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/atmel-tdes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-tdes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/caam/ctrl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/caam/ctrl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/caam/qi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/caam/qi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/cavium/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/crypto/cavium/zip/zip_mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_mem.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/crypto/cavium/zip/zip_mem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_mem.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/crypto/cavium/zip/zip_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_regs.h</a></td><td class='right'>1347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 30.9%;'/><td class='none' style='width: 69.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/ccp/ccp-crypto-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-crypto-aes.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/ccp/ccp-crypto-des3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-crypto-des3.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/ccp/ccp-crypto-main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-crypto-main.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/ccp/ccp-ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-ops.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/ccp/sev-dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/sev-dev.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/ccp/sp-pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/sp-pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/hisilicon/qm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/hisilicon/qm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/img-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/img-hash.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/inside-secure/eip93/eip93-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/inside-secure/eip93/eip93-hash.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/inside-secure/safexcel_hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/inside-secure/safexcel_hash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/iaa/iaa_crypto_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/iaa/iaa_crypto_main.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_420xx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_420xx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_420xx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_420xx/adf_drv.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_4xxx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_4xxx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_4xxx/adf_drv.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_6xxx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_6xxx/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c</a></td><td class='right'>845</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_6xxx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_6xxx/adf_drv.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c3xxx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c3xxxvf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxxvf/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c62x/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62x/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c62x/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62x/adf_drv.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c62xvf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62xvf/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_accel_devices.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_admin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_admin.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_cfg_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_cfg_common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_cfg_services.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_cfg_services.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_cfg_services.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_cfg_services.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_dc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_dc.c</a> (renamed from drivers/crypto/intel/qat/qat_common/adf_gen2_dc.c)</td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_dc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_dc.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_fw_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_fw_config.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_dc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_dc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_config.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_config.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_dc.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_dc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen6_pm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen6_pm.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c</a></td><td class='right'>818</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen6_ras.h</a></td><td class='right'>504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen6_shared.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen6_shared.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_timer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_timer.c</a> (renamed from drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/adf_timer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_timer.h</a> (renamed from drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp_defs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp_defs.h</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_comp_algs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_comp_algs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_compression.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_compression.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_compression.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_compression.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_hal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_hal.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_common/qat_uclo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_uclo.c</a></td><td class='right'>449</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_dh895xcc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xcc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_dh895xccvf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xccvf/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/cesa/cesa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/cesa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/cesa/cesa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/cesa.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/cesa/cipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/cipher.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/cesa/hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/hash.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/cesa/tdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/tdma.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/cn10k_cpt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/cn10k_cpt.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/cn10k_cpt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/cn10k_cpt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cpt_common.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cptlf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptlf.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cptlf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptlf.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-aes-cbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-cbc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-aes-ctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-ctr.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-aes-ecb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-ecb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-aes-xcbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-xcbc.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-sha256.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx-sha512.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-sha512.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/nx/nx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/omap-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/omap-aes.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/omap-sham.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/omap-sham.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/padlock-sha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/padlock-sha.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/rockchip/rk3288_crypto_ahash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/rockchip/rk3288_crypto_ahash.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/s5p-sss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/s5p-sss.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/sa2ul.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/sa2ul.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/tegra-se-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/tegra/tegra-se-aes.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/tegra/tegra-se-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/tegra/tegra-se-hash.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/crypto/xilinx/zynqmp-sha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/xilinx/zynqmp-sha.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/core/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/core/features.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/features.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/core/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/pci.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/core/port.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/port.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/core/regs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/regs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/cxl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/cxl.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/cxl/pmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/pmem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/dma-buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/dma-buf.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/dma-fence-unwrap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/dma-fence-unwrap.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/dma-resv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/dma-resv.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/heaps/system_heap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/heaps/system_heap.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/st-dma-fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/st-dma-fence.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/sw_sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/sw_sync.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/sync_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/sync_debug.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/sync_debug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/sync_debug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma-buf/udmabuf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/udmabuf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/amd/ptdma/ptdma-dmaengine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/amd/ptdma/ptdma-dmaengine.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/dmatest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/dmatest.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/fsl-edma-main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/fsl-edma-main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/cdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/idxd/cdev.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/idxd/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/idxd/init.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/ioat/dca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/ioat/dca.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/mediatek/mtk-cqdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/mediatek/mtk-cqdma.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/dma/ti/k3-udma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/ti/k3-udma.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/altera_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/altera_edac.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/altera_edac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/altera_edac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/amd64_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/amd64_edac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/bluefield_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/bluefield_edac.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/i10nm_base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/i10nm_base.c</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/ie31200_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/ie31200_edac.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/igen6_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/igen6_edac.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/mce_amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/mce_amd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/skx_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/skx_common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/edac/skx_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/skx_common.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firewire/core-transaction.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firewire/core-transaction.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_ffa/driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_ffa/driver.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_scmi/bus.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_scmi/driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_scmi/driver.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/arm_sdei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_sdei.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/cirrus/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_mock_bin.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/cirrus/test/cs_dsp_test_bin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_test_bin.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/efi/efi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/efi/efi.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/efi/libstub/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/efi/libstub/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/efi/libstub/x86-5lvl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/efi/libstub/x86-5lvl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/psci/psci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/psci/psci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/psci/psci_checker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/psci/psci_checker.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/samsung/exynos-acpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/samsung/exynos-acpm.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/smccc/kvm_guest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/smccc/kvm_guest.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/stratix10-svc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/stratix10-svc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/firmware/sysfb_simplefb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/sysfb_simplefb.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/fpga/tests/fpga-bridge-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fpga/tests/fpga-bridge-test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/fpga/tests/fpga-mgr-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fpga/tests/fpga-mgr-test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/fpga/tests/fpga-region-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fpga/tests/fpga-region-test.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/fwctl/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fwctl/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/fwctl/pds/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fwctl/pds/main.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/Kconfig</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/TODO?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/TODO</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-aggregator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-aggregator.c</a></td><td class='right'>1104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.6%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 74.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-bcm-kona.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-bcm-kona.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-blzp1600.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-blzp1600.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-brcmstb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-brcmstb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-davinci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-davinci.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-dln2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-dln2.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-ds4520.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ds4520.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-eic-sprd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-eic-sprd.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-em.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-em.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-exar.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-exar.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-f7188x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-f7188x.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-graniterapids.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-graniterapids.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-grgpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-grgpio.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-gw-pld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-gw-pld.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-htc-egpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-htc-egpio.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-ich.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ich.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-idt3243x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-idt3243x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-imx-scu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-imx-scu.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-it87.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-it87.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-janz-ttl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-janz-ttl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-kempld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-kempld.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-ljca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ljca.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-logicvc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-logicvc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-loongson-64bit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-loongson-64bit.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-loongson.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-loongson.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-lp3943.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lp3943.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-lp873x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lp873x.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-lp87565.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lp87565.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-lpc18xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lpc18xx.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-lpc32xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lpc32xx.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-madera.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-madera.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-max3191x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max3191x.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-max730x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max730x.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-max732x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max732x.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-max77620.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max77620.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-max77759.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max77759.c</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-mb86s7x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mb86s7x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-mc33880.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mc33880.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-ml-ioh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ml-ioh.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-mpc8xxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mpc8xxx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-mvebu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mvebu.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-mxc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mxc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-mxs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mxs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-pca953x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-pca953x.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-pxa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-pxa.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-rockchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-rockchip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-sa1100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-sa1100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-sodaville.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-sodaville.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-spacemit-k1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-spacemit-k1.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-tb10x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-tb10x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-tegra186.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-tegra186.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-timberdale.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-timberdale.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-twl4030.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-twl4030.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-vf610.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-vf610.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-virtuser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-virtuser.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-xgene-sb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-xgene-sb.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpio-zynq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-zynq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-acpi-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-acpi-core.c</a> (renamed from drivers/gpio/gpiolib-acpi.c)</td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 9.6%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-acpi-quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-acpi-quirks.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-acpi.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-cdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-cdev.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-devres.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-devres.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-of.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-of.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-of.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-of.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib-sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-sysfs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpio/gpiolib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/Kconfig</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/Kconfig.debug?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/Kconfig.debug</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/adp/adp-mipi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/adp/adp-mipi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/adp/adp_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/adp/adp_drv.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</a></td><td class='right'>538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_job.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c</a></td><td class='right'>1106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 24.1%;'/><td class='none' style='width: 74.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c</a></td><td class='right'>924</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c</a></td><td class='right'>968</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/atom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/atom.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/atombios_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/atombios_dp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/cik_sdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/cik_sdma.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/cikd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/cikd.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v6_0.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c</a></td><td class='right'>744</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.5%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 82.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c</a></td><td class='right'>622</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 85.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/ih_v6_0.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mes_userqueue.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mes_userqueue.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mes_userqueue.h</a> (renamed from drivers/gpu/drm/nouveau/nvkm/engine/ofa/ad102.c)</td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mes_v11_0.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mes_v12_0.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mmsch_v5_0.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mmsch_v5_0.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v11_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v12_0.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v13_0.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v14_0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/si.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/si_dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si_dma.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/si_enums.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si_enums.h</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/si_ih.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si_ih.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/sid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sid.h</a></td><td class='right'>1555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 33.3%;'/><td class='none' style='width: 64.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/soc15.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/soc15.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/soc15d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/soc15d.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vega20_ih.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vega20_ih.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdgpu/vi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_device.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_events.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_events.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_priv.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_process.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_queue.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_svm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_svm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/amdkfd/kfd_topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_topology.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c</a></td><td class='right'>806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 9.1%;'/><td class='none' style='width: 81.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/Makefile</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/bios/bios_parser.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_resource.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_state.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_state.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_stream.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_stream.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/core/dc_surface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_surface.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc.h</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_dp_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_dp_types.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_fused_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_fused_io.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_fused_io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_fused_io.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_helper.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_plane.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_plane.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_state_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_state_priv.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_stream.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_stream.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dc_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_types.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce60/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce60/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dm_helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dm_helpers.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c</a></td><td class='right'>4346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 49.1%;'/><td class='rem' style='width: 50.7%;'/><td class='none' style='width: 0.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/core_status.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/core_status.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/core_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/core_types.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/hw/optc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/link.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/link.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/reg_helper.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/inc/resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/resource.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/irq_service.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/irq_service.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq/irq_service.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/irq_service.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/irq_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq_types.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/link_detection.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/link_detection.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/link_dpms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/link_dpms.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/link_factory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/link_factory.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c</a> (renamed from drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.h</a> (renamed from drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/dmub_srv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/dmub_srv.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/include/gpio_service_interface.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/include/gpio_service_interface.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/include/link_service_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/include/link_service_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/amd_shared.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/amd_shared.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/atombios.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/atombios.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/atomfirmware.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/atomfirmware.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/kgd_pp_interface.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/kgd_pp_interface.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/v11_structs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/v11_structs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/include/v12_structs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/v12_structs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/amdgpu_dpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/amdgpu_dpm.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/amdgpu_pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/amdgpu_pm.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppatomctrl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/powerplay/smumgr/smu7_smumgr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_cursor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ast/ast_cursor.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ast/ast_drv.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_mm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ast/ast_mm.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_mode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ast/ast_mode.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_post.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ast/ast_post.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ast/ast_reg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ast/ast_reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/adv7511/adv7511_drv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/analogix/analogix-anx6345.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/analogix/analogix_dp_core.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/analogix/analogix_dp_core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/analogix/anx7625.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/analogix/anx7625.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/aux-bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/aux-bridge.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/aux-hpd-bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/aux-hpd-bridge.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/cadence/cdns-dsi-core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/chipone-icn6211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/chipone-icn6211.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/chrontel-ch7033.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/chrontel-ch7033.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/display-connector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/display-connector.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/fsl-ldb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/fsl-ldb.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx-ldb-helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx-ldb-helper.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx-ldb-helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx-ldb-helper.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx-legacy-bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx-legacy-bridge.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8qm-ldb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx8qm-ldb.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx8qxp-ldb.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ite-it6263.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ite-it6263.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ite-it6505.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ite-it6505.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ite-it66121.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ite-it66121.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lontium-lt8912b.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/lontium-lt8912b.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lontium-lt9211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/lontium-lt9211.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lontium-lt9611.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/lontium-lt9611.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lontium-lt9611uxc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/lontium-lt9611uxc.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/lvds-codec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/lvds-codec.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/megachips-stdpxxxx-ge-b850v3-fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/megachips-stdpxxxx-ge-b850v3-fw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/microchip-lvds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/microchip-lvds.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/nwl-dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/nwl-dsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/nxp-ptn3460.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/nxp-ptn3460.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/panel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/panel.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/parade-ps8622.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/parade-ps8622.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/parade-ps8640.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/parade-ps8640.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/samsung-dsim.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/samsung-dsim.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/sii902x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/sii902x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/sil-sii8620.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/sil-sii8620.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/simple-bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/simple-bridge.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/synopsys/dw-hdmi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi2.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tc358762.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/tc358762.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tc358764.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/tc358764.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tc358767.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/tc358767.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tc358768.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/tc358768.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tc358775.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/tc358775.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/tda998x_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/tda998x_drv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/thc63lvd1024.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/thc63lvd1024.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-dlpc3433.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ti-dlpc3433.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-sn65dsi83.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ti-sn65dsi83.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-sn65dsi86.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ti-sn65dsi86.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-tdp158.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ti-tdp158.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-tfp410.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ti-tfp410.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/bridge/ti-tpd12s015.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/bridge/ti-tpd12s015.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/arm64.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/arm64.config</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/build-igt.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/build-igt.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/build.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/build.sh</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/build.yml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/build.yml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/container.yml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/container.yml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/gitlab-ci.yml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/gitlab-ci.yml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/igt_runner.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/igt_runner.sh</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/image-tags.yml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/image-tags.yml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/lava-submit.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/lava-submit.sh</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/test.yml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/test.yml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/amdgpu-stoney-fails.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/amdgpu-stoney-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-amly-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-amly-fails.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-amly-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-amly-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-apl-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-apl-fails.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-apl-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-apl-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-cml-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-cml-fails.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-cml-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-cml-skips.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-glk-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-glk-fails.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-glk-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-glk-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-jsl-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-jsl-fails.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-jsl-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-jsl-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-kbl-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-kbl-fails.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-kbl-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-tgl-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-tgl-fails.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-tgl-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-whl-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-whl-fails.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/i915-whl-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/i915-whl-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/mediatek-mt8173-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/mediatek-mt8173-fails.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/mediatek-mt8173-flakes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/mediatek-mt8173-flakes.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/mediatek-mt8173-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/mediatek-mt8173-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/mediatek-mt8183-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/mediatek-mt8183-fails.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/mediatek-mt8183-flakes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/mediatek-mt8183-flakes.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/mediatek-mt8183-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/mediatek-mt8183-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/meson-g12b-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-apq8016-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-apq8016-fails.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-apq8016-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-apq8096-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-apq8096-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-kingoftown-flakes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-kingoftown-flakes.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-kingoftown-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-kingoftown-skips.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-lazor-limozeen-flakes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-lazor-limozeen-flakes.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-lazor-limozeen-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-sc7180-trogdor-lazor-limozeen-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-sdm845-flakes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-sdm845-flakes.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-sdm845-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-sdm845-skips.txt</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/msm-sm8350-hdk-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/msm-sm8350-hdk-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/panfrost-g12b-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/panfrost-g12b-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/panfrost-mt8183-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/panfrost-mt8183-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/panfrost-rk3288-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/panfrost-rk3288-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/panfrost-rk3399-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/panfrost-rk3399-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/rockchip-rk3288-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/rockchip-rk3288-fails.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/rockchip-rk3288-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/rockchip-rk3288-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/rockchip-rk3399-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/rockchip-rk3399-fails.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/rockchip-rk3399-flakes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/rockchip-rk3399-flakes.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/rockchip-rk3399-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/rockchip-rk3399-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/virtio_gpu-none-fails.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/virtio_gpu-none-fails.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/virtio_gpu-none-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/virtio_gpu-none-skips.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/vkms-none-flakes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/vkms-none-flakes.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ci/xfails/vkms-none-skips.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ci/xfails/vkms-none-skips.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_bridge_connector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/display/drm_bridge_connector.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_cec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/display/drm_dp_cec.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/display/drm_dp_helper.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_mst_topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/display/drm_dp_mst_topology.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_dp_tunnel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/display/drm_dp_tunnel.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_hdmi_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/display/drm_hdmi_helper.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/display/drm_hdmi_state_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/display/drm_hdmi_state_helper.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_atomic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_atomic.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_atomic_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_atomic_helper.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_blend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_blend.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_bridge.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_bridge_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_bridge_helper.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_client.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_client.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_client_modeset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_client_modeset.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_crtc_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_crtc_helper.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_debugfs.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_displayid_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_displayid_internal.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_draw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_draw.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_drv.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_edid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_edid.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_file.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_format_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_format_helper.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_format_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_format_internal.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_gem.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gem_framebuffer_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_gem_framebuffer_helper.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gem_shmem_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_gem_shmem_helper.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_gpusvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_gpusvm.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_internal.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_mipi_dbi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_mipi_dbi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_mipi_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_mipi_dsi.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_mode_config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_mode_config.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_panel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_panel.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_panel_orientation_quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_panel_orientation_quirks.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_panic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_panic.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_panic_qr.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_panic_qr.rs</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_plane.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_prime.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_prime.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_probe_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_probe_helper.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/drm_syncobj.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/drm_syncobj.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/etnaviv/etnaviv_gem_prime.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos7_drm_decon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/exynos/exynos7_drm_decon.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/exynos/exynos_drm_drv.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_fimc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/exynos/exynos_drm_fimc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_fimd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/exynos/exynos_drm_fimd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_mic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/exynos/exynos_drm_mic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/exynos/exynos_drm_vidi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/exynos/exynos_drm_vidi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gma500/mmu.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gma500/mmu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/oaktrail_crtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gma500/oaktrail_crtc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/psb_intel_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gma500/psb_intel_drv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gma500/psb_intel_modes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gma500/psb_intel_modes.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gud/gud_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gud/gud_drv.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gud/gud_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gud/gud_internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/gud/gud_pipe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/gud/gud_pipe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_aux.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_comm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_config.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_reg.h</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_debugfs.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/dvo_ch7017.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/dvo_ch7017.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/dvo_ch7xxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/dvo_ch7xxx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/dvo_ivch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/dvo_ivch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/dvo_ns2501.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/dvo_ns2501.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/dvo_sil164.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/dvo_sil164.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/dvo_tfp410.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/dvo_tfp410.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/g4x_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/g4x_dp.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/g4x_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/g4x_hdmi.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/hsw_ips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/hsw_ips.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/i9xx_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/i9xx_plane.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/i9xx_wm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/i9xx_wm.c</a></td><td class='right'>1222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.0%;'/><td class='rem' style='width: 14.1%;'/><td class='none' style='width: 71.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/i9xx_wm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/i9xx_wm.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/icl_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/icl_dsi.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_alpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_alpm.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_alpm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_alpm.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_atomic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_atomic.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_atomic_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_atomic_plane.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_atomic_plane.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_atomic_plane.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_audio.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_backlight.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_backlight.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_bios.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_bios.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_bios.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_bios.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_bw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_bw.c</a></td><td class='right'>635</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_bw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_bw.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cdclk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_cdclk.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cmtg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_cmtg.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_color.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_color.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_combo_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_combo_phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_connector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_connector.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_crt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_crt.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_crtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_crtc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_crtc_state_dump.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cursor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_cursor.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cx0_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_cx0_phy.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_ddi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_ddi.c</a></td><td class='right'>924</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 10.9%;'/><td class='none' style='width: 78.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_de.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_de.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_core.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_debugfs.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_device.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_device.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_driver.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_irq.c</a></td><td class='right'>969</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 10.8%;'/><td class='none' style='width: 77.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_irq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_irq.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_power.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_power.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_power.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_power_map.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_power_map.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_power_well.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_power_well.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_reset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_reset.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_rpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_rpm.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_rpm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_rpm.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_rps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_rps.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_rps.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_rps.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_snapshot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_snapshot.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_types.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_wa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_wa.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_display_wa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_display_wa.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dkl_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dkl_phy.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dmc.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dmc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dmc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dmc_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dmc_regs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dp.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_aux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dp_aux.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_link_training.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dp_link_training.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_mst.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dp_mst.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dp_mst.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dp_mst.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpio_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dpio_phy.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dpll.c</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpll.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dpll.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpll_mgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dpll_mgr.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dpt.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dpt_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dpt_common.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dsb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dsb.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dsi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dsi_vbt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dsi_vbt.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dvo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dvo.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_dvo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_dvo.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fb_pin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fb_pin.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fbc.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fbdev.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbdev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fbdev.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbdev_fb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fbdev_fb.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fbdev_fb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fbdev_fb.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fdi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fdi.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_fifo_underrun.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_fifo_underrun.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_frontbuffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_frontbuffer.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_frontbuffer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_frontbuffer.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_global_state.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_global_state.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_gmbus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_gmbus.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hdcp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp_gsc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hdcp_gsc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hdmi.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hotplug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hotplug.c</a></td><td class='right'>670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 84.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hotplug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hotplug.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hotplug_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hotplug_irq.c</a></td><td class='right'>672</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 7.8%;'/><td class='none' style='width: 84.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hotplug_irq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hotplug_irq.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_hti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_hti.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_load_detect.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_load_detect.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_lpe_audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_lpe_audio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_lspcon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_lspcon.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_lvds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_lvds.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_lvds.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_lvds.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_modeset_setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_modeset_setup.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_modeset_setup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_modeset_setup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_modeset_verify.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_modeset_verify.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_overlay.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_overlay.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pch.c</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pch.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pch_display.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pch_display.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pch_display.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pch_display.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pch_refclk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pch_refclk.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pch_refclk.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pch_refclk.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pipe_crc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pipe_crc.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_plane_initial.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_plane_initial.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pmdemand.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pmdemand.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_pps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_pps.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_psr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_psr.c</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_psr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_psr.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_sdvo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_sdvo.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_snps_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_snps_phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_sprite.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_sprite.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_sprite_uapi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_sprite_uapi.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_tc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_tc.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_tv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_tv.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vblank.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_vblank.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vdsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_vdsc.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vga.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_vga.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vga.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_vga.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vga_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_vga_regs.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vrr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_vrr.c</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_vrr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_vrr.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_wm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_wm.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/intel_wm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/intel_wm.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_scaler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/skl_scaler.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_universal_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/skl_universal_plane.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_watermark.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/skl_watermark.c</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 9.3%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/skl_watermark.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/skl_watermark.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/vlv_dsi.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dsi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/vlv_dsi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dsi_pll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/vlv_dsi_pll.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/display/vlv_dsi_pll.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/display/vlv_dsi_pll.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_busy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_busy.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_clflush.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_clflush.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_clflush.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_clflush.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_context.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_context.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_context.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_context_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_context_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_domain.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_domain.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_internal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_internal.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_ioctls.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_ioctls.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_lmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_lmem.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_mman.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_mman.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_mman.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_mman.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_object.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_object.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_object.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_object.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_object_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_object_types.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_pages.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_pages.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_phys.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_phys.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_pm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_pm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_pm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_shmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_shmem.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_shrinker.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_stolen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_stolen.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_throttle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_throttle.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_tiling.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_tiling.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_userptr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_userptr.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gem_wait.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gem_wait.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gemfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gemfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/i915_gemfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/i915_gemfs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_ggtt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_ggtt.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_ggtt_gmch.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gtt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_gtt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_gtt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_gtt.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_lrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_lrc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_mocs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_mocs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_rc6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_rc6.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_ring_submission.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_ring_submission.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_rps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_rps.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_rps_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_rps_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_wopcm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_wopcm.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/intel_workarounds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/intel_workarounds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/selftest_lrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/selftest_lrc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/selftest_migrate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/selftest_migrate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/selftest_rc6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/selftest_rc6.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/selftest_tlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/selftest_tlb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_huc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/uc/intel_huc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_huc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/uc/intel_huc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gt/uc/intel_uc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gt/uc/intel_uc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/aperture_gm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gvt/aperture_gm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gvt/debugfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/gtt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gvt/gtt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/gvt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gvt/gvt.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/handlers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gvt/handlers.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/opregion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gvt/opregion.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/gvt/sched_policy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/gvt/sched_policy.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_driver.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_driver.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_driver.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_drv.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_gpu_error.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_gpu_error.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_gpu_error.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_gpu_error.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_irq.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_perf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_perf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_reg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_reg.h</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/i915_utils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/i915_utils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_gvt_mmio_table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/intel_gvt_mmio_table.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_memory_region.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/intel_memory_region.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_memory_region.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/intel_memory_region.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/intel_wakeref.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/intel_wakeref.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/selftests/i915_selftest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/selftests/i915_selftest.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/selftests/lib_sw_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/selftests/lib_sw_fence.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/selftests/librapl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/selftests/librapl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/soc/intel_dram.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/soc/intel_dram.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/soc/intel_pch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/soc/intel_pch.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/i915/soc/intel_pch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/i915/soc/intel_pch.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_debugfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_device.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_device.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_drv.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_free_list.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_free_list.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_meta.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw_meta.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_mips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw_mips.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_riscv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw_riscv.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_startstop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw_startstop.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_trace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw_trace.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_fw_util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_fw_util.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_gem.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_gem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_gem.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_hwrt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_hwrt.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_job.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_job.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_mmu.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_power.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_power.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_power.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_queue.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_rogue_cr_defs.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_rogue_riscv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_rogue_riscv.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_stream.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_stream.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imagination/pvr_vm_mips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imagination/pvr_vm_mips.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/imx/ipuv3/parallel-display.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/imx/ipuv3/parallel-display.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ingenic/ingenic-drm-drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ingenic/ingenic-drm-drv.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/lima/lima_gem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/lima/lima_sched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/lima/lima_sched.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mcde/mcde_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mcde/mcde_dsi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_cec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_cec.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_dp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_dpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_dpi.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_drm_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_drm_drv.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_dsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_hdmi.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_hdmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_hdmi.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/meson/meson_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/meson/meson_drv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_encoder_cvbs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/meson/meson_encoder_cvbs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_encoder_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/meson/meson_encoder_dsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_encoder_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/meson/meson_encoder_hdmi.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_vclk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/meson/meson_vclk.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/meson/meson_vclk.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/meson/meson_vclk.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mgag200/mgag200_mode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mgag200/mgag200_mode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a2xx_catalog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a2xx_catalog.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a3xx_catalog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a3xx_catalog.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a4xx_catalog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a4xx_catalog.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a5xx_catalog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a5xx_catalog.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_catalog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a6xx_catalog.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a6xx_gmu.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a6xx_gmu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_gpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a6xx_gpu.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_hfi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a6xx_hfi.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/a6xx_hfi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/a6xx_hfi.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/adreno_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/adreno_device.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/adreno_gpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/adreno_gpu.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/adreno/adreno_gpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/adreno/adreno_gpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_16_msm8953.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_2_sdm660.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_3_sdm630.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_connector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_connector.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_audio.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_audio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_audio.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_ctrl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_ctrl.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_display.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_display.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_display.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_display.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_drm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_drm.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_link.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_link.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_link.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dp/dp_panel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dp/dp_panel.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_cfg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dsi/dsi_cfg.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_cfg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dsi/dsi_cfg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/dsi_manager.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dsi/dsi_manager.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dsi/phy/dsi_phy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dsi/phy/dsi_phy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/hdmi/hdmi.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/hdmi/hdmi.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi_audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/hdmi/hdmi_audio.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi_bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/hdmi/hdmi_bridge.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/hdmi/hdmi_hpd.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi_i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/hdmi/hdmi_i2c.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/hdmi/hdmi_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/hdmi/hdmi_phy.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/msm_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/msm_gem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/msm_gem.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gem_prime.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/msm_gem_prime.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_gpu_devfreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/msm_gpu_devfreq.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_mdss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/msm_mdss.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/msm_ringbuffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/msm_ringbuffer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mxsfb/lcdif_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mxsfb/lcdif_drv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/mxsfb/mxsfb_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/mxsfb/mxsfb_drv.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv04/crtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv04/crtc.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/Kbuild</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/core.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/core.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/core507d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/core507d.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/corec37d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/corec37d.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/corec57d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/corec57d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/coreca7d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/coreca7d.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/crc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/crc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/crc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/crc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/crcca7d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/crcca7d.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/curs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/curs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/disp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/disp.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/head.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/head.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/head.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/head.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/headc57d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/headc57d.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/headca7d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/headca7d.c</a></td><td class='right'>297</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/wimm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/wimm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/wndw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/wndw.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/wndw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/wndw.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/gv100_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/gv100_fence.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/class/clc36f.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/class/clc36f.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/class/clc97b.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/class/clc97b.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/class/clca7d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/class/clca7d.h</a></td><td class='right'>868</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/class/clca7e.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/class/clca7e.h</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gb100/dev_hshub_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gb100/dev_hshub_base.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gb10b/dev_fbhub.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gb10b/dev_fbhub.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gb202/dev_ce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gb202/dev_ce.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gb202/dev_therm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gb202/dev_therm.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_falcon_v4.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_falcon_v4.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_fb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_fb.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_fsp_pri.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_fsp_pri.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_mmu.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_riscv_pri.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_riscv_pri.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_therm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_therm.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_xtl_ep_pri.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/dev_xtl_ep_pri.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/pri_nv_xal_ep.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvhw/ref/gh100/pri_nv_xal_ep.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvif/chan.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvif/chan.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvif/cl0080.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvif/cl0080.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvif/class.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvif/class.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvif/object.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvif/object.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvif/push.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvif/push.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvif/push906f.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvif/push906f.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvif/pushc97b.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvif/pushc97b.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/core/device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/core/device.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/core/layout.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/engine/nvjpg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/engine/nvjpg.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/engine/ofa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/engine/ofa.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/subdev/fsp.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/subdev/instmem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/subdev/instmem.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl0000.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl0000.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl0005.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl0005.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl0080.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl0080.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl2080.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl2080.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl2080_notification.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl2080_notification.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl84a0.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl84a0.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl90f1.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/cl90f1.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/clc0b5sw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/class/clc0b5sw.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073common.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gpu.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080gr.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bios.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ce.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080event.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fifo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fifo.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gr.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080internal.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl90f1.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl90f1.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/nvlimits.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/nvlimits.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/nvos.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/nvos.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/shared/msgq/inc/msgq/msgq_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/shared/msgq/inc/msgq/msgq_priv.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/uproc/os/common/include/libos_init_args.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/uproc/os/common/include/libos_init_args.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_sr_meta.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_sr_meta.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/gsp/gsp_fw_wpr_meta.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/rmRiscvUcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/rmRiscvUcode.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/rmgspseq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/arch/nvalloc/common/inc/rmgspseq.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_allclasses.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_allclasses.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_chipset_nvoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_chipset_nvoc.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_fbsr_nvoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_fbsr_nvoc.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_gpu_nvoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_gpu_nvoc.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_kernel_channel_nvoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_kernel_channel_nvoc.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_kernel_fifo_nvoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_kernel_fifo_nvoc.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_mem_desc_nvoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_mem_desc_nvoc.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_os_nvoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_os_nvoc.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_rpc-structures.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_rpc-structures.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_sdk-structures.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_sdk-structures.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gpu_acpi_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gpu_acpi_data.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gpu_engine_type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gpu_engine_type.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gsp/gsp_fw_heap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gsp/gsp_fw_heap.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gsp/gsp_init_args.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gsp/gsp_init_args.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/gsp/gsp_static_config.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/intr/engine_idx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/intr/engine_idx.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/nvbitmask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/nvbitmask.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/os/nv_memory_type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/os/nv_memory_type.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/kernel/inc/vgpu/rpc_headers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/kernel/inc/vgpu/rpc_headers.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/kernel/inc/vgpu/sdk-structures.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/kernel/inc/vgpu/sdk-structures.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/include/nvrm/nvtypes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/include/nvrm/nvtypes.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_abi16.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_abi16.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_bo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_bo.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_bo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_bo.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_chan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_chan.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_chan.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_chan.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_connector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_connector.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_dma.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_dma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_dma.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_dmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_dmem.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_drm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_drm.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_exec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_exec.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_fence.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_fence.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_fence.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_gem.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_svm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_svm.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nouveau_ttm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nouveau_ttm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nv10_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nv10_fence.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nv17_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nv17_fence.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nv50_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nv50_fence.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nv84_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nv84_fence.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/Kbuild</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/chan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/chan.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/chan506f.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/chan506f.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/chan906f.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/chan906f.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/chanc36f.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/chanc36f.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/conn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/conn.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/disp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/disp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/outp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/outp.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvif/user.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvif/user.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ce/gb202.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ce/gb202.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ce/priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ce/r535.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ce/r535.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/device/base.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/device/user.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gb202.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/gb202.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/priv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/gr/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/gr/r535.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/gr/r535.c</a></td><td class='right'>508</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.7%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvdec/Kbuild</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvdec/priv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/r535.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvdec/r535.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvdec/tu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvdec/tu102.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ga102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ga102.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/r535.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvenc/r535.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/Kbuild</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ad102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ad102.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ga100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/ga100.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/priv.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/r535.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/nvjpg/r535.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ofa/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ofa/Kbuild</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga100.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ofa/ga102.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ofa/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ofa/priv.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/engine/ofa/r535.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ofa/r535.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/bar/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/bar/Kbuild</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fault/user.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fault/user.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fb/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fb/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gb100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fb/gb100.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gb202.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fb/gb202.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fb/gh100.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fsp/Kbuild</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gb100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gb100.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gb202.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gb202.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fsp/gh100.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/fsp/priv.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/Kbuild</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ad102.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gb100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gb100.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gb202.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gb202.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gh100.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/priv.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/Kbuild</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ad10x.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/client.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/client.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/engine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/engine.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/engine.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/engine.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga100.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/ga1xx.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gb10x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gb10x.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gb20x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gb20x.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gh100.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gpu.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gr.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gr.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/handles.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/handles.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/nvdec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/nvdec.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/nvenc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/nvenc.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/Kbuild</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/alloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/alloc.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/bar.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/subdev/bar/r535.c)</td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ce.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ce.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/client.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/client.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga100.c)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ctrl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ctrl.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/device.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c)</td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fbsr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fbsr.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/subdev/instmem/r535.c)</td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/fifo.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/engine/fifo/r535.c)</td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gr.c</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c)</td><td class='right'>1559</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 31.8%;'/><td class='none' style='width: 64.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvdec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvdec.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/engine/nvenc/ad102.c)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvenc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvenc.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/engine/gr/ad102.c)</td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvjpg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvjpg.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/alloc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/alloc.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/bar.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/bar.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/ce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/ce.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/client.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/client.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/ctrl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/ctrl.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/device.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/disp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/disp.h</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/engine.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/engine.h</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/event.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fbsr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fbsr.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/fifo.h</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gr.h</a> (renamed from drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/ctrl/ctrl0080/ctrl0080fifo.h)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/gsp.h</a></td><td class='right'>825</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/msgfn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/msgfn.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/nvdec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/nvdec.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/nvenc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/nvenc.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/nvjpg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/nvjpg.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/ofa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/ofa.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/rpcfn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/rpcfn.h</a> (renamed from drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/kernel/inc/vgpu/rpc_global_enums.h)</td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/nvrm/vmm.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ofa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/ofa.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ad102.c)</td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rm.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c</a></td><td class='right'>691</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/vmm.c</a> (renamed from drivers/gpu/drm/nouveau/nvkm/subdev/mmu/r535.c)</td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/Kbuild</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/client.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/client.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/disp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/disp.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/fbsr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/fbsr.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/fifo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/fifo.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/gr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/gr.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/gsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/gsp.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/client.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/client.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/disp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/disp.h</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/engine.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/engine.h</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fbsr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fbsr.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/fifo.h</a> (renamed from drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/sdk/nvidia/inc/alloc/alloc_channel.h)</td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gr.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/gsp.h</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/msgfn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/msgfn.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/ofa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/ofa.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/rpcfn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/rpcfn.h</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/ofa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/ofa.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/rm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/rm.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rm.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/rpc.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/tu1xx.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu102.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/gsp/tu116.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/instmem/Kbuild</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gh100.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/instmem/priv.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gh100.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memgf100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memgf100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv04.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv04.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv50.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv50.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/gh100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/gh100.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/gp100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/gp100.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv46.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv46.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/vfn/r535.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/vfn/r535.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nouveau/nvkm/subdev/vfn/uvfn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/subdev/vfn/uvfn.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nova/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nova/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nova/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nova/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nova/driver.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nova/driver.rs</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nova/file.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nova/file.rs</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nova/gem.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nova/gem.rs</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nova/nova.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nova/nova.rs</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/nova/uapi.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nova/uapi.rs</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/dss/dpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/omapdrm/dss/dpi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/dss/dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/omapdrm/dss/dsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/dss/hdmi4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/omapdrm/dss/hdmi4.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/dss/hdmi5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/omapdrm/dss/hdmi5.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/dss/sdi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/omapdrm/dss/sdi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/omapdrm/dss/venc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/omapdrm/dss/venc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-abt-y030xx067a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-abt-y030xx067a.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-arm-versatile.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-arm-versatile.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-auo-a030jtn01.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-auo-a030jtn01.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-boe-td4320.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-boe-td4320.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-boe-th101mb31ig002-28a.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-boe-tv101wum-ll2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-boe-tv101wum-ll2.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-dsi-cm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-dsi-cm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-ebbg-ft8719.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-ebbg-ft8719.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-edp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-edp.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-himax-hx8279.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-himax-hx8279.c</a></td><td class='right'>1296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 29.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 70.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-himax-hx8394.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-himax-hx8394.c</a></td><td class='right'>441</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-newvision-nv3051d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-newvision-nv3051d.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-novatek-nt36523.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-novatek-nt36523.c</a></td><td class='right'>1683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.9%;'/><td class='rem' style='width: 19.8%;'/><td class='none' style='width: 61.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-novatek-nt37801.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-novatek-nt37801.c</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-samsung-sofef00.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-samsung-sofef00.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-simple.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-simple.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-synaptics-r63353.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-synaptics-r63353.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panel/panel-visionox-g2647fb105.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panel/panel-visionox-g2647fb105.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_device.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_device.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_drv.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_dump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_dump.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_features.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_features.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_gem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_gem_shrinker.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_mmu.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_perfcnt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_perfcnt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panfrost/panfrost_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panfrost/panfrost_regs.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_device.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_device.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_drv.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_fw.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_gem.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_gem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_gem.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_gpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_gpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_heap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_heap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_mmu.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_regs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/panthor/panthor_sched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/panthor/panthor_sched.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/pl111/pl111_versatile.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/pl111/pl111_versatile.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/atombios.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/atombios.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/atombios_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/atombios_dp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/cik.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/cik.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/r600_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/r600_hdmi.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/radeon.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_asic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/radeon_asic.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_cs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/radeon_cs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/radeon_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/radeon_fence.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/radeon/sid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/radeon/sid.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rcar-du/rcar_cmm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rcar-du/rcar_cmm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rcar-du/rcar_du_kms.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rcar-du/rcar_lvds.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rz-du/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rz-du/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/analogix_dp-rockchip.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/inno_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/inno_hdmi.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rk3066_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/rk3066_hdmi.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rockchip_drm_vop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/rockchip_drm_vop.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/rockchip_drm_vop2.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/rockchip_vop2_reg.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/rockchip/rockchip_vop_reg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/rockchip/rockchip_vop_reg.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/scheduler/.kunitconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/scheduler/.kunitconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/scheduler/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/scheduler/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/scheduler/sched_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/scheduler/sched_main.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/scheduler/tests/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/scheduler/tests/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/scheduler/tests/mock_scheduler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/scheduler/tests/mock_scheduler.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/scheduler/tests/sched_tests.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/scheduler/tests/sched_tests.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/scheduler/tests/tests_basic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/scheduler/tests/tests_basic.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sitronix/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sitronix/Kconfig</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sitronix/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sitronix/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sitronix/st7571-i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sitronix/st7571-i2c.c</a></td><td class='right'>1000</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sitronix/st7586.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sitronix/st7586.c</a> (renamed from drivers/gpu/drm/tiny/st7586.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sitronix/st7735r.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sitronix/st7735r.c</a> (renamed from drivers/gpu/drm/tiny/st7735r.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sprd/sprd_dpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sprd/sprd_dpu.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sprd/sprd_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sprd/sprd_dsi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_compositor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/sti_compositor.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_dvo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/sti_dvo.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_hda.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/sti_hda.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/sti_hdmi.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_hqvdp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/sti_hqvdp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_tvout.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/sti_tvout.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sti/sti_vtg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sti/sti_vtg.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/stm/lvds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/stm/lvds.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/Kconfig</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/drm_sysfb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/drm_sysfb.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/drm_sysfb_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/drm_sysfb_helper.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/drm_sysfb_modeset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/drm_sysfb_modeset.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/drm_sysfb_screen_info.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/drm_sysfb_screen_info.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/efidrm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/efidrm.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/ofdrm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/ofdrm.c</a> (renamed from drivers/gpu/drm/tiny/ofdrm.c)</td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/simpledrm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/simpledrm.c</a> (renamed from drivers/gpu/drm/tiny/simpledrm.c)</td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/sysfb/vesadrm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/sysfb/vesadrm.c</a></td><td class='right'>554</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/dc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/dc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/dp.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/dp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/dp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/dpaux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/dpaux.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/dsi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/falcon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/falcon.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/falcon.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/falcon.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/gem.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/hub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/hub.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/hub.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/hub.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/rgb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/rgb.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tegra/sor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tegra/sor.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_atomic_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_atomic_test.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_bridge_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_bridge_test.c</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_client_modeset_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_client_modeset_test.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_cmdline_parser_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_cmdline_parser_test.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_gem_shmem_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_gem_shmem_test.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_hdmi_state_helper_test.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_kunit_helpers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_kunit_helpers.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_modes_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_modes_test.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tests/drm_probe_helper_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tests/drm_probe_helper_test.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tidss/tidss_encoder.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tidss/tidss_encoder.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tiny/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tiny/Kconfig</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tiny/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tiny/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tiny/appletbdrm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tiny/appletbdrm.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tiny/cirrus-qemu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tiny/cirrus-qemu.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tiny/gm12u320.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tiny/gm12u320.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/tiny/panel-mipi-dbi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/tiny/panel-mipi-dbi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/tests/ttm_bo_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ttm/tests/ttm_bo_test.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_backup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ttm/ttm_backup.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_bo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ttm/ttm_bo.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_bo_vm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ttm/ttm_bo_vm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_pool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ttm/ttm_pool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ttm/ttm_resource.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/ttm/ttm_tt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/ttm/ttm_tt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/udl/udl_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/udl/udl_drv.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/udl/udl_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/udl/udl_drv.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/udl/udl_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/udl/udl_main.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/udl/udl_modeset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/udl/udl_modeset.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/udl/udl_transfer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/udl/udl_transfer.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_debugfs.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_drv.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_drv.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_gem.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_irq.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_perfmon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_perfmon.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_regs.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/v3d/v3d_sched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/v3d/v3d_sched.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/tests/vc4_mock_output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vc4/tests/vc4_mock_output.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vc4/tests/vc4_test_pv_muxing.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/vc4_dsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vc4/vc4_dsi.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/vc4_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vc4/vc4_hdmi.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/vc4_hdmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vc4/vc4_hdmi.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vc4/vc4_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vc4/vc4_plane.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vgem/vgem_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vgem/vgem_fence.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/virtio/virtgpu_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/virtio/virtgpu_drv.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/virtio/virtgpu_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/virtio/virtgpu_fence.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/virtio/virtgpu_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/virtio/virtgpu_gem.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/virtio/virtgpu_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/virtio/virtgpu_plane.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/virtio/virtgpu_prime.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/virtio/virtgpu_prime.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/tests/.kunitconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/tests/.kunitconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/tests/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/tests/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/tests/vkms_config_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/tests/vkms_config_test.c</a></td><td class='right'>951</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_config.c</a></td><td class='right'>640</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_config.h</a></td><td class='right'>437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_connector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_connector.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_connector.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_connector.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_crtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_crtc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_drv.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_drv.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vkms/vkms_output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vkms/vkms_output.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_blit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_blit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_bo.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_bo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_bo.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.c</a></td><td class='right'>844</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_cursor_plane.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_drv.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_drv.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_gem.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_kms.c</a></td><td class='right'>874</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 19.4%;'/><td class='none' style='width: 79.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_kms.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_mob.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_page_dirty.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_page_dirty.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_resource.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_surface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_surface.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/vmwgfx/vmwgfx_validation.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/abi/guc_actions_abi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/abi/guc_actions_abi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/abi/guc_klvs_abi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/abi/guc_klvs_abi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/intel_runtime_pm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/compat-i915-headers/intel_runtime_pm.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_pch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/compat-i915-headers/soc/intel_pch.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/intel_fbdev_fb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/display/intel_fbdev_fb.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_display.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/display/xe_display.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_display_rpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/display/xe_display_rpm.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_display_rps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/display/xe_display_rps.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_display_wa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/display/xe_display_wa.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/display/xe_hdcp_gsc.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/display/xe_plane_initial.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/display/xe_plane_initial.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/instructions/xe_alu_commands.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/instructions/xe_alu_commands.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/instructions/xe_gfxpipe_commands.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/instructions/xe_gfxpipe_commands.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/instructions/xe_gpu_commands.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/instructions/xe_gpu_commands.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/instructions/xe_mi_commands.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/instructions/xe_mi_commands.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_engine_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/regs/xe_engine_regs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_gt_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/regs/xe_gt_regs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_lrc_layout.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/regs/xe_lrc_layout.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/regs/xe_pcode_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/regs/xe_pcode_regs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_bo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/tests/xe_bo.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_dma_buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/tests/xe_dma_buf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_migrate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/tests/xe_migrate.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/tests/xe_mocs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/tests/xe_mocs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_bo.c</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_bo.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo_evict.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_bo_evict.c</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo_evict.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_bo_evict.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_bo_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_bo_types.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_configfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_configfs.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_configfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_configfs.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_devcoredump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_devcoredump.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_devcoredump_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_devcoredump_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_device.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_device_sysfs.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_device_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_device_types.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_dma_buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_dma_buf.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_eu_stall.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_eu_stall.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_eu_stall.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_eu_stall.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_exec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_exec.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_exec_queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_exec_queue.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_force_wake.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_force_wake.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ggtt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_ggtt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gsc.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gsc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc_proxy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gsc_proxy.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gsc_proxy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gsc_proxy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_debugfs.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_freq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_freq.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_idle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_idle.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_mcr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_mcr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_pagefault.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_pagefault.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_sriov_pf_debugfs.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_stats.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_stats_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_stats_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_throttle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_throttle.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_ads.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_ads.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_capture.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_capture.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_capture_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_capture_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_ct.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_ct.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_debugfs.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_engine_activity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_engine_activity.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_engine_activity.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_engine_activity.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_engine_activity_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_engine_activity_types.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_log.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_log.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_pc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_pc.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_pc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_pc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_submit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_submit.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_guc_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_guc_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hmm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_hmm.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hw_engine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_hw_engine.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_hwmon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_hwmon.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lmtt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_lmtt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_lrc.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_lrc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_lrc_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_lrc_types.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_memirq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_memirq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_migrate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_migrate.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_migrate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_migrate.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_mmio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_mmio.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_mocs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_mocs.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_module.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_module.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_module.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_module.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_oa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_oa.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pci.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pci_sriov.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pci_sriov.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pci_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pci_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pcode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pcode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pcode_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pcode_api.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pm.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pmu.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pt.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_pxp_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_pxp_debugfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_query.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_query.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_reg_sr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_reg_sr.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ring_ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_ring_ops.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_ring_ops_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_ring_ops_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_rtp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_rtp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_sa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_sa.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_shrinker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_shrinker.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_survivability_mode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_survivability_mode.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_survivability_mode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_survivability_mode.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_svm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_svm.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_svm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_svm.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_trace_lrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_trace_lrc.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_uc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_uc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_uc_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_uc_fw.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_vm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_vm.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_vm_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_vm_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_vram.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_vram.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_wa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_wa.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xe/xe_wa_oob.rules?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xe/xe_wa_oob.rules</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xlnx/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xlnx/zynqmp_dp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/drm/xlnx/zynqmp_dp_audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/xlnx/zynqmp_dp_audio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/host1x/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/host1x/bus.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/host1x/cdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/host1x/cdma.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/ipu-v3/ipu-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/ipu-v3/ipu-common.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/nova-core/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/nova-core/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/nova-core/driver.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/nova-core/driver.rs</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/nova-core/firmware.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/nova-core/firmware.rs</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/nova-core/gpu.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/nova-core/gpu.rs</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/nova-core/nova_core.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/nova-core/nova_core.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/gpu/nova-core/regs.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/nova-core/regs.rs</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/gpu/nova-core/regs/macros.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/nova-core/regs/macros.rs</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_init.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/bpf/hid_bpf_dispatch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/bpf/hid_bpf_dispatch.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/bpf/progs/XPPen__ACK05.bpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/bpf/progs/XPPen__ACK05.bpf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-asus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/hid-asus.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-ids.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/hid-ids.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/hid-quirks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-steam.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/hid-steam.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-thrustmaster.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/hid-thrustmaster.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/hid-uclogic-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/hid-uclogic-core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hid/wacom_sys.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hid/wacom_sys.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hv/channel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hv/channel.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hv/hv_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hv/hv_common.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hv/hyperv_vmbus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hv/hyperv_vmbus.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hv/vmbus_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hv/vmbus_drv.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwmon/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwmon/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/fam15h_power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwmon/fam15h_power.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/hwmon-vid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwmon/hwmon-vid.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwmon/k10temp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwmon/k10temp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/hwmon/oxp-sensors.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwmon/oxp-sensors.c</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 16.4%;'/><td class='none' style='width: 83.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwtracing/intel_th/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwtracing/intel_th/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/hwtracing/intel_th/msu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/hwtracing/intel_th/msu.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/busses/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/busses/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/busses/i2c-cht-wc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/busses/i2c-cht-wc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/busses/i2c-cros-ec-tunnel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/busses/i2c-cros-ec-tunnel.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/busses/i2c-designware-pcidrv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/busses/i2c-designware-pcidrv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/busses/i2c-imx-lpi2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/busses/i2c-imx-lpi2c.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/busses/i2c-omap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/busses/i2c-omap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/busses/i2c-piix4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/busses/i2c-piix4.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/i2c-atr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/i2c-atr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/i2c/muxes/i2c-mux-pca954x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/i2c/muxes/i2c-mux-pca954x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/idle/intel_idle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/idle/intel_idle.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/accel/adis16201.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/accel/adis16201.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/accel/adxl355_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/accel/adxl355_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/accel/adxl367.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/accel/adxl367.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/accel/fxls8962af-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/accel/fxls8962af-core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/ad7266.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/ad7266.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/ad7380.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/ad7380.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/ad7606.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/ad7606.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/ad7606_spi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/ad7606_spi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/ad7768-1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/ad7768-1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/dln2-adc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/dln2-adc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/qcom-spmi-iadc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/qcom-spmi-iadc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/rockchip_saradc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/rockchip_saradc.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/adc/stm32-adc-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/adc/stm32-adc-core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/chemical/pms7003.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/chemical/pms7003.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/chemical/sps30.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/chemical/sps30.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/common/hid-sensors/hid-sensor-attributes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/common/hid-sensors/hid-sensor-attributes.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/imu/adis16550.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/imu/adis16550.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/imu/bmi270/bmi270_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/imu/bmi270/bmi270_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/light/hid-sensor-prox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/light/hid-sensor-prox.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/light/opt3001.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/light/opt3001.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/magnetometer/ak8974.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/magnetometer/ak8974.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/pressure/mprls0025pa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/pressure/mprls0025pa.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iio/temperature/maxim_thermocouple.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iio/temperature/maxim_thermocouple.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/core/cma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/core/cma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/core/device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/core/device.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/core/ucaps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/core/ucaps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/core/umem_odp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/core/umem_odp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/bnxt_re/ib_verbs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/bnxt_re/ib_verbs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/hns/hns_roce_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/hns/hns_roce_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/irdma/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/irdma/main.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/irdma/main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/irdma/main.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/irdma/osdep.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/irdma/osdep.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/irdma/type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/irdma/type.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/irdma/verbs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/irdma/verbs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/mlx5/fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/mlx5/fs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/qib/qib_fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/qib/qib_fs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/hw/usnic/usnic_ib_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/hw/usnic/usnic_ib_main.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/sw/rxe/rxe_cq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/sw/rxe/rxe_cq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/sw/rxe/rxe_loc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/sw/rxe/rxe_loc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/sw/rxe/rxe_mr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/sw/rxe/rxe_mr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/sw/rxe/rxe_resp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/sw/rxe/rxe_resp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/sw/siw/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/sw/siw/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/sw/siw/siw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/sw/siw/siw.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/ulp/ipoib/ipoib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/ulp/ipoib/ipoib.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/ulp/ipoib/ipoib_ib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/ulp/ipoib/ipoib_ib.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/ulp/ipoib/ipoib_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/ulp/ipoib/ipoib_main.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/ulp/ipoib/ipoib_verbs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/ulp/ipoib/ipoib_verbs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/infiniband/ulp/ipoib/ipoib_vlan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/infiniband/ulp/ipoib/ipoib_vlan.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/joystick/magellan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/joystick/magellan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/joystick/xpad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/joystick/xpad.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/keyboard/mtk-pmic-keys.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/keyboard/mtk-pmic-keys.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/misc/hisi_powerkey.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/misc/hisi_powerkey.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/misc/sparcspkr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/misc/sparcspkr.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/mouse/synaptics.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/mouse/synaptics.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/rmi4/rmi_f34.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/rmi4/rmi_f34.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/touchscreen/cyttsp5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/touchscreen/cyttsp5.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/input/touchscreen/stmpe-ts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/input/touchscreen/stmpe-ts.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/amd/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/amd/init.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/amd/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/amd/iommu.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/dma-iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/dma-iommu.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/exynos-iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/exynos-iommu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/intel/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/intel/iommu.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/intel/irq_remapping.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/intel/irq_remapping.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/iommu.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/ipmmu-vmsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/ipmmu-vmsa.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/iommu/mtk_iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/iommu/mtk_iommu.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/exynos-combiner.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/exynos-combiner.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-al-fic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-al-fic.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-alpine-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-alpine-msi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-apple-aic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-apple-aic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-armada-370-xp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-armada-370-xp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-aspeed-i2c-ic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-aspeed-i2c-ic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-aspeed-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-aspeed-intc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-aspeed-scu-ic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-aspeed-scu-ic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-aspeed-vic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-aspeed-vic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ath79-misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ath79-misc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-atmel-aic-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-atmel-aic-common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-atmel-aic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-atmel-aic.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-atmel-aic5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-atmel-aic5.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-bcm2712-mip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-bcm2712-mip.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-bcm2835.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-bcm2835.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-bcm2836.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-bcm2836.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-bcm6345-l1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-bcm6345-l1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-bcm7038-l1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-bcm7038-l1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-bcm7120-l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-bcm7120-l2.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-brcmstb-l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-brcmstb-l2.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-clps711x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-clps711x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-crossbar.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-crossbar.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-csky-apb-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-csky-apb-intc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-csky-mpintc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-csky-mpintc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-davinci-cp-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-davinci-cp-intc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-digicolor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-digicolor.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-dw-apb-ictl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-dw-apb-ictl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-econet-en751221.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-econet-en751221.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ftintc010.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ftintc010.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-gic-v2m.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-gic-v2m.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-gic-v3-its-msi-parent.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-gic-v3-its-msi-parent.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-gic-v3-its.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-gic-v3-its.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-gic-v3-mbi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-gic-v3-mbi.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-gic-v3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-gic-v3.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-goldfish-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-goldfish-pic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-hip04.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-hip04.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-i8259.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-i8259.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-idt3243x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-idt3243x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-imgpdc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-imgpdc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-imx-gpcv2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-imx-gpcv2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-imx-intmux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-imx-intmux.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-imx-irqsteer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-imx-irqsteer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-imx-mu-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-imx-mu-msi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ingenic-tcu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ingenic-tcu.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ingenic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ingenic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ixp4xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ixp4xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-jcore-aic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-jcore-aic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-keystone.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-keystone.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-lan966x-oic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-lan966x-oic.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongarch-avec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-loongarch-avec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongarch-cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-loongarch-cpu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-eiointc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-loongson-eiointc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-htvec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-loongson-htvec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-liointc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-loongson-liointc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-pch-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-loongson-pch-msi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-loongson-pch-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-loongson-pch-pic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-lpc32xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-lpc32xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ls-extirq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ls-extirq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ls-scfg-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ls-scfg-msi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ls1x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ls1x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mchp-eic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mchp-eic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-meson-gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-meson-gpio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mips-cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mips-cpu.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mips-gic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mips-gic.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mmp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mmp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mscc-ocelot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mscc-ocelot.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-msi-lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-msi-lib.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mst-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mst-intc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mtk-cirq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mtk-cirq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mtk-sysirq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mtk-sysirq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mvebu-gicp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mvebu-gicp.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mvebu-icu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mvebu-icu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mvebu-odmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mvebu-odmi.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mvebu-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mvebu-pic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mvebu-sei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mvebu-sei.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-mxs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-mxs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-nvic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-nvic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-omap-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-omap-intc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-or1k-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-or1k-pic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-orion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-orion.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-owl-sirq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-owl-sirq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-pic32-evic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-pic32-evic.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-pruss-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-pruss-intc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-qcom-mpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-qcom-mpm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-realtek-rtl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-realtek-rtl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-renesas-intc-irqpin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-renesas-intc-irqpin.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-renesas-irqc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-renesas-irqc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-renesas-rza1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-renesas-rza1.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-renesas-rzg2l.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-renesas-rzg2l.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-renesas-rzv2h.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-renesas-rzv2h.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-imsic-platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-riscv-imsic-platform.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-imsic-state.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-riscv-imsic-state.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-riscv-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-riscv-intc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sa11x0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-sa11x0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sg2042-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-sg2042-msi.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sni-exiu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-sni-exiu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sp7021-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-sp7021-intc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-starfive-jh8100-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-starfive-jh8100-intc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-stm32-exti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-stm32-exti.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-stm32mp-exti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-stm32mp-exti.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sun4i.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-sun4i.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sun6i-r.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-sun6i-r.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-sunxi-nmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-sunxi-nmi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-tb10x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-tb10x.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-tegra.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-tegra.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ti-sci-inta.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ti-sci-inta.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ti-sci-intr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ti-sci-intr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-ts4800.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-ts4800.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-uniphier-aidet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-uniphier-aidet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-versatile-fpga.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-versatile-fpga.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-vf610-mscm-ir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-vf610-mscm-ir.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-vic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-vic.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-vt8500.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-vt8500.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-wpcm450-aic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-wpcm450-aic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-xilinx-intc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-xilinx-intc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-xtensa-mx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-xtensa-mx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-xtensa-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-xtensa-pic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/irq-zevio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/irq-zevio.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/irqchip/spear-shirq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/irqchip/spear-shirq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mailbox/qcom-ipcc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mailbox/qcom-ipcc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mcb/mcb-parse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mcb/mcb-parse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/bcache/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/bcache/super.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-bufio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/dm-bufio.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-integrity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/dm-integrity.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-raid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/dm-raid.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/dm-table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/dm-table.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/md-bitmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/md-bitmap.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/md.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/md.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/md.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/md.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/persistent-data/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/persistent-data/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/raid1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/raid1.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/raid10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/raid10.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/md/raid5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/md/raid5.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/cec/i2c/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/cec/i2c/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/cec/platform/cros-ec/cros-ec-cec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/cec/platform/cros-ec/cros-ec-cec.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/cec/usb/extron-da-hd-4k-plus/extron-da-hd-4k-plus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/cec/usb/extron-da-hd-4k-plus/extron-da-hd-4k-plus.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/common/videobuf2/videobuf2-dma-sg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/common/videobuf2/videobuf2-dma-sg.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/common/videobuf2/videobuf2-v4l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/common/videobuf2/videobuf2-v4l2.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/dvb-frontends/dib7000p.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/dvb-frontends/dib7000p.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/dvb-frontends/dib8000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/dvb-frontends/dib8000.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/adv7511-v4l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/adv7511-v4l2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ccs-pll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ccs-pll.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ccs-pll.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ccs-pll.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ccs/ccs-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ccs/ccs-core.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ccs/ccs-quirk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ccs/ccs-quirk.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ccs/ccs-reg-access.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ccs/ccs-reg-access.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ccs/ccs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ccs/ccs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ds90ub913.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ds90ub913.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ds90ub953.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ds90ub953.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/i2c/ds90ub953.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ds90ub953.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ds90ub960.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ds90ub960.c</a></td><td class='right'>2162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 37.4%;'/><td class='rem' style='width: 12.3%;'/><td class='none' style='width: 50.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/imx219.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/imx219.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/imx283.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/imx283.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/imx334.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/imx334.c</a></td><td class='right'>1035</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 13.2%;'/><td class='none' style='width: 76.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/imx335.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/imx335.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/lt6911uxe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/lt6911uxe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/max96714.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/max96714.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/max96717.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/max96717.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/i2c/ov02c10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ov02c10.c</a></td><td class='right'>1013</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/i2c/ov02e10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ov02e10.c</a></td><td class='right'>969</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ov08x40.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ov08x40.c</a></td><td class='right'>1324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.7%;'/><td class='rem' style='width: 14.7%;'/><td class='none' style='width: 69.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ov13b10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ov13b10.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ov2740.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ov2740.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ov5675.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ov5675.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/ov8856.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/ov8856.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/rdacm20.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/rdacm20.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/rdacm21.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/rdacm21.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/i2c/tc358743.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/tc358743.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/i2c/vd55g1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/vd55g1.c</a></td><td class='right'>1965</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 45.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 54.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/i2c/vd56g3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/i2c/vd56g3.c</a></td><td class='right'>1586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 36.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 63.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu-bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu-bridge.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu3/ipu3-cio2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu3/ipu3-cio2.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-bus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-bus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-bus.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-buttress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-buttress.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-buttress.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-buttress.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-dma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-dma.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys-csi2.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys-queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys-queue.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys-queue.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys-queue.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys-subdev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys-subdev.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys-video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys-video.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys-video.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys-video.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6-isys.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6-isys.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/intel/ipu6/ipu6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/intel/ipu6/ipu6.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/mgb4/mgb4_vin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/mgb4/mgb4_vin.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/pt3/pt3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/pt3/pt3.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/solo6x10/solo6x10-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/solo6x10/solo6x10-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/media/pci/sta2x11/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/sta2x11/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/media/pci/sta2x11/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/sta2x11/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/media/pci/sta2x11/sta2x11_vip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/sta2x11/sta2x11_vip.c</a></td><td class='right'>1270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 29.2%;'/><td class='none' style='width: 70.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/media/pci/sta2x11/sta2x11_vip.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/sta2x11/sta2x11_vip.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/tw5864/tw5864-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/tw5864/tw5864-core.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/zoran/zoran_card.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/zoran/zoran_card.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/zoran/zr36016.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/zoran/zr36016.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/zoran/zr36050.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/zoran/zr36050.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/pci/zoran/zr36060.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/pci/zoran/zr36060.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-capture.c</a></td><td class='right'>804</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-common.h</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-core.c</a></td><td class='right'>641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-dev.c</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-params.c</a></td><td class='right'>1008</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-regs.h</a></td><td class='right'>618</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-resizer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-resizer.c</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/isp/c3-isp-stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/isp/c3-isp-stats.c</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/mipi-adapter/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/mipi-adapter/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/mipi-adapter/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/mipi-adapter/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/mipi-adapter/c3-mipi-adap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/mipi-adapter/c3-mipi-adap.c</a></td><td class='right'>842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/mipi-csi2/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/mipi-csi2/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/mipi-csi2/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/mipi-csi2/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/amlogic/c3/mipi-csi2/c3-mipi-csi2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amlogic/c3/mipi-csi2/c3-mipi-csi2.c</a></td><td class='right'>828</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/amphion/vdec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amphion/vdec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/amphion/vpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amphion/vpu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/amphion/vpu_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amphion/vpu_core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/amphion/vpu_malone.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/amphion/vpu_malone.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/atmel/atmel-isi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/atmel/atmel-isi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/imagination/e5010-jpeg-enc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/imagination/e5010-jpeg-enc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_reg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_reg.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/mdp/mtk_mdp_m2m.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/mdp/mtk_mdp_m2m.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/mdp3/mtk-mdp3-cmdq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_stateless.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.9%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 85.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/mediatek/vcodec/encoder/venc/venc_h264_if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/mediatek/vcodec/encoder/venc/venc_h264_if.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/nuvoton/npcm-video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/nuvoton/npcm-video.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/nxp/dw100/dw100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/nxp/dw100/dw100.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg-hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/nxp/imx-jpeg/mxc-jpeg-hw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-csid-680.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-csid-680.c</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-csid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-csid.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-csid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-csid.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-csiphy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-csiphy.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-csiphy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-csiphy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-vfe-680.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-vfe-680.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-vfe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-vfe.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss-vfe.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss-vfe.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/camss/camss.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/camss/camss.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_firmware.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_firmware.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_platform_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_platform_common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_platform_gen2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_platform_gen2.c</a> (renamed from drivers/media/platform/qcom/iris/iris_platform_sm8550.c)</td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_platform_qcs8300.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_platform_sm8650.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_platform_sm8650.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_probe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_probe.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_vpu2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_vpu2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_vpu3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_vpu3.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_vpu3x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_vpu3x.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_vpu_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_vpu_common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/iris/iris_vpu_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/iris/iris_vpu_common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/venus/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/venus/core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/venus/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/venus/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/venus/pm_helpers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/venus/pm_helpers.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/qcom/venus/vdec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/qcom/venus/vdec.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/raspberrypi/rp1-cfe/cfe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/raspberrypi/rp1-cfe/cfe.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-csi2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-csi2.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-isp/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-isp/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-isp/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-isp/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-isp/csisp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-isp/csisp.c</a> (renamed from drivers/media/platform/renesas/rcar-isp.c)</td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-vin/rcar-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-vin/rcar-core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-vin/rcar-dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-vin/rcar-dma.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-vin/rcar-v4l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-vin/rcar-v4l2.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rcar-vin/rcar-vin.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rcar-vin/rcar-vin.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rzg2l-cru/rzg2l-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rzg2l-cru/rzg2l-core.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rzg2l-cru/rzg2l-ip.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_brx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_brx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_dl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_dl.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_drm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_drm.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_drm.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_drv.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_entity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_entity.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_entity.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_entity.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_hsit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_hsit.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_iif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_iif.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_iif.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_iif.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_pipe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_pipe.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_pipe.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_pipe.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_regs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_rpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_rpf.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_rwpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_rwpf.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_sru.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_sru.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_uds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_uds.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_video.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/renesas/vsp1/vsp1_wpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/renesas/vsp1/vsp1_wpf.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/rockchip/rkisp1/rkisp1-regs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/exynos4-is/fimc-capture.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/exynos4-is/fimc-capture.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/exynos4-is/fimc-is-regs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/exynos4-is/fimc-is-regs.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/exynos4-is/fimc-lite.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/exynos4-is/fimc-lite.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/exynos4-is/media-dev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/exynos4-is/media-dev.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/s3c-camif/camif-capture.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/s3c-camif/camif-capture.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v6.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/s5p-mfc/regs-mfc-v6.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/st/sti/bdisp/bdisp-debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/st/sti/bdisp/bdisp-debug.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/st/sti/bdisp/bdisp-v4l2.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/st/sti/delta/delta-debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/st/sti/delta/delta-debug.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/st/stm32/stm32-dcmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/st/stm32/stm32-dcmi.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-byteproc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-byteproc.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/synopsys/hdmirx/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/synopsys/hdmirx/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/am437x/am437x-vpfe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/am437x/am437x-vpfe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/cal/cal-camerarx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/cal/cal-camerarx.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/cal/cal-video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/cal/cal-video.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/cal/cal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/cal/cal.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/cal/cal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/cal/cal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/davinci/vpif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/davinci/vpif.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/omap3isp/ispccdc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/omap3isp/ispccdc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/omap3isp/ispstat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/omap3isp/ispstat.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/ti/omap3isp/ispvideo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/ti/omap3isp/ispvideo.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/verisilicon/hantro_postproc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/verisilicon/hantro_postproc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/verisilicon/hantro_v4l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/verisilicon/hantro_v4l2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/platform/verisilicon/rockchip_vpu_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/platform/verisilicon/rockchip_vpu_hw.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/rc/keymaps/rc-hauppauge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/rc/keymaps/rc-hauppauge.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/test-drivers/vidtv/vidtv_channel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/test-drivers/vidtv/vidtv_channel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/test-drivers/vim2m.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/test-drivers/vim2m.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/test-drivers/vivid/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/test-drivers/vivid/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/test-drivers/vivid/vivid-kthread-cap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/test-drivers/vivid/vivid-kthread-cap.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/test-drivers/vivid/vivid-vid-cap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/test-drivers/vivid/vivid-vid-cap.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/dvb-usb/cxusb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/dvb-usb/cxusb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/em28xx/em28xx-video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/em28xx/em28xx-video.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/gspca/stv06xx/stv06xx_hdcs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/gspca/stv06xx/stv06xx_hdcs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/pvrusb2/pvrusb2-hdw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/pvrusb2/pvrusb2-hdw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/pvrusb2/pvrusb2-std.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/pvrusb2/pvrusb2-std.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/pvrusb2/pvrusb2-std.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/pvrusb2/pvrusb2-std.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/uvc/uvc_ctrl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/uvc/uvc_ctrl.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/uvc/uvc_driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/uvc/uvc_driver.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/uvc/uvc_v4l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/uvc/uvc_v4l2.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/usb/uvc/uvcvideo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/usb/uvc/uvcvideo.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/v4l2-core/v4l2-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/v4l2-core/v4l2-common.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/v4l2-core/v4l2-dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/v4l2-core/v4l2-dev.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/media/v4l2-core/v4l2-ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/media/v4l2-core/v4l2-ioctl.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/memory/omap-gpmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/memory/omap-gpmc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/memory/renesas-rpc-if-regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/memory/renesas-rpc-if-regs.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/memory/renesas-rpc-if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/memory/renesas-rpc-if.c</a></td><td class='right'>714</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 83.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/memory/renesas-xspi-if-regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/memory/renesas-xspi-if-regs.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/88pm860x-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/88pm860x-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/ab8500-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/ab8500-core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/arizona-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/arizona-irq.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/db8500-prcmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/db8500-prcmu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/fsl-imx25-tsadc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/fsl-imx25-tsadc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/lp8788-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/lp8788-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/mfd/max77759.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/max77759.c</a></td><td class='right'>690</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/max8925-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/max8925-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/max8997-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/max8997-irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/max8998-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/max8998-irq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/mt6358-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/mt6358-irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/mt6397-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/mt6397-irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/qcom-pm8xxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/qcom-pm8xxx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/stmfx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/stmfx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/stmpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/stmpe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/tc3589x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/tc3589x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/tps65217.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/tps65217.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/tps6586x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/tps6586x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/twl4030-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/twl4030-irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/twl6030-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/twl6030-irq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/wm831x-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/wm831x-irq.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mfd/wm8994-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mfd/wm8994-irq.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/cs5535-mfgpt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/cs5535-mfgpt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/hi6421v600-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/hi6421v600-irq.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/lkdtm/heap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/lkdtm/heap.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/mei/hw-me-regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/mei/hw-me-regs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/mei/pci-me.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/mei/pci-me.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/mei/vsc-tp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/mei/vsc-tp.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/misc/pci_endpoint_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/misc/pci_endpoint_test.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/block.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/block.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/card.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/card.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/core.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/core.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/host.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/mmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/mmc.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/mmc_ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/mmc_ops.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/mmc_ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/mmc_ops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/mmc_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/mmc_test.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/queue.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/quirks.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/quirks.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/sd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/sd.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/sdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/sdio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/core/slot-gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/core/slot-gpio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/alcor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/alcor.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/bcm2835.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/bcm2835.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/cavium-thunderx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/cavium-thunderx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/dw_mmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/dw_mmc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/mtk-sd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/mtk-sd.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/renesas_sdhi_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/renesas_sdhi_core.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-esdhc-imx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci-esdhc-imx.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-msm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci-msm.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-of-dwcmshc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci-of-dwcmshc.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-of-k1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci-of-k1.c</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci-omap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci-omap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sdhci_am654.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sdhci_am654.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/sunplus-mmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/sunplus-mmc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mmc/host/tmio_mmc_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mmc/host/tmio_mmc_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/inftlcore.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mtd/inftlcore.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/nand/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mtd/nand/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/nand/raw/cs553x_nand.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mtd/nand/raw/cs553x_nand.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/mtd/nand/raw/r852.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/mtd/nand/raw/r852.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bareudp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/bareudp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_alb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/bonding/bond_alb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/bonding/bond_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/bonding/bond_main.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/ctucanfd/ctucanfd_base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/ctucanfd/ctucanfd_base.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/dev/dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/dev/dev.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/dev/netlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/dev/netlink.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/flexcan/flexcan-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/flexcan/flexcan-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/ifi_canfd/ifi_canfd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/ifi_canfd/ifi_canfd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/kvaser_pciefd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/kvaser_pciefd.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/m_can/m_can.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/m_can/m_can.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/peak_canfd/peak_canfd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/peak_canfd/peak_canfd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/rcar/rcar_canfd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/rcar/rcar_canfd.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/rockchip/rockchip_canfd-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/rockchip/rockchip_canfd-core.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/rockchip/rockchip_canfd-timestamp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/rockchip/rockchip_canfd-timestamp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/slcan/slcan-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/slcan/slcan-core.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/usb/esd_usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/usb/esd_usb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/usb/etas_es58x/es58x_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/usb/etas_es58x/es58x_core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/usb/etas_es58x/es58x_fd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/usb/etas_es58x/es58x_fd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/usb/gs_usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/usb/gs_usb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/usb/kvaser_usb/kvaser_usb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/usb/peak_usb/pcan_usb_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/can/xilinx_can.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/can/xilinx_can.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/b53/b53_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/b53/b53_common.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/b53/b53_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/b53/b53_priv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/b53/b53_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/b53/b53_regs.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/bcm_sf2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/bcm_sf2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/dsa_loop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/dsa_loop.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/hirschmann/hellcreek.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/hirschmann/hellcreek.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/microchip/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz9477.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/microchip/ksz9477.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz9477.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/microchip/ksz9477.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/microchip/ksz_common.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/microchip/ksz_common.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/microchip/ksz_ptp.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/microchip/ksz_ptp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/microchip/ksz_ptp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mt7530-mmio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mt7530-mmio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mt7530.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mt7530.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mt7530.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mt7530.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/chip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mv88e6xxx/chip.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/chip.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mv88e6xxx/chip.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/devlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mv88e6xxx/devlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/global2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mv88e6xxx/global2.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/hwtstamp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mv88e6xxx/hwtstamp.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/hwtstamp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mv88e6xxx/hwtstamp.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/mv88e6xxx/ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/mv88e6xxx/ptp.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/ocelot/felix.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/ocelot/felix.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/ocelot/felix_vsc9959.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/ocelot/felix_vsc9959.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/qca/ar9331.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/qca/ar9331.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/realtek/rtl8365mb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/realtek/rtl8365mb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/realtek/rtl8366rb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/realtek/rtl8366rb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/rzn1_a5psw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/rzn1_a5psw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/sja1105/sja1105_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/sja1105/sja1105_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/sja1105/sja1105_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/sja1105/sja1105_ptp.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/dsa/sja1105/sja1105_ptp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/dsa/sja1105/sja1105_ptp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/airoha_eth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/airoha_eth.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/airoha_eth.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/airoha_eth.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/airoha_npu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/airoha_npu.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/airoha_npu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/airoha_npu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/airoha_ppe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/airoha_ppe.c</a></td><td class='right'>485</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 88.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/airoha_ppe_debugfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/airoha/airoha_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/airoha/airoha_regs.h</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amazon/ena/ena_netdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amazon/ena/ena_netdev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/adminq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/pds_core/adminq.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/auxbus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/pds_core/auxbus.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/pds_core/core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/pds_core/core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/pds_core/debugfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/pds_core/devlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/pds_core/devlink.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-i2c.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-pci.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-platform.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-ptp.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-smn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe-smn.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/amd/xgbe/xgbe.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/amd/xgbe/xgbe.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/apple/bmac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/apple/bmac.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/aquantia/atlantic/aq_main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_nic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/aquantia/atlantic/aq_nic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/asp2/bcmasp.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/asp2/bcmasp.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bgmac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bgmac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/genet/bcmgenet.c</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/genet/bcmgenet.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/genet/bcmmii.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/genet/bcmmii.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/broadcom/tg3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/broadcom/tg3.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/brocade/bna/bnad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/brocade/bna/bnad.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cadence/macb_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/cadence/macb_main.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cavium/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/cavium/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_queues.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/cavium/thunder/nicvf_queues.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cavium/thunder/thunder_bgx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/cavium/thunder/thunder_bgx.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb/cxgb2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/chelsio/cxgb/cxgb2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/cxgb4/sge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cisco/enic/enic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/cisco/enic/enic.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cisco/enic/enic_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/cisco/enic/enic_main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/cortina/gemini.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/cortina/gemini.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/dec/tulip/tulip_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/dec/tulip/tulip_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/dec/tulip/winbond-840.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/dec/tulip/winbond-840.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/dlink/dl2k.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/dlink/dl2k.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/dlink/dl2k.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/dlink/dl2k.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/emulex/benet/be_cmds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/emulex/benet/be_cmds.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/emulex/benet/be_cmds.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/emulex/benet/be_cmds.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/engleder/tsnep_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/engleder/tsnep_main.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/faraday/ftgmac100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/faraday/ftgmac100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/dpaa/dpaa_eth.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc4_hw.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_pf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc4_pf.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc_cbdr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc_cbdr.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc_ethtool.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc_pf.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc_pf.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/enetc_vf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/enetc_vf.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/ntmp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/ntmp.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/enetc/ntmp_private.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/enetc/ntmp_private.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/fec_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/fec_main.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/freescale/gianfar.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/freescale/gianfar.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/google/gve/gve_ethtool.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/google/gve/gve_main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/google/gve/gve_tx_dqo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/google/gve/gve_tx_dqo.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_common.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_common.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_irq.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_lld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_lld.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_main.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.c</a></td><td class='right'>670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_tx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_wq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_wq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ibm/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/ibmveth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ibm/ibmveth.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ibm/ibmveth.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ibm/ibmveth.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e1000e/e1000.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/e1000e/e1000.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/e1000e/netdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/e1000e/netdev.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/i40e/i40e_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/i40e/i40e_common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/devlink/devlink.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_adapter.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_adapter.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_common.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_dcb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_dcb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_dcb_lib.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_dcb_lib.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_nl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_dcb_nl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ddp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_ddp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_eswitch.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_ethtool.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_idc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_idc.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_idc_int.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_idc_int.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_lag.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_lib.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_lib.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_main.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_ptp.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_ptp_hw.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_ptp_hw.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_repr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_repr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_sbq_cmd.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_sriov.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_sriov.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_switch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_switch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_tc_lib.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_tc_lib.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_txrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_txrx.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_type.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_vf_lib.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_vf_lib.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_virtchnl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_virtchnl.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_controlq_api.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_dev.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_ethtool.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_lib.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_ptp.c</a></td><td class='right'>873</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_ptp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_ptp.h</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_txrx.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_txrx.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/idpf/virtchnl2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/idpf/virtchnl2.h</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igb/igb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igb/igb.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igb/igb_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igb/igb_main.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igb/igb_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igb/igb_ptp.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igb/igb_xsk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igb/igb_xsk.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_base.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_defines.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_defines.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_ethtool.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_main.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_ptp.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_regs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_tsn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_tsn.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/igc/igc_tsn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/igc/igc_tsn.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/devlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.c</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/devlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/region.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/devlink/region.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c</a></td><td class='right'>1339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c</a></td><td class='right'>707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/intel/ixgbevf/ipsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/intel/ixgbevf/ipsec.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeon_ep/octep_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/cgx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mbox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/mbox.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mbox.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/mbox.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/qos.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/rep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/octeontx2/nic/rep.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/prestera/prestera_counter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/prestera/prestera_counter.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/marvell/prestera/prestera_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/marvell/prestera/prestera_pci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_eth_path.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mediatek/mtk_eth_path.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mediatek/mtk_eth_soc.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mediatek/mtk_eth_soc.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_star_emac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mediatek/mtk_star_emac.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mediatek/mtk_wed.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mediatek/mtk_wed.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx4/mr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx4/mr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/cmd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/health.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en/health.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/trap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_fs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_main.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_rep.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_rx.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_tc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/en_tx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/rdma.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rdma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/rdma.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c</a></td><td class='right'>1348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 69.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 83.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 8.8%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlx5/core/vport.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlx5/core/vport.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlxsw/core_thermal.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlxsw/spectrum.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlxsw/spectrum.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_csr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_csr.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_devlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_devlink.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_fw.c</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_fw.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_irq.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_mac.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_netdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/meta/fbnic/fbnic_pci.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan743x_ethtool.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan743x_main.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan743x_main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan743x_ptp.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan743x_ptp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan966x/lan966x_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan966x/lan966x_main.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/microsoft/mana/mana_en.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/microsoft/mana/mana_en.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mscc/ocelot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mscc/ocelot.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mscc/ocelot_net.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mscc/ocelot_net.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mscc/ocelot_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mscc/ocelot_ptp.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/mscc/ocelot_vsc7514.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/mscc/ocelot_vsc7514.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/natsemi/natsemi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/natsemi/natsemi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/crypto/ipsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/netronome/nfp/crypto/ipsec.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/nfd3/dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/netronome/nfp/nfd3/dp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/nfdk/dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/netronome/nfp/nfdk/dp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/netronome/nfp/nfp_net_common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/pensando/ionic/ionic_ethtool.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/pensando/ionic/ionic_if.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/pensando/ionic/ionic_if.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed_debug.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed_dev.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_hsi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed_hsi.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed_hw.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed_hw.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qede/qede_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qede/qede_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/qualcomm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/qualcomm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/realtek/r8169.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/realtek/r8169.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/realtek/r8169_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/realtek/r8169_main.c</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/realtek/r8169_phy_config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/realtek/r8169_phy_config.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/realtek/rtase/rtase.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/realtek/rtase/rtase.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/realtek/rtase/rtase_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/realtek/rtase/rtase_main.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/renesas/ravb_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/renesas/ravb_ptp.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/rocker/rocker_ofdpa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/rocker/rocker_ofdpa.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sis/sis900.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/sis/sis900.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac4.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.7%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/hwif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/hwif.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/hwif.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/hwif.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/sun/niu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/sun/niu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/am65-cpsw-nuss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/am65-cpsw-nuss.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/cpsw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/cpsw.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/cpsw_new.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/cpsw_new.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/cpsw_priv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/cpsw_priv.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/cpsw_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/cpsw_priv.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icss_iep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/icssg/icss_iep.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/icssg/icssg_common.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/icssg/icssg_prueth.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/icssg/icssg_prueth.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/icssg/icssg_stats.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_stats.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/icssg/icssg_stats.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/ti/icssg/icssg_switch_map.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/ti/icssg/icssg_switch_map.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/vertexcom/mse102x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/vertexcom/mse102x.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_hw.c</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_hw.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_lib.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_lib.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_mbx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_mbx.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_mbx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_mbx.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_ptp.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_sriov.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_sriov.c</a></td><td class='right'>909</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_sriov.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_sriov.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/libwx/wx_type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/libwx/wx_type.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/ngbe/ngbe_main.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/ngbe/ngbe_type.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_main.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/wangxun/txgbe/txgbe_type.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/xilinx/xilinx_axienet_main.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ethernet/xscale/ixp4xx_eth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/geneve.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/geneve.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/gtp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/gtp.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/hamradio/baycom_epp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/hamradio/baycom_epp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/hyperv/hyperv_net.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/hyperv/hyperv_net.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/hyperv/netvsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/hyperv/netvsc.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/hyperv/netvsc_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/hyperv/netvsc_drv.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/hyperv/rndis_filter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/hyperv/rndis_filter.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v3.1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v3.1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v3.5.1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v3.5.1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v4.11.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v4.2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v4.5.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.7.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v4.7.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v4.9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v4.9.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v5.0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v5.0.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/data/ipa_data-v5.5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/data/ipa_data-v5.5.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/ipa_data.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipa/ipa_mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipa/ipa_mem.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ipvlan/ipvlan_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ipvlan/ipvlan_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/macvlan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/macvlan.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mctp/mctp-usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mctp/mctp-usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mdio/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mdio/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mdio/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mdio/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mdio/mdio-bcm-unimac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mdio/mdio-bcm-unimac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mdio/mdio-mux-meson-gxl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mdio/mdio-mux-meson-gxl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/mdio/mdio-realtek-rtl9300.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mdio/mdio-realtek-rtl9300.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mdio/mdio-thunder.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mdio/mdio-thunder.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/mdio/of_mdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/mdio/of_mdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/netdevsim/ipsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/netdevsim/ipsec.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/netdevsim/netdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/netdevsim/netdev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/bind.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/bind.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/bind.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/bind.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/crypto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/crypto.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/crypto.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/crypto.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/crypto_aead.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/crypto_aead.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/crypto_aead.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/crypto_aead.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/io.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/io.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/main.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/main.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/netlink-gen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/netlink-gen.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/netlink-gen.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/netlink-gen.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/netlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/netlink.c</a></td><td class='right'>1258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 28.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 71.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/netlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/netlink.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/ovpnpriv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/ovpnpriv.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/peer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/peer.c</a></td><td class='right'>1364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 31.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 68.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/peer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/peer.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/pktid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/pktid.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/pktid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/pktid.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/proto.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/proto.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/skb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/skb.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/socket.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/socket.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/socket.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/stats.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/stats.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/stats.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/tcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/tcp.c</a></td><td class='right'>598</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/tcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/tcp.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/udp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/udp.c</a></td><td class='right'>449</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/ovpn/udp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ovpn/udp.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/pfcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/pfcp.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/air_en8811h.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/air_en8811h.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/aquantia/aquantia_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/aquantia/aquantia_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/phy/as21xxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/as21xxx.c</a></td><td class='right'>1087</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/bcm87xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/bcm87xx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/dp83640.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/dp83640.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/dp83822.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/dp83822.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/dp83867.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/dp83867.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/fixed_phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/fixed_phy.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/icplus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/icplus.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/marvell-88q2xxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/marvell-88q2xxx.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/marvell10g.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/marvell10g.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mdio_bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mdio_bus.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 10.8%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/phy/mdio_bus_provider.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mdio_bus_provider.c</a></td><td class='right'>484</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mdio_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mdio_device.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mediatek/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mediatek/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mediatek/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mediatek/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/phy/mediatek/mtk-2p5ge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mediatek/mtk-2p5ge.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mediatek/mtk-ge-soc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mediatek/mtk-ge-soc.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/micrel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/micrel.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/microchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/microchip.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/microchip_rds_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/microchip_rds_ptp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/mscc/mscc_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mscc/mscc_ptp.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/phy/mxl-86110.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/mxl-86110.c</a></td><td class='right'>616</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/nxp-c45-tja11xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/nxp-c45-tja11xx.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/nxp-tja11xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/nxp-tja11xx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/phy_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/phy_device.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/phy_led_triggers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/phy_led_triggers.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/phylink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/phylink.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/realtek/realtek_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/realtek/realtek_main.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/phy/teranetics.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/phy/teranetics.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ppp/ppp_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ppp/ppp_generic.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/ppp/ppp_synctty.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/ppp/ppp_synctty.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/tap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/tap.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/team/team_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/team/team_core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/tun.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/tun.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/aqc111.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/aqc111.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/asix.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/asix.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/asix_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/asix_common.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/asix_devices.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/asix_devices.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/lan78xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/lan78xx.c</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/r8152.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/r8152.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/usb/rndis_host.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/usb/rndis_host.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/veth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/veth.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/virtio_net.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/virtio_net.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vmxnet3/vmxnet3_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/vmxnet3/vmxnet3_drv.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vmxnet3/vmxnet3_xdp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/vmxnet3/vmxnet3_xdp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vrf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/vrf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vxlan/vxlan_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/vxlan/vxlan_core.c</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 87.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vxlan/vxlan_private.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/vxlan/vxlan_private.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/vxlan/vxlan_vnifilter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/vxlan/vxlan_vnifilter.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireguard/allowedips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireguard/allowedips.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireguard/allowedips.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireguard/allowedips.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireguard/cookie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireguard/cookie.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireguard/netlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireguard/netlink.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireguard/noise.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireguard/noise.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireguard/selftest/allowedips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireguard/selftest/allowedips.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/ahb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/ahb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/bmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/bmi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/ce.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/ce.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/htc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/htc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/htt_rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/htt_rx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/hw.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/hw.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/mac.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/sdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/testmode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/testmode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/txrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/txrx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath10k/wmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath10k/wmi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/ahb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/ahb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/ce.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/ce.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/core.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/core.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/dp_rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/dp_rx.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/hal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/hal.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/hif.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/hif.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/mac.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/mhi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/mhi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/mhi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/mhi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/pci.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/qmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/qmi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath11k/testmode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath11k/testmode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/ahb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/ahb.c</a></td><td class='right'>1155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/ahb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/ahb.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/ce.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/ce.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/ce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/ce.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/core.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/core.h</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/debugfs.c</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.9%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/debugfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/debugfs.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_mon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp_mon.c</a></td><td class='right'>1097</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 74.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_mon.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp_mon.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp_rx.c</a></td><td class='right'>596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 86.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp_rx.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp_tx.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/dp_tx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/dp_tx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/fw.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/fw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/fw.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/hal.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/hal.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hal_desc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/hal_desc.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hal_rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/hal_rx.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hal_rx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/hal_rx.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/hw.c</a></td><td class='right'>511</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/hw.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/mac.c</a></td><td class='right'>1439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.8%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 66.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/mac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/mac.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/mhi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/mhi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/pci.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/pci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/pci.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/peer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/peer.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/peer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/peer.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/qmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/qmi.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/qmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/qmi.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/reg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/reg.c</a></td><td class='right'>526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 87.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/reg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/reg.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/testmode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/testmode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/wmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/wmi.c</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 87.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath12k/wmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath12k/wmi.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/ahb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath9k/ahb.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/ath9k/htc_drv_beacon.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/carl9170/fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/carl9170/fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/carl9170/tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/carl9170/tx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wcn36xx/testmode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/wcn36xx/testmode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ath/wil6210/txrx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ath/wil6210/txrx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/atmel/at76c50x-usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/atmel/at76c50x-usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/core.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/fwil_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/fwil_types.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/1000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/1000.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/2000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/2000.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/22000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/22000.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 7.6%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/5000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/5000.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/6000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/6000.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/7000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/7000.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/8000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/8000.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/9000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/9000.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/ax210.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/ax210.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/bz.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/bz.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/dr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/dr.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-fm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/rf-fm.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-gf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/rf-gf.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-hr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/rf-hr.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-jf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/rf-jf.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-pe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/rf-pe.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-wh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/rf-wh.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/sc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/cfg/sc.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/agn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/agn.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/dev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/dev.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/devices.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/devices.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/led.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/led.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/main.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/power.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/rx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rxon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/rxon.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/tx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/ucode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/dvm/ucode.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/acpi.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/acpi.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/alive.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/alive.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/commands.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/commands.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/location.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/location.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/mac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/mac.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/phy-ctxt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/phy-ctxt.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/power.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/power.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/rs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/rs.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/rx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/rx.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/stats.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/stats.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/tdls.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/tdls.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/api/tx.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dbg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/dbg.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dbg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/dbg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/dump.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/error-dump.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/error-dump.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/file.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/file.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/init.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/paging.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/paging.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/pnvm.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/pnvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/pnvm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/rs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/rs.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/runtime.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/runtime.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/smem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/smem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/uefi.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/fw/uefi.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-config.h</a></td><td class='right'>492</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-context-info-v2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-context-info-v2.h</a> (renamed from drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h)</td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-context-info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-context-info.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-csr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-csr.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-drv.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-drv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-fh.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-fh.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-io.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-io.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-op-mode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-op-mode.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-trans.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-trans.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-trans.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-trans.h</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/iwl-utils.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/agg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/agg.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/ap.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/coex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/coex.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/d3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/d3.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/debugfs.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/fw.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/iface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/iface.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/iface.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/iface.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/link.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/link.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/link.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/low_latency.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/low_latency.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mac80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/mac80211.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mcc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/mcc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/mld.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mld.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/mld.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mlo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/mlo.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mlo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/mlo.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/notif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/notif.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/notif.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/notif.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/phy.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/phy.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/power.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/ptp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/regulatory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/regulatory.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/roc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/roc.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/rx.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/scan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/scan.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/sta.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/sta.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/sta.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/sta.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/stats.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/agg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/agg.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/emlsr_with_bt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/emlsr_with_bt.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/hcmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/hcmd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/link-selection.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/link-selection.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/link.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/utils.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/utils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tests/utils.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/thermal.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tlc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tlc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mld/tx.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/coex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/coex.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/d3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/d3.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/fw.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/led.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/led.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/mld-mac.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/mvm.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/nvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/nvm.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/ops.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/power.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/quota.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/quota.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/rs.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/rs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/rx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/sta.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/sta.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/hcmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/tests/hcmd.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/time-event.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/tt.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/tx.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/mvm/utils.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-v2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-v2.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c)</td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/drv.c</a></td><td class='right'>2378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.4%;'/><td class='rem' style='width: 30.3%;'/><td class='none' style='width: 45.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/internal.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/rx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/rx.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/trans.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/trans.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/pcie/tx.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intel/iwlwifi/tests/devinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intel/iwlwifi/tests/devinfo.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intersil/p54/fwio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intersil/p54/fwio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intersil/p54/p54.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intersil/p54/p54.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/intersil/p54/txrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/intersil/p54/txrx.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/cfg80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/cfg80211.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/cfp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/cfp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/cmdevt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/cmdevt.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/init.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/main.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/main.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/pcie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/pcie.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/sta_cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/sta_cmd.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/txrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/txrx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/util.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/marvell/mwifiex/wmm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/marvell/mwifiex/wmm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/channel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/channel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/dma.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mac80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mac80211.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7615/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7615/mcu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76_connac.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76x2/usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/init.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/mac.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/mcu.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/mcu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mmio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/mmio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7921/main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/init.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/main.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/pci.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/testmode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7925/testmode.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/coredump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/coredump.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/dma.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/eeprom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/eeprom.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/init.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/mac.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/main.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/mcu.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mcu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/mcu.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mmio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/mmio.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/pci.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/regs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/mediatek/mt76/mt7996/regs.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/purelifi/plfxlc/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/purelifi/plfxlc/mac.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/purelifi/plfxlc/usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/purelifi/plfxlc/usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ralink/rt2x00/rt2800lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/core.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/pci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/usb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtlwifi/usb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtlwifi/usb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/coex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/coex.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/fw.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/hci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/hci.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/mac.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/mac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/mac80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/mac80211.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/main.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/main.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8703b.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723cs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8723cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8723d.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723de.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8723de.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723ds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8723ds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723du.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8723du.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8723x.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8812a.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812au.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8812au.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8814a.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814ae.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8814ae.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814au.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8814au.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8821a.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821au.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8821au.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8821c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821ce.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8821ce.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821cs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8821cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821cu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8821cu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822b.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822b.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822be.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822be.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822bs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822bs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822bu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822bu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822c.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822ce.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822ce.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822cs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822cu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/rtw8822cu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/sdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/sdio.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw88/usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw88/usb.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/acpi.c</a></td><td class='right'>1037</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 76.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/acpi.h</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/cam.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/cam.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/chan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/chan.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/chan.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/chan.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/core.c</a></td><td class='right'>493</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/core.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/debug.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/fw.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/fw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/fw.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/mac.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/mac.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/mac80211.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/mac_be.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/mac_be.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/pci.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/phy.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/phy.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/phy_be.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/phy_be.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/ps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/ps.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/ps.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/ps.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/reg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/reg.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/regd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/regd.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8851b.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8852a.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8852b.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8852b_common.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8852bt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8852c.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8922a.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/sar.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/sar.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/sar.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/sar.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/ser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/ser.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/txrx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/txrx.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/realtek/rtw89/wow.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/realtek/rtw89/wow.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/ti/wl1251/tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/ti/wl1251/tx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/wireless/virtual/mac80211_hwsim.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/wireless/virtual/mac80211_hwsim.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/net/xen-netfront.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/net/xen-netfront.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/firmware.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/firmware.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/firmware.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/firmware.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/nci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/nci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/nci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/nci.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/phy_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/phy_common.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/phy_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/phy_common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/s3fwrn5/s3fwrn5.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/s3fwrn5/s3fwrn5.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nfc/virtual_ncidev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nfc/virtual_ncidev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ntb/msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ntb/msi.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/common/auth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/common/auth.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/auth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/auth.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/core.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/fc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/fc.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/multipath.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/multipath.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/nvme.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/nvme.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/pci.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/sysfs.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/host/tcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/host/tcp.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/admin-cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/admin-cmd.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/auth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/auth.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/core.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/discovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/discovery.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/fabrics-cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/fabrics-cmd.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/fc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/fc.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/fcloop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/fcloop.c</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/loop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/loop.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/nvmet.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/nvmet.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/pci-epf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/pci-epf.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/rdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/rdma.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvme/target/tcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvme/target/tcp.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvmem/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvmem/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvmem/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvmem/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvmem/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvmem/core.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/nvmem/max77759-nvmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvmem/max77759-nvmem.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvmem/qfprom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvmem/qfprom.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/nvmem/rockchip-otp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/nvmem/rockchip-otp.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/of/device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/of/device.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/of/of_reserved_mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/of/of_reserved_mem.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/of/unittest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/of/unittest.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/opp/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/opp/core.c</a></td><td class='right'>428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 6.4%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/opp/cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/opp/cpu.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/opp/of.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/opp/of.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/opp/opp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/opp/opp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/dwc/pci-dra7xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/dwc/pci-dra7xx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/dwc/pci-keystone.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/dwc/pci-keystone.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/dwc/pcie-amd-mdb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/dwc/pcie-amd-mdb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/dwc/pcie-designware-host.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/dwc/pcie-designware-host.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/dwc/pcie-dw-rockchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/dwc/pcie-dw-rockchip.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/dwc/pcie-uniphier.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/dwc/pcie-uniphier.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/mobiveil/pcie-mobiveil-host.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pci-aardvark.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pci-aardvark.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pci-ftpci100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pci-ftpci100.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pci-hyperv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pci-hyperv.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pci-mvebu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pci-mvebu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pci-tegra.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pci-tegra.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pci-xgene-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pci-xgene-msi.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-altera-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-altera-msi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-altera.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-altera.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-apple.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-apple.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-brcmstb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-brcmstb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-iproc-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-iproc-msi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-mediatek-gen3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-mediatek-gen3.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-mediatek.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-mediatek.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-rockchip-host.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-rockchip-host.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-xilinx-cpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-xilinx-cpm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-xilinx-dma-pl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-xilinx-dma-pl.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-xilinx-nwl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-xilinx-nwl.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/pcie-xilinx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/pcie-xilinx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/controller/plda/pcie-plda-host.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/controller/plda/pcie-plda-host.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/hotplug/s390_pci_hpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/hotplug/s390_pci_hpc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/msi/api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/msi/api.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/msi/msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/msi/msi.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/msi/msi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/msi/msi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/p2pdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/p2pdma.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/pci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/pci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/pci.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/quirks.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/setup-bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/setup-bus.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pci/tph.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pci/tph.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/amlogic/meson_ddr_pmu_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/amlogic/meson_ddr_pmu_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/apple_m1_cpu_pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/apple_m1_cpu_pmu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm-cmn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/arm-cmn.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm-ni.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/arm-ni.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_pmuv3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/arm_pmuv3.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_v6_pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/arm_v6_pmu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_v7_pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/arm_v7_pmu.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/perf/arm_xscale_pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/perf/arm_xscale_pmu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/phy-can-transceiver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/phy-can-transceiver.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/qualcomm/phy-qcom-qmp-ufs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/renesas/phy-rcar-gen3-usb2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/renesas/phy-rcar-gen3-usb2.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/starfive/phy-jh7110-usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/starfive/phy-jh7110-usb.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/tegra/xusb-tegra186.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/tegra/xusb-tegra186.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/phy/tegra/xusb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/phy/tegra/xusb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/freescale/pinctrl-imx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/freescale/pinctrl-imx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/mediatek/mtk-eint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/mediatek/mtk-eint.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/mediatek/pinctrl-airoha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/mediatek/pinctrl-airoha.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/mediatek/pinctrl-mtk-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/mediatek/pinctrl-mtk-common.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/meson/pinctrl-meson.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/meson/pinctrl-meson.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/pinctrl-amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/pinctrl-amd.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/pinctrl-at91-pio4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/pinctrl-at91-pio4.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/pinctrl-keembay.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/pinctrl-keembay.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/pinctrl-single.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/pinctrl-single.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/qcom/pinctrl-msm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/qcom/pinctrl-msm.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/qcom/pinctrl-sm8750.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/qcom/pinctrl-sm8750.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pinctrl/sunxi/pinctrl-sunxi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pinctrl/sunxi/pinctrl-sunxi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/arm64/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/arm64/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/arm64/acer-aspire1-ec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/arm64/acer-aspire1-ec.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/arm64/huawei-gaokun-ec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/arm64/huawei-gaokun-ec.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/chromeos_of_hw_prober.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/chromeos_of_hw_prober.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/cros_ec_debugfs.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_proto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/cros_ec_proto.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_proto_test_util.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/cros_ec_proto_test_util.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_ec_typec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/cros_ec_typec.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/chrome/cros_kbd_led_backlight.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/chrome/cros_kbd_led_backlight.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/mlx-platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/mlx-platform.c</a></td><td class='right'>1546</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 35.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 64.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/mlxbf-bootctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/mlxbf-bootctl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/mlxbf-pmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/mlxbf-pmc.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/mlxreg-dpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/mlxreg-dpu.c</a></td><td class='right'>613</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/mlxreg-hotplug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/mlxreg-hotplug.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/mellanox/nvsw-sn2201.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/mellanox/nvsw-sn2201.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/surface/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/surface/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/acerhdf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/acerhdf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/amd_isp4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/amd_isp4.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/hsmp/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/hsmp/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/hsmp/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/hsmp/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/hsmp/acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/hsmp/acpi.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/hsmp/hsmp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/hsmp/hsmp.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/hsmp/hsmp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/hsmp/hsmp.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/hsmp/hwmon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/hsmp/hwmon.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/hsmp/plat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/hsmp/plat.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmc/mp1_stb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmc/mp1_stb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmc/pmc-quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmc/pmc-quirks.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmc/pmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmc/pmc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmf/auto-mode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmf/auto-mode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmf/cnqf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmf/cnqf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmf/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmf/core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmf/pmf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmf/pmf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmf/sps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmf/sps.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/amd/pmf/tee-if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/amd/pmf/tee-if.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/asus-laptop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/asus-laptop.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/asus-wmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/asus-wmi.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/barco-p50-gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/barco-p50-gpio.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/dasharo-acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/dasharo-acpi.c</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/dell/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/dell/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/dell/alienware-wmi-wmax.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/dell/alienware-wmi-wmax.c</a></td><td class='right'>1159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.6%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 73.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/dell/dell-pc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/dell/dell-pc.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/dell/dell-wmi-ddv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/dell/dell-wmi-ddv.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/dell/dell-wmi-sysman/passobj-attributes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/dell/dell-wmi-sysman/passobj-attributes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/eeepc-laptop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/eeepc-laptop.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/fujitsu-laptop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/fujitsu-laptop.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/ideapad-laptop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/ideapad-laptop.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/hid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/hid.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/ifs/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/ifs/core.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/ifs/load.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/ifs/load.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/ifs/runtest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/ifs/runtest.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int0002_vgpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int0002_vgpio.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int3472/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int3472/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int3472/clk_and_regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int3472/clk_and_regulator.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int3472/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int3472/common.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int3472/discrete.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int3472/discrete.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int3472/discrete_quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int3472/discrete_quirks.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int3472/led.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int3472/led.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/int3472/tps68470.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/int3472/tps68470.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/arl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/arl.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/cnp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/cnp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/core.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/core.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/core_ssram.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/core_ssram.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.6%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/mtl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/mtl.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/ssram_telemetry.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/ssram_telemetry.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/pmc/ssram_telemetry.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/pmc/ssram_telemetry.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/speed_select_if/isst_if_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/speed_select_if/isst_if_common.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/tpmi_power_domains.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/tpmi_power_domains.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/tpmi_power_domains.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/tpmi_power_domains.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/turbo_max_3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/turbo_max_3.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/uncore-frequency/uncore-frequency-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/uncore-frequency/uncore-frequency-common.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/uncore-frequency/uncore-frequency-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/uncore-frequency/uncore-frequency-common.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel/vsec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel/vsec.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/intel_ips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/intel_ips.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/msi-wmi-platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/msi-wmi-platform.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/oxpec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/oxpec.c</a></td><td class='right'>1054</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/panasonic-laptop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/panasonic-laptop.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/portwell-ec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/portwell-ec.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/silicom-platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/silicom-platform.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/sony-laptop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/sony-laptop.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/think-lmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/think-lmi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/think-lmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/think-lmi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/thinkpad_acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/thinkpad_acpi.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/topstar-laptop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/topstar-laptop.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/tuxedo/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/tuxedo/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/tuxedo/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/tuxedo/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/tuxedo/nb04/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/tuxedo/nb04/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/tuxedo/nb04/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/tuxedo/nb04/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/tuxedo/nb04/wmi_ab.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/tuxedo/nb04/wmi_ab.c</a></td><td class='right'>923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/tuxedo/nb04/wmi_util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/tuxedo/nb04/wmi_util.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/platform/x86/tuxedo/nb04/wmi_util.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/tuxedo/nb04/wmi_util.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/x86-android-tablets/dmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/x86-android-tablets/dmi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/x86-android-tablets/other.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/x86-android-tablets/other.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/x86-android-tablets/x86-android-tablets.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/x86-android-tablets/x86-android-tablets.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/platform/x86/xo15-ebook.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/platform/x86/xo15-ebook.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/amlogic/meson-ee-pwrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/amlogic/meson-ee-pwrc.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/arm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/arm/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/bcm/bcm2835-power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/bcm/bcm2835-power.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/core.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/governor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/governor.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/pmdomain/mediatek/mt6893-pm-domains.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/mediatek/mt6893-pm-domains.h</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/mediatek/mtk-pm-domains.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/mediatek/mtk-pm-domains.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/mediatek/mtk-pm-domains.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/mediatek/mtk-pm-domains.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/qcom/rpmhpd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/qcom/rpmhpd.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/renesas/rcar-gen4-sysc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/renesas/rcar-gen4-sysc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/renesas/rcar-sysc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/renesas/rcar-sysc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/rockchip/pm-domains.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/rockchip/pm-domains.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/sunxi/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/sunxi/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/sunxi/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/sunxi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/sunxi/sun50i-h6-prcm-ppu.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pmdomain/ti/omap_prm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pmdomain/ti/omap_prm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pnp/quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pnp/quirks.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/reset/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/reset/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/reset/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/reset/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/reset/at91-reset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/reset/at91-reset.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/reset/reboot-mode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/reset/reboot-mode.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/reset/syscon-reboot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/reset/syscon-reboot.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/power/reset/tdx-ec-poweroff.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/reset/tdx-ec-poweroff.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/bq24190_charger.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/bq24190_charger.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/bq27xxx_battery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/bq27xxx_battery.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/bq27xxx_battery_i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/bq27xxx_battery_i2c.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/power/supply/chagall-battery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/chagall-battery.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/collie_battery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/collie_battery.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/cros_charge-control.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/cros_charge-control.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/gpio-charger.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/gpio-charger.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/power/supply/huawei-gaokun-battery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/huawei-gaokun-battery.c</a></td><td class='right'>645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/max17040_battery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/max17040_battery.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/max77705_charger.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/max77705_charger.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/power/supply/max8971_charger.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/max8971_charger.c</a></td><td class='right'>752</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/power_supply_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/power_supply_sysfs.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/rk817_charger.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/rk817_charger.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/rt9471.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/rt9471.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/test_power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/test_power.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/power/supply/wm831x_power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/power/supply/wm831x_power.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/powercap/intel_rapl_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/powercap/intel_rapl_common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/powercap/intel_rapl_msr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/powercap/intel_rapl_msr.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pps/generators/pps_gen_tio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pps/generators/pps_gen_tio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ptp/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_chardev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ptp/ptp_chardev.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_clockmatrix.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ptp/ptp_clockmatrix.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_fc3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ptp/ptp_fc3.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_idt82p33.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ptp/ptp_idt82p33.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ptp/ptp_ocp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ptp/ptp_ocp.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/Kconfig</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/core.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-adp5585.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-adp5585.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-axi-pwmgen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-axi-pwmgen.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-fsl-ftm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-fsl-ftm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-loongson.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-loongson.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-mc33xs2410.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-mc33xs2410.c</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-mediatek.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-mediatek.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-meson.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-meson.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-pca9685.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-pca9685.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-pxa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-pxa.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-rcar.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-rcar.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-rzg2l-gpt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-rzg2l-gpt.c</a></td><td class='right'>447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/pwm/pwm-stm32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/pwm/pwm-stm32.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ras/amd/atl/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ras/amd/atl/internal.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ras/amd/atl/umc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ras/amd/atl/umc.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ras/amd/fmpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ras/amd/fmpm.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/regulator/adp5055-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/adp5055-regulator.c</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/da9121-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/da9121-regulator.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/gpio-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/gpio-regulator.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/max20086-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/max20086-regulator.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/pca9450-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/pca9450-regulator.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/pf9453-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/pf9453-regulator.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/qcom_spmi-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/qcom_spmi-regulator.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/rpi-panel-attiny-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/rpi-panel-attiny-regulator.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/s5m8767.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/s5m8767.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/regulator/tps65219-regulator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/regulator/tps65219-regulator.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/remoteproc/qcom_wcnss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/remoteproc/qcom_wcnss.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/block/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/block/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/block/dcssblk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/block/dcssblk.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/char/con3270.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/char/con3270.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/char/diag_ftp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/char/diag_ftp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/ap_bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/ap_bus.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/ap_bus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/ap_bus.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_api.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_base.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_base.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_cca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_cca.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_ep11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_ep11.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_pckmo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_pckmo.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_sysfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/pkey_uv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/pkey_uv.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_api.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_api.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_ccamisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_ccamisc.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_ccamisc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_ccamisc.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_cex4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_cex4.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_ep11misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_ep11misc.c</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_ep11misc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_ep11misc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_msgtype50.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_msgtype50.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/crypto/zcrypt_msgtype6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/crypto/zcrypt_msgtype6.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/net/ctcm_mpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/net/ctcm_mpc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/net/ism_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/net/ism_drv.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/scsi/zfcp_aux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/scsi/zfcp_aux.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/s390/virtio/virtio_ccw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/s390/virtio/virtio_ccw.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/aha152x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/aha152x.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/dc395x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/dc395x.c</a></td><td class='right'>697</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 15.3%;'/><td class='none' style='width: 84.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/elx/libefc_sli/sli4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/elx/libefc_sli/sli4.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/fnic/fip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/fnic/fip.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/hisi_sas/hisi_sas.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/hisi_sas/hisi_sas_main.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/hisi_sas/hisi_sas_v1_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/hisi_sas/hisi_sas_v2_hw.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/hisi_sas/hisi_sas_v3_hw.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/imm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/imm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/isci/remote_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/isci/remote_device.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/isci/remote_device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/isci/remote_device.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_attr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_attr.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_bsg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_bsg.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_hbadisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_hbadisc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_init.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_nvme.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_nvme.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_sli.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_sli.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_version.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/lpfc/lpfc_vport.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/lpfc/lpfc_vport.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_mbox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/megaraid/megaraid_mbox.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_mm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/megaraid/megaraid_mm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_sas.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/megaraid/megaraid_sas.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_sas_base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/megaraid/megaraid_sas_base.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/megaraid/megaraid_sas_fusion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/megaraid/megaraid_sas_fusion.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi3mr_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/mpi3mr/mpi3mr_fw.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpi3mr/mpi3mr_os.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/mpi3mr/mpi3mr_os.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mpt3sas/mpt3sas_ctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/mpt3sas/mpt3sas_ctl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/mvsas/mv_64xx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/mvsas/mv_64xx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/myrb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/myrb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/pm8001/pm8001_ctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/pm8001/pm8001_ctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/pm8001/pm8001_sas.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/pm8001/pm8001_sas.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/ppa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/ppa.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedf/qedf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qedf/qedf_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedi/qedi_dbg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qedi/qedi_dbg.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedi/qedi_dbg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qedi/qedi_dbg.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedi/qedi_gbl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qedi/qedi_gbl.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qedi/qedi_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qedi/qedi_main.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_dbg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_dbg.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_dbg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_dbg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_gbl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_gbl.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_gs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_gs.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_nx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_nx.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_os.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_os.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_target.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_target.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla2xxx/qla_target.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla2xxx/qla_target.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/qla4xxx/ql4_nx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/qla4xxx/ql4_nx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_debug.c</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_devinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_devinfo.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_ioctl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_lib.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_priv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_transport_fc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_transport_fc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_transport_iscsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_transport_iscsi.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/scsi_transport_srp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/scsi_transport_srp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/sd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/sd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/sd_zbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/sd_zbc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/sg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/sg.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/smartpqi/smartpqi_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/smartpqi/smartpqi_init.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/scsi/storvsc_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/scsi/storvsc_drv.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/sh/intc/irqdomain.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/sh/intc/irqdomain.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/dove/pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/dove/pmu.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/fsl/qe/qe_ic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/fsl/qe/qe_ic.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/ice.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/qcom/ice.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/smp2p.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/qcom/smp2p.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/qcom/smsm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/qcom/smsm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/renesas/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/renesas/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/samsung/exynos-usi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/samsung/exynos-usi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/tegra/pmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/tegra/pmc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soc/ti/ti_sci_inta_msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soc/ti/ti_sci_inta_msi.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soundwire/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soundwire/bus.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/soundwire/intel_auxdevice.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/soundwire/intel_auxdevice.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/atmel-quadspi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/atmel-quadspi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/spi/spi-amd-pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-amd-pci.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-amd.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/spi/spi-amd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-amd.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-axi-spi-engine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-axi-spi-engine.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-cadence-quadspi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-cadence-quadspi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-cavium-thunderx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-cavium-thunderx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-cs42l43.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-cs42l43.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-dw-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-dw-core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-fsl-dspi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-fsl-dspi.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-fsl-qspi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-fsl-qspi.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-gpio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-imx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-imx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-intel-pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-intel-pci.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-intel-platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-intel-platform.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-intel.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-intel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-intel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-loopback-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-loopback-test.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-mem.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-meson-spicc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-meson-spicc.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-nxp-fspi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-nxp-fspi.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-offload.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-pci1xxxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-pci1xxxx.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-qpic-snand.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-qpic-snand.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-rpc-if.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-rpc-if.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-sh-msiof.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-sh-msiof.c</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-stm32-ospi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-stm32-ospi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-sun4i.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-sun4i.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-tegra114.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-tegra114.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-tegra210-quad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-tegra210-quad.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi-xcomm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi-xcomm.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/spi/spi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/spi/spi.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ssb/driver_gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ssb/driver_gpio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/axis-fifo/axis-fifo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/axis-fifo/axis-fifo.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/gpib/common/iblib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/gpib/common/iblib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/iio/adc/ad7816.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/iio/adc/ad7816.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/i2c/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/i2c/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/i2c/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/i2c/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/i2c/atomisp-mt9m114.c</a></td><td class='right'>1612</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 37.0%;'/><td class='none' style='width: 63.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/i2c/mt9m114.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/i2c/mt9m114.h</a></td><td class='right'>1768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 40.6%;'/><td class='none' style='width: 59.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_cmd.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_compat_css20.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_compat_css20.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_compat_ioctl32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_compat_ioctl32.h</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_csi2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_csi2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_internal.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_ioctl.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_ioctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_ioctl.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/atomisp_v4l2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/atomisp_v4l2.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/hive_isp_css_common/irq_global.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/hive_isp_css_common/irq_global.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/ia_css_sdis2_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/isp/kernels/vf/vf_1.0/ia_css_vf.host.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/rkvdec/rkvdec-h264.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/rkvdec/rkvdec-h264.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/rkvdec/rkvdec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/rkvdec/rkvdec.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/rkvdec/rkvdec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/rkvdec/rkvdec.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/media/starfive/camss/stf-isp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/media/starfive/camss/stf-isp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/target/iscsi/iscsi_target.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/target/iscsi/iscsi_target.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/target/target_core_configfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/target/target_core_configfs.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/target/target_core_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/target/target_core_device.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/target/target_core_spc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/target/target_core_spc.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/target/target_core_stat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/target/target_core_stat.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/target/target_core_transport.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/target/target_core_transport.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/thermal/airoha_thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/airoha_thermal.c</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/amlogic_thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/amlogic_thermal.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/broadcom/bcm2835_thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/broadcom/bcm2835_thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/int340x_thermal/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/platform_temperature_control.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/int340x_thermal/platform_temperature_control.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/int340x_thermal/processor_thermal_device.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/int340x_thermal/processor_thermal_device.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/intel_hfi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/intel_hfi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/intel_powerclamp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/intel_powerclamp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/intel_tcc_cooling.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/intel_tcc_cooling.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/therm_throt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/therm_throt.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/intel/x86_pkg_temp_thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/intel/x86_pkg_temp_thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/mediatek/lvts_thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/mediatek/lvts_thermal.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/lmh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/qcom/lmh.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/tsens-v1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/qcom/tsens-v1.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/tsens.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/qcom/tsens.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/qcom/tsens.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/qcom/tsens.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/thermal/tegra/soctherm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/thermal/tegra/soctherm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tty/serial/msm_serial.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/tty/serial/msm_serial.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tty/serial/sifive.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/tty/serial/sifive.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/tty/vt/selection.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/tty/vt/selection.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/core/ufs-mcq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/core/ufs-mcq.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/core/ufs-sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/core/ufs-sysfs.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/core/ufshcd-priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/core/ufshcd-priv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/core/ufshcd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/core/ufshcd.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-exynos.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/host/ufs-exynos.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-exynos.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/host/ufs-exynos.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-qcom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/host/ufs-qcom.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/ufs/host/ufs-qcom.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ufs/host/ufs-qcom.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/uio/uio_hv_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/uio/uio_hv_generic.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/atm/cxacru.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/atm/cxacru.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/cdns3/cdns3-gadget.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/cdns3/cdns3-gadget.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/cdns3/cdnsp-gadget.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/cdns3/cdnsp-gadget.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/cdns3/cdnsp-gadget.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/cdns3/cdnsp-gadget.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/cdns3/cdnsp-pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/cdns3/cdnsp-pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/cdns3/cdnsp-ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/cdns3/cdnsp-ring.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/cdns3/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/cdns3/core.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/chipidea/ci_hdrc_imx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/chipidea/ci_hdrc_imx.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/class/cdc-wdm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/class/cdc-wdm.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/class/usbtmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/class/usbtmc.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/core/quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/core/quirks.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/dwc3/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/dwc3/core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/dwc3/dwc3-xilinx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/dwc3/dwc3-xilinx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/dwc3/gadget.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/dwc3/gadget.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/gadget/composite.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/gadget/composite.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/gadget/function/f_ecm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/gadget/function/f_ecm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/gadget/function/f_midi2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/gadget/function/f_midi2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/gadget/udc/tegra-xudc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/gadget/udc/tegra-xudc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/ohci-pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/ohci-pci.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/uhci-platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/uhci-platform.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci-dbgcap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/xhci-dbgcap.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci-dbgcap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/xhci-dbgcap.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci-hub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/xhci-hub.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci-ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/xhci-ring.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci-tegra.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/xhci-tegra.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/xhci.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/host/xhci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/host/xhci.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/misc/onboard_usb_dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/misc/onboard_usb_dev.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/misc/usbtest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/misc/usbtest.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/serial/ftdi_sio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/serial/ftdi_sio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/serial/ftdi_sio_ids.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/serial/ftdi_sio_ids.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/serial/option.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/serial/option.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/serial/usb-serial-simple.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/serial/usb-serial-simple.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/storage/unusual_uas.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/storage/unusual_uas.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/storage/usb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/storage/usb.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/class.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/typec/class.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/class.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/typec/class.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/tcpm/tcpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/typec/tcpm/tcpm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/ucsi/displayport.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/typec/ucsi/displayport.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/ucsi/ucsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/typec/ucsi/ucsi.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/ucsi/ucsi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/typec/ucsi/ucsi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/usb/typec/ucsi/ucsi_ccg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/usb/typec/ucsi/ucsi_ccg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vdpa/octeon_ep/octep_vdpa_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vdpa/octeon_ep/octep_vdpa_main.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/mlx5/cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/pci/mlx5/cmd.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/mlx5/cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/pci/mlx5/cmd.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/mlx5/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/pci/mlx5/main.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/vfio_pci_config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/pci/vfio_pci_config.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/pci/vfio_pci_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/pci/vfio_pci_core.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vfio/vfio_iommu_type1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vfio/vfio_iommu_type1.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vhost/net.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vhost/net.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vhost/scsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vhost/scsi.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vhost/vhost.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vhost/vhost.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/vhost/vringh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/vhost/vringh.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/geode/display_gx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/video/fbdev/geode/display_gx.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/geode/gxfb_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/video/fbdev/geode/gxfb_core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/geode/lxfb_ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/video/fbdev/geode/lxfb_ops.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/geode/suspend_gx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/video/fbdev/geode/suspend_gx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/fbdev/geode/video_gx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/video/fbdev/geode/video_gx.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/video/screen_info_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/video/screen_info_generic.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/coco/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/coco/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/coco/arm-cca-guest/arm-cca-guest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/arm-cca-guest/arm-cca-guest.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virt/coco/guest/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/guest/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virt/coco/guest/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/guest/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/drivers/virt/coco/guest/report.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/guest/report.c</a> (renamed from drivers/virt/coco/tsm.c)</td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virt/coco/guest/tsm-mr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/guest/tsm-mr.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/coco/sev-guest/sev-guest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/sev-guest/sev-guest.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/coco/tdx-guest/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/tdx-guest/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virt/coco/tdx-guest/tdx-guest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virt/coco/tdx-guest/tdx-guest.c</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/Kconfig</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/virtio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_pci_modern.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio_pci_modern.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio_ring.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_rtc_arm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio_rtc_arm.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_rtc_class.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio_rtc_class.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_rtc_driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio_rtc_driver.c</a></td><td class='right'>1407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 32.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 67.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_rtc_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio_rtc_internal.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/drivers/virtio/virtio_rtc_ptp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/virtio/virtio_rtc_ptp.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/w1/slaves/w1_ds2406.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/w1/slaves/w1_ds2406.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/watchdog/diag288_wdt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/watchdog/diag288_wdt.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/watchdog/exar_wdt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/watchdog/exar_wdt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/balloon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/balloon.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/swiotlb-xen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/swiotlb-xen.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/xenbus/xenbus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/xenbus/xenbus.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/xenbus/xenbus_comms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/xenbus/xenbus_comms.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/xenbus/xenbus_dev_frontend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/xenbus/xenbus_dev_frontend.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/xenbus/xenbus_probe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/xenbus/xenbus_probe.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/xenbus/xenbus_probe_frontend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/xenbus/xenbus_probe_frontend.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/drivers/xen/xenbus/xenbus_xs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/xen/xenbus/xenbus_xs.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/9p/vfs_addr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/9p/vfs_addr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/afs/cm_security.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/cm_security.c</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/dir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/dir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/dir_silly.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/dir_silly.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/dynroot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/dynroot.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/internal.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/misc.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/rxrpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/rxrpc.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/afs/server.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/afs/server.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/aio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/aio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/anon_inodes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/anon_inodes.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/autofs/dev-ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/autofs/dev-ioctl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/alloc_background.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/alloc_background.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/alloc_background.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/alloc_background.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/alloc_foreground.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/alloc_foreground.c</a></td><td class='right'>546</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 7.0%;'/><td class='none' style='width: 87.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/alloc_foreground.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/alloc_foreground.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/alloc_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/alloc_types.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/async_objs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/async_objs.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/async_objs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/async_objs.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/async_objs_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/async_objs_types.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/backpointers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/backpointers.c</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/backpointers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/backpointers.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bcachefs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/bcachefs.h</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bcachefs_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/bcachefs_format.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bkey.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/bkey.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bkey.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/bkey.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bkey_methods.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/bkey_methods.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/bset.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/bset.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/bset.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_cache.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_gc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_gc.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_gc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_gc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_io.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_io.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_iter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_iter.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_iter.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_iter.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_journal_iter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_journal_iter.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_key_cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_key_cache.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_key_cache.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_key_cache.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_locking.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_locking.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_locking.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_locking.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_node_scan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_node_scan.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_trans_commit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_trans_commit.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_types.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_update.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_update.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_update.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_update.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_update_interior.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_update_interior.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_update_interior.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_update_interior.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_write_buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_write_buffer.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/btree_write_buffer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/btree_write_buffer.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/buckets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/buckets.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/buckets.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/buckets.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/chardev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/chardev.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/checksum.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/checksum.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/checksum.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/checksum.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/clock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/clock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/compress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/compress.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/darray.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/darray.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/data_update.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/data_update.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/data_update.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/data_update.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/debug.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/debug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/debug.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/dirent.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/dirent.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/dirent.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/dirent.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/disk_accounting.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/disk_accounting.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/disk_accounting.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/disk_accounting.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/disk_groups.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/disk_groups.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/ec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/ec.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/ec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/ec.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/ec_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/ec_types.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/enumerated_ref.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/enumerated_ref.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/enumerated_ref.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/enumerated_ref.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/enumerated_ref_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/enumerated_ref_types.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/errcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/errcode.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/error.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/error.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/error.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/error.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/extent_update.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/extent_update.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/extent_update.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/extent_update.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/extents.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/extents.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/extents.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/extents.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/extents_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/extents_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/fast_list.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fast_list.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/fast_list.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fast_list.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs-io-buffered.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fs-io-buffered.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs-io-direct.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fs-io-direct.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs-io-pagecache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fs-io-pagecache.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs-io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fs-io.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs-ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fs-ioctl.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs-ioctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fs-ioctl.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fs.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/fsck.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/fsck.c</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/inode.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/inode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/inode.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/inode_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/inode_format.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/io_read.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/io_read.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/io_read.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/io_read.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/io_write.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/io_write.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/io_write.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/io_write.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/io_write_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/io_write_types.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/journal.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/journal.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/journal_io.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal_reclaim.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/journal_reclaim.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal_seq_blacklist.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/journal_seq_blacklist.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal_seq_blacklist.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/journal_seq_blacklist.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/journal_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/journal_types.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/migrate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/migrate.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/migrate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/migrate.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/move.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/move.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/move.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/move.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/move_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/move_types.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/movinggc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/movinggc.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/movinggc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/movinggc.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/namei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/namei.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/namei.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/namei.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/nocow_locking.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/nocow_locking.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/nocow_locking.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/nocow_locking.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/opts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/opts.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/opts.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/opts.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/rebalance.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/rebalance.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/rebalance.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/rebalance.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/rebalance_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/rebalance_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/recovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/recovery.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/recovery.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/recovery.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/recovery_passes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/recovery_passes.c</a></td><td class='right'>599</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 86.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/recovery_passes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/recovery_passes.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/recovery_passes_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/recovery_passes_format.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/recovery_passes_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/recovery_passes_types.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/reflink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/reflink.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-counters_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sb-counters_format.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-downgrade.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sb-downgrade.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-errors_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sb-errors_format.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-members.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sb-members.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-members.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sb-members.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-members_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sb-members_format.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sb-members_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sb-members_types.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/snapshot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/snapshot.c</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.8%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/snapshot.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/snapshot.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/snapshot_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/snapshot_format.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/bcachefs/snapshot_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/snapshot_types.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/str_hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/str_hash.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/str_hash.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/str_hash.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/subvolume.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/subvolume.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/subvolume.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/subvolume.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/subvolume_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/subvolume_types.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/super-io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/super-io.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/super-io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/super-io.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/super.c</a></td><td class='right'>862</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.5%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 80.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/super.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/super.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/sysfs.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/tests.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/tests.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/thread_with_file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/thread_with_file.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/trace.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/util.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/util.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/util.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/xattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/xattr.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/xattr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/xattr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bcachefs/xattr_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bcachefs/xattr_format.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/bfs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/bfs/inode.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/binfmt_elf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/binfmt_elf.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/binfmt_misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/binfmt_misc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/Kconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/async-thread.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/async-thread.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/backref.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/backref.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/backref.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/backref.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/bio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/bio.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/bio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/bio.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/block-group.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/block-group.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/block-group.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/block-group.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/block-rsv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/block-rsv.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/block-rsv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/block-rsv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/btrfs_inode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/btrfs_inode.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/compression.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/compression.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/compression.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/compression.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ctree.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/ctree.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/defrag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/defrag.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delalloc-space.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/delalloc-space.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delalloc-space.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/delalloc-space.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delayed-inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/delayed-inode.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delayed-ref.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/delayed-ref.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/delayed-ref.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/delayed-ref.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/dev-replace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/dev-replace.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/dev-replace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/dev-replace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/direct-io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/direct-io.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/discard.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/discard.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/disk-io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/disk-io.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/disk-io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/disk-io.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent-io-tree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent-io-tree.c</a></td><td class='right'>510</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent-io-tree.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent-io-tree.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent-tree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent-tree.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent-tree.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent-tree.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent_io.c</a></td><td class='right'>961</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.7%;'/><td class='rem' style='width: 11.4%;'/><td class='none' style='width: 77.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent_io.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_map.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent_map.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/extent_map.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/extent_map.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/fiemap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/fiemap.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/file-item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/file-item.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/file-item.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/file-item.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/file.c</a></td><td class='right'>775</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 82.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/free-space-cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/free-space-cache.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/free-space-tree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/free-space-tree.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/fs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/inode-item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/inode-item.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/inode.c</a></td><td class='right'>700</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 7.0%;'/><td class='none' style='width: 83.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/ioctl.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/locking.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/locking.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/locking.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/locking.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/lzo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/lzo.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/messages.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/messages.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/ordered-data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/ordered-data.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/qgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/qgroup.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/raid56.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/raid56.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/reflink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/reflink.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/relocation.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/relocation.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/scrub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/scrub.c</a></td><td class='right'>474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/send.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/send.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/space-info.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/space-info.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/space-info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/space-info.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/subpage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/subpage.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/super.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/sysfs.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tests/btrfs-tests.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/tests/btrfs-tests.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tests/extent-io-tests.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/tests/extent-io-tests.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tests/extent-map-tests.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/tests/extent-map-tests.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tests/inode-tests.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/tests/inode-tests.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/transaction.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/transaction.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tree-checker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/tree-checker.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/tree-log.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/tree-log.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/volumes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/volumes.c</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/volumes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/volumes.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/zlib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/zlib.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/zoned.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/zoned.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/btrfs/zstd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/btrfs/zstd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/buffer.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/cachefiles/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/cachefiles/internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/cachefiles/key.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/cachefiles/key.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/cachefiles/namei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/cachefiles/namei.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ceph/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ceph/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ceph/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ceph/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/configfs/dir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/configfs/dir.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/configfs/item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/configfs/item.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/coredump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/coredump.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/crypto/fscrypt_private.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/crypto/fscrypt_private.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/crypto/hkdf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/crypto/hkdf.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/crypto/inline_crypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/crypto/inline_crypt.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/crypto/keyring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/crypto/keyring.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/crypto/keysetup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/crypto/keysetup.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/crypto/keysetup_v1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/crypto/keysetup_v1.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dax.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/dax.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dcache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/dcache.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/debugfs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/debugfs/inode.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/devpts/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/devpts/inode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/dlm/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/dlm/config.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/dlm/lowcomms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/dlm/lowcomms.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ecryptfs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ecryptfs/inode.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/efivarfs/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/efivarfs/internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/efivarfs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/efivarfs/super.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/compress.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/compress.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/data.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/erofs/decompressor_crypto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/decompressor_crypto.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/decompressor_deflate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/decompressor_deflate.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/erofs_fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/erofs_fs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/fileio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/fileio.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/internal.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/super.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/sysfs.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/zdata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/zdata.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/erofs/zmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/erofs/zmap.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/eventpoll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/eventpoll.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/exec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/exec.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/exfat/nls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/exfat/nls.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/exfat/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/exfat/super.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/exportfs/expfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/exportfs/expfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext2/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext2/super.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/bitmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/bitmap.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/block_validity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/block_validity.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/ext4.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/ext4.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/ext4_jbd2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/ext4_jbd2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/ext4_jbd2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/ext4_jbd2.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/extents.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/extents.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/extents_status.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/extents_status.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/fast_commit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/fast_commit.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/file.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/ialloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/ialloc.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/inline.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/inline.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/inode.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.1%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/ioctl.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/mballoc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/mballoc.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/mmp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/mmp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/move_extent.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/move_extent.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/namei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/namei.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/orphan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/orphan.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/readpage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/readpage.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/resize.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/resize.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/super.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ext4/xattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ext4/xattr.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/acl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/acl.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/acl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/acl.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/checkpoint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/checkpoint.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/compress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/compress.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/data.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/dir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/dir.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/extent_cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/extent_cache.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/f2fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/f2fs.h</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/file.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/gc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/gc.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/inline.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/inline.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/inode.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/namei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/namei.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/node.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/node.c</a></td><td class='right'>610</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/node.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/node.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/recovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/recovery.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/segment.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/segment.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/segment.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/segment.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/shrinker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/shrinker.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/super.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/sysfs.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/xattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/xattr.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/f2fs/xattr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/f2fs/xattr.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/file.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/file_table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/file_table.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/filesystems.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/filesystems.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fs_context.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/fs_context.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fs_parser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/fs_parser.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fuse/dir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/fuse/dir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fuse/readdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/fuse/readdir.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/fuse/virtio_fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/fuse/virtio_fs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/aops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/aops.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/aops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/aops.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/bmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/bmap.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/glock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/glock.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/glops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/glops.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/incore.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/incore.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/inode.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/inode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/inode.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/lock_dlm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/lock_dlm.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/log.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/log.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/log.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/log.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/lops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/lops.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/lops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/lops.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/meta_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/meta_io.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/meta_io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/meta_io.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/ops_fstype.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/ops_fstype.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/recovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/recovery.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/recovery.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/recovery.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/super.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/sys.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/sys.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/trans.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/trans.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/trans.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/trans.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/util.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/xattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/xattr.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/gfs2/xattr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/gfs2/xattr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/hfs/bnode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/hfs/bnode.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/hfsplus/bnode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/hfsplus/bnode.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/hfsplus/wrapper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/hfsplus/wrapper.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/internal.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ioctl.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/iomap/buffered-io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/iomap/buffered-io.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/iomap/trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/iomap/trace.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/isofs/export.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/isofs/export.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/isofs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/isofs/inode.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/isofs/isofs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/isofs/isofs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/isofs/rock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/isofs/rock.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/isofs/rock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/isofs/rock.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/isofs/util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/isofs/util.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jbd2/commit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jbd2/commit.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jbd2/journal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jbd2/journal.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jbd2/recovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jbd2/recovery.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jbd2/revoke.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jbd2/revoke.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jbd2/transaction.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jbd2/transaction.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jfs/jfs_discard.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jfs/jfs_discard.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jfs/jfs_dmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jfs/jfs_dmap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/jfs/jfs_dtree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/jfs/jfs_dtree.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/kernfs/dir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/kernfs/dir.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/kernfs/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/kernfs/file.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/kernfs/kernfs-internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/kernfs/kernfs-internal.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/kernfs/mount.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/kernfs/mount.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/libfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/libfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/mpage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/mpage.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/namei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/namei.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/namespace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/namespace.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/fscache_cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/netfs/fscache_cache.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/fscache_cookie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/netfs/fscache_cookie.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/netfs/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/netfs/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/client.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/client.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/dir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/dir.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/direct.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/direct.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/filelayout/filelayoutdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/filelayout/filelayoutdev.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/flexfilelayout/flexfilelayout.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/flexfilelayout/flexfilelayout.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/flexfilelayout/flexfilelayoutdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/flexfilelayout/flexfilelayoutdev.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/internal.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/localio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/localio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/netns.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/netns.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/nfs3acl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/nfs3acl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/nfs4proc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/nfs4proc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/nfs4session.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/nfs4session.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/nfs4trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/nfs4trace.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/pnfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/pnfs.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/pnfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/pnfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/pnfs_nfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/pnfs_nfs.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/symlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/symlink.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfs/unlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfs/unlink.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/nfsd/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/debugfs.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/export.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/export.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs3proc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfs3proc.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs3xdr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfs3xdr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs4callback.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfs4callback.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs4proc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfs4proc.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs4recover.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfs4recover.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs4state.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfs4state.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfs4xdr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfs4xdr.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfsctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfsctl.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfsd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfsd.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfsfh.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfsfh.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfsproc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfsproc.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfssvc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfssvc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/nfsxdr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/nfsxdr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/state.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/state.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/trace.h</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/vfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/vfs.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/vfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/vfs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/xdr4.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/xdr4.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nfsd/xdr4cb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nfsd/xdr4cb.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/nilfs2/the_nilfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/nilfs2/the_nilfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/notify/fanotify/fanotify.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/notify/fanotify/fanotify.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/notify/fanotify/fanotify.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/notify/fanotify/fanotify.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/notify/fanotify/fanotify_user.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/notify/fanotify/fanotify_user.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/attrib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/attrib.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/file.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/frecord.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/frecord.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/fslog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/fslog.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/index.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/index.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/inode.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/namei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/namei.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ntfs3/ntfs_fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ntfs3/ntfs_fs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/alloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/alloc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/journal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/journal.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/journal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/journal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/ocfs2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/ocfs2.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/quota_local.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/quota_local.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/suballoc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/suballoc.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/suballoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/suballoc.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ocfs2/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ocfs2/super.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/omfs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/omfs/inode.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/open.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/open.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/orangefs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/orangefs/inode.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/orangefs/orangefs-kernel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/orangefs/orangefs-kernel.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/orangefs/orangefs-mod.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/orangefs/orangefs-mod.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/orangefs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/orangefs/super.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/export.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/overlayfs/export.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/namei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/overlayfs/namei.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/overlayfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/overlayfs/overlayfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/readdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/overlayfs/readdir.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/overlayfs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/overlayfs/super.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/pidfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/pidfs.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/pnode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/pnode.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/pnode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/pnode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/proc/base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/proc/base.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/proc/meminfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/proc/meminfo.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/proc_namespace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/proc_namespace.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/quota/dquot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/quota/dquot.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/read_write.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/read_write.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/readdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/readdir.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/ctrlmondata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/ctrlmondata.c</a></td><td class='right'>661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/internal.h</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/monitor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/monitor.c</a></td><td class='right'>929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/monitor_trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/monitor_trace.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/pseudo_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/pseudo_lock.c</a></td><td class='right'>1105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 25.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 74.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/fs/resctrl/rdtgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/resctrl/rdtgroup.c</a></td><td class='right'>4353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 100.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/select.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/select.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cached_dir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/cached_dir.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsencrypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/cifsencrypt.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/cifsfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsglob.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/cifsglob.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifspdu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/cifspdu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifsproto.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/cifsproto.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/cifssmb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/cifssmb.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/connect.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/connect.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/file.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/fs_context.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/fs_context.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/fs_context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/fs_context.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/inode.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/readdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/readdir.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/reparse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/reparse.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/reparse.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/reparse.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/sess.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/sess.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb1ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/smb1ops.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/smb2inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/smb2ops.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/client/smb2pdu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/client/smb2pdu.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/common/smb2pdu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/common/smb2pdu.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/auth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/auth.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/connection.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/connection.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/mgmt/user_session.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/mgmt/user_session.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/mgmt/user_session.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/mgmt/user_session.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/oplock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/oplock.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/oplock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/oplock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/smb2pdu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/smb2pdu.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/smb_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/smb_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/transport_ipc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/transport_ipc.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/transport_tcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/transport_tcp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/transport_tcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/transport_tcp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/vfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/vfs.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/smb/server/vfs_cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/smb/server/vfs_cache.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/splice.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/splice.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/stat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/stat.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/super.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/sysfs/group.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/sysfs/group.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/tracefs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/tracefs/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/ubifs/compress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/ubifs/compress.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/udf/truncate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/udf/truncate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/userfaultfd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/userfaultfd.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/vboxsf/file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/vboxsf/file.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xattr.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/libxfs/xfs_bmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/libxfs/xfs_bmap.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/libxfs/xfs_bmap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/libxfs/xfs_bmap.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/libxfs/xfs_log_rlimit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/libxfs/xfs_log_rlimit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/libxfs/xfs_trans_resv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/libxfs/xfs_trans_resv.c</a></td><td class='right'>343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/libxfs/xfs_trans_resv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/libxfs/xfs_trans_resv.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/scrub/fscounters.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/scrub/fscounters.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/scrub/orphanage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/scrub/orphanage.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/scrub/scrub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/scrub/scrub.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_bio_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_bio_io.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_bmap_item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_bmap_item.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_bmap_item.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_bmap_item.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_buf.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_buf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_buf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_buf_item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_buf_item.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_buf_item.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_buf_item.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_buf_mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_buf_mem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_discard.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_discard.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_dquot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_dquot.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_extfree_item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_extfree_item.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_extfree_item.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_extfree_item.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_file.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_filestream.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_filestream.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_fsmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_fsmap.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_globals.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_globals.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_inode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_inode.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_inode_item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_inode_item.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_iomap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_iomap.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_iomap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_iomap.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_iops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_iops.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_iops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_iops.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_log.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_log.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_log_cil.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_log_cil.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_log_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_log_priv.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_message.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_message.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_message.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_message.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_mount.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_mount.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_mount.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_mount.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_mru_cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_mru_cache.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_notify_failure.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_notify_failure.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_pnfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_pnfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_refcount_item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_refcount_item.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_refcount_item.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_refcount_item.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_reflink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_reflink.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_reflink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_reflink.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_rmap_item.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_rmap_item.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_rmap_item.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_rmap_item.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_super.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_sysctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_sysctl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_sysfs.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_trace.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_trans_ail.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_trans_ail.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_trans_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_trans_priv.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_zone_alloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_zone_alloc.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/xfs/xfs_zone_gc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/xfs/xfs_zone_gc.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/fs/zonefs/super.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>fs/zonefs/super.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acbuffer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acbuffer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acconfig.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acconfig.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acexcep.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acexcep.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acnames.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acnames.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acoutput.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acoutput.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acpi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acpiosxf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acpiosxf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acpixf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acpixf.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acrestyp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acrestyp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actbl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/actbl.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actbl1.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/actbl1.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actbl2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/actbl2.h</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actbl3.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/actbl3.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/actypes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/actypes.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/acuuid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/acuuid.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/cppc_acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/cppc_acpi.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/platform/acenv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/platform/acenv.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/platform/acenvex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/platform/acenvex.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/platform/acgcc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/platform/acgcc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/platform/acgccex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/platform/acgccex.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/platform/aclinux.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/platform/aclinux.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/platform/aclinuxex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/platform/aclinuxex.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/acpi/platform/aczephyr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/acpi/platform/aczephyr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/asm-generic/simd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/asm-generic/simd.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/asm-generic/vmlinux.lds.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/asm-generic/vmlinux.lds.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/acompress.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/acompress.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/algapi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/algapi.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/blake2b.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/blake2b.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/chacha.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/chacha.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/ctr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/ctr.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/ghash.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/ghash.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/hash.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/hash.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/acompress.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/acompress.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/blake2b.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/blake2b.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/crypto/internal/blockhash.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/blockhash.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/crypto/internal/chacha.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/chacha.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/engine.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/engine.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/geniv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/geniv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/hash.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/hash.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/poly1305.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/poly1305.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/scompress.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/scompress.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/crypto/internal/sha2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/sha2.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/simd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/simd.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/internal/skcipher.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/internal/skcipher.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/krb5.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/krb5.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/md5.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/md5.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/null.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/null.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/poly1305.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/poly1305.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/polyval.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/polyval.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/rng.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/rng.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/scatterwalk.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/scatterwalk.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sha1.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sha1.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sha1_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sha1_base.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sha2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sha2.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/crypto/sha256_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sha256_base.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sha3.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sha3.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sha512_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sha512_base.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sig.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sig.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sm3.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sm3.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/sm3_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/sm3_base.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/crypto/streebog.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/crypto/streebog.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/cxl/features.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/cxl/features.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/bridge/analogix_dp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/bridge/analogix_dp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/display/drm_dp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/display/drm_dp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/display/drm_dp_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/display/drm_dp_helper.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/display/drm_hdmi_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/display/drm_hdmi_helper.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_atomic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_atomic.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_bridge.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_bridge.h</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/drm/drm_bridge_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_bridge_helper.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_device.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_drv.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_edid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_edid.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_file.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_file.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_gem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_gem.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_gem_shmem_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_gem_shmem_helper.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_gpusvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_gpusvm.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_kunit_helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_kunit_helpers.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_mipi_dsi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_mipi_dsi.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_mode_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_mode_config.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_panel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_panel.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_panic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_panic.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_plane.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_plane.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_print.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_print.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/drm_probe_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/drm_probe_helper.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/gpu_scheduler.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/gpu_scheduler.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/intel/intel-gtt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/intel/intel-gtt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/intel/pciids.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/intel/pciids.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_backup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/ttm/ttm_backup.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_bo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/ttm/ttm_bo.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/drm/ttm/ttm_tt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/drm/ttm/ttm_tt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/dt-bindings/power/mediatek,mt6893-power.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/dt-bindings/power/mediatek,mt6893-power.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/dt-bindings/power/rockchip,rk3562-power.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/dt-bindings/power/rockchip,rk3562-power.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/dt-bindings/sound/cs48l32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/dt-bindings/sound/cs48l32.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/hyperv/hvgdk_mini.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/hyperv/hvgdk_mini.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/keys/rxrpc-type.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/keys/rxrpc-type.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/kunit/test.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/kunit/test.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/acpi.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/alloc_tag.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/alloc_tag.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/arch_topology.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/arch_topology.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/arm_sdei.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/arm_sdei.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/auxiliary_bus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/auxiliary_bus.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/backing-dev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/backing-dev.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/binfmts.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/binfmts.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/bio.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/blk-mq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/blk-mq.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/blk_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/blk_types.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/blkdev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/blkdev.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bpf-cgroup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/bpf-cgroup.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bpf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/bpf.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/bpf_verifier.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/bpf_verifier.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/btf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/btf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/buffer_head.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/buffer_head.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/can/dev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/can/dev.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ceph/osd_client.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ceph/osd_client.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cgroup-defs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/cgroup-defs.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cgroup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/cgroup.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cleanup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/cleanup.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/codetag.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/codetag.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/compiler-version.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/compiler-version.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/compiler_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/compiler_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/configfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/configfs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/coredump.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/coredump.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/cpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpufreq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/cpufreq.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpuhotplug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/cpuhotplug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/cpumask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/cpumask.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/crc16.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/crc16.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/crc32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/crc32.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/crypto.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/crypto.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dcache.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dcache.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dccp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dccp.h</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/device.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/device.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/device/devres.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/device/devres.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/device_cgroup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/device_cgroup.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dma-buf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dma-buf.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dma-fence-unwrap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dma-fence-unwrap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dma-fence.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dma-fence.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dma-map-ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dma-map-ops.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dma-mapping.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dma-mapping.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/dmapool.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/dmapool.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/energy_model.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/energy_model.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/entry-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/entry-common.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ethtool.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ethtool.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/execmem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/execmem.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/f2fs_fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/f2fs_fs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fanotify.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/fanotify.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/file.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/file.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/file_ref.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/file_ref.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/find.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/find.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/firmware/cirrus/cs_dsp_test_utils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/firmware/cirrus/cs_dsp_test_utils.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/fs.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fs_parser.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/fs_parser.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/fsl/ntmp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/fsl/ntmp.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fsnotify_backend.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/fsnotify_backend.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ftrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ftrace.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/futex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/futex.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/fwnode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/fwnode.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/gpio/consumer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/gpio/consumer.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/gpio/driver.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/gpio/driver.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/highmem-internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/highmem-internal.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/highmem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/highmem.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/hrtimer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/hrtimer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/hugetlb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/hugetlb.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/hyperv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/hyperv.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ieee80211.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ieee80211.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ima.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ima.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/inet.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/inet.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/intel_vsec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/intel_vsec.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/interrupt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/interrupt.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/io.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/io_uring/cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/io_uring/cmd.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/io_uring_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/io_uring_types.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/iommu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/iommu.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ipmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ipmi.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/irq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/irq.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/linux/irqchip/irq-davinci-aintc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/irqchip/irq-davinci-aintc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/include/linux/irqchip/irq-msi-lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/irqchip/irq-msi-lib.h</a> (renamed from drivers/irqchip/irq-msi-lib.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/irqdomain.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/irqdomain.h</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/jbd2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/jbd2.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/jiffies.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/jiffies.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/kexec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/kexec.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/kvm_dirty_ring.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/kvm_dirty_ring.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/kvm_host.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/livepatch_sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/livepatch_sched.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/local_lock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/local_lock.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/local_lock_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/local_lock_internal.h</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mdio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mdio.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/mfd/max77759.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mfd/max77759.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/micrel_phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/micrel_phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/misc_cgroup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/misc_cgroup.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mm.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mm_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mm_types.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mman.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mman.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mmap_lock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mmap_lock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mmc/card.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mmc/card.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mmc/slot-gpio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mmc/slot-gpio.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mmzone.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mmzone.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mod_devicetable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mod_devicetable.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/module.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/module.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mount.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mount.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mroute_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mroute_base.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/msi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/msi.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/mtd/spinand.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/mtd/spinand.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/namei.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/namei.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/net.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/net.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/linux/net/intel/iidc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/net/intel/iidc.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/net/intel/iidc_rdma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/net/intel/iidc_rdma.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/net/intel/iidc_rdma_ice.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/net/intel/iidc_rdma_ice.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/net_tstamp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/net_tstamp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/netdevice.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/netdevice.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/netdevice_xmit.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/netdevice_xmit.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/netfilter.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/netfilter.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/netlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/netlink.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/nfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/nfs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/nfs_fs_sb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/nfs_fs_sb.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/nvme.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/nvme.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/of_reserved_mem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/of_reserved_mem.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/overflow.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/overflow.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/page-flags.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/page-flags.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/page_table_check.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/page_table_check.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/panic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/panic.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/part_stat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/part_stat.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pci-p2pdma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pci-p2pdma.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pci.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pci_ids.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pci_ids.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pds/pds_adminq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pds/pds_adminq.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/percpu-rwsem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/percpu-rwsem.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/percpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/percpu.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/perf_event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/perf_event.h</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pgalloc_tag.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pgalloc_tag.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pgtable.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/phy.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/phy.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/phy_fixed.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/phy_fixed.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/phylink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/phylink.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pid.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pidfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pidfs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/platform_data/mlxreg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/platform_data/mlxreg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/platform_data/x86/asus-wmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/platform_data/x86/asus-wmi.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/include/linux/platform_data/x86/int3472.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/platform_data/x86/int3472.h</a> (renamed from drivers/platform/x86/intel/int3472/common.h)</td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/platform_data/x86/intel_pmc_ipc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/platform_data/x86/intel_pmc_ipc.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pm_domain.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pm_domain.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pm_opp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pm_opp.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pm_runtime.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pm_runtime.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pm_wakeup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pm_wakeup.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/poison.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/poison.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/power_supply.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/power_supply.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/psp-sev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/psp-sev.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ptp_clock_kernel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ptp_clock_kernel.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/pwm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/pwm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ratelimit.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ratelimit.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ratelimit_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ratelimit_types.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/rcuref.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/rcuref.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/regmap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/regmap.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/regulator/max8952.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/regulator/max8952.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/regulator/pca9450.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/regulator/pca9450.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/resctrl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/resctrl.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/resctrl_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/resctrl_types.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/restart_block.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/restart_block.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ring_buffer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ring_buffer.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/rtnetlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/rtnetlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sched.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sched/topology.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sched/topology.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/screen_info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/screen_info.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/security.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/security.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/shmem_fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/shmem_fs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/skbuff.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/skbuff.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/skbuff_ref.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/skbuff_ref.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/soc/mediatek/mtk_wed.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/soc/mediatek/mtk_wed.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/linux/sony-laptop.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sony-laptop.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/soundwire/sdw_intel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/soundwire/sdw_intel.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/spi/sh_msiof.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/spi/sh_msiof.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/spi/spi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/spi/spi.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/stat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/stat.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/stmmac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/stmmac.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/string_helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/string_helpers.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sunrpc/svc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sunrpc/svc.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sunrpc/svc_rdma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sunrpc/svc_rdma.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sunrpc/svc_xprt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sunrpc/svc_xprt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sunrpc/svcsock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sunrpc/svcsock.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/suspend.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/suspend.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/sysfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/sysfs.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tcp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/linux/tfrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tfrc.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tick.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tick.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/timekeeper_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/timekeeper_internal.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/timer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/timer.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/topology.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/topology.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tpm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tpm.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/tpm_svsm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tpm_svsm.h</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tracepoint.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tracepoint.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/linux/tsm-mr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tsm-mr.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/tsm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/tsm.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/ubsan.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/ubsan.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/udp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/udp.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/uio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/uio.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/vermagic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/vermagic.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/virtio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/virtio.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/virtio_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/virtio_config.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/virtio_vsock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/virtio_vsock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/vmalloc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/vmalloc.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/linux/workqueue.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/linux/workqueue.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/media/v4l2-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/media/v4l2-common.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/media/vsp1.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/media/vsp1.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/memory/renesas-rpc-if.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/memory/renesas-rpc-if.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/af_rxrpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/af_rxrpc.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/af_vsock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/af_vsock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/bluetooth.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/bluetooth/bluetooth.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/hci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/bluetooth/hci.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/hci_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/bluetooth/hci_core.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/net/bluetooth/hci_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/bluetooth/hci_drv.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/hci_mon.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/bluetooth/hci_mon.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/bluetooth/hci_sync.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/bluetooth/hci_sync.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/cfg80211.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/cfg80211.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/checksum.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/checksum.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/devlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/devlink.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/dropreason-core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/dropreason-core.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/dsa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/dsa.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/fib_rules.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/fib_rules.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/flow.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/flow.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/inet_hashtables.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/inet_hashtables.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip6_fib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/ip6_fib.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip_fib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/ip_fib.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/ip_tunnels.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/ip_tunnels.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/l3mdev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/l3mdev.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/lwtunnel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/lwtunnel.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/mac80211.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/mac80211.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/mana/mana.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/mana/mana.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/mptcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/mptcp.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/net_namespace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/net_namespace.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netdev_lock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netdev_lock.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netdev_queues.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netdev_queues.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netdev_rx_queue.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netdev_rx_queue.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netfilter/nf_tables.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netfilter/nf_tables.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netfilter/nft_fib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netfilter/nft_fib.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netlink.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netmem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netmem.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netns/ipv4.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netns/ipv4.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/netns/ipv6.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/netns/ipv6.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/nexthop.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/nexthop.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/net/p8022.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/p8022.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/page_pool/helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/page_pool/helpers.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/page_pool/types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/page_pool/types.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/route.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/route.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/rps.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/rps.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/rstreason.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/rstreason.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sch_generic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/sch_generic.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/scm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/scm.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sctp/checksum.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/sctp/checksum.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sctp/sctp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/sctp/sctp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sctp/sm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/sctp/sm.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sctp/structs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/sctp/structs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/secure_seq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/secure_seq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/sock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/sock.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/strparser.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/strparser.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/tcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/tcp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/udp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/udp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/udp_tunnel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/udp_tunnel.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/vxlan.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/vxlan.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/xdp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/xdp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/xdp_sock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/xdp_sock.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/xfrm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/xfrm.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/net/xsk_buff_pool.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/net/xsk_buff_pool.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/rdma/ib_verbs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/rdma/ib_verbs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/scsi/scsi_host.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/scsi/scsi_proto.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/scsi/scsi_proto.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/soc/mscc/ocelot.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/soc/mscc/ocelot.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/soc/qcom/ice.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/soc/qcom/ice.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/cs-amp-lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/cs-amp-lib.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/cs35l56.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/cs35l56.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/sound/cs42l52.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/cs42l52.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/sound/cs42l56.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/cs42l56.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/sound/cs42l73.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/cs42l73.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/sound/cs48l32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/cs48l32.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/sound/cs48l32_registers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/cs48l32_registers.h</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/dmaengine_pcm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/dmaengine_pcm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/gus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/gus.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/hdaudio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/hdaudio.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/hdaudio_ext.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/hdaudio_ext.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/jack.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/jack.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/pcm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/pcm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/sound/sdca_asoc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/sdca_asoc.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sdca_function.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/sdca_function.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/snd_wavefront.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/snd_wavefront.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc-acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/soc-acpi.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc-dapm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/soc-dapm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/soc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/soc_sdw_utils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/soc_sdw_utils.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/sof.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/sof.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/sound/tas2781-comlib-i2c.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/tas2781-comlib-i2c.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/tas2781.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/tas2781.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/include/sound/tpa6130a2-plat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/tpa6130a2-plat.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/ump_convert.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/ump_convert.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/sound/ump_msg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/sound/ump_msg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/target/target_core_base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/target/target_core_base.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/bpf_probe.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/bpf_probe.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/define_trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/define_trace.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/afs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/afs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/block.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/block.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/btrfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/btrfs.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/cgroup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/cgroup.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/erofs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/erofs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/include/trace/events/exceptions.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/exceptions.h</a> (renamed from arch/x86/include/asm/trace/exceptions.h)</td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/f2fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/f2fs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/io_uring.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/io_uring.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/rxrpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/rxrpc.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/sched.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/sock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/sock.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/sunrpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/sunrpc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/events/tcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/tcp.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/trace/events/tsm_mr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/events/tsm_mr.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/trace/misc/fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/trace/misc/fs.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/asm-generic/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/asm-generic/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/cxl/features.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/cxl/features.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/amdgpu_drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/amdgpu_drm.h</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/uapi/drm/asahi_drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/asahi_drm.h</a></td><td class='right'>1194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 27.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 72.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/drm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/drm_fourcc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/drm_fourcc.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/ivpu_accel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/ivpu_accel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/uapi/drm/nova_drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/nova_drm.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/panthor_drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/panthor_drm.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/virtgpu_drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/virtgpu_drm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/drm/xe_drm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/drm/xe_drm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/blktrace_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/blktrace_api.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/bpf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/bpf.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/cec-funcs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/cec-funcs.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/devlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/devlink.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/ethtool.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/ethtool.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/ethtool_netlink_generated.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/ethtool_netlink_generated.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/fib_rules.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/fib_rules.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/fscrypt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/fscrypt.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/futex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/futex.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_addr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_addr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_addrlabel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_addrlabel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_alg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_alg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_arcnet.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_arcnet.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_bonding.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_bonding.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_bridge.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_bridge.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_fc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_fc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_hippi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_hippi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_link.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_link.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_packet.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_packet.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_plip.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_plip.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_slip.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_slip.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_x25.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_x25.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/if_xdp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/if_xdp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/io_uring.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/io_uring.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/ip6_tunnel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/ip6_tunnel.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/isst_if.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/isst_if.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/kfd_ioctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/kfd_ioctl.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/kvm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/landlock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/landlock.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/uapi/linux/media/amlogic/c3-isp-config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/media/amlogic/c3-isp-config.h</a></td><td class='right'>564</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/neighbour.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/neighbour.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/net_dropmon.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/net_dropmon.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/net_tstamp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/net_tstamp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/netdev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/netdev.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/netfilter/nf_tables.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/netfilter/nf_tables.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/netfilter/nfnetlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/netfilter/nfnetlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/netlink_diag.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/netlink_diag.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/nl80211.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/nl80211.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/uapi/linux/ovpn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/ovpn.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/perf_event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/perf_event.h</a></td><td class='right'>657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 84.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/pidfd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/pidfd.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/pkt_cls.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/pkt_cls.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/pkt_sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/pkt_sched.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/prctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/prctl.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/rxrpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/rxrpc.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/snmp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/snmp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/stat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/stat.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/taskstats.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/taskstats.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/tcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/tcp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/ublk_cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/ublk_cmd.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/udp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/udp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/vhost.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/vhost.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/videodev2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/videodev2.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/virtio_gpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/virtio_gpu.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/virtio_pci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/virtio_pci.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/uapi/linux/virtio_rtc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/virtio_rtc.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/uapi/linux/wireguard.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/uapi/linux/wireguard.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/ufs/ufs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/ufs/ufs.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/ufs/ufs_quirks.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/ufs/ufs_quirks.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/ufs/ufshcd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/ufs/ufshcd.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/include/vdso/unaligned.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/vdso/unaligned.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/include/video/pixel_format.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>include/video/pixel_format.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/init/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>init/Kconfig</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/init/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>init/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/advise.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/advise.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/cancel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/cancel.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/io_uring/cmd_net.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/cmd_net.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/epoll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/epoll.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/eventfd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/eventfd.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/eventfd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/eventfd.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/fdinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/fdinfo.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/fs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/futex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/futex.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/io-wq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/io-wq.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/io-wq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/io-wq.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/io_uring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/io_uring.c</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/io_uring.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/io_uring.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/kbuf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/kbuf.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/kbuf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/kbuf.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/memmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/memmap.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/memmap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/memmap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/msg_ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/msg_ring.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/net.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/net.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/nop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/nop.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/notif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/notif.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/opdef.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/opdef.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/openclose.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/openclose.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/openclose.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/openclose.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/poll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/poll.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rsrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/rsrc.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rsrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/rsrc.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/rw.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/rw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/rw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/splice.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/splice.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/sqpoll.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/sqpoll.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/statx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/statx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/sync.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/tctx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/tctx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/timeout.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/timeout.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/timeout.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/timeout.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/truncate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/truncate.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/uring_cmd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/uring_cmd.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/uring_cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/uring_cmd.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/waitid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/waitid.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/xattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/xattr.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/zcrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/zcrx.c</a></td><td class='right'>407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/io_uring/zcrx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>io_uring/zcrx.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/ipc/mqueue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>ipc/mqueue.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/audit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/audit.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/audit_watch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/audit_watch.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/bpf_struct_ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/bpf_struct_ops.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/btf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/btf.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/cgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/cgroup.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/core.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/kernel/bpf/dmabuf_iter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/dmabuf_iter.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/hashtab.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/hashtab.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/helpers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/helpers.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/preload/bpf_preload_kern.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/preload/bpf_preload_kern.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/queue_stack_maps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/queue_stack_maps.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/ringbuf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/ringbuf.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/rqspinlock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/rqspinlock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/syscall.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/syscall.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/sysfs_btf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/sysfs_btf.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/bpf/verifier.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/bpf/verifier.c</a></td><td class='right'>636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 6.9%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cgroup/cgroup-internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/cgroup/cgroup-internal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cgroup/cgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/cgroup/cgroup.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cgroup/cpuset-internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/cgroup/cpuset-internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cgroup/cpuset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/cgroup/cpuset.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cgroup/misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/cgroup/misc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cgroup/rstat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/cgroup/rstat.c</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/configs/debug.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/configs/debug.config</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/configs/xen.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/configs/xen.config</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/cpu.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/dma/coherent.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/dma/coherent.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/dma/contiguous.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/dma/contiguous.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/dma/direct.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/dma/direct.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/dma/mapping.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/dma/mapping.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/entry/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/entry/common.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/events/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/events/core.c</a></td><td class='right'>675</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 84.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/events/ring_buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/events/ring_buffer.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/events/uprobes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/events/uprobes.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/exit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/exit.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/fork.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/fork.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/futex/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/futex/core.c</a></td><td class='right'>803</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.8%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 81.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/futex/futex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/futex/futex.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/futex/pi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/futex/pi.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/futex/requeue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/futex/requeue.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/futex/waitwake.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/futex/waitwake.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/autoprobe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/autoprobe.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/chip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/chip.c</a></td><td class='right'>631</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 8.4%;'/><td class='none' style='width: 85.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/cpuhotplug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/cpuhotplug.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/debugfs.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/generic-chip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/generic-chip.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/internals.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/internals.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/irqdesc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/irqdesc.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/irqdomain.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/irqdomain.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/manage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/manage.c</a></td><td class='right'>1166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.2%;'/><td class='rem' style='width: 15.6%;'/><td class='none' style='width: 73.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/msi.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/pm.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/proc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/proc.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/resend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/resend.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/irq/spurious.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/irq/spurious.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/kcsan/kcsan_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/kcsan/kcsan_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/kexec_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/kexec_core.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/kexec_file.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/kexec_file.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/livepatch/transition.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/livepatch/transition.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/locking/lockdep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/locking/lockdep.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/locking/lockdep_internals.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/locking/lockdep_internals.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/locking/lockdep_proc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/locking/lockdep_proc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/locking/percpu-rwsem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/locking/percpu-rwsem.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/module/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/module/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/module/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/module/main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/nsproxy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/nsproxy.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/padata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/padata.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/panic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/panic.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/params.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/params.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/pid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/pid.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/energy_model.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/energy_model.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/hibernate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/hibernate.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/main.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/power.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/power.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/process.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/suspend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/suspend.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/swap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/swap.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/power/wakelock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/power/wakelock.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/rcu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/rcu.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/rcuscale.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/rcuscale.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/rcutorture.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/rcutorture.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/srcutree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/srcutree.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/tree.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/tree.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree_exp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/tree_exp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree_nocb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/tree_nocb.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree_plugin.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/tree_plugin.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/rcu/tree_stall.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/rcu/tree_stall.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/core.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/cpufreq_schedutil.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/cpufreq_schedutil.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/debug.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/ext.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/ext.c</a></td><td class='right'>1938</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.9%;'/><td class='rem' style='width: 19.6%;'/><td class='none' style='width: 55.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/ext.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/ext.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/ext_idle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/ext_idle.c</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/ext_idle.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/ext_idle.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/fair.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/fair.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/isolation.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/isolation.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/rt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/rt.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/sched.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/syscalls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/syscalls.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sched/topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sched/topology.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/signal.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sys.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sys.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sysctl-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sysctl-test.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/sysctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/sysctl.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/alarmtimer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/alarmtimer.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/clocksource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/clocksource.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/hrtimer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/hrtimer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/jiffies.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/jiffies.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/posix-timers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/posix-timers.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/sleep_timeout.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/sleep_timeout.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/tick-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/tick-common.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/timekeeping.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/timekeeping.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/timer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/timer.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/time/vsyscall.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/time/vsyscall.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/blktrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/blktrace.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/bpf_trace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/bpf_trace.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/fgraph.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/fgraph.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/fprobe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/fprobe.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/ftrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/ftrace.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/pid_list.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/pid_list.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/ring_buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/ring_buffer.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/rv/rv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/rv/rv.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_branch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_branch.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_dynevent.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_dynevent.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_dynevent.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_dynevent.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_entries.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_entries.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_eprobe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_eprobe.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_events.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_events.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_events_filter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_events_filter.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_events_hist.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_events_hist.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_events_synth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_events_synth.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_events_trigger.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_events_trigger.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_fprobe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_fprobe.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_functions.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_functions.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_functions_graph.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_functions_graph.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_irqsoff.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_irqsoff.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_kdb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_kdb.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_kprobe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_kprobe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_mmiotrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_mmiotrace.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_osnoise.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_osnoise.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_output.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_probe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_probe.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_sched_wakeup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_sched_wakeup.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_stack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_stack.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/trace/trace_uprobe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/trace/trace_uprobe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/vhost_task.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/vhost_task.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/kernel/workqueue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>kernel/workqueue.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/Kconfig</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/Kconfig.debug?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/Kconfig.debug</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/Kconfig.ubsan?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/Kconfig.ubsan</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/alloc_tag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/alloc_tag.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/asn1_decoder.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/asn1_decoder.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/codetag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/codetag.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crc16.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crc16.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crc32.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/Kconfig</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/Makefile</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/aescfb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/aescfb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/aesgcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/aesgcm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/blake2s.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/blake2s.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/chacha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/chacha.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/chacha20poly1305-selftest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/chacha20poly1305-selftest.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/chacha20poly1305.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/chacha20poly1305.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/curve25519.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/curve25519.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/libchacha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/libchacha.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/lib/crypto/poly1305-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/poly1305-generic.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/poly1305.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/poly1305.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/lib/crypto/sha256-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/sha256-generic.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/sha256.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/lib/crypto/sm3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/crypto/sm3.c</a> (renamed from crypto/sm3.c)</td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/devres.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/devres.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/find_bit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/find_bit.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/iov_iter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/iov_iter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/executor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/kunit/executor.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/kunit/static_stub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/kunit/static_stub.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/pldmfw/pldmfw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/pldmfw/pldmfw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/ratelimit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/ratelimit.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/string.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/string_helpers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/string_helpers.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/test_sysctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/test_sysctl.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/test_ubsan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/test_ubsan.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/tests/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/tests/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/tests/crc_kunit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/tests/crc_kunit.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/tests/overflow_kunit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/tests/overflow_kunit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/tests/printf_kunit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/tests/printf_kunit.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/lib/tests/randstruct_kunit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/tests/randstruct_kunit.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/tests/slub_kunit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/tests/slub_kunit.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/tests/usercopy_kunit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/tests/usercopy_kunit.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/ubsan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/ubsan.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/ucs2_string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/ucs2_string.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/vsprintf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/vsprintf.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/lib/zlib_inflate/inflate_syms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>lib/zlib_inflate/inflate_syms.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/cma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/cma.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/compaction.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/compaction.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/dmapool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/dmapool.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/execmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/execmem.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/filemap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/filemap.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/gup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/gup.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/huge_memory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/huge_memory.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/hugetlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/hugetlb.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/hugetlb_vmemmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/hugetlb_vmemmap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/internal.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/kasan/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/kasan/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/kasan/kasan_test_c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/kasan/kasan_test_c.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/kasan/shadow.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/kasan/shadow.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/memblock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/memblock.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/memcontrol-v1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/memcontrol-v1.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/memcontrol.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/memcontrol.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/memory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/memory.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/migrate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/migrate.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/mm_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/mm_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/mremap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/mremap.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/nommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/nommu.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/page-writeback.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/page-writeback.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/page_alloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/page_alloc.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/page_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/page_io.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/page_table_check.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/page_table_check.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/readahead.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/readahead.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/shmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/shmem.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/show_mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/show_mem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/slub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/slub.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/swap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/swap.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/swap_state.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/swap_state.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/swapfile.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/swapfile.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/truncate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/truncate.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/userfaultfd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/userfaultfd.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/vma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/vma.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/vma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/vma.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/vmalloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/vmalloc.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/vmscan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/vmscan.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/mm/zsmalloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>mm/zsmalloc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/802/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/802/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/802/p8022.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/802/p8022.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/8021q/vlan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/8021q/vlan.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/batman-adv/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/hard-interface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/batman-adv/hard-interface.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/batman-adv/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/batman-adv/main.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/mesh-interface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/batman-adv/mesh-interface.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/send.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/batman-adv/send.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/batman-adv/translation-table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/batman-adv/translation-table.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/af_bluetooth.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/af_bluetooth.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_conn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/hci_conn.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/hci_core.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/bluetooth/hci_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/hci_drv.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/hci_event.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_sock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/hci_sock.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/hci_sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/hci_sync.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/iso.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/iso.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/l2cap_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/l2cap_core.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/mgmt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/mgmt.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bluetooth/mgmt_util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bluetooth/mgmt_util.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bpf/test_run.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bpf/test_run.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_arp_nd_proxy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_arp_nd_proxy.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_input.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_input.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_mdb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_mdb.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_mst.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_mst.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_multicast.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_multicast.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_nf_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_nf_core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_private.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_private.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_switchdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_switchdev.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/br_vlan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/br_vlan.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/bridge/netfilter/nf_conntrack_bridge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/bridge/netfilter/nf_conntrack_bridge.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/can/bcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/can/bcm.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/can/gw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/can/gw.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/can/j1939/socket.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/can/j1939/socket.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ceph/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ceph/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ceph/osd_client.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ceph/osd_client.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/datagram.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/datagram.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/dev.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/dev.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dev_api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/dev_api.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dev_ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/dev_ioctl.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/devmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/devmem.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/devmem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/devmem.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/dst_cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/dst_cache.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/fib_rules.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/fib_rules.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/filter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/filter.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/link_watch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/link_watch.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/lock_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/lock_debug.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/lwtunnel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/lwtunnel.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/neighbour.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/neighbour.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/net-procfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/net-procfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/net_namespace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/net_namespace.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/netdev-genl-gen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/netdev-genl-gen.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/netdev-genl-gen.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/netdev-genl-gen.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/netdev-genl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/netdev-genl.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/netmem_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/netmem_priv.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/page_pool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/page_pool.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/pktgen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/pktgen.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/rtnetlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/rtnetlink.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/scm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/scm.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/secure_seq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/secure_seq.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/selftests.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/selftests.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/skbuff.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/skbuff.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/skmsg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/skmsg.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/sock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/sock.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/sock_diag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/sock_diag.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/sysctl_net_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/sysctl_net_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/utils.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/core/xdp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/core/xdp.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ackvec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ackvec.c</a></td><td class='right'>403</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.3%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ackvec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ackvec.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccid.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccid.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/Kconfig</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/ccid2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/ccid2.c</a></td><td class='right'>794</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 18.2%;'/><td class='none' style='width: 81.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/ccid2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/ccid2.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/ccid3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/ccid3.c</a></td><td class='right'>866</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 19.9%;'/><td class='none' style='width: 80.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/ccid3.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/ccid3.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/lib/loss_interval.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/lib/loss_interval.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/lib/loss_interval.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/lib/loss_interval.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/lib/packet_history.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/lib/packet_history.c</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.1%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/lib/packet_history.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/lib/packet_history.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/lib/tfrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/lib/tfrc.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/lib/tfrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/lib/tfrc.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ccids/lib/tfrc_equation.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ccids/lib/tfrc_equation.c</a></td><td class='right'>702</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 16.1%;'/><td class='none' style='width: 83.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/dccp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/dccp.h</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.1%;'/><td class='none' style='width: 88.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/diag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/diag.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/feat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/feat.c</a></td><td class='right'>1581</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 36.3%;'/><td class='none' style='width: 63.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/feat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/feat.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/input.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/input.c</a></td><td class='right'>739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 17.0%;'/><td class='none' style='width: 83.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ipv4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ipv4.c</a></td><td class='right'>1101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 25.3%;'/><td class='none' style='width: 74.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ipv6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ipv6.c</a></td><td class='right'>1174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 27.0%;'/><td class='none' style='width: 73.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/ipv6.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/ipv6.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/minisocks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/minisocks.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/options.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/options.c</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.0%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/output.c</a></td><td class='right'>708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 16.3%;'/><td class='none' style='width: 83.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/proto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/proto.c</a></td><td class='right'>1293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 29.7%;'/><td class='none' style='width: 70.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/qpolicy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/qpolicy.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/sysctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/sysctl.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/timer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/timer.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/net/dccp/trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dccp/trace.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/devlink/dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/health.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/devlink/health.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/netlink_gen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/devlink/netlink_gen.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/devlink/param.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/devlink/param.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/dsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dsa/dsa.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/port.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dsa/port.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/tag_8021q.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dsa/tag_8021q.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/tag_ksz.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dsa/tag_ksz.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/dsa/user.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/dsa/user.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/cmis.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/cmis.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/cmis_cdb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/cmis_cdb.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/common.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/ioctl.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/mm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/mm.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/netlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/netlink.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/netlink.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/netlink.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/phy.c</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ethtool/tsinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ethtool/tsinfo.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/hsr/hsr_device.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/hsr/hsr_main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_main.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/hsr/hsr_main.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/hsr/hsr_slave.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/hsr/hsr_slave.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ieee802154/nl-phy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ieee802154/nl-phy.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/af_inet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/af_inet.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/devinet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/devinet.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/esp4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/esp4.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/fib_frontend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/fib_frontend.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/fib_semantics.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/fib_semantics.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/gre_demux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/gre_demux.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/inet_connection_sock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/inet_connection_sock.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/inet_diag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/inet_diag.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/inet_hashtables.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/inet_hashtables.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/inet_timewait_sock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/inet_timewait_sock.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_gre.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/ip_gre.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/ip_output.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_tunnel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/ip_tunnel.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ip_vti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/ip_vti.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ipip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/ipip.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/ipmr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/ipmr.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/netfilter/ip_tables.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/netfilter/ip_tables.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/netfilter/nf_dup_ipv4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/netfilter/nf_dup_ipv4.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/netfilter/nft_fib_ipv4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/netfilter/nft_fib_ipv4.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/nexthop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/nexthop.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/proc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/proc.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/route.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/route.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/tcp.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_fastopen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/tcp_fastopen.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_input.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/tcp_input.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_ipv4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/tcp_ipv4.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_minisocks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/tcp_minisocks.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/tcp_offload.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/tcp_output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/tcp_output.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/udp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/udp.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/udp_offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/udp_offload.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/udp_tunnel_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/udp_tunnel_core.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv4/xfrm4_input.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv4/xfrm4_input.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/addrconf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/addrconf.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/addrlabel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/addrlabel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/af_inet6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/af_inet6.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/esp6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/esp6.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/inet6_connection_sock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/inet6_connection_sock.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ioam6_iptunnel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/ioam6_iptunnel.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_fib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/ip6_fib.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_gre.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/ip6_gre.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/ip6_output.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_tunnel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/ip6_tunnel.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6_vti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/ip6_vti.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/ip6mr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/ip6mr.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/netfilter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/netfilter.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/netfilter/ip6_tables.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/netfilter/ip6_tables.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/netfilter/nf_dup_ipv6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/netfilter/nf_dup_ipv6.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/netfilter/nft_fib_ipv6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/netfilter/nft_fib_ipv6.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/route.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/route.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/seg6_hmac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/seg6_hmac.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/sit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/sit.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/tcp_ipv6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/tcp_ipv6.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/tcpv6_offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/tcpv6_offload.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/udp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/udp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/udp_offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/udp_offload.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ipv6/xfrm6_input.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ipv6/xfrm6_input.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/key/af_key.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/key/af_key.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/l3mdev/l3mdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/l3mdev/l3mdev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/llc/af_llc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/llc/af_llc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/cfg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/cfg.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/chan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/chan.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/debugfs_sta.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/debugfs_sta.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/ibss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/ibss.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/ieee80211_i.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/ieee80211_i.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/iface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/iface.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/link.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mesh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/mesh.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mesh_hwmp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/mesh_hwmp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mesh_pathtbl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/mesh_pathtbl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mesh_plink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/mesh_plink.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/mlme.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/mlme.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/parse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/parse.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/rate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/rate.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/rc80211_minstrel_ht.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/rc80211_minstrel_ht.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/scan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/scan.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/spectmgmt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/spectmgmt.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/sta_info.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/sta_info.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/sta_info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/sta_info.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/status.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/status.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/tdls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/tdls.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/tx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/tx.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mac80211/util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mac80211/util.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mctp/af_mctp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mctp/af_mctp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mctp/device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mctp/device.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mctp/neigh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mctp/neigh.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mctp/route.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mctp/route.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mpls/af_mpls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mpls/af_mpls.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/mib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/mib.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/mib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/mib.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/pm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/pm_userspace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/pm_userspace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/protocol.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/protocol.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/protocol.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/protocol.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/sched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/sched.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/mptcp/subflow.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/mptcp/subflow.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ncsi/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ncsi/internal.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ncsi/ncsi-pkt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ncsi/ncsi-pkt.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/ncsi/ncsi-rsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/ncsi/ncsi-rsp.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipset/ip_set_hash_gen.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/ipset/ip_set_hash_gen.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/ipvs/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/ipvs/ip_vs_xmit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/ipvs/ip_vs_xmit.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_conntrack_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nf_conntrack_core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_conntrack_standalone.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nf_conntrack_standalone.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_dup_netdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nf_dup_netdev.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_flow_table_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nf_flow_table_core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_tables_api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nf_tables_api.c</a></td><td class='right'>428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_tables_offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nf_tables_offload.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nf_tables_trace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nf_tables_trace.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nfnetlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nfnetlink.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_chain_filter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nft_chain_filter.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_flow_offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nft_flow_offload.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_inner.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nft_inner.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_quota.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nft_quota.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_set_pipapo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nft_set_pipapo.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_set_pipapo_avx2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nft_set_pipapo_avx2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/nft_tunnel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/nft_tunnel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/xt_IDLETIMER.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/xt_IDLETIMER.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/xt_TCPOPTSTRIP.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/xt_TCPOPTSTRIP.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/xt_cgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/xt_cgroup.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netfilter/xt_mark.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netfilter/xt_mark.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netlabel/netlabel_kapi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netlabel/netlabel_kapi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/netlink/policy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/netlink/policy.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/openvswitch/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/actions.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/openvswitch/actions.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/datapath.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/openvswitch/datapath.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/datapath.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/openvswitch/datapath.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/flow.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/openvswitch/flow.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/openvswitch/flow_netlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/openvswitch/flow_netlink.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/packet/af_packet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/packet/af_packet.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/packet/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/packet/internal.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rds/connection.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rds/connection.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rds/page.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rds/page.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/af_rxrpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/af_rxrpc.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/ar-internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/ar-internal.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/call_accept.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/call_accept.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/call_object.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/call_object.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/conn_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/conn_event.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/conn_object.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/conn_object.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/insecure.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/insecure.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/io_thread.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/io_thread.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/key.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/key.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/rxrpc/oob.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/oob.c</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/output.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/output.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/peer_object.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/peer_object.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/protocol.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/protocol.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/recvmsg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/recvmsg.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/rxrpc/rxgk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/rxgk.c</a></td><td class='right'>1371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 31.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 68.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/rxrpc/rxgk_app.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/rxgk_app.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/rxrpc/rxgk_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/rxgk_common.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/rxrpc/rxgk_kdf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/rxgk_kdf.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/rxkad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/rxkad.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/rxperf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/rxperf.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/security.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/security.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/sendmsg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/sendmsg.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/server_key.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/server_key.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/rxrpc/txbuf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/rxrpc/txbuf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/act_api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/act_api.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/act_mirred.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/act_mirred.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/net/sched/bpf_qdisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/bpf_qdisc.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/cls_api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/cls_api.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_api.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_codel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_codel.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_drr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_drr.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_ets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_ets.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_fq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_fq.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_fq_codel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_fq_codel.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_fq_pie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_fq_pie.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_frag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_frag.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_generic.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_hfsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_hfsc.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_hhf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_hhf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_htb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_htb.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_pie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_pie.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_qfq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_qfq.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sched/sch_sfq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sched/sch_sfq.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sctp/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/associola.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sctp/associola.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/offload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sctp/offload.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/sm_make_chunk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sctp/sm_make_chunk.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/socket.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sctp/socket.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sctp/transport.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sctp/transport.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/smc/af_smc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/smc/af_smc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/strparser/strparser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/strparser/strparser.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/cache.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/rpc_pipe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/rpc_pipe.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/svc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/svc.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/svc_xprt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/svc_xprt.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/svcsock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/svcsock.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xdr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/xdr.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/svc_rdma_recvfrom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/xprtrdma/svc_rdma_recvfrom.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/svc_rdma_rw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/xprtrdma/svc_rdma_rw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/svc_rdma_sendto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/xprtrdma/svc_rdma_sendto.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/sunrpc/xprtrdma/svc_rdma_transport.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/sunrpc/xprtrdma/svc_rdma_transport.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/crypto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/tipc/crypto.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/tipc/link.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/monitor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/tipc/monitor.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tipc/node.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/tipc/node.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/tls/tls_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls_strp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/tls/tls_strp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/tls/tls_sw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/tls/tls_sw.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/unix/af_unix.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/unix/af_unix.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/vmw_vsock/af_vsock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/vmw_vsock/af_vsock.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/vmw_vsock/virtio_transport_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/vmw_vsock/virtio_transport_common.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/nl80211.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/wireless/nl80211.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/wireless/scan.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/wireless/scan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xdp/xsk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xdp/xsk.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xdp/xsk_buff_pool.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xdp/xsk_buff_pool.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/espintcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/espintcp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/xfrm_device.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_interface_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/xfrm_interface_core.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_ipcomp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/xfrm_ipcomp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_nat_keepalive.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/xfrm_nat_keepalive.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_policy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/xfrm_policy.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_state.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/xfrm_state.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/net/xfrm/xfrm_user.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>net/xfrm/xfrm_user.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/bindings/bindings_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/bindings/bindings_helper.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/bindings/lib.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/bindings/lib.rs</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/helpers/auxiliary.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/auxiliary.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/helpers/dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/dma.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/helpers/drm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/drm.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/helpers/helpers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/helpers.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/helpers/io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/io.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/helpers/mutex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/mutex.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/helpers/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/pci.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/helpers/platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/helpers/platform.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/alloc/kvec.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/alloc/kvec.rs</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/auxiliary.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/auxiliary.rs</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/configfs.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/configfs.rs</a></td><td class='right'>1049</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 24.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 75.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/device.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/device.rs</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/devres.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/devres.rs</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/dma.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/dma.rs</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/drm/device.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/drm/device.rs</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/drm/driver.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/drm/driver.rs</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/drm/file.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/drm/file.rs</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/drm/gem/mod.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/drm/gem/mod.rs</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/drm/ioctl.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/drm/ioctl.rs</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/rust/kernel/drm/mod.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/drm/mod.rs</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/firmware.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/firmware.rs</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/lib.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/lib.rs</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/list.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/list.rs</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/net/phy.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/net/phy.rs</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/pci.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/pci.rs</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/platform.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/platform.rs</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/revocable.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/revocable.rs</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/str.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/str.rs</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/sync/rcu.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/sync/rcu.rs</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/kernel/types.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/kernel/types.rs</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/kunit.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/macros/kunit.rs</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/module.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/macros/module.rs</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/macros/paste.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/macros/paste.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/pin-init/examples/pthread_mutex.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/pin-init/examples/pthread_mutex.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/pin-init/internal/src/pinned_drop.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/pin-init/internal/src/pinned_drop.rs</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/pin-init/src/alloc.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/pin-init/src/alloc.rs</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/pin-init/src/lib.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/pin-init/src/lib.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/uapi/lib.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/uapi/lib.rs</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/rust/uapi/uapi_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>rust/uapi/uapi_helper.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/bpf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/bpf/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/bpf/sockex2_kern.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/bpf/sockex2_kern.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/ftrace/sample-trace-array.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/ftrace/sample-trace-array.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/livepatch/livepatch-callbacks-busymod.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/livepatch/livepatch-callbacks-busymod.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/livepatch/livepatch-callbacks-demo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/livepatch/livepatch-callbacks-demo.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/livepatch/livepatch-callbacks-mod.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/livepatch/livepatch-callbacks-mod.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/livepatch/livepatch-sample.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/livepatch/livepatch-sample.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/livepatch/livepatch-shadow-fix1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/livepatch/livepatch-shadow-fix1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/livepatch/livepatch-shadow-fix2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/livepatch/livepatch-shadow-fix2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/rust/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/rust/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/rust/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/rust/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/samples/rust/rust_configfs.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/rust/rust_configfs.rs</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/samples/rust/rust_driver_auxiliary.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/rust/rust_driver_auxiliary.rs</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/samples/rust/rust_driver_pci.rs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/rust/rust_driver_pci.rs</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/samples/tsm-mr/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/tsm-mr/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/samples/tsm-mr/tsm_mr_sample.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>samples/tsm-mr/tsm_mr_sample.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.btf?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.btf</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.build?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.build</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.compiler?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.compiler</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.extrawarn?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.extrawarn</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.gcc-plugins?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.gcc-plugins</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.lib?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.lib</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.ubsan?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.ubsan</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.vmlinux?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.vmlinux</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/Makefile.vmlinux_o?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/Makefile.vmlinux_o</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/basic/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/basic/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/bpf_doc.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/bpf_doc.py</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/checkpatch.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/checkpatch.pl</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/find-unused-docs.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/find-unused-docs.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/gcc-plugins/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/gcc-plugins/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/gcc-plugins/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/gcc-plugins/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/scripts/gcc-plugins/arm_ssp_per_task_plugin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/gcc-plugins/arm_ssp_per_task_plugin.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/gcc-plugins/randomize_layout_plugin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/gcc-plugins/randomize_layout_plugin.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/gdb/linux/pgtable.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/gdb/linux/pgtable.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/generate_rust_analyzer.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/generate_rust_analyzer.py</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/genksyms/keywords.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/genksyms/keywords.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/genksyms/parse.y?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/genksyms/parse.y</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>l---------<span class='modechange'>[-rwxr-xr-x]</span></td><td class='typ'><a href='/cgit/linux.git/diff/scripts/kernel-doc?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/kernel-doc</a></td><td class='right'>2440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 56.0%;'/><td class='none' style='width: 43.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/scripts/kernel-doc.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/kernel-doc.pl</a></td><td class='right'>2439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 56.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 44.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/scripts/kernel-doc.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/kernel-doc.py</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/scripts/lib/kdoc/kdoc_files.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/lib/kdoc/kdoc_files.py</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/scripts/lib/kdoc/kdoc_output.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/lib/kdoc/kdoc_output.py</a></td><td class='right'>793</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/scripts/lib/kdoc/kdoc_parser.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/lib/kdoc/kdoc_parser.py</a></td><td class='right'>1745</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 40.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 59.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/scripts/lib/kdoc/kdoc_re.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/lib/kdoc/kdoc_re.py</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/package/kernel.spec?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/package/kernel.spec</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/scripts/package/mkdebian?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>scripts/package/mkdebian</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/apparmor/apparmorfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/apparmor/apparmorfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/inode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/integrity/ima/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/integrity/ima/ima.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_kexec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/integrity/ima/ima_kexec.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/integrity/ima/ima_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/integrity/ima/ima_queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/integrity/ima/ima_queue.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/ipe/audit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/ipe/audit.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/ipe/fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/ipe/fs.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/ipe/policy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/ipe/policy.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/ipe/policy_fs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/ipe/policy_fs.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/landlock/audit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/landlock/audit.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/landlock/domain.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/landlock/domain.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/landlock/domain.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/landlock/domain.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/landlock/id.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/landlock/id.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/landlock/syscalls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/landlock/syscalls.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/lsm_audit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/lsm_audit.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/security.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/security.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/hooks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/hooks.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ibpkey.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/ibpkey.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/include/classmap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/include/classmap.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/include/netnode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/include/netnode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/include/objsec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/include/objsec.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/include/policycap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/include/policycap.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/include/policycap_names.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/include/policycap_names.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/include/security.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/include/security.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/netif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/netif.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/netnode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/netnode.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/netport.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/netport.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/nlmsgtab.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/nlmsgtab.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/selinuxfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/selinuxfs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/selinux/ss/services.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/selinux/ss/services.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/smack/smack_lsm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/smack/smack_lsm.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/security/smack/smackfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>security/smack/smackfs.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/atmel/ac97c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/atmel/ac97c.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/control.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/control.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/device.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/jack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/jack.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/oss/pcm_oss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/oss/pcm_oss.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/pcm_dmaengine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/pcm_dmaengine.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/pcm_memory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/pcm_memory.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/pcm_misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/pcm_misc.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/pcm_native.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/pcm_native.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/seq_clientmgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/seq/seq_clientmgr.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/seq_queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/seq/seq_queue.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/seq_queue.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/seq/seq_queue.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/seq_ump_convert.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/seq/seq_ump_convert.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq/seq_ump_convert.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/seq/seq_ump_convert.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/core/seq_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/core/seq_device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/ext/hdac_ext_controller.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/hda/ext/hdac_ext_controller.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/hda_bus_type.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/hda/hda_bus_type.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/hdac_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/hda/hdac_device.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/hdac_stream.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/hda/hdac_stream.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/intel-dsp-config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/hda/intel-dsp-config.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/intel-nhlt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/hda/intel-nhlt.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/hda/intel-sdw-acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/hda/intel-sdw-acpi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/i2c/other/pt2258.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/i2c/other/pt2258.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/azt2320.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/azt2320.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/gus/gus_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/gus/gus_io.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/gus/gus_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/gus/gus_main.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/gus/gus_reset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/gus/gus_reset.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/msnd/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/msnd/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/msnd/msnd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/msnd/msnd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/isa/msnd/msnd_midi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/msnd/msnd_midi.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/msnd/msnd_pinnacle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/msnd/msnd_pinnacle.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/emu8000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/sb/emu8000.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/jazz16.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/sb/jazz16.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/sb16.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/sb/sb16.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/sb8.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/sb/sb8.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/sb8_midi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/sb/sb8_midi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/isa/sb/sb_mixer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/isa/sb/sb_mixer.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/mips/snd-n64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/mips/snd-n64.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ad1889.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ad1889.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ali5451/ali5451.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ali5451/ali5451.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/als300.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/als300.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/als4000.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/als4000.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/asihpi/asihpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/asihpi/asihpi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/atiixp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/atiixp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/atiixp_modem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/atiixp_modem.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/au88x0/au88x0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/au88x0/au88x0.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/au88x0/au88x0_a3d.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/au88x0/au88x0_a3d.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/aw2/aw2-alsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/aw2/aw2-alsa.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/azt3328.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/azt3328.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/bt87x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/bt87x.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ca0106/ca0106_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ca0106/ca0106_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/cmipci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/cmipci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/cs4281.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/cs4281.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/cs46xx/cs46xx_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/cs46xx/cs46xx_lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/cs46xx/dsp_spos_scb_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/cs46xx/dsp_spos_scb_lib.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/cs5530.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/cs5530.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/cs5535audio/cs5535audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/cs5535audio/cs5535audio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ctxfi/cttimer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ctxfi/cttimer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/echoaudio/echoaudio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/echoaudio/echoaudio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emu10k1_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/emu10k1/emu10k1_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/emu10k1/emu10k1x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/emu10k1/emu10k1x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ens1370.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ens1370.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/es1938.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/es1938.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/es1968.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/es1968.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/fm801.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/fm801.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cirrus_scodec_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/cirrus_scodec_test.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l41_hda.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/cs35l41_hda.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l41_hda_property.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/cs35l41_hda_property.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l56_hda.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/cs35l56_hda.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l56_hda_i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/cs35l56_hda_i2c.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/cs35l56_hda_spi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/cs35l56_hda_spi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_acpi.c</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_bind.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_bind.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_codec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_codec.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_cs_dsp_ctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_cs_dsp_ctl.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_cs_dsp_ctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_cs_dsp_ctl.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_intel.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_local.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_local.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/hda_tegra.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/hda_tegra.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_hdmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/patch_hdmi.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/patch_realtek.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/patch_realtek.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/pci/hda/tas2781-spi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/tas2781-spi.h</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/pci/hda/tas2781_hda.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/tas2781_hda.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/pci/hda/tas2781_hda.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/tas2781_hda.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/tas2781_hda_i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/tas2781_hda_i2c.c</a></td><td class='right'>498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 9.2%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/hda/tas2781_hda_spi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/tas2781_hda_spi.c</a></td><td class='right'>893</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 13.8%;'/><td class='none' style='width: 79.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/sound/pci/hda/tas2781_spi_fwlib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/hda/tas2781_spi_fwlib.c</a></td><td class='right'>2006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 46.1%;'/><td class='none' style='width: 53.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ice1712/ice1712.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ice1712/ice1712.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ice1712/ice1724.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ice1712/ice1724.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/intel8x0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/intel8x0.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/intel8x0m.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/intel8x0m.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/korg1212/korg1212.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/korg1212/korg1212.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/lola/lola.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/lola/lola.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/lx6464es/lx6464es.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/lx6464es/lx6464es.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/maestro3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/maestro3.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/nm256/nm256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/nm256/nm256.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/oxygen/oxygen_lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/oxygen/oxygen_lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/riptide/riptide.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/riptide/riptide.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/rme32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/rme32.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/rme96.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/rme96.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/rme9652/hdsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/rme9652/hdsp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/rme9652/hdspm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/rme9652/hdspm.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/rme9652/rme9652.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/rme9652/rme9652.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/sis7019.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/sis7019.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/sonicvibes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/sonicvibes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/trident/trident_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/trident/trident_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/via82xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/via82xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/via82xx_modem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/via82xx_modem.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/vx222/vx222.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/vx222/vx222.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/pci/ymfpci/ymfpci_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/pci/ymfpci/ymfpci_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/sh/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/sh/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/sh/aica.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/sh/aica.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp-da7219-max98357a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp-da7219-max98357a.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp-es8336.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp-es8336.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp-rt5645.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp-rt5645.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-i2s.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp-i2s.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-legacy-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp-legacy-common.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-rembrandt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp-rembrandt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-renoir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp-renoir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-sdw-legacy-mach.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp-sdw-legacy-mach.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-sdw-sof-mach.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp-sdw-sof-mach.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp-sof-mach.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp-sof-mach.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp63.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp63.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/acp/acp70.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/acp/acp70.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/ps/pci-ps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/ps/pci-ps.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/amd/yc/acp6x-mach.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/amd/yc/acp6x-mach.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/apple/mca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/apple/mca.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/Kconfig</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ac97.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/ac97.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/adau7118.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/adau7118.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ak4458.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/ak4458.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/ak5386.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/ak5386.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/aw88081.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/aw88081.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/aw88166.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/aw88166.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/aw88395/aw88395_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/aw88395/aw88395_device.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/aw88399.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/aw88399.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs-amp-lib-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs-amp-lib-test.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs-amp-lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs-amp-lib.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56-i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs35l56-i2c.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56-sdw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs35l56-sdw.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56-shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs35l56-shared.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56-spi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs35l56-spi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs35l56.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs35l56.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs35l56.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l43-jack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs42l43-jack.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l52.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs42l52.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l56.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs42l56.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs42l73.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs42l73.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs48l32-tables.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs48l32-tables.c</a></td><td class='right'>540</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs48l32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs48l32.c</a></td><td class='right'>4073</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 93.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 6.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/cs48l32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/cs48l32.h</a></td><td class='right'>403</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/es8375.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/es8375.c</a></td><td class='right'>793</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/es8375.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/es8375.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/es8389.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/es8389.c</a></td><td class='right'>962</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/es8389.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/es8389.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/hdmi-codec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/hdmi-codec.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/idt821034.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/idt821034.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/lpass-wsa-macro.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/lpass-wsa-macro.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/pcm6240.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/pcm6240.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/peb2466.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/peb2466.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5665.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt5665.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5665.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt5665.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5668.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt5668.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5668.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt5668.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5677-spi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt5677-spi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt5677.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt5677.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt712-sdca-dmic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt712-sdca-dmic.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt712-sdca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt712-sdca.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt722-sdca-sdw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt722-sdca-sdw.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt722-sdca-sdw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt722-sdca-sdw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt722-sdca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt722-sdca.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt722-sdca.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt722-sdca.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt9123.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt9123.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/rt9123p.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/rt9123p.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sma1307.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/sma1307.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/sta32x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/sta32x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2764-quirks.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2764-quirks.h</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2764.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2764.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2764.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2764.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2770.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2770.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2770.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2770.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2781-comlib-i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2781-comlib-i2c.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2781-comlib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2781-comlib.c</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 8.6%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2781-fmwlib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2781-fmwlib.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tas2781-i2c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tas2781-i2c.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tlv320adc3xxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tlv320adc3xxx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tlv320aic3x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tlv320aic3x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/tpa6130a2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/tpa6130a2.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/twl4030.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/twl4030.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd-mbhc-v2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wcd-mbhc-v2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd-mbhc-v2.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wcd-mbhc-v2.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd9335.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wcd9335.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd937x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wcd937x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd938x-sdw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wcd938x-sdw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd938x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wcd938x.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wcd939x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wcd939x.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm5100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wm5100.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8903.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wm8903.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8962.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wm8962.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm8996.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wm8996.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wm_adsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wm_adsp.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wsa883x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wsa883x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/wsa884x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/wsa884x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/codecs/zl38060.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/codecs/zl38060.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/dwc/dwc-i2s.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/dwc/dwc-i2s.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_asrc_dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/fsl_asrc_dma.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_qmc_audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/fsl_qmc_audio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_rpmsg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/fsl_rpmsg.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_rpmsg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/fsl_rpmsg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_sai.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/fsl_sai.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_sai.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/fsl_sai.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/fsl_xcvr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/fsl_xcvr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-card.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/imx-card.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/fsl/imx-pcm-rpmsg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/fsl/imx-pcm-rpmsg.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/generic/simple-card-utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/generic/simple-card-utils.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/generic/test-component.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/generic/test-component.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/atom/sst/sst.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/atom/sst/sst.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/atom/sst/sst_drv_interface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/atom/sst/sst_drv_interface.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/atom/sst/sst_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/atom/sst/sst_pci.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/atom/sst/sst_pvt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/atom/sst/sst_pvt.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/avs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/avs.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/board_selection.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/board_selection.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/da7219.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/da7219.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/dmic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/dmic.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/es8336.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/es8336.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/hdaudio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/hdaudio.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/i2s_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/i2s_test.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/max98357a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/max98357a.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/max98373.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/max98373.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/max98927.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/max98927.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/nau8825.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/nau8825.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/pcm3168a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/pcm3168a.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/probe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/probe.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt274.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/rt274.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt286.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/rt286.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt298.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/rt298.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt5514.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/rt5514.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt5663.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/rt5663.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/rt5682.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/rt5682.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/boards/ssm4567.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/boards/ssm4567.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/core.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/dsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/dsp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/lnl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/lnl.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/loader.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/loader.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/messages.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/messages.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/mtl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/mtl.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/path.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/path.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/path.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/path.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/pcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/pcm.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/probes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/probes.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/ptl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/ptl.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/registers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/registers.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/tgl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/tgl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/topology.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/topology.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/topology.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/avs/utils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/avs/utils.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/boards/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/bytcr_rt5640.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/boards/bytcr_rt5640.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/boards/sof_sdw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/boards/sof_sdw.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/catpt/dsp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/catpt/dsp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/common/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-arl-match.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/common/soc-acpi-intel-arl-match.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-lnl-match.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/common/soc-acpi-intel-lnl-match.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-mtl-match.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/common/soc-acpi-intel-mtl-match.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/intel/common/soc-acpi-intel-ptl-match.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/common/soc-acpi-intel-ptl-match.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/common/sof-function-topology-lib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/common/sof-function-topology-lib.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/intel/common/sof-function-topology-lib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/intel/common/sof-function-topology-lib.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/loongson/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/loongson/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/loongson/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/loongson/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/loongson/loongson1_ac97.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/loongson/loongson1_ac97.c</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/loongson/loongson_i2s_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/loongson/loongson_i2s_pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/mediatek/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/mediatek/mt8183/mt8183-afe-pcm.c</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 10.2%;'/><td class='none' style='width: 86.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8188/mt8188-mt6359.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/mediatek/mt8188/mt8188-mt6359.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/mediatek/mt8195/mt8195-mt6359.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/mediatek/mt8195/mt8195-mt6359.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/meson/meson-card-utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/meson/meson-card-utils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/lpass.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/qcom/lpass.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/qdsp6/q6apm-lpass-dais.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/qcom/qdsp6/q6apm-lpass-dais.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/sc8280xp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/qcom/sc8280xp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/qcom/sdm845.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/qcom/sdm845.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/renesas/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/renesas/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/renesas/rcar/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/renesas/rcar/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/renesas/rcar/adg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/renesas/rcar/adg.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/renesas/rcar/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/renesas/rcar/core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/renesas/rcar/msiof.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/renesas/rcar/msiof.c</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/renesas/rz-ssi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/renesas/rz-ssi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/rockchip/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/rockchip/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/rockchip/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/rockchip/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/rockchip/rockchip_sai.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/rockchip/rockchip_sai.c</a></td><td class='right'>1555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 35.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 64.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/rockchip/rockchip_sai.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/rockchip/rockchip_sai.h</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdca/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdca/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/sound/soc/sdca/sdca_asoc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdca/sdca_asoc.c</a></td><td class='right'>1311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdca/sdca_functions.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdca/sdca_functions.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdca/sdca_regmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdca/sdca_regmap.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdw_utils/soc_sdw_bridge_cs35l56.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdw_utils/soc_sdw_bridge_cs35l56.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdw_utils/soc_sdw_cs42l43.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdw_utils/soc_sdw_cs42l43.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdw_utils/soc_sdw_cs_amp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdw_utils/soc_sdw_cs_amp.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdw_utils/soc_sdw_rt_amp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdw_utils/soc_sdw_rt_amp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdw_utils/soc_sdw_rt_dmic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdw_utils/soc_sdw_rt_dmic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sdw_utils/soc_sdw_utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sdw_utils/soc_sdw_utils.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-ac97.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/soc-ac97.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/soc-core.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-dapm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/soc-dapm.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-devres.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/soc-devres.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-pcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/soc-pcm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/soc-utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/soc-utils.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/amd/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/acp-dsp-offset.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/amd/acp-dsp-offset.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/acp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/amd/acp.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/acp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/amd/acp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/amd/pci-acp70.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/amd/pci-acp70.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/imx/imx8.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/imx/imx8.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda-bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/intel/hda-bus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/intel/hda.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/hda.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/intel/hda.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/pci-ptl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/intel/pci-ptl.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/intel/ptl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/intel/ptl.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-control.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/ipc4-control.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/ipc4-pcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/ipc4-pcm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/sof-pci-dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/sof-pci-dev.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sof/topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sof/topology.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/starfive/jh7110_tdm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/starfive/jh7110_tdm.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/stm/stm32_sai.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/stm/stm32_sai.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/stm/stm32_sai_sub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/stm/stm32_sai_sub.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/sunxi/sun8i-codec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/sunxi/sun8i-codec.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra186_asrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra186_asrc.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra186_asrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra186_asrc.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_admaif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_admaif.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_admaif.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_admaif.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_adx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_adx.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_adx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_adx.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_ahub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_ahub.c</a></td><td class='right'>850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 80.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_ahub.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_ahub.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_amx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_amx.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_amx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_amx.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_i2s.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_i2s.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra210_i2s.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra210_i2s.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra_audio_graph_card.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra_audio_graph_card.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra_cif.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra_cif.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/tegra/tegra_isomgr_bw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/tegra/tegra_isomgr_bw.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/soc/ti/davinci-mcasp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/soc/ti/davinci-mcasp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/sparc/amd7930.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/sparc/amd7930.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/sparc/dbri.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/sparc/dbri.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/endpoint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/endpoint.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/fcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/fcp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/format.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/format.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/midi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/midi.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/mixer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/mixer.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/mixer_quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/mixer_quirks.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/mixer_scarlett2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/mixer_scarlett2.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/mixer_us16x08.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/mixer_us16x08.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/quirks-table.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/quirks-table.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/usb/quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/usb/quirks.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/virtio/virtio_kctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/virtio/virtio_kctl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/sound/x86/intel_hdmi_audio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>sound/x86/intel_hdmi_audio.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/arm64/include/asm/sysreg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/arm64/include/asm/sysreg.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/arm64/include/uapi/asm/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/arm64/include/uapi/asm/kvm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/arm64/include/uapi/asm/unistd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/arm64/include/uapi/asm/unistd.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/arch/x86/include/asm/amd/ibs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/include/asm/amd/ibs.h</a> (renamed from tools/arch/x86/include/asm/amd-ibs.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/include/asm/cpufeatures.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/include/asm/cpufeatures.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/include/asm/inat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/include/asm/inat.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/include/asm/msr-index.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/include/asm/msr-index.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/include/uapi/asm/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/include/uapi/asm/kvm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/include/uapi/asm/svm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/include/uapi/asm/svm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/kcpuid/cpuid.csv?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/kcpuid/cpuid.csv</a></td><td class='right'>791</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 81.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/kcpuid/kcpuid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/kcpuid/kcpuid.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/lib/insn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/lib/insn.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/lib/memset_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/lib/memset_64.S</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/lib/x86-opcode-map.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/lib/x86-opcode-map.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/arch/x86/tools/gen-insn-attr-x86.awk?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/arch/x86/tools/gen-insn-attr-x86.awk</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/Documentation/bpftool-prog.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/bpf/bpftool/Documentation/bpftool-prog.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/bash-completion/bpftool?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/bpf/bpftool/bash-completion/bpftool</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/cgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/bpf/bpftool/cgroup.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/bpf/bpftool/link.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/bpf/bpftool/prog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/bpf/bpftool/prog.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/hv/hv_kvp_daemon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/hv/hv_kvp_daemon.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/linux/cfi_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/linux/cfi_types.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-aarch64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-aarch64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-arm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-arm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-i386.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-i386.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-loongarch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-loongarch.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-m68k.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-m68k.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-powerpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-powerpc.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-riscv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-riscv.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-sparc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-sparc.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch-x86_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch-x86_64.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/arch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/arch.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/compiler.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/compiler.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/crt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/crt.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/ctype.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/ctype.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/dirent.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/dirent.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/elf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/elf.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/errno.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/errno.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/fcntl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/fcntl.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/getopt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/getopt.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/math.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/math.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/nolibc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/nolibc.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/poll.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/poll.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sched.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/signal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/signal.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/std.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/std.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/stddef.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/stddef.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/stdint.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/stdint.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/stdio.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/stdio.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/stdlib.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/stdlib.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/string.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/string.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys.h</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 9.1%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/auxv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/auxv.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/ioctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/ioctl.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/mman.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/mman.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/mount.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/mount.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/prctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/prctl.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/random.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/random.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/reboot.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/reboot.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/resource.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/stat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/stat.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/syscall.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/syscall.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/sysmacros.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/sysmacros.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/time.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/time.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/timerfd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/timerfd.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/types.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/utsname.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/utsname.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/nolibc/sys/wait.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/sys/wait.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/time.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/time.h</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/types.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/nolibc/unistd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/nolibc/unistd.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/asm-generic/mman-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/asm-generic/mman-common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/asm-generic/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/asm-generic/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/asm-generic/unistd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/asm-generic/unistd.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/bpf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/bpf.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/fanotify.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/fanotify.h</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/if_xdp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/if_xdp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/in.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/in.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/kvm.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/mount.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/mount.h</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/netdev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/netdev.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/nsfs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/nsfs.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/perf_event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/perf_event.h</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 7.4%;'/><td class='none' style='width: 85.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/prctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/prctl.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/include/uapi/linux/stat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/include/uapi/linux/stat.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/bpf_core_read.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/bpf_core_read.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/bpf_helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/bpf_helpers.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/btf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/btf.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/libbpf.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/libbpf.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf.map?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/libbpf.map</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/libbpf_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/libbpf_internal.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/linker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/linker.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/netlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/netlink.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/bpf/nlattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/bpf/nlattr.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/lib/perf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/lib/perf/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/memory-model/Documentation/README?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/memory-model/Documentation/README</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/memory-model/Documentation/explanation.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/memory-model/Documentation/explanation.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/memory-model/Documentation/locking.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/memory-model/Documentation/locking.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/memory-model/Documentation/ordering.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/memory-model/Documentation/ordering.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/memory-model/Documentation/recipes.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/memory-model/Documentation/recipes.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/memory-model/Documentation/references.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/memory-model/Documentation/references.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/memory-model/Documentation/simple.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/memory-model/Documentation/simple.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/variable_length_array.j2?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/sunrpc/xdrgen/templates/C/pointer/encoder/variable_length_array.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/sunrpc/xdrgen/templates/C/struct/encoder/variable_length_array.j2?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/sunrpc/xdrgen/templates/C/struct/encoder/variable_length_array.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/sunrpc/xdrgen/templates/C/union/decoder/variable_length_array.j2?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/sunrpc/xdrgen/templates/C/union/decoder/variable_length_array.j2</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/Makefile.deps?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/Makefile.deps</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/generated/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/generated/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/lib/ynl-priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/lib/ynl-priv.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/lib/ynl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/lib/ynl.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/lib/ynl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/lib/ynl.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/pyynl/cli.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/pyynl/cli.py</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/pyynl/ethtool.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/pyynl/ethtool.py</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/pyynl/lib/__init__.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/pyynl/lib/__init__.py</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/pyynl/lib/ynl.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/pyynl/lib/ynl.py</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/pyynl/ynl_gen_c.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/pyynl/ynl_gen_c.py</a></td><td class='right'>908</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 79.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/pyynl/ynl_gen_rst.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/pyynl/ynl_gen_rst.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/samples/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/samples/.gitignore</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/net/ynl/samples/devlink.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/samples/devlink.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/net/ynl/samples/rt-addr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/samples/rt-addr.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/net/ynl/samples/rt-link.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/samples/rt-link.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/net/ynl/samples/rt-route.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/samples/rt-route.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/net/ynl/samples/tc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/net/ynl/samples/tc.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/objtool/arch/x86/decode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/objtool/arch/x86/decode.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/objtool/arch/x86/special.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/objtool/arch/x86/special.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/objtool/check.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/objtool/check.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/objtool/elf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/objtool/elf.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/objtool/include/objtool/arch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/objtool/include/objtool/arch.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/objtool/include/objtool/elf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/objtool/include/objtool/elf.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/Makefile.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/Makefile.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/arm/entry/syscalls/syscall.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/arm/entry/syscalls/syscall.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/powerpc/entry/syscalls/syscall.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/powerpc/entry/syscalls/syscall.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/s390/entry/syscalls/syscall.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/s390/entry/syscalls/syscall.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/sh/entry/syscalls/syscall.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/sh/entry/syscalls/syscall.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/sparc/entry/syscalls/syscall.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/sparc/entry/syscalls/syscall.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/x86/entry/syscalls/syscall_32.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/x86/entry/syscalls/syscall_32.tbl</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/x86/entry/syscalls/syscall_64.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/x86/entry/syscalls/syscall_64.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/arch/xtensa/entry/syscalls/syscall.tbl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/arch/xtensa/entry/syscalls/syscall.tbl</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/bench/Build?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/Build</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/bench/futex-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/futex-hash.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/bench/futex-lock-pi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/futex-lock-pi.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/bench/futex-requeue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/futex-requeue.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/bench/futex-wake-parallel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/futex-wake-parallel.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/bench/futex-wake.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/futex-wake.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/perf/bench/futex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/futex.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/bench/futex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/bench/futex.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/check-headers.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/check-headers.sh</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/trace/beauty/include/linux/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/trace/beauty/include/linux/socket.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/trace/beauty/include/uapi/linux/fcntl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/trace/beauty/include/uapi/linux/fcntl.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/trace/beauty/include/uapi/linux/fs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/trace/beauty/include/uapi/linux/fs.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/trace/beauty/include/uapi/linux/mount.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/trace/beauty/include/uapi/linux/mount.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/trace/beauty/include/uapi/linux/prctl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/trace/beauty/include/uapi/linux/prctl.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/trace/beauty/include/uapi/linux/stat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/trace/beauty/include/uapi/linux/stat.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/trace/beauty/include/uapi/sound/asound.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/trace/beauty/include/uapi/sound/asound.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/util/amd-sample-raw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/util/amd-sample-raw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/util/evsel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/util/evsel.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/perf/util/unwind-libunwind-local.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/perf/util/unwind-libunwind-local.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/common/cmfsize.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/common/cmfsize.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/common/getopt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/common/getopt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/os_specific/service_layers/oslinuxtbl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/os_specific/service_layers/oslinuxtbl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/os_specific/service_layers/osunixdir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/os_specific/service_layers/osunixdir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/os_specific/service_layers/osunixmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/os_specific/service_layers/osunixmap.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/os_specific/service_layers/osunixxf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/os_specific/service_layers/osunixxf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/tools/acpidump/acpidump.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/tools/acpidump/acpidump.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/tools/acpidump/apdump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/tools/acpidump/apdump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/tools/acpidump/apfiles.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/tools/acpidump/apfiles.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/acpi/tools/acpidump/apmain.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/acpi/tools/acpidump/apmain.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/cpupower/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/cpupower/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/cpupower/README?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/cpupower/README</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/cpupower/bindings/python/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/cpupower/bindings/python/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/cpupower/bindings/python/README?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/cpupower/bindings/python/README</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/power/cpupower/cpupower-service.conf?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/cpupower/cpupower-service.conf</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/power/cpupower/cpupower.service.in?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/cpupower/cpupower.service.in</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/power/cpupower/cpupower.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/cpupower/cpupower.sh</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/pm-graph/sleepgraph.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/pm-graph/sleepgraph.py</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/x86/intel-speed-select/isst-config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/x86/intel-speed-select/isst-config.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/x86/intel-speed-select/isst-core-tpmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/x86/intel-speed-select/isst-core-tpmi.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/x86/intel-speed-select/isst-display.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/x86/intel-speed-select/isst-display.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/power/x86/intel-speed-select/isst.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/power/x86/intel-speed-select/isst.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/bench_htab_mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/benchs/bench_htab_mem.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/bench_sockmap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/benchs/bench_sockmap.c</a></td><td class='right'>598</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/bench_trigger.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/benchs/bench_trigger.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/benchs/run_bench_uprobes.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/benchs/run_bench_uprobes.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/bpf_experimental.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/bpf_experimental.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/config</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/config.aarch64?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/config.aarch64</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/config.s390x?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/config.s390x</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/config.x86_64?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/config.x86_64</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/arena_spin_lock.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/attach_probe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/attach_probe.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/bpf_nf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/bpf_nf.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/bpf_qdisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/bpf_qdisc.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/btf_dedup_split.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/btf_dedup_split.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/btf_split.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/btf_split.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/btf_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/btf_sysfs.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/dmabuf_iter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/dmabuf_iter.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/dynptr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/dynptr.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/fd_htab_lookup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/fd_htab_lookup.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/fill_link_info.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/fill_link_info.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/for_each.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/for_each.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/linked_list.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/linked_list.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/rbtree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/rbtree.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/res_spin_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/res_spin_lock.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sk_assign.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/sk_assign.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sock_iter_batch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/sock_iter_batch.c</a></td><td class='right'>447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/socket_helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/socket_helpers.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockmap_helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/sockmap_helpers.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockmap_ktls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/sockmap_ktls.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockmap_listen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/sockmap_listen.c</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.5%;'/><td class='none' style='width: 89.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/sockmap_redir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/sockmap_redir.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/tc_redirect.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/tc_redirect.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/test_btf_ext.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/test_btf_ext.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/test_veristat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/test_veristat.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/verifier.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/verifier.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/prog_tests/xdp_metadata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/prog_tests/xdp_metadata.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bench_sockmap_prog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bench_sockmap_prog.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_arena_spin_lock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bpf_arena_spin_lock.h</a> (renamed from tools/testing/selftests/bpf/bpf_arena_spin_lock.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_misc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bpf_misc.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_qdisc_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bpf_qdisc_common.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_qdisc_fail__incompl_ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bpf_qdisc_fail__incompl_ops.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_qdisc_fifo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bpf_qdisc_fifo.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_qdisc_fq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bpf_qdisc_fq.c</a></td><td class='right'>756</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/bpf_tracing_net.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/bpf_tracing_net.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/btf_type_tag_percpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/btf_type_tag_percpu.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/cgroup_hierarchical_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/cgroup_hierarchical_stats.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/dmabuf_iter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/dmabuf_iter.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/dynptr_success.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/dynptr_success.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/fd_htab_lookup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/fd_htab_lookup.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/for_each_hash_modify.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/for_each_hash_modify.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/iters.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/iters.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/linked_list_peek.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/linked_list_peek.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/prepare.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/prepare.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/raw_tp_null.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/raw_tp_null.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/raw_tp_null_fail.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/raw_tp_null_fail.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/rbtree_fail.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/rbtree_fail.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/rbtree_search.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/rbtree_search.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/res_spin_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/res_spin_lock.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/set_global_vars.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/set_global_vars.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/setget_sockopt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/setget_sockopt.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/sock_iter_batch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/sock_iter_batch.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_btf_ext.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/test_btf_ext.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_module_attach.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/test_module_attach.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_sockmap_ktls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/test_sockmap_ktls.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_sockmap_redir.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/test_sockmap_redir.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_tcp_custom_syncookie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/test_tcp_custom_syncookie.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/test_tp_btf_nullable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/test_tp_btf_nullable.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_bpf_trap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/verifier_bpf_trap.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_btf_ctx_access.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/verifier_btf_ctx_access.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_load_acquire.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/verifier_load_acquire.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_precision.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/verifier_precision.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/verifier_store_release.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/verifier_store_release.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/xdp_metadata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/xdp_metadata.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/progs/xsk_xdp_progs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/progs/xsk_xdp_progs.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_kmods/bpf_testmod.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/test_kmods/bpf_testmod.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_loader.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/test_loader.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/test_verifier.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/test_verifier.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/veristat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/veristat.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/xsk_xdp_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/xsk_xdp_common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/xskxceiver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/xskxceiver.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/bpf/xskxceiver.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/bpf/xskxceiver.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/cgroup/test_cpuset_prs.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/cgroup/test_cpuset_prs.sh</a></td><td class='right'>617</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/coredump/stackdump_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/coredump/stackdump_test.c</a></td><td class='right'>477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/cpufreq/cpufreq.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/cpufreq/cpufreq.sh</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>l---------</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/dsa/tc_taprio.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/dsa/tc_taprio.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hds.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hds.py</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/devmem.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/devmem.py</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/iou-zcrx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/iou-zcrx.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/iou-zcrx.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/iou-zcrx.py</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/lib/py/__init__.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/lib/py/__init__.py</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/lib/py/linkconfig.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/lib/py/linkconfig.py</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/ncdevmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/ncdevmem.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/nic_link_layer.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/nic_link_layer.py</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/nic_performance.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/nic_performance.py</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/hw/xsk_reconfig.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/hw/xsk_reconfig.py</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/env.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/lib/py/env.py</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/lib/py/load.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/lib/py/load.py</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/napi_id_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/napi_id_helper.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/netdevsim/peer.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/netdevsim/peer.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/ping.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/ping.py</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/team/config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/team/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/drivers/net/team/propagation.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/drivers/net/team/propagation.sh</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/lib/riscv/processor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/lib/riscv/processor.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/riscv/arch_timer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/riscv/arch_timer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/riscv/ebreak_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/riscv/ebreak_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/riscv/get-reg-list.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/riscv/get-reg-list.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/riscv/sbi_pmu_test.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/rseq_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/rseq_test.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/set_memory_region_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/set_memory_region_test.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/kvm/x86/monitor_mwait_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/kvm/x86/monitor_mwait_test.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/landlock/audit.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/landlock/audit.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/landlock/audit_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/landlock/audit_test.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/landlock/fs_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/landlock/fs_test.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/lib/config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/lib/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mincore/mincore_selftest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mincore/mincore_selftest.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/charge_reserved_hugetlb.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mm/charge_reserved_hugetlb.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/compaction_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mm/compaction_test.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/cow.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mm/cow.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/guard-regions.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mm/guard-regions.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/hugetlb_reparenting_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mm/hugetlb_reparenting_test.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/pkey-powerpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mm/pkey-powerpc.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mm/pkey_util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mm/pkey_util.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mount_setattr/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mount_setattr/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/mount_setattr/mount_setattr_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/mount_setattr/mount_setattr_test.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/nci/nci_dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/nci/nci_dev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/af_unix/scm_rights.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/af_unix/scm_rights.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/bareudp.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/bareudp.sh</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/busy_poll_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/busy_poll_test.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/can/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/can/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/can/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/can/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/can/test_raw_filter.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/can/test_raw_filter.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/can/test_raw_filter.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/can/test_raw_filter.sh</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/fib_rule_tests.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/fib_rule_tests.sh</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/fib_tests.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/fib_tests.sh</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/bridge_igmp.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/forwarding/bridge_igmp.sh</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/bridge_mld.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/forwarding/bridge_mld.sh</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/bridge_vlan_aware.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/forwarding/bridge_vlan_aware.sh</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/forwarding/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/tc_taprio.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/forwarding/tc_taprio.sh</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/forwarding/tsn_lib.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/forwarding/tsn_lib.sh</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/gre_ipv6_lladdr.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/gre_ipv6_lladdr.sh</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/icmp_redirect.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/icmp_redirect.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ipv6_route_update_soft_lockup.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ipv6_route_update_soft_lockup.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/lib.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/lib.sh</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/lib/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/lib/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/lib/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/lib/ksft.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/lib/ksft.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/lib/py/ksft.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/lib/py/ksft.py</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/lib/py/ynl.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/lib/py/ynl.py</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/lib/xdp_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/lib/xdp_helper.c</a> (renamed from tools/testing/selftests/drivers/net/xdp_helper.c)</td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/diag.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/diag.sh</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/mptcp_connect.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/mptcp_connect.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/mptcp_diag.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/mptcp_diag.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/mptcp_inq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/mptcp_inq.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/mptcp_join.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/mptcp_join.sh</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/mptcp_lib.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/mptcp_lib.sh</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/mptcp/mptcp_sockopt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/mptcp/mptcp_sockopt.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/net_helper.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/net_helper.sh</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/br_netfilter.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/br_netfilter.sh</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/bridge_brouter.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/bridge_brouter.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_resize.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/conntrack_resize.sh</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/conntrack_vrf.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/conntrack_vrf.sh</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/ipvs.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/ipvs.sh</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_concat_range.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/nft_concat_range.sh</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_fib.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/nft_fib.sh</a></td><td class='right'>635</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 85.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_interface_stress.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/nft_interface_stress.sh</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_nat_zones.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/nft_nat_zones.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/nft_queue.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/nft_queue.sh</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/netfilter/rpath.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/netfilter/rpath.sh</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/.gitignore</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/Makefile</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/common.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/common.sh</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/config</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/data64.key?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/data64.key</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/ovpn-cli.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/ovpn-cli.c</a></td><td class='right'>2383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 54.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 45.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/tcp_peers.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/tcp_peers.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/test-chachapoly.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/test-chachapoly.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/test-close-socket-tcp.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/test-close-socket-tcp.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/test-close-socket.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/test-close-socket.sh</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/test-float.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/test-float.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/test-tcp.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/test-tcp.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/test.sh</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/ovpn/udp_peers.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/ovpn/udp_peers.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/pmtu.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/pmtu.sh</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/reuseport_addr_any.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/reuseport_addr_any.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/skf_net_off.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/skf_net_off.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/skf_net_off.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/skf_net_off.sh</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/srv6_end_dt46_l3vpn_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/srv6_end_dt46_l3vpn_test.sh</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/srv6_end_dt4_l3vpn_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/srv6_end_dt4_l3vpn_test.sh</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/srv6_end_flavors_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/srv6_end_flavors_test.sh</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/srv6_end_next_csid_l3vpn_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/srv6_end_next_csid_l3vpn_test.sh</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/srv6_end_x_next_csid_l3vpn_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/srv6_end_x_next_csid_l3vpn_test.sh</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/srv6_hencap_red_l3vpn_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/srv6_hencap_red_l3vpn_test.sh</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/srv6_hl2encap_red_l2vpn_test.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/srv6_hl2encap_red_l2vpn_test.sh</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/test_bridge_neigh_suppress.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/test_bridge_neigh_suppress.sh</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/tls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/tls.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/udpgro.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro_bench.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/udpgro_bench.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro_frglist.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/udpgro_frglist.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/net/udpgro_fwd.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/net/udpgro_fwd.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/nolibc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/nolibc/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/nolibc/nolibc-test-linkage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/nolibc/nolibc-test-linkage.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/nolibc/nolibc-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/nolibc/nolibc-test.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/nolibc/run-tests.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/nolibc/run-tests.sh</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pcie_bwctrl/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/pcie_bwctrl/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/perf_events/watermark_signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/perf_events/watermark_signal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pid_namespace/pid_max.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/pid_namespace/pid_max.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/pidfd/pidfd.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd_bind_mount.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/pidfd/pidfd_bind_mount.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/pidfd/pidfd_info_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/pidfd/pidfd_info_test.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/bin/console-badness.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/rcutorture/bin/console-badness.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/bin/kvm-test-1-run.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/rcutorture/bin/kvm-test-1-run.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/bin/parse-console.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/rcutorture/bin/parse-console.sh</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/bin/srcu_lockdep.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/rcutorture/bin/srcu_lockdep.sh</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/bin/torture.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/rcutorture/bin/torture.sh</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE01?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/rcutorture/configs/rcu/TREE01</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/rcutorture/configs/rcu/TREE01.boot?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/rcutorture/configs/rcu/TREE01.boot</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/run_kselftest.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/run_kselftest.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/sched_ext/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sched_ext/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/sched_ext/allowed_cpus.bpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sched_ext/allowed_cpus.bpf.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/sched_ext/allowed_cpus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sched_ext/allowed_cpus.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/sched_ext/enq_select_cpu.bpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sched_ext/enq_select_cpu.bpf.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/sched_ext/enq_select_cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sched_ext/enq_select_cpu.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/sched_ext/enq_select_cpu_fails.bpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sched_ext/enq_select_cpu_fails.bpf.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux.git/diff/tools/testing/selftests/sched_ext/enq_select_cpu_fails.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sched_ext/enq_select_cpu_fails.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/seccomp/seccomp_benchmark.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/seccomp/seccomp_benchmark.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/seccomp/seccomp_bpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/seccomp/seccomp_bpf.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/sysctl/sysctl.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/sysctl/sysctl.sh</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/tc-testing/tc-tests/infra/actions.json?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/tc-testing/tc-tests/infra/actions.json</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_loop_04.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_loop_04.sh</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_loop_05.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_loop_05.sh</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stress_01.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stress_01.sh</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stress_02.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stress_02.sh</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stress_03.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stress_03.sh</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stress_04.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stress_04.sh</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stress_05.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stress_05.sh</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stripe_01.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stripe_01.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stripe_02.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stripe_02.sh</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stripe_03.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stripe_03.sh</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/ublk/test_stripe_04.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/ublk/test_stripe_04.sh</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/wireguard/netns.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/wireguard/netns.sh</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/wireguard/qemu/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/wireguard/qemu/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/wireguard/qemu/debug.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/wireguard/qemu/debug.config</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/apx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/apx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/bugs/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/bugs/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/bugs/common.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/bugs/common.py</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/bugs/its_indirect_alignment.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/bugs/its_indirect_alignment.py</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/bugs/its_permutations.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/bugs/its_permutations.py</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/bugs/its_ret_alignment.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/bugs/its_ret_alignment.py</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rwxr-xr-x</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/bugs/its_sysfs.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/bugs/its_sysfs.py</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/lam.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/lam.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/xstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/xstate.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/selftests/x86/xstate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/selftests/x86/xstate.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/shared/linux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/shared/linux.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux.git/diff/tools/testing/shared/linux/cleanup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/shared/linux/cleanup.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/vsock/timeout.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/vsock/timeout.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/vsock/timeout.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/vsock/timeout.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/vsock/util.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/vsock/util.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/vsock/util.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/vsock/util.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/testing/vsock/vsock_test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/testing/vsock/vsock_test.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/README.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/README.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/src/osnoise_hist.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/src/osnoise_hist.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/src/osnoise_top.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/src/osnoise_top.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/src/timerlat_bpf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/src/timerlat_bpf.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/src/timerlat_hist.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/src/timerlat_hist.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/src/timerlat_top.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/src/timerlat_top.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/src/utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/src/utils.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/src/utils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/src/utils.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/tests/engine.sh?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/tests/engine.sh</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/tests/hwnoise.t?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/tests/hwnoise.t</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/tests/osnoise.t?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/tests/osnoise.t</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/tools/tracing/rtla/tests/timerlat.t?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>tools/tracing/rtla/tests/timerlat.t</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/usr/include/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>usr/include/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/virt/kvm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>virt/kvm/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/virt/kvm/dirty_ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>virt/kvm/dirty_ring.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/virt/kvm/eventfd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>virt/kvm/eventfd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux.git/diff/virt/kvm/kvm_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a&amp;id2=63bfd78aae9a90210b0d369bb2836cca90402a95'>virt/kvm/kvm_main.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
</table><div class='diffstat-summary'>9221 files changed, 380272 insertions, 186617 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/.clang-format b/.clang-format<br/>index fe1aa1a30d40..48405c54ef27 100644<br/>--- a/<a href='/cgit/linux.git/tree/.clang-format?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>.clang-format</a><br/>+++ b/<a href='/cgit/linux.git/tree/.clang-format?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>.clang-format</a></div><div class='hunk'>@@ -92,6 +92,7 @@ ForEachMacros:</div><div class='ctx'>   - '__rq_for_each_bio'</div><div class='ctx'>   - '__shost_for_each_device'</div><div class='ctx'>   - '__sym_for_each'</div><div class='add'>+  - '_for_each_counter'</div><div class='ctx'>   - 'apei_estatus_for_each_section'</div><div class='ctx'>   - 'ata_for_each_dev'</div><div class='ctx'>   - 'ata_for_each_link'</div><div class='hunk'>@@ -141,11 +142,14 @@ ForEachMacros:</div><div class='ctx'>   - 'damon_for_each_target_safe'</div><div class='ctx'>   - 'damos_for_each_filter'</div><div class='ctx'>   - 'damos_for_each_filter_safe'</div><div class='add'>+  - 'damos_for_each_ops_filter'</div><div class='add'>+  - 'damos_for_each_ops_filter_safe'</div><div class='ctx'>   - 'damos_for_each_quota_goal'</div><div class='ctx'>   - 'damos_for_each_quota_goal_safe'</div><div class='ctx'>   - 'data__for_each_file'</div><div class='ctx'>   - 'data__for_each_file_new'</div><div class='ctx'>   - 'data__for_each_file_start'</div><div class='add'>+  - 'def_for_each_cpu'</div><div class='ctx'>   - 'device_for_each_child_node'</div><div class='ctx'>   - 'device_for_each_child_node_scoped'</div><div class='ctx'>   - 'dma_fence_array_for_each'</div><div class='hunk'>@@ -176,6 +180,7 @@ ForEachMacros:</div><div class='ctx'>   - 'drm_for_each_privobj'</div><div class='ctx'>   - 'drm_gem_for_each_gpuvm_bo'</div><div class='ctx'>   - 'drm_gem_for_each_gpuvm_bo_safe'</div><div class='add'>+  - 'drm_gpusvm_for_each_range'</div><div class='ctx'>   - 'drm_gpuva_for_each_op'</div><div class='ctx'>   - 'drm_gpuva_for_each_op_from_reverse'</div><div class='ctx'>   - 'drm_gpuva_for_each_op_reverse'</div><div class='hunk'>@@ -216,8 +221,10 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_active_dev_scope'</div><div class='ctx'>   - 'for_each_active_drhd_unit'</div><div class='ctx'>   - 'for_each_active_iommu'</div><div class='add'>+  - 'for_each_active_irq'</div><div class='ctx'>   - 'for_each_active_route'</div><div class='ctx'>   - 'for_each_aggr_pgid'</div><div class='add'>+  - 'for_each_alloc_capable_rdt_resource'</div><div class='ctx'>   - 'for_each_and_bit'</div><div class='ctx'>   - 'for_each_andnot_bit'</div><div class='ctx'>   - 'for_each_available_child_of_node'</div><div class='hunk'>@@ -228,6 +235,7 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_btf_ext_rec'</div><div class='ctx'>   - 'for_each_btf_ext_sec'</div><div class='ctx'>   - 'for_each_bvec'</div><div class='add'>+  - 'for_each_capable_rdt_resource'</div><div class='ctx'>   - 'for_each_card_auxs'</div><div class='ctx'>   - 'for_each_card_auxs_safe'</div><div class='ctx'>   - 'for_each_card_components'</div><div class='hunk'>@@ -241,6 +249,7 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_cgroup_storage_type'</div><div class='ctx'>   - 'for_each_child_of_node'</div><div class='ctx'>   - 'for_each_child_of_node_scoped'</div><div class='add'>+  - 'for_each_child_of_node_with_prefix'</div><div class='ctx'>   - 'for_each_clear_bit'</div><div class='ctx'>   - 'for_each_clear_bit_from'</div><div class='ctx'>   - 'for_each_clear_bitrange'</div><div class='hunk'>@@ -296,6 +305,7 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_group_member_head'</div><div class='ctx'>   - 'for_each_hstate'</div><div class='ctx'>   - 'for_each_hwgpio'</div><div class='add'>+  - 'for_each_hwgpio_in_range'</div><div class='ctx'>   - 'for_each_if'</div><div class='ctx'>   - 'for_each_inject_fn'</div><div class='ctx'>   - 'for_each_insn'</div><div class='hunk'>@@ -304,6 +314,7 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_intid'</div><div class='ctx'>   - 'for_each_iommu'</div><div class='ctx'>   - 'for_each_ip_tunnel_rcu'</div><div class='add'>+  - 'for_each_irq_desc'</div><div class='ctx'>   - 'for_each_irq_nr'</div><div class='ctx'>   - 'for_each_lang'</div><div class='ctx'>   - 'for_each_link_ch_maps'</div><div class='hunk'>@@ -324,6 +335,8 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_missing_reg'</div><div class='ctx'>   - 'for_each_mle_subelement'</div><div class='ctx'>   - 'for_each_mod_mem_type'</div><div class='add'>+  - 'for_each_mon_capable_rdt_resource'</div><div class='add'>+  - 'for_each_mp_bvec'</div><div class='ctx'>   - 'for_each_net'</div><div class='ctx'>   - 'for_each_net_continue_reverse'</div><div class='ctx'>   - 'for_each_net_rcu'</div><div class='hunk'>@@ -351,6 +364,7 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_node_by_name'</div><div class='ctx'>   - 'for_each_node_by_type'</div><div class='ctx'>   - 'for_each_node_mask'</div><div class='add'>+  - 'for_each_node_numadist'</div><div class='ctx'>   - 'for_each_node_state'</div><div class='ctx'>   - 'for_each_node_with_cpus'</div><div class='ctx'>   - 'for_each_node_with_property'</div><div class='hunk'>@@ -359,6 +373,8 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_of_allnodes'</div><div class='ctx'>   - 'for_each_of_allnodes_from'</div><div class='ctx'>   - 'for_each_of_cpu_node'</div><div class='add'>+  - 'for_each_of_graph_port'</div><div class='add'>+  - 'for_each_of_graph_port_endpoint'</div><div class='ctx'>   - 'for_each_of_pci_range'</div><div class='ctx'>   - 'for_each_old_connector_in_state'</div><div class='ctx'>   - 'for_each_old_crtc_in_state'</div><div class='hunk'>@@ -372,9 +388,11 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_oldnew_plane_in_state_reverse'</div><div class='ctx'>   - 'for_each_oldnew_private_obj_in_state'</div><div class='ctx'>   - 'for_each_online_cpu'</div><div class='add'>+  - 'for_each_online_cpu_wrap'</div><div class='ctx'>   - 'for_each_online_node'</div><div class='ctx'>   - 'for_each_online_pgdat'</div><div class='ctx'>   - 'for_each_or_bit'</div><div class='add'>+  - 'for_each_page_ext'</div><div class='ctx'>   - 'for_each_path'</div><div class='ctx'>   - 'for_each_pci_bridge'</div><div class='ctx'>   - 'for_each_pci_dev'</div><div class='hunk'>@@ -382,8 +400,10 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_physmem_range'</div><div class='ctx'>   - 'for_each_populated_zone'</div><div class='ctx'>   - 'for_each_possible_cpu'</div><div class='add'>+  - 'for_each_possible_cpu_wrap'</div><div class='ctx'>   - 'for_each_present_blessed_reg'</div><div class='ctx'>   - 'for_each_present_cpu'</div><div class='add'>+  - 'for_each_present_section_nr'</div><div class='ctx'>   - 'for_each_prime_number'</div><div class='ctx'>   - 'for_each_prime_number_from'</div><div class='ctx'>   - 'for_each_probe_cache_entry'</div><div class='hunk'>@@ -396,6 +416,7 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_prop_dlc_cpus'</div><div class='ctx'>   - 'for_each_prop_dlc_platforms'</div><div class='ctx'>   - 'for_each_property_of_node'</div><div class='add'>+  - 'for_each_rdt_resource'</div><div class='ctx'>   - 'for_each_reg'</div><div class='ctx'>   - 'for_each_reg_filtered'</div><div class='ctx'>   - 'for_each_reloc'</div><div class='hunk'>@@ -434,10 +455,10 @@ ForEachMacros:</div><div class='ctx'>   - 'for_each_subelement_id'</div><div class='ctx'>   - 'for_each_sublist'</div><div class='ctx'>   - 'for_each_subsystem'</div><div class='add'>+  - 'for_each_suite'</div><div class='ctx'>   - 'for_each_supported_activate_fn'</div><div class='ctx'>   - 'for_each_supported_inject_fn'</div><div class='ctx'>   - 'for_each_sym'</div><div class='del'>-  - 'for_each_test'</div><div class='ctx'>   - 'for_each_thread'</div><div class='ctx'>   - 'for_each_token'</div><div class='ctx'>   - 'for_each_unicast_dest_pgid'</div><div class='hunk'>@@ -499,8 +520,10 @@ ForEachMacros:</div><div class='ctx'>   - 'idr_for_each_entry_continue'</div><div class='ctx'>   - 'idr_for_each_entry_continue_ul'</div><div class='ctx'>   - 'idr_for_each_entry_ul'</div><div class='add'>+  - 'iio_for_each_active_channel'</div><div class='ctx'>   - 'in_dev_for_each_ifa_rcu'</div><div class='ctx'>   - 'in_dev_for_each_ifa_rtnl'</div><div class='add'>+  - 'in_dev_for_each_ifa_rtnl_net'</div><div class='ctx'>   - 'inet_bind_bucket_for_each'</div><div class='ctx'>   - 'interval_tree_for_each_span'</div><div class='ctx'>   - 'intlist__for_each_entry'</div><div class='hunk'>@@ -542,7 +565,6 @@ ForEachMacros:</div><div class='ctx'>   - 'list_for_each_prev'</div><div class='ctx'>   - 'list_for_each_prev_safe'</div><div class='ctx'>   - 'list_for_each_rcu'</div><div class='del'>-  - 'list_for_each_reverse'</div><div class='ctx'>   - 'list_for_each_safe'</div><div class='ctx'>   - 'llist_for_each'</div><div class='ctx'>   - 'llist_for_each_entry'</div><div class='hunk'>@@ -552,6 +574,7 @@ ForEachMacros:</div><div class='ctx'>   - 'map__for_each_symbol'</div><div class='ctx'>   - 'map__for_each_symbol_by_name'</div><div class='ctx'>   - 'mas_for_each'</div><div class='add'>+  - 'mas_for_each_rev'</div><div class='ctx'>   - 'mci_for_each_dimm'</div><div class='ctx'>   - 'media_device_for_each_entity'</div><div class='ctx'>   - 'media_device_for_each_intf'</div><div class='hunk'>@@ -561,10 +584,15 @@ ForEachMacros:</div><div class='ctx'>   - 'media_pipeline_for_each_entity'</div><div class='ctx'>   - 'media_pipeline_for_each_pad'</div><div class='ctx'>   - 'mlx5_lag_for_each_peer_mdev'</div><div class='add'>+  - 'mptcp_for_each_subflow'</div><div class='ctx'>   - 'msi_domain_for_each_desc'</div><div class='ctx'>   - 'msi_for_each_desc'</div><div class='ctx'>   - 'mt_for_each'</div><div class='add'>+  - 'nanddev_io_for_each_block'</div><div class='ctx'>   - 'nanddev_io_for_each_page'</div><div class='add'>+  - 'neigh_for_each_in_bucket'</div><div class='add'>+  - 'neigh_for_each_in_bucket_rcu'</div><div class='add'>+  - 'neigh_for_each_in_bucket_safe'</div><div class='ctx'>   - 'netdev_for_each_lower_dev'</div><div class='ctx'>   - 'netdev_for_each_lower_private'</div><div class='ctx'>   - 'netdev_for_each_lower_private_rcu'</div><div class='hunk'>@@ -604,11 +632,11 @@ ForEachMacros:</div><div class='ctx'>   - 'perf_evlist__for_each_entry_safe'</div><div class='ctx'>   - 'perf_evlist__for_each_evsel'</div><div class='ctx'>   - 'perf_evlist__for_each_mmap'</div><div class='add'>+  - 'perf_evsel_for_each_per_thread_period_safe'</div><div class='ctx'>   - 'perf_hpp_list__for_each_format'</div><div class='ctx'>   - 'perf_hpp_list__for_each_format_safe'</div><div class='ctx'>   - 'perf_hpp_list__for_each_sort_list'</div><div class='ctx'>   - 'perf_hpp_list__for_each_sort_list_safe'</div><div class='del'>-  - 'perf_tool_event__for_each_event'</div><div class='ctx'>   - 'plist_for_each'</div><div class='ctx'>   - 'plist_for_each_continue'</div><div class='ctx'>   - 'plist_for_each_entry'</div><div class='hunk'>@@ -627,7 +655,6 @@ ForEachMacros:</div><div class='ctx'>   - 'rdma_for_each_block'</div><div class='ctx'>   - 'rdma_for_each_port'</div><div class='ctx'>   - 'rdma_umem_for_each_dma_block'</div><div class='del'>-  - 'resort_rb__for_each_entry'</div><div class='ctx'>   - 'resource_list_for_each_entry'</div><div class='ctx'>   - 'resource_list_for_each_entry_safe'</div><div class='ctx'>   - 'rhl_for_each_entry_rcu'</div><div class='hunk'>@@ -658,6 +685,7 @@ ForEachMacros:</div><div class='ctx'>   - 'shost_for_each_device'</div><div class='ctx'>   - 'sk_for_each'</div><div class='ctx'>   - 'sk_for_each_bound'</div><div class='add'>+  - 'sk_for_each_bound_safe'</div><div class='ctx'>   - 'sk_for_each_entry_offset_rcu'</div><div class='ctx'>   - 'sk_for_each_from'</div><div class='ctx'>   - 'sk_for_each_rcu'</div><div class='hunk'>@@ -680,7 +708,11 @@ ForEachMacros:</div><div class='ctx'>   - 'tb_property_for_each'</div><div class='ctx'>   - 'tcf_act_for_each_action'</div><div class='ctx'>   - 'tcf_exts_for_each_action'</div><div class='add'>+  - 'test_suite__for_each_test_case'</div><div class='add'>+  - 'tool_pmu__for_each_event'</div><div class='add'>+  - 'ttm_bo_lru_for_each_reserved_guarded'</div><div class='ctx'>   - 'ttm_resource_manager_for_each_res'</div><div class='add'>+  - 'udp_lrpa_for_each_entry_rcu'</div><div class='ctx'>   - 'udp_portaddr_for_each_entry'</div><div class='ctx'>   - 'udp_portaddr_for_each_entry_rcu'</div><div class='ctx'>   - 'usb_hub_for_each_child'</div><div class='hunk'>@@ -690,7 +722,15 @@ ForEachMacros:</div><div class='ctx'>   - 'v4l2_m2m_for_each_src_buf'</div><div class='ctx'>   - 'v4l2_m2m_for_each_src_buf_safe'</div><div class='ctx'>   - 'virtio_device_for_each_vq'</div><div class='add'>+  - 'vkms_config_for_each_connector'</div><div class='add'>+  - 'vkms_config_for_each_crtc'</div><div class='add'>+  - 'vkms_config_for_each_encoder'</div><div class='add'>+  - 'vkms_config_for_each_plane'</div><div class='add'>+  - 'vkms_config_connector_for_each_possible_encoder'</div><div class='add'>+  - 'vkms_config_encoder_for_each_possible_crtc'</div><div class='add'>+  - 'vkms_config_plane_for_each_possible_crtc'</div><div class='ctx'>   - 'while_for_each_ftrace_op'</div><div class='add'>+  - 'workloads__for_each'</div><div class='ctx'>   - 'xa_for_each'</div><div class='ctx'>   - 'xa_for_each_marked'</div><div class='ctx'>   - 'xa_for_each_range'</div><div class='head'>diff --git a/.clippy.toml b/.clippy.toml<br/>index 815c94732ed7..137f41d203de 100644<br/>--- a/<a href='/cgit/linux.git/tree/.clippy.toml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>.clippy.toml</a><br/>+++ b/<a href='/cgit/linux.git/tree/.clippy.toml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>.clippy.toml</a></div><div class='hunk'>@@ -7,5 +7,5 @@ check-private-items = true</div><div class='ctx'> disallowed-macros = [</div><div class='ctx'>     # The `clippy::dbg_macro` lint only works with `std::dbg!`, thus we simulate</div><div class='ctx'>     # it here, see: https://github.com/rust-lang/rust-clippy/issues/11303.</div><div class='del'>-    { path = "kernel::dbg", reason = "the `dbg!` macro is intended as a debugging tool" },</div><div class='add'>+    { path = "kernel::dbg", reason = "the `dbg!` macro is intended as a debugging tool", allow-invalid = true },</div><div class='ctx'> ]</div><div class='head'>diff --git a/.gitignore b/.gitignore<br/>index f2f63e47fb88..bf5ee6e01cd4 100644<br/>--- a/<a href='/cgit/linux.git/tree/.gitignore?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>.gitignore</a><br/>+++ b/<a href='/cgit/linux.git/tree/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>.gitignore</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> *.o</div><div class='ctx'> *.o.*</div><div class='ctx'> *.patch</div><div class='add'>+*.pyc</div><div class='ctx'> *.rmeta</div><div class='ctx'> *.rpm</div><div class='ctx'> *.rsi</div><div class='head'>diff --git a/.mailmap b/.mailmap<br/>index 4f7cd8e23177..6a6aa09e244b 100644<br/>--- a/<a href='/cgit/linux.git/tree/.mailmap?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>.mailmap</a><br/>+++ b/<a href='/cgit/linux.git/tree/.mailmap?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>.mailmap</a></div><div class='hunk'>@@ -102,6 +102,7 @@ Ard Biesheuvel &lt;ardb@kernel.org&gt; &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'> Arnaud Patard &lt;arnaud.patard@rtp-net.org&gt;</div><div class='ctx'> Arnd Bergmann &lt;arnd@arndb.de&gt;</div><div class='ctx'> Arun Kumar Neelakantam &lt;quic_aneela@quicinc.com&gt; &lt;aneela@codeaurora.org&gt;</div><div class='add'>+Asahi Lina &lt;lina+kernel@asahilina.net&gt; &lt;lina@asahilina.net&gt;</div><div class='ctx'> Ashok Raj Nagarajan &lt;quic_arnagara@quicinc.com&gt; &lt;arnagara@codeaurora.org&gt;</div><div class='ctx'> Ashwin Chaugule &lt;quic_ashwinc@quicinc.com&gt; &lt;ashwinc@codeaurora.org&gt;</div><div class='ctx'> Asutosh Das &lt;quic_asutoshd@quicinc.com&gt; &lt;asutoshd@codeaurora.org&gt;</div><div class='hunk'>@@ -312,6 +313,7 @@ Jan Glauber &lt;jan.glauber@gmail.com&gt; &lt;jglauber@cavium.com&gt;</div><div class='ctx'> Jan Kuliga &lt;jtkuliga.kdev@gmail.com&gt; &lt;jankul@alatek.krakow.pl&gt;</div><div class='ctx'> Jarkko Sakkinen &lt;jarkko@kernel.org&gt; &lt;jarkko.sakkinen@linux.intel.com&gt;</div><div class='ctx'> Jarkko Sakkinen &lt;jarkko@kernel.org&gt; &lt;jarkko@profian.com&gt;</div><div class='add'>+Jarkko Sakkinen &lt;jarkko@kernel.org&gt; &lt;jarkko.sakkinen@opinsys.com&gt;</div><div class='ctx'> Jason Gunthorpe &lt;jgg@ziepe.ca&gt; &lt;jgg@mellanox.com&gt;</div><div class='ctx'> Jason Gunthorpe &lt;jgg@ziepe.ca&gt; &lt;jgg@nvidia.com&gt;</div><div class='ctx'> Jason Gunthorpe &lt;jgg@ziepe.ca&gt; &lt;jgunthorpe@obsidianresearch.com&gt;</div><div class='hunk'>@@ -322,6 +324,7 @@ Jayachandran C &lt;c.jayachandran@gmail.com&gt; &lt;jchandra@broadcom.com&gt;</div><div class='ctx'> Jayachandran C &lt;c.jayachandran@gmail.com&gt; &lt;jchandra@digeo.com&gt;</div><div class='ctx'> Jayachandran C &lt;c.jayachandran@gmail.com&gt; &lt;jnair@caviumnetworks.com&gt;</div><div class='ctx'> &lt;jean-philippe@linaro.org&gt; &lt;jean-philippe.brucker@arm.com&gt;</div><div class='add'>+Jean-Michel Hautbois &lt;jeanmichel.hautbois@yoseli.org&gt; &lt;jeanmichel.hautbois@ideasonboard.com&gt;</div><div class='ctx'> Jean Tourrilhes &lt;jt@hpl.hp.com&gt;</div><div class='ctx'> Jeevan Shriram &lt;quic_jshriram@quicinc.com&gt; &lt;jshriram@codeaurora.org&gt;</div><div class='ctx'> Jeff Garzik &lt;jgarzik@pretzel.yyz.us&gt;</div><div class='hunk'>@@ -438,12 +441,16 @@ Linus Lüssing &lt;linus.luessing@c0d3.blue&gt; &lt;ll@simonwunderlich.de&gt;</div><div class='ctx'> Li Yang &lt;leoyang.li@nxp.com&gt; &lt;leoli@freescale.com&gt;</div><div class='ctx'> Li Yang &lt;leoyang.li@nxp.com&gt; &lt;leo@zh-kernel.org&gt;</div><div class='ctx'> Lior David &lt;quic_liord@quicinc.com&gt; &lt;liord@codeaurora.org&gt;</div><div class='add'>+Loic Poulain &lt;loic.poulain@oss.qualcomm.com&gt; &lt;loic.poulain@linaro.org&gt;</div><div class='add'>+Loic Poulain &lt;loic.poulain@oss.qualcomm.com&gt; &lt;loic.poulain@intel.com&gt;</div><div class='ctx'> Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt; &lt;lorenzo.pieralisi@arm.com&gt;</div><div class='ctx'> Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt; &lt;lstoakes@gmail.com&gt;</div><div class='ctx'> Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt; &lt;luca@lucaceresoli.net&gt;</div><div class='ctx'> Luca Weiss &lt;luca@lucaweiss.eu&gt; &lt;luca@z3ntu.xyz&gt;</div><div class='ctx'> Lukasz Luba &lt;lukasz.luba@arm.com&gt; &lt;l.luba@partner.samsung.com&gt;</div><div class='ctx'> Luo Jie &lt;quic_luoj@quicinc.com&gt; &lt;luoj@codeaurora.org&gt;</div><div class='add'>+Lance Yang &lt;lance.yang@linux.dev&gt; &lt;ioworker0@gmail.com&gt;</div><div class='add'>+Lance Yang &lt;lance.yang@linux.dev&gt; &lt;mingzhe.yang@ly.com&gt;</div><div class='ctx'> Maciej W. Rozycki &lt;macro@mips.com&gt; &lt;macro@imgtec.com&gt;</div><div class='ctx'> Maciej W. Rozycki &lt;macro@orcam.me.uk&gt; &lt;macro@linux-mips.org&gt;</div><div class='ctx'> Maharaja Kennadyrajan &lt;quic_mkenna@quicinc.com&gt; &lt;mkenna@codeaurora.org&gt;</div><div class='hunk'>@@ -480,6 +487,7 @@ Matthias Fuchs &lt;socketcan@esd.eu&gt; &lt;matthias.fuchs@esd.eu&gt;</div><div class='ctx'> Matthieu Baerts &lt;matttbe@kernel.org&gt; &lt;matthieu.baerts@tessares.net&gt;</div><div class='ctx'> Matthieu CASTET &lt;castet.matthieu@free.fr&gt;</div><div class='ctx'> Matti Vaittinen &lt;mazziesaccount@gmail.com&gt; &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+Mattijs Korpershoek &lt;mkorpershoek@kernel.org&gt; &lt;mkorpershoek@baylibre.com&gt;</div><div class='ctx'> Matt Ranostay &lt;matt@ranostay.sg&gt; &lt;matt.ranostay@konsulko.com&gt;</div><div class='ctx'> Matt Ranostay &lt;matt@ranostay.sg&gt; &lt;matt@ranostay.consulting&gt;</div><div class='ctx'> Matt Ranostay &lt;matt@ranostay.sg&gt; Matthew Ranostay &lt;mranostay@embeddedalley.com&gt;</div><div class='hunk'>@@ -503,6 +511,7 @@ Mayuresh Janorkar &lt;mayur@ti.com&gt;</div><div class='ctx'> Md Sadre Alam &lt;quic_mdalam@quicinc.com&gt; &lt;mdalam@codeaurora.org&gt;</div><div class='ctx'> Miaoqing Pan &lt;quic_miaoqing@quicinc.com&gt; &lt;miaoqing@codeaurora.org&gt;</div><div class='ctx'> Michael Buesch &lt;m@bues.ch&gt;</div><div class='add'>+Michael Riesch &lt;michael.riesch@collabora.com&gt; &lt;michael.riesch@wolfvision.net&gt;</div><div class='ctx'> Michal Simek &lt;michal.simek@amd.com&gt; &lt;michal.simek@xilinx.com&gt;</div><div class='ctx'> Michel Dänzer &lt;michel@tungstengraphics.com&gt;</div><div class='ctx'> Michel Lespinasse &lt;michel@lespinasse.org&gt;</div><div class='hunk'>@@ -537,6 +546,8 @@ Naveen N Rao &lt;naveen@kernel.org&gt; &lt;naveen.n.rao@linux.vnet.ibm.com&gt;</div><div class='ctx'> Neeraj Upadhyay &lt;neeraj.upadhyay@kernel.org&gt; &lt;quic_neeraju@quicinc.com&gt;</div><div class='ctx'> Neeraj Upadhyay &lt;neeraj.upadhyay@kernel.org&gt; &lt;neeraju@codeaurora.org&gt;</div><div class='ctx'> Neil Armstrong &lt;neil.armstrong@linaro.org&gt; &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+NeilBrown &lt;neil@brown.name&gt; &lt;neilb@suse.de&gt;</div><div class='add'>+NeilBrown &lt;neil@brown.name&gt; &lt;neilb@cse.unsw.edu.au&gt;</div><div class='ctx'> Nguyen Anh Quynh &lt;aquynh@gmail.com&gt;</div><div class='ctx'> Nicholas Piggin &lt;npiggin@gmail.com&gt; &lt;npiggen@suse.de&gt;</div><div class='ctx'> Nicholas Piggin &lt;npiggin@gmail.com&gt; &lt;npiggin@kernel.dk&gt;</div><div class='hunk'>@@ -685,6 +696,8 @@ Simon Wunderlich &lt;sw@simonwunderlich.de&gt; &lt;simon.wunderlich@saxnet.de&gt;</div><div class='ctx'> Simon Wunderlich &lt;sw@simonwunderlich.de&gt; &lt;simon@open-mesh.com&gt;</div><div class='ctx'> Simon Wunderlich &lt;sw@simonwunderlich.de&gt; &lt;siwu@hrz.tu-chemnitz.de&gt;</div><div class='ctx'> Sricharan Ramabadhran &lt;quic_srichara@quicinc.com&gt; &lt;sricharan@codeaurora.org&gt;</div><div class='add'>+Srinivas Kandagatla &lt;srini@kernel.org&gt; &lt;srinivas.kandagatla@st.com&gt;</div><div class='add'>+Srinivas Kandagatla &lt;srini@kernel.org&gt; &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='ctx'> Srinivas Ramana &lt;quic_sramana@quicinc.com&gt; &lt;sramana@codeaurora.org&gt;</div><div class='ctx'> Sriram R &lt;quic_srirrama@quicinc.com&gt; &lt;srirrama@codeaurora.org&gt;</div><div class='ctx'> Sriram Yagnaraman &lt;sriram.yagnaraman@ericsson.com&gt; &lt;sriram.yagnaraman@est.tech&gt;</div><div class='hunk'>@@ -744,6 +757,7 @@ Tvrtko Ursulin &lt;tursulin@ursulin.net&gt; &lt;tvrtko@ursulin.net&gt;</div><div class='ctx'> Tycho Andersen &lt;tycho@tycho.pizza&gt; &lt;tycho@tycho.ws&gt;</div><div class='ctx'> Tzung-Bi Shih &lt;tzungbi@kernel.org&gt; &lt;tzungbi@google.com&gt;</div><div class='ctx'> Uwe Kleine-König &lt;ukleinek@informatik.uni-freiburg.de&gt;</div><div class='add'>+Uwe Kleine-König &lt;u.kleine-koenig@baylibre.com&gt; &lt;ukleinek@baylibre.com&gt;</div><div class='ctx'> Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;</div><div class='ctx'> Uwe Kleine-König &lt;ukleinek@strlen.de&gt;</div><div class='ctx'> Uwe Kleine-König &lt;ukl@pengutronix.de&gt;</div><div class='head'>diff --git a/.pylintrc b/.pylintrc<br/>new file mode 100644<br/>index 000000000000..30b8ae1659f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/.pylintrc?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>.pylintrc</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+[MASTER]</div><div class='add'>+init-hook='import sys; sys.path += ["scripts/lib/kdoc", "scripts/lib/abi"]'</div><div class='head'>diff --git a/CREDITS b/CREDITS<br/>index 1b77fba6c27e..f74d230992d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/CREDITS?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>CREDITS</a><br/>+++ b/<a href='/cgit/linux.git/tree/CREDITS?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>CREDITS</a></div><div class='hunk'>@@ -2071,6 +2071,10 @@ S: 660 Harvard Ave. #7</div><div class='ctx'> S: Santa Clara, CA 95051</div><div class='ctx'> S: USA</div><div class='ctx'> </div><div class='add'>+N: Joonsoo Kim</div><div class='add'>+E: iamjoonsoo.kim@lge.com</div><div class='add'>+D: Slab allocators</div><div class='add'>+</div><div class='ctx'> N: Kukjin Kim</div><div class='ctx'> E: kgene@kernel.org</div><div class='ctx'> D: Samsung S3C, S5P and Exynos ARM architectures</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-block b/Documentation/ABI/stable/sysfs-block<br/>index 3879963f0f01..4ba771b56b3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-block?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/stable/sysfs-block</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-block?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/stable/sysfs-block</a></div><div class='hunk'>@@ -77,7 +77,7 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/diskseq</div><div class='ctx'> Date:		February 2021</div><div class='del'>-Contact:	Matteo Croce &lt;mcroce@microsoft.com&gt;</div><div class='add'>+Contact:	Matteo Croce &lt;teknoraver@meta.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		The /sys/block/&lt;disk&gt;/diskseq files reports the disk</div><div class='ctx'> 		sequence number, which is a monotonically increasing</div><div class='hunk'>@@ -547,6 +547,21 @@ Description:</div><div class='ctx'> 		[RO] Maximum size in bytes of a single element in a DMA</div><div class='ctx'> 		scatter/gather list.</div><div class='ctx'> </div><div class='add'>+What:		/sys/block/&lt;disk&gt;/queue/max_write_streams</div><div class='add'>+Date:		November 2024</div><div class='add'>+Contact:	linux-block@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		[RO] Maximum number of write streams supported, 0 if not</div><div class='add'>+		supported. If supported, valid values are 1 through</div><div class='add'>+		max_write_streams, inclusive.</div><div class='add'>+</div><div class='add'>+What:		/sys/block/&lt;disk&gt;/queue/write_stream_granularity</div><div class='add'>+Date:		November 2024</div><div class='add'>+Contact:	linux-block@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		[RO] Granularity of a write stream in bytes.  The granularity</div><div class='add'>+		of a write stream is the size that should be discarded or</div><div class='add'>+		overwritten together to avoid write amplification in the device.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/queue/max_segments</div><div class='ctx'> Date:		March 2010</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-class-backlight b/Documentation/ABI/stable/sysfs-class-backlight<br/>index 6102d6bebdf9..40b8c46b95b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-class-backlight?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/stable/sysfs-class-backlight</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-class-backlight?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/stable/sysfs-class-backlight</a></div><div class='hunk'>@@ -26,7 +26,12 @@ Date:		March 2006</div><div class='ctx'> KernelVersion:	2.6.17</div><div class='ctx'> Contact:	Richard Purdie &lt;rpurdie@rpsys.net&gt;</div><div class='ctx'> Description:</div><div class='del'>-		Show the actual brightness by querying the hardware.</div><div class='add'>+		Show the actual brightness by querying the hardware. Due</div><div class='add'>+		to implementation differences in hardware this may not</div><div class='add'>+		match the value in 'brightness'. For example some hardware</div><div class='add'>+		may treat blanking differently or have custom power saving</div><div class='add'>+		features. Userspace should generally use the values in</div><div class='add'>+		'brightness' to make decisions.</div><div class='ctx'> Users:		HAL</div><div class='ctx'> </div><div class='ctx'> What:		/sys/class/backlight/&lt;backlight&gt;/max_brightness</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io<br/>index 2cdfd09123da..f59461111221 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-driver-mlxreg-io?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/stable/sysfs-driver-mlxreg-io</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/stable/sysfs-driver-mlxreg-io?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/stable/sysfs-driver-mlxreg-io</a></div><div class='hunk'>@@ -715,3 +715,101 @@ Description:	This file shows 1 in case the system reset happened due to the</div><div class='ctx'> 		switch board.</div><div class='ctx'> </div><div class='ctx'> 		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/global_wp_request</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file when written 1 activates request to allow access to</div><div class='add'>+		the write protected flashes. Such request can be performed only</div><div class='add'>+		for system equipped with BMC (Board Management Controller),</div><div class='add'>+		which can grant access to protected flashes. In case BMC allows</div><div class='add'>+		access - it will respond with "global_wp_response". BMC decides</div><div class='add'>+		regarding time window of granted access. After granted window is</div><div class='add'>+		expired, BMC will change value back to 0.</div><div class='add'>+		Default value is 0.</div><div class='add'>+</div><div class='add'>+		The file is read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/global_wp_response</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file, when set 1, indicates that access to protected</div><div class='add'>+		flashes have been granted to host CPU by BMC.</div><div class='add'>+		Default value is 0.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/shutdown_unlock</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	When ASICs are getting overheated, system protection</div><div class='add'>+		hardware mechanism enforces system reboot. After system</div><div class='add'>+		reboot ASICs come up in locked state. To unlock ASICs,</div><div class='add'>+		this file should be written 1</div><div class='add'>+		Default value is 0.</div><div class='add'>+</div><div class='add'>+		The file is read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/boot_progress</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files show the Data Process Unit board boot progress</div><div class='add'>+		state. Valid states are:</div><div class='add'>+		- 4 : OS starting.</div><div class='add'>+		- 5 : OS running.</div><div class='add'>+		- 6 : Low-Power Standby.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/dpu_id</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file shows hardware Id of Data Process Unit board.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/reset_aux_pwr_or_reload</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/reset_dpu_thermal</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/reset_from_main_board</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files expose the cause of the most recent reset of the Data</div><div class='add'>+		Processing Unit (DPU) board. The possible causes are:</div><div class='add'>+		- Power auxiliary outage or power reload.</div><div class='add'>+		- Thermal shutdown.</div><div class='add'>+		- Reset request from the main board.</div><div class='add'>+		Value 1 in file means this is reset cause, 0 - otherwise. Only one of</div><div class='add'>+		the above causes could be 1 at the same time, representing only last</div><div class='add'>+		reset cause.</div><div class='add'>+</div><div class='add'>+		The files are read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/perst_rst</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/phy_rst</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/tpm_rst</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/usbphy_rst</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files allow to reset hardware components of Data Process</div><div class='add'>+		Unit board. Respectively PCI, Ethernet PHY, TPM and USB PHY</div><div class='add'>+		resets.</div><div class='add'>+		Default values for all the attributes is 1. Writing 0 will</div><div class='add'>+		cause reset of the related component.</div><div class='add'>+</div><div class='add'>+		The files are read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/*-00**/mlxreg-io.*/hwmon/hwmon*/ufm_upgrade</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files show status of Unified Fabric Manager upgrade.</div><div class='add'>+		state. 0 - means upgrade is done, 1 - otherwise.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='head'>diff --git a/Documentation/ABI/testing/configfs-tsm b/Documentation/ABI/testing/configfs-tsm-report<br/>index 534408bc1408..534408bc1408 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/configfs-tsm?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/configfs-tsm</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/configfs-tsm-report?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/configfs-tsm-report</a></div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-alienware-wmi b/Documentation/ABI/testing/debugfs-alienware-wmi<br/>new file mode 100644<br/>index 000000000000..c7f525d6baac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/debugfs-alienware-wmi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/debugfs-alienware-wmi</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+What:		/sys/kernel/debug/alienware-wmi-&lt;wmi_device_name&gt;/system_description</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.15</div><div class='add'>+Contact:	Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file exposes the raw ``system_description`` number reported</div><div class='add'>+		by the WMAX device.</div><div class='add'>+</div><div class='add'>+		Only present on devices with the AWCC interface.</div><div class='add'>+</div><div class='add'>+		See Documentation/admin-guide/laptops/alienware-wmi.rst for</div><div class='add'>+		details.</div><div class='add'>+</div><div class='add'>+		RO</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/alienware-wmi-&lt;wmi_device_name&gt;/hwmon_data</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.15</div><div class='add'>+Contact:	Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file exposes HWMON private data.</div><div class='add'>+</div><div class='add'>+		Includes fan sensor count, temperature sensor count, internal</div><div class='add'>+		fan IDs and internal temp IDs.</div><div class='add'>+</div><div class='add'>+		See Documentation/admin-guide/laptops/alienware-wmi.rst for</div><div class='add'>+		details.</div><div class='add'>+</div><div class='add'>+		RO</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/alienware-wmi-&lt;wmi_device_name&gt;/pprof_data</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.15</div><div class='add'>+Contact:	Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file exposes Platform Profile private data.</div><div class='add'>+</div><div class='add'>+		Includes internal mapping to platform profiles and thermal</div><div class='add'>+		profile IDs.</div><div class='add'>+</div><div class='add'>+		See Documentation/admin-guide/laptops/alienware-wmi.rst for</div><div class='add'>+		details.</div><div class='add'>+</div><div class='add'>+		RO</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/alienware-wmi-&lt;wmi_device_name&gt;/gpio_ctl/total_gpios</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Total number of GPIO pins reported by the device.</div><div class='add'>+</div><div class='add'>+		RO</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/alienware-wmi-&lt;wmi_device_name&gt;/gpio_ctl/pinX</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file controls GPIO pin X status.</div><div class='add'>+</div><div class='add'>+		See Documentation/wmi/devices/alienware-wmi.rst for details.</div><div class='add'>+</div><div class='add'>+		RW</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-wmi b/Documentation/ABI/testing/sysfs-bus-wmi<br/>index aadb35b82198..d71a219c610e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-bus-wmi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-bus-wmi</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-bus-wmi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-bus-wmi</a></div><div class='hunk'>@@ -76,6 +76,6 @@ Date:		May 2017</div><div class='ctx'> Contact:	Darren Hart (VMware) &lt;dvhart@infradead.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		This file contains a boolean flags signaling the data block</div><div class='del'>-		aassociated with the given WMI device is writable. If the</div><div class='add'>+		associated with the given WMI device is writable. If the</div><div class='ctx'> 		given WMI device is not associated with a data block, then</div><div class='ctx'> 		this file will not exist.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power<br/>index 2a5c1a09a28f..87a058e14e7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-class-power?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-class-power</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-class-power?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-class-power</a></div><div class='hunk'>@@ -456,7 +456,7 @@ Description:</div><div class='ctx'> 			      "Over voltage", "Under voltage", "Unspecified failure", "Cold",</div><div class='ctx'> 			      "Watchdog timer expire", "Safety timer expire",</div><div class='ctx'> 			      "Over current", "Calibration required", "Warm",</div><div class='del'>-			      "Cool", "Hot", "No battery"</div><div class='add'>+			      "Cool", "Hot", "No battery", "Blown fuse", "Cell imbalance"</div><div class='ctx'> </div><div class='ctx'> What:		/sys/class/power_supply/&lt;supply_name&gt;/precharge_current</div><div class='ctx'> Date:		June 2017</div><div class='hunk'>@@ -508,11 +508,12 @@ Description:</div><div class='ctx'> 		Access: Read, Write</div><div class='ctx'> </div><div class='ctx'> 		Valid values:</div><div class='del'>-			================ ====================================</div><div class='del'>-			auto:            Charge normally, respect thresholds</div><div class='del'>-			inhibit-charge:  Do not charge while AC is attached</div><div class='del'>-			force-discharge: Force discharge while AC is attached</div><div class='del'>-			================ ====================================</div><div class='add'>+			===================== ========================================</div><div class='add'>+			auto:                 Charge normally, respect thresholds</div><div class='add'>+			inhibit-charge:       Do not charge while AC is attached</div><div class='add'>+			inhibit-charge-awake: inhibit-charge only when device is awake</div><div class='add'>+			force-discharge:      Force discharge while AC is attached</div><div class='add'>+			===================== ========================================</div><div class='ctx'> </div><div class='ctx'> What:		/sys/class/power_supply/&lt;supply_name&gt;/technology</div><div class='ctx'> Date:		May 2007</div><div class='hunk'>@@ -822,3 +823,46 @@ Description:</div><div class='ctx'> 		Each entry is a link to the device which registered the extension.</div><div class='ctx'> </div><div class='ctx'> 		Access: Read</div><div class='add'>+</div><div class='add'>+What:		/sys/class/power_supply/max8971-charger/fast_charge_timer</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.15.0</div><div class='add'>+Contact:	Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry shows and sets the maximum time the max8971</div><div class='add'>+		charger operates in fast-charge mode. When the timer expires</div><div class='add'>+		the device will terminate fast-charge mode (charging current</div><div class='add'>+		will drop to 0 A) and will trigger interrupt.</div><div class='add'>+</div><div class='add'>+		Valid values:</div><div class='add'>+</div><div class='add'>+		- 4 - 10 (hours), step by 1</div><div class='add'>+		- 0: disabled.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/power_supply/max8971-charger/top_off_threshold_current</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.15.0</div><div class='add'>+Contact:	Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry shows and sets the charging current threshold for</div><div class='add'>+		entering top-off charging mode. When charging current in fast</div><div class='add'>+		charge mode drops below this value, the charger will trigger</div><div class='add'>+		interrupt and start top-off charging mode.</div><div class='add'>+</div><div class='add'>+		Valid values:</div><div class='add'>+</div><div class='add'>+		- 50000 - 200000 (microamps), step by 50000 (rounded down)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/power_supply/max8971-charger/top_off_timer</div><div class='add'>+Date:		May 2025</div><div class='add'>+KernelVersion:	6.15.0</div><div class='add'>+Contact:	Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry shows and sets the maximum time the max8971</div><div class='add'>+		charger operates in top-off charge mode. When the timer expires</div><div class='add'>+		the device will terminate top-off charge mode (charging current</div><div class='add'>+		will drop to 0 A) and will trigger interrupt.</div><div class='add'>+</div><div class='add'>+		Valid values:</div><div class='add'>+</div><div class='add'>+		- 0 - 70 (minutes), step by 10 (rounded down)</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-power-gaokun b/Documentation/ABI/testing/sysfs-class-power-gaokun<br/>new file mode 100644<br/>index 000000000000..0633aed7b355<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-class-power-gaokun?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-class-power-gaokun</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+What:		/sys/class/power_supply/gaokun-ec-battery/smart_charge_delay</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.15</div><div class='add'>+Contact:	Pengyu Luo &lt;mitltlatltl@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry allows configuration of smart charging delay.</div><div class='add'>+</div><div class='add'>+		Smart charging behavior: when the power adapter is connected</div><div class='add'>+		for delay hours, battery charging will follow the rules of</div><div class='add'>+		charge_control_start_threshold and charge_control_end_threshold.</div><div class='add'>+		For more information about charge control, please refer to</div><div class='add'>+		sysfs-class-power.</div><div class='add'>+</div><div class='add'>+		Access: Read, Write</div><div class='add'>+</div><div class='add'>+		Valid values: In hours (non-negative)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/power_supply/gaokun-ec-battery/battery_adaptive_charge</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.15</div><div class='add'>+Contact:	Pengyu Luo &lt;mitltlatltl@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry allows enabling battery adaptive charging.</div><div class='add'>+</div><div class='add'>+		Access: Read, Write</div><div class='add'>+</div><div class='add'>+		Valid values: 0 (disabled) or 1 (enabled)</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu<br/>index 206079d3bd5b..bf85f4de6862 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-devices-system-cpu</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-devices-system-cpu</a></div><div class='hunk'>@@ -111,6 +111,7 @@ What:		/sys/devices/system/cpu/cpuidle/available_governors</div><div class='ctx'> 		/sys/devices/system/cpu/cpuidle/current_driver</div><div class='ctx'> 		/sys/devices/system/cpu/cpuidle/current_governor</div><div class='ctx'> 		/sys/devices/system/cpu/cpuidle/current_governer_ro</div><div class='add'>+		/sys/devices/system/cpu/cpuidle/intel_c1_demotion</div><div class='ctx'> Date:		September 2007</div><div class='ctx'> Contact:	Linux kernel mailing list &lt;linux-kernel@vger.kernel.org&gt;</div><div class='ctx'> Description:	Discover cpuidle policy and mechanism</div><div class='hunk'>@@ -132,7 +133,11 @@ Description:	Discover cpuidle policy and mechanism</div><div class='ctx'> </div><div class='ctx'> 		current_governor_ro: (RO) displays current idle policy.</div><div class='ctx'> </div><div class='del'>-		See Documentation/admin-guide/pm/cpuidle.rst and</div><div class='add'>+		intel_c1_demotion: (RW) enables/disables the C1 demotion</div><div class='add'>+		feature on Intel CPUs.</div><div class='add'>+</div><div class='add'>+		See Documentation/admin-guide/pm/cpuidle.rst,</div><div class='add'>+		Documentation/admin-guide/pm/intel_idle.rst, and</div><div class='ctx'> 		Documentation/driver-api/pm/cpuidle.rst for more information.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -268,6 +273,60 @@ Description:	Discover CPUs in the same CPU frequency coordination domain</div><div class='ctx'> 		This file is only present if the acpi-cpufreq or the cppc-cpufreq</div><div class='ctx'> 		drivers are in use.</div><div class='ctx'> </div><div class='add'>+What:		/sys/devices/system/cpu/cpuX/cpufreq/auto_select</div><div class='add'>+Date:		May 2025</div><div class='add'>+Contact:	linux-pm@vger.kernel.org</div><div class='add'>+Description:	Autonomous selection enable</div><div class='add'>+</div><div class='add'>+		Read/write interface to control autonomous selection enable</div><div class='add'>+			Read returns autonomous selection status:</div><div class='add'>+				0: autonomous selection is disabled</div><div class='add'>+				1: autonomous selection is enabled</div><div class='add'>+</div><div class='add'>+			Write 'y' or '1' or 'on' to enable autonomous selection.</div><div class='add'>+			Write 'n' or '0' or 'off' to disable autonomous selection.</div><div class='add'>+</div><div class='add'>+		This file is only present if the cppc-cpufreq driver is in use.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/system/cpu/cpuX/cpufreq/auto_act_window</div><div class='add'>+Date:		May 2025</div><div class='add'>+Contact:	linux-pm@vger.kernel.org</div><div class='add'>+Description:	Autonomous activity window</div><div class='add'>+</div><div class='add'>+		This file indicates a moving utilization sensitivity window to</div><div class='add'>+		the platform's autonomous selection policy.</div><div class='add'>+</div><div class='add'>+		Read/write an integer represents autonomous activity window (in</div><div class='add'>+		microseconds) from/to this file. The max value to write is</div><div class='add'>+		1270000000 but the max significand is 127. This means that if 128</div><div class='add'>+		is written to this file, 127 will be stored. If the value is</div><div class='add'>+		greater than 130, only the first two digits will be saved as</div><div class='add'>+		significand.</div><div class='add'>+</div><div class='add'>+		Writing a zero value to this file enable the platform to</div><div class='add'>+		determine an appropriate Activity Window depending on the workload.</div><div class='add'>+</div><div class='add'>+		Writing to this file only has meaning when Autonomous Selection is</div><div class='add'>+		enabled.</div><div class='add'>+</div><div class='add'>+		This file is only present if the cppc-cpufreq driver is in use.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/system/cpu/cpuX/cpufreq/energy_performance_preference_val</div><div class='add'>+Date:		May 2025</div><div class='add'>+Contact:	linux-pm@vger.kernel.org</div><div class='add'>+Description:	Energy performance preference</div><div class='add'>+</div><div class='add'>+		Read/write an 8-bit integer from/to this file. This file</div><div class='add'>+		represents a range of values from 0 (performance preference) to</div><div class='add'>+		0xFF (energy efficiency preference) that influences the rate of</div><div class='add'>+		performance increase/decrease and the result of the hardware's</div><div class='add'>+		energy efficiency and performance optimization policies.</div><div class='add'>+</div><div class='add'>+		Writing to this file only has meaning when Autonomous Selection is</div><div class='add'>+		enabled.</div><div class='add'>+</div><div class='add'>+		This file is only present if the cppc-cpufreq driver is in use.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1}</div><div class='ctx'> Date:		August 2008</div><div class='hunk'>@@ -485,6 +544,7 @@ What:		/sys/devices/system/cpu/cpuX/regs/</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/regs/identification/</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/regs/identification/midr_el1</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/regs/identification/revidr_el1</div><div class='add'>+		/sys/devices/system/cpu/cpuX/regs/identification/aidr_el1</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/regs/identification/smidr_el1</div><div class='ctx'> Date:		June 2016</div><div class='ctx'> Contact:	Linux ARM Kernel Mailing list &lt;linux-arm-kernel@lists.infradead.org&gt;</div><div class='hunk'>@@ -511,11 +571,13 @@ Description:	information about CPUs heterogeneity.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/system/cpu/vulnerabilities</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/gather_data_sampling</div><div class='add'>+		/sys/devices/system/cpu/vulnerabilities/indirect_target_selection</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/itlb_multihit</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/l1tf</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/mds</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/meltdown</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/mmio_stale_data</div><div class='add'>+		/sys/devices/system/cpu/vulnerabilities/old_microcode</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/reg_file_data_sampling</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/retbleed</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/spec_store_bypass</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest b/Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest<br/>new file mode 100644<br/>index 000000000000..8fca56c8c9df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+What:		/sys/devices/virtual/misc/tdx_guest/measurements/MRNAME[:HASH]</div><div class='add'>+Date:		April, 2025</div><div class='add'>+KernelVersion:	v6.16</div><div class='add'>+Contact:	linux-coco@lists.linux.dev</div><div class='add'>+Description:</div><div class='add'>+		Value of a TDX measurement register (MR). MRNAME and HASH above</div><div class='add'>+		are placeholders. The optional suffix :HASH is used for MRs</div><div class='add'>+		that have associated hash algorithms. See below for a complete</div><div class='add'>+		list of TDX MRs exposed via sysfs. Refer to Intel TDX Module</div><div class='add'>+		ABI Specification for the definition of TDREPORT and the full</div><div class='add'>+		list of TDX measurements.</div><div class='add'>+</div><div class='add'>+		Intel TDX Module ABI Specification can be found at:</div><div class='add'>+		https://www.intel.com/content/www/us/en/developer/tools/trust-domain-extensions/documentation.html#architecture</div><div class='add'>+</div><div class='add'>+		See also:</div><div class='add'>+		https://docs.kernel.org/driver-api/coco/measurement-registers.html</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/tdx_guest/measurements/mrconfigid</div><div class='add'>+Date:		April, 2025</div><div class='add'>+KernelVersion:	v6.16</div><div class='add'>+Contact:	linux-coco@lists.linux.dev</div><div class='add'>+Description:</div><div class='add'>+		(RO) MRCONFIGID - 48-byte immutable storage typically used for</div><div class='add'>+		software-defined ID for non-owner-defined configuration of the</div><div class='add'>+		guest TD – e.g., run-time or OS configuration.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/tdx_guest/measurements/mrowner</div><div class='add'>+Date:		April, 2025</div><div class='add'>+KernelVersion:	v6.16</div><div class='add'>+Contact:	linux-coco@lists.linux.dev</div><div class='add'>+Description:</div><div class='add'>+		(RO) MROWNER - 48-byte immutable storage typically used for</div><div class='add'>+		software-defined ID for the guest TD’s owner.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/tdx_guest/measurements/mrownerconfig</div><div class='add'>+Date:		April, 2025</div><div class='add'>+KernelVersion:	v6.16</div><div class='add'>+Contact:	linux-coco@lists.linux.dev</div><div class='add'>+Description:</div><div class='add'>+		(RO) MROWNERCONFIG - 48-byte immutable storage typically used</div><div class='add'>+		for software-defined ID for owner-defined configuration of the</div><div class='add'>+		guest TD – e.g., specific to the workload rather than the</div><div class='add'>+		run-time or OS.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/tdx_guest/measurements/mrtd:sha384</div><div class='add'>+Date:		April, 2025</div><div class='add'>+KernelVersion:	v6.16</div><div class='add'>+Contact:	linux-coco@lists.linux.dev</div><div class='add'>+Description:</div><div class='add'>+		(RO) MRTD - Measurement of the initial contents of the TD.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/tdx_guest/measurements/rtmr[0123]:sha384</div><div class='add'>+Date:		April, 2025</div><div class='add'>+KernelVersion:	v6.16</div><div class='add'>+Contact:	linux-coco@lists.linux.dev</div><div class='add'>+Description:</div><div class='add'>+		(RW) RTMR[0123] - 4 Run-Time extendable Measurement Registers.</div><div class='add'>+		Read from any of these returns the current value of the</div><div class='add'>+		corresponding RTMR. Write extends the written buffer to the</div><div class='add'>+		RTMR. All writes must start at offset 0 and be 48 bytes in</div><div class='add'>+		size. Partial writes will result in EINVAL returned by the</div><div class='add'>+		write() syscall.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd b/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd<br/>index 2a19584d091e..8c9718d83e9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-driver-hid-appletb-kbd</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> What:		/sys/bus/hid/drivers/hid-appletb-kbd/&lt;dev&gt;/mode</div><div class='del'>-Date:		September, 2023</div><div class='del'>-KernelVersion:	6.5</div><div class='add'>+Date:		March, 2025</div><div class='add'>+KernelVersion:	6.15</div><div class='ctx'> Contact:	linux-input@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> 		The set of keys displayed on the Touch Bar.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon<br/>index 9bce281314df..4ca917ac6382 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon</a></div><div class='hunk'>@@ -111,7 +111,7 @@ Description:	RO. Package current voltage in millivolt.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/temp2_input</div><div class='ctx'> Date:		March 2025</div><div class='del'>-KernelVersion:	6.14</div><div class='add'>+KernelVersion:	6.15</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='ctx'> Description:	RO. Package temperature in millidegree Celsius.</div><div class='ctx'> </div><div class='hunk'>@@ -119,8 +119,32 @@ Description:	RO. Package temperature in millidegree Celsius.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/temp3_input</div><div class='ctx'> Date:		March 2025</div><div class='del'>-KernelVersion:	6.14</div><div class='add'>+KernelVersion:	6.15</div><div class='ctx'> Contact:	intel-xe@lists.freedesktop.org</div><div class='ctx'> Description:	RO. VRAM temperature in millidegree Celsius.</div><div class='ctx'> </div><div class='ctx'> 		Only supported for particular Intel Xe graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/fan1_input</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	intel-xe@lists.freedesktop.org</div><div class='add'>+Description:	RO. Fan 1 speed in RPM.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/fan2_input</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	intel-xe@lists.freedesktop.org</div><div class='add'>+Description:	RO. Fan 2 speed in RPM.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xe/.../hwmon/hwmon&lt;i&gt;/fan3_input</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	intel-xe@lists.freedesktop.org</div><div class='add'>+Description:	RO. Fan 3 speed in RPM.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel Xe graphics platforms.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-qat_ras b/Documentation/ABI/testing/sysfs-driver-qat_ras<br/>index 176dea1e9c0a..82ceb04445ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-qat_ras?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-qat_ras</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-qat_ras?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-driver-qat_ras</a></div><div class='hunk'>@@ -4,7 +4,7 @@ KernelVersion:	6.7</div><div class='ctx'> Contact:	qat-linux@intel.com</div><div class='ctx'> Description:	(RO) Reports the number of correctable errors detected by the device.</div><div class='ctx'> </div><div class='del'>-		This attribute is only available for qat_4xxx devices.</div><div class='add'>+		This attribute is only available for qat_4xxx and qat_6xxx devices.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/pci/devices/&lt;BDF&gt;/qat_ras/errors_nonfatal</div><div class='ctx'> Date:		January 2024</div><div class='hunk'>@@ -12,7 +12,7 @@ KernelVersion:	6.7</div><div class='ctx'> Contact:	qat-linux@intel.com</div><div class='ctx'> Description:	(RO) Reports the number of non fatal errors detected by the device.</div><div class='ctx'> </div><div class='del'>-		This attribute is only available for qat_4xxx devices.</div><div class='add'>+		This attribute is only available for qat_4xxx and qat_6xxx devices.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/pci/devices/&lt;BDF&gt;/qat_ras/errors_fatal</div><div class='ctx'> Date:		January 2024</div><div class='hunk'>@@ -20,7 +20,7 @@ KernelVersion:	6.7</div><div class='ctx'> Contact:	qat-linux@intel.com</div><div class='ctx'> Description:	(RO) Reports the number of fatal errors detected by the device.</div><div class='ctx'> </div><div class='del'>-		This attribute is only available for qat_4xxx devices.</div><div class='add'>+		This attribute is only available for qat_4xxx and qat_6xxx devices.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/pci/devices/&lt;BDF&gt;/qat_ras/reset_error_counters</div><div class='ctx'> Date:		January 2024</div><div class='hunk'>@@ -38,4 +38,4 @@ Description:	(WO) Write to resets all error counters of a device.</div><div class='ctx'> 			# cat /sys/bus/pci/devices/&lt;BDF&gt;/qat_ras/errors_fatal</div><div class='ctx'> 			0</div><div class='ctx'> </div><div class='del'>-		This attribute is only available for qat_4xxx devices.</div><div class='add'>+		This attribute is only available for qat_4xxx and qat_6xxx devices.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-ufs b/Documentation/ABI/testing/sysfs-driver-ufs<br/>index ae0191295d29..d4140dc6c5ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-ufs?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-driver-ufs</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-driver-ufs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-driver-ufs</a></div><div class='hunk'>@@ -1604,3 +1604,84 @@ Description:</div><div class='ctx'> 		prevent the UFS from frequently performing clock gating/ungating.</div><div class='ctx'> </div><div class='ctx'> 		The attribute is read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_count</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/device_lvl_exception_count</div><div class='add'>+Date:		March 2025</div><div class='add'>+Contact:	Bao D. Nguyen &lt;quic_nguyenb@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This attribute is applicable to ufs devices compliant to the</div><div class='add'>+		JEDEC specifications version 4.1 or later. The</div><div class='add'>+		device_lvl_exception_count is a counter indicating the number of</div><div class='add'>+		times the device level exceptions have occurred since the last</div><div class='add'>+		time this variable is reset.  Writing a 0 value to this</div><div class='add'>+		attribute will reset the device_lvl_exception_count.  If the</div><div class='add'>+		device_lvl_exception_count reads a positive value, the user</div><div class='add'>+		application should read the device_lvl_exception_id attribute to</div><div class='add'>+		know more information about the exception.</div><div class='add'>+</div><div class='add'>+		The attribute is read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/device_lvl_exception_id</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/device_lvl_exception_id</div><div class='add'>+Date:		March 2025</div><div class='add'>+Contact:	Bao D. Nguyen &lt;quic_nguyenb@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Reading the device_lvl_exception_id returns the</div><div class='add'>+		qDeviceLevelExceptionID attribute of the ufs device JEDEC</div><div class='add'>+		specification version 4.1. The definition of the</div><div class='add'>+		qDeviceLevelExceptionID is the ufs device vendor specific</div><div class='add'>+		implementation.  Refer to the device manufacturer datasheet for</div><div class='add'>+		more information on the meaning of the qDeviceLevelExceptionID</div><div class='add'>+		attribute value.</div><div class='add'>+</div><div class='add'>+		The attribute is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/wb_resize_enable</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/wb_resize_enable</div><div class='add'>+Date:		April 2025</div><div class='add'>+Contact:	Huan Tang &lt;tanghuan@vivo.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The host can enable the WriteBooster buffer resize by setting this</div><div class='add'>+		attribute.</div><div class='add'>+</div><div class='add'>+		========  ======================================</div><div class='add'>+		idle      There is no resize operation</div><div class='add'>+		decrease  Decrease WriteBooster buffer size</div><div class='add'>+		increase  Increase WriteBooster buffer size</div><div class='add'>+		========  ======================================</div><div class='add'>+</div><div class='add'>+		The file is write only.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/attributes/wb_resize_hint</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/attributes/wb_resize_hint</div><div class='add'>+Date:		April 2025</div><div class='add'>+Contact:	Huan Tang &lt;tanghuan@vivo.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		wb_resize_hint indicates hint information about which type of resize</div><div class='add'>+		for WriteBooster buffer is recommended by the device.</div><div class='add'>+</div><div class='add'>+		=========  ======================================</div><div class='add'>+		keep       Recommend keep the buffer size</div><div class='add'>+		decrease   Recommend to decrease the buffer size</div><div class='add'>+		increase   Recommend to increase the buffer size</div><div class='add'>+		=========  ======================================</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/attributes/wb_resize_status</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/attributes/wb_resize_status</div><div class='add'>+Date:		April 2025</div><div class='add'>+Contact:	Huan Tang &lt;tanghuan@vivo.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The host can check the resize operation status of the WriteBooster</div><div class='add'>+		buffer by reading this attribute.</div><div class='add'>+</div><div class='add'>+		================  ========================================</div><div class='add'>+		idle              Resize operation is not issued</div><div class='add'>+		in_progress       Resize operation in progress</div><div class='add'>+		complete_success  Resize operation completed successfully</div><div class='add'>+		general_failure   Resize operation general failure</div><div class='add'>+		================  ========================================</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-firmware-acpi b/Documentation/ABI/testing/sysfs-firmware-acpi<br/>index 5249ad5a96d9..f4de60c4134d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-firmware-acpi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-firmware-acpi</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-firmware-acpi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-firmware-acpi</a></div><div class='hunk'>@@ -248,3 +248,24 @@ Description:</div><div class='ctx'> 		  # cat ff_pwr_btn</div><div class='ctx'> 		  7	enabled</div><div class='ctx'> </div><div class='add'>+What:		/sys/firmware/acpi/memory_ranges/rangeX</div><div class='add'>+Date:		February 2025</div><div class='add'>+Contact:	Tony Luck &lt;tony.luck@intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		On systems with the ACPI MRRM table reports the parameters for</div><div class='add'>+		each range.</div><div class='add'>+</div><div class='add'>+		base: Starting system physical address.</div><div class='add'>+</div><div class='add'>+		length: Length of this range in bytes.</div><div class='add'>+</div><div class='add'>+		node: NUMA node that this range belongs to. Negative numbers</div><div class='add'>+		indicate that the node number could not be determined (e.g</div><div class='add'>+		for an address range that is reserved for future hot add of</div><div class='add'>+		memory).</div><div class='add'>+</div><div class='add'>+		local_region_id: ID associated with access by agents</div><div class='add'>+		local to this range of addresses.</div><div class='add'>+</div><div class='add'>+		remote_region_id: ID associated with access by agents</div><div class='add'>+		non-local to this range of addresses.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-fs-erofs b/Documentation/ABI/testing/sysfs-fs-erofs<br/>index b134146d735b..bf3b6299c15e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-fs-erofs?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-fs-erofs</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-fs-erofs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-fs-erofs</a></div><div class='hunk'>@@ -27,3 +27,11 @@ Description:	Writing to this will drop compression-related caches,</div><div class='ctx'> 		- 1 : invalidate cached compressed folios</div><div class='ctx'> 		- 2 : drop in-memory pclusters</div><div class='ctx'> 		- 3 : drop in-memory pclusters and cached compressed folios</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/erofs/accel</div><div class='add'>+Date:		May 2025</div><div class='add'>+Contact:	"Bo Liu" &lt;liubo03@inspur.com&gt;</div><div class='add'>+Description:	Used to set or show hardware accelerators in effect</div><div class='add'>+		and multiple accelerators are separated by '\n'.</div><div class='add'>+		Supported accelerator(s): qat_deflate.</div><div class='add'>+		Disable all accelerators with an empty string (echo &gt; accel).</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs<br/>index 59adb7dc6f9e..bf03263b9f46 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-fs-f2fs?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-fs-f2fs</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-fs-f2fs?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-fs-f2fs</a></div><div class='hunk'>@@ -270,7 +270,7 @@ Description:	Shows all enabled kernel features.</div><div class='ctx'> 		inode_checksum, flexible_inline_xattr, quota_ino,</div><div class='ctx'> 		inode_crtime, lost_found, verity, sb_checksum,</div><div class='ctx'> 		casefold, readonly, compression, test_dummy_encryption_v2,</div><div class='del'>-		atomic_write, pin_file, encrypted_casefold.</div><div class='add'>+		atomic_write, pin_file, encrypted_casefold, linear_lookup.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/fs/f2fs/&lt;disk&gt;/inject_rate</div><div class='ctx'> Date:		May 2016</div><div class='hunk'>@@ -710,32 +710,34 @@ Description:	Support configuring fault injection type, should be</div><div class='ctx'> 		enabled with fault_injection option, fault type value</div><div class='ctx'> 		is shown below, it supports single or combined type.</div><div class='ctx'> </div><div class='del'>-		===========================      ===========</div><div class='add'>+		===========================      ==========</div><div class='ctx'> 		Type_Name                        Type_Value</div><div class='del'>-		===========================      ===========</div><div class='del'>-		FAULT_KMALLOC                    0x000000001</div><div class='del'>-		FAULT_KVMALLOC                   0x000000002</div><div class='del'>-		FAULT_PAGE_ALLOC                 0x000000004</div><div class='del'>-		FAULT_PAGE_GET                   0x000000008</div><div class='del'>-		FAULT_ALLOC_BIO                  0x000000010 (obsolete)</div><div class='del'>-		FAULT_ALLOC_NID                  0x000000020</div><div class='del'>-		FAULT_ORPHAN                     0x000000040</div><div class='del'>-		FAULT_BLOCK                      0x000000080</div><div class='del'>-		FAULT_DIR_DEPTH                  0x000000100</div><div class='del'>-		FAULT_EVICT_INODE                0x000000200</div><div class='del'>-		FAULT_TRUNCATE                   0x000000400</div><div class='del'>-		FAULT_READ_IO                    0x000000800</div><div class='del'>-		FAULT_CHECKPOINT                 0x000001000</div><div class='del'>-		FAULT_DISCARD                    0x000002000</div><div class='del'>-		FAULT_WRITE_IO                   0x000004000</div><div class='del'>-		FAULT_SLAB_ALLOC                 0x000008000</div><div class='del'>-		FAULT_DQUOT_INIT                 0x000010000</div><div class='del'>-		FAULT_LOCK_OP                    0x000020000</div><div class='del'>-		FAULT_BLKADDR_VALIDITY           0x000040000</div><div class='del'>-		FAULT_BLKADDR_CONSISTENCE        0x000080000</div><div class='del'>-		FAULT_NO_SEGMENT                 0x000100000</div><div class='del'>-		FAULT_INCONSISTENT_FOOTER        0x000200000</div><div class='del'>-		===========================      ===========</div><div class='add'>+		===========================      ==========</div><div class='add'>+		FAULT_KMALLOC                    0x00000001</div><div class='add'>+		FAULT_KVMALLOC                   0x00000002</div><div class='add'>+		FAULT_PAGE_ALLOC                 0x00000004</div><div class='add'>+		FAULT_PAGE_GET                   0x00000008</div><div class='add'>+		FAULT_ALLOC_BIO                  0x00000010 (obsolete)</div><div class='add'>+		FAULT_ALLOC_NID                  0x00000020</div><div class='add'>+		FAULT_ORPHAN                     0x00000040</div><div class='add'>+		FAULT_BLOCK                      0x00000080</div><div class='add'>+		FAULT_DIR_DEPTH                  0x00000100</div><div class='add'>+		FAULT_EVICT_INODE                0x00000200</div><div class='add'>+		FAULT_TRUNCATE                   0x00000400</div><div class='add'>+		FAULT_READ_IO                    0x00000800</div><div class='add'>+		FAULT_CHECKPOINT                 0x00001000</div><div class='add'>+		FAULT_DISCARD                    0x00002000</div><div class='add'>+		FAULT_WRITE_IO                   0x00004000</div><div class='add'>+		FAULT_SLAB_ALLOC                 0x00008000</div><div class='add'>+		FAULT_DQUOT_INIT                 0x00010000</div><div class='add'>+		FAULT_LOCK_OP                    0x00020000</div><div class='add'>+		FAULT_BLKADDR_VALIDITY           0x00040000</div><div class='add'>+		FAULT_BLKADDR_CONSISTENCE        0x00080000</div><div class='add'>+		FAULT_NO_SEGMENT                 0x00100000</div><div class='add'>+		FAULT_INCONSISTENT_FOOTER        0x00200000</div><div class='add'>+		FAULT_TIMEOUT                    0x00400000 (1000ms)</div><div class='add'>+		FAULT_VMALLOC                    0x00800000</div><div class='add'>+		===========================      ==========</div><div class='ctx'> </div><div class='ctx'> What:		/sys/fs/f2fs/&lt;disk&gt;/discard_io_aware_gran</div><div class='ctx'> Date:		January 2023</div><div class='hunk'>@@ -846,3 +848,16 @@ Description:	For several zoned storage devices, vendors will provide extra space</div><div class='ctx'> 		reserved_blocks. However, it is not enough, since this extra space should</div><div class='ctx'> 		not be shown to users. So, with this new sysfs node, we can hide the space</div><div class='ctx'> 		by substracting reserved_blocks from total bytes.</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/encoding_flags</div><div class='add'>+Date:		April 2025</div><div class='add'>+Contact:	"Chao Yu" &lt;chao@kernel.org&gt;</div><div class='add'>+Description:	This is a read-only entry to show the value of sb.s_encoding_flags, the</div><div class='add'>+		value is hexadecimal.</div><div class='add'>+</div><div class='add'>+		============================     ==========</div><div class='add'>+		Flag_Name                        Flag_Value</div><div class='add'>+		============================     ==========</div><div class='add'>+		SB_ENC_STRICT_MODE_FL            0x00000001</div><div class='add'>+		SB_ENC_NO_COMPAT_FALLBACK_FL     0x00000002</div><div class='add'>+		============================     ==========</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-reboot b/Documentation/ABI/testing/sysfs-kernel-reboot<br/>index e117aba46be0..52571fd5ddba 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-kernel-reboot?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/ABI/testing/sysfs-kernel-reboot</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-kernel-reboot?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-kernel-reboot</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> What:		/sys/kernel/reboot</div><div class='ctx'> Date:		November 2020</div><div class='ctx'> KernelVersion:	5.11</div><div class='del'>-Contact:	Matteo Croce &lt;mcroce@microsoft.com&gt;</div><div class='add'>+Contact:	Matteo Croce &lt;teknoraver@meta.com&gt;</div><div class='ctx'> Description:	Interface to set the kernel reboot behavior, similarly to</div><div class='ctx'> 		what can be done via the reboot= cmdline option.</div><div class='ctx'> 		(see Documentation/admin-guide/kernel-parameters.txt)</div><div class='hunk'>@@ -9,25 +9,25 @@ Description:	Interface to set the kernel reboot behavior, similarly to</div><div class='ctx'> What:		/sys/kernel/reboot/mode</div><div class='ctx'> Date:		November 2020</div><div class='ctx'> KernelVersion:	5.11</div><div class='del'>-Contact:	Matteo Croce &lt;mcroce@microsoft.com&gt;</div><div class='add'>+Contact:	Matteo Croce &lt;teknoraver@meta.com&gt;</div><div class='ctx'> Description:	Reboot mode. Valid values are: cold warm hard soft gpio</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/reboot/type</div><div class='ctx'> Date:		November 2020</div><div class='ctx'> KernelVersion:	5.11</div><div class='del'>-Contact:	Matteo Croce &lt;mcroce@microsoft.com&gt;</div><div class='add'>+Contact:	Matteo Croce &lt;teknoraver@meta.com&gt;</div><div class='ctx'> Description:	Reboot type. Valid values are: bios acpi kbd triple efi pci</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/reboot/cpu</div><div class='ctx'> Date:		November 2020</div><div class='ctx'> KernelVersion:	5.11</div><div class='del'>-Contact:	Matteo Croce &lt;mcroce@microsoft.com&gt;</div><div class='add'>+Contact:	Matteo Croce &lt;teknoraver@meta.com&gt;</div><div class='ctx'> Description:	CPU number to use to reboot.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/reboot/force</div><div class='ctx'> Date:		November 2020</div><div class='ctx'> KernelVersion:	5.11</div><div class='del'>-Contact:	Matteo Croce &lt;mcroce@microsoft.com&gt;</div><div class='add'>+Contact:	Matteo Croce &lt;teknoraver@meta.com&gt;</div><div class='ctx'> Description:	Don't wait for any other CPUs on reboot and</div><div class='ctx'> 		avoid anything that could hang.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-alienware-wmi b/Documentation/ABI/testing/sysfs-platform-alienware-wmi<br/>new file mode 100644<br/>index 000000000000..4877b3745f4e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-platform-alienware-wmi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-platform-alienware-wmi</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+What:		/sys/class/hwmon/hwmonX/fanY_boost</div><div class='add'>+Date:		March 2025</div><div class='add'>+KernelVersion:	6.15</div><div class='add'>+Contact:	Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file exposes fan boost control for Dell gaming laptops with</div><div class='add'>+		the AWCC WMI interface.</div><div class='add'>+</div><div class='add'>+		See Documentation/admin-guide/laptops/alienware-wmi.rst for</div><div class='add'>+		details.</div><div class='add'>+</div><div class='add'>+		Integer value in the range 0 to 255</div><div class='add'>+</div><div class='add'>+		RW</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-oxp b/Documentation/ABI/testing/sysfs-platform-oxp<br/>new file mode 100644<br/>index 000000000000..b3f39fc21dfa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/ABI/testing/sysfs-platform-oxp?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/ABI/testing/sysfs-platform-oxp</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+What:		/sys/devices/platform/&lt;platform&gt;/tt_toggle</div><div class='add'>+Date:		Jun 2023</div><div class='add'>+KernelVersion:	6.5</div><div class='add'>+Contact:	"Antheas Kapenekakis" &lt;lkml@antheas.dev&gt;</div><div class='add'>+Description:</div><div class='add'>+		Takeover TDP controls from the device. OneXPlayer devices have a</div><div class='add'>+		turbo button that can be used to switch between two TDP modes</div><div class='add'>+		(usually 15W and 25W). By setting this attribute to 1, this</div><div class='add'>+		functionality is disabled, handing TDP control over to (Windows)</div><div class='add'>+		userspace software and the Turbo button turns into a keyboard</div><div class='add'>+		shortcut over the AT keyboard of the device. In addition,</div><div class='add'>+		using this setting is a prerequisite for PWM control for most</div><div class='add'>+		newer models (otherwise it NOOPs).</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/&lt;platform&gt;/tt_led</div><div class='add'>+Date:		April 2025</div><div class='add'>+KernelVersion:	6.16</div><div class='add'>+Contact:	"Antheas Kapenekakis" &lt;lkml@antheas.dev&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some OneXPlayer devices (e.g., X1 series) feature a little LED</div><div class='add'>+		nested in the Turbo button. This LED is illuminated when the</div><div class='add'>+		device is in the higher TDP mode (e.g., 25W). Once tt_toggle</div><div class='add'>+		is engaged, this LED is left dangling to its last state. This</div><div class='add'>+		attribute allows userspace to control the LED state manually</div><div class='add'>+		(either with 1 or 0). Only a subset of devices contain this LED.</div><div class='head'>diff --git a/Documentation/Makefile b/Documentation/Makefile<br/>index 63094646df28..d30d66ddf1ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/Makefile</a></div><div class='hunk'>@@ -60,9 +60,8 @@ endif #HAVE_LATEXMK</div><div class='ctx'> # Internal variables.</div><div class='ctx'> PAPEROPT_a4     = -D latex_paper_size=a4</div><div class='ctx'> PAPEROPT_letter = -D latex_paper_size=letter</div><div class='del'>-KERNELDOC       = $(srctree)/scripts/kernel-doc</div><div class='del'>-KERNELDOC_CONF  = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC)</div><div class='del'>-ALLSPHINXOPTS   =  $(KERNELDOC_CONF) $(PAPEROPT_$(PAPER)) $(SPHINXOPTS)</div><div class='add'>+ALLSPHINXOPTS   = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC)</div><div class='add'>+ALLSPHINXOPTS   += $(PAPEROPT_$(PAPER)) $(SPHINXOPTS)</div><div class='ctx'> ifneq ($(wildcard $(srctree)/.config),)</div><div class='ctx'> ifeq ($(CONFIG_RUST),y)</div><div class='ctx'> 	# Let Sphinx know we will include rustdoc</div><div class='hunk'>@@ -83,9 +82,11 @@ loop_cmd = $(echo-cmd) $(cmd_$(1)) || exit;</div><div class='ctx'> # $5 reST source folder relative to $(src),</div><div class='ctx'> #    e.g. "userspace-api/media" for the linux-tv book-set at ./Documentation/userspace-api/media</div><div class='ctx'> </div><div class='add'>+PYTHONPYCACHEPREFIX ?= $(abspath $(BUILDDIR)/__pycache__)</div><div class='add'>+</div><div class='ctx'> quiet_cmd_sphinx = SPHINX  $@ --&gt; file://$(abspath $(BUILDDIR)/$3/$4)</div><div class='ctx'>       cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=Documentation/userspace-api/media $2 &amp;&amp; \</div><div class='del'>-	PYTHONDONTWRITEBYTECODE=1 \</div><div class='add'>+	PYTHONPYCACHEPREFIX="$(PYTHONPYCACHEPREFIX)" \</div><div class='ctx'> 	BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(src)/$5/$(SPHINX_CONF)) \</div><div class='ctx'> 	$(PYTHON3) $(srctree)/scripts/jobserver-exec \</div><div class='ctx'> 	$(CONFIG_SHELL) $(srctree)/Documentation/sphinx/parallel-wrapper.sh \</div><div class='head'>diff --git a/Documentation/RCU/listRCU.rst b/Documentation/RCU/listRCU.rst<br/>index ed5c9d8c9afe..d8bb98623c12 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/RCU/listRCU.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/RCU/listRCU.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/RCU/listRCU.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/RCU/listRCU.rst</a></div><div class='hunk'>@@ -334,7 +334,7 @@ If the system-call audit module were to ever need to reject stale data, one way</div><div class='ctx'> to accomplish this would be to add a ``deleted`` flag and a ``lock`` spinlock to the</div><div class='ctx'> ``audit_entry`` structure, and modify audit_filter_task() as follows::</div><div class='ctx'> </div><div class='del'>-	static enum audit_state audit_filter_task(struct task_struct *tsk)</div><div class='add'>+	static struct audit_entry *audit_filter_task(struct task_struct *tsk, char **key)</div><div class='ctx'> 	{</div><div class='ctx'> 		struct audit_entry *e;</div><div class='ctx'> 		enum audit_state   state;</div><div class='hunk'>@@ -346,16 +346,18 @@ to accomplish this would be to add a ``deleted`` flag and a ``lock`` spinlock to</div><div class='ctx'> 				if (e-&gt;deleted) {</div><div class='ctx'> 					spin_unlock(&amp;e-&gt;lock);</div><div class='ctx'> 					rcu_read_unlock();</div><div class='del'>-					return AUDIT_BUILD_CONTEXT;</div><div class='add'>+					return NULL;</div><div class='ctx'> 				}</div><div class='ctx'> 				rcu_read_unlock();</div><div class='ctx'> 				if (state == AUDIT_STATE_RECORD)</div><div class='ctx'> 					*key = kstrdup(e-&gt;rule.filterkey, GFP_ATOMIC);</div><div class='del'>-				return state;</div><div class='add'>+				/* As long as e-&gt;lock is held, e is valid and</div><div class='add'>+				 * its value is not stale */</div><div class='add'>+				return e;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		rcu_read_unlock();</div><div class='del'>-		return AUDIT_BUILD_CONTEXT;</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> The ``audit_del_rule()`` function would need to set the ``deleted`` flag under the</div><div class='head'>diff --git a/Documentation/RCU/whatisRCU.rst b/Documentation/RCU/whatisRCU.rst<br/>index 53faeed7c190..be2eb6be16ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/RCU/whatisRCU.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/RCU/whatisRCU.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/RCU/whatisRCU.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/RCU/whatisRCU.rst</a></div><div class='hunk'>@@ -15,6 +15,9 @@ to start learning about RCU:</div><div class='ctx'> |	2014 Big API Table           https://lwn.net/Articles/609973/</div><div class='ctx'> | 6.	The RCU API, 2019 Edition    https://lwn.net/Articles/777036/</div><div class='ctx'> |	2019 Big API Table           https://lwn.net/Articles/777165/</div><div class='add'>+| 7.	The RCU API, 2024 Edition    https://lwn.net/Articles/988638/</div><div class='add'>+|       2024 Background Information  https://lwn.net/Articles/988641/</div><div class='add'>+|	2024 Big API Table           https://lwn.net/Articles/988666/</div><div class='ctx'> </div><div class='ctx'> For those preferring video:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/LSM/ipe.rst b/Documentation/admin-guide/LSM/ipe.rst<br/>index f93a467db628..dc7088451f9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/LSM/ipe.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/LSM/ipe.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/LSM/ipe.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/LSM/ipe.rst</a></div><div class='hunk'>@@ -423,7 +423,7 @@ Field descriptions:</div><div class='ctx'> </div><div class='ctx'> Event Example::</div><div class='ctx'> </div><div class='del'>-   type=1422 audit(1653425529.927:53): policy_name="boot_verified" policy_version=0.0.0 policy_digest=sha256:820EEA5B40CA42B51F68962354BA083122A20BB846F26765076DD8EED7B8F4DB auid=4294967295 ses=4294967295 lsm=ipe res=1</div><div class='add'>+   type=1422 audit(1653425529.927:53): policy_name="boot_verified" policy_version=0.0.0 policy_digest=sha256:820EEA5B40CA42B51F68962354BA083122A20BB846F26765076DD8EED7B8F4DB auid=4294967295 ses=4294967295 lsm=ipe res=1 errno=0</div><div class='ctx'>    type=1300 audit(1653425529.927:53): arch=c000003e syscall=1 success=yes exit=2567 a0=3 a1=5596fcae1fb0 a2=a07 a3=2 items=0 ppid=184 pid=229 auid=4294967295 uid=0 gid=0 euid=0 suid=0 fsuid=0 egid=0 sgid=0 fsgid=0 tty=pts0 ses=4294967295 comm="python3" exe="/usr/bin/python3.10" key=(null)</div><div class='ctx'>    type=1327 audit(1653425529.927:53): PROCTITLE proctitle=707974686F6E3300746573742F6D61696E2E7079002D66002E2E</div><div class='ctx'> </div><div class='hunk'>@@ -433,24 +433,55 @@ This record will always be emitted in conjunction with a ``AUDITSYSCALL`` record</div><div class='ctx'> </div><div class='ctx'> Field descriptions:</div><div class='ctx'> </div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-| Field          | Value Type | Optional? | Description of Value                              |</div><div class='del'>-+================+============+===========+===================================================+</div><div class='del'>-| policy_name    | string     | No        | The policy_name                                   |</div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-| policy_version | string     | No        | The policy_version                                |</div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-| policy_digest  | string     | No        | The policy hash                                   |</div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-| auid           | integer    | No        | The login user ID                                 |</div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-| ses            | integer    | No        | The login session ID                              |</div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-| lsm            | string     | No        | The lsm name associated with the event            |</div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-| res            | integer    | No        | The result of the audited operation(success/fail) |</div><div class='del'>-+----------------+------------+-----------+---------------------------------------------------+</div><div class='del'>-</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| Field          | Value Type | Optional? | Description of Value                                        |</div><div class='add'>++================+============+===========+=============================================================+</div><div class='add'>+| policy_name    | string     | Yes       | The policy_name                                             |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| policy_version | string     | Yes       | The policy_version                                          |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| policy_digest  | string     | Yes       | The policy hash                                             |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| auid           | integer    | No        | The login user ID                                           |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| ses            | integer    | No        | The login session ID                                        |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| lsm            | string     | No        | The lsm name associated with the event                      |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| res            | integer    | No        | The result of the audited operation(success/fail)           |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+| errno          | integer    | No        | Error code from policy loading operations (see table below) |</div><div class='add'>++----------------+------------+-----------+-------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+Policy error codes (errno):</div><div class='add'>+</div><div class='add'>+The following table lists the error codes that may appear in the errno field while loading or updating the policy:</div><div class='add'>+</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| Error Code     | Description                                            |</div><div class='add'>++================+========================================================+</div><div class='add'>+| 0              | Success                                                |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -EPERM         | Insufficient permission                                |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -EEXIST        | Same name policy already deployed                      |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -EBADMSG       | Policy is invalid                                      |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -ENOMEM        | Out of memory (OOM)                                    |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -ERANGE        | Policy version number overflow                         |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -EINVAL        | Policy version parsing error                           |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -ENOKEY        | Key used to sign the IPE policy not found in keyring   |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -EKEYREJECTED  | Policy signature verification failed                   |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -ESTALE        | Attempting to update an IPE policy with older version  |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='add'>+| -ENOENT        | Policy was deleted while updating                      |</div><div class='add'>++----------------+--------------------------------------------------------+</div><div class='ctx'> </div><div class='ctx'> 1404 AUDIT_MAC_STATUS</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^^^</div><div class='head'>diff --git a/Documentation/admin-guide/blockdev/index.rst b/Documentation/admin-guide/blockdev/index.rst<br/>index 957ccf617797..3262397ebe8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/blockdev/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/blockdev/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/blockdev/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/blockdev/index.rst</a></div><div class='hunk'>@@ -11,6 +11,7 @@ Block Devices</div><div class='ctx'>    nbd</div><div class='ctx'>    paride</div><div class='ctx'>    ramdisk</div><div class='add'>+   zoned_loop</div><div class='ctx'>    zram</div><div class='ctx'> </div><div class='ctx'>    drbd/index</div><div class='head'>diff --git a/Documentation/admin-guide/blockdev/zoned_loop.rst b/Documentation/admin-guide/blockdev/zoned_loop.rst<br/>new file mode 100644<br/>index 000000000000..9c7aa3b482f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/blockdev/zoned_loop.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/blockdev/zoned_loop.rst</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=======================</div><div class='add'>+Zoned Loop Block Device</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+.. Contents:</div><div class='add'>+</div><div class='add'>+	1) Overview</div><div class='add'>+	2) Creating a Zoned Device</div><div class='add'>+	3) Deleting a Zoned Device</div><div class='add'>+	4) Example</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+1) Overview</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The zoned loop block device driver (zloop) allows a user to create a zoned block</div><div class='add'>+device using one regular file per zone as backing storage. This driver does not</div><div class='add'>+directly control any hardware and uses read, write and truncate operations to</div><div class='add'>+regular files of a file system to emulate a zoned block device.</div><div class='add'>+</div><div class='add'>+Using zloop, zoned block devices with a configurable capacity, zone size and</div><div class='add'>+number of conventional zones can be created. The storage for each zone of the</div><div class='add'>+device is implemented using a regular file with a maximum size equal to the zone</div><div class='add'>+size. The size of a file backing a conventional zone is always equal to the zone</div><div class='add'>+size. The size of a file backing a sequential zone indicates the amount of data</div><div class='add'>+sequentially written to the file, that is, the size of the file directly</div><div class='add'>+indicates the position of the write pointer of the zone.</div><div class='add'>+</div><div class='add'>+When resetting a sequential zone, its backing file size is truncated to zero.</div><div class='add'>+Conversely, for a zone finish operation, the backing file is truncated to the</div><div class='add'>+zone size. With this, the maximum capacity of a zloop zoned block device created</div><div class='add'>+can be larger configured to be larger than the storage space available on the</div><div class='add'>+backing file system. Of course, for such configuration, writing more data than</div><div class='add'>+the storage space available on the backing file system will result in write</div><div class='add'>+errors.</div><div class='add'>+</div><div class='add'>+The zoned loop block device driver implements a complete zone transition state</div><div class='add'>+machine. That is, zones can be empty, implicitly opened, explicitly opened,</div><div class='add'>+closed or full. The current implementation does not support any limits on the</div><div class='add'>+maximum number of open and active zones.</div><div class='add'>+</div><div class='add'>+No user tools are necessary to create and delete zloop devices.</div><div class='add'>+</div><div class='add'>+2) Creating a Zoned Device</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Once the zloop module is loaded (or if zloop is compiled in the kernel), the</div><div class='add'>+character device file /dev/zloop-control can be used to add a zloop device.</div><div class='add'>+This is done by writing an "add" command directly to the /dev/zloop-control</div><div class='add'>+device::</div><div class='add'>+</div><div class='add'>+	$ modprobe zloop</div><div class='add'>+        $ ls -l /dev/zloop*</div><div class='add'>+        crw-------. 1 root root 10, 123 Jan  6 19:18 /dev/zloop-control</div><div class='add'>+</div><div class='add'>+        $ mkdir -p &lt;base directory/&lt;device ID&gt;</div><div class='add'>+        $ echo "add [options]" &gt; /dev/zloop-control</div><div class='add'>+</div><div class='add'>+The options available for the add command can be listed by reading the</div><div class='add'>+/dev/zloop-control device::</div><div class='add'>+</div><div class='add'>+	$ cat /dev/zloop-control</div><div class='add'>+        add id=%d,capacity_mb=%u,zone_size_mb=%u,zone_capacity_mb=%u,conv_zones=%u,base_dir=%s,nr_queues=%u,queue_depth=%u,buffered_io</div><div class='add'>+        remove id=%d</div><div class='add'>+</div><div class='add'>+In more details, the options that can be used with the "add" command are as</div><div class='add'>+follows.</div><div class='add'>+</div><div class='add'>+================   ===========================================================</div><div class='add'>+id                 Device number (the X in /dev/zloopX).</div><div class='add'>+                   Default: automatically assigned.</div><div class='add'>+capacity_mb        Device total capacity in MiB. This is always rounded up to</div><div class='add'>+                   the nearest higher multiple of the zone size.</div><div class='add'>+                   Default: 16384 MiB (16 GiB).</div><div class='add'>+zone_size_mb       Device zone size in MiB. Default: 256 MiB.</div><div class='add'>+zone_capacity_mb   Device zone capacity (must always be equal to or lower than</div><div class='add'>+                   the zone size. Default: zone size.</div><div class='add'>+conv_zones         Total number of conventioanl zones starting from sector 0.</div><div class='add'>+                   Default: 8.</div><div class='add'>+base_dir           Path to the base directoy where to create the directory</div><div class='add'>+                   containing the zone files of the device.</div><div class='add'>+                   Default=/var/local/zloop.</div><div class='add'>+                   The device directory containing the zone files is always</div><div class='add'>+                   named with the device ID. E.g. the default zone file</div><div class='add'>+                   directory for /dev/zloop0 is /var/local/zloop/0.</div><div class='add'>+nr_queues          Number of I/O queues of the zoned block device. This value is</div><div class='add'>+                   always capped by the number of online CPUs</div><div class='add'>+                   Default: 1</div><div class='add'>+queue_depth        Maximum I/O queue depth per I/O queue.</div><div class='add'>+                   Default: 64</div><div class='add'>+buffered_io        Do buffered IOs instead of direct IOs (default: false)</div><div class='add'>+================   ===========================================================</div><div class='add'>+</div><div class='add'>+3) Deleting a Zoned Device</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Deleting an unused zoned loop block device is done by issuing the "remove"</div><div class='add'>+command to /dev/zloop-control, specifying the ID of the device to remove::</div><div class='add'>+</div><div class='add'>+        $ echo "remove id=X" &gt; /dev/zloop-control</div><div class='add'>+</div><div class='add'>+The remove command does not have any option.</div><div class='add'>+</div><div class='add'>+A zoned device that was removed can be re-added again without any change to the</div><div class='add'>+state of the device zones: the device zones are restored to their last state</div><div class='add'>+before the device was removed. Adding again a zoned device after it was removed</div><div class='add'>+must always be done using the same configuration as when the device was first</div><div class='add'>+added. If a zone configuration change is detected, an error will be returned and</div><div class='add'>+the zoned device will not be created.</div><div class='add'>+</div><div class='add'>+To fully delete a zoned device, after executing the remove operation, the device</div><div class='add'>+base directory containing the backing files of the device zones must be deleted.</div><div class='add'>+</div><div class='add'>+4) Example</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The following sequence of commands creates a 2GB zoned device with zones of 64</div><div class='add'>+MB and a zone capacity of 63 MB::</div><div class='add'>+</div><div class='add'>+        $ modprobe zloop</div><div class='add'>+        $ mkdir -p /var/local/zloop/0</div><div class='add'>+        $ echo "add capacity_mb=2048,zone_size_mb=64,zone_capacity=63MB" &gt; /dev/zloop-control</div><div class='add'>+</div><div class='add'>+For the device created (/dev/zloop0), the zone backing files are all created</div><div class='add'>+under the default base directory (/var/local/zloop)::</div><div class='add'>+</div><div class='add'>+        $ ls -l /var/local/zloop/0</div><div class='add'>+        total 0</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000000</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000001</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000002</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000003</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000004</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000005</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000006</div><div class='add'>+        -rw-------. 1 root root 67108864 Jan  6 22:23 cnv-000007</div><div class='add'>+        -rw-------. 1 root root        0 Jan  6 22:23 seq-000008</div><div class='add'>+        -rw-------. 1 root root        0 Jan  6 22:23 seq-000009</div><div class='add'>+        ...</div><div class='add'>+</div><div class='add'>+The zoned device created (/dev/zloop0) can then be used normally::</div><div class='add'>+</div><div class='add'>+        $ lsblk -z</div><div class='add'>+        NAME   ZONED        ZONE-SZ ZONE-NR ZONE-AMAX ZONE-OMAX ZONE-APP ZONE-WGRAN</div><div class='add'>+        zloop0 host-managed     64M      32         0         0       1M         4K</div><div class='add'>+        $ blkzone report /dev/zloop0</div><div class='add'>+          start: 0x000000000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x000020000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x000040000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x000060000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x000080000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x0000a0000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x0000c0000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x0000e0000, len 0x020000, cap 0x020000, wptr 0x000000 reset:0 non-seq:0, zcond: 0(nw) [type: 1(CONVENTIONAL)]</div><div class='add'>+          start: 0x000100000, len 0x020000, cap 0x01f800, wptr 0x000000 reset:0 non-seq:0, zcond: 1(em) [type: 2(SEQ_WRITE_REQUIRED)]</div><div class='add'>+          start: 0x000120000, len 0x020000, cap 0x01f800, wptr 0x000000 reset:0 non-seq:0, zcond: 1(em) [type: 2(SEQ_WRITE_REQUIRED)]</div><div class='add'>+          ...</div><div class='add'>+</div><div class='add'>+Deleting this device is done using the command::</div><div class='add'>+</div><div class='add'>+        $ echo "remove id=0" &gt; /dev/zloop-control</div><div class='add'>+</div><div class='add'>+The removed device can be re-added again using the same "add" command as when</div><div class='add'>+the device was first created. To fully delete a zoned device, its backing files</div><div class='add'>+should also be deleted after executing the remove command::</div><div class='add'>+</div><div class='add'>+        $ rm -r /var/local/zloop/0</div><div class='head'>diff --git a/Documentation/admin-guide/bug-hunting.rst b/Documentation/admin-guide/bug-hunting.rst<br/>index ce6f4e8ca487..30858757c9f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/bug-hunting.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/bug-hunting.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/bug-hunting.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/bug-hunting.rst</a></div><div class='hunk'>@@ -196,7 +196,7 @@ will see the assembler code for the routine shown, but if your kernel has</div><div class='ctx'> debug symbols the C code will also be available. (Debug symbols can be enabled</div><div class='ctx'> in the kernel hacking menu of the menu configuration.) For example::</div><div class='ctx'> </div><div class='del'>-    $ objdump -r -S -l --disassemble net/dccp/ipv4.o</div><div class='add'>+    $ objdump -r -S -l --disassemble net/ipv4/tcp.o</div><div class='ctx'> </div><div class='ctx'> .. note::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst<br/>index 1a16ce68a4d7..1edc26622594 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/cgroup-v2.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/cgroup-v2.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/cgroup-v2.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/cgroup-v2.rst</a></div><div class='hunk'>@@ -1076,7 +1076,7 @@ cpufreq governor about the minimum desired frequency which should always be</div><div class='ctx'> provided by a CPU, as well as the maximum desired frequency, which should not</div><div class='ctx'> be exceeded by a CPU.</div><div class='ctx'> </div><div class='del'>-WARNING: cgroup2 cpu controller doesn't yet fully support the control of</div><div class='add'>+WARNING: cgroup2 cpu controller doesn't yet support the (bandwidth) control of</div><div class='ctx'> realtime processes. For a kernel built with the CONFIG_RT_GROUP_SCHED option</div><div class='ctx'> enabled for group scheduling of realtime processes, the cpu controller can only</div><div class='ctx'> be enabled when all RT processes are in the root cgroup. Be aware that system</div><div class='hunk'>@@ -1095,19 +1095,34 @@ realtime processes irrespective of CONFIG_RT_GROUP_SCHED.</div><div class='ctx'> CPU Interface Files</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-All time durations are in microseconds.</div><div class='add'>+The interaction of a process with the cpu controller depends on its scheduling</div><div class='add'>+policy and the underlying scheduler. From the point of view of the cpu controller,</div><div class='add'>+processes can be categorized as follows:</div><div class='add'>+</div><div class='add'>+* Processes under the fair-class scheduler</div><div class='add'>+* Processes under a BPF scheduler with the ``cgroup_set_weight`` callback</div><div class='add'>+* Everything else: ``SCHED_{FIFO,RR,DEADLINE}`` and processes under a BPF scheduler</div><div class='add'>+  without the ``cgroup_set_weight`` callback</div><div class='add'>+</div><div class='add'>+For details on when a process is under the fair-class scheduler or a BPF scheduler,</div><div class='add'>+check out :ref:`Documentation/scheduler/sched-ext.rst &lt;sched-ext&gt;`.</div><div class='add'>+</div><div class='add'>+For each of the following interface files, the above categories</div><div class='add'>+will be referred to. All time durations are in microseconds.</div><div class='ctx'> </div><div class='ctx'>   cpu.stat</div><div class='ctx'> 	A read-only flat-keyed file.</div><div class='ctx'> 	This file exists whether the controller is enabled or not.</div><div class='ctx'> </div><div class='del'>-	It always reports the following three stats:</div><div class='add'>+	It always reports the following three stats, which account for all the</div><div class='add'>+	processes in the cgroup:</div><div class='ctx'> </div><div class='ctx'> 	- usage_usec</div><div class='ctx'> 	- user_usec</div><div class='ctx'> 	- system_usec</div><div class='ctx'> </div><div class='del'>-	and the following five when the controller is enabled:</div><div class='add'>+	and the following five when the controller is enabled, which account for</div><div class='add'>+	only the processes under the fair-class scheduler:</div><div class='ctx'> </div><div class='ctx'> 	- nr_periods</div><div class='ctx'> 	- nr_throttled</div><div class='hunk'>@@ -1125,6 +1140,10 @@ All time durations are in microseconds.</div><div class='ctx'> 	If the cgroup has been configured to be SCHED_IDLE (cpu.idle = 1),</div><div class='ctx'> 	then the weight will show as a 0.</div><div class='ctx'> </div><div class='add'>+	This file affects only processes under the fair-class scheduler and a BPF</div><div class='add'>+	scheduler with the ``cgroup_set_weight`` callback depending on what the</div><div class='add'>+	callback actually does.</div><div class='add'>+</div><div class='ctx'>   cpu.weight.nice</div><div class='ctx'> 	A read-write single value file which exists on non-root</div><div class='ctx'> 	cgroups.  The default is "0".</div><div class='hunk'>@@ -1137,6 +1156,10 @@ All time durations are in microseconds.</div><div class='ctx'> 	granularity is coarser for the nice values, the read value is</div><div class='ctx'> 	the closest approximation of the current weight.</div><div class='ctx'> </div><div class='add'>+	This file affects only processes under the fair-class scheduler and a BPF</div><div class='add'>+	scheduler with the ``cgroup_set_weight`` callback depending on what the</div><div class='add'>+	callback actually does.</div><div class='add'>+</div><div class='ctx'>   cpu.max</div><div class='ctx'> 	A read-write two value file which exists on non-root cgroups.</div><div class='ctx'> 	The default is "max 100000".</div><div class='hunk'>@@ -1149,43 +1172,55 @@ All time durations are in microseconds.</div><div class='ctx'> 	$PERIOD duration.  "max" for $MAX indicates no limit.  If only</div><div class='ctx'> 	one number is written, $MAX is updated.</div><div class='ctx'> </div><div class='add'>+	This file affects only processes under the fair-class scheduler.</div><div class='add'>+</div><div class='ctx'>   cpu.max.burst</div><div class='ctx'> 	A read-write single value file which exists on non-root</div><div class='ctx'> 	cgroups.  The default is "0".</div><div class='ctx'> </div><div class='ctx'> 	The burst in the range [0, $MAX].</div><div class='ctx'> </div><div class='add'>+	This file affects only processes under the fair-class scheduler.</div><div class='add'>+</div><div class='ctx'>   cpu.pressure</div><div class='ctx'> 	A read-write nested-keyed file.</div><div class='ctx'> </div><div class='ctx'> 	Shows pressure stall information for CPU. See</div><div class='ctx'> 	:ref:`Documentation/accounting/psi.rst &lt;psi&gt;` for details.</div><div class='ctx'> </div><div class='add'>+	This file accounts for all the processes in the cgroup.</div><div class='add'>+</div><div class='ctx'>   cpu.uclamp.min</div><div class='del'>-        A read-write single value file which exists on non-root cgroups.</div><div class='del'>-        The default is "0", i.e. no utilization boosting.</div><div class='add'>+	A read-write single value file which exists on non-root cgroups.</div><div class='add'>+	The default is "0", i.e. no utilization boosting.</div><div class='add'>+</div><div class='add'>+	The requested minimum utilization (protection) as a percentage</div><div class='add'>+	rational number, e.g. 12.34 for 12.34%.</div><div class='ctx'> </div><div class='del'>-        The requested minimum utilization (protection) as a percentage</div><div class='del'>-        rational number, e.g. 12.34 for 12.34%.</div><div class='add'>+	This interface allows reading and setting minimum utilization clamp</div><div class='add'>+	values similar to the sched_setattr(2). This minimum utilization</div><div class='add'>+	value is used to clamp the task specific minimum utilization clamp,</div><div class='add'>+	including those of realtime processes.</div><div class='ctx'> </div><div class='del'>-        This interface allows reading and setting minimum utilization clamp</div><div class='del'>-        values similar to the sched_setattr(2). This minimum utilization</div><div class='del'>-        value is used to clamp the task specific minimum utilization clamp.</div><div class='add'>+	The requested minimum utilization (protection) is always capped by</div><div class='add'>+	the current value for the maximum utilization (limit), i.e.</div><div class='add'>+	`cpu.uclamp.max`.</div><div class='ctx'> </div><div class='del'>-        The requested minimum utilization (protection) is always capped by</div><div class='del'>-        the current value for the maximum utilization (limit), i.e.</div><div class='del'>-        `cpu.uclamp.max`.</div><div class='add'>+	This file affects all the processes in the cgroup.</div><div class='ctx'> </div><div class='ctx'>   cpu.uclamp.max</div><div class='del'>-        A read-write single value file which exists on non-root cgroups.</div><div class='del'>-        The default is "max". i.e. no utilization capping</div><div class='add'>+	A read-write single value file which exists on non-root cgroups.</div><div class='add'>+	The default is "max". i.e. no utilization capping</div><div class='add'>+</div><div class='add'>+	The requested maximum utilization (limit) as a percentage rational</div><div class='add'>+	number, e.g. 98.76 for 98.76%.</div><div class='ctx'> </div><div class='del'>-        The requested maximum utilization (limit) as a percentage rational</div><div class='del'>-        number, e.g. 98.76 for 98.76%.</div><div class='add'>+	This interface allows reading and setting maximum utilization clamp</div><div class='add'>+	values similar to the sched_setattr(2). This maximum utilization</div><div class='add'>+	value is used to clamp the task specific maximum utilization clamp,</div><div class='add'>+	including those of realtime processes.</div><div class='ctx'> </div><div class='del'>-        This interface allows reading and setting maximum utilization clamp</div><div class='del'>-        values similar to the sched_setattr(2). This maximum utilization</div><div class='del'>-        value is used to clamp the task specific maximum utilization clamp.</div><div class='add'>+	This file affects all the processes in the cgroup.</div><div class='ctx'> </div><div class='ctx'>   cpu.idle</div><div class='ctx'> 	A read-write single value file which exists on non-root cgroups.</div><div class='hunk'>@@ -1197,7 +1232,7 @@ All time durations are in microseconds.</div><div class='ctx'> 	own relative priorities, but the cgroup itself will be treated as</div><div class='ctx'> 	very low priority relative to its peers.</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+	This file affects only processes under the fair-class scheduler.</div><div class='ctx'> </div><div class='ctx'> Memory</div><div class='ctx'> ------</div><div class='hunk'>@@ -3019,7 +3054,7 @@ Filesystem Support for Writeback</div><div class='ctx'> --------------------------------</div><div class='ctx'> </div><div class='ctx'> A filesystem can support cgroup writeback by updating</div><div class='del'>-address_space_operations-&gt;writepage[s]() to annotate bio's using the</div><div class='add'>+address_space_operations-&gt;writepages() to annotate bio's using the</div><div class='ctx'> following two functions.</div><div class='ctx'> </div><div class='ctx'>   wbc_init_bio(@wbc, @bio)</div><div class='head'>diff --git a/Documentation/admin-guide/gpio/gpio-aggregator.rst b/Documentation/admin-guide/gpio/gpio-aggregator.rst<br/>index 5cd1e7221756..8374a9df9105 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/gpio/gpio-aggregator.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/gpio/gpio-aggregator.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/gpio/gpio-aggregator.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/gpio/gpio-aggregator.rst</a></div><div class='hunk'>@@ -69,6 +69,113 @@ write-only attribute files in sysfs.</div><div class='ctx'> 		    $ echo gpio-aggregator.0 &gt; delete_device</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Aggregating GPIOs using Configfs</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+**Group:** ``/config/gpio-aggregator``</div><div class='add'>+</div><div class='add'>+    This is the root directory of the gpio-aggregator configfs tree.</div><div class='add'>+</div><div class='add'>+**Group:** ``/config/gpio-aggregator/&lt;example-name&gt;``</div><div class='add'>+</div><div class='add'>+    This directory represents a GPIO aggregator device. You can assign any</div><div class='add'>+    name to ``&lt;example-name&gt;`` (e.g. ``agg0``), except names starting with</div><div class='add'>+    ``_sysfs`` prefix, which are reserved for auto-generated configfs</div><div class='add'>+    entries corresponding to devices created via Sysfs.</div><div class='add'>+</div><div class='add'>+**Attribute:** ``/config/gpio-aggregator/&lt;example-name&gt;/live``</div><div class='add'>+</div><div class='add'>+    The ``live`` attribute allows to trigger the actual creation of the device</div><div class='add'>+    once it's fully configured. Accepted values are:</div><div class='add'>+</div><div class='add'>+    * ``1``, ``yes``, ``true`` : enable the virtual device</div><div class='add'>+    * ``0``, ``no``, ``false`` : disable the virtual device</div><div class='add'>+</div><div class='add'>+**Attribute:** ``/config/gpio-aggregator/&lt;example-name&gt;/dev_name``</div><div class='add'>+</div><div class='add'>+    The read-only ``dev_name`` attribute exposes the name of the device as it</div><div class='add'>+    will appear in the system on the platform bus (e.g. ``gpio-aggregator.0``).</div><div class='add'>+    This is useful for identifying a character device for the newly created</div><div class='add'>+    aggregator. If it's ``gpio-aggregator.0``,</div><div class='add'>+    ``/sys/devices/platform/gpio-aggregator.0/gpiochipX`` path tells you that the</div><div class='add'>+    GPIO device id is ``X``.</div><div class='add'>+</div><div class='add'>+You must create subdirectories for each virtual line you want to</div><div class='add'>+instantiate, named exactly as ``line0``, ``line1``, ..., ``lineY``, when</div><div class='add'>+you want to instantiate ``Y+1`` (Y &gt;= 0) lines.  Configure all lines before</div><div class='add'>+activating the device by setting ``live`` to 1.</div><div class='add'>+</div><div class='add'>+**Group:** ``/config/gpio-aggregator/&lt;example-name&gt;/&lt;lineY&gt;/``</div><div class='add'>+</div><div class='add'>+    This directory represents a GPIO line to include in the aggregator.</div><div class='add'>+</div><div class='add'>+**Attribute:** ``/config/gpio-aggregator/&lt;example-name&gt;/&lt;lineY&gt;/key``</div><div class='add'>+</div><div class='add'>+**Attribute:** ``/config/gpio-aggregator/&lt;example-name&gt;/&lt;lineY&gt;/offset``</div><div class='add'>+</div><div class='add'>+    The default values after creating the ``&lt;lineY&gt;`` directory are:</div><div class='add'>+</div><div class='add'>+    * ``key`` : &lt;empty&gt;</div><div class='add'>+    * ``offset`` : -1</div><div class='add'>+</div><div class='add'>+    ``key`` must always be explicitly configured, while ``offset`` depends.</div><div class='add'>+    Two configuration patterns exist for each ``&lt;lineY&gt;``:</div><div class='add'>+</div><div class='add'>+    (a). For lookup by GPIO line name:</div><div class='add'>+</div><div class='add'>+         * Set ``key`` to the line name.</div><div class='add'>+         * Ensure ``offset`` remains -1 (the default).</div><div class='add'>+</div><div class='add'>+    (b). For lookup by GPIO chip name and the line offset within the chip:</div><div class='add'>+</div><div class='add'>+         * Set ``key`` to the chip name.</div><div class='add'>+         * Set ``offset`` to the line offset (0 &lt;= ``offset`` &lt; 65535).</div><div class='add'>+</div><div class='add'>+**Attribute:** ``/config/gpio-aggregator/&lt;example-name&gt;/&lt;lineY&gt;/name``</div><div class='add'>+</div><div class='add'>+    The ``name`` attribute sets a custom name for lineY. If left unset, the</div><div class='add'>+    line will remain unnamed.</div><div class='add'>+</div><div class='add'>+Once the configuration is done, the ``'live'`` attribute must be set to 1</div><div class='add'>+in order to instantiate the aggregator device. It can be set back to 0 to</div><div class='add'>+destroy the virtual device. The module will synchronously wait for the new</div><div class='add'>+aggregator device to be successfully probed and if this doesn't happen, writing</div><div class='add'>+to ``'live'`` will result in an error. This is a different behaviour from the</div><div class='add'>+case when you create it using sysfs ``new_device`` interface.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+</div><div class='add'>+   For aggregators created via Sysfs, the configfs entries are</div><div class='add'>+   auto-generated and appear as ``/config/gpio-aggregator/_sysfs.&lt;N&gt;/``. You</div><div class='add'>+   cannot add or remove line directories with mkdir(2)/rmdir(2). To modify</div><div class='add'>+   lines, you must use the "delete_device" interface to tear down the</div><div class='add'>+   existing device and reconfigure it from scratch. However, you can still</div><div class='add'>+   toggle the aggregator with the ``live`` attribute and adjust the</div><div class='add'>+   ``key``, ``offset``, and ``name`` attributes for each line when ``live``</div><div class='add'>+   is set to 0 by hand (i.e. it's not waiting for deferred probe).</div><div class='add'>+</div><div class='add'>+Sample configuration commands</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: sh</div><div class='add'>+</div><div class='add'>+    # Create a directory for an aggregator device</div><div class='add'>+    $ mkdir /sys/kernel/config/gpio-aggregator/agg0</div><div class='add'>+</div><div class='add'>+    # Configure each line</div><div class='add'>+    $ mkdir /sys/kernel/config/gpio-aggregator/agg0/line0</div><div class='add'>+    $ echo gpiochip0 &gt; /sys/kernel/config/gpio-aggregator/agg0/line0/key</div><div class='add'>+    $ echo 6         &gt; /sys/kernel/config/gpio-aggregator/agg0/line0/offset</div><div class='add'>+    $ echo test0     &gt; /sys/kernel/config/gpio-aggregator/agg0/line0/name</div><div class='add'>+    $ mkdir /sys/kernel/config/gpio-aggregator/agg0/line1</div><div class='add'>+    $ echo gpiochip0 &gt; /sys/kernel/config/gpio-aggregator/agg0/line1/key</div><div class='add'>+    $ echo 7         &gt; /sys/kernel/config/gpio-aggregator/agg0/line1/offset</div><div class='add'>+    $ echo test1     &gt; /sys/kernel/config/gpio-aggregator/agg0/line1/name</div><div class='add'>+</div><div class='add'>+    # Activate the aggregator device</div><div class='add'>+    $ echo 1         &gt; /sys/kernel/config/gpio-aggregator/agg0/live</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Generic GPIO Driver</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/index.rst b/Documentation/admin-guide/hw-vuln/index.rst<br/>index ff0b440ef2dc..09890a8f3ee9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/hw-vuln/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/hw-vuln/index.rst</a></div><div class='hunk'>@@ -22,3 +22,6 @@ are configurable at compile, boot or run time.</div><div class='ctx'>    srso</div><div class='ctx'>    gather_data_sampling</div><div class='ctx'>    reg-file-data-sampling</div><div class='add'>+   rsb</div><div class='add'>+   old_microcode</div><div class='add'>+   indirect-target-selection</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/indirect-target-selection.rst b/Documentation/admin-guide/hw-vuln/indirect-target-selection.rst<br/>new file mode 100644<br/>index 000000000000..d9ca64108d23<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/indirect-target-selection.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/hw-vuln/indirect-target-selection.rst</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Indirect Target Selection (ITS)</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+ITS is a vulnerability in some Intel CPUs that support Enhanced IBRS and were</div><div class='add'>+released before Alder Lake. ITS may allow an attacker to control the prediction</div><div class='add'>+of indirect branches and RETs located in the lower half of a cacheline.</div><div class='add'>+</div><div class='add'>+ITS is assigned CVE-2024-28956 with a CVSS score of 4.7 (Medium).</div><div class='add'>+</div><div class='add'>+Scope of Impact</div><div class='add'>+---------------</div><div class='add'>+- **eIBRS Guest/Host Isolation**: Indirect branches in KVM/kernel may still be</div><div class='add'>+  predicted with unintended target corresponding to a branch in the guest.</div><div class='add'>+</div><div class='add'>+- **Intra-Mode BTI**: In-kernel training such as through cBPF or other native</div><div class='add'>+  gadgets.</div><div class='add'>+</div><div class='add'>+- **Indirect Branch Prediction Barrier (IBPB)**: After an IBPB, indirect</div><div class='add'>+  branches may still be predicted with targets corresponding to direct branches</div><div class='add'>+  executed prior to the IBPB. This is fixed by the IPU 2025.1 microcode, which</div><div class='add'>+  should be available via distro updates. Alternatively microcode can be</div><div class='add'>+  obtained from Intel's github repository [#f1]_.</div><div class='add'>+</div><div class='add'>+Affected CPUs</div><div class='add'>+-------------</div><div class='add'>+Below is the list of ITS affected CPUs [#f2]_ [#f3]_:</div><div class='add'>+</div><div class='add'>+   ========================  ============  ====================  ===============</div><div class='add'>+   Common name               Family_Model  eIBRS                 Intra-mode BTI</div><div class='add'>+                                           Guest/Host Isolation</div><div class='add'>+   ========================  ============  ====================  ===============</div><div class='add'>+   SKYLAKE_X (step &gt;= 6)     06_55H        Affected              Affected</div><div class='add'>+   ICELAKE_X                 06_6AH        Not affected          Affected</div><div class='add'>+   ICELAKE_D                 06_6CH        Not affected          Affected</div><div class='add'>+   ICELAKE_L                 06_7EH        Not affected          Affected</div><div class='add'>+   TIGERLAKE_L               06_8CH        Not affected          Affected</div><div class='add'>+   TIGERLAKE                 06_8DH        Not affected          Affected</div><div class='add'>+   KABYLAKE_L (step &gt;= 12)   06_8EH        Affected              Affected</div><div class='add'>+   KABYLAKE (step &gt;= 13)     06_9EH        Affected              Affected</div><div class='add'>+   COMETLAKE                 06_A5H        Affected              Affected</div><div class='add'>+   COMETLAKE_L               06_A6H        Affected              Affected</div><div class='add'>+   ROCKETLAKE                06_A7H        Not affected          Affected</div><div class='add'>+   ========================  ============  ====================  ===============</div><div class='add'>+</div><div class='add'>+- All affected CPUs enumerate Enhanced IBRS feature.</div><div class='add'>+- IBPB isolation is affected on all ITS affected CPUs, and need a microcode</div><div class='add'>+  update for mitigation.</div><div class='add'>+- None of the affected CPUs enumerate BHI_CTRL which was introduced in Golden</div><div class='add'>+  Cove (Alder Lake and Sapphire Rapids). This can help guests to determine the</div><div class='add'>+  host's affected status.</div><div class='add'>+- Intel Atom CPUs are not affected by ITS.</div><div class='add'>+</div><div class='add'>+Mitigation</div><div class='add'>+----------</div><div class='add'>+As only the indirect branches and RETs that have their last byte of instruction</div><div class='add'>+in the lower half of the cacheline are vulnerable to ITS, the basic idea behind</div><div class='add'>+the mitigation is to not allow indirect branches in the lower half.</div><div class='add'>+</div><div class='add'>+This is achieved by relying on existing retpoline support in the kernel, and in</div><div class='add'>+compilers. ITS-vulnerable retpoline sites are runtime patched to point to newly</div><div class='add'>+added ITS-safe thunks. These safe thunks consists of indirect branch in the</div><div class='add'>+second half of the cacheline. Not all retpoline sites are patched to thunks, if</div><div class='add'>+a retpoline site is evaluated to be ITS-safe, it is replaced with an inline</div><div class='add'>+indirect branch.</div><div class='add'>+</div><div class='add'>+Dynamic thunks</div><div class='add'>+~~~~~~~~~~~~~~</div><div class='add'>+From a dynamically allocated pool of safe-thunks, each vulnerable site is</div><div class='add'>+replaced with a new thunk, such that they get a unique address. This could</div><div class='add'>+improve the branch prediction accuracy. Also, it is a defense-in-depth measure</div><div class='add'>+against aliasing.</div><div class='add'>+</div><div class='add'>+Note, for simplicity, indirect branches in eBPF programs are always replaced</div><div class='add'>+with a jump to a static thunk in __x86_indirect_its_thunk_array. If required,</div><div class='add'>+in future this can be changed to use dynamic thunks.</div><div class='add'>+</div><div class='add'>+All vulnerable RETs are replaced with a static thunk, they do not use dynamic</div><div class='add'>+thunks. This is because RETs get their prediction from RSB mostly that does not</div><div class='add'>+depend on source address. RETs that underflow RSB may benefit from dynamic</div><div class='add'>+thunks. But, RETs significantly outnumber indirect branches, and any benefit</div><div class='add'>+from a unique source address could be outweighed by the increased icache</div><div class='add'>+footprint and iTLB pressure.</div><div class='add'>+</div><div class='add'>+Retpoline</div><div class='add'>+~~~~~~~~~</div><div class='add'>+Retpoline sequence also mitigates ITS-unsafe indirect branches. For this</div><div class='add'>+reason, when retpoline is enabled, ITS mitigation only relocates the RETs to</div><div class='add'>+safe thunks. Unless user requested the RSB-stuffing mitigation.</div><div class='add'>+</div><div class='add'>+RSB Stuffing</div><div class='add'>+~~~~~~~~~~~~</div><div class='add'>+RSB-stuffing via Call Depth Tracking is a mitigation for Retbleed RSB-underflow</div><div class='add'>+attacks. And it also mitigates RETs that are vulnerable to ITS.</div><div class='add'>+</div><div class='add'>+Mitigation in guests</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+All guests deploy ITS mitigation by default, irrespective of eIBRS enumeration</div><div class='add'>+and Family/Model of the guest. This is because eIBRS feature could be hidden</div><div class='add'>+from a guest. One exception to this is when a guest enumerates BHI_DIS_S, which</div><div class='add'>+indicates that the guest is running on an unaffected host.</div><div class='add'>+</div><div class='add'>+To prevent guests from unnecessarily deploying the mitigation on unaffected</div><div class='add'>+platforms, Intel has defined ITS_NO bit(62) in MSR IA32_ARCH_CAPABILITIES. When</div><div class='add'>+a guest sees this bit set, it should not enumerate the ITS bug. Note, this bit</div><div class='add'>+is not set by any hardware, but is **intended for VMMs to synthesize** it for</div><div class='add'>+guests as per the host's affected status.</div><div class='add'>+</div><div class='add'>+Mitigation options</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+The ITS mitigation can be controlled using the "indirect_target_selection"</div><div class='add'>+kernel parameter. The available options are:</div><div class='add'>+</div><div class='add'>+   ======== ===================================================================</div><div class='add'>+   on       (default)  Deploy the "Aligned branch/return thunks" mitigation.</div><div class='add'>+	    If spectre_v2 mitigation enables retpoline, aligned-thunks are only</div><div class='add'>+	    deployed for the affected RET instructions. Retpoline mitigates</div><div class='add'>+	    indirect branches.</div><div class='add'>+</div><div class='add'>+   off      Disable ITS mitigation.</div><div class='add'>+</div><div class='add'>+   vmexit   Equivalent to "=on" if the CPU is affected by guest/host isolation</div><div class='add'>+	    part of ITS. Otherwise, mitigation is not deployed. This option is</div><div class='add'>+	    useful when host userspace is not in the threat model, and only</div><div class='add'>+	    attacks from guest to host are considered.</div><div class='add'>+</div><div class='add'>+   stuff    Deploy RSB-fill mitigation when retpoline is also deployed.</div><div class='add'>+	    Otherwise, deploy the default mitigation. When retpoline mitigation</div><div class='add'>+	    is enabled, RSB-stuffing via Call-Depth-Tracking also mitigates</div><div class='add'>+	    ITS.</div><div class='add'>+</div><div class='add'>+   force    Force the ITS bug and deploy the default mitigation.</div><div class='add'>+   ======== ===================================================================</div><div class='add'>+</div><div class='add'>+Sysfs reporting</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+The sysfs file showing ITS mitigation status is:</div><div class='add'>+</div><div class='add'>+  /sys/devices/system/cpu/vulnerabilities/indirect_target_selection</div><div class='add'>+</div><div class='add'>+Note, microcode mitigation status is not reported in this file.</div><div class='add'>+</div><div class='add'>+The possible values in this file are:</div><div class='add'>+</div><div class='add'>+.. list-table::</div><div class='add'>+</div><div class='add'>+   * - Not affected</div><div class='add'>+     - The processor is not vulnerable.</div><div class='add'>+   * - Vulnerable</div><div class='add'>+     - System is vulnerable and no mitigation has been applied.</div><div class='add'>+   * - Vulnerable, KVM: Not affected</div><div class='add'>+     - System is vulnerable to intra-mode BTI, but not affected by eIBRS</div><div class='add'>+       guest/host isolation.</div><div class='add'>+   * - Mitigation: Aligned branch/return thunks</div><div class='add'>+     - The mitigation is enabled, affected indirect branches and RETs are</div><div class='add'>+       relocated to safe thunks.</div><div class='add'>+   * - Mitigation: Retpolines, Stuffing RSB</div><div class='add'>+     - The mitigation is enabled using retpoline and RSB stuffing.</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+----------</div><div class='add'>+.. [#f1] Microcode repository - https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files</div><div class='add'>+</div><div class='add'>+.. [#f2] Affected Processors list - https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html</div><div class='add'>+</div><div class='add'>+.. [#f3] Affected Processors list (machine readable) - https://github.com/intel/Intel-affected-processor-list</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/old_microcode.rst b/Documentation/admin-guide/hw-vuln/old_microcode.rst<br/>new file mode 100644<br/>index 000000000000..6ded8f86b8d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/old_microcode.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/hw-vuln/old_microcode.rst</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=============</div><div class='add'>+Old Microcode</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+The kernel keeps a table of released microcode. Systems that had</div><div class='add'>+microcode older than this at boot will say "Vulnerable".  This means</div><div class='add'>+that the system was vulnerable to some known CPU issue. It could be</div><div class='add'>+security or functional, the kernel does not know or care.</div><div class='add'>+</div><div class='add'>+You should update the CPU microcode to mitigate any exposure. This is</div><div class='add'>+usually accomplished by updating the files in</div><div class='add'>+/lib/firmware/intel-ucode/ via normal distribution updates. Intel also</div><div class='add'>+distributes these files in a github repo:</div><div class='add'>+</div><div class='add'>+	https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files.git</div><div class='add'>+</div><div class='add'>+Just like all the other hardware vulnerabilities, exposure is</div><div class='add'>+determined at boot. Runtime microcode updates do not change the status</div><div class='add'>+of this vulnerability.</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/rsb.rst b/Documentation/admin-guide/hw-vuln/rsb.rst<br/>new file mode 100644<br/>index 000000000000..21dbf9cf25f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/hw-vuln/rsb.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/hw-vuln/rsb.rst</a></div><div class='hunk'>@@ -0,0 +1,268 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=======================</div><div class='add'>+RSB-related mitigations</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+.. warning::</div><div class='add'>+   Please keep this document up-to-date, otherwise you will be</div><div class='add'>+   volunteered to update it and convert it to a very long comment in</div><div class='add'>+   bugs.c!</div><div class='add'>+</div><div class='add'>+Since 2018 there have been many Spectre CVEs related to the Return Stack</div><div class='add'>+Buffer (RSB) (sometimes referred to as the Return Address Stack (RAS) or</div><div class='add'>+Return Address Predictor (RAP) on AMD).</div><div class='add'>+</div><div class='add'>+Information about these CVEs and how to mitigate them is scattered</div><div class='add'>+amongst a myriad of microarchitecture-specific documents.</div><div class='add'>+</div><div class='add'>+This document attempts to consolidate all the relevant information in</div><div class='add'>+once place and clarify the reasoning behind the current RSB-related</div><div class='add'>+mitigations.  It's meant to be as concise as possible, focused only on</div><div class='add'>+the current kernel mitigations: what are the RSB-related attack vectors</div><div class='add'>+and how are they currently being mitigated?</div><div class='add'>+</div><div class='add'>+It's *not* meant to describe how the RSB mechanism operates or how the</div><div class='add'>+exploits work.  More details about those can be found in the references</div><div class='add'>+below.</div><div class='add'>+</div><div class='add'>+Rather, this is basically a glorified comment, but too long to actually</div><div class='add'>+be one.  So when the next CVE comes along, a kernel developer can</div><div class='add'>+quickly refer to this as a refresher to see what we're actually doing</div><div class='add'>+and why.</div><div class='add'>+</div><div class='add'>+At a high level, there are two classes of RSB attacks: RSB poisoning</div><div class='add'>+(Intel and AMD) and RSB underflow (Intel only).  They must each be</div><div class='add'>+considered individually for each attack vector (and microarchitecture</div><div class='add'>+where applicable).</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+RSB poisoning (Intel and AMD)</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+SpectreRSB</div><div class='add'>+~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+RSB poisoning is a technique used by SpectreRSB [#spectre-rsb]_ where</div><div class='add'>+an attacker poisons an RSB entry to cause a victim's return instruction</div><div class='add'>+to speculate to an attacker-controlled address.  This can happen when</div><div class='add'>+there are unbalanced CALLs/RETs after a context switch or VMEXIT.</div><div class='add'>+</div><div class='add'>+* All attack vectors can potentially be mitigated by flushing out any</div><div class='add'>+  poisoned RSB entries using an RSB filling sequence</div><div class='add'>+  [#intel-rsb-filling]_ [#amd-rsb-filling]_ when transitioning between</div><div class='add'>+  untrusted and trusted domains.  But this has a performance impact and</div><div class='add'>+  should be avoided whenever possible.</div><div class='add'>+</div><div class='add'>+  .. DANGER::</div><div class='add'>+     **FIXME**: Currently we're flushing 32 entries.  However, some CPU</div><div class='add'>+     models have more than 32 entries.  The loop count needs to be</div><div class='add'>+     increased for those.  More detailed information is needed about RSB</div><div class='add'>+     sizes.</div><div class='add'>+</div><div class='add'>+* On context switch, the user-&gt;user mitigation requires ensuring the</div><div class='add'>+  RSB gets filled or cleared whenever IBPB gets written [#cond-ibpb]_</div><div class='add'>+  during a context switch:</div><div class='add'>+</div><div class='add'>+  * AMD:</div><div class='add'>+	On Zen 4+, IBPB (or SBPB [#amd-sbpb]_ if used) clears the RSB.</div><div class='add'>+	This is indicated by IBPB_RET in CPUID [#amd-ibpb-rsb]_.</div><div class='add'>+</div><div class='add'>+	On Zen &lt; 4, the RSB filling sequence [#amd-rsb-filling]_ must be</div><div class='add'>+	always be done in addition to IBPB [#amd-ibpb-no-rsb]_.  This is</div><div class='add'>+	indicated by X86_BUG_IBPB_NO_RET.</div><div class='add'>+</div><div class='add'>+  * Intel:</div><div class='add'>+	IBPB always clears the RSB:</div><div class='add'>+</div><div class='add'>+	"Software that executed before the IBPB command cannot control</div><div class='add'>+	the predicted targets of indirect branches executed after the</div><div class='add'>+	command on the same logical processor. The term indirect branch</div><div class='add'>+	in this context includes near return instructions, so these</div><div class='add'>+	predicted targets may come from the RSB." [#intel-ibpb-rsb]_</div><div class='add'>+</div><div class='add'>+* On context switch, user-&gt;kernel attacks are prevented by SMEP.  User</div><div class='add'>+  space can only insert user space addresses into the RSB.  Even</div><div class='add'>+  non-canonical addresses can't be inserted due to the page gap at the</div><div class='add'>+  end of the user canonical address space reserved by TASK_SIZE_MAX.</div><div class='add'>+  A SMEP #PF at instruction fetch prevents the kernel from speculatively</div><div class='add'>+  executing user space.</div><div class='add'>+</div><div class='add'>+  * AMD:</div><div class='add'>+	"Finally, branches that are predicted as 'ret' instructions get</div><div class='add'>+	their predicted targets from the Return Address Predictor (RAP).</div><div class='add'>+	AMD recommends software use a RAP stuffing sequence (mitigation</div><div class='add'>+	V2-3 in [2]) and/or Supervisor Mode Execution Protection (SMEP)</div><div class='add'>+	to ensure that the addresses in the RAP are safe for</div><div class='add'>+	speculation. Collectively, we refer to these mitigations as "RAP</div><div class='add'>+	Protection"." [#amd-smep-rsb]_</div><div class='add'>+</div><div class='add'>+  * Intel:</div><div class='add'>+	"On processors with enhanced IBRS, an RSB overwrite sequence may</div><div class='add'>+	not suffice to prevent the predicted target of a near return</div><div class='add'>+	from using an RSB entry created in a less privileged predictor</div><div class='add'>+	mode.  Software can prevent this by enabling SMEP (for</div><div class='add'>+	transitions from user mode to supervisor mode) and by having</div><div class='add'>+	IA32_SPEC_CTRL.IBRS set during VM exits." [#intel-smep-rsb]_</div><div class='add'>+</div><div class='add'>+* On VMEXIT, guest-&gt;host attacks are mitigated by eIBRS (and PBRSB</div><div class='add'>+  mitigation if needed):</div><div class='add'>+</div><div class='add'>+  * AMD:</div><div class='add'>+	"When Automatic IBRS is enabled, the internal return address</div><div class='add'>+	stack used for return address predictions is cleared on VMEXIT."</div><div class='add'>+	[#amd-eibrs-vmexit]_</div><div class='add'>+</div><div class='add'>+  * Intel:</div><div class='add'>+	"On processors with enhanced IBRS, an RSB overwrite sequence may</div><div class='add'>+	not suffice to prevent the predicted target of a near return</div><div class='add'>+	from using an RSB entry created in a less privileged predictor</div><div class='add'>+	mode.  Software can prevent this by enabling SMEP (for</div><div class='add'>+	transitions from user mode to supervisor mode) and by having</div><div class='add'>+	IA32_SPEC_CTRL.IBRS set during VM exits. Processors with</div><div class='add'>+	enhanced IBRS still support the usage model where IBRS is set</div><div class='add'>+	only in the OS/VMM for OSes that enable SMEP. To do this, such</div><div class='add'>+	processors will ensure that guest behavior cannot control the</div><div class='add'>+	RSB after a VM exit once IBRS is set, even if IBRS was not set</div><div class='add'>+	at the time of the VM exit." [#intel-eibrs-vmexit]_</div><div class='add'>+</div><div class='add'>+    Note that some Intel CPUs are susceptible to Post-barrier Return</div><div class='add'>+    Stack Buffer Predictions (PBRSB) [#intel-pbrsb]_, where the last</div><div class='add'>+    CALL from the guest can be used to predict the first unbalanced RET.</div><div class='add'>+    In this case the PBRSB mitigation is needed in addition to eIBRS.</div><div class='add'>+</div><div class='add'>+AMD RETBleed / SRSO / Branch Type Confusion</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+On AMD, poisoned RSB entries can also be created by the AMD RETBleed</div><div class='add'>+variant [#retbleed-paper]_ [#amd-btc]_ or by Speculative Return Stack</div><div class='add'>+Overflow [#amd-srso]_ (Inception [#inception-paper]_).  The kernel</div><div class='add'>+protects itself by replacing every RET in the kernel with a branch to a</div><div class='add'>+single safe RET.</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+RSB underflow (Intel only)</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+RSB Alternate (RSBA) ("Intel Retbleed")</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Some Intel Skylake-generation CPUs are susceptible to the Intel variant</div><div class='add'>+of RETBleed [#retbleed-paper]_ (Return Stack Buffer Underflow</div><div class='add'>+[#intel-rsbu]_).  If a RET is executed when the RSB buffer is empty due</div><div class='add'>+to mismatched CALLs/RETs or returning from a deep call stack, the branch</div><div class='add'>+predictor can fall back to using the Branch Target Buffer (BTB).  If a</div><div class='add'>+user forces a BTB collision then the RET can speculatively branch to a</div><div class='add'>+user-controlled address.</div><div class='add'>+</div><div class='add'>+* Note that RSB filling doesn't fully mitigate this issue.  If there</div><div class='add'>+  are enough unbalanced RETs, the RSB may still underflow and fall back</div><div class='add'>+  to using a poisoned BTB entry.</div><div class='add'>+</div><div class='add'>+* On context switch, user-&gt;user underflow attacks are mitigated by the</div><div class='add'>+  conditional IBPB [#cond-ibpb]_ on context switch which effectively</div><div class='add'>+  clears the BTB:</div><div class='add'>+</div><div class='add'>+  * "The indirect branch predictor barrier (IBPB) is an indirect branch</div><div class='add'>+    control mechanism that establishes a barrier, preventing software</div><div class='add'>+    that executed before the barrier from controlling the predicted</div><div class='add'>+    targets of indirect branches executed after the barrier on the same</div><div class='add'>+    logical processor." [#intel-ibpb-btb]_</div><div class='add'>+</div><div class='add'>+* On context switch and VMEXIT, user-&gt;kernel and guest-&gt;host RSB</div><div class='add'>+  underflows are mitigated by IBRS or eIBRS:</div><div class='add'>+</div><div class='add'>+  * "Enabling IBRS (including enhanced IBRS) will mitigate the "RSBU"</div><div class='add'>+    attack demonstrated by the researchers. As previously documented,</div><div class='add'>+    Intel recommends the use of enhanced IBRS, where supported. This</div><div class='add'>+    includes any processor that enumerates RRSBA but not RRSBA_DIS_S."</div><div class='add'>+    [#intel-rsbu]_</div><div class='add'>+</div><div class='add'>+  However, note that eIBRS and IBRS do not mitigate intra-mode attacks.</div><div class='add'>+  Like RRSBA below, this is mitigated by clearing the BHB on kernel</div><div class='add'>+  entry.</div><div class='add'>+</div><div class='add'>+  As an alternative to classic IBRS, call depth tracking (combined with</div><div class='add'>+  retpolines) can be used to track kernel returns and fill the RSB when</div><div class='add'>+  it gets close to being empty.</div><div class='add'>+</div><div class='add'>+Restricted RSB Alternate (RRSBA)</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Some newer Intel CPUs have Restricted RSB Alternate (RRSBA) behavior,</div><div class='add'>+which, similar to RSBA described above, also falls back to using the BTB</div><div class='add'>+on RSB underflow.  The only difference is that the predicted targets are</div><div class='add'>+restricted to the current domain when eIBRS is enabled:</div><div class='add'>+</div><div class='add'>+* "Restricted RSB Alternate (RRSBA) behavior allows alternate branch</div><div class='add'>+  predictors to be used by near RET instructions when the RSB is</div><div class='add'>+  empty.  When eIBRS is enabled, the predicted targets of these</div><div class='add'>+  alternate predictors are restricted to those belonging to the</div><div class='add'>+  indirect branch predictor entries of the current prediction domain.</div><div class='add'>+  [#intel-eibrs-rrsba]_</div><div class='add'>+</div><div class='add'>+When a CPU with RRSBA is vulnerable to Branch History Injection</div><div class='add'>+[#bhi-paper]_ [#intel-bhi]_, an RSB underflow could be used for an</div><div class='add'>+intra-mode BTI attack.  This is mitigated by clearing the BHB on</div><div class='add'>+kernel entry.</div><div class='add'>+</div><div class='add'>+However if the kernel uses retpolines instead of eIBRS, it needs to</div><div class='add'>+disable RRSBA:</div><div class='add'>+</div><div class='add'>+* "Where software is using retpoline as a mitigation for BHI or</div><div class='add'>+  intra-mode BTI, and the processor both enumerates RRSBA and</div><div class='add'>+  enumerates RRSBA_DIS controls, it should disable this behavior."</div><div class='add'>+  [#intel-retpoline-rrsba]_</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+.. [#spectre-rsb] `Spectre Returns! Speculation Attacks using the Return Stack Buffer &lt;https://arxiv.org/pdf/1807.07940.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-rsb-filling] "Empty RSB Mitigation on Skylake-generation" in `Retpoline: A Branch Target Injection Mitigation &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/retpoline-branch-target-injection-mitigation.html#inpage-nav-5-1&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#amd-rsb-filling] "Mitigation V2-3" in `Software Techniques for Managing Speculation &lt;https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/software-techniques-for-managing-speculation.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#cond-ibpb] Whether IBPB is written depends on whether the prev and/or next task is protected from Spectre attacks.  It typically requires opting in per task or system-wide.  For more details see the documentation for the ``spectre_v2_user`` cmdline option in Documentation/admin-guide/kernel-parameters.txt.</div><div class='add'>+</div><div class='add'>+.. [#amd-sbpb] IBPB without flushing of branch type predictions.  Only exists for AMD.</div><div class='add'>+</div><div class='add'>+.. [#amd-ibpb-rsb] "Function 8000_0008h -- Processor Capacity Parameters and Extended Feature Identification" in `AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions &lt;https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24594.pdf&gt;`_.  SBPB behaves the same way according to `this email &lt;https://lore.kernel.org/5175b163a3736ca5fd01cedf406735636c99a&gt;`_.</div><div class='add'>+</div><div class='add'>+.. [#amd-ibpb-no-rsb] `Spectre Attacks: Exploiting Speculative Execution &lt;https://comsec.ethz.ch/wp-content/files/ibpb_sp25.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-ibpb-rsb] "Introduction" in `Post-barrier Return Stack Buffer Predictions / CVE-2022-26373 / INTEL-SA-00706 &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/post-barrier-return-stack-buffer-predictions.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#amd-smep-rsb] "Existing Mitigations" in `Technical Guidance for Mitigating Branch Type Confusion &lt;https://www.amd.com/content/dam/amd/en/documents/resources/technical-guidance-for-mitigating-branch-type-confusion.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-smep-rsb] "Enhanced IBRS" in `Indirect Branch Restricted Speculation &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-restricted-speculation.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#amd-eibrs-vmexit] "Extended Feature Enable Register (EFER)" in `AMD64 Architecture Programmer's Manual Volume 2: System Programming &lt;https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-eibrs-vmexit] "Enhanced IBRS" in `Indirect Branch Restricted Speculation &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-restricted-speculation.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-pbrsb] `Post-barrier Return Stack Buffer Predictions / CVE-2022-26373 / INTEL-SA-00706 &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/post-barrier-return-stack-buffer-predictions.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#retbleed-paper] `RETBleed: Arbitrary Speculative Code Execution with Return Instruction &lt;https://comsec.ethz.ch/wp-content/files/retbleed_sec22.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#amd-btc] `Technical Guidance for Mitigating Branch Type Confusion &lt;https://www.amd.com/content/dam/amd/en/documents/resources/technical-guidance-for-mitigating-branch-type-confusion.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#amd-srso] `Technical Update Regarding Speculative Return Stack Overflow &lt;https://www.amd.com/content/dam/amd/en/documents/corporate/cr/speculative-return-stack-overflow-whitepaper.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#inception-paper] `Inception: Exposing New Attack Surfaces with Training in Transient Execution &lt;https://comsec.ethz.ch/wp-content/files/inception_sec23.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-rsbu] `Return Stack Buffer Underflow / Return Stack Buffer Underflow / CVE-2022-29901, CVE-2022-28693 / INTEL-SA-00702 &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-ibpb-btb] `Indirect Branch Predictor Barrier' &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-predictor-barrier.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-eibrs-rrsba] "Guidance for RSBU" in `Return Stack Buffer Underflow / Return Stack Buffer Underflow / CVE-2022-29901, CVE-2022-28693 / INTEL-SA-00702 &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/advisory-guidance/return-stack-buffer-underflow.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#bhi-paper] `Branch History Injection: On the Effectiveness of Hardware Mitigations Against Cross-Privilege Spectre-v2 Attacks &lt;http://download.vusec.net/papers/bhi-spectre-bhb_sec22.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-bhi] `Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html&gt;`_</div><div class='add'>+</div><div class='add'>+.. [#intel-retpoline-rrsba] "Retpoline" in `Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 &lt;https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html&gt;`_</div><div class='head'>diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt<br/>index 76e538c77e31..ea81784be981 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/kernel-parameters.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/kernel-parameters.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/kernel-parameters.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/kernel-parameters.txt</a></div><div class='hunk'>@@ -1407,18 +1407,15 @@</div><div class='ctx'> 			earlyprintk=serial[,0x...[,baudrate]]</div><div class='ctx'> 			earlyprintk=ttySn[,baudrate]</div><div class='ctx'> 			earlyprintk=dbgp[debugController#]</div><div class='add'>+			earlyprintk=mmio32,membase[,{nocfg|baudrate}]</div><div class='ctx'> 			earlyprintk=pciserial[,force],bus:device.function[,{nocfg|baudrate}]</div><div class='ctx'> 			earlyprintk=xdbc[xhciController#]</div><div class='ctx'> 			earlyprintk=bios</div><div class='del'>-			earlyprintk=mmio,membase[,{nocfg|baudrate}]</div><div class='ctx'> </div><div class='ctx'> 			earlyprintk is useful when the kernel crashes before</div><div class='ctx'> 			the normal console is initialized. It is not enabled by</div><div class='ctx'> 			default because it has some cosmetic problems.</div><div class='ctx'> </div><div class='del'>-			Only 32-bit memory addresses are supported for "mmio"</div><div class='del'>-			and "pciserial" devices.</div><div class='del'>-</div><div class='ctx'> 			Use "nocfg" to skip UART configuration, assume</div><div class='ctx'> 			BIOS/firmware has configured UART correctly.</div><div class='ctx'> </div><div class='hunk'>@@ -1831,6 +1828,13 @@</div><div class='ctx'> 				lz4: Select LZ4 compression algorithm to</div><div class='ctx'> 				compress/decompress hibernation image.</div><div class='ctx'> </div><div class='add'>+	hibernate.pm_test_delay=</div><div class='add'>+			[HIBERNATION]</div><div class='add'>+			Sets the number of seconds to remain in a hibernation test</div><div class='add'>+			mode before resuming the system (see</div><div class='add'>+			/sys/power/pm_test). Only available when CONFIG_PM_DEBUG</div><div class='add'>+			is set. Default value is 5.</div><div class='add'>+</div><div class='ctx'> 	highmem=nn[KMG]	[KNL,BOOT,EARLY] forces the highmem zone to have an exact</div><div class='ctx'> 			size of &lt;nn&gt;. This works even on boxes that have no</div><div class='ctx'> 			highmem otherwise. This also works to reduce highmem</div><div class='hunk'>@@ -2205,6 +2209,23 @@</div><div class='ctx'> 			different crypto accelerators. This option can be used</div><div class='ctx'> 			to achieve best performance for particular HW.</div><div class='ctx'> </div><div class='add'>+	indirect_target_selection= [X86,Intel] Mitigation control for Indirect</div><div class='add'>+			Target Selection(ITS) bug in Intel CPUs. Updated</div><div class='add'>+			microcode is also required for a fix in IBPB.</div><div class='add'>+</div><div class='add'>+			on:     Enable mitigation (default).</div><div class='add'>+			off:    Disable mitigation.</div><div class='add'>+			force:	Force the ITS bug and deploy default</div><div class='add'>+				mitigation.</div><div class='add'>+			vmexit: Only deploy mitigation if CPU is affected by</div><div class='add'>+				guest/host isolation part of ITS.</div><div class='add'>+			stuff:	Deploy RSB-fill mitigation when retpoline is</div><div class='add'>+				also deployed. Otherwise, deploy the default</div><div class='add'>+				mitigation.</div><div class='add'>+</div><div class='add'>+			For details see:</div><div class='add'>+			Documentation/admin-guide/hw-vuln/indirect-target-selection.rst</div><div class='add'>+</div><div class='ctx'> 	init=		[KNL]</div><div class='ctx'> 			Format: &lt;full_path&gt;</div><div class='ctx'> 			Run specified binary instead of /sbin/init as init</div><div class='hunk'>@@ -3696,6 +3717,7 @@</div><div class='ctx'> 				expose users to several CPU vulnerabilities.</div><div class='ctx'> 				Equivalent to: if nokaslr then kpti=0 [ARM64]</div><div class='ctx'> 					       gather_data_sampling=off [X86]</div><div class='add'>+					       indirect_target_selection=off [X86]</div><div class='ctx'> 					       kvm.nx_huge_pages=off [X86]</div><div class='ctx'> 					       l1tf=off [X86]</div><div class='ctx'> 					       mds=off [X86]</div><div class='hunk'>@@ -5657,6 +5679,31 @@</div><div class='ctx'> 			are zero, rcutorture acts as if is interpreted</div><div class='ctx'> 			they are all non-zero.</div><div class='ctx'> </div><div class='add'>+	rcutorture.gpwrap_lag= [KNL]</div><div class='add'>+			Enable grace-period wrap lag testing. Setting</div><div class='add'>+			to false prevents the gpwrap lag test from</div><div class='add'>+			running. Default is true.</div><div class='add'>+</div><div class='add'>+	rcutorture.gpwrap_lag_gps= [KNL]</div><div class='add'>+			Set the value for grace-period wrap lag during</div><div class='add'>+			active lag testing periods. This controls how many</div><div class='add'>+			grace periods differences we tolerate between</div><div class='add'>+			rdp and rnp's gp_seq before setting overflow flag.</div><div class='add'>+			The default is always set to 8.</div><div class='add'>+</div><div class='add'>+	rcutorture.gpwrap_lag_cycle_mins= [KNL]</div><div class='add'>+			Set the total cycle duration for gpwrap lag</div><div class='add'>+			testing in minutes. This is the total time for</div><div class='add'>+			one complete cycle of active and inactive</div><div class='add'>+			testing periods. Default is 30 minutes.</div><div class='add'>+</div><div class='add'>+	rcutorture.gpwrap_lag_active_mins= [KNL]</div><div class='add'>+			Set the duration for which gpwrap lag is active</div><div class='add'>+			within each cycle, in minutes. During this time,</div><div class='add'>+			the grace-period wrap lag will be set to the</div><div class='add'>+			value specified by gpwrap_lag_gps. Default is</div><div class='add'>+			5 minutes.</div><div class='add'>+</div><div class='ctx'> 	rcutorture.irqreader= [KNL]</div><div class='ctx'> 			Run RCU readers from irq handlers, or, more</div><div class='ctx'> 			accurately, from a timer handler.  Not all RCU</div><div class='hunk'>@@ -6253,7 +6300,7 @@</div><div class='ctx'> 			port and the regular usb controller gets disabled.</div><div class='ctx'> </div><div class='ctx'> 	root=		[KNL] Root filesystem</div><div class='del'>-			Usually this a a block device specifier of some kind,</div><div class='add'>+			Usually this is a block device specifier of some kind,</div><div class='ctx'> 			see the early_lookup_bdev comment in</div><div class='ctx'> 			block/early-lookup.c for details.</div><div class='ctx'> 			Alternatively this can be "ram" for the legacy initial</div><div class='hunk'>@@ -6280,6 +6327,11 @@</div><div class='ctx'> 			Memory area to be used by remote processor image,</div><div class='ctx'> 			managed by CMA.</div><div class='ctx'> </div><div class='add'>+	rt_group_sched=	[KNL] Enable or disable SCHED_RR/FIFO group scheduling</div><div class='add'>+			when CONFIG_RT_GROUP_SCHED=y. Defaults to</div><div class='add'>+			!CONFIG_RT_GROUP_SCHED_DEFAULT_DISABLED.</div><div class='add'>+			Format: &lt;bool&gt;</div><div class='add'>+</div><div class='ctx'> 	rw		[KNL] Mount root device read-write on boot</div><div class='ctx'> </div><div class='ctx'> 	S		[KNL] Run init in single mode</div><div class='head'>diff --git a/Documentation/admin-guide/laptops/alienware-wmi.rst b/Documentation/admin-guide/laptops/alienware-wmi.rst<br/>new file mode 100644<br/>index 000000000000..27a32a8057da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/laptops/alienware-wmi.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/laptops/alienware-wmi.rst</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+====================</div><div class='add'>+Alienware WMI Driver</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+This is a driver for the "WMAX" WMI device, which is found in most Dell gaming</div><div class='add'>+laptops and controls various special features.</div><div class='add'>+</div><div class='add'>+Before the launch of M-Series laptops (~2018), the "WMAX" device controlled</div><div class='add'>+basic RGB lighting, deep sleep mode, HDMI mode and amplifier status.</div><div class='add'>+</div><div class='add'>+Later, this device was completely repurpused. Now it mostly deals with thermal</div><div class='add'>+profiles, sensor monitoring and overclocking. This interface is named "AWCC" and</div><div class='add'>+is known to be used by the AWCC OEM application to control these features.</div><div class='add'>+</div><div class='add'>+The alienware-wmi driver controls both interfaces.</div><div class='add'>+</div><div class='add'>+AWCC Interface</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+WMI device documentation: Documentation/wmi/devices/alienware-wmi.rst</div><div class='add'>+</div><div class='add'>+Supported devices</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+- Alienware M-Series laptops</div><div class='add'>+- Alienware X-Series laptops</div><div class='add'>+- Alienware Aurora Desktops</div><div class='add'>+- Dell G-Series laptops</div><div class='add'>+</div><div class='add'>+If you believe your device supports the AWCC interface and you don't have any of</div><div class='add'>+the features described in this document, try the following alienware-wmi module</div><div class='add'>+parameters:</div><div class='add'>+</div><div class='add'>+- ``force_platform_profile=1``: Forces probing for platform profile support</div><div class='add'>+- ``force_hwmon=1``: Forces probing for HWMON support</div><div class='add'>+</div><div class='add'>+If the module loads successfully with these parameters, consider submitting a</div><div class='add'>+patch adding your model to the ``awcc_dmi_table`` located in</div><div class='add'>+``drivers/platform/x86/dell/alienware-wmi-wmax.c`` or contacting the maintainer</div><div class='add'>+for further guidance.</div><div class='add'>+</div><div class='add'>+Status</div><div class='add'>+------</div><div class='add'>+</div><div class='add'>+The following features are currently supported:</div><div class='add'>+</div><div class='add'>+- :ref:`Platform Profile &lt;platform-profile&gt;`:</div><div class='add'>+</div><div class='add'>+  - Thermal profile control</div><div class='add'>+</div><div class='add'>+  - G-Mode toggling</div><div class='add'>+</div><div class='add'>+- :ref:`HWMON &lt;hwmon&gt;`:</div><div class='add'>+</div><div class='add'>+  - Sensor monitoring</div><div class='add'>+</div><div class='add'>+  - Manual fan control</div><div class='add'>+</div><div class='add'>+.. _platform-profile:</div><div class='add'>+</div><div class='add'>+Platform Profile</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The AWCC interface exposes various firmware defined thermal profiles. These are</div><div class='add'>+exposed to user-space through the Platform Profile class interface. Refer to</div><div class='add'>+:ref:`sysfs-class-platform-profile &lt;abi_file_testing_sysfs_class_platform_profile&gt;`</div><div class='add'>+for more information.</div><div class='add'>+</div><div class='add'>+The name of the platform-profile class device exported by this driver is</div><div class='add'>+"alienware-wmi" and it's path can be found with:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+ grep -l "alienware-wmi" /sys/class/platform-profile/platform-profile-*/name | sed 's|/[^/]*$||'</div><div class='add'>+</div><div class='add'>+If the device supports G-Mode, it is also toggled when selecting the</div><div class='add'>+``performance`` profile.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   You may set the ``force_gmode`` module parameter to always try to toggle this</div><div class='add'>+   feature, without checking if your model supports it.</div><div class='add'>+</div><div class='add'>+.. _hwmon:</div><div class='add'>+</div><div class='add'>+HWMON</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+The AWCC interface also supports sensor monitoring and manual fan control. Both</div><div class='add'>+of these features are exposed to user-space through the HWMON interface.</div><div class='add'>+</div><div class='add'>+The name of the hwmon class device exported by this driver is "alienware_wmi"</div><div class='add'>+and it's path can be found with:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+ grep -l "alienware_wmi" /sys/class/hwmon/hwmon*/name | sed 's|/[^/]*$||'</div><div class='add'>+</div><div class='add'>+Sensor monitoring is done through the standard HWMON interface. Refer to</div><div class='add'>+:ref:`sysfs-class-hwmon &lt;abi_file_testing_sysfs_class_hwmon&gt;` for more</div><div class='add'>+information.</div><div class='add'>+</div><div class='add'>+Manual fan control on the other hand, is not exposed directly by the AWCC</div><div class='add'>+interface. Instead it let's us control a fan `boost` value. This `boost` value</div><div class='add'>+has the following aproximate behavior over the fan pwm:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+ pwm = pwm_base + (fan_boost / 255) * (pwm_max - pwm_base)</div><div class='add'>+</div><div class='add'>+Due to the above behavior, the fan `boost` control is exposed to user-space</div><div class='add'>+through the following, custom hwmon sysfs attribute:</div><div class='add'>+</div><div class='add'>+=============================== ======= =======================================</div><div class='add'>+Name				Perm	Description</div><div class='add'>+=============================== ======= =======================================</div><div class='add'>+fan[1-4]_boost			RW	Fan boost value.</div><div class='add'>+</div><div class='add'>+					Integer value between 0 and 255</div><div class='add'>+=============================== ======= =======================================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   In some devices, manual fan control only works reliably if the ``custom``</div><div class='add'>+   platform profile is selected.</div><div class='head'>diff --git a/Documentation/admin-guide/laptops/index.rst b/Documentation/admin-guide/laptops/index.rst<br/>index e71c8984c23e..db842b629303 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/laptops/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/laptops/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/laptops/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/laptops/index.rst</a></div><div class='hunk'>@@ -7,6 +7,7 @@ Laptop Drivers</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='add'>+   alienware-wmi</div><div class='ctx'>    asus-laptop</div><div class='ctx'>    disk-shock-protection</div><div class='ctx'>    laptop-mode</div><div class='head'>diff --git a/Documentation/admin-guide/media/c3-isp.dot b/Documentation/admin-guide/media/c3-isp.dot<br/>new file mode 100644<br/>index 000000000000..42dc931ee84a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/c3-isp.dot?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/media/c3-isp.dot</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+digraph board {</div><div class='add'>+	rankdir=TB</div><div class='add'>+	n00000001 [label="{{&lt;port0&gt; 0 | &lt;port1&gt; 1} | c3-isp-core\n/dev/v4l-subdev0 | {&lt;port2&gt; 2 | &lt;port3&gt; 3 | &lt;port4&gt; 4 | &lt;port5&gt; 5}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n00000001:port3 -&gt; n00000008:port0</div><div class='add'>+	n00000001:port4 -&gt; n0000000b:port0</div><div class='add'>+	n00000001:port5 -&gt; n0000000e:port0</div><div class='add'>+	n00000001:port2 -&gt; n00000027</div><div class='add'>+	n00000008 [label="{{&lt;port0&gt; 0} | c3-isp-resizer0\n/dev/v4l-subdev1 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n00000008:port1 -&gt; n00000016 [style=bold]</div><div class='add'>+	n0000000b [label="{{&lt;port0&gt; 0} | c3-isp-resizer1\n/dev/v4l-subdev2 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n0000000b:port1 -&gt; n0000001a [style=bold]</div><div class='add'>+	n0000000e [label="{{&lt;port0&gt; 0} | c3-isp-resizer2\n/dev/v4l-subdev3 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n0000000e:port1 -&gt; n00000023 [style=bold]</div><div class='add'>+	n00000011 [label="{{&lt;port0&gt; 0} | c3-mipi-adapter\n/dev/v4l-subdev4 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n00000011:port1 -&gt; n00000001:port0 [style=bold]</div><div class='add'>+	n00000016 [label="c3-isp-cap0\n/dev/video0", shape=box, style=filled, fillcolor=yellow]</div><div class='add'>+	n0000001a [label="c3-isp-cap1\n/dev/video1", shape=box, style=filled, fillcolor=yellow]</div><div class='add'>+	n0000001e [label="{{&lt;port0&gt; 0} | c3-mipi-csi2\n/dev/v4l-subdev5 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n0000001e:port1 -&gt; n00000011:port0 [style=bold]</div><div class='add'>+	n00000023 [label="c3-isp-cap2\n/dev/video2", shape=box, style=filled, fillcolor=yellow]</div><div class='add'>+	n00000027 [label="c3-isp-stats\n/dev/video3", shape=box, style=filled, fillcolor=yellow]</div><div class='add'>+	n0000002b [label="c3-isp-params\n/dev/video4", shape=box, style=filled, fillcolor=yellow]</div><div class='add'>+	n0000002b -&gt; n00000001:port1</div><div class='add'>+	n0000003f [label="{{} | imx290 2-001a\n/dev/v4l-subdev6 | {&lt;port0&gt; 0}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n0000003f:port0 -&gt; n0000001e:port0 [style=bold]</div><div class='add'>+}</div><div class='head'>diff --git a/Documentation/admin-guide/media/c3-isp.rst b/Documentation/admin-guide/media/c3-isp.rst<br/>new file mode 100644<br/>index 000000000000..ac508b8c6831<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/c3-isp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/media/c3-isp.rst</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+.. SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='add'>+</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+=================================================</div><div class='add'>+Amlogic C3 Image Signal Processing (C3ISP) driver</div><div class='add'>+=================================================</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+This file documents the Amlogic C3ISP driver located under</div><div class='add'>+drivers/media/platform/amlogic/c3/isp.</div><div class='add'>+</div><div class='add'>+The current version of the driver supports the C3ISP found on</div><div class='add'>+Amlogic C308L processor.</div><div class='add'>+</div><div class='add'>+The driver implements V4L2, Media controller and V4L2 subdev interfaces.</div><div class='add'>+Camera sensor using V4L2 subdev interface in the kernel is supported.</div><div class='add'>+</div><div class='add'>+The driver has been tested on AW419-C308L-Socket platform.</div><div class='add'>+</div><div class='add'>+Amlogic C3 ISP</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+The Camera hardware found on C308L processors and supported by</div><div class='add'>+the driver consists of:</div><div class='add'>+</div><div class='add'>+- 1 MIPI-CSI-2 module: handles the physical layer of the MIPI CSI-2 receiver and</div><div class='add'>+  receives data from the connected camera sensor.</div><div class='add'>+- 1 MIPI-ADAPTER module: organizes MIPI data to meet ISP input requirements and</div><div class='add'>+  send MIPI data to ISP.</div><div class='add'>+- 1 ISP (Image Signal Processing) module: contains a pipeline of image processing</div><div class='add'>+  hardware blocks. The ISP pipeline contains three resizers at the end each of</div><div class='add'>+  them connected to a DMA interface which writes the output data to memory.</div><div class='add'>+</div><div class='add'>+A high-level functional view of the C3 ISP is presented below.::</div><div class='add'>+</div><div class='add'>+                                                                   +----------+    +-------+</div><div class='add'>+                                                                   | Resizer  |---&gt;| WRMIF |</div><div class='add'>+  +---------+    +------------+    +--------------+    +-------+   |----------+    +-------+</div><div class='add'>+  | Sensor  |---&gt;| MIPI CSI-2 |---&gt;| MIPI ADAPTER |---&gt;|  ISP  |---|----------+    +-------+</div><div class='add'>+  +---------+    +------------+    +--------------+    +-------+   | Resizer  |---&gt;| WRMIF |</div><div class='add'>+                                                                   +----------+    +-------+</div><div class='add'>+                                                                   |----------+    +-------+</div><div class='add'>+                                                                   | Resizer  |---&gt;| WRMIF |</div><div class='add'>+                                                                   +----------+    +-------+</div><div class='add'>+</div><div class='add'>+Driver architecture and design</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+With the goal to model the hardware links between the modules and to expose a</div><div class='add'>+clean, logical and usable interface, the driver registers the following V4L2</div><div class='add'>+sub-devices:</div><div class='add'>+</div><div class='add'>+- 1 `c3-mipi-csi2` sub-device - the MIPI CSI-2 receiver</div><div class='add'>+- 1 `c3-mipi-adapter` sub-device - the MIPI adapter</div><div class='add'>+- 1 `c3-isp-core` sub-device - the ISP core</div><div class='add'>+- 3 `c3-isp-resizer` sub-devices - the ISP resizers</div><div class='add'>+</div><div class='add'>+The `c3-isp-core` sub-device is linked to 2 video device nodes for statistics</div><div class='add'>+capture and parameters programming:</div><div class='add'>+</div><div class='add'>+- the `c3-isp-stats` capture video device node for statistics capture</div><div class='add'>+- the `c3-isp-params` output video device for parameters programming</div><div class='add'>+</div><div class='add'>+Each `c3-isp-resizer` sub-device is linked to a capture video device node where</div><div class='add'>+frames are captured from:</div><div class='add'>+</div><div class='add'>+- `c3-isp-resizer0` is linked to the `c3-isp-cap0` capture video device</div><div class='add'>+- `c3-isp-resizer1` is linked to the `c3-isp-cap1` capture video device</div><div class='add'>+- `c3-isp-resizer2` is linked to the `c3-isp-cap2` capture video device</div><div class='add'>+</div><div class='add'>+The media controller pipeline graph is as follows (with connected a</div><div class='add'>+IMX290 camera sensor):</div><div class='add'>+</div><div class='add'>+.. _isp_topology_graph:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: c3-isp.dot</div><div class='add'>+    :alt:   c3-isp.dot</div><div class='add'>+    :align: center</div><div class='add'>+</div><div class='add'>+    Media pipeline topology</div><div class='add'>+</div><div class='add'>+Implementation</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+Runtime configuration of the ISP hardware is performed on the `c3-isp-params`</div><div class='add'>+video device node using the :ref:`V4L2_META_FMT_C3ISP_PARAMS</div><div class='add'>+&lt;v4l2-meta-fmt-c3isp-params&gt;` as data format. The buffer structure is defined by</div><div class='add'>+:c:type:`c3_isp_params_cfg`.</div><div class='add'>+</div><div class='add'>+Statistics are captured from the `c3-isp-stats` video device node using the</div><div class='add'>+:ref:`V4L2_META_FMT_C3ISP_STATS &lt;v4l2-meta-fmt-c3isp-stats&gt;` data format.</div><div class='add'>+</div><div class='add'>+The final picture size and format is configured using the V4L2 video</div><div class='add'>+capture interface on the `c3-isp-cap[0, 2]` video device nodes.</div><div class='add'>+</div><div class='add'>+The Amlogic C3 ISP is supported by `libcamera &lt;https://libcamera.org&gt;`_ with a</div><div class='add'>+dedicated pipeline handler and algorithms that perform run-time image correction</div><div class='add'>+and enhancement.</div><div class='head'>diff --git a/Documentation/admin-guide/media/mgb4.rst b/Documentation/admin-guide/media/mgb4.rst<br/>index f69d331e3cb1..5ac69b833a7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/mgb4.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/mgb4.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/mgb4.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/media/mgb4.rst</a></div><div class='hunk'>@@ -1,8 +1,17 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='ctx'> The mgb4 driver</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='add'>+Copyright |copy| 2023 - 2025 Digiteq Automotive</div><div class='add'>+    author: Martin Tůma &lt;martin.tuma@digiteqautomotive.com&gt;</div><div class='add'>+</div><div class='add'>+This is a v4l2 device driver for the Digiteq Automotive FrameGrabber 4, a PCIe</div><div class='add'>+card capable of capturing and generating FPD-Link III and GMSL2/3 video streams</div><div class='add'>+as used in the automotive industry.</div><div class='add'>+</div><div class='ctx'> sysfs interface</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/media/pci-cardlist.rst b/Documentation/admin-guide/media/pci-cardlist.rst<br/>index 7d8e3c8987db..239879634ea5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/pci-cardlist.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/pci-cardlist.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/pci-cardlist.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/media/pci-cardlist.rst</a></div><div class='hunk'>@@ -86,7 +86,6 @@ saa7134           Philips SAA7134</div><div class='ctx'> saa7164           NXP SAA7164</div><div class='ctx'> smipcie           SMI PCIe DVBSky cards</div><div class='ctx'> solo6x10          Bluecherry / Softlogic 6x10 capture cards (MPEG-4/H.264)</div><div class='del'>-sta2x11_vip       STA2X11 VIP Video For Linux</div><div class='ctx'> tw5864            Techwell TW5864 video/audio grabber and encoder</div><div class='ctx'> tw686x            Intersil/Techwell TW686x</div><div class='ctx'> tw68              Techwell tw68x Video For Linux</div><div class='head'>diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst<br/>index e8761561b2fe..3bac5165b134 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/v4l-drivers.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/media/v4l-drivers.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/media/v4l-drivers.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/media/v4l-drivers.rst</a></div><div class='hunk'>@@ -10,6 +10,7 @@ Video4Linux (V4L) driver-specific documentation</div><div class='ctx'> 	:maxdepth: 2</div><div class='ctx'> </div><div class='ctx'> 	bttv</div><div class='add'>+	c3-isp</div><div class='ctx'> 	cafe_ccic</div><div class='ctx'> 	cx88</div><div class='ctx'> 	fimc</div><div class='head'>diff --git a/Documentation/admin-guide/namespaces/resource-control.rst b/Documentation/admin-guide/namespaces/resource-control.rst<br/>index 369556e00f0c..553a44803231 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/namespaces/resource-control.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/namespaces/resource-control.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/namespaces/resource-control.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/namespaces/resource-control.rst</a></div><div class='hunk'>@@ -1,17 +1,17 @@</div><div class='del'>-===========================</div><div class='del'>-Namespaces research control</div><div class='del'>-===========================</div><div class='add'>+====================================</div><div class='add'>+User namespaces and resource control</div><div class='add'>+====================================</div><div class='ctx'> </div><div class='del'>-There are a lot of kinds of objects in the kernel that don't have</div><div class='del'>-individual limits or that have limits that are ineffective when a set</div><div class='del'>-of processes is allowed to switch user ids.  With user namespaces</div><div class='del'>-enabled in a kernel for people who don't trust their users or their</div><div class='del'>-users programs to play nice this problems becomes more acute.</div><div class='add'>+The kernel contains many kinds of objects that either don't have</div><div class='add'>+individual limits or that have limits which are ineffective when</div><div class='add'>+a set of processes is allowed to switch their UID. On a system</div><div class='add'>+where the admins don't trust their users or their users' programs,</div><div class='add'>+user namespaces expose the system to potential misuse of resources.</div><div class='ctx'> </div><div class='del'>-Therefore it is recommended that memory control groups be enabled in</div><div class='del'>-kernels that enable user namespaces, and it is further recommended</div><div class='del'>-that userspace configure memory control groups to limit how much</div><div class='del'>-memory user's they don't trust to play nice can use.</div><div class='add'>+In order to mitigate this, we recommend that admins enable memory</div><div class='add'>+control groups on any system that enables user namespaces.</div><div class='add'>+Furthermore, we recommend that admins configure the memory control</div><div class='add'>+groups to limit the maximum memory usable by any untrusted user.</div><div class='ctx'> </div><div class='ctx'> Memory control groups can be configured by installing the libcgroup</div><div class='ctx'> package present on most distros editing /etc/cgrules.conf,</div><div class='head'>diff --git a/Documentation/admin-guide/pm/cpufreq.rst b/Documentation/admin-guide/pm/cpufreq.rst<br/>index 3950583f2b15..2d74af7f0efe 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/cpufreq.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/cpufreq.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/cpufreq.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/pm/cpufreq.rst</a></div><div class='hunk'>@@ -231,7 +231,7 @@ are the following:</div><div class='ctx'> 	present).</div><div class='ctx'> </div><div class='ctx'> 	The existence of the limit may be a result of some (often unintentional)</div><div class='del'>-	BIOS settings, restrictions coming from a service processor or another</div><div class='add'>+	BIOS settings, restrictions coming from a service processor or other</div><div class='ctx'> 	BIOS/HW-based mechanisms.</div><div class='ctx'> </div><div class='ctx'> 	This does not cover ACPI thermal limitations which can be discovered</div><div class='hunk'>@@ -258,8 +258,8 @@ are the following:</div><div class='ctx'>         extension on ARM). If one cannot be determined, this attribute should</div><div class='ctx'>         not be present.</div><div class='ctx'> </div><div class='del'>-        Note, that failed attempt to retrieve current frequency for a given</div><div class='del'>-        CPU(s) will result in an appropriate error, i.e: EAGAIN for CPU that</div><div class='add'>+        Note that failed attempt to retrieve current frequency for a given</div><div class='add'>+        CPU(s) will result in an appropriate error, i.e.: EAGAIN for CPU that</div><div class='ctx'>         remains idle (raised on ARM).</div><div class='ctx'> </div><div class='ctx'> ``cpuinfo_max_freq``</div><div class='hunk'>@@ -499,7 +499,7 @@ This governor exposes the following tunables:</div><div class='ctx'> 	represented by it to be 1.5 times as high as the transition latency</div><div class='ctx'> 	(the default)::</div><div class='ctx'> </div><div class='del'>-	# echo `$(($(cat cpuinfo_transition_latency) * 3 / 2)) &gt; ondemand/sampling_rate</div><div class='add'>+	# echo `$(($(cat cpuinfo_transition_latency) * 3 / 2))` &gt; ondemand/sampling_rate</div><div class='ctx'> </div><div class='ctx'> ``up_threshold``</div><div class='ctx'> 	If the estimated CPU load is above this value (in percent), the governor</div><div class='head'>diff --git a/Documentation/admin-guide/pm/intel_idle.rst b/Documentation/admin-guide/pm/intel_idle.rst<br/>index 5940528146eb..ed6f055d4b14 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/intel_idle.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/intel_idle.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/intel_idle.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/pm/intel_idle.rst</a></div><div class='hunk'>@@ -38,6 +38,27 @@ instruction at all.</div><div class='ctx'> only way to pass early-configuration-time parameters to it is via the kernel</div><div class='ctx'> command line.</div><div class='ctx'> </div><div class='add'>+Sysfs Interface</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+The ``intel_idle`` driver exposes the following ``sysfs`` attributes in</div><div class='add'>+``/sys/devices/system/cpu/cpuidle/``:</div><div class='add'>+</div><div class='add'>+``intel_c1_demotion``</div><div class='add'>+	Enable or disable C1 demotion for all CPUs in the system. This file is</div><div class='add'>+	only exposed on platforms that support the C1 demotion feature and where</div><div class='add'>+	it was tested. Value 0 means that C1 demotion is disabled, value 1 means</div><div class='add'>+	that it is enabled. Write 0 or 1 to disable or enable C1 demotion for</div><div class='add'>+	all CPUs.</div><div class='add'>+</div><div class='add'>+	The C1 demotion feature involves the platform firmware demoting deep</div><div class='add'>+	C-state requests from the OS (e.g., C6 requests) to C1. The idea is that</div><div class='add'>+	firmware monitors CPU wake-up rate, and if it is higher than a</div><div class='add'>+	platform-specific threshold, the firmware demotes deep C-state requests</div><div class='add'>+	to C1. For example, Linux requests C6, but firmware noticed too many</div><div class='add'>+	wake-ups per second, and it keeps the CPU in C1. When the CPU stays in</div><div class='add'>+	C1 long enough, the platform promotes it back to C6. This may improve</div><div class='add'>+	some workloads' performance, but it may also increase power consumption.</div><div class='ctx'> </div><div class='ctx'> .. _intel-idle-enumeration-of-states:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/pm/intel_pstate.rst b/Documentation/admin-guide/pm/intel_pstate.rst<br/>index 78fc83ed2a7e..26e702c7016e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/intel_pstate.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/intel_pstate.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/intel_pstate.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/pm/intel_pstate.rst</a></div><div class='hunk'>@@ -329,6 +329,106 @@ information listed above is the same for all of the processors supporting the</div><div class='ctx'> HWP feature, which is why ``intel_pstate`` works with all of them.]</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Support for Hybrid Processors</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+Some processors supported by ``intel_pstate`` contain two or more types of CPU</div><div class='add'>+cores differing by the maximum turbo P-state, performance vs power characteristics,</div><div class='add'>+cache sizes, and possibly other properties.  They are commonly referred to as</div><div class='add'>+hybrid processors.  To support them, ``intel_pstate`` requires HWP to be enabled</div><div class='add'>+and it assumes the HWP performance units to be the same for all CPUs in the</div><div class='add'>+system, so a given HWP performance level always represents approximately the</div><div class='add'>+same physical performance regardless of the core (CPU) type.</div><div class='add'>+</div><div class='add'>+Hybrid Processors with SMT</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+On systems where SMT (Simultaneous Multithreading), also referred to as</div><div class='add'>+HyperThreading (HT) in the context of Intel processors, is enabled on at least</div><div class='add'>+one core, ``intel_pstate`` assigns performance-based priorities to CPUs.  Namely,</div><div class='add'>+the priority of a given CPU reflects its highest HWP performance level which</div><div class='add'>+causes the CPU scheduler to generally prefer more performant CPUs, so the less</div><div class='add'>+performant CPUs are used when the other ones are fully loaded.  However, SMT</div><div class='add'>+siblings (that is, logical CPUs sharing one physical core) are treated in a</div><div class='add'>+special way such that if one of them is in use, the effective priority of the</div><div class='add'>+other ones is lowered below the priorities of the CPUs located in the other</div><div class='add'>+physical cores.</div><div class='add'>+</div><div class='add'>+This approach maximizes performance in the majority of cases, but unfortunately</div><div class='add'>+it also leads to excessive energy usage in some important scenarios, like video</div><div class='add'>+playback, which is not generally desirable.  While there is no other viable</div><div class='add'>+choice with SMT enabled because the effective capacity and utilization of SMT</div><div class='add'>+siblings are hard to determine, hybrid processors without SMT can be handled in</div><div class='add'>+more energy-efficient ways.</div><div class='add'>+</div><div class='add'>+.. _CAS:</div><div class='add'>+</div><div class='add'>+Capacity-Aware Scheduling Support</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+The capacity-aware scheduling (CAS) support in the CPU scheduler is enabled by</div><div class='add'>+``intel_pstate`` by default on hybrid processors without SMT.  CAS generally</div><div class='add'>+causes the scheduler to put tasks on a CPU so long as there is a sufficient</div><div class='add'>+amount of spare capacity on it, and if the utilization of a given task is too</div><div class='add'>+high for it, the task will need to go somewhere else.</div><div class='add'>+</div><div class='add'>+Since CAS takes CPU capacities into account, it does not require CPU</div><div class='add'>+prioritization and it allows tasks to be distributed more symmetrically among</div><div class='add'>+the more performant and less performant CPUs.  Once placed on a CPU with enough</div><div class='add'>+capacity to accommodate it, a task may just continue to run there regardless of</div><div class='add'>+whether or not the other CPUs are fully loaded, so on average CAS reduces the</div><div class='add'>+utilization of the more performant CPUs which causes the energy usage to be more</div><div class='add'>+balanced because the more performant CPUs are generally less energy-efficient</div><div class='add'>+than the less performant ones.</div><div class='add'>+</div><div class='add'>+In order to use CAS, the scheduler needs to know the capacity of each CPU in</div><div class='add'>+the system and it needs to be able to compute scale-invariant utilization of</div><div class='add'>+CPUs, so ``intel_pstate`` provides it with the requisite information.</div><div class='add'>+</div><div class='add'>+First of all, the capacity of each CPU is represented by the ratio of its highest</div><div class='add'>+HWP performance level, multiplied by 1024, to the highest HWP performance level</div><div class='add'>+of the most performant CPU in the system, which works because the HWP performance</div><div class='add'>+units are the same for all CPUs.  Second, the frequency-invariance computations,</div><div class='add'>+carried out by the scheduler to always express CPU utilization in the same units</div><div class='add'>+regardless of the frequency it is currently running at, are adjusted to take the</div><div class='add'>+CPU capacity into account.  All of this happens when ``intel_pstate`` has</div><div class='add'>+registered itself with the ``CPUFreq`` core and it has figured out that it is</div><div class='add'>+running on a hybrid processor without SMT.</div><div class='add'>+</div><div class='add'>+Energy-Aware Scheduling Support</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+If ``CONFIG_ENERGY_MODEL`` has been set during kernel configuration and</div><div class='add'>+``intel_pstate`` runs on a hybrid processor without SMT, in addition to enabling</div><div class='add'>+`CAS &lt;CAS_&gt;`_ it registers an Energy Model for the processor.  This allows the</div><div class='add'>+Energy-Aware Scheduling (EAS) support to be enabled in the CPU scheduler if</div><div class='add'>+``schedutil`` is used as the  ``CPUFreq`` governor which requires ``intel_pstate``</div><div class='add'>+to operate in the `passive mode &lt;Passive Mode_&gt;`_.</div><div class='add'>+</div><div class='add'>+The Energy Model registered by ``intel_pstate`` is artificial (that is, it is</div><div class='add'>+based on abstract cost values and it does not include any real power numbers)</div><div class='add'>+and it is relatively simple to avoid unnecessary computations in the scheduler.</div><div class='add'>+There is a performance domain in it for every CPU in the system and the cost</div><div class='add'>+values for these performance domains have been chosen so that running a task on</div><div class='add'>+a less performant (small) CPU appears to be always cheaper than running that</div><div class='add'>+task on a more performant (big) CPU.  However, for two CPUs of the same type,</div><div class='add'>+the cost difference depends on their current utilization, and the CPU whose</div><div class='add'>+current utilization is higher generally appears to be a more expensive</div><div class='add'>+destination for a given task.  This helps to balance the load among CPUs of the</div><div class='add'>+same type.</div><div class='add'>+</div><div class='add'>+Since EAS works on top of CAS, high-utilization tasks are always migrated to</div><div class='add'>+CPUs with enough capacity to accommodate them, but thanks to EAS, low-utilization</div><div class='add'>+tasks tend to be placed on the CPUs that look less expensive to the scheduler.</div><div class='add'>+Effectively, this causes the less performant and less loaded CPUs to be</div><div class='add'>+preferred as long as they have enough spare capacity to run the given task</div><div class='add'>+which generally leads to reduced energy usage.</div><div class='add'>+</div><div class='add'>+The Energy Model created by ``intel_pstate`` can be inspected by looking at</div><div class='add'>+the ``energy_model`` directory in ``debugfs`` (typlically mounted on</div><div class='add'>+``/sys/kernel/debug/``).</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> User Space Interface in ``sysfs``</div><div class='ctx'> =================================</div><div class='ctx'> </div><div class='hunk'>@@ -697,8 +797,8 @@ of them have to be prepended with the ``intel_pstate=`` prefix.</div><div class='ctx'> 	Limits`_ for details).</div><div class='ctx'> </div><div class='ctx'> ``no_cas``</div><div class='del'>-	Do not enable capacity-aware scheduling (CAS) which is enabled by</div><div class='del'>-	default on hybrid systems.</div><div class='add'>+	Do not enable `capacity-aware scheduling &lt;CAS_&gt;`_ which is enabled by</div><div class='add'>+	default on hybrid systems without SMT.</div><div class='ctx'> </div><div class='ctx'> Diagnostics and Tuning</div><div class='ctx'> ======================</div><div class='head'>diff --git a/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst b/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst<br/>index 5151ec312dc0..d367ba4d744a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/pm/intel_uncore_frequency_scaling.rst</a></div><div class='hunk'>@@ -91,12 +91,22 @@ Attributes in each directory:</div><div class='ctx'> ``domain_id``</div><div class='ctx'> 	This attribute is used to get the power domain id of this instance.</div><div class='ctx'> </div><div class='add'>+``die_id``</div><div class='add'>+	This attribute is used to get the Linux die id of this instance.</div><div class='add'>+	This attribute is only present for domains with core agents and</div><div class='add'>+	when the CPUID leaf 0x1f presents die ID.</div><div class='add'>+</div><div class='ctx'> ``fabric_cluster_id``</div><div class='ctx'> 	This attribute is used to get the fabric cluster id of this instance.</div><div class='ctx'> </div><div class='ctx'> ``package_id``</div><div class='ctx'> 	This attribute is used to get the package id of this instance.</div><div class='ctx'> </div><div class='add'>+``agent_types``</div><div class='add'>+	This attribute displays all the hardware agents present within the</div><div class='add'>+	domain. Each agent has the capability to control one or more hardware</div><div class='add'>+	subsystems, which include: core, cache, memory, and I/O.</div><div class='add'>+</div><div class='ctx'> The other attributes are same as presented at package_*_die_* level.</div><div class='ctx'> </div><div class='ctx'> In most of current use cases, the "max_freq_khz" and "min_freq_khz"</div><div class='head'>diff --git a/Documentation/admin-guide/quickly-build-trimmed-linux.rst b/Documentation/admin-guide/quickly-build-trimmed-linux.rst<br/>index 07cfd8863b46..4a5ffb0996a3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/quickly-build-trimmed-linux.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/quickly-build-trimmed-linux.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/quickly-build-trimmed-linux.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/quickly-build-trimmed-linux.rst</a></div><div class='hunk'>@@ -347,7 +347,7 @@ again.</div><div class='ctx'> </div><div class='ctx'>    [:ref:`details&lt;uninstall&gt;`]</div><div class='ctx'> </div><div class='del'>-.. _submit_improvements:</div><div class='add'>+.. _submit_improvements_qbtl:</div><div class='ctx'> </div><div class='ctx'> Did you run into trouble following any of the above steps that is not cleared up</div><div class='ctx'> by the reference section below? Or do you have ideas how to improve the text?</div><div class='hunk'>@@ -1070,7 +1070,7 @@ complicated, and harder to follow.</div><div class='ctx'> </div><div class='ctx'> That being said: this of course is a balancing act. Hence, if you think an</div><div class='ctx'> additional use-case is worth describing, suggest it to the maintainers of this</div><div class='del'>-document, as :ref:`described above &lt;submit_improvements&gt;`.</div><div class='add'>+document, as :ref:`described above &lt;submit_improvements_qbtl&gt;`.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> ..</div><div class='head'>diff --git a/Documentation/admin-guide/reporting-issues.rst b/Documentation/admin-guide/reporting-issues.rst<br/>index 2fd5a030235a..9a847506f6ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/reporting-issues.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/reporting-issues.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/reporting-issues.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/reporting-issues.rst</a></div><div class='hunk'>@@ -41,7 +41,7 @@ If you are facing multiple issues with the Linux kernel at once, report each</div><div class='ctx'> separately. While writing your report, include all information relevant to the</div><div class='ctx'> issue, like the kernel and the distro used. In case of a regression, CC the</div><div class='ctx'> regressions mailing list (regressions@lists.linux.dev) to your report. Also try</div><div class='del'>-to pin-point the culprit with a bisection; if you succeed, include its</div><div class='add'>+to pinpoint the culprit with a bisection; if you succeed, include its</div><div class='ctx'> commit-id and CC everyone in the sign-off-by chain.</div><div class='ctx'> </div><div class='ctx'> Once the report is out, answer any questions that come up and help where you</div><div class='hunk'>@@ -206,7 +206,7 @@ Reporting issues only occurring in older kernel version lines</div><div class='ctx'> This subsection is for you, if you tried the latest mainline kernel as outlined</div><div class='ctx'> above, but failed to reproduce your issue there; at the same time you want to</div><div class='ctx'> see the issue fixed in a still supported stable or longterm series or vendor</div><div class='del'>-kernels regularly rebased on those. If that the case, follow these steps:</div><div class='add'>+kernels regularly rebased on those. If that is the case, follow these steps:</div><div class='ctx'> </div><div class='ctx'>  * Prepare yourself for the possibility that going through the next few steps</div><div class='ctx'>    might not get the issue solved in older releases: the fix might be too big</div><div class='hunk'>@@ -312,7 +312,7 @@ small modifications to a kernel based on a recent Linux version; that for</div><div class='ctx'> example often holds true for the mainline kernels shipped by Debian GNU/Linux</div><div class='ctx'> Sid or Fedora Rawhide. Some developers will also accept reports about issues</div><div class='ctx'> with kernels from distributions shipping the latest stable kernel, as long as</div><div class='del'>-its only slightly modified; that for example is often the case for Arch Linux,</div><div class='add'>+it's only slightly modified; that for example is often the case for Arch Linux,</div><div class='ctx'> regular Fedora releases, and openSUSE Tumbleweed. But keep in mind, you better</div><div class='ctx'> want to use a mainline Linux and avoid using a stable kernel for this</div><div class='ctx'> process, as outlined in the section 'Install a fresh kernel for testing' in more</div><div class='head'>diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst<br/>index 8290177b4f75..d385985b305f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/sysctl/vm.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/sysctl/vm.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/sysctl/vm.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/sysctl/vm.rst</a></div><div class='hunk'>@@ -75,6 +75,7 @@ Currently, these files are in /proc/sys/vm:</div><div class='ctx'> - unprivileged_userfaultfd</div><div class='ctx'> - user_reserve_kbytes</div><div class='ctx'> - vfs_cache_pressure</div><div class='add'>+- vfs_cache_pressure_denom</div><div class='ctx'> - watermark_boost_factor</div><div class='ctx'> - watermark_scale_factor</div><div class='ctx'> - zone_reclaim_mode</div><div class='hunk'>@@ -1017,19 +1018,28 @@ vfs_cache_pressure</div><div class='ctx'> This percentage value controls the tendency of the kernel to reclaim</div><div class='ctx'> the memory which is used for caching of directory and inode objects.</div><div class='ctx'> </div><div class='del'>-At the default value of vfs_cache_pressure=100 the kernel will attempt to</div><div class='del'>-reclaim dentries and inodes at a "fair" rate with respect to pagecache and</div><div class='del'>-swapcache reclaim.  Decreasing vfs_cache_pressure causes the kernel to prefer</div><div class='del'>-to retain dentry and inode caches. When vfs_cache_pressure=0, the kernel will</div><div class='del'>-never reclaim dentries and inodes due to memory pressure and this can easily</div><div class='del'>-lead to out-of-memory conditions. Increasing vfs_cache_pressure beyond 100</div><div class='del'>-causes the kernel to prefer to reclaim dentries and inodes.</div><div class='add'>+At the default value of vfs_cache_pressure=vfs_cache_pressure_denom the kernel</div><div class='add'>+will attempt to reclaim dentries and inodes at a "fair" rate with respect to</div><div class='add'>+pagecache and swapcache reclaim.  Decreasing vfs_cache_pressure causes the</div><div class='add'>+kernel to prefer to retain dentry and inode caches. When vfs_cache_pressure=0,</div><div class='add'>+the kernel will never reclaim dentries and inodes due to memory pressure and</div><div class='add'>+this can easily lead to out-of-memory conditions. Increasing vfs_cache_pressure</div><div class='add'>+beyond vfs_cache_pressure_denom causes the kernel to prefer to reclaim dentries</div><div class='add'>+and inodes.</div><div class='ctx'> </div><div class='del'>-Increasing vfs_cache_pressure significantly beyond 100 may have negative</div><div class='del'>-performance impact. Reclaim code needs to take various locks to find freeable</div><div class='del'>-directory and inode objects. With vfs_cache_pressure=1000, it will look for</div><div class='del'>-ten times more freeable objects than there are.</div><div class='add'>+Increasing vfs_cache_pressure significantly beyond vfs_cache_pressure_denom may</div><div class='add'>+have negative performance impact. Reclaim code needs to take various locks to</div><div class='add'>+find freeable directory and inode objects. When vfs_cache_pressure equals</div><div class='add'>+(10 * vfs_cache_pressure_denom), it will look for ten times more freeable</div><div class='add'>+objects than there are.</div><div class='ctx'> </div><div class='add'>+Note: This setting should always be used together with vfs_cache_pressure_denom.</div><div class='add'>+</div><div class='add'>+vfs_cache_pressure_denom</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+Defaults to 100 (minimum allowed value). Requires corresponding</div><div class='add'>+vfs_cache_pressure setting to take effect.</div><div class='ctx'> </div><div class='ctx'> watermark_boost_factor</div><div class='ctx'> ======================</div><div class='head'>diff --git a/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst b/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst<br/>index 03c55151346c..d8946b084b1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/verify-bugs-and-bisect-regressions.rst</a></div><div class='hunk'>@@ -267,7 +267,7 @@ culprit might be known already. For further details on what actually qualifies</div><div class='ctx'> as a regression check out Documentation/admin-guide/reporting-regressions.rst.</div><div class='ctx'> </div><div class='ctx'> If you run into any problems while following this guide or have ideas how to</div><div class='del'>-improve it, :ref:`please let the kernel developers know &lt;submit_improvements&gt;`.</div><div class='add'>+improve it, :ref:`please let the kernel developers know &lt;submit_improvements_vbbr&gt;`.</div><div class='ctx'> </div><div class='ctx'> .. _introprep_bissbs:</div><div class='ctx'> </div><div class='hunk'>@@ -1055,7 +1055,7 @@ follow these instructions.</div><div class='ctx'> </div><div class='ctx'> [:ref:`details &lt;introoptional_bisref&gt;`]</div><div class='ctx'> </div><div class='del'>-.. _submit_improvements:</div><div class='add'>+.. _submit_improvements_vbbr:</div><div class='ctx'> </div><div class='ctx'> Conclusion</div><div class='ctx'> ----------</div><div class='head'>diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst<br/>index b67772cf36d6..a18328a5fb93 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/admin-guide/xfs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/admin-guide/xfs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/admin-guide/xfs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/admin-guide/xfs.rst</a></div><div class='hunk'>@@ -124,6 +124,14 @@ When mounting an XFS filesystem, the following options are accepted.</div><div class='ctx'> 	controls the size of each buffer and so is also relevant to</div><div class='ctx'> 	this case.</div><div class='ctx'> </div><div class='add'>+  lifetime (default) or nolifetime</div><div class='add'>+	Enable data placement based on write life time hints provided</div><div class='add'>+	by the user. This turns on co-allocation of data of similar</div><div class='add'>+	life times when statistically favorable to reduce garbage</div><div class='add'>+	collection cost.</div><div class='add'>+</div><div class='add'>+	These options are only available for zoned rt file systems.</div><div class='add'>+</div><div class='ctx'>   logbsize=value</div><div class='ctx'> 	Set the size of each in-memory log buffer.  The size may be</div><div class='ctx'> 	specified in bytes, or in kilobytes with a "k" suffix.</div><div class='hunk'>@@ -143,6 +151,25 @@ When mounting an XFS filesystem, the following options are accepted.</div><div class='ctx'> 	optional, and the log section can be separate from the data</div><div class='ctx'> 	section or contained within it.</div><div class='ctx'> </div><div class='add'>+  max_atomic_write=value</div><div class='add'>+	Set the maximum size of an atomic write.  The size may be</div><div class='add'>+	specified in bytes, in kilobytes with a "k" suffix, in megabytes</div><div class='add'>+	with a "m" suffix, or in gigabytes with a "g" suffix.  The size</div><div class='add'>+	cannot be larger than the maximum write size, larger than the</div><div class='add'>+	size of any allocation group, or larger than the size of a</div><div class='add'>+	remapping operation that the log can complete atomically.</div><div class='add'>+</div><div class='add'>+	The default value is to set the maximum I/O completion size</div><div class='add'>+	to allow each CPU to handle one at a time.</div><div class='add'>+</div><div class='add'>+  max_open_zones=value</div><div class='add'>+	Specify the max number of zones to keep open for writing on a</div><div class='add'>+	zoned rt device. Many open zones aids file data separation</div><div class='add'>+	but may impact performance on HDDs.</div><div class='add'>+</div><div class='add'>+	If ``max_open_zones`` is not specified, the value is determined</div><div class='add'>+	by the capabilities and the size of the zoned rt device.</div><div class='add'>+</div><div class='ctx'>   noalign</div><div class='ctx'> 	Data allocations will not be aligned at stripe unit</div><div class='ctx'> 	boundaries. This is only relevant to filesystems created</div><div class='hunk'>@@ -542,3 +569,24 @@ The interesting knobs for XFS workqueues are as follows:</div><div class='ctx'>   nice           Relative priority of scheduling the threads.  These are the</div><div class='ctx'>                  same nice levels that can be applied to userspace processes.</div><div class='ctx'> ============     ===========</div><div class='add'>+</div><div class='add'>+Zoned Filesystems</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+For zoned file systems, the following attributes are exposed in:</div><div class='add'>+</div><div class='add'>+  /sys/fs/xfs/&lt;dev&gt;/zoned/</div><div class='add'>+</div><div class='add'>+  max_open_zones		(Min:  1  Default:  Varies  Max:  UINTMAX)</div><div class='add'>+	This read-only attribute exposes the maximum number of open zones</div><div class='add'>+	available for data placement. The value is determined at mount time and</div><div class='add'>+	is limited by the capabilities of the backing zoned device, file system</div><div class='add'>+	size and the max_open_zones mount option.</div><div class='add'>+</div><div class='add'>+  zonegc_low_space		(Min:  0  Default:  0  Max:  100)</div><div class='add'>+	Define a percentage for how much of the unused space that GC should keep</div><div class='add'>+	available for writing. A high value will reclaim more of the space</div><div class='add'>+	occupied by unused blocks, creating a larger buffer against write</div><div class='add'>+	bursts at the cost of increased write amplification.  Regardless</div><div class='add'>+	of this value, garbage collection will always aim to free a minimum</div><div class='add'>+	amount of blocks to keep max_open_zones open for data placement purposes.</div><div class='head'>diff --git a/Documentation/arch/arm64/cpu-feature-registers.rst b/Documentation/arch/arm64/cpu-feature-registers.rst<br/>index 253e9743de2f..add66afc7b03 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/arm64/cpu-feature-registers.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/arm64/cpu-feature-registers.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/arm64/cpu-feature-registers.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/arm64/cpu-feature-registers.rst</a></div><div class='hunk'>@@ -72,14 +72,15 @@ there are some issues with their usage.</div><div class='ctx'>     process could be migrated to another CPU by the time it uses the</div><div class='ctx'>     register value, unless the CPU affinity is set. Hence, there is no</div><div class='ctx'>     guarantee that the value reflects the processor that it is</div><div class='del'>-    currently executing on. The REVIDR is not exposed due to this</div><div class='del'>-    constraint, as REVIDR makes sense only in conjunction with the</div><div class='del'>-    MIDR. Alternately, MIDR_EL1 and REVIDR_EL1 are exposed via sysfs</div><div class='del'>-    at::</div><div class='add'>+    currently executing on. REVIDR and AIDR are not exposed due to this</div><div class='add'>+    constraint, as these registers only make sense in conjunction with</div><div class='add'>+    the MIDR. Alternately, MIDR_EL1, REVIDR_EL1, and AIDR_EL1 are exposed</div><div class='add'>+    via sysfs at::</div><div class='ctx'> </div><div class='ctx'> 	/sys/devices/system/cpu/cpu$ID/regs/identification/</div><div class='del'>-	                                              \- midr</div><div class='del'>-	                                              \- revidr</div><div class='add'>+	                                              \- midr_el1</div><div class='add'>+	                                              \- revidr_el1</div><div class='add'>+	                                              \- aidr_el1</div><div class='ctx'> </div><div class='ctx'> 3. Implementation</div><div class='ctx'> --------------------</div><div class='head'>diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst<br/>index f968c13b46a7..b18ef4064bc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/arm64/silicon-errata.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/arm64/silicon-errata.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/arm64/silicon-errata.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/arm64/silicon-errata.rst</a></div><div class='hunk'>@@ -57,6 +57,8 @@ stable kernels.</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | Ampere         | AmpereOne AC04  | AC04_CPU_10     | AMPERE_ERRATUM_AC03_CPU_38  |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| Ampere         | AmpereOne AC04  | AC04_CPU_23     | AMPERE_ERRATUM_AC04_CPU_23  |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A510     | #2457168        | ARM64_ERRATUM_2457168       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='head'>diff --git a/Documentation/arch/arm64/sme.rst b/Documentation/arch/arm64/sme.rst<br/>index b2fa01f85cb5..4cb38330e704 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/arm64/sme.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/arm64/sme.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/arm64/sme.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/arm64/sme.rst</a></div><div class='hunk'>@@ -69,8 +69,8 @@ model features for SME is included in Appendix A.</div><div class='ctx'>   vectors from 0 to VL/8-1 stored in the same endianness invariant format as is</div><div class='ctx'>   used for SVE vectors.</div><div class='ctx'> </div><div class='del'>-* On thread creation TPIDR2_EL0 is preserved unless CLONE_SETTLS is specified,</div><div class='del'>-  in which case it is set to 0.</div><div class='add'>+* On thread creation PSTATE.ZA and TPIDR2_EL0 are preserved unless CLONE_VM</div><div class='add'>+  is specified, in which case PSTATE.ZA is set to 0 and TPIDR2_EL0 is set to 0.</div><div class='ctx'> </div><div class='ctx'> 2.  Vector lengths</div><div class='ctx'> ------------------</div><div class='hunk'>@@ -115,7 +115,7 @@ be zeroed.</div><div class='ctx'> 5.  Signal handling</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-* Signal handlers are invoked with streaming mode and ZA disabled.</div><div class='add'>+* Signal handlers are invoked with PSTATE.SM=0, PSTATE.ZA=0, and TPIDR2_EL0=0.</div><div class='ctx'> </div><div class='ctx'> * A new signal frame record TPIDR2_MAGIC is added formatted as a struct</div><div class='ctx'>   tpidr2_context to allow access to TPIDR2_EL0 from signal handlers.</div><div class='hunk'>@@ -241,7 +241,7 @@ prctl(PR_SME_SET_VL, unsigned long arg)</div><div class='ctx'>       length, or calling PR_SME_SET_VL with the PR_SME_SET_VL_ONEXEC flag,</div><div class='ctx'>       does not constitute a change to the vector length for this purpose.</div><div class='ctx'> </div><div class='del'>-    * Changing the vector length causes PSTATE.ZA and PSTATE.SM to be cleared.</div><div class='add'>+    * Changing the vector length causes PSTATE.ZA to be cleared.</div><div class='ctx'>       Calling PR_SME_SET_VL with vl equal to the thread's current vector</div><div class='ctx'>       length, or calling PR_SME_SET_VL with the PR_SME_SET_VL_ONEXEC flag,</div><div class='ctx'>       does not constitute a change to the vector length for this purpose.</div><div class='head'>diff --git a/Documentation/arch/openrisc/openrisc_port.rst b/Documentation/arch/openrisc/openrisc_port.rst<br/>index 1565b9546e38..a8f307a3b499 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/openrisc/openrisc_port.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/openrisc/openrisc_port.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/openrisc/openrisc_port.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/openrisc/openrisc_port.rst</a></div><div class='hunk'>@@ -7,10 +7,10 @@ target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).</div><div class='ctx'> </div><div class='ctx'> For information about OpenRISC processors and ongoing development:</div><div class='ctx'> </div><div class='del'>-	=======		=============================</div><div class='add'>+	=======		==============================</div><div class='ctx'> 	website		https://openrisc.io</div><div class='del'>-	email		openrisc@lists.librecores.org</div><div class='del'>-	=======		=============================</div><div class='add'>+	email		linux-openrisc@vger.kernel.org</div><div class='add'>+	=======		==============================</div><div class='ctx'> </div><div class='ctx'> ---------------------------------------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -27,11 +27,11 @@ Toolchain binaries can be obtained from openrisc.io or our github releases page.</div><div class='ctx'> Instructions for building the different toolchains can be found on openrisc.io</div><div class='ctx'> or Stafford's toolchain build and release scripts.</div><div class='ctx'> </div><div class='del'>-	==========	=================================================</div><div class='del'>-	binaries	https://github.com/openrisc/or1k-gcc/releases</div><div class='add'>+	==========	==========================================================</div><div class='add'>+	binaries	https://github.com/stffrdhrn/or1k-toolchain-build/releases</div><div class='ctx'> 	toolchains	https://openrisc.io/software</div><div class='ctx'> 	building	https://github.com/stffrdhrn/or1k-toolchain-build</div><div class='del'>-	==========	=================================================</div><div class='add'>+	==========	==========================================================</div><div class='ctx'> </div><div class='ctx'> 2) Building</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arch/powerpc/htm.rst b/Documentation/arch/powerpc/htm.rst<br/>new file mode 100644<br/>index 000000000000..fcb4eb6306b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/powerpc/htm.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/powerpc/htm.rst</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+.. _htm:</div><div class='add'>+</div><div class='add'>+===================================</div><div class='add'>+HTM (Hardware Trace Macro)</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+Athira Rajeev, 2 Mar 2025</div><div class='add'>+</div><div class='add'>+.. contents::</div><div class='add'>+    :depth: 3</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Basic overview</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+H_HTM is used as an interface for executing Hardware Trace Macro (HTM)</div><div class='add'>+functions, including setup, configuration, control and dumping of the HTM data.</div><div class='add'>+For using HTM, it is required to setup HTM buffers and HTM operations can</div><div class='add'>+be controlled using the H_HTM hcall. The hcall can be invoked for any core/chip</div><div class='add'>+of the system from within a partition itself. To use this feature, a debugfs</div><div class='add'>+folder called "htmdump" is present under /sys/kernel/debug/powerpc.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+HTM debugfs example usage</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+.. code-block:: sh</div><div class='add'>+</div><div class='add'>+  #  ls /sys/kernel/debug/powerpc/htmdump/</div><div class='add'>+  coreindexonchip  htmcaps  htmconfigure  htmflags  htminfo  htmsetup</div><div class='add'>+  htmstart  htmstatus  htmtype  nodalchipindex  nodeindex  trace</div><div class='add'>+</div><div class='add'>+Details on each file:</div><div class='add'>+</div><div class='add'>+* nodeindex, nodalchipindex, coreindexonchip specifies which partition to configure the HTM for.</div><div class='add'>+* htmtype: specifies the type of HTM. Supported target is hardwareTarget.</div><div class='add'>+* trace: is to read the HTM data.</div><div class='add'>+* htmconfigure: Configure/Deconfigure the HTM. Writing 1 to the file will configure the trace, writing 0 to the file will do deconfigure.</div><div class='add'>+* htmstart: start/Stop the HTM. Writing 1 to the file will start the tracing, writing 0 to the file will stop the tracing.</div><div class='add'>+* htmstatus: get the status of HTM. This is needed to understand the HTM state after each operation.</div><div class='add'>+* htmsetup: set the HTM buffer size. Size of HTM buffer is in power of 2</div><div class='add'>+* htminfo: provides the system processor configuration details. This is needed to understand the appropriate values for nodeindex, nodalchipindex, coreindexonchip.</div><div class='add'>+* htmcaps : provides the HTM capabilities like minimum/maximum buffer size, what kind of tracing the HTM supports etc.</div><div class='add'>+* htmflags : allows to pass flags to hcall. Currently supports controlling the wrapping of HTM buffer.</div><div class='add'>+</div><div class='add'>+To see the system processor configuration details:</div><div class='add'>+</div><div class='add'>+.. code-block:: sh</div><div class='add'>+</div><div class='add'>+  # cat /sys/kernel/debug/powerpc/htmdump/htminfo &gt; htminfo_file</div><div class='add'>+</div><div class='add'>+The result can be interpreted using hexdump.</div><div class='add'>+</div><div class='add'>+To collect HTM traces for a partition represented by nodeindex as</div><div class='add'>+zero, nodalchipindex as 1 and coreindexonchip as 12</div><div class='add'>+</div><div class='add'>+.. code-block:: sh</div><div class='add'>+</div><div class='add'>+  # cd /sys/kernel/debug/powerpc/htmdump/</div><div class='add'>+  # echo 2 &gt; htmtype</div><div class='add'>+  # echo 33 &gt; htmsetup ( sets 8GB memory for HTM buffer, number is size in power of 2 )</div><div class='add'>+</div><div class='add'>+This requires a CEC reboot to get the HTM buffers allocated.</div><div class='add'>+</div><div class='add'>+.. code-block:: sh</div><div class='add'>+</div><div class='add'>+  # cd /sys/kernel/debug/powerpc/htmdump/</div><div class='add'>+  # echo 2 &gt; htmtype</div><div class='add'>+  # echo 0 &gt; nodeindex</div><div class='add'>+  # echo 1 &gt; nodalchipindex</div><div class='add'>+  # echo 12 &gt; coreindexonchip</div><div class='add'>+  # echo 1 &gt; htmflags     # to set noWrap for HTM buffers</div><div class='add'>+  # echo 1 &gt; htmconfigure # Configure the HTM</div><div class='add'>+  # echo 1 &gt; htmstart     # Start the HTM</div><div class='add'>+  # echo 0 &gt; htmstart     # Stop the HTM</div><div class='add'>+  # echo 0 &gt; htmconfigure # Deconfigure the HTM</div><div class='add'>+  # cat htmstatus         # Dump the status of HTM entries as data</div><div class='add'>+</div><div class='add'>+Above will set the htmtype and core details, followed by executing respective HTM operation.</div><div class='add'>+</div><div class='add'>+Read the HTM trace data</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+After starting the trace collection, run the workload</div><div class='add'>+of interest. Stop the trace collection after required period</div><div class='add'>+of time, and read the trace file.</div><div class='add'>+</div><div class='add'>+.. code-block:: sh</div><div class='add'>+</div><div class='add'>+  # cat /sys/kernel/debug/powerpc/htmdump/trace &gt; trace_file</div><div class='add'>+</div><div class='add'>+This trace file will contain the relevant instruction traces</div><div class='add'>+collected during the workload execution. And can be used as</div><div class='add'>+input file for trace decoders to understand data.</div><div class='add'>+</div><div class='add'>+Benefits of using HTM debugfs interface</div><div class='add'>+=======================================</div><div class='add'>+</div><div class='add'>+It is now possible to collect traces for a particular core/chip</div><div class='add'>+from within any partition of the system and decode it. Through</div><div class='add'>+this enablement, a small partition can be dedicated to collect the</div><div class='add'>+trace data and analyze to provide important information for Performance</div><div class='add'>+analysis, Software tuning, or Hardware debug.</div><div class='head'>diff --git a/Documentation/arch/powerpc/kvm-nested.rst b/Documentation/arch/powerpc/kvm-nested.rst<br/>index 5defd13cc6c1..574592505604 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/powerpc/kvm-nested.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/powerpc/kvm-nested.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/powerpc/kvm-nested.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/powerpc/kvm-nested.rst</a></div><div class='hunk'>@@ -208,13 +208,9 @@ associated values for each ID in the GSB::</div><div class='ctx'>       flags:</div><div class='ctx'>          Bit 0: getGuestWideState: Request state of the Guest instead</div><div class='ctx'>            of an individual VCPU.</div><div class='del'>-         Bit 1: takeOwnershipOfVcpuState Indicate the L1 is taking</div><div class='del'>-           over ownership of the VCPU state and that the L0 can free</div><div class='del'>-           the storage holding the state. The VCPU state will need to</div><div class='del'>-           be returned to the Hypervisor via H_GUEST_SET_STATE prior</div><div class='del'>-           to H_GUEST_RUN_VCPU being called for this VCPU. The data</div><div class='del'>-           returned in the dataBuffer is in a Hypervisor internal</div><div class='del'>-           format.</div><div class='add'>+         Bit 1: getHostWideState: Request stats of the Host. This causes</div><div class='add'>+           the guestId and vcpuId parameters to be ignored and attempting</div><div class='add'>+           to get the VCPU/Guest state will cause an error.</div><div class='ctx'>          Bits 2-63: Reserved</div><div class='ctx'>       guestId: ID obtained from H_GUEST_CREATE</div><div class='ctx'>       vcpuId: ID of the vCPU pass to H_GUEST_CREATE_VCPU</div><div class='hunk'>@@ -406,9 +402,10 @@ the partition like the timebase offset and partition scoped page</div><div class='ctx'> table information.</div><div class='ctx'> </div><div class='ctx'> +--------+-------+----+--------+----------------------------------+</div><div class='del'>-|   ID   | Size  | RW | Thread | Details                          |</div><div class='del'>-|        | Bytes |    | Guest  |                                  |</div><div class='del'>-|        |       |    | Scope  |                                  |</div><div class='add'>+|   ID   | Size  | RW |(H)ost  | Details                          |</div><div class='add'>+|        | Bytes |    |(G)uest |                                  |</div><div class='add'>+|        |       |    |(T)hread|                                  |</div><div class='add'>+|        |       |    |Scope   |                                  |</div><div class='ctx'> +========+=======+====+========+==================================+</div><div class='ctx'> | 0x0000 |       | RW |   TG   | NOP element                      |</div><div class='ctx'> +--------+-------+----+--------+----------------------------------+</div><div class='hunk'>@@ -434,6 +431,29 @@ table information.</div><div class='ctx'> |        |       |    |        |- 0x8 Table size.                 |</div><div class='ctx'> +--------+-------+----+--------+----------------------------------+</div><div class='ctx'> | 0x0007-|       |    |        | Reserved                         |</div><div class='add'>+| 0x07FF |       |    |        |                                  |</div><div class='add'>++--------+-------+----+--------+----------------------------------+</div><div class='add'>+| 0x0800 | 0x08  | R  |   H    | Current usage in bytes of the    |</div><div class='add'>+|        |       |    |        | L0's Guest Management Space      |</div><div class='add'>+|        |       |    |        | for an L1-Lpar.                  |</div><div class='add'>++--------+-------+----+--------+----------------------------------+</div><div class='add'>+| 0x0801 | 0x08  | R  |   H    | Max bytes available in the       |</div><div class='add'>+|        |       |    |        | L0's Guest Management Space for  |</div><div class='add'>+|        |       |    |        | an L1-Lpar                       |</div><div class='add'>++--------+-------+----+--------+----------------------------------+</div><div class='add'>+| 0x0802 | 0x08  | R  |   H    | Current usage in bytes of the    |</div><div class='add'>+|        |       |    |        | L0's Guest Page Table Management |</div><div class='add'>+|        |       |    |        | Space for an L1-Lpar             |</div><div class='add'>++--------+-------+----+--------+----------------------------------+</div><div class='add'>+| 0x0803 | 0x08  | R  |   H    | Max bytes available in the L0's  |</div><div class='add'>+|        |       |    |        | Guest Page Table Management      |</div><div class='add'>+|        |       |    |        | Space for an L1-Lpar             |</div><div class='add'>++--------+-------+----+--------+----------------------------------+</div><div class='add'>+| 0x0804 | 0x08  | R  |   H    | Cumulative Reclaimed bytes from  |</div><div class='add'>+|        |       |    |        | L0 Guest's Page Table Management |</div><div class='add'>+|        |       |    |        | Space due to overcommit          |</div><div class='add'>++--------+-------+----+--------+----------------------------------+</div><div class='add'>+| 0x0805-|       |    |        | Reserved                         |</div><div class='ctx'> | 0x0BFF |       |    |        |                                  |</div><div class='ctx'> +--------+-------+----+--------+----------------------------------+</div><div class='ctx'> | 0x0C00 | 0x10  | RW |   T    |Run vCPU Input Buffer:            |</div><div class='head'>diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst<br/>index 53607d962653..f60bf5991755 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/riscv/hwprobe.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/riscv/hwprobe.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/riscv/hwprobe.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/riscv/hwprobe.rst</a></div><div class='hunk'>@@ -51,7 +51,7 @@ The following keys are defined:</div><div class='ctx'> * :c:macro:`RISCV_HWPROBE_KEY_MARCHID`: Contains the value of ``marchid``, as</div><div class='ctx'>   defined by the RISC-V privileged architecture specification.</div><div class='ctx'> </div><div class='del'>-* :c:macro:`RISCV_HWPROBE_KEY_MIMPLID`: Contains the value of ``mimplid``, as</div><div class='add'>+* :c:macro:`RISCV_HWPROBE_KEY_MIMPID`: Contains the value of ``mimpid``, as</div><div class='ctx'>   defined by the RISC-V privileged architecture specification.</div><div class='ctx'> </div><div class='ctx'> * :c:macro:`RISCV_HWPROBE_KEY_BASE_BEHAVIOR`: A bitmask containing the base</div><div class='head'>diff --git a/Documentation/arch/x86/amd-debugging.rst b/Documentation/arch/x86/amd-debugging.rst<br/>new file mode 100644<br/>index 000000000000..d92bf59d62c7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/amd-debugging.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/x86/amd-debugging.rst</a></div><div class='hunk'>@@ -0,0 +1,368 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Debugging AMD Zen systems</div><div class='add'>++++++++++++++++++++++++++</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+This document describes techniques that are useful for debugging issues with</div><div class='add'>+AMD Zen systems.  It is intended for use by developers and technical users</div><div class='add'>+to help identify and resolve issues.</div><div class='add'>+</div><div class='add'>+S3 vs s2idle</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+On AMD systems, it's not possible to simultaneously support suspend-to-RAM (S3)</div><div class='add'>+and suspend-to-idle (s2idle).  To confirm which mode your system supports you</div><div class='add'>+can look at ``cat /sys/power/mem_sleep``.  If it shows ``s2idle [deep]`` then</div><div class='add'>+*S3* is supported.  If it shows ``[s2idle]`` then *s2idle* is</div><div class='add'>+supported.</div><div class='add'>+</div><div class='add'>+On systems that support *S3*, the firmware will be utilized to put all hardware into</div><div class='add'>+the appropriate low power state.</div><div class='add'>+</div><div class='add'>+On systems that support *s2idle*, the kernel will be responsible for transitioning devices</div><div class='add'>+into the appropriate low power state. When all devices are in the appropriate low</div><div class='add'>+power state, the hardware will transition into a hardware sleep state.</div><div class='add'>+</div><div class='add'>+After a suspend cycle you can tell how much time was spent in a hardware sleep</div><div class='add'>+state by looking at ``cat /sys/power/suspend_stats/last_hw_sleep``.</div><div class='add'>+</div><div class='add'>+This flowchart explains how the AMD s2idle suspend flow works.</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: suspend.svg</div><div class='add'>+</div><div class='add'>+This flowchart explains how the amd s2idle resume flow works.</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: resume.svg</div><div class='add'>+</div><div class='add'>+s2idle debugging tool</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+As there are a lot of places that problems can occur, a debugging tool has been</div><div class='add'>+created at</div><div class='add'>+`amd-debug-tools &lt;https://git.kernel.org/pub/scm/linux/kernel/git/superm1/amd-debug-tools.git/about/&gt;`_</div><div class='add'>+that can help test for common problems and offer suggestions.</div><div class='add'>+</div><div class='add'>+If you have an s2idle issue, it's best to start with this and follow instructions</div><div class='add'>+from its findings.  If you continue to have an issue, raise a bug with the</div><div class='add'>+report generated from this script to</div><div class='add'>+`drm/amd gitlab &lt;https://gitlab.freedesktop.org/drm/amd/-/issues/new?issuable_template=s2idle_BUG_TEMPLATE&gt;`_.</div><div class='add'>+</div><div class='add'>+Spurious s2idle wakeups from an IRQ</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+Spurious wakeups will generally have an IRQ set to ``/sys/power/pm_wakeup_irq``.</div><div class='add'>+This can be matched to ``/proc/interrupts`` to determine what device woke the system.</div><div class='add'>+</div><div class='add'>+If this isn't enough to debug the problem, then the following sysfs files</div><div class='add'>+can be set to add more verbosity to the wakeup process: ::</div><div class='add'>+</div><div class='add'>+  # echo 1 | sudo tee /sys/power/pm_debug_messages</div><div class='add'>+  # echo 1 | sudo tee /sys/power/pm_print_times</div><div class='add'>+</div><div class='add'>+After making those changes, the kernel will display messages that can</div><div class='add'>+be traced back to kernel s2idle loop code as well as display any active</div><div class='add'>+GPIO sources while waking up.</div><div class='add'>+</div><div class='add'>+If the wakeup is caused by the ACPI SCI, additional ACPI debugging may be</div><div class='add'>+needed.  These commands can enable additional trace data: ::</div><div class='add'>+</div><div class='add'>+  # echo enable | sudo tee /sys/module/acpi/parameters/trace_state</div><div class='add'>+  # echo 1 | sudo tee /sys/module/acpi/parameters/aml_debug_output</div><div class='add'>+  # echo 0x0800000f | sudo tee /sys/module/acpi/parameters/debug_level</div><div class='add'>+  # echo 0xffff0000 | sudo tee /sys/module/acpi/parameters/debug_layer</div><div class='add'>+</div><div class='add'>+Spurious s2idle wakeups from a GPIO</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+If a GPIO is active when waking up the system ideally you would look at the</div><div class='add'>+schematic to determine what device it is associated with. If the schematic</div><div class='add'>+is not available, another tactic is to look at the ACPI _EVT() entry</div><div class='add'>+to determine what device is notified when that GPIO is active.</div><div class='add'>+</div><div class='add'>+For a hypothetical example, say that GPIO 59 woke up the system.  You can</div><div class='add'>+look at the SSDT to determine what device is notified when GPIO 59 is active.</div><div class='add'>+</div><div class='add'>+First convert the GPIO number into hex. ::</div><div class='add'>+</div><div class='add'>+  $ python3 -c "print(hex(59))"</div><div class='add'>+  0x3b</div><div class='add'>+</div><div class='add'>+Next determine which ACPI table has the ``_EVT`` entry. For example: ::</div><div class='add'>+</div><div class='add'>+  $ sudo grep EVT /sys/firmware/acpi/tables/SSDT*</div><div class='add'>+  grep: /sys/firmware/acpi/tables/SSDT27: binary file matches</div><div class='add'>+</div><div class='add'>+Decode this table::</div><div class='add'>+</div><div class='add'>+  $ sudo cp /sys/firmware/acpi/tables/SSDT27 .</div><div class='add'>+  $ sudo iasl -d SSDT27</div><div class='add'>+</div><div class='add'>+Then look at the table and find the matching entry for GPIO 0x3b. ::</div><div class='add'>+</div><div class='add'>+  Case (0x3B)</div><div class='add'>+  {</div><div class='add'>+      M000 (0x393B)</div><div class='add'>+      M460 ("    Notify (\\_SB.PCI0.GP17.XHC1, 0x02)\n", Zero, Zero, Zero, Zero, Zero, Zero)</div><div class='add'>+      Notify (\_SB.PCI0.GP17.XHC1, 0x02) // Device Wake</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+You can see in this case that the device ``\_SB.PCI0.GP17.XHC1`` is notified</div><div class='add'>+when GPIO 59 is active. It's obvious this is an XHCI controller, but to go a</div><div class='add'>+step further you can figure out which XHCI controller it is by matching it to</div><div class='add'>+ACPI.::</div><div class='add'>+</div><div class='add'>+  $ grep "PCI0.GP17.XHC1" /sys/bus/acpi/devices/*/path</div><div class='add'>+  /sys/bus/acpi/devices/device:2d/path:\_SB_.PCI0.GP17.XHC1</div><div class='add'>+  /sys/bus/acpi/devices/device:2e/path:\_SB_.PCI0.GP17.XHC1.RHUB</div><div class='add'>+  /sys/bus/acpi/devices/device:2f/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT1</div><div class='add'>+  /sys/bus/acpi/devices/device:30/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT1.CAM0</div><div class='add'>+  /sys/bus/acpi/devices/device:31/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT1.CAM1</div><div class='add'>+  /sys/bus/acpi/devices/device:32/path:\_SB_.PCI0.GP17.XHC1.RHUB.PRT2</div><div class='add'>+  /sys/bus/acpi/devices/LNXPOWER:0d/path:\_SB_.PCI0.GP17.XHC1.PWRS</div><div class='add'>+</div><div class='add'>+Here you can see it matches to ``device:2d``. Look at the ``physical_node``</div><div class='add'>+to determine what PCI device that actually is. ::</div><div class='add'>+</div><div class='add'>+  $ ls -l /sys/bus/acpi/devices/device:2d/physical_node</div><div class='add'>+  lrwxrwxrwx 1 root root 0 Feb 12 13:22 /sys/bus/acpi/devices/device:2d/physical_node -&gt; ../../../../../pci0000:00/0000:00:08.1/0000:c2:00.4</div><div class='add'>+</div><div class='add'>+So there you have it: the PCI device associated with this GPIO wakeup was ``0000:c2:00.4``.</div><div class='add'>+</div><div class='add'>+The ``amd_s2idle.py`` script will capture most of these artifacts for you.</div><div class='add'>+</div><div class='add'>+s2idle PM debug messages</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+During the s2idle flow on AMD systems, the ACPI LPS0 driver is responsible</div><div class='add'>+to check all uPEP constraints.  Failing uPEP constraints does not prevent</div><div class='add'>+s0i3 entry.  This means that if some constraints are not met, it is possible</div><div class='add'>+the kernel may attempt to enter s2idle even if there are some known issues.</div><div class='add'>+</div><div class='add'>+To activate PM debugging, either specify ``pm_debug_messagess`` kernel</div><div class='add'>+command-line option at boot or write to ``/sys/power/pm_debug_messages``.</div><div class='add'>+Unmet constraints will be displayed in the kernel log and can be</div><div class='add'>+viewed by logging tools that process kernel ring buffer like ``dmesg`` or</div><div class='add'>+``journalctl``."</div><div class='add'>+</div><div class='add'>+If the system freezes on entry/exit before these messages are flushed, a</div><div class='add'>+useful debugging tactic is to unbind the ``amd_pmc`` driver to prevent</div><div class='add'>+notification to the platform to start s0i3 entry.  This will stop the</div><div class='add'>+system from freezing on entry or exit and let you view all the failed</div><div class='add'>+constraints. ::</div><div class='add'>+</div><div class='add'>+  cd /sys/bus/platform/drivers/amd_pmc</div><div class='add'>+  ls | grep AMD | sudo tee unbind</div><div class='add'>+</div><div class='add'>+After doing this, run the suspend cycle and look specifically for errors around: ::</div><div class='add'>+</div><div class='add'>+  ACPI: LPI: Constraint not met; min power state:%s current power state:%s</div><div class='add'>+</div><div class='add'>+Historical examples of s2idle issues</div><div class='add'>+====================================</div><div class='add'>+</div><div class='add'>+To help understand the types of issues that can occur and how to debug them,</div><div class='add'>+here are some historical examples of s2idle issues that have been resolved.</div><div class='add'>+</div><div class='add'>+Core offlining</div><div class='add'>+--------------</div><div class='add'>+An end user had reported that taking a core offline would prevent the system</div><div class='add'>+from properly entering s0i3.  This was debugged using internal AMD tools</div><div class='add'>+to capture and display a stream of metrics from the hardware showing what changed</div><div class='add'>+when a core was offlined.  It was determined that the hardware didn't get</div><div class='add'>+notification the offline cores were in the deepest state, and so it prevented</div><div class='add'>+CPU from going into the deepest state. The issue was debugged to a missing</div><div class='add'>+command to put cores into C3 upon offline.</div><div class='add'>+</div><div class='add'>+`commit d6b88ce2eb9d2 ("ACPI: processor idle: Allow playing dead in C3 state") &lt;https://git.kernel.org/torvalds/c/d6b88ce2eb9d2&gt;`_</div><div class='add'>+</div><div class='add'>+Corruption after resume</div><div class='add'>+-----------------------</div><div class='add'>+A big problem that occurred with Rembrandt was that there was graphical</div><div class='add'>+corruption after resume.  This happened because of a misalignment of PSP</div><div class='add'>+and driver responsibility.  The PSP will save and restore DMCUB, but the</div><div class='add'>+driver assumed it needed to reset DMCUB on resume.</div><div class='add'>+This actually was a misalignment for earlier silicon as well, but was not</div><div class='add'>+observed.</div><div class='add'>+</div><div class='add'>+`commit 79d6b9351f086 ("drm/amd/display: Don't reinitialize DMCUB on s0ix resume") &lt;https://git.kernel.org/torvalds/c/79d6b9351f086&gt;`_</div><div class='add'>+</div><div class='add'>+Back to Back suspends fail</div><div class='add'>+--------------------------</div><div class='add'>+When using a wakeup source that triggers the IRQ to wakeup, a bug in the</div><div class='add'>+pinctrl-amd driver may capture the wrong state of the IRQ and prevent the</div><div class='add'>+system going back to sleep properly.</div><div class='add'>+</div><div class='add'>+`commit b8c824a869f22 ("pinctrl: amd: Don't save/restore interrupt status and wake status bits") &lt;https://git.kernel.org/torvalds/c/b8c824a869f22&gt;`_</div><div class='add'>+</div><div class='add'>+Spurious timer based wakeup after 5 minutes</div><div class='add'>+-------------------------------------------</div><div class='add'>+The HPET was being used to program the wakeup source for the system, however</div><div class='add'>+this was causing a spurious wakeup after 5 minutes.  The correct alarm to use</div><div class='add'>+was the ACPI alarm.</div><div class='add'>+</div><div class='add'>+`commit 3d762e21d5637 ("rtc: cmos: Use ACPI alarm for non-Intel x86 systems too") &lt;https://git.kernel.org/torvalds/c/3d762e21d5637&gt;`_</div><div class='add'>+</div><div class='add'>+Disk disappears after resume</div><div class='add'>+----------------------------</div><div class='add'>+After resuming from s2idle, the NVME disk would disappear.  This was due to the</div><div class='add'>+BIOS not specifying the _DSD StorageD3Enable property.  This caused the NVME</div><div class='add'>+driver not to put the disk into the expected state at suspend and to fail</div><div class='add'>+on resume.</div><div class='add'>+</div><div class='add'>+`commit e79a10652bbd3 ("ACPI: x86: Force StorageD3Enable on more products") &lt;https://git.kernel.org/torvalds/c/e79a10652bbd3&gt;`_</div><div class='add'>+</div><div class='add'>+Spurious IRQ1</div><div class='add'>+-------------</div><div class='add'>+A number of Renoir, Lucienne, Cezanne, &amp; Barcelo platforms have a</div><div class='add'>+platform firmware bug where IRQ1 is triggered during s0i3 resume.</div><div class='add'>+</div><div class='add'>+This was fixed in the platform firmware, but a number of systems didn't</div><div class='add'>+receive any more platform firmware updates.</div><div class='add'>+</div><div class='add'>+`commit 8e60615e89321 ("platform/x86/amd: pmc: Disable IRQ1 wakeup for RN/CZN") &lt;https://git.kernel.org/torvalds/c/8e60615e89321&gt;`_</div><div class='add'>+</div><div class='add'>+Hardware timeout</div><div class='add'>+----------------</div><div class='add'>+The hardware performs many actions besides accepting the values from</div><div class='add'>+amd-pmc driver.  As the communication path with the hardware is a mailbox,</div><div class='add'>+it's possible that it might not respond quickly enough.</div><div class='add'>+This issue manifested as a failure to suspend: ::</div><div class='add'>+</div><div class='add'>+  PM: dpm_run_callback(): acpi_subsys_suspend_noirq+0x0/0x50 returns -110</div><div class='add'>+  amd_pmc AMDI0005:00: PM: failed to suspend noirq: error -110</div><div class='add'>+</div><div class='add'>+The timing problem was identified by comparing the values of the idle mask.</div><div class='add'>+</div><div class='add'>+`commit 3c3c8e88c8712 ("platform/x86: amd-pmc: Increase the response register timeout") &lt;https://git.kernel.org/torvalds/c/3c3c8e88c8712&gt;`_</div><div class='add'>+</div><div class='add'>+Failed to reach hardware sleep state with panel on</div><div class='add'>+--------------------------------------------------</div><div class='add'>+On some Strix systems certain panels were observed to block the system from</div><div class='add'>+entering a hardware sleep state if the internal panel was on during the sequence.</div><div class='add'>+</div><div class='add'>+Even though the panel got turned off during suspend it exposed a timing problem</div><div class='add'>+where an interrupt caused the display hardware to wake up and block low power</div><div class='add'>+state entry.</div><div class='add'>+</div><div class='add'>+`commit 40b8c14936bd2 ("drm/amd/display: Disable unneeded hpd interrupts during dm_init") &lt;https://git.kernel.org/torvalds/c/40b8c14936bd2&gt;`_</div><div class='add'>+</div><div class='add'>+Runtime power consumption issues</div><div class='add'>+================================</div><div class='add'>+</div><div class='add'>+Runtime power consumption is influenced by many factors, including but not</div><div class='add'>+limited to the configuration of the PCIe Active State Power Management (ASPM),</div><div class='add'>+the display brightness, the EPP policy of the CPU, and the power management</div><div class='add'>+of the devices.</div><div class='add'>+</div><div class='add'>+ASPM</div><div class='add'>+----</div><div class='add'>+For the best runtime power consumption, ASPM should be programmed as intended</div><div class='add'>+by the BIOS from the hardware vendor.  To accomplish this the Linux kernel</div><div class='add'>+should be compiled with ``CONFIG_PCIEASPM_DEFAULT`` set to ``y`` and the</div><div class='add'>+sysfs file ``/sys/module/pcie_aspm/parameters/policy`` should not be modified.</div><div class='add'>+</div><div class='add'>+Most notably, if L1.2 is not configured properly for any devices, the SoC</div><div class='add'>+will not be able to enter the deepest idle state.</div><div class='add'>+</div><div class='add'>+EPP Policy</div><div class='add'>+----------</div><div class='add'>+The ``energy_performance_preference`` sysfs file can be used to set a bias</div><div class='add'>+of efficiency or performance for a CPU.  This has a direct relationship on</div><div class='add'>+the battery life when more heavily biased towards performance.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+BIOS debug messages</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+Most OEM machines don't have a serial UART for outputting kernel or BIOS</div><div class='add'>+debug messages. However BIOS debug messages are useful for understanding</div><div class='add'>+both BIOS bugs and bugs with the Linux kernel drivers that call BIOS AML.</div><div class='add'>+</div><div class='add'>+As the BIOS on most OEM AMD systems are based off an AMD reference BIOS,</div><div class='add'>+the infrastructure used for exporting debugging messages is often the same</div><div class='add'>+as AMD reference BIOS.</div><div class='add'>+</div><div class='add'>+Manually Parsing</div><div class='add'>+----------------</div><div class='add'>+There is generally an ACPI method ``\M460`` that different paths of the AML</div><div class='add'>+will call to emit a message to the BIOS serial log. This method takes</div><div class='add'>+7 arguments, with the first being a string and the rest being optional</div><div class='add'>+integers::</div><div class='add'>+</div><div class='add'>+  Method (M460, 7, Serialized)</div><div class='add'>+</div><div class='add'>+Here is an example of a string that BIOS AML may call out using ``\M460``::</div><div class='add'>+</div><div class='add'>+  M460 ("  OEM-ASL-PCIe Address (0x%X)._REG (%d %d)  PCSA = %d\n", DADR, Arg0, Arg1, PCSA, Zero, Zero)</div><div class='add'>+</div><div class='add'>+Normally when executed, the ``\M460`` method would populate the additional</div><div class='add'>+arguments into the string.  In order to get these messages from the Linux</div><div class='add'>+kernel a hook has been added into ACPICA that can capture the *arguments*</div><div class='add'>+sent to ``\M460`` and print them to the kernel ring buffer.</div><div class='add'>+For example the following message could be emitted into kernel ring buffer::</div><div class='add'>+</div><div class='add'>+  extrace-0174 ex_trace_args         :  "  OEM-ASL-PCIe Address (0x%X)._REG (%d %d)  PCSA = %d\n", ec106000, 2, 1, 1, 0, 0</div><div class='add'>+</div><div class='add'>+In order to get these messages, you need to compile with ``CONFIG_ACPI_DEBUG``</div><div class='add'>+and then turn on the following ACPICA tracing parameters.</div><div class='add'>+This can be done either on the kernel command line or at runtime:</div><div class='add'>+</div><div class='add'>+* ``acpi.trace_method_name=\M460``</div><div class='add'>+* ``acpi.trace_state=method``</div><div class='add'>+</div><div class='add'>+NOTE: These can be very noisy at bootup. If you turn these parameters on</div><div class='add'>+the kernel command, please also consider turning up ``CONFIG_LOG_BUF_SHIFT``</div><div class='add'>+to a larger size such as 17 to avoid losing early boot messages.</div><div class='add'>+</div><div class='add'>+Tool assisted Parsing</div><div class='add'>+---------------------</div><div class='add'>+As mentioned above, parsing by hand can be tedious, especially with a lot of</div><div class='add'>+messages.  To help with this, a tool has been created at</div><div class='add'>+`amd-debug-tools &lt;https://git.kernel.org/pub/scm/linux/kernel/git/superm1/amd-debug-tools.git/about/&gt;`_</div><div class='add'>+to help parse the messages.</div><div class='add'>+</div><div class='add'>+Random reboot issues</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+When a random reboot occurs, the high-level reason for the reboot is stored</div><div class='add'>+in a register that will persist onto the next boot.</div><div class='add'>+</div><div class='add'>+There are 6 classes of reasons for the reboot:</div><div class='add'>+ * Software induced</div><div class='add'>+ * Power state transition</div><div class='add'>+ * Pin induced</div><div class='add'>+ * Hardware induced</div><div class='add'>+ * Remote reset</div><div class='add'>+ * Internal CPU event</div><div class='add'>+</div><div class='add'>+.. csv-table::</div><div class='add'>+   :header: "Bit", "Type", "Reason"</div><div class='add'>+   :align: left</div><div class='add'>+</div><div class='add'>+   "0",  "Pin",      "thermal pin BP_THERMTRIP_L was tripped"</div><div class='add'>+   "1",  "Pin",      "power button was pressed for 4 seconds"</div><div class='add'>+   "2",  "Pin",      "shutdown pin was tripped"</div><div class='add'>+   "4",  "Remote",   "remote ASF power off command was received"</div><div class='add'>+   "9",  "Internal", "internal CPU thermal limit was tripped"</div><div class='add'>+   "16", "Pin",      "system reset pin BP_SYS_RST_L was tripped"</div><div class='add'>+   "17", "Software", "software issued PCI reset"</div><div class='add'>+   "18", "Software", "software wrote 0x4 to reset control register 0xCF9"</div><div class='add'>+   "19", "Software", "software wrote 0x6 to reset control register 0xCF9"</div><div class='add'>+   "20", "Software", "software wrote 0xE to reset control register 0xCF9"</div><div class='add'>+   "21", "ACPI-state", "ACPI power state transition occurred"</div><div class='add'>+   "22", "Pin",      "keyboard reset pin KB_RST_L was tripped"</div><div class='add'>+   "23", "Internal", "internal CPU shutdown event occurred"</div><div class='add'>+   "24", "Hardware", "system failed to boot before failed boot timer expired"</div><div class='add'>+   "25", "Hardware", "hardware watchdog timer expired"</div><div class='add'>+   "26", "Remote",   "remote ASF reset command was received"</div><div class='add'>+   "27", "Internal", "an uncorrected error caused a data fabric sync flood event"</div><div class='add'>+   "29", "Internal", "FCH and MP1 failed warm reset handshake"</div><div class='add'>+   "30", "Internal", "a parity error occurred"</div><div class='add'>+   "31", "Internal", "a software sync flood event occurred"</div><div class='add'>+</div><div class='add'>+This information is read by the kernel at bootup and printed into</div><div class='add'>+the syslog. When a random reboot occurs this message can be helpful</div><div class='add'>+to determine the next component to debug.</div><div class='head'>diff --git a/Documentation/arch/x86/amd_hsmp.rst b/Documentation/arch/x86/amd_hsmp.rst<br/>index 2fd917638e42..a094f55c10b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/amd_hsmp.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/amd_hsmp.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/amd_hsmp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/x86/amd_hsmp.rst</a></div><div class='hunk'>@@ -71,6 +71,28 @@ Note: lseek() is not supported as entire metrics table is read.</div><div class='ctx'> Metrics table definitions will be documented as part of Public PPR.</div><div class='ctx'> The same is defined in the amd_hsmp.h header.</div><div class='ctx'> </div><div class='add'>+2. HSMP telemetry sysfs files</div><div class='add'>+</div><div class='add'>+Following sysfs files are available at /sys/devices/platform/AMDI0097:0X/.</div><div class='add'>+</div><div class='add'>+* c0_residency_input: Percentage of cores in C0 state.</div><div class='add'>+* prochot_status: Reports 1 if the processor is at thermal threshold value,</div><div class='add'>+  0 otherwise.</div><div class='add'>+* smu_fw_version: SMU firmware version.</div><div class='add'>+* protocol_version: HSMP interface version.</div><div class='add'>+* ddr_max_bw: Theoretical maximum DDR bandwidth in GB/s.</div><div class='add'>+* ddr_utilised_bw_input: Current utilized DDR bandwidth in GB/s.</div><div class='add'>+* ddr_utilised_bw_perc_input(%): Percentage of current utilized DDR bandwidth.</div><div class='add'>+* mclk_input: Memory clock in MHz.</div><div class='add'>+* fclk_input: Fabric clock in MHz.</div><div class='add'>+* clk_fmax: Maximum frequency of socket in MHz.</div><div class='add'>+* clk_fmin: Minimum frequency of socket in MHz.</div><div class='add'>+* cclk_freq_limit_input: Core clock frequency limit per socket in MHz.</div><div class='add'>+* pwr_current_active_freq_limit: Current active frequency limit of socket</div><div class='add'>+  in MHz.</div><div class='add'>+* pwr_current_active_freq_limit_source: Source of current active frequency</div><div class='add'>+  limit.</div><div class='add'>+</div><div class='ctx'> ACPI device object format</div><div class='ctx'> =========================</div><div class='ctx'> The ACPI object format expected from the amd_hsmp driver</div><div class='hunk'>@@ -116,6 +138,14 @@ for socket with ID00 is given below::</div><div class='ctx'> 			})</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+HSMP HWMON interface</div><div class='add'>+====================</div><div class='add'>+HSMP power sensors are registered with the hwmon interface. A separate hwmon</div><div class='add'>+directory is created for each socket and the following files are generated</div><div class='add'>+within the hwmon directory.</div><div class='add'>+- power1_input (read only)</div><div class='add'>+- power1_cap_max (read only)</div><div class='add'>+- power1_cap (read, write)</div><div class='ctx'> </div><div class='ctx'> An example</div><div class='ctx'> ==========</div><div class='head'>diff --git a/Documentation/arch/x86/cpuinfo.rst b/Documentation/arch/x86/cpuinfo.rst<br/>index 6ef426a52cdc..dd8b7806944e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/cpuinfo.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/cpuinfo.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/cpuinfo.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/x86/cpuinfo.rst</a></div><div class='hunk'>@@ -79,8 +79,9 @@ feature flags.</div><div class='ctx'> How are feature flags created?</div><div class='ctx'> ==============================</div><div class='ctx'> </div><div class='del'>-a: Feature flags can be derived from the contents of CPUID leaves.</div><div class='del'>-------------------------------------------------------------------</div><div class='add'>+Feature flags can be derived from the contents of CPUID leaves</div><div class='add'>+--------------------------------------------------------------</div><div class='add'>+</div><div class='ctx'> These feature definitions are organized mirroring the layout of CPUID</div><div class='ctx'> leaves and grouped in words with offsets as mapped in enum cpuid_leafs</div><div class='ctx'> in cpufeatures.h (see arch/x86/include/asm/cpufeatures.h for details).</div><div class='hunk'>@@ -89,8 +90,9 @@ cpufeatures.h, and if it is detected at run time, the flags will be</div><div class='ctx'> displayed accordingly in /proc/cpuinfo. For example, the flag "avx2"</div><div class='ctx'> comes from X86_FEATURE_AVX2 in cpufeatures.h.</div><div class='ctx'> </div><div class='del'>-b: Flags can be from scattered CPUID-based features.</div><div class='del'>-----------------------------------------------------</div><div class='add'>+Flags can be from scattered CPUID-based features</div><div class='add'>+------------------------------------------------</div><div class='add'>+</div><div class='ctx'> Hardware features enumerated in sparsely populated CPUID leaves get</div><div class='ctx'> software-defined values. Still, CPUID needs to be queried to determine</div><div class='ctx'> if a given feature is present. This is done in init_scattered_cpuid_features().</div><div class='hunk'>@@ -104,8 +106,9 @@ has only one feature and would waste 31 bits of space in the x86_capability[]</div><div class='ctx'> array. Since there is a struct cpuinfo_x86 for each possible CPU, the wasted</div><div class='ctx'> memory is not trivial.</div><div class='ctx'> </div><div class='del'>-c: Flags can be created synthetically under certain conditions for hardware features.</div><div class='del'>--------------------------------------------------------------------------------------</div><div class='add'>+Flags can be created synthetically under certain conditions for hardware features</div><div class='add'>+---------------------------------------------------------------------------------</div><div class='add'>+</div><div class='ctx'> Examples of conditions include whether certain features are present in</div><div class='ctx'> MSR_IA32_CORE_CAPS or specific CPU models are identified. If the needed</div><div class='ctx'> conditions are met, the features are enabled by the set_cpu_cap or</div><div class='hunk'>@@ -114,8 +117,8 @@ the feature X86_FEATURE_SPLIT_LOCK_DETECT will be enabled and</div><div class='ctx'> "split_lock_detect" will be displayed. The flag "ring3mwait" will be</div><div class='ctx'> displayed only when running on INTEL_XEON_PHI_[KNL|KNM] processors.</div><div class='ctx'> </div><div class='del'>-d: Flags can represent purely software features.</div><div class='del'>-------------------------------------------------</div><div class='add'>+Flags can represent purely software features</div><div class='add'>+--------------------------------------------</div><div class='ctx'> These flags do not represent hardware features. Instead, they represent a</div><div class='ctx'> software feature implemented in the kernel. For example, Kernel Page Table</div><div class='ctx'> Isolation is purely software feature and its feature flag X86_FEATURE_PTI is</div><div class='hunk'>@@ -130,14 +133,18 @@ x86_cap/bug_flags[] arrays in kernel/cpu/capflags.c. The names in the</div><div class='ctx'> resulting x86_cap/bug_flags[] are used to populate /proc/cpuinfo. The naming</div><div class='ctx'> of flags in the x86_cap/bug_flags[] are as follows:</div><div class='ctx'> </div><div class='del'>-a: The name of the flag is from the string in X86_FEATURE_&lt;name&gt; by default.</div><div class='del'>-----------------------------------------------------------------------------</div><div class='del'>-By default, the flag &lt;name&gt; in /proc/cpuinfo is extracted from the respective</div><div class='del'>-X86_FEATURE_&lt;name&gt; in cpufeatures.h. For example, the flag "avx2" is from</div><div class='del'>-X86_FEATURE_AVX2.</div><div class='add'>+Flags do not appear by default in /proc/cpuinfo</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+Feature flags are omitted by default from /proc/cpuinfo as it does not make</div><div class='add'>+sense for the feature to be exposed to userspace in most cases. For example,</div><div class='add'>+X86_FEATURE_ALWAYS is defined in cpufeatures.h but that flag is an internal</div><div class='add'>+kernel feature used in the alternative runtime patching functionality. So the</div><div class='add'>+flag does not appear in /proc/cpuinfo.</div><div class='add'>+</div><div class='add'>+Specify a flag name if absolutely needed</div><div class='add'>+----------------------------------------</div><div class='ctx'> </div><div class='del'>-b: The naming can be overridden.</div><div class='del'>---------------------------------</div><div class='ctx'> If the comment on the line for the #define X86_FEATURE_* starts with a</div><div class='ctx'> double-quote character (""), the string inside the double-quote characters</div><div class='ctx'> will be the name of the flags. For example, the flag "sse4_1" comes from</div><div class='hunk'>@@ -148,36 +155,31 @@ needed. For instance, /proc/cpuinfo is a userspace interface and must remain</div><div class='ctx'> constant. If, for some reason, the naming of X86_FEATURE_&lt;name&gt; changes, one</div><div class='ctx'> shall override the new naming with the name already used in /proc/cpuinfo.</div><div class='ctx'> </div><div class='del'>-c: The naming override can be "", which means it will not appear in /proc/cpuinfo.</div><div class='del'>-----------------------------------------------------------------------------------</div><div class='del'>-The feature shall be omitted from /proc/cpuinfo if it does not make sense for</div><div class='del'>-the feature to be exposed to userspace. For example, X86_FEATURE_ALWAYS is</div><div class='del'>-defined in cpufeatures.h but that flag is an internal kernel feature used</div><div class='del'>-in the alternative runtime patching functionality. So, its name is overridden</div><div class='del'>-with "". Its flag will not appear in /proc/cpuinfo.</div><div class='del'>-</div><div class='ctx'> Flags are missing when one or more of these happen</div><div class='ctx'> ==================================================</div><div class='ctx'> </div><div class='del'>-a: The hardware does not enumerate support for it.</div><div class='del'>---------------------------------------------------</div><div class='add'>+The hardware does not enumerate support for it</div><div class='add'>+----------------------------------------------</div><div class='add'>+</div><div class='ctx'> For example, when a new kernel is running on old hardware or the feature is</div><div class='ctx'> not enabled by boot firmware. Even if the hardware is new, there might be a</div><div class='ctx'> problem enabling the feature at run time, the flag will not be displayed.</div><div class='ctx'> </div><div class='del'>-b: The kernel does not know about the flag.</div><div class='del'>--------------------------------------------</div><div class='add'>+The kernel does not know about the flag</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='ctx'> For example, when an old kernel is running on new hardware.</div><div class='ctx'> </div><div class='del'>-c: The kernel disabled support for it at compile-time.</div><div class='del'>-------------------------------------------------------</div><div class='del'>-For example, if 5-level-paging is not enabled when building (i.e.,</div><div class='del'>-CONFIG_X86_5LEVEL is not selected) the flag "la57" will not show up [#f1]_.</div><div class='add'>+The kernel disabled support for it at compile-time</div><div class='add'>+--------------------------------------------------</div><div class='add'>+</div><div class='add'>+For example, if Linear Address Masking (LAM) is not enabled when building (i.e.,</div><div class='add'>+CONFIG_ADDRESS_MASKING is not selected) the flag "lam" will not show up.</div><div class='ctx'> Even though the feature will still be detected via CPUID, the kernel disables</div><div class='del'>-it by clearing via setup_clear_cpu_cap(X86_FEATURE_LA57).</div><div class='add'>+it by clearing via setup_clear_cpu_cap(X86_FEATURE_LAM).</div><div class='ctx'> </div><div class='del'>-d: The feature is disabled at boot-time.</div><div class='del'>-----------------------------------------</div><div class='add'>+The feature is disabled at boot-time</div><div class='add'>+------------------------------------</div><div class='ctx'> A feature can be disabled either using a command-line parameter or because</div><div class='ctx'> it failed to be enabled. The command-line parameter clearcpuid= can be used</div><div class='ctx'> to disable features using the feature number as defined in</div><div class='hunk'>@@ -190,12 +192,11 @@ disable specific features. The list of parameters includes, but is not limited</div><div class='ctx'> to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using</div><div class='ctx'> "no5lvl".</div><div class='ctx'> </div><div class='del'>-e: The feature was known to be non-functional.</div><div class='del'>-----------------------------------------------</div><div class='add'>+The feature was known to be non-functional</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='ctx'> The feature was known to be non-functional because a dependency was</div><div class='ctx'> missing at runtime. For example, AVX flags will not show up if XSAVE feature</div><div class='ctx'> is disabled since they depend on XSAVE feature. Another example would be broken</div><div class='ctx'> CPUs and them missing microcode patches. Due to that, the kernel decides not to</div><div class='ctx'> enable a feature.</div><div class='del'>-</div><div class='del'>-.. [#f1] 5-level paging uses linear address of 57 bits.</div><div class='head'>diff --git a/Documentation/arch/x86/index.rst b/Documentation/arch/x86/index.rst<br/>index 8ac64d7de4dc..8ea762494bcc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/x86/index.rst</a></div><div class='hunk'>@@ -25,13 +25,13 @@ x86-specific Documentation</div><div class='ctx'>    shstk</div><div class='ctx'>    iommu</div><div class='ctx'>    intel_txt</div><div class='add'>+   amd-debugging</div><div class='ctx'>    amd-memory-encryption</div><div class='ctx'>    amd_hsmp</div><div class='ctx'>    tdx</div><div class='ctx'>    pti</div><div class='ctx'>    mds</div><div class='ctx'>    microcode</div><div class='del'>-   resctrl</div><div class='ctx'>    tsx_async_abort</div><div class='ctx'>    buslock</div><div class='ctx'>    usb-legacy-support</div><div class='head'>diff --git a/Documentation/arch/x86/resume.svg b/Documentation/arch/x86/resume.svg<br/>new file mode 100644<br/>index 000000000000..ad8839f762bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/resume.svg?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/x86/resume.svg</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+&lt;?xml version="1.0" encoding="UTF-8"?&gt;</div><div class='add'>+&lt;!-- Do not edit this file with editors other than draw.io --&gt;</div><div class='add'>+&lt;!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd"&gt;</div><div class='add'>+&lt;svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" version="1.1" width="582px" height="1152px" viewBox="-0.5 -0.5 582 1152" content="&amp;lt;mxfile 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id=&amp;quot;jeVlbFHk8Qahp5zcIn_D-55&amp;quot; value=&amp;quot;MP1 puts system back to sleep&amp;quot; style=&amp;quot;strokeWidth=2;html=1;shape=mxgraph.flowchart.terminator;whiteSpace=wrap;labelBackgroundColor=none;fillColor=#F27979;strokeColor=#E07A5F;fontColor=#393C56;&amp;quot; vertex=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry x=&amp;quot;240&amp;quot; y=&amp;quot;-20&amp;quot; width=&amp;quot;100&amp;quot; height=&amp;quot;60&amp;quot; as=&amp;quot;geometry&amp;quot; /&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;      &amp;lt;/root&amp;gt;&amp;#10;    &amp;lt;/mxGraphModel&amp;gt;&amp;#10;  &amp;lt;/diagram&amp;gt;&amp;#10;&amp;lt;/mxfile&amp;gt;&amp;#10;"&gt;&lt;defs/&gt;&lt;g&gt;&lt;g data-cell-id="0"&gt;&lt;g data-cell-id="1"&gt;&lt;g data-cell-id="jeVlbFHk8Qahp5zcIn_D-10"&gt;&lt;g&gt;&lt;path d="M 101 51 L 154.63 51" fill="none" stroke="#e07a5f" stroke-miterlimit="10" pointer-events="stroke"/&gt;&lt;path d="M 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line-height: 1.2; pointer-events: all; white-space: normal; overflow-wrap: normal;"&gt;Wakeup event occurs&lt;/div&gt;&lt;/div&gt;&lt;/div&gt;&lt;/foreignObject&gt;&lt;image x="2" y="37" width="98" height="32" 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n3ZMNbZCPNMu6xyvLq2DXVH7gQBDBdBKG+G03ojUmmowlT1G63AnxybpCVDK0x1eNHCMLrFONcriEIQuOwVtjmVnBWUHx7hOmUVLz3jmKPU9cc1tQejqqwDVe57BjU6v4NAOtArJysnmgJbPdMJvPuTmkODgL4mGXl7/UMQlUpxD7q7u4O6BzdTOaFw/HYI6WGlOYDL2ul7XXYzjiCCEevJkB5Dk88VYjeqSEI1/hgXvF1K1fk22DbEWkWZi9lDD7cKTLAVI8fIQg3Dbv/3hAEobppC3lRuF3jJbyGE0yaPNPZq7H2j1Y5VKWG+s508iJuCy9pJZhrbAHCMh94mv6WYNwMEwPNzebLTpFAK7zFNEbAlxNDfT/Ot0/jrKYOvV0diIpMeR4j6LoPQ32J6SIIr5GBba0uzlECOF6l9oqJ8qGBQY8wsEt+lc5MC1LxXjWeavq4Ba8sugbq4hw41eNHCKLy4dE4BGFPI5o7ZyjKG+Hu9FNA1X64nY/1tO17YycQZWPnZ59SVyI123BVZTNAZyaHeu/ykhuhQoLQrjjbOqLnEGXvuk8kOZpoyBWpoT4Vhlybr0E/WXlLqlTOUC2O7eM9H4Q2DLvDit6P97xTP3TXUZ2ukfrBQnlRU1NmwOqlXY7viZ93WssWOUbmzto0u3ZtaI1JsrRkV9PxMykfhJsfgx0jvwQjh9TljrIpqKc5VIuNjcxd1jRn088tmed8bc8112Oz1+SoKXOpxZRQMhSBZhvuOhHb4dLcmPJzzdU5pEiaFEGpq4/5ZyPDOCY1tGpYpzJtMLcyQkqocAumwQ/RxIH50wT8NzFfF4/HXrW+1+6dzB6zBioZuonVyeSjc+By8gR2Gsq1MgXp4n0BpR3XdG3M4aHCgexEwH+ZwPOGyTe75U8J2UNv5MxMW0xj78lpdl3NrJjy8WNLGCQE4X8ibpgdRPHdbX6GDWMJmaaKnZ/LXe2eAKhocp6cv3qjwVhsUjaY2SG5stYD8SIN6O5+W3NQeFFZsWerLz8IR1LUm764f2wOTnAIV607uPQb9kGd7fzLB+RwuaXv+hhW9ltBQEmsJ5GLbUeZ/c37DkJtohJjc3Cs17DdmvAhvuqXGgca/b9rsHFcPL5KnUt5ekKd0VOYcYtlx+jpsoYmJlFWV8jgs9ZdtMcoAlM7foQgPI2NUoUahiBUJ60rzqwdmXApM76Xt/275YvQAWUPu8GEi8C4MJ8gyE2mJlCfL+9j3XmBaqePa66ldk26ydoxHHR2Zd4ROdKgbM6Awo0qP4Hj2ruWfAamqYLBWWLy8+qW4HbL+vtv2TJpkrdl/wO8BTlUV4lbtn3ndmbumaRTXwQBFUp7eSre9xO3r6yjY/HfmhRQPjEFJzTA0bHMTVzR7zr5fvJOTCSqCqozC2tY8qcyY+NHeUmVaicoJj6DmI61RBj2HL12SsePEITvsWav0FAEYVutZ2PlE2FxrtMZZv/2ziLTFWMAlE060qyuoLrJ1Njt1eTuKUqoIgcO0F0E/J1dcbqw4qqMWzTXoh1S6MRdTaPpYds7VC7qo5MDq35rL59LmboSRAstv7mGxVZlHUJjjzjdoNJf8SwdxTQbz/8NdZ2XrrCer/jfQWRruCZPcsgS+HzaMD5XKp+xzy+X2jujPwDjS5Pr0e0tQfOLpdKcKn2RQdfYwrN7Jr/swqur5xM2c9LgB4sCRYYTt+p8+HtM5fjxe4Zg14nf+vYzCI+7Kp9DYWqLNxRBaG2cOTzdckU4wa4/jMuSg6fE7iqCavMWPASQyhCXfzIM3MDjTZcMD9/xrv3d2QTuLcHzwHSxU85hp4NKvwSRnQA6Ij1EpBLfZPs18dHzfTCxVBczX78LyFZ60GBcHI/H/svWpxI+IM4TvkNKR0fslFevkaGriHBCETmoBvnbQeS7sBnE30Ea19qwyPXJ+KktCVKGCKcnBvsKlxiq8Uk77AIU5r9hBJanhlattV8uaO2MHEhMygdoUu5lP7sP1XaHixbWbjmF4dB2farGj98JvlKCKLpUATyHDC/U5d2oxpiYChkNRRAOMWTyM96DLcHtInYzhheQHbLBZSdELzI19t/8a0fA/ALIeCq7G1GpIlVKRMrmty7cLsreeiKsB+PjhfnbwRu8HIJwMMmUnOh0CVUsWBbSOObSXx5mS/M4UZSQDCK9eHBw9ZtOeshl+Fs5ibwmCivfjjhA/5NNAQp0gLGvBbcRMF0LYpVTeqfc+25NDvadbn+XAxGN2d65mVQWMtBLJfvkI0+Dl7FnLVMiTafC8m2o3a1KW1siJWoWL8M8ITkQU5nUPD8aj+l8XV9h0fOVpmL8TDVBFN2YnOhszreJVMbFgeambc4tZw7yrKgqF2woglDYOCgJ7CG8hhO2moPmbFGv1w2zE/A271zN4LO0K9uSSuUXyDROMwMcJkYhTaTTjZ5yCEK93sGOXvIAOtQZ+bzfBPBbu8rDZjBzkltkTYVd87abrlTnPj6wG2HiLwbMwLMmmepswDdBEHCBCfyDzrznoK4MCD8ce3/upW4Jhir5hidW33yXbdfiUaQiBzpJZzp0E6C5JZir4m2RpJNf6/Ez1QTh8A1Zuu7/koybXmr9e8MRhENoAk83NpzAdjBdeQmvURCZnejmbLoABOVnsL0Hxf4JzP8CEzcp04bXhPDlEoRqT1s4chGBvm/zjSh5XnJw15K9m5ivYmZ11hP00C8nk41j1Vye4OgHE/3VAD5c+h1qR4ZzkoOxJ4rGgg8Tk7oEQBmOU9C4nplPKk1O/AIZOC8xEHvci1+LB4xKFmltXbYDNY1/hwAVb8xyWcCxWjZfeCbddLnOpOmxPbobSCVDa3iRW8vxM9UEkQ3r0xn5AjFdr9NLuWZuLzjWqkzDEYT+rjVeRJq7k8nYH8sEsjikcZkZw9T5QrC5aRmDe0B0ABg759qktqKvENMgGCtHR3d83LoS1aSd1JqAKiGI3HnJvdac0cqUw8xLnHJn5PFU7Qs0ZXqy/QKpw8t8NNoMgLdUBjPAuLklaK4pdahaSj/KFDSWoROY+VwbdusBfopBK8ZH5v4yj1ulBJHL2Edt4SXzCaYi96Ms+lIhox9j4Od778GPl8oLXeaYc62WzRA4SgvAOI2BAwHsbiEyhckfwPh5Zjx9r5fbSm4v1NzIKxlaw02e9fdajJ9pIIhsl9TZj8GkrnEr06o1KrOvRaUf/GpVtuEIolZAidzGRUCb6cwhGGLjoiA9EwSKERCCkFEx6xEQgpj1Q0AAcEBACEKGxqxHQAhi1g8BAUAIQsaAIKBHQAhCRoYgoEdAdhAyMmY9AkIQs34ICACyg5AxIAjIDkLGgCDgBwHZQfhBS8o2JAKyg2hItUqnqoCAEEQVQBQRMxsBIYiZrT9pfe0QEIKoHbYieYYgIAQxQxQlzZxyBIQgphxyeWG9ISAEUW8akfbUCwJCEPWiCWmHICAICAJ1hoAQRJ0pRJojCAgCgkC9ICAEUS+akHYIAoKAIFBnCAhB1JlCpDmCgCAgCNQLAkIQ9aIJaYcgIAgIAnWGgBBEnSlEmiMICAKCQL0gIARRL5qQdggCgoAgUGcICEHUmUKkOYKAICAI1AsCQhD1oglphyAgCAgCdYaAEESdKUSaIwgIAoJAvSAgBFEvmpB2CAKCgCBQZwgIQdSZQqQ5goAgIAjUCwJCEPWiCWmHICAICAJ1hoAQRJ0pRJojCAgCgkC9ICAEUS+akHYIAoKAIFBnCAhB1JlCpDmCgCAgCNQLAkIQ9aIJaYcgIAgIAnWGgBBEnSlEmiMICAKCQL0gIARRL5qQdggCgoAgUGcICEHUmUKkOYKAICAI1AsCQhD1ook6ase8eWc1tbS8cygbfDqALgC7AwjkmriegGdAuG20hR9Y92jsnUqaPn/+iTsHmoInEFEPA58GsFtO3giAlwF62CTzxuHB2PMA2O+7qiW/s3PRHmkODgL4WL4NDByfGup7wEub/NQvKst4rKWJF/b3x94LdUU72cSVAFoBBAGs/0BHjzHhur1351QsFsvY29PaunS3QFOmh8E9IDoAjJ1zZdIA3gAwDFCsJWiu6e+P/cVLf6TM7EBACGJ26NlTL9vbI9vAwJkg+gaAD3uoNMLAT3m86evDw3e866F8oUhr67IdqGn8OwT8E4BtXOpmAB7kYOCMVP+ql728p9ry/Uzwuvb5qa8jiMz4eDTQ0vQ1MC60kLX1VWMMfD411Pdo/o8Hd0d2b8oYP2LmxTkycYNuM4i/gzSuTSZjiqDlmeUICEHM8gEwaTJJ020MHFkGJM+yQdHUQK9a5bs+oVCknQ26C8CeroUnF9jAwDLrJKirXwv5fib4qhMEuJ9hxAn8NQdyUJurxNgcHJvf0bW3Rz6OAN0H4ECfGCtZ/ekglj7ZH3vLf12p0UgICEE0kjbL7EsotOijbAQf0k4mhLfBGADoTwzegYAwgL00r3rDYGNhPL7qN6Wa0d4ZmQ8mZZbZ1VYuA8JLAOJgGiXwvgy0AdjeVm4DDOPo5MCq3+reUyv500sQ2AygBUBzts+Ml2Hgiez/TRwCwj4AlieH+q5Tf5p3RGTHli0U05D9ZoD/EzCenRDjrE8Gbh4fmXv2unU3jpc5rKRaAyAgBNEASqykC93dkQ+NprOr+c/Z5DzLhHNSg30Ju+2/tTNyIDHdRBMTuPV51gymjxnuX/26rk2t3Yv2MtLBNQA+afk9w4x7zQB/ee1ATBFE4cm2LUPfBONLk0wkzPfBxFK7GaSW8qeZIPKYjBDwtb/eg6+znDVQOLx430zG2JRMxv5XFWzviCgz4Q2W3cYIES4YfX/uLZoJn9q7lhwE07zNppd3yeSjE4lYspLxJXVnNgJCEDNbfxW3vq0jeg4RrrWZLvrG5vBZpQ6g1UF287abriyyiRN+lBzsu0h3oBwKR7/FwDet5ADmy/faE1fpDldz5ai9M3IxmP7V0sYxgBcmh2K/tAJQS/l1QRDMlyTjse+VOqzv7j59zmj6vRhAx1mwKe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EU9Pu3yl4OglA635UwDggQHwrwe5npowQcDkD5vDtHcXshCA+k55og7LEwLg+OrfgVSgtiLZtOD//KNZy+dTB7/7LTKpDM7C5WJSjQVc6rcbMd5szXIsafbcvt7lAIwieLvhcx3BCEzsykc7ezL/46m27JBFHCRPaCi9eyU4ggaF5b+APEdBERTrIF5bmHbYoRhALGQzoPO46bieiyA/c37y9XXqaKEoTDOyoE4f718E1JNwShMzMxcG2sv+d860AKmZdUWSGI8qleswOo6A5CBaMFkuYPifApF1/B1oFuSwUJW1OkT0GCyAKidhMNM3YcR4CKMlYpUQrky0rVTDJw2/Qgr3R7m2K+mVZRgnBwKhCCKN+7X7WW3BJErplpos3SjXlJCKK8aq0mQTgERukGpLKq/pVA/SZTb7zBeFTZtd2aIdyaiJyQdFu/HAukFxOTs7zLp48kdrUSYTEYJwA4KN8sIdAN04JbV5ZyBbBqvxzjFxOTt/d50qXasA6/kJnJtjNwTA8uOwhvkypf6WoRRMYL5x6A1E2A1ud5Bu4AjF/Fg7R5U+/ql508cXxHEDmxCc4HzE460LjU5kvW50rxaa8g8+O7U35/JudgP92CqyjsQp2V75B6+XRbzjaoXFsD0Z7P2mWQHUQhrfjwd7c7CCW6JjfTuJnJ9kXieMGQEET5JkG1CEIXcasuSUKCL3TrCeY3gnAbJJhPW5pYgpIJwtqfymVFwfj1RDjN+n8vXl1O8je1dhy125lApUNP3T1PwEsw+eiBgYjKDeX6mZfryQUn+YQgXMPqn4JeCEJjZkpFhAaD8fhonO4F4cj0yJwjUoUgyqf7ahCEzo1R3VtujsVPcHMBkBptKHTSm0yarlJNKFfXzBTR37jn1kTkhKLb+rqFDbaYnUKayiS6U/cjZ72ScggiE3Gt0n8sUJYdBvZl5lOcMgfb+0ztKJLJB8Apz7C82BWS1/q7BMp5Qas8ZSe1iUlBpDEzpdJkgzBsuTgl7+1zQhDlmWyqlWoQhENkco6DQr5RaVK/O97Z7XaBL5Ug1FdMU2vHTQScOd6WBw+5NHHutwpgdbNd9skhCO148lxOpRuX292Xl5mlTbXhYfzp9aA9OBbf9wYm/LuFvBzvjZEdhBcN+aSslx2EEtluZlKpHUwDr1huU8t7f7UQRPkUXw2C0EXKOtmYdSNLp8h+5XZmVtdX7nlq7MWUmsu5if1cJ6vTJqpzCJRrCXVcyYSvZgfvZQfmQDDaRIdeZ1ZlkvU5p1cXgvCqIR+U90oQmqA5dYesejL3yOZPeCYEUT6lV4MgPnLMsr3euGv0bmsKbReXC6UGmb47gH4AhjqwnBAcxow7YtEedYPbhPQSVdxBpOUzsBpECy1aUZcEnZovpXZzc/g9CKQyxu5JlZ5uwCEXU7iZjVS+or0tDHnj2PDMFYWCNjVZY/NebuVldjmk+3Z1u6CDV5tKyX7c4Iau3+nkEILwoh2flPVKEPoskOODKZgOXAiifIqvBkEoaVtaO65g4PKJkvNjJuGMob7Ik/YRZa4m/SSYr9Zl0E2VdzBnVJMgUiSmv+lNe9lSOtBNXUhEN9luOctCoM/FpN9Fpe41NwN88cYNkaftGCryogCtzOC+5zIf5nthYqlb54BCs83pwiCn+8PTchlnMvhb9guDQPyVwb7I95w82YQgCmnDh797JYjUSxXqPBvEP8kZjou0zEIQ5ZsE1SKIzBfzrwG83SZ9EoxnmRBT13KmdglsfhSUSqtuvaEsCXWlKfBuyz0NvzV45MRo9L6d1jarTRApAmzrWMyM2zVXaaob7GIMehrgt4Ewv0DkuKMXUyi0+IMmBVRqdev1map7txiqsgUvgipidpXjylF1pFNwRyQEUYR2al2lGILQmJkyH4W4Jdbfc1a+rJRCEOXTeLUIQkmcSW6nrub0eqn9Tia6FEDUYH7IkvlUezlRLQgidWCdvvXuxxqScFKYOq/oYuZDLNfX5nVzzbiW3qm5l9rNpNhCBi8b2BBZ76awxzLU0tp5rmZX4KYZdW/19+PDs75W0Fxmjz0pcChe6lxwI3w1y0x6L6YsmA5mpoLmJVVfCKJ8U7KaBJExxxwBxk8czUYTh6YWjtuThnG5SjanOezWzpdSF4VS6qu7uolJeTY1FdBSivTijeZt04Zp7R737sLBdk3tS95JieQtALW5TFeSIKI1caKLK5G0zzrO9F3ldKP6HnAjmzpsD7DxhWi06zE3s1p2EG5Q8lmZYnYQWjOTC/OSEER5lV9tglDSW/IILVPWGQD7WxaTrQQ8wczdyXjiHlucRM7tY0TUPbpr5jLrl2cpC7ySr9T66pzh2RepiRjnAZhvGd8wmJ9iwh3mWGKVGlspqTZSea3MZJiAxQAp09t+ltmRTVfSnYwHur2kIC/DDKO5rZ3vDTKfwYRjkU5lnt01KnPgn4nxUIJo1cb+7v/1coeFEEQZtCNNCAKCgCAgCEw+BOrSxDT51CAjEgQEAUHAfwgIQfhPJyKRICAICAK+QEAIwhdqECEEAUFAEPAfAkIQ/tOJSCQICAKCgC8QEILwhRpECEFAEBAE/IeAEIT/dCISCQKCgCDgCwSEIHyhBhFCEBAEBAH/ISAE4T+diESCgCAgCPgCASEIX6hBhBAEBAFBwH8ICEH4TycikSAgCAgCvkBACMIXahAhBAFBQBDwHwJCEP7TiUgkCAgCgoAvEBCC8IUaRAhBQBAQBPyHgBCE/3QiEgkCgoAg4AsEhCB8oQYRQhAQBAQB/yEgBOE/nYhEgoAgIAj4AgEhCF+oQYQQBAQBQcB/CAhB+E8nIpEgIAgIAr5AQAjCF2oQIQQBQUAQ8B8CQhD+04lIJAgIAoKALxAQgvCFGkSIWiHQ3NZxKxhnjPdPWDXY17O8VvJMpn7nzPlcw/Tpr8xhQpjBR4DwTjD2sWD9MphfBIxHGHz/9OAb+nt7bx0pNwbhcDjwjxdwWIBpEROOzZED2MnAC2BsNAw8lBwLPDw0tHprueWox/aEIOpRazWSubk5PAMGzgJhbLA/cmONxChrt9UkiMmIn04ZbW2LZsc5+EUCzgIwy4PChgG6K2mYV27cEHnaQz1t0T1409cBvM1De0kAMYbxxVh/10YA7KHupCoqBDGp1FmZwagvsOdfNE5gNr8F0PuZcEmsr+c7lemtuq1WgyAmM35WbaUW5CBWgOlrAN5UgiYTDPx4epAv7e2NvFZMOy0tnYezYd6m5msx9TN1kiDcYY41rBwauvPVEtqp26pCEHWruuoJ3tzWcQMY52R7FILwhv1kxi+LxOHt4f0bEnQbA0fnQScBYAtACYDV2rM/gBl5ym9mgzpiG7r/6AXxptaOowi4E8C+XurlKfsIktw5OBj5f2Vqr26aEYKoG1XVTlD7V7YQhDddTGb8FBItLYveYRrBewn4Vw0yz4P4GsMM3BmNdr1gN9fMaV/61oZk4gRiXOLwtb/FYGNhNNr1mBvUlSxsBB8AcKit/I7dZw+3Arx6LBD826be1S9nZWlvXz59V2L47UHgKIb5BZ0cDNwSH5519qZNN8bdyDFZyghBTBZNVnAck3mBq4aJaTLjN+eo8MzGEYpodg7bibBydNesbjeLqjLDPfeC2n3QTQAOsE3nJ8lMfGJgYO3fC0xzam7r+AEY/2Etx4w7ONFwnkszETWFwicS0a0A3mxpZ4yZlsai3Wsr+Kr5rmkhCN+pxH8CTeYFTgii+PmmvJSmzXjlOoA/N7EVHuJgYEmst+sZr60rU1UwgdUAtVvrEvDw6HQOb3ok8opTm3Pnhw8JmPRrAIdkyxBR9+iumcvckJS13Zb54SPZpLsB7L3n//wgklg8OBgZ9jquei0vBFGvmqui3EIQpYE9WfFrCoVPIqKuiecI3JsIYumjvZEXi0XNYVeSZPCXYv2RHzi12xTqPJ6IfwkgkCmzjUxaMDDQvbkIWXS7ke0m+Oih/simItqryypCEHWptuoKPVkXOIWi7CCKm0tqEZ82ggcAarG0sA2Gcdzghq7fFdfqnlqh0OIPmhRYZzM3PZ00eIGTC2xTW8eXiPFtyxf/UAANx/f337W9GHlaWsLNbNCvrLsIZlo8lcxMU54g5s49eZ9AQ/BTRNTJwEcA7JeZTGob+czuF2CdSeaNQ30R5Unh2R862z4InwHR+yyBQsqj4+/E1JeEeVNi5M1DbrfBys88wcE+AO9OycpY39jAC7MugYfPX3JwwOSzCbwIwDszX3jKt1t91W1gwvUH78+xSCSi/pfztLeH3zgap3tBONLVi2ULLssj3+st8zva2MRVAOYBCAJQAUnrC8mk5FDjCnJyCZg6AfyLxZVyXFcwzJsO2g9POo3NPp5KEESp+DlhXonxu9KvplBza/g4gO4FMC37c7mdF3IX/FRPKwb7e67Xya0p/1uDR06MRu/bWcw41QH6tETi1yA6EEwp0xbBvGKgP3J7Me3VY50pSxDz5p26NzXE/4uAzxZwtVN6TQLcx8HAmW7tqulF2vwGAcsyC2Gh+fE8gIsPms09hRY3pwVYdTCSoCsJ+HzhPvkpMo3TBwa6H7ULVuoCp5MvGY93BBobvgzGBRYTgLXrMQY+GevvecQuz7y28KEGkzItHOVQ115lMxl8/sCGyG8KkXo9EEQlx19oUuo/INqDo4n9VgF8iuX3vF/3xfSTIkTTfAjAB/bU54Gx6fiE7iyiqa3jAmJYTVClmJiKEXnS1ZmSBJHZOv5C4y1RSMHbGDhVt4hZK2YOuNRXht0bo1D7SQZumx7klfkChHQLMMzkeQgYtwKkvszdPjuZabl9y1x2ggD3Mowogb/svMBrX3xqbu1cBvB1RQReJQj4xujwrG/n25n5nCAqPn63E8VaTncYrCKgG4Nbz+jt7VU747I9Ta0d1xCw0tLgq2TycQMDkcGcD4lQuNWglElorz2/0Y1jwzNXuN2dl03wSdLQlCOI5rbwXDCpgyx7EI2KmlTh/VEwjRL4EAaaNAtTXj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J310ROAVmnNq3fCjvWRlcDtGPLnnz6egxF5pFZHkg3X+06plxxUUObIj98aNbMiVJ8ngKKYHiu17D4x4/oSI1qehY7VjsAvKM+MwMrz1PT6N6LncnAO+L0dVQ7UQkG7WalAfWYNFmyZ3Sxc8xCbIoSTGI72mnHhXd1QN0wWOJj/Xx448tKuFZSD68Mdc4vX7+HcHqElzDxEmi96iVdYVwxPjgE2XPoDB04claR6LHpij6ch6BUPYbMc1Wv9RkKKIIBAid+uERBoeN0R3F2XgAwWuhG193NIubxJqQvCI/XR5EJbYfE7BAMq7qopycpnn9OF+PFLPqdKMHwVBu7R9UwcDbpHEs//vQ4qJPojXD2bg6M2n0719fF/BFVhXkSN2449w1rIBzAC31o3Gks4dhdTayh3VuPYbOxCTiCAchT52+iDzU3q/E3kAxuzIrchGUXojevCuCZ2He7THCdLKBs7ABYbDUrFRGeSGqbeHFQPI2Na0Y4dgiGpybhVCtNqhSu+1pWbRQlGCcuO1p5IWtxYq8OQFrr1akuBUdNczniiQZDhz0vpF8Cbfz6sKsKO5shL2wFjpTxVlb5Uq+7yuQ5Fdq588QSlNaJNSAJxiy4DkL/4bKWaIhBRFrrOniW2zvSGMiEUSFUr7r542tGsUsw+niRoFdIXeGLi0ZtsbvriUgydgmGlSxUj2aEDEWyWnSiBIOyeHYweKEumBBu+oSMUbgGszgqPKy06hDmEYKGbdI8f2vHzmb0ZpbVKxjoy6qN+6jLoFmWoSd4pCxKZLyQDVpHyYAkGEwKAAMj2hrOO9CILdqtfS1qVLOU4cuOuBsUv2Cz8lYPm0AuU4d3pIZvlxKSQODqj4fX8KQKL0Gqala/HJUrmYdeypTOZZCG6nH1+l3atvsYzVrylRvJoSwYOWdGh/o8LKhdgjF7ZxrttFp0dgjGiLQxrlAVG9Ys5RZwCioE4gXBVqFNogtN+w3r76L9zerSJzv+Rn2BlIvg4O/UedNtM8SNfByJI+aMaF94kjTwwlvrmMe8uEO8DY0NbRGwBAPgReOcat+mvnXngeKzYpSsYrkafQdfg9Y94rjhDkUkCl4ekV3b07LtEgxPTVLrFrklbIdg1A3E25CZolIoiyHPD0nNIxK2gleeUV/UIGSqRIhNin3dE+Uh38h+LRSpmJcg8fxv7FJKWPSl288gF7xUUDBvNuW3azfv0q79p3QvDagftQmqSCP7t3ARUkATDECxG6ndbEHiEhh2FbNo9GbfY+dBqEdEIvM2oS3YfWBQdCJ5QjBGj9mLGFDtEoxKMlHDF9LKDY9fzRTFArv3tJGdPL5Kwl4dQL12It7xSMZI4rbqE8hlWJ9mBHIzexvLyJZoVb76O8ZxZL/mutveAU8wKjiQZiAeI0gUnmC1k7CYB0U0ptw5Mtv5zHAnOXb6Ig2buJz7oL1VBQjOPKRnE+Wo0ZcPrbH1ekIwRmqSlXqEuj0hGHyHQNirNuxTwmCKjit2+X5dGgjF1jUaD94JkLee4570BfNh4pB2BA9qkYQ65n66TXmhE2tCJEHCB4HxVE9JMAyCkGjOnP+F1n/1HX3+5UE69/NV3cSEuAhHIjg9gVg8jZMhMnAQtSGKbtn5vfLmMx4Lg4qmTeojWHAYrFGxMOGN7cRInhAM2sX6doioR94QjIoFDPt4U+izdd8q/9U+vKY+VibykJgotjwyNbsaIFou8qEvB46epfmfbadv9p9S+qJGP1TnZ60qxahVo/KEcB2ebDRavNg6IBHBp6ZcybzU5p2KVKLQa/I2tZ0BlHklAhIB3yAgJRjf4ChLkQhIBDgISIKR00IiIBFwDAFJMI5BKwuWCEgEJMHIOSARkAg4hoAkGMeglQVLBCQCkmDkHJAISAQcQ0ASjGPQyoIlAhIBSTByDkgEJAKOISAJxjFoZcESAYmAJBg5ByQCEgHHEJAE4xi0smCJgETgP0cwl/dNfSSHRSIgEZAI8BCwIqynrGCTBGOFkPxdIhC4CEiCCdyxlz2XCDiOgCQYxyGWFUgEAhcBSTCBO/ay5xIBxxGQBOM4xLICiUDgIiAJJnDHXvZcIuA4ApJgHIdYViARCFwEJMEE7tjLnksEHEdAEozjEMsKJAKBi4AkmMAde9lziYDPELh05SZN+XgTtWhYjtRXK1G4JBifQSwLkggEHgJ43XT6ws00fsY6SpbsGVo5ozcVLZDdBYQkmMCbE7LHEgGfIHDtxl1qGByjPHyIlCL5c5JgfIKsLEQiIBGgK9duU912Y1yvbkqCkZNCIiAR8BkCkmB8BqUsSCIgEWARkAQj54REQCLgGAKSYByDVhYsEZAI+JVg/n74kL77/hx9suob2rzjqMsQhGFJmeJ5yp87KwXVLk2Na5WmFzOmFR6tyXM20LBJy13558V2oZqViir//vOvv2nLzqM0e8lWOnD0LN2680D5+7PJnqHXc2WhpvXKUIsG5ShDulTC9bEZH/z6u9KfhSt26OpAvmwvZ6QKpV+n9955i0oWeY2eefppj+vx9MObt+/Tui0HafkXe+nw8fMuDJ5++inKkS0TVa9QmNo2eYvy5nyZnnrKMp6YWzPU8ucv30HHf7hIwENNav/bvFORShR6TcFdJLETtVypvDR/fDilTPEc7T5wmj6auJz2Hf5RKSp92pRUuWxB6tSiqiXGRm31FRYifTPLc/HKTVq+fg99tn4PnTxzSZm/SNr2tQ6qoMxd0bnErg8Vy1QpnxdqrtX3h46dp0adxtKvv/0hVB4RNSSi1UaZLWcgG9EOxPL55gP04fjPdKRi1poGNUrS0F5NKUvmDJaNNiKYb/adosihH9PZC1cty+j63tvUt0sDSv78s5Z51Qy//f4nzfxkC42asso1Ecw+fu2VFylmcGuFcDxZyMIN+zcj/BHQttlLvqKHD62jmJYtkYcmDW1Pr2Z9QagqOFKNmrqaFq/+Rij/CxlS07A+zahhzVKWi4NHMLOiO9PEWetp6vxN3PqA6eK47lSpTH6334HFyLiVNGvxV0JtLV4oB00c0k5ZyImRQCbvj/2Utu46JlRdntdeplH9WwjNJSuCsKrQ6nu/Egx2swGjFwtPQm1nM6ZPTdNHdaKKb+QzxYAFYO64LgqRDY5ZIrSw1MKrlS9E8SODKW3qFFaY008Xr1OnfgmKRGY3dWlTgwZGNBbeze2Wj/x7D52htpFT6cate7Y+T5cmJSWMDuEuUm1B2/ecoND+M2yXjzKaNyhHI/s1V6RWo8QSDMivbMm8NH7mOsNvShbOSZ/ERbiN38Gj56hj1DSCdGAnQWoAIXZoVtmxDeHRo0e09PPd1Ouj+UKbFNv+fl0aUrf2NU3nkhVBWGFi9b3fCObOvV8pOGo6ff3tcbc+QFTGhIGI/seff9HOfSfpwqUb3HxY9PWqlTDEgQWgUc3StHrTPh25vJIlI5Uv9To992wyOvfzNdq1/xR3QAdHBCkDZpbQzmZdJ7icibR5X34xHb1ZPI8yydF/9AvOR2xqE1SRRvZv4QjJQBVsET6Jbt/9Rx3UJhEcQDJLp/WkIvle5cIAaTSkfwKXvEXKR6FWZM4SDObLX38/JCxIJOBcqUwB5f9v232MLl+9TSP6NqeOzavo2myGBSTKN4vnVubEtZt3advu4zr1Ti3o/e5B1LXt2z4nGfRlyryNirrHS/lyZ6WShf9Rq4+evEDfHTvHxbxd00o0LKqZ4VyyIghvCQab7bQFmwkSPQSKNZsPKGsaCVJl7cpF6YUMaVzVzF++HYv5oFG9QioSJsOgMYtp7tJtunIglUQPakW1qxRzE5Mhcg+KXkJrt+jrtprwLIDaCutWLU5DIptQ9myZdO0AGHHzNlB0/Brd3yF6Lk+INLQBGZGmUT2YRMdOX6TuH8yhIycu6Or6ILIJQZrxZQKG73adSKfPXtYVa9Q+TAhgwKodb79VRJFkWJXx8ImfqGnn8W7kFVT7DQXnzJnS6eqFerxqwz7qO2IhQU3RJiyM4X2bU7Jn3O1SLMGo30Gq+LBXU4VIVBsEMD5/8TqlS5OC0qd9bEsz2gjwbVTn+m52N7QVklnkhx/rpB3UOTsmjGpV/seu56v0xdZD1KFPvBtpYIPr0bEOpUmV3G3OGqnkZnPJaYLRNjLRjLxbdx+jlt0m6cArVjAHzYnpbGpXwWSBQZZVb4wmPDpnRDADuzWi8HY1DfV9ox0EKpbRZOLVZVUP2oiFjEW2dO23rvHAYlwxozflfPVFX81Zipm2hmKmf64rz6p9PByw8yycGE5VyxdylQVSDumXQBu/Puz6m6gaAeJr32eaTqXEt4smR1DlfyURs4mq/oa+RLSvZSlNYIMD3jC8a8lp6vCO1PDtUqbf/3L9DoX2S6BdB067voVNZtGkCK8OA7T9g1TbJGw8nfjhouvP8HoFqdeoWNh0PmCjahs5RUeC2LiXT+9F+XK724yeOIK58G3co27vz6YVX+z1aDFhwo+JX02xMx7r22aTkbfozQhJO3pXb9yhoJBY3Y4/ILwR9ehY222QeXntqDo4wWgZMYlgE1BTn9B61KdzfZ8QDK99sHfAsGx1enP/we/UpmccwTCuJpzmTf6og0vCgF3nndBYl/iLfJGd6lDfsAaWCx55f/zpKjXuNFZxJ1eT0TjxJJgsL6VX7rWw0igPPJxmNQoeq5O07Kg6vLbGjwhWTjh9kbA2wgbO1BUFrJvWfVOoeJykvdtlgm4sQlpWo6G9m7qNxRNHMF8v/eBRg+AYunX7vgssnn5shqTRYhn/wXuWAKJcMylEWy92urABMxS9UU3N6peliR+2c2seOyk8kUDYMnBKsSKhF2EH8jZB5G7Xa6puR2RvsprVwbYN9rE1c6Jc6iLUV4joarJSJ3l14RRn4JjFlm3kEUz96iUofmQnrkrF1sVKcp5IIGwZ1SsWplnRofT8c+InjTwMfv/jT+oYNZ02bz/i+rlquYI0e2yY8CkmNmHgCGlfTbB/rZ4VRSBibXriCCZuWIdH4YNnu/r40gtpafXsKMWgayfhWHHCrPWuT4wWIwug3frYengEgwHt+eHHutMwSAc8wjPrIwzMDTpEE8RwJNgflk2PpDLF89iBhpuXJQC7kxZta951otKmkkVyKgZQLGrYNW7feUDNwifqVBxIeZD27CS2//h2zMBWih+ONvEIxkiyZOvnSWMixnu2nN0HT1OT0FjFuIxkd14Z4cLDIG5YB2pSR0x6Uctl22d0TP/EEUyrxhUeaXVfT5kfVv3m4RNdJwe8m5kAmwUQi3XBpHBKnVJvJDMacPZ7HsHwFhiMmmE2jbT3HvxGrSPiCJNDTbwFZmfRIi9sPO16xetO7EQXpEhdOMWAM9W9fw21Zj4nZuXxdm8e3jyC0TpQ2iFx5F04sRtVq/DYniTSZ9iN6rYfQ5d+uaVk97TPbF1f7jhKrbpPdv05fbpUtHpmH8XR0U6CC0LjkHGKQ56aeET6pBFM8uoVC/+qFf+CW1Sl4VHN7GCn5OUxPW+SsQC+9WZ+mjsuzNTPQtsYEYLhtaVy2QL0ahYxpzS1Pnhmwkiq9U/xRBJgweQtyJnRoabH+3YGhCV7TxcF6mQlRp5nKdsfO5Ieb2dnj0pF+s4eueIbTyQNtq55y75WDNBq8lRNFlXvnzSCSV2uVN67WmOhJ+IpwBfdxUQIwmxCiXzvgTORyBxW8hjZfIQLICJ2t/V01zaqc8O2Q4rjnppwBWDt3L5ux9IibRaZ8CLHnaJtFWmTaB5P57LZhmbXdV9bVvcP5tKSNbtcf+LNJRG87awPs/aKjJu3Ee0cJRgREdDugn0SCIYlQCN1UnQhsfmcJBgeWYlMVEkwRCzB8Ba/JBiDmcKTYHgiqghB2GFoHkH91yWYpEww8I9aEted0qVN6RomSTBiWwFLMLyTNkkwNghGxAaTGBKMryUEselknItnI/LEsCkqFSQlFcmbtno7LrzvvV3wga4i+czIe+rHy8T60/AWTWJIMOwpiq9tHN5O5KRk5GWP03lGeW8kGPaUJnWq5IqDnvbpDG+drxo3AAAZmElEQVTx9uZ7Xxl5eSdyrRpXoHHvt9E1z1tCs/O9yLh5a4Oh4BZVH2kdsuye6qjoiE6UxCAYOP7Vbx+tnGypyRcGP28mqvZb3vG3J8fUPYbMo03bD1OObC9S0fyvUrMGZQm3lEXJ3qo/vON03qIQmahGdfE2A1HHS6v2++J39kTOUwLkzUme6wRLaHaNyrjprXU78beRF0d5fnW0c0JF8oX3JSYnJkXTsAmKlzOOJ/G/Vo3K+2R3ZSeCXf8jnq+PavPyt6OdHZWU5x+CkAvwJrcThwfXDZp1mUDPPPM0wU6UK/tLFNy8ihJEzJuU2I52rIHejp8Yb0PwO8HwrgrY3e0Ru6NJ51jl/oqajDxnE0OCQRtYN3dc8/90ag8qU0LcCxeXHXFPS02+ct5CeayrP26hr5zZW4kUKJLYu0asrwur2uCS5rJpkZRVICiYWj87VkbE4Y0Ew3Ojt3utg3cfzhvfHy3+vM3KrlTBu8xpdFWAJRhcJVg7p69QMDee5Op3gnHisiPvdq/RpHVCgkFdJ364REGh43ROclD/4NAmEqSKF0qhYN5syiL1JmSnisP5n68p3raq5yn+LnrZkTdh2asGTlx2NLrO4A3BoN+82/x2LqbywlLUqVJMCUjm7V0k3maAv3l72dFISuM5HrI35XkbEI9kkc/vBIOQmbwBRgCdBRPCCUxrlIzCNcBrFiETeXFEE0uCQdv+N3YpJSz6Utd83ICFu79ZhDaEOsDlNK0ui0JGD2hJiIviq8QL12B1ixj9WrVxH3UZNMsVXgOEPmNMiM4TmBeuAe1GLJKw1tVN1Q+jcA1GcVa8JRijtuL2eo/gOqa3y2/duU/BUQm0Y+8J17CY3eb3ZOx44Rpw490quBrq4oVrMIuZhA2nQcdoXUA3q42RNyfUftohGJ4HttdGXhCMUcApBNHBYuTFZcWkGhK7TAl6rE0AD6EQETSalxKLYFC3UUCnwvleUfqFNrJ6Pu6KdB8yVxemAWVZDbKvJi7Kad+0EvXr2tBNUoKOPfXjTRQ9TR94y27AKQS0wnUQNoYygjit/+o7ihq+0C28pplE4S3BoM9GwbFgm0K859w5MusgxqLasfck9Rm2wC2Osx3pR3TcjAJOISAWDPS8gFOfrNpJ78d86haN0WwT4V3URRsR82hUvxZuY4awIpgPRvGLzQiGZ/+CER/2LzV4mU8IBh3wRchM7BwJo0KoXnXxkJlOqUjqxDELwwgpBkGnM2VIo8TqUMM5spMOdosFE8OpQJ5sovNROJ9Z+0TCMMKYuWRKD0NJ0xchM63I1RcEA8DM2popYxoljKoa3hQBt3lhRrFpzBkX5tG1CLNB81XITBHyM3MUhQEb4VGxGew/clYXBAvtB+HhVQpV9TYjGJ59CWVAOnvxhX9eCrl45WZbIvrYCBuhkJnqxyAZ7F4rNzwOPiW6UsDg00Z2srwFm5gSjNp2npgq2i+Qy7zYrgSpx6nkafsQUmP+hHDLm71wIeg8YIZbGEyR/iBmMsKmmtmtfEUwaM+m7UeUSHw2ntVwdUMkCqNIn43ygGQQVpYnlYiUi4iN/bs2tAwoZmR6sKoDKmWLhuUV2x4C6SNZGaTRn34jF5kVPeL/XxQa5BOCQSFqXFaEwbx+UyzKPewS/bo0EArE5A+CQb/sPgui7gY88ddqoD353e5THUaiuVHdUBf/N24prd60X6h5CLKN4NTVKxSyPC72JcGgcXbbih0XCxeRAOw8ZSMEBCcT1Gg8saO+9WRVDgJoje7fUjk+F01mKiBbBjZ3REJEeFHELtI+aG9FMLzwsEz5y4ioBRH9ExmcSbYkGO23CFUAHfezdd8q/1UZEXnweFaR/NkpqFZpqlO1uK1TFX8RjNo3SGkbth1WglF9f+qCjkTRr1zZM1OboAq2+yU6cazyQadeunY3LV+/V/cwGtTPfLmyEuwneMzLznGztk64FKzcuI9Wb9zvVr76sNs7dd5QFoPoY2G+Jhi1vfBDwnE+sDhz/orrETr8jnebiubPTrAZgATNjPZWmHvyOwjgzPlflNvRkLq0D6+pDwUiXi9MAFBj7fj0sOuQ9xih+vghNpq6VYu5+m/0CJ7Zw22K7W3LdxQ3b6Py2J/6gNy/7YA6g6c7uO/IeEwwnoAuv5EISASeLAR8ZuR9smCRvZEISAR8gYAkGF+gKMuQCEgEuAhIgpETQyIgEXAMAUkwjkErC5YISAQkwcg5IBGQCDiGgCQYx6CVBUsEJAKSYOQckAhIBBxDQBKMY9DKgiUCEgFJMHIOSAQkAo4hIAnGMWhlwRIBiYAkGDkHJAISAccQ8JpgHGuZLFgiIBF44hGwvOz4xCMgOygRkAg4hoAkGMeglQVLBCQCkmDkHJAISAQcQ8DnBIMg4Y61VhYsEZAIOIqAldHWbuWSYOwiJvNLBJ5gBCTBPMGDK7smEfA3ApJg/D0Csn6JwBOMgCSYJ3hwZdckAv5GQBKMv0dA1i8ReIIRkATzBA+u7JpEwN8ISILx9wjI+iUCTzACkmCe4MGVXZMI+BsBSTCCI/Db73/S2i0HacaiLbrX6PACYuZM6ahKuYI0JLIJpUuTUrBEsWznf76mvP2rPi6Or557Nhl9Nj2SShfNJVaIF7nwCt/RExfo8y8PKC8K4sXNW3ceuErEi385X32RKr6RT3lKtGiB7JZvIfOaw77AabfJ6gPquXNkpiplC1DtKsVsv3DY/YO5ysuJarJ6BtVuG+3kx4uYwBtP7+IVR7ygqCbMuWwvZ6Q3iuZSXgStXLaA6Vveduudt+xr5b34cz9fo4cP//FzVV9Xbd6gnO5lR6uyJcFYIUREp368TB36TKPTZy8b5n7rzfw0d1yYz58UnbX4Kxo4ZrFbvR2aVaYRfZt7/ESoVbfxpOzkuRto5idbCOQqmvBuMd5tbh1U0da7zd4SDK99eV57mUb1b0EVSr8uhJO/CQZPqH6++QCNmrKKzl64Kgq5kg8Lv3+XBpQlcwZb36mZ8cZ0/5GLlE3UKtl5m1sSjAWa127cpSZh4+nEDxdNc+LN4nHvt7EaG1u/Y2F36B1PW7753u27LC+lp5UzelP2bJlslWmVGXWCVDDJmTeDrT7V/Y7H7ONHBBMeYhdJThCMWm+XNjVoYERjS8nKXwRj5+F5Myyx8D+IbELYfETf+UZ5R05coLaRUwhSk52E98TnxHQ2JTVJMBaIQlzsO2KhWy6oBhAbkaAy9A2rT2FtatgZH8u8ew+doXdCY+mPP/9S8uJBc0xGNUGCwWPkvkrYxcIHz6avvz1uWKSqEqptgeiuitHsR5jwU4Z3pPrVS1hKEE4SDNr1fvcg6tr2bdN2+INgQOLo++ipq0yH8YUMqen55551zbcHv/5umL9tk7doaO93hSTIH85doRbdJtFPF6/rysM4FyuQgwq9/gpBTd5/5Cx3k82V/SVaMqUHvZIlI7c9kmAsVic76WBjiR8ZrOj5WGROppFxK2nCrPUucglrXZ3iF2x2kUzJwjnpk7gIn+jfFy7doGZdJ9CZ87+4dQlSSHjbmlxdH4R35dodWrRyJ02Ytc5NncJETRgVQvWqlzCFiiWYFMmfUyQ02HRE0u9//ElXr9+ljV8fphGTV9Dd+7/pPoPd6tOpPahMiTyGxSU2wYBcBoz6hOYv3+7WJhBKaKvq9E7tN5TFy861+w9+p692fU8j41ZxVfc2QRVpZP8WplIbyugYNY227jqmq79900o0qHsQQd3VJmwmQ2KX0fL1e3R/b9e0Eg3v25ySPfO0Wz8kwZjMXgxAm55x9M2+U65cPTrWpgHhjUTmvFd5rt64Q0Ehsa7J89ILaSlhdAiFvz+bQAZIvjL23rn3KwVHTXeTXLJmzkATP2wnbMO4dec+9f5ogWIQ1qaM6VPT8um9KF/uLIaYeEsw2oLRjuCoBNqx94SuvrffKqJgmPz5fyQBNiUmwYCYp8zbSB9NXK5rBg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+ke4TnedUeyUV2QNvRZaIgZ3QTMT6p0GnhP7IBjB+bufyttQ7z4u2PnUL4n/kdLKNhbzDvBuIFBN7HEzZFNgxNEAqTK4rUFUHIdr4ipEC1P1IH26b2zq8Q41surH0taRTnI7RYMXyDSKr+fY9Tmm+oj9BGPQWiHMmjtu2UrzeCUCWsSvFyydyXiSGsvGTP6wAaSlSTilZh7sZsI4o4VoHpqxHCWYi4UlmG8cVs/xoRHSDU27wSLGzfCxOHg+kLPk6TKs1qglBBqd4Iwse72dfmWREjaTHZu7yWOuNpP6yuj8er8iVvUPuaIMLQL/zuPkFMPkHwoAnjmBhb3wbREtcIpJ7sKiN0FmNinFk8tarciVWUjjesP664Vj/wOBSGVc2DIdRiIkyMYxKtCSIMteLvdXWCEGOSHMFfqUUsJsnlp3h92QIt4seQZV3EoHcCLHZ3w1Y83+GXO0Jx3iAP+V2dsCLVutgNGsskniD+Fqd8e1/fzSKsR9UeWbytWpxe5SomHrTi5uFCpmRqVkg82aMO3FY9DdNCAlaCsMgnjIXTrG+okKjvFeXtmFLbbLkAjNNDDDeGAH6WQRsMUB9x/v7h4R0ej8956UMec3RNEIoTUXcEIfNkVfW6VMTMLtbc1nkKABFue+yjkEVzlTjTvWYxHzSYTvVHeZ+sbDHkt9uBqCqL36RdUgNSPwbZ2FV37E0ewwUC/gWLDxgYSD00Xvy99SflkhrYYMXzS10bDtlFszCJXpVN97hlZTzDp9bWFbtYMBeDRHRfmi+JjxXJmS2oM02tyS4iusF1AhDF8yC+jy26ySLKbBOf87TfhXmUE7H2gyidibojCJ98EE/D5P0ymdQT4/kqnLotLYftaBmJuwn4T1d70pwTsqiv1fLullySV4UgWlsPfbNFs4U12Mec8VVi5trU1vkTAhbJnKcm6gQhCb9iMvMyv1hK45EPyZ1UZDNX+1KdcC2Ynxf+IyKwX0N88w1OLDGFUBvwkc+qfgNunArxscwbPHHGqmLYUIxh9qs38owI3xDniWTarQmicqmuO4Io7O7LwjCIGzOlMBEKUEpNAf1yTsgEnIE/GFZu0cDALZsV3udbRBIsMPKC5Nd4S2vnj0uDo5V7Dgf1va3tiO1N5O50x8Bxm4VOFEHM71j5lln5/G8AEsmNCk8FuThEuA7L4F+9YQIqooc+RMBfifnydDr1tNOs97QiotNGjUkkmdMStaUKQYj+FD3hRW6SOWMkH/ANFMKTGyIK8kLAElF5YzFYB7sdAYPmu3Hh8ncbVkzkWhjLe1GNjZDETNkkwnEDfT3u0BmBn5FkI6VVTIoLT30ShB3KAqs9l3WR4u/4LpztncuZcaMnzHFgxjpJ0DugAusSd59ku0QGLs329wiv7HE/kvDkkbyCJaq+ksVyoghC0IE3PhKAqLtp2aagbPH3cTRblenvuVxlQqS7ZU9sL1WCEHr7xJwtVxJwvOvdo8x8TDad6vb2RxImJNJJS1Xlp4KDu4wkjlJU0pXNvyYIxYmoS4KwTxF2chFLBO5zOxAFJmMJwcwvEFpo9FFJsDfxqiEC/mu3XfhylVSI7r75JIKp6mW8bLFTPYXJo6eWhuqYQIJAY2vyAIPswH5ju2mArhodmrsqLPCgvyzxzQ3xbY90671lhgPCsk05WF8h1MVql669jJRVCcLud3mQQfHvR6x4frHXSEJ6yU7UPfL63KOVMJLFoaqCk6r3ni3qHVJr64p2i6w73A6OQTkh9B1E6SpYtwQhhuljCip+ujVvGKeq5qguptu8kIATy60o1BaaprbkGQQSUWXdpoLCdvx2g/m/VAPv+eVDoAgfs+LmAdJw38RnZ/pS3wmwc3fSVV7rWpBHmWmlOwf3RBJEIThi+YkyKHObg1ExM5zYce/vwm3IYl4ymE6JQI0lj0/K23tGZnMyyImxuJgLEhtLiCOsoGYlNn/encskCkGIjjW1dp5EZBtTjMkdga6YFd90qjdHiuTUqHrqLgv5LYtVpSp3nhNEWXQE1dN3QCZEX38lTRAziCBs9UJb58nFnMCu3aMNgtAl3wTDuLLBmP07rwWE2KXPnv3ie0yKfa54TPdmSkNY0nc31IXLc9sS43DJh1KMd2NcbRJ+67bIsE8Ls17aETGjBWR9BkyfkFiMPEpW/pMDAzc/VclH6FfH57LTZJ9ELb4JZBQTBkWJvBtVpeFzohQ8d4fBOFNC0NSyMPlxtnB5ued64KaAmts7v1tMmuSClh+0KH7CYN/qP7rJtWDfjwMAusaTJ2Q8CYPG3uuTqEpKcCJhkDErcQcVMgM6j29SJVHAd/NE+H6mr+eM8TrM+ajtxOn7G2zypbLgkWITlbD4bAYLL3ZpAEw/WdMEMbMIQoxW7GgPISIRjngsLHfZomingqRipi3bX2HnAJvripyBIoYxUF3rNxpsLEmn19hpOav9BKXpdKUDFTtNvxSUUvKayBOEg0nAiVIUeZaBfpG2spgKVBCxN76RiD2QiSO/PMiPIjDlqOs9AalNfdWWUU8QYmAyNYtfyHO5Os7ZULnSshI3gLkRIBHa3LsIV3PDEhQf6lWA/wgYxWi5LDLyCWunnTzfwQsMDLsCNsIvRpsmiJlHEPaIxa4iZlrfI7JTVap4hPqstfwYGThlYF1KWGxEDidQDGPwpWIYgyjhvcv6Y3/koGPX93c/Xm1iKDn9VJgs3ta/G7RUlllsMghCjKmlPXkwMwkjA//Ngi+YWx3SwvAu7NxJpBHtDCvr+T0wxHYlBFG4qC8/1fj4B/ndtakO4xE2qLNa2eTES8e3seI+jseOMXLWOW6rPD+zbU0QM5QgisOmprYVCwjWJUI9G5EoHiGic3fb2boj6qWy7MsqHJ2NcwA+QpL4PeRj5MeY6bw9duW11eiLypcvVAmxeO58Johcy2HE5ptT2nnXZBGEs1lIMF/MzMsVxiKqvAribyKPy1TzYYhKUcNDCMJn4hMG+1KP+s1JhQQBn/ziLzGMxbLEPi0tXfuywT+JkPlwiIEfcy7xVW8ecRX5CitTVF9+iwChMg6TP9Hc35jxFecbKXMqZdzXkOAlvb2pf5dshto7rwNDxDorPD5Z9aTOpBEcPcPGO1V+r+tL6iCQhb413pBYzGyHcBaZqoRKybmnEPcTG4tJW35Zyzj4IqbTcP71NgM4gMFtAL1dot7aBPDfQLjVZOO29f3df63k9FINobNxm5U4ksFdnqiZQ2B+TFy652Oxq8MMACaTIBwcRKrMWMLsssdih0IZU00I44HnAX4YMK5tiFt3eheSKFgWTU4PIuDoogrEUV+aYDxDoF7L4Kv32JmzYYRfKUGI/vp4JN/VEOfDfcZHC9q63h1nPpYJB9ohsxk7FMduY0TAoyDcMNLAt1cjknAYrraRhml+BkQHv3GH+B5XMMEhAE++4VB3N4NW77GL+aAbS0naWWk4dH2CmNkniDD5079rBDQCGgGNwNgBSkOhEdAIaAQ0AhoBCQIzVsWkpUEjoBHQCGgEghHQBKElRCOgEdAIaASkCGiC0IKhEdAIaAQ0ApogtAxoBDQCGgGNgDoC+gShjpUuqRHQCGgEZhQCmiBm1HTrwWoENAIaAXUENEGoY6VLagQ0AhqBGYWAJogZNd16sBoBjYBGQB0BTRDqWOmSGgGNgEZgRiGgCWJGTbcerEZAI6ARUEdAE4Q6VrqkRkAjoBGYUQhogphR060HqxHQCGgE1BHQBKGOlS6pEdAIaARmFAKaIGbUdOvBagQ0AhoBdQQ0QahjpUtqBDQCGoEZhYAmiBk13XqwGgGNgEZAHQFNEOpY6ZIaAY2ARmBGIaAJYkZNtx6sRkAjoBFQR0AThDpWuqRGQCOgEZhRCGiCqIPpbmrrPISAX4wNhXFfQ4KX9Pam/l0Hw9ND0AhoBCYJAU0QkwR8NV+rCaKaaOq2NAIaAQcBTRB1IAuaIOpgEvUQNAJTEAFNEFNwUqJ2SRNEVMR0eY2ARkAFAU0QKihN8TKaIKb4BOnuaQSmKQKaIKbpxLm7rQmiDiZRD0EjMAUR0AQxBSclapc0QURFTJfXCGgEVBDQBKGC0hQvowliik+Q7p5GYJoioAlimk6cVjHVwcTpIWgEpjgCdUEQTa1dRxLxT7dizQ+PxuP7behd/a8w/JvaOn9AwKlj5QhPIM8dmUzqn1HrMuGsbF/Pt/3qzZ//ucTs2S/PZ0KSwR8DYU8wdnCVHwL4WWIjDcbqkZG5v92w4aqcQj8iO8qJvjTM2XIOA+cCiLnecS9M7spkUv8b8l5a0Nb1bgP8aQIOBbAngDl2HcKLYP4Lgbrzo7mfrV9/y4thY6jm742NK3eKJcwuBneB6L0ujPMANgIYBCjVELfuHI8z4b4LV+wRZ3MFmLoAvAfAm4vjGALwJEB3w7Cu2X0nPJpKpUyVMTa3d14HxrEuebw+09dznEpdUUa1fkdH8k0jOboNhE8U2/5bnPLtfX03P9fYntzbYFwE0H72nBbmcz2DrsgNzft1kEwuWHDYDrFEfCkRdTHwIQA7eTGxyLpqsC/1ZwCsOi6nnN3vvLEYsI4H6KOu9sXcPkVMfZbBV++xM2dVMff2YaLkJ+rYJ6N8fRDEwq73kcW/AbBLEcTXLOaDBtOp/iBQJR+JKK5Ut63tiO1N5O4EqLH4jlfI4oMGBlIZ7zubm5NzYOAEEH0NwFsjTPQLAE7bfRfuCRL2ClRM1NyePBNMF1ZCDmIBIaZrCGhSGEueGFeY+cS5g4M/e0WhfMVF9u1I7pwwje8z83IAcYWGXgXxN5HHZZlMSizqSk9hAaXvAtjfg59f/UfI4NMG1qV+G7Yoqi7wfi9SrS8jCJj8McRoKYCLx8je+yKmkzLp7ivLF9Ujt6NE7psEfNa37tZKJsB9HI8dn+1d86QK6PY3FMcqMH3VRcQBVfkxMnCKCuZOIxMlPyrjnSpl6oIgZAt92G5eTEBTObHY88KEM7J9Pd8LmqTGtuR8A3QPgO0L5XgwhsTi/v6bXn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h8jT2KsI6M4PCVCNo8NHlVhCCCQJvi70IQUwTOq5reikgfuTVK12m3T4Q6KU6yMbe355ELYFLMnij918qmM91LmXHDpGBxwMNlw/jUb9avfkoIgm4D4ZM1HOoZzbXapo6gJymktQH9AkRNGou70Epu29pw5isfYeDTpULuHtu6cHltI4Kpq0e0YyGIqXzMIeoIQYQAKUoRnfhFxcIpFXKnhTE59OpLL9bxz1ndvmDZR51xeQAMM/OppYF8Lur7eETT9A0EJzeI+t4gwmz+HmlKfUVNUwkPPun2oM9699vKyOihzoRGGpFp6IOLh9WWEESUTSpCWSGICGCFKao5iflGbg3TpirjcTMJ8qym9kz2PDB90xH9tEyMKyrl5ouGhm58NegdqmkhT35Tbvw9TfrJu1pSfKwuD4NqVwiifgThESZbmz5UZYVD2VTinpq3sZoOv1SjHqJDuqElZZ7lNb+qURVAjwxaaU9SpQwpvCLIVqPyrgLRYtvaU0mCjnfcNiYtzWr6VBXq3JnMSAgi6COe4u9CEFMETldN7/tQPyc1nW4jyLM6IHPXyyBcy0RX6ryTle6juVI+ghhfAugfNWMODAQnBFE3gtBt4L6xlnRJefzCb3jkvlYXzfsZTStKhdUbnLfO1kx2P2JS2f1U1rfxJyiIosdt9DUQfx1lXG4Paz92QFFJjOgqR7a+Wn9CEHXcxxzz2KCWZ2CzmkBkkdOF+sGmt46Cr7K6dsJDilS6SuVta8+jYO/OYYbLKoH8eJpH53spxSdV+Fi/BC9yg7BCXhxVKuRUADvtE9bM1SMn9TWjwzue4WV04KGHUiLGZaWBvN3UdPzdfJLyKJOWF8FYD9ALIG6BiYPePGDs4x4YPQ7DPHpwff73fuvZQ5+lqrxGQIlBTwC8CwgLHGbezmaFIBq038oNon7A6kxLAzfvqN07vaSt+kSXD/b3nuOnUwgQE0V5DZWY/mfmSPM5YcRTcoOITxAeJ/tQ+Rp0uoUAURPGdFf8c4DfF2VhjJVV5EDHOlOgerRDbZnsycT0Q4fRg1+3Sl+xmpn3tUUpEIKIPlGhaghBhIIpuFCcLHDBrU+U8PDQDgwDXmuh6n17PgFn2GzRw7xCBdapzvhXnajBqwEhiHgE4aFwDswQZ58PTYY5BEV6bW09fntqHv16NcbTRHpT75USSa9lb8ZLTKXp6jUmunC0xbx+1jDdbLMWE4II8wVPoYwQxBRA01XR6wf0vgFxuvTIqBWkrHZ1qcQPs2e/Mo8JWQar+P27Vf+piaCqIidsBPPtZjm1NkpI5lqHQhDxCEInWnLmoA5aT1Xd2K0AddnKhsoVoeq2bKUjwTiJx5TDap3U1simN/NQPwbG1ZXR8q1Oa6Wg97L/bgUdfJ7aiHE2gAW2fobB/Ahbt9bydaoPieYaBdl4ZYUg4uEntQUBQUAQSCwCQhCJnVoZmCAgCAgC8RAQgoiHn9QWBAQBQSCxCAhBJHZqZWCCgCAgCMRDQAgiHn5SWxAQBASBxCIgBJHYqZWBCQKCgCAQDwEhiHj4SW1BQBAQBBKLgBBEYqdWBiYICAKCQDwEhCDi4Se1BQFBQBBILAJCEImdWhmYICAICALxEBCCiIef1BYEBAFBILEICEEkdmplYIKAICAIxENACCIeflJbEBAEBIHEIiAEkdiplYEJAoKAIBAPASGIePhJbUFAEBAEEouAEERip1YGJggIAoJAPASEIOLhJ7UFAUFAEEgsAkIQiZ1aGZggIAgIAvEQEIKIh5/UFgQEAUEgsQgIQSR2amVggoAgIAjEQ0AIIh5+UlsQEAQEgcQiIASR2KmVgQkC9UEgk1mye5lT/QD+rtriSyb4kKFCfmN9epBW3q4ICEG8XWdG3isSAh9fsGzvFJvnUoWvKxbzv4tUeYYWbm/PzoGB00AYGSzkr/SCQQhihi4QAEIQM3fuEzHy1tbjtzdmjXweTOcBKMvJNnhas9ls0zPPG0cwm/8B0D8y4Uul/ty3hSCCsZtpJYQgZtqMJ2i86fQxu7LR/GsA+4noI/zEtme6rwDjzFoNIYjw2M20kkIQM23GEzReEX1MbTLbM93XgnGyEMTU8JtJtYQgZtJsJ2ysQhBTm9CoBDG1XqRWEhAQgkjCLM7QMQhBTG3ihSCmhttMrCUEMRNnPSFjFoKY2kQKQUwNt5lYSwhiJs56QsYsBDG1iRSCmBpuM7GWEETEWe/qyr5ra9lYBJinAvQxAHOrTZQB/IWY+k2Df7r3blzK5/MVr+a7urpSW8tzrwP4OFuZfEtq83F9fX2qrdBPuqP7EiZcMFGB17akts329V27xacRmt/Z8/cG+J8JOArAPgDmWOUJL4L5jwTqLY+M3rhhwy0vhn2Ztkz3F4nxrVp5Bo4qFXK/VP8/b97pzc1zXj6MwJ9zYPcagEcZfJM5Ur7Or7/Wzuw8A7QOwE5h3snef5jyYct0dZ0ye2v59S6Ajga4E6D3ANjOVv81gJ8EjHsYtGrv3Sv3+60Hv34Vbi0tr3wChOVMnAHwXgApAGp9PQ+gyMANo8M7/mrjxitHnW1Za3aUbgPhk6HGR7husD93Sq1sEBHPOzi7w6wtuAOgdK0OMS4tDuQuDNVftdDYN7HrTQCytvWzslTI/YtfO8ps96nnmg4kMk8B4xAbPqraJgIeAOH6WU18a19f/m9R3mmmlxWCCLkCLKeiFFaA6SuOjcCjBX6EDJxdXJ9XZpisK5TO9Cxj5p8BaFK/M/BUCpWuQmHN4yFfC52dx+1UweidALVW61SI6IRif+9qrzZaM9n9iOkqAtpC9FMmxhWVcvNFQ0M3vhpU3osg2jPZg8D4kbK7D2ijDKbLYJpfHRzMDzvLvtUEYfldpMoXgViZidoJIWBYwevB2YDa+J5+jroBfAfAnkHYA3gGoDMHC72329dcowlCvVe6s/tiBr468Y481ITmRYXCTS+FeG+rSGfn0veV0dRHwN7VOq+SyYcVi/lBjzYovSD7CTbxgxDrSjXxGoi/jjIu162tsO85k8oJQYSY7bauZftQubLatgmHqGUVqYBw2cgbO16gO9m1ti6fazRX7gHw4VqDzHRCaaD3xrAdtHV2H0yA2hBmVes8UTF44Yb1+Sd0G84zz9HZDPzH+G0hbEegx2HQsYPrV/+XXxUXQTAvJiL1watNbuyGEuJhwh2jLXzcxnvyr9iLv5UE0b5g2Udh8s8Bfl+IIeiKlBn8pVIhf5nXoaFWqb09+3/QRGodHBaxrwoB39g6vOMltTU3LQSR7vkwG3wvgF2r7/u6yXzY0EC+EPb92zt6zgDxj2wkUxyZjcOda0D9rg5s1GR8g8HqdmEdsMI/PGSmKscO9d38dPg6M7OkEETAvKfTS97LRuoOmzNWrUYFjKeYUCLQqwzenoBOAHu5m6QrR4Z3WKEhCWrP9KwE8wrbRxFGPDRevK2z+/sEnFP7AwPXlAq50zQbELVnsueB6ZuaD0qJQ34PGA9a7RDvD8ZHNBv6ZhAfOdif3+AFm5MgAKwCcLStLUWairwGwLSVwPvy2E3GdRrXOXCNkTV/XrXHzNsQWeKx7avvMwLwWsD46/j7GfSjIFIL8+n7rANLtMjAb9Q6sOBTYyJ8DIydNW0HxjFSIpuWLZRnWOKSyY8l/sN6gF7wWXMVBn+xVMh/V1W2xGGjb6wA0d+PNWZ+Aqj9t/WHDW+KyibCk7C5YXAgf1Wt4yARkypn3bCbsAagRba1GCgeqpWtiuzyAB0xXt/Dw1uJ3GbNeeVygE/X4UOM3zJIrbEmBh9IwIeqIjl78YfILB9eLN78lzDzP1PLCEH4zLzHh1phxq1mE5+vOaVTa2b5/gaXrwLoQFvTkz5Ye5eaG8BzbNDC0vreh4MW5byu5e+eVS7fC9ABtg1y8WAh/ytn3XSmeykzbnBs+i8w0xdGt+yQc5LX2KkTalP5N0edB81UeZHX6UtDELVX8cStKr47vyq+U7L12vOgOdp08NDQqk06LMJsXEEYhvldycZHRne9ggmfmTyn+LE5MvpvHjoTast0p8kSq03cEK36RJcP9vcqUneJHq2+ynNXsqWnsT/8iMk45z174D67LsMSQz1PR4KhYintYqvxrMGVQwcG1vzBOcaoSuqwOGtuAA+MpFILN/atmiBsD8DbFvR8kEzrBrJ7tchmMmlhsdg7dmiZeDwOOnp8VLX584/Z2ZjV/O8EnOE4HN3VkuJjRS/h/RUIQfjsEJrNrgLmi/baA9/xV0BbiuwfAnyirfknUeGFg4P5P9m71Cn4wHTm4EDvj4M2r/bO7GEA3WYTL2k3VCuQnWneBeCDtjYfQoUXO9/H2WeVwJSooyY6ULvaN0qFnCIO1wbnQRBhcNN9+BVmXlIayP/irSSItFt84ouB/V0zmewuZcYvJ4snveXz6XS2nQ1SBF+7Fanm7kGFewYH8//rtSbaM9n5YFLGAOPz5EVEjSKI+Quy+zaZpDb5favvOfLmzerTpUJOiVF9n/bO7rMBXD5RiO9EBUudugIPEWMgPoqW2zLZk4nph/bbLBFOKfbnlB5QHg0CQhAey0KnHwA8RUWuVqqnlrV2RTABXysWchc7C2sUfGHETC7xlJfliPvjQ6CoyP6O6Uz3Ccy41nb68tRzaAmC+TaYWB6kGNTqZAgXlvpzl76VBOE+GcP3ZuMi2Y6e44ksY4Ta84SZKi/Q3MJcc8rAo0gZnyr1rf5z0A6mwV47T40iCJ1lHgOBYiateEqvi9OIZBFFVERtnd3qJnGRjYg89RxBeM+E34UgPGbZaWEEQHsD8Fsk7jZYe+XWnIoCxUyazVRr8aG7ofjdAHTjiXLL0d26/G4B9v50Zo5wmFxOPp1PT56CdLrnUDZ4CQAlNtyLGFdFMeHUzK9WD9Hent0TKeoD4/21cQYF0rPjoTnBV5jpyNJA7532co0iCNVHW0f2KCK6eeIwoV/zkw4g7hualth044t6A4hzy5kJhOAcoxCEftbVSUOZgZ46/qF6K38914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ZBUPVKCcItrpJbTmq3wXpxlCu24YDFozDoeJcMftTbHx0iop9PC5vuEPpcCMJt1lrjvRDEDM9DixAEegcXH4CcdVdJzgVl1eQpPn8FklDaiUeY8O1sIHi7Ll9EPhpqMBclovPtSYFs6ppH2TCPGV+98n8bMV0VEgY5EpxadE0Ev8uMxWUJg1xyNGicDB+GyQvT6fhjuvE1kyAqYPEimL8ACzeU5gLv6TnldYFg9htMUAmX7HlFHE8fQhCN+JLr36YQRP0x9dViqxCEErqWC2tV/5DB6B6hHP3CIW1nEZfNAJ4DiKFsnoA9KuQgLtYxmXGrGTA+d//qFU/6Athj4TqlHPXkR6K5DFZSKrXaMwDliLG6KzT7k8WAgc0kCCWICxbbUpvmsbXeA9AcTTDIzUz8L5mx+GW6KRCC8PhhznAxIYgZnoBWIginC2sGMtZE9pg1a255wQ2uvB47iOVgUncLr3Ur7/O9Y3pNn+1oixdiVakFTcWqslt1eWn+eWZalkmO3OFWuL//xHdYFFD5GVSUXc0zPS9CswmiSBL6uF1uo8u/V5uAL6QTMZVdThslWAjCE44zXkgIYoanoJUIQkFRy4W1HcqCCewXCnmKi4lqvKC9EUTXWIHst41c8IhXk9z8QEM0T4P5/O4QRvxEofXSubo8f+pZUgSh0oju7aFOjkA/3Ro0vuoj3aouPedUV6U5KWaCIJQwVWCh2CDDxKePj8UfroSdEISHL6sFighBzPAktBpBVLiwfsZg84hkcuX/+IFMWTnNmvXSHCZEGXwoCAeAsautDZWL4ikC/Y4Y8S1bdlprt1JSJqQB07qYCMeX7OpNIjo1NTaywo88Xssqubu7X/oACEuYOAJgf5saZR0BDzLziJnN3erlZKXrV13OG0znAVA5wXe3lXnFYl4wnown1N9miiCK8igsgrNe7AnAOJ3J6gdoH5tacCPAf2PQ7RboZ2sSI+qeyDW3iBCE1y9xZssJQcws/tK7NwSob170A2zRD4tpPf2ovbx1IaUEAUGgFAEhCPkm2gaBou8EgHNg4ZeZZMzu9ds24xBBBYF2QUAIol1mSuQUBAQBQaDJCAhBNBlw6U4QEAQEgXZBQAiiXWZK5BQEBAFBoMkICEE0GXDpThAQBASBdkFACKJdZkrkFAQEAUGgyQgIQTQZcOlOEBAEBIF2QUAIol1mSuQUBAQBQaDJCAhBNBlw6U4QEAQEgXZBQAiiXWZK5BQEBAFBoMkICEE0GXDpThAQBASBdkFACKJdZkrkFAQEAUGgyQgIQTQZcOlOEBAEBIF2QUAIol1mSuQUBAQBQaDJCAhBNBlw6U4QEAQEgXZBQAiiXWZK5BQEBAFBoMkICEE0GXDpThAQBASBdkFACKJdZkrkFAQEAUGgyQgIQTQZcOlOEBAEBIF2QUAIol1mSuQUBAQBQaDJCHQEQfQODB1LwG1T2DLu6w7xwtHR+D+ajLd0B2BwcDC4Nbf7NQCfbAeEgK+lErELmgHS3Lkn7BrsDh3FjOMAvB/AHgBmF/rOAXgGwFow/8rKBW8fH79xnV+5yr47vw0AmwE8B/CzYNxrEW7bb088EI/HTa9N9UaGvkiMb9vK/zlIucjY2M3Pem2jlnJz5nwi1L3jixG2jOMA6zCA9gPw2qk2CS+A+TmAEgz8KjuLV6+9N/5SLX061S2ThWgPMHa1lV8H8J8V1hwwVuy7u/WoH6yL7UQii/bMcXAMwJuLf2PClzJjse80YlyNbLOtCSIcjs6GgdNBmEgn4lc4ASUE0chPyH/bfX3D72SDfwNgt5LaD1nZwGHVLMZepIhGo4Gn1+FQy6ILCTgEQMBLPQBqQb7XIj57fCz+sMc6qANB6Lp6GsAX9tmTY14Wr5kiiJ6eU15nBHPngfjMaYTgDl6OGasC4HOTyfif3Iu7l5g7L/rGgGWcW9iQFDcB7hWBPzPjnH334pVesBaC8AJpE8rkf+jPGccwW98C6O1u7CwE0YRJ8dFFeGDo0wAu1VQxiejU1NjICh/NeSraE4keRExXEdDrqYK+UA5MF8Oyzk+n42p3X/FpEEEU+4xNzOJPuO22Z4AgKDww/CGAfwbgDW4YVXifA/HXkcN3vWCta0eRVCCY/QYTPgkgWL0sPMbBwIczoyv+4qUNOUF4QamBZcKRocvAUDuT/CME0UCw69z0nMOiO3Vtwa8B6is0nQVgbNvN8x0wcWK1i4JGXLVgLQVYEdI21UZ5wXUAvVL4onYEsHuFod8Jk09Jp+P/VwmeBhMEALpiYvNOy9euvUJhqH2aTBDUG4kuI6Yf29R1NX1BxLiSLT7L7/fQO2/4QLI4BuCdFQTYCNDzhTlXBLJXBSJ5hiw+KZWKp90GJAThhlCD34cjQ1eDsUwIosFAN6D5nv7ogEF0JwC1CIOIRpitAwF6d6G7l8niBV5+iB7Eo3Ak+nkwfVOjTtoAwtVMdIVO1zw4eNqsbHbLIRZZqq46dUxTRxFwz9ZZHK20g9cRBAPHZRKxX3qQHUpn3tX14m4UNCLM1vnqtFxSzyTCaamx2HWtQBDhSHQumNTYSlWHTxNwOSy6tatr61Ojo7duKMo7OBh9zcSEcQAMPp6R3/TtXTYW5q+kk3F1j8JecKsgR44JdxPzf3QHdxwdHb16i729vGbiaeMANvhzAD6qIbn1ID42PRZfU0kOIQgvs9TAMkIQDQS3sU1TODJ8CZiXF7shwlKL8UECPjL1tzpdVvdFhk5kxrUlP3STgZ9wNvSV8fHrX/YwXOrtjx5LRFcD2GVaecIP0mOxs50WrloJwt6Xum8jgy5hwsfsf2fgD4aVPSKVumW9bizNOkEU7gNvBNFCmxwmmC+EhW95OQHkF+hn6dMMfKtkzl60wIePJ+Jr3earr2/R/mwEfw3goOll+fcWYZnXO6TewcUHUM5cAVCPH7xVWSEIt1lq8HshiAYD3KDme3qW7G6EzHttx/78D58YexPRzbZdes2X1eF5i98Ly1InFftudjMTfyozFr/G6260CIXDrvRlg41jkskVymKl7KknQajGlXquewvFGTjcvggz86JMMr7NSs/2slkE0dcXDbORPxm+rtg9A9/IJGJf9Yl1UU115bRTG9Gl6bGRsyq1pU4jW3N0E4Ajp08GXdsdtD7l12rRAW91jKk4LiGIBi0gXpsVgvCKVGuV64sML2ZmpQ4pqGt4PIDQUaaZ3QFBGgXjLQWJa7qsdtrNEuisVGLkMp8L1hSIfZGhU5mhThLb1E3Mq2BhiW6HXG+CUIKEB6ILAFoFoMu2EF+SScQ+M5MniN7I0OeI8X2bDFWTvHb+CI8hx4PpdFxZcWmf3v6hM4nyxg9T80OE27oCfIpfcpjaGISjb0GAlMWdMs8tPs8YbB6RTK78H50gQhAzvO4IQczwBFTR/aTvw243AIhqFjbqHRhSFkZTaiag+stqh0X059nNO59R6ULXbVj5HWqWVoHwQVtZxzuTRhDEnMElr+/K5X5ju7NRmnlHv55mnSBKf5MA4t3B9SePjo4qnxLfT/lmAhvIoiNSqZH7dY1pTqdqp/8ogsaRXq2PHImn3JcElXx2hCB8T3dtFRx+mM6NEq5Jj8VOKxZwMXOlnoHo+wyij8HCAhD2LexAcgA/xqBVZPKV6XT8sSpHQb2Di/dHzlxkgBbwpG5UOWUVdznKxv45Ah5m5hEzm7t1zZpbXnDrS4PJNAco5QhmdAWXEUg5o73NZsGjnIH+k0GXZTfvfGctC6abjPb3Gt+HCQY+lEnElMpJtzOu6rLawQlvPVk0P5UaeciPzLqymoXLcbFoBEHofwuTJ7FE4oYXS2WeKYJgxnWZZOzD1Z7WClZIauduKOsyBucCbHzMSZ2nmxcAy9OJ2I9qnfNJP4r8KeKN29ri1MQsHK0zUhCCqBVxn/UbRRCbcsZeBvgaD7bxSuVxE+esT7mZNtqGRn3zhiJs8fcAUp66Xp8cMS4zc6HzKl2iOhHEpk2v/3vXrA2fAUHpfiuZdSp5ngfoo+nEyK+q/SF7HZRmoZqmgnDYATqqThx3e5PmjerHvKetTE27WXtfk3LmVhHoZWZaSYx7997b+ovOkap5BAFH7+hmEURf/9BPSy7Qq1Yxef2miuWUxdnW3CtxgI4p/o2BJ4MwBxOJlY/7bU9TXplKX8zgQYPxKzZ4VXdgxwdLraCK9YQg6oC4nyYaQRBk0E+ZWdlrT7dMqSDYpMVIbmEqdfNfK8mfN0/cYcNFYChzOa/eutOadOtLRxAwzWMQCHwNwJAPfHMM/lImEb+4USSh8X1Qx/+yxb93YOiHBKiLyOLje5Hp7R8+hSh/zzH1MNOpmeTI9T4wqUvRphFEC6iYNLibIP5Keiz+7436roqTNDBw4ptyCIwS8qf/4lO3TYHfj0EIwi9iNZbP7xCym5aD6K2TTVkfAIr/n//DGoAe2LYiWGvSyfhVxX9rVEwvgfKelXlb/PyTjwmD1ZOOM/wGEOaVxGnJF2PATZftbHs/GXfmT4Axqeog7gZzD0DqcrbM01M5CXWF1n9Sp8fVEMTTAD8I0FE2uDeD8ACY/lsRFYPfT8A7NH15NiOsZip7B4YOezW0hTqlFC9WX7GYF4wn4wl7e6U+EirEhV/P6tKdLAF/h8WHp1Lxbd9HNYOook4jCCIcju5dcqGvJHNcDJt1gtCrYZA/Deey2a95UZtWAXG+Sm//8FFErPwvpjZjTDg7MxZTm56mP0IQTYd8eoc1X1JPa44fIQOfTq2O/9a+01E22U89g2EQKasI+ymjom68ZyA6xwDdM70OPW6xdeZ+e+E+nSoiH7cmlPsKwJ8vWbwddecup6qNBFzYFeQflVpvHDJv8b4hy7qqxFRSeay5mhFWOe1lvg+AXn+rO2n4uax20M8/OBEMzl87euPfq5S/6mqNIAidrr1SJIFmEYTa7oT7o18C5Z0SSx8VNuM+sHHlxCzrbrfwIH4B14xx2v2W3/ZqLS8EUSuCNdavF0F48YbVOVtV+EFqFkP8DSbP93DJrbX/dlKPVCCI9TCME9KrV6ScYNbad3swI6xm2nQ73koLWt/A0AUMnG/ry/Nlte6HCfDt3cEdo0764mrG5LVOvQmir++E3SwjdDcB7/GKTxMJIu+nEdpKNxDjaBeMniImFfzw5mwwkK6VvDUWVM+yQfMzq0f+6HWu6llOCKKeaFbRVj0IwqsJXN4mO4CVdtWNk4WG1gTRhyXFwMDJu5jI3mH33mTCuZmx2EWlMDkQhMmM5Zlk7HI3WDWmoBXNCN3ac3qv2fFWtCjSnsA8nm60BFFi0VbtOKqpV0+CUCe/oGX+AqDB6QdgZz8MVa6ZBKH6U9/llhxdQoCyYPJ2/zap3r0PoHg1JwwNQTQ1pHnptyEEUc2vpY516kEQfnIP9EaGziHGhVNDcLgUDIej/0QB+hQD7wNwMAhmgM0j/VhSlH3sDgucliB8nAJ0F3t+4gR5mU6ddYmbykhHyAA8XVbryEXd46SSsY97kbfeZWokCJozuGTXUM48mAingvOGB6Whql9kGEdlEivGnWRvNkEU5KC+edEPsEU/dAmWpxNbhUK53yD+xt574E63MNu634Ha/HE2MK9RYePdvhMhCDeEGvy+DgShvSR1/JGVJhwCfmfwlmOTyds21nuoNRGED+ck7WnFRyA5L+PW5n1gOjOdHPlJpfrh/uEzQGw/BXm6rNYRhFukXy/jqLZMg6O5erISmiGCyEOm7vGefDbwfsA6g4CTPJhdl0DNj4BwZnos/junOdBulGY4IZgQRLW/mDrVqwNBPGEFc/PGR29+yotImh96w46wtRCEkzpKN0aHnZfnSKNecCu9T/Bqm643W3T3rLY5V23zgWgxFZMX3DyUUZe+5+yzB77vtsOeSYKwj6MYKdUyrIVEdBIYB3sMCV5xrPpTqrNfiAdsay4iBFEzhLU1UAeC8LXAN5ggqL9/8Z5sWB9kxikADp32w/GhYvJj2tdogtBbJNEN3cF1y9zCLzh4Q7teVrfDHURtX34+s13GIv6E56ikM5xy1GkpUNLrAAAYg0lEQVS8U6G1CYfB4GUuhFHxtCR3EDV+VRWqt2XK0ZoJwucRtB4EoRZk5bkdID4I4Lcy0/sKaS/3r5jtyg9B+FARNZogNL4PntRExW9VGzrB5bJapzZTlmr/2KH7hAfvvraQDKhxP6bSlmtWMRFeYM5f4K4xDNxlTgTu8atXb5UThBvqyrk0OOvFHjLoK8Q4Quer43Tf0tc/dCETzin2MZO+L0oGOUG4zXaD37cJQVBPJHogMX2eCMfpnO48wdSeBKEz9/U0XJdCT5gGz1+zOv6EXm1WHhBQOQ9uT34QfkFsF4Kwj6snsuTdBpvK870kG5z+BKrx4hY/CL8fikN5OUF4ANLvCUKZJAZM62IiHO/Z1G9SDpX0Rc3Jtly+bUgQDl61HpB2LeJ6Cmml3WSNVkyuYHgp0I4EocalS/zjdIel8cBXaYjFk9rLB+JSRgjCA4h+CGIyUQ3fBPCbXJpWUVX/TKCExTSaDRn3K4ehmi6pW0TF5BBZ0wPSXopUvqzWqLZQ71hM4YGhJQCfS0yrKgVu6wSCGBw8fuctuS5lAq7CqYRUpOIC3ioBVE2P5jvSngwc/I/qGotJGU6YbNxEMP7g5uAnKqaapr32yq2qYipczN5a5swEPM3AdYBxZzZID60dvVGF89bm1213gnDwY9isQpqr4FP+Z5/VacoelbbiZbXfWEV+5dFdoDvpvDuBIHSLMzEuSiVj5/rFtrS8zirNwVenLJ+IV4s5rzI6hDjRnlKEILyi2qByrUoQmo/IBOGnyPHZXnLyKrjanSC0vg8ePaF1n0t4YOjTQD5L2Lancnu6+4+6BSPUjs8htlQnEITWzNSnEYjTMtEzuGgfIxdcbc/D4OTMqU0SRfhSZiz2nVqXIYdNj+NGRQiiVsRrrN+KBOGQMS1jTWSP8RrJsr//uNdaNEtFpVSmrpNPm91BaGIp+XJK9LKLBFDxslqXH5mIRrZu2mlpjQmSKBwZ+j4Yny2RU5uYphMIQuGgmfPNFvPC8WRcBa2s+tHcLTiGg9GbVXuOg1ZRxp7+6OEG5dO82jzZnVWdQhBVT3l9KrYiQTh4JvtKeKPffU/PjldEsFYz1Vrr62ZSh4FT5FavX4KDT0TFewVlMtm9w0vXMvOwrR+TCKelxmLTckV4lSO/EEaGTmTGtSUOXn/MGcaR969e8WQZuZV74Cu9Yl2dEd3kb8YltY6QAR6dmIXja4jcqiHjyhZpupzhtW4MdJflACaYaUkmOaK9ZxGCcPsqG/y+FQnCQRfrOQ6Qw6LWVieIRh3zde26xnTKGwtYdwLYzfY5bmbmj2SS8ZjfJDbhSHQumNTpzt5exeCInXKCcPx2gZtg8hk+sjBOTZWOjN3ip+U3PTm6CcCR9iVIxeNii8/yquYt1tVGPVYvuXKARCGIBhOAW/OlBOF2KeaSk9qtO3ixYnr3EUt3fM2mrbfY8yz4ihgbJKW6UEHlpkXAdIocW+sJoNb6GtB0uv+65ILWn0zg5lntlLjJU0rX4vjyeUGepWUAfqCJJXRXd5BPKs25UazbKQShxjtpvVdGyGo1fYTI+PLee1i3u4UFybcTjs6mAJ1VCPluD07oKWy+A5Grk1uGiU/36oHu7IsBFU5/QXr1iv9yWjiEIFyX1MYW0KSmfBgmL3TKudAMgsirIMpzGagfyO8twjLdh1lITfohMH8ToLdrUXO48Kt1ga+1fqmsDond65aLQYuty+V3Ht/ZL10K8Cc02G4A4WomumLf3a1HSxcvdSIMmbljiPElh7l5mKzc0ZXSz3YSQRRUcB9nhkrjW5YdEQVLPiK+uTuQfXR09NYNhTnJR63tsvhtYGspGItfJeOdS+ZrMxGWpsZiK72sLA6qQFU1x4S7ifk/uoM7jpbmCFEX7tnslkNMw/qygze3JzmEILzMUgPLaKJ95icfwDMAqR3i6q7Q7E8WP4BmEUQ4HH0LAvQbAPuVDN8E40kmZFSy+/wpga33gfKkYN8lqVg7jwJ4sy09pzZybK0LfK31S6dXl5PYb7rQSp+M3nqo8mV1cUcKh9OZrb+pb2fyb2WmtdNEU/nCyeST3JJAdRpBKJOK3oHo5wj07YrhY/ytDdXkTKfwwPBJAKu0w3YT6dKe1wFUCMHCKv3w7hVE2wjQ6enEiFJhVTTXFoLwN8F1L93ff+I7LArcDWAvfeM8HkDoqETihhfV+2YRRL6v/uFFRHy1/9DG2MhEynY8aTDfxcDrC2PTRp6tdYGvtb4ddwczwIqWRn4/Cp2VWKENrQWRvX0XNZEfUZTZ8nXWROis8fHrFdFXfDqQIBQe1NMfPcwgUr8Bh9+nG3JT759n5n+u5s5ItVBBTeRZgELBhywKnDI+duODXioKQXhBqbFliuk51XG2NImKovcngzAHi4l6mkkQatjhSPRQMC53VBtNxybHwLWmYZyvLGE0l90mMy/KJOO32avVusDXWt8uSy1Z4Px8JnoPbfcw4MU+5s49YVejK/QFAs7QqDEqiZKPosow/iWTWLHGbQdZbKhDCSI/fPV9TeToowx8EcDefuYZwAYGfsLZ0EVeiLhS20rNGJr14iIiXODx92hv7mkAX4XJN/q54BaC8DnbjSreE4keZDCdB+CDJcfDabb3zSYINd78hzl7wwIClqrrCRWCwHYBvY6AB5l5xMzmbi3xkyi77NWZ6tW6wNda3z6nmvuBCYAXphNxZUVUt6enZ8nuRsi8tySIm9tldVn/am5mzXppDhOiDFY+J2pu7PNTUDlhLZh/ZeWCt/uNoqo67WSCKIKeTxq0zngbsXUMmML5TIuTWNs3dhsB/htg3EuGddvWV3YZq9FfRffNUe/g4v2RMxcZoAWvRjZ4i0aOfPgbMO7lgLFCdzfl5WMWgvCCkpQRBAQBQUAQaGsE2jJYX1sjLsILAoKAINAmCAhBtMlEiZiCgCAgCDQbASGIZiMu/QkCgoAg0CYICEG0yUSJmIKAICAINBsBIYhmIy79CQKCgCDQJggIQbTJRImYgoAgIAg0GwEhiGYjLv0JAoKAINAmCAhBtMlEiZiCgCAgCDQbASGIZiMu/QkCgoAg0CYICEG0yUSJmIKAICAINBsBIYhmIy79CQKCgCDQJggIQbTJRImYgoAgIAg0GwEhiGYjLv0JAoKAINAmCAhBtMlEiZiCgCAgCDQbASGIZiMu/QkCgoAg0CYICEG0yUSJmIKAICAINBsBIYhmIy79CQKCgCDQJggIQbTJRImYgoAgIAg0GwEhiGYjLv0JAoKAINAmCAhBtMlEiZiCgCAgCDQbASGIZiMu/QkCgoAg0CYICEG0yUSJmIKAICAINBsBIYhmIy79CQKCgCDQJggIQbTJRImYgoAgIAg0GwEhiGYjLv21FQK9kaEvEuPbU0ITrkmPxU5rq0GIsIJAlQgIQVQJnFRrbwQOmbd43yBbZ5PJ16RS8QecRiME0d7zLNLXhoAQRG34Se02Q6Cn55TXGV0TnwXT5wHkLPDh44n4WiGINptIEbcpCAhBNAVm6aQVEOjrO2E3NkK/BXBQQZ4XhSBaYWZEhlZFQAiiVWdG5Ko7ApHIoj1zHBwD8GYhiLrDKw1uhwgIQWyHkypD0iNQDUEIloJAJyMgBNHJs99hYxeC6LAJl+HWjIAQRM0QSgPtgoAQRLvMlMjZKggIQbTKTIgcDUdACKLhEEsH2xkCQhDb2YQ2YTjUO7h4f+TMRQZoAU9aBO0BIFDo2wTwHAEPM/OImc3dumbNLS9UK9fcuSfsGggFjyeiYQbeDWD3QlubAfwFoLstsq4YH4v/EQCX9tMzEJ1jgO4BsIsXGRg4LpOI/bJY1s0Poq8vGmaD7gTwukKdVyzmBePJeMJLf8UyAwMnvimHwCgB+xb+NsHAhzKJ2L2V2hkcjL5ma844CrA+AtD7bPjkAPyVmMYsg6/cdw/OxONxNTfyCAKeERCC8AxVxxekvnlDEbb4ewC93w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2MGzPphkuHhu583UdzJrO0tkZmI0TLAXwLwL4eykoz4RGw8a1UrGc9APaQtyqTikBUpVtcGyUC4RpV0YQiED44VplAZFvAwH8bZnpRInH3H300iVo7ln4G4B96FAZ7VRlm3JsJGec/MdDzkg87qiaLCETVuMKXISIQvrAVZBKB8MExIIEYBrAJIPdf28RzwNjdyWQCHh1t4oiXKSc1aqCQcTmDz7VMIRV0/DlbRyf+wDsDmFsE3VZmXpmKR9WUm/v2+fDFdGURgZguspUpVwQiGM4iED44BiIQjMcbG3hRf3/0b15M6Opa2TSWGT6K2bwUoAPteQn4ZiLWd5mbMucfHpkza4RuBtCtSb+NgVsMk27cd1/zxWg0mrGmUXaMpt/sYqJ/IsaRAMK2MpQAXpiM9d1QiyIhAuHmDareNCIQwfhGBMIHx5kUiLy58+ef2dA4e9slDFxq+/J/IWPwYesHoi8Ua5rKP2v2a9cBfKYtXZqBy5vC/H234tXcGfkIMd1CQItdJIiwIjHYt9YH5hnNIgIxo/jLrlwEomyE2QJEIHxwrAaBUGZnRWKn125n5qWWZmSI6NTEYG9Psaa1tHefRYTrbOKyhYFTUrG+x7xiKTJV9arBmSPj8bW/9VrmTKYXgZhJ+uXXLQJRPkMRCJ8Mq0UglPnN7ZEOg+ghAGpdIPswcG0q1qfWFLRPa2vkAwjRLwC8x5JgC4iPSw5G1S4kX4/TqISIekffmrNiw4abx30VPAOZRCBmAHqAVYpABANTRhA+OFaTQGh+CGpcuDo52LfSoWnU2tn9AzDOmzrqwMrEYN8dPnBMyaLWNRpHKMrAEZY/DJvMi4biUXV2pCYeEYiacJOjkSIQwfhPBMIHx1oWiIMXRA4ImdnRwwGTTWe+DyaWJ5NRtbBc9tPevqzTJHMdgF22F0Z3NYY3n97f358uuwJNAVlhGqXjwDiNgU9YdlmpxfVNBDzNzL2Z8fS969ff89dSNpQSiObmU3YxwmMRED4H0McBvDNbJuGvYF5PhB9zGj/3y7S5eflcI5w+FkSfUbOJAPaxbQRQByafZ2BtxghF3W4rbuns/goxvptvf/6Ap2oPNYxfTMBnAewJYBjMzzDhDnMsvboYs0gkEnppY+hAInMlOPthsL/F1s0E/AaE22aF+F6361o6/2SnVBtfO4QNVh8/6gDjxE66LHM8wjCuyZ/DEYEo9Ya7+7sIhDtOU1JVk0B0dCx5XxqhfgLmTRpZZATR2r70C6DseYf8MwbwomQsqqapAnkc1ka2kEmHJRK9TwVSSa6QbEeeoW+D8QUAs12U7epgoZNAjA/v+tCspm3ngvD1SVFwrvTPAH0uGev9ududXGrB32D6AYDDi2w7ttfo+vyJTiDIMF6GyT8F+H36pvC6xvDOkf7+W0dsf6e2BZFD2MT1AH3IBfs3QPxtpHGdR+F0W49af/spp80vhcOZRjlJ7cIjJZKIQPhgWE0C0dbZfSozbrV2Jky4IDXYd7W9abmtqVGAjt3+N/7NWDh82Ib+NX/xgcIxS1vn0mXMrKas8uE5AKazkvHem4Kqp7U18i6EqDfXmXoqloFnYdAJqYHe3+ky6gSCwKfxBDvdtmCn+tMMvigViyp/FDsTQq0d3V96ey3pKpdCp6vvVYONRfF4z386GWMXCALOZWTFVYVT0T3aTQ8uz884FMlDZjhz0lD/3S+Xclput95FDHxDs5XaKftjBmfOMyl0n4TaKEW4+N9FIHzwqxaBaGtbvD8b4QdsP27HmDPNXYv3M9LhAev0EjH+IxHv+7wPDEWz6EY2zLgjFe87ze3XdLEKimzTzU6NgIz/ApABcSOAdnB2Sm27WGUL5/6xJpygO1ioEwgAGwHsbbFLbQn+LYGyHTKDDyTgo5qObCvDODoV6xlyalNbZ/cSZtyuEYc3oMQM9GS2PaoNbP4DKPvFXjhiKnG+xi4QuemZ/OFLNcUYB+gPudFEO4DnzfHQ4UNDazbnbS/CPjvdQ4z/YpDaZh0qwuRpMtPHlDj5T62dkS+D6Tua0ZTi8hhAfwb43SAssB0iVTvxPmyJDCCxmHz8yEUgfECrBoFo6Vr2XkpnegBqntoE57l+3Y6noL/q87Z84sgVO7/jrdF7pi5W81AIDUfHYndt9YF9SpaWjmVdBFOJY76TzDDwnaYwf1c3z63WXsIm3WRbPHfcEuwgEHkbHKepDlqwbF7YNK8FcIJbv+TyPJzr0PLZthJh1ehbu/bqdn/lvuA/y+B/tU11FZ0yLBCISSN5iMOhZan+nhfz/6QYDGfwnqHB6NOWtjh02vyMyVj1nn3wuP1Q5cEHn7i7MavhWzQxUrGK9MONYT7JaV1Cv5aFN8B8/tjIbrdZuah1kD+9ikMNMn7oMFUmAuHjRycC4QPaTAhE9qtt1tY9OUT/8PYX5ckELNJ8QRb9KmtpX3oKUXbaJ/+MMfAZP+ce3GBra+/+ERP+MZ+WgZfCyHTFYmv/4CZ/sTQtHd3XELBqMg3RdcnBXvX/jtM4EyfHcS9AXdvL1s+vFxGI4VKH/7Q7uQjPIc1dyWT0FXu7Wju6zwayZ1Lyz+sGG8fG4z0qGmnRp21B5FA26R7rhgBiXJmI912iy6gTiOx0W9g4yioOTpXq3v3sl3yGlyaT0f8rYiy1dEZOJyZ1sn5S1In0u+eygSMNrAGRes/zzxYYxonJgZ6EUz0Oo2qVXASi1Muk+bsIhA9ogQiEj3pLZPE8/zzdPxpNZxTIj1Q3OikVbj3PrrUjshAgNTc9S/2bk2g5CgTzV5PxqNoFVDTGlL0eANvIpCMTid4nrH7Urgu5ELt8GV1dXeHR9J53AYhMCnGRqTydQHgIz0KtnUuvBfM5lja4mSrKJ6eWjm41klCn/3MPJ8aacIx9mq+tLdLKRvZ8T34nXMZJTOy/i5aOZc0E80FrOP7pfteD/zlXR4kiED78UGUCkQF4kMOhz5b6Amxr776CCRdbmhxIh+2EcLoEQrvDiOnUVLz3zlLunFiHCT0KkFqbeJJBTzeQec3gYPTPUzvuwvsgALgKY6LK0a336EQsF2L9cwx0APgHAuaYzCcNxaOxUm3J/72Ac5F1CI1P3jSZF7qpT7NF2nWnnbdVU4Z2FFv4ruqFxIGRTsim9V1366taSycC4cNjVSIQapFunXXvd6mmaC4tmtYfjaYzCmpKi1rau28jwqmT36EldiWVYmP/u8MIItoY3nKym7McDiK2JBXvvdurLaXSlykQL5jh9AI3O4pa2iPHE5Gyf2Idoci0mZPNuhGPfUpMu4OsyLSZri7Netu0vuulfFSrfxeB8OG5gASiSLhvVn5RN7jZd6mMg+gmyox/b999Qy/bFwNLNaVg3n6a52U1AqGdZillt+7v2m20wDAD9xF4dWN4537Nvn3XVWk7eMIlqcG+K90U4pD/otRg37+5ye8lTVkC4SGqsP2rXoWX/9tOjSf+5pHb3/Ro78XEuGJ7nqnrQJodcJ4/LNRBQ2rIDBDwwVw9IhBenJRLKwLhA1ogAlHih5k9nbqJWsD4niZK6r3pMH/xif7oJi/mT9eUj5MN01lfbmfMOg2bvDkTW1AZvRyie+fNNZ/1IqjldvDl5i/l1/ldy/doSGdaCVA3AKqzGRMnudXjbYrJ1ahI9+UP8P8Cxi9L2Vr4d/4UgIMtAjFld1tb29KD2OBHAOw6MVDBX2DyEYlEVG31dfVo1qlEIFyRm5pIBMIHtEoIRN6s7O6lnbZdCcb5Uw7D+ZhSqaddTIpPe/uyA00y1YKzCkNR6slOyZFJt46OzvllqcCBpUJtlKosCIHI3v0x9vpc0wh/wgDNY+KDwdmO9b1FD9N5EYjicbsmm1li228pHKX+/nyY0p2Dg3ercyZo6eg+joD7LZmm/L1UYfm/26ZURSDcgrOkE4HwAa2SAqHMK3IwycsOEvXDO5wAFfYhu4Mn+wR8ujlfrMM5iMBPbaszBKGMeTVR9tyB7SCco3PV9N6Pw5S+It8p2VPOlEBk22Oa5xKgQrjv5+P19DaCEIHwhXhHySQC4cPTlRYIZaLTlIqXa0a1p5uBn6RifWeU2rbpFZNuFw8AV9MZXutS6S0d64pcsDk3xbxKBq9IDEQfn2mBUMHyQuHxy5nwRQ8hJZTZamSkDh5uD90uI4isO2UE4eYnUDyNCIQPhjMhEMpMh/3dKpzEV5OD0e+V6uT1sZjwlD2Ugg8kBVkKdrxM42jFVjm1dC3bn8b5KBh8OhhqvrtYED91+GphcqDn19ZyKjmCyG29/WnhqXh7y7JRS9VJ5xRAvzKY4vF4z8aWzu4LrRFaPa1BlDGCYML0LLrLFFMQP8FAyhCB8IFxpgRCrde1tkcuAmVj01ifkrF+8ok10Vxd3UDnBdPEgubc1QCfbMk3LdFcS9mlpueamv76wQyFVhBjKSg7fz/10RxMq5RAKPsaZm+7KRdm22rXNhB62KT7G4zxJ/faK7TFaZG9rF1MLgVCN2U4XXG8NL8vz+sHmkV1z2WUerd2hL+LQPjw8gwKhONU09sj6qJxbfLN1N8HgccbG3iRm1j9bW1LP8aG+ROG8XDGoJt09xDoY+jwg8hgiccwzz68UzSLuizpSDBus05DqVATPB5aYA1IVymB0JwYVg14CBk+pUToismGVkIgVGX20CnFRirlOE4zPZlh5sWpeNS6cF20io6Ok3fLYPxBy6hMBMKHU0QgfECbSYFQ5ja3R44wKBsuwjp1ou4EOCcV77Pe9aBrnSbcQTbqqatpKlvcoDQz7guBL4nHo79XlVXiRrmWBUs/TGweC6ZWVSUDiabwlhVuDrApG1s6IyuJ6ScWOAWdR8UEovB0+5+Q4cOSyehzLl/NgkOD0zHFpGzRjD79jArzp5xVaJCXVZRaZvPRpoY/r837zyGUStFrdO2sghiFuORf18lEIHy4d6YFQg2fx9Jzr2WwWtCcfNwGXVORYJE2H7YcIlJlbCXiFYnBqNrlpH1ywe4eAKjNlmAYxN9oDO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VICggCgoAgsDAREIJYmHYXrQUBQUAQCEVACCIUIikgCAgCgsDCREAIYmHaXbQWBAQBQSAUASGIUIikgCAgCAgCCxMBIYiFaXfRWhAQBASBUASEIEIhkgKCgCAgCCxMBIQgmtzuXf2DXyTGN6fVINyQSydPb3K1RHxBQBBoAASEIBrACLWIIARRC3pSVxCoHYHO/sQHYjZ9vliIXTI2dusLtbfYOC0IQTSOLaqSRAiiKtikkiBQMwL9/Sv3LXLb/2XwpwH8IU6F/nR67aaaG26gBoQgGsgY1YgiBFENalJHEKgNgb6+oQ8XwfcB2Lvc0pNCELVhKrVnAQEhiFkAVZoUBEIQ6OxLLLZA6wDsLgQhw6VhERCCaFjTiGAtjIAQRAsbt5VUE4JoJWuKLs2CgBBEs1hqgcspBLHAB4CoPy8ICEHMC+zSaVQEhCCiIiblBYHaERCCqB3DWW9hYGAgvr2w1y0AEpXOGLgyn0meH9b54oET92wvFH4B0MGOutfnM8kzwy6919TdYoMPG8ukNvr129l54t5WvHA0iD4BYDGA/QDEHeVfAPhJBm4rWrHUw+vXPBOmg/q9GoIYGEi8dXvBuvrN/j7p7IMYP2Kbz8vlUuNBfScSidgzm2IfI7JPB+MwAO906PICAY+CcGN7jO8YGUn9yUQPtWWwwPE0gHc77HFsPpP813rX9/TFeLCjjZeXZaWuvlVLCLYaQ4c4dqm8BvCvieiaKHqZyG5aZsmSFXvE2uLHgfApEP05GHuU6yp7/TdA99tkXzuWTv1n0BhefGhi1/Zt+Pmb5XsqfRPj8uxo8mJTWVS5at+/2Rg/pTE9SXeCSjZTz4xdRQo7qz1+GoFOAvBeAG8rl1Pv3S8ZdM3k+G73btx47aQfBl19g8cQcJchRqFzgmE781qs6be5dvcOnQPi7+9AkcdiaDsyk7llSxCymi8A9U6Z1e1N9FlE9wLYeaoPzk4swlEbH0i94u5THaKxmL4L4FAAMUNrF5lxRzFmfT6MKKISxOLFZ7e17/TKaoDProIcqGdp4q/ZxlUAvc9Al9dA/HUUsDqMdBqBILZvRzvFrauZ+YQQW70Gxtcmtu32vaAJxQAfoyKdnSfvEotPXsqEv3F9VGjrM5Bn4jPH0qnH/Tro6Rv8CgNfjvreONvr6zv+XQXERgg4sPz/V8nmI7LZVM6n31kbP34E8cYbe77Uvmjr+SD8o4MU/GB5EaBP5TLD/6YjWCEIo+HaWIU0E70Rc3uJBSDgJdh8WDabeiRIS/ek7PP1Rd19g599k0S+DWCnKlH7o8XW8tHRNf/P96smQqoNP3IA6KaOuP3ZoK/97u7EThSzLmWw+rI2Jbqy2Dxmx4snjI2sfdZPj/kmCAt8hk10XZnITc2VnFjEZ+s+DEwbCCvX0zP0cbawBuB3hZV1/a68igtymeTVusmup2foQ2zxLwDsVa73us18xNhoKmPaj+bjzPdDabbHj44gUCwejVjsqwAGTXUCUGDwhflM6go3bkIQEVBslKI6d5mZTsmPDv80QEbq6h28kQinuMuE1dUMxAkGPpHPJB9wttXTP3g8M27SkMNrAH4LkCKhYmmyZfujoNIXuZdIZoY/PCqZehCKHDp22noxA5fMnODDycGfWKBY9WViKBf9KdUugz9GwAc1X7qPk104Kptd+wedXeaVIMBZZtpEhOMdsqkJdhSg3zN4F5oKN1UmU0cxunZifNdzZ8OT6O5PLAGTCrG5+y0A/ASIxsC0HeC3g7DUEXKqyFcE8Zdy6dR33JOdmrARw20AHVkpbBqeVeUHBk5ftL3wegqgo6frEy7Mp5Pfctt3LsaP5r18DuBHnfoBGAfhETD9OmSsaj8yu5eu+kvY/Jkp/ew9y7q3l/V9lRl3EdEb5b/HOU7/nB9Z89+NMldWI0fTh5iU0j29g5cx4SLHQA9cS9CtP5i+JF1Lh95PdunLa9+pOvzoRDy+bOPIrS9V2vj40lUHxm1bnbJ8v8MoW4hw3vY3dhvWTSblL6wzGPxPLld4AuDluUxKhbSqJQjq7k/8PZi+4fr6N/kC9qnLv7EZ571jPzyYSqUU0U0/U/Hetq8RcI6rv/s64nyCzlOZX4KYAWuBGNcUC22XjI399NXKLypu/uwmtd5S8jLU+lHlKTL4i/lMSoUR6/b09Kx8J1vxnwP4gKPRkmyFycmvbthw+8vOzpR8T/8Rh1hkfd/lbYwz86r8aMoTO9d4AJ6x7KeQ9z3AZrJpWTY7/JirzpyMHw1BOMV4jYDL2uN8lXvsqXe1zbavY5TW0nY8RKtz6eHz/NZyZJG6bkN99hvq6hs8lAAVNyyzuXfSdkrR6VlDcP4avA7R1Tt0MhHfPF1DM5C6+wY/B2C1o9VXLbaOHh1doxZhA5+epYlD2KbbAexSKRi0gGjgQdRCDtCv1eABFHkol0v9T4Ay1NWfOI2YVIij4hkViXB6Np3cgV+5gQYhiHEm/mw+nbrBb2Lo7k68BzG60zVxP1W0eNmG9SnlRdX8qMXficm9rmHCWY7G1ER/Rn40lQxagP74QGKfeAG3AjRQqavWJOyJyaPdpLJkaeKgmE3qY+egclmtN6xTyDvG+R4Ucbx7rWmuxk8AQWyGZa3IrV+T9TOMikJ0bKPUDJIgPIECD+Ryqed09YQgah7mc9dAd3dif8RpBIz3lHsNjKd29Q9+nhiVL77NAKvFKRUWUc8mtmhZfv2w2gnifqirb/A6As4o/1Bk5pXOrzOd642QrxFnJ9qdIYyb86PJU7ULZ8FrELpJWnVn4jmoctTdP3QlmM91yBgYKnIBpvBSnoQKa5Uf/YJ+QxAE85dyoymVOp2DRm9X36pOgn2PI82CKn5uLpO8qh6jXrM+4Bsq0k7eUySmJv53VMYpEZ2STQ+v8Y61vW8AWO3sKT0mYSZteEof1p2z8eNDEGqzx7n50aRjE4veQt19iSOAEvFXQkZbyabDs9nhh3U1hCDqMdLnqA3dpAqmz+RGh3/gFsFTlvEggHtApcXkqZeE6fj86PBad93SVtW2olpr+FD5N8+X49TLQ59ioA/ARwnY1WY+Icrin8crCFiHCPIgdOsgTPj5ZAefZLKwqvnC9PUA/Ext+pXaAATxmD0ZO9QkXbP2Cz9krSjKq+DeYeTnAQS1qdmldHdHfOfEyMhPtjnrdfUmjiUiNdbLGw+CvW9VV0NgWg9qLsePliBCvAAnDpodWYosfbdZC0FEGdENUNYT+gFSHfHNJ42MjBSc4rm9DfXFxMwp57ZVv68obyhL30etcNSDIGolB6WDZ/KI8MJVMNCRty5kNt8EQcBXs5nkV0xtpxkLQZ6nabPQTXTss/gb1Kg7jMrAM3EUBzKZ237vrKf56Alc8yqNC7fXCrqlI/7Cae53bS7Hj48HoZ0DdLj19Z20exGT9wDUOf2hKAShdna2xuNZNPOZzFwvTilExG3FX1qF+PrpWKzP16B7MdzPS6kV0VoJghk3E6B2cTl2v3A6hrblYedDnLK79SVg3Z/e0rHi0ftvej2Kjl39gxcR47IdddjzNTvPBBF5i2fnwMoDZowZoMhMx+RHh1XoqepH8yVbVbsa+XzXF7r6Br9HgFqQnXoCQqKaidgTZq00M5fjx4dYL86nk5ebGENbXwiidQjCdPupa/ItffW9saj96be+sf12xyKV52tQ035dvhgrg1ftrGorFLsJOBGA2jpYOempAsPOk74zxrsmxPQEuLTA7d4aabxQrjrQhu3AvwOsfzd54WaW4Y8AWOIgCM+BxHkmiKfseGFp0DkNt871+tJ3t6vZQKG+6O8GrOldcib4M/NbiHCsc7OD3xZuTZ++4TZNaEVbdq7Hj489vpBPJ9V5htBHCEIPUct4EEo9z3ZXl2vuWUB2TLyuup6vIo+HUkXMWfU/MfHq3rYVP9gCHcjES8ClifPPAg/TRSGIwFeBRyYW4TiT9YeQbYOhL1xIAc/lKvNMEA9ZvO2Y0dG71BkVo8c0dGbUmKNQxMNYkZr3C1VpzhL5hpk06yPa1DZzPX6iTvBGhC8eROt4EMrgmu2uM0IZuvWHSt6mrt6hI4lYHUoqLda54+TuNQ7TuLDaZx2z7fMJGAJwQKQ3ulK4eoJQh3Y6ZpxFMNypM9cv+LwSRBVkr0zT3T/4EzBOm7Yp4YZcOnl6VTYuV5oPgii9O57dcN5zABoi8Q3NzfX4EYKoZdT5120pD8J9AM69MOcikBlegjv264y3a74WQ2PWUfPnOEykvmJVHqnKFsVoIabphnisCOvUGNvfAtFyR/tqX/gRufVr/iNoSM31Cy4EMWWN+SIIzc4kT+iopyfRzVYpB1n5jI5/DrK5Hj9CEEIQJggEnlNwLZbOWEM4+PBP7uxch3CSi/ecRfBhuqkFwtjPnDsitMITXgarLJzIA/SQxTQ6OrpmU1f/4AXEUPvxp57IHsSO3Efag0rMd8LGiUEJ9GYrxu5nxGYjiCipJkwGbqWMhiDm5K5jzdkGT5hVs+jsu/NrrsePEESUUWZetqU8iNIXmOukcyVUFLT+UIHLuw4xtSvFHboKOkyk8s607bT1B47DdJXmt4Kwhm26q82afGSffWKb3SkqpicJt7sfjSA22vHCcY4FV81hNbXjJvgAkZswlWwqHXh2NPlp8+FlXnI+CYKB3/JkbKnJGYiKRr29x77NpkUqJPlXO4hcf/bGHIXS+J0Z6jRMIBmlD7+ynjAqMJ2yRrMN1C+1Rqn5uR4/QhD1GAHeNlqPINy5ksqTa6Fg7+VMTayb5P3WIVzEEbhP3OuGl0C/F0U+OSQ1xbR1at3m6o6D9/Ss2Mu22u4n4MOOIfA0irwsl0s94Te0enoHfzgj3UOVsXqToetzP4fxfRA9PYmPwKJ1DOy5w/HSH3TSkFHkHWma7ajGaSqC8NDo4buN1ATXKGU8B9scW8U163va1BrO/uZy/AhBRLG0edmWIwiNq1x6+WHz/o58TdqXzvvS8932ZPwsq62wdvpylZDDYp6zEkDoROwylzfTbBQPwmehtHxoSaVamM4Yy8D1k+O7neOXiVSTEj3wq9Fn2FXSLahLnZ5VWWyZ7XWL2l68zXmwSvuC+5xo1/XjJndVxu8krIYgirpUFEGvUT0Ogena1yaSjJCqpdKmWlOwLf75m2lO1EHRRwj4HTFfNTqaetpPr6m1thmpN6bfE89ZCZ9MBc625338BOxCcmMQlWDkJLU5yTRcSfcXuNr/bYE/4Mj4qv1i1LjFT4HwBTB+vCPvjv7UqALBZ++3NsWBH2iak63R1iB8CMIn9DXBzKfmR1PDOnk0C5dq0r00n0mqy1cC8xVV2isnt3PmBdLm+6n1oJNnAotGECqApj0NrMNFM5FGqh/ywujyF0X/yPDkwArMMTYtkjsnkfK044h/xXnK2O9UtluveR8/QhA1z80t50EoRDRpBtYQ420gqOs+AydcdziJCPcylw4cTVUNuGtCt3AZ8fSxbr2gLgShZNdN1gAes+OFI3WHxEremIVbPbugiI/JpVMbwkZfKWdRYe8rGaxuQqs84wzrqHxmzYizvg+5hoYxAvSK4kGoZsZt5uVjo6l1YXp19iYOs6iU2K3ijYWmpwhr0/m7pn1FQMb3TkzdW2Cr3UbOk/RrO+I7n+zOxeSWy/uBwmPMuJyI1NW+5RsUzch0bseP58rRwFxKbr3Fg9CP0JYkCI2bvrk8uEsDPGiRWReqcEAXGqv2xF2BLQzryHxmzVjQJFG6b+B55a2QSg3gvKtaVfM9yGWQ7ntGt129g58hKqUin74VjkDXtMdfOM+dS6dMtu7JUOH3W1h0nE/G20p/1NWbGCSi62ccAgzYQeXN8YNxInwym07e5oddd3fifyFGygNSV7rOeCKEmKbI30Cv8qUxP5tx50Kd12Z8JtYiAZduH9/tsqDLiXzwMCY/hYPLG9tKhPWOj6RIayI6sjPBWTFilPETdYKvN0GYelVRPhQaoWxLEkRpcM1My+3EOnCA67I67qjszSHkNmJP/9Aq5tJ9EY5rOen3ZNmfzq5PqTSTd0MUAAAV4ElEQVQVM0IzpQvcn6cuML5DQJfPoPDd6hiVIMqHne5w3hcQ9PXs4wUoMbeA+QLYuMVzB4D/HcqbEeB9+NwdoPo594D9MOzc9bXjghxc6Xc/dlSCKGP/4pu6nX/Avpx09/fsHzGk8hS50nxHSmFi+tLrvYASjd1tMf5+dDT1X662Au57Nvc+VJs+Gy0q3RlnvVUV5mr8zDVBaC5MKoL5kgP2w7f9diea2r6RyrUqQXgzke5APdAL0G3Pq1Q1OT1dvk3tbp/J/gUAWYDUJKSuLfwQQH/huUxdLYRzKTxQuTTIN1dQVIJQvfb2ruq3yb57Rp4en0tlVHnthSo78HRe46h0+jBAizVekLqM5+/y6dQ1fi+Az0U5leKbGXiQQK/6XLH5OEAZgM+etpdPDFq3SK0EB9A2LdvUGZX1U7bit5c9lB35saYKRrqnIeqLH3BtrWrqWQYyCo/AK1EJuTgKx6fTazeZ9q+7xncHLsE3ren6mIvxM9cE4XsrZWnc0CsMLsTYOsvkkjBTu8xHuZYlCF9PwCAcoNmJVPpitsGHjWVSG8MM1du76mM22SpG7byaMqya+r0Apiu4ja5Gwb6PgPeWK/leXlINQUxdBDT4XTD+1ilU0AL01KRB10a8AL7SvLrf+YJcJqlulwtc3DY+ZOgQvBKyAPMxzgOGETyILQS6hMEXR7CZsU4mhvcr09Of+AQzqbvNd4/ezo4Dk1HrasJ9qomqt/LO9viZa4Lwe4dmvE8B65VR7TFf5VuWILQ3uxnemKVfhwg+Pe024JK+ofda4BsCwkbOKupO5wds4i+MpVOPRzmlWyVBoJwOWqWmrlx+VCLBoPWSqXuZafDN9Rx1udL+JoNWXXbDxGcqvUzKqzIR0pSoA393FNv43IdHUs97dq+ZexAl8qd47GUqFG8EqD9I1mp0MtVdV650bzLzt5n5eI1npqvyGoi/jgJWB52WD5JJtwMJ8E+tYaLfbI6feSAI6K53deIQdFWwCV6NUKZlCUKBq/kKMlpg03kf1Ri7sr5g2XQWE6tJ553TL3jJFeX/YuC2ohVLPbx+zTPOAeG+89fvVrFqCaKET29iiIhudFyzqP59X0ecT3Bf7u6UTW2ZjS/a0hmDdSaT3QuQSkJY2dHzGsBPM+huG/TjDZnh34V5DX4vwlSiQz6HwCsdGW/Vvv4/gLDOBv/LWDqlroYteSW1EoTyDpXNnnseRzDjcwCpWwFVWKkIxjOwcK/N/KOxTOqX1epUy0uvdhjF2opDDB4C6N0A9i63pz4wngf4UcC6viNu3xNkPxMZfHbkRbpUya+f2Rg/80EQSj+1oYBi1hnM9lkgep8rK7PxhUUmNpmPMi1NEPMBqPTZ+Aho1iCMw4eNr51IKAjUDwEhiPphKS01CQJCEE1iKBFz3hEQgph3E4gAc42AEMRcIy79NSsCQhDNajmRu2oEhCCqhk4qLjAEhCAWmMFFXUAIQkaBIGCGgBCEGU5SqoUQEIJoIWOKKrOKgBDErMIrjTciAkIQjWgVkakRERCCaESriEyzioAQxKzCK423EAJCEC1kTFHFDAEhCDOcpJQgIAQhY2DBISAEseBMLgpXiYAQRJXASTVBQBAQBFodASGIVrew6CcICAKCQJUICEFUCZxUEwQEAUGg1REQgmh1C4t+goAgIAhUiYAQRJXASTVBQBAQBFodASGIVrew6CcICAKCQJUICEFUCZxUEwQEAUGg1REQgmh1C4t+goAgIAhUiYAQRJXASTVBQBAQBFodASGIVrew6CcICAKCQJUICEFUCZxUEwQEAUGg1REQgmh1C4t+goAgIAhUiYAQRJXASTVBQBAQBFodASGIVrew6CcICAKCQJUICEFUCZxUEwQEAUGg1REQgmh1C4t+s45AZ19isQVaB2D3cmdPxqnQn06v3eTuvKt/8IvE+Ob0/wk35NLJ02ddSOlAEKgCASGIKkCTKoKAEwEhCBkPrYqAEESrWlb0mjMEhCDmDGrpaI4REIKYY8Clu9ZDQAii9WwqGk0hIAQhI0EQqBEBIYgaAZTqDYuAEETDmkYEaxYEohBEs+gkcgoC4kHIGBAE6oCAEEQdQJQmGhIB8SAa0iwiVDMhIATRTNYSWaMgIAQRBS0pKwhoEBCCkGHRqggIQbSAZbv6Bo8h4K6KKky4MJ9Ofkv93d2d2AkWVoDwOYD+AsDbyuVeAPAgE646cB/Op1KpYrVQJBKJ2DObYh8jsk8H4zAA7wQQr/RDwKMg3Nge4ztGRlJ/MulnYCDx1u2TdCcIh5TLzzh8tmTJij2s9vhpBDoJwHtn6sW/ZNA1k+O73btx47WTJv25y5T6L1hHAvYZIFoCxh7lMs+CcLdl8z+Pjqb+S/0vCkGYHpSbb/3VuKE4PsGMTwH0UQB7l/QnvAzmDW583XoxcGw+k/zXarCXOo2DgBBE49iiakn8CKKnZ+jjbNk3AvS+4Mb5NyB8JpdOPRRRCOpZmvhrtnFVeB+lll8D8ddRwOpcLjUe1JffBPnGG3u+1L5o6/kg/KODFPyaehGgT+Uyw/8GgE10U2T37CYafPNU9PcAvD2gTgFMV8C2v2zH8IF6n6SeL/0VBXT1JgaJ6F9C9FeQTo8bIQiT0dV8ZYQgms9mHol1BEFkZWDbtwPYy1BFNWFfkMskrzaZTEtfmDHrUgafDyBm2Ee5GI/Z8eIJYyNrn/Wrp5sgUSwejVjsqwDUBG76FBh8YT6TuiJML9XntgJdScCppjoR40dF8A0WkfLg6pZqYz70X7z47Lb2t2y9HIzPm+oPYJyZz7CI/oyBf6oYRTwI0+HZ2OWEIBrbPkbSeQgC+CGAv6Kp0Evl2czAgwR6FeB3AegFsJOrg3EifDKbTt4W1HFpItnpldUAn+0pR3iZGCrE85SaZBj8MQI+6Ag5Vao8TnbhqGx27R90fWkmyOcAfhSgIx3lx0F4BEy/Dulriw0+bCyT2uinV6BOwDR2BD6IgS6n90KEu5ixFMBu5fZrzsU01/orz6G7P/H3YPqGhxxKYSWsB+hFgN8OwlJHyE2pPA5W3gT9pRCE0SvbNIWEIJrGVP6CugnCVfJFAOcfsC8nnesM5a/lvyPgEtfkvRmWdURu/Zr/8OnRZyLh39iM896xHx50r2dMrRe0fY2Ac1yTz30dcT5Bty6hmSCd4rxGwGXtcb7KXffjS1cd2Gbb1zFKayE7HqLVufTweX5eRE//4CnM+IlLvj8CfOYB+2KdUydFJh1v2TrEjCsdXoOzt9kgiFnVv6s3cSwRrXF9NGjHjkkYTjyIFphY5CR1axjRjyAY+C0sOi6/fvg//Sb7crz5+pkTA93SEX/htJGRkYK7nmZBVhV5AEUeyuVS/xOAKHX1J04jJhXCqnguRSKcnk0nb3bXCyAIRWArcuvXZH29gUMTu3Zso9QMkiA8gQIP5HKp59z1enpW7GVbbfcT8GHHb4+jyMtzudQTfv109yeWgEktxLrDeLNJEHXXv0zgd9OUZ1R6DMYOupYOvR823+HyVCv1ZZG6BaYX8SBawIg+BLGFYR2Zz6wZC1GRunsTF4JKoYXKs5lsWpbNDj/mqkvd/UNXgvlc50QaFCpy1+/qG1SehPJaKlNRdmIRjtr4QOoVZ1kfgigy49z8aPL7YWbr7kscAdCdANrLZbeSTYdns8MPewiif2gVMyuSqqylvGqxdfTo6Jp0WD9dvYkhIrrR0Y+qMlsEMVf6j9vMy8dGUyqFeeDT27uq3yb7bgC7OAuKBxGGXHP8LgTRHHYKlFJLECEhFWeDKiwTt+37ALx/etp2bJWt/G/J0sRBMZt+AeCg8v98PQA/gTVtTDDwiXwm+UAoQQR4Ae7++vqOf1cBsRECDpzWSbP1cmBgIL69sNctABI72vD3oNz9lLYRx3Cba21kdgiiAfWfWrvwfDQoD0Q8iBaYW4QgWsCIGoJ4lWw+IptN5UzV6+ob/B4BKk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vWq14m4BoGVIC/hfnEbSwQusOBBW+6unFOB6N36ep3weLvFO7RrsZLIw50amZ44385ZRSB8IjUIbkIhDuOFFoafQ9buAqgN1fJ8hwz/0M2lYhHIqv2z7Ff7dAQgShA6zSBUM2KRqO+p3aQuqTpCgCvrdw/+FGyjDNNw7IM0Na5IBCqPZodSGqK5zPpZPxSdz+h8lQ9PafvRYGJz9GkUE5d3VqhvBwxrjFzgUtGR7/9UqV6RSBq9crMfCIQHjgWrotcTuDzAfpbAIsKb3/Pg/mXRHRNl483FxfbyjqpTDF13AjC3n3Um/a4SScx8/kg+r9g7GvrH9sYdM3E2D7f37792ol2juaq+0lotm1XDK3h4WcFFRW2ezetBONMBg4HsL9tG+uzf7mH+jEwvmVO5DZXu9K1WK8IhBcPOKcVgWgMRylFCAgBIdBxBEQgOs6l0iAhIASEQGMIiEA0hqOUIgSEgBDoOAIiEB3nUmmQEBACQqAxBEQgGsNRShECQkAIdBwBEYiOc6k0SAgIASHQGAIiEI3hKKUIASEgBDqOgAhEx7lUGiQEhIAQaAwBEYjGcJRShIAQEAIdR0AEouNcKg0SAkJACDSGgAhEYzhKKUJACAiBjiMgAtFxLpUGCQEhIAQaQ0AEojEcpRQhIASEQMcREIHoOJdKg4SAEBACjSEgAtEYjlKKEBACQqDjCIhAdJxLpUFCQAgIgcYQEIFoDEcpRQgIASHQcQREIDrOpdIgISAEhEBjCIhANIajlCIEhIAQ6DgCIhAd51JpkBAQAkKgMQREIBrDUUoRAkJACHQcARGIjnOpNEgICAEh0BgCIhCN4SilCAEhIAQ6joAIRMe5VBokBISAEGgMARGIxnCUUoSAEBACHUdABKLjXCoNEgJCQAg0hoAIRGM4SilCQAgIgY4jIALRcS6VBgkBISAEGkNABKIxHKUUISAEhEDHERCB6DiXSoOEgBAQAo0hIALRGI5NL6W/P/qq3RO0BYT3Fip7zE+5yMjIph09kejhBuOLAC0DsAcIz4N5G4OumRjb5/vbt1874WRgvtycsQKwzgbobwEsKqTNAfgtMY1YBl93yP6cTSQSppuGBvtiKwm4s5iWCRdlR+JfUv+PRqO+3z+D5cz4EIiWgLFvPp0Lm5Wt4yadxMznA/R2AK8GoGx6hoH7mPjfRkcSvwDAbuy0p1F2PbnDdySRtQ6MYwAcCsBvs+2XBBo0J3yDo6O3PVup/MVHR/fu2oW7AQoV0xHj8+lU/JNe7Orv7/fvzu13q8I2xRLYkE3GP1ypnIptAZ4l4Kcg3NTl481DQ4k/ebGpmFa1sXs3rQTjTAbeYes3eX8Q8AgzD5oTuc3btt3xfC11SJ7WExCBaL0PXFmgEwiY/G746CQAX84Lg+7DdF4mNfj10q96e6N7wI/1YPqXwoO2ih38KBn4UHo48cNqD2AngQiFBo5iw7oJoDdXqexhNiiWHR5UD/u8fPT2Dbwf4G8BeG2FvCYDNy3w8wVuH3z5h+nTdAoRPg/gjS6ckSOi2yeILnxweOOTTulDfbFLGfj09Pc86kNgRTJ56wsu6sgn6es75Q05+IYIOKSQ5yWyeHk6ncg4lEGhpdH3sIWrXDBWRbwM4s8hhyszmcSYG7vy/dCkz4FxrmOfm1lQjhjXmLnAJaOj337JTR2Spn0IiEC0jy8qWqITCAI2MPCvFX6oT5gGL9s2nHjCXniwf/XrKWduBKjHY/NNEL46/ud9Lq40KtEJBCz6NRHf4E6M8lY9QlbuuHR60++CfdGPEOiLU2/01Y3+Dkw+s9pDTzHdlaMNBJwJwFe92BkpniaD16aHEw/o8oVCA29jg38AYL/C969YzMtHU4mk23p6wwPngvhrNpFJjy/AcdvvT7xYWoYSfPIZlzFYjS48toVHLb956ujQpqcq2dbbG/1r+GgQwNFu21BMx8CvYNBJNtH3WoSkbwEBEYgWQK+lSo1AjAPYbXvg7mTgAQK9AljB/Bsk0TWZkcEL7G/8odCqQ9nw3w3g8BI7TDCeZEKWQC8xeC8C+gAcXG4vXTs+tvd6J5EoFQgi3MmMoO1haQL8KGBkVdkMPpKAt5YKADGus8D3E9H1NhFUb7opgB4v2Kim3IoP4aKpJhGdkR4Z3OjEOj9FsosSjPx0UunnZQKyDHoCxN0AwmAcpnnwvsxM67KpwU26BzZ8uB2gFbaHZNXpoWLa/v51C3bnXkkAdPxUfttUnb2+xYvPCXTt8eKVAJ9T1hLC88T4cb4tgM+JtU2Qf6tjVqGOMTA/CjJ+nJ/uq8iLh8YX4CSdwNXym5A8zScgAtF8xg2pQSMQ0w9D0BVsWpfY35iPWrr6EBjmxINDiWeKCR0eiiYzNls+vrB0pKGmdnoia95ucO6bAB1pa4jJ4I9lk4mv6BpXKhAlaTabBn+0tK6eyJp3EJsJAt5krweABSAAYIyAz7DJG+ztVFNETz2NdSD6/zNHUnwPTJyiG0Wouf3x3KINDLWWMePzNDP9wyEHWltK11sUT59pfZUIakrP/oa+E4axPDO88b/KRKJ8BPDTcb9/2fah2/5QrVMElw68haz8COSAQtqdZNGydHrw4ZK81BuJ/jOYvjDTLn7UYlzwugPxQGlbliw5eV+jK/BZQn6ayN6We7v9fKpuei7Yt7qfYKkXi+JUpprO+8ICP39Rl37J0uhhfou+XiLAVYW7Ghf5fnYJiEDMLu+aa3MSCAaunxjb59xKUz7FSoOR2Mcov5g99THBfMnBB+LLlRagCwvZVwO81pb3dzB5WSaT+HVpo5wFovLIo7cvuhygLQC6SsocI8La9Ej8dgeA1BuOXgTKPySLnx1s0DLdlEZPOHqMQfl6bOs2rqZZqLcv9sGyNR/mLbCwplSM1EPSZ5F6yKvRh/qMM/D+bDJ+f7WO0NsX+xCAK6fT6QWvpy+62ABtBbDQVub9MHkgk0n8T4V6KBiJnkVMV9sf+kRYlx6J36Lx6RUEqNHo5IfoytLRaWmewmL9ZoD6be24q9u/Z3Ro6IZd1RjI960nIALReh+4ssBBIKotWk6V3dOzZpERMNWD6W3TFVZ+YNsNK7x13kXITxVNPiOAz6ST8Us1D5MZu5gK3z9sTfiOrrQDqK/vtIUmJu4pWxsh/EdmJP7RSovjmjdu7cN4cmfQohsBPs1mt6PYaZxDwb6Yevu+xPbdmMV84mgqoR7UUx9dXexiF1J+A0Hp9BTTGdnU4LdL7KHeyMAGMK+3/b24dqOdKirNX94WLlvneMexa/d81Z9332EfDTBwQjYZ/261zlsq+gw86YfZn0ze/ni1vPJ96wmIQLTeB64s0AuE+50xocjAamZWb4bFKQUvD8W8jeVlsHbKRDeCcBKT0sb3RmI3gHGW7e8vWOBjRpOJ7ZVALe5f85quXO4HAKktl/mP7iGmERKVdH0mGb/KlSMA6MRWjeSyyfgHSkUsGI6eQERqjaLAXc/MXrdmgVu72UAzQjGdRgBObXMzytH1PdYLVlk1Pf2rDjZyvq0AqbWchxj0SICsK0ZGEs+55S3pWkdABKJ17D3VrP+R4pZsKq524FTb96/eer9JwNm2h6f2gVbJKM22S+3OHI1AuJ5aCYVjlzPh4mk73Imglo/mLTcYHjidKC+URRGp6Y1WY6dWLDViMg7wiZlk4vtOrMunAunWbv+zZw0NDamzKVOfMvEh/Bo57s9kEr9327l0Zy00ZzYoGI7dRIQzbNxkV5JbyHM4nQjEHHGe9gHosKultEm6qRsmfDQ7Ev+ql+aHwye82qIFalrh3VP5NOcsyra5ephWKH84sqs5a7cCEQrHvsGEv7MJkKvySzkF+2JHE/A923qJ40gn2BdzPX+vaYfJzKuyqcTUwcOiLaUiRcDWP/1V98k/ve/mV7z4NRiJXUyMyysx0YxAVfIxBrYQ+MZu/55Dsq7ghfrcSCsCMTf8hHqG+Zo3f9XqewFyM089rQXgAAHvA3Bg8Y+6E8KaEcTUqe9quMsEgnBjZiS+rlo+NwKh3TrqYk1AV7eOqdO8fE842mcQqRHDnoWyHNdjNIvO2rS6N3+A/xsw1EFGjx8+AsASm0CUHerTrUGVVJJj4OfEGGQfbT5kkfUrtyfvPRoryWeRgAjELMKupyo3D0Cn8h12utRjznRezQO8XCDcTROpQpsrEGXhSmAPA+IFSCSy6oAc+0fsp6+dBEITesNxmqn0BLbTonaFbc9emuGUVivo4fDqIy2y1O6vqReECpW9DOAusuiG3bv3/qGbXXaNMFzKaCwBEYjG8mxaaXNaIBgPdAf4RDfhL+a0QFSY8itvV/k2UY2QOJ6+boVAqM5d4TxIpb6vDjd+y0+5y1XssKb9SKTghhMQgWg40uYUKAJRmasbPvWs45TWrh1BVNjZo9mZVDZ1FApFe9nIT0XtNVlf+ZbToh2tEohi/XmhsKwPE6DOxpSeZHdyVsXwJM355Uip9RAQgaiH3izmdfMAdDJHM8Xkautorc0rm2KaLyOICmcDNGcbyhafNYvO2nMmyi+NFLta/VzIR8H+1YfSBL8PBp8FhlrP0AeOnMzgePK8TjskexMIiEA0AWoziqxHIEKh6BEwaCsDrynYZjLTymxq8J5m2Nq+AqGJb1TjIrXmPEVVppottlNbjTU7zZxCa+Rdpju8pmJXpVPxv2+GT92WqWI2LVjw/JtM8q0lxgAIry/L6+IUttv6JF1zCYhANJdvw0qvRyDUXnwKmMP2OEe1Ls66aVC7CoSyvXTLac1bQ8MDK4hYbfnNH4Aj4A+w+Jh0OvGQE6OyQ2m2cwvl22adY0kVyy/bsuthpObGjw1IQ72R2LFg3GSfhlKRXXnCt7TavRoNqF+KqJOACESdAGcrez0CodveCVR/AJW2rSA09xKwkIBfWsAvDIuvL30otrVAzPJBOTtDTeiNqWmmsrMSDvd42MsrDweOiqMOh75aDNehLiV6CqCHmK2tCwLP3V48mJcfLbF1PJh6ASxmIL3Av3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sP5YnW0Z1MoHl1q8oEoXM43gHCR8H44JR1KdgLeaWqLdIdPYlBKtx2K2tbDKQA4wup+NrH3JLb6fpWxBA2zfMB/JO9TVU+UC6mCmZH1cke5MRjr+9CtmrEvzUJJ48Ox57yoyvlc6AQnZ1703yWTvzkk/LTh5QJjoAQRHDMAtfQ3n2w3QcI3GiugkteJ4ezutoEoQ9ZnB512VNr+MCTOrv7Pveuye97ugUd4KfBxvcN0C8TibUv28kiGo2G/rgptGs4kzkYpLKo0sdtKbbzIqQZ+OG8MF+k21HX8wkiP8BIT/QIZrp5xpc0jX4GwMMAf78tjLh9/ArDjRuNPZm4D4RzAfydRm8PI8P9XvmkfOhbihSBgBBEEaAFqaKN4vGZgdVvP5roKIfDt9oEocaiCWnNDbH8qTV8Yked3f1HAPxTl8VpepEH8D8Apaf+gZUfaWfvPvhpMnDWyPrYr91OI41AEFndZh9kwlqA318Al7cAeiWHoSZMe1bNDAM/nxfms4sxVXnrRkr4QUAIwg9KJZTRR3uUN1pH+4gLMOu+QU0QRCTayUbWUb+dFdJSnfUlqCdbtb39hO1C4clLmXCm5v3tYpr/AzMu3GNXvt0rWV6jEESZcVQkco7fZIPFKEjq+ENACMIfTkWXKuUVOL+dFrihPe2srgWCcHmTomaiU7IOZtM8h4DTrE+T+tRDmgnqSdPL99iFU17EkG+zkQgiP6aurujfZ0CXEUHdYbBc5PREUmWh/RoyvCaZjKkkhPJVGQEhiAoqwMU/UJFoHd2tU6uzuhYIQkGtSb1xHzJYUUsLgrKNv7jJ2Jsy5koi6mTg72231pVt/c8Av0CguAk8NC+8dTyfPiTIlGpEgsiPX825LWn6R4NpuUkcIWAhgG1zv2cxJOApE3w/wqF1qaG1LwQJDAiCs5QtDgEhiOJwk1pFIqDxl1QstUaRIko1QUAQyCEgBCFTYc4QsKcHqXRqjTkbmHQkCDQoAkIQDarYWhyWM3NreZ31tThmkUkQqGcEhCDqWXv1Jbv91nfRiQrra9girSBQvwgIQdSv7upKcueNW+93tOtqgCKsINCACAhBNKBSqzmkbMoEMnZtbd1qo4rq6e09Zd5E5p3jmHGF5TJahhmrU4nBa6spq/QtCAgChREQgpAZUlYEurqO3takeb8E8Cm3hlW+I3Ni8sjHHrvjL2XtXBoTBASBsiIgBFFWOKUxdWIYT78ds2RptYOyGcRHJYdjKhmefIKAIFDDCAhB1LBy6lW0zp6+m8A4WSP/a0R80shw7Ff1OjaRWxBoJgSEIJpJ23M01s7u/iMZfCkBH8mlWtgMIJY2jO88vn7ti3MkhnQjCAgCJSIgBFEigFJdEBAEBIFGRUAIolE1K+MSBAQBQaBEBIQgSgRQqgsCgoAg0KgICEE0qmZlXIKAICAIlIiAEESJAEp1QUAQEAQaFQEhiEbVrIxLEBAEBIESERCCKBFAqS4ICAKCQKMiIATRqJqVcQkCgoAgUCICQhAlAijVBQFBQBBoVASEIBpVszIuQUAQEARKREAIokQApbogIAgIAo2KgBDE3GuWOrr7biDg1FzXsbbw5uOHhobSQURZ1Ltqx9Z0+hGA9svXY8YtqcTgpwFwkLbcM7Dy7ybC4SUbhta8GqQ9VTbS1XcZEy6cqResLefzpNmWns8YvOSx9bHng8pjLe9IJsh4tK2Flw0Nxf5WZLvU2RP9Epi+BSBkaSNDoOvGx+afs2HDdZP5f+/o7juKgLuL7MtXNSacnxoe/K6vwrlCixZ9tqVtm9d62DSOBsylAL0XwLbTbRD+AuY/AxRn4FeT83j9hodjb/jpo6dn+cI0h4cBfMBP+RLLvGaCDxqNxzZ4tRONRkN/ehkfCzEtZ8IhIOwJxg6Wem8x8DIYjxkGHshMhB4aHV2zyavdRvldCGKONelY2JnOSCYGflyEGHaiUbxQ1ILe3b3i/WmEhgjYwybH2ybzoaOJWDyIfL290feMT9JdIBxYJHnZnye1dr86GR/8QRB57GXLTBCu5ADClRPvLLjQSg5KllojiPb2E7YzwumLQXzGLELwBjnNjLtC4IsSidh/FypeawShHraCgdNA9DXLQ1beIwYyAFIM44up+FqVsj7QZsxPB7VURghijrXR3hXtNojuB7ANgJfZoCWp9QO/L0aMzq7+00E8/SobAa/C5INGRmJPBGmvoyt6NBGts+1+s00UsxPVEk4AImxvX7Wz0ZJ5GMC+znGU/lRpGQmCOrqj5xLoO7mstXlxM27kUGMEQZ3d/UcA/NOAi6RdLWkQfxNpfC+ZjI3p5l4tEUQk0r8/G+bPAfqHIH8ntrJKx7eYEy1nj47e+mYJ7dR0VSGIOVZPpLvvEga+PrX6lmbaaO+OLjJADwHYfmanTiemEgO3BhlWR3ffVQScra/D97SFt4mq50P9ttnR1X8YEatX5fLmFt9HftVHpKd/JTPfkquvdmwmgJZc/xMAL0vGY4pki/rKRBDU2d33uXeJ/nsAtrIIUpAcaoggqKMnejIx/dAmf1GYqkrEuJ5NPltHErVCEB3dfUsJUH8fOxU90NkVH0aG+5PJ2F/L1F5NNSMEMYfqsJteiHH5SGLwomJF6O4+fvsMJu8DqH2aIICrU/HBc/y2qWnjpdxivPMUh+HFMDK98fjtz/ltU+N/GA2h5bB4/LbXvNro7e0Nj6d3ug1ANFf2ZQDqdHPWTF26rS286eSgfpt8/TIQhNvimiHg0vGxBZfZzUrWcWtMTIEI1AtDP7939kQPAJMicftCuZGAa2HSna2t4y8NDd35er49NX8nJow9YfAxDChz1G6OvpgvSCZi6kRVkumlDDpyiBaJLH8fG+F7Aexj+/H1d30PNwG8ZiIUfm7D0Br1FG5WfuWfeyc99t4wsJRhfl536mDgxsmxBacX0rkfndRiGSGIOdRKx+L+D5PJjwBYCGCCgSNS8UFlSin6i3T1/YQJ/zzdQMBTieMUQvhZtq2ZF+EyzLw8lYj5cqrqHN4cgLQikf592chilFu4eNRk/ItBNGA5KZXkrC5x8aGOrmgfEd1oPzn4IQcFbbUJImd/XwOiZZaJlwHzZTDxbTczkXWSKufuxpfpLAa+bcOhLGRXoo50f0/U2dN3BRhfsP6oAjs43XKWTzOR0v1RRHST9dSe/VtmWpVKDKiNTEN9QhBzqM6Orv4TiLKmE4DwLNLcm0zGNpYiwqw2i9jx2/0YYFI7Q2UvmPZtBFng23uX726kw+sB7JUbVyCC6ezuUyeFa/KYqN0ZT7Z8wQhP3mF1egMo2lldyuIT6elbwYybiyWHWiAIXYQYA5em4oPKYRtk558/SV0/y39FdE1yeECZLIO0NevPoBQd6f6eDlgc3Stkktp45OcliGhg/J35JwXd+UcWRw9kk+4AsN1MX3wfMljhh1xL+Xuf67pCEHOHeFnCW+3i2k4l6mffJxONOSe7+1ONzPZtsG8TUc7Gq96cbp06iPg3US1aGp3fugX3AhSZJgie8ql09PR9hRjKdJH7indWF7v4lIMcaoEgOnr6ziXGFZa59KQ5GVpaTPim9jRShs1PsTpy+3PW+MU2k0lLRkYGnixiCdCdRspycipClopWEYKoKLwzjZcxvHWWxF1dR29r0jxlS/7U9NJJuCg1PHi519A6O6O7IUxDYHxwquwUEaj/Z/Nt+J78joU8gMnLFuGlxJiO8tI45It2Vhez+HR09S8nYmVamLkXoGBivnj3XfG9WCymnOm+vqqbmHr6brKYEJXMRd3FyQ/WFlSg/vl1MungkZGBx30BoilUjI4K9aXZYPje9Oja1Z7CmFY0mpmp7glC56hVZhI/dws0u2/fYZ2Ouh67Jtvi53vB9fMHpolC8vUHr9ntTzu4HW36wFRzIlGRLX4d8Zq7DzMRVNmdagi3A5QlsKmvOGd10MUn0hM9gpmUWWk6WizLoUWQg5K61gii2AuWeS1Y/hYMgN5mcDrExj8nEmvVxbiivqA68urESRD4jcFbjkok7n7Lq67u9+kNH9FuYMpeFiSYl4zEY2qeNMxX9wSR+4Ozh2n6WyD18f8+61r8CT4Wq9kTtHjziG7m2e8xMPAMT4YWe5kM7NFGnDPnZDF1YuOJi7q/QC2Z9QTsnZPTt7nLeZrJtjDLz2D3TxR7jyTI4uMSFlk0OdQCQTgCG4CiTUyVWgmD6MiPDBqzWikmJj9dNkSZxiAI+2Lm0waqi//3ubg6bjFbF1f7zLDvfgPsqn1NMs3FNM8jvua286xLe442fWDqMBH5qJMfoMZM4bhEqDvxFeOs9rv4dC5eGYFpKmekNRQ0A+ILksOxfyvWCVvtE4Q9sCF7GipxTL4maoBCfnXkt0mN+VLt+a+bGJu/OqiT2m+fjVCuIQhCE6HgmSJCZ7vPKdSzrma3W/BGdCXCW62TT5fawsvM5lhsbb4CTbiq52nAERHl07btkgvKcWLRmbCA4KcxP4uPyz2Bsiyk1SYIXUQPgDQxfpSenPzGY4/doe4BVPXzo6MgAuoCIBQxMuNOM8RfLjW/VxBZ6qlsQxCEbuHwShHhshud0p2Hvd1uuwcK3zauRHirfZLZzUXqVutIYvAzbpPRvovUnWo6evouJMZl+TY8Tj7U0dX3cyKcON2nD7+FKuu8+4AMEZ04Mjyw1jHO2bes1c+BndVei48LOaQZfH4qHruy2JNDfizVJgi1de7sip4PyiYXtH8qbcajYOP6iXnmg36T8ZV70fPSUTH9dXRF+4no5/kIO0sbmXdv5/8HGNea6fA9XqbZYvqu1zoNQRAKfOfuNcCi7dReQXu786ZwwZj8ioS32kXWkFahKA27TNrTgaPNAhFJmuyynmau6QXTHsJawDSl3/0Gc1YXWny6ulZ+0iTzLgC7zsaYh0NoWebnNrjXYlADBAG1o24Zp9uIcbiHvC8R08Mm8brJcChZTGZfLzx0v1eCILLZard64yoGf1aXd2xajmzWWjxKhLvJNB5NJNaq2/xF3+koZvy1UqdhCMIeBukVf29z1L0E8BhAH8odIVyzomrMOQUjkioV3mqfQBo/hKvZyyGTy4IcxJTmDEP1l1lWe/QvfNFKk8UWgRyObovPuBn6EEz+BcDv1/6BEr6fHB48r9TFosLZXH1HyKm5vCVNVxOgUsRb05S7r0+5xROgWCVPGJUgCDWoKZJ4/fxcPrSwz4X4LVIZXJkHmu2E0TAEoQl3dbWZ28uq27oG429M+HxuwrjufjWpIEYm5uFwt6N4JcNbrZNbY8d3vcGscdhpT0xa050l0snav+ZG942p+OBpXoup8+TjbTLq7I4eCpDa5Wcv4+U+3zerdYsPDL5AhbJaIrB0a8cYEU4aGR683efCoi1WKwSRE44ii6P/yCZdpc+eW3CkmXfTxTxuEF+62y64P8hdEC/8KkUQ+X7be6L7GEzXqYA93+Q4LTQ/DRjfQsaMNdrNabteGoYg1MA0dnhtDL5jt8t0BgN/m06DoRpzsZ87Umx7xPnbwltLupzj9Udlj/V28xk4Qv4K+Ars41Vkqlv47aGThaK6LOPQ3X3wfNNC91hSEGe1Y/EB/pS9PA7sbpFNkcE6Ziy3ptVQUW4IG4ekhtb+0Usfbr/XGEFkxVS5lV58OfRJwDydgOMCvguh/mCeBuGM5HDsN8XiYq1XaYLIk+MB3f0fChGfCcbxRWR4fYWZP59KxAa9NkLlwKQabTQUQfi1mdt2u9kjecg0DDb4QQALsvygWQg1O+qCkT32XX2QnEbFTAY/znO39Bpur2/5MR1pTm++3rnQ5sfxebFO4wfy7azWEIQd7uxJYfydBXe3bvXGNZiyWVu/B9rCfFyxL9DVIkFYB5dNxLfR2NM0zGVEdBwYH/OZElw5uC/cfRdcUeppYo4Iwjps6upaudBE5jAi6uepk4X11rzbn6RK7/4TpPm8RjxNNBRB+LSZ22zYU7by8BhCsy95OW3omtQUBXe7tkipQEnriiEIzfifN8PpxaND61QK7+znll7DzfmqWfwdYcBeIbNuY9GLrtqPAAAZ10lEQVTcfXiTTD50ZCSW9Bq//klSf85qD4IYY+ZT87vCXPLB+2zml5LCXWvBSe2Fr44wmLAUBp/sQRglYTM9T+3pQAKkbAkytgJls4TBhnkgMx8PUHdhwmjMOxUNRRCa3bFjUbabJ/Inhd7e3pDtHQKHs0+TmqKgnX0uwlutE1wzfudiPvVgijWZnuf7EfYLhfYQ4lyeomm7vJ+LgPq7D/7vNLjEtftyVhcgiFnkkMe2vSt6kEFZn4f1YaA3DTaOLCadRL0RhH0RVY7e8LzX2smgC4hxsO01PVX8NYZxWCq+drTYxboKJ4iCoqpT1UubsA+YvghGn+ZENcHMn04lYiotfcN8DUUQ2R2y7RlOu1lH53/I522y2+btdnSbWcPrRDAn4a32megYA+G81PCgit3Pfpr0Gp4JxuwEYE/uZiMQL1ym5HC8+1CevykCvjESH7ykUGsuBKElh1w7Spf/SsDFtnafNMPpw6wnND+jqHeCsI6xvWfVfgZn1Atttudh/Z3m3PCqNYKwyrn/4pV7tJjmDQxkMx/PfP43OH7mSS2UaTiCcF6Am52q2kYgs04J9uge62UzTeRTwZfW5iq81T6J7GOwJmLzSq/hNiHtmFrTkdjb9AovniYq69OrZf1L8P4j1RDEGBN/LjUcU48laePdDzjg2B2M1pZ7aMo2bfmCmxYaiSCmyN75UpvfeVCPBKFkVifYti0Us5GEZxaGsk71OWis4QjC456C7bbvbD+DM9ncDLlo0k0XvEw3V+Gt9jnijPCZGWOxvgINptN/CBpC9nzD2sU8VK7p7umsLnZ32tG9sp1gKn/ErKyuRDhlZHhw6iEoH1+1CKK395gFW9Kt6ma8MjOqN753yZ2SS34JTeNP8kzNUgiqYnVkb1OZMrek3/4iAasAYyuA/44J3/aTDt9LlVo/mM/sAV5t18rvDUcQ2R1NV99lTLgwD3LeVOTmf5h5f3b2e8gEvAqTDxoZiT2he3mtUErxuQxvtU2mWSRoHYOf9BpuE9MRNZT7Q3BkkiWcnxoe/G7BP379PYZNKlV08D8MblML3exY9sLmjRIWH+rsiX4JnE1RYb1YthnERyWHY4/5kb9aBKELD/bjL/I1ptnP6WarMHB0Kj6o3ioJ/JWgo1l9+c3zFVhAdYroXbVjazr9CED7Ta81PuZ/MX1Vq05DEoSbM7m9K9plEN0PYJupGex8N0Lnh5jXsmnA5sAu6Ayd6/BW++Rx+GFyD5nYfAWBdnh2TPPmNxtx+Dlia+4+BLsJbR2vOvUZLRn1rrfVBl5QP6UsPi6mBRDw0Pg8jvrJXVQtgtAulmWKDtI8NVsTBKHmiiNrc4Asw4UWZpfHujw3SNVa7IvptyEJwrloTJlZWifNFZa3lrUpCRw2fOBq0+Dvz3rP1uOPypb2wpfTthjludWxm8PULpGw5duzXp4L+EdiD49VC2J6YnJVqDV8E0BHTsninV7DJZOo51sThfDRpW0v5KwuhSCUHJ2LV34cpqk2GtY04OrFGF+pOKpFEEr2iNP3M2YyLxtNxB4qZQ5qbuf7zsWl67dUHVnb1Ji/VBbX1anE4PS768WMXZPeBtxgr8o1JEGobJUd3X03EHBqTvFvG4yjTMKZ6tJoocVM8+jNbwh8A4NuzJsVvCJlrBOyVGddcRP3+O1nPxnK98AIfQ2mqcJbF+baDLQoa0Jo/wDi48GkMq5mH4L38zKZ7i0Ct8ytfseuvxPh/o52ORafjq6+M4hwjc3U5CsVR1UJIhLtZCN7it5uBl8empiHY/ycflx0onmj2XuzUEi/5dBRvn3dpqQsN+Kdc8DXBVG/87oWyjUqQcBhbwddwTCX5u2FbikjNAuhyuT4jOXNZy8ziv0inqfTtgITYZYM2T8GxpWzFrQinGn2CDAmfJMY3yxksrOOTftsaMCTjHa3qX2O1D2nUzkWn2zSt63fuJmZ+20yPUVm+vCRkXUvuOm1mgRRQO5fIMOnJ5Oxvwadj5GevhXMUE9tTt8T8dpEefVRDh1Z+nAJU+ZRDodWFpM2RZ8SvrTQXi9MqvF74xKE02m2ObeQufof8grQPE9o0U3hnVG1wlvtk8dKkMpRzcATKnolV853xk9ru5q0G8pBt8Rvm9q7D4Uzt/r+m9CcTFzfrC7X4tPRu3JPpM0HHAn+mO+CiVVuqReqSRAKUFcTGfhpIuOru+1i3uMnVYYifArR2bnMqNZLhH9Chpckk7FnfSvQVrBcOso363IjXv38CoCvIsNr/KTKyF6Y+x/0g0idHq3RbEVfnCwWo7mo17AEoX1lbQbRgguk/nnCqcpe+ZSqFd7qIAhNVMlMGXfzS6FJp4namJjJqOrdpsb+HchRXkg2F9+G1lldzsVHt3v2esKz2gShcIz09H2GGT/U3IJWP29k4BYiXtcWmnxmaOjO13PY06LeVTu0mrw32DwJjJX53GUW3fgys3ktbuXU0fTGbyqLgArp1eVYeh2Etcy4fTIcemLD0Br1ql72TowKD56YaNvdNPhEQvZBrN1s8pclvYgXJtX4vWEJQoFpz25qWSAL5lDS+CHyVT0dzlUMb501fzQ5lKZ/9yK5AhNR9xaDL+LUy+N9qS3AH4UuOkpFFzluVpdz8VEmG5eEfq7pJiqcrM+q50JhptTRHT2XQN9xIYkA0E8XLdure+XUkXUguawAN/lMxOcHgwyBrhsfm39OI75t3dAE4XYScPM/5GeD/u1jZbHAs0hzbzIZ26ibOdUOb3WcIrr7riLgbPu/lxJpoTflqLd9eXkqEbvb7S9K94ZDqXZqe18u+n7SnAwttT4jWe7FR3eTOCebNhVHjRCEEpHau6JLDSK1YNpe0POzNs4qU9bU1+XWkVVS9/Qggcf8Fhj/OrFlwVWNSA7ZCRIYkjqqoH83wPvN6dzp41xiXGEbbsHIn2qHtzoIoit6NBGpI7X1UldJkRa6t7x9RGqV/Aqcn2nnckPbcbO6EotP7sKgiuiy2uLVn9h1E2PzV1sXkBoiiCysyhw7kaZ/YuArGvOJF/SvM/Bjnmy5fHT01je9Cvv9vRI6svatTn4t815bToRLAPoHv3LlyqnXJ29LG/SNx9evfTFg3boq3tAEoQl3Vcrx5aDV7Ua9HsGx3ir2sWhWfKLoFnP11m5bCy8r9i0DrW/Ho029f4DvQwYr/DgGgwDV2d13FpANP7V8s6NLKrT4aEI9syI4snzWGkHkgco+GrTJ2JvYPBJMnUD2HQh1S91Kem8B/CfAeJgM8+7xt7cfrsTuuUI60k0l6uhd+T6a5EOYuBfAJ2gqFNzqpxgD+CViI6He5p4X5l8X+/cTZC7XQtlGJ4hawFhkEAQEAUGgLhEQgqhLtYnQgoAgIAhUHgEhiMpjLD0IAoKAIFCXCAhB1KXaRGhBQBAQBCqPgBBE5TGWHgQBQUAQqEsEhCDqUm0itCAgCAgClUdACKLyGEsPgoAgIAjUJQJCEHWpNhFaEBAEBIHKIyAEUXmMpQdBQBAQBOoSASGIulSbCC0ICAKCQOUREIKoPMbSgyAgCAgCdYmAEERdqk2EFgQEAUGg8ggIQVQeY+lBEBAEBIG6REAIoi7VJkILAoKAIFB5BIQgKo+x9CAICAKCQF0iIARRl2oToQUBQUAQqDwCQhCVx1h6EAQEAUGgLhEQgqhLtYnQgoAgIAhUHgEhiMpjLD0IAoKAIFCXCAhB1KXaRGhBQBAQBCqPgBBE5TGWHgQBQUAQqEsEhCDqUm0itCAgCAgClUdACKLyGEsPgoAgIAjUJQJCEHWpNhFaEBAEBIHKIyAEUXmMpQdBQBAQBOoSASGIulSbCD1XCHT09H2FGN+Z7o/ws+Tw4Clz1b/0IwhUEwEhiGqiL31XDYH9F6/cI8zmeZThn42MxJ5wE0QIomoqko5rAAEhiBpQgogwdwi0t5+wndE68QUwfQlA2gQfNBqPbRCCmDsdSE/1g4AQRP3oSi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BUCGIKAglKTvPKPg1y5TYqrNoqxqCO1ndIBLEF4OcBSjHw67HZvDFongxNEAF2PInMtn78IAJe++uOICpjE4UuvvMhCBGXaATATrYpEUoQRpUpVjcEIZlHQdqm0le/MjJrNr931H6XB74svVtP69uFIEJfE364aYLwQ8j2u0w5SPXjSX1vcxMvVg2MpwmibOCtHL0g4zqYlumnPbyHp2NfgOnjWTTIJjypNwigQnwUpG1h4CEx4Q2jWlGH5y2knta3Jgj1IRc5nOvicTEvDDUWk4gHk0d+vTChJcKtZBr3ptPrhJVUmZhjukRMKhFFqxksyeKcKhFTWQJ3iRxaeHGvyqUTNpl/NT30fifIJjypBDHNIiYX8VCYgLsqq+tpfWuCUB/yuiEIl0ELZF7q121ZuADZLWUqCEJmWTRZN6ZpU1Izvj86PPf8Uhwil8RNnulf/cZU5fcgBBGekrrSn0I615xmrpOog5D7MYjYT+TM664AK4vQK+I2uD0EC7yV1ZIDwrSsb00QCsNbLFJXBCGbwGJRzWraepYsnrp6N62SMq9lqfXGVBCEaFB7rPunTPj4RD8C6jpU+x+LHfdGk2YL080Pl96pxsy1taP75wThFMR/Z9D9gHF1KZGTnyd16buyjGJe6V9V++hVLghBtHZ0H0qA8PeYZU0a4HmYfFgmk7w/SFuErJ+aChvt3rVM+GxuICEcAyeeIG0L8n1ZWYnvg69y2e2bLsl/POurl/WtCUJ9JtUVQbhcgV8x2DgmnV4nEnFU/bjESnlQFhlzqgii8rSKrWTSIZlM34MBOloiPuEo9xRA9zObd81uem69nVQryMjhK+H3PVm4ZrsDmSpBuOQkHmXmU3LppEj8HvoTZBOedke5SbpBuMRSqkmEK5m/glKlWRrFoNbL+tYEob7E6oogRLNlcWxqtZt3CRIHN5n/VBGE7ETFwMW5VOIrquafbW3xdyFCIvzBPhO3A2B1LpUQeSUmHolyMhAZScRzZQ5kqgRhLc6u3rcjb95ZdrqexAB1QQhCKisPeLOzSHBs98vLboeqoTYmiSBkVkRBwsfIthSZTwQDT0ZR6Eql1v9N9k49rG9NEDOYIFxOmKJHKhFOK3rulmuBrWQ+Y4dnMjdtdb40VQRhXdMNXA+ixbY2bAXxsdmBpHAy83xcsBpiGEfnUuv67S+7LGbfXBWlk1/FhucI7BaEIESd7Z3dJzPjKrsTHYEunxXdck4I4sQy3IIQxHjbJiNYH63JDvSJbInlBhFTo4OQiVfDMOuU1Ssg9FBWd0VH8/NWM/gsx+SesvWtCcJvZ9n+e93dIKwF2r70bWxEb6/MqsXSXAxu3RU5hJtM80p7iIliWZHWstctTvtUEYRoi0wmbwX6MmiJV1wccZdvjcW7iegXZTkLJLkaSvhIw30TfzE7kPyux41F9p1RZlpu98QOShAu5Og5LurTurxkYIKQh/t+lZlW+nmfu4T7liZZkm5Uk3CDkPs+BA5AKIVf6t/go6ye7vWtCUJ9JdUlQYjme2U+25YS8T4CXTY629zg9F4UN4Y5c17er2Dlnka3LMsXfDbFqSQIjxvTi2A+Dyauc4ZfFvmkI9Gxi5kgTmE2KxJ43j5c8hwUGPiJOTr2FWfoC7HpD+fpc8Vw4qEkDLJPzdaO3haCKRIY7Vr6u9fNTn1a10YQ1gYyHkixImEQMS4v5JsulCUMoohxGoO/7cjCJzLOuZJwUPKqBgOp70NIybhc4jr5Kr+nc31rglCfRXVLEOM3iXgbG+SdO9lK0Vgy0+NmAHt45HTOg/iC+XvgMo8EOZhKghD9dNORlG47INwPpj+O/988ACAR38hODOIHkbLzc7mB5OVew++xMFXTaErzVQS9QRTbKMlnYclgAulh/KZ7lZtwGClHxUXvitGhXVYFSDnqm+3Or7/23+Uxv9QisKp+R2Id5amsnrjRTtP61gShOrKWFV99Px5ioqANf9pkXjmYTt7tpwCeaoIokcSsYboCsG49QZ9AiXdcxCC+3/QSfVVJEHC51YRiuVbqUJUEIV6n9o6esyS3Al+sAAjC/d7Y0Nwve+Ujr6FtKm2A1PfBw9JIqVJHIZnlF6BmkTcd61sThPoo1z1BiK6IBB3/2IIPmyZdss1G/WCPG4Ks5y8R8L3CWNNqp1jADabpIIhSP596hgRBXArgrSrDKCy8mPj0oHmKPcRUss/m3UQrpcLVEoS1WKXiHO4fnY0lQQOgyRpf6ybc0hnfz2CLvFtV5p4Ykwgb/5FOr/u93xjW2rbA9cM/sJ5fnc7fPTy0fcOAT8f61gShPsIzgiDs3bEUbtH8MSD6GEAHAPyWMpmvJXLC4wT6HTGSw8O7bPY6wUk3lI7uYwnYnmg8oJmjSiwmryESepTo7BdbIjBOZzJjAM236VJeBfgJBt1mgn6+KdX3iN+NyOtbwrs5OqvpJAb3gOg9YOxWLD8E5oe3ScB+lY9EfuYXwrgWghD9bZrz0k8IOM3W1gKDv5BLJS9Tn87ykiFtwrSwo+dfo8ynMuEIAO+2zTuRCOovxLgzT7Q2yJiE1DZpx130A1Lfn1oxbuuIHwnQLSUHw/H6/MOAO787FetbE4T6aM84glDvmi6pEdAIaAQ0ArUgoAmiFvT0uxoBjYBGoIER0ATRwIOru6YR0AhoBGpBQBNELejpdzUCGgGNQAMjoAmigQdXd00joBHQCNSCgCaIWtDT72oENAIagQZGQBNEAw+u7ppGQCOgEagFAU0QtaCn39UIaAQ0Ag2MgCaIBh5c3TWNgEZAI1ALApogakFPv6sR0AhoBBoYAU0QDTy4umsaAY2ARqAWBDRB1IKeflcjoBHQCDQwApogGnhwddc0AhoBjUAtCGiCqAU9/a5GQCOgEWhgBDRBNPDg6q5pBDQCGoFaENAEUQt6+l2NgEZAI9DACGiCaODB1V3TCGgENAK1IKAJohb09LsaAY2ARqCBEdAE0cCDq7umEdAIaARqQUATRC3o6Xc1AhoBjUADI6AJooEHV3dNI6AR0AjUgsCMI4jOzqV75jk6AOCdto4/RGb+6Ezmxr/XAkZrR/exBNxqq+OvUcp3Dgzc+Ewt9U7Hu11d8TeMjNEtIHy09H0GjsulEr/ya08sFn+PadCnYeJIEPYGECm+swXAUwBdlE313eZXz2T+3tYZXwgm0ZfdGfgfwxw7PJO5aWvpm1b/83QDgCMADBFhRWYgsX4y26Tr1gg0GgKNQhAg0OWzolvO6e/vz1c7SDOBIOLxeOTJp2kZCB/IpRJfdutrNQSxYMEZTc1zXjqfga8CiLrUXWCmY3PpvjuqxbnW9xYcGt+leZiSDBwGoECElZmBxLXOemOx3k6TTEFkbwIQyiGi1rbr9+sHgba2+BwYOB2E0WwqeUX9tKx+WtIwBCFOiczcm0sn7TeAQEjXOUFQa0fvQsD8AQGtIKzNDiRWhkkQrbHuTxJhje3GUFE9Ac/D5MMymeT9gcANrzC1xeLng+hbVpWMe5ubeHF/f/Kfzk90dXVFR8d2v5wJHx8vil+MDc09c/PmK8bCa46uaaYhIA5Z/3jWOIbZ/DZA/8aE83MDif+caf2YivY2EkEIvB40o/mjBvtvfKoa8OqZIFo7e/6DmL8/sXmHTBALupa/eVY+fw9A+zuwEzeypwHKAyxuFf80xyIfHRy8Xoibpvxp7ehtIZji9rKrOBSYzIsH08m73BoSiy17n0mRDQD2AjDKzKfk0sm+KW+4/mDdINDW2X05GJ8sNUgThPvQNBpBbBOP4wfZgcRnxw+MwZ76JojuLxDjOxM9CpkgWjriCwyQ2GjFxjt+OGdcy/mmswcHf/lKMCQnp7RDrwAi6ht5fZcVPjcCau3o/joBFxZbVdMhYnJ6pmudSgTaOruvAuNUTRD+qDceQSicKt1gaSSC8B/68hLOvjPwZBSFrlRq/d+C1jVZ5ds7u09mxlXFW9QrZPKRmUwy6/e9trb4uxChewDsYxEfcHEulfhKNYcIv2/p3+sfAU0Q6mPUiAQhNoAKqxYVSDRBlFlw/c7g4WPT6VtfVcFussu0tx+/u2k0bSDggPFv0XXN0S2nqholtHd0X1RUvouXnza4cHg6vf5Pk91uXX/9IaAJQn1MGoUghBnqnmXdrkLUpAnCRhAeyl/16RVeSYcCfRTgxdlU8jeqX2hv73k/GyxuEbuP80v1okjVb+py9YmAJgj1cWkIgiDgXAbOBLCfreuvGGwck06vEz4TSo8miPokiMrbA2dGZ+PozXcnX1YaWADComkkP28twCcW39G3CFXwGqycJgj1AW0IghAOYAZhFjOuATCn1H0Gcubo2DGbNt30ggokYRDEwoXH7xZpii4B4d9B9B4wdit+W1gD/Z2YBgowr8wP7zroZ27pnMiefXCc+P38IFwcDr1hIqwtEH8tYlry/H0ncK7CTNCyQY9gPUBHTdTDdHIu3fdLZyPaO3t6mVn4OZQc9lZlU4kfqYypvUxrLH4cEd1YqoeAr2VSiYuC1hO0vOW78kzkICJzJdjy3Xibzc9kCwEPgHD1rAjfLDPXtX+vvT3exgaJm5Pw7RDPaybzkYPpZCpIuzo6lr0jj0g/wXKEFM8oAx/LpRJ3e9UzbihgHAWYpwH0IQDznPPbNPhne+/BuWQyWVBpU8VcdMzlgxf17h0x+UwCLwXw9uIaF3U/C2AjE37k9T3ZWvBsl48BSEvL8nmRpkIPg3ska/xpAIMAJZuj5h1+46mCz3SWaRiCGBua+5umOS/9hIDT7IAGUUjWQhDjk9j8GgErPJzM7E37x7bFfd78PTnhtpDqkSCyA4nTWju6ryzDuQpxlMRq6rGCwYds2ph8zA6ShEi2kkmHZDJ9DwZdOG1t8bciSv1gvKv47oPmWOTQSTTZpfZF8Y+wiR8Je3uF9r4K4m8gjzXZbHJIVl44Cc4axu0AtZd+J8Y3M+nElxTqnyjSGus5icgi3eLjfSuzxiGKVWASzplv9P8WP0wGzs5sTP7Wzx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BvTfp2svbKrnkgfNoejh0YwMe/F7nqyOeWTG+XchBpLFbU3NpKNv+mpqPfbdNsZc3/ma3jHp1WUrkFH9bvpgShFbH5vHHp2qduK0R0NwHrADxBRN2cte9zEmWUBKE/eJR5c2lI7IY4dYPxgUKftG9IWlGXj8jca/zcN7pKbTbc5c9EgnBiQE1NS3exkTuMiNp55Gbh9kCrGxOl3vgTZPmCME5zY07zVVh/N7S03QrGKcXyTE7cKq0JQeiUEUzLdwNY+ogMrWtmzQOh742lZJPwuEE1Nx+/Qw7DDzpVO5lwQaan66ogG6h289ecLEtPd/lalDfhDsum2zZv3n6NgYpokKZFntaUIHRvlFF4H4iaIDS3bH8j3abE0USkHHmOSCoYj9bW8CK34aPmkJFjpqMyqc4HgwziiLpyfLXD75yRSLZcHVUThLqqwqJHGHjP6MZE+Gqmp+uKcpVX8rtO1k6Mn/alulSQkGq/PGGwZe/PrB7USKlo+hBG+DYVJddxj4ml62gJQRieREwIolptDmd7NfJrbzVUt5GRz+mzBDuPtB7vNQ8B9GKQCcTgGhrR5hqNeUIaoz6NjNhdzQAIT8Km27iGHsp0d6h2GN9kgrS5mrQjltZvftBG7GgQn1Bwgz8qqtWJmDQbt+dbRTVti5ogPG7oXsoGJTdUL8UEzVpQh6CVgFWiIOKHDzNvQ4Sjna6OKjHqC/0GUc2bQCUTIqgWUyV1FPMoVbJX1mIfMH0JjDaNXvYQM5+cSSU7q6nHmVcjrzUSE6kyoiQI0xOjCQ6axexjp1Di40srZtI8oHueoHTvZibtNkrj8R7mEyNFV+w6EFYwW7fusUvuiSBWykZt9E9E81uX7Tgrl30/29jbory7kU8xoIxTdTYQo6XpCMK9Xgn4K2w+qK8v+WQIbR0tImqCUBVpNOu03pw1ChaeYuKAxn6BIAvjLbjqG4ROhqZ7RArUM5/EhYV2rzNJFFdWdxPy7gFs++ZSYyd/Fw5B+116CjbXCJvCBOFpy6KZX1oxU6mmiff7yEQQhJoHPvYgftNkPQH/lhuuudYwfknQKZf3wVQzZ/2hxLgQhP00ByGjMnUEodkAfSO9GVWkSTQeBNFQ+q6gFTNpFCA8D3nTniDUWLmNQcJ6INFNFnddUZ1IdHV7GFYZa6WYTP4ZShC+GJZoJmlERxpNF08fXRNFEIXxp7qWxEeI6UIClBGYyZuXyurrnsRkbmnSUOPCxGfZxvUBY7XnrcxB+RvFqFX0dCcID9cbY8RMGpsPXy3EmUEQ7geZiHwx6R4XgdKTotKc2Jx9W0WjWwZYc5RpOhP+NYx3Ea1b8/Iqb8brd4YShK9tQIlqrOvxWTMvfK2Og4i4jAeugoR5R4prrQ9Sjo9hQjsB/1DG39YYVxMVVOnMQg3NbV/c4mH0B2VuDEUPs2tArNyv/LY2tu1TudzGHdzq5to3CJcn06gOdONxg1DglWjWud4INe9bf85ZfICXZfp43bAqnStVi5hUxWFGbvPriEbtUTmmKzkpelivGsvy/dqge6wNQ9ZXrHOyEkSYj9Rue4pym4bmgTDHzIuL7gRKH/r8VRA1ihUVaY5Uuui88uXnrb15X7B9EhiLPVSwy1phm7SrvnlpHcFWmjLOMLp59zME6xbYWD1rlv2Cl7tx0zep6fJIXcRUcxgZc7gpcQVURqXXHdSs3FowGdsw04RCEB5Xr40WW0emUh3KqK3qr+A3aDmIFjkK8zx5lvpA8XaSFaRxOtXGmUAQWg+pFWqP1be0jXHDzsAfeTi20M8flsY3/6jdgsaBo+8mqlW9NNT4CjJXqkmbV5B4DaeC6N+dJ/ww3vc8XF9sAuj0dG+n8rNVVoPKmCBK1S8R9M1QvUMNZWkFAx/aIhX4Hxv4Qxy5a5xxGcbrBqHGtMSwrTB3NGukrCGp/rCy9fBTzRwKI29YBAGtOT24e2g2jikXJMakI40tbScy41bTiHI6F+QmbifKtUWnIhl0wvvVMVlvEPmFUeLXPlpDOSdOJbfUgphpqDY+mA/itNUFfFnDQv0Ns7w7E/e4FYhG+UvaobhxWTbf4tTQyZ/UOXc4ETUwsI/yyprp7VIxJ0w+pS75XQIudiSu+pFXO4eByzK9XV83IYf8XND5RNM4zQzDfsbEIHFcCcLteqMgZtpsW3uM9SJc3n+Y9mYe0JCwMB4ftS1+gEaCgD1JwP8S8/WpVPIlk4nmlSY0ghi5RbRdCcY/j62selsBDze4vnJrbbAP5VM+bh1SdPlbCXAaZ3VlN6Qg9UxmgtC52mCmZUFCrlbhmsXtuiCvxsrMm13RuoxEiRrnhoFvvJpDS4lqbTV2LWreRCGj1unem0Tbc85jnXNIL1cbGkNBX4t493oxcdw4ngShcQiZ3wOQw77OIFU6mxjNXqCLORHU7Ys6SHx7Czlc6ig/lH0pTIJAwZpPyTWdbooVd9xRG7e/WEn4xMKmpCI4OV1imDiz0oGmDkj9HI8trYQk9EQVbuS8yUwQETnrM3YS536DUgtQLQhHtC4jv1UqT1PTkn+wKaa8Am81cisEWjK58XrM9f/MDQ0f7PSiqdmMAxFR2GFzC6RzIAFbYxTknTqaW+96Gf55EoQuXr2hsz69j7FSd/TjSRAKQzdBMvFpxHS4w9WNsXv2uqbEQRblY0444mSYH6z1rtR5RW182xPKeZwtd3gNlSDywLUkFoBJ+Z5x+TjiJ2zCKaZh8RRLU4zOLXhgHRNgpBgxrdxC9iYsqFCJ/4IcLzdxlVGQB6v4wSrKmfNRL9BiLzcY+cXrdrVh6IhwBHuXqw1DubqJJXWx7Tp330x4YLiWj6/E3TeBbpgVX3uuiZM493Wcgf8iZhtEn8q3z9A5YaEvXjfesoeZ/Ny06FqXe2at51yPoFXPkJ09vK9vha/ldr3G5bfhqdR3qmm9HwC3DA/M/UI5lx+KHDhG9xDwCXclXqJWL3ffRDipr6drjE2Ts8zCursIRJc5RMtayYGbIMqp2gdx960Ds9T1Bvds8QasDhsjTkSDeEBQ7tMtuN9XcwRcNjgw93K/MWloSPwdYqQMdVXwr+I3YDMv6k8lHzHZc/zShE4QqrLGlsQRzKQiRzk3U/WTilS1CuCra+Podd8o1IR49VVrLyZuA+XjBqgoVu5vFXLc7o5P69XJwg1E+UTR6Zvn/eEw497heOzJNd3LVSCe/ANda+sxc4eGane3LT6RgBMB7Oaqw+QWE3h8JjtBeAcMYs8Yzd5BZmC0UTpB9PBrNJIkoOzW+wDBTzBi52R6O1QMjTEPtl7Gbn6HFv37GT9rM8593654VGMpXbBPsH7iCgajdY0edJJ5RloEbuThmkt0BnnKvXmsNn42mC70st3wU9bQ3djyYTKZv11bg+vce8FIfTX/Bs6vPUcwK33AII2vJN/YHtUShAfpOYcikLaZR0AlNf1WWowLU6nk/7jG2ceGxfz2UW7uREIQeZIwi62qNCfUaV4BoeI0KAb2itegIqrdPjvO5wYVVQV0c1AOszzRBYjDa1LeaJrJThAjY7t4T7biD2jjK5uHHPUNZOQFmtYOZSRxWY0RXZk+YR7HhE/Nh3e18RkQ9ioth56HZR+TXp38vbYO/QmxQGp4kxj/yaB8+FsC782EfaMOJ6knrXyT1Kb9LMj6z3x4XhU2llEPwh4uF/mbQFjr8FaqRH2+Pth8Qo6O+KJiUvjFGPxpnU2IHwnr49XnAX0TTBsYnI2x9bmiVmW1BJFfByXu3kdH31hsOubw4x2SVSV7hYFeR/jb/bVq0IR0HNklPT0rVMCzqr/ICEK1rK7uhO1i8eHLmHBWGQOgch1RJHLe7rtwV6V+aepaln3c4px6y3C9j5SruuT3TWB8e2jz3GvKXccDlzwFREzFPhWC3d8NUEvwfvKzsGLHp1d3/C5oXq1MOl9IeY0Rr7oKsY3vqSBQvNqBnodFx5Xriy7yV4C+Z5W9z+DA3O+FNeeMIy1qG8nPkm2dbMe4mRijYVaZcWcm1XWynyaUj3ShDBxlXaR7iAy3Fut0XhcGQWhcbxQq07uvNxnvyvHJr4F+O547rhiz26S+cmkiJYhi5XkRA+hyIigbBtOIbiq7Cuz9ddO3gnKdzfucmf3WYiJ8M6BrgZGTFejurEXfMg10Uq49ut+nwg2i2O4R2xQ6GwQV03quQX9VlL7vz4rz1UFvgc6ydRo0XsFYDNqUT6IOM1Qz/B0ClFfgMW9eHmXk4wXnsjWXmvpIUnhxjL5BgIr3bVKHqvppsvi8vtXJ35iqoJr2OR/Sc/b680BQ6q0mLj/+okRCsHGzersr0WozfANSfs1iOfsqIhxjELhrE4i/gyyuK/deWI6Ene83YRCEh/2XsaKE1zjl/b4x/4CZlxjul8YYmc6NYrpxIYhiZWpQNmfpsxbTYpu4kYBdHBNTvU+8QcAzNvhXiMdWROj2mOpbl+5Jw3wIE6tYrvu62lIgBH6F2ErZxCtmx/k31WxqpgMzlQjCOa6DWeswgFWM4kYAOxcWfn5MAfQBlKyN2w+GgaFG3mysMVJuHPL+tgbpKDBOVnYLjr6orGu3xKH+Exj/kRvO/rzSmL+FmNZFvOpcotVNAL8EWKtg2TfvPg/PVHprLtfX4u9K3h+fVXMCg5Uixocc4i2lU/8iMfWAsXxwcPvfOG8wmrCtOSKc2tfTdadJ3flwornc50B0BEZi2hdJSmHwewJ1ZoeG7wqC84hyi3Uas63K/bCLiEdVoEMiCKWG7NYI83WtYYJLMY3CN1aTa8+PC0g9fhe96RbWFT8FWLeEta50bRtXgggCjqQVBAQBQUAQmFgEhCAmFn+pXRAQBASBSYuAEMSkHRppmCAgCAgCE4uAEMTE4i+1CwKCgCAwaREQgpi0QyMNEwQEAUFgYhEQgphY/KV2QUAQEAQmLQJCEJN2aKRhgoAgIAhMLAJCEBOLv9QuCAgCgsCkRUAIYtIOjTRMEBAEBIGJRUAIYmLxl9oFAUFAEJi0CAhBTNqhkYYJAoKAIDCxCAhBTCz+UrsgIAgIApMWASGISTs00jBBQBAQBCYWASGIicVfahcEBAFBYNIiIAQxaYdGGiYICAKCwMQiIAQxsfhL7YKAICAITFoEhCAm7dBIwwQBQUAQmFgEhCAmFn+pXRAQBASBSYuAEMSkHRppmCAgCAgCE4uAEMTE4i+1CwKCgCAwaREQgpi0QyMNEwQEAUFgYhEQgphY/KX2ChFobU28a3CY7gNh/2IRDByd6e36RYVFzohs9S1tXybG90Y7S7gt3dN16ozovHQyMAJCEIEhkwyTAQEhiMpGYSoQRF1LYp+YTefnsrFL+/uXr62sp5IrDASEIMJAUcoYdwSEICqDfDITREvL4l1yXPM1Bn8ewItxyrb09Kx4vbKeSq4wEBCCCANFKWPcERCCqAzyyUoQzc3tn8iBHwIwr9CzPwlBVDbGYeYSgggTTSlr3BAQgqgM6slKEHXNifkW6BEAOwhBVDa2UeQSgogCVSkzcgSEICqDWAiiMtxmai4hiJk68lO830IQlQ2gEERluM3UXEIQM3Xkp3i/hSAqG0AhiMpwm6m5hCBm6shP8X4LQVQ2gEIQleE2U3MJQRiM/Pz5Z9TU1m74LAjLmLgFwJ4A4gByAN4A0MfAHcMDc3+1Zs1NwwZFjklSLJ8tVgZLCwHsDCBWSLSWgKdAuH2wln+xZlVyg0n5mg10VCtE6ZlbeWMpOgDAHBDeBPNjDLqhXB8WLDh2x1hN/BgQ/hFEHwJjx0J7BgC8ANDDNtk39fck/wCATdpaSZpyBLFgYWLvmE1fAuMIEPYo4LkJ4N8TqDM7NHzXY4/97M1K6lZ56uqWzbPi2SNBdASA+QB2LcyJYpFrAf4TA/fmrFjy8dUdL1daV5jzrxKCyGOdtX60pT8nOftAjJ+yzeem00k19oG/+ua2owi43zDjWzb4oP7e5Bq/9D7zM6tUZ4mpJwf75uzmHforWauGbZ02yYQgfIYykUjEXnmd2gD8AMBuBqP+KkBnpns7f2myOTY0JObAwukc9GxmAAAgAElEQVQg+jqA9xqUP8DAT3i45mv9/Xdt9EuvIwjk+DOI0TGF/szR5mc6M53qvNH9W13dCdvF4sOXMeEs10aoLwbIMPHp/T3JZwz6FTiJF0FQjlfBsr4F4vPLtHMAhBtrY/y17u7k30wbMEKudCWAAx0kXi57jhk/z8Ws84MQRRTzLyhBKHKaNWfDdQCfESY5qLLCJIj9Fi7dI2bb3yJAkZg6vJX7XgVw0e67cFcymVQHPfk0CAhBeEyLhobE3yFGdwE4NODMyRFw2eDA3Mv9Tij7tSZ2rsnS7QwcFLB8lfxptqgts7pTndK1n44gCLiWgX/N3xr0359zFh/w2Orkn50/Nza278cWOgB+f8C2qpPlRenerh+ZEGaQsnUEQeCTbaKlxDjcvCzut+O54/q7V7xSJg81NLd90Zdcy1f6msXWolSq44lySaOaf0EIwoscALqjNm5/MQix6vobFkE0LkzszzbdUbjFlYPW+XuOgdtnx/ncavsSpNKplFYIQjNa8w9MbF+7mZLazTsvjsFqgP7C4O0IaAawu6uYHIO/nOlNqpNmydfYuHhPtuIPANin5Eez8lU2381Gs4EOARgE8O5CnesYeJRAbwN2PUAfBtEN6Z7Oc52beUNLYgGYlH+jnVxtzQL8HIj6wTQI8HtBWOgQORWT50B8Sbon+cMwSUJHEACU1e0ujnaqNq4BrP8CcS1sfAaEvdyYE/DI4GxO+InvGlvaljBDbUJuct0E4I8APVkQOcbA9r4g+rCWiBmP1tbwIr8NKcr5Z0oQebHWnPVfZeDSsTelcMhBjUHDwqWfgs1njoyH/R6AjgQwqzA+G5lxPxG9U/j/AMfp6kx3xwtjDi/e45IDQR10Ump+EnhvBuod83+0GCY8MFzLx5uKb6fSBl9tW4UgXAi2trbGh7LzrmWwEqU4Pn7WZpz7vl3xqPNKmhcDvEFHgXGTS0z0msW5g1Ope//bWcqIPJfuAXCIq+qnmXBmpqerz72RKrEGMd1MIxPc+T1tx7OH6U6/Hhuoypsj0DWcsy91yo7VFR1Wbvjx7qR6U8l/HkSWJcYN2eHhb7ll+AqLl17D/hZZP3bdNgaYeWkmlTSVN5ed1z79y/eRgRt5uOYSlyiOGhYu/SRs+3YAHx1TCeHqdE/XBToSU9jEbVtZ+X7EkectIpw7+M7cTt1NUYkPKWadxmB1YyuSsso+BPCidG/yV7pORj3/DAmCGloSF4Lpuy4xWtfQbD4jio20EkO5EYKxFY7Ow0uOCB0xZC9yu+lwiOyucYt0CXTDrPjac7u7u9VbhXwFBIQgXFOhsTHRwBapSbed46dVyHF7Op38P6+Zoz1pE13nPpHXN7WdSYTrgi68/HV/m/VXgKFk68UHbMBjY/PaQBm4ZXhg7hfKPdDlN6rhnW5gwuccfVYb/WmZVLLL7zagxGfxLJYD1FrMy0DGHho+spqH4RKidXlzLfxe9sZSEN90Ft4RisV6PoI2NLedDeTHrPhttNg6MpXq6Cm3kxTEHz9zzidiXNGX6vqqLm/k86+8N9dxJweFQ1CCKLzfLQfRIuf8NBFp1rUu3t3Kxu4BqM6Z12Ze1J9KKmtu+YQgtHOAGlrarwXzOY6N7Y+IW4e4r7a63CWnM2CMTF+JDmZtxgNbNH0aK9k489f+bTbcwcztjvq9byqlG+hGsvnQvr5kutwKaGxs/yhb/GvH6azsxusss6Eh8QHESOV/X3HjJqIT+3o6O8rVbfK79w2Cbhoa2P6ccgSoaR+gIfTW1lNnD2bfThbEHyNN06TzarMi2sHsTncDSIyOOePOTKrrZA3JRjr/VP1lbhBU35I4hZjUm5FTlBbZzaGISVCC0BEpA5dleruUwkdZ7Tnt+DPfBxvLKtXKMpm3Uy2N3CAcI9bQkNgNceoG4wOji5lwcaan6/smA1tQrVSb4t7FTZGZjsqkOh/ML87mtgMJUBpORTmrr7hBV6dm4wZr2qjfQLk/hprDenvvfqtcfxqb277JwDcqIbJiHncZAK+sjW+b6O6+dXO5+sv97kEQ2kd2r7JK24en7eHYgU4X0/mTaoz+kUfemvYlYHub+bj+VLK3XBuLv5dsyh7vEFHPv3IEoXtnGS/5fFCCqG9uu4YA9V5W/ErGrtz4aG6GRqq05cqdTr8LQThGU7OBryObDujr63zaZNDVaXFzdqc7CFA3hDVg/j3HrI6itlFjU9vlTPjK1rLMN+xiHt2JVLfxatVAvU+uY7qnzRuAKEdPhU2JZovy4rpt1d8YeDmOXGtv773Pm+Dpl0ZLEAFO9qpszab0ts18aJDN36QfpgQR9fzzI4iJJAePsfD05trcfPwOOQw/6BQR+YntvMaouXnJ+7OIdRPydjIjn4eat8k4T8c0QhBOgmhpO58YTs2j31q8+ahU6n6lqVLV9/GDT9r2Xe8M/sypGcXAtZnervOCFtzQ1P4FEP/Yka9kMVWzyWsWTs55EzJt74isN77acaMaYuCITG/XKtMyvNLpCZCWZFKdK0zL1m00TLgg09N1lWkZJumMCSLC+Vdsp07ExIw7CVAq3Y7HXu6JoWaRyW3TBINyaYLcIBobE5+ERY8w8J5CuRXNK734UCLsOcdKCMKBRkNL261gnDJ6mDA8cZeb/Or3+a3L3jMrm/01QB+v9rRS5zqZAyi5GntsoCdmUp1qI/D9NOUrUdhKwPprubzO35l5GyIc7XygZSajNpSrR9O/wOIB3W1MWQf3pbpUwJqqPjXeNdlcAwHLACj1za2aTF4ipgjnnw9BPAfOK2S41ZiNH+KrAqqQOQhBaG5ar7NFB/jZBXm1seRWb6CGHEZ/p0oZQhBbR4rqm9puJ8KJxT+FtVmo8lS0rCzHldbL348SUIUxlDWLyYwgDOsLaMAUaK7r3ksCFVBIrCGIP9vx7EIDg7cx1bkPBQgQo1mdQIeGNs6zrfjHLdAeTLwAjAVA3tbCyxhRydp0thCRzj9PgvAFn7uHZuOYKNRa3dUGJAi3i46KgwuZ3u4qmaPTIY8QhPeGo338rXTQIyYIJd8/OtPbpQza8l85X0V+/ZiiBFHRJlHf0vYVYlw+ikcZgii4dDiPAKVJ5jaQNJseGoKoRiRoVulIKo2mnTO7MkqrHaNGzXxJOpX8nolmUJB2TFqCACqaR9X0fTLnFYKYHgRR8rgqBGG27EpEDB4EEdQXlaN29X6ltMaK6r7aG8TEEwT352CdHGP7+y7bgnWwrEPTqzt+Z4ZoZakmzQ0CwRVHKuvx1MglBDFKEKX66iJiGp3Ek+5UNZ4iJg/DqtIVPuImRbmCyAD0W4splUp1vF7f0nYR5b3nFj7tDSLa+VesWn+D2OqPSrNRA+NgHzBpCELeIMbMayEIBxxT5ZHa/UhHwF9h80F9fUnlDyj/VXWDaGo/jIiVuCpvsa0rf6LPPxE+Uo+xclbGiTVz1t9IwGmuPq8HoYNtur/GGn5y551j67y8gprKuaOcfz4EscaOZ49xvN1QfXPbt2nEB1PxU95oz8mkupyac6FOgYAE4bYnqviR2m1Pofxy/W2b2mOfeviOt0Pt4BQtTAjCMXAl8mggsJprXn5PuAXMb4DoCeXYrza+7nZgr7jbIrfSG0q9Sx2SgT/ycGyh08CrGoLQqBHmmHlxmL6Uql0vmv4FVsXVaZa5taw8XF/8Cjk+wc/1irN/pgQR5fwr+hgy8cXU2HjsTrZV8zABn3D04yXk+IB0OvlctWOnyx+IIBa2f4TsvJV/0TFj4LFXbdCpnle6JqPAZDKUKQThJAjXyVl5Bw2qPldqDIdkbXzd8WqBTrihnKEWk1YlN6ARmoJVWX3bFj+w5TSqHKA9ScD/EvP1qVTypWonv9bdt4+PI119ms2/RBtMM55BN8oS7SQPLSbURzz/FAYmBJFP15Q4moiUW5RRbSxTP16VjG0QghBDuUoQriyPEIQDN42rDPXrOenerutN4NX5WnJaZupcbTDTsiDGXToZsamrDbemk0+fSnwCAQi+MZaKKgITrlcbPVyJ9A3NxuGGapmaPvKY/KZW635zIx95rianDAO3eo/1kHNHPf+CEISHaG2ImU/OpJLK0WGoXxCCyPej1NXGH7KWdUiQgEya95jAtjShgjAJCxOCcAzKyIYw7zaAjy/+WYlvjJ31NbUvJuLlDl9LY1x1ROSsT+sOpBoRk+p7XVPiIIvovrH6/GaO8FR+vStmXlEb3/aECH0xGcvK65uX1hFs5SNrB8cUGHMY0FnaBpRR6+T5XnYQiHr+BSGI/BiWOlxUf/Z0MV/N/haUICJx1gd+EDksEWd9W0dSCMI1q3UTzySgTGExqQ11NAiQkmfOqll3ltPHvM7dt4lDNC93315+7KslCA93ykbR8jzcaQ+E6U7ZJx6EUss8Nr26Q8XV0H66sQKgPYE2NrX9xOXy/C2GdVimt6Pfb0MciROCC8B0hSYEpufbVuTzr7y77zHd0s3XKGInuAminN8uj/mZZfDFmd6kcpXi6dHVy9132DFLqiHMyZJXCKJ0JKihpe1KMP557E/8hE3x0/t7lv/eOflGgpCosKF0syvkYcCAQfwsWTi7b3XyN+7J3dSU+FCO6AYCPutq7jNkZw/v61vxorsb1RKE9y1A/cIrLcaFqVTyf1z1UuPCxGfZxvX5CHVjPvPbh8niKBMwaBOYzx/avMPtTrffPmPlKTppbGlfysx3uqKqPU+W/XndWKk6Xn6D6sH4oSbAU7FrfmrDkc4/0zeIYkMLt96fO2N7AAiV7PM3G83DM5gv3X1X/MBLO8wrYJBX/O/82LxmLSLify8NTxru/DSZw1MhjRCEZpR8Qz4CrzDQS6CNPmE2B4hwUl9P1726SRBSyNF1ID4q3ZN8TFdHGAShyvUJtal+HsWiEH51f41PH6Unm44ju8Qd4auaBaLpnwpCr2J0H+goVxmprXKEh9W1T4WmvGronblf0cWQWLDg2B2tWTUrPTb7tQD6VPkjddofBehjJWEtCcrfkfJ1VAxC5esWJMr5F5QgVK+ampa22GSvHONTK+QAUFrFCFV53raENjA4G2Prc+4gTT7z0zjkqImEoJq5OpXzCkF4jN7IyYlUGNG2gAM8wMRfzPQkbzO45t4NUEvA8lWxz8KKHe9n3RoWQYyQROII5nxQeKe83rDZW42wDDMYJdP0709k0zK27H93RQrzKy9LwLcGB+Z+zy/AUFPT0k/bZCvx4a5GjduaKAumq7iGfoSs/RABHyz8tJ5sOrivr/Nxr/Kimn+VEITapnW36iABegxw87g5bc3p5eixoP2l1tt7DepxJsltEQmrYEhnGSo2BCx+6icXgvAZQ78YtrpsKqwmE5/e35N8xmRqjMhR6WwQVPjJuQZ5NhHw/Vlxvtov6L0qJ0yCUOUpH0Q1zD9g5iUambqu6ZtA/B1kcV0Uj346gohTtiWbjQ1S3PoRMx/nCuvqaqO3SE/XmQXN7R+0wLf5iI3cG88qm/gCNRd0j90mTgujmH8VEgQKrtvVo74zlrfRe4zBvM4n0YWqdeb1i/kQfH7ys0S4sK8n+UDUfqZM+z8Z0wlBGIxKQeXvUAJOUgdqADsXNp8cGC8TqNu2+Kd77MwZL3mpXzX5zS5rHQawCks5tnzgjYIYI1kbtx8sRwzFesImiGK5Sm0zVpNrZ6iwp6Q8084r/KZOY28A/BRg3RKkrQZDUJLEiyAKYiyqb166gGCrWBtKrDTSxry4gh9j0A3DA3N/VS4sqbvS4vuCZdPnmFjd/PYcJcuRsv+HgXtzVizpVrd0Ry8LEqM7zPlXKUEoLOqbEu1EdLtDS0/9+aHaOB9nOi/LjbU6NFHMOo3Z/hwo/47l9Io7alPkVc6IM8VcgoAlIPoQGDsW0g4Ayg0KPcyg5XvsknuikrVarv3T7XchiOk2otIfQUAQEARCQkAIIiQgpRhBQBAQBKYbAkIQ021EpT+CgCAgCISEgBBESEBKMYKAICAITDcEhCCm24hKfwQBQUAQCAkBIYiQgJRiBAFBQBCYbggIQUy3EZX+CAKCgCAQEgJCECEBKcUIAoKAIDDdEBCCmG4jKv0RBAQBQSAkBIQgQgJSihEEBAFBYLohIAQx3UZU+iMICAKCQEgICEGEBKQUIwgIAoLAdENACGK6jaj0RxAQBASBkBAQgggJSClGEBAEBIHphoAQxHQbUemPICAICAIhISAEERKQUowgIAgIAtMNASGI6Tai0h9BQBAQBEJCQAgiJCClGEFAEBAEphsCQhDTbUSlP4KAICAIhISAEERIQEoxgoAgIAhMNwSEIKbbiEp/BAFBQBAICQEhiJCAlGIEAUFAEJhuCAhBTLcRlf4IAoKAIBASAkIQIQEpxQgCgoAgMN0QEIKYbiMq/REEBAFBICQEhCBCAnIyFNPY3PZNBr4xti10d2187Snd3d3ZqNu4YMGxO8Zraw5jxtEAPg1gZwBzCvWq+l8DsAbMv7Sz8ZX9/cvXBm1TS8viXbIc7wHw90HzFtLnALwB8HqAehn45ew4/6a7O/k30/LqmhPzLdAjAHYo5mHg6Exv1y9MywgrXSKRiL30Oj4ZY1rMhEMA7A5g3mj5hDfBeIFAvyVGcvPm7desWXPTcLX1z59/Rk3NnPWHEvgsgPZ11DkA4AWAHrbJvqm/J/kHAFxtfZJ/YhAQgpgY3EOvta5u2TyrJrcKwEddha8jmw7o6+t8OvRKAagN6tW1+Ixt0+UE7AcgZliP2qhX2cQX9PcknzHMgxAIQlfVAAM/4eGar/X337WxXFsmA0EoMrZm1VxEwBcAzC3XZsfvfwHzt2Hj5nQ6qTbzoB/VNyXaiOjfAby3XGYGMkx8epAxLlem/D5+CAhBjB/WkdbU0Jw4FKD7AMxyV0TAt/p6u74ZdgPqWhL7ENPNBNRXUXYWTFfBtr9hsmFFRBCF5tPzsOi49OqO3/n1ZyIJoqEhMQdxnAOmrwF4d+W487NkWyf39XU+blqGujXM2mb9FWCcH+AgoIpXRHRRurfrR3KbMEV7cqQTgpgc41BVK1pbW+OD2Xm3AXx8oSAlQrAci/hpezh2YCUiHY+GUUNz+0kAX1dmk1oL0NsjZfC2Y0QfpQX/Cjk+IZ1O/p8fGNESRL7mZ8jOHt7Xt+JFr3ZMFEHs15rYuSZLtzNwkA9GajN+A6At0kZW69sp5nNn2wTQ6eneznsMNm5qaEp8E0Rf1ZDDKwz0EmgjwO8FYSEYO7oqy4H4knRP8ocGdVW1HiRzeAgIQYSH5YSV1Ny85P1ZxLoJ2KOwGf965F86oNCoHBGd2NfT2RFCI6mhJXEhmL6r2SjWg3ArE920xzz7j8lkUomRRr/W1lNnDw9v3s8mW+VVt44x4igCHhmczYk1q5IbvNqpJQjCbemerlMN+0bzW5ftOMvmD8K2L9ryJnJUSTuIOgff2f4kL1n9RBBEY+PiPdmKPwBgH/fGy8DjBLpyaLb9sAY7ampauguT/Y8MfEkjjhogwkl9PV33+uFX35Q4mojU/Cm+Kan59TxZ9uf7Vid/49z0ldjx5desRUSsxFC7OspdB8s6tNwNzXAcJdk4ICAEMQ4gR11FQ3Pb2QDUaX6EFhhX2BY2EON7W+sO57G6saVtCTPuGLtRIMfAjTxcc4mJDF81sb4pcRQR3ep86B1pPK5O93Rd4HXKDIEgnMNRlKff4urPgM28qD+VVA/RJd94E8T8AxPb126mZOnNQb9Be823hobE3yFGNwI4zpXmNYtzB6dS9/63Lq+qf9ZmPLDl4bnR8XvZm1ZDS2IBmNTD/U6j+YiuS/d0niu3iKh3hXDKF4IIB8cJKyUvk47hXoAOKzQix8xKo+VVl6ZN1Y/VDQuXfgq2/asxCx4YYOIvZnqStwVd9NoNBNhosXVkKtWhNJVKvpAJIk9JuhsRA7dkertO1/VpPAlCiQ+HsvOu5by2kPPj7mwcyx7vTr4RZPLl3xHmbLgO4DPGMKXPrUnzvuVLoM5y3YcXEJ5DllvT6eSrQdotaScGASGIicE9tFobGxMNbJHatLdThTLwchy51njcWjc4TPeBsH+xsmoeq/NEZGE5iBY5Gp8j0Ll9vZ03BCWHYhmNLW0nMkPdJLaKm5jvg41lukfrCAgCeg0wfmooHj9gTffyv7oHazwJoq4pcZBFeeUDh2gHa+x49pj+7hWvVDKRChpQK13KBV6bPtU3tylFhNO21sUPIoclJkoF9QvbP0I2K5HnLoX8b9vMh/ankr2VtF3yjC8CQhDji3fotTU2tV3OhK84Fu/K2vi2ie7uWzfXt7R9eayYCRU/Vuu0pNQpe3hg7heq0atvbU28y01kADaSzYf29SXTbsCiIAhVR31z2zUEKNFH8XvLBh/U35tcM1EEobkdqqa8xbAOy/R29Fczmeqb2hcT8fKxWm+lYsjm5uN3yGH4QYDqRutjOjOd6lSiqrKfbrwmymakbGMlQQkCQhBTeFJoT76OxdvY2P5RtvKnt6IMuKLHao2WlEKtapHV1ltE+1JmvtN5i/C67URGEKVk6nnSHa8bhPt2mMcrJBm+x7vCn3MWH/DY6uSfi2Mzotq6cSHs3EIiamDQ39tsn2J6AyhVoECOmY7KpDofnMJLb8Y0XQhiCg91QbNkhWNjHbNp60+gPHrDMO26RkygsiZr4+uOD8NCe4TosvcpNUlmupcYq3bbzX7BrQWlKh1HglDiOq119HgRhOZWE6p4prG5/YtMfD6YfsnglbPjnAliUW4yfzQ3z9fZogMyqzuVhbV8kxwBIYhJPkBezdOf6ks3/4am9i+A+MeOcgKf/Oub2k8gyp/wt0oZmE7MpDrvGm/4xpEgJlTEpBXtgPtjqDmst/fut8Yb90rqK9xSfg5Qq2PieL4vVVKH5IkWASGIaPGNrHTdqZ41m7bmio+gj9WNTW0/YcLnip0h4K+w+aC+vuSTkXXQo+CICKLkIbb42N/be+/z7qaMxw2isTHxSVj0CAPvGc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leAW+y9zpXZQAKYkLGO0GIdtU1ts0n4pttqeq9YNwCwh3Mxs377JV5JMzErKKjxsaFB5tkiuC9vRXKC5/6e8ikmwcGdv2D6o5HYlN3MzMVHPD6mT3KLX+QiTRwtL0C4LYiBZkUitmhB2nXhCcIa/A5T9aZTu/taRd+5yOP07wk246VgiBUvUGC9Y/iSo8TgnBNF+LVuoKDTsmh2EQgCNHG2ub4AcQkzsDcVu0yKF4l4IrMUGy5S2qLojqH8J6LZMwriTDPJ72C/Tsi7ceNUUpfnMut5SbE8Mp62kqAj8+VkbnrSgJElQ5cyyl/kIl0XBCEx+2Xdv0EaddkIQinmangsMbPvCSA0ARR1FyTV9kvmZjqlyYTQWTbbCVDI6ZzCBA5b3KXX/lBspENapWltvCrqPK7NdGa5jICFtsOlf2qKuXkkZiORmKPch9wHvCqetXk6pdD/iATqSaIxBt+nUX2e9lNTOKjEjPTi2zQYbbB5Gte0gQRRr3udUpGEM7d4QQ8g3BDycryudnYnzI8jwltLikX7NU3mtH0nKBmuoCapbqWhfvSEH8OBp8EhrCHj95nXviyLTCM2c50E/ZiksPnvENRyS6jmAjdkslfLEEUmwHBS28uSTqPSXV3CI85zydIuybFDkI0wsvMVGBecrmFTu8g/LqW+u/ODkzAv2HyEclkYjRnkf/rZO6MBZcnTRQTk19zLa8fc8dBYHMxGOLWxJx7qL2qbyCU33eC/C5yNtXUvLJ/hiKLidEmy5XlFsBo/45X5LPknKIgtUYQme1li5E/yEQqC94jxvXJno4vhZVdE4QPcoWBNnC1Y0sCbEbMTI7tq2vIvyaI0nVlyQpH2ZUuJ4UkqhaQnC/VFcZLKEcrW4uLxrY5RCxWXrn8NJ71g+ZiCoOq2F089wKWgOi/7St4kbgwjOtkGBkkdai+uXUWGCJX1gh5iRgKHorM9HKwqG2MNxlk5Vfaefi9ozFITpdVVXfNEG0KJH8QghCyNDS2XpeXqbjIIDJNECUkCKeZyZYC4BlHcJw0dF2IogkixJBzqSL10w54f7jqzkCit0AutXXNrV8jxk9sTSkZQdQ1LawlzhxJRPUMHJC1rf+XItLCNHoJAefZyoc67M9bzQtCZfMoMNULCy0DyZrolsXKAYzN8SV5NxQCvoQsy9CazWLwe8f9Eb45m6wFwRjIH5QgCqKMAb/AXVk3yHlziUC550SWYGZzbU3s5dV2/WgTk1jZNbd+gxiXqQ6OgtxMTCeSaXba02d7pR3WBKE4bSkUc4n0dCVn2SsLA8zkqRqkemNakOppFylVPB+XZHqlIwhnHw64qizwQIP7Ltqvrbnfi434VSVupzzO8Sx2CmzyVfnp7RXSceSnywkcsawqf1CCkESOi2CWi1LdHd9RjWuRxczIvL40QYQjCIc3ExJEaGeGuBRFmA88VyeaIFSnGP9yLl4dIs330lRPx2guF5dXNTYu+JhJkQccPvpS+7vUFKWQnVR8urFxYbNJ5j221NLizyUjiELTCl432Diqp2dVlz+K0kXSHw3ecXRPz90iLiHUI0m1EChnUAHBAEoxLgUTKOMhEK9467Y1kS68KtsY3zOWsZI/KEFk02nfDqK5NsV4Zle1K1Ac1g+mpy1n8Bm2v/czjCNT3as688sWXk2s6mIftF15u8+m1qNLeX3xmHgx5Rog8Wb6Oxj/HL3f2Xt1ogki1HwjreSVjpiBE7xuoqodTgj3a1tGT/GNv6QN43Nu9+gWXHMJ+A5Mj1veAhGEl81cltVUNcOnLKNtKezzstgEKOAllCBP+V0YvCjrFJJU0y8S4SFmnJAtr2SSGSv5JfOBby6p2sb4EQaRCD4c8fxSzHNFdY3xViK6Kc9rzCWbs95BhNhBiE4myc000lf93M40QYwJQYiPuN21nL3D17gO4PfbpPFd4UpWtSKZ8NNkmF9KrkuIdAcjqSuEZ0us5rVWIhY5nd4tabUnQUj62CZkeG5vb+IpGYINza0nMkNEUdsuaXG/QEYIPnyXcQEOSimZVbTosnN6mZm+NrRj1w5ZpLQI9DMYKwE62L7CNZnn9vUk1qp8tzD1hr2WeurosZBfsuCE8Exik89yy6jrsguwdqVgPhcmbnPWra09YZdIdOgiJoidQ1Rl96EJIjxBOM1MObx9D9I0QagMcbUyLjsI281V1nu2EZAS1y9mr9v8rNy1k64d7N91qVd6B89AJdv1iW8lotuPhyOZRwLUhGcQCP3M1vWS1mA2wUf0dSc2SFfCzpTHw4XEdbAvAJQmxrqq2JQzcsnuXEwPw7Xyr6CEJR/hIMnVkCXL7pttk/Do+QkY4npN55N3Fap1XSUgrv+cVljUXzf2OhKX1pGf/VJrOL5ddvldzqesfjt8jadQn/ndZHfiVrtsHlfMimLDebeY/jRcx+06T/Qz8ddTXYmrZX1QE0RIgpCxvgWwwuGgJghZVwz3NxcvpmUm8P8CXIyeAeHKwe1Tz1fJ/VM/c+F/wuRfO3YfPg0YTr0dzdClYJyULexJEC7nI7bvFCakO6Qlvmc0jdsdVzaqgpsWzhUD/VMvU8FB9aWWjtLGVQCL6Omgj7ii9JaaKJ8luxLT7WUu5iFRXCm1hv29YyF/XWPr6UTWpU2O+7iHJXEz+Q2b4ujat8yJ4p6XoI9IZXJub3fHVW6H25ogQhKE0ITMzORnXhL1NEEE7cfu5d06MGW4h6LGVcws0kxIB93wW/mvZOBMp3nIT8IAuXlEttKraqL8bTHBOWIb/HabsushR0Rzu2VN7CQ4QhcSIK729IpOtjdzIxm8LCgOfjjlfrfiLV6k098ybVwEYKpiPXFh07nT9+KOMIkEZebAoKk1xkp+BRIqSB7pkE0QxOUA3qOCLYsdNfEpftmcNUEURxBOM5PfgLd0pwlCpQurlfHpwFTXtPBQgrkMBBF4tXv2reJS+ocYuHGfvfgPYSaf7HusfEcG6CtgHAFg36xtV6zM/sGgOzIGXWM/8A5IENZnhm3yJK6HFKYxu/nF8zAzO+nMAVj4uourNUU21ZztWZh3/gUYD8Iwb5g+DZuKwEFNWeLwecapserq1z4DwiImsxGg6TYS6wf4OWKjJwPzhvSO3fqK2cnIUm8APLe3OyEC6UI95ZRfkOjzL9E8Zj4boE/k58/yvwZWyBat2VobgXGKBFtL3wy6xwTduL67/W8qLrGaIEJ1E11pvCBQTAceL23QcpQHAQlBlCy1Rnkk1m8tFwJFubmWSyj93vIjoAmi/BhP1C84s7uWwnV3omJR6XJrgqjQHqAJokIV79NsySG1b2oNjeTkRUATxOTVrWfLNEFUqOJ9ml2YjoLvRQYL3OIKNIqTGwFNEJNbv66t0wRRoYr3aLY4rK2a8toKgE/NFssQ0YnJrnaRakM/FYiAJogKVLposiaIClV8ttkiXUpkkAeTyTutgLL6+vgH2KBL7VebMvC4YQ7NSibv3FLZaFVu6zVBVKjuNUFUqOKzza5rbJtPxKs9UPBNn1LZCFZG6zVBVIaeC1qpCaJCFZ8jiKZWt5Q32RLBUnRUNpqTt/WaICavbj1bpgmiQhWfMzE1xWcYIJHAbzcJEh2DNXzqhgcTr1U2Srr1miAqtA9ogqhQxWeb3dIyb+pAuvrHIJ6XjZRPA7yBiC5/z568ZiyiwytbAxOj9ZogJoaetJQaAY2ARmDMEdAEMeaQ6w9qBDQCGoGJgYAmiImhJy2lRkAjoBEYcwQ0QYw55PqDGgGNgEZgYiCgCWJi6ElLqRHQCGgExhwBTRBjDrn+oEZAI6ARmBgIaIKYGHrSUmoENAIagTFHQBPEmEOuP6gR0AhoBCYGApogJoaetJQaAY2ARmDMEdAEMeaQ6w9qBDQCGoGJgYAmiImhJy2lRkAjoBEYcwQqgiDqmlqPJuDuEXQZD1XHeG5nZ+KNMUd8gnxQ52qaIIpSELO2MDHfVhN8RF93YoNCdV2kghHQBFHByvdq+kQgiPr6+BQYOAWEwd7uxLValXIENEHonhEWAU0QYZGb5PXGM0HE4/HI8y8ZRzGblwL0ESacl+rq+NEkV0no5mmCCA1dxVfUBFHxXUAOwHgmiPrm1qvBOD0nuSYI706sCUIP8rAIaIIIi9wkrzfOCeJmME7SBKHWCTVBqOGkSxUioAlC9wopApogJk/H0AQxeXQ51i3RBDHWiE+Q72mCmCCKUhBTE4QCSLqIFAFNELpj6B3EJO8DmiAmuYLL2DxNEGUEdyK/Wu8gJrL28mXXBDF5dDnWLal4gpgx49RY9U5b5zLjawB9AsA7AWTAeJZAnabB1++zJ6eKuMSd6loW7ot0Zr4Bms3AAQD2BBDJKjsD4CUCNjFze2YovWb9+jtfCdsRDj302N0jseg8Impj4JMApmXf1Q/gHwA9YJJ5bV9X4i8A2O07YQmibmbbR2HyGgL2t727n5lPTvUkOry+GUQWT3wIK3u7Opb4YXjIzIX7RDmzEExtGJZX6F48I1jBMG+YPg2bitC/nxgFv9fWLpoWiWXaGNwGog+DsXu2UBrACwD6AEpUR817VYI9iyUI4Vb87IuRg4nMJWAcAWBfANGsTJsJeAKEW6oivEZFHi9ArH6XNuYA5skAHWTrv6Lt/ySmrqBjsrl5/l5pjnYB+ID17fxAWaprWngowVwG4LO2720D+E9EdHUp2hW4E4yTChVNEIODxkfZMG8RvvQ++tgI4qW9XYk/BtAbNcxsbWaTrwDo4AD10sS4OpOOXdDX96vXVevV1p6wC8WGfkDAlwBM8amXAbiLo5GTU52r/iErG4YgGhrm78tG9HcYJsHcUxQ5iJfIZCmGIGqb4wcYTD8BcLiNqL1euZEMXpZcl/hDGIJT1eEhLfE9Yxnjp8y8wDYBe1XfBuIfII0Vvb0JQWrSpwiCoIaZ8c+wiZ8rjBHxbSV5ZEJaQY9RLAXTf9mI2qPt/FcycKaKTtwIYmAAVRQ1rmLm43z6wTYwvj+4Y+rPNmy4dkhVn5OhXM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style=&amp;quot;edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];labelBackgroundColor=none;fontColor=#393C56;fontStyle=1;&amp;quot; vertex=&amp;quot;1&amp;quot; connectable=&amp;quot;0&amp;quot; parent=&amp;quot;8N6JJebqrzA787TgpwUj-24&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry x=&amp;quot;-0.0038&amp;quot; y=&amp;quot;2&amp;quot; relative=&amp;quot;1&amp;quot; as=&amp;quot;geometry&amp;quot;&amp;gt;&amp;#10;            &amp;lt;mxPoint y=&amp;quot;13&amp;quot; as=&amp;quot;offset&amp;quot; /&amp;gt;&amp;#10;          &amp;lt;/mxGeometry&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-26&amp;quot; style=&amp;quot;edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=1;entryDx=0;entryDy=0;entryPerimeter=0;exitX=1;exitY=0.5;exitDx=0;exitDy=0;exitPerimeter=0;labelBackgroundColor=none;strokeColor=#E07A5F;fontColor=default;&amp;quot; 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style=&amp;quot;edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];labelBackgroundColor=none;fontColor=#393C56;fontStyle=1;&amp;quot; vertex=&amp;quot;1&amp;quot; connectable=&amp;quot;0&amp;quot; parent=&amp;quot;8N6JJebqrzA787TgpwUj-26&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry x=&amp;quot;-0.7458&amp;quot; relative=&amp;quot;1&amp;quot; as=&amp;quot;geometry&amp;quot;&amp;gt;&amp;#10;            &amp;lt;mxPoint x=&amp;quot;-1&amp;quot; y=&amp;quot;10&amp;quot; as=&amp;quot;offset&amp;quot; /&amp;gt;&amp;#10;          &amp;lt;/mxGeometry&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-30&amp;quot; value=&amp;quot;&amp;quot; style=&amp;quot;edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;labelBackgroundColor=none;strokeColor=#E07A5F;fontColor=default;&amp;quot; edge=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot; source=&amp;quot;8N6JJebqrzA787TgpwUj-28&amp;quot; target=&amp;quot;8N6JJebqrzA787TgpwUj-29&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry relative=&amp;quot;1&amp;quot; as=&amp;quot;geometry&amp;quot; /&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-28&amp;quot; value=&amp;quot;All devices go into deepest D-state or F-state&amp;quot; style=&amp;quot;rounded=1;whiteSpace=wrap;html=1;absoluteArcSize=1;arcSize=14;strokeWidth=2;labelBackgroundColor=none;fillColor=#F2CC8F;strokeColor=#E07A5F;fontColor=#393C56;&amp;quot; vertex=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry x=&amp;quot;120&amp;quot; y=&amp;quot;570&amp;quot; width=&amp;quot;100&amp;quot; height=&amp;quot;100&amp;quot; as=&amp;quot;geometry&amp;quot; /&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-29&amp;quot; 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&amp;lt;mxPoint y=&amp;quot;15&amp;quot; as=&amp;quot;offset&amp;quot; /&amp;gt;&amp;#10;          &amp;lt;/mxGeometry&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-34&amp;quot; style=&amp;quot;edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;entryX=0.5;entryY=1;entryDx=0;entryDy=0;entryPerimeter=0;labelBackgroundColor=none;strokeColor=#E07A5F;fontColor=default;&amp;quot; edge=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot; source=&amp;quot;8N6JJebqrzA787TgpwUj-29&amp;quot; target=&amp;quot;8N6JJebqrzA787TgpwUj-9&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry relative=&amp;quot;1&amp;quot; as=&amp;quot;geometry&amp;quot; /&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-36&amp;quot; value=&amp;quot;yes&amp;quot; style=&amp;quot;edgeLabel;html=1;align=center;verticalAlign=middle;resizable=0;points=[];labelBackgroundColor=none;fontColor=#393C56;fontStyle=1;&amp;quot; vertex=&amp;quot;1&amp;quot; connectable=&amp;quot;0&amp;quot; parent=&amp;quot;8N6JJebqrzA787TgpwUj-34&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry x=&amp;quot;-0.8315&amp;quot; y=&amp;quot;-1&amp;quot; relative=&amp;quot;1&amp;quot; as=&amp;quot;geometry&amp;quot;&amp;gt;&amp;#10;            &amp;lt;mxPoint x=&amp;quot;2&amp;quot; y=&amp;quot;9&amp;quot; as=&amp;quot;offset&amp;quot; /&amp;gt;&amp;#10;          &amp;lt;/mxGeometry&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-46&amp;quot; value=&amp;quot;GPIO driver suspends non-wake GPIOs&amp;quot; style=&amp;quot;rounded=1;whiteSpace=wrap;html=1;absoluteArcSize=1;arcSize=14;strokeWidth=2;labelBackgroundColor=none;fillColor=#F2CC8F;strokeColor=#E07A5F;fontColor=#393C56;&amp;quot; vertex=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry x=&amp;quot;120&amp;quot; y=&amp;quot;720&amp;quot; width=&amp;quot;100&amp;quot; height=&amp;quot;100&amp;quot; as=&amp;quot;geometry&amp;quot; /&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-47&amp;quot; value=&amp;quot;&amp;quot; style=&amp;quot;edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;labelBackgroundColor=none;strokeColor=#E07A5F;fontColor=default;&amp;quot; edge=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot; source=&amp;quot;8N6JJebqrzA787TgpwUj-48&amp;quot; target=&amp;quot;8N6JJebqrzA787TgpwUj-50&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry relative=&amp;quot;1&amp;quot; as=&amp;quot;geometry&amp;quot; /&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-48&amp;quot; value=&amp;quot;Suspend initiated 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style=&amp;quot;strokeWidth=2;html=1;shape=mxgraph.flowchart.decision;whiteSpace=wrap;labelBackgroundColor=none;fillColor=#F2CC8F;strokeColor=#E07A5F;fontColor=#393C56;&amp;quot; vertex=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry x=&amp;quot;280&amp;quot; y=&amp;quot;270&amp;quot; width=&amp;quot;100&amp;quot; height=&amp;quot;100&amp;quot; as=&amp;quot;geometry&amp;quot; /&amp;gt;&amp;#10;        &amp;lt;/mxCell&amp;gt;&amp;#10;        &amp;lt;mxCell id=&amp;quot;8N6JJebqrzA787TgpwUj-53&amp;quot; value=&amp;quot;&amp;quot; style=&amp;quot;edgeStyle=orthogonalEdgeStyle;rounded=0;orthogonalLoop=1;jettySize=auto;html=1;labelBackgroundColor=none;strokeColor=#E07A5F;fontColor=default;&amp;quot; edge=&amp;quot;1&amp;quot; parent=&amp;quot;1&amp;quot; source=&amp;quot;8N6JJebqrzA787TgpwUj-54&amp;quot; target=&amp;quot;8N6JJebqrzA787TgpwUj-56&amp;quot;&amp;gt;&amp;#10;          &amp;lt;mxGeometry relative=&amp;quot;1&amp;quot; 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4OsrjYfoc08W61eiSHrnIJ5d6QBKFQ0b92mMfLIwyHDlGXU4Dat9zLCC1PJ9dscG5i1KaHmFSU2ckw3xPc5H76EIIIPp6rlUMIolpIOspRTzFaRvgWxyM0FdWmdnyGlV1U6m1rIYjyYG6P9Sxhhnq/wxmW/RUC0gx6DOA3g9BleyZUV1njEkRx6I1C+z0D+bkh6vFoklr11XOq6wH6B4hbbM+BOoqjR2FYhw2vT/yvrh4hiPLGczVyCUFUA0WXMtRbEMaczEowjg4Y3ttZYu4ZRzPCy+8ZSDxbqslCEKUQcv2d2mLxY4npUg1JuGVS9xVrmHkPgNrziRqWIDShN/JN9vfinA6EaNfSj8Hin+Xf0Q4IviIHOmJ4/Zo/uGUUgggIaRWTC0FUEUyXonLv8BLM84ixHwB7TKVStZuvW5rcYxg4fWh9v3rdzNcFtxBEKVi9f3dTg2hyvcJEZ2ZarGvnjNJa2zsKDUsQqg8aCyTX19z8IlnGw1hZYlxmZiNnjYzc8LJXPUIQfqVQ/XRCENXH1LVEZZEU2Uxd+RDHSgerwnrPs2UwATxLwIPMdFM2RLfds37Nk0GbKAQRFLHi9Oqe4clnqY0YXwLQBWDn/ClwFMwPMeF6azy7SlncNHI0Vx0SbV297yeL1XOku+R/9wytEQTNnNXdGB0Cxqd54vK+gJsq5rnX36H+Kxg/NTPZm53WSnKCCIJ0fdIKQdQHZ6lFEBAEBIGmQ0AIoulEJg0WBAQBQaA+CAhB1AdnqUUQEAQEgaZDQAii6UQmDRYEBAFBoD4ICEHUB2epRRAQBASBpkNACKLpRCYNFgQEAUGgPggIQdQHZ6lFEBAEBIGmQ0AIoulEJg0WBAQBQaA+CAhB1AdnqUUQEAQEgaZDQAii6UQmDRYEBAFBoD4ICEHUB2epRRAQBASBpkNACKLpRCYNFgQEAUGgPggIQdQHZ6lFEBAEBIGmQ0AIoulEJg0WBAQBQaA+CAhB1AdnqUUQEAQEgaZDQAii6UQmDRYEBAFBoD4ICEHUB2epRRAQBASBpkNACKLpRCYNFgQEAUGgPggIQdQHZ6lFEBAEBIGmQ0AIoulEJg0WBAQBQaA+CAhB1AdnqUUQEAQEgaZDQAiiSUTW3R1/w1iGbgFh70KTGTg0nez/RakutLYetS1Fxj9LjKNB9D4AW+XzvMLAM0ToawmFVo5lzL5yyi9V/0z8PRrruQaMY3V9Y6aj06m+G6rR77au3veTxb8BsIujvBcs8L4jycRGXT1tsZ6vEuP8CtrwCkD/IPBfmfguk41bNiT7/gKAyyyT2rqXvo0y5vEgOgiEt4PxpnxZWQBPA0iRRdeMjW33240bL8+UWY9kqyICQhBVBLPcolpj8T1DFp1qZkNnjYysfk5XTrkE0d4V35stug7Arm7tI8aVcyJ8arkEVG6/mzmfF0EASLSENx05MDCgFr6KvmhH7xdA/GNNIbUmCF27HyCDTxlan/htEKJY0Nn7nhD4pwDaAIR8APIPAKfstgv3JxIJ00f6ipL4mX8VVdDEmYUgplF4sdjiXUyOfIPBnwPwRJiyscHBtc9UiyA6OpZ8wKLQnV7koOpiwlfmhvgKIQj/g8HzBAE8GYbZnUze9Kj/EotTdncfN3cs+2oCoIMbhCBUM0wQLhx/bfszfOzyKdrZewTAVwF4YxlY9I/P5c9v/HXipTLylswSZP6VLGyGJhCCmCbBdnb2fsQE3wFgXr4Jf602QbR19lxEwMmaLj4H0KsTf+cdmWnp3Ig1KAThfzCUOEGgGmomD/WSauh0nCAKAJkg/vrwYOL7XieJ9ljPEmao02tBpVnIn2XgjwS6VxEOgffgidOFhkTo8vHR7Zb7ICP/wgMQdP4FKnwGJRaCmCZhtnbG5xuguwDsUAuCcFFJPcwUio8Mrr7f2e1yVVjTBN+0V1uKIAC6sSX83LGVqJk81EvlEIQnoRSPh+Pmjo+/PI+NsDq9nA3gzY40LxtsHJxKrRnUCSMajb8LIVJ3J2+1/Z4F6PtWJnzeyMgNL9vzxePx0FPPUM/r8+EiR10mg7+aTiZ+WE2hB51/1ay7mcoSgpgmadV6gKrjc5bDavK+s9DFauxqpwmuhqtWQxCvAGgBMCff2MdMgxduWJ94rJzGR6PxrRDCTQAdmM+vLm0Nmw4/6AkiEEHY2xyNxv8NIeoDsM+UvjDfAgvLhocTo44+UjTW80Mwvmz7+ygRjhka7L/JC488sdwCYE9buoqw1NVX6/lXjswbMY8QxDRJpdYDVEMQL5JF+w0N9d0zTV2eUdU6CYKBNDHGQejKd9QkoqOHBvvWlNPx9vbeD7KRs17aKZ//5wC6bSfOuhGEqr+9ffHb2Ajf5li4tW1Y0BXfI2TlTg97TG5OgHPSyf5v+rnc7uhYGrPIWgdgWxt2y4eT/ZeUg6UQRPmoCUGUj11FOaeBIMreQVbU0RmauegEwbgbwO0gXLCly+WrmaKdPV8CcHG+rBeYcQYRzp0uglDtcLRpomlMJw6n+n5iF3NbR+9RRHx9uScAzelJFVU1yzBVWK3n30wZ9kIQ0yTJWg9QzQlCCKKKstYShMFfB9PNNp+FslQjxQsk324xzjWIbp1OgtBemhNWDQ/2HzeFIIqNIwIv7ho/jt8ZvPmQVOpWpcqr+Kv1/Ku4gQ1SQMMThHOg2J3D5s//fCSy1YsHEPgkgD5uswhSg+hhBt9ojWdXbdjw8+fLxXvBgsPfFIqEDwPhMyB6r8O55wliGjRhXZXdvMNIKUuLts6eQwhQk9zPN2VB93OJXPritKjaScspP+WXarQHVkpH/ThAd1pkXT4ymPiTH1WDsz4l7/DcF1pDME5g4hiAtwEI59IRngfjcWLckSVaVaFTV6muQkcQ45FQ75xs9mqbWWpZaiaNemm5BU47jBrqqmJSgOjutZw7+w/vd8w2b3ht7OcM7FsAkQlnpgf71enH96eZK55Wfn4KrmT+uZVfzfXBTx/qnaZpCSIai38SjB8DOc9gry8LpgthWWdrLtNc8+3VtXT3kGV9m4BjJhch73r+DmCFl3NPJQPUzwI+XQShPLVD4cw5TDjJD1ZKX8/EJ4wMJh70OeCprSPeQ0Q/APAWP3nKqMNPsZNpdATREuFFYxnjKLtjGwNXp5P9JwQhRIcqZxNZtNA0rJaGJAjG3arfAwOJfylwcr4bmdeWg9AO0EdAvB0D30sP9n8vCMBtsZ5TiWGzXOL7x8PhhRsHVv8zSDn2tJXMP2edtVgfyu1XLfM1H0EwLyKi3YGcrtdpX+2KFRNuy7TwkX6cbvx4H7tUZDJw7dwwn1yYMNUaoI1KEO3tvXuxgTUAvyPgQFWnihXDyf5LvRbPnPnj01gBonN8euHamzHKxF9MDyZWBVmg/fTDjSA2W8buU0JjEB5BlruHhxNqA1Hy06mXYGKJFcKeDUkQGhVTyU6WTkBtnT1XEXB8ISkBd/1r65bD77/zurz/TulCnCmqRRC1Wh+C96j2OZqOIACsBnCYjRyUZ6cyJUyBaczL6YYJp5fayXg49wSpR0tG0a6lH4PFJ06I1doxr4oomEW+zIxbiei1vNhHOUw/Sg+seXxiZ1Y6FlO0I34CyFig0jPz1kQ41GYJMg7wOsCw78D+ryU8dv7AwM0v+infORyjsfgCMKlYUAVLm0KSLMCPgGhEyQTgN+ese7bE3imkK+lw5SIPE4wnmZAm0IQ9PfGHwPioZtPwAsM4MJ1cM1LN6eRGEMA2WYf3s8nMi9OphC/Vok69pKx3NDrzuquYNG0AMc4dSvWfWU1sdVZQ1ainkvlX6F8t14dqYlitspqRICYXF2bcbIV4hdPWPLcLC2MFmL7hUHk8YGVC+7jFO5oYQNavHAueSYQ1IWRXOMNgeDj3gECXzQk/d7Kbo1TQS7KgC3jQS+qg5buYPWaJcVk2k/m2895HYfW3p7G3QcaPHaeNUWZeqltAc/rdOREVKkTdL+U/HjANfEbnX6D6sDlL/0nAWVPlXr41kdtEcyMIdXJ0OrgFUTPp1EtDQ30PNAJBtHf2fIsnnOZsc9A/+fldtDQX1C+TxQcMDSWG/ZZRKl3Q+afKq+f6UKr99fq9WQnCBPNZu+2KCzyCeVE0Fj8NTOfZVBOuu7kcqRhYDaJFNvB9qUFauxfvZmRDPwOo1Z7XYl40kkoob+miL+gADbqA15Iguru7w+OZnS5jwmft/WXm49OpRL+XOmev7vjO4aw6BZKy6c996r7AGs8c7CSVts6efQj4pc35zJPg88VRtCN+Oign98L3DBu0ML2+T12OV+XzIogiax+faiaNemldS3ib+MDANZunmyBc4nqVZaXlJQD9qZRvV2q2IHeIpYQcdP7Ve30o1f56/d6cBOHuwTkFt9bWZfOMiPlrAB+cXIxcLCra2+NRNkidHiadcziAc482tIBHO4MO0EYiCI0apKSqyC4YDVZaa5+ii0qf+m6t3KsYgju3m3SG+7Zd1mqC7PlSMxXhavMxmE6CaI0t+zCxmSDgPVMmGOFHw4P9X6nW/c78feLbtWymhN0CCoBnSI9yF8qg86/e60O5/ap2vmYkCF+TTQGldrpj2Z1uBBCfBM5lkdEEtvOzW50iD40jkaueOOgAbSiCcKga3E4AXoO1WF3Bk7vlQj6NqsGvPT1FO3uuAbAQ4CcYdB9gXFvNewgvgsgRiDNMN9HFw4N9KnCi63sKjv5OOfXUkyCUOvDZZ82dMhz+BAgnEmM/p3UaAw8jbOxfuCOrdGFS5DBnM10OQMVjmvyCbNKCtCHo/Kv3+hCkL7VM23QEwQFDKbd39HyXCWd4EURn55E7mMjcblcRlXMp1tm55B1ZhAYIUFZWE5/G01T9OegAbRSC0LbDx+W/cxC3dsQ7Dcqd2LbJwaSRa1tH72IitsfuqZlVUtBJVoogNE5lnhuOYlynEmYVCCJoF73S+4qr5LdCpb4hg1Y6VJZQlktjcznux/LQb12FdEHm33SsD0H7U6v0TUcQAAJ5VBbtQjUniPb2+Edh0F0M7JgHepyBg9LJfqWe8v1p4/e7nFiCDFDVgEYhCA0Jmsx0SDrVd7tvoBRB5u5twutt8XqKMNdZs+TeIwD/QfnAWNnwOjeDgyBtKSdtKYLQjAVlRbZoOJlQpFj0FY0Hx8aigQhCvTR3wnCy72fVUC3lxnXWuBRg5W80+THwP4aVXTQ0tPaJcuRTKk+Q+Tcd60Op9tfr96YjiKD20H4IQnMZWvalZtGJxeFIVM4OppEIwrnzB6Azny05fjVmuLo3FJQ9/H/lrZLcynwKhHXMuGlueOukutAtWXkVEpQiCFVFEDWTfZzqTlMNQBBZIropQ7TinvVrnqwChMhHiVVPsx5QT3JQdQUhiOlYH6qBbzXKaDqCgM+LygI4PgnCGQKjbLf+ovpmGEEEdDYKNEZ1fipKNx0ZoxuJ8SkfhSn/i41gXGFmsjdXEmKlVF1+CMKvmklzOiy6a5kGgngO4H8ClGTgl5m5vL6aqh4Xyz91KBmxwuYRIwNrnyolg0p+D0gQdV8fKulbNfMKQaiHcotjJFWPIABtWUEGaCOdIOpNELmd+IRfy/K8X4vfpyvVW8ZphvGf6eSaDdVQh9gnnh+C0KmZdKpL51jQvdtRBYJomGCNeYe1nxV73/NANoxl9wwknq3mIqcrK8j8m471odb991u+EETNCYJHQogcmEze+IJdKEEG6GwniAJuOUc4E0cQ47R8DK6Qj4GeJeDbY6Pbn18qmKKPsiaT+CEInZqJgZXpZP8p9rpKqZdcVCJ196QOgo9LWhVT6xAiUhZmhZcUC0lr+v60sz1B5l9tCUK/PlQB66oUIQRRa4KY+Sqmsk9blYzgnOppM3URsAyE/TRhPOzFV/3ZSr8EUaxmmhp0zo96aYYQhDI9/qImhpoKYXMFsvyVajrClRpbDUMQLutDqfbX63chiAmCcHrsln1J7bSXdrtUDzJAG+oE0dF7IBGr+Eu53TsB/4TF+w4NJe6r16DV1EMdHUt3sWAeCMLnAJqviSob2K/Fqz9GGfWvAAAgAElEQVR+CaKUmskxDlzDgzezikmFaW/Z6sUzeSIEiv3UlwXxGbvtjB96RESoybAKMv+mY32oSafLKFQIQhFEV+/7p0TgBMoy3dTFwifGlUOp/s9VcsRtJILQmPz5dlwsY3yWlUWFYg5b5rX2cB7KPLYcc1y3BvgliFJqJodRg2voimYliAlyeOkiBn/eQQ5VNZcNOlACEcQ0rA9B+1Or9EIQAKbDESbIAG0kgpjfvWzHOdnsbwD68OSg9OEl7BzAKqyEZfBtr5uwZl+PznsfAX8h5ktSqcTfcotqNP5vCBkHA+qNZ6tNLS4hWAclkzc96mcytHYtebdhhX5rfz/CTzRfP2Xn2ucRasNZhkbNlLuXCoczmbEM3QLC3hN53IMKNiNBKHKYs/WL54JxqoMcNjFwVFA/I7+y8ZMuyPybjvXBTx/qkUYIIo+yxpX+T1nD2D+IzbcmNMRMDLVB0VjvSjAvtw3Qv8HkhcPDiUd8Dlqdf8MUtV40Gn8LwjQAxrvyZQY6qVTL47saJwiNmulVi/kAEEZtbzx4vj7XhAShC5apSPBRGHTE8Po1f/A5VmqSLAhBqAbUe32oSafLKFQIIg9aTYJxwT0KZdAB2iie1Aqu1o74vgbRLVPfXqDLx0e3W+7HUkgfNpnXtoS3Oarg6KaLo0VEfWOvbXeMrzqKCUY54i1Jp/rWljFPirIEOUHkThyO2EwqlItl4CVinJ8v3DMyarMRhG6M5OI3GXRYNaPqlivLoPOv3utDuf2qdj4hiDyiLuF8sww+PZ1MXOhlR+8W7tvtnYPcItsZn29/IaxUjKlGIggXrEwCzhkb3f67Xgt43nu2D8A+tsE8qguN3h7rXcrM19vDtYP468ODie+X8GsoCvldCt+gEysoQWjuuTbm61QX6p7qJd14AdCwZq7t7YfvZBmROwn4iA3XTSA+ZHgwoXxSpv0LOv/qvT5MO0D5BghB2CTh9iCIepjIDBmnOtVNKurlk08bi4j4vwHsOlWo3jtq3cW41xsXjUQQuR2x/nEltW6vMxinpVKJPzsGObV3xf+dLVxS/I64Hiv1YJAxJ7KOAHUHUfhcHyXKLaStR21Lkcx5BHxhit67yqGpgxKENk7Xlj6VVJ810wlCo2qtuplxpQto0PnnMebNWqwPlfavWvmFIBxIVuNJQT9RKLWXvbmNJJ4H00sMzobY+GwqtWZQ/bnRCEK1yQMr9fNTDCTVk6AM3paQu4h1Pk2q+jscRnaJ87W+glj06qzcr1OfNSVuAXMrQOrOIuwQ64NkZT9VzcBvQQkit8A4Q4AXGunjQaFmIQjdWxxVWqyq6m8TdP4V+lCv9aFKmFVcjBCEBsK2CVt/9dD9mwMirMI7KI/Qk3zEraForOeHYHzZrQ57yIVGJIgJkogfxEzXaTxjfUDnK+4OtcXixxLTpZr3pn3UgQfYoJ5q673LIQjNrjXXfj9PkjYLQWjUgn5k5CdNVQlCbcWCzD97A+u0PvjBpOZphCBcIFa29BHmC5h5iWZHqsnFDxHhtKHBxG1+4/7ont+0F2x/k6JRCUK1NzhWeAXE30EWF/v1nm1v792LDf6p/XXAErNjlIErOBP5xsjIDS9XeyaVQxAuaqaS6iXV9mYhCI21T7WgrzZBIMj8c3Yi+JgPvj5UC7hKyhGCKIGeGgghy4wTsARE77WFdFDvVT8O0J0MWr37Lua95XiD5h5LCRnHM1ufBdH7HLvkyaiejUwQBQiVeiEUMXsZ3AvQOwHMy/+mTlbPAnw/YFzdErZuHxhI/KuMgUsLOnvfHWY+lgn7g/B2mzxydRDwIAjXjrXwL3yc4spowkSWcggil6/opTk8gix3Dw8n/u7VmGYhiCJcyka4KGPVCSInD5/zz60btV4fqgdfeSU1PEGU1y3JJQgIAoKAIFApAkIQlSIo+QUBQUAQmKEICEHMUMFKtwQBQUAQqBQBIYhKEZT8goAgIAjMUASEIGaoYKVbgoAgIAhUioAQRKUISn5BQBAQBGYoAkIQM1Sw0i1BQBAQBCpFQAiiUgQlvyAgCAgCMxQBIYgZKljpliAgCAgClSIgBFEpgpJfEBAEBIEZioAQxAwVrHRLEBAEBIFKERCCqBRByS8ICAKCwAxFQAhihgpWuiUICAKCQKUICEFUiqDkFwQEAUFghiIgBDFDBSvdEgQEAUGgUgSEICpFUPILAoKAIDBDERCCmKGClW4JAoKAIFApAkIQlSIo+QUBQUAQmKEICEHMUMFKtwQBQUAQqBQBIYhKEZT8goAgIAjMUASEIGaoYKVbgoAgIAhUioAQRKUISn5BQBAQBGYoAkIQM1Sw0i1BQBAQBCpFQAiiUgQlvyAgCAgCMxQBIYgZKljpliAgCAgClSIgBFEpgpJ/WhCIxRbvkuXwIIB3FhrAwKHpZP8vnA1q7YzPN0B3Adgh/9sLFnjfkWRi47Q0XioVBJoEASEID0FFo/GtYOAEEMaHk4nLm0Sms6KZQhCzQszSyWlGQAhCI4B4PB76+7PGwczW/wPofUw4PT3Y/71plpVUb0NACEKGgyBQewSEIDQYR2M9l4Fx4qTqQgii9iMxYA1CEAEBk+SCQBkICEHoCeIaMI4VgihjRNUpixBEnYCWamY1AkIQQhBNOQGEIJpSbNLoJkNACEIIosmG7ERzhSCaUmzS6CZDQAhCCKLJhqwQRFMKTBrdlAgIQQhBNOXAlRNEU4pNGt1kCDQ1Qcyf//lIeO4LrSEYJzBxDMDbAIRzMiA8D8bjxLgjS7RqQ7LvLwBYJ5/u7vgbxjJ0Cwh7+5IfYdXwYP9xXmmVqeyTz4Q+QWQdB8a+xW3jPxOoz8yE+kZGVj/nq14AbbGerxLj/EJ6u3NYa+tR21Jk/LPEOBpE7wOwFQATjCdh4FcW+L9HBhN/csPBbxsCpqO27qVvQ9ZcbIAOYGBPADsDCOXLMQE8S8CDzNxnZrI3b9jw8+dL1dHIBNHaumxeKGL2MrgXRO8F4035/mQBPA1gBKBES9i6fWAg8a9SfXX7fcGCw98UioQPA+EzjnpGATwO0J0WWZcHkbnX+FLzLbLViwcQ+CSAPg5gXr5trwB4mME3WuPZVX7k5+zT/H3i27WM0SFgfJqBD9vKLmt8lIGZks0TxDRowroqu3mHkY0bL8/4kU3RWGTc3RLhRQMDiVfbu3pibOFcAK35tUnN9buZcMnuO3M6kUio/jXs16wEQW0d8R4i+gGAt/hBl4E0E58wMph40Jm+mgSRI4anaQlRblBMevl6tDFLRDdliFbcs37Nk6X64jKB10U7ew8C+KcA3uxVhsLBAh27Idn3cKm6KvydJiYH/wCgTwQoK0uMy8xs5KyRkRtedsvXiASxV3d854hp/IiZl0xuVLw7/gqIv4MsLh4eTqhF3denNgKhcOYcJpzkpx6vse+s0I0gorH4J8H4sfILKtHILJguhGWd7adPubln0nfA+EJ+Q1MKA1/jw1nIXl1Ldw9Z1rcJOMYPZgD+DmDFbrtwf6lFXEcQZibTE2qJfA2MU22bIXuzxhk4KJ3s/3WpDk/n701HEGoBfupprADROS7Ae+E5ysRfTA8mVtl30dUiCFXO5iytJODTZbTtaTL4mKH1ibu9OlA0gZkXqYlFRFf7nGCq+BeI+JihwcQvazH41E5zztYvnusxOUpWy8D/GFZ20dDQ2id0iRuNIKLR+LsQolswcUIK+PFANoxl9wwkni2Vsb29dy82sAbgd5RK6/hdEdCK4WT/pV4nSN34IqLdAVwQYHyBCbdlWvjIjb9OvOTWzmg0/m8IUR+AfQL2RakCHoZBh6XX96kTsefX3hXfmy26DsCupdI6fjcZuHZumE/2OukVj0UeYBgpAn/NfR3gofG5+JQXPgHbWpPkTUcQ7bGeJcxQwlbqk8KXU6MwIU2giV0n8YfA+KhmUL/AMA5MJ9eMFDJ3dx83dyzz2nIQvXvib9a/A4V/5/6wAaD7Jmtja8NwKnGVXSK5I/JmSjBy6iTn9wqpEwzoMRC3AOgAYw/N4HmFmY5Lp/rWuklbs8M7n4DP2+IMKUXa4zDwOzCNAdZHAJqv2TVtAvEhw4OJDVUeWRSNxU8D03lF/cup/fjPgPFAXkYtYG4F6F26XR0xrpwT2XTSwMCAOv5P+RqJIDxk/wrA/1voL4O3JaATwG7O/jBwdWZ0+y94qTWisfgCMKlYUzs58mcBfgREIxMy5zeD0GVTbW2ZJ8RfHx5MfN+NJJzjC8BqAIfZ5pEJwmMAUqouAu/BQBuANxb1ycPBNLeJ2OqliwFWY9f+jYL5IZDx+5x61HO+8MD4XBzmtci6rBeqviD98CQ7zVhUKjc1z+fkOlaYj7mlBZ8E4e0Alg8n+y+p8tyrenFNRRA5neucyJ0AlP4z//GAaeAzG9Yn1KCd8uV39P9JwFlTFyC6sSX83LG6hUcVEI31BHKU6+7uDo9n563knG52yvc0M/3H7rtatziPqbkjr2ldSJSbfAV9vMq8CYZxwPD6NX/QSVszgW3J+CEy8KWh9Ynf2heAHG4tkR9A3U1MresBK5w9cGRg7VPVGlmawHiKrR+12Drxrbvibt1xXalMjEj26wCf5iCKTWTRwqGhvglCsX2NRBDRjvgJIPqJDdtRIpwy9tr212gWfIp2Lf0oLOtaAB+0dellsviAoaHEsE4W7e2L38ZG+DbHCSWnbslmMt926v3VSftvT2Nvg4wfO04bo8y8NJ1K3BpwfJnMuNkK8QrnXMvFLAtjBZi+4ZDfA1YmtI/ujq2tc2k3wVL9KWz01G79vLlhPl+3W1/QFd8jbNFPHBswk4iOHhrsW6PrS7Rr6cdgWb9yEKpJhDUhZFcMDq59xp4vp514hnpe32xd5FTVEuiyOeHnTva7WcmXO0rA196yC19iG/fU2blkD9M0XhweTvxfteZdrcppKoJo6+zZhwClFplgZsB1ANoAo2hH/HRQbkdb+J5hgxa6HU+DEkRrR3xfg3LqBduphkessHlEicWXop09Xyw6vjPfAgvLdDpcd4LwVlO4qeYI+PZQsv9bVRpgFI31rgTzclt5f4PJC4eHE4+UqIPaYvFjielKO4kx09HpVN8NjUoQudNn9tUEQAfb2lhyd9jWvfTtyFp3EPCeQj4GVqaT/ac4+5rbgGR2uowJn7X9phb649OpRL+Xykjdi4Sz6hRA3bZ60tZ45mDdZbLL+DLBfNZuu+ICD3287uRoMvNiHRm1dfZcRMDJk/0hunh4sE/9X2tIotKpk9qczbjZ3heA17WEt4kPDFyz2Y5bPtDmahApFWzh86Vma+1evJuRDf0MIHWxPJnXYl40kkqoqMBTPt1mJZeA+evDqYQyKHHtU5XmXc2KaS6CiPWcSowfbhlUpa2JVFplVWJETHUZNLljc1t4VPogBKEm71h23iqAjyxjUVRZqK2z57/yp5ySg1E3gXP62LCxf3pgzeNeIyVvhfITAo63pfNDsr4G4PzuZTvOyWZ/A5CyQil8JRfLQsLOziN3MJG53T4xmXBmerBfXfiXnJTTEe5bjS2KmOttC73vUOLRzp4vAbh4S8d4JITIgcnkjS/YO9ve3vtBNvg3tp2wUr14qors+fP3Iyr/W/N/d915awnCY8Nir0c7zzTy+/B+x2zzhtfGfm4/DbjJzin3aGf8ACC3GcttEhl4MgyzO5m86dGpmMWjbJA6PWxb+DsD56ST/d/0s2BrMFMLvnbj5kIQj5kGL9RpNnxNpgZJ1GwEMcXEE0CiJbzpSDdVkQ1jtVO/BsBCgJ/g3H2Cca39HmLKhAqgYmrr6n0/WbnJu0s5i6IrgQFXp5P9JzgHs8sOz/cirFEBue7ygo5RdelIIfoiT6gAPwqCGWJzf+fk9SrXSc5wMSluFBWTph2vWswHjKQSyVL4TVw4s1ooXwXwewO4j01e6Tw5tnf2fIuBs20LnesJwK1OZxluO2/N+PI9PiY2SzvdCCA+2Q6N/HRGIV4btikkNLG7vwsgpeO/j0EPRsi6aHAw8Q97uqITij9twxT4igkcWvJ3IQi/a1OpYTKtvzcXQXT0Libim2yIaa2SKkU0yAmiraP3KCK+3jZ5tTuaUm1q7+j5LhPOsO0m7x8PhxduHFj9zykD3+EHASDQTkWnEnFTbZRqcy1+bzaC6Og49I0WzVUXx5+0yc63VVIpDLWLaRnRhVs74p0G5XbU23jtvDVGEIHGc9E41hM8tXX0XEuUuxPLfUGskkphpjuJEuPcoVT/maXy2n/v7FzyjixCAwQoK658Q+nE4VSfum+a/LSbFZeTb5D6GyFtUxGEuqgKWaR268oCqPCZAP9B2Whb2fC6IE5nbgIIQhDtHT1XTNUN63WipYStuV/R7lY0O7zAO5W2WM8ZxPhuoU0E3PWvrVsOv//O69ROdlq/ZiMIBVbx7jwH4YsgrDEsWrV583Yb/TpdOcHXLFImMx2STvXdHkRQE3r18Hrb3NHa4WvG1+8M3nxIKnWrsswp+RXldzkBtsd6lzLnNlZ2A41RBm553TJqVUt4mwHnvULJyvMJ2tvjH4VBdzGwY/5PZfkcaO+XNP0Jcpr124dGSddUBOGir3di+RQI65hx09zw1slyBplfgqjmbly3W9HpZYt2eGXsVNo6ew4hwG7F8tcwZWNOq446DVLq6Fi6CxvW3sw4Kr8T33LZ3+AqJoWRVl89FbxREO6DRas4QnekB9Yo3w5fF5fOnT+AcaUeAowpJ8tSsmLmrYlw6BSdvMYAwDm+gm4e/BKEsqwz5kTW0YSJrO7LMvBHYvRxiG7efZ71cCmHtUIhms2Wp1GKF3ZFJ6ItXtKTHvCVqBlLyW26f282gshZMkTG6EZifMoHeMo+fCMYV/gN4ZCb8D7vIKp1/Fd1+t2FFDsy0RIvvwkdRn7VDT7w9Z1EYfVa1tg1RLwnwO9mpo+/bpG215QQJLrSmoAgVLPbJtSf6p6ryB9A061NIKxlNq7ZfRfzXq+FT0PmvjEvlVD3UqLfBd6t7CD5OzqWfsIiS104+3FgUyeYdWTRNWNj2/3W60RWzQ1QUX/8EYRvQ4VSMpru35uOIPI7NmV3vTxvd+1nQqpsKuZJmmH8Zzq5RjmHue7gGoYgNLpmr1g5fgeT5qK6FgOaWmPx9xPTabmd65Z4RH6bOZGuSQhCNbU1Ft+TmK7y2BXr+v4iAT8wM5GVutAiM5kgFBge/kBe40SZq/40TNnv6k69NSUIoOi0rdnc1WI+BZs3VUrdlARR6HvOEc7EEcQ4LR8jxq7PdIMoq2z/x0a3P99tF9IwBOFDBeDXPNAORq0JosxJr5q4KUcJ9nhSTUQQeYy3ECNwhM8Thcr6ABvU4/TNmekEURiX+VhJp+RjJTk9xd3msjY8TW0JotgUWQiiSmxUy2JyqqfN1EXAMhD2K7FjNRn81XQyscWnwta4hiEI4NB0sl9ZyEx+1ThBaHS0VbuDmPBe5Z/5iBX0HMB/JVDSYhrIRIx7lMVWM15Su43rXODG54z3kMmHMaGXgA+UCBRX5NlezcXOz/wLoiLSlVdp/tw9Y/fSt1GG94fBx7qEy7FXXRR5oJqYiYrJz6hpvjS5i08L5oEgfM4lFpGrg5h/gij2oi3XZFTjT6G1VtFcUn8lPdh/YRAR5fXlNnNh1prUBilTpdV7uuZK+TsD1wPGrzJhemDjwGoVzlur4ptJBOHEL2fUYG3+ONg6BozFmphKKssUn5a2jt4DiVhtEnKnYwL+CYv3HRpKbIkNFlRQHukrXeArze9smnLunDv3+feYFDqGGL35OEZTkzm8sKt5Se30p9Bd2ssJoooDcDqKUsfXsGVeO9VFH67mgn4JQvXFzwDy02e/C4HmBKENz+BVp8bnQhuuwE+77Wk0posqINoVyPJX/IR+VmXNZIKwY5UPfXIciP7bHqLFuQBpTDZ9O64FlV9uPDv9bHy8fWKvp9L8JdpM0ViP0g6oOFaTaijlQ8GZUFfBxN3vZqsUPjqPbxVAcijV/zl7XiGIUkjW4feJ0MCGinfTBVjKNC4UgnWQXy/d1q4l7zaskApiN/l+hM6KQ7dIuaXLTahpd5QLFja4mpZXdrHrvGhzb0+4xPzRDRmt01mD30G0dS5tJTY/RURR9RiSisqaTvaroHV+PhVm5TwCTrclnqLu04Yv8RG3yFm5CtdhGXzb6yFdVGTc+wj4CzFfkkol/lbNBd4PQeQWcLYOBlNUHTwZGJob3nSMj4gIuaa2xeLHEefC2xe+KZfCDeAoJ5fUfkZ/NdNEo/G3IEwDYKjQ0OoLtJMKsjAGOkFoQm14EYoOk4kTjnUHgPcXfs8vNH5CbXhGAS1eKIpi1ATK7yZTbRwll+BzbmVoYg41vBWTHx211zzwoS+vJABioWpdvC+tb4CfBd6zPz5OIG0d8UOJSIW0nzAqITyCLHcPDyfUIz0lPz9GFppQG3/KGsb+fh7lKjRA4zToN9SGEERJKVY5gW6HSkR9Y69td4wfL1UNwYBZ70MQhCBqFKxPOUMtGk4mVGiEKV8lwdT0ES75dphY4lcF5CZW3U5Xdxx3zT//85GWrV+6jpl7p6Rp8BOExpHtZYONg1OpNYN+poAfz2V9tGC6fHx0u+W+xr427DWvbQlvc5TTkbQeBKHzDifCcUOD/ZMhazxJyEkwwGNWONtlj5zc3l6DYH3QzxVRMfkZ6XVIo9dx+4pqWRTy2y0KpOqGkyBKxXHRTeBSL6Ll4dKH+wbuaAnzEbq4+C7B+kwCzhkb3f67bguGyytv48y0LKijnU7ULhE6fUWZnXhPgH4IVgYFU0IvgBnXp1P96oW+KZfafh0LVVv97DjLHb75i/nbXn//ud1WxoNkZT/l9hre5A5VE/JbN9ZcQleXlHluLOtfbRt1C11dD4Jw2VT5esDKxRCiKNyMC2ZZBp+eTiaUUYerH5RbuG+3dzSEIMqdPVXO5+Ke7/poSm5xaD1qW4pklJ5XvXm7xU+C8K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gmpD0lVeimIqwuNal8XoJFcothuPAmZA435tUzSg+vXJmEfetBuIPZumnP3XKPhLk5McErqMIo+dVDhLphupUYR4Z1QkXoA3gtGDfmRrN3mTxUKDeUMz9pjxGmR2fvVbVo+mvQFcMkmg11vPPMJP9ESNSqh2XYCEEYDvwEJNO8RpiAUhH6ckdDEGWXvmENaWhbsIeVja92XVSX6EEnmSDUcbpk859uBOEsPn97jyD4XyHgO7nRuqv93I9E2eB1FUXNH90thVOr8uWVYVifz/SuUMZrZpbUFRwywvojBOE/3YQgwnbCSfpd9wR0oqoKk0ImgiDCLsommSDK7mmmI0EUxpsaWlJ7E9MFBBxvKFGorL7uR8I2xLB5Vml+xxAuh+OJcUHBn1fpG3p9xVk1X4eHdrxcd+8S5KwvrB9jEkSI80IhCCEI07lUtXR69dCEVR94WS0qJj3OJqL7hI2QpiBl3PXMi9a/Uo6PZUKHx+2BrmqtZXClG7zphmqCgaN62kytBOUxFIe5PNTqsvtaHk8EQWhe/JXcQYwXLxM83GnGO89M8ouKyWxUpuodhM6OoeDamdS/0T7iHTwLMPCyejIuqb163Ym8pPYucO+FuAJrGksQvmPtPNG0N+8Ptk8GQ7l+Lrp5d+cpswkY74Y33vyaDlEyuWg3G7l5IHzKx1eS9lBTRhAVvC4q3Pe4nuOW2ic0NaX2g0UPMPDWQtsjXRpHW6zjf05tQhCqTWWO8yq4Pyh7IFJBGVHxqWb6KUkQeqvN8MtlP+ASzakjAMecvujyIPCy2ksQ3md/JgNU/vS01ChN9/68klcUqi3ep3beJ7W1ShDucSi4jjgNRMrj7ha3CZ4nmw5eec+dbsePxtbaTn7vyxUgUv6w+ePEI7Bzyq18myutdlPWSBBa9yJBdYY999RYt2uNMcP6Zfq76QbvV55pfu/zXkQwxivW7X3OLq+YTEd5HOk0tg/wczVgUo32tA7/y+oyFVMhrGk0A5pdlgF8QrF9OsOirW4oF/FC03ThmYyJX5rG5kUNxLkjiSjBwD4F3FTMAZNPGXR9k4CLXInLbEI0/XiFbDrMNHZA2dt3DUEkEql/QcxS/qRa895xEYvBPsp0DjW0LnyfZcdU7ISx+BE6C/lyOwg2fgbue3Dw2Mfo/WNFP7AViEb5y9rpDdXaH2zg95bNPy4+/S6O2XjnmWl+DdH7+rzymXzlBrEiQZis08rT6C2D9Z5bo9SiM77ys87UGMoZ2U8U22Ma2U7naoOZFpsaBKn6dBeIpq42okZ/M114UcbFm7Zsw4t4qtOMnQlBqAOIkSGWjzPBMglC4w9M68LCDytTHbnGUC70lZ67Ts1dnza/5kXhqxZbH+vrW9FjOt5NLe0nMUM9XS5ezo8wcFSmt+tBdxnjnWem+XU+23Rrx69/WkNIIQjT6VBZOq1voQDPraa1aP2m+MSs1vliUj7pLXv0sP7+O9cH1RnFAdokOevTugWZLncQGqO/SBuRZsMss4LXWtkTXTPQ06n8fQUa3CWTi1pssle5YmKo6VBGELqDDhF1Dr++w8kmVuDazUtDYlpfTMx3q3CZYY4pCxEMbwORCjJU+PSSQTK58IM2xZTr8i1GbsADw7M5ZWK0Wnj2rQzd3K64f50bGT3Ma+9husH7rcMI+XV3naY+pnROOcVQznRDrjSd5qQS2YGdrm4fyUQrGfi5+w5zA+znQjnoVKJz982Ee0br+YRK3H0TaOms+Ivneh3CTRJBGLk9iTIXfJ43h7lZd6rQufz2kRJ1vrJCvfUGRLnT3kHo3M6D+IsDPen/DiGiMpfffn6CfJz15Qi4dHhox8v8yMjHXfxIgARLiZb274LxudLxpJvr4/bZQbHAFRGRRVcz4ZOuvCqOxJJMX5c7+qPzc4QNXju1ouTXER8Q7CrdsZDPh5Atj9onEkSU5R4trX5z0Ht8jFZyPrXubkNnWR0UMCgokIg+CAt3j8zGsX6bfd5Xvi5gkH8M32Qy9f4c0VICDvLg4LuRTgRB6O5ywkizsnEqU0Wo/fQJm3HuO3bHQxpLaWpqTR3EtnVjIbpfsVrfYE2a+OZq3WuDQTlS4eyN7USsfA/pYoVrCULn4lpZSxNjaXZ09Gs6S2kVF5nqRtU9SmlAGp84HwEBg5xAPrmYdZ43mlr+Ety+GoCKRz72hUk4PlKAGptHGLElOoM+P2NHtY78pI8oG7xufkXM7xPbQb/+AgKD5ZsiAYMqWfJmeTTqBWMPrCY16F9HlV9Wa0KO/hwEFbNhp0I97lCEOf8wjvQULDo+LATnBIUcDTwBTwRB+OjfFSSbVEjU/Pqwv9rfm1YhNiv+9KqPQnGEl4nxayfUpFMfv4sJ+2vsCHJBp/WACHtKyTQWotMpPx+5b8zlh9rcQBhidsKvqs/3FZMuIE0hj3Kr8SSIBp1QoCpsJnMDQCqGiQpv6/58iV9DECrWs+XS82cZ+B2BCqFoC+FkvYFuACMpLdGSmgsm5Xuo/EmxKzyu0x8bHwFhr/KJoNaFfezA6vRjE7DBlxURkSDgSFPbbLwGYBWq1fs9y0CvExrWPyzsljxCEBWv+7CMOn1gpAu3sArU7+Uvh9QuU6p/1jxz/Q8G/vmGf/krIgSC97Xk1bUzfzqL3QpQi0k/StPwE7BiJwQR0UQQhKrTJwLeWHOiuGUO6ueBbald41nc5nnqaQpNoPVxsZBE66J/h823e6SOkDry6od4jr4FxqlhBOGoI1pSpxLTdRHmjrsNgfNIQxC3EegVzm92JpbaSgIYtOO543WhanVgVIZbsaTwQ1PUDd7bxkry+0S9C5tvKi72UoayXSkcHoUgwjCr7PfxRoEzrdXHQrvECMnH1cYVieaOowD+kY+aodgER4WQy9Zd4ucLyK+t+ZMznQOC8nu/o0Gf1AT99qw4fy9IB6zKmSiCMFhIkd1NB+HBMfpKIVjUmG1DCC7ryOLPemOG++VR6pZYzr6SyFG3BG2o6iR+3ew4X6yw9hhZhdpBFIIZqbnjjZfs17QhBm7k0bovB82jMoIgLNtjVz79mRess4lZufAOcna4CcRfRxbXhF1oextZUIV9nfKbo8nYGK+LSjZ4d/sqze/cIT5P7W9s9leFrHFH5Um2dUrOsm0LpKLc5bULQhAG21YFSfT3AzCOjGVapbMJx7ASoHmuPCWX1UG+mPILY+STpAK+E32gsDgcdQHDWpmz6Aavzte0bcV0hU14HsAqCJBSbe1a2LyUA7cXAPQDlK6P2/eGEUNJmaN0NwgfLf4t6jPXYj61kP7+Ah3LzOcD9OHSTShalDoTbDx4NBRe0hTVMJsA/htgPQjL/uEeu+DxMG+umjodf08W6DNgJz7HOwtqniEAf2HQHd5xjUoQhTppbnPH++LMpzLhcEf9wnhL4TdnbAl4HITlw/X8M5PXQTqCGOjpOk2VqTbKUa47h4g7wE50Q0WACq/HwPiRnZ2VjnqI8WKn7g3rh+loME5RdiuuuaqSvvhGHOo/q7pMvdMW253luHo++55CfaEEPBEE4V4rIzlnfn8aRO8fGyNHhcZrGLR0dGjH+9QDgKjO+sqst4GyZ9gma6JaaaakJXW1Oi/1CALTHYEggpjufavl9rsOoUIQtTzQ0jdBYGsiIASxNdGvvG7XuAlBVA6j5BQEBIEgBIQgpt/8cNtkVeLnrZo9FhVTNdGWugSBCUZACGKCAa1CcY6/MdjKqlz5pPpaf2/XV6tQbUVVCEFUBJtkEgSmBgJCEFNjHAxb4TXoNHXrYVj8xCcTgph4TKVEQaBqCAhBVA3qcVekDPLqt914MzN3qNdkzHRaFMec425ABQUIQVQAmmQRBKYKAkIQU2UkzNqRNzLMfZds6wum7uXNSp6cVEIQk4OrlCoIVAUBIYiqwDxjKxGCmLFDLx2vBQSEIGphFKduH4Qgpu7YSMsEgVAEhCBCIZIE40BACGIc4ElWQUAQEARqGQEhiFoeXembICAICALjQEAIYhzgSVZBQBAQBGoZASGIWh5d6ZsgIAgIAuNAQAhiHOBJVkFAEBAEahkBIYhaHl3pmyAgCAgC40BACGIc4ElWQUAQEARqGQEhiFoeXembICAICALjQEAIYhzgSVZBQBAQBGoZASGIWh5d6ZsgIAgIAuNAQAhiHOBJVkFAEBAEahmBaUEQ4m8m+hRsa0u9aXiU7gbho8XcDByT6e36mbe0MnwZD9XX8fzu7vQ/o9dc/RzTvf3VR6z2a2xpWbBbluM9AN5T6O0GG3zoYG967UT0Psr6moj6tlYZQhAThPyBrYv2jLN9PuV4WX9/+tEJKrbiYqJM4Om+wU739lc8yJLRFwEhiImZHEIQ48SxoeHE7a1ZI58D0wUAshN5ShlP04Qgpo8ENJ5xlrx6BIQgJmZmCEGMA8empuN2ZqvufwHsMxli7DiaBiEIIYjxzJ/pnlcIYmJGUAhiHDhO9iQcR9OEIKbRHcp4xlnyigQxmXNACGIc6E5lgojSremuw5/u7Y8yVpLWDIFaWZtmvZ28VEIQ48C2VibhdN9gp3v7xzEFJasPArWyNrf2AAtBjGMEamUSTvcNdrq3fxxTULIKQUzqHBCCGAe8QhDjAG8CswpBTCCYNVJUrazNrT0cW40g8nYDuUWwsRhEHwCwjXomysDvAF7Oo7N+MDj4k1cVQOM1lEulUrFnno8dQGSfBsahAN4JIF4A/0UCfgvC8lkxvivMOKyhOTXHAj0AYCeTwfMzTnPlpca2Re9ENrfAAh3B+RdRuwKIFdLkALxAwOPM3Jkbzd61Zs2dL4fVXY1XTHPmnFEXn72hIQbrdCZuKcGV8DIYfyHG/VmiZWt6O/8EgMPaXcnv4yUI1Y/6+o0HscWnAWj14D82P4br+WdrH0xvrKSNKk9+HtJBBHzCU88mgB8joqXuOdjY3H40AT8t1seEizI9Xd82qT+RSG1DcRzFrOqi/QHs4uRzxoXXMGjp6NCO961d+/1R3RozmLdjzZjI9RXUN884KQNQV5/wC4Z1VaZ3xRo1zyabIKKsr7K2eAxR1V4Ys/lMAi8AsFdhL3TWPYDVTLh2z105k06n1d+q+lWdIJTdQCw+eikTPu3apHWdfgmgTwz0dv68saX9QmJcPpaIsGygp0st5rCPmlpTB7GNawGHhMK+TSD+OrK4ZmAgPaRLPIEEQU2t7S1s83cAOiCsYa7fs8RYmsvWXVIkUF3eKBO4gg2WGpOpdiL6DoC3m7SdgQwTnz7Yk37cJH2UNBW03ylebaKwcDqI/hPA2wzqHGLgRh6t+3IQ9rpyEi2pj4BxvcE8fImZP5PpS3c1Nrd/rAKCKI7N/4T3iZ8A4ayBnvSvvBgaEsSEry+fMTCtJ0dEt3PWPjsez9VPFUtqP4JQfd2cpcsIODtkL1Sc9wTZ1in9/Z0PG8zTCUtSVYJobO3Ym2zuAvAhwx4MMfPHLaK9GPhWFIJwTlAx61IGf9Z1GjeslgfteO74we47nvVmmAiCUCehWdu+8g0wzovetnyLGPg/y87O7++/46/VJAh1Wnz2OVwIoksraPsQE5+d6Ukvm0hpohKCOLAttWtdlpYzHIky6reOLWrPrO78vUFGSjS3qw3gisLJ0CALcmC+BBY9AcadxQxhEkSF80q7xsIIYrLWlxccR2rY5pWLGPhK+CY6lvtBi3Ofsyl291RwtaEjCNi5cxCzbgKowWRCFNJsYqbTMn2dd0TIM66kVSOIpqYF72Qrfo/LqKzY8JxiR8DK5Dc+PoCAD7omwwYw+kE4ypQgnIWyzcZrAD6jDB3Cy8T4NYOeVhucpr5ilsfJzh7p3YAb2xbtRVn+nFrszLwtEY4BsH0h0wjAqwDrH2P1WnT9wOoVv3G1gxItqQvA9M2yDTYv/v8BsNY56YnrwdwA0Ht1i4MYP5hVt/7T3d3dWW8/J0uCaGppX8iMmz2bXQ6MZ5iQIZCjFgTxh8HYT7MpbmBY8zK9KwbHNXNdmaMSRMBcLKhgsBqglxi8PQHNAPbQtPU5i635fX0rHgnqhw9eKssmUlIV6GkN2+i4AAAgAElEQVSfepQ6QfkNmmtIECHzKt8ngN8GQisYb3G1ewispAn697G6fPx2qd8nc315sPTvE7AJwIMBfXoQwN4uCXer+WLyEoQ63BEw7B5b93xw1j2QBONdmkPY77OWdfjDq1c8M1HrJ6icqhCEcwrYduPNzNzhbgwBD2QtPnPN6rTarMe+uXOPe4s1q+6/CDhTe0oNVjH5TCp+wmac+47d8ZBXlxdQ3/31cT7e716iEj2nXgKhp2y2z9K1TYHiuPOoy34RYOXOo3h3on5aTzYd3N/fmScU1zcZBKFwis2q+wUApdMufNyds/AJ7xiqH1UbNmfp8wRcUtpuurU+/uKpOmKrZNJHIQgHlyzdDuBwT13rmHBWpqer3yvdNLSk9iGmHxLQ6M1jx7PzdJKmSpdoXfTvsO37AOzsyuenxgxVowRJEI3J1DFEtMJDyC8B+Oweu3GXe847UuDz1P7GPdpVfmqoAAmiausrmVzUYpO9ynUAc4gVzOeNbN5pefH+RP1R9elvz+GjFlnXv3GH+W7NPJoyBOFp20vMdN7o5h263P1x1n3L4n0tzv1Eo3FZMtDbdW0layVqnqoQREMydahFpMQ9dRHtfOr0yzaf66frV0kCTtq+dxA+KqAHkeOOgYH0/wsAiBpbUqcS03WuduaIcFp/T9ctunwVEAQlWjquBvMSV3l/Q44PHhhIPxkyeMX2/cBNmsx0UqavU02iSSeIxub2Qwj4OYBZhcrW2aOxQwYHb3sxCNdEMnURyJGYit/zbNHBhiqa0DkdhSAak+1nEeEaz8Gja2Q2nxF0Ae2rviF8b6Cn63wvqfgcitYzcGKmt0udbrWfUn3Fs7gNoDZvAj+CKBxwVrkJjIE/wqJjgzBWKl/YfBcB/1pWl48EUa31Vbgfug1E811tWw/LOm5g9QpF4tovQDqcigTxOHI8P2jta/tTRW/Lk04QbW1t8eHsLssAPqE4ourC0h4Z/VjYaxy1yOq2eeUGAj5eMhv8JQjdBqxVFfnML2psbleSizrxFj7uH5mNI3WbR1SCmNO2+K2zstlfArSvq37j00Bz8wk75TB6r1tvyYSLMz1d36gKQbS0n0eM747VZfhYoKFh8S5WXU5timN3T37EFsoGmgSmBDHnkNQOszbjHoCaos5Fld5n03/O4txhfX0rf+duWlNTKsEWKemhqH7MMWNJpq/r+rA+JhKp9yJGvwTwDndaP4JoaulYxMzqEFN8+TZkM88f7Eur13aBn88pXd1x6VzDV2196fALOqy5O9nYvKiBYN/reWk41QjCeIwSze3nAM6hpvg9bcezrX6Sa9iYR/l90gmiuXnhu7OIdROwZ6Fh6qXBSf09nUocDv2amjo+xBarxbJFTPfZmOa2pt4Vs52FpXR36guUAHSVa8oYYeAo3akvKkEkEql/oRidzXkVzX4g5GKcO7y3d+VToUAUEiRa2m8C49SwTXoyVExlGzGQro+vP8FAVaQuam8CcDDAf2XQo4C1fKLuIUwJQiMBqTuj+QO9abWRG326+ajbuJuS7Zcx4UtbCvU/aOgq1mwK0NWTP4DtfKvSsmwpJ5IKT7fpawmimutrnPjp+jS1CCKCFNCQTDVb5Bw2tiuM8YT2JWjiTzpBFHSj6tbdOd0w8EwcuTbTTVG7AHwIwlsXCE8iy20DA+m/G61+R29evuCI8Y3+vq6LvWVEJQjTNgSl26oEkexYQMQrXe2blFdJUXEyJQjNpjMYQ9283t5bN5jWqd+QeVV9fLtUd/dNm1U5PpKesQ1Dvoyyg5WWIHQHMGZekOlLj9lPhPVNswFpCaJa60t3uPFbg359m+xNNcoBTLNPKBW7dk/R9UczxrVDEJpFWbKYwiav+r3RULXhrUtdgv9z2/rjfvuLm18zqaeYprGl/UvEuMx1+tO2eaYRhOYE6Uhpb5zCf6Pe+NvZ+KqQ+4gow2Cc1oQg9j3s5O3e9Prwne5nrQxcnentUs+gI32JZMeZIHariv4cp2xLT88dzzvzNf+cW0myuxUKfs1mPmKwL91rWpG2vRpDOa9UFPUAptqjVIBUl1vtvovQqZiqtb40G6KvFO9LEOV9mtBNdbwEwUwLTZ+rbo19pojrZEsQ1JhsX06Ek8YqZPygv6/rU6YLxVlwyY55RKxCZeZ1rBoJwudk9yfAUvEaIn6snmeOPS8EWHvSrNLAUTK5aDe27I8y40QAHyl5qeIjTUWZwCYbbAFAzR1NGbTPgrCKGStnx7ftLZ6qIw5ApOQm7dfe/zCdNdDXeUOkytSGGiLya1RZFemMm5LtNzLhk8X26VRMGrL6lcWbj+7r+6l6Bmr0+ZBnyR1ENddXU1PHgWyxei23Y3654x+w+dAokRo1fZpKBJFjpqMzfZ3qniT0q9I+o23HpBKEdpOK4C6g2OKylxNagiiPwRyKvHmCkhNiMdtEDpzC6vWstXuMeB+A38dM+7/xYuhAj1uQ8hZXlyCgLnrrhulWYhxpAF8W4LVg3GjqIsSgzLIkJgShE/PDjMH82qJ5yVOy+TSWq+K08yesr2XWzToJwivtRtBtu+v3qi692OjWclj7I/xeKoF5XIwAqAg/T5+mEkFEastE7jMRxsRJKgRhhthkEAQ1tKT2JqYLHGO7UsMls1blR1D75HeSJAinXc4TxDiWgOnLAN5s2Fhl+JVhWJ8v+ssxzBeabAoQRInO3qQ9oZ3S+CDTShCGjxbC6hOCCEOo9Pco62u8G/x480frWWlqIQgz9CaUIBznXDn7SiIcG9FdxfoCqW/xG7QVCKIImWMIl8PxxLig4GOo+MwyCNUsAV8bHtrxcq9hkNlQlKcy2ZAnWYIouWMwaY9JX00kCNNHC2H1CUGEISQEEQ0hg9RbW8UU5rvGoAuBSSph9rx1Ld/uY+3pru9FgP9MoF6bqXu0znp4bfdt/zDdEKKccCZiQ3NUT5uplaC88+KwEIkox+AvZHrTW2wqxjEYJu2fZIKYkSqmyVpfXi+2omJasNtkOh4MWnqTKkE46ogJEIHLLgU1p2bdRZuy1o56IR5ln4pKEAVDrbs0VrJ/Z+AWwLpvNE7r1nbfptx5a11jm+JZbYLw4OZcrNvIzQPhUwDN0fiSMrHCNhoOE4KYyEtq7yW09xK17FEFMGmX1GUv/IBJuaSu5voKu+MxmRSaS/VIev+wOqKsr6j7hLfu8eYP68tWJYiyJ6MVXKI1JjtOJHIsRfOfj1rF++oDFdQVBcyoA6exeM2BcCOyfH6Ay5GSJk0TgihpsxP7w84t9xBjpJccQeNiQhBtbafNHs6+lgboY2PTqMIDhHdTVm4teDTWWnzi29SU2g8WPcDAWwt1RX7mqmuv7sTuJaNKnrnqyNPnmWvJq6rJWl8NbQv2sLLx1W6D16i2HRpbFCGIKJvb2FZbQaYoWTSnqah+eNTTSuUobYu7DR+C0Dz583VmF9CHohWmskx9FqBHme0HZte9tNJrMRyFIHTPBE1djhTbmkwe82abZqvnvuqpayBZRjnhmGywygocMUttrq2ArZzWxWKwjzI1eGxoXfg+y46pJ8dj8SMmSkVh0n4F1tY0lANg7FJFtXUchnKRrcNNDeWqtb4mwmZlIqSQoH0uyvqKsk/o6hxv/ij7tTft5KuYEqm3I07dYCiX1c4XZWPQGmf5SRAatxwMXJrp7VIBYYyimen84PgZVEUZOK11bURDrShuR6JMYJMNNlE+jrkop7qJuo/STXaT9qt8OlcbzLTY1GBJlaFzVqc92Te3X0XAuVvaG83VRlNL+0nMUO5Jxi7+9a42yiUjIJqrjXL/Y85iKfPFpHUzMknrS+PWJZKb66bm9q8WYkgUh0AkiAqYYtIJIu+VdRweTMuc5/mrmHw9QBIfPdCTVqEIAz91yh/J7nI1g1W0u+I3xLCOzPSu6PZmjkIQOjE+yh2Jn8v0aj1z1bogIeocfn2Hk01eI2kIBlGsSYMGzpQgJslZn1ZKHY+zuYKKRRlRlQTWiuCs71WLrY/19a3oCZvzPi7JtQRRzfU1HjLycXYoBBE2GTS/V4MgkEwu/KBNMWUZubvrRNWdjWPxw91pFXdV9xVDJ/64LOhMgBdRnWtxE9fHinYKYTRL62O+W8XN1t0RaAjCV9fsIzb/EXHr8Ez3ir8EjV3e7oC+C1YXvltOlI40xrgl09d1ildCmmgJQtWlv0PhLw70pP87REIjr8vvSnTlfhiZEoQjRWjcfTPhntF6PqESd98EWjor/uK5XvWjn7vvMHfVeRKj7wNQ8RpKvijuvt/IH+pKOk9Esdt1Uc38jAiruL4o0dKu5rwKzrXlsBYSkTCvCqVOAId44BOCmKoE4R/bgZ8gC+f0r04r3fSYCsg/0EyhhwEE4SMFqIwbwHwhbNzq3ewD4mSvR4D04ScV+MW50Ii9qtuP2IRTdbGaCzEIjgLzN31jGftcxE8GQejiDgBwYmRnR0e/pnPfrrClutFvlgV/8omjUMEcVr66vlASszzgcYJ/wCD9XFTtSSZT788RLSXgIE/7Al3J+wUMItB/cM7+sWceUkPL4g9bnP2hX4zyCgIGPcdMn9lzd/tub8CgkOA6fu6+HWeWGil7UtaXT2wHv5jslGhdtB9se7lPSGMhiAoWV1UkCNWuwDCFwLMM9DrhKv1DVW7pXkgcAnUKq99MaZ94w0MgPAqmx/IF2v/m8wxTeSr9fKYnvdQPV91Lk0LaTflQiOrBlf3V/t60CtGpLJC1fv4dh3elITtjYHt/EH2gLLSnCgQDvMcVtEf7rHEyCEL1QXeCLPRZudV4EkSDYBoOCZcaJUZH6LSOQhCOJOQf/jZKyNHAw0Ox0T4BitTPJiFHbQB1xbJC7u50J+58VieUbWDI0VEAVsl9R1DI0SqtL2fNtKTmgkk9zHBH5VM/ja3jkNCwRfiEIEJXUnmCqhGEqjp/erOue8MA7OQIbVULaSnDUa/sVJjwvhHliuUGieoGdQ8BuHCgt0tFlwu83A7YAPJN9bj1LfjpUZePpi4qis3dxETK5XifxXy/6wml9o39ZBGEo4orj7xnAOlYknVsUftERZNTpUYlCIfo8uqVWwFqidL4fFp+AlbsBE+scb9iqLE5dR6BLtfFFffJNATG10F8mPtpcNjjDkettc3Gqzgfi93Eql1VvwHg/wDoC4WDR76HAQShfq/W+nLGNx/JUEVN9JKE79AptaEFZJmdmPFOP23woYO9aRXne9xflPUV5a5S17Dx5h9PZ6tKEKqhJvFwt3SInyDbOiVn2bYFUtGxjAnCU9cV7ueVQYCpp6dMfLpO5aPLZ0B6ZUF1Ei2pjyj32L5qo9KKsgzcnLOsr6hA5Rq1lvY1UZQJXMkGW/C4+SMfcV4H1RADN/Jo3ZcHB3/y6ngmrTdvJe1XZeQvXekcEBTxOp5DQz51WPn2rDh/zy9OuU/+0HjTrnzPkcUnz7KwZniU7gbho8XfmHB+pqfryqA2RltfcMi6jkdf8VjqGtmouOqatPVV7GsE9zRZMF0J2/4K4rTUFVxLCCJsdmt+rzpBFNugNrCRHB3LzJ8G0fvHXDM44jCvYdDS0aEd71MvZEy8uQb1XZ2s4rM3NMRgnc5kJwHaw6W62QTw3xi0ygb9aE1v55/CpAZvXWqh/P0Fpy/nA/ThUulA7yq8EE71CAKUNKVCYO7qOvW9SMBvmblT4wW17FUYaV4TTTZBFDCguc0d74szn8qEw0HYy+ViQznne4HUZSlh+XA9/yzoEriCuTuWpVKCcM/F4aw1D2Bl++IeC6cPAPoBStfH7XsjEkNJtzxj3gpgl0ICNQcfA+Na2LhT3U1EGT+/g4taX2CcwoT9veuLCNe+fVfcp+4mxntCnez15eqf4+DSAn0GjENdno4d9SbDWpmz6AZ1kHIOAKVeHIQgKlhkW40gKmirZBEEZgwCGrsZo1N9JQB5jfIqib9QSb2SZ+ojIAQx9cdIWjgDEdC4m5jQE7AbUm+Ankqd483AYar5LgtB1PwQSwe3BgKJ5vYfqrf4b3i3/QOA37DFtwysThdezoW3KNGcOgKgu4uv1bz+nkrVY5QG8H5Avc7jx2Dj+1HisCea288BcE2xzEpD9Yb3SlJMNwSEIKbbiEl7pwUCGlcRZY8V/DriY2Tnm9/rwNH7ci4IMJ1tS5T802IwpJEVIyAEUTF0klEQ8EegMZk6hojucD082MCw5mV6VwyG4EaJltQFYPqmK2+OiE7q7+lcoctbFlhI2coYWOj72Ca9SjYf0d+fHpDxFQSEIGQOCAKTgEDexbl9P4C9XcW/xEznjW7eoUvnv0qd5uN1dV9hgvIFFnflu78+zsf7vaDSORBUtho249x37I6H3FbUxTKVE0wrR1d4oxr6uQ6ZBIikyGmAgBDENBgkaeL0RCDIitp51gprneqZYwnMaARhz3IDN3oKln1syP1FoBU1MX7NoKfzKLIKV6ue8haf2G4BlzAQR3ZhT88dz09PxKXVE42AEMREIyrlCQIFBPKWza9czMAlESyb3fgZW50bGGwGjou6mB6N8ykBzjNlXGcgAkIQM3DQpctVRSCKFXWxYRVZnUe0oi7W9QoYl8Hma02jGlYVPalsqyIgBLFV4ZfKZwoCavN+5vnYAQReDNiHAPQOl8X9hFts19dvPAiExRrPAVkAfyWmHjBuGx7e4X9N4nnMlHGSfpYiIAQhM0IQEAQEAUFAi4AQhEwMQUAQEAQEASEImQOCgCAgCAgC5giIBGGOlaQUBAQBQWBGISAEMaOGWzorCAgCgoA5AkIQ5lhJSkFAEBAEZhQCQhAzarils4KAICAImCMgBGGOlaQUBAQBQWBGISAEMaOGWzorCAgCgoA5AkIQ5lhJSkFAEBAEZhQCQhAzarils4KAICAImCMgBGGOlaQUBAQBQWBGISAEMaOGWzorCAgCgoA5AkIQ5lhJSkFAEBAEZhQCQhAzarils4KAICAImCMgBGGOlaR0IdDSsmC3LMd7ALyn8OcNNvjQwd70WgFKEBAEagMBIYjaGMeq90IIouqQS4WCQNUREIKoOuS1UaEQRG2Mo/RCEAhCQAhC5kdFCAhBVASbZBIEphUCQhDTarimTmOFIKbOWEhLBIHJQkAIYrKQrfFyhSBqfICle4IAACEImQYVISAEURFskkkQmFYICEFMq+GaOo0Vgpg6YyEtEQQmCwEhiMlCtsbLFYKo8QGW7gkComKSOeBGYM6cM+rq6zcexBafBuCjAHZxfie8DMYvGNZVmd4VawBwFIIoS8t4qL6O53d3p/+pik8mU++3LfocbBwBwp4AYgCGwPwEE26xR7LL1qy582XvaKVSqdgzL1AjMc7RtHcdA98ZHdrxvrVrvz9awUjT3OaO91ngTxBwDIC9AGyzBQ/+A4E6syOjP9G1zaQ+hXd89oaGGKzTmbgFwDsBxF2Y/4UY92eJlq3p7fyTwt2kXG+aRCL1Xo7RJz39yAL8JMNambPohodXr3hG5Qsbq0rqlzzTFwGRIKbv2E1ky6mpNXUQ27gWoA8EFJwjots5a58dj+fqTS2p/Tad4WHMorh1HTMfXyAFv6o3AbRkoLfz5uIm2di2aC/K5pYDpDbWoG8dW9SeWd35e1PAGlpS+xDTDwloNMiTJcbSXLbuksHBn7xqkN6h3MZkqp2IvgPg7SZ5GMgw8emDPenHTdKrNAe2pXaNjdI1RDg2BN8sA9fNjvPFuVzuzSXj6iFz07olXW0gIARRG+NYcS8cqWGbVy5i4Ctjp9fw0h60OPc5m2J3m7ja0BEEMX3WtvgWAv4tvDonxRARTu7v6VqZTC46wCZb1b27SV4GnoFFh4eRhJJI/v48ncPAt8akBZMKnDT0FCw6fmD1it8EZVF1PPscLgTRpSGbtq6YISY+O9OTXhYmTSRaF/07bL4d4HcbdwEoH1chiAjw1V5SIYjaG9MoPaJES+oCMH1Ts1ltAvAgQC8B/DYQWsF4i6vwBwHs7ToB+/pi8hIEA/9HwDCAua7y1jPwEIFeJfC7OH96f7OnM7+32DrTJvt6APsUfssB/ARgZfL/txsLUpBSU7k+urU+/uKp3d3dWR+AQrDgxwBrXZ4L+MNg7KchkfUgPnqgJ63UcNqvqaV9ITOUJJRXV+W/HBjPMCGj+h9SxwaGNS/Tu2LQt46mBe9kK36PC6NiUiUp/I5Aj6g/MPgAAj5YejBQWJJSLe7kZBKC8IN5RvxdCGJGDLO+k8nkohab7FUAtnel2ATm80Y277TcrbtXJ9+/PYePWmRd73MqNSYIz8b9lM32We/YHQ+l0+lc8beGhhO3p/jotUQ4ydP6EQCzCn+7K2tZ5xb152N5WxbvS5xLE/CvrrzryaaD+/s785u85/PZuF9ipvNGN+/Q5b3HaGtLvWl4FEtA9J+ezX6dHc/OG+y+41lvHXPnHveW2Ky6XwDYf8tv3J2z8Ik1q9NPe9OrOjZn6fMEXFK6ifuTndOuLN0O4HBXeTlm3JWLWed5sTqwddGesZx9pa8aSghiBu8QYgcxYwc/kUhtAwu3gWi+exOFZR03sHpFfwWn00oI4nGys0f299/xV119DQ2Ld7HqckpS+VD57/T9kaEdlvhdQDc2L2og2PeOnYSd0zCdNdDXeYO3LLVJxm37/oJEVPz5ceR4/sBA+smgSdLY3H4IAT8BsHMxHQOXZnq7FHGUXCoX0v7cRXDr7NHYIYODt70YUAclkqmLQI6UV/yeZ4sO1qnMmlraT2LGTS6JMEfApcNDO17mh1VBzXgx54moVPISgpixe4TquEgQM3T4m5pSCbboPpf0kCPCaf09XbeEQaLdfIGoBDEC8PyB3rRqg+/XlGy/jAlfcidQKirLHj2sv//O9X4Z29pOmz2cfS0N0MdcG/fVmd6uz3rzJJrb1Suoa0qIMkRV5C5Dsyk/nbP4YK9U0NjSfh4xvjuWl7BsoKdLvRgL/HREyUwnZfo6FTGNfXMOSe0wazPuAahp7I/Md8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3eJTUzLXKaq7q1KbnkrhhBtHf1zSdi8Y1n70SLnv5lckoMTqSbV0+CcPF9cN05FiyOhSlJlS6r64EgZIstE3wv2u2OD0ymQpHunID7AZKaVLpNTAY3UdpaJeer4bYoSNp03b1LVEGeO31Vgig4WjN+mhgZWKaisy6+IBTu/AF+FjCEI6HPh4WJoM3EsfAk6WLtZm8nbXrI6OcA3T3rAPOZajiEZRuULgA+FrkcQTgXJAlBlGMZJ9lQ5Yfy8XnqcRvYMk8QearLYpOnmgQh2dhJ1cjFZJRtgCEhY0+CkPk++PFpkFuoFL+srgeCkJm6qV482gfHuVjKCMLF0qbYGKv97rIDczFHlqqZJHcbnt7xigRRoJYhxk9iIwP/otYx71K+nZH8NfrHICVDTrPNrq7FR5hkCqcyFWdKcUpaTybdOj4+/TfFjB78iZe1DAoO2e5nhBmR7xzMBXNTThD5RgmAFB+VPvj59lXqy5YpkyB83YVUkyAqiY9zg+abICSXRn7GxK1s0YtePyCodLIUoac6QQhMJPcKBZddMiIppvNUIQjpB1vBTFq7gyAEpkX9COSTUZiD3hyk5NVO0ill7op3JJsOX4tctt3dThBlkI0dO00QhTOpYO2UkL/rCUJqIlfqbHW8V+wUogmiQkCLajx0uBIDhALVkcQSSOog6XVqkl1sTlWCyOKQiUV0SSYWkdMD322AN5HBS2NDkYfLnQFThyD8GYZUScXki1wb9gQhCd7pShAuDkzlztvs+56e1Zog4GtCljEohX4Ijl18e1ffp4isAH+Zp3imQLUThNQ6qKoqJj8mtGVg6nyV2nsWv4cm+XgYfLZLyAP7OyKG1wnxobW/LUeGtPmsVjFpFZP7LFLRvrgRhMyPQYSX3gSQ+K+/h3i6LcyveNfzsroeCKJSO1znAitbpCRWIL4uxfwNRn7pAnM32zFTcpHl6SCZrVmFIETZal5Sy5zXKnnHUSrmwgGttfW1D6YosJQYfSAr3Hb+o+CFXax9cTqkptQQpcM+W48fS5zcWNb4ktrpT1Gq5ZkTn6miYqrcJXWhP4Xs+5AShNyrt/jlstuklTmMAe711QNBWKEWCm3bXcOLuPXdaWopvaSWfcwV1Md7LSYSVWLu9CIxUlCKqaVKEIXmo/Bt5mq1RbgFzK+A6FER2K8luGW1iOHjNDEuFmiu2KJbhd+pI9R7HBir7fGLhDc5Twbmjo6u2Vxqmy4EKfV892qjYEGSXVIXBvIsaYNTTVKfKgThtBgj4G8w+dhYLLIruJ/CpJFuICRWmlKCkNl0F7uY9FyECoO8ieLunrih3i8R4zu5Or0ChIV6b7WH0/bSuSvgllfEaaIKyD2T3epVPYVUyDsSmUG/n4B9CfiDCfzeMPmWYpPHGXojS2LOxUHVD0SZICpg012YvGhXEqRKhJ4XG4VMBFzhKPeSiLLJbD7Y2vTqumwgOYtI2TwZTCJq72wGYq3BLUtVA821h8LnENMttnlUERWjJLGTL49bqSmk5FvcAxzlfI1HNe8gdrujnHRSuERu9bPgFsb/AVxj+dQJQUgu+iaYaYmqw4w0Po3LyUBiMfaGwcbJIyNrRTYvpUcSmE3JYakwpIJwBMOS8STdbPMgVnKQFIKqEoTkAly87unRbQeiWOBBWagIP/GBRFuyGEFOoizXY7tSF8rOSSLxTyhqQWivQx4fSR6LSRJqoyDMdbFJLImt5Wth9qp/qpwgpJtJn74iVgTlyf1X2h14oRpqw+Wj8q1acQ6WNK6LS0ynOlExicVhGgJYB9D8bH8YSJgTkycXSxPpFuzM7aK0q2vRR0wKPJDn5AY8ON7KYZW4+JlLSRGDyB5q+LHUxORxxWR19lMEjDNM+oxIZUrArHTf3UNrSBYmpWB9UhNaP8H6uvoWEvEaW/KiwgyHBpwRRreAeEF8OLKh2ILlEop8jGGcmIiuHcy+L9nV+QqeJsnU+Cev4G7F5M7+Xk6wSdcw7C6LUVWC9XmooVUxyJabKgQh+iOPll1usL7CSMiirQIVk2Qnq3QxWWzAXE4m0svqeiEI0ae2rvCxBpFwfrLFXafbWoLmhW5Zr6w495twGYiucoZL9rCkEfro74HxuXwsvdvK7HKnkUHX5u0IrMB1WJEYGbBn93MdJok6Riy8Iv2n5dLvxwJI9QRhTfbOcAcbVkDEfbLCiYvJYsSY2d2KccklVhKXbM1NWz5rV+3Ixk8xexu1d4V7iSzVz66x58IIoy5Oh0pE5BL1t6Rc4bLBlYX7Lhau3lKrdfeKtJoi9Wt+4h9/4b6TDL48EY2IkDG+w30z8+LESOTnxdYWld8biSCKhURxCfctzV7nxMYl3Ler5VweQch9H/zp3b0GSx6vpvCyup4Iwi23gzhJMPHy0eHIU/Y+W0naW5r+G2wFbrMnm0nvwz0un11OAeKtRxmBFYnoWrHrzfvQRD5aYhKB/uwJjQTzF11k8+ROJzqyR0a1/+wriJ4fgkjr+GXEyI+aFFw+Orzmd/Y+p5PMiMxzJDJs2T2WpTHt3RMSYSuYL4OJO5yhr9vaPrVPIDh5FRNEEqOgDQjXRV8aQhlwTS5jbT6sXMJY5Uj2pBxWWnlhlCQMckvi45EsKd1cCQmDRMIrWXIiMZYvbjJOJeL/v9D7XD3UvTIOk3QPCJ/MlnfzLPd7h+Bs3+/7EvVc0bwTbgmD3PKbZ1Lunsvgbzuy+ImMc1+OD0f+S0bieQQhifCnHIFVZZDk1lGFl9X1RBCiXx4pMe1pFMVuyS1dZQ6eYjtxj/Sm4ryXS79ppTk0cZTUTBL0PAzztPhQRCyuSo/LLjjzrj8LNp8E4YWvaP8lBqIizSrA7wRhrsNkWpQZI8LS2PDAOllnPVOaAmMgPA6mDFbmxwCaLUk5OsbEX0gMR1a6AOpCdFbp7QD/DjCezKyyIhOeiEArUnk6nsoujKJymfoy06hCylGRNTCXf7wmKUf9bm5UJnhdnyC6+s4HsfOkn3MrIMZQc9O0zzqCPVIFUo6K/ZlbemILVjtByHwffF1qqQyUxOoEzuxb9UYQol9H9oQPDCaxJj/7V9EebyLGrUy4IrdrUTBfLTHBfKYJQQ50RimOVhJdeGY9owviI/03FO1tpoBfgsiScPMOEmlEhVrLzyMW7gsTw5FVXmqM9Om4pPotAlLJjJZO71mQ2U+1LyJF6erWIF/sprpUrUhWzmecqGwVAxCbDfD/l6tT4UI0E3FUjIc9JayK+KmdKsOBiVb+rMq9m0qF2TL1TBAeBJ4R39WbnDq7+z4rORWoQCM2B/89OTbjq15xwHIEUW4WOBWJRBkXD+08+/p6JAghu0deV0n3eZiDgWVImocRkNOjFjtBZCsSag5qmvwGASJ4nTMBvAzupNvxUnVsXE54RUNrOOsvhSBEHV45imV9cFPzufXXVr/Qrb9LBZcS27hg5wlE3D/NUGkDgEjSctnMg3igmhFefcSJSopwOONjM77TtNfrIiR7zuRc1XFNtNXE/F1mXiQ5jcm+l6eJ8MXYcETk9Xa9r1DEs6BYPROES3pbGyfjxSBSPdHouudl/U+rKq3Nj1AzF6i1ne+IOR1g419HRtY+WgzPHEG4xLNXNjks1lD2d5dkNXmX1fVKENk+pPW0wbMJdCbSnqpvz/wmHJseZsL1sw7khPjYVaK5emFnqUfGaQEYyzh9IXugbRJs3pmH+o9g3JyaTN5dzFpJZYwK9aHFQ2tUiiCy9Yh7n6Zpr5+QiWMkVDHZPqfAeJFAg8LCKouxSr/sZUT9wdatbQEYy5nMLoBm2khYqINeYNB6E3Tzhmj/s6UsWJYVW8u2o0FYImljDOCXiI2RFMybkjv2Ha10NFcPTKgtFP6wwcZ5gHk8QCItsLhnSQL8HMNY10ST12eDBhZ8iz7zM6RjUqXCBCwC0Yds6kFxKvvzztzoDzBozayDUo9WkxzrnCCs4cos9CK9rbgnsasfVUzMaU533weCzGczWSH/7euSiBz8DDHuTxKt8jOniyYM8vvx6fIaAY3A1EGgIOlSBUOyTx2Upm5PNEFM3bHVPdMIlItAYbgZhTu0chvV79cPApog6mcstCQagYoikFFv/jgdIgSPEtF9zYHNv1QNASK5kyopxlJFO6UrqykCmiBqCrduTCNQOwScITyEh7zXZadTMqeTnd/3a9dT3VK1ENAEUS1kdb0agd2MgNQykfnL8ZGIsErytBSS++P4N1jYzRDo5stEQBNEmQDq1zUC9YqANCgbYJlDJycnvy6zerMsyFq39RKxCI9h92OoSCKjesVKyyVHQBOEnhkagSmMgJcXtTBrBdEomMYt02k2PwGif5L43RTzIp/CCO7ZXdMEsWePv+79HoBAJuz37fakRD66vR2gFfFo/23F1FI+6tRFGwQBTRANMlBaTI1AOQj48KLONiPCXiRM4vOcASnLkUO/21gIaIJorPHS0moEykIgz7MZ9I95HrtWMEj+AwPrUkYg8sjQ2hfLaky/3PAIaIJo+CHUHdAIaAQ0AtVBQBNEdXDVtWoENAIagYZHQBNEww+h7oBGQCOgEagOApogqoOrrlUjoBHQCDQ8ApogGn4IdQc0AhoBjUB1ENAEUR1cda0aAY2ARqDhEdAE0fBDqDugEdAIaASqg4AmiOrgqmvVCGgENAINj4AmiIYfQt0BjYBGQCNQHQQ0QVQHV12rRkAjoBFoeAQ0QTT8EOoOaAQ0AhqB6iDQkATRHur9EjFE0pP0Q1gVHx44pzoQ6Vo1Av4RKJijfqqwYiLRNgL/0QT/CsHAXYnBtX/R0VT9gKjLVgIBTRCVQFHX0XAIiKB1QTYvpRSvisUij1e6A2URhFQYfpqZ/n3WwbwuEomISKtT7unoCE+DgeUgTMSjkRvrrYPhcDjw4iZaBMJhiejAV+tNvmrIowmiGqjqOusWgba2T+1jNE98DkxfBJA0wceORiMbKy1w5Qkie1jGg5NBXvbIYOSVSsu8u+oTC+9fXzFOZja/DdA/MeHyxPDAf+4ueSTtUnv34jmA+QMC2vckjYUmiDqahVqU6iLQ2Xn6/mw0/QbAoZmWtjYaQQi5GXgGBp2WGOr/fXURq03tHaHelWBckG2t3giiPdT3r8RWCtaAJeMepNLWBFGbb0C3UgcIhEILD0pycBiAyIMgnloShFJb1m76r8n9gOb9mXgBiJeJXbUEvqfITJ4Yi90l7iYa+ukI9d4Kxtn1SxB77p2nJoiG/rS08H4QaASCcPZHEMZLL5NYPH8A4O2O3+9vCfIZg4ORv/vBod7KaoKotxHZJY8miPodGy1ZhRFoRILIQtAxd3EnTPNnjrzSKWasSIwM/KjCUNW0Ok0QNYXbV2OaIHzBpQs3MgKNTBAC985Q7yJm3AZgmm0cnjQnA8eMjq7Z3KhjowmifkdOE0T9jo2WrMIINDpB9PT0BCeSB1zL4M/aoEkR0Vmx4f61FYarZtVpgqgZ1L4bqhuCSNulpxbDxBKQdSkndklJBv4X4NU82fyT0dHb3xA9LNdRzrJnfjlwBJF5DhjHAngPgGAGvc0EPAHC6uYA312ufrenJ/y28aQxHzDPBegTtiTxSQB/IaZh0+CfzDqQE6r27QULHePhliY+NSOrZZJHMC8B8Elbe9sB/h0RrSy3X7XAb/Yx4ekt47QAjGUMHG7rh/ABeIWAp5i5PzWZvHvDhp+95jbz27rDsw3QgwD2Vfk6GDglER34hUpZrzISM1elS+pi7XZ1LfqISYEHABy8qyyvbwnuHR4cvHVHsffL+X327POagq1b2wIwljNxKO+7sZz78Gdi3J8kWrUh2v+sm2Of9U1M0j0ga34WfxSshnp6zmkdT77ZA9BpAHcD9G7HnY2Y/y8AxkMMWjProNSjXt+bk7Q8hcz//lyLzplz+n6BpuBpIHwaRB8CY79M4TEAfwboAZPMG0eHI8I6jYsDU/0Su50ghF16IDh5FRPErii7SMt6/ipAn45H+3/ZHuq9rERPauqcGz6aTVzvYhnibHc7iL+BJK6LxyNiEJUfy+kniBVgEg5w6MdNAAAgAElEQVQ1zstFST38NBm4KDYUEWaYnpPDjSDGx9FMQeOHzHxGziRPLvF2MP5jYseMazZuvHFSuVM7Z3C18bMWjxR9A4zzHaoUNzGTxFiZSjZdmd1A2AtONYIQp4jx5AGrAD4z208GXgwi1RONrnvex1j6KUrtXeFeIvpvAO9SeZGBBBMvHx2OPOUsX0mCsPxagskrQSzMZBW+sxxqnt9bJQnCxxpnCeeFnQr2lSyzWwmifW7fh8nkAQAfVezUGDOfaxAdwsC3c+8o7DDEgk0B4yoGi5112p5Z+eFRM5g6Y3TwrpdUXmnvWXwIJVNrAWpTKW8rkwLh+xNvzbjCa+GWEYQBPtckugnAMT7aHJho5fM2PhTZVuydWuDX0RH+BwSo32cfsh+V1DdgqhGE6Gx7V9+niPin9nnDzAsTI5GfFxtHv79bVlSbcBmIrvL/3WCMiS9MDEdW2Tc9lSKIjrmL/xkm37lTw/A+v/3KlE8y+PJENCJ8HPI2ZZUiiM7OviPZwNoSZBQb0svi0YEfFtswlth3pdd2G0F0di58DxvBe21OS1mBUwA/DRiJNJvyEQR8xHa62ApGDISTVAlCHI2bp227DuDzClAhvEaMxxj0J/EBSNrLvqJkd+7ZL8aLTEgQ6A0G70NAN4CZhSNFN06MTV/hRhKFunSOMdPLRFhkq0tMsBGAns+0JY7z+/ttS5SvBX4ebYyB+WmQ8RiAFIhbAHSB8d7CBYsHJ1pxmp3w0mTNnxOnEWbeiwinANgng8MEwOsB4285XAz6UXxo7W+Vvh6PQtVSMYkmOzvDH4dBDzLwjqwITPhKYnjgm+XK7Xzf5WI8Bdtctt4hPgyMj0tOfVsZxvxEdO1otm5LHTT51goQfSD9N/NoIPtv6w8bdqqKdoU/YXNDfCQiNj+5x+M7s1S3DDwivjNLNPB7mfAJm0rHXpVU9dfRFV4OMuakC7LoV+bf1v8/CxjipJ/5mZ9tadrrOqeKryMUngMmoa50fndJgJ8D0SiYxgF+JwhzJfKJ+f7l+HDkv3YXSewWghCLQcte225j5j77SBHwYNLg8zcMRcRinXuE7s5obvoPgqV2KNz9e58gqCMU/iKYvpX/Lj9tMi5+98F42KmL9GjP0+7c0pvvoAjDutfIPsIU8W4zwJc5+yXmbltoyWEGJ28C6Ii8d8BfSkQj37PjkP235LLVXkyqcknb0wu5rFOGTX+NFHu0JWSsBX7t3Yt7CKbYMGQtdFIMfKs1yN+R3QPNmRt+b9CkG5xYe13YNvoltef4K5yiZXPJ62+Wzry5Sdx3iLuz7Go4mDLwaclchjgZ7EjSFwi4Ml9dTHe0BDefPTg4KBbvgsfvJbV1WT+5/0omfCb/m8EN5sTkv7ncSVF7qLeTGMIkOF9jQXRdfLj/YrdFuJQ7TxcCs77N5OTk150yiu/zhU34pEHGjxynDaE1WVyN06HKfNgtBNHWFT7WILrHvtsgxk/Y5Is9dP0uC5W367uLiuEhpLgvHo/8Xw+QqD0UPpuYxBEvt2gR4ZzY8ID9eJ+rQrJrTIH5ypkH47teF2KZi+wfArzUJs8LSPG8eDzynFNGD4KQHunt73d0hN+PgIV9NtyE+PlPKYPnyT76WuHX3t17DQHiI00/RT5aUUQQcvMO3A1Qj20Bc72wnSoEIVXRKF6UqiwK2TLt3b3HEPBLAM2Zv6mY1FJHV/hykLUhyz4vs0Hz3EKD+CWIzs6+j7LBv7bvzBm4KhEd+LdiO+1QKPzOJOMX+epfHg2gaX40esdWGT5+CcKFwCz1eGIkIlTqrneMR/aEDwwmscY+p8WdhDkxebKXMYafcfVTtuYE4XLJpgSAOHk0TXv9BgLOzeuk++6JOkJ914J5ha28kqoou0y1d/eKk4vYEWUejk204kSn3r6tbckBRlPqofzdibeqyN6HzKllvRUMLNs48PVYdOBrygTB/OX4SESEQfe85G7vXtxGMO9zWPasiEcHrne0VRP8Dj9u6d5ve2v8Z/bTgKo1UUd3+ATAIjxrEfO6sNUE4WdpsKwFP0+MXadYxVOK7FtgprMSI/23yyTwSxAdXX3ng9juHKhCXLmmJXc4fzKDyblud4x+CUJCYL5URZlNnCBAYYklnt1mylxzgujuXvS+JAKDBMwqpfOy3YNb8CyhhgiYJIAW+uoM0O4nANnkldQxsVO/eVIiOiDIIPd0hvoWM1sXh1kVmOsJwO0zLayDn5gIBudtHFyzS0cOwOUEofyRSHc4kh1orfCT7Yi9FhQ7fm09C2caycCDAIm7iccZ9FQTmdcMD0deVSDWipieysazmncQ6U3W/ncACOe2LcAzPBmYW0mHOUkfIi3BLWe6qYpsOFBHd++tAOYB/Be27hOM1fZ7CDtmfgmis7PvODZ4IQChlp1JjJtiIwNfUaU/yanYcx74Joju3q8x8O+2sVHaAOetJ446xF1ZLUyZnRjWnCDau8KnENFd2YXUr4me7ONwIwhnWyA8hyT3xOORv6pOJll7xPimY0JSe3fvTfaTDQO3JKIDy4vt5u1ySMjzTZP5hNGRSNReTkYQ5HLacOunRH1QoAaoKX5dvauJcJZ9wat0xNKpcoIQCrh2B14A/hikZGh4+K6XVed2sXLtXX0LiXidrVxRFWaxOmW/+yWIUtrI21QU+sZUjCCkm50Swpe3dYW7DaJfAdhbyO53nSwXo+z7NSeIzq7eq5lwxa4O+GdG1aOvsy1xCf73vVpOf+KB2970A2B7qPcKYlztJnN395n7pjB5n12vyYRLE8MDwnxO+enqOuXtJrUKq4ejci8xXRAf6b+hCEFIicSr4fTOOzhkP10x04LESL9QPVlPrfCz2io8gYk/jzFwz04rlFUtwb0Hy3UEmyoEITcTlZ82lSefpKDkBClKCSvD34LxIzMZXF+JE8tUIgiZhsT5XamMieT7lGouVOoqp0ytCaJg5yMup2MjA//ipxPtXX3ziVgspK7x2aUnDad5mnKjBWZueZdakkkhar4fIF+hmBncRMDxdisjyWlFpmLy1KHKullsp1NL/IR8sjsYh9yWVz0x+jlAd886wHxG1fM8W8+UJogqXFJbJ5WCO7iC2fQSCOuZsa41uFe0FBKvBUFYprWpNw9npoXE6APhEFtPKnaCcO78ARSaUiusOxKTbKiqXRWqVy5SU4IotiipSl2gQ5Rcnvl2xlFtPF0u7zjv1xnLV1OSvkkWuv8xeMeCkZGfb1etu5jqrJb4ZWXu6lp8hEmmuHC2m+G6dUn0dT2ZdOv4+PTfqHiETxWCkJ1YnafjIqbQbpgWqKmEpVjTON1BjBMV5paw798Ixo+LhUCx11Upgsjm0jCNlkPB/C4QzyHwEY6wFrJuVIwg2rt7FxBQcYdFIfTuSKSkCUJh1kuK1BdBlLh7LPAWtZHR7iAIgbOIyRVImd8nwmk+PHeFU+DNQUpe7aWDnzoEUWDoUZDlrFIEIcbEf9gY64sRMbMSDOMLiejaDV53ceUQhOV7kcIZYPqcw6HWz5etCcIFLU0QfqbRrrKaIErDLftW0QtViyhM8xIChG+IxANcKsAmMnhpbCjysOzXqUIQEjWG2F3m3XlVkiCyWGYXY2J8MRPLTCVkTVIYUIyPzfiO2ymvFILIJFLq3WmqfQ2Ad/qYjkkwhFpMnFKz/h2aIDRBVO+I5tdszsdklhYtEs1VqfpM9MsIQCdnX7AfYSulDlQSxrsQtfcsfg9N8vEw+GyXcA72GrbAME6QhcuYKgQhMT8tuMCsBkHYQbZUTztoLkFEX8ZxLmEssq94euv7JQgrLMter38TjM8XOWWOAfwSgzYaoGHi5P/s2LHfM8FpWw93RPitJkEU3QxV4BupWhU1PUFYx1VH/tlSEoAX7KAkenqZ81UpF+IqyEti46RKsVxQaUuUcX78Iom9Xxv4YhZTtcRPtd+inFgcWltf+2CKAksll43pqly8sKcCQVjqngDWATQ/h1sJ5tt+MFcoS11diw8ykZoPwr8ANFsSmdnVT8cvQbR3hfuIaLXtBCBETIL4YTbpDpMovldw2gtuF+Z+N3R+/CCcBjQE/A0mHxuLRXbFllIAtF6K1JwgCkxGS9CfF3hCunh4dnb1/jgvXksJbakMlPAcpabUEAEflO3GVerwU0ay0HmGMpDVLbG8KtiF1go/P313lKWOUK/YvYrFIqeGciPMqUAQnZ3hDjYs+/hswEFhI+/b56YMzIu+auV2MVOr80OgwHXT5IcgMuFV7hWR522CbCKTz4jFIvGiwgGoJkHIN4vVibSr0tdyy9SeIJwmqoDfxa3AKc3tFCJxyd9CJs2Lxfqf9AFcNtyE8Fp9SUSZZDYfbG16dV3Wo1SmrgH4PqSwyE8eiQzR3E/AvjuP7n8wgd8bJt/i3H1IFjrfrvgqTnC1ws8K+87myWDqEIcEBmKtwS1LFTx2rWFsD4XPIaZbbGMqVRk0OkG4xPgRZpSnxqMRQRoVe9Kh1w2hfpwLmCL8SyAA8yTVnBNtcxd9wDADIuJpLn+EmxWOH4KQ3L+kvOKjyQCROABWTMU0u2fJO5qTyV8DJJJcpR+FuGJOOUXECNPge3eG+REBDh8n4Flivn5kJPJCxQZZoaKaE0RHR/hdCNIgGO8vZbctdd5xO0GUEdQrK5skLorYsV2biA6IvBK5p6O79yIA19n+9IbBxskjI2uHFcbBKtIZ6j2LGSJEQfbyT+ocI9cve0fMtMsgi4cFFL5fTlA0P/ipkJUXhqo7wkYnCGno7SqdiiXfacpPzgk/d1h+CEISR8n3BlMSn61iBJGOflwQ/81v2B2Z/4nffqouO57lak4QZQIod9xxIQhLX2tgDYhOtaGwBcQL4sMRYXrn+bjkAB5jGCcmomsH7S/LUkEK2/TxVg6rJOTJeE4KL2Z7KOLHUhOTxzmjOLpcQI6ZzKeOjkREek3PRxJNV7oLrRV+8vhc6jGzCggGkDoONjJBuOQWqFooaKmfDFH/+FvTl6r4nEg3gkyLEiP9IsxO3uOHIJynWr86/q6uxSGTzPV2FR2AShIEZNGqAfXAnelESKY4Edqs9/iuluDenyrFEbHYeuD1++4gCLjk1R1MBrHkkcHIKy4CZ9MeClVCNvx2uqhHlEnZYAkdtUKcH3l7zPeIvNkS1ZHQh38PDJGcxvbQbS1B80Kv3NZWtjaDri2Ib89YkRgZsEettOp1s1BR6Zc0C5fHLrQW+MlPNFAicnnIb0iDyklw8x2iRPVjq1SwPstip3XrMhCJsC2OlJrqi46q3PZykvAnqlFJC0J+e8USchKELHpAVq6CKAriB8Uoxpn7mzsljpivk0nHxWL9j8hw8hu00GVjlSLgqvGxGVd7EaxLVkXlzV8p41x3BOGVhEaWl9k9EUmmax4E4XIKEC9uBfNlMHGHc7H3yCHruWi5nALEDH6UEVghcxhqC4UPJSYR6C8X5jvNee6njyImjCKK6SUzD+IBeyiKTOrIPqEPdYT59lSF1Qo/l53dq8z0+ckd0wdkH5XAzmCsciRbcv2YZPphhTwkJX1zpRKEIIRgcPs/UBN/mMg8FQyRe7rAD8TP6bSkDriHP3FNeiPaEd8ONU1+qyC5F+EH8eGBS2UOcwW5QICnkOJTZblQXOJDjQlfC07xtbI7P3Fp3mTylxksQvpI8957hZeX3cXBME6PD62NuWErPwVYbLbeYHxxZCTyB8e7Hvneq7sRqEeC8E5jCbzEQNRKGeieynBXv4rEqXfJ9JZ9fwyEx8H0u/QfzI+5mOmJSJZfSAxHVnoB6pFmUKz6r4ExBNCrVupME0c5YsJkGe95GOZp8aFIRqb8FmWX1EJwAE25kva2RErDdK5qZ1J3pR1hjfBzOYFZPdoO8O8AI2NcYPVHWLEcUDgW7h+T3JggWz9Z4cEJ5tdi0chtpS6quZ1uqPdLxBC5Oarw+MuRXo4AcnWJVWN+2kwxn5nbABJ3i85F2DMHi2QBztSPTQAJQhpqbpr22Yx6xSs+lOo8eZWBHbaUAyLOkVT9JQSRRD4Wfxae4q8ANA4yn0uNJ890qoJd0rVmhyO3xnmmBCbEg0guqmSUXj/zYbeomLICumRSKyb/dgJWMoS9Nfa1CiskMkmrIuhGAML70u/jK4F4ecnU6XkYdIZXXmSZLp1AVzJYxMRXiWMk+u+rT7XAr8T5kB1LkaJ0dWuQL/ZS57V39V5AZBkTSL2AvdQbfiaN5ATh53W3ssJa7U5OmhcWyYZYibaydcgyK/qp/0k2qNctm5yoSK5ytjeRn/HNZ3woh6w8zMHAMmPS/IpdpeuV07uz8/T9TaPpAQI+Juu4l/qsMxQ+iZnEhiO9Vvl6arcRcBNrtxKEEMqfyzw/TaaxLGWYZp4npAJBONr6rt38zmvMRLo/Jl4+Ohx5ys/YZo7a36A0keXfmcgrkuaSlhV1u2ylYOA1Slr256Fq9Mk2VlXDL9PGBTt3oVcBmKGIucjvcZlTrSZ7V4GEVJPieIpWYYJQjmukiJfvYp2dfUeywTcX5HN2r0mEav8xTzZ9dXT09jeKNOhJQrIFOKN2vpqAC93URo42/8iMK2YdzOuE6rXg1FLEGixzihAZ8WRhXzzvsiwVF/N3mXmRoqzbQfwNJHGdHzN534Oq8MJuJ4isjGLAJ1J0GjN/Ni/6oqUq4Q0MWjk5NuNXQhetEs3Vq++Wnrd1a1sAxnImswugmbZFXBxTX2DQehN084Zo/7N+kv4427XUM+O0AIxlnM4DfaBt97p5Zx7qP4Jxs5/ol17WOFZEy1dwAjMuAqg7o1ZKgfEiDPzKZP7JaDTyWFl9qgF+YoxaWrYdDcISyRhZIRSIjZEUzJuSO/YdVbGsyY5NGiNrrl0K0GH5qjfv/MQK35RVpEyCEPPibwBFGfjlZCsPqVjCqcpWRjma0933gSDz2Uw43lKPMvbL1GepXEjcHxBWj7fwL/zKnL5TIpHe95MO9aHrAmw55aVSnwHRSUg7qmbVqOKE/OedDnUPMGjNrINSj9rv5CQm3EXN0tMOgOblYJwEsjJi5k6hKqG4hZ9ToCnVx+A+gP7R1seMuoqfAIxbWoLmfV6n4DLGz/erdUMQviXfg1+opbnmHgyz7rpGYI9HQBNEA04BTRANOGhaZI1AAyKgCaIBB00TRAMOmhZZI9CACGiCaMBB0wTRgIOmRdYINCACmiAacNA0QTTgoGmRNQINiIAmiAYcNE0QDThoWmSNQAMioAmiAQdNE0QDDpoWWSPQgAhogmjAQdME0YCDpkXWCDQgApogGnDQNEE04KBpkTUCDYiAJogGHDRNEA04aFpkjUADIqAJogEHTYusEdAIaARqgYAmiFqgrNvQCGgENAINiIAmiAYcNC2yRkAjoBGoBQKaIGqBsm5DI6AR0Ag0IAKaIBpw0LTIGgGNgEagFghogqgFyroNjYBGQCPQgAhogmjAQdMiawQ0AhqBWiCgCaIWKOs2NAIaAY1AAyKgCaIBB02LrBHQCGgEaoGAJohaoKzb0AhoBDQCDYiAJogGHDQtskZAI6ARqAUCmiBqgbJuQyOgEdAINCACmiAacNC0yBoBjYBGoBYIaIKoBcq6DY2ARkAj0IAIaIJowEHTImsENAIagVogoAmiFijv4W10hHpvBePsasDAhMsTwwP/WY26dZ0agT0dAU0Qe/oMqEH/NUG4gxwOhwMvbqJFIByWiA58tQbD4auJepfPV2d0Yd8IaILwDZl+wS8CmiCkiFF79+I5gPkDAtpBWBUfHjjHL7ZVLF/v8lWx67rqLAKaIPRcqDoCmiAKIW4P9f0rMX8fQMD6tc4Iot7lq/qk1Q1kpqUGQiNQZQQKCILxcEsTnzo4GPl7lZuu2+rbQ71fIsZ3cgLWHUHUt3x1O7BTTDB9gphiA1qP3dEEITtB1PcCXO8EVo/zfCrKpAliKo5qnfVJE4QmiDqbklocRQQ0QSgCpYuVjoAmCE0Qpc8e/ebuREATxO5Efw9pWxOEJog9ZKpPuW5qgqjDIZ09+7ymlpZtR7PBwuxxLoADc9YuwGYCngBh9XgL/2LjQ5FtKl3o6Qm/bXyS7gHhk5nyfwxSMjQ8fNfLbaHwoYZ1YUrzAEwD4TUwb2DQysmxGb/auPHGSZU23Mo0MkEIP4CXNuNQmMZygI8DcIiFUfrZDvALgPEQg9bMOij1aCQSSSnj4AWqwkW+mCetrdtmMyHM4KNAOASM/WzVjgH8ErExAsaa8fHpv/EaS1/WZgryCTmseZc05gPmuQB9AsABGfmSAP5CTMOmwT+ZdSAnvLArZ/7pd0tHQBNE6dhV/M2OjvA0GFgOon8D8E6FBsYY+DFPNn11dPT2N7zKywgCKT4KAToNwHdti15+NUwXxEf6b1CQxbVIoxJERyh8FJiuA/BRtf7z02TgothQ5DcA2PlOpRbgEuZJVpRXAVwy8yAekC3GlZJPNGbJGMQKMAnnv7cXx88bu+Lv6xLVQEATRDVQLaHOI3vCBzYlaTUDx5bw+pNsUG9iqP/3bu/KCIKAaxn4tis5AH9KGTxvw1DkTyXIlHulAQmC2rvCvUR0iwc2bpCkCLhqfGzG1c7deiUW4LaehTONZOBOgNpKHJMUgW4cH5t+STXkEzK19yw+hJKptSXImALh+xNvzbii3FNridjo1xwIaIKogynR2bnwPWwE7wVwaIE4lroHQwC9yuB9COgGMFMi9iaDjVNHRtY+KuuShCAmAIzbdndbGHiYQG8CZjtA/wSilfHh/otlu2E/sDUaQXSEwnPA9AsA+zv6uRlATIyF+DuB38vCC7pwhzzBzMsSI5F++/sdXeHlIGNO+m/8cQCZf1v//yxgiJNH5md+tqVpr+sGB2/dkf3T7GPC01t2UESyiRBqrVcAbMjKBrA4gXbaVDp2USaYaUlipP+uSson6vKYyykwXmRCgkBveM9lunFibPoKTRJ+vrLqlNUEUR1clWtN62jpTgDHO156kgkXJIYHYs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GPIOs&lt;/div&gt;&lt;/div&gt;&lt;/div&gt;&lt;/foreignObject&gt;&lt;image x="2" y="630" width="98" height="46" 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qG35q7KswFuR+mXmEwivXmRG1T60UkrL2yXx53PzkSTpkRhE3mrtAbwnEy67cg8VL3DXQnDllUYXYTcPAYbB5h5FXXi186TRDFQDFdhiYIBSwbGlZ8wKLIg07zOgCBzmQKRY8lmQ0EIeZbXVPbVWBe48CmaGTr8W54Ud+cyDFRBcKG8MhxGgvlST0JEoQYm5zQGxk100hVdNjlKxHYfw9jD2lAP1/yTxPNAwTsScAfLeAPhsU3uk2XNUGE2Xn802qCUMOS6hpiF4LoW87kRXqT2i5ylhAEPMh2G4iX9vfEN6kNR24qzzepi/xiXV1dbF9EqQuM9+RzGpY9X1uOBCEhc9uMlZmHXO+jKPllSF5MfCOserG+qfUUZqxzBJSUmtZqgsh3FeXm0wShiKVHqGLbL2I0yqsf64q/olhUTjLP17VmkJmrs9O1jbHzCfRtV+jrbQycHPREpQxjj2ifImlRpbxM3TIpSDWukJAeRNjvSyb0owxVTKJ97tAbwupM/N0RdFE5DpXsYBDmgFXTsnw/IxUVJtGOYH/4tTkyemT2edUsppog8t2JNEEUhNyixraDDfC9Tl1qpsBXAXwRJm9Q8ULONiItNaANRF8DsG9O42YoQXid9sW7ysJckk2+ShXHmqbYIQZjveu9AAHlIBFWJXo6by9o0CWZ5VIQd6WiWOlzUKDahlgrEd3oipobLtz3JKmYRLfdjqJ2GBZmC0QftmHxeS9EAhvVNbV+D4z/nPgb3VwVtc7u6or/w2ucxAGKDLrK5Ynv+S68JojizXgtQYTEsq65/cM+7wG/vut1qnWGZf54aGivP8kuXltajp83nKqoZdCpBCzL2Swy7bFDSINO3dTb8Sd3EwuN5hqyy9LkYT2p3YWkPXHp+l2n/FZJBa+CcQUxde67r/Wc+62AtMQgXhsjsdkcLnmEx37aM9kX7wwTDC4ELh5vO8jfTRbtHUrR5zKSQ1T1ICDS5WOF5Cy/0PwSA43x4n3CcMiw9JACxBA9zoisSfZuFCrGCW81iAMAMYkos7XOMv2kD00QIWZyQFJNEHlgmXlT9yaAmgKybwUoE5KDxcYgYsjkbhATC9kJ4m8ghau9TtEzgSBEl+2TYcS4lMHi2dHcl9bSuJgAXgFoOH1q5bmOJzdl8L9EBq9KdMcfyWNolbP4SEGijBcZ6BVPZ4L4g2Ac6nUQSPcpxINBkyhBiKblekyPQeQbyM8LyLqm2CIwiUe49pYQpXhOtRugV0Fc5XgO1JWUnoFhHd/fHf+drB5NEMrTODChJohAiOQJ7Id2XiZx+r0SwDvyLMaZbSeYfmilopcODNzyhl95M4UgMn2k+ubYx9nCNbJ3KULgaj9daUaM8x7r3vhCiHx5J/W5+/ArcycB1zIgAvylw8iXMUF4xxLLP+RMgBQeMB6CHOjE/u6Nv/FKqAki7ykt4ezilTUrS7LVByZOJMaF+W1wvIUJl1dHcJufHtYJ7gwjCLtraQc3Wgng69L7GO/ZlWLG3RHwxX198T9O9iQMd1DgLWQZq03Dsia8M1LGBGGPTWPrOYD9HO3YF+ZVO9mY1NScvAdVjH6D0kQ5R2HcUsS41kxVXBJ0gNIEoYCmYhItQSgCpZLM9rqOpo5lIqEX/wgBCwC8zbGqXgPzK4CRJOIucyTy0MDAhq0qZc90gnDuPYsa294bIWsZGMcDdACA+Q4V1E6AnweoF+C7qqK7d3V1rRsKi2Gx0wvSHjHpeGb+LIjeN6YGI4gx38Sga0cH5/1C3EuVczRXGS6S2FZF8y2xrQOHaSkYqxk4xDXWWwH+Cxg/MUdTd7mtlbQEUexZnFueJojSY6xr0AhoBDQC0xIBTRDTcth0ozUCGgGNQOkR0ARReox1DRoBjYBGYFoioAliWg6bbrRGQCOgESg9ApogSo+xrkEjoBHQCExLBDRBTMth043WCGgENAKlR0ATROkx1jVoBDQCGoFpiYAmiGk5bLrRGgGNgEag9Ahogig9xroGjYBGQCMwLRHQBDEth003WiOgEdAIlB4BTRClx1jXoBHQCGgEpiUCmiCm5bDpRmsENAIagdIjoAmi9BjrGjQCGgGNwLREQBPEtBw23WiNgEZAI1B6BDRBlB5jXYNGQCOgEZiWCGiCmJbDphutEdAIaARKj4AmiNJjrGvQCGgENALTEgFNENNy2HSjNQIaAY1A6RHQBFF6jHUNGgGNgEZgWiKgCWJaDptutEZAI6ARKD0CmiBKj7GuQSOgEdAITEsENEFMy2HTjS5XBOqaWteBcWq2fUy4MNnT+e1yba9ul0bADwFNEHp+aASKiIAmiCKCqYuacgQ0QUz5EOgGzCQENEHMpNHUfdEEoeeARqCICGiCKCKYuqgpR0ATxJQPgW7ATEJAE8RMGk3dF00Qeg5oBIqIgCaIIoKpi5pyBDRBTPkQ6AbMJAQ0Qcyk0dR90QSh54BGoIgIaIIoIpi6qClHQBPElA+BbsBMQkATxEwaTd2XaUcQsVgs8uJWHALLOB3gIwEcCGBOZih3Avw8YDzMoA37LzAfj8fjZtAw1za1foEYl4+lYzxSVcHLurri/wjKK37PN//ChWdURKu310RgnM7ETQAOABC16yS8BsZzxHggRbR+U2/H/wPAQe1xt4WB45K9nfeKfDU1J+9BFSP/ToxTQPQvGdxMMF6AgV9Y4P8Z6In/QaUer3a0tMT+aThlLAGsTwH0EQD7ZNKmAPyVmHosg3+8/3xOqoyNjW9j61IC7snW6XQ+E/PhhVeolhjnAGgGMB9ABMAggOcYdIdp0HWPdW98IQg7j99pUWPbew3wpwm8DKD3ZMZoEIQnYPHVsHBnf39c1Id8CWLh4bG5VcO0FIzVDHzIgZuYv68Q8DQzd5ijqbs2bbrztTz7EpjNb/6I+Vox5/WjCfxZ19juBPAnBt9qjaTWF9K+RYtO2CtSET0ehE+D6H1g7OWePyasG1JDew5s3nz9aGCHADQ1LV+Q4mgPgH+207vW92HN7ftHLD6TwMsd+4mNO4BuJlwTZr6qtGm6pJlWBFHXFPsYmK4G8K9qAPMWMnBOojv+K79NL98NPtuGPPJTbUOslYi+C2Bflb4wkGTi0wd64k/7pfdY4PfVNbZ9EuCfAHiHX35RjwU6dVNvx59U2pVNU1cXm4Mo1oDpywDeFpxXbWz8CGJRY9vBBng9AbUB9ZlEdBunrLP7++P/G9y2dAp74zCtK4hwfIZ0PLLyFrKM1YlEx2NhCcImVJO+AcaZjoOOXxNTxLjWTFVcMjBwyxuqfVFN50UQ6bWHHwL2wcK3fWC6Apb1lSxpqtSd3qStrxGwauyQ5J/xbwAu2G8BdwYdNLwIQhQ/lKLLCDg7uM7xMVbpz0xJM10IIruh3qi4iJzjYxJw6fDgvMu8Thx5bPATxj9MflsCegkXgOhS/01HOsUGmfjsZE98vRfh5SxwFqdezCGiMNhtJ+JViZ74z1Qmem1L+4GUMjcCVKOS3pHGBOGKkbfmXeR3GpRJEAb498x0M4A9Vetk4LeGlVqWSNzx16A89c2xT7Bll//OoLSZ37fBME4AW2eohtqoq4v9H0SoA8DhinWMJWPgTzDo+GR3h5D4ivbJ5g8R7Q/gO2HWHhN+PlrFJ21+OL4jqHF5YJ0t0mTgpuoor/WT9mUEAcs8BxFjXcg5u5OZTkv2ddwR1KeZ8vu0IIi6ptgiMAk1yd4u4LcCSAD0qvg7gQ/i9GnSfYIdYebVyb64WIw5X5gNvtD89U2tK5ghNp6sWkwUaat5mJAkUPpUSPxBMA6VLMrtDGNJsnfjgEpbGLicgDMmbKSM52DgUTANA9a/AbRQcoLaBuKl/T3xTX6Tvb5++QFsRH8O4BBXugl9YvAeBDQC2C+3PLp+ZHDuGk8Cd6mYiHAPsz3OzvnwIgO9afz4HSA0O9QTY1US48eVFds+29XVJVRe0s9nvqUA3gwYvwVxFYAGMA7KEr3YtCmtGqzLFuwVi0moayrn7LgaYDE2zm8QzFtAxq/teSGpZzwxd41U43iVTVh1w8pZC8AGwJagsvNVkPqzAPrE/PFZc1CJQ+WxHtJrQr0eXzJyE4Q4KBAwDGCRA5edJKR00LP+mOMPKcM4qgCVpepQlEW6sieIlpbTqodTb94CkNAP2p+9EA2jvb974xPuk7S98Kq3rwbRFROJghMj1ThGtpgmiyBs/WplxYMAhG4+25su08CnN3XHxaKb8An1w1CKPkfAJRM3cLq1Krr1VNkmJ1ngjjLlah27XVUV34W4m0jr77PfU1Y0tWSg644XZbPV1psPUZyBIxy/m8y4y4rwBZI+UU3Tyg8anLoBoI9OyAP+QrI3/j1ZPW4JwpkmrXqLnDnQs+F3zrlgS2ovkwia933XgWEbWbQ4keh4SlaXwMKorLjPpbYSm9VPzeHRz7n164uaYwdFLBLtFptozue1SdY2trcQLEGsYxsvA9+qjvLlstOwqCdq0XVurInolERPx8Zi7SY+88dzXDPqxQsy6sX0HVr6e8oajRw+MLBBHORyvrrm9g/Dsn7hInqTCBsjSF3Q03PHy85MmTFt3XXYudKtKiXQtZXRrWtlayJHgpjYkleZ6bzRobmd7gNKTdPKDxls3iJRaa/p7+28pliYl3M5ZU8Qtc1t7yeLfwlgQQZI3wWeBbu2IdZGRDcBqMz8bYSBTyZ7Ox92D8hkEURtY+vhBAi1TbZNvgso006qa4hdCKJvOdr9Mhu0WKZe8F7g3JWKYuVjXXFx8Zbzeam+CPhaorfzq7I8krpMMF+y3zvxHT+9cOYi+wcAC31z9nseJi/u74//OWd8XBJE9nchDbDFa/103bITqt/Jtrah9SwiiHuuLFEG9slHGvA8Rdc2tl5JwNqxvhJd3d/TIf7taYggCLlyCHcB1DKOEd9XFd091tW1bqgYG43H/AnEQMi8dU2xz4PteTqGHTMvT/bFxwwMsm20ScXABhAJFWj2Exf9F/T3dv7AD4ealuX7GanIbS710KDFvGygL/6QGwcfgngaJi+TzblsGVIJOaQRSzHGZarKKH+CaGhbQsRCvZSedIqDY0/ACG4HaIljQ/lmoq/z4ikjiKbW84gxfkomrO/v6TwtaPBralbuY1SYgtjGLueZ6ZRkX4c43Uz4ZAvc1ldHjaOSXRuf86srY6VyHQGfcqSTkpisTYC/qshZt+yk7kVGMgkifZ8wemQicec2vz7J5gEzfprs61ydI32mN+CfA1Q/NmeIOobfmrsqyGJGvnlDShAfOnLV7v/01vCdTmnAaW3m25/G2NEA3Z09ZDDwQhRmS2/v7c8EzSOV36UEwXw3LKwMunSWzlPCxcmezm+6666vj9WxQUJ62CP7GwOXJns7/6+KFV1dXew9iJA4OL5rrGyPdnoQhCehuNta19gqLOTEoSH7PWtFU81ekrUKztMlTfkTRM7pkQciqFjS23vr9iCQa5taLyK2T2kvAvQEg+/Omnw6806aBOE2pwXiVdFtJ/npwzPtpLrG1nUAFgP8VwY9ARg3ye4hPE6AyiJxTWNsoQESp7Ds5a8pOwXWN7W1M/NPHadFTwnAa5xyy+AnR6LRxZu7Nvx9wvhIJAgV/Xa2jPqG1suYcNH4RiI3Y65piDUaZG9au2fSvkEWH51IxPuD5pr4vc61eYu/ydppS1CjdDcInxjbHD0I311v5vT8EEDiDuQJBj1dQdaVPT1x+x6u0E8mFXpJAe66WlpaosOpvW8FEBv7zeMQlCNBBaijZP2SbNzbLfARA73xzc70UoJQPGiKciTzQlpPodiXY/6yJ4j6+rbD2GCht5+XATDQKiks0JNGEA1ty4n4dkf7Aq2SCu4L8Kxp8GLZHYes7MydTxygY8c2L+CqZG/nuY70VNvYeoNT0mDgxmRv5+kqp79sOY2NK96dQqSLAGElI743LeajB/rivc62SSQIaTovrGob2k4mssks/XlsDrmbo/phRBTb2HjSniZG73eqPjyIjGobWm8isu98Mk0qjVVSofMnrISSQ8YSgpDhRAypdO/Xfsn8EYy2A3DAAAAgAElEQVR8Vn9fx3VBBBGmPkk9miDCTqxSpc+I7hPE/syS2gLCTzgSiSe7NgqzxUAnMs8NZJIc5TIXmkIsFpYv2c8E+DfCxtxKRe/zutBTxVdyAlSVUsaqyEhel2X/QMBD/9it6oQnH7z5TZ+N8PxkT6cwDFD+GhqOe5tF1UJ9+LHxzTt3gUsIIpSIn5NfQhCy0y/nEmNg3+obWn/EhH8f2/g9XpSTSGAiyyADd++yDFpfFd29q1j3CoGNdiSQzJ9HDR5a2td3j3CGC/xy8ksIor4+digMeoiBt2cK9Lwf9KtQdpiBpD6ZBMFMK1TNVSX5NUEEzoRJTFDf1HoKM4SKxWlhM96CtGnhgwxsGK3m7rBmf5MlQYiLvNrG1q9nrJK8EHwRhPuYcXt1dLfesJtEjh27hw7Yb/gkG/JfopRqylqVSE9uwAMABfoXOOtlcAUBRzl9DWQnuxw/COG1OxppViVTFYKQkRUTQpNereueyUsV5mEt5YQnxcDvidHBEbpr/32sPwU5hBVjSbrnj/twEFSHCkFIjDU8jS6C6lNRH0o2eJOZlib7Ou4PKl/8rglCBaUpTCMuT6vm7LiS0zbjcpIYb584kQvpYn2KIhtV7JUnkSAgJKKKYbqVGMcoQJq2u2f8SDXEQq6jk/pJKdset87VrWaQ3FModEUxieQEqLLBhyI8iQQhPWU6wpQott43LIi7jIaG9o9aZIkLZxVnPHGCv48sWjc8PPdXQZfmqu11p1PZ4H2xdkvjKuMJTDiAhGm7ytotdINXyR9gSuvVpbz7HQajQtKW/R1EtnN+NtABADxFRJfsO9+6z+sEpjLJQi2KgAuw8GEp7NpFbJgkw/hcsnejcF6TqtRyCCKPTU5CABNEak0Q3rPBL26ULJd6OI8JuYU56E+ilLrM7StQyGYg8k57gpCQjcoG74ebSn5NEIXOvCLlHw8YhguFgUFwDJX05urnkj/ZBJGFwnaEM3EiMT6fiXETJB2JrClhDjo8OO9y2SlSE0TuRFORQKZCgnC2NBOL6NxMLCJ3xACv1fMSGbwq0R1/pEjLawYQRK5hgcoGrwlCjsC0kSBkzReXVEOptxqJsAIMYXUjCeMwntPL23KqCMLZJ1v1NETNBKwE4UhZmAhHepM9PI+LQRASHfEEUThIwijWZpUtR2WD95Xw3GayZaJi8mgz1ba0H0CjfBQMPtUj3Iozq4gBdXR/98bfFAP3aS9BqI1tqEtmFYLREkQxZl+Jy1jYsvLtlSnr47tCfn86YxnjjHckapd6YZcDQbigoYaG9gUWzCUgfMYjVpLUgU1ySR3+ojXHHHeif4LECiXUpV/YaTAZBCH1TfCwQPIlI5dJbRh/DVm5QmKurn7tYJMiq4jRBrLD20/8FLywVTGfJIJwRxTI+5La7U8hu1RX2eALlSBU8Z1u6aa1BOEHtv32QXT0GqetuUgvs0ypa2g7E8Q/HCsvhBONyOM2bVT19ladLEL9ELXMmyaGWIB0U5ZIEG4fhsBqcyxDMDGcg/CYpQqzm4CDs4UVuhEWKgEUIb/MNyG0b4cbuyLjQnVNrUK6FCFkxtRQwlM+jFWXL1YKl8yF5peEz8nrgCHzSBfhVxJ9nZ9xtlETROCS90xQ1gSRCZMgQgssFvdnDOzNzCe5Ham8emdLFKb5czAOG0ujZlWhbPstm6QygkiHdjaEGqwZsEQk0kgE1idVQyTUNK94r2FFxLsWY+9HyDYfibOXZ5BCGW4qJ2mp/Tn4fphYERSOwVlnhmgeIGDPXaq1P1rAHwyLb0wk4iII49g3GRKEqMxtogrIPbu95psKdnY9Ir4YW8eCSUR9XchAojq6bZWCR71ddW1T7DRiO3x79gulMil0gy80fxk4yoXCq1CCyX97nvqcZU0QqgvOD0b3Ay4yR5pCHLEkpyGpp25dXWxfRKkLDPEimfikISwK3nxyw3mEChchiZEjzS8Jc/CGwcaxfX0bxctdSp/Ev0XqMDVZBCG5WxlhppWqDlXS+EISNVVtQ+w4IhJvCqSNEgh/Ropb+vvj4hGcwK+Ud0CToWKySc4drBDhw2hLnPpUQ21oggicZekEZU0QooE5Irt48Wxk9FiVZw09CCYneJgk1srILu/mZf29cRGXx++TO74peuqSYiA40QAJwUDmDVpIsDV5hE25ZNDQsOIDFkVECJQxG36h/x2u5piKo2I6plBUOCo5Xwf8tTkyeqR7bCeLIKSB/RTnm+2rs9uOm5m5zTlhZFKexNFQhLg+LdHTOR4OxGfW5RAMEMqzvFAJoBj5SxKsz0OKLVQCKDS/4l5clsnKnyAkUR9Vo4ZKQn5LY/jINl+Fzc77lTuPOwxJeAXxIMyX+nvi/x0QKiQn5LdXjByPYH2B8avskNW7vf5NMM5zOCP6naCFPvx7YPznxJlNN1dFrbP9XvgSGzEZdJUzJEVaosKaZF/n+F1QpuDJIghRXU1D7AiD7GipDgMH/z75vRIoD9Yngtrtsx7gkxzYKT3Q5BE1NnQ4Fa/daLIkCI9w3ykGX5jsjYuQLZ6hc7zCfTNzuyy0eKEbfKH5y3LnV2xU2ROEx8nM71EacdqeQxFay8BXJix077DFOcHnMvjdlTKMtW5vbBEmIVpR8RUmfFbqh+FBEB7hFew3hlOjo1+TSUX2ZXvF6LcI9pvF434ShO/393Se715IHgQhumNjZkaM89z9SV+CW1e5H70JknA8pADRpMcZkTUyh76aptghxCQC/U14R9qPkCeTILzedvB6E9znsSV7CnldUjc0tDdZZN3nDHcNwPPxGpu8mmKHGIz1rseWlMNWq+wJk0UQtlTs8WCQ1zwVRPzCS8YyIv6fXO9z71DzhW7wheZXwb1c05Q9QQjgZOqMDKDupzojYOsjIPth9RwTV78nNH28g8efmQQiDP4oAR9wEINJjB8w2X4Y6SB8PlZQ8hOqnUvU82cQDdhPgYqnJplrABJ3Fs5XukTap8lKHSN7W1lCEKMADAe5pGP8gB5PYyguzG283E56nnU4J7PP85xCgSliZHXbT8KK/lj4mNRME/QMDOv4/u64eBUu55tMghCVe7yUZ5Os4xlMcdp1z4WctvtYMXlIYHYROwH+HWBkXr3jdwhtK4B9ctFRf4NDZROaTIIQ7SnGk6NB0n6hG3yh+VVwL9c004IgBHgZ5y3xQI6ql6kTcxWPU/HmwtkhH2e3VTewUjeyERVRWv85iCDsgH1NsVOJSbya5SYxlXnyFBvU6vVYvYQgNhDodcU4Vpn6ecCKmieqPoiSPgnybQC/W6UDE9MIcqAT/Ry9JpsgRPsOa4nNj6bEe8zO19sCe/cSMdY5357wM3P1eFkvsJJMAt/oAKqFuNNNNkHYazv9KNh69zOiCn0Q4Wc6R6r5s373XoVu8IXmV+hH2SaZNgRhT6SW9gMpZd4IUJNC0D6RJUVEt48SXaAStE9s3vXNsY+zhWsyp2q/gXuVmf8j2RfvbGpaPj/FUWG9o0IQdpmZdy5+Innv1qtOEQr6Rzxa8eWBgVve8EokW+D7zefTX3jFOJuYRQjvt/l0aieIv4EUrg5jrirKy6jCvkEQjn1KxGer1sxUxSV+/ckcDpYSMP5sZUg/lXwJJlzMLO7haGQ1UtYHnW0N8oPIxBg7a5eUeKnjzZOgDUNYO12w3wLuLHaE16kgCJuQm9v3r2D+DjOvUAufw1uI8PlET1y86+0b6r/QDb7Q/EGDWc6/TyuCyAKZjltjxghYAZDYlJ2i99Zdbx3/hUAd5mikQzUktHOQxuM98WcB+shY+bbKhP9IRNdWRviu7EVszgRS38BoUWPbe6PMpzLhKFv9wtgre0IE8AoBT4Nw03AV36tiHeS3wEU7R7niHCJuA9vqMKFWSqszGD+xUpXxoM06aDLb6plhWgrGagYOATDfQeb22Ii6VKPTTiVBZPuavjuKnkogcaksnAOzJLt1l1/LI0y4Zv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2FRjekLG9UgnDPWHFJGG1d00YGnUsMEbaiGN6hNNBeF7VBC2LQ6hDme9v0bNobl3PebyDoEj5vd0+4IUeRxY8sW/xCUFskjnLKO+1i2ZKdztsW8wEjqURSvBPaWSio0eW/VySPUVzgPWtR+b5ux393roMGIoiw6q6pRBD5DWVuO8to2RPMO4N4BoE/7wprIZOhuhFESG/yULPGmaioUWV5kxKEE8222IK9DDYFm7rCWMhNNsMs8LJRC/u9HYPpZRIewOISPkxa1SeI6IKdd7SWeqnL/GIxqUqcxFtX6LxKl7qaILyRrJAFTRAVYG0sFZPt32NiHpi+6eGgqTIlNEEUEzvVKMsNQxBi1GXOKF6XdGEXeLdUVfv9hoBpOEeYhwfE+ylWK6y0bmyN8uky81hNEJVzXp8giooHtcBxRQQn6wmihg1YDoxVILzPYRKtCWJTEkRPz+xt1uWaxSXlvus9YpsA7Mh5fZqwkKnpkYT8lppRVrvAFxtX6/d5tc3xrety73QTYS4YIgzBLn6dJ9DC5ujq090ObPUgCIlDX3B0zSqsMVQHV2WB9ytL5ftGPZa7+1VLLKbNQcVkRx/YYu0lYJwZoMIdBXgVg1YYoCHi3MPr1m33VHTamr1c6VAnkiB8c3Grzg/3e40qy1WdIKb3LHhPcy73B4D2KnbUywksLGCSha5MVVKvBb4eBOHuWx4XEeeFTxCxlCQWW1IHNjdBVHPRKjHHfZkNmlX0wt5r/2O2fNc7Y3c4vZOrqUd1PFUW+FoJQnxfkZOkiiN1xUVkFWX49UUTRB4dmZmy+Lsk6oD4sx2qhy261SJKbxGd9rzTZ8CJd9i5HOaS2m3AQMA/YfF+w8OJDbGbVCdFwHuNKMtVEUQhPlGiELyrOPpKHsZBWErMwaSCFbRjDqqnwnIFCAwIF1RmmdC2HbUVRbNXOS1s7ElCqLDkqbwIq3SiCaq70puUHx+PRmc5Q5pUhGdX9AoPqlv2+8YiiAqT2yr6VIGdJoiKIZ2oOwgPM/KXyOJ5qn5AE0kQnZ3xz8CgBxh4TwEUZcfFsPOmEWW5KoIQHa/0DMSoxXz4SCrxQFhgyhZWl0MJAGmIBcmuLFT2OUm61AqCKITLECEfZomNDgPbM/ORRcugoH7aJwrTvAeMvUvvShYfiaXEP0yDZ7mDsvnUJ0JgXOMMGcHAdZnkwIlO/wxJSAOluFKueovhOoS3bt5DnK0HWpteu92pOttoBOE2UQXKTk5BYyQiL7mxC6vWCapDnyC8TxASM9LQ3v1uH6D1wS3rpmKSaUsQIspBUTaEx75l8D3rw9SI6LSPEfA3Yr4qlUo8X3xHsmnd5LJcPUF0xjvYsD0Dt9owQXhwvBWza4jcSh2x3p+B8U1HmRU7YfGb1GqHaa7KPYj0BCQRqnroBVWOjRKCCBUuQh5CozLWSy1B0YrjIYkrI054V2SSAyKvROnZWATR0RHfGVEaBOPDxcqd5oNBi7c0ZL0+QWy0E4QkjlLoRVESX6xuBGFHrK6MX/Y8TJ6VTieeDpKvwu+SGGaVG5lGlOWqCcIrLO16M9XbYPLJAZFBpbh2xnrnMuOmsqicwIXDyYHvuz+QhWJQZfaurvkxi6yl5eQm33W4vRv9IjG626jqTSyztWbgfwwru//w8B2vBgihhFQhDXZWSF+6CESHO8p8FcSHpocSy4OE3Y5qmdvhCrZTXpaeUYZxUCa5eHBTEESNE1g2cRsr3HdIsppsVkzuU21YHX+YuVza5MR6rwfjONUNhSzCKkBXj49ufZpKStx8Xg1LbKZL0WoBXtIS3fIo171KLWQ0IbJcNUEIcOUdF7/wSiLj//nZ/jsXk3x2Mzq9EBBrmuM3P6auVA0AgYtdYQcsooS6E8tIdx2d0pOSmnBILt/KnNdKR8uKgIDFX+imlqj1dZ/IsdTR3ft1d7Yxvx20TNgVwoqLBslDi3tEGt1YJwjRsK6uuZ+wKCLiZQlTx8LDg7koFjwymHjFg/i8swSGXJSDiHUqqpiCYkSpjr9ErQIwn5tOJX4SFL6mMDdvKx93ezR81c3uU32QgY3HxiowU6S9RnbE340IiURh+zo3VV7q+EaT5ZoIQnS4M9b7FWaINJduL2jx84sM3EzES1oi2acGB+9cWwCJpvcs2K7Z4j3A1jFgzHcEwyviGJgdrSL4nP0lPUOG9RV3Hmjbf6H1jV4iFqEeZI5uUoLwOCl5Jm8pCIWc8DwWUz9vTa98tiJfLTVlf+RO4hN0wvE4BYhmrwHz2bBwqzustE9uXE9CVl0gvBbXkN97JkGS5QS3nbHkyZbyzdEEUTEsEqMQ3xwVquPnkZVylIAL2eQrZCHO80ml+FwGi5AqsnXH02JKdKwysCWehMmH+6mMfDbDSw3GWalU4q8u0HzyvftuMBtKlmsmiPwlX/xMAgnGlw5W0A5L8rtSHmJf72DGszDwsFdaRhHjBiRyEtvxUewF0gLvN5JMrHC3R87q9lsmGC8wIVNIhxgBW58D0cdkJq5eqhwJQWQBGA6b8LI0k4D1aYCmS/AOPEGJRksT8mzotDMNqEjP6FXXKBN/OzOUWCgbX9UFok4EAd80qsAqBpL2GBF/KjBopCaIimGRXtbmyfR1ML3B4FyEjZNSqcVD4s8hxl+uGsm34C2A/wwYheRcLDZ2ImjmDq4GvsbAurLQ8D73kRJjDVGcuDx+CSCRJW5Zc9O0U9xmtTIVuKMdJRlj8FYE7CPNJ09IR5GbOzS05GUv2W8kWa4HQdhi0tYV33d98ncR0M5xzK+CGoDXmPkbQZmaiiVXl+g8r36ImvRjhy7S92KrvbtXOAWKUCAOPaJy/14ig48ZXpZ4SPaFxMx1kEAPMyCSCymSLj0Dg+b5pBotqzpvXkhXAxDhQ8I+gQnYQywQ0rqr+d7+Jmf8AuBjQnRIpD9dyIDYjW5rf6cJQgaf7K6r7L2Cs6wdfC7M+IXISilpFw9xNHKskbXOd6Ys9UqUJArw2fAVyveOptwZix/MTOKeNC8roR4esaLmPK9ERs6iGkWW60UQdt9Ep8ZzdAID3wGwcyjsgLUiBy1nmy4ZGbnFTk6u+ogjZ8S0LiOyk7v7BdPLrTdV/UVrlM8Xen2XLjLQD6K9Z/5ulDOvAyimELRPND9HRLdnic72C9pXQRCMh6xc0xFGU24mwNcGxH6y8+KauaYLwuLmCG9wqep4eam83GMVZoGQjXO134cL2cAryTKONQ3LKvPE1QQhnXqy9JnOF526/LDjV1D7XUyAuFNT2RT9nRnn7fo+vl3EOKs4Ffj7w8jS55a6EnS/Yqu4mC9l5rmKbX0LxD9EDlcGZQV04tkIslxXgih2zk4atNrYg9g6BEwdgJ0HYkeX2kUcH58HjAfJsO4ee3vbIRWLAB/SoLZY/OMG6BtgO+H9BwqDJ3a7zzJoiWnQr5wLdViCKNZtE5JlxgmYC9CHXEfe1et3sH8nUL+ZjfQ78zF4tV1GEMW0pvm7hvGT1t+tHOsIXjYK5pUwsCgK82a/46oKyRaj6kZgnMhkdQEkQoYUjQXscWLQUgt07fJk/9+CLg/D7iDrSRDFsuzNikmzmfmUsuiftkqElzNoYXZ0m/uEzOlgfXnUvDydneOTNygxvsxsnSRRpZYSQoUlCOfcipqmKPtgAHs4Eo7Z83h9Xpb7GbRo153MR53BLyUm3G8abBxSVHnJZKwtFt/TYBLpc4U6yKm2khqTuMsQKV4jTWYfg/tc64AJ4BWAHweM61qi1r1BKYr95ummlOUJIQiVRUm/swEBP4LQOGkENAIagU2FgCaITYW8o15NEA0wCLoJGgGNQAUCmiAaQCg0QTTAIOgmaAQ0ApogGlEGNEE04qjoNmkENAL6BNEAMqAJogEGQTdBI6AR0CeIRpQBTRCNOCq6TRoBjYA+QTSADGiCaIBB0E3QCGgE9AmiEWVAE0Qjjopuk0ZAI6BPEA0gA5ogGmAQdBM0AhoBfYJoRBnQBNGIo6LbpBHQCOgThJYBjYBGQCOgEZAioAlCC4ZGQCOgEdAIaILQMqAR0AhoBDQC6gjoE4Q6VvpNjYBGQCOwWSGgCWKzGm7dWY2ARkAjoI6AJgh1rPSbGgGNgEZgs0JAE8RmNdy6sxoBjYBGQB0BTRDqWOk3NQIaAY3AZoWAJojNarh1ZzUCGgGNgDoCmiDUsdJvagQ0AhqBzQoBTRCb1XDrzmoENAIaAXUEGpIgurriH7UM+iYsHADCrgAihS6tBrAKoO+nk/1L1bup39QIaAQ0AhqBsAg0FEFMn/7VppZpa89h4HsAoh6dMZnp0Eyq/96wndXvawQ0AhoBjYA6Ag1FEO1dvV8jwpWOE0NFTwj4Jyzeb3g48Zh6N/WbGgGNgEZAIxAWgYYhiOk9C97TnMv9AaC9XJ3IAXgJoBzA4lTxLysb2WdkZJFQN+lHI6AR0AhoBCYIgYYhiLbu+HQD9ACAbYt9ZcbNnGs6dWTkljcnqP+6WI2ARkAjoBHwQKBhCMKdNIeBF6Iwe5LJ25/Ro6cR0AhoBDQCGx+BhiUIAA8bvO7QVOrutzY+LLpGjYBGQCOgEWhcgmA81NLEhw8OJv6lh0kjoBHQCGgENj4CmiA2Pua6Ro2ARkAjMCkQ2GQEEYvN2SnH0SEAH1JGinBDemjgePF+T0/8XWNZuguEfQrf/z1KudjQ0JKX22LxPQ3GTwCaBWAaCK+DeTmDFmZHt7lvxYqrs151zphxxHaRpuhsEE4A0UfB2K7wrrCmeo6YhkxY1+TWbTviV46z/Ir7FcI5maGB/xDvxOPxyIuv4ABmnAqiGaX6FNosMBg3aTYznwLQpwD8GwATwCsM3M/EPx0ZSvwFACtjrPiibPwYOCyTHPitShHVfi/wWrUae8IyTgR4fwC72WOcf94C+HnAeJBBi3bdyXw0kUgIPKp5aEZ330cM8AkEHFZWT35s/kqg/tx49pbly+94XbWC9ljvd8iWzfxTxKyt7aitqCl7HgFfBrA9gFEwr2TCzdZ47gZZHcJvKNq6pi0C40QmjgH4QMl/yG4jniXG73NENyxP9v9NRQ682ifamm/j+EnEOBpEHyvgboLxAgzcZ4F/Xou8if60tr4xnQlxBn8BhN0c8080YRTgVcRGCoxFY2Nb/1F1DsrGZ++Z83eNWGacgLmuuS7U2k+B+Xe5SOQ3jyxb/ILq+Drf81lLRgE8C9D9FllX14JZNe0K882UIgiY/AVEaDaASx2LRjkeTF9Lp/p/5QYpLyzWhQQc4+Ok5/zsRQBn77ITDwQtQl4E0dnZtzcb1o2APdn8nifYoN7Msn6x2IuHOrr7Dgb4WgDv9fnQZODG1iifXm9VXbULfLGt1XzfEYt/AUzCT+aTakLOK8nAqcPLEn9UWRyLZYoNBjFdQ0C7Qj05Yiw0c00XqFjbyRZgMoxVsPg2gD8or4+XtkS3jA8OXr+uOP7tXfFeIvpPADsrtFEQUYaJTxwZSjzp974HQSxVlDe7Hgt03PJk/1Mq7RLvdHTEp8HAiSD69wB5dhf5GoAzVOag80Mx15uYL2XmuQpzPQfQAEzrG+l04v9U+iSINBLNXsSEUxTKVx4blbrr/c6UIggCrmDgx57kAPzDNHjW8mWJfziB7JwZ34ctugnA+0ICrLQAywgCFj1NxNcXdv0q1T5JVu6g4eElz7d3x88kkNiFenmbu8u7DSYfm04nxM6lLk81C7yz4pDfU2FBvM5nbL36ZRJw0djoNhcH7Tbt09zLdGqADHnUQ8/AoHnpZYv/FGYBJuAMBk4GsKfHdyYRHT081L9Y/G6foF7C2SC6yM+h1KOsUSb+emYocYMXYVYQBPPhAnMiCoP9GiI+Zngo8bsgYWvrmbOLkYvcBlBb0Lue+ICuHhvd+oyg8S1srOYBfE2IeWdXy+JEYdBsxyZN2pz8pg+Lvcnes5dibp6dTg78IsxmpkrMlD/bZATR0zN7m7FcyzkA3p1vLYvj8ZccLX+Jgd8TaIM6iK3l6VRCDK5MxTQOYMwx8K8y8BCB3gasdnuXTrQwPdR/unMAOmOmjklYAAAU70lEQVS9c5khyKGopig2wQRBEEkKTGME3p3zO0qhxil7mHBPtoWPXPFg4g0Z8m6CIMLdzHZZQpUgHhPglYCRyQsjf56AT7gJgBi/scAPuiarEKwUQM8weCuCrXIrllvqi3ORUZYOnxdDLvAVJYX5viMWnwEmobpy90s4Sw4DJHaS8BmjcWY+NpNK9Pt0iTpi8bPA9CPJwitUV38GjCfs74k/BcZnJDLzKogPTQ8llnvV416A8+rPkhqzNJaFBaYLwN+tbGTfomOoh7zaah4mZAiU9xnybuMahnFgJrl4RCqrlSqwnxDwVad/klBdwcDDYl4A1qcBmi7ZrARiMX3f+NYt6yjBwH6utthqUgDLi2MLsDgpdwLYQdLucWZakEn1L/GTbZ+5nmPgfwn0qD0XvbF7wormDhwZXLJKVo+PnAon36dBNJLHjN8LwkyX+iy/DhCfmx5K/LRRSGKTEYQbYPciigArJskdxIbFEHQ5m9YFzh2zOFbCMLOPDCaE4NlPx8z5n4Vl3edaeEwiLI4gd7a4z3C20969vUy96yfL5e6jMIEWNkdXnz44OCjuKsqeir6V/3ynafC33KeattiCvYjNBAF7OF4XE8cC0CT0sQRcyCZf4exnYYd5PIh+Xr6A8b0wMbdep4gwC7xsMql+39NzfOtY7u1bAJpTLEfs5sgw5qeXLRbhVsruV4Qeu7l1zbEguqyczHl4vBUHeZG4x+LxGjOdmV239YB7d5qXP5xWUIs4Nxe+i0gFQZTA4RGORuZnBhc/W/yTqGPUxPuLaiFbp93cdD+Az23AlAdNAye45Uf8Lr5fl6NvE3BB+QJOt7ZEVx8nlVUXQZSPnVxlZ7erpek/Ie4mNgTWFJ9Wg4V0PhTbIQJ5mkQLCfiiq22+8u0x1231YC6bvdB9x9PZecT2iDRfwczzyvpE+K/00MC33HLX2TnnA2xE73GdBD3LF/P0+Zewj0HGL12njVFmnp9JJe72I7uN9duUIwgGrsuObnNy0HGzoPdcBCJxhC4+Ssc8j2PxqMV8+EgqIbzBFQmCrh4f3fo0r7Z2dMcPAOguAM2uIkeJcMzw0MDtHoJCHV3xc0D2brj4vMwGzQo6IqsKnuoC71We6vftM/s+Thb/AcBOhbJeJYtmDQ/353fzHk97V7yPiG50YDfOwMGZ5MCD7k/E5iFqWb8H8HHHb0/C5MPT6cTTvvV09+5LwC3OTQYDF2WSA0KfXmEcICMIW30RNb7kJAdZne35uoTapigPTzhPF/WQBR8CG8xFscC5wXLW56X6EpuY4eTA991ta2tbsIPRZIqxKN0nEVH/2DtbH6M0dyMk1GTxYrl+jrU9PT3RsdwONwB8pHOuM/OXM6nEgNdu3d5sTHvjSoDFCar4VMifKH88u/1CJpwUpnzx7t498R2jOSwCqMfRl4w1nj0kjPGD6rwN+95UI4g3yeIDhocT6SAgOjvjHWyQOD1s5RgYz4ntLq+jI/5hREgsXO8v/cZ8FywscO/SPU4QgZO7u/vIbU1k763Qz3rsYpxtlCysngtkEFay31UXeK+yVb9v7+o7kIiFeikf8l3RP8beAERwO0AHFttAjEuGUwPnV4xld++pgB0ksrQIBKmKnGV0xnqPZoa4TyqGpZfedYlvZAuw1yLqbmd7rPdMYvys9HeHVZ/fGMoWY2Y6OpPqF8RW9tRCYGJBbZq29lcFS6xiuVI5l5CdEvEXC23rincbZM/fLQt/W0sW7T883P+Iu0+dnX2fZMPeZGxQUTKfm04lxD2er4WfbPPgHi9J+aFURZK1pOzeqZr5Wa9vphhB8EgETQcmk7euCQKovbv3cgLEfYSvIPuV01G5sKyxwPuNJBMrnN/JCEJ1UeiI9V4PxnGO8qR1uNspC34Yxgw1CD/VBd6rHNXvK7ELMcax3vOI7TEWOUQeY/BdbjNcoQdvXod71pscCv22/fidAGT9kZUBD2s5yQL8tsV8wEgqkQzCXPJtoiX66pEyVZGrLOro7hUENgvg5xj0GGDcKLuH8DhBnJZODlwV1D7xuySmmsnMc9wqk87O+Gcsg75M4M8D9AEiSjZHVh+t0Be7GaryI96V9OkvOcP4kqr5amd37/cLKQjsugl44F9btBzx+P03vS3+7/7dtuQKeQJwlwFUWK6pwF/3d6YUQYjgfpnUwLFBuwLZztxrd+mHeHf33A/mEBkk2EmNCqtLpRmthCCUd/OdXb0XM+G8De1QWyBldzSTkSDyViEs9O7bFDBQtkpSmS2SBU2JgN1lV44TpIu3ZLH6hxXNzfS6+CzbaHT1zSFip1ox0CpJBYOyOirvIDxPQ7KyC3dGCYAOcRDuFZnkwBlh2+L3vipByNoDoivdxip+dYnTChHdSsCrAB4lokHOWXcJTYF0njn8nFT77D4RNUosuqlFEIoDI3YvMOgBBt5TGEDlBds54HLh2+DMV3y3lkCElQuK2s5iqhCEdHduA8srQbiWI5FEZnDxc0GbAq+J2t7VdxQR3+xYzJ7ibGRm2HDy7RWLNz8+Ho3OWjG46J++C7CiykyUMWNmfPeIZas1d3eUKSzg/gTGL61cdGnYdrtxqeGUUiqqPX9yu7j4B/eOW3XRrAdBCPUaNZnLnMYezDQ3yOJJtY2STWJVCc3y95rRZY6xrWpNUm236ntTiyA89KoVk6Dysq/qC9yKnaNkwktOECWv76CBkphFlrzJ/b6dKgQh+ijR8Zd3PW8qej8Di7KtvMzLUkmGl2TnX2leHTRIecIqM9P22gHWuABTe3fvDwpWSV6tWgXCUmbc3hrdIulwrlPqRYUfBOH8zNDAJUofF16qRd796sl7Wr++h4XIYSA+quBgWrz3KXmlO8uQnBA97yrC9LH4ruQuZFyohwCjbGMQVDYzb0Fke+xvuBNVXM+Cyq7l96lFEIqhHuopwBUTXokg1NREYmA1QQD5VLRvXM55a5LSguAh+HmfEsINOYosDtIzS+54aplPzm/l91FuFY7iRXOxYHGiahqjW4lxkEJDhf39CjB+bWZzd6pYxVQ6yoXfbdeoLqHpPQu2azZzH2QLuxtEwqT3swyIRGIyH4gSDDIVqltFWe+MlAEm7ApD5P0KK2pEaqok4GNNEHmAlHf0bjwlO8KKssL6eDjr0ASRR8PPByVAxp8gogt23tFaKguJMtkIQvTVttCK4jQwfTeER7DwockwjG9nkouFI5/UescvFpPqQhT2Xqdg/XQAMc4CYe8qvOXtpskIop6bQVn/NUGoSkWN74VdRGtRodRTaCR3BBWWVGH7pgnCW5hKiwkgvPBFeAaVcCOeIVEmI0EU0bEd4UzMsxfWfDyvoNOV+DQnLOjGRrf5iczfYCMTBHXOjH+RLVylEI/MKRT5AIFknyhKToqaIGpchCWf6xNEvU8QKiqmEBeT+gThLfTCSGBd7p1uIswFQ1jN7OI3RWTe7hUEEVLlE3ZKVjueQfXYqqd1NJOABSDsLwnjULbAMvg7mWRig09F4dd6EITEx0F2Qhemt1/3DayZb1MhJz1WgFj4Nz3cEtnycdN8c1t3NGgZQbjVXRtBxVS1NiJojDfF75srQbg9Uqu+pHb7U8gsNvQJolK0Vc0Uw0yKvO+H9cX1Ib9PAPAFWawktxd2Z1fvr50esBNhcVOPE2EYHISpflfX/J0smAeC8BWPWElyBzZ3LCbCtzJDAyJsifKjYtHV3j2/jWDdWxbjKR+T7E8E4zpYWNbcbD3rFYVYVX4m+pLa7chZbwJSBn2CXtw8CaIyfENVpml77X/Mlu96Z+wOZ7AxEVBvODXwlbJFobv3UAI2xFaZAieIWh3xJKbGUh1ytXJv5y6IZq8isuMDlR52LXgS7+SnkeOedDohwrnX/ZmoE4RfQ/PewKYIK18K5yACwzHToZlUv1ikS4/kBBHah0Hiu1MWrtwj9MVbAJ2YTvbfpmKyrEwQleajCGvmauddydGS9V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vPRIII85F5CVZy8g5u5hrSyCE0QZSH3pCqmSRmza6P2lJVq+/KD1hAgoeEIAI/ZAbsVVosHl+yn0mmeHCeIjCP9oRvxl1k0g0TE9v/0u/b8Qu14TfuMGt3uhNE4ZC1iIhvCOA9LopvAmENs3bDHrsaD4chZj9cq7pByE2ygpkP+g3M+XcpkYS5QYRUXYQdn7O8IghbrJswN4g6E4RkHUnVTOUxnNy9r2cLQYg1LvwOIoZ5KZHld1Du8yL/cITD44+jpF88OLhGOL+V/RRBlGPSnkjuS0zCsMKZQsFre3qFgO8auZbLvUKbBN3fqiII0Um5zhp1Oc3MeIJAuPAObgKUxIOqGd5hTmEz9QYhxl1mmSRRMzn1wF6mt7OJIIpyt4jCNM8gQPhuOBKEua6OZ0njZcPr0g8GOQAGNaUVbYVZuzPhBmHDh9oTyQ8S09kEHB3wRiGqP8YapdxCmzSMIGJdqQMJ+NmUm3++56rc+oOeMNx029WauQYFz6tcLJE6j8SbxZbfn6KkJ9xOUEH7LHsARu0IOcxHNpMJoswU1/H4LHl09vRKrXbDCSr7Yrm3SsXkMk6K9SzZk3J8CDReDsbHfIL4bYKmHTqybvWv7e2pG4T/KhA+WU+/oO1DBh/JhF5HiBtZA4+ZUX1+UItAWQNV3yDkDkLVBwYLcsKYzgThDM9AwN9h8kHDw+ktMVj810RZiZjToxWoCfEUOypTjYVU+Yh2ygI4TiMVU/60WWaKazDzomIa2/IAlPLQGkXMOjuTH4NGDzDwjsK/Gcy0IJvpu6cCEftWmWYEUTJe4SzZ1vbSPgZFlhGjtxAHqnROkhubIghfsZcVsFT85vgnwOYyMBa53OSqOqxXTRBi1BKzrElmPj6bSYvIjzX5zTQVk+RmVbIJVQKKy4P+/2o8viCT+al4FKz6V3bzqeDtpiw09jQjCGvNOkJvCMfHot+ChIQ9PzKJ9yv84u1UI6jpTBCOeVFHInUwGCJO0JQaSvhQcC7SbU8H0EiCCBN8USanMis9n1t82FhMlawNt4gPYY2GnH3XhCDi8cUfMilyv8O6wdeZLAwQM40g5F7m/vFrvDCReSkH8QYOg7Nk8bumVXVpt8xpLJSZa8gbS1grpuKYy0JvFNRMk63RCYevhO/8XYw1pAH9vGRRIBoRT2dHAv5gAr/XTL7eeetsNEFYGyqbh4OpA8BcBobbopuWyQLhSTfURPIEYrre9reyd7NGEoQEP9ewHPL5OPx8akgQsa4l7cTGZ4iog4F9CwcXkVMkyE98e5cQcK6tcFUahpoQhLB074gnzwVZeaOnfjXKSW21N9MIwiXo1rMaGwdnMrf9Loi0naexWFdKREy9wPbvVd9KnOPo6Ei+C1EaAOO9xb+FOQ3L0s9OR4Kw1myi93IwryjM0zJjZeZxR36TQH4ZkoyHr2msHZ7JrBaZ3wL9OhOp45ghTBuL1kFS09qGE4TDux4egfBkEw3yRvMWEwSYSep17ZyPy3ftaSgS5gZRduAJeYOXGLFMC4KAWwxzQRK5KB9fTfIK1+xc09jMVSwsmfdppaTZkUjOA5NwPrNbjNQ8c59k4xRTCRpXSJxgnCQWzlGuQTcIMSln6A3hlCb+3eZJHjgOlewWHUbWhVhC4s3CnpzpV8Zk7mBnys5GE4Q8PhdOGB7st2XYc+dAZ/gWAGXhVBpJEDLPd3g4TNpnFo8vSZhk3mVLYSv+XDOCkCRgC3XQkEQUrkoFXasbhIXhvK7efTTwnfaQswVwRWCuf4fBq4J4IRcFkl804qGLLgTwrrIlON0JovOonUyt5X4C/qV07PywSVhuz2vg9nkVdIsCAxFqfMfS2wNWZDP9Pwx0PA1RSK4y9I0HQ7F4MkVkqRKmwoRb3U7DNwgxLKejpxVGhdkE0ccL4w6T20To278Hxr+WQk03tUbNL3rlChYHINLociZ8Poh8G00Qsgi/eecsXjAymF7vtbTkIb/LveUbSRCywI1B5uOR5S0UQXhl3HRJ4RxIXS8L+V1tds+aEoR1Kute8nGPfMIinsgNmmlcOz7+9idk3pU9PUfuMKG3xBi0nICFbiZzDGRN0PL1Q31PlF8DBbHQHSB8eupvIa9qIfZTz6KF09NqyTx0JtxPzP8zGY0+vGFg1UtFd3nxsUxOansx8QIQHy+LJhvmdFrBXFxyO8jzJovxjuv0bwX1VzQokYtylb4hFPuotr5L3Jt88wFPlcWxuNwChFgfZkRWZIdWi820JCSCmzOUl3wbTRBifi4n5xeZ6czc+Pb9sm9ZzE1jrHQkQxqThclvMEFAcqsRAn+SNPMLzrzgVhj7tldTRCxia71T8j15EoTE6GEjDF7oFs9NomoUy+Zxk3H6u3fDgxJPaersTn6KTe1Hjjzu1ai0C2ekCnYPvyqFnLw3ApTwKfsCQIWQHCw2FuHCX77BlDbim5h7OvhB2IZMsa7kmQQSiVz85uYHbeHvPGpGjaOrsW/268gjxaSo+gwDQyJ1Jog/4mv7Pk1vEGIi5R7TU8h4BvJzw89FFVggHCud6jqAXrRSc25JB+pojp6EZh45si79W1k/bwVB5FWPshuSNcKSVJgAi020E8DO5eOX58hoNEF4hvgppmxlmtgciHBvznsyb1uciyBvEMaYcUTh37xvEPHek0HsvOkXwvmQyJa3bk7LVqcWgx1aKnUNq0AkDsilP8JLxPjV5gO0ldXRGh/hE7Y0vcXyIv3rV0YG0/9dTZymmt8giqOzVCPPkUg2fpkL6/rtUc6/vw6mH5p69CI/F/JpRhCWHAvql6scaqKwGAid+E9YN79YTfrIoJ1aOOqaM9OZX/XXCbiKARHgL68Sm8YE4b5RVB4yxucW7YOfIAc62ulIZq/0FhFE3lAk/HqY2rAYuLEtyqfL1G2NJggxqMrklFe1Rg36LzCWByEIFytPm0jLoyzs35PcJapjVWk2Pr9Pb+rvuvD8nxjb4Vt+MbD8WqwbQRQ7ttQPBo4mFqZX5Yl3/AYorlZM+FZbBD/x0uPa25mGBGENr/Bhn7/50fdzPt6mMlgeI43PcF5//fGrrkQ4oufHydSONzTT1DA9YzHJ0JBYIImgkxcOD/V/vVL02tuP3Y5act+gPFGWvsnIG3XNu+ws/lYRhBhHYT2csvk2fBGAHQLiI/LTn7P7rtzvFkjurSAIMfYQsaVEtNoftEX5fLEPOSyT/MLdUCyRXE5MP5CtBbecK+ImwRH6WiHVa5A1JKZU032i7gRhX0CW13VUP5yJDgTwCQJ2LYktQuIKzs8DWpaIB4zJyAN2Z5qAi1FuEvsWvUHIxixM5cb1N7s00HwGi3zeuzuu49b1M28Lz/ciGllTz5C+QXC13kUMOpKZTwXR+6eutHmZrWfQVbmxHe4VJ5bpHM1VNleJ41RNEr6LvizrvglaAMbxwq4dwC42M9YXNueh/hMYPzZy+lqntZKbXN5KgiiOSaggW1tf/RQIS5nMOEBiDRc3sTERCZlYyxgwr9PHdxz1O8m+VQRRmI8V70gDfQmMgwDsWVAHiyCDf2bQGkOjqx9at/rp4vxDEoRVLf8mQ8JMXbyN2tVvnlnjCje3+QCLJFztDlW8UO/9FdB+Ds28bvedsXHaRHMNsrGoMgoBhYBCQCEwMxFo6A1iZkKkRq0QUAgoBGYnAoogZqfc1awVAgoBhYAvAoogfCFSBRQCCgGFwOxEQBHE7JS7mrVCQCGgEPBFQBGEL0SqgEJAIaAQmJ0IKIKYnXJXs1YIKAQUAr4IKILwhUgVUAgoBBQCsxMBRRCzU+5q1goBhYBCwBcBRRC+EKkCCgGFgEJgdiKgCGJ2yl3NWiGgEFAI+CKgCMIXIlVAIaAQUAjMTgQUQcxOuatZKwQUAgoBXwQUQfhCpAooBBQCCoHZiYAiiNkpdzVrhYBCQCHgi4AiCF+IVAGFgEJAITA7EVAEMTvlrmatEFAIKAR8EVAE4QuRKqAQUAgoBGYnAoogZqfc1awVAgoBhYAvAoogfCFSBRQCCgGFwOxEQBHE7JS7mrVCQCGgEPBFYFoSRCyR+jIxvjU1esLKkcH+E3xnowrMCgTau5JzNdADAHYsTPhlE3zQ6FB6Q7MC0NOTfNtEju4A4dPFOTJwRHao/85mnbOalxwByfr/U5T0xODgmudqjZkiiFojqtqrOwKKIPIQK4Ko+1Kblh0oglA3iGm5MKfLoBRBKIKYLmvxrRiHIghFEG/FupsxfSqCUAQxYxZrHQaqCEIRRB2WVfM0qQhCEUTzrObwM1EEoQgi/KqZRTUUQSiCmEXLvWyqiiAUQczm9e87d0UQiiB8F0kTF1AEoQiiiZd39VNTBKEIovpVNHNbUAShCGLmrt4GjFwRhCKIBiyzadtFUxLE/t1L9oiysQQmloLoAwC2AqAz8DuAb+TcnGtHR295TUilWke5uXNPamltffVTrLFwrusGsAuASEHiLxDwKAg3TrTynRt+nn7VbSX09PREJ/SdbgWQLJZh4PLsUP8Zfqtnbs/Sd8zR9V8A9FFb3euzQ/0n5k3Y3X+SuiWOYLGu1AICfjrVLuHc7GD/t8X/J5PJyNPPU4wYpznmPgbgzwxaY2h09UPrVj/tN4da/12sgYhpJAlYDKL3g/H2Qh+vA3gCzD/TI5Fr/cZWLUHUan0EwWfevKPeHmmJHklEvQyItbBzoZ4lD4DuN8m8ZnQw/XuvdVGpo1ysu/eDMHktAfvYxjvGzJ/NZtL9bn3OPTC5fesELQDjeMe4DQDPE7CRmfuMnL52/frbXwqCRY3KUKxnyZ7QjUUa6FAG9nV83xWNT4JvifOZkKM2J7qcQMcgj+W2xf0E4F8x6Krc2A73bthwTa6SeVr969p8wPwsiObZvo1nQLhLM/n7mUz6D6LtpiKI9vZjt4tEcxcx4VQAUQ/wXgTocyNDfT+LJVLnVOJJ3dGR3AoaTgTRVwG8M4Cgxhj4Eeda/qNITs46HfHek0H8wy3/zqMRtMwfGrr1Za/2JUIU32KwuvFkl0Z0L4BtCmfF4ck2fKZIZm4EMa+rdx8NvJKAmM/cDSL6CevmF0dG0v8vAE5VFRHE0ML8HWZe7LMGRD86QP0wzC+5ja1SgqjH+nADRqx7asl9g4AvFA5DXhgaAA9yNPLZ7MDqP8sKVkIQnZ2L9mQtejfym2jx50kOVj8GfQOMkwOM25IXMa4y9JYL3L6hqhbPlsrU2Z1KsMnfBWi/EG0GGp8bQbz55jv+PqftlTNAEHtKkRTcup/aw/wOgcUGxIHumecotTkqwGU+e5YOpkthml8zI9jXEUlgZnpSi9MLmSxOKR8OKFBr8WpEezHwX1N1AoTa2L8nuUuLTjcycFDAvuzFHmONUtl1feIUV/KreDMqIxaAgL/D5IOGh9OPeI3ReYMixjeHM/3nF+vICEID/46ZbrKFn/CFgYHfaKa+cHh4zV98C1dWgDq6eo8G+LoAH1dJDyxuFBodWSuZ1Gt9yGDp7Ex2sEY/AbBbSNg2MXBsdqj/5856YQnClRyIv5gdTK+UbWAdHcl/QoT6ABwYctziSuwqr7BtOcuLG9+crV/5Jhhn2jQBoZr1W+sygoBhHI5I5EIAYgMP+tMZfG52KH2pH0mIPsd1upyA44POixjXGuCVGpHQIBRDzcw8gnBZoAJkcVp6HNCy4n8YvB8BH7KdLF8GYxiEw4IShEdfYld+CYx1AL3I4O0I6AKwu0Taz2qsLcxkVj9s/5u4as8Zx92bVQGdxX9npuOymb5bPFYMxeKpG4lwnLOMX13JQp1k4DD7puEkCCL8lNm6Nexk6+8ZBoYI9BrA7wSh23Zt3QIt49o5LZtOHRgY0IN+AUHLdSZSi5khSEuoE+0/S7VIIIG1AeKPgPExSbnHzKg+f3RgzTP2ymFJu57rw4lFRyI5D0wiPpJdFvl1T3gKQAZMEwTem/M3PeepdBM07dCRdat/bW87DEEIMozqWAVQj62NMfYgB2sT3urVKwA+yTGnMTA/DtJ+VZBVK4A4GHuXb2o8MNmGI73UtkHXjq0cdSSSZ4NhmZgIAAAgAElEQVTpkrL+rG+b/wBoj1nliVvB3A7Qe2U3VbG5uq11Cb5/A/hRgObbMQThETD9VoxFsncVi/rGBvPAW7QhDgoPim9Xtk4K37tQne9Q6HBmEYSl49361ZuYude+IAh4QNf45PXr0uJDmfrl9Xst/0mwrrXFt4ItBTxuEHndnXVaO8Sx+B5jwinZwf5hJ5O3J5L7EtN1ElWMdEPqjKcuZsJ5UwQBeL4lyN4fbHU93zAKt65fANg1X4cfnYxGD9gwsOrvxTacBGGfNwNZpsjJo4OrxCKeeusoXGWXb15U33dsSpvIpAOGh/vyH1mNfh3dSz4O0xRqMvtGaV339VzuQqfeurPzqJ0QmXM5Mx9dsgYI3x8Z7D/LPpcwBNGI9VGErL1n0e6aHr3HcWM2mLHWjPA5znVfUOd8DYx/LdnQmO8Qb3UjI2nxTmH9ghKE9XYwTmnHTVq0c87IUP8P3E61sa4lPQRTqKOKZG4wcElblL81MJD+h3NZzOtO7h016WpHP0J1edzwYN/qGi0jmb5dMMGTJpunvHs3PJhOp8WbQ8lPqPe0Fv0rAJ/tIArXtS7D19bo6wRcPCfKVzqxsNSnpnldmeaC6IqRwb7T3fDuTKSOY8YNjv3uWYBP3H1XPGCfV34/faWXGZe7aAhmFkG0x5MHaUR32E+Egr3Z5NPti94hV6+Tgms011g8dQoRrnAA3T/Zxid5nWRcr62SDSnWlTqQgJ8BmOO2advn0l72hlCyhXu+Q8TivccS8c1TNSQLzY0gAmAM2amebY/ctfiw84/7O68EWDzoFX/+D6PyU2zZRx2GIBqxPooT7OxKfZ2Br9nmbID5gt13w3dkG1mhnGzdTwK8cGQoLQg2MEFUSg6ig1hX6jICxIaW//lscKJI4Xa9tvSmwne1RrdJDgzcMF6DtUQdid7LwbzC1tZfYfABIyPpP/q0T7FEcjkxXWvfG9xu8B4EIW50R42sWy0OmtKfFHfCH6Fzz8hI+m/OSuIwZGot9xPwL7a/bYTBC73m5XE7nTkEIdscxKnWnMwd7mftIDbtlq1euZqAz5aA6nKDkKp/AvZlLXD5TedZjY2DM5nbflccQ0dH8l2I0gAY4uoqfm+YzIeOZtJDshUTS6TOJMb3Cn/bBLB4vBJqNPF7jjU6QKZbF59lrCslbjbF+RvMvCibSU9ZLBU+5hIrJvFveR1r7uDh4ds3eX041kNtBLfZr87MuDmb6Rd6UE/rqqAffGdn74dZY3EL2nJ7YP7KSCYtQrh79mFZu5nmfQA+OLVXARcOD/V/vfj/QQmiUetDjKu9fenOWosh3g6m3tsYuD43tsPJfpYt8s2Jbm2NvrC8qPrzu0EUrGB+APAym5x8bw6i7EcPXrbN296cuN1+Cg4aKbajK3koYB0GrcMTA09HYfQMDd32ZND14rrxSiwBAawYGeq/MkjbXV3H7Gggdw9A7cXyTDg/O9j/TWd9F4IQt78V2Uy/zUhF3rMTBwCvkEkHDw/3PVRGEIneJczWIbCoLXlNY+3wTGb1oN+8YvFkLxHduOWwatWYOQTR1bX4PToiAwTsUZhsqGundHNxIYjykz3KTl5+gMv6c56oZeauYDplJNN3dflCc5jGMh7cvH/cA8J3phYp0+Jspm+Ns65kk3nK0PgAp2pCdoMIcwtwqszAeLC1hRfKVAl++LkQZGk+D+D3uqYd4me+WmzLeRIXqsl/bN161KP33/SGtRkHzAfRqPVhkXY8eQQRCZkWP3pfPbQdu07HpiEefTkX6R4dXfWCKOdFEC767FCPpWW5Jvzf2azh59VqkQcAEm8TjzBoYwuZlw0Opl+sZO3Y64hHc4rQFxn4BICPgWBE2DgkDPl0JFI3gCFUq/mfy14iJQiPW4BzbpJ9TxqOXbqXoPQw4IWb7IA3owjC+aGEPVFIAXQRatlGF9CM1C4AucDKr8llqh8g3RrddIzzcdd52xB+E8yctputuvlSSDY0aR8SgvC80TgXXNlcakgQPT0ntE3ob6QBOnzLR+mtjy0jyniyi4huJUDchh4mogHWzTuK6smgBNHQ9eFU0YDvgYHFHirVkmmLDcaAJtSYBogeJiDDOt9WNPV1Iwhhey95XA5MDsVt02lUUU+rpGqJI0z9qgjC5RuX9S+9rUgSOkm0EfAzXPH9fmfSDULyUYbWSTpUNFLWd7kWB3JicwJe7utQfmUrezx2OV043h8sFRG3GL/S9Og6wLL8EPdw6Ym9/GQvv6VICOIpM6p3O6193D6ksvo1JAhxC6IWY53dMYtdbkxhPnR72SAE0cj1Ie3LRZVR6ZxlBEGEo8H4CAMXlLzBMb46kum/yE+d53WDKfxN+AndsdmSZmVrdJuBGr0rVApBRfWqIQg3dZRsIH4qwGIdyfukl8pZOufOzuTHoNEDDLyjUGDGqJjKzDvFw+lwpl84CwX+xeK984lYmArmr+uSG4TUUshF7ePXsURoZeqBIOanoh+HD4Ml/Dfb5vzVoeMtWxSS9l0XTpkfhEMd4TffuhJEufrHVRfrN063vwchiEauj0Ri0a46R4X++J+LY641KbroyNeLpzSn5V/QNz87vgVLwrs8nCzzpsmMPo7Q2j12Np/weHivVLS1qEfx+JJdWTM/zYxjAXyyxHw6hIqJCWdlB/uFP4PvLyhBxOK9i4j4tql1EvLbFfUkh7CZQRBSkCqwkCnbACRClX6UFeboDbLhCMGUmbs65lamXrGdzB11yx6fy24oHqf6ajf4aut7fS2dnb37s8b3F220gzoH+n6BtgJB5NXI9VEwb91yQwQMZlqQzfQJk9ea/HzMMMv7CGgUYK8Yjy/ZzyRTPDgHcfAT4VHuIpNumJjY/pd+D/E1AcHWiMDjTV3bLUK8L8DvY6ZPbLY03B/Anp7e+mEIIsR+EpggnHHmKri9u3l9T/uc1E1EENIHJom5a4n6TPb+UIzb5LwVlXlHO8xbvR6dq93gq63v9bFL1F81P91MA4IoWR9BxlPtBulDEMIXYALA1rZ+XmZo87NDq0fD9G3FyzLMS4lwZFDvXgDCWurHUdIvrscmVRg/tSeSHySms4lwhMzpM9A8FUEEgqlYiEKV9incRAQhffR1qi2cD/AOAim5JTitHOyWOZKHcm8zWkewvrBWSIogwq16CQGUyOctJgjhoX0pSLsVpnmX4/R/X2uUj67EOi0fWNE8gwBhNuv0CncD8FnSeNnwurSw3KvZr0LSEv0LIwexx22Jy6YIIpRcFEGEMJv081OIJVLnEePiggRK3hCcD5l2cim3bPAO6lftBl9tfa8V5nzPmQ0qJplpd4NUTBY5TL65w3lCxVMWBdlSdQWz4/eQqRU9lXJ8CDRe7hISxV5dGiok1K5kK5z3yOefbI74/B6fNl7Y7APyJwINmUwDuRbtIRF9oKpHaqVisti1pr+gAgmzydT7kdqpOvLa1JwmokVVkdf7Q3Gu5e8QeT21s3+/kOLVbvDV1veUXRM+Uvutj7fskZpx6eT4DucW9f8uD81ljp/VfPDC56Kt7aV9DIosI0YvCHuVtRfACzvIGOSe2lbNvzFwM6Ddm4vSYxsGVolw41IHzKD7UdA3BLdxB61fCxWsxKS25mrcuqiYRKOOU7SrSafXAikPN4GyUBsye/tKLKYKY7Z7PluRKe1OSvaxuj0m67q5k91BULbJu71DOIjD19mv2g2+2vqeBJGPR2R/sBV23lLHQK+PbVKnNQy8n4A/mMDvozAuKzpIBVHpNHJ9xONHbGtSm7C6ExYz1i+MiWSxTqwr9WMCDgb4Lwx6BNBuLL4hBN2ApGFuiPom3tx+WR0ekqkjkToYDOHZO6WG8vp+ghDD1IGq3ONY3Jh+BJ3PCupfMt0IwmnEASCUQ6XARnJjnUEE4TRR9Q4tIVsvznATrt6PjXSEKg5U4sloqZJg8rts8ZqkITLKBct3mbno57UWfc1UtNgA3pvVbvDV1vf6yGvhfyD5ACrS+TdyfXTGUz9iwue3YBMuJpHU0crmzRyUIMR71qS+8+UMFvlXir9JZj4+m0mLUN5lP+vQw+bhYOoQZrMMDLdFNy0LGuE3lkieQEzX2xoOvek5B+WSrCtQyJ5iWzLiDuNJHTTciOgvqHxkfkJuURncvjOJ1/7MIQipp2AIU1cRJTJikojjk3cqE78QoTaYaaksjIUb2LLEPn5hK5y6XuEJqYH3tUV8lfowSDbPp0A4C4wfb4nS6O92X+0GX219v1OgJGjdY2YucmAxbIRv/bKTY2lE2yA3CNGHLNRGvdaHM1SGeCANEyW3kENCBOfbroBPyRoKugFZ8+5Zshd0874SZ0WRryGqHSJLSFS24QQ4pNhlGFQefnK3/93FMzmUI2yYsD1h8JXNI0T98gNwCFNXl0CYM4cgxHZeVQTGrpQI+y08Q7f8Ghusz/fDdj7EMrCaGNtO5bDwELhTnUSEe5lxRHGyQdzuq93gq63v96FLNjsgoF2+PCZOaaiOoBtSnYL1SdeH7GATPFhfT3Qyt9NVjhtISaiOEBuQJR5ZOGkCXTUn+sLpzpuBPH4aThge7N8SVdhD6JITbSjPflnTMkfHMCpkt5QDb/UNQsxVEtjPIAqGdzy+JGGSZa1WPEiIJmcUQSAeX/whkyLCWcrmcMMDehRLHxpIP++y1igWT6aIrKtqaYIZj3wQsnDOTLg718rHVBLu2+0jso9ZsniFOZ1ID2qlCPV6ZC7zEi8FI5DbfbUbfLX1/QjCLdw3EZYND/ZPeZE627FyVjyLc0AkwkS4Br0LShDWaVoSDr5e60Ma7pv4KyOD6f/2CHshW/eTzptOWIIopFddBaKFNpxFyPUlzujALvLaBOIFI4Np4a3t+nN5SJbGEPNbN/a/u6gqXW9B9rrW3KP0PbCV7rUkv4xb5OKw+DrnEqa+i2xcswkW++roSL4XEStyrj2F7MwjiPwtQpYFih8nDacNr0v/0v7BCHDHdfq3ws2hPG91RQmD5H0JNOPx5PsNoqsI+JRD0BvJ1D8TIAVn+TVxS0PS94fin2VRH7dUDaa3rnaDr7Z+kA9dfkiAyE72n60tuMJpmy8scCKtLd8FW1n4tnzUdUsYVPv14RLnXyTeudqczH3VGe7edd1XkTDILptY15J2gim8uYupKV3DwrucTF9kpjNz49v3yx64ReItjbHSkSN6zGReOJpJPxBknXiVkRCu2DYeNgnLRwfTG511CzleDgPzJQB9QNq2y+0+zAYvazdsfZfcDq+D+BvQcYX9ET6f7EukUiaRulfm5T6zbhACQJ+UelvSYbqnm9wiB5+c1DVKKRnoxFQclORaXfyT5y1AdjIqVvR7+5jqexo7ytk/Ho+Uo2NBUjcKZ8KJNk46b4JhbhBiPI1cHx5JXYKmWZUeUsJuQAU5iINMmcqWgYuyQ/1fddxqhEWSOHWL7HbO3+sA/3YqtadIYQuIFLw7lxelaybHtl9RC4upwolZvEe+29GPAcbTTMjmU+oiAjY/AbJIwa59EB7mTxRiZBWSfeF/NR5fkMn8VIQKmfpViG9V9T2+D5HBLsugp7zSBduGP/MIQgzeAl3XnElM/A4WApyrGNb1MH/y8SEIUaQQl/5WgBJ+HZT/nR+HFjnGmQfYqx3Xm0CAB6dy6xqrp8CWH9XeAKqtHwbfzkTyMGYSeamnTrHB6rurJMMSRKPXRwjnrhIovEJsV7qBudxqpAlqKvxei3MQN6Ub26J8eiWe225rohDcTqTmdObu9ltGrzPR+SIHuMZ8ny3yqfR9pFJ8i4OosH4x651IBevM2+42P/FesZqZ956yfJxpbxD2mRVyIac2bxCXlbi8S6fPj5OpHW9opqmBxBU1MEGI5vK6PToNBLEwigm9vRaSIKNvz4ny98MuamneA5/3h+JA5O8Q3t7T9klUu8FXW9/vy3T+PWSoBOk1295mJQTR6PUh8iJHormLmCDMTcvVpqUgWbm6Db3lgtHRW8SJuOxX4QZktVO47Yo80bZNiAcm23Ck83ZW+F5P2Txm8Q4U5BsSXYi0mufsviv31yPCa0ci+UkwfuiqNnJgycBNhqZ9TSSokrwXSlXA1eAruq+mvlDVEZPIJBnz+bYs0su1mjfOGaM1IHy6UH5m3iDskxUAThp0JDOfCqL3TwXbIrwE5vUMukokPxFX0yDRXL2ALJyE5gOcLFyFdynotcWVUzySD29OAZpujZr3hCWGko3aGZnRCm1QniLUOVbZ7cMZvM9rftVu8NXWD0sQxfJWOlHD+DyIDgOwj+1UaKkwCNSnT+Zu8UtNWylBlJz2dK3u60P0J95WonNajmVwb8m6FwHumB/frI29U49ErvXLtlfNBuSSytdg8JezQ+liatwSsVpWQK2vfgqEpUxmHKDdbQQzBvAzxFrGgHmdPr7jaC1USl7rqjCHQwuxoYR6q/hNi2ovEPAoM/cZOX2tY/2UWVWSxHGwGnyrJQhRXxDz089TjBinAei2zc9aJ0y42ZzUV4q5ScY68wmi0k1F1VMIKAQUAgqBtwaBmsdiemumoXpVCCgEFAIKgVojoAii1oiq9hQCCgGFQJMgoAiiSQSppqEQUAgoBGqNgCKIWiOq2lMIKAQUAk2CgCKIJhGkmoZCQCGgEKg1Aoogao2oak8hoBBQCDQJAoogmkSQahoKAYWAQqDWCCiCqDWiqj2FgEJAIdAkCCiCaBJBqmkoBBQCCoFaI6AIotaIqvYUAgoBhUCTIKAIokkEqaahEFAIKARqjYAiiFojqtpTCCgEFAJNgoAiiCYRpJqGQkAhoBCoNQKKIGqNqGpPIaAQUAg0CQKKIJpEkGoaCgGFgEKg1ggogqg1oqo9hYBCQCHQJAgogmgSQappKAQUAgqBWiOgCKLWiKr2FAIKAYVAkyCgCKJJBKmmoRBQCCgEao2AIohaI6raUwgoBBQCTYKAIogmEaSahkJAIaAQqDUCiiBqjahqTyGgEFAINAkCiiCaRJBqGgoBhYBCoNYIKIKoNaKqPYWAQkAh0CQIKIJoEkE26zQ6EqkbwFhenB8Tzs0O9n+7Gea7f/eSPaIGf4aIFzOwL4BdAEQKc9MBPEvAH5j4ASbtrj12Np9Ip9NGmLknEot21Tk6COCfnfUYeDoKo2do6LYnw7TpVrYj3nsyiH9Y9nfGg60tvHBgIP0P5996epJvm8jRHSB8eupvhJUjg/0nVDumWCL1ZWJ8y9bOyyb4oNGh9IZq254t9RVBzBZJz9B5NiFBUGd3KsEmfxeg/UKK5W8AvgqDV42MpMeC1PUiCFGfmY7LZvpuCdKWV5menhPaJvQ30gAdrgiiWjSnT31FENNHFmokEgSaiSA6OpL/RFHtB8x8tO2mUIncHzMpcuzo4KpH/Sr7EQSAdGt00zEDAwPixlLxL9bd+0Ey+RcAdlUEUTGM066iIohpJxI1IDsCzUIQ+/ckd4nqWAVQT40kvAmadtTIutXDXu35EUSt1Eyu6iXrmqJUTDWSecObUQTRcMhVh2EQaAaCmDv3pJY5W716BcAnOeauM+F+MH5IBv9qcnLHTRs2XJMTZZLJZOT5542dchzdD4RTiHEwgKi9PgNPIKodkh1Y/Wc3TP0IAoBBRMcND/atDiMXe1lP9ZIiiEphnRb1FEFMCzGoQbgh0AwE0R5PHqQR3QFgq+I8xebOFEkGUROJOrGeJXuRbqwGqN2OFTGundOy6VQ3FZGUIAgvgfH2Le3Qra3RF5ZXqmbq7Oz9MGuWemmnQpuTAOZMta9uEDP2A1cEMWNFNzsGPtMJoqenJzqh77wS4GNsEvsrDD5gZCT9xzBSTCSS79QZdzpIYhOZdMDwcN9jsrZkBEGEW5gtq6Hie8FThsYHrF+XfirMeIplO7pSpwG4ovD/LwMYAHCUIohK0JxedRRBTC95qNE4EJjpBNHevnRnajHWEbCPbWorRob6r6xE2NLbiIfpr4wgGPg6gfezWRxVrGbq6EhuhQhuA2i+NR/Gg0w0QuDzFUFUIuHpVUcRxPSShxpNsxFEV3KuBnoAwI6Fqb1hMh86mkkPVSLsuQcmt58zjrsB6izWZ8bN2Uz/8db27PhJCYJwLpn0aqnPQmVqJol6aQUTtinxP1AqpkpEPS3qKIKoUAziQ22doAVgHM/ARwHsXGhKODI9T8BGZu4zcvra9etvf6nCbmA5EunafMD8LECfsPUjzBL/QkyDpsbX7rELZ4M6UZVtGo4PWDhwRUw+mcCLAOxV0J1b8wKwjglXhunPMXea19X7Pg38OQIvBOi9hcfXMRAegclXwMTtRTv/Sm8QjZKPn1zbywniFTLp4OHhvof86rr9PdaVuoyAL+TlQUyMdXNatjp1YOCG8aAEAaI7HWapFamZHOolS91lRvgziiAqle70qqcIIqQ8rA3boG+AcbL90dGjGZ0YVxl6ywWjo7e8FrQ76+oexQow/QeAbf3r8eOk4bThdelfyk6S9vpuBCHKjOt0MQFfdFrMlPfPj5OpHR9mo7OIxzAvJcKR3n4AW9oOSxCNko+/PPIlOjuTH4NGDzDwDludilVMQfstlnO7QbRFtr7c4dhmMPOibCb906B9lKmXwPfAwGKO0pcUQQRFcXqXUwQRQj7C0QkR6gNwYIhqVlHLJFGjI7Pr+n7vV9fNYsWvnjBZBOHSyTd3OK9oLimrIyMImMZpiGg3OK1kfPp8nZlOyGb61viNrbM7+Wk26SYAu/mVLfzdsvMHmycFDbXRKPkEHL9VrKvrmB0N5O5x4LqRTP0zw8Nr/hKmrUrKuhGECFfi9F1g4PrsUP+JfgeM4jhk6iXxtlIW4kKpmCoR3bSoowgioBg8bNnHwPw4SPtVfoPmVgBxMPYuPyXzwGQbjtzw8/Srbt12di7ak7Xo3cjH5rH/DDCeZkKWQK8xeDsCugDsXt4WXTM5tv0KN5JwbhoM/IaACQDzbG29TkCWQU95zwm/1zXtkIfWrX7abU4dieQ8MN1pM4MsFtUB3gBov5H1IUiV8iaZHcUKbrGYGiWfgMulpFhnV+rrDHyttC4/bjJOf/dueDCoarCSvr0Iosz7mfBH6NwzMpIWIT18fzL1krCmUgThC92MKaAIIqCoYl1Legim2LiLtuwGA5e0RflbsiBk87qTe0dNupqBg2xdeFqLWHrzcUo76zBjrRnhcyRmiNSeWPoRjfXrHHF9DAZ/OTuU/p5sej7OUy8y05m58e37nQTTnlj6UY0NEbfnw452XVUm8+Yd9XZtTstdBMTsOIBwszGR+zfn+4zALWKSGLdQQ5X93AiiEfIJuFTKiokbIXTzPoclU7Hc3xi4GRqtrCQYn9+YvAhC4uAWWM3kpl4Sb0eKIPykMnP+rggioKwKD4OnTxUnumJksE/8f5nlSLFMweJkbWl4Bb6rNbpNUvagKIk+aYD5gt13w3e8TpmFh+wfALzMNh1XW3sPgtgIgxd62edLbzgeKoRYPHUKkWUjX4xS6jsnj9sA3AnCeritq3wCLhVpsVi8dxER3+DznpR/qAffrpnm3ePjb3/CS1UYZDxeBCHqV6pmKlMvMZ0ykum7WrSpCCKIZGZGGUUQAeT00YOXbfO2Nydut5/sGTgiO9Qv1Caev46u5KGA5UVreZa6xb4R9vJai/Hz0tO5t6rI3rHspE7AhcND/V93DtCFIMZM5oWjmbQwyfSZU4ljlCj7lBnVu0cH1jxjrygzySSivok3t1/mt/HJyRVSgmiEfPwwCfL3Ct5hdAZ+pzF+Zkbo5kpuGH4EUamayaFeeo41OqD4vqYIIshqmBllFEEEkJMsZn3QMMntPYt21/TIAwCJt4lHGLSxhczLBgfTL9q77kz0LmHmm20n7dDetuVt8KOT0egBGwZW/d3el5QgPG4BToja48kujeheANsU/iaNsy8p9xqZfOjwcHokAOxwkqtFsBKnsEbIJ8h4g5Rpbz92O2rJfaNgpjoVeiNIXQCvMHBdC+nfHRxc81yQOn4EIVEzTQK8cGQoLeQr/ZXjXXorVgQRRDIzo4wiiGByolg8dSMRjisWD2OVFKALinWlriPgs7b2Q1mUiHpdXYvfoyMyQMAehXakTlnS8AuMbw5n+rd4v3oMWtKPlCDKVWY8GkHL/KGhW0U4Bt+fzALIRcVUb/n4jjVsAXHji7TMORpkfgmgD4QM/y1uFj9oi/L5svcvv8OAE8OySKw+6tMy3w6bekn0rQgi7GqYvuUVQQSUjeSEL2qOMXAHgVe2RrcZkL0rBGneZSM8KzvYf2mQ+sUy8fgR25rUJtRen5yq5/h4xb9LT5VMi4OYq7rULyOIfAyinW4VgUltpHd5dqj/jDBz6oynfsSEz0+14RJWop7yCTPeSsrm35DQRaz1MrEwoZZYppW3bFmfGXy015uR3w3C2tDLczk8ZuYiB46OrnpBNh8HAZSolxRBVLICpm8dRRABZeNijWOvbemLidHHEVobRl8sOZGLdu8DKJSdPINbCDjE7mtAkpuBZNMwmGlBNtN3TxA4JPXLCEJGVkwITXqxROpMYkxZY7k9UtdTPkEwqWUZQRjjOsWIsBgMkaHNizA8fSqCEEQYNZNEnVeWcEjdIGq5Gt7athRBhMA/Hl+yn0mmeHAO4uz1OoC7yKQbJia2/6XXo6wkHEOIUfkUleT3DbLBe7UapL5LkLhAD/v2vmNdqQUETHn3euWkrpd8aieMylqyDBjm6MeDSdy+3uVsRTi45cZ2OFm2xoIQhGgvqJrJuVZlb3GKICqT83SspQgipFSCh4soaVjkD/5xlPSLZY+LiiDchRCGIEQr9ZBPyCVSt+KF8CvnFMKv2JMHuT7+ByWIcjWT3MDBvvm7WeQpgqjbEmh4w4ogKoQ8H9DOPIMA4XtQTJTi19qzpPGy4XXpB+0FFUHUjiCKLdVSPn5CbfDfqSORPBtMl9gftmWqRDGuoAQhUzMxcFh2qF+YXlu/IOolUa5qgkaMbXYAABzvSURBVKhVnuxE6sslMaGAP0VJTwS1AGuwXKdld4ogqhcLxXqW7Ek5PgQaLwfjYz5B/ESMoUNH1q3+dbFrCUFIrYKqH2q+hSAqIq++gtR/K1RMLmOuWj6V4h6L984nMi8AtF0AFibBj2s8viCT+alQP1b8k/mXAHIHzKAEIQYjcZorMSoIol4KSxAAyizQvHJYhwHNaeAARRBh4LPKKoIIDZl3BeEF3Nb20j4GRZYRoxdkhcsu/TnMCCURP0M9GoedQpANvlqCkPomeCS2cesvFu89lsjyD7F+Xm8QQXCoRD5B2pWVkWy4T0dh9AwN3fZkpW0W65V59rv4sYQhCD81k+Nm4BoePMwNwiKUfPjyKS94Kx1rLtLtZkUVBDtpnuwQvj5B+pgNZRRB1FfK1JFIHQzGjXY1lPMDkGUdq3YjrHaDr0F9mW9CaN+OznjqYiacVyuCcFJ1EPlUukRiXakDCfiZLT9z4FhHfn3GEqnziHHxVLkaEISXmqmc8N0TDIUliLIHcqDqG3RHR/JdiNIAGCLfSP5w4ZFYyQ/v2fp3RRABJG+drNg8HEwiquhcBobbopuWBU3yHkskTyCm621dlXwA0tNOIbZ+MXFOgGGiQDQiKNyOBPzBBH6vmXz98HD6EXv9RtwgrJOhw0QVkD98us0t6C2k3vIJgr2sTCHw4C8AK7JvcZe6AyaWhpGrs22pj4nL5hfmBiH6cW7WxbcNh3rJM+hkWIKQeNyLoVSVM0PmhQ+JT1Clsp0t9RRBBJB0LJ48gohEzoN8wLmQYZGDvDE4YtuIXl7TWDs8k1k9GGCIVpHOROo4ZoiAcMXAeJPOh0ZRrlEEIZn3JDMtDeqQ19mZ7GDNCumx3dT+KlFTNUI+QWVgL5ffyHdeCfAxtn+fZObjs5m0yCtS0S8eX/whkyL3l5hbu2x+YQlComayvN910r9ge/D1zD4XliDm9ix9xxxd/wVAIjOj9RNOgJqZO3h4+PZNYUESasTWrV+9iZl7bXWrvpWEHUczlFcEEUCKEkc2gwgnDA/2T+nGvZop28Akwe1kHz0BD0y0cdIrf0Sx33zMp6hwdLOH4v6VMZk72BlSu1EEUR4S2vrws+Zk7nC/NKwuH7n0DaIR8gmwTKRF4vElCZPMu+wkB+BlZj4hm0kLr3fXaMCyBl1Cwrtu2GEJQnKbfYOZkgQ+G4RP58fknb86LEFYhxtpzozgwSrtWHUmUouZIZJT2WJd5bPdVXNzq3QNzOR6iiACSM/lJLgJxAtGBtPrvZpwiUpa5n0qvrqOROp7YPxraXt0U2vU/KJXzB2xEZNGl9tDUojkRcxYkc30/9A5vkYRhOi3PZ48SCMrmq3tY/WeUzKZjDzzLM4B0UXOGEXyYH3Sk3qt5RNgpZQXEWtnUt/5cgaf6virTqAfRSj3jaBml+2J5L4aY6Uj94dgmIuyQ/1flZFNWIIQY5S8CdwurFwB7CjWFREdNzzYt9oNkEoIQnorynewVte0070SUhXHYX0HETq9kJzJHggxcKTiioTcxJUUQQQUrstJ0DW5jrU5yj9o18XqcgsQ3/3DjMiK7NBqQUYlJ07RBzGJQH/2hDzCPM319tFIgnDL7SBuEkx84uhgeqNdBFYQu9aW74KtwIhFVdlUEbfH+0bIJ+BSKSvW2XnUThxpuQuM/SVt6CB+kEA3kcnrxsd3fK7oES1O85OTr+3MFDkQhFM2h43/uBMTv1tmJQQhic20ZdgB1KuVEIToINaVPItA35bIXeTJ6Adp17Rq4xsHBta+UhxQT8+RO0wYLfsw0yKCtWbKPM2Bym4ilcq7meopggguTZcTvtXA6wD/FtAeyzfH7xS3ZgA7lzfvvVg90nOKtw+RfnMdQC9aKTpNfFJqRgt6Epp55Mi69G9l02skQYj+XdQi4k8ih/ZTADJg0hm8HwEfAmD3Ei6Zgod1V0PkE3y5lJYUiZZMLXoHAf9SaRvOenk9vb7QK7d1JQQhN5oorOwAeasrJQhLrbjVq5cx+KSQ0W29IO2fbOOTgqhpayWXZmpHEUQIabpkbgvagkhRemNblE/3C9Hc0b3k4zD5JwC/J2jjtiPek9DoaLsjnrONRhOE6H//nuQuUR2rSrPr+c7uWWLcENTMtVHy8R21SwGRC0Kbk7vc7XYUol2hPlxrtPCKhwbSz3vVq4QgRHsSNZNF6My8KJtJT8XGkvVdKUFYh4m5J7XM2frlfwXThT4Op35w6WC6FKb5NfXu4AeV+98VQYTEztKPP0enbD7lCv34DgGriyTw5+y+K/cHTVBfQWIZnRhXGXrLBaOjt7wWctMIZeFRKcEUYgmtKMQS2tYbOx7kaOR46OZHggbrE+01Sj4B5S4rZuURJxiXEONgr9uSpLI4ZDykaTh3eF2/sG7zfeCulCCkaqYA6iUx5moIojjneDz5fgN0MREWhsUIwhCC+CSn+rIKmc3aqoogKhS9dR1uffVTICxlMuMAiZDMxYexMYCfIdYyBszr9PEdR/1SbLoNw1LPTNACMI5nYF8Au9iu3y9szkP9JzB+bOT0tX6WQcU+Kt3ga1U/H5o7upxAwvxzH1ueZpF/4EEmXLnHLpwVZBo2WF9xjI2ST4XLx6omZNsyTt2FEO3iDUmsIbta0gDwPAEbmek2PUJ3B3mstY+pUoKQqZlE1NjsUP+JfsRUC4KYkuMWjA4DuAtEu4DxdtscRSBMcYt6BMw/M/XoXdV4YFcjz2asqwiiGaWq5qQQUAgoBGqAgCKIGoComlAIKAQUAs2IgCKIZpSqmpNCQCGgEKgBAoogagCiakIhoBBQCDQjAoogmlGqak4KAYWAQqAGCCiCqAGIqgmFgEJAIdCMCCiCaEapqjkpBBQCCoEaIKAIogYgqiYUAgoBhUAzIqAIohmlquakEFAIKARqgIAiiBqAqJpQCCgEFALNiIAiiGaUqpqTQkAhoBCoAQKKIGoAompCIaAQUAg0IwKKIJpRqmpOCgGFgEKgBggogqgBiKoJhYBCQCHQjAgogmhGqao5KQQUAgqBGiCgCKIGIKomFAIKAYVAMyKgCKIZparmpBBQCCgEaoCAIogagKiaUAgoBBQCzYiAIohmlKqak0JAIaAQqAECiiBqAKJqQiGgEFAINCMCiiCaUapqTgoBhYBCoAYIKIKoAYiqCYWAQkAh0IwIKIJoRqmqOSkEFAIKgRogoAiiBiCqJhQCCgGFQDMioAiiGaWq5qQQUAgoBGqAgCKIGoComlAIKAQUAs2IgCKIZpSqmpNCQCGgEKgBAoogagCiakIhoBBQCDQjAoogmlGqak4KAYWAQqAGCCiCqAGIqgmFgEJAIdCMCCiCaIBUY12pBQT8tNgVE87NDvZ/W/x/MpmM/O15HMqM00A0D4y3W+UIL4F5PYOuyo3tcO+GDdfknEPt6Um+bdKgI5n5VIA+AmBbAAaA5xm4n4n/e3Qw/XsAXME0aV5X7/s08OcIOALAXgC2so3tDwTq0ydzt6xff/tLFbSPuXNPaom2vdwegXYiEycA7AkguqUP/JkY9+lEK9cP9f1f2HnUu/3CnCnWs2RP6MYiDXQoA/sC2AVApPB3Sx4EbGTmPiOnr60UL7FWnn6OPkXA5wB02/p5HeDfEtFVcyK8dmAg/Q/Rt9e6CyKvefOOenukJXokCJ8D0fun1iYwBuDPAN1vknlNpWusQfIJMlVVxgUBRRANWBpuH2pnZ+/+rJk3AvQBn2E8xhqlsuv6xGZv0UdHV+9hAP8YwDs96hoM3NgW5dOLm0aQ6bYnkvsS03UExAKU14lxlaG3XDA6estrAcpb44/Fkyki+i6AdwWpw0CWiU8cHUxvDFC+3u1bc+jsTiXY5O8CtF+AMRWLVIIXOhLJT4LxwwBr5UVm/lI2k+6PdaUOdzuYeI23vf3Y7SLR3EVMOHWKsD0qhJRNI+QfQhyqqBcCiiAasD5kBAGT/kjENxRO/UFGsZFM/TPDw2v+GutKnkmgbwX5eAsN/wQGHz8ykhYnP9efdZt5jk5j4L+mbgtBRpbnrCeh0dEj61b/2q+PZ57FOSC6yHbKDtrLGBN/MTuYXul2mxBzqGf7YqDi5Dtn61e+CcaZFczBmisDv9FMfeHw8Jq/+EyeOrpSXwTwnRAyMcB8ATR6HIzbi+3bb65ufeYPLVgN8HuCCqVQTqytc0aG+n/gddNrhHxCjlsV90BAEUQDloeTIIjwU2brdL5ToXsD4McBLZvfPHg/Aj7kJABiXGuCf05E19s2C/FhZsQGzeDtCPi0rd3i7AwiOm54sG+111roSCTPBtMlkk3PUmEA2mN5LuCPgPExyYa1CcQLRgbT6103oERqMTNuctQ1wHiaCVkC5W8h7n28zNDmZ4dWj8r66Kxz+9btzQ2nvFrwDzacWsHcDtB7ZWQu5DmnZdOpAwMDeki8RPHXSdyqQE8V5N4FYHdbO0K1tQHAvKAE0ZFIzgPTnZL1owP8RxCNgmkC4HeC0G1TOU2tMxB/ZWQw/d9uJNEA+TTgi549XSiCaICsnQTh6HKtofFZ69eln7L/e3ti6UeJjTQB+zg+ehNAC4AxAi5kgy+33wwKJ7QTQPQ/pZsw3wMDi91uES4f7ovMdGZufPt+5xuIeP+YyGEFiL7q2OwfM6P6/NGBNc84obV02nNa7gfwiS1/4wFDw+ec8xd/F32M6/RvBFxQusHSra3RF5Y7N9Z6ty/G1N6VnKuBHgCw45Y50JMmm6e8ezc8mE6nxcZc8hMqG61F/wrAZzuIYhOZdMDwcF+eeB2/ju4lH4dp3uvYsF8H8Teg4wqHLKmzO/kpNnGlmxrK6wbR2bloT9aidyP/hlL8WeowPZe70PluItbZX5/FpzXSfui4bYwx85JsJj315lZsrBHyacDnPKu6UATRAHG7EwRdMzm2/QrZA7QYVkdX8lCA7gAwxzHMMSIsGx7sv81l+NQRT54Lsm4Dxd9zrNEBtneMqT/s371kj6hp3gfgg7byG2HwwpGR9B+9IIp1pQ4k4Bb7JsbARdmhfkEcJY/jhbI/s83nMTMXOXB0dNULHn0Enku928/fHnovB/MK23j/CoMP8MPJendJJJcT07X2GxozHZfN9An8Sn5CjdW69as3MXOv7Q+bGDg2O9T/cze89u9J7hLVsQqgHmcZN4Lo6emJTuZ2uooJn7fVERv9Z8VbhpfKSNafeJMwJ3OHO0mlAfJpwNc8u7pQBNEAebsQhO/m2NV1zI4GcvcA1F4yTML3Rwb7z/L6cGPdvR8kk38BYNdC3UkGDpNtLh1dqdMAXGHfiPxURfbxdCZSxzFDvKcULXeeMjQ+wHkriCVSZxLje1N1CStHBvtP8BNBe/vSnbUWQ2yKHy6WlW2s9W5/bs/Sd8zR9V8A9FHbmFeMDPVf6TcH8XeZPJlwfnaw/5vO+p2dyQ7WSNwetiv8zWDGimym/4d+fXV0JN+LCAnZv9te1o0gOjt7P8yatVa2qDx9VEX2diX9SVWa9ZaPHy7q7+ERUAQRHrPQNWQEIdRDw0P9X/drrCORugGM5bZyL5vgg0aH0kK/7PqTbWYMHJEd6hc65qnf3AOT288Zx93CKGdq83W5Abh1JmsDTKeMZPqutteJJVJfJoZ4XC/+0q3RTcd46eALBcVDrSCgAwD+C4MeAbQbne8Q9W6/oyP5TxShL3JeRfYxEIwIG4cMDd32pJ8ci38vk6cLSXbGUxcz4bwt7fLwZBs+s+Hn6VeD9CUhfbgSRFfq6wx8zSZ/6Q3Aq99ORxsA39Ua3SY5MHDDeLFeveUTBBdVJhwCiiDC4VVRaQlBuJ7mnR1INorRCFrmDw3d+rLXYPJvBHQHyHq0tn4ygpDo1AMRkP84Ubb5x+K9i4jYrhbztUoKA3i92w8zFreyQQjC5aYx5TsTZBxdXYvfoyMyQMAeU/K3+d8U/026TiTl/Ppsjye7NLJuPNsU1trTURg9dvKcCfLxm+ds+7siiAZIvMzMFSj7eNyGUX7qKj+ZyeoGJYhYvPdYIr7ZRiJPcC7S7fMuUNZl+cfPj05GowdsGFj192Lhed3JvSOmpfrY29aAsOD6tbDxN/XoXWH7tQ+k3u3XYqkEIQiJevANk/nQ0Ux6KOgYPnrwsm3e9ubE7Qwc5EUQEiIxmGlBNtN3T9C+RLn2nkW7a3p0nU22ZYegmSCfMHOeDWUVQTRAypIbxJ+ipCcGB9c859d9GUEE1NsHJYjyGwqeZeA+ApV5bnuPlYUX9CE2opGRIMW6Uv9ZsEpya+4ZEO5ixm1t0a2H7CoKP6ysh+D6th9gCGVFKB5fsitr5qeZcSyAT5ZYfUnkKXnMfcqM6t0yyzCvAXXGUz+yPzzLVEzOkz+ASaEeArQpYg8yaWbemsjyuC++mUDyTjQd5RNkerO2jCKIBoi+nCA4kJpIDK3eBCF546gVIlJVlXivaJmgW4nxmQAdCfv7DWD8KGiIinq37zZmQchv6tpuEeJ9AX4fM32CgP1LwofIKssIolwVF/hAYe/CuXZkBOFjgh1ARO5FZP29VfKpaiKzuLIiiAYIv+wjZDzY2sILg4S/aDaCEHB3dCS3QhQrwPQfITzJhX9BlqH9W3ZotXDEc40vVe/2C0uG2hPJDxLT2dbJuRhDK+x6khGE8zE/xHqZ7gTRCPmHFYEq746AIogGrA5FEHKQLUc4A0cT4+yCc1fRTNZLKrqwAJsY2+Fbbv4jxcr1al/4jUQM81IiHBky1MYmKwyjPX7WLCSIesunAZ/0rOlCEUQDRD2jCCLgG0etYbNUD+PUTcBSEA72OZEbDP5ydii9xafCZ0C1aj/v3cw/CRCr6AWA/0SgIZNpINeiPSQe7AM9Ur+1KqaK1FnVrodayafacaj6pQgogmjAipjOBOF8yCTggX9s3XrUo/ff9EYDoHHrwnrYNWHMB+ELAM2VxDLydTT0GH9F7Rf8PdZKvJT/xsDNgHZvLkqPbRhYJcKfS1VgAQliPhELf5Upx8N6PVLH4r0lfRHwd5h80PBw+pEmlv9bOLWZ1bUiiAbIazoThMS79Y/QuWdkJP23BkATqIt8KBBDhEW3h4+oyBxT1mHQ9jsTvUuYLZPgLbkeCD+Czmf5Rcot9huEIDo7kx+DRg8w8I5CvdBmrj09J7RN6G+kATq82Lfs0VjSl8HMi2SxlAIJqw6FgsqnDl3P+iYVQTRgCUxrgsjHUrLHRxJmjgtHhtLC6Snwz/LcJVwI5udB9DAYD8HgHxc3TuGFjIgmNqtuwBSRbCMRmIcF9UJu7178Ps2M/NKeP8K+4dW7fRGvaELf6VaR42lqw3WJOeQGWjx+xLYmtYmbgTB1zf8kKj2XECuBQ3qIZoM6yknDhxBdMTLYd3qYBE0iXIep8d2bTZhFZNpHCPg/Yr4yk0n/VYyn3vIJvFBVwVAIKIIIBVdlhaczQcjiHBFR38Sb2y/zewQuoiGidGpzWu4qTTBU6tDX0ZF8F6I0AIYIfS1+oU6qfh6/9W5f6t0MXJ4d6j8j6KqQxDySEoRoL9aVuowAsUkXfuFCbUjiY7mF2qgmAOEUzUn8T0qCQ9ZbPkFloMqFQ0ARRDi8Kio9nQkiH6E09T0w/tU2Ob9osSU4xLqSZxFIpFDdonphPnkkk76uWFB2Ag9DRJINRjhiLc5m+taIPurdvuykLfI5DGf6vxBkUbhEZ3UlCFmwPiKcMDzYP+X17tZvwatZeEJPBTcUZd1iMbXHkwdpZEUNzqeUtX7ekYbtfcvDkvOa1ug2xxYdHestnyAyUGXCI6AIIjxmoWtMc4JAPL74QyZFRJ6G3WyT8w0tLcp2dC/phGmKrGXFSKCFbGm5g4eHbxdmnVM/uQ7fO8FMcbdyhi9nSbiSerYvDV0BPIGodkh2YPWfvRZF3i+DBAkLMikx5WXGzdlM//FOdY5buG9o2lEj61YPu/WXf0inawCknGXcCMIan4ZVIFpoq2MQcNHE2A4Xe90k86oj6gNwoP2AYTIvHM2kRd6Mhsk/9IepKvgioAjCF6LqC0x3ghAzlNwCxD+PMfAtzrVc6sw37e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fmhGJMqnlBmJ5y9AQR3cjHmCA0eR9C1Qi6ixvTy+qCxCrAjB1vSTO7iMpViOYauouoCkFMOw+6gxZW3CopTBw+cauKCrCoO0F4FwS/S2+/fups38twglA7xevcJxO1gUgPD5wRpk5x91NDfpEtc3Tj1n0PUf0GWjsTXRY5kaB3zr0j0gmCCRelhwaU/0PoY3qCUA1pTm6+asz8iwu1HXpVcQH5BNw5RplvOuy1GyTG99IjA6dFmUNGBOHjVGbE4G2dfScTOTsh9xPqWa3xgagtFVPotDQrwMD/UJZPDItFVA2C8MkOmH1FLfhzML5uZ+J3VjPmUe5ORDkNuoMaZhh8fno4eVXUEO06gtDshO9sju+cGBy8fruZBB1HOWPVnElGOZ2JNxM+mR4aUGM2fjo7j321TS3KMfE9M5XKYOgRFEnBtHMaf5ZoBBEhO2AUgnBOEV7/qwATfc1CnGXmE9IjyVkOsKpd71xTRhB/3an5+AfvvfElU9yc/nX3XkiMy3bU4YI5a+pQGvZeI4LQ6xvNjuH6RSf8OFrzdxBhyIb//jyUkG2+JszpRTVVDYJQR3+fUNzu0TwJwp3MWN8S32k4ykIaDslMCWrv6jsR4Os8SaGMyEG1YqhiorbO3huIcEr+zcWYUhd4iJd4B6FZgFX37gFIa9LohyuDmwhOGl6VwtV5ou70dW13dPS9my1W1m5OJsdi1L9vP+zUnV/18sStrpwgUQgi0kkoKkFoTje+xhqaS2dtWe1JE/wbwFKRqCM+jqPpIS6CKHDq058g9FEagl5uRBCa3bzxBZH+chvhx7bCk4fWISoiskUVL4OKSYVBeBrgJ8HYYCH2w+3bd/kfU0uCKhIE1GmxaYJuIsZRBmBlAN4MxjezU5nbouTYDmhb3Wd8VOPtqRJBnZcaHlBWHKFpbE0Ioly7rIJFokSC8LF0MRCHQRFDw4OgljQm6EWpfz2nqSgEEUmbEJUgNBoT3/VK45ejvdQuwxoSJJIC/E3mv8FsUeQf/OitKcJqmfwebCuvYXGVIK4gpILJm0otU+oldanvryZBqHdFD+vgjFDF/UkzrE/l4+1EHbdjyrrT85drwidEvgsx+UCEIKJKaLr8fCcIZ4xeJ1aNmklDJL4nm3lLEBpriuJmVWGtwFOI7phdzPG/HJ1tNILIY+Y4wmVxIjH+JWd5ZRISIKPMKSfGd/tSlBNSQDKn0PzTOhkLQfjMfDlBKGBCTyAay6QC1VGh6t1fdT4vCcJHPVSONTffhu9ltd4CKrqZVlBn1WVgBpn1SodKhDvItu4fGVmnAsfNUmE0KkG4sXNUT9tpMUFFN8VhnrAJXpgjee629pywv5WJ/UATa+hpsvnE0dFkKuqkm2cEEbqgRcWnlPKNcILQ+DYUXD5rLp19c5uU67RqKjeT+W/SVqCKycfG+zkwFZFjmlUoBnVZ5grJEHxZrbmojnQ5FQaALhyI7pQiBFGApJPn20b2SBA+BNAiTeRTEy9sKP8a2HzbrOis0wxtZN3lJ2PTD8TEqihsHhWoQ0u8g9DEIZuz+zfd2DV3JJEJTHNpWzN3EPkxey0w3abGGkszv9AaTnOaS3llMFCx2HKm8z9sbgcShMb3IfRy2e+FPsl/AtvTEZQCdUHT1o8YOG+Fjr0wbwW0TlJCEMFQTsdIyt4AUI+rZOii1tm54mCbbBXRc8bKJlf/bmT55JDQA4GdMv1ACkwGA9K++r2wwJS7RILQhTT3C/wWNskr8fv0iS++EcDrc+37mnb6vV+zwNYcQRRYYLr8FgrD0gRHlVA4dHT2fpMJH5zBpIi5ZipP0/kf1p4vQfjEUoocI93dAV0GNcD/stpHxfUXi62jR0bWDYUNLuj3zs7lb7Uppkz13IuTj4laQfINtcW9v7mJl5km8Cilr6pupc1cp+8ALBWJcvF0dEfEYrDf742S6jeO1sXL/86yY8pkbyZ/RNCilssN8YPCwG10Y3Pc/mipuJp+IJokRqEOoB4MCpzaSnWU81GvBoa10e70p3Nn3EPA7q+oBn9tA7+ybP5OqdEIdLvhKJFPVV+jnEKiWiF5sSi2vmb9mSHCAstOAwMazfoXeOrw+dby4TpUUqInAfoFs31fS9Oz692bZtP5H7Yu+RKEzoqo1FguOp+IMM9VXcRI01g5foP3iZIJvwWtEU4QmlSxkXaFUXSsPgHbypq7wPQD0aXIjbJb1/r5lHiCUPNWc3qPvDHq6O49hRkqBEreuMA4+FzYwqFR//4qY1mHP7Bx3RNhdZ3ddFfv53I5JPLFa+4EMS2HxBEAqVOuE8BSEWEc8c+5c6uHrWH5Aeo0Igxcmh4e+DcT022nP+2JNyJGKm/F6/Lt6sjZdP6HycqPIHRBpSLrGTUv17WrigVcVvfEJzN7rWGwyvDlfkwiIBZ0wS8Wu9J5W/bUYaOjt271VmoEgtA58gQFw/NipF1oNbmifaKAZgm4dGJ8t8uiWD4FTe4IH4huTprGPdI7FpaBIHQnXOV5O9HCic0bkqF3gDk1kAqI9zYXTj/LTk4dVg5/lVIWO90iFzFYX6S1qNgThHPSaV25l9WUVbkrcjjyGDMuJyKVWjQXJsQsvL1vBFziY1JDSZWKNfBR36hmLRxnWEelh9cNuitHmP+B79QShN73IVzHFjZAB/DCGCyzsj/p2vAPERwtraLSlTfZ9nUu783861RmsBU693hVoBEIwtnVFQaIy4L4gtRQ8j9CdjgFIb/9dlU+Yc7LntAmygeiVzfyYCaOld74+K75mU/L+p2CpEllIIjpgHa9V4LxidnfRLgKzslWZtGaWfpuQOWRWJ0eGfi6yXdqUEbXv1B/lZw5cz+ApZ531OQJQvXRo056nggbmXFsrv+RTtq60PIMPAqLjktv7P9VAO76+cZ8u8qb7o3GEGX+B8laSxBa3wcDHZvBpHI8dRdsx48B6nCVD738bu9OHAImFVfGHZdHNZF9JeXpAwS6crLFvte7u1InhoULX3hL1sk9jV5NBrTQRbBRCEIXIhpAhhhrM1NTl+h2niqHMzVNfaEgeQ7hK6mhgU+6iUWf8AcP2fHMkUHpE03mlcmpzy9h0PRirMuMpt+AOP4h2kRJuV6UhyDgcwpQkP43I7Za55CoEtITkwr0p+6RZp4opw9TvH02bs58yWaaLh4b+/509sHph9oXr3gnbPsGn5SuNUsQPsnP8uMystbLF/Y5Baift4H5PNi4qSCHhH+e9K3wOX1UjCD0MUOipQsNm2Aa/aqaPzc1x7esCrJOygnqBxqrF/eX4DLDZZWWcO+AnK8ZEF+4/964MjQByxTdDsL7Zl40zy6p8+PS7XByv6mwGo+BaAxMEyBuBnMrQG/UmLhqo9Pq5R42W8J/190ZRP1AAtNAAk8yMOykW/VPteqeg2XLSR2wMXLSU4Kx0UnrqeSxI92mBzT6HSz7uNTG5C/D0YxWIqB/4yD8Aky/DE6HOvO+miUIn01tjvboam+azjAE/e5Ac/VmcJv+t/0OHzNydVr7VHoouVb3vqjz36/PBScIre+DweIdBor7d59gZEY3+gFqoihdUGWftplPHxtJKv1iYGyfRjlB5Hd6msxVUbB9iC3q9R6XAz+yKK1rypaDIFSzjpwzljcTW1jvXiRgLUP5g+TyVZTpBJF/sb/FV1jX1O+KHOjE1MZ1PzcpXUwZn6i7gU0x4ccWkHGpamqWINRANJfy6s9FX/pPfw90LeBoNaI+oXHJKkYQpWSBMx1lgId2aBhw9Q6Vle2pLXiPbdNlr6TIfHfACUHXpecJ+M/sVNMazxHYt/sNRhAODrmInd/2UQfosBpn4Js81fSvOlx9Ek6ZTpmwxeb89NDAl92Fiv1AnIx/z5D6aL8K4LXBHeRHyLZOy1q2bYHuqxRBqD7kVHmfp2kiWmgAnJ+qx6Bq9CJq4xbL2lcR4biQ7zEDpqtg259FnNaCsSr3tpomCP3GOTwqdRCSrrl2hds8PKiOsuBk4jPGhpIPB5Urdv5725x1gvDZ5UXSsZlOLa/52HS96IA7F+rxzNEgej9A7wBYfdSvnunH9DH89wT6KTGS27fvujmqpUwjEkQOPzqkq+/v4syrmHA4CAe5Qmyo4Hx/IuBhEG6YaOYfBlnXVDJCablOEF6CmczSccz8ERD9/cy4nfnEmxi0dmp8t7vVXCp3NNegb8hRT0zQMWCcxsBbPCrULa/kof4tGN8uY3Rd009alaPW7sSbLdDHwDgUwIE59aOjnmRY67MWfSNvClur0Vx1A9b5ppRq9p9/j1Jvxlu2tcZgncFkdwK0v2sT8CLAf2TQnTbo25uG+38TpvFQ7VaEIKLMBCkrCAgCgoAgML8RCA33Pb+HL6MTBAQBQUAQ8ENACELmhiAgCAgCgoAWASEImRiCgCAgCAgCQhAyBwQBQUAQEATMEZAThDlWUlIQEAQEgYZCQAiiocQtgxUEBAFBwBwBIQhzrKSkICAICAINhYAQREOJWwYrCAgCgoA5AkIQ5lhJSUFAEBAEGgoBIYiGErcMVhAQBAQBcwSEIMyxkpKCgCAgCDQUAkIQDSVuGawgIAgIAuYICEGYYyUlBQFBQBBoKASEIBpK3DJYQUAQEATMERCCMMdKSgoCgoAg0FAICEE0lLhlsIKAICAImCMgBGGOlZQUBAQBQaChEBCCaChxy2AFAUFAEDBHQAjCHCspKQgIAoJAQyEgBNFQ4pbBCgKCgCBgjoAQhDlWxiXbunqPIeCOmQqM+5ubeNngYPKvIY1QW9eKQwj2xwG8D8BeufJZAH8C+A+wYqvZtvcvsn3jMcyXgj09iVdNTNHtIAfPSj2/jVOme2jolmeKfcG7F684IJ7lo4h4OQN/D2BfAPFce+MAP8lMY0R0x2SLfe/mDckXin1XI9bTzQMGjk0PD/ywEfEwHbMQhClSANrbEwth4QwQJlPDyWv9qhZDEGoCb8/QGgJOAxDTtU3An2HzobZFBwhBmAmulgli0aIPNzW1bDuBCJ8D6B/MRuSUyjBwY9ayPvvAxnVPRKjXsEWFIIoTvRCEAW6JRCL21J+so5ntL6oPmQnnp4cGvlxGgqD27t4rwfhEUHcYeJSnYoupKXuIEISB4ADUKEFQx+LEe9nGNRGJwTvoF5noogP2tr+WTCbVKVMeHwSEIIqbGkIQBri1d/euBeOsfNFyE0Tb4r43k80/AbCPpzvj06olYoCbATz00k7Ny3d6eeJ9QhAGgqtBglCnhuaFz5//ikA/61IheQeTUynShPMD8a5g7OEz4iwI30SGP5lKJdV8kUeDgBBEcdNCCMIAt/bu3uvBWFUxgvDeWQBZMF8GG1/UffTFqLAMhjkvi2hPEITvpoYGTq/2gBU5LFj4wtUAf1jz7qfAuIabrJvTg+v+AIDdZRwV5JR1GBFfAuBthfXp2snxXVdv3nztVLXHVQ/vE4IoTkpCEAa4RSUIgyZnFWnr7v00Mb604488FkPTkcPDN22L2paUn41ADREEtXcn/gVMX/DcMY0TcAlneY3JCcBRdz5DZzPwRQALXaPNMmN1emTg6zIHBIFyISAEYYBktQmCGd9Ljwyoy+pZu0iDrkoRDwK1QhBtnYljiWidZ1HfysDJ6eGBDVEF19Hdu5wZN3ra+yOyvCSVSj4WtT0pLwjoEBCCMJgX1SYIzJEKxACKuitSCwTR0XH8nrbVdC8B73AB+BciPml0KPmjIkGltq7efyfg4ln1CV9JDQ18UjYXRaIq1TzTSQAJRUAIIhSimi1QCwTR3tV7NoCrZ4HEfEFqJKnUikWfEh3fCdu+B8CbXW0/nrV4yaaNycdrVijSsbpBoGwnCM2HOMt56JBDjt/DWhBfRaCTALwJwKtzKG0B+GcMWjs1vtvdxV6yKd3sE8/EDiayTwfjUAAHzliJEJ4D868J1J+divWPjd28JUhCkU0jPTv+sEvk1q7EIgt0H4DdTWeK23IqrP2wNgOxArYQ8CAINyyI8W0Gzn3a1y1amti1eYKOAeM0Bt7udfoj4GFm7s9OZW7btOnW58L6XOzvc02Kf+WIAAAgAElEQVQQCocF2/FjgDpcY3jInootDZuHJmPu6Or9XM4iKl88S0SnjA71K3VWyY93cxT1dFts/XLPnyiX1N3dJ+yT4fgQgL91APQ4uipijtl8JoFPAHBQTs2XszzDRiZcc8DenC7W9Li9PfFGjtEHCTjW1X4G4McY1vqsRd/I+7+E9bXUCVBxgnj55df8eUHL8x8H4d9cpODX72cB+kBquF8du412Vs5i9zQtJ8LlMwINRiVDROuniM7zczKaxwQR1f7+RRB/HhlcbXKBqmB3sMvS58E406Mf95NKhhhrs5mmi8fGvv+XUie0t/5cE0RbV+9SAtR8XpDvGzEuHx0ZuKgcY+3o6HubbfF6Av6HCHeQbd0/MrJOeXQbfT9hfSh2gc+3G7V+peZPOQhCjWl7hi4j4KMBJsq5ofMjZFunjY72PxCGcf73d/ck9o5N0dVEOM7PWTZXVjlKfq0lzhdls9lXB5GZ6bv9ylWUIJDNHo1YTJnl9UboaIbB56eHk1eFTXIT7+OA9z5NFp86ujF5v9GiEjSAOjhBKC9wilmXMliF8dB6avsPkcfsePbEscFbngyCob098TeIUT+ApRHknduk4VFYdFx6Y/+votYNKj/XBNHR2XsZEy509fElm/mIsZHkcDnHWam2oi7w3n5EqV/J+VMqQcDOno2YdT1ArRGwfpGZTk+P9N8SVqd98Yp3weYfAPyGsLKu3zdYnP2ETbHb/U47EdrSFq0kQTwF8IMAHel68zgIvwDTL9UixeCDCXirho232eBDx4aTm/0G6BxBt1OS4aiTvM+LBKQZ9DjIcTDrBOP1moVRK8CentNbJqZeXg2iv5tu2H4vkP9/5w+bAPrFzEvZ3pQaSV6X/3eYCqitZ8VBlGHlNZ0zU+R3AjhkxyD4N4D1X+5BMeO29Ej/XepvYe17wQi0vyc8Rwyl4lM66yCZPEx25qjR0VuUjX7BE/COcTA/ArJ+BuXfESgPHpxswXHljDM0lwTx9sNO3flVL0/c6p6jeW/4cqiXSv34TepHWeB17ZnWr/T8KYUgWJ3OAOW06PpGYbrG/CpjWYcHhUTp6DjhQLbiPwbwFg+G6qTwvwT6b/V3/XrJjwCkYrZNq6vN476ZiB+VJAh3BxSYly2I8zVenbbS5zXZ9nUFCz3R1amh/nN0p4ienp74ZGavNQz+iGeUTzPTxw7Y177dq/9z9IZZ+yrN8W0rLOuI1MZ1P/dDLOolddQFvMAPIsSKKWL7Pvb3/IjNOOd1++J+L1bT90VNykJGqYncp417muN8ou5eoq1rRQ/BVpM8b5ufZeALLXH+kq78IYsTr4/b9A2P3MuqP1fynEuCKNAPT3/BdzbHd04MDl6/3egLneNCpgu86bfjd4dR6flTCkF4xvYsM507tX3XAe99aWv3yrdbnP2+xpFxdWp44BodRk6/MvQDAIe7flc+LbdlY9a5XmIJWMemq9chQagF+PjUxnWjfpNIexogPIYM96RSyae89Vo7E4daROpY5XIUMlKDUHtXr9IfXjGrLvPtsLHST89ezwThcyG+AVnuS6WS/xew/lBbd2IVMX3NvegT4fTRoYHveeu1dfV+lQBF6NNPAMHni+QucG8DqGdHe+VdQOeSIHTYM7AmPTyg1Hx18VSPICo7f8pEEA8jy8uC/Ey0p4GARbuju/cUZlzv2ohlCbh0Yny3y/wMdnLhWi7iaRPn2eriOiMIY+/O9q7EEYCz6Ocv854nmw7zXvKo08NEZq/vAqysofJPFAchnf34uM28bGwkqSyLCp46Jghq7+5bA+bVrkEFqoo8g9dgxaOTLTjKrQbyUaUYhVL2yp2BJ+LI9gwPr/9dOVbQyAYHUV8acNrTEkRIoMeor690+WoQRDXmTxkIInCNcMtBY9b8uB3PLPbe4Wkt3EI2qzObKxXTa6cXbmTmvllzoK4IIuAU4J3YXV3L35BBbJCAA/K/6eK1+wS28z3C6T6g1taVe1lNWeW9OhPThoHvpIcHztCptOqVIJQaJ2aTCgKo7l/Uk/U7AfgtNJo2Jhl4v9v7V/vxMZ2SHulXx+3Ap7XnhP2tTOw+gNRd0S8Y9HAT2V8dGko+G1bX5Pe5JIgCVaCaXIRPpocGlAFGXTzVIIhqzJ+SCSLCwtvameiyiO5+RVOxc07I2jtVTbm/kM1HjI4mUyaTQ1mwseUE+dxzpnyEfpq8o9J3EMnm+NaTBgcHM2Gd6eo6afcspu5yWwloCaKz72QinlFxFLvjLLQu4Qcn4/Elmwdv/rO3r/VKELnwDsqCYvoYGoGw8xhMn9j2vAlAIv83jZkmtXX23kCEU1zkXhGrpLB55P295giizpLUVIMg1Mys9PwplSCimCZrNrtagihYgyIu7rpvs67uIJhwUXpoQPknhD6mAuzo7P0mEz64o8HidNYa+3Rfy6l6JQjvBCTgvr/u1Hz8g/fe+FKoQFwF2rp7LyTGZUGYd3T3rWB2iNutEx1n4HYCf7c5vvPgXFzMzjFBFPhAhIWKjyKXapStEkGg0vPHdH1RmOqMC5hpuYm5qk/9grXFsZTMvJQE6OiAjVeoiNu6e88lxpV1eYKIcpw2EaAO1GIv/UxVWgr4eiQI7e4CheazoTPQKVBghlsQbTZn+XQnAW0+bU6b7DH6OUa3HbCX/WixnqZmfZ4uVXOX1HIHoQ21Xun5Y7K+5OeVhiCyzHRM3sw8bP5p6hcQxKKela9ZkMn8BCAVZWD6K4tAQvk6bZ19RxKxSps6vTGLeAoJG0tFVUxRcr6aCFBbpsgPTrtL8Dn+1ydBVDQXszYHc2fnioNtspWhgcqnHPa8COBOsun6iYld/6vYECthL5lLgtBtQojxrdGRgQ+F9btWfq/WCUKNt5Lzx2R9CSCIUL8st7xMCGL67i2+0XU/qFzfjQw73O8qMIQQgpidgL7YI7uWIHzIRgiiYLnSEoQqFWqnrV/5VCa0b8cpc9nQ0C0qTETZnrkliMJ7NfGDCE7WVKn5U3MEURiPLRIJ5T8QIYjhAXV8cp6KnyB8LG+EIMwJIl9yOqCZ/XECTp1lZRG89PuGPymWMeaSIHRqPvGkNsvmV+75IwRR3BckKqZ8xMZp+1btEW++EESxp63iptZMLWrrWXEgTfHhsHgVGCqsiDsTmrf5UM/2KP2ZS4JQ/Wzv7DsTxO4sb2WPxdTembgEhMNBWG/Z9o+3b9/j0XKp7KqpYvKRa1nmT80RhKiY/Bdc3UQwEWA5L6k1/hS+F1H1SBA656Na0H8rL9CWlufelKXYqcToAznhkmc/Bl7YpiQx1wShc5aLYjIZNk6ds1U5Tyk1QBCzICh2/pisL/kXmdwhBMnFpL7yxaKm7EaaTn3gPHJJHYCqqQC9IR2KNt303P4T8GfYfOjoaHJHEL5cf+uRIFTXC0yCy3yBFbZ4GfxO7d29h4Fxg1sNVc4Fbq4JQkXRRQzrPUErQwO4GWDnFNFEIFBuBTc1x7esMvE/CntPYQgVMxWRale3SYmaTyKkf8bzx3R9Ue8zWeBLJQifDVzkMPAFJ9Qyf+N1pWJSQmkTRznjaK4a9cZWsmnJ6Gj/Q2ELg+v3fLgO5Sj3pIpiy2zf19L07Pr8AuScxtg+GkztABYxMNoS33qq6QLV1p04nZi+43pnURd2pifTMi9SoVDqbPwZuDQ9PKBypBSdt8EhHws3g2iZqxOTAC9LDSeVJ2/JjzeQZJR86bpdsg77asyfWiOI3AbOEwqe70IWy81zrxQ6sTa0matDEGoxsh338n1mjmYRTV11qRrnY6gNnSt+1IVJZbdCzAnX8boZvD0B50r12NaoYeYVQfjY+P/FYuvokZF1KnNZMY8+Sm+Zd5AFkYaBn1q8/ZiRkTuUmXLgo0uWpCWIzsSxRFS0x7/J/KlFgtDgEynUhu7bbHiCqFCwvsBdV72qmHx2mFtBfExqKLkp7AP3Cas+zrCOSg+vG8zX19j7R4r5VEAwgDa4WVh/a/UEMX3ydRZBlQbUfUEfGunYb8wd3b3LmXGjpz3jgHKmWHpP7ACMTqFOxFFdMDlNcMNqzJ9aJAjd/RER9U+8vOupYUYGvikPyrxBqDsVk5rYunDfKqmHZWeW+SW0yX0Q+nDfgG+eA1XPSxBhl4wR8zWgkvkgfLAyiZNEbZ2JXiJH9bNjUdNEm/QhbSMi0of8hnEMr7CFbq7vIPL9C0iIEymtq0P6cZwHpn/1Jtoi0NoF8S3nmKr2wrBzvjVt/nS6dnJ819V+i5hKA/zk0zgPRJcWhKPWEEQ15k8tEoSjZtKE+wbzxfvviysCIg34rWON7Umdn9ABCYNUBNCP778PD3jBVRdPWcSvYMYKz6QNXcgKLuqAwLjwtUQQAVhtA/N5sHGTV+fZ2nryLrH41KVMUAmZ4q6FxBerzs4V3TbZdwLYxVXeN7mKs/h0J95iMb4L0MGuOmXdBdcKQajxhWRBfAqMa7jJujk9uE5l7XPfTVBn54p9bCt7MphULon9vIu7MtaYaOFEObPxqXf4xLJSyaC+wVNNF3jziKvov1aWrvDNq+wTHr3S86dWCcLplyZhEBHWxZA5z+s4GpDMa3pKyAliGocypRwdJ8Kpo0MD64N2U5rLXlVcRah9GqAMMTYuaFr4kXwwuloiCAOs3GlgVXrVdwC0SJMGdpyJP5UeSq71wUpZlFwJhkql6n1eBPiXgJW7HOfXqs0TAJUq0fME705Ndr3uMhUP1pd/meGHmcu7rMKgHxEwFuVZ/ieA2AkQDuwd4jtyN7J8ckgCqKjQzZRv6+w7gYhvduVqyf+m+jkC0O98UsmOg+lqEKvgmtMpMf3zZ1R0/tQqQShIOjuXv9Wm2L2aEDUGKUcxOUsuhvPQdDLUpYopP7hp9QSpBatXk286DAO1u11lEoArQIC5d/Cs4HW1RhB5kliwna7NYRWGjfd3tRCclxoeUNnlfK1upndD1tcAVt7TUR+1K72hJc7n6FKURm0sX77WCEL1K0hNFHGcGRB/HhlcYWr5ErF9p7ijHtvp+cvBODfCd6Y2FB+N2bGHbLLV4hdGENOnlQrNn1omiGmSiBTHLC/GAYecwZ+ZkasQxOwp7ug7nyFFECqNaMHRW/NBZAj0zYm49W+63A8+H5Au/aZLJrOzoNUiQajOFoGVYoM0E58xNpR82GRxyb3jrFdOIEr/vJtJHQAqrex5OtWgYX3fYrVIEPnOTidjsi7KZUcM8i73ji/DjNtj4ItGRpK/LhUjk/quufNVAOoEGPDwIyCclRpK/rTgDiMk33ql5k+tE4QCM0IcqgwBl0yM7/alpp2eV+G+v5QXRrF+YX7CrOsThHtQjtVE8wvvBWElE3cDONClJtlCwIPM3J+dyty2adOtz5l8FN4y0zpzUnlg3+dRj8wKn1CrBJEfj8Iq3rKtNQbrDCa7E6D9XSoMpQ76I4PutEHf3jTc/5tibPVny6PgHeMAP0lsjWRhX5fZvvtYmNVGMfJSdWqZIPJjykUI6HnFx+Q4gLsAeo1nfjl4MdMYEd0x2WLfW+67BlN8FZ6TWTqOmT8Cor8HY49c3S0A/4xBa6fGd7s7L8+oBOGeozu+59LnTz0QRG7s1NqdeLPF1ocB+3CA3phbxzIAP8aw1jfR1DX5u4moBi6mcnYRTtQqUl4QEAQEAUGgFhAoSApW5nDyZTtB1AJY0gdBQBAQBBoIgcJUrRGdhsOwEoIIQ0h+FwQEAUGgAgjkVNHfnA5hg/8morsWxLb8yNSPRYUysZqyGwC8Lde9SJnvTIYkBGGCkpQRBAQBQaDMCHjvZxizjV3CXud1sotaP6x99bsQhAlKUkYQEAQEgTIj0N6e2A9xGgRDXURPP8wXpEaSyiopMIhje3fiEDCpZGp77uhW+aL45tsUgiiz0KU5QUAQEARMEHCiHEztuZYJypEw/yjH27WZqalLdNaWyjqwqeWFXiK+ymNuXNZEW0IQJhKUMoKAICAIVBCBIC9qZdYKojEwTTgOimz/E4j+QeNVHxbloOgRyAmiaOikoiAgCAgCpSOQC/utwq+41EXG7b4I0OrUcL+K7Ft0bhG/twlBGMtBCgoCgoAgUBkEInhR5zuQfSWeV9om/rBplINiei4EUQxqUkcQEAQEgQog4BCFnU0QsBygv53lUU94Dsy/ZmB91oolH9i47okKdGFWk0IQlUZY2hcEBAFBoE4REIKoU8FJtwUBQUAQqDQCQhCVRljaFwQEAUGgThEQgqhTwUm3BQFBQBCoNAJCEJVGWNoXBAQBQaBOERCCqFPBSbcFAUFAEKg0AkIQlUZY2hcEBAFBoE4REIKoU8FJtwUBQUAQqDQCQhCVRljaFwQEAUGgThEQgqhTwUm3BQFBQBCoNAJCEJVGWNoXBAQBQaBOERCCqFPBSbcFAUFAEKg0AkIQlUZY2hcEBAFBoE4REIKoU8FJtwUBQUAQqDQCQhCVRljaFwQEAUGgThEQgqhTwc2Hbrd19R5DwB1FjkVl0noWsP8ExgaOWesO2Mt+NJlMqkQqZXtUDuDmnbd1s20dC9hLAXodgFfPvGA6Rv+fABpm4EdTLbxx84bkC1E70N7dez0Yq3T1mOmU9Ei/yjhW8tO2uO/NZPNPAOzjaWybDT50bDi5ueSXSAPzBgEhiHkjyvobSIkEoRvwU2D+Imxcl0olx0tBpLX15F2seOZiEJ81ixDCG80w4/YY+KKRkeSvw4tPlwgiCADJ5vjWkwYHBzOm7fmVa+/sOxPEX9f8LgRRKrjzsL4QxDwUar0MqQIEkR/6Q2xRb3pj/6+KwILau/reD/C3Aby2iPr5KhkQfx4ZXGFCVoEnCOCJOLI9w8Prf1dCf9DTc3rLROalJEBHC0GUgmTj1BWCaBxZ19xIK0gQaqxbGTg5PTywIcLAqa07sYqYvgZgYYR6vkWJ8S22+Zwwkgg5QaAcaqYA9ZLqv5wgyiHwedaGEMQ8E2g9DUdHEAwcmx4e+GHIOGhRz8o9Yhn7b2KM94LsDwL0LgAxT72tID4mNZTcZIJLe3fiEDCpd+/pKf8UAV+HTbctWDDx5ODgbc/nf+/pSbxqctI6CBYfx4BSR+1X8C7mC1IjyS8BYF/VT8AdxHQduqk5vmVVKWqmAPWSEITJBGnAMkIQDSj0WhlyCQThHQK1diaWWkTXA9jX8+NDdjxz5NjgLU8Gjbu9PbEQFm4G0TJXuSyYL4ONL4adAFSdRCIRe+oZOpuBL3pOIKG7c80J4kUAzQAW5PrzeNbiJZs2Jh8vRn7O+GJYD9CRufpTACwXqYb2sZj3Sp36RkAIor7lV9e9LyNBODi0tyfeiBjdDuAts4AhfCU1NPDJoB18R0einS26G8Au+boMXJoeHvi3oHoaAeTVVN+adaIhujo11H+OX1tegmAgTYxJEBbn3pElolNGh/rXFSP0jo6+t7HlWC/lT0e3AugBsHuuPSGIYoCd53WEIOa5gGt5eOUmCIck9GqirWTTktHR/of88Gjr7j2XGFe6fn/InootHRu7eUtUDLWnEcJjyHBPKpV8StdewQmCcT+Au0C4Ykf54tVM7V29ZwO4Ok8GzLiQCJcLQUSVbmOVF4JoLHnX1GgrQRBqgG1diU8S6MvuHTwBl4wOD3zODwCNiqck09KO7r4VzPw9Vx+eJ5sOGx3tf8CYICy+AEy3uXwWilIzFaqX+C6bcblFpHxQ5ARRU19FbXVGCKK25NFQvakUQXR0HL+nbTXdS8A7dgDKD07G40s2D978Z5MFmhnfS48MnBZRvTTTtMtiyALoJQZnYmx9cGRk3ZDJ+8G4f7Ip1rcgk/mOyyy1KDWTRr202ganLdB9QhAN9clFHqwQRGTIpEK5EKgUQaj+dXT1fo6Bz7r6+pLNfMTYSHJY1/+Ozt5vMuGD5VAxFYOPTsXU3MTLJqask92ObQx8Jz08cEYU4vKolxx1W9aym4UgipFUY9URgmgsedfUaCtJEK2diS6LnEvnnfODZsL56aEBpXoqeNo6+04mclRC+ScL4gtSQ8n/iLIYFwuwH0Fst60DZoXGCLnL8L5fp15CFsvtGN4iBFGstBqnnhBE48i65kZaUYJoXbkXNWU3EvCmGYIIUBsdsjjx+phNysrn9S6gMsRYm5maumTTplufqySAfgQB7JzxeD9nmfmE9EjSKIaVTr2UGh64prUrsUgIopISnR9tC0HMDznW5SgqSRDKgW1iim4H4X0z4DDuV2qbwcHkXzWAUXtn4nwQfUHzmwqbcT/Y+tZki31vMcH4wgTkRxCqr14HtyhqJp16SVlzCUGESUR+VwgIQcg8mDMEKkkQalAay6TfxinTPTR0yzO6QS9amti1aYJuIsZRIaA8SUwbbOJbpuKxlN/FdxRggwiiIESGoZpJo166szm+c2Jw8PrtQhBRpNO4ZYUgGlf2cz7yWiMIBYg6eWzP0BoClAWTN3SHHjMn5LfyW6BksSeMIILQBNkzUjMVqJeYzkqN9H9DDUIIYs6nf110QAiiLsQ0PztZaYLo6Oy9jAkX5tEj4M+w+dDR0eQvQhCljsWJ97JNXwXwtojoZxl4wCK+dL+9cbdpfooggnBOQ94w3SGe2apOW3fvp4mhYkCp5xm2aEk+wq0QRESpNmhxIYgGFXwtDLvSBNHW3XshMS5zjTVSOAkVW+mJZ2IHA/aZBJwYMS+EMn56BISzUkPJn4bhHUYQmkisgZ7ehXcwPKNekhNEmDTkd9emSsAQBOYGgUoThOYOYtYuOsqonUB8T1kH2Za9jIhOBOOdhiHB1QX3hfvvjSuDThNhBKFRM00CvCw1nFSmvAVPwQnBpV4Sgogi+cYuKyeIxpb/nI5+Dggi8JI6Chh5wmDCUli8KoQwQn0qwggiqprJrV5iTcIhUTFFkXbjlhWCaFzZz/nIK0kQPT098YnMnjepKNz5gTLwKE/FFhcTgC8MLJW7Ot6yrZUsuoAYhwGIe+psY1hHpofXjenaMiEIUzWTxsS3IK6UEE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cwQeguB+a1afTinA6MzoUrPgCbf55/R7scXhpyoI8lB9f/r1dGIQifkHokF4Iww5G6FoY/zDYuAeidZbL8jZk/lYrHoqHQsvlpDioPDSGIPGjNRhBKrHA4HHjqWVKPNF0E4E2l+wc/RLZ1QsaybQt010wgCCWPxgNJmXi+khiOftlsCBWnam8/bkdqGf8a5Yhy4unWEuWliXFZJt1y/sjIz14uVa8QRKVamZxPCMIHjvnnIpcQ+DSAPghgXn719wKY/0xEl7UG+KbCYVtRJxUTU9PtIJzdR620xzJ0NDOfBqJ/A2NXR//YyKDLxkd3/tWmTVeMN3I0V92Q0Lhtlwyt4WNYQUWFbdtGR4BxAgP7AZjvcGN9/rV3qP8Cxk8z4+mbyj3pWqhXCMKPBrzTCkHUBkcpRRAQBASBpkNACKLpVCoCCQKCgCBQGwSEIGqDo5QiCAgCgkDTISAE0XQqFYEEAUFAEKgNAkIQtcFRShEEBAFBoOkQEIJoOpWKQIKAICAI1AYBIYja4CilCAKCgCDQdAgIQTSdSkUgQUAQEARqg4AQRG1wlFIEAUFAEGg6BIQgmk6lIpAgIAgIArVBQAiiNjhKKYKAICAINB0CQhBNp1IRSBAQBASB2iAgBFEbHKUUQUAQEASaDgEhiKZTqQgkCAgCgkBtEBCCqA2OUoogIAgIAk2HgBBE06lUBBIEBAFBoDYICEHUBkcpRRAQBASBpkNACKLpVCoCCQKCgCBQGwSEIGqDo5QiCAgCgkDTISAE0XQqFYEEAUFAEKgNAkIQtcFRShEEBAFBoOkQqClBLDg4vFPbVooxcAiAUZv5qJF47K6mQ60BBAqFlu2e5uAQgLflm7PFBh8yMhzb1ADNkyZUiEBHT/hsAn0HQACgK8ZGd1q9adMV4xUWJ9kaFIGZMn5rSRDUGQp/FkzfUp2biPq3vbrTKuncU9NDZ0oHmxrpm7fUAw88ZlerteVWAjrUIosIqxJD0RuaV+LZKdlMGb81I4iOnhXtBPt2ALsAkNXsFPf7mdLBphiGpiy+o7tvGRGvA9DKwMMIWoemBtY/3pTCzlKhZsr4rQlBKNNS61bcBFBvVt+EHyaHomcD4Fmq/ykXe6Z0sCkHogkr6OwMz4WFdSA6SonHwFXjozufIrvx5lH2TBm/NSGIyXZTPIEML0omY480jzobT5KZ0sEaD7mZ0aLu7hUhm+xbAeyoTE3MvCIVj90yM1ovrSyHwEwZv1UTRGdn+O0I0K8B7JPbPOArieHol8sBJL9Xh8BM6WDVSTl7cy9YcHJL2+teupaZ+/K7iJQ9Nn74xo03vjB7UWkeyWfK+K2WIKgzFPkBGJ/Jq+6xjMWLNg7GHmseVTamJDOlgzUmejOjVV1d4U626Ff5XUSGGatT8eiPZkbrpZWlEJgp47cqgujuXv5umwJ3Atgjd/ZAFyeH+s+Us4epHxwzpYNNPRLNW0P2LCKAGwBamt9F3G/Z44sTiRs3N6/Us0OymTJ+qyEI9+7hZbJ5SSIRS84OFU+vlDOlg00vSjO/9q5Q3wpmvi53LwKyi5j5Ks1KMFPGb8UEceDC8L4BO3v2sG9OZ3w7MlieTMZGfeqQOnpXvBnpzDILtISB/QDMzw8IVVQGwHMEPMjM/Znx9E0mdtje3vDrt43TzSB8JN+evwQpHRoa2vBsQUHj3HIGwV4O0NsBBAGkAX6EYd2QsejyewfXP6mRhdpD4XdZoE/BxhIQ9s639RUADzPxxXMC+PnAQOwfPnFA1u7c9tKH2eKTgGy75+V2ZngBjDsZ1kWp4fUbFdj17GAdPZEjCJg4IGXCuamhqLrMhbzHzTEgnAHQewG8IS/38wDuYcIle8/nVCwWU3os+3WEIp8jxrcLCRk4MjUc/UW1deXuFwRPJMbxIHongLk5feOvDNyUsayLPPRdts0FvYGwkolDAN6c70/ZvgsgwcC146M7/8qvJ1JnZ3hPBGkADNVHleoTY3Nw2Ka7Yy+VbVgFCcLhcOCp57EfbOsTr9W1GMBb8lip0l4B+AnAuptB6/bePfNbU73qxtGBPX3/aoH/nYAjJ9WT7e/8ZwL1p8fGf2Yy3gvll+o/Sk8tc19cQuDTAPrgxPjKyoWHGXy9PZZe66c+p1z1Gr/t7SvnBVoyfQzuA9G/gbFrvh2qPz8DYASgWFvQvr2SecgpU8UE0dkTOQPAxY7CVieHo5f46JPUtTASYpu/D9CHfORLE+OyTLrl/JGRn73slc+LINLpwIuwrK+A+Kz8IPYqIq0O3LeN7vztwqDu7Az/CwWtS5n5Yw4C0+V/hixelRiM3WMoF3UtDH+YbVwCZCcvry9DRD/ntH16MJhpq9dNai+C6OrqO4At+5oybVaT2kMgnJociv2mHB4eA/zWzp6+jwL8UwBvKlUGAXeNB/mEewdiamKGmvCefM46nZi/4SAvXRFF+i7X1uxk+ixFAHwXwJ7l0gN4GqBTk8P9v/RhhqWOnshPCPh4vvwxgI9KDsfU2URNv85Q+CAwqTH9HrOC+SGycEZiMPY/PuRBeyi8HzEpmdRlwHKf0XgvRxA52fCj8n0VaTBdCNu+wMdity7j94De8PyWjPVDZl5eZu4qwPEKiL+GNC72IcskfVREEJrJ19fFOMW0ra978ZtgqElabZ19fwzcb9npoxKJDX/VZdYRBDKZwzkY+D4xDjOsMAPiLySHYt/r6lq2j20Fbybg/YZ5X2FgWWo4enep9NlVx9wXz2XgAkOlq+LutjjzGZsCN9cj1IaOIIisYdj2jQB2M8RD7SzPSQ5HLy01mRQRBPNRILydQGpXoXZ5ZT9FEtvmcBhbdnm1be5LFzH4ZMN+lmHgh6nh6DnlJjy1WECAfgZgSdkGTU6QIeDr20Z3/obpbqKjO3wkEW3YLgNd3xZ8/sSBgQG1YqzFRx3d4QgRXeXYLZiWayyPItSnn6UzGPhv//XQo7DoY8nB9f9bqmG6/kNEapevSFztGo0+Jtw23sbHltup1Wv85r1F1XhXFhafHw+kg1hZWDT5yVwRQbi8K9RYGgmgZenw8PVbDCqfFJJjUvr81hKwHsj+nbgNzO0OE9Dk5IwrW1s2n6YbKBqCeBrg3xcO/PIFqa3l3QD9DeA3gbDQsV0r1LUFZIWJbTWJqxhTuY/xOCz8BkzbAPv9AC0onsDKmgO8schte0u1TRHPuxwrV18kbaCniSRFBAH8GMBBBLzDUc5mBu4h0MsAvxVAt2ZAlg0d4R7gANSN4qMdZSkz4CbAuj/bP1Q9nDVzTlpoEPB5JrYLoV+0+gYO1uwqyp6luWKOTYYyZw4cVH2KwTsS0ANgLxfeGQZ/LjUc+4GJHnp6lr81jcAAIWvOVF9NvQU7Q+EDwaTMeG6yV2bCRG58KEsn78u5VX/BjFho/hgzn5CKx/pLyFOmr/MfHOP+vWDsr+k/m0F8RHIopsys2s+g/2RAUF6WcTV2S8gEpynVo7q6jN8S/U2Z/CZwK9HfKr5sWRFBuJVAjCsT8eh/mHT29p7wAgukAvipkBz5jx612T51nz1wj86m2d5+3I5WS/oLAH/WNQlvJpsWJRL9OUJxfBqCcP68hQhnbnt1537nKi5vT/88iL7omnDGVNiDXAH8W5tw4shQ7EFngQcsXLF30M4oc0vuNnnuK2kOcF2GKuR5BcxnjW3d5Rpn29Tq64ln8BGLrB/lJ2C3yHUjCFfFavL49F67c9SpO4X/1jT9JwHnu3UGy1ritRLUDPBCdWp1f7k9Nv4ll41YOUssBuMa1wSnAtxZeT1uAfPqvfZAv7ONnvou4Y3X29sbHEvPW8NZO7bz44dsxpnuPpw1Qz1HR4Bxhcs89ozFmcXx+A1/LDduNH05w8zLanFxrrf3pDnb0v/8GUDLCu1Q4T3IslYkB9ff595JZXf/c7acAKILJxNF6cVQVyiynBnXuib9vzHTWeNbd4q6d1M5mbEaRF9y5XnADqaXjgxseEqHW8n+w7jJDvA5bjf8bD8I4hww/Zerrz5gjwcOHhlZp4iy6KvX+O3sDn8CRJc75iS10Pr0tld3vlqzC6XOhSv2h61Mv5NMhWUXPjoZfRNEvkPFADp8okMxHZ+K96vtdrmPOkN9a9RgdSQ0vXlNHaHwicR0pXPyZo+6SxBEyVWI27XQKVDBdOG17ezoXfEWpO07nCtrBtakhqOfdgPjDqeQ/30zLOuY5OD6hBeQXV3L3sxW8DbNVrPuBJGNE2TR0anB/j95tNfDdOFtIvEY4BOmPi/Tj+ZMrNCkkvrOH1xe7rDxqyp+PxYMLto0sO7vbrmKd8/ZFHcjw33JZOz/vPSmXaX7cAvv6IlcRIByIc9+Xv2q3AB0/96xsO9dZLNyNtm90Ae9Fl3OvB3d4T4iUpNQfuGEMQY+qjOp5hZP9h35HW+hmAeR4aPKRVzo6IkcTICaWyZ2Nwx8PTUcVcRRFMrHs/8wn7/XHvhuiUN13W7Ak4jrNX518y2Asue9fuaiUn3GN0G09y7by0oHB7d7L+GfNvOSkXhsuFznXNC78o2t6fSvAXqfI21ZYQtpe3qO3SWD8dsBap8YKIQvpoai33TXXYIgytbX0d13HFHWtdD5Ga343AMZ4FvbgjuEBwau3uosTDPRZIhwUmIo6q63CFZXYMTC7/UmiC0Ma2lqeP1IGb1TZ3f4XFA2yu/EpO01CekHeHkPOY0ZRtVl5Baan4TUwXFhsnuWLVqkIb6iBY6fYHoa2YxNRZo++RuLtx4Rj9+iTJEVfx3dfUuJWJmXciY6xj1tLXxUOe8X3UKKGN9MxKNq9z3p05B3WVPRpLESihzPjKsdC0NP3LT9h/lm2FhZ7qBWeQdZLRllup04pGeP+aVe41e1iVoyg45Fp/E4L8bd11FAVgX+CaI73GNR9nbnDnklPmYH0wu9tnxORWe9gAJ0OgPKxWx/EDIBzhw6PHzDo6Y9vDMUuRqMEyfSE9Ymh6LKLXTS50EQRgNSZwZTAdNSw9FPlD287O47BcTbb7t6DLiu7sg3mHDe9kaXPa9wyqfbiRl3HFOsC+ncZxC5nmN+KVK3gvSy72oGuPLcOj4x1L++VLu1+iY8gjT3JpOxp0vl1ayitVgWu5zCxE49UXWxa7giMDoiFe9XUZBLfu1VjLuSsrtcmP2cJ3aEIucRZ3c1TwF0H4NvLrgkF+rMB/K8DaCuwt9K7QB0bdWVAaZTk/F+ZXaZ9On6j6k5TpkPt6V3u145v5WbX+o1fjXu7MYL8pyXId/IwD8B/M4C7uMMrylHlJMmmnIds0gBuVDEjvj0/lnJb53O9NURhH41726PbjXqZcoqwsc94DQEoZvMvFZfXlhpJox6EoRve6bpzkozwL1W864FgWZwA7G24OZjy3n7mN4p0ew0PM/AdHpTE9DW9G7XEqAmy01g/gMHrPUlTHQTxWj65Itk0+JEov/easZTfhJR0RB2zpdj7JVkUq9msVVRPy2ekPW61bhJPxlEptd0EVpUj2YBWs/x29195BtsmqN2eAdtx7tyryQTnVVHEK6LTMou/4/XtR3z+zuvVSw15V81BGE6CWsmDE/7aiUEoRnsxuUX6qtm6+lXScU7CP+LgvwbBxMLC2Wa4fHAQvcBYDFBmNfl7humdnpjgghFziKG0/OoJmYeE31o9K0M8BOXCE3KMF6dZxNm7678lAOBWGpgvXIlryh0v9s05qX3cu139x+vcyLNAsOXjoryawii3uO3qyfy5bwbvBOmF0FYb9m0duvWnTaZukyXw9n9u28Tk+kE7bchJdJTd/eK3dmyP8KM4/JMut2f2YeJycBtLdsM0wlD1+aiyVSzg3Cv2gj4O2w+JJGIKa8Ro+99i1ft8PpXt6ntY8H1tqKVmUllRW6ujOtS8egJfiYN05Vk0QA1tIkrOYoIwnHju5ScpvouKr8CHEzw1qXRrVqZcHZqKKq8iar6uopt/JPLm7jJj3Xjc3iw3N0AZ2bNyv8ZBu4gkM9nVFndTj+0UDYD2p1BkYelzwWsCUHUe/y6I2ZrlD0Kwn2waS230B3VEHrDEoQxSPg7AAAbC0lEQVQaAK+mrT0CxPsB/K/M9EECDnCELdAPAj8EYehtZTphVEoQGpv+pDAgpqPdNWEVEYRGDpOii9qiuSindQwoVbhm1aW1pWpWgEZmojoQBHV0R64hwvEFOf24d5sAXyqNB0FMhDyppvzcZS/jC4WZ/O5ibZoC68uFJylaUFbT0Ml5tQsikwm+VBNM8tdr/Drbmd9BqYN69x0UnTibQdjAbF1dZTgUf4fUfg5xDPpBNqYRMX2WCEdqLqgZFJE9Zjc+pDbdkgtBbI9ZpZRQKhaTmZK0uzKticRkgHrVOZU7iKmcoE0w1LqXG+6QTMp3hA25qFw4E1d5DxDR+XvOt2/VuZAKQXijX26B587pM0RJIfuLBHw/M96yplRoIq9W+jIxeXiKaCfoUp1SebUEMvaFRNkbsn5Cbagwx6rN2+PxCEEUPLrquYPwvXLV7WZ0hC0EYTyh+PKgMiEJlWZ7QDucC0C5k5uEN1GXGK+ZE+Qz3e6xQhDG+jQ1EW9fWAMqJpzJjkI14gG2KGLiEOFssU+CMHcD81zlLVzxAdj8c4/bwM5szwP8FwIN20wD4y3WverikukZiHbFZ3ioJzuI2u8gTF1JG5cgivt+PU1MmjOnKSEI5wBUu5at6Vd7iLAcDHUx1h0yZNIwJ9BlrcHnz3R6jZmOV1MCK5eumv6T3S27nHB0ForpMDHp5M4Gonzeegdl+Ggm9BHw7jKEXvIWuq4OXwShCqhG4Xl/5ptc4ShUsU8zcB1g/Wo8SA9sGlinnlXUek2Y1t/IBGF6YFtqMGjMfaYrkHJjrOh394CoZGLUuFNq3VdNBuh0mJh0fZ+n/5Da907Ot/IdGXIXXe0Pvxby+9+LnEVy6Yrcfru6Iz9mwicLxUy112M1/ceUIBp1/GbNkPbWD4LtVWCo0Cm6QJplLwpXvINQGd0K9zoD0HVE1+MnKokKnPVjpPls08sbTUEQxbfRfcfW0dwqrxtBeN0OLzX5FN8E1oezqGaAT+UZRH7yUBfDVNjwwufLhTJbhronQ7gKzM+B6LcqsF9bcPM15e5qTKUXUyWkoeKjUXD8EuehvSrH7VnV4XYNNry8WEmbTCf4kv3UYAehiSbRcOM3e6b0DE4C0f9zxrLyS9C+dxCVuiHqDrgZ8PUQu/bSyAw8g9CaCzxiNnl15lqsYkwHoWZLbXQj3VG++02DbHRJ3c30hiYId1gKwOgSnxNn0wtfbt2YnuGY6jS7I8o9aboEoEWKuxjYjZmPNQmbo/JndxSZzG3grLdh7nONR83lwores8iGjSB8xUGs9yLDP3UvLKvpP6YEU8/xmw2rw5nDiKhTPaaWHzcqqKDJp8bdtwjZ86TC58tj0j9BFN+k9gxs5pRAG0fJ56TY1dX3HraygcW2b51mIEFoOyLwp7RlHVrObbCAqebyTB13EDAKf1Foqy7EhFf4jGoG+FTvIDRyKBGNt+x+Qka4R7/pGY7JrFFIUwvPrHI7el18IyLq3/bqTqtML3flXgNsuXXyA0P6qAjV9B9Tgqjn+K10QV7QcbXnJb4Jwm1L9rqw4u6oukB9fmzZWV/t1710LTP3TSp7hhKEjuxMY9R4XJypJ0GoHcD9lj2+OJG4UXmWlfrcb5ertJ5hlKsZ4FNNELld8Ly1AB9bENhXsL7c4kq9b1EICmgcqmOqYjG5dzR+dvUeBOO+I6PTf9l3QZwdqqMnfDaB1BO3BY/HDJhPScZjPykiUgMTUanOatr/6jV+NXp/2WLr8Hh8/ZDJYqDam+W+CUJz5d8oTITHtuxhBK1DUwPrHy8lbC5eO/0ADPXmxCS3WK+DwkY+pM7Lqh04THx6aii21vOQPveSmXqYRT124/zqShC5iunatqB9eonIn9TZEznd/ZpXqRvtpgNU11+mmiBUnbpw3+XCwKt8uhfB1ALJ68Ert3ydriCQfm3JXuNLH76crhgb3Wl1uRW+JuS39vJjd/fyd9sUUPGe9nC0Qz0wdVy5Fxc7F67ocr9cWGpxUk3/8bODUJ2/MxRRc9JnHDKN1nr8anedwINkpw/zek1zYvegeX7ANNxQoQzfBKE9SzC88q+PKaJ/gEc1MP806UfB/C3Pt2Q9QjHMAIKAx9sOXm/wej0EUtDlNBBE1tUsxcSfcD+glD3EbBlX9s9TJr3fUebcqZoBXg+C8JgY8g9JBT8xMrTuD05yz11AU+FQSK12nROkUfj4gnKLvIE8QmubrCqdaTx25ipMuvZxnTzZzaUAnZmPD7Q97E2JsNqaXYAqapSBb/N4y4XuS1z5R3xW5x/xcfr6l9x9VNN/fBJE3cavPhSK/oGqwuIz98a99WPXdQJffS67BPTbobIdxB3S2jBqZomYIhkwnmRCKvdkJQJg+4MgeqfrNakM1CM1wNsc23StJ8lMIIgslt7PPebiqzD9odRTgg791ZMgnK+1qSZMesbR+wlWlH0HoJoBXieCQMknR4GnGBjOP73q9YytLxOLxjnDaNduOrY9Vvg5vZqNS5W27MNMrXNfuhi598HdX5qBPxLot9k6vZ+sVRfyvjcnuPl8L6+vavqPX4Ko1/j1eJwohyHhBWL8jkHqGdXcs7CED2oiU5R9dEvXXyoiiGIPGu8XuNyV+owp4sz+CueeAo1bzHcw8Mb8j9r3KGYKQWQ7pebVrHKDWz2qbgFpZhyZT1tHguABAv2GAaUPk5u2qutW9Oi8HzfqehGEwju39Sf1jGiknK5cv5c1QxSNmeJX30o+hemzPdnklfRBRz3PkMWrEoOxe0rVnbcIfBOMs3xGUCgsQi4ce3Xn80qZvupNEJVi53f8HtAbnh9Mq/fZJz1pbKrqNAFf2Ta687fLmQ3dBVZEEJrXpHytaDpD4YPA+JGn2WhyK9Xq4tqMZV2gPHw0h91aH+SZRBBKXB/hR9JguhC2fQGCdJnj8aT6EQTjHjvdcozVkl4I8E/LxO7xMplpO3c1A7yeBKEa7zd+kZc5rtwoL9qx+3isqVzZzt/VM5WUzlwFUMhwAk8T0Q3jROeYet+plULO/EEq5tPEy22l28kPkYUzEoOx/ykXQbia/pOd7Cs85K7H+FXzLgfogvzTs9tNe6XBe4As/rQJdjXbQaiCig7NfNpEHTFfVqmzPwDzHZ3yeQJ+z8z9mfH0TcWP1E9+11rnNjfTCCKvnGycFQv0KXA2jLcKcaxW6GmAH2FYN2QsurwwGP0G+/IzWUyaOEo8gpQ7axj75Gs7hBMcV/1HwfwQLKwLInPd0NCGZ03rrnSAZvuk67XBeoR3z+4mFpzc0jL3xSUEuPty1kRDoAHb4iv3ns+pEm8iayHSnPn5fqzJFPtCuuxkZ2fCBCx/zRFBmXPnOcoohMDpz4wH+t3veZjWlSXX57EfbOsTgH0wQPs44gqNAvwUiH7tNyJpNf2nGoKo5/jNzm1paynA6uU7FS9LnW0VdvKvvHbT/QnAuhuW/ZO95uFBv33OqcOKdhCqgGKfcHMzk2knknSNgYDJGxeN0dLma0VxmPTy73M3Hwoi0XQhUDFBqAa7vJIquiE5XYJLveYICEGYY1XrlK6H531dUKx1W6S82YdAVQRR7P1A17cFnz+xXFyZ2QfzzJZYCGJ69Of2gfdziW16Wiy1NhsCVRGExifc+GZoswHZzPIIQUyPdjt7wipO0s15l+4MEU5KDEWvm57WSK2zEYFqCaJwQ1TFR1KHTOri1NdTw9EvlfM2mI1gz1SZhSDqrzn3BTbZPdRfB1JjhRfl3MC5PAeeQIYXJZOxRwTg5kBACKL+euzuXhGyyb4VwI7ZG8fMK1Lx2C31b4nUOJsRqHoHocBzR1uUXURzdSkhiPrq07178Bv9tL6tldqaGYGaEIQCyLXi8R3zo5lBnumyCUHUV4Pt3eFDLMqePajLULIjry/8UpsDgZoRhDqw7uiJfJWA81X5fiJVikYaGwEhiPrpx/Us7xgzn5CKx1T0XvkEgbojUE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data-drawio-colors="color: #393C56; " style="box-sizing: border-box; font-size: 0px; text-align: center;"&gt;&lt;div style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(57, 60, 86); line-height: 1.2; pointer-events: all; white-space: normal; overflow-wrap: normal;"&gt;Put all x86 CPU cores into ACPI C3&lt;/div&gt;&lt;/div&gt;&lt;/div&gt;&lt;/foreignObject&gt;&lt;image x="2" y="1060" width="98" height="46" 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XYzpBfD9eF+aN+8pY4mMfmGQ9oCaKAxV13l+HX69vr022MdCwhYitZpZnptGS8W+WumPSnBCqmTQD/A6B+Bn42Ws/rgiRYEoIo45AXe0ldrGhBF/hqIwi1MNXMeP0kYlwGwjEuGbxcoaxWgshsAsZiNamL6V2WRoQnRkKhU/zGN8q2oRL85E5V28jkkwYGYgm/c1Cpm0ImqZhPKvNb5rEH7NOF5AD4/rrwntEggfYUoVFNep3VGkcXi8yv7NZyGiu3soQT9ytbMZfUfvtwKycEUQoUHdoQgihbTmpHqxaP4dzp24UXQJkTxbipcLUShEP46LHFOUCmteZI+/VMuNKC3S8N3nFaPL52e4DPQ6m8lKObynqYeyYEgNMGiSsggGOQ4IAB5M8U1ZHYdPOkDoKJhiBKEpdKexc4hTnsVY7YSX+EIMpCENTU0v6ZnX4MN3icGLLqOWwAsdoJ/7IutOfT6fS2fVIcVukV3zW+03UIlV6hZq45sb3uIHyrmfIsdwpYtJVQja3tlxBjl1e3zbFS+z0U0Fc5CSITPib1RgwglaIz+5Q2FpOK95RCarUyoSXCWjKNx+PxLhVWPc+HZKpPEM3NHcewwSq5095e30uQBVYX0sRvgqog/fgtKwQxtq0MlA87qIpqMu4gGls6Gwim0gfvYxn89M6cAr8mGLfCxLraWvOvAbx51VepzaVRyQShsWJKZ30K9rB8yE8Z5uj8gYF7N7t9KCUjiHyvW7uJKDVG2m8nwtmWxTewismBIC5N9vV82++C4FZOsyiXZNec61MXTtzplDLVBKHLHcGEorHWOLw6foelGFOvNnZLgshLLBSQIPIjb7oTTLkJwiFvsi9zvdwEmQ5mrnrVEveC6Osq38UE8vQRFjxv3ArM0OZ1gtCeMhA8H4RmDEt6kdzc3PE+NjIJdca90dUCXluz+YISOORRU2vHCjAvt25wiOjsgb5ulfdjwjPVBKGJn6UW8luT/T2fLCY3hua9HCMaeC3upfh9tyQIjf7Qt25ZE3nT8wRSboLQ5h0IoGtXEynIkblCTxC6oH25bGfrdV7Wbikts4v2laRMp4tUqeT7EORfQGsugQNnlNO04Ts9qp/FxGEj4ltl59aHQyykZ8zR0PGDg6s2VRpB6FK8AnCU1w+++ox9wTcKfvryW0YIYgwp31nCtGkJpzhYn25xCWreqMvHW00qJl0sJuuFtC6gn3KqdFM1aY77wRdtXRBFTQhpfb6FQI5u+TvwgCdjP4uGzhFROQ2aI6OnFhpu3NEZ0eVydqpPEAorTYrjNDOWJ+M9E9Ie+8FVlXHAtuhTid/+deV2S4IoYremvwCdYoLQLGSBVAsO6Ter5g7C7+KvTVPqomrS+0G4546wfWTUFIl+HkRfs/zd0VRWs+g5BpzM21Hr76CWJ/p7bixmgbDXdczkBzyGNHfoQom49e8SSt2dvMsQ7jsoTjoTZgCe4eN1/TiQZOANSdB38Cq/WxJEJiJnmHrBeHcOIB8xb7RJYDL1AxKEUxISr8Fy+l1r+eASrNDajiIHDtHdtlDZY6/lkB6zwlRMOtWSNn1o1j/kBzaTU23ZHEY6hyyld2eTL/Lw2KfG1ug5xPQ9q1WZWwj2Y+Z1Hhw2zYcBHLlrjOgvMOijiXVdv3Ye/4WHsBF+AMBRuTJep6NC55qq19yc399Ye45BBbXdqfetMc1bLImScuVcx0QVqoQThEMuEiXeFnWXMvsgdMdiMWUk4fqonB8G4zaAjp5QsIBow159Bf19tySIbORPu226wu6+lGFc9MS6rhesQKrLz3BNzTVMuMAe9dEPQWji2DyLNC9wixcVZCAdEr6rPAQ/4NGaKwYH79xmb0+9U6gufCGYLnPKN+BkXldJBKHPKOcca8nhtOQYfsMtFhNg/Huyv2u9/VIye1mu0o2eNzE/CfJyVNjHpbm1fREz7rCZKm8H8VeQwkorKalwHn9/CccaZHwf4MMsbY0w88eS8ZgK4FeWp6k1OhdMP50QPn2sJzXvniDQt0bqzUfs3snjSZUyuaczwQ+tIfoz9UF8RaIv9k23y94KIQintLdZzPk5sPEdA+aDO3bs83Iu0sNYiJsts9igeQxeCqZjNetKQSeRUg/27koQcAmQlgJ4A2A8pT7uncnTjybgvZYBTBPje0xQ9uBj3rFeJ4hIx3kgtusls/4IlCLGutqaGRcE8ZrVLCxnM0Mll7EkTMqUyqSlBBm/Gvt4eS9iNFrSVuaa2g7CJuupiglXJft6VHjrCU+lEIQuJ7WfMN66nNRu4bGdd8xqq4HXwFiXSeVKXKdUyeDMvLCPw3ZmWpaMdyvPbLeHmlqjl4Ezaqm8NkgFCQQ975YPAvAfjLCYBSVrlqq81Q9ybCeDD20d+z2Dz4Ga98pVT4H4ytkH4lteO+9KIQgleCTSebRJ5hpXHIIBvYWIlw70xX4WrFrpS++2BJE5HvpzLLOinslFDDN1KxthZe435lTmQRAOFhqWdot3OFK7kroZW7/L4HNdPkCHGcTPkWl8zAxxi9Whix3MOiuBIBx04b4C3DmkHnVVa7ip4nx8li+RwUsH1sUe91E2E+jvxZfpQk3CIK/qaRC+PfLm3lf6jUvm1aDX7y5qIq+q9t9fMpmXDcZjKiuiY3KlXKVKIggl09yWjsNDMO/MUxMFRUGp6UzjY7pEXYGbKkGF3ZkgFHxBQlO8ysyfTcZjPa2tCw+c4HXsbS2i1Ufnxo9d0nsGGeMC0mK+CuYvw8QtSnWRd9ntEDCuEghCe+EcQGerzTCnzBTDqZMHe+/ZqMM9QyxhLAfTF3ymAQ0UIdTeZ4B81Krqi8z8H2p++llgg8wrr7IZQtuEfzNNup6Qif1lP/m4NfE6Af+VHq1ZoVOFOlWsNIJQcmZT9y4G8GUAb/fCzfa772jUAdstqvjuThAZ8MaD24EvADLRTseinGaOx/x7IrqpNsT35byQ8xySvAki09zYZRRdDUDpHK2RVEvqkZq5M6mtWcLgDhAdAca+2Vmi1Fp/I6Y+5Tg2PDzzF9adpsZqR7sjn2qC0KmWVHRfg9Pz4/HVv/X5RegsjNSg3zwyNHO52w4847GcMk4GOKrubG1qExUl9M8E6k6NjN5ZqOmn5R2ooTV6pMHGuQCrzGfvtOjtlX/AOgbuGB3a+6HJOjW44ZuZQ+HUqSD6CEAfAPhtE8h0TCX3VwL9khixHTtmbihE7kokiBwumeyDm4zDic1TiekEBo7Iqp/CFuzU2G0sFgefc73gYlNCEAVLKxUFAUFAEBAEJg0BIYhJg1o6EgQEAUGguhAQgqiu8RJpBQFBQBCYNASEICYNaulIEBAEBIHqQkAIorrGS6QVBAQBQWDSEBCCmDSopSNBQBAQBKoLASGI6hovkVYQEAQEgUlDQAhi0qCWjgQBQUAQqC4EhCCqa7xEWkFAEBAEJg0BIYhJg1o6EgQEAUGguhAQgqiu8RJpBQFBQBCYNASEICYNaulIEBAEBIHqQkAIorrGS6QVBAQBQWDSEBCCmDSopSNBQBAQBKoLASGI6hovkVYQEAQEgUlDQAhi0qCWjgQBQUAQqC4EhCCqa7xEWkFAEBAEJg0BIYhJg1o6EgQEAUGguhAQgqiu8RJpBQFBQBCYNASEICYNaulIEBAEBIHqQkAIorrGS6QVBAQBQWDSEBCCmDSopSM/CDS2tn+OGN8YL0u4LdHXs8xPXSlTGgTa2trCw6kDbgP4LGuLBFw70N/zpdL04t7KMfM6Dw6n+RQiXsTAEQAOAhDO1hoCeCMzDRLR2pF685ENj8W2BpWrsaX9NALWBq1nKT8E4BWAXwbjMZOw9h2z8GQsFkv7bTNvvgN/DlOqta/vnpf9tlHOckIQ5URX2g6MQDUQRENr9KiQSZekU6GrBwdXbQr8khVeobm5431s8M8B7G8T9RlzNHR8ud55zpxza2rqtywkwpcAek8AmFIM3JE2jGueWNf1gt96JSAIXVcvArh89izu8UMUQhB+R0vKCQIAKpkgWlsXzkpzzRcY/GkAf6uknV4pJ09TS/uFAFZq2kwT0dkDfd1dpewPADXPi36YTdwYkBjsYmxnoqsOPtD8nq/FufgThBsMPSP1fK7XyUYIosQzSZqb3ghUKkG0tHR8IA1+GMAB2RGoKFVAqWbFnOOjM2t34AG1ZmfbHAVgAAiN/Z8fRBqLEomYUq8U/ahTQ92M1z/PwDUWFZK9XaWyeQWg4cwPxDPB2Neh8zQIP0SKL/WSsUwnCItYdPPI0MzlGzbcrDDUPkIQRU8haWB3QqBSCaKhJTrHAD0KYJ/pTBANkWiLQfQQgD0zazFRN7N5JEDvz773NjL5pIGBWKLYeanIoXbG1pUAn6tp60UwbuQaY1Wyt+tvipmsZdraom/ZMWrMJ+JrAbwvv76PxVlzgmDg9GR/z0/9vFtG/tot+1PYaGU2r9GcftJEWDbQ1/MTIQg/iEoZQaBKEdhNCIKaWjtWgHl5bpiIsNRkHEvAx8f/VprLampqjV4Gpq/tOp1kehhSl+Gc5hVeJwBVOBqNhl58mS5k4OsAZlimV5oZy5Pxnu87Ls5FEoS13aam6AwyaAUTPmX9OwNPGebo/IGBezfr5JATRJUuCCK2IGBFYHcgiIaGxQcYNenHLDvyLSb4BGK8nYjusSzkRV9WN0aipxORusuwLuqbGViS7O9RMgR6mlvbFzHjDlt7f0eaj0skYn/SLs4lJAjVvlLP1e2gGAMnTCQqXpiMx7TWUkIQgYZZCgsClYnA7kAQza0dncys1CG5+4bBEGpOTqdH90CYesF4d3Z0irqsbm4+c3/TqHmEgA9YRnsbEZ810Bf7WYEzgBpb2r9MwNUT6hO+k+jrudSuolJldHcQQVRMOjmbWqInAbQGQG3udwZWJPt7LpYTRIEjK9UEgUpHYLoTxJjvw/53Ka2NZmFTi+8tVjVTMZfVWisp5isS8Zjyf5lw1xBkXmR8J0xTGRIcaan3fNrg49aviz1vb6scBDGnbfF+tanUzy13NuqNHq+r4QW9vbF/5slg9/sRPwh/Q650iy+8HDqawIsBng/gnZbj4yYCngbh9toQ36cD3quX8fbJXAbOHAkPGbeiILwG5t8TqDs9GuoOYvdtPzLmdiQNDUv2oprRK7MfmbIvHwLzc0z4iTmSum39+ntfc5LZVVagaCzGj8fDdBoYH2NAXUjmrHUyFiQEPMvM3enR1H1usnrh7vW730tqdUk5PEprQDg22+YEq6K5c8/c16gNn0Mg5ex1OIC3ZsttAvhXDLppdGjvh1wtTIKZQWbUMYP9sQ1u76jkCtWEzwDhEyA6wmKNk1Kms8TUl4Z5S2rHPoNusnnhGPR3je/DCAMfyal7NDvjgi6rNVZSStSiVVa5921uaf9S1iIq9yfH0045CEIzLxXnZU5i/f13bRGCCDoz88tnbaLpu3rrhLwKrwO4evYs/r4f2+fMYvsSLSLCVwG8y4e4KSJaPUp0uR8nHB1BkGFshMl3A3yYvj++vy68Z7S398c7bL8HtQ/fDuKvIIWVfi74VF+ZCZ2mr4Bxnk1/6wRNihg3pVM1Vw8O3rnNB36BihRLEG++ud8/autfvxiEL1pIwUmGVwH6RKK/W6k18nauAc0gXQlC7W5DpnktAUtdzDmtcgZyuAoEsqawRhc+YdHW3E8owBxVJ07yNLa0H0+AwntcBUOMrw7Ee64q9h1UfUV0psGrCXiKCGvJNB6Px7uUV7Kv8S1WxaQnCGfvaLmDCDDqyhIAYfoWGMoRKasH9dsA3VEXNj/jdprImMalaAUBHwvePl4ig5cOrIs97iaRfcAJuJiRWXyPcqin3eFkrCJCxnUMVrrLgFjwoBlOf3Sw956NbrI2NUX/BSHqBnC8X5Rz5Rj4Aww6I7mu+3dB6wbBDw6hNnQnCKTTpyIUUmaP7QFkSjH488n+2Lfti0ipCKJ5XvRYNkldoKpwEUGeNAO314f5okJOyX470u3qdYt/Y0v7dwm4yNJu4J1/c6T9eiZcaWnjDZP5pMF4rN+vvKUqN2mO12EnAAAcJElEQVQnCFExFT9kHjbR2wlIMuh5ENcBiIBxqH3hJNBNteFNF/X29qrj+oTHwcIgV8ZX+wC2M9OyZLxbWXRoH80O+DWLGkE5F8UB+kv2NBEB8Gd7+AJXLAivEUOpSJRONcTgowl4r2ZX+iyZqVMGBu5RNuR5j0sfGdUXyPgVgLQb3gD3jtTjDC9v0SCzo4gTxIsAPw3QyZb+hkB4Eky/8cBKu/tvmtf5IZh8/lh75n4AnWrZ+W5jxloiejPb3xCH6TvJ3q6/Wt/XwbpGFVEOXWoM42AaJvChDDTqTj1MeGC0js8qJc5WGTW7eu2ibfeRUO8QxLP6/fOX7vmWN4fvtVr5qI0Gj4bmBVHjBplPbmXLQRBNTdG32y70lQixuvDms3TrkpwgfI5mY0v0UgL9p23Rf5WZLhndMbPHpo+lSKSjwSTzVptzypDJvGAwHlMOTeOPuoAbSR2wgsEX2MR5iZk+e/BB5hq7eiqjEkib3ybCGTaZNsMwTkqs6/q17tU0A54txoMcDnVaFxC1Cx5K4x2DfbFnLW052IfzcybjoncchMftso7p22uUBYc6qVhPGw/Xhfmj2suxls42gvmARa2kdqtfqw/zN3Tl586LHho26Qd2E74gC4SfqVAEQVibV4R/fW2Yb7S/ixrXGtO8xfYeyiNsZaKvW+2OtZekhVxSjxGMqZzOrDGNlPNUVwipy+0B2ZT6c+PLpE4/Sr36NusLuW1+/ODqUibP92Hnnd/ASD1OsROS/v7Av2e1ClWS4nDfRNWuo3q1yNfyrl4Ogsi3BAOY8PlkX49a2/IeIQjvcYJafEImqeBg6lSQe55Fmhc42TCrQs3NCw9hI6wWOYv6Jn/CNkSiJxiUMT2z2Fz7UsNQU0v7Z3Z6ld4woS7zGphYrNPz6wgio44JGyfad5c6aDQLkSr2GNLckUjE/sftQ29sjZ5DTN+zLvpOnpx56gKPBVL1m10g7gOobZccpf3AS0AQisDPTKzrGnDCSnuaJPwJKW5LJGJK95/3BCWIjLrUwCoQLbA0pk6Qlyf6e9QYOVrrNLQtnG2kQncD1GCtq9v8+Pi8XIvodrxuC5rmEtj3ZbVubhdyj1HsO+fql5ogHM13XTzPhSB8jKbG7G0Lwzg52d816FW9MdKxkIhXWY/+1lAADqGLXR1obH3q7Ku1JxVVT0cQAcIka3ZzcFUVecuavxt0OOr7CjFgt2Zh4IUw0m39/av/4jVWfn4vkiA8vWdzMmiscl4nk+YPDHQ/UQqCaG6ONrGRCVmxV649Bq5L9veoy3NPU86mpui7Ecpsmt4xLo/LxsQPtroymh3vZjLpuIGB7md84uB5+sq1oyUIl911oe/kt14pCWLMxDZ9+8TNkxpp582kw3pRUTG+pjzct+7Wnxg/qq3ZfIFOZ2cffO0FG+HSZF+PunRE47yOI8nMhC6eZam7PNHfc6PfieRgwXFrsr/nk3kXm/l2zb4v4TQnKc9YLvZ30LQxwVxRlddhzkxnJ+Pdd3phkt3dPgqQugt6kkHP1pD53b6+2Ktedf38XhRBeJwCrP23tCw6LIVQLwEHWxZwR5IMeoIoxYWubuPkx5TWD85j82BZ/XDqjVj2biVbzV1llDkZhbDadtfj67JauyBbvlW/cpeqXJEEQXPaFu9bk0p/kAhngzOGEVavcCWm50ZXThAeo6lZwEcAXpDoj6ndl6+nsaX9K8q/QNnqA/i1StyR7OuJZwgi0rGEKOMdmnkK3fHmW1/w0yPh8HEbelf9wyqkZsCfN8OpeV4WRWOyZsIP7AppEGDBy8mgc3jSmBFSY6T99szE3oVLWaySfA2gpVBRBOFyGWiXo6XlrH3SGH3QqsZxM3EMQhC6tgsx5dSRGJjOT8S7fxAUV115bd4HH+03RTrOA7E1xpGvy+oiF+RSvPKENgJaqQXtXxl4XJHoi33T7cQoBOFFEJGOk4lYRU/MXa76XlD9jFhzpP2HEwNoFaYz11h6aC1f8gbcxcTNLr+dhAh49J971J359CN3vOHnXXNlGlvbryTG9bvq5L+z7jJNOe8xsGanRc1tdeE9ezV+GUHEKKhsMQTBhKuSfT3Kv8Xz0Z6iXCJ5BiGI5uboB2HQowzslxUk7xTnKaDTDr+EGfbs9wl+N09a4vIRBlznA+F23+EHo2LKlJEgUiC+cvaB+JaXb5YQhBdB5KtkfmnwjtPi8bXbixl8VVd3hC70UsyvSkIz4I4mbtb30+38Af4jYPwiOA78QQBzLQSR58mZtXy6n8ZMK3WPytL1W2J0c4juO/gA8w9ekz24nPk1iiSIcdWilyzlJAjNQvgyG3RcIT4jeSfXABsONwz0Fkl0V1140zleql2Hez3Py+pquIPwmjcev6uoA0mT+FybZaJjNSEIb4KYsNstdNes60a7CBR4KaYz0dOpJPwucHZ5HTwwi5yv49W1F1+RSOfRJpnKusuPA5ci7PvJpB8PD8/8RbnCQPjFL+gC7wfvUqmYNDvTgi8eizmRuk0eDYn5UhPl2tSeQD0s4XSbLHXfOBDvUY6xk/4UfYIgvMaswvJgvWHg4fRI6NGg/hxCEB7D3tTa/mMwzhkvVsIjdNkJQkM2fhc4PwtWCb8YxwXKxd/DrXtlrvl/w5S6vtTJ1f3it9sSRGmCuems5Uox3RwD46nGdXczQGEq31IIWwl3IkIQ05kgNJY/fhe4SiGInBzZWEEXZ2MF2ZPVO42ir/AjQT5mv/jtvgThHPjNL84Ofkd+q7uVcz2FOESMnVae1EFBFILwQKxUF7PTUcU0RRd41NjWeQiN8okw+Bww1H2G3XzPCrerZ3nRH4z/WEzKQs2XL4eSKSjBBLmkrnQVk4OBQtChcijvYSabbwHl2wzcr4BNkei1IJwIwmrDNB/YsWPfP+hUonKC8EZ0yv0gNAxakZfUGnPcNDOdlox3P2iF2e8O2D40Oue1qdTP5uRTMZvq6187PE2hpcToAGXCrk98fHhhe0/FsRJ+8Qu6wPs5sZXwDsIesbTgS2q7P0Wxd3QOfgxKZfgKQJ4OfPnjyCokSC6UuvrZ9bJad1FdiAmw03xyCDyoPaUIQXh/lVNPEGOe0KstogY2c1WTjkD3ZnIsAL8ylANXNqdtqT6wRps5LgH/gMknDAzEniwFQag28kxyS2Sx4j0NfJegptb2+WDcbo0vVMqAa9OCIPKdM7WbCS/Uy7Fp0Po+FEHw2uQ/Lu05ENTvUoZxop9w+l6Y6TK6AXrrLCEILzSBKSeIUtiM253hrAk6ptxRLsClu8YByTXsgcPw5i4gVWawjQA9yWw+Wl/z6uqc+WLmNMTmqWBqUiGWGBioD29e6mXemOuvsTW6jJhutfTvK1mO93ScHieISnaU08RSKkrF4xCpwPWyWhvQLkAYEqd55BD/ytHxVgjC+4uccoLQ2mMH2NHobLKtvg66CRxUt69LZciAv1AbAQhCt7sLEr9HDbcuho/d96NYj22NmkAIwvataUJtBN4la9SvReHsYEWkjdzqvXSMlXDwiYBb6BYHH5xtBhunxuNdKtprIY8+CrJbLgZNxsAg91iFCGmvI5fUPlDU7Go8Y5jkmtUsVhN2DGUK1ue8K7E7/gUgCIcd0GYQn5boi633gtIhrPkQwzgl2d/Vm6uvsUcPFPMpj2CAwGpBp3eZDiqmjLqwHMH6fHgru80Rnfol6GZJ175ereN+WZ2dQ102AwjPSLxO7+eQd8MxqKZqR04QXitKBaiYlIhO4b7dEt5kd8v5GdE0OwZduG8GnjLM1AKnhDpZ6PThvgHnPAtFEITq00FWP3GSqDESbSfKqH52WR1pokk6kKYvItKH/HZOiOI9BSeWqBaC8ApL4UD2jtnrrCg4hftm5s5kPLY2KKbjc7m1YwWYl1vqF6LCzOtefzJxv6x2SVgVKG3uWBZKXA6mL9iTZnnl0BCC8J5JU65iyonYGGk/nwgrJya8ob+YbJ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HLYjGYRzujpLp117Zi7asNM6ZyD0znj/Ba1Fxi7Kgz9o2tcfPsarxc7LIFJojKJEZh/fQrLrV5qQmCEEREt49RWlRVOIc9XlAN/o8J/MYw+Vr7Trja1ycoQSymi3JhQ5kE8Zaqdn6kXnmvJkhEgkBHR2I/xGkIjFeVGiww85pcJvX9IB2EcRl1Ccccae6CoAShGTfC7Na1lwtrVDEpvDu6+84BrKBz5edZg41jMpmBkSDzocp09vSdzAwVAqXsXBB6l+vWV1CC0JJdyFOaugMxObXn5ll5FgiBQm0w0/ow6Wh1LsbBQ23w6ORSvDtoVjpn6HogXP2g78FiLicniIhmX3cRySsYnrNb7UKryRVdyvJ1M4hW29rwjYAZdphBCcK6d+GM8+MT58kmi/5iYQQE0dW19g0mxVTo9ZlLbsC9E0s5EWQBKhr+4yqJkj350X8VJqeOiuK+SlCCKBLVXATrqwxsN0fB+rTxlVyC9alQ7JtymaT9Frb21dXNL4BN2XTya2HfdSnvjoAQRIRvh+5DBvFHsyOp//C511AR8tstppE+HHPwKKVBhxuCIKD/WHkoH8f6+4dSf3Hps5yW9dqKpEkREESRuPq+DMaHZvfvr4JTJEwGXeHIbBZ48QqCcSiC0If73sFMG/129y6qyCdhGCuzwwO/cMqqe7+Y8KOpVj6xmnDfbnkaPMJ9P8nASfYYUU4ZXbz2fpM3jHfdPzzwaBD8pUwwBIQgguEUqJQuRDSAPDE256emPqXbeaocztQy9fmK5DmacMz6hD940C0pSyChXQqFIYjiYqzLdqbP6+yeKKkkTDQEAZdTgOLqnzNim3QXEt2S30SdtSwMQShU3BIGqXerkG+5WJcwiGLGaQxWqVztObhVxjnXTYt7wiD3HN1dXYnXFog2E3CY43V6iMz8u0dHb60IceJBEKqJHSD+DPK40hGxljpXJA5j07jakd8iVPjzWr6LxVZXCCLiGdclzyl1ocJq/A5EY2CasFIoMrcBpGwWtmxyVmnth6XRq0cifVAdMVfGYpru3yUhUfn3xxhIW+lW3VOtzowlIoJQDXb0JA4Fkwq4Zw9YWOyL8DcwrPSZXiktAfoDDPM92eHUryMBPISbq62/KFKOqkH7pk+NKOXokyA+NjuSUlEBKh4Xgpi0JduyiIKs6AL0SCm96Tu18xhgTFHN22JrRwgi+hmn9p7EqcSkYh45800H6U2b8F2nHw7SWJAyURCE6qe4+zScmdj8RFCLwGaGug9SylcRIUFYJLFi3VthsjOrmp9cpd8VOdAJOnVMwAa0xcKeIMrCdHb3n6U5FQQRReWt/tLU+O6X+CXjUY2V1Dg3AdQTpPHZZfhhGLETvTDTEQQB55rAex2Z87y6j9QxI/w4m7+GEMQczXFnZ/8hbPC3nblzPbobZ+Bqnmq5xKkuUHU0se8jkzwqglACJRKJ2GNPUN8Li/1XAbzcW0h+mEzjlIJhmgbo3rkiCGvBK6ryPkNFIgpC3JZqUKe+iQL4KgnC6lqpwQymq9RrESR8i8rwF2PjA5nMwM/DyF50iKBzQFDRa3cPUFeR/ReXxPkrfm7WbipMKnCG4sbXmVmFjPEITeOu8gogpxQJiIAQRECgqixGh3b3vzrOfCoT3gXCQbYQGyo4318IeAiEGyZa+QdeRsC5jFAaJUGUcVILwGSB3sPMZ4HotdPjttQ6vIVBm6fGd/+x2s1GHc3Va67USax1go4F4xQGDgawt20h2vZCHurfg/HtCKPrRnmCsLc1+90CXmOzNewA8Fti3J0nun5LevB/qwn+aJ/LibyxCmCV1EmlIy1jZr3DAEYBSrXGzbv8iGFWm1N0BwhKbWQ9NhUmtXevO5RgnusIS7PthXtG9zHw7QP24Z955RWv8nuVag4EhCDklRAEBIF5RyCkE8S8yycdFhEQgpA3QRAQBOYdASGIeYe8qg6FIKqCTSoJAoJALQgIQdSC3vzVFYKYP6ylJ0FAECghIATRGK+CEERjzJNIKQg0FQJCEI0xnUIQjTFPIqUg0FQICEE0xnQKQTTGPImUgkBTISAE0RjTKQTRGPMkUgoCTYWAEERjTKcQRGPMk0gpCDQVAkIQjTGdQhCNMU8ipSDQVAgIQTTGdApBNMY8iZSCgCAgCMw7AkIQ8w65dCgICAKCQGMgIATRGPMkUgoCgoAgMO8ICEHMO+TSoSAgCAgCjYGAEERjzJNIKQgIAoLAvCMgBDHvkEuHgoAgIAg0BgJCEI0xTyKlICAICALzjoAQxLxDLh0KAoKAINAYCAhBNMY8iZSCgCAgCMw7AkIQ8w65dCgICAKCQGMgIATRGPMkUgoCgoAgMO8ICEHMO+T+HbZ39x1LwPenSzLua23h1UNDqb/71/YvMdft+0vQ+CU6OhLLYOB4EM4B6E0AXlwa1TiAvwB0X2t84vyhodufbvzReo+grTux3ADdC2CPckkGjsulkz9wq1nxDlYP0g6AngL4VwxOIx67NTc08CcAXH2TFTWpvXfdgcgX1higlQwcDGBvALGZOefHmGmMiL4/udS8Z+tPUs9E2P+CNSUEsWDQu3dc7QJeWrROB2Eym05dFfjjjJiA6hDSSEVqX9H/ejI5CeCNbg0TcO/fd2k9/oF7bnwu0s7rsLEFJogKRBjIMfHpYyOph2qBy/qeYrQewKcB7BeirTwT7gEbn86lB7ZETFYhxKi9qBBE7RhG3kJYgkgkErE//8U4htn8d4Bex4QLcyPJLwpBRD416Ow8fk/TaLmHgH/2ap0Y3xrNJN8XvQT112K9EUQJoR3MtDGXGby1CsSoo7v/aIC/EZIYnF0VmHF7IWacd//wwKNVyLHgVYQgFnwKKgUISxAdPX2bwTiz3JIQxNxNakdX//tB1sIx+yH8DUxFtQLxbgx8NjeSvHzuJKmfliMiiEJJNTcRfGTc6lD1OKs+CeJjsyMptYsP9KhTA8WMSxl8rk2FVLHwz5aVdwWwl0cH25l5Yy6TUiq3KFVfgcZUSyEhiFrQm6O6VRDEdWCcKgQxRxNia7ajp28W1gCeBOGU7Ejynkb7+KNCKyKC2G6CjxxLp7aGkUudnh/bhoNh0vkATgQQn12fRyeX4t1BbALLj0jstmQnKdVsn0aGpxm4xjBp8377mX9MpVKK0Kaf3t6NSyfyz/Uy0QeIcVSlHFC2qQuy6eTXG+k9EYII8zbWaVnnouV3gqjTYdS9WLokN8T43GgmeVHdCz+HAi4kQdiH1d7ddwQB3wWwp+3vBSI6eXRkcMALguXLz2hZsuyZKwE+w1Euz8ClS+P8paBOIm09iYOJ6RoC2h1tjRNhw+hI8pY5nI5ImxaCiBTOhWlMCGJ+cNdmQWNaW6Wee36Enode6oUg1FA7e/pOZsZ1s9VDdFNrfNupQ0NDeTc42rv6ziTClQ610pMMnJRLJ38SFkYPVdXjBheOymRu+e+wbS5EeSGIhUA94j6FICIG1KU5SZOpB6aeCKK7+8Q9Cpi6C6C2GWn5gcl4/PCtQzf/VTeCjo7EqxCjnwL4R9vvoe0XzrbdTiVENDjx/G4btm69amp+3tzqexGCqB67uqkpBDE/UyEEUf8EoSTU2Il+H6d8z8jIrU9oRkAdPX1fBuNDtt8KRNg4OpL8Tq1vlrJrtO6kFANH2toaN5lXj2VS6u5IXT91SRDtXf0nEbFtcrx3AHaE27v7vkrAB6f/Rvgd8tybzab+7DcTzrp+uny1Q1i69JnlTEgw+B0gHATGS+0vAsCPERsZMG6emNjtZ0F2DX5Gat1C5Tk2wvXZkeTGchm/9mfh2dP3EWJ8ofw3+wUoNf6WZU+vJPBZAL3N5smx4wWD4W8ZfJM5mb9+y5bb/uaHve53ZYB89Ak6jID3Alhh81jZAfCviWjzkhjfXtYNO8flN39BZGp3jD9AHV9jq8KttfWZw9hgNSf2canmtxHwAAg3TLTyD4IYV1UlzTsxvSgqnbhhzSEdDmAZLI8r3sKgzVPju/84yDvpNe56OkGEJYhDVyReETOt08MrpsfIfAdMrM9mU8qwXPPT1bWuxyTzTgAvmWnMX+1Vc8cRNFCfBFG8iKQmbZ/SGJ8zmVeOZVJprzG7LJyB6mqOps+SyStHR1NZZ58zF9Lo4wBeHmIengJw7v77cNLpBeEgOc+b1PVAEB09iXeA8Q1178Jn/HkwXQ7T/ESYDy5E+08x8wdymVSyvbvvGPsN9HojiCrem3EGruaplkvGxr77bMh3//co8DsQo/cAuMwiBt3DdGY2M/jNEO9wRdF6Ioje3t74RH7PmwAkbIK6niA0bsuTAK/OplM/rgUTe11rQ7DLMzcyc7/t70+SSYePjg4+GFU/c9FOXRKE9ijvc/lLgVO64WonFgszJnzYzye98iXnsRhaVqXTN223A9/Wu2Z/Ix/73mwdZ6ipKRDoqonx3c5127n57fAXlCCYVxPRAZ6LjgYOJvxoqpVPDLAjpo7uvrNDtl8A88Uw6GEwbit3X08EcUhvYu+WPN3gUDUEfXEeZIP6csODv3GroDtBEHAFA//uSg7AIwWDD98ynHokqCC6cvVEEDp7gtut9pJragqgY2bGFVxbEQazzp7+dcyWVqQcnkMtTDWTcxgZqilblwShBtLZ3fdJBj5hG1SqNf7kid6eCP1riFjnQuZft1KVckUunVSXZaYfF32i+r10yQdbinFhLFpSJ4tOlws0k8y03s37xZ8gNi6dmHp+E4heXezLPAwo/7/1ByXHL6cFZ3NLNpO6pvxvv/btY9aoWG4GoHal5R1pAQS1wGTANEHgV3DRva8cm2hGjAAk39nTt5YZN2oWtR2kQiiAHmHwSwjoBrC/TVY1B8qH/tBICaKrfxWRNV4wuIWAdwHY19bv3QCp2D/lZ5zj9JXc0MAfy3/o7FxzIBvxH6EYw2f2Y6l7MKzeG5dxlcs/brCxOpMZ+HlFG3oV0yQAdemsPA/KI+c+Aj0HmO3WyY9oc3ZkUKlja7q8VS8E4WYUdtsoFDd78WG7emmubsB3d699ZR6xIQLU5qq4QjC+k8skT6kVf937ENXf6pYg2roS3QaROuapW4pAAFtChf1hZmny9GLQ7CQmGTja6d7moo++vWDwh912YV1didcWiDYTcNjsSeO7UMBandolzAKu2gxrpA7TvocO3gojYMb4AufYLVVKHBeA6RLHhaEHzanYEWNjN2/TvcAdK9a9Faap5tzux74DxJ9BHlc6sKLOFYnD2MTX3NRcUZwg7HJWY6S26uTpeygSi/15kAln5kaSo84FwsOP/kEznl81NnTrY078PE6V6sT6VS6YF9vxO2TFugNgFKbuH0r9pdbFpB4IwsOt1PWUVLHGWKv23Ozq33zUhl1f9PzEbbNPkHotRa3zEWX9uiWI5b3rX7Ykn/8pQG8uDVi7aJfB0Lu3TUPlaYfQsHvFQtbWtn4vo6Wg/KGnA7QFdVcrBf263q4XZeDROAq96fQtf3BOaJgFfIEIwlLp7L8vLvOwpVBHT+J8MH3edqwuMPOaXCY1E6m2NHg3Pa2fH7pS3cTzuBmgXieO9UAQLv71ycmlfIaXus3aDe/y9OfAOG+WWoLwlexI8sNOUnEjCAaunRrf/f21GqK9Fp0FIgha3rv+pUsK+Vcy0xoCTtbETfK8mFbpDAPPNabWhbezq+9qJvzL9AnCYw2ota+o6tctQagzQ3t3n7qNeFp5sF63Vjs7E2+BQfcy8DKrvDq2k+UhUnw8dgbtXYnjiEgF9bL0g+qjyqWTp9s/wtItzR8CWFJqMZSRSbNbeZpMOmp0dPD+hiOIgF4eOlJlwkW5keTnnGPu7Ex0sGGdGMueHuqEsimXSVbGPXJUdvFjV7Ynz6CFYT+isCeIYugG/AggpWosvZbImZNTxwTx7HIhTe1FKxeCcHW0CDv2eSCIKEVSbeUZfGEunVLxsLQqNM3p2NcDrRYh57u/WmSdXnOjaGSu2tC4u97ZGt81MTR03c6KRXW2a+x2gD4EsDLQWZ5QHvo+6ujpvwLMm0ptaq/mKwIyDTqNwG/FXwhkAAAexUlEQVQH6EAiSi+JbTvZyyZil7GnZ80+eY6PAPgn22KhjZlf5ycI11OAc060HiUOl9tync6uvs8y4WMzbQSPoaPqdHT3nQNYN2Gnn4UmCM2mIrSHTGdn/xvZsDz6ptVuunHpCWJ+VBgRnSCiXEb+DNCZ2fSg2tC52lcq3zkIQThmoZ5PEHCqfjzUMo7TBj9QgJGIwbxhxttI753gVGV5qX5qeYObhSDC4lPxEWoIQqceDLu4a42AC3yC0JCe1jPO673Su21yxUZJHwZkfoygdUIQeYC3gnEFTNwWxKVac6FuvgliTlVataxXDXGC0BiPtbtX5wKjVEQH7MPve/Rxuo7I0k2qRzv5laqfyo8vCqCbhSAA/KfBO4/NZL6vLsP5PhXHag1BaNyTA91dsXeuMwKGJRm/wYRRMWnlASo84/z6tE5HlSHGK/z6q3UND9K/X5mICMI73Dfxbo5LqCWxeNRg419bWpb9UqdZ8JJd49Qy3wThqmb2w3y+fq/rE4QCwbnAsOYjq3hBS/aG9p6+84jxZZvOocLvuGIBi9CLoXjT+m+vMRE7DsQnlbxtpv2g3dIy1rOKKWymtEAEUYzCabfvPGLG8yt03jpeH0aFEXABTxAaJ4uqPWQ09quKhcwlkODJucygim46p09EBOG7OCvPqxaTP8pglYjJFtab/gAy35sdSf1nmIHOt01gvvsLg4Vb2boniIqPQ5Me07HDmn7RnHWdxmfNCcX3JdUAOeNNYeIVBlkhJ97KgPK+8koiopSjjWeDcLEhuL1ggQiiq+L+ilfsHNf3vmIzsYAEEebE6PchaxbgYAThkxfar9+gv88XQZTl6exJHM1M6q7MdA5sAONMfHZuJKW8BQPd6xAvJv8ZrnuC0OzEnmCDDrfdKq2wP5QjNyovGmopDBPwmiIUs412FXrrgLmZp2MQMc4H4RCPm6qeMyAEUYSn8hSH+1pbeHXQ+PtlkBcRQVRsLsKov/yXhXAl5psglHQuFypD5VvQOBFUfcrzQ8zlHoTn/Sy/Nufj97onCGsBcQTgY6bpo7PGyDztouo08BHwV5h85Ohoyrpl7NxBBEj+4ns5y2XSCmA8CrJOFNMxcYQghCCCfOSaBbjCRrPYCKLkBv9pAi52YBg4TLfWsUHj4h5kjvzK6G5tA/CN8ODX7lz/3hgE4XFPobOz/xA2WKV73L14SJh9E9Jph7CRi/OehZ9hNGiMIJWU5HEr7AOxCvT3n62xXR8oFJ7doyncXEXFdAcI7yx/mG4kLyomvfp0+rTX3Tc7IKWLE4nXAli6Z3K785KkspNNLOWEX9wvfSwmeN72r3ZBdt610q1V1bY9l/UagiAqmX5GVeRmfyiD5rRDlGOtVKquvIN0tXevayOYdzn0noUXIj/+gmBcCxPDS5aYf3RTi4RZMOrZSI25IYhVRKwSupcN+GKktn31TlWI8ySsii7CE0RRPan/LtXFp49mMykVpt7THqHxEAuUojTMolzUZOx1PcAqZ3b5CXXRNkx/UZZtCIJwMyYviz/1q9mhfSsXeTc7xBRPvWF2rCe60i1wmcsE7wDo9Gx6UMXZ8TWKCUGUXlsNwVTcggf8TnMV34BuN7iQbq46eaoNBFdxCla5NqZiK+wxrRYrQXiqmgxjZXZ44BdeC6Y+H0RwG1jxIqN5LcO4u2DQN+8fHnjU2Z8+H4R7LLYoF/ha22oIglCDrLgpy3TmZItxiz1eky5EhuaikWXkNkzut0WL9bwd7KKrvDSXTqp8EL7koOSvUIUVK4oXEwCXOFqbsunk14K+4HJRLvGiiSkKpP4KimnQcgthpLbL1tl5/J6m0XIPAf88S+ZgIWGUqtlpyyiA+KPZkdR/+H3fjnUpz4w7YuCLMpnU/yhZJKNc0LeoxnKalzBlMDabBKWaKEZ8dbnDUGmHwEYCTrHpkj3j4mv80EPfgNSGghCCmH4rKi8thQu1oUtWv5AniKL6o+J+h2eYd90nol18Ne67i/gEUVQ1Fe2UAw6PwklmPiWXSQ16LT/tvesOQt68e8bb0Sq9nYg3jI6k1P0c7aOLtVUqOA7iT7TGsHkib3wJ4DPsDQQN8lnjkhlJ9YY5QVTsMgm/Y6ZBAl9UQsL1DoNmgVcXapTrazljnac3geZDLzDTsbnMoLJJ+D6uweSEIKax0wXrC5oXuOQhouZiOtJucb/QlMH6tLrrxU4QLoEN1WvgGiLd/uG2dyX6iegGWzBOiySYeWMuk1KbUK2moHR570Oly3vOHChPl/JxzCQJAv4PBT48m039znfhqIMCDUMQpR2ZPd/0cwDUf6UgZu5G5ko7hAN5n9vTGh25FfE1SBhlRQ4co+9VHH+tAIK0Vpc0qFYjtZ+7bpj2g1x089ydOXM6uxi53cJ9wzCOzw4PqJwJHrs4ugpAn7PAQhNEcWfbdyaRFURw5gZ9gOx6buG+CbR5SXzbB51BIhc7QSisu7rWvsGkmPJotCd0Ut+qrzrYLdmQigpLjM2FfMvFXmlf29pOekksPnUpE85y5ECxv5ah7mnUAT+gsQjC4e5qB1Bnfyj/7pKntvyz8+Jdxby4HCULDHyTp1o+qntxDj30+JfGWuPngOl8XXY1rx1umAVcQ5zqTw+hwKvddilh2p8vglBCuyUMItC/ccG81pkwqK1n/ZsMzl8D0Nt1H1M9EIR7wiB+mAycMzqc+plzd+qeZAoPkZl/9+jorfYMdtbQhSAsGKijK3EhyMpBYn+2M4xVufTAmNei60ESqtrTDFxjmLR5v/3MPzrzoJScElROkk+6pCNWGf42ZtNJpQYLZLcUggiJQEdHYj/EaQiMV1VU9TkFVMRlKjcQ8Pa0TsddamIczA+DjP9SqUettJGMdpCVWtB+tNwBwja77G65EcIs4NbCWhnMTf25dB+D1A5oeEnLsrPKwczCtD+fBOG24y7hHCTlqAmgZXpqF1jFVJYjopSjnhfAhCCKaNdosIZ1kl329IUlBxZbvKdZK87swIKugQSdq5T7piDkUjhvxRvqBOFxEvCNoaRNLxhCT118cZ75KhcNTvaFP8Bk8cNkGqeYMe62Bw90y1ERZgFXnbsdrWcEmx1iJEz7800QRbfFxHkEUj7sbh+oE/NxMD4D4qPsl6bq4QRRFrRoJ4ndBFBPgBfGUYQfhhE70ctlUwhiBjIXg3UhqE1LvYN+6WzDz+F0DStVbyFmnKdzia2h3Tmp2lAE4b5b9r7kpuq52CFC+dtbR9ClT58LgnJvdRqkdBP0FJg/DRPXKPVIhbHbJc92mAW81Cm19yROJaav6+JCOXM4hGl/AQhCDSnMB/o4GbxhiYEtFW6ehA/nRpIqo1gkT62LsJV61qBzQFCOFcWb/96POjV9cUmcv+IXl6pW2fwE8fp9od1cnbLVarAut2fFXFu6fQ2RpTZ6XQiMVG6KNCP2b4ZZmGDDCiw4y4FCBRcE8O28YXyhnomi4QjC5WWsSBHqnEyXxCuhE7iodpV9Ib6k5SQG94PotbY49Uqt8ydiGgHj5omJ3X5mzwWsScGp3dWEWcDt41TJ7g0mFZtGhYKwR5KdRYRh2l8ggrCGNR0UEdgAWOljy2PaAfCvwfhaOTnMfCyQUfVRtEsYqwBOKK0IgL1Lp9KS6gKjAKVa4+ZdfsRQnv+oZAuxCE4XrTeCUIK5nqpdcnr7jJvae9cdiHxhjQFaycDBtjlTVXcw8AQYW4jo+5NLzXvsYT6sjUEcm8B0SeXGkm5qjW87NWhmymrmp5Y6DUcQtQxW6jYvAprLdqFckZsXGRlZvSBgucQyX8bMa0vq02cNNo7JZAZUKuK6fIQg6nJaRKiwCGiiZfrapcL2IeUFgSgQUEQRM81zDaL9OW+eFiQ9ahT9VtOGEEQ1qEmdyBHo6O67BoDKLKdCFPyCDf5Odjj166AddXQnVgJ0R/miE2viFQVtS8oJAoJAEQEhCHkT6gIBTTrGwLHyXYySge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\ No newline at end of file</div><div class='head'>diff --git a/Documentation/arch/x86/x86_64/5level-paging.rst b/Documentation/arch/x86/x86_64/5level-paging.rst<br/>index 71f882f4a173..ad7ddc13f79d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/x86_64/5level-paging.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/x86_64/5level-paging.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/x86_64/5level-paging.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/x86/x86_64/5level-paging.rst</a></div><div class='hunk'>@@ -22,15 +22,6 @@ QEMU 2.9 and later support 5-level paging.</div><div class='ctx'> Virtual memory layout for 5-level paging is described in</div><div class='ctx'> Documentation/arch/x86/x86_64/mm.rst</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-Enabling 5-level paging</div><div class='del'>-=======================</div><div class='del'>-CONFIG_X86_5LEVEL=y enables the feature.</div><div class='del'>-</div><div class='del'>-Kernel with CONFIG_X86_5LEVEL=y still able to boot on 4-level hardware.</div><div class='del'>-In this case additional page table level -- p4d -- will be folded at</div><div class='del'>-runtime.</div><div class='del'>-</div><div class='ctx'> User-space and large virtual address space</div><div class='ctx'> ==========================================</div><div class='ctx'> On x86, 5-level paging enables 56-bit userspace virtual address space.</div><div class='head'>diff --git a/Documentation/arch/x86/x86_64/fsgs.rst b/Documentation/arch/x86/x86_64/fsgs.rst<br/>index d07e445dac5c..6bda4d16d3f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/x86_64/fsgs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/x86_64/fsgs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/arch/x86/x86_64/fsgs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/arch/x86/x86_64/fsgs.rst</a></div><div class='hunk'>@@ -130,7 +130,7 @@ instructions. Clang 5 supports them as well.</div><div class='ctx'> </div><div class='ctx'>   =================== ===========================</div><div class='ctx'>   _readfsbase_u64()   Read the FS base register</div><div class='del'>-  _readfsbase_u64()   Read the GS base register</div><div class='add'>+  _readgsbase_u64()   Read the GS base register</div><div class='ctx'>   _writefsbase_u64()  Write the FS base register</div><div class='ctx'>   _writegsbase_u64()  Write the GS base register</div><div class='ctx'>   =================== ===========================</div><div class='head'>diff --git a/Documentation/bpf/bpf_devel_QA.rst b/Documentation/bpf/bpf_devel_QA.rst<br/>index de27e1620821..0acb4c9b8d90 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/bpf/bpf_devel_QA.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/bpf/bpf_devel_QA.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/bpf/bpf_devel_QA.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/bpf/bpf_devel_QA.rst</a></div><div class='hunk'>@@ -382,6 +382,14 @@ In case of new BPF instructions, once the changes have been accepted</div><div class='ctx'> into the Linux kernel, please implement support into LLVM's BPF back</div><div class='ctx'> end. See LLVM_ section below for further information.</div><div class='ctx'> </div><div class='add'>+Q: What "BPF_INTERNAL" symbol namespace is for?</div><div class='add'>+-----------------------------------------------</div><div class='add'>+A: Symbols exported as BPF_INTERNAL can only be used by BPF infrastructure</div><div class='add'>+like preload kernel modules with light skeleton. Most symbols outside</div><div class='add'>+of BPF_INTERNAL are not expected to be used by code outside of BPF either.</div><div class='add'>+Symbols may lack the designation because they predate the namespaces,</div><div class='add'>+or due to an oversight.</div><div class='add'>+</div><div class='ctx'> Stable submission</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/bpf/bpf_iterators.rst b/Documentation/bpf/bpf_iterators.rst<br/>index 7f514cb6b052..189e3ec1c6c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/bpf/bpf_iterators.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/bpf/bpf_iterators.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/bpf/bpf_iterators.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/bpf/bpf_iterators.rst</a></div><div class='hunk'>@@ -2,10 +2,117 @@</div><div class='ctx'> BPF Iterators</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='add'>+--------</div><div class='add'>+Overview</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+BPF supports two separate entities collectively known as "BPF iterators": BPF</div><div class='add'>+iterator *program type* and *open-coded* BPF iterators. The former is</div><div class='add'>+a stand-alone BPF program type which, when attached and activated by user,</div><div class='add'>+will be called once for each entity (task_struct, cgroup, etc) that is being</div><div class='add'>+iterated. The latter is a set of BPF-side APIs implementing iterator</div><div class='add'>+functionality and available across multiple BPF program types. Open-coded</div><div class='add'>+iterators provide similar functionality to BPF iterator programs, but gives</div><div class='add'>+more flexibility and control to all other BPF program types. BPF iterator</div><div class='add'>+programs, on the other hand, can be used to implement anonymous or BPF</div><div class='add'>+FS-mounted special files, whose contents are generated by attached BPF iterator</div><div class='add'>+program, backed by seq_file functionality. Both are useful depending on</div><div class='add'>+specific needs.</div><div class='add'>+</div><div class='add'>+When adding a new BPF iterator program, it is expected that similar</div><div class='add'>+functionality will be added as open-coded iterator for maximum flexibility.</div><div class='add'>+It's also expected that iteration logic and code will be maximally shared and</div><div class='add'>+reused between two iterator API surfaces.</div><div class='ctx'> </div><div class='del'>-----------</div><div class='del'>-Motivation</div><div class='del'>-----------</div><div class='add'>+------------------------</div><div class='add'>+Open-coded BPF Iterators</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Open-coded BPF iterators are implemented as tightly-coupled trios of kfuncs</div><div class='add'>+(constructor, next element fetch, destructor) and iterator-specific type</div><div class='add'>+describing on-the-stack iterator state, which is guaranteed by the BPF</div><div class='add'>+verifier to not be tampered with outside of the corresponding</div><div class='add'>+constructor/destructor/next APIs.</div><div class='add'>+</div><div class='add'>+Each kind of open-coded BPF iterator has its own associated</div><div class='add'>+struct bpf_iter_&lt;type&gt;, where &lt;type&gt; denotes a specific type of iterator.</div><div class='add'>+bpf_iter_&lt;type&gt; state needs to live on BPF program stack, so make sure it's</div><div class='add'>+small enough to fit on BPF stack. For performance reasons its best to avoid</div><div class='add'>+dynamic memory allocation for iterator state and size the state struct big</div><div class='add'>+enough to fit everything necessary. But if necessary, dynamic memory</div><div class='add'>+allocation is a way to bypass BPF stack limitations. Note, state struct size</div><div class='add'>+is part of iterator's user-visible API, so changing it will break backwards</div><div class='add'>+compatibility, so be deliberate about designing it.</div><div class='add'>+</div><div class='add'>+All kfuncs (constructor, next, destructor) have to be named consistently as</div><div class='add'>+bpf_iter_&lt;type&gt;_{new,next,destroy}(), respectively. &lt;type&gt; represents iterator</div><div class='add'>+type, and iterator state should be represented as a matching</div><div class='add'>+`struct bpf_iter_&lt;type&gt;` state type. Also, all iter kfuncs should have</div><div class='add'>+a pointer to this `struct bpf_iter_&lt;type&gt;` as the very first argument.</div><div class='add'>+</div><div class='add'>+Additionally:</div><div class='add'>+  - Constructor, i.e., `bpf_iter_&lt;type&gt;_new()`, can have arbitrary extra</div><div class='add'>+    number of arguments. Return type is not enforced either.</div><div class='add'>+  - Next method, i.e., `bpf_iter_&lt;type&gt;_next()`, has to return a pointer</div><div class='add'>+    type and should have exactly one argument: `struct bpf_iter_&lt;type&gt; *`</div><div class='add'>+    (const/volatile/restrict and typedefs are ignored).</div><div class='add'>+  - Destructor, i.e., `bpf_iter_&lt;type&gt;_destroy()`, should return void and</div><div class='add'>+    should have exactly one argument, similar to the next method.</div><div class='add'>+  - `struct bpf_iter_&lt;type&gt;` size is enforced to be positive and</div><div class='add'>+    a multiple of 8 bytes (to fit stack slots correctly).</div><div class='add'>+</div><div class='add'>+Such strictness and consistency allows to build generic helpers abstracting</div><div class='add'>+important, but boilerplate, details to be able to use open-coded iterators</div><div class='add'>+effectively and ergonomically (see libbpf's bpf_for_each() macro). This is</div><div class='add'>+enforced at kfunc registration point by the kernel.</div><div class='add'>+</div><div class='add'>+Constructor/next/destructor implementation contract is as follows:</div><div class='add'>+  - constructor, `bpf_iter_&lt;type&gt;_new()`, always initializes iterator state on</div><div class='add'>+    the stack. If any of the input arguments are invalid, constructor should</div><div class='add'>+    make sure to still initialize it such that subsequent next() calls will</div><div class='add'>+    return NULL. I.e., on error, *return error and construct empty iterator*.</div><div class='add'>+    Constructor kfunc is marked with KF_ITER_NEW flag.</div><div class='add'>+</div><div class='add'>+  - next method, `bpf_iter_&lt;type&gt;_next()`, accepts pointer to iterator state</div><div class='add'>+    and produces an element. Next method should always return a pointer. The</div><div class='add'>+    contract between BPF verifier is that next method *guarantees* that it</div><div class='add'>+    will eventually return NULL when elements are exhausted. Once NULL is</div><div class='add'>+    returned, subsequent next calls *should keep returning NULL*. Next method</div><div class='add'>+    is marked with KF_ITER_NEXT (and should also have KF_RET_NULL as</div><div class='add'>+    NULL-returning kfunc, of course).</div><div class='add'>+</div><div class='add'>+  - destructor, `bpf_iter_&lt;type&gt;_destroy()`, is always called once. Even if</div><div class='add'>+    constructor failed or next returned nothing.  Destructor frees up any</div><div class='add'>+    resources and marks stack space used by `struct bpf_iter_&lt;type&gt;` as usable</div><div class='add'>+    for something else. Destructor is marked with KF_ITER_DESTROY flag.</div><div class='add'>+</div><div class='add'>+Any open-coded BPF iterator implementation has to implement at least these</div><div class='add'>+three methods. It is enforced that for any given type of iterator only</div><div class='add'>+applicable constructor/destructor/next are callable. I.e., verifier ensures</div><div class='add'>+you can't pass number iterator state into, say, cgroup iterator's next method.</div><div class='add'>+</div><div class='add'>+From a 10,000-feet BPF verification point of view, next methods are the points</div><div class='add'>+of forking a verification state, which are conceptually similar to what</div><div class='add'>+verifier is doing when validating conditional jumps. Verifier is branching out</div><div class='add'>+`call bpf_iter_&lt;type&gt;_next` instruction and simulates two outcomes: NULL</div><div class='add'>+(iteration is done) and non-NULL (new element is returned). NULL is simulated</div><div class='add'>+first and is supposed to reach exit without looping. After that non-NULL case</div><div class='add'>+is validated and it either reaches exit (for trivial examples with no real</div><div class='add'>+loop), or reaches another `call bpf_iter_&lt;type&gt;_next` instruction with the</div><div class='add'>+state equivalent to already (partially) validated one. State equivalency at</div><div class='add'>+that point means we technically are going to be looping forever without</div><div class='add'>+"breaking out" out of established "state envelope" (i.e., subsequent</div><div class='add'>+iterations don't add any new knowledge or constraints to the verifier state,</div><div class='add'>+so running 1, 2, 10, or a million of them doesn't matter). But taking into</div><div class='add'>+account the contract stating that iterator next method *has to* return NULL</div><div class='add'>+eventually, we can conclude that loop body is safe and will eventually</div><div class='add'>+terminate. Given we validated logic outside of the loop (NULL case), and</div><div class='add'>+concluded that loop body is safe (though potentially looping many times),</div><div class='add'>+verifier can claim safety of the overall program logic.</div><div class='add'>+</div><div class='add'>+------------------------</div><div class='add'>+BPF Iterators Motivation</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='ctx'> There are a few existing ways to dump kernel data into user space. The most</div><div class='ctx'> popular one is the ``/proc`` system. For example, ``cat /proc/net/tcp6`` dumps</div><div class='hunk'>@@ -323,8 +430,8 @@ Now, in the userspace program, pass the pointer of struct to the</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-  link = bpf_program__attach_iter(prog, &amp;opts); iter_fd =</div><div class='del'>-  bpf_iter_create(bpf_link__fd(link));</div><div class='add'>+  link = bpf_program__attach_iter(prog, &amp;opts);</div><div class='add'>+  iter_fd = bpf_iter_create(bpf_link__fd(link));</div><div class='ctx'> </div><div class='ctx'> If both *tid* and *pid* are zero, an iterator created from this struct</div><div class='ctx'> ``bpf_iter_attach_opts`` will include every opened file of every task in the</div><div class='head'>diff --git a/Documentation/bpf/kfuncs.rst b/Documentation/bpf/kfuncs.rst<br/>index a8f5782bd833..ae468b781d31 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/bpf/kfuncs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/bpf/kfuncs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/bpf/kfuncs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/bpf/kfuncs.rst</a></div><div class='hunk'>@@ -160,6 +160,23 @@ Or::</div><div class='ctx'>                 ...</div><div class='ctx'>         }</div><div class='ctx'> </div><div class='add'>+2.2.6 __prog Annotation</div><div class='add'>+---------------------------</div><div class='add'>+This annotation is used to indicate that the argument needs to be fixed up to</div><div class='add'>+the bpf_prog_aux of the caller BPF program. Any value passed into this argument</div><div class='add'>+is ignored, and rewritten by the verifier.</div><div class='add'>+</div><div class='add'>+An example is given below::</div><div class='add'>+</div><div class='add'>+        __bpf_kfunc int bpf_wq_set_callback_impl(struct bpf_wq *wq,</div><div class='add'>+                                                 int (callback_fn)(void *map, int *key, void *value),</div><div class='add'>+                                                 unsigned int flags,</div><div class='add'>+                                                 void *aux__prog)</div><div class='add'>+         {</div><div class='add'>+                struct bpf_prog_aux *aux = aux__prog;</div><div class='add'>+                ...</div><div class='add'>+         }</div><div class='add'>+</div><div class='ctx'> .. _BPF_kfunc_nodef:</div><div class='ctx'> </div><div class='ctx'> 2.3 Using an existing kernel function</div><div class='head'>diff --git a/Documentation/conf.py b/Documentation/conf.py<br/>index 3dad1f90b098..12de52a2b17e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/conf.py?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/conf.py</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/conf.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/conf.py</a></div><div class='hunk'>@@ -28,16 +28,6 @@ def have_command(cmd):</div><div class='ctx'>     """</div><div class='ctx'>     return shutil.which(cmd) is not None</div><div class='ctx'> </div><div class='del'>-# Get Sphinx version</div><div class='del'>-major, minor, patch = sphinx.version_info[:3]</div><div class='del'>-</div><div class='del'>-#</div><div class='del'>-# Warn about older versions that we don't want to support for much</div><div class='del'>-# longer.</div><div class='del'>-#</div><div class='del'>-if (major &lt; 2) or (major == 2 and minor &lt; 4):</div><div class='del'>-    print('WARNING: support for Sphinx &lt; 2.4 will be removed soon.')</div><div class='del'>-</div><div class='ctx'> # If extensions (or modules to document with autodoc) are in another directory,</div><div class='ctx'> # add these directories to sys.path here. If the directory is relative to the</div><div class='ctx'> # documentation root, use os.path.abspath to make it absolute, like shown here.</div><div class='hunk'>@@ -57,76 +47,71 @@ extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include',</div><div class='ctx'>               'maintainers_include', 'sphinx.ext.autosectionlabel',</div><div class='ctx'>               'kernel_abi', 'kernel_feat', 'translations']</div><div class='ctx'> </div><div class='del'>-if major &gt;= 3:</div><div class='del'>-    if (major &gt; 3) or (minor &gt; 0 or patch &gt;= 2):</div><div class='del'>-        # Sphinx c function parser is more pedantic with regards to type</div><div class='del'>-        # checking. Due to that, having macros at c:function cause problems.</div><div class='del'>-        # Those needed to be scaped by using c_id_attributes[] array</div><div class='del'>-        c_id_attributes = [</div><div class='del'>-            # GCC Compiler types not parsed by Sphinx:</div><div class='del'>-            "__restrict__",</div><div class='del'>-</div><div class='del'>-            # include/linux/compiler_types.h:</div><div class='del'>-            "__iomem",</div><div class='del'>-            "__kernel",</div><div class='del'>-            "noinstr",</div><div class='del'>-            "notrace",</div><div class='del'>-            "__percpu",</div><div class='del'>-            "__rcu",</div><div class='del'>-            "__user",</div><div class='del'>-            "__force",</div><div class='del'>-            "__counted_by_le",</div><div class='del'>-            "__counted_by_be",</div><div class='del'>-</div><div class='del'>-            # include/linux/compiler_attributes.h:</div><div class='del'>-            "__alias",</div><div class='del'>-            "__aligned",</div><div class='del'>-            "__aligned_largest",</div><div class='del'>-            "__always_inline",</div><div class='del'>-            "__assume_aligned",</div><div class='del'>-            "__cold",</div><div class='del'>-            "__attribute_const__",</div><div class='del'>-            "__copy",</div><div class='del'>-            "__pure",</div><div class='del'>-            "__designated_init",</div><div class='del'>-            "__visible",</div><div class='del'>-            "__printf",</div><div class='del'>-            "__scanf",</div><div class='del'>-            "__gnu_inline",</div><div class='del'>-            "__malloc",</div><div class='del'>-            "__mode",</div><div class='del'>-            "__no_caller_saved_registers",</div><div class='del'>-            "__noclone",</div><div class='del'>-            "__nonstring",</div><div class='del'>-            "__noreturn",</div><div class='del'>-            "__packed",</div><div class='del'>-            "__pure",</div><div class='del'>-            "__section",</div><div class='del'>-            "__always_unused",</div><div class='del'>-            "__maybe_unused",</div><div class='del'>-            "__used",</div><div class='del'>-            "__weak",</div><div class='del'>-            "noinline",</div><div class='del'>-            "__fix_address",</div><div class='del'>-            "__counted_by",</div><div class='del'>-</div><div class='del'>-            # include/linux/memblock.h:</div><div class='del'>-            "__init_memblock",</div><div class='del'>-            "__meminit",</div><div class='del'>-</div><div class='del'>-            # include/linux/init.h:</div><div class='del'>-            "__init",</div><div class='del'>-            "__ref",</div><div class='del'>-</div><div class='del'>-            # include/linux/linkage.h:</div><div class='del'>-            "asmlinkage",</div><div class='del'>-</div><div class='del'>-            # include/linux/btf.h</div><div class='del'>-            "__bpf_kfunc",</div><div class='del'>-        ]</div><div class='del'>-</div><div class='del'>-else:</div><div class='del'>-    extensions.append('cdomain')</div><div class='add'>+# Since Sphinx version 3, the C function parser is more pedantic with regards</div><div class='add'>+# to type checking. Due to that, having macros at c:function cause problems.</div><div class='add'>+# Those needed to be escaped by using c_id_attributes[] array</div><div class='add'>+c_id_attributes = [</div><div class='add'>+    # GCC Compiler types not parsed by Sphinx:</div><div class='add'>+    "__restrict__",</div><div class='add'>+</div><div class='add'>+    # include/linux/compiler_types.h:</div><div class='add'>+    "__iomem",</div><div class='add'>+    "__kernel",</div><div class='add'>+    "noinstr",</div><div class='add'>+    "notrace",</div><div class='add'>+    "__percpu",</div><div class='add'>+    "__rcu",</div><div class='add'>+    "__user",</div><div class='add'>+    "__force",</div><div class='add'>+    "__counted_by_le",</div><div class='add'>+    "__counted_by_be",</div><div class='add'>+</div><div class='add'>+    # include/linux/compiler_attributes.h:</div><div class='add'>+    "__alias",</div><div class='add'>+    "__aligned",</div><div class='add'>+    "__aligned_largest",</div><div class='add'>+    "__always_inline",</div><div class='add'>+    "__assume_aligned",</div><div class='add'>+    "__cold",</div><div class='add'>+    "__attribute_const__",</div><div class='add'>+    "__copy",</div><div class='add'>+    "__pure",</div><div class='add'>+    "__designated_init",</div><div class='add'>+    "__visible",</div><div class='add'>+    "__printf",</div><div class='add'>+    "__scanf",</div><div class='add'>+    "__gnu_inline",</div><div class='add'>+    "__malloc",</div><div class='add'>+    "__mode",</div><div class='add'>+    "__no_caller_saved_registers",</div><div class='add'>+    "__noclone",</div><div class='add'>+    "__nonstring",</div><div class='add'>+    "__noreturn",</div><div class='add'>+    "__packed",</div><div class='add'>+    "__pure",</div><div class='add'>+    "__section",</div><div class='add'>+    "__always_unused",</div><div class='add'>+    "__maybe_unused",</div><div class='add'>+    "__used",</div><div class='add'>+    "__weak",</div><div class='add'>+    "noinline",</div><div class='add'>+    "__fix_address",</div><div class='add'>+    "__counted_by",</div><div class='add'>+</div><div class='add'>+    # include/linux/memblock.h:</div><div class='add'>+    "__init_memblock",</div><div class='add'>+    "__meminit",</div><div class='add'>+</div><div class='add'>+    # include/linux/init.h:</div><div class='add'>+    "__init",</div><div class='add'>+    "__ref",</div><div class='add'>+</div><div class='add'>+    # include/linux/linkage.h:</div><div class='add'>+    "asmlinkage",</div><div class='add'>+</div><div class='add'>+    # include/linux/btf.h</div><div class='add'>+    "__bpf_kfunc",</div><div class='add'>+]</div><div class='ctx'> </div><div class='ctx'> # Ensure that autosectionlabel will produce unique names</div><div class='ctx'> autosectionlabel_prefix_document = True</div><div class='hunk'>@@ -149,10 +134,6 @@ if 'SPHINX_IMGMATH' in os.environ:</div><div class='ctx'>     else:</div><div class='ctx'>         sys.stderr.write("Unknown env SPHINX_IMGMATH=%s ignored.\n" % env_sphinx_imgmath)</div><div class='ctx'> </div><div class='del'>-# Always load imgmath for Sphinx &lt;1.8 or for epub docs</div><div class='del'>-load_imgmath = (load_imgmath or (major == 1 and minor &lt; 8)</div><div class='del'>-                or 'epub' in sys.argv)</div><div class='del'>-</div><div class='ctx'> if load_imgmath:</div><div class='ctx'>     extensions.append("sphinx.ext.imgmath")</div><div class='ctx'>     math_renderer = 'imgmath'</div><div class='hunk'>@@ -322,14 +303,6 @@ if "DOCS_CSS" in os.environ:</div><div class='ctx'>     for l in css:</div><div class='ctx'>         html_css_files.append(l)</div><div class='ctx'> </div><div class='del'>-if major &lt;= 1 and minor &lt; 8:</div><div class='del'>-    html_context = {</div><div class='del'>-        'css_files': [],</div><div class='del'>-    }</div><div class='del'>-</div><div class='del'>-    for l in html_css_files:</div><div class='del'>-        html_context['css_files'].append('_static/' + l)</div><div class='del'>-</div><div class='ctx'> if  html_theme == 'alabaster':</div><div class='ctx'>     html_theme_options = {</div><div class='ctx'>         'description': get_cline_version(),</div><div class='hunk'>@@ -409,11 +382,6 @@ latex_elements = {</div><div class='ctx'>     ''',</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-# Fix reference escape troubles with Sphinx 1.4.x</div><div class='del'>-if major == 1:</div><div class='del'>-    latex_elements['preamble']  += '\\renewcommand*{\\DUrole}[2]{ #2 }\n'</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> # Load kerneldoc specific LaTeX settings</div><div class='ctx'> latex_elements['preamble'] += '''</div><div class='ctx'>         % Load kerneldoc specific LaTeX settings</div><div class='hunk'>@@ -540,7 +508,7 @@ pdf_documents = [</div><div class='ctx'> # kernel-doc extension configuration for running Sphinx directly (e.g. by Read</div><div class='ctx'> # the Docs). In a normal build, these are supplied from the Makefile via command</div><div class='ctx'> # line arguments.</div><div class='del'>-kerneldoc_bin = '../scripts/kernel-doc'</div><div class='add'>+kerneldoc_bin = '../scripts/kernel-doc.py'</div><div class='ctx'> kerneldoc_srctree = '..'</div><div class='ctx'> </div><div class='ctx'> # ------------------------------------------------------------------------------</div><div class='head'>diff --git a/Documentation/core-api/dma-api.rst b/Documentation/core-api/dma-api.rst<br/>index 8e3cce3d0a23..2ad08517e626 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/dma-api.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/dma-api.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/dma-api.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/core-api/dma-api.rst</a></div><div class='hunk'>@@ -530,6 +530,77 @@ routines, e.g.:::</div><div class='ctx'> 		....</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+Part Ie - IOVA-based DMA mappings</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+These APIs allow a very efficient mapping when using an IOMMU.  They are an</div><div class='add'>+optional path that requires extra code and are only recommended for drivers</div><div class='add'>+where DMA mapping performance, or the space usage for storing the DMA addresses</div><div class='add'>+matter.  All the considerations from the previous section apply here as well.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    bool dma_iova_try_alloc(struct device *dev, struct dma_iova_state *state,</div><div class='add'>+		phys_addr_t phys, size_t size);</div><div class='add'>+</div><div class='add'>+Is used to try to allocate IOVA space for mapping operation.  If it returns</div><div class='add'>+false this API can't be used for the given device and the normal streaming</div><div class='add'>+DMA mapping API should be used.  The ``struct dma_iova_state`` is allocated</div><div class='add'>+by the driver and must be kept around until unmap time.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    static inline bool dma_use_iova(struct dma_iova_state *state)</div><div class='add'>+</div><div class='add'>+Can be used by the driver to check if the IOVA-based API is used after a</div><div class='add'>+call to dma_iova_try_alloc.  This can be useful in the unmap path.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    int dma_iova_link(struct device *dev, struct dma_iova_state *state,</div><div class='add'>+		phys_addr_t phys, size_t offset, size_t size,</div><div class='add'>+		enum dma_data_direction dir, unsigned long attrs);</div><div class='add'>+</div><div class='add'>+Is used to link ranges to the IOVA previously allocated.  The start of all</div><div class='add'>+but the first call to dma_iova_link for a given state must be aligned</div><div class='add'>+to the DMA merge boundary returned by ``dma_get_merge_boundary())``, and</div><div class='add'>+the size of all but the last range must be aligned to the DMA merge boundary</div><div class='add'>+as well.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    int dma_iova_sync(struct device *dev, struct dma_iova_state *state,</div><div class='add'>+		size_t offset, size_t size);</div><div class='add'>+</div><div class='add'>+Must be called to sync the IOMMU page tables for IOVA-range mapped by one or</div><div class='add'>+more calls to ``dma_iova_link()``.</div><div class='add'>+</div><div class='add'>+For drivers that use a one-shot mapping, all ranges can be unmapped and the</div><div class='add'>+IOVA freed by calling:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+   void dma_iova_destroy(struct device *dev, struct dma_iova_state *state,</div><div class='add'>+		size_t mapped_len, enum dma_data_direction dir,</div><div class='add'>+                unsigned long attrs);</div><div class='add'>+</div><div class='add'>+Alternatively drivers can dynamically manage the IOVA space by unmapping</div><div class='add'>+and mapping individual regions.  In that case</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    void dma_iova_unlink(struct device *dev, struct dma_iova_state *state,</div><div class='add'>+		size_t offset, size_t size, enum dma_data_direction dir,</div><div class='add'>+		unsigned long attrs);</div><div class='add'>+</div><div class='add'>+is used to unmap a range previously mapped, and</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+   void dma_iova_free(struct device *dev, struct dma_iova_state *state);</div><div class='add'>+</div><div class='add'>+is used to free the IOVA space.  All regions must have been unmapped using</div><div class='add'>+``dma_iova_unlink()`` before calling ``dma_iova_free()``.</div><div class='ctx'> </div><div class='ctx'> Part II - Non-coherent DMA allocations</div><div class='ctx'> --------------------------------------</div><div class='head'>diff --git a/Documentation/core-api/genericirq.rst b/Documentation/core-api/genericirq.rst<br/>index 25f94dfd66fa..582bde9bf5a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/genericirq.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/genericirq.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/genericirq.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/core-api/genericirq.rst</a></div><div class='hunk'>@@ -410,8 +410,6 @@ which are used in the generic IRQ layer.</div><div class='ctx'> .. kernel-doc:: include/linux/interrupt.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/linux/irqdomain.h</div><div class='del'>-</div><div class='ctx'> Public Functions Provided</div><div class='ctx'> =========================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/irq/concepts.rst b/Documentation/core-api/irq/concepts.rst<br/>index 4273806a606b..7c4564f3cbdf 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/irq/concepts.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/irq/concepts.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/irq/concepts.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/core-api/irq/concepts.rst</a></div><div class='hunk'>@@ -2,23 +2,24 @@</div><div class='ctx'> What is an IRQ?</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='del'>-An IRQ is an interrupt request from a device.</div><div class='del'>-Currently they can come in over a pin, or over a packet.</div><div class='del'>-Several devices may be connected to the same pin thus</div><div class='del'>-sharing an IRQ.</div><div class='add'>+An IRQ is an interrupt request from a device. Currently, they can come</div><div class='add'>+in over a pin, or over a packet. Several devices may be connected to</div><div class='add'>+the same pin thus sharing an IRQ. Such as on legacy PCI bus: All devices</div><div class='add'>+typically share 4 lanes/pins. Note that each device can request an</div><div class='add'>+interrupt on each of the lanes.</div><div class='ctx'> </div><div class='ctx'> An IRQ number is a kernel identifier used to talk about a hardware</div><div class='del'>-interrupt source.  Typically this is an index into the global irq_desc</div><div class='del'>-array, but except for what linux/interrupt.h implements the details</div><div class='del'>-are architecture specific.</div><div class='add'>+interrupt source. Typically, this is an index into the global irq_desc</div><div class='add'>+array or sparse_irqs tree. But except for what linux/interrupt.h</div><div class='add'>+implements, the details are architecture specific.</div><div class='ctx'> </div><div class='ctx'> An IRQ number is an enumeration of the possible interrupt sources on a</div><div class='del'>-machine.  Typically what is enumerated is the number of input pins on</div><div class='del'>-all of the interrupt controller in the system.  In the case of ISA</div><div class='del'>-what is enumerated are the 16 input pins on the two i8259 interrupt</div><div class='del'>-controllers.</div><div class='add'>+machine. Typically, what is enumerated is the number of input pins on</div><div class='add'>+all of the interrupt controllers in the system. In the case of ISA,</div><div class='add'>+what is enumerated are the 8 input pins on each of the two i8259</div><div class='add'>+interrupt controllers.</div><div class='ctx'> </div><div class='ctx'> Architectures can assign additional meaning to the IRQ numbers, and</div><div class='del'>-are encouraged to in the case  where there is any manual configuration</div><div class='del'>-of the hardware involved.  The ISA IRQs are a classic example of</div><div class='add'>+are encouraged to in the case where there is any manual configuration</div><div class='add'>+of the hardware involved. The ISA IRQs are a classic example of</div><div class='ctx'> assigning this kind of additional meaning.</div><div class='head'>diff --git a/Documentation/core-api/irq/irq-domain.rst b/Documentation/core-api/irq/irq-domain.rst<br/>index f88a6ee67a35..a01c6ead1bc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/irq/irq-domain.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/irq/irq-domain.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/irq/irq-domain.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/core-api/irq/irq-domain.rst</a></div><div class='hunk'>@@ -1,59 +1,77 @@</div><div class='ctx'> ===============================================</div><div class='del'>-The irq_domain interrupt number mapping library</div><div class='add'>+The irq_domain Interrupt Number Mapping Library</div><div class='ctx'> ===============================================</div><div class='ctx'> </div><div class='ctx'> The current design of the Linux kernel uses a single large number</div><div class='del'>-space where each separate IRQ source is assigned a different number.</div><div class='del'>-This is simple when there is only one interrupt controller, but in</div><div class='del'>-systems with multiple interrupt controllers the kernel must ensure</div><div class='add'>+space where each separate IRQ source is assigned a unique number.</div><div class='add'>+This is simple when there is only one interrupt controller. But in</div><div class='add'>+systems with multiple interrupt controllers, the kernel must ensure</div><div class='ctx'> that each one gets assigned non-overlapping allocations of Linux</div><div class='ctx'> IRQ numbers.</div><div class='ctx'> </div><div class='ctx'> The number of interrupt controllers registered as unique irqchips</div><div class='del'>-show a rising tendency: for example subdrivers of different kinds</div><div class='add'>+shows a rising tendency. For example, subdrivers of different kinds</div><div class='ctx'> such as GPIO controllers avoid reimplementing identical callback</div><div class='ctx'> mechanisms as the IRQ core system by modelling their interrupt</div><div class='del'>-handlers as irqchips, i.e. in effect cascading interrupt controllers.</div><div class='add'>+handlers as irqchips. I.e. in effect cascading interrupt controllers.</div><div class='ctx'> </div><div class='del'>-Here the interrupt number loose all kind of correspondence to</div><div class='del'>-hardware interrupt numbers: whereas in the past, IRQ numbers could</div><div class='del'>-be chosen so they matched the hardware IRQ line into the root</div><div class='del'>-interrupt controller (i.e. the component actually fireing the</div><div class='del'>-interrupt line to the CPU) nowadays this number is just a number.</div><div class='add'>+So in the past, IRQ numbers could be chosen so that they match the</div><div class='add'>+hardware IRQ line into the root interrupt controller (i.e. the</div><div class='add'>+component actually firing the interrupt line to the CPU). Nowadays,</div><div class='add'>+this number is just a number and the number loose all kind of</div><div class='add'>+correspondence to hardware interrupt numbers.</div><div class='ctx'> </div><div class='del'>-For this reason we need a mechanism to separate controller-local</div><div class='del'>-interrupt numbers, called hardware irq's, from Linux IRQ numbers.</div><div class='add'>+For this reason, we need a mechanism to separate controller-local</div><div class='add'>+interrupt numbers, called hardware IRQs, from Linux IRQ numbers.</div><div class='ctx'> </div><div class='ctx'> The irq_alloc_desc*() and irq_free_desc*() APIs provide allocation of</div><div class='del'>-irq numbers, but they don't provide any support for reverse mapping of</div><div class='add'>+IRQ numbers, but they don't provide any support for reverse mapping of</div><div class='ctx'> the controller-local IRQ (hwirq) number into the Linux IRQ number</div><div class='ctx'> space.</div><div class='ctx'> </div><div class='del'>-The irq_domain library adds mapping between hwirq and IRQ numbers on</div><div class='del'>-top of the irq_alloc_desc*() API.  An irq_domain to manage mapping is</div><div class='del'>-preferred over interrupt controller drivers open coding their own</div><div class='add'>+The irq_domain library adds a mapping between hwirq and IRQ numbers on</div><div class='add'>+top of the irq_alloc_desc*() API. An irq_domain to manage the mapping</div><div class='add'>+is preferred over interrupt controller drivers open coding their own</div><div class='ctx'> reverse mapping scheme.</div><div class='ctx'> </div><div class='del'>-irq_domain also implements translation from an abstract irq_fwspec</div><div class='del'>-structure to hwirq numbers (Device Tree and ACPI GSI so far), and can</div><div class='del'>-be easily extended to support other IRQ topology data sources.</div><div class='add'>+irq_domain also implements a translation from an abstract struct</div><div class='add'>+irq_fwspec to hwirq numbers (Device Tree, non-DT firmware node, ACPI</div><div class='add'>+GSI, and software node so far), and can be easily extended to support</div><div class='add'>+other IRQ topology data sources. The implementation is performed</div><div class='add'>+without any extra platform support code.</div><div class='ctx'> </div><div class='del'>-irq_domain usage</div><div class='add'>+irq_domain Usage</div><div class='ctx'> ================</div><div class='del'>-</div><div class='del'>-An interrupt controller driver creates and registers an irq_domain by</div><div class='del'>-calling one of the irq_domain_add_*() or irq_domain_create_*() functions</div><div class='del'>-(each mapping method has a different allocator function, more on that later).</div><div class='del'>-The function will return a pointer to the irq_domain on success. The caller</div><div class='del'>-must provide the allocator function with an irq_domain_ops structure.</div><div class='add'>+struct irq_domain could be defined as an irq domain controller. That</div><div class='add'>+is, it handles the mapping between hardware and virtual interrupt</div><div class='add'>+numbers for a given interrupt domain. The domain structure is</div><div class='add'>+generally created by the PIC code for a given PIC instance (though a</div><div class='add'>+domain can cover more than one PIC if they have a flat number model).</div><div class='add'>+It is the domain callbacks that are responsible for setting the</div><div class='add'>+irq_chip on a given irq_desc after it has been mapped.</div><div class='add'>+</div><div class='add'>+The host code and data structures use a fwnode_handle pointer to</div><div class='add'>+identify the domain. In some cases, and in order to preserve source</div><div class='add'>+code compatibility, this fwnode pointer is "upgraded" to a DT</div><div class='add'>+device_node. For those firmware infrastructures that do not provide a</div><div class='add'>+unique identifier for an interrupt controller, the irq_domain code</div><div class='add'>+offers a fwnode allocator.</div><div class='add'>+</div><div class='add'>+An interrupt controller driver creates and registers a struct irq_domain</div><div class='add'>+by calling one of the irq_domain_create_*() functions (each mapping</div><div class='add'>+method has a different allocator function, more on that later). The</div><div class='add'>+function will return a pointer to the struct irq_domain on success. The</div><div class='add'>+caller must provide the allocator function with a struct irq_domain_ops</div><div class='add'>+pointer.</div><div class='ctx'> </div><div class='ctx'> In most cases, the irq_domain will begin empty without any mappings</div><div class='ctx'> between hwirq and IRQ numbers.  Mappings are added to the irq_domain</div><div class='ctx'> by calling irq_create_mapping() which accepts the irq_domain and a</div><div class='del'>-hwirq number as arguments.  If a mapping for the hwirq doesn't already</div><div class='del'>-exist then it will allocate a new Linux irq_desc, associate it with</div><div class='del'>-the hwirq, and call the .map() callback so the driver can perform any</div><div class='del'>-required hardware setup.</div><div class='add'>+hwirq number as arguments. If a mapping for the hwirq doesn't already</div><div class='add'>+exist, irq_create_mapping() allocates a new Linux irq_desc, associates</div><div class='add'>+it with the hwirq, and calls the :c:member:`irq_domain_ops.map()`</div><div class='add'>+callback. In there, the driver can perform any required hardware</div><div class='add'>+setup.</div><div class='ctx'> </div><div class='ctx'> Once a mapping has been established, it can be retrieved or used via a</div><div class='ctx'> variety of methods:</div><div class='hunk'>@@ -63,8 +81,6 @@ variety of methods:</div><div class='ctx'>   mapping.</div><div class='ctx'> - irq_find_mapping() returns a Linux IRQ number for a given domain and</div><div class='ctx'>   hwirq number, and 0 if there was no mapping</div><div class='del'>-- irq_linear_revmap() is now identical to irq_find_mapping(), and is</div><div class='del'>-  deprecated</div><div class='ctx'> - generic_handle_domain_irq() handles an interrupt described by a</div><div class='ctx'>   domain and a hwirq number</div><div class='ctx'> </div><div class='hunk'>@@ -77,9 +93,10 @@ be allocated.</div><div class='ctx'> </div><div class='ctx'> If the driver has the Linux IRQ number or the irq_data pointer, and</div><div class='ctx'> needs to know the associated hwirq number (such as in the irq_chip</div><div class='del'>-callbacks) then it can be directly obtained from irq_data-&gt;hwirq.</div><div class='add'>+callbacks) then it can be directly obtained from</div><div class='add'>+:c:member:`irq_data.hwirq`.</div><div class='ctx'> </div><div class='del'>-Types of irq_domain mappings</div><div class='add'>+Types of irq_domain Mappings</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='ctx'> There are several mechanisms available for reverse mapping from hwirq</div><div class='hunk'>@@ -92,7 +109,6 @@ Linear</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_linear()</div><div class='ctx'> 	irq_domain_create_linear()</div><div class='ctx'> </div><div class='ctx'> The linear reverse map maintains a fixed size table indexed by the</div><div class='hunk'>@@ -105,19 +121,13 @@ map are fixed time lookup for IRQ numbers, and irq_descs are only</div><div class='ctx'> allocated for in-use IRQs.  The disadvantage is that the table must be</div><div class='ctx'> as large as the largest possible hwirq number.</div><div class='ctx'> </div><div class='del'>-irq_domain_add_linear() and irq_domain_create_linear() are functionally</div><div class='del'>-equivalent, except for the first argument is different - the former</div><div class='del'>-accepts an Open Firmware specific 'struct device_node', while the latter</div><div class='del'>-accepts a more general abstraction 'struct fwnode_handle'.</div><div class='del'>-</div><div class='del'>-The majority of drivers should use the linear map.</div><div class='add'>+The majority of drivers should use the Linear map.</div><div class='ctx'> </div><div class='ctx'> Tree</div><div class='ctx'> ----</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_tree()</div><div class='ctx'> 	irq_domain_create_tree()</div><div class='ctx'> </div><div class='ctx'> The irq_domain maintains a radix tree map from hwirq numbers to Linux</div><div class='hunk'>@@ -129,11 +139,6 @@ since it doesn't need to allocate a table as large as the largest</div><div class='ctx'> hwirq number.  The disadvantage is that hwirq to IRQ number lookup is</div><div class='ctx'> dependent on how many entries are in the table.</div><div class='ctx'> </div><div class='del'>-irq_domain_add_tree() and irq_domain_create_tree() are functionally</div><div class='del'>-equivalent, except for the first argument is different - the former</div><div class='del'>-accepts an Open Firmware specific 'struct device_node', while the latter</div><div class='del'>-accepts a more general abstraction 'struct fwnode_handle'.</div><div class='del'>-</div><div class='ctx'> Very few drivers should need this mapping.</div><div class='ctx'> </div><div class='ctx'> No Map</div><div class='hunk'>@@ -141,7 +146,7 @@ No Map</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_nomap()</div><div class='add'>+	irq_domain_create_nomap()</div><div class='ctx'> </div><div class='ctx'> The No Map mapping is to be used when the hwirq number is</div><div class='ctx'> programmable in the hardware.  In this case it is best to program the</div><div class='hunk'>@@ -159,8 +164,6 @@ Legacy</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_simple()</div><div class='del'>-	irq_domain_add_legacy()</div><div class='ctx'> 	irq_domain_create_simple()</div><div class='ctx'> 	irq_domain_create_legacy()</div><div class='ctx'> </div><div class='hunk'>@@ -189,13 +192,13 @@ supported.  For example, ISA controllers would use the legacy map for</div><div class='ctx'> mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ</div><div class='ctx'> numbers.</div><div class='ctx'> </div><div class='del'>-Most users of legacy mappings should use irq_domain_add_simple() or</div><div class='del'>-irq_domain_create_simple() which will use a legacy domain only if an IRQ range</div><div class='del'>-is supplied by the system and will otherwise use a linear domain mapping.</div><div class='del'>-The semantics of this call are such that if an IRQ range is specified then</div><div class='del'>-descriptors will be allocated on-the-fly for it, and if no range is</div><div class='del'>-specified it will fall through to irq_domain_add_linear() or</div><div class='del'>-irq_domain_create_linear() which means *no* irq descriptors will be allocated.</div><div class='add'>+Most users of legacy mappings should use irq_domain_create_simple()</div><div class='add'>+which will use a legacy domain only if an IRQ range is supplied by the</div><div class='add'>+system and will otherwise use a linear domain mapping. The semantics of</div><div class='add'>+this call are such that if an IRQ range is specified then descriptors</div><div class='add'>+will be allocated on-the-fly for it, and if no range is specified it</div><div class='add'>+will fall through to irq_domain_create_linear() which means *no* irq</div><div class='add'>+descriptors will be allocated.</div><div class='ctx'> </div><div class='ctx'> A typical use case for simple domains is where an irqchip provider</div><div class='ctx'> is supporting both dynamic and static IRQ assignments.</div><div class='hunk'>@@ -206,13 +209,7 @@ that the driver using the simple domain call irq_create_mapping()</div><div class='ctx'> before any irq_find_mapping() since the latter will actually work</div><div class='ctx'> for the static IRQ assignment case.</div><div class='ctx'> </div><div class='del'>-irq_domain_add_simple() and irq_domain_create_simple() as well as</div><div class='del'>-irq_domain_add_legacy() and irq_domain_create_legacy() are functionally</div><div class='del'>-equivalent, except for the first argument is different - the former</div><div class='del'>-accepts an Open Firmware specific 'struct device_node', while the latter</div><div class='del'>-accepts a more general abstraction 'struct fwnode_handle'.</div><div class='del'>-</div><div class='del'>-Hierarchy IRQ domain</div><div class='add'>+Hierarchy IRQ Domain</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='ctx'> On some architectures, there may be multiple interrupt controllers</div><div class='hunk'>@@ -253,20 +250,40 @@ There are four major interfaces to use hierarchy irq_domain:</div><div class='ctx'> 4) irq_domain_deactivate_irq(): deactivate interrupt controller hardware</div><div class='ctx'>    to stop delivering the interrupt.</div><div class='ctx'> </div><div class='del'>-Following changes are needed to support hierarchy irq_domain:</div><div class='add'>+The following is needed to support hierarchy irq_domain:</div><div class='ctx'> </div><div class='del'>-1) a new field 'parent' is added to struct irq_domain; it's used to</div><div class='add'>+1) The :c:member:`parent` field in struct irq_domain is used to</div><div class='ctx'>    maintain irq_domain hierarchy information.</div><div class='del'>-2) a new field 'parent_data' is added to struct irq_data; it's used to</div><div class='del'>-   build hierarchy irq_data to match hierarchy irq_domains. The irq_data</div><div class='del'>-   is used to store irq_domain pointer and hardware irq number.</div><div class='del'>-3) new callbacks are added to struct irq_domain_ops to support hierarchy</div><div class='del'>-   irq_domain operations.</div><div class='del'>-</div><div class='del'>-With support of hierarchy irq_domain and hierarchy irq_data ready, an</div><div class='del'>-irq_domain structure is built for each interrupt controller, and an</div><div class='add'>+2) The :c:member:`parent_data` field in struct irq_data is used to</div><div class='add'>+   build hierarchy irq_data to match hierarchy irq_domains. The</div><div class='add'>+   irq_data is used to store irq_domain pointer and hardware irq</div><div class='add'>+   number.</div><div class='add'>+3) The :c:member:`alloc()`, :c:member:`free()`, and other callbacks in</div><div class='add'>+   struct irq_domain_ops to support hierarchy irq_domain operations.</div><div class='add'>+</div><div class='add'>+With the support of hierarchy irq_domain and hierarchy irq_data ready,</div><div class='add'>+an irq_domain structure is built for each interrupt controller, and an</div><div class='ctx'> irq_data structure is allocated for each irq_domain associated with an</div><div class='del'>-IRQ. Now we could go one step further to support stacked(hierarchy)</div><div class='add'>+IRQ.</div><div class='add'>+</div><div class='add'>+For an interrupt controller driver to support hierarchy irq_domain, it</div><div class='add'>+needs to:</div><div class='add'>+</div><div class='add'>+1) Implement irq_domain_ops.alloc() and irq_domain_ops.free()</div><div class='add'>+2) Optionally, implement irq_domain_ops.activate() and</div><div class='add'>+   irq_domain_ops.deactivate().</div><div class='add'>+3) Optionally, implement an irq_chip to manage the interrupt controller</div><div class='add'>+   hardware.</div><div class='add'>+4) There is no need to implement irq_domain_ops.map() and</div><div class='add'>+   irq_domain_ops.unmap(). They are unused with hierarchy irq_domain.</div><div class='add'>+</div><div class='add'>+Note the hierarchy irq_domain is in no way x86-specific, and is</div><div class='add'>+heavily used to support other architectures, such as ARM, ARM64 etc.</div><div class='add'>+</div><div class='add'>+Stacked irq_chip</div><div class='add'>+~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Now, we could go one step further to support stacked (hierarchy)</div><div class='ctx'> irq_chip. That is, an irq_chip is associated with each irq_data along</div><div class='ctx'> the hierarchy. A child irq_chip may implement a required action by</div><div class='ctx'> itself or by cooperating with its parent irq_chip.</div><div class='hunk'>@@ -276,22 +293,28 @@ with the hardware managed by itself and may ask for services from its</div><div class='ctx'> parent irq_chip when needed. So we could achieve a much cleaner</div><div class='ctx'> software architecture.</div><div class='ctx'> </div><div class='del'>-For an interrupt controller driver to support hierarchy irq_domain, it</div><div class='del'>-needs to:</div><div class='del'>-</div><div class='del'>-1) Implement irq_domain_ops.alloc and irq_domain_ops.free</div><div class='del'>-2) Optionally implement irq_domain_ops.activate and</div><div class='del'>-   irq_domain_ops.deactivate.</div><div class='del'>-3) Optionally implement an irq_chip to manage the interrupt controller</div><div class='del'>-   hardware.</div><div class='del'>-4) No need to implement irq_domain_ops.map and irq_domain_ops.unmap,</div><div class='del'>-   they are unused with hierarchy irq_domain.</div><div class='del'>-</div><div class='del'>-Hierarchy irq_domain is in no way x86 specific, and is heavily used to</div><div class='del'>-support other architectures, such as ARM, ARM64 etc.</div><div class='del'>-</div><div class='ctx'> Debugging</div><div class='ctx'> =========</div><div class='ctx'> </div><div class='ctx'> Most of the internals of the IRQ subsystem are exposed in debugfs by</div><div class='ctx'> turning CONFIG_GENERIC_IRQ_DEBUGFS on.</div><div class='add'>+</div><div class='add'>+Structures and Public Functions Provided</div><div class='add'>+========================================</div><div class='add'>+</div><div class='add'>+This chapter contains the autogenerated documentation of the structures</div><div class='add'>+and exported kernel API functions which are used for IRQ domains.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/irqdomain.h</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/irq/irqdomain.c</div><div class='add'>+   :export:</div><div class='add'>+</div><div class='add'>+Internal Functions Provided</div><div class='add'>+===========================</div><div class='add'>+</div><div class='add'>+This chapter contains the autogenerated documentation of the internal</div><div class='add'>+functions.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/irq/irqdomain.c</div><div class='add'>+   :internal:</div><div class='head'>diff --git a/Documentation/core-api/printk-formats.rst b/Documentation/core-api/printk-formats.rst<br/>index 4bdc394e86af..4b7f3646ec6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/core-api/printk-formats.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/core-api/printk-formats.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/core-api/printk-formats.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/core-api/printk-formats.rst</a></div><div class='hunk'>@@ -571,9 +571,8 @@ struct clk</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'> 	%pC	pll1</div><div class='del'>-	%pCn	pll1</div><div class='ctx'> </div><div class='del'>-For printing struct clk structures. %pC and %pCn print the name of the clock</div><div class='add'>+For printing struct clk structures. %pC prints the name of the clock</div><div class='ctx'> (Common Clock Framework) or a unique 32-bit ID (legacy clock framework).</div><div class='ctx'> </div><div class='ctx'> Passed by reference.</div><div class='hunk'>@@ -648,6 +647,38 @@ Examples::</div><div class='ctx'> 	%p4cc	Y10  little-endian (0x20303159)</div><div class='ctx'> 	%p4cc	NV12 big-endian (0xb231564e)</div><div class='ctx'> </div><div class='add'>+Generic FourCC code</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+	%p4c[h[R]lb]	gP00 (0x67503030)</div><div class='add'>+</div><div class='add'>+Print a generic FourCC code, as both ASCII characters and its numerical</div><div class='add'>+value as hexadecimal.</div><div class='add'>+</div><div class='add'>+The generic FourCC code is always printed in the big-endian format,</div><div class='add'>+the most significant byte first. This is the opposite of V4L/DRM FourCCs.</div><div class='add'>+</div><div class='add'>+The additional ``h``, ``hR``, ``l``, and ``b`` specifiers define what</div><div class='add'>+endianness is used to load the stored bytes. The data might be interpreted</div><div class='add'>+using the host, reversed host byte order, little-endian, or big-endian.</div><div class='add'>+</div><div class='add'>+Passed by reference.</div><div class='add'>+</div><div class='add'>+Examples for a little-endian machine, given &amp;(u32)0x67503030::</div><div class='add'>+</div><div class='add'>+	%p4ch	gP00 (0x67503030)</div><div class='add'>+	%p4chR	00Pg (0x30305067)</div><div class='add'>+	%p4cl	gP00 (0x67503030)</div><div class='add'>+	%p4cb	00Pg (0x30305067)</div><div class='add'>+</div><div class='add'>+Examples for a big-endian machine, given &amp;(u32)0x67503030::</div><div class='add'>+</div><div class='add'>+	%p4ch	gP00 (0x67503030)</div><div class='add'>+	%p4chR	00Pg (0x30305067)</div><div class='add'>+	%p4cl	00Pg (0x30305067)</div><div class='add'>+	%p4cb	gP00 (0x67503030)</div><div class='add'>+</div><div class='ctx'> Rust</div><div class='ctx'> ----</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/dev-tools/kunit/run_wrapper.rst b/Documentation/dev-tools/kunit/run_wrapper.rst<br/>index 19ddf5e07013..6697c71ee8ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kunit/run_wrapper.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/dev-tools/kunit/run_wrapper.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kunit/run_wrapper.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/dev-tools/kunit/run_wrapper.rst</a></div><div class='hunk'>@@ -182,6 +182,8 @@ via UML. To run tests on qemu, by default it requires two flags:</div><div class='ctx'>   is ignored), the tests will run via UML. Non-UML architectures,</div><div class='ctx'>   for example: i386, x86_64, arm and so on; run on qemu.</div><div class='ctx'> </div><div class='add'>+  ``--arch help`` lists all valid ``--arch`` values.</div><div class='add'>+</div><div class='ctx'> - ``--cross_compile``: Specifies the Kbuild toolchain. It passes the</div><div class='ctx'>   same argument as passed to the ``CROSS_COMPILE`` variable used by</div><div class='ctx'>   Kbuild. As a reminder, this will be the prefix for the toolchain</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/usage.rst b/Documentation/dev-tools/kunit/usage.rst<br/>index 22955d56b379..038f480074fd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kunit/usage.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/dev-tools/kunit/usage.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/dev-tools/kunit/usage.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/dev-tools/kunit/usage.rst</a></div><div class='hunk'>@@ -670,28 +670,50 @@ with ``kunit_remove_action``.</div><div class='ctx'> Testing Static Functions</div><div class='ctx'> ------------------------</div><div class='ctx'> </div><div class='del'>-If we do not want to expose functions or variables for testing, one option is to</div><div class='del'>-conditionally export the used symbol. For example:</div><div class='add'>+If you want to test static functions without exposing those functions outside of</div><div class='add'>+testing, one option is conditionally export the symbol. When KUnit is enabled,</div><div class='add'>+the symbol is exposed but remains static otherwise. To use this method, follow</div><div class='add'>+the template below.</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='del'>-	/* In my_file.c */</div><div class='add'>+	/* In the file containing functions to test "my_file.c" */</div><div class='ctx'> </div><div class='del'>-	VISIBLE_IF_KUNIT int do_interesting_thing();</div><div class='add'>+	#include &lt;kunit/visibility.h&gt;</div><div class='add'>+	#include &lt;my_file.h&gt;</div><div class='add'>+	...</div><div class='add'>+	VISIBLE_IF_KUNIT int do_interesting_thing()</div><div class='add'>+	{</div><div class='add'>+	...</div><div class='add'>+	}</div><div class='ctx'> 	EXPORT_SYMBOL_IF_KUNIT(do_interesting_thing);</div><div class='ctx'> </div><div class='del'>-	/* In my_file.h */</div><div class='add'>+	/* In the header file "my_file.h" */</div><div class='ctx'> </div><div class='ctx'> 	#if IS_ENABLED(CONFIG_KUNIT)</div><div class='ctx'> 		int do_interesting_thing(void);</div><div class='ctx'> 	#endif</div><div class='ctx'> </div><div class='del'>-Alternatively, you could conditionally ``#include`` the test file at the end of</div><div class='del'>-your .c file. For example:</div><div class='add'>+	/* In the KUnit test file "my_file_test.c" */</div><div class='add'>+</div><div class='add'>+	#include &lt;kunit/visibility.h&gt;</div><div class='add'>+	#include &lt;my_file.h&gt;</div><div class='add'>+	...</div><div class='add'>+	MODULE_IMPORT_NS(EXPORTED_FOR_KUNIT_TESTING);</div><div class='add'>+	...</div><div class='add'>+	// Use do_interesting_thing() in tests</div><div class='add'>+</div><div class='add'>+For a full example, see this `patch &lt;https://lore.kernel.org/all/20221207014024.340230-3-rmoar@google.com/&gt;`_</div><div class='add'>+where a test is modified to conditionally expose static functions for testing</div><div class='add'>+using the macros above.</div><div class='add'>+</div><div class='add'>+As an **alternative** to the method above, you could conditionally ``#include``</div><div class='add'>+the test file at the end of your .c file. This is not recommended but works</div><div class='add'>+if needed. For example:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='del'>-	/* In my_file.c */</div><div class='add'>+	/* In "my_file.c" */</div><div class='ctx'> </div><div class='ctx'> 	static int do_interesting_thing();</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml<br/>index 2e666b2a4dcd..2e9ab9583005 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/cpus.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/arm/cpus.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/cpus.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/arm/cpus.yaml</a></div><div class='hunk'>@@ -10,9 +10,9 @@ maintainers:</div><div class='ctx'>   - Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |+</div><div class='del'>-  The device tree allows to describe the layout of CPUs in a system through</div><div class='del'>-  the "cpus" node, which in turn contains a number of subnodes (ie "cpu")</div><div class='del'>-  defining properties for every cpu.</div><div class='add'>+  The device tree allows to describe the layout of CPUs in a system through the</div><div class='add'>+  "cpus" node, which in turn contains a number of subnodes (ie "cpu") defining</div><div class='add'>+  properties for every cpu.</div><div class='ctx'> </div><div class='ctx'>   Bindings for CPU nodes follow the Devicetree Specification, available from:</div><div class='ctx'> </div><div class='hunk'>@@ -41,45 +41,40 @@ description: |+</div><div class='ctx'> properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      Usage and definition depend on ARM architecture version and</div><div class='del'>-      configuration:</div><div class='add'>+    description: &gt;</div><div class='add'>+      Usage and definition depend on ARM architecture version and configuration:</div><div class='ctx'> </div><div class='del'>-      On uniprocessor ARM architectures previous to v7</div><div class='del'>-      this property is required and must be set to 0.</div><div class='add'>+      On uniprocessor ARM architectures previous to v7 this property is required</div><div class='add'>+      and must be set to 0.</div><div class='ctx'> </div><div class='del'>-      On ARM 11 MPcore based systems this property is</div><div class='del'>-        required and matches the CPUID[11:0] register bits.</div><div class='add'>+      On ARM 11 MPcore based systems this property is required and matches the</div><div class='add'>+      CPUID[11:0] register bits.</div><div class='ctx'> </div><div class='del'>-        Bits [11:0] in the reg cell must be set to</div><div class='del'>-        bits [11:0] in CPU ID register.</div><div class='add'>+        Bits [11:0] in the reg cell must be set to bits [11:0] in CPU ID register.</div><div class='ctx'> </div><div class='ctx'>         All other bits in the reg cell must be set to 0.</div><div class='ctx'> </div><div class='del'>-      On 32-bit ARM v7 or later systems this property is</div><div class='del'>-        required and matches the CPU MPIDR[23:0] register</div><div class='del'>-        bits.</div><div class='add'>+      On 32-bit ARM v7 or later systems this property is required and matches</div><div class='add'>+      the CPU MPIDR[23:0] register bits.</div><div class='ctx'> </div><div class='del'>-        Bits [23:0] in the reg cell must be set to</div><div class='del'>-        bits [23:0] in MPIDR.</div><div class='add'>+        Bits [23:0] in the reg cell must be set to bits [23:0] in MPIDR.</div><div class='ctx'> </div><div class='ctx'>         All other bits in the reg cell must be set to 0.</div><div class='ctx'> </div><div class='del'>-      On ARM v8 64-bit systems this property is required</div><div class='del'>-        and matches the MPIDR_EL1 register affinity bits.</div><div class='add'>+      On ARM v8 64-bit systems this property is required and matches the</div><div class='add'>+      MPIDR_EL1 register affinity bits.</div><div class='ctx'> </div><div class='ctx'>         * If cpus node's #address-cells property is set to 2</div><div class='ctx'> </div><div class='del'>-          The first reg cell bits [7:0] must be set to</div><div class='del'>-          bits [39:32] of MPIDR_EL1.</div><div class='add'>+          The first reg cell bits [7:0] must be set to bits [39:32] of</div><div class='add'>+          MPIDR_EL1.</div><div class='ctx'> </div><div class='del'>-          The second reg cell bits [23:0] must be set to</div><div class='del'>-          bits [23:0] of MPIDR_EL1.</div><div class='add'>+          The second reg cell bits [23:0] must be set to bits [23:0] of</div><div class='add'>+          MPIDR_EL1.</div><div class='ctx'> </div><div class='ctx'>         * If cpus node's #address-cells property is set to 1</div><div class='ctx'> </div><div class='del'>-          The reg cell bits [23:0] must be set to bits [23:0]</div><div class='del'>-          of MPIDR_EL1.</div><div class='add'>+          The reg cell bits [23:0] must be set to bits [23:0] of MPIDR_EL1.</div><div class='ctx'> </div><div class='ctx'>       All other bits in the reg cells must be set to 0.</div><div class='ctx'> </div><div class='hunk'>@@ -273,103 +268,122 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       The DT specification defines this as 64-bit always, but some 32-bit Arm</div><div class='ctx'>       systems have used a 32-bit value which must be supported.</div><div class='del'>-      Required for systems that have an "enable-method"</div><div class='del'>-        property value of "spin-table".</div><div class='ctx'> </div><div class='ctx'>   cpu-idle-states:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      List of phandles to idle state nodes supported</div><div class='del'>-      by this cpu (see ./idle-states.yaml).</div><div class='add'>+    description:</div><div class='add'>+      List of phandles to idle state nodes supported by this cpu (see</div><div class='add'>+      ./idle-states.yaml).</div><div class='ctx'> </div><div class='ctx'>   capacity-dmips-mhz:</div><div class='ctx'>     description:</div><div class='ctx'>       u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in</div><div class='del'>-      DMIPS/MHz, relative to highest capacity-dmips-mhz</div><div class='del'>-      in the system.</div><div class='add'>+      DMIPS/MHz, relative to highest capacity-dmips-mhz in the system.</div><div class='ctx'> </div><div class='ctx'>   cci-control-port: true</div><div class='ctx'> </div><div class='ctx'>   dynamic-power-coefficient:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description:</div><div class='del'>-      A u32 value that represents the running time dynamic</div><div class='del'>-      power coefficient in units of uW/MHz/V^2. The</div><div class='del'>-      coefficient can either be calculated from power</div><div class='add'>+    description: &gt;</div><div class='add'>+      A u32 value that represents the running time dynamic power coefficient in</div><div class='add'>+      units of uW/MHz/V^2. The coefficient can either be calculated from power</div><div class='ctx'>       measurements or derived by analysis.</div><div class='ctx'> </div><div class='del'>-      The dynamic power consumption of the CPU  is</div><div class='del'>-      proportional to the square of the Voltage (V) and</div><div class='del'>-      the clock frequency (f). The coefficient is used to</div><div class='add'>+      The dynamic power consumption of the CPU  is proportional to the square of</div><div class='add'>+      the Voltage (V) and the clock frequency (f). The coefficient is used to</div><div class='ctx'>       calculate the dynamic power as below -</div><div class='ctx'> </div><div class='ctx'>       Pdyn = dynamic-power-coefficient * V^2 * f</div><div class='ctx'> </div><div class='ctx'>       where voltage is in V, frequency is in MHz.</div><div class='ctx'> </div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  nvmem-cells:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    const: speed_grade</div><div class='add'>+</div><div class='ctx'>   performance-domains:</div><div class='ctx'>     maxItems: 1</div><div class='del'>-    description:</div><div class='del'>-      List of phandles and performance domain specifiers, as defined by</div><div class='del'>-      bindings of the performance domain provider. See also</div><div class='del'>-      dvfs/performance-domain.yaml.</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='del'>-    description:</div><div class='del'>-      List of phandles and PM domain specifiers, as defined by bindings of the</div><div class='del'>-      PM domain provider (see also ../power_domain.txt).</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   power-domain-names:</div><div class='ctx'>     description:</div><div class='del'>-      A list of power domain name strings sorted in the same order as the</div><div class='del'>-      power-domains property.</div><div class='del'>-</div><div class='ctx'>       For PSCI based platforms, the name corresponding to the index of the PSCI</div><div class='ctx'>       PM domain provider, must be "psci". For SCMI based platforms, the name</div><div class='ctx'>       corresponding to the index of an SCMI performance domain provider, must be</div><div class='ctx'>       "perf".</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum: [ psci, perf, cpr ]</div><div class='ctx'> </div><div class='del'>-  qcom,saw:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    description: |</div><div class='del'>-      Specifies the SAW* node associated with this CPU.</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='del'>-      Required for systems that have an "enable-method" property</div><div class='del'>-      value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"</div><div class='add'>+  arm-supply:</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: Use 'cpu-supply' instead</div><div class='ctx'> </div><div class='del'>-      * arm/msm/qcom,saw2.txt</div><div class='add'>+  cpu0-supply:</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: Use 'cpu-supply' instead</div><div class='ctx'> </div><div class='del'>-  qcom,acc:</div><div class='add'>+  mem-supply: true</div><div class='add'>+</div><div class='add'>+  proc-supply:</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: Use 'cpu-supply' instead</div><div class='add'>+</div><div class='add'>+  sram-supply:</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: Use 'mem-supply' instead</div><div class='add'>+</div><div class='add'>+  mediatek,cci:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    description: |</div><div class='del'>-      Specifies the ACC* node associated with this CPU.</div><div class='add'>+    description: Link to Mediatek Cache Coherent Interconnect</div><div class='ctx'> </div><div class='del'>-      Required for systems that have an "enable-method" property</div><div class='del'>-      value of "qcom,kpss-acc-v1", "qcom,kpss-acc-v2", "qcom,msm8226-smp" or</div><div class='del'>-      "qcom,msm8916-smp".</div><div class='add'>+  qcom,saw:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Specifies the SAW node associated with this CPU.</div><div class='ctx'> </div><div class='del'>-      * arm/msm/qcom,kpss-acc.txt</div><div class='add'>+  qcom,acc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Specifies the ACC node associated with this CPU.</div><div class='add'>+</div><div class='add'>+  qcom,freq-domain:</div><div class='add'>+    description: Specifies the QCom CPUFREQ HW associated with the CPU.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   rockchip,pmu:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    description: |</div><div class='add'>+    description: &gt;</div><div class='ctx'>       Specifies the syscon node controlling the cpu core power domains.</div><div class='ctx'> </div><div class='del'>-      Optional for systems that have an "enable-method"</div><div class='del'>-      property value of "rockchip,rk3066-smp"</div><div class='del'>-      While optional, it is the preferred way to get access to</div><div class='del'>-      the cpu-core power-domains.</div><div class='add'>+      Optional for systems that have an "enable-method" property value of</div><div class='add'>+      "rockchip,rk3066-smp". While optional, it is the preferred way to get</div><div class='add'>+      access to the cpu-core power-domains.</div><div class='ctx'> </div><div class='ctx'>   secondary-boot-reg:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: |</div><div class='add'>+    description: &gt;</div><div class='ctx'>       Required for systems that have an "enable-method" property value of</div><div class='ctx'>       "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp".</div><div class='ctx'> </div><div class='del'>-      This includes the following SoCs: |</div><div class='del'>-      BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550</div><div class='add'>+      This includes the following SoCs:</div><div class='add'>+      BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550,</div><div class='ctx'>       BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312</div><div class='ctx'> </div><div class='ctx'>       The secondary-boot-reg property is a u32 value that specifies the</div><div class='hunk'>@@ -378,22 +392,66 @@ properties:</div><div class='ctx'>       formed by encoding the target CPU id into the low bits of the</div><div class='ctx'>       physical start address it should jump to.</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  # If the enable-method property contains one of those values</div><div class='del'>-  properties:</div><div class='del'>-    enable-method:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - brcm,bcm11351-cpu-method</div><div class='del'>-          - brcm,bcm23550</div><div class='del'>-          - brcm,bcm-nsp-smp</div><div class='del'>-  # and if enable-method is present</div><div class='del'>-  required:</div><div class='del'>-    - enable-method</div><div class='del'>-</div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - secondary-boot-reg</div><div class='add'>+  thermal-idle:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/cpu.yaml#</div><div class='add'>+  - $ref: /schemas/opp/opp-v1.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      # If the enable-method property contains one of those values</div><div class='add'>+      properties:</div><div class='add'>+        enable-method:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - brcm,bcm11351-cpu-method</div><div class='add'>+              - brcm,bcm23550</div><div class='add'>+              - brcm,bcm-nsp-smp</div><div class='add'>+      # and if enable-method is present</div><div class='add'>+      required:</div><div class='add'>+        - enable-method</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - secondary-boot-reg</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        enable-method:</div><div class='add'>+          enum:</div><div class='add'>+            - spin-table</div><div class='add'>+            - renesas,r9a06g032-smp</div><div class='add'>+      required:</div><div class='add'>+        - enable-method</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - cpu-release-addr</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        enable-method:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,kpss-acc-v1</div><div class='add'>+            - qcom,kpss-acc-v2</div><div class='add'>+            - qcom,msm8226-smp</div><div class='add'>+            - qcom,msm8916-smp</div><div class='add'>+      required:</div><div class='add'>+        - enable-method</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - qcom,acc</div><div class='add'>+        - qcom,saw</div><div class='add'>+    else:</div><div class='add'>+      if:</div><div class='add'>+        # 2 Qualcomm platforms bootloaders need qcom,acc and qcom,saw yet use</div><div class='add'>+        # "spin-table" or "psci" enable-methods. Disallowing the properties for</div><div class='add'>+        # all other CPUs is the best we can do as there's not any way to</div><div class='add'>+        # distinguish these Qualcomm platforms.</div><div class='add'>+        not:</div><div class='add'>+          properties:</div><div class='add'>+            compatible:</div><div class='add'>+              const: arm,cortex-a53</div><div class='add'>+      then:</div><div class='add'>+        properties:</div><div class='add'>+          qcom,acc: false</div><div class='add'>+          qcom,saw: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - device_type</div><div class='hunk'>@@ -403,7 +461,7 @@ required:</div><div class='ctx'> dependencies:</div><div class='ctx'>   rockchip,pmu: [enable-method]</div><div class='ctx'> </div><div class='del'>-additionalProperties: true</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml<br/>new file mode 100644<br/>index 000000000000..1f515bea3959<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/freescale/fsl,imx51-m4if.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Multi Master Multi Memory Interface (M4IF) and Tigerp module</div><div class='add'>+</div><div class='add'>+description: collect the imx devices, which only have compatible and reg property</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx51-m4if</div><div class='add'>+          - fsl,imx51-tigerp</div><div class='add'>+          - fsl,imx51-aipstz</div><div class='add'>+          - fsl,imx53-aipstz</div><div class='add'>+          - fsl,imx7d-pcie-phy</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx53-tigerp</div><div class='add'>+          - const: fsl,imx51-tigerp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    m4if@83fd8000 {</div><div class='add'>+        compatible = "fsl,imx51-m4if";</div><div class='add'>+        reg = &lt;0x83fd8000 0x1000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/freescale/m4if.txt b/Documentation/devicetree/bindings/arm/freescale/m4if.txt<br/>deleted file mode 100644<br/>index 93bd7b867a53..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/freescale/m4if.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/arm/freescale/m4if.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-* Freescale Multi Master Multi Memory Interface (M4IF) module</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "fsl,imx51-m4if"</div><div class='del'>-- reg : Address and length of the register set for the device</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-m4if: m4if@83fd8000 {</div><div class='del'>-	compatible = "fsl,imx51-m4if";</div><div class='del'>-	reg = &lt;0x83fd8000 0x1000&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/freescale/tigerp.txt b/Documentation/devicetree/bindings/arm/freescale/tigerp.txt<br/>deleted file mode 100644<br/>index 19e2aad63d6e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/freescale/tigerp.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/arm/freescale/tigerp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-* Freescale Tigerp platform module</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "fsl,imx51-tigerp"</div><div class='del'>-- reg : Address and length of the register set for the device</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-tigerp: tigerp@83fa0000 {</div><div class='del'>-	compatible = "fsl,imx51-tigerp";</div><div class='del'>-	reg = &lt;0x83fa0000 0x28&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml<br/>index cbb012e217ab..7360a2849b5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/psci.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/arm/psci.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/arm/psci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/arm/psci.yaml</a></div><div class='hunk'>@@ -191,27 +191,27 @@ examples:</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-      CPU0: cpu@0 {</div><div class='add'>+      cpu@0 {</div><div class='ctx'>         device_type = "cpu";</div><div class='ctx'>         compatible = "arm,cortex-a53";</div><div class='ctx'>         reg = &lt;0x0&gt;;</div><div class='ctx'>         enable-method = "psci";</div><div class='del'>-        power-domains = &lt;&amp;CPU_PD0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;cpu_pd0&gt;;</div><div class='ctx'>         power-domain-names = "psci";</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='del'>-      CPU1: cpu@1 {</div><div class='add'>+      cpu@1 {</div><div class='ctx'>         device_type = "cpu";</div><div class='ctx'>         compatible = "arm,cortex-a53";</div><div class='ctx'>         reg = &lt;0x100&gt;;</div><div class='ctx'>         enable-method = "psci";</div><div class='del'>-        power-domains = &lt;&amp;CPU_PD1&gt;;</div><div class='add'>+        power-domains = &lt;&amp;cpu_pd1&gt;;</div><div class='ctx'>         power-domain-names = "psci";</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='ctx'>       idle-states {</div><div class='ctx'> </div><div class='del'>-        CPU_PWRDN: cpu-power-down {</div><div class='add'>+        cpu_pwrdn: cpu-power-down {</div><div class='ctx'>           compatible = "arm,idle-state";</div><div class='ctx'>           arm,psci-suspend-param = &lt;0x0000001&gt;;</div><div class='ctx'>           entry-latency-us = &lt;10&gt;;</div><div class='hunk'>@@ -222,7 +222,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>       domain-idle-states {</div><div class='ctx'> </div><div class='del'>-        CLUSTER_RET: cluster-retention {</div><div class='add'>+        cluster_ret: cluster-retention {</div><div class='ctx'>           compatible = "domain-idle-state";</div><div class='ctx'>           arm,psci-suspend-param = &lt;0x1000011&gt;;</div><div class='ctx'>           entry-latency-us = &lt;500&gt;;</div><div class='hunk'>@@ -230,7 +230,7 @@ examples:</div><div class='ctx'>           min-residency-us = &lt;2000&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        CLUSTER_PWRDN: cluster-power-down {</div><div class='add'>+        cluster_pwrdn: cluster-power-down {</div><div class='ctx'>           compatible = "domain-idle-state";</div><div class='ctx'>           arm,psci-suspend-param = &lt;0x1000031&gt;;</div><div class='ctx'>           entry-latency-us = &lt;2000&gt;;</div><div class='hunk'>@@ -244,21 +244,21 @@ examples:</div><div class='ctx'>       compatible = "arm,psci-1.0";</div><div class='ctx'>       method = "smc";</div><div class='ctx'> </div><div class='del'>-      CPU_PD0: power-domain-cpu0 {</div><div class='add'>+      cpu_pd0: power-domain-cpu0 {</div><div class='ctx'>         #power-domain-cells = &lt;0&gt;;</div><div class='del'>-        domain-idle-states = &lt;&amp;CPU_PWRDN&gt;;</div><div class='del'>-        power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+        domain-idle-states = &lt;&amp;cpu_pwrdn&gt;;</div><div class='add'>+        power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='del'>-      CPU_PD1: power-domain-cpu1 {</div><div class='add'>+      cpu_pd1: power-domain-cpu1 {</div><div class='ctx'>         #power-domain-cells = &lt;0&gt;;</div><div class='del'>-        domain-idle-states =  &lt;&amp;CPU_PWRDN&gt;;</div><div class='del'>-        power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+        domain-idle-states =  &lt;&amp;cpu_pwrdn&gt;;</div><div class='add'>+        power-domains = &lt;&amp;cluster_pd&gt;;</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='del'>-      CLUSTER_PD: power-domain-cluster {</div><div class='add'>+      cluster_pd: power-domain-cluster {</div><div class='ctx'>         #power-domain-cells = &lt;0&gt;;</div><div class='del'>-        domain-idle-states = &lt;&amp;CLUSTER_RET&gt;, &lt;&amp;CLUSTER_PWRDN&gt;;</div><div class='add'>+        domain-idle-states = &lt;&amp;cluster_ret&gt;, &lt;&amp;cluster_pwrdn&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml<br/>index 6ad78429dc74..c92341888a28 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml</a></div><div class='hunk'>@@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Ceva AHCI SATA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;</div><div class='ctx'>   - Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml<br/>index 26362c9006e2..81a65e9f93f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml</a></div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-aconnect</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-aconnect</div><div class='ctx'>               - nvidia,tegra234-aconnect</div><div class='ctx'>               - nvidia,tegra186-aconnect</div><div class='ctx'>               - nvidia,tegra194-aconnect</div><div class='head'>diff --git a/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml b/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml<br/>new file mode 100644<br/>index 000000000000..384ca63b64d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/counter/fsl,ftm-quaddec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: FlexTimer Quadrature decoder counter</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Exposes a simple counter for the quadrature decoder mode.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,ftm-quaddec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  big-endian: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    counter@29d0000 {</div><div class='add'>+       compatible = "fsl,ftm-quaddec";</div><div class='add'>+       reg = &lt;0x29d0000 0x10000&gt;;</div><div class='add'>+       big-endian;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/counter/ftm-quaddec.txt b/Documentation/devicetree/bindings/counter/ftm-quaddec.txt<br/>deleted file mode 100644<br/>index 4d18cd722074..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/counter/ftm-quaddec.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/counter/ftm-quaddec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-FlexTimer Quadrature decoder counter</div><div class='del'>-</div><div class='del'>-This driver exposes a simple counter for the quadrature decoder mode.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Must be "fsl,ftm-quaddec".</div><div class='del'>-- reg:			Must be set to the memory region of the flextimer.</div><div class='del'>-</div><div class='del'>-Optional property:</div><div class='del'>-- big-endian:		Access the device registers in big-endian mode.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-		counter0: counter@29d0000 {</div><div class='del'>-			compatible = "fsl,ftm-quaddec";</div><div class='del'>-			reg = &lt;0x0 0x29d0000 0x0 0x10000&gt;;</div><div class='del'>-			big-endian;</div><div class='del'>-			status = "disabled";</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpu/cpu-topology.txt b/Documentation/devicetree/bindings/cpu/cpu-topology.txt<br/>deleted file mode 100644<br/>index 9bd530a35d14..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/cpu/cpu-topology.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/cpu/cpu-topology.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,553 +0,0 @@</div><div class='del'>-===========================================</div><div class='del'>-CPU topology binding description</div><div class='del'>-===========================================</div><div class='del'>-</div><div class='del'>-===========================================</div><div class='del'>-1 - Introduction</div><div class='del'>-===========================================</div><div class='del'>-</div><div class='del'>-In a SMP system, the hierarchy of CPUs is defined through three entities that</div><div class='del'>-are used to describe the layout of physical CPUs in the system:</div><div class='del'>-</div><div class='del'>-- socket</div><div class='del'>-- cluster</div><div class='del'>-- core</div><div class='del'>-- thread</div><div class='del'>-</div><div class='del'>-The bottom hierarchy level sits at core or thread level depending on whether</div><div class='del'>-symmetric multi-threading (SMT) is supported or not.</div><div class='del'>-</div><div class='del'>-For instance in a system where CPUs support SMT, "cpu" nodes represent all</div><div class='del'>-threads existing in the system and map to the hierarchy level "thread" above.</div><div class='del'>-In systems where SMT is not supported "cpu" nodes represent all cores present</div><div class='del'>-in the system and map to the hierarchy level "core" above.</div><div class='del'>-</div><div class='del'>-CPU topology bindings allow one to associate cpu nodes with hierarchical groups</div><div class='del'>-corresponding to the system hierarchy; syntactically they are defined as device</div><div class='del'>-tree nodes.</div><div class='del'>-</div><div class='del'>-Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be</div><div class='del'>-used for any other architecture as well.</div><div class='del'>-</div><div class='del'>-The cpu nodes, as per bindings defined in [4], represent the devices that</div><div class='del'>-correspond to physical CPUs and are to be mapped to the hierarchy levels.</div><div class='del'>-</div><div class='del'>-A topology description containing phandles to cpu nodes that are not compliant</div><div class='del'>-with bindings standardized in [4] is therefore considered invalid.</div><div class='del'>-</div><div class='del'>-===========================================</div><div class='del'>-2 - cpu-map node</div><div class='del'>-===========================================</div><div class='del'>-</div><div class='del'>-The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct</div><div class='del'>-child of the cpus node and provides a container where the actual topology</div><div class='del'>-nodes are listed.</div><div class='del'>-</div><div class='del'>-- cpu-map node</div><div class='del'>-</div><div class='del'>-	Usage: Optional - On SMP systems provide CPUs topology to the OS.</div><div class='del'>-			  Uniprocessor systems do not require a topology</div><div class='del'>-			  description and therefore should not define a</div><div class='del'>-			  cpu-map node.</div><div class='del'>-</div><div class='del'>-	Description: The cpu-map node is just a container node where its</div><div class='del'>-		     subnodes describe the CPU topology.</div><div class='del'>-</div><div class='del'>-	Node name must be "cpu-map".</div><div class='del'>-</div><div class='del'>-	The cpu-map node's parent node must be the cpus node.</div><div class='del'>-</div><div class='del'>-	The cpu-map node's child nodes can be:</div><div class='del'>-</div><div class='del'>-	- one or more cluster nodes or</div><div class='del'>-	- one or more socket nodes in a multi-socket system</div><div class='del'>-</div><div class='del'>-	Any other configuration is considered invalid.</div><div class='del'>-</div><div class='del'>-The cpu-map node can only contain 4 types of child nodes:</div><div class='del'>-</div><div class='del'>-- socket node</div><div class='del'>-- cluster node</div><div class='del'>-- core node</div><div class='del'>-- thread node</div><div class='del'>-</div><div class='del'>-whose bindings are described in paragraph 3.</div><div class='del'>-</div><div class='del'>-The nodes describing the CPU topology (socket/cluster/core/thread) can</div><div class='del'>-only be defined within the cpu-map node and every core/thread in the</div><div class='del'>-system must be defined within the topology.  Any other configuration is</div><div class='del'>-invalid and therefore must be ignored.</div><div class='del'>-</div><div class='del'>-===========================================</div><div class='del'>-2.1 - cpu-map child nodes naming convention</div><div class='del'>-===========================================</div><div class='del'>-</div><div class='del'>-cpu-map child nodes must follow a naming convention where the node name</div><div class='del'>-must be "socketN", "clusterN", "coreN", "threadN" depending on the node type</div><div class='del'>-(ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes</div><div class='del'>-which are siblings within a single common parent node must be given a unique and</div><div class='del'>-sequential N value, starting from 0).</div><div class='del'>-cpu-map child nodes which do not share a common parent node can have the same</div><div class='del'>-name (ie same number N as other cpu-map child nodes at different device tree</div><div class='del'>-levels) since name uniqueness will be guaranteed by the device tree hierarchy.</div><div class='del'>-</div><div class='del'>-===========================================</div><div class='del'>-3 - socket/cluster/core/thread node bindings</div><div class='del'>-===========================================</div><div class='del'>-</div><div class='del'>-Bindings for socket/cluster/cpu/thread nodes are defined as follows:</div><div class='del'>-</div><div class='del'>-- socket node</div><div class='del'>-</div><div class='del'>-	 Description: must be declared within a cpu-map node, one node</div><div class='del'>-		      per physical socket in the system. A system can</div><div class='del'>-		      contain single or multiple physical socket.</div><div class='del'>-		      The association of sockets and NUMA nodes is beyond</div><div class='del'>-		      the scope of this bindings, please refer [2] for</div><div class='del'>-		      NUMA bindings.</div><div class='del'>-</div><div class='del'>-	This node is optional for a single socket system.</div><div class='del'>-</div><div class='del'>-	The socket node name must be "socketN" as described in 2.1 above.</div><div class='del'>-	A socket node can not be a leaf node.</div><div class='del'>-</div><div class='del'>-	A socket node's child nodes must be one or more cluster nodes.</div><div class='del'>-</div><div class='del'>-	Any other configuration is considered invalid.</div><div class='del'>-</div><div class='del'>-- cluster node</div><div class='del'>-</div><div class='del'>-	 Description: must be declared within a cpu-map node, one node</div><div class='del'>-		      per cluster. A system can contain several layers of</div><div class='del'>-		      clustering within a single physical socket and cluster</div><div class='del'>-		      nodes can be contained in parent cluster nodes.</div><div class='del'>-</div><div class='del'>-	The cluster node name must be "clusterN" as described in 2.1 above.</div><div class='del'>-	A cluster node can not be a leaf node.</div><div class='del'>-</div><div class='del'>-	A cluster node's child nodes must be:</div><div class='del'>-</div><div class='del'>-	- one or more cluster nodes; or</div><div class='del'>-	- one or more core nodes</div><div class='del'>-</div><div class='del'>-	Any other configuration is considered invalid.</div><div class='del'>-</div><div class='del'>-- core node</div><div class='del'>-</div><div class='del'>-	Description: must be declared in a cluster node, one node per core in</div><div class='del'>-		     the cluster. If the system does not support SMT, core</div><div class='del'>-		     nodes are leaf nodes, otherwise they become containers of</div><div class='del'>-		     thread nodes.</div><div class='del'>-</div><div class='del'>-	The core node name must be "coreN" as described in 2.1 above.</div><div class='del'>-</div><div class='del'>-	A core node must be a leaf node if SMT is not supported.</div><div class='del'>-</div><div class='del'>-	Properties for core nodes that are leaf nodes:</div><div class='del'>-</div><div class='del'>-	- cpu</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;phandle&gt;</div><div class='del'>-		Definition: a phandle to the cpu node that corresponds to the</div><div class='del'>-			    core node.</div><div class='del'>-</div><div class='del'>-	If a core node is not a leaf node (CPUs supporting SMT) a core node's</div><div class='del'>-	child nodes can be:</div><div class='del'>-</div><div class='del'>-	- one or more thread nodes</div><div class='del'>-</div><div class='del'>-	Any other configuration is considered invalid.</div><div class='del'>-</div><div class='del'>-- thread node</div><div class='del'>-</div><div class='del'>-	Description: must be declared in a core node, one node per thread</div><div class='del'>-		     in the core if the system supports SMT. Thread nodes are</div><div class='del'>-		     always leaf nodes in the device tree.</div><div class='del'>-</div><div class='del'>-	The thread node name must be "threadN" as described in 2.1 above.</div><div class='del'>-</div><div class='del'>-	A thread node must be a leaf node.</div><div class='del'>-</div><div class='del'>-	A thread node must contain the following property:</div><div class='del'>-</div><div class='del'>-	- cpu</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;phandle&gt;</div><div class='del'>-		Definition: a phandle to the cpu node that corresponds to</div><div class='del'>-			    the thread node.</div><div class='del'>-</div><div class='del'>-===========================================</div><div class='del'>-4 - Example dts</div><div class='del'>-===========================================</div><div class='del'>-</div><div class='del'>-Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters in a single</div><div class='del'>-physical socket):</div><div class='del'>-</div><div class='del'>-cpus {</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	#address-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	cpu-map {</div><div class='del'>-		socket0 {</div><div class='del'>-			cluster0 {</div><div class='del'>-				cluster0 {</div><div class='del'>-					core0 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU0&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU1&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					core1 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU2&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU3&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				cluster1 {</div><div class='del'>-					core0 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU4&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU5&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					core1 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU6&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU7&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			cluster1 {</div><div class='del'>-				cluster0 {</div><div class='del'>-					core0 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU8&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU9&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-					core1 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU10&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU11&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				cluster1 {</div><div class='del'>-					core0 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU12&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU13&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-					core1 {</div><div class='del'>-						thread0 {</div><div class='del'>-							cpu = &lt;&amp;CPU14&gt;;</div><div class='del'>-						};</div><div class='del'>-						thread1 {</div><div class='del'>-							cpu = &lt;&amp;CPU15&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU0: cpu@0 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x0&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU1: cpu@1 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x1&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU2: cpu@100 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x100&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU3: cpu@101 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x101&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU4: cpu@10000 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x10000&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU5: cpu@10001 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x10001&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU6: cpu@10100 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x10100&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU7: cpu@10101 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x0 0x10101&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU8: cpu@100000000 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x0&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU9: cpu@100000001 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x1&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU10: cpu@100000100 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x100&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU11: cpu@100000101 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x101&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU12: cpu@100010000 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x10000&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU13: cpu@100010001 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x10001&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU14: cpu@100010100 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x10100&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU15: cpu@100010101 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a57";</div><div class='del'>-		reg = &lt;0x1 0x10101&gt;;</div><div class='del'>-		enable-method = "spin-table";</div><div class='del'>-		cpu-release-addr = &lt;0 0x20000000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT):</div><div class='del'>-</div><div class='del'>-cpus {</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-	cpu-map {</div><div class='del'>-		cluster0 {</div><div class='del'>-			core0 {</div><div class='del'>-				cpu = &lt;&amp;CPU0&gt;;</div><div class='del'>-			};</div><div class='del'>-			core1 {</div><div class='del'>-				cpu = &lt;&amp;CPU1&gt;;</div><div class='del'>-			};</div><div class='del'>-			core2 {</div><div class='del'>-				cpu = &lt;&amp;CPU2&gt;;</div><div class='del'>-			};</div><div class='del'>-			core3 {</div><div class='del'>-				cpu = &lt;&amp;CPU3&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cluster1 {</div><div class='del'>-			core0 {</div><div class='del'>-				cpu = &lt;&amp;CPU4&gt;;</div><div class='del'>-			};</div><div class='del'>-			core1 {</div><div class='del'>-				cpu = &lt;&amp;CPU5&gt;;</div><div class='del'>-			};</div><div class='del'>-			core2 {</div><div class='del'>-				cpu = &lt;&amp;CPU6&gt;;</div><div class='del'>-			};</div><div class='del'>-			core3 {</div><div class='del'>-				cpu = &lt;&amp;CPU7&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU0: cpu@0 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a15";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU1: cpu@1 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a15";</div><div class='del'>-		reg = &lt;0x1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU2: cpu@2 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a15";</div><div class='del'>-		reg = &lt;0x2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU3: cpu@3 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a15";</div><div class='del'>-		reg = &lt;0x3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU4: cpu@100 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x100&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU5: cpu@101 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x101&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU6: cpu@102 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x102&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CPU7: cpu@103 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x103&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example 3: HiFive Unleashed (RISC-V 64 bit, 4 core system)</div><div class='del'>-</div><div class='del'>-{</div><div class='del'>-	#address-cells = &lt;2&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='del'>-	compatible = "sifive,fu540g", "sifive,fu500";</div><div class='del'>-	model = "sifive,hifive-unleashed-a00";</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		cpu-map {</div><div class='del'>-			socket0 {</div><div class='del'>-				cluster0 {</div><div class='del'>-					core0 {</div><div class='del'>-						cpu = &lt;&amp;CPU1&gt;;</div><div class='del'>-					};</div><div class='del'>-					core1 {</div><div class='del'>-						cpu = &lt;&amp;CPU2&gt;;</div><div class='del'>-					};</div><div class='del'>-					core2 {</div><div class='del'>-						cpu0 = &lt;&amp;CPU2&gt;;</div><div class='del'>-					};</div><div class='del'>-					core3 {</div><div class='del'>-						cpu0 = &lt;&amp;CPU3&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		CPU1: cpu@1 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "sifive,rocket0", "riscv";</div><div class='del'>-			reg = &lt;0x1&gt;;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		CPU2: cpu@2 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "sifive,rocket0", "riscv";</div><div class='del'>-			reg = &lt;0x2&gt;;</div><div class='del'>-		}</div><div class='del'>-		CPU3: cpu@3 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "sifive,rocket0", "riscv";</div><div class='del'>-			reg = &lt;0x3&gt;;</div><div class='del'>-		}</div><div class='del'>-		CPU4: cpu@4 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible = "sifive,rocket0", "riscv";</div><div class='del'>-			reg = &lt;0x4&gt;;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-===============================================================================</div><div class='del'>-[1] ARM Linux kernel documentation</div><div class='del'>-    Documentation/devicetree/bindings/arm/cpus.yaml</div><div class='del'>-[2] Devicetree NUMA binding description</div><div class='del'>-    Documentation/devicetree/bindings/numa.txt</div><div class='del'>-[3] RISC-V Linux kernel documentation</div><div class='del'>-    Documentation/devicetree/bindings/riscv/cpus.yaml</div><div class='del'>-[4] https://www.devicetree.org/specifications/</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt<br/>deleted file mode 100644<br/>index e0a4ba599abc..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,250 +0,0 @@</div><div class='del'>-Binding for MediaTek's CPUFreq driver</div><div class='del'>-=====================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.</div><div class='del'>-- clock-names: Should contain the following:</div><div class='del'>-	"cpu"		- The multiplexer for clock input of CPU cluster.</div><div class='del'>-	"intermediate"	- A parent of "cpu" clock which is used as "intermediate" clock</div><div class='del'>-			  source (usually MAINPLL) when the original CPU PLL is under</div><div class='del'>-			  transition and not stable yet.</div><div class='del'>-	Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for</div><div class='del'>-	generic clock consumer properties.</div><div class='del'>-- operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml</div><div class='del'>-	for detail.</div><div class='del'>-- proc-supply: Regulator for Vproc of CPU cluster.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver</div><div class='del'>-	       needs to do "voltage tracking" to step by step scale up/down Vproc and</div><div class='del'>-	       Vsram to fit SoC specific needs. When absent, the voltage scaling</div><div class='del'>-	       flow is handled by hardware, hence no software "voltage tracking" is</div><div class='del'>-	       needed.</div><div class='del'>-- mediatek,cci:</div><div class='del'>-	Used to confirm the link status between cpufreq and mediatek cci. Because</div><div class='del'>-	cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.</div><div class='del'>-	To prevent the issue of high frequency and low voltage, we need to use this</div><div class='del'>-	property to make sure mediatek cci is ready.</div><div class='del'>-	For details of mediatek cci, please refer to</div><div class='del'>-	Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml</div><div class='del'>-- #cooling-cells:</div><div class='del'>-	For details, please refer to</div><div class='del'>-	Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml</div><div class='del'>-</div><div class='del'>-Example 1 (MT7623 SoC):</div><div class='del'>-</div><div class='del'>-	cpu_opp_table: opp_table {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-598000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;598000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-747500000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;747500000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1050000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1040000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1040000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1150000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1196000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1196000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1200000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1300000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1300000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1300000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpu0: cpu@0 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		clocks = &lt;&amp;infracfg CLK_INFRA_CPUSEL&gt;,</div><div class='del'>-			 &lt;&amp;apmixedsys CLK_APMIXED_MAINPLL&gt;;</div><div class='del'>-		clock-names = "cpu", "intermediate";</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-		#cooling-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-	cpu@1 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x1&gt;;</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-	};</div><div class='del'>-	cpu@2 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x2&gt;;</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-	};</div><div class='del'>-	cpu@3 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a7";</div><div class='del'>-		reg = &lt;0x3&gt;;</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 2 (MT8173 SoC):</div><div class='del'>-	cpu_opp_table_a: opp_table_a {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-507000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;507000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;859000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-702000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;702000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;908000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1001000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1001000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;983000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1105000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1105000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1009000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1183000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1183000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1028000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1404000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1404000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1083000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1508000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1508000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1109000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1573000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1573000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1125000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpu_opp_table_b: opp_table_b {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-507000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;507000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;828000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-702000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;702000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;867000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1001000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1001000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;927000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1209000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1209000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;968000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1404000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1007000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1028000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1612000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1612000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1049000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1807000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1807000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1089000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		opp-1989000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1989000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1125000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpu0: cpu@0 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a53";</div><div class='del'>-		reg = &lt;0x000&gt;;</div><div class='del'>-		enable-method = "psci";</div><div class='del'>-		cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-		clocks = &lt;&amp;infracfg CLK_INFRA_CA53SEL&gt;,</div><div class='del'>-			 &lt;&amp;apmixedsys CLK_APMIXED_MAINPLL&gt;;</div><div class='del'>-		clock-names = "cpu", "intermediate";</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table_a&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpu1: cpu@1 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a53";</div><div class='del'>-		reg = &lt;0x001&gt;;</div><div class='del'>-		enable-method = "psci";</div><div class='del'>-		cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-		clocks = &lt;&amp;infracfg CLK_INFRA_CA53SEL&gt;,</div><div class='del'>-			 &lt;&amp;apmixedsys CLK_APMIXED_MAINPLL&gt;;</div><div class='del'>-		clock-names = "cpu", "intermediate";</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table_a&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpu2: cpu@100 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a72";</div><div class='del'>-		reg = &lt;0x100&gt;;</div><div class='del'>-		enable-method = "psci";</div><div class='del'>-		cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-		clocks = &lt;&amp;infracfg CLK_INFRA_CA72SEL&gt;,</div><div class='del'>-			 &lt;&amp;apmixedsys CLK_APMIXED_MAINPLL&gt;;</div><div class='del'>-		clock-names = "cpu", "intermediate";</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table_b&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpu3: cpu@101 {</div><div class='del'>-		device_type = "cpu";</div><div class='del'>-		compatible = "arm,cortex-a72";</div><div class='del'>-		reg = &lt;0x101&gt;;</div><div class='del'>-		enable-method = "psci";</div><div class='del'>-		cpu-idle-states = &lt;&amp;CPU_SLEEP_0&gt;;</div><div class='del'>-		clocks = &lt;&amp;infracfg CLK_INFRA_CA72SEL&gt;,</div><div class='del'>-			 &lt;&amp;apmixedsys CLK_APMIXED_MAINPLL&gt;;</div><div class='del'>-		clock-names = "cpu", "intermediate";</div><div class='del'>-		operating-points-v2 = &lt;&amp;cpu_opp_table_b&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;cpu0 {</div><div class='del'>-		proc-supply = &lt;&amp;mt6397_vpca15_reg&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;cpu1 {</div><div class='del'>-		proc-supply = &lt;&amp;mt6397_vpca15_reg&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;cpu2 {</div><div class='del'>-		proc-supply = &lt;&amp;da9211_vcpu_reg&gt;;</div><div class='del'>-		sram-supply = &lt;&amp;mt6397_vsramca7_reg&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;cpu3 {</div><div class='del'>-		proc-supply = &lt;&amp;da9211_vcpu_reg&gt;;</div><div class='del'>-		sram-supply = &lt;&amp;mt6397_vsramca7_reg&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/amd,ccp-seattle-v1a.yaml b/Documentation/devicetree/bindings/crypto/amd,ccp-seattle-v1a.yaml<br/>new file mode 100644<br/>index 000000000000..32bf3a1c3b42<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/amd,ccp-seattle-v1a.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/amd,ccp-seattle-v1a.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/amd,ccp-seattle-v1a.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: AMD Cryptographic Coprocessor (ccp)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tom Lendacky &lt;thomas.lendacky@amd.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amd,ccp-seattle-v1a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    crypto@e0100000 {</div><div class='add'>+        compatible = "amd,ccp-seattle-v1a";</div><div class='add'>+        reg = &lt;0xe0100000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;0 3 4&gt;;</div><div class='add'>+        dma-coherent;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/amd-ccp.txt b/Documentation/devicetree/bindings/crypto/amd-ccp.txt<br/>deleted file mode 100644<br/>index d87579d63da6..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/amd-ccp.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/amd-ccp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-* AMD Cryptographic Coprocessor driver (ccp)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "amd,ccp-seattle-v1a"</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain the CCP interrupt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- dma-coherent: Present if dma operations are coherent</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	ccp@e0100000 {</div><div class='del'>-		compatible = "amd,ccp-seattle-v1a";</div><div class='del'>-		reg = &lt;0 0xe0100000 0 0x10000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		interrupts = &lt;0 3 4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt b/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt<br/>deleted file mode 100644<br/>index d9cca4875bd6..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/artpec6-crypto.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/artpec6-crypto.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-Axis crypto engine with PDMA interface.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be one of the following strings:</div><div class='del'>-	"axis,artpec6-crypto" for the version in the Axis ARTPEC-6 SoC</div><div class='del'>-	"axis,artpec7-crypto" for the version in the Axis ARTPEC-7 SoC.</div><div class='del'>-- reg: Base address and size for the PDMA register area.</div><div class='del'>-- interrupts: Interrupt handle for the PDMA interrupt line.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-crypto@f4264000 {</div><div class='del'>-	compatible = "axis,artpec6-crypto";</div><div class='del'>-	reg = &lt;0xf4264000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/axis,artpec6-crypto.yaml b/Documentation/devicetree/bindings/crypto/axis,artpec6-crypto.yaml<br/>new file mode 100644<br/>index 000000000000..c91f81e3c39e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/axis,artpec6-crypto.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/axis,artpec6-crypto.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/axis,artpec6-crypto.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Axis ARTPEC6 crypto engine with PDMA interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lars Persson &lt;lars.persson@axis.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - axis,artpec6-crypto</div><div class='add'>+      - axis,artpec7-crypto</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    crypto@f4264000 {</div><div class='add'>+        compatible = "axis,artpec6-crypto";</div><div class='add'>+        reg = &lt;0xf4264000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt<br/>deleted file mode 100644<br/>index 29b6007568eb..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-The Broadcom Secure Processing Unit (SPU) hardware supports symmetric</div><div class='del'>-cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware</div><div class='del'>-blocks.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be one of the following:</div><div class='del'>-  brcm,spum-crypto - for devices with SPU-M hardware</div><div class='del'>-  brcm,spu2-crypto - for devices with SPU2 hardware</div><div class='del'>-  brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3</div><div class='del'>-  and Rabin Fingerprint support</div><div class='del'>-  brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware</div><div class='del'>-</div><div class='del'>-- reg: Should contain SPU registers location and length.</div><div class='del'>-- mboxes: The mailbox channel to be used to communicate with the SPU.</div><div class='del'>-  Mailbox channels correspond to DMA rings on the device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	crypto@612d0000 {</div><div class='del'>-		compatible = "brcm,spum-crypto";</div><div class='del'>-		reg = &lt;0 0x612d0000 0 0x900&gt;;</div><div class='del'>-		mboxes = &lt;&amp;pdc0 0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/brcm,spum-crypto.yaml b/Documentation/devicetree/bindings/crypto/brcm,spum-crypto.yaml<br/>new file mode 100644<br/>index 000000000000..9a5fb61727fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/brcm,spum-crypto.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/brcm,spum-crypto.yaml</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/brcm,spum-crypto.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom SPU Crypto Offload</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Rice &lt;rob.rice@broadcom.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Broadcom Secure Processing Unit (SPU) hardware supports symmetric</div><div class='add'>+  cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware</div><div class='add'>+  blocks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - brcm,spum-crypto</div><div class='add'>+      - brcm,spu2-crypto</div><div class='add'>+      - brcm,spu2-v2-crypto     # enhanced SPU2 hardware features like SHA3 and Rabin Fingerprint support</div><div class='add'>+      - brcm,spum-nsp-crypto    # Northstar Plus variant of the SPU-M hardware</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - mboxes</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    crypto@612d0000 {</div><div class='add'>+        compatible = "brcm,spum-crypto";</div><div class='add'>+        reg = &lt;0x612d0000 0x900&gt;;</div><div class='add'>+        mboxes = &lt;&amp;pdc0 0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml<br/>index f0c4a7c83568..75afa441e019 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml</a></div><div class='hunk'>@@ -38,7 +38,9 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='del'>-          - const: fsl,sec-v5.4</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,sec-v5.4</div><div class='add'>+              - fsl,sec-v6.0</div><div class='ctx'>           - const: fsl,sec-v5.0</div><div class='ctx'>           - const: fsl,sec-v4.0</div><div class='ctx'>       - items:</div><div class='hunk'>@@ -94,6 +96,12 @@ patternProperties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         oneOf:</div><div class='ctx'>           - items:</div><div class='add'>+              - const: fsl,sec-v6.0-job-ring</div><div class='add'>+              - const: fsl,sec-v5.2-job-ring</div><div class='add'>+              - const: fsl,sec-v5.0-job-ring</div><div class='add'>+              - const: fsl,sec-v4.4-job-ring</div><div class='add'>+              - const: fsl,sec-v4.0-job-ring</div><div class='add'>+          - items:</div><div class='ctx'>               - const: fsl,sec-v5.4-job-ring</div><div class='ctx'>               - const: fsl,sec-v5.0-job-ring</div><div class='ctx'>               - const: fsl,sec-v4.0-job-ring</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec6.txt b/Documentation/devicetree/bindings/crypto/fsl-sec6.txt<br/>deleted file mode 100644<br/>index 73b0eb950bb3..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/fsl-sec6.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/fsl-sec6.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,157 +0,0 @@</div><div class='del'>-SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).</div><div class='del'>-Currently Freescale powerpc chip C29X is embedded with SEC 6.</div><div class='del'>-SEC 6 device tree binding include:</div><div class='del'>-   -SEC 6 Node</div><div class='del'>-   -Job Ring Node</div><div class='del'>-   -Full Example</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-SEC 6 Node</div><div class='del'>-</div><div class='del'>-Description</div><div class='del'>-</div><div class='del'>-    Node defines the base address of the SEC 6 block.</div><div class='del'>-    This block specifies the address range of all global</div><div class='del'>-    configuration registers for the SEC 6 block.</div><div class='del'>-    For example, In C293, we could see three SEC 6 node.</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-   - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v6.0".</div><div class='del'>-</div><div class='del'>-   - fsl,sec-era</div><div class='del'>-      Usage: optional</div><div class='del'>-      Value type: &lt;u32&gt;</div><div class='del'>-      Definition: A standard property. Define the 'ERA' of the SEC</div><div class='del'>-          device.</div><div class='del'>-</div><div class='del'>-   - #address-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing physical addresses in child nodes.</div><div class='del'>-</div><div class='del'>-   - #size-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing the size of physical addresses in</div><div class='del'>-           child nodes.</div><div class='del'>-</div><div class='del'>-   - reg</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-      Definition: A standard property.  Specifies the physical</div><div class='del'>-          address and length of the SEC 6 configuration registers.</div><div class='del'>-</div><div class='del'>-   - ranges</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-       Definition: A standard property.  Specifies the physical address</div><div class='del'>-           range of the SEC 6.0 register space (-SNVS not included).  A</div><div class='del'>-           triplet that includes the child address, parent address, &amp;</div><div class='del'>-           length.</div><div class='del'>-</div><div class='del'>-   Note: All other standard properties (see the Devicetree Specification)</div><div class='del'>-   are allowed but are optional.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-	crypto@a0000 {</div><div class='del'>-		compatible = "fsl,sec-v6.0";</div><div class='del'>-		fsl,sec-era = &lt;6&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0xa0000 0x20000&gt;;</div><div class='del'>-		ranges = &lt;0 0xa0000 0x20000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Job Ring (JR) Node</div><div class='del'>-</div><div class='del'>-    Child of the crypto node defines data processing interface to SEC 6</div><div class='del'>-    across the peripheral bus for purposes of processing</div><div class='del'>-    cryptographic descriptors. The specified address</div><div class='del'>-    range can be made visible to one (or more) cores.</div><div class='del'>-    The interrupt defined for this node is controlled within</div><div class='del'>-    the address range of this node.</div><div class='del'>-</div><div class='del'>-  - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v6.0-job-ring".</div><div class='del'>-</div><div class='del'>-  - reg</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-      Definition: Specifies a two JR parameters:  an offset from</div><div class='del'>-           the parent physical address and the length the JR registers.</div><div class='del'>-</div><div class='del'>-   - interrupts</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition:  Specifies the interrupts generated by this</div><div class='del'>-           device.  The value of the interrupts property</div><div class='del'>-           consists of one interrupt specifier. The format</div><div class='del'>-           of the specifier is defined by the binding document</div><div class='del'>-           describing the node's interrupt parent.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-	jr@1000 {</div><div class='del'>-		compatible = "fsl,sec-v6.0-job-ring";</div><div class='del'>-		reg = &lt;0x1000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;49 2 0 0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-===================================================================</div><div class='del'>-Full Example</div><div class='del'>-</div><div class='del'>-Since some chips may contain more than one SEC, the dtsi contains</div><div class='del'>-only the node contents, not the node itself.  A chip using the SEC</div><div class='del'>-should include the dtsi inside each SEC node.  Example:</div><div class='del'>-</div><div class='del'>-In qoriq-sec6.0.dtsi:</div><div class='del'>-</div><div class='del'>-	compatible = "fsl,sec-v6.0";</div><div class='del'>-	fsl,sec-era = &lt;6&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-	jr@1000 {</div><div class='del'>-		compatible = "fsl,sec-v6.0-job-ring",</div><div class='del'>-			     "fsl,sec-v5.2-job-ring",</div><div class='del'>-			     "fsl,sec-v5.0-job-ring",</div><div class='del'>-			     "fsl,sec-v4.4-job-ring",</div><div class='del'>-			     "fsl,sec-v4.0-job-ring";</div><div class='del'>-		reg	   = &lt;0x1000 0x1000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	jr@2000 {</div><div class='del'>-		compatible = "fsl,sec-v6.0-job-ring",</div><div class='del'>-			     "fsl,sec-v5.2-job-ring",</div><div class='del'>-			     "fsl,sec-v5.0-job-ring",</div><div class='del'>-			     "fsl,sec-v4.4-job-ring",</div><div class='del'>-			     "fsl,sec-v4.0-job-ring";</div><div class='del'>-		reg	   = &lt;0x2000 0x1000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-In the C293 device tree, we add the include of public property:</div><div class='del'>-</div><div class='del'>-	crypto@a0000 {</div><div class='del'>-		/include/ "qoriq-sec6.0.dtsi"</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crypto@a0000 {</div><div class='del'>-		reg = &lt;0xa0000 0x20000&gt;;</div><div class='del'>-		ranges = &lt;0 0xa0000 0x20000&gt;;</div><div class='del'>-</div><div class='del'>-		jr@1000 {</div><div class='del'>-			interrupts = &lt;49 2 0 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		jr@2000 {</div><div class='del'>-			interrupts = &lt;50 2 0 0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/hisilicon,hip06-sec.yaml b/Documentation/devicetree/bindings/crypto/hisilicon,hip06-sec.yaml<br/>new file mode 100644<br/>index 000000000000..2bfac9d1c020<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/hisilicon,hip06-sec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/hisilicon,hip06-sec.yaml</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/hisilicon,hip06-sec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Hisilicon hip06/hip07 Security Accelerator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - hisilicon,hip06-sec</div><div class='add'>+      - hisilicon,hip07-sec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Registers for backend processing engines</div><div class='add'>+      - description: Registers for common functionality</div><div class='add'>+      - description: Registers for queue 0</div><div class='add'>+      - description: Registers for queue 1</div><div class='add'>+      - description: Registers for queue 2</div><div class='add'>+      - description: Registers for queue 3</div><div class='add'>+      - description: Registers for queue 4</div><div class='add'>+      - description: Registers for queue 5</div><div class='add'>+      - description: Registers for queue 6</div><div class='add'>+      - description: Registers for queue 7</div><div class='add'>+      - description: Registers for queue 8</div><div class='add'>+      - description: Registers for queue 9</div><div class='add'>+      - description: Registers for queue 10</div><div class='add'>+      - description: Registers for queue 11</div><div class='add'>+      - description: Registers for queue 12</div><div class='add'>+      - description: Registers for queue 13</div><div class='add'>+      - description: Registers for queue 14</div><div class='add'>+      - description: Registers for queue 15</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: SEC unit error queue interrupt</div><div class='add'>+      - description: Completion interrupt for queue 0</div><div class='add'>+      - description: Error interrupt for queue 0</div><div class='add'>+      - description: Completion interrupt for queue 1</div><div class='add'>+      - description: Error interrupt for queue 1</div><div class='add'>+      - description: Completion interrupt for queue 2</div><div class='add'>+      - description: Error interrupt for queue 2</div><div class='add'>+      - description: Completion interrupt for queue 3</div><div class='add'>+      - description: Error interrupt for queue 3</div><div class='add'>+      - description: Completion interrupt for queue 4</div><div class='add'>+      - description: Error interrupt for queue 4</div><div class='add'>+      - description: Completion interrupt for queue 5</div><div class='add'>+      - description: Error interrupt for queue 5</div><div class='add'>+      - description: Completion interrupt for queue 6</div><div class='add'>+      - description: Error interrupt for queue 6</div><div class='add'>+      - description: Completion interrupt for queue 7</div><div class='add'>+      - description: Error interrupt for queue 7</div><div class='add'>+      - description: Completion interrupt for queue 8</div><div class='add'>+      - description: Error interrupt for queue 8</div><div class='add'>+      - description: Completion interrupt for queue 9</div><div class='add'>+      - description: Error interrupt for queue 9</div><div class='add'>+      - description: Completion interrupt for queue 10</div><div class='add'>+      - description: Error interrupt for queue 10</div><div class='add'>+      - description: Completion interrupt for queue 11</div><div class='add'>+      - description: Error interrupt for queue 11</div><div class='add'>+      - description: Completion interrupt for queue 12</div><div class='add'>+      - description: Error interrupt for queue 12</div><div class='add'>+      - description: Completion interrupt for queue 13</div><div class='add'>+      - description: Error interrupt for queue 13</div><div class='add'>+      - description: Completion interrupt for queue 14</div><div class='add'>+      - description: Error interrupt for queue 14</div><div class='add'>+      - description: Completion interrupt for queue 15</div><div class='add'>+      - description: Error interrupt for queue 15</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - dma-coherent</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        crypto@400d2000000 {</div><div class='add'>+            compatible = "hisilicon,hip07-sec";</div><div class='add'>+            reg = &lt;0x400 0xd0000000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2000000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2010000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2020000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2030000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2040000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2050000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2060000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2070000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2080000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2090000 0x0 0x10000</div><div class='add'>+                  0x400 0xd20a0000 0x0 0x10000</div><div class='add'>+                  0x400 0xd20b0000 0x0 0x10000</div><div class='add'>+                  0x400 0xd20c0000 0x0 0x10000</div><div class='add'>+                  0x400 0xd20d0000 0x0 0x10000</div><div class='add'>+                  0x400 0xd20e0000 0x0 0x10000</div><div class='add'>+                  0x400 0xd20f0000 0x0 0x10000</div><div class='add'>+                  0x400 0xd2100000 0x0 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;576 4&gt;,</div><div class='add'>+                        &lt;577 1&gt;, &lt;578 4&gt;,</div><div class='add'>+                        &lt;579 1&gt;, &lt;580 4&gt;,</div><div class='add'>+                        &lt;581 1&gt;, &lt;582 4&gt;,</div><div class='add'>+                        &lt;583 1&gt;, &lt;584 4&gt;,</div><div class='add'>+                        &lt;585 1&gt;, &lt;586 4&gt;,</div><div class='add'>+                        &lt;587 1&gt;, &lt;588 4&gt;,</div><div class='add'>+                        &lt;589 1&gt;, &lt;590 4&gt;,</div><div class='add'>+                        &lt;591 1&gt;, &lt;592 4&gt;,</div><div class='add'>+                        &lt;593 1&gt;, &lt;594 4&gt;,</div><div class='add'>+                        &lt;595 1&gt;, &lt;596 4&gt;,</div><div class='add'>+                        &lt;597 1&gt;, &lt;598 4&gt;,</div><div class='add'>+                        &lt;599 1&gt;, &lt;600 4&gt;,</div><div class='add'>+                        &lt;601 1&gt;, &lt;602 4&gt;,</div><div class='add'>+                        &lt;603 1&gt;, &lt;604 4&gt;,</div><div class='add'>+                        &lt;605 1&gt;, &lt;606 4&gt;,</div><div class='add'>+                        &lt;607 1&gt;, &lt;608 4&gt;;</div><div class='add'>+            dma-coherent;</div><div class='add'>+            iommus = &lt;&amp;p1_smmu_alg_a 0x600&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt b/Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt<br/>deleted file mode 100644<br/>index d28fd1af01b4..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,67 +0,0 @@</div><div class='del'>-* Hisilicon hip07 Security Accelerator (SEC)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Must contain one of</div><div class='del'>-  - "hisilicon,hip06-sec"</div><div class='del'>-  - "hisilicon,hip07-sec"</div><div class='del'>-- reg: Memory addresses and lengths of the memory regions through which</div><div class='del'>-  this device is controlled.</div><div class='del'>-  Region 0 has registers to control the backend processing engines.</div><div class='del'>-  Region 1 has registers for functionality common to all queues.</div><div class='del'>-  Regions 2-18 have registers for the 16 individual queues which are isolated</div><div class='del'>-  both in hardware and within the driver.</div><div class='del'>-- interrupts: Interrupt specifiers.</div><div class='del'>-  Refer to interrupt-controller/interrupts.txt for generic interrupt client node</div><div class='del'>-  bindings.</div><div class='del'>-  Interrupt 0 is for the SEC unit error queue.</div><div class='del'>-  Interrupt 2N + 1 is the completion interrupt for queue N.</div><div class='del'>-  Interrupt 2N + 2 is the error interrupt for queue N.</div><div class='del'>-- dma-coherent:  The driver assumes coherent dma is possible.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- iommus: The SEC units are behind smmu-v3 iommus.</div><div class='del'>-  Refer to iommu/arm,smmu-v3.txt for more information.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-p1_sec_a: crypto@400d2000000 {</div><div class='del'>-	compatible = "hisilicon,hip07-sec";</div><div class='del'>-	reg = &lt;0x400 0xd0000000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2000000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2010000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2020000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2030000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2040000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2050000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2060000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2070000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2080000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2090000 0x0 0x10000</div><div class='del'>-	       0x400 0xd20a0000 0x0 0x10000</div><div class='del'>-	       0x400 0xd20b0000 0x0 0x10000</div><div class='del'>-	       0x400 0xd20c0000 0x0 0x10000</div><div class='del'>-	       0x400 0xd20d0000 0x0 0x10000</div><div class='del'>-	       0x400 0xd20e0000 0x0 0x10000</div><div class='del'>-	       0x400 0xd20f0000 0x0 0x10000</div><div class='del'>-	       0x400 0xd2100000 0x0 0x10000&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;p1_mbigen_sec_a&gt;;</div><div class='del'>-	iommus = &lt;&amp;p1_smmu_alg_a 0x600&gt;;</div><div class='del'>-	dma-coherent;</div><div class='del'>-	interrupts = &lt;576 4&gt;,</div><div class='del'>-		     &lt;577 1&gt;, &lt;578 4&gt;,</div><div class='del'>-		     &lt;579 1&gt;, &lt;580 4&gt;,</div><div class='del'>-		     &lt;581 1&gt;, &lt;582 4&gt;,</div><div class='del'>-		     &lt;583 1&gt;, &lt;584 4&gt;,</div><div class='del'>-		     &lt;585 1&gt;, &lt;586 4&gt;,</div><div class='del'>-		     &lt;587 1&gt;, &lt;588 4&gt;,</div><div class='del'>-		     &lt;589 1&gt;, &lt;590 4&gt;,</div><div class='del'>-		     &lt;591 1&gt;, &lt;592 4&gt;,</div><div class='del'>-		     &lt;593 1&gt;, &lt;594 4&gt;,</div><div class='del'>-		     &lt;595 1&gt;, &lt;596 4&gt;,</div><div class='del'>-		     &lt;597 1&gt;, &lt;598 4&gt;,</div><div class='del'>-		     &lt;599 1&gt;, &lt;600 4&gt;,</div><div class='del'>-		     &lt;601 1&gt;, &lt;602 4&gt;,</div><div class='del'>-		     &lt;603 1&gt;, &lt;604 4&gt;,</div><div class='del'>-		     &lt;605 1&gt;, &lt;606 4&gt;,</div><div class='del'>-		     &lt;607 1&gt;, &lt;608 4&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/img,hash-accelerator.yaml b/Documentation/devicetree/bindings/crypto/img,hash-accelerator.yaml<br/>new file mode 100644<br/>index 000000000000..46617561ef94<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/img,hash-accelerator.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/img,hash-accelerator.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/img,hash-accelerator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Imagination Technologies hardware hash accelerator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - James Hartley &lt;james.hartley@imgtec.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The hash accelerator provides hardware hashing acceleration for</div><div class='add'>+  SHA1, SHA224, SHA256 and MD5 hashes.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: img,hash-accelerator</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Register base address and size</div><div class='add'>+      - description: DMA port specifier</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: System clock for hash block registers</div><div class='add'>+      - description: Hash clock for data path</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: sys</div><div class='add'>+      - const: hash</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/pistachio-clk.h&gt;</div><div class='add'>+</div><div class='add'>+    hash@18149600 {</div><div class='add'>+        compatible = "img,hash-accelerator";</div><div class='add'>+        reg = &lt;0x18149600 0x100&gt;, &lt;0x18101100 0x4&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SHARED 59 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        dmas = &lt;&amp;dma 8 0xffffffff 0&gt;;</div><div class='add'>+        dma-names = "tx";</div><div class='add'>+        clocks = &lt;&amp;cr_periph SYS_CLK_HASH&gt;, &lt;&amp;clk_periph PERIPH_CLK_ROM&gt;;</div><div class='add'>+        clock-names = "sys", "hash";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/img-hash.txt b/Documentation/devicetree/bindings/crypto/img-hash.txt<br/>deleted file mode 100644<br/>index 91a3d757d641..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/img-hash.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/img-hash.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-Imagination Technologies hardware hash accelerator</div><div class='del'>-</div><div class='del'>-The hash accelerator provides hardware hashing acceleration for</div><div class='del'>-SHA1, SHA224, SHA256 and MD5 hashes</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : "img,hash-accelerator"</div><div class='del'>-- reg : Offset and length of the register set for the module, and the DMA port</div><div class='del'>-- interrupts : The designated IRQ line for the hashing module.</div><div class='del'>-- dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt</div><div class='del'>-- dma-names : Should be "tx"</div><div class='del'>-- clocks : Clock specifiers</div><div class='del'>-- clock-names : "sys" Used to clock the hash block registers</div><div class='del'>-		"hash" Used to clock data through the accelerator</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	hash: hash@18149600 {</div><div class='del'>-	compatible = "img,hash-accelerator";</div><div class='del'>-		reg = &lt;0x18149600 0x100&gt;, &lt;0x18101100 0x4&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SHARED 59 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		dmas = &lt;&amp;dma 8 0xffffffff 0&gt;;</div><div class='del'>-		dma-names = "tx";</div><div class='del'>-		clocks = &lt;&amp;cr_periph SYS_CLK_HASH&gt;, &lt;&amp;clk_periph PERIPH_CLK_ROM&gt;;</div><div class='del'>-		clock-names = "sys", "hash";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/marvell,orion-crypto.yaml b/Documentation/devicetree/bindings/crypto/marvell,orion-crypto.yaml<br/>new file mode 100644<br/>index 000000000000..b44d36c50ec4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/marvell,orion-crypto.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/marvell,orion-crypto.yaml</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/marvell,orion-crypto.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Cryptographic Engines And Security Accelerator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Boris Brezillon &lt;bbrezillon@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Marvell Cryptographic Engines And Security Accelerator</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - marvell,armada-370-crypto</div><div class='add'>+      - marvell,armada-xp-crypto</div><div class='add'>+      - marvell,armada-375-crypto</div><div class='add'>+      - marvell,armada-38x-crypto</div><div class='add'>+      - marvell,dove-crypto</div><div class='add'>+      - marvell,kirkwood-crypto</div><div class='add'>+      - marvell,orion-crypto</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Registers region</div><div class='add'>+      - description: SRAM region</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: regs</div><div class='add'>+      - const: sram</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: One interrupt for each CESA engine</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: One or two clocks for each CESA engine</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: cesa0</div><div class='add'>+      - const: cesa1</div><div class='add'>+      - const: cesaz0</div><div class='add'>+      - const: cesaz1</div><div class='add'>+</div><div class='add'>+  marvell,crypto-srams:</div><div class='add'>+    description: Phandle(s) to crypto SRAM.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+</div><div class='add'>+  marvell,crypto-sram-size:</div><div class='add'>+    description: SRAM size reserved for crypto operations.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0x800</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - marvell,crypto-srams</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            enum:</div><div class='add'>+              - marvell,kirkwood-crypto</div><div class='add'>+              - marvell,orion-crypto</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - marvell,armada-370-crypto</div><div class='add'>+              - marvell,armada-375-crypto</div><div class='add'>+              - marvell,armada-38x-crypto</div><div class='add'>+              - marvell,armada-xp-crypto</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - marvell,armada-375-crypto</div><div class='add'>+              - marvell,armada-38x-crypto</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 4</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    crypto@30000 {</div><div class='add'>+        compatible = "marvell,orion-crypto";</div><div class='add'>+        reg = &lt;0x30000 0x10000&gt;;</div><div class='add'>+        reg-names = "regs";</div><div class='add'>+        interrupts = &lt;22&gt;;</div><div class='add'>+        marvell,crypto-srams = &lt;&amp;crypto_sram&gt;;</div><div class='add'>+        marvell,crypto-sram-size = &lt;0x600&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/marvell-cesa.txt b/Documentation/devicetree/bindings/crypto/marvell-cesa.txt<br/>deleted file mode 100644<br/>index 28d3f2496b89..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/marvell-cesa.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/marvell-cesa.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-Marvell Cryptographic Engines And Security Accelerator</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of the following string</div><div class='del'>-	      "marvell,orion-crypto"</div><div class='del'>-	      "marvell,kirkwood-crypto"</div><div class='del'>-	      "marvell,dove-crypto"</div><div class='del'>-	      "marvell,armada-370-crypto"</div><div class='del'>-	      "marvell,armada-xp-crypto"</div><div class='del'>-	      "marvell,armada-375-crypto"</div><div class='del'>-	      "marvell,armada-38x-crypto"</div><div class='del'>-- reg: base physical address of the engine and length of memory mapped</div><div class='del'>-       region. Can also contain an entry for the SRAM attached to the CESA,</div><div class='del'>-       but this representation is deprecated and marvell,crypto-srams should</div><div class='del'>-       be used instead</div><div class='del'>-- reg-names: "regs". Can contain an "sram" entry, but this representation</div><div class='del'>-	     is deprecated and marvell,crypto-srams should be used instead</div><div class='del'>-- interrupts: interrupt number</div><div class='del'>-- clocks: reference to the crypto engines clocks. This property is not</div><div class='del'>-	  required for orion and kirkwood platforms</div><div class='del'>-- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine</div><div class='del'>-	       id.</div><div class='del'>-	       This property is not required for the orion and kirkwoord</div><div class='del'>-	       platforms.</div><div class='del'>-	       "cesazX" clocks are not required on armada-370 platforms</div><div class='del'>-- marvell,crypto-srams: phandle to crypto SRAM definitions</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not</div><div class='del'>-			    specified the whole SRAM is used (2KB)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-	crypto@90000 {</div><div class='del'>-		compatible = "marvell,armada-xp-crypto";</div><div class='del'>-		reg = &lt;0x90000 0x10000&gt;;</div><div class='del'>-		reg-names = "regs";</div><div class='del'>-		interrupts = &lt;48&gt;, &lt;49&gt;;</div><div class='del'>-		clocks = &lt;&amp;gateclk 23&gt;, &lt;&amp;gateclk 23&gt;;</div><div class='del'>-		clock-names = "cesa0", "cesa1";</div><div class='del'>-		marvell,crypto-srams = &lt;&amp;crypto_sram0&gt;, &lt;&amp;crypto_sram1&gt;;</div><div class='del'>-		marvell,crypto-sram-size = &lt;0x600&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt<br/>deleted file mode 100644<br/>index 450da3661cad..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/mediatek-crypto.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-MediaTek cryptographic accelerators</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "mediatek,eip97-crypto"</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain the five crypto engines interrupts in numeric</div><div class='del'>-	order. These are global system and four descriptor rings.</div><div class='del'>-- clocks: the clock used by the core</div><div class='del'>-- clock-names: Must contain "cryp".</div><div class='del'>-- power-domains: Must contain a reference to the PM domain.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	crypto: crypto@1b240000 {</div><div class='del'>-		compatible = "mediatek,eip97-crypto";</div><div class='del'>-		reg = &lt;0 0x1b240000 0 0x20000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;ethsys CLK_ETHSYS_CRYPTO&gt;;</div><div class='del'>-		clock-names = "cryp";</div><div class='del'>-		power-domains = &lt;&amp;scpsys MT2701_POWER_DOMAIN_ETH&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/mv_cesa.txt b/Documentation/devicetree/bindings/crypto/mv_cesa.txt<br/>deleted file mode 100644<br/>index d9b92e2f3138..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/mv_cesa.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/mv_cesa.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-Marvell Cryptographic Engines And Security Accelerator</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of the following string</div><div class='del'>-	      "marvell,orion-crypto"</div><div class='del'>-	      "marvell,kirkwood-crypto"</div><div class='del'>-	      "marvell,dove-crypto"</div><div class='del'>-- reg: base physical address of the engine and length of memory mapped</div><div class='del'>-       region. Can also contain an entry for the SRAM attached to the CESA,</div><div class='del'>-       but this representation is deprecated and marvell,crypto-srams should</div><div class='del'>-       be used instead</div><div class='del'>-- reg-names: "regs". Can contain an "sram" entry, but this representation</div><div class='del'>-	     is deprecated and marvell,crypto-srams should be used instead</div><div class='del'>-- interrupts: interrupt number</div><div class='del'>-- clocks: reference to the crypto engines clocks. This property is only</div><div class='del'>-	  required for Dove platforms</div><div class='del'>-- marvell,crypto-srams: phandle to crypto SRAM definitions</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not</div><div class='del'>-			    specified the whole SRAM is used (2KB)</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-	crypto@30000 {</div><div class='del'>-		compatible = "marvell,orion-crypto";</div><div class='del'>-		reg = &lt;0x30000 0x10000&gt;;</div><div class='del'>-		reg-names = "regs";</div><div class='del'>-		interrupts = &lt;22&gt;;</div><div class='del'>-		marvell,crypto-srams = &lt;&amp;crypto_sram&gt;;</div><div class='del'>-		marvell,crypto-sram-size = &lt;0x600&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml<br/>index 3f35122f7873..e009cb712fb8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/qcom-qce.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/crypto/qcom-qce.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/crypto/qcom-qce.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/crypto/qcom-qce.yaml</a></div><div class='hunk'>@@ -45,6 +45,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,qcs615-qce</div><div class='ctx'>               - qcom,qcs8300-qce</div><div class='ctx'>               - qcom,sa8775p-qce</div><div class='ctx'>               - qcom,sc7280-qce</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml<br/>index 350fb8f400f0..5952e6448ed4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml</a></div><div class='hunk'>@@ -111,11 +111,27 @@ properties:</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description:</div><div class='ctx'>           DSI output port node to the panel or the next bridge</div><div class='ctx'>           in the chain</div><div class='ctx'> </div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description: array of physical DSI data lane indexes.</div><div class='add'>+                minItems: 1</div><div class='add'>+                items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - port@0</div><div class='ctx'>       - port@1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml<br/>index e08c24633926..5a99d9b9635e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml</a></div><div class='hunk'>@@ -128,7 +128,7 @@ required:</div><div class='ctx'>   - power-domains</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -180,4 +180,69 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi1: dsi@10860000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "renesas,r9a07g044-mipi-dsi", "renesas,rzg2l-mipi-dsi";</div><div class='add'>+        reg = &lt;0x10860000 0x20000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "seq0", "seq1", "vin1", "rcv",</div><div class='add'>+                          "ferr", "ppi", "debug";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_SYSCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_ACLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_PCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_VCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_LPCLK&gt;;</div><div class='add'>+        clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";</div><div class='add'>+        resets = &lt;&amp;cpg R9A07G044_MIPI_DSI_CMN_RSTB&gt;,</div><div class='add'>+                 &lt;&amp;cpg R9A07G044_MIPI_DSI_ARESET_N&gt;,</div><div class='add'>+                 &lt;&amp;cpg R9A07G044_MIPI_DSI_PRESET_N&gt;;</div><div class='add'>+        reset-names = "rst", "arst", "prst";</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "rocktech,jh057n00900";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            vcc-supply = &lt;&amp;reg_2v8_p&gt;;</div><div class='add'>+            iovcc-supply = &lt;&amp;reg_1v8_p&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio3 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi1_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                dsi1_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;du_out_dsi1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                dsi1_out: endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/fsl,tcon.txt b/Documentation/devicetree/bindings/display/fsl,tcon.txt<br/>deleted file mode 100644<br/>index 475008747801..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/fsl,tcon.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/fsl,tcon.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-Device Tree bindings for Freescale TCON Driver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Should be one of</div><div class='del'>-	* "fsl,vf610-tcon".</div><div class='del'>-</div><div class='del'>-- reg:			Address and length of the register set for tcon.</div><div class='del'>-- clocks:		From common clock binding: handle to tcon ipg clock.</div><div class='del'>-- clock-names:		From common clock binding: Shall be "ipg".</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-timing-controller@4003d000 {</div><div class='del'>-	compatible = "fsl,vf610-tcon";</div><div class='del'>-	reg = &lt;0x4003d000 0x1000&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks VF610_CLK_TCON0&gt;;</div><div class='del'>-	clock-names = "ipg";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml b/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml<br/>new file mode 100644<br/>index 000000000000..06bd680524a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/fsl,vf610-tcon.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale TCON</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,vf610-tcon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/vf610-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    timing-controller@4003d000 {</div><div class='add'>+        compatible = "fsl,vf610-tcon";</div><div class='add'>+        reg = &lt;0x4003d000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks VF610_CLK_TCON0&gt;;</div><div class='add'>+        clock-names = "ipg";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml<br/>new file mode 100644<br/>index 000000000000..92a0a797d099<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/fsl,imx-display-subsystem.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX DRM master device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The freescale i.MX DRM master device is a virtual device needed to list all</div><div class='add'>+  IPU or other display interface nodes that comprise the graphics subsystem.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx-display-subsystem</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Should contain a list of phandles pointing to camera</div><div class='add'>+      sensor interface ports of IPU devices.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    display-subsystem {</div><div class='add'>+        compatible = "fsl,imx-display-subsystem";</div><div class='add'>+        ports = &lt;&amp;ipu_di0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml<br/>new file mode 100644<br/>index 000000000000..bbcfe7e2958b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/fsl,imx-parallel-display.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Parallel display support</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx-parallel-display</div><div class='add'>+</div><div class='add'>+  interface-pix-fmt:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - rgb24</div><div class='add'>+      - rgb565</div><div class='add'>+      - bgr666</div><div class='add'>+      - lvds666</div><div class='add'>+</div><div class='add'>+  ddc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle describing the i2c bus handling the display data channel</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  port@0:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: input port connected to the IPU display interface</div><div class='add'>+</div><div class='add'>+  port@1:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: output port connected to a panel</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    display {</div><div class='add'>+        compatible = "fsl,imx-parallel-display";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        interface-pix-fmt = "rgb24";</div><div class='add'>+</div><div class='add'>+        port@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;ipu_di0_disp0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        port@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml<br/>new file mode 100644<br/>index 000000000000..ec78645d4de0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ipu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX IPUv3</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx51-ipu</div><div class='add'>+          - fsl,imx53-ipu</div><div class='add'>+          - fsl,imx6q-ipu</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx6qp-ipu</div><div class='add'>+          - const: fsl,imx6q-ipu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: di0</div><div class='add'>+      - const: di1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  fsl,prg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to prg node associated with this IPU instance</div><div class='add'>+</div><div class='add'>+  port@0:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: CSI0</div><div class='add'>+</div><div class='add'>+  port@1:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: CSI1</div><div class='add'>+</div><div class='add'>+  port@2:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: DI0</div><div class='add'>+</div><div class='add'>+  port@3:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: DI1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    display-controller@18000000 {</div><div class='add'>+        compatible = "fsl,imx53-ipu";</div><div class='add'>+        reg = &lt;0x18000000 0x080000000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        interrupts = &lt;11 10&gt;;</div><div class='add'>+        resets = &lt;&amp;src 2&gt;;</div><div class='add'>+</div><div class='add'>+        port@2 {</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;display_in&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml<br/>new file mode 100644<br/>index 000000000000..1646f41d8f72<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml</a></div><div class='hunk'>@@ -0,0 +1,193 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale LVDS Display Bridge (ldb)</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The LVDS Display Bridge device tree node contains up to two lvds-channel</div><div class='add'>+  nodes describing each of the two LVDS encoder channels of the bridge.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx53-ldb</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6q-ldb</div><div class='add'>+          - const: fsl,imx53-ldb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  gpr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      The phandle points to the iomuxc-gpr region containing the LVDS</div><div class='add'>+      control register.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 6</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: di0_pll</div><div class='add'>+          - const: di1_pll</div><div class='add'>+          - const: di0_sel</div><div class='add'>+          - const: di1_sel</div><div class='add'>+          - const: di0</div><div class='add'>+          - const: di1</div><div class='add'>+      - items:</div><div class='add'>+          - const: di0_pll</div><div class='add'>+          - const: di1_pll</div><div class='add'>+          - const: di0_sel</div><div class='add'>+          - const: di1_sel</div><div class='add'>+          - const: di2_sel</div><div class='add'>+          - const: di3_sel</div><div class='add'>+          - const: di0</div><div class='add'>+          - const: di1</div><div class='add'>+</div><div class='add'>+  fsl,dual-channel:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      if it exists, only LVDS channel 0 should</div><div class='add'>+      be configured - one input will be distributed on both outputs in dual</div><div class='add'>+      channel mode</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^lvds-channel@[0-1]$':</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Each LVDS Channel has to contain either an of graph link to a panel device node</div><div class='add'>+      or a display-timings node that describes the video timings for the connected</div><div class='add'>+      LVDS display as well as the fsl,data-mapping and fsl,data-width properties.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      display-timings:</div><div class='add'>+        $ref: /schemas/display/panel/display-timings.yaml#</div><div class='add'>+</div><div class='add'>+      fsl,data-mapping:</div><div class='add'>+        enum:</div><div class='add'>+          - spwg</div><div class='add'>+          - jeida</div><div class='add'>+</div><div class='add'>+      fsl,data-width:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: should be &lt;18&gt; or &lt;24&gt;</div><div class='add'>+        enum:</div><div class='add'>+          - 18</div><div class='add'>+          - 24</div><div class='add'>+</div><div class='add'>+      fsl,panel:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+        description: phandle to lcd panel</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^port@[0-4]$':</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          On i.MX5, the internal two-input-multiplexer is used. Due to hardware</div><div class='add'>+          limitations, only one input port (port@[0,1]) can be used for each channel</div><div class='add'>+          (lvds-channel@[0,1], respectively).</div><div class='add'>+          On i.MX6, there should be four input ports (port@[0-3]) that correspond</div><div class='add'>+          to the four LVDS multiplexer inputs.</div><div class='add'>+          A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected</div><div class='add'>+          to a panel input port. Optionally, the output port can be left out if</div><div class='add'>+          display-timings are used instead.</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - gpr</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx5-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    ldb@53fa8008 {</div><div class='add'>+        compatible = "fsl,imx53-ldb";</div><div class='add'>+        reg = &lt;0x53fa8008 0x4&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        gpr = &lt;&amp;gpr&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX5_CLK_LDB_DI0_SEL&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX5_CLK_LDB_DI1_SEL&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX5_CLK_IPU_DI0_SEL&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX5_CLK_IPU_DI1_SEL&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX5_CLK_LDB_DI0_GATE&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX5_CLK_LDB_DI1_GATE&gt;;</div><div class='add'>+        clock-names = "di0_pll", "di1_pll",</div><div class='add'>+                      "di0_sel", "di1_sel",</div><div class='add'>+                      "di0", "di1";</div><div class='add'>+</div><div class='add'>+        /* Using an of-graph endpoint link to connect the panel */</div><div class='add'>+        lvds-channel@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;ipu_di0_lvds0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+               };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        /* Using display-timings and fsl,data-mapping/width instead */</div><div class='add'>+        lvds-channel@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                fsl,data-mapping = "spwg";</div><div class='add'>+                fsl,data-width = &lt;24&gt;;</div><div class='add'>+</div><div class='add'>+                display-timings {/* ... */</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                     reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                     endpoint {</div><div class='add'>+                         remote-endpoint = &lt;&amp;ipu_di1_lvds1&gt;;</div><div class='add'>+                     };</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml<br/>new file mode 100644<br/>index 000000000000..73bc73ff6e69<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-pre.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX PRE (Prefetch Resolve Engine)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx6qp-pre</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: axi</div><div class='add'>+  fsl,iram:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle pointing to the mmio-sram device node, that should be</div><div class='add'>+      used for the PRE SRAM double buffer.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pre@21c8000 {</div><div class='add'>+        compatible = "fsl,imx6qp-pre";</div><div class='add'>+        reg = &lt;0x021c8000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 90 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX6QDL_CLK_PRE0&gt;;</div><div class='add'>+        clock-names = "axi";</div><div class='add'>+        fsl,iram = &lt;&amp;ocram2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml<br/>new file mode 100644<br/>index 000000000000..582da8c489f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-prg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX PRG (Prefetch Resolve Gasket)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx6qp-prg</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg</div><div class='add'>+      - const: axi</div><div class='add'>+</div><div class='add'>+  fsl,pres:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      phandles to the PRE units attached to this PRG, with the fixed</div><div class='add'>+      PRE as the first entry and the muxable PREs following.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    prg@21cc000 {</div><div class='add'>+        compatible = "fsl,imx6qp-prg";</div><div class='add'>+        reg = &lt;0x021cc000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX6QDL_CLK_PRG0_APB&gt;, &lt;&amp;clks IMX6QDL_CLK_PRG0_AXI&gt;;</div><div class='add'>+        clock-names = "ipg", "axi";</div><div class='add'>+        fsl,pres = &lt;&amp;pre1&gt;, &lt;&amp;pre2&gt;, &lt;&amp;pre3&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt<br/>deleted file mode 100644<br/>index 269b1ae2fca9..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,160 +0,0 @@</div><div class='del'>-Freescale i.MX DRM master device</div><div class='del'>-================================</div><div class='del'>-</div><div class='del'>-The freescale i.MX DRM master device is a virtual device needed to list all</div><div class='del'>-IPU or other display interface nodes that comprise the graphics subsystem.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "fsl,imx-display-subsystem"</div><div class='del'>-- ports: Should contain a list of phandles pointing to display interface ports</div><div class='del'>-  of IPU devices</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-display-subsystem {</div><div class='del'>-	compatible = "fsl,imx-display-subsystem";</div><div class='del'>-	ports = &lt;&amp;ipu_di0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Freescale i.MX IPUv3</div><div class='del'>-====================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "fsl,&lt;chip&gt;-ipu" where &lt;chip&gt; is one of</div><div class='del'>-  - imx51</div><div class='del'>-  - imx53</div><div class='del'>-  - imx6q</div><div class='del'>-  - imx6qp</div><div class='del'>-- reg: should be register base and length as documented in the</div><div class='del'>-  datasheet</div><div class='del'>-- interrupts: Should contain sync interrupt and error interrupt,</div><div class='del'>-  in this order.</div><div class='del'>-- resets: phandle pointing to the system reset controller and</div><div class='del'>-          reset line index, see reset/fsl,imx-src.txt for details</div><div class='del'>-Additional required properties for fsl,imx6qp-ipu:</div><div class='del'>-- fsl,prg: phandle to prg node associated with this IPU instance</div><div class='del'>-Optional properties:</div><div class='del'>-- port@[0-3]: Port nodes with endpoint definitions as defined in</div><div class='del'>-  Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='del'>-  Ports 0 and 1 should correspond to CSI0 and CSI1,</div><div class='del'>-  ports 2 and 3 should correspond to DI0 and DI1, respectively.</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-ipu: ipu@18000000 {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	compatible = "fsl,imx53-ipu";</div><div class='del'>-	reg = &lt;0x18000000 0x080000000&gt;;</div><div class='del'>-	interrupts = &lt;11 10&gt;;</div><div class='del'>-	resets = &lt;&amp;src 2&gt;;</div><div class='del'>-</div><div class='del'>-	ipu_di0: port@2 {</div><div class='del'>-		reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		ipu_di0_disp0: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;display_in&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Freescale i.MX PRE (Prefetch Resolve Engine)</div><div class='del'>-============================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "fsl,imx6qp-pre"</div><div class='del'>-- reg: should be register base and length as documented in the</div><div class='del'>-  datasheet</div><div class='del'>-- clocks : phandle to the PRE axi clock input, as described</div><div class='del'>-  in Documentation/devicetree/bindings/clock/clock-bindings.txt and</div><div class='del'>-  Documentation/devicetree/bindings/clock/imx6q-clock.yaml.</div><div class='del'>-- clock-names: should be "axi"</div><div class='del'>-- interrupts: should contain the PRE interrupt</div><div class='del'>-- fsl,iram: phandle pointing to the mmio-sram device node, that should be</div><div class='del'>-  used for the PRE SRAM double buffer.</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-pre@21c8000 {</div><div class='del'>-	compatible = "fsl,imx6qp-pre";</div><div class='del'>-	reg = &lt;0x021c8000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 90 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks IMX6QDL_CLK_PRE0&gt;;</div><div class='del'>-	clock-names = "axi";</div><div class='del'>-	fsl,iram = &lt;&amp;ocram2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Freescale i.MX PRG (Prefetch Resolve Gasket)</div><div class='del'>-============================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "fsl,imx6qp-prg"</div><div class='del'>-- reg: should be register base and length as documented in the</div><div class='del'>-  datasheet</div><div class='del'>-- clocks : phandles to the PRG ipg and axi clock inputs, as described</div><div class='del'>-  in Documentation/devicetree/bindings/clock/clock-bindings.txt and</div><div class='del'>-  Documentation/devicetree/bindings/clock/imx6q-clock.yaml.</div><div class='del'>-- clock-names: should be "ipg" and "axi"</div><div class='del'>-- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed</div><div class='del'>-  PRE as the first entry and the muxable PREs following.</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-prg@21cc000 {</div><div class='del'>-	compatible = "fsl,imx6qp-prg";</div><div class='del'>-	reg = &lt;0x021cc000 0x1000&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks IMX6QDL_CLK_PRG0_APB&gt;,</div><div class='del'>-		 &lt;&amp;clks IMX6QDL_CLK_PRG0_AXI&gt;;</div><div class='del'>-	clock-names = "ipg", "axi";</div><div class='del'>-	fsl,pres = &lt;&amp;pre1&gt;, &lt;&amp;pre2&gt;, &lt;&amp;pre3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Parallel display support</div><div class='del'>-========================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "fsl,imx-parallel-display"</div><div class='del'>-Optional properties:</div><div class='del'>-- interface-pix-fmt: How this display is connected to the</div><div class='del'>-  display interface. Currently supported types: "rgb24", "rgb565", "bgr666"</div><div class='del'>-  and "lvds666".</div><div class='del'>-- ddc: phandle describing the i2c bus handling the display data</div><div class='del'>-  channel</div><div class='del'>-- port@[0-1]: Port nodes with endpoint definitions as defined in</div><div class='del'>-  Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='del'>-  Port 0 is the input port connected to the IPU display interface,</div><div class='del'>-  port 1 is the output port connected to a panel.</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-disp0 {</div><div class='del'>-	compatible = "fsl,imx-parallel-display";</div><div class='del'>-	interface-pix-fmt = "rgb24";</div><div class='del'>-</div><div class='del'>-	port@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		display_in: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;ipu_di0_disp0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	port@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		display_out: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-panel {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	port {</div><div class='del'>-		panel_in: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/ldb.txt b/Documentation/devicetree/bindings/display/imx/ldb.txt<br/>deleted file mode 100644<br/>index 03653a291b54..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/imx/ldb.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/imx/ldb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,146 +0,0 @@</div><div class='del'>-Device-Tree bindings for LVDS Display Bridge (ldb)</div><div class='del'>-</div><div class='del'>-LVDS Display Bridge</div><div class='del'>-===================</div><div class='del'>-</div><div class='del'>-The LVDS Display Bridge device tree node contains up to two lvds-channel</div><div class='del'>-nodes describing each of the two LVDS encoder channels of the bridge.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - #address-cells : should be &lt;1&gt;</div><div class='del'>- - #size-cells : should be &lt;0&gt;</div><div class='del'>- - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".</div><div class='del'>-                Both LDB versions are similar, but i.MX6 has an additional</div><div class='del'>-                multiplexer in the front to select any of the four IPU display</div><div class='del'>-                interfaces as input for each LVDS channel.</div><div class='del'>- - gpr : should be &lt;&amp;gpr&gt; on i.MX53 and i.MX6q.</div><div class='del'>-         The phandle points to the iomuxc-gpr region containing the LVDS</div><div class='del'>-         control register.</div><div class='del'>-- clocks, clock-names : phandles to the LDB divider and selector clocks and to</div><div class='del'>-                        the display interface selector clocks, as described in</div><div class='del'>-                        Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-        The following clocks are expected on i.MX53:</div><div class='del'>-                "di0_pll" - LDB LVDS channel 0 mux</div><div class='del'>-                "di1_pll" - LDB LVDS channel 1 mux</div><div class='del'>-                "di0" - LDB LVDS channel 0 gate</div><div class='del'>-                "di1" - LDB LVDS channel 1 gate</div><div class='del'>-                "di0_sel" - IPU1 DI0 mux</div><div class='del'>-                "di1_sel" - IPU1 DI1 mux</div><div class='del'>-        On i.MX6q the following additional clocks are needed:</div><div class='del'>-                "di2_sel" - IPU2 DI0 mux</div><div class='del'>-                "di3_sel" - IPU2 DI1 mux</div><div class='del'>-        The needed clock numbers for each are documented in</div><div class='del'>-        Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in</div><div class='del'>-        Documentation/devicetree/bindings/clock/imx6q-clock.yaml.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>- - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q</div><div class='del'>- - pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53,</div><div class='del'>-               not used on i.MX6q</div><div class='del'>- - fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should</div><div class='del'>-   be configured - one input will be distributed on both outputs in dual</div><div class='del'>-   channel mode</div><div class='del'>-</div><div class='del'>-LVDS Channel</div><div class='del'>-============</div><div class='del'>-</div><div class='del'>-Each LVDS Channel has to contain either an of graph link to a panel device node</div><div class='del'>-or a display-timings node that describes the video timings for the connected</div><div class='del'>-LVDS display as well as the fsl,data-mapping and fsl,data-width properties.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - reg : should be &lt;0&gt; or &lt;1&gt;</div><div class='del'>- - port: Input and output port nodes with endpoint definitions as defined in</div><div class='del'>-   Documentation/devicetree/bindings/graph.txt.</div><div class='del'>-   On i.MX5, the internal two-input-multiplexer is used. Due to hardware</div><div class='del'>-   limitations, only one input port (port@[0,1]) can be used for each channel</div><div class='del'>-   (lvds-channel@[0,1], respectively).</div><div class='del'>-   On i.MX6, there should be four input ports (port@[0-3]) that correspond</div><div class='del'>-   to the four LVDS multiplexer inputs.</div><div class='del'>-   A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected</div><div class='del'>-   to a panel input port. Optionally, the output port can be left out if</div><div class='del'>-   display-timings are used instead.</div><div class='del'>-</div><div class='del'>-Optional properties (required if display-timings are used):</div><div class='del'>- - display-timings : A node that describes the display timings as defined in</div><div class='del'>-   Documentation/devicetree/bindings/display/panel/display-timing.txt.</div><div class='del'>- - fsl,data-mapping : should be "spwg" or "jeida"</div><div class='del'>-                      This describes how the color bits are laid out in the</div><div class='del'>-                      serialized LVDS signal.</div><div class='del'>- - fsl,data-width : should be &lt;18&gt; or &lt;24&gt;</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-gpr: iomuxc-gpr@53fa8000 {</div><div class='del'>-	/* ... */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ldb: ldb@53fa8008 {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	compatible = "fsl,imx53-ldb";</div><div class='del'>-	gpr = &lt;&amp;gpr&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks IMX5_CLK_LDB_DI0_SEL&gt;,</div><div class='del'>-		 &lt;&amp;clks IMX5_CLK_LDB_DI1_SEL&gt;,</div><div class='del'>-		 &lt;&amp;clks IMX5_CLK_IPU_DI0_SEL&gt;,</div><div class='del'>-		 &lt;&amp;clks IMX5_CLK_IPU_DI1_SEL&gt;,</div><div class='del'>-		 &lt;&amp;clks IMX5_CLK_LDB_DI0_GATE&gt;,</div><div class='del'>-		 &lt;&amp;clks IMX5_CLK_LDB_DI1_GATE&gt;;</div><div class='del'>-	clock-names = "di0_pll", "di1_pll",</div><div class='del'>-		      "di0_sel", "di1_sel",</div><div class='del'>-		      "di0", "di1";</div><div class='del'>-</div><div class='del'>-	/* Using an of-graph endpoint link to connect the panel */</div><div class='del'>-	lvds-channel@0 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		port@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			lvds0_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;ipu_di0_lvds0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		port@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			lvds0_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Using display-timings and fsl,data-mapping/width instead */</div><div class='del'>-	lvds-channel@1 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		fsl,data-mapping = "spwg";</div><div class='del'>-		fsl,data-width = &lt;24&gt;;</div><div class='del'>-</div><div class='del'>-		display-timings {</div><div class='del'>-			/* ... */</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			lvds1_in: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;ipu_di1_lvds1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-panel: lvds-panel {</div><div class='del'>-	/* ... */</div><div class='del'>-</div><div class='del'>-	port {</div><div class='del'>-		panel_in: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;lvds0_out&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml<br/>new file mode 100644<br/>index 000000000000..bde4dc556d4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek HDMI MT8195 series HDMI Display Data Channel (DDC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+  - CK Hu &lt;ck.hu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: mediatek,mt8195-hdmi-ddc</div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt8188-hdmi-ddc</div><div class='add'>+          - const: mediatek,mt8195-hdmi-ddc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    hdmi {</div><div class='add'>+        hdmi_ddc: i2c {</div><div class='add'>+            compatible = "mediatek,mt8195-hdmi-ddc";</div><div class='add'>+            clocks = &lt;&amp;clk26m&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml<br/>new file mode 100644<br/>index 000000000000..1b382f99d3ce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/mediatek/mediatek,mt8195-hdmi.yaml</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT8195 series HDMI-TX Encoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+  - CK Hu &lt;ck.hu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek HDMI-TX v2 encoder can generate HDMI format data based on</div><div class='add'>+  the HDMI Specification 2.0b.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8188-hdmi-tx</div><div class='add'>+      - mediatek,mt8195-hdmi-tx</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: HDMI Peripheral Bus (APB) clock</div><div class='add'>+      - description: HDCP and HDMI_TOP clock</div><div class='add'>+      - description: HDCP, HDMI_TOP and HDMI Audio reference clock</div><div class='add'>+      - description: VPP HDMI Split clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: hdcp</div><div class='add'>+      - const: hdcp24m</div><div class='add'>+      - const: hdmi-split</div><div class='add'>+</div><div class='add'>+  i2c:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: HDMI DDC I2C controller</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: PHY providing clocking TMDS and pixel to controller</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hdmi</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Input port, usually connected to the output port of a DPI</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Output port that must be connected either to the input port of</div><div class='add'>+          a HDMI connector node containing a ddc-i2c-bus, or to the input</div><div class='add'>+          port of an attached bridge chip, such as a SlimPort transmitter.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/sound/dai-common.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8195-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8195-power.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        hdmi@1c300000 {</div><div class='add'>+            compatible = "mediatek,mt8195-hdmi-tx";</div><div class='add'>+            reg = &lt;0 0x1c300000 0 0x1000&gt;;</div><div class='add'>+            clocks = &lt;&amp;topckgen CLK_TOP_HDMI_APB&gt;,</div><div class='add'>+                     &lt;&amp;topckgen CLK_TOP_HDCP&gt;,</div><div class='add'>+                     &lt;&amp;topckgen CLK_TOP_HDCP_24M&gt;,</div><div class='add'>+                     &lt;&amp;vppsys1 CLK_VPP1_VPP_SPLIT_HDMI&gt;;</div><div class='add'>+            clock-names = "bus", "hdcp", "hdcp24m", "hdmi-split";</div><div class='add'>+            interrupts = &lt;GIC_SPI 677 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+            phys = &lt;&amp;hdmi_phy&gt;;</div><div class='add'>+            phy-names = "hdmi";</div><div class='add'>+            power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_HDMI_TX&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;hdmi_pins&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            hdmitx_ddc: i2c {</div><div class='add'>+                compatible = "mediatek,mt8195-hdmi-ddc";</div><div class='add'>+                clocks = &lt;&amp;clk26m&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    hdmi_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpi1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    hdmi_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;hdmi_connector_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml<br/>index e00b88332f2f..246bbb509bea 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a></div><div class='hunk'>@@ -31,6 +31,7 @@ properties:</div><div class='ctx'>           - qcom,sm8650-dp</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,sar2130p-dp</div><div class='ctx'>               - qcom,sm6350-dp</div><div class='ctx'>               - qcom,sm8150-dp</div><div class='ctx'>               - qcom,sm8250-dp</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml<br/>index 2aab33cd0017..82fe95a6d959 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml</a></div><div class='hunk'>@@ -23,6 +23,8 @@ properties:</div><div class='ctx'>               - qcom,msm8996-dsi-ctrl</div><div class='ctx'>               - qcom,msm8998-dsi-ctrl</div><div class='ctx'>               - qcom,qcm2290-dsi-ctrl</div><div class='add'>+              - qcom,sa8775p-dsi-ctrl</div><div class='add'>+              - qcom,sar2130p-dsi-ctrl</div><div class='ctx'>               - qcom,sc7180-dsi-ctrl</div><div class='ctx'>               - qcom,sc7280-dsi-ctrl</div><div class='ctx'>               - qcom,sdm660-dsi-ctrl</div><div class='hunk'>@@ -314,6 +316,8 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - qcom,msm8998-dsi-ctrl</div><div class='add'>+              - qcom,sa8775p-dsi-ctrl</div><div class='add'>+              - qcom,sar2130p-dsi-ctrl</div><div class='ctx'>               - qcom,sc7180-dsi-ctrl</div><div class='ctx'>               - qcom,sc7280-dsi-ctrl</div><div class='ctx'>               - qcom,sdm845-dsi-ctrl</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml<br/>index 321470435e65..3c75ff42999a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml</a></div><div class='hunk'>@@ -17,6 +17,8 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,dsi-phy-7nm</div><div class='ctx'>       - qcom,dsi-phy-7nm-8150</div><div class='add'>+      - qcom,sa8775p-dsi-phy-5nm</div><div class='add'>+      - qcom,sar2130p-dsi-phy-5nm</div><div class='ctx'>       - qcom,sc7280-dsi-phy-7nm</div><div class='ctx'>       - qcom,sm6375-dsi-phy-7nm</div><div class='ctx'>       - qcom,sm8350-dsi-phy-5nm</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml<br/>index d4a2033afea8..dfec6c3480f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/hdmi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/hdmi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/hdmi.yaml</a></div><div class='hunk'>@@ -66,21 +66,6 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: hpd pin</div><div class='ctx'> </div><div class='del'>-  qcom,hdmi-tx-mux-en-gpios:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    deprecated: true</div><div class='del'>-    description: HDMI mux enable pin</div><div class='del'>-</div><div class='del'>-  qcom,hdmi-tx-mux-sel-gpios:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    deprecated: true</div><div class='del'>-    description: HDMI mux select pin</div><div class='del'>-</div><div class='del'>-  qcom,hdmi-tx-mux-lpm-gpios:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    deprecated: true</div><div class='del'>-    description: HDMI mux lpm pin</div><div class='del'>-</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -89,12 +74,12 @@ properties:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='del'>-        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>         description: |</div><div class='ctx'>           Input endpoints of the controller.</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='del'>-        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>         description: |</div><div class='ctx'>           Output endpoints of the controller.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/mdp4.yaml b/Documentation/devicetree/bindings/display/msm/mdp4.yaml<br/>index 35204a287579..03ee09faa335 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/mdp4.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/mdp4.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/mdp4.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/mdp4.yaml</a></div><div class='hunk'>@@ -18,9 +18,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 6</div><div class='del'>-    maxItems: 6</div><div class='add'>+    maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 6</div><div class='ctx'>     items:</div><div class='ctx'>       - const: core_clk</div><div class='ctx'>       - const: iface_clk</div><div class='hunk'>@@ -28,6 +29,12 @@ properties:</div><div class='ctx'>       - const: lut_clk</div><div class='ctx'>       - const: hdmi_clk</div><div class='ctx'>       - const: tv_clk</div><div class='add'>+      - const: lcdc_clk</div><div class='add'>+      - const: pxo</div><div class='add'>+        description: XO used to drive the internal LVDS PLL</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml<br/>index 7c6462caa442..db9c43b20e2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml</a></div><div class='hunk'>@@ -84,6 +84,18 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: MDSS_CORE reset</div><div class='ctx'> </div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Interconnect path from mdp0 (or a single mdp) port to the data bus</div><div class='add'>+      - description: Interconnect path from CPU to the reg bus</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp0-mem</div><div class='add'>+      - const: cpu-cfg</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml<br/>index 5fac3e266703..1053b3bc4908 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/qcom,sa8775p-mdss.yaml</a></div><div class='hunk'>@@ -52,12 +52,23 @@ patternProperties:</div><div class='ctx'>         items:</div><div class='ctx'>           - const: qcom,sa8775p-dp</div><div class='ctx'> </div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: qcom,sa8775p-dsi-ctrl</div><div class='add'>+</div><div class='ctx'>   "^phy@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: true</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='del'>-        const: qcom,sa8775p-edp-phy</div><div class='add'>+        contains:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sa8775p-dsi-phy-5nm</div><div class='add'>+            - qcom,sa8775p-edp-phy</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -139,6 +150,20 @@ examples:</div><div class='ctx'>                         remote-endpoint = &lt;&amp;mdss0_dp0_in&gt;;</div><div class='ctx'>                     };</div><div class='ctx'>                 };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss0_dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss0_dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             mdss0_mdp_opp_table: opp-table {</div><div class='hunk'>@@ -186,6 +211,160 @@ examples:</div><div class='ctx'>             vdda-pll-supply = &lt;&amp;vreg_l4a&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispc_byte_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_intf_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_pclk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_esc_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;gcc_bus_clk&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc_byte_clk&gt;,</div><div class='add'>+                              &lt;&amp;dispcc_pclk&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;mdss0_dsi0_phy 0&gt;, &lt;&amp;mdss0_dsi0_phy 1&gt;;</div><div class='add'>+            phys = &lt;&amp;mdss0_dsi0_phy&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi0_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    mdss0_dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    mdss0_dsi0_out: endpoint { };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi0_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdss0_dsi0_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,sa8775p-dsi-phy-5nm";</div><div class='add'>+            reg = &lt;0x0ae94400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae94600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae94900 0x27c&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc_iface_clk&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc_ref_clk&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_supply&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae96000 {</div><div class='add'>+            compatible = "qcom,sa8775p-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae96000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispc_byte_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_intf_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_pclk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_esc_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;gcc_bus_clk&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc_byte_clk&gt;,</div><div class='add'>+                              &lt;&amp;dispcc_pclk&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;mdss0_dsi1_phy 0&gt;, &lt;&amp;mdss0_dsi1_phy 1&gt;;</div><div class='add'>+            phys = &lt;&amp;mdss0_dsi1_phy&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi1_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SA8775P_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    mdss0_dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    mdss0_dsi1_out: endpoint { };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi1_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdss0_dsi1_phy: phy@ae96400 {</div><div class='add'>+            compatible = "qcom,sa8775p-dsi-phy-5nm";</div><div class='add'>+            reg = &lt;0x0ae96400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae96600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae96900 0x27c&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc_iface_clk&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc_ref_clk&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_supply&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='ctx'>         displayport-controller@af54000 {</div><div class='ctx'>             compatible = "qcom,sa8775p-dp";</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..870144b53cec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/qcom,sar2130p-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,439 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sar2130p-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SAR2130P Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;lumag@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SAR2310P MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like</div><div class='add'>+  DPU display controller, DSI and DP interfaces etc.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sar2130p-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display MDSS AHB</div><div class='add'>+      - description: Display AHB</div><div class='add'>+      - description: Display hf AXI</div><div class='add'>+      - description: Display core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: Interconnect path from mdp0 port to the data bus</div><div class='add'>+      - description: Interconnect path from CPU to the reg bus</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp0-mem</div><div class='add'>+      - const: cpu-cfg</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sar2130p-dpu</div><div class='add'>+</div><div class='add'>+  "^displayport-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: qcom,sar2130p-dp</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: qcom,sar2130p-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sar2130p-dsi-phy-5nm</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/phy/phy-qcom-qmp.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        compatible = "qcom,sar2130p-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc_master_mdp &amp;mc_virt_slave_ebi1&gt;,</div><div class='add'>+                        &lt;&amp;gem_noc_master_appss_proc &amp;config_noc_slave_display_cfg&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "cpu-cfg";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;dispcc_disp_cc_mdss_core_bcr&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;dispcc_mdss_gdsc&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc_disp_cc_mdss_ahb_clk&gt;,</div><div class='add'>+                 &lt;&amp;gcc_gcc_disp_ahb_clk&gt;,</div><div class='add'>+                 &lt;&amp;gcc_gcc_disp_hf_axi_clk&gt;,</div><div class='add'>+                 &lt;&amp;dispcc_disp_cc_mdss_mdp_clk&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "nrt_bus", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1c00 0x2&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sar2130p-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc_gcc_disp_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;gcc_gcc_disp_hf_axi_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_mdp_lut_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_mdp_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_vsync_clk&gt;;</div><div class='add'>+            clock-names = "bus",</div><div class='add'>+                          "nrt_bus",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "lut",</div><div class='add'>+                          "core",</div><div class='add'>+                          "vsync";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc_disp_cc_mdss_vsync_clk&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    dpu_intf0_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss_dp0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss_dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss_dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mdp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-200000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-325000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;325000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-375000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;375000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-514000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;514000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        displayport-controller@ae90000 {</div><div class='add'>+            compatible = "qcom,sar2130p-dp",</div><div class='add'>+                         "qcom,sm8350-dp";</div><div class='add'>+            reg = &lt;0xae90000 0x200&gt;,</div><div class='add'>+                  &lt;0xae90200 0x200&gt;,</div><div class='add'>+                  &lt;0xae90400 0xc00&gt;,</div><div class='add'>+                  &lt;0xae91000 0x400&gt;,</div><div class='add'>+                  &lt;0xae91400 0x400&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;12&gt;;</div><div class='add'>+            clocks = &lt;&amp;dispcc_disp_cc_mdss_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_dptx0_aux_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_dptx0_link_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_dptx0_link_intf_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_dptx0_pixel0_clk&gt;;</div><div class='add'>+            clock-names = "core_iface",</div><div class='add'>+                          "core_aux",</div><div class='add'>+                          "ctrl_link",</div><div class='add'>+                          "ctrl_link_iface",</div><div class='add'>+                          "stream_pixel";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc_disp_cc_mdss_dptx0_link_clk_src&gt;,</div><div class='add'>+                              &lt;&amp;dispcc_disp_cc_mdss_dptx0_pixel0_clk_src&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;usb_dp_qmpphy_QMP_USB43DP_DP_LINK_CLK&gt;,</div><div class='add'>+                                     &lt;&amp;usb_dp_qmpphy_QMP_USB43DP_DP_VCO_DIV_CLK&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;usb_dp_qmpphy QMP_USB43DP_DP_PHY&gt;;</div><div class='add'>+            phy-names = "dp";</div><div class='add'>+</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    mdss_dp0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    mdss_dp0_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;usb_dp_qmpphy_dp_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-162000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;162000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs_d1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-270000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-540000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-810000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sar2130p-dsi-ctrl",</div><div class='add'>+                         "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc_disp_cc_mdss_byte0_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_byte0_intf_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_pclk0_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_esc0_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;gcc_gcc_disp_hf_axi_clk&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc_disp_cc_mdss_byte0_clk_src&gt;,</div><div class='add'>+                              &lt;&amp;dispcc_disp_cc_mdss_pclk0_clk_src&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;, &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;mdss_dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    mdss_dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    mdss_dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-187500000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdss_dsi0_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,sar2130p-dsi-phy-5nm";</div><div class='add'>+            reg = &lt;0x0ae95000 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae95200 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae95500 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc_disp_cc_mdss_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc_rpmh_cxo_clk&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae96000 {</div><div class='add'>+            compatible = "qcom,sar2130p-dsi-ctrl",</div><div class='add'>+                         "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae96000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc_disp_cc_mdss_byte1_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_byte1_intf_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_pclk1_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_esc1_clk&gt;,</div><div class='add'>+                     &lt;&amp;dispcc_disp_cc_mdss_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;gcc_gcc_disp_hf_axi_clk&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc_disp_cc_mdss_byte1_clk_src&gt;,</div><div class='add'>+                              &lt;&amp;dispcc_disp_cc_mdss_pclk1_clk_src&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;mdss_dsi1_phy 0&gt;, &lt;&amp;mdss_dsi1_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd RPMHPD_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;mdss_dsi1_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    mdss_dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    mdss_dsi1_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdss_dsi1_phy: phy@ae97000 {</div><div class='add'>+            compatible = "qcom,sar2130p-dsi-phy-5nm";</div><div class='add'>+            reg = &lt;0x0ae97000 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae97200 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae97500 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc_disp_cc_mdss_ahb_clk&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc_rpmh_cxo_clk&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml<br/>index 6902795b4e2c..df9ec15ad6c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ $ref: /schemas/display/msm/dpu-common.yaml#</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - qcom,sar2130p-dpu</div><div class='ctx'>       - qcom,sc7280-dpu</div><div class='ctx'>       - qcom,sc8280xp-dpu</div><div class='ctx'>       - qcom,sm8350-dpu</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml<br/>index 163fc83c1e80..68176de854b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml</a></div><div class='hunk'>@@ -38,12 +38,16 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interconnects:</div><div class='del'>-    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: Interconnect path from the MDP0 port to the data bus</div><div class='add'>+      - description: Interconnect path from the MDP1 port to the data bus</div><div class='add'>+      - description: Interconnect path from the CPU to the reg bus</div><div class='ctx'> </div><div class='ctx'>   interconnect-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: mdp0-mem</div><div class='ctx'>       - const: mdp1-mem</div><div class='add'>+      - const: cpu-cfg</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^display-controller@[0-9a-f]+$":</div><div class='hunk'>@@ -88,6 +92,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,gcc-sm8350.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interconnect/qcom,sm8350.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/qcom,rpmhpd.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -97,8 +102,10 @@ examples:</div><div class='ctx'>         reg-names = "mdss";</div><div class='ctx'> </div><div class='ctx'>         interconnects = &lt;&amp;mmss_noc MASTER_MDP0 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='del'>-                        &lt;&amp;mmss_noc MASTER_MDP1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='del'>-        interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_MDP1 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='add'>+                        &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+                         &amp;config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "mdp1-mem", "cpu-cfg";</div><div class='ctx'> </div><div class='ctx'>         power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='ctx'>         resets = &lt;&amp;dispcc DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/boe,td4320.yaml b/Documentation/devicetree/bindings/display/panel/boe,td4320.yaml<br/>new file mode 100644<br/>index 000000000000..c6bff0ece360<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/boe,td4320.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/boe,td4320.yaml</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/boe,td4320.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: BOE TD4320 MIPI-DSI panels</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Barnabas Czeman &lt;barnabas.czeman@mainlining.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  BOE TD4320 6.3" 1080x2340 panel found in Xiaomi Redmi Note 7 smartphone.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: boe,td4320</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iovcc-supply:</div><div class='add'>+    description: I/O voltage rail</div><div class='add'>+</div><div class='add'>+  vsn-supply:</div><div class='add'>+    description: Negative source voltage rail</div><div class='add'>+</div><div class='add'>+  vsp-supply:</div><div class='add'>+    description: Positive source voltage rail</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "boe,td4320";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 45 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml b/Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml<br/>new file mode 100644<br/>index 000000000000..f619aea82bdf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/himax,hx8279.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/himax,hx8279.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Himax HX8279/HX8279-D based MIPI-DSI panels</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Himax HX8279 is a 1803 channel outputs source driver with MIPI</div><div class='add'>+  TCON, which generates the horizontal and vertical control timing to</div><div class='add'>+  the source and gate drivers.</div><div class='add'>+  This DriverIC is most suitable for 1200x1920, 1080x1920, 1200x1600,</div><div class='add'>+  and 600x1024 panels and outputs full RGB888 over two or four lanes,</div><div class='add'>+  single or dual, MIPI-DSI video interface.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common-dual.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - aoly,sl101pm1794fog-v15</div><div class='add'>+          - startek,kd070fhfid078</div><div class='add'>+      - const: himax,hx8279</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iovcc-supply:</div><div class='add'>+    description: I/O voltage supply</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: Panel power supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - backlight</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - iovcc-supply</div><div class='add'>+  - vdd-supply</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "startek,kd070fhfid078", "himax,hx8279";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;pio 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;pio 45 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            iovcc-supply = &lt;&amp;vreg_lcm_vio&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vreg_lcm_vdd&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml b/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml<br/>index e2a2dd4ef5fa..5fcea62fd58f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/leadtek,ltk050h3146w.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   backlight: true</div><div class='add'>+  port: true</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'>   iovcc-supply:</div><div class='ctx'>     description: regulator that supplies the iovcc voltage</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml b/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml<br/>index af9e0ea0e72f..b0e2c82232d3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml</a></div><div class='hunk'>@@ -22,6 +22,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   backlight: true</div><div class='add'>+  port: true</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'>   iovcc-supply:</div><div class='ctx'>     description: regulator that supplies the iovcc voltage</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml<br/>new file mode 100644<br/>index 000000000000..1b38c1d0af68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/novatek,nt37801.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Novatek NT37801 AMOLED DSI Panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Naming is inconclusive and different sources claim this is either Novatek</div><div class='add'>+  NT37801 or NT37810 AMOLED DSI Panel.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: novatek,nt37801</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: DSI virtual channel</div><div class='add'>+</div><div class='add'>+  vci-supply: true</div><div class='add'>+  vdd-supply: true</div><div class='add'>+  vddio-supply: true</div><div class='add'>+  port: true</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vci-supply</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - port</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "novatek,nt37801";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vci-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vreg_l11b_1p2&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vreg_l12b_1p8&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 98 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml<br/>index b0de4fd6f3d4..5542c9229d54 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a></div><div class='hunk'>@@ -226,6 +226,8 @@ properties:</div><div class='ctx'>       - netron-dy,e231732</div><div class='ctx'>         # Newhaven Display International 480 x 272 TFT LCD panel</div><div class='ctx'>       - newhaven,nhd-4.3-480272ef-atxl</div><div class='add'>+        # NLT Technologies, Ltd. 15.6" WXGA (1366×768) LVDS TFT LCD panel</div><div class='add'>+      - nlt,nl13676bc25-03f</div><div class='ctx'>         # New Vision Display 7.0" 800 RGB x 480 TFT LCD panel</div><div class='ctx'>       - nvd,9128</div><div class='ctx'>         # OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel</div><div class='hunk'>@@ -246,6 +248,8 @@ properties:</div><div class='ctx'>       - osddisplays,osd070t1718-19ts</div><div class='ctx'>         # One Stop Displays OSD101T2045-53TS 10.1" 1920x1200 panel</div><div class='ctx'>       - osddisplays,osd101t2045-53ts</div><div class='add'>+        # POWERTIP PH128800T004-ZZA01 10.1" WXGA TFT LCD panel</div><div class='add'>+      - powertip,ph128800t004-zza01</div><div class='ctx'>         # POWERTIP PH128800T006-ZHC01 10.1" WXGA TFT LCD panel</div><div class='ctx'>       - powertip,ph128800t006-zhc01</div><div class='ctx'>         # POWERTIP PH800480T013-IDF2 7.0" WVGA TFT LCD panel</div><div class='hunk'>@@ -284,6 +288,8 @@ properties:</div><div class='ctx'>       - startek,kd070wvfpa</div><div class='ctx'>         # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel</div><div class='ctx'>       - team-source-display,tst043015cmhx</div><div class='add'>+        # Tianma Micro-electronics P0700WXF1MBAA 7.0" WXGA (1280x800) LVDS TFT LCD panel</div><div class='add'>+      - tianma,p0700wxf1mbaa</div><div class='ctx'>         # Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel</div><div class='ctx'>       - tianma,tm070jdhg30</div><div class='ctx'>         # Tianma Micro-electronics TM070JDHG34-00 7.0" WXGA (1280x800) LVDS TFT LCD panel</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml b/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml<br/>index 684c2896d238..31f0c0f038e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml</a></div><div class='hunk'>@@ -19,6 +19,8 @@ properties:</div><div class='ctx'>       - const: samsung,atna33xc20</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              # Samsung 14" WQXGA+ (2880×1800 pixels) eDP AMOLED panel</div><div class='add'>+              - samsung,atna40yk20</div><div class='ctx'>               # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel</div><div class='ctx'>               - samsung,atna45af01</div><div class='ctx'>               # Samsung 14.5" 3K (2944x1840 pixels) eDP AMOLED panel</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml b/Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml<br/>new file mode 100644<br/>index 000000000000..36be09c900f2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/truly,nt35597-2K-display.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/truly,nt35597-2K-display.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Truly NT35597 DSI 2K display</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Truly NT35597 DSI 2K display is used on the Qualcomm SDM845 MTP board.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common-dual.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: truly,nt35597-2K-display</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description: regulator that provides the supply voltage Power IC supply</div><div class='add'>+</div><div class='add'>+  vdispp-supply:</div><div class='add'>+    description: regulator that provides the supply voltage for positive LCD bias</div><div class='add'>+</div><div class='add'>+  vdispn-supply:</div><div class='add'>+    description: regulator that provides the supply voltage for negative LCD bias</div><div class='add'>+</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+  mode-gpios:</div><div class='add'>+    description:</div><div class='add'>+      Gpio for choosing the mode of the display for single DSI or Dual DSI.</div><div class='add'>+      This should be low for dual DSI and high for single DSI mode.</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vdda-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - mode-gpios</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "truly,nt35597-2K-display";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vdda-supply = &lt;&amp;pm8998_l14&gt;;</div><div class='add'>+            vdispp-supply = &lt;&amp;lab_regulator&gt;;</div><div class='add'>+            vdispn-supply = &lt;&amp;ibb_regulator&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            mode-gpios = &lt;&amp;tlmm 52 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    panel0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    panel1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml b/Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml<br/>new file mode 100644<br/>index 000000000000..49dcd9b8f670<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/panel/visionox,g2647fb105.yaml</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/visionox,g2647fb105.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Visionox G2647FB105 6.47" 1080x2340 MIPI-DSI Panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Baransky &lt;sanyapilot496@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Visionox G2647FB105 is a 6.47 inch 1080x2340 MIPI-DSI CMD mode OLED panel.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: visionox,g2647fb105</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd3p3-supply:</div><div class='add'>+    description: 3.3V source voltage rail</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: I/O source voltage rail</div><div class='add'>+</div><div class='add'>+  vsn-supply:</div><div class='add'>+    description: Negative source voltage rail</div><div class='add'>+</div><div class='add'>+  vsp-supply:</div><div class='add'>+    description: Positive source voltage rail</div><div class='add'>+</div><div class='add'>+  reset-gpios: true</div><div class='add'>+  port: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vdd3p3-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vsn-supply</div><div class='add'>+  - vsp-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "visionox,g2647fb105";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vdd3p3-supply = &lt;&amp;vreg_l7c_3p0&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vreg_l13a_1p8&gt;;</div><div class='add'>+            vsn-supply = &lt;&amp;vreg_ibb&gt;;</div><div class='add'>+            vsp-supply = &lt;&amp;vreg_lab&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;pm6150l_gpios 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mdss_dsi0_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt<br/>deleted file mode 100644<br/>index 8df7d2e393d6..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,74 +0,0 @@</div><div class='del'>-Rockchip RK3399 specific extensions to the cdn Display Port</div><div class='del'>-================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "rockchip,rk3399-cdn-dp"</div><div class='del'>-</div><div class='del'>-- reg: physical base address of the controller and length</div><div class='del'>-</div><div class='del'>-- clocks: from common clock binding: handle to dp clock.</div><div class='del'>-</div><div class='del'>-- clock-names: from common clock binding:</div><div class='del'>-	       Required elements: "core-clk" "pclk" "spdif" "grf"</div><div class='del'>-</div><div class='del'>-- resets : a list of phandle + reset specifier pairs</div><div class='del'>-- reset-names : string of reset names</div><div class='del'>-		Required elements: "apb", "core", "dptx", "spdif"</div><div class='del'>-- power-domains : power-domain property defined with a phandle</div><div class='del'>-		  to respective power domain.</div><div class='del'>-- assigned-clocks: main clock, should be &lt;&amp;cru SCLK_DP_CORE&gt;</div><div class='del'>-- assigned-clock-rates : the DP core clk frequency, shall be: 100000000</div><div class='del'>-</div><div class='del'>-- rockchip,grf: this soc should set GRF regs, so need get grf here.</div><div class='del'>-</div><div class='del'>-- ports: contain a port nodes with endpoint definitions as defined in</div><div class='del'>-	 Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='del'>-	 contained 2 endpoints, connecting to the output of vop.</div><div class='del'>-</div><div class='del'>-- phys: from general PHY binding: the phandle for the PHY device.</div><div class='del'>-</div><div class='del'>-- extcon: extcon specifier for the Power Delivery</div><div class='del'>-</div><div class='del'>-- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF</div><div class='del'>-</div><div class='del'>--------------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	cdn_dp: dp@fec00000 {</div><div class='del'>-		compatible = "rockchip,rk3399-cdn-dp";</div><div class='del'>-		reg = &lt;0x0 0xfec00000 0x0 0x100000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_DP_CORE&gt;, &lt;&amp;cru PCLK_DP_CTRL&gt;,</div><div class='del'>-			 &lt;&amp;cru SCLK_SPDIF_REC_DPTX&gt;, &lt;&amp;cru PCLK_VIO_GRF&gt;;</div><div class='del'>-		clock-names = "core-clk", "pclk", "spdif", "grf";</div><div class='del'>-		assigned-clocks = &lt;&amp;cru SCLK_DP_CORE&gt;;</div><div class='del'>-		assigned-clock-rates = &lt;100000000&gt;;</div><div class='del'>-		power-domains = &lt;&amp;power RK3399_PD_HDCP&gt;;</div><div class='del'>-		phys = &lt;&amp;tcphy0_dp&gt;, &lt;&amp;tcphy1_dp&gt;;</div><div class='del'>-		resets = &lt;&amp;cru SRST_DPTX_SPDIF_REC&gt;;</div><div class='del'>-		reset-names = "spdif";</div><div class='del'>-		extcon = &lt;&amp;fusb0&gt;, &lt;&amp;fusb1&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			dp_in: port {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				dp_in_vopb: endpoint@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopb_out_dp&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				dp_in_vopl: endpoint@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopl_out_dp&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml<br/>index 60dedf9b2be7..d99b23b88cc5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - rockchip,rk3288-dp</div><div class='ctx'>       - rockchip,rk3399-edp</div><div class='add'>+      - rockchip,rk3588-edp</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 2</div><div class='hunk'>@@ -31,16 +32,23 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='del'>-    const: dp</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: dp</div><div class='add'>+      - const: apb</div><div class='ctx'> </div><div class='ctx'>   rockchip,grf:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='ctx'>       This SoC makes use of GRF regs.</div><div class='ctx'> </div><div class='add'>+  aux-bus:</div><div class='add'>+    $ref: /schemas/display/dp-aux-bus.yaml#</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='hunk'>@@ -52,6 +60,19 @@ required:</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/display/bridge/analogix,dp.yaml#</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - rockchip,rk3588-edp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml<br/>index 5b87b0f1963e..290376bec079 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi.yaml</a></div><div class='hunk'>@@ -23,13 +23,11 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - description: The HDMI controller main clock</div><div class='ctx'>       - description: The HDMI PHY reference clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: pclk</div><div class='ctx'>       - const: ref</div><div class='hunk'>@@ -58,6 +56,12 @@ properties:</div><div class='ctx'>       - port@0</div><div class='ctx'>       - port@1</div><div class='ctx'> </div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to GRF used for control the polarity of hsync/vsync of rk3036</div><div class='add'>+      HDMI.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -77,6 +81,8 @@ allOf:</div><div class='ctx'>             const: rockchip,rk3036-inno-hdmi</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='add'>+      required:</div><div class='add'>+        - rockchip,grf</div><div class='ctx'>       properties:</div><div class='ctx'>         power-domains: false</div><div class='ctx'> </div><div class='hunk'>@@ -87,11 +93,6 @@ allOf:</div><div class='ctx'>             const: rockchip,rk3128-inno-hdmi</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          minItems: 2</div><div class='del'>-        clock-names:</div><div class='del'>-          minItems: 2</div><div class='ctx'>       required:</div><div class='ctx'>         - power-domains</div><div class='ctx'> </div><div class='hunk'>@@ -106,10 +107,11 @@ examples:</div><div class='ctx'>       compatible = "rockchip,rk3036-inno-hdmi";</div><div class='ctx'>       reg = &lt;0x20034000 0x4000&gt;;</div><div class='ctx'>       interrupts = &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-      clocks = &lt;&amp;cru  PCLK_HDMI&gt;;</div><div class='del'>-      clock-names = "pclk";</div><div class='add'>+      clocks = &lt;&amp;cru PCLK_HDMI&gt;, &lt;&amp;cru SCLK_LCDC&gt;;</div><div class='add'>+      clock-names = "pclk", "ref";</div><div class='ctx'>       pinctrl-names = "default";</div><div class='ctx'>       pinctrl-0 = &lt;&amp;hdmi_ctl&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='ctx'>       #sound-dai-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>       ports {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml<br/>new file mode 100644<br/>index 000000000000..1a33128e77f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cdn-dp.yaml</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3399 specific extensions to the CDN Display Port</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Yan &lt;andy.yan@rock-chip.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+  - Sandy Huang &lt;hjc@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/sound/dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: rockchip,rk3399-cdn-dp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: DP core work clock</div><div class='add'>+      - description: APB clock</div><div class='add'>+      - description: SPDIF interface clock</div><div class='add'>+      - description: GRF clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core-clk</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: spdif</div><div class='add'>+      - const: grf</div><div class='add'>+</div><div class='add'>+  extcon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Extcon device providing the cable state for DP PHY device 0</div><div class='add'>+      - description: Extcon device providing the cable state for DP PHY device 1</div><div class='add'>+    description:</div><div class='add'>+      List of phandle to the extcon device providing the cable state for the DP PHY.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: DP output to the DP PHY device 0</div><div class='add'>+      - description: DP output to the DP PHY device 1</div><div class='add'>+    description:</div><div class='add'>+      RK3399 have two DP-USB PHY, specifying one PHY which want to use, or</div><div class='add'>+      specify two PHYs here to let the driver determine which PHY to use.</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Input of the CDN DP</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint@0:</div><div class='add'>+            description: Connection to the VOPB</div><div class='add'>+</div><div class='add'>+          endpoint@1:</div><div class='add'>+            description: Connection to the VOPL</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Output of the CDN DP</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: spdif</div><div class='add'>+      - const: dptx</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to GRF register to control HPD.</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - phys</div><div class='add'>+  - ports</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - rockchip,grf</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/rk3399-power.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        dp@fec00000 {</div><div class='add'>+            compatible = "rockchip,rk3399-cdn-dp";</div><div class='add'>+            reg = &lt;0x0 0xfec00000 0x0 0x100000&gt;;</div><div class='add'>+            assigned-clocks = &lt;&amp;cru SCLK_DP_CORE&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;100000000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;cru SCLK_DP_CORE&gt;, &lt;&amp;cru PCLK_DP_CTRL&gt;, &lt;&amp;cru SCLK_SPDIF_REC_DPTX&gt;,</div><div class='add'>+                    &lt;&amp;cru PCLK_VIO_GRF&gt;;</div><div class='add'>+            clock-names = "core-clk", "pclk", "spdif", "grf";</div><div class='add'>+            power-domains = &lt;&amp;power RK3399_PD_HDCP&gt;;</div><div class='add'>+            phys = &lt;&amp;tcphy0_dp&gt;, &lt;&amp;tcphy1_dp&gt;;</div><div class='add'>+            resets = &lt;&amp;cru SRST_DPTX_SPDIF_REC&gt;, &lt;&amp;cru SRST_P_UPHY0_DPTX&gt;,</div><div class='add'>+                    &lt;&amp;cru SRST_P_UPHY0_APB&gt;, &lt;&amp;cru SRST_DP_CORE&gt;;</div><div class='add'>+            reset-names = "spdif", "dptx", "apb", "core";</div><div class='add'>+            rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                dp_in: port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    dp_in_vopb: endpoint@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;vopb_out_dp&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    dp_in_vopl: endpoint@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;vopl_out_dp&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                dp_out: port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml<br/>index b339b7e708c6..8b5f58103dda 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml</a></div><div class='hunk'>@@ -73,12 +73,6 @@ properties:</div><div class='ctx'>   port:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='del'>-  assigned-clocks:</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='del'>-  assigned-clock-rates:</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/sitronix,st7571.yaml b/Documentation/devicetree/bindings/display/sitronix,st7571.yaml<br/>new file mode 100644<br/>index 000000000000..4fea782fccd7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/sitronix,st7571.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/display/sitronix,st7571.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/sitronix,st7571.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sitronix ST7571 Display Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marcus Folkesson &lt;marcus.folkesson@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Sitronix ST7571 is a driver and controller for 4-level gray</div><div class='add'>+  scale and monochrome dot matrix LCD panels.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel/panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sitronix,st7571</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  sitronix,grayscale:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Display supports 4-level grayscale.</div><div class='add'>+</div><div class='add'>+  reset-gpios: true</div><div class='add'>+  width-mm: true</div><div class='add'>+  height-mm: true</div><div class='add'>+  panel-timing: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - width-mm</div><div class='add'>+  - height-mm</div><div class='add'>+  - panel-timing</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      display@3f {</div><div class='add'>+        compatible = "sitronix,st7571";</div><div class='add'>+        reg = &lt;0x3f&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio0 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        width-mm = &lt;37&gt;;</div><div class='add'>+        height-mm = &lt;27&gt;;</div><div class='add'>+</div><div class='add'>+        panel-timing {</div><div class='add'>+          hactive = &lt;128&gt;;</div><div class='add'>+          vactive = &lt;96&gt;;</div><div class='add'>+          hback-porch = &lt;0&gt;;</div><div class='add'>+          vback-porch = &lt;0&gt;;</div><div class='add'>+          clock-frequency = &lt;0&gt;;</div><div class='add'>+          hfront-porch = &lt;0&gt;;</div><div class='add'>+          hsync-len = &lt;0&gt;;</div><div class='add'>+          vfront-porch = &lt;0&gt;;</div><div class='add'>+          vsync-len = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/truly,nt35597.txt b/Documentation/devicetree/bindings/display/truly,nt35597.txt<br/>deleted file mode 100644<br/>index f39c77ee36ea..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/display/truly,nt35597.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/display/truly,nt35597.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-Truly model NT35597 DSI display driver</div><div class='del'>-</div><div class='del'>-The Truly NT35597 is a generic display driver, currently only configured</div><div class='del'>-for use in the 2K display on the Qualcomm SDM845 MTP board.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "truly,nt35597-2K-display"</div><div class='del'>-- vdda-supply: phandle of the regulator that provides the supply voltage</div><div class='del'>-  Power IC supply</div><div class='del'>-- vdispp-supply: phandle of the regulator that provides the supply voltage</div><div class='del'>-  for positive LCD bias</div><div class='del'>-- vdispn-supply: phandle of the regulator that provides the supply voltage</div><div class='del'>-  for negative LCD bias</div><div class='del'>-- reset-gpios: phandle of gpio for reset line</div><div class='del'>-  This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names</div><div class='del'>-  (active low)</div><div class='del'>-- mode-gpios: phandle of the gpio for choosing the mode of the display</div><div class='del'>-  for single DSI or Dual DSI</div><div class='del'>-  This should be low for dual DSI and high for single DSI mode</div><div class='del'>-- ports: This device has two video ports driven by two DSIs. Their connections</div><div class='del'>-  are modeled using the OF graph bindings specified in</div><div class='del'>-  Documentation/devicetree/bindings/graph.txt.</div><div class='del'>-  - port@0: DSI input port driven by master DSI</div><div class='del'>-  - port@1: DSI input port driven by secondary DSI</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	dsi@ae94000 {</div><div class='del'>-		panel@0 {</div><div class='del'>-			compatible = "truly,nt35597-2K-display";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			vdda-supply = &lt;&amp;pm8998_l14&gt;;</div><div class='del'>-			vdispp-supply = &lt;&amp;lab_regulator&gt;;</div><div class='del'>-			vdispn-supply = &lt;&amp;ibb_regulator&gt;;</div><div class='del'>-			pinctrl-names = "default", "suspend";</div><div class='del'>-			pinctrl-0 = &lt;&amp;dpu_dsi_active&gt;;</div><div class='del'>-			pinctrl-1 = &lt;&amp;dpu_dsi_suspend&gt;;</div><div class='del'>-</div><div class='del'>-			reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			mode-gpios = &lt;&amp;tlmm 52 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					panel0_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					panel1_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;dsi1_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml<br/>index 484f8babcda4..c731d5045e80 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/example-schema.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/example-schema.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/example-schema.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/example-schema.yaml</a></div><div class='hunk'>@@ -178,7 +178,9 @@ properties:</div><div class='ctx'>     description: Child nodes are just another property from a json-schema</div><div class='ctx'>       perspective.</div><div class='ctx'>     type: object  # DT nodes are json objects</div><div class='del'>-    # Child nodes also need additionalProperties or unevaluatedProperties</div><div class='add'>+    # Child nodes also need additionalProperties or unevaluatedProperties, where</div><div class='add'>+    # 'false' should be used in most cases (see 'child-node-with-own-schema'</div><div class='add'>+    # below).</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       vendor,a-child-node-property:</div><div class='hunk'>@@ -189,6 +191,17 @@ properties:</div><div class='ctx'>     required:</div><div class='ctx'>       - vendor,a-child-node-property</div><div class='ctx'> </div><div class='add'>+  child-node-with-own-schema:</div><div class='add'>+    description: |</div><div class='add'>+      Child node with their own compatible and device schema which ends in</div><div class='add'>+      'additionalProperties: false' or 'unevaluatedProperties: false' can</div><div class='add'>+      mention only the compatible and use here 'additionalProperties: true'.</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: vendor,sub-device</div><div class='add'>+</div><div class='ctx'> # Describe the relationship between different properties</div><div class='ctx'> dependencies:</div><div class='ctx'>   # 'vendor,bool-property' is only allowed when 'vendor,string-array-property'</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml b/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml<br/>index 3dd70933ed8e..d810043b56b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/atmel,at91rm9200-gpio.yaml</a></div><div class='hunk'>@@ -69,13 +69,13 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'>     gpio@fffff400 {</div><div class='del'>-            compatible = "atmel,at91rm9200-gpio";</div><div class='del'>-            reg = &lt;0xfffff400 0x200&gt;;</div><div class='del'>-            interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH 1&gt;;</div><div class='del'>-            #gpio-cells = &lt;2&gt;;</div><div class='del'>-            gpio-controller;</div><div class='del'>-            interrupt-controller;</div><div class='del'>-            #interrupt-cells = &lt;2&gt;;</div><div class='del'>-            clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 2&gt;;</div><div class='add'>+        compatible = "atmel,at91rm9200-gpio";</div><div class='add'>+        reg = &lt;0xfffff400 0x200&gt;;</div><div class='add'>+        interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH 1&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        clocks = &lt;&amp;pmc PMC_TYPE_PERIPHERAL 2&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml b/Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..a05f6ea619c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/blaize,blzp1600-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Blaize BLZP1600 GPIO controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Blaize BLZP1600 GPIO controller is an implementation of the VeriSilicon</div><div class='add'>+  APB GPIO v0.2 IP block. It has 32 ports each of which are intended to be</div><div class='add'>+  represented as child nodes with the generic GPIO-controller properties</div><div class='add'>+  as described in this binding's file.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nikolaos Pasaloukos &lt;nikolaos.pasaloukos@blaize.com&gt;</div><div class='add'>+  - James Cowgill &lt;james.cowgill@blaize.com&gt;</div><div class='add'>+  - Matt Redfearn &lt;matt.redfearn@blaize.com&gt;</div><div class='add'>+  - Neil Jones &lt;neil.jones@blaize.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^gpio@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - blaize,blzp1600-gpio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  ngpios:</div><div class='add'>+    default: 32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  interrupt-controller: [ interrupts ]</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    gpio: gpio@4c0000 {</div><div class='add'>+      compatible = "blaize,blzp1600-gpio";</div><div class='add'>+      reg = &lt;0x004c0000 0x1000&gt;;</div><div class='add'>+      gpio-controller;</div><div class='add'>+      #gpio-cells = &lt;2&gt;;</div><div class='add'>+      ngpios = &lt;32&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml<br/>index 0e5c22929bde..ab35bcf98101 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml</a></div><div class='hunk'>@@ -71,15 +71,15 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            gpio5: gpio5@0 {</div><div class='del'>-                    compatible = "fairchild,74hc595";</div><div class='del'>-                    reg = &lt;0&gt;;</div><div class='del'>-                    gpio-controller;</div><div class='del'>-                    #gpio-cells = &lt;2&gt;;</div><div class='del'>-                    registers-number = &lt;4&gt;;</div><div class='del'>-                    spi-max-frequency = &lt;100000&gt;;</div><div class='del'>-            };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        gpio5@0 {</div><div class='add'>+            compatible = "fairchild,74hc595";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            registers-number = &lt;4&gt;;</div><div class='add'>+            spi-max-frequency = &lt;100000&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml b/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml<br/>index 8ff54369d16c..b58e08c8ecd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/gpio-mxs.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/gpio-mxs.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/gpio-mxs.yaml</a></div><div class='hunk'>@@ -84,52 +84,52 @@ examples:</div><div class='ctx'>         reg = &lt;0x80018000 0x2000&gt;;</div><div class='ctx'> </div><div class='ctx'>         gpio@0 {</div><div class='del'>-                compatible = "fsl,imx28-gpio";</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-                interrupts = &lt;127&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            compatible = "fsl,imx28-gpio";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            interrupts = &lt;127&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         gpio@1 {</div><div class='del'>-                compatible = "fsl,imx28-gpio";</div><div class='del'>-                reg = &lt;1&gt;;</div><div class='del'>-                interrupts = &lt;126&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            compatible = "fsl,imx28-gpio";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            interrupts = &lt;126&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         gpio@2 {</div><div class='del'>-                compatible = "fsl,imx28-gpio";</div><div class='del'>-                reg = &lt;2&gt;;</div><div class='del'>-                interrupts = &lt;125&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            compatible = "fsl,imx28-gpio";</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            interrupts = &lt;125&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         gpio@3 {</div><div class='del'>-                compatible = "fsl,imx28-gpio";</div><div class='del'>-                reg = &lt;3&gt;;</div><div class='del'>-                interrupts = &lt;124&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            compatible = "fsl,imx28-gpio";</div><div class='add'>+            reg = &lt;3&gt;;</div><div class='add'>+            interrupts = &lt;124&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         gpio@4 {</div><div class='del'>-                compatible = "fsl,imx28-gpio";</div><div class='del'>-                reg = &lt;4&gt;;</div><div class='del'>-                interrupts = &lt;123&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            compatible = "fsl,imx28-gpio";</div><div class='add'>+            reg = &lt;4&gt;;</div><div class='add'>+            interrupts = &lt;123&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml<br/>index 7b1eb08fa055..4d3f52f8d1b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml</a></div><div class='hunk'>@@ -17,6 +17,9 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='add'>+          - const: toradex,ecgpiol16</div><div class='add'>+          - const: nxp,pcal6416</div><div class='add'>+      - items:</div><div class='ctx'>           - const: diodes,pi4ioe5v6534q</div><div class='ctx'>           - const: nxp,pcal6534</div><div class='ctx'>       - items:</div><div class='hunk'>@@ -132,6 +135,7 @@ allOf:</div><div class='ctx'>               - maxim,max7325</div><div class='ctx'>               - maxim,max7326</div><div class='ctx'>               - maxim,max7327</div><div class='add'>+              - toradex,ecgpiol16</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         reset-gpios: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml<br/>index 4fb32e9aec0a..a31f64b6d40b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/gpio-vf610.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/gpio-vf610.yaml</a></div><div class='hunk'>@@ -70,6 +70,13 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='add'>+  gpio-reserved-ranges: true</div><div class='add'>+</div><div class='add'>+  ngpios:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+    default: 32</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.+-hog(-[0-9]+)?$":</div><div class='ctx'>     type: object</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml b/Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..55734190d5eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/maxim,max77759-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/maxim,max77759-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX77759 GPIO</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - André Draszik &lt;andre.draszik@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This module is part of the MAX77759 PMIC. For additional information, see</div><div class='add'>+  Documentation/devicetree/bindings/mfd/maxim,max77759.yaml.</div><div class='add'>+</div><div class='add'>+  The MAX77759 is a PMIC integrating, amongst others, a GPIO controller</div><div class='add'>+  including interrupt support for 2 GPIO lines.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max77759-gpio</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml b/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml<br/>index 4ef06b2ff1ff..065f5761a93f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml</a></div><div class='hunk'>@@ -111,6 +111,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     description: |</div><div class='ctx'>       Indicates how many cells are used in a consumer's GPIO specifier. In the</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml<br/>index 8bca574bb66d..5a6ecaa7b44b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml</a></div><div class='hunk'>@@ -128,17 +128,17 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     i2c {</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            pcf8575: gpio@20 {</div><div class='del'>-                    compatible = "nxp,pcf8575";</div><div class='del'>-                    reg = &lt;0x20&gt;;</div><div class='del'>-                    interrupt-parent = &lt;&amp;irqpin2&gt;;</div><div class='del'>-                    interrupts = &lt;3 0&gt;;</div><div class='del'>-                    gpio-controller;</div><div class='del'>-                    #gpio-cells = &lt;2&gt;;</div><div class='del'>-                    interrupt-controller;</div><div class='del'>-                    #interrupt-cells = &lt;2&gt;;</div><div class='del'>-            };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        gpio@20 {</div><div class='add'>+            compatible = "nxp,pcf8575";</div><div class='add'>+            reg = &lt;0x20&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;irqpin2&gt;;</div><div class='add'>+            interrupts = &lt;3 0&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml b/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml<br/>index 39fd959c45d2..728099c65824 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml</a></div><div class='hunk'>@@ -81,7 +81,7 @@ dependencies:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      gpio@3500 {</div><div class='add'>+    gpio@3500 {</div><div class='ctx'>         compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";</div><div class='ctx'>         reg = &lt;0x3500 0x1c&gt;;</div><div class='ctx'>         gpio-controller;</div><div class='hunk'>@@ -91,9 +91,9 @@ examples:</div><div class='ctx'>         #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>         interrupt-parent = &lt;&amp;rtlintc&gt;;</div><div class='ctx'>         interrupts = &lt;23&gt;;</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='ctx'>   - |</div><div class='del'>-      gpio@3300 {</div><div class='add'>+    gpio@3300 {</div><div class='ctx'>         compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";</div><div class='ctx'>         reg = &lt;0x3300 0x1c&gt;, &lt;0x3338 0x8&gt;;</div><div class='ctx'>         gpio-controller;</div><div class='hunk'>@@ -103,6 +103,6 @@ examples:</div><div class='ctx'>         #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>         interrupt-parent = &lt;&amp;rtlintc&gt;;</div><div class='ctx'>         interrupts = &lt;13&gt;;</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml b/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml<br/>index 8bdef812c87c..49fb8f613ead 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/renesas,em-gio.yaml</a></div><div class='hunk'>@@ -57,14 +57,14 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     gpio0: gpio@e0050000 {</div><div class='del'>-            compatible = "renesas,em-gio";</div><div class='del'>-            reg = &lt;0xe0050000 0x2c&gt;, &lt;0xe0050040 0x20&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            gpio-controller;</div><div class='del'>-            #gpio-cells = &lt;2&gt;;</div><div class='del'>-            gpio-ranges = &lt;&amp;pfc 0 0 32&gt;;</div><div class='del'>-            ngpios = &lt;32&gt;;</div><div class='del'>-            interrupt-controller;</div><div class='del'>-            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        compatible = "renesas,em-gio";</div><div class='add'>+        reg = &lt;0xe0050000 0x2c&gt;, &lt;0xe0050040 0x20&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;pfc 0 0 32&gt;;</div><div class='add'>+        ngpios = &lt;32&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml<br/>index cc7a950a6030..d32e103a64aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml</a></div><div class='hunk'>@@ -138,16 +138,16 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/r8a77470-sysc.h&gt;</div><div class='ctx'>     gpio3: gpio@e6053000 {</div><div class='del'>-            compatible = "renesas,gpio-r8a77470", "renesas,rcar-gen2-gpio";</div><div class='del'>-            reg = &lt;0xe6053000 0x50&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD 909&gt;;</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A77470_PD_ALWAYS_ON&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg 909&gt;;</div><div class='del'>-            gpio-controller;</div><div class='del'>-            #gpio-cells = &lt;2&gt;;</div><div class='del'>-            gpio-ranges = &lt;&amp;pfc 0 96 30&gt;;</div><div class='del'>-            gpio-reserved-ranges = &lt;17 10&gt;;</div><div class='del'>-            interrupt-controller;</div><div class='del'>-            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        compatible = "renesas,gpio-r8a77470", "renesas,rcar-gen2-gpio";</div><div class='add'>+        reg = &lt;0xe6053000 0x50&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 909&gt;;</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A77470_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 909&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;pfc 0 96 30&gt;;</div><div class='add'>+        gpio-reserved-ranges = &lt;17 10&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>      };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml<br/>index fc095646adea..4bdc201b719e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/sifive,gpio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/sifive,gpio.yaml</a></div><div class='hunk'>@@ -76,8 +76,8 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      #include &lt;dt-bindings/clock/sifive-fu540-prci.h&gt;</div><div class='del'>-      gpio@10060000 {</div><div class='add'>+    #include &lt;dt-bindings/clock/sifive-fu540-prci.h&gt;</div><div class='add'>+    gpio@10060000 {</div><div class='ctx'>         compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";</div><div class='ctx'>         interrupt-parent = &lt;&amp;plic&gt;;</div><div class='ctx'>         interrupts = &lt;7&gt;, &lt;8&gt;, &lt;9&gt;, &lt;10&gt;, &lt;11&gt;, &lt;12&gt;, &lt;13&gt;, &lt;14&gt;, &lt;15&gt;, &lt;16&gt;,</div><div class='hunk'>@@ -88,6 +88,6 @@ examples:</div><div class='ctx'>         #gpio-cells = &lt;2&gt;;</div><div class='ctx'>         interrupt-controller;</div><div class='ctx'>         #interrupt-cells = &lt;2&gt;;</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml b/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..ec0232e72c71<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/spacemit,k1-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SpacemiT K1 GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yixun Lan &lt;dlan@gentoo.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The controller's registers are organized as sets of eight 32-bit</div><div class='add'>+  registers with each set of port controlling 32 pins.  A single</div><div class='add'>+  interrupt line is shared for all of the pins by the controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^gpio@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    const: spacemit,k1-gpio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: GPIO Core Clock</div><div class='add'>+      - description: GPIO Bus Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: bus</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 3</div><div class='add'>+    description:</div><div class='add'>+      The first two cells are the GPIO bank index and offset inside the bank,</div><div class='add'>+      the third cell should specify GPIO flag.</div><div class='add'>+</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 3</div><div class='add'>+    description:</div><div class='add'>+      The first two cells are the GPIO bank index and offset inside the bank,</div><div class='add'>+      the third cell should specify interrupt flag. The controller does not</div><div class='add'>+      support level interrupts, so flags of IRQ_TYPE_LEVEL_HIGH,</div><div class='add'>+      IRQ_TYPE_LEVEL_LOW should not be used.</div><div class='add'>+      Refer &lt;dt-bindings/interrupt-controller/irq.h&gt; for valid flags.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gpio@d4019000 {</div><div class='add'>+      compatible = "spacemit,k1-gpio";</div><div class='add'>+      reg = &lt;0xd4019000 0x800&gt;;</div><div class='add'>+      clocks =&lt;&amp;ccu 9&gt;, &lt;&amp;ccu 61&gt;;</div><div class='add'>+      clock-names = "core", "bus";</div><div class='add'>+      gpio-controller;</div><div class='add'>+      #gpio-cells = &lt;3&gt;;</div><div class='add'>+      interrupts = &lt;58&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+      #interrupt-cells = &lt;3&gt;;</div><div class='add'>+      gpio-ranges = &lt;&amp;pinctrl 0 0 0 32&gt;,</div><div class='add'>+                    &lt;&amp;pinctrl 1 0 32 32&gt;,</div><div class='add'>+                    &lt;&amp;pinctrl 2 0 64 32&gt;,</div><div class='add'>+                    &lt;&amp;pinctrl 3 0 96 32&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml b/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml<br/>index b085450b527f..712063417bc8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/toshiba,gpio-visconti.yaml</a></div><div class='hunk'>@@ -48,22 +48,22 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-      #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='del'>-      soc {</div><div class='add'>+    soc {</div><div class='ctx'>         #address-cells = &lt;2&gt;;</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>         gpio: gpio@28020000 {</div><div class='del'>-          compatible = "toshiba,gpio-tmpv7708";</div><div class='del'>-          reg = &lt;0 0x28020000 0 0x1000&gt;;</div><div class='del'>-          #gpio-cells = &lt;0x2&gt;;</div><div class='del'>-          gpio-ranges = &lt;&amp;pmux 0 0 32&gt;;</div><div class='del'>-          gpio-controller;</div><div class='del'>-          interrupt-controller;</div><div class='del'>-          #interrupt-cells = &lt;2&gt;;</div><div class='del'>-          interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+            compatible = "toshiba,gpio-tmpv7708";</div><div class='add'>+            reg = &lt;0 0x28020000 0 0x1000&gt;;</div><div class='add'>+            #gpio-cells = &lt;0x2&gt;;</div><div class='add'>+            gpio-ranges = &lt;&amp;pmux 0 0 32&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml b/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml<br/>index d3d8a2e143ed..8fbf12ca067e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml</a></div><div class='hunk'>@@ -126,29 +126,29 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='del'>-        gpio@a0020000 {</div><div class='del'>-            compatible = "xlnx,xps-gpio-1.00.a";</div><div class='del'>-            reg = &lt;0xa0020000 0x10000&gt;;</div><div class='del'>-            #gpio-cells = &lt;2&gt;;</div><div class='del'>-            #interrupt-cells = &lt;0x2&gt;;</div><div class='del'>-            clocks = &lt;&amp;zynqmp_clk 71&gt;;</div><div class='del'>-            gpio-controller;</div><div class='del'>-            interrupt-controller;</div><div class='del'>-            interrupt-names = "ip2intc_irpt";</div><div class='del'>-            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-            interrupts = &lt;0 89 4&gt;;</div><div class='del'>-            xlnx,all-inputs = &lt;0x0&gt;;</div><div class='del'>-            xlnx,all-inputs-2 = &lt;0x0&gt;;</div><div class='del'>-            xlnx,all-outputs = &lt;0x0&gt;;</div><div class='del'>-            xlnx,all-outputs-2 = &lt;0x0&gt;;</div><div class='del'>-            xlnx,dout-default = &lt;0x0&gt;;</div><div class='del'>-            xlnx,dout-default-2 = &lt;0x0&gt;;</div><div class='del'>-            xlnx,gpio-width = &lt;0x20&gt;;</div><div class='del'>-            xlnx,gpio2-width = &lt;0x20&gt;;</div><div class='del'>-            xlnx,interrupt-present = &lt;0x1&gt;;</div><div class='del'>-            xlnx,is-dual = &lt;0x1&gt;;</div><div class='del'>-            xlnx,tri-default = &lt;0xFFFFFFFF&gt;;</div><div class='del'>-            xlnx,tri-default-2 = &lt;0xFFFFFFFF&gt;;</div><div class='del'>-        };</div><div class='add'>+    gpio@a0020000 {</div><div class='add'>+        compatible = "xlnx,xps-gpio-1.00.a";</div><div class='add'>+        reg = &lt;0xa0020000 0x10000&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        #interrupt-cells = &lt;0x2&gt;;</div><div class='add'>+        clocks = &lt;&amp;zynqmp_clk 71&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        interrupt-names = "ip2intc_irpt";</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        interrupts = &lt;0 89 4&gt;;</div><div class='add'>+        xlnx,all-inputs = &lt;0x0&gt;;</div><div class='add'>+        xlnx,all-inputs-2 = &lt;0x0&gt;;</div><div class='add'>+        xlnx,all-outputs = &lt;0x0&gt;;</div><div class='add'>+        xlnx,all-outputs-2 = &lt;0x0&gt;;</div><div class='add'>+        xlnx,dout-default = &lt;0x0&gt;;</div><div class='add'>+        xlnx,dout-default-2 = &lt;0x0&gt;;</div><div class='add'>+        xlnx,gpio-width = &lt;0x20&gt;;</div><div class='add'>+        xlnx,gpio2-width = &lt;0x20&gt;;</div><div class='add'>+        xlnx,interrupt-present = &lt;0x1&gt;;</div><div class='add'>+        xlnx,is-dual = &lt;0x1&gt;;</div><div class='add'>+        xlnx,tri-default = &lt;0xFFFFFFFF&gt;;</div><div class='add'>+        xlnx,tri-default-2 = &lt;0xFFFFFFFF&gt;;</div><div class='add'>+    };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml b/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml<br/>index bb93baa88879..e13e9d6dd148 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml</a></div><div class='hunk'>@@ -12,7 +12,6 @@ description:</div><div class='ctx'>   PS_MODE). Every pin can be configured as input/output.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;</div><div class='ctx'>   - Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml<br/>index 019bd28a29f1..b8d659d272d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml</a></div><div class='hunk'>@@ -25,6 +25,8 @@ properties:</div><div class='ctx'>               - realtek,rtd1619-mali</div><div class='ctx'>               - renesas,r9a07g044-mali</div><div class='ctx'>               - renesas,r9a07g054-mali</div><div class='add'>+              - renesas,r9a09g047-mali</div><div class='add'>+              - renesas,r9a09g056-mali</div><div class='ctx'>               - renesas,r9a09g057-mali</div><div class='ctx'>               - rockchip,px30-mali</div><div class='ctx'>               - rockchip,rk3562-mali</div><div class='hunk'>@@ -145,6 +147,8 @@ allOf:</div><div class='ctx'>             enum:</div><div class='ctx'>               - renesas,r9a07g044-mali</div><div class='ctx'>               - renesas,r9a07g054-mali</div><div class='add'>+              - renesas,r9a09g047-mali</div><div class='add'>+              - renesas,r9a09g056-mali</div><div class='ctx'>               - renesas,r9a09g057-mali</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml<br/>index dc078ceeca9a..43c6d2d72456 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Broadcom V3D GPU</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Eric Anholt &lt;eric@anholt.net&gt;</div><div class='add'>+  - Maíra Canal &lt;mcanal@igalia.com&gt;</div><div class='ctx'>   - Nicolas Saenz Julienne &lt;nsaenzjulienne@suse.de&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -22,20 +22,12 @@ properties:</div><div class='ctx'>       - brcm,7278-v3d</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    items:</div><div class='del'>-      - description: hub register (required)</div><div class='del'>-      - description: core0 register (required)</div><div class='del'>-      - description: GCA cache controller register (if GCA controller present)</div><div class='del'>-      - description: bridge register (if no external reset controller)</div><div class='ctx'>     minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: hub</div><div class='del'>-      - const: core0</div><div class='del'>-      - enum: [ bridge, gca ]</div><div class='del'>-      - enum: [ bridge, gca ]</div><div class='ctx'>     minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -58,6 +50,76 @@ required:</div><div class='ctx'>   - reg-names</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: brcm,2711-v3d</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: hub register</div><div class='add'>+            - description: core0 register</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hub</div><div class='add'>+            - const: core0</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: brcm,2712-v3d</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: hub register</div><div class='add'>+            - description: core0 register</div><div class='add'>+            - description: SMS state manager register</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hub</div><div class='add'>+            - const: core0</div><div class='add'>+            - const: sms</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: brcm,7268-v3d</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: hub register</div><div class='add'>+            - description: core0 register</div><div class='add'>+            - description: GCA cache controller register</div><div class='add'>+            - description: bridge register</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hub</div><div class='add'>+            - const: core0</div><div class='add'>+            - const: gca</div><div class='add'>+            - const: bridge</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: brcm,7278-v3d</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: hub register</div><div class='add'>+            - description: core0 register</div><div class='add'>+            - description: bridge register</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hub</div><div class='add'>+            - const: core0</div><div class='add'>+            - const: bridge</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -66,9 +128,9 @@ examples:</div><div class='ctx'>       compatible = "brcm,7268-v3d";</div><div class='ctx'>       reg = &lt;0xf1200000 0x4000&gt;,</div><div class='ctx'>             &lt;0xf1208000 0x4000&gt;,</div><div class='del'>-            &lt;0xf1204000 0x100&gt;,</div><div class='del'>-            &lt;0xf1204100 0x100&gt;;</div><div class='del'>-      reg-names = "hub", "core0", "bridge", "gca";</div><div class='add'>+            &lt;0xf1204100 0x100&gt;,</div><div class='add'>+            &lt;0xf1204000 0x100&gt;;</div><div class='add'>+      reg-names = "hub", "core0", "gca", "bridge";</div><div class='ctx'>       interrupts = &lt;0 78 4&gt;,</div><div class='ctx'>                    &lt;0 77 4&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml<br/>index 256e252f8087..4450e2e73b3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml</a></div><div class='hunk'>@@ -12,10 +12,28 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - ti,am62-gpu</div><div class='del'>-      - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,am62-gpu</div><div class='add'>+          - const: img,img-axe-1-16m</div><div class='add'>+          # This deprecated element must be kept around to allow old kernels to</div><div class='add'>+          # work with newer dts.</div><div class='add'>+          - const: img,img-axe</div><div class='add'>+          - const: img,img-rogue</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,j721s2-gpu</div><div class='add'>+          - const: img,img-bxs-4-64</div><div class='add'>+          - const: img,img-rogue</div><div class='add'>+</div><div class='add'>+      # This legacy combination of compatible strings was introduced early on</div><div class='add'>+      # before the more specific GPU identifiers were used.</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,am62-gpu</div><div class='add'>+          - const: img,img-axe</div><div class='add'>+        deprecated: true</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -35,6 +53,18 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: a</div><div class='add'>+      - const: b</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -47,11 +77,49 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  # Constraints added alongside the new compatible strings that would otherwise</div><div class='add'>+  # create an ABI break.</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: img,img-rogue</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+        - power-domain-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: img,img-axe-1-16m</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        power-domain-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: img,img-bxs-4-64</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 2</div><div class='add'>+        power-domain-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: ti,am62-gpu</div><div class='add'>+            enum:</div><div class='add'>+              - ti,am62-gpu</div><div class='add'>+              - ti,j721s2-gpu</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='hunk'>@@ -64,10 +132,12 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='ctx'> </div><div class='ctx'>     gpu@fd00000 {</div><div class='del'>-        compatible = "ti,am62-gpu", "img,img-axe";</div><div class='add'>+        compatible = "ti,am62-gpu", "img,img-axe-1-16m", "img,img-axe",</div><div class='add'>+                     "img,img-rogue";</div><div class='ctx'>         reg = &lt;0x0fd00000 0x20000&gt;;</div><div class='ctx'>         clocks = &lt;&amp;k3_clks 187 0&gt;;</div><div class='ctx'>         clock-names = "core";</div><div class='ctx'>         interrupts = &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>         power-domains = &lt;&amp;k3_pds 187 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+        power-domain-names = "a";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml b/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml<br/>index 517a4ac1bea3..e365413732e7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Mediatek's Keypad Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;</div><div class='add'>+  - Mattijs Korpershoek &lt;mkorpershoek@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/input/matrix-keymap.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt<br/>deleted file mode 100644<br/>index 5a4dd263fc12..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,37 +0,0 @@</div><div class='del'>-TB10x Top Level Interrupt Controller</div><div class='del'>-====================================</div><div class='del'>-</div><div class='del'>-The Abilis TB10x SOC contains a custom interrupt controller. It performs</div><div class='del'>-one-to-one mapping of external interrupt sources to CPU interrupts and</div><div class='del'>-provides support for reconfigurable trigger modes.</div><div class='del'>-</div><div class='del'>-Required properties</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-- compatible: Should be "abilis,tb10x-ictl"</div><div class='del'>-- reg: specifies physical base address and size of register range.</div><div class='del'>-- interrupt-congroller: Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt cells: Specifies the number of cells used to encode an interrupt</div><div class='del'>-  source connected to this controller. The value shall be 2.</div><div class='del'>-- interrupts: Specifies the list of interrupt lines which are handled by</div><div class='del'>-  the interrupt controller in the parent controller's notation. Interrupts</div><div class='del'>-  are mapped one-to-one to parent interrupts.</div><div class='del'>-</div><div class='del'>-Example</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-intc: interrupt-controller {	/* Parent interrupt controller */</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;	/* For example below */</div><div class='del'>-	/* ... */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-tb10x_ictl: pic@2000 {		/* TB10x interrupt controller */</div><div class='del'>-	compatible = "abilis,tb10x-ictl";</div><div class='del'>-	reg = &lt;0x2000 0x20&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	interrupts = &lt;5 6 7 8 9 10 11 12 13 14 15 16 17 18 19</div><div class='del'>-			20 21 22 23 24 25 26 27 28 29 30 31&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml<br/>new file mode 100644<br/>index 000000000000..cd2c49670e7b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/abilis,tb10x-ictl.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/abilis,tb10x-ictl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TB10x Top Level Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christian Ruppert &lt;christian.ruppert@abilis.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Abilis TB10x SOC contains a custom interrupt controller. It performs</div><div class='add'>+  one-to-one mapping of external interrupt sources to CPU interrupts and</div><div class='add'>+  provides support for reconfigurable trigger modes.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: abilis,tb10x-ictl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: A one-to-one mapping of external interrupt sources to parent</div><div class='add'>+      interrupts.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@2000 {</div><div class='add'>+        compatible = "abilis,tb10x-ictl";</div><div class='add'>+        reg = &lt;0x2000 0x20&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;5&gt;, &lt;6&gt;, &lt;7&gt;, &lt;8&gt;, &lt;9&gt;, &lt;10&gt;, &lt;11&gt;, &lt;12&gt;, &lt;13&gt;, &lt;14&gt;,</div><div class='add'>+                     &lt;15&gt;, &lt;16&gt;, &lt;17&gt;, &lt;18&gt;, &lt;19&gt;, &lt;20&gt;, &lt;21&gt;, &lt;22&gt;, &lt;23&gt;,</div><div class='add'>+                     &lt;24&gt;, &lt;25&gt;, &lt;26&gt;, &lt;27&gt;, &lt;28&gt;, &lt;29&gt;, &lt;30&gt;, &lt;31&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt b/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt<br/>deleted file mode 100644<br/>index 5669764f9cc9..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-Alpine MSIX controller</div><div class='del'>-</div><div class='del'>-See arm,gic-v3.txt for SPI and MSI definitions.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "al,alpine-msix"</div><div class='del'>-- reg: physical base address and size of the registers</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- msi-controller: identifies the node as an PCI Message Signaled Interrupt</div><div class='del'>-		  controller</div><div class='del'>-- al,msi-base-spi: SPI base of the MSI frame</div><div class='del'>-- al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-msix: msix {</div><div class='del'>-	compatible = "al,alpine-msix";</div><div class='del'>-	reg = &lt;0x0 0xfbe00000 0x0 0x100000&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	msi-controller;</div><div class='del'>-	al,msi-base-spi = &lt;160&gt;;</div><div class='del'>-	al,msi-num-spis = &lt;160&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml b/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml<br/>new file mode 100644<br/>index 000000000000..9f1ff8ec686f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/al,alpine-msix.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/al,alpine-msix.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Alpine MSIX controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Antoine Tenart &lt;atenart@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: al,alpine-msix</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-parent: true</div><div class='add'>+</div><div class='add'>+  msi-controller: true</div><div class='add'>+</div><div class='add'>+  al,msi-base-spi:</div><div class='add'>+    description: SPI base of the MSI frame</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  al,msi-num-spis:</div><div class='add'>+    description: number of SPIs assigned to the MSI frame, relative to SPI0</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - msi-controller</div><div class='add'>+  - al,msi-base-spi</div><div class='add'>+  - al,msi-num-spis</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    msi-controller@fbe00000 {</div><div class='add'>+        compatible = "al,alpine-msix";</div><div class='add'>+        reg = &lt;0xfbe00000 0x100000&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        msi-controller;</div><div class='add'>+        al,msi-base-spi = &lt;160&gt;;</div><div class='add'>+        al,msi-num-spis = &lt;160&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml<br/>index 98814862d006..d046954b8a27 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pci/altr,msi-controller.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pci/altr,msi-controller.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Copyright (C) 2015, 2024, Intel Corporation</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/altr,msi-controller.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/altr,msi-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Altera PCIe MSI controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt b/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt<br/>deleted file mode 100644<br/>index c676b03c752e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-Amazon's Annapurna Labs Fabric Interrupt Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "amazon,al-fic"</div><div class='del'>-- reg: physical base address and size of the registers</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : must be 2. Specifies the number of cells needed to encode</div><div class='del'>-  an interrupt source. Supported trigger types are low-to-high edge</div><div class='del'>-  triggered and active high level-sensitive.</div><div class='del'>-- interrupts: describes which input line in the interrupt parent, this</div><div class='del'>-  fic's output is connected to. This field property depends on the parent's</div><div class='del'>-  binding</div><div class='del'>-</div><div class='del'>-Please refer to interrupts.txt in this directory for details of the common</div><div class='del'>-Interrupt Controllers bindings used by client devices.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-amazon_fic: interrupt-controller@fd8a8500 {</div><div class='del'>-	compatible = "amazon,al-fic";</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	reg = &lt;0x0 0xfd8a8500 0x0 0x1000&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 0x0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml b/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml<br/>new file mode 100644<br/>index 000000000000..26bc05dee0bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/amazon,al-fic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amazon Annapurna Labs Fabric Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Talel Shenhar &lt;talel@amazon.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amazon,al-fic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    interrupt-controller@fd8a8500 {</div><div class='add'>+        compatible = "amazon,al-fic";</div><div class='add'>+        reg = &lt;0xfd8a8500 0x1000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 0x0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt<br/>deleted file mode 100644<br/>index 386ab37a383f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/arm,nvic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-* ARM Nested Vector Interrupt Controller (NVIC)</div><div class='del'>-</div><div class='del'>-The NVIC provides an interrupt controller that is tightly coupled to</div><div class='del'>-Cortex-M based processor cores.  The NVIC implemented on different SoCs</div><div class='del'>-vary in the number of interrupts and priority bits per interrupt.</div><div class='del'>-</div><div class='del'>-Main node required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be one of:</div><div class='del'>-	"arm,v6m-nvic"</div><div class='del'>-	"arm,v7m-nvic"</div><div class='del'>-	"arm,v8m-nvic"</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source.  The type shall be a &lt;u32&gt; and the value shall be 2.</div><div class='del'>-</div><div class='del'>-  The 1st cell contains the interrupt number for the interrupt type.</div><div class='del'>-</div><div class='del'>-  The 2nd cell is the priority of the interrupt.</div><div class='del'>-</div><div class='del'>-- reg : Specifies base physical address(s) and size of the NVIC registers.</div><div class='del'>-  This is at a fixed address (0xe000e100) and size (0xc00).</div><div class='del'>-</div><div class='del'>-- arm,num-irq-priority-bits: The number of priority bits implemented by the</div><div class='del'>-  given SoC</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@e000e100 {</div><div class='del'>-		compatible = "arm,v7m-nvic";</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		reg = &lt;0xe000e100 0xc00&gt;;</div><div class='del'>-		arm,num-irq-priority-bits = &lt;4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml<br/>new file mode 100644<br/>index 000000000000..d89eca956c5f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/arm,nvic.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/arm,nvic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Nested Vector Interrupt Controller (NVIC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Herring &lt;robh@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The NVIC provides an interrupt controller that is tightly coupled to Cortex-M</div><div class='add'>+  based processor cores.  The NVIC implemented on different SoCs vary in the</div><div class='add'>+  number of interrupts and priority bits per interrupt.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - arm,v6m-nvic</div><div class='add'>+      - arm,v7m-nvic</div><div class='add'>+      - arm,v8m-nvic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+    description: |</div><div class='add'>+      Number of cells to encode an interrupt source:</div><div class='add'>+      first = interrupt number, second = priority.</div><div class='add'>+</div><div class='add'>+  arm,num-irq-priority-bits:</div><div class='add'>+    description: Number of priority bits implemented by the SoC</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 8</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - arm,num-irq-priority-bits</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@e000e100 {</div><div class='add'>+        compatible = "arm,v7m-nvic";</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        #address-cells = &lt;0&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        reg = &lt;0xe000e100 0xc00&gt;;</div><div class='add'>+        arm,num-irq-priority-bits = &lt;4&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt<br/>deleted file mode 100644<br/>index ea939f54c5eb..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,38 +0,0 @@</div><div class='del'>-* ARM Versatile FPGA interrupt controller</div><div class='del'>-</div><div class='del'>-One or more FPGA IRQ controllers can be synthesized in an ARM reference board</div><div class='del'>-such as the Integrator or Versatile family. The output of these different</div><div class='del'>-controllers are OR:ed together and fed to the CPU tile's IRQ input. Each</div><div class='del'>-instance can handle up to 32 interrupts.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "arm,versatile-fpga-irq"</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells: The number of cells to define the interrupts.  Must be 1</div><div class='del'>-  as the FPGA IRQ controller has no configuration options for interrupt</div><div class='del'>-  sources.  The cell is a u32 and defines the interrupt number.</div><div class='del'>-- reg: The register bank for the FPGA interrupt controller.</div><div class='del'>-- clear-mask: a u32 number representing the mask written to clear all IRQs</div><div class='del'>-  on the controller at boot for example.</div><div class='del'>-- valid-mask: a u32 number representing a bit mask determining which of</div><div class='del'>-  the interrupts are valid. Unconnected/unused lines are set to 0, and</div><div class='del'>-  the system till not make it possible for devices to request these</div><div class='del'>-  interrupts.</div><div class='del'>-</div><div class='del'>-The "oxsemi,ox810se-rps-irq" compatible is deprecated.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-pic: pic@14000000 {</div><div class='del'>-        compatible = "arm,versatile-fpga-irq";</div><div class='del'>-        #interrupt-cells = &lt;1&gt;;</div><div class='del'>-        interrupt-controller;</div><div class='del'>-        reg = &lt;0x14000000 0x100&gt;;</div><div class='del'>-        clear-mask = &lt;0xffffffff&gt;;</div><div class='del'>-        valid-mask = &lt;0x003fffff&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ</div><div class='del'>-  output is simply connected to the input of another IRQ controller,</div><div class='del'>-  then the parent IRQ shall be specified in this property.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml<br/>new file mode 100644<br/>index 000000000000..8d581b3aac3a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/arm,versatile-fpga-irq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Versatile FPGA IRQ Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  One or more FPGA IRQ controllers can be synthesized in an ARM reference board</div><div class='add'>+  such as the Integrator or Versatile family. The output of these different</div><div class='add'>+  controllers are OR:ed together and fed to the CPU tile's IRQ input. Each</div><div class='add'>+  instance can handle up to 32 interrupts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,versatile-fpga-irq</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clear-mask:</div><div class='add'>+    description: A mask written to clear all IRQs on the controller at boot.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  valid-mask:</div><div class='add'>+    description:</div><div class='add'>+      A bit mask determining which interrupts are valid; unused lines are set to 0.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - reg</div><div class='add'>+  - clear-mask</div><div class='add'>+  - valid-mask</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@14000000 {</div><div class='add'>+        compatible = "arm,versatile-fpga-irq";</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        reg = &lt;0x14000000 0x100&gt;;</div><div class='add'>+        clear-mask = &lt;0xffffffff&gt;;</div><div class='add'>+        valid-mask = &lt;0x003fffff&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt<br/>deleted file mode 100644<br/>index 033cc82e5684..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-Device tree configuration for the I2C Interrupt Controller on the AST24XX and</div><div class='del'>-AST25XX SoCs.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- #address-cells	: should be 1</div><div class='del'>-- #size-cells 		: should be 1</div><div class='del'>-- #interrupt-cells 	: should be 1</div><div class='del'>-- compatible 		: should be "aspeed,ast2400-i2c-ic"</div><div class='del'>-			  or "aspeed,ast2500-i2c-ic"</div><div class='del'>-- reg			: address start and range of controller</div><div class='del'>-- interrupts		: interrupt number</div><div class='del'>-- interrupt-controller	: denotes that the controller receives and fires</div><div class='del'>-			  new interrupts for child busses</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-i2c_ic: interrupt-controller@0 {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;1&gt;;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	compatible = "aspeed,ast2400-i2c-ic";</div><div class='del'>-	reg = &lt;0x0 0x40&gt;;</div><div class='del'>-	interrupts = &lt;12&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml<br/>new file mode 100644<br/>index 000000000000..6cff6a7231bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2400-i2c-ic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Aspeed I2C Interrupt Controller (AST24XX/AST25XX)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - aspeed,ast2400-i2c-ic</div><div class='add'>+      - aspeed,ast2500-i2c-ic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@0 {</div><div class='add'>+        compatible = "aspeed,ast2400-i2c-ic";</div><div class='add'>+        reg = &lt;0x0 0x40&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupts = &lt;12&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml<br/>new file mode 100644<br/>index 000000000000..d5287a2bf866<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2025 Eddie James</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/aspeed,ast2500-scu-ic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Aspeed AST25XX and AST26XX SCU Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Eddie James &lt;eajames@linux.ibm.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - aspeed,ast2500-scu-ic</div><div class='add'>+      - aspeed,ast2600-scu-ic0</div><div class='add'>+      - aspeed,ast2600-scu-ic1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@18 {</div><div class='add'>+        compatible = "aspeed,ast2500-scu-ic";</div><div class='add'>+        reg = &lt;0x18 0x4&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupts = &lt;21&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt<br/>deleted file mode 100644<br/>index 251ed44171db..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-Aspeed AST25XX and AST26XX SCU Interrupt Controller</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>- - #interrupt-cells		: must be 1</div><div class='del'>- - compatible			: must be "aspeed,ast2500-scu-ic",</div><div class='del'>-				  "aspeed,ast2600-scu-ic0" or</div><div class='del'>-				  "aspeed,ast2600-scu-ic1"</div><div class='del'>- - interrupts			: interrupt from the parent controller</div><div class='del'>- - interrupt-controller		: indicates that the controller receives and</div><div class='del'>-				  fires new interrupts for child busses</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-    syscon@1e6e2000 {</div><div class='del'>-        ranges = &lt;0 0x1e6e2000 0x1a8&gt;;</div><div class='del'>-</div><div class='del'>-        scu_ic: interrupt-controller@18 {</div><div class='del'>-            #interrupt-cells = &lt;1&gt;;</div><div class='del'>-            compatible = "aspeed,ast2500-scu-ic";</div><div class='del'>-            interrupts = &lt;21&gt;;</div><div class='del'>-            interrupt-controller;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt<br/>deleted file mode 100644<br/>index bdd173056f72..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,131 +0,0 @@</div><div class='del'>-BCM2835 Top-Level ("ARMCTRL") Interrupt Controller</div><div class='del'>-</div><div class='del'>-The BCM2835 contains a custom top-level interrupt controller, which supports</div><div class='del'>-72 interrupt sources using a 2-level register scheme. The interrupt</div><div class='del'>-controller, or the HW block containing it, is referred to occasionally</div><div class='del'>-as "armctrl" in the SoC documentation, hence naming of this binding.</div><div class='del'>-</div><div class='del'>-The BCM2836 contains the same interrupt controller with the same</div><div class='del'>-interrupts, but the per-CPU interrupt controller is the root, and an</div><div class='del'>-interrupt there indicates that the ARMCTRL has an interrupt to handle.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "brcm,bcm2835-armctrl-ic" or</div><div class='del'>-                 "brcm,bcm2836-armctrl-ic"</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 2.</div><div class='del'>-</div><div class='del'>-  The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic</div><div class='del'>-  pending" register, or 1/2 respectively for interrupts in the "IRQ pending</div><div class='del'>-  1/2" register.</div><div class='del'>-</div><div class='del'>-  The 2nd cell contains the interrupt number within the bank. Valid values</div><div class='del'>-  are 0..7 for bank 0, and 0..31 for bank 1.</div><div class='del'>-</div><div class='del'>-Additional required properties for brcm,bcm2836-armctrl-ic:</div><div class='del'>-- interrupts : Specifies the interrupt on the parent for this interrupt</div><div class='del'>-  controller to handle.</div><div class='del'>-</div><div class='del'>-The interrupt sources are as follows:</div><div class='del'>-</div><div class='del'>-Bank 0:</div><div class='del'>-0: ARM_TIMER</div><div class='del'>-1: ARM_MAILBOX</div><div class='del'>-2: ARM_DOORBELL_0</div><div class='del'>-3: ARM_DOORBELL_1</div><div class='del'>-4: VPU0_HALTED</div><div class='del'>-5: VPU1_HALTED</div><div class='del'>-6: ILLEGAL_TYPE0</div><div class='del'>-7: ILLEGAL_TYPE1</div><div class='del'>-</div><div class='del'>-Bank 1:</div><div class='del'>-0: TIMER0</div><div class='del'>-1: TIMER1</div><div class='del'>-2: TIMER2</div><div class='del'>-3: TIMER3</div><div class='del'>-4: CODEC0</div><div class='del'>-5: CODEC1</div><div class='del'>-6: CODEC2</div><div class='del'>-7: VC_JPEG</div><div class='del'>-8: ISP</div><div class='del'>-9: VC_USB</div><div class='del'>-10: VC_3D</div><div class='del'>-11: TRANSPOSER</div><div class='del'>-12: MULTICORESYNC0</div><div class='del'>-13: MULTICORESYNC1</div><div class='del'>-14: MULTICORESYNC2</div><div class='del'>-15: MULTICORESYNC3</div><div class='del'>-16: DMA0</div><div class='del'>-17: DMA1</div><div class='del'>-18: VC_DMA2</div><div class='del'>-19: VC_DMA3</div><div class='del'>-20: DMA4</div><div class='del'>-21: DMA5</div><div class='del'>-22: DMA6</div><div class='del'>-23: DMA7</div><div class='del'>-24: DMA8</div><div class='del'>-25: DMA9</div><div class='del'>-26: DMA10</div><div class='del'>-27: DMA11-14 - shared interrupt for DMA 11 to 14</div><div class='del'>-28: DMAALL - triggers on all dma interrupts (including channel 15)</div><div class='del'>-29: AUX</div><div class='del'>-30: ARM</div><div class='del'>-31: VPUDMA</div><div class='del'>-</div><div class='del'>-Bank 2:</div><div class='del'>-0: HOSTPORT</div><div class='del'>-1: VIDEOSCALER</div><div class='del'>-2: CCP2TX</div><div class='del'>-3: SDC</div><div class='del'>-4: DSI0</div><div class='del'>-5: AVE</div><div class='del'>-6: CAM0</div><div class='del'>-7: CAM1</div><div class='del'>-8: HDMI0</div><div class='del'>-9: HDMI1</div><div class='del'>-10: PIXELVALVE1</div><div class='del'>-11: I2CSPISLV</div><div class='del'>-12: DSI1</div><div class='del'>-13: PWA0</div><div class='del'>-14: PWA1</div><div class='del'>-15: CPR</div><div class='del'>-16: SMI</div><div class='del'>-17: GPIO0</div><div class='del'>-18: GPIO1</div><div class='del'>-19: GPIO2</div><div class='del'>-20: GPIO3</div><div class='del'>-21: VC_I2C</div><div class='del'>-22: VC_SPI</div><div class='del'>-23: VC_I2SPCM</div><div class='del'>-24: VC_SDIO</div><div class='del'>-25: VC_UART</div><div class='del'>-26: SLIMBUS</div><div class='del'>-27: VEC</div><div class='del'>-28: CPG</div><div class='del'>-29: RNG</div><div class='del'>-30: VC_ARASANSDIO</div><div class='del'>-31: AVSPMON</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-/* BCM2835, first level */</div><div class='del'>-intc: interrupt-controller {</div><div class='del'>-	compatible = "brcm,bcm2835-armctrl-ic";</div><div class='del'>-	reg = &lt;0x7e00b200 0x200&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* BCM2836, second level */</div><div class='del'>-intc: interrupt-controller {</div><div class='del'>-	compatible = "brcm,bcm2836-armctrl-ic";</div><div class='del'>-	reg = &lt;0x7e00b200 0x200&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	interrupt-parent = &lt;&amp;local_intc&gt;;</div><div class='del'>-	interrupts = &lt;8&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml<br/>new file mode 100644<br/>index 000000000000..625eb22bedf0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2835-armctrl-ic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: BCM2835 ARMCTRL Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Florian Fainelli &lt;florian.fainelli@broadcom.com&gt;</div><div class='add'>+  - Raspberry Pi Kernel Maintenance &lt;kernel-list@raspberrypi.com&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  The BCM2835 contains a custom top-level interrupt controller, which supports</div><div class='add'>+  72 interrupt sources using a 2-level register scheme. The interrupt</div><div class='add'>+  controller, or the HW block containing it, is referred to occasionally as</div><div class='add'>+  "armctrl" in the SoC documentation, hence naming of this binding.</div><div class='add'>+</div><div class='add'>+  The BCM2836 contains the same interrupt controller with the same interrupts,</div><div class='add'>+  but the per-CPU interrupt controller is the root, and an interrupt there</div><div class='add'>+  indicates that the ARMCTRL has an interrupt to handle.</div><div class='add'>+</div><div class='add'>+  The interrupt sources are as follows:</div><div class='add'>+</div><div class='add'>+  Bank 0:</div><div class='add'>+    0: ARM_TIMER</div><div class='add'>+    1: ARM_MAILBOX</div><div class='add'>+    2: ARM_DOORBELL_0</div><div class='add'>+    3: ARM_DOORBELL_1</div><div class='add'>+    4: VPU0_HALTED</div><div class='add'>+    5: VPU1_HALTED</div><div class='add'>+    6: ILLEGAL_TYPE0</div><div class='add'>+    7: ILLEGAL_TYPE1</div><div class='add'>+</div><div class='add'>+  Bank 1:</div><div class='add'>+    0: TIMER0</div><div class='add'>+    1: TIMER1</div><div class='add'>+    2: TIMER2</div><div class='add'>+    3: TIMER3</div><div class='add'>+    4: CODEC0</div><div class='add'>+    5: CODEC1</div><div class='add'>+    6: CODEC2</div><div class='add'>+    7: VC_JPEG</div><div class='add'>+    8: ISP</div><div class='add'>+    9: VC_USB</div><div class='add'>+    10: VC_3D</div><div class='add'>+    11: TRANSPOSER</div><div class='add'>+    12: MULTICORESYNC0</div><div class='add'>+    13: MULTICORESYNC1</div><div class='add'>+    14: MULTICORESYNC2</div><div class='add'>+    15: MULTICORESYNC3</div><div class='add'>+    16: DMA0</div><div class='add'>+    17: DMA1</div><div class='add'>+    18: VC_DMA2</div><div class='add'>+    19: VC_DMA3</div><div class='add'>+    20: DMA4</div><div class='add'>+    21: DMA5</div><div class='add'>+    22: DMA6</div><div class='add'>+    23: DMA7</div><div class='add'>+    24: DMA8</div><div class='add'>+    25: DMA9</div><div class='add'>+    26: DMA10</div><div class='add'>+    27: DMA11-14 - shared interrupt for DMA 11 to 14</div><div class='add'>+    28: DMAALL - triggers on all dma interrupts (including channel 15)</div><div class='add'>+    29: AUX</div><div class='add'>+    30: ARM</div><div class='add'>+    31: VPUDMA</div><div class='add'>+</div><div class='add'>+  Bank 2:</div><div class='add'>+    0: HOSTPORT</div><div class='add'>+    1: VIDEOSCALER</div><div class='add'>+    2: CCP2TX</div><div class='add'>+    3: SDC</div><div class='add'>+    4: DSI0</div><div class='add'>+    5: AVE</div><div class='add'>+    6: CAM0</div><div class='add'>+    7: CAM1</div><div class='add'>+    8: HDMI0</div><div class='add'>+    9: HDMI1</div><div class='add'>+    10: PIXELVALVE1</div><div class='add'>+    11: I2CSPISLV</div><div class='add'>+    12: DSI1</div><div class='add'>+    13: PWA0</div><div class='add'>+    14: PWA1</div><div class='add'>+    15: CPR</div><div class='add'>+    16: SMI</div><div class='add'>+    17: GPIO0</div><div class='add'>+    18: GPIO1</div><div class='add'>+    19: GPIO2</div><div class='add'>+    20: GPIO3</div><div class='add'>+    21: VC_I2C</div><div class='add'>+    22: VC_SPI</div><div class='add'>+    23: VC_I2SPCM</div><div class='add'>+    24: VC_SDIO</div><div class='add'>+    25: VC_UART</div><div class='add'>+    26: SLIMBUS</div><div class='add'>+    27: VEC</div><div class='add'>+    28: CPG</div><div class='add'>+    29: RNG</div><div class='add'>+    30: VC_ARASANSDIO</div><div class='add'>+    31: AVSPMON</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - brcm,bcm2835-armctrl-ic</div><div class='add'>+      - brcm,bcm2836-armctrl-ic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+    description: &gt;</div><div class='add'>+      The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic</div><div class='add'>+      pending" register, or 1/2 respectively for interrupts in the "IRQ pending</div><div class='add'>+      1/2" register.</div><div class='add'>+</div><div class='add'>+      The 2nd cell contains the interrupt number within the bank. Valid values</div><div class='add'>+      are 0..7 for bank 0, and 0..31 for bank 1.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: brcm,bcm2836-armctrl-ic</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@7e00b200 {</div><div class='add'>+        compatible = "brcm,bcm2835-armctrl-ic";</div><div class='add'>+        reg = &lt;0x7e00b200 0x200&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@7e00b200 {</div><div class='add'>+        compatible = "brcm,bcm2836-armctrl-ic";</div><div class='add'>+        reg = &lt;0x7e00b200 0x200&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;8&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt<br/>deleted file mode 100644<br/>index 2bc19b1ac877..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,55 +0,0 @@</div><div class='del'>-Broadcom BCM6345-style Level 1 interrupt controller</div><div class='del'>-</div><div class='del'>-This block is a first level interrupt controller that is typically connected</div><div class='del'>-directly to one of the HW INT lines on each CPU.</div><div class='del'>-</div><div class='del'>-Key elements of the hardware design include:</div><div class='del'>-</div><div class='del'>-- 32, 64 or 128 incoming level IRQ lines</div><div class='del'>-</div><div class='del'>-- Most onchip peripherals are wired directly to an L1 input</div><div class='del'>-</div><div class='del'>-- A separate instance of the register set for each CPU, allowing individual</div><div class='del'>-  peripheral IRQs to be routed to any CPU</div><div class='del'>-</div><div class='del'>-- Contains one or more enable/status word pairs per CPU</div><div class='del'>-</div><div class='del'>-- No atomic set/clear operations</div><div class='del'>-</div><div class='del'>-- No polarity/level/edge settings</div><div class='del'>-</div><div class='del'>-- No FIFO or priority encoder logic; software is expected to read all</div><div class='del'>-  2-4 status words to determine which IRQs are pending</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "brcm,bcm&lt;soc&gt;-l1-intc", "brcm,bcm6345-l1-intc"</div><div class='del'>-- reg: specifies the base physical address and size of the registers;</div><div class='del'>-  the number of supported IRQs is inferred from the size argument</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an interrupt</div><div class='del'>-  source, should be 1.</div><div class='del'>-- interrupts: specifies the interrupt line(s) in the interrupt-parent controller</div><div class='del'>-  node; valid values depend on the type of parent interrupt controller</div><div class='del'>-</div><div class='del'>-If multiple reg ranges and interrupt-parent entries are present on an SMP</div><div class='del'>-system, the driver will allow IRQ SMP affinity to be set up through the</div><div class='del'>-/proc/irq/ interface.  In the simplest possible configuration, only one</div><div class='del'>-reg range and one interrupt-parent is needed.</div><div class='del'>-</div><div class='del'>-The driver operates in native CPU endian by default, there is no support for</div><div class='del'>-specifying an alternative endianness.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-periph_intc: interrupt-controller@10000000 {</div><div class='del'>-        compatible = "brcm,bcm63168-l1-intc", "brcm,bcm6345-l1-intc";</div><div class='del'>-        reg = &lt;0x10000020 0x20&gt;,</div><div class='del'>-              &lt;0x10000040 0x20&gt;;</div><div class='del'>-</div><div class='del'>-        interrupt-controller;</div><div class='del'>-        #interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-        interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='del'>-        interrupts = &lt;2&gt;, &lt;3&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml<br/>new file mode 100644<br/>index 000000000000..ca6a2ff43acd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-l1-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-l1-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom BCM6345-style Level 1 interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Simon Arlott &lt;simon@octiron.net&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  This block is a first level interrupt controller that is typically connected</div><div class='add'>+  directly to one of the HW INT lines on each CPU.</div><div class='add'>+</div><div class='add'>+  Key elements of the hardware design include:</div><div class='add'>+</div><div class='add'>+    - 32, 64 or 128 incoming level IRQ lines</div><div class='add'>+</div><div class='add'>+    - Most onchip peripherals are wired directly to an L1 input</div><div class='add'>+</div><div class='add'>+    - A separate instance of the register set for each CPU, allowing individual</div><div class='add'>+      peripheral IRQs to be routed to any CPU</div><div class='add'>+</div><div class='add'>+    - Contains one or more enable/status word pairs per CPU</div><div class='add'>+</div><div class='add'>+    - No atomic set/clear operations</div><div class='add'>+</div><div class='add'>+    - No polarity/level/edge settings</div><div class='add'>+</div><div class='add'>+    - No FIFO or priority encoder logic; software is expected to read all</div><div class='add'>+      2-4 status words to determine which IRQs are pending</div><div class='add'>+</div><div class='add'>+  If multiple reg ranges and interrupt-parent entries are present on an SMP</div><div class='add'>+  system, the driver will allow IRQ SMP affinity to be set up through the</div><div class='add'>+  /proc/irq/ interface.  In the simplest possible configuration, only one</div><div class='add'>+  reg range and one interrupt-parent is needed.</div><div class='add'>+</div><div class='add'>+  The driver operates in native CPU endian by default, there is no support for</div><div class='add'>+  specifying an alternative endianness.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: brcm,bcm6345-l1-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: One entry per CPU core</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: One entry per CPU core</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@10000000 {</div><div class='add'>+        compatible = "brcm,bcm6345-l1-intc";</div><div class='add'>+        reg = &lt;0x10000020 0x20&gt;,</div><div class='add'>+              &lt;0x10000040 0x20&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;2&gt;, &lt;3&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt<br/>deleted file mode 100644<br/>index d4de980e55fa..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-mx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-* Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "cdns,xtensa-mx".</div><div class='del'>-</div><div class='del'>-Remaining properties have exact same meaning as in Xtensa PIC</div><div class='del'>-(see cdns,xtensa-pic.txt).</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-	pic: pic {</div><div class='del'>-		compatible = "cdns,xtensa-mx";</div><div class='del'>-		/* one cell: internal irq number,</div><div class='del'>-		 * two cells: second cell == 0: internal irq number</div><div class='del'>-		 *            second cell == 1: external irq number</div><div class='del'>-		 */</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt<br/>deleted file mode 100644<br/>index 026ef4cfc1d5..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-* Xtensa built-in Programmable Interrupt Controller (PIC)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "cdns,xtensa-pic".</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: The number of cells to define the interrupts.</div><div class='del'>-  It may be either 1 or 2.</div><div class='del'>-  When it's 1, the first cell is the internal IRQ number.</div><div class='del'>-  When it's 2, the first cell is the IRQ number, and the second cell</div><div class='del'>-  specifies whether it's internal (0) or external (1).</div><div class='del'>-  Periferals are usually connected to a fixed external IRQ, but for different</div><div class='del'>-  core variants it may be mapped to different internal IRQ.</div><div class='del'>-  IRQ sensitivity and priority are fixed for each core variant and may not be</div><div class='del'>-  changed at runtime.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-	pic: pic {</div><div class='del'>-		compatible = "cdns,xtensa-pic";</div><div class='del'>-		/* one cell: internal irq number,</div><div class='del'>-		 * two cells: second cell == 0: internal irq number</div><div class='del'>-		 *            second cell == 1: external irq number</div><div class='del'>-		 */</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml<br/>new file mode 100644<br/>index 000000000000..6773207fee01<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/cdns,xtensa-pic.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2025 Max Filippov &lt;jcmvbkbc@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/cdns,xtensa-pic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xtensa Interrupt Controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Max Filippov &lt;jcmvbkbc@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX) and</div><div class='add'>+  Xtensa built-in Programmable Interrupt Controller (PIC)</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - cdns,xtensa-mx</div><div class='add'>+      - cdns,xtensa-pic</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+    description:</div><div class='add'>+      Number of cells to define the interrupts. When 1, the first cell is the</div><div class='add'>+      internal IRQ number; when 2, the second cell specifies internal (0) or</div><div class='add'>+      external (1).</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+        compatible = "cdns,xtensa-pic";</div><div class='add'>+        /* one cell: internal irq number,</div><div class='add'>+         * two cells: second cell == 0: internal irq number</div><div class='add'>+         *            second cell == 1: external irq number</div><div class='add'>+         */</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml<br/>new file mode 100644<br/>index 000000000000..f0d9bbd7d510<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/chrp,open-pic.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/chrp,open-pic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Open PIC Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Herring &lt;robh@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This binding specifies what properties must be available in the device tree</div><div class='add'>+  representation of an Open PIC compliant interrupt controller.  This binding is</div><div class='add'>+  based on the binding defined for Open PIC in [1] and is a superset of that</div><div class='add'>+  binding.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,mpic</div><div class='add'>+          - const: chrp,open-pic</div><div class='add'>+      - const: chrp,open-pic</div><div class='add'>+</div><div class='add'>+  device_type:</div><div class='add'>+    const: open-pci</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  pic-no-reset:</div><div class='add'>+    description: Indicates the PIC shall not be reset during runtime initialization.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@40000 {</div><div class='add'>+        compatible = "chrp,open-pic";</div><div class='add'>+        reg = &lt;0x40000 0x40000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #address-cells = &lt;0&gt;;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        pic-no-reset;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt<br/>deleted file mode 100644<br/>index 969b4582ec60..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/cirrus,clps711x-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-Cirrus Logic CLPS711X Interrupt Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be "cirrus,ep7209-intc".</div><div class='del'>-- reg: Specifies base physical address of the registers set.</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 1.</div><div class='del'>-</div><div class='del'>-The interrupt sources are as follows:</div><div class='del'>-ID	Name	Description</div><div class='del'>----------------------------</div><div class='del'>-1:	BLINT	Battery low (FIQ)</div><div class='del'>-3:	MCINT	Media changed (FIQ)</div><div class='del'>-4:	CSINT	CODEC sound</div><div class='del'>-5:	EINT1	External 1</div><div class='del'>-6:	EINT2	External 2</div><div class='del'>-7:	EINT3	External 3</div><div class='del'>-8:	TC1OI	TC1 under flow</div><div class='del'>-9:	TC2OI	TC2 under flow</div><div class='del'>-10:	RTCMI	RTC compare match</div><div class='del'>-11:	TINT	64Hz tick</div><div class='del'>-12:	UTXINT1	UART1 transmit FIFO half empty</div><div class='del'>-13:	URXINT1	UART1 receive FIFO half full</div><div class='del'>-14:	UMSINT	UART1 modem status changed</div><div class='del'>-15:	SSEOTI	SSI1 end of transfer</div><div class='del'>-16:	KBDINT	Keyboard</div><div class='del'>-17:	SS2RX	SSI2 receive FIFO half or greater full</div><div class='del'>-18:	SS2TX	SSI2 transmit FIFO less than half empty</div><div class='del'>-28:	UTXINT2	UART2 transmit FIFO half empty</div><div class='del'>-29:	URXINT2	UART2 receive FIFO half full</div><div class='del'>-32:	DAIINT	DAI interface (FIQ)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	intc: interrupt-controller {</div><div class='del'>-		compatible = "cirrus,ep7312-intc", "cirrus,ep7209-intc";</div><div class='del'>-		reg = &lt;0x80000000 0x4000&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml<br/>new file mode 100644<br/>index 000000000000..d3cc49d29e10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/cirrus,ep7209-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/cirrus,ep7209-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cirrus Logic CLPS711X Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Shiyan &lt;shc_work@mail.ru&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  Cirrus Logic CLPS711X Interrupt Controller</div><div class='add'>+</div><div class='add'>+  The interrupt sources are as follows:</div><div class='add'>+    ID	Name	Description</div><div class='add'>+    ---------------------------</div><div class='add'>+    1:	BLINT	Battery low (FIQ)</div><div class='add'>+    3:	MCINT	Media changed (FIQ)</div><div class='add'>+    4:	CSINT	CODEC sound</div><div class='add'>+    5:	EINT1	External 1</div><div class='add'>+    6:	EINT2	External 2</div><div class='add'>+    7:	EINT3	External 3</div><div class='add'>+    8:	TC1OI	TC1 under flow</div><div class='add'>+    9:	TC2OI	TC2 under flow</div><div class='add'>+    10:	RTCMI	RTC compare match</div><div class='add'>+    11:	TINT	64Hz tick</div><div class='add'>+    12:	UTXINT1	UART1 transmit FIFO half empty</div><div class='add'>+    13:	URXINT1	UART1 receive FIFO half full</div><div class='add'>+    14:	UMSINT	UART1 modem status changed</div><div class='add'>+    15:	SSEOTI	SSI1 end of transfer</div><div class='add'>+    16:	KBDINT	Keyboard</div><div class='add'>+    17:	SS2RX	SSI2 receive FIFO half or greater full</div><div class='add'>+    18:	SS2TX	SSI2 transmit FIFO less than half empty</div><div class='add'>+    28:	UTXINT2	UART2 transmit FIFO half empty</div><div class='add'>+    29:	URXINT2	UART2 receive FIFO half full</div><div class='add'>+    32:	DAIINT	DAI interface (FIQ)</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: cirrus,ep7312-intc</div><div class='add'>+          - const: cirrus,ep7209-intc</div><div class='add'>+      - items:</div><div class='add'>+          - const: cirrus,ep7209-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@80000000 {</div><div class='add'>+        compatible = "cirrus,ep7312-intc", "cirrus,ep7209-intc";</div><div class='add'>+        reg = &lt;0x80000000 0x4000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml<br/>new file mode 100644<br/>index 000000000000..3f016cf47812<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/cnxt,cx92755-ic.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/cnxt,cx92755-ic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Conexant Digicolor Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Baruch Siach &lt;baruch@tkos.co.il&gt;</div><div class='add'>+</div><div class='add'>+description: Conexant Digicolor Interrupt Controller</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cnxt,cx92755-ic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  syscon:</div><div class='add'>+    description: A phandle to the syscon node describing UC registers</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - syscon</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@f0000040 {</div><div class='add'>+        compatible = "cnxt,cx92755-ic";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        reg = &lt;0xf0000040 0x40&gt;;</div><div class='add'>+        syscon = &lt;&amp;uc_regs&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt<br/>deleted file mode 100644<br/>index 44286dcbac62..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-==============================</div><div class='del'>-C-SKY APB Interrupt Controller</div><div class='del'>-==============================</div><div class='del'>-</div><div class='del'>-C-SKY APB Interrupt Controller is a simple soc interrupt controller</div><div class='del'>-on the apb bus and we only use it as root irq controller.</div><div class='del'>-</div><div class='del'>- - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums.</div><div class='del'>- - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.</div><div class='del'>- - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums.</div><div class='del'>-</div><div class='del'>-=============================</div><div class='del'>-intc node bindings definition</div><div class='del'>-=============================</div><div class='del'>-</div><div class='del'>-	Description: Describes APB interrupt controller</div><div class='del'>-</div><div class='del'>-	PROPERTIES</div><div class='del'>-</div><div class='del'>-	- compatible</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;string&gt;</div><div class='del'>-		Definition: must be "csky,apb-intc"</div><div class='del'>-				    "csky,dual-apb-intc"</div><div class='del'>-				    "csky,gx6605s-intc"</div><div class='del'>-	- #interrupt-cells</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;u32&gt;</div><div class='del'>-		Definition: must be &lt;1&gt;</div><div class='del'>-	- reg</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;u32 u32&gt;</div><div class='del'>-		Definition: &lt;phyaddr size&gt; in soc from cpu view</div><div class='del'>-	- interrupt-controller:</div><div class='del'>-		Usage: required</div><div class='del'>-	- csky,support-pulse-signal:</div><div class='del'>-		Usage: select</div><div class='del'>-		Description: to support pulse signal flag</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@500000 {</div><div class='del'>-		compatible = "csky,apb-intc";</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x00500000 0x400&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@500000 {</div><div class='del'>-		compatible = "csky,dual-apb-intc";</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x00500000 0x400&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@500000 {</div><div class='del'>-		compatible = "csky,gx6605s-intc";</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x00500000 0x400&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml<br/>new file mode 100644<br/>index 000000000000..902648ead975<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/csky,apb-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: C-SKY APB Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Guo Ren &lt;guoren@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  C-SKY APB Interrupt Controller is a simple soc interrupt controller on the apb</div><div class='add'>+  bus and we only use it as root irq controller.</div><div class='add'>+</div><div class='add'>+    - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums.</div><div class='add'>+    - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.</div><div class='add'>+    - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - csky,apb-intc</div><div class='add'>+      - csky,dual-apb-intc</div><div class='add'>+      - csky,gx6605s-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  csky,support-pulse-signal:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Support for pulse signal flag.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    intc: interrupt-controller@500000 {</div><div class='add'>+        compatible = "csky,apb-intc";</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        reg = &lt;0x00500000 0x400&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt<br/>deleted file mode 100644<br/>index e6bbcae4d07f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,52 +0,0 @@</div><div class='del'>-===========================================</div><div class='del'>-C-SKY Multi-processors Interrupt Controller</div><div class='del'>-===========================================</div><div class='del'>-</div><div class='del'>-C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860</div><div class='del'>-SMP soc, and it also could be used in non-SMP system.</div><div class='del'>-</div><div class='del'>-Interrupt number definition:</div><div class='del'>-  0-15  : software irq, and we use 15 as our IPI_IRQ.</div><div class='del'>- 16-31  : private  irq, and we use 16 as the co-processor timer.</div><div class='del'>- 31-1024: common irq for soc ip.</div><div class='del'>-</div><div class='del'>-Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h)</div><div class='del'>- IRQ_TYPE_LEVEL_HIGH (default)</div><div class='del'>- IRQ_TYPE_LEVEL_LOW</div><div class='del'>- IRQ_TYPE_EDGE_RISING</div><div class='del'>- IRQ_TYPE_EDGE_FALLING</div><div class='del'>-</div><div class='del'>-=============================</div><div class='del'>-intc node bindings definition</div><div class='del'>-=============================</div><div class='del'>-</div><div class='del'>-	Description: Describes SMP interrupt controller</div><div class='del'>-</div><div class='del'>-	PROPERTIES</div><div class='del'>-</div><div class='del'>-	- compatible</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;string&gt;</div><div class='del'>-		Definition: must be "csky,mpintc"</div><div class='del'>-	- #interrupt-cells</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;u32&gt;</div><div class='del'>-		Definition: &lt;2&gt;</div><div class='del'>-	- interrupt-controller:</div><div class='del'>-		Usage: required</div><div class='del'>-</div><div class='del'>-Examples: ("interrupts = &lt;irq_num IRQ_TYPE_XXX&gt;")</div><div class='del'>----------</div><div class='del'>-#include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller {</div><div class='del'>-		compatible = "csky,mpintc";</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	device: device-example {</div><div class='del'>-		...</div><div class='del'>-		interrupts = &lt;34 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml<br/>new file mode 100644<br/>index 000000000000..3df7739e31c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/csky,mpintc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: C-SKY Multi-processors Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Guo Ren &lt;guoren@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860</div><div class='add'>+  SMP soc, and it also could be used in non-SMP system.</div><div class='add'>+</div><div class='add'>+  Interrupt number definition:</div><div class='add'>+    0-15  : software irq, and we use 15 as our IPI_IRQ.</div><div class='add'>+    16-31  : private  irq, and we use 16 as the co-processor timer.</div><div class='add'>+    31-1024: common irq for soc ip.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: csky,mpintc</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+        compatible = "csky,mpintc";</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt<br/>deleted file mode 100644<br/>index 42d41ec84c7b..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-Conexant Digicolor Interrupt Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "cnxt,cx92755-ic"</div><div class='del'>-- reg : Specifies base physical address and size of the interrupt controller</div><div class='del'>-  registers (IC) area</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 1.</div><div class='del'>-- syscon: A phandle to the syscon node describing UC registers</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@f0000040 {</div><div class='del'>-		compatible = "cnxt,cx92755-ic";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0xf0000040 0x40&gt;;</div><div class='del'>-		syscon = &lt;&amp;uc_regs&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml<br/>new file mode 100644<br/>index 000000000000..5536319c49c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/econet,en751221-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: EcoNet EN751221 Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Caleb James DeLisle &lt;cjd@cjdns.fr&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The EcoNet EN751221 Interrupt Controller is a simple interrupt controller</div><div class='add'>+  designed for the MIPS 34Kc MT SMP processor with 2 VPEs. Each interrupt can</div><div class='add'>+  be routed to either VPE but not both, so to support per-CPU interrupts, a</div><div class='add'>+  secondary IRQ number is allocated to control masking/unmasking on VPE#1. For</div><div class='add'>+  lack of a better term we call these "shadow interrupts". The assignment of</div><div class='add'>+  shadow interrupts is defined by the SoC integrator when wiring the interrupt</div><div class='add'>+  lines, so they are configurable in the device tree.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/interrupt-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: econet,en751221-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Interrupt line connecting this controller to its parent.</div><div class='add'>+</div><div class='add'>+  econet,shadow-interrupts:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    description:</div><div class='add'>+      An array of interrupt number pairs where each pair represents a shadow</div><div class='add'>+      interrupt relationship. The first number in each pair is the primary IRQ,</div><div class='add'>+      and the second is its shadow IRQ used for VPE#1 control. For example,</div><div class='add'>+      &lt;8 3&gt; means IRQ 8 is shadowed by IRQ 3, so IRQ 3 cannot be mapped, but</div><div class='add'>+      when VPE#1 requests IRQ 8, it will manipulate the IRQ 3 mask bit.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 20</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: primary per-CPU IRQ</div><div class='add'>+        - description: shadow IRQ number</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@1fb40000 {</div><div class='add'>+        compatible = "econet,en751221-intc";</div><div class='add'>+        reg = &lt;0x1fb40000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+        interrupts = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        econet,shadow-interrupts = &lt;7 2&gt;, &lt;8 3&gt;, &lt;13 12&gt;, &lt;30 29&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt<br/>deleted file mode 100644<br/>index 888b2b9f7064..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-EZchip NPS Interrupt Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "ezchip,nps400-ic"</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 1.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-intc: interrupt-controller {</div><div class='del'>-	compatible = "ezchip,nps400-ic";</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml<br/>new file mode 100644<br/>index 000000000000..589c6ebf6c1a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/ezchip,nps400-ic.yaml</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ezchip,nps400-ic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: EZchip NPS Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Noam Camus &lt;noamc@ezchip.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ezchip,nps400-ic</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+        compatible = "ezchip,nps400-ic";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt b/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt<br/>deleted file mode 100644<br/>index 24428d47f487..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-* Faraday Technologt FTINTC010 interrupt controller</div><div class='del'>-</div><div class='del'>-This interrupt controller is a stock IP block from Faraday Technology found</div><div class='del'>-in the Gemini SoCs and other designs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be one of</div><div class='del'>-  "faraday,ftintc010"</div><div class='del'>-  "cortina,gemini-interrupt-controller" (deprecated)</div><div class='del'>-- reg: The register bank for the interrupt controller.</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells: The number of cells to define the interrupts.</div><div class='del'>-  Must be 2 as the controller can specify level or rising edge</div><div class='del'>-  IRQs. The bindings follows the standard binding for controllers</div><div class='del'>-  with two cells specified in</div><div class='del'>-  interrupt-controller/interrupts.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-interrupt-controller@48000000 {</div><div class='del'>-	compatible = "faraday,ftintc010"</div><div class='del'>-	reg = &lt;0x48000000 0x1000&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml b/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml<br/>new file mode 100644<br/>index 000000000000..980e5c45f25b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/faraday,ftintc010.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/faraday,ftintc010.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Faraday Technology FTINTC010 interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This interrupt controller is a stock IP block from Faraday Technology found</div><div class='add'>+  in the Gemini SoCs and other designs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: moxa,moxart-ic</div><div class='add'>+          - const: faraday,ftintc010</div><div class='add'>+      - enum:</div><div class='add'>+          - faraday,ftintc010</div><div class='add'>+          - cortina,gemini-interrupt-controller</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@48000000 {</div><div class='add'>+        compatible = "faraday,ftintc010";</div><div class='add'>+        reg = &lt;0x48000000 0x1000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml<br/>index 6076ddf56bb5..c49688be1058 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>               - fsl,imx8mp-irqsteer</div><div class='ctx'>               - fsl,imx8qm-irqsteer</div><div class='ctx'>               - fsl,imx8qxp-irqsteer</div><div class='add'>+              - fsl,imx94-irqsteer</div><div class='ctx'>           - const: fsl,imx-irqsteer</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml<br/>new file mode 100644<br/>index 000000000000..5f2c8761a31d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/fsl,tzic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale tzic Interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx51-tzic</div><div class='add'>+              - fsl,imx53-tzic</div><div class='add'>+          - const: fsl,tzic</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx50-tzic</div><div class='add'>+          - const: fsl,imx53-tzic</div><div class='add'>+          - const: fsl,tzic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    tz-interrupt-controller@fffc000 {</div><div class='add'>+        compatible = "fsl,imx53-tzic", "fsl,tzic";</div><div class='add'>+        reg = &lt;0x0fffc000 0x4000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt<br/>deleted file mode 100644<br/>index 35f752706e7d..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-Android Goldfish PIC</div><div class='del'>-</div><div class='del'>-Android Goldfish programmable interrupt device used by Android</div><div class='del'>-emulator.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should contain "google,goldfish-pic"</div><div class='del'>-- reg        : &lt;registers mapping&gt;</div><div class='del'>-- interrupts : &lt;interrupt mapping&gt;</div><div class='del'>-</div><div class='del'>-Example for mips when used in cascade mode:</div><div class='del'>-</div><div class='del'>-        cpuintc {</div><div class='del'>-                #interrupt-cells = &lt;0x1&gt;;</div><div class='del'>-                #address-cells = &lt;0&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                compatible = "mti,cpu-interrupt-controller";</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        interrupt-controller@1f000000 {</div><div class='del'>-                compatible = "google,goldfish-pic";</div><div class='del'>-                reg = &lt;0x1f000000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;0x1&gt;;</div><div class='del'>-</div><div class='del'>-                interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='del'>-                interrupts = &lt;0x2&gt;;</div><div class='del'>-        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml<br/>new file mode 100644<br/>index 000000000000..ac3c3c3ca186<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/google,goldfish-pic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Android Goldfish PIC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miodrag Dinic &lt;miodrag.dinic@mips.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Android Goldfish programmable interrupt device used by Android emulator.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: google,goldfish-pic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@1f000000 {</div><div class='add'>+        compatible = "google,goldfish-pic";</div><div class='add'>+        reg = &lt;0x1f000000 0x1000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupts = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt<br/>deleted file mode 100644<br/>index 5dc2a55ad811..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,105 +0,0 @@</div><div class='del'>-* ImgTec Powerdown Controller (PDC) Interrupt Controller Binding</div><div class='del'>-</div><div class='del'>-This binding specifies what properties must be available in the device tree</div><div class='del'>-representation of a PDC IRQ controller. This has a number of input interrupt</div><div class='del'>-lines which can wake the system, and are passed on through output interrupt</div><div class='del'>-lines.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-    - compatible: Specifies the compatibility list for the interrupt controller.</div><div class='del'>-      The type shall be &lt;string&gt; and the value shall include "img,pdc-intc".</div><div class='del'>-</div><div class='del'>-    - reg: Specifies the base PDC physical address(s) and size(s) of the</div><div class='del'>-      addressable register space. The type shall be &lt;prop-encoded-array&gt;.</div><div class='del'>-</div><div class='del'>-    - interrupt-controller: The presence of this property identifies the node</div><div class='del'>-      as an interrupt controller. No property value shall be defined.</div><div class='del'>-</div><div class='del'>-    - #interrupt-cells: Specifies the number of cells needed to encode an</div><div class='del'>-      interrupt source. The type shall be a &lt;u32&gt; and the value shall be 2.</div><div class='del'>-</div><div class='del'>-    - num-perips: Number of waking peripherals.</div><div class='del'>-</div><div class='del'>-    - num-syswakes: Number of SysWake inputs.</div><div class='del'>-</div><div class='del'>-    - interrupts: List of interrupt specifiers. The first specifier shall be the</div><div class='del'>-      shared SysWake interrupt, and remaining specifies shall be PDC peripheral</div><div class='del'>-      interrupts in order.</div><div class='del'>-</div><div class='del'>-* Interrupt Specifier Definition</div><div class='del'>-</div><div class='del'>-  Interrupt specifiers consists of 2 cells encoded as follows:</div><div class='del'>-</div><div class='del'>-    - &lt;1st-cell&gt;: The interrupt-number that identifies the interrupt source.</div><div class='del'>-                    0-7:  Peripheral interrupts</div><div class='del'>-                    8-15: SysWake interrupts</div><div class='del'>-</div><div class='del'>-    - &lt;2nd-cell&gt;: The level-sense information, encoded using the Linux interrupt</div><div class='del'>-                  flags as follows (only 4 valid for peripheral interrupts):</div><div class='del'>-                    0 = none (decided by software)</div><div class='del'>-                    1 = low-to-high edge triggered</div><div class='del'>-                    2 = high-to-low edge triggered</div><div class='del'>-                    3 = both edge triggered</div><div class='del'>-                    4 = active-high level-sensitive (required for perip irqs)</div><div class='del'>-                    8 = active-low level-sensitive</div><div class='del'>-</div><div class='del'>-* Examples</div><div class='del'>-</div><div class='del'>-Example 1:</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * TZ1090 PDC block</div><div class='del'>-	 */</div><div class='del'>-	pdc: pdc@02006000 {</div><div class='del'>-		// This is an interrupt controller node.</div><div class='del'>-		interrupt-controller;</div><div class='del'>-</div><div class='del'>-		// Three cells to encode interrupt sources.</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		// Offset address of 0x02006000 and size of 0x1000.</div><div class='del'>-		reg = &lt;0x02006000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		// Compatible with Meta hardware trigger block.</div><div class='del'>-		compatible = "img,pdc-intc";</div><div class='del'>-</div><div class='del'>-		// Three peripherals are connected.</div><div class='del'>-		num-perips = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-		// Four SysWakes are connected.</div><div class='del'>-		num-syswakes = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;18 4 /* level */&gt;, /* Syswakes */</div><div class='del'>-			     &lt;30 4 /* level */&gt;, /* Peripheral 0 (RTC) */</div><div class='del'>-			     &lt;29 4 /* level */&gt;, /* Peripheral 1 (IR) */</div><div class='del'>-			     &lt;31 4 /* level */&gt;; /* Peripheral 2 (WDT) */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 2:</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * An SoC peripheral that is wired through the PDC.</div><div class='del'>-	 */</div><div class='del'>-	rtc0 {</div><div class='del'>-		// The interrupt controller that this device is wired to.</div><div class='del'>-		interrupt-parent = &lt;&amp;pdc&gt;;</div><div class='del'>-</div><div class='del'>-		// Interrupt source Peripheral 0</div><div class='del'>-		interrupts = &lt;0   /* Peripheral 0 (RTC) */</div><div class='del'>-		              4&gt;  /* IRQ_TYPE_LEVEL_HIGH */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 3:</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * An interrupt generating device that is wired to a SysWake pin.</div><div class='del'>-	 */</div><div class='del'>-	touchscreen0 {</div><div class='del'>-		// The interrupt controller that this device is wired to.</div><div class='del'>-		interrupt-parent = &lt;&amp;pdc&gt;;</div><div class='del'>-</div><div class='del'>-		// Interrupt source SysWake 0 that is active-low level-sensitive</div><div class='del'>-		interrupts = &lt;8 /* SysWake0 */</div><div class='del'>-			      8 /* IRQ_TYPE_LEVEL_LOW */&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml<br/>new file mode 100644<br/>index 000000000000..99e7a4281595<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/img,pdc-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ImgTec Powerdown Controller (PDC) Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - James Hogan &lt;jhogan@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  ImgTec Powerdown Controller (PDC) Interrupt Controller has a number of input</div><div class='add'>+  interrupt lines which can wake the system, and are passed on through output</div><div class='add'>+  interrupt lines.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: img,pdc-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    description: &gt;</div><div class='add'>+      &lt;1st-cell&gt;: The interrupt-number that identifies the interrupt source.</div><div class='add'>+        0-7:  Peripheral interrupts</div><div class='add'>+        8-15: SysWake interrupts</div><div class='add'>+</div><div class='add'>+      &lt;2nd-cell&gt;: The level-sense information, encoded using the Linux interrupt</div><div class='add'>+        flags as follows (only 4 valid for peripheral interrupts):</div><div class='add'>+        0 = none (decided by software)</div><div class='add'>+        1 = low-to-high edge triggered</div><div class='add'>+        2 = high-to-low edge triggered</div><div class='add'>+        3 = both edge triggered</div><div class='add'>+        4 = active-high level-sensitive (required for perip irqs)</div><div class='add'>+        8 = active-low level-sensitive</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  num-perips:</div><div class='add'>+    description: Number of waking peripherals</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 8</div><div class='add'>+</div><div class='add'>+  num-syswakes:</div><div class='add'>+    description: Number of SysWake inputs</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 8</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      First entry is syswake IRQ. Subsequent entries are 1 per peripheral.</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - num-perips</div><div class='add'>+  - num-syswakes</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@2006000 {</div><div class='add'>+        compatible = "img,pdc-intc";</div><div class='add'>+        reg = &lt;0x02006000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;18 4&gt;, &lt;30 4&gt;, &lt;29 4&gt;, &lt;31 4&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        num-perips = &lt;3&gt;;</div><div class='add'>+        num-syswakes = &lt;4&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt<br/>deleted file mode 100644<br/>index ee2ad36f8df8..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-J-Core Advanced Interrupt Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic</div><div class='del'>-  with 8 interrupt lines with programmable priorities, or "jcore,aic2" for</div><div class='del'>-  the "aic2" core with 64 interrupts.</div><div class='del'>-</div><div class='del'>-- reg: Memory region(s) for configuration. For SMP, there should be one</div><div class='del'>-  region per cpu, indexed by the sequential, zero-based hardware cpu</div><div class='del'>-  number.</div><div class='del'>-</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells: Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 1.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-aic: interrupt-controller@200 {</div><div class='del'>-	compatible = "jcore,aic2";</div><div class='del'>-	reg = &lt; 0x200 0x30 0x500 0x30 &gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml<br/>new file mode 100644<br/>index 000000000000..df8abc24591c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2018 Linaro Ltd.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/jcore,aic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: J-Core Advanced Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rich Felker &lt;dalias@libc.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - jcore,aic1</div><div class='add'>+      - jcore,aic2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: Memory region(s) for configuration. For SMP, there should be one</div><div class='add'>+      region per CPU, indexed by the sequential, zero-based hardware CPU number.</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    aic: interrupt-controller@200 {</div><div class='add'>+        compatible = "jcore,aic2";</div><div class='add'>+        reg = &lt;0x200 0x30&gt;, &lt;0x500 0x30&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt<br/>deleted file mode 100644<br/>index aee38e7c13e7..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-TI-NSPIRE interrupt controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Compatible property value should be "lsi,zevio-intc".</div><div class='del'>-</div><div class='del'>-- reg: Physical base address of the controller and length of memory mapped</div><div class='del'>-	region.</div><div class='del'>-</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-interrupt-controller {</div><div class='del'>-	compatible = "lsi,zevio-intc";</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	reg = &lt;0xDC000000 0x1000&gt;;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml<br/>new file mode 100644<br/>index 000000000000..e66b25f579c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/lsi,zevio-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2025 Daniel Tang &lt;dt.tangr@gmail.com&gt;</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/lsi,zevio-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI-NSPIRE Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Daniel Tang &lt;dt.tangr@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  TI-NSPIRE interrupt controller</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: lsi,zevio-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@dc000000 {</div><div class='add'>+        compatible = "lsi,zevio-intc";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        reg = &lt;0xdc000000 0x1000&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml<br/>new file mode 100644<br/>index 000000000000..5faedd95b9a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-gicp.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-gicp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell GICP Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  GICP is a Marvell extension of the GIC that allows to trigger GIC SPI</div><div class='add'>+  interrupts by doing a memory transaction. It is used by the ICU</div><div class='add'>+  located in the Marvell CP110 to turn wired interrupts inside the CP</div><div class='add'>+  into GIC SPI interrupts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,ap806-gicp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  marvell,spi-ranges:</div><div class='add'>+    description: Tuples of GIC SPI interrupt ranges available for this GICP</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: SPI interrupt base</div><div class='add'>+        - description: Number of interrupts in the range</div><div class='add'>+</div><div class='add'>+  msi-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - msi-controller</div><div class='add'>+  - marvell,spi-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    msi-controller@3f0040 {</div><div class='add'>+        compatible = "marvell,ap806-gicp";</div><div class='add'>+        reg = &lt;0x3f0040 0x10&gt;;</div><div class='add'>+        marvell,spi-ranges = &lt;64 64&gt;, &lt;288 64&gt;;</div><div class='add'>+        msi-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml<br/>new file mode 100644<br/>index 000000000000..e812f9a86307<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/marvell,ap806-sei.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-sei.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell SEI (System Error Interrupt) Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  Marvell SEI (System Error Interrupt) controller is an interrupt aggregator. It</div><div class='add'>+  receives interrupts from several sources and aggregates them to a single</div><div class='add'>+  interrupt line (an SPI) on the parent interrupt controller.</div><div class='add'>+</div><div class='add'>+  This interrupt controller can handle up to 64 SEIs, a set comes from the AP</div><div class='add'>+  and is wired while a second set comes from the CPs by the mean of MSIs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,ap806-sei</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  msi-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - msi-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    interrupt-controller@3f0200 {</div><div class='add'>+        compatible = "marvell,ap806-sei";</div><div class='add'>+        reg = &lt;0x3f0200 0x40&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        msi-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt<br/>deleted file mode 100644<br/>index 86a7b4cd03f5..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-Marvell Armada 7K/8K PIC Interrupt controller</div><div class='del'>----------------------------------------------</div><div class='del'>-</div><div class='del'>-This is the Device Tree binding for the PIC, a secondary interrupt</div><div class='del'>-controller available on the Marvell Armada 7K/8K ARM64 SoCs, and</div><div class='del'>-typically connected to the GIC as the primary interrupt controller.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "marvell,armada-8k-pic"</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells: the number of cells to define interrupts on this</div><div class='del'>-  controller. Should be 1</div><div class='del'>-- reg: the register area for the PIC interrupt controller</div><div class='del'>-- interrupts: the interrupt to the primary interrupt controller,</div><div class='del'>-  typically the GIC</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pic: interrupt-controller@3f0100 {</div><div class='del'>-		compatible = "marvell,armada-8k-pic";</div><div class='del'>-		reg = &lt;0x3f0100 0x10&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		interrupts = &lt;GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml<br/>new file mode 100644<br/>index 000000000000..5a455f7353db<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/marvell,armada-8k-pic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Armada 7K/8K PIC Interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Marvell Armada 7K/8K PIC is a secondary interrupt controller available on</div><div class='add'>+  the Marvell Armada 7K/8K ARM64 SoCs, and typically connected to the GIC as the</div><div class='add'>+  primary interrupt controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,armada-8k-pic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Interrupt to the primary interrupt controller (GIC).</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    interrupt-controller@3f0100 {</div><div class='add'>+        compatible = "marvell,armada-8k-pic";</div><div class='add'>+        reg = &lt;0x3f0100 0x10&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        interrupts = &lt;GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml<br/>new file mode 100644<br/>index 000000000000..9d4f06f45372<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/marvell,cp110-icu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+  - Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+title: Marvell ICU Interrupt Controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Marvell ICU (Interrupt Consolidation Unit) controller is responsible for</div><div class='add'>+  collecting all wired-interrupt sources in the CP and communicating them to the</div><div class='add'>+  GIC in the AP. The unit translates interrupt requests on input wires to MSG</div><div class='add'>+  memory mapped transactions to the GIC. These messages access different GIC</div><div class='add'>+  memory areas depending on their type (NSR, SR, SEI, REI, etc).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,cp110-icu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^interrupt-controller@":</div><div class='add'>+    type: object</div><div class='add'>+    description: Interrupt group child nodes</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - marvell,cp110-icu-nsr</div><div class='add'>+          - marvell,cp110-icu-sr</div><div class='add'>+          - marvell,cp110-icu-sei</div><div class='add'>+          - marvell,cp110-icu-rei</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      '#interrupt-cells':</div><div class='add'>+        const: 2</div><div class='add'>+</div><div class='add'>+      interrupt-controller: true</div><div class='add'>+</div><div class='add'>+      msi-parent:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description: Phandle to the GICP controller</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - reg</div><div class='add'>+      - '#interrupt-cells'</div><div class='add'>+      - interrupt-controller</div><div class='add'>+      - msi-parent</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@1e0000 {</div><div class='add'>+        compatible = "marvell,cp110-icu";</div><div class='add'>+        reg = &lt;0x1e0000 0x440&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        interrupt-controller@10 {</div><div class='add'>+                compatible = "marvell,cp110-icu-nsr";</div><div class='add'>+                reg = &lt;0x10 0x20&gt;;</div><div class='add'>+                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                msi-parent = &lt;&amp;gicp&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        interrupt-controller@50 {</div><div class='add'>+                compatible = "marvell,cp110-icu-sei";</div><div class='add'>+                reg = &lt;0x50 0x10&gt;;</div><div class='add'>+                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                msi-parent = &lt;&amp;sei&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt<br/>deleted file mode 100644<br/>index 64a00ceb7da4..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/marvell,gicp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-Marvell GICP Controller</div><div class='del'>------------------------</div><div class='del'>-</div><div class='del'>-GICP is a Marvell extension of the GIC that allows to trigger GIC SPI</div><div class='del'>-interrupts by doing a memory transaction. It is used by the ICU</div><div class='del'>-located in the Marvell CP110 to turn wired interrupts inside the CP</div><div class='del'>-into GIC SPI interrupts.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Must be "marvell,ap806-gicp"</div><div class='del'>-</div><div class='del'>-- reg: Must be the address and size of the GICP SPI registers</div><div class='del'>-</div><div class='del'>-- marvell,spi-ranges: tuples of GIC SPI interrupts ranges available</div><div class='del'>-  for this GICP</div><div class='del'>-</div><div class='del'>-- msi-controller: indicates that this is an MSI controller</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-gicp_spi: gicp-spi@3f0040 {</div><div class='del'>-	compatible = "marvell,ap806-gicp";</div><div class='del'>-	reg = &lt;0x3f0040 0x10&gt;;</div><div class='del'>-	marvell,spi-ranges = &lt;64 64&gt;, &lt;288 64&gt;;</div><div class='del'>-	msi-controller;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt<br/>deleted file mode 100644<br/>index 1c94a57a661e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,112 +0,0 @@</div><div class='del'>-Marvell ICU Interrupt Controller</div><div class='del'>---------------------------------</div><div class='del'>-</div><div class='del'>-The Marvell ICU (Interrupt Consolidation Unit) controller is</div><div class='del'>-responsible for collecting all wired-interrupt sources in the CP and</div><div class='del'>-communicating them to the GIC in the AP, the unit translates interrupt</div><div class='del'>-requests on input wires to MSG memory mapped transactions to the GIC.</div><div class='del'>-These messages will access a different GIC memory area depending on</div><div class='del'>-their type (NSR, SR, SEI, REI, etc).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be "marvell,cp110-icu"</div><div class='del'>-</div><div class='del'>-- reg: Should contain ICU registers location and length.</div><div class='del'>-</div><div class='del'>-Subnodes: Each group of interrupt is declared as a subnode of the ICU,</div><div class='del'>-with their own compatible.</div><div class='del'>-</div><div class='del'>-Required properties for the icu_nsr/icu_sei subnodes:</div><div class='del'>-</div><div class='del'>-- compatible: Should be one of:</div><div class='del'>-              * "marvell,cp110-icu-nsr"</div><div class='del'>-	      * "marvell,cp110-icu-sr"</div><div class='del'>-	      * "marvell,cp110-icu-sei"</div><div class='del'>-	      * "marvell,cp110-icu-rei"</div><div class='del'>-</div><div class='del'>-- #interrupt-cells: Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 2.</div><div class='del'>-</div><div class='del'>-  The 1st cell is the index of the interrupt in the ICU unit.</div><div class='del'>-</div><div class='del'>-  The 2nd cell is the type of the interrupt. See arm,gic.txt for</div><div class='del'>-  details.</div><div class='del'>-</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt</div><div class='del'>-  controller.</div><div class='del'>-</div><div class='del'>-- msi-parent: Should point to the GICP controller, the GIC extension</div><div class='del'>-  that allows to trigger interrupts using MSG memory mapped</div><div class='del'>-  transactions.</div><div class='del'>-</div><div class='del'>-Note: each 'interrupts' property referring to any 'icu_xxx' node shall</div><div class='del'>-      have a different number within [0:206].</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-icu: interrupt-controller@1e0000 {</div><div class='del'>-	compatible = "marvell,cp110-icu";</div><div class='del'>-	reg = &lt;0x1e0000 0x440&gt;;</div><div class='del'>-</div><div class='del'>-	CP110_LABEL(icu_nsr): interrupt-controller@10 {</div><div class='del'>-		compatible = "marvell,cp110-icu-nsr";</div><div class='del'>-		reg = &lt;0x10 0x20&gt;;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		msi-parent = &lt;&amp;gicp&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	CP110_LABEL(icu_sei): interrupt-controller@50 {</div><div class='del'>-		compatible = "marvell,cp110-icu-sei";</div><div class='del'>-		reg = &lt;0x50 0x10&gt;;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		msi-parent = &lt;&amp;sei&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-node1 {</div><div class='del'>-	interrupt-parent = &lt;&amp;icu_nsr&gt;;</div><div class='del'>-	interrupts = &lt;106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-node2 {</div><div class='del'>-	interrupt-parent = &lt;&amp;icu_sei&gt;;</div><div class='del'>-	interrupts = &lt;107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Would not work with the above nodes */</div><div class='del'>-node3 {</div><div class='del'>-	interrupt-parent = &lt;&amp;icu_nsr&gt;;</div><div class='del'>-	interrupts = &lt;107 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-The legacy bindings were different in this way:</div><div class='del'>-</div><div class='del'>-- #interrupt-cells: The value was 3.</div><div class='del'>-	The 1st cell was the group type of the ICU interrupt. Possible</div><div class='del'>-	group types were:</div><div class='del'>-	ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure</div><div class='del'>-	ICU_GRP_SR  (0x1) : Shared peripheral interrupt, secure</div><div class='del'>-	ICU_GRP_SEI (0x4) : System error interrupt</div><div class='del'>-	ICU_GRP_REI (0x5) : RAM error interrupt</div><div class='del'>-	The 2nd cell was the index of the interrupt in the ICU unit.</div><div class='del'>-	The 3rd cell was the type of the interrupt. See arm,gic.txt for</div><div class='del'>-	details.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-icu: interrupt-controller@1e0000 {</div><div class='del'>-	compatible = "marvell,cp110-icu";</div><div class='del'>-	reg = &lt;0x1e0000 0x440&gt;;</div><div class='del'>-</div><div class='del'>-	#interrupt-cells = &lt;3&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	msi-parent = &lt;&amp;gicp&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-node1 {</div><div class='del'>-	interrupt-parent = &lt;&amp;icu&gt;;</div><div class='del'>-	interrupts = &lt;ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt<br/>deleted file mode 100644<br/>index 0ebfc952cb34..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-</div><div class='del'>-* Marvell ODMI for MSI support</div><div class='del'>-</div><div class='del'>-Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller</div><div class='del'>-which can be used by on-board peripheral for MSI interrupts.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible           : The value here should contain:</div><div class='del'>-</div><div class='del'>-    "marvell,ap806-odmi-controller", "marvell,odmi-controller".</div><div class='del'>-</div><div class='del'>-- interrupt,controller : Identifies the node as an interrupt controller.</div><div class='del'>-</div><div class='del'>-- msi-controller       : Identifies the node as an MSI controller.</div><div class='del'>-</div><div class='del'>-- marvell,odmi-frames  : Number of ODMI frames available. Each frame</div><div class='del'>-                         provides a number of events.</div><div class='del'>-</div><div class='del'>-- reg                  : List of register definitions, one for each</div><div class='del'>-                         ODMI frame.</div><div class='del'>-</div><div class='del'>-- marvell,spi-base     : List of GIC base SPI interrupts, one for each</div><div class='del'>-                         ODMI frame. Those SPI interrupts are 0-based,</div><div class='del'>-                         i.e marvell,spi-base = &lt;128&gt; will use SPI #96.</div><div class='del'>-                         See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml</div><div class='del'>-                         for details about the GIC Device Tree binding.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	odmi: odmi@300000 {</div><div class='del'>-		compatible = "marvell,ap806-odmi-controller",</div><div class='del'>-			     "marvell,odmi-controller";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		msi-controller;</div><div class='del'>-		marvell,odmi-frames = &lt;4&gt;;</div><div class='del'>-		reg = &lt;0x300000 0x4000&gt;,</div><div class='del'>-		      &lt;0x304000 0x4000&gt;,</div><div class='del'>-		      &lt;0x308000 0x4000&gt;,</div><div class='del'>-		      &lt;0x30C000 0x4000&gt;;</div><div class='del'>-		marvell,spi-base = &lt;128&gt;, &lt;136&gt;, &lt;144&gt;, &lt;152&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml<br/>new file mode 100644<br/>index 000000000000..9ec1ed4a5155<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell ODMI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can</div><div class='add'>+  be used by on-board peripherals for MSI interrupts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,odmi-controller</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: List of register definitions, one for each ODMI frame.</div><div class='add'>+</div><div class='add'>+  msi-controller: true</div><div class='add'>+</div><div class='add'>+  marvell,odmi-frames:</div><div class='add'>+    description: Number of ODMI frames available. Each frame provides a number of events.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  marvell,spi-base:</div><div class='add'>+    description: &gt;</div><div class='add'>+      List of GIC base SPI interrupts, one for each ODMI frame. Those SPI</div><div class='add'>+      interrupts are 0-based, i.e. marvell,spi-base = &lt;128&gt; will use SPI #96.</div><div class='add'>+      See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml</div><div class='add'>+      for details.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - msi-controller</div><div class='add'>+  - marvell,odmi-frames</div><div class='add'>+  - marvell,spi-base</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    msi-controller@300000 {</div><div class='add'>+        compatible = "marvell,odmi-controller";</div><div class='add'>+        msi-controller;</div><div class='add'>+        marvell,odmi-frames = &lt;4&gt;;</div><div class='add'>+        reg = &lt;0x300000 0x4000&gt;, &lt;0x304000 0x4000&gt;, &lt;0x308000 0x4000&gt;, &lt;0x30C000 0x4000&gt;;</div><div class='add'>+        marvell,spi-base = &lt;128&gt;, &lt;136&gt;, &lt;144&gt;, &lt;152&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml<br/>new file mode 100644<br/>index 000000000000..e1310ec65382<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/marvell,orion-bridge-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Orion SoC Bridge Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Gregory Clement &lt;gregory.clement@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,orion-bridge-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: Bridge interrupt of the main interrupt controller</div><div class='add'>+</div><div class='add'>+  marvell,#interrupts:</div><div class='add'>+    description: Number of interrupts provided by bridge interrupt controller.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@20110 {</div><div class='add'>+        compatible = "marvell,orion-bridge-intc";</div><div class='add'>+        reg = &lt;0x20110 0x8&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+        /* Dove bridge provides 5 interrupts */</div><div class='add'>+        marvell,#interrupts = &lt;5&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt<br/>deleted file mode 100644<br/>index 2c11ac76fac9..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-Marvell Orion SoC interrupt controllers</div><div class='del'>-</div><div class='del'>-* Main interrupt controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: shall be "marvell,orion-intc"</div><div class='del'>-- reg: base address(es) of interrupt registers starting with CAUSE register</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells: number of cells to encode an interrupt source, shall be 1</div><div class='del'>-</div><div class='del'>-The interrupt sources map to the corresponding bits in the interrupt</div><div class='del'>-registers, i.e.</div><div class='del'>-- 0 maps to bit 0 of first base address,</div><div class='del'>-- 1 maps to bit 1 of first base address,</div><div class='del'>-- 32 maps to bit 0 of second base address, and so on.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	intc: interrupt-controller {</div><div class='del'>-		compatible = "marvell,orion-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		 /* Dove has 64 first level interrupts */</div><div class='del'>-		reg = &lt;0x20200 0x10&gt;, &lt;0x20210 0x10&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-* Bridge interrupt controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: shall be "marvell,orion-bridge-intc"</div><div class='del'>-- reg: base address of bridge interrupt registers starting with CAUSE register</div><div class='del'>-- interrupts: bridge interrupt of the main interrupt controller</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells: number of cells to encode an interrupt source, shall be 1</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- marvell,#interrupts: number of interrupts provided by bridge interrupt</div><div class='del'>-      controller, defaults to 32 if not set</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	bridge_intc: interrupt-controller {</div><div class='del'>-		compatible = "marvell,orion-bridge-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x20110 0x8&gt;;</div><div class='del'>-		interrupts = &lt;0&gt;;</div><div class='del'>-		/* Dove bridge provides 5 interrupts */</div><div class='del'>-		marvell,#interrupts = &lt;5&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt<br/>deleted file mode 100644<br/>index 0beafed502f5..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-Marvell SEI (System Error Interrupt) Controller</div><div class='del'>------------------------------------------------</div><div class='del'>-</div><div class='del'>-Marvell SEI (System Error Interrupt) controller is an interrupt</div><div class='del'>-aggregator. It receives interrupts from several sources and aggregates</div><div class='del'>-them to a single interrupt line (an SPI) on the parent interrupt</div><div class='del'>-controller.</div><div class='del'>-</div><div class='del'>-This interrupt controller can handle up to 64 SEIs, a set comes from the</div><div class='del'>-AP and is wired while a second set comes from the CPs by the mean of</div><div class='del'>-MSIs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be one of:</div><div class='del'>-              * "marvell,ap806-sei"</div><div class='del'>-- reg: SEI registers location and length.</div><div class='del'>-- interrupts: identifies the parent IRQ that will be triggered.</div><div class='del'>-- #interrupt-cells: number of cells to define an SEI wired interrupt</div><div class='del'>-                    coming from the AP, should be 1. The cell is the IRQ</div><div class='del'>-                    number.</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-                        for AP interrupts.</div><div class='del'>-- msi-controller: identifies the node as an MSI controller for the CPs</div><div class='del'>-                  interrupts.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-        sei: interrupt-controller@3f0200 {</div><div class='del'>-                compatible = "marvell,ap806-sei";</div><div class='del'>-                reg = &lt;0x3f0200 0x40&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                #interrupt-cells = &lt;1&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                msi-controller;</div><div class='del'>-        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt<br/>deleted file mode 100644<br/>index c3a1b37c4c35..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,67 +0,0 @@</div><div class='del'>-Microchip PIC32 Interrupt Controller</div><div class='del'>-====================================</div><div class='del'>-</div><div class='del'>-The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).</div><div class='del'>-It handles all internal and external interrupts. This controller exists outside</div><div class='del'>-of the CPU and is the arbitrator of all interrupts (including interrupts from</div><div class='del'>-the CPU itself) before they are presented to the CPU.</div><div class='del'>-</div><div class='del'>-External interrupts have a software configurable edge polarity. Non external</div><div class='del'>-interrupts have a type and polarity that is determined by the source of the</div><div class='del'>-interrupt.</div><div class='del'>-</div><div class='del'>-Required properties</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-- compatible: Should be "microchip,pic32mzda-evic"</div><div class='del'>-- reg: Specifies physical base address and size of register range.</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt cells: Specifies the number of cells used to encode an interrupt</div><div class='del'>-  source connected to this controller. The value shall be 2 and interrupt</div><div class='del'>-  descriptor shall have the following format:</div><div class='del'>-</div><div class='del'>-	&lt;hw_irq irq_type&gt;</div><div class='del'>-</div><div class='del'>-  hw_irq - represents the hardware interrupt number as in the data sheet.</div><div class='del'>-  irq_type - is used to describe the type and polarity of an interrupt. For</div><div class='del'>-  internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and</div><div class='del'>-  IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use</div><div class='del'>-  IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.</div><div class='del'>-</div><div class='del'>-Optional properties</div><div class='del'>--------------------</div><div class='del'>-- microchip,external-irqs: u32 array of external interrupts with software</div><div class='del'>-  polarity configuration. This array corresponds to the bits in the INTCON</div><div class='del'>-  SFR.</div><div class='del'>-</div><div class='del'>-Example</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-evic: interrupt-controller@1f810000 {</div><div class='del'>-	compatible = "microchip,pic32mzda-evic";</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	reg = &lt;0x1f810000 0x1000&gt;;</div><div class='del'>-	microchip,external-irqs = &lt;3 8 13 18 23&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Each device/peripheral must request its interrupt line with the associated type</div><div class='del'>-and polarity.</div><div class='del'>-</div><div class='del'>-Internal interrupt DTS snippet</div><div class='del'>-------------------------------</div><div class='del'>-</div><div class='del'>-device@1f800000 {</div><div class='del'>-	...</div><div class='del'>-	interrupts = &lt;113 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	...</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-External interrupt DTS snippet</div><div class='del'>-------------------------------</div><div class='del'>-</div><div class='del'>-device@1f800000 {</div><div class='del'>-	...</div><div class='del'>-	interrupts = &lt;3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	...</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml b/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml<br/>new file mode 100644<br/>index 000000000000..74bfc42693f0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/microchip,pic32mzda-evic.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/microchip,pic32mzda-evic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip PIC32 EVIC Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Cristian Birsan &lt;cristian.birsan@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).</div><div class='add'>+  It handles all internal and external interrupts. This controller exists</div><div class='add'>+  outside of the CPU and is the arbitrator of all interrupts (including</div><div class='add'>+  interrupts from the CPU itself) before they are presented to the CPU.</div><div class='add'>+</div><div class='add'>+  External interrupts have a software configurable edge polarity. Non external</div><div class='add'>+  interrupts have a type and polarity that is determined by the source of the</div><div class='add'>+  interrupt.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: microchip,pic32mzda-evic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  microchip,external-irqs:</div><div class='add'>+    description:</div><div class='add'>+      External interrupts with software polarity configuration corresponding to</div><div class='add'>+      the INTCON SFR bits.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+      interrupt-controller@1f810000 {</div><div class='add'>+          compatible = "microchip,pic32mzda-evic";</div><div class='add'>+          reg = &lt;0x1f810000 0x1000&gt;;</div><div class='add'>+          interrupt-controller;</div><div class='add'>+          #interrupt-cells = &lt;2&gt;;</div><div class='add'>+          microchip,external-irqs = &lt;3 8 13 18 23&gt;;</div><div class='add'>+      };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/open-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/open-pic.txt<br/>deleted file mode 100644<br/>index ccbbfdc53c72..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/open-pic.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/open-pic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,97 +0,0 @@</div><div class='del'>-* Open PIC Binding</div><div class='del'>-</div><div class='del'>-This binding specifies what properties must be available in the device tree</div><div class='del'>-representation of an Open PIC compliant interrupt controller.  This binding is</div><div class='del'>-based on the binding defined for Open PIC in [1] and is a superset of that</div><div class='del'>-binding.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  NOTE: Many of these descriptions were paraphrased here from [1] to aid</div><div class='del'>-        readability.</div><div class='del'>-</div><div class='del'>-    - compatible: Specifies the compatibility list for the PIC.  The type</div><div class='del'>-      shall be &lt;string&gt; and the value shall include "open-pic".</div><div class='del'>-</div><div class='del'>-    - reg: Specifies the base physical address(s) and size(s) of this</div><div class='del'>-      PIC's addressable register space.  The type shall be &lt;prop-encoded-array&gt;.</div><div class='del'>-</div><div class='del'>-    - interrupt-controller: The presence of this property identifies the node</div><div class='del'>-      as an Open PIC.  No property value shall be defined.</div><div class='del'>-</div><div class='del'>-    - #interrupt-cells: Specifies the number of cells needed to encode an</div><div class='del'>-      interrupt source.  The type shall be a &lt;u32&gt; and the value shall be 2.</div><div class='del'>-</div><div class='del'>-    - #address-cells: Specifies the number of cells needed to encode an</div><div class='del'>-      address.  The type shall be &lt;u32&gt; and the value shall be 0.  As such,</div><div class='del'>-      'interrupt-map' nodes do not have to specify a parent unit address.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-    - pic-no-reset: The presence of this property indicates that the PIC</div><div class='del'>-      shall not be reset during runtime initialization.  No property value shall</div><div class='del'>-      be defined.  The presence of this property also mandates that any</div><div class='del'>-      initialization related to interrupt sources shall be limited to sources</div><div class='del'>-      explicitly referenced in the device tree.</div><div class='del'>-</div><div class='del'>-* Interrupt Specifier Definition</div><div class='del'>-</div><div class='del'>-  Interrupt specifiers consists of 2 cells encoded as</div><div class='del'>-  follows:</div><div class='del'>-</div><div class='del'>-    - &lt;1st-cell&gt;: The interrupt-number that identifies the interrupt source.</div><div class='del'>-</div><div class='del'>-    - &lt;2nd-cell&gt;: The level-sense information, encoded as follows:</div><div class='del'>-                    0 = low-to-high edge triggered</div><div class='del'>-                    1 = active low level-sensitive</div><div class='del'>-                    2 = active high level-sensitive</div><div class='del'>-                    3 = high-to-low edge triggered</div><div class='del'>-</div><div class='del'>-* Examples</div><div class='del'>-</div><div class='del'>-Example 1:</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * An Open PIC interrupt controller</div><div class='del'>-	 */</div><div class='del'>-	mpic: pic@40000 {</div><div class='del'>-		// This is an interrupt controller node.</div><div class='del'>-		interrupt-controller;</div><div class='del'>-</div><div class='del'>-		// No address cells so that 'interrupt-map' nodes which reference</div><div class='del'>-		// this Open PIC node do not need a parent address specifier.</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		// Two cells to encode interrupt sources.</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		// Offset address of 0x40000 and size of 0x40000.</div><div class='del'>-		reg = &lt;0x40000 0x40000&gt;;</div><div class='del'>-</div><div class='del'>-		// Compatible with Open PIC.</div><div class='del'>-		compatible = "open-pic";</div><div class='del'>-</div><div class='del'>-		// The PIC shall not be reset.</div><div class='del'>-		pic-no-reset;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 2:</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * An interrupt generating device that is wired to an Open PIC.</div><div class='del'>-	 */</div><div class='del'>-	serial0: serial@4500 {</div><div class='del'>-		// Interrupt source '42' that is active high level-sensitive.</div><div class='del'>-		// Note that there are only two cells as specified in the interrupt</div><div class='del'>-		// parent's '#interrupt-cells' property.</div><div class='del'>-		interrupts = &lt;42 2&gt;;</div><div class='del'>-</div><div class='del'>-		// The interrupt controller that this device is wired to.</div><div class='del'>-		interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-* References</div><div class='del'>-</div><div class='del'>-[1] Devicetree Specification</div><div class='del'>-    (https://www.devicetree.org/specifications/)</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml<br/>new file mode 100644<br/>index 000000000000..ab32a91af4c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-cpu-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-cpu-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Atheros ath79 CPU interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alban Bedel &lt;albeu@free.fr&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  On most SoC the IRQ controller need to flush the DDR FIFO before running the</div><div class='add'>+  interrupt handler of some devices. This is configured using the</div><div class='add'>+  qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: qca,ar9132-cpu-intc</div><div class='add'>+          - const: qca,ar7100-cpu-intc</div><div class='add'>+      - items:</div><div class='add'>+          - const: qca,ar7100-cpu-intc</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  qca,ddr-wb-channel-interrupts:</div><div class='add'>+    description: List of interrupts needing a write buffer flush</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+  qca,ddr-wb-channels:</div><div class='add'>+    description: List of write buffer channel phandles for each interrupt</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+      interrupt-controller {</div><div class='add'>+          compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";</div><div class='add'>+</div><div class='add'>+          interrupt-controller;</div><div class='add'>+          #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+          qca,ddr-wb-channel-interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;;</div><div class='add'>+          qca,ddr-wb-channels = &lt;&amp;ddr_ctrl 3&gt;, &lt;&amp;ddr_ctrl 2&gt;,</div><div class='add'>+                                &lt;&amp;ddr_ctrl 0&gt;, &lt;&amp;ddr_ctrl 1&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      ddr_ctrl: memory-controller {</div><div class='add'>+          #qca,ddr-wb-channel-cells = &lt;1&gt;;</div><div class='add'>+      };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml<br/>new file mode 100644<br/>index 000000000000..ae813189f5ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/qca,ar7100-misc-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/qca,ar7100-misc-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alban Bedel &lt;albeu@free.fr&gt;</div><div class='add'>+  - Alexander Couzens &lt;lynxis@fe80.eu&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller is a secondary</div><div class='add'>+  controller for lower priority interrupts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: qca,ar9132-misc-intc</div><div class='add'>+          - const: qca,ar7100-misc-intc</div><div class='add'>+      - const: qca,ar7240-misc-intc</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@18060010 {</div><div class='add'>+        compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc";</div><div class='add'>+        reg = &lt;0x18060010 0x4&gt;;</div><div class='add'>+        interrupts = &lt;6&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt<br/>deleted file mode 100644<br/>index aabce7810d29..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/qca,ath79-cpu-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-Binding for Qualcomm Atheros AR7xxx/AR9XXX CPU interrupt controller</div><div class='del'>-</div><div class='del'>-On most SoC the IRQ controller need to flush the DDR FIFO before running</div><div class='del'>-the interrupt handler of some devices. This is configured using the</div><div class='del'>-qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: has to be "qca,&lt;soctype&gt;-cpu-intc", "qca,ar7100-cpu-intc"</div><div class='del'>-  as fallback</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode interrupt</div><div class='del'>-		     source, should be 1 for intc</div><div class='del'>-</div><div class='del'>-Please refer to interrupts.txt in this directory for details of the common</div><div class='del'>-Interrupt Controllers bindings used by client devices.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- qca,ddr-wb-channel-interrupts: List of the interrupts needing a write</div><div class='del'>-  buffer flush</div><div class='del'>-- qca,ddr-wb-channels: List of phandles to the write buffer channels for</div><div class='del'>-  each interrupt. If qca,ddr-wb-channel-interrupts is not present the interrupt</div><div class='del'>-  default to the entry's index.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	interrupt-controller {</div><div class='del'>-		compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		qca,ddr-wb-channel-interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;;</div><div class='del'>-		qca,ddr-wb-channels = &lt;&amp;ddr_ctrl 3&gt;, &lt;&amp;ddr_ctrl 2&gt;,</div><div class='del'>-					&lt;&amp;ddr_ctrl 0&gt;, &lt;&amp;ddr_ctrl 1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	ddr_ctrl: memory-controller@18000000 {</div><div class='del'>-		...</div><div class='del'>-		#qca,ddr-wb-channel-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt<br/>deleted file mode 100644<br/>index ad70006c1848..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,45 +0,0 @@</div><div class='del'>-Binding for Qualcomm Atheros AR7xxx/AR9XXX MISC interrupt controller</div><div class='del'>-</div><div class='del'>-The MISC interrupt controller is a secondary controller for lower priority</div><div class='del'>-interrupt.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: has to be "qca,&lt;soctype&gt;-cpu-intc", "qca,ar7100-misc-intc" or</div><div class='del'>-  "qca,&lt;soctype&gt;-cpu-intc", "qca,ar7240-misc-intc"</div><div class='del'>-- reg: Base address and size of the controllers memory area</div><div class='del'>-- interrupts: Interrupt specifier for the controllers interrupt.</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode interrupt</div><div class='del'>-		     source, should be 1</div><div class='del'>-</div><div class='del'>-Compatible fallback depends on the SoC. Use ar7100 for ar71xx and ar913x,</div><div class='del'>-use ar7240 for all other SoCs.</div><div class='del'>-</div><div class='del'>-Please refer to interrupts.txt in this directory for details of the common</div><div class='del'>-Interrupt Controllers bindings used by client devices.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	interrupt-controller@18060010 {</div><div class='del'>-		compatible = "qca,ar9132-misc-intc", "qca,ar7100-misc-intc";</div><div class='del'>-		reg = &lt;0x18060010 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='del'>-		interrupts = &lt;6&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Another example:</div><div class='del'>-</div><div class='del'>-	interrupt-controller@18060010 {</div><div class='del'>-		compatible = "qca,ar9331-misc-intc", qca,ar7240-misc-intc";</div><div class='del'>-		reg = &lt;0x18060010 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='del'>-		interrupts = &lt;6&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt<br/>deleted file mode 100644<br/>index 9a5d562435ea..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-* ARC700 incore Interrupt Controller</div><div class='del'>-</div><div class='del'>-  The core interrupt controller provides 32 prioritised interrupts (2 levels)</div><div class='del'>-  to ARC700 core.</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-</div><div class='del'>-- compatible: "snps,arc700-intc"</div><div class='del'>-- interrupt-controller: This is an interrupt controller.</div><div class='del'>-- #interrupt-cells: Must be &lt;1&gt;.</div><div class='del'>-</div><div class='del'>-  Single Cell "interrupts" property of a device specifies the IRQ number</div><div class='del'>-  between 0 to 31</div><div class='del'>-</div><div class='del'>-  intc accessed via the special ARC AUX register interface, hence "reg" property</div><div class='del'>-  is not specified.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller {</div><div class='del'>-		compatible = "snps,arc700-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml<br/>new file mode 100644<br/>index 000000000000..000a734d997c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/snps,arc700-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/snps,arc700-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARC700 incore Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vineet Gupta &lt;vgupta@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  The core interrupt controller provides 32 prioritized interrupts (2 levels)</div><div class='add'>+  to ARC700 core.</div><div class='add'>+</div><div class='add'>+  intc accessed via the special ARC AUX register interface, hence "reg" property</div><div class='add'>+  is not specified.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,arc700-intc</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    description: An interrupt number 0-31</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+        compatible = "snps,arc700-intc";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt<br/>deleted file mode 100644<br/>index a5c1db95b3ec..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-* ARC-HS Interrupt Distribution Unit</div><div class='del'>-</div><div class='del'>-  This optional 2nd level interrupt controller can be used in SMP configurations</div><div class='del'>-  for dynamic IRQ routing, load balancing of common/external IRQs towards core</div><div class='del'>-  intc.</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-</div><div class='del'>-- compatible: "snps,archs-idu-intc"</div><div class='del'>-- interrupt-controller: This is an interrupt controller.</div><div class='del'>-- #interrupt-cells: Must be &lt;1&gt; or &lt;2&gt;.</div><div class='del'>-</div><div class='del'>-  Value of the first cell specifies the "common" IRQ from peripheral to IDU.</div><div class='del'>-  Number N of the particular interrupt line of IDU corresponds to the line N+24</div><div class='del'>-  of the core interrupt controller.</div><div class='del'>-</div><div class='del'>-  The (optional) second cell specifies any of the following flags:</div><div class='del'>-    - bits[3:0] trigger type and level flags</div><div class='del'>-        1 = low-to-high edge triggered</div><div class='del'>-        2 = NOT SUPPORTED (high-to-low edge triggered)</div><div class='del'>-        4 = active high level-sensitive &lt;&lt;&lt; DEFAULT</div><div class='del'>-        8 = NOT SUPPORTED (active low level-sensitive)</div><div class='del'>-  When no second cell is specified, the interrupt is assumed to be level</div><div class='del'>-  sensitive.</div><div class='del'>-</div><div class='del'>-  The interrupt controller is accessed via the special ARC AUX register</div><div class='del'>-  interface, hence "reg" property is not specified.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	core_intc: core-interrupt-controller {</div><div class='del'>-		compatible = "snps,archs-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	idu_intc: idu-interrupt-controller {</div><div class='del'>-		compatible = "snps,archs-idu-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	some_device: serial@c0fc1000 {</div><div class='del'>-		interrupt-parent = &lt;&amp;idu_intc&gt;;</div><div class='del'>-		interrupts = &lt;0&gt;;	/* upstream idu IRQ #24 */</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml<br/>new file mode 100644<br/>index 000000000000..286a964f23e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/snps,archs-idu-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARC-HS Interrupt Distribution Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vineet Gupta &lt;vgupta@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  ARC-HS Interrupt Distribution Unit is an optional 2nd level interrupt</div><div class='add'>+  controller which can be used in SMP configurations for dynamic IRQ routing,</div><div class='add'>+  load balancing of common/external IRQs towards core intc.</div><div class='add'>+</div><div class='add'>+  The interrupt controller is accessed via the special ARC AUX register</div><div class='add'>+  interface, hence "reg" property is not specified.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,archs-idu-intc</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    description: |</div><div class='add'>+      Number of interrupt specifier cells:</div><div class='add'>+        - 1: only a common IRQ is specified.</div><div class='add'>+        - 2: a second cell encodes trigger type and level flags:</div><div class='add'>+            1 = low-to-high edge triggered</div><div class='add'>+            4 = active high level-sensitive (default)</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+        compatible = "snps,archs-idu-intc";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt<br/>deleted file mode 100644<br/>index 69f326d6a5ad..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-* ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-</div><div class='del'>-- compatible: "snps,archs-intc"</div><div class='del'>-- interrupt-controller: This is an interrupt controller.</div><div class='del'>-- #interrupt-cells: Must be &lt;1&gt;.</div><div class='del'>-</div><div class='del'>-  Single Cell "interrupts" property of a device specifies the IRQ number</div><div class='del'>-  between 16 to 256</div><div class='del'>-</div><div class='del'>-  intc accessed via the special ARC AUX register interface, hence "reg" property</div><div class='del'>-  is not specified.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller {</div><div class='del'>-		compatible = "snps,archs-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupts = &lt;16 17 18 19 20 21 22 23 24 25&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml<br/>new file mode 100644<br/>index 000000000000..9d248ef7fe3d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/snps,archs-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/snps,archs-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARC-HS incore Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vineet Gupta &lt;vgupta@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  ARC-HS incore Interrupt Controller provided by cores implementing ARCv2 ISA.</div><div class='add'>+  intc accessed via the special ARC AUX register interface, hence "reg" property</div><div class='add'>+  is not specified.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,archs-intc</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: List of IRQ numbers between 16 and 256</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - minimum: 16</div><div class='add'>+          maximum: 256</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+        compatible = "snps,archs-intc";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupts = &lt;16&gt;, &lt;17&gt;, &lt;18&gt;, &lt;19&gt;, &lt;20&gt;, &lt;21&gt;, &lt;22&gt;, &lt;23&gt;, &lt;24&gt;, &lt;25&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt<br/>deleted file mode 100644<br/>index 2db59df9408f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-Synopsys DesignWare APB interrupt controller (dw_apb_ictl)</div><div class='del'>-</div><div class='del'>-Synopsys DesignWare provides interrupt controller IP for APB known as</div><div class='del'>-dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with</div><div class='del'>-APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt</div><div class='del'>-controller in some SoCs, e.g. Hisilicon SD5203.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: shall be "snps,dw-apb-ictl"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region starting with ENABLE_LOW register</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1</div><div class='del'>-</div><div class='del'>-Additional required property when it's used as secondary interrupt controller:</div><div class='del'>-- interrupts: interrupt reference to primary interrupt controller</div><div class='del'>-</div><div class='del'>-The interrupt sources map to the corresponding bits in the interrupt</div><div class='del'>-registers, i.e.</div><div class='del'>-- 0 maps to bit 0 of low interrupts,</div><div class='del'>-- 1 maps to bit 1 of low interrupts,</div><div class='del'>-- 32 maps to bit 0 of high interrupts,</div><div class='del'>-- 33 maps to bit 1 of high interrupts,</div><div class='del'>-- (optional) fast interrupts start at 64.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	/* dw_apb_ictl is used as secondary interrupt controller */</div><div class='del'>-	aic: interrupt-controller@3000 {</div><div class='del'>-		compatible = "snps,dw-apb-ictl";</div><div class='del'>-		reg = &lt;0x3000 0xc00&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* dw_apb_ictl is used as primary interrupt controller */</div><div class='del'>-	vic: interrupt-controller@10130000 {</div><div class='del'>-		compatible = "snps,dw-apb-ictl";</div><div class='del'>-		reg = &lt;0x10130000 0x1000&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml<br/>new file mode 100644<br/>index 000000000000..6b59b600a037<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys DesignWare APB interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;</div><div class='add'>+  - Zhen Lei &lt;thunder.leizhen@huawei.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Synopsys DesignWare provides interrupt controller IP for APB known as</div><div class='add'>+  dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs</div><div class='add'>+  with APB bus, e.g. Marvell Armada 1500. It can also be used as primary</div><div class='add'>+  interrupt controller in some SoCs, e.g. Hisilicon SD5203.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,dw-apb-ictl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: &gt;</div><div class='add'>+      Interrupt input connected to the primary interrupt controller when used</div><div class='add'>+      as a secondary controller. The interrupt specifier maps to bits in the</div><div class='add'>+      low and high interrupt registers (0⇒bit 0 low, 1⇒bit 1 low, 32⇒bit 0 high,</div><div class='add'>+      33⇒bit 1 high, fast interrupts start at 64).</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    interrupt-controller@3000 {</div><div class='add'>+        compatible = "snps,dw-apb-ictl";</div><div class='add'>+        reg = &lt;0x3000 0xc00&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@10130000 {</div><div class='add'>+        compatible = "snps,dw-apb-ictl";</div><div class='add'>+        reg = &lt;0x10130000 0x1000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml<br/>index e1ffd55fa7bf..f6b8b1d92f79 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml</a></div><div class='hunk'>@@ -18,7 +18,9 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: sophgo,sg2042-msi</div><div class='add'>+    enum:</div><div class='add'>+      - sophgo,sg2042-msi</div><div class='add'>+      - sophgo,sg2044-msi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml<br/>new file mode 100644<br/>index 000000000000..27d36173366a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/st,spear300-shirq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SPEAr3xx Shared IRQ controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='add'>+  - Shiraz Hashim &lt;shiraz.linux.kernel@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  SPEAr3xx architecture includes shared/multiplexed irqs for certain set of</div><div class='add'>+  devices. The multiplexor provides a single interrupt to parent interrupt</div><div class='add'>+  controller (VIC) on behalf of a group of devices.</div><div class='add'>+</div><div class='add'>+  There can be multiple groups available on SPEAr3xx variants but not exceeding</div><div class='add'>+  4. The number of devices in a group can differ, further they may share same</div><div class='add'>+  set of status/mask registers spanning across different bit masks. Also in some</div><div class='add'>+  cases the group may not have enable or other registers. This makes software</div><div class='add'>+  little complex.</div><div class='add'>+</div><div class='add'>+  A single node in the device tree is used to describe the shared interrupt</div><div class='add'>+  multiplexer (one node for all groups). A group in the interrupt controller</div><div class='add'>+  shares config/control registers with other groups. For example, a 32-bit</div><div class='add'>+  interrupt enable/disable config register can accommodate up to 4 interrupt</div><div class='add'>+  groups.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - st,spear300-shirq</div><div class='add'>+      - st,spear310-shirq</div><div class='add'>+      - st,spear320-shirq</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: Interrupt specifier array for SHIRQ groups</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@b3000000 {</div><div class='add'>+        compatible = "st,spear320-shirq";</div><div class='add'>+        reg = &lt;0xb3000000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;28 29 30 1&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt b/Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt<br/>deleted file mode 100644<br/>index a407c499b3cc..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-* SPEAr Shared IRQ layer (shirq)</div><div class='del'>-</div><div class='del'>-SPEAr3xx architecture includes shared/multiplexed irqs for certain set</div><div class='del'>-of devices. The multiplexor provides a single interrupt to parent</div><div class='del'>-interrupt controller (VIC) on behalf of a group of devices.</div><div class='del'>-</div><div class='del'>-There can be multiple groups available on SPEAr3xx variants but not</div><div class='del'>-exceeding 4. The number of devices in a group can differ, further they</div><div class='del'>-may share same set of status/mask registers spanning across different</div><div class='del'>-bit masks. Also in some cases the group may not have enable or other</div><div class='del'>-registers. This makes software little complex.</div><div class='del'>-</div><div class='del'>-A single node in the device tree is used to describe the shared</div><div class='del'>-interrupt multiplexor (one node for all groups). A group in the</div><div class='del'>-interrupt controller shares config/control registers with other groups.</div><div class='del'>-For example, a 32-bit interrupt enable/disable config register can</div><div class='del'>-accommodate up to 4 interrupt groups.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: should be, either of</div><div class='del'>-     - "st,spear300-shirq"</div><div class='del'>-     - "st,spear310-shirq"</div><div class='del'>-     - "st,spear320-shirq"</div><div class='del'>-  - interrupt-controller: Identifies the node as an interrupt controller.</div><div class='del'>-  - #interrupt-cells: should be &lt;1&gt; which basically contains the offset</div><div class='del'>-    (starting from 0) of interrupts for all the groups.</div><div class='del'>-  - reg: Base address and size of shirq registers.</div><div class='del'>-  - interrupts: The list of interrupts generated by the groups which are</div><div class='del'>-    then connected to a parent interrupt controller. Each group is</div><div class='del'>-    associated with one of the interrupts, hence number of interrupts (to</div><div class='del'>-    parent) is equal to number of groups. The format of the interrupt</div><div class='del'>-    specifier depends in the interrupt parent controller.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-The following is an example from the SPEAr320 SoC dtsi file.</div><div class='del'>-</div><div class='del'>-shirq: interrupt-controller@b3000000 {</div><div class='del'>-	compatible = "st,spear320-shirq";</div><div class='del'>-	reg = &lt;0xb3000000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;28 29 30 1&gt;;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	interrupt-controller;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml<br/>new file mode 100644<br/>index 000000000000..f1a15d725cd6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800-irqc.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/technologic,ts4800-irqc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TS-4800 FPGA Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Damien Riegel &lt;damien.riegel@savoirfairelinux.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  TS-4800 FPGA has an internal interrupt controller. When one of the interrupts</div><div class='add'>+  is triggered, the SoC is notified, usually using a GPIO as parent interrupt</div><div class='add'>+  source.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: technologic,ts4800-irqc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@1000 {</div><div class='add'>+        compatible = "technologic,ts4800-irqc";</div><div class='add'>+        reg = &lt;0x1000 0x80&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupts = &lt;10&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt b/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt<br/>deleted file mode 100644<br/>index 341ae5909333..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/technologic,ts4800.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-TS-4800 FPGA interrupt controller</div><div class='del'>-</div><div class='del'>-TS-4800 FPGA has an internal interrupt controller. When one of the</div><div class='del'>-interrupts is triggered, the SoC is notified, usually using a GPIO as</div><div class='del'>-parent interrupt source.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "technologic,ts4800-irqc"</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an interrupt</div><div class='del'>-  source, should be 1.</div><div class='del'>-- interrupts: specifies the interrupt line in the interrupt-parent controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt<br/>deleted file mode 100644<br/>index 597e8a089fe4..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-* TI Common Platform Interrupt Controller</div><div class='del'>-</div><div class='del'>-Common Platform Interrupt Controller (cp_intc) is used on</div><div class='del'>-OMAP-L1x SoCs and can support several configurable number</div><div class='del'>-of interrupts.</div><div class='del'>-</div><div class='del'>-Main node required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be:</div><div class='del'>-	"ti,cp-intc"</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The type shall be a &lt;u32&gt; and the value shall be 1.</div><div class='del'>-</div><div class='del'>-  The cell contains the interrupt number in the range [0-128].</div><div class='del'>-- ti,intc-size: Number of interrupts handled by the interrupt controller.</div><div class='del'>-- reg: physical base address and size of the intc registers map.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@1 {</div><div class='del'>-		compatible = "ti,cp-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		ti,intc-size = &lt;101&gt;;</div><div class='del'>-		reg = &lt;0xfffee000 0x2000&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml<br/>new file mode 100644<br/>index 000000000000..77d018d20f9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/ti,cp-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/ti,cp-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI Common Platform Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;</div><div class='add'>+  </div><div class='add'>+description:</div><div class='add'>+  Common Platform Interrupt Controller (cp_intc) is used on OMAP-L1x SoCs and</div><div class='add'>+  can support several configurable number of interrupts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,cp-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description: Encodes an interrupt number in the range 0–128.</div><div class='add'>+</div><div class='add'>+  ti,intc-size:</div><div class='add'>+    description: Number of interrupts handled by the interrupt controller.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - ti,intc-size</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@fffee000 {</div><div class='add'>+        compatible = "ti,cp-intc";</div><div class='add'>+        reg = &lt;0xfffee000 0x2000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        ti,intc-size = &lt;101&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt<br/>deleted file mode 100644<br/>index 5f94d7739d8d..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-Keystone 2 IRQ controller IP</div><div class='del'>-</div><div class='del'>-On Keystone SOCs, DSP cores can send interrupts to ARM</div><div class='del'>-host using the IRQ controller IP. It provides 28 IRQ signals to ARM.</div><div class='del'>-The IRQ handler running on HOST OS can identify DSP signal source by</div><div class='del'>-analyzing SRCCx bits in IPCARx registers. This is one of the component</div><div class='del'>-used by the IPC mechanism used on Keystone SOCs.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: should be "ti,keystone-irq"</div><div class='del'>-- ti,syscon-dev : phandle and offset pair. The phandle to syscon used to</div><div class='del'>-			access device control registers and the offset inside</div><div class='del'>-			device control registers range.</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode interrupt</div><div class='del'>-					 source should be 1.</div><div class='del'>-- interrupts: interrupt reference to primary interrupt controller</div><div class='del'>-</div><div class='del'>-Please refer to interrupts.txt in this directory for details of the common</div><div class='del'>-Interrupt Controllers bindings used by client devices.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	kirq0: keystone_irq0@26202a0 {</div><div class='del'>-		compatible = "ti,keystone-irq";</div><div class='del'>-		ti,syscon-dev = &lt;&amp;devctrl 0x2a0&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 4 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dsp0: dsp0 {</div><div class='del'>-		compatible = "linux,rproc-user";</div><div class='del'>-		...</div><div class='del'>-		interrupt-parent = &lt;&amp;kirq0&gt;;</div><div class='del'>-		interrupts = &lt;10 2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml<br/>new file mode 100644<br/>index 000000000000..27d448d1786a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ti,keystone-irq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Keystone 2 IRQ controller IP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  On Keystone SOCs, DSP cores can send interrupts to ARM host using the IRQ</div><div class='add'>+  controller IP. It provides 28 IRQ signals to ARM. The IRQ handler running on</div><div class='add'>+  HOST OS can identify DSP signal source by analyzing SRCCx bits in IPCARx</div><div class='add'>+  registers. This is one of the component used by the IPC mechanism used on</div><div class='add'>+  Keystone SOCs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,keystone-irq</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ti,syscon-dev:</div><div class='add'>+    description: Phandle and offset to syscon device</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: Phandle to syscon device control registers</div><div class='add'>+          - description: Offset to control register</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+  - ti,syscon-dev</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    interrupt-controller@2a0 {</div><div class='add'>+      compatible = "ti,keystone-irq";</div><div class='add'>+      reg = &lt;0x2a0 0x4&gt;;</div><div class='add'>+      ti,syscon-dev = &lt;&amp;devctrl 0x2a0&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 4 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt<br/>deleted file mode 100644<br/>index 38ce5d037722..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-Omap2/3 intc controller</div><div class='del'>-</div><div class='del'>-On TI omap2 and 3 the intc interrupt controller can provide</div><div class='del'>-96 or 128 IRQ signals to the ARM host depending on the SoC.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: should be one of</div><div class='del'>-			"ti,omap2-intc"</div><div class='del'>-			"ti,omap3-intc"</div><div class='del'>-			"ti,dm814-intc"</div><div class='del'>-			"ti,dm816-intc"</div><div class='del'>-			"ti,am33xx-intc"</div><div class='del'>-</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode interrupt</div><div class='del'>-		     source, should be 1 for intc</div><div class='del'>-- interrupts: interrupt reference to primary interrupt controller</div><div class='del'>-</div><div class='del'>-Please refer to interrupts.txt in this directory for details of the common</div><div class='del'>-Interrupt Controllers bindings used by client devices.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	intc: interrupt-controller@48200000 {</div><div class='del'>-		compatible = "ti,omap3-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x48200000 0x1000&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml<br/>new file mode 100644<br/>index 000000000000..cb118180621f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/ti,omap-intc-irq.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/ti,omap-intc-irq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI OMAP Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  On TI omap2 and 3 the intc interrupt controller can provide 96 or 128 IRQ</div><div class='add'>+  signals to the ARM host depending on the SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,omap2-intc</div><div class='add'>+      - ti,omap3-intc</div><div class='add'>+      - ti,dm814-intc</div><div class='add'>+      - ti,dm816-intc</div><div class='add'>+      - ti,am33xx-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@48200000 {</div><div class='add'>+        compatible = "ti,omap3-intc";</div><div class='add'>+        reg = &lt;0x48200000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;32&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt<br/>deleted file mode 100644<br/>index f2583e6ec060..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/ti,omap2-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-* OMAP Interrupt Controller</div><div class='del'>-</div><div class='del'>-OMAP2/3 are using a TI interrupt controller that can support several</div><div class='del'>-configurable number of interrupts.</div><div class='del'>-</div><div class='del'>-Main node required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be:</div><div class='del'>-	"ti,omap2-intc"</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The type shall be a &lt;u32&gt; and the value shall be 1.</div><div class='del'>-</div><div class='del'>-  The cell contains the interrupt number in the range [0-128].</div><div class='del'>-- ti,intc-size: Number of interrupts handled by the interrupt controller.</div><div class='del'>-- reg: physical base address and size of the intc registers map.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@1 {</div><div class='del'>-		compatible = "ti,omap2-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		ti,intc-size = &lt;96&gt;;</div><div class='del'>-		reg = &lt;0x48200000 0x1000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt b/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt<br/>deleted file mode 100644<br/>index 422d6908f8b2..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-TI OMAP4 Wake-up Generator</div><div class='del'>-</div><div class='del'>-All TI OMAP4/5 (and their derivatives) an interrupt controller that</div><div class='del'>-routes interrupts to the GIC, and also serves as a wakeup source. It</div><div class='del'>-is also referred to as "WUGEN-MPU", hence the name of the binding.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should contain at least "ti,omap4-wugen-mpu" or</div><div class='del'>-  "ti,omap5-wugen-mpu"</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value must be 3.</div><div class='del'>-</div><div class='del'>-Notes:</div><div class='del'>-</div><div class='del'>-- Because this HW ultimately routes interrupts to the GIC, the</div><div class='del'>-  interrupt specifier must be that of the GIC.</div><div class='del'>-- Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs</div><div class='del'>-  are explicitly forbidden.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-       wakeupgen: interrupt-controller@48281000 {</div><div class='del'>-               compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";</div><div class='del'>-               interrupt-controller;</div><div class='del'>-               #interrupt-cells = &lt;3&gt;;</div><div class='del'>-               reg = &lt;0x48281000 0x1000&gt;;</div><div class='del'>-               interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-       };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml<br/>new file mode 100644<br/>index 000000000000..6e3d6e6d9e07<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/ti,omap4-wugen-mpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/ti,omap4-wugen-mpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI OMAP4 Wake-up Generator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  All TI OMAP4/5 (and their derivatives) are interrupt controllers that route</div><div class='add'>+  interrupts to the GIC, and also serve as wakeup sources. They are also</div><div class='add'>+  referred to as "WUGEN-MPU", hence the name of the binding.</div><div class='add'>+</div><div class='add'>+  Notes:</div><div class='add'>+</div><div class='add'>+    - Because this HW ultimately routes interrupts to the GIC, the interrupt</div><div class='add'>+      specifier must be that of the GIC.</div><div class='add'>+    - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs are</div><div class='add'>+      explicitly forbidden.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: ti,omap5-wugen-mpu</div><div class='add'>+          - const: ti,omap4-wugen-mpu</div><div class='add'>+      - const: ti,omap4-wugen-mpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@48281000 {</div><div class='add'>+        compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";</div><div class='add'>+        reg = &lt;0x48281000 0x1000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;3&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt<br/>deleted file mode 100644<br/>index 0a4ce1051b02..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-VIA/Wondermedia VT8500 Interrupt Controller</div><div class='del'>------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "via,vt8500-intc"</div><div class='del'>-- reg : Should contain 1 register ranges(address and length)</div><div class='del'>-- #interrupt-cells : should be &lt;1&gt;</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	intc: interrupt-controller@d8140000 {</div><div class='del'>-		compatible = "via,vt8500-intc";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		reg = &lt;0xd8140000 0x10000&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml<br/>new file mode 100644<br/>index 000000000000..bc14c74bf7d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/via,vt8500-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: VIA and WonderMedia SoCs Interrupt Controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is the interrupt controller used in single-core ARM SoCs made by</div><div class='add'>+  VIA and WonderMedia (up to and including WM8950). Each block handles</div><div class='add'>+  up to 64 interrupt sources (level or edge triggered) and can generate</div><div class='add'>+  up to 8 interrupts to its parent when used in a chained configuration.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexey Charkov &lt;alchark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/interrupt-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: via,vt8500-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ0 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ1 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ2 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ3 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ4 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ5 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ6 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+      - description:</div><div class='add'>+          Interrupt number raised by the IRQ7 output of this controller</div><div class='add'>+          Only used if this controller is chained</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@d8140000 {</div><div class='add'>+        compatible = "via,vt8500-intc";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        reg = &lt;0xd8140000 0x10000&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml b/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml<br/>new file mode 100644<br/>index 000000000000..d44232d462bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/backlight/ti,lp8864.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments - LP8864/LP8866 4/6-Channel LED Driver family</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='add'>+  - Alexander Sverdlin &lt;alexander.sverdlin@siemens.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  LP8866-Q1, LP8866S-Q1, LP8864-Q1, LP8864S-Q1 are display LED-backlight drivers</div><div class='add'>+  with 4/6 channels. LED brightness can be controlled globally through the I2C</div><div class='add'>+  interface or PWM input.</div><div class='add'>+</div><div class='add'>+  For more product information please see the links below:</div><div class='add'>+    https://www.ti.com/product/LP8864-Q1</div><div class='add'>+    https://www.ti.com/product/LP8864S-Q1</div><div class='add'>+    https://www.ti.com/product/LP8866-Q1</div><div class='add'>+    https://www.ti.com/product/LP8866S-Q1</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,lp8864</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: I2C slave address</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO pin to enable (active high) / disable the device</div><div class='add'>+</div><div class='add'>+  vled-supply:</div><div class='add'>+    description: LED supply</div><div class='add'>+</div><div class='add'>+  led:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    properties:</div><div class='add'>+      function: true</div><div class='add'>+      color: true</div><div class='add'>+      label: true</div><div class='add'>+      linux,default-trigger: true</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - led</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led-controller@3a {</div><div class='add'>+            compatible = "ti,lp8864";</div><div class='add'>+            reg = &lt;0x3a&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            vled-supply = &lt;&amp;vbatt&gt;;</div><div class='add'>+</div><div class='add'>+            led {</div><div class='add'>+                function = LED_FUNCTION_BACKLIGHT;</div><div class='add'>+                color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                linux,default-trigger = "backlight";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml b/Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml<br/>new file mode 100644<br/>index 000000000000..123bf462f098<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/amlogic,c3-isp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic C3 Image Signal Processing Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keke Li &lt;keke.li@amlogic.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Amlogic ISP is the RAW image processing module</div><div class='add'>+  and supports three channels image output.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,c3-isp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: isp</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vapb</div><div class='add'>+      - const: isp0</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    description: input port node.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/amlogic,c3-peripherals-clkc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/amlogic,c3-pwrc.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        isp: isp@ff000000 {</div><div class='add'>+            compatible = "amlogic,c3-isp";</div><div class='add'>+            reg = &lt;0x0 0xff000000 0x0 0xf000&gt;;</div><div class='add'>+            reg-names = "isp";</div><div class='add'>+            power-domains = &lt;&amp;pwrc PWRC_C3_ISP_TOP_ID&gt;;</div><div class='add'>+            clocks = &lt;&amp;clkc_periphs CLKID_VAPB&gt;,</div><div class='add'>+                     &lt;&amp;clkc_periphs CLKID_ISP0&gt;;</div><div class='add'>+            clock-names = "vapb", "isp0";</div><div class='add'>+            assigned-clocks = &lt;&amp;clkc_periphs CLKID_VAPB&gt;,</div><div class='add'>+                              &lt;&amp;clkc_periphs CLKID_ISP0&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;0&gt;, &lt;400000000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 145 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                c3_isp_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;c3_adap_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml b/Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml<br/>new file mode 100644<br/>index 000000000000..ba43bc6709a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/amlogic,c3-mipi-adapter.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic C3 MIPI adapter receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keke Li &lt;keke.li@amlogic.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MIPI adapter is used to convert the MIPI CSI-2 data</div><div class='add'>+  into an ISP supported data format.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,c3-mipi-adapter</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: top</div><div class='add'>+      - const: fd</div><div class='add'>+      - const: rd</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vapb</div><div class='add'>+      - const: isp0</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: input port node.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: output port node.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/amlogic,c3-peripherals-clkc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/amlogic,c3-pwrc.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        adap: adap@ff010000 {</div><div class='add'>+            compatible = "amlogic,c3-mipi-adapter";</div><div class='add'>+            reg = &lt;0x0 0xff010000 0x0 0x100&gt;,</div><div class='add'>+                  &lt;0x0 0xff01b000 0x0 0x100&gt;,</div><div class='add'>+                  &lt;0x0 0xff01d000 0x0 0x200&gt;;</div><div class='add'>+            reg-names = "top", "fd", "rd";</div><div class='add'>+            power-domains = &lt;&amp;pwrc PWRC_C3_ISP_TOP_ID&gt;;</div><div class='add'>+            clocks = &lt;&amp;clkc_periphs CLKID_VAPB&gt;,</div><div class='add'>+                     &lt;&amp;clkc_periphs CLKID_ISP0&gt;;</div><div class='add'>+            clock-names = "vapb", "isp0";</div><div class='add'>+            assigned-clocks = &lt;&amp;clkc_periphs CLKID_VAPB&gt;,</div><div class='add'>+                              &lt;&amp;clkc_periphs CLKID_ISP0&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;0&gt;, &lt;400000000&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    c3_adap_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;c3_mipi_csi_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    c3_adap_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;c3_isp_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml<br/>new file mode 100644<br/>index 000000000000..b0129beab0c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/amlogic,c3-mipi-csi2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic C3 MIPI CSI-2 receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keke Li &lt;keke.li@amlogic.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MIPI CSI-2 receiver contains CSI-2 RX PHY and host controller.</div><div class='add'>+  It receives the MIPI data from the image sensor and sends MIPI data</div><div class='add'>+  to MIPI adapter.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,c3-mipi-csi2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aphy</div><div class='add'>+      - const: dphy</div><div class='add'>+      - const: host</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vapb</div><div class='add'>+      - const: phy0</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: input port node, connected to sensor.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: output port node</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/amlogic,c3-peripherals-clkc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/amlogic,c3-pwrc.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        csi: csi@ff018000 {</div><div class='add'>+            compatible = "amlogic,c3-mipi-csi2";</div><div class='add'>+            reg = &lt;0x0 0xff018000 0x0 0x400&gt;,</div><div class='add'>+                  &lt;0x0 0xff019000 0x0 0x300&gt;,</div><div class='add'>+                  &lt;0x0 0xff01a000 0x0 0x100&gt;;</div><div class='add'>+            reg-names = "aphy", "dphy", "host";</div><div class='add'>+            power-domains = &lt;&amp;pwrc PWRC_C3_MIPI_ISP_WRAP_ID&gt;;</div><div class='add'>+            clocks =  &lt;&amp;clkc_periphs CLKID_VAPB&gt;,</div><div class='add'>+                      &lt;&amp;clkc_periphs CLKID_CSI_PHY0&gt;;</div><div class='add'>+            clock-names = "vapb", "phy0";</div><div class='add'>+            assigned-clocks = &lt;&amp;clkc_periphs CLKID_VAPB&gt;,</div><div class='add'>+                              &lt;&amp;clkc_periphs CLKID_CSI_PHY0&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;0&gt;, &lt;200000000&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    c3_mipi_csi_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;imx290_out&gt;;</div><div class='add'>+                        data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    c3_mipi_csi_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;c3_adap_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml<br/>index a6b73498bc21..4b46aa755ccd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml</a></div><div class='hunk'>@@ -14,10 +14,16 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - nvidia,tegra114-cec</div><div class='del'>-      - nvidia,tegra124-cec</div><div class='del'>-      - nvidia,tegra210-cec</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra114-cec</div><div class='add'>+          - nvidia,tegra124-cec</div><div class='add'>+          - nvidia,tegra210-cec</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra186-cec</div><div class='add'>+              - nvidia,tegra194-cec</div><div class='add'>+          - const: nvidia,tegra210-cec</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml b/Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml<br/>new file mode 100644<br/>index 000000000000..25e65a344a0a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/fsl,imx-capture-subsystem.yaml</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/fsl,imx-capture-subsystem.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX Media Video Device</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is the media controller node for video capture support. It is a</div><div class='add'>+  virtual device that lists the camera serial interface nodes that the</div><div class='add'>+  media device will control</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx-capture-subsystem</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Should contain a list of phandles pointing to camera</div><div class='add'>+      sensor interface ports of IPU devices.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    capture-subsystem {</div><div class='add'>+        compatible = "fsl,imx-capture-subsystem";</div><div class='add'>+        ports = &lt;&amp;ipu1_csi0&gt;, &lt;&amp;ipu1_csi1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml<br/>new file mode 100644<br/>index 000000000000..65255f576f26<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml</a></div><div class='hunk'>@@ -0,0 +1,143 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/fsl,imx6-mipi-csi2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MIPI CSI-2 Receiver core in the i.MX SoC</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is the device node for the MIPI CSI-2 Receiver core in the i.MX</div><div class='add'>+  SoC. This is a Synopsys Designware MIPI CSI-2 host controller core</div><div class='add'>+  combined with a D-PHY core mixed into the same register block. In</div><div class='add'>+  addition this device consists of an i.MX-specific "CSI2IPU gasket"</div><div class='add'>+  glue logic, also controlled from the same register block. The CSI2IPU</div><div class='add'>+  gasket demultiplexes the four virtual channel streams from the host</div><div class='add'>+  controller's 32-bit output image bus onto four 16-bit parallel busses</div><div class='add'>+  to the i.MX IPU CSIs.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx6-mipi-csi2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: hsi_tx (the D-PHY clock)</div><div class='add'>+      - description: video_27m (D-PHY PLL reference clock)</div><div class='add'>+      - description: eim_podf;</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dphy</div><div class='add'>+      - const: ref</div><div class='add'>+      - const: pix</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: CSI-2 ERR1 irq</div><div class='add'>+      - description: CSI-2 ERR2 irq</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  port@0:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Input port node, single endpoint describing the CSI-2 transmitter.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          clock-lanes:</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            items:</div><div class='add'>+              - const: 1</div><div class='add'>+              - const: 2</div><div class='add'>+              - const: 3</div><div class='add'>+              - const: 4</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^port@[1-4]$':</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      ports 1 through 4 are output ports connecting with parallel bus sink</div><div class='add'>+      endpoint nodes and correspond to the four MIPI CSI-2 virtual channel</div><div class='add'>+      outputs.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint@0:</div><div class='add'>+        $ref: video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+      endpoint@1:</div><div class='add'>+        $ref: video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    mipi@21dc000 {</div><div class='add'>+        compatible = "fsl,imx6-mipi-csi2";</div><div class='add'>+        reg = &lt;0x021dc000 0x4000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX6QDL_CLK_HSI_TX&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX6QDL_CLK_VIDEO_27M&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX6QDL_CLK_EIM_PODF&gt;;</div><div class='add'>+        clock-names = "dphy", "ref", "pix";</div><div class='add'>+</div><div class='add'>+        port@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;ov5640_to_mipi_csi2&gt;;</div><div class='add'>+                clock-lanes = &lt;0&gt;;</div><div class='add'>+                data-lanes = &lt;1 2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        port@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                remote-endpoint = &lt;&amp;ipu1_csi0_mux_from_mipi_vc0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            endpoint@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                remote-endpoint = &lt;&amp;ipu1_csi1_mux_from_mipi_vc0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ad5820.txt b/Documentation/devicetree/bindings/media/i2c/ad5820.txt<br/>deleted file mode 100644<br/>index 5764cbedf9b7..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ad5820.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ad5820.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-* Analog Devices AD5820 autofocus coil</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-  - compatible: Must contain one of:</div><div class='del'>-		- "adi,ad5820"</div><div class='del'>-		- "adi,ad5821"</div><div class='del'>-		- "adi,ad5823"</div><div class='del'>-</div><div class='del'>-  - reg: I2C slave address</div><div class='del'>-</div><div class='del'>-  - VANA-supply: supply of voltage for VANA pin</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-   - enable-gpios : GPIO spec for the XSHUTDOWN pin. The XSHUTDOWN signal is</div><div class='del'>-active low, a high level on the pin enables the device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-       ad5820: coil@c {</div><div class='del'>-               compatible = "adi,ad5820";</div><div class='del'>-               reg = &lt;0x0c&gt;;</div><div class='del'>-</div><div class='del'>-               VANA-supply = &lt;&amp;vaux4&gt;;</div><div class='del'>-               enable-gpios = &lt;&amp;msmgpio 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-       };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml b/Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml<br/>new file mode 100644<br/>index 000000000000..0c8f24f692ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/adi,ad5820.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices AD5820 autofocus coil</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Pavel Machek &lt;pavel@ucw.cz&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The AD5820 is a current sink driver designed for precise control of</div><div class='add'>+  voice coil motors (VCMs) in camera autofocus systems.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,ad5820</div><div class='add'>+      - adi,ad5821</div><div class='add'>+      - adi,ad5823</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO spec for the XSHUTDOWN pin. The XSHUTDOWN signal is active low,</div><div class='add'>+      a high level on the pin enables the device.</div><div class='add'>+</div><div class='add'>+  VANA-supply:</div><div class='add'>+    description: supply of voltage for VANA pin</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - VANA-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        coil@c {</div><div class='add'>+            compatible = "adi,ad5820";</div><div class='add'>+            reg = &lt;0x0c&gt;;</div><div class='add'>+</div><div class='add'>+            enable-gpios = &lt;&amp;msmgpio 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            VANA-supply = &lt;&amp;vaux4&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adp1653.txt b/Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt<br/>index 4cce0de40ee9..4cce0de40ee9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adp1653.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adp1653.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adv7180.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml<br/>index 9ee1483775f6..dee8ce7cb7ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adv7180.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adv7180.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/media/i2c/adv7180.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/adi,adv7180.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Analog Devices ADV7180 analog video decoder family</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adv7343.txt b/Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt<br/>index 5653bc2428b8..5653bc2428b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adv7343.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adv7343.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/adi,adv7343.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adv748x.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml<br/>index d6353081402b..254987350321 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adv748x.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adv748x.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/media/i2c/adv748x.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/adi,adv748x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Analog Devices ADV748X video decoder with HDMI receiver</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.yaml b/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml<br/>index 7589d377c686..6c403003cdda 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adv7604.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/adv7604.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/media/i2c/adv7604.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/adi,adv7604.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Analog Devices ADV7604/10/11/12 video decoder with HDMI receiver</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/mt9v032.txt b/Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt<br/>index 100f0ae43269..100f0ae43269 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/mt9v032.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/mt9v032.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/max2175.txt b/Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt<br/>index 02b4e9cd7b1b..02b4e9cd7b1b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/max2175.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/max2175.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/mt9m111.txt b/Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt<br/>index d0bed6fa901a..d0bed6fa901a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/mt9m111.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/mt9m111.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/micron,mt9m111.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/tda1997x.txt b/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt<br/>index e76167999d76..e76167999d76 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/tda1997x.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/tda1997x.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/mt9m001.txt b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt<br/>index c920552b03ef..c920552b03ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/mt9m001.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/mt9m001.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/onnn,mt9m001.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml<br/>new file mode 100644<br/>index 000000000000..03d476bcf805<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml</a></div><div class='hunk'>@@ -0,0 +1,152 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2025 Linaro Ltd.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov02e10.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Omnivision OV02E10 CMOS Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Omnivision OV02E10 and OV02C10 sensors are 2 megapixel, CMOS image sensors which support:</div><div class='add'>+  - Automatic black level calibration (ABLC)</div><div class='add'>+  - Programmable controls for frame rate, mirror and flip, binning, cropping</div><div class='add'>+    and windowing</div><div class='add'>+  - OVO2C10</div><div class='add'>+    - 10 bit RAW Bayer 1920x1080 60 fps 2-lane @ 800 Mbps/lane</div><div class='add'>+    - 10 bit RAW Bayer 1920x1080 60 fps 1-lane @ 1500 Mbps/lane</div><div class='add'>+    - 10 bit RAW Bayer 1280x720 60 fps cropped 1-lane @ 960 Mbps/lane</div><div class='add'>+    - 10 bit RGB/BW 640x480 60 fps bin2 or skip2 1-lane @ 800 Mbps/lane</div><div class='add'>+    - 10 bit RGB/BW 480x270 60 fps bin4 or skip4 1-lane @ 800 Mbps/lane</div><div class='add'>+  - OV02E10</div><div class='add'>+    - 10 bit RAW Bayer 1920x1088 60 fps 2-lane @ 720 Mbps/lane</div><div class='add'>+    - 10 bit RAW Bayer 1280x1080 60 fps 2-lane @ 720 Mbps/lane</div><div class='add'>+    - 10 bit Quad Bayer 960x540 60 fps 2-lane 360 Mbps/lane</div><div class='add'>+    - 8 bit Quad Bayer 480x270 1/3/5/10 fps sub2 288 Mbps/lane</div><div class='add'>+    - 8 bit Quad Bayer 232x132 1/3/5/10 fps sub4 144 Mbps/lane</div><div class='add'>+  - Dynamic defect pixel cancellation</div><div class='add'>+  - Standard SCCB command interface</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/video-interface-devices.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ovti,ov02c10</div><div class='add'>+      - ovti,ov02e10</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analogue circuit voltage supply.</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description: I/O circuit voltage supply.</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital circuit voltage supply.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Active low GPIO connected to XSHUTDOWN pad of the sensor.</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            items:</div><div class='add'>+              - const: 1</div><div class='add'>+              - const: 2</div><div class='add'>+          link-frequencies: true</div><div class='add'>+          remote-endpoint: true</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+          - link-frequencies</div><div class='add'>+          - remote-endpoint</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ov02e10: camera@10 {</div><div class='add'>+            compatible = "ovti,ov02e10";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 237 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;cam_rgb_defaultt&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;ov02e10_clk&gt;;</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;ov02e10_clk&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;ov02e10_clk_parent&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;vreg_l7b_2p8&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;vreg_l7b_1p8&gt;;</div><div class='add'>+            dovdd-supply = &lt;&amp;vreg_l3m_1p8&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ov02e10_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csiphy4_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ov02c10: camera@36 {</div><div class='add'>+            compatible = "ovti,ov02c10";</div><div class='add'>+            reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 237 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;cam_rgb_defaultt&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;ov02c10_clk&gt;;</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;ov02c10_clk&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;ov02c10_clk_parent&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;vreg_l7b_2p8&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;vreg_l7b_1p8&gt;;</div><div class='add'>+            dovdd-supply = &lt;&amp;vreg_l3m_1p8&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ov02c10_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csiphy4_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov2640.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt<br/>index 989ce6cb6ac3..989ce6cb6ac3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ov2640.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ov2640.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ovti,ov2640.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov2659.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt<br/>index 92989a619f29..92989a619f29 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ov2659.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ov2659.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov7670.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt<br/>index 2c972a56f3cb..2c972a56f3cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ov7670.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ov7670.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov7740.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt<br/>index af781c3a5f0e..af781c3a5f0e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ov7740.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ov7740.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov9650.txt b/Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt<br/>index 506dfc52872a..506dfc52872a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ov9650.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ov9650.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/imx219.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml<br/>index 07d088cf66e0..38c3759bcd9f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/imx219.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/imx219.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/media/i2c/imx219.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/sony,imx219.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Sony 1/4.0-Inch 8Mpixel CMOS Digital Image Sensor</div><div class='hunk'>@@ -16,6 +16,9 @@ description: |-</div><div class='ctx'>   Image data is sent through MIPI CSI-2, which is configured as either 2 or</div><div class='ctx'>   4 data lanes.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/video-interface-devices.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: sony,imx219</div><div class='hunk'>@@ -79,7 +82,7 @@ required:</div><div class='ctx'>   - VDDL-supply</div><div class='ctx'>   - port</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml<br/>index fa69bd21c8da..990acf89af8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml</a></div><div class='hunk'>@@ -136,7 +136,7 @@ examples:</div><div class='ctx'>             port {</div><div class='ctx'>                 imx290_ep: endpoint {</div><div class='ctx'>                     data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-                    link-frequencies = /bits/ 64 &lt;445500000&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;222750000 148500000&gt;;</div><div class='ctx'>                     remote-endpoint = &lt;&amp;csiphy0_ep&gt;;</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml<br/>index 34962c5c7006..7c11e871dca6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Sony IMX415 CMOS Image Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Michael Riesch &lt;michael.riesch@wolfvision.net&gt;</div><div class='add'>+  - Michael Riesch &lt;michael.riesch@collabora.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |-</div><div class='ctx'>   The Sony IMX415 is a diagonal 6.4 mm (Type 1/2.8) CMOS active pixel type</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml b/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml<br/>new file mode 100644<br/>index 000000000000..3c071e6fbea6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2025 STMicroelectronics SA.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/st,vd55g1.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics VD55G1 Global Shutter Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Benjamin Mugnier &lt;benjamin.mugnier@foss.st.com&gt;</div><div class='add'>+  - Sylvain Petinot &lt;sylvain.petinot@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+ The STMicroelectronics VD55G1 is a global shutter image sensor with an active</div><div class='add'>+ array size of 804H x 704V. It is programmable through I2C interface. The I2C</div><div class='add'>+ address is fixed to 0x10.</div><div class='add'>+</div><div class='add'>+ Image data is sent through MIPI CSI-2, which is configured as only 1 data</div><div class='add'>+ lane. The sensor provides 4 GPIOS that can be used for external LED signal</div><div class='add'>+ (synchronized with sensor integration periods).</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/video-interface-devices.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,vd55g1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vcore-supply:</div><div class='add'>+    description: Digital core power supply (1.15V)</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: Digital IO power supply (1.8V)</div><div class='add'>+</div><div class='add'>+  vana-supply:</div><div class='add'>+    description: Analog power supply (2.8V)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Sensor reset active low GPIO (XSHUTDOWN)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  st,leds:</div><div class='add'>+    description:</div><div class='add'>+      List sensor's GPIOs used to control strobe light sources during exposure</div><div class='add'>+      time. The numbers identify the sensor pin on which the illumination</div><div class='add'>+      system is connected. GPIOs are active-high.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 3</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            items:</div><div class='add'>+              - const: 1</div><div class='add'>+</div><div class='add'>+          link-frequencies:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            items:</div><div class='add'>+              minimum: 125000000</div><div class='add'>+              maximum: 600000000</div><div class='add'>+</div><div class='add'>+          lane-polarities:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+          - link-frequencies</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - vcore-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vana-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        camera-sensor@10 {</div><div class='add'>+            compatible = "st,vd55g1";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;camera_clk_12M&gt;;</div><div class='add'>+</div><div class='add'>+            vcore-supply = &lt;&amp;camera_vcore_v1v15&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;camera_vddio_v1v8&gt;;</div><div class='add'>+            vana-supply = &lt;&amp;camera_vana_v2v8&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            st,leds = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            orientation = &lt;2&gt;;</div><div class='add'>+            rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                endpoint {</div><div class='add'>+                    data-lanes = &lt;1&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;csiphy0_ep&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml b/Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml<br/>new file mode 100644<br/>index 000000000000..c6673b8539db<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2024 STMicroelectronics SA.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/st,vd56g3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics VD56G3 Global Shutter Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Benjamin Mugnier &lt;benjamin.mugnier@foss.st.com&gt;</div><div class='add'>+  - Sylvain Petinot &lt;sylvain.petinot@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The STMicroelectronics VD56G3 is a 1.5 M pixel global shutter image sensor</div><div class='add'>+  with an active array size of 1124 x 1364 (portrait orientation). It is</div><div class='add'>+  programmable through I2C, the address is fixed to 0x10. The sensor output is</div><div class='add'>+  available via CSI-2, which is configured as either 1 or 2 data lanes. The</div><div class='add'>+  sensor provides 8 GPIOS that can be used for external LED signal</div><div class='add'>+  (synchronized with sensor integration periods)</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/video-interface-devices.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - st,vd56g3</div><div class='add'>+      - st,vd66gy</div><div class='add'>+    description:</div><div class='add'>+      Two variants are availables; VD56G3 is a monochrome sensor while VD66GY</div><div class='add'>+      is a colour variant.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vcore-supply:</div><div class='add'>+    description: Digital core power supply (1.15V)</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: Digital IO power supply (1.8V)</div><div class='add'>+</div><div class='add'>+  vana-supply:</div><div class='add'>+    description: Analog power supply (2.8V)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Sensor reset active low GPIO (XSHUTDOWN)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  st,leds:</div><div class='add'>+    description:</div><div class='add'>+      List sensor's GPIOs used to control strobe light sources during exposure</div><div class='add'>+      time. The numbers identify the sensor pin on which the illumination system</div><div class='add'>+      is connected. GPIOs are active-high.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 7</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+            items:</div><div class='add'>+              enum: [1, 2]</div><div class='add'>+</div><div class='add'>+          link-frequencies:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            items:</div><div class='add'>+              enum: [402000000, 750000000]</div><div class='add'>+</div><div class='add'>+          lane-polarities:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 3</div><div class='add'>+            description: Any lane can be inverted or not.</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+          - link-frequencies</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - vcore-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vana-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        camera-sensor@10 {</div><div class='add'>+            compatible = "st,vd56g3";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;camera_clk_12M&gt;;</div><div class='add'>+</div><div class='add'>+            vcore-supply = &lt;&amp;camera_vcore_v1v15&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;camera_vddio_v1v8&gt;;</div><div class='add'>+            vana-supply = &lt;&amp;camera_vana_v2v8&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            st,leds = &lt;6&gt;;</div><div class='add'>+</div><div class='add'>+            orientation = &lt;2&gt;;</div><div class='add'>+            rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;402000000&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;csiphy0_ep&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml<br/>index 2030366994d1..2e129bf573b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ti,ds90ub953.yaml</a></div><div class='hunk'>@@ -38,6 +38,13 @@ properties:</div><div class='ctx'>   '#clock-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      The strap I2C address of the serializer. Can be used by the deserializer</div><div class='add'>+      to communicate over back-channel when the forward-channel is not yet</div><div class='add'>+      active.</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'> </div><div class='hunk'>@@ -81,51 +88,57 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    serializer {</div><div class='del'>-      compatible = "ti,ds90ub953-q1";</div><div class='add'>+    link {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      serializer@18 {</div><div class='add'>+        compatible = "ti,ds90ub953-q1";</div><div class='add'>+        reg = &lt;0x18&gt;;</div><div class='ctx'> </div><div class='del'>-      gpio-controller;</div><div class='del'>-      #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-      #clock-cells = &lt;0&gt;;</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-      ports {</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='add'>+        ports {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        port@0 {</div><div class='del'>-          reg = &lt;0&gt;;</div><div class='del'>-          ub953_in: endpoint {</div><div class='del'>-            clock-lanes = &lt;0&gt;;</div><div class='del'>-            data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-            remote-endpoint = &lt;&amp;sensor_out&gt;;</div><div class='add'>+          port@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            ub953_in: endpoint {</div><div class='add'>+              clock-lanes = &lt;0&gt;;</div><div class='add'>+              data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+              remote-endpoint = &lt;&amp;sensor_out&gt;;</div><div class='add'>+            };</div><div class='ctx'>           };</div><div class='del'>-        };</div><div class='ctx'> </div><div class='del'>-        port@1 {</div><div class='del'>-          reg = &lt;1&gt;;</div><div class='del'>-          endpoint {</div><div class='del'>-            remote-endpoint = &lt;&amp;deser_fpd_in&gt;;</div><div class='add'>+          port@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            endpoint {</div><div class='add'>+              remote-endpoint = &lt;&amp;deser_fpd_in&gt;;</div><div class='add'>+            };</div><div class='ctx'>           };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'> </div><div class='del'>-      i2c {</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='add'>+        i2c {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        sensor@1a {</div><div class='del'>-          compatible = "sony,imx274";</div><div class='del'>-          reg = &lt;0x1a&gt;;</div><div class='add'>+          sensor@1a {</div><div class='add'>+            compatible = "sony,imx274";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='ctx'> </div><div class='del'>-          reset-gpios = &lt;&amp;serializer 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;serializer 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> </div><div class='del'>-          clocks = &lt;&amp;serializer&gt;;</div><div class='del'>-          clock-names = "inck";</div><div class='add'>+            clocks = &lt;&amp;serializer&gt;;</div><div class='add'>+            clock-names = "inck";</div><div class='ctx'> </div><div class='del'>-          port {</div><div class='del'>-            sensor_out: endpoint {</div><div class='del'>-              remote-endpoint = &lt;&amp;ub953_in&gt;;</div><div class='add'>+            port {</div><div class='add'>+              sensor_out: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;ub953_in&gt;;</div><div class='add'>+              };</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml b/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml<br/>index 0b71e6f911a8..4dcbd2b039a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ti,ds90ub960.yaml</a></div><div class='hunk'>@@ -68,6 +68,12 @@ properties:</div><div class='ctx'>             description: The link number</div><div class='ctx'>             maxItems: 1</div><div class='ctx'> </div><div class='add'>+          '#address-cells':</div><div class='add'>+            const: 1</div><div class='add'>+</div><div class='add'>+          '#size-cells':</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='ctx'>           i2c-alias:</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             description:</div><div class='hunk'>@@ -107,7 +113,8 @@ properties:</div><div class='ctx'>             maximum: 14</div><div class='ctx'>             description: Manual EQ level</div><div class='ctx'> </div><div class='del'>-          serializer:</div><div class='add'>+        patternProperties:</div><div class='add'>+          '^serializer(@[0-9a-f]+)*$':</div><div class='ctx'>             type: object</div><div class='ctx'>             description: FPD-Link Serializer node</div><div class='ctx'> </div><div class='hunk'>@@ -115,7 +122,6 @@ properties:</div><div class='ctx'>           - reg</div><div class='ctx'>           - i2c-alias</div><div class='ctx'>           - ti,rx-mode</div><div class='del'>-          - serializer</div><div class='ctx'> </div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='hunk'>@@ -309,13 +315,17 @@ examples:</div><div class='ctx'>           /* Link 0 has DS90UB953 serializer and IMX274 sensor */</div><div class='ctx'> </div><div class='ctx'>           link@0 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             i2c-alias = &lt;0x44&gt;;</div><div class='ctx'> </div><div class='ctx'>             ti,rx-mode = &lt;3&gt;;</div><div class='ctx'> </div><div class='del'>-            serializer1: serializer {</div><div class='add'>+            serializer1: serializer@30 {</div><div class='ctx'>               compatible = "ti,ds90ub953-q1";</div><div class='add'>+              reg = &lt;0x30&gt;;</div><div class='ctx'> </div><div class='ctx'>               gpio-controller;</div><div class='ctx'>               #gpio-cells = &lt;2&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ths8200.txt b/Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt<br/>index 285f6ae7dfa9..285f6ae7dfa9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ths8200.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/ths8200.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ti,ths8200.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/tvp514x.txt b/Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt<br/>index 46752cc71f2e..46752cc71f2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/tvp514x.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/tvp514x.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ti,tvp514x.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt<br/>index 94b908ace53c..94b908ace53c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/tvp5150.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/tvp5150.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/tvp7002.txt b/Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt<br/>index 5f28b5d9abcc..5f28b5d9abcc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/tvp7002.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/tvp7002.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/ti,tvp7002.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/tc358743.txt b/Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt<br/>index 59102edcf01e..59102edcf01e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/tc358743.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/i2c/tc358743.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/imx.txt b/Documentation/devicetree/bindings/media/imx.txt<br/>deleted file mode 100644<br/>index 77f4b0a7fd2b..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/imx.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/imx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,53 +0,0 @@</div><div class='del'>-Freescale i.MX Media Video Device</div><div class='del'>-=================================</div><div class='del'>-</div><div class='del'>-Video Media Controller node</div><div class='del'>----------------------------</div><div class='del'>-</div><div class='del'>-This is the media controller node for video capture support. It is a</div><div class='del'>-virtual device that lists the camera serial interface nodes that the</div><div class='del'>-media device will control.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "fsl,imx-capture-subsystem";</div><div class='del'>-- ports      : Should contain a list of phandles pointing to camera</div><div class='del'>-		sensor interface ports of IPU devices</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-capture-subsystem {</div><div class='del'>-	compatible = "fsl,imx-capture-subsystem";</div><div class='del'>-	ports = &lt;&amp;ipu1_csi0&gt;, &lt;&amp;ipu1_csi1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-mipi_csi2 node</div><div class='del'>---------------</div><div class='del'>-</div><div class='del'>-This is the device node for the MIPI CSI-2 Receiver core in the i.MX</div><div class='del'>-SoC. This is a Synopsys Designware MIPI CSI-2 host controller core</div><div class='del'>-combined with a D-PHY core mixed into the same register block. In</div><div class='del'>-addition this device consists of an i.MX-specific "CSI2IPU gasket"</div><div class='del'>-glue logic, also controlled from the same register block. The CSI2IPU</div><div class='del'>-gasket demultiplexes the four virtual channel streams from the host</div><div class='del'>-controller's 32-bit output image bus onto four 16-bit parallel busses</div><div class='del'>-to the i.MX IPU CSIs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible	: "fsl,imx6-mipi-csi2";</div><div class='del'>-- reg           : physical base address and length of the register set;</div><div class='del'>-- clocks	: the MIPI CSI-2 receiver requires three clocks: hsi_tx</div><div class='del'>-		  (the D-PHY clock), video_27m (D-PHY PLL reference</div><div class='del'>-		  clock), and eim_podf;</div><div class='del'>-- clock-names	: must contain "dphy", "ref", "pix";</div><div class='del'>-- port@*        : five port nodes must exist, containing endpoints</div><div class='del'>-		  connecting to the source and sink devices according to</div><div class='del'>-		  of_graph bindings. The first port is an input port,</div><div class='del'>-		  connecting with a MIPI CSI-2 source, and ports 1</div><div class='del'>-		  through 4 are output ports connecting with parallel</div><div class='del'>-		  bus sink endpoint nodes and correspond to the four</div><div class='del'>-		  MIPI CSI-2 virtual channel outputs.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts	: must contain two level-triggered interrupts,</div><div class='del'>-		  in order: 100 and 101;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml<br/>index 3469a43f00d4..7c8e0a905d89 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml</a></div><div class='hunk'>@@ -93,6 +93,10 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +116,10 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml<br/>index 8856fba385b1..6d776b0ca711 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml</a></div><div class='hunk'>@@ -112,6 +112,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +136,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -150,6 +160,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml<br/>index 644646de338a..a2025952fe95 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml</a></div><div class='hunk'>@@ -115,6 +115,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -134,6 +139,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -153,6 +163,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -172,6 +187,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml<br/>index 83c4a5d95f02..bfd8b1ad4731 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml</a></div><div class='hunk'>@@ -18,7 +18,12 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,sc7180-venus</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qcs615-venus</div><div class='add'>+          - const: qcom,sc7180-venus</div><div class='add'>+      - const: qcom,sc7180-venus</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     minItems: 2</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml<br/>index 9936f0132417..d195f1bfb23d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml</a></div><div class='hunk'>@@ -143,6 +143,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -166,6 +171,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -189,6 +199,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -212,6 +227,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml<br/>index 68d8670557f5..6e6ad8390e44 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml</a></div><div class='hunk'>@@ -121,6 +121,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -140,6 +145,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -159,6 +169,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -178,6 +193,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml<br/>index 289494f561e5..82bf4689d330 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml</a></div><div class='hunk'>@@ -108,6 +108,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -127,6 +132,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -146,6 +156,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='hunk'>@@ -165,6 +180,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - data-lanes</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml<br/>index a372d991e652..ebf68ff4ab96 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml</a></div><div class='hunk'>@@ -128,6 +128,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -151,6 +156,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -174,6 +184,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -197,6 +212,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -220,6 +240,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='hunk'>@@ -243,6 +268,11 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='add'>+              bus-type:</div><div class='add'>+                enum:</div><div class='add'>+                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY</div><div class='add'>+                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY</div><div class='add'>+</div><div class='ctx'>             required:</div><div class='ctx'>               - clock-lanes</div><div class='ctx'>               - data-lanes</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml b/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml<br/>index e424ea84c211..c79bf2101812 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,sm8550-iris.yaml</a></div><div class='hunk'>@@ -14,12 +14,17 @@ description:</div><div class='ctx'>   The iris video processing unit is a video encode and decode accelerator</div><div class='ctx'>   present on Qualcomm platforms.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: qcom,venus-common.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,sm8550-iris</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sa8775p-iris</div><div class='add'>+          - const: qcom,sm8550-iris</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,qcs8300-iris</div><div class='add'>+          - qcom,sm8550-iris</div><div class='add'>+          - qcom,sm8650-iris</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 4</div><div class='hunk'>@@ -49,11 +54,15 @@ properties:</div><div class='ctx'>       - const: video-mem</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='add'>+    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: bus</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: core</div><div class='ctx'> </div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -75,6 +84,26 @@ required:</div><div class='ctx'>   - iommus</div><div class='ctx'>   - dma-coherent</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8650-iris</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 3</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml<br/>new file mode 100644<br/>index 000000000000..113565cf2a99<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml</a></div><div class='hunk'>@@ -0,0 +1,367 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,x1e80100-camss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm X1E80100 Camera Subsystem (CAMSS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,x1e80100-camss</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 17</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: csid0</div><div class='add'>+      - const: csid1</div><div class='add'>+      - const: csid2</div><div class='add'>+      - const: csid_lite0</div><div class='add'>+      - const: csid_lite1</div><div class='add'>+      - const: csid_wrapper</div><div class='add'>+      - const: csiphy0</div><div class='add'>+      - const: csiphy1</div><div class='add'>+      - const: csiphy2</div><div class='add'>+      - const: csiphy4</div><div class='add'>+      - const: csitpg0</div><div class='add'>+      - const: csitpg1</div><div class='add'>+      - const: csitpg2</div><div class='add'>+      - const: vfe0</div><div class='add'>+      - const: vfe1</div><div class='add'>+      - const: vfe_lite0</div><div class='add'>+      - const: vfe_lite1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 29</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: camnoc_nrt_axi</div><div class='add'>+      - const: camnoc_rt_axi</div><div class='add'>+      - const: core_ahb</div><div class='add'>+      - const: cpas_ahb</div><div class='add'>+      - const: cpas_fast_ahb</div><div class='add'>+      - const: cpas_vfe0</div><div class='add'>+      - const: cpas_vfe1</div><div class='add'>+      - const: cpas_vfe_lite</div><div class='add'>+      - const: cphy_rx_clk_src</div><div class='add'>+      - const: csid</div><div class='add'>+      - const: csid_csiphy_rx</div><div class='add'>+      - const: csiphy0</div><div class='add'>+      - const: csiphy0_timer</div><div class='add'>+      - const: csiphy1</div><div class='add'>+      - const: csiphy1_timer</div><div class='add'>+      - const: csiphy2</div><div class='add'>+      - const: csiphy2_timer</div><div class='add'>+      - const: csiphy4</div><div class='add'>+      - const: csiphy4_timer</div><div class='add'>+      - const: gcc_axi_hf</div><div class='add'>+      - const: gcc_axi_sf</div><div class='add'>+      - const: vfe0</div><div class='add'>+      - const: vfe0_fast_ahb</div><div class='add'>+      - const: vfe1</div><div class='add'>+      - const: vfe1_fast_ahb</div><div class='add'>+      - const: vfe_lite</div><div class='add'>+      - const: vfe_lite_ahb</div><div class='add'>+      - const: vfe_lite_cphy_rx</div><div class='add'>+      - const: vfe_lite_csid</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 13</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: csid0</div><div class='add'>+      - const: csid1</div><div class='add'>+      - const: csid2</div><div class='add'>+      - const: csid_lite0</div><div class='add'>+      - const: csid_lite1</div><div class='add'>+      - const: csiphy0</div><div class='add'>+      - const: csiphy1</div><div class='add'>+      - const: csiphy2</div><div class='add'>+      - const: csiphy4</div><div class='add'>+      - const: vfe0</div><div class='add'>+      - const: vfe1</div><div class='add'>+      - const: vfe_lite0</div><div class='add'>+      - const: vfe_lite1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ahb</div><div class='add'>+      - const: hf_mnoc</div><div class='add'>+      - const: sf_mnoc</div><div class='add'>+      - const: sf_icp_mnoc</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.</div><div class='add'>+      - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.</div><div class='add'>+      - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller.</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ife0</div><div class='add'>+      - const: ife1</div><div class='add'>+      - const: top</div><div class='add'>+</div><div class='add'>+  vdd-csiphy-0p8-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a 0.8V regulator supply to a PHY.</div><div class='add'>+</div><div class='add'>+  vdd-csiphy-1p2-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to 1.8V regulator supply to a PHY.</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    description:</div><div class='add'>+      CSI input ports.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port@[0-3]+$":</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        description:</div><div class='add'>+          Input port for receiving CSI data from a CSIPHY.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              clock-lanes:</div><div class='add'>+                maxItems: 1</div><div class='add'>+</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - clock-lanes</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - interconnects</div><div class='add'>+  - interconnect-names</div><div class='add'>+  - iommus</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - vdd-csiphy-0p8-supply</div><div class='add'>+  - vdd-csiphy-1p2-supply</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,x1e80100-gcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,x1e80100-camcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,x1e80100-rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        camss: isp@acb6000 {</div><div class='add'>+            compatible = "qcom,x1e80100-camss";</div><div class='add'>+</div><div class='add'>+            reg = &lt;0 0x0acb7000 0 0x2000&gt;,</div><div class='add'>+                  &lt;0 0x0acb9000 0 0x2000&gt;,</div><div class='add'>+                  &lt;0 0x0acbb000 0 0x2000&gt;,</div><div class='add'>+                  &lt;0 0x0acc6000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0acca000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0acb6000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0ace4000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0ace6000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0ace8000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0acec000 0 0x4000&gt;,</div><div class='add'>+                  &lt;0 0x0acf6000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0acf7000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0acf8000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x0ac62000 0 0x4000&gt;,</div><div class='add'>+                  &lt;0 0x0ac71000 0 0x4000&gt;,</div><div class='add'>+                  &lt;0 0x0acc7000 0 0x2000&gt;,</div><div class='add'>+                  &lt;0 0x0accb000 0 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+            reg-names = "csid0",</div><div class='add'>+                        "csid1",</div><div class='add'>+                        "csid2",</div><div class='add'>+                        "csid_lite0",</div><div class='add'>+                        "csid_lite1",</div><div class='add'>+                        "csid_wrapper",</div><div class='add'>+                        "csiphy0",</div><div class='add'>+                        "csiphy1",</div><div class='add'>+                        "csiphy2",</div><div class='add'>+                        "csiphy4",</div><div class='add'>+                        "csitpg0",</div><div class='add'>+                        "csitpg1",</div><div class='add'>+                        "csitpg2",</div><div class='add'>+                        "vfe0",</div><div class='add'>+                        "vfe1",</div><div class='add'>+                        "vfe_lite0",</div><div class='add'>+                        "vfe_lite1";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;camcc CAM_CC_CAMNOC_AXI_NRT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CAMNOC_AXI_RT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CORE_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CPAS_FAST_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CPAS_IFE_0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CPAS_IFE_1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CPAS_IFE_LITE_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CPHY_RX_CLK_SRC&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSID_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSID_CSIPHY_RX_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSIPHY0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSI0PHYTIMER_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSIPHY1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSI1PHYTIMER_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSIPHY2_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSI2PHYTIMER_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSIPHY4_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_CSI4PHYTIMER_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_CAMERA_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_CAMERA_SF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_0_FAST_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_1_FAST_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_LITE_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_LITE_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_LITE_CPHY_RX_CLK&gt;,</div><div class='add'>+                     &lt;&amp;camcc CAM_CC_IFE_LITE_CSID_CLK&gt;;</div><div class='add'>+</div><div class='add'>+            clock-names = "camnoc_nrt_axi",</div><div class='add'>+                          "camnoc_rt_axi",</div><div class='add'>+                          "core_ahb",</div><div class='add'>+                          "cpas_ahb",</div><div class='add'>+                          "cpas_fast_ahb",</div><div class='add'>+                          "cpas_vfe0",</div><div class='add'>+                          "cpas_vfe1",</div><div class='add'>+                          "cpas_vfe_lite",</div><div class='add'>+                          "cphy_rx_clk_src",</div><div class='add'>+                          "csid",</div><div class='add'>+                          "csid_csiphy_rx",</div><div class='add'>+                          "csiphy0",</div><div class='add'>+                          "csiphy0_timer",</div><div class='add'>+                          "csiphy1",</div><div class='add'>+                          "csiphy1_timer",</div><div class='add'>+                          "csiphy2",</div><div class='add'>+                          "csiphy2_timer",</div><div class='add'>+                          "csiphy4",</div><div class='add'>+                          "csiphy4_timer",</div><div class='add'>+                          "gcc_axi_hf",</div><div class='add'>+                          "gcc_axi_sf",</div><div class='add'>+                          "vfe0",</div><div class='add'>+                          "vfe0_fast_ahb",</div><div class='add'>+                          "vfe1",</div><div class='add'>+                          "vfe1_fast_ahb",</div><div class='add'>+                          "vfe_lite",</div><div class='add'>+                          "vfe_lite_ahb",</div><div class='add'>+                          "vfe_lite_cphy_rx",</div><div class='add'>+                          "vfe_lite_csid";</div><div class='add'>+</div><div class='add'>+           interrupts = &lt;GIC_SPI 464 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 466 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 431 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 468 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 359 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 477 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 478 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 479 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 122 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 465 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 467 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 469 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                        &lt;GIC_SPI 360 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-names = "csid0",</div><div class='add'>+                              "csid1",</div><div class='add'>+                              "csid2",</div><div class='add'>+                              "csid_lite0",</div><div class='add'>+                              "csid_lite1",</div><div class='add'>+                              "csiphy0",</div><div class='add'>+                              "csiphy1",</div><div class='add'>+                              "csiphy2",</div><div class='add'>+                              "csiphy4",</div><div class='add'>+                              "vfe0",</div><div class='add'>+                              "vfe1",</div><div class='add'>+                              "vfe_lite0",</div><div class='add'>+                              "vfe_lite1";</div><div class='add'>+</div><div class='add'>+            interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY</div><div class='add'>+                             &amp;config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY&gt;,</div><div class='add'>+                            &lt;&amp;mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS</div><div class='add'>+                             &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+                            &lt;&amp;mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS</div><div class='add'>+                             &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;,</div><div class='add'>+                            &lt;&amp;mmss_noc MASTER_CAMNOC_ICP QCOM_ICC_TAG_ALWAYS</div><div class='add'>+                             &amp;mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS&gt;;</div><div class='add'>+</div><div class='add'>+            interconnect-names = "ahb",</div><div class='add'>+                                 "hf_mnoc",</div><div class='add'>+                                 "sf_mnoc",</div><div class='add'>+                                 "sf_icp_mnoc";</div><div class='add'>+</div><div class='add'>+            iommus = &lt;&amp;apps_smmu 0x800 0x60&gt;,</div><div class='add'>+                     &lt;&amp;apps_smmu 0x860 0x60&gt;,</div><div class='add'>+                     &lt;&amp;apps_smmu 0x1800 0x60&gt;,</div><div class='add'>+                     &lt;&amp;apps_smmu 0x1860 0x60&gt;,</div><div class='add'>+                     &lt;&amp;apps_smmu 0x18e0 0x00&gt;,</div><div class='add'>+                     &lt;&amp;apps_smmu 0x1980 0x20&gt;,</div><div class='add'>+                     &lt;&amp;apps_smmu 0x1900 0x00&gt;,</div><div class='add'>+                     &lt;&amp;apps_smmu 0x19a0 0x20&gt;;</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;camcc CAM_CC_IFE_0_GDSC&gt;,</div><div class='add'>+                            &lt;&amp;camcc CAM_CC_IFE_1_GDSC&gt;,</div><div class='add'>+                            &lt;&amp;camcc CAM_CC_TITAN_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+            power-domain-names = "ife0",</div><div class='add'>+                                 "ife1",</div><div class='add'>+                                 "top";</div><div class='add'>+</div><div class='add'>+            vdd-csiphy-0p8-supply = &lt;&amp;csiphy_0p8_supply&gt;;</div><div class='add'>+            vdd-csiphy-1p2-supply = &lt;&amp;csiphy_1p2_supply&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    csiphy_ep0: endpoint {</div><div class='add'>+                        clock-lanes = &lt;7&gt;;</div><div class='add'>+                        data-lanes = &lt;0 1&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;sensor_ep&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml<br/>index f94dacd96278..7bf1266223e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,fcp.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,fcp.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,fcp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/renesas,fcp.yaml</a></div><div class='hunk'>@@ -30,14 +30,24 @@ properties:</div><div class='ctx'>               - renesas,r9a07g043u-fcpvd # RZ/G2UL</div><div class='ctx'>               - renesas,r9a07g044-fcpvd # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,r9a07g054-fcpvd # RZ/V2L</div><div class='add'>+              - renesas,r9a09g057-fcpvd # RZ/V2H(P)</div><div class='ctx'>           - const: renesas,fcpv         # Generic FCP for VSP fallback</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  clocks: true</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Main clock</div><div class='add'>+      - description: Register access clock</div><div class='add'>+      - description: Video clock</div><div class='ctx'> </div><div class='del'>-  clock-names: true</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: vclk</div><div class='ctx'> </div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -66,18 +76,11 @@ allOf:</div><div class='ctx'>               - renesas,r9a07g043u-fcpvd</div><div class='ctx'>               - renesas,r9a07g044-fcpvd</div><div class='ctx'>               - renesas,r9a07g054-fcpvd</div><div class='add'>+              - renesas,r9a09g057-fcpvd</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Main clock</div><div class='del'>-            - description: Register access clock</div><div class='del'>-            - description: Video clock</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aclk</div><div class='del'>-            - const: pclk</div><div class='del'>-            - const: vclk</div><div class='add'>+          minItems: 3</div><div class='ctx'>       required:</div><div class='ctx'>         - clock-names</div><div class='ctx'>     else:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,isp.yaml b/Documentation/devicetree/bindings/media/renesas,isp.yaml<br/>index c4de4555b753..d25e020f5e5e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,isp.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,isp.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,isp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/renesas,isp.yaml</a></div><div class='hunk'>@@ -25,19 +25,55 @@ properties:</div><div class='ctx'>           - renesas,r8a779h0-isp # V4M</div><div class='ctx'>       - const: renesas,rcar-gen4-isp # Generic R-Car Gen4</div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: cs</div><div class='add'>+      - const: core</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: cs</div><div class='add'>+      - const: core</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: cs</div><div class='add'>+      - const: core</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: cs</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  renesas,vspx:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      A phandle to the companion VSPX responsible for the Streaming Bridge</div><div class='add'>+      functionality. The Streaming Bridge is responsible for feeding image</div><div class='add'>+      and configuration data to the ISP when operating in memory-to-memory</div><div class='add'>+      mode.</div><div class='ctx'> </div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='hunk'>@@ -103,10 +139,14 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - reg-names</div><div class='ctx'>   - interrupts</div><div class='add'>+  - interrupt-names</div><div class='ctx'>   - clocks</div><div class='add'>+  - clock-names</div><div class='ctx'>   - power-domains</div><div class='ctx'>   - resets</div><div class='add'>+  - reset-names</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='hunk'>@@ -119,11 +159,18 @@ examples:</div><div class='ctx'> </div><div class='ctx'>     isp1: isp@fed20000 {</div><div class='ctx'>             compatible = "renesas,r8a779a0-isp", "renesas,rcar-gen4-isp";</div><div class='del'>-            reg = &lt;0xfed20000 0x10000&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD 613&gt;;</div><div class='add'>+            reg = &lt;0xfed20000 0x10000&gt;, &lt;0xfee00000 0x100000&gt;;</div><div class='add'>+            reg-names = "cs", "core";</div><div class='add'>+            interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-names = "cs", "core";</div><div class='add'>+            clocks = &lt;&amp;cpg CPG_MOD 613&gt;, &lt;&amp;cpg CPG_MOD 17&gt;;</div><div class='add'>+            clock-names = "cs", "core";</div><div class='ctx'>             power-domains = &lt;&amp;sysc R8A779A0_PD_A3ISP01&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg 613&gt;;</div><div class='add'>+            resets = &lt;&amp;cpg 613&gt;, &lt;&amp;cpg 17&gt;;</div><div class='add'>+            reset-names = "cs", "core";</div><div class='add'>+</div><div class='add'>+            renesas,vspx = &lt;&amp;vspx1&gt;;</div><div class='ctx'> </div><div class='ctx'>             ports {</div><div class='ctx'>                     #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml<br/>index bc1245127025..47e18690fa57 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml</a></div><div class='hunk'>@@ -17,24 +17,43 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - renesas,r9a07g043-cru       # RZ/G2UL</div><div class='del'>-          - renesas,r9a07g044-cru       # RZ/G2{L,LC}</div><div class='del'>-          - renesas,r9a07g054-cru       # RZ/V2L</div><div class='del'>-      - const: renesas,rzg2l-cru</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g043-cru       # RZ/G2UL</div><div class='add'>+              - renesas,r9a07g044-cru       # RZ/G2{L,LC}</div><div class='add'>+              - renesas,r9a07g054-cru       # RZ/V2L</div><div class='add'>+          - const: renesas,rzg2l-cru</div><div class='add'>+      - const: renesas,r9a09g047-cru        # RZ/G3E</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 3</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: CRU Interrupt for image_conv</div><div class='add'>+          - description: CRU Interrupt for image_conv_err</div><div class='add'>+          - description: CRU AXI master error interrupt</div><div class='add'>+      - items:</div><div class='add'>+          - description: CRU Interrupt for image_conv</div><div class='add'>+          - description: CRU AXI master error interrupt</div><div class='add'>+          - description: CRU Video Data AXI Master Address 0 Write End interrupt</div><div class='add'>+          - description: CRU Statistics data AXI master addr 0 write end interrupt</div><div class='add'>+          - description: CRU Video statistics data AXI master addr 0 write end interrupt</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: image_conv</div><div class='del'>-      - const: image_conv_err</div><div class='del'>-      - const: axi_mst_err</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: image_conv</div><div class='add'>+          - const: image_conv_err</div><div class='add'>+          - const: axi_mst_err</div><div class='add'>+      - items:</div><div class='add'>+          - const: image_conv</div><div class='add'>+          - const: axi_mst_err</div><div class='add'>+          - const: vd_addr_wend</div><div class='add'>+          - const: sd_addr_wend</div><div class='add'>+          - const: vsd_addr_wend</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -109,6 +128,10 @@ allOf:</div><div class='ctx'>               - renesas,r9a07g054-cru</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 3</div><div class='ctx'>         ports:</div><div class='ctx'>           required:</div><div class='ctx'>             - port@0</div><div class='hunk'>@@ -122,10 +145,30 @@ allOf:</div><div class='ctx'>               - renesas,r9a07g043-cru</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 3</div><div class='ctx'>         ports:</div><div class='ctx'>           properties:</div><div class='ctx'>             port@0: false</div><div class='add'>+          required:</div><div class='add'>+            - port@1</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,r9a09g047-cru</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+        ports:</div><div class='add'>+          properties:</div><div class='add'>+            port@0: false</div><div class='ctx'>           required:</div><div class='ctx'>             - port@1</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml<br/>index 7faa12fecd5b..c5c511c9f0db 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml</a></div><div class='hunk'>@@ -17,12 +17,17 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - renesas,r9a07g043-csi2       # RZ/G2UL</div><div class='del'>-          - renesas,r9a07g044-csi2       # RZ/G2{L,LC}</div><div class='del'>-          - renesas,r9a07g054-csi2       # RZ/V2L</div><div class='del'>-      - const: renesas,rzg2l-csi2</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g043-csi2 # RZ/G2UL</div><div class='add'>+              - renesas,r9a07g044-csi2 # RZ/G2{L,LC}</div><div class='add'>+              - renesas,r9a07g054-csi2 # RZ/V2L</div><div class='add'>+          - const: renesas,rzg2l-csi2</div><div class='add'>+      - items:</div><div class='add'>+          - const: renesas,r9a09g047-csi2 # RZ/G3E</div><div class='add'>+          - const: renesas,r9a09g057-csi2</div><div class='add'>+      - const: renesas,r9a09g057-csi2 # RZ/V2H(P)</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -31,16 +36,24 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Internal clock for connecting CRU and MIPI</div><div class='del'>-      - description: CRU Main clock</div><div class='del'>-      - description: CRU Register access clock</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: Internal clock for connecting CRU and MIPI</div><div class='add'>+          - description: CRU Main clock</div><div class='add'>+          - description: CRU Register access clock</div><div class='add'>+      - items:</div><div class='add'>+          - description: CRU Main clock</div><div class='add'>+          - description: CRU Register access clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: system</div><div class='del'>-      - const: video</div><div class='del'>-      - const: apb</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: system</div><div class='add'>+          - const: video</div><div class='add'>+          - const: apb</div><div class='add'>+      - items:</div><div class='add'>+          - const: video</div><div class='add'>+          - const: apb</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -48,7 +61,7 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: CRU_PRESETN reset terminal</div><div class='del'>-      - description: CRU_CMN_RSTB reset terminal</div><div class='add'>+      - description: D-PHY reset (CRU_CMN_RSTB or CRU_n_S_RESETN)</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -101,6 +114,25 @@ required:</div><div class='ctx'>   - reset-names</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,r9a09g057-csi2</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml<br/>index 1a03e67462a4..fcf7219b1f40 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,vsp1.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/media/renesas,vsp1.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/media/renesas,vsp1.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/media/renesas,vsp1.yaml</a></div><div class='hunk'>@@ -25,6 +25,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - renesas,r9a07g043u-vsp2   # RZ/G2UL</div><div class='ctx'>               - renesas,r9a07g054-vsp2    # RZ/V2L</div><div class='add'>+              - renesas,r9a09g057-vsp2    # RZ/V2H(P)</div><div class='ctx'>           - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -33,8 +34,18 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  clocks: true</div><div class='del'>-  clock-names: true</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Main clock</div><div class='add'>+      - description: Register access clock</div><div class='add'>+      - description: Video clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: vclk</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -78,15 +89,7 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Main clock</div><div class='del'>-            - description: Register access clock</div><div class='del'>-            - description: Video clock</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aclk</div><div class='del'>-            - const: pclk</div><div class='del'>-            - const: vclk</div><div class='add'>+          minItems: 3</div><div class='ctx'>       required:</div><div class='ctx'>         - clock-names</div><div class='ctx'>     else:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml<br/>new file mode 100644<br/>index 000000000000..2bfe63ec62dc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/memory-controllers/renesas,rzg3e-xspi.yaml</a></div><div class='hunk'>@@ -0,0 +1,135 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas Expanded Serial Peripheral Interface (xSPI)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Renesas xSPI allows a SPI flash connected to the SoC to be accessed via</div><div class='add'>+  the memory-mapping or the manual command mode.</div><div class='add'>+</div><div class='add'>+  The flash chip itself should be represented by a subnode of the XSPI node.</div><div class='add'>+  The flash interface is selected based on the "compatible" property of this</div><div class='add'>+  subnode:</div><div class='add'>+  -  "jedec,spi-nor";</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,r9a09g047-xspi  # RZ/G3E</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: xSPI registers</div><div class='add'>+      - description: direct mapping area</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: regs</div><div class='add'>+      - const: dirmap</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Interrupt pulse signal by factors excluding errors</div><div class='add'>+      - description: Interrupt pulse signal by error factors</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pulse</div><div class='add'>+      - const: err_pulse</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: AHB clock</div><div class='add'>+      - description: AXI clock</div><div class='add'>+      - description: SPI clock</div><div class='add'>+      - description: Double speed SPI clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ahb</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: spi</div><div class='add'>+      - const: spix2</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: Hardware reset</div><div class='add'>+      - description: AXI reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hresetn</div><div class='add'>+      - const: aresetn</div><div class='add'>+</div><div class='add'>+  renesas,xspi-cs-addr-sys:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      Phandle to the system controller (sys) that allows to configure</div><div class='add'>+      xSPI CS0 and CS1 addresses.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "flash@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: jedec,spi-nor</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/renesas,r9a09g047-cpg.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@11030000 {</div><div class='add'>+        compatible = "renesas,r9a09g047-xspi";</div><div class='add'>+        reg = &lt;0x11030000 0x10000&gt;, &lt;0x20000000 0x10000000&gt;;</div><div class='add'>+        reg-names = "regs", "dirmap";</div><div class='add'>+        interrupts = &lt;GIC_SPI 228 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 229 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "pulse", "err_pulse";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 0x9f&gt;, &lt;&amp;cpg CPG_MOD 0xa0&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_CORE 9&gt;, &lt;&amp;cpg CPG_MOD 0xa1&gt;;</div><div class='add'>+        clock-names = "ahb", "axi", "spi", "spix2";</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 0xa3&gt;, &lt;&amp;cpg 0xa4&gt;;</div><div class='add'>+        reset-names = "hresetn", "aresetn";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+          compatible = "jedec,spi-nor";</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+          spi-tx-bus-width = &lt;1&gt;;</div><div class='add'>+          spi-rx-bus-width = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml<br/>index c800d5e53b65..5eccd10d95ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml</a></div><div class='hunk'>@@ -66,8 +66,15 @@ patternProperties:</div><div class='ctx'>       - compatible</div><div class='ctx'> </div><div class='ctx'>   '^interrupt-controller@[0-9a-f]+$':</div><div class='del'>-    description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          enum:</div><div class='add'>+            - aspeed,ast2500-scu-ic</div><div class='add'>+            - aspeed,ast2600-scu-ic0</div><div class='add'>+            - aspeed,ast2600-scu-ic1</div><div class='ctx'> </div><div class='ctx'>   '^silicon-id@[0-9a-f]+$':</div><div class='ctx'>     description: Unique hardware silicon identifiers within the SoC</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml<br/>new file mode 100644<br/>index 000000000000..525de9ab3c2b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77759.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mfd/maxim,max77759.yaml</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/maxim,max77759.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX77759 PMIC for USB Type-C applications</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - André Draszik &lt;andre.draszik@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This is a part of device tree bindings for the MAX77759 companion Power</div><div class='add'>+  Management IC for USB Type-C applications.</div><div class='add'>+</div><div class='add'>+  The MAX77759 includes Battery Charger, Fuel Gauge, temperature sensors, USB</div><div class='add'>+  Type-C Port Controller (TCPC), NVMEM, and a GPIO expander.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max77759</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio:</div><div class='add'>+    $ref: /schemas/gpio/maxim,max77759-gpio.yaml</div><div class='add'>+</div><div class='add'>+  nvmem-0:</div><div class='add'>+    $ref: /schemas/nvmem/maxim,max77759-nvmem.yaml</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pmic@66 {</div><div class='add'>+            compatible = "maxim,max77759";</div><div class='add'>+            reg = &lt;0x66&gt;;</div><div class='add'>+            interrupts-extended = &lt;&amp;gpa8 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            gpio {</div><div class='add'>+                compatible = "maxim,max77759-gpio";</div><div class='add'>+</div><div class='add'>+                gpio-controller;</div><div class='add'>+                #gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            nvmem-0 {</div><div class='add'>+                compatible = "maxim,max77759-nvmem";</div><div class='add'>+</div><div class='add'>+                nvmem-layout {</div><div class='add'>+                    compatible = "fixed-layout";</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    reboot-mode@0 {</div><div class='add'>+                        reg = &lt;0x0 0x4&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    boot-reason@4 {</div><div class='add'>+                        reg = &lt;0x4 0x4&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    shutdown-user-flag@8 {</div><div class='add'>+                        reg = &lt;0x8 0x1&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    rsoc@10 {</div><div class='add'>+                        reg = &lt;0xa 0x2&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml<br/>index a85137add668..471373ad0cfb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mips/cpus.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mips/cpus.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mips/cpus.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mips/cpus.yaml</a></div><div class='hunk'>@@ -50,6 +50,7 @@ properties:</div><div class='ctx'>   device_type: true</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/opp/opp-v1.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -68,7 +69,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml<br/>index 9075add020bf..8e79de97b242 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml</a></div><div class='hunk'>@@ -38,6 +38,15 @@ allOf:</div><div class='ctx'>             - items:</div><div class='ctx'>                 - const: clk_out_sd1</div><div class='ctx'>                 - const: clk_in_sd1</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,rzn1-sdhci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -46,6 +55,10 @@ properties:</div><div class='ctx'>       - const: arasan,sdhci-4.9a                # generic Arasan SDHCI 4.9a PHY</div><div class='ctx'>       - const: arasan,sdhci-5.1                 # generic Arasan SDHCI 5.1 PHY</div><div class='ctx'>       - items:</div><div class='add'>+          - const: renesas,r9a06g032-sdhci      # Renesas RZ/N1D SoC</div><div class='add'>+          - const: renesas,rzn1-sdhci           # Renesas RZ/N1 family</div><div class='add'>+          - const: arasan,sdhci-8.9a</div><div class='add'>+      - items:</div><div class='ctx'>           - const: rockchip,rk3399-sdhci-5.1    # rk3399 eMMC PHY</div><div class='ctx'>           - const: arasan,sdhci-5.1</div><div class='ctx'>         description:</div><div class='hunk'>@@ -109,7 +122,14 @@ properties:</div><div class='ctx'>       - const: gate</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: int</div><div class='add'>+      - const: wakeup</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml<br/>index b86ffb53b18b..62087cf920df 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/fsl,esdhc.yaml</a></div><div class='hunk'>@@ -24,6 +24,7 @@ properties:</div><div class='ctx'>           - fsl,t1040-esdhc</div><div class='ctx'>           - fsl,t4240-esdhc</div><div class='ctx'>           - fsl,ls1012a-esdhc</div><div class='add'>+          - fsl,ls1021a-esdhc</div><div class='ctx'>           - fsl,ls1028a-esdhc</div><div class='ctx'>           - fsl,ls1088a-esdhc</div><div class='ctx'>           - fsl,ls1043a-esdhc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml<br/>index 3f48d8292d5b..ee2ddef36369 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml</a></div><div class='hunk'>@@ -52,9 +52,14 @@ properties:</div><div class='ctx'>       - const: core</div><div class='ctx'>       - const: axi</div><div class='ctx'> </div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   marvell,pad-type:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -142,7 +147,7 @@ properties:</div><div class='ctx'>       This property provides the re-tuning counter.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: mmc-controller.yaml#</div><div class='add'>+  - $ref: sdhci-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -164,26 +169,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         marvell,pad-type: false</div><div class='ctx'> </div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - marvell,armada-cp110-sdhci</div><div class='del'>-              - marvell,armada-ap807-sdhci</div><div class='del'>-              - marvell,armada-ap806-sdhci</div><div class='del'>-</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          minItems: 2</div><div class='del'>-</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: core</div><div class='del'>-            - const: axi</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt b/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt<br/>deleted file mode 100644<br/>index f064528effed..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-* Microchip PIC32 SDHCI Controller</div><div class='del'>-</div><div class='del'>-This file documents differences between the core properties in mmc.txt</div><div class='del'>-and the properties used by the sdhci-pic32 driver.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "microchip,pic32mzda-sdhci"</div><div class='del'>-- interrupts: Should contain interrupt</div><div class='del'>-- clock-names: Should be "base_clk", "sys_clk".</div><div class='del'>-               See: Documentation/devicetree/bindings/resource-names.txt</div><div class='del'>-- clocks: Phandle to the clock.</div><div class='del'>-          See: Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-- pinctrl-names: A pinctrl state names "default" must be defined.</div><div class='del'>-- pinctrl-0: Phandle referencing pin configuration of the SDHCI controller.</div><div class='del'>-             See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	sdhci@1f8ec000 {</div><div class='del'>-		compatible = "microchip,pic32mzda-sdhci";</div><div class='del'>-		reg = &lt;0x1f8ec000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;rootclk REF4CLK&gt;, &lt;&amp;rootclk PB5CLK&gt;;</div><div class='del'>-		clock-names = "base_clk", "sys_clk";</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cap-sd-highspeed;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_sdhc1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.yaml b/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.yaml<br/>new file mode 100644<br/>index 000000000000..ca0ca7df9ee9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/microchip,sdhci-pic32.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip PIC32 SDHI Controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Microchip PIC32 family of microcontrollers (MCUs) includes models with</div><div class='add'>+  Secure Digital Host Controller Interface (SDHCI) controllers, allowing them</div><div class='add'>+  to interface with Secure Digital (SD) cards. This interface is used for reading,</div><div class='add'>+  writing, and managing data on SD cards, enabling storage and data transfer</div><div class='add'>+  capabilities in embedded systems.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: microchip,pic32mzda-sdhci</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: base_clk</div><div class='add'>+      - const: sys_clk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - pinctrl-names</div><div class='add'>+  - pinctrl-0</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/microchip,pic32-clock.h&gt;</div><div class='add'>+    mmc@1f8ec000 {</div><div class='add'>+        compatible = "microchip,pic32mzda-sdhci";</div><div class='add'>+        reg = &lt;0x1f8ec000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;rootclk REF4CLK&gt;, &lt;&amp;rootclk PB5CLK&gt;;</div><div class='add'>+        clock-names = "base_clk", "sys_clk";</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        cap-sd-highspeed;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_sdhc1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml<br/>index 0debccbd6519..6dd26ad31491 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/mtk-sd.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/mtk-sd.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/mtk-sd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/mtk-sd.yaml</a></div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'>           - const: mediatek,mt2701-mmc</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt6893-mmc</div><div class='ctx'>               - mediatek,mt8186-mmc</div><div class='ctx'>               - mediatek,mt8188-mmc</div><div class='ctx'>               - mediatek,mt8192-mmc</div><div class='hunk'>@@ -299,6 +300,7 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           enum:</div><div class='add'>+            - mediatek,mt6893-mmc</div><div class='ctx'>             - mediatek,mt8186-mmc</div><div class='ctx'>             - mediatek,mt8188-mmc</div><div class='ctx'>             - mediatek,mt8195-mmc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml<br/>index 773baa6c2656..7563623876fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml</a></div><div class='hunk'>@@ -69,7 +69,9 @@ properties:</div><div class='ctx'>               - renesas,sdhi-r9a09g011 # RZ/V2M</div><div class='ctx'>           - const: renesas,rzg2l-sdhi</div><div class='ctx'>       - items:</div><div class='del'>-          - const: renesas,sdhi-r9a09g047 # RZ/G3E</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,sdhi-r9a09g047 # RZ/G3E</div><div class='add'>+              - renesas,sdhi-r9a09g056 # RZ/V2N</div><div class='ctx'>           - const: renesas,sdhi-r9a09g057 # RZ/V2H(P)</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml<br/>index eed9063e9bb3..2b2cbce2458b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/sdhci-msm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/sdhci-msm.yaml</a></div><div class='hunk'>@@ -60,6 +60,7 @@ properties:</div><div class='ctx'>               - qcom,sm6125-sdhci</div><div class='ctx'>               - qcom,sm6350-sdhci</div><div class='ctx'>               - qcom,sm6375-sdhci</div><div class='add'>+              - qcom,sm7150-sdhci</div><div class='ctx'>               - qcom,sm8150-sdhci</div><div class='ctx'>               - qcom,sm8250-sdhci</div><div class='ctx'>               - qcom,sm8350-sdhci</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci.txt b/Documentation/devicetree/bindings/mmc/sdhci.txt<br/>deleted file mode 100644<br/>index 0e9923a64024..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/sdhci.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/sdhci.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-The properties specific for SD host controllers. For properties shared by MMC</div><div class='del'>-host controllers refer to the mmc[1] bindings.</div><div class='del'>-</div><div class='del'>-  [1] Documentation/devicetree/bindings/mmc/mmc.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit</div><div class='del'>-  property corresponds to the bits in the sdhci capability register. If the bit</div><div class='del'>-  is on in the mask then the bit is incorrect in the register and should be</div><div class='del'>-  turned off, before applying sdhci-caps.</div><div class='del'>-- sdhci-caps: The sdhci capabilities register is incorrect. This 64bit</div><div class='del'>-  property corresponds to the bits in the sdhci capability register. If the</div><div class='del'>-  bit is on in the property then the bit should be turned on.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml<br/>index e6e604072d3c..f882219a0a26 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml</a></div><div class='hunk'>@@ -19,6 +19,9 @@ properties:</div><div class='ctx'>               - rockchip,rk3562-dwcmshc</div><div class='ctx'>               - rockchip,rk3576-dwcmshc</div><div class='ctx'>           - const: rockchip,rk3588-dwcmshc</div><div class='add'>+      - items:</div><div class='add'>+          - const: sophgo,sg2044-dwcmshc</div><div class='add'>+          - const: sophgo,sg2042-dwcmshc</div><div class='ctx'>       - enum:</div><div class='ctx'>           - rockchip,rk3568-dwcmshc</div><div class='ctx'>           - rockchip,rk3588-dwcmshc</div><div class='hunk'>@@ -117,10 +120,6 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - power-domains</div><div class='ctx'> </div><div class='del'>-    else:</div><div class='del'>-      properties:</div><div class='del'>-        power-domains: false</div><div class='del'>-</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml b/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml<br/>new file mode 100644<br/>index 000000000000..13d9382058fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/spacemit,sdhci.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/spacemit,sdhci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SpacemiT SDHCI Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yixun Lan &lt;dlan@gentoo.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: spacemit,k1-sdhci</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: core clock, used by internal controller</div><div class='add'>+      - description: io clock, output for SD, SDIO, eMMC device</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: io</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mmc@d4281000 {</div><div class='add'>+      compatible = "spacemit,k1-sdhci";</div><div class='add'>+      reg = &lt;0xd4281000 0x200&gt;;</div><div class='add'>+      interrupts = &lt;101&gt;;</div><div class='add'>+      interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+      clocks = &lt;&amp;clk_apmu 10&gt;, &lt;&amp;clk_apmu 13&gt;;</div><div class='add'>+      clock-names = "core", "io";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt b/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt<br/>deleted file mode 100644<br/>index d7fb6abb3eb8..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/mmc/vt8500-sdmmc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-* Wondermedia WM8505/WM8650 SD/MMC Host Controller</div><div class='del'>-</div><div class='del'>-This file documents differences between the core properties described</div><div class='del'>-by mmc.txt and the properties used by the wmt-sdmmc driver.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "wm,wm8505-sdhc".</div><div class='del'>-- interrupts: Two interrupts are required - regular irq and dma irq.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- sdon-inverted: SD_ON bit is inverted on the controller</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-sdhc@d800a000 {</div><div class='del'>-	compatible = "wm,wm8505-sdhc";</div><div class='del'>-	reg = &lt;0xd800a000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;20 21&gt;;</div><div class='del'>-	clocks = &lt;&amp;sdhc&gt;;</div><div class='del'>-	bus-width = &lt;4&gt;;</div><div class='del'>-	sdon-inverted;</div><div class='del'>-};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml b/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml<br/>new file mode 100644<br/>index 000000000000..5b55174e9088<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/mmc/wm,wm8505-sdhc.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/wm,wm8505-sdhc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WonderMedia SoC SDHCI Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexey Charkov &lt;alchark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: wm,wm8505-sdhc</div><div class='add'>+      - items:</div><div class='add'>+          - const: wm,wm8650-sdhc</div><div class='add'>+          - const: wm,wm8505-sdhc</div><div class='add'>+      - items:</div><div class='add'>+          - const: wm,wm8750-sdhc</div><div class='add'>+          - const: wm,wm8505-sdhc</div><div class='add'>+      - items:</div><div class='add'>+          - const: wm,wm8850-sdhc</div><div class='add'>+          - const: wm,wm8505-sdhc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: SDMMC controller interrupt</div><div class='add'>+      - description: SDMMC controller DMA interrupt</div><div class='add'>+</div><div class='add'>+  sdon-inverted:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: All chips before (not including) WM8505 rev. A2 treated their</div><div class='add'>+      "clock stop" bit (register offset 0x08 a.k.a. SDMMC_BUSMODE, bit 0x10)</div><div class='add'>+      as "set 1 to disable SD clock", while all the later versions treated it</div><div class='add'>+      as "set 0 to disable SD clock". Set this property for later versions of</div><div class='add'>+      wm,wm8505-sdhc. On wm,wm8650-sdhc and later this property is implied and</div><div class='add'>+      does not need to be set explicitly</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mmc@d800a000 {</div><div class='add'>+        compatible = "wm,wm8505-sdhc";</div><div class='add'>+        reg = &lt;0xd800a000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;20&gt;, &lt;21&gt;;</div><div class='add'>+        clocks = &lt;&amp;sdhc&gt;;</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        sdon-inverted;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml b/Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml<br/>new file mode 100644<br/>index 000000000000..69eb29dc4d7b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/aeonsemi,as21xxx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Aeonsemi AS21XXX Ethernet PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Aeonsemi AS21xxx Ethernet PHYs requires a firmware to be loaded to actually</div><div class='add'>+  work. The same firmware is compatible with various PHYs of the same family.</div><div class='add'>+</div><div class='add'>+  A PHY with not firmware loaded will be exposed on the MDIO bus with ID</div><div class='add'>+  0x7500 0x7500 or 0x7500 0x9410 on C45 registers.</div><div class='add'>+</div><div class='add'>+  This can be done and is implemented by OEM in 2 different way:</div><div class='add'>+    - Attached SPI flash directly to the PHY with the firmware. The PHY</div><div class='add'>+      will self load the firmware in the presence of this configuration.</div><div class='add'>+    - Manually provided firmware loaded from a file in the filesystem.</div><div class='add'>+</div><div class='add'>+  Each PHY can support up to 5 LEDs.</div><div class='add'>+</div><div class='add'>+  AS2xxx PHY Name logic:</div><div class='add'>+</div><div class='add'>+  AS21x1xxB1</div><div class='add'>+      ^ ^^</div><div class='add'>+      | |J: Supports SyncE/PTP</div><div class='add'>+      | |P: No SyncE/PTP support</div><div class='add'>+      | 1: Supports 2nd Serdes</div><div class='add'>+      | 2: Not 2nd Serdes support</div><div class='add'>+      0: 10G, 5G, 2.5G</div><div class='add'>+      5: 5G, 2.5G</div><div class='add'>+      2: 2.5G</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-phy.yaml#</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - ethernet-phy-id7500.9410</div><div class='add'>+          - ethernet-phy-id7500.9402</div><div class='add'>+          - ethernet-phy-id7500.9412</div><div class='add'>+          - ethernet-phy-id7500.9422</div><div class='add'>+          - ethernet-phy-id7500.9432</div><div class='add'>+          - ethernet-phy-id7500.9442</div><div class='add'>+          - ethernet-phy-id7500.9452</div><div class='add'>+          - ethernet-phy-id7500.9462</div><div class='add'>+          - ethernet-phy-id7500.9472</div><div class='add'>+          - ethernet-phy-id7500.9482</div><div class='add'>+          - ethernet-phy-id7500.9492</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    description: specify the name of PHY firmware to load</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: ethernet-phy-id7500.9410</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - firmware-name</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    firmware-name: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-phy@1f {</div><div class='add'>+            compatible = "ethernet-phy-id7500.9410",</div><div class='add'>+                         "ethernet-phy-ieee802.3-c45";</div><div class='add'>+</div><div class='add'>+            reg = &lt;31&gt;;</div><div class='add'>+            firmware-name = "as21x1x_fw.bin";</div><div class='add'>+</div><div class='add'>+            leds {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                led@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+                    function = LED_FUNCTION_LAN;</div><div class='add'>+                    function-enumerator = &lt;0&gt;;</div><div class='add'>+                    default-state = "keep";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                led@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+                    function = LED_FUNCTION_LAN;</div><div class='add'>+                    function-enumerator = &lt;1&gt;;</div><div class='add'>+                    default-state = "keep";</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml b/Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml<br/>index 0fdd11265417..6d22131ac2f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/airoha,en7581-eth.yaml</a></div><div class='hunk'>@@ -57,6 +57,16 @@ properties:</div><div class='ctx'>       - const: hsi-mac</div><div class='ctx'>       - const: xfp-mac</div><div class='ctx'> </div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: QDMA0 buffer memory</div><div class='add'>+      - description: QDMA1 buffer memory</div><div class='add'>+</div><div class='add'>+  memory-region-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: qdma0-buf</div><div class='add'>+      - const: qdma1-buf</div><div class='add'>+</div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -140,6 +150,9 @@ examples:</div><div class='ctx'>                      &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'>                      &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='add'>+        memory-region = &lt;&amp;qdma0_buf&gt;, &lt;&amp;qdma1_buf&gt;;</div><div class='add'>+        memory-region-names = "qdma0-buf", "qdma1-buf";</div><div class='add'>+</div><div class='ctx'>         airoha,npu = &lt;&amp;npu&gt;;</div><div class='ctx'> </div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml<br/>index 7fe0352dff0f..7b6a2fde8175 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>               - allwinner,sun20i-d1-emac</div><div class='ctx'>               - allwinner,sun50i-h6-emac</div><div class='ctx'>               - allwinner,sun50i-h616-emac0</div><div class='add'>+              - allwinner,sun55i-a523-emac0</div><div class='ctx'>           - const: allwinner,sun50i-a64-emac</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml<br/>index d02e9dd847ef..3ab60c70286f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml</a></div><div class='hunk'>@@ -48,6 +48,18 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       The GPIO number of the NXP chipset used for BT_WAKE_IN.</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Host wakeup by falling edge interrupt on this pin which is</div><div class='add'>+      connected to BT_WAKE_OUT pin of the NXP chipset.</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wakeup</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='ctx'>   nxp,wakeout-pin:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>     description:</div><div class='hunk'>@@ -61,6 +73,7 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     serial {</div><div class='ctx'>         bluetooth {</div><div class='ctx'>             compatible = "nxp,88w8987-bt";</div><div class='hunk'>@@ -70,5 +83,9 @@ examples:</div><div class='ctx'>             nxp,wakein-pin = /bits/ 8 &lt;18&gt;;</div><div class='ctx'>             nxp,wakeout-pin = /bits/ 8 &lt;19&gt;;</div><div class='ctx'>             local-bd-address = [66 55 44 33 22 11];</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            interrupt-names = "wakeup";</div><div class='add'>+            wakeup-source;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml b/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml<br/>index 660e2ca42daf..a3db6d594c8c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/brcm,asp-v2.0.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/brcm,asp-v2.0.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom ASP 2.0 Ethernet controller</div><div class='add'>+title: Broadcom ASP Ethernet controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Justin Chen &lt;justin.chen@broadcom.com&gt;</div><div class='hunk'>@@ -17,16 +17,16 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - brcm,bcm74110-asp</div><div class='add'>+          - const: brcm,asp-v3.0</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - brcm,bcm74165b0-asp</div><div class='ctx'>           - const: brcm,asp-v2.2</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - brcm,bcm74165-asp</div><div class='ctx'>           - const: brcm,asp-v2.1</div><div class='del'>-      - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - brcm,bcm72165-asp</div><div class='del'>-          - const: brcm,asp-v2.0</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -39,11 +39,9 @@ properties:</div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - description: RX/TX interrupt</div><div class='del'>-      - description: Port 0 Wake-on-LAN</div><div class='del'>-      - description: Port 1 Wake-on-LAN</div><div class='add'>+      - description: Wake-on-LAN interrupt</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -106,16 +104,17 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     ethernet@9c00000 {</div><div class='del'>-        compatible = "brcm,bcm72165-asp", "brcm,asp-v2.0";</div><div class='add'>+        compatible = "brcm,bcm74165-asp", "brcm,asp-v2.1";</div><div class='ctx'>         reg = &lt;0x9c00000 0x1fff14&gt;;</div><div class='del'>-        interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                              &lt;&amp;aon_pm_l2_intc 14&gt;;</div><div class='ctx'>         ranges = &lt;0x0 0x9c00000 0x1fff14&gt;;</div><div class='ctx'>         clocks = &lt;&amp;scmi 14&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'>         mdio@c614 {</div><div class='del'>-            compatible = "brcm,asp-v2.0-mdio";</div><div class='add'>+            compatible = "brcm,asp-v2.1-mdio";</div><div class='ctx'>             reg = &lt;0xc614 0x8&gt;;</div><div class='ctx'>             reg-names = "mdio";</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -127,7 +126,7 @@ examples:</div><div class='ctx'>        };</div><div class='ctx'> </div><div class='ctx'>         mdio@ce14 {</div><div class='del'>-            compatible = "brcm,asp-v2.0-mdio";</div><div class='add'>+            compatible = "brcm,asp-v2.1-mdio";</div><div class='ctx'>             reg = &lt;0xce14 0x8&gt;;</div><div class='ctx'>             reg-names = "mdio";</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml b/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml<br/>index 63bee5b542f5..43516dd357b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/brcm,unimac-mdio.yaml</a></div><div class='hunk'>@@ -22,9 +22,9 @@ properties:</div><div class='ctx'>       - brcm,genet-mdio-v3</div><div class='ctx'>       - brcm,genet-mdio-v4</div><div class='ctx'>       - brcm,genet-mdio-v5</div><div class='del'>-      - brcm,asp-v2.0-mdio</div><div class='ctx'>       - brcm,asp-v2.1-mdio</div><div class='ctx'>       - brcm,asp-v2.2-mdio</div><div class='add'>+      - brcm,asp-v3.0-mdio</div><div class='ctx'>       - brcm,unimac-mdio</div><div class='ctx'>       - brcm,bcm6846-mdio</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml b/Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml<br/>index e0ec53bc10c6..1525a50ded47 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/can/microchip,mcp2510.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/can/microchip,mcp2510.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/net/can/microchip,mcp2510.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microchip MCP251X stand-alone CAN controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml<br/>index 144a3785132c..ec0c2168e4b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml</a></div><div class='hunk'>@@ -16,9 +16,7 @@ properties:</div><div class='ctx'>           - nxp,sja1000</div><div class='ctx'>           - technologic,sja1000</div><div class='ctx'>       - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,r9a06g032-sja1000 # RZ/N1D</div><div class='del'>-              - renesas,r9a06g033-sja1000 # RZ/N1S</div><div class='add'>+          - const: renesas,r9a06g032-sja1000 # RZ/N1D</div><div class='ctx'>           - const: renesas,rzn1-sja1000 # RZ/N1</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml<br/>index f6884f6e59e7..f4ac21c68427 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml</a></div><div class='hunk'>@@ -42,19 +42,80 @@ properties:</div><div class='ctx'>               - renesas,r9a07g054-canfd    # RZ/V2L</div><div class='ctx'>           - const: renesas,rzg2l-canfd     # RZ/G2L family</div><div class='ctx'> </div><div class='add'>+      - const: renesas,r9a09g047-canfd     # RZ/G3E</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='add'>+  interrupts:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: Channel interrupt</div><div class='add'>+          - description: Global interrupt</div><div class='add'>+      - items:</div><div class='add'>+          - description: CAN global error interrupt</div><div class='add'>+          - description: CAN receive FIFO interrupt</div><div class='add'>+          - description: CAN0 error interrupt</div><div class='add'>+          - description: CAN0 transmit interrupt</div><div class='add'>+          - description: CAN0 transmit/receive FIFO receive completion interrupt</div><div class='add'>+          - description: CAN1 error interrupt</div><div class='add'>+          - description: CAN1 transmit interrupt</div><div class='add'>+          - description: CAN1 transmit/receive FIFO receive completion interrupt</div><div class='add'>+          - description: CAN2 error interrupt</div><div class='add'>+          - description: CAN2 transmit interrupt</div><div class='add'>+          - description: CAN2 transmit/receive FIFO receive completion interrupt</div><div class='add'>+          - description: CAN3 error interrupt</div><div class='add'>+          - description: CAN3 transmit interrupt</div><div class='add'>+          - description: CAN3 transmit/receive FIFO receive completion interrupt</div><div class='add'>+          - description: CAN4 error interrupt</div><div class='add'>+          - description: CAN4 transmit interrupt</div><div class='add'>+          - description: CAN4 transmit/receive FIFO receive completion interrupt</div><div class='add'>+          - description: CAN5 error interrupt</div><div class='add'>+          - description: CAN5 transmit interrupt</div><div class='add'>+          - description: CAN5 transmit/receive FIFO receive completion interrupt</div><div class='add'>+        minItems: 8</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: ch_int</div><div class='add'>+          - const: g_int</div><div class='add'>+      - items:</div><div class='add'>+          - const: g_err</div><div class='add'>+          - const: g_recc</div><div class='add'>+          - const: ch0_err</div><div class='add'>+          - const: ch0_rec</div><div class='add'>+          - const: ch0_trx</div><div class='add'>+          - const: ch1_err</div><div class='add'>+          - const: ch1_rec</div><div class='add'>+          - const: ch1_trx</div><div class='add'>+          - const: ch2_err</div><div class='add'>+          - const: ch2_rec</div><div class='add'>+          - const: ch2_trx</div><div class='add'>+          - const: ch3_err</div><div class='add'>+          - const: ch3_rec</div><div class='add'>+          - const: ch3_trx</div><div class='add'>+          - const: ch4_err</div><div class='add'>+          - const: ch4_rec</div><div class='add'>+          - const: ch4_trx</div><div class='add'>+          - const: ch5_err</div><div class='add'>+          - const: ch5_rec</div><div class='add'>+          - const: ch5_trx</div><div class='add'>+        minItems: 8</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: fck</div><div class='del'>-      - const: canfd</div><div class='del'>-      - const: can_clk</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: fck</div><div class='add'>+          - const: canfd</div><div class='add'>+          - const: can_clk</div><div class='add'>+      - items:</div><div class='add'>+          - const: fck</div><div class='add'>+          - const: ram_clk</div><div class='add'>+          - const: can_clk</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -117,48 +178,38 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='del'>-          items:</div><div class='del'>-            - description: CAN global error interrupt</div><div class='del'>-            - description: CAN receive FIFO interrupt</div><div class='del'>-            - description: CAN0 error interrupt</div><div class='del'>-            - description: CAN0 transmit interrupt</div><div class='del'>-            - description: CAN0 transmit/receive FIFO receive completion interrupt</div><div class='del'>-            - description: CAN1 error interrupt</div><div class='del'>-            - description: CAN1 transmit interrupt</div><div class='del'>-            - description: CAN1 transmit/receive FIFO receive completion interrupt</div><div class='add'>+          maxItems: 8</div><div class='ctx'> </div><div class='ctx'>         interrupt-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: g_err</div><div class='del'>-            - const: g_recc</div><div class='del'>-            - const: ch0_err</div><div class='del'>-            - const: ch0_rec</div><div class='del'>-            - const: ch0_trx</div><div class='del'>-            - const: ch1_err</div><div class='del'>-            - const: ch1_rec</div><div class='del'>-            - const: ch1_trx</div><div class='add'>+          maxItems: 8</div><div class='ctx'> </div><div class='ctx'>         resets:</div><div class='add'>+          minItems: 2</div><div class='ctx'>           maxItems: 2</div><div class='ctx'> </div><div class='ctx'>         reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: rstp_n</div><div class='del'>-            - const: rstc_n</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='ctx'> </div><div class='ctx'>       required:</div><div class='ctx'>         - reset-names</div><div class='del'>-    else:</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,rcar-gen3-canfd</div><div class='add'>+              - renesas,rcar-gen4-canfd</div><div class='add'>+    then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='del'>-          items:</div><div class='del'>-            - description: Channel interrupt</div><div class='del'>-            - description: Global interrupt</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='ctx'> </div><div class='ctx'>         interrupt-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: ch_int</div><div class='del'>-            - const: g_int</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='ctx'> </div><div class='ctx'>         resets:</div><div class='ctx'>           maxItems: 1</div><div class='hunk'>@@ -167,20 +218,54 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='add'>+            const: renesas,r9a09g047-canfd</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 20</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 20</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - reset-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,rcar-gen3-canfd</div><div class='add'>+              - renesas,rzg2l-canfd</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel[2-7]$": false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='ctx'>             const: renesas,r8a779h0-canfd</div><div class='ctx'>     then:</div><div class='ctx'>       patternProperties:</div><div class='ctx'>         "^channel[4-7]$": false</div><div class='del'>-    else:</div><div class='del'>-      if:</div><div class='del'>-        not:</div><div class='del'>-          properties:</div><div class='del'>-            compatible:</div><div class='del'>-              contains:</div><div class='del'>-                const: renesas,rcar-gen4-canfd</div><div class='del'>-      then:</div><div class='del'>-        patternProperties:</div><div class='del'>-          "^channel[2-7]$": false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,r9a09g047-canfd</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel[6-7]$": false</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml<br/>index ea979bcae1d6..51205f9f2985 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml</a></div><div class='hunk'>@@ -96,6 +96,10 @@ properties:</div><div class='ctx'>           Built-in switch of the Airoha EN7581 SoC</div><div class='ctx'>         const: airoha,en7581-switch</div><div class='ctx'> </div><div class='add'>+      - description:</div><div class='add'>+          Built-in switch of the Airoha AN7583 SoC</div><div class='add'>+        const: airoha,an7583-switch</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -291,6 +295,7 @@ allOf:</div><div class='ctx'>           enum:</div><div class='ctx'>             - mediatek,mt7988-switch</div><div class='ctx'>             - airoha,en7581-switch</div><div class='add'>+            - airoha,an7583-switch</div><div class='ctx'>     then:</div><div class='ctx'>       $ref: "#/$defs/mt7530-dsa-port"</div><div class='ctx'>       properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml<br/>index 45819b235800..7cbf11bbe99c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ethernet-controller.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/ethernet-controller.yaml</a></div><div class='hunk'>@@ -16,30 +16,6 @@ properties:</div><div class='ctx'>   label:</div><div class='ctx'>     description: Human readable label on a port of a box.</div><div class='ctx'> </div><div class='del'>-  local-mac-address:</div><div class='del'>-    description:</div><div class='del'>-      Specifies the MAC address that was assigned to the network device.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='del'>-    minItems: 6</div><div class='del'>-    maxItems: 6</div><div class='del'>-</div><div class='del'>-  mac-address:</div><div class='del'>-    description:</div><div class='del'>-      Specifies the MAC address that was last used by the boot</div><div class='del'>-      program; should be used in cases where the MAC address assigned</div><div class='del'>-      to the device by the boot program is different from the</div><div class='del'>-      local-mac-address property.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='del'>-    minItems: 6</div><div class='del'>-    maxItems: 6</div><div class='del'>-</div><div class='del'>-  max-frame-size:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description:</div><div class='del'>-      Maximum transfer unit (IEEE defined MTU), rather than the</div><div class='del'>-      maximum frame size (there\'s contradiction in the Devicetree</div><div class='del'>-      Specification).</div><div class='del'>-</div><div class='ctx'>   max-speed:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='hunk'>@@ -74,19 +50,17 @@ properties:</div><div class='ctx'>       - rev-rmii</div><div class='ctx'>       - moca</div><div class='ctx'> </div><div class='del'>-      # RX and TX delays are added by the MAC when required</div><div class='add'>+      # RX and TX delays are provided by the PCB. See below</div><div class='ctx'>       - rgmii</div><div class='ctx'> </div><div class='del'>-      # RGMII with internal RX and TX delays provided by the PHY,</div><div class='del'>-      # the MAC should not add the RX or TX delays in this case</div><div class='add'>+      # RX and TX delays are not provided by the PCB. This is the most</div><div class='add'>+      # frequent case. See below</div><div class='ctx'>       - rgmii-id</div><div class='ctx'> </div><div class='del'>-      # RGMII with internal RX delay provided by the PHY, the MAC</div><div class='del'>-      # should not add an RX delay in this case</div><div class='add'>+      # TX delay is provided by the PCB. See below</div><div class='ctx'>       - rgmii-rxid</div><div class='ctx'> </div><div class='del'>-      # RGMII with internal TX delay provided by the PHY, the MAC</div><div class='del'>-      # should not add an TX delay in this case</div><div class='add'>+      # RX delay is provided by the PCB. See below</div><div class='ctx'>       - rgmii-txid</div><div class='ctx'>       - rtbi</div><div class='ctx'>       - smii</div><div class='hunk'>@@ -197,7 +171,7 @@ properties:</div><div class='ctx'>             description:</div><div class='ctx'>               Link speed.</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            enum: [10, 100, 1000, 2500, 10000]</div><div class='add'>+            enum: [10, 100, 1000, 2500, 5000, 10000]</div><div class='ctx'> </div><div class='ctx'>           full-duplex:</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/flag</div><div class='hunk'>@@ -262,6 +236,7 @@ dependencies:</div><div class='ctx'>   pcs-handle-names: [pcs-handle]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/net/network-class.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         phy-mode:</div><div class='hunk'>@@ -286,4 +261,89 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='add'>+# Informative</div><div class='add'>+# ===========</div><div class='add'>+#</div><div class='add'>+# 'phy-modes' &amp; 'phy-connection-type' properties 'rgmii', 'rgmii-id',</div><div class='add'>+# 'rgmii-rxid', and 'rgmii-txid' are frequently used wrongly by</div><div class='add'>+# developers. This informative section clarifies their usage.</div><div class='add'>+#</div><div class='add'>+# The RGMII specification requires a 2ns delay between the data and</div><div class='add'>+# clock signals on the RGMII bus. How this delay is implemented is not</div><div class='add'>+# specified.</div><div class='add'>+#</div><div class='add'>+# One option is to make the clock traces on the PCB longer than the</div><div class='add'>+# data traces. A sufficiently difference in length can provide the 2ns</div><div class='add'>+# delay. If both the RX and TX delays are implemented in this manner,</div><div class='add'>+# 'rgmii' should be used, so indicating the PCB adds the delays.</div><div class='add'>+#</div><div class='add'>+# If the PCB does not add these delays via extra long traces,</div><div class='add'>+# 'rgmii-id' should be used. Here, 'id' refers to 'internal delay',</div><div class='add'>+# where either the MAC or PHY adds the delay.</div><div class='add'>+#</div><div class='add'>+# If only one of the two delays are implemented via extra long clock</div><div class='add'>+# lines, either 'rgmii-rxid' or 'rgmii-txid' should be used,</div><div class='add'>+# indicating the MAC or PHY should implement one of the delays</div><div class='add'>+# internally, while the PCB implements the other delay.</div><div class='add'>+#</div><div class='add'>+# Device Tree describes hardware, and in this case, it describes the</div><div class='add'>+# PCB between the MAC and the PHY, if the PCB implements delays or</div><div class='add'>+# not.</div><div class='add'>+#</div><div class='add'>+# In practice, very few PCBs make use of extra long clock lines. Hence</div><div class='add'>+# any RGMII phy mode other than 'rgmii-id' is probably wrong, and is</div><div class='add'>+# unlikely to be accepted during review without details provided in</div><div class='add'>+# the commit description and comments in the .dts file.</div><div class='add'>+#</div><div class='add'>+# When the PCB does not implement the delays, the MAC or PHY must.  As</div><div class='add'>+# such, this is software configuration, and so not described in Device</div><div class='add'>+# Tree.</div><div class='add'>+#</div><div class='add'>+# The following describes how Linux implements the configuration of</div><div class='add'>+# the MAC and PHY to add these delays when the PCB does not. As stated</div><div class='add'>+# above, developers often get this wrong, and the aim of this section</div><div class='add'>+# is reduce the frequency of these errors by Linux developers. Other</div><div class='add'>+# users of the Device Tree may implement it differently, and still be</div><div class='add'>+# consistent with both the normative and informative description</div><div class='add'>+# above.</div><div class='add'>+#</div><div class='add'>+# By default in Linux, when using phylib/phylink, the MAC is expected</div><div class='add'>+# to read the 'phy-mode' from Device Tree, not implement any delays,</div><div class='add'>+# and pass the value to the PHY. The PHY will then implement delays as</div><div class='add'>+# specified by the 'phy-mode'. The PHY should always be reconfigured</div><div class='add'>+# to implement the needed delays, replacing any setting performed by</div><div class='add'>+# strapping or the bootloader, etc.</div><div class='add'>+#</div><div class='add'>+# Experience to date is that all PHYs which implement RGMII also</div><div class='add'>+# implement the ability to add or not add the needed delays. Hence</div><div class='add'>+# this default is expected to work in all cases. Ignoring this default</div><div class='add'>+# is likely to be questioned by Reviews, and require a strong argument</div><div class='add'>+# to be accepted.</div><div class='add'>+#</div><div class='add'>+# There are a small number of cases where the MAC has hard coded</div><div class='add'>+# delays which cannot be disabled. The 'phy-mode' only describes the</div><div class='add'>+# PCB.  The inability to disable the delays in the MAC does not change</div><div class='add'>+# the meaning of 'phy-mode'. It does however mean that a 'phy-mode' of</div><div class='add'>+# 'rgmii' is now invalid, it cannot be supported, since both the PCB</div><div class='add'>+# and the MAC and PHY adding delays cannot result in a functional</div><div class='add'>+# link. Thus the MAC should report a fatal error for any modes which</div><div class='add'>+# cannot be supported. When the MAC implements the delay, it must</div><div class='add'>+# ensure that the PHY does not also implement the same delay. So it</div><div class='add'>+# must modify the phy-mode it passes to the PHY, removing the delay it</div><div class='add'>+# has added. Failure to remove the delay will result in a</div><div class='add'>+# non-functioning link.</div><div class='add'>+#</div><div class='add'>+# Sometimes there is a need to fine tune the delays. Often the MAC or</div><div class='add'>+# PHY can perform this fine tuning. In the MAC node, the Device Tree</div><div class='add'>+# properties 'rx-internal-delay-ps' and 'tx-internal-delay-ps' should</div><div class='add'>+# be used to indicate fine tuning performed by the MAC. The values</div><div class='add'>+# expected here are small. A value of 2000ps, i.e 2ns, and a phy-mode</div><div class='add'>+# of 'rgmii' will not be accepted by Reviewers.</div><div class='add'>+#</div><div class='add'>+# If the PHY is to perform fine tuning, the properties</div><div class='add'>+# 'rx-internal-delay-ps' and 'tx-internal-delay-ps' in the PHY node</div><div class='add'>+# should be used. When the PHY is implementing delays, e.g. 'rgmii-id'</div><div class='add'>+# these properties should have a value near to 2000ps. If the PCB is</div><div class='add'>+# implementing delays, e.g. 'rgmii', a small value can be used to fine</div><div class='add'>+# tune the delay added by the PCB.</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml<br/>index 824bbe4333b7..71e2cd32580f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ethernet-phy.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/ethernet-phy.yaml</a></div><div class='hunk'>@@ -238,6 +238,16 @@ properties:</div><div class='ctx'>       peak-to-peak specified in ANSI X3.263. When omitted, the PHYs default</div><div class='ctx'>       will be left as is.</div><div class='ctx'> </div><div class='add'>+  mac-termination-ohms:</div><div class='add'>+    maximum: 200</div><div class='add'>+    description:</div><div class='add'>+      The xMII signals need series termination on the driver side to match both</div><div class='add'>+      the output driver impedance and the line characteristic impedance, to</div><div class='add'>+      prevent reflections and EMI problems. Select a resistance value which is</div><div class='add'>+      supported by the builtin resistors of the PHY, otherwise the resistors may</div><div class='add'>+      have to be placed on board. When omitted, the PHYs default will be left as</div><div class='add'>+      is.</div><div class='add'>+</div><div class='ctx'>   leds:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/network-class.yaml b/Documentation/devicetree/bindings/net/network-class.yaml<br/>new file mode 100644<br/>index 000000000000..06461fb92eb8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/network-class.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/network-class.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/network-class.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Network Class Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Devicetree Specification Mailing List &lt;devicetree-spec@vger.kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  address-bits:</div><div class='add'>+    description:</div><div class='add'>+      Specifies number of address bits required to address the device</div><div class='add'>+      described by this node, e.g. size of the MAC address.</div><div class='add'>+    default: 48</div><div class='add'>+    const: 48</div><div class='add'>+</div><div class='add'>+  local-mac-address:</div><div class='add'>+    description:</div><div class='add'>+      Specifies MAC address that was assigned to the network device described by</div><div class='add'>+      the node containing this property.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    minItems: 6</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  mac-address:</div><div class='add'>+    description:</div><div class='add'>+      Specifies the MAC address that was last used by the boot program. This</div><div class='add'>+      property should be used in cases where the MAC address assigned to the</div><div class='add'>+      device by the boot program is different from the</div><div class='add'>+      local-mac-address property. This property shall be used only if the value</div><div class='add'>+      differs from local-mac-address property value.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    minItems: 6</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  max-frame-size:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Maximum transfer unit (IEEE defined MTU), rather than the</div><div class='add'>+      maximum frame size (there\'s contradiction in the Devicetree</div><div class='add'>+      Specification).</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml b/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml<br/>new file mode 100644<br/>index 000000000000..c498a9999289<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml</a></div><div class='hunk'>@@ -0,0 +1,203 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/renesas,r9a09g057-gbeth.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GBETH glue layer for Renesas RZ/V2H(P) (and similar SoCs)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - renesas,r9a09g056-gbeth</div><div class='add'>+          - renesas,r9a09g057-gbeth</div><div class='add'>+          - renesas,rzv2h-gbeth</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a09g056-gbeth # RZ/V2N</div><div class='add'>+          - renesas,r9a09g057-gbeth # RZ/V2H(P)</div><div class='add'>+      - const: renesas,rzv2h-gbeth</div><div class='add'>+      - const: snps,dwmac-5.20</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: CSR clock</div><div class='add'>+      - description: AXI system clock</div><div class='add'>+      - description: PTP clock</div><div class='add'>+      - description: TX clock</div><div class='add'>+      - description: RX clock</div><div class='add'>+      - description: TX clock phase-shifted by 180 degrees</div><div class='add'>+      - description: RX clock phase-shifted by 180 degrees</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: stmmaceth</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: ptp_ref</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx-180</div><div class='add'>+      - const: rx-180</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 11</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: macirq</div><div class='add'>+      - const: eth_wake_irq</div><div class='add'>+      - const: eth_lpi</div><div class='add'>+      - const: rx-queue-0</div><div class='add'>+      - const: rx-queue-1</div><div class='add'>+      - const: rx-queue-2</div><div class='add'>+      - const: rx-queue-3</div><div class='add'>+      - const: tx-queue-0</div><div class='add'>+      - const: tx-queue-1</div><div class='add'>+      - const: tx-queue-2</div><div class='add'>+      - const: tx-queue-3</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: AXI power-on system reset</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: snps,dwmac.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/renesas-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@15c30000 {</div><div class='add'>+        compatible = "renesas,r9a09g057-gbeth", "renesas,rzv2h-gbeth", "snps,dwmac-5.20";</div><div class='add'>+        reg = &lt;0x15c30000 0x10000&gt;;</div><div class='add'>+        clocks =  &lt;&amp;cpg CPG_MOD 0xbd&gt;, &lt;&amp;cpg CPG_MOD 0xbc&gt;,</div><div class='add'>+                  &lt;&amp;ptp_clock&gt;, &lt;&amp;cpg CPG_MOD 0xb8&gt;,</div><div class='add'>+                  &lt;&amp;cpg CPG_MOD 0xb9&gt;, &lt;&amp;cpg CPG_MOD 0xba&gt;,</div><div class='add'>+                  &lt;&amp;cpg CPG_MOD 0xbb&gt;;</div><div class='add'>+        clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+                      "tx", "rx", "tx-180", "rx-180";</div><div class='add'>+        resets = &lt;&amp;cpg 0xb0&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 767 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 772 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 745 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 768 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 769 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 770 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 771 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",</div><div class='add'>+                          "rx-queue-0", "rx-queue-1", "rx-queue-2",</div><div class='add'>+                          "rx-queue-3", "tx-queue-0", "tx-queue-1",</div><div class='add'>+                          "tx-queue-2", "tx-queue-3";</div><div class='add'>+        phy-mode = "rgmii-id";</div><div class='add'>+        snps,multicast-filter-bins = &lt;256&gt;;</div><div class='add'>+        snps,perfect-filter-entries = &lt;128&gt;;</div><div class='add'>+        rx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+        tx-fifo-depth = &lt;8192&gt;;</div><div class='add'>+        snps,fixed-burst;</div><div class='add'>+        snps,force_thresh_dma_mode;</div><div class='add'>+        snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+        snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='add'>+        snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+        snps,txpbl = &lt;32&gt;;</div><div class='add'>+        snps,rxpbl = &lt;32&gt;;</div><div class='add'>+        phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+</div><div class='add'>+        stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+            snps,lpi_en;</div><div class='add'>+            snps,wr_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+            snps,rd_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+            snps,blen = &lt;16 8 4 0 0 0 0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mtl_rx_setup: rx-queues-config {</div><div class='add'>+            snps,rx-queues-to-use = &lt;4&gt;;</div><div class='add'>+            snps,rx-sched-sp;</div><div class='add'>+</div><div class='add'>+            queue0 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x1&gt;;</div><div class='add'>+                snps,map-to-dma-channel = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            queue1 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x2&gt;;</div><div class='add'>+                snps,map-to-dma-channel = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            queue2 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x4&gt;;</div><div class='add'>+                snps,map-to-dma-channel = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            queue3 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x8&gt;;</div><div class='add'>+                snps,map-to-dma-channel = &lt;3&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mtl_tx_setup: tx-queues-config {</div><div class='add'>+            snps,tx-queues-to-use = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            queue0 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            queue1 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            queue2 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x4&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            queue3 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+            phy0: ethernet-phy@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml<br/>index 78b3030dc56d..90b79283e228 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/snps,dwmac.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/snps,dwmac.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a></div><div class='hunk'>@@ -75,6 +75,7 @@ properties:</div><div class='ctx'>         - qcom,sm8150-ethqos</div><div class='ctx'>         - renesas,r9a06g032-gmac</div><div class='ctx'>         - renesas,rzn1-gmac</div><div class='add'>+        - renesas,rzv2h-gbeth</div><div class='ctx'>         - rockchip,px30-gmac</div><div class='ctx'>         - rockchip,rk3128-gmac</div><div class='ctx'>         - rockchip,rk3228-gmac</div><div class='hunk'>@@ -114,19 +115,25 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    items:</div><div class='del'>-      - description: Combined signal for various interrupt events</div><div class='del'>-      - description: The interrupt to manage the remote wake-up packet detection</div><div class='del'>-      - description: The interrupt that occurs when Rx exits the LPI state</div><div class='del'>-      - description: The interrupt that occurs when HW safety error triggered</div><div class='add'>+    maxItems: 11</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     minItems: 1</div><div class='add'>+    maxItems: 11</div><div class='ctx'>     items:</div><div class='del'>-      - const: macirq</div><div class='del'>-      - enum: [eth_wake_irq, eth_lpi, sfty]</div><div class='del'>-      - enum: [eth_wake_irq, eth_lpi, sfty]</div><div class='del'>-      - enum: [eth_wake_irq, eth_lpi, sfty]</div><div class='add'>+      oneOf:</div><div class='add'>+        - description: Combined signal for various interrupt events</div><div class='add'>+          const: macirq</div><div class='add'>+        - description: The interrupt to manage the remote wake-up packet detection</div><div class='add'>+          const: eth_wake_irq</div><div class='add'>+        - description: The interrupt that occurs when Rx exits the LPI state</div><div class='add'>+          const: eth_lpi</div><div class='add'>+        - description: The interrupt that occurs when HW safety error triggered</div><div class='add'>+          const: sfty</div><div class='add'>+        - description: Per channel receive completion interrupt</div><div class='add'>+          pattern: '^rx-queue-[0-3]$'</div><div class='add'>+        - description: Per channel transmit completion interrupt</div><div class='add'>+          pattern: '^tx-queue-[0-3]$'</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -703,7 +710,7 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        mdio0 {</div><div class='add'>+        mdio {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'>             compatible = "snps,dwmac-mdio";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml<br/>index 50c24248df26..28a0bddb9af9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ti,dp83822.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ti,dp83822.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ti,dp83822.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/ti,dp83822.yaml</a></div><div class='hunk'>@@ -122,6 +122,9 @@ properties:</div><div class='ctx'>       - free-running</div><div class='ctx'>       - recovered</div><div class='ctx'> </div><div class='add'>+  mac-termination-ohms:</div><div class='add'>+    enum: [43, 44, 46, 48, 50, 53, 55, 58, 61, 65, 69, 73, 78, 84, 91, 99]</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='hunk'>@@ -137,6 +140,7 @@ examples:</div><div class='ctx'>         rx-internal-delay-ps = &lt;1&gt;;</div><div class='ctx'>         tx-internal-delay-ps = &lt;1&gt;;</div><div class='ctx'>         ti,gpio2-clk-out = "xi";</div><div class='add'>+        mac-termination-ohms = &lt;43&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml<br/>index b11894fbaec4..7b3d948f187d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml</a></div><div class='hunk'>@@ -143,6 +143,8 @@ properties:</div><div class='ctx'>           label:</div><div class='ctx'>             description: label associated with this port</div><div class='ctx'> </div><div class='add'>+          fixed-link: true</div><div class='add'>+</div><div class='ctx'>           ti,mac-only:</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>             description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml b/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml<br/>index 4158673f723c..8359de7ad272 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml</a></div><div class='hunk'>@@ -63,7 +63,7 @@ examples:</div><div class='ctx'>             compatible = "vertexcom,mse1021";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-            interrupts = &lt;23 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupts = &lt;23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>             spi-cpha;</div><div class='ctx'>             spi-cpol;</div><div class='ctx'>             spi-max-frequency = &lt;7142857&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml b/Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml<br/>new file mode 100644<br/>index 000000000000..e663d5a2f014<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/via,vt8500-rhine.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/via,vt8500-rhine.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: VIA Rhine 10/100 Network Controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  VIA's Ethernet controller integrated into VIA VT8500,</div><div class='add'>+  WonderMedia WM8950 and related SoCs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexey Charkov &lt;alchark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: via,vt8500-rhine</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ethernet@d8004000 {</div><div class='add'>+        compatible = "via,vt8500-rhine";</div><div class='add'>+        reg = &lt;0xd8004000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;10&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/via-rhine.txt b/Documentation/devicetree/bindings/net/via-rhine.txt<br/>deleted file mode 100644<br/>index 334eca2bf937..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/via-rhine.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/via-rhine.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-* VIA Rhine 10/100 Network Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "via,vt8500-rhine" for integrated</div><div class='del'>-	Rhine controllers found in VIA VT8500, WonderMedia WM8950</div><div class='del'>-	and similar. These are listed as 1106:3106 rev. 0x84 on the</div><div class='del'>-	virtual PCI bus under vendor-provided kernels</div><div class='del'>-- reg : Address and length of the io space</div><div class='del'>-- interrupts : Should contain the controller interrupt line</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-ethernet@d8004000 {</div><div class='del'>-	compatible = "via,vt8500-rhine";</div><div class='del'>-	reg = &lt;0xd8004000 0x100&gt;;</div><div class='del'>-	interrupts = &lt;10&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml<br/>index a3607d55ef36..7c8100e59a6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description:</div><div class='ctx'>   binding.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: ieee80211.yaml#</div><div class='add'>+  - $ref: /schemas/net/wireless/wireless-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml<br/>index 9e557cb838c7..dc68dd59988f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/wireless/qcom,ath12k.yaml</a></div><div class='hunk'>@@ -21,6 +21,12 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  firmware-name:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      If present, a board or platform specific string used to lookup</div><div class='add'>+      usecase-specific firmware files for the device.</div><div class='add'>+</div><div class='ctx'>   vddaon-supply:</div><div class='ctx'>     description: VDD_AON supply regulator handle</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml<br/>new file mode 100644<br/>index 000000000000..363a0ecb6ad9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml</a></div><div class='hunk'>@@ -0,0 +1,315 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/wireless/qcom,ipq5332-wifi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies ath12k wireless devices (AHB)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jeff Johnson &lt;jjohnson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm Technologies IEEE 802.11be AHB devices.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,ipq5332-wifi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock used for copy engine</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Fatal interrupt</div><div class='add'>+      - description: Ready interrupt</div><div class='add'>+      - description: Spawn acknowledge interrupt</div><div class='add'>+      - description: Stop acknowledge interrupt</div><div class='add'>+      - description: misc-pulse1 interrupt events</div><div class='add'>+      - description: misc-latch interrupt events</div><div class='add'>+      - description: sw exception interrupt events</div><div class='add'>+      - description: interrupt event for ring CE0</div><div class='add'>+      - description: interrupt event for ring CE1</div><div class='add'>+      - description: interrupt event for ring CE2</div><div class='add'>+      - description: interrupt event for ring CE3</div><div class='add'>+      - description: interrupt event for ring CE4</div><div class='add'>+      - description: interrupt event for ring CE5</div><div class='add'>+      - description: interrupt event for ring CE6</div><div class='add'>+      - description: interrupt event for ring CE7</div><div class='add'>+      - description: interrupt event for ring CE8</div><div class='add'>+      - description: interrupt event for ring CE9</div><div class='add'>+      - description: interrupt event for ring CE10</div><div class='add'>+      - description: interrupt event for ring CE11</div><div class='add'>+      - description: interrupt event for ring host2wbm-desc-feed</div><div class='add'>+      - description: interrupt event for ring host2reo-re-injection</div><div class='add'>+      - description: interrupt event for ring host2reo-command</div><div class='add'>+      - description: interrupt event for ring host2rxdma-monitor-ring1</div><div class='add'>+      - description: interrupt event for ring reo2ost-exception</div><div class='add'>+      - description: interrupt event for ring wbm2host-rx-release</div><div class='add'>+      - description: interrupt event for ring reo2host-status</div><div class='add'>+      - description: interrupt event for ring reo2host-destination-ring4</div><div class='add'>+      - description: interrupt event for ring reo2host-destination-ring3</div><div class='add'>+      - description: interrupt event for ring reo2host-destination-ring2</div><div class='add'>+      - description: interrupt event for ring reo2host-destination-ring1</div><div class='add'>+      - description: interrupt event for ring rxdma2host-monitor-destination-mac3</div><div class='add'>+      - description: interrupt event for ring rxdma2host-monitor-destination-mac2</div><div class='add'>+      - description: interrupt event for ring rxdma2host-monitor-destination-mac1</div><div class='add'>+      - description: interrupt event for ring host2rxdma-host-buf-ring-mac3</div><div class='add'>+      - description: interrupt event for ring host2rxdma-host-buf-ring-mac2</div><div class='add'>+      - description: interrupt event for ring host2rxdma-host-buf-ring-mac1</div><div class='add'>+      - description: interrupt event for ring host2tcl-input-ring4</div><div class='add'>+      - description: interrupt event for ring host2tcl-input-ring3</div><div class='add'>+      - description: interrupt event for ring host2tcl-input-ring2</div><div class='add'>+      - description: interrupt event for ring host2tcl-input-ring1</div><div class='add'>+      - description: interrupt event for ring wbm2host-tx-completions-ring4</div><div class='add'>+      - description: interrupt event for ring wbm2host-tx-completions-ring3</div><div class='add'>+      - description: interrupt event for ring wbm2host-tx-completions-ring2</div><div class='add'>+      - description: interrupt event for ring wbm2host-tx-completions-ring1</div><div class='add'>+      - description: interrupt event for ring host2tx-monitor-ring1</div><div class='add'>+      - description: interrupt event for ring txmon2host-monitor-destination-mac3</div><div class='add'>+      - description: interrupt event for ring txmon2host-monitor-destination-mac2</div><div class='add'>+      - description: interrupt event for ring txmon2host-monitor-destination-mac1</div><div class='add'>+      - description: interrupt event for umac-reset</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: spawn</div><div class='add'>+      - const: stop-ack</div><div class='add'>+      - const: misc-pulse1</div><div class='add'>+      - const: misc-latch</div><div class='add'>+      - const: sw-exception</div><div class='add'>+      - const: ce0</div><div class='add'>+      - const: ce1</div><div class='add'>+      - const: ce2</div><div class='add'>+      - const: ce3</div><div class='add'>+      - const: ce4</div><div class='add'>+      - const: ce5</div><div class='add'>+      - const: ce6</div><div class='add'>+      - const: ce7</div><div class='add'>+      - const: ce8</div><div class='add'>+      - const: ce9</div><div class='add'>+      - const: ce10</div><div class='add'>+      - const: ce11</div><div class='add'>+      - const: host2wbm-desc-feed</div><div class='add'>+      - const: host2reo-re-injection</div><div class='add'>+      - const: host2reo-command</div><div class='add'>+      - const: host2rxdma-monitor-ring1</div><div class='add'>+      - const: reo2ost-exception</div><div class='add'>+      - const: wbm2host-rx-release</div><div class='add'>+      - const: reo2host-status</div><div class='add'>+      - const: reo2host-destination-ring4</div><div class='add'>+      - const: reo2host-destination-ring3</div><div class='add'>+      - const: reo2host-destination-ring2</div><div class='add'>+      - const: reo2host-destination-ring1</div><div class='add'>+      - const: rxdma2host-monitor-destination-mac3</div><div class='add'>+      - const: rxdma2host-monitor-destination-mac2</div><div class='add'>+      - const: rxdma2host-monitor-destination-mac1</div><div class='add'>+      - const: host2rxdma-host-buf-ring-mac3</div><div class='add'>+      - const: host2rxdma-host-buf-ring-mac2</div><div class='add'>+      - const: host2rxdma-host-buf-ring-mac1</div><div class='add'>+      - const: host2tcl-input-ring4</div><div class='add'>+      - const: host2tcl-input-ring3</div><div class='add'>+      - const: host2tcl-input-ring2</div><div class='add'>+      - const: host2tcl-input-ring1</div><div class='add'>+      - const: wbm2host-tx-completions-ring4</div><div class='add'>+      - const: wbm2host-tx-completions-ring3</div><div class='add'>+      - const: wbm2host-tx-completions-ring2</div><div class='add'>+      - const: wbm2host-tx-completions-ring1</div><div class='add'>+      - const: host2tx-monitor-ring1</div><div class='add'>+      - const: txmon2host-monitor-destination-mac3</div><div class='add'>+      - const: txmon2host-monitor-destination-mac2</div><div class='add'>+      - const: txmon2host-monitor-destination-mac1</div><div class='add'>+      - const: umac-reset</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    description:</div><div class='add'>+      Memory regions used by the ath12k firmware.</div><div class='add'>+    items:</div><div class='add'>+      - description: Q6 memory region</div><div class='add'>+      - description: m3 dump memory region</div><div class='add'>+      - description: Q6 caldata memory region</div><div class='add'>+      - description: Multi Link Operation (MLO) Global memory region</div><div class='add'>+</div><div class='add'>+  memory-region-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: q6-region</div><div class='add'>+      - const: m3-dump</div><div class='add'>+      - const: q6-caldb</div><div class='add'>+      - const: mlo-global-mem</div><div class='add'>+</div><div class='add'>+  qcom,calibration-variant:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description:</div><div class='add'>+      String to uniquely identify variant of the calibration data for designs</div><div class='add'>+      with colliding bus and device ids</div><div class='add'>+</div><div class='add'>+  qcom,rproc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the Qualcomm Hexagon DSP(q6 remote processor), which is utilized</div><div class='add'>+      for offloading WiFi processing tasks, this q6 remote processor operates in</div><div class='add'>+      conjunction with WiFi.</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: States used by the AP to signal the remote processor</div><div class='add'>+    items:</div><div class='add'>+      - description: Shutdown WCSS pd</div><div class='add'>+      - description: Stop WCSS pd</div><div class='add'>+      - description: Spawn WCSS pd</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description:</div><div class='add'>+      Names of the states used by the AP to signal the remote processor</div><div class='add'>+    items:</div><div class='add'>+      - const: shutdown</div><div class='add'>+      - const: stop</div><div class='add'>+      - const: spawn</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - memory-region</div><div class='add'>+  - memory-region-names</div><div class='add'>+  - qcom,rproc</div><div class='add'>+  - qcom,smem-states</div><div class='add'>+  - qcom,smem-state-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,ipq5332-gcc.h&gt;</div><div class='add'>+</div><div class='add'>+    wifi0: wifi@c000000 {</div><div class='add'>+        compatible = "qcom,ipq5332-wifi";</div><div class='add'>+        reg = &lt;0x0c000000 0x1000000&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_XO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+        interrupts-extended = &lt;&amp;wcss_smp2p_in 8 IRQ_TYPE_NONE&gt;,</div><div class='add'>+                              &lt;&amp;wcss_smp2p_in 9 IRQ_TYPE_NONE&gt;,</div><div class='add'>+                              &lt;&amp;wcss_smp2p_in 12 IRQ_TYPE_NONE&gt;,</div><div class='add'>+                              &lt;&amp;wcss_smp2p_in 11 IRQ_TYPE_NONE&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 559 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 560 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 561 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 422 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 423 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 424 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 425 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 426 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 427 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 428 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 429 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 430 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 431 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 432 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 433 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 491 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 495 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 493 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 544 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 457 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 466 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 497 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 454 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 453 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 452 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 451 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 484 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 549 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 507 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 500 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 499 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 498 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 450 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 449 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 447 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 543 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 482 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;intc GIC_SPI 419 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "fatal",</div><div class='add'>+                          "ready",</div><div class='add'>+                          "spawn",</div><div class='add'>+                          "stop-ack",</div><div class='add'>+                          "misc-pulse1",</div><div class='add'>+                          "misc-latch",</div><div class='add'>+                          "sw-exception",</div><div class='add'>+                          "ce0",</div><div class='add'>+                          "ce1",</div><div class='add'>+                          "ce2",</div><div class='add'>+                          "ce3",</div><div class='add'>+                          "ce4",</div><div class='add'>+                          "ce5",</div><div class='add'>+                          "ce6",</div><div class='add'>+                          "ce7",</div><div class='add'>+                          "ce8",</div><div class='add'>+                          "ce9",</div><div class='add'>+                          "ce10",</div><div class='add'>+                          "ce11",</div><div class='add'>+                          "host2wbm-desc-feed",</div><div class='add'>+                          "host2reo-re-injection",</div><div class='add'>+                          "host2reo-command",</div><div class='add'>+                          "host2rxdma-monitor-ring1",</div><div class='add'>+                          "reo2ost-exception",</div><div class='add'>+                          "wbm2host-rx-release",</div><div class='add'>+                          "reo2host-status",</div><div class='add'>+                          "reo2host-destination-ring4",</div><div class='add'>+                          "reo2host-destination-ring3",</div><div class='add'>+                          "reo2host-destination-ring2",</div><div class='add'>+                          "reo2host-destination-ring1",</div><div class='add'>+                          "rxdma2host-monitor-destination-mac3",</div><div class='add'>+                          "rxdma2host-monitor-destination-mac2",</div><div class='add'>+                          "rxdma2host-monitor-destination-mac1",</div><div class='add'>+                          "host2rxdma-host-buf-ring-mac3",</div><div class='add'>+                          "host2rxdma-host-buf-ring-mac2",</div><div class='add'>+                          "host2rxdma-host-buf-ring-mac1",</div><div class='add'>+                          "host2tcl-input-ring4",</div><div class='add'>+                          "host2tcl-input-ring3",</div><div class='add'>+                          "host2tcl-input-ring2",</div><div class='add'>+                          "host2tcl-input-ring1",</div><div class='add'>+                          "wbm2host-tx-completions-ring4",</div><div class='add'>+                          "wbm2host-tx-completions-ring3",</div><div class='add'>+                          "wbm2host-tx-completions-ring2",</div><div class='add'>+                          "wbm2host-tx-completions-ring1",</div><div class='add'>+                          "host2tx-monitor-ring1",</div><div class='add'>+                          "txmon2host-monitor-destination-mac3",</div><div class='add'>+                          "txmon2host-monitor-destination-mac2",</div><div class='add'>+                          "txmon2host-monitor-destination-mac1",</div><div class='add'>+                          "umac-reset";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;q6_region&gt;, &lt;&amp;m3_dump&gt;, &lt;&amp;q6_caldb&gt;, &lt;&amp;mlo_mem&gt;;</div><div class='add'>+        memory-region-names = "q6-region", "m3-dump", "q6-caldb", "mlo-global-mem";</div><div class='add'>+        qcom,calibration-variant = "RDP441_1";</div><div class='add'>+        qcom,rproc = &lt;&amp;q6v5_wcss&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;wcss_smp2p_out 8&gt;,</div><div class='add'>+                           &lt;&amp;wcss_smp2p_out 9&gt;,</div><div class='add'>+                           &lt;&amp;wcss_smp2p_out 10&gt;;</div><div class='add'>+        qcom,smem-state-names = "shutdown",</div><div class='add'>+                                "stop",</div><div class='add'>+                                "spawn";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml<br/>index 84e5659e50ef..6c0888ae4c4e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml</a></div><div class='hunk'>@@ -71,15 +71,12 @@ properties:</div><div class='ctx'>       "Platform Data Set" in Silabs jargon). Default depends of "compatible"</div><div class='ctx'>       string. For "silabs,wf200", the default is 'wf200.pds'.</div><div class='ctx'> </div><div class='del'>-  local-mac-address: true</div><div class='del'>-</div><div class='del'>-  mac-address: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/net/wireless/wireless-controller.yaml#</div><div class='ctx'>   - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml b/Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml<br/>new file mode 100644<br/>index 000000000000..7379f6c1aa05<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/net/wireless/wireless-controller.yaml</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/wireless/wireless-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wireless Controller Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^wifi(@.*)?$"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ieee80211.yaml#</div><div class='add'>+  - $ref: /schemas/net/network-class.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/numa.txt b/Documentation/devicetree/bindings/numa.txt<br/>deleted file mode 100644<br/>index 42f282c2f3cc..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/numa.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/numa.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,319 +0,0 @@</div><div class='del'>-==============================================================================</div><div class='del'>-NUMA binding description.</div><div class='del'>-==============================================================================</div><div class='del'>-</div><div class='del'>-==============================================================================</div><div class='del'>-1 - Introduction</div><div class='del'>-==============================================================================</div><div class='del'>-</div><div class='del'>-Systems employing a Non Uniform Memory Access (NUMA) architecture contain</div><div class='del'>-collections of hardware resources including processors, memory, and I/O buses,</div><div class='del'>-that comprise what is commonly known as a NUMA node.</div><div class='del'>-Processor accesses to memory within the local NUMA node is generally faster</div><div class='del'>-than processor accesses to memory outside of the local NUMA node.</div><div class='del'>-DT defines interfaces that allow the platform to convey NUMA node</div><div class='del'>-topology information to OS.</div><div class='del'>-</div><div class='del'>-==============================================================================</div><div class='del'>-2 - numa-node-id</div><div class='del'>-==============================================================================</div><div class='del'>-</div><div class='del'>-For the purpose of identification, each NUMA node is associated with a unique</div><div class='del'>-token known as a node id. For the purpose of this binding</div><div class='del'>-a node id is a 32-bit integer.</div><div class='del'>-</div><div class='del'>-A device node is associated with a NUMA node by the presence of a</div><div class='del'>-numa-node-id property which contains the node id of the device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	/* numa node 0 */</div><div class='del'>-	numa-node-id = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	/* numa node 1 */</div><div class='del'>-	numa-node-id = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-==============================================================================</div><div class='del'>-3 - distance-map</div><div class='del'>-==============================================================================</div><div class='del'>-</div><div class='del'>-The optional device tree node distance-map describes the relative</div><div class='del'>-distance (memory latency) between all numa nodes.</div><div class='del'>-</div><div class='del'>-- compatible : Should at least contain "numa-distance-map-v1".</div><div class='del'>-</div><div class='del'>-- distance-matrix</div><div class='del'>-  This property defines a matrix to describe the relative distances</div><div class='del'>-  between all numa nodes.</div><div class='del'>-  It is represented as a list of node pairs and their relative distance.</div><div class='del'>-</div><div class='del'>-  Note:</div><div class='del'>-	1. Each entry represents distance from first node to second node.</div><div class='del'>-	The distances are equal in either direction.</div><div class='del'>-	2. The distance from a node to self (local distance) is represented</div><div class='del'>-	with value 10 and all internode distance should be represented with</div><div class='del'>-	a value greater than 10.</div><div class='del'>-	3. distance-matrix should have entries in lexicographical ascending</div><div class='del'>-	order of nodes.</div><div class='del'>-	4. There must be only one device node distance-map which must</div><div class='del'>-	reside in the root node.</div><div class='del'>-	5. If the distance-map node is not present, a default</div><div class='del'>-	distance-matrix is used.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	4 nodes connected in mesh/ring topology as below,</div><div class='del'>-</div><div class='del'>-		0_______20______1</div><div class='del'>-		|               |</div><div class='del'>-		|               |</div><div class='del'>-		20             20</div><div class='del'>-		|               |</div><div class='del'>-		|               |</div><div class='del'>-		|_______________|</div><div class='del'>-		3       20      2</div><div class='del'>-</div><div class='del'>-	if relative distance for each hop is 20,</div><div class='del'>-	then internode distance would be,</div><div class='del'>-	      0 -&gt; 1 = 20</div><div class='del'>-	      1 -&gt; 2 = 20</div><div class='del'>-	      2 -&gt; 3 = 20</div><div class='del'>-	      3 -&gt; 0 = 20</div><div class='del'>-	      0 -&gt; 2 = 40</div><div class='del'>-	      1 -&gt; 3 = 40</div><div class='del'>-</div><div class='del'>-     and dt presentation for this distance matrix is,</div><div class='del'>-</div><div class='del'>-		distance-map {</div><div class='del'>-			 compatible = "numa-distance-map-v1";</div><div class='del'>-			 distance-matrix = &lt;0 0  10&gt;,</div><div class='del'>-					   &lt;0 1  20&gt;,</div><div class='del'>-					   &lt;0 2  40&gt;,</div><div class='del'>-					   &lt;0 3  20&gt;,</div><div class='del'>-					   &lt;1 0  20&gt;,</div><div class='del'>-					   &lt;1 1  10&gt;,</div><div class='del'>-					   &lt;1 2  20&gt;,</div><div class='del'>-					   &lt;1 3  40&gt;,</div><div class='del'>-					   &lt;2 0  40&gt;,</div><div class='del'>-					   &lt;2 1  20&gt;,</div><div class='del'>-					   &lt;2 2  10&gt;,</div><div class='del'>-					   &lt;2 3  20&gt;,</div><div class='del'>-					   &lt;3 0  20&gt;,</div><div class='del'>-					   &lt;3 1  40&gt;,</div><div class='del'>-					   &lt;3 2  20&gt;,</div><div class='del'>-					   &lt;3 3  10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-==============================================================================</div><div class='del'>-4 - Empty memory nodes</div><div class='del'>-==============================================================================</div><div class='del'>-</div><div class='del'>-Empty memory nodes, which no memory resides in, are allowed. There are no</div><div class='del'>-device nodes for these empty memory nodes. However, the NUMA node IDs and</div><div class='del'>-distance maps are still valid and memory may be added into them through</div><div class='del'>-hotplug afterwards.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	memory@0 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x0 0x0 0x80000000&gt;;</div><div class='del'>-		numa-node-id = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@80000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0x80000000 0x0 0x80000000&gt;;</div><div class='del'>-		numa-node-id = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Empty memory node 2 and 3 */</div><div class='del'>-	distance-map {</div><div class='del'>-		compatible = "numa-distance-map-v1";</div><div class='del'>-		distance-matrix = &lt;0 0  10&gt;,</div><div class='del'>-				  &lt;0 1  20&gt;,</div><div class='del'>-				  &lt;0 2  40&gt;,</div><div class='del'>-				  &lt;0 3  20&gt;,</div><div class='del'>-				  &lt;1 0  20&gt;,</div><div class='del'>-				  &lt;1 1  10&gt;,</div><div class='del'>-				  &lt;1 2  20&gt;,</div><div class='del'>-				  &lt;1 3  40&gt;,</div><div class='del'>-				  &lt;2 0  40&gt;,</div><div class='del'>-				  &lt;2 1  20&gt;,</div><div class='del'>-				  &lt;2 2  10&gt;,</div><div class='del'>-				  &lt;2 3  20&gt;,</div><div class='del'>-				  &lt;3 0  20&gt;,</div><div class='del'>-				  &lt;3 1  40&gt;,</div><div class='del'>-				  &lt;3 2  20&gt;,</div><div class='del'>-				  &lt;3 3  10&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-==============================================================================</div><div class='del'>-5 - Example dts</div><div class='del'>-==============================================================================</div><div class='del'>-</div><div class='del'>-Dual socket system consists of 2 boards connected through ccn bus and</div><div class='del'>-each board having one socket/soc of 8 cpus, memory and pci bus.</div><div class='del'>-</div><div class='del'>-	memory@c00000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x0 0xc00000 0x0 0x80000000&gt;;</div><div class='del'>-		/* node 0 */</div><div class='del'>-		numa-node-id = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	memory@10000000000 {</div><div class='del'>-		device_type = "memory";</div><div class='del'>-		reg = &lt;0x100 0x0 0x0 0x80000000&gt;;</div><div class='del'>-		/* node 1 */</div><div class='del'>-		numa-node-id = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cpus {</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		cpu@0 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x0&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			/* node 0 */</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@1 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x1&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@2 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x2&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@3 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x3&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@4 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x4&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@5 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x5&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@6 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x6&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@7 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x7&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@8 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x8&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			/* node 1 */</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@9 {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0x9&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@a {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0xa&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@b {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0xb&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@c {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0xc&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@d {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0xd&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@e {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0xe&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		cpu@f {</div><div class='del'>-			device_type = "cpu";</div><div class='del'>-			compatible =  "arm,armv8";</div><div class='del'>-			reg = &lt;0x0 0xf&gt;;</div><div class='del'>-			enable-method = "psci";</div><div class='del'>-			numa-node-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pcie0: pcie0@848000000000 {</div><div class='del'>-		compatible = "arm,armv8";</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		bus-range = &lt;0 255&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		reg = &lt;0x8480 0x00000000 0 0x10000000&gt;;  /* Configuration space */</div><div class='del'>-		ranges = &lt;0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000&gt;;</div><div class='del'>-		/* node 0 */</div><div class='del'>-		numa-node-id = &lt;0&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-	pcie1: pcie1@948000000000 {</div><div class='del'>-		compatible = "arm,armv8";</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		bus-range = &lt;0 255&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		reg = &lt;0x9480 0x00000000 0 0x10000000&gt;;  /* Configuration space */</div><div class='del'>-		ranges = &lt;0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000&gt;;</div><div class='del'>-		/* node 1 */</div><div class='del'>-		numa-node-id = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-	distance-map {</div><div class='del'>-		compatible = "numa-distance-map-v1";</div><div class='del'>-		distance-matrix = &lt;0 0 10&gt;,</div><div class='del'>-				  &lt;0 1 20&gt;,</div><div class='del'>-				  &lt;1 1 10&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml b/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml<br/>index 8b3826243ddd..38e3ad50ff4f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/nvmem/layouts/fixed-cell.yaml</a></div><div class='hunk'>@@ -27,7 +27,7 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     items:</div><div class='ctx'>       - minimum: 0</div><div class='del'>-        maximum: 7</div><div class='add'>+        maximum: 31</div><div class='ctx'>         description:</div><div class='ctx'>           Offset in bit within the address range specified by reg.</div><div class='ctx'>       - minimum: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml b/Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml<br/>new file mode 100644<br/>index 000000000000..1e3bd4433007<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/nvmem/maxim,max77759-nvmem.yaml</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/maxim,max77759-nvmem.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX77759 Non Volatile Memory</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - André Draszik &lt;andre.draszik@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This module is part of the MAX77759 PMIC. For additional information, see</div><div class='add'>+  Documentation/devicetree/bindings/mfd/maxim,max77759.yaml.</div><div class='add'>+</div><div class='add'>+  The MAX77759 is a PMIC integrating, amongst others, Non Volatile Memory</div><div class='add'>+  (NVMEM) with 30 bytes of storage which can be used by software to store</div><div class='add'>+  information or communicate with a boot loader.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max77759-nvmem</div><div class='add'>+</div><div class='add'>+  wp-gpios: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml<br/>index 39c209249c9c..3f6dc6a3a9f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - qcom,apq8064-qfprom</div><div class='ctx'>           - qcom,apq8084-qfprom</div><div class='add'>+          - qcom,ipq5018-qfprom</div><div class='ctx'>           - qcom,ipq5332-qfprom</div><div class='ctx'>           - qcom,ipq5424-qfprom</div><div class='ctx'>           - qcom,ipq6018-qfprom</div><div class='hunk'>@@ -28,6 +29,8 @@ properties:</div><div class='ctx'>           - qcom,msm8226-qfprom</div><div class='ctx'>           - qcom,msm8916-qfprom</div><div class='ctx'>           - qcom,msm8917-qfprom</div><div class='add'>+          - qcom,msm8937-qfprom</div><div class='add'>+          - qcom,msm8960-qfprom</div><div class='ctx'>           - qcom,msm8974-qfprom</div><div class='ctx'>           - qcom,msm8976-qfprom</div><div class='ctx'>           - qcom,msm8996-qfprom</div><div class='hunk'>@@ -51,6 +54,7 @@ properties:</div><div class='ctx'>           - qcom,sm8450-qfprom</div><div class='ctx'>           - qcom,sm8550-qfprom</div><div class='ctx'>           - qcom,sm8650-qfprom</div><div class='add'>+          - qcom,x1e80100-qfprom</div><div class='ctx'>       - const: qcom,qfprom</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml<br/>index a44d44b32809..dc89020b0950 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml</a></div><div class='hunk'>@@ -14,6 +14,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - rockchip,px30-otp</div><div class='ctx'>       - rockchip,rk3308-otp</div><div class='add'>+      - rockchip,rk3576-otp</div><div class='ctx'>       - rockchip,rk3588-otp</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -62,6 +63,8 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 3</div><div class='ctx'>         resets:</div><div class='ctx'>           maxItems: 1</div><div class='ctx'>         reset-names:</div><div class='hunk'>@@ -73,11 +76,33 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - rockchip,rk3576-otp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: otp</div><div class='add'>+            - const: apb</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='ctx'>               - rockchip,rk3588-otp</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 4</div><div class='ctx'>         resets:</div><div class='ctx'>           minItems: 3</div><div class='ctx'>         reset-names:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/opp-v1.yaml b/Documentation/devicetree/bindings/opp/opp-v1.yaml<br/>index 07e26c267815..61c080e50859 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/opp/opp-v1.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/opp/opp-v1.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/opp/opp-v1.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/opp/opp-v1.yaml</a></div><div class='hunk'>@@ -18,9 +18,21 @@ description: |+</div><div class='ctx'> </div><div class='ctx'>   This binding only supports voltage-frequency pairs.</div><div class='ctx'> </div><div class='del'>-select: true</div><div class='add'>+deprecated: true</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='add'>+  clock-latency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The latency in nanoseconds for clock changes. Use OPP tables for new</div><div class='add'>+      designs instead.</div><div class='add'>+</div><div class='add'>+  voltage-tolerance:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 10</div><div class='add'>+    description:</div><div class='add'>+      The voltage tolerance in percent. Use OPP tables for new designs instead.</div><div class='add'>+</div><div class='ctx'>   operating-points:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'>     items:</div><div class='hunk'>@@ -28,8 +40,12 @@ properties:</div><div class='ctx'>         - description: Frequency in kHz</div><div class='ctx'>         - description: Voltage for OPP in uV</div><div class='ctx'> </div><div class='add'>+dependencies:</div><div class='add'>+  clock-latency: [ operating-points ]</div><div class='add'>+  voltage-tolerance: [ operating-points ]</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     cpus {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml<br/>new file mode 100644<br/>index 000000000000..a27ba7b663d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Adreno compatible OPP supply</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific</div><div class='add'>+  ACD related information tailored for the specific chipset. This binding</div><div class='add'>+  provides the information needed to describe such a hardware value.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: opp-v2-base.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    contains:</div><div class='add'>+      const: operating-points-v2-adreno</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^opp-[0-9]+$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      opp-hz: true</div><div class='add'>+</div><div class='add'>+      opp-level: true</div><div class='add'>+</div><div class='add'>+      opp-peak-kBps: true</div><div class='add'>+</div><div class='add'>+      opp-supported-hw: true</div><div class='add'>+</div><div class='add'>+      qcom,opp-acd-level:</div><div class='add'>+        description: |</div><div class='add'>+          A positive value representing the ACD (Adaptive Clock Distribution,</div><div class='add'>+          a fancy name for clk throttling during voltage droop) level associated</div><div class='add'>+          with this OPP node. This value is shared to a co-processor inside GPU</div><div class='add'>+          (called Graphics Management Unit a.k.a GMU) during wake up. It may not</div><div class='add'>+          be present for some OPPs and GMU will disable ACD while transitioning</div><div class='add'>+          to that OPP. This value encodes a voltage threshold, delay cycles &amp;</div><div class='add'>+          calibration margins which are identified by characterization of the</div><div class='add'>+          SoC. So, it doesn't have any unit. This data is passed to GMU firmware</div><div class='add'>+          via 'HFI_H2F_MSG_ACD' packet.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - opp-hz</div><div class='add'>+      - opp-level</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    gpu_opp_table: opp-table {</div><div class='add'>+        compatible = "operating-points-v2-adreno", "operating-points-v2";</div><div class='add'>+</div><div class='add'>+        opp-687000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;687000000&gt;;</div><div class='add'>+            opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+            opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+            qcom,opp-acd-level = &lt;0x882e5ffd&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        opp-550000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='add'>+            opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+            opp-peak-kBps = &lt;6074219&gt;;</div><div class='add'>+            qcom,opp-acd-level = &lt;0xc0285ffd&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        opp-390000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;390000000&gt;;</div><div class='add'>+            opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+            opp-peak-kBps = &lt;3000000&gt;;</div><div class='add'>+            qcom,opp-acd-level = &lt;0xc0285ffd&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        opp-300000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+            opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='add'>+            opp-peak-kBps = &lt;2136719&gt;;</div><div class='add'>+            /* Intentionally left out qcom,opp-acd-level property here */</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml<br/>index f75000e3093d..214caa4ec3d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pci/pci-ep.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pci/pci-ep.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pci/pci-ep.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pci/pci-ep.yaml</a></div><div class='hunk'>@@ -17,6 +17,24 @@ properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     pattern: "^pcie-ep@"</div><div class='ctx'> </div><div class='add'>+  iommu-map:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: Device ID (see msi-map) base</div><div class='add'>+          maximum: 0x7ffff</div><div class='add'>+        - description: phandle to IOMMU</div><div class='add'>+        - description: IOMMU specifier base (currently always 1 cell)</div><div class='add'>+        - description: Number of Device IDs</div><div class='add'>+          maximum: 0x80000</div><div class='add'>+</div><div class='add'>+  iommu-map-mask:</div><div class='add'>+    description:</div><div class='add'>+      A mask to be applied to each Device ID prior to being mapped to an</div><div class='add'>+      IOMMU specifier per the iommu-map property.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 0x7ffff</div><div class='add'>+</div><div class='ctx'>   max-functions:</div><div class='ctx'>     description: Maximum number of functions that can be configured</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint8</div><div class='hunk'>@@ -35,6 +53,56 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [ 1, 2, 3, 4 ]</div><div class='ctx'> </div><div class='add'>+  msi-map:</div><div class='add'>+    description: |</div><div class='add'>+      Maps a Device ID to an MSI and associated MSI specifier data.</div><div class='add'>+</div><div class='add'>+      A PCI Endpoint (EP) can use MSI as a doorbell function. This is achieved by</div><div class='add'>+      mapping the MSI controller's address into PCI BAR&lt;n&gt;. The PCI Root Complex</div><div class='add'>+      can write to this BAR&lt;n&gt;, triggering the EP to generate IRQ. This notifies</div><div class='add'>+      the EP-side driver of an event, eliminating the need for the driver to</div><div class='add'>+      continuously poll for status changes.</div><div class='add'>+</div><div class='add'>+      However, the EP cannot rely on Requester ID (RID) because the RID is</div><div class='add'>+      determined by the PCI topology of the host system. Since the EP may be</div><div class='add'>+      connected to different PCI hosts, the RID can vary between systems and is</div><div class='add'>+      therefore not a reliable identifier.</div><div class='add'>+</div><div class='add'>+      Each EP can support up to 8 physical functions and up to 65,536 virtual</div><div class='add'>+      functions. To uniquely identify each child device, a device ID is defined</div><div class='add'>+      as</div><div class='add'>+         - Bits [2:0] for the function number (func)</div><div class='add'>+         - Bits [18:3] for the virtual function index (vfunc)</div><div class='add'>+</div><div class='add'>+      The resulting device ID is computed as:</div><div class='add'>+</div><div class='add'>+        (func &amp; 0x7) | (vfunc &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+      The property is an arbitrary number of tuples of</div><div class='add'>+      (device-id-base, msi, msi-base,length).</div><div class='add'>+</div><div class='add'>+      Any Device ID id in the interval [id-base, id-base + length) is</div><div class='add'>+      associated with the listed MSI, with the MSI specifier</div><div class='add'>+      (id - id-base + msi-base).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: The Device ID base matched by the entry</div><div class='add'>+          maximum: 0x7ffff</div><div class='add'>+        - description: phandle to msi-controller node</div><div class='add'>+        - description: (optional) The msi-specifier produced for the first</div><div class='add'>+            Device ID matched by the entry. Currently, msi-specifier is 0 or</div><div class='add'>+            1 cells.</div><div class='add'>+        - description: The length of consecutive Device IDs following the</div><div class='add'>+            Device ID base</div><div class='add'>+          maximum: 0x80000</div><div class='add'>+</div><div class='add'>+  msi-map-mask:</div><div class='add'>+    description: A mask to be applied to each Device ID prior to being</div><div class='add'>+      mapped to an msi-specifier per the msi-map property.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 0x7ffff</div><div class='add'>+</div><div class='ctx'>   num-lanes:</div><div class='ctx'>     description: maximum number of lanes</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml<br/>index 8eb50cad61d5..78279b9fb737 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml</a></div><div class='hunk'>@@ -65,6 +65,7 @@ patternProperties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^group-[0-9a-z-]+$":</div><div class='ctx'>         type: object</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         allOf:</div><div class='ctx'>           - $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'>           - $ref: /schemas/pinctrl/pinmux-node.yaml</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml<br/>index 816688580e33..aa882b5bfe97 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml</a></div><div class='hunk'>@@ -13,9 +13,7 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='del'>-      - enum:</div><div class='del'>-          - renesas,r9a06g032-pinctrl # RZ/N1D</div><div class='del'>-          - renesas,r9a06g033-pinctrl # RZ/N1S</div><div class='add'>+      - const: renesas,r9a06g032-pinctrl # RZ/N1D</div><div class='ctx'>       - const: renesas,rzn1-pinctrl   # Generic RZ/N1</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml<br/>new file mode 100644<br/>index 000000000000..73a9b4d6220e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/allwinner,sun50i-h6-prcm-ppu.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/allwinner,sun50i-h6-prcm-ppu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner SoCs PRCM power domain controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Allwinner Power Reset Clock Management (PRCM) unit contains bits to</div><div class='add'>+  control a few power domains.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - allwinner,sun50i-h6-prcm-ppu</div><div class='add'>+      - allwinner,sun50i-h616-prcm-ppu</div><div class='add'>+      - allwinner,sun55i-a523-prcm-ppu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    prcm_ppu: power-controller@7010210 {</div><div class='add'>+        compatible = "allwinner,sun50i-h616-prcm-ppu";</div><div class='add'>+        reg = &lt;0x7010210 0x10&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml<br/>index 591a080ca3ff..9c7cc632abee 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/mediatek,power-controller.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/mediatek,power-controller.yaml</a></div><div class='hunk'>@@ -25,6 +25,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - mediatek,mt6735-power-controller</div><div class='ctx'>       - mediatek,mt6795-power-controller</div><div class='add'>+      - mediatek,mt6893-power-controller</div><div class='ctx'>       - mediatek,mt8167-power-controller</div><div class='ctx'>       - mediatek,mt8173-power-controller</div><div class='ctx'>       - mediatek,mt8183-power-controller</div><div class='hunk'>@@ -88,6 +89,7 @@ $defs:</div><div class='ctx'>         description: |</div><div class='ctx'>           Power domain index. Valid values are defined in:</div><div class='ctx'>               "include/dt-bindings/power/mt6795-power.h" - for MT8167 type power domain.</div><div class='add'>+              "include/dt-bindings/power/mediatek,mt6893-power.h" - for MT6893 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8167-power.h" - for MT8167 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml<br/>index 655687369a23..1bf65f2a583a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/qcom,rpmpd.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/qcom,rpmpd.yaml</a></div><div class='hunk'>@@ -50,6 +50,7 @@ properties:</div><div class='ctx'>           - qcom,sdx55-rpmhpd</div><div class='ctx'>           - qcom,sdx65-rpmhpd</div><div class='ctx'>           - qcom,sdx75-rpmhpd</div><div class='add'>+          - qcom,sm4450-rpmhpd</div><div class='ctx'>           - qcom,sm6115-rpmpd</div><div class='ctx'>           - qcom,sm6125-rpmpd</div><div class='ctx'>           - qcom,sm6350-rpmhpd</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml<br/>index 19d3093e6cd2..ccd555870094 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml</a></div><div class='hunk'>@@ -21,7 +21,9 @@ description: |+</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: syscon-reboot</div><div class='add'>+    enum:</div><div class='add'>+      - syscon-reboot</div><div class='add'>+      - google,gs101-reboot</div><div class='ctx'> </div><div class='ctx'>   mask:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='hunk'>@@ -49,12 +51,6 @@ properties:</div><div class='ctx'>   priority:</div><div class='ctx'>     default: 192</div><div class='ctx'> </div><div class='del'>-oneOf:</div><div class='del'>-  - required:</div><div class='del'>-      - offset</div><div class='del'>-  - required:</div><div class='del'>-      - reg</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='hunk'>@@ -63,12 +59,29 @@ additionalProperties: false</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: restart-handler.yaml#</div><div class='ctx'>   - if:</div><div class='del'>-      not:</div><div class='del'>-        required:</div><div class='del'>-          - mask</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: google,gs101-reboot</div><div class='ctx'>     then:</div><div class='del'>-      required:</div><div class='del'>-        - value</div><div class='add'>+      properties:</div><div class='add'>+        mask: false</div><div class='add'>+        offset: false</div><div class='add'>+        reg: false</div><div class='add'>+        value: false</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      if:</div><div class='add'>+        not:</div><div class='add'>+          required:</div><div class='add'>+            - mask</div><div class='add'>+      then:</div><div class='add'>+        required:</div><div class='add'>+          - value</div><div class='add'>+</div><div class='add'>+      oneOf:</div><div class='add'>+        - required: [offset]</div><div class='add'>+        - required: [reg]</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -78,3 +91,8 @@ examples:</div><div class='ctx'>         offset = &lt;0x0&gt;;</div><div class='ctx'>         mask = &lt;0x1&gt;;</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    reboot {</div><div class='add'>+        compatible = "google,gs101-reboot";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml b/Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml<br/>new file mode 100644<br/>index 000000000000..ffcd5f2c2bf6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/reset/toradex,smarc-ec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Toradex Embedded Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Emanuele Ghidoli &lt;emanuele.ghidoli@toradex.com&gt;</div><div class='add'>+  - Francesco Dolcini &lt;francesco.dolcini@toradex.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Toradex Embedded Controller (EC) is used on Toradex SMARC modules,</div><div class='add'>+  primarily to manage power and reset functionalities.</div><div class='add'>+</div><div class='add'>+  The EC provides the following functions:</div><div class='add'>+    - Reads the SMARC POWER_BTN# and RESET_IN# signals and controls the PMIC accordingly.</div><div class='add'>+    - Controls the SoC boot mode signals based on the SMARC BOOT_SEL# and FORCE_RECOV# inputs.</div><div class='add'>+    - Manages the CARRIER_STDBY# signal in response to relevant SoC signals.</div><div class='add'>+</div><div class='add'>+  The EC runs a small firmware, factory programmed into its internal flash, and communicates over I2C.</div><div class='add'>+  It allows software to control power-off and reset functionalities of the module.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - toradex,smarc-imx95-ec</div><div class='add'>+          - toradex,smarc-imx8mp-ec</div><div class='add'>+      - const: toradex,smarc-ec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        reset-controller@28 {</div><div class='add'>+            compatible = "toradex,smarc-imx95-ec", "toradex,smarc-ec";</div><div class='add'>+            reg = &lt;0x28&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml<br/>index ebab98987e49..f494b7710c09 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/rockchip,power-controller.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/rockchip,power-controller.yaml</a></div><div class='hunk'>@@ -40,6 +40,7 @@ properties:</div><div class='ctx'>       - rockchip,rk3366-power-controller</div><div class='ctx'>       - rockchip,rk3368-power-controller</div><div class='ctx'>       - rockchip,rk3399-power-controller</div><div class='add'>+      - rockchip,rk3562-power-controller</div><div class='ctx'>       - rockchip,rk3568-power-controller</div><div class='ctx'>       - rockchip,rk3576-power-controller</div><div class='ctx'>       - rockchip,rk3588-power-controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq24190.yaml b/Documentation/devicetree/bindings/power/supply/bq24190.yaml<br/>index 07adf88997b4..307c99c07721 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/bq24190.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/bq24190.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/bq24190.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/supply/bq24190.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>       - ti,bq24190</div><div class='ctx'>       - ti,bq24192</div><div class='ctx'>       - ti,bq24192i</div><div class='add'>+      - ti,bq24193</div><div class='ctx'>       - ti,bq24196</div><div class='ctx'>       - ti,bq24296</div><div class='ctx'>       - ti,bq24297</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq25980.yaml b/Documentation/devicetree/bindings/power/supply/bq25980.yaml<br/>index b70ce8d7f86c..256adbef55eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/bq25980.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/bq25980.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/bq25980.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/supply/bq25980.yaml</a></div><div class='hunk'>@@ -87,28 +87,28 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     bat: battery {</div><div class='del'>-      compatible = "simple-battery";</div><div class='del'>-      constant-charge-current-max-microamp = &lt;4000000&gt;;</div><div class='del'>-      constant-charge-voltage-max-microvolt = &lt;8400000&gt;;</div><div class='del'>-      precharge-current-microamp = &lt;160000&gt;;</div><div class='del'>-      charge-term-current-microamp = &lt;160000&gt;;</div><div class='add'>+        compatible = "simple-battery";</div><div class='add'>+        constant-charge-current-max-microamp = &lt;4000000&gt;;</div><div class='add'>+        constant-charge-voltage-max-microvolt = &lt;8400000&gt;;</div><div class='add'>+        precharge-current-microamp = &lt;160000&gt;;</div><div class='add'>+        charge-term-current-microamp = &lt;160000&gt;;</div><div class='ctx'>     };</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     i2c {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-      bq25980: charger@65 {</div><div class='del'>-          compatible = "ti,bq25980";</div><div class='del'>-          reg = &lt;0x65&gt;;</div><div class='del'>-          interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-          interrupts = &lt;16 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-          ti,watchdog-timeout-ms = &lt;0&gt;;</div><div class='del'>-          ti,sc-ocp-limit-microamp = &lt;2000000&gt;;</div><div class='del'>-          ti,sc-ovp-limit-microvolt = &lt;17800000&gt;;</div><div class='del'>-          monitored-battery = &lt;&amp;bat&gt;;</div><div class='del'>-      };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        bq25980: charger@65 {</div><div class='add'>+            compatible = "ti,bq25980";</div><div class='add'>+            reg = &lt;0x65&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+            interrupts = &lt;16 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            ti,watchdog-timeout-ms = &lt;0&gt;;</div><div class='add'>+            ti,sc-ocp-limit-microamp = &lt;2000000&gt;;</div><div class='add'>+            ti,sc-ovp-limit-microvolt = &lt;17800000&gt;;</div><div class='add'>+            monitored-battery = &lt;&amp;bat&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml<br/>index 741022b4449d..cb04fb25d8ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml</a></div><div class='hunk'>@@ -48,14 +48,14 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/iio/adc/ingenic,adc.h&gt;</div><div class='ctx'> </div><div class='ctx'>     simple_battery: battery {</div><div class='del'>-            compatible = "simple-battery";</div><div class='del'>-            voltage-min-design-microvolt = &lt;3600000&gt;;</div><div class='del'>-            voltage-max-design-microvolt = &lt;4200000&gt;;</div><div class='add'>+        compatible = "simple-battery";</div><div class='add'>+        voltage-min-design-microvolt = &lt;3600000&gt;;</div><div class='add'>+        voltage-max-design-microvolt = &lt;4200000&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     ingenic-battery {</div><div class='del'>-            compatible = "ingenic,jz4740-battery";</div><div class='del'>-            io-channels = &lt;&amp;adc INGENIC_ADC_BATTERY&gt;;</div><div class='del'>-            io-channel-names = "battery";</div><div class='del'>-            monitored-battery = &lt;&amp;simple_battery&gt;;</div><div class='add'>+        compatible = "ingenic,jz4740-battery";</div><div class='add'>+        io-channels = &lt;&amp;adc INGENIC_ADC_BATTERY&gt;;</div><div class='add'>+        io-channel-names = "battery";</div><div class='add'>+        monitored-battery = &lt;&amp;simple_battery&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml b/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml<br/>index 06595a953659..bc7ed7b22085 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml</a></div><div class='hunk'>@@ -61,13 +61,13 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     i2c {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-      charger: battery-charger@68 {</div><div class='del'>-              compatible = "lltc,ltc4162-l";</div><div class='del'>-              reg = &lt;0x68&gt;;</div><div class='del'>-              lltc,rsnsb-micro-ohms = &lt;10000&gt;;</div><div class='del'>-              lltc,rsnsi-micro-ohms = &lt;16000&gt;;</div><div class='del'>-              lltc,cell-count = &lt;2&gt;;</div><div class='del'>-      };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        charger: battery-charger@68 {</div><div class='add'>+            compatible = "lltc,ltc4162-l";</div><div class='add'>+            reg = &lt;0x68&gt;;</div><div class='add'>+            lltc,rsnsb-micro-ohms = &lt;10000&gt;;</div><div class='add'>+            lltc,rsnsi-micro-ohms = &lt;16000&gt;;</div><div class='add'>+            lltc,cell-count = &lt;2&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml<br/>index bce7fabbd9d3..e3b84068993b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/supply/maxim,max77705.yaml</a></div><div class='hunk'>@@ -37,8 +37,8 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'>     i2c {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         charger@69 {</div><div class='ctx'>             compatible = "maxim,max77705-charger";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml<br/>new file mode 100644<br/>index 000000000000..2244cc3d45a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/supply/maxim,max8971.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/maxim,max8971.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim MAX8971 IC charger</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MAX8971 is a compact, high-frequency, high-efficiency switch-mode charger</div><div class='add'>+  for a one-cell lithium-ion (Li+) battery.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: power-supply.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max8971</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  monitored-battery: true</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    description:</div><div class='add'>+      An optional port node to link the extcon device to detect type of plug.</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        charger@35 {</div><div class='add'>+            compatible = "maxim,max8971";</div><div class='add'>+            reg = &lt;0x35&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;74 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                charger_input: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;extcon_output&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml b/Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml<br/>new file mode 100644<br/>index 000000000000..defb0861e268<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/power/supply/pegatron,chagall-ec.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/pegatron,chagall-ec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Pegatron Chagall EC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Svyatoslav Ryhel &lt;clamor95@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Pegatron Chagall EC is based on an 8-bit programmable microcontroller from</div><div class='add'>+  Infineon/Cypress Semiconductor, it communicates over I2C and is used in the</div><div class='add'>+  Pegatron Chagall tablet for fuel gauge and battery control functions.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/power/supply/power-supply.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pegatron,chagall-ec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  monitored-battery: true</div><div class='add'>+  power-supplies: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        embedded-controller@10 {</div><div class='add'>+            compatible = "pegatron,chagall-ec";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+            monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+            power-supplies = &lt;&amp;mains&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt<br/>deleted file mode 100644<br/>index 07256b7ffcaa..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/powerpc/fsl/pmc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,63 +0,0 @@</div><div class='del'>-* Power Management Controller</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-- compatible: "fsl,&lt;chip&gt;-pmc".</div><div class='del'>-</div><div class='del'>-  "fsl,mpc8349-pmc" should be listed for any chip whose PMC is</div><div class='del'>-  compatible.  "fsl,mpc8313-pmc" should also be listed for any chip</div><div class='del'>-  whose PMC is compatible, and implies deep-sleep capability.</div><div class='del'>-</div><div class='del'>-  "fsl,mpc8548-pmc" should be listed for any chip whose PMC is</div><div class='del'>-  compatible.  "fsl,mpc8536-pmc" should also be listed for any chip</div><div class='del'>-  whose PMC is compatible, and implies deep-sleep capability.</div><div class='del'>-</div><div class='del'>-  "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is</div><div class='del'>-  compatible; all statements below that apply to "fsl,mpc8548-pmc" also</div><div class='del'>-  apply to "fsl,mpc8641d-pmc".</div><div class='del'>-</div><div class='del'>-  Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these</div><div class='del'>-  bit assignments are indicated via the sleep specifier in each device's</div><div class='del'>-  sleep property.</div><div class='del'>-</div><div class='del'>-- reg: For devices compatible with "fsl,mpc8349-pmc", the first resource</div><div class='del'>-  is the PMC block, and the second resource is the Clock Configuration</div><div class='del'>-  block.</div><div class='del'>-</div><div class='del'>-  For devices compatible with "fsl,mpc8548-pmc", the first resource</div><div class='del'>-  is a 32-byte block beginning with DEVDISR.</div><div class='del'>-</div><div class='del'>-- interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first</div><div class='del'>-  resource is the PMC block interrupt.</div><div class='del'>-</div><div class='del'>-- fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices,</div><div class='del'>-  this is a phandle to an "fsl,gtm" node on which timer 4 can be used as</div><div class='del'>-  a wakeup source from deep sleep.</div><div class='del'>-</div><div class='del'>-Sleep specifiers:</div><div class='del'>-</div><div class='del'>-  fsl,mpc8349-pmc: Sleep specifiers consist of one cell.  For each bit</div><div class='del'>-  that is set in the cell, the corresponding bit in SCCR will be saved</div><div class='del'>-  and cleared on suspend, and restored on resume.  This sleep controller</div><div class='del'>-  supports disabling and resuming devices at any time.</div><div class='del'>-</div><div class='del'>-  fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of</div><div class='del'>-  which will be ORed into PMCDR upon suspend, and cleared from PMCDR</div><div class='del'>-  upon resume.  The first two cells are as described for fsl,mpc8578-pmc.</div><div class='del'>-  This sleep controller only supports disabling devices during system</div><div class='del'>-  sleep, or permanently.</div><div class='del'>-</div><div class='del'>-  fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the</div><div class='del'>-  first of which will be ORed into DEVDISR (and the second into</div><div class='del'>-  DEVDISR2, if present -- this cell should be zero or absent if the</div><div class='del'>-  hardware does not have DEVDISR2) upon a request for permanent device</div><div class='del'>-  disabling.  This sleep controller does not support configuring devices</div><div class='del'>-  to disable during system sleep (unless supported by another compatible</div><div class='del'>-  match), or dynamically.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	power@b00 {</div><div class='del'>-		compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";</div><div class='del'>-		reg = &lt;0xb00 0x100 0xa00 0x100&gt;;</div><div class='del'>-		interrupts = &lt;80 8&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml b/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml<br/>new file mode 100644<br/>index 000000000000..276ece7f01db<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,152 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Power Management Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - J. Neuschäfer &lt;j.ne@posteo.net&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Power Management Controller in several MPC8xxx SoCs helps save power by</div><div class='add'>+  controlling chip-wide low-power states as well as peripheral clock gating.</div><div class='add'>+</div><div class='add'>+  Sleep of peripheral devices is configured by the `sleep` property, for</div><div class='add'>+  example `sleep = &lt;&amp;pmc 0x00000030&gt;`. Any cells after the &amp;pmc phandle are</div><div class='add'>+  called a sleep specifier.</div><div class='add'>+</div><div class='add'>+  For "fsl,mpc8349-pmc", sleep specifiers consist of one cell.  For each bit that</div><div class='add'>+  is set in the cell, the corresponding bit in SCCR will be saved and cleared</div><div class='add'>+  on suspend, and restored on resume.  This sleep controller supports disabling</div><div class='add'>+  and resuming devices at any time.</div><div class='add'>+</div><div class='add'>+  For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of</div><div class='add'>+  which will be ORed into PMCDR upon suspend, and cleared from PMCDR upon</div><div class='add'>+  resume.  The first two cells are as described for fsl,mpc8548-pmc.  This</div><div class='add'>+  sleep controller only supports disabling devices during system sleep, or</div><div class='add'>+  permanently.</div><div class='add'>+</div><div class='add'>+  For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one</div><div class='add'>+  or two cells, the first of which will be ORed into DEVDISR (and the second</div><div class='add'>+  into DEVDISR2, if present -- this cell should be zero or absent if the</div><div class='add'>+  hardware does not have DEVDISR2) upon a request for permanent device</div><div class='add'>+  disabling.  This sleep controller does not support configuring devices to</div><div class='add'>+  disable during system sleep (unless supported by another compatible match),</div><div class='add'>+  or dynamically.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,mpc8315-pmc</div><div class='add'>+          - const: fsl,mpc8313-pmc</div><div class='add'>+          - const: fsl,mpc8349-pmc</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,mpc8313-pmc</div><div class='add'>+              - fsl,mpc8323-pmc</div><div class='add'>+              - fsl,mpc8360-pmc</div><div class='add'>+              - fsl,mpc8377-pmc</div><div class='add'>+              - fsl,mpc8378-pmc</div><div class='add'>+              - fsl,mpc8379-pmc</div><div class='add'>+          - const: fsl,mpc8349-pmc</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,p1022-pmc</div><div class='add'>+          - const: fsl,mpc8536-pmc</div><div class='add'>+          - const: fsl,mpc8548-pmc</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,mpc8536-pmc</div><div class='add'>+              - fsl,mpc8568-pmc</div><div class='add'>+              - fsl,mpc8569-pmc</div><div class='add'>+          - const: fsl,mpc8548-pmc</div><div class='add'>+</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,mpc8548-pmc</div><div class='add'>+          - fsl,mpc8641d-pmc</div><div class='add'>+</div><div class='add'>+    description: |</div><div class='add'>+      "fsl,mpc8349-pmc" should be listed for any chip whose PMC is</div><div class='add'>+      compatible.  "fsl,mpc8313-pmc" should also be listed for any chip</div><div class='add'>+      whose PMC is compatible, and implies deep-sleep capability.</div><div class='add'>+</div><div class='add'>+      "fsl,mpc8548-pmc" should be listed for any chip whose PMC is</div><div class='add'>+      compatible.  "fsl,mpc8536-pmc" should also be listed for any chip</div><div class='add'>+      whose PMC is compatible, and implies deep-sleep capability.</div><div class='add'>+</div><div class='add'>+      "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is</div><div class='add'>+      compatible; all statements below that apply to "fsl,mpc8548-pmc" also</div><div class='add'>+      apply to "fsl,mpc8641d-pmc".</div><div class='add'>+</div><div class='add'>+      Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these</div><div class='add'>+      bit assignments are indicated via the sleep specifier in each device's</div><div class='add'>+      sleep property.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fsl,mpc8313-wakeup-timer:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      For "fsl,mpc8313-pmc"-compatible devices, this is a phandle to an</div><div class='add'>+      "fsl,gtm" node on which timer 4 can be used as a wakeup source from deep</div><div class='add'>+      sleep.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,mpc8349-pmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: PMC block</div><div class='add'>+            - description: Clock Configuration block</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,mpc8548-pmc</div><div class='add'>+              - fsl,mpc8641d-pmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: 32-byte block beginning with DEVDISR</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    pmc: power@b00 {</div><div class='add'>+        compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";</div><div class='add'>+        reg = &lt;0xb00 0x100&gt;, &lt;0xa00 0x100&gt;;</div><div class='add'>+        interrupts = &lt;80 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    power@e0070 {</div><div class='add'>+        compatible = "fsl,mpc8548-pmc";</div><div class='add'>+        reg = &lt;0xe0070 0x20&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml b/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml<br/>new file mode 100644<br/>index 000000000000..5d64fb40a0d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/loongson,ls7a-pwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson PWM Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Loongson PWM has one pulse width output signal and one pulse input</div><div class='add'>+  signal to be measured.</div><div class='add'>+  It can be found on Loongson-2K series cpus and Loongson LS7A bridge chips.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: loongson,ls7a-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - loongson,ls2k0500-pwm</div><div class='add'>+              - loongson,ls2k1000-pwm</div><div class='add'>+              - loongson,ls2k2000-pwm</div><div class='add'>+          - const: loongson,ls7a-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#pwm-cells':</div><div class='add'>+    description:</div><div class='add'>+      The first cell must have a value of 0, which specifies the PWM output signal;</div><div class='add'>+      The second cell is the period in nanoseconds;</div><div class='add'>+      The third cell flag supported by this binding is PWM_POLARITY_INVERTED.</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/loongson,ls2k-clk.h&gt;</div><div class='add'>+</div><div class='add'>+    pwm@1fe22000 {</div><div class='add'>+        compatible = "loongson,ls2k1000-pwm", "loongson,ls7a-pwm";</div><div class='add'>+        reg = &lt;0x1fe22000 0x10&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;liointc0&gt;;</div><div class='add'>+        interrupts = &lt;24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk LOONGSON2_APB_CLK&gt;;</div><div class='add'>+        #pwm-cells = &lt;3&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml<br/>index 195e4371196b..68ef30414325 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a></div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>           - const: mediatek,mt8173-disp-pwm</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt6893-disp-pwm</div><div class='ctx'>               - mediatek,mt8186-disp-pwm</div><div class='ctx'>               - mediatek,mt8188-disp-pwm</div><div class='ctx'>               - mediatek,mt8192-disp-pwm</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml b/Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml<br/>new file mode 100644<br/>index 000000000000..1729fe5c3dfb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pwm/nxp,mc33xs2410.yaml</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/nxp,mc33xs2410.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: High-side switch MC33XS2410</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dimitri Fedrau &lt;dima.fedrau@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nxp,mc33xs2410</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 10000000</div><div class='add'>+</div><div class='add'>+  spi-cpha: true</div><div class='add'>+</div><div class='add'>+  spi-cs-setup-delay-ns:</div><div class='add'>+    minimum: 100</div><div class='add'>+    default: 100</div><div class='add'>+</div><div class='add'>+  spi-cs-hold-delay-ns:</div><div class='add'>+    minimum: 10</div><div class='add'>+    default: 10</div><div class='add'>+</div><div class='add'>+  spi-cs-inactive-delay-ns:</div><div class='add'>+    minimum: 300</div><div class='add'>+    default: 300</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO connected to the active low reset pin.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+  pwm-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: di0</div><div class='add'>+      - const: di1</div><div class='add'>+      - const: di2</div><div class='add'>+      - const: di3</div><div class='add'>+</div><div class='add'>+  pwms:</div><div class='add'>+    description:</div><div class='add'>+      Direct inputs(di0-3) are used to directly turn-on or turn-off the</div><div class='add'>+      outputs.</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      The external clock can be used if the internal clock doesn't meet</div><div class='add'>+      timing requirements over temperature and voltage operating range.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Logic supply voltage</div><div class='add'>+</div><div class='add'>+  vspi-supply:</div><div class='add'>+    description:</div><div class='add'>+      Supply voltage for SPI</div><div class='add'>+</div><div class='add'>+  vpwr-supply:</div><div class='add'>+    description:</div><div class='add'>+      Power switch supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+       pwm@0 {</div><div class='add'>+           compatible = "nxp,mc33xs2410";</div><div class='add'>+           reg = &lt;0x0&gt;;</div><div class='add'>+           spi-max-frequency = &lt;4000000&gt;;</div><div class='add'>+           spi-cpha;</div><div class='add'>+           spi-cs-setup-delay-ns = &lt;100&gt;;</div><div class='add'>+           spi-cs-hold-delay-ns = &lt;10&gt;;</div><div class='add'>+           spi-cs-inactive-delay-ns = &lt;300&gt;;</div><div class='add'>+           reset-gpios = &lt;&amp;gpio3 22 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+           #pwm-cells = &lt;3&gt;;</div><div class='add'>+           pwm-names = "di0", "di1", "di2", "di3";</div><div class='add'>+           pwms = &lt;&amp;pwm0 0 1000000&gt;,</div><div class='add'>+                  &lt;&amp;pwm1 0 1000000&gt;,</div><div class='add'>+                  &lt;&amp;pwm2 0 1000000&gt;,</div><div class='add'>+                  &lt;&amp;pwm3 0 1000000&gt;;</div><div class='add'>+           interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+           interrupts = &lt;31 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+           clocks = &lt;&amp;clk_ext_fixed&gt;;</div><div class='add'>+           vdd-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+           vspi-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+           vpwr-supply = &lt;&amp;reg_24v0&gt;;</div><div class='add'>+       };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml<br/>new file mode 100644<br/>index 000000000000..13b807765a30<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml</a></div><div class='hunk'>@@ -0,0 +1,378 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/renesas,rzg2l-gpt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/G2L General PWM Timer (GPT)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer</div><div class='add'>+  (GPT32E). It supports the following functions</div><div class='add'>+  * 32 bits x 8 channels.</div><div class='add'>+  * Up-counting or down-counting (saw waves) or up/down-counting</div><div class='add'>+    (triangle waves) for each counter.</div><div class='add'>+  * Clock sources independently selectable for each channel.</div><div class='add'>+  * Two I/O pins per channel.</div><div class='add'>+  * Two output compare/input capture registers per channel.</div><div class='add'>+  * For the two output compare/input capture registers of each channel,</div><div class='add'>+    four registers are provided as buffer registers and are capable of</div><div class='add'>+    operating as comparison registers when buffering is not in use.</div><div class='add'>+  * In output compare operation, buffer switching can be at crests or</div><div class='add'>+    troughs, enabling the generation of laterally asymmetric PWM waveforms.</div><div class='add'>+  * Registers for setting up frame cycles in each channel (with capability</div><div class='add'>+    for generating interrupts at overflow or underflow)</div><div class='add'>+  * Generation of dead times in PWM operation.</div><div class='add'>+  * Synchronous starting, stopping and clearing counters for arbitrary</div><div class='add'>+    channels.</div><div class='add'>+  * Starting, stopping, clearing and up/down counters in response to input</div><div class='add'>+    level comparison.</div><div class='add'>+  * Starting, clearing, stopping and up/down counters in response to a</div><div class='add'>+    maximum of four external triggers.</div><div class='add'>+  * Output pin disable function by dead time error and detected</div><div class='add'>+    short-circuits between output pins.</div><div class='add'>+  * A/D converter start triggers can be generated (GPT32E0 to GPT32E3)</div><div class='add'>+  * Enables the noise filter for input capture and external trigger</div><div class='add'>+    operation.</div><div class='add'>+</div><div class='add'>+  The below pwm channels are supported.</div><div class='add'>+    pwm0  - GPT32E0.GTIOC0A channel</div><div class='add'>+    pwm1  - GPT32E0.GTIOC0B channel</div><div class='add'>+    pwm2  - GPT32E1.GTIOC1A channel</div><div class='add'>+    pwm3  - GPT32E1.GTIOC1B channel</div><div class='add'>+    pwm4  - GPT32E2.GTIOC2A channel</div><div class='add'>+    pwm5  - GPT32E2.GTIOC2B channel</div><div class='add'>+    pwm6  - GPT32E3.GTIOC3A channel</div><div class='add'>+    pwm7  - GPT32E3.GTIOC3B channel</div><div class='add'>+    pwm8  - GPT32E4.GTIOC4A channel</div><div class='add'>+    pwm9  - GPT32E4.GTIOC4B channel</div><div class='add'>+    pwm10 - GPT32E5.GTIOC5A channel</div><div class='add'>+    pwm11 - GPT32E5.GTIOC5B channel</div><div class='add'>+    pwm12 - GPT32E6.GTIOC6A channel</div><div class='add'>+    pwm13 - GPT32E6.GTIOC6B channel</div><div class='add'>+    pwm14 - GPT32E7.GTIOC7A channel</div><div class='add'>+    pwm15 - GPT32E7.GTIOC7B channel</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-gpt  # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-gpt  # RZ/V2L</div><div class='add'>+      - const: renesas,rzg2l-gpt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#pwm-cells':</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: GPT32E0.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E0.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E0.GTCCRC compare match</div><div class='add'>+      - description: GPT32E0.GTCCRD compare match</div><div class='add'>+      - description: GPT32E0.GTCCRE compare match</div><div class='add'>+      - description: GPT32E0.GTCCRF compare match</div><div class='add'>+      - description: GPT32E0.GTADTRA compare match</div><div class='add'>+      - description: GPT32E0.GTADTRB compare match</div><div class='add'>+      - description: GPT32E0.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E0.GTCNT underflow</div><div class='add'>+      - description: GPT32E1.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E1.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E1.GTCCRC compare match</div><div class='add'>+      - description: GPT32E1.GTCCRD compare match</div><div class='add'>+      - description: GPT32E1.GTCCRE compare match</div><div class='add'>+      - description: GPT32E1.GTCCRF compare match</div><div class='add'>+      - description: GPT32E1.GTADTRA compare match</div><div class='add'>+      - description: GPT32E1.GTADTRB compare match</div><div class='add'>+      - description: GPT32E1.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E1.GTCNT underflow</div><div class='add'>+      - description: GPT32E2.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E2.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E2.GTCCRC compare match</div><div class='add'>+      - description: GPT32E2.GTCCRD compare match</div><div class='add'>+      - description: GPT32E2.GTCCRE compare match</div><div class='add'>+      - description: GPT32E2.GTCCRF compare match</div><div class='add'>+      - description: GPT32E2.GTADTRA compare match</div><div class='add'>+      - description: GPT32E2.GTADTRB compare match</div><div class='add'>+      - description: GPT32E2.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E2.GTCNT underflow</div><div class='add'>+      - description: GPT32E3.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E3.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E3.GTCCRC compare match</div><div class='add'>+      - description: GPT32E3.GTCCRD compare match</div><div class='add'>+      - description: GPT32E3.GTCCRE compare match</div><div class='add'>+      - description: GPT32E3.GTCCRF compare match</div><div class='add'>+      - description: GPT32E3.GTADTRA compare match</div><div class='add'>+      - description: GPT32E3.GTADTRB compare match</div><div class='add'>+      - description: GPT32E3.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E3.GTCNT underflow</div><div class='add'>+      - description: GPT32E4.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E4.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E4.GTCCRC compare match</div><div class='add'>+      - description: GPT32E4.GTCCRD compare match</div><div class='add'>+      - description: GPT32E4.GTCCRE compare match</div><div class='add'>+      - description: GPT32E4.GTCCRF compare match</div><div class='add'>+      - description: GPT32E4.GTADTRA compare match</div><div class='add'>+      - description: GPT32E4.GTADTRB compare match</div><div class='add'>+      - description: GPT32E4.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E4.GTCNT underflow</div><div class='add'>+      - description: GPT32E5.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E5.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E5.GTCCRC compare match</div><div class='add'>+      - description: GPT32E5.GTCCRD compare match</div><div class='add'>+      - description: GPT32E5.GTCCRE compare match</div><div class='add'>+      - description: GPT32E5.GTCCRF compare match</div><div class='add'>+      - description: GPT32E5.GTADTRA compare match</div><div class='add'>+      - description: GPT32E5.GTADTRB compare match</div><div class='add'>+      - description: GPT32E5.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E5.GTCNT underflow</div><div class='add'>+      - description: GPT32E6.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E6.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E6.GTCCRC compare match</div><div class='add'>+      - description: GPT32E6.GTCCRD compare match</div><div class='add'>+      - description: GPT32E6.GTCCRE compare match</div><div class='add'>+      - description: GPT32E6.GTCCRF compare match</div><div class='add'>+      - description: GPT32E6.GTADTRA compare match</div><div class='add'>+      - description: GPT32E6.GTADTRB compare match</div><div class='add'>+      - description: GPT32E6.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E6.GTCNT underflow</div><div class='add'>+      - description: GPT32E7.GTCCRA input capture/compare match</div><div class='add'>+      - description: GPT32E7.GTCCRB input capture/compare</div><div class='add'>+      - description: GPT32E7.GTCCRC compare match</div><div class='add'>+      - description: GPT32E7.GTCCRD compare match</div><div class='add'>+      - description: GPT32E7.GTCCRE compare match</div><div class='add'>+      - description: GPT32E7.GTCCRF compare match</div><div class='add'>+      - description: GPT32E7.GTADTRA compare match</div><div class='add'>+      - description: GPT32E7.GTADTRB compare match</div><div class='add'>+      - description: GPT32E7.GTCNT overflow/GTPR compare match</div><div class='add'>+      - description: GPT32E7.GTCNT underflow</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ccmpa0</div><div class='add'>+      - const: ccmpb0</div><div class='add'>+      - const: cmpc0</div><div class='add'>+      - const: cmpd0</div><div class='add'>+      - const: cmpe0</div><div class='add'>+      - const: cmpf0</div><div class='add'>+      - const: adtrga0</div><div class='add'>+      - const: adtrgb0</div><div class='add'>+      - const: ovf0</div><div class='add'>+      - const: unf0</div><div class='add'>+      - const: ccmpa1</div><div class='add'>+      - const: ccmpb1</div><div class='add'>+      - const: cmpc1</div><div class='add'>+      - const: cmpd1</div><div class='add'>+      - const: cmpe1</div><div class='add'>+      - const: cmpf1</div><div class='add'>+      - const: adtrga1</div><div class='add'>+      - const: adtrgb1</div><div class='add'>+      - const: ovf1</div><div class='add'>+      - const: unf1</div><div class='add'>+      - const: ccmpa2</div><div class='add'>+      - const: ccmpb2</div><div class='add'>+      - const: cmpc2</div><div class='add'>+      - const: cmpd2</div><div class='add'>+      - const: cmpe2</div><div class='add'>+      - const: cmpf2</div><div class='add'>+      - const: adtrga2</div><div class='add'>+      - const: adtrgb2</div><div class='add'>+      - const: ovf2</div><div class='add'>+      - const: unf2</div><div class='add'>+      - const: ccmpa3</div><div class='add'>+      - const: ccmpb3</div><div class='add'>+      - const: cmpc3</div><div class='add'>+      - const: cmpd3</div><div class='add'>+      - const: cmpe3</div><div class='add'>+      - const: cmpf3</div><div class='add'>+      - const: adtrga3</div><div class='add'>+      - const: adtrgb3</div><div class='add'>+      - const: ovf3</div><div class='add'>+      - const: unf3</div><div class='add'>+      - const: ccmpa4</div><div class='add'>+      - const: ccmpb4</div><div class='add'>+      - const: cmpc4</div><div class='add'>+      - const: cmpd4</div><div class='add'>+      - const: cmpe4</div><div class='add'>+      - const: cmpf4</div><div class='add'>+      - const: adtrga4</div><div class='add'>+      - const: adtrgb4</div><div class='add'>+      - const: ovf4</div><div class='add'>+      - const: unf4</div><div class='add'>+      - const: ccmpa5</div><div class='add'>+      - const: ccmpb5</div><div class='add'>+      - const: cmpc5</div><div class='add'>+      - const: cmpd5</div><div class='add'>+      - const: cmpe5</div><div class='add'>+      - const: cmpf5</div><div class='add'>+      - const: adtrga5</div><div class='add'>+      - const: adtrgb5</div><div class='add'>+      - const: ovf5</div><div class='add'>+      - const: unf5</div><div class='add'>+      - const: ccmpa6</div><div class='add'>+      - const: ccmpb6</div><div class='add'>+      - const: cmpc6</div><div class='add'>+      - const: cmpd6</div><div class='add'>+      - const: cmpe6</div><div class='add'>+      - const: cmpf6</div><div class='add'>+      - const: adtrga6</div><div class='add'>+      - const: adtrgb6</div><div class='add'>+      - const: ovf6</div><div class='add'>+      - const: unf6</div><div class='add'>+      - const: ccmpa7</div><div class='add'>+      - const: ccmpb7</div><div class='add'>+      - const: cmpc7</div><div class='add'>+      - const: cmpd7</div><div class='add'>+      - const: cmpe7</div><div class='add'>+      - const: cmpf7</div><div class='add'>+      - const: adtrga7</div><div class='add'>+      - const: adtrgb7</div><div class='add'>+      - const: ovf7</div><div class='add'>+      - const: unf7</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a07g044-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    gpt: pwm@10048000 {</div><div class='add'>+        compatible = "renesas,r9a07g044-gpt", "renesas,rzg2l-gpt";</div><div class='add'>+        reg = &lt;0x10048000 0x800&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 218 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 219 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 220 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 221 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 222 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 223 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 224 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 225 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 226 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 227 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 231 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 232 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 233 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 234 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 235 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 236 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 237 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 238 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 239 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 240 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 244 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 245 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 246 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 247 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 248 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 249 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 250 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 251 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 252 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 253 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 257 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 258 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 259 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 260 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 261 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 262 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 263 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 265 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 266 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 270 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 271 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 272 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 273 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 274 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 275 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 276 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 277 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 278 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 279 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 283 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 284 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 285 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 286 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 287 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 288 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 289 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 290 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 291 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 292 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 296 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 297 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 298 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 299 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 300 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 301 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 302 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 303 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 304 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 305 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 309 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 310 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 311 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 312 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 313 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 314 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 315 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 316 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 317 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 318 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "ccmpa0", "ccmpb0", "cmpc0", "cmpd0",</div><div class='add'>+                          "cmpe0", "cmpf0", "adtrga0", "adtrgb0",</div><div class='add'>+                          "ovf0", "unf0",</div><div class='add'>+                          "ccmpa1", "ccmpb1", "cmpc1", "cmpd1",</div><div class='add'>+                          "cmpe1", "cmpf1", "adtrga1", "adtrgb1",</div><div class='add'>+                          "ovf1", "unf1",</div><div class='add'>+                          "ccmpa2", "ccmpb2", "cmpc2", "cmpd2",</div><div class='add'>+                          "cmpe2", "cmpf2", "adtrga2", "adtrgb2",</div><div class='add'>+                          "ovf2", "unf2",</div><div class='add'>+                          "ccmpa3", "ccmpb3", "cmpc3", "cmpd3",</div><div class='add'>+                          "cmpe3", "cmpf3", "adtrga3", "adtrgb3",</div><div class='add'>+                          "ovf3", "unf3",</div><div class='add'>+                          "ccmpa4", "ccmpb4", "cmpc4", "cmpd4",</div><div class='add'>+                          "cmpe4", "cmpf4", "adtrga4", "adtrgb4",</div><div class='add'>+                          "ovf4", "unf4",</div><div class='add'>+                          "ccmpa5", "ccmpb5", "cmpc5", "cmpd5",</div><div class='add'>+                          "cmpe5", "cmpf5", "adtrga5", "adtrgb5",</div><div class='add'>+                          "ovf5", "unf5",</div><div class='add'>+                          "ccmpa6", "ccmpb6", "cmpc6", "cmpd6",</div><div class='add'>+                          "cmpe6", "cmpf6", "adtrga6", "adtrgb6",</div><div class='add'>+                          "ovf6", "unf6",</div><div class='add'>+                          "ccmpa7", "ccmpb7", "cmpc7", "cmpd7",</div><div class='add'>+                          "cmpe7", "cmpf7", "adtrga7", "adtrgb7",</div><div class='add'>+                          "ovf7", "unf7";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A07G044_GPT_PCLK&gt;;</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg R9A07G044_GPT_RST_C&gt;;</div><div class='add'>+        #pwm-cells = &lt;3&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml<br/>index a4dfa09344dd..f85ee5d20ccb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml</a></div><div class='hunk'>@@ -9,15 +9,6 @@ title: Renesas R-Car Timer Pulse Unit PWM Controller</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;</div><div class='ctx'> </div><div class='del'>-select:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: renesas,tpu</div><div class='del'>-  required:</div><div class='del'>-    - compatible</div><div class='del'>-    - '#pwm-cells'</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml b/Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml<br/>new file mode 100644<br/>index 000000000000..d9146ad715ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/via,vt8500-pwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexey Charkov &lt;alchark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: via,vt8500-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#pwm-cells':</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm1: pwm@d8220000 {</div><div class='add'>+        compatible = "via,vt8500-pwm";</div><div class='add'>+        reg = &lt;0xd8220000 0x1000&gt;;</div><div class='add'>+        #pwm-cells = &lt;3&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkpwm&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt b/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt<br/>deleted file mode 100644<br/>index 4fba93ce1985..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/pwm/vt8500-pwm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "via,vt8500-pwm"</div><div class='del'>-- reg: physical base address and length of the controller's registers</div><div class='del'>-- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of</div><div class='del'>-  the cells format. The only third cell flag supported by this binding is</div><div class='del'>-  PWM_POLARITY_INVERTED.</div><div class='del'>-- clocks: phandle to the PWM source clock</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-pwm1: pwm@d8220000 {</div><div class='del'>-	#pwm-cells = &lt;3&gt;;</div><div class='del'>-	compatible = "via,vt8500-pwm";</div><div class='del'>-	reg = &lt;0xd8220000 0x1000&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkpwm&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml b/Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..9c4ead4c9fd1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,157 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/adi,adp5055-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices ADP5055 Triple Buck Regulator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexis Czezar Torreno &lt;alexisczezar.torreno@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The ADP5055 combines three high performance buck regulator. The device enables</div><div class='add'>+  direct connection to high input voltages up to 18 V with no preregulators.</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/adp5055.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,adp5055</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    enum:</div><div class='add'>+      - 0x70</div><div class='add'>+      - 0x71</div><div class='add'>+</div><div class='add'>+  adi,tset-us:</div><div class='add'>+    description:</div><div class='add'>+      Setting time used by the device. This is changed via soldering specific</div><div class='add'>+      resistor values on the CFG2 pin.</div><div class='add'>+    enum: [2600, 20800]</div><div class='add'>+    default: 2600</div><div class='add'>+</div><div class='add'>+  adi,ocp-blanking:</div><div class='add'>+    description:</div><div class='add'>+      If present, overcurrent protection (OCP) blanking for all regulator is on.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  adi,delay-power-good:</div><div class='add'>+    description:</div><div class='add'>+      Configures delay timer of the power good (PWRGD) pin. Delay is based on</div><div class='add'>+      Tset which can be 2.6 ms or 20.8 ms.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^buck[0-2]$':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      enable-gpios:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description:</div><div class='add'>+          GPIO specifier to enable the GPIO control for each regulator. The</div><div class='add'>+          driver supports two modes of enable, hardware only (GPIOs) or software</div><div class='add'>+          only (Registers). Pure hardware enabling requires each regulator to</div><div class='add'>+          contain this property. If at least one regulator does not have this,</div><div class='add'>+          the driver automatically switches to software only mode.</div><div class='add'>+</div><div class='add'>+      adi,dvs-limit-upper-microvolt:</div><div class='add'>+        description:</div><div class='add'>+          Configure the allowable upper side limit of the voltage output of each</div><div class='add'>+          regulator in microvolt. Relative to the default Vref trimming value.</div><div class='add'>+          Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted.</div><div class='add'>+          Vout_high = Vref_trim + dvs-limit-upper.</div><div class='add'>+        minimum: 12000</div><div class='add'>+        maximum: 192000</div><div class='add'>+        default: 192000</div><div class='add'>+</div><div class='add'>+      adi,dvs-limit-lower-microvolt:</div><div class='add'>+        description:</div><div class='add'>+          Configure the allowable lower side limit of the voltage output of each</div><div class='add'>+          regulator in microvolt. Relative to the default Vref trimming value.</div><div class='add'>+          Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted.</div><div class='add'>+          Vout_low = Vref_trim + dvs-limit-lower.</div><div class='add'>+        minimum: -190500</div><div class='add'>+        maximum: -10500</div><div class='add'>+        default: -190500</div><div class='add'>+</div><div class='add'>+      adi,fast-transient:</div><div class='add'>+        description:</div><div class='add'>+          Configures the fast transient sensitivity for each regulator.</div><div class='add'>+          "none"    - No fast transient.</div><div class='add'>+          "3G_1.5%" - 1.5% window with 3*350uA/V</div><div class='add'>+          "5G_1.5%" - 1.5% window with 5*350uA/V</div><div class='add'>+          "5G_2.5%" - 2.5% window with 5*350uA/V</div><div class='add'>+        enum: [none, 3G_1.5%, 5G_1.5%, 5G_2.5%]</div><div class='add'>+        default: 5G_2.5%</div><div class='add'>+</div><div class='add'>+      adi,mask-power-good:</div><div class='add'>+        description:</div><div class='add'>+          If present, masks individual regulators PWRGD signal to the external</div><div class='add'>+          PWRGD hardware pin.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        regulator@70 {</div><div class='add'>+            compatible = "adi,adp5055";</div><div class='add'>+            reg = &lt;0x70&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            adi,tset-us = &lt;2600&gt;;</div><div class='add'>+            adi,ocp-blanking;</div><div class='add'>+            adi,delay-power-good;</div><div class='add'>+</div><div class='add'>+            buck0 {</div><div class='add'>+                regulator-name = "buck0";</div><div class='add'>+                enable-gpios = &lt;&amp;gpio 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+                adi,dvs-limit-upper-microvolt = &lt;192000&gt;;</div><div class='add'>+                adi,dvs-limit-lower-microvolt = &lt;(-190500)&gt;;</div><div class='add'>+                adi,fast-transient = "5G_2.5%";</div><div class='add'>+                adi,mask-power-good;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            buck1 {</div><div class='add'>+                regulator-name = "buck1";</div><div class='add'>+                enable-gpios = &lt;&amp;gpio 18 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+                adi,dvs-limit-upper-microvolt = &lt;192000&gt;;</div><div class='add'>+                adi,dvs-limit-lower-microvolt = &lt;(-190500)&gt;;</div><div class='add'>+                adi,fast-transient = "5G_2.5%";</div><div class='add'>+                adi,mask-power-good;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            buck2 {</div><div class='add'>+                regulator-name = "buck2";</div><div class='add'>+                enable-gpios = &lt;&amp;gpio 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+                adi,dvs-limit-upper-microvolt = &lt;192000&gt;;</div><div class='add'>+                adi,dvs-limit-lower-microvolt = &lt;(-190500)&gt;;</div><div class='add'>+                adi,fast-transient = "5G_2.5%";</div><div class='add'>+                adi,mask-power-good;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml<br/>index 6327bb2f6ee0..698266c09e25 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml</a></div><div class='hunk'>@@ -33,7 +33,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: fixed-regulator.yaml#</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       Properties for single fixed LDO regulator.</div><div class='hunk'>@@ -112,7 +112,6 @@ examples:</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;220&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vfe28_reg: ldo-vfe28 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vfe28";</div><div class='ctx'>           regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;2800000&gt;;</div><div class='hunk'>@@ -125,14 +124,12 @@ examples:</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;110&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vrf18_reg: ldo-vrf18 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vrf18";</div><div class='ctx'>           regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;110&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vrf12_reg: ldo-vrf12 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vrf12";</div><div class='ctx'>           regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1200000&gt;;</div><div class='hunk'>@@ -157,14 +154,12 @@ examples:</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vcn28_reg: ldo-vcn28 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vcn28";</div><div class='ctx'>           regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;2800000&gt;;</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vcn18_reg: ldo-vcn18 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vcn18";</div><div class='ctx'>           regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -183,7 +178,6 @@ examples:</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vcamio_reg: ldo-vcamio18 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vcamio";</div><div class='ctx'>           regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1800000&gt;;</div><div class='hunk'>@@ -212,28 +206,24 @@ examples:</div><div class='ctx'>           regulator-always-on;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vaux18_reg: ldo-vaux18 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vaux18";</div><div class='ctx'>           regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vaud28_reg: ldo-vaud28 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vaud28";</div><div class='ctx'>           regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;2800000&gt;;</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vio28_reg: ldo-vio28 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vio28";</div><div class='ctx'>           regulator-min-microvolt = &lt;2800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;2800000&gt;;</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='ctx'>         };</div><div class='ctx'>         mt6357_vio18_reg: ldo-vio18 {</div><div class='del'>-          compatible = "regulator-fixed";</div><div class='ctx'>           regulator-name = "vio18";</div><div class='ctx'>           regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1800000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml<br/>index c3b33bbc7319..84c4801df8d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml</a></div><div class='hunk'>@@ -24,6 +24,9 @@ properties:</div><div class='ctx'>               - microchip,sam9x60-rstc</div><div class='ctx'>               - microchip,sama7g5-rstc</div><div class='ctx'>       - items:</div><div class='add'>+          - const: microchip,sama7d65-rstc</div><div class='add'>+          - const: microchip,sama7g5-rstc</div><div class='add'>+      - items:</div><div class='ctx'>           - const: atmel,sama5d3-rstc</div><div class='ctx'>           - const: atmel,at91sam9g45-rstc</div><div class='ctx'>       - items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml<br/>index 1f1b42dde94d..1db85fc9966f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml</a></div><div class='hunk'>@@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Zynq UltraScale+ MPSoC and Versal reset</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;</div><div class='ctx'>   - Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml b/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml<br/>index ca71b400bcae..fcc5be80142d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/rng/rockchip,rk3588-rng.yaml</a></div><div class='hunk'>@@ -4,9 +4,9 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rng/rockchip,rk3588-rng.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip RK3588 TRNG</div><div class='add'>+title: Rockchip RK3576/RK3588 TRNG</div><div class='ctx'> </div><div class='del'>-description: True Random Number Generator on Rockchip RK3588 SoC</div><div class='add'>+description: True Random Number Generator on Rockchip RK3576/RK3588 SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nicolas Frattaroli &lt;nicolas.frattaroli@collabora.com&gt;</div><div class='hunk'>@@ -14,6 +14,7 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - rockchip,rk3576-rng</div><div class='ctx'>       - rockchip,rk3588-rng</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml<br/>index 1aa3480d8d81..1ee0aed5057d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml</a></div><div class='hunk'>@@ -17,9 +17,7 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           items:</div><div class='del'>-            - enum:</div><div class='del'>-                - renesas,r9a06g032-uart</div><div class='del'>-                - renesas,r9a06g033-uart</div><div class='add'>+            - const: renesas,r9a06g032-uart</div><div class='ctx'>             - const: renesas,rzn1-uart</div><div class='ctx'>             - const: snps,dw-apb-uart</div><div class='ctx'>     then:</div><div class='hunk'>@@ -45,15 +43,11 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,r9a06g032-uart</div><div class='del'>-              - renesas,r9a06g033-uart</div><div class='add'>+          - const: renesas,r9a06g032-uart</div><div class='ctx'>           - const: renesas,rzn1-uart</div><div class='ctx'>           - const: snps,dw-apb-uart</div><div class='ctx'>       - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,r9a06g032-uart</div><div class='del'>-              - renesas,r9a06g033-uart</div><div class='add'>+          - const: renesas,r9a06g032-uart</div><div class='ctx'>           - const: renesas,rzn1-uart</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml b/Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml<br/>index 31295be91013..234089b5954d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Freescale Layerscape Reset Registers Module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Frank Li</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Reset Module includes chip reset, service processor control and Reset Control</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml b/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml<br/>index de0b4ae740ff..a975bce59975 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/soc/fsl/fsl,qman-fqd.yaml</a></div><div class='hunk'>@@ -50,7 +50,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: reserved-memory.yaml</div><div class='add'>+  - $ref: /schemas/reserved-memory/reserved-memory.yaml</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +61,7 @@ examples:</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>         qman-fqd {</div><div class='del'>-            compatible = "shared-dma-pool";</div><div class='add'>+            compatible = "fsl,qman-fqd";</div><div class='ctx'>             size = &lt;0 0x400000&gt;;</div><div class='ctx'>             alignment = &lt;0 0x400000&gt;;</div><div class='ctx'>             no-map;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml<br/>index ca4bce817273..c2f1f5946cfa 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml</a></div><div class='hunk'>@@ -73,9 +73,10 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         cpu@0 {</div><div class='del'>-            compatible = "qcom,kryo";</div><div class='add'>+            compatible = "arm,cortex-a53";</div><div class='ctx'>             device_type = "cpu";</div><div class='ctx'>             enable-method = "qcom,kpss-acc-v2";</div><div class='add'>+            qcom,acc = &lt;&amp;acc0&gt;;</div><div class='ctx'>             qcom,saw = &lt;&amp;saw0&gt;;</div><div class='ctx'>             reg = &lt;0x0&gt;;</div><div class='ctx'>             operating-points-v2 = &lt;&amp;cpu_opp_table&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml<br/>index fd6db0ca98eb..4fcae6bedfff 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a></div><div class='hunk'>@@ -54,7 +54,7 @@ properties:</div><div class='ctx'>       - compatible</div><div class='ctx'> </div><div class='ctx'>   wifi:</div><div class='del'>-    additionalProperties: false</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     type: object</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -88,6 +88,9 @@ properties:</div><div class='ctx'>       - qcom,smem-states</div><div class='ctx'>       - qcom,smem-state-names</div><div class='ctx'> </div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: /schemas/net/wireless/wireless-controller.yaml#</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - qcom,mmio</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml b/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml<br/>index 94588353f852..40eb1d7d6cf1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/audio-graph-card2.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/audio-graph-card2.yaml</a></div><div class='hunk'>@@ -18,11 +18,7 @@ properties:</div><div class='ctx'>   label:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>   routing:</div><div class='del'>-    description: |</div><div class='del'>-      A list of the connections between audio components.</div><div class='del'>-      Each entry is a pair of strings, the first being the</div><div class='del'>-      connection's sink, the second being the connection's source.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    $ref: audio-graph.yaml#/properties/routing</div><div class='ctx'>   aux-devs:</div><div class='ctx'>     description: |</div><div class='ctx'>       List of phandles pointing to auxiliary devices, such</div><div class='hunk'>@@ -39,6 +35,8 @@ properties:</div><div class='ctx'>     description: Codec to Codec node</div><div class='ctx'>   hp-det-gpios:</div><div class='ctx'>     $ref: audio-graph.yaml#/properties/hp-det-gpios</div><div class='add'>+  mic-det-gpios:</div><div class='add'>+    $ref: audio-graph.yaml#/properties/mic-det-gpios</div><div class='ctx'>   widgets:</div><div class='ctx'>     $ref: audio-graph.yaml#/properties/widgets</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml<br/>new file mode 100644<br/>index 000000000000..bf087b57aaf6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/cirrus,cs48l32.yaml</a></div><div class='hunk'>@@ -0,0 +1,195 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/cirrus,cs48l32.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cirrus Logic CS48L32 audio DSP.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The CS48L32 is a high-performance low-power audio DSP for smartphones and</div><div class='add'>+  other portable audio devices. The CS48L32 combines a programmable Halo Core</div><div class='add'>+  DSP with a variety of power-efficient fixed-function audio processors.</div><div class='add'>+</div><div class='add'>+  See also the binding headers:</div><div class='add'>+</div><div class='add'>+    include/dt-bindings/sound/cs48l32.yaml</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - cirrus,cs48l32</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: SPI chip-select number.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 25000000</div><div class='add'>+</div><div class='add'>+  vdd-a-supply:</div><div class='add'>+    description: Regulator supplying VDD_A</div><div class='add'>+</div><div class='add'>+  vdd-d-supply:</div><div class='add'>+    description: Regulator supplying VDD_D</div><div class='add'>+</div><div class='add'>+  vdd-io-supply:</div><div class='add'>+    description: Regulator supplying VDD_IO</div><div class='add'>+</div><div class='add'>+  vdd-cp-supply:</div><div class='add'>+    description: Regulator supplying VDD_CP</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      One entry specifying the GPIO controlling /RESET. Although optional,</div><div class='add'>+      it is strongly recommended to use a hardware reset.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The clock supplied on MCLK1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: mclk1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  cirrus,in-type:</div><div class='add'>+    description: |</div><div class='add'>+      A list of input type settings for each ADC input.</div><div class='add'>+      Inputs are one of these types:</div><div class='add'>+        CS48L32_IN_TYPE_DIFF : analog differential (default)</div><div class='add'>+        CS48L32_IN_TYPE_SE :   analog single-ended</div><div class='add'>+</div><div class='add'>+      The type of the left (L) and right (R) channel on each input is</div><div class='add'>+      independently configured, as are the two groups of pins muxable to</div><div class='add'>+      the input (referred to in the datasheet as "1" and "2").</div><div class='add'>+</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          IN1L_1 analog input type. One of the CS48L32_IN_TYPE_xxx.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+      - description:</div><div class='add'>+          IN1R_1 analog input type. One of the CS48L32_IN_TYPE_xxx.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+      - description:</div><div class='add'>+          IN1L_2 analog input type. One of the CS48L32_IN_TYPE_xxx.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+      - description:</div><div class='add'>+          IN1R_2 analog input type. One of the CS48L32_IN_TYPE_xxx.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+  cirrus,pdm-sup:</div><div class='add'>+    description: |</div><div class='add'>+      Indicate which MICBIAS output supplies bias to the microphone.</div><div class='add'>+      There is one cell per input (IN1, IN2, ...).</div><div class='add'>+</div><div class='add'>+      One of the CS48L32_MICBIAS_xxx values.</div><div class='add'>+        CS48L32_PDM_SUP_VOUT_MIC : mic biased from VOUT_MIC</div><div class='add'>+        CS48L32_PDM_SUP_MICBIAS1 : mic biased from MICBIAS1</div><div class='add'>+</div><div class='add'>+      Also see the INn_PDM_SUP field in the datasheet.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: IN1 PDM supply source</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+      - description: IN2 PDM supply source</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vdd-a-supply</div><div class='add'>+  - vdd-d-supply</div><div class='add'>+  - vdd-io-supply</div><div class='add'>+  - vdd-cp-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/sound/cs48l32.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@e0006000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0xe0006000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        codec@1 {</div><div class='add'>+            compatible = "cirrus,cs48l32";</div><div class='add'>+</div><div class='add'>+            reg = &lt;0x1&gt;;</div><div class='add'>+            spi-max-frequency = &lt;2500000&gt;;</div><div class='add'>+</div><div class='add'>+            vdd-a-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+            vdd-d-supply = &lt;&amp;regulator_1v2&gt;;</div><div class='add'>+            vdd-io-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+            vdd-cp-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 0 0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;clks 0&gt;;</div><div class='add'>+            clock-names = "mclk1";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+            interrupts = &lt;56 8&gt;;</div><div class='add'>+</div><div class='add'>+            #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            cirrus,in-type = &lt;</div><div class='add'>+                CS48L32_IN_TYPE_DIFF CS48L32_IN_TYPE_DIFF</div><div class='add'>+                CS48L32_IN_TYPE_SE   CS48L32_IN_TYPE_SE</div><div class='add'>+            &gt;;</div><div class='add'>+</div><div class='add'>+            cirrus,pdm-sup = &lt;</div><div class='add'>+              CS48L32_PDM_SUP_MICBIAS1 CS48L32_PDM_SUP_MICBIAS1</div><div class='add'>+            &gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Minimal config</div><div class='add'>+#</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/sound/cs48l32.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@e0006000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0xe0006000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        codec@1 {</div><div class='add'>+            compatible = "cirrus,cs48l32";</div><div class='add'>+</div><div class='add'>+            reg = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+            vdd-a-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+            vdd-d-supply = &lt;&amp;regulator_1v2&gt;;</div><div class='add'>+            vdd-io-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+            vdd-cp-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/everest,es8375.yaml b/Documentation/devicetree/bindings/sound/everest,es8375.yaml<br/>new file mode 100644<br/>index 000000000000..4a3d671c66b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/everest,es8375.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/everest,es8375.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/everest,es8375.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Everest ES8375 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Zhang &lt;zhangyi@everest-semi.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: everest,es8375</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock for master clock (MCLK)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description:</div><div class='add'>+      Analogue power supply.</div><div class='add'>+</div><div class='add'>+  vddd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Interface power supply.</div><div class='add'>+</div><div class='add'>+  everest,mclk-src:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+      Represents the MCLK/SCLK pair pins used as the internal clock.</div><div class='add'>+      0 represents selecting MCLK.</div><div class='add'>+      1 represents selecting SCLK.</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - vdda-supply</div><div class='add'>+  - vddd-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      es8375: codec@18 {</div><div class='add'>+        compatible = "everest,es8375";</div><div class='add'>+        reg = &lt;0x18&gt;;</div><div class='add'>+        vdda-supply = &lt;&amp;vdd3v3&gt;;</div><div class='add'>+        vddd-supply = &lt;&amp;vdd3v3&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/everest,es8389.yaml b/Documentation/devicetree/bindings/sound/everest,es8389.yaml<br/>new file mode 100644<br/>index 000000000000..a673df485ab3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/everest,es8389.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/everest,es8389.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/everest,es8389.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Everest ES8389 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Zhang &lt;zhangyi@everest-semi.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: everest,es8389</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock for master clock (MCLK)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      es8389: codec@10 {</div><div class='add'>+        compatible = "everest,es8389";</div><div class='add'>+        reg = &lt;0x10&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml<br/>index 8c22e8348b14..1415247c92c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,mqs.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/fsl,mqs.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/fsl,mqs.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/fsl,mqs.yaml</a></div><div class='hunk'>@@ -28,6 +28,9 @@ properties:</div><div class='ctx'>       - fsl,imx95-aonmix-mqs</div><div class='ctx'>       - fsl,imx95-netcmix-mqs</div><div class='ctx'> </div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -49,12 +52,17 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  port:</div><div class='add'>+    $ref: audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -86,7 +94,7 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - gpr</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml b/Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml<br/>new file mode 100644<br/>index 000000000000..1c6a2771f942<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/loongson,ls1b-ac97.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/loongson,ls1b-ac97.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson-1 AC97 Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Loongson-1 AC97 controller supports 2-channel stereo output and input.</div><div class='add'>+  It is paired with the DMA engine to handle playback and capture functions.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: loongson,ls1b-ac97</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - loongson,ls1a-ac97</div><div class='add'>+              - loongson,ls1c-ac97</div><div class='add'>+          - const: loongson,ls1b-ac97</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ac97</div><div class='add'>+      - const: audio-tx</div><div class='add'>+      - const: audio-rx</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    audio-controller@1fe74000 {</div><div class='add'>+        compatible = "loongson,ls1b-ac97";</div><div class='add'>+        reg = &lt;0x1fe74000 0x60&gt;, &lt;0x1fe72420 0x4&gt;, &lt;0x1fe74c4c 0x4&gt;;</div><div class='add'>+        reg-names = "ac97", "audio-tx", "audio-rx";</div><div class='add'>+        dmas = &lt;&amp;dma 1&gt;, &lt;&amp;dma 2&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98925.yaml b/Documentation/devicetree/bindings/sound/maxim,max98925.yaml<br/>index 32fd86204a7a..121e8d2d44da 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/maxim,max98925.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/maxim,max98925.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/maxim,max98925.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/maxim,max98925.yaml</a></div><div class='hunk'>@@ -77,11 +77,11 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>         audio-codec@3a {</div><div class='ctx'>             compatible = "maxim,max98927";</div><div class='ctx'>             reg = &lt;0x3a&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml<br/>index 76d5a437dc8f..7ba2ea2dfa0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml</a></div><div class='hunk'>@@ -96,10 +96,9 @@ patternProperties:</div><div class='ctx'>       mediatek,clk-provider:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         description: Indicates dai-link clock master.</div><div class='del'>-        items:</div><div class='del'>-          enum:</div><div class='del'>-            - cpu</div><div class='del'>-            - codec</div><div class='add'>+        enum:</div><div class='add'>+          - cpu</div><div class='add'>+          - codec</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml<br/>index cbc641ecbe94..037f21443ad1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a></div><div class='hunk'>@@ -124,10 +124,9 @@ patternProperties:</div><div class='ctx'>       mediatek,clk-provider:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         description: Indicates dai-link clock master.</div><div class='del'>-        items:</div><div class='del'>-          enum:</div><div class='del'>-            - cpu</div><div class='del'>-            - codec</div><div class='add'>+        enum:</div><div class='add'>+          - cpu</div><div class='add'>+          - codec</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - link-name</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml b/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml<br/>index 2af1d8ffbd8b..356e1feee962 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a></div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>       - mediatek,mt8195_mt6359_rt1019_rt5682</div><div class='ctx'>       - mediatek,mt8195_mt6359_rt1011_rt5682</div><div class='ctx'>       - mediatek,mt8195_mt6359_max98390_rt5682</div><div class='add'>+      - mediatek,mt8195_mt6359</div><div class='ctx'> </div><div class='ctx'>   model:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='hunk'>@@ -44,6 +45,8 @@ properties:</div><div class='ctx'>         - Right Spk</div><div class='ctx'> </div><div class='ctx'>         # Sources</div><div class='add'>+        - Headphone L</div><div class='add'>+        - Headphone R</div><div class='ctx'>         - Headset Mic</div><div class='ctx'>         - HPOL</div><div class='ctx'>         - HPOR</div><div class='hunk'>@@ -88,6 +91,7 @@ patternProperties:</div><div class='ctx'>       link-name:</div><div class='ctx'>         description: Indicates dai-link name and PCM stream name</div><div class='ctx'>         enum:</div><div class='add'>+          - DL_SRC_BE</div><div class='ctx'>           - DPTX_BE</div><div class='ctx'>           - ETDM1_IN_BE</div><div class='ctx'>           - ETDM2_IN_BE</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml<br/>index b4bee466d67a..da89523ccf5f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - nvidia,tegra210-audio-graph-card</div><div class='ctx'>       - nvidia,tegra186-audio-graph-card</div><div class='add'>+      - nvidia,tegra264-audio-graph-card</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 2</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml<br/>index e15f387c4c29..66b56e71599b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml</a></div><div class='hunk'>@@ -31,7 +31,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: nvidia,tegra186-asrc</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra186-asrc</div><div class='add'>+          - nvidia,tegra264-asrc</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - nvidia,tegra234-asrc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml<br/>index e1362c77472b..46ba167081ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml</a></div><div class='hunk'>@@ -29,6 +29,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra186-dspk</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-dspk</div><div class='ctx'>               - nvidia,tegra234-dspk</div><div class='ctx'>               - nvidia,tegra194-dspk</div><div class='ctx'>           - const: nvidia,tegra186-dspk</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml<br/>index 15ab40aeab1e..b32f33214ba6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml</a></div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - nvidia,tegra210-admaif</div><div class='ctx'>           - nvidia,tegra186-admaif</div><div class='add'>+          - nvidia,tegra264-admaif</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - nvidia,tegra234-admaif</div><div class='hunk'>@@ -39,6 +40,19 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   dma-names: true</div><div class='ctx'> </div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: APE read memory client</div><div class='add'>+      - description: APE write memory client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -74,6 +88,9 @@ then:</div><div class='ctx'>         Should be "tx1", "tx2" ... "tx10" for DMA Tx channel</div><div class='ctx'>       minItems: 1</div><div class='ctx'>       maxItems: 20</div><div class='add'>+    interconnects: false</div><div class='add'>+    interconnect-names: false</div><div class='add'>+    iommus: false</div><div class='ctx'> </div><div class='ctx'> else:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml<br/>index e4c871797fa6..19a80929f93e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml</a></div><div class='hunk'>@@ -27,7 +27,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: nvidia,tegra210-adx</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra210-adx</div><div class='add'>+          - nvidia,tegra264-adx</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - nvidia,tegra234-adx</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml<br/>index c4abac81f207..1c9f24d26819 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml</a></div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>           - nvidia,tegra210-ahub</div><div class='ctx'>           - nvidia,tegra186-ahub</div><div class='ctx'>           - nvidia,tegra234-ahub</div><div class='add'>+          - nvidia,tegra264-ahub</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: nvidia,tegra194-ahub</div><div class='ctx'>           - const: nvidia,tegra186-ahub</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml<br/>index 021b72546ba4..89712102cfdf 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml</a></div><div class='hunk'>@@ -26,11 +26,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: nvidia,tegra210-amx</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra210-amx</div><div class='add'>+          - nvidia,tegra194-amx</div><div class='add'>+          - nvidia,tegra264-amx</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: nvidia,tegra186-amx</div><div class='ctx'>           - const: nvidia,tegra210-amx</div><div class='del'>-      - const: nvidia,tegra194-amx</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: nvidia,tegra234-amx</div><div class='ctx'>           - const: nvidia,tegra194-amx</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml<br/>index bff551c35da7..bb8088878d4b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml</a></div><div class='hunk'>@@ -28,6 +28,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-dmic</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-dmic</div><div class='ctx'>               - nvidia,tegra234-dmic</div><div class='ctx'>               - nvidia,tegra194-dmic</div><div class='ctx'>               - nvidia,tegra186-dmic</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml<br/>index a82f11fb6c9a..903e815af8fd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml</a></div><div class='hunk'>@@ -25,7 +25,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: nvidia,tegra210-i2s</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra210-i2s</div><div class='add'>+          - nvidia,tegra264-i2s</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - nvidia,tegra234-i2s</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml<br/>index 5b9198602fc6..4c121b9cde1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-mbdrc</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-mbdrc</div><div class='ctx'>               - nvidia,tegra234-mbdrc</div><div class='ctx'>               - nvidia,tegra194-mbdrc</div><div class='ctx'>               - nvidia,tegra186-mbdrc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml<br/>index 049898f02e85..56b4c4fc123c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml</a></div><div class='hunk'>@@ -28,6 +28,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-amixer</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-amixer</div><div class='ctx'>               - nvidia,tegra234-amixer</div><div class='ctx'>               - nvidia,tegra194-amixer</div><div class='ctx'>               - nvidia,tegra186-amixer</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml<br/>index d0280d8aa3af..bde4ac6319b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml</a></div><div class='hunk'>@@ -31,6 +31,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-mvc</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-mvc</div><div class='ctx'>               - nvidia,tegra234-mvc</div><div class='ctx'>               - nvidia,tegra194-mvc</div><div class='ctx'>               - nvidia,tegra186-mvc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml<br/>index 9017fb6d575d..756c3096a2d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml</a></div><div class='hunk'>@@ -25,6 +25,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-ope</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-ope</div><div class='ctx'>               - nvidia,tegra234-ope</div><div class='ctx'>               - nvidia,tegra194-ope</div><div class='ctx'>               - nvidia,tegra186-ope</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml<br/>index 1e373c49d639..2f11a484dc2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml</a></div><div class='hunk'>@@ -24,6 +24,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-peq</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-peq</div><div class='ctx'>               - nvidia,tegra234-peq</div><div class='ctx'>               - nvidia,tegra194-peq</div><div class='ctx'>               - nvidia,tegra186-peq</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml<br/>index 185ca0be4f02..959aa7fffdac 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml</a></div><div class='hunk'>@@ -28,6 +28,7 @@ properties:</div><div class='ctx'>       - const: nvidia,tegra210-sfc</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nvidia,tegra264-sfc</div><div class='ctx'>               - nvidia,tegra234-sfc</div><div class='ctx'>               - nvidia,tegra194-sfc</div><div class='ctx'>               - nvidia,tegra186-sfc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml<br/>index 3ca9affb79a2..8a8767589ee0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/nvidia,tegra30-hda.yaml</a></div><div class='hunk'>@@ -20,11 +20,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: nvidia,tegra30-hda</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra30-hda</div><div class='add'>+          - nvidia,tegra194-hda</div><div class='add'>+          - nvidia,tegra234-hda</div><div class='add'>+          - nvidia,tegra264-hda</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - nvidia,tegra234-hda</div><div class='del'>-              - nvidia,tegra194-hda</div><div class='ctx'>               - nvidia,tegra186-hda</div><div class='ctx'>               - nvidia,tegra210-hda</div><div class='ctx'>               - nvidia,tegra124-hda</div><div class='hunk'>@@ -43,15 +45,12 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 2</div><div class='add'>+    minItems: 1</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - const: hda</div><div class='del'>-      - const: hda2hdmi</div><div class='del'>-      - const: hda2codec_2x</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 2</div><div class='hunk'>@@ -59,10 +58,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - const: hda</div><div class='del'>-      - const: hda2hdmi</div><div class='del'>-      - const: hda2codec_2x</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -93,6 +89,92 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra30-hda</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+            - const: hda2hdmi</div><div class='add'>+            - const: hda2codec_2x</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 3</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+            - const: hda2hdmi</div><div class='add'>+            - const: hda2codec_2x</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra194-hda</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+            - const: hda2hdmi</div><div class='add'>+            - const: hda2codec_2x</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+            - const: hda2hdmi</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra234-hda</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+            - const: hda2codec_2x</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+            - const: hda2codec_2x</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra264-hda</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hda</div><div class='add'>+            - const: hda2codec_2x</div><div class='add'>+        power-domains: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include&lt;dt-bindings/clock/tegra124-car-common.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml<br/>index b9e33a7429b0..22fe6814b706 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a></div><div class='hunk'>@@ -28,9 +28,12 @@ properties:</div><div class='ctx'>               - qcom,sm8750-sndcard</div><div class='ctx'>           - const: qcom,sm8450-sndcard</div><div class='ctx'>       - enum:</div><div class='add'>+          - fairphone,fp5-sndcard</div><div class='ctx'>           - qcom,apq8096-sndcard</div><div class='ctx'>           - qcom,qcm6490-idp-sndcard</div><div class='ctx'>           - qcom,qcs6490-rb3gen2-sndcard</div><div class='add'>+          - qcom,qcs9075-sndcard</div><div class='add'>+          - qcom,qcs9100-sndcard</div><div class='ctx'>           - qcom,qrb4210-rb2-sndcard</div><div class='ctx'>           - qcom,qrb5165-rb5-sndcard</div><div class='ctx'>           - qcom,sc7180-qdsp6-sndcard</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml<br/>index 10531350c336..ab1c6285dbf8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml</a></div><div class='hunk'>@@ -23,9 +23,15 @@ properties:</div><div class='ctx'>       - qcom,wcd9380-codec</div><div class='ctx'>       - qcom,wcd9385-codec</div><div class='ctx'> </div><div class='add'>+  mux-controls:</div><div class='add'>+    description: A reference to the audio mux switch for</div><div class='add'>+      switching CTIA/OMTP Headset types</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   us-euro-gpios:</div><div class='ctx'>     description: GPIO spec for swapping gnd and mic segments</div><div class='ctx'>     maxItems: 1</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/realtek,alc203.yaml b/Documentation/devicetree/bindings/sound/realtek,alc203.yaml<br/>new file mode 100644<br/>index 000000000000..6b90788b45eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/realtek,alc203.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/realtek,alc203.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/realtek,alc203.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Realtek ALC203 AC97 Audio Codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  ALC203 is a full duplex AC97 2.3 compatible stereo audio codec.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: realtek,alc203</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    audio-codec {</div><div class='add'>+        compatible = "realtek,alc203";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/richtek,rt9123.yaml b/Documentation/devicetree/bindings/sound/richtek,rt9123.yaml<br/>new file mode 100644<br/>index 000000000000..5acb05cdfefd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/richtek,rt9123.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/richtek,rt9123.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/richtek,rt9123.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT9123 Audio Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  RT9123 is a 3.2W mono Class-D audio amplifier that features high efficiency</div><div class='add'>+  and performance with ultra-low quiescent current. The digital audio interface</div><div class='add'>+  support various formats, including I2S, left-justified, right-justified, and</div><div class='add'>+  TDM formats.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - richtek,rt9123</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        amplifier@5e {</div><div class='add'>+            compatible = "richtek,rt9123";</div><div class='add'>+            reg = &lt;0x5e&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;gpio 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml b/Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml<br/>new file mode 100644<br/>index 000000000000..693511dfdda4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/richtek,rt9123p.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/richtek,rt9123p.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT9123P Audio Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  RT9123P is a RT9123 variant which does not support I2C control.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - richtek,rt9123p</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  enable-delay-ms:</div><div class='add'>+    description:</div><div class='add'>+      Delay time for 'ENABLE' pin changes intended to make I2S clocks ready to</div><div class='add'>+      prevent speaker pop noise. The unit is in millisecond.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    amplifier {</div><div class='add'>+        compatible = "richtek,rt9123p";</div><div class='add'>+        enable-gpios = &lt;&amp;gpio 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml<br/>new file mode 100644<br/>index 000000000000..149da9a91451<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/rockchip,rk3576-sai.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip Serial Audio Interface Controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Rockchip Serial Audio Interface (SAI) controller is a flexible audio</div><div class='add'>+  controller that implements the I2S, I2S/TDM and the PDM standards.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nicolas Frattaroli &lt;nicolas.frattaroli@collabora.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rockchip,rk3576-sai</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - enum: [tx, rx]</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: master audio clock</div><div class='add'>+      - description: AHB clock driving the interface</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+      - const: hclk</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: reset for the mclk domain</div><div class='add'>+      - description: reset for the hclk domain</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: m</div><div class='add'>+      - const: h</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  rockchip,sai-rx-route:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description:</div><div class='add'>+      Defines the mapping of the controller's SDI ports to actual input lanes,</div><div class='add'>+      as well as the number of input lanes.</div><div class='add'>+      rockchip,sai-rx-route = &lt;3&gt; would mean sdi3 is receiving from data0, and</div><div class='add'>+      that there is only one receiving lane.</div><div class='add'>+      This property's absence is to be understood as only one receiving lane</div><div class='add'>+      being used if the controller has capture capabilities.</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 3</div><div class='add'>+</div><div class='add'>+  rockchip,sai-tx-route:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description:</div><div class='add'>+      Defines the mapping of the controller's SDO ports to actual output lanes,</div><div class='add'>+      as well as the number of output lanes.</div><div class='add'>+      rockchip,sai-tx-route = &lt;3&gt; would mean sdo3 is sending to data0, and</div><div class='add'>+      that there is only one transmitting lane.</div><div class='add'>+      This property's absence is to be understood as only one transmitting lane</div><div class='add'>+      being used if the controller has playback capabilities.</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rockchip,rk3576-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/rockchip,rk3576-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/rockchip,rk3576-cru.h&gt;</div><div class='add'>+</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        sai1: sai@2a610000 {</div><div class='add'>+            compatible = "rockchip,rk3576-sai";</div><div class='add'>+            reg = &lt;0x0 0x2a610000 0x0 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;cru MCLK_SAI1_8CH&gt;, &lt;&amp;cru HCLK_SAI1_8CH&gt;;</div><div class='add'>+            clock-names = "mclk", "hclk";</div><div class='add'>+            dmas = &lt;&amp;dmac0 2&gt;, &lt;&amp;dmac0 3&gt;;</div><div class='add'>+            dma-names = "tx", "rx";</div><div class='add'>+            power-domains = &lt;&amp;power RK3576_PD_AUDIO&gt;;</div><div class='add'>+            resets = &lt;&amp;cru SRST_M_SAI1_8CH&gt;, &lt;&amp;cru SRST_H_SAI1_8CH&gt;;</div><div class='add'>+            reset-names = "m", "h";</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;sai1m0_lrck</div><div class='add'>+                         &amp;sai1m0_sclk</div><div class='add'>+                         &amp;sai1m0_sdi0</div><div class='add'>+                         &amp;sai1m0_sdo0</div><div class='add'>+                         &amp;sai1m0_sdo1</div><div class='add'>+                         &amp;sai1m0_sdo2</div><div class='add'>+                         &amp;sai1m0_sdo3&gt;;</div><div class='add'>+            rockchip,sai-tx-route = &lt;3 1 2 0&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml<br/>index 3591c8c49bfe..95d947fda6a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml</a></div><div class='hunk'>@@ -15,13 +15,18 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,soundwire-v1.3.0</div><div class='del'>-      - qcom,soundwire-v1.5.0</div><div class='del'>-      - qcom,soundwire-v1.5.1</div><div class='del'>-      - qcom,soundwire-v1.6.0</div><div class='del'>-      - qcom,soundwire-v1.7.0</div><div class='del'>-      - qcom,soundwire-v2.0.0</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,soundwire-v1.3.0</div><div class='add'>+          - qcom,soundwire-v1.5.0</div><div class='add'>+          - qcom,soundwire-v1.5.1</div><div class='add'>+          - qcom,soundwire-v1.6.0</div><div class='add'>+          - qcom,soundwire-v1.7.0</div><div class='add'>+          - qcom,soundwire-v2.0.0</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,soundwire-v2.1.0</div><div class='add'>+          - const: qcom,soundwire-v2.0.0</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/fsl,dspi.yaml b/Documentation/devicetree/bindings/spi/fsl,dspi.yaml<br/>index 7ca8fceda717..bf9cce53c48d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/fsl,dspi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/fsl,dspi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/fsl,dspi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/fsl,dspi.yaml</a></div><div class='hunk'>@@ -105,12 +105,12 @@ examples:</div><div class='ctx'>         big-endian;</div><div class='ctx'> </div><div class='ctx'>         flash@0 {</div><div class='del'>-                compatible = "jedec,spi-nor";</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-                spi-max-frequency = &lt;16000000&gt;;</div><div class='del'>-                spi-cpol;</div><div class='del'>-                spi-cpha;</div><div class='del'>-                spi-cs-setup-delay-ns = &lt;100&gt;;</div><div class='del'>-                spi-cs-hold-delay-ns = &lt;50&gt;;</div><div class='add'>+            compatible = "jedec,spi-nor";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;16000000&gt;;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-cpha;</div><div class='add'>+            spi-cs-setup-delay-ns = &lt;100&gt;;</div><div class='add'>+            spi-cs-hold-delay-ns = &lt;50&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml b/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml<br/>index 4e0d391e1d69..c97bf48b56b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml</a></div><div class='hunk'>@@ -59,8 +59,3 @@ examples:</div><div class='ctx'>         reg = &lt;0&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='del'>-    shm: syscon@c8001000 {</div><div class='del'>-      compatible = "nuvoton,wpcm450-shm", "syscon";</div><div class='del'>-      reg = &lt;0xc8001000 0x1000&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml<br/>index 48e97e240265..8b3640280559 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml</a></div><div class='hunk'>@@ -10,9 +10,6 @@ maintainers:</div><div class='ctx'>   - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='ctx'>   - Jonathan Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: spi-controller.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -47,6 +44,9 @@ properties:</div><div class='ctx'>       - const: rx</div><div class='ctx'>       - const: tx</div><div class='ctx'> </div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -69,6 +69,18 @@ required:</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          not:</div><div class='add'>+            contains:</div><div class='add'>+              const: nvidia,tegra234-qspi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        iommus: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/tegra210-car.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml<br/>index aa3f93319203..cb1f15224b45 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml</a></div><div class='hunk'>@@ -21,8 +21,12 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,ipq9574-snand</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,ipq5018-snand</div><div class='add'>+          - const: qcom,ipq9574-snand</div><div class='add'>+      - const: qcom,ipq9574-snand</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml<br/>index 49649fc3f95a..e0c7047ae8ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a></div><div class='hunk'>@@ -4,14 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Renesas MSIOF SPI controller</div><div class='add'>+title: Renesas MSIOF SPI / I2S controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: spi-controller.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -146,24 +143,38 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     default: 64</div><div class='ctx'> </div><div class='add'>+  # for MSIOF-I2S</div><div class='add'>+  port:</div><div class='add'>+    $ref: ../sound/audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - clocks</div><div class='ctx'>   - power-domains</div><div class='del'>-  - '#address-cells'</div><div class='del'>-  - '#size-cells'</div><div class='del'>-</div><div class='del'>-if:</div><div class='del'>-  not:</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        contains:</div><div class='del'>-          const: renesas,sh-mobile-msiof</div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - resets</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  # additional "required""</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: renesas,sh-mobile-msiof</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+</div><div class='add'>+  # If it doesn't have "port" node, it is "MSIOF-SPI"</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        required:</div><div class='add'>+          - port</div><div class='add'>+    then:</div><div class='add'>+      allOf:</div><div class='add'>+        - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/samsung,spi.yaml b/Documentation/devicetree/bindings/spi/samsung,spi.yaml<br/>index 3c206a64d60a..fe298d47b1a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/samsung,spi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/samsung,spi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/samsung,spi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/samsung,spi.yaml</a></div><div class='hunk'>@@ -29,6 +29,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - samsung,exynos8895-spi</div><div class='add'>+              - samsung,exynosautov920-spi</div><div class='ctx'>           - const: samsung,exynos850-spi</div><div class='ctx'>       - const: samsung,exynos7-spi</div><div class='ctx'>         deprecated: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml<br/>index bccd00a1ddd0..0543c526b783 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml</a></div><div class='hunk'>@@ -56,19 +56,18 @@ properties:</div><div class='ctx'>         enum:</div><div class='ctx'>           - snps,dw-apb-ssi</div><div class='ctx'>           - snps,dwc-ssi-1.01a</div><div class='del'>-      - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller</div><div class='del'>-        items:</div><div class='del'>-          - enum:</div><div class='del'>-              - mscc,ocelot-spi</div><div class='del'>-              - mscc,jaguar2-spi</div><div class='del'>-          - const: snps,dw-apb-ssi</div><div class='ctx'>       - description: Microchip Sparx5 SoC SPI Controller</div><div class='ctx'>         const: microchip,sparx5-spi</div><div class='ctx'>       - description: Amazon Alpine SPI Controller</div><div class='ctx'>         const: amazon,alpine-dw-apb-ssi</div><div class='del'>-      - description: Renesas RZ/N1 SPI Controller</div><div class='add'>+      - description: Vendor controllers which use snps,dw-apb-ssi as fallback</div><div class='ctx'>         items:</div><div class='del'>-          - const: renesas,rzn1-spi</div><div class='add'>+          - enum:</div><div class='add'>+              - mscc,ocelot-spi</div><div class='add'>+              - mscc,jaguar2-spi</div><div class='add'>+              - renesas,rzn1-spi</div><div class='add'>+              - sophgo,sg2042-spi</div><div class='add'>+              - thead,th1520-spi</div><div class='ctx'>           - const: snps,dw-apb-ssi</div><div class='ctx'>       - description: Intel Keem Bay SPI Controller</div><div class='ctx'>         const: intel,keembay-ssi</div><div class='hunk'>@@ -84,14 +83,8 @@ properties:</div><div class='ctx'>         const: canaan,k210-spi</div><div class='ctx'>       - description: Renesas RZ/N1 SPI Controller</div><div class='ctx'>         items:</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,r9a06g032-spi # RZ/N1D</div><div class='del'>-              - renesas,r9a06g033-spi # RZ/N1S</div><div class='add'>+          - const: renesas,r9a06g032-spi # RZ/N1D</div><div class='ctx'>           - const: renesas,rzn1-spi   # RZ/N1</div><div class='del'>-      - description: T-HEAD TH1520 SoC SPI Controller</div><div class='del'>-        items:</div><div class='del'>-          - const: thead,th1520-spi</div><div class='del'>-          - const: snps,dw-apb-ssi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml<br/>index 0bb443b8decd..8fc17e16efb2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml</a></div><div class='hunk'>@@ -8,12 +8,13 @@ title: Peripheral-specific properties for a SPI bus.</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Many SPI controllers need to add properties to peripheral devices. They could</div><div class='del'>-  be common properties like spi-max-frequency, spi-cpha, etc. or they could be</div><div class='del'>-  controller specific like delay in clock or data lines, etc. These properties</div><div class='del'>-  need to be defined in the peripheral node because they are per-peripheral and</div><div class='del'>-  there can be multiple peripherals attached to a controller. All those</div><div class='del'>-  properties are listed here. The controller specific properties should go in</div><div class='del'>-  their own separate schema that should be referenced from here.</div><div class='add'>+  be common properties like spi-max-frequency, spi-cs-high, etc. or they could</div><div class='add'>+  be controller specific like delay in clock or data lines, etc. These</div><div class='add'>+  properties need to be defined in the peripheral node because they are</div><div class='add'>+  per-peripheral and there can be multiple peripherals attached to a</div><div class='add'>+  controller. All those properties are listed here. The controller specific</div><div class='add'>+  properties should go in their own separate schema that should be referenced</div><div class='add'>+  from here.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mark Brown &lt;broonie@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.yaml b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml<br/>index 104f5ffdd04e..748faf7f7081 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/spi-rockchip.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/spi-rockchip.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/spi-rockchip.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/spi-rockchip.yaml</a></div><div class='hunk'>@@ -34,6 +34,7 @@ properties:</div><div class='ctx'>               - rockchip,rk3328-spi</div><div class='ctx'>               - rockchip,rk3368-spi</div><div class='ctx'>               - rockchip,rk3399-spi</div><div class='add'>+              - rockchip,rk3528-spi</div><div class='ctx'>               - rockchip,rk3562-spi</div><div class='ctx'>               - rockchip,rk3568-spi</div><div class='ctx'>               - rockchip,rk3576-spi</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml b/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml<br/>index 5f276f27dc4c..272bc308726b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/spi/st,stm32mp25-ospi.yaml</a></div><div class='hunk'>@@ -68,6 +68,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='add'>+  - resets</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - st,syscfg-dlyb</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/airoha,en7581-thermal.yaml b/Documentation/devicetree/bindings/thermal/airoha,en7581-thermal.yaml<br/>new file mode 100644<br/>index 000000000000..ca0242ef0378<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/airoha,en7581-thermal.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/thermal/airoha,en7581-thermal.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/thermal/airoha,en7581-thermal.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Airoha EN7581 Thermal Sensor and Monitor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: airoha,en7581-thermal</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  airoha,chip-scu:</div><div class='add'>+    description: phandle to the chip SCU syscon</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - airoha,chip-scu</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    thermal-sensor@1efbd800 {</div><div class='add'>+        compatible = "airoha,en7581-thermal";</div><div class='add'>+        reg = &lt;0x1efbd000 0xd5c&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        airoha,chip-scu = &lt;&amp;chip_scu&gt;;</div><div class='add'>+</div><div class='add'>+        #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml<br/>index f9d8012c8cf5..0e653bbe9884 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/thermal/qcom-tsens.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/thermal/qcom-tsens.yaml</a></div><div class='hunk'>@@ -39,6 +39,7 @@ properties:</div><div class='ctx'>       - description: v1 of TSENS</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,ipq5018-tsens</div><div class='ctx'>               - qcom,msm8937-tsens</div><div class='ctx'>               - qcom,msm8956-tsens</div><div class='ctx'>               - qcom,msm8976-tsens</div><div class='hunk'>@@ -251,6 +252,7 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - qcom,ipq5018-tsens</div><div class='ctx'>               - qcom,ipq8064-tsens</div><div class='ctx'>               - qcom,msm8960-tsens</div><div class='ctx'>               - qcom,tsens-v0_1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/altr,timer-1.0.txt b/Documentation/devicetree/bindings/timer/altr,timer-1.0.txt<br/>deleted file mode 100644<br/>index e698e3488735..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/altr,timer-1.0.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/altr,timer-1.0.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Altera Timer</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "altr,timer-1.0"</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-- interrupts : Should contain the timer interrupt number</div><div class='del'>-- clock-frequency : The frequency of the clock that drives the counter, in Hz.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer {</div><div class='del'>-	compatible = "altr,timer-1.0";</div><div class='del'>-	reg = &lt;0x00400000 0x00000020&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;cpu&gt;;</div><div class='del'>-	interrupts = &lt;11&gt;;</div><div class='del'>-	clock-frequency = &lt;125000000&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/altr,timer-1.0.yaml b/Documentation/devicetree/bindings/timer/altr,timer-1.0.yaml<br/>new file mode 100644<br/>index 000000000000..576260c72d42<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/altr,timer-1.0.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/altr,timer-1.0.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/altr,timer-1.0.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Altera Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dinh Nguyen &lt;dinguyen@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: altr,timer-1.0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: Frequency of the clock that drives the counter, in Hz.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@400000 {</div><div class='add'>+        compatible = "altr,timer-1.0";</div><div class='add'>+        reg = &lt;0x00400000 0x00000020&gt;;</div><div class='add'>+        interrupts = &lt;11&gt;;</div><div class='add'>+        clock-frequency = &lt;125000000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/arm,mps2-timer.txt b/Documentation/devicetree/bindings/timer/arm,mps2-timer.txt<br/>deleted file mode 100644<br/>index 48f84d74edde..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/arm,mps2-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/arm,mps2-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-ARM MPS2 timer</div><div class='del'>-</div><div class='del'>-The MPS2 platform has simple general-purpose 32 bits timers.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible	: Should be "arm,mps2-timer"</div><div class='del'>-- reg		: Address and length of the register set</div><div class='del'>-- interrupts	: Reference to the timer interrupt</div><div class='del'>-</div><div class='del'>-Required clocking property, have to be one of:</div><div class='del'>-- clocks	  : The input clock of the timer</div><div class='del'>-- clock-frequency : The rate in HZ in input of the ARM MPS2 timer</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-timer1: mps2-timer@40000000 {</div><div class='del'>-	compatible = "arm,mps2-timer";</div><div class='del'>-	reg = &lt;0x40000000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;8&gt;;</div><div class='del'>-	clocks = &lt;&amp;sysclk&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-timer2: mps2-timer@40001000 {</div><div class='del'>-	compatible = "arm,mps2-timer";</div><div class='del'>-	reg = &lt;0x40001000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;9&gt;;</div><div class='del'>-	clock-frequency = &lt;25000000&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/arm,mps2-timer.yaml b/Documentation/devicetree/bindings/timer/arm,mps2-timer.yaml<br/>new file mode 100644<br/>index 000000000000..64c6aedd7e8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/arm,mps2-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/arm,mps2-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm,mps2-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM MPS2 timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vladimir Murzin &lt;vladimir.murzin@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MPS2 platform has simple general-purpose 32 bits timers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,mps2-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: Rate in Hz of the timer input clock</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required: [clocks]</div><div class='add'>+  - required: [clock-frequency]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@40000000 {</div><div class='add'>+        compatible = "arm,mps2-timer";</div><div class='add'>+        reg = &lt;0x40000000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;8&gt;;</div><div class='add'>+        clocks = &lt;&amp;sysclk&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.txt b/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.txt<br/>deleted file mode 100644<br/>index d4c62e7b1714..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-* Cirrus Logic CLPS711X Timer Counter</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Shall contain "cirrus,ep7209-timer".</div><div class='del'>-- reg       : Address and length of the register set.</div><div class='del'>-- interrupts: The interrupt number of the timer.</div><div class='del'>-- clocks    : phandle of timer reference clock.</div><div class='del'>-</div><div class='del'>-Note: Each timer should have an alias correctly numbered in "aliases" node.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	aliases {</div><div class='del'>-		timer0 = &amp;timer1;</div><div class='del'>-		timer1 = &amp;timer2;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	timer1: timer@80000300 {</div><div class='del'>-		compatible = "cirrus,ep7312-timer", "cirrus,ep7209-timer";</div><div class='del'>-		reg = &lt;0x80000300 0x4&gt;;</div><div class='del'>-		interrupts = &lt;8&gt;;</div><div class='del'>-		clocks = &lt;&amp;clks 5&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	timer2: timer@80000340 {</div><div class='del'>-		compatible = "cirrus,ep7312-timer", "cirrus,ep7209-timer";</div><div class='del'>-		reg = &lt;0x80000340 0x4&gt;;</div><div class='del'>-		interrupts = &lt;9&gt;;</div><div class='del'>-		clocks = &lt;&amp;clks 6&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.yaml b/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.yaml<br/>new file mode 100644<br/>index 000000000000..507b777e16bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/cirrus,clps711x-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/cirrus,clps711x-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cirrus Logic CLPS711X Timer Counter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Shiyan &lt;shc_work@mail.ru&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - cirrus,ep7312-timer</div><div class='add'>+          - const: cirrus,ep7209-timer</div><div class='add'>+      - const: cirrus,ep7209-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@80000300 {</div><div class='add'>+        compatible = "cirrus,ep7312-timer", "cirrus,ep7209-timer";</div><div class='add'>+        reg = &lt;0x80000300 0x4&gt;;</div><div class='add'>+        interrupts = &lt;8&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks 5&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/cnxt,cx92755-timer.yaml b/Documentation/devicetree/bindings/timer/cnxt,cx92755-timer.yaml<br/>new file mode 100644<br/>index 000000000000..8f1a5af32a36<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/cnxt,cx92755-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/cnxt,cx92755-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/cnxt,cx92755-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Conexant Digicolor SoCs Timer Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Baruch Siach &lt;baruch@tkos.co.il&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cnxt,cx92755-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: Contains 8 interrupts, one for each timer</div><div class='add'>+    items:</div><div class='add'>+      - description: interrupt for timer 0</div><div class='add'>+      - description: interrupt for timer 1</div><div class='add'>+      - description: interrupt for timer 2</div><div class='add'>+      - description: interrupt for timer 3</div><div class='add'>+      - description: interrupt for timer 4</div><div class='add'>+      - description: interrupt for timer 5</div><div class='add'>+      - description: interrupt for timer 6</div><div class='add'>+      - description: interrupt for timer 7</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@f0000fc0 {</div><div class='add'>+      compatible = "cnxt,cx92755-timer";</div><div class='add'>+      reg = &lt;0xf0000fc0 0x40&gt;;</div><div class='add'>+      interrupts = &lt;19&gt;, &lt;31&gt;, &lt;34&gt;, &lt;35&gt;, &lt;52&gt;, &lt;53&gt;, &lt;54&gt;, &lt;55&gt;;</div><div class='add'>+      clocks = &lt;&amp;main_clk&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt<br/>deleted file mode 100644<br/>index 6b04344f4bea..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-=================</div><div class='del'>-gx6605s SOC Timer</div><div class='del'>-=================</div><div class='del'>-</div><div class='del'>-The timer is used in gx6605s soc as system timer and the driver</div><div class='del'>-contain clk event and clk source.</div><div class='del'>-</div><div class='del'>-==============================</div><div class='del'>-timer node bindings definition</div><div class='del'>-==============================</div><div class='del'>-</div><div class='del'>-	Description: Describes gx6605s SOC timer</div><div class='del'>-</div><div class='del'>-	PROPERTIES</div><div class='del'>-</div><div class='del'>-	- compatible</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;string&gt;</div><div class='del'>-		Definition: must be "csky,gx6605s-timer"</div><div class='del'>-	- reg</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;u32 u32&gt;</div><div class='del'>-		Definition: &lt;phyaddr size&gt; in soc from cpu view</div><div class='del'>-	- clocks</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: phandle + clock specifier cells</div><div class='del'>-		Definition: must be input clk node</div><div class='del'>-	- interrupt</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;u32&gt;</div><div class='del'>-		Definition: must be timer irq num defined by soc</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-	timer0: timer@20a000 {</div><div class='del'>-		compatible = "csky,gx6605s-timer";</div><div class='del'>-		reg = &lt;0x0020a000 0x400&gt;;</div><div class='del'>-		clocks = &lt;&amp;dummy_apb_clk&gt;;</div><div class='del'>-		interrupts = &lt;10&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.yaml b/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.yaml<br/>new file mode 100644<br/>index 000000000000..888fc8113996<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/csky,gx6605s-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/csky,gx6605s-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/csky,gx6605s-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: gx6605s SOC Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Guo Ren &lt;guoren@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: csky,gx6605s-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@20a000 {</div><div class='add'>+        compatible = "csky,gx6605s-timer";</div><div class='add'>+        reg = &lt;0x0020a000 0x400&gt;;</div><div class='add'>+        clocks = &lt;&amp;dummy_apb_clk&gt;;</div><div class='add'>+        interrupts = &lt;10&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/csky,mptimer.txt b/Documentation/devicetree/bindings/timer/csky,mptimer.txt<br/>deleted file mode 100644<br/>index f5c7e99cf52b..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/csky,mptimer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/csky,mptimer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-============================</div><div class='del'>-C-SKY Multi-processors Timer</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-C-SKY multi-processors timer is designed for C-SKY SMP system and the</div><div class='del'>-regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.</div><div class='del'>-</div><div class='del'>- - PTIM_CTLR "cr&lt;0, 14&gt;" Control reg to start reset timer.</div><div class='del'>- - PTIM_TSR  "cr&lt;1, 14&gt;" Interrupt cleanup status reg.</div><div class='del'>- - PTIM_CCVR "cr&lt;3, 14&gt;" Current counter value reg.</div><div class='del'>- - PTIM_LVR  "cr&lt;6, 14&gt;" Window value reg to trigger next event.</div><div class='del'>-</div><div class='del'>-==============================</div><div class='del'>-timer node bindings definition</div><div class='del'>-==============================</div><div class='del'>-</div><div class='del'>-	Description: Describes SMP timer</div><div class='del'>-</div><div class='del'>-	PROPERTIES</div><div class='del'>-</div><div class='del'>-	- compatible</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;string&gt;</div><div class='del'>-		Definition: must be "csky,mptimer"</div><div class='del'>-	- clocks</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;node&gt;</div><div class='del'>-		Definition: must be input clk node</div><div class='del'>-	- interrupts</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;u32&gt;</div><div class='del'>-		Definition: must be timer irq num defined by soc</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-	timer: timer {</div><div class='del'>-		compatible = "csky,mptimer";</div><div class='del'>-		clocks = &lt;&amp;dummy_apb_clk&gt;;</div><div class='del'>-		interrupts = &lt;16&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/csky,mptimer.yaml b/Documentation/devicetree/bindings/timer/csky,mptimer.yaml<br/>new file mode 100644<br/>index 000000000000..12cc5282c8f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/csky,mptimer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/csky,mptimer.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/csky,mptimer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: C-SKY Multi-processors Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Flavio Suligoi &lt;f.suligoi@asem.it&gt;</div><div class='add'>+  - Guo Ren &lt;guoren@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  C-SKY multi-processors timer is designed for C-SKY SMP system and the regs are</div><div class='add'>+  accessed by cpu co-processor 4 registers with mtcr/mfcr.</div><div class='add'>+</div><div class='add'>+   - PTIM_CTLR "cr&lt;0, 14&gt;" Control reg to start reset timer.</div><div class='add'>+   - PTIM_TSR  "cr&lt;1, 14&gt;" Interrupt cleanup status reg.</div><div class='add'>+   - PTIM_CCVR "cr&lt;3, 14&gt;" Current counter value reg.</div><div class='add'>+   - PTIM_LVR  "cr&lt;6, 14&gt;" Window value reg to trigger next event.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: csky,mptimer</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer {</div><div class='add'>+        compatible = "csky,mptimer";</div><div class='add'>+        clocks = &lt;&amp;dummy_apb_clk&gt;;</div><div class='add'>+        interrupts = &lt;16&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/digicolor-timer.txt b/Documentation/devicetree/bindings/timer/digicolor-timer.txt<br/>deleted file mode 100644<br/>index d1b659bbc29f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/digicolor-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/digicolor-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Conexant Digicolor SoCs Timer Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "cnxt,cx92755-timer"</div><div class='del'>-- reg : Specifies base physical address and size of the "Agent Communication"</div><div class='del'>-  timer registers</div><div class='del'>-- interrupts : Contains 8 interrupts, one for each timer</div><div class='del'>-- clocks: phandle to the main clock</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	timer@f0000fc0 {</div><div class='del'>-		compatible = "cnxt,cx92755-timer";</div><div class='del'>-		reg = &lt;0xf0000fc0 0x40&gt;;</div><div class='del'>-		interrupts = &lt;19&gt;, &lt;31&gt;, &lt;34&gt;, &lt;35&gt;, &lt;52&gt;, &lt;53&gt;, &lt;54&gt;, &lt;55&gt;;</div><div class='del'>-		clocks = &lt;&amp;main_clk&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml<br/>new file mode 100644<br/>index 000000000000..c1e7c2b6afde<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/econet,en751221-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: EcoNet EN751221 High Precision Timer (HPT)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Caleb James DeLisle &lt;cjd@cjdns.fr&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The EcoNet High Precision Timer (HPT) is a timer peripheral found in various</div><div class='add'>+  EcoNet SoCs, including the EN751221 and EN751627 families. It provides per-VPE</div><div class='add'>+  count/compare registers and a per-CPU control register, with a single interrupt</div><div class='add'>+  line using a percpu-devid interrupt mechanism.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: econet,en751221-timer</div><div class='add'>+      - items:</div><div class='add'>+          - const: econet,en751627-timer</div><div class='add'>+          - const: econet,en751221-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: A percpu-devid timer interrupt shared across CPUs.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: econet,en751627-timer</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: VPE timers 0 and 1</div><div class='add'>+            - description: VPE timers 2 and 3</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: VPE timers 0 and 1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@1fbf0400 {</div><div class='add'>+        compatible = "econet,en751627-timer", "econet,en751221-timer";</div><div class='add'>+        reg = &lt;0x1fbf0400 0x100&gt;, &lt;0x1fbe0000 0x100&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+        interrupts = &lt;30&gt;;</div><div class='add'>+        clocks = &lt;&amp;hpt_clock&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    timer@1fbf0400 {</div><div class='add'>+        compatible = "econet,en751221-timer";</div><div class='add'>+        reg = &lt;0x1fbe0400 0x100&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+        interrupts = &lt;30&gt;;</div><div class='add'>+        clocks = &lt;&amp;hpt_clock&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.yaml b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.yaml<br/>new file mode 100644<br/>index 000000000000..317c5010c4c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/ezchip,nps400-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/ezchip,nps400-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ezchip,nps400-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: EZChip NPS400 Timers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Noam Camus &lt;noamca@mellanox.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ezchip,nps400-timer0</div><div class='add'>+      - ezchip,nps400-timer1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ezchip,nps400-timer0</div><div class='add'>+    then:</div><div class='add'>+      required: [ interrupts ]</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer {</div><div class='add'>+        compatible = "ezchip,nps400-timer0";</div><div class='add'>+        interrupts = &lt;3&gt;;</div><div class='add'>+        clocks = &lt;&amp;sysclk&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt<br/>deleted file mode 100644<br/>index e3cfce8fecc5..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ezchip,nps400-timer0.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-NPS Network Processor</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible :	should be "ezchip,nps400-timer0"</div><div class='del'>-</div><div class='del'>-Clocks required for compatible = "ezchip,nps400-timer0":</div><div class='del'>-- interrupts : The interrupt of the first timer</div><div class='del'>-- clocks : Must contain a single entry describing the clock input</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer {</div><div class='del'>-	compatible = "ezchip,nps400-timer0";</div><div class='del'>-	interrupts = &lt;3&gt;;</div><div class='del'>-	clocks = &lt;&amp;sysclk&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt b/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt<br/>deleted file mode 100644<br/>index c0ab4190b8fb..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ezchip,nps400-timer1.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-NPS Network Processor</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible :	should be "ezchip,nps400-timer1"</div><div class='del'>-</div><div class='del'>-Clocks required for compatible = "ezchip,nps400-timer1":</div><div class='del'>-- clocks : Must contain a single entry describing the clock input</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer {</div><div class='del'>-	compatible = "ezchip,nps400-timer1";</div><div class='del'>-	clocks = &lt;&amp;sysclk&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/fsl,gtm.txt b/Documentation/devicetree/bindings/timer/fsl,gtm.txt<br/>deleted file mode 100644<br/>index fc1c571f7412..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/fsl,gtm.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/fsl,gtm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-* Freescale General-purpose Timers Module</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible : should be</div><div class='del'>-    "fsl,&lt;chip&gt;-gtm", "fsl,gtm" for SOC GTMs</div><div class='del'>-    "fsl,&lt;chip&gt;-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs</div><div class='del'>-    "fsl,&lt;chip&gt;-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs</div><div class='del'>-  - reg : should contain gtm registers location and length (0x40).</div><div class='del'>-  - interrupts : should contain four interrupts.</div><div class='del'>-  - clock-frequency : specifies the frequency driving the timer.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer@500 {</div><div class='del'>-	compatible = "fsl,mpc8360-gtm", "fsl,gtm";</div><div class='del'>-	reg = &lt;0x500 0x40&gt;;</div><div class='del'>-	interrupts = &lt;90 8 78 8 84 8 72 8&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;ipic&gt;;</div><div class='del'>-	/* filled by u-boot */</div><div class='del'>-	clock-frequency = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-timer@440 {</div><div class='del'>-	compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm";</div><div class='del'>-	reg = &lt;0x440 0x40&gt;;</div><div class='del'>-	interrupts = &lt;12 13 14 15&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;qeic&gt;;</div><div class='del'>-	/* filled by u-boot */</div><div class='del'>-	clock-frequency = &lt;0&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/fsl,gtm.yaml b/Documentation/devicetree/bindings/timer/fsl,gtm.yaml<br/>new file mode 100644<br/>index 000000000000..1f35f1ee0be2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/fsl,gtm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/fsl,gtm.yaml</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/fsl,gtm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale General-purpose Timers Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - J. Neuschäfer &lt;j.ne@posteo.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      # for SoC GTMs</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,mpc8308-gtm</div><div class='add'>+              - fsl,mpc8313-gtm</div><div class='add'>+              - fsl,mpc8315-gtm</div><div class='add'>+              - fsl,mpc8360-gtm</div><div class='add'>+          - const: fsl,gtm</div><div class='add'>+</div><div class='add'>+      # for QE GTMs</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,mpc8360-qe-gtm</div><div class='add'>+              - fsl,mpc8569-qe-gtm</div><div class='add'>+          - const: fsl,qe-gtm</div><div class='add'>+          - const: fsl,gtm</div><div class='add'>+</div><div class='add'>+      # for CPM2 GTMs (no known examples)</div><div class='add'>+      - items:</div><div class='add'>+          # - enum:</div><div class='add'>+          #     - fsl,&lt;chip&gt;-cpm2-gtm</div><div class='add'>+          - const: fsl,cpm2-gtm</div><div class='add'>+          - const: fsl,gtm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Interrupt for timer 1 (e.g. GTM1 or GTM5)</div><div class='add'>+      - description: Interrupt for timer 2 (e.g. GTM2 or GTM6)</div><div class='add'>+      - description: Interrupt for timer 3 (e.g. GTM3 or GTM7)</div><div class='add'>+      - description: Interrupt for timer 4 (e.g. GTM4 or GTM8)</div><div class='add'>+</div><div class='add'>+  clock-frequency: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock-frequency</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@500 {</div><div class='add'>+        compatible = "fsl,mpc8360-gtm", "fsl,gtm";</div><div class='add'>+        reg = &lt;0x500 0x40&gt;;</div><div class='add'>+        interrupts = &lt;90 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                     &lt;78 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                     &lt;84 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                     &lt;72 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        /* filled by u-boot */</div><div class='add'>+        clock-frequency = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    timer@440 {</div><div class='add'>+        compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm";</div><div class='add'>+        reg = &lt;0x440 0x40&gt;;</div><div class='add'>+        interrupts = &lt;12&gt;, &lt;13&gt;, &lt;14&gt;, &lt;15&gt;;</div><div class='add'>+        /* filled by u-boot */</div><div class='add'>+        clock-frequency = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml b/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml<br/>new file mode 100644<br/>index 000000000000..bee2c35bd0e2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/fsl,vf610-pit.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/fsl,vf610-pit.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Periodic Interrupt Timer (PIT)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The PIT module is an array of timers that can be used to raise interrupts</div><div class='add'>+  and trigger DMA channels.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,vf610-pit</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pit</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/vf610-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@40037000 {</div><div class='add'>+        compatible = "fsl,vf610-pit";</div><div class='add'>+        reg = &lt;0x40037000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks VF610_CLK_PIT&gt;;</div><div class='add'>+        clock-names = "pit";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt b/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt<br/>deleted file mode 100644<br/>index 7afce80bf6a0..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-* Pistachio general-purpose timer based clocksource</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: "img,pistachio-gptimer".</div><div class='del'>- - reg: Address range of the timer registers.</div><div class='del'>- - interrupts: An interrupt for each of the four timers</div><div class='del'>- - clocks: Should contain a clock specifier for each entry in clock-names</div><div class='del'>- - clock-names: Should contain the following entries:</div><div class='del'>-                "sys", interface clock</div><div class='del'>-                "slow", slow counter clock</div><div class='del'>-                "fast", fast counter clock</div><div class='del'>- - img,cr-periph: Must contain a phandle to the peripheral control</div><div class='del'>-		  syscon node.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	timer: timer@18102000 {</div><div class='del'>-		compatible = "img,pistachio-gptimer";</div><div class='del'>-		reg = &lt;0x18102000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SHARED 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SHARED 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SHARED 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SHARED 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk_periph PERIPH_CLK_COUNTER_FAST&gt;,</div><div class='del'>-		         &lt;&amp;clk_periph PERIPH_CLK_COUNTER_SLOW&gt;,</div><div class='del'>-			 &lt;&amp;cr_periph SYS_CLK_TIMER&gt;;</div><div class='del'>-		clock-names = "fast", "slow", "sys";</div><div class='del'>-		img,cr-periph = &lt;&amp;cr_periph&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.yaml b/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.yaml<br/>new file mode 100644<br/>index 000000000000..a8654bcf68a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/img,pistachio-gptimer.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/img,pistachio-gptimer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Pistachio general-purpose timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ezequiel Garcia &lt;ezequiel.garcia@imgtec.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: img,pistachio-gptimer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Timer0 interrupt</div><div class='add'>+      - description: Timer1 interrupt</div><div class='add'>+      - description: Timer2 interrupt</div><div class='add'>+      - description: Timer3 interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Fast counter clock</div><div class='add'>+      - description: Slow counter clock</div><div class='add'>+      - description: Interface clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fast</div><div class='add'>+      - const: slow</div><div class='add'>+      - const: sys</div><div class='add'>+</div><div class='add'>+  img,cr-periph:</div><div class='add'>+    description: Peripheral control syscon phandle</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - img,cr-periph</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/pistachio-clk.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@18102000 {</div><div class='add'>+        compatible = "img,pistachio-gptimer";</div><div class='add'>+        reg = &lt;0x18102000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SHARED 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SHARED 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SHARED 62 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SHARED 63 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk_periph PERIPH_CLK_COUNTER_FAST&gt;,</div><div class='add'>+                 &lt;&amp;clk_periph PERIPH_CLK_COUNTER_SLOW&gt;,</div><div class='add'>+                 &lt;&amp;cr_periph SYS_CLK_TIMER&gt;;</div><div class='add'>+        clock-names = "fast", "slow", "sys";</div><div class='add'>+        img,cr-periph = &lt;&amp;cr_periph&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/jcore,pit.txt b/Documentation/devicetree/bindings/timer/jcore,pit.txt<br/>deleted file mode 100644<br/>index af5dd35469d7..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/jcore,pit.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/jcore,pit.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-J-Core Programmable Interval Timer and Clocksource</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Must be "jcore,pit".</div><div class='del'>-</div><div class='del'>-- reg: Memory region(s) for timer/clocksource registers. For SMP,</div><div class='del'>-  there should be one region per cpu, indexed by the sequential,</div><div class='del'>-  zero-based hardware cpu number.</div><div class='del'>-</div><div class='del'>-- interrupts: An interrupt to assign for the timer. The actual pit</div><div class='del'>-  core is integrated with the aic and allows the timer interrupt</div><div class='del'>-  assignment to be programmed by software, but this property is</div><div class='del'>-  required in order to reserve an interrupt number that doesn't</div><div class='del'>-  conflict with other devices.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer@200 {</div><div class='del'>-	compatible = "jcore,pit";</div><div class='del'>-	reg = &lt; 0x200 0x30 0x500 0x30 &gt;;</div><div class='del'>-	interrupts = &lt; 0x48 &gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/jcore,pit.yaml b/Documentation/devicetree/bindings/timer/jcore,pit.yaml<br/>new file mode 100644<br/>index 000000000000..9e6e25b75293<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/jcore,pit.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/jcore,pit.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/jcore,pit.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: J-Core Programmable Interval Timer and Clocksource</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rich Felker &lt;dalias@libc.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: jcore,pit</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      Memory region(s) for timer/clocksource registers. For SMP, there should be</div><div class='add'>+      one region per cpu, indexed by the sequential, zero-based hardware cpu</div><div class='add'>+      number.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      An interrupt to assign for the timer. The actual pit core is integrated</div><div class='add'>+      with the aic and allows the timer interrupt assignment to be programmed by</div><div class='add'>+      software, but this property is required in order to reserve an interrupt</div><div class='add'>+      number that doesn't conflict with other devices.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@200 {</div><div class='add'>+        compatible = "jcore,pit";</div><div class='add'>+        reg = &lt;0x200 0x30 0x500 0x30&gt;;</div><div class='add'>+        interrupts = &lt;0x48&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt b/Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt<br/>deleted file mode 100644<br/>index b2d07ad90e9a..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/lsi,zevio-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-TI-NSPIRE timer</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "lsi,zevio-timer".</div><div class='del'>-- reg : The physical base address and size of the timer (always first).</div><div class='del'>-- clocks: phandle to the source clock.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- interrupts : The interrupt number of the first timer.</div><div class='del'>-- reg : The interrupt acknowledgement registers</div><div class='del'>-	(always after timer base address)</div><div class='del'>-</div><div class='del'>-If any of the optional properties are not given, the timer is added as a</div><div class='del'>-clock-source only.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer {</div><div class='del'>-	compatible = "lsi,zevio-timer";</div><div class='del'>-	reg = &lt;0x900D0000 0x1000&gt;, &lt;0x900A0020 0x8&gt;;</div><div class='del'>-	interrupts = &lt;19&gt;;</div><div class='del'>-	clocks = &lt;&amp;timer_clk&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example (no clock-events):</div><div class='del'>-</div><div class='del'>-timer {</div><div class='del'>-	compatible = "lsi,zevio-timer";</div><div class='del'>-	reg = &lt;0x900D0000 0x1000&gt;;</div><div class='del'>-	clocks = &lt;&amp;timer_clk&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/lsi,zevio-timer.yaml b/Documentation/devicetree/bindings/timer/lsi,zevio-timer.yaml<br/>new file mode 100644<br/>index 000000000000..358455d8e7a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/lsi,zevio-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/lsi,zevio-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/lsi,zevio-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI-NSPIRE timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Daniel Tang &lt;dt.tangr@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: lsi,zevio-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Timer registers</div><div class='add'>+      - description: Interrupt acknowledgement registers (optional)</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      required: [ interrupts ]</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@900d0000 {</div><div class='add'>+        compatible = "lsi,zevio-timer";</div><div class='add'>+        reg = &lt;0x900D0000 0x1000&gt;, &lt;0x900A0020 0x8&gt;;</div><div class='add'>+        interrupts = &lt;19&gt;;</div><div class='add'>+        clocks = &lt;&amp;timer_clk&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    timer@900d0000 {</div><div class='add'>+        compatible = "lsi,zevio-timer";</div><div class='add'>+        reg = &lt;0x900D0000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;timer_clk&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/marvell,armada-370-timer.yaml b/Documentation/devicetree/bindings/timer/marvell,armada-370-timer.yaml<br/>new file mode 100644<br/>index 000000000000..bc0677fe86eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/marvell,armada-370-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/marvell,armada-370-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/marvell,armada-370-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Armada 370, 375, 380 and XP Timers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Gregory Clement &lt;gregory.clement@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: marvell,armada-380-timer</div><div class='add'>+          - const: marvell,armada-xp-timer</div><div class='add'>+      - items:</div><div class='add'>+          - const: marvell,armada-375-timer</div><div class='add'>+          - const: marvell,armada-370-timer</div><div class='add'>+      - enum:</div><div class='add'>+          - marvell,armada-370-timer</div><div class='add'>+          - marvell,armada-xp-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Global timer registers</div><div class='add'>+      - description: Local/private timer registers</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Global timer interrupt 0</div><div class='add'>+      - description: Global timer interrupt 1</div><div class='add'>+      - description: Global timer interrupt 2</div><div class='add'>+      - description: Global timer interrupt 3</div><div class='add'>+      - description: First private timer interrupt</div><div class='add'>+      - description: Second private timer interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: nbclk</div><div class='add'>+      - const: fixed</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - marvell,armada-375-timer</div><div class='add'>+              - marvell,armada-xp-timer</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@20300 {</div><div class='add'>+        compatible = "marvell,armada-xp-timer";</div><div class='add'>+        reg = &lt;0x20300 0x30&gt;, &lt;0x21040 0x30&gt;;</div><div class='add'>+        interrupts = &lt;37&gt;, &lt;38&gt;, &lt;39&gt;, &lt;40&gt;, &lt;5&gt;, &lt;6&gt;;</div><div class='add'>+        clocks = &lt;&amp;coreclk 2&gt;, &lt;&amp;refclk&gt;;</div><div class='add'>+        clock-names = "nbclk", "fixed";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt b/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt<br/>deleted file mode 100644<br/>index e9c78ce880e6..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-Marvell Armada 370 and Armada XP Timers</div><div class='del'>----------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be one of the following</div><div class='del'>-              "marvell,armada-370-timer",</div><div class='del'>-	      "marvell,armada-375-timer",</div><div class='del'>-	      "marvell,armada-xp-timer".</div><div class='del'>-- interrupts: Should contain the list of Global Timer interrupts and</div><div class='del'>-  then local timer interrupts</div><div class='del'>-- reg: Should contain location and length for timers register. First</div><div class='del'>-  pair for the Global Timer registers, second pair for the</div><div class='del'>-  local/private timers.</div><div class='del'>-</div><div class='del'>-Clocks required for compatible = "marvell,armada-370-timer":</div><div class='del'>-- clocks : Must contain a single entry describing the clock input</div><div class='del'>-</div><div class='del'>-Clocks required for compatibles = "marvell,armada-xp-timer",</div><div class='del'>-				  "marvell,armada-375-timer":</div><div class='del'>-- clocks : Must contain an entry for each entry in clock-names.</div><div class='del'>-- clock-names : Must include the following entries:</div><div class='del'>-  "nbclk" (L2/coherency fabric clock),</div><div class='del'>-  "fixed" (Reference 25 MHz fixed-clock).</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-- Armada 370:</div><div class='del'>-</div><div class='del'>-	timer {</div><div class='del'>-		compatible = "marvell,armada-370-timer";</div><div class='del'>-		reg = &lt;0x20300 0x30&gt;, &lt;0x21040 0x30&gt;;</div><div class='del'>-		interrupts = &lt;37&gt;, &lt;38&gt;, &lt;39&gt;, &lt;40&gt;, &lt;5&gt;, &lt;6&gt;;</div><div class='del'>-		clocks = &lt;&amp;coreclk 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- Armada XP:</div><div class='del'>-</div><div class='del'>-	timer {</div><div class='del'>-		compatible = "marvell,armada-xp-timer";</div><div class='del'>-		reg = &lt;0x20300 0x30&gt;, &lt;0x21040 0x30&gt;;</div><div class='del'>-		interrupts = &lt;37&gt;, &lt;38&gt;, &lt;39&gt;, &lt;40&gt;, &lt;5&gt;, &lt;6&gt;;</div><div class='del'>-		clocks = &lt;&amp;coreclk 2&gt;, &lt;&amp;refclk&gt;;</div><div class='del'>-		clock-names = "nbclk", "fixed";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt b/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt<br/>deleted file mode 100644<br/>index cd1a0c256f94..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/marvell,orion-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-Marvell Orion SoC timer</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: shall be "marvell,orion-timer"</div><div class='del'>-- reg: base address of the timer register starting with TIMERS CONTROL register</div><div class='del'>-- interrupts: should contain the interrupts for Timer0 and Timer1</div><div class='del'>-- clocks: phandle of timer reference clock (tclk)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	timer: timer {</div><div class='del'>-		compatible = "marvell,orion-timer";</div><div class='del'>-		reg = &lt;0x20300 0x20&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;bridge_intc&gt;;</div><div class='del'>-		interrupts = &lt;1&gt;, &lt;2&gt;;</div><div class='del'>-		clocks = &lt;&amp;core_clk 0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml b/Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml<br/>new file mode 100644<br/>index 000000000000..f973afffa5ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/marvell,orion-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Orion SoC timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Gregory Clement &lt;gregory.clement@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,orion-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Timer0 interrupt</div><div class='add'>+      - description: Timer1 interrupt</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@20300 {</div><div class='add'>+        compatible = "marvell,orion-timer";</div><div class='add'>+        reg = &lt;0x20300 0x20&gt;;</div><div class='add'>+        interrupts = &lt;1&gt;, &lt;2&gt;;</div><div class='add'>+        clocks = &lt;&amp;core_clk 0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/nxp,s32g2-stm.yaml b/Documentation/devicetree/bindings/timer/nxp,s32g2-stm.yaml<br/>new file mode 100644<br/>index 000000000000..b44b9794bb85<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/nxp,s32g2-stm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/nxp,s32g2-stm.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/nxp,s32g2-stm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP System Timer Module (STM)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Daniel Lezcano &lt;daniel.lezcano@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The System Timer Module supports commonly required system and application</div><div class='add'>+  software timing functions. STM includes a 32-bit count-up timer and four</div><div class='add'>+  32-bit compare channels with a separate interrupt source for each channel.</div><div class='add'>+  The timer is driven by the STM module clock divided by an 8-bit prescale</div><div class='add'>+  value.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nxp,s32g2-stm</div><div class='add'>+      - items:</div><div class='add'>+          - const: nxp,s32g3-stm</div><div class='add'>+          - const: nxp,s32g2-stm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Counter clock</div><div class='add'>+      - description: Module clock</div><div class='add'>+      - description: Register clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: counter</div><div class='add'>+      - const: module</div><div class='add'>+      - const: register</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@4011c000 {</div><div class='add'>+        compatible = "nxp,s32g2-stm";</div><div class='add'>+        reg = &lt;0x4011c000 0x3000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks 0x3b&gt;, &lt;&amp;clks 0x3c&gt;, &lt;&amp;clks 0x3c&gt;;</div><div class='add'>+        clock-names = "counter", "module", "register";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml<br/>index 891cca009528..6b80b060672e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml</a></div><div class='hunk'>@@ -18,9 +18,14 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - nxp,imx95-sysctr-timer</div><div class='del'>-      - nxp,sysctr-timer</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nxp,imx95-sysctr-timer</div><div class='add'>+          - nxp,sysctr-timer</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nxp,imx94-sysctr-timer</div><div class='add'>+          - const: nxp,imx95-sysctr-timer</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,ostm.yaml b/Documentation/devicetree/bindings/timer/renesas,ostm.yaml<br/>index 9ba858f094ab..0983c1efec80 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a></div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>           - renesas,r9a07g043-ostm # RZ/G2UL and RZ/Five</div><div class='ctx'>           - renesas,r9a07g044-ostm # RZ/G2{L,LC}</div><div class='ctx'>           - renesas,r9a07g054-ostm # RZ/V2L</div><div class='add'>+          - renesas,r9a09g056-ostm # RZ/V2N</div><div class='ctx'>           - renesas,r9a09g057-ostm # RZ/V2H(P)</div><div class='ctx'>       - const: renesas,ostm        # Generic</div><div class='ctx'> </div><div class='hunk'>@@ -54,12 +55,11 @@ required:</div><div class='ctx'> if:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - renesas,r9a07g043-ostm</div><div class='del'>-          - renesas,r9a07g044-ostm</div><div class='del'>-          - renesas,r9a07g054-ostm</div><div class='del'>-          - renesas,r9a09g057-ostm</div><div class='add'>+      not:</div><div class='add'>+        contains:</div><div class='add'>+          enum:</div><div class='add'>+            - renesas,r7s72100-ostm</div><div class='add'>+            - renesas,r7s9210-ostm</div><div class='ctx'> then:</div><div class='ctx'>   required:</div><div class='ctx'>     - resets</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,tpu.yaml b/Documentation/devicetree/bindings/timer/renesas,tpu.yaml<br/>deleted file mode 100644<br/>index 7a473b302775..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/renesas,tpu.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/renesas,tpu.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,56 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/timer/renesas,tpu.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Renesas H8/300 Timer Pulse Unit</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  The TPU is a 16bit timer/counter with configurable clock inputs and</div><div class='del'>-  programmable compare match.</div><div class='del'>-  This implementation supports only cascade mode.</div><div class='del'>-</div><div class='del'>-select:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: renesas,tpu</div><div class='del'>-    '#pwm-cells': false</div><div class='del'>-  required:</div><div class='del'>-    - compatible</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: renesas,tpu</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    items:</div><div class='del'>-      - description: First channel</div><div class='del'>-      - description: Second channel</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    const: fck</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    tpu: tpu@ffffe0 {</div><div class='del'>-        compatible = "renesas,tpu";</div><div class='del'>-        reg = &lt;0xffffe0 16&gt;, &lt;0xfffff0 12&gt;;</div><div class='del'>-        clocks = &lt;&amp;pclk&gt;;</div><div class='del'>-        clock-names = "fck";</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml<br/>index 653e2e0ca878..d85a1a088b35 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/sifive,clint.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/sifive,clint.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/sifive,clint.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/sifive,clint.yaml</a></div><div class='hunk'>@@ -30,6 +30,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - canaan,k210-clint       # Canaan Kendryte K210</div><div class='add'>+              - eswin,eic7700-clint     # ESWIN EIC7700</div><div class='ctx'>               - sifive,fu540-c000-clint # SiFive FU540</div><div class='ctx'>               - spacemit,k1-clint       # SpacemiT K1</div><div class='ctx'>               - starfive,jh7100-clint   # StarFive JH7100</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer.txt<br/>deleted file mode 100644<br/>index b02ab0af10ce..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/snps,arc-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,arc-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-Synopsys ARC Local Timer with Interrupt Capabilities</div><div class='del'>-- Found on all ARC CPUs (ARC700/ARCHS)</div><div class='del'>-- Can be optionally programmed to interrupt on Limit</div><div class='del'>-- Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically</div><div class='del'>-  TIMER0 used as clockevent provider (true for all ARC cores)</div><div class='del'>-  TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "snps,arc-timer"</div><div class='del'>-- interrupts : single Interrupt going into parent intc</div><div class='del'>-	       (16 for ARCHS cores, 3 for ARC700 cores)</div><div class='del'>-- clocks     : phandle to the source clock</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	timer0 {</div><div class='del'>-		compatible = "snps,arc-timer";</div><div class='del'>-		interrupts = &lt;3&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;core_intc&gt;;</div><div class='del'>-		clocks = &lt;&amp;core_clk&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	timer1 {</div><div class='del'>-		compatible = "snps,arc-timer";</div><div class='del'>-		clocks = &lt;&amp;core_clk&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer.yaml b/Documentation/devicetree/bindings/timer/snps,arc-timer.yaml<br/>new file mode 100644<br/>index 000000000000..0d1e37db6f8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/snps,arc-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/snps,arc-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/snps,arc-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys ARC Local Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vineet Gupta &lt;vgupta@synopsys.com&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  Synopsys ARC Local Timer with Interrupt Capabilities</div><div class='add'>+</div><div class='add'>+    - Found on all ARC CPUs (ARC700/ARCHS)</div><div class='add'>+    - Can be optionally programmed to interrupt on Limit</div><div class='add'>+    - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically</div><div class='add'>+      TIMER0 used as clockevent provider (true for all ARC cores)</div><div class='add'>+      TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS)</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,arc-timer</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: A single timer interrupt going into the parent interrupt controller.</div><div class='add'>+      Use &lt;16&gt; for ARCHS cores, &lt;3&gt; for ARC700 cores.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer0 {</div><div class='add'>+        compatible = "snps,arc-timer";</div><div class='add'>+        interrupts = &lt;3&gt;;</div><div class='add'>+        clocks = &lt;&amp;core_clk&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt<br/>deleted file mode 100644<br/>index b6cd1b3922de..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs</div><div class='del'>-- clocksource provider for SMP SoC</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "snps,archs-gfrc"</div><div class='del'>-- clocks     : phandle to the source clock</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	gfrc {</div><div class='del'>-		compatible = "snps,archs-gfrc";</div><div class='del'>-		clocks = &lt;&amp;core_clk&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.yaml b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.yaml<br/>new file mode 100644<br/>index 000000000000..fb16f4aba1c5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/snps,archs-gfrc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/snps,archs-gfrc.yaml</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/snps,archs-gfrc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vineet Gupta &lt;vgupta@synopsys.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,archs-gfrc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer {</div><div class='add'>+        compatible = "snps,archs-gfrc";</div><div class='add'>+        clocks = &lt;&amp;core_clk&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt<br/>deleted file mode 100644<br/>index 47bd7a702f3f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/snps,archs-rtc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs</div><div class='del'>-- clocksource provider for UP SoC</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "snps,archs-rtc"</div><div class='del'>-- clocks     : phandle to the source clock</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	rtc {</div><div class='del'>-		compatible = "snps,arc-rtc";</div><div class='del'>-		clocks = &lt;&amp;core_clk&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.yaml b/Documentation/devicetree/bindings/timer/snps,archs-rtc.yaml<br/>new file mode 100644<br/>index 000000000000..7478810eb24a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/snps,archs-rtc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/snps,archs-rtc.yaml</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/snps,archs-rtc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vineet Gupta &lt;vgupta@synopsys.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,archs-rtc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rtc {</div><div class='add'>+      compatible = "snps,archs-rtc";</div><div class='add'>+      clocks = &lt;&amp;core_clk&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.txt b/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.txt<br/>deleted file mode 100644<br/>index ac44c4b67530..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-Milbeaut SoCs Timer Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "socionext,milbeaut-timer".</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-- interrupts : The interrupt of the first timer.</div><div class='del'>-- clocks: phandle to the input clk.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer {</div><div class='del'>-	compatible = "socionext,milbeaut-timer";</div><div class='del'>-	reg = &lt;0x1e000050 0x20&gt;</div><div class='del'>-	interrupts = &lt;0 91 4&gt;;</div><div class='del'>-	clocks = &lt;&amp;clk 4&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.yaml b/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.yaml<br/>new file mode 100644<br/>index 000000000000..9ab72b762314<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/socionext,milbeaut-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Milbeaut SoCs Timer Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sugaya Taichi &lt;sugaya.taichi@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: socionext,milbeaut-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@1e000050 {</div><div class='add'>+        compatible = "socionext,milbeaut-timer";</div><div class='add'>+        reg = &lt;0x1e000050 0x20&gt;;</div><div class='add'>+        interrupts = &lt;0 91 4&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk 4&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/st,spear-timer.txt b/Documentation/devicetree/bindings/timer/st,spear-timer.txt<br/>deleted file mode 100644<br/>index b5238a07da17..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/st,spear-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/st,spear-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-* SPEAr ARM Timer</div><div class='del'>-</div><div class='del'>-** Timer node required properties:</div><div class='del'>-</div><div class='del'>-- compatible : Should be:</div><div class='del'>-	"st,spear-timer"</div><div class='del'>-- reg: Address range of the timer registers</div><div class='del'>-- interrupt: Should contain the timer interrupt number</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	timer@f0000000 {</div><div class='del'>-		compatible = "st,spear-timer";</div><div class='del'>-		reg = &lt;0xf0000000 0x400&gt;;</div><div class='del'>-		interrupts = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/st,spear-timer.yaml b/Documentation/devicetree/bindings/timer/st,spear-timer.yaml<br/>new file mode 100644<br/>index 000000000000..9f26b5f2b38a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/st,spear-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/st,spear-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/st,spear-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SPEAr ARM Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='add'>+  - Shiraz Hashim &lt;shiraz.linux.kernel@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,spear-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@f0000000 {</div><div class='add'>+        compatible = "st,spear-timer";</div><div class='add'>+        reg = &lt;0xf0000000 0x400&gt;;</div><div class='add'>+        interrupts = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml<br/>index 2e92bcdeb423..4ed30efe4052 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml</a></div><div class='hunk'>@@ -14,6 +14,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - sophgo,sg2042-aclint-mtimer</div><div class='add'>+          - sophgo,sg2044-aclint-mtimer</div><div class='ctx'>       - const: thead,c900-aclint-mtimer</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt<br/>deleted file mode 100644<br/>index d3905a5412b8..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/timer/ti,keystone-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-* Device tree bindings for Texas instruments Keystone timer</div><div class='del'>-</div><div class='del'>-This document provides bindings for the 64-bit timer in the KeyStone</div><div class='del'>-architecture devices. The timer can be configured as a general-purpose 64-bit</div><div class='del'>-timer, dual general-purpose 32-bit timers. When configured as dual 32-bit</div><div class='del'>-timers, each half can operate in conjunction (chain mode) or independently</div><div class='del'>-(unchained mode) of each other.</div><div class='del'>-</div><div class='del'>-It is global timer is a free running up-counter and can generate interrupt</div><div class='del'>-when the counter reaches preset counter values.</div><div class='del'>-</div><div class='del'>-Documentation:</div><div class='del'>-https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "ti,keystone-timer".</div><div class='del'>-- reg : specifies base physical address and count of the registers.</div><div class='del'>-- interrupts : interrupt generated by the timer.</div><div class='del'>-- clocks : the clock feeding the timer clock.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer@22f0000 {</div><div class='del'>-	compatible = "ti,keystone-timer";</div><div class='del'>-	reg = &lt;0x022f0000 0x80&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 110 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	clocks = &lt;&amp;clktimer15&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ti,keystone-timer.yaml b/Documentation/devicetree/bindings/timer/ti,keystone-timer.yaml<br/>new file mode 100644<br/>index 000000000000..1caf5ce64f01<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/timer/ti,keystone-timer.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/timer/ti,keystone-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ti,keystone-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI Keystone timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander A. Klimov &lt;grandmaster@al2klimov.de&gt;</div><div class='add'>+  - Ivan Khoronzhuk &lt;ivan.khoronzhuk@ti.com&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  A 64-bit timer in the KeyStone architecture devices. The timer can be</div><div class='add'>+  configured as a general-purpose 64-bit timer, dual general-purpose 32-bit</div><div class='add'>+  timers. When configured as dual 32-bit timers, each half can operate in</div><div class='add'>+  conjunction (chain mode) or independently (unchained mode) of each other.</div><div class='add'>+</div><div class='add'>+  It is global timer is a free running up-counter and can generate interrupt</div><div class='add'>+  when the counter reaches preset counter values.</div><div class='add'>+</div><div class='add'>+  Documentation:</div><div class='add'>+  https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,keystone-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: irq</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: timer</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@22f0000 {</div><div class='add'>+        compatible = "ti,keystone-timer";</div><div class='add'>+        reg = &lt;0x022f0000 0x80&gt;;</div><div class='add'>+        interrupts = &lt;110 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        clocks = &lt;&amp;clktimer15&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml<br/>index 8da408107e55..6a49e8efc0f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/trivial-devices.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/trivial-devices.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/trivial-devices.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/trivial-devices.yaml</a></div><div class='hunk'>@@ -173,6 +173,8 @@ properties:</div><div class='ctx'>           - maxim,ds3502</div><div class='ctx'>             # Temperature Sensor, I2C interface</div><div class='ctx'>           - maxim,max1619</div><div class='add'>+            # Digital temperature sensor with 0.1°C accuracy</div><div class='add'>+          - maxim,max30208</div><div class='ctx'>             # 3-Channel Remote Temperature Sensor</div><div class='ctx'>           - maxim,max31730</div><div class='ctx'>             # 10-bit 10 kOhm linear programmable voltage divider</div><div class='hunk'>@@ -343,6 +345,8 @@ properties:</div><div class='ctx'>           - sensortek,stk8ba50</div><div class='ctx'>             # SGX Sensortech VZ89X Sensors</div><div class='ctx'>           - sgx,vz89x</div><div class='add'>+            # SGX Sensortech VZ89TE Sensors</div><div class='add'>+          - sgx,vz89te</div><div class='ctx'>             # Silicon Labs EM3581 Zigbee SoC with SPI interface</div><div class='ctx'>           - silabs,em3581</div><div class='ctx'>             # Silicon Labs SI3210 Programmable CMOS SLIC/CODEC with SPI interface</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml<br/>index a03fff5df5ef..6c6043d9809e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/ufs/qcom,ufs.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/ufs/qcom,ufs.yaml</a></div><div class='hunk'>@@ -43,6 +43,7 @@ properties:</div><div class='ctx'>           - qcom,sm8450-ufshc</div><div class='ctx'>           - qcom,sm8550-ufshc</div><div class='ctx'>           - qcom,sm8650-ufshc</div><div class='add'>+          - qcom,sm8750-ufshc</div><div class='ctx'>       - const: qcom,ufshc</div><div class='ctx'>       - const: jedec,ufs-2.0</div><div class='ctx'> </div><div class='hunk'>@@ -158,6 +159,7 @@ allOf:</div><div class='ctx'>               - qcom,sm8450-ufshc</div><div class='ctx'>               - qcom,sm8550-ufshc</div><div class='ctx'>               - qcom,sm8650-ufshc</div><div class='add'>+              - qcom,sm8750-ufshc</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml<br/>index b5843f4d17d8..36f5c644d959 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml</a></div><div class='hunk'>@@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Xilinx SuperSpeed DWC3 USB SoC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;</div><div class='ctx'>   - Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -27,6 +26,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='ctx'>   power-domains:</div><div class='ctx'>     description: specifies a phandle to PM domain provider node</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml b/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml<br/>index e2a72deae776..c68c04da3399 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/usb/microchip,usb5744.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/usb/microchip,usb5744.yaml</a></div><div class='hunk'>@@ -17,7 +17,6 @@ description:</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='del'>-  - Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;</div><div class='ctx'>   - Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml b/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml<br/>index a7f75fe36665..f295aa9d9ee7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/usb/xlnx,usb2.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/usb/xlnx,usb2.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/usb/xlnx,usb2.yaml</a></div><div class='hunk'>@@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Xilinx udc controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mubin Sayyed &lt;mubin.sayyed@amd.com&gt;</div><div class='ctx'>   - Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml<br/>index 86f6a19b28ae..55b6139d5e04 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/vendor-prefixes.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/vendor-prefixes.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a></div><div class='hunk'>@@ -129,6 +129,8 @@ patternProperties:</div><div class='ctx'>     description: Andes Technology Corporation</div><div class='ctx'>   "^anvo,.*":</div><div class='ctx'>     description: Anvo-Systems Dresden GmbH</div><div class='add'>+  "^aoly,.*":</div><div class='add'>+    description: Shenzhen Aoly Technology Co., Ltd.</div><div class='ctx'>   "^aosong,.*":</div><div class='ctx'>     description: Guangzhou Aosong Electronic Co., Ltd.</div><div class='ctx'>   "^apm,.*":</div><div class='hunk'>@@ -432,6 +434,8 @@ patternProperties:</div><div class='ctx'>     description: EBV Elektronik</div><div class='ctx'>   "^eckelmann,.*":</div><div class='ctx'>     description: Eckelmann AG</div><div class='add'>+  "^econet,.*":</div><div class='add'>+    description: EcoNet (HK) Limited</div><div class='ctx'>   "^edgeble,.*":</div><div class='ctx'>     description: Edgeble AI Technologies Pvt. Ltd.</div><div class='ctx'>   "^edimax,.*":</div><div class='hunk'>@@ -1158,6 +1162,8 @@ patternProperties:</div><div class='ctx'>     description: Parallax Inc.</div><div class='ctx'>   "^pda,.*":</div><div class='ctx'>     description: Precision Design Associates, Inc.</div><div class='add'>+  "^pegatron,.*":</div><div class='add'>+    description: Pegatron Corporation</div><div class='ctx'>   "^pericom,.*":</div><div class='ctx'>     description: Pericom Technology Inc.</div><div class='ctx'>   "^pervasive,.*":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/virtio/pci-iommu.yaml b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml<br/>index 972a785a42de..8bd6ad72ac7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/virtio/pci-iommu.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/virtio/pci-iommu.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/virtio/pci-iommu.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/virtio/pci-iommu.yaml</a></div><div class='hunk'>@@ -20,6 +20,9 @@ description: |</div><div class='ctx'>   virtio-iommu node doesn't have an "iommus" property, and is omitted from</div><div class='ctx'>   the iommu-map property of the root complex.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-device.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   # If compatible is present, it should contain the vendor and device ID</div><div class='ctx'>   # according to the PCI Bus Binding specification. Since PCI provides</div><div class='hunk'>@@ -33,12 +36,7 @@ properties:</div><div class='ctx'>           - const: pci1af4,1057</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    description: |</div><div class='del'>-      PCI address of the IOMMU. As defined in the PCI Bus Binding</div><div class='del'>-      reference, the reg property is a five-cell address encoded as (phys.hi</div><div class='del'>-      phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's</div><div class='del'>-      BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be</div><div class='del'>-      zero. See Documentation/devicetree/bindings/pci/pci.txt</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   '#iommu-cells':</div><div class='ctx'>     const: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml<br/>index 0da953cb7127..8a6c3a75a547 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml</a></div><div class='hunk'>@@ -35,6 +35,7 @@ properties:</div><div class='ctx'>               - fsl,imx8mp-wdt</div><div class='ctx'>               - fsl,imx8mq-wdt</div><div class='ctx'>               - fsl,ls1012a-wdt</div><div class='add'>+              - fsl,ls1021a-wdt</div><div class='ctx'>               - fsl,ls1043a-wdt</div><div class='ctx'>               - fsl,vf610-wdt</div><div class='ctx'>           - const: fsl,imx21-wdt</div><div class='hunk'>@@ -102,6 +103,7 @@ allOf:</div><div class='ctx'>             contains:</div><div class='ctx'>               enum:</div><div class='ctx'>                 - fsl,ls1012a-wdt</div><div class='add'>+                - fsl,ls1021a-wdt</div><div class='ctx'>                 - fsl,ls1043a-wdt</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst<br/>index eb8ced400c7e..fc73072f12fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/writing-schema.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/bindings/writing-schema.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/bindings/writing-schema.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/bindings/writing-schema.rst</a></div><div class='hunk'>@@ -117,9 +117,14 @@ additionalProperties / unevaluatedProperties</div><div class='ctx'>       should be allowed.</div><div class='ctx'> </div><div class='ctx'>   * additionalProperties: true</div><div class='del'>-      Rare case, used for schemas implementing common set of properties. Such</div><div class='del'>-      schemas are supposed to be referenced by other schemas, which then use</div><div class='del'>-      'unevaluatedProperties: false'.  Typically bus or common-part schemas.</div><div class='add'>+      - Top-level part:</div><div class='add'>+        Rare case, used for schemas implementing common set of properties. Such</div><div class='add'>+        schemas are supposed to be referenced by other schemas, which then use</div><div class='add'>+        'unevaluatedProperties: false'.  Typically bus or common-part schemas.</div><div class='add'>+      - Nested node:</div><div class='add'>+        When listing only the expected compatible of the nested node and there</div><div class='add'>+        is an another schema matching that compatible which ends with one of</div><div class='add'>+        two above cases ('false').</div><div class='ctx'> </div><div class='ctx'> examples</div><div class='ctx'>   Optional. A list of one or more DTS hunks implementing this binding only.</div><div class='head'>diff --git a/Documentation/devicetree/overlay-notes.rst b/Documentation/devicetree/overlay-notes.rst<br/>index e139f22b363e..35e79242af9a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/devicetree/overlay-notes.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/devicetree/overlay-notes.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/devicetree/overlay-notes.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/devicetree/overlay-notes.rst</a></div><div class='hunk'>@@ -38,10 +38,10 @@ Lets take an example where we have a foo board with the following base tree::</div><div class='ctx'> 	};</div><div class='ctx'>     ---- foo.dts ---------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-The overlay bar.dts,</div><div class='add'>+The overlay bar.dtso,</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-    ---- bar.dts - overlay target location by label ----------------------------</div><div class='add'>+    ---- bar.dtso - overlay target location by label ---------------------------</div><div class='ctx'> 	/dts-v1/;</div><div class='ctx'> 	/plugin/;</div><div class='ctx'> 	&amp;ocp {</div><div class='hunk'>@@ -51,7 +51,7 @@ The overlay bar.dts,</div><div class='ctx'> 			... /* various properties and child nodes */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-    ---- bar.dts ---------------------------------------------------------------</div><div class='add'>+    ---- bar.dtso --------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> when loaded (and resolved as described in [1]) should result in foo+bar.dts::</div><div class='ctx'> </div><div class='hunk'>@@ -88,9 +88,9 @@ in the base DT. In this case, the target path can be provided. The target</div><div class='ctx'> location by label syntax is preferred because the overlay can be applied to</div><div class='ctx'> any base DT containing the label, no matter where the label occurs in the DT.</div><div class='ctx'> </div><div class='del'>-The above bar.dts example modified to use target path syntax is::</div><div class='add'>+The above bar.dtso example modified to use target path syntax is::</div><div class='ctx'> </div><div class='del'>-    ---- bar.dts - overlay target location by explicit path --------------------</div><div class='add'>+    ---- bar.dtso - overlay target location by explicit path -------------------</div><div class='ctx'> 	/dts-v1/;</div><div class='ctx'> 	/plugin/;</div><div class='ctx'> 	&amp;{/ocp} {</div><div class='hunk'>@@ -100,7 +100,7 @@ The above bar.dts example modified to use target path syntax is::</div><div class='ctx'> 			... /* various properties and child nodes */</div><div class='ctx'> 		}</div><div class='ctx'> 	};</div><div class='del'>-    ---- bar.dts ---------------------------------------------------------------</div><div class='add'>+    ---- bar.dtso --------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Overlay in-kernel API</div><div class='head'>diff --git a/Documentation/doc-guide/sphinx.rst b/Documentation/doc-guide/sphinx.rst<br/>index 8081ebfe48bc..5a91df105141 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/doc-guide/sphinx.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/doc-guide/sphinx.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/doc-guide/sphinx.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/doc-guide/sphinx.rst</a></div><div class='hunk'>@@ -28,7 +28,7 @@ Sphinx Install</div><div class='ctx'> ==============</div><div class='ctx'> </div><div class='ctx'> The ReST markups currently used by the Documentation/ files are meant to be</div><div class='del'>-built with ``Sphinx`` version 2.4.4 or higher.</div><div class='add'>+built with ``Sphinx`` version 3.4.3 or higher.</div><div class='ctx'> </div><div class='ctx'> There's a script that checks for the Sphinx requirements. Please see</div><div class='ctx'> :ref:`sphinx-pre-install` for further details.</div><div class='hunk'>@@ -42,12 +42,6 @@ with your distributions. In order to do so, it is recommended to install</div><div class='ctx'> Sphinx inside a virtual environment, using ``virtualenv-3``</div><div class='ctx'> or ``virtualenv``, depending on how your distribution packaged Python 3.</div><div class='ctx'> </div><div class='del'>-.. note::</div><div class='del'>-</div><div class='del'>-   #) It is recommended to use the RTD theme for html output. Depending</div><div class='del'>-      on the Sphinx version, it should be installed separately,</div><div class='del'>-      with ``pip install sphinx_rtd_theme``.</div><div class='del'>-</div><div class='ctx'> In summary, if you want to install the latest version of Sphinx, you</div><div class='ctx'> should do::</div><div class='ctx'> </div><div class='hunk'>@@ -162,6 +156,12 @@ By default, the "Alabaster" theme is used to build the HTML documentation;</div><div class='ctx'> this theme is bundled with Sphinx and need not be installed separately.</div><div class='ctx'> The Sphinx theme can be overridden by using the ``DOCS_THEME`` make variable.</div><div class='ctx'> </div><div class='add'>+.. note::</div><div class='add'>+</div><div class='add'>+   Some people might prefer to use the RTD theme for html output.</div><div class='add'>+   Depending on the Sphinx version, it should be installed separately,</div><div class='add'>+   with ``pip install sphinx_rtd_theme``.</div><div class='add'>+</div><div class='ctx'> There is another make variable ``SPHINXDIRS``, which is useful when test</div><div class='ctx'> building a subset of documentation.  For example, you can build documents</div><div class='ctx'> under ``Documentation/doc-guide`` by running</div><div class='head'>diff --git a/Documentation/driver-api/basics.rst b/Documentation/driver-api/basics.rst<br/>index d78b7c328ff7..5e9f7aee71a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/basics.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/basics.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/basics.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/basics.rst</a></div><div class='hunk'>@@ -108,6 +108,9 @@ Kernel objects manipulation</div><div class='ctx'> .. kernel-doc:: lib/kobject.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+.. kernel-doc:: lib/kobject_uevent.c</div><div class='add'>+   :export:</div><div class='add'>+</div><div class='ctx'> Kernel utility functions</div><div class='ctx'> ------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/coco/index.rst b/Documentation/driver-api/coco/index.rst<br/>new file mode 100644<br/>index 000000000000..af9f08ca0cfd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/coco/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/coco/index.rst</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+======================</div><div class='add'>+Confidential Computing</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   measurement-registers</div><div class='add'>+</div><div class='add'>+.. only::  subproject and html</div><div class='head'>diff --git a/Documentation/driver-api/coco/measurement-registers.rst b/Documentation/driver-api/coco/measurement-registers.rst<br/>new file mode 100644<br/>index 000000000000..962a44efa2c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/coco/measurement-registers.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/coco/measurement-registers.rst</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+=====================</div><div class='add'>+Measurement Registers</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/tsm-mr.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virt/coco/guest/tsm-mr.c</div><div class='add'>+   :export:</div><div class='head'>diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst<br/>index 3085f8b460fa..8f0910668ca3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/dmaengine/provider.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/dmaengine/provider.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/dmaengine/provider.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/dmaengine/provider.rst</a></div><div class='hunk'>@@ -217,10 +217,12 @@ Currently, the types available are:</div><div class='ctx'> </div><div class='ctx'> - DMA_ASYNC_TX</div><div class='ctx'> </div><div class='del'>-  - Must not be set by the device, and will be set by the framework</div><div class='del'>-    if needed</div><div class='add'>+  - The device supports asynchronous memory-to-memory operations,</div><div class='add'>+    including memcpy, memset, xor, pq, xor_val, and pq_val.</div><div class='ctx'> </div><div class='del'>-  - TODO: What is it about?</div><div class='add'>+  - This capability is automatically set by the DMA engine</div><div class='add'>+    framework and must not be configured manually by device</div><div class='add'>+    drivers.</div><div class='ctx'> </div><div class='ctx'> - DMA_SLAVE</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/early-userspace/buffer-format.rst b/Documentation/driver-api/early-userspace/buffer-format.rst<br/>index 7f74e301fdf3..726bfa2fe70d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/early-userspace/buffer-format.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/early-userspace/buffer-format.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/early-userspace/buffer-format.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/early-userspace/buffer-format.rst</a></div><div class='hunk'>@@ -4,20 +4,18 @@ initramfs buffer format</div><div class='ctx'> </div><div class='ctx'> Al Viro, H. Peter Anvin</div><div class='ctx'> </div><div class='del'>-Last revision: 2002-01-13</div><div class='del'>-</div><div class='del'>-Starting with kernel 2.5.x, the old "initial ramdisk" protocol is</div><div class='del'>-getting {replaced/complemented} with the new "initial ramfs"</div><div class='del'>-(initramfs) protocol.  The initramfs contents is passed using the same</div><div class='del'>-memory buffer protocol used by the initrd protocol, but the contents</div><div class='add'>+With kernel 2.5.x, the old "initial ramdisk" protocol was complemented</div><div class='add'>+with an "initial ramfs" protocol.  The initramfs content is passed</div><div class='add'>+using the same memory buffer protocol used by initrd, but the content</div><div class='ctx'> is different.  The initramfs buffer contains an archive which is</div><div class='del'>-expanded into a ramfs filesystem; this document details the format of</div><div class='del'>-the initramfs buffer format.</div><div class='add'>+expanded into a ramfs filesystem; this document details the initramfs</div><div class='add'>+buffer format.</div><div class='ctx'> </div><div class='ctx'> The initramfs buffer format is based around the "newc" or "crc" CPIO</div><div class='ctx'> formats, and can be created with the cpio(1) utility.  The cpio</div><div class='del'>-archive can be compressed using gzip(1).  One valid version of an</div><div class='del'>-initramfs buffer is thus a single .cpio.gz file.</div><div class='add'>+archive can be compressed using gzip(1), or any other algorithm provided</div><div class='add'>+via CONFIG_DECOMPRESS_*.  One valid version of an initramfs buffer is</div><div class='add'>+thus a single .cpio.gz file.</div><div class='ctx'> </div><div class='ctx'> The full format of the initramfs buffer is defined by the following</div><div class='ctx'> grammar, where::</div><div class='hunk'>@@ -25,12 +23,20 @@ grammar, where::</div><div class='ctx'> 	*	is used to indicate "0 or more occurrences of"</div><div class='ctx'> 	(|)	indicates alternatives</div><div class='ctx'> 	+	indicates concatenation</div><div class='del'>-	GZIP()	indicates the gzip(1) of the operand</div><div class='add'>+	GZIP()	indicates gzip compression of the operand</div><div class='add'>+	BZIP2()	indicates bzip2 compression of the operand</div><div class='add'>+	LZMA()	indicates lzma compression of the operand</div><div class='add'>+	XZ()	indicates xz compression of the operand</div><div class='add'>+	LZO()	indicates lzo compression of the operand</div><div class='add'>+	LZ4()	indicates lz4 compression of the operand</div><div class='add'>+	ZSTD()	indicates zstd compression of the operand</div><div class='ctx'> 	ALGN(n)	means padding with null bytes to an n-byte boundary</div><div class='ctx'> </div><div class='del'>-	initramfs  := ("\0" | cpio_archive | cpio_gzip_archive)*</div><div class='add'>+	initramfs := ("\0" | cpio_archive | cpio_compressed_archive)*</div><div class='ctx'> </div><div class='del'>-	cpio_gzip_archive := GZIP(cpio_archive)</div><div class='add'>+	cpio_compressed_archive := (GZIP(cpio_archive) | BZIP2(cpio_archive)</div><div class='add'>+		| LZMA(cpio_archive) | XZ(cpio_archive) | LZO(cpio_archive)</div><div class='add'>+		| LZ4(cpio_archive) | ZSTD(cpio_archive))</div><div class='ctx'> </div><div class='ctx'> 	cpio_archive := cpio_file* + (&lt;nothing&gt; | cpio_trailer)</div><div class='ctx'> </div><div class='hunk'>@@ -75,6 +81,8 @@ c_chksum      8 bytes		 Checksum of data field if c_magic is 070702;</div><div class='ctx'> The c_mode field matches the contents of st_mode returned by stat(2)</div><div class='ctx'> on Linux, and encodes the file type and file permissions.</div><div class='ctx'> </div><div class='add'>+c_mtime is ignored unless CONFIG_INITRAMFS_PRESERVE_MTIME=y is set.</div><div class='add'>+</div><div class='ctx'> The c_filesize should be zero for any file which is not a regular file</div><div class='ctx'> or symlink.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/gpio/index.rst b/Documentation/driver-api/gpio/index.rst<br/>index 34b57cee3391..43f6a3afe10b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/gpio/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/gpio/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/gpio/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/gpio/index.rst</a></div><div class='hunk'>@@ -27,7 +27,7 @@ Core</div><div class='ctx'> ACPI support</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpio/gpiolib-acpi.c</div><div class='add'>+.. kernel-doc:: drivers/gpio/gpiolib-acpi-core.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Device tree support</div><div class='head'>diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst<br/>index 16e2c4ec3c01..3e2a270bd828 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/index.rst</a></div><div class='hunk'>@@ -81,6 +81,7 @@ Subsystem-specific APIs</div><div class='ctx'>    acpi/index</div><div class='ctx'>    backlight/lp855x-driver.rst</div><div class='ctx'>    clk</div><div class='add'>+   coco/index</div><div class='ctx'>    console</div><div class='ctx'>    crypto/index</div><div class='ctx'>    dmaengine/index</div><div class='head'>diff --git a/Documentation/driver-api/ipmi.rst b/Documentation/driver-api/ipmi.rst<br/>index dfa021eacd63..2cc6c898ab90 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/ipmi.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/ipmi.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/ipmi.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/ipmi.rst</a></div><div class='hunk'>@@ -45,7 +45,7 @@ manual), choose the 'IPMI SI handler' option.  A driver also exists</div><div class='ctx'> for direct I2C access to the IPMI management controller.  Some boards</div><div class='ctx'> support this, but it is unknown if it will work on every board.  For</div><div class='ctx'> this, choose 'IPMI SMBus handler', but be ready to try to do some</div><div class='del'>-figuring to see if it will work on your system if the SMBIOS/APCI</div><div class='add'>+figuring to see if it will work on your system if the SMBIOS/ACPI</div><div class='ctx'> information is wrong or not present.  It is fairly safe to have both</div><div class='ctx'> these enabled and let the drivers auto-detect what is present.</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +63,7 @@ situation, you need to read the section below named 'The SI Driver' or</div><div class='ctx'> IPMI defines a standard watchdog timer.  You can enable this with the</div><div class='ctx'> 'IPMI Watchdog Timer' config option.  If you compile the driver into</div><div class='ctx'> the kernel, then via a kernel command-line option you can have the</div><div class='del'>-watchdog timer start as soon as it initializes.  It also have a lot</div><div class='add'>+watchdog timer start as soon as it initializes.  It also has a lot</div><div class='ctx'> of other options, see the 'Watchdog' section below for more details.</div><div class='ctx'> Note that you can also have the watchdog continue to run if it is</div><div class='ctx'> closed (by default it is disabled on close).  Go into the 'Watchdog</div><div class='hunk'>@@ -280,10 +280,8 @@ Creating the User</div><div class='ctx'> To use the message handler, you must first create a user using</div><div class='ctx'> ipmi_create_user.  The interface number specifies which SMI you want</div><div class='ctx'> to connect to, and you must supply callback functions to be called</div><div class='del'>-when data comes in.  The callback function can run at interrupt level,</div><div class='del'>-so be careful using the callbacks.  This also allows to you pass in a</div><div class='del'>-piece of data, the handler_data, that will be passed back to you on</div><div class='del'>-all calls.</div><div class='add'>+when data comes in.  This also allows to you pass in a piece of data,</div><div class='add'>+the handler_data, that will be passed back to you on all calls.</div><div class='ctx'> </div><div class='ctx'> Once you are done, call ipmi_destroy_user() to get rid of the user.</div><div class='ctx'> </div><div class='hunk'>@@ -303,8 +301,7 @@ use it for anything you like.</div><div class='ctx'> </div><div class='ctx'> Responses come back in the function pointed to by the ipmi_recv_hndl</div><div class='ctx'> field of the "handler" that you passed in to ipmi_create_user().</div><div class='del'>-Remember again, these may be running at interrupt level.  Remember to</div><div class='del'>-look at the receive type, too.</div><div class='add'>+Remember to look at the receive type, too.</div><div class='ctx'> </div><div class='ctx'> From userland, you fill out an ipmi_req_t structure and use the</div><div class='ctx'> IPMICTL_SEND_COMMAND ioctl.  For incoming stuff, you can use select()</div><div class='hunk'>@@ -317,13 +314,13 @@ This gives the receiver a place to actually put the message.</div><div class='ctx'> </div><div class='ctx'> If the message cannot fit into the data you provide, you will get an</div><div class='ctx'> EMSGSIZE error and the driver will leave the data in the receive</div><div class='del'>-queue.  If you want to get it and have it truncate the message, us</div><div class='add'>+queue.  If you want to get it and have it truncate the message, use</div><div class='ctx'> the IPMICTL_RECEIVE_MSG_TRUNC ioctl.</div><div class='ctx'> </div><div class='ctx'> When you send a command (which is defined by the lowest-order bit of</div><div class='ctx'> the netfn per the IPMI spec) on the IPMB bus, the driver will</div><div class='ctx'> automatically assign the sequence number to the command and save the</div><div class='del'>-command.  If the response is not receive in the IPMI-specified 5</div><div class='add'>+command.  If the response is not received in the IPMI-specified 5</div><div class='ctx'> seconds, it will generate a response automatically saying the command</div><div class='ctx'> timed out.  If an unsolicited response comes in (if it was after 5</div><div class='ctx'> seconds, for instance), that response will be ignored.</div><div class='hunk'>@@ -367,7 +364,7 @@ channel bitmasks do not overlap.</div><div class='ctx'> </div><div class='ctx'> To respond to a received command, set the response bit in the returned</div><div class='ctx'> netfn, use the address from the received message, and use the same</div><div class='del'>-msgid that you got in the receive message.</div><div class='add'>+msgid that you got in the received message.</div><div class='ctx'> </div><div class='ctx'> From userland, equivalent IOCTLs are provided to do these functions.</div><div class='ctx'> </div><div class='hunk'>@@ -440,7 +437,7 @@ register would be 0xca6.  This defaults to 1.</div><div class='ctx'> </div><div class='ctx'> The regsizes parameter gives the size of a register, in bytes.  The</div><div class='ctx'> data used by IPMI is 8-bits wide, but it may be inside a larger</div><div class='del'>-register.  This parameter allows the read and write type to specified.</div><div class='add'>+register.  This parameter allows the read and write type to be specified.</div><div class='ctx'> It may be 1, 2, 4, or 8.  The default is 1.</div><div class='ctx'> </div><div class='ctx'> Since the register size may be larger than 32 bits, the IPMI data may not</div><div class='hunk'>@@ -481,8 +478,8 @@ If your IPMI interface does not support interrupts and is a KCS or</div><div class='ctx'> SMIC interface, the IPMI driver will start a kernel thread for the</div><div class='ctx'> interface to help speed things up.  This is a low-priority kernel</div><div class='ctx'> thread that constantly polls the IPMI driver while an IPMI operation</div><div class='del'>-is in progress.  The force_kipmid module parameter will all the user to</div><div class='del'>-force this thread on or off.  If you force it off and don't have</div><div class='add'>+is in progress.  The force_kipmid module parameter will allow the user</div><div class='add'>+to force this thread on or off.  If you force it off and don't have</div><div class='ctx'> interrupts, the driver will run VERY slowly.  Don't blame me,</div><div class='ctx'> these interfaces suck.</div><div class='ctx'> </div><div class='hunk'>@@ -583,7 +580,7 @@ kernel command line as::</div><div class='ctx'> These are the same options as on the module command line.</div><div class='ctx'> </div><div class='ctx'> The I2C driver does not support non-blocking access or polling, so</div><div class='del'>-this driver cannod to IPMI panic events, extend the watchdog at panic</div><div class='add'>+this driver cannot do IPMI panic events, extend the watchdog at panic</div><div class='ctx'> time, or other panic-related IPMI functions without special kernel</div><div class='ctx'> patches and driver modifications.  You can get those at the openipmi</div><div class='ctx'> web page.</div><div class='hunk'>@@ -610,7 +607,7 @@ Parameters are::</div><div class='ctx'> 	ipmi_ipmb.retry_time_ms=&lt;Time between retries on IPMB&gt;</div><div class='ctx'> 	ipmi_ipmb.max_retries=&lt;Number of times to retry a message&gt;</div><div class='ctx'> </div><div class='del'>-Loading the module will not result in the driver automatcially</div><div class='add'>+Loading the module will not result in the driver automatically</div><div class='ctx'> starting unless there is device tree information setting it up.  If</div><div class='ctx'> you want to instantiate one of these by hand, do::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/ntb.rst b/Documentation/driver-api/ntb.rst<br/>index e991d92b8b1d..a49c41383779 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/ntb.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/ntb.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/ntb.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/ntb.rst</a></div><div class='hunk'>@@ -35,7 +35,7 @@ anyone who has written a pci driver.</div><div class='ctx'> NTB Typical client driver implementation</div><div class='ctx'> ----------------------------------------</div><div class='ctx'> </div><div class='del'>-Primary purpose of NTB is to share some peace of memory between at least two</div><div class='add'>+Primary purpose of NTB is to share some piece of memory between at least two</div><div class='ctx'> systems. So the NTB device features like Scratchpad/Message registers are</div><div class='ctx'> mainly used to perform the proper memory window initialization. Typically</div><div class='ctx'> there are two types of memory window interfaces supported by the NTB API:</div><div class='head'>diff --git a/Documentation/driver-api/thermal/intel_dptf.rst b/Documentation/driver-api/thermal/intel_dptf.rst<br/>index 8fb8c5b2d685..ec5769accae0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/thermal/intel_dptf.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/thermal/intel_dptf.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/thermal/intel_dptf.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/thermal/intel_dptf.rst</a></div><div class='hunk'>@@ -191,6 +191,27 @@ ABI.</div><div class='ctx'> 	User space can specify any one of the available workload type using</div><div class='ctx'> 	this interface.</div><div class='ctx'> </div><div class='add'>+:file:`/sys/bus/pci/devices/0000\:00\:04.0/ptc_0_control`</div><div class='add'>+:file:`/sys/bus/pci/devices/0000\:00\:04.0/ptc_1_control`</div><div class='add'>+:file:`/sys/bus/pci/devices/0000\:00\:04.0/ptc_2_control`</div><div class='add'>+</div><div class='add'>+All these controls needs admin privilege to update.</div><div class='add'>+</div><div class='add'>+``enable`` (RW)</div><div class='add'>+	1 for enable, 0 for disable. Shows the current enable status of</div><div class='add'>+	platform temperature control feature. User space can enable/disable</div><div class='add'>+	hardware controls.</div><div class='add'>+</div><div class='add'>+``temperature_target`` (RW)</div><div class='add'>+	Update a new temperature target in milli degree celsius for hardware to</div><div class='add'>+	use for the temperature control.</div><div class='add'>+</div><div class='add'>+Given that this is platform temperature control, it is expected that a</div><div class='add'>+single user-level manager owns and manages the controls. If multiple</div><div class='add'>+user-level software applications attempt to write different targets, it</div><div class='add'>+can lead to unexpected behavior.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> DPTF Processor thermal RFIM interface</div><div class='ctx'> --------------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/usb/usb.rst b/Documentation/driver-api/usb/usb.rst<br/>index 89f9c37bb979..976fb4221062 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/driver-api/usb/usb.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/driver-api/usb/usb.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/driver-api/usb/usb.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/driver-api/usb/usb.rst</a></div><div class='hunk'>@@ -161,6 +161,7 @@ rely on 64bit DMA to eliminate another kind of bounce buffer.</div><div class='ctx'> .. kernel-doc:: drivers/usb/core/urb.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+.. c:namespace:: usb_core</div><div class='ctx'> .. kernel-doc:: drivers/usb/core/message.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/bcachefs/casefolding.rst b/Documentation/filesystems/bcachefs/casefolding.rst<br/>index ba5de97d155f..871a38f557e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/bcachefs/casefolding.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/bcachefs/casefolding.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/bcachefs/casefolding.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/bcachefs/casefolding.rst</a></div><div class='hunk'>@@ -88,3 +88,21 @@ This would fail if negative dentry's were cached.</div><div class='ctx'> </div><div class='ctx'> This is slightly suboptimal, but could be fixed in future with some vfs work.</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+(from Peter Anvin, on the list)</div><div class='add'>+</div><div class='add'>+It is worth noting that Microsoft has basically declared their</div><div class='add'>+"recommended" case folding (upcase) table to be permanently frozen (for</div><div class='add'>+new filesystem instances in the case where they use an on-disk</div><div class='add'>+translation table created at format time.)  As far as I know they have</div><div class='add'>+never supported anything other than 1:1 conversion of BMP code points,</div><div class='add'>+nor normalization.</div><div class='add'>+</div><div class='add'>+The exFAT specification enumerates the full recommended upcase table,</div><div class='add'>+although in a somewhat annoying format (basically a hex dump of</div><div class='add'>+compressed data):</div><div class='add'>+</div><div class='add'>+https://learn.microsoft.com/en-us/windows/win32/fileio/exfat-specification</div><div class='head'>diff --git a/Documentation/filesystems/bcachefs/future/idle_work.rst b/Documentation/filesystems/bcachefs/future/idle_work.rst<br/>new file mode 100644<br/>index 000000000000..59a332509dcd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/bcachefs/future/idle_work.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/bcachefs/future/idle_work.rst</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+Idle/background work classes design doc:</div><div class='add'>+</div><div class='add'>+Right now, our behaviour at idle isn't ideal, it was designed for servers that</div><div class='add'>+would be under sustained load, to keep pending work at a "medium" level, to</div><div class='add'>+let work build up so we can process it in more efficient batches, while also</div><div class='add'>+giving headroom for bursts in load.</div><div class='add'>+</div><div class='add'>+But for desktops or mobile - scenarios where work is less sustained and power</div><div class='add'>+usage is more important - we want to operate differently, with a "rush to</div><div class='add'>+idle" so the system can go to sleep. We don't want to be dribbling out</div><div class='add'>+background work while the system should be idle.</div><div class='add'>+</div><div class='add'>+The complicating factor is that there are a number of background tasks, which</div><div class='add'>+form a heirarchy (or a digraph, depending on how you divide it up) - one</div><div class='add'>+background task may generate work for another.</div><div class='add'>+</div><div class='add'>+Thus proper idle detection needs to model this heirarchy.</div><div class='add'>+</div><div class='add'>+- Foreground writes</div><div class='add'>+- Page cache writeback</div><div class='add'>+- Copygc, rebalance</div><div class='add'>+- Journal reclaim</div><div class='add'>+</div><div class='add'>+When we implement idle detection and rush to idle, we need to be careful not</div><div class='add'>+to disturb too much the existing behaviour that works reasonably well when the</div><div class='add'>+system is under sustained load (or perhaps improve it in the case of</div><div class='add'>+rebalance, which currently does not actively attempt to let work batch up).</div><div class='add'>+</div><div class='add'>+SUSTAINED LOAD REGIME</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+When the system is under continuous load, we want these jobs to run</div><div class='add'>+continuously - this is perhaps best modelled with a P/D controller, where</div><div class='add'>+they'll be trying to keep a target value (i.e. fragmented disk space,</div><div class='add'>+available journal space) roughly in the middle of some range.</div><div class='add'>+</div><div class='add'>+The goal under sustained load is to balance our ability to handle load spikes</div><div class='add'>+without running out of x resource (free disk space, free space in the</div><div class='add'>+journal), while also letting some work accumululate to be batched (or become</div><div class='add'>+unnecessary).</div><div class='add'>+</div><div class='add'>+For example, we don't want to run copygc too aggressively, because then it</div><div class='add'>+will be evacuating buckets that would have become empty (been overwritten or</div><div class='add'>+deleted) anyways, and we don't want to wait until we're almost out of free</div><div class='add'>+space because then the system will behave unpredicably - suddenly we're doing</div><div class='add'>+a lot more work to service each write and the system becomes much slower.</div><div class='add'>+</div><div class='add'>+IDLE REGIME</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+When the system becomes idle, we should start flushing our pending work</div><div class='add'>+quicker so the system can go to sleep.</div><div class='add'>+</div><div class='add'>+Note that the definition of "idle" depends on where in the heirarchy a task</div><div class='add'>+is - a task should start flushing work more quickly when the task above it has</div><div class='add'>+stopped generating new work.</div><div class='add'>+</div><div class='add'>+e.g. rebalance should start flushing more quickly when page cache writeback is</div><div class='add'>+idle, and journal reclaim should only start flushing more quickly when both</div><div class='add'>+copygc and rebalance are idle.</div><div class='add'>+</div><div class='add'>+It's important to let work accumulate when more work is still incoming and we</div><div class='add'>+still have room, because flushing is always more efficient if we let it batch</div><div class='add'>+up. New writes may overwrite data before rebalance moves it, and tasks may be</div><div class='add'>+generating more updates for the btree nodes that journal reclaim needs to flush.</div><div class='add'>+</div><div class='add'>+On idle, how much work we do at each interval should be proportional to the</div><div class='add'>+length of time we have been idle for. If we're idle only for a short duration,</div><div class='add'>+we shouldn't flush everything right away; the system might wake up and start</div><div class='add'>+generating new work soon, and flushing immediately might end up doing a lot of</div><div class='add'>+work that would have been unnecessary if we'd allowed things to batch more.</div><div class='add'>+ </div><div class='add'>+To summarize, we will need:</div><div class='add'>+</div><div class='add'>+ - A list of classes for background tasks that generate work, which will</div><div class='add'>+   include one "foreground" class.</div><div class='add'>+ - Tracking for each class - "Am I doing work, or have I gone to sleep?"</div><div class='add'>+ - And each class should check the class above it when deciding how much work to issue.</div><div class='head'>diff --git a/Documentation/filesystems/bcachefs/index.rst b/Documentation/filesystems/bcachefs/index.rst<br/>index 3864d0ae89c1..e5c4c2120b93 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/bcachefs/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/bcachefs/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/bcachefs/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/bcachefs/index.rst</a></div><div class='hunk'>@@ -29,3 +29,10 @@ At this moment, only a few of these are described here.</div><div class='ctx'> </div><div class='ctx'>    casefolding</div><div class='ctx'>    errorcodes</div><div class='add'>+</div><div class='add'>+Future design</div><div class='add'>+-------------</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   future/idle_work</div><div class='head'>diff --git a/Documentation/filesystems/debugfs.rst b/Documentation/filesystems/debugfs.rst<br/>index 610f718ef8b5..55f807293924 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/debugfs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/debugfs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/debugfs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/debugfs.rst</a></div><div class='hunk'>@@ -229,22 +229,15 @@ module is unloaded without explicitly removing debugfs entries, the result</div><div class='ctx'> will be a lot of stale pointers and no end of highly antisocial behavior.</div><div class='ctx'> So all debugfs users - at least those which can be built as modules - must</div><div class='ctx'> be prepared to remove all files and directories they create there.  A file</div><div class='del'>-can be removed with::</div><div class='add'>+or directory can be removed with::</div><div class='ctx'> </div><div class='ctx'>     void debugfs_remove(struct dentry *dentry);</div><div class='ctx'> </div><div class='ctx'> The dentry value can be NULL or an error value, in which case nothing will</div><div class='del'>-be removed.</div><div class='del'>-</div><div class='del'>-Once upon a time, debugfs users were required to remember the dentry</div><div class='del'>-pointer for every debugfs file they created so that all files could be</div><div class='del'>-cleaned up.  We live in more civilized times now, though, and debugfs users</div><div class='del'>-can call::</div><div class='del'>-</div><div class='del'>-    void debugfs_remove_recursive(struct dentry *dentry);</div><div class='del'>-</div><div class='del'>-If this function is passed a pointer for the dentry corresponding to the</div><div class='del'>-top-level directory, the entire hierarchy below that directory will be</div><div class='del'>-removed.</div><div class='add'>+be removed.  Note that this function will recursively remove all files and</div><div class='add'>+directories underneath it.  Previously, debugfs_remove_recursive() was used</div><div class='add'>+to perform that task, but this function is now just an alias to</div><div class='add'>+debugfs_remove().  debugfs_remove_recursive() should be considered</div><div class='add'>+deprecated.</div><div class='ctx'> </div><div class='ctx'> .. [1] http://lwn.net/Articles/309298/</div><div class='head'>diff --git a/Documentation/filesystems/erofs.rst b/Documentation/filesystems/erofs.rst<br/>index c293f8e37468..7ddb235aee9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/erofs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/erofs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/erofs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/erofs.rst</a></div><div class='hunk'>@@ -128,6 +128,7 @@ device=%s              Specify a path to an extra device to be used together.</div><div class='ctx'> fsid=%s                Specify a filesystem image ID for Fscache back-end.</div><div class='ctx'> domain_id=%s           Specify a domain ID in fscache mode so that different images</div><div class='ctx'>                        with the same blobs under a given domain ID can share storage.</div><div class='add'>+fsoffset=%llu          Specify block-aligned filesystem offset for the primary device.</div><div class='ctx'> ===================    =========================================================</div><div class='ctx'> </div><div class='ctx'> Sysfs Entries</div><div class='head'>diff --git a/Documentation/filesystems/ext4/atomic_writes.rst b/Documentation/filesystems/ext4/atomic_writes.rst<br/>new file mode 100644<br/>index 000000000000..f65767df3620<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/ext4/atomic_writes.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/ext4/atomic_writes.rst</a></div><div class='hunk'>@@ -0,0 +1,225 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+.. _atomic_writes:</div><div class='add'>+</div><div class='add'>+Atomic Block Writes</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Atomic (untorn) block writes ensure that either the entire write is committed</div><div class='add'>+to disk or none of it is. This prevents "torn writes" during power loss or</div><div class='add'>+system crashes. The ext4 filesystem supports atomic writes (only with Direct</div><div class='add'>+I/O) on regular files with extents, provided the underlying storage device</div><div class='add'>+supports hardware atomic writes. This is supported in the following two ways:</div><div class='add'>+</div><div class='add'>+1. **Single-fsblock Atomic Writes**:</div><div class='add'>+   EXT4's supports atomic write operations with a single filesystem block since</div><div class='add'>+   v6.13. In this the atomic write unit minimum and maximum sizes are both set</div><div class='add'>+   to filesystem blocksize.</div><div class='add'>+   e.g. doing atomic write of 16KB with 16KB filesystem blocksize on 64KB</div><div class='add'>+   pagesize system is possible.</div><div class='add'>+</div><div class='add'>+2. **Multi-fsblock Atomic Writes with Bigalloc**:</div><div class='add'>+   EXT4 now also supports atomic writes spanning multiple filesystem blocks</div><div class='add'>+   using a feature known as bigalloc. The atomic write unit's minimum and</div><div class='add'>+   maximum sizes are determined by the filesystem block size and cluster size,</div><div class='add'>+   based on the underlying device’s supported atomic write unit limits.</div><div class='add'>+</div><div class='add'>+Requirements</div><div class='add'>+~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Basic requirements for atomic writes in ext4:</div><div class='add'>+</div><div class='add'>+ 1. The extents feature must be enabled (default for ext4)</div><div class='add'>+ 2. The underlying block device must support atomic writes</div><div class='add'>+ 3. For single-fsblock atomic writes:</div><div class='add'>+</div><div class='add'>+    1. A filesystem with appropriate block size (up to the page size)</div><div class='add'>+ 4. For multi-fsblock atomic writes:</div><div class='add'>+</div><div class='add'>+    1. The bigalloc feature must be enabled</div><div class='add'>+    2. The cluster size must be appropriately configured</div><div class='add'>+</div><div class='add'>+NOTE: EXT4 does not support software or COW based atomic write, which means</div><div class='add'>+atomic writes on ext4 are only supported if underlying storage device supports</div><div class='add'>+it.</div><div class='add'>+</div><div class='add'>+Multi-fsblock Implementation Details</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The bigalloc feature changes ext4 to allocate in units of multiple filesystem</div><div class='add'>+blocks, also known as clusters. With bigalloc each bit within block bitmap</div><div class='add'>+represents cluster (power of 2 number of blocks) rather than individual</div><div class='add'>+filesystem blocks.</div><div class='add'>+EXT4 supports multi-fsblock atomic writes with bigalloc, subject to the</div><div class='add'>+following constraints. The minimum atomic write size is the larger of the fs</div><div class='add'>+block size and the minimum hardware atomic write unit; and the maximum atomic</div><div class='add'>+write size is smaller of the bigalloc cluster size and the maximum hardware</div><div class='add'>+atomic write unit.  Bigalloc ensures that all allocations are aligned to the</div><div class='add'>+cluster size, which satisfies the LBA alignment requirements of the hardware</div><div class='add'>+device if the start of the partition/logical volume is itself aligned correctly.</div><div class='add'>+</div><div class='add'>+Here is the block allocation strategy in bigalloc for atomic writes:</div><div class='add'>+</div><div class='add'>+ * For regions with fully mapped extents, no additional work is needed</div><div class='add'>+ * For append writes, a new mapped extent is allocated</div><div class='add'>+ * For regions that are entirely holes, unwritten extent is created</div><div class='add'>+ * For large unwritten extents, the extent gets split into two unwritten</div><div class='add'>+   extents of appropriate requested size</div><div class='add'>+ * For mixed mapping regions (combinations of holes, unwritten extents, or</div><div class='add'>+   mapped extents), ext4_map_blocks() is called in a loop with</div><div class='add'>+   EXT4_GET_BLOCKS_ZERO flag to convert the region into a single contiguous</div><div class='add'>+   mapped extent by writing zeroes to it and converting any unwritten extents to</div><div class='add'>+   written, if found within the range.</div><div class='add'>+</div><div class='add'>+Note: Writing on a single contiguous underlying extent, whether mapped or</div><div class='add'>+unwritten, is not inherently problematic. However, writing to a mixed mapping</div><div class='add'>+region (i.e. one containing a combination of mapped and unwritten extents)</div><div class='add'>+must be avoided when performing atomic writes.</div><div class='add'>+</div><div class='add'>+The reason is that, atomic writes when issued via pwritev2() with the RWF_ATOMIC</div><div class='add'>+flag, requires that either all data is written or none at all. In the event of</div><div class='add'>+a system crash or unexpected power loss during the write operation, the affected</div><div class='add'>+region (when later read) must reflect either the complete old data or the</div><div class='add'>+complete new data, but never a mix of both.</div><div class='add'>+</div><div class='add'>+To enforce this guarantee, we ensure that the write target is backed by</div><div class='add'>+a single, contiguous extent before any data is written. This is critical because</div><div class='add'>+ext4 defers the conversion of unwritten extents to written extents until the I/O</div><div class='add'>+completion path (typically in -&gt;end_io()). If a write is allowed to proceed over</div><div class='add'>+a mixed mapping region (with mapped and unwritten extents) and a failure occurs</div><div class='add'>+mid-write, the system could observe partially updated regions after reboot, i.e.</div><div class='add'>+new data over mapped areas, and stale (old) data over unwritten extents that</div><div class='add'>+were never marked written. This violates the atomicity and/or torn write</div><div class='add'>+prevention guarantee.</div><div class='add'>+</div><div class='add'>+To prevent such torn writes, ext4 proactively allocates a single contiguous</div><div class='add'>+extent for the entire requested region in ``ext4_iomap_alloc`` via</div><div class='add'>+``ext4_map_blocks_atomic()``. EXT4 also force commits the current journalling</div><div class='add'>+transaction in case if allocation is done over mixed mapping. This ensures any</div><div class='add'>+pending metadata updates (like unwritten to written extents conversion) in this</div><div class='add'>+range are in consistent state with the file data blocks, before performing the</div><div class='add'>+actual write I/O. If the commit fails, the whole I/O must be aborted to prevent</div><div class='add'>+from any possible torn writes.</div><div class='add'>+Only after this step, the actual data write operation is performed by the iomap.</div><div class='add'>+</div><div class='add'>+Handling Split Extents Across Leaf Blocks</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+There can be a special edge case where we have logically and physically</div><div class='add'>+contiguous extents stored in separate leaf nodes of the on-disk extent tree.</div><div class='add'>+This occurs because on-disk extent tree merges only happens within the leaf</div><div class='add'>+blocks except for a case where we have 2-level tree which can get merged and</div><div class='add'>+collapsed entirely into the inode.</div><div class='add'>+If such a layout exists and, in the worst case, the extent status cache entries</div><div class='add'>+are reclaimed due to memory pressure, ``ext4_map_blocks()`` may never return</div><div class='add'>+a single contiguous extent for these split leaf extents.</div><div class='add'>+</div><div class='add'>+To address this edge case, a new get block flag</div><div class='add'>+``EXT4_GET_BLOCKS_QUERY_LEAF_BLOCKS flag`` is added to enhance the</div><div class='add'>+``ext4_map_query_blocks()`` lookup behavior.</div><div class='add'>+</div><div class='add'>+This new get block flag allows ``ext4_map_blocks()`` to first check if there is</div><div class='add'>+an entry in the extent status cache for the full range.</div><div class='add'>+If not present, it consults the on-disk extent tree using</div><div class='add'>+``ext4_map_query_blocks()``.</div><div class='add'>+If the located extent is at the end of a leaf node, it probes the next logical</div><div class='add'>+block (lblk) to detect a contiguous extent in the adjacent leaf.</div><div class='add'>+</div><div class='add'>+For now only one additional leaf block is queried to maintain efficiency, as</div><div class='add'>+atomic writes are typically constrained to small sizes</div><div class='add'>+(e.g. [blocksize, clustersize]).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Handling Journal transactions</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+To support multi-fsblock atomic writes, we ensure enough journal credits are</div><div class='add'>+reserved during:</div><div class='add'>+</div><div class='add'>+ 1. Block allocation time in ``ext4_iomap_alloc()``. We first query if there</div><div class='add'>+    could be a mixed mapping for the underlying requested range. If yes, then we</div><div class='add'>+    reserve credits of up to ``m_len``, assuming every alternate block can be</div><div class='add'>+    an unwritten extent followed by a hole.</div><div class='add'>+</div><div class='add'>+ 2. During ``-&gt;end_io()`` call, we make sure a single transaction is started for</div><div class='add'>+    doing unwritten-to-written conversion. The loop for conversion is mainly</div><div class='add'>+    only required to handle a split extent across leaf blocks.</div><div class='add'>+</div><div class='add'>+How to</div><div class='add'>+------</div><div class='add'>+</div><div class='add'>+Creating Filesystems with Atomic Write Support</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+First check the atomic write units supported by block device.</div><div class='add'>+See :ref:`atomic_write_bdev_support` for more details.</div><div class='add'>+</div><div class='add'>+For single-fsblock atomic writes with a larger block size</div><div class='add'>+(on systems with block size &lt; page size):</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+    # Create an ext4 filesystem with a 16KB block size</div><div class='add'>+    # (requires page size &gt;= 16KB)</div><div class='add'>+    mkfs.ext4 -b 16384 /dev/device</div><div class='add'>+</div><div class='add'>+For multi-fsblock atomic writes with bigalloc:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+    # Create an ext4 filesystem with bigalloc and 64KB cluster size</div><div class='add'>+    mkfs.ext4 -F -O bigalloc -b 4096 -C 65536 /dev/device</div><div class='add'>+</div><div class='add'>+Where ``-b`` specifies the block size, ``-C`` specifies the cluster size in bytes,</div><div class='add'>+and ``-O bigalloc`` enables the bigalloc feature.</div><div class='add'>+</div><div class='add'>+Application Interface</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Applications can use the ``pwritev2()`` system call with the ``RWF_ATOMIC`` flag</div><div class='add'>+to perform atomic writes:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    pwritev2(fd, iov, iovcnt, offset, RWF_ATOMIC);</div><div class='add'>+</div><div class='add'>+The write must be aligned to the filesystem's block size and not exceed the</div><div class='add'>+filesystem's maximum atomic write unit size.</div><div class='add'>+See ``generic_atomic_write_valid()`` for more details.</div><div class='add'>+</div><div class='add'>+``statx()`` system call with ``STATX_WRITE_ATOMIC`` flag can provides following</div><div class='add'>+details:</div><div class='add'>+</div><div class='add'>+ * ``stx_atomic_write_unit_min``: Minimum size of an atomic write request.</div><div class='add'>+ * ``stx_atomic_write_unit_max``: Maximum size of an atomic write request.</div><div class='add'>+ * ``stx_atomic_write_segments_max``: Upper limit for segments. The number of</div><div class='add'>+   separate memory buffers that can be gathered into a write operation</div><div class='add'>+   (e.g., the iovcnt parameter for IOV_ITER). Currently, this is always set to one.</div><div class='add'>+</div><div class='add'>+The STATX_ATTR_WRITE_ATOMIC flag in ``statx-&gt;attributes`` is set if atomic</div><div class='add'>+writes are supported.</div><div class='add'>+</div><div class='add'>+.. _atomic_write_bdev_support:</div><div class='add'>+</div><div class='add'>+Hardware Support</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The underlying storage device must support atomic write operations.</div><div class='add'>+Modern NVMe and SCSI devices often provide this capability.</div><div class='add'>+The Linux kernel exposes this information through sysfs:</div><div class='add'>+</div><div class='add'>+* ``/sys/block/&lt;device&gt;/queue/atomic_write_unit_min`` - Minimum atomic write size</div><div class='add'>+* ``/sys/block/&lt;device&gt;/queue/atomic_write_unit_max`` - Maximum atomic write size</div><div class='add'>+</div><div class='add'>+Nonzero values for these attributes indicate that the device supports</div><div class='add'>+atomic writes.</div><div class='add'>+</div><div class='add'>+See Also</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+* :doc:`bigalloc` - Documentation on the bigalloc feature</div><div class='add'>+* :doc:`allocators` - Documentation on block allocation in ext4</div><div class='add'>+* Support for atomic block writes in 6.13:</div><div class='add'>+  https://lwn.net/Articles/1009298/</div><div class='head'>diff --git a/Documentation/filesystems/ext4/overview.rst b/Documentation/filesystems/ext4/overview.rst<br/>index 0fad6eda6e15..9d4054c17ecb 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/ext4/overview.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/ext4/overview.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/ext4/overview.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/ext4/overview.rst</a></div><div class='hunk'>@@ -25,3 +25,4 @@ order.</div><div class='ctx'> .. include:: inlinedata.rst</div><div class='ctx'> .. include:: eainode.rst</div><div class='ctx'> .. include:: verity.rst</div><div class='add'>+.. include:: atomic_writes.rst</div><div class='head'>diff --git a/Documentation/filesystems/ext4/super.rst b/Documentation/filesystems/ext4/super.rst<br/>index a1eb4a11a1d0..1b240661bfa3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/ext4/super.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/ext4/super.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/ext4/super.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/ext4/super.rst</a></div><div class='hunk'>@@ -328,9 +328,13 @@ The ext4 superblock is laid out as follows in</div><div class='ctx'>      - s_checksum_type</div><div class='ctx'>      - Metadata checksum algorithm type. The only valid value is 1 (crc32c).</div><div class='ctx'>    * - 0x176</div><div class='del'>-     - __le16</div><div class='del'>-     - s_reserved_pad</div><div class='del'>-     -</div><div class='add'>+     - \_\_u8</div><div class='add'>+     - s\_encryption\_level</div><div class='add'>+     - Versioning level for encryption.</div><div class='add'>+   * - 0x177</div><div class='add'>+     - \_\_u8</div><div class='add'>+     - s\_reserved\_pad</div><div class='add'>+     - Padding to next 32bits.</div><div class='ctx'>    * - 0x178</div><div class='ctx'>      - __le64</div><div class='ctx'>      - s_kbytes_written</div><div class='hunk'>@@ -466,9 +470,13 @@ The ext4 superblock is laid out as follows in</div><div class='ctx'>      - s_last_error_time_hi</div><div class='ctx'>      - Upper 8 bits of the s_last_error_time field.</div><div class='ctx'>    * - 0x27A</div><div class='del'>-     - __u8</div><div class='del'>-     - s_pad[2]</div><div class='del'>-     - Zero padding.</div><div class='add'>+     - \_\_u8</div><div class='add'>+     - s\_first\_error\_errcode</div><div class='add'>+     -</div><div class='add'>+   * - 0x27B</div><div class='add'>+     - \_\_u8</div><div class='add'>+     - s\_last\_error\_errcode</div><div class='add'>+     -</div><div class='ctx'>    * - 0x27C</div><div class='ctx'>      - __le16</div><div class='ctx'>      - s_encoding</div><div class='head'>diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst<br/>index e15c4275862a..440e4ae74e44 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/f2fs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/f2fs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/f2fs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/f2fs.rst</a></div><div class='hunk'>@@ -182,32 +182,34 @@ fault_type=%d		 Support configuring fault injection type, should be</div><div class='ctx'> 			 enabled with fault_injection option, fault type value</div><div class='ctx'> 			 is shown below, it supports single or combined type.</div><div class='ctx'> </div><div class='del'>-			 ===========================      ===========</div><div class='add'>+			 ===========================      ==========</div><div class='ctx'> 			 Type_Name                        Type_Value</div><div class='del'>-			 ===========================      ===========</div><div class='del'>-			 FAULT_KMALLOC                    0x000000001</div><div class='del'>-			 FAULT_KVMALLOC                   0x000000002</div><div class='del'>-			 FAULT_PAGE_ALLOC                 0x000000004</div><div class='del'>-			 FAULT_PAGE_GET                   0x000000008</div><div class='del'>-			 FAULT_ALLOC_BIO                  0x000000010 (obsolete)</div><div class='del'>-			 FAULT_ALLOC_NID                  0x000000020</div><div class='del'>-			 FAULT_ORPHAN                     0x000000040</div><div class='del'>-			 FAULT_BLOCK                      0x000000080</div><div class='del'>-			 FAULT_DIR_DEPTH                  0x000000100</div><div class='del'>-			 FAULT_EVICT_INODE                0x000000200</div><div class='del'>-			 FAULT_TRUNCATE                   0x000000400</div><div class='del'>-			 FAULT_READ_IO                    0x000000800</div><div class='del'>-			 FAULT_CHECKPOINT                 0x000001000</div><div class='del'>-			 FAULT_DISCARD                    0x000002000</div><div class='del'>-			 FAULT_WRITE_IO                   0x000004000</div><div class='del'>-			 FAULT_SLAB_ALLOC                 0x000008000</div><div class='del'>-			 FAULT_DQUOT_INIT                 0x000010000</div><div class='del'>-			 FAULT_LOCK_OP                    0x000020000</div><div class='del'>-			 FAULT_BLKADDR_VALIDITY           0x000040000</div><div class='del'>-			 FAULT_BLKADDR_CONSISTENCE        0x000080000</div><div class='del'>-			 FAULT_NO_SEGMENT                 0x000100000</div><div class='del'>-			 FAULT_INCONSISTENT_FOOTER        0x000200000</div><div class='del'>-			 ===========================      ===========</div><div class='add'>+			 ===========================      ==========</div><div class='add'>+			 FAULT_KMALLOC                    0x00000001</div><div class='add'>+			 FAULT_KVMALLOC                   0x00000002</div><div class='add'>+			 FAULT_PAGE_ALLOC                 0x00000004</div><div class='add'>+			 FAULT_PAGE_GET                   0x00000008</div><div class='add'>+			 FAULT_ALLOC_BIO                  0x00000010 (obsolete)</div><div class='add'>+			 FAULT_ALLOC_NID                  0x00000020</div><div class='add'>+			 FAULT_ORPHAN                     0x00000040</div><div class='add'>+			 FAULT_BLOCK                      0x00000080</div><div class='add'>+			 FAULT_DIR_DEPTH                  0x00000100</div><div class='add'>+			 FAULT_EVICT_INODE                0x00000200</div><div class='add'>+			 FAULT_TRUNCATE                   0x00000400</div><div class='add'>+			 FAULT_READ_IO                    0x00000800</div><div class='add'>+			 FAULT_CHECKPOINT                 0x00001000</div><div class='add'>+			 FAULT_DISCARD                    0x00002000</div><div class='add'>+			 FAULT_WRITE_IO                   0x00004000</div><div class='add'>+			 FAULT_SLAB_ALLOC                 0x00008000</div><div class='add'>+			 FAULT_DQUOT_INIT                 0x00010000</div><div class='add'>+			 FAULT_LOCK_OP                    0x00020000</div><div class='add'>+			 FAULT_BLKADDR_VALIDITY           0x00040000</div><div class='add'>+			 FAULT_BLKADDR_CONSISTENCE        0x00080000</div><div class='add'>+			 FAULT_NO_SEGMENT                 0x00100000</div><div class='add'>+			 FAULT_INCONSISTENT_FOOTER        0x00200000</div><div class='add'>+			 FAULT_TIMEOUT                    0x00400000 (1000ms)</div><div class='add'>+			 FAULT_VMALLOC                    0x00800000</div><div class='add'>+			 ===========================      ==========</div><div class='ctx'> mode=%s			 Control block allocation mode which supports "adaptive"</div><div class='ctx'> 			 and "lfs". In "lfs" mode, there should be no random</div><div class='ctx'> 			 writes towards main area.</div><div class='head'>diff --git a/Documentation/filesystems/fscrypt.rst b/Documentation/filesystems/fscrypt.rst<br/>index e80329908549..29e84d125e02 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/fscrypt.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/fscrypt.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/fscrypt.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/fscrypt.rst</a></div><div class='hunk'>@@ -70,7 +70,7 @@ Online attacks</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='ctx'> fscrypt (and storage encryption in general) can only provide limited</div><div class='del'>-protection, if any at all, against online attacks.  In detail:</div><div class='add'>+protection against online attacks.  In detail:</div><div class='ctx'> </div><div class='ctx'> Side-channel attacks</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~</div><div class='hunk'>@@ -99,16 +99,23 @@ Therefore, any encryption-specific access control checks would merely</div><div class='ctx'> be enforced by kernel *code* and therefore would be largely redundant</div><div class='ctx'> with the wide variety of access control mechanisms already available.)</div><div class='ctx'> </div><div class='del'>-Kernel memory compromise</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+Read-only kernel memory compromise</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Unless `hardware-wrapped keys`_ are used, an attacker who gains the</div><div class='add'>+ability to read from arbitrary kernel memory, e.g. by mounting a</div><div class='add'>+physical attack or by exploiting a kernel security vulnerability, can</div><div class='add'>+compromise all fscrypt keys that are currently in-use.  This also</div><div class='add'>+extends to cold boot attacks; if the system is suddenly powered off,</div><div class='add'>+keys the system was using may remain in memory for a short time.</div><div class='ctx'> </div><div class='del'>-An attacker who compromises the system enough to read from arbitrary</div><div class='del'>-memory, e.g. by mounting a physical attack or by exploiting a kernel</div><div class='del'>-security vulnerability, can compromise all encryption keys that are</div><div class='del'>-currently in use.</div><div class='add'>+However, if hardware-wrapped keys are used, then the fscrypt master</div><div class='add'>+keys and file contents encryption keys (but not other types of fscrypt</div><div class='add'>+subkeys such as filenames encryption keys) are protected from</div><div class='add'>+compromises of arbitrary kernel memory.</div><div class='ctx'> </div><div class='del'>-However, fscrypt allows encryption keys to be removed from the kernel,</div><div class='del'>-which may protect them from later compromise.</div><div class='add'>+In addition, fscrypt allows encryption keys to be removed from the</div><div class='add'>+kernel, which may protect them from later compromise.</div><div class='ctx'> </div><div class='ctx'> In more detail, the FS_IOC_REMOVE_ENCRYPTION_KEY ioctl (or the</div><div class='ctx'> FS_IOC_REMOVE_ENCRYPTION_KEY_ALL_USERS ioctl) can wipe a master</div><div class='hunk'>@@ -144,6 +151,24 @@ However, these ioctls have some limitations:</div><div class='ctx'>   accelerator hardware (if used by the crypto API to implement any of</div><div class='ctx'>   the algorithms), or in other places not explicitly considered here.</div><div class='ctx'> </div><div class='add'>+Full system compromise</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+An attacker who gains "root" access and/or the ability to execute</div><div class='add'>+arbitrary kernel code can freely exfiltrate data that is protected by</div><div class='add'>+any in-use fscrypt keys.  Thus, usually fscrypt provides no meaningful</div><div class='add'>+protection in this scenario.  (Data that is protected by a key that is</div><div class='add'>+absent throughout the entire attack remains protected, modulo the</div><div class='add'>+limitations of key removal mentioned above in the case where the key</div><div class='add'>+was removed prior to the attack.)</div><div class='add'>+</div><div class='add'>+However, if `hardware-wrapped keys`_ are used, such attackers will be</div><div class='add'>+unable to exfiltrate the master keys or file contents keys in a form</div><div class='add'>+that will be usable after the system is powered off.  This may be</div><div class='add'>+useful if the attacker is significantly time-limited and/or</div><div class='add'>+bandwidth-limited, so they can only exfiltrate some data and need to</div><div class='add'>+rely on a later offline attack to exfiltrate the rest of it.</div><div class='add'>+</div><div class='ctx'> Limitations of v1 policies</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -170,6 +195,10 @@ policies on all new encrypted directories.</div><div class='ctx'> Key hierarchy</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='add'>+Note: this section assumes the use of raw keys rather than</div><div class='add'>+hardware-wrapped keys.  The use of hardware-wrapped keys modifies the</div><div class='add'>+key hierarchy slightly.  For details, see `Hardware-wrapped keys`_.</div><div class='add'>+</div><div class='ctx'> Master Keys</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='hunk'>@@ -832,7 +861,9 @@ a pointer to struct fscrypt_add_key_arg, defined as follows::</div><div class='ctx'>             struct fscrypt_key_specifier key_spec;</div><div class='ctx'>             __u32 raw_size;</div><div class='ctx'>             __u32 key_id;</div><div class='del'>-            __u32 __reserved[8];</div><div class='add'>+    #define FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED 0x00000001</div><div class='add'>+            __u32 flags;</div><div class='add'>+            __u32 __reserved[7];</div><div class='ctx'>             __u8 raw[];</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -851,7 +882,7 @@ a pointer to struct fscrypt_add_key_arg, defined as follows::</div><div class='ctx'> </div><div class='ctx'>     struct fscrypt_provisioning_key_payload {</div><div class='ctx'>             __u32 type;</div><div class='del'>-            __u32 __reserved;</div><div class='add'>+            __u32 flags;</div><div class='ctx'>             __u8 raw[];</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -879,24 +910,32 @@ as follows:</div><div class='ctx'>   Alternatively, if ``key_id`` is nonzero, this field must be 0, since</div><div class='ctx'>   in that case the size is implied by the specified Linux keyring key.</div><div class='ctx'> </div><div class='del'>-- ``key_id`` is 0 if the raw key is given directly in the ``raw``</div><div class='del'>-  field.  Otherwise ``key_id`` is the ID of a Linux keyring key of</div><div class='del'>-  type "fscrypt-provisioning" whose payload is</div><div class='del'>-  struct fscrypt_provisioning_key_payload whose ``raw`` field contains</div><div class='del'>-  the raw key and whose ``type`` field matches ``key_spec.type``.</div><div class='del'>-  Since ``raw`` is variable-length, the total size of this key's</div><div class='del'>-  payload must be ``sizeof(struct fscrypt_provisioning_key_payload)``</div><div class='del'>-  plus the raw key size.  The process must have Search permission on</div><div class='del'>-  this key.</div><div class='del'>-</div><div class='del'>-  Most users should leave this 0 and specify the raw key directly.</div><div class='del'>-  The support for specifying a Linux keyring key is intended mainly to</div><div class='add'>+- ``key_id`` is 0 if the key is given directly in the ``raw`` field.</div><div class='add'>+  Otherwise ``key_id`` is the ID of a Linux keyring key of type</div><div class='add'>+  "fscrypt-provisioning" whose payload is struct</div><div class='add'>+  fscrypt_provisioning_key_payload whose ``raw`` field contains the</div><div class='add'>+  key, whose ``type`` field matches ``key_spec.type``, and whose</div><div class='add'>+  ``flags`` field matches ``flags``.  Since ``raw`` is</div><div class='add'>+  variable-length, the total size of this key's payload must be</div><div class='add'>+  ``sizeof(struct fscrypt_provisioning_key_payload)`` plus the number</div><div class='add'>+  of key bytes.  The process must have Search permission on this key.</div><div class='add'>+</div><div class='add'>+  Most users should leave this 0 and specify the key directly.  The</div><div class='add'>+  support for specifying a Linux keyring key is intended mainly to</div><div class='ctx'>   allow re-adding keys after a filesystem is unmounted and re-mounted,</div><div class='del'>-  without having to store the raw keys in userspace memory.</div><div class='add'>+  without having to store the keys in userspace memory.</div><div class='add'>+</div><div class='add'>+- ``flags`` contains optional flags from ``&lt;linux/fscrypt.h&gt;``:</div><div class='add'>+</div><div class='add'>+  - FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED: This denotes that the key is a</div><div class='add'>+    hardware-wrapped key.  See `Hardware-wrapped keys`_.  This flag</div><div class='add'>+    can't be used if FSCRYPT_KEY_SPEC_TYPE_DESCRIPTOR is used.</div><div class='ctx'> </div><div class='ctx'> - ``raw`` is a variable-length field which must contain the actual</div><div class='ctx'>   key, ``raw_size`` bytes long.  Alternatively, if ``key_id`` is</div><div class='del'>-  nonzero, then this field is unused.</div><div class='add'>+  nonzero, then this field is unused.  Note that despite being named</div><div class='add'>+  ``raw``, if FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED is specified then it</div><div class='add'>+  will contain a wrapped key, not a raw key.</div><div class='ctx'> </div><div class='ctx'> For v2 policy keys, the kernel keeps track of which user (identified</div><div class='ctx'> by effective user ID) added the key, and only allows the key to be</div><div class='hunk'>@@ -908,8 +947,8 @@ prevent that other user from unexpectedly removing it.  Therefore,</div><div class='ctx'> FS_IOC_ADD_ENCRYPTION_KEY may also be used to add a v2 policy key</div><div class='ctx'> *again*, even if it's already added by other user(s).  In this case,</div><div class='ctx'> FS_IOC_ADD_ENCRYPTION_KEY will just install a claim to the key for the</div><div class='del'>-current user, rather than actually add the key again (but the raw key</div><div class='del'>-must still be provided, as a proof of knowledge).</div><div class='add'>+current user, rather than actually add the key again (but the key must</div><div class='add'>+still be provided, as a proof of knowledge).</div><div class='ctx'> </div><div class='ctx'> FS_IOC_ADD_ENCRYPTION_KEY returns 0 if either the key or a claim to</div><div class='ctx'> the key was either added or already exists.</div><div class='hunk'>@@ -918,20 +957,23 @@ FS_IOC_ADD_ENCRYPTION_KEY can fail with the following errors:</div><div class='ctx'> </div><div class='ctx'> - ``EACCES``: FSCRYPT_KEY_SPEC_TYPE_DESCRIPTOR was specified, but the</div><div class='ctx'>   caller does not have the CAP_SYS_ADMIN capability in the initial</div><div class='del'>-  user namespace; or the raw key was specified by Linux key ID but the</div><div class='add'>+  user namespace; or the key was specified by Linux key ID but the</div><div class='ctx'>   process lacks Search permission on the key.</div><div class='add'>+- ``EBADMSG``: invalid hardware-wrapped key</div><div class='ctx'> - ``EDQUOT``: the key quota for this user would be exceeded by adding</div><div class='ctx'>   the key</div><div class='ctx'> - ``EINVAL``: invalid key size or key specifier type, or reserved bits</div><div class='ctx'>   were set</div><div class='del'>-- ``EKEYREJECTED``: the raw key was specified by Linux key ID, but the</div><div class='del'>-  key has the wrong type</div><div class='del'>-- ``ENOKEY``: the raw key was specified by Linux key ID, but no key</div><div class='del'>-  exists with that ID</div><div class='add'>+- ``EKEYREJECTED``: the key was specified by Linux key ID, but the key</div><div class='add'>+  has the wrong type</div><div class='add'>+- ``ENOKEY``: the key was specified by Linux key ID, but no key exists</div><div class='add'>+  with that ID</div><div class='ctx'> - ``ENOTTY``: this type of filesystem does not implement encryption</div><div class='ctx'> - ``EOPNOTSUPP``: the kernel was not configured with encryption</div><div class='ctx'>   support for this filesystem, or the filesystem superblock has not</div><div class='del'>-  had encryption enabled on it</div><div class='add'>+  had encryption enabled on it; or a hardware wrapped key was specified</div><div class='add'>+  but the filesystem does not support inline encryption or the hardware</div><div class='add'>+  does not support hardware-wrapped keys</div><div class='ctx'> </div><div class='ctx'> Legacy method</div><div class='ctx'> ~~~~~~~~~~~~~</div><div class='hunk'>@@ -994,9 +1036,8 @@ or removed by non-root users.</div><div class='ctx'> These ioctls don't work on keys that were added via the legacy</div><div class='ctx'> process-subscribed keyrings mechanism.</div><div class='ctx'> </div><div class='del'>-Before using these ioctls, read the `Kernel memory compromise`_</div><div class='del'>-section for a discussion of the security goals and limitations of</div><div class='del'>-these ioctls.</div><div class='add'>+Before using these ioctls, read the `Online attacks`_ section for a</div><div class='add'>+discussion of the security goals and limitations of these ioctls.</div><div class='ctx'> </div><div class='ctx'> FS_IOC_REMOVE_ENCRYPTION_KEY</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='hunk'>@@ -1316,7 +1357,8 @@ inline encryption hardware doesn't have the needed crypto capabilities</div><div class='ctx'> (e.g. support for the needed encryption algorithm and data unit size)</div><div class='ctx'> and where blk-crypto-fallback is unusable.  (For blk-crypto-fallback</div><div class='ctx'> to be usable, it must be enabled in the kernel configuration with</div><div class='del'>-CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y.)</div><div class='add'>+CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y, and the file must be</div><div class='add'>+protected by a raw key rather than a hardware-wrapped key.)</div><div class='ctx'> </div><div class='ctx'> Currently fscrypt always uses the filesystem block size (which is</div><div class='ctx'> usually 4096 bytes) as the data unit size.  Therefore, it can only use</div><div class='hunk'>@@ -1324,7 +1366,76 @@ inline encryption hardware that supports that data unit size.</div><div class='ctx'> </div><div class='ctx'> Inline encryption doesn't affect the ciphertext or other aspects of</div><div class='ctx'> the on-disk format, so users may freely switch back and forth between</div><div class='del'>-using "inlinecrypt" and not using "inlinecrypt".</div><div class='add'>+using "inlinecrypt" and not using "inlinecrypt".  An exception is that</div><div class='add'>+files that are protected by a hardware-wrapped key can only be</div><div class='add'>+encrypted/decrypted by the inline encryption hardware and therefore</div><div class='add'>+can only be accessed when the "inlinecrypt" mount option is used.  For</div><div class='add'>+more information about hardware-wrapped keys, see below.</div><div class='add'>+</div><div class='add'>+Hardware-wrapped keys</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+fscrypt supports using *hardware-wrapped keys* when the inline</div><div class='add'>+encryption hardware supports it.  Such keys are only present in kernel</div><div class='add'>+memory in wrapped (encrypted) form; they can only be unwrapped</div><div class='add'>+(decrypted) by the inline encryption hardware and are temporally bound</div><div class='add'>+to the current boot.  This prevents the keys from being compromised if</div><div class='add'>+kernel memory is leaked.  This is done without limiting the number of</div><div class='add'>+keys that can be used and while still allowing the execution of</div><div class='add'>+cryptographic tasks that are tied to the same key but can't use inline</div><div class='add'>+encryption hardware, e.g. filenames encryption.</div><div class='add'>+</div><div class='add'>+Note that hardware-wrapped keys aren't specific to fscrypt; they are a</div><div class='add'>+block layer feature (part of *blk-crypto*).  For more details about</div><div class='add'>+hardware-wrapped keys, see the block layer documentation at</div><div class='add'>+:ref:`Documentation/block/inline-encryption.rst</div><div class='add'>+&lt;hardware_wrapped_keys&gt;`.  The rest of this section just focuses on</div><div class='add'>+the details of how fscrypt can use hardware-wrapped keys.</div><div class='add'>+</div><div class='add'>+fscrypt supports hardware-wrapped keys by allowing the fscrypt master</div><div class='add'>+keys to be hardware-wrapped keys as an alternative to raw keys.  To</div><div class='add'>+add a hardware-wrapped key with `FS_IOC_ADD_ENCRYPTION_KEY`_,</div><div class='add'>+userspace must specify FSCRYPT_ADD_KEY_FLAG_HW_WRAPPED in the</div><div class='add'>+``flags`` field of struct fscrypt_add_key_arg and also in the</div><div class='add'>+``flags`` field of struct fscrypt_provisioning_key_payload when</div><div class='add'>+applicable.  The key must be in ephemerally-wrapped form, not</div><div class='add'>+long-term wrapped form.</div><div class='add'>+</div><div class='add'>+Some limitations apply.  First, files protected by a hardware-wrapped</div><div class='add'>+key are tied to the system's inline encryption hardware.  Therefore</div><div class='add'>+they can only be accessed when the "inlinecrypt" mount option is used,</div><div class='add'>+and they can't be included in portable filesystem images.  Second,</div><div class='add'>+currently the hardware-wrapped key support is only compatible with</div><div class='add'>+`IV_INO_LBLK_64 policies`_ and `IV_INO_LBLK_32 policies`_, as it</div><div class='add'>+assumes that there is just one file contents encryption key per</div><div class='add'>+fscrypt master key rather than one per file.  Future work may address</div><div class='add'>+this limitation by passing per-file nonces down the storage stack to</div><div class='add'>+allow the hardware to derive per-file keys.</div><div class='add'>+</div><div class='add'>+Implementation-wise, to encrypt/decrypt the contents of files that are</div><div class='add'>+protected by a hardware-wrapped key, fscrypt uses blk-crypto,</div><div class='add'>+attaching the hardware-wrapped key to the bio crypt contexts.  As is</div><div class='add'>+the case with raw keys, the block layer will program the key into a</div><div class='add'>+keyslot when it isn't already in one.  However, when programming a</div><div class='add'>+hardware-wrapped key, the hardware doesn't program the given key</div><div class='add'>+directly into a keyslot but rather unwraps it (using the hardware's</div><div class='add'>+ephemeral wrapping key) and derives the inline encryption key from it.</div><div class='add'>+The inline encryption key is the key that actually gets programmed</div><div class='add'>+into a keyslot, and it is never exposed to software.</div><div class='add'>+</div><div class='add'>+However, fscrypt doesn't just do file contents encryption; it also</div><div class='add'>+uses its master keys to derive filenames encryption keys, key</div><div class='add'>+identifiers, and sometimes some more obscure types of subkeys such as</div><div class='add'>+dirhash keys.  So even with file contents encryption out of the</div><div class='add'>+picture, fscrypt still needs a raw key to work with.  To get such a</div><div class='add'>+key from a hardware-wrapped key, fscrypt asks the inline encryption</div><div class='add'>+hardware to derive a cryptographically isolated "software secret" from</div><div class='add'>+the hardware-wrapped key.  fscrypt uses this "software secret" to key</div><div class='add'>+its KDF to derive all subkeys other than file contents keys.</div><div class='add'>+</div><div class='add'>+Note that this implies that the hardware-wrapped key feature only</div><div class='add'>+protects the file contents encryption keys.  It doesn't protect other</div><div class='add'>+fscrypt subkeys such as filenames encryption keys.</div><div class='ctx'> </div><div class='ctx'> Direct I/O support</div><div class='ctx'> ==================</div><div class='hunk'>@@ -1409,7 +1520,7 @@ read the ciphertext into the page cache and decrypt it in-place.  The</div><div class='ctx'> folio lock must be held until decryption has finished, to prevent the</div><div class='ctx'> folio from becoming visible to userspace prematurely.</div><div class='ctx'> </div><div class='del'>-For the write path (-&gt;writepage()) of regular files, filesystems</div><div class='add'>+For the write path (-&gt;writepages()) of regular files, filesystems</div><div class='ctx'> cannot encrypt data in-place in the page cache, since the cached</div><div class='ctx'> plaintext must be preserved.  Instead, filesystems must encrypt into a</div><div class='ctx'> temporary buffer or "bounce page", then write out the temporary</div><div class='head'>diff --git a/Documentation/filesystems/index.rst b/Documentation/filesystems/index.rst<br/>index a9cf8e950b15..32618512a965 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/index.rst</a></div><div class='hunk'>@@ -113,6 +113,7 @@ Documentation for filesystem implementations.</div><div class='ctx'>    qnx6</div><div class='ctx'>    ramfs-rootfs-initramfs</div><div class='ctx'>    relay</div><div class='add'>+   resctrl</div><div class='ctx'>    romfs</div><div class='ctx'>    smb/index</div><div class='ctx'>    spufs/index</div><div class='head'>diff --git a/Documentation/filesystems/iomap/design.rst b/Documentation/filesystems/iomap/design.rst<br/>index e29651a42eec..f2df9b6df988 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/iomap/design.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/iomap/design.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/iomap/design.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/iomap/design.rst</a></div><div class='hunk'>@@ -243,13 +243,25 @@ The fields are as follows:</div><div class='ctx'>      regular file data.</div><div class='ctx'>      This is only useful for FIEMAP.</div><div class='ctx'> </div><div class='del'>-   * **IOMAP_F_PRIVATE**: Starting with this value, the upper bits can</div><div class='del'>-     be set by the filesystem for its own purposes.</div><div class='add'>+   * **IOMAP_F_BOUNDARY**: This indicates I/O and its completion must not be</div><div class='add'>+     merged with any other I/O or completion. Filesystems must use this when</div><div class='add'>+     submitting I/O to devices that cannot handle I/O crossing certain LBAs</div><div class='add'>+     (e.g. ZNS devices). This flag applies only to buffered I/O writeback; all</div><div class='add'>+     other functions ignore it.</div><div class='add'>+</div><div class='add'>+   * **IOMAP_F_PRIVATE**: This flag is reserved for filesystem private use.</div><div class='ctx'> </div><div class='ctx'>    * **IOMAP_F_ANON_WRITE**: Indicates that (write) I/O does not have a target</div><div class='ctx'>      block assigned to it yet and the file system will do that in the bio</div><div class='ctx'>      submission handler, splitting the I/O as needed.</div><div class='ctx'> </div><div class='add'>+   * **IOMAP_F_ATOMIC_BIO**: This indicates write I/O must be submitted with the</div><div class='add'>+     ``REQ_ATOMIC`` flag set in the bio. Filesystems need to set this flag to</div><div class='add'>+     inform iomap that the write I/O operation requires torn-write protection</div><div class='add'>+     based on HW-offload mechanism. They must also ensure that mapping updates</div><div class='add'>+     upon the completion of the I/O must be performed in a single metadata</div><div class='add'>+     update.</div><div class='add'>+</div><div class='ctx'>    These flags can be set by iomap itself during file operations.</div><div class='ctx'>    The filesystem should supply an ``-&gt;iomap_end`` function if it needs</div><div class='ctx'>    to observe these flags:</div><div class='head'>diff --git a/Documentation/filesystems/locking.rst b/Documentation/filesystems/locking.rst<br/>index 0ec0bb6eb0fb..2e567e341c3b 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/locking.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/locking.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/locking.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/locking.rst</a></div><div class='hunk'>@@ -249,7 +249,6 @@ address_space_operations</div><div class='ctx'> ========================</div><div class='ctx'> prototypes::</div><div class='ctx'> </div><div class='del'>-	int (*writepage)(struct page *page, struct writeback_control *wbc);</div><div class='ctx'> 	int (*read_folio)(struct file *, struct folio *);</div><div class='ctx'> 	int (*writepages)(struct address_space *, struct writeback_control *);</div><div class='ctx'> 	bool (*dirty_folio)(struct address_space *, struct folio *folio);</div><div class='hunk'>@@ -280,7 +279,6 @@ locking rules:</div><div class='ctx'> ======================	======================== =========	===============</div><div class='ctx'> ops			folio locked		 i_rwsem	invalidate_lock</div><div class='ctx'> ======================	======================== =========	===============</div><div class='del'>-writepage:		yes, unlocks (see below)</div><div class='ctx'> read_folio:		yes, unlocks				shared</div><div class='ctx'> writepages:</div><div class='ctx'> dirty_folio:		maybe</div><div class='hunk'>@@ -309,54 +307,6 @@ completion.</div><div class='ctx'> </div><div class='ctx'> -&gt;readahead() unlocks the folios that I/O is attempted on like -&gt;read_folio().</div><div class='ctx'> </div><div class='del'>--&gt;writepage() is used for two purposes: for "memory cleansing" and for</div><div class='del'>-"sync".  These are quite different operations and the behaviour may differ</div><div class='del'>-depending upon the mode.</div><div class='del'>-</div><div class='del'>-If writepage is called for sync (wbc-&gt;sync_mode != WBC_SYNC_NONE) then</div><div class='del'>-it *must* start I/O against the page, even if that would involve</div><div class='del'>-blocking on in-progress I/O.</div><div class='del'>-</div><div class='del'>-If writepage is called for memory cleansing (sync_mode ==</div><div class='del'>-WBC_SYNC_NONE) then its role is to get as much writeout underway as</div><div class='del'>-possible.  So writepage should try to avoid blocking against</div><div class='del'>-currently-in-progress I/O.</div><div class='del'>-</div><div class='del'>-If the filesystem is not called for "sync" and it determines that it</div><div class='del'>-would need to block against in-progress I/O to be able to start new I/O</div><div class='del'>-against the page the filesystem should redirty the page with</div><div class='del'>-redirty_page_for_writepage(), then unlock the page and return zero.</div><div class='del'>-This may also be done to avoid internal deadlocks, but rarely.</div><div class='del'>-</div><div class='del'>-If the filesystem is called for sync then it must wait on any</div><div class='del'>-in-progress I/O and then start new I/O.</div><div class='del'>-</div><div class='del'>-The filesystem should unlock the page synchronously, before returning to the</div><div class='del'>-caller, unless -&gt;writepage() returns special WRITEPAGE_ACTIVATE</div><div class='del'>-value. WRITEPAGE_ACTIVATE means that page cannot really be written out</div><div class='del'>-currently, and VM should stop calling -&gt;writepage() on this page for some</div><div class='del'>-time. VM does this by moving page to the head of the active list, hence the</div><div class='del'>-name.</div><div class='del'>-</div><div class='del'>-Unless the filesystem is going to redirty_page_for_writepage(), unlock the page</div><div class='del'>-and return zero, writepage *must* run set_page_writeback() against the page,</div><div class='del'>-followed by unlocking it.  Once set_page_writeback() has been run against the</div><div class='del'>-page, write I/O can be submitted and the write I/O completion handler must run</div><div class='del'>-end_page_writeback() once the I/O is complete.  If no I/O is submitted, the</div><div class='del'>-filesystem must run end_page_writeback() against the page before returning from</div><div class='del'>-writepage.</div><div class='del'>-</div><div class='del'>-That is: after 2.5.12, pages which are under writeout are *not* locked.  Note,</div><div class='del'>-if the filesystem needs the page to be locked during writeout, that is ok, too,</div><div class='del'>-the page is allowed to be unlocked at any point in time between the calls to</div><div class='del'>-set_page_writeback() and end_page_writeback().</div><div class='del'>-</div><div class='del'>-Note, failure to run either redirty_page_for_writepage() or the combination of</div><div class='del'>-set_page_writeback()/end_page_writeback() on a page submitted to writepage</div><div class='del'>-will leave the page itself marked clean but it will be tagged as dirty in the</div><div class='del'>-radix tree.  This incoherency can lead to all sorts of hard-to-debug problems</div><div class='del'>-in the filesystem like having dirty inodes at umount and losing written data.</div><div class='del'>-</div><div class='ctx'> -&gt;writepages() is used for periodic writeback and for syscall-initiated</div><div class='ctx'> sync operations.  The address_space should start I/O against at least</div><div class='ctx'> ``*nr_to_write`` pages.  ``*nr_to_write`` must be decremented for each page</div><div class='hunk'>@@ -364,8 +314,8 @@ which is written.  The address_space implementation may write more (or less)</div><div class='ctx'> pages than ``*nr_to_write`` asks for, but it should try to be reasonably close.</div><div class='ctx'> If nr_to_write is NULL, all dirty pages must be written.</div><div class='ctx'> </div><div class='del'>-writepages should _only_ write pages which are present on</div><div class='del'>-mapping-&gt;io_pages.</div><div class='add'>+writepages should _only_ write pages which are present in</div><div class='add'>+mapping-&gt;i_pages.</div><div class='ctx'> </div><div class='ctx'> -&gt;dirty_folio() is called from various places in the kernel when</div><div class='ctx'> the target folio is marked as needing writeback.  The folio cannot be</div><div class='head'>diff --git a/Documentation/filesystems/mount_api.rst b/Documentation/filesystems/mount_api.rst<br/>index d92c276f1575..e149b89118c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/mount_api.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/mount_api.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/mount_api.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/mount_api.rst</a></div><div class='hunk'>@@ -671,7 +671,6 @@ The members are as follows:</div><div class='ctx'> 	fsparam_bool()		fs_param_is_bool</div><div class='ctx'> 	fsparam_u32()		fs_param_is_u32</div><div class='ctx'> 	fsparam_u32oct()	fs_param_is_u32_octal</div><div class='del'>-	fsparam_u32hex()	fs_param_is_u32_hex</div><div class='ctx'> 	fsparam_s32()		fs_param_is_s32</div><div class='ctx'> 	fsparam_u64()		fs_param_is_u64</div><div class='ctx'> 	fsparam_enum()		fs_param_is_enum</div><div class='hunk'>@@ -755,21 +754,6 @@ process the parameters it is given.</div><div class='ctx'> </div><div class='ctx'>    * ::</div><div class='ctx'> </div><div class='del'>-       bool validate_constant_table(const struct constant_table *tbl,</div><div class='del'>-				    size_t tbl_size,</div><div class='del'>-				    int low, int high, int special);</div><div class='del'>-</div><div class='del'>-     Validate a constant table.  Checks that all the elements are appropriately</div><div class='del'>-     ordered, that there are no duplicates and that the values are between low</div><div class='del'>-     and high inclusive, though provision is made for one allowable special</div><div class='del'>-     value outside of that range.  If no special value is required, special</div><div class='del'>-     should just be set to lie inside the low-to-high range.</div><div class='del'>-</div><div class='del'>-     If all is good, true is returned.  If the table is invalid, errors are</div><div class='del'>-     logged to the kernel log buffer and false is returned.</div><div class='del'>-</div><div class='del'>-   * ::</div><div class='del'>-</div><div class='ctx'>        bool fs_validate_description(const char *name,</div><div class='ctx'>                                     const struct fs_parameter_description *desc);</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/netfs_library.rst b/Documentation/filesystems/netfs_library.rst<br/>index 3886c14f89f4..939b4b624fad 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/netfs_library.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/netfs_library.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/netfs_library.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/netfs_library.rst</a></div><div class='hunk'>@@ -1,33 +1,187 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-=================================</div><div class='del'>-Network Filesystem Helper Library</div><div class='del'>-=================================</div><div class='add'>+===================================</div><div class='add'>+Network Filesystem Services Library</div><div class='add'>+===================================</div><div class='ctx'> </div><div class='ctx'> .. Contents:</div><div class='ctx'> </div><div class='ctx'>  - Overview.</div><div class='add'>+   - Requests and streams.</div><div class='add'>+   - Subrequests.</div><div class='add'>+   - Result collection and retry.</div><div class='add'>+   - Local caching.</div><div class='add'>+   - Content encryption (fscrypt).</div><div class='ctx'>  - Per-inode context.</div><div class='ctx'>    - Inode context helper functions.</div><div class='del'>- - Buffered read helpers.</div><div class='del'>-   - Read helper functions.</div><div class='del'>-   - Read helper structures.</div><div class='del'>-   - Read helper operations.</div><div class='del'>-   - Read helper procedure.</div><div class='del'>-   - Read helper cache API.</div><div class='add'>+   - Inode locking.</div><div class='add'>+   - Inode writeback.</div><div class='add'>+ - High-level VFS API.</div><div class='add'>+   - Unlocked read/write iter.</div><div class='add'>+   - Pre-locked read/write iter.</div><div class='add'>+   - Monolithic files API.</div><div class='add'>+   - Memory-mapped I/O API.</div><div class='add'>+ - High-level VM API.</div><div class='add'>+   - Deprecated PG_private2 API.</div><div class='add'>+ - I/O request API.</div><div class='add'>+   - Request structure.</div><div class='add'>+   - Stream structure.</div><div class='add'>+   - Subrequest structure.</div><div class='add'>+   - Filesystem methods.</div><div class='add'>+   - Terminating a subrequest.</div><div class='add'>+   - Local cache API.</div><div class='add'>+ - API function reference.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Overview</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='del'>-The network filesystem helper library is a set of functions designed to aid a</div><div class='del'>-network filesystem in implementing VM/VFS operations.  For the moment, that</div><div class='del'>-just includes turning various VM buffered read operations into requests to read</div><div class='del'>-from the server.  The helper library, however, can also interpose other</div><div class='del'>-services, such as local caching or local data encryption.</div><div class='add'>+The network filesystem services library, netfslib, is a set of functions</div><div class='add'>+designed to aid a network filesystem in implementing VM/VFS API operations.  It</div><div class='add'>+takes over the normal buffered read, readahead, write and writeback and also</div><div class='add'>+handles unbuffered and direct I/O.</div><div class='ctx'> </div><div class='del'>-Note that the library module doesn't link against local caching directly, so</div><div class='del'>-access must be provided by the netfs.</div><div class='add'>+The library provides support for (re-)negotiation of I/O sizes and retrying</div><div class='add'>+failed I/O as well as local caching and will, in the future, provide content</div><div class='add'>+encryption.</div><div class='add'>+</div><div class='add'>+It insulates the filesystem from VM interface changes as much as possible and</div><div class='add'>+handles VM features such as large multipage folios.  The filesystem basically</div><div class='add'>+just has to provide a way to perform read and write RPC calls.</div><div class='add'>+</div><div class='add'>+The way I/O is organised inside netfslib consists of a number of objects:</div><div class='add'>+</div><div class='add'>+ * A *request*.  A request is used to track the progress of the I/O overall and</div><div class='add'>+   to hold on to resources.  The collection of results is done at the request</div><div class='add'>+   level.  The I/O within a request is divided into a number of parallel</div><div class='add'>+   streams of subrequests.</div><div class='add'>+</div><div class='add'>+ * A *stream*.  A non-overlapping series of subrequests.  The subrequests</div><div class='add'>+   within a stream do not have to be contiguous.</div><div class='add'>+</div><div class='add'>+ * A *subrequest*.  This is the basic unit of I/O.  It represents a single RPC</div><div class='add'>+   call or a single cache I/O operation.  The library passes these to the</div><div class='add'>+   filesystem and the cache to perform.</div><div class='add'>+</div><div class='add'>+Requests and Streams</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+When actually performing I/O (as opposed to just copying into the pagecache),</div><div class='add'>+netfslib will create one or more requests to track the progress of the I/O and</div><div class='add'>+to hold resources.</div><div class='add'>+</div><div class='add'>+A read operation will have a single stream and the subrequests within that</div><div class='add'>+stream may be of mixed origins, for instance mixing RPC subrequests and cache</div><div class='add'>+subrequests.</div><div class='add'>+</div><div class='add'>+On the other hand, a write operation may have multiple streams, where each</div><div class='add'>+stream targets a different destination.  For instance, there may be one stream</div><div class='add'>+writing to the local cache and one to the server.  Currently, only two streams</div><div class='add'>+are allowed, but this could be increased if parallel writes to multiple servers</div><div class='add'>+is desired.</div><div class='add'>+</div><div class='add'>+The subrequests within a write stream do not need to match alignment or size</div><div class='add'>+with the subrequests in another write stream and netfslib performs the tiling</div><div class='add'>+of subrequests in each stream over the source buffer independently.  Further,</div><div class='add'>+each stream may contain holes that don't correspond to holes in the other</div><div class='add'>+stream.</div><div class='add'>+</div><div class='add'>+In addition, the subrequests do not need to correspond to the boundaries of the</div><div class='add'>+folios or vectors in the source/destination buffer.  The library handles the</div><div class='add'>+collection of results and the wrangling of folio flags and references.</div><div class='add'>+</div><div class='add'>+Subrequests</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Subrequests are at the heart of the interaction between netfslib and the</div><div class='add'>+filesystem using it.  Each subrequest is expected to correspond to a single</div><div class='add'>+read or write RPC or cache operation.  The library will stitch together the</div><div class='add'>+results from a set of subrequests to provide a higher level operation.</div><div class='add'>+</div><div class='add'>+Netfslib has two interactions with the filesystem or the cache when setting up</div><div class='add'>+a subrequest.  First, there's an optional preparatory step that allows the</div><div class='add'>+filesystem to negotiate the limits on the subrequest, both in terms of maximum</div><div class='add'>+number of bytes and maximum number of vectors (e.g. for RDMA).  This may</div><div class='add'>+involve negotiating with the server (e.g. cifs needing to acquire credits).</div><div class='add'>+</div><div class='add'>+And, secondly, there's the issuing step in which the subrequest is handed off</div><div class='add'>+to the filesystem to perform.</div><div class='add'>+</div><div class='add'>+Note that these two steps are done slightly differently between read and write:</div><div class='add'>+</div><div class='add'>+ * For reads, the VM/VFS tells us how much is being requested up front, so the</div><div class='add'>+   library can preset maximum values that the cache and then the filesystem can</div><div class='add'>+   then reduce.  The cache also gets consulted first on whether it wants to do</div><div class='add'>+   a read before the filesystem is consulted.</div><div class='add'>+</div><div class='add'>+ * For writeback, it is unknown how much there will be to write until the</div><div class='add'>+   pagecache is walked, so no limit is set by the library.</div><div class='add'>+</div><div class='add'>+Once a subrequest is completed, the filesystem or cache informs the library of</div><div class='add'>+the completion and then collection is invoked.  Depending on whether the</div><div class='add'>+request is synchronous or asynchronous, the collection of results will be done</div><div class='add'>+in either the application thread or in a work queue.</div><div class='add'>+</div><div class='add'>+Result Collection and Retry</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+As subrequests complete, the results are collected and collated by the library</div><div class='add'>+and folio unlocking is performed progressively (if appropriate).  Once the</div><div class='add'>+request is complete, async completion will be invoked (again, if appropriate).</div><div class='add'>+It is possible for the filesystem to provide interim progress reports to the</div><div class='add'>+library to cause folio unlocking to happen earlier if possible.</div><div class='add'>+</div><div class='add'>+If any subrequests fail, netfslib can retry them.  It will wait until all</div><div class='add'>+subrequests are completed, offer the filesystem the opportunity to fiddle with</div><div class='add'>+the resources/state held by the request and poke at the subrequests before</div><div class='add'>+re-preparing and re-issuing the subrequests.</div><div class='add'>+</div><div class='add'>+This allows the tiling of contiguous sets of failed subrequest within a stream</div><div class='add'>+to be changed, adding more subrequests or ditching excess as necessary (for</div><div class='add'>+instance, if the network sizes change or the server decides it wants smaller</div><div class='add'>+chunks).</div><div class='add'>+</div><div class='add'>+Further, if one or more contiguous cache-read subrequests fail, the library</div><div class='add'>+will pass them to the filesystem to perform instead, renegotiating and retiling</div><div class='add'>+them as necessary to fit with the filesystem's parameters rather than those of</div><div class='add'>+the cache.</div><div class='add'>+</div><div class='add'>+Local Caching</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+One of the services netfslib provides, via ``fscache``, is the option to cache</div><div class='add'>+on local disk a copy of the data obtained from/written to a network filesystem.</div><div class='add'>+The library will manage the storing, retrieval and some invalidation of data</div><div class='add'>+automatically on behalf of the filesystem if a cookie is attached to the</div><div class='add'>+``netfs_inode``.</div><div class='add'>+</div><div class='add'>+Note that local caching used to use the PG_private_2 (aliased as PG_fscache) to</div><div class='add'>+keep track of a page that was being written to the cache, but this is now</div><div class='add'>+deprecated as PG_private_2 will be removed.</div><div class='add'>+</div><div class='add'>+Instead, folios that are read from the server for which there was no data in</div><div class='add'>+the cache will be marked as dirty and will have ``folio-&gt;private`` set to a</div><div class='add'>+special value (``NETFS_FOLIO_COPY_TO_CACHE``) and left to writeback to write.</div><div class='add'>+If the folio is modified before that happened, the special value will be</div><div class='add'>+cleared and the write will become normally dirty.</div><div class='add'>+</div><div class='add'>+When writeback occurs, folios that are so marked will only be written to the</div><div class='add'>+cache and not to the server.  Writeback handles mixed cache-only writes and</div><div class='add'>+server-and-cache writes by using two streams, sending one to the cache and one</div><div class='add'>+to the server.  The server stream will have gaps in it corresponding to those</div><div class='add'>+folios.</div><div class='add'>+</div><div class='add'>+Content Encryption (fscrypt)</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+Though it does not do so yet, at some point netfslib will acquire the ability</div><div class='add'>+to do client-side content encryption on behalf of the network filesystem (Ceph,</div><div class='add'>+for example).  fscrypt can be used for this if appropriate (it may not be -</div><div class='add'>+cifs, for example).</div><div class='add'>+</div><div class='add'>+The data will be stored encrypted in the local cache using the same manner of</div><div class='add'>+encryption as the data written to the server and the library will impose bounce</div><div class='add'>+buffering and RMW cycles as necessary.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Per-Inode Context</div><div class='hunk'>@@ -40,10 +194,13 @@ structure is defined::</div><div class='ctx'> 	struct netfs_inode {</div><div class='ctx'> 		struct inode inode;</div><div class='ctx'> 		const struct netfs_request_ops *ops;</div><div class='del'>-		struct fscache_cookie *cache;</div><div class='add'>+		struct fscache_cookie * cache;</div><div class='add'>+		loff_t remote_i_size;</div><div class='add'>+		unsigned long flags;</div><div class='add'>+		...</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-A network filesystem that wants to use netfs lib must place one of these in its</div><div class='add'>+A network filesystem that wants to use netfslib must place one of these in its</div><div class='ctx'> inode wrapper struct instead of the VFS ``struct inode``.  This can be done in</div><div class='ctx'> a way similar to the following::</div><div class='ctx'> </div><div class='hunk'>@@ -56,7 +213,8 @@ This allows netfslib to find its state by using ``container_of()`` from the</div><div class='ctx'> inode pointer, thereby allowing the netfslib helper functions to be pointed to</div><div class='ctx'> directly by the VFS/VM operation tables.</div><div class='ctx'> </div><div class='del'>-The structure contains the following fields:</div><div class='add'>+The structure contains the following fields that are of interest to the</div><div class='add'>+filesystem:</div><div class='ctx'> </div><div class='ctx'>  * ``inode``</div><div class='ctx'> </div><div class='hunk'>@@ -71,6 +229,37 @@ The structure contains the following fields:</div><div class='ctx'>    Local caching cookie, or NULL if no caching is enabled.  This field does not</div><div class='ctx'>    exist if fscache is disabled.</div><div class='ctx'> </div><div class='add'>+ * ``remote_i_size``</div><div class='add'>+</div><div class='add'>+   The size of the file on the server.  This differs from inode-&gt;i_size if</div><div class='add'>+   local modifications have been made but not yet written back.</div><div class='add'>+</div><div class='add'>+ * ``flags``</div><div class='add'>+</div><div class='add'>+   A set of flags, some of which the filesystem might be interested in:</div><div class='add'>+</div><div class='add'>+   * ``NETFS_ICTX_MODIFIED_ATTR``</div><div class='add'>+</div><div class='add'>+     Set if netfslib modifies mtime/ctime.  The filesystem is free to ignore</div><div class='add'>+     this or clear it.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_ICTX_UNBUFFERED``</div><div class='add'>+</div><div class='add'>+     Do unbuffered I/O upon the file.  Like direct I/O but without the</div><div class='add'>+     alignment limitations.  RMW will be performed if necessary.  The pagecache</div><div class='add'>+     will not be used unless mmap() is also used.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_ICTX_WRITETHROUGH``</div><div class='add'>+</div><div class='add'>+     Do writethrough caching upon the file.  I/O will be set up and dispatched</div><div class='add'>+     as buffered writes are made to the page cache.  mmap() does the normal</div><div class='add'>+     writeback thing.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_ICTX_SINGLE_NO_UPLOAD``</div><div class='add'>+</div><div class='add'>+     Set if the file has a monolithic content that must be read entirely in a</div><div class='add'>+     single go and must not be written back to the server, though it can be</div><div class='add'>+     cached (e.g. AFS directories).</div><div class='ctx'> </div><div class='ctx'> Inode Context Helper Functions</div><div class='ctx'> ------------------------------</div><div class='hunk'>@@ -84,117 +273,250 @@ set the operations table pointer::</div><div class='ctx'> </div><div class='ctx'> then a function to cast from the VFS inode structure to the netfs context::</div><div class='ctx'> </div><div class='del'>-	struct netfs_inode *netfs_node(struct inode *inode);</div><div class='add'>+	struct netfs_inode *netfs_inode(struct inode *inode);</div><div class='ctx'> </div><div class='ctx'> and finally, a function to get the cache cookie pointer from the context</div><div class='ctx'> attached to an inode (or NULL if fscache is disabled)::</div><div class='ctx'> </div><div class='ctx'> 	struct fscache_cookie *netfs_i_cookie(struct netfs_inode *ctx);</div><div class='ctx'> </div><div class='add'>+Inode Locking</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+A number of functions are provided to manage the locking of i_rwsem for I/O and</div><div class='add'>+to effectively extend it to provide more separate classes of exclusion::</div><div class='add'>+</div><div class='add'>+	int netfs_start_io_read(struct inode *inode);</div><div class='add'>+	void netfs_end_io_read(struct inode *inode);</div><div class='add'>+	int netfs_start_io_write(struct inode *inode);</div><div class='add'>+	void netfs_end_io_write(struct inode *inode);</div><div class='add'>+	int netfs_start_io_direct(struct inode *inode);</div><div class='add'>+	void netfs_end_io_direct(struct inode *inode);</div><div class='add'>+</div><div class='add'>+The exclusion breaks down into four separate classes:</div><div class='add'>+</div><div class='add'>+ 1) Buffered reads and writes.</div><div class='add'>+</div><div class='add'>+    Buffered reads can run concurrently each other and with buffered writes,</div><div class='add'>+    but buffered writes cannot run concurrently with each other.</div><div class='add'>+</div><div class='add'>+ 2) Direct reads and writes.</div><div class='add'>+</div><div class='add'>+    Direct (and unbuffered) reads and writes can run concurrently since they do</div><div class='add'>+    not share local buffering (i.e. the pagecache) and, in a network</div><div class='add'>+    filesystem, are expected to have exclusion managed on the server (though</div><div class='add'>+    this may not be the case for, say, Ceph).</div><div class='add'>+</div><div class='add'>+ 3) Other major inode modifying operations (e.g. truncate, fallocate).</div><div class='add'>+</div><div class='add'>+    These should just access i_rwsem directly.</div><div class='add'>+</div><div class='add'>+ 4) mmap().</div><div class='add'>+</div><div class='add'>+    mmap'd accesses might operate concurrently with any of the other classes.</div><div class='add'>+    They might form the buffer for an intra-file loopback DIO read/write.  They</div><div class='add'>+    might be permitted on unbuffered files.</div><div class='add'>+</div><div class='add'>+Inode Writeback</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Netfslib will pin resources on an inode for future writeback (such as pinning</div><div class='add'>+use of an fscache cookie) when an inode is dirtied.  However, this pinning</div><div class='add'>+needs careful management.  To manage the pinning, the following sequence</div><div class='add'>+occurs:</div><div class='add'>+</div><div class='add'>+ 1) An inode state flag ``I_PINNING_NETFS_WB`` is set by netfslib when the</div><div class='add'>+    pinning begins (when a folio is dirtied, for example) if the cache is</div><div class='add'>+    active to stop the cache structures from being discarded and the cache</div><div class='add'>+    space from being culled.  This also prevents re-getting of cache resources</div><div class='add'>+    if the flag is already set.</div><div class='add'>+</div><div class='add'>+ 2) This flag then cleared inside the inode lock during inode writeback in the</div><div class='add'>+    VM - and the fact that it was set is transferred to ``-&gt;unpinned_netfs_wb``</div><div class='add'>+    in ``struct writeback_control``.</div><div class='add'>+</div><div class='add'>+ 3) If ``-&gt;unpinned_netfs_wb`` is now set, the write_inode procedure is forced.</div><div class='add'>+</div><div class='add'>+ 4) The filesystem's ``-&gt;write_inode()`` function is invoked to do the cleanup.</div><div class='add'>+</div><div class='add'>+ 5) The filesystem invokes netfs to do its cleanup.</div><div class='add'>+</div><div class='add'>+To do the cleanup, netfslib provides a function to do the resource unpinning::</div><div class='add'>+</div><div class='add'>+	int netfs_unpin_writeback(struct inode *inode, struct writeback_control *wbc);</div><div class='add'>+</div><div class='add'>+If the filesystem doesn't need to do anything else, this may be set as a its</div><div class='add'>+``.write_inode`` method.</div><div class='add'>+</div><div class='add'>+Further, if an inode is deleted, the filesystem's write_inode method may not</div><div class='add'>+get called, so::</div><div class='add'>+</div><div class='add'>+	void netfs_clear_inode_writeback(struct inode *inode, const void *aux);</div><div class='ctx'> </div><div class='del'>-Buffered Read Helpers</div><div class='del'>-=====================</div><div class='add'>+must be called from ``-&gt;evict_inode()`` *before* ``clear_inode()`` is called.</div><div class='ctx'> </div><div class='del'>-The library provides a set of read helpers that handle the -&gt;read_folio(),</div><div class='del'>--&gt;readahead() and much of the -&gt;write_begin() VM operations and translate them</div><div class='del'>-into a common call framework.</div><div class='ctx'> </div><div class='del'>-The following services are provided:</div><div class='add'>+High-Level VFS API</div><div class='add'>+==================</div><div class='ctx'> </div><div class='del'>- * Handle folios that span multiple pages.</div><div class='add'>+Netfslib provides a number of sets of API calls for the filesystem to delegate</div><div class='add'>+VFS operations to.  Netfslib, in turn, will call out to the filesystem and the</div><div class='add'>+cache to negotiate I/O sizes, issue RPCs and provide places for it to intervene</div><div class='add'>+at various times.</div><div class='ctx'> </div><div class='del'>- * Insulate the netfs from VM interface changes.</div><div class='add'>+Unlocked Read/Write Iter</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='del'>- * Allow the netfs to arbitrarily split reads up into pieces, even ones that</div><div class='del'>-   don't match folio sizes or folio alignments and that may cross folios.</div><div class='add'>+The first API set is for the delegation of operations to netfslib when the</div><div class='add'>+filesystem is called through the standard VFS read/write_iter methods::</div><div class='ctx'> </div><div class='del'>- * Allow the netfs to expand a readahead request in both directions to meet its</div><div class='del'>-   needs.</div><div class='add'>+	ssize_t netfs_file_read_iter(struct kiocb *iocb, struct iov_iter *iter);</div><div class='add'>+	ssize_t netfs_file_write_iter(struct kiocb *iocb, struct iov_iter *from);</div><div class='add'>+	ssize_t netfs_buffered_read_iter(struct kiocb *iocb, struct iov_iter *iter);</div><div class='add'>+	ssize_t netfs_unbuffered_read_iter(struct kiocb *iocb, struct iov_iter *iter);</div><div class='add'>+	ssize_t netfs_unbuffered_write_iter(struct kiocb *iocb, struct iov_iter *from);</div><div class='ctx'> </div><div class='del'>- * Allow the netfs to partially fulfil a read, which will then be resubmitted.</div><div class='add'>+They can be assigned directly to ``.read_iter`` and ``.write_iter``.  They</div><div class='add'>+perform the inode locking themselves and the first two will switch between</div><div class='add'>+buffered I/O and DIO as appropriate.</div><div class='ctx'> </div><div class='del'>- * Handle local caching, allowing cached data and server-read data to be</div><div class='del'>-   interleaved for a single request.</div><div class='add'>+Pre-Locked Read/Write Iter</div><div class='add'>+--------------------------</div><div class='ctx'> </div><div class='del'>- * Handle clearing of bufferage that isn't on the server.</div><div class='add'>+The second API set is for the delegation of operations to netfslib when the</div><div class='add'>+filesystem is called through the standard VFS methods, but needs to do some</div><div class='add'>+other stuff before or after calling netfslib whilst still inside locked section</div><div class='add'>+(e.g. Ceph negotiating caps).  The unbuffered read function is::</div><div class='ctx'> </div><div class='del'>- * Handle retrying of reads that failed, switching reads from the cache to the</div><div class='del'>-   server as necessary.</div><div class='add'>+	ssize_t netfs_unbuffered_read_iter_locked(struct kiocb *iocb, struct iov_iter *iter);</div><div class='ctx'> </div><div class='del'>- * In the future, this is a place that other services can be performed, such as</div><div class='del'>-   local encryption of data to be stored remotely or in the cache.</div><div class='add'>+This must not be assigned directly to ``.read_iter`` and the filesystem is</div><div class='add'>+responsible for performing the inode locking before calling it.  In the case of</div><div class='add'>+buffered read, the filesystem should use ``filemap_read()``.</div><div class='ctx'> </div><div class='del'>-From the network filesystem, the helpers require a table of operations.  This</div><div class='del'>-includes a mandatory method to issue a read operation along with a number of</div><div class='del'>-optional methods.</div><div class='add'>+There are three functions for writes::</div><div class='ctx'> </div><div class='add'>+	ssize_t netfs_buffered_write_iter_locked(struct kiocb *iocb, struct iov_iter *from,</div><div class='add'>+						 struct netfs_group *netfs_group);</div><div class='add'>+	ssize_t netfs_perform_write(struct kiocb *iocb, struct iov_iter *iter,</div><div class='add'>+				    struct netfs_group *netfs_group);</div><div class='add'>+	ssize_t netfs_unbuffered_write_iter_locked(struct kiocb *iocb, struct iov_iter *iter,</div><div class='add'>+						   struct netfs_group *netfs_group);</div><div class='ctx'> </div><div class='del'>-Read Helper Functions</div><div class='add'>+These must not be assigned directly to ``.write_iter`` and the filesystem is</div><div class='add'>+responsible for performing the inode locking before calling them.</div><div class='add'>+</div><div class='add'>+The first two functions are for buffered writes; the first just adds some</div><div class='add'>+standard write checks and jumps to the second, but if the filesystem wants to</div><div class='add'>+do the checks itself, it can use the second directly.  The third function is</div><div class='add'>+for unbuffered or DIO writes.</div><div class='add'>+</div><div class='add'>+On all three write functions, there is a writeback group pointer (which should</div><div class='add'>+be NULL if the filesystem doesn't use this).  Writeback groups are set on</div><div class='add'>+folios when they're modified.  If a folio to-be-modified is already marked with</div><div class='add'>+a different group, it is flushed first.  The writeback API allows writing back</div><div class='add'>+of a specific group.</div><div class='add'>+</div><div class='add'>+Memory-Mapped I/O API</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='del'>-Three read helpers are provided::</div><div class='add'>+An API for support of mmap()'d I/O is provided::</div><div class='add'>+</div><div class='add'>+	vm_fault_t netfs_page_mkwrite(struct vm_fault *vmf, struct netfs_group *netfs_group);</div><div class='add'>+</div><div class='add'>+This allows the filesystem to delegate ``.page_mkwrite`` to netfslib.  The</div><div class='add'>+filesystem should not take the inode lock before calling it, but, as with the</div><div class='add'>+locked write functions above, this does take a writeback group pointer.  If the</div><div class='add'>+page to be made writable is in a different group, it will be flushed first.</div><div class='add'>+</div><div class='add'>+Monolithic Files API</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+There is also a special API set for files for which the content must be read in</div><div class='add'>+a single RPC (and not written back) and is maintained as a monolithic blob</div><div class='add'>+(e.g. an AFS directory), though it can be stored and updated in the local cache::</div><div class='add'>+</div><div class='add'>+	ssize_t netfs_read_single(struct inode *inode, struct file *file, struct iov_iter *iter);</div><div class='add'>+	void netfs_single_mark_inode_dirty(struct inode *inode);</div><div class='add'>+	int netfs_writeback_single(struct address_space *mapping,</div><div class='add'>+				   struct writeback_control *wbc,</div><div class='add'>+				   struct iov_iter *iter);</div><div class='add'>+</div><div class='add'>+The first function reads from a file into the given buffer, reading from the</div><div class='add'>+cache in preference if the data is cached there; the second function allows the</div><div class='add'>+inode to be marked dirty, causing a later writeback; and the third function can</div><div class='add'>+be called from the writeback code to write the data to the cache, if there is</div><div class='add'>+one.</div><div class='ctx'> </div><div class='del'>-	void netfs_readahead(struct readahead_control *ractl);</div><div class='del'>-	int netfs_read_folio(struct file *file,</div><div class='del'>-			     struct folio *folio);</div><div class='del'>-	int netfs_write_begin(struct netfs_inode *ctx,</div><div class='del'>-			      struct file *file,</div><div class='del'>-			      struct address_space *mapping,</div><div class='del'>-			      loff_t pos,</div><div class='del'>-			      unsigned int len,</div><div class='del'>-			      struct folio **_folio,</div><div class='del'>-			      void **_fsdata);</div><div class='add'>+The inode should be marked ``NETFS_ICTX_SINGLE_NO_UPLOAD`` if this API is to be</div><div class='add'>+used.  The writeback function requires the buffer to be of ITER_FOLIOQ type.</div><div class='ctx'> </div><div class='del'>-Each corresponds to a VM address space operation.  These operations use the</div><div class='del'>-state in the per-inode context.</div><div class='add'>+High-Level VM API</div><div class='add'>+==================</div><div class='ctx'> </div><div class='del'>-For -&gt;readahead() and -&gt;read_folio(), the network filesystem just point directly</div><div class='del'>-at the corresponding read helper; whereas for -&gt;write_begin(), it may be a</div><div class='del'>-little more complicated as the network filesystem might want to flush</div><div class='del'>-conflicting writes or track dirty data and needs to put the acquired folio if</div><div class='del'>-an error occurs after calling the helper.</div><div class='add'>+Netfslib also provides a number of sets of API calls for the filesystem to</div><div class='add'>+delegate VM operations to.  Again, netfslib, in turn, will call out to the</div><div class='add'>+filesystem and the cache to negotiate I/O sizes, issue RPCs and provide places</div><div class='add'>+for it to intervene at various times::</div><div class='ctx'> </div><div class='del'>-The helpers manage the read request, calling back into the network filesystem</div><div class='del'>-through the supplied table of operations.  Waits will be performed as</div><div class='del'>-necessary before returning for helpers that are meant to be synchronous.</div><div class='add'>+	void netfs_readahead(struct readahead_control *);</div><div class='add'>+	int netfs_read_folio(struct file *, struct folio *);</div><div class='add'>+	int netfs_writepages(struct address_space *mapping,</div><div class='add'>+			     struct writeback_control *wbc);</div><div class='add'>+	bool netfs_dirty_folio(struct address_space *mapping, struct folio *folio);</div><div class='add'>+	void netfs_invalidate_folio(struct folio *folio, size_t offset, size_t length);</div><div class='add'>+	bool netfs_release_folio(struct folio *folio, gfp_t gfp);</div><div class='ctx'> </div><div class='del'>-If an error occurs, the -&gt;free_request() will be called to clean up the</div><div class='del'>-netfs_io_request struct allocated.  If some parts of the request are in</div><div class='del'>-progress when an error occurs, the request will get partially completed if</div><div class='del'>-sufficient data is read.</div><div class='add'>+These are ``address_space_operations`` methods and can be set directly in the</div><div class='add'>+operations table.</div><div class='ctx'> </div><div class='del'>-Additionally, there is::</div><div class='add'>+Deprecated PG_private_2 API</div><div class='add'>+---------------------------</div><div class='ctx'> </div><div class='del'>-  * void netfs_subreq_terminated(struct netfs_io_subrequest *subreq,</div><div class='del'>-				 ssize_t transferred_or_error,</div><div class='del'>-				 bool was_async);</div><div class='add'>+There is also a deprecated function for filesystems that still use the</div><div class='add'>+``-&gt;write_begin`` method::</div><div class='ctx'> </div><div class='del'>-which should be called to complete a read subrequest.  This is given the number</div><div class='del'>-of bytes transferred or a negative error code, plus a flag indicating whether</div><div class='del'>-the operation was asynchronous (ie. whether the follow-on processing can be</div><div class='del'>-done in the current context, given this may involve sleeping).</div><div class='add'>+	int netfs_write_begin(struct netfs_inode *inode, struct file *file,</div><div class='add'>+			      struct address_space *mapping, loff_t pos, unsigned int len,</div><div class='add'>+			      struct folio **_folio, void **_fsdata);</div><div class='ctx'> </div><div class='add'>+It uses the deprecated PG_private_2 flag and so should not be used.</div><div class='ctx'> </div><div class='del'>-Read Helper Structures</div><div class='del'>-----------------------</div><div class='ctx'> </div><div class='del'>-The read helpers make use of a couple of structures to maintain the state of</div><div class='del'>-the read.  The first is a structure that manages a read request as a whole::</div><div class='add'>+I/O Request API</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+The I/O request API comprises a number of structures and a number of functions</div><div class='add'>+that the filesystem may need to use.</div><div class='add'>+</div><div class='add'>+Request Structure</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+The request structure manages the request as a whole, holding some resources</div><div class='add'>+and state on behalf of the filesystem and tracking the collection of results::</div><div class='ctx'> </div><div class='ctx'> 	struct netfs_io_request {</div><div class='add'>+		enum netfs_io_origin	origin;</div><div class='ctx'> 		struct inode		*inode;</div><div class='ctx'> 		struct address_space	*mapping;</div><div class='del'>-		struct netfs_cache_resources cache_resources;</div><div class='add'>+		struct netfs_group	*group;</div><div class='add'>+		struct netfs_io_stream	io_streams[];</div><div class='ctx'> 		void			*netfs_priv;</div><div class='del'>-		loff_t			start;</div><div class='del'>-		size_t			len;</div><div class='del'>-		loff_t			i_size;</div><div class='del'>-		const struct netfs_request_ops *netfs_ops;</div><div class='add'>+		void			*netfs_priv2;</div><div class='add'>+		unsigned long long	start;</div><div class='add'>+		unsigned long long	len;</div><div class='add'>+		unsigned long long	i_size;</div><div class='ctx'> 		unsigned int		debug_id;</div><div class='add'>+		unsigned long		flags;</div><div class='ctx'> 		...</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-The above fields are the ones the netfs can use.  They are:</div><div class='add'>+Many of the fields are for internal use, but the fields shown here are of</div><div class='add'>+interest to the filesystem:</div><div class='add'>+</div><div class='add'>+ * ``origin``</div><div class='add'>+</div><div class='add'>+   The origin of the request (readahead, read_folio, DIO read, writeback, ...).</div><div class='ctx'> </div><div class='ctx'>  * ``inode``</div><div class='ctx'>  * ``mapping``</div><div class='hunk'>@@ -202,11 +524,19 @@ The above fields are the ones the netfs can use.  They are:</div><div class='ctx'>    The inode and the address space of the file being read from.  The mapping</div><div class='ctx'>    may or may not point to inode-&gt;i_data.</div><div class='ctx'> </div><div class='del'>- * ``cache_resources``</div><div class='add'>+ * ``group``</div><div class='add'>+</div><div class='add'>+   The writeback group this request is dealing with or NULL.  This holds a ref</div><div class='add'>+   on the group.</div><div class='add'>+</div><div class='add'>+ * ``io_streams``</div><div class='ctx'> </div><div class='del'>-   Resources for the local cache to use, if present.</div><div class='add'>+   The parallel streams of subrequests available to the request.  Currently two</div><div class='add'>+   are available, but this may be made extensible in future.  ``NR_IO_STREAMS``</div><div class='add'>+   indicates the size of the array.</div><div class='ctx'> </div><div class='ctx'>  * ``netfs_priv``</div><div class='add'>+ * ``netfs_priv2``</div><div class='ctx'> </div><div class='ctx'>    The network filesystem's private data.  The value for this can be passed in</div><div class='ctx'>    to the helper functions or set during the request.</div><div class='hunk'>@@ -221,37 +551,121 @@ The above fields are the ones the netfs can use.  They are:</div><div class='ctx'> </div><div class='ctx'>    The size of the file at the start of the request.</div><div class='ctx'> </div><div class='del'>- * ``netfs_ops``</div><div class='del'>-</div><div class='del'>-   A pointer to the operation table.  The value for this is passed into the</div><div class='del'>-   helper functions.</div><div class='del'>-</div><div class='ctx'>  * ``debug_id``</div><div class='ctx'> </div><div class='ctx'>    A number allocated to this operation that can be displayed in trace lines</div><div class='ctx'>    for reference.</div><div class='ctx'> </div><div class='add'>+ * ``flags``</div><div class='add'>+</div><div class='add'>+   Flags for managing and controlling the operation of the request.  Some of</div><div class='add'>+   these may be of interest to the filesystem:</div><div class='add'>+</div><div class='add'>+   * ``NETFS_RREQ_RETRYING``</div><div class='add'>+</div><div class='add'>+     Netfslib sets this when generating retries.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_RREQ_PAUSE``</div><div class='add'>+</div><div class='add'>+     The filesystem can set this to request to pause the library's subrequest</div><div class='add'>+     issuing loop - but care needs to be taken as netfslib may also set it.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_RREQ_NONBLOCK``</div><div class='add'>+   * ``NETFS_RREQ_BLOCKED``</div><div class='add'>+</div><div class='add'>+     Netfslib sets the first to indicate that non-blocking mode was set by the</div><div class='add'>+     caller and the filesystem can set the second to indicate that it would</div><div class='add'>+     have had to block.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_RREQ_USE_PGPRIV2``</div><div class='add'>+</div><div class='add'>+     The filesystem can set this if it wants to use PG_private_2 to track</div><div class='add'>+     whether a folio is being written to the cache.  This is deprecated as</div><div class='add'>+     PG_private_2 is going to go away.</div><div class='add'>+</div><div class='add'>+If the filesystem wants more private data than is afforded by this structure,</div><div class='add'>+then it should wrap it and provide its own allocator.</div><div class='add'>+</div><div class='add'>+Stream Structure</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+A request is comprised of one or more parallel streams and each stream may be</div><div class='add'>+aimed at a different target.</div><div class='add'>+</div><div class='add'>+For read requests, only stream 0 is used.  This can contain a mixture of</div><div class='add'>+subrequests aimed at different sources.  For write requests, stream 0 is used</div><div class='add'>+for the server and stream 1 is used for the cache.  For buffered writeback,</div><div class='add'>+stream 0 is not enabled unless a normal dirty folio is encountered, at which</div><div class='add'>+point -&gt;begin_writeback() will be invoked and the filesystem can mark the</div><div class='add'>+stream available.</div><div class='add'>+</div><div class='add'>+The stream struct looks like::</div><div class='add'>+</div><div class='add'>+	struct netfs_io_stream {</div><div class='add'>+		unsigned char		stream_nr;</div><div class='add'>+		bool			avail;</div><div class='add'>+		size_t			sreq_max_len;</div><div class='add'>+		unsigned int		sreq_max_segs;</div><div class='add'>+		unsigned int		submit_extendable_to;</div><div class='add'>+		...</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+A number of members are available for access/use by the filesystem:</div><div class='add'>+</div><div class='add'>+ * ``stream_nr``</div><div class='add'>+</div><div class='add'>+   The number of the stream within the request.</div><div class='add'>+</div><div class='add'>+ * ``avail``</div><div class='add'>+</div><div class='add'>+   True if the stream is available for use.  The filesystem should set this on</div><div class='add'>+   stream zero if in -&gt;begin_writeback().</div><div class='add'>+</div><div class='add'>+ * ``sreq_max_len``</div><div class='add'>+ * ``sreq_max_segs``</div><div class='add'>+</div><div class='add'>+   These are set by the filesystem or the cache in -&gt;prepare_read() or</div><div class='add'>+   -&gt;prepare_write() for each subrequest to indicate the maximum number of</div><div class='add'>+   bytes and, optionally, the maximum number of segments (if not 0) that that</div><div class='add'>+   subrequest can support.</div><div class='add'>+</div><div class='add'>+ * ``submit_extendable_to``</div><div class='ctx'> </div><div class='del'>-The second structure is used to manage individual slices of the overall read</div><div class='del'>-request::</div><div class='add'>+   The size that a subrequest can be rounded up to beyond the EOF, given the</div><div class='add'>+   available buffer.  This allows the cache to work out if it can do a DIO read</div><div class='add'>+   or write that straddles the EOF marker.</div><div class='add'>+</div><div class='add'>+Subrequest Structure</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Individual units of I/O are managed by the subrequest structure.  These</div><div class='add'>+represent slices of the overall request and run independently::</div><div class='ctx'> </div><div class='ctx'> 	struct netfs_io_subrequest {</div><div class='ctx'> 		struct netfs_io_request *rreq;</div><div class='del'>-		loff_t			start;</div><div class='add'>+		struct iov_iter		io_iter;</div><div class='add'>+		unsigned long long	start;</div><div class='ctx'> 		size_t			len;</div><div class='ctx'> 		size_t			transferred;</div><div class='ctx'> 		unsigned long		flags;</div><div class='add'>+		short			error;</div><div class='ctx'> 		unsigned short		debug_index;</div><div class='add'>+		unsigned char		stream_nr;</div><div class='ctx'> 		...</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-Each subrequest is expected to access a single source, though the helpers will</div><div class='add'>+Each subrequest is expected to access a single source, though the library will</div><div class='ctx'> handle falling back from one source type to another.  The members are:</div><div class='ctx'> </div><div class='ctx'>  * ``rreq``</div><div class='ctx'> </div><div class='ctx'>    A pointer to the read request.</div><div class='ctx'> </div><div class='add'>+ * ``io_iter``</div><div class='add'>+</div><div class='add'>+   An I/O iterator representing a slice of the buffer to be read into or</div><div class='add'>+   written from.</div><div class='add'>+</div><div class='ctx'>  * ``start``</div><div class='ctx'>  * ``len``</div><div class='ctx'> </div><div class='hunk'>@@ -260,241 +674,300 @@ handle falling back from one source type to another.  The members are:</div><div class='ctx'> </div><div class='ctx'>  * ``transferred``</div><div class='ctx'> </div><div class='del'>-   The amount of data transferred so far of the length of this slice.  The</div><div class='del'>-   network filesystem or cache should start the operation this far into the</div><div class='del'>-   slice.  If a short read occurs, the helpers will call again, having updated</div><div class='del'>-   this to reflect the amount read so far.</div><div class='add'>+   The amount of data transferred so far for this subrequest.  This should be</div><div class='add'>+   added to with the length of the transfer made by this issuance of the</div><div class='add'>+   subrequest.  If this is less than ``len`` then the subrequest may be</div><div class='add'>+   reissued to continue.</div><div class='ctx'> </div><div class='ctx'>  * ``flags``</div><div class='ctx'> </div><div class='del'>-   Flags pertaining to the read.  There are two of interest to the filesystem</div><div class='del'>-   or cache:</div><div class='add'>+   Flags for managing the subrequest.  There are a number of interest to the</div><div class='add'>+   filesystem or cache:</div><div class='add'>+</div><div class='add'>+   * ``NETFS_SREQ_MADE_PROGRESS``</div><div class='add'>+</div><div class='add'>+     Set by the filesystem to indicates that at least one byte of data was read</div><div class='add'>+     or written.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_SREQ_HIT_EOF``</div><div class='add'>+</div><div class='add'>+     The filesystem should set this if a read hit the EOF on the file (in which</div><div class='add'>+     case ``transferred`` should stop at the EOF).  Netfslib may expand the</div><div class='add'>+     subrequest out to the size of the folio containing the EOF on the off</div><div class='add'>+     chance that a third party change happened or a DIO read may have asked for</div><div class='add'>+     more than is available.  The library will clear any excess pagecache.</div><div class='ctx'> </div><div class='ctx'>    * ``NETFS_SREQ_CLEAR_TAIL``</div><div class='ctx'> </div><div class='del'>-     This can be set to indicate that the remainder of the slice, from</div><div class='del'>-     transferred to len, should be cleared.</div><div class='add'>+     The filesystem can set this to indicate that the remainder of the slice,</div><div class='add'>+     from transferred to len, should be cleared.  Do not set if HIT_EOF is set.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_SREQ_NEED_RETRY``</div><div class='add'>+</div><div class='add'>+     The filesystem can set this to tell netfslib to retry the subrequest.</div><div class='add'>+</div><div class='add'>+   * ``NETFS_SREQ_BOUNDARY``</div><div class='add'>+</div><div class='add'>+     This can be set by the filesystem on a subrequest to indicate that it ends</div><div class='add'>+     at a boundary with the filesystem structure (e.g. at the end of a Ceph</div><div class='add'>+     object).  It tells netfslib not to retile subrequests across it.</div><div class='ctx'> </div><div class='ctx'>    * ``NETFS_SREQ_SEEK_DATA_READ``</div><div class='ctx'> </div><div class='del'>-     This is a hint to the cache that it might want to try skipping ahead to</div><div class='del'>-     the next data (ie. using SEEK_DATA).</div><div class='add'>+     This is a hint from netfslib to the cache that it might want to try</div><div class='add'>+     skipping ahead to the next data (ie. using SEEK_DATA).</div><div class='add'>+</div><div class='add'>+ * ``error``</div><div class='add'>+</div><div class='add'>+   This is for the filesystem to store result of the subrequest.  It should be</div><div class='add'>+   set to 0 if successful and a negative error code otherwise.</div><div class='ctx'> </div><div class='ctx'>  * ``debug_index``</div><div class='add'>+ * ``stream_nr``</div><div class='ctx'> </div><div class='ctx'>    A number allocated to this slice that can be displayed in trace lines for</div><div class='del'>-   reference.</div><div class='add'>+   reference and the number of the request stream that it belongs to.</div><div class='ctx'> </div><div class='add'>+If necessary, the filesystem can get and put extra refs on the subrequest it is</div><div class='add'>+given::</div><div class='ctx'> </div><div class='del'>-Read Helper Operations</div><div class='del'>-----------------------</div><div class='add'>+	void netfs_get_subrequest(struct netfs_io_subrequest *subreq,</div><div class='add'>+				  enum netfs_sreq_ref_trace what);</div><div class='add'>+	void netfs_put_subrequest(struct netfs_io_subrequest *subreq,</div><div class='add'>+				  enum netfs_sreq_ref_trace what);</div><div class='ctx'> </div><div class='del'>-The network filesystem must provide the read helpers with a table of operations</div><div class='del'>-through which it can issue requests and negotiate::</div><div class='add'>+using netfs trace codes to indicate the reason.  Care must be taken, however,</div><div class='add'>+as once control of the subrequest is returned to netfslib, the same subrequest</div><div class='add'>+can be reissued/retried.</div><div class='add'>+</div><div class='add'>+Filesystem Methods</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+The filesystem sets a table of operations in ``netfs_inode`` for netfslib to</div><div class='add'>+use::</div><div class='ctx'> </div><div class='ctx'> 	struct netfs_request_ops {</div><div class='del'>-		void (*init_request)(struct netfs_io_request *rreq, struct file *file);</div><div class='add'>+		mempool_t *request_pool;</div><div class='add'>+		mempool_t *subrequest_pool;</div><div class='add'>+		int (*init_request)(struct netfs_io_request *rreq, struct file *file);</div><div class='ctx'> 		void (*free_request)(struct netfs_io_request *rreq);</div><div class='add'>+		void (*free_subrequest)(struct netfs_io_subrequest *rreq);</div><div class='ctx'> 		void (*expand_readahead)(struct netfs_io_request *rreq);</div><div class='del'>-		bool (*clamp_length)(struct netfs_io_subrequest *subreq);</div><div class='add'>+		int (*prepare_read)(struct netfs_io_subrequest *subreq);</div><div class='ctx'> 		void (*issue_read)(struct netfs_io_subrequest *subreq);</div><div class='del'>-		bool (*is_still_valid)(struct netfs_io_request *rreq);</div><div class='del'>-		int (*check_write_begin)(struct file *file, loff_t pos, unsigned len,</div><div class='del'>-					 struct folio **foliop, void **_fsdata);</div><div class='ctx'> 		void (*done)(struct netfs_io_request *rreq);</div><div class='add'>+		void (*update_i_size)(struct inode *inode, loff_t i_size);</div><div class='add'>+		void (*post_modify)(struct inode *inode);</div><div class='add'>+		void (*begin_writeback)(struct netfs_io_request *wreq);</div><div class='add'>+		void (*prepare_write)(struct netfs_io_subrequest *subreq);</div><div class='add'>+		void (*issue_write)(struct netfs_io_subrequest *subreq);</div><div class='add'>+		void (*retry_request)(struct netfs_io_request *wreq,</div><div class='add'>+				      struct netfs_io_stream *stream);</div><div class='add'>+		void (*invalidate_cache)(struct netfs_io_request *wreq);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-The operations are as follows:</div><div class='del'>-</div><div class='del'>- * ``init_request()``</div><div class='add'>+The table starts with a pair of optional pointers to memory pools from which</div><div class='add'>+requests and subrequests can be allocated.  If these are not given, netfslib</div><div class='add'>+has default pools that it will use instead.  If the filesystem wraps the netfs</div><div class='add'>+structs in its own larger structs, then it will need to use its own pools.</div><div class='add'>+Netfslib will allocate directly from the pools.</div><div class='ctx'> </div><div class='del'>-   [Optional] This is called to initialise the request structure.  It is given</div><div class='del'>-   the file for reference.</div><div class='add'>+The methods defined in the table are:</div><div class='ctx'> </div><div class='add'>+ * ``init_request()``</div><div class='ctx'>  * ``free_request()``</div><div class='add'>+ * ``free_subrequest()``</div><div class='ctx'> </div><div class='del'>-   [Optional] This is called as the request is being deallocated so that the</div><div class='del'>-   filesystem can clean up any state it has attached there.</div><div class='add'>+   [Optional] A filesystem may implement these to initialise or clean up any</div><div class='add'>+   resources that it attaches to the request or subrequest.</div><div class='ctx'> </div><div class='ctx'>  * ``expand_readahead()``</div><div class='ctx'> </div><div class='ctx'>    [Optional] This is called to allow the filesystem to expand the size of a</div><div class='del'>-   readahead read request.  The filesystem gets to expand the request in both</div><div class='del'>-   directions, though it's not permitted to reduce it as the numbers may</div><div class='del'>-   represent an allocation already made.  If local caching is enabled, it gets</div><div class='del'>-   to expand the request first.</div><div class='add'>+   readahead request.  The filesystem gets to expand the request in both</div><div class='add'>+   directions, though it must retain the initial region as that may represent</div><div class='add'>+   an allocation already made.  If local caching is enabled, it gets to expand</div><div class='add'>+   the request first.</div><div class='ctx'> </div><div class='ctx'>    Expansion is communicated by changing -&gt;start and -&gt;len in the request</div><div class='ctx'>    structure.  Note that if any change is made, -&gt;len must be increased by at</div><div class='ctx'>    least as much as -&gt;start is reduced.</div><div class='ctx'> </div><div class='del'>- * ``clamp_length()``</div><div class='del'>-</div><div class='del'>-   [Optional] This is called to allow the filesystem to reduce the size of a</div><div class='del'>-   subrequest.  The filesystem can use this, for example, to chop up a request</div><div class='del'>-   that has to be split across multiple servers or to put multiple reads in</div><div class='del'>-   flight.</div><div class='del'>-</div><div class='del'>-   This should return 0 on success and an error code on error.</div><div class='del'>-</div><div class='del'>- * ``issue_read()``</div><div class='add'>+ * ``prepare_read()``</div><div class='ctx'> </div><div class='del'>-   [Required] The helpers use this to dispatch a subrequest to the server for</div><div class='del'>-   reading.  In the subrequest, -&gt;start, -&gt;len and -&gt;transferred indicate what</div><div class='del'>-   data should be read from the server.</div><div class='add'>+   [Optional] This is called to allow the filesystem to limit the size of a</div><div class='add'>+   subrequest.  It may also limit the number of individual regions in iterator,</div><div class='add'>+   such as required by RDMA.  This information should be set on stream zero in::</div><div class='ctx'> </div><div class='del'>-   There is no return value; the netfs_subreq_terminated() function should be</div><div class='del'>-   called to indicate whether or not the operation succeeded and how much data</div><div class='del'>-   it transferred.  The filesystem also should not deal with setting folios</div><div class='del'>-   uptodate, unlocking them or dropping their refs - the helpers need to deal</div><div class='del'>-   with this as they have to coordinate with copying to the local cache.</div><div class='add'>+	rreq-&gt;io_streams[0].sreq_max_len</div><div class='add'>+	rreq-&gt;io_streams[0].sreq_max_segs</div><div class='ctx'> </div><div class='del'>-   Note that the helpers have the folios locked, but not pinned.  It is</div><div class='del'>-   possible to use the ITER_XARRAY iov iterator to refer to the range of the</div><div class='del'>-   inode that is being operated upon without the need to allocate large bvec</div><div class='del'>-   tables.</div><div class='add'>+   The filesystem can use this, for example, to chop up a request that has to</div><div class='add'>+   be split across multiple servers or to put multiple reads in flight.</div><div class='ctx'> </div><div class='del'>- * ``is_still_valid()``</div><div class='add'>+   Zero should be returned on success and an error code otherwise.</div><div class='ctx'> </div><div class='del'>-   [Optional] This is called to find out if the data just read from the local</div><div class='del'>-   cache is still valid.  It should return true if it is still valid and false</div><div class='del'>-   if not.  If it's not still valid, it will be reread from the server.</div><div class='add'>+ * ``issue_read()``</div><div class='ctx'> </div><div class='del'>- * ``check_write_begin()``</div><div class='add'>+   [Required] Netfslib calls this to dispatch a subrequest to the server for</div><div class='add'>+   reading.  In the subrequest, -&gt;start, -&gt;len and -&gt;transferred indicate what</div><div class='add'>+   data should be read from the server and -&gt;io_iter indicates the buffer to be</div><div class='add'>+   used.</div><div class='ctx'> </div><div class='del'>-   [Optional] This is called from the netfs_write_begin() helper once it has</div><div class='del'>-   allocated/grabbed the folio to be modified to allow the filesystem to flush</div><div class='del'>-   conflicting state before allowing it to be modified.</div><div class='add'>+   There is no return value; the ``netfs_read_subreq_terminated()`` function</div><div class='add'>+   should be called to indicate that the subrequest completed either way.</div><div class='add'>+   -&gt;error, -&gt;transferred and -&gt;flags should be updated before completing.  The</div><div class='add'>+   termination can be done asynchronously.</div><div class='ctx'> </div><div class='del'>-   It may unlock and discard the folio it was given and set the caller's folio</div><div class='del'>-   pointer to NULL.  It should return 0 if everything is now fine (``*foliop``</div><div class='del'>-   left set) or the op should be retried (``*foliop`` cleared) and any other</div><div class='del'>-   error code to abort the operation.</div><div class='add'>+   Note: the filesystem must not deal with setting folios uptodate, unlocking</div><div class='add'>+   them or dropping their refs - the library deals with this as it may have to</div><div class='add'>+   stitch together the results of multiple subrequests that variously overlap</div><div class='add'>+   the set of folios.</div><div class='ctx'> </div><div class='del'>- * ``done``</div><div class='add'>+ * ``done()``</div><div class='ctx'> </div><div class='del'>-   [Optional] This is called after the folios in the request have all been</div><div class='add'>+   [Optional] This is called after the folios in a read request have all been</div><div class='ctx'>    unlocked (and marked uptodate if applicable).</div><div class='ctx'> </div><div class='add'>+ * ``update_i_size()``</div><div class='add'>+</div><div class='add'>+   [Optional] This is invoked by netfslib at various points during the write</div><div class='add'>+   paths to ask the filesystem to update its idea of the file size.  If not</div><div class='add'>+   given, netfslib will set i_size and i_blocks and update the local cache</div><div class='add'>+   cookie.</div><div class='add'>+   </div><div class='add'>+ * ``post_modify()``</div><div class='add'>+</div><div class='add'>+   [Optional] This is called after netfslib writes to the pagecache or when it</div><div class='add'>+   allows an mmap'd page to be marked as writable.</div><div class='add'>+   </div><div class='add'>+ * ``begin_writeback()``</div><div class='add'>+</div><div class='add'>+   [Optional] Netfslib calls this when processing a writeback request if it</div><div class='add'>+   finds a dirty page that isn't simply marked NETFS_FOLIO_COPY_TO_CACHE,</div><div class='add'>+   indicating it must be written to the server.  This allows the filesystem to</div><div class='add'>+   only set up writeback resources when it knows it's going to have to perform</div><div class='add'>+   a write.</div><div class='add'>+   </div><div class='add'>+ * ``prepare_write()``</div><div class='ctx'> </div><div class='add'>+   [Optional] This is called to allow the filesystem to limit the size of a</div><div class='add'>+   subrequest.  It may also limit the number of individual regions in iterator,</div><div class='add'>+   such as required by RDMA.  This information should be set on stream to which</div><div class='add'>+   the subrequest belongs::</div><div class='ctx'> </div><div class='del'>-Read Helper Procedure</div><div class='del'>----------------------</div><div class='del'>-</div><div class='del'>-The read helpers work by the following general procedure:</div><div class='del'>-</div><div class='del'>- * Set up the request.</div><div class='del'>-</div><div class='del'>- * For readahead, allow the local cache and then the network filesystem to</div><div class='del'>-   propose expansions to the read request.  This is then proposed to the VM.</div><div class='del'>-   If the VM cannot fully perform the expansion, a partially expanded read will</div><div class='del'>-   be performed, though this may not get written to the cache in its entirety.</div><div class='del'>-</div><div class='del'>- * Loop around slicing chunks off of the request to form subrequests:</div><div class='del'>-</div><div class='del'>-   * If a local cache is present, it gets to do the slicing, otherwise the</div><div class='del'>-     helpers just try to generate maximal slices.</div><div class='del'>-</div><div class='del'>-   * The network filesystem gets to clamp the size of each slice if it is to be</div><div class='del'>-     the source.  This allows rsize and chunking to be implemented.</div><div class='add'>+	rreq-&gt;io_streams[subreq-&gt;stream_nr].sreq_max_len</div><div class='add'>+	rreq-&gt;io_streams[subreq-&gt;stream_nr].sreq_max_segs</div><div class='ctx'> </div><div class='del'>-   * The helpers issue a read from the cache or a read from the server or just</div><div class='del'>-     clears the slice as appropriate.</div><div class='add'>+   The filesystem can use this, for example, to chop up a request that has to</div><div class='add'>+   be split across multiple servers or to put multiple writes in flight.</div><div class='ctx'> </div><div class='del'>-   * The next slice begins at the end of the last one.</div><div class='add'>+   This is not permitted to return an error.  Instead, in the event of failure,</div><div class='add'>+   ``netfs_prepare_write_failed()`` must be called.</div><div class='ctx'> </div><div class='del'>-   * As slices finish being read, they terminate.</div><div class='add'>+ * ``issue_write()``</div><div class='ctx'> </div><div class='del'>- * When all the subrequests have terminated, the subrequests are assessed and</div><div class='del'>-   any that are short or have failed are reissued:</div><div class='add'>+   [Required] This is used to dispatch a subrequest to the server for writing.</div><div class='add'>+   In the subrequest, -&gt;start, -&gt;len and -&gt;transferred indicate what data</div><div class='add'>+   should be written to the server and -&gt;io_iter indicates the buffer to be</div><div class='add'>+   used.</div><div class='ctx'> </div><div class='del'>-   * Failed cache requests are issued against the server instead.</div><div class='add'>+   There is no return value; the ``netfs_write_subreq_terminated()`` function</div><div class='add'>+   should be called to indicate that the subrequest completed either way.</div><div class='add'>+   -&gt;error, -&gt;transferred and -&gt;flags should be updated before completing.  The</div><div class='add'>+   termination can be done asynchronously.</div><div class='ctx'> </div><div class='del'>-   * Failed server requests just fail.</div><div class='add'>+   Note: the filesystem must not deal with removing the dirty or writeback</div><div class='add'>+   marks on folios involved in the operation and should not take refs or pins</div><div class='add'>+   on them, but should leave retention to netfslib.</div><div class='ctx'> </div><div class='del'>-   * Short reads against either source will be reissued against that source</div><div class='del'>-     provided they have transferred some more data:</div><div class='add'>+ * ``retry_request()``</div><div class='ctx'> </div><div class='del'>-     * The cache may need to skip holes that it can't do DIO from.</div><div class='add'>+   [Optional] Netfslib calls this at the beginning of a retry cycle.  This</div><div class='add'>+   allows the filesystem to examine the state of the request, the subrequests</div><div class='add'>+   in the indicated stream and of its own data and make adjustments or</div><div class='add'>+   renegotiate resources.</div><div class='add'>+   </div><div class='add'>+ * ``invalidate_cache()``</div><div class='ctx'> </div><div class='del'>-     * If NETFS_SREQ_CLEAR_TAIL was set, a short read will be cleared to the</div><div class='del'>-       end of the slice instead of reissuing.</div><div class='add'>+   [Optional] This is called by netfslib to invalidate data stored in the local</div><div class='add'>+   cache in the event that writing to the local cache fails, providing updated</div><div class='add'>+   coherency data that netfs can't provide.</div><div class='ctx'> </div><div class='del'>- * Once the data is read, the folios that have been fully read/cleared:</div><div class='add'>+Terminating a subrequest</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='del'>-   * Will be marked uptodate.</div><div class='add'>+When a subrequest completes, there are a number of functions that the cache or</div><div class='add'>+subrequest can call to inform netfslib of the status change.  One function is</div><div class='add'>+provided to terminate a write subrequest at the preparation stage and acts</div><div class='add'>+synchronously:</div><div class='ctx'> </div><div class='del'>-   * If a cache is present, will be marked with PG_fscache.</div><div class='add'>+ * ``void netfs_prepare_write_failed(struct netfs_io_subrequest *subreq);``</div><div class='ctx'> </div><div class='del'>-   * Unlocked</div><div class='add'>+   Indicate that the -&gt;prepare_write() call failed.  The ``error`` field should</div><div class='add'>+   have been updated.</div><div class='ctx'> </div><div class='del'>- * Any folios that need writing to the cache will then have DIO writes issued.</div><div class='add'>+Note that -&gt;prepare_read() can return an error as a read can simply be aborted.</div><div class='add'>+Dealing with writeback failure is trickier.</div><div class='ctx'> </div><div class='del'>- * Synchronous operations will wait for reading to be complete.</div><div class='add'>+The other functions are used for subrequests that got as far as being issued:</div><div class='ctx'> </div><div class='del'>- * Writes to the cache will proceed asynchronously and the folios will have the</div><div class='del'>-   PG_fscache mark removed when that completes.</div><div class='add'>+ * ``void netfs_read_subreq_terminated(struct netfs_io_subrequest *subreq);``</div><div class='ctx'> </div><div class='del'>- * The request structures will be cleaned up when everything has completed.</div><div class='add'>+   Tell netfslib that a read subrequest has terminated.  The ``error``,</div><div class='add'>+   ``flags`` and ``transferred`` fields should have been updated.</div><div class='ctx'> </div><div class='add'>+ * ``void netfs_write_subrequest_terminated(void *_op, ssize_t transferred_or_error);``</div><div class='ctx'> </div><div class='del'>-Read Helper Cache API</div><div class='del'>----------------------</div><div class='add'>+   Tell netfslib that a write subrequest has terminated.  Either the amount of</div><div class='add'>+   data processed or the negative error code can be passed in.  This is</div><div class='add'>+   can be used as a kiocb completion function.</div><div class='ctx'> </div><div class='del'>-When implementing a local cache to be used by the read helpers, two things are</div><div class='del'>-required: some way for the network filesystem to initialise the caching for a</div><div class='del'>-read request and a table of operations for the helpers to call.</div><div class='add'>+ * ``void netfs_read_subreq_progress(struct netfs_io_subrequest *subreq);``</div><div class='ctx'> </div><div class='del'>-To begin a cache operation on an fscache object, the following function is</div><div class='del'>-called::</div><div class='add'>+   This is provided to optionally update netfslib on the incremental progress</div><div class='add'>+   of a read, allowing some folios to be unlocked early and does not actually</div><div class='add'>+   terminate the subrequest.  The ``transferred`` field should have been</div><div class='add'>+   updated.</div><div class='ctx'> </div><div class='del'>-	int fscache_begin_read_operation(struct netfs_io_request *rreq,</div><div class='del'>-					 struct fscache_cookie *cookie);</div><div class='add'>+Local Cache API</div><div class='add'>+---------------</div><div class='ctx'> </div><div class='del'>-passing in the request pointer and the cookie corresponding to the file.  This</div><div class='del'>-fills in the cache resources mentioned below.</div><div class='add'>+Netfslib provides a separate API for a local cache to implement, though it</div><div class='add'>+provides some somewhat similar routines to the filesystem request API.</div><div class='ctx'> </div><div class='del'>-The netfs_io_request object contains a place for the cache to hang its</div><div class='add'>+Firstly, the netfs_io_request object contains a place for the cache to hang its</div><div class='ctx'> state::</div><div class='ctx'> </div><div class='ctx'> 	struct netfs_cache_resources {</div><div class='ctx'> 		const struct netfs_cache_ops	*ops;</div><div class='ctx'> 		void				*cache_priv;</div><div class='ctx'> 		void				*cache_priv2;</div><div class='add'>+		unsigned int			debug_id;</div><div class='add'>+		unsigned int			inval_counter;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-This contains an operations table pointer and two private pointers.  The</div><div class='del'>-operation table looks like the following::</div><div class='add'>+This contains an operations table pointer and two private pointers plus the</div><div class='add'>+debug ID of the fscache cookie for tracing purposes and an invalidation counter</div><div class='add'>+that is cranked by calls to ``fscache_invalidate()`` allowing cache subrequests</div><div class='add'>+to be invalidated after completion.</div><div class='add'>+</div><div class='add'>+The cache operation table looks like the following::</div><div class='ctx'> </div><div class='ctx'> 	struct netfs_cache_ops {</div><div class='ctx'> 		void (*end_operation)(struct netfs_cache_resources *cres);</div><div class='del'>-</div><div class='ctx'> 		void (*expand_readahead)(struct netfs_cache_resources *cres,</div><div class='ctx'> 					 loff_t *_start, size_t *_len, loff_t i_size);</div><div class='del'>-</div><div class='ctx'> 		enum netfs_io_source (*prepare_read)(struct netfs_io_subrequest *subreq,</div><div class='del'>-						       loff_t i_size);</div><div class='del'>-</div><div class='add'>+						     loff_t i_size);</div><div class='ctx'> 		int (*read)(struct netfs_cache_resources *cres,</div><div class='ctx'> 			    loff_t start_pos,</div><div class='ctx'> 			    struct iov_iter *iter,</div><div class='ctx'> 			    bool seek_data,</div><div class='ctx'> 			    netfs_io_terminated_t term_func,</div><div class='ctx'> 			    void *term_func_priv);</div><div class='del'>-</div><div class='del'>-		int (*prepare_write)(struct netfs_cache_resources *cres,</div><div class='del'>-				     loff_t *_start, size_t *_len, loff_t i_size,</div><div class='del'>-				     bool no_space_allocated_yet);</div><div class='del'>-</div><div class='del'>-		int (*write)(struct netfs_cache_resources *cres,</div><div class='del'>-			     loff_t start_pos,</div><div class='del'>-			     struct iov_iter *iter,</div><div class='del'>-			     netfs_io_terminated_t term_func,</div><div class='del'>-			     void *term_func_priv);</div><div class='del'>-</div><div class='del'>-		int (*query_occupancy)(struct netfs_cache_resources *cres,</div><div class='del'>-				       loff_t start, size_t len, size_t granularity,</div><div class='del'>-				       loff_t *_data_start, size_t *_data_len);</div><div class='add'>+		void (*prepare_write_subreq)(struct netfs_io_subrequest *subreq);</div><div class='add'>+		void (*issue_write)(struct netfs_io_subrequest *subreq);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> With a termination handler function pointer::</div><div class='hunk'>@@ -511,10 +984,16 @@ The methods defined in the table are:</div><div class='ctx'> </div><div class='ctx'>  * ``expand_readahead()``</div><div class='ctx'> </div><div class='del'>-   [Optional] Called at the beginning of a netfs_readahead() operation to allow</div><div class='del'>-   the cache to expand a request in either direction.  This allows the cache to</div><div class='add'>+   [Optional] Called at the beginning of a readahead operation to allow the</div><div class='add'>+   cache to expand a request in either direction.  This allows the cache to</div><div class='ctx'>    size the request appropriately for the cache granularity.</div><div class='ctx'> </div><div class='add'>+ * ``prepare_read()``</div><div class='add'>+</div><div class='add'>+   [Required] Called to configure the next slice of a request.  -&gt;start and</div><div class='add'>+   -&gt;len in the subrequest indicate where and how big the next slice can be;</div><div class='add'>+   the cache gets to reduce the length to match its granularity requirements.</div><div class='add'>+</div><div class='ctx'>    The function is passed pointers to the start and length in its parameters,</div><div class='ctx'>    plus the size of the file for reference, and adjusts the start and length</div><div class='ctx'>    appropriately.  It should return one of:</div><div class='hunk'>@@ -528,12 +1007,6 @@ The methods defined in the table are:</div><div class='ctx'>    downloaded from the server or read from the cache - or whether slicing</div><div class='ctx'>    should be given up at the current point.</div><div class='ctx'> </div><div class='del'>- * ``prepare_read()``</div><div class='del'>-</div><div class='del'>-   [Required] Called to configure the next slice of a request.  -&gt;start and</div><div class='del'>-   -&gt;len in the subrequest indicate where and how big the next slice can be;</div><div class='del'>-   the cache gets to reduce the length to match its granularity requirements.</div><div class='del'>-</div><div class='ctx'>  * ``read()``</div><div class='ctx'> </div><div class='ctx'>    [Required] Called to read from the cache.  The start file offset is given</div><div class='hunk'>@@ -547,44 +1020,33 @@ The methods defined in the table are:</div><div class='ctx'>    indicating whether the termination is definitely happening in the caller's</div><div class='ctx'>    context.</div><div class='ctx'> </div><div class='del'>- * ``prepare_write()``</div><div class='add'>+ * ``prepare_write_subreq()``</div><div class='ctx'> </div><div class='del'>-   [Required] Called to prepare a write to the cache to take place.  This</div><div class='del'>-   involves checking to see whether the cache has sufficient space to honour</div><div class='del'>-   the write.  ``*_start`` and ``*_len`` indicate the region to be written; the</div><div class='del'>-   region can be shrunk or it can be expanded to a page boundary either way as</div><div class='del'>-   necessary to align for direct I/O.  i_size holds the size of the object and</div><div class='del'>-   is provided for reference.  no_space_allocated_yet is set to true if the</div><div class='del'>-   caller is certain that no data has been written to that region - for example</div><div class='del'>-   if it tried to do a read from there already.</div><div class='add'>+   [Required] This is called to allow the cache to limit the size of a</div><div class='add'>+   subrequest.  It may also limit the number of individual regions in iterator,</div><div class='add'>+   such as required by DIO/DMA.  This information should be set on stream to</div><div class='add'>+   which the subrequest belongs::</div><div class='ctx'> </div><div class='del'>- * ``write()``</div><div class='add'>+	rreq-&gt;io_streams[subreq-&gt;stream_nr].sreq_max_len</div><div class='add'>+	rreq-&gt;io_streams[subreq-&gt;stream_nr].sreq_max_segs</div><div class='ctx'> </div><div class='del'>-   [Required] Called to write to the cache.  The start file offset is given</div><div class='del'>-   along with an iterator to write from, which gives the length also.</div><div class='del'>-</div><div class='del'>-   Also provided is a pointer to a termination handler function and private</div><div class='del'>-   data to pass to that function.  The termination function should be called</div><div class='del'>-   with the number of bytes transferred or an error code, plus a flag</div><div class='del'>-   indicating whether the termination is definitely happening in the caller's</div><div class='del'>-   context.</div><div class='add'>+   The filesystem can use this, for example, to chop up a request that has to</div><div class='add'>+   be split across multiple servers or to put multiple writes in flight.</div><div class='ctx'> </div><div class='del'>- * ``query_occupancy()``</div><div class='add'>+   This is not permitted to return an error.  In the event of failure,</div><div class='add'>+   ``netfs_prepare_write_failed()`` must be called.</div><div class='ctx'> </div><div class='del'>-   [Required] Called to find out where the next piece of data is within a</div><div class='del'>-   particular region of the cache.  The start and length of the region to be</div><div class='del'>-   queried are passed in, along with the granularity to which the answer needs</div><div class='del'>-   to be aligned.  The function passes back the start and length of the data,</div><div class='del'>-   if any, available within that region.  Note that there may be a hole at the</div><div class='del'>-   front.</div><div class='add'>+ * ``issue_write()``</div><div class='ctx'> </div><div class='del'>-   It returns 0 if some data was found, -ENODATA if there was no usable data</div><div class='del'>-   within the region or -ENOBUFS if there is no caching on this file.</div><div class='add'>+   [Required] This is used to dispatch a subrequest to the cache for writing.</div><div class='add'>+   In the subrequest, -&gt;start, -&gt;len and -&gt;transferred indicate what data</div><div class='add'>+   should be written to the cache and -&gt;io_iter indicates the buffer to be</div><div class='add'>+   used.</div><div class='ctx'> </div><div class='del'>-Note that these methods are passed a pointer to the cache resource structure,</div><div class='del'>-not the read request structure as they could be used in other situations where</div><div class='del'>-there isn't a read request structure as well, such as writing dirty data to the</div><div class='del'>-cache.</div><div class='add'>+   There is no return value; the ``netfs_write_subreq_terminated()`` function</div><div class='add'>+   should be called to indicate that the subrequest completed either way.</div><div class='add'>+   -&gt;error, -&gt;transferred and -&gt;flags should be updated before completing.  The</div><div class='add'>+   termination can be done asynchronously.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> API Function Reference</div><div class='head'>diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst<br/>index 767b2927c762..3111ef5592f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/porting.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/porting.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/porting.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/porting.rst</a></div><div class='hunk'>@@ -1203,3 +1203,43 @@ should use d_drop();d_splice_alias() and return the result of the latter.</div><div class='ctx'> If a positive dentry cannot be returned for some reason, in-kernel</div><div class='ctx'> clients such as cachefiles, nfsd, smb/server may not perform ideally but</div><div class='ctx'> will fail-safe.</div><div class='add'>+</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+** mandatory**</div><div class='add'>+</div><div class='add'>+lookup_one(), lookup_one_unlocked(), lookup_one_positive_unlocked() now</div><div class='add'>+take a qstr instead of a name and len.  These, not the "one_len"</div><div class='add'>+versions, should be used whenever accessing a filesystem from outside</div><div class='add'>+that filesysmtem, through a mount point - which will have a mnt_idmap.</div><div class='add'>+</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+** mandatory**</div><div class='add'>+</div><div class='add'>+Functions try_lookup_one_len(), lookup_one_len(),</div><div class='add'>+lookup_one_len_unlocked() and lookup_positive_unlocked() have been</div><div class='add'>+renamed to try_lookup_noperm(), lookup_noperm(),</div><div class='add'>+lookup_noperm_unlocked(), lookup_noperm_positive_unlocked().  They now</div><div class='add'>+take a qstr instead of separate name and length.  QSTR() can be used</div><div class='add'>+when strlen() is needed for the length.</div><div class='add'>+</div><div class='add'>+For try_lookup_noperm() a reference to the qstr is passed in case the</div><div class='add'>+hash might subsequently be needed.</div><div class='add'>+</div><div class='add'>+These function no longer do any permission checking - they previously</div><div class='add'>+checked that the caller has 'X' permission on the parent.  They must</div><div class='add'>+ONLY be used internally by a filesystem on itself when it knows that</div><div class='add'>+permissions are irrelevant or in a context where permission checks have</div><div class='add'>+already been performed such as after vfs_path_parent_lookup()</div><div class='add'>+</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+** mandatory**</div><div class='add'>+</div><div class='add'>+d_hash_and_lookup() is no longer exported or available outside the VFS.</div><div class='add'>+Use try_lookup_noperm() instead.  This adds name validation and takes</div><div class='add'>+arguments in the opposite order but is otherwise identical.</div><div class='add'>+</div><div class='add'>+Using try_lookup_noperm() will require linux/namei.h to be included.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/filesystems/relay.rst b/Documentation/filesystems/relay.rst<br/>index 04ad083cfe62..46447dbc75ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/relay.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/relay.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/relay.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/relay.rst</a></div><div class='hunk'>@@ -32,7 +32,7 @@ functions in the relay interface code - please see that for details.</div><div class='ctx'> Semantics</div><div class='ctx'> =========</div><div class='ctx'> </div><div class='del'>-Each relay channel has one buffer per CPU, each buffer has one or more</div><div class='add'>+Each relay channel has one buffer per CPU; each buffer has one or more</div><div class='ctx'> sub-buffers.  Messages are written to the first sub-buffer until it is</div><div class='ctx'> too full to contain a new message, in which case it is written to</div><div class='ctx'> the next (if available).  Messages are never split across sub-buffers.</div><div class='hunk'>@@ -40,7 +40,7 @@ At this point, userspace can be notified so it empties the first</div><div class='ctx'> sub-buffer, while the kernel continues writing to the next.</div><div class='ctx'> </div><div class='ctx'> When notified that a sub-buffer is full, the kernel knows how many</div><div class='del'>-bytes of it are padding i.e. unused space occurring because a complete</div><div class='add'>+bytes of it are padding, i.e., unused space occurring because a complete</div><div class='ctx'> message couldn't fit into a sub-buffer.  Userspace can use this</div><div class='ctx'> knowledge to copy only valid data.</div><div class='ctx'> </div><div class='hunk'>@@ -71,7 +71,7 @@ klog and relay-apps example code</div><div class='ctx'> ================================</div><div class='ctx'> </div><div class='ctx'> The relay interface itself is ready to use, but to make things easier,</div><div class='del'>-a couple simple utility functions and a set of examples are provided.</div><div class='add'>+a couple of simple utility functions and a set of examples are provided.</div><div class='ctx'> </div><div class='ctx'> The relay-apps example tarball, available on the relay sourceforge</div><div class='ctx'> site, contains a set of self-contained examples, each consisting of a</div><div class='hunk'>@@ -91,7 +91,7 @@ registered will data actually be logged (see the klog and kleak</div><div class='ctx'> examples for details).</div><div class='ctx'> </div><div class='ctx'> It is of course possible to use the relay interface from scratch,</div><div class='del'>-i.e. without using any of the relay-apps example code or klog, but</div><div class='add'>+i.e., without using any of the relay-apps example code or klog, but</div><div class='ctx'> you'll have to implement communication between userspace and kernel,</div><div class='ctx'> allowing both to convey the state of buffers (full, empty, amount of</div><div class='ctx'> padding).  The read() interface both removes padding and internally</div><div class='hunk'>@@ -119,7 +119,7 @@ mmap()      results in channel buffer being mapped into the caller's</div><div class='ctx'> 	    must map the entire file, which is NRBUF * SUBBUFSIZE.</div><div class='ctx'> </div><div class='ctx'> read()      read the contents of a channel buffer.  The bytes read are</div><div class='del'>-	    'consumed' by the reader, i.e. they won't be available</div><div class='add'>+	    'consumed' by the reader, i.e., they won't be available</div><div class='ctx'> 	    again to subsequent reads.  If the channel is being used</div><div class='ctx'> 	    in no-overwrite mode (the default), it can be read at any</div><div class='ctx'> 	    time even if there's an active kernel writer.  If the</div><div class='hunk'>@@ -138,7 +138,7 @@ poll()      POLLIN/POLLRDNORM/POLLERR supported.  User applications are</div><div class='ctx'> 	    notified when sub-buffer boundaries are crossed.</div><div class='ctx'> </div><div class='ctx'> close()     decrements the channel buffer's refcount.  When the refcount</div><div class='del'>-	    reaches 0, i.e. when no process or kernel client has the</div><div class='add'>+	    reaches 0, i.e., when no process or kernel client has the</div><div class='ctx'> 	    buffer open, the channel buffer is freed.</div><div class='ctx'> =========== ============================================================</div><div class='ctx'> </div><div class='hunk'>@@ -149,7 +149,7 @@ host filesystem must be mounted.  For example::</div><div class='ctx'> </div><div class='ctx'> .. Note::</div><div class='ctx'> </div><div class='del'>-	the host filesystem doesn't need to be mounted for kernel</div><div class='add'>+	The host filesystem doesn't need to be mounted for kernel</div><div class='ctx'> 	clients to create or use channels - it only needs to be</div><div class='ctx'> 	mounted when user space applications need access to the buffer</div><div class='ctx'> 	data.</div><div class='hunk'>@@ -325,7 +325,7 @@ section, as it pertains mainly to mmap() implementations.</div><div class='ctx'> In 'overwrite' mode, also known as 'flight recorder' mode, writes</div><div class='ctx'> continuously cycle around the buffer and will never fail, but will</div><div class='ctx'> unconditionally overwrite old data regardless of whether it's actually</div><div class='del'>-been consumed.  In no-overwrite mode, writes will fail, i.e. data will</div><div class='add'>+been consumed.  In no-overwrite mode, writes will fail, i.e., data will</div><div class='ctx'> be lost, if the number of unconsumed sub-buffers equals the total</div><div class='ctx'> number of sub-buffers in the channel.  It should be clear that if</div><div class='ctx'> there is no consumer or if the consumer can't consume sub-buffers fast</div><div class='hunk'>@@ -344,7 +344,7 @@ initialize the next sub-buffer if appropriate 2) finalize the previous</div><div class='ctx'> sub-buffer if appropriate and 3) return a boolean value indicating</div><div class='ctx'> whether or not to actually move on to the next sub-buffer.</div><div class='ctx'> </div><div class='del'>-To implement 'no-overwrite' mode, the userspace client would provide</div><div class='add'>+To implement 'no-overwrite' mode, the userspace client provides</div><div class='ctx'> an implementation of the subbuf_start() callback something like the</div><div class='ctx'> following::</div><div class='ctx'> </div><div class='hunk'>@@ -364,9 +364,9 @@ following::</div><div class='ctx'> 	    return 1;</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='del'>-If the current buffer is full, i.e. all sub-buffers remain unconsumed,</div><div class='add'>+If the current buffer is full, i.e., all sub-buffers remain unconsumed,</div><div class='ctx'> the callback returns 0 to indicate that the buffer switch should not</div><div class='del'>-occur yet, i.e. until the consumer has had a chance to read the</div><div class='add'>+occur yet, i.e., until the consumer has had a chance to read the</div><div class='ctx'> current set of ready sub-buffers.  For the relay_buf_full() function</div><div class='ctx'> to make sense, the consumer is responsible for notifying the relay</div><div class='ctx'> interface when sub-buffers have been consumed via</div><div class='hunk'>@@ -400,7 +400,7 @@ consulted.</div><div class='ctx'> </div><div class='ctx'> The default subbuf_start() implementation, used if the client doesn't</div><div class='ctx'> define any callbacks, or doesn't define the subbuf_start() callback,</div><div class='del'>-implements the simplest possible 'no-overwrite' mode, i.e. it does</div><div class='add'>+implements the simplest possible 'no-overwrite' mode, i.e., it does</div><div class='ctx'> nothing but return 0.</div><div class='ctx'> </div><div class='ctx'> Header information can be reserved at the beginning of each sub-buffer</div><div class='hunk'>@@ -467,7 +467,7 @@ rather than open and close a new channel for each use.  relay_reset()</div><div class='ctx'> can be used for this purpose - it resets a channel to its initial</div><div class='ctx'> state without reallocating channel buffer memory or destroying</div><div class='ctx'> existing mappings.  It should however only be called when it's safe to</div><div class='del'>-do so, i.e. when the channel isn't currently being written to.</div><div class='add'>+do so, i.e., when the channel isn't currently being written to.</div><div class='ctx'> </div><div class='ctx'> Finally, there are a couple of utility callbacks that can be used for</div><div class='ctx'> different purposes.  buf_mapped() is called whenever a channel buffer</div><div class='head'>diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/filesystems/resctrl.rst<br/>index 6768fc1fad16..c7949dd44f2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/arch/x86/resctrl.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/arch/x86/resctrl.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/resctrl.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/resctrl.rst</a></div><div class='hunk'>@@ -1,9 +1,9 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> .. include:: &lt;isonum.txt&gt;</div><div class='ctx'> </div><div class='del'>-===========================================</div><div class='del'>-User Interface for Resource Control feature</div><div class='del'>-===========================================</div><div class='add'>+=====================================================</div><div class='add'>+User Interface for Resource Control feature (resctrl)</div><div class='add'>+=====================================================</div><div class='ctx'> </div><div class='ctx'> :Copyright: |copy| 2016 Intel Corporation</div><div class='ctx'> :Authors: - Fenghua Yu &lt;fenghua.yu@intel.com&gt;</div><div class='head'>diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst<br/>index ae79c30b6c0c..bf051c7da6b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/filesystems/vfs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/filesystems/vfs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/filesystems/vfs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/filesystems/vfs.rst</a></div><div class='hunk'>@@ -716,9 +716,8 @@ page lookup by address, and keeping track of pages tagged as Dirty or</div><div class='ctx'> Writeback.</div><div class='ctx'> </div><div class='ctx'> The first can be used independently to the others.  The VM can try to</div><div class='del'>-either write dirty pages in order to clean them, or release clean pages</div><div class='del'>-in order to reuse them.  To do this it can call the -&gt;writepage method</div><div class='del'>-on dirty pages, and -&gt;release_folio on clean folios with the private</div><div class='add'>+release clean pages in order to reuse them.  To do this it can call</div><div class='add'>+-&gt;release_folio on clean folios with the private</div><div class='ctx'> flag set.  Clean pages without PagePrivate and with no external references</div><div class='ctx'> will be released without notice being given to the address_space.</div><div class='ctx'> </div><div class='hunk'>@@ -731,8 +730,8 @@ maintains information about the PG_Dirty and PG_Writeback status of each</div><div class='ctx'> page, so that pages with either of these flags can be found quickly.</div><div class='ctx'> </div><div class='ctx'> The Dirty tag is primarily used by mpage_writepages - the default</div><div class='del'>--&gt;writepages method.  It uses the tag to find dirty pages to call</div><div class='del'>--&gt;writepage on.  If mpage_writepages is not used (i.e. the address</div><div class='add'>+-&gt;writepages method.  It uses the tag to find dirty pages to</div><div class='add'>+write back.  If mpage_writepages is not used (i.e. the address</div><div class='ctx'> provides its own -&gt;writepages) , the PAGECACHE_TAG_DIRTY tag is almost</div><div class='ctx'> unused.  write_inode_now and sync_inode do use it (through</div><div class='ctx'> __sync_single_inode) to check if -&gt;writepages has been successful in</div><div class='hunk'>@@ -756,23 +755,23 @@ pages, however the address_space has finer control of write sizes.</div><div class='ctx'> </div><div class='ctx'> The read process essentially only requires 'read_folio'.  The write</div><div class='ctx'> process is more complicated and uses write_begin/write_end or</div><div class='del'>-dirty_folio to write data into the address_space, and writepage and</div><div class='add'>+dirty_folio to write data into the address_space, and</div><div class='ctx'> writepages to writeback data to storage.</div><div class='ctx'> </div><div class='ctx'> Adding and removing pages to/from an address_space is protected by the</div><div class='ctx'> inode's i_mutex.</div><div class='ctx'> </div><div class='ctx'> When data is written to a page, the PG_Dirty flag should be set.  It</div><div class='del'>-typically remains set until writepage asks for it to be written.  This</div><div class='add'>+typically remains set until writepages asks for it to be written.  This</div><div class='ctx'> should clear PG_Dirty and set PG_Writeback.  It can be actually written</div><div class='ctx'> at any point after PG_Dirty is clear.  Once it is known to be safe,</div><div class='ctx'> PG_Writeback is cleared.</div><div class='ctx'> </div><div class='ctx'> Writeback makes use of a writeback_control structure to direct the</div><div class='del'>-operations.  This gives the writepage and writepages operations some</div><div class='add'>+operations.  This gives the writepages operation some</div><div class='ctx'> information about the nature of and reason for the writeback request,</div><div class='ctx'> and the constraints under which it is being done.  It is also used to</div><div class='del'>-return information back to the caller about the result of a writepage or</div><div class='add'>+return information back to the caller about the result of a</div><div class='ctx'> writepages request.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -819,7 +818,6 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	struct address_space_operations {</div><div class='del'>-		int (*writepage)(struct page *page, struct writeback_control *wbc);</div><div class='ctx'> 		int (*read_folio)(struct file *, struct folio *);</div><div class='ctx'> 		int (*writepages)(struct address_space *, struct writeback_control *);</div><div class='ctx'> 		bool (*dirty_folio)(struct address_space *, struct folio *);</div><div class='hunk'>@@ -848,25 +846,6 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> 		int (*swap_rw)(struct kiocb *iocb, struct iov_iter *iter);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-``writepage``</div><div class='del'>-	called by the VM to write a dirty page to backing store.  This</div><div class='del'>-	may happen for data integrity reasons (i.e. 'sync'), or to free</div><div class='del'>-	up memory (flush).  The difference can be seen in</div><div class='del'>-	wbc-&gt;sync_mode.  The PG_Dirty flag has been cleared and</div><div class='del'>-	PageLocked is true.  writepage should start writeout, should set</div><div class='del'>-	PG_Writeback, and should make sure the page is unlocked, either</div><div class='del'>-	synchronously or asynchronously when the write operation</div><div class='del'>-	completes.</div><div class='del'>-</div><div class='del'>-	If wbc-&gt;sync_mode is WB_SYNC_NONE, -&gt;writepage doesn't have to</div><div class='del'>-	try too hard if there are problems, and may choose to write out</div><div class='del'>-	other pages from the mapping if that is easier (e.g. due to</div><div class='del'>-	internal dependencies).  If it chooses not to start writeout, it</div><div class='del'>-	should return AOP_WRITEPAGE_ACTIVATE so that the VM will not</div><div class='del'>-	keep calling -&gt;writepage on that page.</div><div class='del'>-</div><div class='del'>-	See the file "Locking" for more details.</div><div class='del'>-</div><div class='ctx'> ``read_folio``</div><div class='ctx'> 	Called by the page cache to read a folio from the backing store.</div><div class='ctx'> 	The 'file' argument supplies authentication information to network</div><div class='hunk'>@@ -909,7 +888,7 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> 	given and that many pages should be written if possible.  If no</div><div class='ctx'> 	-&gt;writepages is given, then mpage_writepages is used instead.</div><div class='ctx'> 	This will choose pages from the address space that are tagged as</div><div class='del'>-	DIRTY and will pass them to -&gt;writepage.</div><div class='add'>+	DIRTY and will write them back.</div><div class='ctx'> </div><div class='ctx'> ``dirty_folio``</div><div class='ctx'> 	called by the VM to mark a folio as dirty.  This is particularly</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/dsd/data-node-references.rst b/Documentation/firmware-guide/acpi/dsd/data-node-references.rst<br/>index 8d8b53e96bcf..ccb4b153e6f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/dsd/data-node-references.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/firmware-guide/acpi/dsd/data-node-references.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/dsd/data-node-references.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/firmware-guide/acpi/dsd/data-node-references.rst</a></div><div class='hunk'>@@ -12,11 +12,14 @@ ACPI in general allows referring to device objects in the tree only.</div><div class='ctx'> Hierarchical data extension nodes may not be referred to directly, hence this</div><div class='ctx'> document defines a scheme to implement such references.</div><div class='ctx'> </div><div class='del'>-A reference consist of the device object name followed by one or more</div><div class='del'>-hierarchical data extension [dsd-guide] keys. Specifically, the hierarchical</div><div class='del'>-data extension node which is referred to by the key shall lie directly under</div><div class='del'>-the parent object i.e. either the device object or another hierarchical data</div><div class='del'>-extension node.</div><div class='add'>+A reference to a _DSD hierarchical data node is a string consisting of a</div><div class='add'>+device object reference followed by a dot (".") and a relative path to a data</div><div class='add'>+node object. Do not use non-string references as this will produce a copy of</div><div class='add'>+the hierarchical data node, not a reference!</div><div class='add'>+</div><div class='add'>+The hierarchical data extension node which is referred to shall be located</div><div class='add'>+directly under its parent object i.e. either the device object or another</div><div class='add'>+hierarchical data extension node [dsd-guide].</div><div class='ctx'> </div><div class='ctx'> The keys in the hierarchical data nodes shall consist of the name of the node,</div><div class='ctx'> "@" character and the number of the node in hexadecimal notation (without pre-</div><div class='hunk'>@@ -33,11 +36,9 @@ extension key.</div><div class='ctx'> Example</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='del'>-In the ASL snippet below, the "reference" _DSD property contains a</div><div class='del'>-device object reference to DEV0 and under that device object, a</div><div class='del'>-hierarchical data extension key "node@1" referring to the NOD1 object</div><div class='del'>-and lastly, a hierarchical data extension key "anothernode" referring to</div><div class='del'>-the ANOD object which is also the final target node of the reference.</div><div class='add'>+In the ASL snippet below, the "reference" _DSD property contains a string</div><div class='add'>+reference to a hierarchical data extension node ANOD under DEV0 under the parent</div><div class='add'>+of DEV1. ANOD is also the final target node of the reference.</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'> 	Device (DEV0)</div><div class='hunk'>@@ -76,10 +77,7 @@ the ANOD object which is also the final target node of the reference.</div><div class='ctx'> 	    Name (_DSD, Package () {</div><div class='ctx'> 		ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),</div><div class='ctx'> 		Package () {</div><div class='del'>-		    Package () {</div><div class='del'>-			"reference", Package () {</div><div class='del'>-			    ^DEV0, "node@1", "anothernode"</div><div class='del'>-			}</div><div class='add'>+		    Package () { "reference", "^DEV0.ANOD" }</div><div class='ctx'> 		    },</div><div class='ctx'> 		}</div><div class='ctx'> 	    })</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/dsd/graph.rst b/Documentation/firmware-guide/acpi/dsd/graph.rst<br/>index b9dbfc73ed25..d6ae5ffa748c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/dsd/graph.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/firmware-guide/acpi/dsd/graph.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/dsd/graph.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/firmware-guide/acpi/dsd/graph.rst</a></div><div class='hunk'>@@ -66,12 +66,9 @@ of that port shall be zero. Similarly, if a port may only have a single</div><div class='ctx'> endpoint, the number of that endpoint shall be zero.</div><div class='ctx'> </div><div class='ctx'> The endpoint reference uses property extension with "remote-endpoint" property</div><div class='del'>-name followed by a reference in the same package. Such references consist of</div><div class='del'>-the remote device reference, the first package entry of the port data extension</div><div class='del'>-reference under the device and finally the first package entry of the endpoint</div><div class='del'>-data extension reference under the port. Individual references thus appear as::</div><div class='add'>+name followed by a string reference in the same package. [data-node-ref]::</div><div class='ctx'> </div><div class='del'>-    Package() { device, "port@X", "endpoint@Y" }</div><div class='add'>+    "device.datanode"</div><div class='ctx'> </div><div class='ctx'> In the above example, "X" is the number of the port and "Y" is the number of</div><div class='ctx'> the endpoint.</div><div class='hunk'>@@ -109,7 +106,7 @@ A simple example of this is show below::</div><div class='ctx'> 		ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),</div><div class='ctx'> 		Package () {</div><div class='ctx'> 		    Package () { "reg", 0 },</div><div class='del'>-		    Package () { "remote-endpoint", Package() { \_SB.PCI0.ISP, "port@4", "endpoint@0" } },</div><div class='add'>+		    Package () { "remote-endpoint", "\\_SB.PCI0.ISP.EP40" },</div><div class='ctx'> 		}</div><div class='ctx'> 	    })</div><div class='ctx'> 	}</div><div class='hunk'>@@ -141,7 +138,7 @@ A simple example of this is show below::</div><div class='ctx'> 		ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),</div><div class='ctx'> 		Package () {</div><div class='ctx'> 		    Package () { "reg", 0 },</div><div class='del'>-		    Package () { "remote-endpoint", Package () { \_SB.PCI0.I2C2.CAM0, "port@0", "endpoint@0" } },</div><div class='add'>+		    Package () { "remote-endpoint", "\\_SB.PCI0.I2C2.CAM0.EP00" },</div><div class='ctx'> 		}</div><div class='ctx'> 	    })</div><div class='ctx'> 	}</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/dsd/leds.rst b/Documentation/firmware-guide/acpi/dsd/leds.rst<br/>index 93db592c93c7..a97cd07d49be 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/dsd/leds.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/firmware-guide/acpi/dsd/leds.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/firmware-guide/acpi/dsd/leds.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/firmware-guide/acpi/dsd/leds.rst</a></div><div class='hunk'>@@ -15,11 +15,6 @@ Referring to LEDs in Device tree is documented in [video-interfaces], in</div><div class='ctx'> "flash-leds" property documentation. In short, LEDs are directly referred to by</div><div class='ctx'> using phandles.</div><div class='ctx'> </div><div class='del'>-While Device tree allows referring to any node in the tree [devicetree], in</div><div class='del'>-ACPI references are limited to device nodes only [acpi]. For this reason using</div><div class='del'>-the same mechanism on ACPI is not possible. A mechanism to refer to non-device</div><div class='del'>-ACPI nodes is documented in [data-node-ref].</div><div class='del'>-</div><div class='ctx'> ACPI allows (as does DT) using integer arguments after the reference. A</div><div class='ctx'> combination of the LED driver device reference and an integer argument,</div><div class='ctx'> referring to the "reg" property of the relevant LED, is used to identify</div><div class='hunk'>@@ -74,7 +69,7 @@ omitted. ::</div><div class='ctx'> 			Package () {</div><div class='ctx'> 				Package () {</div><div class='ctx'> 					"flash-leds",</div><div class='del'>-					Package () { ^LED, "led@0", ^LED, "led@1" },</div><div class='add'>+					Package () { "^LED.LED0", "^LED.LED1" },</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		})</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/amd-hardware-list-info.rst b/Documentation/gpu/amdgpu/amd-hardware-list-info.rst<br/>new file mode 100644<br/>index 000000000000..1786544fe7c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/amd-hardware-list-info.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/amd-hardware-list-info.rst</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+=================================================</div><div class='add'>+ AMD Hardware Components Information per Product</div><div class='add'>+=================================================</div><div class='add'>+</div><div class='add'>+On this page, you can find the AMD product name and which component version is</div><div class='add'>+part of it.</div><div class='add'>+</div><div class='add'>+Accelerated Processing Units (APU) Info</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+.. csv-table::</div><div class='add'>+   :header-rows: 1</div><div class='add'>+   :widths: 3, 2, 2, 1, 1, 1, 1</div><div class='add'>+   :file: ./apu-asic-info-table.csv</div><div class='add'>+</div><div class='add'>+Discrete GPU Info</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+.. csv-table::</div><div class='add'>+   :header-rows: 1</div><div class='add'>+   :widths: 3, 2, 2, 1, 1, 1</div><div class='add'>+   :file: ./dgpu-asic-info-table.csv</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst<br/>index 1e9283e076ba..30812d9d53c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/amdgpu-glossary.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/amdgpu/amdgpu-glossary.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/amdgpu-glossary.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/amdgpu-glossary.rst</a></div><div class='hunk'>@@ -12,18 +12,39 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>       The number of CUs that are active on the system.  The number of active</div><div class='ctx'>       CUs may be less than SE * SH * CU depending on the board configuration.</div><div class='ctx'> </div><div class='add'>+    BACO</div><div class='add'>+      Bus Alive, Chip Off</div><div class='add'>+</div><div class='add'>+    BOCO</div><div class='add'>+      Bus Off, Chip Off</div><div class='add'>+</div><div class='ctx'>     CE</div><div class='ctx'>       Constant Engine</div><div class='ctx'> </div><div class='add'>+    CIK</div><div class='add'>+      Sea Islands</div><div class='add'>+</div><div class='add'>+    CB</div><div class='add'>+      Color Buffer</div><div class='add'>+</div><div class='ctx'>     CP</div><div class='ctx'>       Command Processor</div><div class='ctx'> </div><div class='ctx'>     CPLIB</div><div class='ctx'>       Content Protection Library</div><div class='ctx'> </div><div class='add'>+    CS</div><div class='add'>+      Command Submission</div><div class='add'>+</div><div class='add'>+    CSB</div><div class='add'>+      Clear State Indirect Buffer</div><div class='add'>+</div><div class='ctx'>     CU</div><div class='ctx'>       Compute Unit</div><div class='ctx'> </div><div class='add'>+    DB</div><div class='add'>+      Depth Buffer</div><div class='add'>+</div><div class='ctx'>     DFS</div><div class='ctx'>       Digital Frequency Synthesizer</div><div class='ctx'> </div><div class='hunk'>@@ -33,6 +54,9 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     EOP</div><div class='ctx'>       End Of Pipe/Pipeline</div><div class='ctx'> </div><div class='add'>+    FLR</div><div class='add'>+      Function Level Reset</div><div class='add'>+</div><div class='ctx'>     GART</div><div class='ctx'>       Graphics Address Remapping Table.  This is the name we use for the GPUVM</div><div class='ctx'>       page table used by the GPU kernel driver.  It remaps system resources</div><div class='hunk'>@@ -45,6 +69,12 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     GC</div><div class='ctx'>       Graphics and Compute</div><div class='ctx'> </div><div class='add'>+    GDS</div><div class='add'>+      Global Data Share</div><div class='add'>+</div><div class='add'>+    GE</div><div class='add'>+      Geometry Engine</div><div class='add'>+</div><div class='ctx'>     GMC</div><div class='ctx'>       Graphic Memory Controller</div><div class='ctx'> </div><div class='hunk'>@@ -80,6 +110,9 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     KCQ</div><div class='ctx'>       Kernel Compute Queue</div><div class='ctx'> </div><div class='add'>+    KFD</div><div class='add'>+      Kernel Fusion Driver</div><div class='add'>+</div><div class='ctx'>     KGQ</div><div class='ctx'>       Kernel Graphics Queue</div><div class='ctx'> </div><div class='hunk'>@@ -89,6 +122,9 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     MC</div><div class='ctx'>       Memory Controller</div><div class='ctx'> </div><div class='add'>+    MCBP</div><div class='add'>+      Mid Command Buffer Preemption</div><div class='add'>+</div><div class='ctx'>     ME</div><div class='ctx'>       MicroEngine (Graphics)</div><div class='ctx'> </div><div class='hunk'>@@ -104,6 +140,9 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     MQD</div><div class='ctx'>       Memory Queue Descriptor</div><div class='ctx'> </div><div class='add'>+    PA</div><div class='add'>+      Primitive Assembler / Physical Address</div><div class='add'>+</div><div class='ctx'>     PFP</div><div class='ctx'>       Pre-Fetch Parser (Graphics)</div><div class='ctx'> </div><div class='hunk'>@@ -113,24 +152,39 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     PSP</div><div class='ctx'>         Platform Security Processor</div><div class='ctx'> </div><div class='add'>+    RB</div><div class='add'>+      Render Backends. Some people called it ROPs.</div><div class='add'>+</div><div class='ctx'>     RLC</div><div class='ctx'>       RunList Controller. This name is a remnant of past ages and doesn't have</div><div class='ctx'>       much meaning today. It's a group of general-purpose helper engines for</div><div class='ctx'>       the GFX block. It's involved in GFX power management and SR-IOV, among</div><div class='ctx'>       other things.</div><div class='ctx'> </div><div class='add'>+    SC</div><div class='add'>+      Scan Converter</div><div class='add'>+</div><div class='ctx'>     SDMA</div><div class='ctx'>       System DMA</div><div class='ctx'> </div><div class='ctx'>     SE</div><div class='ctx'>       Shader Engine</div><div class='ctx'> </div><div class='add'>+    SGPR</div><div class='add'>+      Scalar General-Purpose Registers</div><div class='add'>+</div><div class='ctx'>     SH</div><div class='ctx'>       SHader array</div><div class='ctx'> </div><div class='add'>+    SI</div><div class='add'>+      Southern Islands</div><div class='add'>+</div><div class='ctx'>     SMU/SMC</div><div class='ctx'>       System Management Unit / System Management Controller</div><div class='ctx'> </div><div class='add'>+    SPI (AMDGPU)</div><div class='add'>+      Shader Processor Input</div><div class='add'>+</div><div class='ctx'>     SRLC</div><div class='ctx'>       Save/Restore List Control</div><div class='ctx'> </div><div class='hunk'>@@ -143,12 +197,21 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     SS</div><div class='ctx'>       Spread Spectrum</div><div class='ctx'> </div><div class='add'>+    SX</div><div class='add'>+      Shader Export</div><div class='add'>+</div><div class='ctx'>     TA</div><div class='ctx'>       Trusted Application</div><div class='ctx'> </div><div class='add'>+    TC</div><div class='add'>+      Texture Cache</div><div class='add'>+</div><div class='ctx'>     TOC</div><div class='ctx'>       Table of Contents</div><div class='ctx'> </div><div class='add'>+    UMSCH</div><div class='add'>+      User Mode Scheduler</div><div class='add'>+</div><div class='ctx'>     UVD</div><div class='ctx'>       Unified Video Decoder</div><div class='ctx'> </div><div class='hunk'>@@ -158,5 +221,17 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     VCN</div><div class='ctx'>       Video Codec Next</div><div class='ctx'> </div><div class='add'>+    VGPR</div><div class='add'>+      Vector General-Purpose Registers</div><div class='add'>+</div><div class='add'>+    VMID</div><div class='add'>+      Virtual Memory ID</div><div class='add'>+</div><div class='ctx'>     VPE</div><div class='ctx'>       Video Processing Engine</div><div class='add'>+</div><div class='add'>+    XCC</div><div class='add'>+      Accelerator Core Complex</div><div class='add'>+</div><div class='add'>+    XCP</div><div class='add'>+      Accelerator Core Partition</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv<br/>index 5dd4b8762d19..1d50b539677f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/apu-asic-info-table.csv?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/amdgpu/apu-asic-info-table.csv</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/apu-asic-info-table.csv?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/apu-asic-info-table.csv</a></div><div class='hunk'>@@ -13,3 +13,5 @@ Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8</div><div class='ctx'> Ryzen 7x40 series, Phoenix, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11</div><div class='ctx'> Ryzen 8x40 series, Hawk Point, 3.1.4, 11.0.1 / 11.0.4, 4.0.2, 6.0.1, 13.0.4 / 13.0.11</div><div class='ctx'> Ryzen AI 300 series, Strix Point, 3.5.0, 11.5.0, 4.0.5, 6.1.0, 14.0.0</div><div class='add'>+Ryzen AI 350 series, Krackan Point, 3.5.0, 11.5.2, 4.0.5, 6.1.2, 14.0.4</div><div class='add'>+Ryzen AI Max 300 series, Strix Halo, 3.5.1, 11.5.1, 4.0.6, 6.1.1, 14.0.1</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/debugfs.rst b/Documentation/gpu/amdgpu/debugfs.rst<br/>new file mode 100644<br/>index 000000000000..5150d0a95658<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/debugfs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/debugfs.rst</a></div><div class='hunk'>@@ -0,0 +1,210 @@</div><div class='add'>+==============</div><div class='add'>+AMDGPU DebugFS</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+The amdgpu driver provides a number of debugfs files to aid in debugging</div><div class='add'>+issues in the driver.  These are usually found in</div><div class='add'>+/sys/kernel/debug/dri/&lt;num&gt;.</div><div class='add'>+</div><div class='add'>+DebugFS Files</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+amdgpu_benchmark</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+Run benchmarks using the DMA engine the driver uses for GPU memory paging.</div><div class='add'>+Write a number to the file to run the test.  The results are written to the</div><div class='add'>+kernel log.  VRAM is on device memory (dGPUs) or carve out (APUs) and GTT</div><div class='add'>+(Graphics Translation Tables) is system memory that is accessible by the GPU.</div><div class='add'>+The following tests are available:</div><div class='add'>+</div><div class='add'>+- 1: simple test, VRAM to GTT and GTT to VRAM</div><div class='add'>+- 2: simple test, VRAM to VRAM</div><div class='add'>+- 3: GTT to VRAM, buffer size sweep, powers of 2</div><div class='add'>+- 4: VRAM to GTT, buffer size sweep, powers of 2</div><div class='add'>+- 5: VRAM to VRAM, buffer size sweep, powers of 2</div><div class='add'>+- 6: GTT to VRAM, buffer size sweep, common display sizes</div><div class='add'>+- 7: VRAM to GTT, buffer size sweep, common display sizes</div><div class='add'>+- 8: VRAM to VRAM, buffer size sweep, common display sizes</div><div class='add'>+</div><div class='add'>+amdgpu_test_ib</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Read this file to run simple IB (Indirect Buffer) tests on all kernel managed</div><div class='add'>+rings.  IBs are command buffers usually generated by userspace applications</div><div class='add'>+which are submitted to the kernel for execution on an particular GPU engine.</div><div class='add'>+This just runs the simple IB tests included in the kernel.  These tests</div><div class='add'>+are engine specific and verify that IB submission works.</div><div class='add'>+</div><div class='add'>+amdgpu_discovery</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+Provides raw access to the IP discovery binary provided by the GPU.  Read this</div><div class='add'>+file to access the raw binary.  This is useful for verifying the contents of</div><div class='add'>+the IP discovery table.  It is chip specific.</div><div class='add'>+</div><div class='add'>+amdgpu_vbios</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Provides raw access to the ROM binary image from the GPU.  Read this file to</div><div class='add'>+access the raw binary.  This is useful for verifying the contents of the</div><div class='add'>+video BIOS ROM.  It is board specific.</div><div class='add'>+</div><div class='add'>+amdgpu_evict_gtt</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+Evict all buffers from the GTT memory pool.  Read this file to evict all</div><div class='add'>+buffers from this pool.</div><div class='add'>+</div><div class='add'>+amdgpu_evict_vram</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Evict all buffers from the VRAM memory pool.  Read this file to evict all</div><div class='add'>+buffers from this pool.</div><div class='add'>+</div><div class='add'>+amdgpu_gpu_recover</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Trigger a GPU reset.  Read this file to trigger reset the entire GPU.</div><div class='add'>+All work currently running  on the GPU will be lost.</div><div class='add'>+</div><div class='add'>+amdgpu_ring_&lt;name&gt;</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Provides read access to the kernel managed ring buffers for each ring &lt;name&gt;.</div><div class='add'>+These are useful for debugging problems on a particular ring.  The ring buffer</div><div class='add'>+is how the CPU sends commands to the GPU.  The CPU writes commands into the</div><div class='add'>+buffer and then asks the GPU engine to process it.  This is the raw binary</div><div class='add'>+contents of the ring buffer.  Use a tool like UMR to decode the rings into human</div><div class='add'>+readable form.</div><div class='add'>+</div><div class='add'>+amdgpu_mqd_&lt;name&gt;</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Provides read access to the kernel managed MQD (Memory Queue Descriptor) for</div><div class='add'>+ring &lt;name&gt; managed by the kernel driver.  MQDs define the features of the ring</div><div class='add'>+and are used to store the ring's state when it is not connected to hardware.</div><div class='add'>+The driver writes the requested ring features and metadata (GPU addresses of</div><div class='add'>+the ring itself and associated buffers) to the MQD and the firmware uses the MQD</div><div class='add'>+to populate the hardware when the ring is mapped to a hardware slot.  Only</div><div class='add'>+available on engines which use MQDs.  This provides access to the raw MQD</div><div class='add'>+binary.</div><div class='add'>+</div><div class='add'>+amdgpu_error_&lt;name&gt;</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+Provides an interface to set an error code on the dma fences associated with</div><div class='add'>+ring &lt;name&gt;.  The error code specified is propogated to all fences associated</div><div class='add'>+with the ring.  Use this to inject a fence error into a ring.</div><div class='add'>+</div><div class='add'>+amdgpu_pm_info</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Provides human readable information about the power management features</div><div class='add'>+and state of the GPU.  This includes current GFX clock, Memory clock,</div><div class='add'>+voltages, average SoC power, temperature, GFX load, Memory load, SMU</div><div class='add'>+feature mask, VCN power state, clock and power gating features.</div><div class='add'>+</div><div class='add'>+amdgpu_firmware_info</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Lists the firmware versions for all firmwares used by the GPU.  Only</div><div class='add'>+entries with a non-0 version are valid.  If the version is 0, the firmware</div><div class='add'>+is not valid for the GPU.</div><div class='add'>+</div><div class='add'>+amdgpu_fence_info</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Shows the last signalled and emitted fence sequence numbers for each</div><div class='add'>+kernel driver managed ring.  Fences are associated with submissions</div><div class='add'>+to the engine.  Emitted fences have been submitted to the ring</div><div class='add'>+and signalled fences have been signalled by the GPU.  Rings with a</div><div class='add'>+larger emitted fence value have outstanding work that is still being</div><div class='add'>+processed by the engine that owns that ring.  When the emitted and</div><div class='add'>+signalled fence values are equal, the ring is idle.</div><div class='add'>+</div><div class='add'>+amdgpu_gem_info</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Lists all of the PIDs using the GPU and the GPU buffers that they have</div><div class='add'>+allocated.  This lists the buffer size, pool (VRAM, GTT, etc.), and buffer</div><div class='add'>+attributes (CPU access required, CPU cache attributes, etc.).</div><div class='add'>+</div><div class='add'>+amdgpu_vm_info</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Lists all of the PIDs using the GPU and the GPU buffers that they have</div><div class='add'>+allocated as well as the status of those buffers relative to that process'</div><div class='add'>+GPU virtual address space (e.g., evicted, idle, invalidated, etc.).</div><div class='add'>+</div><div class='add'>+amdgpu_sa_info</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Prints out all of the suballocations (sa) by the suballocation manager in the</div><div class='add'>+kernel driver.  Prints the GPU address, size, and fence info associated</div><div class='add'>+with each suballocation.  The suballocations are used internally within</div><div class='add'>+the kernel driver for various things.</div><div class='add'>+</div><div class='add'>+amdgpu_&lt;pool&gt;_mm</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+Prints TTM information about the memory pool &lt;pool&gt;.</div><div class='add'>+</div><div class='add'>+amdgpu_vram</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Provides direct access to VRAM.  Used by tools like UMR to inspect</div><div class='add'>+objects in VRAM.</div><div class='add'>+</div><div class='add'>+amdgpu_iomem</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Provides direct access to GTT memory.  Used by tools like UMR to inspect</div><div class='add'>+GTT memory.</div><div class='add'>+</div><div class='add'>+amdgpu_regs_*</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Provides direct access to various register aperatures on the GPU.  Used</div><div class='add'>+by tools like UMR to access GPU registers.</div><div class='add'>+</div><div class='add'>+amdgpu_regs2</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Provides an IOCTL interface used by UMR for interacting with GPU registers.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+amdgpu_sensors</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Provides an interface to query GPU power metrics (temperature, average</div><div class='add'>+power, etc.).  Used by tools like UMR to query GPU power metrics.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+amdgpu_gca_config</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Provides an interface to query GPU details (Graphics/Compute Array config,</div><div class='add'>+PCI config, GPU family, etc.).  Used by tools like UMR to query GPU details.</div><div class='add'>+</div><div class='add'>+amdgpu_wave</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Used to query GFX/compute wave information from the hardware.  Used by tools</div><div class='add'>+like UMR to query GFX/compute wave information.</div><div class='add'>+</div><div class='add'>+amdgpu_gpr</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+Used to query GFX/compute GPR (General Purpose Register) information from the</div><div class='add'>+hardware.  Used by tools like UMR to query GPRs when debugging shaders.</div><div class='add'>+</div><div class='add'>+amdgpu_gprwave</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Provides an IOCTL interface used by UMR for interacting with shader waves.</div><div class='add'>+</div><div class='add'>+amdgpu_fw_attestation</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+Provides an interface for reading back firmware attestation records.</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/debugging.rst b/Documentation/gpu/amdgpu/debugging.rst<br/>index e75f97d0e4ea..7cbfea0606e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/debugging.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/amdgpu/debugging.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/debugging.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/debugging.rst</a></div><div class='hunk'>@@ -2,6 +2,13 @@</div><div class='ctx'>  GPU Debugging</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='add'>+General Debugging Options</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+The DebugFS section provides documentation on a number files to aid in debugging</div><div class='add'>+issues on the GPU.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> GPUVM Debugging</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/dc-debug.rst b/Documentation/gpu/amdgpu/display/dc-debug.rst<br/>index 013f63b271f3..605dca21f4ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/display/dc-debug.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/amdgpu/display/dc-debug.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/display/dc-debug.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/display/dc-debug.rst</a></div><div class='hunk'>@@ -154,7 +154,7 @@ of the display parameters, but the userspace might also cause this issue. One</div><div class='ctx'> way to identify the source of the problem is to take a screenshot or make a</div><div class='ctx'> desktop video capture when the problem happens; after checking the</div><div class='ctx'> screenshot/video recording, if you don't see any of the artifacts, it means</div><div class='del'>-that the issue is likely on the the driver side. If you can still see the</div><div class='add'>+that the issue is likely on the driver side. If you can still see the</div><div class='ctx'> problem in the data collected, it is an issue that probably happened during</div><div class='ctx'> rendering, and the display code just got the framebuffer already corrupted.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/amdgpu/driver-core.rst b/Documentation/gpu/amdgpu/driver-core.rst<br/>index 32723a925377..81256318e93c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/driver-core.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/amdgpu/driver-core.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/driver-core.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/driver-core.rst</a></div><div class='hunk'>@@ -67,36 +67,66 @@ GC (Graphics and Compute)</div><div class='ctx'>     This is the graphics and compute engine, i.e., the block that</div><div class='ctx'>     encompasses the 3D pipeline and and shader blocks.  This is by far the</div><div class='ctx'>     largest block on the GPU.  The 3D pipeline has tons of sub-blocks.  In</div><div class='del'>-    addition to that, it also contains the CP microcontrollers (ME, PFP,</div><div class='del'>-    CE, MEC) and the RLC microcontroller.  It's exposed to userspace for</div><div class='del'>-    user mode drivers (OpenGL, Vulkan, OpenCL, etc.)</div><div class='add'>+    addition to that, it also contains the CP microcontrollers (ME, PFP, CE,</div><div class='add'>+    MEC) and the RLC microcontroller.  It's exposed to userspace for user mode</div><div class='add'>+    drivers (OpenGL, Vulkan, OpenCL, etc.). More details in :ref:`Graphics (GFX)</div><div class='add'>+    and Compute &lt;amdgpu-gc&gt;`.</div><div class='ctx'> </div><div class='ctx'> VCN (Video Core Next)</div><div class='ctx'>     This is the multi-media engine.  It handles video and image encode and</div><div class='ctx'>     decode.  It's exposed to userspace for user mode drivers (VA-API,</div><div class='ctx'>     OpenMAX, etc.)</div><div class='ctx'> </div><div class='del'>-Graphics and Compute Microcontrollers</div><div class='del'>--------------------------------------</div><div class='del'>-</div><div class='del'>-CP (Command Processor)</div><div class='del'>-    The name for the hardware block that encompasses the front end of the</div><div class='del'>-    GFX/Compute pipeline.  Consists mainly of a bunch of microcontrollers</div><div class='del'>-    (PFP, ME, CE, MEC).  The firmware that runs on these microcontrollers</div><div class='del'>-    provides the driver interface to interact with the GFX/Compute engine.</div><div class='del'>-</div><div class='del'>-    MEC (MicroEngine Compute)</div><div class='del'>-        This is the microcontroller that controls the compute queues on the</div><div class='del'>-        GFX/compute engine.</div><div class='del'>-</div><div class='del'>-    MES (MicroEngine Scheduler)</div><div class='del'>-        This is a new engine for managing queues.  This is currently unused.</div><div class='del'>-</div><div class='del'>-RLC (RunList Controller)</div><div class='del'>-    This is another microcontroller in the GFX/Compute engine.  It handles</div><div class='del'>-    power management related functionality within the GFX/Compute engine.</div><div class='del'>-    The name is a vestige of old hardware where it was originally added</div><div class='del'>-    and doesn't really have much relation to what the engine does now.</div><div class='add'>+.. _pipes-and-queues-description:</div><div class='add'>+</div><div class='add'>+GFX, Compute, and SDMA Overall Behavior</div><div class='add'>+=======================================</div><div class='add'>+</div><div class='add'>+.. note:: For simplicity, whenever the term block is used in this section, it</div><div class='add'>+   means GFX, Compute, and SDMA.</div><div class='add'>+</div><div class='add'>+GFX, Compute and SDMA share a similar form of operation that can be abstracted</div><div class='add'>+to facilitate understanding of the behavior of these blocks. See the figure</div><div class='add'>+below illustrating the common components of these blocks:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: pipe_and_queue_abstraction.svg</div><div class='add'>+</div><div class='add'>+In the central part of this figure, you can see two hardware elements, one called</div><div class='add'>+**Pipes** and another called **Queues**; it is important to highlight that Queues</div><div class='add'>+must be associated with a Pipe and vice-versa. Every specific hardware IP may have</div><div class='add'>+a different number of Pipes and, in turn, a different number of Queues; for</div><div class='add'>+example, GFX 11 has two Pipes and two Queues per Pipe for the GFX front end.</div><div class='add'>+</div><div class='add'>+Pipe is the hardware that processes the instructions available in the Queues;</div><div class='add'>+in other words, it is a thread executing the operations inserted in the Queue.</div><div class='add'>+One crucial characteristic of Pipes is that they can only execute one Queue at</div><div class='add'>+a time; no matter if the hardware has multiple Queues in the Pipe, it only runs</div><div class='add'>+one Queue per Pipe.</div><div class='add'>+</div><div class='add'>+Pipes have the mechanics of swapping between queues at the hardware level.</div><div class='add'>+Nonetheless, they only make use of Queues that are considered mapped. Pipes can</div><div class='add'>+switch between queues based on any of the following inputs:</div><div class='add'>+</div><div class='add'>+1. Command Stream;</div><div class='add'>+2. Packet by Packet;</div><div class='add'>+3. Other hardware requests the change (e.g., MES).</div><div class='add'>+</div><div class='add'>+Queues within Pipes are defined by the Hardware Queue Descriptors (HQD).</div><div class='add'>+Associated with the HQD concept, we have the Memory Queue Descriptor (MQD),</div><div class='add'>+which is responsible for storing information about the state of each of the</div><div class='add'>+available Queues in the memory. The state of a Queue contains information such</div><div class='add'>+as the GPU virtual address of the queue itself, save areas, doorbell, etc. The</div><div class='add'>+MQD also stores the HQD registers, which are vital for activating or</div><div class='add'>+deactivating a given Queue.  The scheduling firmware (e.g., MES) is responsible</div><div class='add'>+for loading HQDs from MQDs and vice versa.</div><div class='add'>+</div><div class='add'>+The Queue-switching process can also happen with the firmware requesting the</div><div class='add'>+preemption or unmapping of a Queue. The firmware waits for the HQD_ACTIVE bit</div><div class='add'>+to change to low before saving the state into the MQD. To make a different</div><div class='add'>+Queue become active, the firmware copies the MQD state into the HQD registers</div><div class='add'>+and loads any additional state. Finally, it sets the HQD_ACTIVE bit to high to</div><div class='add'>+indicate that the queue is active.  The Pipe will then execute work from active</div><div class='add'>+Queues.</div><div class='ctx'> </div><div class='ctx'> Driver Structure</div><div class='ctx'> ================</div><div class='hunk'>@@ -110,7 +140,8 @@ Some useful constructs:</div><div class='ctx'> KIQ (Kernel Interface Queue)</div><div class='ctx'>     This is a control queue used by the kernel driver to manage other gfx</div><div class='ctx'>     and compute queues on the GFX/compute engine.  You can use it to</div><div class='del'>-    map/unmap additional queues, etc.</div><div class='add'>+    map/unmap additional queues, etc.  This is replaced by MES on</div><div class='add'>+    GFX 11 and newer hardware.</div><div class='ctx'> </div><div class='ctx'> IB (Indirect Buffer)</div><div class='ctx'>     A command buffer for a particular engine.  Rather than writing</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/driver-misc.rst b/Documentation/gpu/amdgpu/driver-misc.rst<br/>index e40e15f89fd3..25b0c857816e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/driver-misc.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/amdgpu/driver-misc.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/driver-misc.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/driver-misc.rst</a></div><div class='hunk'>@@ -50,23 +50,6 @@ board_info</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</div><div class='ctx'>    :doc: board_info</div><div class='ctx'> </div><div class='del'>-Accelerated Processing Units (APU) Info</div><div class='del'>----------------------------------------</div><div class='del'>-</div><div class='del'>-.. csv-table::</div><div class='del'>-   :header-rows: 1</div><div class='del'>-   :widths: 3, 2, 2, 1, 1, 1, 1</div><div class='del'>-   :file: ./apu-asic-info-table.csv</div><div class='del'>-</div><div class='del'>-Discrete GPU Info</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-.. csv-table::</div><div class='del'>-   :header-rows: 1</div><div class='del'>-   :widths: 3, 2, 2, 1, 1, 1</div><div class='del'>-   :file: ./dgpu-asic-info-table.csv</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> GPU Memory Usage Information</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/amdgpu/gc/index.rst b/Documentation/gpu/amdgpu/gc/index.rst<br/>new file mode 100644<br/>index 000000000000..ff6e9ef5cbee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/gc/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/gc/index.rst</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+.. _amdgpu-gc:</div><div class='add'>+</div><div class='add'>+========================================</div><div class='add'>+ drm/amdgpu - Graphics and Compute (GC)</div><div class='add'>+========================================</div><div class='add'>+</div><div class='add'>+The relationship between the CPU and GPU can be described as the</div><div class='add'>+producer-consumer problem, where the CPU fills out a buffer with operations</div><div class='add'>+(producer) to be executed by the GPU (consumer). The requested operations in</div><div class='add'>+the buffer are called Command Packets, which can be summarized as a compressed</div><div class='add'>+way of transmitting command information to the graphics controller.</div><div class='add'>+</div><div class='add'>+The component that acts as the front end between the CPU and the GPU is called</div><div class='add'>+the Command Processor (CP). This component is responsible for providing greater</div><div class='add'>+flexibility to the GC since CP makes it possible to program various aspects of</div><div class='add'>+the GPU pipeline. CP also coordinates the communication between the CPU and GPU</div><div class='add'>+via a mechanism named **Ring Buffers**, where the CPU appends information to</div><div class='add'>+the buffer while the GPU removes operations. It is relevant to highlight that a</div><div class='add'>+CPU can add a pointer to the Ring Buffer that points to another region of</div><div class='add'>+memory outside the Ring Buffer, and CP can handle it; this mechanism is called</div><div class='add'>+**Indirect Buffer (IB)**. CP receives and parses the Command Streams (CS), and</div><div class='add'>+writes the operations to the correct hardware blocks.</div><div class='add'>+</div><div class='add'>+Graphics (GFX) and Compute Microcontrollers</div><div class='add'>+-------------------------------------------</div><div class='add'>+</div><div class='add'>+GC is a large block, and as a result, it has multiple firmware associated with</div><div class='add'>+it. Some of them are:</div><div class='add'>+</div><div class='add'>+CP (Command Processor)</div><div class='add'>+    The name for the hardware block that encompasses the front end of the</div><div class='add'>+    GFX/Compute pipeline. Consists mainly of a bunch of microcontrollers</div><div class='add'>+    (PFP, ME, CE, MEC). The firmware that runs on these microcontrollers</div><div class='add'>+    provides the driver interface to interact with the GFX/Compute engine.</div><div class='add'>+</div><div class='add'>+    MEC (MicroEngine Compute)</div><div class='add'>+        This is the microcontroller that controls the compute queues on the</div><div class='add'>+        GFX/compute engine.</div><div class='add'>+</div><div class='add'>+    MES (MicroEngine Scheduler)</div><div class='add'>+        This is the engine for managing queues. For more details check</div><div class='add'>+        :ref:`MicroEngine Scheduler (MES) &lt;amdgpu-mes&gt;`.</div><div class='add'>+</div><div class='add'>+RLC (RunList Controller)</div><div class='add'>+    This is another microcontroller in the GFX/Compute engine. It handles</div><div class='add'>+    power management related functionality within the GFX/Compute engine.</div><div class='add'>+    The name is a vestige of old hardware where it was originally added</div><div class='add'>+    and doesn't really have much relation to what the engine does now.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+</div><div class='add'>+   mes.rst</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/gc/mes.rst b/Documentation/gpu/amdgpu/gc/mes.rst<br/>new file mode 100644<br/>index 000000000000..b99eb211b179<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/gc/mes.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/gc/mes.rst</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+.. _amdgpu-mes:</div><div class='add'>+</div><div class='add'>+=============================</div><div class='add'>+ MicroEngine Scheduler (MES)</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   Queue and ring buffer are used as a synonymous.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   This section assumes that you are familiar with the concept of Pipes, Queues, and GC.</div><div class='add'>+   If not, check :ref:`GFX, Compute, and SDMA Overall Behavior&lt;pipes-and-queues-description&gt;`</div><div class='add'>+   and :ref:`drm/amdgpu - Graphics and Compute (GC) &lt;amdgpu-gc&gt;`.</div><div class='add'>+</div><div class='add'>+Every GFX has a pipe component with one or more hardware queues. Pipes can</div><div class='add'>+switch between queues depending on certain conditions, and one of the</div><div class='add'>+components that can request a queue switch to a pipe is the MicroEngine</div><div class='add'>+Scheduler (MES). Whenever the driver is initialized, it creates one MQD per</div><div class='add'>+hardware queue, and then the MQDs are handed to the MES firmware for mapping</div><div class='add'>+to:</div><div class='add'>+</div><div class='add'>+1. Kernel Queues (legacy): This queue is statically mapped to HQDs and never</div><div class='add'>+   preempted. Even though this is a legacy feature, it is the current default, and</div><div class='add'>+   most existing hardware supports it. When an application submits work to the</div><div class='add'>+   kernel driver, it submits all of the application command buffers to the kernel</div><div class='add'>+   queues. The CS IOCTL takes the command buffer from the applications and</div><div class='add'>+   schedules them on the kernel queue.</div><div class='add'>+</div><div class='add'>+2. User Queues: These queues are dynamically mapped to the HQDs. Regarding the</div><div class='add'>+   utilization of User Queues, the userspace application will create its user</div><div class='add'>+   queues and submit work directly to its user queues with no need to IOCTL for</div><div class='add'>+   each submission and no need to share a single kernel queue.</div><div class='add'>+</div><div class='add'>+In terms of User Queues, MES can dynamically map them to the HQD. If there are</div><div class='add'>+more MQDs than HQDs, the MES firmware will preempt other user queues to make</div><div class='add'>+sure each queues get a time slice; in other words, MES is a microcontroller</div><div class='add'>+that handles the mapping and unmapping of MQDs into HQDs, as well as the</div><div class='add'>+priorities and oversubscription of MQDs.</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst<br/>index 302d039928ee..bb2894b5edaf 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/amdgpu/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/amdgpu/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/amdgpu/index.rst</a></div><div class='hunk'>@@ -7,8 +7,10 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'> </div><div class='del'>-   module-parameters</div><div class='ctx'>    driver-core</div><div class='add'>+   amd-hardware-list-info</div><div class='add'>+   module-parameters</div><div class='add'>+   gc/index</div><div class='ctx'>    display/index</div><div class='ctx'>    flashing</div><div class='ctx'>    xgmi</div><div class='hunk'>@@ -16,5 +18,6 @@ Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.</div><div class='ctx'>    thermal</div><div class='ctx'>    driver-misc</div><div class='ctx'>    debugging</div><div class='add'>+   debugfs</div><div class='ctx'>    process-isolation</div><div class='ctx'>    amdgpu-glossary</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/pipe_and_queue_abstraction.svg b/Documentation/gpu/amdgpu/pipe_and_queue_abstraction.svg<br/>new file mode 100644<br/>index 000000000000..0df3c6b3000b<br/>--- /dev/null<br/>+++ b/<a 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1;stroke-dashoffset:0;marker-end:url(#ArrowWide)"</div><div class='add'>+       d="m -45.247972,57.442462 v 5.888987 h 11.344412"</div><div class='add'>+       id="path86"</div><div class='add'>+       sodipodi:nodetypes="ccc" /&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:7.05556px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.0690111"</div><div class='add'>+       x="-74.441521"</div><div class='add'>+       y="82.441582"</div><div class='add'>+       id="text87"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-74.441521"</div><div class='add'>+         y="82.441582"</div><div class='add'>+         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style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:7.05556px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:center;text-anchor:middle;stroke-width:0.0690111"</div><div class='add'>+         id="tspan91"&gt;MQD&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:10.5833px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.0690111"</div><div class='add'>+       x="-74.441521"</div><div class='add'>+       y="148.1461"</div><div class='add'>+       id="text92"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-74.441521"</div><div class='add'>+         y="148.1461"</div><div class='add'>+         style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:10.5833px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:center;writing-mode:tb-rl;text-anchor:middle;stroke-width:0.0690111"</div><div class='add'>+         id="tspan92"&gt;...&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;g</div><div class='add'>+       id="g97"</div><div class='add'>+       transform="translate(-5.8208336)"&gt;</div><div class='add'>+      &lt;rect</div><div class='add'>+         style="fill:#aaffcc;fill-opacity:1;stroke:#1a1a1a;stroke-width:0.5;stroke-dasharray:none;stroke-dashoffset:0"</div><div class='add'>+         id="rect96"</div><div class='add'>+         width="58.726093"</div><div class='add'>+         height="27.598055"</div><div class='add'>+         x="-142.96434"</div><div class='add'>+         y="46.852512" /&gt;</div><div class='add'>+      &lt;text</div><div class='add'>+         xml:space="preserve"</div><div class='add'>+         style="font-style:normal;font-weight:normal;font-size:4.23333px;line-height:1.25;font-family:sans-serif;text-align:start;letter-spacing:0px;word-spacing:0px;text-anchor:start;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.0690111"</div><div class='add'>+         x="-139.74622"</div><div class='add'>+         y="52.62756"</div><div class='add'>+         id="text93"&gt;&lt;tspan</div><div class='add'>+           sodipodi:role="line"</div><div class='add'>+           x="-139.74622"</div><div class='add'>+           y="52.62756"</div><div class='add'>+           style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:start;text-anchor:start;stroke-width:0.0690111"</div><div class='add'>+           id="tspan93"&gt;HQD Registers&lt;/tspan&gt;&lt;tspan</div><div class='add'>+           sodipodi:role="line"</div><div class='add'>+          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class='add'>+           x="-139.74622"</div><div class='add'>+           y="68.502548"</div><div class='add'>+           style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:start;text-anchor:start;stroke-width:0.0690111"</div><div class='add'>+           id="tspan97"&gt;...&lt;/tspan&gt;&lt;tspan</div><div class='add'>+           sodipodi:role="line"</div><div class='add'>+           x="-139.74622"</div><div class='add'>+           y="73.794212"</div><div class='add'>+           style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:start;text-anchor:start;stroke-width:0.0690111"</div><div class='add'>+           id="tspan94" /&gt;&lt;/text&gt;</div><div class='add'>+    &lt;/g&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:4.23333px;line-height:1.25;font-family:sans-serif;text-align:start;letter-spacing:0px;word-spacing:0px;text-anchor:start;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.0690111"</div><div class='add'>+       x="-61.293022"</div><div class='add'>+       y="-19.380915"</div><div class='add'>+       id="text93-1"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-61.293022"</div><div class='add'>+         y="-19.380915"</div><div class='add'>+         style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:center;text-anchor:middle;stroke-width:0.0690111"</div><div class='add'>+         id="tspan104"&gt;SWITCH QUEUE:&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-61.293022"</div><div class='add'>+         y="-14.089252"</div><div class='add'>+         style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:start;text-anchor:start;stroke-width:0.0690111"</div><div class='add'>+         id="tspan101"&gt;WAIT FOR HQD_ACTIVE = 0&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-61.293022"</div><div class='add'>+         y="-8.7975903"</div><div class='add'>+         style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:start;text-anchor:start;stroke-width:0.0690111"</div><div class='add'>+         id="tspan105"&gt;SAVE QUEUE STATE TO THE MQD&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-61.293022"</div><div class='add'>+         y="-3.505928"</div><div class='add'>+         style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:start;text-anchor:start;stroke-width:0.0690111"</div><div class='add'>+         id="tspan102"&gt;COPY NEW MQD STATE&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-61.293022"</div><div class='add'>+         y="1.7857342"</div><div class='add'>+         style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:4.23333px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:start;text-anchor:start;stroke-width:0.0690111"</div><div class='add'>+         id="tspan103"&gt;SET HQD_ACTIVE = 1&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;circle</div><div class='add'>+       style="fill:#ffeeaa;fill-opacity:1;stroke:#1a1a1a;stroke-width:1.88976;stroke-dasharray:none;stroke-dashoffset:0"</div><div class='add'>+       id="path97"</div><div class='add'>+       cx="0"</div><div class='add'>+       cy="0"</div><div class='add'>+       r="0"</div><div class='add'>+       transform="matrix(0.26458333,0,0,0.26458333,-149.03517,37.347779)" /&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:5.64444px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.0690111"</div><div class='add'>+       x="-36.659206"</div><div class='add'>+       y="-44.828983"</div><div class='add'>+       id="text106"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="-36.659206"</div><div class='add'>+         y="-44.828983"</div><div class='add'>+         style="font-style:normal;font-variant:normal;font-weight:bold;font-stretch:normal;font-size:5.64444px;font-family:sans-serif;-inkscape-font-specification:'sans-serif Bold';text-align:center;text-anchor:middle;stroke-width:0.0690111"</div><div class='add'>+         id="tspan106"&gt;Firmware&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;path</div><div class='add'>+       style="fill:none;fill-opacity:1;stroke:#1a1a1a;stroke-width:1;stroke-dasharray:none;stroke-dashoffset:0;marker-start:url(#marker109);marker-end:url(#ArrowTriangleStylized)"</div><div class='add'>+       d="M -84.242601,-9.1838245 H -98.041629 V 33.17598"</div><div class='add'>+       id="path106" /&gt;</div><div class='add'>+    &lt;path</div><div class='add'>+       style="fill:none;fill-opacity:1;stroke:#1a1a1a;stroke-width:1;stroke-dasharray:none;stroke-dashoffset:0;marker-end:url(#Dot)"</div><div class='add'>+       d="M 9.9745536,-9.3442784 H 29.549918 V 37.170287"</div><div class='add'>+       id="path107"</div><div class='add'>+       sodipodi:nodetypes="ccc" /&gt;</div><div class='add'>+  &lt;/g&gt;</div><div class='add'>+&lt;/svg&gt;</div><div class='head'>diff --git a/Documentation/gpu/automated_testing.rst b/Documentation/gpu/automated_testing.rst<br/>index 6d7c6086034d..62aa3ede02a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/automated_testing.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/automated_testing.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/automated_testing.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/automated_testing.rst</a></div><div class='hunk'>@@ -115,6 +115,10 @@ created (eg. https://gitlab.freedesktop.org/janedoe/linux/-/pipelines)</div><div class='ctx'> 5. The various jobs will be run and when the pipeline is finished, all jobs</div><div class='ctx'> should be green unless a regression has been found.</div><div class='ctx'> </div><div class='add'>+6. Warnings in the pipeline indicate that lockdep</div><div class='add'>+(see Documentation/locking/lockdep-design.rst) issues have been detected</div><div class='add'>+during the tests.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> How to update test expectations</div><div class='ctx'> ===============================</div><div class='head'>diff --git a/Documentation/gpu/driver-uapi.rst b/Documentation/gpu/driver-uapi.rst<br/>index 971cdb4816fc..1f15a8ca1265 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/driver-uapi.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/driver-uapi.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/driver-uapi.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/driver-uapi.rst</a></div><div class='hunk'>@@ -27,3 +27,8 @@ drm/xe uAPI</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: include/uapi/drm/xe_drm.h</div><div class='add'>+</div><div class='add'>+drm/asahi uAPI</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/drm/asahi_drm.h</div><div class='head'>diff --git a/Documentation/gpu/drm-kms-helpers.rst b/Documentation/gpu/drm-kms-helpers.rst<br/>index b4ee25af1702..5139705089f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/drm-kms-helpers.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/drm-kms-helpers.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/drm-kms-helpers.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/drm-kms-helpers.rst</a></div><div class='hunk'>@@ -233,6 +233,21 @@ Panel Self Refresh Helper Reference</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_self_refresh_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+HDMI Atomic State Helpers</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_hdmi_state_helper.c</div><div class='add'>+   :doc: hdmi helpers</div><div class='add'>+</div><div class='add'>+Functions Reference</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_hdmi_state_helper.c</div><div class='add'>+   :export:</div><div class='add'>+</div><div class='ctx'> HDCP Helper Functions Reference</div><div class='ctx'> ===============================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/nouveau.rst b/Documentation/gpu/nouveau.rst<br/>index 0f34131ccc27..b8c801e0068c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/nouveau.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/nouveau.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/nouveau.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/nouveau.rst</a></div><div class='hunk'>@@ -27,3 +27,6 @@ GSP Support</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c</div><div class='ctx'>    :doc: GSP message queue element</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h</div><div class='add'>+   :doc: GSP message handling policy</div><div class='head'>diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst<br/>index ca08377d3b73..8a459fc08812 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/nova/core/todo.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/nova/core/todo.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/nova/core/todo.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/nova/core/todo.rst</a></div><div class='hunk'>@@ -102,7 +102,13 @@ Usage:</div><div class='ctx'> 	let boot0 = Boot0::read(&amp;bar);</div><div class='ctx'> 	pr_info!("Revision: {}\n", boot0.revision());</div><div class='ctx'> </div><div class='add'>+Note: a work-in-progress implementation currently resides in</div><div class='add'>+`drivers/gpu/nova-core/regs/macros.rs` and is used in nova-core. It would be</div><div class='add'>+nice to improve it (possibly using proc macros) and move it to the `kernel`</div><div class='add'>+crate so it can be used by other components as well.</div><div class='add'>+</div><div class='ctx'> | Complexity: Advanced</div><div class='add'>+| Contact: Alexandre Courbot</div><div class='ctx'> </div><div class='ctx'> Delay / Sleep abstractions</div><div class='ctx'> --------------------------</div><div class='hunk'>@@ -190,16 +196,6 @@ Rust abstraction for debugfs APIs.</div><div class='ctx'> | Reference: Export GSP log buffers</div><div class='ctx'> | Complexity: Intermediate</div><div class='ctx'> </div><div class='del'>-Vec extensions</div><div class='del'>---------------</div><div class='del'>-</div><div class='del'>-Implement ``Vec::truncate`` and ``Vec::resize``.</div><div class='del'>-</div><div class='del'>-Currently this is used for some experimental code to parse the vBIOS.</div><div class='del'>-</div><div class='del'>-| Reference vBIOS support</div><div class='del'>-| Complexity: Beginner</div><div class='del'>-</div><div class='ctx'> GPU (general)</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/rfc/i915_scheduler.rst b/Documentation/gpu/rfc/i915_scheduler.rst<br/>index c237ebc024cd..2974525f0ac5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/rfc/i915_scheduler.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/rfc/i915_scheduler.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/rfc/i915_scheduler.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/rfc/i915_scheduler.rst</a></div><div class='hunk'>@@ -26,7 +26,7 @@ i915 with the DRM scheduler is:</div><div class='ctx'> 	  which configures a slot with N contexts</div><div class='ctx'> 	* After I915_CONTEXT_ENGINES_EXT_PARALLEL a user can submit N batches to</div><div class='ctx'> 	  a slot in a single execbuf IOCTL and the batches run on the GPU in</div><div class='del'>-	  paralllel</div><div class='add'>+	  parallel</div><div class='ctx'> 	* Initially only for GuC submission but execlists can be supported if</div><div class='ctx'> 	  needed</div><div class='ctx'> * Convert the i915 to use the DRM scheduler</div><div class='head'>diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst<br/>index 256d0d1cb216..c57777a24e03 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/todo.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/todo.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/todo.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/todo.rst</a></div><div class='hunk'>@@ -441,14 +441,15 @@ Contact: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='ctx'> </div><div class='ctx'> Level: Intermediate</div><div class='ctx'> </div><div class='del'>-Request memory regions in all drivers</div><div class='del'>--------------------------------------</div><div class='add'>+Request memory regions in all fbdev drivers</div><div class='add'>+--------------------------------------------</div><div class='ctx'> </div><div class='del'>-Go through all drivers and add code to request the memory regions that the</div><div class='del'>-driver uses. This requires adding calls to request_mem_region(),</div><div class='add'>+Old/ancient fbdev drivers do not request their memory properly.</div><div class='add'>+Go through these drivers and add code to request the memory regions</div><div class='add'>+that the driver uses. This requires adding calls to request_mem_region(),</div><div class='ctx'> pci_request_region() or similar functions. Use helpers for managed cleanup</div><div class='del'>-where possible.</div><div class='del'>-</div><div class='add'>+where possible. Problematic areas include hardware that has exclusive ranges</div><div class='add'>+like VGA. VGA16fb does not request the range as it is expected.</div><div class='ctx'> Drivers are pretty bad at doing this and there used to be conflicts among</div><div class='ctx'> DRM and fbdev drivers. Still, it's the correct thing to do.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/vgaarbiter.rst b/Documentation/gpu/vgaarbiter.rst<br/>index bde3c0afb059..d1e953712cc2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/vgaarbiter.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/vgaarbiter.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/vgaarbiter.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/vgaarbiter.rst</a></div><div class='hunk'>@@ -11,9 +11,9 @@ Section 7, Legacy Devices.</div><div class='ctx'> </div><div class='ctx'> The Resource Access Control (RAC) module inside the X server [0] existed for</div><div class='ctx'> the legacy VGA arbitration task (besides other bus management tasks) when more</div><div class='del'>-than one legacy device co-exists on the same machine. But the problem happens</div><div class='add'>+than one legacy device co-exist on the same machine. But the problem happens</div><div class='ctx'> when these devices are trying to be accessed by different userspace clients</div><div class='del'>-(e.g. two server in parallel). Their address assignments conflict. Moreover,</div><div class='add'>+(e.g. two servers in parallel). Their address assignments conflict. Moreover,</div><div class='ctx'> ideally, being a userspace application, it is not the role of the X server to</div><div class='ctx'> control bus resources. Therefore an arbitration scheme outside of the X server</div><div class='ctx'> is needed to control the sharing of these resources. This document introduces</div><div class='hunk'>@@ -106,7 +106,7 @@ In-kernel interface</div><div class='ctx'> libpciaccess</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='del'>-To use the vga arbiter char device it was implemented an API inside the</div><div class='add'>+To use the vga arbiter char device, an API was implemented inside the</div><div class='ctx'> libpciaccess library. One field was added to struct pci_device (each device</div><div class='ctx'> on the system)::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst<br/>index 92cfb25e64d3..b2369561f24e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/xe/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/xe/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/xe/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/xe/index.rst</a></div><div class='hunk'>@@ -25,3 +25,4 @@ DG2, etc is provided to prototype the driver.</div><div class='ctx'>    xe_debugging</div><div class='ctx'>    xe_devcoredump</div><div class='ctx'>    xe-drm-usage-stats.rst</div><div class='add'>+   xe_configfs</div><div class='head'>diff --git a/Documentation/gpu/xe/xe_configfs.rst b/Documentation/gpu/xe/xe_configfs.rst<br/>new file mode 100644<br/>index 000000000000..9b9d941eb20e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/xe/xe_configfs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/xe/xe_configfs.rst</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+.. _xe_configfs:</div><div class='add'>+</div><div class='add'>+============</div><div class='add'>+Xe Configfs</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/xe/xe_configfs.c</div><div class='add'>+   :doc: Xe Configfs</div><div class='head'>diff --git a/Documentation/gpu/xe/xe_firmware.rst b/Documentation/gpu/xe/xe_firmware.rst<br/>index afcb561cd37d..5d23e9f27391 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/xe/xe_firmware.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/xe/xe_firmware.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/xe/xe_firmware.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/xe/xe_firmware.rst</a></div><div class='hunk'>@@ -31,6 +31,12 @@ GuC Power Conservation (PC)</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/xe/xe_guc_pc.c</div><div class='ctx'>    :doc: GuC Power Conservation (PC)</div><div class='ctx'> </div><div class='add'>+PCIe Gen5 Limitations</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/xe/xe_device_sysfs.c</div><div class='add'>+   :doc: PCIe Gen5 Limitations</div><div class='add'>+</div><div class='ctx'> Internal API</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/xe/xe_pcode.rst b/Documentation/gpu/xe/xe_pcode.rst<br/>index d2e22cc45061..5937ef3599b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/gpu/xe/xe_pcode.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/gpu/xe/xe_pcode.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/gpu/xe/xe_pcode.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/gpu/xe/xe_pcode.rst</a></div><div class='hunk'>@@ -12,3 +12,10 @@ Internal API</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/xe/xe_pcode.c</div><div class='ctx'>    :internal:</div><div class='add'>+</div><div class='add'>+==================</div><div class='add'>+Boot Survivability</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/xe/xe_survivability_mode.c</div><div class='add'>+   :doc: Xe Boot Survivability</div><div class='head'>diff --git a/Documentation/hid/intel-thc-hid.rst b/Documentation/hid/intel-thc-hid.rst<br/>index 6c417205ac6a..dc9250787fc5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hid/intel-thc-hid.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/hid/intel-thc-hid.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hid/intel-thc-hid.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/hid/intel-thc-hid.rst</a></div><div class='hunk'>@@ -182,7 +182,7 @@ value and use PIO write (by setting SubIP write opcode) to do a write operation.</div><div class='ctx'> </div><div class='ctx'> THC also includes two GPIO pins, one for interrupt and the other for device reset control.</div><div class='ctx'> </div><div class='del'>-Interrupt line can be configured to either level triggerred or edge triggerred by setting MMIO</div><div class='add'>+Interrupt line can be configured to either level triggered or edge triggered by setting MMIO</div><div class='ctx'> Control register.</div><div class='ctx'> </div><div class='ctx'> Reset line is controlled by BIOS (or EFI) through ACPI _RST method, driver needs to call this</div><div class='hunk'>@@ -302,10 +302,10 @@ waiting for interrupt ready then read out the data from system memory.</div><div class='ctx'> 3.3.2 Software DMA channel</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-THC supports a software triggerred RxDMA mode to read the touch data from touch IC. This SW RxDMA</div><div class='add'>+THC supports a software triggered RxDMA mode to read the touch data from touch IC. This SW RxDMA</div><div class='ctx'> is the 3rd THC RxDMA engine with the similar functionalities as the existing two RxDMAs, the only</div><div class='del'>-difference is this SW RxDMA is triggerred by software, and RxDMA2 is triggerred by external Touch IC</div><div class='del'>-interrupt. It gives a flexiblity to software driver to use RxDMA read Touch IC data in any time.</div><div class='add'>+difference is this SW RxDMA is triggered by software, and RxDMA2 is triggered by external Touch IC</div><div class='add'>+interrupt. It gives a flexibility to software driver to use RxDMA read Touch IC data in any time.</div><div class='ctx'> </div><div class='ctx'> Before software starts a SW RxDMA, it shall stop the 1st and 2nd RxDMA, clear PRD read/write pointer</div><div class='ctx'> and quiesce the device interrupt (THC_DEVINT_QUIESCE_HW_STS = 1), other operations are the same with</div><div class='head'>diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst<br/>index f0ddf6222c44..ffe1a756a4f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/hwmon/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/hwmon/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/hwmon/index.rst</a></div><div class='hunk'>@@ -189,7 +189,6 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    nzxt-kraken3</div><div class='ctx'>    nzxt-smart2</div><div class='ctx'>    occ</div><div class='del'>-   oxp-sensors</div><div class='ctx'>    pc87360</div><div class='ctx'>    pc87427</div><div class='ctx'>    pcf8591</div><div class='head'>diff --git a/Documentation/hwmon/oxp-sensors.rst b/Documentation/hwmon/oxp-sensors.rst<br/>deleted file mode 100644<br/>index 581c4dafbfa1..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/hwmon/oxp-sensors.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/hwmon/oxp-sensors.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,89 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-</div><div class='del'>-Kernel driver oxp-sensors</div><div class='del'>-=========================</div><div class='del'>-</div><div class='del'>-Authors:</div><div class='del'>-    - Derek John Clark &lt;derekjohn.clark@gmail.com&gt;</div><div class='del'>-    - Joaquín Ignacio Aramendía &lt;samsagax@gmail.com&gt;</div><div class='del'>-</div><div class='del'>-Description:</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-Handheld devices from OneNetbook, AOKZOE, AYANEO, And OrangePi provide fan</div><div class='del'>-readings and fan control through their embedded controllers.</div><div class='del'>-</div><div class='del'>-Currently supports OneXPlayer devices, AOKZOE, AYANEO, and OrangePi</div><div class='del'>-handheld devices. AYANEO devices preceding the AIR and OneXPlayer devices</div><div class='del'>-preceding the Mini A07 are not supportable as the EC model is different</div><div class='del'>-and do not have manual control capabilities.</div><div class='del'>-</div><div class='del'>-Some OneXPlayer and AOKZOE models have a toggle for changing the behaviour</div><div class='del'>-of the "Turbo/Silent" button of the device. It will change the key event</div><div class='del'>-that it triggers with a flip of the `tt_toggle` attribute. See below for</div><div class='del'>-boards that support this function.</div><div class='del'>-</div><div class='del'>-Supported devices</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-Currently the driver supports the following handhelds:</div><div class='del'>-</div><div class='del'>- - AOKZOE A1</div><div class='del'>- - AOKZOE A1 PRO</div><div class='del'>- - AYANEO 2</div><div class='del'>- - AYANEO 2S</div><div class='del'>- - AYANEO AIR</div><div class='del'>- - AYANEO AIR 1S</div><div class='del'>- - AYANEO AIR Plus (Mendocino)</div><div class='del'>- - AYANEO AIR Pro</div><div class='del'>- - AYANEO Flip DS</div><div class='del'>- - AYANEO Flip KB</div><div class='del'>- - AYANEO Geek</div><div class='del'>- - AYANEO Geek 1S</div><div class='del'>- - AYANEO KUN</div><div class='del'>- - OneXPlayer 2</div><div class='del'>- - OneXPlayer 2 Pro</div><div class='del'>- - OneXPlayer AMD</div><div class='del'>- - OneXPlayer mini AMD</div><div class='del'>- - OneXPlayer mini AMD PRO</div><div class='del'>- - OneXPlayer OneXFly</div><div class='del'>- - OneXPlayer X1 A</div><div class='del'>- - OneXPlayer X1 i</div><div class='del'>- - OneXPlayer X1 mini</div><div class='del'>- - OrangePi NEO-01</div><div class='del'>-</div><div class='del'>-"Turbo/Silent" button behaviour toggle is only supported on:</div><div class='del'>- - AOK ZOE A1</div><div class='del'>- - AOK ZOE A1 PRO</div><div class='del'>- - OneXPlayer 2</div><div class='del'>- - OneXPlayer 2 Pro</div><div class='del'>- - OneXPlayer mini AMD (only with updated alpha BIOS)</div><div class='del'>- - OneXPlayer mini AMD PRO</div><div class='del'>- - OneXPlayer OneXFly</div><div class='del'>- - OneXPlayer X1 A</div><div class='del'>- - OneXPlayer X1 i</div><div class='del'>- - OneXPlayer X1 mini</div><div class='del'>-</div><div class='del'>-Sysfs entries</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-The following attributes are supported:</div><div class='del'>-</div><div class='del'>-fan1_input</div><div class='del'>-  Read Only. Reads current fan RPM.</div><div class='del'>-</div><div class='del'>-pwm1_enable</div><div class='del'>-  Read Write. Enable manual fan control. Write "1" to set to manual, write "0"</div><div class='del'>-  to let the EC control de fan speed. Read this attribute to see current status.</div><div class='del'>-</div><div class='del'>-pwm1</div><div class='del'>-  Read Write. Read this attribute to see current duty cycle in the range [0-255].</div><div class='del'>-  When pwm1_enable is set to "1" (manual) write any value in the range [0-255]</div><div class='del'>-  to set fan speed.</div><div class='del'>-</div><div class='del'>-tt_toggle</div><div class='del'>-  Read Write. Read this attribute to check the status of the turbo/silent</div><div class='del'>-  button behaviour function. Write "1" to activate the switch and "0" to</div><div class='del'>-  deactivate it. The specific keycodes and behaviour is specific to the device</div><div class='del'>-  both with this function on and off. This attribute is attached to the platform</div><div class='del'>-  driver and not to the hwmon driver (/sys/devices/platform/oxp-platform/tt_toggle)</div><div class='head'>diff --git a/Documentation/index.rst b/Documentation/index.rst<br/>index f9f525f4c0dd..c0cf79a87c3a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/index.rst</a></div><div class='hunk'>@@ -84,7 +84,7 @@ which are kept separately from the kernel's own documentation.</div><div class='ctx'> Firmware-related documentation</div><div class='ctx'> ==============================</div><div class='ctx'> The following holds information on the kernel's expectations regarding the</div><div class='del'>-platform firmwares.</div><div class='add'>+platform firmware.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='head'>diff --git a/Documentation/kbuild/reproducible-builds.rst b/Documentation/kbuild/reproducible-builds.rst<br/>index a7762486c93f..f2dcc39044e6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/kbuild/reproducible-builds.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/kbuild/reproducible-builds.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/kbuild/reproducible-builds.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/kbuild/reproducible-builds.rst</a></div><div class='hunk'>@@ -46,6 +46,21 @@ The kernel embeds the building user and host names in</div><div class='ctx'> `KBUILD_BUILD_USER and KBUILD_BUILD_HOST`_ variables.  If you are</div><div class='ctx'> building from a git commit, you could use its committer address.</div><div class='ctx'> </div><div class='add'>+Absolute filenames</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+When the kernel is built out-of-tree, debug information may include</div><div class='add'>+absolute filenames for the source files.  This must be overridden by</div><div class='add'>+including the ``-fdebug-prefix-map`` option in the `KCFLAGS`_ variable.</div><div class='add'>+</div><div class='add'>+Depending on the compiler used, the ``__FILE__`` macro may also expand</div><div class='add'>+to an absolute filename in an out-of-tree build.  Kbuild automatically</div><div class='add'>+uses the ``-fmacro-prefix-map`` option to prevent this, if it is</div><div class='add'>+supported.</div><div class='add'>+</div><div class='add'>+The Reproducible Builds web site has more information about these</div><div class='add'>+`prefix-map options`_.</div><div class='add'>+</div><div class='ctx'> Generated files in source packages</div><div class='ctx'> ----------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -116,5 +131,7 @@ See ``scripts/setlocalversion`` for details.</div><div class='ctx'> </div><div class='ctx'> .. _KBUILD_BUILD_TIMESTAMP: kbuild.html#kbuild-build-timestamp</div><div class='ctx'> .. _KBUILD_BUILD_USER and KBUILD_BUILD_HOST: kbuild.html#kbuild-build-user-kbuild-build-host</div><div class='add'>+.. _KCFLAGS: kbuild.html#kcflags</div><div class='add'>+.. _prefix-map options: https://reproducible-builds.org/docs/build-path/</div><div class='ctx'> .. _Reproducible Builds project: https://reproducible-builds.org/</div><div class='ctx'> .. _SOURCE_DATE_EPOCH: https://reproducible-builds.org/docs/source-date-epoch/</div><div class='head'>diff --git a/Documentation/leds/leds-class-multicolor.rst b/Documentation/leds/leds-class-multicolor.rst<br/>index c57b98bfd387..c6b47b4093c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/leds/leds-class-multicolor.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/leds/leds-class-multicolor.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/leds/leds-class-multicolor.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/leds/leds-class-multicolor.rst</a></div><div class='hunk'>@@ -18,24 +18,28 @@ array.  These files are children under the LED parent node created by the</div><div class='ctx'> led_class framework.  The led_class framework is documented in led-class.rst</div><div class='ctx'> within this documentation directory.</div><div class='ctx'> </div><div class='del'>-Each colored LED will be indexed under the multi_* files. The order of the</div><div class='del'>-colors will be arbitrary. The multi_index file can be read to determine the</div><div class='add'>+Each colored LED will be indexed under the ``multi_*`` files. The order of the</div><div class='add'>+colors will be arbitrary. The ``multi_index`` file can be read to determine the</div><div class='ctx'> color name to indexed value.</div><div class='ctx'> </div><div class='del'>-The multi_index file is an array that contains the string list of the colors as</div><div class='del'>-they are defined in each multi_* array file.</div><div class='add'>+The ``multi_index`` file is an array that contains the string list of the colors as</div><div class='add'>+they are defined in each ``multi_*`` array file.</div><div class='ctx'> </div><div class='del'>-The multi_intensity is an array that can be read or written to for the</div><div class='add'>+The ``multi_intensity`` is an array that can be read or written to for the</div><div class='ctx'> individual color intensities.  All elements within this array must be written in</div><div class='ctx'> order for the color LED intensities to be updated.</div><div class='ctx'> </div><div class='ctx'> Directory Layout Example</div><div class='ctx'> ========================</div><div class='del'>-root:/sys/class/leds/multicolor:status# ls -lR</div><div class='del'>--rw-r--r--    1 root     root          4096 Oct 19 16:16 brightness</div><div class='del'>--r--r--r--    1 root     root          4096 Oct 19 16:16 max_brightness</div><div class='del'>--r--r--r--    1 root     root          4096 Oct 19 16:16 multi_index</div><div class='del'>--rw-r--r--    1 root     root          4096 Oct 19 16:16 multi_intensity</div><div class='add'>+.. code-block:: console</div><div class='add'>+</div><div class='add'>+    root:/sys/class/leds/multicolor:status# ls -lR</div><div class='add'>+    -rw-r--r--    1 root     root          4096 Oct 19 16:16 brightness</div><div class='add'>+    -r--r--r--    1 root     root          4096 Oct 19 16:16 max_brightness</div><div class='add'>+    -r--r--r--    1 root     root          4096 Oct 19 16:16 multi_index</div><div class='add'>+    -rw-r--r--    1 root     root          4096 Oct 19 16:16 multi_intensity</div><div class='add'>+</div><div class='add'>+..</div><div class='ctx'> </div><div class='ctx'> Multicolor Class Brightness Control</div><div class='ctx'> ===================================</div><div class='hunk'>@@ -43,27 +47,31 @@ The brightness level for each LED is calculated based on the color LED</div><div class='ctx'> intensity setting divided by the global max_brightness setting multiplied by</div><div class='ctx'> the requested brightness.</div><div class='ctx'> </div><div class='del'>-led_brightness = brightness * multi_intensity/max_brightness</div><div class='add'>+``led_brightness = brightness * multi_intensity/max_brightness``</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> A user first writes the multi_intensity file with the brightness levels</div><div class='ctx'> for each LED that are necessary to achieve a certain color output from a</div><div class='ctx'> multicolor LED group.</div><div class='ctx'> </div><div class='del'>-cat /sys/class/leds/multicolor:status/multi_index</div><div class='del'>-green blue red</div><div class='add'>+.. code-block:: console</div><div class='add'>+</div><div class='add'>+    # cat /sys/class/leds/multicolor:status/multi_index</div><div class='add'>+    green blue red</div><div class='ctx'> </div><div class='del'>-echo 43 226 138 &gt; /sys/class/leds/multicolor:status/multi_intensity</div><div class='add'>+    # echo 43 226 138 &gt; /sys/class/leds/multicolor:status/multi_intensity</div><div class='ctx'> </div><div class='del'>-red -</div><div class='del'>-	intensity = 138</div><div class='del'>-	max_brightness = 255</div><div class='del'>-green -</div><div class='del'>-	intensity = 43</div><div class='del'>-	max_brightness = 255</div><div class='del'>-blue -</div><div class='del'>-	intensity = 226</div><div class='del'>-	max_brightness = 255</div><div class='add'>+    red -</div><div class='add'>+    	intensity = 138</div><div class='add'>+    	max_brightness = 255</div><div class='add'>+    green -</div><div class='add'>+    	intensity = 43</div><div class='add'>+    	max_brightness = 255</div><div class='add'>+    blue -</div><div class='add'>+    	intensity = 226</div><div class='add'>+    	max_brightness = 255</div><div class='add'>+</div><div class='add'>+..</div><div class='ctx'> </div><div class='ctx'> The user can control the brightness of that multicolor LED group by writing the</div><div class='ctx'> global 'brightness' control.  Assuming a max_brightness of 255 the user</div><div class='hunk'>@@ -71,16 +79,28 @@ may want to dim the LED color group to half.  The user would write a value of</div><div class='ctx'> 128 to the global brightness file then the values written to each LED will be</div><div class='ctx'> adjusted base on this value.</div><div class='ctx'> </div><div class='del'>-cat /sys/class/leds/multicolor:status/max_brightness</div><div class='del'>-255</div><div class='del'>-echo 128 &gt; /sys/class/leds/multicolor:status/brightness</div><div class='add'>+.. code-block:: console</div><div class='add'>+</div><div class='add'>+    # cat /sys/class/leds/multicolor:status/max_brightness</div><div class='add'>+    255</div><div class='add'>+    # echo 128 &gt; /sys/class/leds/multicolor:status/brightness</div><div class='ctx'> </div><div class='del'>-adjusted_red_value = 128 * 138/255 = 69</div><div class='del'>-adjusted_green_value = 128 * 43/255 = 21</div><div class='del'>-adjusted_blue_value = 128 * 226/255 = 113</div><div class='add'>+..</div><div class='add'>+</div><div class='add'>+.. code-block:: none</div><div class='add'>+</div><div class='add'>+    adjusted_red_value = 128 * 138/255 = 69</div><div class='add'>+    adjusted_green_value = 128 * 43/255 = 21</div><div class='add'>+    adjusted_blue_value = 128 * 226/255 = 113</div><div class='add'>+</div><div class='add'>+..</div><div class='ctx'> </div><div class='ctx'> Reading the global brightness file will return the current brightness value of</div><div class='ctx'> the color LED group.</div><div class='ctx'> </div><div class='del'>-cat /sys/class/leds/multicolor:status/brightness</div><div class='del'>-128</div><div class='add'>+.. code-block:: console</div><div class='add'>+</div><div class='add'>+    # cat /sys/class/leds/multicolor:status/brightness</div><div class='add'>+    128</div><div class='add'>+</div><div class='add'>+..</div><div class='head'>diff --git a/Documentation/netlink/genetlink-c.yaml b/Documentation/netlink/genetlink-c.yaml<br/>index 96fa1f1522ed..5a234e9b5fa2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-c.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/genetlink-c.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-c.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/genetlink-c.yaml</a></div><div class='hunk'>@@ -148,6 +148,9 @@ properties:</div><div class='ctx'>         attr-max-name:</div><div class='ctx'>           description: The explicit name for last member of attribute enum.</div><div class='ctx'>           type: string</div><div class='add'>+        header:</div><div class='add'>+          description: For C-compatible languages, header which already defines this attribute set.</div><div class='add'>+          type: string</div><div class='ctx'>         # End genetlink-c</div><div class='ctx'>         attributes:</div><div class='ctx'>           description: List of attributes in the space.</div><div class='head'>diff --git a/Documentation/netlink/genetlink-legacy.yaml b/Documentation/netlink/genetlink-legacy.yaml<br/>index a8c5b521937d..4cbfe666e6f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-legacy.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/genetlink-legacy.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/genetlink-legacy.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/genetlink-legacy.yaml</a></div><div class='hunk'>@@ -193,6 +193,9 @@ properties:</div><div class='ctx'>         attr-max-name:</div><div class='ctx'>           description: The explicit name for last member of attribute enum.</div><div class='ctx'>           type: string</div><div class='add'>+        header:</div><div class='add'>+          description: For C-compatible languages, header which already defines this attribute set.</div><div class='add'>+          type: string</div><div class='ctx'>         # End genetlink-c</div><div class='ctx'>         attributes:</div><div class='ctx'>           description: List of attributes in the space.</div><div class='head'>diff --git a/Documentation/netlink/netlink-raw.yaml b/Documentation/netlink/netlink-raw.yaml<br/>index 1b0772c8e333..e34bf23897fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/netlink-raw.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/netlink-raw.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/netlink-raw.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/netlink-raw.yaml</a></div><div class='hunk'>@@ -207,6 +207,9 @@ properties:</div><div class='ctx'>         attr-max-name:</div><div class='ctx'>           description: The explicit name for last member of attribute enum.</div><div class='ctx'>           type: string</div><div class='add'>+        header:</div><div class='add'>+          description: For C-compatible languages, header which already defines this attribute set.</div><div class='add'>+          type: string</div><div class='ctx'>         # End genetlink-c</div><div class='ctx'>         attributes:</div><div class='ctx'>           description: List of attributes in the space.</div><div class='head'>diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml<br/>index bd9726269b4f..05fee1b7fe19 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/devlink.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/devlink.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/devlink.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/devlink.yaml</a></div><div class='hunk'>@@ -202,6 +202,28 @@ definitions:</div><div class='ctx'>         name: exception</div><div class='ctx'>       -</div><div class='ctx'>         name: control</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: var-attr-type</div><div class='add'>+    entries:</div><div class='add'>+      -</div><div class='add'>+        name: u8</div><div class='add'>+        value: 1</div><div class='add'>+      -</div><div class='add'>+        name: u16</div><div class='add'>+      -</div><div class='add'>+        name: u32</div><div class='add'>+      -</div><div class='add'>+        name: u64</div><div class='add'>+      -</div><div class='add'>+        name: string</div><div class='add'>+      -</div><div class='add'>+        name: flag</div><div class='add'>+      -</div><div class='add'>+        name: nul_string</div><div class='add'>+        value: 10</div><div class='add'>+      -</div><div class='add'>+        name: binary</div><div class='ctx'> </div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='hunk'>@@ -498,6 +520,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: param-type</div><div class='ctx'>         type: u8</div><div class='add'>+        enum: var-attr-type</div><div class='ctx'> </div><div class='ctx'>       # TODO: fill in the attributes in between</div><div class='ctx'> </div><div class='hunk'>@@ -592,6 +615,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: fmsg-obj-value-type</div><div class='ctx'>         type: u8</div><div class='add'>+        enum: var-attr-type</div><div class='ctx'> </div><div class='ctx'>       # TODO: fill in the attributes in between</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml<br/>index 655d8d10fe24..9f98715a6512 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ethtool.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/ethtool.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ethtool.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/ethtool.yaml</a></div><div class='hunk'>@@ -89,13 +89,33 @@ definitions:</div><div class='ctx'>           doc: Group of short_detected states</div><div class='ctx'>   -</div><div class='ctx'>     name: phy-upstream-type</div><div class='del'>-    enum-name:</div><div class='add'>+    enum-name: phy-upstream</div><div class='add'>+    header: linux/ethtool.h</div><div class='ctx'>     type: enum</div><div class='add'>+    name-prefix: phy-upstream</div><div class='ctx'>     entries: [ mac, phy ]</div><div class='ctx'>   -</div><div class='ctx'>     name: tcp-data-split</div><div class='ctx'>     type: enum</div><div class='ctx'>     entries: [ unknown, disabled, enabled ]</div><div class='add'>+  -</div><div class='add'>+    name: hwtstamp-source</div><div class='add'>+    doc: Source of the hardware timestamp</div><div class='add'>+    enum-name: hwtstamp-source</div><div class='add'>+    name-prefix: hwtstamp-source-</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      -</div><div class='add'>+        name: netdev</div><div class='add'>+        doc: |</div><div class='add'>+          Hardware timestamp comes from a MAC or a device</div><div class='add'>+          which has MAC and PHY integrated</div><div class='add'>+        value: 1</div><div class='add'>+      -</div><div class='add'>+        name: phylib</div><div class='add'>+        doc: |</div><div class='add'>+          Hardware timestamp comes from one PHY device</div><div class='add'>+          of the network topology</div><div class='ctx'> </div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='hunk'>@@ -894,6 +914,13 @@ attribute-sets:</div><div class='ctx'>         name: hwtstamp-provider</div><div class='ctx'>         type: nest</div><div class='ctx'>         nested-attributes: ts-hwtstamp-provider</div><div class='add'>+      -</div><div class='add'>+        name: hwtstamp-source</div><div class='add'>+        type: u32</div><div class='add'>+        enum: hwtstamp-source</div><div class='add'>+      -</div><div class='add'>+        name: hwtstamp-phyindex</div><div class='add'>+        type: u32</div><div class='ctx'>   -</div><div class='ctx'>     name: cable-result</div><div class='ctx'>     attr-cnt-name: __ethtool-a-cable-result-cnt</div><div class='hunk'>@@ -1979,6 +2006,8 @@ operations:</div><div class='ctx'>             - phc-index</div><div class='ctx'>             - stats</div><div class='ctx'>             - hwtstamp-provider</div><div class='add'>+            - hwtstamp-source</div><div class='add'>+            - hwtstamp-phyindex</div><div class='ctx'>       dump: *tsinfo-get-op</div><div class='ctx'>     -</div><div class='ctx'>       name: cable-test-act</div><div class='head'>diff --git a/Documentation/netlink/specs/netdev.yaml b/Documentation/netlink/specs/netdev.yaml<br/>index f5e0750ab71d..c0ef6d0d7786 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/netdev.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/netdev.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/netdev.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/netdev.yaml</a></div><div class='hunk'>@@ -743,6 +743,18 @@ operations:</div><div class='ctx'>             - defer-hard-irqs</div><div class='ctx'>             - gro-flush-timeout</div><div class='ctx'>             - irq-suspend-timeout</div><div class='add'>+    -</div><div class='add'>+      name: bind-tx</div><div class='add'>+      doc: Bind dmabuf to netdev for TX</div><div class='add'>+      attribute-set: dmabuf</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - fd</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - id</div><div class='ctx'> </div><div class='ctx'> kernel-family:</div><div class='ctx'>   headers: [ "net/netdev_netlink.h"]</div><div class='head'>diff --git a/Documentation/netlink/specs/nl80211.yaml b/Documentation/netlink/specs/nl80211.yaml<br/>index 1ec49c3562cd..3611b11a7d8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/nl80211.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/nl80211.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/nl80211.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/nl80211.yaml</a></div><div class='hunk'>@@ -204,71 +204,6 @@ definitions:</div><div class='ctx'>       - sched-scan-random-mac-addr</div><div class='ctx'>       - no-random-mac-addr</div><div class='ctx'>   -</div><div class='del'>-    name: ieee80211-mcs-info</div><div class='del'>-    type: struct</div><div class='del'>-    members:</div><div class='del'>-      -</div><div class='del'>-        name: rx-mask</div><div class='del'>-        type: binary</div><div class='del'>-        len: 10</div><div class='del'>-      -</div><div class='del'>-        name: rx-highest</div><div class='del'>-        type: u16</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-      -</div><div class='del'>-        name: tx-params</div><div class='del'>-        type: u8</div><div class='del'>-      -</div><div class='del'>-        name: reserved</div><div class='del'>-        type: binary</div><div class='del'>-        len: 3</div><div class='del'>-  -</div><div class='del'>-    name: ieee80211-vht-mcs-info</div><div class='del'>-    type: struct</div><div class='del'>-    members:</div><div class='del'>-      -</div><div class='del'>-        name: rx-mcs-map</div><div class='del'>-        type: u16</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-      -</div><div class='del'>-        name: rx-highest</div><div class='del'>-        type: u16</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-      -</div><div class='del'>-        name: tx-mcs-map</div><div class='del'>-        type: u16</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-      -</div><div class='del'>-        name: tx-highest</div><div class='del'>-        type: u16</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-  -</div><div class='del'>-    name: ieee80211-ht-cap</div><div class='del'>-    type: struct</div><div class='del'>-    members:</div><div class='del'>-      -</div><div class='del'>-        name: cap-info</div><div class='del'>-        type: u16</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-      -</div><div class='del'>-        name: ampdu-params-info</div><div class='del'>-        type: u8</div><div class='del'>-      -</div><div class='del'>-        name: mcs</div><div class='del'>-        type: binary</div><div class='del'>-        struct: ieee80211-mcs-info</div><div class='del'>-      -</div><div class='del'>-        name: extended-ht-cap-info</div><div class='del'>-        type: u16</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-      -</div><div class='del'>-        name: tx-bf-cap-info</div><div class='del'>-        type: u32</div><div class='del'>-        byte-order: little-endian</div><div class='del'>-      -</div><div class='del'>-        name: antenna-selection-info</div><div class='del'>-        type: u8</div><div class='del'>-  -</div><div class='ctx'>     name: channel-type</div><div class='ctx'>     type: enum</div><div class='ctx'>     entries:</div><div class='hunk'>@@ -761,7 +696,6 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: ht-capability-mask</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: ieee80211-ht-cap</div><div class='ctx'>       -</div><div class='ctx'>         name: noack-map</div><div class='ctx'>         type: u16</div><div class='hunk'>@@ -1382,7 +1316,6 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: ht-mcs-set</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: ieee80211-mcs-info</div><div class='ctx'>       -</div><div class='ctx'>         name: ht-capa</div><div class='ctx'>         type: u16</div><div class='hunk'>@@ -1395,7 +1328,6 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: vht-mcs-set</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: ieee80211-vht-mcs-info</div><div class='ctx'>       -</div><div class='ctx'>         name: vht-capa</div><div class='ctx'>         type: u32</div><div class='head'>diff --git a/Documentation/netlink/specs/ovpn.yaml b/Documentation/netlink/specs/ovpn.yaml<br/>new file mode 100644<br/>index 000000000000..096c51f0c69a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ovpn.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/ovpn.yaml</a></div><div class='hunk'>@@ -0,0 +1,367 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+#</div><div class='add'>+# Author: Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+#</div><div class='add'>+# Copyright (c) 2024-2025, OpenVPN Inc.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+name: ovpn</div><div class='add'>+</div><div class='add'>+protocol: genetlink</div><div class='add'>+</div><div class='add'>+doc: Netlink protocol to control OpenVPN network devices</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    type: const</div><div class='add'>+    name: nonce-tail-size</div><div class='add'>+    value: 8</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: cipher-alg</div><div class='add'>+    entries: [ none, aes-gcm, chacha20-poly1305 ]</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: del-peer-reason</div><div class='add'>+    entries:</div><div class='add'>+      - teardown</div><div class='add'>+      - userspace</div><div class='add'>+      - expired</div><div class='add'>+      - transport-error</div><div class='add'>+      - transport-disconnect</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: key-slot</div><div class='add'>+    entries: [ primary, secondary ]</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: peer</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u32</div><div class='add'>+        doc: &gt;-</div><div class='add'>+          The unique ID of the peer in the device context. To be used to identify</div><div class='add'>+          peers during operations for a specific device</div><div class='add'>+        checks:</div><div class='add'>+          max: 0xFFFFFF</div><div class='add'>+      -</div><div class='add'>+        name: remote-ipv4</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The remote IPv4 address of the peer</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        display-hint: ipv4</div><div class='add'>+      -</div><div class='add'>+        name: remote-ipv6</div><div class='add'>+        type: binary</div><div class='add'>+        doc: The remote IPv6 address of the peer</div><div class='add'>+        display-hint: ipv6</div><div class='add'>+        checks:</div><div class='add'>+          exact-len: 16</div><div class='add'>+      -</div><div class='add'>+        name: remote-ipv6-scope-id</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The scope id of the remote IPv6 address of the peer (RFC2553)</div><div class='add'>+      -</div><div class='add'>+        name: remote-port</div><div class='add'>+        type: u16</div><div class='add'>+        doc: The remote port of the peer</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        checks:</div><div class='add'>+          min: 1</div><div class='add'>+      -</div><div class='add'>+        name: socket</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The socket to be used to communicate with the peer</div><div class='add'>+      -</div><div class='add'>+        name: socket-netnsid</div><div class='add'>+        type: s32</div><div class='add'>+        doc: The ID of the netns the socket assigned to this peer lives in</div><div class='add'>+      -</div><div class='add'>+        name: vpn-ipv4</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The IPv4 address assigned to the peer by the server</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        display-hint: ipv4</div><div class='add'>+      -</div><div class='add'>+        name: vpn-ipv6</div><div class='add'>+        type: binary</div><div class='add'>+        doc: The IPv6 address assigned to the peer by the server</div><div class='add'>+        display-hint: ipv6</div><div class='add'>+        checks:</div><div class='add'>+          exact-len: 16</div><div class='add'>+      -</div><div class='add'>+        name: local-ipv4</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The local IPv4 to be used to send packets to the peer (UDP only)</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        display-hint: ipv4</div><div class='add'>+      -</div><div class='add'>+        name: local-ipv6</div><div class='add'>+        type: binary</div><div class='add'>+        doc: The local IPv6 to be used to send packets to the peer (UDP only)</div><div class='add'>+        display-hint: ipv6</div><div class='add'>+        checks:</div><div class='add'>+          exact-len: 16</div><div class='add'>+      -</div><div class='add'>+        name: local-port</div><div class='add'>+        type: u16</div><div class='add'>+        doc: The local port to be used to send packets to the peer (UDP only)</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+        checks:</div><div class='add'>+          min: 1</div><div class='add'>+      -</div><div class='add'>+        name: keepalive-interval</div><div class='add'>+        type: u32</div><div class='add'>+        doc: &gt;-</div><div class='add'>+          The number of seconds after which a keep alive message is sent to the</div><div class='add'>+          peer</div><div class='add'>+      -</div><div class='add'>+        name: keepalive-timeout</div><div class='add'>+        type: u32</div><div class='add'>+        doc: &gt;-</div><div class='add'>+          The number of seconds from the last activity after which the peer is</div><div class='add'>+          assumed dead</div><div class='add'>+      -</div><div class='add'>+        name: del-reason</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The reason why a peer was deleted</div><div class='add'>+        enum: del-peer-reason</div><div class='add'>+      -</div><div class='add'>+        name: vpn-rx-bytes</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of bytes received over the tunnel</div><div class='add'>+      -</div><div class='add'>+        name: vpn-tx-bytes</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of bytes transmitted over the tunnel</div><div class='add'>+      -</div><div class='add'>+        name: vpn-rx-packets</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of packets received over the tunnel</div><div class='add'>+      -</div><div class='add'>+        name: vpn-tx-packets</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of packets transmitted over the tunnel</div><div class='add'>+      -</div><div class='add'>+        name: link-rx-bytes</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of bytes received at the transport level</div><div class='add'>+      -</div><div class='add'>+        name: link-tx-bytes</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of bytes transmitted at the transport level</div><div class='add'>+      -</div><div class='add'>+        name: link-rx-packets</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of packets received at the transport level</div><div class='add'>+      -</div><div class='add'>+        name: link-tx-packets</div><div class='add'>+        type: uint</div><div class='add'>+        doc: Number of packets transmitted at the transport level</div><div class='add'>+  -</div><div class='add'>+    name: keyconf</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: peer-id</div><div class='add'>+        type: u32</div><div class='add'>+        doc: &gt;-</div><div class='add'>+          The unique ID of the peer in the device context. To be used to</div><div class='add'>+          identify peers during key operations</div><div class='add'>+        checks:</div><div class='add'>+          max: 0xFFFFFF</div><div class='add'>+      -</div><div class='add'>+        name: slot</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The slot where the key should be stored</div><div class='add'>+        enum: key-slot</div><div class='add'>+      -</div><div class='add'>+        name: key-id</div><div class='add'>+        doc: &gt;-</div><div class='add'>+          The unique ID of the key in the peer context. Used to fetch the</div><div class='add'>+          correct key upon decryption</div><div class='add'>+        type: u32</div><div class='add'>+        checks:</div><div class='add'>+          max: 7</div><div class='add'>+      -</div><div class='add'>+        name: cipher-alg</div><div class='add'>+        type: u32</div><div class='add'>+        doc: The cipher to be used when communicating with the peer</div><div class='add'>+        enum: cipher-alg</div><div class='add'>+      -</div><div class='add'>+        name: encrypt-dir</div><div class='add'>+        type: nest</div><div class='add'>+        doc: Key material for encrypt direction</div><div class='add'>+        nested-attributes: keydir</div><div class='add'>+      -</div><div class='add'>+        name: decrypt-dir</div><div class='add'>+        type: nest</div><div class='add'>+        doc: Key material for decrypt direction</div><div class='add'>+        nested-attributes: keydir</div><div class='add'>+  -</div><div class='add'>+    name: keydir</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: cipher-key</div><div class='add'>+        type: binary</div><div class='add'>+        doc: The actual key to be used by the cipher</div><div class='add'>+        checks:</div><div class='add'>+          max-len: 256</div><div class='add'>+      -</div><div class='add'>+        name: nonce-tail</div><div class='add'>+        type: binary</div><div class='add'>+        doc: &gt;-</div><div class='add'>+          Random nonce to be concatenated to the packet ID, in order to</div><div class='add'>+          obtain the actual cipher IV</div><div class='add'>+        checks:</div><div class='add'>+          exact-len: nonce-tail-size</div><div class='add'>+  -</div><div class='add'>+    name: ovpn</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: ifindex</div><div class='add'>+        type: u32</div><div class='add'>+        doc: Index of the ovpn interface to operate on</div><div class='add'>+      -</div><div class='add'>+        name: peer</div><div class='add'>+        type: nest</div><div class='add'>+        doc: &gt;-</div><div class='add'>+          The peer object containing the attributed of interest for the specific</div><div class='add'>+          operation</div><div class='add'>+        nested-attributes: peer</div><div class='add'>+      -</div><div class='add'>+        name: keyconf</div><div class='add'>+        type: nest</div><div class='add'>+        doc: Peer specific cipher configuration</div><div class='add'>+        nested-attributes: keyconf</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: peer-new</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: Add a remote peer</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - peer</div><div class='add'>+    -</div><div class='add'>+      name: peer-set</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: modify a remote peer</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - peer</div><div class='add'>+    -</div><div class='add'>+      name: peer-get</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: Retrieve data about existing remote peers (or a specific one)</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - peer</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - peer</div><div class='add'>+      dump:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - peer</div><div class='add'>+    -</div><div class='add'>+      name: peer-del</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: Delete existing remote peer</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - peer</div><div class='add'>+    -</div><div class='add'>+      name: peer-del-ntf</div><div class='add'>+      doc: Notification about a peer being deleted</div><div class='add'>+      notify: peer-get</div><div class='add'>+      mcgrp: peers</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: key-new</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: Add a cipher key for a specific peer</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - keyconf</div><div class='add'>+    -</div><div class='add'>+      name: key-get</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: Retrieve non-sensitive data about peer key and cipher</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - keyconf</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - keyconf</div><div class='add'>+    -</div><div class='add'>+      name: key-swap</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: Swap primary and secondary session keys for a specific peer</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - keyconf</div><div class='add'>+    -</div><div class='add'>+      name: key-swap-ntf</div><div class='add'>+      notify: key-get</div><div class='add'>+      doc: &gt;-</div><div class='add'>+        Notification about key having exhausted its IV space and requiring</div><div class='add'>+        renegotiation</div><div class='add'>+      mcgrp: peers</div><div class='add'>+    -</div><div class='add'>+      name: key-del</div><div class='add'>+      attribute-set: ovpn</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      doc: Delete cipher key for a specific peer</div><div class='add'>+      do:</div><div class='add'>+        pre: ovpn-nl-pre-doit</div><div class='add'>+        post: ovpn-nl-post-doit</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - keyconf</div><div class='add'>+</div><div class='add'>+mcast-groups:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: peers</div><div class='head'>diff --git a/Documentation/netlink/specs/ovs_datapath.yaml b/Documentation/netlink/specs/ovs_datapath.yaml<br/>index edc8c95ca6f5..df6a8f94975e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ovs_datapath.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/ovs_datapath.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ovs_datapath.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/ovs_datapath.yaml</a></div><div class='hunk'>@@ -35,8 +35,7 @@ definitions:</div><div class='ctx'>         name: dispatch-upcall-per-cpu</div><div class='ctx'>         doc: Allow per-cpu dispatch of upcalls</div><div class='ctx'>   -</div><div class='del'>-    name: datapath-stats</div><div class='del'>-    enum-name: ovs-dp-stats</div><div class='add'>+    name: ovs-dp-stats</div><div class='ctx'>     type: struct</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='hunk'>@@ -52,8 +51,7 @@ definitions:</div><div class='ctx'>         name: n-flows</div><div class='ctx'>         type: u64</div><div class='ctx'>   -</div><div class='del'>-    name: megaflow-stats</div><div class='del'>-    enum-name: ovs-dp-megaflow-stats</div><div class='add'>+    name: ovs-dp-megaflow-stats</div><div class='ctx'>     type: struct</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='hunk'>@@ -88,11 +86,11 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: stats</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: datapath-stats</div><div class='add'>+        struct: ovs-dp-stats</div><div class='ctx'>       -</div><div class='ctx'>         name: megaflow-stats</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: megaflow-stats</div><div class='add'>+        struct: ovs-dp-megaflow-stats</div><div class='ctx'>       -</div><div class='ctx'>         name: user-features</div><div class='ctx'>         type: u32</div><div class='head'>diff --git a/Documentation/netlink/specs/ovs_vport.yaml b/Documentation/netlink/specs/ovs_vport.yaml<br/>index 86ba9ac2a521..306da6bb842d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ovs_vport.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/ovs_vport.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/ovs_vport.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/ovs_vport.yaml</a></div><div class='hunk'>@@ -23,9 +23,8 @@ definitions:</div><div class='ctx'>     name-prefix: ovs-vport-type-</div><div class='ctx'>     entries: [ unspec, netdev, internal, gre, vxlan, geneve ]</div><div class='ctx'>   -</div><div class='del'>-    name: vport-stats</div><div class='add'>+    name: ovs-vport-stats</div><div class='ctx'>     type: struct</div><div class='del'>-    enum-name: ovs-vport-stats</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='ctx'>         name: rx-packets</div><div class='hunk'>@@ -106,7 +105,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: stats</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: vport-stats</div><div class='add'>+        struct: ovs-vport-stats</div><div class='ctx'>       -</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: unused</div><div class='hunk'>@@ -123,12 +122,12 @@ attribute-sets:</div><div class='ctx'> </div><div class='ctx'> operations:</div><div class='ctx'>   name-prefix: ovs-vport-cmd-</div><div class='add'>+  fixed-header: ovs-header</div><div class='ctx'>   list:</div><div class='ctx'>     -</div><div class='ctx'>       name: new</div><div class='ctx'>       doc: Create a new OVS vport</div><div class='ctx'>       attribute-set: vport</div><div class='del'>-      fixed-header: ovs-header</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='ctx'>           attributes:</div><div class='hunk'>@@ -141,7 +140,6 @@ operations:</div><div class='ctx'>       name: del</div><div class='ctx'>       doc: Delete existing OVS vport from a data path</div><div class='ctx'>       attribute-set: vport</div><div class='del'>-      fixed-header: ovs-header</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='ctx'>           attributes:</div><div class='hunk'>@@ -152,7 +150,6 @@ operations:</div><div class='ctx'>       name: get</div><div class='ctx'>       doc: Get / dump OVS vport configuration and state</div><div class='ctx'>       attribute-set: vport</div><div class='del'>-      fixed-header: ovs-header</div><div class='ctx'>       do: &amp;vport-get-op</div><div class='ctx'>         request:</div><div class='ctx'>           attributes:</div><div class='head'>diff --git a/Documentation/netlink/specs/rt_addr.yaml b/Documentation/netlink/specs/rt-addr.yaml<br/>index df6b23f06a22..4f86aa1075da 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt_addr.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt_addr.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt-addr.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/rt-addr.yaml</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> name: rt-addr</div><div class='ctx'> protocol: netlink-raw</div><div class='add'>+uapi-header: linux/rtnetlink.h</div><div class='ctx'> protonum: 0</div><div class='ctx'> </div><div class='ctx'> doc:</div><div class='hunk'>@@ -49,6 +50,8 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: ifa-flags</div><div class='ctx'>     type: flags</div><div class='add'>+    name-prefix: ifa-f-</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       -</div><div class='ctx'>         name: secondary</div><div class='hunk'>@@ -124,6 +127,7 @@ attribute-sets:</div><div class='ctx'> operations:</div><div class='ctx'>   fixed-header: ifaddrmsg</div><div class='ctx'>   enum-model: directional</div><div class='add'>+  name-prefix: rtm-</div><div class='ctx'>   list:</div><div class='ctx'>     -</div><div class='ctx'>       name: newaddr</div><div class='hunk'>@@ -133,11 +137,6 @@ operations:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 20</div><div class='ctx'>           attributes: &amp;ifaddr-all</div><div class='del'>-            - ifa-family</div><div class='del'>-            - ifa-flags</div><div class='del'>-            - ifa-prefixlen</div><div class='del'>-            - ifa-scope</div><div class='del'>-            - ifa-index</div><div class='ctx'>             - address</div><div class='ctx'>             - label</div><div class='ctx'>             - local</div><div class='hunk'>@@ -150,11 +149,6 @@ operations:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 21</div><div class='ctx'>           attributes:</div><div class='del'>-            - ifa-family</div><div class='del'>-            - ifa-flags</div><div class='del'>-            - ifa-prefixlen</div><div class='del'>-            - ifa-scope</div><div class='del'>-            - ifa-index</div><div class='ctx'>             - address</div><div class='ctx'>             - local</div><div class='ctx'>     -</div><div class='hunk'>@@ -164,8 +158,7 @@ operations:</div><div class='ctx'>       dump:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 22</div><div class='del'>-          attributes:</div><div class='del'>-            - ifa-index</div><div class='add'>+          attributes: []</div><div class='ctx'>         reply:</div><div class='ctx'>           value: 20</div><div class='ctx'>           attributes: *ifaddr-all</div><div class='hunk'>@@ -177,9 +170,7 @@ operations:</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 58</div><div class='del'>-          attributes:</div><div class='del'>-            - ifa-family</div><div class='del'>-            - ifa-index</div><div class='add'>+          attributes: []</div><div class='ctx'>         reply:</div><div class='ctx'>           value: 58</div><div class='ctx'>           attributes: &amp;mcaddr-attrs</div><div class='hunk'>@@ -188,8 +179,7 @@ operations:</div><div class='ctx'>       dump:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 58</div><div class='del'>-          attributes:</div><div class='del'>-            - ifa-family</div><div class='add'>+          attributes: []</div><div class='ctx'>         reply:</div><div class='ctx'>           value: 58</div><div class='ctx'>           attributes: *mcaddr-attrs</div><div class='head'>diff --git a/Documentation/netlink/specs/rt_link.yaml b/Documentation/netlink/specs/rt-link.yaml<br/>index 31238455f8e9..5ec3d35b7a38 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt_link.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt_link.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt-link.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/rt-link.yaml</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> name: rt-link</div><div class='ctx'> protocol: netlink-raw</div><div class='add'>+uapi-header: linux/rtnetlink.h</div><div class='ctx'> protonum: 0</div><div class='ctx'> </div><div class='ctx'> doc:</div><div class='hunk'>@@ -11,6 +12,9 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: ifinfo-flags</div><div class='ctx'>     type: flags</div><div class='add'>+    header: linux/if.h</div><div class='add'>+    enum-name: net-device-flags</div><div class='add'>+    name-prefix: iff-</div><div class='ctx'>     entries:</div><div class='ctx'>       -</div><div class='ctx'>         name: up</div><div class='hunk'>@@ -53,6 +57,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: vlan-protocols</div><div class='ctx'>     type: enum</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       -</div><div class='ctx'>         name: 8021q</div><div class='hunk'>@@ -299,421 +304,297 @@ definitions:</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='ctx'>     name: ipv4-devconf</div><div class='del'>-    type: struct</div><div class='del'>-    members:</div><div class='add'>+    enum-name:</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='ctx'>       -</div><div class='ctx'>         name: forwarding</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: mc-forwarding</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: proxy-arp</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-redirects</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: secure-redirects</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: send-redirects</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: shared-media</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: rp-filter</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-source-route</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: bootp-relay</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: log-martians</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: tag</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: arpfilter</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: medium-id</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: noxfrm</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: nopolicy</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: force-igmp-version</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: arp-announce</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: arp-ignore</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: promote-secondaries</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: arp-accept</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: arp-notify</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-local</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: src-vmark</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: proxy-arp-pvlan</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: route-localnet</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: igmpv2-unsolicited-report-interval</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: igmpv3-unsolicited-report-interval</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ignore-routes-with-linkdown</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: drop-unicast-in-l2-multicast</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: drop-gratuitous-arp</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: bc-forwarding</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: arp-evict-nocarrier</div><div class='del'>-        type: u32</div><div class='ctx'>   -</div><div class='ctx'>     name: ipv6-devconf</div><div class='del'>-    type: struct</div><div class='del'>-    members:</div><div class='add'>+    enum-name:</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='ctx'>       -</div><div class='ctx'>         name: forwarding</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: hoplimit</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: mtu6</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-redirects</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: autoconf</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: dad-transmits</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: rtr-solicits</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: rtr-solicit-interval</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: rtr-solicit-delay</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: use-tempaddr</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: temp-valid-lft</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: temp-prefered-lft</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: regen-max-retry</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: max-desync-factor</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: max-addresses</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: force-mld-version</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-defrtr</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-pinfo</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-rtr-pref</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: rtr-probe-interval</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-rt-info-max-plen</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: proxy-ndp</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: optimistic-dad</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-source-route</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: mc-forwarding</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: disable-ipv6</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-dad</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: force-tllao</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ndisc-notify</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: mldv1-unsolicited-report-interval</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: mldv2-unsolicited-report-interval</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: suppress-frag-ndisc</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-from-local</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: use-optimistic</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-mtu</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: stable-secret</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: use-oif-addrs-only</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-min-hop-limit</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ignore-routes-with-linkdown</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: drop-unicast-in-l2-multicast</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: drop-unsolicited-na</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: keep-addr-on-down</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: rtr-solicit-max-interval</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: seg6-enabled</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: seg6-require-hmac</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: enhanced-dad</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: addr-gen-mode</div><div class='del'>-        type: u8</div><div class='ctx'>       -</div><div class='ctx'>         name: disable-policy</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-ra-rt-info-min-plen</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ndisc-tclass</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: rpl-seg-enabled</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ra-defrtr-metric</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ioam6-enabled</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ioam6-id</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ioam6-id-wide</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: ndisc-evict-nocarrier</div><div class='del'>-        type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: accept-untracked-na</div><div class='del'>-        type: u32</div><div class='ctx'>   -</div><div class='ctx'>     name: ifla-icmp6-stats</div><div class='del'>-    type: struct</div><div class='del'>-    members:</div><div class='add'>+    enum-name:</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      -</div><div class='add'>+        name: num</div><div class='ctx'>       -</div><div class='ctx'>         name: inmsgs</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inerrors</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outmsgs</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outerrors</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: csumerrors</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: ratelimithost</div><div class='del'>-        type: u64</div><div class='ctx'>   -</div><div class='ctx'>     name: ifla-inet6-stats</div><div class='del'>-    type: struct</div><div class='del'>-    members:</div><div class='add'>+    enum-name:</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      -</div><div class='add'>+        name: num</div><div class='ctx'>       -</div><div class='ctx'>         name: inpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inoctets</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: indelivers</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outforwdatagrams</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outoctets</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inhdrerrors</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: intoobigerrors</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: innoroutes</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inaddrerrors</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inunknownprotos</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: intruncatedpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: indiscards</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outdiscards</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outnoroutes</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: reasmtimeout</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: reasmreqds</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: reasmoks</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: reasmfails</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: fragoks</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: fragfails</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: fragcreates</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inmcastpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outmcastpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inbcastpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outbcastpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inmcastoctets</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outmcastoctets</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: inbcastoctets</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: outbcastoctets</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: csumerrors</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: noectpkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: ect1-pkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: ect0-pkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: cepkts</div><div class='del'>-        type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: reasm-overlaps</div><div class='del'>-        type: u64</div><div class='ctx'>   - name: br-boolopt-multi</div><div class='ctx'>     type: struct</div><div class='add'>+    header: linux/if_bridge.h</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='ctx'>         name: optval</div><div class='hunk'>@@ -754,6 +635,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: vlan-flags</div><div class='ctx'>     type: flags</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - reorder-hdr</div><div class='ctx'>       - gvrp</div><div class='hunk'>@@ -840,6 +722,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: ifla-vf-link-state-enum</div><div class='ctx'>     type: enum</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - auto</div><div class='ctx'>       - enable</div><div class='hunk'>@@ -906,6 +789,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: rtext-filter</div><div class='ctx'>     type: flags</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - vf</div><div class='ctx'>       - brvlan</div><div class='hunk'>@@ -918,6 +802,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: netkit-policy</div><div class='ctx'>     type: enum</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       -</div><div class='ctx'>         name: forward</div><div class='hunk'>@@ -928,6 +813,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: netkit-mode</div><div class='ctx'>     type: enum</div><div class='add'>+    enum-name: netkit-mode</div><div class='ctx'>     entries:</div><div class='ctx'>       - name: l2</div><div class='ctx'>       - name: l3</div><div class='hunk'>@@ -935,9 +821,18 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: netkit-scrub</div><div class='ctx'>     type: enum</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - name: none</div><div class='ctx'>       - name: default</div><div class='add'>+  -</div><div class='add'>+    name: ovpn-mode</div><div class='add'>+    enum-name: ovpn-mode</div><div class='add'>+    name-prefix: ovpn-mode</div><div class='add'>+    type: enum</div><div class='add'>+    entries:</div><div class='add'>+      - p2p</div><div class='add'>+      - mp</div><div class='ctx'> </div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='hunk'>@@ -1113,11 +1008,10 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: prop-list</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: link-attrs</div><div class='add'>+        nested-attributes: prop-list-link-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: alt-ifname</div><div class='ctx'>         type: string</div><div class='del'>-        multi-attr: true</div><div class='ctx'>       -</div><div class='ctx'>         name: perm-address</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -1164,25 +1058,35 @@ attribute-sets:</div><div class='ctx'>         name: netns-immutable</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='add'>+    name: prop-list-link-attrs</div><div class='add'>+    subset-of: link-attrs</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: alt-ifname</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='ctx'>     name: af-spec-attrs</div><div class='add'>+    name-prefix: af-</div><div class='add'>+    attr-max-name: af-max</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='del'>-        name: "inet"</div><div class='add'>+        name: inet</div><div class='ctx'>         type: nest</div><div class='ctx'>         value: 2</div><div class='ctx'>         nested-attributes: ifla-attrs</div><div class='ctx'>       -</div><div class='del'>-        name: "inet6"</div><div class='add'>+        name: inet6</div><div class='ctx'>         type: nest</div><div class='ctx'>         value: 10</div><div class='ctx'>         nested-attributes: ifla6-attrs</div><div class='ctx'>       -</div><div class='del'>-        name: "mctp"</div><div class='add'>+        name: mctp</div><div class='ctx'>         type: nest</div><div class='ctx'>         value: 45</div><div class='ctx'>         nested-attributes: mctp-attrs</div><div class='ctx'>   -</div><div class='ctx'>     name: vfinfo-list-attrs</div><div class='add'>+    name-prefix: ifla-vf-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: info</div><div class='hunk'>@@ -1191,6 +1095,7 @@ attribute-sets:</div><div class='ctx'>         multi-attr: true</div><div class='ctx'>   -</div><div class='ctx'>     name: vfinfo-attrs</div><div class='add'>+    name-prefix: ifla-vf-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: mac</div><div class='hunk'>@@ -1245,6 +1150,7 @@ attribute-sets:</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='ctx'>     name: vf-stats-attrs</div><div class='add'>+    name-prefix: ifla-vf-stats-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: rx-packets</div><div class='hunk'>@@ -1276,6 +1182,8 @@ attribute-sets:</div><div class='ctx'>         type: u64</div><div class='ctx'>   -</div><div class='ctx'>     name: vf-vlan-attrs</div><div class='add'>+    name-prefix: ifla-vf-vlan-</div><div class='add'>+    attr-max-name: ifla-vf-vlan-info-max</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: info</div><div class='hunk'>@@ -1284,12 +1192,15 @@ attribute-sets:</div><div class='ctx'>         multi-attr: true</div><div class='ctx'>   -</div><div class='ctx'>     name: vf-ports-attrs</div><div class='add'>+    name-prefix: ifla-</div><div class='ctx'>     attributes: []</div><div class='ctx'>   -</div><div class='ctx'>     name: port-self-attrs</div><div class='add'>+    name-prefix: ifla-</div><div class='ctx'>     attributes: []</div><div class='ctx'>   -</div><div class='ctx'>     name: linkinfo-attrs</div><div class='add'>+    name-prefix: ifla-info-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: kind</div><div class='hunk'>@@ -1414,6 +1325,8 @@ attribute-sets:</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: binary</div><div class='ctx'>         display-hint: ipv6</div><div class='add'>+        checks:</div><div class='add'>+          exact-len: 16</div><div class='ctx'>       -</div><div class='ctx'>         name: coupled-control</div><div class='ctx'>         type: u8</div><div class='hunk'>@@ -1585,7 +1498,7 @@ attribute-sets:</div><div class='ctx'>         name: nf-call-iptables</div><div class='ctx'>         type: u8</div><div class='ctx'>       -</div><div class='del'>-        name: nf-call-ip6-tables</div><div class='add'>+        name: nf-call-ip6tables</div><div class='ctx'>         type: u8</div><div class='ctx'>       -</div><div class='ctx'>         name: nf-call-arptables</div><div class='hunk'>@@ -1843,6 +1756,7 @@ attribute-sets:</div><div class='ctx'>   -</div><div class='ctx'>     name: linkinfo-vti-attrs</div><div class='ctx'>     name-prefix: ifla-vti-</div><div class='add'>+    header: linux/if_tunnel.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: link</div><div class='hunk'>@@ -2077,7 +1991,7 @@ attribute-sets:</div><div class='ctx'>         name: id</div><div class='ctx'>         type: u16</div><div class='ctx'>       -</div><div class='del'>-        name: flag</div><div class='add'>+        name: flags</div><div class='ctx'>         type: binary</div><div class='ctx'>         struct: ifla-vlan-flags</div><div class='ctx'>       -</div><div class='hunk'>@@ -2095,7 +2009,7 @@ attribute-sets:</div><div class='ctx'>         byte-order: big-endian</div><div class='ctx'>   -</div><div class='ctx'>     name: ifla-vlan-qos</div><div class='del'>-    name-prefix: ifla-vlan-qos</div><div class='add'>+    name-prefix: ifla-vlan-qos-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: mapping</div><div class='hunk'>@@ -2111,6 +2025,7 @@ attribute-sets:</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='ctx'>     name: xdp-attrs</div><div class='add'>+    name-prefix: ifla-xdp-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: fd</div><div class='hunk'>@@ -2138,13 +2053,16 @@ attribute-sets:</div><div class='ctx'>         type: s32</div><div class='ctx'>   -</div><div class='ctx'>     name: ifla-attrs</div><div class='add'>+    name-prefix: ifla-inet-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: conf</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: ipv4-devconf</div><div class='add'>+        sub-type: u32</div><div class='add'>+        doc: u32 indexed by ipv4-devconf - 1 on output, on input it's a nest</div><div class='ctx'>   -</div><div class='ctx'>     name: ifla6-attrs</div><div class='add'>+    name-prefix: ifla-inet6-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: flags</div><div class='hunk'>@@ -2152,11 +2070,12 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: conf</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: ipv6-devconf</div><div class='add'>+        sub-type: u32</div><div class='add'>+        doc: u32 indexed by ipv6-devconf - 1 on output, on input it's a nest</div><div class='ctx'>       -</div><div class='ctx'>         name: stats</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: ifla-inet6-stats</div><div class='add'>+        sub-type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: mcast</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -2165,9 +2084,9 @@ attribute-sets:</div><div class='ctx'>         type: binary</div><div class='ctx'>         struct: ifla-cacheinfo</div><div class='ctx'>       -</div><div class='del'>-        name: icmp6-stats</div><div class='add'>+        name: icmp6stats</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: ifla-icmp6-stats</div><div class='add'>+        sub-type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: token</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -2179,9 +2098,10 @@ attribute-sets:</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='ctx'>     name: mctp-attrs</div><div class='add'>+    name-prefix: ifla-mctp-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='del'>-        name: mctp-net</div><div class='add'>+        name: net</div><div class='ctx'>         type: u32</div><div class='ctx'>       -</div><div class='ctx'>         name: phys-binding</div><div class='hunk'>@@ -2209,6 +2129,7 @@ attribute-sets:</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='ctx'>     name: link-offload-xstats</div><div class='add'>+    name-prefix: ifla-offload-xstats-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: cpu-hit</div><div class='hunk'>@@ -2223,6 +2144,7 @@ attribute-sets:</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='ctx'>     name: hw-s-info-one</div><div class='add'>+    name-prefix: ifla-offload-xstats-hw-s-info-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: request</div><div class='hunk'>@@ -2232,6 +2154,8 @@ attribute-sets:</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='ctx'>     name: link-dpll-pin-attrs</div><div class='add'>+    name-prefix: dpll-a-</div><div class='add'>+    header: linux/dpll.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: id</div><div class='hunk'>@@ -2272,6 +2196,14 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: tailroom</div><div class='ctx'>         type: u16</div><div class='add'>+  -</div><div class='add'>+    name: linkinfo-ovpn-attrs</div><div class='add'>+    name-prefix: ifla-ovpn-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: mode</div><div class='add'>+        type: u8</div><div class='add'>+        enum: ovpn-mode</div><div class='ctx'> </div><div class='ctx'> sub-messages:</div><div class='ctx'>   -</div><div class='hunk'>@@ -2322,6 +2254,9 @@ sub-messages:</div><div class='ctx'>       -</div><div class='ctx'>         value: netkit</div><div class='ctx'>         attribute-set: linkinfo-netkit-attrs</div><div class='add'>+      -</div><div class='add'>+        value: ovpn</div><div class='add'>+        attribute-set: linkinfo-ovpn-attrs</div><div class='ctx'>   -</div><div class='ctx'>     name: linkinfo-member-data-msg</div><div class='ctx'>     formats:</div><div class='hunk'>@@ -2334,6 +2269,7 @@ sub-messages:</div><div class='ctx'> </div><div class='ctx'> operations:</div><div class='ctx'>   enum-model: directional</div><div class='add'>+  name-prefix: rtm-</div><div class='ctx'>   list:</div><div class='ctx'>     -</div><div class='ctx'>       name: newlink</div><div class='hunk'>@@ -2344,7 +2280,6 @@ operations:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 16</div><div class='ctx'>           attributes: &amp;link-new-attrs</div><div class='del'>-            - ifi-index</div><div class='ctx'>             - ifname</div><div class='ctx'>             - net-ns-pid</div><div class='ctx'>             - net-ns-fd</div><div class='hunk'>@@ -2360,7 +2295,6 @@ operations:</div><div class='ctx'>             - txqlen</div><div class='ctx'>             - operstate</div><div class='ctx'>             - linkmode</div><div class='del'>-            - group</div><div class='ctx'>             - gso-max-size</div><div class='ctx'>             - gso-max-segs</div><div class='ctx'>             - gro-max-size</div><div class='hunk'>@@ -2368,6 +2302,12 @@ operations:</div><div class='ctx'>             - gro-ipv4-max-size</div><div class='ctx'>             - af-spec</div><div class='ctx'>     -</div><div class='add'>+      name: newlink-ntf</div><div class='add'>+      doc: Notify that a link has been created</div><div class='add'>+      value: 16</div><div class='add'>+      notify: getlink</div><div class='add'>+      fixed-header: ifinfomsg</div><div class='add'>+    -</div><div class='ctx'>       name: dellink</div><div class='ctx'>       doc: Delete an existing link.</div><div class='ctx'>       attribute-set: link-attrs</div><div class='hunk'>@@ -2376,7 +2316,6 @@ operations:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 17</div><div class='ctx'>           attributes:</div><div class='del'>-            - ifi-index</div><div class='ctx'>             - ifname</div><div class='ctx'>     -</div><div class='ctx'>       name: getlink</div><div class='hunk'>@@ -2387,7 +2326,6 @@ operations:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 18</div><div class='ctx'>           attributes:</div><div class='del'>-            - ifi-index</div><div class='ctx'>             - ifname</div><div class='ctx'>             - alt-ifname</div><div class='ctx'>             - ext-mask</div><div class='hunk'>@@ -2395,11 +2333,6 @@ operations:</div><div class='ctx'>         reply:</div><div class='ctx'>           value: 16</div><div class='ctx'>           attributes: &amp;link-all-attrs</div><div class='del'>-            - ifi-family</div><div class='del'>-            - ifi-type</div><div class='del'>-            - ifi-index</div><div class='del'>-            - ifi-flags</div><div class='del'>-            - ifi-change</div><div class='ctx'>             - address</div><div class='ctx'>             - broadcast</div><div class='ctx'>             - ifname</div><div class='hunk'>@@ -2445,7 +2378,6 @@ operations:</div><div class='ctx'>             - xdp</div><div class='ctx'>             - event</div><div class='ctx'>             - new-netnsid</div><div class='del'>-            - if-netnsid</div><div class='ctx'>             - target-netnsid</div><div class='ctx'>             - carrier-up-count</div><div class='ctx'>             - carrier-down-count</div><div class='hunk'>@@ -2453,7 +2385,6 @@ operations:</div><div class='ctx'>             - min-mtu</div><div class='ctx'>             - max-mtu</div><div class='ctx'>             - prop-list</div><div class='del'>-            - alt-ifname</div><div class='ctx'>             - perm-address</div><div class='ctx'>             - proto-down-reason</div><div class='ctx'>             - parent-dev-name</div><div class='hunk'>@@ -2493,14 +2424,9 @@ operations:</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 94</div><div class='del'>-          attributes:</div><div class='del'>-            - ifindex</div><div class='ctx'>         reply:</div><div class='ctx'>           value: 92</div><div class='ctx'>           attributes: &amp;link-stats-attrs</div><div class='del'>-            - family</div><div class='del'>-            - ifindex</div><div class='del'>-            - filter-mask</div><div class='ctx'>             - link-64</div><div class='ctx'>             - link-xstats</div><div class='ctx'>             - link-xstats-slave</div><div class='head'>diff --git a/Documentation/netlink/specs/rt_neigh.yaml b/Documentation/netlink/specs/rt-neigh.yaml<br/>index e670b6dc07be..e9cba164e3d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt_neigh.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt_neigh.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt-neigh.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/rt-neigh.yaml</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> name: rt-neigh</div><div class='ctx'> protocol: netlink-raw</div><div class='add'>+uapi-header: linux/rtnetlink.h</div><div class='ctx'> protonum: 0</div><div class='ctx'> </div><div class='ctx'> doc:</div><div class='hunk'>@@ -13,25 +14,25 @@ definitions:</div><div class='ctx'>     type: struct</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='del'>-        name: family</div><div class='add'>+        name: ndm-family</div><div class='ctx'>         type: u8</div><div class='ctx'>       -</div><div class='del'>-        name: pad</div><div class='add'>+        name: ndm-pad</div><div class='ctx'>         type: pad</div><div class='ctx'>         len: 3</div><div class='ctx'>       -</div><div class='del'>-        name: ifindex</div><div class='add'>+        name: ndm-ifindex</div><div class='ctx'>         type: s32</div><div class='ctx'>       -</div><div class='del'>-        name: state</div><div class='add'>+        name: ndm-state</div><div class='ctx'>         type: u16</div><div class='ctx'>         enum: nud-state</div><div class='ctx'>       -</div><div class='del'>-        name: flags</div><div class='add'>+        name: ndm-flags</div><div class='ctx'>         type: u8</div><div class='ctx'>         enum: ntf-flags</div><div class='ctx'>       -</div><div class='del'>-        name: type</div><div class='add'>+        name: ndm-type</div><div class='ctx'>         type: u8</div><div class='ctx'>         enum: rtm-type</div><div class='ctx'>   -</div><div class='hunk'>@@ -48,6 +49,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: nud-state</div><div class='ctx'>     type: flags</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - incomplete</div><div class='ctx'>       - reachable</div><div class='hunk'>@@ -60,6 +62,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: ntf-flags</div><div class='ctx'>     type: flags</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - use</div><div class='ctx'>       - self</div><div class='hunk'>@@ -72,12 +75,14 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: ntf-ext-flags</div><div class='ctx'>     type: flags</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - managed</div><div class='ctx'>       - locked</div><div class='ctx'>   -</div><div class='ctx'>     name: rtm-type</div><div class='ctx'>     type: enum</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - unspec</div><div class='ctx'>       - unicast</div><div class='hunk'>@@ -179,6 +184,7 @@ definitions:</div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='ctx'>     name: neighbour-attrs</div><div class='add'>+    name-prefix: nda-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: unspec</div><div class='hunk'>@@ -189,7 +195,7 @@ attribute-sets:</div><div class='ctx'>         type: binary</div><div class='ctx'>         display-hint: ipv4</div><div class='ctx'>       -</div><div class='del'>-        name: lladr</div><div class='add'>+        name: lladdr</div><div class='ctx'>         type: binary</div><div class='ctx'>         display-hint: mac</div><div class='ctx'>       -</div><div class='hunk'>@@ -241,6 +247,7 @@ attribute-sets:</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='ctx'>     name: ndt-attrs</div><div class='add'>+    name-prefix: ndta-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: name</div><div class='hunk'>@@ -274,6 +281,7 @@ attribute-sets:</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='ctx'>     name: ndtpa-attrs</div><div class='add'>+    name-prefix: ndtpa-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: ifindex</div><div class='hunk'>@@ -335,6 +343,7 @@ attribute-sets:</div><div class='ctx'> </div><div class='ctx'> operations:</div><div class='ctx'>   enum-model: directional</div><div class='add'>+  name-prefix: rtm-</div><div class='ctx'>   list:</div><div class='ctx'>     -</div><div class='ctx'>       name: newneigh</div><div class='hunk'>@@ -372,7 +381,7 @@ operations:</div><div class='ctx'>       name: delneigh-ntf</div><div class='ctx'>       doc: Notify a neighbour deletion</div><div class='ctx'>       value: 29</div><div class='del'>-      notify: delneigh</div><div class='add'>+      notify: getneigh</div><div class='ctx'>       fixed-header: ndmsg</div><div class='ctx'>     -</div><div class='ctx'>       name: getneigh</div><div class='hunk'>@@ -393,6 +402,7 @@ operations:</div><div class='ctx'>             - ifindex</div><div class='ctx'>             - master</div><div class='ctx'>         reply:</div><div class='add'>+          value: 28</div><div class='ctx'>           attributes: *neighbour-all</div><div class='ctx'>     -</div><div class='ctx'>       name: newneigh-ntf</div><div class='head'>diff --git a/Documentation/netlink/specs/rt_route.yaml b/Documentation/netlink/specs/rt-route.yaml<br/>index 292469c7d4b9..800f3a823d47 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt_route.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt_route.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt-route.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/rt-route.yaml</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> name: rt-route</div><div class='ctx'> protocol: netlink-raw</div><div class='add'>+uapi-header: linux/rtnetlink.h</div><div class='ctx'> protonum: 0</div><div class='ctx'> </div><div class='ctx'> doc:</div><div class='hunk'>@@ -11,6 +12,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: rtm-type</div><div class='ctx'>     name-prefix: rtn-</div><div class='add'>+    enum-name:</div><div class='ctx'>     type: enum</div><div class='ctx'>     entries:</div><div class='ctx'>       - unspec</div><div class='hunk'>@@ -245,21 +247,19 @@ attribute-sets:</div><div class='ctx'> </div><div class='ctx'> operations:</div><div class='ctx'>   enum-model: directional</div><div class='add'>+  fixed-header: rtmsg</div><div class='add'>+  name-prefix: rtm-</div><div class='ctx'>   list:</div><div class='ctx'>     -</div><div class='ctx'>       name: getroute</div><div class='ctx'>       doc: Dump route information.</div><div class='ctx'>       attribute-set: route-attrs</div><div class='del'>-      fixed-header: rtmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 26</div><div class='ctx'>           attributes:</div><div class='del'>-            - rtm-family</div><div class='ctx'>             - src</div><div class='del'>-            - rtm-src-len</div><div class='ctx'>             - dst</div><div class='del'>-            - rtm-dst-len</div><div class='ctx'>             - iif</div><div class='ctx'>             - oif</div><div class='ctx'>             - ip-proto</div><div class='hunk'>@@ -271,15 +271,6 @@ operations:</div><div class='ctx'>         reply:</div><div class='ctx'>           value: 24</div><div class='ctx'>           attributes: &amp;all-route-attrs</div><div class='del'>-            - rtm-family</div><div class='del'>-            - rtm-dst-len</div><div class='del'>-            - rtm-src-len</div><div class='del'>-            - rtm-tos</div><div class='del'>-            - rtm-table</div><div class='del'>-            - rtm-protocol</div><div class='del'>-            - rtm-scope</div><div class='del'>-            - rtm-type</div><div class='del'>-            - rtm-flags</div><div class='ctx'>             - dst</div><div class='ctx'>             - src</div><div class='ctx'>             - iif</div><div class='hunk'>@@ -311,8 +302,7 @@ operations:</div><div class='ctx'>       dump:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 26</div><div class='del'>-          attributes:</div><div class='del'>-            - rtm-family</div><div class='add'>+          attributes: []</div><div class='ctx'>         reply:</div><div class='ctx'>           value: 24</div><div class='ctx'>           attributes: *all-route-attrs</div><div class='hunk'>@@ -320,7 +310,6 @@ operations:</div><div class='ctx'>       name: newroute</div><div class='ctx'>       doc: Create a new route</div><div class='ctx'>       attribute-set: route-attrs</div><div class='del'>-      fixed-header: rtmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 24</div><div class='hunk'>@@ -329,7 +318,6 @@ operations:</div><div class='ctx'>       name: delroute</div><div class='ctx'>       doc: Delete an existing route</div><div class='ctx'>       attribute-set: route-attrs</div><div class='del'>-      fixed-header: rtmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='ctx'>           value: 25</div><div class='head'>diff --git a/Documentation/netlink/specs/rt_rule.yaml b/Documentation/netlink/specs/rt-rule.yaml<br/>index de0938d36541..003707ca4a3e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt_rule.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/rt_rule.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/rt-rule.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/rt-rule.yaml</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> name: rt-rule</div><div class='ctx'> protocol: netlink-raw</div><div class='add'>+uapi-header: linux/fib_rules.h</div><div class='ctx'> protonum: 0</div><div class='ctx'> </div><div class='ctx'> doc:</div><div class='hunk'>@@ -56,6 +57,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: fr-act</div><div class='ctx'>     type: enum</div><div class='add'>+    enum-name:</div><div class='ctx'>     entries:</div><div class='ctx'>       - unspec</div><div class='ctx'>       - to-tbl</div><div class='hunk'>@@ -90,6 +92,7 @@ definitions:</div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='ctx'>     name: fib-rule-attrs</div><div class='add'>+    name-prefix: fra-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: dst</div><div class='hunk'>@@ -198,6 +201,7 @@ attribute-sets:</div><div class='ctx'> operations:</div><div class='ctx'>   enum-model: directional</div><div class='ctx'>   fixed-header: fib-rule-hdr</div><div class='add'>+  name-prefix: rtm-</div><div class='ctx'>   list:</div><div class='ctx'>     -</div><div class='ctx'>       name: newrule</div><div class='hunk'>@@ -234,7 +238,7 @@ operations:</div><div class='ctx'>       name: newrule-ntf</div><div class='ctx'>       doc: Notify a rule creation</div><div class='ctx'>       value: 32</div><div class='del'>-      notify: newrule</div><div class='add'>+      notify: getrule</div><div class='ctx'>     -</div><div class='ctx'>       name: delrule</div><div class='ctx'>       doc: Remove an existing FIB rule</div><div class='hunk'>@@ -247,7 +251,7 @@ operations:</div><div class='ctx'>       name: delrule-ntf</div><div class='ctx'>       doc: Notify a rule deletion</div><div class='ctx'>       value: 33</div><div class='del'>-      notify: delrule</div><div class='add'>+      notify: getrule</div><div class='ctx'>     -</div><div class='ctx'>       name: getrule</div><div class='ctx'>       doc: Dump all FIB rules</div><div class='head'>diff --git a/Documentation/netlink/specs/tc.yaml b/Documentation/netlink/specs/tc.yaml<br/>index aacccea5dfe4..cb7ea7d62e56 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/tc.yaml?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/netlink/specs/tc.yaml</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/netlink/specs/tc.yaml?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/netlink/specs/tc.yaml</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> name: tc</div><div class='ctx'> protocol: netlink-raw</div><div class='add'>+uapi-header: linux/pkt_cls.h</div><div class='ctx'> protonum: 0</div><div class='ctx'> </div><div class='ctx'> doc:</div><div class='hunk'>@@ -12,6 +13,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: tcmsg</div><div class='ctx'>     type: struct</div><div class='add'>+    header: linux/rtnetlink.h</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='ctx'>         name: family</div><div class='hunk'>@@ -33,7 +35,8 @@ definitions:</div><div class='ctx'>         name: info</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-cls-flags</div><div class='add'>+    name: cls-flags</div><div class='add'>+    enum-name:</div><div class='ctx'>     type: flags</div><div class='ctx'>     entries:</div><div class='ctx'>       - skip-hw</div><div class='hunk'>@@ -42,7 +45,9 @@ definitions:</div><div class='ctx'>       - not-in-nw</div><div class='ctx'>       - verbose</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-ctrl-flags</div><div class='add'>+    name: flower-key-ctrl-flags</div><div class='add'>+    name-prefix: tca-flower-key-flags-</div><div class='add'>+    enum-name:</div><div class='ctx'>     type: flags</div><div class='ctx'>     entries:</div><div class='ctx'>       - frag</div><div class='hunk'>@@ -630,6 +635,7 @@ definitions:</div><div class='ctx'>   -</div><div class='ctx'>     name: tc-ratespec</div><div class='ctx'>     type: struct</div><div class='add'>+    header: linux/pkt_sched.h</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='ctx'>         name: cell-log</div><div class='hunk'>@@ -1186,7 +1192,7 @@ definitions:</div><div class='ctx'>         name: firstuse</div><div class='ctx'>         type: u64</div><div class='ctx'>   -</div><div class='del'>-    name: tc-gen</div><div class='add'>+    name: tc-gact</div><div class='ctx'>     type: struct</div><div class='ctx'>     members:</div><div class='ctx'>       -</div><div class='hunk'>@@ -1377,7 +1383,8 @@ definitions:</div><div class='ctx'>         type: s32</div><div class='ctx'> attribute-sets:</div><div class='ctx'>   -</div><div class='del'>-    name: tc-attrs</div><div class='add'>+    name: attrs</div><div class='add'>+    name-prefix: tca-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: kind</div><div class='hunk'>@@ -1385,7 +1392,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: options</div><div class='ctx'>         type: sub-message</div><div class='del'>-        sub-message: tc-options-msg</div><div class='add'>+        sub-message: options-msg</div><div class='ctx'>         selector: kind</div><div class='ctx'>       -</div><div class='ctx'>         name: stats</div><div class='hunk'>@@ -1436,7 +1443,8 @@ attribute-sets:</div><div class='ctx'>         name: ext-warn-msg</div><div class='ctx'>         type: string</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-attrs</div><div class='add'>+    name: act-attrs</div><div class='add'>+    name-prefix: tca-act-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: kind</div><div class='hunk'>@@ -1444,7 +1452,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: options</div><div class='ctx'>         type: sub-message</div><div class='del'>-        sub-message: tc-act-options-msg</div><div class='add'>+        sub-message: act-options-msg</div><div class='ctx'>         selector: kind</div><div class='ctx'>       -</div><div class='ctx'>         name: index</div><div class='hunk'>@@ -1452,7 +1460,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: stats</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-act-stats-attrs</div><div class='add'>+        nested-attributes: tca-stats-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='hunk'>@@ -1472,39 +1480,9 @@ attribute-sets:</div><div class='ctx'>         name: in-hw-count</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-stats-attrs</div><div class='del'>-    attributes:</div><div class='del'>-      -</div><div class='del'>-        name: basic</div><div class='del'>-        type: binary</div><div class='del'>-        struct: gnet-stats-basic</div><div class='del'>-      -</div><div class='del'>-        name: rate-est</div><div class='del'>-        type: binary</div><div class='del'>-        struct: gnet-stats-rate-est</div><div class='del'>-      -</div><div class='del'>-        name: queue</div><div class='del'>-        type: binary</div><div class='del'>-        struct: gnet-stats-queue</div><div class='del'>-      -</div><div class='del'>-        name: app</div><div class='del'>-        type: binary</div><div class='del'>-      -</div><div class='del'>-        name: rate-est64</div><div class='del'>-        type: binary</div><div class='del'>-        struct: gnet-stats-rate-est64</div><div class='del'>-      -</div><div class='del'>-        name: pad</div><div class='del'>-        type: pad</div><div class='del'>-      -</div><div class='del'>-        name: basic-hw</div><div class='del'>-        type: binary</div><div class='del'>-        struct: gnet-stats-basic</div><div class='del'>-      -</div><div class='del'>-        name: pkt64</div><div class='del'>-        type: u64</div><div class='del'>-  -</div><div class='del'>-    name: tc-act-bpf-attrs</div><div class='add'>+    name: act-bpf-attrs</div><div class='add'>+    name-prefix: tca-act-bpf-</div><div class='add'>+    header: linux/tc_act/tc_bpf.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1535,7 +1513,9 @@ attribute-sets:</div><div class='ctx'>         name: id</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-connmark-attrs</div><div class='add'>+    name: act-connmark-attrs</div><div class='add'>+    name-prefix: tca-connmark-</div><div class='add'>+    header: linux/tc_act/tc_connmark.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -1548,7 +1528,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-csum-attrs</div><div class='add'>+    name: act-csum-attrs</div><div class='add'>+    name-prefix: tca-csum-</div><div class='add'>+    header: linux/tc_act/tc_csum.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -1561,7 +1543,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-ct-attrs</div><div class='add'>+    name: act-ct-attrs</div><div class='add'>+    name-prefix: tca-ct-</div><div class='add'>+    header: linux/tc_act/tc_ct.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -1623,7 +1607,9 @@ attribute-sets:</div><div class='ctx'>         name: helper-proto</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-ctinfo-attrs</div><div class='add'>+    name: act-ctinfo-attrs</div><div class='add'>+    name-prefix: tca-ctinfo-</div><div class='add'>+    header: linux/tc_act/tc_ctinfo.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: pad</div><div class='hunk'>@@ -1657,7 +1643,9 @@ attribute-sets:</div><div class='ctx'>         name: stats-cpmark-set</div><div class='ctx'>         type: u64</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-gate-attrs</div><div class='add'>+    name: act-gate-attrs</div><div class='add'>+    name-prefix: tca-gate-</div><div class='add'>+    header: linux/tc_act/tc_gate.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1691,7 +1679,9 @@ attribute-sets:</div><div class='ctx'>         name: clockid</div><div class='ctx'>         type: s32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-ife-attrs</div><div class='add'>+    name: act-ife-attrs</div><div class='add'>+    name-prefix: tca-ife-</div><div class='add'>+    header: linux/tc_act/tc_ife.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -1716,7 +1706,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-mirred-attrs</div><div class='add'>+    name: act-mirred-attrs</div><div class='add'>+    name-prefix: tca-mirred-</div><div class='add'>+    header: linux/tc_act/tc_mirred.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1732,7 +1724,9 @@ attribute-sets:</div><div class='ctx'>         name: blockid</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-mpls-attrs</div><div class='add'>+    name: act-mpls-attrs</div><div class='add'>+    name-prefix: tca-mpls-</div><div class='add'>+    header: linux/tc_act/tc_mpls.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1762,7 +1756,9 @@ attribute-sets:</div><div class='ctx'>         name: bos</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-nat-attrs</div><div class='add'>+    name: act-nat-attrs</div><div class='add'>+    name-prefix: tca-nat-</div><div class='add'>+    header: linux/tc_act/tc_nat.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -1775,7 +1771,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-pedit-attrs</div><div class='add'>+    name: act-pedit-attrs</div><div class='add'>+    name-prefix: tca-pedit-</div><div class='add'>+    header: linux/tc_act/tc_pedit.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1798,45 +1796,9 @@ attribute-sets:</div><div class='ctx'>         name: key-ex</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-police-attrs</div><div class='del'>-    attributes:</div><div class='del'>-      -</div><div class='del'>-        name: tbf</div><div class='del'>-        type: binary</div><div class='del'>-        struct: tc-police</div><div class='del'>-      -</div><div class='del'>-        name: rate</div><div class='del'>-        type: binary # TODO</div><div class='del'>-      -</div><div class='del'>-        name: peakrate</div><div class='del'>-        type: binary # TODO</div><div class='del'>-      -</div><div class='del'>-        name: avrate</div><div class='del'>-        type: u32</div><div class='del'>-      -</div><div class='del'>-        name: result</div><div class='del'>-        type: u32</div><div class='del'>-      -</div><div class='del'>-        name: tm</div><div class='del'>-        type: binary</div><div class='del'>-        struct: tcf-t</div><div class='del'>-      -</div><div class='del'>-        name: pad</div><div class='del'>-        type: pad</div><div class='del'>-      -</div><div class='del'>-        name: rate64</div><div class='del'>-        type: u64</div><div class='del'>-      -</div><div class='del'>-        name: peakrate64</div><div class='del'>-        type: u64</div><div class='del'>-      -</div><div class='del'>-        name: pktrate64</div><div class='del'>-        type: u64</div><div class='del'>-      -</div><div class='del'>-        name: pktburst64</div><div class='del'>-        type: u64</div><div class='del'>-  -</div><div class='del'>-    name: tc-act-simple-attrs</div><div class='add'>+    name: act-simple-attrs</div><div class='add'>+    name-prefix: tca-def-</div><div class='add'>+    header: linux/tc_act/tc_defact.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1852,7 +1814,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-skbedit-attrs</div><div class='add'>+    name: act-skbedit-attrs</div><div class='add'>+    name-prefix: tca-skbedit-</div><div class='add'>+    header: linux/tc_act/tc_skbedit.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1886,7 +1850,9 @@ attribute-sets:</div><div class='ctx'>         name: queue-mapping-max</div><div class='ctx'>         type: u16</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-skbmod-attrs</div><div class='add'>+    name: act-skbmod-attrs</div><div class='add'>+    name-prefix: tca-skbmod-</div><div class='add'>+    header: linux/tc_act/tc_skbmod.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1908,7 +1874,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-tunnel-key-attrs</div><div class='add'>+    name: act-tunnel-key-attrs</div><div class='add'>+    name-prefix: tca-tunnel-key-</div><div class='add'>+    header: linux/tc_act/tc_tunnel_key.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1958,7 +1926,9 @@ attribute-sets:</div><div class='ctx'>         name: no-frag</div><div class='ctx'>         type: flag</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-vlan-attrs</div><div class='add'>+    name: act-vlan-attrs</div><div class='add'>+    name-prefix: tca-vlan-</div><div class='add'>+    header: linux/tc_act/tc_vlan.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -1987,7 +1957,8 @@ attribute-sets:</div><div class='ctx'>         name: push-eth-src</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-basic-attrs</div><div class='add'>+    name: basic-attrs</div><div class='add'>+    name-prefix: tca-basic-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: classid</div><div class='hunk'>@@ -1995,16 +1966,16 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: ematches</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-ematch-attrs</div><div class='add'>+        nested-attributes: ematch-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-police-attrs</div><div class='add'>+        nested-attributes: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: pcnt</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -2013,16 +1984,18 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-bpf-attrs</div><div class='add'>+    name: bpf-attrs</div><div class='add'>+    name-prefix: tca-bpf-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-police-attrs</div><div class='add'>+        nested-attributes: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: classid</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -2051,7 +2024,8 @@ attribute-sets:</div><div class='ctx'>         name: id</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-cake-attrs</div><div class='add'>+    name: cake-attrs</div><div class='add'>+    name-prefix: tca-cake-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: pad</div><div class='hunk'>@@ -2108,7 +2082,8 @@ attribute-sets:</div><div class='ctx'>         name: fwmark</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-cake-stats-attrs</div><div class='add'>+    name: cake-stats-attrs</div><div class='add'>+    name-prefix: tca-cake-stats-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: pad</div><div class='hunk'>@@ -2141,7 +2116,7 @@ attribute-sets:</div><div class='ctx'>         name: tin-stats</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: nest</div><div class='del'>-        nested-attributes: tc-cake-tin-stats-attrs</div><div class='add'>+        nested-attributes: cake-tin-stats-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: deficit</div><div class='ctx'>         type: s32</div><div class='hunk'>@@ -2161,7 +2136,8 @@ attribute-sets:</div><div class='ctx'>         name: blue-timer-us</div><div class='ctx'>         type: s32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-cake-tin-stats-attrs</div><div class='add'>+    name: cake-tin-stats-attrs</div><div class='add'>+    name-prefix: tca-cake-tin-stats-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: pad</div><div class='hunk'>@@ -2239,28 +2215,32 @@ attribute-sets:</div><div class='ctx'>         name: flow-quantum</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-cbs-attrs</div><div class='add'>+    name: cbs-attrs</div><div class='add'>+    name-prefix: tca-cbs-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='ctx'>         type: binary</div><div class='ctx'>         struct: tc-cbs-qopt</div><div class='ctx'>   -</div><div class='del'>-    name: tc-cgroup-attrs</div><div class='add'>+    name: cgroup-attrs</div><div class='add'>+    name-prefix: tca-cgroup-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='del'>-        type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        type: indexed-array</div><div class='add'>+        sub-type: nest</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-police-attrs</div><div class='add'>+        nested-attributes: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: ematches</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-choke-attrs</div><div class='add'>+    name: choke-attrs</div><div class='add'>+    name-prefix: tca-choke-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -2276,7 +2256,8 @@ attribute-sets:</div><div class='ctx'>         name: max-p</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-codel-attrs</div><div class='add'>+    name: codel-attrs</div><div class='add'>+    name-prefix: tca-codel-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: target</div><div class='hunk'>@@ -2294,13 +2275,16 @@ attribute-sets:</div><div class='ctx'>         name: ce-threshold</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-drr-attrs</div><div class='add'>+    name: drr-attrs</div><div class='add'>+    name-prefix: tca-drr-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: quantum</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-ematch-attrs</div><div class='add'>+    name: ematch-attrs</div><div class='add'>+    name-prefix: tca-ematch-</div><div class='add'>+    attr-max-name: tca-ematch-tree-max</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tree-hdr</div><div class='hunk'>@@ -2310,7 +2294,8 @@ attribute-sets:</div><div class='ctx'>         name: tree-list</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flow-attrs</div><div class='add'>+    name: flow-attrs</div><div class='add'>+    name-prefix: tca-flow-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: keys</div><div class='hunk'>@@ -2342,7 +2327,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-police-attrs</div><div class='add'>+        nested-attributes: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: ematches</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -2350,7 +2335,8 @@ attribute-sets:</div><div class='ctx'>         name: perturb</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-attrs</div><div class='add'>+    name: flower-attrs</div><div class='add'>+    name-prefix: tca-flower-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: classid</div><div class='hunk'>@@ -2362,7 +2348,7 @@ attribute-sets:</div><div class='ctx'>         name: act</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: key-eth-dst</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -2441,7 +2427,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: flags</div><div class='ctx'>         type: u32</div><div class='del'>-        enum: tc-cls-flags</div><div class='add'>+        enum: cls-flags</div><div class='ctx'>         enum-as-flags: true</div><div class='ctx'>       -</div><div class='ctx'>         name: key-vlan-id</div><div class='hunk'>@@ -2546,13 +2532,13 @@ attribute-sets:</div><div class='ctx'>         name: key-flags</div><div class='ctx'>         type: u32</div><div class='ctx'>         byte-order: big-endian</div><div class='del'>-        enum: tc-flower-key-ctrl-flags</div><div class='add'>+        enum: flower-key-ctrl-flags</div><div class='ctx'>         enum-as-flags: true</div><div class='ctx'>       -</div><div class='ctx'>         name: key-flags-mask</div><div class='ctx'>         type: u32</div><div class='ctx'>         byte-order: big-endian</div><div class='del'>-        enum: tc-flower-key-ctrl-flags</div><div class='add'>+        enum: flower-key-ctrl-flags</div><div class='ctx'>         enum-as-flags: true</div><div class='ctx'>       -</div><div class='ctx'>         name: key-icmpv4-code</div><div class='hunk'>@@ -2675,11 +2661,11 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: key-enc-opts</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-enc-opts-attrs</div><div class='add'>+        nested-attributes: flower-key-enc-opts-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: key-enc-opts-mask</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-enc-opts-attrs</div><div class='add'>+        nested-attributes: flower-key-enc-opts-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: in-hw-count</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -2726,7 +2712,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: key-mpls-opts</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-mpls-opt-attrs</div><div class='add'>+        nested-attributes: flower-key-mpls-opt-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: key-hash</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -2745,7 +2731,7 @@ attribute-sets:</div><div class='ctx'>         type: u16</div><div class='ctx'>         byte-order: big-endian</div><div class='ctx'>       -</div><div class='del'>-        name: key-l2-tpv3-sid</div><div class='add'>+        name: key-l2tpv3-sid</div><div class='ctx'>         type: u32</div><div class='ctx'>         byte-order: big-endian</div><div class='ctx'>       -</div><div class='hunk'>@@ -2754,7 +2740,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: key-cfm</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-cfm-attrs</div><div class='add'>+        nested-attributes: flower-key-cfm-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: key-spi</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -2767,35 +2753,37 @@ attribute-sets:</div><div class='ctx'>         name: key-enc-flags</div><div class='ctx'>         type: u32</div><div class='ctx'>         byte-order: big-endian</div><div class='del'>-        enum: tc-flower-key-ctrl-flags</div><div class='add'>+        enum: flower-key-ctrl-flags</div><div class='ctx'>         enum-as-flags: true</div><div class='ctx'>       -</div><div class='ctx'>         name: key-enc-flags-mask</div><div class='ctx'>         type: u32</div><div class='ctx'>         byte-order: big-endian</div><div class='del'>-        enum: tc-flower-key-ctrl-flags</div><div class='add'>+        enum: flower-key-ctrl-flags</div><div class='ctx'>         enum-as-flags: true</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-enc-opts-attrs</div><div class='add'>+    name: flower-key-enc-opts-attrs</div><div class='add'>+    name-prefix: tca-flower-key-enc-opts-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: geneve</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-enc-opt-geneve-attrs</div><div class='add'>+        nested-attributes: flower-key-enc-opt-geneve-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: vxlan</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-enc-opt-vxlan-attrs</div><div class='add'>+        nested-attributes: flower-key-enc-opt-vxlan-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: erspan</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-enc-opt-erspan-attrs</div><div class='add'>+        nested-attributes: flower-key-enc-opt-erspan-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: gtp</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-flower-key-enc-opt-gtp-attrs</div><div class='add'>+        nested-attributes: flower-key-enc-opt-gtp-attrs</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-enc-opt-geneve-attrs</div><div class='add'>+    name: flower-key-enc-opt-geneve-attrs</div><div class='add'>+    name-prefix: tca-flower-key-enc-opt-geneve-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: class</div><div class='hunk'>@@ -2807,13 +2795,15 @@ attribute-sets:</div><div class='ctx'>         name: data</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-enc-opt-vxlan-attrs</div><div class='add'>+    name: flower-key-enc-opt-vxlan-attrs</div><div class='add'>+    name-prefix: tca-flower-key-enc-opt-vxlan-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: gbp</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-enc-opt-erspan-attrs</div><div class='add'>+    name: flower-key-enc-opt-erspan-attrs</div><div class='add'>+    name-prefix: tca-flower-key-enc-opt-erspan-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: ver</div><div class='hunk'>@@ -2828,7 +2818,8 @@ attribute-sets:</div><div class='ctx'>         name: hwid</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-enc-opt-gtp-attrs</div><div class='add'>+    name: flower-key-enc-opt-gtp-attrs</div><div class='add'>+    name-prefix: tca-flower-key-enc-opt-gtp-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: pdu-type</div><div class='hunk'>@@ -2837,7 +2828,9 @@ attribute-sets:</div><div class='ctx'>         name: qfi</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-mpls-opt-attrs</div><div class='add'>+    name: flower-key-mpls-opt-attrs</div><div class='add'>+    name-prefix: tca-flower-key-mpls-opt-</div><div class='add'>+    attr-max-name: tca-flower-key-mpls-opt-lse-max</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: lse-depth</div><div class='hunk'>@@ -2855,7 +2848,8 @@ attribute-sets:</div><div class='ctx'>         name: lse-label</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-flower-key-cfm-attrs</div><div class='add'>+    name: flower-key-cfm-attrs</div><div class='add'>+    name-prefix: tca-flower-key-cfm-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: md-level</div><div class='hunk'>@@ -2864,7 +2858,8 @@ attribute-sets:</div><div class='ctx'>         name: opcode</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='del'>-    name: tc-fw-attrs</div><div class='add'>+    name: fw-attrs</div><div class='add'>+    name-prefix: tca-fw-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: classid</div><div class='hunk'>@@ -2872,7 +2867,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-police-attrs</div><div class='add'>+        nested-attributes: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: indev</div><div class='ctx'>         type: string</div><div class='hunk'>@@ -2880,12 +2875,13 @@ attribute-sets:</div><div class='ctx'>         name: act</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: mask</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-gred-attrs</div><div class='add'>+    name: gred-attrs</div><div class='add'>+    name-prefix: tca-gred-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -2911,6 +2907,7 @@ attribute-sets:</div><div class='ctx'>         nested-attributes: tca-gred-vq-list-attrs</div><div class='ctx'>   -</div><div class='ctx'>     name: tca-gred-vq-list-attrs</div><div class='add'>+    name-prefix: tca-gred-vq-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: entry</div><div class='hunk'>@@ -2919,6 +2916,7 @@ attribute-sets:</div><div class='ctx'>         multi-attr: true</div><div class='ctx'>   -</div><div class='ctx'>     name: tca-gred-vq-entry-attrs</div><div class='add'>+    name-prefix: tca-gred-vq-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: pad</div><div class='hunk'>@@ -2957,7 +2955,7 @@ attribute-sets:</div><div class='ctx'>         name: flags</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-hfsc-attrs</div><div class='add'>+    name: hfsc-attrs</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: rsc</div><div class='hunk'>@@ -2969,7 +2967,8 @@ attribute-sets:</div><div class='ctx'>         name: usc</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='del'>-    name: tc-hhf-attrs</div><div class='add'>+    name: hhf-attrs</div><div class='add'>+    name-prefix: tca-hhf-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: backlog-limit</div><div class='hunk'>@@ -2993,7 +2992,8 @@ attribute-sets:</div><div class='ctx'>         name: non-hh-weight</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-htb-attrs</div><div class='add'>+    name: htb-attrs</div><div class='add'>+    name-prefix: tca-htb-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -3025,7 +3025,8 @@ attribute-sets:</div><div class='ctx'>         name: offload</div><div class='ctx'>         type: flag</div><div class='ctx'>   -</div><div class='del'>-    name: tc-matchall-attrs</div><div class='add'>+    name: matchall-attrs</div><div class='add'>+    name-prefix: tca-matchall-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: classid</div><div class='hunk'>@@ -3034,7 +3035,7 @@ attribute-sets:</div><div class='ctx'>         name: act</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: flags</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -3046,14 +3047,16 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-etf-attrs</div><div class='add'>+    name: etf-attrs</div><div class='add'>+    name-prefix: tca-etf-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='ctx'>         type: binary</div><div class='ctx'>         struct: tc-etf-qopt</div><div class='ctx'>   -</div><div class='del'>-    name: tc-ets-attrs</div><div class='add'>+    name: ets-attrs</div><div class='add'>+    name-prefix: tca-ets-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: nbands</div><div class='hunk'>@@ -3064,7 +3067,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: quanta</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-ets-attrs</div><div class='add'>+        nested-attributes: ets-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: quanta-band</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -3072,13 +3075,14 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: priomap</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-ets-attrs</div><div class='add'>+        nested-attributes: ets-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: priomap-band</div><div class='ctx'>         type: u8</div><div class='ctx'>         multi-attr: true</div><div class='ctx'>   -</div><div class='del'>-    name: tc-fq-attrs</div><div class='add'>+    name: fq-attrs</div><div class='add'>+    name-prefix: tca-fq-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: plimit</div><div class='hunk'>@@ -3149,7 +3153,8 @@ attribute-sets:</div><div class='ctx'>         sub-type: s32</div><div class='ctx'>         doc: Weights for each band</div><div class='ctx'>   -</div><div class='del'>-    name: tc-fq-codel-attrs</div><div class='add'>+    name: fq-codel-attrs</div><div class='add'>+    name-prefix: tca-fq-codel-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: target</div><div class='hunk'>@@ -3185,7 +3190,8 @@ attribute-sets:</div><div class='ctx'>         name: ce-threshold-mask</div><div class='ctx'>         type: u8</div><div class='ctx'>   -</div><div class='del'>-    name: tc-fq-pie-attrs</div><div class='add'>+    name: fq-pie-attrs</div><div class='add'>+    name-prefix: tca-fq-pie-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: limit</div><div class='hunk'>@@ -3224,7 +3230,8 @@ attribute-sets:</div><div class='ctx'>         name: dq-rate-estimator</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-netem-attrs</div><div class='add'>+    name: netem-attrs</div><div class='add'>+    name-prefix: tca-netem-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: corr</div><div class='hunk'>@@ -3245,7 +3252,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: loss</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-netem-loss-attrs</div><div class='add'>+        nested-attributes: netem-loss-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: rate</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -3277,7 +3284,8 @@ attribute-sets:</div><div class='ctx'>         name: prng-seed</div><div class='ctx'>         type: u64</div><div class='ctx'>   -</div><div class='del'>-    name: tc-netem-loss-attrs</div><div class='add'>+    name: netem-loss-attrs</div><div class='add'>+    name-prefix: netem-loss-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: gi</div><div class='hunk'>@@ -3290,7 +3298,8 @@ attribute-sets:</div><div class='ctx'>         doc: Gilbert Elliot models</div><div class='ctx'>         struct: tc-netem-gemodel</div><div class='ctx'>   -</div><div class='del'>-    name: tc-pie-attrs</div><div class='add'>+    name: pie-attrs</div><div class='add'>+    name-prefix: tca-pie-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: target</div><div class='hunk'>@@ -3317,7 +3326,8 @@ attribute-sets:</div><div class='ctx'>         name: dq-rate-estimator</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-police-attrs</div><div class='add'>+    name: police-attrs</div><div class='add'>+    name-prefix: tca-police-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tbf</div><div class='hunk'>@@ -3325,10 +3335,10 @@ attribute-sets:</div><div class='ctx'>         struct: tc-police</div><div class='ctx'>       -</div><div class='ctx'>         name: rate</div><div class='del'>-        type: binary</div><div class='add'>+        type: binary # TODO</div><div class='ctx'>       -</div><div class='ctx'>         name: peakrate</div><div class='del'>-        type: binary</div><div class='add'>+        type: binary # TODO</div><div class='ctx'>       -</div><div class='ctx'>         name: avrate</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -3355,7 +3365,8 @@ attribute-sets:</div><div class='ctx'>         name: pktburst64</div><div class='ctx'>         type: u64</div><div class='ctx'>   -</div><div class='del'>-    name: tc-qfq-attrs</div><div class='add'>+    name: qfq-attrs</div><div class='add'>+    name-prefix: tca-qfq-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: weight</div><div class='hunk'>@@ -3364,7 +3375,8 @@ attribute-sets:</div><div class='ctx'>         name: lmax</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-red-attrs</div><div class='add'>+    name: red-attrs</div><div class='add'>+    name-prefix: tca-red-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -3386,7 +3398,8 @@ attribute-sets:</div><div class='ctx'>         name: mark-block</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-route-attrs</div><div class='add'>+    name: route-attrs</div><div class='add'>+    name-prefix: tca-route4-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: classid</div><div class='hunk'>@@ -3403,14 +3416,15 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-police-attrs</div><div class='add'>+        nested-attributes: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>   -</div><div class='del'>-    name: tc-taprio-attrs</div><div class='add'>+    name: taprio-attrs</div><div class='add'>+    name-prefix: tca-taprio-attr-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: priomap</div><div class='hunk'>@@ -3419,14 +3433,14 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: sched-entry-list</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-taprio-sched-entry-list</div><div class='add'>+        nested-attributes: taprio-sched-entry-list</div><div class='ctx'>       -</div><div class='ctx'>         name: sched-base-time</div><div class='ctx'>         type: s64</div><div class='ctx'>       -</div><div class='ctx'>         name: sched-single-entry</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-taprio-sched-entry</div><div class='add'>+        nested-attributes: taprio-sched-entry</div><div class='ctx'>       -</div><div class='ctx'>         name: sched-clockid</div><div class='ctx'>         type: s32</div><div class='hunk'>@@ -3451,17 +3465,19 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: tc-entry</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-taprio-tc-entry-attrs</div><div class='add'>+        nested-attributes: taprio-tc-entry-attrs</div><div class='ctx'>   -</div><div class='del'>-    name: tc-taprio-sched-entry-list</div><div class='add'>+    name: taprio-sched-entry-list</div><div class='add'>+    name-prefix: tca-taprio-sched-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: entry</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-taprio-sched-entry</div><div class='add'>+        nested-attributes: taprio-sched-entry</div><div class='ctx'>         multi-attr: true</div><div class='ctx'>   -</div><div class='del'>-    name: tc-taprio-sched-entry</div><div class='add'>+    name: taprio-sched-entry</div><div class='add'>+    name-prefix: tca-taprio-sched-entry-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: index</div><div class='hunk'>@@ -3476,7 +3492,8 @@ attribute-sets:</div><div class='ctx'>         name: interval</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-taprio-tc-entry-attrs</div><div class='add'>+    name: taprio-tc-entry-attrs</div><div class='add'>+    name-prefix: tca-taprio-tc-entry-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: index</div><div class='hunk'>@@ -3488,7 +3505,8 @@ attribute-sets:</div><div class='ctx'>         name: fp</div><div class='ctx'>         type: u32</div><div class='ctx'>   -</div><div class='del'>-    name: tc-tbf-attrs</div><div class='add'>+    name: tbf-attrs</div><div class='add'>+    name-prefix: tca-tbf-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='hunk'>@@ -3504,7 +3522,7 @@ attribute-sets:</div><div class='ctx'>         name: rate64</div><div class='ctx'>         type: u64</div><div class='ctx'>       -</div><div class='del'>-        name: prate4</div><div class='add'>+        name: prate64</div><div class='ctx'>         type: u64</div><div class='ctx'>       -</div><div class='ctx'>         name: burst</div><div class='hunk'>@@ -3516,7 +3534,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-sample-attrs</div><div class='add'>+    name: act-sample-attrs</div><div class='add'>+    name-prefix: tca-sample-</div><div class='add'>+    header: linux/tc_act/tc_sample.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -3525,7 +3545,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: tc-gen</div><div class='add'>+        struct: tc-gact</div><div class='ctx'>       -</div><div class='ctx'>         name: rate</div><div class='ctx'>         type: u32</div><div class='hunk'>@@ -3539,7 +3559,9 @@ attribute-sets:</div><div class='ctx'>         name: pad</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-gact-attrs</div><div class='add'>+    name: act-gact-attrs</div><div class='add'>+    name-prefix: tca-gact-</div><div class='add'>+    header: linux/tc_act/tc_gact.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: tm</div><div class='hunk'>@@ -3548,7 +3570,7 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: parms</div><div class='ctx'>         type: binary</div><div class='del'>-        struct: tc-gen</div><div class='add'>+        struct: tc-gact</div><div class='ctx'>       -</div><div class='ctx'>         name: prob</div><div class='ctx'>         type: binary</div><div class='hunk'>@@ -3558,6 +3580,7 @@ attribute-sets:</div><div class='ctx'>         type: pad</div><div class='ctx'>   -</div><div class='ctx'>     name: tca-stab-attrs</div><div class='add'>+    name-prefix: tca-stab-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: base</div><div class='hunk'>@@ -3568,6 +3591,8 @@ attribute-sets:</div><div class='ctx'>         type: binary</div><div class='ctx'>   -</div><div class='ctx'>     name: tca-stats-attrs</div><div class='add'>+    name-prefix: tca-stats-</div><div class='add'>+    header: linux/gen_stats.h</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: basic</div><div class='hunk'>@@ -3601,7 +3626,8 @@ attribute-sets:</div><div class='ctx'>         name: pkt64</div><div class='ctx'>         type: u64</div><div class='ctx'>   -</div><div class='del'>-    name: tc-u32-attrs</div><div class='add'>+    name: u32-attrs</div><div class='add'>+    name-prefix: tca-u32-</div><div class='ctx'>     attributes:</div><div class='ctx'>       -</div><div class='ctx'>         name: classid</div><div class='hunk'>@@ -3622,12 +3648,12 @@ attribute-sets:</div><div class='ctx'>       -</div><div class='ctx'>         name: police</div><div class='ctx'>         type: nest</div><div class='del'>-        nested-attributes: tc-police-attrs</div><div class='add'>+        nested-attributes: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: act</div><div class='ctx'>         type: indexed-array</div><div class='ctx'>         sub-type: nest</div><div class='del'>-        nested-attributes: tc-act-attrs</div><div class='add'>+        nested-attributes: act-attrs</div><div class='ctx'>       -</div><div class='ctx'>         name: indev</div><div class='ctx'>         type: string</div><div class='hunk'>@@ -3648,78 +3674,78 @@ attribute-sets:</div><div class='ctx'> </div><div class='ctx'> sub-messages:</div><div class='ctx'>   -</div><div class='del'>-    name: tc-options-msg</div><div class='add'>+    name: options-msg</div><div class='ctx'>     formats:</div><div class='ctx'>       -</div><div class='ctx'>         value: basic</div><div class='del'>-        attribute-set: tc-basic-attrs</div><div class='add'>+        attribute-set: basic-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: bpf</div><div class='del'>-        attribute-set: tc-bpf-attrs</div><div class='add'>+        attribute-set: bpf-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: bfifo</div><div class='ctx'>         fixed-header: tc-fifo-qopt</div><div class='ctx'>       -</div><div class='ctx'>         value: cake</div><div class='del'>-        attribute-set: tc-cake-attrs</div><div class='add'>+        attribute-set: cake-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: cbs</div><div class='del'>-        attribute-set: tc-cbs-attrs</div><div class='add'>+        attribute-set: cbs-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: cgroup</div><div class='del'>-        attribute-set: tc-cgroup-attrs</div><div class='add'>+        attribute-set: cgroup-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: choke</div><div class='del'>-        attribute-set: tc-choke-attrs</div><div class='add'>+        attribute-set: choke-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: clsact # no content</div><div class='ctx'>       -</div><div class='ctx'>         value: codel</div><div class='del'>-        attribute-set: tc-codel-attrs</div><div class='add'>+        attribute-set: codel-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: drr</div><div class='del'>-        attribute-set: tc-drr-attrs</div><div class='add'>+        attribute-set: drr-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: etf</div><div class='del'>-        attribute-set: tc-etf-attrs</div><div class='add'>+        attribute-set: etf-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: ets</div><div class='del'>-        attribute-set: tc-ets-attrs</div><div class='add'>+        attribute-set: ets-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: flow</div><div class='del'>-        attribute-set: tc-flow-attrs</div><div class='add'>+        attribute-set: flow-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: flower</div><div class='del'>-        attribute-set: tc-flower-attrs</div><div class='add'>+        attribute-set: flower-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: fq</div><div class='del'>-        attribute-set: tc-fq-attrs</div><div class='add'>+        attribute-set: fq-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: fq_codel</div><div class='del'>-        attribute-set: tc-fq-codel-attrs</div><div class='add'>+        attribute-set: fq-codel-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: fq_pie</div><div class='del'>-        attribute-set: tc-fq-pie-attrs</div><div class='add'>+        attribute-set: fq-pie-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: fw</div><div class='del'>-        attribute-set: tc-fw-attrs</div><div class='add'>+        attribute-set: fw-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: gred</div><div class='del'>-        attribute-set: tc-gred-attrs</div><div class='add'>+        attribute-set: gred-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: hfsc</div><div class='ctx'>         fixed-header: tc-hfsc-qopt</div><div class='ctx'>       -</div><div class='ctx'>         value: hhf</div><div class='del'>-        attribute-set: tc-hhf-attrs</div><div class='add'>+        attribute-set: hhf-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: htb</div><div class='del'>-        attribute-set: tc-htb-attrs</div><div class='add'>+        attribute-set: htb-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: ingress # no content</div><div class='ctx'>       -</div><div class='ctx'>         value: matchall</div><div class='del'>-        attribute-set: tc-matchall-attrs</div><div class='add'>+        attribute-set: matchall-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: mq # no content</div><div class='ctx'>       -</div><div class='hunk'>@@ -3731,7 +3757,7 @@ sub-messages:</div><div class='ctx'>       -</div><div class='ctx'>         value: netem</div><div class='ctx'>         fixed-header: tc-netem-qopt</div><div class='del'>-        attribute-set: tc-netem-attrs</div><div class='add'>+        attribute-set: netem-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: pfifo</div><div class='ctx'>         fixed-header: tc-fifo-qopt</div><div class='hunk'>@@ -3743,7 +3769,7 @@ sub-messages:</div><div class='ctx'>         fixed-header: tc-fifo-qopt</div><div class='ctx'>       -</div><div class='ctx'>         value: pie</div><div class='del'>-        attribute-set: tc-pie-attrs</div><div class='add'>+        attribute-set: pie-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: plug</div><div class='ctx'>         fixed-header: tc-plug-qopt</div><div class='hunk'>@@ -3752,13 +3778,13 @@ sub-messages:</div><div class='ctx'>         fixed-header: tc-prio-qopt</div><div class='ctx'>       -</div><div class='ctx'>         value: qfq</div><div class='del'>-        attribute-set: tc-qfq-attrs</div><div class='add'>+        attribute-set: qfq-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: red</div><div class='del'>-        attribute-set: tc-red-attrs</div><div class='add'>+        attribute-set: red-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: route</div><div class='del'>-        attribute-set: tc-route-attrs</div><div class='add'>+        attribute-set: route-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: sfb</div><div class='ctx'>         fixed-header: tc-sfb-qopt</div><div class='hunk'>@@ -3767,79 +3793,79 @@ sub-messages:</div><div class='ctx'>         fixed-header: tc-sfq-qopt-v1</div><div class='ctx'>       -</div><div class='ctx'>         value: taprio</div><div class='del'>-        attribute-set: tc-taprio-attrs</div><div class='add'>+        attribute-set: taprio-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: tbf</div><div class='del'>-        attribute-set: tc-tbf-attrs</div><div class='add'>+        attribute-set: tbf-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: u32</div><div class='del'>-        attribute-set: tc-u32-attrs</div><div class='add'>+        attribute-set: u32-attrs</div><div class='ctx'>   -</div><div class='del'>-    name: tc-act-options-msg</div><div class='add'>+    name: act-options-msg</div><div class='ctx'>     formats:</div><div class='ctx'>       -</div><div class='ctx'>         value: bpf</div><div class='del'>-        attribute-set: tc-act-bpf-attrs</div><div class='add'>+        attribute-set: act-bpf-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: connmark</div><div class='del'>-        attribute-set: tc-act-connmark-attrs</div><div class='add'>+        attribute-set: act-connmark-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: csum</div><div class='del'>-        attribute-set: tc-act-csum-attrs</div><div class='add'>+        attribute-set: act-csum-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: ct</div><div class='del'>-        attribute-set: tc-act-ct-attrs</div><div class='add'>+        attribute-set: act-ct-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: ctinfo</div><div class='del'>-        attribute-set: tc-act-ctinfo-attrs</div><div class='add'>+        attribute-set: act-ctinfo-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: gact</div><div class='del'>-        attribute-set: tc-act-gact-attrs</div><div class='add'>+        attribute-set: act-gact-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: gate</div><div class='del'>-        attribute-set: tc-act-gate-attrs</div><div class='add'>+        attribute-set: act-gate-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: ife</div><div class='del'>-        attribute-set: tc-act-ife-attrs</div><div class='add'>+        attribute-set: act-ife-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: mirred</div><div class='del'>-        attribute-set: tc-act-mirred-attrs</div><div class='add'>+        attribute-set: act-mirred-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: mpls</div><div class='del'>-        attribute-set: tc-act-mpls-attrs</div><div class='add'>+        attribute-set: act-mpls-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: nat</div><div class='del'>-        attribute-set: tc-act-nat-attrs</div><div class='add'>+        attribute-set: act-nat-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: pedit</div><div class='del'>-        attribute-set: tc-act-pedit-attrs</div><div class='add'>+        attribute-set: act-pedit-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: police</div><div class='del'>-        attribute-set: tc-act-police-attrs</div><div class='add'>+        attribute-set: police-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: sample</div><div class='del'>-        attribute-set: tc-act-sample-attrs</div><div class='add'>+        attribute-set: act-sample-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: simple</div><div class='del'>-        attribute-set: tc-act-simple-attrs</div><div class='add'>+        attribute-set: act-simple-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: skbedit</div><div class='del'>-        attribute-set: tc-act-skbedit-attrs</div><div class='add'>+        attribute-set: act-skbedit-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: skbmod</div><div class='del'>-        attribute-set: tc-act-skbmod-attrs</div><div class='add'>+        attribute-set: act-skbmod-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: tunnel_key</div><div class='del'>-        attribute-set: tc-act-tunnel-key-attrs</div><div class='add'>+        attribute-set: act-tunnel-key-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: vlan</div><div class='del'>-        attribute-set: tc-act-vlan-attrs</div><div class='add'>+        attribute-set: act-vlan-attrs</div><div class='ctx'>   -</div><div class='ctx'>     name: tca-stats-app-msg</div><div class='ctx'>     formats:</div><div class='ctx'>       -</div><div class='ctx'>         value: cake</div><div class='del'>-        attribute-set: tc-cake-stats-attrs</div><div class='add'>+        attribute-set: cake-stats-attrs</div><div class='ctx'>       -</div><div class='ctx'>         value: choke</div><div class='ctx'>         fixed-header: tc-choke-xstats</div><div class='hunk'>@@ -3873,11 +3899,12 @@ sub-messages:</div><div class='ctx'> </div><div class='ctx'> operations:</div><div class='ctx'>   enum-model: directional</div><div class='add'>+  name-prefix: rtm-</div><div class='ctx'>   list:</div><div class='ctx'>     -</div><div class='ctx'>       name: newqdisc</div><div class='ctx'>       doc: Create new tc qdisc.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3892,7 +3919,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: delqdisc</div><div class='ctx'>       doc: Delete existing tc qdisc.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3900,9 +3927,9 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: getqdisc</div><div class='ctx'>       doc: Get / dump tc qdisc information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='del'>-      do:</div><div class='add'>+      do: &amp;getqdisc-do</div><div class='ctx'>         request:</div><div class='ctx'>           value: 38</div><div class='ctx'>           attributes:</div><div class='hunk'>@@ -3921,10 +3948,11 @@ operations:</div><div class='ctx'>             - chain</div><div class='ctx'>             - ingress-block</div><div class='ctx'>             - egress-block</div><div class='add'>+      dump: *getqdisc-do</div><div class='ctx'>     -</div><div class='ctx'>       name: newtclass</div><div class='ctx'>       doc: Get / dump tc traffic class information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3933,7 +3961,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: deltclass</div><div class='ctx'>       doc: Get / dump tc traffic class information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3941,7 +3969,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: gettclass</div><div class='ctx'>       doc: Get / dump tc traffic class information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3952,7 +3980,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: newtfilter</div><div class='ctx'>       doc: Get / dump tc filter information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3961,7 +3989,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: deltfilter</div><div class='ctx'>       doc: Get / dump tc filter information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3972,7 +4000,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: gettfilter</div><div class='ctx'>       doc: Get / dump tc filter information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -3995,7 +4023,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: newchain</div><div class='ctx'>       doc: Get / dump tc chain information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -4004,7 +4032,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: delchain</div><div class='ctx'>       doc: Get / dump tc chain information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='hunk'>@@ -4014,7 +4042,7 @@ operations:</div><div class='ctx'>     -</div><div class='ctx'>       name: getchain</div><div class='ctx'>       doc: Get / dump tc chain information.</div><div class='del'>-      attribute-set: tc-attrs</div><div class='add'>+      attribute-set: attrs</div><div class='ctx'>       fixed-header: tcmsg</div><div class='ctx'>       do:</div><div class='ctx'>         request:</div><div class='head'>diff --git a/Documentation/networking/dccp.rst b/Documentation/networking/dccp.rst<br/>deleted file mode 100644<br/>index 91e5c33ba3ff..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/dccp.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/dccp.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,219 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-=============</div><div class='del'>-DCCP protocol</div><div class='del'>-=============</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.. Contents</div><div class='del'>-   - Introduction</div><div class='del'>-   - Missing features</div><div class='del'>-   - Socket options</div><div class='del'>-   - Sysctl variables</div><div class='del'>-   - IOCTLs</div><div class='del'>-   - Other tunables</div><div class='del'>-   - Notes</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-============</div><div class='del'>-Datagram Congestion Control Protocol (DCCP) is an unreliable, connection</div><div class='del'>-oriented protocol designed to solve issues present in UDP and TCP, particularly</div><div class='del'>-for real-time and multimedia (streaming) traffic.</div><div class='del'>-It divides into a base protocol (RFC 4340) and pluggable congestion control</div><div class='del'>-modules called CCIDs. Like pluggable TCP congestion control, at least one CCID</div><div class='del'>-needs to be enabled in order for the protocol to function properly. In the Linux</div><div class='del'>-implementation, this is the TCP-like CCID2 (RFC 4341). Additional CCIDs, such as</div><div class='del'>-the TCP-friendly CCID3 (RFC 4342), are optional.</div><div class='del'>-For a brief introduction to CCIDs and suggestions for choosing a CCID to match</div><div class='del'>-given applications, see section 10 of RFC 4340.</div><div class='del'>-</div><div class='del'>-It has a base protocol and pluggable congestion control IDs (CCIDs).</div><div class='del'>-</div><div class='del'>-DCCP is a Proposed Standard (RFC 2026), and the homepage for DCCP as a protocol</div><div class='del'>-is at http://www.ietf.org/html.charters/dccp-charter.html</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Missing features</div><div class='del'>-================</div><div class='del'>-The Linux DCCP implementation does not currently support all the features that are</div><div class='del'>-specified in RFCs 4340...42.</div><div class='del'>-</div><div class='del'>-The known bugs are at:</div><div class='del'>-</div><div class='del'>-	http://www.linuxfoundation.org/collaborate/workgroups/networking/todo#DCCP</div><div class='del'>-</div><div class='del'>-For more up-to-date versions of the DCCP implementation, please consider using</div><div class='del'>-the experimental DCCP test tree; instructions for checking this out are on:</div><div class='del'>-http://www.linuxfoundation.org/collaborate/workgroups/networking/dccp_testing#Experimental_DCCP_source_tree</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Socket options</div><div class='del'>-==============</div><div class='del'>-DCCP_SOCKOPT_QPOLICY_ID sets the dequeuing policy for outgoing packets. It takes</div><div class='del'>-a policy ID as argument and can only be set before the connection (i.e. changes</div><div class='del'>-during an established connection are not supported). Currently, two policies are</div><div class='del'>-defined: the "simple" policy (DCCPQ_POLICY_SIMPLE), which does nothing special,</div><div class='del'>-and a priority-based variant (DCCPQ_POLICY_PRIO). The latter allows to pass an</div><div class='del'>-u32 priority value as ancillary data to sendmsg(), where higher numbers indicate</div><div class='del'>-a higher packet priority (similar to SO_PRIORITY). This ancillary data needs to</div><div class='del'>-be formatted using a cmsg(3) message header filled in as follows::</div><div class='del'>-</div><div class='del'>-	cmsg-&gt;cmsg_level = SOL_DCCP;</div><div class='del'>-	cmsg-&gt;cmsg_type	 = DCCP_SCM_PRIORITY;</div><div class='del'>-	cmsg-&gt;cmsg_len	 = CMSG_LEN(sizeof(uint32_t));	/* or CMSG_LEN(4) */</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_QPOLICY_TXQLEN sets the maximum length of the output queue. A zero</div><div class='del'>-value is always interpreted as unbounded queue length. If different from zero,</div><div class='del'>-the interpretation of this parameter depends on the current dequeuing policy</div><div class='del'>-(see above): the "simple" policy will enforce a fixed queue size by returning</div><div class='del'>-EAGAIN, whereas the "prio" policy enforces a fixed queue length by dropping the</div><div class='del'>-lowest-priority packet first. The default value for this parameter is</div><div class='del'>-initialised from /proc/sys/net/dccp/default/tx_qlen.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_SERVICE sets the service. The specification mandates use of</div><div class='del'>-service codes (RFC 4340, sec. 8.1.2); if this socket option is not set,</div><div class='del'>-the socket will fall back to 0 (which means that no meaningful service code</div><div class='del'>-is present). On active sockets this is set before connect(); specifying more</div><div class='del'>-than one code has no effect (all subsequent service codes are ignored). The</div><div class='del'>-case is different for passive sockets, where multiple service codes (up to 32)</div><div class='del'>-can be set before calling bind().</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_GET_CUR_MPS is read-only and retrieves the current maximum packet</div><div class='del'>-size (application payload size) in bytes, see RFC 4340, section 14.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_AVAILABLE_CCIDS is also read-only and returns the list of CCIDs</div><div class='del'>-supported by the endpoint. The option value is an array of type uint8_t whose</div><div class='del'>-size is passed as option length. The minimum array size is 4 elements, the</div><div class='del'>-value returned in the optlen argument always reflects the true number of</div><div class='del'>-built-in CCIDs.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_CCID is write-only and sets both the TX and RX CCIDs at the same</div><div class='del'>-time, combining the operation of the next two socket options. This option is</div><div class='del'>-preferable over the latter two, since often applications will use the same</div><div class='del'>-type of CCID for both directions; and mixed use of CCIDs is not currently well</div><div class='del'>-understood. This socket option takes as argument at least one uint8_t value, or</div><div class='del'>-an array of uint8_t values, which must match available CCIDS (see above). CCIDs</div><div class='del'>-must be registered on the socket before calling connect() or listen().</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_TX_CCID is read/write. It returns the current CCID (if set) or sets</div><div class='del'>-the preference list for the TX CCID, using the same format as DCCP_SOCKOPT_CCID.</div><div class='del'>-Please note that the getsockopt argument type here is ``int``, not uint8_t.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_RX_CCID is analogous to DCCP_SOCKOPT_TX_CCID, but for the RX CCID.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_SERVER_TIMEWAIT enables the server (listening socket) to hold</div><div class='del'>-timewait state when closing the connection (RFC 4340, 8.3). The usual case is</div><div class='del'>-that the closing server sends a CloseReq, whereupon the client holds timewait</div><div class='del'>-state. When this boolean socket option is on, the server sends a Close instead</div><div class='del'>-and will enter TIMEWAIT. This option must be set after accept() returns.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_SEND_CSCOV and DCCP_SOCKOPT_RECV_CSCOV are used for setting the</div><div class='del'>-partial checksum coverage (RFC 4340, sec. 9.2). The default is that checksums</div><div class='del'>-always cover the entire packet and that only fully covered application data is</div><div class='del'>-accepted by the receiver. Hence, when using this feature on the sender, it must</div><div class='del'>-be enabled at the receiver, too with suitable choice of CsCov.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_SEND_CSCOV sets the sender checksum coverage. Values in the</div><div class='del'>-	range 0..15 are acceptable. The default setting is 0 (full coverage),</div><div class='del'>-	values between 1..15 indicate partial coverage.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_RECV_CSCOV is for the receiver and has a different meaning: it</div><div class='del'>-	sets a threshold, where again values 0..15 are acceptable. The default</div><div class='del'>-	of 0 means that all packets with a partial coverage will be discarded.</div><div class='del'>-	Values in the range 1..15 indicate that packets with minimally such a</div><div class='del'>-	coverage value are also acceptable. The higher the number, the more</div><div class='del'>-	restrictive this setting (see [RFC 4340, sec. 9.2.1]). Partial coverage</div><div class='del'>-	settings are inherited to the child socket after accept().</div><div class='del'>-</div><div class='del'>-The following two options apply to CCID 3 exclusively and are getsockopt()-only.</div><div class='del'>-In either case, a TFRC info struct (defined in &lt;linux/tfrc.h&gt;) is returned.</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_CCID_RX_INFO</div><div class='del'>-	Returns a ``struct tfrc_rx_info`` in optval; the buffer for optval and</div><div class='del'>-	optlen must be set to at least sizeof(struct tfrc_rx_info).</div><div class='del'>-</div><div class='del'>-DCCP_SOCKOPT_CCID_TX_INFO</div><div class='del'>-	Returns a ``struct tfrc_tx_info`` in optval; the buffer for optval and</div><div class='del'>-	optlen must be set to at least sizeof(struct tfrc_tx_info).</div><div class='del'>-</div><div class='del'>-On unidirectional connections it is useful to close the unused half-connection</div><div class='del'>-via shutdown (SHUT_WR or SHUT_RD): this will reduce per-packet processing costs.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Sysctl variables</div><div class='del'>-================</div><div class='del'>-Several DCCP default parameters can be managed by the following sysctls</div><div class='del'>-(sysctl net.dccp.default or /proc/sys/net/dccp/default):</div><div class='del'>-</div><div class='del'>-request_retries</div><div class='del'>-	The number of active connection initiation retries (the number of</div><div class='del'>-	Requests minus one) before timing out. In addition, it also governs</div><div class='del'>-	the behaviour of the other, passive side: this variable also sets</div><div class='del'>-	the number of times DCCP repeats sending a Response when the initial</div><div class='del'>-	handshake does not progress from RESPOND to OPEN (i.e. when no Ack</div><div class='del'>-	is received after the initial Request).  This value should be greater</div><div class='del'>-	than 0, suggested is less than 10. Analogue of tcp_syn_retries.</div><div class='del'>-</div><div class='del'>-retries1</div><div class='del'>-	How often a DCCP Response is retransmitted until the listening DCCP</div><div class='del'>-	side considers its connecting peer dead. Analogue of tcp_retries1.</div><div class='del'>-</div><div class='del'>-retries2</div><div class='del'>-	The number of times a general DCCP packet is retransmitted. This has</div><div class='del'>-	importance for retransmitted acknowledgments and feature negotiation,</div><div class='del'>-	data packets are never retransmitted. Analogue of tcp_retries2.</div><div class='del'>-</div><div class='del'>-tx_ccid = 2</div><div class='del'>-	Default CCID for the sender-receiver half-connection. Depending on the</div><div class='del'>-	choice of CCID, the Send Ack Vector feature is enabled automatically.</div><div class='del'>-</div><div class='del'>-rx_ccid = 2</div><div class='del'>-	Default CCID for the receiver-sender half-connection; see tx_ccid.</div><div class='del'>-</div><div class='del'>-seq_window = 100</div><div class='del'>-	The initial sequence window (sec. 7.5.2) of the sender. This influences</div><div class='del'>-	the local ackno validity and the remote seqno validity windows (7.5.1).</div><div class='del'>-	Values in the range Wmin = 32 (RFC 4340, 7.5.2) up to 2^32-1 can be set.</div><div class='del'>-</div><div class='del'>-tx_qlen = 5</div><div class='del'>-	The size of the transmit buffer in packets. A value of 0 corresponds</div><div class='del'>-	to an unbounded transmit buffer.</div><div class='del'>-</div><div class='del'>-sync_ratelimit = 125 ms</div><div class='del'>-	The timeout between subsequent DCCP-Sync packets sent in response to</div><div class='del'>-	sequence-invalid packets on the same socket (RFC 4340, 7.5.4). The unit</div><div class='del'>-	of this parameter is milliseconds; a value of 0 disables rate-limiting.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-IOCTLS</div><div class='del'>-======</div><div class='del'>-FIONREAD</div><div class='del'>-	Works as in udp(7): returns in the ``int`` argument pointer the size of</div><div class='del'>-	the next pending datagram in bytes, or 0 when no datagram is pending.</div><div class='del'>-</div><div class='del'>-SIOCOUTQ</div><div class='del'>-	Returns the number of unsent data bytes in the socket send queue as ``int``</div><div class='del'>-	into the buffer specified by the argument pointer.</div><div class='del'>-</div><div class='del'>-Other tunables</div><div class='del'>-==============</div><div class='del'>-Per-route rto_min support</div><div class='del'>-	CCID-2 supports the RTAX_RTO_MIN per-route setting for the minimum value</div><div class='del'>-	of the RTO timer. This setting can be modified via the 'rto_min' option</div><div class='del'>-	of iproute2; for example::</div><div class='del'>-</div><div class='del'>-		&gt; ip route change 10.0.0.0/24   rto_min 250j dev wlan0</div><div class='del'>-		&gt; ip route add    10.0.0.254/32 rto_min 800j dev wlan0</div><div class='del'>-		&gt; ip route show dev wlan0</div><div class='del'>-</div><div class='del'>-	CCID-3 also supports the rto_min setting: it is used to define the lower</div><div class='del'>-	bound for the expiry of the nofeedback timer. This can be useful on LANs</div><div class='del'>-	with very low RTTs (e.g., loopback, Gbit ethernet).</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Notes</div><div class='del'>-=====</div><div class='del'>-DCCP does not travel through NAT successfully at present on many boxes. This is</div><div class='del'>-because the checksum covers the pseudo-header as per TCP and UDP. Linux NAT</div><div class='del'>-support for DCCP has been added.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/huawei/hinic3.rst b/Documentation/networking/device_drivers/ethernet/huawei/hinic3.rst<br/>new file mode 100644<br/>index 000000000000..e3dfd083fa52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/huawei/hinic3.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/device_drivers/ethernet/huawei/hinic3.rst</a></div><div class='hunk'>@@ -0,0 +1,137 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=====================================================================</div><div class='add'>+Linux kernel driver for Huawei Ethernet Device Driver (hinic3) family</div><div class='add'>+=====================================================================</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+The hinic3 is a network interface card (NIC) for Data Center. It supports</div><div class='add'>+a range of link-speed devices (10GE, 25GE, 100GE, etc.). The hinic3</div><div class='add'>+devices can have multiple physical forms: LOM (Lan on Motherboard) NIC,</div><div class='add'>+PCIe standard NIC, OCP (Open Compute Project) NIC, etc.</div><div class='add'>+</div><div class='add'>+The hinic3 driver supports the following features:</div><div class='add'>+- IPv4/IPv6 TCP/UDP checksum offload</div><div class='add'>+- TSO (TCP Segmentation Offload), LRO (Large Receive Offload)</div><div class='add'>+- RSS (Receive Side Scaling)</div><div class='add'>+- MSI-X interrupt aggregation configuration and interrupt adaptation.</div><div class='add'>+- SR-IOV (Single Root I/O Virtualization).</div><div class='add'>+</div><div class='add'>+Content</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+- Supported PCI vendor ID/device IDs</div><div class='add'>+- Source Code Structure of Hinic3 Driver</div><div class='add'>+- Management Interface</div><div class='add'>+</div><div class='add'>+Supported PCI vendor ID/device IDs</div><div class='add'>+==================================</div><div class='add'>+</div><div class='add'>+19e5:0222 - hinic3 PF/PPF</div><div class='add'>+19e5:375F - hinic3 VF</div><div class='add'>+</div><div class='add'>+Prime Physical Function (PPF) is responsible for the management of the</div><div class='add'>+whole NIC card. For example, clock synchronization between the NIC and</div><div class='add'>+the host. Any PF may serve as a PPF. The PPF is selected dynamically.</div><div class='add'>+</div><div class='add'>+Source Code Structure of Hinic3 Driver</div><div class='add'>+======================================</div><div class='add'>+</div><div class='add'>+========================  ================================================</div><div class='add'>+hinic3_pci_id_tbl.h       Supported device IDs</div><div class='add'>+hinic3_hw_intf.h          Interface between HW and driver</div><div class='add'>+hinic3_queue_common.[ch]  Common structures and methods for NIC queues</div><div class='add'>+hinic3_common.[ch]        Encapsulation of memory operations in Linux</div><div class='add'>+hinic3_csr.h              Register definitions in the BAR</div><div class='add'>+hinic3_hwif.[ch]          Interface for BAR</div><div class='add'>+hinic3_eqs.[ch]           Interface for AEQs and CEQs</div><div class='add'>+hinic3_mbox.[ch]          Interface for mailbox</div><div class='add'>+hinic3_mgmt.[ch]          Management interface based on mailbox and AEQ</div><div class='add'>+hinic3_wq.[ch]            Work queue data structures and interface</div><div class='add'>+hinic3_cmdq.[ch]          Command queue is used to post command to HW</div><div class='add'>+hinic3_hwdev.[ch]         HW structures and methods abstractions</div><div class='add'>+hinic3_lld.[ch]           Auxiliary driver adaptation layer</div><div class='add'>+hinic3_hw_comm.[ch]       Interface for common HW operations</div><div class='add'>+hinic3_mgmt_interface.h   Interface between firmware and driver</div><div class='add'>+hinic3_hw_cfg.[ch]        Interface for HW configuration</div><div class='add'>+hinic3_irq.c              Interrupt request</div><div class='add'>+hinic3_netdev_ops.c       Operations registered to Linux kernel stack</div><div class='add'>+hinic3_nic_dev.h          NIC structures and methods abstractions</div><div class='add'>+hinic3_main.c             Main Linux kernel driver</div><div class='add'>+hinic3_nic_cfg.[ch]       NIC service configuration</div><div class='add'>+hinic3_nic_io.[ch]        Management plane interface for TX and RX</div><div class='add'>+hinic3_rss.[ch]           Interface for Receive Side Scaling (RSS)</div><div class='add'>+hinic3_rx.[ch]            Interface for transmit</div><div class='add'>+hinic3_tx.[ch]            Interface for receive</div><div class='add'>+hinic3_ethtool.c          Interface for ethtool operations (ops)</div><div class='add'>+hinic3_filter.c           Interface for MAC address</div><div class='add'>+========================  ================================================</div><div class='add'>+</div><div class='add'>+Management Interface</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+Asynchronous Event Queue (AEQ)</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+AEQ receives high priority events from the HW over a descriptor queue.</div><div class='add'>+Every descriptor is a fixed size of 64 bytes. AEQ can receive solicited or</div><div class='add'>+unsolicited events. Every device, VF or PF, can have up to 4 AEQs.</div><div class='add'>+Every AEQ is associated to a dedicated IRQ. AEQ can receive multiple types</div><div class='add'>+of events, but in practice the hinic3 driver ignores all events except for</div><div class='add'>+2 mailbox related events.</div><div class='add'>+</div><div class='add'>+Mailbox</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+Mailbox is a communication mechanism between the hinic3 driver and the HW.</div><div class='add'>+Each device has an independent mailbox. Driver can use the mailbox to send</div><div class='add'>+requests to management. Driver receives mailbox messages, such as responses</div><div class='add'>+to requests, over the AEQ (using event HINIC3_AEQ_FOR_MBOX). Due to the</div><div class='add'>+limited size of mailbox data register, mailbox messages are sent</div><div class='add'>+segment-by-segment.</div><div class='add'>+</div><div class='add'>+Every device can use its mailbox to post request to firmware. The mailbox</div><div class='add'>+can also be used to post requests and responses between the PF and its VFs.</div><div class='add'>+</div><div class='add'>+Completion Event Queue (CEQ)</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+The implementation of CEQ is the same as AEQ. It receives completion events</div><div class='add'>+from HW over a fixed size descriptor of 32 bits. Every device can have up</div><div class='add'>+to 32 CEQs. Every CEQ has a dedicated IRQ. CEQ only receives solicited</div><div class='add'>+events that are responses to requests from the driver. CEQ can receive</div><div class='add'>+multiple types of events, but in practice the hinic3 driver ignores all</div><div class='add'>+events except for HINIC3_CMDQ that represents completion of previously</div><div class='add'>+posted commands on a cmdq.</div><div class='add'>+</div><div class='add'>+Command Queue (cmdq)</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Every cmdq has a dedicated work queue on which commands are posted.</div><div class='add'>+Commands on the work queue are fixed size descriptor of size 64 bytes.</div><div class='add'>+Completion of a command will be indicated using ctrl bits in the</div><div class='add'>+descriptor that carried the command. Notification of command completions</div><div class='add'>+will also be provided via event on CEQ. Every device has 4 command queues</div><div class='add'>+that are initialized as a set (called cmdqs), each with its own type.</div><div class='add'>+Hinic3 driver only uses type HINIC3_CMDQ_SYNC.</div><div class='add'>+</div><div class='add'>+Work Queues(WQ)</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Work queues are logical arrays of fixed size WQEs. The array may be spread</div><div class='add'>+over multiple non-contiguous pages using indirection table. Work queues are</div><div class='add'>+used by I/O queues and command queues.</div><div class='add'>+</div><div class='add'>+Global function ID</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Every function, PF or VF, has a unique ordinal identification within the device.</div><div class='add'>+Many management commands (mbox or cmdq) contain this ID so HW can apply the</div><div class='add'>+command effect to the right function.</div><div class='add'>+</div><div class='add'>+PF is allowed to post management commands to a subordinate VF by specifying the</div><div class='add'>+VFs ID. A VF must provide its own ID. Anti-spoofing in the HW will cause</div><div class='add'>+command from a VF to fail if it contains the wrong ID.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst<br/>index 05d822b904b4..139b4c75a191 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/device_drivers/ethernet/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/device_drivers/ethernet/index.rst</a></div><div class='hunk'>@@ -28,6 +28,7 @@ Contents:</div><div class='ctx'>    freescale/gianfar</div><div class='ctx'>    google/gve</div><div class='ctx'>    huawei/hinic</div><div class='add'>+   huawei/hinic3</div><div class='ctx'>    intel/e100</div><div class='ctx'>    intel/e1000</div><div class='ctx'>    intel/e1000e</div><div class='hunk'>@@ -55,6 +56,7 @@ Contents:</div><div class='ctx'>    ti/cpsw_switchdev</div><div class='ctx'>    ti/am65_nuss_cpsw_switchdev</div><div class='ctx'>    ti/tlan</div><div class='add'>+   ti/icssg_prueth</div><div class='ctx'>    wangxun/txgbe</div><div class='ctx'>    wangxun/ngbe</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst b/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst<br/>index 04e0595bb0a7..f8592dec8851 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/device_drivers/ethernet/meta/fbnic.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/meta/fbnic.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/device_drivers/ethernet/meta/fbnic.rst</a></div><div class='hunk'>@@ -28,9 +28,60 @@ devlink dev info provides version information for all three components. In</div><div class='ctx'> addition to the version the hg commit hash of the build is included as a</div><div class='ctx'> separate entry.</div><div class='ctx'> </div><div class='add'>+Upgrading Firmware</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+fbnic supports updating firmware using signed PLDM images with devlink dev</div><div class='add'>+flash. PLDM images are written into the flash. Flashing does not interrupt</div><div class='add'>+the operation of the device.</div><div class='add'>+</div><div class='add'>+On host boot the latest UEFI driver is always used, no explicit activation</div><div class='add'>+is required. Firmware activation is required to run new control firmware. cmrt</div><div class='add'>+firmware can only be activated by power cycling the NIC.</div><div class='add'>+</div><div class='ctx'> Statistics</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='add'>+TX MAC Interface</div><div class='add'>+~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+ - ``ptp_illegal_req``: packets sent to the NIC with PTP request bit set but routed to BMC/FW</div><div class='add'>+ - ``ptp_good_ts``: packets successfully routed to MAC with PTP request bit set</div><div class='add'>+ - ``ptp_bad_ts``: packets destined for MAC with PTP request bit set but aborted because of some error (e.g., DMA read error)</div><div class='add'>+</div><div class='add'>+TX Extension (TEI) Interface (TTI)</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+ - ``tti_cm_drop``: control messages dropped at the TX Extension (TEI) Interface because of credit starvation</div><div class='add'>+ - ``tti_frame_drop``: packets dropped at the TX Extension (TEI) Interface because of credit starvation</div><div class='add'>+ - ``tti_tbi_drop``: packets dropped at the TX BMC Interface (TBI) because of credit starvation</div><div class='add'>+</div><div class='add'>+RXB (RX Buffer) Enqueue</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+ - ``rxb_integrity_err[i]``: frames enqueued with integrity errors (e.g., multi-bit ECC errors) on RXB input i</div><div class='add'>+ - ``rxb_mac_err[i]``: frames enqueued with MAC end-of-frame errors (e.g., bad FCS) on RXB input i</div><div class='add'>+ - ``rxb_parser_err[i]``: frames experienced RPC parser errors</div><div class='add'>+ - ``rxb_frm_err[i]``: frames experienced signaling errors (e.g., missing end-of-packet/start-of-packet) on RXB input i</div><div class='add'>+ - ``rxb_drbo[i]_frames``: frames received at RXB input i</div><div class='add'>+ - ``rxb_drbo[i]_bytes``: bytes received at RXB input i</div><div class='add'>+</div><div class='add'>+RXB (RX Buffer) FIFO</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+ - ``rxb_fifo[i]_drop``: transitions into the drop state on RXB pool i</div><div class='add'>+ - ``rxb_fifo[i]_dropped_frames``: frames dropped on RXB pool i</div><div class='add'>+ - ``rxb_fifo[i]_ecn``: transitions into the ECN mark state on RXB pool i</div><div class='add'>+ - ``rxb_fifo[i]_level``: current occupancy of RXB pool i</div><div class='add'>+</div><div class='add'>+RXB (RX Buffer) Dequeue</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+   - ``rxb_intf[i]_frames``: frames sent to the output i</div><div class='add'>+   - ``rxb_intf[i]_bytes``: bytes sent to the output i</div><div class='add'>+   - ``rxb_pbuf[i]_frames``: frames sent to output i from the perspective of internal packet buffer</div><div class='add'>+   - ``rxb_pbuf[i]_bytes``: bytes sent to output i from the perspective of internal packet buffer</div><div class='add'>+</div><div class='ctx'> RPC (Rx parser)</div><div class='ctx'> ~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -44,6 +95,15 @@ RPC (Rx parser)</div><div class='ctx'>  - ``rpc_out_of_hdr_err``: frames where header was larger than parsable region</div><div class='ctx'>  - ``ovr_size_err``: oversized frames</div><div class='ctx'> </div><div class='add'>+Hardware Queues</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+1. RX DMA Engine:</div><div class='add'>+</div><div class='add'>+ - ``rde_[i]_pkt_err``: packets with MAC EOP, RPC parser, RXB truncation, or RDE frame truncation errors. These error are flagged in the packet metadata because of cut-through support but the actual drop happens once PCIE/RDE is reached.</div><div class='add'>+ - ``rde_[i]_pkt_cq_drop``: packets dropped because RCQ is full</div><div class='add'>+ - ``rde_[i]_pkt_bdq_drop``: packets dropped because HPQ or PPQ ran out of host buffer</div><div class='add'>+</div><div class='ctx'> PCIe</div><div class='ctx'> ~~~~</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst b/Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst<br/>new file mode 100644<br/>index 000000000000..da21ddf431bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/device_drivers/ethernet/ti/icssg_prueth.rst</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==============================================</div><div class='add'>+Texas Instruments ICSSG PRUETH ethernet driver</div><div class='add'>+==============================================</div><div class='add'>+</div><div class='add'>+:Version: 1.0</div><div class='add'>+</div><div class='add'>+ICSSG Firmware</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+Every ICSSG core has two Programmable Real-Time Unit(PRUs), two auxiliary</div><div class='add'>+Real-Time Transfer Unit (RTUs), and two Transmit Real-Time Transfer Units</div><div class='add'>+(TX_PRUs). Each one of these runs its own firmware. The firmwares combnined are</div><div class='add'>+referred as ICSSG Firmware.</div><div class='add'>+</div><div class='add'>+Firmware Statistics</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+The ICSSG firmware maintains certain statistics which are dumped by the driver</div><div class='add'>+via ``ethtool -S &lt;interface&gt;``</div><div class='add'>+</div><div class='add'>+These statistics are as follows,</div><div class='add'>+</div><div class='add'>+ - ``FW_RTU_PKT_DROP``: Diagnostic error counter which increments when RTU drops a locally injected packet due to port being disabled or rule violation.</div><div class='add'>+ - ``FW_Q0_OVERFLOW``: TX overflow counter for queue0</div><div class='add'>+ - ``FW_Q1_OVERFLOW``: TX overflow counter for queue1</div><div class='add'>+ - ``FW_Q2_OVERFLOW``: TX overflow counter for queue2</div><div class='add'>+ - ``FW_Q3_OVERFLOW``: TX overflow counter for queue3</div><div class='add'>+ - ``FW_Q4_OVERFLOW``: TX overflow counter for queue4</div><div class='add'>+ - ``FW_Q5_OVERFLOW``: TX overflow counter for queue5</div><div class='add'>+ - ``FW_Q6_OVERFLOW``: TX overflow counter for queue6</div><div class='add'>+ - ``FW_Q7_OVERFLOW``: TX overflow counter for queue7</div><div class='add'>+ - ``FW_DROPPED_PKT``: This counter is incremented when a packet is dropped at PRU because of rule violation.</div><div class='add'>+ - ``FW_RX_ERROR``: Incremented if there was a CRC error or Min/Max frame error at PRU</div><div class='add'>+ - ``FW_RX_DS_INVALID``: Incremented when RTU detects Data Status invalid condition</div><div class='add'>+ - ``FW_TX_DROPPED_PACKET``: Counter for packets dropped via TX Port</div><div class='add'>+ - ``FW_TX_TS_DROPPED_PACKET``: Counter for packets with TS flag dropped via TX Port</div><div class='add'>+ - ``FW_INF_PORT_DISABLED``: Incremented when RX frame is dropped due to port being disabled</div><div class='add'>+ - ``FW_INF_SAV``: Incremented when RX frame is dropped due to Source Address violation</div><div class='add'>+ - ``FW_INF_SA_DL``: Incremented when RX frame is dropped due to Source Address being in the denylist</div><div class='add'>+ - ``FW_INF_PORT_BLOCKED``: Incremented when RX frame is dropped due to port being blocked and frame being a special frame</div><div class='add'>+ - ``FW_INF_DROP_TAGGED`` : Incremented when RX frame is dropped for being tagged</div><div class='add'>+ - ``FW_INF_DROP_PRIOTAGGED``: Incremented when RX frame is dropped for being priority tagged</div><div class='add'>+ - ``FW_INF_DROP_NOTAG``: Incremented when RX frame is dropped for being untagged</div><div class='add'>+ - ``FW_INF_DROP_NOTMEMBER``: Incremented when RX frame is dropped for port not being member of VLAN</div><div class='add'>+ - ``FW_RX_EOF_SHORT_FRMERR``: Incremented if End Of Frame (EOF) task is scheduled without seeing RX_B1</div><div class='add'>+ - ``FW_RX_B0_DROP_EARLY_EOF``: Incremented when frame is dropped due to Early EOF</div><div class='add'>+ - ``FW_TX_JUMBO_FRM_CUTOFF``: Incremented when frame is cut off to prevent packet size &gt; 2000 Bytes</div><div class='add'>+ - ``FW_RX_EXP_FRAG_Q_DROP``: Incremented when express frame is received in the same queue as the previous fragment</div><div class='add'>+ - ``FW_RX_FIFO_OVERRUN``: RX fifo overrun counter</div><div class='add'>+ - ``FW_CUT_THR_PKT``: Incremented when a packet is forwarded using Cut-Through forwarding method</div><div class='add'>+ - ``FW_HOST_RX_PKT_CNT``: Number of valid packets sent by Rx PRU to Host on PSI</div><div class='add'>+ - ``FW_HOST_TX_PKT_CNT``: Number of valid packets copied by RTU0 to Tx queues</div><div class='add'>+ - ``FW_HOST_EGRESS_Q_PRE_OVERFLOW``: Host Egress Q (Pre-emptible) Overflow Counter</div><div class='add'>+ - ``FW_HOST_EGRESS_Q_EXP_OVERFLOW``: Host Egress Q (Pre-emptible) Overflow Counter</div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-info.rst b/Documentation/networking/devlink/devlink-info.rst<br/>index 23073bc219d8..dd6adc4d0559 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-info.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devlink/devlink-info.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-info.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/devlink/devlink-info.rst</a></div><div class='hunk'>@@ -86,6 +86,10 @@ In case software/firmware components are loaded from the disk (e.g.</div><div class='ctx'> ``/lib/firmware``) only the running version should be reported via</div><div class='ctx'> the kernel API.</div><div class='ctx'> </div><div class='add'>+Please note that any security versions reported via devlink are purely</div><div class='add'>+informational. Devlink does not use a secure channel to communicate with</div><div class='add'>+the device.</div><div class='add'>+</div><div class='ctx'> Generic Versions</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-trap.rst b/Documentation/networking/devlink/devlink-trap.rst<br/>index 2c14dfe69b3a..5885e21e2212 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-trap.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devlink/devlink-trap.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/devlink-trap.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/devlink/devlink-trap.rst</a></div><div class='hunk'>@@ -451,7 +451,7 @@ be added to the following table:</div><div class='ctx'>    * - ``udp_parsing``</div><div class='ctx'>      - ``drop``</div><div class='ctx'>      - Traps packets dropped due to an error in the UDP header parsing.</div><div class='del'>-       This packet trap could include checksum errorrs, an improper UDP</div><div class='add'>+       This packet trap could include checksum errors, an improper UDP</div><div class='ctx'>        length detected (smaller than 8 bytes) or detection of header</div><div class='ctx'>        truncation.</div><div class='ctx'>    * - ``tcp_parsing``</div><div class='head'>diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst<br/>index 948c8c44e233..8319f43b5933 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devlink/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/devlink/index.rst</a></div><div class='hunk'>@@ -84,6 +84,7 @@ parameters, info versions, and other features it supports.</div><div class='ctx'>    i40e</div><div class='ctx'>    ionic</div><div class='ctx'>    ice</div><div class='add'>+   ixgbe</div><div class='ctx'>    mlx4</div><div class='ctx'>    mlx5</div><div class='ctx'>    mlxsw</div><div class='head'>diff --git a/Documentation/networking/devlink/ixgbe.rst b/Documentation/networking/devlink/ixgbe.rst<br/>new file mode 100644<br/>index 000000000000..c27d1436c70e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devlink/ixgbe.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/devlink/ixgbe.rst</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=====================</div><div class='add'>+ixgbe devlink support</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+This document describes the devlink features implemented by the ``ixgbe``</div><div class='add'>+device driver.</div><div class='add'>+</div><div class='add'>+Info versions</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+Any of the versions dealing with the security presented by ``devlink-info``</div><div class='add'>+is purely informational. Devlink does not use a secure channel to communicate</div><div class='add'>+with the device.</div><div class='add'>+</div><div class='add'>+The ``ixgbe`` driver reports the following versions</div><div class='add'>+</div><div class='add'>+.. list-table:: devlink info versions implemented</div><div class='add'>+    :widths: 5 5 5 90</div><div class='add'>+</div><div class='add'>+    * - Name</div><div class='add'>+      - Type</div><div class='add'>+      - Example</div><div class='add'>+      - Description</div><div class='add'>+    * - ``board.id``</div><div class='add'>+      - fixed</div><div class='add'>+      - H49289-000</div><div class='add'>+      - The Product Board Assembly (PBA) identifier of the board.</div><div class='add'>+    * - ``fw.undi``</div><div class='add'>+      - running</div><div class='add'>+      - 1.1937.0</div><div class='add'>+      - Version of the Option ROM containing the UEFI driver. The version is</div><div class='add'>+        reported in ``major.minor.patch`` format. The major version is</div><div class='add'>+        incremented whenever a major breaking change occurs, or when the</div><div class='add'>+        minor version would overflow. The minor version is incremented for</div><div class='add'>+        non-breaking changes and reset to 1 when the major version is</div><div class='add'>+        incremented. The patch version is normally 0 but is incremented when</div><div class='add'>+        a fix is delivered as a patch against an older base Option ROM.</div><div class='add'>+    * - ``fw.undi.srev``</div><div class='add'>+      - running</div><div class='add'>+      - 4</div><div class='add'>+      - Number indicating the security revision of the Option ROM.</div><div class='add'>+    * - ``fw.bundle_id``</div><div class='add'>+      - running</div><div class='add'>+      - 0x80000d0d</div><div class='add'>+      - Unique identifier of the firmware image file that was loaded onto</div><div class='add'>+        the device. Also referred to as the EETRACK identifier of the NVM.</div><div class='add'>+    * - ``fw.mgmt.api``</div><div class='add'>+      - running</div><div class='add'>+      - 1.5.1</div><div class='add'>+      - 3-digit version number (major.minor.patch) of the API exported over</div><div class='add'>+        the AdminQ by the management firmware. Used by the driver to</div><div class='add'>+        identify what commands are supported. Historical versions of the</div><div class='add'>+        kernel only displayed a 2-digit version number (major.minor).</div><div class='add'>+    * - ``fw.mgmt.build``</div><div class='add'>+      - running</div><div class='add'>+      - 0x305d955f</div><div class='add'>+      - Unique identifier of the source for the management firmware.</div><div class='add'>+    * - ``fw.mgmt.srev``</div><div class='add'>+      - running</div><div class='add'>+      - 3</div><div class='add'>+      - Number indicating the security revision of the firmware.</div><div class='add'>+    * - ``fw.psid.api``</div><div class='add'>+      - running</div><div class='add'>+      - 0.80</div><div class='add'>+      - Version defining the format of the flash contents.</div><div class='add'>+    * - ``fw.netlist``</div><div class='add'>+      - running</div><div class='add'>+      - 1.1.2000-6.7.0</div><div class='add'>+      - The version of the netlist module. This module defines the device's</div><div class='add'>+        Ethernet capabilities and default settings, and is used by the</div><div class='add'>+        management firmware as part of managing link and device</div><div class='add'>+        connectivity.</div><div class='add'>+    * - ``fw.netlist.build``</div><div class='add'>+      - running</div><div class='add'>+      - 0xee16ced7</div><div class='add'>+      - The first 4 bytes of the hash of the netlist module contents.</div><div class='add'>+</div><div class='add'>+Flash Update</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+The ``ixgbe`` driver implements support for flash update using the</div><div class='add'>+``devlink-flash`` interface. It supports updating the device flash using a</div><div class='add'>+combined flash image that contains the ``fw.mgmt``, ``fw.undi``, and</div><div class='add'>+``fw.netlist`` components.</div><div class='add'>+</div><div class='add'>+.. list-table:: List of supported overwrite modes</div><div class='add'>+   :widths: 5 95</div><div class='add'>+</div><div class='add'>+   * - Bits</div><div class='add'>+     - Behavior</div><div class='add'>+   * - ``DEVLINK_FLASH_OVERWRITE_SETTINGS``</div><div class='add'>+     - Do not preserve settings stored in the flash components being</div><div class='add'>+       updated. This includes overwriting the port configuration that</div><div class='add'>+       determines the number of physical functions the device will</div><div class='add'>+       initialize with.</div><div class='add'>+   * - ``DEVLINK_FLASH_OVERWRITE_SETTINGS`` and ``DEVLINK_FLASH_OVERWRITE_IDENTIFIERS``</div><div class='add'>+     - Do not preserve either settings or identifiers. Overwrite everything</div><div class='add'>+       in the flash with the contents from the provided image, without</div><div class='add'>+       performing any preservation. This includes overwriting device</div><div class='add'>+       identifying fields such as the MAC address, Vital product Data (VPD) area,</div><div class='add'>+       and device serial number. It is expected that this combination be used with an</div><div class='add'>+       image customized for the specific device.</div><div class='add'>+</div><div class='add'>+Reload</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+The ``ixgbe`` driver supports activating new firmware after a flash update</div><div class='add'>+using ``DEVLINK_CMD_RELOAD`` with the ``DEVLINK_RELOAD_ACTION_FW_ACTIVATE``</div><div class='add'>+action.</div><div class='add'>+</div><div class='add'>+.. code:: shell</div><div class='add'>+</div><div class='add'>+    $ devlink dev reload pci/0000:01:00.0 reload action fw_activate</div><div class='add'>+</div><div class='add'>+The new firmware is activated by issuing a device specific Embedded</div><div class='add'>+Management Processor reset which requests the device to reset and reload the</div><div class='add'>+EMP firmware image.</div><div class='add'>+</div><div class='add'>+The driver does not currently support reloading the driver via</div><div class='add'>+``DEVLINK_RELOAD_ACTION_DRIVER_REINIT``.</div><div class='add'>+</div><div class='add'>+Regions</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+The ``ixgbe`` driver implements the following regions for accessing internal</div><div class='add'>+device data.</div><div class='add'>+</div><div class='add'>+.. list-table:: regions implemented</div><div class='add'>+    :widths: 15 85</div><div class='add'>+</div><div class='add'>+    * - Name</div><div class='add'>+      - Description</div><div class='add'>+    * - ``nvm-flash``</div><div class='add'>+      - The contents of the entire flash chip, sometimes referred to as</div><div class='add'>+        the device's Non Volatile Memory.</div><div class='add'>+    * - ``shadow-ram``</div><div class='add'>+      - The contents of the Shadow RAM, which is loaded from the beginning</div><div class='add'>+        of the flash. Although the contents are primarily from the flash,</div><div class='add'>+        this area also contains data generated during device boot which is</div><div class='add'>+        not stored in flash.</div><div class='add'>+    * - ``device-caps``</div><div class='add'>+      - The contents of the device firmware's capabilities buffer. Useful to</div><div class='add'>+        determine the current state and configuration of the device.</div><div class='add'>+</div><div class='add'>+Both the ``nvm-flash`` and ``shadow-ram`` regions can be accessed without a</div><div class='add'>+snapshot. The ``device-caps`` region requires a snapshot as the contents are</div><div class='add'>+sent by firmware and can't be split into separate reads.</div><div class='add'>+</div><div class='add'>+Users can request an immediate capture of a snapshot for all three regions</div><div class='add'>+via the ``DEVLINK_CMD_REGION_NEW`` command.</div><div class='add'>+</div><div class='add'>+.. code:: shell</div><div class='add'>+</div><div class='add'>+    $ devlink region show</div><div class='add'>+    pci/0000:01:00.0/nvm-flash: size 10485760 snapshot [] max 1</div><div class='add'>+    pci/0000:01:00.0/device-caps: size 4096 snapshot [] max 10</div><div class='add'>+</div><div class='add'>+    $ devlink region new pci/0000:01:00.0/nvm-flash snapshot 1</div><div class='add'>+</div><div class='add'>+    $ devlink region dump pci/0000:01:00.0/nvm-flash snapshot 1</div><div class='add'>+    0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30</div><div class='add'>+    0000000000000010 0000 0000 ffff ff04 0029 8c00 0028 8cc8</div><div class='add'>+    0000000000000020 0016 0bb8 0016 1720 0000 0000 c00f 3ffc</div><div class='add'>+    0000000000000030 bada cce5 bada cce5 bada cce5 bada cce5</div><div class='add'>+</div><div class='add'>+    $ devlink region read pci/0000:01:00.0/nvm-flash snapshot 1 address 0 length 16</div><div class='add'>+    0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30</div><div class='add'>+</div><div class='add'>+    $ devlink region delete pci/0000:01:00.0/device-caps snapshot 1</div><div class='head'>diff --git a/Documentation/networking/devmem.rst b/Documentation/networking/devmem.rst<br/>index eb678ca45496..a6cd7236bfbd 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/devmem.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/devmem.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/devmem.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/devmem.rst</a></div><div class='hunk'>@@ -62,15 +62,15 @@ More Info</div><div class='ctx'>     https://lore.kernel.org/netdev/20240831004313.3713467-1-almasrymina@google.com/</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Interface</div><div class='del'>-=========</div><div class='add'>+RX Interface</div><div class='add'>+============</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Example</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='del'>-tools/testing/selftests/net/ncdevmem.c:do_server shows an example of setting up</div><div class='del'>-the RX path of this API.</div><div class='add'>+./tools/testing/selftests/drivers/net/hw/ncdevmem:do_server shows an example of</div><div class='add'>+setting up the RX path of this API.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> NIC Setup</div><div class='hunk'>@@ -235,6 +235,148 @@ can be less than the tokens provided by the user in case of:</div><div class='ctx'> (a) an internal kernel leak bug.</div><div class='ctx'> (b) the user passed more than 1024 frags.</div><div class='ctx'> </div><div class='add'>+TX Interface</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+./tools/testing/selftests/drivers/net/hw/ncdevmem:do_client shows an example of</div><div class='add'>+setting up the TX path of this API.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+NIC Setup</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+The user must bind a TX dmabuf to a given NIC using the netlink API::</div><div class='add'>+</div><div class='add'>+        struct netdev_bind_tx_req *req = NULL;</div><div class='add'>+        struct netdev_bind_tx_rsp *rsp = NULL;</div><div class='add'>+        struct ynl_error yerr;</div><div class='add'>+</div><div class='add'>+        *ys = ynl_sock_create(&amp;ynl_netdev_family, &amp;yerr);</div><div class='add'>+</div><div class='add'>+        req = netdev_bind_tx_req_alloc();</div><div class='add'>+        netdev_bind_tx_req_set_ifindex(req, ifindex);</div><div class='add'>+        netdev_bind_tx_req_set_fd(req, dmabuf_fd);</div><div class='add'>+</div><div class='add'>+        rsp = netdev_bind_tx(*ys, req);</div><div class='add'>+</div><div class='add'>+        tx_dmabuf_id = rsp-&gt;id;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The netlink API returns a dmabuf_id: a unique ID that refers to this dmabuf</div><div class='add'>+that has been bound.</div><div class='add'>+</div><div class='add'>+The user can unbind the dmabuf from the netdevice by closing the netlink socket</div><div class='add'>+that established the binding. We do this so that the binding is automatically</div><div class='add'>+unbound even if the userspace process crashes.</div><div class='add'>+</div><div class='add'>+Note that any reasonably well-behaved dmabuf from any exporter should work with</div><div class='add'>+devmem TCP, even if the dmabuf is not actually backed by devmem. An example of</div><div class='add'>+this is udmabuf, which wraps user memory (non-devmem) in a dmabuf.</div><div class='add'>+</div><div class='add'>+Socket Setup</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+The user application must use MSG_ZEROCOPY flag when sending devmem TCP. Devmem</div><div class='add'>+cannot be copied by the kernel, so the semantics of the devmem TX are similar</div><div class='add'>+to the semantics of MSG_ZEROCOPY::</div><div class='add'>+</div><div class='add'>+	setsockopt(socket_fd, SOL_SOCKET, SO_ZEROCOPY, &amp;opt, sizeof(opt));</div><div class='add'>+</div><div class='add'>+It is also recommended that the user binds the TX socket to the same interface</div><div class='add'>+the dma-buf has been bound to via SO_BINDTODEVICE::</div><div class='add'>+</div><div class='add'>+	setsockopt(socket_fd, SOL_SOCKET, SO_BINDTODEVICE, ifname, strlen(ifname) + 1);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Sending data</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Devmem data is sent using the SCM_DEVMEM_DMABUF cmsg.</div><div class='add'>+</div><div class='add'>+The user should create a msghdr where,</div><div class='add'>+</div><div class='add'>+* iov_base is set to the offset into the dmabuf to start sending from</div><div class='add'>+* iov_len is set to the number of bytes to be sent from the dmabuf</div><div class='add'>+</div><div class='add'>+The user passes the dma-buf id to send from via the dmabuf_tx_cmsg.dmabuf_id.</div><div class='add'>+</div><div class='add'>+The example below sends 1024 bytes from offset 100 into the dmabuf, and 2048</div><div class='add'>+from offset 2000 into the dmabuf. The dmabuf to send from is tx_dmabuf_id::</div><div class='add'>+</div><div class='add'>+       char ctrl_data[CMSG_SPACE(sizeof(struct dmabuf_tx_cmsg))];</div><div class='add'>+       struct dmabuf_tx_cmsg ddmabuf;</div><div class='add'>+       struct msghdr msg = {};</div><div class='add'>+       struct cmsghdr *cmsg;</div><div class='add'>+       struct iovec iov[2];</div><div class='add'>+</div><div class='add'>+       iov[0].iov_base = (void*)100;</div><div class='add'>+       iov[0].iov_len = 1024;</div><div class='add'>+       iov[1].iov_base = (void*)2000;</div><div class='add'>+       iov[1].iov_len = 2048;</div><div class='add'>+</div><div class='add'>+       msg.msg_iov = iov;</div><div class='add'>+       msg.msg_iovlen = 2;</div><div class='add'>+</div><div class='add'>+       msg.msg_control = ctrl_data;</div><div class='add'>+       msg.msg_controllen = sizeof(ctrl_data);</div><div class='add'>+</div><div class='add'>+       cmsg = CMSG_FIRSTHDR(&amp;msg);</div><div class='add'>+       cmsg-&gt;cmsg_level = SOL_SOCKET;</div><div class='add'>+       cmsg-&gt;cmsg_type = SCM_DEVMEM_DMABUF;</div><div class='add'>+       cmsg-&gt;cmsg_len = CMSG_LEN(sizeof(struct dmabuf_tx_cmsg));</div><div class='add'>+</div><div class='add'>+       ddmabuf.dmabuf_id = tx_dmabuf_id;</div><div class='add'>+</div><div class='add'>+       *((struct dmabuf_tx_cmsg *)CMSG_DATA(cmsg)) = ddmabuf;</div><div class='add'>+</div><div class='add'>+       sendmsg(socket_fd, &amp;msg, MSG_ZEROCOPY);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Reusing TX dmabufs</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Similar to MSG_ZEROCOPY with regular memory, the user should not modify the</div><div class='add'>+contents of the dma-buf while a send operation is in progress. This is because</div><div class='add'>+the kernel does not keep a copy of the dmabuf contents. Instead, the kernel</div><div class='add'>+will pin and send data from the buffer available to the userspace.</div><div class='add'>+</div><div class='add'>+Just as in MSG_ZEROCOPY, the kernel notifies the userspace of send completions</div><div class='add'>+using MSG_ERRQUEUE::</div><div class='add'>+</div><div class='add'>+        int64_t tstop = gettimeofday_ms() + waittime_ms;</div><div class='add'>+        char control[CMSG_SPACE(100)] = {};</div><div class='add'>+        struct sock_extended_err *serr;</div><div class='add'>+        struct msghdr msg = {};</div><div class='add'>+        struct cmsghdr *cm;</div><div class='add'>+        int retries = 10;</div><div class='add'>+        __u32 hi, lo;</div><div class='add'>+</div><div class='add'>+        msg.msg_control = control;</div><div class='add'>+        msg.msg_controllen = sizeof(control);</div><div class='add'>+</div><div class='add'>+        while (gettimeofday_ms() &lt; tstop) {</div><div class='add'>+                if (!do_poll(fd)) continue;</div><div class='add'>+</div><div class='add'>+                ret = recvmsg(fd, &amp;msg, MSG_ERRQUEUE);</div><div class='add'>+</div><div class='add'>+                for (cm = CMSG_FIRSTHDR(&amp;msg); cm; cm = CMSG_NXTHDR(&amp;msg, cm)) {</div><div class='add'>+                        serr = (void *)CMSG_DATA(cm);</div><div class='add'>+</div><div class='add'>+                        hi = serr-&gt;ee_data;</div><div class='add'>+                        lo = serr-&gt;ee_info;</div><div class='add'>+</div><div class='add'>+                        fprintf(stdout, "tx complete [%d,%d]\n", lo, hi);</div><div class='add'>+                }</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+After the associated sendmsg has been completed, the dmabuf can be reused by</div><div class='add'>+the userspace.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Implementation &amp; Caveats</div><div class='ctx'> ========================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst<br/>index c64133d309bf..ac90b82f3ce9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/index.rst</a></div><div class='hunk'>@@ -48,7 +48,6 @@ Contents:</div><div class='ctx'>    ax25</div><div class='ctx'>    bonding</div><div class='ctx'>    cdc_mbim</div><div class='del'>-   dccp</div><div class='ctx'>    dctcp</div><div class='ctx'>    devmem</div><div class='ctx'>    dns_resolver</div><div class='head'>diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst<br/>index 5c63ab928b97..0f1251cce314 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/ip-sysctl.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/ip-sysctl.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/ip-sysctl.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/ip-sysctl.rst</a></div><div class='hunk'>@@ -37,8 +37,8 @@ ip_no_pmtu_disc - INTEGER</div><div class='ctx'> 	Mode 3 is a hardened pmtu discover mode. The kernel will only</div><div class='ctx'> 	accept fragmentation-needed errors if the underlying protocol</div><div class='ctx'> 	can verify them besides a plain socket lookup. Current</div><div class='del'>-	protocols for which pmtu events will be honored are TCP, SCTP</div><div class='del'>-	and DCCP as they verify e.g. the sequence number or the</div><div class='add'>+	protocols for which pmtu events will be honored are TCP and</div><div class='add'>+	SCTP as they verify e.g. the sequence number or the</div><div class='ctx'> 	association. This mode should not be enabled globally but is</div><div class='ctx'> 	only intended to secure e.g. name servers in namespaces where</div><div class='ctx'> 	TCP path mtu must still work but path MTU information of other</div><div class='hunk'>@@ -735,7 +735,7 @@ tcp_rmem - vector of 3 INTEGERs: min, default, max</div><div class='ctx'> 	net.core.rmem_max.  Calling setsockopt() with SO_RCVBUF disables</div><div class='ctx'> 	automatic tuning of that socket's receive buffer size, in which</div><div class='ctx'> 	case this value is ignored.</div><div class='del'>-	Default: between 131072 and 6MB, depending on RAM size.</div><div class='add'>+	Default: between 131072 and 32MB, depending on RAM size.</div><div class='ctx'> </div><div class='ctx'> tcp_sack - BOOLEAN</div><div class='ctx'> 	Enable select acknowledgments (SACKS).</div><div class='hunk'>@@ -1099,7 +1099,7 @@ tcp_limit_output_bytes - INTEGER</div><div class='ctx'> 	limits the number of bytes on qdisc or device to reduce artificial</div><div class='ctx'> 	RTT/cwnd and reduce bufferbloat.</div><div class='ctx'> </div><div class='del'>-	Default: 1048576 (16 * 65536)</div><div class='add'>+	Default: 4194304 (4 MB)</div><div class='ctx'> </div><div class='ctx'> tcp_challenge_ack_limit - INTEGER</div><div class='ctx'> 	Limits number of Challenge ACK sent per second, as recommended</div><div class='head'>diff --git a/Documentation/networking/net_cachelines/net_device.rst b/Documentation/networking/net_cachelines/net_device.rst<br/>index 6327e689e8a8..c69cc89c958e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/net_cachelines/net_device.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/net_cachelines/net_device.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/net_cachelines/net_device.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/net_cachelines/net_device.rst</a></div><div class='hunk'>@@ -10,6 +10,7 @@ Type                                Name                        fastpath_tx_acce</div><div class='ctx'> =================================== =========================== =================== =================== ===================================================================================</div><div class='ctx'> unsigned_long:32                    priv_flags                  read_mostly                             __dev_queue_xmit(tx)</div><div class='ctx'> unsigned_long:1                     lltx                        read_mostly                             HARD_TX_LOCK,HARD_TX_TRYLOCK,HARD_TX_UNLOCK(tx)</div><div class='add'>+unsigned long:1                     netmem_tx:1;                read_mostly</div><div class='ctx'> char                                name[16]</div><div class='ctx'> struct netdev_name_node*            name_node</div><div class='ctx'> struct dev_ifalias*                 ifalias</div><div class='hunk'>@@ -131,7 +132,7 @@ struct ref_tracker_dir              refcnt_tracker</div><div class='ctx'> struct list_head                    link_watch_list</div><div class='ctx'> enum:8                              reg_state</div><div class='ctx'> bool                                dismantle</div><div class='del'>-enum:16                             rtnl_link_state</div><div class='add'>+bool                                rtnl_link_initilizing</div><div class='ctx'> bool                                needs_free_netdev</div><div class='ctx'> void*priv_destructor                struct net_device</div><div class='ctx'> struct netpoll_info*                npinfo                                          read_mostly         napi_poll/napi_poll_lock</div><div class='head'>diff --git a/Documentation/networking/net_cachelines/snmp.rst b/Documentation/networking/net_cachelines/snmp.rst<br/>index bc96efc92cf5..bd44b3eebbef 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/net_cachelines/snmp.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/net_cachelines/snmp.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/net_cachelines/snmp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/net_cachelines/snmp.rst</a></div><div class='hunk'>@@ -37,6 +37,8 @@ unsigned_long  LINUX_MIB_TIMEWAITKILLED</div><div class='ctx'> unsigned_long  LINUX_MIB_PAWSACTIVEREJECTED</div><div class='ctx'> unsigned_long  LINUX_MIB_PAWSESTABREJECTED</div><div class='ctx'> unsigned_long  LINUX_MIB_TSECR_REJECTED</div><div class='add'>+unsigned_long  LINUX_MIB_PAWS_OLD_ACK</div><div class='add'>+unsigned_long  LINUX_MIB_PAWS_TW_REJECTED</div><div class='ctx'> unsigned_long  LINUX_MIB_DELAYEDACKLOST</div><div class='ctx'> unsigned_long  LINUX_MIB_LISTENOVERFLOWS</div><div class='ctx'> unsigned_long  LINUX_MIB_LISTENDROPS</div><div class='head'>diff --git a/Documentation/networking/netdev-features.rst b/Documentation/networking/netdev-features.rst<br/>index 5014f7cc1398..02bd7536fc0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/netdev-features.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/netdev-features.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/netdev-features.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/netdev-features.rst</a></div><div class='hunk'>@@ -188,3 +188,8 @@ Redundancy) frames from one port to another in hardware.</div><div class='ctx'> This should be set for devices which duplicate outgoing HSR (High-availability</div><div class='ctx'> Seamless Redundancy) or PRP (Parallel Redundancy Protocol) tags automatically</div><div class='ctx'> frames in hardware.</div><div class='add'>+</div><div class='add'>+* netmem-tx</div><div class='add'>+</div><div class='add'>+This should be set for devices which support netmem TX. See</div><div class='add'>+Documentation/networking/netmem.rst</div><div class='head'>diff --git a/Documentation/networking/netdevices.rst b/Documentation/networking/netdevices.rst<br/>index 6c2d8945f597..7ebb6c36482d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/netdevices.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/netdevices.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/netdevices.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/netdevices.rst</a></div><div class='hunk'>@@ -8,7 +8,7 @@ Network Devices, the Kernel, and You!</div><div class='ctx'> Introduction</div><div class='ctx'> ============</div><div class='ctx'> The following is a random collection of documentation regarding</div><div class='del'>-network devices.</div><div class='add'>+network devices. It is intended for driver developers.</div><div class='ctx'> </div><div class='ctx'> struct net_device lifetime rules</div><div class='ctx'> ================================</div><div class='hunk'>@@ -314,13 +314,8 @@ napi-&gt;poll:</div><div class='ctx'> 		 softirq</div><div class='ctx'> 		 will be called with interrupts disabled by netconsole.</div><div class='ctx'> </div><div class='del'>-struct netdev_queue_mgmt_ops synchronization rules</div><div class='del'>-==================================================</div><div class='del'>-</div><div class='del'>-All queue management ndo callbacks are holding netdev instance lock.</div><div class='del'>-</div><div class='del'>-RTNL and netdev instance lock</div><div class='del'>-=============================</div><div class='add'>+netdev instance lock</div><div class='add'>+====================</div><div class='ctx'> </div><div class='ctx'> Historically, all networking control operations were protected by a single</div><div class='ctx'> global lock known as ``rtnl_lock``. There is an ongoing effort to replace this</div><div class='hunk'>@@ -328,30 +323,76 @@ global lock with separate locks for each network namespace. Additionally,</div><div class='ctx'> properties of individual netdev are increasingly protected by per-netdev locks.</div><div class='ctx'> </div><div class='ctx'> For device drivers that implement shaping or queue management APIs, all control</div><div class='del'>-operations will be performed under the netdev instance lock. Currently, this</div><div class='del'>-instance lock is acquired within the context of ``rtnl_lock``. The drivers</div><div class='del'>-can also explicitly request instance lock to be acquired via</div><div class='del'>-``request_ops_lock``. In the future, there will be an option for individual</div><div class='add'>+operations will be performed under the netdev instance lock.</div><div class='add'>+Drivers can also explicitly request instance lock to be held during ops</div><div class='add'>+by setting ``request_ops_lock`` to true. Code comments and docs refer</div><div class='add'>+to drivers which have ops called under the instance lock as "ops locked".</div><div class='add'>+See also the documentation of the ``lock`` member of struct net_device.</div><div class='add'>+</div><div class='add'>+In the future, there will be an option for individual</div><div class='ctx'> drivers to opt out of using ``rtnl_lock`` and instead perform their control</div><div class='ctx'> operations directly under the netdev instance lock.</div><div class='ctx'> </div><div class='ctx'> Devices drivers are encouraged to rely on the instance lock where possible.</div><div class='ctx'> </div><div class='ctx'> For the (mostly software) drivers that need to interact with the core stack,</div><div class='del'>-there are two sets of interfaces: ``dev_xxx`` and ``netif_xxx`` (e.g.,</div><div class='del'>-``dev_set_mtu`` and ``netif_set_mtu``). The ``dev_xxx`` functions handle</div><div class='del'>-acquiring the instance lock themselves, while the ``netif_xxx`` functions</div><div class='del'>-assume that the driver has already acquired the instance lock.</div><div class='add'>+there are two sets of interfaces: ``dev_xxx``/``netdev_xxx`` and ``netif_xxx``</div><div class='add'>+(e.g., ``dev_set_mtu`` and ``netif_set_mtu``). The ``dev_xxx``/``netdev_xxx``</div><div class='add'>+functions handle acquiring the instance lock themselves, while the</div><div class='add'>+``netif_xxx`` functions assume that the driver has already acquired</div><div class='add'>+the instance lock.</div><div class='add'>+</div><div class='add'>+struct net_device_ops</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+``ndos`` are called without holding the instance lock for most drivers.</div><div class='add'>+</div><div class='add'>+"Ops locked" drivers will have most of the ``ndos`` invoked under</div><div class='add'>+the instance lock.</div><div class='add'>+</div><div class='add'>+struct ethtool_ops</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Similarly to ``ndos`` the instance lock is only held for select drivers.</div><div class='add'>+For "ops locked" drivers all ethtool ops without exceptions should</div><div class='add'>+be called under the instance lock.</div><div class='add'>+</div><div class='add'>+struct netdev_stat_ops</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+"qstat" ops are invoked under the instance lock for "ops locked" drivers,</div><div class='add'>+and under rtnl_lock for all other drivers.</div><div class='add'>+</div><div class='add'>+struct net_shaper_ops</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+All net shaper callbacks are invoked while holding the netdev instance</div><div class='add'>+lock. ``rtnl_lock`` may or may not be held.</div><div class='add'>+</div><div class='add'>+Note that supporting net shapers automatically enables "ops locking".</div><div class='add'>+</div><div class='add'>+struct netdev_queue_mgmt_ops</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+All queue management callbacks are invoked while holding the netdev instance</div><div class='add'>+lock. ``rtnl_lock`` may or may not be held.</div><div class='add'>+</div><div class='add'>+Note that supporting struct netdev_queue_mgmt_ops automatically enables</div><div class='add'>+"ops locking".</div><div class='ctx'> </div><div class='ctx'> Notifiers and netdev instance lock</div><div class='del'>-==================================</div><div class='add'>+----------------------------------</div><div class='ctx'> </div><div class='ctx'> For device drivers that implement shaping or queue management APIs,</div><div class='ctx'> some of the notifiers (``enum netdev_cmd``) are running under the netdev</div><div class='ctx'> instance lock.</div><div class='ctx'> </div><div class='add'>+The following netdev notifiers are always run under the instance lock:</div><div class='add'>+* ``NETDEV_XDP_FEAT_CHANGE``</div><div class='add'>+</div><div class='ctx'> For devices with locked ops, currently only the following notifiers are</div><div class='ctx'> running under the lock:</div><div class='add'>+* ``NETDEV_CHANGE``</div><div class='ctx'> * ``NETDEV_REGISTER``</div><div class='ctx'> * ``NETDEV_UP``</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/netmem.rst b/Documentation/networking/netmem.rst<br/>index 7de21ddb5412..b63aded46337 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/netmem.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/netmem.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/netmem.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/netmem.rst</a></div><div class='hunk'>@@ -19,8 +19,8 @@ Benefits of Netmem :</div><div class='ctx'> * Simplified Development: Drivers interact with a consistent API,</div><div class='ctx'>   regardless of the underlying memory implementation.</div><div class='ctx'> </div><div class='del'>-Driver Requirements</div><div class='del'>-===================</div><div class='add'>+Driver RX Requirements</div><div class='add'>+======================</div><div class='ctx'> </div><div class='ctx'> 1. The driver must support page_pool.</div><div class='ctx'> </div><div class='hunk'>@@ -77,3 +77,22 @@ Driver Requirements</div><div class='ctx'>    that purpose, but be mindful that some netmem types might have longer</div><div class='ctx'>    circulation times, such as when userspace holds a reference in zerocopy</div><div class='ctx'>    scenarios.</div><div class='add'>+</div><div class='add'>+Driver TX Requirements</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+1. The Driver must not pass the netmem dma_addr to any of the dma-mapping APIs</div><div class='add'>+   directly. This is because netmem dma_addrs may come from a source like</div><div class='add'>+   dma-buf that is not compatible with the dma-mapping APIs.</div><div class='add'>+</div><div class='add'>+   Helpers like netmem_dma_unmap_page_attrs() &amp; netmem_dma_unmap_addr_set()</div><div class='add'>+   should be used in lieu of dma_unmap_page[_attrs](), dma_unmap_addr_set().</div><div class='add'>+   The netmem variants will handle netmem dma_addrs correctly regardless of the</div><div class='add'>+   source, delegating to the dma-mapping APIs when appropriate.</div><div class='add'>+</div><div class='add'>+   Not all dma-mapping APIs have netmem equivalents at the moment. If your</div><div class='add'>+   driver relies on a missing netmem API, feel free to add and propose to</div><div class='add'>+   netdev@, or reach out to the maintainers and/or almasrymina@google.com for</div><div class='add'>+   help adding the netmem API.</div><div class='add'>+</div><div class='add'>+2. Driver should declare support by setting `netdev-&gt;netmem_tx = true`</div><div class='head'>diff --git a/Documentation/networking/rds.rst b/Documentation/networking/rds.rst<br/>index 498395f5fbcb..41b0a6182fe4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/rds.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/rds.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/rds.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/rds.rst</a></div><div class='hunk'>@@ -265,7 +265,7 @@ RDS Protocol</div><div class='ctx'> </div><div class='ctx'>       The bitmaps are allocated as connections are brought up.  This</div><div class='ctx'>       avoids allocation in the interrupt handling path which queues</div><div class='del'>-      sages on sockets.  The dense bitmaps let transports send the</div><div class='add'>+      messages on sockets.  The dense bitmaps let transports send the</div><div class='ctx'>       entire bitmap on any bitmap change reasonably efficiently.  This</div><div class='ctx'>       is much easier to implement than some finer-grained</div><div class='ctx'>       communication of per-port congestion.  The sender does a very</div><div class='hunk'>@@ -373,7 +373,7 @@ The recv path</div><div class='ctx'>     - validate header checksum</div><div class='ctx'>     - copy header to rds_ib_incoming struct if start of a new datagram</div><div class='ctx'>     - add to ibinc's fraglist</div><div class='del'>-    - if competed datagram:</div><div class='add'>+    - if completed datagram:</div><div class='ctx'> 	 - update cong map if datagram was cong update</div><div class='ctx'> 	 - call rds_recv_incoming() otherwise</div><div class='ctx'> 	 - note if ack is required</div><div class='hunk'>@@ -415,7 +415,7 @@ Multipath RDS (mprds)</div><div class='ctx'>   I/O workqs and reconnect threads are driven from the rds_conn_path.</div><div class='ctx'>   Transports such as TCP that are multipath capable may then set up a</div><div class='ctx'>   TCP socket per rds_conn_path, and this is managed by the transport via</div><div class='del'>-  the transport privatee cp_transport_data pointer.</div><div class='add'>+  the transport private cp_transport_data pointer.</div><div class='ctx'> </div><div class='ctx'>   Transports announce themselves as multipath capable by setting the</div><div class='ctx'>   t_mp_capable bit during registration with the rds core module. When the</div><div class='hunk'>@@ -430,7 +430,7 @@ Multipath RDS (mprds)</div><div class='ctx'>   This is done by sending out a control packet exchange before the</div><div class='ctx'>   first data packet. The control packet exchange must have completed</div><div class='ctx'>   prior to outgoing hash completion in rds_sendmsg() when the transport</div><div class='del'>-  is mutlipath capable.</div><div class='add'>+  is multipath capable.</div><div class='ctx'> </div><div class='ctx'>   The control packet is an RDS ping packet (i.e., packet to rds dest</div><div class='ctx'>   port 0) with the ping packet having a rds extension header option  of</div><div class='head'>diff --git a/Documentation/networking/rxrpc.rst b/Documentation/networking/rxrpc.rst<br/>index e807e18ba32a..d63e3e27dd06 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/rxrpc.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/rxrpc.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/rxrpc.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/rxrpc.rst</a></div><div class='hunk'>@@ -1062,30 +1062,6 @@ The kernel interface functions are as follows:</div><div class='ctx'>      first function to change.  Note that this must be called in TASK_RUNNING</div><div class='ctx'>      state.</div><div class='ctx'> </div><div class='del'>- (#) Get remote client epoch::</div><div class='del'>-</div><div class='del'>-	u32 rxrpc_kernel_get_epoch(struct socket *sock,</div><div class='del'>-				   struct rxrpc_call *call)</div><div class='del'>-</div><div class='del'>-     This allows the epoch that's contained in packets of an incoming client</div><div class='del'>-     call to be queried.  This value is returned.  The function always</div><div class='del'>-     successful if the call is still in progress.  It shouldn't be called once</div><div class='del'>-     the call has expired.  Note that calling this on a local client call only</div><div class='del'>-     returns the local epoch.</div><div class='del'>-</div><div class='del'>-     This value can be used to determine if the remote client has been</div><div class='del'>-     restarted as it shouldn't change otherwise.</div><div class='del'>-</div><div class='del'>- (#) Set the maximum lifespan on a call::</div><div class='del'>-</div><div class='del'>-	void rxrpc_kernel_set_max_life(struct socket *sock,</div><div class='del'>-				       struct rxrpc_call *call,</div><div class='del'>-				       unsigned long hard_timeout)</div><div class='del'>-</div><div class='del'>-     This sets the maximum lifespan on a call to hard_timeout (which is in</div><div class='del'>-     jiffies).  In the event of the timeout occurring, the call will be</div><div class='del'>-     aborted and -ETIME or -ETIMEDOUT will be returned.</div><div class='del'>-</div><div class='ctx'>  (#) Apply the RXRPC_MIN_SECURITY_LEVEL sockopt to a socket from within in the</div><div class='ctx'>      kernel::</div><div class='ctx'> </div><div class='hunk'>@@ -1172,3 +1148,18 @@ adjusted through sysctls in /proc/net/rxrpc/:</div><div class='ctx'>      header plus exactly 1412 bytes of data.  The terminal packet must contain</div><div class='ctx'>      a four byte header plus any amount of data.  In any event, a jumbo packet</div><div class='ctx'>      may not exceed rxrpc_rx_mtu in size.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+API Function Reference</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: net/rxrpc/af_rxrpc.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/call_object.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/key.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/oob.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/peer_object.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/recvmsg.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/rxgk.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/rxkad.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/sendmsg.c</div><div class='add'>+.. kernel-doc:: net/rxrpc/server_key.c</div><div class='head'>diff --git a/Documentation/networking/timestamping.rst b/Documentation/networking/timestamping.rst<br/>index b8fef8101176..7aabead90648 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/timestamping.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/timestamping.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/timestamping.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/timestamping.rst</a></div><div class='hunk'>@@ -811,11 +811,9 @@ Documentation/devicetree/bindings/ptp/timestamper.txt for more details.</div><div class='ctx'> 3.2.4 Other caveats for MAC drivers</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='del'>-Stacked PHCs, especially DSA (but not only) - since that doesn't require any</div><div class='del'>-modification to MAC drivers, so it is more difficult to ensure correctness of</div><div class='del'>-all possible code paths - is that they uncover bugs which were impossible to</div><div class='del'>-trigger before the existence of stacked PTP clocks.  One example has to do with</div><div class='del'>-this line of code, already presented earlier::</div><div class='add'>+The use of stacked PHCs may uncover MAC driver bugs which were impossible to</div><div class='add'>+trigger without them. One example has to do with this line of code, already</div><div class='add'>+presented earlier::</div><div class='ctx'> </div><div class='ctx'>       skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/tproxy.rst b/Documentation/networking/tproxy.rst<br/>index 7f7c1ff6f159..75e4990cc3db 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/tproxy.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/tproxy.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/tproxy.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/tproxy.rst</a></div><div class='hunk'>@@ -69,9 +69,9 @@ add rules like this to the iptables ruleset above::</div><div class='ctx'>     # iptables -t mangle -A PREROUTING -p tcp --dport 80 -j TPROXY \</div><div class='ctx'>       --tproxy-mark 0x1/0x1 --on-port 50080</div><div class='ctx'> </div><div class='del'>-Or the following rule to nft:</div><div class='add'>+Or the following rule to nft::</div><div class='ctx'> </div><div class='del'>-# nft add rule filter divert tcp dport 80 tproxy to :50080 meta mark set 1 accept</div><div class='add'>+    # nft add rule filter divert tcp dport 80 tproxy to :50080 meta mark set 1 accept</div><div class='ctx'> </div><div class='ctx'> Note that for this to work you'll have to modify the proxy to enable (SOL_IP,</div><div class='ctx'> IP_TRANSPARENT) for the listening socket.</div><div class='head'>diff --git a/Documentation/networking/xfrm_device.rst b/Documentation/networking/xfrm_device.rst<br/>index 7f24c09f2694..122204da0fff 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/networking/xfrm_device.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/networking/xfrm_device.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/networking/xfrm_device.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/networking/xfrm_device.rst</a></div><div class='hunk'>@@ -65,9 +65,13 @@ Callbacks to implement</div><div class='ctx'>   /* from include/linux/netdevice.h */</div><div class='ctx'>   struct xfrmdev_ops {</div><div class='ctx'>         /* Crypto and Packet offload callbacks */</div><div class='del'>-	int	(*xdo_dev_state_add) (struct xfrm_state *x, struct netlink_ext_ack *extack);</div><div class='del'>-	void	(*xdo_dev_state_delete) (struct xfrm_state *x);</div><div class='del'>-	void	(*xdo_dev_state_free) (struct xfrm_state *x);</div><div class='add'>+	int	(*xdo_dev_state_add)(struct net_device *dev,</div><div class='add'>+                                     struct xfrm_state *x,</div><div class='add'>+                                     struct netlink_ext_ack *extack);</div><div class='add'>+	void	(*xdo_dev_state_delete)(struct net_device *dev,</div><div class='add'>+                                        struct xfrm_state *x);</div><div class='add'>+	void	(*xdo_dev_state_free)(struct net_device *dev,</div><div class='add'>+                                      struct xfrm_state *x);</div><div class='ctx'> 	bool	(*xdo_dev_offload_ok) (struct sk_buff *skb,</div><div class='ctx'> 				       struct xfrm_state *x);</div><div class='ctx'> 	void    (*xdo_dev_state_advance_esn) (struct xfrm_state *x);</div><div class='head'>diff --git a/Documentation/power/energy-model.rst b/Documentation/power/energy-model.rst<br/>index ada4938c37e5..cbdf7520aaa6 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/power/energy-model.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/power/energy-model.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/power/energy-model.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/power/energy-model.rst</a></div><div class='hunk'>@@ -230,7 +230,7 @@ Drivers must provide a pointer to the allocated and initialized new EM</div><div class='ctx'> and will be visible to other sub-systems in the kernel (thermal, powercap).</div><div class='ctx'> The main design goal for this API is to be fast and avoid extra calculations</div><div class='ctx'> or memory allocations at runtime. When pre-computed EMs are available in the</div><div class='del'>-device driver, than it should be possible to simply re-use them with low</div><div class='add'>+device driver, then it should be possible to simply reuse them with low</div><div class='ctx'> performance overhead.</div><div class='ctx'> </div><div class='ctx'> In order to free the EM, provided earlier by the driver (e.g. when the module</div><div class='hunk'>@@ -381,17 +381,17 @@ up periodically to check the temperature and modify the EM data::</div><div class='ctx'>   26		rcu_read_unlock();</div><div class='ctx'>   27</div><div class='ctx'>   28		/* Calculate 'cost' values for EAS */</div><div class='del'>-  29		ret = em_dev_compute_costs(dev, table, pd-&gt;nr_perf_states);</div><div class='add'>+  29		ret = em_dev_compute_costs(dev, new_table, pd-&gt;nr_perf_states);</div><div class='ctx'>   30		if (ret) {</div><div class='ctx'>   31			dev_warn(dev, "EM: compute costs failed %d\n", ret);</div><div class='del'>-  32			em_free_table(em_table);</div><div class='add'>+  32			em_table_free(em_table);</div><div class='ctx'>   33			return;</div><div class='ctx'>   34		}</div><div class='ctx'>   35</div><div class='ctx'>   36		ret = em_dev_update_perf_domain(dev, em_table);</div><div class='ctx'>   37		if (ret) {</div><div class='ctx'>   38			dev_warn(dev, "EM: update failed %d\n", ret);</div><div class='del'>-  39			em_free_table(em_table);</div><div class='add'>+  39			em_table_free(em_table);</div><div class='ctx'>   40			return;</div><div class='ctx'>   41		}</div><div class='ctx'>   42</div><div class='head'>diff --git a/Documentation/power/runtime_pm.rst b/Documentation/power/runtime_pm.rst<br/>index 12f429359a82..63344bea8393 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/power/runtime_pm.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/power/runtime_pm.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/power/runtime_pm.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/power/runtime_pm.rst</a></div><div class='hunk'>@@ -154,7 +154,7 @@ suspending the device are satisfied) and to queue up a suspend request for the</div><div class='ctx'> device in that case.  If there is no idle callback, or if the callback returns</div><div class='ctx'> 0, then the PM core will attempt to carry out a runtime suspend of the device,</div><div class='ctx'> also respecting devices configured for autosuspend.  In essence this means a</div><div class='del'>-call to __pm_runtime_autosuspend() (do note that drivers needs to update the</div><div class='add'>+call to pm_runtime_autosuspend() (do note that drivers needs to update the</div><div class='ctx'> device last busy mark, pm_runtime_mark_last_busy(), to control the delay under</div><div class='ctx'> this circumstance).  To prevent this (for example, if the callback routine has</div><div class='ctx'> started a delayed suspend), the routine must return a non-zero value.  Negative</div><div class='head'>diff --git a/Documentation/process/1.Intro.rst b/Documentation/process/1.Intro.rst<br/>index c3d0270bbfb3..25ca49f7ae4d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/1.Intro.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/process/1.Intro.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/1.Intro.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/process/1.Intro.rst</a></div><div class='hunk'>@@ -251,12 +251,12 @@ there is no prospect of a migration to version 3 of the GPL in the</div><div class='ctx'> foreseeable future.</div><div class='ctx'> </div><div class='ctx'> It is imperative that all code contributed to the kernel be legitimately</div><div class='del'>-free software.  For that reason, code from anonymous (or pseudonymous)</div><div class='del'>-contributors will not be accepted.  All contributors are required to "sign</div><div class='del'>-off" on their code, stating that the code can be distributed with the</div><div class='del'>-kernel under the GPL.  Code which has not been licensed as free software by</div><div class='del'>-its owner, or which risks creating copyright-related problems for the</div><div class='del'>-kernel (such as code which derives from reverse-engineering efforts lacking</div><div class='add'>+free software.  For that reason, code from contributors without a known</div><div class='add'>+identity or anonymous contributors will not be accepted. All contributors are</div><div class='add'>+required to "sign off" on their code, stating that the code can be distributed</div><div class='add'>+with the kernel under the GPL.  Code which has not been licensed as free</div><div class='add'>+software by its owner, or which risks creating copyright-related problems for</div><div class='add'>+the kernel (such as code which derives from reverse-engineering efforts lacking</div><div class='ctx'> proper safeguards) cannot be contributed.</div><div class='ctx'> </div><div class='ctx'> Questions about copyright-related issues are common on Linux development</div><div class='head'>diff --git a/Documentation/process/adding-syscalls.rst b/Documentation/process/adding-syscalls.rst<br/>index 906c47f1a9e5..fc0b0bbcd34d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/adding-syscalls.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/process/adding-syscalls.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/adding-syscalls.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/process/adding-syscalls.rst</a></div><div class='hunk'>@@ -248,6 +248,52 @@ To summarize, you need a commit that includes:</div><div class='ctx'>  - fallback stub in ``kernel/sys_ni.c``</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+.. _syscall_generic_6_11:</div><div class='add'>+</div><div class='add'>+Since 6.11</div><div class='add'>+~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Starting with kernel version 6.11, general system call implementation for the</div><div class='add'>+following architectures no longer requires modifications to</div><div class='add'>+``include/uapi/asm-generic/unistd.h``:</div><div class='add'>+</div><div class='add'>+ - arc</div><div class='add'>+ - arm64</div><div class='add'>+ - csky</div><div class='add'>+ - hexagon</div><div class='add'>+ - loongarch</div><div class='add'>+ - nios2</div><div class='add'>+ - openrisc</div><div class='add'>+ - riscv</div><div class='add'>+</div><div class='add'>+Instead, you need to update ``scripts/syscall.tbl`` and, if applicable, adjust</div><div class='add'>+``arch/*/kernel/Makefile.syscalls``.</div><div class='add'>+</div><div class='add'>+As ``scripts/syscall.tbl`` serves as a common syscall table across multiple</div><div class='add'>+architectures, a new entry is required in this table::</div><div class='add'>+</div><div class='add'>+    468   common   xyzzy     sys_xyzzy</div><div class='add'>+</div><div class='add'>+Note that adding an entry to ``scripts/syscall.tbl`` with the "common" ABI</div><div class='add'>+also affects all architectures that share this table. For more limited or</div><div class='add'>+architecture-specific changes, consider using an architecture-specific ABI or</div><div class='add'>+defining a new one.</div><div class='add'>+</div><div class='add'>+If a new ABI, say ``xyz``, is introduced, the corresponding updates should be</div><div class='add'>+made to ``arch/*/kernel/Makefile.syscalls`` as well::</div><div class='add'>+</div><div class='add'>+    syscall_abis_{32,64} += xyz (...)</div><div class='add'>+</div><div class='add'>+To summarize, you need a commit that includes:</div><div class='add'>+</div><div class='add'>+ - ``CONFIG`` option for the new function, normally in ``init/Kconfig``</div><div class='add'>+ - ``SYSCALL_DEFINEn(xyzzy, ...)`` for the entry point</div><div class='add'>+ - corresponding prototype in ``include/linux/syscalls.h``</div><div class='add'>+ - new entry in ``scripts/syscall.tbl``</div><div class='add'>+ - (if needed) Makefile updates in ``arch/*/kernel/Makefile.syscalls``</div><div class='add'>+ - fallback stub in ``kernel/sys_ni.c``</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> x86 System Call Implementation</div><div class='ctx'> ------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -353,6 +399,41 @@ To summarize, you need:</div><div class='ctx'>    ``include/uapi/asm-generic/unistd.h``</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Since 6.11</div><div class='add'>+~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+This applies to all the architectures listed in :ref:`Since 6.11&lt;syscall_generic_6_11&gt;`</div><div class='add'>+under "Generic System Call Implementation", except arm64. See</div><div class='add'>+:ref:`Compatibility System Calls (arm64)&lt;compat_arm64&gt;` for more information.</div><div class='add'>+</div><div class='add'>+You need to extend the entry in ``scripts/syscall.tbl`` with an extra column</div><div class='add'>+to indicate that a 32-bit userspace program running on a 64-bit kernel should</div><div class='add'>+hit the compat entry point::</div><div class='add'>+</div><div class='add'>+    468   common     xyzzy     sys_xyzzy    compat_sys_xyzzy</div><div class='add'>+</div><div class='add'>+To summarize, you need:</div><div class='add'>+</div><div class='add'>+ - ``COMPAT_SYSCALL_DEFINEn(xyzzy, ...)`` for the compat entry point</div><div class='add'>+ - corresponding prototype in ``include/linux/compat.h``</div><div class='add'>+ - modification of the entry in ``scripts/syscall.tbl`` to include an extra</div><div class='add'>+   "compat" column</div><div class='add'>+ - (if needed) 32-bit mapping struct in ``include/linux/compat.h``</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. _compat_arm64:</div><div class='add'>+</div><div class='add'>+Compatibility System Calls (arm64)</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+On arm64, there is a dedicated syscall table for compatibility system calls</div><div class='add'>+targeting 32-bit (AArch32) userspace: ``arch/arm64/tools/syscall_32.tbl``.</div><div class='add'>+You need to add an additional line to this table specifying the compat</div><div class='add'>+entry point::</div><div class='add'>+</div><div class='add'>+    468   common     xyzzy     sys_xyzzy    compat_sys_xyzzy</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Compatibility System Calls (x86)</div><div class='ctx'> --------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -575,3 +656,6 @@ References and Sources</div><div class='ctx'>  - Recommendation from Linus Torvalds that x32 system calls should prefer</div><div class='ctx'>    compatibility with 64-bit versions rather than 32-bit versions:</div><div class='ctx'>    https://lore.kernel.org/r/CA+55aFxfmwfB7jbbrXxa=K7VBYPfAvmu3XOkGrLbB1UFjX1+Ew@mail.gmail.com</div><div class='add'>+ - Patch series revising system call table infrastructure to use</div><div class='add'>+   scripts/syscall.tbl across multiple architectures:</div><div class='add'>+   https://lore.kernel.org/lkml/20240704143611.2979589-1-arnd@kernel.org</div><div class='head'>diff --git a/Documentation/process/debugging/driver_development_debugging_guide.rst b/Documentation/process/debugging/driver_development_debugging_guide.rst<br/>index 46becda8764b..aca08f457793 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/debugging/driver_development_debugging_guide.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/process/debugging/driver_development_debugging_guide.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/debugging/driver_development_debugging_guide.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/process/debugging/driver_development_debugging_guide.rst</a></div><div class='hunk'>@@ -155,7 +155,7 @@ The general idea is:</div><div class='ctx'>     ``my_variable``</div><div class='ctx'> </div><div class='ctx'> - Clean up the directory when removing the device</div><div class='del'>-  (``debugfs_remove_recursive(parent);``)</div><div class='add'>+  (``debugfs_remove(parent);``)</div><div class='ctx'> </div><div class='ctx'> For the full documentation see :doc:`/filesystems/debugfs`.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/process/embargoed-hardware-issues.rst b/Documentation/process/embargoed-hardware-issues.rst<br/>index 0e19d2f0d6bb..da6bf0f6d01e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/process/embargoed-hardware-issues.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/process/embargoed-hardware-issues.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/process/embargoed-hardware-issues.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/process/embargoed-hardware-issues.rst</a></div><div class='hunk'>@@ -290,7 +290,6 @@ an involved disclosed party. The current ambassadors list:</div><div class='ctx'>   AMD		Tom Lendacky &lt;thomas.lendacky@amd.com&gt;</div><div class='ctx'>   Ampere	Darren Hart &lt;darren@os.amperecomputing.com&gt;</div><div class='ctx'>   ARM		Catalin Marinas &lt;catalin.marinas@arm.com&gt;</div><div class='del'>-  IBM Power	Michael Ellerman &lt;ellerman@au.ibm.com&gt;</div><div class='ctx'>   IBM Z		Christian Borntraeger &lt;borntraeger@de.ibm.com&gt;</div><div class='ctx'>   Intel		Tony Luck &lt;tony.luck@intel.com&gt;</div><div class='ctx'>   Qualcomm	Trilok Soni &lt;quic_tsoni@quicinc.com&gt;</div><div class='head'>diff --git a/Documentation/scheduler/sched-ext.rst b/Documentation/scheduler/sched-ext.rst<br/>index 0b2654e2164b..a1869c38046e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-ext.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/scheduler/sched-ext.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-ext.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/scheduler/sched-ext.rst</a></div><div class='hunk'>@@ -1,3 +1,5 @@</div><div class='add'>+.. _sched-ext:</div><div class='add'>+</div><div class='ctx'> ==========================</div><div class='ctx'> Extensible Scheduler Class</div><div class='ctx'> ==========================</div><div class='hunk'>@@ -47,8 +49,8 @@ options should be enabled to use sched_ext:</div><div class='ctx'> sched_ext is used only when the BPF scheduler is loaded and running.</div><div class='ctx'> </div><div class='ctx'> If a task explicitly sets its scheduling policy to ``SCHED_EXT``, it will be</div><div class='del'>-treated as ``SCHED_NORMAL`` and scheduled by CFS until the BPF scheduler is</div><div class='del'>-loaded.</div><div class='add'>+treated as ``SCHED_NORMAL`` and scheduled by the fair-class scheduler until the</div><div class='add'>+BPF scheduler is loaded.</div><div class='ctx'> </div><div class='ctx'> When the BPF scheduler is loaded and ``SCX_OPS_SWITCH_PARTIAL`` is not set</div><div class='ctx'> in ``ops-&gt;flags``, all ``SCHED_NORMAL``, ``SCHED_BATCH``, ``SCHED_IDLE``, and</div><div class='hunk'>@@ -57,11 +59,11 @@ in ``ops-&gt;flags``, all ``SCHED_NORMAL``, ``SCHED_BATCH``, ``SCHED_IDLE``, and</div><div class='ctx'> However, when the BPF scheduler is loaded and ``SCX_OPS_SWITCH_PARTIAL`` is</div><div class='ctx'> set in ``ops-&gt;flags``, only tasks with the ``SCHED_EXT`` policy are scheduled</div><div class='ctx'> by sched_ext, while tasks with ``SCHED_NORMAL``, ``SCHED_BATCH`` and</div><div class='del'>-``SCHED_IDLE`` policies are scheduled by CFS.</div><div class='add'>+``SCHED_IDLE`` policies are scheduled by the fair-class scheduler.</div><div class='ctx'> </div><div class='ctx'> Terminating the sched_ext scheduler program, triggering `SysRq-S`, or</div><div class='ctx'> detection of any internal error including stalled runnable tasks aborts the</div><div class='del'>-BPF scheduler and reverts all tasks back to CFS.</div><div class='add'>+BPF scheduler and reverts all tasks back to the fair-class scheduler.</div><div class='ctx'> </div><div class='ctx'> .. code-block:: none</div><div class='ctx'> </div><div class='hunk'>@@ -197,8 +199,8 @@ Dispatch Queues</div><div class='ctx'> To match the impedance between the scheduler core and the BPF scheduler,</div><div class='ctx'> sched_ext uses DSQs (dispatch queues) which can operate as both a FIFO and a</div><div class='ctx'> priority queue. By default, there is one global FIFO (``SCX_DSQ_GLOBAL``),</div><div class='del'>-and one local dsq per CPU (``SCX_DSQ_LOCAL``). The BPF scheduler can manage</div><div class='del'>-an arbitrary number of dsq's using ``scx_bpf_create_dsq()`` and</div><div class='add'>+and one local DSQ per CPU (``SCX_DSQ_LOCAL``). The BPF scheduler can manage</div><div class='add'>+an arbitrary number of DSQs using ``scx_bpf_create_dsq()`` and</div><div class='ctx'> ``scx_bpf_destroy_dsq()``.</div><div class='ctx'> </div><div class='ctx'> A CPU always executes a task from its local DSQ. A task is "inserted" into a</div><div class='head'>diff --git a/Documentation/scheduler/sched-stats.rst b/Documentation/scheduler/sched-stats.rst<br/>index 08b6bc9a315c..d82e7d2b54f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-stats.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/scheduler/sched-stats.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/scheduler/sched-stats.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/scheduler/sched-stats.rst</a></div><div class='hunk'>@@ -135,7 +135,7 @@ of idleness (busy, idle and newly idle):</div><div class='ctx'>         cpu was idle but no busier group was found</div><div class='ctx'> </div><div class='ctx'>     23) # of times in this domain sched_balance_rq() was called when the</div><div class='del'>-        was just becoming idle</div><div class='add'>+        cpu was just becoming idle</div><div class='ctx'>     24) # of times in this domain sched_balance_rq() checked but found the</div><div class='ctx'>         load did not require balancing when the cpu was just becoming idle</div><div class='ctx'>     25) # of times in this domain sched_balance_rq() tried to move one or more</div><div class='head'>diff --git a/Documentation/scsi/scsi_mid_low_api.rst b/Documentation/scsi/scsi_mid_low_api.rst<br/>index 3cd6dce98e74..3ac4c7fafb55 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/scsi/scsi_mid_low_api.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/scsi/scsi_mid_low_api.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/scsi/scsi_mid_low_api.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/scsi/scsi_mid_low_api.rst</a></div><div class='hunk'>@@ -37,7 +37,7 @@ ISA adapters).]</div><div class='ctx'> The SCSI mid level isolates an LLD from other layers such as the SCSI</div><div class='ctx'> upper layer drivers and the block layer.</div><div class='ctx'> </div><div class='del'>-This version of the document roughly matches linux kernel version 2.6.8 .</div><div class='add'>+This version of the document roughly matches Linux kernel version 2.6.8 .</div><div class='ctx'> </div><div class='ctx'> Documentation</div><div class='ctx'> =============</div><div class='hunk'>@@ -48,7 +48,7 @@ found in that directory. A more recent copy of this document may be found</div><div class='ctx'> at https://docs.kernel.org/scsi/scsi_mid_low_api.html. Many LLDs are</div><div class='ctx'> documented in Documentation/scsi (e.g. aic7xxx.rst). The SCSI mid-level is</div><div class='ctx'> briefly described in scsi.rst which contains a URL to a document describing</div><div class='del'>-the SCSI subsystem in the Linux Kernel 2.4 series. Two upper level</div><div class='add'>+the SCSI subsystem in the Linux kernel 2.4 series. Two upper level</div><div class='ctx'> drivers have documents in that directory: st.rst (SCSI tape driver) and</div><div class='ctx'> scsi-generic.rst (for the sg driver).</div><div class='ctx'> </div><div class='hunk'>@@ -75,7 +75,7 @@ It is probably best to study how existing LLDs are organized.</div><div class='ctx'> As the 2.5 series development kernels evolve into the 2.6 series</div><div class='ctx'> production series, changes are being introduced into this interface. An</div><div class='ctx'> example of this is driver initialization code where there are now 2 models</div><div class='del'>-available. The older one, similar to what was found in the lk 2.4 series,</div><div class='add'>+available. The older one, similar to what was found in the Linux 2.4 series,</div><div class='ctx'> is based on hosts that are detected at HBA driver load time. This will be</div><div class='ctx'> referred to the "passive" initialization model. The newer model allows HBAs</div><div class='ctx'> to be hot plugged (and unplugged) during the lifetime of the LLD and will</div><div class='hunk'>@@ -1026,7 +1026,7 @@ initialized from the driver's struct scsi_host_template instance. Members</div><div class='ctx'> of interest:</div><div class='ctx'> </div><div class='ctx'>     host_no</div><div class='del'>-		 - system wide unique number that is used for identifying</div><div class='add'>+		 - system-wide unique number that is used for identifying</div><div class='ctx'>                    this host. Issued in ascending order from 0.</div><div class='ctx'>     can_queue</div><div class='ctx'> 		 - must be greater than 0; do not send more than can_queue</div><div class='hunk'>@@ -1053,7 +1053,7 @@ of interest:</div><div class='ctx'> 		 - pointer to driver's struct scsi_host_template from which</div><div class='ctx'>                    this struct Scsi_Host instance was spawned</div><div class='ctx'>     hostt-&gt;proc_name</div><div class='del'>-		 - name of LLD. This is the driver name that sysfs uses</div><div class='add'>+		 - name of LLD. This is the driver name that sysfs uses.</div><div class='ctx'>     transportt</div><div class='ctx'> 		 - pointer to driver's struct scsi_transport_template instance</div><div class='ctx'>                    (if any). FC and SPI transports currently supported.</div><div class='hunk'>@@ -1067,7 +1067,7 @@ The scsi_host structure is defined in include/scsi/scsi_host.h</div><div class='ctx'> struct scsi_device</div><div class='ctx'> ------------------</div><div class='ctx'> Generally, there is one instance of this structure for each SCSI logical unit</div><div class='del'>-on a host. Scsi devices connected to a host are uniquely identified by a</div><div class='add'>+on a host. SCSI devices connected to a host are uniquely identified by a</div><div class='ctx'> channel number, target id and logical unit number (lun).</div><div class='ctx'> The structure is defined in include/scsi/scsi_device.h</div><div class='ctx'> </div><div class='hunk'>@@ -1091,7 +1091,7 @@ Members of interest:</div><div class='ctx'> 		 - should be set by LLD prior to calling 'done'. A value</div><div class='ctx'>                    of 0 implies a successfully completed command (and all</div><div class='ctx'>                    data (if any) has been transferred to or from the SCSI</div><div class='del'>-                   target device). 'result' is a 32 bit unsigned integer that</div><div class='add'>+                   target device). 'result' is a 32-bit unsigned integer that</div><div class='ctx'>                    can be viewed as 2 related bytes. The SCSI status value is</div><div class='ctx'>                    in the LSB. See include/scsi/scsi.h status_byte() and</div><div class='ctx'>                    host_byte() macros and related constants.</div><div class='hunk'>@@ -1180,8 +1180,8 @@ may get out of synchronization. This is why it is best for the LLD</div><div class='ctx'> to perform autosense.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Changes since lk 2.4 series</div><div class='del'>-===========================</div><div class='add'>+Changes since Linux kernel 2.4 series</div><div class='add'>+=====================================</div><div class='ctx'> io_request_lock has been replaced by several finer grained locks. The lock</div><div class='ctx'> relevant to LLDs is struct Scsi_Host::host_lock and there is</div><div class='ctx'> one per SCSI host.</div><div class='head'>diff --git a/Documentation/sphinx/automarkup.py b/Documentation/sphinx/automarkup.py<br/>index ecf54d22e9dc..fd633f7a0bc3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/sphinx/automarkup.py?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/sphinx/automarkup.py</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/sphinx/automarkup.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/sphinx/automarkup.py</a></div><div class='hunk'>@@ -128,13 +128,8 @@ def note_failure(target):</div><div class='ctx'> # own C role, but both match the same regex, so we try both.</div><div class='ctx'> #</div><div class='ctx'> def markup_func_ref_sphinx3(docname, app, match):</div><div class='del'>-    cdom = app.env.domains['c']</div><div class='del'>-    #</div><div class='del'>-    # Go through the dance of getting an xref out of the C domain</div><div class='del'>-    #</div><div class='ctx'>     base_target = match.group(2)</div><div class='ctx'>     target_text = nodes.Text(match.group(0))</div><div class='del'>-    xref = None</div><div class='ctx'>     possible_targets = [base_target]</div><div class='ctx'>     # Check if this document has a namespace, and if so, try</div><div class='ctx'>     # cross-referencing inside it first.</div><div class='hunk'>@@ -146,22 +141,8 @@ def markup_func_ref_sphinx3(docname, app, match):</div><div class='ctx'>             if (target not in Skipfuncs) and not failure_seen(target):</div><div class='ctx'>                 lit_text = nodes.literal(classes=['xref', 'c', 'c-func'])</div><div class='ctx'>                 lit_text += target_text</div><div class='del'>-                pxref = addnodes.pending_xref('', refdomain = 'c',</div><div class='del'>-                                              reftype = 'function',</div><div class='del'>-                                              reftarget = target,</div><div class='del'>-                                              modname = None,</div><div class='del'>-                                              classname = None)</div><div class='del'>-                #</div><div class='del'>-                # XXX The Latex builder will throw NoUri exceptions here,</div><div class='del'>-                # work around that by ignoring them.</div><div class='del'>-                #</div><div class='del'>-                try:</div><div class='del'>-                    xref = cdom.resolve_xref(app.env, docname, app.builder,</div><div class='del'>-                                             'function', target, pxref,</div><div class='del'>-                                             lit_text)</div><div class='del'>-                except NoUri:</div><div class='del'>-                    xref = None</div><div class='del'>-</div><div class='add'>+                xref = add_and_resolve_xref(app, docname, 'c', 'function',</div><div class='add'>+                                            target, contnode=lit_text)</div><div class='ctx'>                 if xref:</div><div class='ctx'>                     return xref</div><div class='ctx'>                 note_failure(target)</div><div class='hunk'>@@ -188,13 +169,8 @@ def markup_c_ref(docname, app, match):</div><div class='ctx'>                    RE_typedef: 'type',</div><div class='ctx'>                    }</div><div class='ctx'> </div><div class='del'>-    cdom = app.env.domains['c']</div><div class='del'>-    #</div><div class='del'>-    # Go through the dance of getting an xref out of the C domain</div><div class='del'>-    #</div><div class='ctx'>     base_target = match.group(2)</div><div class='ctx'>     target_text = nodes.Text(match.group(0))</div><div class='del'>-    xref = None</div><div class='ctx'>     possible_targets = [base_target]</div><div class='ctx'>     # Check if this document has a namespace, and if so, try</div><div class='ctx'>     # cross-referencing inside it first.</div><div class='hunk'>@@ -206,21 +182,9 @@ def markup_c_ref(docname, app, match):</div><div class='ctx'>             if not (match.re == RE_function and target in Skipfuncs):</div><div class='ctx'>                 lit_text = nodes.literal(classes=['xref', 'c', class_str[match.re]])</div><div class='ctx'>                 lit_text += target_text</div><div class='del'>-                pxref = addnodes.pending_xref('', refdomain = 'c',</div><div class='del'>-                                              reftype = reftype_str[match.re],</div><div class='del'>-                                              reftarget = target, modname = None,</div><div class='del'>-                                              classname = None)</div><div class='del'>-                #</div><div class='del'>-                # XXX The Latex builder will throw NoUri exceptions here,</div><div class='del'>-                # work around that by ignoring them.</div><div class='del'>-                #</div><div class='del'>-                try:</div><div class='del'>-                    xref = cdom.resolve_xref(app.env, docname, app.builder,</div><div class='del'>-                                             reftype_str[match.re], target, pxref,</div><div class='del'>-                                             lit_text)</div><div class='del'>-                except NoUri:</div><div class='del'>-                    xref = None</div><div class='del'>-</div><div class='add'>+                xref = add_and_resolve_xref(app, docname, 'c',</div><div class='add'>+                                            reftype_str[match.re], target,</div><div class='add'>+                                            contnode=lit_text)</div><div class='ctx'>                 if xref:</div><div class='ctx'>                     return xref</div><div class='ctx'> </div><div class='hunk'>@@ -231,30 +195,12 @@ def markup_c_ref(docname, app, match):</div><div class='ctx'> # cross reference to that page</div><div class='ctx'> #</div><div class='ctx'> def markup_doc_ref(docname, app, match):</div><div class='del'>-    stddom = app.env.domains['std']</div><div class='del'>-    #</div><div class='del'>-    # Go through the dance of getting an xref out of the std domain</div><div class='del'>-    #</div><div class='ctx'>     absolute = match.group(1)</div><div class='ctx'>     target = match.group(2)</div><div class='ctx'>     if absolute:</div><div class='ctx'>        target = "/" + target</div><div class='del'>-    xref = None</div><div class='del'>-    pxref = addnodes.pending_xref('', refdomain = 'std', reftype = 'doc',</div><div class='del'>-                                  reftarget = target, modname = None,</div><div class='del'>-                                  classname = None, refexplicit = False)</div><div class='del'>-    #</div><div class='del'>-    # XXX The Latex builder will throw NoUri exceptions here,</div><div class='del'>-    # work around that by ignoring them.</div><div class='del'>-    #</div><div class='del'>-    try:</div><div class='del'>-        xref = stddom.resolve_xref(app.env, docname, app.builder, 'doc',</div><div class='del'>-                                   target, pxref, None)</div><div class='del'>-    except NoUri:</div><div class='del'>-        xref = None</div><div class='del'>-    #</div><div class='del'>-    # Return the xref if we got it; otherwise just return the plain text.</div><div class='del'>-    #</div><div class='add'>+</div><div class='add'>+    xref = add_and_resolve_xref(app, docname, 'std', 'doc', target)</div><div class='ctx'>     if xref:</div><div class='ctx'>         return xref</div><div class='ctx'>     else:</div><div class='hunk'>@@ -265,10 +211,6 @@ def markup_doc_ref(docname, app, match):</div><div class='ctx'> # with a cross reference to that page</div><div class='ctx'> #</div><div class='ctx'> def markup_abi_ref(docname, app, match, warning=False):</div><div class='del'>-    stddom = app.env.domains['std']</div><div class='del'>-    #</div><div class='del'>-    # Go through the dance of getting an xref out of the std domain</div><div class='del'>-    #</div><div class='ctx'>     kernel_abi = get_kernel_abi()</div><div class='ctx'> </div><div class='ctx'>     fname = match.group(1)</div><div class='hunk'>@@ -280,7 +222,18 @@ def markup_abi_ref(docname, app, match, warning=False):</div><div class='ctx'>             kernel_abi.log.warning("%s not found", fname)</div><div class='ctx'>         return nodes.Text(match.group(0))</div><div class='ctx'> </div><div class='del'>-    pxref = addnodes.pending_xref('', refdomain = 'std', reftype = 'ref',</div><div class='add'>+    xref = add_and_resolve_xref(app, docname, 'std', 'ref', target)</div><div class='add'>+    if xref:</div><div class='add'>+        return xref</div><div class='add'>+    else:</div><div class='add'>+        return nodes.Text(match.group(0))</div><div class='add'>+</div><div class='add'>+def add_and_resolve_xref(app, docname, domain, reftype, target, contnode=None):</div><div class='add'>+    #</div><div class='add'>+    # Go through the dance of getting an xref out of the corresponding domain</div><div class='add'>+    #</div><div class='add'>+    dom_obj = app.env.domains[domain]</div><div class='add'>+    pxref = addnodes.pending_xref('', refdomain = domain, reftype = reftype,</div><div class='ctx'>                                   reftarget = target, modname = None,</div><div class='ctx'>                                   classname = None, refexplicit = False)</div><div class='ctx'> </div><div class='hunk'>@@ -289,17 +242,15 @@ def markup_abi_ref(docname, app, match, warning=False):</div><div class='ctx'>     # work around that by ignoring them.</div><div class='ctx'>     #</div><div class='ctx'>     try:</div><div class='del'>-        xref = stddom.resolve_xref(app.env, docname, app.builder, 'ref',</div><div class='del'>-                                   target, pxref, None)</div><div class='add'>+        xref = dom_obj.resolve_xref(app.env, docname, app.builder, reftype,</div><div class='add'>+                                    target, pxref, contnode)</div><div class='ctx'>     except NoUri:</div><div class='ctx'>         xref = None</div><div class='del'>-    #</div><div class='del'>-    # Return the xref if we got it; otherwise just return the plain text.</div><div class='del'>-    #</div><div class='add'>+</div><div class='ctx'>     if xref:</div><div class='ctx'>         return xref</div><div class='del'>-    else:</div><div class='del'>-        return nodes.Text(match.group(0))</div><div class='add'>+</div><div class='add'>+    return None</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Variant of markup_abi_ref() that warns whan a reference is not found</div><div class='head'>diff --git a/Documentation/sphinx/kerneldoc.py b/Documentation/sphinx/kerneldoc.py<br/>index 39ddae6ae7dd..b818d4c77924 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/sphinx/kerneldoc.py?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/sphinx/kerneldoc.py</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/sphinx/kerneldoc.py?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/sphinx/kerneldoc.py</a></div><div class='hunk'>@@ -40,8 +40,40 @@ from docutils.parsers.rst import directives, Directive</div><div class='ctx'> import sphinx</div><div class='ctx'> from sphinx.util.docutils import switch_source_input</div><div class='ctx'> from sphinx.util import logging</div><div class='add'>+from pprint import pformat</div><div class='add'>+</div><div class='add'>+srctree = os.path.abspath(os.environ["srctree"])</div><div class='add'>+sys.path.insert(0, os.path.join(srctree, "scripts/lib/kdoc"))</div><div class='add'>+</div><div class='add'>+from kdoc_files import KernelFiles</div><div class='add'>+from kdoc_output import RestFormat</div><div class='ctx'> </div><div class='ctx'> __version__  = '1.0'</div><div class='add'>+kfiles = None</div><div class='add'>+logger = logging.getLogger(__name__)</div><div class='add'>+</div><div class='add'>+def cmd_str(cmd):</div><div class='add'>+    """</div><div class='add'>+    Helper function to output a command line that can be used to produce</div><div class='add'>+    the same records via command line. Helpful to debug troubles at the</div><div class='add'>+    script.</div><div class='add'>+    """</div><div class='add'>+</div><div class='add'>+    cmd_line = ""</div><div class='add'>+</div><div class='add'>+    for w in cmd:</div><div class='add'>+        if w == "" or " " in w:</div><div class='add'>+            esc_cmd = "'" + w + "'"</div><div class='add'>+        else:</div><div class='add'>+            esc_cmd = w</div><div class='add'>+</div><div class='add'>+        if cmd_line:</div><div class='add'>+            cmd_line += " " + esc_cmd</div><div class='add'>+            continue</div><div class='add'>+        else:</div><div class='add'>+            cmd_line = esc_cmd</div><div class='add'>+</div><div class='add'>+    return cmd_line</div><div class='ctx'> </div><div class='ctx'> class KernelDocDirective(Directive):</div><div class='ctx'>     """Extract kernel-doc comments from the specified file"""</div><div class='hunk'>@@ -56,19 +88,48 @@ class KernelDocDirective(Directive):</div><div class='ctx'>         'functions': directives.unchanged,</div><div class='ctx'>     }</div><div class='ctx'>     has_content = False</div><div class='del'>-    logger = logging.getLogger('kerneldoc')</div><div class='add'>+    verbose = 0</div><div class='add'>+</div><div class='add'>+    parse_args = {}</div><div class='add'>+    msg_args = {}</div><div class='add'>+</div><div class='add'>+    def handle_args(self):</div><div class='ctx'> </div><div class='del'>-    def run(self):</div><div class='ctx'>         env = self.state.document.settings.env</div><div class='ctx'>         cmd = [env.config.kerneldoc_bin, '-rst', '-enable-lineno']</div><div class='ctx'> </div><div class='ctx'>         filename = env.config.kerneldoc_srctree + '/' + self.arguments[0]</div><div class='add'>+</div><div class='add'>+        # Arguments used by KernelFiles.parse() function</div><div class='add'>+        self.parse_args = {</div><div class='add'>+            "file_list": [filename],</div><div class='add'>+            "export_file": []</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        # Arguments used by KernelFiles.msg() function</div><div class='add'>+        self.msg_args = {</div><div class='add'>+            "enable_lineno": True,</div><div class='add'>+            "export": False,</div><div class='add'>+            "internal": False,</div><div class='add'>+            "symbol": [],</div><div class='add'>+            "nosymbol": [],</div><div class='add'>+            "no_doc_sections": False</div><div class='add'>+        }</div><div class='add'>+</div><div class='ctx'>         export_file_patterns = []</div><div class='ctx'> </div><div class='add'>+        verbose = os.environ.get("V")</div><div class='add'>+        if verbose:</div><div class='add'>+            try:</div><div class='add'>+                self.verbose = int(verbose)</div><div class='add'>+            except ValueError:</div><div class='add'>+                pass</div><div class='add'>+</div><div class='ctx'>         # Tell sphinx of the dependency</div><div class='ctx'>         env.note_dependency(os.path.abspath(filename))</div><div class='ctx'> </div><div class='del'>-        tab_width = self.options.get('tab-width', self.state.document.settings.tab_width)</div><div class='add'>+        self.tab_width = self.options.get('tab-width',</div><div class='add'>+                                          self.state.document.settings.tab_width)</div><div class='ctx'> </div><div class='ctx'>         # 'function' is an alias of 'identifiers'</div><div class='ctx'>         if 'functions' in self.options:</div><div class='hunk'>@@ -77,80 +138,166 @@ class KernelDocDirective(Directive):</div><div class='ctx'>         # FIXME: make this nicer and more robust against errors</div><div class='ctx'>         if 'export' in self.options:</div><div class='ctx'>             cmd += ['-export']</div><div class='add'>+            self.msg_args["export"] = True</div><div class='ctx'>             export_file_patterns = str(self.options.get('export')).split()</div><div class='ctx'>         elif 'internal' in self.options:</div><div class='ctx'>             cmd += ['-internal']</div><div class='add'>+            self.msg_args["internal"] = True</div><div class='ctx'>             export_file_patterns = str(self.options.get('internal')).split()</div><div class='ctx'>         elif 'doc' in self.options:</div><div class='del'>-            cmd += ['-function', str(self.options.get('doc'))]</div><div class='add'>+            func = str(self.options.get('doc'))</div><div class='add'>+            cmd += ['-function', func]</div><div class='add'>+            self.msg_args["symbol"].append(func)</div><div class='ctx'>         elif 'identifiers' in self.options:</div><div class='ctx'>             identifiers = self.options.get('identifiers').split()</div><div class='ctx'>             if identifiers:</div><div class='ctx'>                 for i in identifiers:</div><div class='add'>+                    i = i.rstrip("\\").strip()</div><div class='add'>+                    if not i:</div><div class='add'>+                        continue</div><div class='add'>+</div><div class='ctx'>                     cmd += ['-function', i]</div><div class='add'>+                    self.msg_args["symbol"].append(i)</div><div class='ctx'>             else:</div><div class='ctx'>                 cmd += ['-no-doc-sections']</div><div class='add'>+                self.msg_args["no_doc_sections"] = True</div><div class='ctx'> </div><div class='ctx'>         if 'no-identifiers' in self.options:</div><div class='ctx'>             no_identifiers = self.options.get('no-identifiers').split()</div><div class='ctx'>             if no_identifiers:</div><div class='ctx'>                 for i in no_identifiers:</div><div class='add'>+                    i = i.rstrip("\\").strip()</div><div class='add'>+                    if not i:</div><div class='add'>+                        continue</div><div class='add'>+</div><div class='ctx'>                     cmd += ['-nosymbol', i]</div><div class='add'>+                    self.msg_args["nosymbol"].append(i)</div><div class='ctx'> </div><div class='ctx'>         for pattern in export_file_patterns:</div><div class='add'>+            pattern = pattern.rstrip("\\").strip()</div><div class='add'>+            if not pattern:</div><div class='add'>+                continue</div><div class='add'>+</div><div class='ctx'>             for f in glob.glob(env.config.kerneldoc_srctree + '/' + pattern):</div><div class='ctx'>                 env.note_dependency(os.path.abspath(f))</div><div class='ctx'>                 cmd += ['-export-file', f]</div><div class='add'>+                self.parse_args["export_file"].append(f)</div><div class='add'>+</div><div class='add'>+            # Export file is needed by both parse and msg, as kernel-doc</div><div class='add'>+            # cache exports.</div><div class='add'>+            self.msg_args["export_file"] = self.parse_args["export_file"]</div><div class='ctx'> </div><div class='ctx'>         cmd += [filename]</div><div class='ctx'> </div><div class='del'>-        try:</div><div class='del'>-            self.logger.verbose("calling kernel-doc '%s'" % (" ".join(cmd)))</div><div class='add'>+        return cmd</div><div class='add'>+</div><div class='add'>+    def run_cmd(self, cmd):</div><div class='add'>+        """</div><div class='add'>+        Execute an external kernel-doc command.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        env = self.state.document.settings.env</div><div class='add'>+        node = nodes.section()</div><div class='add'>+</div><div class='add'>+        p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)</div><div class='add'>+        out, err = p.communicate()</div><div class='ctx'> </div><div class='del'>-            p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)</div><div class='del'>-            out, err = p.communicate()</div><div class='add'>+        out, err = codecs.decode(out, 'utf-8'), codecs.decode(err, 'utf-8')</div><div class='ctx'> </div><div class='del'>-            out, err = codecs.decode(out, 'utf-8'), codecs.decode(err, 'utf-8')</div><div class='add'>+        if p.returncode != 0:</div><div class='add'>+            sys.stderr.write(err)</div><div class='ctx'> </div><div class='del'>-            if p.returncode != 0:</div><div class='del'>-                sys.stderr.write(err)</div><div class='add'>+            logger.warning("kernel-doc '%s' failed with return code %d"</div><div class='add'>+                                % (" ".join(cmd), p.returncode))</div><div class='add'>+            return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))]</div><div class='add'>+        elif env.config.kerneldoc_verbosity &gt; 0:</div><div class='add'>+            sys.stderr.write(err)</div><div class='add'>+</div><div class='add'>+        filenames = self.parse_args["file_list"]</div><div class='add'>+        for filename in filenames:</div><div class='add'>+            self.parse_msg(filename, node, out, cmd)</div><div class='add'>+</div><div class='add'>+        return node.children</div><div class='add'>+</div><div class='add'>+    def parse_msg(self, filename, node, out, cmd):</div><div class='add'>+        """</div><div class='add'>+        Handles a kernel-doc output for a given file</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        env = self.state.document.settings.env</div><div class='ctx'> </div><div class='del'>-                self.logger.warning("kernel-doc '%s' failed with return code %d"</div><div class='del'>-                                    % (" ".join(cmd), p.returncode))</div><div class='del'>-                return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))]</div><div class='del'>-            elif env.config.kerneldoc_verbosity &gt; 0:</div><div class='del'>-                sys.stderr.write(err)</div><div class='add'>+        lines = statemachine.string2lines(out, self.tab_width,</div><div class='add'>+                                            convert_whitespace=True)</div><div class='add'>+        result = ViewList()</div><div class='add'>+</div><div class='add'>+        lineoffset = 0;</div><div class='add'>+        line_regex = re.compile(r"^\.\. LINENO ([0-9]+)$")</div><div class='add'>+        for line in lines:</div><div class='add'>+            match = line_regex.search(line)</div><div class='add'>+            if match:</div><div class='add'>+                # sphinx counts lines from 0</div><div class='add'>+                lineoffset = int(match.group(1)) - 1</div><div class='add'>+                # we must eat our comments since the upset the markup</div><div class='add'>+            else:</div><div class='add'>+                doc = str(env.srcdir) + "/" + env.docname + ":" + str(self.lineno)</div><div class='add'>+                result.append(line, doc + ": " + filename, lineoffset)</div><div class='add'>+                lineoffset += 1</div><div class='add'>+</div><div class='add'>+        self.do_parse(result, node)</div><div class='add'>+</div><div class='add'>+    def run_kdoc(self, cmd, kfiles):</div><div class='add'>+        """</div><div class='add'>+        Execute kernel-doc classes directly instead of running as a separate</div><div class='add'>+        command.</div><div class='add'>+        """</div><div class='add'>+</div><div class='add'>+        env = self.state.document.settings.env</div><div class='ctx'> </div><div class='del'>-            lines = statemachine.string2lines(out, tab_width, convert_whitespace=True)</div><div class='del'>-            result = ViewList()</div><div class='add'>+        node = nodes.section()</div><div class='ctx'> </div><div class='del'>-            lineoffset = 0;</div><div class='del'>-            line_regex = re.compile(r"^\.\. LINENO ([0-9]+)$")</div><div class='del'>-            for line in lines:</div><div class='del'>-                match = line_regex.search(line)</div><div class='del'>-                if match:</div><div class='del'>-                    # sphinx counts lines from 0</div><div class='del'>-                    lineoffset = int(match.group(1)) - 1</div><div class='del'>-                    # we must eat our comments since the upset the markup</div><div class='del'>-                else:</div><div class='del'>-                    doc = str(env.srcdir) + "/" + env.docname + ":" + str(self.lineno)</div><div class='del'>-                    result.append(line, doc + ": " + filename, lineoffset)</div><div class='del'>-                    lineoffset += 1</div><div class='add'>+        kfiles.parse(**self.parse_args)</div><div class='add'>+        filenames = self.parse_args["file_list"]</div><div class='ctx'> </div><div class='del'>-            node = nodes.section()</div><div class='del'>-            self.do_parse(result, node)</div><div class='add'>+        for filename, out in kfiles.msg(**self.msg_args, filenames=filenames):</div><div class='add'>+            self.parse_msg(filename, node, out, cmd)</div><div class='ctx'> </div><div class='del'>-            return node.children</div><div class='add'>+        return node.children</div><div class='add'>+</div><div class='add'>+    def run(self):</div><div class='add'>+        global kfiles</div><div class='add'>+</div><div class='add'>+        cmd = self.handle_args()</div><div class='add'>+        if self.verbose &gt;= 1:</div><div class='add'>+            logger.info(cmd_str(cmd))</div><div class='add'>+</div><div class='add'>+        try:</div><div class='add'>+            if kfiles:</div><div class='add'>+                return self.run_kdoc(cmd, kfiles)</div><div class='add'>+            else:</div><div class='add'>+                return self.run_cmd(cmd)</div><div class='ctx'> </div><div class='ctx'>         except Exception as e:  # pylint: disable=W0703</div><div class='del'>-            self.logger.warning("kernel-doc '%s' processing failed with: %s" %</div><div class='del'>-                                (" ".join(cmd), str(e)))</div><div class='add'>+            logger.warning("kernel-doc '%s' processing failed with: %s" %</div><div class='add'>+                           (cmd_str(cmd), pformat(e)))</div><div class='ctx'>             return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))]</div><div class='ctx'> </div><div class='ctx'>     def do_parse(self, result, node):</div><div class='ctx'>         with switch_source_input(self.state, result):</div><div class='ctx'>             self.state.nested_parse(result, 0, node, match_titles=1)</div><div class='ctx'> </div><div class='add'>+def setup_kfiles(app):</div><div class='add'>+    global kfiles</div><div class='add'>+</div><div class='add'>+    kerneldoc_bin = app.env.config.kerneldoc_bin</div><div class='add'>+</div><div class='add'>+    if kerneldoc_bin and kerneldoc_bin.endswith("kernel-doc.py"):</div><div class='add'>+        print("Using Python kernel-doc")</div><div class='add'>+        out_style = RestFormat()</div><div class='add'>+        kfiles = KernelFiles(out_style=out_style, logger=logger)</div><div class='add'>+    else:</div><div class='add'>+        print(f"Using {kerneldoc_bin}")</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> def setup(app):</div><div class='ctx'>     app.add_config_value('kerneldoc_bin', None, 'env')</div><div class='ctx'>     app.add_config_value('kerneldoc_srctree', None, 'env')</div><div class='hunk'>@@ -158,6 +305,8 @@ def setup(app):</div><div class='ctx'> </div><div class='ctx'>     app.add_directive('kernel-doc', KernelDocDirective)</div><div class='ctx'> </div><div class='add'>+    app.connect('builder-inited', setup_kfiles)</div><div class='add'>+</div><div class='ctx'>     return dict(</div><div class='ctx'>         version = __version__,</div><div class='ctx'>         parallel_read_safe = True,</div><div class='head'>diff --git a/Documentation/staging/speculation.rst b/Documentation/staging/speculation.rst<br/>index 8045d99bcf12..0d526ba55d14 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/staging/speculation.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/staging/speculation.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/staging/speculation.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/staging/speculation.rst</a></div><div class='hunk'>@@ -63,7 +63,6 @@ of an out-of-bounds address, while the second call will influence</div><div class='ctx'> microarchitectural state dependent on this value. This may provide an</div><div class='ctx'> arbitrary read primitive.</div><div class='ctx'> </div><div class='del'>-====================================</div><div class='ctx'> Mitigating speculation side-channels</div><div class='ctx'> ====================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/tools/rtla/common_timerlat_description.rst b/Documentation/tools/rtla/common_timerlat_description.rst<br/>index 321201cb8597..49fcae3ffdec 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/tools/rtla/common_timerlat_description.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/tools/rtla/common_timerlat_description.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/tools/rtla/common_timerlat_description.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/tools/rtla/common_timerlat_description.rst</a></div><div class='hunk'>@@ -6,5 +6,13 @@ debugging of operating system timer latency.</div><div class='ctx'> </div><div class='ctx'> The *timerlat* tracer outputs information in two ways. It periodically</div><div class='ctx'> prints the timer latency at the timer *IRQ* handler and the *Thread*</div><div class='del'>-handler. It also enable the trace of the most relevant information via</div><div class='add'>+handler. It also enables the trace of the most relevant information via</div><div class='ctx'> **osnoise:** tracepoints.</div><div class='add'>+</div><div class='add'>+The **rtla timerlat** tool sets the options of the *timerlat* tracer</div><div class='add'>+and collects and displays a summary of the results. By default,</div><div class='add'>+the collection is done synchronously in kernel space using a dedicated</div><div class='add'>+BPF program attached to the *timerlat* tracer. If either BPF or</div><div class='add'>+the **osnoise:timerlat_sample** tracepoint it attaches to is</div><div class='add'>+unavailable, the **rtla timerlat** tool falls back to using tracefs to</div><div class='add'>+process the data asynchronously in user space.</div><div class='head'>diff --git a/Documentation/tools/rtla/rtla-timerlat.rst b/Documentation/tools/rtla/rtla-timerlat.rst<br/>index 44a49e6f302b..20e2d259467f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/tools/rtla/rtla-timerlat.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/tools/rtla/rtla-timerlat.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/tools/rtla/rtla-timerlat.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/tools/rtla/rtla-timerlat.rst</a></div><div class='hunk'>@@ -16,13 +16,10 @@ DESCRIPTION</div><div class='ctx'> </div><div class='ctx'> .. include:: common_timerlat_description.rst</div><div class='ctx'> </div><div class='del'>-The *timerlat* tracer outputs information in two ways. It periodically</div><div class='del'>-prints the timer latency at the timer *IRQ* handler and the *Thread* handler.</div><div class='del'>-It also provides information for each noise via the **osnoise:** tracepoints.</div><div class='ctx'> The **rtla timerlat top** mode displays a summary of the periodic output</div><div class='del'>-from the *timerlat* tracer. The **rtla hist hist** mode displays a histogram</div><div class='del'>-of each tracer event occurrence. For further details, please refer to the</div><div class='del'>-respective man page.</div><div class='add'>+from the *timerlat* tracer. The **rtla timerlat hist** mode displays</div><div class='add'>+a histogram of each tracer event occurrence. For further details, please</div><div class='add'>+refer to the respective man page.</div><div class='ctx'> </div><div class='ctx'> MODES</div><div class='ctx'> =====</div><div class='head'>diff --git a/Documentation/trace/coresight/panic.rst b/Documentation/trace/coresight/panic.rst<br/>index a58aa914c241..6e4bde953cae 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/coresight/panic.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/trace/coresight/panic.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/coresight/panic.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/trace/coresight/panic.rst</a></div><div class='hunk'>@@ -67,8 +67,8 @@ Trace data captured at the time of panic, can be read from rebooted kernel</div><div class='ctx'> or from crashdump kernel using a special device file /dev/crash_tmc_xxx.</div><div class='ctx'> This device file is created only when there is a valid crashdata available.</div><div class='ctx'> </div><div class='del'>-General flow of trace capture and decode incase of kernel panic</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+General flow of trace capture and decode in case of kernel panic</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> 1. Enable source and sink on all the cores using the sysfs interface.</div><div class='ctx'>    ETR sinks should have trace buffers allocated from reserved memory,</div><div class='ctx'>    by selecting "resrv" buffer mode from sysfs.</div><div class='head'>diff --git a/Documentation/trace/ftrace.rst b/Documentation/trace/ftrace.rst<br/>index c9e88bf65709..af66a05e18cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/ftrace.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/trace/ftrace.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/ftrace.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/trace/ftrace.rst</a></div><div class='hunk'>@@ -1205,6 +1205,19 @@ Here are the available options:</div><div class='ctx'> 	default instance. The only way the top level instance has this flag</div><div class='ctx'> 	cleared, is by it being set in another instance.</div><div class='ctx'> </div><div class='add'>+  copy_trace_marker</div><div class='add'>+	If there are applications that hard code writing into the top level</div><div class='add'>+	trace_marker file (/sys/kernel/tracing/trace_marker or trace_marker_raw),</div><div class='add'>+	and the tooling would like it to go into an instance, this option can</div><div class='add'>+	be used. Create an instance and set this option, and then all writes</div><div class='add'>+	into the top level trace_marker file will also be redirected into this</div><div class='add'>+	instance.</div><div class='add'>+</div><div class='add'>+	Note, by default this option is set for the top level instance. If it</div><div class='add'>+	is disabled, then writes to the trace_marker or trace_marker_raw files</div><div class='add'>+	will not be written into the top level file. If no instance has this</div><div class='add'>+	option set, then a write will error with the errno of ENODEV.</div><div class='add'>+</div><div class='ctx'>   annotate</div><div class='ctx'> 	It is sometimes confusing when the CPU buffers are full</div><div class='ctx'> 	and one CPU buffer had a lot of events recently, thus</div><div class='head'>diff --git a/Documentation/trace/index.rst b/Documentation/trace/index.rst<br/>index 2c991dc96ace..cc1dc5a087e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/trace/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/trace/index.rst</a></div><div class='hunk'>@@ -1,39 +1,103 @@</div><div class='del'>-==========================</div><div class='del'>-Linux Tracing Technologies</div><div class='del'>-==========================</div><div class='add'>+================================</div><div class='add'>+Linux Tracing Technologies Guide</div><div class='add'>+================================</div><div class='add'>+</div><div class='add'>+Tracing in the Linux kernel is a powerful mechanism that allows</div><div class='add'>+developers and system administrators to analyze and debug system</div><div class='add'>+behavior. This guide provides documentation on various tracing</div><div class='add'>+frameworks and tools available in the Linux kernel.</div><div class='add'>+</div><div class='add'>+Introduction to Tracing</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+This section provides an overview of Linux tracing mechanisms</div><div class='add'>+and debugging approaches.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='add'>+   :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-   ftrace-design</div><div class='add'>+   debugging</div><div class='add'>+   tracepoints</div><div class='ctx'>    tracepoint-analysis</div><div class='add'>+   ring-buffer-map</div><div class='add'>+</div><div class='add'>+Core Tracing Frameworks</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+The following are the primary tracing frameworks integrated into</div><div class='add'>+the Linux kernel.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='ctx'>    ftrace</div><div class='add'>+   ftrace-design</div><div class='ctx'>    ftrace-uses</div><div class='del'>-   fprobe</div><div class='ctx'>    kprobes</div><div class='ctx'>    kprobetrace</div><div class='del'>-   uprobetracer</div><div class='ctx'>    fprobetrace</div><div class='del'>-   tracepoints</div><div class='add'>+   fprobe</div><div class='add'>+   ring-buffer-design</div><div class='add'>+</div><div class='add'>+Event Tracing and Analysis</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+A detailed explanation of event tracing mechanisms and their</div><div class='add'>+applications.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='ctx'>    events</div><div class='ctx'>    events-kmem</div><div class='ctx'>    events-power</div><div class='ctx'>    events-nmi</div><div class='ctx'>    events-msr</div><div class='del'>-   mmiotrace</div><div class='add'>+   boottime-trace</div><div class='ctx'>    histogram</div><div class='ctx'>    histogram-design</div><div class='del'>-   boottime-trace</div><div class='del'>-   debugging</div><div class='del'>-   hwlat_detector</div><div class='del'>-   osnoise-tracer</div><div class='del'>-   timerlat-tracer</div><div class='add'>+</div><div class='add'>+Hardware and Performance Tracing</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+This section covers tracing features that monitor hardware</div><div class='add'>+interactions and system performance.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='ctx'>    intel_th</div><div class='del'>-   ring-buffer-design</div><div class='del'>-   ring-buffer-map</div><div class='ctx'>    stm</div><div class='ctx'>    sys-t</div><div class='ctx'>    coresight/index</div><div class='del'>-   user_events</div><div class='ctx'>    rv/index</div><div class='ctx'>    hisi-ptt</div><div class='add'>+   mmiotrace</div><div class='add'>+   hwlat_detector</div><div class='add'>+   osnoise-tracer</div><div class='add'>+   timerlat-tracer</div><div class='add'>+</div><div class='add'>+User-Space Tracing</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+These tools allow tracing user-space applications and</div><div class='add'>+interactions.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   user_events</div><div class='add'>+   uprobetracer</div><div class='add'>+</div><div class='add'>+Additional Resources</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+For more details, refer to the respective documentation of each</div><div class='add'>+tracing tool and framework.</div><div class='add'>+</div><div class='add'>+.. only:: subproject and html</div><div class='add'>+</div><div class='add'>+   Indices</div><div class='add'>+   =======</div><div class='add'>+</div><div class='add'>+   * :ref:`genindex`</div><div class='head'>diff --git a/Documentation/trace/tracepoints.rst b/Documentation/trace/tracepoints.rst<br/>index decabcc77b56..b35c40e3abbe 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/trace/tracepoints.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/trace/tracepoints.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/trace/tracepoints.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/trace/tracepoints.rst</a></div><div class='hunk'>@@ -71,7 +71,7 @@ In subsys/file.c (where the tracing statement must be added)::</div><div class='ctx'> 	void somefct(void)</div><div class='ctx'> 	{</div><div class='ctx'> 		...</div><div class='del'>-		trace_subsys_eventname(arg, task);</div><div class='add'>+		trace_subsys_eventname_tp(arg, task);</div><div class='ctx'> 		...</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -129,12 +129,12 @@ within an if statement with the following::</div><div class='ctx'> 		for (i = 0; i &lt; count; i++)</div><div class='ctx'> 			tot += calculate_nuggets();</div><div class='ctx'> </div><div class='del'>-		trace_foo_bar(tot);</div><div class='add'>+		trace_foo_bar_tp(tot);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-All trace_&lt;tracepoint&gt;() calls have a matching trace_&lt;tracepoint&gt;_enabled()</div><div class='add'>+All trace_&lt;tracepoint&gt;_tp() calls have a matching trace_&lt;tracepoint&gt;_enabled()</div><div class='ctx'> function defined that returns true if the tracepoint is enabled and</div><div class='del'>-false otherwise. The trace_&lt;tracepoint&gt;() should always be within the</div><div class='add'>+false otherwise. The trace_&lt;tracepoint&gt;_tp() should always be within the</div><div class='ctx'> block of the if (trace_&lt;tracepoint&gt;_enabled()) to prevent races between</div><div class='ctx'> the tracepoint being enabled and the check being seen.</div><div class='ctx'> </div><div class='hunk'>@@ -143,7 +143,10 @@ the static_key of the tracepoint to allow the if statement to be implemented</div><div class='ctx'> with jump labels and avoid conditional branches.</div><div class='ctx'> </div><div class='ctx'> .. note:: The convenience macro TRACE_EVENT provides an alternative way to</div><div class='del'>-      define tracepoints. Check http://lwn.net/Articles/379903,</div><div class='add'>+      define tracepoints. Note, DECLARE_TRACE(foo) creates a function</div><div class='add'>+      "trace_foo_tp()" whereas TRACE_EVENT(foo) creates a function</div><div class='add'>+      "trace_foo()", and also exposes the tracepoint as a trace event in</div><div class='add'>+      /sys/kernel/tracing/events directory.  Check http://lwn.net/Articles/379903,</div><div class='ctx'>       http://lwn.net/Articles/381064 and http://lwn.net/Articles/383362</div><div class='ctx'>       for a series of articles with more details.</div><div class='ctx'> </div><div class='hunk'>@@ -159,7 +162,9 @@ In a C file::</div><div class='ctx'> </div><div class='ctx'> 	void do_trace_foo_bar_wrapper(args)</div><div class='ctx'> 	{</div><div class='del'>-		trace_foo_bar(args);</div><div class='add'>+		trace_foo_bar_tp(args); // for tracepoints created via DECLARE_TRACE</div><div class='add'>+					//   or</div><div class='add'>+		trace_foo_bar(args);    // for tracepoints created via TRACE_EVENT</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> In the header file::</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/2.Process.rst b/Documentation/translations/sp_SP/process/2.Process.rst<br/>index 5993eed71563..c21b0134cfa1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/2.Process.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/sp_SP/process/2.Process.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/2.Process.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/sp_SP/process/2.Process.rst</a></div><div class='hunk'>@@ -428,13 +428,14 @@ los desarrolladores, que corren el riesgo de quedar enterrados bajo una</div><div class='ctx'> carga de correo electrónico, incumplir las convenciones utilizadas en las</div><div class='ctx'> listas de Linux, o ambas cosas.</div><div class='ctx'> </div><div class='del'>-La mayoría de las listas de correo del kernel se ejecutan en</div><div class='del'>-vger.kernel.org; la lista principal se puede encontrar en:</div><div class='add'>+La mayoría de las listas de correo del kernel se alojan en kernel.org; la</div><div class='add'>+lista principal se puede encontrar en:</div><div class='ctx'> </div><div class='del'>-	http://vger.kernel.org/vger-lists.html</div><div class='add'>+	https://subspace.kernel.org</div><div class='ctx'> </div><div class='del'>-Sim embargo, hay listas alojadas en otros lugares; varios de ellos se</div><div class='del'>-encuentran en redhat.com/mailman/listinfo.</div><div class='add'>+Sin embargo, hay listas alojadas en otros lugares; consulte el archivo</div><div class='add'>+MAINTAINERS para obtener la lista relevante para cualquier subsistema en</div><div class='add'>+particular.</div><div class='ctx'> </div><div class='ctx'> La lista de correo principal para el desarrollo del kernel es, por</div><div class='ctx'> supuesto, linux-kernel. Esta lista es un lugar intimidante; el volumen</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/howto.rst b/Documentation/translations/sp_SP/process/howto.rst<br/>index 72ea855ac9dc..e1a6e6a52ae4 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/howto.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/sp_SP/process/howto.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/howto.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/sp_SP/process/howto.rst</a></div><div class='hunk'>@@ -334,7 +334,7 @@ con el árbol principal, necesitan probar su integración. Para ello, existe</div><div class='ctx'> un repositorio especial de pruebas en el que se encuentran casi todos los</div><div class='ctx'> árboles de subsistema, actualizado casi a diario:</div><div class='ctx'> </div><div class='del'>-	https://git.kernel.org/?p=linux/kernel/git/next/linux-next.git</div><div class='add'>+	https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git</div><div class='ctx'> </div><div class='ctx'> De esta manera, linux-next ofrece una perspectiva resumida de lo que se</div><div class='ctx'> espera que entre en el kernel principal en el próximo período de "merge"</div><div class='hunk'>@@ -378,13 +378,13 @@ desarrolladores del kernel participan en la lista de correo del kernel de</div><div class='ctx'> Linux. Detalles sobre cómo para suscribirse y darse de baja de la lista se</div><div class='ctx'> pueden encontrar en:</div><div class='ctx'> </div><div class='del'>-	http://vger.kernel.org/vger-lists.html#linux-kernel</div><div class='add'>+	https://subspace.kernel.org/subscribing.html</div><div class='ctx'> </div><div class='ctx'> Existen archivos de la lista de correo en la web en muchos lugares</div><div class='ctx'> distintos. Utilice un motor de búsqueda para encontrar estos archivos. Por</div><div class='ctx'> ejemplo:</div><div class='ctx'> </div><div class='del'>-	http://dir.gmane.org/gmane.linux.kernel</div><div class='add'>+	https://lore.kernel.org/linux-kernel/</div><div class='ctx'> </div><div class='ctx'> Es muy recomendable que busque en los archivos sobre el tema que desea</div><div class='ctx'> tratar, antes de publicarlo en la lista. Un montón de cosas ya discutidas</div><div class='hunk'>@@ -398,13 +398,13 @@ los diferentes grupos.</div><div class='ctx'> Muchas de las listas están alojadas en kernel.org. La información sobre</div><div class='ctx'> estas puede ser encontrada en:</div><div class='ctx'> </div><div class='del'>-	http://vger.kernel.org/vger-lists.html</div><div class='add'>+	https://subspace.kernel.org</div><div class='ctx'> </div><div class='ctx'> Recuerde mantener buenos hábitos de comportamiento al usar las listas.</div><div class='ctx'> Aunque un poco cursi, la siguiente URL tiene algunas pautas simples para</div><div class='ctx'> interactuar con la lista (o cualquier lista):</div><div class='ctx'> </div><div class='del'>-	http://www.albion.com/netiquette/</div><div class='add'>+	https://subspace.kernel.org/etiquette.html</div><div class='ctx'> </div><div class='ctx'> Si varias personas responden a su correo, el CC (lista de destinatarios)</div><div class='ctx'> puede hacerse bastante grande. No elimine a nadie de la lista CC: sin una</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/kernel-docs.rst b/Documentation/translations/sp_SP/process/kernel-docs.rst<br/>index a62c6854f59b..b9e0ca4be324 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/kernel-docs.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/sp_SP/process/kernel-docs.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/kernel-docs.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/sp_SP/process/kernel-docs.rst</a></div><div class='hunk'>@@ -170,9 +170,8 @@ Recursos varios</div><div class='ctx'> </div><div class='ctx'>     * Título: **linux-kernel mailing list archives and search engines**</div><div class='ctx'> </div><div class='del'>-      :URL: http://vger.kernel.org/vger-lists.html</div><div class='del'>-      :URL: http://www.uwsg.indiana.edu/hypermail/linux/kernel/index.html</div><div class='del'>-      :URL: http://groups.google.com/group/mlist.linux.kernel</div><div class='add'>+      :URL: https://subspace.kernel.org</div><div class='add'>+      :URL: https://lore.kernel.org</div><div class='ctx'>       :Palabras Clave: linux-kernel, archives, buscar, search, archivos.</div><div class='ctx'>       :Descripción: Algunos de los archivadores de listas de correo del</div><div class='ctx'>         kernel de Linux. Si usted tiene uno mejor/otro, por favor hágamelo</div><div class='head'>diff --git a/Documentation/translations/sp_SP/process/submitting-patches.rst b/Documentation/translations/sp_SP/process/submitting-patches.rst<br/>index 328ec80bd61d..ecb08b14c2c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/submitting-patches.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/sp_SP/process/submitting-patches.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/sp_SP/process/submitting-patches.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/sp_SP/process/submitting-patches.rst</a></div><div class='hunk'>@@ -136,11 +136,11 @@ algo documentado en la web, referencie esto.</div><div class='ctx'> </div><div class='ctx'> Cuando se vincule a archivos de listas de correo, preferiblemente use el</div><div class='ctx'> servicio de archivador de mensajes lore.kernel.org. Para crear la URL del</div><div class='del'>-enlace, utilice el contenido del encabezado ("header") ``Message-Id`` del</div><div class='add'>+enlace, utilice el contenido del encabezado ("header") ``Message-ID`` del</div><div class='ctx'> mensaje sin los corchetes angulares que lo rodean.</div><div class='ctx'> Por ejemplo::</div><div class='ctx'> </div><div class='del'>-    Link: https://lore.kernel.org/r/30th.anniversary.repost@klaava.Helsinki.FI/</div><div class='add'>+    Link: https://lore.kernel.org/30th.anniversary.repost@klaava.Helsinki.FI</div><div class='ctx'> </div><div class='ctx'> Verifique el enlace para asegurarse de que realmente funciona y apunta al</div><div class='ctx'> mensaje correspondiente.</div><div class='hunk'>@@ -257,10 +257,10 @@ archivo MAINTAINERS una lista específica de los subsistemas; su parche</div><div class='ctx'> probablemente recibirá más atención allí. Sin embargo, no envíe spam a</div><div class='ctx'> listas no relacionadas.</div><div class='ctx'> </div><div class='del'>-Muchas listas relacionadas con el kernel están alojadas en vger.kernel.org;</div><div class='add'>+Muchas listas relacionadas con el kernel están alojadas en kernel.org;</div><div class='ctx'> puedes encontrar un listado de estas en</div><div class='del'>-http://vger.kernel.org/vger-lists.html. Existen listas relacionadas con el</div><div class='del'>-kernel alojadas en otros lugares, no obstante.</div><div class='add'>+https://subspace.kernel.org. Existen listas relacionadas con el kernel</div><div class='add'>+alojadas en otros lugares, no obstante.</div><div class='ctx'> </div><div class='ctx'> ¡No envíe más de 15 parches a la vez a las listas de correo de vger!</div><div class='ctx'> </div><div class='hunk'>@@ -907,9 +907,6 @@ Referencias</div><div class='ctx'> </div><div class='ctx'>   &lt;http://www.kroah.com/log/linux/maintainer-06.html&gt;</div><div class='ctx'> </div><div class='del'>-NO!!!! Gente, no mas bombas enormes de parches a linux-kernel@vger.kernel.org!</div><div class='del'>-  &lt;https://lore.kernel.org/r/20050711.125305.08322243.davem@davemloft.net&gt;</div><div class='del'>-</div><div class='ctx'> Kernel Documentation/process/coding-style.rst</div><div class='ctx'> </div><div class='ctx'> Email de Linus Torvalds sobre la forma canónica de los parches:</div><div class='head'>diff --git a/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst b/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst<br/>index c3f6a83294dc..4b3432753eb9 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_CN/admin-guide/bug-hunting.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/admin-guide/bug-hunting.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/admin-guide/bug-hunting.rst</a></div><div class='hunk'>@@ -188,7 +188,7 @@ objdump</div><div class='ctx'> 编行。如果没有调试符å�·ï¼Œæ‚¨å°†çœ‹åˆ°æ‰€ç¤ºä¾‹ç¨‹çš„汇编程åº�代ç �，但是如果内核有调试</div><div class='ctx'> 符å�·ï¼ŒC代ç �也将å�¯è§�（调试符å�·å�¯ä»¥åœ¨å†…æ ¸é…�ç½®è�œå�•çš„hacking项中å�¯ç”¨ï¼‰ã€‚例如::</div><div class='ctx'> </div><div class='del'>-    $ objdump -r -S -l --disassemble net/dccp/ipv4.o</div><div class='add'>+    $ objdump -r -S -l --disassemble net/ipv4/tcp.o</div><div class='ctx'> </div><div class='ctx'> .. note::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst b/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst<br/>index cadc580fa23b..d728e4db0b85 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/arch/openrisc/openrisc_port.rst</a></div><div class='hunk'>@@ -17,10 +17,10 @@ OpenRISC 1000系列（或1k）。</div><div class='ctx'> </div><div class='ctx'> 关于OpenRISC处ç�†å™¨å’Œæ­£åœ¨è¿›è¡Œä¸­çš„å¼€å�‘çš„ä¿¡æ�¯:</div><div class='ctx'> </div><div class='del'>-	=======		=============================</div><div class='add'>+	=======		==============================</div><div class='ctx'> 	网站		https://openrisc.io</div><div class='del'>-	邮箱		openrisc@lists.librecores.org</div><div class='del'>-	=======		=============================</div><div class='add'>+	邮箱		linux-openrisc@vger.kernel.org</div><div class='add'>+	=======		==============================</div><div class='ctx'> </div><div class='ctx'> ---------------------------------------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -36,11 +36,11 @@ OpenRISC工具链和Linux的构建指å�—</div><div class='ctx'> 工具链的构建指å�—å�¯ä»¥åœ¨openrisc.io或Stafford的工具链构建和å�‘布脚本</div><div class='ctx'> 中找到。</div><div class='ctx'> </div><div class='del'>-	======      =================================================</div><div class='del'>-	二进制      https://github.com/openrisc/or1k-gcc/releases</div><div class='add'>+	======      ==========================================================</div><div class='add'>+	二进制      https://github.com/stffrdhrn/or1k-toolchain-build/releases</div><div class='ctx'> 	工具链      https://openrisc.io/software</div><div class='ctx'> 	构建        https://github.com/stffrdhrn/or1k-toolchain-build</div><div class='del'>-	======      =================================================</div><div class='add'>+	======      ==========================================================</div><div class='ctx'> </div><div class='ctx'> 2) 构建</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_CN/core-api/irq/irq-domain.rst b/Documentation/translations/zh_CN/core-api/irq/irq-domain.rst<br/>index 9174fce12c1b..4a2d3b27aa4d 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/core-api/irq/irq-domain.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_CN/core-api/irq/irq-domain.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/core-api/irq/irq-domain.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/core-api/irq/irq-domain.rst</a></div><div class='hunk'>@@ -60,8 +60,6 @@ irq_domain和一个hwirqå�·ä½œä¸ºå�‚数。 如果hwirq的映射还ä¸�存在，é‚</div><div class='ctx'> </div><div class='ctx'> - irq_find_mapping()返回给定域和hwirqçš„Linux IRQå�·ï¼Œå¦‚果没有映射则返回0。</div><div class='ctx'> </div><div class='del'>-- irq_linear_revmap()现与irq_find_mapping()相å�Œï¼Œå·²è¢«åºŸå¼ƒã€‚</div><div class='del'>-</div><div class='ctx'> - generic_handle_domain_irq()处ç�†ä¸€ä¸ªç”±åŸŸå’Œhwirqå�·æ��述的中断。</div><div class='ctx'> </div><div class='ctx'> 请注æ„�，irq域的查找必须å�‘生在与RCU读临界区兼容的上下文中。</div><div class='hunk'>@@ -83,7 +81,6 @@ irq_domain映射的类型</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_linear()</div><div class='ctx'> 	irq_domain_create_linear()</div><div class='ctx'> </div><div class='ctx'> 线性å��å�‘映射维护了一个固定大å°�的表，该表以hwirqå�·ä¸ºç´¢å¼•ã€‚ 当一个hwirq被映射</div><div class='hunk'>@@ -104,7 +101,6 @@ irq_domain_add_linear()å’Œirq_domain_create_linear()在功能上是等价的，</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_tree()</div><div class='ctx'> 	irq_domain_create_tree()</div><div class='ctx'> </div><div class='ctx'> irq_domain维护ç�€ä»Žhwirqå�·åˆ°Linux IRQçš„radix的树状映射。 当一个hwirq被映射时，</div><div class='hunk'>@@ -124,7 +120,7 @@ irq_domain_add_tree()å’Œirq_domain_create_tree()在功能上是等价的，除äº</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_nomap()</div><div class='add'>+	irq_domain_create_nomap()</div><div class='ctx'> </div><div class='ctx'> 当硬件中的hwirqå�·æ˜¯å�¯ç¼–程的时候，就å�¯ä»¥é‡‡ç”¨æ— æ˜ å°„类型。 在这ç§�情况下，最好将</div><div class='ctx'> Linux IRQå�·ç¼–入硬件本身，这样就ä¸�需è¦�映射了。 调用irq_create_direct_mapping()</div><div class='hunk'>@@ -138,8 +134,6 @@ Linux IRQå�·ç¼–入硬件本身，这样就ä¸�需è¦�映射了。 调用irq_create</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_simple()</div><div class='del'>-	irq_domain_add_legacy()</div><div class='ctx'> 	irq_domain_create_simple()</div><div class='ctx'> 	irq_domain_create_legacy()</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_CN/core-api/printk-formats.rst b/Documentation/translations/zh_CN/core-api/printk-formats.rst<br/>index bd36d35eba4e..96a917ecc93f 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/core-api/printk-formats.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_CN/core-api/printk-formats.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/core-api/printk-formats.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/core-api/printk-formats.rst</a></div><div class='hunk'>@@ -523,9 +523,8 @@ clk结构体</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'> 	%pC	pll1</div><div class='del'>-	%pCn	pll1</div><div class='ctx'> </div><div class='del'>-用于打å�°clk结构。%pC å’Œ %pCn 打å�°æ—¶é’Ÿçš„å��称（通用时钟框架）或唯一的32ä½�</div><div class='add'>+用于打å�°clk结构。%pC 打å�°æ—¶é’Ÿçš„å��称（通用时钟框架）或唯一的32ä½�</div><div class='ctx'> ID（传统时钟框架）。</div><div class='ctx'> </div><div class='ctx'> 通过引用传递。</div><div class='head'>diff --git a/Documentation/translations/zh_CN/devicetree/overlay-notes.rst b/Documentation/translations/zh_CN/devicetree/overlay-notes.rst<br/>index 43e3c0bc5a9f..ba5edd05dc1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/devicetree/overlay-notes.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_CN/devicetree/overlay-notes.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/devicetree/overlay-notes.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/devicetree/overlay-notes.rst</a></div><div class='hunk'>@@ -43,10 +43,10 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]çš„é…�套文档。</div><div class='ctx'> 	};</div><div class='ctx'>     ---- foo.dts ---------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-覆盖bar.dts,</div><div class='add'>+覆盖bar.dtso,</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-    ---- bar.dts - 按标签覆盖目标ä½�ç½® ----------------------------</div><div class='add'>+    ---- bar.dtso - 按标签覆盖目标ä½�ç½® ---------------------------</div><div class='ctx'> 	/dts-v1/;</div><div class='ctx'> 	/æ�’件/;</div><div class='ctx'> 	&amp;ocp {</div><div class='hunk'>@@ -56,7 +56,7 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]çš„é…�套文档。</div><div class='ctx'> 			... /* å�„ç§�属性和å­�节点 */</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-    ---- bar.dts ---------------------------------------------------------------</div><div class='add'>+    ---- bar.dtso --------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> 当加载（并按照[1]中æ��è¿°çš„æ–¹å¼�解决）时，应该产生foo+bar.dts::</div><div class='ctx'> </div><div class='hunk'>@@ -90,9 +90,9 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]çš„é…�套文档。</div><div class='ctx'> DT中的适当ä½�置。在这ç§�情况下，å�¯ä»¥æ��供目标路径。通过标签的目标ä½�置的语法是比</div><div class='ctx'> 较好的，因为ä¸�管标签在DT中出现在哪里，覆盖都å�¯ä»¥è¢«åº”用到任何包å�«æ ‡ç­¾çš„基础DT上。</div><div class='ctx'> </div><div class='del'>-上é�¢çš„bar.dts例å­�被修改为使用目标路径语法，å�³ä¸º::</div><div class='add'>+上é�¢çš„bar.dtso例å­�被修改为使用目标路径语法，å�³ä¸º::</div><div class='ctx'> </div><div class='del'>-    ---- bar.dts - 通过明确的路径覆盖目标ä½�ç½® --------------------</div><div class='add'>+    ---- bar.dtso - 通过明确的路径覆盖目标ä½�ç½® -------------------</div><div class='ctx'> 	/dts-v1/;</div><div class='ctx'> 	/æ�’件/;</div><div class='ctx'> 	&amp;{/ocp} {</div><div class='hunk'>@@ -102,7 +102,7 @@ DT中的适当ä½�置。在这ç§�情况下，å�¯ä»¥æ��供目标路径。通过标</div><div class='ctx'> 			... /* å�„ç§�外围设备和å­�节点 */</div><div class='ctx'> 		}</div><div class='ctx'> 	};</div><div class='del'>-    ---- bar.dts ---------------------------------------------------------------</div><div class='add'>+    ---- bar.dtso --------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 内核中关于覆盖的API</div><div class='head'>diff --git a/Documentation/translations/zh_CN/driver-api/gpio/index.rst b/Documentation/translations/zh_CN/driver-api/gpio/index.rst<br/>index e4d54724a1b5..f64a69f771ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/driver-api/gpio/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_CN/driver-api/gpio/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/driver-api/gpio/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/driver-api/gpio/index.rst</a></div><div class='hunk'>@@ -42,7 +42,7 @@ ACPI支æŒ�</div><div class='ctx'> </div><div class='ctx'> 该API在以下内核代ç �中:</div><div class='ctx'> </div><div class='del'>-drivers/gpio/gpiolib-acpi.c</div><div class='add'>+drivers/gpio/gpiolib-acpi-core.c</div><div class='ctx'> </div><div class='ctx'> 设备树支æŒ�</div><div class='ctx'> ==========</div><div class='head'>diff --git a/Documentation/translations/zh_CN/how-to.rst b/Documentation/translations/zh_CN/how-to.rst<br/>new file mode 100644<br/>index 000000000000..569b0209385a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/how-to.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/how-to.rst</a></div><div class='hunk'>@@ -0,0 +1,459 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=========================</div><div class='add'>+Linux内核中文文档翻译规范</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+修订记录：</div><div class='add'>+ - v1.0 2025å¹´3月28日，å�¸å»¶è…¾ã€�慕冬亮共å�Œç¼–写了该规范。</div><div class='add'>+</div><div class='add'>+制定规范的背景</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+过去几年，在广大社区爱好者的å�‹å¥½å�ˆä½œä¸‹ï¼ŒLinux 内核中文文档迎æ�¥äº†è“¬å‹ƒçš„å�‘</div><div class='add'>+展。在翻译的早期，一切都是混乱的，社区对译稿å�ªæœ‰ä¸€ä¸ªå‡†ç¡®ç¿»è¯‘çš„è¦�求，以鼓</div><div class='add'>+励更多的开å�‘者å�‚与进æ�¥ï¼Œè¿™æ˜¯ä»Ž0到1的必然过程，所以早期的中文文档目录更加</div><div class='add'>+具有多样性，ä¸�过好在文档ä¸�多，维护上并没有过大的压力。</div><div class='add'>+</div><div class='add'>+然而，世事å�˜å¹»ï¼Œä¸�觉有年，现在内核中文文档在å‰�进的é�“路上越走越远，很多潜</div><div class='add'>+在的问题é€�æ¸�浮出水é�¢ï¼Œè€Œä¸”éš�ç�€ä¸­æ–‡æ–‡æ¡£æ•°é‡�的增加，翻译更多的文档与æ��高中</div><div class='add'>+文文档å�¯ç»´æŠ¤æ€§ä¹‹é—´çš„矛盾愈å�‘å°–é”�。由于文档翻译的特殊性，很多开å�‘者并ä¸�会</div><div class='add'>+一直更新文档，如果中文文档è�½å�Žè‹±æ–‡æ–‡æ¡£å¤ªå¤šï¼Œæ–‡æ¡£æ›´æ–°çš„工作é‡�会远大于é‡�æ–°</div><div class='add'>+翻译。而且邮件列表中陆续有新的é�¢å­”出现，他们那股热情，就åƒ�燃烧的ç�«ç„°ï¼Œèƒ½</div><div class='add'>+瞬间点燃整个空间，å�¯æ˜¯ä»–们的补ä¸�往往具有个性，这会给审阅带æ�¥äº†å¾ˆå¤§çš„困难，</div><div class='add'>+reviewer 们å�ªèƒ½è€�心地指导他们如何与社区更好地å�ˆä½œï¼Œä½†æ˜¯è¿™é¡¹å·¥ä½œå…·æœ‰é‡�å¤�</div><div class='add'>+性，长此以往，会æ¸�æ¸�浇ç�­ reviewer 审阅的热情。</div><div class='add'>+</div><div class='add'>+虽然内核文档中已ç»�有了类似的贡献指å�—，但是缺ä¹�专门针对于中文翻译的，尤其</div><div class='add'>+是对于新手æ�¥è¯´ï¼Œæµ�览大é‡�的文档å��而更加迷惑，该文档就是为了缓解这一问题而</div><div class='add'>+编写，目的是为æ��供给新手一个快速翻译指å�—。</div><div class='add'>+</div><div class='add'>+详细的贡献指å�—：Documentation/translations/zh_CN/process/index.rst。</div><div class='add'>+</div><div class='add'>+环境æ�­å»º</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+工欲善其事必先利其器，如果您目å‰�对内核文档翻译满怀热情，并且会独立地安装</div><div class='add'>+linux å�‘行版和简å�•åœ°ä½¿ç”¨ linux 命令行，那么å�¯ä»¥è¿…速开始了。若您尚ä¸�具备该</div><div class='add'>+能力，很多网站上会有详细的手把手教程，最多一个上å�ˆï¼Œæ‚¨åº”该就能掌æ�¡å¯¹åº”技</div><div class='add'>+能。您需è¦�注æ„�的一点是，请ä¸�è¦�使用 root 用户进行å�Žç»­æ­¥éª¤å’Œæ–‡æ¡£ç¿»è¯‘。</div><div class='add'>+</div><div class='add'>+拉å�–å¼€å�‘æ ‘</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+中文文档翻译工作目å‰�独立于 linux-doc å¼€å�‘树开展，所以您需è¦�拉å�–该开å�‘树，</div><div class='add'>+打开终端命令行执行::</div><div class='add'>+</div><div class='add'>+	git clone git://git.kernel.org/pub/scm/linux/kernel/git/alexs/linux.git</div><div class='add'>+</div><div class='add'>+如果您é�‡åˆ°ç½‘络连接问题，也å�¯ä»¥æ‰§è¡Œä»¥ä¸‹å‘½ä»¤::</div><div class='add'>+</div><div class='add'>+	git clone https://mirrors.hust.edu.cn/git/kernel-doc-zh.git linux</div><div class='add'>+</div><div class='add'>+这是 Alex å¼€å�‘æ ‘çš„é•œåƒ�库，æ¯�两个å°�æ—¶å�Œæ­¥ä¸€æ¬¡ä¸Šæ¸¸ã€‚如果您了解到更快的 mirror，</div><div class='add'>+请éš�æ—¶ **添加** 。</div><div class='add'>+</div><div class='add'>+命令执行完毕å�Žï¼Œæ‚¨ä¼šåœ¨å½“å‰�目录下得到一个 linux 目录，该目录就是您之å�Žçš„工作</div><div class='add'>+仓库，请把它放在一个稳妥的ä½�置。</div><div class='add'>+</div><div class='add'>+安装文档构建环境</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+内核仓库里é�¢æ��供了一个å�Šè‡ªåŠ¨åŒ–脚本，执行该脚本，会检测您的å�‘行版中需è¦�安</div><div class='add'>+装哪些软件包，请按照命令行æ��示进行安装，通常您å�ªéœ€è¦�å¤�制命令并执行就行。</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	cd linux</div><div class='add'>+	./scripts/sphinx-pre-install</div><div class='add'>+</div><div class='add'>+以Fedora为例，它的输出是这样的::</div><div class='add'>+</div><div class='add'>+	You should run:</div><div class='add'>+</div><div class='add'>+		sudo dnf install -y dejavu-sans-fonts dejavu-sans-mono-fonts dejavu-serif-fonts google-noto-sans-cjk-fonts graphviz-gd latexmk librsvg2-tools texlive-anyfontsize texlive-capt-of texlive-collection-fontsrecommended texlive-ctex texlive-eqparbox texlive-fncychap texlive-framed texlive-luatex85 texlive-multirow texlive-needspace texlive-tabulary texlive-threeparttable texlive-upquote texlive-wrapfig texlive-xecjk</div><div class='add'>+</div><div class='add'>+	Sphinx needs to be installed either:</div><div class='add'>+	1) via pip/pypi with:</div><div class='add'>+</div><div class='add'>+		/usr/bin/python3 -m venv sphinx_latest</div><div class='add'>+		. sphinx_latest/bin/activate</div><div class='add'>+		pip install -r ./Documentation/sphinx/requirements.txt</div><div class='add'>+</div><div class='add'>+	    If you want to exit the virtualenv, you can use:</div><div class='add'>+		deactivate</div><div class='add'>+</div><div class='add'>+	2) As a package with:</div><div class='add'>+</div><div class='add'>+		sudo dnf install -y python3-sphinx</div><div class='add'>+</div><div class='add'>+	    Please note that Sphinx &gt;= 3.0 will currently produce false-positive</div><div class='add'>+	   warning when the same name is used for more than one type (functions,</div><div class='add'>+	   structs, enums,...). This is known Sphinx bug. For more details, see:</div><div class='add'>+		https://github.com/sphinx-doc/sphinx/pull/8313</div><div class='add'>+</div><div class='add'>+请您按照æ��示å¤�制打å�°çš„命令到命令行执行，您必须具备 root æ�ƒé™�æ‰�能执行 sudo</div><div class='add'>+开头的命令。</div><div class='add'>+</div><div class='add'>+如果您处于一个多用户环境中，为了é�¿å…�对其他人造æˆ�å½±å“�，建议您é…�ç½®å�•ç”¨æˆ·</div><div class='add'>+sphinx 虚拟环境，å�³å�ªéœ€è¦�执行::</div><div class='add'>+</div><div class='add'>+	/usr/bin/python3 -m venv sphinx_latest</div><div class='add'>+	. sphinx_latest/bin/activate</div><div class='add'>+	pip install -r ./Documentation/sphinx/requirements.txt</div><div class='add'>+</div><div class='add'>+最å�Žæ‰§è¡Œä»¥ä¸‹å‘½ä»¤é€€å‡ºè™šæ‹ŸçŽ¯å¢ƒ::</div><div class='add'>+</div><div class='add'>+	deactivate</div><div class='add'>+</div><div class='add'>+您å�¯ä»¥åœ¨ä»»ä½•éœ€è¦�的时候å†�次执行以下命令进入虚拟环境::</div><div class='add'>+</div><div class='add'>+	. sphinx_latest/bin/activate</div><div class='add'>+</div><div class='add'>+进行第一次文档编译</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+进入开å�‘树目录::</div><div class='add'>+</div><div class='add'>+	cd linux</div><div class='add'>+</div><div class='add'>+这是一个标准的编译和调试æµ�程，请æ¯�次构建时都严格执行::</div><div class='add'>+</div><div class='add'>+	. sphinx_latest/bin/activate</div><div class='add'>+	make cleandocs</div><div class='add'>+	make htmldocs</div><div class='add'>+	deactivate</div><div class='add'>+</div><div class='add'>+检查编译结果</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+编译输出在Documentation/output/目录下，请用æµ�览器打开该目录下对应</div><div class='add'>+的文件进行检查。</div><div class='add'>+</div><div class='add'>+git和邮箱é…�ç½®</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+打开命令行执行::</div><div class='add'>+</div><div class='add'>+	sudo dnf install git-email</div><div class='add'>+	vim ~/.gitconfig</div><div class='add'>+</div><div class='add'>+这里是我的一个é…�置文件示范，请根æ�®æ‚¨çš„邮箱域å��æœ�务商æ��供的手册替æ�¢åˆ°å¯¹</div><div class='add'>+应的字段。</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	[user]</div><div class='add'>+	       name = Yanteng Si		# 这会出现在您的补ä¸�头部签å��æ �</div><div class='add'>+	       email = si.yanteng@linux.dev	# 这会出现在您的补ä¸�头部签å��æ �</div><div class='add'>+</div><div class='add'>+	[sendemail]</div><div class='add'>+	       from = Yanteng Si &lt;si.yanteng@linux.dev&gt;	# 这会出现在您的补ä¸�头部</div><div class='add'>+	       smtpencryption = ssl</div><div class='add'>+	       smtpserver = smtp.migadu.com</div><div class='add'>+	       smtpuser = si.yanteng@linux.dev</div><div class='add'>+	       smtppass = &lt;passwd&gt;      # 建议使用第三方客户端专用密ç �</div><div class='add'>+	       chainreplyto = false</div><div class='add'>+	       smtpserverport = 465</div><div class='add'>+</div><div class='add'>+关于邮件客户端的é…�置，请查阅Documentation/translations/zh_CN/process/email-clients.rst。</div><div class='add'>+</div><div class='add'>+开始翻译文档</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+文档索引结构</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+ç›®å‰�中文文档是在Documentation/translations/zh_CN/目录下进行，该</div><div class='add'>+目录结构最终会与Documentation/结构一致，所以您å�ªéœ€è¦�将您感兴趣的英文</div><div class='add'>+文档文件和对应的 index.rst å¤�制到 zh_CN 目录下对应的ä½�置，然å�Žä¿®æ”¹æ›´</div><div class='add'>+上一级的 index å�³å�¯å¼€å§‹æ‚¨çš„翻译。</div><div class='add'>+</div><div class='add'>+为了ä¿�è¯�翻译的文档补ä¸�被顺利å�ˆå¹¶ï¼Œä¸�建议多人å�Œæ—¶ç¿»è¯‘一个目录，因为这会</div><div class='add'>+造æˆ�è¡¥ä¸�之间互相ä¾�赖，往往会导致一部分补ä¸�被å�ˆå¹¶ï¼Œå�¦ä¸€éƒ¨åˆ†äº§ç”Ÿå†²çª�。</div><div class='add'>+</div><div class='add'>+如果实在无法é�¿å…�两个人å�Œæ—¶å¯¹ä¸€ä¸ªç›®å½•è¿›è¡Œç¿»è¯‘的情况，请将补ä¸�制作进一个补</div><div class='add'>+ä¸�集。但是ä¸�推è��刚开始就这么å�šï¼Œå› ä¸ºç»�过实践，在没有指导的情况下，新手很</div><div class='add'>+难一次处ç�†å¥½è¿™ä¸ªè¡¥ä¸�集。</div><div class='add'>+</div><div class='add'>+请执行以下命令，新建开å�‘分支::</div><div class='add'>+</div><div class='add'>+	git checkout docs-next</div><div class='add'>+	git branch my-trans</div><div class='add'>+	git checkout my-trans</div><div class='add'>+</div><div class='add'>+译文格å¼�è¦�求</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+	- æ¯�行长度最多ä¸�超过40个字符</div><div class='add'>+	- æ¯�行长度请ä¿�æŒ�一致</div><div class='add'>+	- 标题的下划线长度请按照一个英文一个字符ã€�一个中文两个字符与标题对é½�</div><div class='add'>+	- 其它的修饰符请与英文文档ä¿�æŒ�一致</div><div class='add'>+</div><div class='add'>+此外在译文的头部，您需è¦�æ�’入以下内容::</div><div class='add'>+</div><div class='add'>+	.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+	.. include:: ../disclaimer-zh_CN.rst  #您需è¦�了解该文件的路径，根</div><div class='add'>+						æ�®æ‚¨å®žé™…翻译的文档ç�µæ´»è°ƒæ•´</div><div class='add'>+</div><div class='add'>+	:Original: Documentation/xxx/xxx.rst  #替æ�¢ä¸ºæ‚¨ç¿»è¯‘的英文文档路径</div><div class='add'>+</div><div class='add'>+	:翻译:</div><div class='add'>+</div><div class='add'>+	 å�¸å»¶è…¾ Yanteng Si &lt;si.yanteng@linux.dev&gt; #替æ�¢ä¸ºæ‚¨è‡ªå·±çš„è�”系方å¼�</div><div class='add'>+</div><div class='add'>+翻译技巧</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+中文文档有æ¯�è¡Œ40字符é™�制，因为一个中文字符等于2个英文字符。但是社区并没有</div><div class='add'>+那么严格，一个诀çª�是将您的翻译的内容与英文原文的æ¯�行长度对é½�å�³å�¯ï¼Œè¿™æ ·ï¼Œ</div><div class='add'>+您也ä¸�必总是检查有没有超é™�。</div><div class='add'>+</div><div class='add'>+如果您的英文阅读能力有é™�，å�¯ä»¥è€ƒè™‘使用辅助翻译工具，例如 deepseek 。但是您</div><div class='add'>+必须仔细地打磨，使译文达到“信达雅â€�的标准。</div><div class='add'>+</div><div class='add'>+**请注æ„�** 社区ä¸�接å�—纯机器翻译的文档，社区工作建立在信任的基础上，请认真对待。</div><div class='add'>+</div><div class='add'>+编译和检查</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+请执行::</div><div class='add'>+</div><div class='add'>+	. sphinx_latest/bin/activate</div><div class='add'>+	make cleandocs</div><div class='add'>+	make htmldocs</div><div class='add'>+</div><div class='add'>+解决与您翻译的文档相关的 warning å’Œ error，然å�Žæ‰§è¡Œ::</div><div class='add'>+</div><div class='add'>+	make cleandocs	#该步骤ä¸�能çœ�略，å�¦åˆ™å�¯èƒ½ä¸�会å†�次输出真实存在的警告</div><div class='add'>+	make htmldocs</div><div class='add'>+	deactivate</div><div class='add'>+</div><div class='add'>+进入 output 目录用æµ�览器打开您翻译的文档，检查渲染的页é�¢æ˜¯å�¦æ­£å¸¸ï¼Œå¦‚果正常，</div><div class='add'>+继续进行å�Žç»­æ­¥éª¤ï¼Œå�¦åˆ™è¯·å°�试解决。</div><div class='add'>+</div><div class='add'>+制作补ä¸�</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+æ��交改动</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+执行以下命令，在弹出的交互å¼�页é�¢ä¸­å¡«å†™å¿…è¦�çš„ä¿¡æ�¯ã€‚</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	git add .</div><div class='add'>+	git commit -s -v</div><div class='add'>+</div><div class='add'>+请å�‚考以下信æ�¯è¿›è¡Œè¾“å…¥::</div><div class='add'>+</div><div class='add'>+	docs/zh_CN: Add self-protection index Chinese translation</div><div class='add'>+</div><div class='add'>+	Translate .../security/self-protection.rst into Chinese.</div><div class='add'>+</div><div class='add'>+	Update the translation through commit b080e52110ea	#请执行git log &lt;您翻译的英文文档路径&gt; å¤�制最顶部第一个补ä¸�çš„sha值的å‰�12ä½�，替æ�¢æŽ‰12ä½�sha值。</div><div class='add'>+	("docs: update self-protection __ro_after_init status")</div><div class='add'>+</div><div class='add'>+	Signed-off-by: Yanteng Si &lt;si.yanteng@linux.dev&gt;	#如果您å‰�é�¢çš„步骤正确执行，该行会自动显示，å�¦åˆ™è¯·æ£€æŸ¥gitconfig文件。</div><div class='add'>+</div><div class='add'>+ä¿�存并退出。</div><div class='add'>+</div><div class='add'>+**请注æ„�** 以上四行，缺少任何一行，您都将会在第一轮审阅å�Žè¿”工，如果您需è¦�一个更加明确的示例，请对 zh_CN 目录执行 git log。</div><div class='add'>+</div><div class='add'>+导出补ä¸�和制作å°�é�¢</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+这个时候，å�¯ä»¥å¯¼å‡ºè¡¥ä¸�，å�šå�‘é€�邮件列表最å�Žçš„准备了。命令行执行::</div><div class='add'>+</div><div class='add'>+	git format-patch -N</div><div class='add'>+</div><div class='add'>+然å�Žå‘½ä»¤è¡Œä¼šè¾“出类似下é�¢çš„内容::</div><div class='add'>+</div><div class='add'>+	0001-docs-zh_CN-add-xxxxxxxx.patch</div><div class='add'>+	0002-docs-zh_CN-add-xxxxxxxx.patch</div><div class='add'>+	……</div><div class='add'>+</div><div class='add'>+测试补ä¸�</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+内核æ��供了一个补ä¸�检测脚本，请执行::</div><div class='add'>+</div><div class='add'>+	./scripts/checkpatch.pl *.patch</div><div class='add'>+</div><div class='add'>+å�‚考脚本输出，解决掉所有的 error å’Œ warning，通常情况下，å�ªæœ‰ä¸‹é�¢è¿™ä¸ª</div><div class='add'>+warning ä¸�需è¦�解决::</div><div class='add'>+</div><div class='add'>+	WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?</div><div class='add'>+</div><div class='add'>+一个简å�•çš„解决方法是一次å�ªæ£€æŸ¥ä¸€ä¸ªè¡¥ä¸�，然å�Žæ‰“上该补ä¸�，直接对译文进行修改，</div><div class='add'>+然å�Žæ‰§è¡Œä»¥ä¸‹å‘½ä»¤ä¸ºè¡¥ä¸�追加更改::</div><div class='add'>+</div><div class='add'>+	git checkout docs-next</div><div class='add'>+	git branch test-trans</div><div class='add'>+	git am 0001-xxxxx.patch</div><div class='add'>+	./scripts/checkpatch.pl 0001-xxxxx.patch</div><div class='add'>+	直接修改您的翻译</div><div class='add'>+	git add .</div><div class='add'>+	git am --amend</div><div class='add'>+	ä¿�存退出</div><div class='add'>+	git am 0002-xxxxx.patch</div><div class='add'>+	……</div><div class='add'>+</div><div class='add'>+é‡�新导出å†�次检测，é‡�å¤�这个过程，直到处ç�†å®Œæ‰€æœ‰çš„è¡¥ä¸�。</div><div class='add'>+</div><div class='add'>+最å�Žï¼Œå¦‚果检测时没有 warning å’Œ error 需è¦�被处ç�†æˆ–者您å�ªæœ‰ä¸€ä¸ªè¡¥ä¸�，请跳</div><div class='add'>+过下é�¢è¿™ä¸ªæ­¥éª¤ï¼Œå�¦åˆ™è¯·é‡�新导出补ä¸�制作å°�é�¢::</div><div class='add'>+</div><div class='add'>+	git format-patch -N --cover-letter --thread=shallow  #N为您的补ä¸�æ•°é‡�,N一般è¦�大于1。</div><div class='add'>+</div><div class='add'>+然å�Žå‘½ä»¤è¡Œä¼šè¾“出类似下é�¢çš„内容::</div><div class='add'>+</div><div class='add'>+	0000-cover-letter.patch</div><div class='add'>+	0001-docs-zh_CN-add-xxxxxxxx.patch</div><div class='add'>+	0002-docs-zh_CN-add-xxxxxxxx.patch</div><div class='add'>+</div><div class='add'>+您需è¦�用编辑器打开0å�·è¡¥ä¸�，修改两处内容::</div><div class='add'>+</div><div class='add'>+	vim 0000-cover-letter.patch</div><div class='add'>+</div><div class='add'>+	...</div><div class='add'>+	Subject: [PATCH 0/1] *** SUBJECT HERE ***	#修改该字段，概括您的补ä¸�集都å�šäº†å“ªäº›äº‹æƒ…</div><div class='add'>+</div><div class='add'>+	*** BLURB HERE ***				#修改该字段，详细æ��述您的补ä¸�集å�šäº†å“ªäº›äº‹æƒ…</div><div class='add'>+</div><div class='add'>+	Yanteng Si (1):</div><div class='add'>+	  docs/zh_CN: add xxxxx</div><div class='add'>+	...</div><div class='add'>+</div><div class='add'>+如果您å�ªæœ‰ä¸€ä¸ªè¡¥ä¸�，则å�¯ä»¥ä¸�制作å°�é�¢ï¼Œå�³0å�·è¡¥ä¸�，å�ªéœ€è¦�执行::</div><div class='add'>+</div><div class='add'>+	git format-patch -1</div><div class='add'>+</div><div class='add'>+把补ä¸�æ��交到邮件列表</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+æ�­å–œæ‚¨ï¼Œæ‚¨çš„文档翻译现在å�¯ä»¥æ��交到邮件列表了。</div><div class='add'>+</div><div class='add'>+获å�–维护者和审阅者邮箱以å�Šé‚®ä»¶åˆ—表地å�€</div><div class='add'>+--------------------------------------</div><div class='add'>+</div><div class='add'>+内核æ��供了一个自动化脚本工具，请执行::</div><div class='add'>+</div><div class='add'>+	./scripts/get_maintainer.pl *.patch</div><div class='add'>+</div><div class='add'>+将输出的邮箱地å�€ä¿�存下æ�¥ã€‚</div><div class='add'>+</div><div class='add'>+将补ä¸�æ��交到邮件列表</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+打开上é�¢æ‚¨ä¿�存的邮件地å�€ï¼Œæ‰§è¡Œ::</div><div class='add'>+</div><div class='add'>+	git send-email *.patch --to &lt;maintainer email addr&gt; --cc &lt;others addr&gt;	#一个to对应一个地å�€ï¼Œä¸€ä¸ªcc对应一个地å�€ï¼Œæœ‰å‡ ä¸ªå°±å†™å‡ ä¸ªã€‚</div><div class='add'>+</div><div class='add'>+执行该命令时，请确ä¿�网络通常，邮件å�‘é€�æˆ�功一般会返回250。</div><div class='add'>+</div><div class='add'>+您å�¯ä»¥å…ˆå�‘é€�给自己，å°�试å�‘出的 patch 是å�¦å�¯ä»¥ç”¨ 'git am' 工具正常打上。</div><div class='add'>+如果检查正常， 您就å�¯ä»¥æ”¾å¿ƒçš„å�‘é€�到社区评审了。</div><div class='add'>+</div><div class='add'>+如果该步骤被中断，您å�¯ä»¥æ£€æŸ¥ä¸€ä¸‹ï¼Œç»§ç»­ç”¨ä¸Šæ�¡å‘½ä»¤å�‘é€�失败的补ä¸�，一定ä¸�è¦�å†�</div><div class='add'>+次å�‘é€�å·²ç»�å�‘é€�æˆ�功的补ä¸�。</div><div class='add'>+</div><div class='add'>+积æž�å�‚与审阅过程并迭代补ä¸�</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+è¡¥ä¸�æ��交到邮件列表并ä¸�代表万事大å�‰ï¼Œæ‚¨è¿˜éœ€è¦�积æž�回å¤� maintainer å’Œ</div><div class='add'>+reviewer 的评论，å�šåˆ°æ¯�æ�¡éƒ½æœ‰å›žå¤�，æ¯�个回å¤�都è�½å®žåˆ°ä½�。</div><div class='add'>+</div><div class='add'>+如何回å¤�评论</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+ - 请先将您的邮箱客户端信件回å¤�修改为 **纯文本** æ ¼å¼�，并去除所有签å��，尤其是</div><div class='add'>+   ä¼�业邮箱。</div><div class='add'>+ - 然å�Žç‚¹å‡»å›žå¤�按钮，并将è¦�回å¤�的邮件带入，</div><div class='add'>+ - 在第一æ�¡è¯„论行尾æ�¢è¡Œï¼Œè¾“入您的回å¤�</div><div class='add'>+ - 在第二æ�¡è¯„论行尾æ�¢è¡Œï¼Œè¾“入您的回å¤�</div><div class='add'>+ - 直到处ç�†å®Œæœ€å�Žä¸€æ�¡è¯„论，æ�¢è¡Œç©ºä¸¤è¡Œè¾“入问候语和署å��</div><div class='add'>+</div><div class='add'>+注æ„�，信件回å¤�请尽é‡�使用英文。</div><div class='add'>+</div><div class='add'>+迭代补ä¸�</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+建议您æ¯�回å¤�一æ�¡è¯„论，就修改一处翻译。然å�Žé‡�新生æˆ�è¡¥ä¸�，相信您现在已ç»�å…·</div><div class='add'>+备了ç�µæ´»ä½¿ç”¨ git am --amend 的能力。</div><div class='add'>+</div><div class='add'>+æ¯�次迭代一个补ä¸�，ä¸�è¦�一次多个::</div><div class='add'>+</div><div class='add'>+	git am &lt;您è¦�修改的补ä¸�&gt;</div><div class='add'>+	直接对文件进行您的修改</div><div class='add'>+	git add .</div><div class='add'>+	git commit --amend</div><div class='add'>+</div><div class='add'>+当您将所有的评论è�½å®žåˆ°ä½�å�Žï¼Œå¯¼å‡ºç¬¬äºŒç‰ˆè¡¥ä¸�，并修改å°�é�¢::</div><div class='add'>+</div><div class='add'>+	git format-patch -N  -v 2 --cover-letter --thread=shallow</div><div class='add'>+</div><div class='add'>+打开0å�·è¡¥ä¸�，在 BLURB HERE 处编写相较于上个版本，您å�šäº†å“ªäº›æ”¹åŠ¨ã€‚</div><div class='add'>+</div><div class='add'>+然å�Žæ‰§è¡Œ::</div><div class='add'>+</div><div class='add'>+	git send-email v2* --to &lt;maintainer email addr&gt; --cc &lt;others addr&gt;</div><div class='add'>+</div><div class='add'>+这样，新的一版补ä¸�å°±å�ˆå�‘é€�到邮件列表等待审阅，之å�Žå°±æ˜¯é‡�å¤�这个过程。</div><div class='add'>+</div><div class='add'>+审阅周期</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+因为有时邮件列表比较ç¹�忙，您的邮件å�¯èƒ½ä¼šè¢«æ·¹æ²¡ï¼Œå¦‚果超过两周没有得到任何</div><div class='add'>+回å¤�，请自己回å¤�自己，回å¤�的内容为 Ping.</div><div class='add'>+</div><div class='add'>+最终，如果您è�½å®žå¥½äº†æ‰€æœ‰çš„评论，并且一段时间å�Žæ²¡æœ‰æœ€æ–°çš„评论，您的补ä¸�å°†</div><div class='add'>+会先进入 Alex çš„å¼€å�‘树，然å�Žè¿›å…¥ linux-doc å¼€å�‘树，最终在下个窗å�£æ‰“å¼€</div><div class='add'>+æ—¶å�ˆå¹¶è¿› mainline 仓库。</div><div class='add'>+</div><div class='add'>+紧急处ç�†</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+如果您å�‘é€�到邮件列表之å�Žã€‚å�‘现å�‘错了补ä¸�集，尤其是在多个版本迭代的过程中；</div><div class='add'>+自己å�‘现了一些ä¸�妥的翻译；å�‘é€�错了邮件列表……</div><div class='add'>+</div><div class='add'>+git email默认会抄é€�给您一份，所以您å�¯ä»¥åˆ‡æ�¢ä¸ºå®¡é˜…者的角色审查自己的补ä¸�，</div><div class='add'>+并留下评论，æ��述有何ä¸�妥，将在下个版本怎么改，并付诸行动，é‡�æ–°æ��交，但是</div><div class='add'>+注æ„�频率，æ¯�天æ��交的次数ä¸�è¦�超过两次。</div><div class='add'>+</div><div class='add'>+新手任务</div><div class='add'>+--------</div><div class='add'>+对于首次å�‚与 Linux 内核中文文档翻译的新手，建议您在 linux 目录中è¿�行以下命令：</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	./script/checktransupdate.py -l zh_CN``</div><div class='add'>+</div><div class='add'>+该命令会列出需è¦�翻译或更新的英文文档。</div><div class='add'>+</div><div class='add'>+关于详细æ“�作说明，请å�‚考： Documentation/translations/zh_CN/doc-guide/checktransupdate.rst\</div><div class='add'>+</div><div class='add'>+进阶</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+希望您ä¸�å�ªæ˜¯å�•çº¯çš„翻译内核文档，在熟悉了一起与社区工作之å�Žï¼Œæ‚¨å�¯ä»¥å®¡é˜…其他</div><div class='add'>+å¼€å�‘者的翻译，或者æ��出具有建设性的主张。与此å�Œæ—¶ï¼Œä¸Žæ–‡æ¡£å¯¹åº”的代ç �更加有趣，</div><div class='add'>+而且需è¦�完善的地方还有很多，勇敢地去探索，然å�Žæ��交你的想法å�§ã€‚</div><div class='add'>+</div><div class='add'>+常è§�的问题</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+Maintainer回å¤�è¡¥ä¸�ä¸�能正常apply</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+这通常是因为您的补ä¸�与邮件列表其他人的补ä¸�产生了冲çª�，别人的补ä¸�先被 apply 了，</div><div class='add'>+您的补ä¸�集就无法æˆ�功 apply 了，这需è¦�您更新本地分支，在本地解决完冲çª�å�Žå†�次æ��交。</div><div class='add'>+</div><div class='add'>+请尽é‡�é�¿å…�冲çª�，ä¸�è¦�多个人å�Œæ—¶ç¿»è¯‘一个目录。翻译之å‰�å�¯ä»¥é€šè¿‡ git log 查看您感</div><div class='add'>+兴趣的目录近期有没有其他人翻译，如果有，请æ��å‰�ç§�ä¿¡è�”系对方，请求其代为å�‘é€�您</div><div class='add'>+çš„è¡¥ä¸�。如果对方未æ�¥ä¸€ä¸ªæœˆå†…没有æ��交新补ä¸�的打算，您å�¯ä»¥ç‹¬è‡ªå�‘é€�。</div><div class='add'>+</div><div class='add'>+回信被邮件列表拒收</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+大部分情况下，是由于您å�‘é€�了é�žçº¯æ–‡æœ¬æ ¼å¼�的信件，请尽é‡�é�¿å…�使用 webmail，推è��</div><div class='add'>+使用邮件客户端，比如 thunderbird，记得在设置中的回信é…�置那改为纯文本å�‘é€�。</div><div class='add'>+</div><div class='add'>+如果超过了24å°�时，您ä¾�旧没有在&lt;https://lore.kernel.org/linux-doc/&gt;å�‘现您的邮</div><div class='add'>+件，请è�”系您的网络管ç�†å‘˜å¸®å¿™è§£å†³ã€‚</div><div class='head'>diff --git a/Documentation/translations/zh_CN/index.rst b/Documentation/translations/zh_CN/index.rst<br/>index cc512ca54172..b08c09d8e96e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_CN/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/index.rst</a></div><div class='hunk'>@@ -21,18 +21,18 @@</div><div class='ctx'> 这是中文内核文档树的顶级目录。内核文档，就åƒ�内核本身一样，在很大程度上是一</div><div class='ctx'> 项正在进行的工作；当我们努力将许多分散的文件整å�ˆæˆ�一个连贯的整体时尤其如此。</div><div class='ctx'> å�¦å¤–，éš�时欢迎您对内核文档进行改进；如果您想æ��供帮助，请加入vger.kernel.org</div><div class='del'>-上的linux-doc邮件列表。</div><div class='del'>-</div><div class='del'>-顺便说下，中文文档也需è¦�é�µå®ˆå†…核编ç �风格，风格中中文和英文的主è¦�ä¸�å�Œå°±æ˜¯ä¸­æ–‡</div><div class='del'>-的字符标点å� ç”¨ä¸¤ä¸ªè‹±æ–‡å­—符宽度，所以，当英文è¦�求ä¸�è¦�超过æ¯�è¡Œ100个字符时，</div><div class='del'>-中文就ä¸�è¦�超过50个字符。å�¦å¤–，也è¦�注æ„�'-'，'='等符å�·ä¸Žç›¸å…³æ ‡é¢˜çš„对é½�。在将</div><div class='del'>-è¡¥ä¸�æ��交到社区之å‰�，一定è¦�进行必è¦�çš„ ``checkpatch.pl`` 检查和编译测试，确ä¿�</div><div class='del'>-在 ``make htmldocs/pdfdocs`` 中ä¸�增加新的告警，最å�Žï¼Œå®‰è£…检查你生æˆ�çš„</div><div class='del'>-html/pdf 文件，确认它们看起æ�¥æ˜¯æ­£å¸¸çš„。</div><div class='del'>-</div><div class='del'>-æ��交之å‰�请确认你的补ä¸�å�¯ä»¥æ­£å¸¸æ��交到中文文档维护库:</div><div class='del'>-https://git.kernel.org/pub/scm/linux/kernel/git/alexs/linux.git/</div><div class='del'>-如果你的补ä¸�ä¾�赖于其他人的补ä¸�, å�¯ä»¥ä¸Žå…¶ä»–人商é‡�å�Žç”±æŸ�一个人å�ˆå¹¶æ��交。</div><div class='add'>+上的linux-doc邮件列表，并按照Documentation/translations/zh_CN/how-to.rstçš„</div><div class='add'>+指引æ��交补ä¸�。æ��交补ä¸�之å‰�请确ä¿�执行"make htmldocsâ€�å�Žæ— ä¸Žç¿»è¯‘有关的异常输出。</div><div class='add'>+</div><div class='add'>+如何翻译内核文档</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+翻译文档本身是一件很简å�•çš„事情，但是æ��交补ä¸�需è¦�注æ„�一些细节，为了ä¿�è¯�内核中文文档的高质é‡�å�¯æŒ�ç»­å�‘展，æ��供了一份翻译指å�—。</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   how-to.rst</div><div class='ctx'> </div><div class='ctx'> 与Linux 内核社区一起工作</div><div class='ctx'> ------------------------</div><div class='head'>diff --git a/Documentation/translations/zh_CN/networking/index.rst b/Documentation/translations/zh_CN/networking/index.rst<br/>new file mode 100644<br/>index 000000000000..d07dd69f980b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/networking/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/networking/index.rst</a></div><div class='hunk'>@@ -0,0 +1,160 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. include:: ../disclaimer-zh_CN.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/networking/index.rst</div><div class='add'>+</div><div class='add'>+:翻译:</div><div class='add'>+</div><div class='add'>+ 王亚鑫 Wang Yaxin &lt;wang.yaxin@zte.com.cn&gt;</div><div class='add'>+</div><div class='add'>+:校译:</div><div class='add'>+</div><div class='add'>+网络</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+有关网络设备（netdev）开å�‘过程的详细指å�—，请å�‚考：:ref:`netdev-FAQ`</div><div class='add'>+</div><div class='add'>+目录：</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   msg_zerocopy</div><div class='add'>+</div><div class='add'>+Todolist:</div><div class='add'>+</div><div class='add'>+*   af_xdp</div><div class='add'>+*   bareudp</div><div class='add'>+*   batman-adv</div><div class='add'>+*   can</div><div class='add'>+*   can_ucan_protocol</div><div class='add'>+*   device_drivers/index</div><div class='add'>+*   diagnostic/index</div><div class='add'>+*   dsa/index</div><div class='add'>+*   devlink/index</div><div class='add'>+*   caif/index</div><div class='add'>+*   ethtool-netlink</div><div class='add'>+*   ieee802154</div><div class='add'>+*   iso15765-2</div><div class='add'>+*   j1939</div><div class='add'>+*   kapi</div><div class='add'>+*   failover</div><div class='add'>+*   net_dim</div><div class='add'>+*   net_failover</div><div class='add'>+*   page_pool</div><div class='add'>+*   phy</div><div class='add'>+*   sfp-phylink</div><div class='add'>+*   alias</div><div class='add'>+*   bridge</div><div class='add'>+*   snmp_counter</div><div class='add'>+*   checksum-offloads</div><div class='add'>+*   segmentation-offloads</div><div class='add'>+*   scaling</div><div class='add'>+*   tls</div><div class='add'>+*   tls-offload</div><div class='add'>+*   tls-handshake</div><div class='add'>+*   nfc</div><div class='add'>+*   6lowpan</div><div class='add'>+*   6pack</div><div class='add'>+*   arcnet-hardware</div><div class='add'>+*   arcnet</div><div class='add'>+*   atm</div><div class='add'>+*   ax25</div><div class='add'>+*   bonding</div><div class='add'>+*   cdc_mbim</div><div class='add'>+*   dccp</div><div class='add'>+*   dctcp</div><div class='add'>+*   devmem</div><div class='add'>+*   dns_resolver</div><div class='add'>+*   driver</div><div class='add'>+*   eql</div><div class='add'>+*   fib_trie</div><div class='add'>+*   filter</div><div class='add'>+*   generic-hdlc</div><div class='add'>+*   generic_netlink</div><div class='add'>+*   netlink_spec/index</div><div class='add'>+*   gen_stats</div><div class='add'>+*   gtp</div><div class='add'>+*   ila</div><div class='add'>+*   ioam6-sysctl</div><div class='add'>+*   ip_dynaddr</div><div class='add'>+*   ipsec</div><div class='add'>+*   ip-sysctl</div><div class='add'>+*   ipv6</div><div class='add'>+*   ipvlan</div><div class='add'>+*   ipvs-sysctl</div><div class='add'>+*   kcm</div><div class='add'>+*   l2tp</div><div class='add'>+*   lapb-module</div><div class='add'>+*   mac80211-injection</div><div class='add'>+*   mctp</div><div class='add'>+*   mpls-sysctl</div><div class='add'>+*   mptcp</div><div class='add'>+*   mptcp-sysctl</div><div class='add'>+*   multiqueue</div><div class='add'>+*   multi-pf-netdev</div><div class='add'>+*   napi</div><div class='add'>+*   net_cachelines/index</div><div class='add'>+*   netconsole</div><div class='add'>+*   netdev-features</div><div class='add'>+*   netdevices</div><div class='add'>+*   netfilter-sysctl</div><div class='add'>+*   netif-msg</div><div class='add'>+*   netmem</div><div class='add'>+*   nexthop-group-resilient</div><div class='add'>+*   nf_conntrack-sysctl</div><div class='add'>+*   nf_flowtable</div><div class='add'>+*   oa-tc6-framework</div><div class='add'>+*   openvswitch</div><div class='add'>+*   operstates</div><div class='add'>+*   packet_mmap</div><div class='add'>+*   phonet</div><div class='add'>+*   phy-link-topology</div><div class='add'>+*   pktgen</div><div class='add'>+*   plip</div><div class='add'>+*   ppp_generic</div><div class='add'>+*   proc_net_tcp</div><div class='add'>+*   pse-pd/index</div><div class='add'>+*   radiotap-headers</div><div class='add'>+*   rds</div><div class='add'>+*   regulatory</div><div class='add'>+*   representors</div><div class='add'>+*   rxrpc</div><div class='add'>+*   sctp</div><div class='add'>+*   secid</div><div class='add'>+*   seg6-sysctl</div><div class='add'>+*   skbuff</div><div class='add'>+*   smc-sysctl</div><div class='add'>+*   sriov</div><div class='add'>+*   statistics</div><div class='add'>+*   strparser</div><div class='add'>+*   switchdev</div><div class='add'>+*   sysfs-tagging</div><div class='add'>+*   tc-actions-env-rules</div><div class='add'>+*   tc-queue-filters</div><div class='add'>+*   tcp_ao</div><div class='add'>+*   tcp-thin</div><div class='add'>+*   team</div><div class='add'>+*   timestamping</div><div class='add'>+*   tipc</div><div class='add'>+*   tproxy</div><div class='add'>+*   tuntap</div><div class='add'>+*   udplite</div><div class='add'>+*   vrf</div><div class='add'>+*   vxlan</div><div class='add'>+*   x25</div><div class='add'>+*   x25-iface</div><div class='add'>+*   xfrm_device</div><div class='add'>+*   xfrm_proc</div><div class='add'>+*   xfrm_sync</div><div class='add'>+*   xfrm_sysctl</div><div class='add'>+*   xdp-rx-metadata</div><div class='add'>+*   xsk-tx-metadata</div><div class='add'>+</div><div class='add'>+.. only::  subproject and html</div><div class='add'>+</div><div class='add'>+   Indices</div><div class='add'>+   =======</div><div class='add'>+</div><div class='add'>+   * :ref:`genindex`</div><div class='head'>diff --git a/Documentation/translations/zh_CN/networking/msg_zerocopy.rst b/Documentation/translations/zh_CN/networking/msg_zerocopy.rst<br/>new file mode 100644<br/>index 000000000000..821b32c4d1bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_CN/networking/msg_zerocopy.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_CN/networking/msg_zerocopy.rst</a></div><div class='hunk'>@@ -0,0 +1,223 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. include:: ../disclaimer-zh_CN.rst</div><div class='add'>+</div><div class='add'>+:Original: Documentation/networking/msg_zerocopy.rst</div><div class='add'>+</div><div class='add'>+:翻译:</div><div class='add'>+</div><div class='add'>+   王亚鑫 Wang Yaxin &lt;wang.yaxin@zte.com.cn&gt;</div><div class='add'>+</div><div class='add'>+:校译:</div><div class='add'>+</div><div class='add'>+   - å¾�é‘« xu xin &lt;xu.xin16@zte.com.cn&gt;</div><div class='add'>+   - 何é…�æž— He Peilin &lt;he.peilin@zte.com.cn&gt;</div><div class='add'>+</div><div class='add'>+============</div><div class='add'>+MSG_ZEROCOPY</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+简介</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+MSG_ZEROCOPY 标志用于å�¯ç”¨å¥—接字å�‘é€�调用的å…�æ‹·è´�功能。该功能目å‰�适用于 TCPã€�UDP å’Œ VSOCK</div><div class='add'>+（使用 virtio 传输）套接字。</div><div class='add'>+</div><div class='add'>+机é�‡ä¸Žæ³¨æ„�事项</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+在用户进程与内核之间拷è´�大型缓冲区å�¯èƒ½ä¼šæ¶ˆè€—大é‡�资æº�。Linux 支æŒ�多ç§�å…�æ‹·è´�的接å�£ï¼Œå¦‚sendfile</div><div class='add'>+å’Œ splice。MSG_ZEROCOPY 标志将底层的拷è´�é�¿å…�机制扩展到了常è§�的套接字å�‘é€�调用中。</div><div class='add'>+</div><div class='add'>+å…�æ‹·è´�并é�žæ¯«æ— ä»£ä»·ã€‚在实现上，它通过页é�¢å›ºå®šï¼ˆpage pinning）将按字节拷è´�çš„æˆ�本替æ�¢ä¸ºé¡µé�¢ç»Ÿè®¡</div><div class='add'>+（page accounting）和完æˆ�通知的开销。因此，MSG_ZEROCOPY 通常仅在写入é‡�超过大约 10 KB æ—¶</div><div class='add'>+æ‰�有效。</div><div class='add'>+</div><div class='add'>+页é�¢å›ºå®šè¿˜ä¼šæ”¹å�˜ç³»ç»Ÿè°ƒç”¨çš„语义。它会暂时在进程和网络堆栈之间共享缓冲区。与拷è´�ä¸�å�Œï¼Œè¿›ç¨‹åœ¨ç³»ç»Ÿ</div><div class='add'>+调用返回å�Žä¸�能立å�³è¦†ç›–缓冲区，å�¦åˆ™å�¯èƒ½ä¼šä¿®æ”¹æ­£åœ¨ä¼ è¾“中的数æ�®ã€‚内核的完整性ä¸�会å�—到影å“�，但有缺</div><div class='add'>+陷的程åº�å�¯èƒ½ä¼šç ´å��自己的数æ�®æµ�。</div><div class='add'>+</div><div class='add'>+当内核返回数æ�®å�¯ä»¥å®‰å…¨ä¿®æ”¹çš„通知时，进程æ‰�å�¯ä»¥ä¿®æ”¹æ•°æ�®ã€‚因此，将现有应用程åº�转æ�¢ä¸ºä½¿ç”¨</div><div class='add'>+MSG_ZEROCOPY 并é�žæ€»æ˜¯åƒ�简å�•åœ°ä¼ é€’该标志那样容易。</div><div class='add'>+</div><div class='add'>+更多信æ�¯</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+本文档的大部分内容是æ�¥è‡ªäºŽ netdev 2.1 上å�‘表的一篇长篇论文。如需更深入的信æ�¯ï¼Œè¯·å�‚阅该论文和</div><div class='add'>+演讲，或者æµ�览 LWN.net 上的精彩报é�“，也å�¯ä»¥ç›´æŽ¥é˜…读æº�ç �。</div><div class='add'>+</div><div class='add'>+  论文ã€�å¹»ç�¯ç‰‡ã€�视频：</div><div class='add'>+    https://netdevconf.org/2.1/session.html?debruijn</div><div class='add'>+</div><div class='add'>+  LWN 文章：</div><div class='add'>+    https://lwn.net/Articles/726917/</div><div class='add'>+</div><div class='add'>+  è¡¥ä¸�集：</div><div class='add'>+    [PATCH net-next v4 0/9] socket sendmsg MSG_ZEROCOPY</div><div class='add'>+    https://lore.kernel.org/netdev/20170803202945.70750-1-willemdebruijn.kernel@gmail.com</div><div class='add'>+</div><div class='add'>+接å�£</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+传递 MSG_ZEROCOPY 标志是å�¯ç”¨å…�æ‹·è´�功能的最明显步骤，但并é�žå”¯ä¸€çš„步骤。</div><div class='add'>+</div><div class='add'>+套接字设置</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+当应用程åº�å�‘ send 系统调用传递未定义的标志时，内核通常会宽容对待。默认情况下，它会简å�•åœ°å¿½ç•¥</div><div class='add'>+这些标志。为了é�¿å…�为那些å�¶ç„¶ä¼ é€’此标志的é�—留进程å�¯ç”¨å…�æ‹·è´�模å¼�，进程必须首先通过设置套接字选项</div><div class='add'>+æ�¥è¡¨æ˜Žæ„�图：</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	if (setsockopt(fd, SOL_SOCKET, SO_ZEROCOPY, &amp;one, sizeof(one)))</div><div class='add'>+		error(1, errno, "setsockopt zerocopy");</div><div class='add'>+</div><div class='add'>+传输</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+对 send（或 sendtoã€�sendmsgã€�sendmmsg）本身的改动é�žå¸¸ç®€å�•ã€‚å�ªéœ€ä¼ é€’新的标志å�³å�¯ã€‚</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	ret = send(fd, buf, sizeof(buf), MSG_ZEROCOPY);</div><div class='add'>+</div><div class='add'>+如果零拷è´�æ“�作失败，将返回 -1，并设置 errno 为 ENOBUFS。这ç§�情况å�¯èƒ½å�‘生在套接字超出其</div><div class='add'>+optmem é™�制，或者用户超出其é”�定页é�¢çš„ ulimit 时。</div><div class='add'>+</div><div class='add'>+æ··å�ˆä½¿ç”¨å…�æ‹·è´�和拷è´�</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+许多工作负载å�Œæ—¶åŒ…å�«å¤§åž‹å’Œå°�型缓冲区。由于对于å°�æ•°æ�®åŒ…æ�¥è¯´ï¼Œå…�æ‹·è´�çš„æˆ�本高于拷è´�，因此该</div><div class='add'>+功能是通过标志实现的。带有标志的调用和没有标志的调用å�¯ä»¥å®‰å…¨åœ°æ··å�ˆä½¿ç”¨ã€‚</div><div class='add'>+</div><div class='add'>+通知</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+当内核认为å�¯ä»¥å®‰å…¨åœ°é‡�用之å‰�传递的缓冲区时，它必须通知进程。完æˆ�通知在套接字的错误队列上</div><div class='add'>+排队，类似于传输时间戳接å�£ã€‚</div><div class='add'>+</div><div class='add'>+通知本身是一个简å�•çš„æ ‡é‡�值。æ¯�个套接字都维护一个内部的无符å�· 32 ä½�计数器。æ¯�次带有</div><div class='add'>+MSG_ZEROCOPY 标志的 send 调用æˆ�功å�‘é€�æ•°æ�®æ—¶ï¼Œè®¡æ•°å™¨éƒ½ä¼šå¢žåŠ ã€‚如果调用失败或长度为零，</div><div class='add'>+则计数器ä¸�会增加。该计数器统计系统调用的调用次数，而ä¸�是字节数。在 UINT_MAX 次调用å�Žï¼Œ</div><div class='add'>+计数器会循环。</div><div class='add'>+</div><div class='add'>+通知接收</div><div class='add'>+~~~~~~~~</div><div class='add'>+</div><div class='add'>+下é�¢çš„代ç �片段展示了 API 的使用。在最简å�•çš„情况下，æ¯�次 send 系统调用å�Žï¼Œéƒ½ä¼šå¯¹é”™è¯¯é˜Ÿåˆ—</div><div class='add'>+进行轮询和 recvmsg 调用。</div><div class='add'>+</div><div class='add'>+从错误队列读å�–始终是一个é�žé˜»å¡žæ“�作。poll 调用用于阻塞，直到出现错误。它会在其输出标志中</div><div class='add'>+设置 POLLERR。该标志ä¸�需è¦�在 events 字段中设置。错误会无æ�¡ä»¶åœ°å�‘出信å�·ã€‚</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	pfd.fd = fd;</div><div class='add'>+	pfd.events = 0;</div><div class='add'>+	if (poll(&amp;pfd, 1, -1) != 1 || pfd.revents &amp; POLLERR == 0)</div><div class='add'>+		error(1, errno, "poll");</div><div class='add'>+</div><div class='add'>+	ret = recvmsg(fd, &amp;msg, MSG_ERRQUEUE);</div><div class='add'>+	if (ret == -1)</div><div class='add'>+		error(1, errno, "recvmsg");</div><div class='add'>+</div><div class='add'>+read_notification(msg);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+这个示例仅用于演示目的。在实际应用中，ä¸�等待通知，而是æ¯�隔几次 send 调用就进行一次é�žé˜»å¡ž</div><div class='add'>+读å�–会更高效。</div><div class='add'>+</div><div class='add'>+零拷è´�通知å�¯ä»¥ä¸Žå…¶ä»–套接字æ“�作乱åº�处ç�†ã€‚通常，拥有错误队列套接字会阻塞其他æ“�作，直到错误</div><div class='add'>+被读å�–。然而，零拷è´�通知具有零错误代ç �，因此ä¸�会阻塞 send å’Œ recv 调用。</div><div class='add'>+</div><div class='add'>+通知批处ç�†</div><div class='add'>+~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+å�¯ä»¥ä½¿ç”¨ recvmmsg 调用æ�¥ä¸€æ¬¡æ€§è¯»å�–多个未决的数æ�®åŒ…。这通常ä¸�是必需的。在æ¯�æ�¡æ¶ˆæ�¯ä¸­ï¼Œå†…æ ¸</div><div class='add'>+返回的ä¸�是一个å�•ä¸€çš„值，而是一个范围。当错误队列上有一个通知正在等待接收时，它会将连续的通</div><div class='add'>+知å�ˆå¹¶èµ·æ�¥ã€‚</div><div class='add'>+</div><div class='add'>+当一个新的通知å�³å°†è¢«æŽ’队时，它会检查队列尾部的通知的范围是å�¦å�¯ä»¥æ‰©å±•ä»¥åŒ…å�«æ–°çš„值。如果是这</div><div class='add'>+样，它会丢弃新的通知数æ�®åŒ…，并增大未处ç�†é€šçŸ¥çš„范围上é™�值。</div><div class='add'>+</div><div class='add'>+对于按顺åº�确认数æ�®çš„å��议（如 TCP），æ¯�个通知都å�¯ä»¥å�ˆå¹¶åˆ°å‰�一个通知中，因此在任何时候在等待</div><div class='add'>+的通知都ä¸�会超过一个。</div><div class='add'>+</div><div class='add'>+有åº�交付是常è§�的情况，但ä¸�能ä¿�è¯�。在é‡�传和套接字拆除时，通知å�¯èƒ½ä¼šä¹±åº�到达。</div><div class='add'>+</div><div class='add'>+通知解æž�</div><div class='add'>+~~~~~~~~</div><div class='add'>+</div><div class='add'>+下é�¢çš„代ç �片段演示了如何解æž�控制消æ�¯ï¼šå‰�é�¢ä»£ç �片段中的 read_notification() 调用。通知</div><div class='add'>+以标准错误格å¼� sock_extended_err ç¼–ç �。</div><div class='add'>+</div><div class='add'>+控制数æ�®ä¸­çš„级别和类型字段是å��è®®æ—�特定的，对于 TCP 或 UDP 套接字，分别为 IP_RECVERR 或</div><div class='add'>+IPV6_RECVERR。对于 VSOCK 套接字，cmsg_level 为 SOL_VSOCK，cmsg_type 为 VSOCK_RECVERR。</div><div class='add'>+</div><div class='add'>+错误æ�¥æº�是新的类型 SO_EE_ORIGIN_ZEROCOPY。如å‰�所述，ee_errno 为零，以é�¿å…�在套接字上</div><div class='add'>+阻塞地读å�–和写入系统调用。</div><div class='add'>+</div><div class='add'>+32 ä½�通知范围编ç �为 [ee_info, ee_data]。这个范围是包å�«è¾¹ç•Œå€¼çš„。除了下é�¢è®¨è®ºçš„ ee_code</div><div class='add'>+字段外，结构中的其他字段应被视为未定义的。</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	struct sock_extended_err *serr;</div><div class='add'>+	struct cmsghdr *cm;</div><div class='add'>+</div><div class='add'>+	cm = CMSG_FIRSTHDR(msg);</div><div class='add'>+	if (cm-&gt;cmsg_level != SOL_IP &amp;&amp;</div><div class='add'>+		cm-&gt;cmsg_type != IP_RECVERR)</div><div class='add'>+		error(1, 0, "cmsg");</div><div class='add'>+</div><div class='add'>+	serr = (void *) CMSG_DATA(cm);</div><div class='add'>+	if (serr-&gt;ee_errno != 0 ||</div><div class='add'>+		serr-&gt;ee_origin != SO_EE_ORIGIN_ZEROCOPY)</div><div class='add'>+		error(1, 0, "serr");</div><div class='add'>+</div><div class='add'>+printf("completed: %u..%u\n", serr-&gt;ee_info, serr-&gt;ee_data);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+延迟拷è´�</div><div class='add'>+~~~~~~~~</div><div class='add'>+</div><div class='add'>+传递标志 MSG_ZEROCOPY 是å�‘内核å�‘出的一个æ��示，让内核采用å…�æ‹·è´�的策略，å�Œæ—¶ä¹Ÿæ˜¯ä¸€ç§�约</div><div class='add'>+定，å�³å†…核会对完æˆ�通知进行排队处ç�†ã€‚但这并ä¸�ä¿�è¯�æ‹·è´�æ“�作一定会被çœ�略。</div><div class='add'>+</div><div class='add'>+æ‹·è´�é�¿å…�ä¸�总是适用的。ä¸�支æŒ�分散/è�šé›† I/O 的设备无法å�‘é€�由内核生æˆ�çš„å��议头加上零拷è´�用户</div><div class='add'>+æ•°æ�®ç»„æˆ�çš„æ•°æ�®åŒ…。数æ�®åŒ…å�¯èƒ½éœ€è¦�在å��议栈底层转æ�¢ä¸ºä¸€ä»½ç§�有数æ�®å‰¯æœ¬ï¼Œä¾‹å¦‚用于计算校验和。</div><div class='add'>+</div><div class='add'>+在所有这些情况下，当内核释放对共享页é�¢çš„æŒ�有æ�ƒæ—¶ï¼Œå®ƒä¼šè¿”回一个完æˆ�通知。该通知å�¯èƒ½åœ¨ï¼ˆå·²</div><div class='add'>+æ‹·è´�）数æ�®å®Œå…¨ä¼ è¾“之å‰�到达。因此。零拷è´�完æˆ�通知并ä¸�是传输完æˆ�通知。</div><div class='add'>+</div><div class='add'>+如果数æ�®ä¸�在缓存中，延迟拷è´�å�¯èƒ½ä¼šæ¯”ç«‹å�³åœ¨ç³»ç»Ÿè°ƒç”¨ä¸­æ‹·è´�开销更大。进程还会因通知处ç�†è€Œäº§</div><div class='add'>+生æˆ�本，但å�´æ²¡æœ‰å¸¦æ�¥ä»»ä½•å¥½å¤„。因此，内核会在返回时通过在 ee_code 字段中设置标志</div><div class='add'>+SO_EE_CODE_ZEROCOPY_COPIED æ�¥æŒ‡ç¤ºæ•°æ�®æ˜¯å�¦ä»¥æ‹·è´�çš„æ–¹å¼�完æˆ�。进程å�¯ä»¥åˆ©ç”¨è¿™ä¸ªä¿¡å�·ï¼Œåœ¨</div><div class='add'>+å�Œä¸€å¥—接字上å�Žç»­çš„请求中å�œæ­¢ä¼ é€’ MSG_ZEROCOPY 标志。</div><div class='add'>+</div><div class='add'>+实现</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+环回</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+对于 TCP å’Œ UDP：</div><div class='add'>+如果接收进程ä¸�读å�–其套接字，å�‘é€�到本地套接字的数æ�®å�¯èƒ½ä¼šæ— é™�期排队。无é™�期的通知延迟是ä¸�</div><div class='add'>+å�¯æŽ¥å�—的。因此，所有使用 MSG_ZEROCOPY 生æˆ�并环回到本地套接字的数æ�®åŒ…都将产生延迟拷è´�。</div><div class='add'>+这包括环回到数æ�®åŒ…套接字（例如，tcpdump）和 tun 设备。</div><div class='add'>+</div><div class='add'>+对于 VSOCK：</div><div class='add'>+å�‘é€�到本地套接字的数æ�®è·¯å¾„与é�žæœ¬åœ°å¥—接字相å�Œã€‚</div><div class='add'>+</div><div class='add'>+测试</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+更具体的示例代ç �å�¯ä»¥åœ¨å†…æ ¸æº�ç �çš„ tools/testing/selftests/net/msg_zerocopy.c 中找到。</div><div class='add'>+</div><div class='add'>+è¦�ç•™æ„�环回约æ�Ÿé—®é¢˜ã€‚该测试å�¯ä»¥åœ¨ä¸€å¯¹ä¸»æœºä¹‹é—´è¿›è¡Œã€‚但如果是在本地的一对进程之间è¿�行，例如当使用</div><div class='add'>+msg_zerocopy.sh 脚本在跨命å��空间的虚拟以太网（veth）对之间è¿�行时，测试将ä¸�会显示出任何性能</div><div class='add'>+æ��å�‡ã€‚为了便于测试，å�¯ä»¥é€šè¿‡è®© skb_orphan_frags_rx 与 skb_orphan_frags 相å�Œï¼Œæ�¥æš‚时放宽</div><div class='add'>+环回é™�制。</div><div class='add'>+</div><div class='add'>+对于 VSOCK 类型套接字的示例å�¯ä»¥åœ¨ tools/testing/vsock/vsock_test_zerocopy.c 中找到。</div><div class='head'>diff --git a/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst b/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst<br/>index b25ecc44d735..80ea5677ee52 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_TW/admin-guide/bug-hunting.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/admin-guide/bug-hunting.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_TW/admin-guide/bug-hunting.rst</a></div><div class='hunk'>@@ -191,7 +191,7 @@ objdump</div><div class='ctx'> 編行。如果沒有調試符號，您將看到所示例程的彙編程åº�代碼，但是如果內核有調試</div><div class='ctx'> 符號，C代碼也將å�¯è¦‹ï¼ˆèª¿è©¦ç¬¦è™Ÿå�¯ä»¥åœ¨å…§æ ¸é…�ç½®è�œå–®çš„hacking項中啓用）。例如::</div><div class='ctx'> </div><div class='del'>-    $ objdump -r -S -l --disassemble net/dccp/ipv4.o</div><div class='add'>+    $ objdump -r -S -l --disassemble net/ipv4/tcp.o</div><div class='ctx'> </div><div class='ctx'> .. note::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst b/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst<br/>index 422fe9f7a3f2..a1e4517dc601 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/translations/zh_TW/arch/openrisc/openrisc_port.rst</a></div><div class='hunk'>@@ -17,10 +17,10 @@ OpenRISC 1000系列（或1k）。</div><div class='ctx'> </div><div class='ctx'> 關於OpenRISC處ç�†å™¨å’Œæ­£åœ¨é€²è¡Œä¸­çš„開發的信æ�¯:</div><div class='ctx'> </div><div class='del'>-	=======		=============================</div><div class='add'>+	=======		==============================</div><div class='ctx'> 	網站		https://openrisc.io</div><div class='del'>-	郵箱		openrisc@lists.librecores.org</div><div class='del'>-	=======		=============================</div><div class='add'>+	郵箱		linux-openrisc@vger.kernel.org</div><div class='add'>+	=======		==============================</div><div class='ctx'> </div><div class='ctx'> ---------------------------------------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -36,11 +36,11 @@ OpenRISC工具é�ˆå’ŒLinux的構建指å�—</div><div class='ctx'> 工具é�ˆçš„構建指å�—å�¯ä»¥åœ¨openrisc.io或Stafford的工具é�ˆæ§‹å»ºå’Œç™¼ä½ˆè…³æœ¬</div><div class='ctx'> 中找到。</div><div class='ctx'> </div><div class='del'>-	======      =================================================</div><div class='del'>-	二進制      https://github.com/openrisc/or1k-gcc/releases</div><div class='add'>+	======      ==========================================================</div><div class='add'>+	二進制      https://github.com/stffrdhrn/or1k-toolchain-build/releases</div><div class='ctx'> 	工具é�ˆ      https://openrisc.io/software</div><div class='ctx'> 	構建        https://github.com/stffrdhrn/or1k-toolchain-build</div><div class='del'>-	======      =================================================</div><div class='add'>+	======      ==========================================================</div><div class='ctx'> </div><div class='ctx'> 2) 構建</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst<br/>index 7a1409ecc238..3d1171fd96c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/userspace-api/ioctl/ioctl-number.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/ioctl/ioctl-number.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/ioctl/ioctl-number.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/userspace-api/ioctl/ioctl-number.rst</a></div><div class='hunk'>@@ -28,10 +28,10 @@ or number from the table below.  Because of the large number of drivers,</div><div class='ctx'> many drivers share a partial letter with other drivers.</div><div class='ctx'> </div><div class='ctx'> If you are writing a driver for a new device and need a letter, pick an</div><div class='del'>-unused block with enough room for expansion: 32 to 256 ioctl commands.</div><div class='del'>-You can register the block by patching this file and submitting the</div><div class='del'>-patch to Linus Torvalds.  Or you can e-mail me at &lt;mec@shout.net&gt; and</div><div class='del'>-I'll register one for you.</div><div class='add'>+unused block with enough room for expansion: 32 to 256 ioctl commands</div><div class='add'>+should suffice. You can register the block by patching this file and</div><div class='add'>+submitting the patch through :doc:`usual patch submission process</div><div class='add'>+&lt;/process/submitting-patches&gt;`.</div><div class='ctx'> </div><div class='ctx'> The second argument to _IO, _IOW, _IOR, or _IOWR is a sequence number</div><div class='ctx'> to distinguish ioctls from each other.  The third argument to _IOW,</div><div class='hunk'>@@ -62,9 +62,8 @@ Following this convention is good because:</div><div class='ctx'> (5) When following the convention, the driver code can use generic</div><div class='ctx'>     code to copy the parameters between user and kernel space.</div><div class='ctx'> </div><div class='del'>-This table lists ioctls visible from user land for Linux/x86.  It contains</div><div class='del'>-most drivers up to 2.6.31, but I know I am missing some.  There has been</div><div class='del'>-no attempt to list non-X86 architectures or ioctls from drivers/staging/.</div><div class='add'>+This table lists ioctls visible from userland, excluding ones from</div><div class='add'>+drivers/staging/.</div><div class='ctx'> </div><div class='ctx'> ====  =====  ======================================================= ================================================================</div><div class='ctx'> Code  Seq#    Include File                                           Comments</div><div class='hunk'>@@ -366,6 +365,12 @@ Code  Seq#    Include File                                           Comments</div><div class='ctx'>                                                                      &lt;mailto:linuxppc-dev&gt;</div><div class='ctx'> 0xB2  01-02  arch/powerpc/include/uapi/asm/papr-sysparm.h            powerpc/pseries system parameter API</div><div class='ctx'>                                                                      &lt;mailto:linuxppc-dev&gt;</div><div class='add'>+0xB2  03-05  arch/powerpc/include/uapi/asm/papr-indices.h            powerpc/pseries indices API</div><div class='add'>+                                                                     &lt;mailto:linuxppc-dev&gt;</div><div class='add'>+0xB2  06-07  arch/powerpc/include/uapi/asm/papr-platform-dump.h      powerpc/pseries Platform Dump API</div><div class='add'>+                                                                     &lt;mailto:linuxppc-dev&gt;</div><div class='add'>+0xB2  08     powerpc/include/uapi/asm/papr-physical-attestation.h    powerpc/pseries Physical Attestation API</div><div class='add'>+                                                                     &lt;mailto:linuxppc-dev&gt;</div><div class='ctx'> 0xB3  00     linux/mmc/ioctl.h</div><div class='ctx'> 0xB4  00-0F  linux/gpio.h                                            &lt;mailto:linux-gpio@vger.kernel.org&gt;</div><div class='ctx'> 0xB5  00-0F  uapi/linux/rpmsg.h                                      &lt;mailto:linux-remoteproc@vger.kernel.org&gt;</div><div class='head'>diff --git a/Documentation/userspace-api/media/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst<br/>index 86ffb3bc8ade..bb6876cfc271 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/userspace-api/media/v4l/meta-formats.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/media/v4l/meta-formats.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/media/v4l/meta-formats.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/userspace-api/media/v4l/meta-formats.rst</a></div><div class='hunk'>@@ -12,6 +12,7 @@ These formats are used for the :ref:`metadata` interface only.</div><div class='ctx'> .. toctree::</div><div class='ctx'>     :maxdepth: 1</div><div class='ctx'> </div><div class='add'>+    metafmt-c3-isp</div><div class='ctx'>     metafmt-d4xx</div><div class='ctx'>     metafmt-generic</div><div class='ctx'>     metafmt-intel-ipu3</div><div class='head'>diff --git a/Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst b/Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst<br/>new file mode 100644<br/>index 000000000000..449b45c2ec24<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+.. SPDX-License-Identifier: (GPL-2.0-only OR MIT)</div><div class='add'>+</div><div class='add'>+.. _v4l2-meta-fmt-c3isp-stats:</div><div class='add'>+.. _v4l2-meta-fmt-c3isp-params:</div><div class='add'>+</div><div class='add'>+***********************************************************************</div><div class='add'>+V4L2_META_FMT_C3ISP_STATS ('C3ST'), V4L2_META_FMT_C3ISP_PARAMS ('C3PM')</div><div class='add'>+***********************************************************************</div><div class='add'>+</div><div class='add'>+.. c3_isp_stats_info</div><div class='add'>+</div><div class='add'>+3A Statistics</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+The C3 ISP can collect different statistics over an input Bayer frame.</div><div class='add'>+Those statistics are obtained from the "c3-isp-stats" metadata capture video nodes,</div><div class='add'>+using the :c:type:`v4l2_meta_format` interface.</div><div class='add'>+They are formatted as described by the :c:type:`c3_isp_stats_info` structure.</div><div class='add'>+</div><div class='add'>+The statistics collected are  Auto-white balance,</div><div class='add'>+Auto-exposure and Auto-focus information.</div><div class='add'>+</div><div class='add'>+.. c3_isp_params_cfg</div><div class='add'>+</div><div class='add'>+Configuration Parameters</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+The configuration parameters are passed to the c3-isp-params metadata output video node,</div><div class='add'>+using the :c:type:`v4l2_meta_format` interface. Rather than a single struct containing</div><div class='add'>+sub-structs for each configurable area of the ISP, parameters for the C3-ISP</div><div class='add'>+are defined as distinct structs or "blocks" which may be added to the data</div><div class='add'>+member of :c:type:`c3_isp_params_cfg`. Userspace is responsible for</div><div class='add'>+populating the data member with the blocks that need to be configured by the driver, but</div><div class='add'>+need not populate it with **all** the blocks, or indeed with any at all if there</div><div class='add'>+are no configuration changes to make. Populated blocks **must** be consecutive</div><div class='add'>+in the buffer. To assist both userspace and the driver in identifying the</div><div class='add'>+blocks each block-specific struct embeds</div><div class='add'>+:c:type:`c3_isp_params_block_header` as its first member and userspace</div><div class='add'>+must populate the type member with a value from</div><div class='add'>+:c:type:`c3_isp_params_block_type`. Once the blocks have been populated</div><div class='add'>+into the data buffer, the combined size of all populated blocks shall be set in</div><div class='add'>+the data_size member of :c:type:`c3_isp_params_cfg`. For example:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct c3_isp_params_cfg *params =</div><div class='add'>+		(struct c3_isp_params_cfg *)buffer;</div><div class='add'>+</div><div class='add'>+	params-&gt;version = C3_ISP_PARAM_BUFFER_V0;</div><div class='add'>+	params-&gt;data_size = 0;</div><div class='add'>+</div><div class='add'>+	void *data = (void *)params-&gt;data;</div><div class='add'>+</div><div class='add'>+	struct c3_isp_params_awb_gains *gains =</div><div class='add'>+		(struct c3_isp_params_awb_gains *)data;</div><div class='add'>+</div><div class='add'>+	gains-&gt;header.type = C3_ISP_PARAMS_BLOCK_AWB_GAINS;</div><div class='add'>+	gains-&gt;header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE;</div><div class='add'>+	gains-&gt;header.size = sizeof(struct c3_isp_params_awb_gains);</div><div class='add'>+</div><div class='add'>+	gains-&gt;gr_gain = 256;</div><div class='add'>+	gains-&gt;r_gain = 256;</div><div class='add'>+	gains-&gt;b_gain = 256;</div><div class='add'>+	gains-&gt;gb_gain = 256;</div><div class='add'>+</div><div class='add'>+	data += sizeof(struct c3_isp__params_awb_gains);</div><div class='add'>+	params-&gt;data_size += sizeof(struct c3_isp_params_awb_gains);</div><div class='add'>+</div><div class='add'>+	struct c3_isp_params_awb_config *awb_cfg =</div><div class='add'>+		(struct c3_isp_params_awb_config *)data;</div><div class='add'>+</div><div class='add'>+	awb_cfg-&gt;header.type = C3_ISP_PARAMS_BLOCK_AWB_CONFIG;</div><div class='add'>+	awb_cfg-&gt;header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE;</div><div class='add'>+	awb_cfg-&gt;header.size = sizeof(struct c3_isp_params_awb_config);</div><div class='add'>+</div><div class='add'>+	awb_cfg-&gt;tap_point = C3_ISP_AWB_STATS_TAP_BEFORE_WB;</div><div class='add'>+	awb_cfg-&gt;satur = 1;</div><div class='add'>+	awb_cfg-&gt;horiz_zones_num = 32;</div><div class='add'>+	awb_cfg-&gt;vert_zones_num = 24;</div><div class='add'>+</div><div class='add'>+	params-&gt;data_size += sizeof(struct c3_isp_params_awb_config);</div><div class='add'>+</div><div class='add'>+Amlogic C3 ISP uAPI data types</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/media/amlogic/c3-isp-config.h</div><div class='head'>diff --git a/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst b/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst<br/>index b788f6933855..6e4f399f1f88 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/userspace-api/media/v4l/pixfmt-yuv-planar.rst</a></div><div class='hunk'>@@ -137,6 +137,13 @@ All components are stored with the same number of bits per component.</div><div class='ctx'>       - Cb, Cr</div><div class='ctx'>       - No</div><div class='ctx'>       - Linear</div><div class='add'>+    * - V4L2_PIX_FMT_NV15</div><div class='add'>+      - 'NV15'</div><div class='add'>+      - 10</div><div class='add'>+      - 4:2:0</div><div class='add'>+      - Cb, Cr</div><div class='add'>+      - Yes</div><div class='add'>+      - Linear</div><div class='ctx'>     * - V4L2_PIX_FMT_NV15_4L4</div><div class='ctx'>       - 'VT15'</div><div class='ctx'>       - 15</div><div class='hunk'>@@ -186,6 +193,13 @@ All components are stored with the same number of bits per component.</div><div class='ctx'>       - Cr, Cb</div><div class='ctx'>       - No</div><div class='ctx'>       - Linear</div><div class='add'>+    * - V4L2_PIX_FMT_NV20</div><div class='add'>+      - 'NV20'</div><div class='add'>+      - 10</div><div class='add'>+      - 4:2:2</div><div class='add'>+      - Cb, Cr</div><div class='add'>+      - Yes</div><div class='add'>+      - Linear</div><div class='ctx'>     * - V4L2_PIX_FMT_NV24</div><div class='ctx'>       - 'NV24'</div><div class='ctx'>       - 8</div><div class='hunk'>@@ -302,6 +316,57 @@ of the luma plane.</div><div class='ctx'>       - Cr\ :sub:`11`</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+.. _V4L2-PIX-FMT-NV15:</div><div class='add'>+</div><div class='add'>+NV15</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+Semi-planar 10-bit YUV 4:2:0 format similar to NV12, using 10-bit components</div><div class='add'>+with no padding between each component. A group of 4 components are stored over</div><div class='add'>+5 bytes in little endian order.</div><div class='add'>+</div><div class='add'>+.. flat-table:: Sample 4x4 NV15 Image (1 byte per cell)</div><div class='add'>+    :header-rows:  0</div><div class='add'>+    :stub-columns: 0</div><div class='add'>+</div><div class='add'>+    * - start + 0:</div><div class='add'>+      - Y'\ :sub:`00[7:0]`</div><div class='add'>+      - Y'\ :sub:`01[5:0]`\ Y'\ :sub:`00[9:8]`</div><div class='add'>+      - Y'\ :sub:`02[3:0]`\ Y'\ :sub:`01[9:6]`</div><div class='add'>+      - Y'\ :sub:`03[1:0]`\ Y'\ :sub:`02[9:4]`</div><div class='add'>+      - Y'\ :sub:`03[9:2]`</div><div class='add'>+    * - start + 5:</div><div class='add'>+      - Y'\ :sub:`10[7:0]`</div><div class='add'>+      - Y'\ :sub:`11[5:0]`\ Y'\ :sub:`10[9:8]`</div><div class='add'>+      - Y'\ :sub:`12[3:0]`\ Y'\ :sub:`11[9:6]`</div><div class='add'>+      - Y'\ :sub:`13[1:0]`\ Y'\ :sub:`12[9:4]`</div><div class='add'>+      - Y'\ :sub:`13[9:2]`</div><div class='add'>+    * - start + 10:</div><div class='add'>+      - Y'\ :sub:`20[7:0]`</div><div class='add'>+      - Y'\ :sub:`21[5:0]`\ Y'\ :sub:`20[9:8]`</div><div class='add'>+      - Y'\ :sub:`22[3:0]`\ Y'\ :sub:`21[9:6]`</div><div class='add'>+      - Y'\ :sub:`23[1:0]`\ Y'\ :sub:`22[9:4]`</div><div class='add'>+      - Y'\ :sub:`23[9:2]`</div><div class='add'>+    * - start + 15:</div><div class='add'>+      - Y'\ :sub:`30[7:0]`</div><div class='add'>+      - Y'\ :sub:`31[5:0]`\ Y'\ :sub:`30[9:8]`</div><div class='add'>+      - Y'\ :sub:`32[3:0]`\ Y'\ :sub:`31[9:6]`</div><div class='add'>+      - Y'\ :sub:`33[1:0]`\ Y'\ :sub:`32[9:4]`</div><div class='add'>+      - Y'\ :sub:`33[9:2]`</div><div class='add'>+    * - start + 20:</div><div class='add'>+      - Cb\ :sub:`00[7:0]`</div><div class='add'>+      - Cr\ :sub:`00[5:0]`\ Cb\ :sub:`00[9:8]`</div><div class='add'>+      - Cb\ :sub:`01[3:0]`\ Cr\ :sub:`00[9:6]`</div><div class='add'>+      - Cr\ :sub:`01[1:0]`\ Cb\ :sub:`01[9:4]`</div><div class='add'>+      - Cr\ :sub:`01[9:2]`</div><div class='add'>+    * - start + 25:</div><div class='add'>+      - Cb\ :sub:`10[7:0]`</div><div class='add'>+      - Cr\ :sub:`10[5:0]`\ Cb\ :sub:`10[9:8]`</div><div class='add'>+      - Cb\ :sub:`11[3:0]`\ Cr\ :sub:`10[9:6]`</div><div class='add'>+      - Cr\ :sub:`11[1:0]`\ Cb\ :sub:`11[9:4]`</div><div class='add'>+      - Cr\ :sub:`11[9:2]`</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> .. _V4L2-PIX-FMT-NV12MT:</div><div class='ctx'> .. _V4L2-PIX-FMT-NV12MT-16X16:</div><div class='ctx'> .. _V4L2-PIX-FMT-NV12-4L4:</div><div class='hunk'>@@ -631,6 +696,69 @@ number of lines as the luma plane.</div><div class='ctx'>       - Cr\ :sub:`32`</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+.. _V4L2-PIX-FMT-NV20:</div><div class='add'>+</div><div class='add'>+NV20</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+Semi-planar 10-bit YUV 4:2:2 format similar to NV16, using 10-bit components</div><div class='add'>+with no padding between each component. A group of 4 components are stored over</div><div class='add'>+5 bytes in little endian order.</div><div class='add'>+</div><div class='add'>+.. flat-table:: Sample 4x4 NV20 Image (1 byte per cell)</div><div class='add'>+    :header-rows:  0</div><div class='add'>+    :stub-columns: 0</div><div class='add'>+</div><div class='add'>+    * - start + 0:</div><div class='add'>+      - Y'\ :sub:`00[7:0]`</div><div class='add'>+      - Y'\ :sub:`01[5:0]`\ Y'\ :sub:`00[9:8]`</div><div class='add'>+      - Y'\ :sub:`02[3:0]`\ Y'\ :sub:`01[9:6]`</div><div class='add'>+      - Y'\ :sub:`03[1:0]`\ Y'\ :sub:`02[9:4]`</div><div class='add'>+      - Y'\ :sub:`03[9:2]`</div><div class='add'>+    * - start + 5:</div><div class='add'>+      - Y'\ :sub:`10[7:0]`</div><div class='add'>+      - Y'\ :sub:`11[5:0]`\ Y'\ :sub:`10[9:8]`</div><div class='add'>+      - Y'\ :sub:`12[3:0]`\ Y'\ :sub:`11[9:6]`</div><div class='add'>+      - Y'\ :sub:`13[1:0]`\ Y'\ :sub:`12[9:4]`</div><div class='add'>+      - Y'\ :sub:`13[9:2]`</div><div class='add'>+    * - start + 10:</div><div class='add'>+      - Y'\ :sub:`20[7:0]`</div><div class='add'>+      - Y'\ :sub:`21[5:0]`\ Y'\ :sub:`20[9:8]`</div><div class='add'>+      - Y'\ :sub:`22[3:0]`\ Y'\ :sub:`21[9:6]`</div><div class='add'>+      - Y'\ :sub:`23[1:0]`\ Y'\ :sub:`22[9:4]`</div><div class='add'>+      - Y'\ :sub:`23[9:2]`</div><div class='add'>+    * - start + 15:</div><div class='add'>+      - Y'\ :sub:`30[7:0]`</div><div class='add'>+      - Y'\ :sub:`31[5:0]`\ Y'\ :sub:`30[9:8]`</div><div class='add'>+      - Y'\ :sub:`32[3:0]`\ Y'\ :sub:`31[9:6]`</div><div class='add'>+      - Y'\ :sub:`33[1:0]`\ Y'\ :sub:`32[9:4]`</div><div class='add'>+      - Y'\ :sub:`33[9:2]`</div><div class='add'>+    * - start + 20:</div><div class='add'>+      - Cb\ :sub:`00[7:0]`</div><div class='add'>+      - Cr\ :sub:`00[5:0]`\ Cb\ :sub:`00[9:8]`</div><div class='add'>+      - Cb\ :sub:`01[3:0]`\ Cr\ :sub:`00[9:6]`</div><div class='add'>+      - Cr\ :sub:`01[1:0]`\ Cb\ :sub:`01[9:4]`</div><div class='add'>+      - Cr\ :sub:`01[9:2]`</div><div class='add'>+    * - start + 25:</div><div class='add'>+      - Cb\ :sub:`10[7:0]`</div><div class='add'>+      - Cr\ :sub:`10[5:0]`\ Cb\ :sub:`10[9:8]`</div><div class='add'>+      - Cb\ :sub:`11[3:0]`\ Cr\ :sub:`10[9:6]`</div><div class='add'>+      - Cr\ :sub:`11[1:0]`\ Cb\ :sub:`11[9:4]`</div><div class='add'>+      - Cr\ :sub:`11[9:2]`</div><div class='add'>+    * - start + 30:</div><div class='add'>+      - Cb\ :sub:`20[7:0]`</div><div class='add'>+      - Cr\ :sub:`20[5:0]`\ Cb\ :sub:`20[9:8]`</div><div class='add'>+      - Cb\ :sub:`21[3:0]`\ Cr\ :sub:`20[9:6]`</div><div class='add'>+      - Cr\ :sub:`21[1:0]`\ Cb\ :sub:`21[9:4]`</div><div class='add'>+      - Cr\ :sub:`21[9:2]`</div><div class='add'>+    * - start + 35:</div><div class='add'>+      - Cb\ :sub:`30[7:0]`</div><div class='add'>+      - Cr\ :sub:`30[5:0]`\ Cb\ :sub:`30[9:8]`</div><div class='add'>+      - Cb\ :sub:`31[3:0]`\ Cr\ :sub:`30[9:6]`</div><div class='add'>+      - Cr\ :sub:`31[1:0]`\ Cb\ :sub:`31[9:4]`</div><div class='add'>+      - Cr\ :sub:`31[9:2]`</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> .. _V4L2-PIX-FMT-NV24:</div><div class='ctx'> .. _V4L2-PIX-FMT-NV42:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/userspace-api/mseal.rst b/Documentation/userspace-api/mseal.rst<br/>index 1dabfc29be0d..7195a7f91107 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/userspace-api/mseal.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/mseal.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/mseal.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/userspace-api/mseal.rst</a></div><div class='hunk'>@@ -27,7 +27,7 @@ SYSCALL</div><div class='ctx'> =======</div><div class='ctx'> mseal syscall signature</div><div class='ctx'> -----------------------</div><div class='del'>-   ``int mseal(void \* addr, size_t len, unsigned long flags)``</div><div class='add'>+   ``int mseal(void *addr, size_t len, unsigned long flags)``</div><div class='ctx'> </div><div class='ctx'>    **addr**/**len**: virtual memory address range.</div><div class='ctx'>       The address range set by **addr**/**len** must meet:</div><div class='head'>diff --git a/Documentation/userspace-api/netlink/netlink-raw.rst b/Documentation/userspace-api/netlink/netlink-raw.rst<br/>index 1990eea772d0..31fc91020eb3 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/userspace-api/netlink/netlink-raw.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/userspace-api/netlink/netlink-raw.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/userspace-api/netlink/netlink-raw.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/userspace-api/netlink/netlink-raw.rst</a></div><div class='hunk'>@@ -62,7 +62,7 @@ Sub-messages</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='ctx'> Several raw netlink families such as</div><div class='del'>-:doc:`rt_link&lt;../../networking/netlink_spec/rt_link&gt;` and</div><div class='add'>+:doc:`rt-link&lt;../../networking/netlink_spec/rt-link&gt;` and</div><div class='ctx'> :doc:`tc&lt;../../networking/netlink_spec/tc&gt;` use attribute nesting as an</div><div class='ctx'> abstraction to carry module specific information.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst<br/>index 1f8625b7646a..6fb1870f0999 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/virt/kvm/api.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/virt/kvm/api.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/virt/kvm/api.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/virt/kvm/api.rst</a></div><div class='hunk'>@@ -1411,6 +1411,9 @@ the memory region are automatically reflected into the guest.  For example, an</div><div class='ctx'> mmap() that affects the region will be made visible immediately.  Another</div><div class='ctx'> example is madvise(MADV_DROP).</div><div class='ctx'> </div><div class='add'>+For TDX guest, deleting/moving memory region loses guest memory contents.</div><div class='add'>+Read only region isn't supported.  Only as-id 0 is supported.</div><div class='add'>+</div><div class='ctx'> Note: On arm64, a write generated by the page-table walker (to update</div><div class='ctx'> the Access and Dirty flags, for example) never results in a</div><div class='ctx'> KVM_EXIT_MMIO exit when the slot has the KVM_MEM_READONLY flag. This</div><div class='hunk'>@@ -3460,7 +3463,8 @@ The initial values are defined as:</div><div class='ctx'> 	- FPSIMD/NEON registers: set to 0</div><div class='ctx'> 	- SVE registers: set to 0</div><div class='ctx'> 	- System registers: Reset to their architecturally defined</div><div class='del'>-	  values as for a warm reset to EL1 (resp. SVC)</div><div class='add'>+	  values as for a warm reset to EL1 (resp. SVC) or EL2 (in the</div><div class='add'>+	  case of EL2 being enabled).</div><div class='ctx'> </div><div class='ctx'> Note that because some registers reflect machine topology, all vcpus</div><div class='ctx'> should be created before this ioctl is invoked.</div><div class='hunk'>@@ -3527,6 +3531,17 @@ Possible features:</div><div class='ctx'> 	      - the KVM_REG_ARM64_SVE_VLS pseudo-register is immutable, and can</div><div class='ctx'> 	        no longer be written using KVM_SET_ONE_REG.</div><div class='ctx'> </div><div class='add'>+	- KVM_ARM_VCPU_HAS_EL2: Enable Nested Virtualisation support,</div><div class='add'>+	  booting the guest from EL2 instead of EL1.</div><div class='add'>+	  Depends on KVM_CAP_ARM_EL2.</div><div class='add'>+	  The VM is running with HCR_EL2.E2H being RES1 (VHE) unless</div><div class='add'>+	  KVM_ARM_VCPU_HAS_EL2_E2H0 is also set.</div><div class='add'>+</div><div class='add'>+	- KVM_ARM_VCPU_HAS_EL2_E2H0: Restrict Nested Virtualisation</div><div class='add'>+	  support to HCR_EL2.E2H being RES0 (non-VHE).</div><div class='add'>+	  Depends on KVM_CAP_ARM_EL2_E2H0.</div><div class='add'>+	  KVM_ARM_VCPU_HAS_EL2 must also be set.</div><div class='add'>+</div><div class='ctx'> 4.83 KVM_ARM_PREFERRED_TARGET</div><div class='ctx'> -----------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -4768,7 +4783,7 @@ H_GET_CPU_CHARACTERISTICS hypercall.</div><div class='ctx'> </div><div class='ctx'> :Capability: basic</div><div class='ctx'> :Architectures: x86</div><div class='del'>-:Type: vm</div><div class='add'>+:Type: vm ioctl, vcpu ioctl</div><div class='ctx'> :Parameters: an opaque platform specific structure (in/out)</div><div class='ctx'> :Returns: 0 on success; -1 on error</div><div class='ctx'> </div><div class='hunk'>@@ -4776,9 +4791,11 @@ If the platform supports creating encrypted VMs then this ioctl can be used</div><div class='ctx'> for issuing platform-specific memory encryption commands to manage those</div><div class='ctx'> encrypted VMs.</div><div class='ctx'> </div><div class='del'>-Currently, this ioctl is used for issuing Secure Encrypted Virtualization</div><div class='del'>-(SEV) commands on AMD Processors. The SEV commands are defined in</div><div class='del'>-Documentation/virt/kvm/x86/amd-memory-encryption.rst.</div><div class='add'>+Currently, this ioctl is used for issuing both Secure Encrypted Virtualization</div><div class='add'>+(SEV) commands on AMD Processors and Trusted Domain Extensions (TDX) commands</div><div class='add'>+on Intel Processors.  The detailed commands are defined in</div><div class='add'>+Documentation/virt/kvm/x86/amd-memory-encryption.rst and</div><div class='add'>+Documentation/virt/kvm/x86/intel-tdx.rst.</div><div class='ctx'> </div><div class='ctx'> 4.111 KVM_MEMORY_ENCRYPT_REG_REGION</div><div class='ctx'> -----------------------------------</div><div class='hunk'>@@ -6827,6 +6844,7 @@ should put the acknowledged interrupt vector into the 'epr' field.</div><div class='ctx'>   #define KVM_SYSTEM_EVENT_WAKEUP         4</div><div class='ctx'>   #define KVM_SYSTEM_EVENT_SUSPEND        5</div><div class='ctx'>   #define KVM_SYSTEM_EVENT_SEV_TERM       6</div><div class='add'>+  #define KVM_SYSTEM_EVENT_TDX_FATAL      7</div><div class='ctx'> 			__u32 type;</div><div class='ctx'>                         __u32 ndata;</div><div class='ctx'>                         __u64 data[16];</div><div class='hunk'>@@ -6853,6 +6871,11 @@ Valid values for 'type' are:</div><div class='ctx'>    reset/shutdown of the VM.</div><div class='ctx'>  - KVM_SYSTEM_EVENT_SEV_TERM -- an AMD SEV guest requested termination.</div><div class='ctx'>    The guest physical address of the guest's GHCB is stored in `data[0]`.</div><div class='add'>+ - KVM_SYSTEM_EVENT_TDX_FATAL -- a TDX guest reported a fatal error state.</div><div class='add'>+   KVM doesn't do any parsing or conversion, it just dumps 16 general-purpose</div><div class='add'>+   registers to userspace, in ascending order of the 4-bit indices for x86-64</div><div class='add'>+   general-purpose registers in instruction encoding, as defined in the Intel</div><div class='add'>+   SDM.</div><div class='ctx'>  - KVM_SYSTEM_EVENT_WAKEUP -- the exiting vCPU is in a suspended state and</div><div class='ctx'>    KVM has recognized a wakeup event. Userspace may honor this event by</div><div class='ctx'>    marking the exiting vCPU as runnable, or deny it and call KVM_RUN again.</div><div class='hunk'>@@ -7447,6 +7470,75 @@ Unused bitfields in the bitarrays must be set to zero.</div><div class='ctx'> </div><div class='ctx'> This capability connects the vcpu to an in-kernel XIVE device.</div><div class='ctx'> </div><div class='add'>+6.76 KVM_CAP_HYPERV_SYNIC</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+:Target: vcpu</div><div class='add'>+</div><div class='add'>+This capability, if KVM_CHECK_EXTENSION indicates that it is</div><div class='add'>+available, means that the kernel has an implementation of the</div><div class='add'>+Hyper-V Synthetic interrupt controller(SynIC). Hyper-V SynIC is</div><div class='add'>+used to support Windows Hyper-V based guest paravirt drivers(VMBus).</div><div class='add'>+</div><div class='add'>+In order to use SynIC, it has to be activated by setting this</div><div class='add'>+capability via KVM_ENABLE_CAP ioctl on the vcpu fd. Note that this</div><div class='add'>+will disable the use of APIC hardware virtualization even if supported</div><div class='add'>+by the CPU, as it's incompatible with SynIC auto-EOI behavior.</div><div class='add'>+</div><div class='add'>+6.77 KVM_CAP_HYPERV_SYNIC2</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+:Target: vcpu</div><div class='add'>+</div><div class='add'>+This capability enables a newer version of Hyper-V Synthetic interrupt</div><div class='add'>+controller (SynIC).  The only difference with KVM_CAP_HYPERV_SYNIC is that KVM</div><div class='add'>+doesn't clear SynIC message and event flags pages when they are enabled by</div><div class='add'>+writing to the respective MSRs.</div><div class='add'>+</div><div class='add'>+6.78 KVM_CAP_HYPERV_DIRECT_TLBFLUSH</div><div class='add'>+-----------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+:Target: vcpu</div><div class='add'>+</div><div class='add'>+This capability indicates that KVM running on top of Hyper-V hypervisor</div><div class='add'>+enables Direct TLB flush for its guests meaning that TLB flush</div><div class='add'>+hypercalls are handled by Level 0 hypervisor (Hyper-V) bypassing KVM.</div><div class='add'>+Due to the different ABI for hypercall parameters between Hyper-V and</div><div class='add'>+KVM, enabling this capability effectively disables all hypercall</div><div class='add'>+handling by KVM (as some KVM hypercall may be mistakenly treated as TLB</div><div class='add'>+flush hypercalls by Hyper-V) so userspace should disable KVM identification</div><div class='add'>+in CPUID and only exposes Hyper-V identification. In this case, guest</div><div class='add'>+thinks it's running on Hyper-V and only use Hyper-V hypercalls.</div><div class='add'>+</div><div class='add'>+6.79 KVM_CAP_HYPERV_ENFORCE_CPUID</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+:Target: vcpu</div><div class='add'>+</div><div class='add'>+When enabled, KVM will disable emulated Hyper-V features provided to the</div><div class='add'>+guest according to the bits Hyper-V CPUID feature leaves. Otherwise, all</div><div class='add'>+currently implemented Hyper-V features are provided unconditionally when</div><div class='add'>+Hyper-V identification is set in the HYPERV_CPUID_INTERFACE (0x40000001)</div><div class='add'>+leaf.</div><div class='add'>+</div><div class='add'>+6.80 KVM_CAP_ENFORCE_PV_FEATURE_CPUID</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+:Target: vcpu</div><div class='add'>+</div><div class='add'>+When enabled, KVM will disable paravirtual features provided to the</div><div class='add'>+guest according to the bits in the KVM_CPUID_FEATURES CPUID leaf</div><div class='add'>+(0x40000001). Otherwise, a guest may use the paravirtual features</div><div class='add'>+regardless of what has actually been exposed through the CPUID leaf.</div><div class='add'>+</div><div class='add'>+.. _KVM_CAP_DIRTY_LOG_RING:</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> .. _cap_enable_vm:</div><div class='ctx'> </div><div class='ctx'> 7. Capabilities that can be enabled on VMs</div><div class='hunk'>@@ -7927,10 +8019,10 @@ by POWER10 processor.</div><div class='ctx'> 7.24 KVM_CAP_VM_COPY_ENC_CONTEXT_FROM</div><div class='ctx'> -------------------------------------</div><div class='ctx'> </div><div class='del'>-Architectures: x86 SEV enabled</div><div class='del'>-Type: vm</div><div class='del'>-Parameters: args[0] is the fd of the source vm</div><div class='del'>-Returns: 0 on success; ENOTTY on error</div><div class='add'>+:Architectures: x86 SEV enabled</div><div class='add'>+:Type: vm</div><div class='add'>+:Parameters: args[0] is the fd of the source vm</div><div class='add'>+:Returns: 0 on success; ENOTTY on error</div><div class='ctx'> </div><div class='ctx'> This capability enables userspace to copy encryption context from the vm</div><div class='ctx'> indicated by the fd to the vm this is called on.</div><div class='hunk'>@@ -7963,24 +8055,6 @@ default.</div><div class='ctx'> </div><div class='ctx'> See Documentation/arch/x86/sgx.rst for more details.</div><div class='ctx'> </div><div class='del'>-7.26 KVM_CAP_PPC_RPT_INVALIDATE</div><div class='del'>--------------------------------</div><div class='del'>-</div><div class='del'>-:Capability: KVM_CAP_PPC_RPT_INVALIDATE</div><div class='del'>-:Architectures: ppc</div><div class='del'>-:Type: vm</div><div class='del'>-</div><div class='del'>-This capability indicates that the kernel is capable of handling</div><div class='del'>-H_RPT_INVALIDATE hcall.</div><div class='del'>-</div><div class='del'>-In order to enable the use of H_RPT_INVALIDATE in the guest,</div><div class='del'>-user space might have to advertise it for the guest. For example,</div><div class='del'>-IBM pSeries (sPAPR) guest starts using it if "hcall-rpt-invalidate" is</div><div class='del'>-present in the "ibm,hypertas-functions" device-tree property.</div><div class='del'>-</div><div class='del'>-This capability is enabled for hypervisors on platforms like POWER9</div><div class='del'>-that support radix MMU.</div><div class='del'>-</div><div class='ctx'> 7.27 KVM_CAP_EXIT_ON_EMULATION_FAILURE</div><div class='ctx'> --------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -8038,24 +8112,9 @@ indicated by the fd to the VM this is called on.</div><div class='ctx'> This is intended to support intra-host migration of VMs between userspace VMMs,</div><div class='ctx'> upgrading the VMM process without interrupting the guest.</div><div class='ctx'> </div><div class='del'>-7.30 KVM_CAP_PPC_AIL_MODE_3</div><div class='del'>--------------------------------</div><div class='del'>-</div><div class='del'>-:Capability: KVM_CAP_PPC_AIL_MODE_3</div><div class='del'>-:Architectures: ppc</div><div class='del'>-:Type: vm</div><div class='del'>-</div><div class='del'>-This capability indicates that the kernel supports the mode 3 setting for the</div><div class='del'>-"Address Translation Mode on Interrupt" aka "Alternate Interrupt Location"</div><div class='del'>-resource that is controlled with the H_SET_MODE hypercall.</div><div class='del'>-</div><div class='del'>-This capability allows a guest kernel to use a better-performance mode for</div><div class='del'>-handling interrupts and system calls.</div><div class='del'>-</div><div class='ctx'> 7.31 KVM_CAP_DISABLE_QUIRKS2</div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='del'>-:Capability: KVM_CAP_DISABLE_QUIRKS2</div><div class='ctx'> :Parameters: args[0] - set of KVM quirks to disable</div><div class='ctx'> :Architectures: x86</div><div class='ctx'> :Type: vm</div><div class='hunk'>@@ -8158,6 +8217,28 @@ KVM_X86_QUIRK_STUFF_FEATURE_MSRS    By default, at vCPU creation, KVM sets the</div><div class='ctx'>                                     and 0x489), as KVM does now allow them to</div><div class='ctx'>                                     be set by userspace (KVM sets them based on</div><div class='ctx'>                                     guest CPUID, for safety purposes).</div><div class='add'>+</div><div class='add'>+KVM_X86_QUIRK_IGNORE_GUEST_PAT      By default, on Intel platforms, KVM ignores</div><div class='add'>+                                    guest PAT and forces the effective memory</div><div class='add'>+                                    type to WB in EPT.  The quirk is not available</div><div class='add'>+                                    on Intel platforms which are incapable of</div><div class='add'>+                                    safely honoring guest PAT (i.e., without CPU</div><div class='add'>+                                    self-snoop, KVM always ignores guest PAT and</div><div class='add'>+                                    forces effective memory type to WB).  It is</div><div class='add'>+                                    also ignored on AMD platforms or, on Intel,</div><div class='add'>+                                    when a VM has non-coherent DMA devices</div><div class='add'>+                                    assigned; KVM always honors guest PAT in</div><div class='add'>+                                    such case. The quirk is needed to avoid</div><div class='add'>+                                    slowdowns on certain Intel Xeon platforms</div><div class='add'>+                                    (e.g. ICX, SPR) where self-snoop feature is</div><div class='add'>+                                    supported but UC is slow enough to cause</div><div class='add'>+                                    issues with some older guests that use</div><div class='add'>+                                    UC instead of WC to map the video RAM.</div><div class='add'>+                                    Userspace can disable the quirk to honor</div><div class='add'>+                                    guest PAT if it knows that there is no such</div><div class='add'>+                                    guest software, for example if it does not</div><div class='add'>+                                    expose a bochs graphics device (which is</div><div class='add'>+                                    known to have had a buggy driver).</div><div class='ctx'> =================================== ============================================</div><div class='ctx'> </div><div class='ctx'> 7.32 KVM_CAP_MAX_VCPU_ID</div><div class='hunk'>@@ -8210,27 +8291,6 @@ This capability is aimed to mitigate the threat that malicious VMs can</div><div class='ctx'> cause CPU stuck (due to event windows don't open up) and make the CPU</div><div class='ctx'> unavailable to host or other VMs.</div><div class='ctx'> </div><div class='del'>-7.34 KVM_CAP_MEMORY_FAULT_INFO</div><div class='del'>-------------------------------</div><div class='del'>-</div><div class='del'>-:Architectures: x86</div><div class='del'>-:Returns: Informational only, -EINVAL on direct KVM_ENABLE_CAP.</div><div class='del'>-</div><div class='del'>-The presence of this capability indicates that KVM_RUN will fill</div><div class='del'>-kvm_run.memory_fault if KVM cannot resolve a guest page fault VM-Exit, e.g. if</div><div class='del'>-there is a valid memslot but no backing VMA for the corresponding host virtual</div><div class='del'>-address.</div><div class='del'>-</div><div class='del'>-The information in kvm_run.memory_fault is valid if and only if KVM_RUN returns</div><div class='del'>-an error with errno=EFAULT or errno=EHWPOISON *and* kvm_run.exit_reason is set</div><div class='del'>-to KVM_EXIT_MEMORY_FAULT.</div><div class='del'>-</div><div class='del'>-Note: Userspaces which attempt to resolve memory faults so that they can retry</div><div class='del'>-KVM_RUN are encouraged to guard against repeatedly receiving the same</div><div class='del'>-error/annotated fault.</div><div class='del'>-</div><div class='del'>-See KVM_EXIT_MEMORY_FAULT for more information.</div><div class='del'>-</div><div class='ctx'> 7.35 KVM_CAP_X86_APIC_BUS_CYCLES_NS</div><div class='ctx'> -----------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -8248,19 +8308,220 @@ by KVM_CHECK_EXTENSION.</div><div class='ctx'> Note: Userspace is responsible for correctly configuring CPUID 0x15, a.k.a. the</div><div class='ctx'> core crystal clock frequency, if a non-zero CPUID 0x15 is exposed to the guest.</div><div class='ctx'> </div><div class='del'>-7.36 KVM_CAP_X86_GUEST_MODE</div><div class='del'>-------------------------------</div><div class='add'>+7.36 KVM_CAP_DIRTY_LOG_RING/KVM_CAP_DIRTY_LOG_RING_ACQ_REL</div><div class='add'>+----------------------------------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86, arm64</div><div class='add'>+:Type: vm</div><div class='add'>+:Parameters: args[0] - size of the dirty log ring</div><div class='add'>+</div><div class='add'>+KVM is capable of tracking dirty memory using ring buffers that are</div><div class='add'>+mmapped into userspace; there is one dirty ring per vcpu.</div><div class='add'>+</div><div class='add'>+The dirty ring is available to userspace as an array of</div><div class='add'>+``struct kvm_dirty_gfn``.  Each dirty entry is defined as::</div><div class='add'>+</div><div class='add'>+  struct kvm_dirty_gfn {</div><div class='add'>+          __u32 flags;</div><div class='add'>+          __u32 slot; /* as_id | slot_id */</div><div class='add'>+          __u64 offset;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+The following values are defined for the flags field to define the</div><div class='add'>+current state of the entry::</div><div class='add'>+</div><div class='add'>+  #define KVM_DIRTY_GFN_F_DIRTY           BIT(0)</div><div class='add'>+  #define KVM_DIRTY_GFN_F_RESET           BIT(1)</div><div class='add'>+  #define KVM_DIRTY_GFN_F_MASK            0x3</div><div class='add'>+</div><div class='add'>+Userspace should call KVM_ENABLE_CAP ioctl right after KVM_CREATE_VM</div><div class='add'>+ioctl to enable this capability for the new guest and set the size of</div><div class='add'>+the rings.  Enabling the capability is only allowed before creating any</div><div class='add'>+vCPU, and the size of the ring must be a power of two.  The larger the</div><div class='add'>+ring buffer, the less likely the ring is full and the VM is forced to</div><div class='add'>+exit to userspace. The optimal size depends on the workload, but it is</div><div class='add'>+recommended that it be at least 64 KiB (4096 entries).</div><div class='add'>+</div><div class='add'>+Just like for dirty page bitmaps, the buffer tracks writes to</div><div class='add'>+all user memory regions for which the KVM_MEM_LOG_DIRTY_PAGES flag was</div><div class='add'>+set in KVM_SET_USER_MEMORY_REGION.  Once a memory region is registered</div><div class='add'>+with the flag set, userspace can start harvesting dirty pages from the</div><div class='add'>+ring buffer.</div><div class='add'>+</div><div class='add'>+An entry in the ring buffer can be unused (flag bits ``00``),</div><div class='add'>+dirty (flag bits ``01``) or harvested (flag bits ``1X``).  The</div><div class='add'>+state machine for the entry is as follows::</div><div class='add'>+</div><div class='add'>+          dirtied         harvested        reset</div><div class='add'>+     00 -----------&gt; 01 -------------&gt; 1X -------+</div><div class='add'>+      ^                                          |</div><div class='add'>+      |                                          |</div><div class='add'>+      +------------------------------------------+</div><div class='add'>+</div><div class='add'>+To harvest the dirty pages, userspace accesses the mmapped ring buffer</div><div class='add'>+to read the dirty GFNs.  If the flags has the DIRTY bit set (at this stage</div><div class='add'>+the RESET bit must be cleared), then it means this GFN is a dirty GFN.</div><div class='add'>+The userspace should harvest this GFN and mark the flags from state</div><div class='add'>+``01b`` to ``1Xb`` (bit 0 will be ignored by KVM, but bit 1 must be set</div><div class='add'>+to show that this GFN is harvested and waiting for a reset), and move</div><div class='add'>+on to the next GFN.  The userspace should continue to do this until the</div><div class='add'>+flags of a GFN have the DIRTY bit cleared, meaning that it has harvested</div><div class='add'>+all the dirty GFNs that were available.</div><div class='add'>+</div><div class='add'>+Note that on weakly ordered architectures, userspace accesses to the</div><div class='add'>+ring buffer (and more specifically the 'flags' field) must be ordered,</div><div class='add'>+using load-acquire/store-release accessors when available, or any</div><div class='add'>+other memory barrier that will ensure this ordering.</div><div class='add'>+</div><div class='add'>+It's not necessary for userspace to harvest the all dirty GFNs at once.</div><div class='add'>+However it must collect the dirty GFNs in sequence, i.e., the userspace</div><div class='add'>+program cannot skip one dirty GFN to collect the one next to it.</div><div class='add'>+</div><div class='add'>+After processing one or more entries in the ring buffer, userspace</div><div class='add'>+calls the VM ioctl KVM_RESET_DIRTY_RINGS to notify the kernel about</div><div class='add'>+it, so that the kernel will reprotect those collected GFNs.</div><div class='add'>+Therefore, the ioctl must be called *before* reading the content of</div><div class='add'>+the dirty pages.</div><div class='add'>+</div><div class='add'>+The dirty ring can get full.  When it happens, the KVM_RUN of the</div><div class='add'>+vcpu will return with exit reason KVM_EXIT_DIRTY_LOG_FULL.</div><div class='add'>+</div><div class='add'>+The dirty ring interface has a major difference comparing to the</div><div class='add'>+KVM_GET_DIRTY_LOG interface in that, when reading the dirty ring from</div><div class='add'>+userspace, it's still possible that the kernel has not yet flushed the</div><div class='add'>+processor's dirty page buffers into the kernel buffer (with dirty bitmaps, the</div><div class='add'>+flushing is done by the KVM_GET_DIRTY_LOG ioctl).  To achieve that, one</div><div class='add'>+needs to kick the vcpu out of KVM_RUN using a signal.  The resulting</div><div class='add'>+vmexit ensures that all dirty GFNs are flushed to the dirty rings.</div><div class='add'>+</div><div class='add'>+NOTE: KVM_CAP_DIRTY_LOG_RING_ACQ_REL is the only capability that</div><div class='add'>+should be exposed by weakly ordered architecture, in order to indicate</div><div class='add'>+the additional memory ordering requirements imposed on userspace when</div><div class='add'>+reading the state of an entry and mutating it from DIRTY to HARVESTED.</div><div class='add'>+Architecture with TSO-like ordering (such as x86) are allowed to</div><div class='add'>+expose both KVM_CAP_DIRTY_LOG_RING and KVM_CAP_DIRTY_LOG_RING_ACQ_REL</div><div class='add'>+to userspace.</div><div class='add'>+</div><div class='add'>+After enabling the dirty rings, the userspace needs to detect the</div><div class='add'>+capability of KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP to see whether the</div><div class='add'>+ring structures can be backed by per-slot bitmaps. With this capability</div><div class='add'>+advertised, it means the architecture can dirty guest pages without</div><div class='add'>+vcpu/ring context, so that some of the dirty information will still be</div><div class='add'>+maintained in the bitmap structure. KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP</div><div class='add'>+can't be enabled if the capability of KVM_CAP_DIRTY_LOG_RING_ACQ_REL</div><div class='add'>+hasn't been enabled, or any memslot has been existing.</div><div class='add'>+</div><div class='add'>+Note that the bitmap here is only a backup of the ring structure. The</div><div class='add'>+use of the ring and bitmap combination is only beneficial if there is</div><div class='add'>+only a very small amount of memory that is dirtied out of vcpu/ring</div><div class='add'>+context. Otherwise, the stand-alone per-slot bitmap mechanism needs to</div><div class='add'>+be considered.</div><div class='add'>+</div><div class='add'>+To collect dirty bits in the backup bitmap, userspace can use the same</div><div class='add'>+KVM_GET_DIRTY_LOG ioctl. KVM_CLEAR_DIRTY_LOG isn't needed as long as all</div><div class='add'>+the generation of the dirty bits is done in a single pass. Collecting</div><div class='add'>+the dirty bitmap should be the very last thing that the VMM does before</div><div class='add'>+considering the state as complete. VMM needs to ensure that the dirty</div><div class='add'>+state is final and avoid missing dirty pages from another ioctl ordered</div><div class='add'>+after the bitmap collection.</div><div class='add'>+</div><div class='add'>+NOTE: Multiple examples of using the backup bitmap: (1) save vgic/its</div><div class='add'>+tables through command KVM_DEV_ARM_{VGIC_GRP_CTRL, ITS_SAVE_TABLES} on</div><div class='add'>+KVM device "kvm-arm-vgic-its". (2) restore vgic/its tables through</div><div class='add'>+command KVM_DEV_ARM_{VGIC_GRP_CTRL, ITS_RESTORE_TABLES} on KVM device</div><div class='add'>+"kvm-arm-vgic-its". VGICv3 LPI pending status is restored. (3) save</div><div class='add'>+vgic3 pending table through KVM_DEV_ARM_VGIC_{GRP_CTRL, SAVE_PENDING_TABLES}</div><div class='add'>+command on KVM device "kvm-arm-vgic-v3".</div><div class='add'>+</div><div class='add'>+7.37 KVM_CAP_PMU_CAPABILITY</div><div class='add'>+---------------------------</div><div class='ctx'> </div><div class='ctx'> :Architectures: x86</div><div class='del'>-:Returns: Informational only, -EINVAL on direct KVM_ENABLE_CAP.</div><div class='add'>+:Type: vm</div><div class='add'>+:Parameters: arg[0] is bitmask of PMU virtualization capabilities.</div><div class='add'>+:Returns: 0 on success, -EINVAL when arg[0] contains invalid bits</div><div class='ctx'> </div><div class='del'>-The presence of this capability indicates that KVM_RUN will update the</div><div class='del'>-KVM_RUN_X86_GUEST_MODE bit in kvm_run.flags to indicate whether the</div><div class='del'>-vCPU was executing nested guest code when it exited.</div><div class='add'>+This capability alters PMU virtualization in KVM.</div><div class='ctx'> </div><div class='del'>-KVM exits with the register state of either the L1 or L2 guest</div><div class='del'>-depending on which executed at the time of an exit. Userspace must</div><div class='del'>-take care to differentiate between these cases.</div><div class='add'>+Calling KVM_CHECK_EXTENSION for this capability returns a bitmask of</div><div class='add'>+PMU virtualization capabilities that can be adjusted on a VM.</div><div class='add'>+</div><div class='add'>+The argument to KVM_ENABLE_CAP is also a bitmask and selects specific</div><div class='add'>+PMU virtualization capabilities to be applied to the VM.  This can</div><div class='add'>+only be invoked on a VM prior to the creation of VCPUs.</div><div class='add'>+</div><div class='add'>+At this time, KVM_PMU_CAP_DISABLE is the only capability.  Setting</div><div class='add'>+this capability will disable PMU virtualization for that VM.  Usermode</div><div class='add'>+should adjust CPUID leaf 0xA to reflect that the PMU is disabled.</div><div class='add'>+</div><div class='add'>+7.38 KVM_CAP_VM_DISABLE_NX_HUGE_PAGES</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+:Type: vm</div><div class='add'>+:Parameters: arg[0] must be 0.</div><div class='add'>+:Returns: 0 on success, -EPERM if the userspace process does not</div><div class='add'>+          have CAP_SYS_BOOT, -EINVAL if args[0] is not 0 or any vCPUs have been</div><div class='add'>+          created.</div><div class='add'>+</div><div class='add'>+This capability disables the NX huge pages mitigation for iTLB MULTIHIT.</div><div class='add'>+</div><div class='add'>+The capability has no effect if the nx_huge_pages module parameter is not set.</div><div class='add'>+</div><div class='add'>+This capability may only be set before any vCPUs are created.</div><div class='add'>+</div><div class='add'>+7.39 KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: arm64</div><div class='add'>+:Type: vm</div><div class='add'>+:Parameters: arg[0] is the new split chunk size.</div><div class='add'>+:Returns: 0 on success, -EINVAL if any memslot was already created.</div><div class='add'>+</div><div class='add'>+This capability sets the chunk size used in Eager Page Splitting.</div><div class='add'>+</div><div class='add'>+Eager Page Splitting improves the performance of dirty-logging (used</div><div class='add'>+in live migrations) when guest memory is backed by huge-pages.  It</div><div class='add'>+avoids splitting huge-pages (into PAGE_SIZE pages) on fault, by doing</div><div class='add'>+it eagerly when enabling dirty logging (with the</div><div class='add'>+KVM_MEM_LOG_DIRTY_PAGES flag for a memory region), or when using</div><div class='add'>+KVM_CLEAR_DIRTY_LOG.</div><div class='add'>+</div><div class='add'>+The chunk size specifies how many pages to break at a time, using a</div><div class='add'>+single allocation for each chunk. Bigger the chunk size, more pages</div><div class='add'>+need to be allocated ahead of time.</div><div class='add'>+</div><div class='add'>+The chunk size needs to be a valid block size. The list of acceptable</div><div class='add'>+block sizes is exposed in KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES as a</div><div class='add'>+64-bit bitmap (each bit describing a block size). The default value is</div><div class='add'>+0, to disable the eager page splitting.</div><div class='add'>+</div><div class='add'>+7.40 KVM_CAP_EXIT_HYPERCALL</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+:Type: vm</div><div class='add'>+</div><div class='add'>+This capability, if enabled, will cause KVM to exit to userspace</div><div class='add'>+with KVM_EXIT_HYPERCALL exit reason to process some hypercalls.</div><div class='add'>+</div><div class='add'>+Calling KVM_CHECK_EXTENSION for this capability will return a bitmask</div><div class='add'>+of hypercalls that can be configured to exit to userspace.</div><div class='add'>+Right now, the only such hypercall is KVM_HC_MAP_GPA_RANGE.</div><div class='add'>+</div><div class='add'>+The argument to KVM_ENABLE_CAP is also a bitmask, and must be a subset</div><div class='add'>+of the result of KVM_CHECK_EXTENSION.  KVM will forward to userspace</div><div class='add'>+the hypercalls whose corresponding bit is in the argument, and return</div><div class='add'>+ENOSYS for the others.</div><div class='add'>+</div><div class='add'>+7.41 KVM_CAP_ARM_SYSTEM_SUSPEND</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: arm64</div><div class='add'>+:Type: vm</div><div class='add'>+</div><div class='add'>+When enabled, KVM will exit to userspace with KVM_EXIT_SYSTEM_EVENT of</div><div class='add'>+type KVM_SYSTEM_EVENT_SUSPEND to process the guest suspend request.</div><div class='ctx'> </div><div class='ctx'> 7.37 KVM_CAP_ARM_WRITABLE_IMP_ID_REGS</div><div class='ctx'> -------------------------------------</div><div class='hunk'>@@ -8280,6 +8541,17 @@ aforementioned registers before the first KVM_RUN. These registers are VM</div><div class='ctx'> scoped, meaning that the same set of values are presented on all vCPUs in a</div><div class='ctx'> given VM.</div><div class='ctx'> </div><div class='add'>+7.43 KVM_CAP_RISCV_MP_STATE_RESET</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: riscv</div><div class='add'>+:Type: VM</div><div class='add'>+:Parameters: None</div><div class='add'>+:Returns: 0 on success, -EINVAL if arg[0] is not zero</div><div class='add'>+</div><div class='add'>+When this capability is enabled, KVM resets the VCPU when setting</div><div class='add'>+MP_STATE_INIT_RECEIVED through IOCTL.  The original MP_STATE is preserved.</div><div class='add'>+</div><div class='ctx'> 8. Other capabilities.</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='hunk'>@@ -8297,21 +8569,6 @@ H_RANDOM hypercall backed by a hardware random-number generator.</div><div class='ctx'> If present, the kernel H_RANDOM handler can be enabled for guest use</div><div class='ctx'> with the KVM_CAP_PPC_ENABLE_HCALL capability.</div><div class='ctx'> </div><div class='del'>-8.2 KVM_CAP_HYPERV_SYNIC</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>-:Architectures: x86</div><div class='del'>-</div><div class='del'>-This capability, if KVM_CHECK_EXTENSION indicates that it is</div><div class='del'>-available, means that the kernel has an implementation of the</div><div class='del'>-Hyper-V Synthetic interrupt controller(SynIC). Hyper-V SynIC is</div><div class='del'>-used to support Windows Hyper-V based guest paravirt drivers(VMBus).</div><div class='del'>-</div><div class='del'>-In order to use SynIC, it has to be activated by setting this</div><div class='del'>-capability via KVM_ENABLE_CAP ioctl on the vcpu fd. Note that this</div><div class='del'>-will disable the use of APIC hardware virtualization even if supported</div><div class='del'>-by the CPU, as it's incompatible with SynIC auto-EOI behavior.</div><div class='del'>-</div><div class='ctx'> 8.3 KVM_CAP_PPC_MMU_RADIX</div><div class='ctx'> -------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -8362,20 +8619,6 @@ may be incompatible with the MIPS VZ ASE.</div><div class='ctx'>     virtualization, including standard guest virtual memory segments.</div><div class='ctx'> ==  ==========================================================================</div><div class='ctx'> </div><div class='del'>-8.6 KVM_CAP_MIPS_TE</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-:Architectures: mips</div><div class='del'>-</div><div class='del'>-This capability, if KVM_CHECK_EXTENSION on the main kvm handle indicates that</div><div class='del'>-it is available, means that the trap &amp; emulate implementation is available to</div><div class='del'>-run guest code in user mode, even if KVM_CAP_MIPS_VZ indicates that hardware</div><div class='del'>-assisted virtualisation is also available. KVM_VM_MIPS_TE (0) must be passed</div><div class='del'>-to KVM_CREATE_VM to create a VM which utilises it.</div><div class='del'>-</div><div class='del'>-If KVM_CHECK_EXTENSION on a kvm VM handle indicates that this capability is</div><div class='del'>-available, it means that the VM is using trap &amp; emulate.</div><div class='del'>-</div><div class='ctx'> 8.7 KVM_CAP_MIPS_64BIT</div><div class='ctx'> ----------------------</div><div class='ctx'> </div><div class='hunk'>@@ -8457,16 +8700,6 @@ virtual SMT modes that can be set using KVM_CAP_PPC_SMT.  If bit N</div><div class='ctx'> (counting from the right) is set, then a virtual SMT mode of 2^N is</div><div class='ctx'> available.</div><div class='ctx'> </div><div class='del'>-8.11 KVM_CAP_HYPERV_SYNIC2</div><div class='del'>---------------------------</div><div class='del'>-</div><div class='del'>-:Architectures: x86</div><div class='del'>-</div><div class='del'>-This capability enables a newer version of Hyper-V Synthetic interrupt</div><div class='del'>-controller (SynIC).  The only difference with KVM_CAP_HYPERV_SYNIC is that KVM</div><div class='del'>-doesn't clear SynIC message and event flags pages when they are enabled by</div><div class='del'>-writing to the respective MSRs.</div><div class='del'>-</div><div class='ctx'> 8.12 KVM_CAP_HYPERV_VP_INDEX</div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -8481,7 +8714,6 @@ capability is absent, userspace can still query this msr's value.</div><div class='ctx'> -------------------------------</div><div class='ctx'> </div><div class='ctx'> :Architectures: s390</div><div class='del'>-:Parameters: none</div><div class='ctx'> </div><div class='ctx'> This capability indicates if the flic device will be able to get/set the</div><div class='ctx'> AIS states for migration via the KVM_DEV_FLIC_AISM_ALL attribute and allows</div><div class='hunk'>@@ -8555,21 +8787,6 @@ This capability indicates that KVM supports paravirtualized Hyper-V IPI send</div><div class='ctx'> hypercalls:</div><div class='ctx'> HvCallSendSyntheticClusterIpi, HvCallSendSyntheticClusterIpiEx.</div><div class='ctx'> </div><div class='del'>-8.21 KVM_CAP_HYPERV_DIRECT_TLBFLUSH</div><div class='del'>------------------------------------</div><div class='del'>-</div><div class='del'>-:Architectures: x86</div><div class='del'>-</div><div class='del'>-This capability indicates that KVM running on top of Hyper-V hypervisor</div><div class='del'>-enables Direct TLB flush for its guests meaning that TLB flush</div><div class='del'>-hypercalls are handled by Level 0 hypervisor (Hyper-V) bypassing KVM.</div><div class='del'>-Due to the different ABI for hypercall parameters between Hyper-V and</div><div class='del'>-KVM, enabling this capability effectively disables all hypercall</div><div class='del'>-handling by KVM (as some KVM hypercall may be mistakenly treated as TLB</div><div class='del'>-flush hypercalls by Hyper-V) so userspace should disable KVM identification</div><div class='del'>-in CPUID and only exposes Hyper-V identification. In this case, guest</div><div class='del'>-thinks it's running on Hyper-V and only use Hyper-V hypercalls.</div><div class='del'>-</div><div class='ctx'> 8.22 KVM_CAP_S390_VCPU_RESETS</div><div class='ctx'> -----------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -8647,142 +8864,6 @@ In combination with KVM_CAP_X86_USER_SPACE_MSR, this allows user space to</div><div class='ctx'> trap and emulate MSRs that are outside of the scope of KVM as well as</div><div class='ctx'> limit the attack surface on KVM's MSR emulation code.</div><div class='ctx'> </div><div class='del'>-8.28 KVM_CAP_ENFORCE_PV_FEATURE_CPUID</div><div class='del'>--------------------------------------</div><div class='del'>-</div><div class='del'>-Architectures: x86</div><div class='del'>-</div><div class='del'>-When enabled, KVM will disable paravirtual features provided to the</div><div class='del'>-guest according to the bits in the KVM_CPUID_FEATURES CPUID leaf</div><div class='del'>-(0x40000001). Otherwise, a guest may use the paravirtual features</div><div class='del'>-regardless of what has actually been exposed through the CPUID leaf.</div><div class='del'>-</div><div class='del'>-.. _KVM_CAP_DIRTY_LOG_RING:</div><div class='del'>-</div><div class='del'>-8.29 KVM_CAP_DIRTY_LOG_RING/KVM_CAP_DIRTY_LOG_RING_ACQ_REL</div><div class='del'>-----------------------------------------------------------</div><div class='del'>-</div><div class='del'>-:Architectures: x86, arm64</div><div class='del'>-:Parameters: args[0] - size of the dirty log ring</div><div class='del'>-</div><div class='del'>-KVM is capable of tracking dirty memory using ring buffers that are</div><div class='del'>-mmapped into userspace; there is one dirty ring per vcpu.</div><div class='del'>-</div><div class='del'>-The dirty ring is available to userspace as an array of</div><div class='del'>-``struct kvm_dirty_gfn``.  Each dirty entry is defined as::</div><div class='del'>-</div><div class='del'>-  struct kvm_dirty_gfn {</div><div class='del'>-          __u32 flags;</div><div class='del'>-          __u32 slot; /* as_id | slot_id */</div><div class='del'>-          __u64 offset;</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-The following values are defined for the flags field to define the</div><div class='del'>-current state of the entry::</div><div class='del'>-</div><div class='del'>-  #define KVM_DIRTY_GFN_F_DIRTY           BIT(0)</div><div class='del'>-  #define KVM_DIRTY_GFN_F_RESET           BIT(1)</div><div class='del'>-  #define KVM_DIRTY_GFN_F_MASK            0x3</div><div class='del'>-</div><div class='del'>-Userspace should call KVM_ENABLE_CAP ioctl right after KVM_CREATE_VM</div><div class='del'>-ioctl to enable this capability for the new guest and set the size of</div><div class='del'>-the rings.  Enabling the capability is only allowed before creating any</div><div class='del'>-vCPU, and the size of the ring must be a power of two.  The larger the</div><div class='del'>-ring buffer, the less likely the ring is full and the VM is forced to</div><div class='del'>-exit to userspace. The optimal size depends on the workload, but it is</div><div class='del'>-recommended that it be at least 64 KiB (4096 entries).</div><div class='del'>-</div><div class='del'>-Just like for dirty page bitmaps, the buffer tracks writes to</div><div class='del'>-all user memory regions for which the KVM_MEM_LOG_DIRTY_PAGES flag was</div><div class='del'>-set in KVM_SET_USER_MEMORY_REGION.  Once a memory region is registered</div><div class='del'>-with the flag set, userspace can start harvesting dirty pages from the</div><div class='del'>-ring buffer.</div><div class='del'>-</div><div class='del'>-An entry in the ring buffer can be unused (flag bits ``00``),</div><div class='del'>-dirty (flag bits ``01``) or harvested (flag bits ``1X``).  The</div><div class='del'>-state machine for the entry is as follows::</div><div class='del'>-</div><div class='del'>-          dirtied         harvested        reset</div><div class='del'>-     00 -----------&gt; 01 -------------&gt; 1X -------+</div><div class='del'>-      ^                                          |</div><div class='del'>-      |                                          |</div><div class='del'>-      +------------------------------------------+</div><div class='del'>-</div><div class='del'>-To harvest the dirty pages, userspace accesses the mmapped ring buffer</div><div class='del'>-to read the dirty GFNs.  If the flags has the DIRTY bit set (at this stage</div><div class='del'>-the RESET bit must be cleared), then it means this GFN is a dirty GFN.</div><div class='del'>-The userspace should harvest this GFN and mark the flags from state</div><div class='del'>-``01b`` to ``1Xb`` (bit 0 will be ignored by KVM, but bit 1 must be set</div><div class='del'>-to show that this GFN is harvested and waiting for a reset), and move</div><div class='del'>-on to the next GFN.  The userspace should continue to do this until the</div><div class='del'>-flags of a GFN have the DIRTY bit cleared, meaning that it has harvested</div><div class='del'>-all the dirty GFNs that were available.</div><div class='del'>-</div><div class='del'>-Note that on weakly ordered architectures, userspace accesses to the</div><div class='del'>-ring buffer (and more specifically the 'flags' field) must be ordered,</div><div class='del'>-using load-acquire/store-release accessors when available, or any</div><div class='del'>-other memory barrier that will ensure this ordering.</div><div class='del'>-</div><div class='del'>-It's not necessary for userspace to harvest the all dirty GFNs at once.</div><div class='del'>-However it must collect the dirty GFNs in sequence, i.e., the userspace</div><div class='del'>-program cannot skip one dirty GFN to collect the one next to it.</div><div class='del'>-</div><div class='del'>-After processing one or more entries in the ring buffer, userspace</div><div class='del'>-calls the VM ioctl KVM_RESET_DIRTY_RINGS to notify the kernel about</div><div class='del'>-it, so that the kernel will reprotect those collected GFNs.</div><div class='del'>-Therefore, the ioctl must be called *before* reading the content of</div><div class='del'>-the dirty pages.</div><div class='del'>-</div><div class='del'>-The dirty ring can get full.  When it happens, the KVM_RUN of the</div><div class='del'>-vcpu will return with exit reason KVM_EXIT_DIRTY_LOG_FULL.</div><div class='del'>-</div><div class='del'>-The dirty ring interface has a major difference comparing to the</div><div class='del'>-KVM_GET_DIRTY_LOG interface in that, when reading the dirty ring from</div><div class='del'>-userspace, it's still possible that the kernel has not yet flushed the</div><div class='del'>-processor's dirty page buffers into the kernel buffer (with dirty bitmaps, the</div><div class='del'>-flushing is done by the KVM_GET_DIRTY_LOG ioctl).  To achieve that, one</div><div class='del'>-needs to kick the vcpu out of KVM_RUN using a signal.  The resulting</div><div class='del'>-vmexit ensures that all dirty GFNs are flushed to the dirty rings.</div><div class='del'>-</div><div class='del'>-NOTE: KVM_CAP_DIRTY_LOG_RING_ACQ_REL is the only capability that</div><div class='del'>-should be exposed by weakly ordered architecture, in order to indicate</div><div class='del'>-the additional memory ordering requirements imposed on userspace when</div><div class='del'>-reading the state of an entry and mutating it from DIRTY to HARVESTED.</div><div class='del'>-Architecture with TSO-like ordering (such as x86) are allowed to</div><div class='del'>-expose both KVM_CAP_DIRTY_LOG_RING and KVM_CAP_DIRTY_LOG_RING_ACQ_REL</div><div class='del'>-to userspace.</div><div class='del'>-</div><div class='del'>-After enabling the dirty rings, the userspace needs to detect the</div><div class='del'>-capability of KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP to see whether the</div><div class='del'>-ring structures can be backed by per-slot bitmaps. With this capability</div><div class='del'>-advertised, it means the architecture can dirty guest pages without</div><div class='del'>-vcpu/ring context, so that some of the dirty information will still be</div><div class='del'>-maintained in the bitmap structure. KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP</div><div class='del'>-can't be enabled if the capability of KVM_CAP_DIRTY_LOG_RING_ACQ_REL</div><div class='del'>-hasn't been enabled, or any memslot has been existing.</div><div class='del'>-</div><div class='del'>-Note that the bitmap here is only a backup of the ring structure. The</div><div class='del'>-use of the ring and bitmap combination is only beneficial if there is</div><div class='del'>-only a very small amount of memory that is dirtied out of vcpu/ring</div><div class='del'>-context. Otherwise, the stand-alone per-slot bitmap mechanism needs to</div><div class='del'>-be considered.</div><div class='del'>-</div><div class='del'>-To collect dirty bits in the backup bitmap, userspace can use the same</div><div class='del'>-KVM_GET_DIRTY_LOG ioctl. KVM_CLEAR_DIRTY_LOG isn't needed as long as all</div><div class='del'>-the generation of the dirty bits is done in a single pass. Collecting</div><div class='del'>-the dirty bitmap should be the very last thing that the VMM does before</div><div class='del'>-considering the state as complete. VMM needs to ensure that the dirty</div><div class='del'>-state is final and avoid missing dirty pages from another ioctl ordered</div><div class='del'>-after the bitmap collection.</div><div class='del'>-</div><div class='del'>-NOTE: Multiple examples of using the backup bitmap: (1) save vgic/its</div><div class='del'>-tables through command KVM_DEV_ARM_{VGIC_GRP_CTRL, ITS_SAVE_TABLES} on</div><div class='del'>-KVM device "kvm-arm-vgic-its". (2) restore vgic/its tables through</div><div class='del'>-command KVM_DEV_ARM_{VGIC_GRP_CTRL, ITS_RESTORE_TABLES} on KVM device</div><div class='del'>-"kvm-arm-vgic-its". VGICv3 LPI pending status is restored. (3) save</div><div class='del'>-vgic3 pending table through KVM_DEV_ARM_VGIC_{GRP_CTRL, SAVE_PENDING_TABLES}</div><div class='del'>-command on KVM device "kvm-arm-vgic-v3".</div><div class='del'>-</div><div class='ctx'> 8.30 KVM_CAP_XEN_HVM</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='hunk'>@@ -8847,10 +8928,9 @@ clearing the PVCLOCK_TSC_STABLE_BIT flag in Xen pvclock sources. This will be</div><div class='ctx'> done when the KVM_CAP_XEN_HVM ioctl sets the</div><div class='ctx'> KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE flag.</div><div class='ctx'> </div><div class='del'>-8.31 KVM_CAP_PPC_MULTITCE</div><div class='del'>--------------------------</div><div class='add'>+8.31 KVM_CAP_SPAPR_MULTITCE</div><div class='add'>+---------------------------</div><div class='ctx'> </div><div class='del'>-:Capability: KVM_CAP_PPC_MULTITCE</div><div class='ctx'> :Architectures: ppc</div><div class='ctx'> :Type: vm</div><div class='ctx'> </div><div class='hunk'>@@ -8882,72 +8962,9 @@ This capability indicates that the KVM virtual PTP service is</div><div class='ctx'> supported in the host. A VMM can check whether the service is</div><div class='ctx'> available to the guest on migration.</div><div class='ctx'> </div><div class='del'>-8.33 KVM_CAP_HYPERV_ENFORCE_CPUID</div><div class='del'>----------------------------------</div><div class='del'>-</div><div class='del'>-Architectures: x86</div><div class='del'>-</div><div class='del'>-When enabled, KVM will disable emulated Hyper-V features provided to the</div><div class='del'>-guest according to the bits Hyper-V CPUID feature leaves. Otherwise, all</div><div class='del'>-currently implemented Hyper-V features are provided unconditionally when</div><div class='del'>-Hyper-V identification is set in the HYPERV_CPUID_INTERFACE (0x40000001)</div><div class='del'>-leaf.</div><div class='del'>-</div><div class='del'>-8.34 KVM_CAP_EXIT_HYPERCALL</div><div class='del'>----------------------------</div><div class='del'>-</div><div class='del'>-:Capability: KVM_CAP_EXIT_HYPERCALL</div><div class='del'>-:Architectures: x86</div><div class='del'>-:Type: vm</div><div class='del'>-</div><div class='del'>-This capability, if enabled, will cause KVM to exit to userspace</div><div class='del'>-with KVM_EXIT_HYPERCALL exit reason to process some hypercalls.</div><div class='del'>-</div><div class='del'>-Calling KVM_CHECK_EXTENSION for this capability will return a bitmask</div><div class='del'>-of hypercalls that can be configured to exit to userspace.</div><div class='del'>-Right now, the only such hypercall is KVM_HC_MAP_GPA_RANGE.</div><div class='del'>-</div><div class='del'>-The argument to KVM_ENABLE_CAP is also a bitmask, and must be a subset</div><div class='del'>-of the result of KVM_CHECK_EXTENSION.  KVM will forward to userspace</div><div class='del'>-the hypercalls whose corresponding bit is in the argument, and return</div><div class='del'>-ENOSYS for the others.</div><div class='del'>-</div><div class='del'>-8.35 KVM_CAP_PMU_CAPABILITY</div><div class='del'>----------------------------</div><div class='del'>-</div><div class='del'>-:Capability: KVM_CAP_PMU_CAPABILITY</div><div class='del'>-:Architectures: x86</div><div class='del'>-:Type: vm</div><div class='del'>-:Parameters: arg[0] is bitmask of PMU virtualization capabilities.</div><div class='del'>-:Returns: 0 on success, -EINVAL when arg[0] contains invalid bits</div><div class='del'>-</div><div class='del'>-This capability alters PMU virtualization in KVM.</div><div class='del'>-</div><div class='del'>-Calling KVM_CHECK_EXTENSION for this capability returns a bitmask of</div><div class='del'>-PMU virtualization capabilities that can be adjusted on a VM.</div><div class='del'>-</div><div class='del'>-The argument to KVM_ENABLE_CAP is also a bitmask and selects specific</div><div class='del'>-PMU virtualization capabilities to be applied to the VM.  This can</div><div class='del'>-only be invoked on a VM prior to the creation of VCPUs.</div><div class='del'>-</div><div class='del'>-At this time, KVM_PMU_CAP_DISABLE is the only capability.  Setting</div><div class='del'>-this capability will disable PMU virtualization for that VM.  Usermode</div><div class='del'>-should adjust CPUID leaf 0xA to reflect that the PMU is disabled.</div><div class='del'>-</div><div class='del'>-8.36 KVM_CAP_ARM_SYSTEM_SUSPEND</div><div class='del'>--------------------------------</div><div class='del'>-</div><div class='del'>-:Capability: KVM_CAP_ARM_SYSTEM_SUSPEND</div><div class='del'>-:Architectures: arm64</div><div class='del'>-:Type: vm</div><div class='del'>-</div><div class='del'>-When enabled, KVM will exit to userspace with KVM_EXIT_SYSTEM_EVENT of</div><div class='del'>-type KVM_SYSTEM_EVENT_SUSPEND to process the guest suspend request.</div><div class='del'>-</div><div class='ctx'> 8.37 KVM_CAP_S390_PROTECTED_DUMP</div><div class='ctx'> --------------------------------</div><div class='ctx'> </div><div class='del'>-:Capability: KVM_CAP_S390_PROTECTED_DUMP</div><div class='ctx'> :Architectures: s390</div><div class='ctx'> :Type: vm</div><div class='ctx'> </div><div class='hunk'>@@ -8957,27 +8974,9 @@ PV guests. The `KVM_PV_DUMP` command is available for the</div><div class='ctx'> dump related UV data. Also the vcpu ioctl `KVM_S390_PV_CPU_COMMAND` is</div><div class='ctx'> available and supports the `KVM_PV_DUMP_CPU` subcommand.</div><div class='ctx'> </div><div class='del'>-8.38 KVM_CAP_VM_DISABLE_NX_HUGE_PAGES</div><div class='del'>--------------------------------------</div><div class='del'>-</div><div class='del'>-:Capability: KVM_CAP_VM_DISABLE_NX_HUGE_PAGES</div><div class='del'>-:Architectures: x86</div><div class='del'>-:Type: vm</div><div class='del'>-:Parameters: arg[0] must be 0.</div><div class='del'>-:Returns: 0 on success, -EPERM if the userspace process does not</div><div class='del'>-          have CAP_SYS_BOOT, -EINVAL if args[0] is not 0 or any vCPUs have been</div><div class='del'>-          created.</div><div class='del'>-</div><div class='del'>-This capability disables the NX huge pages mitigation for iTLB MULTIHIT.</div><div class='del'>-</div><div class='del'>-The capability has no effect if the nx_huge_pages module parameter is not set.</div><div class='del'>-</div><div class='del'>-This capability may only be set before any vCPUs are created.</div><div class='del'>-</div><div class='ctx'> 8.39 KVM_CAP_S390_CPU_TOPOLOGY</div><div class='ctx'> ------------------------------</div><div class='ctx'> </div><div class='del'>-:Capability: KVM_CAP_S390_CPU_TOPOLOGY</div><div class='ctx'> :Architectures: s390</div><div class='ctx'> :Type: vm</div><div class='ctx'> </div><div class='hunk'>@@ -8999,37 +8998,9 @@ structure.</div><div class='ctx'> When getting the Modified Change Topology Report value, the attr-&gt;addr</div><div class='ctx'> must point to a byte where the value will be stored or retrieved from.</div><div class='ctx'> </div><div class='del'>-8.40 KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE</div><div class='del'>----------------------------------------</div><div class='del'>-</div><div class='del'>-:Capability: KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE</div><div class='del'>-:Architectures: arm64</div><div class='del'>-:Type: vm</div><div class='del'>-:Parameters: arg[0] is the new split chunk size.</div><div class='del'>-:Returns: 0 on success, -EINVAL if any memslot was already created.</div><div class='del'>-</div><div class='del'>-This capability sets the chunk size used in Eager Page Splitting.</div><div class='del'>-</div><div class='del'>-Eager Page Splitting improves the performance of dirty-logging (used</div><div class='del'>-in live migrations) when guest memory is backed by huge-pages.  It</div><div class='del'>-avoids splitting huge-pages (into PAGE_SIZE pages) on fault, by doing</div><div class='del'>-it eagerly when enabling dirty logging (with the</div><div class='del'>-KVM_MEM_LOG_DIRTY_PAGES flag for a memory region), or when using</div><div class='del'>-KVM_CLEAR_DIRTY_LOG.</div><div class='del'>-</div><div class='del'>-The chunk size specifies how many pages to break at a time, using a</div><div class='del'>-single allocation for each chunk. Bigger the chunk size, more pages</div><div class='del'>-need to be allocated ahead of time.</div><div class='del'>-</div><div class='del'>-The chunk size needs to be a valid block size. The list of acceptable</div><div class='del'>-block sizes is exposed in KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES as a</div><div class='del'>-64-bit bitmap (each bit describing a block size). The default value is</div><div class='del'>-0, to disable the eager page splitting.</div><div class='del'>-</div><div class='ctx'> 8.41 KVM_CAP_VM_TYPES</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='del'>-:Capability: KVM_CAP_MEMORY_ATTRIBUTES</div><div class='ctx'> :Architectures: x86</div><div class='ctx'> :Type: system ioctl</div><div class='ctx'> </div><div class='hunk'>@@ -9046,6 +9017,67 @@ Do not use KVM_X86_SW_PROTECTED_VM for "real" VMs, and especially not in</div><div class='ctx'> production.  The behavior and effective ABI for software-protected VMs is</div><div class='ctx'> unstable.</div><div class='ctx'> </div><div class='add'>+8.42 KVM_CAP_PPC_RPT_INVALIDATE</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: ppc</div><div class='add'>+</div><div class='add'>+This capability indicates that the kernel is capable of handling</div><div class='add'>+H_RPT_INVALIDATE hcall.</div><div class='add'>+</div><div class='add'>+In order to enable the use of H_RPT_INVALIDATE in the guest,</div><div class='add'>+user space might have to advertise it for the guest. For example,</div><div class='add'>+IBM pSeries (sPAPR) guest starts using it if "hcall-rpt-invalidate" is</div><div class='add'>+present in the "ibm,hypertas-functions" device-tree property.</div><div class='add'>+</div><div class='add'>+This capability is enabled for hypervisors on platforms like POWER9</div><div class='add'>+that support radix MMU.</div><div class='add'>+</div><div class='add'>+8.43 KVM_CAP_PPC_AIL_MODE_3</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: ppc</div><div class='add'>+</div><div class='add'>+This capability indicates that the kernel supports the mode 3 setting for the</div><div class='add'>+"Address Translation Mode on Interrupt" aka "Alternate Interrupt Location"</div><div class='add'>+resource that is controlled with the H_SET_MODE hypercall.</div><div class='add'>+</div><div class='add'>+This capability allows a guest kernel to use a better-performance mode for</div><div class='add'>+handling interrupts and system calls.</div><div class='add'>+</div><div class='add'>+8.44 KVM_CAP_MEMORY_FAULT_INFO</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+</div><div class='add'>+The presence of this capability indicates that KVM_RUN will fill</div><div class='add'>+kvm_run.memory_fault if KVM cannot resolve a guest page fault VM-Exit, e.g. if</div><div class='add'>+there is a valid memslot but no backing VMA for the corresponding host virtual</div><div class='add'>+address.</div><div class='add'>+</div><div class='add'>+The information in kvm_run.memory_fault is valid if and only if KVM_RUN returns</div><div class='add'>+an error with errno=EFAULT or errno=EHWPOISON *and* kvm_run.exit_reason is set</div><div class='add'>+to KVM_EXIT_MEMORY_FAULT.</div><div class='add'>+</div><div class='add'>+Note: Userspaces which attempt to resolve memory faults so that they can retry</div><div class='add'>+KVM_RUN are encouraged to guard against repeatedly receiving the same</div><div class='add'>+error/annotated fault.</div><div class='add'>+</div><div class='add'>+See KVM_EXIT_MEMORY_FAULT for more information.</div><div class='add'>+</div><div class='add'>+8.45 KVM_CAP_X86_GUEST_MODE</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+:Architectures: x86</div><div class='add'>+</div><div class='add'>+The presence of this capability indicates that KVM_RUN will update the</div><div class='add'>+KVM_RUN_X86_GUEST_MODE bit in kvm_run.flags to indicate whether the</div><div class='add'>+vCPU was executing nested guest code when it exited.</div><div class='add'>+</div><div class='add'>+KVM exits with the register state of either the L1 or L2 guest</div><div class='add'>+depending on which executed at the time of an exit. Userspace must</div><div class='add'>+take care to differentiate between these cases.</div><div class='add'>+</div><div class='ctx'> 9. Known KVM API problems</div><div class='ctx'> =========================</div><div class='ctx'> </div><div class='hunk'>@@ -9076,9 +9108,10 @@ the local APIC.</div><div class='ctx'> </div><div class='ctx'> The same is true for the ``KVM_FEATURE_PV_UNHALT`` paravirtualized feature.</div><div class='ctx'> </div><div class='del'>-CPU[EAX=1]:ECX[24] (TSC_DEADLINE) is not reported by ``KVM_GET_SUPPORTED_CPUID``.</div><div class='del'>-It can be enabled if ``KVM_CAP_TSC_DEADLINE_TIMER`` is present and the kernel</div><div class='del'>-has enabled in-kernel emulation of the local APIC.</div><div class='add'>+On older versions of Linux, CPU[EAX=1]:ECX[24] (TSC_DEADLINE) is not reported by</div><div class='add'>+``KVM_GET_SUPPORTED_CPUID``, but it can be enabled if ``KVM_CAP_TSC_DEADLINE_TIMER``</div><div class='add'>+is present and the kernel has enabled in-kernel emulation of the local APIC.</div><div class='add'>+On newer versions, ``KVM_GET_SUPPORTED_CPUID`` does report the bit as available.</div><div class='ctx'> </div><div class='ctx'> CPU topology</div><div class='ctx'> ~~~~~~~~~~~~</div><div class='head'>diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst<br/>index 31a9576c07af..60bf205cb373 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/virt/kvm/devices/vcpu.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/virt/kvm/devices/vcpu.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/virt/kvm/devices/vcpu.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/virt/kvm/devices/vcpu.rst</a></div><div class='hunk'>@@ -137,6 +137,30 @@ exit_reason = KVM_EXIT_FAIL_ENTRY and populate the fail_entry struct by setting</div><div class='ctx'> hardare_entry_failure_reason field to KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED and</div><div class='ctx'> the cpu field to the processor id.</div><div class='ctx'> </div><div class='add'>+1.5 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS</div><div class='add'>+--------------------------------------------------</div><div class='add'>+</div><div class='add'>+:Parameters: in kvm_device_attr.addr the address to an unsigned int</div><div class='add'>+	     representing the maximum value taken by PMCR_EL0.N</div><div class='add'>+</div><div class='add'>+:Returns:</div><div class='add'>+</div><div class='add'>+	 =======  ====================================================</div><div class='add'>+	 -EBUSY   PMUv3 already initialized, a VCPU has already run or</div><div class='add'>+                  an event filter has already been set</div><div class='add'>+	 -EFAULT  Error accessing the value pointed to by addr</div><div class='add'>+	 -ENODEV  PMUv3 not supported or GIC not initialized</div><div class='add'>+	 -EINVAL  No PMUv3 explicitly selected, or value of N out of</div><div class='add'>+	 	  range</div><div class='add'>+	 =======  ====================================================</div><div class='add'>+</div><div class='add'>+Set the number of implemented event counters in the virtual PMU. This</div><div class='add'>+mandates that a PMU has explicitly been selected via</div><div class='add'>+KVM_ARM_VCPU_PMU_V3_SET_PMU, and will fail when no PMU has been</div><div class='add'>+explicitly selected, or the number of counters is out of range for the</div><div class='add'>+selected PMU. Selecting a new PMU cancels the effect of setting this</div><div class='add'>+attribute.</div><div class='add'>+</div><div class='ctx'> 2. GROUP: KVM_ARM_VCPU_TIMER_CTRL</div><div class='ctx'> =================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/virt/kvm/x86/index.rst b/Documentation/virt/kvm/x86/index.rst<br/>index 9ece6b8dc817..851e99174762 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/virt/kvm/x86/index.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/virt/kvm/x86/index.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/virt/kvm/x86/index.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/virt/kvm/x86/index.rst</a></div><div class='hunk'>@@ -11,6 +11,7 @@ KVM for x86 systems</div><div class='ctx'>    cpuid</div><div class='ctx'>    errata</div><div class='ctx'>    hypercalls</div><div class='add'>+   intel-tdx</div><div class='ctx'>    mmu</div><div class='ctx'>    msr</div><div class='ctx'>    nested-vmx</div><div class='head'>diff --git a/Documentation/virt/kvm/x86/intel-tdx.rst b/Documentation/virt/kvm/x86/intel-tdx.rst<br/>new file mode 100644<br/>index 000000000000..76bdd95334d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/virt/kvm/x86/intel-tdx.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/virt/kvm/x86/intel-tdx.rst</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===================================</div><div class='add'>+Intel Trust Domain Extensions (TDX)</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+Intel's Trust Domain Extensions (TDX) protect confidential guest VMs from the</div><div class='add'>+host and physical attacks.  A CPU-attested software module called 'the TDX</div><div class='add'>+module' runs inside a new CPU isolated range to provide the functionalities to</div><div class='add'>+manage and run protected VMs, a.k.a, TDX guests or TDs.</div><div class='add'>+</div><div class='add'>+Please refer to [1] for the whitepaper, specifications and other resources.</div><div class='add'>+</div><div class='add'>+This documentation describes TDX-specific KVM ABIs.  The TDX module needs to be</div><div class='add'>+initialized before it can be used by KVM to run any TDX guests.  The host</div><div class='add'>+core-kernel provides the support of initializing the TDX module, which is</div><div class='add'>+described in the Documentation/arch/x86/tdx.rst.</div><div class='add'>+</div><div class='add'>+API description</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+KVM_MEMORY_ENCRYPT_OP</div><div class='add'>+---------------------</div><div class='add'>+:Type: vm ioctl, vcpu ioctl</div><div class='add'>+</div><div class='add'>+For TDX operations, KVM_MEMORY_ENCRYPT_OP is re-purposed to be generic</div><div class='add'>+ioctl with TDX specific sub-ioctl() commands.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  /* Trust Domain Extensions sub-ioctl() commands. */</div><div class='add'>+  enum kvm_tdx_cmd_id {</div><div class='add'>+          KVM_TDX_CAPABILITIES = 0,</div><div class='add'>+          KVM_TDX_INIT_VM,</div><div class='add'>+          KVM_TDX_INIT_VCPU,</div><div class='add'>+          KVM_TDX_INIT_MEM_REGION,</div><div class='add'>+          KVM_TDX_FINALIZE_VM,</div><div class='add'>+          KVM_TDX_GET_CPUID,</div><div class='add'>+</div><div class='add'>+          KVM_TDX_CMD_NR_MAX,</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  struct kvm_tdx_cmd {</div><div class='add'>+        /* enum kvm_tdx_cmd_id */</div><div class='add'>+        __u32 id;</div><div class='add'>+        /* flags for sub-command. If sub-command doesn't use this, set zero. */</div><div class='add'>+        __u32 flags;</div><div class='add'>+        /*</div><div class='add'>+         * data for each sub-command. An immediate or a pointer to the actual</div><div class='add'>+         * data in process virtual address.  If sub-command doesn't use it,</div><div class='add'>+         * set zero.</div><div class='add'>+         */</div><div class='add'>+        __u64 data;</div><div class='add'>+        /*</div><div class='add'>+         * Auxiliary error code.  The sub-command may return TDX SEAMCALL</div><div class='add'>+         * status code in addition to -Exxx.</div><div class='add'>+         */</div><div class='add'>+        __u64 hw_error;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+KVM_TDX_CAPABILITIES</div><div class='add'>+--------------------</div><div class='add'>+:Type: vm ioctl</div><div class='add'>+:Returns: 0 on success, &lt;0 on error</div><div class='add'>+</div><div class='add'>+Return the TDX capabilities that current KVM supports with the specific TDX</div><div class='add'>+module loaded in the system.  It reports what features/capabilities are allowed</div><div class='add'>+to be configured to the TDX guest.</div><div class='add'>+</div><div class='add'>+- id: KVM_TDX_CAPABILITIES</div><div class='add'>+- flags: must be 0</div><div class='add'>+- data: pointer to struct kvm_tdx_capabilities</div><div class='add'>+- hw_error: must be 0</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  struct kvm_tdx_capabilities {</div><div class='add'>+        __u64 supported_attrs;</div><div class='add'>+        __u64 supported_xfam;</div><div class='add'>+        __u64 reserved[254];</div><div class='add'>+</div><div class='add'>+        /* Configurable CPUID bits for userspace */</div><div class='add'>+        struct kvm_cpuid2 cpuid;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+KVM_TDX_INIT_VM</div><div class='add'>+---------------</div><div class='add'>+:Type: vm ioctl</div><div class='add'>+:Returns: 0 on success, &lt;0 on error</div><div class='add'>+</div><div class='add'>+Perform TDX specific VM initialization.  This needs to be called after</div><div class='add'>+KVM_CREATE_VM and before creating any VCPUs.</div><div class='add'>+</div><div class='add'>+- id: KVM_TDX_INIT_VM</div><div class='add'>+- flags: must be 0</div><div class='add'>+- data: pointer to struct kvm_tdx_init_vm</div><div class='add'>+- hw_error: must be 0</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  struct kvm_tdx_init_vm {</div><div class='add'>+          __u64 attributes;</div><div class='add'>+          __u64 xfam;</div><div class='add'>+          __u64 mrconfigid[6];          /* sha384 digest */</div><div class='add'>+          __u64 mrowner[6];             /* sha384 digest */</div><div class='add'>+          __u64 mrownerconfig[6];       /* sha384 digest */</div><div class='add'>+</div><div class='add'>+          /* The total space for TD_PARAMS before the CPUIDs is 256 bytes */</div><div class='add'>+          __u64 reserved[12];</div><div class='add'>+</div><div class='add'>+        /*</div><div class='add'>+         * Call KVM_TDX_INIT_VM before vcpu creation, thus before</div><div class='add'>+         * KVM_SET_CPUID2.</div><div class='add'>+         * This configuration supersedes KVM_SET_CPUID2s for VCPUs because the</div><div class='add'>+         * TDX module directly virtualizes those CPUIDs without VMM.  The user</div><div class='add'>+         * space VMM, e.g. qemu, should make KVM_SET_CPUID2 consistent with</div><div class='add'>+         * those values.  If it doesn't, KVM may have wrong idea of vCPUIDs of</div><div class='add'>+         * the guest, and KVM may wrongly emulate CPUIDs or MSRs that the TDX</div><div class='add'>+         * module doesn't virtualize.</div><div class='add'>+         */</div><div class='add'>+          struct kvm_cpuid2 cpuid;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+KVM_TDX_INIT_VCPU</div><div class='add'>+-----------------</div><div class='add'>+:Type: vcpu ioctl</div><div class='add'>+:Returns: 0 on success, &lt;0 on error</div><div class='add'>+</div><div class='add'>+Perform TDX specific VCPU initialization.</div><div class='add'>+</div><div class='add'>+- id: KVM_TDX_INIT_VCPU</div><div class='add'>+- flags: must be 0</div><div class='add'>+- data: initial value of the guest TD VCPU RCX</div><div class='add'>+- hw_error: must be 0</div><div class='add'>+</div><div class='add'>+KVM_TDX_INIT_MEM_REGION</div><div class='add'>+-----------------------</div><div class='add'>+:Type: vcpu ioctl</div><div class='add'>+:Returns: 0 on success, &lt;0 on error</div><div class='add'>+</div><div class='add'>+Initialize @nr_pages TDX guest private memory starting from @gpa with userspace</div><div class='add'>+provided data from @source_addr.</div><div class='add'>+</div><div class='add'>+Note, before calling this sub command, memory attribute of the range</div><div class='add'>+[gpa, gpa + nr_pages] needs to be private.  Userspace can use</div><div class='add'>+KVM_SET_MEMORY_ATTRIBUTES to set the attribute.</div><div class='add'>+</div><div class='add'>+If KVM_TDX_MEASURE_MEMORY_REGION flag is specified, it also extends measurement.</div><div class='add'>+</div><div class='add'>+- id: KVM_TDX_INIT_MEM_REGION</div><div class='add'>+- flags: currently only KVM_TDX_MEASURE_MEMORY_REGION is defined</div><div class='add'>+- data: pointer to struct kvm_tdx_init_mem_region</div><div class='add'>+- hw_error: must be 0</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  #define KVM_TDX_MEASURE_MEMORY_REGION   (1UL &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+  struct kvm_tdx_init_mem_region {</div><div class='add'>+          __u64 source_addr;</div><div class='add'>+          __u64 gpa;</div><div class='add'>+          __u64 nr_pages;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+KVM_TDX_FINALIZE_VM</div><div class='add'>+-------------------</div><div class='add'>+:Type: vm ioctl</div><div class='add'>+:Returns: 0 on success, &lt;0 on error</div><div class='add'>+</div><div class='add'>+Complete measurement of the initial TD contents and mark it ready to run.</div><div class='add'>+</div><div class='add'>+- id: KVM_TDX_FINALIZE_VM</div><div class='add'>+- flags: must be 0</div><div class='add'>+- data: must be 0</div><div class='add'>+- hw_error: must be 0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+KVM_TDX_GET_CPUID</div><div class='add'>+-----------------</div><div class='add'>+:Type: vcpu ioctl</div><div class='add'>+:Returns: 0 on success, &lt;0 on error</div><div class='add'>+</div><div class='add'>+Get the CPUID values that the TDX module virtualizes for the TD guest.</div><div class='add'>+When it returns -E2BIG, the user space should allocate a larger buffer and</div><div class='add'>+retry. The minimum buffer size is updated in the nent field of the</div><div class='add'>+struct kvm_cpuid2.</div><div class='add'>+</div><div class='add'>+- id: KVM_TDX_GET_CPUID</div><div class='add'>+- flags: must be 0</div><div class='add'>+- data: pointer to struct kvm_cpuid2 (in/out)</div><div class='add'>+- hw_error: must be 0 (out)</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  struct kvm_cpuid2 {</div><div class='add'>+	  __u32 nent;</div><div class='add'>+	  __u32 padding;</div><div class='add'>+	  struct kvm_cpuid_entry2 entries[0];</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  struct kvm_cpuid_entry2 {</div><div class='add'>+	  __u32 function;</div><div class='add'>+	  __u32 index;</div><div class='add'>+	  __u32 flags;</div><div class='add'>+	  __u32 eax;</div><div class='add'>+	  __u32 ebx;</div><div class='add'>+	  __u32 ecx;</div><div class='add'>+	  __u32 edx;</div><div class='add'>+	  __u32 padding[3];</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+KVM TDX creation flow</div><div class='add'>+=====================</div><div class='add'>+In addition to the standard KVM flow, new TDX ioctls need to be called.  The</div><div class='add'>+control flow is as follows:</div><div class='add'>+</div><div class='add'>+#. Check system wide capability</div><div class='add'>+</div><div class='add'>+   * KVM_CAP_VM_TYPES: Check if VM type is supported and if KVM_X86_TDX_VM</div><div class='add'>+     is supported.</div><div class='add'>+</div><div class='add'>+#. Create VM</div><div class='add'>+</div><div class='add'>+   * KVM_CREATE_VM</div><div class='add'>+   * KVM_TDX_CAPABILITIES: Query TDX capabilities for creating TDX guests.</div><div class='add'>+   * KVM_CHECK_EXTENSION(KVM_CAP_MAX_VCPUS): Query maximum VCPUs the TD can</div><div class='add'>+     support at VM level (TDX has its own limitation on this).</div><div class='add'>+   * KVM_SET_TSC_KHZ: Configure TD's TSC frequency if a different TSC frequency</div><div class='add'>+     than host is desired.  This is Optional.</div><div class='add'>+   * KVM_TDX_INIT_VM: Pass TDX specific VM parameters.</div><div class='add'>+</div><div class='add'>+#. Create VCPU</div><div class='add'>+</div><div class='add'>+   * KVM_CREATE_VCPU</div><div class='add'>+   * KVM_TDX_INIT_VCPU: Pass TDX specific VCPU parameters.</div><div class='add'>+   * KVM_SET_CPUID2: Configure TD's CPUIDs.</div><div class='add'>+   * KVM_SET_MSRS: Configure TD's MSRs.</div><div class='add'>+</div><div class='add'>+#. Initialize initial guest memory</div><div class='add'>+</div><div class='add'>+   * Prepare content of initial guest memory.</div><div class='add'>+   * KVM_TDX_INIT_MEM_REGION: Add initial guest memory.</div><div class='add'>+   * KVM_TDX_FINALIZE_VM: Finalize the measurement of the TDX guest.</div><div class='add'>+</div><div class='add'>+#. Run VCPU</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+https://www.intel.com/content/www/us/en/developer/tools/trust-domain-extensions/documentation.html</div><div class='head'>diff --git a/Documentation/wmi/devices/alienware-wmi.rst b/Documentation/wmi/devices/alienware-wmi.rst<br/>index ddc5e561960e..1d9d43e2e314 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/wmi/devices/alienware-wmi.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/wmi/devices/alienware-wmi.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/wmi/devices/alienware-wmi.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/wmi/devices/alienware-wmi.rst</a></div><div class='hunk'>@@ -11,7 +11,7 @@ The WMI device WMAX has been implemented for many Alienware and Dell's G-Series</div><div class='ctx'> models. Throughout these models, two implementations have been identified. The</div><div class='ctx'> first one, used by older systems, deals with HDMI, brightness, RGB, amplifier</div><div class='ctx'> and deep sleep control. The second one used by newer systems deals primarily</div><div class='del'>-with thermal, overclocking, and GPIO control.</div><div class='add'>+with thermal control and overclocking.</div><div class='ctx'> </div><div class='ctx'> It is suspected that the latter is used by Alienware Command Center (AWCC) to</div><div class='ctx'> manage manufacturer predefined thermal profiles. The alienware-wmi driver</div><div class='hunk'>@@ -69,9 +69,6 @@ data using the `bmfdec &lt;https://github.com/pali/bmfdec&gt;`_ utility:</div><div class='ctx'>    [WmiMethodId(164), Implemented, read, write, Description("Tobii Camera Power Off.")] void TobiiCameraPowerOff([out] uint32 argr);</div><div class='ctx'>  };</div><div class='ctx'> </div><div class='del'>-Some of these methods get quite intricate so we will describe them using</div><div class='del'>-pseudo-code that vaguely resembles the original ASL code.</div><div class='del'>-</div><div class='ctx'> Methods not described in the following document have unknown behavior.</div><div class='ctx'> </div><div class='ctx'> Argument Structure</div><div class='hunk'>@@ -87,175 +84,133 @@ ID 0xA0, the argument you would pass to the method is 0xA001.</div><div class='ctx'> Thermal Methods</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='del'>-WMI method Thermal_Information([in] uint32 arg2, [out] uint32 argr)</div><div class='del'>--------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x01:</div><div class='del'>-         argr = 1</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x02:</div><div class='del'>-         argr = SYSTEM_DESCRIPTION</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x03:</div><div class='del'>-         if BYTE_1(arg2) == 0x00:</div><div class='del'>-                 argr = FAN_ID_0</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x01:</div><div class='del'>-                 argr = FAN_ID_1</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x02:</div><div class='del'>-                 argr = FAN_ID_2</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x03:</div><div class='del'>-                 argr = FAN_ID_3</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x04:</div><div class='del'>-                 argr = SENSOR_ID_CPU | 0x0100</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x05:</div><div class='del'>-                 argr = SENSOR_ID_GPU | 0x0100</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x06:</div><div class='del'>-                 argr = THERMAL_MODE_QUIET_ID</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x07:</div><div class='del'>-                 argr = THERMAL_MODE_BALANCED_ID</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x08:</div><div class='del'>-                 argr = THERMAL_MODE_BALANCED_PERFORMANCE_ID</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x09:</div><div class='del'>-                 argr = THERMAL_MODE_PERFORMANCE_ID</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x0A:</div><div class='del'>-                 argr = THERMAL_MODE_LOW_POWER_ID</div><div class='del'>-</div><div class='del'>-         if BYTE_1(arg2) == 0x0B:</div><div class='del'>-                 argr = THERMAL_MODE_GMODE_ID</div><div class='del'>-</div><div class='del'>-         else:</div><div class='del'>-                 argr = 0xFFFFFFFF</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x04:</div><div class='del'>-         if is_valid_sensor(BYTE_1(arg2)):</div><div class='del'>-                 argr = SENSOR_TEMP_C</div><div class='del'>-         else:</div><div class='del'>-                 argr = 0xFFFFFFFF</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x05:</div><div class='del'>-         if is_valid_fan(BYTE_1(arg2)):</div><div class='del'>-                 argr = FAN_RPM()</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x06:</div><div class='del'>-         skip</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x07:</div><div class='del'>-         argr = 0</div><div class='del'>-</div><div class='del'>- If BYTE_0(arg2) == 0x08:</div><div class='del'>-         if is_valid_fan(BYTE_1(arg2)):</div><div class='del'>-                 argr = 0</div><div class='del'>-         else:</div><div class='del'>-                 argr = 0xFFFFFFFF</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x09:</div><div class='del'>-         if is_valid_fan(BYTE_1(arg2)):</div><div class='del'>-                 argr = FAN_UNKNOWN_STAT_0()</div><div class='del'>-</div><div class='del'>-         else:</div><div class='del'>-                 argr = 0xFFFFFFFF</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x0A:</div><div class='del'>-         argr = THERMAL_MODE_BALANCED_ID</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x0B:</div><div class='del'>-         argr = CURRENT_THERMAL_MODE()</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x0C:</div><div class='del'>-         if is_valid_fan(BYTE_1(arg2)):</div><div class='del'>-                 argr = FAN_UNKNOWN_STAT_1()</div><div class='del'>-         else:</div><div class='del'>-                 argr = 0xFFFFFFFF</div><div class='del'>-</div><div class='del'>-Operation 0x02 returns a *system description* buffer with the following</div><div class='del'>-structure:</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- out[0] -&gt; Number of fans</div><div class='del'>- out[1] -&gt; Number of sensors</div><div class='del'>- out[2] -&gt; 0x00</div><div class='del'>- out[3] -&gt; Number of thermal modes</div><div class='add'>+WMI method GetFanSensors([in] uint32 arg2, [out] uint32 argr)</div><div class='add'>+-------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-Operation 0x03 list all available fan IDs, sensor IDs and thermal profile</div><div class='del'>-codes in order, but different models may have different number of fans and</div><div class='del'>-thermal profiles. These are the known ranges:</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| Operation (Byte 0) | Description                        | Arguments          |</div><div class='add'>++====================+====================================+====================+</div><div class='add'>+| 0x01               | Get the number of temperature      | - Byte 1: Fan ID   |</div><div class='add'>+|                    | sensors related with a fan ID      |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x02               | Get the temperature sensor IDs     | - Byte 1: Fan ID   |</div><div class='add'>+|                    | related to a fan sensor ID         | - Byte 2: Index    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='ctx'> </div><div class='del'>-* Fan IDs: from 2 up to 4</div><div class='del'>-* Sensor IDs: 2</div><div class='del'>-* Thermal profile codes: from 1 up to 7</div><div class='add'>+WMI method Thermal_Information([in] uint32 arg2, [out] uint32 argr)</div><div class='add'>+-------------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-In total BYTE_1(ARG2) may range from 0x5 up to 0xD depending on the model.</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| Operation (Byte 0) | Description                        | Arguments          |</div><div class='add'>++====================+====================================+====================+</div><div class='add'>+| 0x01               | Unknown.                           | - None             |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x02               | Get system description number with | - None             |</div><div class='add'>+|                    | the following structure:           |                    |</div><div class='add'>+|                    |                                    |                    |</div><div class='add'>+|                    | - Byte 0: Number of fans           |                    |</div><div class='add'>+|                    | - Byte 1: Number of temperature    |                    |</div><div class='add'>+|                    |   sensors                          |                    |</div><div class='add'>+|                    | - Byte 2: Unknown                  |                    |</div><div class='add'>+|                    | - Byte 3: Number of thermal        |                    |</div><div class='add'>+|                    |   profiles                         |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x03               | List an ID or resource at a given  | - Byte 1: Index    |</div><div class='add'>+|                    | index. Fan IDs, temperature IDs,   |                    |</div><div class='add'>+|                    | unknown IDs and thermal profile    |                    |</div><div class='add'>+|                    | IDs are listed in that exact       |                    |</div><div class='add'>+|                    | order.                             |                    |</div><div class='add'>+|                    |                                    |                    |</div><div class='add'>+|                    | Operation 0x02 is used to know     |                    |</div><div class='add'>+|                    | which indexes map to which         |                    |</div><div class='add'>+|                    | resources.                         |                    |</div><div class='add'>+|                    |                                    |                    |</div><div class='add'>+|                    | **Returns:** ID at a given index   |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x04               | Get the current temperature for a  | - Byte 1: Sensor   |</div><div class='add'>+|                    | given temperature sensor.          |   ID               |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x05               | Get the current RPM for a given    | - Byte 1: Fan ID   |</div><div class='add'>+|                    | fan.                               |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x06               | Get fan speed percentage. (not     | - Byte 1: Fan ID   |</div><div class='add'>+|                    | implemented in every model)        |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x07               | Unknown.                           | - Unknown          |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x08               | Get minimum RPM for a given FAN    | - Byte 1: Fan ID   |</div><div class='add'>+|                    | ID.                                |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x09               | Get maximum RPM for a given FAN    | - Byte 1: Fan ID   |</div><div class='add'>+|                    | ID.                                |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x0A               | Get balanced thermal profile ID.   | - None             |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x0B               | Get current thermal profile ID.    | - None             |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x0C               | Get current `boost` value for a    | - Byte 1: Fan ID   |</div><div class='add'>+|                    | given fan ID.                      |                    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='ctx'> </div><div class='ctx'> WMI method Thermal_Control([in] uint32 arg2, [out] uint32 argr)</div><div class='ctx'> ---------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x01:</div><div class='del'>-         if is_valid_thermal_profile(BYTE_1(arg2)):</div><div class='del'>-                 SET_THERMAL_PROFILE(BYTE_1(arg2))</div><div class='del'>-                 argr = 0</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x02:</div><div class='del'>-         if is_valid_fan(BYTE_1(arg2)):</div><div class='del'>-                 SET_FAN_SPEED_MULTIPLIER(BYTE_2(arg2))</div><div class='del'>-                 argr = 0</div><div class='del'>-         else:</div><div class='del'>-                 argr = 0xFFFFFFFF</div><div class='del'>-</div><div class='del'>-.. note::</div><div class='del'>-   While you can manually change the fan speed multiplier with this method,</div><div class='del'>-   Dell's BIOS tends to overwrite this changes anyway.</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| Operation (Byte 0) | Description                        | Arguments          |</div><div class='add'>++====================+====================================+====================+</div><div class='add'>+| 0x01               | Activate a given thermal profile.  | - Byte 1: Thermal  |</div><div class='add'>+|                    |                                    |   profile ID       |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x02               | Set a `boost` value for a given    | - Byte 1: Fan ID   |</div><div class='add'>+|                    | fan ID.                            | - Byte 2: Boost    |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='ctx'> </div><div class='ctx'> These are the known thermal profile codes:</div><div class='ctx'> </div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- CUSTOM                         0x00</div><div class='del'>-</div><div class='del'>- BALANCED_USTT                  0xA0</div><div class='del'>- BALANCED_PERFORMANCE_USTT      0xA1</div><div class='del'>- COOL_USTT                      0xA2</div><div class='del'>- QUIET_USTT                     0xA3</div><div class='del'>- PERFORMANCE_USTT               0xA4</div><div class='del'>- LOW_POWER_USTT                 0xA5</div><div class='del'>-</div><div class='del'>- QUIET                          0x96</div><div class='del'>- BALANCED                       0x97</div><div class='del'>- BALANCED_PERFORMANCE           0x98</div><div class='del'>- PERFORMANCE                    0x99</div><div class='del'>-</div><div class='del'>- GMODE                          0xAB</div><div class='del'>-</div><div class='del'>-Usually if a model doesn't support the first four profiles they will support</div><div class='del'>-the User Selectable Thermal Tables (USTT) profiles and vice-versa.</div><div class='del'>-</div><div class='del'>-GMODE replaces PERFORMANCE in G-Series laptops.</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Thermal Profile              | Type     | ID   |</div><div class='add'>++==============================+==========+======+</div><div class='add'>+| Custom                       | Special  | 0x00 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| G-Mode                       | Special  | 0xAB |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Quiet                        | Legacy   | 0x96 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Balanced                     | Legacy   | 0x97 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Balanced Performance         | Legacy   | 0x98 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Performance                  | Legacy   | 0x99 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Balanced                     | USTT     | 0xA0 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Balanced Performance         | USTT     | 0xA1 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Cool                         | USTT     | 0xA2 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Quiet                        | USTT     | 0xA3 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Performance                  | USTT     | 0xA4 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+| Low Power                    | USTT     | 0xA5 |</div><div class='add'>++------------------------------+----------+------+</div><div class='add'>+</div><div class='add'>+If a model supports the User Selectable Thermal Tables (USTT) profiles, it will</div><div class='add'>+not support the Legacy profiles and vice-versa.</div><div class='add'>+</div><div class='add'>+Every model supports the CUSTOM (0x00) thermal profile. GMODE replaces</div><div class='add'>+PERFORMANCE in G-Series laptops.</div><div class='ctx'> </div><div class='ctx'> WMI method GameShiftStatus([in] uint32 arg2, [out] uint32 argr)</div><div class='ctx'> ---------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x1:</div><div class='del'>-         TOGGLE_GAME_SHIFT()</div><div class='del'>-         argr = GET_GAME_SHIFT_STATUS()</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x2:</div><div class='del'>-         argr = GET_GAME_SHIFT_STATUS()</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| Operation (Byte 0) | Description                        | Arguments          |</div><div class='add'>++====================+====================================+====================+</div><div class='add'>+| 0x01               | Toggle *Game Shift*.               | - None             |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| 0x02               | Get *Game Shift* status.           | - None             |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='ctx'> </div><div class='ctx'> Game Shift Status does not change the fan speed profile but it could be some</div><div class='ctx'> sort of CPU/GPU power profile. Benchmarks have not been done.</div><div class='hunk'>@@ -267,118 +222,82 @@ Thermal_Information does not list it.</div><div class='ctx'> G-key on Dell's G-Series laptops also changes Game Shift status, so both are</div><div class='ctx'> directly related.</div><div class='ctx'> </div><div class='del'>-WMI method GetFanSensors([in] uint32 arg2, [out] uint32 argr)</div><div class='del'>--------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x1:</div><div class='del'>-        if is_valid_fan(BYTE_1(arg2)):</div><div class='del'>-                argr = 1</div><div class='del'>-        else:</div><div class='del'>-                argr = 0</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0x2:</div><div class='del'>-        if is_valid_fan(BYTE_1(arg2)):</div><div class='del'>-                if BYTE_2(arg2) == 0:</div><div class='del'>-                        argr == SENSOR_ID</div><div class='del'>-                else</div><div class='del'>-                        argr == 0xFFFFFFFF</div><div class='del'>-        else:</div><div class='del'>-                argr = 0</div><div class='del'>-</div><div class='ctx'> Overclocking Methods</div><div class='ctx'> ====================</div><div class='ctx'> </div><div class='del'>-.. warning::</div><div class='del'>-   These methods have not been tested and are only partially reverse</div><div class='del'>-   engineered.</div><div class='del'>-</div><div class='del'>-WMI method Return_OverclockingReport([out] uint32 argr)</div><div class='del'>--------------------------------------------------------</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- CSMI (0xE3, 0x99)</div><div class='del'>- argr = 0</div><div class='del'>-</div><div class='del'>-CSMI is an unknown operation.</div><div class='del'>-</div><div class='del'>-WMI method Set_OCUIBIOSControl([in] uint32 arg2, [out] uint32 argr)</div><div class='del'>--------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- CSMI (0xE3, 0x99)</div><div class='del'>- argr = 0</div><div class='del'>-</div><div class='del'>-CSMI is an unknown operation.</div><div class='del'>-</div><div class='del'>-WMI method Clear_OCFailSafeFlag([out] uint32 argr)</div><div class='del'>---------------------------------------------------</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- CSMI (0xE3, 0x99)</div><div class='del'>- argr = 0</div><div class='del'>-</div><div class='del'>-CSMI is an unknown operation.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> WMI method MemoryOCControl([in] uint32 arg2, [out] uint32 argr)</div><div class='ctx'> ---------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> AWCC supports memory overclocking, but this method is very intricate and has</div><div class='ctx'> not been deciphered yet.</div><div class='ctx'> </div><div class='del'>-GPIO methods</div><div class='del'>-============</div><div class='add'>+GPIO control Methods</div><div class='add'>+====================</div><div class='ctx'> </div><div class='del'>-These methods are probably related to some kind of firmware update system,</div><div class='del'>-through a GPIO device.</div><div class='add'>+Alienware and Dell G Series devices with the AWCC interface usually have an</div><div class='add'>+embedded STM32 RGB lighting controller with USB/HID capabilities. It's vendor ID</div><div class='add'>+is ``187c`` while it's product ID may vary from model to model.</div><div class='add'>+</div><div class='add'>+The control of two GPIO pins of this MCU is exposed as WMI methods for debugging</div><div class='add'>+purposes.</div><div class='add'>+</div><div class='add'>++--------------+--------------------------------------------------------------+</div><div class='add'>+| Pin          | Description                                                  |</div><div class='add'>++==============+===============================+==============================+</div><div class='add'>+| 0            | Device Firmware Update (DFU)  | **HIGH**: Enables DFU mode   |</div><div class='add'>+|              | mode pin.                     | on next MCU boot.            |</div><div class='add'>+|              |                               +------------------------------+</div><div class='add'>+|              |                               | **LOW**: Disables DFU mode   |</div><div class='add'>+|              |                               | on next MCU boot.            |</div><div class='add'>++--------------+-------------------------------+------------------------------+</div><div class='add'>+| 1            | Negative Reset (NRST) pin.    | **HIGH**: MCU is ON.         |</div><div class='add'>+|              |                               |                              |</div><div class='add'>+|              |                               +------------------------------+</div><div class='add'>+|              |                               | **LOW**: MCU is OFF.         |</div><div class='add'>+|              |                               |                              |</div><div class='add'>++--------------+-------------------------------+------------------------------+</div><div class='add'>+</div><div class='add'>+See :ref:`acknowledgements` for more information on this MCU.</div><div class='ctx'> </div><div class='del'>-.. warning::</div><div class='del'>-   These methods have not been tested and are only partially reverse</div><div class='del'>-   engineered.</div><div class='add'>+.. note::</div><div class='add'>+   Some GPIO control methods break the usual argument structure and take a</div><div class='add'>+   **Pin number** instead of an operation on the first byte.</div><div class='ctx'> </div><div class='ctx'> WMI method FWUpdateGPIOtoggle([in] uint32 arg2, [out] uint32 argr)</div><div class='ctx'> ------------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 0:</div><div class='del'>-         if BYTE_1(arg2) == 1:</div><div class='del'>-                 SET_PIN_A_HIGH()</div><div class='del'>-         else:</div><div class='del'>-                 SET_PIN_A_LOW()</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 1:</div><div class='del'>-         if BYTE_1(arg2) == 1:</div><div class='del'>-                 SET_PIN_B_HIGH()</div><div class='del'>-</div><div class='del'>-         else:</div><div class='del'>-                 SET_PIN_B_LOW()</div><div class='del'>-</div><div class='del'>- else:</div><div class='del'>-         argr = 1</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| Operation (Byte 0) | Description                        | Arguments          |</div><div class='add'>++====================+====================================+====================+</div><div class='add'>+| Pin number         | Set the pin status                 | - Byte 1: Pin      |</div><div class='add'>+|                    |                                    |   status           |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='ctx'> </div><div class='ctx'> WMI method ReadTotalofGPIOs([out] uint32 argr)</div><div class='ctx'> ----------------------------------------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| Operation (Byte 0) | Description                        | Arguments          |</div><div class='add'>++====================+====================================+====================+</div><div class='add'>+| N/A                | Get the total number of GPIOs      | - None             |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='ctx'> </div><div class='del'>- argr = 0x02</div><div class='add'>+.. note::</div><div class='add'>+   Due to how WMI methods are implemented on the firmware level, this method</div><div class='add'>+   requires a dummy uint32 input argument when invoked.</div><div class='ctx'> </div><div class='ctx'> WMI method ReadGPIOpPinStatus([in] uint32 arg2, [out] uint32 argr)</div><div class='ctx'> ------------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='add'>+| Operation (Byte 0) | Description                        | Arguments          |</div><div class='add'>++====================+====================================+====================+</div><div class='add'>+| Pin number         | Get the pin status                 | - None             |</div><div class='add'>++--------------------+------------------------------------+--------------------+</div><div class='ctx'> </div><div class='del'>- if BYTE_0(arg2) == 0:</div><div class='del'>-         argr = PIN_A_STATUS</div><div class='del'>-</div><div class='del'>- if BYTE_0(arg2) == 1:</div><div class='del'>-         argr = PIN_B_STATUS</div><div class='add'>+.. note::</div><div class='add'>+   There known firmware bug in some laptops where reading the status of a pin</div><div class='add'>+   also flips it.</div><div class='ctx'> </div><div class='ctx'> Other information Methods</div><div class='ctx'> =========================</div><div class='hunk'>@@ -386,12 +305,18 @@ Other information Methods</div><div class='ctx'> WMI method ReadChassisColor([out] uint32 argr)</div><div class='ctx'> ----------------------------------------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='add'>+Returns the chassis color internal ID.</div><div class='ctx'> </div><div class='del'>- argr = CHASSIS_COLOR_ID</div><div class='add'>+.. _acknowledgements:</div><div class='ctx'> </div><div class='ctx'> Acknowledgements</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='del'>-Kudos to `AlexIII &lt;https://github.com/AlexIII/tcc-g15&gt;`_ for documenting</div><div class='del'>-and testing available thermal profile codes.</div><div class='add'>+Kudos to</div><div class='add'>+</div><div class='add'>+* `AlexIII &lt;https://github.com/AlexIII/tcc-g15&gt;`_</div><div class='add'>+* `T-Troll &lt;https://github.com/T-Troll/alienfx-tools/&gt;`_</div><div class='add'>+* `Gabriel Marcano &lt;https://gabriel.marcanobrady.family/blog/2024/12/16/dell-g5-5505-se-acpi-or-figuring-out-how-to-reset-the-rgb-controller/&gt;`_</div><div class='add'>+</div><div class='add'>+for documenting and testing some of this device's functionality, making it</div><div class='add'>+possible to generalize this driver.</div><div class='head'>diff --git a/Documentation/wmi/devices/dell-wmi-ddv.rst b/Documentation/wmi/devices/dell-wmi-ddv.rst<br/>index e0c20af30948..109d4c5c922e 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/wmi/devices/dell-wmi-ddv.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/wmi/devices/dell-wmi-ddv.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/wmi/devices/dell-wmi-ddv.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/wmi/devices/dell-wmi-ddv.rst</a></div><div class='hunk'>@@ -118,9 +118,6 @@ The date is encoded in the following manner:</div><div class='ctx'> - bits 5 to 8 contain the manufacture month.</div><div class='ctx'> - bits 9 to 15 contain the manufacture year biased by 1980.</div><div class='ctx'> </div><div class='del'>-.. note::</div><div class='del'>-   The data format needs to be verified on more machines.</div><div class='del'>-</div><div class='ctx'> WMI method BatterySerialNumber()</div><div class='ctx'> --------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -153,7 +150,40 @@ Returns the voltage flow of the battery in mV as an u16.</div><div class='ctx'> WMI method BatteryManufactureAccess()</div><div class='ctx'> -------------------------------------</div><div class='ctx'> </div><div class='del'>-Returns a manufacture-defined value as an u16.</div><div class='add'>+Returns the health status of the battery as a u16.</div><div class='add'>+The health status encoded in the following manner:</div><div class='add'>+</div><div class='add'>+ - the third nibble contains the general failure mode</div><div class='add'>+ - the fourth nibble contains the specific failure code</div><div class='add'>+</div><div class='add'>+Valid failure modes are:</div><div class='add'>+</div><div class='add'>+ - permanent failure (``0x9``)</div><div class='add'>+ - overheat failure (``0xa``)</div><div class='add'>+ - overcurrent failure (``0xb``)</div><div class='add'>+</div><div class='add'>+All other failure modes are to be considered normal.</div><div class='add'>+</div><div class='add'>+The following failure codes are valid for a permanent failure:</div><div class='add'>+</div><div class='add'>+ - fuse blown (``0x0``)</div><div class='add'>+ - cell imbalance (``0x1``)</div><div class='add'>+ - overvoltage (``0x2``)</div><div class='add'>+ - fet failure (``0x3``)</div><div class='add'>+</div><div class='add'>+The last two bits of the failure code are to be ignored when the battery</div><div class='add'>+signals a permanent failure.</div><div class='add'>+</div><div class='add'>+The following failure codes a valid for a overheat failure:</div><div class='add'>+</div><div class='add'>+ - overheat at start of charging (``0x5``)</div><div class='add'>+ - overheat during charging (``0x7``)</div><div class='add'>+ - overheat during discharging (``0x8``)</div><div class='add'>+</div><div class='add'>+The following failure codes are valid for a overcurrent failure:</div><div class='add'>+</div><div class='add'>+ - overcurrent during charging (``0x6``)</div><div class='add'>+ - overcurrent during discharging (``0xb``)</div><div class='ctx'> </div><div class='ctx'> WMI method BatteryRelativeStateOfCharge()</div><div class='ctx'> -----------------------------------------</div><div class='hunk'>@@ -260,14 +290,6 @@ Some machines like the Dell Inspiron 3505 only support a single battery and thus</div><div class='ctx'> ignore the battery index. Because of this the driver depends on the ACPI battery</div><div class='ctx'> hook mechanism to discover batteries.</div><div class='ctx'> </div><div class='del'>-.. note::</div><div class='del'>-   The ACPI battery matching algorithm currently used inside the driver is</div><div class='del'>-   outdated and does not match the algorithm described above. The reasons for</div><div class='del'>-   this are differences in the handling of the ToHexString() ACPI opcode between</div><div class='del'>-   Linux and Windows, which distorts the serial number of ACPI batteries on many</div><div class='del'>-   machines. Until this issue is resolved, the driver cannot use the above</div><div class='del'>-   algorithm.</div><div class='del'>-</div><div class='ctx'> Reverse-Engineering the DDV WMI interface</div><div class='ctx'> =========================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/wmi/devices/msi-wmi-platform.rst b/Documentation/wmi/devices/msi-wmi-platform.rst<br/>index 31a136942892..73197b31926a 100644<br/>--- a/<a href='/cgit/linux.git/tree/Documentation/wmi/devices/msi-wmi-platform.rst?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Documentation/wmi/devices/msi-wmi-platform.rst</a><br/>+++ b/<a href='/cgit/linux.git/tree/Documentation/wmi/devices/msi-wmi-platform.rst?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Documentation/wmi/devices/msi-wmi-platform.rst</a></div><div class='hunk'>@@ -138,6 +138,10 @@ input data, the meaning of which depends on the subfeature being accessed.</div><div class='ctx'> The output buffer contains a single byte which signals success or failure (``0x00`` on failure)</div><div class='ctx'> and 31 bytes of output data, the meaning if which depends on the subfeature being accessed.</div><div class='ctx'> </div><div class='add'>+.. note::</div><div class='add'>+   The ACPI control method responsible for handling the WMI method calls is not thread-safe.</div><div class='add'>+   This is a firmware bug that needs to be handled inside the driver itself.</div><div class='add'>+</div><div class='ctx'> WMI method Get_EC()</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='head'>diff --git a/MAINTAINERS b/MAINTAINERS<br/>index ca0e6bb36117..84fcc115b3c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/MAINTAINERS?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>MAINTAINERS</a><br/>+++ b/<a href='/cgit/linux.git/tree/MAINTAINERS?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>MAINTAINERS</a></div><div class='hunk'>@@ -528,6 +528,7 @@ ADP1653 FLASH CONTROLLER DRIVER</div><div class='ctx'> M:	Sakari Ailus &lt;sakari.ailus@iki.fi&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/adi,adp1653.txt</div><div class='ctx'> F:	drivers/media/i2c/adp1653.c</div><div class='ctx'> F:	include/media/i2c/adp1653.h</div><div class='ctx'> </div><div class='hunk'>@@ -646,6 +647,13 @@ F:	drivers/iio/accel/adxl380.h</div><div class='ctx'> F:	drivers/iio/accel/adxl380_i2c.c</div><div class='ctx'> F:	drivers/iio/accel/adxl380_spi.c</div><div class='ctx'> </div><div class='add'>+AEONSEMI PHY DRIVER</div><div class='add'>+M:	Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+L:	netdev@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/net/aeonsemi,as21xxx.yaml</div><div class='add'>+F:	drivers/net/phy/as21xxx.c</div><div class='add'>+</div><div class='ctx'> AF8133J THREE-AXIS MAGNETOMETER DRIVER</div><div class='ctx'> M:	OndÅ™ej Jirman &lt;megi@xff.cz&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -797,6 +805,9 @@ M:	Kurt Borja &lt;kuurtb@gmail.com&gt;</div><div class='ctx'> L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> L:	Dell.Client.Kernel@dell.com</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	Documentation/ABI/testing/debugfs-alienware-wmi</div><div class='add'>+F:	Documentation/ABI/testing/sysfs-platform-alienware-wmi</div><div class='add'>+F:	Documentation/admin-guide/laptops/alienware-wmi.rst</div><div class='ctx'> F:	Documentation/wmi/devices/alienware-wmi.rst</div><div class='ctx'> F:	drivers/platform/x86/dell/alienware-wmi*</div><div class='ctx'> </div><div class='hunk'>@@ -940,7 +951,7 @@ F:	include/linux/altera_uart.h</div><div class='ctx'> AMAZON ANNAPURNA LABS FIC DRIVER</div><div class='ctx'> M:	Talel Shenhar &lt;talel@amazon.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/amazon,al-fic.yaml</div><div class='ctx'> F:	drivers/irqchip/irq-al-fic.c</div><div class='ctx'> </div><div class='ctx'> AMAZON ANNAPURNA LABS MEMORY CONTROLLER EDAC</div><div class='hunk'>@@ -1097,7 +1108,7 @@ R:	Carlos Bilbao &lt;carlos.bilbao@kernel.org&gt;</div><div class='ctx'> L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/arch/x86/amd_hsmp.rst</div><div class='del'>-F:	arch/x86/include/asm/amd_hsmp.h</div><div class='add'>+F:	arch/x86/include/asm/amd/hsmp.h</div><div class='ctx'> F:	arch/x86/include/uapi/asm/amd_hsmp.h</div><div class='ctx'> F:	drivers/platform/x86/amd/hsmp/</div><div class='ctx'> </div><div class='hunk'>@@ -1142,7 +1153,7 @@ M:	Mario Limonciello &lt;mario.limonciello@amd.com&gt;</div><div class='ctx'> M:	Yazen Ghannam &lt;yazen.ghannam@amd.com&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	arch/x86/include/asm/amd_node.h</div><div class='add'>+F:	arch/x86/include/asm/amd/node.h</div><div class='ctx'> F:	arch/x86/kernel/amd_node.c</div><div class='ctx'> </div><div class='ctx'> AMD PDS CORE DRIVER</div><div class='hunk'>@@ -1216,7 +1227,9 @@ AMD SPI DRIVER</div><div class='ctx'> M:	Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='ctx'> L:	linux-spi@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='add'>+F:	drivers/spi/spi-amd-pci.c</div><div class='ctx'> F:	drivers/spi/spi-amd.c</div><div class='add'>+F:	drivers/spi/spi-amd.h</div><div class='ctx'> </div><div class='ctx'> AMD XDNA DRIVER</div><div class='ctx'> M:	Min Ma &lt;min.ma@amd.com&gt;</div><div class='hunk'>@@ -1253,6 +1266,31 @@ F:	Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml</div><div class='ctx'> F:	drivers/perf/amlogic/</div><div class='ctx'> F:	include/soc/amlogic/</div><div class='ctx'> </div><div class='add'>+AMLOGIC ISP DRIVER</div><div class='add'>+M:	Keke Li &lt;keke.li@amlogic.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/admin-guide/media/c3-isp.dot</div><div class='add'>+F:	Documentation/admin-guide/media/c3-isp.rst</div><div class='add'>+F:	Documentation/devicetree/bindings/media/amlogic,c3-isp.yaml</div><div class='add'>+F:	Documentation/userspace-api/media/v4l/metafmt-c3-isp.rst</div><div class='add'>+F:	drivers/media/platform/amlogic/c3/isp/</div><div class='add'>+F:	include/uapi/linux/media/amlogic/</div><div class='add'>+</div><div class='add'>+AMLOGIC MIPI ADAPTER DRIVER</div><div class='add'>+M:	Keke Li &lt;keke.li@amlogic.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/media/amlogic,c3-mipi-adapter.yaml</div><div class='add'>+F:	drivers/media/platform/amlogic/c3/mipi-adapter/</div><div class='add'>+</div><div class='add'>+AMLOGIC MIPI CSI2 DRIVER</div><div class='add'>+M:	Keke Li &lt;keke.li@amlogic.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/media/amlogic,c3-mipi-csi2.yaml</div><div class='add'>+F:	drivers/media/platform/amlogic/c3/mipi-csi2/</div><div class='add'>+</div><div class='ctx'> AMLOGIC PINCTRL DRIVER</div><div class='ctx'> M:	Xianwei Zhao &lt;xianwei.zhao@amlogic.com&gt;</div><div class='ctx'> L:	linux-amlogic@lists.infradead.org</div><div class='hunk'>@@ -1567,6 +1605,13 @@ W:	https://ez.analog.com/linux-software-drivers</div><div class='ctx'> F:	Documentation/devicetree/bindings/iio/filter/adi,admv8818.yaml</div><div class='ctx'> F:	drivers/iio/filter/admv8818.c</div><div class='ctx'> </div><div class='add'>+ANALOG DEVICES INC ADP5055 DRIVER</div><div class='add'>+M:	Alexis Czezar Torreno &lt;alexisczezar.torreno@analog.com&gt;</div><div class='add'>+S:	Supported</div><div class='add'>+W:	https://ez.analog.com/linux-software-drivers</div><div class='add'>+F:	Documentation/devicetree/bindings/regulator/adi,adp5055-regulator.yaml</div><div class='add'>+F:	drivers/regulator/adp5055-regulator.c</div><div class='add'>+</div><div class='ctx'> ANALOG DEVICES INC ADP5061 DRIVER</div><div class='ctx'> M:	Michael Hennerich &lt;Michael.Hennerich@analog.com&gt;</div><div class='ctx'> L:	linux-pm@vger.kernel.org</div><div class='hunk'>@@ -1587,14 +1632,14 @@ M:	Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	https://ez.analog.com/linux-software-drivers</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/adv7180.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml</div><div class='ctx'> F:	drivers/media/i2c/adv7180.c</div><div class='ctx'> </div><div class='ctx'> ANALOG DEVICES INC ADV748X DRIVER</div><div class='ctx'> M:	Kieran Bingham &lt;kieran.bingham@ideasonboard.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/adv748x.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/adi,adv748x.yaml</div><div class='ctx'> F:	drivers/media/i2c/adv748x/*</div><div class='ctx'> </div><div class='ctx'> ANALOG DEVICES INC ADV7511 DRIVER</div><div class='hunk'>@@ -1607,7 +1652,7 @@ ANALOG DEVICES INC ADV7604 DRIVER</div><div class='ctx'> M:	Hans Verkuil &lt;hverkuil-cisco@xs4all.nl&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/adv7604.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/adi,adv7604.yaml</div><div class='ctx'> F:	drivers/media/i2c/adv7604*</div><div class='ctx'> </div><div class='ctx'> ANALOG DEVICES INC ADV7842 DRIVER</div><div class='hunk'>@@ -1682,7 +1727,7 @@ M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> M:	Arve HjønnevÃ¥g &lt;arve@android.com&gt;</div><div class='ctx'> M:	Todd Kjos &lt;tkjos@android.com&gt;</div><div class='ctx'> M:	Martijn Coenen &lt;maco@android.com&gt;</div><div class='del'>-M:	Joel Fernandes &lt;joel@joelfernandes.org&gt;</div><div class='add'>+M:	Joel Fernandes &lt;joelagnelf@nvidia.com&gt;</div><div class='ctx'> M:	Christian Brauner &lt;christian@brauner.io&gt;</div><div class='ctx'> M:	Carlos Llamas &lt;cmllamas@google.com&gt;</div><div class='ctx'> M:	Suren Baghdasaryan &lt;surenb@google.com&gt;</div><div class='hunk'>@@ -1694,7 +1739,7 @@ F:	drivers/android/</div><div class='ctx'> ANDROID GOLDFISH PIC DRIVER</div><div class='ctx'> M:	Miodrag Dinic &lt;miodrag.dinic@mips.com&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/google,goldfish-pic.yaml</div><div class='ctx'> F:	drivers/irqchip/irq-goldfish-pic.c</div><div class='ctx'> </div><div class='ctx'> ANDROID GOLDFISH RTC DRIVER</div><div class='hunk'>@@ -1918,7 +1963,7 @@ F:	Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/auxdisplay/arm,versatile-lcd.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml</div><div class='del'>-F:	Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/mtd/mtd-physmap.yaml</div><div class='ctx'> F:	arch/arm/boot/dts/arm/arm-realview-*</div><div class='ctx'> F:	arch/arm/boot/dts/arm/integrator*</div><div class='hunk'>@@ -2306,6 +2351,7 @@ F:	drivers/watchdog/apple_wdt.c</div><div class='ctx'> F:	include/dt-bindings/interrupt-controller/apple-aic.h</div><div class='ctx'> F:	include/dt-bindings/pinctrl/apple.h</div><div class='ctx'> F:	include/linux/soc/apple/*</div><div class='add'>+F:	include/uapi/drm/asahi_drm.h</div><div class='ctx'> </div><div class='ctx'> ARM/ARTPEC MACHINE SUPPORT</div><div class='ctx'> M:	Jesper Nilsson &lt;jesper.nilsson@axis.com&gt;</div><div class='hunk'>@@ -2328,7 +2374,7 @@ L:	linux-i2c@vger.kernel.org</div><div class='ctx'> L:	openbmc@lists.ozlabs.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml</div><div class='del'>-F:	Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-i2c-ic.yaml</div><div class='ctx'> F:	drivers/i2c/busses/i2c-aspeed.c</div><div class='ctx'> F:	drivers/irqchip/irq-aspeed-i2c-ic.c</div><div class='ctx'> </div><div class='hunk'>@@ -2519,6 +2565,7 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git</div><div class='ctx'> F:	arch/arm/boot/dts/nxp/imx/</div><div class='ctx'> F:	arch/arm/boot/dts/nxp/mxs/</div><div class='ctx'> F:	arch/arm64/boot/dts/freescale/</div><div class='add'>+X:	Documentation/devicetree/bindings/media/i2c/</div><div class='ctx'> X:	arch/arm64/boot/dts/freescale/fsl-*</div><div class='ctx'> X:	arch/arm64/boot/dts/freescale/qoriq-*</div><div class='ctx'> X:	drivers/media/i2c/</div><div class='hunk'>@@ -3191,6 +3238,12 @@ M:	Dinh Nguyen &lt;dinguyen@kernel.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/clk/socfpga/</div><div class='ctx'> </div><div class='add'>+ARM/SOCFPGA DWMAC GLUE LAYER</div><div class='add'>+M:	Maxime Chevallier &lt;maxime.chevallier@bootlin.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/net/socfpga-dwmac.txt</div><div class='add'>+F:	drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</div><div class='add'>+</div><div class='ctx'> ARM/SOCFPGA EDAC BINDINGS</div><div class='ctx'> M:	Matthew Gerlach &lt;matthew.gerlach@altera.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -3428,6 +3481,8 @@ M:	Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Odd Fixes</div><div class='ctx'> F:	Documentation/devicetree/bindings/i2c/i2c-wmt.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml</div><div class='ctx'> F:	arch/arm/boot/dts/vt8500/</div><div class='ctx'> F:	arch/arm/mach-vt8500/</div><div class='ctx'> F:	drivers/clocksource/timer-vt8500.c</div><div class='hunk'>@@ -3577,7 +3632,7 @@ ASPEED SCU INTERRUPT CONTROLLER DRIVER</div><div class='ctx'> M:	Eddie James &lt;eajames@linux.ibm.com&gt;</div><div class='ctx'> L:	linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2500-scu-ic.yaml</div><div class='ctx'> F:	drivers/irqchip/irq-aspeed-scu-ic.c</div><div class='ctx'> F:	include/dt-bindings/interrupt-controller/aspeed-scu-ic.h</div><div class='ctx'> </div><div class='hunk'>@@ -3867,11 +3922,15 @@ AUXILIARY BUS DRIVER</div><div class='ctx'> M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> R:	Dave Ertman &lt;david.m.ertman@intel.com&gt;</div><div class='ctx'> R:	Ira Weiny &lt;ira.weiny@intel.com&gt;</div><div class='add'>+R:	Leon Romanovsky &lt;leon@kernel.org&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core.git</div><div class='ctx'> F:	Documentation/driver-api/auxiliary_bus.rst</div><div class='ctx'> F:	drivers/base/auxiliary.c</div><div class='ctx'> F:	include/linux/auxiliary_bus.h</div><div class='add'>+F:	rust/helpers/auxiliary.c</div><div class='add'>+F:	rust/kernel/auxiliary.rs</div><div class='add'>+F:	samples/rust/rust_driver_auxiliary.rs</div><div class='ctx'> </div><div class='ctx'> AUXILIARY DISPLAY DRIVERS</div><div class='ctx'> M:	Andy Shevchenko &lt;andy@kernel.org&gt;</div><div class='hunk'>@@ -4195,6 +4254,16 @@ F:	Documentation/ABI/stable/sysfs-class-bluetooth</div><div class='ctx'> F:	include/net/bluetooth/</div><div class='ctx'> F:	net/bluetooth/</div><div class='ctx'> </div><div class='add'>+BLZP1600 GPIO DRIVER</div><div class='add'>+M:	James Cowgill &lt;james.cowgill@blaize.com&gt;</div><div class='add'>+M:	Matt Redfearn &lt;matt.redfearn@blaize.com&gt;</div><div class='add'>+M:	Neil Jones &lt;neil.jones@blaize.com&gt;</div><div class='add'>+M:	Nikolaos Pasaloukos &lt;nikolaos.pasaloukos@blaize.com&gt;</div><div class='add'>+L:	linux-gpio@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/gpio/blaize,blzp1600-gpio.yaml</div><div class='add'>+F:	drivers/gpio/gpio-blzp1600.c</div><div class='add'>+</div><div class='ctx'> BONDING DRIVER</div><div class='ctx'> M:	Jay Vosburgh &lt;jv@jvosburgh.net&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='hunk'>@@ -5259,6 +5328,7 @@ F:	include/uapi/linux/can/isotp.h</div><div class='ctx'> F:	include/uapi/linux/can/raw.h</div><div class='ctx'> F:	net/can/</div><div class='ctx'> F:	net/sched/em_canid.c</div><div class='add'>+F:	tools/testing/selftests/net/can/</div><div class='ctx'> </div><div class='ctx'> CAN-J1939 NETWORK LAYER</div><div class='ctx'> M:	Robin van der Gracht &lt;robin@protonic.nl&gt;</div><div class='hunk'>@@ -5502,7 +5572,7 @@ F:	Documentation/dev-tools/checkpatch.rst</div><div class='ctx'> </div><div class='ctx'> CHINESE DOCUMENTATION</div><div class='ctx'> M:	Alex Shi &lt;alexs@kernel.org&gt;</div><div class='del'>-M:	Yanteng Si &lt;siyanteng@loongson.cn&gt;</div><div class='add'>+M:	Yanteng Si &lt;si.yanteng@linux.dev&gt;</div><div class='ctx'> R:	Dongliang Mu &lt;dzm91@hust.edu.cn&gt;</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/alexs/linux.git</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -5647,7 +5717,6 @@ F:	include/sound/cs*</div><div class='ctx'> F:	sound/pci/hda/cirrus*</div><div class='ctx'> F:	sound/pci/hda/cs*</div><div class='ctx'> F:	sound/pci/hda/hda_component*</div><div class='del'>-F:	sound/pci/hda/hda_cs_dsp_ctl.*</div><div class='ctx'> F:	sound/soc/codecs/cs*</div><div class='ctx'> </div><div class='ctx'> CIRRUS LOGIC HAPTIC DRIVERS</div><div class='hunk'>@@ -5975,7 +6044,9 @@ S:	Supported</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/a.hindborg/linux.git configfs-next</div><div class='ctx'> F:	fs/configfs/</div><div class='ctx'> F:	include/linux/configfs.h</div><div class='add'>+F:	rust/kernel/configfs.rs</div><div class='ctx'> F:	samples/configfs/</div><div class='add'>+F:	samples/rust/rust_configfs.rs</div><div class='ctx'> </div><div class='ctx'> CONGATEC BOARD CONTROLLER MFD DRIVER</div><div class='ctx'> M:	Thomas Richard &lt;thomas.richard@bootlin.com&gt;</div><div class='hunk'>@@ -6253,6 +6324,7 @@ F:	Documentation/staging/crc*</div><div class='ctx'> F:	arch/*/lib/crc*</div><div class='ctx'> F:	include/linux/crc*</div><div class='ctx'> F:	lib/crc*</div><div class='add'>+F:	lib/tests/crc_kunit.c</div><div class='ctx'> F:	scripts/gen-crc-consts.py</div><div class='ctx'> </div><div class='ctx'> CREATIVE SB0540</div><div class='hunk'>@@ -6288,6 +6360,7 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git</div><div class='ctx'> F:	Documentation/crypto/</div><div class='ctx'> F:	Documentation/devicetree/bindings/crypto/</div><div class='ctx'> F:	arch/*/crypto/</div><div class='add'>+F:	arch/*/lib/crypto/</div><div class='ctx'> F:	crypto/</div><div class='ctx'> F:	drivers/crypto/</div><div class='ctx'> F:	include/crypto/</div><div class='hunk'>@@ -6335,6 +6408,7 @@ F:	Documentation/process/cve.rst</div><div class='ctx'> </div><div class='ctx'> CW1200 WLAN driver</div><div class='ctx'> S:	Orphan</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='ctx'> F:	drivers/net/wireless/st/</div><div class='ctx'> F:	include/linux/platform_data/net-cw1200.h</div><div class='ctx'> </div><div class='hunk'>@@ -6507,6 +6581,12 @@ F:	net/ax25/ax25_out.c</div><div class='ctx'> F:	net/ax25/ax25_timer.c</div><div class='ctx'> F:	net/ax25/sysctl_net_ax25.c</div><div class='ctx'> </div><div class='add'>+DASHARO ACPI PLATFORM DRIVER</div><div class='add'>+M:	MichaÅ‚ Kopeć &lt;michal.kopec@3mdeb.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	https://docs.dasharo.com/</div><div class='add'>+F:	drivers/platform/x86/dasharo-acpi.c</div><div class='add'>+</div><div class='ctx'> DATA ACCESS MONITOR</div><div class='ctx'> M:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='ctx'> L:	damon@lists.linux.dev</div><div class='hunk'>@@ -6546,15 +6626,6 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/scsi/dc395x.rst</div><div class='ctx'> F:	drivers/scsi/dc395x.*</div><div class='ctx'> </div><div class='del'>-DCCP PROTOCOL</div><div class='del'>-L:	dccp@vger.kernel.org</div><div class='del'>-S:	Orphan</div><div class='del'>-W:	http://www.linuxfoundation.org/collaborate/workgroups/networking/dccp</div><div class='del'>-F:	include/linux/dccp.h</div><div class='del'>-F:	include/linux/tfrc.h</div><div class='del'>-F:	include/uapi/linux/dccp.h</div><div class='del'>-F:	net/dccp/</div><div class='del'>-</div><div class='ctx'> DEBUGOBJECTS:</div><div class='ctx'> M:	Thomas Gleixner &lt;tglx@linutronix.de&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='hunk'>@@ -7020,6 +7091,7 @@ L:	rust-for-linux@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	https://rust-for-linux.com</div><div class='ctx'> T:	git https://github.com/Rust-for-Linux/linux.git alloc-next</div><div class='add'>+F:	rust/helpers/dma.c</div><div class='ctx'> F:	rust/kernel/dma.rs</div><div class='ctx'> F:	samples/rust/rust_dma.rs</div><div class='ctx'> </div><div class='hunk'>@@ -7074,7 +7146,10 @@ T:	git git://git.lwn.net/linux.git docs-next</div><div class='ctx'> F:	Documentation/</div><div class='ctx'> F:	scripts/check-variable-fonts.sh</div><div class='ctx'> F:	scripts/documentation-file-ref-check</div><div class='del'>-F:	scripts/kernel-doc</div><div class='add'>+F:	scripts/get_abi.py</div><div class='add'>+F:	scripts/kernel-doc*</div><div class='add'>+F:	scripts/lib/abi/*</div><div class='add'>+F:	scripts/lib/kdoc/*</div><div class='ctx'> F:	scripts/sphinx-pre-install</div><div class='ctx'> X:	Documentation/ABI/</div><div class='ctx'> X:	Documentation/admin-guide/media/</div><div class='hunk'>@@ -7225,7 +7300,7 @@ M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> M:	"Rafael J. Wysocki" &lt;rafael@kernel.org&gt;</div><div class='ctx'> M:	Danilo Krummrich &lt;dakr@kernel.org&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core.git</div><div class='ctx'> F:	Documentation/core-api/kobject.rst</div><div class='ctx'> F:	drivers/base/</div><div class='ctx'> F:	fs/debugfs/</div><div class='hunk'>@@ -7370,8 +7445,7 @@ M:	Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='del'>-F:	drivers/gpu/drm/tiny/ofdrm.c</div><div class='del'>-F:	drivers/gpu/drm/tiny/simpledrm.c</div><div class='add'>+F:	drivers/gpu/drm/sysfb/</div><div class='ctx'> F:	drivers/video/aperture.c</div><div class='ctx'> F:	drivers/video/nomodeset.c</div><div class='ctx'> F:	include/linux/aperture.h</div><div class='hunk'>@@ -7512,6 +7586,7 @@ S:	Maintained</div><div class='ctx'> B:	https://gitlab.freedesktop.org/drm/msm/-/issues</div><div class='ctx'> T:	git https://gitlab.freedesktop.org/drm/msm.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/msm/gpu.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml</div><div class='ctx'> F:	drivers/gpu/drm/msm/adreno/</div><div class='ctx'> F:	drivers/gpu/drm/msm/msm_gpu.*</div><div class='ctx'> F:	drivers/gpu/drm/msm/msm_gpu_devfreq.*</div><div class='hunk'>@@ -7565,6 +7640,12 @@ T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml</div><div class='ctx'> F:	drivers/gpu/drm/panel/panel-novatek-nt36672a.c</div><div class='ctx'> </div><div class='add'>+DRM DRIVER FOR NOVATEK NT37801 PANELS</div><div class='add'>+M:	Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/display/panel/novatek,nt37801.yaml</div><div class='add'>+F:	drivers/gpu/drm/panel/panel-novatek-nt37801.c</div><div class='add'>+</div><div class='ctx'> DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS</div><div class='ctx'> M:	Lyude Paul &lt;lyude@redhat.com&gt;</div><div class='ctx'> M:	Danilo Krummrich &lt;dakr@kernel.org&gt;</div><div class='hunk'>@@ -7591,6 +7672,18 @@ T:	git https://gitlab.freedesktop.org/drm/nova.git nova-next</div><div class='ctx'> F:	Documentation/gpu/nova/</div><div class='ctx'> F:	drivers/gpu/nova-core/</div><div class='ctx'> </div><div class='add'>+DRM DRIVER FOR NVIDIA GPUS [RUST]</div><div class='add'>+M:	Danilo Krummrich &lt;dakr@kernel.org&gt;</div><div class='add'>+L:	nouveau@lists.freedesktop.org</div><div class='add'>+S:	Supported</div><div class='add'>+Q:	https://patchwork.freedesktop.org/project/nouveau/</div><div class='add'>+B:	https://gitlab.freedesktop.org/drm/nova/-/issues</div><div class='add'>+C:	irc://irc.oftc.net/nouveau</div><div class='add'>+T:	git https://gitlab.freedesktop.org/drm/nova.git nova-next</div><div class='add'>+F:	Documentation/gpu/nova/</div><div class='add'>+F:	drivers/gpu/drm/nova/</div><div class='add'>+F:	include/uapi/drm/nova_drm.h</div><div class='add'>+</div><div class='ctx'> DRM DRIVER FOR OLIMEX LCD-OLINUXINO PANELS</div><div class='ctx'> M:	Stefan Mavrodiev &lt;stefan@olimex.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -7680,7 +7773,13 @@ M:	David Lechner &lt;david@lechnology.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/sitronix,st7586.txt</div><div class='del'>-F:	drivers/gpu/drm/tiny/st7586.c</div><div class='add'>+F:	drivers/gpu/drm/sitronix/st7586.c</div><div class='add'>+</div><div class='add'>+DRM DRIVER FOR SITRONIX ST7571 PANELS</div><div class='add'>+M:	Marcus Folkesson &lt;marcus.folkesson@gmail.com&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/display/sitronix,st7571.yaml</div><div class='add'>+F:	drivers/gpu/drm/sitronix/st7571-i2c.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR SITRONIX ST7701 PANELS</div><div class='ctx'> M:	Jagan Teki &lt;jagan@amarulasolutions.com&gt;</div><div class='hunk'>@@ -7701,7 +7800,7 @@ M:	David Lechner &lt;david@lechnology.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/sitronix,st7735r.yaml</div><div class='del'>-F:	drivers/gpu/drm/tiny/st7735r.c</div><div class='add'>+F:	drivers/gpu/drm/sitronix/st7735r.c</div><div class='ctx'> </div><div class='ctx'> DRM DRIVER FOR SOLOMON SSD130X OLED DISPLAYS</div><div class='ctx'> M:	Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='hunk'>@@ -7798,6 +7897,7 @@ F:	Documentation/devicetree/bindings/display/</div><div class='ctx'> F:	Documentation/devicetree/bindings/gpu/</div><div class='ctx'> F:	Documentation/gpu/</div><div class='ctx'> F:	drivers/gpu/</div><div class='add'>+F:	rust/kernel/drm/</div><div class='ctx'> F:	include/drm/</div><div class='ctx'> F:	include/linux/vga*</div><div class='ctx'> F:	include/uapi/drm/</div><div class='hunk'>@@ -7814,6 +7914,7 @@ F:	Documentation/devicetree/bindings/gpu/</div><div class='ctx'> F:	Documentation/gpu/</div><div class='ctx'> F:	drivers/gpu/drm/</div><div class='ctx'> F:	drivers/gpu/vga/</div><div class='add'>+F:	rust/kernel/drm/</div><div class='ctx'> F:	include/drm/drm</div><div class='ctx'> F:	include/linux/vga*</div><div class='ctx'> F:	include/uapi/drm/</div><div class='hunk'>@@ -7853,8 +7954,8 @@ F:	drivers/gpu/drm/ci/xfails/meson*</div><div class='ctx'> F:	drivers/gpu/drm/meson/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVERS FOR ATMEL HLCDC</div><div class='del'>-M:	Sam Ravnborg &lt;sam@ravnborg.org&gt;</div><div class='del'>-M:	Boris Brezillon &lt;bbrezillon@kernel.org&gt;</div><div class='add'>+M:	Manikandan Muralidharan &lt;manikandan.m@microchip.com&gt;</div><div class='add'>+M:	Dharma Balasubiramani &lt;dharma.b@microchip.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='hunk'>@@ -7895,7 +7996,7 @@ L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/display/fsl,dcu.txt</div><div class='del'>-F:	Documentation/devicetree/bindings/display/fsl,tcon.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml</div><div class='ctx'> F:	drivers/gpu/drm/fsl-dcu/</div><div class='ctx'> </div><div class='ctx'> DRM DRIVERS FOR FREESCALE IMX 5/6</div><div class='hunk'>@@ -8182,7 +8283,8 @@ F:	drivers/gpu/drm/ttm/</div><div class='ctx'> F:	include/drm/ttm/</div><div class='ctx'> </div><div class='ctx'> DRM AUTOMATED TESTING</div><div class='del'>-M:	Helen Koike &lt;helen.koike@collabora.com&gt;</div><div class='add'>+M:	Helen Koike &lt;helen.fornazier@gmail.com&gt;</div><div class='add'>+M:	Vignesh Raman &lt;vignesh.raman@collabora.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git</div><div class='hunk'>@@ -8717,6 +8819,7 @@ M:	Chao Yu &lt;chao@kernel.org&gt;</div><div class='ctx'> R:	Yue Hu &lt;zbestahu@gmail.com&gt;</div><div class='ctx'> R:	Jeffle Xu &lt;jefflexu@linux.alibaba.com&gt;</div><div class='ctx'> R:	Sandeep Dhavale &lt;dhavale@google.com&gt;</div><div class='add'>+R:	Hongbo Li &lt;lihongbo22@huawei.com&gt;</div><div class='ctx'> L:	linux-erofs@lists.ozlabs.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> W:	https://erofs.docs.kernel.org</div><div class='hunk'>@@ -9203,7 +9306,7 @@ FLEXTIMER FTM-QUADDEC DRIVER</div><div class='ctx'> M:	Patrick Havelange &lt;patrick.havelange@essensium.com&gt;</div><div class='ctx'> L:	linux-iio@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	Documentation/devicetree/bindings/counter/ftm-quaddec.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml</div><div class='ctx'> F:	drivers/counter/ftm-quaddec.c</div><div class='ctx'> </div><div class='ctx'> FLOPPY DRIVER</div><div class='hunk'>@@ -9376,6 +9479,7 @@ F:	Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml</div><div class='ctx'> F:	drivers/net/ethernet/freescale/enetc/</div><div class='ctx'> F:	include/linux/fsl/enetc_mdio.h</div><div class='ctx'> F:	include/linux/fsl/netc_global.h</div><div class='add'>+F:	include/linux/fsl/ntmp.h</div><div class='ctx'> </div><div class='ctx'> FREESCALE eTSEC ETHERNET DRIVER (GIANFAR)</div><div class='ctx'> M:	Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;</div><div class='hunk'>@@ -10105,7 +10209,7 @@ L:	linux-acpi@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git</div><div class='ctx'> F:	Documentation/firmware-guide/acpi/gpio-properties.rst</div><div class='del'>-F:	drivers/gpio/gpiolib-acpi.c</div><div class='add'>+F:	drivers/gpio/gpiolib-acpi-*.c</div><div class='ctx'> F:	drivers/gpio/gpiolib-acpi.h</div><div class='ctx'> </div><div class='ctx'> GPIO AGGREGATOR</div><div class='hunk'>@@ -10136,6 +10240,13 @@ F:	drivers/gpio/gpio-regmap.c</div><div class='ctx'> F:	include/linux/gpio/regmap.h</div><div class='ctx'> K:	(devm_)?gpio_regmap_(un)?register</div><div class='ctx'> </div><div class='add'>+GPIO SLOPPY LOGIC ANALYZER</div><div class='add'>+M:	Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;</div><div class='add'>+S:	Supported</div><div class='add'>+F:	Documentation/dev-tools/gpio-sloppy-logic-analyzer.rst</div><div class='add'>+F:	drivers/gpio/gpio-sloppy-logic-analyzer.c</div><div class='add'>+F:	tools/gpio/gpio-sloppy-logic-analyzer.sh</div><div class='add'>+</div><div class='ctx'> GPIO SUBSYSTEM</div><div class='ctx'> M:	Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> M:	Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;</div><div class='hunk'>@@ -10151,6 +10262,8 @@ F:	include/linux/gpio.h</div><div class='ctx'> F:	include/linux/gpio/</div><div class='ctx'> F:	include/linux/of_gpio.h</div><div class='ctx'> K:	(devm_)?gpio_(request|free|direction|get|set)</div><div class='add'>+K:	GPIOD_FLAGS_BIT_NONEXCLUSIVE</div><div class='add'>+K:	devm_gpiod_unhinge</div><div class='ctx'> </div><div class='ctx'> GPIO UAPI</div><div class='ctx'> M:	Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;</div><div class='hunk'>@@ -10453,14 +10566,20 @@ S:	Supported</div><div class='ctx'> F:	drivers/infiniband/hw/hfi1</div><div class='ctx'> </div><div class='ctx'> HFS FILESYSTEM</div><div class='add'>+M:	Viacheslav Dubeyko &lt;slava@dubeyko.com&gt;</div><div class='add'>+M:	John Paul Adrian Glaubitz &lt;glaubitz@physik.fu-berlin.de&gt;</div><div class='add'>+M:	Yangtao Li &lt;frank.li@vivo.com&gt;</div><div class='ctx'> L:	linux-fsdevel@vger.kernel.org</div><div class='del'>-S:	Orphan</div><div class='add'>+S:	Maintained</div><div class='ctx'> F:	Documentation/filesystems/hfs.rst</div><div class='ctx'> F:	fs/hfs/</div><div class='ctx'> </div><div class='ctx'> HFSPLUS FILESYSTEM</div><div class='add'>+M:	Viacheslav Dubeyko &lt;slava@dubeyko.com&gt;</div><div class='add'>+M:	John Paul Adrian Glaubitz &lt;glaubitz@physik.fu-berlin.de&gt;</div><div class='add'>+M:	Yangtao Li &lt;frank.li@vivo.com&gt;</div><div class='ctx'> L:	linux-fsdevel@vger.kernel.org</div><div class='del'>-S:	Orphan</div><div class='add'>+S:	Maintained</div><div class='ctx'> F:	Documentation/filesystems/hfsplus.rst</div><div class='ctx'> F:	fs/hfsplus/</div><div class='ctx'> </div><div class='hunk'>@@ -10945,15 +11064,24 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/networking/device_drivers/ethernet/huawei/hinic.rst</div><div class='ctx'> F:	drivers/net/ethernet/huawei/hinic/</div><div class='ctx'> </div><div class='add'>+HUAWEI 3RD GEN ETHERNET DRIVER</div><div class='add'>+M:	Fan Gong &lt;gongfan1@huawei.com&gt;</div><div class='add'>+L:	netdev@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/networking/device_drivers/ethernet/huawei/hinic3.rst</div><div class='add'>+F:	drivers/net/ethernet/huawei/hinic3/</div><div class='add'>+</div><div class='ctx'> HUAWEI MATEBOOK E GO EMBEDDED CONTROLLER DRIVER</div><div class='ctx'> M:	Pengyu Luo &lt;mitltlatltl@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/platform/huawei,gaokun-ec.yaml</div><div class='ctx'> F:	drivers/platform/arm64/huawei-gaokun-ec.c</div><div class='add'>+F:	drivers/power/supply/huawei-gaokun-battery.c</div><div class='ctx'> F:	include/linux/platform_data/huawei-gaokun-ec.h</div><div class='ctx'> </div><div class='ctx'> HUGETLB SUBSYSTEM</div><div class='ctx'> M:	Muchun Song &lt;muchun.song@linux.dev&gt;</div><div class='add'>+R:	Oscar Salvador &lt;osalvador@suse.de&gt;</div><div class='ctx'> L:	linux-mm@kvack.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/ABI/testing/sysfs-kernel-mm-hugepages</div><div class='hunk'>@@ -11079,6 +11207,14 @@ L:	linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> S:	Odd Fixes</div><div class='ctx'> F:	drivers/tty/hvc/</div><div class='ctx'> </div><div class='add'>+HUNG TASK DETECTOR</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+R:	Lance Yang &lt;lance.yang@linux.dev&gt;</div><div class='add'>+L:	linux-kernel@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	include/linux/hung_task.h</div><div class='add'>+F:	kernel/hung_task.c</div><div class='add'>+</div><div class='ctx'> I2C ACPI SUPPORT</div><div class='ctx'> M:	Mika Westerberg &lt;westeri@kernel.org&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='hunk'>@@ -11217,7 +11353,6 @@ S:	Maintained</div><div class='ctx'> F:	drivers/i2c/busses/i2c-cht-wc.c</div><div class='ctx'> </div><div class='ctx'> I2C/SMBUS ISMT DRIVER</div><div class='del'>-M:	Seth Heasley &lt;seth.heasley@intel.com&gt;</div><div class='ctx'> M:	Neil Horman &lt;nhorman@tuxdriver.com&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='ctx'> F:	Documentation/i2c/busses/i2c-ismt.rst</div><div class='hunk'>@@ -11890,7 +12025,7 @@ F:	Documentation/networking/device_drivers/ethernet/intel/</div><div class='ctx'> F:	drivers/net/ethernet/intel/</div><div class='ctx'> F:	drivers/net/ethernet/intel/*/</div><div class='ctx'> F:	include/linux/avf/virtchnl.h</div><div class='del'>-F:	include/linux/net/intel/iidc.h</div><div class='add'>+F:	include/linux/net/intel/*/</div><div class='ctx'> </div><div class='ctx'> INTEL ETHERNET PROTOCOL DRIVER FOR RDMA</div><div class='ctx'> M:	Mustafa Ismail &lt;mustafa.ismail@intel.com&gt;</div><div class='hunk'>@@ -11917,13 +12052,10 @@ F:	drivers/gpio/gpio-tangier.c</div><div class='ctx'> F:	drivers/gpio/gpio-tangier.h</div><div class='ctx'> </div><div class='ctx'> INTEL GVT-g DRIVERS (Intel GPU Virtualization)</div><div class='del'>-M:	Zhenyu Wang &lt;zhenyuw.linux@gmail.com&gt;</div><div class='del'>-M:	Zhi Wang &lt;zhi.wang.linux@gmail.com&gt;</div><div class='del'>-L:	intel-gvt-dev@lists.freedesktop.org</div><div class='del'>-L:	intel-gfx@lists.freedesktop.org</div><div class='del'>-S:	Supported</div><div class='add'>+R:	Zhenyu Wang &lt;zhenyuw.linux@gmail.com&gt;</div><div class='add'>+R:	Zhi Wang &lt;zhi.wang.linux@gmail.com&gt;</div><div class='add'>+S:	Odd Fixes</div><div class='ctx'> W:	https://github.com/intel/gvt-linux/wiki</div><div class='del'>-T:	git https://github.com/intel/gvt-linux.git</div><div class='ctx'> F:	drivers/gpu/drm/i915/gvt/</div><div class='ctx'> </div><div class='ctx'> INTEL HID EVENT DRIVER</div><div class='hunk'>@@ -12232,6 +12364,7 @@ INTEL SKYLAKE INT3472 ACPI DEVICE DRIVER</div><div class='ctx'> M:	Daniel Scally &lt;djrscally@gmail.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/platform/x86/intel/int3472/</div><div class='add'>+F:	include/linux/platform_data/x86/int3472.h</div><div class='ctx'> </div><div class='ctx'> INTEL SPEED SELECT TECHNOLOGY</div><div class='ctx'> M:	Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;</div><div class='hunk'>@@ -12810,6 +12943,7 @@ F:	lib/Kconfig.kcsan</div><div class='ctx'> F:	scripts/Makefile.kcsan</div><div class='ctx'> </div><div class='ctx'> KDUMP</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='ctx'> M:	Baoquan He &lt;bhe@redhat.com&gt;</div><div class='ctx'> R:	Vivek Goyal &lt;vgoyal@redhat.com&gt;</div><div class='ctx'> R:	Dave Young &lt;dyoung@redhat.com&gt;</div><div class='hunk'>@@ -12873,6 +13007,7 @@ F:	include/linux/overflow.h</div><div class='ctx'> F:	include/linux/randomize_kstack.h</div><div class='ctx'> F:	include/linux/ucopysize.h</div><div class='ctx'> F:	kernel/configs/hardening.config</div><div class='add'>+F:	lib/tests/randstruct_kunit.c</div><div class='ctx'> F:	lib/tests/usercopy_kunit.c</div><div class='ctx'> F:	mm/usercopy.c</div><div class='ctx'> F:	security/Kconfig.hardening</div><div class='hunk'>@@ -12888,7 +13023,7 @@ W:	http://kernelnewbies.org/KernelJanitors</div><div class='ctx'> KERNEL NFSD, SUNRPC, AND LOCKD SERVERS</div><div class='ctx'> M:	Chuck Lever &lt;chuck.lever@oracle.com&gt;</div><div class='ctx'> M:	Jeff Layton &lt;jlayton@kernel.org&gt;</div><div class='del'>-R:	Neil Brown &lt;neilb@suse.de&gt;</div><div class='add'>+R:	NeilBrown &lt;neil@brown.name&gt;</div><div class='ctx'> R:	Olga Kornievskaia &lt;okorniev@redhat.com&gt;</div><div class='ctx'> R:	Dai Ngo &lt;Dai.Ngo@oracle.com&gt;</div><div class='ctx'> R:	Tom Talpey &lt;tom@talpey.com&gt;</div><div class='hunk'>@@ -13024,6 +13159,8 @@ F:	Documentation/virt/kvm/loongarch/</div><div class='ctx'> F:	arch/loongarch/include/asm/kvm*</div><div class='ctx'> F:	arch/loongarch/include/uapi/asm/kvm*</div><div class='ctx'> F:	arch/loongarch/kvm/</div><div class='add'>+F:	tools/testing/selftests/kvm/*/loongarch/</div><div class='add'>+F:	tools/testing/selftests/kvm/lib/loongarch/</div><div class='ctx'> </div><div class='ctx'> KERNEL VIRTUAL MACHINE FOR MIPS (KVM/mips)</div><div class='ctx'> M:	Huacai Chen &lt;chenhuacai@kernel.org&gt;</div><div class='hunk'>@@ -13106,11 +13243,13 @@ KERNFS</div><div class='ctx'> M:	Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> M:	Tejun Heo &lt;tj@kernel.org&gt;</div><div class='ctx'> S:	Supported</div><div class='del'>-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core.git</div><div class='ctx'> F:	fs/kernfs/</div><div class='ctx'> F:	include/linux/kernfs.h</div><div class='ctx'> </div><div class='ctx'> KEXEC</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	Baoquan He &lt;bhe@redhat.com&gt;</div><div class='ctx'> L:	kexec@lists.infradead.org</div><div class='ctx'> W:	http://kernel.org/pub/linux/utils/kernel/kexec/</div><div class='ctx'> F:	include/linux/kexec.h</div><div class='hunk'>@@ -13624,7 +13763,6 @@ M:	Madhavan Srinivasan &lt;maddy@linux.ibm.com&gt;</div><div class='ctx'> M:	Michael Ellerman &lt;mpe@ellerman.id.au&gt;</div><div class='ctx'> R:	Nicholas Piggin &lt;npiggin@gmail.com&gt;</div><div class='ctx'> R:	Christophe Leroy &lt;christophe.leroy@csgroup.eu&gt;</div><div class='del'>-R:	Naveen N Rao &lt;naveen@kernel.org&gt;</div><div class='ctx'> L:	linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	https://github.com/linuxppc/wiki/wiki</div><div class='hunk'>@@ -13705,7 +13843,7 @@ M:	Luc Maranget &lt;luc.maranget@inria.fr&gt;</div><div class='ctx'> M:	"Paul E. McKenney" &lt;paulmck@kernel.org&gt;</div><div class='ctx'> R:	Akira Yokosawa &lt;akiyks@gmail.com&gt;</div><div class='ctx'> R:	Daniel Lustig &lt;dlustig@nvidia.com&gt;</div><div class='del'>-R:	Joel Fernandes &lt;joel@joelfernandes.org&gt;</div><div class='add'>+R:	Joel Fernandes &lt;joelagnelf@nvidia.com&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='ctx'> L:	linux-arch@vger.kernel.org</div><div class='ctx'> L:	lkmm@lists.linux.dev</div><div class='hunk'>@@ -13910,6 +14048,13 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml</div><div class='ctx'> F:	drivers/i2c/busses/i2c-ls2x.c</div><div class='ctx'> </div><div class='add'>+LOONGSON PWM DRIVER</div><div class='add'>+M:	Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;</div><div class='add'>+L:	linux-pwm@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/pwm/loongson,ls7a-pwm.yaml</div><div class='add'>+F:	drivers/pwm/pwm-loongson.c</div><div class='add'>+</div><div class='ctx'> LOONGSON-2 SOC SERIES CLOCK DRIVER</div><div class='ctx'> M:	Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;</div><div class='ctx'> L:	linux-clk@vger.kernel.org</div><div class='hunk'>@@ -14267,9 +14412,8 @@ F:	drivers/gpu/drm/armada/</div><div class='ctx'> F:	include/uapi/drm/armada_drm.h</div><div class='ctx'> </div><div class='ctx'> MARVELL CRYPTO DRIVER</div><div class='del'>-M:	Boris Brezillon &lt;bbrezillon@kernel.org&gt;</div><div class='del'>-M:	Arnaud Ebalard &lt;arno@natisbad.org&gt;</div><div class='ctx'> M:	Srujana Challa &lt;schalla@marvell.com&gt;</div><div class='add'>+M:	Bharat Bhushan &lt;bbhushan2@marvell.com&gt;</div><div class='ctx'> L:	linux-crypto@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/crypto/marvell/</div><div class='hunk'>@@ -14283,6 +14427,7 @@ S:	Odd fixes</div><div class='ctx'> F:	drivers/net/ethernet/marvell/sk*</div><div class='ctx'> </div><div class='ctx'> MARVELL LIBERTAS WIRELESS DRIVER</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='ctx'> L:	libertas-dev@lists.infradead.org</div><div class='ctx'> S:	Orphan</div><div class='ctx'> F:	drivers/net/wireless/marvell/libertas/</div><div class='hunk'>@@ -14448,7 +14593,7 @@ M:	Ramesh Shanmugasundaram &lt;rashanmu@gmail.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/max2175.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/maxim,max2175.txt</div><div class='ctx'> F:	Documentation/userspace-api/media/drivers/max2175.rst</div><div class='ctx'> F:	drivers/media/i2c/max2175*</div><div class='ctx'> F:	include/uapi/linux/max2175.h</div><div class='hunk'>@@ -14575,6 +14720,16 @@ F:	Documentation/devicetree/bindings/mfd/maxim,max77714.yaml</div><div class='ctx'> F:	drivers/mfd/max77714.c</div><div class='ctx'> F:	include/linux/mfd/max77714.h</div><div class='ctx'> </div><div class='add'>+MAXIM MAX77759 PMIC MFD DRIVER</div><div class='add'>+M:	André Draszik &lt;andre.draszik@linaro.org&gt;</div><div class='add'>+L:	linux-kernel@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/*/maxim,max77759*.yaml</div><div class='add'>+F:	drivers/gpio/gpio-max77759.c</div><div class='add'>+F:	drivers/mfd/max77759.c</div><div class='add'>+F:	drivers/nvmem/max77759-nvmem.c</div><div class='add'>+F:	include/linux/mfd/max77759.h</div><div class='add'>+</div><div class='ctx'> MAXIM MAX77802 PMIC REGULATOR DEVICE DRIVER</div><div class='ctx'> M:	Javier Martinez Canillas &lt;javier@dowhile0.org&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='hunk'>@@ -14637,6 +14792,7 @@ MAXLINEAR ETHERNET PHY DRIVER</div><div class='ctx'> M:	Xu Liang &lt;lxu@maxlinear.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='add'>+F:	drivers/net/phy/mxl-86110.c</div><div class='ctx'> F:	drivers/net/phy/mxl-gpy.c</div><div class='ctx'> </div><div class='ctx'> MCAN MMIO DEVICE DRIVER</div><div class='hunk'>@@ -14774,7 +14930,7 @@ L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='ctx'> F:	Documentation/admin-guide/media/imx.rst</div><div class='del'>-F:	Documentation/devicetree/bindings/media/imx.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/media/fsl,imx6-mipi-csi2.yaml</div><div class='ctx'> F:	drivers/staging/media/imx/</div><div class='ctx'> F:	include/linux/imx-media.h</div><div class='ctx'> F:	include/media/imx.h</div><div class='hunk'>@@ -14895,7 +15051,7 @@ F:	Documentation/devicetree/bindings/media/renesas,csi2.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/media/renesas,isp.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/media/renesas,vin.yaml</div><div class='ctx'> F:	drivers/media/platform/renesas/rcar-csi2.c</div><div class='del'>-F:	drivers/media/platform/renesas/rcar-isp.c</div><div class='add'>+F:	drivers/media/platform/renesas/rcar-isp/</div><div class='ctx'> F:	drivers/media/platform/renesas/rcar-vin/</div><div class='ctx'> </div><div class='ctx'> MEDIA DRIVERS FOR RENESAS - VSP1</div><div class='hunk'>@@ -15018,6 +15174,7 @@ M:	Qingfang Deng &lt;dqfext@gmail.com&gt;</div><div class='ctx'> M:	SkyLake Huang &lt;SkyLake.Huang@mediatek.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	drivers/net/phy/mediatek/mtk-2p5ge.c</div><div class='ctx'> F:	drivers/net/phy/mediatek/mtk-ge-soc.c</div><div class='ctx'> F:	drivers/net/phy/mediatek/mtk-phy-lib.c</div><div class='ctx'> F:	drivers/net/phy/mediatek/mtk-ge.c</div><div class='hunk'>@@ -15048,7 +15205,7 @@ F:	Documentation/devicetree/bindings/media/mediatek-jpeg-*.yaml</div><div class='ctx'> F:	drivers/media/platform/mediatek/jpeg/</div><div class='ctx'> </div><div class='ctx'> MEDIATEK KEYPAD DRIVER</div><div class='del'>-M:	Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;</div><div class='add'>+M:	Mattijs Korpershoek &lt;mkorpershoek@kernel.org&gt;</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml</div><div class='ctx'> F:	drivers/input/keyboard/mt6779-keypad.c</div><div class='hunk'>@@ -15471,24 +15628,45 @@ F:	Documentation/mm/</div><div class='ctx'> F:	include/linux/gfp.h</div><div class='ctx'> F:	include/linux/gfp_types.h</div><div class='ctx'> F:	include/linux/memfd.h</div><div class='del'>-F:	include/linux/memory.h</div><div class='ctx'> F:	include/linux/memory_hotplug.h</div><div class='ctx'> F:	include/linux/memory-tiers.h</div><div class='ctx'> F:	include/linux/mempolicy.h</div><div class='ctx'> F:	include/linux/mempool.h</div><div class='ctx'> F:	include/linux/memremap.h</div><div class='del'>-F:	include/linux/mm.h</div><div class='del'>-F:	include/linux/mm_*.h</div><div class='ctx'> F:	include/linux/mmzone.h</div><div class='ctx'> F:	include/linux/mmu_notifier.h</div><div class='ctx'> F:	include/linux/pagewalk.h</div><div class='del'>-F:	include/linux/rmap.h</div><div class='ctx'> F:	include/trace/events/ksm.h</div><div class='ctx'> F:	mm/</div><div class='ctx'> F:	tools/mm/</div><div class='ctx'> F:	tools/testing/selftests/mm/</div><div class='ctx'> N:	include/linux/page[-_]*</div><div class='ctx'> </div><div class='add'>+MEMORY MANAGEMENT - CORE</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+R:	Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt;</div><div class='add'>+R:	Liam R. Howlett &lt;Liam.Howlett@oracle.com&gt;</div><div class='add'>+R:	Vlastimil Babka &lt;vbabka@suse.cz&gt;</div><div class='add'>+R:	Mike Rapoport &lt;rppt@kernel.org&gt;</div><div class='add'>+R:	Suren Baghdasaryan &lt;surenb@google.com&gt;</div><div class='add'>+R:	Michal Hocko &lt;mhocko@suse.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	http://www.linux-mm.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	include/linux/memory.h</div><div class='add'>+F:	include/linux/mm.h</div><div class='add'>+F:	include/linux/mm_*.h</div><div class='add'>+F:	include/linux/mmdebug.h</div><div class='add'>+F:	include/linux/pagewalk.h</div><div class='add'>+F:	mm/Kconfig</div><div class='add'>+F:	mm/debug.c</div><div class='add'>+F:	mm/init-mm.c</div><div class='add'>+F:	mm/memory.c</div><div class='add'>+F:	mm/pagewalk.c</div><div class='add'>+F:	mm/util.c</div><div class='add'>+</div><div class='ctx'> MEMORY MANAGEMENT - EXECMEM</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='ctx'> M:	Mike Rapoport &lt;rppt@kernel.org&gt;</div><div class='hunk'>@@ -15497,6 +15675,53 @@ S:	Maintained</div><div class='ctx'> F:	include/linux/execmem.h</div><div class='ctx'> F:	mm/execmem.c</div><div class='ctx'> </div><div class='add'>+MEMORY MANAGEMENT - GUP (GET USER PAGES)</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+R:	Jason Gunthorpe &lt;jgg@nvidia.com&gt;</div><div class='add'>+R:	John Hubbard &lt;jhubbard@nvidia.com&gt;</div><div class='add'>+R:	Peter Xu &lt;peterx@redhat.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	http://www.linux-mm.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	mm/gup.c</div><div class='add'>+</div><div class='add'>+MEMORY MANAGEMENT - KSM (Kernel Samepage Merging)</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+R:	Xu Xin &lt;xu.xin16@zte.com.cn&gt;</div><div class='add'>+R:	Chengming Zhou &lt;chengming.zhou@linux.dev&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	http://www.linux-mm.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	Documentation/admin-guide/mm/ksm.rst</div><div class='add'>+F:	Documentation/mm/ksm.rst</div><div class='add'>+F:	include/linux/ksm.h</div><div class='add'>+F:	include/trace/events/ksm.h</div><div class='add'>+F:	mm/ksm.c</div><div class='add'>+</div><div class='add'>+MEMORY MANAGEMENT - MEMORY POLICY AND MIGRATION</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+R:	Zi Yan &lt;ziy@nvidia.com&gt;</div><div class='add'>+R:	Matthew Brost &lt;matthew.brost@intel.com&gt;</div><div class='add'>+R:	Joshua Hahn &lt;joshua.hahnjy@gmail.com&gt;</div><div class='add'>+R:	Rakie Kim &lt;rakie.kim@sk.com&gt;</div><div class='add'>+R:	Byungchul Park &lt;byungchul@sk.com&gt;</div><div class='add'>+R:	Gregory Price &lt;gourry@gourry.net&gt;</div><div class='add'>+R:	Ying Huang &lt;ying.huang@linux.alibaba.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	http://www.linux-mm.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	include/linux/mempolicy.h</div><div class='add'>+F:	include/linux/migrate.h</div><div class='add'>+F:	mm/mempolicy.c</div><div class='add'>+F:	mm/migrate.c</div><div class='add'>+F:	mm/migrate_device.c</div><div class='add'>+</div><div class='ctx'> MEMORY MANAGEMENT - NUMA MEMBLOCKS AND NUMA EMULATION</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='ctx'> M:	Mike Rapoport &lt;rppt@kernel.org&gt;</div><div class='hunk'>@@ -15507,6 +15732,49 @@ F:	mm/numa.c</div><div class='ctx'> F:	mm/numa_emulation.c</div><div class='ctx'> F:	mm/numa_memblks.c</div><div class='ctx'> </div><div class='add'>+MEMORY MANAGEMENT - PAGE ALLOCATOR</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	Vlastimil Babka &lt;vbabka@suse.cz&gt;</div><div class='add'>+R:	Suren Baghdasaryan &lt;surenb@google.com&gt;</div><div class='add'>+R:	Michal Hocko &lt;mhocko@suse.com&gt;</div><div class='add'>+R:	Brendan Jackman &lt;jackmanb@google.com&gt;</div><div class='add'>+R:	Johannes Weiner &lt;hannes@cmpxchg.org&gt;</div><div class='add'>+R:	Zi Yan &lt;ziy@nvidia.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	include/linux/compaction.h</div><div class='add'>+F:	include/linux/gfp.h</div><div class='add'>+F:	include/linux/page-isolation.h</div><div class='add'>+F:	mm/compaction.c</div><div class='add'>+F:	mm/page_alloc.c</div><div class='add'>+F:	mm/page_isolation.c</div><div class='add'>+</div><div class='add'>+MEMORY MANAGEMENT - RECLAIM</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	Johannes Weiner &lt;hannes@cmpxchg.org&gt;</div><div class='add'>+R:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+R:	Michal Hocko &lt;mhocko@kernel.org&gt;</div><div class='add'>+R:	Qi Zheng &lt;zhengqi.arch@bytedance.com&gt;</div><div class='add'>+R:	Shakeel Butt &lt;shakeel.butt@linux.dev&gt;</div><div class='add'>+R:	Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	mm/pt_reclaim.c</div><div class='add'>+F:	mm/vmscan.c</div><div class='add'>+</div><div class='add'>+MEMORY MANAGEMENT - RMAP (REVERSE MAPPING)</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+M:	Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt;</div><div class='add'>+R:	Rik van Riel &lt;riel@surriel.com&gt;</div><div class='add'>+R:	Liam R. Howlett &lt;Liam.Howlett@oracle.com&gt;</div><div class='add'>+R:	Vlastimil Babka &lt;vbabka@suse.cz&gt;</div><div class='add'>+R:	Harry Yoo &lt;harry.yoo@oracle.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	include/linux/rmap.h</div><div class='add'>+F:	mm/rmap.c</div><div class='add'>+</div><div class='ctx'> MEMORY MANAGEMENT - SECRETMEM</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='ctx'> M:	Mike Rapoport &lt;rppt@kernel.org&gt;</div><div class='hunk'>@@ -15515,6 +15783,30 @@ S:	Maintained</div><div class='ctx'> F:	include/linux/secretmem.h</div><div class='ctx'> F:	mm/secretmem.c</div><div class='ctx'> </div><div class='add'>+MEMORY MANAGEMENT - THP (TRANSPARENT HUGE PAGE)</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+R:	Zi Yan &lt;ziy@nvidia.com&gt;</div><div class='add'>+R:	Baolin Wang &lt;baolin.wang@linux.alibaba.com&gt;</div><div class='add'>+R:	Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt;</div><div class='add'>+R:	Liam R. Howlett &lt;Liam.Howlett@oracle.com&gt;</div><div class='add'>+R:	Nico Pache &lt;npache@redhat.com&gt;</div><div class='add'>+R:	Ryan Roberts &lt;ryan.roberts@arm.com&gt;</div><div class='add'>+R:	Dev Jain &lt;dev.jain@arm.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	http://www.linux-mm.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	Documentation/admin-guide/mm/transhuge.rst</div><div class='add'>+F:	include/linux/huge_mm.h</div><div class='add'>+F:	include/linux/khugepaged.h</div><div class='add'>+F:	include/trace/events/huge_memory.h</div><div class='add'>+F:	mm/huge_memory.c</div><div class='add'>+F:	mm/khugepaged.c</div><div class='add'>+F:	tools/testing/selftests/mm/khugepaged.c</div><div class='add'>+F:	tools/testing/selftests/mm/split_huge_page_test.c</div><div class='add'>+F:	tools/testing/selftests/mm/transhuge-stress.c</div><div class='add'>+</div><div class='ctx'> MEMORY MANAGEMENT - USERFAULTFD</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='ctx'> R:	Peter Xu &lt;peterx@redhat.com&gt;</div><div class='hunk'>@@ -15534,10 +15826,12 @@ M:	Liam R. Howlett &lt;Liam.Howlett@oracle.com&gt;</div><div class='ctx'> M:	Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt;</div><div class='ctx'> R:	Vlastimil Babka &lt;vbabka@suse.cz&gt;</div><div class='ctx'> R:	Jann Horn &lt;jannh@google.com&gt;</div><div class='add'>+R:	Pedro Falcato &lt;pfalcato@suse.de&gt;</div><div class='ctx'> L:	linux-mm@kvack.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> W:	http://www.linux-mm.org</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	include/trace/events/mmap.h</div><div class='ctx'> F:	mm/mlock.c</div><div class='ctx'> F:	mm/mmap.c</div><div class='ctx'> F:	mm/mprotect.c</div><div class='hunk'>@@ -15548,6 +15842,36 @@ F:	mm/vma.h</div><div class='ctx'> F:	mm/vma_internal.h</div><div class='ctx'> F:	tools/testing/vma/</div><div class='ctx'> </div><div class='add'>+MEMORY MAPPING - LOCKING</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	Suren Baghdasaryan &lt;surenb@google.com&gt;</div><div class='add'>+M:	Liam R. Howlett &lt;Liam.Howlett@oracle.com&gt;</div><div class='add'>+M:	Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt;</div><div class='add'>+R:	Vlastimil Babka &lt;vbabka@suse.cz&gt;</div><div class='add'>+R:	Shakeel Butt &lt;shakeel.butt@linux.dev&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	http://www.linux-mm.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	Documentation/mm/process_addrs.rst</div><div class='add'>+F:	include/linux/mmap_lock.h</div><div class='add'>+F:	include/trace/events/mmap_lock.h</div><div class='add'>+F:	mm/mmap_lock.c</div><div class='add'>+</div><div class='add'>+MEMORY MAPPING - MADVISE (MEMORY ADVICE)</div><div class='add'>+M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='add'>+M:	Liam R. Howlett &lt;Liam.Howlett@oracle.com&gt;</div><div class='add'>+M:	Lorenzo Stoakes &lt;lorenzo.stoakes@oracle.com&gt;</div><div class='add'>+M:	David Hildenbrand &lt;david@redhat.com&gt;</div><div class='add'>+R:	Vlastimil Babka &lt;vbabka@suse.cz&gt;</div><div class='add'>+R:	Jann Horn &lt;jannh@google.com&gt;</div><div class='add'>+L:	linux-mm@kvack.org</div><div class='add'>+S:	Maintained</div><div class='add'>+W:	http://www.linux-mm.org</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm</div><div class='add'>+F:	include/uapi/asm-generic/mman-common.h</div><div class='add'>+F:	mm/madvise.c</div><div class='add'>+</div><div class='ctx'> MEMORY TECHNOLOGY DEVICES (MTD)</div><div class='ctx'> M:	Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='ctx'> M:	Richard Weinberger &lt;richard@nod.at&gt;</div><div class='hunk'>@@ -16220,6 +16544,7 @@ F:	arch/mips/include/asm/mach-loongson32/</div><div class='ctx'> F:	arch/mips/loongson32/</div><div class='ctx'> F:	drivers/*/*loongson1*</div><div class='ctx'> F:	drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c</div><div class='add'>+F:	sound/soc/loongson/loongson1_ac97.c</div><div class='ctx'> </div><div class='ctx'> MIPS/LOONGSON2EF ARCHITECTURE</div><div class='ctx'> M:	Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;</div><div class='hunk'>@@ -16490,7 +16815,7 @@ M:	Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/mt9v032.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/aptina,mt9v032.txt</div><div class='ctx'> F:	drivers/media/i2c/mt9v032.c</div><div class='ctx'> F:	include/media/i2c/mt9v032.h</div><div class='ctx'> </div><div class='hunk'>@@ -16755,6 +17080,7 @@ F:	Documentation/networking/net_cachelines/net_device.rst</div><div class='ctx'> F:	drivers/connector/</div><div class='ctx'> F:	drivers/net/</div><div class='ctx'> F:	drivers/ptp/</div><div class='add'>+F:	drivers/s390/net/</div><div class='ctx'> F:	include/dt-bindings/net/</div><div class='ctx'> F:	include/linux/cn_proc.h</div><div class='ctx'> F:	include/linux/etherdevice.h</div><div class='hunk'>@@ -16764,6 +17090,7 @@ F:	include/linux/fddidevice.h</div><div class='ctx'> F:	include/linux/hippidevice.h</div><div class='ctx'> F:	include/linux/if_*</div><div class='ctx'> F:	include/linux/inetdevice.h</div><div class='add'>+F:	include/linux/ism.h</div><div class='ctx'> F:	include/linux/netdev*</div><div class='ctx'> F:	include/linux/platform_data/wiznet.h</div><div class='ctx'> F:	include/uapi/linux/cn_proc.h</div><div class='hunk'>@@ -16919,6 +17246,7 @@ X:	net/ceph/</div><div class='ctx'> X:	net/mac80211/</div><div class='ctx'> X:	net/rfkill/</div><div class='ctx'> X:	net/wireless/</div><div class='add'>+X:	tools/testing/selftests/net/can/</div><div class='ctx'> </div><div class='ctx'> NETWORKING [IPSEC]</div><div class='ctx'> M:	Steffen Klassert &lt;steffen.klassert@secunet.com&gt;</div><div class='hunk'>@@ -17211,6 +17539,7 @@ M:	Pavel Machek &lt;pavel@kernel.org&gt;</div><div class='ctx'> M:	Sakari Ailus &lt;sakari.ailus@iki.fi&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/adi,ad5820.yaml</div><div class='ctx'> F:	drivers/media/i2c/ad5820.c</div><div class='ctx'> F:	drivers/media/i2c/et8ek8</div><div class='ctx'> </div><div class='hunk'>@@ -17367,7 +17696,7 @@ T:	git git://git.infradead.org/nvme.git</div><div class='ctx'> F:	drivers/nvme/target/</div><div class='ctx'> </div><div class='ctx'> NVMEM FRAMEWORK</div><div class='del'>-M:	Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+M:	Srinivas Kandagatla &lt;srini@kernel.org&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/srini/nvmem.git</div><div class='ctx'> F:	Documentation/ABI/stable/sysfs-bus-nvmem</div><div class='hunk'>@@ -17806,6 +18135,23 @@ T:	git git://linuxtv.org/media.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml</div><div class='ctx'> F:	drivers/media/i2c/ov02a10.c</div><div class='ctx'> </div><div class='add'>+OMNIVISION OV02C10 SENSOR DRIVER</div><div class='add'>+M:	Hans de Goede &lt;hansg@kernel.org&gt;</div><div class='add'>+R:	Bryan O'Donoghue &lt;bod@kernel.org&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+T:	git git://linuxtv.org/media.git</div><div class='add'>+F:	drivers/media/i2c/ov02c10.c</div><div class='add'>+</div><div class='add'>+OMNIVISION OV02E10 SENSOR DRIVER</div><div class='add'>+M:	Bryan O'Donoghue &lt;bod@kernel.org&gt;</div><div class='add'>+M:	Hans de Goede &lt;hansg@kernel.org&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+T:	git git://linuxtv.org/media.git</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/ovti,ov02e10.yaml</div><div class='add'>+F:	drivers/media/i2c/ov02e10.c</div><div class='add'>+</div><div class='ctx'> OMNIVISION OV08D10 SENSOR DRIVER</div><div class='ctx'> M:	Jimmy Su &lt;jimmy.su@intel.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='hunk'>@@ -17928,7 +18274,7 @@ OMNIVISION OV7670 SENSOR DRIVER</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Orphan</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/ov7670.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/ovti,ov7670.txt</div><div class='ctx'> F:	drivers/media/i2c/ov7670.c</div><div class='ctx'> </div><div class='ctx'> OMNIVISION OV772x SENSOR DRIVER</div><div class='hunk'>@@ -17944,7 +18290,7 @@ OMNIVISION OV7740 SENSOR DRIVER</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Orphan</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/ov7740.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/ovti,ov7740.txt</div><div class='ctx'> F:	drivers/media/i2c/ov7740.c</div><div class='ctx'> </div><div class='ctx'> OMNIVISION OV8856 SENSOR DRIVER</div><div class='hunk'>@@ -17985,7 +18331,7 @@ R:	Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/ov9650.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/ovti,ov9650.txt</div><div class='ctx'> F:	drivers/media/i2c/ov9650.c</div><div class='ctx'> </div><div class='ctx'> OMNIVISION OV9734 SENSOR DRIVER</div><div class='hunk'>@@ -18010,12 +18356,13 @@ S:	Maintained</div><div class='ctx'> F:	drivers/mtd/nand/onenand/</div><div class='ctx'> F:	include/linux/mtd/onenand*.h</div><div class='ctx'> </div><div class='del'>-ONEXPLAYER FAN DRIVER</div><div class='add'>+ONEXPLAYER PLATFORM EC DRIVER</div><div class='add'>+M:	Antheas Kapenekakis &lt;lkml@antheas.dev&gt;</div><div class='ctx'> M:	Derek John Clark &lt;derekjohn.clark@gmail.com&gt;</div><div class='ctx'> M:	Joaquín Ignacio Aramendía &lt;samsagax@gmail.com&gt;</div><div class='del'>-L:	linux-hwmon@vger.kernel.org</div><div class='add'>+L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	drivers/hwmon/oxp-sensors.c</div><div class='add'>+F:	drivers/platform/x86/oxpec.c</div><div class='ctx'> </div><div class='ctx'> ONIE TLV NVMEM LAYOUT DRIVER</div><div class='ctx'> M:	Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='hunk'>@@ -18131,6 +18478,18 @@ F:	arch/openrisc/</div><div class='ctx'> F:	drivers/irqchip/irq-ompic.c</div><div class='ctx'> F:	drivers/irqchip/irq-or1k-*</div><div class='ctx'> </div><div class='add'>+OPENVPN DATA CHANNEL OFFLOAD</div><div class='add'>+M:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+R:	Sabrina Dubroca &lt;sd@queasysnail.net&gt;</div><div class='add'>+L:	openvpn-devel@lists.sourceforge.net (subscribers-only)</div><div class='add'>+L:	netdev@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+T:	git https://github.com/OpenVPN/ovpn-net-next.git</div><div class='add'>+F:	Documentation/netlink/specs/ovpn.yaml</div><div class='add'>+F:	drivers/net/ovpn/</div><div class='add'>+F:	include/uapi/linux/ovpn.h</div><div class='add'>+F:	tools/testing/selftests/net/ovpn/</div><div class='add'>+</div><div class='ctx'> OPENVSWITCH</div><div class='ctx'> M:	Aaron Conole &lt;aconole@redhat.com&gt;</div><div class='ctx'> M:	Eelco Chaudron &lt;echaudro@redhat.com&gt;</div><div class='hunk'>@@ -18190,6 +18549,7 @@ S:	Maintained</div><div class='ctx'> W:	https://linuxtv.org</div><div class='ctx'> Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='ctx'> T:	git git://linuxtv.org/mhadli/v4l-dvb-davinci_devices.git</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/ovti,ov2659.txt</div><div class='ctx'> F:	drivers/media/i2c/ov2659.c</div><div class='ctx'> F:	include/media/i2c/ov2659.h</div><div class='ctx'> </div><div class='hunk'>@@ -18301,7 +18661,7 @@ F:	include/uapi/linux/ppdev.h</div><div class='ctx'> PARAVIRT_OPS INTERFACE</div><div class='ctx'> M:	Juergen Gross &lt;jgross@suse.com&gt;</div><div class='ctx'> R:	Ajay Kaher &lt;ajay.kaher@broadcom.com&gt;</div><div class='del'>-R:	Alexey Makhalov &lt;alexey.amakhalov@broadcom.com&gt;</div><div class='add'>+R:	Alexey Makhalov &lt;alexey.makhalov@broadcom.com&gt;</div><div class='ctx'> R:	Broadcom internal kernel review list &lt;bcm-kernel-feedback-list@broadcom.com&gt;</div><div class='ctx'> L:	virtualization@lists.linux.dev</div><div class='ctx'> L:	x86@kernel.org</div><div class='hunk'>@@ -18618,7 +18978,7 @@ PCI MSI DRIVER FOR ALTERA MSI IP</div><div class='ctx'> M:	Joyce Ooi &lt;joyce.ooi@intel.com&gt;</div><div class='ctx'> L:	linux-pci@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	Documentation/devicetree/bindings/pci/altr,msi-controller.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml</div><div class='ctx'> F:	drivers/pci/controller/pcie-altera-msi.c</div><div class='ctx'> </div><div class='ctx'> PCI MSI DRIVER FOR APPLIEDMICRO XGENE</div><div class='hunk'>@@ -18632,7 +18992,7 @@ F:	drivers/pci/controller/pci-xgene-msi.c</div><div class='ctx'> PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS</div><div class='ctx'> M:	Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;</div><div class='ctx'> M:	Krzysztof WilczyÅ„ski &lt;kw@linux.com&gt;</div><div class='del'>-R:	Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+M:	Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='ctx'> R:	Rob Herring &lt;robh@kernel.org&gt;</div><div class='ctx'> L:	linux-pci@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='hunk'>@@ -18685,6 +19045,16 @@ F:	include/asm-generic/pci*</div><div class='ctx'> F:	include/linux/of_pci.h</div><div class='ctx'> F:	include/linux/pci*</div><div class='ctx'> F:	include/uapi/linux/pci*</div><div class='add'>+</div><div class='add'>+PCI SUBSYSTEM [RUST]</div><div class='add'>+M:	Danilo Krummrich &lt;dakr@kernel.org&gt;</div><div class='add'>+R:	Bjorn Helgaas &lt;bhelgaas@google.com&gt;</div><div class='add'>+R:	Krzysztof WilczyÅ„ski &lt;kwilczynski@kernel.org&gt;</div><div class='add'>+L:	linux-pci@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+C:	irc://irc.oftc.net/linux-pci</div><div class='add'>+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git</div><div class='add'>+F:	rust/helpers/pci.c</div><div class='ctx'> F:	rust/kernel/pci.rs</div><div class='ctx'> F:	samples/rust/rust_driver_pci.rs</div><div class='ctx'> </div><div class='hunk'>@@ -19204,6 +19574,12 @@ S:	Maintained</div><div class='ctx'> F:	drivers/pnp/</div><div class='ctx'> F:	include/linux/pnp.h</div><div class='ctx'> </div><div class='add'>+PORTWELL EC DRIVER</div><div class='add'>+M:	Yen-Chi Huang &lt;jesse.huang@portwell.com.tw&gt;</div><div class='add'>+L:	platform-driver-x86@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/platform/x86/portwell-ec.c</div><div class='add'>+</div><div class='ctx'> POSIX CLOCKS and TIMERS</div><div class='ctx'> M:	Anna-Maria Behnsen &lt;anna-maria@linutronix.de&gt;</div><div class='ctx'> M:	Frederic Weisbecker &lt;frederic@kernel.org&gt;</div><div class='hunk'>@@ -19249,6 +19625,7 @@ M:	Mark Rutland &lt;mark.rutland@arm.com&gt;</div><div class='ctx'> M:	Lorenzo Pieralisi &lt;lpieralisi@kernel.org&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/arm/psci.yaml</div><div class='ctx'> F:	drivers/firmware/psci/</div><div class='ctx'> F:	include/linux/psci.h</div><div class='ctx'> F:	include/uapi/linux/psci.h</div><div class='hunk'>@@ -19572,7 +19949,7 @@ S:	Supported</div><div class='ctx'> F:	drivers/crypto/intel/qat/</div><div class='ctx'> </div><div class='ctx'> QCOM AUDIO (ASoC) DRIVERS</div><div class='del'>-M:	Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+M:	Srinivas Kandagatla &lt;srini@kernel.org&gt;</div><div class='ctx'> L:	linux-sound@vger.kernel.org</div><div class='ctx'> L:	linux-arm-msm@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='hunk'>@@ -19745,6 +20122,7 @@ F:	drivers/media/tuners/qt1010*</div><div class='ctx'> </div><div class='ctx'> QUALCOMM ATH12K WIRELESS DRIVER</div><div class='ctx'> M:	Jeff Johnson &lt;jjohnson@kernel.org&gt;</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='ctx'> L:	ath12k@lists.infradead.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	https://wireless.wiki.kernel.org/en/users/Drivers/ath12k</div><div class='hunk'>@@ -19754,6 +20132,7 @@ N:	ath12k</div><div class='ctx'> </div><div class='ctx'> QUALCOMM ATHEROS ATH10K WIRELESS DRIVER</div><div class='ctx'> M:	Jeff Johnson &lt;jjohnson@kernel.org&gt;</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='ctx'> L:	ath10k@lists.infradead.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	https://wireless.wiki.kernel.org/en/users/Drivers/ath10k</div><div class='hunk'>@@ -19763,6 +20142,7 @@ N:	ath10k</div><div class='ctx'> </div><div class='ctx'> QUALCOMM ATHEROS ATH11K WIRELESS DRIVER</div><div class='ctx'> M:	Jeff Johnson &lt;jjohnson@kernel.org&gt;</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='ctx'> L:	ath11k@lists.infradead.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	https://wireless.wiki.kernel.org/en/users/Drivers/ath11k</div><div class='hunk'>@@ -19872,7 +20252,7 @@ F:	Documentation/devicetree/bindings/net/qcom,ethqos.yaml</div><div class='ctx'> F:	drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c</div><div class='ctx'> </div><div class='ctx'> QUALCOMM FASTRPC DRIVER</div><div class='del'>-M:	Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+M:	Srinivas Kandagatla &lt;srini@kernel.org&gt;</div><div class='ctx'> M:	Amol Maheshwari &lt;amahesh@qti.qualcomm.com&gt;</div><div class='ctx'> L:	linux-arm-msm@vger.kernel.org</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='hunk'>@@ -19967,6 +20347,7 @@ QUALCOMM IRIS VIDEO ACCELERATOR DRIVER</div><div class='ctx'> M:	Vikash Garodia &lt;quic_vgarodia@quicinc.com&gt;</div><div class='ctx'> M:	Dikshita Agarwal &lt;quic_dikshita@quicinc.com&gt;</div><div class='ctx'> R:	Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;</div><div class='add'>+R:	Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> L:	linux-arm-msm@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -20028,8 +20409,8 @@ F:	Documentation/devicetree/bindings/usb/qcom,pmic-*.yaml</div><div class='ctx'> F:	drivers/usb/typec/tcpm/qcom/</div><div class='ctx'> </div><div class='ctx'> QUALCOMM VENUS VIDEO ACCELERATOR DRIVER</div><div class='del'>-M:	Stanimir Varbanov &lt;stanimir.k.varbanov@gmail.com&gt;</div><div class='ctx'> M:	Vikash Garodia &lt;quic_vgarodia@quicinc.com&gt;</div><div class='add'>+M:	Dikshita Agarwal &lt;quic_dikshita@quicinc.com&gt;</div><div class='ctx'> R:	Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> L:	linux-arm-msm@vger.kernel.org</div><div class='hunk'>@@ -20278,11 +20659,14 @@ F:	tools/testing/selftests/net/rds/</div><div class='ctx'> RDT - RESOURCE ALLOCATION</div><div class='ctx'> M:	Tony Luck &lt;tony.luck@intel.com&gt;</div><div class='ctx'> M:	Reinette Chatre &lt;reinette.chatre@intel.com&gt;</div><div class='add'>+R:	Dave Martin &lt;Dave.Martin@arm.com&gt;</div><div class='add'>+R:	James Morse &lt;james.morse@arm.com&gt;</div><div class='ctx'> L:	linux-kernel@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='del'>-F:	Documentation/arch/x86/resctrl*</div><div class='add'>+F:	Documentation/filesystems/resctrl.rst</div><div class='ctx'> F:	arch/x86/include/asm/resctrl.h</div><div class='ctx'> F:	arch/x86/kernel/cpu/resctrl/</div><div class='add'>+F:	fs/resctrl/</div><div class='ctx'> F:	include/linux/resctrl*.h</div><div class='ctx'> F:	tools/testing/selftests/resctrl/</div><div class='ctx'> </div><div class='hunk'>@@ -20290,14 +20674,14 @@ READ-COPY UPDATE (RCU)</div><div class='ctx'> M:	"Paul E. McKenney" &lt;paulmck@kernel.org&gt;</div><div class='ctx'> M:	Frederic Weisbecker &lt;frederic@kernel.org&gt; (kernel/rcu/tree_nocb.h)</div><div class='ctx'> M:	Neeraj Upadhyay &lt;neeraj.upadhyay@kernel.org&gt; (kernel/rcu/tasks.h)</div><div class='del'>-M:	Joel Fernandes &lt;joel@joelfernandes.org&gt;</div><div class='add'>+M:	Joel Fernandes &lt;joelagnelf@nvidia.com&gt;</div><div class='ctx'> M:	Josh Triplett &lt;josh@joshtriplett.org&gt;</div><div class='ctx'> M:	Boqun Feng &lt;boqun.feng@gmail.com&gt;</div><div class='ctx'> M:	Uladzislau Rezki &lt;urezki@gmail.com&gt;</div><div class='ctx'> R:	Steven Rostedt &lt;rostedt@goodmis.org&gt;</div><div class='ctx'> R:	Mathieu Desnoyers &lt;mathieu.desnoyers@efficios.com&gt;</div><div class='ctx'> R:	Lai Jiangshan &lt;jiangshanlai@gmail.com&gt;</div><div class='del'>-R:	Zqiang &lt;qiang.zhang1211@gmail.com&gt;</div><div class='add'>+R:	Zqiang &lt;qiang.zhang@linux.dev&gt;</div><div class='ctx'> L:	rcu@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> W:	http://www.rdrop.com/users/paulmck/RCU/</div><div class='hunk'>@@ -20450,8 +20834,8 @@ F:	Documentation/devicetree/bindings/i2c/renesas,iic-emev2.yaml</div><div class='ctx'> F:	drivers/i2c/busses/i2c-emev2.c</div><div class='ctx'> </div><div class='ctx'> RENESAS ETHERNET AVB DRIVER</div><div class='del'>-M:	Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;</div><div class='ctx'> M:	Niklas Söderlund &lt;niklas.soderlund@ragnatech.se&gt;</div><div class='add'>+R:	Paul Barker &lt;paul@pbarker.dev&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> L:	linux-renesas-soc@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -20612,6 +20996,14 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml</div><div class='ctx'> F:	drivers/usb/gadget/udc/renesas_usbf.c</div><div class='ctx'> </div><div class='add'>+RENESAS RZ/V2H(P) DWMAC GBETH GLUE LAYER DRIVER</div><div class='add'>+M:	Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='add'>+L:	netdev@vger.kernel.org</div><div class='add'>+L:	linux-renesas-soc@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/net/renesas,r9a09g057-gbeth.yaml</div><div class='add'>+F:	drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c</div><div class='add'>+</div><div class='ctx'> RENESAS RZ/V2M I2C DRIVER</div><div class='ctx'> M:	Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</div><div class='ctx'> L:	linux-i2c@vger.kernel.org</div><div class='hunk'>@@ -20909,6 +21301,13 @@ F:	Documentation/devicetree/bindings/sound/rockchip,rk3308-codec.yaml</div><div class='ctx'> F:	sound/soc/codecs/rk3308_codec.c</div><div class='ctx'> F:	sound/soc/codecs/rk3308_codec.h</div><div class='ctx'> </div><div class='add'>+ROCKCHIP SAI DRIVER</div><div class='add'>+M:	Nicolas Frattaroli &lt;nicolas.frattaroli@collabora.com&gt;</div><div class='add'>+L:	linux-rockchip@lists.infradead.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/sound/rockchip,rk3576-sai.yaml</div><div class='add'>+F:	sound/soc/rockchip/rockchip_sai.*</div><div class='add'>+</div><div class='ctx'> ROCKCHIP VIDEO DECODER DRIVER</div><div class='ctx'> M:	Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='hunk'>@@ -21252,6 +21651,7 @@ L:	linux-s390@vger.kernel.org</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	drivers/s390/net/</div><div class='add'>+F:	include/linux/ism.h</div><div class='ctx'> </div><div class='ctx'> S390 PCI SUBSYSTEM</div><div class='ctx'> M:	Niklas Schnelle &lt;schnelle@linux.ibm.com&gt;</div><div class='hunk'>@@ -21741,6 +22141,7 @@ F:	include/linux/seccomp.h</div><div class='ctx'> F:	include/uapi/linux/seccomp.h</div><div class='ctx'> F:	kernel/seccomp.c</div><div class='ctx'> F:	tools/testing/selftests/kselftest_harness.h</div><div class='add'>+F:	tools/testing/selftests/kselftest_harness/</div><div class='ctx'> F:	tools/testing/selftests/seccomp/*</div><div class='ctx'> K:	\bsecure_computing</div><div class='ctx'> K:	\bTIF_SECCOMP\b</div><div class='hunk'>@@ -21920,7 +22321,7 @@ S:	Maintained</div><div class='ctx'> F:	drivers/media/rc/serial_ir.c</div><div class='ctx'> </div><div class='ctx'> SERIAL LOW-POWER INTER-CHIP MEDIA BUS (SLIMbus)</div><div class='del'>-M:	Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+M:	Srinivas Kandagatla &lt;srini@kernel.org&gt;</div><div class='ctx'> L:	linux-sound@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/slimbus/</div><div class='hunk'>@@ -22136,6 +22537,7 @@ F:	drivers/platform/x86/touchscreen_dmi.c</div><div class='ctx'> </div><div class='ctx'> SILICON LABS WIRELESS DRIVERS (for WFxxx series)</div><div class='ctx'> M:	Jérôme Pouiller &lt;jerome.pouiller@silabs.com&gt;</div><div class='add'>+L:	linux-wireless@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='ctx'> F:	Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml</div><div class='ctx'> F:	drivers/net/wireless/silabs/</div><div class='hunk'>@@ -22236,9 +22638,7 @@ F:	drivers/nvmem/layouts/sl28vpd.c</div><div class='ctx'> </div><div class='ctx'> SLAB ALLOCATOR</div><div class='ctx'> M:	Christoph Lameter &lt;cl@linux.com&gt;</div><div class='del'>-M:	Pekka Enberg &lt;penberg@kernel.org&gt;</div><div class='ctx'> M:	David Rientjes &lt;rientjes@google.com&gt;</div><div class='del'>-M:	Joonsoo Kim &lt;iamjoonsoo.kim@lge.com&gt;</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='ctx'> M:	Vlastimil Babka &lt;vbabka@suse.cz&gt;</div><div class='ctx'> R:	Roman Gushchin &lt;roman.gushchin@linux.dev&gt;</div><div class='hunk'>@@ -22480,7 +22880,7 @@ M:	Dave Stevenson &lt;dave.stevenson@raspberrypi.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/imx219.yaml</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/sony,imx219.yaml</div><div class='ctx'> F:	drivers/media/i2c/imx219.c</div><div class='ctx'> </div><div class='ctx'> SONY IMX258 SENSOR DRIVER</div><div class='hunk'>@@ -22540,8 +22940,9 @@ F:	Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml</div><div class='ctx'> F:	drivers/media/i2c/imx334.c</div><div class='ctx'> </div><div class='ctx'> SONY IMX335 SENSOR DRIVER</div><div class='add'>+M:	Kieran Bingham &lt;kieran.bingham@ideasonboard.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='del'>-S:	Orphan</div><div class='add'>+S:	Maintained</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml</div><div class='ctx'> F:	drivers/media/i2c/imx335.c</div><div class='hunk'>@@ -22561,7 +22962,7 @@ F:	Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml</div><div class='ctx'> F:	drivers/media/i2c/imx412.c</div><div class='ctx'> </div><div class='ctx'> SONY IMX415 SENSOR DRIVER</div><div class='del'>-M:	Michael Riesch &lt;michael.riesch@wolfvision.net&gt;</div><div class='add'>+M:	Michael Riesch &lt;michael.riesch@collabora.com&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> T:	git git://linuxtv.org/media.git</div><div class='hunk'>@@ -22586,7 +22987,6 @@ W:	http://www.linux.it/~malattia/wiki/index.php/Sony_drivers</div><div class='ctx'> F:	Documentation/admin-guide/laptops/sony-laptop.rst</div><div class='ctx'> F:	drivers/char/sonypi.c</div><div class='ctx'> F:	drivers/platform/x86/sony-laptop.c</div><div class='del'>-F:	include/linux/sony-laptop.h</div><div class='ctx'> </div><div class='ctx'> SOPHGO DEVICETREES and DRIVERS</div><div class='ctx'> M:	Chen Wang &lt;unicorn_wang@outlook.com&gt;</div><div class='hunk'>@@ -22653,9 +23053,15 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/</div><div class='ctx'> F:	Documentation/sound/soc/</div><div class='ctx'> F:	include/dt-bindings/sound/</div><div class='add'>+F:	include/sound/cs*</div><div class='add'>+X:	include/sound/cs4231-regs.h</div><div class='add'>+X:	include/sound/cs8403.h</div><div class='add'>+X:	include/sound/cs8427.h</div><div class='add'>+F:	include/sound/madera-pdata.h</div><div class='ctx'> F:	include/sound/soc*</div><div class='ctx'> F:	include/sound/sof.h</div><div class='ctx'> F:	include/sound/sof/</div><div class='add'>+F:	include/sound/wm*.h</div><div class='ctx'> F:	include/trace/events/sof*.h</div><div class='ctx'> F:	include/uapi/sound/asoc.h</div><div class='ctx'> F:	sound/soc/</div><div class='hunk'>@@ -22766,7 +23172,6 @@ F:	drivers/accessibility/speakup/</div><div class='ctx'> </div><div class='ctx'> SPEAR PLATFORM/CLOCK/PINCTRL SUPPORT</div><div class='ctx'> M:	Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='del'>-M:	Shiraz Hashim &lt;shiraz.linux.kernel@gmail.com&gt;</div><div class='ctx'> L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)</div><div class='ctx'> L:	soc@lists.linux.dev</div><div class='ctx'> S:	Maintained</div><div class='hunk'>@@ -22893,6 +23298,22 @@ S:	Maintained</div><div class='ctx'> F:	Documentation/hwmon/stpddc60.rst</div><div class='ctx'> F:	drivers/hwmon/pmbus/stpddc60.c</div><div class='ctx'> </div><div class='add'>+ST VD55G1 DRIVER</div><div class='add'>+M:	Benjamin Mugnier &lt;benjamin.mugnier@foss.st.com&gt;</div><div class='add'>+M:	Sylvain Petinot &lt;sylvain.petinot@foss.st.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml</div><div class='add'>+F:	drivers/media/i2c/vd55g1.c</div><div class='add'>+</div><div class='add'>+ST VD56G3 IMAGE SENSOR DRIVER</div><div class='add'>+M:	Benjamin Mugnier &lt;benjamin.mugnier@foss.st.com&gt;</div><div class='add'>+M:	Sylvain Petinot &lt;sylvain.petinot@foss.st.com&gt;</div><div class='add'>+L:	linux-media@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/st,vd56g3.yaml</div><div class='add'>+F:	drivers/media/i2c/vd56g3.c</div><div class='add'>+</div><div class='ctx'> ST VGXY61 DRIVER</div><div class='ctx'> M:	Benjamin Mugnier &lt;benjamin.mugnier@foss.st.com&gt;</div><div class='ctx'> M:	Sylvain Petinot &lt;sylvain.petinot@foss.st.com&gt;</div><div class='hunk'>@@ -23612,6 +24033,7 @@ L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> W:	https://linuxtv.org</div><div class='ctx'> Q:	http://patchwork.linuxtv.org/project/linux-media/list/</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt</div><div class='ctx'> F:	drivers/media/i2c/tda1997x.*</div><div class='ctx'> </div><div class='ctx'> TDA827x MEDIA DRIVER</div><div class='hunk'>@@ -23879,7 +24301,6 @@ F:	Documentation/devicetree/bindings/sound/ti,tlv320*.yaml</div><div class='ctx'> F:	Documentation/devicetree/bindings/sound/ti,tlv320adcx140.yaml</div><div class='ctx'> F:	include/sound/tas2*.h</div><div class='ctx'> F:	include/sound/tlv320*.h</div><div class='del'>-F:	include/sound/tpa6130a2-plat.h</div><div class='ctx'> F:	sound/pci/hda/tas2781_hda_i2c.c</div><div class='ctx'> F:	sound/soc/codecs/pcm1681.c</div><div class='ctx'> F:	sound/soc/codecs/pcm1789*.*</div><div class='hunk'>@@ -24405,6 +24826,13 @@ L:	platform-driver-x86@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	drivers/platform/x86/topstar-laptop.c</div><div class='ctx'> </div><div class='add'>+TORADEX EMBEDDED CONTROLLER DRIVER</div><div class='add'>+M:	Emanuele Ghidoli &lt;ghidoliemanuele@gmail.com&gt;</div><div class='add'>+M:	Francesco Dolcini &lt;francesco@dolcini.it&gt;</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/devicetree/bindings/power/reset/toradex,smarc-ec.yaml</div><div class='add'>+F:	drivers/power/reset/tdx-ec-poweroff.c</div><div class='add'>+</div><div class='ctx'> TORTURE-TEST MODULES</div><div class='ctx'> M:	Davidlohr Bueso &lt;dave@stgolabs.net&gt;</div><div class='ctx'> M:	"Paul E. McKenney" &lt;paulmck@kernel.org&gt;</div><div class='hunk'>@@ -24449,7 +24877,7 @@ TOSHIBA TC358743 DRIVER</div><div class='ctx'> M:	Hans Verkuil &lt;hverkuil-cisco@xs4all.nl&gt;</div><div class='ctx'> L:	linux-media@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	Documentation/devicetree/bindings/media/i2c/tc358743.txt</div><div class='add'>+F:	Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt</div><div class='ctx'> F:	drivers/media/i2c/tc358743*</div><div class='ctx'> F:	include/media/i2c/tc358743.h</div><div class='ctx'> </div><div class='hunk'>@@ -24552,13 +24980,15 @@ M:	David Lechner &lt;dlechner@baylibre.com&gt;</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	Documentation/devicetree/bindings/trigger-source/pwm-trigger.yaml</div><div class='ctx'> </div><div class='del'>-TRUSTED SECURITY MODULE (TSM) ATTESTATION REPORTS</div><div class='add'>+TRUSTED SECURITY MODULE (TSM) INFRASTRUCTURE</div><div class='ctx'> M:	Dan Williams &lt;dan.j.williams@intel.com&gt;</div><div class='ctx'> L:	linux-coco@lists.linux.dev</div><div class='ctx'> S:	Maintained</div><div class='del'>-F:	Documentation/ABI/testing/configfs-tsm</div><div class='del'>-F:	drivers/virt/coco/tsm.c</div><div class='del'>-F:	include/linux/tsm.h</div><div class='add'>+F:	Documentation/ABI/testing/configfs-tsm-report</div><div class='add'>+F:	Documentation/driver-api/coco/</div><div class='add'>+F:	drivers/virt/coco/guest/</div><div class='add'>+F:	include/linux/tsm*.h</div><div class='add'>+F:	samples/tsm-mr/</div><div class='ctx'> </div><div class='ctx'> TRUSTED SERVICES TEE DRIVER</div><div class='ctx'> M:	Balint Dobszay &lt;balint.dobszay@arm.com&gt;</div><div class='hunk'>@@ -24631,6 +25061,12 @@ T:	git git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux.git turbostat</div><div class='ctx'> F:	tools/power/x86/turbostat/</div><div class='ctx'> F:	tools/testing/selftests/turbostat/</div><div class='ctx'> </div><div class='add'>+TUXEDO DRIVERS</div><div class='add'>+M:	Werner Sembach &lt;wse@tuxedocomputers.com&gt;</div><div class='add'>+L:	platform-driver-x86@vger.kernel.org</div><div class='add'>+S:	Supported</div><div class='add'>+F:	drivers/platform/x86/tuxedo/</div><div class='add'>+</div><div class='ctx'> TW5864 VIDEO4LINUX DRIVER</div><div class='ctx'> M:	Bluecherry Maintainers &lt;maintainers@bluecherrydvr.com&gt;</div><div class='ctx'> M:	Andrey Utkin &lt;andrey.utkin@corp.bluecherry.net&gt;</div><div class='hunk'>@@ -25125,9 +25561,13 @@ S:	Maintained</div><div class='ctx'> F:	drivers/usb/typec/mux/pi3usb30532.c</div><div class='ctx'> </div><div class='ctx'> USB TYPEC PORT CONTROLLER DRIVERS</div><div class='add'>+M:	Badhri Jagan Sridharan &lt;badhri@google.com&gt;</div><div class='ctx'> L:	linux-usb@vger.kernel.org</div><div class='del'>-S:	Orphan</div><div class='del'>-F:	drivers/usb/typec/tcpm/</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/usb/typec/tcpm/tcpci.c</div><div class='add'>+F:	drivers/usb/typec/tcpm/tcpm.c</div><div class='add'>+F:	include/linux/usb/tcpci.h</div><div class='add'>+F:	include/linux/usb/tcpm.h</div><div class='ctx'> </div><div class='ctx'> USB TYPEC TUSB1046 MUX DRIVER</div><div class='ctx'> M:	Romain Gantois &lt;romain.gantois@bootlin.com&gt;</div><div class='hunk'>@@ -25287,6 +25727,8 @@ F:	drivers/media/i2c/mt*</div><div class='ctx'> F:	drivers/media/i2c/og*</div><div class='ctx'> F:	drivers/media/i2c/ov*</div><div class='ctx'> F:	drivers/media/i2c/s5*</div><div class='add'>+F:	drivers/media/i2c/vd55g1.c</div><div class='add'>+F:	drivers/media/i2c/vd56g3.c</div><div class='ctx'> F:	drivers/media/i2c/vgxy61.c</div><div class='ctx'> </div><div class='ctx'> VF610 NAND DRIVER</div><div class='hunk'>@@ -25583,6 +26025,7 @@ F:	include/uapi/linux/virtio_gpio.h</div><div class='ctx'> VIRTIO GPU DRIVER</div><div class='ctx'> M:	David Airlie &lt;airlied@redhat.com&gt;</div><div class='ctx'> M:	Gerd Hoffmann &lt;kraxel@redhat.com&gt;</div><div class='add'>+M:	Dmitry Osipenko &lt;dmitry.osipenko@collabora.com&gt;</div><div class='ctx'> R:	Gurchetan Singh &lt;gurchetansingh@chromium.org&gt;</div><div class='ctx'> R:	Chia-I Wu &lt;olvaffe@gmail.com&gt;</div><div class='ctx'> L:	dri-devel@lists.freedesktop.org</div><div class='hunk'>@@ -25655,6 +26098,13 @@ S:	Maintained</div><div class='ctx'> F:	drivers/nvdimm/nd_virtio.c</div><div class='ctx'> F:	drivers/nvdimm/virtio_pmem.c</div><div class='ctx'> </div><div class='add'>+VIRTIO RTC DRIVER</div><div class='add'>+M:	Peter Hilber &lt;quic_philber@quicinc.com&gt;</div><div class='add'>+L:	virtualization@lists.linux.dev</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	drivers/virtio/virtio_rtc_*</div><div class='add'>+F:	include/uapi/linux/virtio_rtc.h</div><div class='add'>+</div><div class='ctx'> VIRTIO SOUND DRIVER</div><div class='ctx'> M:	Anton Yakovlev &lt;anton.yakovlev@opensynergy.com&gt;</div><div class='ctx'> M:	"Michael S. Tsirkin" &lt;mst@redhat.com&gt;</div><div class='hunk'>@@ -25740,7 +26190,7 @@ F:	tools/testing/vsock/</div><div class='ctx'> </div><div class='ctx'> VMALLOC</div><div class='ctx'> M:	Andrew Morton &lt;akpm@linux-foundation.org&gt;</div><div class='del'>-R:	Uladzislau Rezki &lt;urezki@gmail.com&gt;</div><div class='add'>+M:	Uladzislau Rezki &lt;urezki@gmail.com&gt;</div><div class='ctx'> L:	linux-mm@kvack.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> W:	http://www.linux-mm.org</div><div class='hunk'>@@ -25764,7 +26214,7 @@ F:	drivers/misc/vmw_balloon.c</div><div class='ctx'> </div><div class='ctx'> VMWARE HYPERVISOR INTERFACE</div><div class='ctx'> M:	Ajay Kaher &lt;ajay.kaher@broadcom.com&gt;</div><div class='del'>-M:	Alexey Makhalov &lt;alexey.amakhalov@broadcom.com&gt;</div><div class='add'>+M:	Alexey Makhalov &lt;alexey.makhalov@broadcom.com&gt;</div><div class='ctx'> R:	Broadcom internal kernel review list &lt;bcm-kernel-feedback-list@broadcom.com&gt;</div><div class='ctx'> L:	virtualization@lists.linux.dev</div><div class='ctx'> L:	x86@kernel.org</div><div class='hunk'>@@ -25792,7 +26242,7 @@ F:	drivers/scsi/vmw_pvscsi.h</div><div class='ctx'> VMWARE VIRTUAL PTP CLOCK DRIVER</div><div class='ctx'> M:	Nick Shi &lt;nick.shi@broadcom.com&gt;</div><div class='ctx'> R:	Ajay Kaher &lt;ajay.kaher@broadcom.com&gt;</div><div class='del'>-R:	Alexey Makhalov &lt;alexey.amakhalov@broadcom.com&gt;</div><div class='add'>+R:	Alexey Makhalov &lt;alexey.makhalov@broadcom.com&gt;</div><div class='ctx'> R:	Broadcom internal kernel review list &lt;bcm-kernel-feedback-list@broadcom.com&gt;</div><div class='ctx'> L:	netdev@vger.kernel.org</div><div class='ctx'> S:	Supported</div><div class='hunk'>@@ -26136,7 +26586,7 @@ R:	Ahmed S. Darwish &lt;darwi@linutronix.de&gt;</div><div class='ctx'> L:	x86-cpuid@lists.linux.dev</div><div class='ctx'> S:	Maintained</div><div class='ctx'> W:	https://x86-cpuid.org</div><div class='del'>-F:	tools/arch/x86/kcpuid/cpuid.csv</div><div class='add'>+F:	tools/arch/x86/kcpuid/</div><div class='ctx'> </div><div class='ctx'> X86 ENTRY CODE</div><div class='ctx'> M:	Andy Lutomirski &lt;luto@kernel.org&gt;</div><div class='hunk'>@@ -26224,6 +26674,7 @@ L:	x86@kernel.org</div><div class='ctx'> L:	linux-coco@lists.linux.dev</div><div class='ctx'> S:	Supported</div><div class='ctx'> T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/tdx</div><div class='add'>+F:	Documentation/ABI/testing/sysfs-devices-virtual-misc-tdx_guest</div><div class='ctx'> F:	arch/x86/boot/compressed/tdx*</div><div class='ctx'> F:	arch/x86/coco/tdx/</div><div class='ctx'> F:	arch/x86/include/asm/shared/tdx.h</div><div class='hunk'>@@ -26664,6 +27115,14 @@ L:	linux-kernel@vger.kernel.org</div><div class='ctx'> S:	Maintained</div><div class='ctx'> F:	arch/x86/kernel/cpu/zhaoxin.c</div><div class='ctx'> </div><div class='add'>+ZONED LOOP DEVICE</div><div class='add'>+M:	Damien Le Moal &lt;dlemoal@kernel.org&gt;</div><div class='add'>+R:	Christoph Hellwig &lt;hch@lst.de&gt;</div><div class='add'>+L:	linux-block@vger.kernel.org</div><div class='add'>+S:	Maintained</div><div class='add'>+F:	Documentation/admin-guide/blockdev/zoned_loop.rst</div><div class='add'>+F:	drivers/block/zloop.c</div><div class='add'>+</div><div class='ctx'> ZONEFS FILESYSTEM</div><div class='ctx'> M:	Damien Le Moal &lt;dlemoal@kernel.org&gt;</div><div class='ctx'> M:	Naohiro Aota &lt;naohiro.aota@wdc.com&gt;</div><div class='head'>diff --git a/Makefile b/Makefile<br/>index 38689a0c3605..3244c2a519e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>Makefile</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> VERSION = 6</div><div class='ctx'> PATCHLEVEL = 15</div><div class='ctx'> SUBLEVEL = 0</div><div class='del'>-EXTRAVERSION = -rc1</div><div class='add'>+EXTRAVERSION =</div><div class='ctx'> NAME = Baby Opossum Posse</div><div class='ctx'> </div><div class='ctx'> # *DOCUMENTATION*</div><div class='hunk'>@@ -458,6 +458,11 @@ endif</div><div class='ctx'> HOSTRUSTC = rustc</div><div class='ctx'> HOSTPKG_CONFIG	= pkg-config</div><div class='ctx'> </div><div class='add'>+# the KERNELDOC macro needs to be exported, as scripts/Makefile.build</div><div class='add'>+# has a logic to call it</div><div class='add'>+KERNELDOC       = $(srctree)/scripts/kernel-doc.py</div><div class='add'>+export KERNELDOC</div><div class='add'>+</div><div class='ctx'> KBUILD_USERHOSTCFLAGS := -Wall -Wmissing-prototypes -Wstrict-prototypes \</div><div class='ctx'> 			 -O2 -fomit-frame-pointer -std=gnu11</div><div class='ctx'> KBUILD_USERCFLAGS  := $(KBUILD_USERHOSTCFLAGS) $(USERCFLAGS)</div><div class='hunk'>@@ -477,7 +482,6 @@ export rust_common_flags := --edition=2021 \</div><div class='ctx'> 			    -Wclippy::ignored_unit_patterns \</div><div class='ctx'> 			    -Wclippy::mut_mut \</div><div class='ctx'> 			    -Wclippy::needless_bitwise_bool \</div><div class='del'>-			    -Wclippy::needless_continue \</div><div class='ctx'> 			    -Aclippy::needless_lifetimes \</div><div class='ctx'> 			    -Wclippy::no_mangle_with_rust_abi \</div><div class='ctx'> 			    -Wclippy::undocumented_unsafe_blocks \</div><div class='hunk'>@@ -1053,10 +1057,6 @@ NOSTDINC_FLAGS += -nostdinc</div><div class='ctx'> # perform bounds checking.</div><div class='ctx'> KBUILD_CFLAGS += $(call cc-option, -fstrict-flex-arrays=3)</div><div class='ctx'> </div><div class='del'>-#Currently, disable -Wstringop-overflow for GCC 11, globally.</div><div class='del'>-KBUILD_CFLAGS-$(CONFIG_CC_NO_STRINGOP_OVERFLOW) += $(call cc-option, -Wno-stringop-overflow)</div><div class='del'>-KBUILD_CFLAGS-$(CONFIG_CC_STRINGOP_OVERFLOW) += $(call cc-option, -Wstringop-overflow)</div><div class='del'>-</div><div class='ctx'> # disable invalid "can't wrap" optimizations for signed / pointers</div><div class='ctx'> KBUILD_CFLAGS	+= -fno-strict-overflow</div><div class='ctx'> </div><div class='hunk'>@@ -1068,10 +1068,12 @@ ifdef CONFIG_CC_IS_GCC</div><div class='ctx'> KBUILD_CFLAGS   += -fconserve-stack</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+# Ensure compilers do not transform certain loops into calls to wcslen()</div><div class='add'>+KBUILD_CFLAGS += -fno-builtin-wcslen</div><div class='add'>+</div><div class='ctx'> # change __FILE__ to the relative path to the source directory</div><div class='ctx'> ifdef building_out_of_srctree</div><div class='del'>-KBUILD_CPPFLAGS += $(call cc-option,-ffile-prefix-map=$(srcroot)/=)</div><div class='del'>-KBUILD_RUSTFLAGS += --remap-path-prefix=$(srcroot)/=</div><div class='add'>+KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srcroot)/=)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # include additional Makefiles when needed</div><div class='head'>diff --git a/arch/Kconfig b/arch/Kconfig<br/>index b0adb665041f..a3308a220f86 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/Kconfig</a></div><div class='hunk'>@@ -1518,6 +1518,14 @@ config STRICT_MODULE_RWX</div><div class='ctx'> config ARCH_HAS_PHYS_TO_DMA</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config ARCH_HAS_CPU_RESCTRL</div><div class='add'>+	bool</div><div class='add'>+	help</div><div class='add'>+	  An architecture selects this option to indicate that the necessary</div><div class='add'>+	  hooks are provided to support the common memory system usage</div><div class='add'>+	  monitoring and control interfaces provided by the 'resctrl'</div><div class='add'>+	  filesystem (see RESCTRL_FS).</div><div class='add'>+</div><div class='ctx'> config HAVE_ARCH_COMPILER_H</div><div class='ctx'> 	bool</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/alpha/include/uapi/asm/socket.h b/arch/alpha/include/uapi/asm/socket.h<br/>index 3df5f2dd4c0f..8f1f18adcdb5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/include/uapi/asm/socket.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/alpha/include/uapi/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/alpha/include/uapi/asm/socket.h</a></div><div class='hunk'>@@ -150,6 +150,8 @@</div><div class='ctx'> </div><div class='ctx'> #define SO_RCVPRIORITY		82</div><div class='ctx'> </div><div class='add'>+#define SO_PASSRIGHTS		83</div><div class='add'>+</div><div class='ctx'> #if !defined(__KERNEL__)</div><div class='ctx'> </div><div class='ctx'> #if __BITS_PER_LONG == 64</div><div class='head'>diff --git a/arch/alpha/kernel/perf_event.c b/arch/alpha/kernel/perf_event.c<br/>index 1f0eb4f25c0f..a3eaab094ece 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/alpha/kernel/perf_event.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/alpha/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/alpha/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/alpha/kernel/perf_event.c</a></div><div class='hunk'>@@ -852,14 +852,9 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,</div><div class='ctx'> 	alpha_perf_event_update(event, hwc, idx, alpha_pmu-&gt;pmc_max_period[idx]+1);</div><div class='ctx'> 	perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> </div><div class='del'>-	if (alpha_perf_event_set_period(event, hwc, idx)) {</div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs)) {</div><div class='del'>-			/* Interrupts coming too quickly; "throttle" the</div><div class='del'>-			 * counter, i.e., disable it for a little while.</div><div class='del'>-			 */</div><div class='del'>-			alpha_pmu_stop(event, 0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (alpha_perf_event_set_period(event, hwc, idx))</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='add'>+</div><div class='ctx'> 	wrperfmon(PERFMON_CMD_ENABLE, cpuc-&gt;idx_mask);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='head'>diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c<br/>index fea29d9d18d6..809edc59af25 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/intc-arcv2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/intc-arcv2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/intc-arcv2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arc/kernel/intc-arcv2.c</a></div><div class='hunk'>@@ -170,7 +170,7 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> 	if (parent)</div><div class='ctx'> 		panic("DeviceTree incore intc not a root irq controller\n");</div><div class='ctx'> </div><div class='del'>-	root_domain = irq_domain_add_linear(intc, nr_cpu_irqs, &amp;arcv2_irq_ops, NULL);</div><div class='add'>+	root_domain = irq_domain_create_linear(of_fwnode_handle(intc), nr_cpu_irqs, &amp;arcv2_irq_ops, NULL);</div><div class='ctx'> 	if (!root_domain)</div><div class='ctx'> 		panic("root irq domain not avail\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/kernel/intc-compact.c b/arch/arc/kernel/intc-compact.c<br/>index 1d2ff1c6a61b..1b159e9e0234 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/intc-compact.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/intc-compact.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/intc-compact.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arc/kernel/intc-compact.c</a></div><div class='hunk'>@@ -112,8 +112,9 @@ init_onchip_IRQ(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> 	if (parent)</div><div class='ctx'> 		panic("DeviceTree incore intc not a root irq controller\n");</div><div class='ctx'> </div><div class='del'>-	root_domain = irq_domain_add_linear(intc, NR_CPU_IRQS,</div><div class='del'>-					    &amp;arc_intc_domain_ops, NULL);</div><div class='add'>+	root_domain = irq_domain_create_linear(of_fwnode_handle(intc),</div><div class='add'>+					       NR_CPU_IRQS,</div><div class='add'>+					       &amp;arc_intc_domain_ops, NULL);</div><div class='ctx'> 	if (!root_domain)</div><div class='ctx'> 		panic("root irq domain not avail\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c<br/>index cdd370ec9280..02b28a9324f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/mcip.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/mcip.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/mcip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arc/kernel/mcip.c</a></div><div class='hunk'>@@ -391,7 +391,8 @@ idu_of_init(struct device_node *intc, struct device_node *parent)</div><div class='ctx'> </div><div class='ctx'> 	pr_info("MCIP: IDU supports %u common irqs\n", nr_irqs);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(intc, nr_irqs, &amp;idu_irq_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(of_fwnode_handle(intc), nr_irqs,</div><div class='add'>+					  &amp;idu_irq_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* Parent interrupts (core-intc) are already mapped */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arc/kernel/perf_event.c b/arch/arc/kernel/perf_event.c<br/>index 6e5a651cd75c..ed6d4f0cd621 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arc/kernel/perf_event.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arc/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arc/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arc/kernel/perf_event.c</a></div><div class='hunk'>@@ -599,10 +599,8 @@ static irqreturn_t arc_pmu_intr(int irq, void *dev)</div><div class='ctx'> </div><div class='ctx'> 		arc_perf_event_update(event, &amp;event-&gt;hw, event-&gt;hw.idx);</div><div class='ctx'> 		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='del'>-		if (arc_pmu_event_set_period(event)) {</div><div class='del'>-			if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-				arc_pmu_stop(event, 0);</div><div class='del'>-		}</div><div class='add'>+		if (arc_pmu_event_set_period(event))</div><div class='add'>+			perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> </div><div class='ctx'> 		active_ints &amp;= ~BIT(idx);</div><div class='ctx'> 	} while (active_ints);</div><div class='head'>diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig<br/>index 25ed6f1a7c7a..3072731fe09c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/Kconfig</a></div><div class='hunk'>@@ -1380,8 +1380,7 @@ config CC_HAVE_STACKPROTECTOR_TLS</div><div class='ctx'> config STACKPROTECTOR_PER_TASK</div><div class='ctx'> 	bool "Use a unique stack canary value for each task"</div><div class='ctx'> 	depends on STACKPROTECTOR &amp;&amp; CURRENT_POINTER_IN_TPIDRURO &amp;&amp; !XIP_DEFLATED_DATA</div><div class='del'>-	depends on GCC_PLUGINS || CC_HAVE_STACKPROTECTOR_TLS</div><div class='del'>-	select GCC_PLUGIN_ARM_SSP_PER_TASK if !CC_HAVE_STACKPROTECTOR_TLS</div><div class='add'>+	depends on CC_HAVE_STACKPROTECTOR_TLS</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Due to the fact that GCC uses an ordinary symbol reference from</div><div class='head'>diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile<br/>index 945b5975fce2..d61369b1eabe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/compressed/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/compressed/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/compressed/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/boot/compressed/Makefile</a></div><div class='hunk'>@@ -96,7 +96,7 @@ KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING</div><div class='ctx'> </div><div class='ctx'> ccflags-y := -fpic $(call cc-option,-mno-single-pic-base,) -fno-builtin \</div><div class='ctx'> 	     -I$(srctree)/scripts/dtc/libfdt -fno-stack-protector \</div><div class='del'>-	     -I$(obj) $(DISABLE_ARM_SSP_PER_TASK_PLUGIN)</div><div class='add'>+	     -I$(obj)</div><div class='ctx'> ccflags-remove-$(CONFIG_FUNCTION_TRACER) += -pg</div><div class='ctx'> asflags-y := -DZIMAGE</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8.dtsi b/arch/arm/boot/dts/amlogic/meson8.dtsi<br/>index 847f7b1f1e96..f785e0de0847 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/amlogic/meson8.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/dts/amlogic/meson8.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/amlogic/meson8.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/boot/dts/amlogic/meson8.dtsi</a></div><div class='hunk'>@@ -451,7 +451,7 @@</div><div class='ctx'> 	pwm_ef: pwm@86c0 {</div><div class='ctx'> 		compatible = "amlogic,meson8-pwm-v2";</div><div class='ctx'> 		clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-			 &lt;&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+			 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='ctx'> 			 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 			 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 		reg = &lt;0x86c0 0x10&gt;;</div><div class='hunk'>@@ -705,7 +705,7 @@</div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	compatible = "amlogic,meson8-pwm-v2";</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -713,7 +713,7 @@</div><div class='ctx'> &amp;pwm_cd {</div><div class='ctx'> 	compatible = "amlogic,meson8-pwm-v2";</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/amlogic/meson8b.dtsi b/arch/arm/boot/dts/amlogic/meson8b.dtsi<br/>index 0876611ce26a..fdb0abe23a0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/amlogic/meson8b.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/dts/amlogic/meson8b.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/amlogic/meson8b.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/boot/dts/amlogic/meson8b.dtsi</a></div><div class='hunk'>@@ -406,7 +406,7 @@</div><div class='ctx'> 		compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 		reg = &lt;0x86c0 0x10&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-			 &lt;&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+			 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='ctx'> 			 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 			 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 		#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -680,7 +680,7 @@</div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -688,7 +688,7 @@</div><div class='ctx'> &amp;pwm_cd {</div><div class='ctx'> 	compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "Video PLL" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi<br/>index f2386dcb9ff2..dda4fa91b2f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi</a></div><div class='hunk'>@@ -40,6 +40,9 @@</div><div class='ctx'> 			reg = &lt;1&gt;;</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='ctx'> 			interrupts = &lt;16 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+			micrel,led-mode = &lt;1&gt;;</div><div class='add'>+			clocks = &lt;&amp;clks IMX6UL_CLK_ENET_REF&gt;;</div><div class='add'>+			clock-names = "rmii-ref";</div><div class='ctx'> 			status = "okay";</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c<br/>index 9846f30990f7..02eda44a6faa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/common/sa1111.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/common/sa1111.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/common/sa1111.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/common/sa1111.c</a></div><div class='hunk'>@@ -416,9 +416,9 @@ static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)</div><div class='ctx'> 	writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0);</div><div class='ctx'> 	writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1);</div><div class='ctx'> </div><div class='del'>-	sachip-&gt;irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR,</div><div class='del'>-						  &amp;sa1111_irqdomain_ops,</div><div class='del'>-						  sachip);</div><div class='add'>+	sachip-&gt;irqdomain = irq_domain_create_linear(NULL, SA1111_IRQ_NR,</div><div class='add'>+						     &amp;sa1111_irqdomain_ops,</div><div class='add'>+						     sachip);</div><div class='ctx'> 	if (!sachip-&gt;irqdomain) {</div><div class='ctx'> 		irq_free_descs(sachip-&gt;irq_base, SA1111_IRQ_NR);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig<br/>index f2596a1b2f7d..ff13e1ecf4bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/at91_dt_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/at91_dt_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/at91_dt_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/at91_dt_defconfig</a></div><div class='hunk'>@@ -232,7 +232,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_AES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_TDES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_SHA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_ACORN_8x8=y</div><div class='head'>diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig<br/>index 42cb1c854118..578c6a4af620 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/collie_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/collie_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/collie_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/collie_defconfig</a></div><div class='hunk'>@@ -78,7 +78,6 @@ CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_NLS_DEFAULT="cp437"</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_MINI_4x6=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='head'>diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig<br/>index 3474e475373a..70b8c78386f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/davinci_all_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/davinci_all_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/davinci_all_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/davinci_all_defconfig</a></div><div class='hunk'>@@ -249,7 +249,6 @@ CONFIG_NLS_ASCII=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_DEBUG_RT_MUTEXES=y</div><div class='head'>diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig<br/>index b382a2e175fb..d76eb12d29a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/dove_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/dove_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/dove_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/dove_defconfig</a></div><div class='hunk'>@@ -128,7 +128,6 @@ CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig<br/>index 7ad48fdda1da..e81964cce516 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/exynos_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/exynos_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/exynos_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/exynos_defconfig</a></div><div class='hunk'>@@ -349,7 +349,7 @@ CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='hunk'>@@ -364,13 +364,11 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_EXYNOS_RNG=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_S5P=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=96</div><div class='ctx'> CONFIG_FONTS=y</div><div class='head'>diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig<br/>index 297c6a7b978a..062c1eb8dd60 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/imx_v6_v7_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/imx_v6_v7_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/imx_v6_v7_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/imx_v6_v7_defconfig</a></div><div class='hunk'>@@ -481,8 +481,6 @@ CONFIG_SECURITYFS=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_FSL_CAAM=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_SAHARA=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_MXS_DCP=y</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=64</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='head'>diff --git a/arch/arm/configs/lpc18xx_defconfig b/arch/arm/configs/lpc18xx_defconfig<br/>index 2aa2ac8c6507..2d489186e945 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/lpc18xx_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/lpc18xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/lpc18xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/lpc18xx_defconfig</a></div><div class='hunk'>@@ -147,7 +147,6 @@ CONFIG_EXT2_FS=y</div><div class='ctx'> # CONFIG_INOTIFY_USER is not set</div><div class='ctx'> CONFIG_JFFS2_FS=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='head'>diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig<br/>index 98e267213b21..9afccd76446b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/lpc32xx_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/lpc32xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/lpc32xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/lpc32xx_defconfig</a></div><div class='hunk'>@@ -179,7 +179,6 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DYNAMIC_DEBUG=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/milbeaut_m10v_defconfig b/arch/arm/configs/milbeaut_m10v_defconfig<br/>index acd16204f8d7..242e7d5a3f68 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/milbeaut_m10v_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/milbeaut_m10v_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/milbeaut_m10v_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/milbeaut_m10v_defconfig</a></div><div class='hunk'>@@ -93,23 +93,19 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_KEYS=y</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='del'>-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set</div><div class='add'>+CONFIG_CRYPTO_SELFTESTS=y</div><div class='ctx'> # CONFIG_CRYPTO_ECHAINIV is not set</div><div class='ctx'> CONFIG_CRYPTO_AES=y</div><div class='ctx'> CONFIG_CRYPTO_SEQIV=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM_CE=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA2_ARM_CE=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_CE=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=64</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='head'>diff --git a/arch/arm/configs/mmp2_defconfig b/arch/arm/configs/mmp2_defconfig<br/>index f6f9e135353e..842a989baa27 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/mmp2_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/mmp2_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/mmp2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/mmp2_defconfig</a></div><div class='hunk'>@@ -67,7 +67,6 @@ CONFIG_NFS_V3=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/multi_v4t_defconfig b/arch/arm/configs/multi_v4t_defconfig<br/>index 27d650635d9b..1a86dc305523 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/multi_v4t_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/multi_v4t_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/multi_v4t_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/multi_v4t_defconfig</a></div><div class='hunk'>@@ -91,6 +91,5 @@ CONFIG_MSDOS_FS=y</div><div class='ctx'> CONFIG_VFAT_FS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_MINIX_FS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='ctx'> CONFIG_DEBUG_USER=y</div><div class='head'>diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig<br/>index db81862bdb93..cf6180b4296e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/multi_v5_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/multi_v5_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/multi_v5_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/multi_v5_defconfig</a></div><div class='hunk'>@@ -289,7 +289,6 @@ CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig<br/>index ad037c175fdb..aca01ad6aafc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/multi_v7_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/multi_v7_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/multi_v7_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/multi_v7_defconfig</a></div><div class='hunk'>@@ -1121,25 +1121,6 @@ CONFIG_QCOM_SMSM=y</div><div class='ctx'> CONFIG_QCOM_SOCINFO=m</div><div class='ctx'> CONFIG_QCOM_STATS=m</div><div class='ctx'> CONFIG_QCOM_WCNSS_CTRL=m</div><div class='del'>-CONFIG_ARCH_EMEV2=y</div><div class='del'>-CONFIG_ARCH_R8A7794=y</div><div class='del'>-CONFIG_ARCH_R8A7779=y</div><div class='del'>-CONFIG_ARCH_R8A7790=y</div><div class='del'>-CONFIG_ARCH_R8A7778=y</div><div class='del'>-CONFIG_ARCH_R8A7793=y</div><div class='del'>-CONFIG_ARCH_R8A7791=y</div><div class='del'>-CONFIG_ARCH_R8A7792=y</div><div class='del'>-CONFIG_ARCH_R8A7740=y</div><div class='del'>-CONFIG_ARCH_R8A73A4=y</div><div class='del'>-CONFIG_ARCH_R7S72100=y</div><div class='del'>-CONFIG_ARCH_R7S9210=y</div><div class='del'>-CONFIG_ARCH_R8A77470=y</div><div class='del'>-CONFIG_ARCH_R8A7745=y</div><div class='del'>-CONFIG_ARCH_R8A7742=y</div><div class='del'>-CONFIG_ARCH_R8A7743=y</div><div class='del'>-CONFIG_ARCH_R8A7744=y</div><div class='del'>-CONFIG_ARCH_R9A06G032=y</div><div class='del'>-CONFIG_ARCH_SH73A0=y</div><div class='ctx'> CONFIG_ROCKCHIP_IODOMAIN=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_2x_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_3x_SOC=y</div><div class='hunk'>@@ -1203,7 +1184,7 @@ CONFIG_PWM_BCM2835=y</div><div class='ctx'> CONFIG_PWM_BRCMSTB=m</div><div class='ctx'> CONFIG_PWM_FSL_FTM=m</div><div class='ctx'> CONFIG_PWM_MESON=m</div><div class='del'>-CONFIG_PWM_RCAR=m</div><div class='add'>+CONFIG_PWM_RENESAS_RCAR=m</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=y</div><div class='ctx'> CONFIG_PWM_ROCKCHIP=m</div><div class='ctx'> CONFIG_PWM_SAMSUNG=m</div><div class='hunk'>@@ -1301,7 +1282,6 @@ CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM_CE=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM_CE=m</div><div class='del'>-CONFIG_CRYPTO_SHA2_ARM_CE=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='head'>diff --git a/arch/arm/configs/mvebu_v5_defconfig b/arch/arm/configs/mvebu_v5_defconfig<br/>index a518d4a2581e..23dbb80fcc2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/mvebu_v5_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/mvebu_v5_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/mvebu_v5_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/mvebu_v5_defconfig</a></div><div class='hunk'>@@ -187,7 +187,6 @@ CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig<br/>index d8a6e43c401e..c76d66135abb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/mxs_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/mxs_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/mxs_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/mxs_defconfig</a></div><div class='hunk'>@@ -160,7 +160,6 @@ CONFIG_NLS_CODEPAGE_850=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_MXS_DCP=y</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='head'>diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig<br/>index 113d6dfe5243..317f977e509e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/omap2plus_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/omap2plus_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/omap2plus_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/omap2plus_defconfig</a></div><div class='hunk'>@@ -697,7 +697,6 @@ CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=y</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM_CE=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM_NEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM_BS=m</div><div class='hunk'>@@ -706,9 +705,6 @@ CONFIG_CRYPTO_DEV_OMAP=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_OMAP_SHAM=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_OMAP_AES=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_OMAP_DES=m</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='head'>diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig<br/>index 0629b088a584..62b9c6102789 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/orion5x_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/orion5x_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/orion5x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/orion5x_defconfig</a></div><div class='hunk'>@@ -136,7 +136,6 @@ CONFIG_CRYPTO_CBC=m</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_MARVELL_CESA=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig<br/>index ce10fe2104bf..4748c7d33cb8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/pxa168_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/pxa168_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/pxa168_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/pxa168_defconfig</a></div><div class='hunk'>@@ -41,7 +41,6 @@ CONFIG_NFS_V3=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/pxa910_defconfig b/arch/arm/configs/pxa910_defconfig<br/>index 1f28aea86014..49b59c600ae1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/pxa910_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/pxa910_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/pxa910_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/pxa910_defconfig</a></div><div class='hunk'>@@ -50,7 +50,6 @@ CONFIG_NFS_V3=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/pxa_defconfig b/arch/arm/configs/pxa_defconfig<br/>index de0ac8f521d7..ded4b9a5accf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/pxa_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/pxa_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/pxa_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/pxa_defconfig</a></div><div class='hunk'>@@ -636,10 +636,9 @@ CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_TIMER_STATS=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='ctx'> CONFIG_CRYPTO_AUTHENC=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='hunk'>@@ -660,11 +659,8 @@ CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_ARM=m</div><div class='ctx'> CONFIG_CRYPTO_AES_ARM=m</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_8x16=y</div><div class='head'>diff --git a/arch/arm/configs/s5pv210_defconfig b/arch/arm/configs/s5pv210_defconfig<br/>index 5dbe85c263de..02121eec3658 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/s5pv210_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/s5pv210_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/s5pv210_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/s5pv210_defconfig</a></div><div class='hunk'>@@ -113,7 +113,6 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/configs/sama7_defconfig b/arch/arm/configs/sama7_defconfig<br/>index ea7ddf640ba7..e14720a9a5ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/sama7_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/sama7_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/sama7_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/sama7_defconfig</a></div><div class='hunk'>@@ -227,8 +227,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_AES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_TDES=y</div><div class='ctx'> CONFIG_CRYPTO_DEV_ATMEL_SHA=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=32</div><div class='ctx'> CONFIG_CMA_ALIGNMENT=9</div><div class='head'>diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig<br/>index 8c30ed14e52c..7c3d6a8f0038 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/shmobile_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/shmobile_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/shmobile_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/shmobile_defconfig</a></div><div class='hunk'>@@ -63,6 +63,7 @@ CONFIG_SMSC_PHY=y</div><div class='ctx'> CONFIG_CAN_RCAR=y</div><div class='ctx'> CONFIG_INPUT_EVDEV=y</div><div class='ctx'> CONFIG_KEYBOARD_GPIO=y</div><div class='add'>+CONFIG_KEYBOARD_GPIO_POLLED=y</div><div class='ctx'> # CONFIG_INPUT_MOUSE is not set</div><div class='ctx'> CONFIG_INPUT_TOUCHSCREEN=y</div><div class='ctx'> CONFIG_TOUCHSCREEN_EDT_FT5X06=y</div><div class='hunk'>@@ -84,6 +85,7 @@ CONFIG_SERIAL_8250_EM=y</div><div class='ctx'> CONFIG_SERIAL_SH_SCI=y</div><div class='ctx'> CONFIG_I2C_CHARDEV=y</div><div class='ctx'> CONFIG_I2C_DEMUX_PINCTRL=y</div><div class='add'>+CONFIG_I2C_DESIGNWARE_CORE=y</div><div class='ctx'> CONFIG_I2C_EMEV2=y</div><div class='ctx'> CONFIG_I2C_GPIO=y</div><div class='ctx'> CONFIG_I2C_RIIC=y</div><div class='hunk'>@@ -104,7 +106,7 @@ CONFIG_GPIO_PCF857X=y</div><div class='ctx'> CONFIG_POWER_RESET=y</div><div class='ctx'> CONFIG_POWER_RESET_RMOBILE=y</div><div class='ctx'> CONFIG_POWER_SUPPLY=y</div><div class='del'>-# CONFIG_HWMON is not set</div><div class='add'>+CONFIG_SENSORS_LM75=y</div><div class='ctx'> CONFIG_THERMAL=y</div><div class='ctx'> CONFIG_CPU_THERMAL=y</div><div class='ctx'> CONFIG_RCAR_THERMAL=y</div><div class='hunk'>@@ -174,6 +176,9 @@ CONFIG_USB_RENESAS_USBHS_UDC=y</div><div class='ctx'> CONFIG_USB_RENESAS_USBF=y</div><div class='ctx'> CONFIG_USB_ETH=y</div><div class='ctx'> CONFIG_MMC=y</div><div class='add'>+CONFIG_MMC_SDHCI=y</div><div class='add'>+CONFIG_MMC_SDHCI_PLTFM=y</div><div class='add'>+CONFIG_MMC_SDHCI_OF_ARASAN=y</div><div class='ctx'> CONFIG_MMC_SDHI=y</div><div class='ctx'> CONFIG_MMC_SH_MMCIF=y</div><div class='ctx'> CONFIG_NEW_LEDS=y</div><div class='hunk'>@@ -195,29 +200,10 @@ CONFIG_RCAR_DMAC=y</div><div class='ctx'> CONFIG_RENESAS_USB_DMAC=y</div><div class='ctx'> CONFIG_RZ_DMAC=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='del'>-CONFIG_ARCH_EMEV2=y</div><div class='del'>-CONFIG_ARCH_R8A7794=y</div><div class='del'>-CONFIG_ARCH_R8A7779=y</div><div class='del'>-CONFIG_ARCH_R8A7790=y</div><div class='del'>-CONFIG_ARCH_R8A7778=y</div><div class='del'>-CONFIG_ARCH_R8A7793=y</div><div class='del'>-CONFIG_ARCH_R8A7791=y</div><div class='del'>-CONFIG_ARCH_R8A7792=y</div><div class='del'>-CONFIG_ARCH_R8A7740=y</div><div class='del'>-CONFIG_ARCH_R8A73A4=y</div><div class='del'>-CONFIG_ARCH_R7S72100=y</div><div class='del'>-CONFIG_ARCH_R7S9210=y</div><div class='del'>-CONFIG_ARCH_R8A77470=y</div><div class='del'>-CONFIG_ARCH_R8A7745=y</div><div class='del'>-CONFIG_ARCH_R8A7742=y</div><div class='del'>-CONFIG_ARCH_R8A7743=y</div><div class='del'>-CONFIG_ARCH_R8A7744=y</div><div class='del'>-CONFIG_ARCH_R9A06G032=y</div><div class='del'>-CONFIG_ARCH_SH73A0=y</div><div class='ctx'> CONFIG_IIO=y</div><div class='ctx'> CONFIG_AK8975=y</div><div class='ctx'> CONFIG_PWM=y</div><div class='del'>-CONFIG_PWM_RCAR=y</div><div class='add'>+CONFIG_PWM_RENESAS_RCAR=y</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=y</div><div class='ctx'> CONFIG_PHY_RCAR_GEN2=y</div><div class='ctx'> CONFIG_PHY_RCAR_GEN3_USB2=y</div><div class='head'>diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig<br/>index ac5b7a5aaff6..ac2a0f998c73 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/spitz_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/spitz_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/spitz_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/spitz_defconfig</a></div><div class='hunk'>@@ -215,7 +215,7 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_CRYPTO_NULL=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_SHA256=m</div><div class='ctx'> CONFIG_CRYPTO_AES=m</div><div class='hunk'>@@ -234,7 +234,6 @@ CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_8x16=y</div><div class='head'>diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig<br/>index 423bb41c4225..dcd9c316072e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/stm32_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/stm32_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/stm32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/stm32_defconfig</a></div><div class='hunk'>@@ -74,7 +74,6 @@ CONFIG_EXT3_FS=y</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> # CONFIG_INOTIFY_USER is not set</div><div class='ctx'> CONFIG_NLS=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/arm/configs/wpcm450_defconfig b/arch/arm/configs/wpcm450_defconfig<br/>index 5e4397f7f828..cd4b3e70ff68 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/configs/wpcm450_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/configs/wpcm450_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/configs/wpcm450_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/configs/wpcm450_defconfig</a></div><div class='hunk'>@@ -191,8 +191,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y</div><div class='ctx'> CONFIG_X509_CERTIFICATE_PARSER=y</div><div class='ctx'> CONFIG_PKCS7_MESSAGE_PARSER=y</div><div class='ctx'> CONFIG_SYSTEM_TRUSTED_KEYRING=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/arm/crypto/Kconfig b/arch/arm/crypto/Kconfig<br/>index 23e4ea067ddb..7efb9a8596e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/Kconfig</a></div><div class='hunk'>@@ -46,30 +46,6 @@ config CRYPTO_NHPOLY1305_NEON</div><div class='ctx'> 	  Architecture: arm using:</div><div class='ctx'> 	  - NEON (Advanced SIMD) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_POLY1305_ARM</div><div class='del'>-	tristate</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='del'>-	default CRYPTO_LIB_POLY1305_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm optionally using</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_BLAKE2S_ARM</div><div class='del'>-	bool "Hash functions: BLAKE2s"</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_BLAKE2S</div><div class='del'>-	help</div><div class='del'>-	  BLAKE2s cryptographic hash function (RFC 7693)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm</div><div class='del'>-</div><div class='del'>-	  This is faster than the generic implementations of BLAKE2s and</div><div class='del'>-	  BLAKE2b, but slower than the NEON implementation of BLAKE2b.</div><div class='del'>-	  There is no NEON implementation of BLAKE2s, since NEON doesn't</div><div class='del'>-	  really help with it.</div><div class='del'>-</div><div class='ctx'> config CRYPTO_BLAKE2B_NEON</div><div class='ctx'> 	tristate "Hash functions: BLAKE2b (NEON)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='hunk'>@@ -117,27 +93,6 @@ config CRYPTO_SHA1_ARM_CE</div><div class='ctx'> </div><div class='ctx'> 	  Architecture: arm using ARMv8 Crypto Extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA2_ARM_CE</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_SHA256_ARM</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using</div><div class='del'>-	  - ARMv8 Crypto Extensions</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA256_ARM</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (NEON)"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	depends on !CPU_V7M</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA512_ARM</div><div class='ctx'> 	tristate "Hash functions: SHA-384 and SHA-512 (NEON)"</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='hunk'>@@ -172,7 +127,6 @@ config CRYPTO_AES_ARM_BS</div><div class='ctx'> 	select CRYPTO_AES_ARM</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: AES cipher algorithms (FIPS-197)</div><div class='ctx'> 	  with block cipher modes:</div><div class='hunk'>@@ -200,7 +154,6 @@ config CRYPTO_AES_ARM_CE</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: AES cipher algorithms (FIPS-197)</div><div class='ctx'> 	   with block cipher modes:</div><div class='hunk'>@@ -214,17 +167,5 @@ config CRYPTO_AES_ARM_CE</div><div class='ctx'> 	  Architecture: arm using:</div><div class='ctx'> 	  - ARMv8 Crypto Extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA20_NEON</div><div class='del'>-	tristate</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	default CRYPTO_LIB_CHACHA_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: arm using:</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/crypto/Makefile b/arch/arm/crypto/Makefile<br/>index 3d0e23ff9e74..8479137c6e80 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/Makefile</a></div><div class='hunk'>@@ -7,37 +7,25 @@ obj-$(CONFIG_CRYPTO_AES_ARM) += aes-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM_BS) += aes-arm-bs.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_ARM) += sha1-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sha1-arm-neon.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_BLAKE2S_ARM) += libblake2s-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_BLAKE2B_NEON) += blake2b-neon.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_ARM) += poly1305-arm.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CURVE25519_NEON) += curve25519-neon.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA2_ARM_CE) += sha2-arm-ce.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH_ARM_CE) += ghash-arm-ce.o</div><div class='ctx'> </div><div class='ctx'> aes-arm-y	:= aes-cipher-core.o aes-cipher-glue.o</div><div class='ctx'> aes-arm-bs-y	:= aes-neonbs-core.o aes-neonbs-glue.o</div><div class='ctx'> sha1-arm-y	:= sha1-armv4-large.o sha1_glue.o</div><div class='ctx'> sha1-arm-neon-y	:= sha1-armv7-neon.o sha1_neon_glue.o</div><div class='del'>-sha256-arm-neon-$(CONFIG_KERNEL_MODE_NEON) := sha256_neon_glue.o</div><div class='del'>-sha256-arm-y	:= sha256-core.o sha256_glue.o $(sha256-arm-neon-y)</div><div class='ctx'> sha512-arm-neon-$(CONFIG_KERNEL_MODE_NEON) := sha512-neon-glue.o</div><div class='ctx'> sha512-arm-y	:= sha512-core.o sha512-glue.o $(sha512-arm-neon-y)</div><div class='del'>-libblake2s-arm-y:= blake2s-core.o blake2s-glue.o</div><div class='ctx'> blake2b-neon-y  := blake2b-neon-core.o blake2b-neon-glue.o</div><div class='ctx'> sha1-arm-ce-y	:= sha1-ce-core.o sha1-ce-glue.o</div><div class='del'>-sha2-arm-ce-y	:= sha2-ce-core.o sha2-ce-glue.o</div><div class='ctx'> aes-arm-ce-y	:= aes-ce-core.o aes-ce-glue.o</div><div class='ctx'> ghash-arm-ce-y	:= ghash-ce-core.o ghash-ce-glue.o</div><div class='del'>-chacha-neon-y := chacha-scalar-core.o chacha-glue.o</div><div class='del'>-chacha-neon-$(CONFIG_KERNEL_MODE_NEON) += chacha-neon-core.o</div><div class='del'>-poly1305-arm-y := poly1305-core.o poly1305-glue.o</div><div class='ctx'> nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o</div><div class='ctx'> curve25519-neon-y := curve25519-core.o curve25519-glue.o</div><div class='ctx'> </div><div class='hunk'>@@ -47,14 +35,8 @@ quiet_cmd_perl = PERL    $@</div><div class='ctx'> $(obj)/%-core.S: $(src)/%-armv4.pl</div><div class='ctx'> 	$(call cmd,perl)</div><div class='ctx'> </div><div class='del'>-clean-files += poly1305-core.S sha256-core.S sha512-core.S</div><div class='add'>+clean-files += sha512-core.S</div><div class='ctx'> </div><div class='ctx'> aflags-thumb2-$(CONFIG_THUMB2_KERNEL)  := -U__thumb2__ -D__thumb2__=1</div><div class='ctx'> </div><div class='del'>-AFLAGS_sha256-core.o += $(aflags-thumb2-y)</div><div class='ctx'> AFLAGS_sha512-core.o += $(aflags-thumb2-y)</div><div class='del'>-</div><div class='del'>-# massage the perlasm code a bit so we only get the NEON routine if we need it</div><div class='del'>-poly1305-aflags-$(CONFIG_CPU_V7) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=5</div><div class='del'>-poly1305-aflags-$(CONFIG_KERNEL_MODE_NEON) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=7</div><div class='del'>-AFLAGS_poly1305-core.o += $(poly1305-aflags-y) $(aflags-thumb2-y)</div><div class='head'>diff --git a/arch/arm/crypto/aes-ce-glue.c b/arch/arm/crypto/aes-ce-glue.c<br/>index 1cf61f51e766..00591895d540 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/aes-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/aes-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/aes-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/aes-ce-glue.c</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='hunk'>@@ -418,29 +416,6 @@ static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ctr_encrypt_one(struct crypto_skcipher *tfm, const u8 *src, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Temporarily disable interrupts to avoid races where</div><div class='del'>-	 * cachelines are evicted when the CPU is interrupted</div><div class='del'>-	 * to do something else.</div><div class='del'>-	 */</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	aes_encrypt(ctx, dst, src);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ctr_encrypt_sync(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_ctr_encrypt_walk(req, ctr_encrypt_one);</div><div class='del'>-</div><div class='del'>-	return ctr_encrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int xts_encrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='hunk'>@@ -586,10 +561,9 @@ static int xts_decrypt(struct skcipher_request *req)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg aes_algs[] = { {</div><div class='del'>-	.base.cra_name		= "__ecb(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ecb-aes-ce",</div><div class='add'>+	.base.cra_name		= "ecb(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ecb-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -600,10 +574,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ecb_encrypt,</div><div class='ctx'> 	.decrypt		= ecb_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__cbc(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__cbc-aes-ce",</div><div class='add'>+	.base.cra_name		= "cbc(aes)",</div><div class='add'>+	.base.cra_driver_name	= "cbc-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -615,10 +588,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= cbc_encrypt,</div><div class='ctx'> 	.decrypt		= cbc_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__cts(cbc(aes))",</div><div class='del'>-	.base.cra_driver_name	= "__cts-cbc-aes-ce",</div><div class='add'>+	.base.cra_name		= "cts(cbc(aes))",</div><div class='add'>+	.base.cra_driver_name	= "cts-cbc-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -631,10 +603,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= cts_cbc_encrypt,</div><div class='ctx'> 	.decrypt		= cts_cbc_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ctr-aes-ce",</div><div class='add'>+	.base.cra_name		= "ctr(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ctr-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= 1,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -647,25 +618,9 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ctr_encrypt,</div><div class='ctx'> 	.decrypt		= ctr_encrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "ctr-aes-ce-sync",</div><div class='del'>-	.base.cra_priority	= 300 - 1,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='del'>-	.base.cra_ctxsize	= sizeof(struct crypto_aes_ctx),</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='del'>-	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='del'>-	.ivsize			= AES_BLOCK_SIZE,</div><div class='del'>-	.chunksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.setkey			= ce_aes_setkey,</div><div class='del'>-	.encrypt		= ctr_encrypt_sync,</div><div class='del'>-	.decrypt		= ctr_encrypt_sync,</div><div class='del'>-}, {</div><div class='del'>-	.base.cra_name		= "__xts(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__xts-aes-ce",</div><div class='add'>+	.base.cra_name		= "xts(aes)",</div><div class='add'>+	.base.cra_driver_name	= "xts-aes-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct crypto_aes_xts_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -679,51 +634,14 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.decrypt		= xts_decrypt,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *aes_simd_algs[ARRAY_SIZE(aes_algs)];</div><div class='del'>-</div><div class='ctx'> static void aes_exit(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_simd_algs) &amp;&amp; aes_simd_algs[i]; i++)</div><div class='del'>-		simd_skcipher_free(aes_simd_algs[i]);</div><div class='del'>-</div><div class='ctx'> 	crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init aes_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct simd_skcipher_alg *simd;</div><div class='del'>-	const char *basename;</div><div class='del'>-	const char *algname;</div><div class='del'>-	const char *drvname;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	err = crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_algs); i++) {</div><div class='del'>-		if (!(aes_algs[i].base.cra_flags &amp; CRYPTO_ALG_INTERNAL))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		algname = aes_algs[i].base.cra_name + 2;</div><div class='del'>-		drvname = aes_algs[i].base.cra_driver_name + 2;</div><div class='del'>-		basename = aes_algs[i].base.cra_driver_name;</div><div class='del'>-		simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename);</div><div class='del'>-		err = PTR_ERR(simd);</div><div class='del'>-		if (IS_ERR(simd))</div><div class='del'>-			goto unregister_simds;</div><div class='del'>-</div><div class='del'>-		aes_simd_algs[i] = simd;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-unregister_simds:</div><div class='del'>-	aes_exit();</div><div class='del'>-	return err;</div><div class='add'>+	return crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_cpu_feature_match(AES, aes_init);</div><div class='head'>diff --git a/arch/arm/crypto/aes-neonbs-glue.c b/arch/arm/crypto/aes-neonbs-glue.c<br/>index f6be80b5938b..c60104dc1585 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/aes-neonbs-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/aes-neonbs-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/aes-neonbs-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/aes-neonbs-glue.c</a></div><div class='hunk'>@@ -8,8 +8,6 @@</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='hunk'>@@ -59,11 +57,6 @@ struct aesbs_xts_ctx {</div><div class='ctx'> 	struct crypto_aes_ctx	tweak_key;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct aesbs_ctr_ctx {</div><div class='del'>-	struct aesbs_ctx	key;		/* must be first member */</div><div class='del'>-	struct crypto_aes_ctx	fallback;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int aesbs_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='ctx'> 			unsigned int key_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -200,25 +193,6 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aesbs_ctr_setkey_sync(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='del'>-				 unsigned int key_len)</div><div class='del'>-{</div><div class='del'>-	struct aesbs_ctr_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = aes_expandkey(&amp;ctx-&gt;fallback, in_key, key_len);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	ctx-&gt;key.rounds = 6 + key_len / 4;</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	aesbs_convert_key(ctx-&gt;key.rk, ctx-&gt;fallback.key_enc, ctx-&gt;key.rounds);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='hunk'>@@ -254,21 +228,6 @@ static int ctr_encrypt(struct skcipher_request *req)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ctr_encrypt_one(struct crypto_skcipher *tfm, const u8 *src, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct aesbs_ctr_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	__aes_arm_encrypt(ctx-&gt;fallback.key_enc, ctx-&gt;key.rounds, src, dst);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ctr_encrypt_sync(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_ctr_encrypt_walk(req, ctr_encrypt_one);</div><div class='del'>-</div><div class='del'>-	return ctr_encrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int aesbs_xts_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='ctx'> 			    unsigned int key_len)</div><div class='ctx'> {</div><div class='hunk'>@@ -374,13 +333,12 @@ static int xts_decrypt(struct skcipher_request *req)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg aes_algs[] = { {</div><div class='del'>-	.base.cra_name		= "__ecb(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ecb-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "ecb(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ecb-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -389,13 +347,12 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ecb_encrypt,</div><div class='ctx'> 	.decrypt		= ecb_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__cbc(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__cbc-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "cbc(aes)",</div><div class='add'>+	.base.cra_driver_name	= "cbc-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_cbc_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -405,13 +362,12 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= cbc_encrypt,</div><div class='ctx'> 	.decrypt		= cbc_decrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "__ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__ctr-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "ctr(aes)",</div><div class='add'>+	.base.cra_driver_name	= "ctr-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= 1,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -422,29 +378,12 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.encrypt		= ctr_encrypt,</div><div class='ctx'> 	.decrypt		= ctr_encrypt,</div><div class='ctx'> }, {</div><div class='del'>-	.base.cra_name		= "ctr(aes)",</div><div class='del'>-	.base.cra_driver_name	= "ctr-aes-neonbs-sync",</div><div class='del'>-	.base.cra_priority	= 250 - 1,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='del'>-	.base.cra_ctxsize	= sizeof(struct aesbs_ctr_ctx),</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-	.min_keysize		= AES_MIN_KEY_SIZE,</div><div class='del'>-	.max_keysize		= AES_MAX_KEY_SIZE,</div><div class='del'>-	.chunksize		= AES_BLOCK_SIZE,</div><div class='del'>-	.walksize		= 8 * AES_BLOCK_SIZE,</div><div class='del'>-	.ivsize			= AES_BLOCK_SIZE,</div><div class='del'>-	.setkey			= aesbs_ctr_setkey_sync,</div><div class='del'>-	.encrypt		= ctr_encrypt_sync,</div><div class='del'>-	.decrypt		= ctr_encrypt_sync,</div><div class='del'>-}, {</div><div class='del'>-	.base.cra_name		= "__xts(aes)",</div><div class='del'>-	.base.cra_driver_name	= "__xts-aes-neonbs",</div><div class='add'>+	.base.cra_name		= "xts(aes)",</div><div class='add'>+	.base.cra_driver_name	= "xts-aes-neonbs",</div><div class='ctx'> 	.base.cra_priority	= 250,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct aesbs_xts_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= 2 * AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= 2 * AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -455,55 +394,18 @@ static struct skcipher_alg aes_algs[] = { {</div><div class='ctx'> 	.decrypt		= xts_decrypt,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *aes_simd_algs[ARRAY_SIZE(aes_algs)];</div><div class='del'>-</div><div class='ctx'> static void aes_exit(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_simd_algs); i++)</div><div class='del'>-		if (aes_simd_algs[i])</div><div class='del'>-			simd_skcipher_free(aes_simd_algs[i]);</div><div class='del'>-</div><div class='ctx'> 	crypto_unregister_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init aes_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct simd_skcipher_alg *simd;</div><div class='del'>-	const char *basename;</div><div class='del'>-	const char *algname;</div><div class='del'>-	const char *drvname;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='ctx'> 	if (!(elf_hwcap &amp; HWCAP_NEON))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	err = crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aes_algs); i++) {</div><div class='del'>-		if (!(aes_algs[i].base.cra_flags &amp; CRYPTO_ALG_INTERNAL))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		algname = aes_algs[i].base.cra_name + 2;</div><div class='del'>-		drvname = aes_algs[i].base.cra_driver_name + 2;</div><div class='del'>-		basename = aes_algs[i].base.cra_driver_name;</div><div class='del'>-		simd = simd_skcipher_create_compat(aes_algs + i, algname, drvname, basename);</div><div class='del'>-		err = PTR_ERR(simd);</div><div class='del'>-		if (IS_ERR(simd))</div><div class='del'>-			goto unregister_simds;</div><div class='del'>-</div><div class='del'>-		aes_simd_algs[i] = simd;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-unregister_simds:</div><div class='del'>-	aes_exit();</div><div class='del'>-	return err;</div><div class='add'>+	return crypto_register_skciphers(aes_algs, ARRAY_SIZE(aes_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-late_initcall(aes_init);</div><div class='add'>+module_init(aes_init);</div><div class='ctx'> module_exit(aes_exit);</div><div class='head'>diff --git a/arch/arm/crypto/blake2b-neon-glue.c b/arch/arm/crypto/blake2b-neon-glue.c<br/>index 4b59d027ba4a..2ff443a91724 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/blake2b-neon-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/blake2b-neon-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/blake2b-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/blake2b-neon-glue.c</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/blake2b.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='hunk'>@@ -21,11 +20,6 @@ asmlinkage void blake2b_compress_neon(struct blake2b_state *state,</div><div class='ctx'> static void blake2b_compress_arch(struct blake2b_state *state,</div><div class='ctx'> 				  const u8 *block, size_t nblocks, u32 inc)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		blake2b_compress_generic(state, block, nblocks, inc);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	do {</div><div class='ctx'> 		const size_t blocks = min_t(size_t, nblocks,</div><div class='ctx'> 					    SZ_4K / BLAKE2B_BLOCK_SIZE);</div><div class='hunk'>@@ -42,12 +36,14 @@ static void blake2b_compress_arch(struct blake2b_state *state,</div><div class='ctx'> static int crypto_blake2b_update_neon(struct shash_desc *desc,</div><div class='ctx'> 				      const u8 *in, unsigned int inlen)</div><div class='ctx'> {</div><div class='del'>-	return crypto_blake2b_update(desc, in, inlen, blake2b_compress_arch);</div><div class='add'>+	return crypto_blake2b_update_bo(desc, in, inlen, blake2b_compress_arch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_blake2b_final_neon(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int crypto_blake2b_finup_neon(struct shash_desc *desc, const u8 *in,</div><div class='add'>+				     unsigned int inlen, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	return crypto_blake2b_final(desc, out, blake2b_compress_arch);</div><div class='add'>+	return crypto_blake2b_finup(desc, in, inlen, out,</div><div class='add'>+				    blake2b_compress_arch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define BLAKE2B_ALG(name, driver_name, digest_size)			\</div><div class='hunk'>@@ -55,7 +51,9 @@ static int crypto_blake2b_final_neon(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 		.base.cra_name		= name,				\</div><div class='ctx'> 		.base.cra_driver_name	= driver_name,			\</div><div class='ctx'> 		.base.cra_priority	= 200,				\</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,	\</div><div class='add'>+		.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY |	\</div><div class='add'>+					  CRYPTO_AHASH_ALG_BLOCK_ONLY |	\</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINAL_NONZERO, \</div><div class='ctx'> 		.base.cra_blocksize	= BLAKE2B_BLOCK_SIZE,		\</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct blake2b_tfm_ctx), \</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,			\</div><div class='hunk'>@@ -63,8 +61,9 @@ static int crypto_blake2b_final_neon(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 		.setkey			= crypto_blake2b_setkey,	\</div><div class='ctx'> 		.init			= crypto_blake2b_init,		\</div><div class='ctx'> 		.update			= crypto_blake2b_update_neon,	\</div><div class='del'>-		.final			= crypto_blake2b_final_neon,	\</div><div class='add'>+		.finup			= crypto_blake2b_finup_neon,	\</div><div class='ctx'> 		.descsize		= sizeof(struct blake2b_state),	\</div><div class='add'>+		.statesize		= BLAKE2B_STATE_SIZE,		\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg blake2b_neon_algs[] = {</div><div class='head'>diff --git a/arch/arm/crypto/chacha-glue.c b/arch/arm/crypto/chacha-glue.c<br/>deleted file mode 100644<br/>index 50e635512046..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/chacha-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/chacha-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,352 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * ARM NEON accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016-2019 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/cputype.h&gt;</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_block_xor_neon(const u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				      int nrounds);</div><div class='del'>-asmlinkage void chacha_4block_xor_neon(const u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       int nrounds, unsigned int nbytes);</div><div class='del'>-asmlinkage void hchacha_block_arm(const u32 *state, u32 *out, int nrounds);</div><div class='del'>-asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-			     const u32 *state, int nrounds);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(use_neon);</div><div class='del'>-</div><div class='del'>-static inline bool neon_usable(void)</div><div class='del'>-{</div><div class='del'>-	return static_branch_likely(&amp;use_neon) &amp;&amp; crypto_simd_usable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-			  unsigned int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	u8 buf[CHACHA_BLOCK_SIZE];</div><div class='del'>-</div><div class='del'>-	while (bytes &gt; CHACHA_BLOCK_SIZE) {</div><div class='del'>-		unsigned int l = min(bytes, CHACHA_BLOCK_SIZE * 4U);</div><div class='del'>-</div><div class='del'>-		chacha_4block_xor_neon(state, dst, src, nrounds, l);</div><div class='del'>-		bytes -= l;</div><div class='del'>-		src += l;</div><div class='del'>-		dst += l;</div><div class='del'>-		state[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);</div><div class='del'>-	}</div><div class='del'>-	if (bytes) {</div><div class='del'>-		const u8 *s = src;</div><div class='del'>-		u8 *d = dst;</div><div class='del'>-</div><div class='del'>-		if (bytes != CHACHA_BLOCK_SIZE)</div><div class='del'>-			s = d = memcpy(buf, src, bytes);</div><div class='del'>-		chacha_block_xor_neon(state, d, s, nrounds);</div><div class='del'>-		if (d != dst)</div><div class='del'>-			memcpy(dst, buf, bytes);</div><div class='del'>-		state[12]++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable()) {</div><div class='del'>-		hchacha_block_arm(state, stream, nrounds);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		hchacha_block_neon(state, stream, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-		       int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable() ||</div><div class='del'>-	    bytes &lt;= CHACHA_BLOCK_SIZE) {</div><div class='del'>-		chacha_doarm(dst, src, bytes, state, nrounds);</div><div class='del'>-		state[12] += DIV_ROUND_UP(bytes, CHACHA_BLOCK_SIZE);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		chacha_doneon(state, dst, src, todo, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-</div><div class='del'>-		bytes -= todo;</div><div class='del'>-		src += todo;</div><div class='del'>-		dst += todo;</div><div class='del'>-	} while (bytes);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_stream_xor(struct skcipher_request *req,</div><div class='del'>-			     const struct chacha_ctx *ctx, const u8 *iv,</div><div class='del'>-			     bool neon)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = round_down(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon) {</div><div class='del'>-			chacha_doarm(walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-				     nbytes, state, ctx-&gt;nrounds);</div><div class='del'>-			state[12] += DIV_ROUND_UP(nbytes, CHACHA_BLOCK_SIZE);</div><div class='del'>-		} else {</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			chacha_doneon(state, walk.dst.virt.addr,</div><div class='del'>-				      walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-		}</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int do_chacha(struct skcipher_request *req, bool neon)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_stream_xor(req, ctx, req-&gt;iv, neon);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_arm(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_chacha(req, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_chacha(req, neon_usable());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int do_xchacha(struct skcipher_request *req, bool neon)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-</div><div class='del'>-	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon) {</div><div class='del'>-		hchacha_block_arm(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		hchacha_block_neon(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_stream_xor(req, &amp;subctx, real_iv, neon);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_arm(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_xchacha(req, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return do_xchacha(req, neon_usable());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg arm_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-arm",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_arm,</div><div class='del'>-		.decrypt		= chacha_arm,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-arm",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_arm,</div><div class='del'>-		.decrypt		= xchacha_arm,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-arm",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_arm,</div><div class='del'>-		.decrypt		= xchacha_arm,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg neon_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_neon,</div><div class='del'>-		.decrypt		= chacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER)) {</div><div class='del'>-		err = crypto_register_skciphers(arm_algs, ARRAY_SIZE(arm_algs));</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; (elf_hwcap &amp; HWCAP_NEON)) {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		switch (read_cpuid_part()) {</div><div class='del'>-		case ARM_CPU_PART_CORTEX_A7:</div><div class='del'>-		case ARM_CPU_PART_CORTEX_A5:</div><div class='del'>-			/*</div><div class='del'>-			 * The Cortex-A7 and Cortex-A5 do not perform well with</div><div class='del'>-			 * the NEON implementation but do incredibly with the</div><div class='del'>-			 * scalar one and use less power.</div><div class='del'>-			 */</div><div class='del'>-			for (i = 0; i &lt; ARRAY_SIZE(neon_algs); i++)</div><div class='del'>-				neon_algs[i].base.cra_priority = 0;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			static_branch_enable(&amp;use_neon);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER)) {</div><div class='del'>-			err = crypto_register_skciphers(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-			if (err)</div><div class='del'>-				crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_simd_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER)) {</div><div class='del'>-		crypto_unregister_skciphers(arm_algs, ARRAY_SIZE(arm_algs));</div><div class='del'>-		if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; (elf_hwcap &amp; HWCAP_NEON))</div><div class='del'>-			crypto_unregister_skciphers(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_simd_mod_init);</div><div class='del'>-module_exit(chacha_simd_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (scalar and NEON accelerated)");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-arm");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-arm");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-arm");</div><div class='del'>-#ifdef CONFIG_KERNEL_MODE_NEON</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-neon");</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/crypto/ghash-ce-glue.c b/arch/arm/crypto/ghash-ce-glue.c<br/>index aabfcf522a2c..a52dcc8c1e33 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/ghash-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/ghash-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/ghash-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/ghash-ce-glue.c</a></div><div class='hunk'>@@ -8,22 +8,22 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/gcm.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='del'>-#include &lt;crypto/cryptd.h&gt;</div><div class='add'>+#include &lt;crypto/gcm.h&gt;</div><div class='add'>+#include &lt;crypto/gf128mul.h&gt;</div><div class='add'>+#include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("GHASH hash function using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ardb@kernel.org&gt;");</div><div class='hunk'>@@ -32,9 +32,6 @@ MODULE_ALIAS_CRYPTO("ghash");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("gcm(aes)");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("rfc4106(gcm(aes))");</div><div class='ctx'> </div><div class='del'>-#define GHASH_BLOCK_SIZE	16</div><div class='del'>-#define GHASH_DIGEST_SIZE	16</div><div class='del'>-</div><div class='ctx'> #define RFC4106_NONCE_SIZE	4</div><div class='ctx'> </div><div class='ctx'> struct ghash_key {</div><div class='hunk'>@@ -49,10 +46,8 @@ struct gcm_key {</div><div class='ctx'> 	u8	nonce[];	// for RFC4106 nonce</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ghash_desc_ctx {</div><div class='add'>+struct arm_ghash_desc_ctx {</div><div class='ctx'> 	u64 digest[GHASH_DIGEST_SIZE/sizeof(u64)];</div><div class='del'>-	u8 buf[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> asmlinkage void pmull_ghash_update_p64(int blocks, u64 dg[], const char *src,</div><div class='hunk'>@@ -65,9 +60,9 @@ static __ro_after_init DEFINE_STATIC_KEY_FALSE(use_p64);</div><div class='ctx'> </div><div class='ctx'> static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	*ctx = (struct ghash_desc_ctx){};</div><div class='add'>+	*ctx = (struct arm_ghash_desc_ctx){};</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -85,52 +80,49 @@ static void ghash_do_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> static int ghash_update(struct shash_desc *desc, const u8 *src,</div><div class='ctx'> 			unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	ctx-&gt;count += len;</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	int blocks;</div><div class='ctx'> </div><div class='del'>-	if ((partial + len) &gt;= GHASH_BLOCK_SIZE) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-		int blocks;</div><div class='add'>+	blocks = len / GHASH_BLOCK_SIZE;</div><div class='add'>+	ghash_do_update(blocks, ctx-&gt;digest, src, key, NULL);</div><div class='add'>+	return len - blocks * GHASH_BLOCK_SIZE;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (partial) {</div><div class='del'>-			int p = GHASH_BLOCK_SIZE - partial;</div><div class='add'>+static int ghash_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	u8 *dst = out;</div><div class='ctx'> </div><div class='del'>-			memcpy(ctx-&gt;buf + partial, src, p);</div><div class='del'>-			src += p;</div><div class='del'>-			len -= p;</div><div class='del'>-		}</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		blocks = len / GHASH_BLOCK_SIZE;</div><div class='del'>-		len %= GHASH_BLOCK_SIZE;</div><div class='add'>+static int ghash_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	const u8 *src = in;</div><div class='ctx'> </div><div class='del'>-		ghash_do_update(blocks, ctx-&gt;digest, src, key,</div><div class='del'>-				partial ? ctx-&gt;buf : NULL);</div><div class='del'>-		src += blocks * GHASH_BLOCK_SIZE;</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	if (len)</div><div class='del'>-		memcpy(ctx-&gt;buf + partial, src, len);</div><div class='add'>+	ctx-&gt;digest[1] = get_unaligned_be64(src);</div><div class='add'>+	ctx-&gt;digest[0] = get_unaligned_be64(src + 8);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+		       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (partial) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='ctx'> </div><div class='del'>-		memset(ctx-&gt;buf + partial, 0, GHASH_BLOCK_SIZE - partial);</div><div class='del'>-		ghash_do_update(1, ctx-&gt;digest, ctx-&gt;buf, key, NULL);</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		ghash_do_update(1, ctx-&gt;digest, buf, key, NULL);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='del'>-</div><div class='del'>-	*ctx = (struct ghash_desc_ctx){};</div><div class='del'>-	return 0;</div><div class='add'>+	return ghash_export(desc, dst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ghash_reflect(u64 h[], const be128 *k)</div><div class='hunk'>@@ -175,13 +167,17 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.digestsize		= GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init			= ghash_init,</div><div class='ctx'> 	.update			= ghash_update,</div><div class='del'>-	.final			= ghash_final,</div><div class='add'>+	.finup			= ghash_finup,</div><div class='ctx'> 	.setkey			= ghash_setkey,</div><div class='del'>-	.descsize		= sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.export			= ghash_export,</div><div class='add'>+	.import			= ghash_import,</div><div class='add'>+	.descsize		= sizeof(struct arm_ghash_desc_ctx),</div><div class='add'>+	.statesize		= sizeof(struct ghash_desc_ctx),</div><div class='ctx'> </div><div class='ctx'> 	.base.cra_name		= "ghash",</div><div class='ctx'> 	.base.cra_driver_name	= "ghash-ce",</div><div class='ctx'> 	.base.cra_priority	= 300,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= GHASH_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct ghash_key) + sizeof(u64[2]),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -317,9 +313,6 @@ static int gcm_encrypt(struct aead_request *req, const u8 *iv, u32 assoclen)</div><div class='ctx'> 	u8 *tag, *dst;</div><div class='ctx'> 	int tail, err;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(!may_use_simd()))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='ctx'> 	err = skcipher_walk_aead_encrypt(&amp;walk, req, false);</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='hunk'>@@ -409,9 +402,6 @@ static int gcm_decrypt(struct aead_request *req, const u8 *iv, u32 assoclen)</div><div class='ctx'> 	u8 *tag, *dst;</div><div class='ctx'> 	int tail, err, ret;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(!may_use_simd()))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='ctx'> 	scatterwalk_map_and_copy(otag, req-&gt;src,</div><div class='ctx'> 				 req-&gt;assoclen + req-&gt;cryptlen - authsize,</div><div class='ctx'> 				 authsize, 0);</div><div class='head'>diff --git a/arch/arm/crypto/poly1305-glue.c b/arch/arm/crypto/poly1305-glue.c<br/>deleted file mode 100644<br/>index 4464ffbf8fd1..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/poly1305-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/poly1305-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,274 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * OpenSSL/Cryptogams accelerated Poly1305 transform for ARM</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-void poly1305_init_arm(void *state, const u8 *key);</div><div class='del'>-void poly1305_blocks_arm(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-void poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-void poly1305_emit_arm(void *state, u8 *digest, const u32 *nonce);</div><div class='del'>-</div><div class='del'>-void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-</div><div class='del'>-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_init_arm(&amp;dctx-&gt;h, key);</div><div class='del'>-	dctx-&gt;s[0] = get_unaligned_le32(key + 16);</div><div class='del'>-	dctx-&gt;s[1] = get_unaligned_le32(key + 20);</div><div class='del'>-	dctx-&gt;s[2] = get_unaligned_le32(key + 24);</div><div class='del'>-	dctx-&gt;s[3] = get_unaligned_le32(key + 28);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_init_arch);</div><div class='del'>-</div><div class='del'>-static int arm_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void arm_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-				 u32 len, u32 hibit, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset) {</div><div class='del'>-			poly1305_init_arm(&amp;dctx-&gt;h, src);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(src +  0);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(src +  4);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(src +  8);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(src + 12);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-		if (len &lt; POLY1305_BLOCK_SIZE)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len &amp;= ~(POLY1305_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; likely(do_neon))</div><div class='del'>-		poly1305_blocks_neon(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-	else</div><div class='del'>-		poly1305_blocks_arm(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void arm_poly1305_do_update(struct poly1305_desc_ctx *dctx,</div><div class='del'>-				    const u8 *src, u32 len, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			arm_poly1305_blocks(dctx, dctx-&gt;buf,</div><div class='del'>-					    POLY1305_BLOCK_SIZE, 1, false);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(len &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		arm_poly1305_blocks(dctx, src, len, 1, do_neon);</div><div class='del'>-		src += round_down(len, POLY1305_BLOCK_SIZE);</div><div class='del'>-		len %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(len)) {</div><div class='del'>-		dctx-&gt;buflen = len;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, len);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int arm_poly1305_update(struct shash_desc *desc,</div><div class='del'>-			       const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	arm_poly1305_do_update(dctx, src, srclen, false);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused arm_poly1305_update_neon(struct shash_desc *desc,</div><div class='del'>-						   const u8 *src,</div><div class='del'>-						   unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	bool do_neon = crypto_simd_usable() &amp;&amp; srclen &gt; 128;</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-	arm_poly1305_do_update(dctx, src, srclen, do_neon);</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			  unsigned int nbytes)</div><div class='del'>-{</div><div class='del'>-	bool do_neon = IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='del'>-		       crypto_simd_usable();</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		nbytes -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_blocks_arm(&amp;dctx-&gt;h, dctx-&gt;buf,</div><div class='del'>-					    POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(nbytes &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-		if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon) {</div><div class='del'>-			do {</div><div class='del'>-				unsigned int todo = min_t(unsigned int, len, SZ_4K);</div><div class='del'>-</div><div class='del'>-				kernel_neon_begin();</div><div class='del'>-				poly1305_blocks_neon(&amp;dctx-&gt;h, src, todo, 1);</div><div class='del'>-				kernel_neon_end();</div><div class='del'>-</div><div class='del'>-				len -= todo;</div><div class='del'>-				src += todo;</div><div class='del'>-			} while (len);</div><div class='del'>-		} else {</div><div class='del'>-			poly1305_blocks_arm(&amp;dctx-&gt;h, src, len, 1);</div><div class='del'>-			src += len;</div><div class='del'>-		}</div><div class='del'>-		nbytes %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(nbytes)) {</div><div class='del'>-		dctx-&gt;buflen = nbytes;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, nbytes);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_update_arch);</div><div class='del'>-</div><div class='del'>-void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		poly1305_blocks_arm(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit_arm(&amp;dctx-&gt;h, dst, dctx-&gt;s);</div><div class='del'>-	*dctx = (struct poly1305_desc_ctx){};</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_final_arch);</div><div class='del'>-</div><div class='del'>-static int arm_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_arch(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg arm_poly1305_algs[] = {{</div><div class='del'>-	.init			= arm_poly1305_init,</div><div class='del'>-	.update			= arm_poly1305_update,</div><div class='del'>-	.final			= arm_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-arm",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-#ifdef CONFIG_KERNEL_MODE_NEON</div><div class='del'>-}, {</div><div class='del'>-	.init			= arm_poly1305_init,</div><div class='del'>-	.update			= arm_poly1305_update_neon,</div><div class='del'>-	.final			= arm_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-neon",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-#endif</div><div class='del'>-}};</div><div class='del'>-</div><div class='del'>-static int __init arm_poly1305_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='del'>-	    (elf_hwcap &amp; HWCAP_NEON))</div><div class='del'>-		static_branch_enable(&amp;have_neon);</div><div class='del'>-	else if (IS_REACHABLE(CONFIG_CRYPTO_HASH))</div><div class='del'>-		/* register only the first entry */</div><div class='del'>-		return crypto_register_shash(&amp;arm_poly1305_algs[0]);</div><div class='del'>-</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?</div><div class='del'>-		crypto_register_shashes(arm_poly1305_algs,</div><div class='del'>-					ARRAY_SIZE(arm_poly1305_algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit arm_poly1305_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (!IS_REACHABLE(CONFIG_CRYPTO_HASH))</div><div class='del'>-		return;</div><div class='del'>-	if (!static_branch_likely(&amp;have_neon)) {</div><div class='del'>-		crypto_unregister_shash(&amp;arm_poly1305_algs[0]);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	crypto_unregister_shashes(arm_poly1305_algs,</div><div class='del'>-				  ARRAY_SIZE(arm_poly1305_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(arm_poly1305_mod_init);</div><div class='del'>-module_exit(arm_poly1305_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Accelerated Poly1305 transform for ARM");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-arm");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-neon");</div><div class='head'>diff --git a/arch/arm/crypto/sha1-ce-glue.c b/arch/arm/crypto/sha1-ce-glue.c<br/>index de9100c67b37..fac07a4799de 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha1-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha1-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/sha1-ce-glue.c</a></div><div class='hunk'>@@ -5,20 +5,14 @@</div><div class='ctx'>  * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha1.h"</div><div class='del'>-</div><div class='ctx'> MODULE_DESCRIPTION("SHA1 secure hash using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='hunk'>@@ -29,50 +23,36 @@ asmlinkage void sha1_ce_transform(struct sha1_state *sst, u8 const *src,</div><div class='ctx'> static int sha1_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			  unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA1_BLOCK_SIZE) + len &lt; SHA1_BLOCK_SIZE)</div><div class='del'>-		return sha1_update_arm(desc, data, len);</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='add'>+	remain = sha1_base_do_update_blocks(desc, data, len, sha1_ce_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha1_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			 unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha1_finup_arm(desc, data, len, out);</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_ce_transform);</div><div class='add'>+	sha1_base_do_finup(desc, data, len, sha1_ce_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='ctx'> </div><div class='ctx'> 	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha1_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_ce_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.init			= sha1_base_init,</div><div class='ctx'> 	.update			= sha1_ce_update,</div><div class='del'>-	.final			= sha1_ce_final,</div><div class='ctx'> 	.finup			= sha1_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha1_state),</div><div class='add'>+	.descsize		= SHA1_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.base			= {</div><div class='ctx'> 		.cra_name		= "sha1",</div><div class='ctx'> 		.cra_driver_name	= "sha1-ce",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/crypto/sha1.h b/arch/arm/crypto/sha1.h<br/>deleted file mode 100644<br/>index b1b7e21da2c3..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha1.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef ASM_ARM_CRYPTO_SHA1_H</div><div class='del'>-#define ASM_ARM_CRYPTO_SHA1_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-</div><div class='del'>-extern int sha1_update_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len);</div><div class='del'>-</div><div class='del'>-extern int sha1_finup_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len, u8 *out);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/arm/crypto/sha1_glue.c b/arch/arm/crypto/sha1_glue.c<br/>index 95a727bcd664..255da00c7d98 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha1_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha1_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/sha1_glue.c</a></div><div class='hunk'>@@ -12,53 +12,42 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha1.h"</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void sha1_block_data_order(struct sha1_state *digest,</div><div class='ctx'> 		const u8 *data, int rounds);</div><div class='ctx'> </div><div class='del'>-int sha1_update_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		    unsigned int len)</div><div class='add'>+static int sha1_update_arm(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			   unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	/* make sure signature matches sha1_block_fn() */</div><div class='ctx'> 	BUILD_BUG_ON(offsetof(struct sha1_state, state) != 0);</div><div class='ctx'> </div><div class='del'>-	return sha1_base_do_update(desc, data, len, sha1_block_data_order);</div><div class='add'>+	return sha1_base_do_update_blocks(desc, data, len,</div><div class='add'>+					  sha1_block_data_order);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(sha1_update_arm);</div><div class='ctx'> </div><div class='del'>-static int sha1_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sha1_finup_arm(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			  unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_block_data_order);</div><div class='add'>+	sha1_base_do_finup(desc, data, len, sha1_block_data_order);</div><div class='ctx'> 	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int sha1_finup_arm(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		   unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_block_data_order);</div><div class='del'>-	return sha1_final(desc, out);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(sha1_finup_arm);</div><div class='del'>-</div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	sha1_update_arm,</div><div class='del'>-	.final		=	sha1_final,</div><div class='ctx'> 	.finup		=	sha1_finup_arm,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name=	"sha1-asm",</div><div class='ctx'> 		.cra_priority	=	150,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/crypto/sha1_neon_glue.c b/arch/arm/crypto/sha1_neon_glue.c<br/>index 9c70b87e69f7..d321850f22a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha1_neon_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha1_neon_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha1_neon_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/sha1_neon_glue.c</a></div><div class='hunk'>@@ -13,18 +13,12 @@</div><div class='ctx'>  *  Copyright (c) Chandramouli Narayanan &lt;mouli@linux.intel.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha1.h"</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void sha1_transform_neon(struct sha1_state *state_h,</div><div class='ctx'> 				    const u8 *data, int rounds);</div><div class='hunk'>@@ -32,50 +26,37 @@ asmlinkage void sha1_transform_neon(struct sha1_state *state_h,</div><div class='ctx'> static int sha1_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			  unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA1_BLOCK_SIZE) + len &lt; SHA1_BLOCK_SIZE)</div><div class='del'>-		return sha1_update_arm(desc, data, len);</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_transform_neon);</div><div class='add'>+	remain = sha1_base_do_update_blocks(desc, data, len,</div><div class='add'>+					    sha1_transform_neon);</div><div class='ctx'> 	kernel_neon_end();</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha1_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			   unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha1_finup_arm(desc, data, len, out);</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha1_base_do_update(desc, data, len, sha1_transform_neon);</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_transform_neon);</div><div class='add'>+	sha1_base_do_finup(desc, data, len, sha1_transform_neon);</div><div class='ctx'> 	kernel_neon_end();</div><div class='ctx'> </div><div class='ctx'> 	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha1_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_neon_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	sha1_neon_update,</div><div class='del'>-	.final		=	sha1_neon_final,</div><div class='ctx'> 	.finup		=	sha1_neon_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize		= SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name		= "sha1",</div><div class='ctx'> 		.cra_driver_name	= "sha1-neon",</div><div class='ctx'> 		.cra_priority		= 250,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/crypto/sha2-ce-glue.c b/arch/arm/crypto/sha2-ce-glue.c<br/>deleted file mode 100644<br/>index aeac45bfbf9f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha2-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha2-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,109 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha2-ce-glue.c - SHA-224/SHA-256 using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha256_glue.h"</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-224/SHA-256 secure hash using ARMv8 Crypto Extensions");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha2_ce_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				  int blocks);</div><div class='del'>-</div><div class='del'>-static int sha2_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			  unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA256_BLOCK_SIZE) + len &lt; SHA256_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha256_arm_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sha256_base_do_update(desc, data, len,</div><div class='del'>-			      (sha256_block_fn *)sha2_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha2_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha256_arm_finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha256_base_do_update(desc, data, len,</div><div class='del'>-				      (sha256_block_fn *)sha2_ce_transform);</div><div class='del'>-	sha256_base_do_finalize(desc, (sha256_block_fn *)sha2_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha2_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha2_ce_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= sha2_ce_update,</div><div class='del'>-	.final			= sha2_ce_final,</div><div class='del'>-	.finup			= sha2_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha224",</div><div class='del'>-		.cra_driver_name	= "sha224-ce",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= sha2_ce_update,</div><div class='del'>-	.final			= sha2_ce_final,</div><div class='del'>-	.finup			= sha2_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha256",</div><div class='del'>-		.cra_driver_name	= "sha256-ce",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha2_ce_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha2_ce_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(SHA2, sha2_ce_mod_init);</div><div class='del'>-module_exit(sha2_ce_mod_fini);</div><div class='head'>diff --git a/arch/arm/crypto/sha256_glue.c b/arch/arm/crypto/sha256_glue.c<br/>deleted file mode 100644<br/>index f85933fdec75..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha256_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha256_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,117 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for the SHA256 Secure Hash Algorithm assembly implementation</div><div class='del'>- * using optimized ARM assembler and NEON instructions.</div><div class='del'>- *</div><div class='del'>- * Copyright © 2015 Google Inc.</div><div class='del'>- *</div><div class='del'>- * This file is based on sha256_ssse3_glue.c:</div><div class='del'>- *   Copyright (C) 2013 Intel Corporation</div><div class='del'>- *   Author: Tim Chen &lt;tim.c.chen@linux.intel.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha256_glue.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order(struct sha256_state *state,</div><div class='del'>-					const u8 *data, int num_blks);</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len)</div><div class='del'>-{</div><div class='del'>-	/* make sure casting to sha256_block_fn() is safe */</div><div class='del'>-	BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);</div><div class='del'>-</div><div class='del'>-	return sha256_base_do_update(desc, data, len, sha256_block_data_order);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha256_arm_update);</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_block_data_order);</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_block_data_order);</div><div class='del'>-	return crypto_sha256_arm_final(desc, out);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha256_arm_finup);</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	crypto_sha256_arm_update,</div><div class='del'>-	.final		=	crypto_sha256_arm_final,</div><div class='del'>-	.finup		=	crypto_sha256_arm_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-asm",</div><div class='del'>-		.cra_priority	=	150,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	crypto_sha256_arm_update,</div><div class='del'>-	.final		=	crypto_sha256_arm_final,</div><div class='del'>-	.finup		=	crypto_sha256_arm_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-asm",</div><div class='del'>-		.cra_priority	=	150,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int res = crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		return res;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon()) {</div><div class='del'>-		res = crypto_register_shashes(sha256_neon_algs,</div><div class='del'>-					      ARRAY_SIZE(sha256_neon_algs));</div><div class='del'>-</div><div class='del'>-		if (res &lt; 0)</div><div class='del'>-			crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; cpu_has_neon())</div><div class='del'>-		crypto_unregister_shashes(sha256_neon_algs,</div><div class='del'>-					  ARRAY_SIZE(sha256_neon_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha256_mod_init);</div><div class='del'>-module_exit(sha256_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm (ARM), including NEON");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='head'>diff --git a/arch/arm/crypto/sha256_glue.h b/arch/arm/crypto/sha256_glue.h<br/>deleted file mode 100644<br/>index 9f0d578bab5f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha256_glue.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha256_glue.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef _CRYPTO_SHA256_GLUE_H</div><div class='del'>-#define _CRYPTO_SHA256_GLUE_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-</div><div class='del'>-extern struct shash_alg sha256_neon_algs[2];</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len);</div><div class='del'>-</div><div class='del'>-int crypto_sha256_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len, u8 *hash);</div><div class='del'>-</div><div class='del'>-#endif /* _CRYPTO_SHA256_GLUE_H */</div><div class='head'>diff --git a/arch/arm/crypto/sha256_neon_glue.c b/arch/arm/crypto/sha256_neon_glue.c<br/>deleted file mode 100644<br/>index ccdcfff71910..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha256_neon_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha256_neon_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for the SHA256 Secure Hash Algorithm assembly implementation</div><div class='del'>- * using NEON instructions.</div><div class='del'>- *</div><div class='del'>- * Copyright © 2015 Google Inc.</div><div class='del'>- *</div><div class='del'>- * This file is based on sha512_neon_glue.c:</div><div class='del'>- *   Copyright © 2014 Jussi Kivilinna &lt;jussi.kivilinna@iki.fi&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha256_glue.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order_neon(struct sha256_state *digest,</div><div class='del'>-					     const u8 *data, int num_blks);</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				     unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA256_BLOCK_SIZE) + len &lt; SHA256_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha256_arm_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_block_data_order_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				    unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha256_arm_finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha256_base_do_update(desc, data, len,</div><div class='del'>-				      sha256_block_data_order_neon);</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_block_data_order_neon);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return crypto_sha256_neon_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct shash_alg sha256_neon_algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	crypto_sha256_neon_update,</div><div class='del'>-	.final		=	crypto_sha256_neon_final,</div><div class='del'>-	.finup		=	crypto_sha256_neon_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-neon",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	crypto_sha256_neon_update,</div><div class='del'>-	.final		=	crypto_sha256_neon_final,</div><div class='del'>-	.finup		=	crypto_sha256_neon_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-neon",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='head'>diff --git a/arch/arm/crypto/sha512-glue.c b/arch/arm/crypto/sha512-glue.c<br/>index 1be5bd498af3..f8a6480889b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha512-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha512-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha512-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/sha512-glue.c</a></div><div class='hunk'>@@ -5,15 +5,14 @@</div><div class='ctx'>  * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "sha512.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Accelerated SHA-384/SHA-512 secure hash for ARM");</div><div class='hunk'>@@ -28,50 +27,47 @@ MODULE_ALIAS_CRYPTO("sha512-arm");</div><div class='ctx'> asmlinkage void sha512_block_data_order(struct sha512_state *state,</div><div class='ctx'> 					u8 const *src, int blocks);</div><div class='ctx'> </div><div class='del'>-int sha512_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len)</div><div class='add'>+static int sha512_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			     unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	return sha512_base_do_update(desc, data, len, sha512_block_data_order);</div><div class='add'>+	return sha512_base_do_update_blocks(desc, data, len,</div><div class='add'>+					    sha512_block_data_order);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha512_arm_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sha512_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			    unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_block_data_order);</div><div class='add'>+	sha512_base_do_finup(desc, data, len, sha512_block_data_order);</div><div class='ctx'> 	return sha512_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int sha512_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		     unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha512_base_do_update(desc, data, len, sha512_block_data_order);</div><div class='del'>-	return sha512_arm_final(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha512_arm_algs[] = { {</div><div class='ctx'> 	.init			= sha384_base_init,</div><div class='ctx'> 	.update			= sha512_arm_update,</div><div class='del'>-	.final			= sha512_arm_final,</div><div class='ctx'> 	.finup			= sha512_arm_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.base			= {</div><div class='ctx'> 		.cra_name		= "sha384",</div><div class='ctx'> 		.cra_driver_name	= "sha384-arm",</div><div class='ctx'> 		.cra_priority		= 250,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	}</div><div class='ctx'> },  {</div><div class='ctx'> 	.init			= sha512_base_init,</div><div class='ctx'> 	.update			= sha512_arm_update,</div><div class='del'>-	.final			= sha512_arm_final,</div><div class='ctx'> 	.finup			= sha512_arm_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.base			= {</div><div class='ctx'> 		.cra_name		= "sha512",</div><div class='ctx'> 		.cra_driver_name	= "sha512-arm",</div><div class='ctx'> 		.cra_priority		= 250,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/crypto/sha512-neon-glue.c b/arch/arm/crypto/sha512-neon-glue.c<br/>index c6e58fe475ac..bd528077fefb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha512-neon-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha512-neon-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha512-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/sha512-neon-glue.c</a></div><div class='hunk'>@@ -5,16 +5,13 @@</div><div class='ctx'>  * Copyright (C) 2015 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "sha512.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_ALIAS_CRYPTO("sha384-neon");</div><div class='hunk'>@@ -26,51 +23,36 @@ asmlinkage void sha512_block_data_order_neon(struct sha512_state *state,</div><div class='ctx'> static int sha512_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			      unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count[0] % SHA512_BLOCK_SIZE) + len &lt; SHA512_BLOCK_SIZE)</div><div class='del'>-		return sha512_arm_update(desc, data, len);</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sha512_base_do_update(desc, data, len, sha512_block_data_order_neon);</div><div class='add'>+	remain = sha512_base_do_update_blocks(desc, data, len,</div><div class='add'>+					      sha512_block_data_order_neon);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha512_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			     unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha512_arm_finup(desc, data, len, out);</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha512_base_do_update(desc, data, len,</div><div class='del'>-				      sha512_block_data_order_neon);</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_block_data_order_neon);</div><div class='add'>+	sha512_base_do_finup(desc, data, len, sha512_block_data_order_neon);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='ctx'> 	return sha512_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha512_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_neon_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct shash_alg sha512_neon_algs[] = { {</div><div class='ctx'> 	.init			= sha384_base_init,</div><div class='ctx'> 	.update			= sha512_neon_update,</div><div class='del'>-	.final			= sha512_neon_final,</div><div class='ctx'> 	.finup			= sha512_neon_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.base			= {</div><div class='ctx'> 		.cra_name		= "sha384",</div><div class='ctx'> 		.cra_driver_name	= "sha384-neon",</div><div class='ctx'> 		.cra_priority		= 300,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		= SHA384_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> </div><div class='hunk'>@@ -78,14 +60,15 @@ struct shash_alg sha512_neon_algs[] = { {</div><div class='ctx'> },  {</div><div class='ctx'> 	.init			= sha512_base_init,</div><div class='ctx'> 	.update			= sha512_neon_update,</div><div class='del'>-	.final			= sha512_neon_final,</div><div class='ctx'> 	.finup			= sha512_neon_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.base			= {</div><div class='ctx'> 		.cra_name		= "sha512",</div><div class='ctx'> 		.cra_driver_name	= "sha512-neon",</div><div class='ctx'> 		.cra_priority		= 300,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		= SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm/crypto/sha512.h b/arch/arm/crypto/sha512.h<br/>index e14572be76d1..eeaee52cda69 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha512.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha512.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha512.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/crypto/sha512.h</a></div><div class='hunk'>@@ -1,9 +1,3 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> </div><div class='del'>-int sha512_arm_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len);</div><div class='del'>-</div><div class='del'>-int sha512_arm_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		     unsigned int len, u8 *out);</div><div class='del'>-</div><div class='ctx'> extern struct shash_alg sha512_neon_algs[2];</div><div class='head'>diff --git a/arch/arm/include/asm/simd.h b/arch/arm/include/asm/simd.h<br/>index 82191dbd7e78..d37559762180 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/include/asm/simd.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/include/asm/simd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/include/asm/simd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/include/asm/simd.h</a></div><div class='hunk'>@@ -1,8 +1,14 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_SIMD_H</div><div class='add'>+#define _ASM_SIMD_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/compiler_attributes.h&gt;</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> static __must_check inline bool may_use_simd(void)</div><div class='ctx'> {</div><div class='ctx'> 	return IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; !in_hardirq();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#endif	/* _ASM_SIMD_H */</div><div class='head'>diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile<br/>index 007874320937..91ea0e29107a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/Makefile</a></div><div class='hunk'>@@ -5,6 +5,8 @@</div><div class='ctx'> # Copyright (C) 1995-2000 Russell King</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+obj-y += crypto/</div><div class='add'>+</div><div class='ctx'> lib-y		:= changebit.o csumipv6.o csumpartial.o               \</div><div class='ctx'> 		   csumpartialcopy.o csumpartialcopyuser.o clearbit.o \</div><div class='ctx'> 		   delay.o delay-loop.o findbit.o memchr.o memcpy.o   \</div><div class='hunk'>@@ -47,7 +49,7 @@ endif</div><div class='ctx'> obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC32_ARCH) += crc32-arm.o</div><div class='del'>-crc32-arm-y := crc32-glue.o crc32-core.o</div><div class='add'>+crc32-arm-y := crc32.o crc32-core.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC_T10DIF_ARCH) += crc-t10dif-arm.o</div><div class='del'>-crc-t10dif-arm-y := crc-t10dif-glue.o crc-t10dif-core.o</div><div class='add'>+crc-t10dif-arm-y := crc-t10dif.o crc-t10dif-core.o</div><div class='head'>diff --git a/arch/arm/lib/crc-t10dif-glue.c b/arch/arm/lib/crc-t10dif.c<br/>index 6efad3d78284..1093f8ec13b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/lib/crc-t10dif-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crc-t10dif-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crc-t10dif.c</a></div><div class='hunk'>@@ -16,8 +16,8 @@</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_pmull);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pmull);</div><div class='ctx'> </div><div class='ctx'> #define CRC_T10DIF_PMULL_CHUNK_SIZE	16U</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +60,7 @@ static int __init crc_t10dif_arm_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc_t10dif_arm_init);</div><div class='add'>+subsys_initcall(crc_t10dif_arm_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc_t10dif_arm_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/lib/crc32-glue.c b/arch/arm/lib/crc32.c<br/>index 4340351dbde8..f2bef8849c7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/lib/crc32-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/lib/crc32-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crc32.c</a></div><div class='hunk'>@@ -18,8 +18,8 @@</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_pmull);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pmull);</div><div class='ctx'> </div><div class='ctx'> #define PMULL_MIN_LEN	64	/* min size of buffer for pmull functions */</div><div class='ctx'> </div><div class='hunk'>@@ -103,7 +103,7 @@ static int __init crc32_arm_init(void)</div><div class='ctx'> 		static_branch_enable(&amp;have_pmull);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc32_arm_init);</div><div class='add'>+subsys_initcall(crc32_arm_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc32_arm_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm/lib/crypto/.gitignore b/arch/arm/lib/crypto/.gitignore<br/>new file mode 100644<br/>index 000000000000..12d74d8b03d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+poly1305-core.S</div><div class='add'>+sha256-core.S</div><div class='head'>diff --git a/arch/arm/lib/crypto/Kconfig b/arch/arm/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..d1ad664f0c67<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_BLAKE2S_ARM</div><div class='add'>+	bool "Hash functions: BLAKE2s"</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_BLAKE2S</div><div class='add'>+	help</div><div class='add'>+	  BLAKE2s cryptographic hash function (RFC 7693)</div><div class='add'>+</div><div class='add'>+	  Architecture: arm</div><div class='add'>+</div><div class='add'>+	  This is faster than the generic implementations of BLAKE2s and</div><div class='add'>+	  BLAKE2b, but slower than the NEON implementation of BLAKE2b.</div><div class='add'>+	  There is no NEON implementation of BLAKE2s, since NEON doesn't</div><div class='add'>+	  really help with it.</div><div class='add'>+</div><div class='add'>+config CRYPTO_CHACHA20_NEON</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_LIB_CHACHA</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='add'>+</div><div class='add'>+config CRYPTO_POLY1305_ARM</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_LIB_POLY1305</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='add'>+</div><div class='add'>+config CRYPTO_SHA256_ARM</div><div class='add'>+	tristate</div><div class='add'>+	depends on !CPU_V7M</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256_SIMD</div><div class='head'>diff --git a/arch/arm/lib/crypto/Makefile b/arch/arm/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..431f77c3ff6f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_BLAKE2S_ARM) += libblake2s-arm.o</div><div class='add'>+libblake2s-arm-y := blake2s-core.o blake2s-glue.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o</div><div class='add'>+chacha-neon-y := chacha-scalar-core.o chacha-glue.o</div><div class='add'>+chacha-neon-$(CONFIG_KERNEL_MODE_NEON) += chacha-neon-core.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_POLY1305_ARM) += poly1305-arm.o</div><div class='add'>+poly1305-arm-y := poly1305-core.o poly1305-glue.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o</div><div class='add'>+sha256-arm-y := sha256.o sha256-core.o</div><div class='add'>+sha256-arm-$(CONFIG_KERNEL_MODE_NEON) += sha256-ce.o</div><div class='add'>+</div><div class='add'>+quiet_cmd_perl = PERL    $@</div><div class='add'>+      cmd_perl = $(PERL) $(&lt;) &gt; $(@)</div><div class='add'>+</div><div class='add'>+$(obj)/%-core.S: $(src)/%-armv4.pl</div><div class='add'>+	$(call cmd,perl)</div><div class='add'>+</div><div class='add'>+clean-files += poly1305-core.S sha256-core.S</div><div class='add'>+</div><div class='add'>+aflags-thumb2-$(CONFIG_THUMB2_KERNEL)  := -U__thumb2__ -D__thumb2__=1</div><div class='add'>+</div><div class='add'>+# massage the perlasm code a bit so we only get the NEON routine if we need it</div><div class='add'>+poly1305-aflags-$(CONFIG_CPU_V7) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=5</div><div class='add'>+poly1305-aflags-$(CONFIG_KERNEL_MODE_NEON) := -U__LINUX_ARM_ARCH__ -D__LINUX_ARM_ARCH__=7</div><div class='add'>+AFLAGS_poly1305-core.o += $(poly1305-aflags-y) $(aflags-thumb2-y)</div><div class='add'>+</div><div class='add'>+AFLAGS_sha256-core.o += $(aflags-thumb2-y)</div><div class='head'>diff --git a/arch/arm/crypto/blake2s-core.S b/arch/arm/lib/crypto/blake2s-core.S<br/>index df40e46601f1..df40e46601f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/blake2s-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/blake2s-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/blake2s-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/blake2s-core.S</a></div><div class='head'>diff --git a/arch/arm/crypto/blake2s-glue.c b/arch/arm/lib/crypto/blake2s-glue.c<br/>index 0238a70d9581..0238a70d9581 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/blake2s-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/blake2s-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/blake2s-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/blake2s-glue.c</a></div><div class='head'>diff --git a/arch/arm/lib/crypto/chacha-glue.c b/arch/arm/lib/crypto/chacha-glue.c<br/>new file mode 100644<br/>index 000000000000..88ec96415283<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/chacha-glue.c</a></div><div class='hunk'>@@ -0,0 +1,138 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * ChaCha and HChaCha functions (ARM optimized)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016-2019 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ * Copyright (C) 2015 Martin Willi</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cputype.h&gt;</div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_block_xor_neon(const struct chacha_state *state,</div><div class='add'>+				      u8 *dst, const u8 *src, int nrounds);</div><div class='add'>+asmlinkage void chacha_4block_xor_neon(const struct chacha_state *state,</div><div class='add'>+				       u8 *dst, const u8 *src,</div><div class='add'>+				       int nrounds, unsigned int nbytes);</div><div class='add'>+asmlinkage void hchacha_block_arm(const struct chacha_state *state,</div><div class='add'>+				  u32 out[HCHACHA_OUT_WORDS], int nrounds);</div><div class='add'>+asmlinkage void hchacha_block_neon(const struct chacha_state *state,</div><div class='add'>+				   u32 out[HCHACHA_OUT_WORDS], int nrounds);</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,</div><div class='add'>+			     const struct chacha_state *state, int nrounds);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(use_neon);</div><div class='add'>+</div><div class='add'>+static inline bool neon_usable(void)</div><div class='add'>+{</div><div class='add'>+	return static_branch_likely(&amp;use_neon) &amp;&amp; crypto_simd_usable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha_doneon(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+			  unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	u8 buf[CHACHA_BLOCK_SIZE];</div><div class='add'>+</div><div class='add'>+	while (bytes &gt; CHACHA_BLOCK_SIZE) {</div><div class='add'>+		unsigned int l = min(bytes, CHACHA_BLOCK_SIZE * 4U);</div><div class='add'>+</div><div class='add'>+		chacha_4block_xor_neon(state, dst, src, nrounds, l);</div><div class='add'>+		bytes -= l;</div><div class='add'>+		src += l;</div><div class='add'>+		dst += l;</div><div class='add'>+		state-&gt;x[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);</div><div class='add'>+	}</div><div class='add'>+	if (bytes) {</div><div class='add'>+		const u8 *s = src;</div><div class='add'>+		u8 *d = dst;</div><div class='add'>+</div><div class='add'>+		if (bytes != CHACHA_BLOCK_SIZE)</div><div class='add'>+			s = d = memcpy(buf, src, bytes);</div><div class='add'>+		chacha_block_xor_neon(state, d, s, nrounds);</div><div class='add'>+		if (d != dst)</div><div class='add'>+			memcpy(dst, buf, bytes);</div><div class='add'>+		state-&gt;x[12]++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hchacha_block_arch(const struct chacha_state *state,</div><div class='add'>+			u32 out[HCHACHA_OUT_WORDS], int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable()) {</div><div class='add'>+		hchacha_block_arm(state, out, nrounds);</div><div class='add'>+	} else {</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		hchacha_block_neon(state, out, nrounds);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hchacha_block_arch);</div><div class='add'>+</div><div class='add'>+void chacha_crypt_arch(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+		       unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_KERNEL_MODE_NEON) || !neon_usable() ||</div><div class='add'>+	    bytes &lt;= CHACHA_BLOCK_SIZE) {</div><div class='add'>+		chacha_doarm(dst, src, bytes, state, nrounds);</div><div class='add'>+		state-&gt;x[12] += DIV_ROUND_UP(bytes, CHACHA_BLOCK_SIZE);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='add'>+</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		chacha_doneon(state, dst, src, todo, nrounds);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+</div><div class='add'>+		bytes -= todo;</div><div class='add'>+		src += todo;</div><div class='add'>+		dst += todo;</div><div class='add'>+	} while (bytes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='add'>+</div><div class='add'>+bool chacha_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	/* We always can use at least the ARM scalar implementation. */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init chacha_arm_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; (elf_hwcap &amp; HWCAP_NEON)) {</div><div class='add'>+		switch (read_cpuid_part()) {</div><div class='add'>+		case ARM_CPU_PART_CORTEX_A7:</div><div class='add'>+		case ARM_CPU_PART_CORTEX_A5:</div><div class='add'>+			/*</div><div class='add'>+			 * The Cortex-A7 and Cortex-A5 do not perform well with</div><div class='add'>+			 * the NEON implementation but do incredibly with the</div><div class='add'>+			 * scalar one and use less power.</div><div class='add'>+			 */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			static_branch_enable(&amp;use_neon);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(chacha_arm_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit chacha_arm_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(chacha_arm_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ChaCha and HChaCha functions (ARM optimized)");</div><div class='add'>+MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/arm/crypto/chacha-neon-core.S b/arch/arm/lib/crypto/chacha-neon-core.S<br/>index 13d12f672656..ddd62b6294a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/chacha-neon-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/chacha-neon-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/chacha-neon-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/chacha-neon-core.S</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * ChaCha/XChaCha NEON helper functions</div><div class='add'>+ * ChaCha/HChaCha NEON helper functions</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2016 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm/crypto/chacha-scalar-core.S b/arch/arm/lib/crypto/chacha-scalar-core.S<br/>index 083fe1ab96d0..4951df05c158 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/chacha-scalar-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/chacha-scalar-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/chacha-scalar-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/chacha-scalar-core.S</a></div><div class='hunk'>@@ -367,7 +367,7 @@</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * void chacha_doarm(u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>- *		     const u32 *state, int nrounds);</div><div class='add'>+ *		     const struct chacha_state *state, int nrounds);</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(chacha_doarm)</div><div class='ctx'> 	cmp		r2, #0			// len == 0?</div><div class='hunk'>@@ -407,7 +407,8 @@ ENTRY(chacha_doarm)</div><div class='ctx'> ENDPROC(chacha_doarm)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * void hchacha_block_arm(const u32 state[16], u32 out[8], int nrounds);</div><div class='add'>+ * void hchacha_block_arm(const struct chacha_state *state,</div><div class='add'>+ *			  u32 out[HCHACHA_OUT_WORDS], int nrounds);</div><div class='ctx'>  */</div><div class='ctx'> ENTRY(hchacha_block_arm)</div><div class='ctx'> 	push		{r1,r4-r11,lr}</div><div class='head'>diff --git a/arch/arm/crypto/poly1305-armv4.pl b/arch/arm/lib/crypto/poly1305-armv4.pl<br/>index 6d79498d3115..d57c6e2fc84a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/poly1305-armv4.pl?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/poly1305-armv4.pl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/poly1305-armv4.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/poly1305-armv4.pl</a></div><div class='hunk'>@@ -43,9 +43,9 @@ $code.=&lt;&lt;___;</div><div class='ctx'> #else</div><div class='ctx'> # define __ARM_ARCH__ __LINUX_ARM_ARCH__</div><div class='ctx'> # define __ARM_MAX_ARCH__ __LINUX_ARM_ARCH__</div><div class='del'>-# define poly1305_init   poly1305_init_arm</div><div class='add'>+# define poly1305_init   poly1305_block_init_arch</div><div class='ctx'> # define poly1305_blocks poly1305_blocks_arm</div><div class='del'>-# define poly1305_emit   poly1305_emit_arm</div><div class='add'>+# define poly1305_emit   poly1305_emit_arch</div><div class='ctx'> .globl	poly1305_blocks_neon</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm/lib/crypto/poly1305-glue.c b/arch/arm/lib/crypto/poly1305-glue.c<br/>new file mode 100644<br/>index 000000000000..2603b0771f2c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/poly1305-glue.c</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * OpenSSL/Cryptogams accelerated Poly1305 transform for ARM</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;crypto/internal/poly1305.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void poly1305_block_init_arch(</div><div class='add'>+	struct poly1305_block_state *state,</div><div class='add'>+	const u8 raw_key[POLY1305_BLOCK_SIZE]);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_block_init_arch);</div><div class='add'>+asmlinkage void poly1305_blocks_arm(struct poly1305_block_state *state,</div><div class='add'>+				    const u8 *src, u32 len, u32 hibit);</div><div class='add'>+asmlinkage void poly1305_blocks_neon(struct poly1305_block_state *state,</div><div class='add'>+				     const u8 *src, u32 len, u32 hibit);</div><div class='add'>+asmlinkage void poly1305_emit_arch(const struct poly1305_state *state,</div><div class='add'>+				   u8 digest[POLY1305_DIGEST_SIZE],</div><div class='add'>+				   const u32 nonce[4]);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_emit_arch);</div><div class='add'>+</div><div class='add'>+void __weak poly1305_blocks_neon(struct poly1305_block_state *state,</div><div class='add'>+				 const u8 *src, u32 len, u32 hibit)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='add'>+</div><div class='add'>+void poly1305_blocks_arch(struct poly1305_block_state *state, const u8 *src,</div><div class='add'>+			  unsigned int len, u32 padbit)</div><div class='add'>+{</div><div class='add'>+	len = round_down(len, POLY1305_BLOCK_SIZE);</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='add'>+	    static_branch_likely(&amp;have_neon)) {</div><div class='add'>+		do {</div><div class='add'>+			unsigned int todo = min_t(unsigned int, len, SZ_4K);</div><div class='add'>+</div><div class='add'>+			kernel_neon_begin();</div><div class='add'>+			poly1305_blocks_neon(state, src, todo, padbit);</div><div class='add'>+			kernel_neon_end();</div><div class='add'>+</div><div class='add'>+			len -= todo;</div><div class='add'>+			src += todo;</div><div class='add'>+		} while (len);</div><div class='add'>+	} else</div><div class='add'>+		poly1305_blocks_arm(state, src, len, padbit);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_blocks_arch);</div><div class='add'>+</div><div class='add'>+bool poly1305_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	/* We always can use at least the ARM scalar implementation. */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(poly1305_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init arm_poly1305_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='add'>+	    (elf_hwcap &amp; HWCAP_NEON))</div><div class='add'>+		static_branch_enable(&amp;have_neon);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(arm_poly1305_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit arm_poly1305_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(arm_poly1305_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Accelerated Poly1305 transform for ARM");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/arm/crypto/sha256-armv4.pl b/arch/arm/lib/crypto/sha256-armv4.pl<br/>index f3a2b54efd4e..8122db7fd599 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha256-armv4.pl?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha256-armv4.pl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/sha256-armv4.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/sha256-armv4.pl</a></div><div class='hunk'>@@ -204,18 +204,18 @@ K256:</div><div class='ctx'> .word	0				@ terminator</div><div class='ctx'> #if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='ctx'> .LOPENSSL_armcap:</div><div class='del'>-.word	OPENSSL_armcap_P-sha256_block_data_order</div><div class='add'>+.word	OPENSSL_armcap_P-sha256_blocks_arch</div><div class='ctx'> #endif</div><div class='ctx'> .align	5</div><div class='ctx'> </div><div class='del'>-.global	sha256_block_data_order</div><div class='del'>-.type	sha256_block_data_order,%function</div><div class='del'>-sha256_block_data_order:</div><div class='del'>-.Lsha256_block_data_order:</div><div class='add'>+.global	sha256_blocks_arch</div><div class='add'>+.type	sha256_blocks_arch,%function</div><div class='add'>+sha256_blocks_arch:</div><div class='add'>+.Lsha256_blocks_arch:</div><div class='ctx'> #if __ARM_ARCH__&lt;7</div><div class='del'>-	sub	r3,pc,#8		@ sha256_block_data_order</div><div class='add'>+	sub	r3,pc,#8		@ sha256_blocks_arch</div><div class='ctx'> #else</div><div class='del'>-	adr	r3,.Lsha256_block_data_order</div><div class='add'>+	adr	r3,.Lsha256_blocks_arch</div><div class='ctx'> #endif</div><div class='ctx'> #if __ARM_MAX_ARCH__&gt;=7 &amp;&amp; !defined(__KERNEL__)</div><div class='ctx'> 	ldr	r12,.LOPENSSL_armcap</div><div class='hunk'>@@ -282,7 +282,7 @@ $code.=&lt;&lt;___;</div><div class='ctx'> 	moveq	pc,lr			@ be binary compatible with V4, yet</div><div class='ctx'> 	bx	lr			@ interoperable with Thumb ISA:-)</div><div class='ctx'> #endif</div><div class='del'>-.size	sha256_block_data_order,.-sha256_block_data_order</div><div class='add'>+.size	sha256_blocks_arch,.-sha256_blocks_arch</div><div class='ctx'> ___</div><div class='ctx'> ######################################################################</div><div class='ctx'> # NEON stuff</div><div class='hunk'>@@ -470,8 +470,8 @@ sha256_block_data_order_neon:</div><div class='ctx'> 	stmdb	sp!,{r4-r12,lr}</div><div class='ctx'> </div><div class='ctx'> 	sub	$H,sp,#16*4+16</div><div class='del'>-	adr	$Ktbl,.Lsha256_block_data_order</div><div class='del'>-	sub	$Ktbl,$Ktbl,#.Lsha256_block_data_order-K256</div><div class='add'>+	adr	$Ktbl,.Lsha256_blocks_arch</div><div class='add'>+	sub	$Ktbl,$Ktbl,#.Lsha256_blocks_arch-K256</div><div class='ctx'> 	bic	$H,$H,#15		@ align for 128-bit stores</div><div class='ctx'> 	mov	$t2,sp</div><div class='ctx'> 	mov	sp,$H			@ alloca</div><div class='head'>diff --git a/arch/arm/crypto/sha2-ce-core.S b/arch/arm/lib/crypto/sha256-ce.S<br/>index b6369d2440a1..ac2c9b01b22d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/crypto/sha2-ce-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/crypto/sha2-ce-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/sha256-ce.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/sha256-ce.S</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='del'>- * sha2-ce-core.S - SHA-224/256 secure hash using ARMv8 Crypto Extensions</div><div class='add'>+ * sha256-ce.S - SHA-224/256 secure hash using ARMv8 Crypto Extensions</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2015 Linaro Ltd.</div><div class='ctx'>  * Author: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;</div><div class='hunk'>@@ -67,10 +67,10 @@</div><div class='ctx'> 	.word		0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * void sha2_ce_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				  int blocks);</div><div class='add'>+	 * void sha256_ce_transform(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+	 *			    const u8 *data, size_t nblocks);</div><div class='ctx'> 	 */</div><div class='del'>-ENTRY(sha2_ce_transform)</div><div class='add'>+ENTRY(sha256_ce_transform)</div><div class='ctx'> 	/* load state */</div><div class='ctx'> 	vld1.32		{dga-dgb}, [r0]</div><div class='ctx'> </div><div class='hunk'>@@ -120,4 +120,4 @@ ENTRY(sha2_ce_transform)</div><div class='ctx'> 	/* store new state */</div><div class='ctx'> 	vst1.32		{dga-dgb}, [r0]</div><div class='ctx'> 	bx		lr</div><div class='del'>-ENDPROC(sha2_ce_transform)</div><div class='add'>+ENDPROC(sha256_ce_transform)</div><div class='head'>diff --git a/arch/arm/lib/crypto/sha256.c b/arch/arm/lib/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..109192e54b0f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/lib/crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * SHA-256 optimized for ARM</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Google LLC</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				   const u8 *data, size_t nblocks);</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='add'>+asmlinkage void sha256_block_data_order_neon(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+					     const u8 *data, size_t nblocks);</div><div class='add'>+asmlinkage void sha256_ce_transform(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				    const u8 *data, size_t nblocks);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_ce);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_simd(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='add'>+	    static_branch_likely(&amp;have_neon)) {</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		if (static_branch_likely(&amp;have_ce))</div><div class='add'>+			sha256_ce_transform(state, data, nblocks);</div><div class='add'>+		else</div><div class='add'>+			sha256_block_data_order_neon(state, data, nblocks);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+	} else {</div><div class='add'>+		sha256_blocks_arch(state, data, nblocks);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_simd);</div><div class='add'>+</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	/* We always can use at least the ARM scalar implementation. */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init sha256_arm_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; (elf_hwcap &amp; HWCAP_NEON)) {</div><div class='add'>+		static_branch_enable(&amp;have_neon);</div><div class='add'>+		if (elf_hwcap2 &amp; HWCAP2_SHA2)</div><div class='add'>+			static_branch_enable(&amp;have_ce);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(sha256_arm_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit sha256_arm_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(sha256_arm_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 optimized for ARM");</div><div class='head'>diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c<br/>index cac4e82f6c82..150a1e56dcae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-exynos/suspend.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-exynos/suspend.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-exynos/suspend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/mach-exynos/suspend.c</a></div><div class='hunk'>@@ -209,9 +209,8 @@ static int __init exynos_pmu_irq_init(struct device_node *node,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_hierarchy(parent_domain, 0, 0,</div><div class='del'>-					  node, &amp;exynos_pmu_domain_ops,</div><div class='del'>-					  NULL);</div><div class='add'>+	domain = irq_domain_create_hierarchy(parent_domain, 0, 0, of_fwnode_handle(node),</div><div class='add'>+					     &amp;exynos_pmu_domain_ops, NULL);</div><div class='ctx'> 	if (!domain) {</div><div class='ctx'> 		iounmap(pmu_base_addr);</div><div class='ctx'> 		pmu_base_addr = NULL;</div><div class='head'>diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c<br/>index cf6546ddc7a3..3067c06b4b8e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/avic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-imx/avic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/avic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/mach-imx/avic.c</a></div><div class='hunk'>@@ -201,8 +201,8 @@ static void __init mxc_init_irq(void __iomem *irqbase)</div><div class='ctx'> 	WARN_ON(irq_base &lt; 0);</div><div class='ctx'> </div><div class='ctx'> 	np = of_find_compatible_node(NULL, NULL, "fsl,avic");</div><div class='del'>-	domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0,</div><div class='del'>-				       &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_legacy(of_fwnode_handle(np), AVIC_NUM_IRQS, irq_base, 0,</div><div class='add'>+					  &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> 	WARN_ON(!domain);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; AVIC_NUM_IRQS / 32; i++, irq_base += 32)</div><div class='head'>diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c<br/>index 5909088d5482..2e633569d2f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/gpc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-imx/gpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/gpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/mach-imx/gpc.c</a></div><div class='hunk'>@@ -245,9 +245,8 @@ static int __init imx_gpc_init(struct device_node *node,</div><div class='ctx'> 	if (WARN_ON(!gpc_base))</div><div class='ctx'> 	        return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_hierarchy(parent_domain, 0, GPC_MAX_IRQS,</div><div class='del'>-					  node, &amp;imx_gpc_domain_ops,</div><div class='del'>-					  NULL);</div><div class='add'>+	domain = irq_domain_create_hierarchy(parent_domain, 0, GPC_MAX_IRQS, of_fwnode_handle(node),</div><div class='add'>+					     &amp;imx_gpc_domain_ops, NULL);</div><div class='ctx'> 	if (!domain) {</div><div class='ctx'> 		iounmap(gpc_base);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c<br/>index 8b3d98d288d9..50a5668e65d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/tzic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-imx/tzic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-imx/tzic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/mach-imx/tzic.c</a></div><div class='hunk'>@@ -175,8 +175,8 @@ static int __init tzic_init_dt(struct device_node *np, struct device_node *p)</div><div class='ctx'> 	irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id());</div><div class='ctx'> 	WARN_ON(irq_base &lt; 0);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0,</div><div class='del'>-				       &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_legacy(of_fwnode_handle(np), TZIC_NUM_IRQS, irq_base, 0,</div><div class='add'>+					  &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> 	WARN_ON(!domain);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 4; i++, irq_base += 32)</div><div class='head'>diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c<br/>index 9b587ecebb1c..bb1bc060ecd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-omap1/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-omap1/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-omap1/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/mach-omap1/irq.c</a></div><div class='hunk'>@@ -220,8 +220,7 @@ void __init omap1_init_irq(void)</div><div class='ctx'> 	omap_l2_irq = irq_base;</div><div class='ctx'> 	omap_l2_irq -= NR_IRQS_LEGACY;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0,</div><div class='del'>-				       &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_legacy(NULL, nr_irqs, irq_base, 0, &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Total of %lu interrupts in %i interrupt banks\n",</div><div class='ctx'> 		nr_irqs, irq_bank_count);</div><div class='head'>diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c<br/>index 6f0d6120c174..a66b1dc61571 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-omap2/omap-wakeupgen.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-omap2/omap-wakeupgen.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-omap2/omap-wakeupgen.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/mach-omap2/omap-wakeupgen.c</a></div><div class='hunk'>@@ -585,9 +585,8 @@ static int __init wakeupgen_init(struct device_node *node,</div><div class='ctx'> 		wakeupgen_ops = &amp;am43xx_wakeupgen_ops;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs,</div><div class='del'>-					  node, &amp;wakeupgen_domain_ops,</div><div class='del'>-					  NULL);</div><div class='add'>+	domain = irq_domain_create_hierarchy(parent_domain, 0, max_irqs, of_fwnode_handle(node),</div><div class='add'>+					     &amp;wakeupgen_domain_ops, NULL);</div><div class='ctx'> 	if (!domain) {</div><div class='ctx'> 		iounmap(wakeupgen_base);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c<br/>index d9cadd97748a..5bfce8aa4102 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/mach-pxa/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/mach-pxa/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/mach-pxa/irq.c</a></div><div class='hunk'>@@ -147,9 +147,8 @@ pxa_init_irq_common(struct device_node *node, int irq_nr,</div><div class='ctx'> 	int n;</div><div class='ctx'> </div><div class='ctx'> 	pxa_internal_irq_nr = irq_nr;</div><div class='del'>-	pxa_irq_domain = irq_domain_add_legacy(node, irq_nr,</div><div class='del'>-					       PXA_IRQ(0), 0,</div><div class='del'>-					       &amp;pxa_irq_ops, NULL);</div><div class='add'>+	pxa_irq_domain = irq_domain_create_legacy(of_fwnode_handle(node), irq_nr, PXA_IRQ(0), 0,</div><div class='add'>+						  &amp;pxa_irq_ops, NULL);</div><div class='ctx'> 	if (!pxa_irq_domain)</div><div class='ctx'> 		panic("Unable to add PXA IRQ domain\n");</div><div class='ctx'> 	irq_set_default_domain(pxa_irq_domain);</div><div class='head'>diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c<br/>index 595e9cb33c1d..326616fbdc44 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm/plat-orion/gpio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm/plat-orion/gpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm/plat-orion/gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm/plat-orion/gpio.c</a></div><div class='hunk'>@@ -496,11 +496,10 @@ static void orion_gpio_unmask_irq(struct irq_data *d)</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	reg_val = irq_reg_readl(gc, ct-&gt;regs.mask);</div><div class='ctx'> 	reg_val |= mask;</div><div class='ctx'> 	irq_reg_writel(gc, reg_val, ct-&gt;regs.mask);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void orion_gpio_mask_irq(struct irq_data *d)</div><div class='hunk'>@@ -510,11 +509,10 @@ static void orion_gpio_mask_irq(struct irq_data *d)</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	reg_val = irq_reg_readl(gc, ct-&gt;regs.mask);</div><div class='ctx'> 	reg_val &amp;= ~mask;</div><div class='ctx'> 	irq_reg_writel(gc, reg_val, ct-&gt;regs.mask);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init orion_gpio_init(int gpio_base, int ngpio,</div><div class='hunk'>@@ -602,12 +600,12 @@ void __init orion_gpio_init(int gpio_base, int ngpio,</div><div class='ctx'> 			       IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup irq domain on top of the generic chip. */</div><div class='del'>-	ochip-&gt;domain = irq_domain_add_legacy(NULL,</div><div class='del'>-					      ochip-&gt;chip.ngpio,</div><div class='del'>-					      ochip-&gt;secondary_irq_base,</div><div class='del'>-					      ochip-&gt;secondary_irq_base,</div><div class='del'>-					      &amp;irq_domain_simple_ops,</div><div class='del'>-					      ochip);</div><div class='add'>+	ochip-&gt;domain = irq_domain_create_legacy(NULL,</div><div class='add'>+						 ochip-&gt;chip.ngpio,</div><div class='add'>+						 ochip-&gt;secondary_irq_base,</div><div class='add'>+						 ochip-&gt;secondary_irq_base,</div><div class='add'>+						 &amp;irq_domain_simple_ops,</div><div class='add'>+						 ochip);</div><div class='ctx'> 	if (!ochip-&gt;domain)</div><div class='ctx'> 		panic("%s: couldn't allocate irq domain (DT).\n",</div><div class='ctx'> 		      ochip-&gt;chip.label);</div><div class='head'>diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig<br/>index a182295e6f08..c314eb429b9f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/Kconfig</a></div><div class='hunk'>@@ -42,6 +42,7 @@ config ARM64</div><div class='ctx'> 	select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS</div><div class='ctx'> 	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE</div><div class='ctx'> 	select ARCH_HAS_NONLEAF_PMD_YOUNG if ARM64_HAFT</div><div class='add'>+	select ARCH_HAS_PREEMPT_LAZY</div><div class='ctx'> 	select ARCH_HAS_PTDUMP</div><div class='ctx'> 	select ARCH_HAS_PTE_DEVMAP</div><div class='ctx'> 	select ARCH_HAS_PTE_SPECIAL</div><div class='hunk'>@@ -134,7 +135,6 @@ config ARM64</div><div class='ctx'> 	select COMMON_CLK</div><div class='ctx'> 	select CPU_PM if (SUSPEND || CPU_IDLE)</div><div class='ctx'> 	select CPUMASK_OFFSTACK if NR_CPUS &gt; 256</div><div class='del'>-	select CRC32</div><div class='ctx'> 	select DCACHE_WORD_ACCESS</div><div class='ctx'> 	select DYNAMIC_FTRACE if FUNCTION_TRACER</div><div class='ctx'> 	select DMA_BOUNCE_UNALIGNED_KMALLOC</div><div class='hunk'>@@ -333,9 +333,9 @@ config ARCH_MMAP_RND_BITS_MAX</div><div class='ctx'> 	default 24 if ARM64_VA_BITS=39</div><div class='ctx'> 	default 27 if ARM64_VA_BITS=42</div><div class='ctx'> 	default 30 if ARM64_VA_BITS=47</div><div class='del'>-	default 29 if ARM64_VA_BITS=48 &amp;&amp; ARM64_64K_PAGES</div><div class='del'>-	default 31 if ARM64_VA_BITS=48 &amp;&amp; ARM64_16K_PAGES</div><div class='del'>-	default 33 if ARM64_VA_BITS=48</div><div class='add'>+	default 29 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52) &amp;&amp; ARM64_64K_PAGES</div><div class='add'>+	default 31 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52) &amp;&amp; ARM64_16K_PAGES</div><div class='add'>+	default 33 if (ARM64_VA_BITS=48 || ARM64_VA_BITS=52)</div><div class='ctx'> 	default 14 if ARM64_64K_PAGES</div><div class='ctx'> 	default 16 if ARM64_16K_PAGES</div><div class='ctx'> 	default 18</div><div class='hunk'>@@ -464,6 +464,23 @@ config AMPERE_ERRATUM_AC03_CPU_38</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say Y.</div><div class='ctx'> </div><div class='add'>+config AMPERE_ERRATUM_AC04_CPU_23</div><div class='add'>+        bool "AmpereOne: AC04_CPU_23:  Failure to synchronize writes to HCR_EL2 may corrupt address translations."</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  This option adds an alternative code sequence to work around Ampere</div><div class='add'>+	  errata AC04_CPU_23 on AmpereOne.</div><div class='add'>+</div><div class='add'>+	  Updates to HCR_EL2 can rarely corrupt simultaneous translations for</div><div class='add'>+	  data addresses initiated by load/store instructions. Only</div><div class='add'>+	  instruction initiated translations are vulnerable, not translations</div><div class='add'>+	  from prefetches for example. A DSB before the store to HCR_EL2 is</div><div class='add'>+	  sufficient to prevent older instructions from hitting the window</div><div class='add'>+	  for corruption, and an ISB after is sufficient to prevent younger</div><div class='add'>+	  instructions from hitting the window for corruption.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y.</div><div class='add'>+</div><div class='ctx'> config ARM64_WORKAROUND_CLEAN_CACHE</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='hunk'>@@ -2285,7 +2302,6 @@ config ARM64_SME</div><div class='ctx'> 	bool "ARM Scalable Matrix Extension support"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on ARM64_SVE</div><div class='del'>-	depends on BROKEN</div><div class='ctx'> 	help</div><div class='ctx'> 	  The Scalable Matrix Extension (SME) is an extension to the AArch64</div><div class='ctx'> 	  execution state which utilises a substantial subset of the SVE</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts<br/>index 13a0e63afeaf..2c64d834a2c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts</a></div><div class='hunk'>@@ -152,28 +152,12 @@</div><div class='ctx'> 	vcc-pg-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;r_ir {</div><div class='del'>-	linux,rc-map-name = "rc-beelink-gs1";</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_pio {</div><div class='del'>-	/*</div><div class='del'>-	 * FIXME: We can't add that supply for now since it would</div><div class='del'>-	 * create a circular dependency between pinctrl, the regulator</div><div class='del'>-	 * and the RSB Bus.</div><div class='del'>-	 *</div><div class='del'>-	 * vcc-pl-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='del'>-	 */</div><div class='del'>-	vcc-pm-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_rsb {</div><div class='add'>+&amp;r_i2c {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	axp805: pmic@745 {</div><div class='add'>+	axp805: pmic@36 {</div><div class='ctx'> 		compatible = "x-powers,axp805", "x-powers,axp806";</div><div class='del'>-		reg = &lt;0x745&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -291,6 +275,22 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;r_ir {</div><div class='add'>+	linux,rc-map-name = "rc-beelink-gs1";</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+	/*</div><div class='add'>+	 * PL0 and PL1 are used for PMIC I2C</div><div class='add'>+	 * don't enable the pl-supply else</div><div class='add'>+	 * it will fail at boot</div><div class='add'>+	 *</div><div class='add'>+	 * vcc-pl-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+	 */</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;spdif {</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spdif_tx_pin&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts<br/>index ab87c3447cd7..f005072c68a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts</a></div><div class='hunk'>@@ -176,16 +176,12 @@</div><div class='ctx'> 	vcc-pg-supply = &lt;&amp;reg_vcc_wifi_io&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;r_ir {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_rsb {</div><div class='add'>+&amp;r_i2c {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	axp805: pmic@745 {</div><div class='add'>+	axp805: pmic@36 {</div><div class='ctx'> 		compatible = "x-powers,axp805", "x-powers,axp806";</div><div class='del'>-		reg = &lt;0x745&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -296,6 +292,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;r_ir {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rtc {</div><div class='ctx'> 	clocks = &lt;&amp;ext_osc32k&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi<br/>index d05dc5d6e6b9..e34dbb992021 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi</a></div><div class='hunk'>@@ -113,20 +113,12 @@</div><div class='ctx'> 	vcc-pg-supply = &lt;&amp;reg_aldo1&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-&amp;r_ir {</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_pio {</div><div class='del'>-	vcc-pm-supply = &lt;&amp;reg_bldo3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;r_rsb {</div><div class='add'>+&amp;r_i2c {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	axp805: pmic@745 {</div><div class='add'>+	axp805: pmic@36 {</div><div class='ctx'> 		compatible = "x-powers,axp805", "x-powers,axp806";</div><div class='del'>-		reg = &lt;0x745&gt;;</div><div class='add'>+		reg = &lt;0x36&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;r_intc&gt;;</div><div class='ctx'> 		interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='hunk'>@@ -241,6 +233,14 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;r_ir {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;r_pio {</div><div class='add'>+	vcc-pm-supply = &lt;&amp;reg_bldo3&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;rtc {</div><div class='ctx'> 	clocks = &lt;&amp;ext_osc32k&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi<br/>index da9de4986660..5a72f0b64247 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v2.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/amazon/alpine-v2.dtsi</a></div><div class='hunk'>@@ -151,7 +151,7 @@</div><div class='ctx'> 			al,msi-num-spis = &lt;160&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		io-fabric@fc000000 {</div><div class='add'>+		io-bus@fc000000 {</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi<br/>index 8b6156b5af65..dea60d136c2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amazon/alpine-v3.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/amazon/alpine-v3.dtsi</a></div><div class='hunk'>@@ -361,7 +361,7 @@</div><div class='ctx'> 			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		io-fabric@fc000000 {</div><div class='add'>+		io-bus@fc000000 {</div><div class='ctx'> 			compatible = "simple-bus";</div><div class='ctx'> 			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			#size-cells = &lt;1&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi<br/>index ab2b3f15ef19..69834b49673d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi</a></div><div class='hunk'>@@ -2313,7 +2313,7 @@</div><div class='ctx'> 					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x19000 0x0 0x20&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-					 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+					 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -2325,7 +2325,7 @@</div><div class='ctx'> 					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x1a000 0x0 0x20&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-					 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+					 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='hunk'>@@ -2337,7 +2337,7 @@</div><div class='ctx'> 					     "amlogic,meson8-pwm-v2";</div><div class='ctx'> 				reg = &lt;0x0 0x1b000 0x0 0x20&gt;;</div><div class='ctx'> 				clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-					 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+					 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 					 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 					 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> 				#pwm-cells = &lt;3&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi<br/>index de35fa2d7a6d..8e3e3354ed67 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi</a></div><div class='hunk'>@@ -116,6 +116,10 @@</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;clkc_audio {</div><div class='add'>+	status = "okay";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;frddr_a {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi<br/>index 8ebce7114a60..6c134592c7bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi</a></div><div class='hunk'>@@ -741,7 +741,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -752,14 +752,14 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_cd {</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi<br/>index 2dc2fdaecf9f..19b8a39de6a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/amlogic/meson-gxl.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/amlogic/meson-gxl.dtsi</a></div><div class='hunk'>@@ -811,7 +811,7 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ab {</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='hunk'>@@ -822,14 +822,14 @@</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_cd {</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;pwm_ef {</div><div class='ctx'> 	clocks = &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='add'>+		 &lt;0&gt;, /* unknown/untested, the datasheet calls it "vid_pll" */</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV4&gt;,</div><div class='ctx'> 		 &lt;&amp;clkc CLKID_FCLK_DIV3&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8103-j293.dts b/arch/arm64/boot/dts/apple/t8103-j293.dts<br/>index 2dfe7b895b2b..e2d9439397f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apple/t8103-j293.dts?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/apple/t8103-j293.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apple/t8103-j293.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/apple/t8103-j293.dts</a></div><div class='hunk'>@@ -77,6 +77,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The driver depends on boot loader initialized state which resets when this</div><div class='add'>+ * power-domain is powered off. This happens on suspend or when the driver is</div><div class='add'>+ * missing during boot. Mark the domain as always on until the driver can</div><div class='add'>+ * handle this.</div><div class='add'>+ */</div><div class='add'>+&amp;ps_dispdfr_be {</div><div class='add'>+	apple,always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;display_dfr {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/apple/t8112-j493.dts b/arch/arm64/boot/dts/apple/t8112-j493.dts<br/>index 3d73f9ee2f46..be86d34c6696 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apple/t8112-j493.dts?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/apple/t8112-j493.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/apple/t8112-j493.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/apple/t8112-j493.dts</a></div><div class='hunk'>@@ -40,6 +40,16 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * The driver depends on boot loader initialized state which resets when this</div><div class='add'>+ * power-domain is powered off. This happens on suspend or when the driver is</div><div class='add'>+ * missing during boot. Mark the domain as always on until the driver can</div><div class='add'>+ * handle this.</div><div class='add'>+ */</div><div class='add'>+&amp;ps_dispdfr_be {</div><div class='add'>+	apple,always-on;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;display_dfr {</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/arm/morello.dtsi b/arch/arm64/boot/dts/arm/morello.dtsi<br/>index 0bab0b3ea969..5bc1c725dc86 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/morello.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/arm/morello.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/arm/morello.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/arm/morello.dtsi</a></div><div class='hunk'>@@ -44,7 +44,7 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_0&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_dvfs 0&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_0: l2-cache-0 {</div><div class='add'>+			l2_0: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				/* 8 ways set associative */</div><div class='hunk'>@@ -53,13 +53,6 @@</div><div class='ctx'> 				cache-sets = &lt;2048&gt;;</div><div class='ctx'> 				cache-unified;</div><div class='ctx'> 				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='del'>-</div><div class='del'>-				l3_0: l3-cache {</div><div class='del'>-					compatible = "cache";</div><div class='del'>-					cache-level = &lt;3&gt;;</div><div class='del'>-					cache-size = &lt;0x100000&gt;;</div><div class='del'>-					cache-unified;</div><div class='del'>-				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='hunk'>@@ -78,7 +71,7 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_1&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_dvfs 0&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_1: l2-cache-1 {</div><div class='add'>+			l2_1: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				/* 8 ways set associative */</div><div class='hunk'>@@ -105,7 +98,7 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_2&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_dvfs 1&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_2: l2-cache-2 {</div><div class='add'>+			l2_2: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				/* 8 ways set associative */</div><div class='hunk'>@@ -132,7 +125,7 @@</div><div class='ctx'> 			next-level-cache = &lt;&amp;l2_3&gt;;</div><div class='ctx'> 			clocks = &lt;&amp;scmi_dvfs 1&gt;;</div><div class='ctx'> </div><div class='del'>-			l2_3: l2-cache-3 {</div><div class='add'>+			l2_3: l2-cache {</div><div class='ctx'> 				compatible = "cache";</div><div class='ctx'> 				cache-level = &lt;2&gt;;</div><div class='ctx'> 				/* 8 ways set associative */</div><div class='hunk'>@@ -143,6 +136,13 @@</div><div class='ctx'> 				next-level-cache = &lt;&amp;l3_0&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='add'>+</div><div class='add'>+		l3_0: l3-cache {</div><div class='add'>+			compatible = "cache";</div><div class='add'>+			cache-level = &lt;3&gt;;</div><div class='add'>+			cache-size = &lt;0x100000&gt;;</div><div class='add'>+			cache-unified;</div><div class='add'>+		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	firmware {</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi<br/>index 7251ad3a0017..b46566f3ce20 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi</a></div><div class='hunk'>@@ -144,6 +144,19 @@</div><div class='ctx'> 		startup-delay-us = &lt;20000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_usdhc2_vsel&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		states = &lt;1800000 0x1&gt;,</div><div class='add'>+			 &lt;3300000 0x0&gt;;</div><div class='add'>+		regulator-name = "PMIC_USDHC_VSELECT";</div><div class='add'>+		vin-supply = &lt;&amp;reg_nvcc_sd&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	reserved-memory {</div><div class='ctx'> 		#address-cells = &lt;2&gt;;</div><div class='ctx'> 		#size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -269,7 +282,7 @@</div><div class='ctx'> 			  "SODIMM_19",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "",</div><div class='del'>-			  "",</div><div class='add'>+			  "PMIC_USDHC_VSELECT",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "",</div><div class='ctx'> 			  "",</div><div class='hunk'>@@ -785,6 +798,7 @@</div><div class='ctx'> 	pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_cd&gt;;</div><div class='ctx'> 	pinctrl-3 = &lt;&amp;pinctrl_usdhc2_sleep&gt;, &lt;&amp;pinctrl_usdhc2_cd_sleep&gt;;</div><div class='ctx'> 	vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_usdhc2_vqmmc&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;wdog1 {</div><div class='hunk'>@@ -1206,13 +1220,17 @@</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5		0x6&gt;;	/* SODIMM 76 */</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	pinctrl_usdhc2_vsel: usdhc2vselgrp {</div><div class='add'>+		fsl,pins =</div><div class='add'>+			&lt;MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4	0x10&gt;; /* PMIC_USDHC_VSELECT */</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the</div><div class='ctx'> 	 * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pinctrl_usdhc2: usdhc2grp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x90&gt;,	/* SODIMM 78 */</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x90&gt;,	/* SODIMM 74 */</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x90&gt;,	/* SODIMM 80 */</div><div class='hunk'>@@ -1223,7 +1241,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x94&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x94&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x94&gt;,</div><div class='hunk'>@@ -1234,7 +1251,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x96&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x96&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x96&gt;,</div><div class='hunk'>@@ -1246,7 +1262,6 @@</div><div class='ctx'> 	/* Avoid backfeeding with removed card power */</div><div class='ctx'> 	pinctrl_usdhc2_sleep: usdhc2slpgrp {</div><div class='ctx'> 		fsl,pins =</div><div class='del'>-			&lt;MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x0&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x0&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x0&gt;,</div><div class='ctx'> 			&lt;MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x0&gt;,</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi<br/>index a1b75c9068b2..2ce1860b244d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi</a></div><div class='hunk'>@@ -24,6 +24,20 @@</div><div class='ctx'> 	fsl,operating-mode = "nominal";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;gpu2d {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_GPU2D_CORE&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;800000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+&amp;gpu3d {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_GPU3D_CORE&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_GPU3D_SHADER_CORE&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;800000000&gt;, &lt;800000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pgc_hdmimix {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_AXI&gt;,</div><div class='ctx'> 			  &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;;</div><div class='hunk'>@@ -46,6 +60,18 @@</div><div class='ctx'> 	assigned-clock-rates = &lt;600000000&gt;, &lt;300000000&gt;;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;pgc_mlmix {</div><div class='add'>+	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_ML_CORE&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_ML_AXI&gt;,</div><div class='add'>+			  &lt;&amp;clk IMX8MP_CLK_ML_AHB&gt;;</div><div class='add'>+	assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;,</div><div class='add'>+				 &lt;&amp;clk IMX8MP_SYS_PLL1_800M&gt;;</div><div class='add'>+	assigned-clock-rates = &lt;800000000&gt;,</div><div class='add'>+			       &lt;800000000&gt;,</div><div class='add'>+			       &lt;300000000&gt;;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;media_blk_ctrl {</div><div class='ctx'> 	assigned-clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI&gt;,</div><div class='ctx'> 			  &lt;&amp;clk IMX8MP_CLK_MEDIA_APB&gt;,</div><div class='hunk'>@@ -62,3 +88,5 @@</div><div class='ctx'> 			       &lt;0&gt;, &lt;0&gt;, &lt;400000000&gt;,</div><div class='ctx'> 			       &lt;1039500000&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/delete-node/ &amp;{noc_opp_table/opp-1000000000};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi<br/>index b2ac2583a592..b59da91fdd04 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi</a></div><div class='hunk'>@@ -35,7 +35,6 @@</div><div class='ctx'> 		      &lt;0x1 0x00000000 0 0xc0000000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {</div><div class='ctx'> 	        compatible = "regulator-fixed";</div><div class='ctx'> 	        regulator-name = "VSD_3V3";</div><div class='hunk'>@@ -46,6 +45,16 @@</div><div class='ctx'> 	        startup-delay-us = &lt;100&gt;;</div><div class='ctx'> 	        off-on-delay-us = &lt;12000&gt;;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {</div><div class='add'>+		compatible = "regulator-gpio";</div><div class='add'>+		regulator-name = "VSD_VSEL";</div><div class='add'>+		regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+		gpios = &lt;&amp;gpio2 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		states = &lt;3300000 0x0 1800000 0x1&gt;;</div><div class='add'>+		vin-supply = &lt;&amp;ldo5&gt;;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;A53_0 {</div><div class='hunk'>@@ -205,6 +214,7 @@</div><div class='ctx'>         pinctrl-2 = &lt;&amp;pinctrl_usdhc2_200mhz&gt;, &lt;&amp;pinctrl_usdhc2_gpio&gt;;</div><div class='ctx'>         cd-gpios = &lt;&amp;gpio1 14 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>         vmmc-supply = &lt;&amp;reg_usdhc2_vmmc&gt;;</div><div class='add'>+	vqmmc-supply = &lt;&amp;reg_usdhc2_vqmmc&gt;;</div><div class='ctx'>         bus-width = &lt;4&gt;;</div><div class='ctx'>         status = "okay";</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi<br/>index ce6793b2d57e..7c1c87eab54c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx8mp.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/freescale/imx8mp.dtsi</a></div><div class='hunk'>@@ -1645,6 +1645,12 @@</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='add'>+				/* Nominal drive mode maximum */</div><div class='add'>+				opp-800000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				/* Overdrive mode maximum */</div><div class='ctx'> 				opp-1000000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 				};</div><div class='head'>diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi<br/>index 9bb26b466a06..59f057ba6fa7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx95.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/freescale/imx95.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/freescale/imx95.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/freescale/imx95.dtsi</a></div><div class='hunk'>@@ -1626,7 +1626,7 @@</div><div class='ctx'> 			reg = &lt;0 0x4c300000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x60100000 0 0xfe00000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c360000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x4c340000 0 0x2000&gt;;</div><div class='add'>+			      &lt;0 0x4c340000 0 0x4000&gt;;</div><div class='ctx'> 			reg-names = "dbi", "config", "atu", "app";</div><div class='ctx'> 			ranges = &lt;0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000&gt;,</div><div class='ctx'> 				 &lt;0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x10000000&gt;;</div><div class='hunk'>@@ -1673,7 +1673,7 @@</div><div class='ctx'> 			reg = &lt;0 0x4c300000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c360000 0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c320000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x4c340000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x4c340000 0 0x4000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c370000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0x9 0 1 0&gt;;</div><div class='ctx'> 			reg-names = "dbi","atu", "dbi2", "app", "dma", "addr_space";</div><div class='hunk'>@@ -1700,7 +1700,7 @@</div><div class='ctx'> 			reg = &lt;0 0x4c380000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;8 0x80100000 0 0xfe00000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3e0000 0 0x10000&gt;,</div><div class='del'>-			      &lt;0 0x4c3c0000 0 0x2000&gt;;</div><div class='add'>+			      &lt;0 0x4c3c0000 0 0x4000&gt;;</div><div class='ctx'> 			reg-names = "dbi", "config", "atu", "app";</div><div class='ctx'> 			ranges = &lt;0x81000000 0 0x00000000 0x8 0x8ff00000 0 0x00100000&gt;,</div><div class='ctx'> 				 &lt;0x82000000 0 0x10000000 0xa 0x10000000 0 0x10000000&gt;;</div><div class='hunk'>@@ -1749,7 +1749,7 @@</div><div class='ctx'> 			reg = &lt;0 0x4c380000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3e0000 0 0x1000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3a0000 0 0x1000&gt;,</div><div class='del'>-			      &lt;0 0x4c3c0000 0 0x2000&gt;,</div><div class='add'>+			      &lt;0 0x4c3c0000 0 0x4000&gt;,</div><div class='ctx'> 			      &lt;0 0x4c3f0000 0 0x10000&gt;,</div><div class='ctx'> 			      &lt;0xa 0 1 0&gt;;</div><div class='ctx'> 			reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space";</div><div class='head'>diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi<br/>index 3a9b6907185d..242820845707 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> </div><div class='ctx'> 	leds {</div><div class='ctx'> 		compatible = "gpio-leds";</div><div class='add'>+		pinctrl-names = "default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;spi_quad_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 		led-power1 {</div><div class='ctx'> 			label = "udpu:green:power";</div><div class='hunk'>@@ -82,8 +84,6 @@</div><div class='ctx'> </div><div class='ctx'> &amp;spi0 {</div><div class='ctx'> 	status = "okay";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;spi_quad_pins&gt;;</div><div class='ctx'> </div><div class='ctx'> 	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='hunk'>@@ -108,6 +108,10 @@</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+&amp;spi_quad_pins {</div><div class='add'>+	function = "gpio";</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> &amp;pinctrl_nb {</div><div class='ctx'> 	i2c2_recovery_pins: i2c2-recovery-pins {</div><div class='ctx'> 		groups = "i2c2";</div><div class='head'>diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi<br/>index 4936fa5b98ff..8eddf0c96098 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/qcom/x1e80100.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/qcom/x1e80100.dtsi</a></div><div class='hunk'>@@ -3752,60 +3752,83 @@</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='ctx'> 			gpu_opp_table: opp-table {</div><div class='del'>-				compatible = "operating-points-v2";</div><div class='add'>+				compatible = "operating-points-v2-adreno", "operating-points-v2";</div><div class='add'>+</div><div class='add'>+				opp-1250000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1250000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L3&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				opp-1175000000 {</div><div class='add'>+					opp-hz = /bits/ 64 &lt;1175000000&gt;;</div><div class='add'>+					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L2&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='add'>+				};</div><div class='ctx'> </div><div class='ctx'> 				opp-1100000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;1100000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='del'>-					opp-peak-kBps = &lt;16500000&gt;;</div><div class='add'>+					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82a5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-1000000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;1000000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82b5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-925000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;925000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;14398438&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82b5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-800000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;12449219&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xa82c5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-744000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;744000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L2&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;10687500&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882e5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-687000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;687000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;8171875&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0x882e5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-550000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;550000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;6074219&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc0285ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-390000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;390000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;3000000&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc0285ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> </div><div class='ctx'> 				opp-300000000 {</div><div class='ctx'> 					opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='ctx'> 					opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS_D1&gt;;</div><div class='ctx'> 					opp-peak-kBps = &lt;2136719&gt;;</div><div class='add'>+					qcom,opp-acd-level = &lt;0xc02b5ffd&gt;;</div><div class='ctx'> 				};</div><div class='ctx'> 			};</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi<br/>index 1edfd643b25a..a334ef0629d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi</a></div><div class='hunk'>@@ -31,7 +31,7 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc3v3_btreg: vcc3v3-btreg {</div><div class='del'>-		compatible = "regulator-gpio";</div><div class='add'>+		compatible = "regulator-fixed";</div><div class='ctx'> 		enable-active-high;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;bt_enable_h&gt;;</div><div class='hunk'>@@ -39,7 +39,6 @@</div><div class='ctx'> 		regulator-min-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'> 		regulator-always-on;</div><div class='del'>-		states = &lt;3300000 0x0&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcc3v3_rf_aux_mod: regulator-vcc3v3-rf-aux-mod {</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi b/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi<br/>index 80db778c9684..b60e68faa83a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi</a></div><div class='hunk'>@@ -26,5 +26,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;vcc3v3_btreg {</div><div class='del'>-	enable-gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	gpios = &lt;&amp;gpio1 RK_PC3 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts b/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts<br/>index 165d09ccb942..5886b802c520 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts</a></div><div class='hunk'>@@ -39,5 +39,5 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;vcc3v3_btreg {</div><div class='del'>-	enable-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi<br/>index 541dca12bf1a..046dbe329017 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> 	sdio_pwrseq: sdio-pwrseq {</div><div class='ctx'> 		compatible = "mmc-pwrseq-simple";</div><div class='ctx'> 		clocks = &lt;&amp;rk808 1&gt;;</div><div class='del'>-		clock-names = "lpo";</div><div class='add'>+		clock-names = "ext_clock";</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;wifi_enable_h&gt;;</div><div class='ctx'> 		reset-gpios = &lt;&amp;gpio0 RK_PB2 GPIO_ACTIVE_LOW&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi<br/>index a48351471764..e7ba477e75f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi</a></div><div class='hunk'>@@ -775,7 +775,7 @@</div><div class='ctx'> 	rockchip,default-sample-phase = &lt;90&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> </div><div class='del'>-	sdio-wifi@1 {</div><div class='add'>+	wifi@1 {</div><div class='ctx'> 		compatible = "brcm,bcm4329-fmac";</div><div class='ctx'> 		reg = &lt;1&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts<br/>index 7bd32d230ad2..b80d628c426b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts</a></div><div class='hunk'>@@ -619,6 +619,8 @@</div><div class='ctx'> 	bus-width = &lt;8&gt;;</div><div class='ctx'> 	max-frequency = &lt;200000000&gt;;</div><div class='ctx'> 	non-removable;</div><div class='add'>+	pinctrl-names = "default";</div><div class='add'>+	pinctrl-0 = &lt;&amp;emmc_bus8 &amp;emmc_clk &amp;emmc_cmd &amp;emmc_datastrobe&gt;;</div><div class='ctx'> 	status = "okay";</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts<br/>index 828bde7fab68..314067ba6f3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts</a></div><div class='hunk'>@@ -610,7 +610,7 @@</div><div class='ctx'> 		reg = &lt;0x51&gt;;</div><div class='ctx'> 		clock-output-names = "hym8563";</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;RK_PB0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		interrupts = &lt;RK_PA0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'> 		pinctrl-names = "default";</div><div class='ctx'> 		pinctrl-0 = &lt;&amp;hym8563_int&gt;;</div><div class='ctx'> 		wakeup-source;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi<br/>index 1af0a30866f6..af431fdcbea7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi</a></div><div class='hunk'>@@ -222,6 +222,10 @@</div><div class='ctx'> 		compatible = "realtek,rt5616";</div><div class='ctx'> 		reg = &lt;0x1b&gt;;</div><div class='ctx'> 		#sound-dai-cells = &lt;0&gt;;</div><div class='add'>+		assigned-clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		assigned-clock-rates = &lt;12288000&gt;;</div><div class='add'>+		clocks = &lt;&amp;cru I2S0_8CH_MCLKOUT&gt;;</div><div class='add'>+		clock-names = "mclk";</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi<br/>index 711ac4f2c7cb..60ad272982ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi</a></div><div class='hunk'>@@ -214,6 +214,8 @@</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> &amp;package_thermal {</div><div class='add'>+	polling-delay = &lt;1000&gt;;</div><div class='add'>+</div><div class='ctx'> 	trips {</div><div class='ctx'> 		package_active1: trip-active1 {</div><div class='ctx'> 			temperature = &lt;45000&gt;;</div><div class='head'>diff --git a/arch/arm64/boot/dts/rockchip/rk3588j.dtsi b/arch/arm64/boot/dts/rockchip/rk3588j.dtsi<br/>index bce72bac4503..3045cb3bd68c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588j.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/rockchip/rk3588j.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588j.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/rockchip/rk3588j.dtsi</a></div><div class='hunk'>@@ -11,20 +11,15 @@</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='ctx'> </div><div class='del'>-		opp-1416000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='add'>+		opp-1200000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 			opp-suspend;</div><div class='ctx'> 		};</div><div class='del'>-		opp-1608000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1608000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;887500 887500 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-1704000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1704000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;937500 937500 950000&gt;;</div><div class='add'>+		opp-1296000000 {</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1296000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;775000 775000 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -33,9 +28,14 @@</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='ctx'> </div><div class='add'>+		opp-1200000000{</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 		opp-1416000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			opp-microvolt = &lt;762500 762500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1608000000 {</div><div class='hunk'>@@ -43,25 +43,20 @@</div><div class='ctx'> 			opp-microvolt = &lt;787500 787500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		opp-1800000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;875000 875000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-2016000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;950000 950000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	cluster2_opp_table: opp-table-cluster2 {</div><div class='ctx'> 		compatible = "operating-points-v2";</div><div class='ctx'> 		opp-shared;</div><div class='ctx'> </div><div class='add'>+		opp-1200000000{</div><div class='add'>+			opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='add'>+			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			clock-latency-ns = &lt;40000&gt;;</div><div class='add'>+		};</div><div class='ctx'> 		opp-1416000000 {</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;1416000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;750000 750000 950000&gt;;</div><div class='add'>+			opp-microvolt = &lt;762500 762500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 		opp-1608000000 {</div><div class='hunk'>@@ -69,16 +64,6 @@</div><div class='ctx'> 			opp-microvolt = &lt;787500 787500 950000&gt;;</div><div class='ctx'> 			clock-latency-ns = &lt;40000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		opp-1800000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;1800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;875000 875000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-2016000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;2016000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;950000 950000 950000&gt;;</div><div class='del'>-			clock-latency-ns = &lt;40000&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	gpu_opp_table: opp-table {</div><div class='hunk'>@@ -104,10 +89,6 @@</div><div class='ctx'> 			opp-hz = /bits/ 64 &lt;700000000&gt;;</div><div class='ctx'> 			opp-microvolt = &lt;750000 750000 850000&gt;;</div><div class='ctx'> 		};</div><div class='del'>-		opp-850000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;800000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;787500 787500 850000&gt;;</div><div class='del'>-		};</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/st/stm32mp211.dtsi<br/>index 6dd1377f3e1d..bf888d60cd4f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp211.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/st/stm32mp211.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp211.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/st/stm32mp211.dtsi</a></div><div class='hunk'>@@ -116,11 +116,11 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@4ac10000 {</div><div class='del'>-			compatible = "arm,cortex-a7-gic";</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='ctx'> 			reg = &lt;0x4ac10000 0x0 0x1000&gt;,</div><div class='del'>-			      &lt;0x4ac20000 0x0 0x2000&gt;,</div><div class='del'>-			      &lt;0x4ac40000 0x0 0x2000&gt;,</div><div class='del'>-			      &lt;0x4ac60000 0x0 0x2000&gt;;</div><div class='add'>+			      &lt;0x4ac20000 0x0 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac40000 0x0 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac60000 0x0 0x20000&gt;;</div><div class='ctx'> 			      #interrupt-cells = &lt;3&gt;;</div><div class='ctx'> 			      interrupt-controller;</div><div class='ctx'> 		};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/st/stm32mp231.dtsi<br/>index 8820d219a33e..75697acd1345 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp231.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/st/stm32mp231.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp231.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/st/stm32mp231.dtsi</a></div><div class='hunk'>@@ -1201,13 +1201,12 @@</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 		intc: interrupt-controller@4ac10000 {</div><div class='del'>-			compatible = "arm,cortex-a7-gic";</div><div class='add'>+			compatible = "arm,gic-400";</div><div class='ctx'> 			reg = &lt;0x4ac10000 0x1000&gt;,</div><div class='del'>-			      &lt;0x4ac20000 0x2000&gt;,</div><div class='del'>-			      &lt;0x4ac40000 0x2000&gt;,</div><div class='del'>-			      &lt;0x4ac60000 0x2000&gt;;</div><div class='add'>+			      &lt;0x4ac20000 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac40000 0x20000&gt;,</div><div class='add'>+			      &lt;0x4ac60000 0x20000&gt;;</div><div class='ctx'> 			#interrupt-cells = &lt;3&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='ctx'> 			interrupt-controller;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi<br/>index f3c6cdfd7008..87110f91e489 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp251.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/boot/dts/st/stm32mp251.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/boot/dts/st/stm32mp251.dtsi</a></div><div class='hunk'>@@ -115,14 +115,13 @@</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	intc: interrupt-controller@4ac00000 {</div><div class='del'>-		compatible = "arm,cortex-a7-gic";</div><div class='add'>+		compatible = "arm,gic-400";</div><div class='ctx'> 		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		interrupt-controller;</div><div class='ctx'> 		reg = &lt;0x0 0x4ac10000 0x0 0x1000&gt;,</div><div class='del'>-		      &lt;0x0 0x4ac20000 0x0 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0x4ac40000 0x0 0x2000&gt;,</div><div class='del'>-		      &lt;0x0 0x4ac60000 0x0 0x2000&gt;;</div><div class='add'>+		      &lt;0x0 0x4ac20000 0x0 0x20000&gt;,</div><div class='add'>+		      &lt;0x0 0x4ac40000 0x0 0x20000&gt;,</div><div class='add'>+		      &lt;0x0 0x4ac60000 0x0 0x20000&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	psci {</div><div class='head'>diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig<br/>index 5bb8f09422a2..a61154545c89 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/configs/defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/configs/defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/configs/defconfig</a></div><div class='hunk'>@@ -1010,6 +1010,7 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m</div><div class='ctx'> CONFIG_SND_SOC_RK3399_GRU_SOUND=m</div><div class='ctx'> CONFIG_SND_SOC_SAMSUNG=y</div><div class='ctx'> CONFIG_SND_SOC_RCAR=m</div><div class='add'>+CONFIG_SND_SOC_MSIOF=m</div><div class='ctx'> CONFIG_SND_SOC_RZ=m</div><div class='ctx'> CONFIG_SND_SOC_SOF_TOPLEVEL=y</div><div class='ctx'> CONFIG_SND_SOC_SOF_OF=y</div><div class='hunk'>@@ -1474,29 +1475,6 @@ CONFIG_QCOM_WCNSS_CTRL=m</div><div class='ctx'> CONFIG_QCOM_APR=m</div><div class='ctx'> CONFIG_QCOM_ICC_BWMON=m</div><div class='ctx'> CONFIG_QCOM_PBS=m</div><div class='del'>-CONFIG_ARCH_R8A77995=y</div><div class='del'>-CONFIG_ARCH_R8A77990=y</div><div class='del'>-CONFIG_ARCH_R8A77951=y</div><div class='del'>-CONFIG_ARCH_R8A77965=y</div><div class='del'>-CONFIG_ARCH_R8A77960=y</div><div class='del'>-CONFIG_ARCH_R8A77961=y</div><div class='del'>-CONFIG_ARCH_R8A779F0=y</div><div class='del'>-CONFIG_ARCH_R8A77980=y</div><div class='del'>-CONFIG_ARCH_R8A77970=y</div><div class='del'>-CONFIG_ARCH_R8A779A0=y</div><div class='del'>-CONFIG_ARCH_R8A779G0=y</div><div class='del'>-CONFIG_ARCH_R8A779H0=y</div><div class='del'>-CONFIG_ARCH_R8A774C0=y</div><div class='del'>-CONFIG_ARCH_R8A774E1=y</div><div class='del'>-CONFIG_ARCH_R8A774A1=y</div><div class='del'>-CONFIG_ARCH_R8A774B1=y</div><div class='del'>-CONFIG_ARCH_R9A07G043=y</div><div class='del'>-CONFIG_ARCH_R9A07G044=y</div><div class='del'>-CONFIG_ARCH_R9A07G054=y</div><div class='del'>-CONFIG_ARCH_R9A08G045=y</div><div class='del'>-CONFIG_ARCH_R9A09G011=y</div><div class='del'>-CONFIG_ARCH_R9A09G047=y</div><div class='del'>-CONFIG_ARCH_R9A09G057=y</div><div class='ctx'> CONFIG_ROCKCHIP_IODOMAIN=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_132_SOC=y</div><div class='ctx'> CONFIG_ARCH_TEGRA_210_SOC=y</div><div class='hunk'>@@ -1550,10 +1528,11 @@ CONFIG_PWM_IMX27=m</div><div class='ctx'> CONFIG_PWM_MESON=m</div><div class='ctx'> CONFIG_PWM_MTK_DISP=m</div><div class='ctx'> CONFIG_PWM_MEDIATEK=m</div><div class='del'>-CONFIG_PWM_RCAR=m</div><div class='add'>+CONFIG_PWM_RENESAS_RCAR=m</div><div class='add'>+CONFIG_PWM_RENESAS_RZG2L_GPT=m</div><div class='add'>+CONFIG_PWM_RENESAS_RZ_MTU3=m</div><div class='ctx'> CONFIG_PWM_RENESAS_TPU=m</div><div class='ctx'> CONFIG_PWM_ROCKCHIP=y</div><div class='del'>-CONFIG_PWM_RZ_MTU3=m</div><div class='ctx'> CONFIG_PWM_SAMSUNG=y</div><div class='ctx'> CONFIG_PWM_SL28CPLD=m</div><div class='ctx'> CONFIG_PWM_SUN4I=m</div><div class='hunk'>@@ -1729,15 +1708,14 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_CHACHA20=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_ECHAINIV=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA20_NEON=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_ARM64_CE=y</div><div class='ctx'> CONFIG_CRYPTO_SHA1_ARM64_CE=y</div><div class='del'>-CONFIG_CRYPTO_SHA2_ARM64_CE=y</div><div class='ctx'> CONFIG_CRYPTO_SHA512_ARM64_CE=m</div><div class='ctx'> CONFIG_CRYPTO_SHA3_ARM64=m</div><div class='ctx'> CONFIG_CRYPTO_SM3_ARM64_CE=m</div><div class='head'>diff --git a/arch/arm64/crypto/Kconfig b/arch/arm64/crypto/Kconfig<br/>index 3418c8d3c78d..c44b0f202a1f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/Kconfig</a></div><div class='hunk'>@@ -25,18 +25,6 @@ config CRYPTO_NHPOLY1305_NEON</div><div class='ctx'> 	  Architecture: arm64 using:</div><div class='ctx'> 	  - NEON (Advanced SIMD) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_POLY1305_NEON</div><div class='del'>-	tristate</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='del'>-	default CRYPTO_LIB_POLY1305_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA1_ARM64_CE</div><div class='ctx'> 	tristate "Hash functions: SHA-1 (ARMv8 Crypto Extensions)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='hunk'>@@ -48,25 +36,6 @@ config CRYPTO_SHA1_ARM64_CE</div><div class='ctx'> 	  Architecture: arm64 using:</div><div class='ctx'> 	  - ARMv8 Crypto Extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_ARM64</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64</div><div class='del'>-</div><div class='del'>-config CRYPTO_SHA2_ARM64_CE</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SHA256_ARM64</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - ARMv8 Crypto Extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA512_ARM64</div><div class='ctx'> 	tristate "Hash functions: SHA-384 and SHA-512"</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='hunk'>@@ -101,7 +70,7 @@ config CRYPTO_SM3_NEON</div><div class='ctx'> 	tristate "Hash functions: SM3 (NEON)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)</div><div class='ctx'> </div><div class='hunk'>@@ -112,7 +81,7 @@ config CRYPTO_SM3_ARM64_CE</div><div class='ctx'> 	tristate "Hash functions: SM3 (ARMv8.2 Crypto Extensions)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)</div><div class='ctx'> </div><div class='hunk'>@@ -143,7 +112,7 @@ config CRYPTO_AES_ARM64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_ARM64_CE</div><div class='ctx'> 	tristate "Ciphers: AES (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on ARM64 &amp;&amp; KERNEL_MODE_NEON</div><div class='add'>+	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='ctx'> 	help</div><div class='hunk'>@@ -186,20 +155,6 @@ config CRYPTO_AES_ARM64_NEON_BLK</div><div class='ctx'> 	  Architecture: arm64 using:</div><div class='ctx'> 	  - NEON (Advanced SIMD) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA20_NEON</div><div class='del'>-	tristate</div><div class='del'>-	depends on KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	default CRYPTO_LIB_CHACHA_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: arm64 using:</div><div class='del'>-	  - NEON (Advanced SIMD) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_AES_ARM64_BS</div><div class='ctx'> 	tristate "Ciphers: AES, modes: ECB/CBC/CTR/XCTR/XTS modes (bit-sliced NEON)"</div><div class='ctx'> 	depends on KERNEL_MODE_NEON</div><div class='hunk'>@@ -267,7 +222,7 @@ config CRYPTO_SM4_ARM64_NEON_BLK</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_ARM64_CE_CCM</div><div class='ctx'> 	tristate "AEAD cipher: AES in CCM mode (ARMv8 Crypto Extensions)"</div><div class='del'>-	depends on ARM64 &amp;&amp; KERNEL_MODE_NEON</div><div class='add'>+	depends on KERNEL_MODE_NEON</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_AES_ARM64_CE</div><div class='ctx'> 	select CRYPTO_AES_ARM64_CE_BLK</div><div class='head'>diff --git a/arch/arm64/crypto/Makefile b/arch/arm64/crypto/Makefile<br/>index e7139c4768ce..c231c980c514 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/Makefile</a></div><div class='hunk'>@@ -8,9 +8,6 @@</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_ARM64_CE) += sha1-ce.o</div><div class='ctx'> sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA2_ARM64_CE) += sha2-ce.o</div><div class='del'>-sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512_ARM64_CE) += sha512-ce.o</div><div class='ctx'> sha512-ce-y := sha512-ce-glue.o sha512-ce-core.o</div><div class='ctx'> </div><div class='hunk'>@@ -56,19 +53,9 @@ aes-ce-blk-y := aes-glue-ce.o aes-ce.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o</div><div class='ctx'> aes-neon-blk-y := aes-glue-neon.o aes-neon.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_ARM64) += sha256-arm64.o</div><div class='del'>-sha256-arm64-y := sha256-glue.o sha256-core.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512_ARM64) += sha512-arm64.o</div><div class='ctx'> sha512-arm64-y := sha512-glue.o sha512-core.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o</div><div class='del'>-chacha-neon-y := chacha-neon-core.o chacha-neon-glue.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_NEON) += poly1305-neon.o</div><div class='del'>-poly1305-neon-y := poly1305-core.o poly1305-glue.o</div><div class='del'>-AFLAGS_poly1305-core.o += -Dpoly1305_init=poly1305_init_arm64</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o</div><div class='ctx'> nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o</div><div class='ctx'> </div><div class='hunk'>@@ -81,10 +68,7 @@ aes-neon-bs-y := aes-neonbs-core.o aes-neonbs-glue.o</div><div class='ctx'> quiet_cmd_perlasm = PERLASM $@</div><div class='ctx'>       cmd_perlasm = $(PERL) $(&lt;) void $(@)</div><div class='ctx'> </div><div class='del'>-$(obj)/%-core.S: $(src)/%-armv8.pl</div><div class='del'>-	$(call cmd,perlasm)</div><div class='del'>-</div><div class='del'>-$(obj)/sha256-core.S: $(src)/sha512-armv8.pl</div><div class='add'>+$(obj)/sha512-core.S: $(src)/../lib/crypto/sha2-armv8.pl</div><div class='ctx'> 	$(call cmd,perlasm)</div><div class='ctx'> </div><div class='del'>-clean-files += poly1305-core.S sha256-core.S sha512-core.S</div><div class='add'>+clean-files += sha512-core.S</div><div class='head'>diff --git a/arch/arm64/crypto/aes-glue.c b/arch/arm64/crypto/aes-glue.c<br/>index b0150999743f..81560f722b9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/aes-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/aes-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/aes-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/aes-glue.c</a></div><div class='hunk'>@@ -5,19 +5,20 @@</div><div class='ctx'>  * Copyright (C) 2013 - 2017 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;crypto/sha2.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aes-ce-setkey.h"</div><div class='ctx'> </div><div class='hunk'>@@ -130,7 +131,6 @@ struct mac_tfm_ctx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mac_desc_ctx {</div><div class='del'>-	unsigned int len;</div><div class='ctx'> 	u8 dg[AES_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -869,109 +869,64 @@ static int mac_init(struct shash_desc *desc)</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='ctx'> 	memset(ctx-&gt;dg, 0, AES_BLOCK_SIZE);</div><div class='del'>-	ctx-&gt;len = 0;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mac_do_update(struct crypto_aes_ctx *ctx, u8 const in[], int blocks,</div><div class='del'>-			  u8 dg[], int enc_before, int enc_after)</div><div class='add'>+			  u8 dg[], int enc_before)</div><div class='ctx'> {</div><div class='ctx'> 	int rounds = 6 + ctx-&gt;key_length / 4;</div><div class='add'>+	int rem;</div><div class='ctx'> </div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		int rem;</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			rem = aes_mac_update(in, ctx-&gt;key_enc, rounds, blocks,</div><div class='del'>-					     dg, enc_before, enc_after);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-			in += (blocks - rem) * AES_BLOCK_SIZE;</div><div class='del'>-			blocks = rem;</div><div class='del'>-			enc_before = 0;</div><div class='del'>-		} while (blocks);</div><div class='del'>-	} else {</div><div class='del'>-		if (enc_before)</div><div class='del'>-			aes_encrypt(ctx, dg, dg);</div><div class='del'>-</div><div class='del'>-		while (blocks--) {</div><div class='del'>-			crypto_xor(dg, in, AES_BLOCK_SIZE);</div><div class='del'>-			in += AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			if (blocks || enc_after)</div><div class='del'>-				aes_encrypt(ctx, dg, dg);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	do {</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		rem = aes_mac_update(in, ctx-&gt;key_enc, rounds, blocks,</div><div class='add'>+				     dg, enc_before, !enc_before);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+		in += (blocks - rem) * AES_BLOCK_SIZE;</div><div class='add'>+		blocks = rem;</div><div class='add'>+	} while (blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mac_update(struct shash_desc *desc, const u8 *p, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	int blocks = len / AES_BLOCK_SIZE;</div><div class='ctx'> </div><div class='del'>-	while (len &gt; 0) {</div><div class='del'>-		unsigned int l;</div><div class='del'>-</div><div class='del'>-		if ((ctx-&gt;len % AES_BLOCK_SIZE) == 0 &amp;&amp;</div><div class='del'>-		    (ctx-&gt;len + len) &gt; AES_BLOCK_SIZE) {</div><div class='del'>-</div><div class='del'>-			int blocks = len / AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			len %= AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			mac_do_update(&amp;tctx-&gt;key, p, blocks, ctx-&gt;dg,</div><div class='del'>-				      (ctx-&gt;len != 0), (len != 0));</div><div class='del'>-</div><div class='del'>-			p += blocks * AES_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			if (!len) {</div><div class='del'>-				ctx-&gt;len = AES_BLOCK_SIZE;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			ctx-&gt;len = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		l = min(len, AES_BLOCK_SIZE - ctx-&gt;len);</div><div class='del'>-</div><div class='del'>-		if (l &lt;= AES_BLOCK_SIZE) {</div><div class='del'>-			crypto_xor(ctx-&gt;dg + ctx-&gt;len, p, l);</div><div class='del'>-			ctx-&gt;len += l;</div><div class='del'>-			len -= l;</div><div class='del'>-			p += l;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	len %= AES_BLOCK_SIZE;</div><div class='add'>+	mac_do_update(&amp;tctx-&gt;key, p, blocks, ctx-&gt;dg, 0);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cbcmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int cbcmac_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	mac_do_update(&amp;tctx-&gt;key, NULL, 0, ctx-&gt;dg, (ctx-&gt;len != 0), 0);</div><div class='del'>-</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(ctx-&gt;dg, src, len);</div><div class='add'>+		mac_do_update(&amp;tctx-&gt;key, NULL, 0, ctx-&gt;dg, 1);</div><div class='add'>+	}</div><div class='ctx'> 	memcpy(out, ctx-&gt;dg, AES_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int cmac_finup(struct shash_desc *desc, const u8 *src, unsigned int len,</div><div class='add'>+		      u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> 	u8 *consts = tctx-&gt;consts;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len != AES_BLOCK_SIZE) {</div><div class='del'>-		ctx-&gt;dg[ctx-&gt;len] ^= 0x80;</div><div class='add'>+	crypto_xor(ctx-&gt;dg, src, len);</div><div class='add'>+	if (len != AES_BLOCK_SIZE) {</div><div class='add'>+		ctx-&gt;dg[len] ^= 0x80;</div><div class='ctx'> 		consts += AES_BLOCK_SIZE;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	mac_do_update(&amp;tctx-&gt;key, consts, 1, ctx-&gt;dg, 0, 1);</div><div class='del'>-</div><div class='add'>+	mac_do_update(&amp;tctx-&gt;key, consts, 1, ctx-&gt;dg, 0);</div><div class='ctx'> 	memcpy(out, ctx-&gt;dg, AES_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -979,6 +934,8 @@ static struct shash_alg mac_algs[] = { {</div><div class='ctx'> 	.base.cra_name		= "cmac(aes)",</div><div class='ctx'> 	.base.cra_driver_name	= "cmac-aes-" MODE,</div><div class='ctx'> 	.base.cra_priority	= PRIO,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct mac_tfm_ctx) +</div><div class='ctx'> 				  2 * AES_BLOCK_SIZE,</div><div class='hunk'>@@ -987,13 +944,15 @@ static struct shash_alg mac_algs[] = { {</div><div class='ctx'> 	.digestsize		= AES_BLOCK_SIZE,</div><div class='ctx'> 	.init			= mac_init,</div><div class='ctx'> 	.update			= mac_update,</div><div class='del'>-	.final			= cmac_final,</div><div class='add'>+	.finup			= cmac_finup,</div><div class='ctx'> 	.setkey			= cmac_setkey,</div><div class='ctx'> 	.descsize		= sizeof(struct mac_desc_ctx),</div><div class='ctx'> }, {</div><div class='ctx'> 	.base.cra_name		= "xcbc(aes)",</div><div class='ctx'> 	.base.cra_driver_name	= "xcbc-aes-" MODE,</div><div class='ctx'> 	.base.cra_priority	= PRIO,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct mac_tfm_ctx) +</div><div class='ctx'> 				  2 * AES_BLOCK_SIZE,</div><div class='hunk'>@@ -1002,21 +961,22 @@ static struct shash_alg mac_algs[] = { {</div><div class='ctx'> 	.digestsize		= AES_BLOCK_SIZE,</div><div class='ctx'> 	.init			= mac_init,</div><div class='ctx'> 	.update			= mac_update,</div><div class='del'>-	.final			= cmac_final,</div><div class='add'>+	.finup			= cmac_finup,</div><div class='ctx'> 	.setkey			= xcbc_setkey,</div><div class='ctx'> 	.descsize		= sizeof(struct mac_desc_ctx),</div><div class='ctx'> }, {</div><div class='ctx'> 	.base.cra_name		= "cbcmac(aes)",</div><div class='ctx'> 	.base.cra_driver_name	= "cbcmac-aes-" MODE,</div><div class='ctx'> 	.base.cra_priority	= PRIO,</div><div class='del'>-	.base.cra_blocksize	= 1,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='add'>+	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct mac_tfm_ctx),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> </div><div class='ctx'> 	.digestsize		= AES_BLOCK_SIZE,</div><div class='ctx'> 	.init			= mac_init,</div><div class='ctx'> 	.update			= mac_update,</div><div class='del'>-	.final			= cbcmac_final,</div><div class='add'>+	.finup			= cbcmac_finup,</div><div class='ctx'> 	.setkey			= cbcmac_setkey,</div><div class='ctx'> 	.descsize		= sizeof(struct mac_desc_ctx),</div><div class='ctx'> } };</div><div class='head'>diff --git a/arch/arm64/crypto/chacha-neon-glue.c b/arch/arm64/crypto/chacha-neon-glue.c<br/>deleted file mode 100644<br/>index 229876acfc58..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/chacha-neon-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/chacha-neon-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,237 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * ARM NEON and scalar accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2016 - 2017 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Based on:</div><div class='del'>- * ChaCha20 256-bit cipher algorithm, RFC7539, SIMD glue code</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_block_xor_neon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				      int nrounds);</div><div class='del'>-asmlinkage void chacha_4block_xor_neon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       int nrounds, int bytes);</div><div class='del'>-asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-</div><div class='del'>-static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-			  int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	while (bytes &gt; 0) {</div><div class='del'>-		int l = min(bytes, CHACHA_BLOCK_SIZE * 5);</div><div class='del'>-</div><div class='del'>-		if (l &lt;= CHACHA_BLOCK_SIZE) {</div><div class='del'>-			u8 buf[CHACHA_BLOCK_SIZE];</div><div class='del'>-</div><div class='del'>-			memcpy(buf, src, l);</div><div class='del'>-			chacha_block_xor_neon(state, buf, buf, nrounds);</div><div class='del'>-			memcpy(dst, buf, l);</div><div class='del'>-			state[12] += 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		chacha_4block_xor_neon(state, dst, src, nrounds, l);</div><div class='del'>-		bytes -= l;</div><div class='del'>-		src += l;</div><div class='del'>-		dst += l;</div><div class='del'>-		state[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_neon) || !crypto_simd_usable()) {</div><div class='del'>-		hchacha_block_generic(state, stream, nrounds);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		hchacha_block_neon(state, stream, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-		       int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_neon) || bytes &lt;= CHACHA_BLOCK_SIZE ||</div><div class='del'>-	    !crypto_simd_usable())</div><div class='del'>-		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		chacha_doneon(state, dst, src, todo, nrounds);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-</div><div class='del'>-		bytes -= todo;</div><div class='del'>-		src += todo;</div><div class='del'>-		dst += todo;</div><div class='del'>-	} while (bytes);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_neon_stream_xor(struct skcipher_request *req,</div><div class='del'>-				  const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = rounddown(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (!static_branch_likely(&amp;have_neon) ||</div><div class='del'>-		    !crypto_simd_usable()) {</div><div class='del'>-			chacha_crypt_generic(state, walk.dst.virt.addr,</div><div class='del'>-					     walk.src.virt.addr, nbytes,</div><div class='del'>-					     ctx-&gt;nrounds);</div><div class='del'>-		} else {</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			chacha_doneon(state, walk.dst.virt.addr,</div><div class='del'>-				      walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-		}</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_neon_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_neon(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-	hchacha_block_arch(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_neon_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 5 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_neon,</div><div class='del'>-		.decrypt		= chacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 5 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-neon",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.walksize		= 5 * CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_neon,</div><div class='del'>-		.decrypt		= xchacha_neon,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_have_named_feature(ASIMD))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	static_branch_enable(&amp;have_neon);</div><div class='del'>-</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) ?</div><div class='del'>-		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_simd_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) &amp;&amp; cpu_have_named_feature(ASIMD))</div><div class='del'>-		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_simd_mod_init);</div><div class='del'>-module_exit(chacha_simd_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (NEON accelerated)");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-neon");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-neon");</div><div class='head'>diff --git a/arch/arm64/crypto/ghash-ce-glue.c b/arch/arm64/crypto/ghash-ce-glue.c<br/>index 071e122f9c37..4995b6e22335 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/ghash-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/ghash-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/ghash-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/ghash-ce-glue.c</a></div><div class='hunk'>@@ -6,30 +6,27 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/gcm.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='add'>+#include &lt;crypto/gcm.h&gt;</div><div class='add'>+#include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("GHASH and AES-GCM using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("ghash");</div><div class='ctx'> </div><div class='del'>-#define GHASH_BLOCK_SIZE	16</div><div class='del'>-#define GHASH_DIGEST_SIZE	16</div><div class='del'>-</div><div class='ctx'> #define RFC4106_NONCE_SIZE	4</div><div class='ctx'> </div><div class='ctx'> struct ghash_key {</div><div class='hunk'>@@ -37,10 +34,8 @@ struct ghash_key {</div><div class='ctx'> 	u64			h[][2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ghash_desc_ctx {</div><div class='add'>+struct arm_ghash_desc_ctx {</div><div class='ctx'> 	u64 digest[GHASH_DIGEST_SIZE/sizeof(u64)];</div><div class='del'>-	u8 buf[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct gcm_aes_ctx {</div><div class='hunk'>@@ -65,36 +60,12 @@ asmlinkage int pmull_gcm_decrypt(int bytes, u8 dst[], const u8 src[],</div><div class='ctx'> </div><div class='ctx'> static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	*ctx = (struct ghash_desc_ctx){};</div><div class='add'>+	*ctx = (struct arm_ghash_desc_ctx){};</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ghash_do_update(int blocks, u64 dg[], const char *src,</div><div class='del'>-			    struct ghash_key *key, const char *head)</div><div class='del'>-{</div><div class='del'>-	be128 dst = { cpu_to_be64(dg[1]), cpu_to_be64(dg[0]) };</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		const u8 *in = src;</div><div class='del'>-</div><div class='del'>-		if (head) {</div><div class='del'>-			in = head;</div><div class='del'>-			blocks++;</div><div class='del'>-			head = NULL;</div><div class='del'>-		} else {</div><div class='del'>-			src += GHASH_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		crypto_xor((u8 *)&amp;dst, in, GHASH_BLOCK_SIZE);</div><div class='del'>-		gf128mul_lle(&amp;dst, &amp;key-&gt;k);</div><div class='del'>-	} while (--blocks);</div><div class='del'>-</div><div class='del'>-	dg[0] = be64_to_cpu(dst.b);</div><div class='del'>-	dg[1] = be64_to_cpu(dst.a);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static __always_inline</div><div class='ctx'> void ghash_do_simd_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> 			  struct ghash_key *key, const char *head,</div><div class='hunk'>@@ -103,13 +74,9 @@ void ghash_do_simd_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> 					      u64 const h[][2],</div><div class='ctx'> 					      const char *head))</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		simd_update(blocks, dg, src, key-&gt;h, head);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		ghash_do_update(blocks, dg, src, key, head);</div><div class='del'>-	}</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	simd_update(blocks, dg, src, key-&gt;h, head);</div><div class='add'>+	kernel_neon_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* avoid hogging the CPU for too long */</div><div class='hunk'>@@ -118,61 +85,59 @@ void ghash_do_simd_update(int blocks, u64 dg[], const char *src,</div><div class='ctx'> static int ghash_update(struct shash_desc *desc, const u8 *src,</div><div class='ctx'> 			unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	int blocks;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;count += len;</div><div class='add'>+	blocks = len / GHASH_BLOCK_SIZE;</div><div class='add'>+	len -= blocks * GHASH_BLOCK_SIZE;</div><div class='ctx'> </div><div class='del'>-	if ((partial + len) &gt;= GHASH_BLOCK_SIZE) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-		int blocks;</div><div class='del'>-</div><div class='del'>-		if (partial) {</div><div class='del'>-			int p = GHASH_BLOCK_SIZE - partial;</div><div class='add'>+	do {</div><div class='add'>+		int chunk = min(blocks, MAX_BLOCKS);</div><div class='ctx'> </div><div class='del'>-			memcpy(ctx-&gt;buf + partial, src, p);</div><div class='del'>-			src += p;</div><div class='del'>-			len -= p;</div><div class='del'>-		}</div><div class='add'>+		ghash_do_simd_update(chunk, ctx-&gt;digest, src, key, NULL,</div><div class='add'>+				     pmull_ghash_update_p8);</div><div class='add'>+		blocks -= chunk;</div><div class='add'>+		src += chunk * GHASH_BLOCK_SIZE;</div><div class='add'>+	} while (unlikely(blocks &gt; 0));</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		blocks = len / GHASH_BLOCK_SIZE;</div><div class='del'>-		len %= GHASH_BLOCK_SIZE;</div><div class='add'>+static int ghash_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	u8 *dst = out;</div><div class='ctx'> </div><div class='del'>-		do {</div><div class='del'>-			int chunk = min(blocks, MAX_BLOCKS);</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='add'>+	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			ghash_do_simd_update(chunk, ctx-&gt;digest, src, key,</div><div class='del'>-					     partial ? ctx-&gt;buf : NULL,</div><div class='del'>-					     pmull_ghash_update_p8);</div><div class='add'>+static int ghash_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	const u8 *src = in;</div><div class='ctx'> </div><div class='del'>-			blocks -= chunk;</div><div class='del'>-			src += chunk * GHASH_BLOCK_SIZE;</div><div class='del'>-			partial = 0;</div><div class='del'>-		} while (unlikely(blocks &gt; 0));</div><div class='del'>-	}</div><div class='del'>-	if (len)</div><div class='del'>-		memcpy(ctx-&gt;buf + partial, src, len);</div><div class='add'>+	ctx-&gt;digest[1] = get_unaligned_be64(src);</div><div class='add'>+	ctx-&gt;digest[0] = get_unaligned_be64(src + 8);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+		       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = ctx-&gt;count % GHASH_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	if (partial) {</div><div class='del'>-		struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct arm_ghash_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	struct ghash_key *key = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> </div><div class='del'>-		memset(ctx-&gt;buf + partial, 0, GHASH_BLOCK_SIZE - partial);</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='ctx'> </div><div class='del'>-		ghash_do_simd_update(1, ctx-&gt;digest, ctx-&gt;buf, key, NULL,</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		ghash_do_simd_update(1, ctx-&gt;digest, src, key, NULL,</div><div class='ctx'> 				     pmull_ghash_update_p8);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[1], dst);</div><div class='del'>-	put_unaligned_be64(ctx-&gt;digest[0], dst + 8);</div><div class='del'>-</div><div class='del'>-	memzero_explicit(ctx, sizeof(*ctx));</div><div class='del'>-	return 0;</div><div class='add'>+	return ghash_export(desc, dst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ghash_reflect(u64 h[], const be128 *k)</div><div class='hunk'>@@ -205,6 +170,7 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.base.cra_name		= "ghash",</div><div class='ctx'> 	.base.cra_driver_name	= "ghash-neon",</div><div class='ctx'> 	.base.cra_priority	= 150,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= GHASH_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct ghash_key) + sizeof(u64[2]),</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -212,9 +178,12 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.digestsize		= GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init			= ghash_init,</div><div class='ctx'> 	.update			= ghash_update,</div><div class='del'>-	.final			= ghash_final,</div><div class='add'>+	.finup			= ghash_finup,</div><div class='ctx'> 	.setkey			= ghash_setkey,</div><div class='del'>-	.descsize		= sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.export			= ghash_export,</div><div class='add'>+	.import			= ghash_import,</div><div class='add'>+	.descsize		= sizeof(struct arm_ghash_desc_ctx),</div><div class='add'>+	.statesize		= sizeof(struct ghash_desc_ctx),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int num_rounds(struct crypto_aes_ctx *ctx)</div><div class='head'>diff --git a/arch/arm64/crypto/poly1305-glue.c b/arch/arm64/crypto/poly1305-glue.c<br/>deleted file mode 100644<br/>index 18883ea438f3..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/poly1305-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/poly1305-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,232 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * OpenSSL/Cryptogams accelerated Poly1305 transform for arm64</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void poly1305_init_arm64(void *state, const u8 *key);</div><div class='del'>-asmlinkage void poly1305_blocks(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-asmlinkage void poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-asmlinkage void poly1305_emit(void *state, u8 *digest, const u32 *nonce);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='del'>-</div><div class='del'>-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_init_arm64(&amp;dctx-&gt;h, key);</div><div class='del'>-	dctx-&gt;s[0] = get_unaligned_le32(key + 16);</div><div class='del'>-	dctx-&gt;s[1] = get_unaligned_le32(key + 20);</div><div class='del'>-	dctx-&gt;s[2] = get_unaligned_le32(key + 24);</div><div class='del'>-	dctx-&gt;s[3] = get_unaligned_le32(key + 28);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_init_arch);</div><div class='del'>-</div><div class='del'>-static int neon_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void neon_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-				 u32 len, u32 hibit, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset) {</div><div class='del'>-			poly1305_init_arm64(&amp;dctx-&gt;h, src);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(src +  0);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(src +  4);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(src +  8);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(src + 12);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-		if (len &lt; POLY1305_BLOCK_SIZE)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len &amp;= ~(POLY1305_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; likely(do_neon))</div><div class='del'>-		poly1305_blocks_neon(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-	else</div><div class='del'>-		poly1305_blocks(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void neon_poly1305_do_update(struct poly1305_desc_ctx *dctx,</div><div class='del'>-				    const u8 *src, u32 len, bool do_neon)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			neon_poly1305_blocks(dctx, dctx-&gt;buf,</div><div class='del'>-					     POLY1305_BLOCK_SIZE, 1, false);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(len &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		neon_poly1305_blocks(dctx, src, len, 1, do_neon);</div><div class='del'>-		src += round_down(len, POLY1305_BLOCK_SIZE);</div><div class='del'>-		len %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(len)) {</div><div class='del'>-		dctx-&gt;buflen = len;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, len);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int neon_poly1305_update(struct shash_desc *desc,</div><div class='del'>-				const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	bool do_neon = crypto_simd_usable() &amp;&amp; srclen &gt; 128;</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-	neon_poly1305_do_update(dctx, src, srclen, do_neon);</div><div class='del'>-	if (static_branch_likely(&amp;have_neon) &amp;&amp; do_neon)</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			  unsigned int nbytes)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		nbytes -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_blocks(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(nbytes &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-		if (static_branch_likely(&amp;have_neon) &amp;&amp; crypto_simd_usable()) {</div><div class='del'>-			do {</div><div class='del'>-				unsigned int todo = min_t(unsigned int, len, SZ_4K);</div><div class='del'>-</div><div class='del'>-				kernel_neon_begin();</div><div class='del'>-				poly1305_blocks_neon(&amp;dctx-&gt;h, src, todo, 1);</div><div class='del'>-				kernel_neon_end();</div><div class='del'>-</div><div class='del'>-				len -= todo;</div><div class='del'>-				src += todo;</div><div class='del'>-			} while (len);</div><div class='del'>-		} else {</div><div class='del'>-			poly1305_blocks(&amp;dctx-&gt;h, src, len, 1);</div><div class='del'>-			src += len;</div><div class='del'>-		}</div><div class='del'>-		nbytes %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(nbytes)) {</div><div class='del'>-		dctx-&gt;buflen = nbytes;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, nbytes);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_update_arch);</div><div class='del'>-</div><div class='del'>-void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		poly1305_blocks(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit(&amp;dctx-&gt;h, dst, dctx-&gt;s);</div><div class='del'>-	memzero_explicit(dctx, sizeof(*dctx));</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_final_arch);</div><div class='del'>-</div><div class='del'>-static int neon_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_arch(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg neon_poly1305_alg = {</div><div class='del'>-	.init			= neon_poly1305_init,</div><div class='del'>-	.update			= neon_poly1305_update,</div><div class='del'>-	.final			= neon_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-neon",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init neon_poly1305_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_have_named_feature(ASIMD))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	static_branch_enable(&amp;have_neon);</div><div class='del'>-</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?</div><div class='del'>-		crypto_register_shash(&amp;neon_poly1305_alg) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit neon_poly1305_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_HASH) &amp;&amp; cpu_have_named_feature(ASIMD))</div><div class='del'>-		crypto_unregister_shash(&amp;neon_poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(neon_poly1305_mod_init);</div><div class='del'>-module_exit(neon_poly1305_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Poly1305 transform using NEON instructions");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-neon");</div><div class='head'>diff --git a/arch/arm64/crypto/polyval-ce-glue.c b/arch/arm64/crypto/polyval-ce-glue.c<br/>index 0a3b5718df85..c4e653688ea0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/polyval-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/polyval-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/polyval-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/polyval-ce-glue.c</a></div><div class='hunk'>@@ -15,17 +15,15 @@</div><div class='ctx'>  * ARMv8 Crypto Extensions instructions to implement the finite field operations.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/polyval.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define NUM_KEY_POWERS	8</div><div class='ctx'> </div><div class='hunk'>@@ -38,7 +36,6 @@ struct polyval_tfm_ctx {</div><div class='ctx'> </div><div class='ctx'> struct polyval_desc_ctx {</div><div class='ctx'> 	u8 buffer[POLYVAL_BLOCK_SIZE];</div><div class='del'>-	u32 bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> asmlinkage void pmull_polyval_update(const struct polyval_tfm_ctx *keys,</div><div class='hunk'>@@ -48,25 +45,16 @@ asmlinkage void pmull_polyval_mul(u8 *op1, const u8 *op2);</div><div class='ctx'> static void internal_polyval_update(const struct polyval_tfm_ctx *keys,</div><div class='ctx'> 	const u8 *in, size_t nblocks, u8 *accumulator)</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		pmull_polyval_update(keys, in, nblocks, accumulator);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		polyval_update_non4k(keys-&gt;key_powers[NUM_KEY_POWERS-1], in,</div><div class='del'>-			nblocks, accumulator);</div><div class='del'>-	}</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	pmull_polyval_update(keys, in, nblocks, accumulator);</div><div class='add'>+	kernel_neon_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void internal_polyval_mul(u8 *op1, const u8 *op2)</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		pmull_polyval_mul(op1, op2);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	} else {</div><div class='del'>-		polyval_mul_non4k(op1, op2);</div><div class='del'>-	}</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	pmull_polyval_mul(op1, op2);</div><div class='add'>+	kernel_neon_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int polyval_arm64_setkey(struct crypto_shash *tfm,</div><div class='hunk'>@@ -103,49 +91,27 @@ static int polyval_arm64_update(struct shash_desc *desc,</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct polyval_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-	u8 *pos;</div><div class='ctx'> 	unsigned int nblocks;</div><div class='del'>-	unsigned int n;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		n = min(srclen, dctx-&gt;bytes);</div><div class='del'>-		pos = dctx-&gt;buffer + POLYVAL_BLOCK_SIZE - dctx-&gt;bytes;</div><div class='del'>-</div><div class='del'>-		dctx-&gt;bytes -= n;</div><div class='del'>-		srclen -= n;</div><div class='ctx'> </div><div class='del'>-		while (n--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='del'>-</div><div class='del'>-		if (!dctx-&gt;bytes)</div><div class='del'>-			internal_polyval_mul(dctx-&gt;buffer,</div><div class='del'>-					    tctx-&gt;key_powers[NUM_KEY_POWERS-1]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (srclen &gt;= POLYVAL_BLOCK_SIZE) {</div><div class='add'>+	do {</div><div class='ctx'> 		/* allow rescheduling every 4K bytes */</div><div class='ctx'> 		nblocks = min(srclen, 4096U) / POLYVAL_BLOCK_SIZE;</div><div class='ctx'> 		internal_polyval_update(tctx, src, nblocks, dctx-&gt;buffer);</div><div class='ctx'> 		srclen -= nblocks * POLYVAL_BLOCK_SIZE;</div><div class='ctx'> 		src += nblocks * POLYVAL_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='add'>+	} while (srclen &gt;= POLYVAL_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	if (srclen) {</div><div class='del'>-		dctx-&gt;bytes = POLYVAL_BLOCK_SIZE - srclen;</div><div class='del'>-		pos = dctx-&gt;buffer;</div><div class='del'>-		while (srclen--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return srclen;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int polyval_arm64_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int polyval_arm64_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct polyval_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(dctx-&gt;buffer, src, len);</div><div class='ctx'> 		internal_polyval_mul(dctx-&gt;buffer,</div><div class='ctx'> 				     tctx-&gt;key_powers[NUM_KEY_POWERS-1]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -159,13 +125,14 @@ static struct shash_alg polyval_alg = {</div><div class='ctx'> 	.digestsize	= POLYVAL_DIGEST_SIZE,</div><div class='ctx'> 	.init		= polyval_arm64_init,</div><div class='ctx'> 	.update		= polyval_arm64_update,</div><div class='del'>-	.final		= polyval_arm64_final,</div><div class='add'>+	.finup		= polyval_arm64_finup,</div><div class='ctx'> 	.setkey		= polyval_arm64_setkey,</div><div class='ctx'> 	.descsize	= sizeof(struct polyval_desc_ctx),</div><div class='ctx'> 	.base		= {</div><div class='ctx'> 		.cra_name		= "polyval",</div><div class='ctx'> 		.cra_driver_name	= "polyval-ce",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= POLYVAL_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct polyval_tfm_ctx),</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='head'>diff --git a/arch/arm64/crypto/sha1-ce-glue.c b/arch/arm64/crypto/sha1-ce-glue.c<br/>index cbd14f208f83..65b6980817e5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha1-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha1-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha1-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/sha1-ce-glue.c</a></div><div class='hunk'>@@ -7,14 +7,14 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SHA1 secure hash using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='hunk'>@@ -56,79 +56,49 @@ static int sha1_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> {</div><div class='ctx'> 	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha1_update(desc, data, len);</div><div class='del'>-</div><div class='ctx'> 	sctx-&gt;finalize = 0;</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sha1_base_do_update_blocks(desc, data, len, sha1_ce_transform);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha1_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			 unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	bool finalize = !sctx-&gt;sst.count &amp;&amp; !(len % SHA1_BLOCK_SIZE) &amp;&amp; len;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha1_finup(desc, data, len, out);</div><div class='add'>+	bool finalized = false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allow the asm code to perform the finalization if there is no</div><div class='ctx'> 	 * partial data and the input is a round multiple of the block size.</div><div class='ctx'> 	 */</div><div class='del'>-	sctx-&gt;finalize = finalize;</div><div class='del'>-</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_ce_transform);</div><div class='del'>-	if (!finalize)</div><div class='del'>-		sha1_base_do_finalize(desc, sha1_ce_transform);</div><div class='del'>-	return sha1_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha1_finup(desc, NULL, 0, out);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_ce_transform);</div><div class='add'>+	if (len &gt;= SHA1_BLOCK_SIZE) {</div><div class='add'>+		unsigned int remain = len - round_down(len, SHA1_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+		finalized = !remain;</div><div class='add'>+		sctx-&gt;finalize = finalized;</div><div class='add'>+		sha1_base_do_update_blocks(desc, data, len, sha1_ce_transform);</div><div class='add'>+		data += len - remain;</div><div class='add'>+		len = remain;</div><div class='add'>+	}</div><div class='add'>+	if (!finalized) {</div><div class='add'>+		sctx-&gt;finalize = 0;</div><div class='add'>+		sha1_base_do_finup(desc, data, len, sha1_ce_transform);</div><div class='add'>+	}</div><div class='ctx'> 	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha1_ce_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, &amp;sctx-&gt;sst, sizeof(struct sha1_state));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_ce_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha1_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;sctx-&gt;sst, in, sizeof(struct sha1_state));</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.init			= sha1_base_init,</div><div class='ctx'> 	.update			= sha1_ce_update,</div><div class='del'>-	.final			= sha1_ce_final,</div><div class='ctx'> 	.finup			= sha1_ce_finup,</div><div class='del'>-	.import			= sha1_ce_import,</div><div class='del'>-	.export			= sha1_ce_export,</div><div class='ctx'> 	.descsize		= sizeof(struct sha1_ce_state),</div><div class='del'>-	.statesize		= sizeof(struct sha1_state),</div><div class='add'>+	.statesize		= SHA1_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.base			= {</div><div class='ctx'> 		.cra_name		= "sha1",</div><div class='ctx'> 		.cra_driver_name	= "sha1-ce",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		= SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/crypto/sha2-ce-glue.c b/arch/arm64/crypto/sha2-ce-glue.c<br/>deleted file mode 100644<br/>index 6b4866a88ded..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha2-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha2-ce-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,192 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * sha2-ce-glue.c - SHA-224/SHA-256 using ARMv8 Crypto Extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 - 2017 Linaro Ltd &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-224/SHA-256 secure hash using ARMv8 Crypto Extensions");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-</div><div class='del'>-struct sha256_ce_state {</div><div class='del'>-	struct sha256_state	sst;</div><div class='del'>-	u32			finalize;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern const u32 sha256_ce_offsetof_count;</div><div class='del'>-extern const u32 sha256_ce_offsetof_finalize;</div><div class='del'>-</div><div class='del'>-asmlinkage int __sha256_ce_transform(struct sha256_ce_state *sst, u8 const *src,</div><div class='del'>-				     int blocks);</div><div class='del'>-</div><div class='del'>-static void sha256_ce_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				int blocks)</div><div class='del'>-{</div><div class='del'>-	while (blocks) {</div><div class='del'>-		int rem;</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		rem = __sha256_ce_transform(container_of(sst,</div><div class='del'>-							 struct sha256_ce_state,</div><div class='del'>-							 sst), src, blocks);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-		src += (blocks - rem) * SHA256_BLOCK_SIZE;</div><div class='del'>-		blocks = rem;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const u32 sha256_ce_offsetof_count = offsetof(struct sha256_ce_state,</div><div class='del'>-					      sst.count);</div><div class='del'>-const u32 sha256_ce_offsetof_finalize = offsetof(struct sha256_ce_state,</div><div class='del'>-						 finalize);</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order(u32 *digest, u8 const *src, int blocks);</div><div class='del'>-</div><div class='del'>-static void sha256_arm64_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				   int blocks)</div><div class='del'>-{</div><div class='del'>-	sha256_block_data_order(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha256_base_do_update(desc, data, len,</div><div class='del'>-					     sha256_arm64_transform);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_ce_transform);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			   unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	bool finalize = !sctx-&gt;sst.count &amp;&amp; !(len % SHA256_BLOCK_SIZE) &amp;&amp; len;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_base_do_update(desc, data, len,</div><div class='del'>-					      sha256_arm64_transform);</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-		return sha256_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allow the asm code to perform the finalization if there is no</div><div class='del'>-	 * partial data and the input is a round multiple of the block size.</div><div class='del'>-	 */</div><div class='del'>-	sctx-&gt;finalize = finalize;</div><div class='del'>-</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_ce_transform);</div><div class='del'>-	if (!finalize)</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_ce_transform);</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-		return sha256_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_ce_transform);</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			    unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha256_base_init(desc);</div><div class='del'>-	return sha256_ce_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, &amp;sctx-&gt;sst, sizeof(struct sha256_state));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ce_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha256_ce_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;sctx-&gt;sst, in, sizeof(struct sha256_state));</div><div class='del'>-	sctx-&gt;finalize = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= sha256_ce_update,</div><div class='del'>-	.final			= sha256_ce_final,</div><div class='del'>-	.finup			= sha256_ce_finup,</div><div class='del'>-	.export			= sha256_ce_export,</div><div class='del'>-	.import			= sha256_ce_import,</div><div class='del'>-	.descsize		= sizeof(struct sha256_ce_state),</div><div class='del'>-	.statesize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha224",</div><div class='del'>-		.cra_driver_name	= "sha224-ce",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= sha256_ce_update,</div><div class='del'>-	.final			= sha256_ce_final,</div><div class='del'>-	.finup			= sha256_ce_finup,</div><div class='del'>-	.digest			= sha256_ce_digest,</div><div class='del'>-	.export			= sha256_ce_export,</div><div class='del'>-	.import			= sha256_ce_import,</div><div class='del'>-	.descsize		= sizeof(struct sha256_ce_state),</div><div class='del'>-	.statesize		= sizeof(struct sha256_state),</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "sha256",</div><div class='del'>-		.cra_driver_name	= "sha256-ce",</div><div class='del'>-		.cra_priority		= 200,</div><div class='del'>-		.cra_blocksize		= SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha2_ce_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha2_ce_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(SHA2, sha2_ce_mod_init);</div><div class='del'>-module_exit(sha2_ce_mod_fini);</div><div class='head'>diff --git a/arch/arm64/crypto/sha256-glue.c b/arch/arm64/crypto/sha256-glue.c<br/>deleted file mode 100644<br/>index 35356987cc1e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha256-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha256-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,194 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Linux/arm64 port of the OpenSSL SHA256 implementation for AArch64</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/hwcap.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-224/SHA-256 secure hash for arm64");</div><div class='del'>-MODULE_AUTHOR("Andy Polyakov &lt;appro@openssl.org&gt;");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_data_order(u32 *digest, const void *data,</div><div class='del'>-					unsigned int num_blks);</div><div class='del'>-EXPORT_SYMBOL(sha256_block_data_order);</div><div class='del'>-</div><div class='del'>-static void sha256_arm64_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				   int blocks)</div><div class='del'>-{</div><div class='del'>-	sha256_block_data_order(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_block_neon(u32 *digest, const void *data,</div><div class='del'>-				  unsigned int num_blks);</div><div class='del'>-</div><div class='del'>-static void sha256_neon_transform(struct sha256_state *sst, u8 const *src,</div><div class='del'>-				  int blocks)</div><div class='del'>-{</div><div class='del'>-	sha256_block_neon(sst-&gt;state, src, blocks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm64_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				      unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_do_update(desc, data, len, sha256_arm64_transform);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm64_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				     unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (len)</div><div class='del'>-		sha256_base_do_update(desc, data, len, sha256_arm64_transform);</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_arm64_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return crypto_sha256_arm64_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[] = { {</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= crypto_sha256_arm64_update,</div><div class='del'>-	.final			= crypto_sha256_arm64_final,</div><div class='del'>-	.finup			= crypto_sha256_arm64_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha256",</div><div class='del'>-	.base.cra_driver_name	= "sha256-arm64",</div><div class='del'>-	.base.cra_priority	= 125,</div><div class='del'>-	.base.cra_blocksize	= SHA256_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= crypto_sha256_arm64_update,</div><div class='del'>-	.final			= crypto_sha256_arm64_final,</div><div class='del'>-	.finup			= crypto_sha256_arm64_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha224",</div><div class='del'>-	.base.cra_driver_name	= "sha224-arm64",</div><div class='del'>-	.base.cra_priority	= 125,</div><div class='del'>-	.base.cra_blocksize	= SHA224_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int sha256_update_neon(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			      unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return sha256_base_do_update(desc, data, len,</div><div class='del'>-				sha256_arm64_transform);</div><div class='del'>-</div><div class='del'>-	while (len &gt; 0) {</div><div class='del'>-		unsigned int chunk = len;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Don't hog the CPU for the entire time it takes to process all</div><div class='del'>-		 * input when running on a preemptible kernel, but process the</div><div class='del'>-		 * data block by block instead.</div><div class='del'>-		 */</div><div class='del'>-		if (IS_ENABLED(CONFIG_PREEMPTION) &amp;&amp;</div><div class='del'>-		    chunk + sctx-&gt;count % SHA256_BLOCK_SIZE &gt; SHA256_BLOCK_SIZE)</div><div class='del'>-			chunk = SHA256_BLOCK_SIZE -</div><div class='del'>-				sctx-&gt;count % SHA256_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		sha256_base_do_update(desc, data, chunk, sha256_neon_transform);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-		data += chunk;</div><div class='del'>-		len -= chunk;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_finup_neon(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_base_do_update(desc, data, len,</div><div class='del'>-				sha256_arm64_transform);</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_arm64_transform);</div><div class='del'>-	} else {</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_update_neon(desc, data, len);</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-		sha256_base_do_finalize(desc, sha256_neon_transform);</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-	}</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_final_neon(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_finup_neon(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg neon_algs[] = { {</div><div class='del'>-	.digestsize		= SHA256_DIGEST_SIZE,</div><div class='del'>-	.init			= sha256_base_init,</div><div class='del'>-	.update			= sha256_update_neon,</div><div class='del'>-	.final			= sha256_final_neon,</div><div class='del'>-	.finup			= sha256_finup_neon,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha256",</div><div class='del'>-	.base.cra_driver_name	= "sha256-arm64-neon",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= SHA256_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-}, {</div><div class='del'>-	.digestsize		= SHA224_DIGEST_SIZE,</div><div class='del'>-	.init			= sha224_base_init,</div><div class='del'>-	.update			= sha256_update_neon,</div><div class='del'>-	.final			= sha256_final_neon,</div><div class='del'>-	.finup			= sha256_finup_neon,</div><div class='del'>-	.descsize		= sizeof(struct sha256_state),</div><div class='del'>-	.base.cra_name		= "sha224",</div><div class='del'>-	.base.cra_driver_name	= "sha224-arm64-neon",</div><div class='del'>-	.base.cra_priority	= 150,</div><div class='del'>-	.base.cra_blocksize	= SHA224_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret = crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (cpu_have_named_feature(ASIMD)) {</div><div class='del'>-		ret = crypto_register_shashes(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-		if (ret)</div><div class='del'>-			crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_have_named_feature(ASIMD))</div><div class='del'>-		crypto_unregister_shashes(neon_algs, ARRAY_SIZE(neon_algs));</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha256_mod_init);</div><div class='del'>-module_exit(sha256_mod_fini);</div><div class='head'>diff --git a/arch/arm64/crypto/sha3-ce-glue.c b/arch/arm64/crypto/sha3-ce-glue.c<br/>index 5662c3ac49e9..b4f1001046c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha3-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha3-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha3-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/sha3-ce-glue.c</a></div><div class='hunk'>@@ -12,13 +12,13 @@</div><div class='ctx'> #include &lt;asm/hwcap.h&gt;</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sha3.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SHA3 secure hash using ARMv8 Crypto Extensions");</div><div class='ctx'> MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='hunk'>@@ -35,74 +35,55 @@ static int sha3_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 		       unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int digest_size = crypto_shash_digestsize(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha3_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	if ((sctx-&gt;partial + len) &gt;= sctx-&gt;rsiz) {</div><div class='del'>-		int blocks;</div><div class='del'>-</div><div class='del'>-		if (sctx-&gt;partial) {</div><div class='del'>-			int p = sctx-&gt;rsiz - sctx-&gt;partial;</div><div class='del'>-</div><div class='del'>-			memcpy(sctx-&gt;buf + sctx-&gt;partial, data, p);</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			sha3_ce_transform(sctx-&gt;st, sctx-&gt;buf, 1, digest_size);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-</div><div class='del'>-			data += p;</div><div class='del'>-			len -= p;</div><div class='del'>-			sctx-&gt;partial = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		blocks = len / sctx-&gt;rsiz;</div><div class='del'>-		len %= sctx-&gt;rsiz;</div><div class='del'>-</div><div class='del'>-		while (blocks) {</div><div class='del'>-			int rem;</div><div class='del'>-</div><div class='del'>-			kernel_neon_begin();</div><div class='del'>-			rem = sha3_ce_transform(sctx-&gt;st, data, blocks,</div><div class='del'>-						digest_size);</div><div class='del'>-			kernel_neon_end();</div><div class='del'>-			data += (blocks - rem) * sctx-&gt;rsiz;</div><div class='del'>-			blocks = rem;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len) {</div><div class='del'>-		memcpy(sctx-&gt;buf + sctx-&gt;partial, data, len);</div><div class='del'>-		sctx-&gt;partial += len;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+	unsigned int bs, ds;</div><div class='add'>+	int blocks;</div><div class='add'>+</div><div class='add'>+	ds = crypto_shash_digestsize(tfm);</div><div class='add'>+	bs = crypto_shash_blocksize(tfm);</div><div class='add'>+	blocks = len / bs;</div><div class='add'>+	len -= blocks * bs;</div><div class='add'>+	do {</div><div class='add'>+		int rem;</div><div class='add'>+</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		rem = sha3_ce_transform(sctx-&gt;st, data, blocks, ds);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+		data += (blocks - rem) * bs;</div><div class='add'>+		blocks = rem;</div><div class='add'>+	} while (blocks);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha3_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sha3_finup(struct shash_desc *desc, const u8 *src, unsigned int len,</div><div class='add'>+		      u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int digest_size = crypto_shash_digestsize(desc-&gt;tfm);</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='ctx'> 	__le64 *digest = (__le64 *)out;</div><div class='add'>+	u8 block[SHA3_224_BLOCK_SIZE];</div><div class='add'>+	unsigned int bs, ds;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha3_final(desc, out);</div><div class='add'>+	ds = crypto_shash_digestsize(tfm);</div><div class='add'>+	bs = crypto_shash_blocksize(tfm);</div><div class='add'>+	memcpy(block, src, len);</div><div class='ctx'> </div><div class='del'>-	sctx-&gt;buf[sctx-&gt;partial++] = 0x06;</div><div class='del'>-	memset(sctx-&gt;buf + sctx-&gt;partial, 0, sctx-&gt;rsiz - sctx-&gt;partial);</div><div class='del'>-	sctx-&gt;buf[sctx-&gt;rsiz - 1] |= 0x80;</div><div class='add'>+	block[len++] = 0x06;</div><div class='add'>+	memset(block + len, 0, bs - len);</div><div class='add'>+	block[bs - 1] |= 0x80;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sha3_ce_transform(sctx-&gt;st, sctx-&gt;buf, 1, digest_size);</div><div class='add'>+	sha3_ce_transform(sctx-&gt;st, block, 1, ds);</div><div class='ctx'> 	kernel_neon_end();</div><div class='add'>+	memzero_explicit(block , sizeof(block));</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; digest_size / 8; i++)</div><div class='add'>+	for (i = 0; i &lt; ds / 8; i++)</div><div class='ctx'> 		put_unaligned_le64(sctx-&gt;st[i], digest++);</div><div class='ctx'> </div><div class='del'>-	if (digest_size &amp; 4)</div><div class='add'>+	if (ds &amp; 4)</div><div class='ctx'> 		put_unaligned_le32(sctx-&gt;st[i], (__le32 *)digest);</div><div class='ctx'> </div><div class='del'>-	memzero_explicit(sctx, sizeof(*sctx));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -110,10 +91,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_224_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-224",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-224-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_224_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='hunk'>@@ -121,10 +103,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_256_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-256",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-256-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_256_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='hunk'>@@ -132,10 +115,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_384_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-384",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-384-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_384_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='hunk'>@@ -143,10 +127,11 @@ static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_512_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= sha3_update,</div><div class='del'>-	.final			= sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-512",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-512-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_512_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='head'>diff --git a/arch/arm64/crypto/sha512-ce-glue.c b/arch/arm64/crypto/sha512-ce-glue.c<br/>index 071f64293227..6fb3001fa2c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha512-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha512-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha512-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/sha512-ce-glue.c</a></div><div class='hunk'>@@ -10,14 +10,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SHA-384/SHA-512 secure hash using ARMv8 Crypto Extensions");</div><div class='hunk'>@@ -29,12 +26,10 @@ MODULE_ALIAS_CRYPTO("sha512");</div><div class='ctx'> asmlinkage int __sha512_ce_transform(struct sha512_state *sst, u8 const *src,</div><div class='ctx'> 				     int blocks);</div><div class='ctx'> </div><div class='del'>-asmlinkage void sha512_block_data_order(u64 *digest, u8 const *src, int blocks);</div><div class='del'>-</div><div class='ctx'> static void sha512_ce_transform(struct sha512_state *sst, u8 const *src,</div><div class='ctx'> 				int blocks)</div><div class='ctx'> {</div><div class='del'>-	while (blocks) {</div><div class='add'>+	do {</div><div class='ctx'> 		int rem;</div><div class='ctx'> </div><div class='ctx'> 		kernel_neon_begin();</div><div class='hunk'>@@ -42,67 +37,47 @@ static void sha512_ce_transform(struct sha512_state *sst, u8 const *src,</div><div class='ctx'> 		kernel_neon_end();</div><div class='ctx'> 		src += (blocks - rem) * SHA512_BLOCK_SIZE;</div><div class='ctx'> 		blocks = rem;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sha512_arm64_transform(struct sha512_state *sst, u8 const *src,</div><div class='del'>-				   int blocks)</div><div class='del'>-{</div><div class='del'>-	sha512_block_data_order(sst-&gt;state, src, blocks);</div><div class='add'>+	} while (blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha512_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			    unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	sha512_block_fn *fn = crypto_simd_usable() ? sha512_ce_transform</div><div class='del'>-						   : sha512_arm64_transform;</div><div class='del'>-</div><div class='del'>-	sha512_base_do_update(desc, data, len, fn);</div><div class='del'>-	return 0;</div><div class='add'>+	return sha512_base_do_update_blocks(desc, data, len,</div><div class='add'>+					    sha512_ce_transform);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha512_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			   unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	sha512_block_fn *fn = crypto_simd_usable() ? sha512_ce_transform</div><div class='del'>-						   : sha512_arm64_transform;</div><div class='del'>-</div><div class='del'>-	sha512_base_do_update(desc, data, len, fn);</div><div class='del'>-	sha512_base_do_finalize(desc, fn);</div><div class='del'>-	return sha512_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha512_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha512_block_fn *fn = crypto_simd_usable() ? sha512_ce_transform</div><div class='del'>-						   : sha512_arm64_transform;</div><div class='del'>-</div><div class='del'>-	sha512_base_do_finalize(desc, fn);</div><div class='add'>+	sha512_base_do_finup(desc, data, len, sha512_ce_transform);</div><div class='ctx'> 	return sha512_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg algs[] = { {</div><div class='ctx'> 	.init			= sha384_base_init,</div><div class='ctx'> 	.update			= sha512_ce_update,</div><div class='del'>-	.final			= sha512_ce_final,</div><div class='ctx'> 	.finup			= sha512_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha384",</div><div class='ctx'> 	.base.cra_driver_name	= "sha384-ce",</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SHA512_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> }, {</div><div class='ctx'> 	.init			= sha512_base_init,</div><div class='ctx'> 	.update			= sha512_ce_update,</div><div class='del'>-	.final			= sha512_ce_final,</div><div class='ctx'> 	.finup			= sha512_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha512",</div><div class='ctx'> 	.base.cra_driver_name	= "sha512-ce",</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SHA512_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> } };</div><div class='head'>diff --git a/arch/arm64/crypto/sha512-glue.c b/arch/arm64/crypto/sha512-glue.c<br/>index 62f129dea83d..15aa9d8b7b2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha512-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha512-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha512-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/sha512-glue.c</a></div><div class='hunk'>@@ -6,11 +6,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SHA-384/SHA-512 secure hash for arm64");</div><div class='ctx'> MODULE_AUTHOR("Andy Polyakov &lt;appro@openssl.org&gt;");</div><div class='hunk'>@@ -19,59 +18,53 @@ MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("sha384");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("sha512");</div><div class='ctx'> </div><div class='del'>-asmlinkage void sha512_block_data_order(u64 *digest, const void *data,</div><div class='del'>-					unsigned int num_blks);</div><div class='del'>-EXPORT_SYMBOL(sha512_block_data_order);</div><div class='add'>+asmlinkage void sha512_blocks_arch(u64 *digest, const void *data,</div><div class='add'>+				   unsigned int num_blks);</div><div class='ctx'> </div><div class='ctx'> static void sha512_arm64_transform(struct sha512_state *sst, u8 const *src,</div><div class='ctx'> 				   int blocks)</div><div class='ctx'> {</div><div class='del'>-	sha512_block_data_order(sst-&gt;state, src, blocks);</div><div class='add'>+	sha512_blocks_arch(sst-&gt;state, src, blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			 unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	return sha512_base_do_update(desc, data, len, sha512_arm64_transform);</div><div class='add'>+	return sha512_base_do_update_blocks(desc, data, len,</div><div class='add'>+					    sha512_arm64_transform);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (len)</div><div class='del'>-		sha512_base_do_update(desc, data, len, sha512_arm64_transform);</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_arm64_transform);</div><div class='del'>-</div><div class='add'>+	sha512_base_do_finup(desc, data, len, sha512_arm64_transform);</div><div class='ctx'> 	return sha512_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha512_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init			= sha512_base_init,</div><div class='ctx'> 	.update			= sha512_update,</div><div class='del'>-	.final			= sha512_final,</div><div class='ctx'> 	.finup			= sha512_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha512",</div><div class='ctx'> 	.base.cra_driver_name	= "sha512-arm64",</div><div class='ctx'> 	.base.cra_priority	= 150,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SHA512_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> }, {</div><div class='ctx'> 	.digestsize		= SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init			= sha384_base_init,</div><div class='ctx'> 	.update			= sha512_update,</div><div class='del'>-	.final			= sha512_final,</div><div class='ctx'> 	.finup			= sha512_finup,</div><div class='del'>-	.descsize		= sizeof(struct sha512_state),</div><div class='add'>+	.descsize		= SHA512_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha384",</div><div class='ctx'> 	.base.cra_driver_name	= "sha384-arm64",</div><div class='ctx'> 	.base.cra_priority	= 150,</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SHA384_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> } };</div><div class='head'>diff --git a/arch/arm64/crypto/sm3-ce-glue.c b/arch/arm64/crypto/sm3-ce-glue.c<br/>index 1a71788c4cda..eac6f5fa0abe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sm3-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sm3-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sm3-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/sm3-ce-glue.c</a></div><div class='hunk'>@@ -6,14 +6,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SM3 secure hash using ARMv8 Crypto Extensions");</div><div class='hunk'>@@ -26,50 +23,20 @@ asmlinkage void sm3_ce_transform(struct sm3_state *sst, u8 const *src,</div><div class='ctx'> static int sm3_ce_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			 unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_update(shash_desc_ctx(desc), data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_update(desc, data, len, sm3_ce_transform);</div><div class='add'>+	remain = sm3_base_do_update_blocks(desc, data, len, sm3_ce_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sm3_ce_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_final(shash_desc_ctx(desc), out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_ce_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sm3_base_finish(desc, out);</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sm3_ce_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		struct sm3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-		if (len)</div><div class='del'>-			sm3_update(sctx, data, len);</div><div class='del'>-		sm3_final(sctx, out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_base_do_update(desc, data, len, sm3_ce_transform);</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_ce_transform);</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_ce_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='ctx'> 	return sm3_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -77,11 +44,12 @@ static struct shash_alg sm3_alg = {</div><div class='ctx'> 	.digestsize		= SM3_DIGEST_SIZE,</div><div class='ctx'> 	.init			= sm3_base_init,</div><div class='ctx'> 	.update			= sm3_ce_update,</div><div class='del'>-	.final			= sm3_ce_final,</div><div class='ctx'> 	.finup			= sm3_ce_finup,</div><div class='del'>-	.descsize		= sizeof(struct sm3_state),</div><div class='add'>+	.descsize		= SM3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sm3",</div><div class='ctx'> 	.base.cra_driver_name	= "sm3-ce",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SM3_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 400,</div><div class='head'>diff --git a/arch/arm64/crypto/sm3-neon-glue.c b/arch/arm64/crypto/sm3-neon-glue.c<br/>index 8dd71ce79b69..6c4611a503a3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sm3-neon-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sm3-neon-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sm3-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/sm3-neon-glue.c</a></div><div class='hunk'>@@ -6,14 +6,11 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -23,50 +20,20 @@ asmlinkage void sm3_neon_transform(struct sm3_state *sst, u8 const *src,</div><div class='ctx'> static int sm3_neon_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			   unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_update(shash_desc_ctx(desc), data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_update(desc, data, len, sm3_neon_transform);</div><div class='add'>+	remain = sm3_base_do_update_blocks(desc, data, len, sm3_neon_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sm3_neon_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_final(shash_desc_ctx(desc), out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kernel_neon_begin();</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_neon_transform);</div><div class='del'>-	kernel_neon_end();</div><div class='del'>-</div><div class='del'>-	return sm3_base_finish(desc, out);</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sm3_neon_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			  unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		struct sm3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-		if (len)</div><div class='del'>-			sm3_update(sctx, data, len);</div><div class='del'>-		sm3_final(sctx, out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_base_do_update(desc, data, len, sm3_neon_transform);</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_neon_transform);</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_neon_transform);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='ctx'> 	return sm3_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -74,11 +41,12 @@ static struct shash_alg sm3_alg = {</div><div class='ctx'> 	.digestsize		= SM3_DIGEST_SIZE,</div><div class='ctx'> 	.init			= sm3_base_init,</div><div class='ctx'> 	.update			= sm3_neon_update,</div><div class='del'>-	.final			= sm3_neon_final,</div><div class='ctx'> 	.finup			= sm3_neon_finup,</div><div class='del'>-	.descsize		= sizeof(struct sm3_state),</div><div class='add'>+	.descsize		= SM3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sm3",</div><div class='ctx'> 	.base.cra_driver_name	= "sm3-neon",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 	.base.cra_blocksize	= SM3_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> 	.base.cra_priority	= 200,</div><div class='head'>diff --git a/arch/arm64/crypto/sm4-ce-glue.c b/arch/arm64/crypto/sm4-ce-glue.c<br/>index 43741bed874e..7a60e7b559dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sm4-ce-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sm4-ce-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sm4-ce-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/crypto/sm4-ce-glue.c</a></div><div class='hunk'>@@ -8,19 +8,18 @@</div><div class='ctx'>  * Copyright (C) 2022 Tianjia Zhang &lt;tianjia.zhang@linux.alibaba.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='del'>-#include &lt;crypto/xts.h&gt;</div><div class='ctx'> #include &lt;crypto/sm4.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;crypto/xts.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define BYTES2BLKS(nbytes)	((nbytes) &gt;&gt; 4)</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +63,6 @@ struct sm4_mac_tfm_ctx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct sm4_mac_desc_ctx {</div><div class='del'>-	unsigned int len;</div><div class='ctx'> 	u8 digest[SM4_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -591,8 +589,6 @@ static int sm4_mac_init(struct shash_desc *desc)</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='ctx'> 	memset(ctx-&gt;digest, 0, SM4_BLOCK_SIZE);</div><div class='del'>-	ctx-&gt;len = 0;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -601,87 +597,50 @@ static int sm4_mac_update(struct shash_desc *desc, const u8 *p,</div><div class='ctx'> {</div><div class='ctx'> 	struct sm4_mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int l, nblocks;</div><div class='del'>-</div><div class='del'>-	if (len == 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;len || ctx-&gt;len + len &lt; SM4_BLOCK_SIZE) {</div><div class='del'>-		l = min(len, SM4_BLOCK_SIZE - ctx-&gt;len);</div><div class='del'>-</div><div class='del'>-		crypto_xor(ctx-&gt;digest + ctx-&gt;len, p, l);</div><div class='del'>-		ctx-&gt;len += l;</div><div class='del'>-		len -= l;</div><div class='del'>-		p += l;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &amp;&amp; (ctx-&gt;len % SM4_BLOCK_SIZE) == 0) {</div><div class='del'>-		kernel_neon_begin();</div><div class='del'>-</div><div class='del'>-		if (len &lt; SM4_BLOCK_SIZE &amp;&amp; ctx-&gt;len == SM4_BLOCK_SIZE) {</div><div class='del'>-			sm4_ce_crypt_block(tctx-&gt;key.rkey_enc,</div><div class='del'>-					   ctx-&gt;digest, ctx-&gt;digest);</div><div class='del'>-			ctx-&gt;len = 0;</div><div class='del'>-		} else {</div><div class='del'>-			nblocks = len / SM4_BLOCK_SIZE;</div><div class='del'>-			len %= SM4_BLOCK_SIZE;</div><div class='add'>+	unsigned int nblocks = len / SM4_BLOCK_SIZE;</div><div class='ctx'> </div><div class='del'>-			sm4_ce_mac_update(tctx-&gt;key.rkey_enc, ctx-&gt;digest, p,</div><div class='del'>-					  nblocks, (ctx-&gt;len == SM4_BLOCK_SIZE),</div><div class='del'>-					  (len != 0));</div><div class='del'>-</div><div class='del'>-			p += nblocks * SM4_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-			if (len == 0)</div><div class='del'>-				ctx-&gt;len = SM4_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		kernel_neon_end();</div><div class='del'>-</div><div class='del'>-		if (len) {</div><div class='del'>-			crypto_xor(ctx-&gt;digest, p, len);</div><div class='del'>-			ctx-&gt;len = len;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	len %= SM4_BLOCK_SIZE;</div><div class='add'>+	kernel_neon_begin();</div><div class='add'>+	sm4_ce_mac_update(tctx-&gt;key.rkey_enc, ctx-&gt;digest, p,</div><div class='add'>+			  nblocks, false, true);</div><div class='add'>+	kernel_neon_end();</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sm4_cmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sm4_cmac_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			  unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sm4_mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const u8 *consts = tctx-&gt;consts;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len != SM4_BLOCK_SIZE) {</div><div class='del'>-		ctx-&gt;digest[ctx-&gt;len] ^= 0x80;</div><div class='add'>+	crypto_xor(ctx-&gt;digest, src, len);</div><div class='add'>+	if (len != SM4_BLOCK_SIZE) {</div><div class='add'>+		ctx-&gt;digest[len] ^= 0x80;</div><div class='ctx'> 		consts += SM4_BLOCK_SIZE;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	kernel_neon_begin();</div><div class='ctx'> 	sm4_ce_mac_update(tctx-&gt;key.rkey_enc, ctx-&gt;digest, consts, 1,</div><div class='ctx'> 			  false, true);</div><div class='ctx'> 	kernel_neon_end();</div><div class='del'>-</div><div class='ctx'> 	memcpy(out, ctx-&gt;digest, SM4_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sm4_cbcmac_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sm4_cbcmac_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			    unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sm4_mac_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sm4_mac_desc_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len) {</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(ctx-&gt;digest, src, len);</div><div class='ctx'> 		kernel_neon_begin();</div><div class='ctx'> 		sm4_ce_crypt_block(tctx-&gt;key.rkey_enc, ctx-&gt;digest,</div><div class='ctx'> 				   ctx-&gt;digest);</div><div class='ctx'> 		kernel_neon_end();</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	memcpy(out, ctx-&gt;digest, SM4_BLOCK_SIZE);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -691,6 +650,8 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 			.cra_name		= "cmac(sm4)",</div><div class='ctx'> 			.cra_driver_name	= "cmac-sm4-ce",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='add'>+			.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_mac_tfm_ctx)</div><div class='ctx'> 							+ SM4_BLOCK_SIZE * 2,</div><div class='hunk'>@@ -699,7 +660,7 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 		.digestsize	= SM4_BLOCK_SIZE,</div><div class='ctx'> 		.init		= sm4_mac_init,</div><div class='ctx'> 		.update		= sm4_mac_update,</div><div class='del'>-		.final		= sm4_cmac_final,</div><div class='add'>+		.finup		= sm4_cmac_finup,</div><div class='ctx'> 		.setkey		= sm4_cmac_setkey,</div><div class='ctx'> 		.descsize	= sizeof(struct sm4_mac_desc_ctx),</div><div class='ctx'> 	}, {</div><div class='hunk'>@@ -707,6 +668,8 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 			.cra_name		= "xcbc(sm4)",</div><div class='ctx'> 			.cra_driver_name	= "xcbc-sm4-ce",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='add'>+			.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						  CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_mac_tfm_ctx)</div><div class='ctx'> 							+ SM4_BLOCK_SIZE * 2,</div><div class='hunk'>@@ -715,7 +678,7 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 		.digestsize	= SM4_BLOCK_SIZE,</div><div class='ctx'> 		.init		= sm4_mac_init,</div><div class='ctx'> 		.update		= sm4_mac_update,</div><div class='del'>-		.final		= sm4_cmac_final,</div><div class='add'>+		.finup		= sm4_cmac_finup,</div><div class='ctx'> 		.setkey		= sm4_xcbc_setkey,</div><div class='ctx'> 		.descsize	= sizeof(struct sm4_mac_desc_ctx),</div><div class='ctx'> 	}, {</div><div class='hunk'>@@ -723,14 +686,15 @@ static struct shash_alg sm4_mac_algs[] = {</div><div class='ctx'> 			.cra_name		= "cbcmac(sm4)",</div><div class='ctx'> 			.cra_driver_name	= "cbcmac-sm4-ce",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_blocksize		= 1,</div><div class='add'>+			.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='add'>+			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_mac_tfm_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='ctx'> 		},</div><div class='ctx'> 		.digestsize	= SM4_BLOCK_SIZE,</div><div class='ctx'> 		.init		= sm4_mac_init,</div><div class='ctx'> 		.update		= sm4_mac_update,</div><div class='del'>-		.final		= sm4_cbcmac_final,</div><div class='add'>+		.finup		= sm4_cbcmac_finup,</div><div class='ctx'> 		.setkey		= sm4_cbcmac_setkey,</div><div class='ctx'> 		.descsize	= sizeof(struct sm4_mac_desc_ctx),</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h<br/>index 81e4157f92b7..71493b760b83 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/cpu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/cpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/cpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/cpu.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@ struct cpuinfo_arm64 {</div><div class='ctx'> 	u64		reg_dczid;</div><div class='ctx'> 	u64		reg_midr;</div><div class='ctx'> 	u64		reg_revidr;</div><div class='add'>+	u64		reg_aidr;</div><div class='ctx'> 	u64		reg_gmid;</div><div class='ctx'> 	u64		reg_smidr;</div><div class='ctx'> 	u64		reg_mpamidr;</div><div class='head'>diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h<br/>index d1cc0571798b..661735616787 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/cputype.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/cputype.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/cputype.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/cputype.h</a></div><div class='hunk'>@@ -81,6 +81,7 @@</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A78AE	0xD42</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_X1		0xD44</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A510	0xD46</div><div class='add'>+#define ARM_CPU_PART_CORTEX_X1C		0xD4C</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A520	0xD80</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A710	0xD47</div><div class='ctx'> #define ARM_CPU_PART_CORTEX_A715	0xD4D</div><div class='hunk'>@@ -133,6 +134,7 @@</div><div class='ctx'> </div><div class='ctx'> #define HISI_CPU_PART_TSV110		0xD01</div><div class='ctx'> #define HISI_CPU_PART_HIP09			0xD02</div><div class='add'>+#define HISI_CPU_PART_HIP12		0xD06</div><div class='ctx'> </div><div class='ctx'> #define APPLE_CPU_PART_M1_ICESTORM	0x022</div><div class='ctx'> #define APPLE_CPU_PART_M1_FIRESTORM	0x023</div><div class='hunk'>@@ -168,6 +170,7 @@</div><div class='ctx'> #define MIDR_CORTEX_A78AE	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)</div><div class='ctx'> #define MIDR_CORTEX_X1	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1)</div><div class='ctx'> #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)</div><div class='add'>+#define MIDR_CORTEX_X1C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C)</div><div class='ctx'> #define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520)</div><div class='ctx'> #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)</div><div class='ctx'> #define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715)</div><div class='hunk'>@@ -220,6 +223,7 @@</div><div class='ctx'> #define MIDR_FUJITSU_A64FX MIDR_CPU_MODEL(ARM_CPU_IMP_FUJITSU, FUJITSU_CPU_PART_A64FX)</div><div class='ctx'> #define MIDR_HISI_TSV110 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_TSV110)</div><div class='ctx'> #define MIDR_HISI_HIP09 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_HIP09)</div><div class='add'>+#define MIDR_HISI_HIP12 MIDR_CPU_MODEL(ARM_CPU_IMP_HISI, HISI_CPU_PART_HIP12)</div><div class='ctx'> #define MIDR_APPLE_M1_ICESTORM MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM)</div><div class='ctx'> #define MIDR_APPLE_M1_FIRESTORM MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM)</div><div class='ctx'> #define MIDR_APPLE_M1_ICESTORM_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM_PRO)</div><div class='head'>diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h<br/>index ebceaae3c749..1e7c7475e43f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/el2_setup.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/el2_setup.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/el2_setup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/el2_setup.h</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> </div><div class='ctx'> 	orr	x0, x0, #HCR_E2H</div><div class='ctx'> .LnVHE_\@:</div><div class='del'>-	msr	hcr_el2, x0</div><div class='add'>+	msr_hcr_el2 x0</div><div class='ctx'> 	isb</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -52,7 +52,7 @@</div><div class='ctx'> 	mrs	x0, id_aa64mmfr1_el1</div><div class='ctx'> 	ubfx	x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4</div><div class='ctx'> 	cbz	x0, .Lskip_hcrx_\@</div><div class='del'>-	mov_q	x0, HCRX_HOST_FLAGS</div><div class='add'>+	mov_q	x0, (HCRX_EL2_MSCEn | HCRX_EL2_TCR2En | HCRX_EL2_EnFPM)</div><div class='ctx'> </div><div class='ctx'>         /* Enable GCS if supported */</div><div class='ctx'> 	mrs_s	x1, SYS_ID_AA64PFR1_EL1</div><div class='hunk'>@@ -204,26 +204,28 @@</div><div class='ctx'> 	orr	x0, x0, #(1 &lt;&lt; 62)</div><div class='ctx'> </div><div class='ctx'> .Lskip_spe_fgt_\@:</div><div class='add'>+</div><div class='add'>+.Lset_debug_fgt_\@:</div><div class='ctx'> 	msr_s	SYS_HDFGRTR_EL2, x0</div><div class='ctx'> 	msr_s	SYS_HDFGWTR_EL2, x0</div><div class='ctx'> </div><div class='ctx'> 	mov	x0, xzr</div><div class='ctx'> 	mrs	x1, id_aa64pfr1_el1</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64PFR1_EL1_SME_SHIFT, #4</div><div class='del'>-	cbz	x1, .Lskip_debug_fgt_\@</div><div class='add'>+	cbz	x1, .Lskip_sme_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	/* Disable nVHE traps of TPIDR2 and SMPRI */</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nSMPRI_EL1_MASK</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nTPIDR2_EL0_MASK</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nSMPRI_EL1_MASK</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nTPIDR2_EL0_MASK</div><div class='ctx'> </div><div class='del'>-.Lskip_debug_fgt_\@:</div><div class='add'>+.Lskip_sme_fgt_\@:</div><div class='ctx'> 	mrs_s	x1, SYS_ID_AA64MMFR3_EL1</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4</div><div class='ctx'> 	cbz	x1, .Lskip_pie_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	/* Disable trapping of PIR_EL1 / PIRE0_EL1 */</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nPIR_EL1</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nPIRE0_EL1</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nPIR_EL1</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nPIRE0_EL1</div><div class='ctx'> </div><div class='ctx'> .Lskip_pie_fgt_\@:</div><div class='ctx'> 	mrs_s	x1, SYS_ID_AA64MMFR3_EL1</div><div class='hunk'>@@ -231,17 +233,19 @@</div><div class='ctx'> 	cbz	x1, .Lskip_poe_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	/* Disable trapping of POR_EL0 */</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nPOR_EL0</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nPOR_EL0</div><div class='ctx'> </div><div class='ctx'> .Lskip_poe_fgt_\@:</div><div class='ctx'> 	/* GCS depends on PIE so we don't check it if PIE is absent */</div><div class='ctx'> 	mrs_s	x1, SYS_ID_AA64PFR1_EL1</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4</div><div class='del'>-	cbz	x1, .Lset_fgt_\@</div><div class='add'>+	cbz	x1, .Lskip_gce_fgt_\@</div><div class='ctx'> </div><div class='ctx'> 	/* Disable traps of access to GCS registers at EL0 and EL1 */</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nGCS_EL1_MASK</div><div class='del'>-	orr	x0, x0, #HFGxTR_EL2_nGCS_EL0_MASK</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nGCS_EL1_MASK</div><div class='add'>+	orr	x0, x0, #HFGRTR_EL2_nGCS_EL0_MASK</div><div class='add'>+</div><div class='add'>+.Lskip_gce_fgt_\@:</div><div class='ctx'> </div><div class='ctx'> .Lset_fgt_\@:</div><div class='ctx'> 	msr_s	SYS_HFGRTR_EL2, x0</div><div class='head'>diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h<br/>index d1b1a33f9a8b..e1deed824464 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/esr.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/esr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/esr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/esr.h</a></div><div class='hunk'>@@ -20,7 +20,8 @@</div><div class='ctx'> #define ESR_ELx_EC_FP_ASIMD	UL(0x07)</div><div class='ctx'> #define ESR_ELx_EC_CP10_ID	UL(0x08)	/* EL2 only */</div><div class='ctx'> #define ESR_ELx_EC_PAC		UL(0x09)	/* EL2 and above */</div><div class='del'>-/* Unallocated EC: 0x0A - 0x0B */</div><div class='add'>+#define ESR_ELx_EC_OTHER	UL(0x0A)</div><div class='add'>+/* Unallocated EC: 0x0B */</div><div class='ctx'> #define ESR_ELx_EC_CP14_64	UL(0x0C)</div><div class='ctx'> #define ESR_ELx_EC_BTI		UL(0x0D)</div><div class='ctx'> #define ESR_ELx_EC_ILL		UL(0x0E)</div><div class='hunk'>@@ -99,6 +100,8 @@</div><div class='ctx'> #define ESR_ELx_AET_CE		(UL(6) &lt;&lt; ESR_ELx_AET_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /* Shared ISS field definitions for Data/Instruction aborts */</div><div class='add'>+#define ESR_ELx_VNCR_SHIFT	(13)</div><div class='add'>+#define ESR_ELx_VNCR		(UL(1) &lt;&lt; ESR_ELx_VNCR_SHIFT)</div><div class='ctx'> #define ESR_ELx_SET_SHIFT	(11)</div><div class='ctx'> #define ESR_ELx_SET_MASK	(UL(3) &lt;&lt; ESR_ELx_SET_SHIFT)</div><div class='ctx'> #define ESR_ELx_FnV_SHIFT	(10)</div><div class='hunk'>@@ -121,6 +124,15 @@</div><div class='ctx'> #define ESR_ELx_FSC_SEA_TTW(n)	(0x14 + (n))</div><div class='ctx'> #define ESR_ELx_FSC_SECC	(0x18)</div><div class='ctx'> #define ESR_ELx_FSC_SECC_TTW(n)	(0x1c + (n))</div><div class='add'>+#define ESR_ELx_FSC_ADDRSZ	(0x00)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Annoyingly, the negative levels for Address size faults aren't laid out</div><div class='add'>+ * contiguously (or in the desired order)</div><div class='add'>+ */</div><div class='add'>+#define ESR_ELx_FSC_ADDRSZ_nL(n)	((n) == -1 ? 0x25 : 0x2C)</div><div class='add'>+#define ESR_ELx_FSC_ADDRSZ_L(n)		((n) &lt; 0 ? ESR_ELx_FSC_ADDRSZ_nL(n) : \</div><div class='add'>+						   (ESR_ELx_FSC_ADDRSZ + (n)))</div><div class='ctx'> </div><div class='ctx'> /* Status codes for individual page table levels */</div><div class='ctx'> #define ESR_ELx_FSC_ACCESS_L(n)	(ESR_ELx_FSC_ACCESS + (n))</div><div class='hunk'>@@ -161,8 +173,6 @@</div><div class='ctx'> #define ESR_ELx_Xs_MASK		(GENMASK_ULL(4, 0))</div><div class='ctx'> </div><div class='ctx'> /* ISS field definitions for exceptions taken in to Hyp */</div><div class='del'>-#define ESR_ELx_FSC_ADDRSZ	(0x00)</div><div class='del'>-#define ESR_ELx_FSC_ADDRSZ_L(n)	(ESR_ELx_FSC_ADDRSZ + (n))</div><div class='ctx'> #define ESR_ELx_CV		(UL(1) &lt;&lt; 24)</div><div class='ctx'> #define ESR_ELx_COND_SHIFT	(20)</div><div class='ctx'> #define ESR_ELx_COND_MASK	(UL(0xF) &lt;&lt; ESR_ELx_COND_SHIFT)</div><div class='hunk'>@@ -174,6 +184,13 @@</div><div class='ctx'> #define ESR_ELx_WFx_ISS_WFE	(UL(1) &lt;&lt; 0)</div><div class='ctx'> #define ESR_ELx_xVC_IMM_MASK	((UL(1) &lt;&lt; 16) - 1)</div><div class='ctx'> </div><div class='add'>+/* ISS definitions for LD64B/ST64B/{T,P}SBCSYNC instructions */</div><div class='add'>+#define ESR_ELx_ISS_OTHER_ST64BV	(0)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_ST64BV0	(1)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_LDST64B	(2)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_TSBCSYNC	(3)</div><div class='add'>+#define ESR_ELx_ISS_OTHER_PSBCSYNC	(4)</div><div class='add'>+</div><div class='ctx'> #define DISR_EL1_IDS		(UL(1) &lt;&lt; 24)</div><div class='ctx'> /*</div><div class='ctx'>  * DISR_EL1 and ESR_ELx share the bottom 13 bits, but the RES0 bits may mean</div><div class='hunk'>@@ -371,12 +388,14 @@</div><div class='ctx'> /*</div><div class='ctx'>  * ISS values for SME traps</div><div class='ctx'>  */</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_MASK		GENMASK(2, 0)</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC(esr)		((esr) &amp; ESR_ELx_SME_ISS_SMTC_MASK)</div><div class='ctx'> </div><div class='del'>-#define ESR_ELx_SME_ISS_SME_DISABLED	0</div><div class='del'>-#define ESR_ELx_SME_ISS_ILL		1</div><div class='del'>-#define ESR_ELx_SME_ISS_SM_DISABLED	2</div><div class='del'>-#define ESR_ELx_SME_ISS_ZA_DISABLED	3</div><div class='del'>-#define ESR_ELx_SME_ISS_ZT_DISABLED	4</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_SME_DISABLED	0</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_ILL		1</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_SM_DISABLED	2</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_ZA_DISABLED	3</div><div class='add'>+#define ESR_ELx_SME_ISS_SMTC_ZT_DISABLED	4</div><div class='ctx'> </div><div class='ctx'> /* ISS field definitions for MOPS exceptions */</div><div class='ctx'> #define ESR_ELx_MOPS_ISS_MEM_INST	(UL(1) &lt;&lt; 24)</div><div class='hunk'>@@ -433,6 +452,11 @@ static inline bool esr_is_cfi_brk(unsigned long esr)</div><div class='ctx'> 	       (esr_brk_comment(esr) &amp; ~CFI_BRK_IMM_MASK) == CFI_BRK_IMM_BASE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool esr_is_ubsan_brk(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	return (esr_brk_comment(esr) &amp; ~UBSAN_BRK_MASK) == UBSAN_BRK_IMM;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool esr_fsc_is_translation_fault(unsigned long esr)</div><div class='ctx'> {</div><div class='ctx'> 	esr = esr &amp; ESR_ELx_FSC;</div><div class='hunk'>@@ -464,6 +488,39 @@ static inline bool esr_fsc_is_access_flag_fault(unsigned long esr)</div><div class='ctx'> 	       (esr == ESR_ELx_FSC_ACCESS_L(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool esr_fsc_is_addr_sz_fault(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	esr &amp;= ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	return (esr == ESR_ELx_FSC_ADDRSZ_L(3))	||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(2))	||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(1)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(0))	||</div><div class='add'>+	       (esr == ESR_ELx_FSC_ADDRSZ_L(-1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool esr_fsc_is_sea_ttw(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	esr = esr &amp; ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	return (esr == ESR_ELx_FSC_SEA_TTW(3)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(2)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(1)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(0)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SEA_TTW(-1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool esr_fsc_is_secc_ttw(unsigned long esr)</div><div class='add'>+{</div><div class='add'>+	esr = esr &amp; ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	return (esr == ESR_ELx_FSC_SECC_TTW(3)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(2)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(1)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(0)) ||</div><div class='add'>+	       (esr == ESR_ELx_FSC_SECC_TTW(-1));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Indicate whether ESR.EC==0x1A is for an ERETAx instruction */</div><div class='ctx'> static inline bool esr_iss_is_eretax(unsigned long esr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixmap.h<br/>index 87e307804b99..635a43c4ec85 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/fixmap.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/fixmap.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/fixmap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/fixmap.h</a></div><div class='hunk'>@@ -48,6 +48,12 @@ enum fixed_addresses {</div><div class='ctx'> 	FIX_EARLYCON_MEM_BASE,</div><div class='ctx'> 	FIX_TEXT_POKE0,</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM</div><div class='add'>+	/* One slot per CPU, mapping the guest's VNCR page at EL2. */</div><div class='add'>+	FIX_VNCR_END,</div><div class='add'>+	FIX_VNCR = FIX_VNCR_END + NR_CPUS,</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ACPI_APEI_GHES</div><div class='ctx'> 	/* Used for GHES mapping from assorted contexts */</div><div class='ctx'> 	FIX_APEI_GHES_IRQ,</div><div class='head'>diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h<br/>index 564bc09b3e06..b8cf0ea43cc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/fpsimd.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/fpsimd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/fpsimd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/fpsimd.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #define __ASM_FP_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='add'>+#include &lt;asm/percpu.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/sigcontext.h&gt;</div><div class='hunk'>@@ -76,7 +77,6 @@ extern void fpsimd_load_state(struct user_fpsimd_state *state);</div><div class='ctx'> extern void fpsimd_thread_switch(struct task_struct *next);</div><div class='ctx'> extern void fpsimd_flush_thread(void);</div><div class='ctx'> </div><div class='del'>-extern void fpsimd_signal_preserve_current_state(void);</div><div class='ctx'> extern void fpsimd_preserve_current_state(void);</div><div class='ctx'> extern void fpsimd_restore_current_state(void);</div><div class='ctx'> extern void fpsimd_update_current_state(struct user_fpsimd_state const *state);</div><div class='hunk'>@@ -93,9 +93,12 @@ struct cpu_fp_state {</div><div class='ctx'> 	enum fp_type to_save;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+DECLARE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);</div><div class='add'>+</div><div class='ctx'> extern void fpsimd_bind_state_to_cpu(struct cpu_fp_state *fp_state);</div><div class='ctx'> </div><div class='ctx'> extern void fpsimd_flush_task_state(struct task_struct *target);</div><div class='add'>+extern void fpsimd_save_and_flush_current_state(void);</div><div class='ctx'> extern void fpsimd_save_and_flush_cpu_state(void);</div><div class='ctx'> </div><div class='ctx'> static inline bool thread_sm_enabled(struct thread_struct *thread)</div><div class='hunk'>@@ -108,6 +111,8 @@ static inline bool thread_za_enabled(struct thread_struct *thread)</div><div class='ctx'> 	return system_supports_sme() &amp;&amp; (thread-&gt;svcr &amp; SVCR_ZA_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern void task_smstop_sm(struct task_struct *task);</div><div class='add'>+</div><div class='ctx'> /* Maximum VL that SVE/SME VL-agnostic software can transparently support */</div><div class='ctx'> #define VL_ARCH_MAX 0x100</div><div class='ctx'> </div><div class='hunk'>@@ -195,10 +200,8 @@ struct vl_info {</div><div class='ctx'> </div><div class='ctx'> extern void sve_alloc(struct task_struct *task, bool flush);</div><div class='ctx'> extern void fpsimd_release_task(struct task_struct *task);</div><div class='del'>-extern void fpsimd_sync_to_sve(struct task_struct *task);</div><div class='del'>-extern void fpsimd_force_sync_to_sve(struct task_struct *task);</div><div class='del'>-extern void sve_sync_to_fpsimd(struct task_struct *task);</div><div class='del'>-extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);</div><div class='add'>+extern void fpsimd_sync_from_effective_state(struct task_struct *task);</div><div class='add'>+extern void fpsimd_sync_to_effective_state_zeropad(struct task_struct *task);</div><div class='ctx'> </div><div class='ctx'> extern int vec_set_vector_length(struct task_struct *task, enum vec_type type,</div><div class='ctx'> 				 unsigned long vl, unsigned long flags);</div><div class='hunk'>@@ -292,14 +295,29 @@ static inline bool sve_vq_available(unsigned int vq)</div><div class='ctx'> 	return vq_available(ARM64_VEC_SVE, vq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-size_t sve_state_size(struct task_struct const *task);</div><div class='add'>+static inline size_t __sve_state_size(unsigned int sve_vl, unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	unsigned int vl = max(sve_vl, sme_vl);</div><div class='add'>+	return SVE_SIG_REGS_SIZE(sve_vq_from_vl(vl));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return how many bytes of memory are required to store the full SVE</div><div class='add'>+ * state for task, given task's currently configured vector length.</div><div class='add'>+ */</div><div class='add'>+static inline size_t sve_state_size(struct task_struct const *task)</div><div class='add'>+{</div><div class='add'>+	unsigned int sve_vl = task_get_sve_vl(task);</div><div class='add'>+	unsigned int sme_vl = task_get_sme_vl(task);</div><div class='add'>+	return __sve_state_size(sve_vl, sme_vl);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #else /* ! CONFIG_ARM64_SVE */</div><div class='ctx'> </div><div class='ctx'> static inline void sve_alloc(struct task_struct *task, bool flush) { }</div><div class='ctx'> static inline void fpsimd_release_task(struct task_struct *task) { }</div><div class='del'>-static inline void sve_sync_to_fpsimd(struct task_struct *task) { }</div><div class='del'>-static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }</div><div class='add'>+static inline void fpsimd_sync_from_effective_state(struct task_struct *task) { }</div><div class='add'>+static inline void fpsimd_sync_to_effective_state_zeropad(struct task_struct *task) { }</div><div class='ctx'> </div><div class='ctx'> static inline int sve_max_virtualisable_vl(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -333,6 +351,11 @@ static inline void vec_update_vq_map(enum vec_type t) { }</div><div class='ctx'> static inline int vec_verify_vq_map(enum vec_type t) { return 0; }</div><div class='ctx'> static inline void sve_setup(void) { }</div><div class='ctx'> </div><div class='add'>+static inline size_t __sve_state_size(unsigned int sve_vl, unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline size_t sve_state_size(struct task_struct const *task)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -385,6 +408,16 @@ extern int sme_set_current_vl(unsigned long arg);</div><div class='ctx'> extern int sme_get_current_vl(void);</div><div class='ctx'> extern void sme_suspend_exit(void);</div><div class='ctx'> </div><div class='add'>+static inline size_t __sme_state_size(unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	size_t size = ZA_SIG_REGS_SIZE(sve_vq_from_vl(sme_vl));</div><div class='add'>+</div><div class='add'>+	if (system_supports_sme2())</div><div class='add'>+		size += ZT_SIG_REG_SIZE;</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Return how many bytes of memory are required to store the full SME</div><div class='ctx'>  * specific state for task, given task's currently configured vector</div><div class='hunk'>@@ -392,15 +425,7 @@ extern void sme_suspend_exit(void);</div><div class='ctx'>  */</div><div class='ctx'> static inline size_t sme_state_size(struct task_struct const *task)</div><div class='ctx'> {</div><div class='del'>-	unsigned int vl = task_get_sme_vl(task);</div><div class='del'>-	size_t size;</div><div class='del'>-</div><div class='del'>-	size = ZA_SIG_REGS_SIZE(sve_vq_from_vl(vl));</div><div class='del'>-</div><div class='del'>-	if (system_supports_sme2())</div><div class='del'>-		size += ZT_SIG_REG_SIZE;</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='add'>+	return __sme_state_size(task_get_sme_vl(task));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='hunk'>@@ -421,6 +446,11 @@ static inline int sme_set_current_vl(unsigned long arg) { return -EINVAL; }</div><div class='ctx'> static inline int sme_get_current_vl(void) { return -EINVAL; }</div><div class='ctx'> static inline void sme_suspend_exit(void) { }</div><div class='ctx'> </div><div class='add'>+static inline size_t __sme_state_size(unsigned int sme_vl)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline size_t sme_state_size(struct task_struct const *task)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/arm64/include/asm/hardirq.h b/arch/arm64/include/asm/hardirq.h<br/>index cbfa7b6f2e09..77d6b8c63d4e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/hardirq.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/hardirq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/hardirq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/hardirq.h</a></div><div class='hunk'>@@ -41,7 +41,7 @@ do {									\</div><div class='ctx'> 									\</div><div class='ctx'> 	___hcr = read_sysreg(hcr_el2);					\</div><div class='ctx'> 	if (!(___hcr &amp; HCR_TGE)) {					\</div><div class='del'>-		write_sysreg(___hcr | HCR_TGE, hcr_el2);		\</div><div class='add'>+		write_sysreg_hcr(___hcr | HCR_TGE);			\</div><div class='ctx'> 		isb();							\</div><div class='ctx'> 	}								\</div><div class='ctx'> 	/*								\</div><div class='hunk'>@@ -82,7 +82,7 @@ do {									\</div><div class='ctx'> 	 */								\</div><div class='ctx'> 	barrier();							\</div><div class='ctx'> 	if (!___ctx-&gt;cnt &amp;&amp; !(___hcr &amp; HCR_TGE))			\</div><div class='del'>-		write_sysreg(___hcr, hcr_el2);				\</div><div class='add'>+		write_sysreg_hcr(___hcr);				\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> static inline void ack_bad_irq(unsigned int irq)</div><div class='head'>diff --git a/arch/arm64/include/asm/hugetlb.h b/arch/arm64/include/asm/hugetlb.h<br/>index 07fbf5bf85a7..2a8155c4a882 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/hugetlb.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/hugetlb.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/hugetlb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/hugetlb.h</a></div><div class='hunk'>@@ -69,29 +69,38 @@ extern void huge_ptep_modify_prot_commit(struct vm_area_struct *vma,</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/hugetlb.h&gt;</div><div class='ctx'> </div><div class='del'>-#define __HAVE_ARCH_FLUSH_HUGETLB_TLB_RANGE</div><div class='del'>-static inline void flush_hugetlb_tlb_range(struct vm_area_struct *vma,</div><div class='del'>-					   unsigned long start,</div><div class='del'>-					   unsigned long end)</div><div class='add'>+static inline void __flush_hugetlb_tlb_range(struct vm_area_struct *vma,</div><div class='add'>+					     unsigned long start,</div><div class='add'>+					     unsigned long end,</div><div class='add'>+					     unsigned long stride,</div><div class='add'>+					     bool last_level)</div><div class='ctx'> {</div><div class='del'>-	unsigned long stride = huge_page_size(hstate_vma(vma));</div><div class='del'>-</div><div class='ctx'> 	switch (stride) {</div><div class='ctx'> #ifndef __PAGETABLE_PMD_FOLDED</div><div class='ctx'> 	case PUD_SIZE:</div><div class='del'>-		__flush_tlb_range(vma, start, end, PUD_SIZE, false, 1);</div><div class='add'>+		__flush_tlb_range(vma, start, end, PUD_SIZE, last_level, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> #endif</div><div class='ctx'> 	case CONT_PMD_SIZE:</div><div class='ctx'> 	case PMD_SIZE:</div><div class='del'>-		__flush_tlb_range(vma, start, end, PMD_SIZE, false, 2);</div><div class='add'>+		__flush_tlb_range(vma, start, end, PMD_SIZE, last_level, 2);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CONT_PTE_SIZE:</div><div class='del'>-		__flush_tlb_range(vma, start, end, PAGE_SIZE, false, 3);</div><div class='add'>+		__flush_tlb_range(vma, start, end, PAGE_SIZE, last_level, 3);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		__flush_tlb_range(vma, start, end, PAGE_SIZE, false, TLBI_TTL_UNKNOWN);</div><div class='add'>+		__flush_tlb_range(vma, start, end, PAGE_SIZE, last_level, TLBI_TTL_UNKNOWN);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define __HAVE_ARCH_FLUSH_HUGETLB_TLB_RANGE</div><div class='add'>+static inline void flush_hugetlb_tlb_range(struct vm_area_struct *vma,</div><div class='add'>+					   unsigned long start,</div><div class='add'>+					   unsigned long end)</div><div class='add'>+{</div><div class='add'>+	unsigned long stride = huge_page_size(hstate_vma(vma));</div><div class='add'>+</div><div class='add'>+	__flush_hugetlb_tlb_range(vma, start, end, stride, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_HUGETLB_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h<br/>index 39577f1d079a..18c7811774d3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/insn.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/insn.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/insn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/insn.h</a></div><div class='hunk'>@@ -706,6 +706,7 @@ u32 aarch64_insn_gen_cas(enum aarch64_insn_register result,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type);</div><div class='add'>+u32 aarch64_insn_gen_dsb(enum aarch64_insn_mb_type type);</div><div class='ctx'> u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,</div><div class='ctx'> 			 enum aarch64_insn_system_register sysreg);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h<br/>index 974d72b5905b..1da290aeedce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_arm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_arm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_arm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/kvm_arm.h</a></div><div class='hunk'>@@ -12,67 +12,70 @@</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='ctx'> #include &lt;asm/types.h&gt;</div><div class='ctx'> </div><div class='del'>-/* Hyp Configuration Register (HCR) bits */</div><div class='del'>-</div><div class='del'>-#define HCR_TID5	(UL(1) &lt;&lt; 58)</div><div class='del'>-#define HCR_DCT		(UL(1) &lt;&lt; 57)</div><div class='del'>-#define HCR_ATA_SHIFT	56</div><div class='del'>-#define HCR_ATA		(UL(1) &lt;&lt; HCR_ATA_SHIFT)</div><div class='del'>-#define HCR_TTLBOS	(UL(1) &lt;&lt; 55)</div><div class='del'>-#define HCR_TTLBIS	(UL(1) &lt;&lt; 54)</div><div class='del'>-#define HCR_ENSCXT	(UL(1) &lt;&lt; 53)</div><div class='del'>-#define HCR_TOCU	(UL(1) &lt;&lt; 52)</div><div class='del'>-#define HCR_AMVOFFEN	(UL(1) &lt;&lt; 51)</div><div class='del'>-#define HCR_TICAB	(UL(1) &lt;&lt; 50)</div><div class='del'>-#define HCR_TID4	(UL(1) &lt;&lt; 49)</div><div class='del'>-#define HCR_FIEN	(UL(1) &lt;&lt; 47)</div><div class='del'>-#define HCR_FWB		(UL(1) &lt;&lt; 46)</div><div class='del'>-#define HCR_NV2		(UL(1) &lt;&lt; 45)</div><div class='del'>-#define HCR_AT		(UL(1) &lt;&lt; 44)</div><div class='del'>-#define HCR_NV1		(UL(1) &lt;&lt; 43)</div><div class='del'>-#define HCR_NV		(UL(1) &lt;&lt; 42)</div><div class='del'>-#define HCR_API		(UL(1) &lt;&lt; 41)</div><div class='del'>-#define HCR_APK		(UL(1) &lt;&lt; 40)</div><div class='del'>-#define HCR_TEA		(UL(1) &lt;&lt; 37)</div><div class='del'>-#define HCR_TERR	(UL(1) &lt;&lt; 36)</div><div class='del'>-#define HCR_TLOR	(UL(1) &lt;&lt; 35)</div><div class='del'>-#define HCR_E2H		(UL(1) &lt;&lt; 34)</div><div class='del'>-#define HCR_ID		(UL(1) &lt;&lt; 33)</div><div class='del'>-#define HCR_CD		(UL(1) &lt;&lt; 32)</div><div class='del'>-#define HCR_RW_SHIFT	31</div><div class='del'>-#define HCR_RW		(UL(1) &lt;&lt; HCR_RW_SHIFT)</div><div class='del'>-#define HCR_TRVM	(UL(1) &lt;&lt; 30)</div><div class='del'>-#define HCR_HCD		(UL(1) &lt;&lt; 29)</div><div class='del'>-#define HCR_TDZ		(UL(1) &lt;&lt; 28)</div><div class='del'>-#define HCR_TGE		(UL(1) &lt;&lt; 27)</div><div class='del'>-#define HCR_TVM		(UL(1) &lt;&lt; 26)</div><div class='del'>-#define HCR_TTLB	(UL(1) &lt;&lt; 25)</div><div class='del'>-#define HCR_TPU		(UL(1) &lt;&lt; 24)</div><div class='del'>-#define HCR_TPC		(UL(1) &lt;&lt; 23) /* HCR_TPCP if FEAT_DPB */</div><div class='del'>-#define HCR_TSW		(UL(1) &lt;&lt; 22)</div><div class='del'>-#define HCR_TACR	(UL(1) &lt;&lt; 21)</div><div class='del'>-#define HCR_TIDCP	(UL(1) &lt;&lt; 20)</div><div class='del'>-#define HCR_TSC		(UL(1) &lt;&lt; 19)</div><div class='del'>-#define HCR_TID3	(UL(1) &lt;&lt; 18)</div><div class='del'>-#define HCR_TID2	(UL(1) &lt;&lt; 17)</div><div class='del'>-#define HCR_TID1	(UL(1) &lt;&lt; 16)</div><div class='del'>-#define HCR_TID0	(UL(1) &lt;&lt; 15)</div><div class='del'>-#define HCR_TWE		(UL(1) &lt;&lt; 14)</div><div class='del'>-#define HCR_TWI		(UL(1) &lt;&lt; 13)</div><div class='del'>-#define HCR_DC		(UL(1) &lt;&lt; 12)</div><div class='del'>-#define HCR_BSU		(3 &lt;&lt; 10)</div><div class='del'>-#define HCR_BSU_IS	(UL(1) &lt;&lt; 10)</div><div class='del'>-#define HCR_FB		(UL(1) &lt;&lt; 9)</div><div class='del'>-#define HCR_VSE		(UL(1) &lt;&lt; 8)</div><div class='del'>-#define HCR_VI		(UL(1) &lt;&lt; 7)</div><div class='del'>-#define HCR_VF		(UL(1) &lt;&lt; 6)</div><div class='del'>-#define HCR_AMO		(UL(1) &lt;&lt; 5)</div><div class='del'>-#define HCR_IMO		(UL(1) &lt;&lt; 4)</div><div class='del'>-#define HCR_FMO		(UL(1) &lt;&lt; 3)</div><div class='del'>-#define HCR_PTW		(UL(1) &lt;&lt; 2)</div><div class='del'>-#define HCR_SWIO	(UL(1) &lt;&lt; 1)</div><div class='del'>-#define HCR_VM		(UL(1) &lt;&lt; 0)</div><div class='del'>-#define HCR_RES0	((UL(1) &lt;&lt; 48) | (UL(1) &lt;&lt; 39))</div><div class='add'>+/*</div><div class='add'>+ * Because I'm terribly lazy and that repainting the whole of the KVM</div><div class='add'>+ * code with the proper names is a pain, use a helper to map the names</div><div class='add'>+ * inherited from AArch32 with the new fancy nomenclature. One day...</div><div class='add'>+ */</div><div class='add'>+#define	__HCR(x)	HCR_EL2_##x</div><div class='add'>+</div><div class='add'>+#define HCR_TID5	__HCR(TID5)</div><div class='add'>+#define HCR_DCT		__HCR(DCT)</div><div class='add'>+#define HCR_ATA_SHIFT	__HCR(ATA_SHIFT)</div><div class='add'>+#define HCR_ATA		__HCR(ATA)</div><div class='add'>+#define HCR_TTLBOS	__HCR(TTLBOS)</div><div class='add'>+#define HCR_TTLBIS	__HCR(TTLBIS)</div><div class='add'>+#define HCR_ENSCXT	__HCR(EnSCXT)</div><div class='add'>+#define HCR_TOCU	__HCR(TOCU)</div><div class='add'>+#define HCR_AMVOFFEN	__HCR(AMVOFFEN)</div><div class='add'>+#define HCR_TICAB	__HCR(TICAB)</div><div class='add'>+#define HCR_TID4	__HCR(TID4)</div><div class='add'>+#define HCR_FIEN	__HCR(FIEN)</div><div class='add'>+#define HCR_FWB		__HCR(FWB)</div><div class='add'>+#define HCR_NV2		__HCR(NV2)</div><div class='add'>+#define HCR_AT		__HCR(AT)</div><div class='add'>+#define HCR_NV1		__HCR(NV1)</div><div class='add'>+#define HCR_NV		__HCR(NV)</div><div class='add'>+#define HCR_API		__HCR(API)</div><div class='add'>+#define HCR_APK		__HCR(APK)</div><div class='add'>+#define HCR_TEA		__HCR(TEA)</div><div class='add'>+#define HCR_TERR	__HCR(TERR)</div><div class='add'>+#define HCR_TLOR	__HCR(TLOR)</div><div class='add'>+#define HCR_E2H		__HCR(E2H)</div><div class='add'>+#define HCR_ID		__HCR(ID)</div><div class='add'>+#define HCR_CD		__HCR(CD)</div><div class='add'>+#define HCR_RW		__HCR(RW)</div><div class='add'>+#define HCR_TRVM	__HCR(TRVM)</div><div class='add'>+#define HCR_HCD		__HCR(HCD)</div><div class='add'>+#define HCR_TDZ		__HCR(TDZ)</div><div class='add'>+#define HCR_TGE		__HCR(TGE)</div><div class='add'>+#define HCR_TVM		__HCR(TVM)</div><div class='add'>+#define HCR_TTLB	__HCR(TTLB)</div><div class='add'>+#define HCR_TPU		__HCR(TPU)</div><div class='add'>+#define HCR_TPC		__HCR(TPCP)</div><div class='add'>+#define HCR_TSW		__HCR(TSW)</div><div class='add'>+#define HCR_TACR	__HCR(TACR)</div><div class='add'>+#define HCR_TIDCP	__HCR(TIDCP)</div><div class='add'>+#define HCR_TSC		__HCR(TSC)</div><div class='add'>+#define HCR_TID3	__HCR(TID3)</div><div class='add'>+#define HCR_TID2	__HCR(TID2)</div><div class='add'>+#define HCR_TID1	__HCR(TID1)</div><div class='add'>+#define HCR_TID0	__HCR(TID0)</div><div class='add'>+#define HCR_TWE		__HCR(TWE)</div><div class='add'>+#define HCR_TWI		__HCR(TWI)</div><div class='add'>+#define HCR_DC		__HCR(DC)</div><div class='add'>+#define HCR_BSU		__HCR(BSU)</div><div class='add'>+#define HCR_BSU_IS	__HCR(BSU_IS)</div><div class='add'>+#define HCR_FB		__HCR(FB)</div><div class='add'>+#define HCR_VSE		__HCR(VSE)</div><div class='add'>+#define HCR_VI		__HCR(VI)</div><div class='add'>+#define HCR_VF		__HCR(VF)</div><div class='add'>+#define HCR_AMO		__HCR(AMO)</div><div class='add'>+#define HCR_IMO		__HCR(IMO)</div><div class='add'>+#define HCR_FMO		__HCR(FMO)</div><div class='add'>+#define HCR_PTW		__HCR(PTW)</div><div class='add'>+#define HCR_SWIO	__HCR(SWIO)</div><div class='add'>+#define HCR_VM		__HCR(VM)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The bits we set in HCR:</div><div class='hunk'>@@ -100,9 +103,8 @@</div><div class='ctx'> 			 HCR_FMO | HCR_IMO | HCR_PTW | HCR_TID3 | HCR_TID1)</div><div class='ctx'> #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK | HCR_ATA)</div><div class='ctx'> #define HCR_HOST_NVHE_PROTECTED_FLAGS (HCR_HOST_NVHE_FLAGS | HCR_TSC)</div><div class='del'>-#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)</div><div class='add'>+#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H | HCR_AMO | HCR_IMO | HCR_FMO)</div><div class='ctx'> </div><div class='del'>-#define HCRX_HOST_FLAGS (HCRX_EL2_MSCEn | HCRX_EL2_TCR2En | HCRX_EL2_EnFPM)</div><div class='ctx'> #define MPAMHCR_HOST_FLAGS	0</div><div class='ctx'> </div><div class='ctx'> /* TCR_EL2 Registers bits */</div><div class='hunk'>@@ -313,56 +315,19 @@</div><div class='ctx'> 				 GENMASK(15, 0))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * FGT register definitions</div><div class='del'>- *</div><div class='del'>- * RES0 and polarity masks as of DDI0487J.a, to be updated as needed.</div><div class='del'>- * We're not using the generated masks as they are usually ahead of</div><div class='del'>- * the published ARM ARM, which we use as a reference.</div><div class='del'>- *</div><div class='del'>- * Once we get to a point where the two describe the same thing, we'll</div><div class='del'>- * merge the definitions. One day.</div><div class='del'>- */</div><div class='del'>-#define __HFGRTR_EL2_RES0	HFGxTR_EL2_RES0</div><div class='del'>-#define __HFGRTR_EL2_MASK	GENMASK(49, 0)</div><div class='del'>-#define __HFGRTR_EL2_nMASK	~(__HFGRTR_EL2_RES0 | __HFGRTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The HFGWTR bits are a subset of HFGRTR bits. To ensure we don't miss any</div><div class='del'>- * future additions, define __HFGWTR* macros relative to __HFGRTR* ones.</div><div class='add'>+ * Polarity masks for HCRX_EL2, limited to the bits that we know about</div><div class='add'>+ * at this point in time. It doesn't mean that we actually *handle*</div><div class='add'>+ * them, but that at least those that are not advertised to a guest</div><div class='add'>+ * will be RES0 for that guest.</div><div class='ctx'>  */</div><div class='del'>-#define __HFGRTR_ONLY_MASK	(BIT(46) | BIT(42) | BIT(40) | BIT(28) | \</div><div class='del'>-				 GENMASK(26, 25) | BIT(21) | BIT(18) | \</div><div class='del'>-				 GENMASK(15, 14) | GENMASK(10, 9) | BIT(2))</div><div class='del'>-#define __HFGWTR_EL2_RES0	(__HFGRTR_EL2_RES0 | __HFGRTR_ONLY_MASK)</div><div class='del'>-#define __HFGWTR_EL2_MASK	(__HFGRTR_EL2_MASK &amp; ~__HFGRTR_ONLY_MASK)</div><div class='del'>-#define __HFGWTR_EL2_nMASK	~(__HFGWTR_EL2_RES0 | __HFGWTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HFGITR_EL2_RES0	HFGITR_EL2_RES0</div><div class='del'>-#define __HFGITR_EL2_MASK	(BIT(62) | BIT(60) | GENMASK(54, 0))</div><div class='del'>-#define __HFGITR_EL2_nMASK	~(__HFGITR_EL2_RES0 | __HFGITR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HDFGRTR_EL2_RES0	HDFGRTR_EL2_RES0</div><div class='del'>-#define __HDFGRTR_EL2_MASK	(BIT(63) | GENMASK(58, 50) | GENMASK(48, 43) | \</div><div class='del'>-				 GENMASK(41, 40) | GENMASK(37, 22) | \</div><div class='del'>-				 GENMASK(19, 9) | GENMASK(7, 0))</div><div class='del'>-#define __HDFGRTR_EL2_nMASK	~(__HDFGRTR_EL2_RES0 | __HDFGRTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HDFGWTR_EL2_RES0	HDFGWTR_EL2_RES0</div><div class='del'>-#define __HDFGWTR_EL2_MASK	(GENMASK(57, 52) | GENMASK(50, 48) | \</div><div class='del'>-				 GENMASK(46, 44) | GENMASK(42, 41) | \</div><div class='del'>-				 GENMASK(37, 35) | GENMASK(33, 31) | \</div><div class='del'>-				 GENMASK(29, 23) | GENMASK(21, 10) | \</div><div class='del'>-				 GENMASK(8, 7) | GENMASK(5, 0))</div><div class='del'>-#define __HDFGWTR_EL2_nMASK	~(__HDFGWTR_EL2_RES0 | __HDFGWTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-#define __HAFGRTR_EL2_RES0	HAFGRTR_EL2_RES0</div><div class='del'>-#define __HAFGRTR_EL2_MASK	(GENMASK(49, 17) | GENMASK(4, 0))</div><div class='del'>-#define __HAFGRTR_EL2_nMASK	~(__HAFGRTR_EL2_RES0 | __HAFGRTR_EL2_MASK)</div><div class='del'>-</div><div class='del'>-/* Similar definitions for HCRX_EL2 */</div><div class='del'>-#define __HCRX_EL2_RES0         HCRX_EL2_RES0</div><div class='del'>-#define __HCRX_EL2_MASK		(BIT(6))</div><div class='del'>-#define __HCRX_EL2_nMASK	~(__HCRX_EL2_RES0 | __HCRX_EL2_MASK)</div><div class='add'>+#define __HCRX_EL2_MASK		(BIT_ULL(6))</div><div class='add'>+#define __HCRX_EL2_nMASK	(GENMASK_ULL(24, 14) | \</div><div class='add'>+				 GENMASK_ULL(11, 7)  | \</div><div class='add'>+				 GENMASK_ULL(5, 0))</div><div class='add'>+#define __HCRX_EL2_RES0		~(__HCRX_EL2_nMASK | __HCRX_EL2_MASK)</div><div class='add'>+#define __HCRX_EL2_RES1		~(__HCRX_EL2_nMASK | \</div><div class='add'>+				  __HCRX_EL2_MASK  | \</div><div class='add'>+				  __HCRX_EL2_RES0)</div><div class='ctx'> </div><div class='ctx'> /* Hyp Prefetch Fault Address Register (HPFAR/HDFAR) */</div><div class='ctx'> #define HPFAR_MASK	(~UL(0xf))</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h<br/>index d7cf66573aca..bd020fc28aa9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_emulate.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_emulate.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_emulate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/kvm_emulate.h</a></div><div class='hunk'>@@ -305,7 +305,12 @@ static __always_inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vc</div><div class='ctx'> </div><div class='ctx'> static __always_inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return ((phys_addr_t)vcpu-&gt;arch.fault.hpfar_el2 &amp; HPFAR_MASK) &lt;&lt; 8;</div><div class='add'>+	u64 hpfar = vcpu-&gt;arch.fault.hpfar_el2;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!(hpfar &amp; HPFAR_EL2_NS)))</div><div class='add'>+		return INVALID_GPA;</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(HPFAR_EL2_FIPA, hpfar) &lt;&lt; 12;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu)</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h<br/>index e98cfe7855a6..d941abc6b5ee 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_host.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> </div><div class='ctx'> #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS</div><div class='ctx'> </div><div class='del'>-#define KVM_VCPU_MAX_FEATURES 7</div><div class='add'>+#define KVM_VCPU_MAX_FEATURES 9</div><div class='ctx'> #define KVM_VCPU_VALID_FEATURES	(BIT(KVM_VCPU_MAX_FEATURES) - 1)</div><div class='ctx'> </div><div class='ctx'> #define KVM_REQ_SLEEP \</div><div class='hunk'>@@ -53,6 +53,7 @@</div><div class='ctx'> #define KVM_REQ_RESYNC_PMU_EL0		KVM_ARCH_REQ(7)</div><div class='ctx'> #define KVM_REQ_NESTED_S2_UNMAP		KVM_ARCH_REQ(8)</div><div class='ctx'> #define KVM_REQ_GUEST_HYP_IRQ_PENDING	KVM_ARCH_REQ(9)</div><div class='add'>+#define KVM_REQ_MAP_L1_VNCR_EL2		KVM_ARCH_REQ(10)</div><div class='ctx'> </div><div class='ctx'> #define KVM_DIRTY_LOG_MANUAL_CAPS   (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \</div><div class='ctx'> 				     KVM_DIRTY_LOG_INITIALLY_SET)</div><div class='hunk'>@@ -273,11 +274,17 @@ struct kvm_sysreg_masks;</div><div class='ctx'> </div><div class='ctx'> enum fgt_group_id {</div><div class='ctx'> 	__NO_FGT_GROUP__,</div><div class='del'>-	HFGxTR_GROUP,</div><div class='add'>+	HFGRTR_GROUP,</div><div class='add'>+	HFGWTR_GROUP = HFGRTR_GROUP,</div><div class='ctx'> 	HDFGRTR_GROUP,</div><div class='ctx'> 	HDFGWTR_GROUP = HDFGRTR_GROUP,</div><div class='ctx'> 	HFGITR_GROUP,</div><div class='ctx'> 	HAFGRTR_GROUP,</div><div class='add'>+	HFGRTR2_GROUP,</div><div class='add'>+	HFGWTR2_GROUP = HFGRTR2_GROUP,</div><div class='add'>+	HDFGRTR2_GROUP,</div><div class='add'>+	HDFGWTR2_GROUP = HDFGRTR2_GROUP,</div><div class='add'>+	HFGITR2_GROUP,</div><div class='ctx'> </div><div class='ctx'> 	/* Must be last */</div><div class='ctx'> 	__NR_FGT_GROUP_IDS__</div><div class='hunk'>@@ -359,8 +366,8 @@ struct kvm_arch {</div><div class='ctx'> </div><div class='ctx'> 	cpumask_var_t supported_cpus;</div><div class='ctx'> </div><div class='del'>-	/* PMCR_EL0.N value for the guest */</div><div class='del'>-	u8 pmcr_n;</div><div class='add'>+	/* Maximum number of counters for the guest */</div><div class='add'>+	u8 nr_pmu_counters;</div><div class='ctx'> </div><div class='ctx'> 	/* Iterator for idreg debugfs */</div><div class='ctx'> 	u8	idreg_debugfs_iter;</div><div class='hunk'>@@ -389,6 +396,9 @@ struct kvm_arch {</div><div class='ctx'> 	/* Masks for VNCR-backed and general EL2 sysregs */</div><div class='ctx'> 	struct kvm_sysreg_masks	*sysreg_masks;</div><div class='ctx'> </div><div class='add'>+	/* Count the number of VNCR_EL2 currently mapped */</div><div class='add'>+	atomic_t vncr_map_count;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For an untrusted host VM, 'pkvm.handle' is used to lookup</div><div class='ctx'> 	 * the associated pKVM instance in the hypervisor.</div><div class='hunk'>@@ -561,6 +571,13 @@ enum vcpu_sysreg {</div><div class='ctx'> 	VNCR(HDFGRTR_EL2),</div><div class='ctx'> 	VNCR(HDFGWTR_EL2),</div><div class='ctx'> 	VNCR(HAFGRTR_EL2),</div><div class='add'>+	VNCR(HFGRTR2_EL2),</div><div class='add'>+	VNCR(HFGWTR2_EL2),</div><div class='add'>+	VNCR(HFGITR2_EL2),</div><div class='add'>+	VNCR(HDFGRTR2_EL2),</div><div class='add'>+	VNCR(HDFGWTR2_EL2),</div><div class='add'>+</div><div class='add'>+	VNCR(VNCR_EL2),</div><div class='ctx'> </div><div class='ctx'> 	VNCR(CNTVOFF_EL2),</div><div class='ctx'> 	VNCR(CNTV_CVAL_EL0),</div><div class='hunk'>@@ -606,6 +623,37 @@ struct kvm_sysreg_masks {</div><div class='ctx'> 	} mask[NR_SYS_REGS - __SANITISED_REG_START__];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct fgt_masks {</div><div class='add'>+	const char	*str;</div><div class='add'>+	u64		mask;</div><div class='add'>+	u64		nmask;</div><div class='add'>+	u64		res0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct fgt_masks hfgrtr_masks;</div><div class='add'>+extern struct fgt_masks hfgwtr_masks;</div><div class='add'>+extern struct fgt_masks hfgitr_masks;</div><div class='add'>+extern struct fgt_masks hdfgrtr_masks;</div><div class='add'>+extern struct fgt_masks hdfgwtr_masks;</div><div class='add'>+extern struct fgt_masks hafgrtr_masks;</div><div class='add'>+extern struct fgt_masks hfgrtr2_masks;</div><div class='add'>+extern struct fgt_masks hfgwtr2_masks;</div><div class='add'>+extern struct fgt_masks hfgitr2_masks;</div><div class='add'>+extern struct fgt_masks hdfgrtr2_masks;</div><div class='add'>+extern struct fgt_masks hdfgwtr2_masks;</div><div class='add'>+</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgrtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgwtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgitr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgrtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgwtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hafgrtr_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgrtr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgwtr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hfgitr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgrtr2_masks);</div><div class='add'>+extern struct fgt_masks kvm_nvhe_sym(hdfgwtr2_masks);</div><div class='add'>+</div><div class='ctx'> struct kvm_cpu_context {</div><div class='ctx'> 	struct user_pt_regs regs;	/* sp = sp_el0 */</div><div class='ctx'> </div><div class='hunk'>@@ -654,6 +702,8 @@ struct kvm_host_data {</div><div class='ctx'> #define KVM_HOST_DATA_FLAG_HAS_TRBE			1</div><div class='ctx'> #define KVM_HOST_DATA_FLAG_TRBE_ENABLED			4</div><div class='ctx'> #define KVM_HOST_DATA_FLAG_EL1_TRACING_CONFIGURED	5</div><div class='add'>+#define KVM_HOST_DATA_FLAG_VCPU_IN_HYP_CONTEXT		6</div><div class='add'>+#define KVM_HOST_DATA_FLAG_L1_VNCR_MAPPED		7</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	struct kvm_cpu_context host_ctxt;</div><div class='hunk'>@@ -730,6 +780,8 @@ struct vcpu_reset_state {</div><div class='ctx'> 	bool		reset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct vncr_tlb;</div><div class='add'>+</div><div class='ctx'> struct kvm_vcpu_arch {</div><div class='ctx'> 	struct kvm_cpu_context ctxt;</div><div class='ctx'> </div><div class='hunk'>@@ -824,6 +876,9 @@ struct kvm_vcpu_arch {</div><div class='ctx'> </div><div class='ctx'> 	/* Per-vcpu CCSIDR override or NULL */</div><div class='ctx'> 	u32 *ccsidr;</div><div class='add'>+</div><div class='add'>+	/* Per-vcpu TLB for VNCR_EL2 -- NULL when !NV */</div><div class='add'>+	struct vncr_tlb	*vncr_tlb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -971,20 +1026,22 @@ struct kvm_vcpu_arch {</div><div class='ctx'> #define vcpu_sve_zcr_elx(vcpu)						\</div><div class='ctx'> 	(unlikely(is_hyp_ctxt(vcpu)) ? ZCR_EL2 : ZCR_EL1)</div><div class='ctx'> </div><div class='del'>-#define vcpu_sve_state_size(vcpu) ({					\</div><div class='add'>+#define sve_state_size_from_vl(sve_max_vl) ({				\</div><div class='ctx'> 	size_t __size_ret;						\</div><div class='del'>-	unsigned int __vcpu_vq;						\</div><div class='add'>+	unsigned int __vq;						\</div><div class='ctx'> 									\</div><div class='del'>-	if (WARN_ON(!sve_vl_valid((vcpu)-&gt;arch.sve_max_vl))) {		\</div><div class='add'>+	if (WARN_ON(!sve_vl_valid(sve_max_vl))) {			\</div><div class='ctx'> 		__size_ret = 0;						\</div><div class='ctx'> 	} else {							\</div><div class='del'>-		__vcpu_vq = vcpu_sve_max_vq(vcpu);			\</div><div class='del'>-		__size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq);		\</div><div class='add'>+		__vq = sve_vq_from_vl(sve_max_vl);			\</div><div class='add'>+		__size_ret = SVE_SIG_REGS_SIZE(__vq);			\</div><div class='ctx'> 	}								\</div><div class='ctx'> 									\</div><div class='ctx'> 	__size_ret;							\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+#define vcpu_sve_state_size(vcpu) sve_state_size_from_vl((vcpu)-&gt;arch.sve_max_vl)</div><div class='add'>+</div><div class='ctx'> #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \</div><div class='ctx'> 				 KVM_GUESTDBG_USE_SW_BP | \</div><div class='ctx'> 				 KVM_GUESTDBG_USE_HW | \</div><div class='hunk'>@@ -1550,12 +1607,16 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val);</div><div class='ctx'> 	 kvm_cmp_feat_signed(kvm, id, fld, op, limit) :			\</div><div class='ctx'> 	 kvm_cmp_feat_unsigned(kvm, id, fld, op, limit))</div><div class='ctx'> </div><div class='del'>-#define kvm_has_feat(kvm, id, fld, limit)				\</div><div class='add'>+#define __kvm_has_feat(kvm, id, fld, limit)				\</div><div class='ctx'> 	kvm_cmp_feat(kvm, id, fld, &gt;=, limit)</div><div class='ctx'> </div><div class='del'>-#define kvm_has_feat_enum(kvm, id, fld, val)				\</div><div class='add'>+#define kvm_has_feat(kvm, ...) __kvm_has_feat(kvm, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define __kvm_has_feat_enum(kvm, id, fld, val)				\</div><div class='ctx'> 	kvm_cmp_feat_unsigned(kvm, id, fld, ==, val)</div><div class='ctx'> </div><div class='add'>+#define kvm_has_feat_enum(kvm, ...) __kvm_has_feat_enum(kvm, __VA_ARGS__)</div><div class='add'>+</div><div class='ctx'> #define kvm_has_feat_range(kvm, id, fld, min, max)			\</div><div class='ctx'> 	(kvm_cmp_feat(kvm, id, fld, &gt;=, min) &amp;&amp;				\</div><div class='ctx'> 	kvm_cmp_feat(kvm, id, fld, &lt;=, max))</div><div class='hunk'>@@ -1588,4 +1649,14 @@ void kvm_set_vm_id_reg(struct kvm *kvm, u32 reg, u64 val);</div><div class='ctx'> #define kvm_has_s1poe(k)				\</div><div class='ctx'> 	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))</div><div class='ctx'> </div><div class='add'>+static inline bool kvm_arch_has_irq_bypass(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void compute_fgu(struct kvm *kvm, enum fgt_group_id fgt);</div><div class='add'>+void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *res1);</div><div class='add'>+void check_feature_map(void);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> #endif /* __ARM64_KVM_HOST_H__ */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_nested.h b/arch/arm64/include/asm/kvm_nested.h<br/>index 692f403c1896..0bd07ea068a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_nested.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_nested.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_nested.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/kvm_nested.h</a></div><div class='hunk'>@@ -231,6 +231,38 @@ static inline u64 kvm_encode_nested_level(struct kvm_s2_trans *trans)</div><div class='ctx'> 		shift;							\</div><div class='ctx'> 	})</div><div class='ctx'> </div><div class='add'>+static inline u64 decode_range_tlbi(u64 val, u64 *range, u16 *asid)</div><div class='add'>+{</div><div class='add'>+	u64 base, tg, num, scale;</div><div class='add'>+	int shift;</div><div class='add'>+</div><div class='add'>+	tg	= FIELD_GET(GENMASK(47, 46), val);</div><div class='add'>+</div><div class='add'>+	switch(tg) {</div><div class='add'>+	case 1:</div><div class='add'>+		shift = 12;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		shift = 14;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+	default:		/* IMPDEF: handle tg==0 as 64k */</div><div class='add'>+		shift = 16;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	base	= (val &amp; GENMASK(36, 0)) &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	if (asid)</div><div class='add'>+		*asid = FIELD_GET(TLBIR_ASID_MASK, val);</div><div class='add'>+</div><div class='add'>+	scale	= FIELD_GET(GENMASK(45, 44), val);</div><div class='add'>+	num	= FIELD_GET(GENMASK(43, 39), val);</div><div class='add'>+	*range	= __TLBI_RANGE_PAGES(num, scale) &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	return base;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline unsigned int ps_to_output_size(unsigned int ps)</div><div class='ctx'> {</div><div class='ctx'> 	switch (ps) {</div><div class='hunk'>@@ -245,4 +277,72 @@ static inline unsigned int ps_to_output_size(unsigned int ps)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum trans_regime {</div><div class='add'>+	TR_EL10,</div><div class='add'>+	TR_EL20,</div><div class='add'>+	TR_EL2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s1_walk_info {</div><div class='add'>+	u64	     		baddr;</div><div class='add'>+	enum trans_regime	regime;</div><div class='add'>+	unsigned int		max_oa_bits;</div><div class='add'>+	unsigned int		pgshift;</div><div class='add'>+	unsigned int		txsz;</div><div class='add'>+	int 	     		sl;</div><div class='add'>+	bool			as_el0;</div><div class='add'>+	bool	     		hpd;</div><div class='add'>+	bool			e0poe;</div><div class='add'>+	bool			poe;</div><div class='add'>+	bool			pan;</div><div class='add'>+	bool	     		be;</div><div class='add'>+	bool	     		s2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s1_walk_result {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u64	desc;</div><div class='add'>+			u64	pa;</div><div class='add'>+			s8	level;</div><div class='add'>+			u8	APTable;</div><div class='add'>+			bool	nG;</div><div class='add'>+			u16	asid;</div><div class='add'>+			bool	UXNTable;</div><div class='add'>+			bool	PXNTable;</div><div class='add'>+			bool	uwxn;</div><div class='add'>+			bool	uov;</div><div class='add'>+			bool	ur;</div><div class='add'>+			bool	uw;</div><div class='add'>+			bool	ux;</div><div class='add'>+			bool	pwxn;</div><div class='add'>+			bool	pov;</div><div class='add'>+			bool	pr;</div><div class='add'>+			bool	pw;</div><div class='add'>+			bool	px;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u8	fst;</div><div class='add'>+			bool	ptw;</div><div class='add'>+			bool	s2;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	bool	failed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __kvm_translate_va(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='add'>+		       struct s1_walk_result *wr, u64 va);</div><div class='add'>+</div><div class='add'>+/* VNCR management */</div><div class='add'>+int kvm_vcpu_allocate_vncr_tlb(struct kvm_vcpu *vcpu);</div><div class='add'>+int kvm_handle_vncr_abort(struct kvm_vcpu *vcpu);</div><div class='add'>+void kvm_handle_s1e2_tlbi(struct kvm_vcpu *vcpu, u32 inst, u64 val);</div><div class='add'>+</div><div class='add'>+#define vncr_fixmap(c)						\</div><div class='add'>+	({							\</div><div class='add'>+		u32 __c = (c);					\</div><div class='add'>+		BUG_ON(__c &gt;= NR_CPUS);				\</div><div class='add'>+		(FIX_VNCR - __c);				\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> #endif /* __ARM64_KVM_NESTED_H */</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h<br/>index 6b9d274052c7..2888b5d03757 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_pgtable.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/kvm_pgtable.h</a></div><div class='hunk'>@@ -59,6 +59,11 @@ typedef u64 kvm_pte_t;</div><div class='ctx'> </div><div class='ctx'> #define KVM_PHYS_INVALID		(-1ULL)</div><div class='ctx'> </div><div class='add'>+#define KVM_PTE_TYPE			BIT(1)</div><div class='add'>+#define KVM_PTE_TYPE_BLOCK		0</div><div class='add'>+#define KVM_PTE_TYPE_PAGE		1</div><div class='add'>+#define KVM_PTE_TYPE_TABLE		1</div><div class='add'>+</div><div class='ctx'> #define KVM_PTE_LEAF_ATTR_LO		GENMASK(11, 2)</div><div class='ctx'> </div><div class='ctx'> #define KVM_PTE_LEAF_ATTR_LO_S1_ATTRIDX	GENMASK(4, 2)</div><div class='hunk'>@@ -413,7 +418,7 @@ static inline bool kvm_pgtable_walk_lock_held(void)</div><div class='ctx'>  */</div><div class='ctx'> struct kvm_pgtable {</div><div class='ctx'> 	union {</div><div class='del'>-		struct rb_root					pkvm_mappings;</div><div class='add'>+		struct rb_root_cached				pkvm_mappings;</div><div class='ctx'> 		struct {</div><div class='ctx'> 			u32					ia_bits;</div><div class='ctx'> 			s8					start_level;</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_pkvm.h b/arch/arm64/include/asm/kvm_pkvm.h<br/>index abd693ce5b93..ea58282f59bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_pkvm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_pkvm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_pkvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/kvm_pkvm.h</a></div><div class='hunk'>@@ -135,6 +135,12 @@ static inline unsigned long host_s2_pgtable_pages(void)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_NVHE_EL2_DEBUG</div><div class='add'>+static inline unsigned long pkvm_selftest_pages(void) { return 32; }</div><div class='add'>+#else</div><div class='add'>+static inline unsigned long pkvm_selftest_pages(void) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define KVM_FFA_MBOX_NR_PAGES	1</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long hyp_ffa_proxy_pages(void)</div><div class='hunk'>@@ -167,6 +173,8 @@ struct pkvm_mapping {</div><div class='ctx'> 	struct rb_node node;</div><div class='ctx'> 	u64 gfn;</div><div class='ctx'> 	u64 pfn;</div><div class='add'>+	u64 nr_pages;</div><div class='add'>+	u64 __subtree_last;	/* Internal member for interval tree */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int pkvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu,</div><div class='head'>diff --git a/arch/arm64/include/asm/kvm_ras.h b/arch/arm64/include/asm/kvm_ras.h<br/>index 87e10d9a635b..9398ade632aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_ras.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/kvm_ras.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/kvm_ras.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/kvm_ras.h</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'>  * Was this synchronous external abort a RAS notification?</div><div class='ctx'>  * Returns '0' for errors handled by some RAS subsystem, or -ENOENT.</div><div class='ctx'>  */</div><div class='del'>-static inline int kvm_handle_guest_sea(phys_addr_t addr, u64 esr)</div><div class='add'>+static inline int kvm_handle_guest_sea(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* apei_claim_sea(NULL) expects to mask interrupts itself */</div><div class='ctx'> 	lockdep_assert_irqs_enabled();</div><div class='head'>diff --git a/arch/arm64/include/asm/mem_encrypt.h b/arch/arm64/include/asm/mem_encrypt.h<br/>index a2a1eeb36d4b..314b2b52025f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/mem_encrypt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/mem_encrypt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/mem_encrypt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/mem_encrypt.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/rsi.h&gt;</div><div class='ctx'> </div><div class='add'>+struct device;</div><div class='add'>+</div><div class='ctx'> struct arm64_mem_crypt_ops {</div><div class='ctx'> 	int (*encrypt)(unsigned long addr, int numpages);</div><div class='ctx'> 	int (*decrypt)(unsigned long addr, int numpages);</div><div class='head'>diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h<br/>index 30a29e88994b..6e8aa8e72601 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/mmu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/mmu.h</a></div><div class='hunk'>@@ -94,17 +94,6 @@ static inline bool kaslr_requires_kpti(void)</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Systems affected by Cavium erratum 24756 are incompatible</div><div class='del'>-	 * with KPTI.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_CAVIUM_ERRATUM_27456)) {</div><div class='del'>-		extern const struct midr_range cavium_erratum_27456_cpus[];</div><div class='del'>-</div><div class='del'>-		if (is_midr_in_range_list(cavium_erratum_27456_cpus))</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h<br/>index d3b538be1500..5285757ee0c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/pgtable.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/pgtable.h</a></div><div class='hunk'>@@ -40,6 +40,85 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/page_table_check.h&gt;</div><div class='ctx'> </div><div class='add'>+static inline void emit_pte_barriers(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * These barriers are emitted under certain conditions after a pte entry</div><div class='add'>+	 * was modified (see e.g. __set_pte_complete()). The dsb makes the store</div><div class='add'>+	 * visible to the table walker. The isb ensures that any previous</div><div class='add'>+	 * speculative "invalid translation" marker that is in the CPU's</div><div class='add'>+	 * pipeline gets cleared, so that any access to that address after</div><div class='add'>+	 * setting the pte to valid won't cause a spurious fault. If the thread</div><div class='add'>+	 * gets preempted after storing to the pgtable but before emitting these</div><div class='add'>+	 * barriers, __switch_to() emits a dsb which ensure the walker gets to</div><div class='add'>+	 * see the store. There is no guarantee of an isb being issued though.</div><div class='add'>+	 * This is safe because it will still get issued (albeit on a</div><div class='add'>+	 * potentially different CPU) when the thread starts running again,</div><div class='add'>+	 * before any access to the address.</div><div class='add'>+	 */</div><div class='add'>+	dsb(ishst);</div><div class='add'>+	isb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void queue_pte_barriers(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (in_interrupt()) {</div><div class='add'>+		emit_pte_barriers();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flags = read_thread_flags();</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BIT(TIF_LAZY_MMU)) {</div><div class='add'>+		/* Avoid the atomic op if already set. */</div><div class='add'>+		if (!(flags &amp; BIT(TIF_LAZY_MMU_PENDING)))</div><div class='add'>+			set_thread_flag(TIF_LAZY_MMU_PENDING);</div><div class='add'>+	} else {</div><div class='add'>+		emit_pte_barriers();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE</div><div class='add'>+static inline void arch_enter_lazy_mmu_mode(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * lazy_mmu_mode is not supposed to permit nesting. But in practice this</div><div class='add'>+	 * does happen with CONFIG_DEBUG_PAGEALLOC, where a page allocation</div><div class='add'>+	 * inside a lazy_mmu_mode section (such as zap_pte_range()) will change</div><div class='add'>+	 * permissions on the linear map with apply_to_page_range(), which</div><div class='add'>+	 * re-enters lazy_mmu_mode. So we tolerate nesting in our</div><div class='add'>+	 * implementation. The first call to arch_leave_lazy_mmu_mode() will</div><div class='add'>+	 * flush and clear the flag such that the remainder of the work in the</div><div class='add'>+	 * outer nest behaves as if outside of lazy mmu mode. This is safe and</div><div class='add'>+	 * keeps tracking simple.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (in_interrupt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	set_thread_flag(TIF_LAZY_MMU);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_flush_lazy_mmu_mode(void)</div><div class='add'>+{</div><div class='add'>+	if (in_interrupt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_thread_flag(TIF_LAZY_MMU_PENDING))</div><div class='add'>+		emit_pte_barriers();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void arch_leave_lazy_mmu_mode(void)</div><div class='add'>+{</div><div class='add'>+	if (in_interrupt())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	arch_flush_lazy_mmu_mode();</div><div class='add'>+	clear_thread_flag(TIF_LAZY_MMU);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_TRANSPARENT_HUGEPAGE</div><div class='ctx'> #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE</div><div class='ctx'> </div><div class='hunk'>@@ -320,18 +399,20 @@ static inline void __set_pte_nosync(pte_t *ptep, pte_t pte)</div><div class='ctx'> 	WRITE_ONCE(*ptep, pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_pte(pte_t *ptep, pte_t pte)</div><div class='add'>+static inline void __set_pte_complete(pte_t pte)</div><div class='ctx'> {</div><div class='del'>-	__set_pte_nosync(ptep, pte);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Only if the new pte is valid and kernel, otherwise TLB maintenance</div><div class='del'>-	 * or update_mmu_cache() have the necessary barriers.</div><div class='add'>+	 * has the necessary barriers.</div><div class='ctx'> 	 */</div><div class='del'>-	if (pte_valid_not_user(pte)) {</div><div class='del'>-		dsb(ishst);</div><div class='del'>-		isb();</div><div class='del'>-	}</div><div class='add'>+	if (pte_valid_not_user(pte))</div><div class='add'>+		queue_pte_barriers();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __set_pte(pte_t *ptep, pte_t pte)</div><div class='add'>+{</div><div class='add'>+	__set_pte_nosync(ptep, pte);</div><div class='add'>+	__set_pte_complete(pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline pte_t __ptep_get(pte_t *ptep)</div><div class='hunk'>@@ -423,23 +504,6 @@ static inline pte_t pte_advance_pfn(pte_t pte, unsigned long nr)</div><div class='ctx'> 	return pfn_pte(pte_pfn(pte) + nr, pte_pgprot(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_ptes(struct mm_struct *mm,</div><div class='del'>-			      unsigned long __always_unused addr,</div><div class='del'>-			      pte_t *ptep, pte_t pte, unsigned int nr)</div><div class='del'>-{</div><div class='del'>-	page_table_check_ptes_set(mm, ptep, pte, nr);</div><div class='del'>-	__sync_cache_and_tags(pte, nr);</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		__check_safe_pte_update(mm, ptep, pte);</div><div class='del'>-		__set_pte(ptep, pte);</div><div class='del'>-		if (--nr == 0)</div><div class='del'>-			break;</div><div class='del'>-		ptep++;</div><div class='del'>-		pte = pte_advance_pfn(pte, 1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Hugetlb definitions.</div><div class='ctx'>  */</div><div class='hunk'>@@ -649,30 +713,64 @@ static inline pgprot_t pud_pgprot(pud_t pud)</div><div class='ctx'> 	return __pgprot(pud_val(pfn_pud(pfn, __pgprot(0))) ^ pud_val(pud));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __set_pte_at(struct mm_struct *mm,</div><div class='del'>-				unsigned long __always_unused addr,</div><div class='del'>-				pte_t *ptep, pte_t pte, unsigned int nr)</div><div class='add'>+static inline void __set_ptes_anysz(struct mm_struct *mm, pte_t *ptep,</div><div class='add'>+				    pte_t pte, unsigned int nr,</div><div class='add'>+				    unsigned long pgsize)</div><div class='ctx'> {</div><div class='del'>-	__sync_cache_and_tags(pte, nr);</div><div class='del'>-	__check_safe_pte_update(mm, ptep, pte);</div><div class='del'>-	__set_pte(ptep, pte);</div><div class='add'>+	unsigned long stride = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='add'>+</div><div class='add'>+	switch (pgsize) {</div><div class='add'>+	case PAGE_SIZE:</div><div class='add'>+		page_table_check_ptes_set(mm, ptep, pte, nr);</div><div class='add'>+		break;</div><div class='add'>+	case PMD_SIZE:</div><div class='add'>+		page_table_check_pmds_set(mm, (pmd_t *)ptep, pte_pmd(pte), nr);</div><div class='add'>+		break;</div><div class='add'>+#ifndef __PAGETABLE_PMD_FOLDED</div><div class='add'>+	case PUD_SIZE:</div><div class='add'>+		page_table_check_puds_set(mm, (pud_t *)ptep, pte_pud(pte), nr);</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	default:</div><div class='add'>+		VM_WARN_ON(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__sync_cache_and_tags(pte, nr * stride);</div><div class='add'>+</div><div class='add'>+	for (;;) {</div><div class='add'>+		__check_safe_pte_update(mm, ptep, pte);</div><div class='add'>+		__set_pte_nosync(ptep, pte);</div><div class='add'>+		if (--nr == 0)</div><div class='add'>+			break;</div><div class='add'>+		ptep++;</div><div class='add'>+		pte = pte_advance_pfn(pte, stride);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__set_pte_complete(pte);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,</div><div class='del'>-			      pmd_t *pmdp, pmd_t pmd)</div><div class='add'>+static inline void __set_ptes(struct mm_struct *mm,</div><div class='add'>+			      unsigned long __always_unused addr,</div><div class='add'>+			      pte_t *ptep, pte_t pte, unsigned int nr)</div><div class='ctx'> {</div><div class='del'>-	page_table_check_pmd_set(mm, pmdp, pmd);</div><div class='del'>-	return __set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd),</div><div class='del'>-						PMD_SIZE &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, nr, PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,</div><div class='del'>-			      pud_t *pudp, pud_t pud)</div><div class='add'>+static inline void __set_pmds(struct mm_struct *mm,</div><div class='add'>+			      unsigned long __always_unused addr,</div><div class='add'>+			      pmd_t *pmdp, pmd_t pmd, unsigned int nr)</div><div class='add'>+{</div><div class='add'>+	__set_ptes_anysz(mm, (pte_t *)pmdp, pmd_pte(pmd), nr, PMD_SIZE);</div><div class='add'>+}</div><div class='add'>+#define set_pmd_at(mm, addr, pmdp, pmd) __set_pmds(mm, addr, pmdp, pmd, 1)</div><div class='add'>+</div><div class='add'>+static inline void __set_puds(struct mm_struct *mm,</div><div class='add'>+			      unsigned long __always_unused addr,</div><div class='add'>+			      pud_t *pudp, pud_t pud, unsigned int nr)</div><div class='ctx'> {</div><div class='del'>-	page_table_check_pud_set(mm, pudp, pud);</div><div class='del'>-	return __set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud),</div><div class='del'>-						PUD_SIZE &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	__set_ptes_anysz(mm, (pte_t *)pudp, pud_pte(pud), nr, PUD_SIZE);</div><div class='ctx'> }</div><div class='add'>+#define set_pud_at(mm, addr, pudp, pud) __set_puds(mm, addr, pudp, pud, 1)</div><div class='ctx'> </div><div class='ctx'> #define __p4d_to_phys(p4d)	__pte_to_phys(p4d_pte(p4d))</div><div class='ctx'> #define __phys_to_p4d_val(phys)	__phys_to_pte_val(phys)</div><div class='hunk'>@@ -739,8 +837,7 @@ static inline int pmd_trans_huge(pmd_t pmd)</div><div class='ctx'> 	 * If pmd is present-invalid, pmd_table() won't detect it</div><div class='ctx'> 	 * as a table, so force the valid bit for the comparison.</div><div class='ctx'> 	 */</div><div class='del'>-	return pmd_val(pmd) &amp;&amp; pmd_present(pmd) &amp;&amp;</div><div class='del'>-	       !pmd_table(__pmd(pmd_val(pmd) | PTE_VALID));</div><div class='add'>+	return pmd_present(pmd) &amp;&amp; !pmd_table(__pmd(pmd_val(pmd) | PTE_VALID));</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='ctx'> </div><div class='hunk'>@@ -754,8 +851,6 @@ static inline bool pud_table(pud_t pud) { return true; }</div><div class='ctx'> 				 PUD_TYPE_TABLE)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern pgd_t init_pg_dir[];</div><div class='del'>-extern pgd_t init_pg_end[];</div><div class='ctx'> extern pgd_t swapper_pg_dir[];</div><div class='ctx'> extern pgd_t idmap_pg_dir[];</div><div class='ctx'> extern pgd_t tramp_pg_dir[];</div><div class='hunk'>@@ -780,10 +875,8 @@ static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*pmdp, pmd);</div><div class='ctx'> </div><div class='del'>-	if (pmd_valid(pmd)) {</div><div class='del'>-		dsb(ishst);</div><div class='del'>-		isb();</div><div class='del'>-	}</div><div class='add'>+	if (pmd_valid(pmd))</div><div class='add'>+		queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pmd_clear(pmd_t *pmdp)</div><div class='hunk'>@@ -848,10 +941,8 @@ static inline void set_pud(pud_t *pudp, pud_t pud)</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*pudp, pud);</div><div class='ctx'> </div><div class='del'>-	if (pud_valid(pud)) {</div><div class='del'>-		dsb(ishst);</div><div class='del'>-		isb();</div><div class='del'>-	}</div><div class='add'>+	if (pud_valid(pud))</div><div class='add'>+		queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pud_clear(pud_t *pudp)</div><div class='hunk'>@@ -930,8 +1021,7 @@ static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*p4dp, p4d);</div><div class='del'>-	dsb(ishst);</div><div class='del'>-	isb();</div><div class='add'>+	queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void p4d_clear(p4d_t *p4dp)</div><div class='hunk'>@@ -1059,8 +1149,7 @@ static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*pgdp, pgd);</div><div class='del'>-	dsb(ishst);</div><div class='del'>-	isb();</div><div class='add'>+	queue_pte_barriers();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pgd_clear(pgd_t *pgdp)</div><div class='hunk'>@@ -1301,16 +1390,37 @@ static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */</div><div class='ctx'> </div><div class='del'>-static inline pte_t __ptep_get_and_clear(struct mm_struct *mm,</div><div class='del'>-				       unsigned long address, pte_t *ptep)</div><div class='add'>+static inline pte_t __ptep_get_and_clear_anysz(struct mm_struct *mm,</div><div class='add'>+					       pte_t *ptep,</div><div class='add'>+					       unsigned long pgsize)</div><div class='ctx'> {</div><div class='ctx'> 	pte_t pte = __pte(xchg_relaxed(&amp;pte_val(*ptep), 0));</div><div class='ctx'> </div><div class='del'>-	page_table_check_pte_clear(mm, pte);</div><div class='add'>+	switch (pgsize) {</div><div class='add'>+	case PAGE_SIZE:</div><div class='add'>+		page_table_check_pte_clear(mm, pte);</div><div class='add'>+		break;</div><div class='add'>+	case PMD_SIZE:</div><div class='add'>+		page_table_check_pmd_clear(mm, pte_pmd(pte));</div><div class='add'>+		break;</div><div class='add'>+#ifndef __PAGETABLE_PMD_FOLDED</div><div class='add'>+	case PUD_SIZE:</div><div class='add'>+		page_table_check_pud_clear(mm, pte_pud(pte));</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	default:</div><div class='add'>+		VM_WARN_ON(1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline pte_t __ptep_get_and_clear(struct mm_struct *mm,</div><div class='add'>+				       unsigned long address, pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	return __ptep_get_and_clear_anysz(mm, ptep, PAGE_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void __clear_full_ptes(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				pte_t *ptep, unsigned int nr, int full)</div><div class='ctx'> {</div><div class='hunk'>@@ -1347,11 +1457,7 @@ static inline pte_t __get_and_clear_full_ptes(struct mm_struct *mm,</div><div class='ctx'> static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,</div><div class='ctx'> 					    unsigned long address, pmd_t *pmdp)</div><div class='ctx'> {</div><div class='del'>-	pmd_t pmd = __pmd(xchg_relaxed(&amp;pmd_val(*pmdp), 0));</div><div class='del'>-</div><div class='del'>-	page_table_check_pmd_clear(mm, pmd);</div><div class='del'>-</div><div class='del'>-	return pmd;</div><div class='add'>+	return pte_pmd(__ptep_get_and_clear_anysz(mm, (pte_t *)pmdp, PMD_SIZE));</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/rqspinlock.h b/arch/arm64/include/asm/rqspinlock.h<br/>index 5b80785324b6..9ea0a74e5892 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/rqspinlock.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/rqspinlock.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/rqspinlock.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/rqspinlock.h</a></div><div class='hunk'>@@ -86,7 +86,7 @@</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define res_smp_cond_load_acquire_timewait(v, c) smp_cond_load_acquire_timewait(v, c, 0, 1)</div><div class='add'>+#define res_smp_cond_load_acquire(v, c) smp_cond_load_acquire_timewait(v, c, 0, 1)</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/rqspinlock.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/rsi_cmds.h b/arch/arm64/include/asm/rsi_cmds.h<br/>index e6a211001bd3..2c8763876dfb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/rsi_cmds.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/rsi_cmds.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/rsi_cmds.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/rsi_cmds.h</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'> #define __ASM_RSI_CMDS_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/arm-smccc.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;asm/memory.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/rsi_smc.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/sections.h b/arch/arm64/include/asm/sections.h<br/>index 40971ac1303f..51b0d594239e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/sections.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/sections.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/sections.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/sections.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@ extern char __alt_instructions[], __alt_instructions_end[];</div><div class='ctx'> extern char __hibernate_exit_text_start[], __hibernate_exit_text_end[];</div><div class='ctx'> extern char __hyp_idmap_text_start[], __hyp_idmap_text_end[];</div><div class='ctx'> extern char __hyp_text_start[], __hyp_text_end[];</div><div class='add'>+extern char __hyp_data_start[], __hyp_data_end[];</div><div class='ctx'> extern char __hyp_rodata_start[], __hyp_rodata_end[];</div><div class='ctx'> extern char __hyp_reloc_begin[], __hyp_reloc_end[];</div><div class='ctx'> extern char __hyp_bss_start[], __hyp_bss_end[];</div><div class='head'>diff --git a/arch/arm64/include/asm/spectre.h b/arch/arm64/include/asm/spectre.h<br/>index f1524cdeacf1..8fef12626090 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/spectre.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/spectre.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/spectre.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/spectre.h</a></div><div class='hunk'>@@ -97,6 +97,9 @@ enum mitigation_state arm64_get_meltdown_state(void);</div><div class='ctx'> </div><div class='ctx'> enum mitigation_state arm64_get_spectre_bhb_state(void);</div><div class='ctx'> bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry, int scope);</div><div class='add'>+extern bool __nospectre_bhb;</div><div class='add'>+u8 get_spectre_bhb_loop_value(void);</div><div class='add'>+bool is_spectre_bhb_fw_mitigated(void);</div><div class='ctx'> void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *__unused);</div><div class='ctx'> bool try_emulate_el1_ssbs(struct pt_regs *regs, u32 instr);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h<br/>index 2639d3633073..cd853801a8f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/sysreg.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/sysreg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/sysreg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/sysreg.h</a></div><div class='hunk'>@@ -117,6 +117,7 @@</div><div class='ctx'> </div><div class='ctx'> #define SB_BARRIER_INSN			__SYS_BARRIER_INSN(0, 7, 31)</div><div class='ctx'> </div><div class='add'>+/* Data cache zero operations */</div><div class='ctx'> #define SYS_DC_ISW			sys_insn(1, 0, 7, 6, 2)</div><div class='ctx'> #define SYS_DC_IGSW			sys_insn(1, 0, 7, 6, 4)</div><div class='ctx'> #define SYS_DC_IGDSW			sys_insn(1, 0, 7, 6, 6)</div><div class='hunk'>@@ -153,11 +154,13 @@</div><div class='ctx'> #define SYS_DC_CIGVAC			sys_insn(1, 3, 7, 14, 3)</div><div class='ctx'> #define SYS_DC_CIGDVAC			sys_insn(1, 3, 7, 14, 5)</div><div class='ctx'> </div><div class='del'>-/* Data cache zero operations */</div><div class='ctx'> #define SYS_DC_ZVA			sys_insn(1, 3, 7, 4, 1)</div><div class='ctx'> #define SYS_DC_GVA			sys_insn(1, 3, 7, 4, 3)</div><div class='ctx'> #define SYS_DC_GZVA			sys_insn(1, 3, 7, 4, 4)</div><div class='ctx'> </div><div class='add'>+#define SYS_DC_CIVAPS			sys_insn(1, 0, 7, 15, 1)</div><div class='add'>+#define SYS_DC_CIGDVAPS			sys_insn(1, 0, 7, 15, 5)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Automatically generated definitions for system registers, the</div><div class='ctx'>  * manual encodings below are in the process of being converted to</div><div class='hunk'>@@ -497,12 +500,22 @@</div><div class='ctx'> </div><div class='ctx'> #define __PMEV_op2(n)			((n) &amp; 0x7)</div><div class='ctx'> #define __CNTR_CRm(n)			(0x8 | (((n) &gt;&gt; 3) &amp; 0x3))</div><div class='add'>+#define SYS_PMEVCNTSVRn_EL1(n)		sys_reg(2, 0, 14, __CNTR_CRm(n), __PMEV_op2(n))</div><div class='ctx'> #define SYS_PMEVCNTRn_EL0(n)		sys_reg(3, 3, 14, __CNTR_CRm(n), __PMEV_op2(n))</div><div class='ctx'> #define __TYPER_CRm(n)			(0xc | (((n) &gt;&gt; 3) &amp; 0x3))</div><div class='ctx'> #define SYS_PMEVTYPERn_EL0(n)		sys_reg(3, 3, 14, __TYPER_CRm(n), __PMEV_op2(n))</div><div class='ctx'> </div><div class='ctx'> #define SYS_PMCCFILTR_EL0		sys_reg(3, 3, 14, 15, 7)</div><div class='ctx'> </div><div class='add'>+#define	SYS_SPMCGCRn_EL1(n)		sys_reg(2, 0, 9, 13, ((n) &amp; 1))</div><div class='add'>+</div><div class='add'>+#define __SPMEV_op2(n)			((n) &amp; 0x7)</div><div class='add'>+#define __SPMEV_crm(p, n)		((((p) &amp; 7) &lt;&lt; 1) | (((n) &gt;&gt; 3) &amp; 1))</div><div class='add'>+#define SYS_SPMEVCNTRn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b000, n), __SPMEV_op2(n))</div><div class='add'>+#define	SYS_SPMEVFILT2Rn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b011, n), __SPMEV_op2(n))</div><div class='add'>+#define	SYS_SPMEVFILTRn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b010, n), __SPMEV_op2(n))</div><div class='add'>+#define	SYS_SPMEVTYPERn_EL0(n)		sys_reg(2, 3, 14, __SPMEV_crm(0b001, n), __SPMEV_op2(n))</div><div class='add'>+</div><div class='ctx'> #define SYS_VPIDR_EL2			sys_reg(3, 4, 0, 0, 0)</div><div class='ctx'> #define SYS_VMPIDR_EL2			sys_reg(3, 4, 0, 0, 5)</div><div class='ctx'> </div><div class='hunk'>@@ -521,7 +534,6 @@</div><div class='ctx'> #define SYS_VTTBR_EL2			sys_reg(3, 4, 2, 1, 0)</div><div class='ctx'> #define SYS_VTCR_EL2			sys_reg(3, 4, 2, 1, 2)</div><div class='ctx'> </div><div class='del'>-#define SYS_VNCR_EL2			sys_reg(3, 4, 2, 2, 0)</div><div class='ctx'> #define SYS_HAFGRTR_EL2			sys_reg(3, 4, 3, 1, 6)</div><div class='ctx'> #define SYS_SPSR_EL2			sys_reg(3, 4, 4, 0, 0)</div><div class='ctx'> #define SYS_ELR_EL2			sys_reg(3, 4, 4, 0, 1)</div><div class='hunk'>@@ -608,28 +620,18 @@</div><div class='ctx'> </div><div class='ctx'> /* VHE encodings for architectural EL0/1 system registers */</div><div class='ctx'> #define SYS_BRBCR_EL12			sys_reg(2, 5, 9, 0, 0)</div><div class='del'>-#define SYS_SCTLR_EL12			sys_reg(3, 5, 1, 0, 0)</div><div class='del'>-#define SYS_CPACR_EL12			sys_reg(3, 5, 1, 0, 2)</div><div class='del'>-#define SYS_SCTLR2_EL12			sys_reg(3, 5, 1, 0, 3)</div><div class='del'>-#define SYS_ZCR_EL12			sys_reg(3, 5, 1, 2, 0)</div><div class='del'>-#define SYS_TRFCR_EL12			sys_reg(3, 5, 1, 2, 1)</div><div class='del'>-#define SYS_SMCR_EL12			sys_reg(3, 5, 1, 2, 6)</div><div class='ctx'> #define SYS_TTBR0_EL12			sys_reg(3, 5, 2, 0, 0)</div><div class='ctx'> #define SYS_TTBR1_EL12			sys_reg(3, 5, 2, 0, 1)</div><div class='del'>-#define SYS_TCR_EL12			sys_reg(3, 5, 2, 0, 2)</div><div class='del'>-#define SYS_TCR2_EL12			sys_reg(3, 5, 2, 0, 3)</div><div class='ctx'> #define SYS_SPSR_EL12			sys_reg(3, 5, 4, 0, 0)</div><div class='ctx'> #define SYS_ELR_EL12			sys_reg(3, 5, 4, 0, 1)</div><div class='ctx'> #define SYS_AFSR0_EL12			sys_reg(3, 5, 5, 1, 0)</div><div class='ctx'> #define SYS_AFSR1_EL12			sys_reg(3, 5, 5, 1, 1)</div><div class='ctx'> #define SYS_ESR_EL12			sys_reg(3, 5, 5, 2, 0)</div><div class='ctx'> #define SYS_TFSR_EL12			sys_reg(3, 5, 5, 6, 0)</div><div class='del'>-#define SYS_FAR_EL12			sys_reg(3, 5, 6, 0, 0)</div><div class='ctx'> #define SYS_PMSCR_EL12			sys_reg(3, 5, 9, 9, 0)</div><div class='ctx'> #define SYS_MAIR_EL12			sys_reg(3, 5, 10, 2, 0)</div><div class='ctx'> #define SYS_AMAIR_EL12			sys_reg(3, 5, 10, 3, 0)</div><div class='ctx'> #define SYS_VBAR_EL12			sys_reg(3, 5, 12, 0, 0)</div><div class='del'>-#define SYS_CONTEXTIDR_EL12		sys_reg(3, 5, 13, 0, 1)</div><div class='ctx'> #define SYS_SCXTNUM_EL12		sys_reg(3, 5, 13, 0, 7)</div><div class='ctx'> #define SYS_CNTKCTL_EL12		sys_reg(3, 5, 14, 1, 0)</div><div class='ctx'> #define SYS_CNTP_TVAL_EL02		sys_reg(3, 5, 14, 2, 0)</div><div class='hunk'>@@ -1091,6 +1093,15 @@</div><div class='ctx'> 	__emit_inst(0xd5000000|(\sreg)|(.L__gpr_num_\rt))</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='add'>+	.macro	msr_hcr_el2, reg</div><div class='add'>+#if IS_ENABLED(CONFIG_AMPERE_ERRATUM_AC04_CPU_23)</div><div class='add'>+	dsb	nsh</div><div class='add'>+	msr	hcr_el2, \reg</div><div class='add'>+	isb</div><div class='add'>+#else</div><div class='add'>+	msr	hcr_el2, \reg</div><div class='add'>+#endif</div><div class='add'>+	.endm</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='hunk'>@@ -1178,6 +1189,13 @@</div><div class='ctx'> 		write_sysreg(__scs_new, sysreg);			\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+#define sysreg_clear_set_hcr(clear, set) do {				\</div><div class='add'>+	u64 __scs_val = read_sysreg(hcr_el2);				\</div><div class='add'>+	u64 __scs_new = (__scs_val &amp; ~(u64)(clear)) | (set);		\</div><div class='add'>+	if (__scs_new != __scs_val)					\</div><div class='add'>+		write_sysreg_hcr(__scs_new);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> #define sysreg_clear_set_s(sysreg, clear, set) do {			\</div><div class='ctx'> 	u64 __scs_val = read_sysreg_s(sysreg);				\</div><div class='ctx'> 	u64 __scs_new = (__scs_val &amp; ~(u64)(clear)) | (set);		\</div><div class='hunk'>@@ -1185,6 +1203,17 @@</div><div class='ctx'> 		write_sysreg_s(__scs_new, sysreg);			\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+#define write_sysreg_hcr(__val) do {					\</div><div class='add'>+	if (IS_ENABLED(CONFIG_AMPERE_ERRATUM_AC04_CPU_23) &amp;&amp;		\</div><div class='add'>+	   (!system_capabilities_finalized() ||				\</div><div class='add'>+	    alternative_has_cap_unlikely(ARM64_WORKAROUND_AMPERE_AC04_CPU_23))) \</div><div class='add'>+		asm volatile("dsb nsh; msr hcr_el2, %x0; isb"		\</div><div class='add'>+			     : : "rZ" (__val));				\</div><div class='add'>+	else								\</div><div class='add'>+		asm volatile("msr hcr_el2, %x0"				\</div><div class='add'>+			     : : "rZ" (__val));				\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='ctx'> #define read_sysreg_par() ({						\</div><div class='ctx'> 	u64 par;							\</div><div class='ctx'> 	asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412));	\</div><div class='head'>diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h<br/>index 1114c1c3300a..1269c2487574 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/thread_info.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/thread_info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/thread_info.h</a></div><div class='hunk'>@@ -59,11 +59,12 @@ void arch_setup_new_exec(void);</div><div class='ctx'> </div><div class='ctx'> #define TIF_SIGPENDING		0	/* signal pending */</div><div class='ctx'> #define TIF_NEED_RESCHED	1	/* rescheduling necessary */</div><div class='del'>-#define TIF_NOTIFY_RESUME	2	/* callback before returning to user */</div><div class='del'>-#define TIF_FOREIGN_FPSTATE	3	/* CPU's FP state is not current's */</div><div class='del'>-#define TIF_UPROBE		4	/* uprobe breakpoint or singlestep */</div><div class='del'>-#define TIF_MTE_ASYNC_FAULT	5	/* MTE Asynchronous Tag Check Fault */</div><div class='del'>-#define TIF_NOTIFY_SIGNAL	6	/* signal notifications exist */</div><div class='add'>+#define TIF_NEED_RESCHED_LAZY	2	/* Lazy rescheduling needed */</div><div class='add'>+#define TIF_NOTIFY_RESUME	3	/* callback before returning to user */</div><div class='add'>+#define TIF_FOREIGN_FPSTATE	4	/* CPU's FP state is not current's */</div><div class='add'>+#define TIF_UPROBE		5	/* uprobe breakpoint or singlestep */</div><div class='add'>+#define TIF_MTE_ASYNC_FAULT	6	/* MTE Asynchronous Tag Check Fault */</div><div class='add'>+#define TIF_NOTIFY_SIGNAL	7	/* signal notifications exist */</div><div class='ctx'> #define TIF_SYSCALL_TRACE	8	/* syscall trace active */</div><div class='ctx'> #define TIF_SYSCALL_AUDIT	9	/* syscall auditing */</div><div class='ctx'> #define TIF_SYSCALL_TRACEPOINT	10	/* syscall tracepoint for ftrace */</div><div class='hunk'>@@ -82,9 +83,12 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define TIF_SME_VL_INHERIT	28	/* Inherit SME vl_onexec across exec */</div><div class='ctx'> #define TIF_KERNEL_FPSTATE	29	/* Task is in a kernel mode FPSIMD section */</div><div class='ctx'> #define TIF_TSC_SIGSEGV		30	/* SIGSEGV on counter-timer access */</div><div class='add'>+#define TIF_LAZY_MMU		31	/* Task in lazy mmu mode */</div><div class='add'>+#define TIF_LAZY_MMU_PENDING	32	/* Ops pending for lazy mmu mode exit */</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SIGPENDING		(1 &lt;&lt; TIF_SIGPENDING)</div><div class='ctx'> #define _TIF_NEED_RESCHED	(1 &lt;&lt; TIF_NEED_RESCHED)</div><div class='add'>+#define _TIF_NEED_RESCHED_LAZY	(1 &lt;&lt; TIF_NEED_RESCHED_LAZY)</div><div class='ctx'> #define _TIF_NOTIFY_RESUME	(1 &lt;&lt; TIF_NOTIFY_RESUME)</div><div class='ctx'> #define _TIF_FOREIGN_FPSTATE	(1 &lt;&lt; TIF_FOREIGN_FPSTATE)</div><div class='ctx'> #define _TIF_SYSCALL_TRACE	(1 &lt;&lt; TIF_SYSCALL_TRACE)</div><div class='hunk'>@@ -100,10 +104,10 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define _TIF_NOTIFY_SIGNAL	(1 &lt;&lt; TIF_NOTIFY_SIGNAL)</div><div class='ctx'> #define _TIF_TSC_SIGSEGV	(1 &lt;&lt; TIF_TSC_SIGSEGV)</div><div class='ctx'> </div><div class='del'>-#define _TIF_WORK_MASK		(_TIF_NEED_RESCHED | _TIF_SIGPENDING | \</div><div class='add'>+#define _TIF_WORK_MASK		(_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY | \</div><div class='ctx'> 				 _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \</div><div class='ctx'> 				 _TIF_UPROBE | _TIF_MTE_ASYNC_FAULT | \</div><div class='del'>-				 _TIF_NOTIFY_SIGNAL)</div><div class='add'>+				 _TIF_NOTIFY_SIGNAL | _TIF_SIGPENDING)</div><div class='ctx'> </div><div class='ctx'> #define _TIF_SYSCALL_WORK	(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \</div><div class='ctx'> 				 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP | \</div><div class='head'>diff --git a/arch/arm64/include/asm/vdso/gettimeofday.h b/arch/arm64/include/asm/vdso/gettimeofday.h<br/>index 92a2b59a9f3d..da1ab8759592 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/vdso/gettimeofday.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/vdso/gettimeofday.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/vdso/gettimeofday.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/vdso/gettimeofday.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='add'>+#include &lt;asm/arch_timer.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/sysreg.h&gt;</div><div class='hunk'>@@ -69,8 +70,6 @@ int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)</div><div class='ctx'> static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='ctx'> 						 const struct vdso_time_data *vd)</div><div class='ctx'> {</div><div class='del'>-	u64 res;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Core checks for mode already, so this raced against a concurrent</div><div class='ctx'> 	 * update. Return something. Core will do another round and then</div><div class='hunk'>@@ -79,25 +78,21 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,</div><div class='ctx'> 	if (clock_mode == VDSO_CLOCKMODE_NONE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If FEAT_ECV is available, use the self-synchronizing counter.</div><div class='del'>-	 * Otherwise the isb is required to prevent that the counter value</div><div class='del'>-	 * is speculated.</div><div class='del'>-	*/</div><div class='del'>-	asm volatile(</div><div class='del'>-	ALTERNATIVE("isb\n"</div><div class='del'>-		    "mrs %0, cntvct_el0",</div><div class='del'>-		    "nop\n"</div><div class='del'>-		    __mrs_s("%0", SYS_CNTVCTSS_EL0),</div><div class='del'>-		    ARM64_HAS_ECV)</div><div class='del'>-	: "=r" (res)</div><div class='del'>-	:</div><div class='del'>-	: "memory");</div><div class='add'>+	return __arch_counter_get_cntvct();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_CC_IS_GCC) &amp;&amp; IS_ENABLED(CONFIG_PAGE_SIZE_64KB)</div><div class='add'>+static __always_inline const struct vdso_time_data *__arch_get_vdso_u_time_data(void)</div><div class='add'>+{</div><div class='add'>+	const struct vdso_time_data *ret = &amp;vdso_u_time_data;</div><div class='ctx'> </div><div class='del'>-	arch_counter_enforce_ordering(res);</div><div class='add'>+	/* Work around invalid absolute relocations */</div><div class='add'>+	OPTIMIZER_HIDE_VAR(ret);</div><div class='ctx'> </div><div class='del'>-	return res;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+#define __arch_get_vdso_u_time_data __arch_get_vdso_u_time_data</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_CC_IS_GCC) &amp;&amp; IS_ENABLED(CONFIG_PAGE_SIZE_64KB) */</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h<br/>index ebf4a9f943ed..aa280f356b96 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/virt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/virt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/virt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/virt.h</a></div><div class='hunk'>@@ -67,7 +67,8 @@</div><div class='ctx'>  * __boot_cpu_mode records what mode CPUs were booted in.</div><div class='ctx'>  * A correctly-implemented bootloader must start all CPUs in the same mode:</div><div class='ctx'>  * In this case, both 32bit halves of __boot_cpu_mode will contain the</div><div class='del'>- * same value (either 0 if booted in EL1, BOOT_CPU_MODE_EL2 if booted in EL2).</div><div class='add'>+ * same value (either BOOT_CPU_MODE_EL1 if booted in EL1, BOOT_CPU_MODE_EL2 if</div><div class='add'>+ * booted in EL2).</div><div class='ctx'>  *</div><div class='ctx'>  * Should the bootloader fail to do this, the two values will be different.</div><div class='ctx'>  * This allows the kernel to flag an error when the secondaries have come up.</div><div class='head'>diff --git a/arch/arm64/include/asm/vmalloc.h b/arch/arm64/include/asm/vmalloc.h<br/>index 38fafffe699f..12f534e8f3ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/vmalloc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/vmalloc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/vmalloc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/vmalloc.h</a></div><div class='hunk'>@@ -23,6 +23,51 @@ static inline bool arch_vmap_pmd_supported(pgprot_t prot)</div><div class='ctx'> 	return !IS_ENABLED(CONFIG_PTDUMP_DEBUGFS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define arch_vmap_pte_range_map_size arch_vmap_pte_range_map_size</div><div class='add'>+static inline unsigned long arch_vmap_pte_range_map_size(unsigned long addr,</div><div class='add'>+						unsigned long end, u64 pfn,</div><div class='add'>+						unsigned int max_page_shift)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * If the block is at least CONT_PTE_SIZE in size, and is naturally</div><div class='add'>+	 * aligned in both virtual and physical space, then we can pte-map the</div><div class='add'>+	 * block using the PTE_CONT bit for more efficient use of the TLB.</div><div class='add'>+	 */</div><div class='add'>+	if (max_page_shift &lt; CONT_PTE_SHIFT)</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (end - addr &lt; CONT_PTE_SIZE)</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (!IS_ALIGNED(addr, CONT_PTE_SIZE))</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	if (!IS_ALIGNED(PFN_PHYS(pfn), CONT_PTE_SIZE))</div><div class='add'>+		return PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	return CONT_PTE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_vmap_pte_range_unmap_size arch_vmap_pte_range_unmap_size</div><div class='add'>+static inline unsigned long arch_vmap_pte_range_unmap_size(unsigned long addr,</div><div class='add'>+							   pte_t *ptep)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * The caller handles alignment so it's sufficient just to check</div><div class='add'>+	 * PTE_CONT.</div><div class='add'>+	 */</div><div class='add'>+	return pte_valid_cont(__ptep_get(ptep)) ? CONT_PTE_SIZE : PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define arch_vmap_pte_supported_shift arch_vmap_pte_supported_shift</div><div class='add'>+static inline int arch_vmap_pte_supported_shift(unsigned long size)</div><div class='add'>+{</div><div class='add'>+	if (size &gt;= CONT_PTE_SIZE)</div><div class='add'>+		return CONT_PTE_SHIFT;</div><div class='add'>+</div><div class='add'>+	return PAGE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define arch_vmap_pgprot_tagged arch_vmap_pgprot_tagged</div><div class='head'>diff --git a/arch/arm64/include/asm/vncr_mapping.h b/arch/arm64/include/asm/vncr_mapping.h<br/>index 4f9bbd4d6c26..6f556e993644 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/vncr_mapping.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/asm/vncr_mapping.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/asm/vncr_mapping.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/asm/vncr_mapping.h</a></div><div class='hunk'>@@ -35,6 +35,8 @@</div><div class='ctx'> #define VNCR_CNTP_CTL_EL0       0x180</div><div class='ctx'> #define VNCR_SCXTNUM_EL1        0x188</div><div class='ctx'> #define VNCR_TFSR_EL1		0x190</div><div class='add'>+#define VNCR_HDFGRTR2_EL2	0x1A0</div><div class='add'>+#define VNCR_HDFGWTR2_EL2	0x1B0</div><div class='ctx'> #define VNCR_HFGRTR_EL2		0x1B8</div><div class='ctx'> #define VNCR_HFGWTR_EL2		0x1C0</div><div class='ctx'> #define VNCR_HFGITR_EL2		0x1C8</div><div class='hunk'>@@ -52,6 +54,9 @@</div><div class='ctx'> #define VNCR_PIRE0_EL1		0x290</div><div class='ctx'> #define VNCR_PIR_EL1		0x2A0</div><div class='ctx'> #define VNCR_POR_EL1		0x2A8</div><div class='add'>+#define VNCR_HFGRTR2_EL2	0x2C0</div><div class='add'>+#define VNCR_HFGWTR2_EL2	0x2C8</div><div class='add'>+#define VNCR_HFGITR2_EL2	0x310</div><div class='ctx'> #define VNCR_ICH_LR0_EL2        0x400</div><div class='ctx'> #define VNCR_ICH_LR1_EL2        0x408</div><div class='ctx'> #define VNCR_ICH_LR2_EL2        0x410</div><div class='head'>diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h<br/>index af9d9acaf997..ed5f3892674c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/include/uapi/asm/kvm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/include/uapi/asm/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -431,10 +431,11 @@ enum {</div><div class='ctx'> </div><div class='ctx'> /* Device Control API on vcpu fd */</div><div class='ctx'> #define KVM_ARM_VCPU_PMU_V3_CTRL	0</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_IRQ	0</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_INIT	1</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_FILTER	2</div><div class='del'>-#define   KVM_ARM_VCPU_PMU_V3_SET_PMU	3</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_IRQ		0</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_INIT		1</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_FILTER		2</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_SET_PMU		3</div><div class='add'>+#define   KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS	4</div><div class='ctx'> #define KVM_ARM_VCPU_TIMER_CTRL		1</div><div class='ctx'> #define   KVM_ARM_VCPU_TIMER_IRQ_VTIMER		0</div><div class='ctx'> #define   KVM_ARM_VCPU_TIMER_IRQ_PTIMER		1</div><div class='head'>diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c<br/>index eb1a840e4110..30d4bbe68661 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/asm-offsets.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/asm-offsets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -182,5 +182,7 @@ int main(void)</div><div class='ctx'> #ifdef CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS</div><div class='ctx'>   DEFINE(FTRACE_OPS_DIRECT_CALL,	offsetof(struct ftrace_ops, direct_call));</div><div class='ctx'> #endif</div><div class='add'>+  DEFINE(PIE_E0_ASM, PIE_E0);</div><div class='add'>+  DEFINE(PIE_E1_ASM, PIE_E1);</div><div class='ctx'>   return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c<br/>index b55f5f705750..59d723c9ab8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/cpu_errata.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/cpu_errata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/cpu_errata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/cpu_errata.c</a></div><div class='hunk'>@@ -335,7 +335,7 @@ static const struct midr_range cavium_erratum_23154_cpus[] = {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CAVIUM_ERRATUM_27456</div><div class='del'>-const struct midr_range cavium_erratum_27456_cpus[] = {</div><div class='add'>+static const struct midr_range cavium_erratum_27456_cpus[] = {</div><div class='ctx'> 	/* Cavium ThunderX, T88 pass 1.x - 2.1 */</div><div class='ctx'> 	MIDR_RANGE(MIDR_THUNDERX, 0, 0, 1, 1),</div><div class='ctx'> 	/* Cavium ThunderX, T81 pass 1.0 */</div><div class='hunk'>@@ -557,6 +557,13 @@ static const struct midr_range erratum_ac03_cpu_38_list[] = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_AMPERE_ERRATUM_AC04_CPU_23</div><div class='add'>+static const struct midr_range erratum_ac04_cpu_23_list[] = {</div><div class='add'>+	MIDR_ALL_VERSIONS(MIDR_AMPERE1A),</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> const struct arm64_cpu_capabilities arm64_errata[] = {</div><div class='ctx'> #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE</div><div class='ctx'> 	{</div><div class='hunk'>@@ -876,6 +883,13 @@ const struct arm64_cpu_capabilities arm64_errata[] = {</div><div class='ctx'> 		ERRATA_MIDR_RANGE_LIST(erratum_ac03_cpu_38_list),</div><div class='ctx'> 	},</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_AMPERE_ERRATUM_AC04_CPU_23</div><div class='add'>+	{</div><div class='add'>+		.desc = "AmpereOne erratum AC04_CPU_23",</div><div class='add'>+		.capability = ARM64_WORKAROUND_AMPERE_AC04_CPU_23,</div><div class='add'>+		ERRATA_MIDR_RANGE_LIST(erratum_ac04_cpu_23_list),</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='ctx'> 	{</div><div class='ctx'> 		.desc = "Broken CNTVOFF_EL2",</div><div class='ctx'> 		.capability = ARM64_WORKAROUND_QCOM_ORYON_CNTVOFF,</div><div class='head'>diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c<br/>index 9c4d6d552b25..45ea79cacf46 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/cpufeature.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/cpufeature.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/cpufeature.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/cpufeature.c</a></div><div class='hunk'>@@ -114,7 +114,14 @@ static struct arm64_cpu_capabilities const __ro_after_init *cpucap_ptrs[ARM64_NC</div><div class='ctx'> </div><div class='ctx'> DECLARE_BITMAP(boot_cpucaps, ARM64_NCAPS);</div><div class='ctx'> </div><div class='del'>-bool arm64_use_ng_mappings = false;</div><div class='add'>+/*</div><div class='add'>+ * arm64_use_ng_mappings must be placed in the .data section, otherwise it</div><div class='add'>+ * ends up in the .bss section where it is initialized in early_map_kernel()</div><div class='add'>+ * after the MMU (with the idmap) was enabled. create_init_idmap() - which</div><div class='add'>+ * runs before early_map_kernel() and reads the variable via PTE_MAYBE_NG -</div><div class='add'>+ * may end up generating an incorrect idmap page table attributes.</div><div class='add'>+ */</div><div class='add'>+bool arm64_use_ng_mappings __read_mostly = false;</div><div class='ctx'> EXPORT_SYMBOL(arm64_use_ng_mappings);</div><div class='ctx'> </div><div class='ctx'> DEFINE_PER_CPU_READ_MOSTLY(const char *, this_cpu_vector) = vectors;</div><div class='hunk'>@@ -298,6 +305,7 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {</div><div class='ctx'> static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = {</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_GCS),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_GCS_SHIFT, 4, 0),</div><div class='add'>+	S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_MTE_frac_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),</div><div class='ctx'> 		       FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_SME_SHIFT, 4, 0),</div><div class='ctx'> 	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64PFR1_EL1_MPAM_frac_SHIFT, 4, 0),</div><div class='hunk'>@@ -758,17 +766,17 @@ static const struct arm64_ftr_bits ftr_raz[] = {</div><div class='ctx'> #define ARM64_FTR_REG(id, table)		\</div><div class='ctx'> 	__ARM64_FTR_REG_OVERRIDE(#id, id, table, &amp;no_override)</div><div class='ctx'> </div><div class='del'>-struct arm64_ftr_override id_aa64mmfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64mmfr1_override;</div><div class='del'>-struct arm64_ftr_override id_aa64mmfr2_override;</div><div class='del'>-struct arm64_ftr_override id_aa64pfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64pfr1_override;</div><div class='del'>-struct arm64_ftr_override id_aa64zfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64smfr0_override;</div><div class='del'>-struct arm64_ftr_override id_aa64isar1_override;</div><div class='del'>-struct arm64_ftr_override id_aa64isar2_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64mmfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64mmfr1_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64mmfr2_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64pfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64pfr1_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64zfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64smfr0_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64isar1_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly id_aa64isar2_override;</div><div class='ctx'> </div><div class='del'>-struct arm64_ftr_override arm64_sw_feature_override;</div><div class='add'>+struct arm64_ftr_override __read_mostly arm64_sw_feature_override;</div><div class='ctx'> </div><div class='ctx'> static const struct __ftr_reg_entry {</div><div class='ctx'> 	u32			sys_id;</div><div class='hunk'>@@ -1403,6 +1411,8 @@ void update_cpu_features(int cpu,</div><div class='ctx'> 				      info-&gt;reg_id_aa64mmfr2, boot-&gt;reg_id_aa64mmfr2);</div><div class='ctx'> 	taint |= check_update_ftr_reg(SYS_ID_AA64MMFR3_EL1, cpu,</div><div class='ctx'> 				      info-&gt;reg_id_aa64mmfr3, boot-&gt;reg_id_aa64mmfr3);</div><div class='add'>+	taint |= check_update_ftr_reg(SYS_ID_AA64MMFR4_EL1, cpu,</div><div class='add'>+				      info-&gt;reg_id_aa64mmfr4, boot-&gt;reg_id_aa64mmfr4);</div><div class='ctx'> </div><div class='ctx'> 	taint |= check_update_ftr_reg(SYS_ID_AA64PFR0_EL1, cpu,</div><div class='ctx'> 				      info-&gt;reg_id_aa64pfr0, boot-&gt;reg_id_aa64pfr0);</div><div class='hunk'>@@ -2876,6 +2886,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = {</div><div class='ctx'> 		.matches = has_cpuid_feature,</div><div class='ctx'> 		ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, IMP)</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.desc = "Fine Grained Traps 2",</div><div class='add'>+		.type = ARM64_CPUCAP_SYSTEM_FEATURE,</div><div class='add'>+		.capability = ARM64_HAS_FGT2,</div><div class='add'>+		.matches = has_cpuid_feature,</div><div class='add'>+		ARM64_CPUID_FIELDS(ID_AA64MMFR0_EL1, FGT, FGT2)</div><div class='add'>+	},</div><div class='ctx'> #ifdef CONFIG_ARM64_SME</div><div class='ctx'> 	{</div><div class='ctx'> 		.desc = "Scalable Matrix Extension",</div><div class='head'>diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c<br/>index 285d7d538342..94525abd1c22 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/cpuinfo.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/cpuinfo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/cpuinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/cpuinfo.c</a></div><div class='hunk'>@@ -209,80 +209,79 @@ static const char *const compat_hwcap2_str[] = {</div><div class='ctx'> </div><div class='ctx'> static int c_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='add'>+	int j;</div><div class='add'>+	int cpu = m-&gt;index;</div><div class='ctx'> 	bool compat = personality(current-&gt;personality) == PER_LINUX32;</div><div class='add'>+	struct cpuinfo_arm64 *cpuinfo = v;</div><div class='add'>+	u32 midr = cpuinfo-&gt;reg_midr;</div><div class='ctx'> </div><div class='del'>-	for_each_online_cpu(i) {</div><div class='del'>-		struct cpuinfo_arm64 *cpuinfo = &amp;per_cpu(cpu_data, i);</div><div class='del'>-		u32 midr = cpuinfo-&gt;reg_midr;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * glibc reads /proc/cpuinfo to determine the number of</div><div class='del'>-		 * online processors, looking for lines beginning with</div><div class='del'>-		 * "processor".  Give glibc what it expects.</div><div class='del'>-		 */</div><div class='del'>-		seq_printf(m, "processor\t: %d\n", i);</div><div class='del'>-		if (compat)</div><div class='del'>-			seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",</div><div class='del'>-				   MIDR_REVISION(midr), COMPAT_ELF_PLATFORM);</div><div class='add'>+	/*</div><div class='add'>+	 * glibc reads /proc/cpuinfo to determine the number of</div><div class='add'>+	 * online processors, looking for lines beginning with</div><div class='add'>+	 * "processor".  Give glibc what it expects.</div><div class='add'>+	 */</div><div class='add'>+	seq_printf(m, "processor\t: %d\n", cpu);</div><div class='add'>+	if (compat)</div><div class='add'>+		seq_printf(m, "model name\t: ARMv8 Processor rev %d (%s)\n",</div><div class='add'>+			   MIDR_REVISION(midr), COMPAT_ELF_PLATFORM);</div><div class='ctx'> </div><div class='del'>-		seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",</div><div class='del'>-			   loops_per_jiffy / (500000UL/HZ),</div><div class='del'>-			   loops_per_jiffy / (5000UL/HZ) % 100);</div><div class='add'>+	seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",</div><div class='add'>+		   loops_per_jiffy / (500000UL/HZ),</div><div class='add'>+		   loops_per_jiffy / (5000UL/HZ) % 100);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Dump out the common processor features in a single line.</div><div class='del'>-		 * Userspace should read the hwcaps with getauxval(AT_HWCAP)</div><div class='del'>-		 * rather than attempting to parse this, but there's a body of</div><div class='del'>-		 * software which does already (at least for 32-bit).</div><div class='del'>-		 */</div><div class='del'>-		seq_puts(m, "Features\t:");</div><div class='del'>-		if (compat) {</div><div class='add'>+	/*</div><div class='add'>+	 * Dump out the common processor features in a single line.</div><div class='add'>+	 * Userspace should read the hwcaps with getauxval(AT_HWCAP)</div><div class='add'>+	 * rather than attempting to parse this, but there's a body of</div><div class='add'>+	 * software which does already (at least for 32-bit).</div><div class='add'>+	 */</div><div class='add'>+	seq_puts(m, "Features\t:");</div><div class='add'>+	if (compat) {</div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='del'>-			for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap_str); j++) {</div><div class='del'>-				if (compat_elf_hwcap &amp; (1 &lt;&lt; j)) {</div><div class='del'>-					/*</div><div class='del'>-					 * Warn once if any feature should not</div><div class='del'>-					 * have been present on arm64 platform.</div><div class='del'>-					 */</div><div class='del'>-					if (WARN_ON_ONCE(!compat_hwcap_str[j]))</div><div class='del'>-						continue;</div><div class='del'>-</div><div class='del'>-					seq_printf(m, " %s", compat_hwcap_str[j]);</div><div class='del'>-				}</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap_str); j++) {</div><div class='add'>+			if (compat_elf_hwcap &amp; (1 &lt;&lt; j)) {</div><div class='add'>+				/*</div><div class='add'>+				 * Warn once if any feature should not</div><div class='add'>+				 * have been present on arm64 platform.</div><div class='add'>+				 */</div><div class='add'>+				if (WARN_ON_ONCE(!compat_hwcap_str[j]))</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				seq_printf(m, " %s", compat_hwcap_str[j]);</div><div class='ctx'> 			}</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap2_str); j++)</div><div class='del'>-				if (compat_elf_hwcap2 &amp; (1 &lt;&lt; j))</div><div class='del'>-					seq_printf(m, " %s", compat_hwcap2_str[j]);</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(compat_hwcap2_str); j++)</div><div class='add'>+			if (compat_elf_hwcap2 &amp; (1 &lt;&lt; j))</div><div class='add'>+				seq_printf(m, " %s", compat_hwcap2_str[j]);</div><div class='ctx'> #endif /* CONFIG_COMPAT */</div><div class='del'>-		} else {</div><div class='del'>-			for (j = 0; j &lt; ARRAY_SIZE(hwcap_str); j++)</div><div class='del'>-				if (cpu_have_feature(j))</div><div class='del'>-					seq_printf(m, " %s", hwcap_str[j]);</div><div class='del'>-		}</div><div class='del'>-		seq_puts(m, "\n");</div><div class='del'>-</div><div class='del'>-		seq_printf(m, "CPU implementer\t: 0x%02x\n",</div><div class='del'>-			   MIDR_IMPLEMENTOR(midr));</div><div class='del'>-		seq_printf(m, "CPU architecture: 8\n");</div><div class='del'>-		seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr));</div><div class='del'>-		seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr));</div><div class='del'>-		seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr));</div><div class='add'>+	} else {</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(hwcap_str); j++)</div><div class='add'>+			if (cpu_have_feature(j))</div><div class='add'>+				seq_printf(m, " %s", hwcap_str[j]);</div><div class='ctx'> 	}</div><div class='add'>+	seq_puts(m, "\n");</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "CPU implementer\t: 0x%02x\n",</div><div class='add'>+		   MIDR_IMPLEMENTOR(midr));</div><div class='add'>+	seq_puts(m, "CPU architecture: 8\n");</div><div class='add'>+	seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr));</div><div class='add'>+	seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr));</div><div class='add'>+	seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *c_start(struct seq_file *m, loff_t *pos)</div><div class='ctx'> {</div><div class='del'>-	return *pos &lt; 1 ? (void *)1 : NULL;</div><div class='add'>+	*pos = cpumask_next(*pos - 1, cpu_online_mask);</div><div class='add'>+	return *pos &lt; nr_cpu_ids ? &amp;per_cpu(cpu_data, *pos) : NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *c_next(struct seq_file *m, void *v, loff_t *pos)</div><div class='ctx'> {</div><div class='ctx'> 	++*pos;</div><div class='del'>-	return NULL;</div><div class='add'>+	return c_start(m, pos);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void c_stop(struct seq_file *m, void *v)</div><div class='hunk'>@@ -328,11 +327,13 @@ static const struct kobj_type cpuregs_kobj_type = {</div><div class='ctx'> </div><div class='ctx'> CPUREGS_ATTR_RO(midr_el1, midr);</div><div class='ctx'> CPUREGS_ATTR_RO(revidr_el1, revidr);</div><div class='add'>+CPUREGS_ATTR_RO(aidr_el1, aidr);</div><div class='ctx'> CPUREGS_ATTR_RO(smidr_el1, smidr);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *cpuregs_id_attrs[] = {</div><div class='ctx'> 	&amp;cpuregs_attr_midr_el1.attr,</div><div class='ctx'> 	&amp;cpuregs_attr_revidr_el1.attr,</div><div class='add'>+	&amp;cpuregs_attr_aidr_el1.attr,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -469,6 +470,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)</div><div class='ctx'> 	info-&gt;reg_dczid = read_cpuid(DCZID_EL0);</div><div class='ctx'> 	info-&gt;reg_midr = read_cpuid_id();</div><div class='ctx'> 	info-&gt;reg_revidr = read_cpuid(REVIDR_EL1);</div><div class='add'>+	info-&gt;reg_aidr = read_cpuid(AIDR_EL1);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1);</div><div class='ctx'> 	info-&gt;reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1);</div><div class='head'>diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c<br/>index 1d25d8899dbf..250e9d7c08a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/efi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/efi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/efi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/efi.c</a></div><div class='hunk'>@@ -169,14 +169,14 @@ static DEFINE_RAW_SPINLOCK(efi_rt_lock);</div><div class='ctx'> void arch_efi_call_virt_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	efi_virtmap_load();</div><div class='del'>-	__efi_fpsimd_begin();</div><div class='ctx'> 	raw_spin_lock(&amp;efi_rt_lock);</div><div class='add'>+	__efi_fpsimd_begin();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_efi_call_virt_teardown(void)</div><div class='ctx'> {</div><div class='del'>-	raw_spin_unlock(&amp;efi_rt_lock);</div><div class='ctx'> 	__efi_fpsimd_end();</div><div class='add'>+	raw_spin_unlock(&amp;efi_rt_lock);</div><div class='ctx'> 	efi_virtmap_unload();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c<br/>index b260ddc4d3e9..7c1970b341b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/entry-common.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/entry-common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/entry-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/entry-common.c</a></div><div class='hunk'>@@ -132,7 +132,7 @@ static void do_notify_resume(struct pt_regs *regs, unsigned long thread_flags)</div><div class='ctx'> 	do {</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='del'>-		if (thread_flags &amp; _TIF_NEED_RESCHED)</div><div class='add'>+		if (thread_flags &amp; (_TIF_NEED_RESCHED | _TIF_NEED_RESCHED_LAZY))</div><div class='ctx'> 			schedule();</div><div class='ctx'> </div><div class='ctx'> 		if (thread_flags &amp; _TIF_UPROBE)</div><div class='hunk'>@@ -393,20 +393,16 @@ static bool cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs)</div><div class='ctx'>  * As per the ABI exit SME streaming mode and clear the SVE state not</div><div class='ctx'>  * shared with FPSIMD on syscall entry.</div><div class='ctx'>  */</div><div class='del'>-static inline void fp_user_discard(void)</div><div class='add'>+static inline void fpsimd_syscall_enter(void)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * If SME is active then exit streaming mode.  If ZA is active</div><div class='del'>-	 * then flush the SVE registers but leave userspace access to</div><div class='del'>-	 * both SVE and SME enabled, otherwise disable SME for the</div><div class='del'>-	 * task and fall through to disabling SVE too.  This means</div><div class='del'>-	 * that after a syscall we never have any streaming mode</div><div class='del'>-	 * register state to track, if this changes the KVM code will</div><div class='del'>-	 * need updating.</div><div class='del'>-	 */</div><div class='add'>+	/* Ensure PSTATE.SM is clear, but leave PSTATE.ZA as-is. */</div><div class='ctx'> 	if (system_supports_sme())</div><div class='ctx'> 		sme_smstop_sm();</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The CPU is not in streaming mode. If non-streaming SVE is not</div><div class='add'>+	 * supported, there is no SVE state that needs to be discarded.</div><div class='add'>+	 */</div><div class='ctx'> 	if (!system_supports_sve())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -416,6 +412,33 @@ static inline void fp_user_discard(void)</div><div class='ctx'> 		sve_vq_minus_one = sve_vq_from_vl(task_get_sve_vl(current)) - 1;</div><div class='ctx'> 		sve_flush_live(true, sve_vq_minus_one);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Any live non-FPSIMD SVE state has been zeroed. Allow</div><div class='add'>+	 * fpsimd_save_user_state() to lazily discard SVE state until either</div><div class='add'>+	 * the live state is unbound or fpsimd_syscall_exit() is called.</div><div class='add'>+	 */</div><div class='add'>+	__this_cpu_write(fpsimd_last_state.to_save, FP_STATE_FPSIMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void fpsimd_syscall_exit(void)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_sve())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The current task's user FPSIMD/SVE/SME state is now bound to this</div><div class='add'>+	 * CPU. The fpsimd_last_state.to_save value is either:</div><div class='add'>+	 *</div><div class='add'>+	 * - FP_STATE_FPSIMD, if the state has not been reloaded on this CPU</div><div class='add'>+	 *   since fpsimd_syscall_enter().</div><div class='add'>+	 *</div><div class='add'>+	 * - FP_STATE_CURRENT, if the state has been reloaded on this CPU at</div><div class='add'>+	 *   any point.</div><div class='add'>+	 *</div><div class='add'>+	 * Reset this to FP_STATE_CURRENT to stop lazy discarding.</div><div class='add'>+	 */</div><div class='add'>+	__this_cpu_write(fpsimd_last_state.to_save, FP_STATE_CURRENT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> UNHANDLED(el1t, 64, sync)</div><div class='hunk'>@@ -739,10 +762,11 @@ static void noinstr el0_svc(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	enter_from_user_mode(regs);</div><div class='ctx'> 	cortex_a76_erratum_1463225_svc_handler();</div><div class='del'>-	fp_user_discard();</div><div class='add'>+	fpsimd_syscall_enter();</div><div class='ctx'> 	local_daif_restore(DAIF_PROCCTX);</div><div class='ctx'> 	do_el0_svc(regs);</div><div class='ctx'> 	exit_to_user_mode(regs);</div><div class='add'>+	fpsimd_syscall_exit();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void noinstr el0_fpac(struct pt_regs *regs, unsigned long esr)</div><div class='head'>diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c<br/>index 8370d55f0353..c37f02d7194e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/fpsimd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/fpsimd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/fpsimd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/fpsimd.c</a></div><div class='hunk'>@@ -119,7 +119,7 @@</div><div class='ctx'>  *   whatever is in the FPSIMD registers is not saved to memory, but discarded.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);</div><div class='add'>+DEFINE_PER_CPU(struct cpu_fp_state, fpsimd_last_state);</div><div class='ctx'> </div><div class='ctx'> __ro_after_init struct vl_info vl_info[ARM64_VEC_MAX] = {</div><div class='ctx'> #ifdef CONFIG_ARM64_SVE</div><div class='hunk'>@@ -180,12 +180,12 @@ static inline void set_sve_default_vl(int val)</div><div class='ctx'> 	set_default_vl(ARM64_VEC_SVE, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __percpu *efi_sve_state;</div><div class='add'>+static u8 *efi_sve_state;</div><div class='ctx'> </div><div class='ctx'> #else /* ! CONFIG_ARM64_SVE */</div><div class='ctx'> </div><div class='ctx'> /* Dummy declaration for code that will be optimised out: */</div><div class='del'>-extern void __percpu *efi_sve_state;</div><div class='add'>+extern u8 *efi_sve_state;</div><div class='ctx'> </div><div class='ctx'> #endif /* ! CONFIG_ARM64_SVE */</div><div class='ctx'> </div><div class='hunk'>@@ -359,20 +359,15 @@ static void task_fpsimd_load(void)</div><div class='ctx'> 	WARN_ON(preemptible());</div><div class='ctx'> 	WARN_ON(test_thread_flag(TIF_KERNEL_FPSTATE));</div><div class='ctx'> </div><div class='del'>-	if (system_supports_fpmr())</div><div class='del'>-		write_sysreg_s(current-&gt;thread.uw.fpmr, SYS_FPMR);</div><div class='del'>-</div><div class='ctx'> 	if (system_supports_sve() || system_supports_sme()) {</div><div class='ctx'> 		switch (current-&gt;thread.fp_type) {</div><div class='ctx'> 		case FP_STATE_FPSIMD:</div><div class='ctx'> 			/* Stop tracking SVE for this task until next use. */</div><div class='del'>-			if (test_and_clear_thread_flag(TIF_SVE))</div><div class='del'>-				sve_user_disable();</div><div class='add'>+			clear_thread_flag(TIF_SVE);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FP_STATE_SVE:</div><div class='del'>-			if (!thread_sm_enabled(&amp;current-&gt;thread) &amp;&amp;</div><div class='del'>-			    !WARN_ON_ONCE(!test_and_set_thread_flag(TIF_SVE)))</div><div class='del'>-				sve_user_enable();</div><div class='add'>+			if (!thread_sm_enabled(&amp;current-&gt;thread))</div><div class='add'>+				WARN_ON_ONCE(!test_and_set_thread_flag(TIF_SVE));</div><div class='ctx'> </div><div class='ctx'> 			if (test_thread_flag(TIF_SVE))</div><div class='ctx'> 				sve_set_vq(sve_vq_from_vl(task_get_sve_vl(current)) - 1);</div><div class='hunk'>@@ -413,6 +408,9 @@ static void task_fpsimd_load(void)</div><div class='ctx'> 			restore_ffr = system_supports_fa64();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (system_supports_fpmr())</div><div class='add'>+		write_sysreg_s(current-&gt;thread.uw.fpmr, SYS_FPMR);</div><div class='add'>+</div><div class='ctx'> 	if (restore_sve_regs) {</div><div class='ctx'> 		WARN_ON_ONCE(current-&gt;thread.fp_type != FP_STATE_SVE);</div><div class='ctx'> 		sve_load_state(sve_pffr(&amp;current-&gt;thread),</div><div class='hunk'>@@ -453,12 +451,15 @@ static void fpsimd_save_user_state(void)</div><div class='ctx'> 		*(last-&gt;fpmr) = read_sysreg_s(SYS_FPMR);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If a task is in a syscall the ABI allows us to only</div><div class='del'>-	 * preserve the state shared with FPSIMD so don't bother</div><div class='del'>-	 * saving the full SVE state in that case.</div><div class='add'>+	 * Save SVE state if it is live.</div><div class='add'>+	 *</div><div class='add'>+	 * The syscall ABI discards live SVE state at syscall entry. When</div><div class='add'>+	 * entering a syscall, fpsimd_syscall_enter() sets to_save to</div><div class='add'>+	 * FP_STATE_FPSIMD to allow the SVE state to be lazily discarded until</div><div class='add'>+	 * either new SVE state is loaded+bound or fpsimd_syscall_exit() is</div><div class='add'>+	 * called prior to a return to userspace.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((last-&gt;to_save == FP_STATE_CURRENT &amp;&amp; test_thread_flag(TIF_SVE) &amp;&amp;</div><div class='del'>-	     !in_syscall(current_pt_regs())) ||</div><div class='add'>+	if ((last-&gt;to_save == FP_STATE_CURRENT &amp;&amp; test_thread_flag(TIF_SVE)) ||</div><div class='ctx'> 	    last-&gt;to_save == FP_STATE_SVE) {</div><div class='ctx'> 		save_sve_regs = true;</div><div class='ctx'> 		save_ffr = true;</div><div class='hunk'>@@ -651,7 +652,7 @@ static void __fpsimd_to_sve(void *sst, struct user_fpsimd_state const *fst,</div><div class='ctx'>  * task-&gt;thread.uw.fpsimd_state must be up to date before calling this</div><div class='ctx'>  * function.</div><div class='ctx'>  */</div><div class='del'>-static void fpsimd_to_sve(struct task_struct *task)</div><div class='add'>+static inline void fpsimd_to_sve(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	void *sst = task-&gt;thread.sve_state;</div><div class='hunk'>@@ -675,7 +676,7 @@ static void fpsimd_to_sve(struct task_struct *task)</div><div class='ctx'>  * bytes of allocated kernel memory.</div><div class='ctx'>  * task-&gt;thread.sve_state must be up to date before calling this function.</div><div class='ctx'>  */</div><div class='del'>-static void sve_to_fpsimd(struct task_struct *task)</div><div class='add'>+static inline void sve_to_fpsimd(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int vq, vl;</div><div class='ctx'> 	void const *sst = task-&gt;thread.sve_state;</div><div class='hunk'>@@ -694,44 +695,39 @@ static void sve_to_fpsimd(struct task_struct *task)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void cpu_enable_fpmr(const struct arm64_cpu_capabilities *__always_unused p)</div><div class='add'>+static inline void __fpsimd_zero_vregs(struct user_fpsimd_state *fpsimd)</div><div class='ctx'> {</div><div class='del'>-	write_sysreg_s(read_sysreg_s(SYS_SCTLR_EL1) | SCTLR_EL1_EnFPM_MASK,</div><div class='del'>-		       SYS_SCTLR_EL1);</div><div class='add'>+	memset(&amp;fpsimd-&gt;vregs, 0, sizeof(fpsimd-&gt;vregs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARM64_SVE</div><div class='ctx'> /*</div><div class='del'>- * Call __sve_free() directly only if you know task can't be scheduled</div><div class='del'>- * or preempted.</div><div class='add'>+ * Simulate the effects of an SMSTOP SM instruction.</div><div class='ctx'>  */</div><div class='del'>-static void __sve_free(struct task_struct *task)</div><div class='add'>+void task_smstop_sm(struct task_struct *task)</div><div class='ctx'> {</div><div class='del'>-	kfree(task-&gt;thread.sve_state);</div><div class='del'>-	task-&gt;thread.sve_state = NULL;</div><div class='del'>-}</div><div class='add'>+	if (!thread_sm_enabled(&amp;task-&gt;thread))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-static void sve_free(struct task_struct *task)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(test_tsk_thread_flag(task, TIF_SVE));</div><div class='add'>+	__fpsimd_zero_vregs(&amp;task-&gt;thread.uw.fpsimd_state);</div><div class='add'>+	task-&gt;thread.uw.fpsimd_state.fpsr = 0x0800009f;</div><div class='add'>+	if (system_supports_fpmr())</div><div class='add'>+		task-&gt;thread.uw.fpmr = 0;</div><div class='ctx'> </div><div class='del'>-	__sve_free(task);</div><div class='add'>+	task-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='add'>+	task-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Return how many bytes of memory are required to store the full SVE</div><div class='del'>- * state for task, given task's currently configured vector length.</div><div class='del'>- */</div><div class='del'>-size_t sve_state_size(struct task_struct const *task)</div><div class='add'>+void cpu_enable_fpmr(const struct arm64_cpu_capabilities *__always_unused p)</div><div class='ctx'> {</div><div class='del'>-	unsigned int vl = 0;</div><div class='del'>-</div><div class='del'>-	if (system_supports_sve())</div><div class='del'>-		vl = task_get_sve_vl(task);</div><div class='del'>-	if (system_supports_sme())</div><div class='del'>-		vl = max(vl, task_get_sme_vl(task));</div><div class='add'>+	write_sysreg_s(read_sysreg_s(SYS_SCTLR_EL1) | SCTLR_EL1_EnFPM_MASK,</div><div class='add'>+		       SYS_SCTLR_EL1);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return SVE_SIG_REGS_SIZE(sve_vq_from_vl(vl));</div><div class='add'>+#ifdef CONFIG_ARM64_SVE</div><div class='add'>+static void sve_free(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	kfree(task-&gt;thread.sve_state);</div><div class='add'>+	task-&gt;thread.sve_state = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -758,69 +754,34 @@ void sve_alloc(struct task_struct *task, bool flush)</div><div class='ctx'> 		kzalloc(sve_state_size(task), GFP_KERNEL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Force the FPSIMD state shared with SVE to be updated in the SVE state</div><div class='del'>- * even if the SVE state is the current active state.</div><div class='del'>- *</div><div class='del'>- * This should only be called by ptrace.  task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='del'>- */</div><div class='del'>-void fpsimd_force_sync_to_sve(struct task_struct *task)</div><div class='del'>-{</div><div class='del'>-	fpsimd_to_sve(task);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Ensure that task-&gt;thread.sve_state is up to date with respect to</div><div class='del'>- * the user task, irrespective of when SVE is in use or not.</div><div class='del'>- *</div><div class='del'>- * This should only be called by ptrace.  task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='del'>- */</div><div class='del'>-void fpsimd_sync_to_sve(struct task_struct *task)</div><div class='del'>-{</div><div class='del'>-	if (!test_tsk_thread_flag(task, TIF_SVE) &amp;&amp;</div><div class='del'>-	    !thread_sm_enabled(&amp;task-&gt;thread))</div><div class='del'>-		fpsimd_to_sve(task);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='del'>- * Ensure that task-&gt;thread.uw.fpsimd_state is up to date with respect to</div><div class='del'>- * the user task, irrespective of whether SVE is in use or not.</div><div class='add'>+ * Ensure that task-&gt;thread.uw.fpsimd_state is up to date with respect to the</div><div class='add'>+ * task's currently effective FPSIMD/SVE state.</div><div class='ctx'>  *</div><div class='del'>- * This should only be called by ptrace.  task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='add'>+ * The task's FPSIMD/SVE/SME state must not be subject to concurrent</div><div class='add'>+ * manipulation.</div><div class='ctx'>  */</div><div class='del'>-void sve_sync_to_fpsimd(struct task_struct *task)</div><div class='add'>+void fpsimd_sync_from_effective_state(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	if (task-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='ctx'> 		sve_to_fpsimd(task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Ensure that task-&gt;thread.sve_state is up to date with respect to</div><div class='del'>- * the task-&gt;thread.uw.fpsimd_state.</div><div class='add'>+ * Ensure that the task's currently effective FPSIMD/SVE state is up to date</div><div class='add'>+ * with respect to task-&gt;thread.uw.fpsimd_state, zeroing any effective</div><div class='add'>+ * non-FPSIMD (S)SVE state.</div><div class='ctx'>  *</div><div class='del'>- * This should only be called by ptrace to merge new FPSIMD register</div><div class='del'>- * values into a task for which SVE is currently active.</div><div class='del'>- * task must be non-runnable.</div><div class='del'>- * task-&gt;thread.sve_state must point to at least sve_state_size(task)</div><div class='del'>- * bytes of allocated kernel memory.</div><div class='del'>- * task-&gt;thread.uw.fpsimd_state must already have been initialised with</div><div class='del'>- * the new FPSIMD register values to be merged in.</div><div class='add'>+ * The task's FPSIMD/SVE/SME state must not be subject to concurrent</div><div class='add'>+ * manipulation.</div><div class='ctx'>  */</div><div class='del'>-void sve_sync_from_fpsimd_zeropad(struct task_struct *task)</div><div class='add'>+void fpsimd_sync_to_effective_state_zeropad(struct task_struct *task)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	void *sst = task-&gt;thread.sve_state;</div><div class='ctx'> 	struct user_fpsimd_state const *fst = &amp;task-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> </div><div class='del'>-	if (!test_tsk_thread_flag(task, TIF_SVE) &amp;&amp;</div><div class='del'>-	    !thread_sm_enabled(&amp;task-&gt;thread))</div><div class='add'>+	if (task-&gt;thread.fp_type != FP_STATE_SVE)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vq = sve_vq_from_vl(thread_get_cur_vl(&amp;task-&gt;thread));</div><div class='hunk'>@@ -829,10 +790,73 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task)</div><div class='ctx'> 	__fpsimd_to_sve(sst, fst, vq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int change_live_vector_length(struct task_struct *task,</div><div class='add'>+				     enum vec_type type,</div><div class='add'>+				     unsigned long vl)</div><div class='add'>+{</div><div class='add'>+	unsigned int sve_vl = task_get_sve_vl(task);</div><div class='add'>+	unsigned int sme_vl = task_get_sme_vl(task);</div><div class='add'>+	void *sve_state = NULL, *sme_state = NULL;</div><div class='add'>+</div><div class='add'>+	if (type == ARM64_VEC_SME)</div><div class='add'>+		sme_vl = vl;</div><div class='add'>+	else</div><div class='add'>+		sve_vl = vl;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Allocate the new sve_state and sme_state before freeing the old</div><div class='add'>+	 * copies so that allocation failure can be handled without needing to</div><div class='add'>+	 * mutate the task's state in any way.</div><div class='add'>+	 *</div><div class='add'>+	 * Changes to the SVE vector length must not discard live ZA state or</div><div class='add'>+	 * clear PSTATE.ZA, as userspace code which is unaware of the AAPCS64</div><div class='add'>+	 * ZA lazy saving scheme may attempt to change the SVE vector length</div><div class='add'>+	 * while unsaved/dormant ZA state exists.</div><div class='add'>+	 */</div><div class='add'>+	sve_state = kzalloc(__sve_state_size(sve_vl, sme_vl), GFP_KERNEL);</div><div class='add'>+	if (!sve_state)</div><div class='add'>+		goto out_mem;</div><div class='add'>+</div><div class='add'>+	if (type == ARM64_VEC_SME) {</div><div class='add'>+		sme_state = kzalloc(__sme_state_size(sme_vl), GFP_KERNEL);</div><div class='add'>+		if (!sme_state)</div><div class='add'>+			goto out_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (task == current)</div><div class='add'>+		fpsimd_save_and_flush_current_state();</div><div class='add'>+	else</div><div class='add'>+		fpsimd_flush_task_state(task);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Always preserve PSTATE.SM and the effective FPSIMD state, zeroing</div><div class='add'>+	 * other SVE state.</div><div class='add'>+	 */</div><div class='add'>+	fpsimd_sync_from_effective_state(task);</div><div class='add'>+	task_set_vl(task, type, vl);</div><div class='add'>+	kfree(task-&gt;thread.sve_state);</div><div class='add'>+	task-&gt;thread.sve_state = sve_state;</div><div class='add'>+	fpsimd_sync_to_effective_state_zeropad(task);</div><div class='add'>+</div><div class='add'>+	if (type == ARM64_VEC_SME) {</div><div class='add'>+		task-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='add'>+		kfree(task-&gt;thread.sme_state);</div><div class='add'>+		task-&gt;thread.sme_state = sme_state;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_mem:</div><div class='add'>+	kfree(sve_state);</div><div class='add'>+	kfree(sme_state);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int vec_set_vector_length(struct task_struct *task, enum vec_type type,</div><div class='ctx'> 			  unsigned long vl, unsigned long flags)</div><div class='ctx'> {</div><div class='del'>-	bool free_sme = false;</div><div class='add'>+	bool onexec = flags &amp; PR_SVE_SET_VL_ONEXEC;</div><div class='add'>+	bool inherit = flags &amp; PR_SVE_VL_INHERIT;</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; ~(unsigned long)(PR_SVE_VL_INHERIT |</div><div class='ctx'> 				     PR_SVE_SET_VL_ONEXEC))</div><div class='hunk'>@@ -852,71 +876,17 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,</div><div class='ctx'> </div><div class='ctx'> 	vl = find_supported_vector_length(type, vl);</div><div class='ctx'> </div><div class='del'>-	if (flags &amp; (PR_SVE_VL_INHERIT |</div><div class='del'>-		     PR_SVE_SET_VL_ONEXEC))</div><div class='add'>+	if (!onexec &amp;&amp; vl != task_get_vl(task, type)) {</div><div class='add'>+		if (change_live_vector_length(task, type, vl))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (onexec || inherit)</div><div class='ctx'> 		task_set_vl_onexec(task, type, vl);</div><div class='ctx'> 	else</div><div class='ctx'> 		/* Reset VL to system default on next exec: */</div><div class='ctx'> 		task_set_vl_onexec(task, type, 0);</div><div class='ctx'> </div><div class='del'>-	/* Only actually set the VL if not deferred: */</div><div class='del'>-	if (flags &amp; PR_SVE_SET_VL_ONEXEC)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (vl == task_get_vl(task, type))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * To ensure the FPSIMD bits of the SVE vector registers are preserved,</div><div class='del'>-	 * write any live register state back to task_struct, and convert to a</div><div class='del'>-	 * regular FPSIMD thread.</div><div class='del'>-	 */</div><div class='del'>-	if (task == current) {</div><div class='del'>-		get_cpu_fpsimd_context();</div><div class='del'>-</div><div class='del'>-		fpsimd_save_user_state();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(task);</div><div class='del'>-	if (test_and_clear_tsk_thread_flag(task, TIF_SVE) ||</div><div class='del'>-	    thread_sm_enabled(&amp;task-&gt;thread)) {</div><div class='del'>-		sve_to_fpsimd(task);</div><div class='del'>-		task-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (system_supports_sme()) {</div><div class='del'>-		if (type == ARM64_VEC_SME ||</div><div class='del'>-		    !(task-&gt;thread.svcr &amp; (SVCR_SM_MASK | SVCR_ZA_MASK))) {</div><div class='del'>-			/*</div><div class='del'>-			 * We are changing the SME VL or weren't using</div><div class='del'>-			 * SME anyway, discard the state and force a</div><div class='del'>-			 * reallocation.</div><div class='del'>-			 */</div><div class='del'>-			task-&gt;thread.svcr &amp;= ~(SVCR_SM_MASK |</div><div class='del'>-					       SVCR_ZA_MASK);</div><div class='del'>-			clear_tsk_thread_flag(task, TIF_SME);</div><div class='del'>-			free_sme = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (task == current)</div><div class='del'>-		put_cpu_fpsimd_context();</div><div class='del'>-</div><div class='del'>-	task_set_vl(task, type, vl);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Free the changed states if they are not in use, SME will be</div><div class='del'>-	 * reallocated to the correct size on next use and we just</div><div class='del'>-	 * allocate SVE now in case it is needed for use in streaming</div><div class='del'>-	 * mode.</div><div class='del'>-	 */</div><div class='del'>-	sve_free(task);</div><div class='del'>-	sve_alloc(task, true);</div><div class='del'>-</div><div class='del'>-	if (free_sme)</div><div class='del'>-		sme_free(task);</div><div class='del'>-</div><div class='del'>-out:</div><div class='ctx'> 	update_tsk_thread_flag(task, vec_vl_inherit_flag(type),</div><div class='ctx'> 			       flags &amp; PR_SVE_VL_INHERIT);</div><div class='ctx'> </div><div class='hunk'>@@ -1131,15 +1101,15 @@ static void __init sve_efi_setup(void)</div><div class='ctx'> 	if (!sve_vl_valid(max_vl))</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	efi_sve_state = __alloc_percpu(</div><div class='del'>-		SVE_SIG_REGS_SIZE(sve_vq_from_vl(max_vl)), SVE_VQ_BYTES);</div><div class='add'>+	efi_sve_state = kmalloc(SVE_SIG_REGS_SIZE(sve_vq_from_vl(max_vl)),</div><div class='add'>+				GFP_KERNEL);</div><div class='ctx'> 	if (!efi_sve_state)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	panic("Cannot allocate percpu memory for EFI SVE save/restore");</div><div class='add'>+	panic("Cannot allocate memory for EFI SVE save/restore");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cpu_enable_sve(const struct arm64_cpu_capabilities *__always_unused p)</div><div class='hunk'>@@ -1212,7 +1182,7 @@ void __init sve_setup(void)</div><div class='ctx'>  */</div><div class='ctx'> void fpsimd_release_task(struct task_struct *dead_task)</div><div class='ctx'> {</div><div class='del'>-	__sve_free(dead_task);</div><div class='add'>+	sve_free(dead_task);</div><div class='ctx'> 	sme_free(dead_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1436,7 +1406,7 @@ void do_sme_acc(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> 	 * If this not a trap due to SME being disabled then something</div><div class='ctx'> 	 * is being used in the wrong mode, report as SIGILL.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ESR_ELx_ISS(esr) != ESR_ELx_SME_ISS_SME_DISABLED) {</div><div class='add'>+	if (ESR_ELx_SME_ISS_SMTC(esr) != ESR_ELx_SME_ISS_SMTC_SME_DISABLED) {</div><div class='ctx'> 		force_signal_inject(SIGILL, ILL_ILLOPC, regs-&gt;pc, 0);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1460,6 +1430,8 @@ void do_sme_acc(unsigned long esr, struct pt_regs *regs)</div><div class='ctx'> 		sme_set_vq(vq_minus_one);</div><div class='ctx'> </div><div class='ctx'> 		fpsimd_bind_task_to_cpu();</div><div class='add'>+	} else {</div><div class='add'>+		fpsimd_flush_task_state(current);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	put_cpu_fpsimd_context();</div><div class='hunk'>@@ -1573,8 +1545,8 @@ void fpsimd_thread_switch(struct task_struct *next)</div><div class='ctx'> 		fpsimd_save_user_state();</div><div class='ctx'> </div><div class='ctx'> 	if (test_tsk_thread_flag(next, TIF_KERNEL_FPSTATE)) {</div><div class='del'>-		fpsimd_load_kernel_state(next);</div><div class='ctx'> 		fpsimd_flush_cpu_state();</div><div class='add'>+		fpsimd_load_kernel_state(next);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Fix up TIF_FOREIGN_FPSTATE to correctly describe next's</div><div class='hunk'>@@ -1661,6 +1633,9 @@ void fpsimd_flush_thread(void)</div><div class='ctx'> 		current-&gt;thread.svcr = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (system_supports_fpmr())</div><div class='add'>+		current-&gt;thread.uw.fpmr = 0;</div><div class='add'>+</div><div class='ctx'> 	current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> </div><div class='ctx'> 	put_cpu_fpsimd_context();</div><div class='hunk'>@@ -1683,18 +1658,6 @@ void fpsimd_preserve_current_state(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Like fpsimd_preserve_current_state(), but ensure that</div><div class='del'>- * current-&gt;thread.uw.fpsimd_state is updated so that it can be copied to</div><div class='del'>- * the signal frame.</div><div class='del'>- */</div><div class='del'>-void fpsimd_signal_preserve_current_state(void)</div><div class='del'>-{</div><div class='del'>-	fpsimd_preserve_current_state();</div><div class='del'>-	if (current-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='del'>-		sve_to_fpsimd(current);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Associate current's FPSIMD context with this cpu</div><div class='ctx'>  * The caller must have ownership of the cpu FPSIMD context before calling</div><div class='ctx'>  * this function.</div><div class='hunk'>@@ -1786,30 +1749,14 @@ void fpsimd_restore_current_state(void)</div><div class='ctx'> 	put_cpu_fpsimd_context();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Load an updated userland FPSIMD state for 'current' from memory and set the</div><div class='del'>- * flag that indicates that the FPSIMD register contents are the most recent</div><div class='del'>- * FPSIMD state of 'current'. This is used by the signal code to restore the</div><div class='del'>- * register state when returning from a signal handler in FPSIMD only cases,</div><div class='del'>- * any SVE context will be discarded.</div><div class='del'>- */</div><div class='ctx'> void fpsimd_update_current_state(struct user_fpsimd_state const *state)</div><div class='ctx'> {</div><div class='ctx'> 	if (WARN_ON(!system_supports_fpsimd()))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	get_cpu_fpsimd_context();</div><div class='del'>-</div><div class='ctx'> 	current-&gt;thread.uw.fpsimd_state = *state;</div><div class='del'>-	if (test_thread_flag(TIF_SVE))</div><div class='add'>+	if (current-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='ctx'> 		fpsimd_to_sve(current);</div><div class='del'>-</div><div class='del'>-	task_fpsimd_load();</div><div class='del'>-	fpsimd_bind_task_to_cpu();</div><div class='del'>-</div><div class='del'>-	clear_thread_flag(TIF_FOREIGN_FPSTATE);</div><div class='del'>-</div><div class='del'>-	put_cpu_fpsimd_context();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1839,6 +1786,17 @@ void fpsimd_flush_task_state(struct task_struct *t)</div><div class='ctx'> 	barrier();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void fpsimd_save_and_flush_current_state(void)</div><div class='add'>+{</div><div class='add'>+	if (!system_supports_fpsimd())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	get_cpu_fpsimd_context();</div><div class='add'>+	fpsimd_save_user_state();</div><div class='add'>+	fpsimd_flush_task_state(current);</div><div class='add'>+	put_cpu_fpsimd_context();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Save the FPSIMD state to memory and invalidate cpu view.</div><div class='ctx'>  * This function must be called with preemption disabled.</div><div class='hunk'>@@ -1948,10 +1906,10 @@ EXPORT_SYMBOL_GPL(kernel_neon_end);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EFI</div><div class='ctx'> </div><div class='del'>-static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state);</div><div class='del'>-static DEFINE_PER_CPU(bool, efi_fpsimd_state_used);</div><div class='del'>-static DEFINE_PER_CPU(bool, efi_sve_state_used);</div><div class='del'>-static DEFINE_PER_CPU(bool, efi_sm_state);</div><div class='add'>+static struct user_fpsimd_state efi_fpsimd_state;</div><div class='add'>+static bool efi_fpsimd_state_used;</div><div class='add'>+static bool efi_sve_state_used;</div><div class='add'>+static bool efi_sm_state;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * EFI runtime services support functions</div><div class='hunk'>@@ -1984,18 +1942,16 @@ void __efi_fpsimd_begin(void)</div><div class='ctx'> 		 * If !efi_sve_state, SVE can't be in use yet and doesn't need</div><div class='ctx'> 		 * preserving:</div><div class='ctx'> 		 */</div><div class='del'>-		if (system_supports_sve() &amp;&amp; likely(efi_sve_state)) {</div><div class='del'>-			char *sve_state = this_cpu_ptr(efi_sve_state);</div><div class='add'>+		if (system_supports_sve() &amp;&amp; efi_sve_state != NULL) {</div><div class='ctx'> 			bool ffr = true;</div><div class='ctx'> 			u64 svcr;</div><div class='ctx'> </div><div class='del'>-			__this_cpu_write(efi_sve_state_used, true);</div><div class='add'>+			efi_sve_state_used = true;</div><div class='ctx'> </div><div class='ctx'> 			if (system_supports_sme()) {</div><div class='ctx'> 				svcr = read_sysreg_s(SYS_SVCR);</div><div class='ctx'> </div><div class='del'>-				__this_cpu_write(efi_sm_state,</div><div class='del'>-						 svcr &amp; SVCR_SM_MASK);</div><div class='add'>+				efi_sm_state = svcr &amp; SVCR_SM_MASK;</div><div class='ctx'> </div><div class='ctx'> 				/*</div><div class='ctx'> 				 * Unless we have FA64 FFR does not</div><div class='hunk'>@@ -2005,19 +1961,18 @@ void __efi_fpsimd_begin(void)</div><div class='ctx'> 					ffr = !(svcr &amp; SVCR_SM_MASK);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			sve_save_state(sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='del'>-				       &amp;this_cpu_ptr(&amp;efi_fpsimd_state)-&gt;fpsr,</div><div class='del'>-				       ffr);</div><div class='add'>+			sve_save_state(efi_sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='add'>+				       &amp;efi_fpsimd_state.fpsr, ffr);</div><div class='ctx'> </div><div class='ctx'> 			if (system_supports_sme())</div><div class='ctx'> 				sysreg_clear_set_s(SYS_SVCR,</div><div class='ctx'> 						   SVCR_SM_MASK, 0);</div><div class='ctx'> </div><div class='ctx'> 		} else {</div><div class='del'>-			fpsimd_save_state(this_cpu_ptr(&amp;efi_fpsimd_state));</div><div class='add'>+			fpsimd_save_state(&amp;efi_fpsimd_state);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		__this_cpu_write(efi_fpsimd_state_used, true);</div><div class='add'>+		efi_fpsimd_state_used = true;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2029,12 +1984,10 @@ void __efi_fpsimd_end(void)</div><div class='ctx'> 	if (!system_supports_fpsimd())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!__this_cpu_xchg(efi_fpsimd_state_used, false)) {</div><div class='add'>+	if (!efi_fpsimd_state_used) {</div><div class='ctx'> 		kernel_neon_end();</div><div class='ctx'> 	} else {</div><div class='del'>-		if (system_supports_sve() &amp;&amp;</div><div class='del'>-		    likely(__this_cpu_read(efi_sve_state_used))) {</div><div class='del'>-			char const *sve_state = this_cpu_ptr(efi_sve_state);</div><div class='add'>+		if (system_supports_sve() &amp;&amp; efi_sve_state_used) {</div><div class='ctx'> 			bool ffr = true;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='hunk'>@@ -2043,7 +1996,7 @@ void __efi_fpsimd_end(void)</div><div class='ctx'> 			 * streaming mode.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (system_supports_sme()) {</div><div class='del'>-				if (__this_cpu_read(efi_sm_state)) {</div><div class='add'>+				if (efi_sm_state) {</div><div class='ctx'> 					sysreg_clear_set_s(SYS_SVCR,</div><div class='ctx'> 							   0,</div><div class='ctx'> 							   SVCR_SM_MASK);</div><div class='hunk'>@@ -2057,14 +2010,15 @@ void __efi_fpsimd_end(void)</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			sve_load_state(sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='del'>-				       &amp;this_cpu_ptr(&amp;efi_fpsimd_state)-&gt;fpsr,</div><div class='del'>-				       ffr);</div><div class='add'>+			sve_load_state(efi_sve_state + sve_ffr_offset(sve_max_vl()),</div><div class='add'>+				       &amp;efi_fpsimd_state.fpsr, ffr);</div><div class='ctx'> </div><div class='del'>-			__this_cpu_write(efi_sve_state_used, false);</div><div class='add'>+			efi_sve_state_used = false;</div><div class='ctx'> 		} else {</div><div class='del'>-			fpsimd_load_state(this_cpu_ptr(&amp;efi_fpsimd_state));</div><div class='add'>+			fpsimd_load_state(&amp;efi_fpsimd_state);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		efi_fpsimd_state_used = false;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S<br/>index 2ce73525de2c..ca04b338cb0d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/head.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/head.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/head.S</a></div><div class='hunk'>@@ -89,7 +89,7 @@ SYM_CODE_START(primary_entry)</div><div class='ctx'> 	adrp	x1, early_init_stack</div><div class='ctx'> 	mov	sp, x1</div><div class='ctx'> 	mov	x29, xzr</div><div class='del'>-	adrp	x0, init_idmap_pg_dir</div><div class='add'>+	adrp	x0, __pi_init_idmap_pg_dir</div><div class='ctx'> 	mov	x1, xzr</div><div class='ctx'> 	bl	__pi_create_init_idmap</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +101,7 @@ SYM_CODE_START(primary_entry)</div><div class='ctx'> 	cbnz	x19, 0f</div><div class='ctx'> 	dmb     sy</div><div class='ctx'> 	mov	x1, x0				// end of used region</div><div class='del'>-	adrp    x0, init_idmap_pg_dir</div><div class='add'>+	adrp    x0, __pi_init_idmap_pg_dir</div><div class='ctx'> 	adr_l	x2, dcache_inval_poc</div><div class='ctx'> 	blr	x2</div><div class='ctx'> 	b	1f</div><div class='hunk'>@@ -507,7 +507,7 @@ SYM_FUNC_END(__no_granule_support)</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_START_LOCAL(__primary_switch)</div><div class='ctx'> 	adrp	x1, reserved_pg_dir</div><div class='del'>-	adrp	x2, init_idmap_pg_dir</div><div class='add'>+	adrp	x2, __pi_init_idmap_pg_dir</div><div class='ctx'> 	bl	__enable_mmu</div><div class='ctx'> </div><div class='ctx'> 	adrp	x1, early_init_stack</div><div class='head'>diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S<br/>index ae990da1eae5..36e2d26b54f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/hyp-stub.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/hyp-stub.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/hyp-stub.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/hyp-stub.S</a></div><div class='hunk'>@@ -97,7 +97,7 @@ SYM_CODE_START_LOCAL(__finalise_el2)</div><div class='ctx'> 2:</div><div class='ctx'> 	// Engage the VHE magic!</div><div class='ctx'> 	mov_q	x0, HCR_HOST_VHE_FLAGS</div><div class='del'>-	msr	hcr_el2, x0</div><div class='add'>+	msr_hcr_el2 x0</div><div class='ctx'> 	isb</div><div class='ctx'> </div><div class='ctx'> 	// Use the EL1 allocated stack, per-cpu offset</div><div class='head'>diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h<br/>index 5e3c4b58f279..5a69b6eb4090 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/image-vars.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/image-vars.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/image-vars.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/image-vars.h</a></div><div class='hunk'>@@ -10,6 +10,12 @@</div><div class='ctx'> #error This file should only be included in vmlinux.lds.S</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define PI_EXPORT_SYM(sym)		\</div><div class='add'>+	__PI_EXPORT_SYM(sym, __pi_ ## sym, Cannot export BSS symbol sym to startup code)</div><div class='add'>+#define __PI_EXPORT_SYM(sym, pisym, msg)\</div><div class='add'>+	PROVIDE(pisym = sym);		\</div><div class='add'>+	ASSERT((sym - KIMAGE_VADDR) &lt; (__bss_start - KIMAGE_VADDR), #msg)</div><div class='add'>+</div><div class='ctx'> PROVIDE(__efistub_primary_entry		= primary_entry);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -36,41 +42,30 @@ PROVIDE(__pi___memcpy			= __pi_memcpy);</div><div class='ctx'> PROVIDE(__pi___memmove			= __pi_memmove);</div><div class='ctx'> PROVIDE(__pi___memset			= __pi_memset);</div><div class='ctx'> </div><div class='del'>-PROVIDE(__pi_id_aa64isar1_override	= id_aa64isar1_override);</div><div class='del'>-PROVIDE(__pi_id_aa64isar2_override	= id_aa64isar2_override);</div><div class='del'>-PROVIDE(__pi_id_aa64mmfr0_override	= id_aa64mmfr0_override);</div><div class='del'>-PROVIDE(__pi_id_aa64mmfr1_override	= id_aa64mmfr1_override);</div><div class='del'>-PROVIDE(__pi_id_aa64mmfr2_override	= id_aa64mmfr2_override);</div><div class='del'>-PROVIDE(__pi_id_aa64pfr0_override	= id_aa64pfr0_override);</div><div class='del'>-PROVIDE(__pi_id_aa64pfr1_override	= id_aa64pfr1_override);</div><div class='del'>-PROVIDE(__pi_id_aa64smfr0_override	= id_aa64smfr0_override);</div><div class='del'>-PROVIDE(__pi_id_aa64zfr0_override	= id_aa64zfr0_override);</div><div class='del'>-PROVIDE(__pi_arm64_sw_feature_override	= arm64_sw_feature_override);</div><div class='del'>-PROVIDE(__pi_arm64_use_ng_mappings	= arm64_use_ng_mappings);</div><div class='del'>-#ifdef CONFIG_CAVIUM_ERRATUM_27456</div><div class='del'>-PROVIDE(__pi_cavium_erratum_27456_cpus	= cavium_erratum_27456_cpus);</div><div class='del'>-PROVIDE(__pi_is_midr_in_range_list	= is_midr_in_range_list);</div><div class='del'>-#endif</div><div class='del'>-PROVIDE(__pi__ctype			= _ctype);</div><div class='del'>-PROVIDE(__pi_memstart_offset_seed	= memstart_offset_seed);</div><div class='del'>-</div><div class='del'>-PROVIDE(__pi_init_idmap_pg_dir		= init_idmap_pg_dir);</div><div class='del'>-PROVIDE(__pi_init_idmap_pg_end		= init_idmap_pg_end);</div><div class='del'>-PROVIDE(__pi_init_pg_dir		= init_pg_dir);</div><div class='del'>-PROVIDE(__pi_init_pg_end		= init_pg_end);</div><div class='del'>-PROVIDE(__pi_swapper_pg_dir		= swapper_pg_dir);</div><div class='del'>-</div><div class='del'>-PROVIDE(__pi__text			= _text);</div><div class='del'>-PROVIDE(__pi__stext               	= _stext);</div><div class='del'>-PROVIDE(__pi__etext               	= _etext);</div><div class='del'>-PROVIDE(__pi___start_rodata       	= __start_rodata);</div><div class='del'>-PROVIDE(__pi___inittext_begin     	= __inittext_begin);</div><div class='del'>-PROVIDE(__pi___inittext_end       	= __inittext_end);</div><div class='del'>-PROVIDE(__pi___initdata_begin     	= __initdata_begin);</div><div class='del'>-PROVIDE(__pi___initdata_end       	= __initdata_end);</div><div class='del'>-PROVIDE(__pi__data                	= _data);</div><div class='del'>-PROVIDE(__pi___bss_start		= __bss_start);</div><div class='del'>-PROVIDE(__pi__end			= _end);</div><div class='add'>+PI_EXPORT_SYM(id_aa64isar1_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64isar2_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64mmfr0_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64mmfr1_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64mmfr2_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64pfr0_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64pfr1_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64smfr0_override);</div><div class='add'>+PI_EXPORT_SYM(id_aa64zfr0_override);</div><div class='add'>+PI_EXPORT_SYM(arm64_sw_feature_override);</div><div class='add'>+PI_EXPORT_SYM(arm64_use_ng_mappings);</div><div class='add'>+PI_EXPORT_SYM(_ctype);</div><div class='add'>+</div><div class='add'>+PI_EXPORT_SYM(swapper_pg_dir);</div><div class='add'>+</div><div class='add'>+PI_EXPORT_SYM(_text);</div><div class='add'>+PI_EXPORT_SYM(_stext);</div><div class='add'>+PI_EXPORT_SYM(_etext);</div><div class='add'>+PI_EXPORT_SYM(__start_rodata);</div><div class='add'>+PI_EXPORT_SYM(__inittext_begin);</div><div class='add'>+PI_EXPORT_SYM(__inittext_end);</div><div class='add'>+PI_EXPORT_SYM(__initdata_begin);</div><div class='add'>+PI_EXPORT_SYM(__initdata_end);</div><div class='add'>+PI_EXPORT_SYM(_data);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +126,8 @@ KVM_NVHE_ALIAS(__hyp_text_start);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_text_end);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_bss_start);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_bss_end);</div><div class='add'>+KVM_NVHE_ALIAS(__hyp_data_start);</div><div class='add'>+KVM_NVHE_ALIAS(__hyp_data_end);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_rodata_start);</div><div class='ctx'> KVM_NVHE_ALIAS(__hyp_rodata_end);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/kaslr.c b/arch/arm64/kernel/kaslr.c<br/>index 1da3e25f9d9e..c9503ed45a6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/kaslr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/kaslr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/kaslr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/kaslr.c</a></div><div class='hunk'>@@ -10,8 +10,6 @@</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/memory.h&gt;</div><div class='ctx'> </div><div class='del'>-u16 __initdata memstart_offset_seed;</div><div class='del'>-</div><div class='ctx'> bool __ro_after_init __kaslr_is_enabled = false;</div><div class='ctx'> </div><div class='ctx'> void __init kaslr_init(void)</div><div class='head'>diff --git a/arch/arm64/kernel/pi/kaslr_early.c b/arch/arm64/kernel/pi/kaslr_early.c<br/>index 0257b43819db..e0e018046a46 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/kaslr_early.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/pi/kaslr_early.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/kaslr_early.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/pi/kaslr_early.c</a></div><div class='hunk'>@@ -18,8 +18,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "pi.h"</div><div class='ctx'> </div><div class='del'>-extern u16 memstart_offset_seed;</div><div class='del'>-</div><div class='ctx'> static u64 __init get_kaslr_seed(void *fdt, int node)</div><div class='ctx'> {</div><div class='ctx'> 	static char const seed_str[] __initconst = "kaslr-seed";</div><div class='hunk'>@@ -53,8 +51,6 @@ u64 __init kaslr_early_init(void *fdt, int chosen)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memstart_offset_seed = seed &amp; U16_MAX;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * OK, so we are proceeding with KASLR enabled. Calculate a suitable</div><div class='ctx'> 	 * kernel image offset from the seed. Let's place the kernel in the</div><div class='head'>diff --git a/arch/arm64/kernel/pi/map_kernel.c b/arch/arm64/kernel/pi/map_kernel.c<br/>index e57b043f324b..c6650cfe706c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/map_kernel.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/pi/map_kernel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/map_kernel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/pi/map_kernel.c</a></div><div class='hunk'>@@ -207,6 +207,29 @@ static void __init map_fdt(u64 fdt)</div><div class='ctx'> 	dsb(ishst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * PI version of the Cavium Eratum 27456 detection, which makes it</div><div class='add'>+ * impossible to use non-global mappings.</div><div class='add'>+ */</div><div class='add'>+static bool __init ng_mappings_allowed(void)</div><div class='add'>+{</div><div class='add'>+	static const struct midr_range cavium_erratum_27456_cpus[] __initconst = {</div><div class='add'>+		/* Cavium ThunderX, T88 pass 1.x - 2.1 */</div><div class='add'>+		MIDR_RANGE(MIDR_THUNDERX, 0, 0, 1, 1),</div><div class='add'>+		/* Cavium ThunderX, T81 pass 1.0 */</div><div class='add'>+		MIDR_REV(MIDR_THUNDERX_81XX, 0, 0),</div><div class='add'>+		{},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (const struct midr_range *r = cavium_erratum_27456_cpus; r-&gt;model; r++) {</div><div class='add'>+		if (midr_is_cpu_model_range(read_cpuid_id(), r-&gt;model,</div><div class='add'>+					    r-&gt;rv_min, r-&gt;rv_max))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> asmlinkage void __init early_map_kernel(u64 boot_status, void *fdt)</div><div class='ctx'> {</div><div class='ctx'> 	static char const chosen_str[] __initconst = "/chosen";</div><div class='hunk'>@@ -246,7 +269,7 @@ asmlinkage void __init early_map_kernel(u64 boot_status, void *fdt)</div><div class='ctx'> 		u64 kaslr_seed = kaslr_early_init(fdt, chosen);</div><div class='ctx'> </div><div class='ctx'> 		if (kaslr_seed &amp;&amp; kaslr_requires_kpti())</div><div class='del'>-			arm64_use_ng_mappings = true;</div><div class='add'>+			arm64_use_ng_mappings = ng_mappings_allowed();</div><div class='ctx'> </div><div class='ctx'> 		kaslr_offset |= kaslr_seed &amp; ~(MIN_KIMG_ALIGN - 1);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kernel/pi/pi.h b/arch/arm64/kernel/pi/pi.h<br/>index c91e5e965cd3..1f4731a4e17e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/pi.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/pi/pi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/pi/pi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/pi/pi.h</a></div><div class='hunk'>@@ -22,6 +22,7 @@ static inline void *prel64_to_pointer(const prel64_t *offset)</div><div class='ctx'> extern bool dynamic_scs_is_enabled;</div><div class='ctx'> </div><div class='ctx'> extern pgd_t init_idmap_pg_dir[], init_idmap_pg_end[];</div><div class='add'>+extern pgd_t init_pg_dir[], init_pg_end[];</div><div class='ctx'> </div><div class='ctx'> void init_feature_override(u64 boot_status, const void *fdt, int chosen);</div><div class='ctx'> u64 kaslr_early_init(void *fdt, int chosen);</div><div class='head'>diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c<br/>index 42faebb7b712..a5ca15daeb8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/process.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/process.c</a></div><div class='hunk'>@@ -344,50 +344,34 @@ void arch_release_task_struct(struct task_struct *tsk)</div><div class='ctx'> </div><div class='ctx'> int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='del'>-	if (current-&gt;mm)</div><div class='del'>-		fpsimd_preserve_current_state();</div><div class='add'>+	/*</div><div class='add'>+	 * The current/src task's FPSIMD state may or may not be live, and may</div><div class='add'>+	 * have been altered by ptrace after entry to the kernel. Save the</div><div class='add'>+	 * effective FPSIMD state so that this will be copied into dst.</div><div class='add'>+	 */</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='add'>+	fpsimd_sync_from_effective_state(src);</div><div class='add'>+</div><div class='ctx'> 	*dst = *src;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Detach src's sve_state (if any) from dst so that it does not</div><div class='del'>-	 * get erroneously used or freed prematurely.  dst's copies</div><div class='del'>-	 * will be allocated on demand later on if dst uses SVE.</div><div class='del'>-	 * For consistency, also clear TIF_SVE here: this could be done</div><div class='del'>-	 * later in copy_process(), but to avoid tripping up future</div><div class='del'>-	 * maintainers it is best not to leave TIF flags and buffers in</div><div class='del'>-	 * an inconsistent state, even temporarily.</div><div class='add'>+	 * Drop stale reference to src's sve_state and convert dst to</div><div class='add'>+	 * non-streaming FPSIMD mode.</div><div class='ctx'> 	 */</div><div class='add'>+	dst-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> 	dst-&gt;thread.sve_state = NULL;</div><div class='ctx'> 	clear_tsk_thread_flag(dst, TIF_SVE);</div><div class='add'>+	task_smstop_sm(dst);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * In the unlikely event that we create a new thread with ZA</div><div class='del'>-	 * enabled we should retain the ZA and ZT state so duplicate</div><div class='del'>-	 * it here.  This may be shortly freed if we exec() or if</div><div class='del'>-	 * CLONE_SETTLS but it's simpler to do it here. To avoid</div><div class='del'>-	 * confusing the rest of the code ensure that we have a</div><div class='del'>-	 * sve_state allocated whenever sme_state is allocated.</div><div class='add'>+	 * Drop stale reference to src's sme_state and ensure dst has ZA</div><div class='add'>+	 * disabled.</div><div class='add'>+	 *</div><div class='add'>+	 * When necessary, ZA will be inherited later in copy_thread_za().</div><div class='ctx'> 	 */</div><div class='del'>-	if (thread_za_enabled(&amp;src-&gt;thread)) {</div><div class='del'>-		dst-&gt;thread.sve_state = kzalloc(sve_state_size(src),</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-		if (!dst-&gt;thread.sve_state)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-</div><div class='del'>-		dst-&gt;thread.sme_state = kmemdup(src-&gt;thread.sme_state,</div><div class='del'>-						sme_state_size(src),</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-		if (!dst-&gt;thread.sme_state) {</div><div class='del'>-			kfree(dst-&gt;thread.sve_state);</div><div class='del'>-			dst-&gt;thread.sve_state = NULL;</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		dst-&gt;thread.sme_state = NULL;</div><div class='del'>-		clear_tsk_thread_flag(dst, TIF_SME);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dst-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='add'>+	dst-&gt;thread.sme_state = NULL;</div><div class='add'>+	clear_tsk_thread_flag(dst, TIF_SME);</div><div class='add'>+	dst-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* clear any pending asynchronous tag fault raised by the parent */</div><div class='ctx'> 	clear_tsk_thread_flag(dst, TIF_MTE_ASYNC_FAULT);</div><div class='hunk'>@@ -395,6 +379,31 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int copy_thread_za(struct task_struct *dst, struct task_struct *src)</div><div class='add'>+{</div><div class='add'>+	if (!thread_za_enabled(&amp;src-&gt;thread))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dst-&gt;thread.sve_state = kzalloc(sve_state_size(src),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!dst-&gt;thread.sve_state)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dst-&gt;thread.sme_state = kmemdup(src-&gt;thread.sme_state,</div><div class='add'>+					sme_state_size(src),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!dst-&gt;thread.sme_state) {</div><div class='add'>+		kfree(dst-&gt;thread.sve_state);</div><div class='add'>+		dst-&gt;thread.sve_state = NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_tsk_thread_flag(dst, TIF_SME);</div><div class='add'>+	dst-&gt;thread.svcr |= SVCR_ZA_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> asmlinkage void ret_from_fork(void) asm("ret_from_fork");</div><div class='ctx'> </div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='hunk'>@@ -427,8 +436,6 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		 * out-of-sync with the saved value.</div><div class='ctx'> 		 */</div><div class='ctx'> 		*task_user_tls(p) = read_sysreg(tpidr_el0);</div><div class='del'>-		if (system_supports_tpidr2())</div><div class='del'>-			p-&gt;thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='ctx'> </div><div class='ctx'> 		if (system_supports_poe())</div><div class='ctx'> 			p-&gt;thread.por_el0 = read_sysreg_s(SYS_POR_EL0);</div><div class='hunk'>@@ -441,13 +448,39 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='add'>+		 * Due to the AAPCS64 "ZA lazy saving scheme", PSTATE.ZA and</div><div class='add'>+		 * TPIDR2 need to be manipulated as a pair, and either both</div><div class='add'>+		 * need to be inherited or both need to be reset.</div><div class='add'>+		 *</div><div class='add'>+		 * Within a process, child threads must not inherit their</div><div class='add'>+		 * parent's TPIDR2 value or they may clobber their parent's</div><div class='add'>+		 * stack at some later point.</div><div class='add'>+		 *</div><div class='add'>+		 * When a process is fork()'d, the child must inherit ZA and</div><div class='add'>+		 * TPIDR2 from its parent in case there was dormant ZA state.</div><div class='add'>+		 *</div><div class='add'>+		 * Use CLONE_VM to determine when the child will share the</div><div class='add'>+		 * address space with the parent, and cannot safely inherit the</div><div class='add'>+		 * state.</div><div class='add'>+		 */</div><div class='add'>+		if (system_supports_sme()) {</div><div class='add'>+			if (!(clone_flags &amp; CLONE_VM)) {</div><div class='add'>+				p-&gt;thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='add'>+				ret = copy_thread_za(p, current);</div><div class='add'>+				if (ret)</div><div class='add'>+					return ret;</div><div class='add'>+			} else {</div><div class='add'>+				p-&gt;thread.tpidr2_el0 = 0;</div><div class='add'>+				WARN_ON_ONCE(p-&gt;thread.svcr &amp; SVCR_ZA_MASK);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='ctx'> 		 * If a TLS pointer was passed to clone, use it for the new</div><div class='del'>-		 * thread.  We also reset TPIDR2 if it's in use.</div><div class='add'>+		 * thread.</div><div class='ctx'> 		 */</div><div class='del'>-		if (clone_flags &amp; CLONE_SETTLS) {</div><div class='add'>+		if (clone_flags &amp; CLONE_SETTLS)</div><div class='ctx'> 			p-&gt;thread.uw.tp_value = tls;</div><div class='del'>-			p-&gt;thread.tpidr2_el0 = 0;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		ret = copy_thread_gcs(p, args);</div><div class='ctx'> 		if (ret != 0)</div><div class='hunk'>@@ -680,10 +713,11 @@ struct task_struct *__switch_to(struct task_struct *prev,</div><div class='ctx'> 	gcs_thread_switch(next);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Complete any pending TLB or cache maintenance on this CPU in case</div><div class='del'>-	 * the thread migrates to a different CPU.</div><div class='del'>-	 * This full barrier is also required by the membarrier system</div><div class='del'>-	 * call.</div><div class='add'>+	 * Complete any pending TLB or cache maintenance on this CPU in case the</div><div class='add'>+	 * thread migrates to a different CPU. This full barrier is also</div><div class='add'>+	 * required by the membarrier system call. Additionally it makes any</div><div class='add'>+	 * in-progress pgtable writes visible to the table walker; See</div><div class='add'>+	 * emit_pte_barriers().</div><div class='ctx'> 	 */</div><div class='ctx'> 	dsb(ish);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c<br/>index b198dde79e59..edf1783ffc81 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/proton-pack.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/proton-pack.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/proton-pack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/proton-pack.c</a></div><div class='hunk'>@@ -879,16 +879,19 @@ static u8 spectre_bhb_loop_affected(void)</div><div class='ctx'> 	static const struct midr_range spectre_bhb_k132_list[] = {</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),</div><div class='add'>+		{},</div><div class='ctx'> 	};</div><div class='ctx'> 	static const struct midr_range spectre_bhb_k38_list[] = {</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),</div><div class='add'>+		{},</div><div class='ctx'> 	};</div><div class='ctx'> 	static const struct midr_range spectre_bhb_k32_list[] = {</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),</div><div class='add'>+		MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),</div><div class='ctx'> 		MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),</div><div class='hunk'>@@ -997,6 +1000,11 @@ bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u8 get_spectre_bhb_loop_value(void)</div><div class='add'>+{</div><div class='add'>+	return max_bhb_k;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void this_cpu_set_vectors(enum arm64_bp_harden_el1_vectors slot)</div><div class='ctx'> {</div><div class='ctx'> 	const char *v = arm64_get_bp_hardening_vector(slot);</div><div class='hunk'>@@ -1014,7 +1022,7 @@ static void this_cpu_set_vectors(enum arm64_bp_harden_el1_vectors slot)</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool __read_mostly __nospectre_bhb;</div><div class='add'>+bool __read_mostly __nospectre_bhb;</div><div class='ctx'> static int __init parse_spectre_bhb_param(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	__nospectre_bhb = true;</div><div class='hunk'>@@ -1092,6 +1100,11 @@ void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *entry)</div><div class='ctx'> 	update_mitigation_state(&amp;spectre_bhb_state, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool is_spectre_bhb_fw_mitigated(void)</div><div class='add'>+{</div><div class='add'>+	return test_bit(BHB_FW, &amp;system_bhb_mitigations);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Patched to NOP when enabled */</div><div class='ctx'> void noinstr spectre_bhb_patch_loop_mitigation_enable(struct alt_instr *alt,</div><div class='ctx'> 						     __le32 *origptr,</div><div class='head'>diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c<br/>index f79b0d5f71ac..a360e52db02f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/ptrace.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/ptrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/ptrace.c</a></div><div class='hunk'>@@ -594,7 +594,7 @@ static int __fpr_get(struct task_struct *target,</div><div class='ctx'> {</div><div class='ctx'> 	struct user_fpsimd_state *uregs;</div><div class='ctx'> </div><div class='del'>-	sve_sync_to_fpsimd(target);</div><div class='add'>+	fpsimd_sync_from_effective_state(target);</div><div class='ctx'> </div><div class='ctx'> 	uregs = &amp;target-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> </div><div class='hunk'>@@ -626,7 +626,7 @@ static int __fpr_set(struct task_struct *target,</div><div class='ctx'> 	 * Ensure target-&gt;thread.uw.fpsimd_state is up to date, so that a</div><div class='ctx'> 	 * short copyin can't resurrect stale data.</div><div class='ctx'> 	 */</div><div class='del'>-	sve_sync_to_fpsimd(target);</div><div class='add'>+	fpsimd_sync_from_effective_state(target);</div><div class='ctx'> </div><div class='ctx'> 	newstate = target-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> </div><div class='hunk'>@@ -653,7 +653,7 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	sve_sync_from_fpsimd_zeropad(target);</div><div class='add'>+	fpsimd_sync_to_effective_state_zeropad(target);</div><div class='ctx'> 	fpsimd_flush_task_state(target);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -775,6 +775,11 @@ static void sve_init_header_from_task(struct user_sve_header *header,</div><div class='ctx'> 		task_type = ARM64_VEC_SVE;</div><div class='ctx'> 	active = (task_type == type);</div><div class='ctx'> </div><div class='add'>+	if (active &amp;&amp; target-&gt;thread.fp_type == FP_STATE_SVE)</div><div class='add'>+		header-&gt;flags = SVE_PT_REGS_SVE;</div><div class='add'>+	else</div><div class='add'>+		header-&gt;flags = SVE_PT_REGS_FPSIMD;</div><div class='add'>+</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case ARM64_VEC_SVE:</div><div class='ctx'> 		if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))</div><div class='hunk'>@@ -789,19 +794,14 @@ static void sve_init_header_from_task(struct user_sve_header *header,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (active) {</div><div class='del'>-		if (target-&gt;thread.fp_type == FP_STATE_FPSIMD) {</div><div class='del'>-			header-&gt;flags |= SVE_PT_REGS_FPSIMD;</div><div class='del'>-		} else {</div><div class='del'>-			header-&gt;flags |= SVE_PT_REGS_SVE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	header-&gt;vl = task_get_vl(target, type);</div><div class='ctx'> 	vq = sve_vq_from_vl(header-&gt;vl);</div><div class='ctx'> </div><div class='ctx'> 	header-&gt;max_vl = vec_max_vl(type);</div><div class='del'>-	header-&gt;size = SVE_PT_SIZE(vq, header-&gt;flags);</div><div class='add'>+	if (active)</div><div class='add'>+		header-&gt;size = SVE_PT_SIZE(vq, header-&gt;flags);</div><div class='add'>+	else</div><div class='add'>+		header-&gt;size = sizeof(header);</div><div class='ctx'> 	header-&gt;max_size = SVE_PT_SIZE(sve_vq_from_vl(header-&gt;max_vl),</div><div class='ctx'> 				      SVE_PT_REGS_SVE);</div><div class='ctx'> }</div><div class='hunk'>@@ -820,18 +820,25 @@ static int sve_get_common(struct task_struct *target,</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	unsigned long start, end;</div><div class='ctx'> </div><div class='add'>+	if (target == current)</div><div class='add'>+		fpsimd_preserve_current_state();</div><div class='add'>+</div><div class='ctx'> 	/* Header */</div><div class='ctx'> 	sve_init_header_from_task(&amp;header, target, type);</div><div class='ctx'> 	vq = sve_vq_from_vl(header.vl);</div><div class='ctx'> </div><div class='ctx'> 	membuf_write(&amp;to, &amp;header, sizeof(header));</div><div class='ctx'> </div><div class='del'>-	if (target == current)</div><div class='del'>-		fpsimd_preserve_current_state();</div><div class='del'>-</div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));</div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * When the requested vector type is not active, do not present data</div><div class='add'>+	 * from the other mode to userspace.</div><div class='add'>+	 */</div><div class='add'>+	if (header.size == sizeof(header))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	switch ((header.flags &amp; SVE_PT_REGS_MASK)) {</div><div class='ctx'> 	case SVE_PT_REGS_FPSIMD:</div><div class='ctx'> 		return __fpr_get(target, regset, to);</div><div class='hunk'>@@ -859,7 +866,7 @@ static int sve_get_common(struct task_struct *target,</div><div class='ctx'> 		return membuf_zero(&amp;to, end - start);</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		return 0;</div><div class='add'>+		BUILD_BUG();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -883,6 +890,9 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 	struct user_sve_header header;</div><div class='ctx'> 	unsigned int vq;</div><div class='ctx'> 	unsigned long start, end;</div><div class='add'>+	bool fpsimd;</div><div class='add'>+</div><div class='add'>+	fpsimd_flush_task_state(target);</div><div class='ctx'> </div><div class='ctx'> 	/* Header */</div><div class='ctx'> 	if (count &lt; sizeof(header))</div><div class='hunk'>@@ -890,7 +900,16 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 	ret = user_regset_copyin(&amp;pos, &amp;count, &amp;kbuf, &amp;ubuf, &amp;header,</div><div class='ctx'> 				 0, sizeof(header));</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Streaming SVE data is always stored and presented in SVE format.</div><div class='add'>+	 * Require the user to provide SVE formatted data for consistency, and</div><div class='add'>+	 * to avoid the risk that we configure the task into an invalid state.</div><div class='add'>+	 */</div><div class='add'>+	fpsimd = (header.flags &amp; SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD;</div><div class='add'>+	if (fpsimd &amp;&amp; type == ARM64_VEC_SME)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Apart from SVE_PT_REGS_MASK, all SVE_PT_* flags are consumed by</div><div class='hunk'>@@ -899,7 +918,21 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 	ret = vec_set_vector_length(target, type, header.vl,</div><div class='ctx'> 		((unsigned long)header.flags &amp; ~SVE_PT_REGS_MASK) &lt;&lt; 16);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate SME storage if necessary, preserving any existing ZA/ZT state */</div><div class='add'>+	if (type == ARM64_VEC_SME) {</div><div class='add'>+		sme_alloc(target, false);</div><div class='add'>+		if (!target-&gt;thread.sme_state)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allocate SVE storage if necessary, zeroing any existing SVE state */</div><div class='add'>+	if (!fpsimd) {</div><div class='add'>+		sve_alloc(target, true);</div><div class='add'>+		if (!target-&gt;thread.sve_state)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Actual VL set may be different from what the user asked</div><div class='hunk'>@@ -910,81 +943,47 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> </div><div class='ctx'> 	/* Enter/exit streaming mode */</div><div class='ctx'> 	if (system_supports_sme()) {</div><div class='del'>-		u64 old_svcr = target-&gt;thread.svcr;</div><div class='del'>-</div><div class='ctx'> 		switch (type) {</div><div class='ctx'> 		case ARM64_VEC_SVE:</div><div class='ctx'> 			target-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='add'>+			set_tsk_thread_flag(target, TIF_SVE);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ARM64_VEC_SME:</div><div class='ctx'> 			target-&gt;thread.svcr |= SVCR_SM_MASK;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Disable traps and ensure there is SME storage but</div><div class='del'>-			 * preserve any currently set values in ZA/ZT.</div><div class='del'>-			 */</div><div class='del'>-			sme_alloc(target, false);</div><div class='ctx'> 			set_tsk_thread_flag(target, TIF_SME);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			WARN_ON_ONCE(1);</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto out;</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If we switched then invalidate any existing SVE</div><div class='del'>-		 * state and ensure there's storage.</div><div class='del'>-		 */</div><div class='del'>-		if (target-&gt;thread.svcr != old_svcr)</div><div class='del'>-			sve_alloc(target, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Always zero V regs, FPSR, and FPCR */</div><div class='add'>+	memset(&amp;current-&gt;thread.uw.fpsimd_state, 0,</div><div class='add'>+	       sizeof(current-&gt;thread.uw.fpsimd_state));</div><div class='add'>+</div><div class='ctx'> 	/* Registers: FPSIMD-only case */</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));</div><div class='del'>-	if ((header.flags &amp; SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {</div><div class='del'>-		ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,</div><div class='del'>-				SVE_PT_FPSIMD_OFFSET);</div><div class='add'>+	if (fpsimd) {</div><div class='ctx'> 		clear_tsk_thread_flag(target, TIF_SVE);</div><div class='ctx'> 		target-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		goto out;</div><div class='add'>+		ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,</div><div class='add'>+				SVE_PT_FPSIMD_OFFSET);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Otherwise: no registers or full SVE case.  For backwards</div><div class='del'>-	 * compatibility reasons we treat empty flags as SVE registers.</div><div class='del'>-	 */</div><div class='add'>+	/* Otherwise: no registers or full SVE case. */</div><div class='add'>+</div><div class='add'>+	target-&gt;thread.fp_type = FP_STATE_SVE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If setting a different VL from the requested VL and there is</div><div class='ctx'> 	 * register data, the data layout will be wrong: don't even</div><div class='ctx'> 	 * try to set the registers in this case.</div><div class='ctx'> 	 */</div><div class='del'>-	if (count &amp;&amp; vq != sve_vq_from_vl(header.vl)) {</div><div class='del'>-		ret = -EIO;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sve_alloc(target, true);</div><div class='del'>-	if (!target-&gt;thread.sve_state) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		clear_tsk_thread_flag(target, TIF_SVE);</div><div class='del'>-		target-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure target-&gt;thread.sve_state is up to date with target's</div><div class='del'>-	 * FPSIMD regs, so that a short copyin leaves trailing</div><div class='del'>-	 * registers unmodified.  Only enable SVE if we are</div><div class='del'>-	 * configuring normal SVE, a system with streaming SVE may not</div><div class='del'>-	 * have normal SVE.</div><div class='del'>-	 */</div><div class='del'>-	fpsimd_sync_to_sve(target);</div><div class='del'>-	if (type == ARM64_VEC_SVE)</div><div class='del'>-		set_tsk_thread_flag(target, TIF_SVE);</div><div class='del'>-	target-&gt;thread.fp_type = FP_STATE_SVE;</div><div class='add'>+	if (count &amp;&amp; vq != sve_vq_from_vl(header.vl))</div><div class='add'>+		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));</div><div class='ctx'> 	start = SVE_PT_SVE_OFFSET;</div><div class='hunk'>@@ -993,7 +992,7 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 				 target-&gt;thread.sve_state,</div><div class='ctx'> 				 start, end);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	start = end;</div><div class='ctx'> 	end = SVE_PT_SVE_FPSR_OFFSET(vq);</div><div class='hunk'>@@ -1009,8 +1008,6 @@ static int sve_set_common(struct task_struct *target,</div><div class='ctx'> 				 &amp;target-&gt;thread.uw.fpsimd_state.fpsr,</div><div class='ctx'> 				 start, end);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	fpsimd_flush_task_state(target);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c<br/>index 85104587f849..77c7926a4df6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/setup.c</a></div><div class='hunk'>@@ -169,7 +169,7 @@ static void __init smp_build_mpidr_hash(void)</div><div class='ctx'> </div><div class='ctx'> static void __init setup_machine_fdt(phys_addr_t dt_phys)</div><div class='ctx'> {</div><div class='del'>-	int size;</div><div class='add'>+	int size = 0;</div><div class='ctx'> 	void *dt_virt = fixmap_remap_fdt(dt_phys, &amp;size, PAGE_KERNEL);</div><div class='ctx'> 	const char *name;</div><div class='ctx'> </div><div class='hunk'>@@ -182,10 +182,10 @@ static void __init setup_machine_fdt(phys_addr_t dt_phys)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!early_init_dt_scan(dt_virt, dt_phys)) {</div><div class='ctx'> 		pr_crit("\n"</div><div class='del'>-			"Error: invalid device tree blob at physical address %pa (virtual address 0x%px)\n"</div><div class='del'>-			"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"</div><div class='del'>-			"\nPlease check your bootloader.",</div><div class='del'>-			&amp;dt_phys, dt_virt);</div><div class='add'>+			"Error: invalid device tree blob: PA=%pa, VA=%px, size=%d bytes\n"</div><div class='add'>+			"The dtb must be 8-byte aligned and must not exceed 2 MB in size.\n"</div><div class='add'>+			"\nPlease check your bootloader.\n",</div><div class='add'>+			&amp;dt_phys, dt_virt, size);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Note that in this _really_ early stage we cannot even BUG()</div><div class='head'>diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c<br/>index a7c37afb4ebe..417140cd399b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/signal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/signal.c</a></div><div class='hunk'>@@ -250,6 +250,8 @@ static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)</div><div class='ctx'> 		&amp;current-&gt;thread.uw.fpsimd_state;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	fpsimd_sync_from_effective_state(current);</div><div class='add'>+</div><div class='ctx'> 	/* copy the FP and status/control registers */</div><div class='ctx'> 	err = __copy_to_user(ctx-&gt;vregs, fpsimd-&gt;vregs, sizeof(fpsimd-&gt;vregs));</div><div class='ctx'> 	__put_user_error(fpsimd-&gt;fpsr, &amp;ctx-&gt;fpsr, err);</div><div class='hunk'>@@ -262,37 +264,46 @@ static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)</div><div class='ctx'> 	return err ? -EFAULT : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int restore_fpsimd_context(struct user_ctxs *user)</div><div class='add'>+static int read_fpsimd_context(struct user_fpsimd_state *fpsimd,</div><div class='add'>+			       struct user_ctxs *user)</div><div class='ctx'> {</div><div class='del'>-	struct user_fpsimd_state fpsimd;</div><div class='del'>-	int err = 0;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* check the size information */</div><div class='ctx'> 	if (user-&gt;fpsimd_size != sizeof(struct fpsimd_context))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* copy the FP and status/control registers */</div><div class='del'>-	err = __copy_from_user(fpsimd.vregs, &amp;(user-&gt;fpsimd-&gt;vregs),</div><div class='del'>-			       sizeof(fpsimd.vregs));</div><div class='del'>-	__get_user_error(fpsimd.fpsr, &amp;(user-&gt;fpsimd-&gt;fpsr), err);</div><div class='del'>-	__get_user_error(fpsimd.fpcr, &amp;(user-&gt;fpsimd-&gt;fpcr), err);</div><div class='add'>+	err = __copy_from_user(fpsimd-&gt;vregs, &amp;(user-&gt;fpsimd-&gt;vregs),</div><div class='add'>+			       sizeof(fpsimd-&gt;vregs));</div><div class='add'>+	__get_user_error(fpsimd-&gt;fpsr, &amp;(user-&gt;fpsimd-&gt;fpsr), err);</div><div class='add'>+	__get_user_error(fpsimd-&gt;fpcr, &amp;(user-&gt;fpsimd-&gt;fpcr), err);</div><div class='add'>+</div><div class='add'>+	return err ? -EFAULT : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int restore_fpsimd_context(struct user_ctxs *user)</div><div class='add'>+{</div><div class='add'>+	struct user_fpsimd_state fpsimd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = read_fpsimd_context(&amp;fpsimd, user);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	clear_thread_flag(TIF_SVE);</div><div class='add'>+	current-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='ctx'> 	current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='ctx'> </div><div class='ctx'> 	/* load the hardware registers from the fpsimd_state structure */</div><div class='del'>-	if (!err)</div><div class='del'>-		fpsimd_update_current_state(&amp;fpsimd);</div><div class='del'>-</div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	fpsimd_update_current_state(&amp;fpsimd);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int preserve_fpmr_context(struct fpmr_context __user *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	current-&gt;thread.uw.fpmr = read_sysreg_s(SYS_FPMR);</div><div class='del'>-</div><div class='ctx'> 	__put_user_error(FPMR_MAGIC, &amp;ctx-&gt;head.magic, err);</div><div class='ctx'> 	__put_user_error(sizeof(*ctx), &amp;ctx-&gt;head.size, err);</div><div class='ctx'> 	__put_user_error(current-&gt;thread.uw.fpmr, &amp;ctx-&gt;fpmr, err);</div><div class='hunk'>@@ -310,7 +321,7 @@ static int restore_fpmr_context(struct user_ctxs *user)</div><div class='ctx'> </div><div class='ctx'> 	__get_user_error(fpmr, &amp;user-&gt;fpmr-&gt;fpmr, err);</div><div class='ctx'> 	if (!err)</div><div class='del'>-		write_sysreg_s(fpmr, SYS_FPMR);</div><div class='add'>+		current-&gt;thread.uw.fpmr = fpmr;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -372,11 +383,6 @@ static int preserve_sve_context(struct sve_context __user *ctx)</div><div class='ctx'> 	err |= __copy_to_user(&amp;ctx-&gt;__reserved, reserved, sizeof(reserved));</div><div class='ctx'> </div><div class='ctx'> 	if (vq) {</div><div class='del'>-		/*</div><div class='del'>-		 * This assumes that the SVE state has already been saved to</div><div class='del'>-		 * the task struct by calling the function</div><div class='del'>-		 * fpsimd_signal_preserve_current_state().</div><div class='del'>-		 */</div><div class='ctx'> 		err |= __copy_to_user((char __user *)ctx + SVE_SIG_REGS_OFFSET,</div><div class='ctx'> 				      current-&gt;thread.sve_state,</div><div class='ctx'> 				      SVE_SIG_REGS_SIZE(vq));</div><div class='hunk'>@@ -391,6 +397,7 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 	unsigned int vl, vq;</div><div class='ctx'> 	struct user_fpsimd_state fpsimd;</div><div class='ctx'> 	u16 user_vl, flags;</div><div class='add'>+	bool sm;</div><div class='ctx'> </div><div class='ctx'> 	if (user-&gt;sve_size &lt; sizeof(*user-&gt;sve))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -400,7 +407,8 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (flags &amp; SVE_SIG_FLAG_SM) {</div><div class='add'>+	sm = flags &amp; SVE_SIG_FLAG_SM;</div><div class='add'>+	if (sm) {</div><div class='ctx'> 		if (!system_supports_sme())</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -420,28 +428,23 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 	if (user_vl != vl)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (user-&gt;sve_size == sizeof(*user-&gt;sve)) {</div><div class='del'>-		clear_thread_flag(TIF_SVE);</div><div class='del'>-		current-&gt;thread.svcr &amp;= ~SVCR_SM_MASK;</div><div class='del'>-		current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		goto fpsimd_only;</div><div class='del'>-	}</div><div class='add'>+	/*</div><div class='add'>+	 * Non-streaming SVE state may be preserved without an SVE payload, in</div><div class='add'>+	 * which case the SVE context only has a header with VL==0, and all</div><div class='add'>+	 * state can be restored from the FPSIMD context.</div><div class='add'>+	 *</div><div class='add'>+	 * Streaming SVE state is always preserved with an SVE payload. For</div><div class='add'>+	 * consistency and robustness, reject restoring streaming SVE state</div><div class='add'>+	 * without an SVE payload.</div><div class='add'>+	 */</div><div class='add'>+	if (!sm &amp;&amp; user-&gt;sve_size == sizeof(*user-&gt;sve))</div><div class='add'>+		return restore_fpsimd_context(user);</div><div class='ctx'> </div><div class='ctx'> 	vq = sve_vq_from_vl(vl);</div><div class='ctx'> </div><div class='ctx'> 	if (user-&gt;sve_size &lt; SVE_SIG_CONTEXT_SIZE(vq))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Careful: we are about __copy_from_user() directly into</div><div class='del'>-	 * thread.sve_state with preemption enabled, so protection is</div><div class='del'>-	 * needed to prevent a racing context switch from writing stale</div><div class='del'>-	 * registers back over the new data.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(current);</div><div class='del'>-	/* From now, fpsimd_thread_switch() won't touch thread.sve_state */</div><div class='del'>-</div><div class='ctx'> 	sve_alloc(current, true);</div><div class='ctx'> 	if (!current-&gt;thread.sve_state) {</div><div class='ctx'> 		clear_thread_flag(TIF_SVE);</div><div class='hunk'>@@ -461,19 +464,14 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)</div><div class='ctx'> 		set_thread_flag(TIF_SVE);</div><div class='ctx'> 	current-&gt;thread.fp_type = FP_STATE_SVE;</div><div class='ctx'> </div><div class='del'>-fpsimd_only:</div><div class='del'>-	/* copy the FP and status/control registers */</div><div class='del'>-	/* restore_sigframe() already checked that user-&gt;fpsimd != NULL. */</div><div class='del'>-	err = __copy_from_user(fpsimd.vregs, user-&gt;fpsimd-&gt;vregs,</div><div class='del'>-			       sizeof(fpsimd.vregs));</div><div class='del'>-	__get_user_error(fpsimd.fpsr, &amp;user-&gt;fpsimd-&gt;fpsr, err);</div><div class='del'>-	__get_user_error(fpsimd.fpcr, &amp;user-&gt;fpsimd-&gt;fpcr, err);</div><div class='add'>+	err = read_fpsimd_context(&amp;fpsimd, user);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	/* load the hardware registers from the fpsimd_state structure */</div><div class='del'>-	if (!err)</div><div class='del'>-		fpsimd_update_current_state(&amp;fpsimd);</div><div class='add'>+	/* Merge the FPSIMD registers into the SVE state */</div><div class='add'>+	fpsimd_update_current_state(&amp;fpsimd);</div><div class='ctx'> </div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else /* ! CONFIG_ARM64_SVE */</div><div class='hunk'>@@ -493,13 +491,12 @@ extern int preserve_sve_context(void __user *ctx);</div><div class='ctx'> </div><div class='ctx'> static int preserve_tpidr2_context(struct tpidr2_context __user *ctx)</div><div class='ctx'> {</div><div class='add'>+	u64 tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	current-&gt;thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);</div><div class='del'>-</div><div class='ctx'> 	__put_user_error(TPIDR2_MAGIC, &amp;ctx-&gt;head.magic, err);</div><div class='ctx'> 	__put_user_error(sizeof(*ctx), &amp;ctx-&gt;head.size, err);</div><div class='del'>-	__put_user_error(current-&gt;thread.tpidr2_el0, &amp;ctx-&gt;tpidr2, err);</div><div class='add'>+	__put_user_error(tpidr2_el0, &amp;ctx-&gt;tpidr2, err);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -541,11 +538,6 @@ static int preserve_za_context(struct za_context __user *ctx)</div><div class='ctx'> 	err |= __copy_to_user(&amp;ctx-&gt;__reserved, reserved, sizeof(reserved));</div><div class='ctx'> </div><div class='ctx'> 	if (vq) {</div><div class='del'>-		/*</div><div class='del'>-		 * This assumes that the ZA state has already been saved to</div><div class='del'>-		 * the task struct by calling the function</div><div class='del'>-		 * fpsimd_signal_preserve_current_state().</div><div class='del'>-		 */</div><div class='ctx'> 		err |= __copy_to_user((char __user *)ctx + ZA_SIG_REGS_OFFSET,</div><div class='ctx'> 				      current-&gt;thread.sme_state,</div><div class='ctx'> 				      ZA_SIG_REGS_SIZE(vq));</div><div class='hunk'>@@ -580,16 +572,6 @@ static int restore_za_context(struct user_ctxs *user)</div><div class='ctx'> 	if (user-&gt;za_size &lt; ZA_SIG_CONTEXT_SIZE(vq))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Careful: we are about __copy_from_user() directly into</div><div class='del'>-	 * thread.sme_state with preemption enabled, so protection is</div><div class='del'>-	 * needed to prevent a racing context switch from writing stale</div><div class='del'>-	 * registers back over the new data.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(current);</div><div class='del'>-	/* From now, fpsimd_thread_switch() won't touch thread.sve_state */</div><div class='del'>-</div><div class='ctx'> 	sme_alloc(current, true);</div><div class='ctx'> 	if (!current-&gt;thread.sme_state) {</div><div class='ctx'> 		current-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='hunk'>@@ -627,11 +609,6 @@ static int preserve_zt_context(struct zt_context __user *ctx)</div><div class='ctx'> 	BUILD_BUG_ON(sizeof(ctx-&gt;__reserved) != sizeof(reserved));</div><div class='ctx'> 	err |= __copy_to_user(&amp;ctx-&gt;__reserved, reserved, sizeof(reserved));</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This assumes that the ZT state has already been saved to</div><div class='del'>-	 * the task struct by calling the function</div><div class='del'>-	 * fpsimd_signal_preserve_current_state().</div><div class='del'>-	 */</div><div class='ctx'> 	err |= __copy_to_user((char __user *)ctx + ZT_SIG_REGS_OFFSET,</div><div class='ctx'> 			      thread_zt_state(&amp;current-&gt;thread),</div><div class='ctx'> 			      ZT_SIG_REGS_SIZE(1));</div><div class='hunk'>@@ -657,16 +634,6 @@ static int restore_zt_context(struct user_ctxs *user)</div><div class='ctx'> 	if (nregs != 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Careful: we are about __copy_from_user() directly into</div><div class='del'>-	 * thread.zt_state with preemption enabled, so protection is</div><div class='del'>-	 * needed to prevent a racing context switch from writing stale</div><div class='del'>-	 * registers back over the new data.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	fpsimd_flush_task_state(current);</div><div class='del'>-	/* From now, fpsimd_thread_switch() won't touch ZT in thread state */</div><div class='del'>-</div><div class='ctx'> 	err = __copy_from_user(thread_zt_state(&amp;current-&gt;thread),</div><div class='ctx'> 			       (char __user const *)user-&gt;zt +</div><div class='ctx'> 					ZT_SIG_REGS_OFFSET,</div><div class='hunk'>@@ -1017,6 +984,8 @@ static int restore_sigframe(struct pt_regs *regs,</div><div class='ctx'> 	 */</div><div class='ctx'> 	forget_syscall(regs);</div><div class='ctx'> </div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='add'>+</div><div class='ctx'> 	err |= !valid_user_regs(&amp;regs-&gt;user_regs, current);</div><div class='ctx'> 	if (err == 0)</div><div class='ctx'> 		err = parse_user_sigframe(&amp;user, sf);</div><div class='hunk'>@@ -1507,21 +1476,9 @@ static int setup_return(struct pt_regs *regs, struct ksignal *ksig,</div><div class='ctx'> </div><div class='ctx'> 	/* Signal handlers are invoked with ZA and streaming mode disabled */</div><div class='ctx'> 	if (system_supports_sme()) {</div><div class='del'>-		/*</div><div class='del'>-		 * If we were in streaming mode the saved register</div><div class='del'>-		 * state was SVE but we will exit SM and use the</div><div class='del'>-		 * FPSIMD register state - flush the saved FPSIMD</div><div class='del'>-		 * register state in case it gets loaded.</div><div class='del'>-		 */</div><div class='del'>-		if (current-&gt;thread.svcr &amp; SVCR_SM_MASK) {</div><div class='del'>-			memset(&amp;current-&gt;thread.uw.fpsimd_state, 0,</div><div class='del'>-			       sizeof(current-&gt;thread.uw.fpsimd_state));</div><div class='del'>-			current-&gt;thread.fp_type = FP_STATE_FPSIMD;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		current-&gt;thread.svcr &amp;= ~(SVCR_ZA_MASK |</div><div class='del'>-					  SVCR_SM_MASK);</div><div class='del'>-		sme_smstop();</div><div class='add'>+		task_smstop_sm(current);</div><div class='add'>+		current-&gt;thread.svcr &amp;= ~SVCR_ZA_MASK;</div><div class='add'>+		write_sysreg_s(0, SYS_TPIDR2_EL0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1535,7 +1492,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,</div><div class='ctx'> 	struct user_access_state ua_state;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	fpsimd_signal_preserve_current_state();</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='ctx'> </div><div class='ctx'> 	if (get_sigframe(&amp;user, ksig, regs))</div><div class='ctx'> 		return 1;</div><div class='head'>diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c<br/>index 81e798b6dada..bb3b526ff43f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/signal32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/signal32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/signal32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/signal32.c</a></div><div class='hunk'>@@ -103,7 +103,7 @@ static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame)</div><div class='ctx'> 	 * Note that this also saves V16-31, which aren't visible</div><div class='ctx'> 	 * in AArch32.</div><div class='ctx'> 	 */</div><div class='del'>-	fpsimd_signal_preserve_current_state();</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='ctx'> </div><div class='ctx'> 	/* Place structure header on the stack */</div><div class='ctx'> 	__put_user_error(magic, &amp;frame-&gt;magic, err);</div><div class='hunk'>@@ -169,14 +169,17 @@ static int compat_restore_vfp_context(struct compat_vfp_sigframe __user *frame)</div><div class='ctx'> 	fpsimd.fpsr = fpscr &amp; VFP_FPSCR_STAT_MASK;</div><div class='ctx'> 	fpsimd.fpcr = fpscr &amp; VFP_FPSCR_CTRL_MASK;</div><div class='ctx'> </div><div class='add'>+	if (err)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We don't need to touch the exception register, so</div><div class='ctx'> 	 * reload the hardware state.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!err)</div><div class='del'>-		fpsimd_update_current_state(&amp;fpsimd);</div><div class='add'>+	fpsimd_save_and_flush_current_state();</div><div class='add'>+	current-&gt;thread.uw.fpsimd_state = fpsimd;</div><div class='ctx'> </div><div class='del'>-	return err ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int compat_restore_sigframe(struct pt_regs *regs,</div><div class='head'>diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c<br/>index 529cff825531..9bfa5c944379 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/traps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/traps.c</a></div><div class='hunk'>@@ -1118,7 +1118,7 @@ static struct break_hook kasan_break_hook = {</div><div class='ctx'> #ifdef CONFIG_UBSAN_TRAP</div><div class='ctx'> static int ubsan_handler(struct pt_regs *regs, unsigned long esr)</div><div class='ctx'> {</div><div class='del'>-	die(report_ubsan_failure(regs, esr &amp; UBSAN_BRK_MASK), regs, esr);</div><div class='add'>+	die(report_ubsan_failure(esr &amp; UBSAN_BRK_MASK), regs, esr);</div><div class='ctx'> 	return DBG_HOOK_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1145,7 +1145,7 @@ int __init early_brk64(unsigned long addr, unsigned long esr,</div><div class='ctx'> 		return kasan_handler(regs, esr) != DBG_HOOK_HANDLED;</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_UBSAN_TRAP</div><div class='del'>-	if ((esr_brk_comment(esr) &amp; ~UBSAN_BRK_MASK) == UBSAN_BRK_IMM)</div><div class='add'>+	if (esr_is_ubsan_brk(esr))</div><div class='ctx'> 		return ubsan_handler(regs, esr) != DBG_HOOK_HANDLED;</div><div class='ctx'> #endif</div><div class='ctx'> 	return bug_handler(regs, esr) != DBG_HOOK_HANDLED;</div><div class='head'>diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S<br/>index e73326bd3ff7..ad6133b89e7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kernel/vmlinux.lds.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kernel/vmlinux.lds.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> 	*(__kvm_ex_table)					\</div><div class='ctx'> 	__stop___kvm_ex_table = .;</div><div class='ctx'> </div><div class='del'>-#define HYPERVISOR_DATA_SECTIONS				\</div><div class='add'>+#define HYPERVISOR_RODATA_SECTIONS				\</div><div class='ctx'> 	HYP_SECTION_NAME(.rodata) : {				\</div><div class='ctx'> 		. = ALIGN(PAGE_SIZE);				\</div><div class='ctx'> 		__hyp_rodata_start = .;				\</div><div class='hunk'>@@ -23,6 +23,15 @@</div><div class='ctx'> 		__hyp_rodata_end = .;				\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define HYPERVISOR_DATA_SECTION					\</div><div class='add'>+	HYP_SECTION_NAME(.data) : {				\</div><div class='add'>+		. = ALIGN(PAGE_SIZE);				\</div><div class='add'>+		__hyp_data_start = .;				\</div><div class='add'>+		*(HYP_SECTION_NAME(.data))			\</div><div class='add'>+		. = ALIGN(PAGE_SIZE);				\</div><div class='add'>+		__hyp_data_end = .;				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #define HYPERVISOR_PERCPU_SECTION				\</div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);					\</div><div class='ctx'> 	HYP_SECTION_NAME(.data..percpu) : {			\</div><div class='hunk'>@@ -51,7 +60,8 @@</div><div class='ctx'> #define SBSS_ALIGN			PAGE_SIZE</div><div class='ctx'> #else /* CONFIG_KVM */</div><div class='ctx'> #define HYPERVISOR_EXTABLE</div><div class='del'>-#define HYPERVISOR_DATA_SECTIONS</div><div class='add'>+#define HYPERVISOR_RODATA_SECTIONS</div><div class='add'>+#define HYPERVISOR_DATA_SECTION</div><div class='ctx'> #define HYPERVISOR_PERCPU_SECTION</div><div class='ctx'> #define HYPERVISOR_RELOC_SECTION</div><div class='ctx'> #define SBSS_ALIGN			0</div><div class='hunk'>@@ -190,7 +200,7 @@ SECTIONS</div><div class='ctx'> 	/* everything from this point to __init_begin will be marked RO NX */</div><div class='ctx'> 	RO_DATA(PAGE_SIZE)</div><div class='ctx'> </div><div class='del'>-	HYPERVISOR_DATA_SECTIONS</div><div class='add'>+	HYPERVISOR_RODATA_SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	.got : { *(.got) }</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -249,9 +259,9 @@ SECTIONS</div><div class='ctx'> 	__inittext_end = .;</div><div class='ctx'> 	__initdata_begin = .;</div><div class='ctx'> </div><div class='del'>-	init_idmap_pg_dir = .;</div><div class='add'>+	__pi_init_idmap_pg_dir = .;</div><div class='ctx'> 	. += INIT_IDMAP_DIR_SIZE;</div><div class='del'>-	init_idmap_pg_end = .;</div><div class='add'>+	__pi_init_idmap_pg_end = .;</div><div class='ctx'> </div><div class='ctx'> 	.init.data : {</div><div class='ctx'> 		INIT_DATA</div><div class='hunk'>@@ -295,6 +305,8 @@ SECTIONS</div><div class='ctx'> 	_sdata = .;</div><div class='ctx'> 	RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_ALIGN)</div><div class='ctx'> </div><div class='add'>+	HYPERVISOR_DATA_SECTION</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Data written with the MMU off but read with the MMU on requires</div><div class='ctx'> 	 * cache lines to be invalidated, discarding up to a Cache Writeback</div><div class='hunk'>@@ -319,11 +331,12 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	/* start of zero-init region */</div><div class='ctx'> 	BSS_SECTION(SBSS_ALIGN, 0, 0)</div><div class='add'>+	__pi___bss_start = __bss_start;</div><div class='ctx'> </div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);</div><div class='del'>-	init_pg_dir = .;</div><div class='add'>+	__pi_init_pg_dir = .;</div><div class='ctx'> 	. += INIT_DIR_SIZE;</div><div class='del'>-	init_pg_end = .;</div><div class='add'>+	__pi_init_pg_end = .;</div><div class='ctx'> 	/* end of zero-init region */</div><div class='ctx'> </div><div class='ctx'> 	. += SZ_4K;		/* stack for the early C runtime */</div><div class='hunk'>@@ -332,6 +345,7 @@ SECTIONS</div><div class='ctx'> 	. = ALIGN(SEGMENT_ALIGN);</div><div class='ctx'> 	__pecoff_data_size = ABSOLUTE(. - __initdata_begin);</div><div class='ctx'> 	_end = .;</div><div class='add'>+	__pi__end = .;</div><div class='ctx'> </div><div class='ctx'> 	STABS_DEBUG</div><div class='ctx'> 	DWARF_DEBUG</div><div class='head'>diff --git a/arch/arm64/kvm/Makefile b/arch/arm64/kvm/Makefile<br/>index 209bc76263f1..7c329e01c557 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/Makefile</a></div><div class='hunk'>@@ -14,7 +14,7 @@ CFLAGS_sys_regs.o += -Wno-override-init</div><div class='ctx'> CFLAGS_handle_exit.o += -Wno-override-init</div><div class='ctx'> </div><div class='ctx'> kvm-y += arm.o mmu.o mmio.o psci.o hypercalls.o pvtime.o \</div><div class='del'>-	 inject_fault.o va_layout.o handle_exit.o \</div><div class='add'>+	 inject_fault.o va_layout.o handle_exit.o config.o \</div><div class='ctx'> 	 guest.o debug.o reset.o sys_regs.o stacktrace.o \</div><div class='ctx'> 	 vgic-sys-reg-v3.o fpsimd.o pkvm.o \</div><div class='ctx'> 	 arch_timer.o trng.o vmid.o emulate-nested.o nested.o at.o \</div><div class='head'>diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c<br/>index 68fec8c95fee..36cfcffb40d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/arm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/arm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/arm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/arm.c</a></div><div class='hunk'>@@ -368,6 +368,12 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	case KVM_CAP_ARM_EL1_32BIT:</div><div class='ctx'> 		r = cpus_have_final_cap(ARM64_HAS_32BIT_EL1);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_CAP_ARM_EL2:</div><div class='add'>+		r = cpus_have_final_cap(ARM64_HAS_NESTED_VIRT);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_CAP_ARM_EL2_E2H0:</div><div class='add'>+		r = cpus_have_final_cap(ARM64_HAS_HCR_NV1);</div><div class='add'>+		break;</div><div class='ctx'> 	case KVM_CAP_GUEST_DEBUG_HW_BPS:</div><div class='ctx'> 		r = get_num_brps();</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -843,6 +849,10 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu_has_nv(vcpu)) {</div><div class='add'>+		ret = kvm_vcpu_allocate_vncr_tlb(vcpu);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='ctx'> 		ret = kvm_vgic_vcpu_nv_init(vcpu);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -2450,6 +2460,19 @@ static void kvm_hyp_init_symbols(void)</div><div class='ctx'> 	kvm_nvhe_sym(__icache_flags) = __icache_flags;</div><div class='ctx'> 	kvm_nvhe_sym(kvm_arm_vmid_bits) = kvm_arm_vmid_bits;</div><div class='ctx'> </div><div class='add'>+	/* Propagate the FGT state to the the nVHE side */</div><div class='add'>+	kvm_nvhe_sym(hfgrtr_masks)  = hfgrtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgwtr_masks)  = hfgwtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgitr_masks)  = hfgitr_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgrtr_masks) = hdfgrtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgwtr_masks) = hdfgwtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hafgrtr_masks) = hafgrtr_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgrtr2_masks) = hfgrtr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgwtr2_masks) = hfgwtr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hfgitr2_masks) = hfgitr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgrtr2_masks)= hdfgrtr2_masks;</div><div class='add'>+	kvm_nvhe_sym(hdfgwtr2_masks)= hdfgwtr2_masks;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Flush entire BSS since part of its data containing init symbols is read</div><div class='ctx'> 	 * while the MMU is off.</div><div class='hunk'>@@ -2604,6 +2627,13 @@ static int __init init_hyp_mode(void)</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = create_hyp_mappings(kvm_ksym_ref(__hyp_data_start),</div><div class='add'>+				  kvm_ksym_ref(__hyp_data_end), PAGE_HYP);</div><div class='add'>+	if (err) {</div><div class='add'>+		kvm_err("Cannot map .hyp.data section\n");</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = create_hyp_mappings(kvm_ksym_ref(__hyp_rodata_start),</div><div class='ctx'> 				  kvm_ksym_ref(__hyp_rodata_end), PAGE_HYP_RO);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -2743,11 +2773,6 @@ bool kvm_arch_irqchip_in_kernel(struct kvm *kvm)</div><div class='ctx'> 	return irqchip_in_kernel(kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool kvm_arch_has_irq_bypass(void)</div><div class='del'>-{</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,</div><div class='ctx'> 				      struct irq_bypass_producer *prod)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c<br/>index f74a66ce3064..a25be111cd8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/at.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/at.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/at.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/at.c</a></div><div class='hunk'>@@ -10,61 +10,11 @@</div><div class='ctx'> #include &lt;asm/kvm_hyp.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> </div><div class='del'>-enum trans_regime {</div><div class='del'>-	TR_EL10,</div><div class='del'>-	TR_EL20,</div><div class='del'>-	TR_EL2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct s1_walk_info {</div><div class='del'>-	u64	     		baddr;</div><div class='del'>-	enum trans_regime	regime;</div><div class='del'>-	unsigned int		max_oa_bits;</div><div class='del'>-	unsigned int		pgshift;</div><div class='del'>-	unsigned int		txsz;</div><div class='del'>-	int 	     		sl;</div><div class='del'>-	bool	     		hpd;</div><div class='del'>-	bool			e0poe;</div><div class='del'>-	bool			poe;</div><div class='del'>-	bool			pan;</div><div class='del'>-	bool	     		be;</div><div class='del'>-	bool	     		s2;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct s1_walk_result {</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u64	desc;</div><div class='del'>-			u64	pa;</div><div class='del'>-			s8	level;</div><div class='del'>-			u8	APTable;</div><div class='del'>-			bool	UXNTable;</div><div class='del'>-			bool	PXNTable;</div><div class='del'>-			bool	uwxn;</div><div class='del'>-			bool	uov;</div><div class='del'>-			bool	ur;</div><div class='del'>-			bool	uw;</div><div class='del'>-			bool	ux;</div><div class='del'>-			bool	pwxn;</div><div class='del'>-			bool	pov;</div><div class='del'>-			bool	pr;</div><div class='del'>-			bool	pw;</div><div class='del'>-			bool	px;</div><div class='del'>-		};</div><div class='del'>-		struct {</div><div class='del'>-			u8	fst;</div><div class='del'>-			bool	ptw;</div><div class='del'>-			bool	s2;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-	bool	failed;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void fail_s1_walk(struct s1_walk_result *wr, u8 fst, bool ptw, bool s2)</div><div class='add'>+static void fail_s1_walk(struct s1_walk_result *wr, u8 fst, bool s1ptw)</div><div class='ctx'> {</div><div class='ctx'> 	wr-&gt;fst		= fst;</div><div class='del'>-	wr-&gt;ptw		= ptw;</div><div class='del'>-	wr-&gt;s2		= s2;</div><div class='add'>+	wr-&gt;ptw		= s1ptw;</div><div class='add'>+	wr-&gt;s2		= s1ptw;</div><div class='ctx'> 	wr-&gt;failed	= true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -145,20 +95,15 @@ static void compute_s1poe(struct kvm_vcpu *vcpu, struct s1_walk_info *wi)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='add'>+static int setup_s1_walk(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 			 struct s1_walk_result *wr, u64 va)</div><div class='ctx'> {</div><div class='ctx'> 	u64 hcr, sctlr, tcr, tg, ps, ia_bits, ttbr;</div><div class='ctx'> 	unsigned int stride, x;</div><div class='del'>-	bool va55, tbi, lva, as_el0;</div><div class='add'>+	bool va55, tbi, lva;</div><div class='ctx'> </div><div class='ctx'> 	hcr = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='ctx'> </div><div class='del'>-	wi-&gt;regime = compute_translation_regime(vcpu, op);</div><div class='del'>-	as_el0 = (op == OP_AT_S1E0R || op == OP_AT_S1E0W);</div><div class='del'>-	wi-&gt;pan = (op == OP_AT_S1E1RP || op == OP_AT_S1E1WP) &amp;&amp;</div><div class='del'>-		  (*vcpu_cpsr(vcpu) &amp; PSR_PAN_BIT);</div><div class='del'>-</div><div class='ctx'> 	va55 = va &amp; BIT(55);</div><div class='ctx'> </div><div class='ctx'> 	if (wi-&gt;regime == TR_EL2 &amp;&amp; va55)</div><div class='hunk'>@@ -319,7 +264,7 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='ctx'> </div><div class='ctx'> 	/* R_BNDVG and following statements */</div><div class='ctx'> 	if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR2_EL1, E0PD, IMP) &amp;&amp;</div><div class='del'>-	    as_el0 &amp;&amp; (tcr &amp; (va55 ? TCR_E0PD1 : TCR_E0PD0)))</div><div class='add'>+	    wi-&gt;as_el0 &amp;&amp; (tcr &amp; (va55 ? TCR_E0PD1 : TCR_E0PD0)))</div><div class='ctx'> 		goto transfault_l0;</div><div class='ctx'> </div><div class='ctx'> 	/* AArch64.S1StartLevel() */</div><div class='hunk'>@@ -345,11 +290,11 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, u32 op, struct s1_walk_info *wi,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> addrsz:				/* Address Size Fault level 0 */</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(0), false, false);</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(0), false);</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> transfault_l0:			/* Translation Fault level 0 */</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(0), false, false);</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(0), false);</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -380,13 +325,13 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 			if (ret) {</div><div class='ctx'> 				fail_s1_walk(wr,</div><div class='ctx'> 					     (s2_trans.esr &amp; ~ESR_ELx_FSC_LEVEL) | level,</div><div class='del'>-					     true, true);</div><div class='add'>+					     true);</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (!kvm_s2_trans_readable(&amp;s2_trans)) {</div><div class='ctx'> 				fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(level),</div><div class='del'>-					     true, true);</div><div class='add'>+					     true);</div><div class='ctx'> </div><div class='ctx'> 				return -EPERM;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -396,8 +341,7 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> </div><div class='ctx'> 		ret = kvm_read_guest(vcpu-&gt;kvm, ipa, &amp;desc, sizeof(desc));</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(level),</div><div class='del'>-				     true, false);</div><div class='add'>+			fail_s1_walk(wr, ESR_ELx_FSC_SEA_TTW(level), false);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -457,6 +401,11 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 	if (check_output_size(desc &amp; GENMASK(47, va_bottom), wi))</div><div class='ctx'> 		goto addrsz;</div><div class='ctx'> </div><div class='add'>+	if (!(desc &amp; PTE_AF)) {</div><div class='add'>+		fail_s1_walk(wr, ESR_ELx_FSC_ACCESS_L(level), false);</div><div class='add'>+		return -EACCES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	va_bottom += contiguous_bit_shift(desc, wi, level);</div><div class='ctx'> </div><div class='ctx'> 	wr-&gt;failed = false;</div><div class='hunk'>@@ -465,13 +414,40 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='ctx'> 	wr-&gt;pa = desc &amp; GENMASK(47, va_bottom);</div><div class='ctx'> 	wr-&gt;pa |= va &amp; GENMASK_ULL(va_bottom - 1, 0);</div><div class='ctx'> </div><div class='add'>+	wr-&gt;nG = (wi-&gt;regime != TR_EL2) &amp;&amp; (desc &amp; PTE_NG);</div><div class='add'>+	if (wr-&gt;nG) {</div><div class='add'>+		u64 asid_ttbr, tcr;</div><div class='add'>+</div><div class='add'>+		switch (wi-&gt;regime) {</div><div class='add'>+		case TR_EL10:</div><div class='add'>+			tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);</div><div class='add'>+			asid_ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR1_EL1) :</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR0_EL1));</div><div class='add'>+			break;</div><div class='add'>+		case TR_EL20:</div><div class='add'>+			tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);</div><div class='add'>+			asid_ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR1_EL2) :</div><div class='add'>+				     vcpu_read_sys_reg(vcpu, TTBR0_EL2));</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			BUG();</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wr-&gt;asid = FIELD_GET(TTBR_ASID_MASK, asid_ttbr);</div><div class='add'>+		if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||</div><div class='add'>+		    !(tcr &amp; TCR_ASID16))</div><div class='add'>+			wr-&gt;asid &amp;= GENMASK(7, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> addrsz:</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(level), true, false);</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_ADDRSZ_L(level), false);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> transfault:</div><div class='del'>-	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(level), true, false);</div><div class='add'>+	fail_s1_walk(wr, ESR_ELx_FSC_FAULT_L(level), false);</div><div class='ctx'> 	return -ENOENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -488,7 +464,6 @@ struct mmu_config {</div><div class='ctx'> 	u64	sctlr;</div><div class='ctx'> 	u64	vttbr;</div><div class='ctx'> 	u64	vtcr;</div><div class='del'>-	u64	hcr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void __mmu_config_save(struct mmu_config *config)</div><div class='hunk'>@@ -511,13 +486,10 @@ static void __mmu_config_save(struct mmu_config *config)</div><div class='ctx'> 	config-&gt;sctlr	= read_sysreg_el1(SYS_SCTLR);</div><div class='ctx'> 	config-&gt;vttbr	= read_sysreg(vttbr_el2);</div><div class='ctx'> 	config-&gt;vtcr	= read_sysreg(vtcr_el2);</div><div class='del'>-	config-&gt;hcr	= read_sysreg(hcr_el2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __mmu_config_restore(struct mmu_config *config)</div><div class='ctx'> {</div><div class='del'>-	write_sysreg(config-&gt;hcr,	hcr_el2);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ARM errata 1165522 and 1530923 require TGE to be 1 before</div><div class='ctx'> 	 * we update the guest state.</div><div class='hunk'>@@ -1155,7 +1127,12 @@ static u64 handle_at_slow(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	bool perm_fail = false;</div><div class='ctx'> 	int ret, idx;</div><div class='ctx'> </div><div class='del'>-	ret = setup_s1_walk(vcpu, op, &amp;wi, &amp;wr, vaddr);</div><div class='add'>+	wi.regime = compute_translation_regime(vcpu, op);</div><div class='add'>+	wi.as_el0 = (op == OP_AT_S1E0R || op == OP_AT_S1E0W);</div><div class='add'>+	wi.pan = (op == OP_AT_S1E1RP || op == OP_AT_S1E1WP) &amp;&amp;</div><div class='add'>+		 (*vcpu_cpsr(vcpu) &amp; PSR_PAN_BIT);</div><div class='add'>+</div><div class='add'>+	ret = setup_s1_walk(vcpu, &amp;wi, &amp;wr, vaddr);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto compute_par;</div><div class='ctx'> </div><div class='hunk'>@@ -1198,7 +1175,7 @@ static u64 handle_at_slow(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (perm_fail)</div><div class='del'>-		fail_s1_walk(&amp;wr, ESR_ELx_FSC_PERM_L(wr.level), false, false);</div><div class='add'>+		fail_s1_walk(&amp;wr, ESR_ELx_FSC_PERM_L(wr.level), false);</div><div class='ctx'> </div><div class='ctx'> compute_par:</div><div class='ctx'> 	return compute_par_s1(vcpu, &amp;wr, wi.regime);</div><div class='hunk'>@@ -1210,7 +1187,8 @@ compute_par:</div><div class='ctx'>  * If the translation is unsuccessful, the value may only contain</div><div class='ctx'>  * PAR_EL1.F, and cannot be taken at face value. It isn't an</div><div class='ctx'>  * indication of the translation having failed, only that the fast</div><div class='del'>- * path did not succeed, *unless* it indicates a S1 permission fault.</div><div class='add'>+ * path did not succeed, *unless* it indicates a S1 permission or</div><div class='add'>+ * access fault.</div><div class='ctx'>  */</div><div class='ctx'> static u64 __kvm_at_s1e01_fast(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> {</div><div class='hunk'>@@ -1266,8 +1244,8 @@ static u64 __kvm_at_s1e01_fast(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	__load_stage2(mmu, mmu-&gt;arch);</div><div class='ctx'> </div><div class='ctx'> skip_mmu_switch:</div><div class='del'>-	/* Clear TGE, enable S2 translation, we're rolling */</div><div class='del'>-	write_sysreg((config.hcr &amp; ~HCR_TGE) | HCR_VM,	hcr_el2);</div><div class='add'>+	/* Temporarily switch back to guest context */</div><div class='add'>+	write_sysreg_hcr(vcpu-&gt;arch.hcr_el2);</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='ctx'> 	switch (op) {</div><div class='hunk'>@@ -1299,6 +1277,8 @@ skip_mmu_switch:</div><div class='ctx'> 	if (!fail)</div><div class='ctx'> 		par = read_sysreg_par();</div><div class='ctx'> </div><div class='add'>+	write_sysreg_hcr(HCR_HOST_VHE_FLAGS);</div><div class='add'>+</div><div class='ctx'> 	if (!(vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu)))</div><div class='ctx'> 		__mmu_config_restore(&amp;config);</div><div class='ctx'> </div><div class='hunk'>@@ -1313,19 +1293,29 @@ static bool par_check_s1_perm_fault(u64 par)</div><div class='ctx'> 		 !(par &amp; SYS_PAR_EL1_S));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool par_check_s1_access_fault(u64 par)</div><div class='add'>+{</div><div class='add'>+	u8 fst = FIELD_GET(SYS_PAR_EL1_FST, par);</div><div class='add'>+</div><div class='add'>+	return  ((fst &amp; ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_ACCESS &amp;&amp;</div><div class='add'>+		 !(par &amp; SYS_PAR_EL1_S));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __kvm_at_s1e01(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> {</div><div class='ctx'> 	u64 par = __kvm_at_s1e01_fast(vcpu, op, vaddr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If PAR_EL1 reports that AT failed on a S1 permission fault, we</div><div class='del'>-	 * know for sure that the PTW was able to walk the S1 tables and</div><div class='del'>-	 * there's nothing else to do.</div><div class='add'>+	 * If PAR_EL1 reports that AT failed on a S1 permission or access</div><div class='add'>+	 * fault, we know for sure that the PTW was able to walk the S1</div><div class='add'>+	 * tables and there's nothing else to do.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * If AT failed for any other reason, then we must walk the guest S1</div><div class='ctx'> 	 * to emulate the instruction.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((par &amp; SYS_PAR_EL1_F) &amp;&amp; !par_check_s1_perm_fault(par))</div><div class='add'>+	if ((par &amp; SYS_PAR_EL1_F) &amp;&amp;</div><div class='add'>+	    !par_check_s1_perm_fault(par) &amp;&amp;</div><div class='add'>+	    !par_check_s1_access_fault(par))</div><div class='ctx'> 		par = handle_at_slow(vcpu, op, vaddr);</div><div class='ctx'> </div><div class='ctx'> 	vcpu_write_sys_reg(vcpu, par, PAR_EL1);</div><div class='hunk'>@@ -1350,7 +1340,7 @@ void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 		if (!vcpu_el2_e2h_is_set(vcpu))</div><div class='ctx'> 			val |= HCR_NV | HCR_NV1;</div><div class='ctx'> </div><div class='del'>-		write_sysreg(val, hcr_el2);</div><div class='add'>+		write_sysreg_hcr(val);</div><div class='ctx'> 		isb();</div><div class='ctx'> </div><div class='ctx'> 		par = SYS_PAR_EL1_F;</div><div class='hunk'>@@ -1375,7 +1365,7 @@ void __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 		if (!fail)</div><div class='ctx'> 			par = read_sysreg_par();</div><div class='ctx'> </div><div class='del'>-		write_sysreg(hcr, hcr_el2);</div><div class='add'>+		write_sysreg_hcr(hcr);</div><div class='ctx'> 		isb();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1444,3 +1434,31 @@ void __kvm_at_s12(struct kvm_vcpu *vcpu, u32 op, u64 vaddr)</div><div class='ctx'> 	par = compute_par_s12(vcpu, par, &amp;out);</div><div class='ctx'> 	vcpu_write_sys_reg(vcpu, par, PAR_EL1);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Translate a VA for a given EL in a given translation regime, with</div><div class='add'>+ * or without PAN. This requires wi-&gt;{regime, as_el0, pan} to be</div><div class='add'>+ * set. The rest of the wi and wr should be 0-initialised.</div><div class='add'>+ */</div><div class='add'>+int __kvm_translate_va(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,</div><div class='add'>+		       struct s1_walk_result *wr, u64 va)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = setup_s1_walk(vcpu, wi, wr, va);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (wr-&gt;level == S1_MMU_DISABLED) {</div><div class='add'>+		wr-&gt;ur = wr-&gt;uw = wr-&gt;ux = true;</div><div class='add'>+		wr-&gt;pr = wr-&gt;pw = wr-&gt;px = true;</div><div class='add'>+	} else {</div><div class='add'>+		ret = walk_s1(vcpu, wi, wr, va);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		compute_s1_permissions(vcpu, wi, wr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c<br/>new file mode 100644<br/>index 000000000000..54911a93b001<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/config.c</a></div><div class='hunk'>@@ -0,0 +1,1085 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Google LLC</div><div class='add'>+ * Author: Marc Zyngier &lt;maz@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/sysreg.h&gt;</div><div class='add'>+</div><div class='add'>+struct reg_bits_to_feat_map {</div><div class='add'>+	u64		bits;</div><div class='add'>+</div><div class='add'>+#define	NEVER_FGU	BIT(0)	/* Can trap, but never UNDEF */</div><div class='add'>+#define	CALL_FUNC	BIT(1)	/* Needs to evaluate tons of crap */</div><div class='add'>+#define	FIXED_VALUE	BIT(2)	/* RAZ/WI or RAO/WI in KVM */</div><div class='add'>+	unsigned long	flags;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8	regidx;</div><div class='add'>+			u8	shift;</div><div class='add'>+			u8	width;</div><div class='add'>+			bool	sign;</div><div class='add'>+			s8	lo_lim;</div><div class='add'>+		};</div><div class='add'>+		bool	(*match)(struct kvm *);</div><div class='add'>+		bool	(*fval)(struct kvm *, u64 *);</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define __NEEDS_FEAT_3(m, f, id, fld, lim)		\</div><div class='add'>+	{						\</div><div class='add'>+		.bits	= (m),				\</div><div class='add'>+		.flags = (f),				\</div><div class='add'>+		.regidx	= IDREG_IDX(SYS_ ## id),	\</div><div class='add'>+		.shift	= id ##_## fld ## _SHIFT,	\</div><div class='add'>+		.width	= id ##_## fld ## _WIDTH,	\</div><div class='add'>+		.sign	= id ##_## fld ## _SIGNED,	\</div><div class='add'>+		.lo_lim	= id ##_## fld ##_## lim	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define __NEEDS_FEAT_2(m, f, fun, dummy)		\</div><div class='add'>+	{						\</div><div class='add'>+		.bits	= (m),				\</div><div class='add'>+		.flags = (f) | CALL_FUNC,		\</div><div class='add'>+		.fval = (fun),				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define __NEEDS_FEAT_1(m, f, fun)			\</div><div class='add'>+	{						\</div><div class='add'>+		.bits	= (m),				\</div><div class='add'>+		.flags = (f) | CALL_FUNC,		\</div><div class='add'>+		.match = (fun),				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define NEEDS_FEAT_FLAG(m, f, ...)			\</div><div class='add'>+	CONCATENATE(__NEEDS_FEAT_, COUNT_ARGS(__VA_ARGS__))(m, f, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define NEEDS_FEAT_FIXED(m, ...)			\</div><div class='add'>+	NEEDS_FEAT_FLAG(m, FIXED_VALUE, __VA_ARGS__, 0)</div><div class='add'>+</div><div class='add'>+#define NEEDS_FEAT(m, ...)	NEEDS_FEAT_FLAG(m, 0, __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define FEAT_SPE		ID_AA64DFR0_EL1, PMSVer, IMP</div><div class='add'>+#define FEAT_SPE_FnE		ID_AA64DFR0_EL1, PMSVer, V1P2</div><div class='add'>+#define FEAT_BRBE		ID_AA64DFR0_EL1, BRBE, IMP</div><div class='add'>+#define FEAT_TRC_SR		ID_AA64DFR0_EL1, TraceVer, IMP</div><div class='add'>+#define FEAT_PMUv3		ID_AA64DFR0_EL1, PMUVer, IMP</div><div class='add'>+#define FEAT_PMUv3p9		ID_AA64DFR0_EL1, PMUVer, V3P9</div><div class='add'>+#define FEAT_TRBE		ID_AA64DFR0_EL1, TraceBuffer, IMP</div><div class='add'>+#define FEAT_TRBEv1p1		ID_AA64DFR0_EL1, TraceBuffer, TRBE_V1P1</div><div class='add'>+#define FEAT_DoubleLock		ID_AA64DFR0_EL1, DoubleLock, IMP</div><div class='add'>+#define FEAT_TRF		ID_AA64DFR0_EL1, TraceFilt, IMP</div><div class='add'>+#define FEAT_AA32EL0		ID_AA64PFR0_EL1, EL0, AARCH32</div><div class='add'>+#define FEAT_AA32EL1		ID_AA64PFR0_EL1, EL1, AARCH32</div><div class='add'>+#define FEAT_AA64EL1		ID_AA64PFR0_EL1, EL1, IMP</div><div class='add'>+#define FEAT_AA64EL3		ID_AA64PFR0_EL1, EL3, IMP</div><div class='add'>+#define FEAT_AIE		ID_AA64MMFR3_EL1, AIE, IMP</div><div class='add'>+#define FEAT_S2POE		ID_AA64MMFR3_EL1, S2POE, IMP</div><div class='add'>+#define FEAT_S1POE		ID_AA64MMFR3_EL1, S1POE, IMP</div><div class='add'>+#define FEAT_S1PIE		ID_AA64MMFR3_EL1, S1PIE, IMP</div><div class='add'>+#define FEAT_THE		ID_AA64PFR1_EL1, THE, IMP</div><div class='add'>+#define FEAT_SME		ID_AA64PFR1_EL1, SME, IMP</div><div class='add'>+#define FEAT_GCS		ID_AA64PFR1_EL1, GCS, IMP</div><div class='add'>+#define FEAT_LS64		ID_AA64ISAR1_EL1, LS64, LS64</div><div class='add'>+#define FEAT_LS64_V		ID_AA64ISAR1_EL1, LS64, LS64_V</div><div class='add'>+#define FEAT_LS64_ACCDATA	ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA</div><div class='add'>+#define FEAT_RAS		ID_AA64PFR0_EL1, RAS, IMP</div><div class='add'>+#define FEAT_RASv2		ID_AA64PFR0_EL1, RAS, V2</div><div class='add'>+#define FEAT_GICv3		ID_AA64PFR0_EL1, GIC, IMP</div><div class='add'>+#define FEAT_LOR		ID_AA64MMFR1_EL1, LO, IMP</div><div class='add'>+#define FEAT_SPEv1p4		ID_AA64DFR0_EL1, PMSVer, V1P4</div><div class='add'>+#define FEAT_SPEv1p5		ID_AA64DFR0_EL1, PMSVer, V1P5</div><div class='add'>+#define FEAT_ATS1A		ID_AA64ISAR2_EL1, ATS1A, IMP</div><div class='add'>+#define FEAT_SPECRES2		ID_AA64ISAR1_EL1, SPECRES, COSP_RCTX</div><div class='add'>+#define FEAT_SPECRES		ID_AA64ISAR1_EL1, SPECRES, IMP</div><div class='add'>+#define FEAT_TLBIRANGE		ID_AA64ISAR0_EL1, TLB, RANGE</div><div class='add'>+#define FEAT_TLBIOS		ID_AA64ISAR0_EL1, TLB, OS</div><div class='add'>+#define FEAT_PAN2		ID_AA64MMFR1_EL1, PAN, PAN2</div><div class='add'>+#define FEAT_DPB2		ID_AA64ISAR1_EL1, DPB, DPB2</div><div class='add'>+#define FEAT_AMUv1		ID_AA64PFR0_EL1, AMU, IMP</div><div class='add'>+#define FEAT_AMUv1p1		ID_AA64PFR0_EL1, AMU, V1P1</div><div class='add'>+#define FEAT_CMOW		ID_AA64MMFR1_EL1, CMOW, IMP</div><div class='add'>+#define FEAT_D128		ID_AA64MMFR3_EL1, D128, IMP</div><div class='add'>+#define FEAT_DoubleFault2	ID_AA64PFR1_EL1, DF2, IMP</div><div class='add'>+#define FEAT_FPMR		ID_AA64PFR2_EL1, FPMR, IMP</div><div class='add'>+#define FEAT_MOPS		ID_AA64ISAR2_EL1, MOPS, IMP</div><div class='add'>+#define FEAT_NMI		ID_AA64PFR1_EL1, NMI, IMP</div><div class='add'>+#define FEAT_SCTLR2		ID_AA64MMFR3_EL1, SCTLRX, IMP</div><div class='add'>+#define FEAT_SYSREG128		ID_AA64ISAR2_EL1, SYSREG_128, IMP</div><div class='add'>+#define FEAT_TCR2		ID_AA64MMFR3_EL1, TCRX, IMP</div><div class='add'>+#define FEAT_XS			ID_AA64ISAR1_EL1, XS, IMP</div><div class='add'>+#define FEAT_EVT		ID_AA64MMFR2_EL1, EVT, IMP</div><div class='add'>+#define FEAT_EVT_TTLBxS		ID_AA64MMFR2_EL1, EVT, TTLBxS</div><div class='add'>+#define FEAT_MTE2		ID_AA64PFR1_EL1, MTE, MTE2</div><div class='add'>+#define FEAT_RME		ID_AA64PFR0_EL1, RME, IMP</div><div class='add'>+#define FEAT_MPAM		ID_AA64PFR0_EL1, MPAM, 1</div><div class='add'>+#define FEAT_S2FWB		ID_AA64MMFR2_EL1, FWB, IMP</div><div class='add'>+#define FEAT_TME		ID_AA64ISAR0_EL1, TME, IMP</div><div class='add'>+#define FEAT_TWED		ID_AA64MMFR1_EL1, TWED, IMP</div><div class='add'>+#define FEAT_E2H0		ID_AA64MMFR4_EL1, E2H0, IMP</div><div class='add'>+#define FEAT_SRMASK		ID_AA64MMFR4_EL1, SRMASK, IMP</div><div class='add'>+#define FEAT_PoPS		ID_AA64MMFR4_EL1, PoPS, IMP</div><div class='add'>+#define FEAT_PFAR		ID_AA64PFR1_EL1, PFAR, IMP</div><div class='add'>+#define FEAT_Debugv8p9		ID_AA64DFR0_EL1, PMUVer, V3P9</div><div class='add'>+#define FEAT_PMUv3_SS		ID_AA64DFR0_EL1, PMSS, IMP</div><div class='add'>+#define FEAT_SEBEP		ID_AA64DFR0_EL1, SEBEP, IMP</div><div class='add'>+#define FEAT_EBEP		ID_AA64DFR1_EL1, EBEP, IMP</div><div class='add'>+#define FEAT_ITE		ID_AA64DFR1_EL1, ITE, IMP</div><div class='add'>+#define FEAT_PMUv3_ICNTR	ID_AA64DFR1_EL1, PMICNTR, IMP</div><div class='add'>+#define FEAT_SPMU		ID_AA64DFR1_EL1, SPMU, IMP</div><div class='add'>+#define FEAT_SPE_nVM		ID_AA64DFR2_EL1, SPE_nVM, IMP</div><div class='add'>+#define FEAT_STEP2		ID_AA64DFR2_EL1, STEP, IMP</div><div class='add'>+</div><div class='add'>+static bool not_feat_aa64el3(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return !kvm_has_feat(kvm, FEAT_AA64EL3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_nv2(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return ((kvm_has_feat(kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY) &amp;&amp;</div><div class='add'>+		 kvm_has_feat_enum(kvm, ID_AA64MMFR2_EL1, NV, NI)) ||</div><div class='add'>+		kvm_has_feat(kvm, ID_AA64MMFR2_EL1, NV, NV2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_nv2_e2h0_ni(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return feat_nv2(kvm) &amp;&amp; !kvm_has_feat(kvm, FEAT_E2H0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_rasv1p1(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) ||</div><div class='add'>+		(kvm_has_feat_enum(kvm, ID_AA64PFR0_EL1, RAS, IMP) &amp;&amp;</div><div class='add'>+		 kvm_has_feat(kvm, ID_AA64PFR1_EL1, RAS_frac, RASv1p1)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_csv2_2_csv2_1p2(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm,  ID_AA64PFR0_EL1, CSV2, CSV2_2) ||</div><div class='add'>+		(kvm_has_feat(kvm, ID_AA64PFR1_EL1, CSV2_frac, CSV2_1p2) &amp;&amp;</div><div class='add'>+		 kvm_has_feat_enum(kvm,  ID_AA64PFR0_EL1, CSV2, IMP)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_pauth(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_pauth(kvm, PAuth);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_pauth_lr(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_pauth(kvm, PAuth_LR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_aderr(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ADERR, FEAT_ADERR) &amp;&amp;</div><div class='add'>+		kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SDERR, FEAT_ADERR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_anerr(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return (kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ANERR, FEAT_ANERR) &amp;&amp;</div><div class='add'>+		kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SNERR, FEAT_ANERR));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_sme_smps(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Revists this if KVM ever supports SME -- this really should</div><div class='add'>+	 * look at the guest's view of SMIDR_EL1. Funnily enough, this</div><div class='add'>+	 * is not captured in the JSON file, but only as a note in the</div><div class='add'>+	 * ARM ARM.</div><div class='add'>+	 */</div><div class='add'>+	return (kvm_has_feat(kvm, FEAT_SME) &amp;&amp;</div><div class='add'>+		(read_sysreg_s(SYS_SMIDR_EL1) &amp; SMIDR_EL1_SMPS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_spe_fds(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Revists this if KVM ever supports SPE -- this really should</div><div class='add'>+	 * look at the guest's view of PMSIDR_EL1.</div><div class='add'>+	 */</div><div class='add'>+	return (kvm_has_feat(kvm, FEAT_SPEv1p4) &amp;&amp;</div><div class='add'>+		(read_sysreg_s(SYS_PMSIDR_EL1) &amp; PMSIDR_EL1_FDS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_trbe_mpam(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Revists this if KVM ever supports both MPAM and TRBE --</div><div class='add'>+	 * this really should look at the guest's view of TRBIDR_EL1.</div><div class='add'>+	 */</div><div class='add'>+	return (kvm_has_feat(kvm, FEAT_TRBE) &amp;&amp;</div><div class='add'>+		kvm_has_feat(kvm, FEAT_MPAM) &amp;&amp;</div><div class='add'>+		(read_sysreg_s(SYS_TRBIDR_EL1) &amp; TRBIDR_EL1_MPAM));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool feat_ebep_pmuv3_ss(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm_has_feat(kvm, FEAT_EBEP) || kvm_has_feat(kvm, FEAT_PMUv3_SS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool compute_hcr_rw(struct kvm *kvm, u64 *bits)</div><div class='add'>+{</div><div class='add'>+	/* This is purely academic: AArch32 and NV are mutually exclusive */</div><div class='add'>+	if (bits) {</div><div class='add'>+		if (kvm_has_feat(kvm, FEAT_AA32EL1))</div><div class='add'>+			*bits &amp;= ~HCR_EL2_RW;</div><div class='add'>+		else</div><div class='add'>+			*bits |= HCR_EL2_RW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool compute_hcr_e2h(struct kvm *kvm, u64 *bits)</div><div class='add'>+{</div><div class='add'>+	if (bits) {</div><div class='add'>+		if (kvm_has_feat(kvm, FEAT_E2H0))</div><div class='add'>+			*bits &amp;= ~HCR_EL2_E2H;</div><div class='add'>+		else</div><div class='add'>+			*bits |= HCR_EL2_E2H;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgrtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nAMAIR2_EL1	|</div><div class='add'>+		   HFGRTR_EL2_nMAIR2_EL1,</div><div class='add'>+		   FEAT_AIE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nS2POR_EL1, FEAT_S2POE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nPOR_EL1		|</div><div class='add'>+		   HFGRTR_EL2_nPOR_EL0,</div><div class='add'>+		   FEAT_S1POE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nPIR_EL1		|</div><div class='add'>+		   HFGRTR_EL2_nPIRE0_EL1,</div><div class='add'>+		   FEAT_S1PIE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nRCWMASK_EL1, FEAT_THE),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nTPIDR2_EL0	|</div><div class='add'>+		   HFGRTR_EL2_nSMPRI_EL1,</div><div class='add'>+		   FEAT_SME),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nGCS_EL1		|</div><div class='add'>+		   HFGRTR_EL2_nGCS_EL0,</div><div class='add'>+		   FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_nACCDATA_EL1, FEAT_LS64_ACCDATA),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_ERXADDR_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXMISCn_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXSTATUS_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXCTLR_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXFR_EL1		|</div><div class='add'>+		   HFGRTR_EL2_ERRSELR_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERRIDR_EL1,</div><div class='add'>+		   FEAT_RAS),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_ERXPFGCDN_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXPFGCTL_EL1	|</div><div class='add'>+		   HFGRTR_EL2_ERXPFGF_EL1,</div><div class='add'>+		   feat_rasv1p1),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_ICC_IGRPENn_EL1, FEAT_GICv3),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_SCXTNUM_EL0	|</div><div class='add'>+		   HFGRTR_EL2_SCXTNUM_EL1,</div><div class='add'>+		   feat_csv2_2_csv2_1p2),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_LORSA_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LORN_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LORID_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LOREA_EL1		|</div><div class='add'>+		   HFGRTR_EL2_LORC_EL1,</div><div class='add'>+		   FEAT_LOR),</div><div class='add'>+	NEEDS_FEAT(HFGRTR_EL2_APIBKey		|</div><div class='add'>+		   HFGRTR_EL2_APIAKey		|</div><div class='add'>+		   HFGRTR_EL2_APGAKey		|</div><div class='add'>+		   HFGRTR_EL2_APDBKey		|</div><div class='add'>+		   HFGRTR_EL2_APDAKey,</div><div class='add'>+		   feat_pauth),</div><div class='add'>+	NEEDS_FEAT_FLAG(HFGRTR_EL2_VBAR_EL1	|</div><div class='add'>+			HFGRTR_EL2_TTBR1_EL1	|</div><div class='add'>+			HFGRTR_EL2_TTBR0_EL1	|</div><div class='add'>+			HFGRTR_EL2_TPIDR_EL0	|</div><div class='add'>+			HFGRTR_EL2_TPIDRRO_EL0	|</div><div class='add'>+			HFGRTR_EL2_TPIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_TCR_EL1	|</div><div class='add'>+			HFGRTR_EL2_SCTLR_EL1	|</div><div class='add'>+			HFGRTR_EL2_REVIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_PAR_EL1	|</div><div class='add'>+			HFGRTR_EL2_MPIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_MIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_MAIR_EL1	|</div><div class='add'>+			HFGRTR_EL2_ISR_EL1	|</div><div class='add'>+			HFGRTR_EL2_FAR_EL1	|</div><div class='add'>+			HFGRTR_EL2_ESR_EL1	|</div><div class='add'>+			HFGRTR_EL2_DCZID_EL0	|</div><div class='add'>+			HFGRTR_EL2_CTR_EL0	|</div><div class='add'>+			HFGRTR_EL2_CSSELR_EL1	|</div><div class='add'>+			HFGRTR_EL2_CPACR_EL1	|</div><div class='add'>+			HFGRTR_EL2_CONTEXTIDR_EL1|</div><div class='add'>+			HFGRTR_EL2_CLIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_CCSIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_AMAIR_EL1	|</div><div class='add'>+			HFGRTR_EL2_AIDR_EL1	|</div><div class='add'>+			HFGRTR_EL2_AFSR1_EL1	|</div><div class='add'>+			HFGRTR_EL2_AFSR0_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgwtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nAMAIR2_EL1	|</div><div class='add'>+		   HFGWTR_EL2_nMAIR2_EL1,</div><div class='add'>+		   FEAT_AIE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nS2POR_EL1, FEAT_S2POE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nPOR_EL1		|</div><div class='add'>+		   HFGWTR_EL2_nPOR_EL0,</div><div class='add'>+		   FEAT_S1POE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nPIR_EL1		|</div><div class='add'>+		   HFGWTR_EL2_nPIRE0_EL1,</div><div class='add'>+		   FEAT_S1PIE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nRCWMASK_EL1, FEAT_THE),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nTPIDR2_EL0	|</div><div class='add'>+		   HFGWTR_EL2_nSMPRI_EL1,</div><div class='add'>+		   FEAT_SME),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nGCS_EL1		|</div><div class='add'>+		   HFGWTR_EL2_nGCS_EL0,</div><div class='add'>+		   FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_nACCDATA_EL1, FEAT_LS64_ACCDATA),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_ERXADDR_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXMISCn_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXSTATUS_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXCTLR_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERRSELR_EL1,</div><div class='add'>+		   FEAT_RAS),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_ERXPFGCDN_EL1	|</div><div class='add'>+		   HFGWTR_EL2_ERXPFGCTL_EL1,</div><div class='add'>+		   feat_rasv1p1),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_ICC_IGRPENn_EL1, FEAT_GICv3),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_SCXTNUM_EL0	|</div><div class='add'>+		   HFGWTR_EL2_SCXTNUM_EL1,</div><div class='add'>+		   feat_csv2_2_csv2_1p2),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_LORSA_EL1		|</div><div class='add'>+		   HFGWTR_EL2_LORN_EL1		|</div><div class='add'>+		   HFGWTR_EL2_LOREA_EL1		|</div><div class='add'>+		   HFGWTR_EL2_LORC_EL1,</div><div class='add'>+		   FEAT_LOR),</div><div class='add'>+	NEEDS_FEAT(HFGWTR_EL2_APIBKey		|</div><div class='add'>+		   HFGWTR_EL2_APIAKey		|</div><div class='add'>+		   HFGWTR_EL2_APGAKey		|</div><div class='add'>+		   HFGWTR_EL2_APDBKey		|</div><div class='add'>+		   HFGWTR_EL2_APDAKey,</div><div class='add'>+		   feat_pauth),</div><div class='add'>+	NEEDS_FEAT_FLAG(HFGWTR_EL2_VBAR_EL1	|</div><div class='add'>+			HFGWTR_EL2_TTBR1_EL1	|</div><div class='add'>+			HFGWTR_EL2_TTBR0_EL1	|</div><div class='add'>+			HFGWTR_EL2_TPIDR_EL0	|</div><div class='add'>+			HFGWTR_EL2_TPIDRRO_EL0	|</div><div class='add'>+			HFGWTR_EL2_TPIDR_EL1	|</div><div class='add'>+			HFGWTR_EL2_TCR_EL1	|</div><div class='add'>+			HFGWTR_EL2_SCTLR_EL1	|</div><div class='add'>+			HFGWTR_EL2_PAR_EL1	|</div><div class='add'>+			HFGWTR_EL2_MAIR_EL1	|</div><div class='add'>+			HFGWTR_EL2_FAR_EL1	|</div><div class='add'>+			HFGWTR_EL2_ESR_EL1	|</div><div class='add'>+			HFGWTR_EL2_CSSELR_EL1	|</div><div class='add'>+			HFGWTR_EL2_CPACR_EL1	|</div><div class='add'>+			HFGWTR_EL2_CONTEXTIDR_EL1|</div><div class='add'>+			HFGWTR_EL2_AMAIR_EL1	|</div><div class='add'>+			HFGWTR_EL2_AFSR1_EL1	|</div><div class='add'>+			HFGWTR_EL2_AFSR0_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgrtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_PMBIDR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSLATFR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSIRR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSIDR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSICR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSFCR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSEVFR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSCR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMBSR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMBPTR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMBLIMITR_EL1,</div><div class='add'>+		   FEAT_SPE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_nPMSNEVFR_EL1, FEAT_SPE_FnE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_nBRBDATA		|</div><div class='add'>+		   HDFGRTR_EL2_nBRBCTL		|</div><div class='add'>+		   HDFGRTR_EL2_nBRBIDR,</div><div class='add'>+		   FEAT_BRBE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_TRCVICTLR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCSTATR		|</div><div class='add'>+		   HDFGRTR_EL2_TRCSSCSRn	|</div><div class='add'>+		   HDFGRTR_EL2_TRCSEQSTR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCPRGCTLR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCOSLSR		|</div><div class='add'>+		   HDFGRTR_EL2_TRCIMSPECn	|</div><div class='add'>+		   HDFGRTR_EL2_TRCID		|</div><div class='add'>+		   HDFGRTR_EL2_TRCCNTVRn	|</div><div class='add'>+		   HDFGRTR_EL2_TRCCLAIM		|</div><div class='add'>+		   HDFGRTR_EL2_TRCAUXCTLR	|</div><div class='add'>+		   HDFGRTR_EL2_TRCAUTHSTATUS	|</div><div class='add'>+		   HDFGRTR_EL2_TRC,</div><div class='add'>+		   FEAT_TRC_SR),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_PMCEIDn_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMUSERENR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMMIR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_PMSELR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMOVS		|</div><div class='add'>+		   HDFGRTR_EL2_PMINTEN		|</div><div class='add'>+		   HDFGRTR_EL2_PMCNTEN		|</div><div class='add'>+		   HDFGRTR_EL2_PMCCNTR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMCCFILTR_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMEVTYPERn_EL0	|</div><div class='add'>+		   HDFGRTR_EL2_PMEVCNTRn_EL0,</div><div class='add'>+		   FEAT_PMUv3),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR_EL2_TRBTRG_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBSR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBPTR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBMAR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBLIMITR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBIDR_EL1	|</div><div class='add'>+		   HDFGRTR_EL2_TRBBASER_EL1,</div><div class='add'>+		   FEAT_TRBE),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGRTR_EL2_OSDLR_EL1, NEVER_FGU,</div><div class='add'>+			FEAT_DoubleLock),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGRTR_EL2_OSECCR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_OSLSR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGPRCR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGAUTHSTATUS_EL1|</div><div class='add'>+			HDFGRTR_EL2_DBGCLAIM	|</div><div class='add'>+			HDFGRTR_EL2_MDSCR_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGWVRn_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGWCRn_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGBVRn_EL1	|</div><div class='add'>+			HDFGRTR_EL2_DBGBCRn_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgwtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_PMSLATFR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSIRR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSICR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSFCR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSEVFR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMSCR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMBSR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMBPTR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_PMBLIMITR_EL1,</div><div class='add'>+		   FEAT_SPE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_nPMSNEVFR_EL1, FEAT_SPE_FnE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_nBRBDATA		|</div><div class='add'>+		   HDFGWTR_EL2_nBRBCTL,</div><div class='add'>+		   FEAT_BRBE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_TRCVICTLR	|</div><div class='add'>+		   HDFGWTR_EL2_TRCSSCSRn	|</div><div class='add'>+		   HDFGWTR_EL2_TRCSEQSTR	|</div><div class='add'>+		   HDFGWTR_EL2_TRCPRGCTLR	|</div><div class='add'>+		   HDFGWTR_EL2_TRCOSLAR		|</div><div class='add'>+		   HDFGWTR_EL2_TRCIMSPECn	|</div><div class='add'>+		   HDFGWTR_EL2_TRCCNTVRn	|</div><div class='add'>+		   HDFGWTR_EL2_TRCCLAIM		|</div><div class='add'>+		   HDFGWTR_EL2_TRCAUXCTLR	|</div><div class='add'>+		   HDFGWTR_EL2_TRC,</div><div class='add'>+		   FEAT_TRC_SR),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_PMUSERENR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMCR_EL0		|</div><div class='add'>+		   HDFGWTR_EL2_PMSWINC_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMSELR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMOVS		|</div><div class='add'>+		   HDFGWTR_EL2_PMINTEN		|</div><div class='add'>+		   HDFGWTR_EL2_PMCNTEN		|</div><div class='add'>+		   HDFGWTR_EL2_PMCCNTR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMCCFILTR_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMEVTYPERn_EL0	|</div><div class='add'>+		   HDFGWTR_EL2_PMEVCNTRn_EL0,</div><div class='add'>+		   FEAT_PMUv3),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_TRBTRG_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBSR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBPTR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBMAR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBLIMITR_EL1	|</div><div class='add'>+		   HDFGWTR_EL2_TRBBASER_EL1,</div><div class='add'>+		   FEAT_TRBE),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGWTR_EL2_OSDLR_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_DoubleLock),</div><div class='add'>+	NEEDS_FEAT_FLAG(HDFGWTR_EL2_OSECCR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_OSLAR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGPRCR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGCLAIM	|</div><div class='add'>+			HDFGWTR_EL2_MDSCR_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGWVRn_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGWCRn_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGBVRn_EL1	|</div><div class='add'>+			HDFGWTR_EL2_DBGBCRn_EL1,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR_EL2_TRFCR_EL1, FEAT_TRF),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgitr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_PSBCSYNC, FEAT_SPEv1p5),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_ATS1E1A, FEAT_ATS1A),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_COSPRCTX, FEAT_SPECRES2),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_nGCSEPP		|</div><div class='add'>+		   HFGITR_EL2_nGCSSTR_EL1	|</div><div class='add'>+		   HFGITR_EL2_nGCSPUSHM_EL1,</div><div class='add'>+		   FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_nBRBIALL		|</div><div class='add'>+		   HFGITR_EL2_nBRBINJ,</div><div class='add'>+		   FEAT_BRBE),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_CPPRCTX		|</div><div class='add'>+		   HFGITR_EL2_DVPRCTX		|</div><div class='add'>+		   HFGITR_EL2_CFPRCTX,</div><div class='add'>+		   FEAT_SPECRES),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_TLBIRVAALE1	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVALE1	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAAE1	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAE1		|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAALE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVALE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAAE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAE1IS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAAE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIRVAE1OS,</div><div class='add'>+		   FEAT_TLBIRANGE),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_TLBIVAALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVALE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVAAE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIASIDE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVAE1OS	|</div><div class='add'>+		   HFGITR_EL2_TLBIVMALLE1OS,</div><div class='add'>+		   FEAT_TLBIOS),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_ATS1E1WP		|</div><div class='add'>+		   HFGITR_EL2_ATS1E1RP,</div><div class='add'>+		   FEAT_PAN2),</div><div class='add'>+	NEEDS_FEAT(HFGITR_EL2_DCCVADP, FEAT_DPB2),</div><div class='add'>+	NEEDS_FEAT_FLAG(HFGITR_EL2_DCCVAC	|</div><div class='add'>+			HFGITR_EL2_SVC_EL1	|</div><div class='add'>+			HFGITR_EL2_SVC_EL0	|</div><div class='add'>+			HFGITR_EL2_ERET		|</div><div class='add'>+			HFGITR_EL2_TLBIVAALE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVALE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVAAE1	|</div><div class='add'>+			HFGITR_EL2_TLBIASIDE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVAE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVMALLE1	|</div><div class='add'>+			HFGITR_EL2_TLBIVAALE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVALE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVAAE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIASIDE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVAE1IS	|</div><div class='add'>+			HFGITR_EL2_TLBIVMALLE1IS|</div><div class='add'>+			HFGITR_EL2_ATS1E0W	|</div><div class='add'>+			HFGITR_EL2_ATS1E0R	|</div><div class='add'>+			HFGITR_EL2_ATS1E1W	|</div><div class='add'>+			HFGITR_EL2_ATS1E1R	|</div><div class='add'>+			HFGITR_EL2_DCZVA	|</div><div class='add'>+			HFGITR_EL2_DCCIVAC	|</div><div class='add'>+			HFGITR_EL2_DCCVAP	|</div><div class='add'>+			HFGITR_EL2_DCCVAU	|</div><div class='add'>+			HFGITR_EL2_DCCISW	|</div><div class='add'>+			HFGITR_EL2_DCCSW	|</div><div class='add'>+			HFGITR_EL2_DCISW	|</div><div class='add'>+			HFGITR_EL2_DCIVAC	|</div><div class='add'>+			HFGITR_EL2_ICIVAU	|</div><div class='add'>+			HFGITR_EL2_ICIALLU	|</div><div class='add'>+			HFGITR_EL2_ICIALLUIS,</div><div class='add'>+			NEVER_FGU, FEAT_AA64EL1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hafgrtr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HAFGRTR_EL2_AMEVTYPER115_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER114_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER113_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER112_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER111_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER110_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER19_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER18_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER17_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER16_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER15_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER14_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER13_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER12_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER11_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVTYPER10_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR115_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR114_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR113_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR112_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR111_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR110_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR19_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR18_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR17_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR16_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR15_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR14_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR13_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR12_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR11_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR10_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMCNTEN1		|</div><div class='add'>+		   HAFGRTR_EL2_AMCNTEN0		|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR03_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR02_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR01_EL0	|</div><div class='add'>+		   HAFGRTR_EL2_AMEVCNTR00_EL0,</div><div class='add'>+		   FEAT_AMUv1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgitr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGITR2_EL2_nDCCIVAPS, FEAT_PoPS),</div><div class='add'>+	NEEDS_FEAT(HFGITR2_EL2_TSBCSYNC, FEAT_TRBEv1p1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgrtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nPFAR_EL1, FEAT_PFAR),</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nERXGSR_EL1, FEAT_RASv2),</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nACTLRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nACTLRMASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nCPACRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nCPACRMASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLR2MASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLRALIAS2_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nSCTLRMASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCR2ALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCR2MASK_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCRALIAS_EL1	|</div><div class='add'>+		   HFGRTR2_EL2_nTCRMASK_EL1,</div><div class='add'>+		   FEAT_SRMASK),</div><div class='add'>+	NEEDS_FEAT(HFGRTR2_EL2_nRCWSMASK_EL1, FEAT_THE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hfgwtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HFGWTR2_EL2_nPFAR_EL1, FEAT_PFAR),</div><div class='add'>+	NEEDS_FEAT(HFGWTR2_EL2_nACTLRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nACTLRMASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nCPACRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nCPACRMASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLR2MASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLRALIAS2_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nSCTLRMASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCR2ALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCR2MASK_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCRALIAS_EL1	|</div><div class='add'>+		   HFGWTR2_EL2_nTCRMASK_EL1,</div><div class='add'>+		   FEAT_SRMASK),</div><div class='add'>+	NEEDS_FEAT(HFGWTR2_EL2_nRCWSMASK_EL1, FEAT_THE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgrtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nMDSELR_EL1, FEAT_Debugv8p9),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMECR_EL1, feat_ebep_pmuv3_ss),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nTRCITECR_EL1, FEAT_ITE),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMICFILTR_EL0	|</div><div class='add'>+		   HDFGRTR2_EL2_nPMICNTR_EL0,</div><div class='add'>+		   FEAT_PMUv3_ICNTR),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMUACR_EL1, FEAT_PMUv3p9),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMSSCR_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nPMSSDATA,</div><div class='add'>+		   FEAT_PMUv3_SS),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMIAR_EL1, FEAT_SEBEP),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMSDSFR_EL1, feat_spe_fds),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nPMBMAR_EL1, FEAT_SPE_nVM),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nSPMACCESSR_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMCNTEN	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMCR_EL0	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMDEVAFF_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMEVCNTRn_EL0	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMEVTYPERn_EL0|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMID		|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMINTEN	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMOVS		|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMSCR_EL1	|</div><div class='add'>+		   HDFGRTR2_EL2_nSPMSELR_EL0,</div><div class='add'>+		   FEAT_SPMU),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nMDSTEPOP_EL1, FEAT_STEP2),</div><div class='add'>+	NEEDS_FEAT(HDFGRTR2_EL2_nTRBMPAM_EL1, feat_trbe_mpam),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hdfgwtr2_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nMDSELR_EL1, FEAT_Debugv8p9),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMECR_EL1, feat_ebep_pmuv3_ss),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nTRCITECR_EL1, FEAT_ITE),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMICFILTR_EL0	|</div><div class='add'>+		   HDFGWTR2_EL2_nPMICNTR_EL0,</div><div class='add'>+		   FEAT_PMUv3_ICNTR),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMUACR_EL1	|</div><div class='add'>+		   HDFGWTR2_EL2_nPMZR_EL0,</div><div class='add'>+		   FEAT_PMUv3p9),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMSSCR_EL1, FEAT_PMUv3_SS),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMIAR_EL1, FEAT_SEBEP),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMSDSFR_EL1, feat_spe_fds),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nPMBMAR_EL1, FEAT_SPE_nVM),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nSPMACCESSR_EL1	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMCNTEN	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMCR_EL0	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMEVCNTRn_EL0	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMEVTYPERn_EL0|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMINTEN	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMOVS		|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMSCR_EL1	|</div><div class='add'>+		   HDFGWTR2_EL2_nSPMSELR_EL0,</div><div class='add'>+		   FEAT_SPMU),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nMDSTEPOP_EL1, FEAT_STEP2),</div><div class='add'>+	NEEDS_FEAT(HDFGWTR2_EL2_nTRBMPAM_EL1, feat_trbe_mpam),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hcrx_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_PACMEn, feat_pauth_lr),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnFPM, FEAT_FPMR),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_GCSEn, FEAT_GCS),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnIDCP128, FEAT_SYSREG128),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnSDERR, feat_aderr),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_TMEA, FEAT_DoubleFault2),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnSNERR, feat_anerr),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_D128En, FEAT_D128),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_PTTWI, FEAT_THE),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_SCTLR2En, FEAT_SCTLR2),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_TCR2En, FEAT_TCR2),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_MSCEn		|</div><div class='add'>+		   HCRX_EL2_MCE2,</div><div class='add'>+		   FEAT_MOPS),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_CMOW, FEAT_CMOW),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_VFNMI		|</div><div class='add'>+		   HCRX_EL2_VINMI		|</div><div class='add'>+		   HCRX_EL2_TALLINT,</div><div class='add'>+		   FEAT_NMI),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_SMPME, feat_sme_smps),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_FGTnXS		|</div><div class='add'>+		   HCRX_EL2_FnXS,</div><div class='add'>+		   FEAT_XS),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnASR, FEAT_LS64_V),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnALS, FEAT_LS64),</div><div class='add'>+	NEEDS_FEAT(HCRX_EL2_EnAS0, FEAT_LS64_ACCDATA),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_bits_to_feat_map hcr_feat_map[] = {</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TID0, FEAT_AA32EL0),</div><div class='add'>+	NEEDS_FEAT_FIXED(HCR_EL2_RW, compute_hcr_rw),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_HCD, not_feat_aa64el3),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_AMO		|</div><div class='add'>+		   HCR_EL2_BSU		|</div><div class='add'>+		   HCR_EL2_CD		|</div><div class='add'>+		   HCR_EL2_DC		|</div><div class='add'>+		   HCR_EL2_FB		|</div><div class='add'>+		   HCR_EL2_FMO		|</div><div class='add'>+		   HCR_EL2_ID		|</div><div class='add'>+		   HCR_EL2_IMO		|</div><div class='add'>+		   HCR_EL2_MIOCNCE	|</div><div class='add'>+		   HCR_EL2_PTW		|</div><div class='add'>+		   HCR_EL2_SWIO		|</div><div class='add'>+		   HCR_EL2_TACR		|</div><div class='add'>+		   HCR_EL2_TDZ		|</div><div class='add'>+		   HCR_EL2_TGE		|</div><div class='add'>+		   HCR_EL2_TID1		|</div><div class='add'>+		   HCR_EL2_TID2		|</div><div class='add'>+		   HCR_EL2_TID3		|</div><div class='add'>+		   HCR_EL2_TIDCP	|</div><div class='add'>+		   HCR_EL2_TPCP		|</div><div class='add'>+		   HCR_EL2_TPU		|</div><div class='add'>+		   HCR_EL2_TRVM		|</div><div class='add'>+		   HCR_EL2_TSC		|</div><div class='add'>+		   HCR_EL2_TSW		|</div><div class='add'>+		   HCR_EL2_TTLB		|</div><div class='add'>+		   HCR_EL2_TVM		|</div><div class='add'>+		   HCR_EL2_TWE		|</div><div class='add'>+		   HCR_EL2_TWI		|</div><div class='add'>+		   HCR_EL2_VF		|</div><div class='add'>+		   HCR_EL2_VI		|</div><div class='add'>+		   HCR_EL2_VM		|</div><div class='add'>+		   HCR_EL2_VSE,</div><div class='add'>+		   FEAT_AA64EL1),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_AMVOFFEN, FEAT_AMUv1p1),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_EnSCXT, feat_csv2_2_csv2_1p2),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TICAB	|</div><div class='add'>+		   HCR_EL2_TID4		|</div><div class='add'>+		   HCR_EL2_TOCU,</div><div class='add'>+		   FEAT_EVT),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TTLBIS	|</div><div class='add'>+		   HCR_EL2_TTLBOS,</div><div class='add'>+		   FEAT_EVT_TTLBxS),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TLOR, FEAT_LOR),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_ATA		|</div><div class='add'>+		   HCR_EL2_DCT		|</div><div class='add'>+		   HCR_EL2_TID5,</div><div class='add'>+		   FEAT_MTE2),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_AT		| /* Ignore the original FEAT_NV */</div><div class='add'>+		   HCR_EL2_NV2		|</div><div class='add'>+		   HCR_EL2_NV,</div><div class='add'>+		   feat_nv2),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_NV1, feat_nv2_e2h0_ni), /* Missing from JSON */</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_API		|</div><div class='add'>+		   HCR_EL2_APK,</div><div class='add'>+		   feat_pauth),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TEA		|</div><div class='add'>+		   HCR_EL2_TERR,</div><div class='add'>+		   FEAT_RAS),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_FIEN, feat_rasv1p1),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_GPF, FEAT_RME),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_FWB, FEAT_S2FWB),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TME, FEAT_TME),</div><div class='add'>+	NEEDS_FEAT(HCR_EL2_TWEDEL	|</div><div class='add'>+		   HCR_EL2_TWEDEn,</div><div class='add'>+		   FEAT_TWED),</div><div class='add'>+	NEEDS_FEAT_FIXED(HCR_EL2_E2H, compute_hcr_e2h),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void __init check_feat_map(const struct reg_bits_to_feat_map *map,</div><div class='add'>+				  int map_size, u64 res0, const char *str)</div><div class='add'>+{</div><div class='add'>+	u64 mask = 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; map_size; i++)</div><div class='add'>+		mask |= map[i].bits;</div><div class='add'>+</div><div class='add'>+	if (mask != ~res0)</div><div class='add'>+		kvm_err("Undefined %s behaviour, bits %016llx\n",</div><div class='add'>+			str, mask ^ ~res0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __init check_feature_map(void)</div><div class='add'>+{</div><div class='add'>+	check_feat_map(hfgrtr_feat_map, ARRAY_SIZE(hfgrtr_feat_map),</div><div class='add'>+		       hfgrtr_masks.res0, hfgrtr_masks.str);</div><div class='add'>+	check_feat_map(hfgwtr_feat_map, ARRAY_SIZE(hfgwtr_feat_map),</div><div class='add'>+		       hfgwtr_masks.res0, hfgwtr_masks.str);</div><div class='add'>+	check_feat_map(hfgitr_feat_map, ARRAY_SIZE(hfgitr_feat_map),</div><div class='add'>+		       hfgitr_masks.res0, hfgitr_masks.str);</div><div class='add'>+	check_feat_map(hdfgrtr_feat_map, ARRAY_SIZE(hdfgrtr_feat_map),</div><div class='add'>+		       hdfgrtr_masks.res0, hdfgrtr_masks.str);</div><div class='add'>+	check_feat_map(hdfgwtr_feat_map, ARRAY_SIZE(hdfgwtr_feat_map),</div><div class='add'>+		       hdfgwtr_masks.res0, hdfgwtr_masks.str);</div><div class='add'>+	check_feat_map(hafgrtr_feat_map, ARRAY_SIZE(hafgrtr_feat_map),</div><div class='add'>+		       hafgrtr_masks.res0, hafgrtr_masks.str);</div><div class='add'>+	check_feat_map(hcrx_feat_map, ARRAY_SIZE(hcrx_feat_map),</div><div class='add'>+		       __HCRX_EL2_RES0, "HCRX_EL2");</div><div class='add'>+	check_feat_map(hcr_feat_map, ARRAY_SIZE(hcr_feat_map),</div><div class='add'>+		       HCR_EL2_RES0, "HCR_EL2");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool idreg_feat_match(struct kvm *kvm, const struct reg_bits_to_feat_map *map)</div><div class='add'>+{</div><div class='add'>+	u64 regval = kvm-&gt;arch.id_regs[map-&gt;regidx];</div><div class='add'>+	u64 regfld = (regval &gt;&gt; map-&gt;shift) &amp; GENMASK(map-&gt;width - 1, 0);</div><div class='add'>+</div><div class='add'>+	if (map-&gt;sign) {</div><div class='add'>+		s64 sfld = sign_extend64(regfld, map-&gt;width - 1);</div><div class='add'>+		s64 slim = sign_extend64(map-&gt;lo_lim, map-&gt;width - 1);</div><div class='add'>+		return sfld &gt;= slim;</div><div class='add'>+	} else {</div><div class='add'>+		return regfld &gt;= map-&gt;lo_lim;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 __compute_fixed_bits(struct kvm *kvm,</div><div class='add'>+				const struct reg_bits_to_feat_map *map,</div><div class='add'>+				int map_size,</div><div class='add'>+				u64 *fixed_bits,</div><div class='add'>+				unsigned long require,</div><div class='add'>+				unsigned long exclude)</div><div class='add'>+{</div><div class='add'>+	u64 val = 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; map_size; i++) {</div><div class='add'>+		bool match;</div><div class='add'>+</div><div class='add'>+		if ((map[i].flags &amp; require) != require)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (map[i].flags &amp; exclude)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (map[i].flags &amp; CALL_FUNC)</div><div class='add'>+			match = (map[i].flags &amp; FIXED_VALUE) ?</div><div class='add'>+				map[i].fval(kvm, fixed_bits) :</div><div class='add'>+				map[i].match(kvm);</div><div class='add'>+		else</div><div class='add'>+			match = idreg_feat_match(kvm, &amp;map[i]);</div><div class='add'>+</div><div class='add'>+		if (!match || (map[i].flags &amp; FIXED_VALUE))</div><div class='add'>+			val |= map[i].bits;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 compute_res0_bits(struct kvm *kvm,</div><div class='add'>+			     const struct reg_bits_to_feat_map *map,</div><div class='add'>+			     int map_size,</div><div class='add'>+			     unsigned long require,</div><div class='add'>+			     unsigned long exclude)</div><div class='add'>+{</div><div class='add'>+	return __compute_fixed_bits(kvm, map, map_size, NULL,</div><div class='add'>+				    require, exclude | FIXED_VALUE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 compute_fixed_bits(struct kvm *kvm,</div><div class='add'>+			      const struct reg_bits_to_feat_map *map,</div><div class='add'>+			      int map_size,</div><div class='add'>+			      u64 *fixed_bits,</div><div class='add'>+			      unsigned long require,</div><div class='add'>+			      unsigned long exclude)</div><div class='add'>+{</div><div class='add'>+	return __compute_fixed_bits(kvm, map, map_size, fixed_bits,</div><div class='add'>+				    require | FIXED_VALUE, exclude);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void compute_fgu(struct kvm *kvm, enum fgt_group_id fgt)</div><div class='add'>+{</div><div class='add'>+	u64 val = 0;</div><div class='add'>+</div><div class='add'>+	switch (fgt) {</div><div class='add'>+	case HFGRTR_GROUP:</div><div class='add'>+		val |= compute_res0_bits(kvm, hfgrtr_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hfgrtr_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		val |= compute_res0_bits(kvm, hfgwtr_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hfgwtr_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR_GROUP:</div><div class='add'>+		val |= compute_res0_bits(kvm, hfgitr_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hfgitr_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR_GROUP:</div><div class='add'>+		val |= compute_res0_bits(kvm, hdfgrtr_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hdfgrtr_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		val |= compute_res0_bits(kvm, hdfgwtr_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hdfgwtr_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HAFGRTR_GROUP:</div><div class='add'>+		val |= compute_res0_bits(kvm, hafgrtr_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hafgrtr_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HFGRTR2_GROUP:</div><div class='add'>+		val |= compute_res0_bits(kvm, hfgrtr2_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hfgrtr2_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		val |= compute_res0_bits(kvm, hfgwtr2_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hfgwtr2_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR2_GROUP:</div><div class='add'>+		val |= compute_res0_bits(kvm, hfgitr2_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hfgitr2_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR2_GROUP:</div><div class='add'>+		val |= compute_res0_bits(kvm, hdfgrtr2_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hdfgrtr2_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		val |= compute_res0_bits(kvm, hdfgwtr2_feat_map,</div><div class='add'>+					 ARRAY_SIZE(hdfgwtr2_feat_map),</div><div class='add'>+					 0, NEVER_FGU);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm-&gt;arch.fgu[fgt] = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *res1)</div><div class='add'>+{</div><div class='add'>+	u64 fixed = 0, mask;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case HFGRTR_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hfgrtr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hfgrtr_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hfgrtr_masks.res0;</div><div class='add'>+		*res1 = HFGRTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGWTR_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hfgwtr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hfgwtr_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hfgwtr_masks.res0;</div><div class='add'>+		*res1 = HFGWTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hfgitr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hfgitr_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hfgitr_masks.res0;</div><div class='add'>+		*res1 = HFGITR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hdfgrtr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hdfgrtr_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hdfgrtr_masks.res0;</div><div class='add'>+		*res1 = HDFGRTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGWTR_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hdfgwtr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hdfgwtr_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hdfgwtr_masks.res0;</div><div class='add'>+		*res1 = HDFGWTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HAFGRTR_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hafgrtr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hafgrtr_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hafgrtr_masks.res0;</div><div class='add'>+		*res1 = HAFGRTR_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGRTR2_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hfgrtr2_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hfgrtr2_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hfgrtr2_masks.res0;</div><div class='add'>+		*res1 = HFGRTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGWTR2_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hfgwtr2_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hfgwtr2_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hfgwtr2_masks.res0;</div><div class='add'>+		*res1 = HFGWTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR2_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hfgitr2_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hfgitr2_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hfgitr2_masks.res0;</div><div class='add'>+		*res1 = HFGITR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR2_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hdfgrtr2_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hdfgrtr2_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hdfgrtr2_masks.res0;</div><div class='add'>+		*res1 = HDFGRTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGWTR2_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hdfgwtr2_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hdfgwtr2_feat_map), 0, 0);</div><div class='add'>+		*res0 |= hdfgwtr2_masks.res0;</div><div class='add'>+		*res1 = HDFGWTR2_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HCRX_EL2:</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hcrx_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hcrx_feat_map), 0, 0);</div><div class='add'>+		*res0 |= __HCRX_EL2_RES0;</div><div class='add'>+		*res1 = __HCRX_EL2_RES1;</div><div class='add'>+		break;</div><div class='add'>+	case HCR_EL2:</div><div class='add'>+		mask = compute_fixed_bits(kvm, hcr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hcr_feat_map), &amp;fixed,</div><div class='add'>+					  0, 0);</div><div class='add'>+		*res0 = compute_res0_bits(kvm, hcr_feat_map,</div><div class='add'>+					  ARRAY_SIZE(hcr_feat_map), 0, 0);</div><div class='add'>+		*res0 |= HCR_EL2_RES0 | (mask &amp; ~fixed);</div><div class='add'>+		*res1 = HCR_EL2_RES1 | (mask &amp; fixed);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		*res0 = *res1 = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c<br/>index 0fcfcc0478f9..3a384e9660b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/emulate-nested.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/emulate-nested.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/emulate-nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/emulate-nested.c</a></div><div class='hunk'>@@ -622,6 +622,11 @@ struct encoding_to_trap_config {</div><div class='ctx'> 	const unsigned int		line;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * WARNING: using ranges is a treacherous endeavour, as sysregs that</div><div class='add'>+ * are part of an architectural range are not necessarily contiguous</div><div class='add'>+ * in the [Op0,Op1,CRn,CRm,Ops] space. Tread carefully.</div><div class='add'>+ */</div><div class='ctx'> #define SR_RANGE_TRAP(sr_start, sr_end, trap_id)			\</div><div class='ctx'> 	{								\</div><div class='ctx'> 		.encoding	= sr_start,				\</div><div class='hunk'>@@ -1279,98 +1284,128 @@ enum fg_filter_id {</div><div class='ctx'> 	__NR_FG_FILTER_IDS__</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define SR_FGF(sr, g, b, p, f)					\</div><div class='del'>-	{							\</div><div class='del'>-		.encoding	= sr,				\</div><div class='del'>-		.end		= sr,				\</div><div class='del'>-		.tc		= {				\</div><div class='add'>+#define __FGT(g, b, p, f)					\</div><div class='add'>+		{						\</div><div class='ctx'> 			.fgt = g ## _GROUP,			\</div><div class='ctx'> 			.bit = g ## _EL2_ ## b ## _SHIFT,	\</div><div class='ctx'> 			.pol = p,				\</div><div class='ctx'> 			.fgf = f,				\</div><div class='del'>-		},						\</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+#define FGT(g, b, p)		__FGT(g, b, p, __NO_FGF__)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * See the warning next to SR_RANGE_TRAP(), and apply the same</div><div class='add'>+ * level of caution.</div><div class='add'>+ */</div><div class='add'>+#define SR_FGF_RANGE(sr, e, g, b, p, f)				\</div><div class='add'>+	{							\</div><div class='add'>+		.encoding	= sr,				\</div><div class='add'>+		.end		= e,				\</div><div class='add'>+		.tc		= __FGT(g, b, p, f),		\</div><div class='ctx'> 		.line = __LINE__,				\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#define SR_FGT(sr, g, b, p)	SR_FGF(sr, g, b, p, __NO_FGF__)</div><div class='add'>+#define SR_FGF(sr, g, b, p, f) 	SR_FGF_RANGE(sr, sr, g, b, p, f)</div><div class='add'>+#define SR_FGT(sr, g, b, p)	SR_FGF_RANGE(sr, sr, g, b, p, __NO_FGF__)</div><div class='add'>+#define SR_FGT_RANGE(sr, end, g, b, p)	\</div><div class='add'>+				SR_FGF_RANGE(sr, end, g, b, p, __NO_FGF__)</div><div class='ctx'> </div><div class='ctx'> static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	/* HFGRTR_EL2, HFGWTR_EL2 */</div><div class='del'>-	SR_FGT(SYS_AMAIR2_EL1,		HFGxTR, nAMAIR2_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_MAIR2_EL1,		HFGxTR, nMAIR2_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_S2POR_EL1,		HFGxTR, nS2POR_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_POR_EL1,		HFGxTR, nPOR_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_POR_EL0,		HFGxTR, nPOR_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_PIR_EL1,		HFGxTR, nPIR_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_PIRE0_EL1,		HFGxTR, nPIRE0_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_RCWMASK_EL1,		HFGxTR, nRCWMASK_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_TPIDR2_EL0,		HFGxTR, nTPIDR2_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_SMPRI_EL1,		HFGxTR, nSMPRI_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_GCSCR_EL1,		HFGxTR, nGCS_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_GCSPR_EL1,		HFGxTR, nGCS_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_GCSCRE0_EL1,		HFGxTR, nGCS_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_GCSPR_EL0,		HFGxTR, nGCS_EL0, 0),</div><div class='del'>-	SR_FGT(SYS_ACCDATA_EL1,		HFGxTR, nACCDATA_EL1, 0),</div><div class='del'>-	SR_FGT(SYS_ERXADDR_EL1,		HFGxTR, ERXADDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXPFGCDN_EL1,	HFGxTR, ERXPFGCDN_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXPFGCTL_EL1,	HFGxTR, ERXPFGCTL_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXPFGF_EL1,		HFGxTR, ERXPFGF_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC0_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC1_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC2_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXMISC3_EL1,	HFGxTR, ERXMISCn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXSTATUS_EL1,	HFGxTR, ERXSTATUS_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXCTLR_EL1,		HFGxTR, ERXCTLR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERXFR_EL1,		HFGxTR, ERXFR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERRSELR_EL1,		HFGxTR, ERRSELR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ERRIDR_EL1,		HFGxTR, ERRIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ICC_IGRPEN0_EL1,	HFGxTR, ICC_IGRPENn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ICC_IGRPEN1_EL1,	HFGxTR, ICC_IGRPENn_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_VBAR_EL1,		HFGxTR, VBAR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TTBR1_EL1,		HFGxTR, TTBR1_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TTBR0_EL1,		HFGxTR, TTBR0_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TPIDR_EL0,		HFGxTR, TPIDR_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_TPIDRRO_EL0,		HFGxTR, TPIDRRO_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_TPIDR_EL1,		HFGxTR, TPIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TCR_EL1,		HFGxTR, TCR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_TCR2_EL1,		HFGxTR, TCR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_SCXTNUM_EL0,		HFGxTR, SCXTNUM_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_SCXTNUM_EL1, 	HFGxTR, SCXTNUM_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_SCTLR_EL1, 		HFGxTR, SCTLR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_REVIDR_EL1, 		HFGxTR, REVIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_PAR_EL1, 		HFGxTR, PAR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_MPIDR_EL1, 		HFGxTR, MPIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_MIDR_EL1, 		HFGxTR, MIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_MAIR_EL1, 		HFGxTR, MAIR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORSA_EL1, 		HFGxTR, LORSA_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORN_EL1, 		HFGxTR, LORN_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORID_EL1, 		HFGxTR, LORID_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LOREA_EL1, 		HFGxTR, LOREA_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_LORC_EL1, 		HFGxTR, LORC_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ISR_EL1, 		HFGxTR, ISR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_FAR_EL1, 		HFGxTR, FAR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_ESR_EL1, 		HFGxTR, ESR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_DCZID_EL0, 		HFGxTR, DCZID_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_CTR_EL0, 		HFGxTR, CTR_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_CSSELR_EL1, 		HFGxTR, CSSELR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CPACR_EL1, 		HFGxTR, CPACR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CONTEXTIDR_EL1, 	HFGxTR, CONTEXTIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CLIDR_EL1, 		HFGxTR, CLIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_CCSIDR_EL1, 		HFGxTR, CCSIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_APIBKEYLO_EL1, 	HFGxTR, APIBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APIBKEYHI_EL1, 	HFGxTR, APIBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APIAKEYLO_EL1, 	HFGxTR, APIAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APIAKEYHI_EL1, 	HFGxTR, APIAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APGAKEYLO_EL1, 	HFGxTR, APGAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APGAKEYHI_EL1, 	HFGxTR, APGAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDBKEYLO_EL1, 	HFGxTR, APDBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDBKEYHI_EL1, 	HFGxTR, APDBKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDAKEYLO_EL1, 	HFGxTR, APDAKey, 1),</div><div class='del'>-	SR_FGT(SYS_APDAKEYHI_EL1, 	HFGxTR, APDAKey, 1),</div><div class='del'>-	SR_FGT(SYS_AMAIR_EL1, 		HFGxTR, AMAIR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_AIDR_EL1, 		HFGxTR, AIDR_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_AFSR1_EL1, 		HFGxTR, AFSR1_EL1, 1),</div><div class='del'>-	SR_FGT(SYS_AFSR0_EL1, 		HFGxTR, AFSR0_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AMAIR2_EL1,		HFGRTR, nAMAIR2_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_MAIR2_EL1,		HFGRTR, nMAIR2_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_S2POR_EL1,		HFGRTR, nS2POR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_POR_EL1,		HFGRTR, nPOR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_POR_EL0,		HFGRTR, nPOR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_PIR_EL1,		HFGRTR, nPIR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PIRE0_EL1,		HFGRTR, nPIRE0_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_RCWMASK_EL1,		HFGRTR, nRCWMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TPIDR2_EL0,		HFGRTR, nTPIDR2_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SMPRI_EL1,		HFGRTR, nSMPRI_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_GCSCR_EL1,		HFGRTR, nGCS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_GCSPR_EL1,		HFGRTR, nGCS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_GCSCRE0_EL1,		HFGRTR, nGCS_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_GCSPR_EL0,		HFGRTR, nGCS_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_ACCDATA_EL1,		HFGRTR, nACCDATA_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_ERXADDR_EL1,		HFGRTR, ERXADDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXPFGCDN_EL1,	HFGRTR, ERXPFGCDN_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXPFGCTL_EL1,	HFGRTR, ERXPFGCTL_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXPFGF_EL1,		HFGRTR, ERXPFGF_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC0_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC1_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC2_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXMISC3_EL1,	HFGRTR, ERXMISCn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXSTATUS_EL1,	HFGRTR, ERXSTATUS_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXCTLR_EL1,		HFGRTR, ERXCTLR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERXFR_EL1,		HFGRTR, ERXFR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERRSELR_EL1,		HFGRTR, ERRSELR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ERRIDR_EL1,		HFGRTR, ERRIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ICC_IGRPEN0_EL1,	HFGRTR, ICC_IGRPENn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ICC_IGRPEN1_EL1,	HFGRTR, ICC_IGRPENn_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_VBAR_EL1,		HFGRTR, VBAR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TTBR1_EL1,		HFGRTR, TTBR1_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TTBR0_EL1,		HFGRTR, TTBR0_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TPIDR_EL0,		HFGRTR, TPIDR_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_TPIDRRO_EL0,		HFGRTR, TPIDRRO_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_TPIDR_EL1,		HFGRTR, TPIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TCR_EL1,		HFGRTR, TCR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_TCR2_EL1,		HFGRTR, TCR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_SCXTNUM_EL0,		HFGRTR, SCXTNUM_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_SCXTNUM_EL1, 	HFGRTR, SCXTNUM_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_SCTLR_EL1, 		HFGRTR, SCTLR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_REVIDR_EL1, 		HFGRTR, REVIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_PAR_EL1, 		HFGRTR, PAR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_MPIDR_EL1, 		HFGRTR, MPIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_MIDR_EL1, 		HFGRTR, MIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_MAIR_EL1, 		HFGRTR, MAIR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORSA_EL1, 		HFGRTR, LORSA_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORN_EL1, 		HFGRTR, LORN_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORID_EL1, 		HFGRTR, LORID_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LOREA_EL1, 		HFGRTR, LOREA_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_LORC_EL1, 		HFGRTR, LORC_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ISR_EL1, 		HFGRTR, ISR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_FAR_EL1, 		HFGRTR, FAR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_ESR_EL1, 		HFGRTR, ESR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_DCZID_EL0, 		HFGRTR, DCZID_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_CTR_EL0, 		HFGRTR, CTR_EL0, 1),</div><div class='add'>+	SR_FGT(SYS_CSSELR_EL1, 		HFGRTR, CSSELR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CPACR_EL1, 		HFGRTR, CPACR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CONTEXTIDR_EL1, 	HFGRTR, CONTEXTIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CLIDR_EL1, 		HFGRTR, CLIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_CCSIDR_EL1, 		HFGRTR, CCSIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_APIBKEYLO_EL1, 	HFGRTR, APIBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APIBKEYHI_EL1, 	HFGRTR, APIBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APIAKEYLO_EL1, 	HFGRTR, APIAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APIAKEYHI_EL1, 	HFGRTR, APIAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APGAKEYLO_EL1, 	HFGRTR, APGAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APGAKEYHI_EL1, 	HFGRTR, APGAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDBKEYLO_EL1, 	HFGRTR, APDBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDBKEYHI_EL1, 	HFGRTR, APDBKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDAKEYLO_EL1, 	HFGRTR, APDAKey, 1),</div><div class='add'>+	SR_FGT(SYS_APDAKEYHI_EL1, 	HFGRTR, APDAKey, 1),</div><div class='add'>+	SR_FGT(SYS_AMAIR_EL1, 		HFGRTR, AMAIR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AIDR_EL1, 		HFGRTR, AIDR_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AFSR1_EL1, 		HFGRTR, AFSR1_EL1, 1),</div><div class='add'>+	SR_FGT(SYS_AFSR0_EL1, 		HFGRTR, AFSR0_EL1, 1),</div><div class='add'>+</div><div class='add'>+	/* HFGRTR2_EL2, HFGWTR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_ACTLRALIAS_EL1,	HFGRTR2, nACTLRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_ACTLRMASK_EL1,	HFGRTR2, nACTLRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_CPACRALIAS_EL1,	HFGRTR2, nCPACRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_CPACRMASK_EL1,	HFGRTR2, nCPACRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PFAR_EL1,		HFGRTR2, nPFAR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_RCWSMASK_EL1,	HFGRTR2, nRCWSMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLR2ALIAS_EL1,	HFGRTR2, nSCTLRALIAS2_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLR2MASK_EL1,	HFGRTR2, nSCTLR2MASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLRALIAS_EL1,	HFGRTR2, nSCTLRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SCTLRMASK_EL1,	HFGRTR2, nSCTLRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCR2ALIAS_EL1,	HFGRTR2, nTCR2ALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCR2MASK_EL1,	HFGRTR2, nTCR2MASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCRALIAS_EL1,	HFGRTR2, nTCRALIAS_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TCRMASK_EL1,		HFGRTR2, nTCRMASK_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_ERXGSR_EL1,		HFGRTR2, nERXGSR_EL1, 0),</div><div class='add'>+</div><div class='ctx'> 	/* HFGITR_EL2 */</div><div class='ctx'> 	SR_FGT(OP_AT_S1E1A, 		HFGITR, ATS1E1A, 1),</div><div class='ctx'> 	SR_FGT(OP_COSP_RCTX, 		HFGITR, COSPRCTX, 1),</div><div class='hunk'>@@ -1480,6 +1515,11 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_IC_IVAU, 		HFGITR, ICIVAU, 1),</div><div class='ctx'> 	SR_FGT(SYS_IC_IALLU, 		HFGITR, ICIALLU, 1),</div><div class='ctx'> 	SR_FGT(SYS_IC_IALLUIS, 		HFGITR, ICIALLUIS, 1),</div><div class='add'>+</div><div class='add'>+	/* HFGITR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_DC_CIGDVAPS,		HFGITR2, nDCCIVAPS, 0),</div><div class='add'>+	SR_FGT(SYS_DC_CIVAPS,		HFGITR2, nDCCIVAPS, 0),</div><div class='add'>+</div><div class='ctx'> 	/* HDFGRTR_EL2 */</div><div class='ctx'> 	SR_FGT(SYS_PMBIDR_EL1, 		HDFGRTR, PMBIDR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMSNEVFR_EL1, 	HDFGRTR, nPMSNEVFR_EL1, 0),</div><div class='hunk'>@@ -1789,68 +1829,12 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_PMCNTENSET_EL0, 	HDFGRTR, PMCNTEN, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMCCNTR_EL0, 	HDFGRTR, PMCCNTR_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMCCFILTR_EL0, 	HDFGRTR, PMCCFILTR_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(0), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(1), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(2), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(3), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(4), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(5), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(6), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(7), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(8), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(9), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(10), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(11), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(12), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(13), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(14), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(15), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(16), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(17), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(18), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(19), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(20), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(21), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(22), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(23), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(24), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(25), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(26), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(27), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(28), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(29), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVTYPERn_EL0(30), 	HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(0), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(1), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(2), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(3), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(4), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(5), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(6), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(7), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(8), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(9), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(10), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(11), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(12), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(13), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(14), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(15), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(16), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(17), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(18), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(19), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(20), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(21), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(22), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(23), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(24), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(25), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(26), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(27), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(28), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(29), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='del'>-	SR_FGT(SYS_PMEVCNTRn_EL0(30), 	HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='add'>+	SR_FGT_RANGE(SYS_PMEVTYPERn_EL0(0),</div><div class='add'>+		     SYS_PMEVTYPERn_EL0(30),</div><div class='add'>+		     HDFGRTR, PMEVTYPERn_EL0, 1),</div><div class='add'>+	SR_FGT_RANGE(SYS_PMEVCNTRn_EL0(0),</div><div class='add'>+		     SYS_PMEVCNTRn_EL0(30),</div><div class='add'>+		     HDFGRTR, PMEVCNTRn_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSDLR_EL1, 		HDFGRTR, OSDLR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSECCR_EL1, 		HDFGRTR, OSECCR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSLSR_EL1, 		HDFGRTR, OSLSR_EL1, 1),</div><div class='hunk'>@@ -1928,6 +1912,59 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_DBGBCRn_EL1(13), 	HDFGRTR, DBGBCRn_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_DBGBCRn_EL1(14), 	HDFGRTR, DBGBCRn_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_DBGBCRn_EL1(15), 	HDFGRTR, DBGBCRn_EL1, 1),</div><div class='add'>+</div><div class='add'>+	/* HDFGRTR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_MDSELR_EL1,		HDFGRTR2, nMDSELR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_MDSTEPOP_EL1,	HDFGRTR2, nMDSTEPOP_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMCCNTSVR_EL1,	HDFGRTR2, nPMSSDATA, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_PMEVCNTSVRn_EL1(0),</div><div class='add'>+		     SYS_PMEVCNTSVRn_EL1(30),</div><div class='add'>+		     HDFGRTR2, nPMSSDATA, 0),</div><div class='add'>+	SR_FGT(SYS_PMICNTSVR_EL1,	HDFGRTR2, nPMSSDATA, 0),</div><div class='add'>+	SR_FGT(SYS_PMECR_EL1,		HDFGRTR2, nPMECR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMIAR_EL1,		HDFGRTR2, nPMIAR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMICFILTR_EL0,	HDFGRTR2, nPMICFILTR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_PMICNTR_EL0,		HDFGRTR2, nPMICNTR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_PMSSCR_EL1,		HDFGRTR2, nPMSSCR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMUACR_EL1,		HDFGRTR2, nPMUACR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SPMACCESSR_EL1,	HDFGRTR2, nSPMACCESSR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCFGR_EL1,		HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMDEVARCH_EL1,	HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCGCRn_EL1(0),	HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCGCRn_EL1(1),	HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMIIDR_EL1,		HDFGRTR2, nSPMID, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCNTENCLR_EL0,	HDFGRTR2, nSPMCNTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCNTENSET_EL0,	HDFGRTR2, nSPMCNTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMCR_EL0,		HDFGRTR2, nSPMCR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SPMDEVAFF_EL1,	HDFGRTR2, nSPMDEVAFF_EL1, 0),</div><div class='add'>+	/*</div><div class='add'>+	 * We have up to 64 of these registers in ranges of 16, banked via</div><div class='add'>+	 * SPMSELR_EL0.BANK. We're only concerned with the accessors here,</div><div class='add'>+	 * not the architectural registers.</div><div class='add'>+	 */</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVCNTRn_EL0(0),</div><div class='add'>+		     SYS_SPMEVCNTRn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVCNTRn_EL0, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVFILT2Rn_EL0(0),</div><div class='add'>+		     SYS_SPMEVFILT2Rn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVTYPERn_EL0, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVFILTRn_EL0(0),</div><div class='add'>+		     SYS_SPMEVFILTRn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVTYPERn_EL0, 0),</div><div class='add'>+	SR_FGT_RANGE(SYS_SPMEVTYPERn_EL0(0),</div><div class='add'>+		     SYS_SPMEVTYPERn_EL0(15),</div><div class='add'>+		     HDFGRTR2, nSPMEVTYPERn_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SPMINTENCLR_EL1,	HDFGRTR2, nSPMINTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMINTENSET_EL1,	HDFGRTR2, nSPMINTEN, 0),</div><div class='add'>+	SR_FGT(SYS_SPMOVSCLR_EL0,	HDFGRTR2, nSPMOVS, 0),</div><div class='add'>+	SR_FGT(SYS_SPMOVSSET_EL0,	HDFGRTR2, nSPMOVS, 0),</div><div class='add'>+	SR_FGT(SYS_SPMSCR_EL1,		HDFGRTR2, nSPMSCR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_SPMSELR_EL0,		HDFGRTR2, nSPMSELR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_TRCITECR_EL1,	HDFGRTR2, nTRCITECR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMBMAR_EL1,		HDFGRTR2, nPMBMAR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_PMSDSFR_EL1,		HDFGRTR2, nPMSDSFR_EL1, 0),</div><div class='add'>+	SR_FGT(SYS_TRBMPAM_EL1,		HDFGRTR2, nTRBMPAM_EL1, 0),</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * HDFGWTR_EL2</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -1938,12 +1975,19 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	 * read-side mappings, and only the write-side mappings that</div><div class='ctx'> 	 * differ from the read side, and the trap handler will pick</div><div class='ctx'> 	 * the correct shadow register based on the access type.</div><div class='add'>+	 *</div><div class='add'>+	 * Same model applies to the FEAT_FGT2 registers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	SR_FGT(SYS_TRFCR_EL1,		HDFGWTR, TRFCR_EL1, 1),</div><div class='ctx'> 	SR_FGT(SYS_TRCOSLAR,		HDFGWTR, TRCOSLAR, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMCR_EL0,		HDFGWTR, PMCR_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_PMSWINC_EL0,		HDFGWTR, PMSWINC_EL0, 1),</div><div class='ctx'> 	SR_FGT(SYS_OSLAR_EL1,		HDFGWTR, OSLAR_EL1, 1),</div><div class='add'>+</div><div class='add'>+	/* HDFGWTR2_EL2 */</div><div class='add'>+	SR_FGT(SYS_PMZR_EL0,		HDFGWTR2, nPMZR_EL0, 0),</div><div class='add'>+	SR_FGT(SYS_SPMZR_EL0,		HDFGWTR2, nSPMEVCNTRn_EL0, 0),</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * HAFGRTR_EL2</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1989,6 +2033,20 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = {</div><div class='ctx'> 	SR_FGT(SYS_AMEVCNTR0_EL0(0),	HAFGRTR, AMEVCNTR00_EL0, 1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Additional FGTs that do not fire with ESR_EL2.EC==0x18. This table</div><div class='add'>+ * isn't used for exception routing, but only as a promise that the</div><div class='add'>+ * trap is handled somewhere else.</div><div class='add'>+ */</div><div class='add'>+static const union trap_config non_0x18_fgt[] __initconst = {</div><div class='add'>+	FGT(HFGITR, PSBCSYNC, 1),</div><div class='add'>+	FGT(HFGITR, nGCSSTR_EL1, 0),</div><div class='add'>+	FGT(HFGITR, SVC_EL1, 1),</div><div class='add'>+	FGT(HFGITR, SVC_EL0, 1),</div><div class='add'>+	FGT(HFGITR, ERET, 1),</div><div class='add'>+	FGT(HFGITR2, TSBCSYNC, 1),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static union trap_config get_trap_config(u32 sysreg)</div><div class='ctx'> {</div><div class='ctx'> 	return (union trap_config) {</div><div class='hunk'>@@ -2033,6 +2091,130 @@ static u32 encoding_next(u32 encoding)</div><div class='ctx'> 	return sys_reg(op0 + 1, 0, 0, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define FGT_MASKS(__n, __m)						\</div><div class='add'>+	struct fgt_masks __n = { .str = #__m, .res0 = __m, }</div><div class='add'>+</div><div class='add'>+FGT_MASKS(hfgrtr_masks, HFGRTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgwtr_masks, HFGWTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgitr_masks, HFGITR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgrtr_masks, HDFGRTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgwtr_masks, HDFGWTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hafgrtr_masks, HAFGRTR_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgrtr2_masks, HFGRTR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgwtr2_masks, HFGWTR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hfgitr2_masks, HFGITR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgrtr2_masks, HDFGRTR2_EL2_RES0);</div><div class='add'>+FGT_MASKS(hdfgwtr2_masks, HDFGWTR2_EL2_RES0);</div><div class='add'>+</div><div class='add'>+static __init bool aggregate_fgt(union trap_config tc)</div><div class='add'>+{</div><div class='add'>+	struct fgt_masks *rmasks, *wmasks;</div><div class='add'>+</div><div class='add'>+	switch (tc.fgt) {</div><div class='add'>+	case HFGRTR_GROUP:</div><div class='add'>+		rmasks = &amp;hfgrtr_masks;</div><div class='add'>+		wmasks = &amp;hfgwtr_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR_GROUP:</div><div class='add'>+		rmasks = &amp;hdfgrtr_masks;</div><div class='add'>+		wmasks = &amp;hdfgwtr_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HAFGRTR_GROUP:</div><div class='add'>+		rmasks = &amp;hafgrtr_masks;</div><div class='add'>+		wmasks = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR_GROUP:</div><div class='add'>+		rmasks = &amp;hfgitr_masks;</div><div class='add'>+		wmasks = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case HFGRTR2_GROUP:</div><div class='add'>+		rmasks = &amp;hfgrtr2_masks;</div><div class='add'>+		wmasks = &amp;hfgwtr2_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HDFGRTR2_GROUP:</div><div class='add'>+		rmasks = &amp;hdfgrtr2_masks;</div><div class='add'>+		wmasks = &amp;hdfgwtr2_masks;</div><div class='add'>+		break;</div><div class='add'>+	case HFGITR2_GROUP:</div><div class='add'>+		rmasks = &amp;hfgitr2_masks;</div><div class='add'>+		wmasks = NULL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * A bit can be reserved in either the R or W register, but</div><div class='add'>+	 * not both.</div><div class='add'>+	 */</div><div class='add'>+	if ((BIT(tc.bit) &amp; rmasks-&gt;res0) &amp;&amp;</div><div class='add'>+	    (!wmasks || (BIT(tc.bit) &amp; wmasks-&gt;res0)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (tc.pol)</div><div class='add'>+		rmasks-&gt;mask |= BIT(tc.bit) &amp; ~rmasks-&gt;res0;</div><div class='add'>+	else</div><div class='add'>+		rmasks-&gt;nmask |= BIT(tc.bit) &amp; ~rmasks-&gt;res0;</div><div class='add'>+</div><div class='add'>+	if (wmasks) {</div><div class='add'>+		if (tc.pol)</div><div class='add'>+			wmasks-&gt;mask |= BIT(tc.bit) &amp; ~wmasks-&gt;res0;</div><div class='add'>+		else</div><div class='add'>+			wmasks-&gt;nmask |= BIT(tc.bit) &amp; ~wmasks-&gt;res0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int check_fgt_masks(struct fgt_masks *masks)</div><div class='add'>+{</div><div class='add'>+	unsigned long duplicate = masks-&gt;mask &amp; masks-&gt;nmask;</div><div class='add'>+	u64 res0 = masks-&gt;res0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (duplicate) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(i, &amp;duplicate, 64) {</div><div class='add'>+			kvm_err("%s[%d] bit has both polarities\n",</div><div class='add'>+				masks-&gt;str, i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	masks-&gt;res0 = ~(masks-&gt;mask | masks-&gt;nmask);</div><div class='add'>+	if (masks-&gt;res0 != res0)</div><div class='add'>+		kvm_info("Implicit %s = %016llx, expecting %016llx\n",</div><div class='add'>+			 masks-&gt;str, masks-&gt;res0, res0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int check_all_fgt_masks(int ret)</div><div class='add'>+{</div><div class='add'>+	static struct fgt_masks * const masks[] __initconst = {</div><div class='add'>+		&amp;hfgrtr_masks,</div><div class='add'>+		&amp;hfgwtr_masks,</div><div class='add'>+		&amp;hfgitr_masks,</div><div class='add'>+		&amp;hdfgrtr_masks,</div><div class='add'>+		&amp;hdfgwtr_masks,</div><div class='add'>+		&amp;hafgrtr_masks,</div><div class='add'>+		&amp;hfgrtr2_masks,</div><div class='add'>+		&amp;hfgwtr2_masks,</div><div class='add'>+		&amp;hfgitr2_masks,</div><div class='add'>+		&amp;hdfgrtr2_masks,</div><div class='add'>+		&amp;hdfgwtr2_masks,</div><div class='add'>+	};</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(masks); i++)</div><div class='add'>+		err |= check_fgt_masks(masks[i]);</div><div class='add'>+</div><div class='add'>+	return ret ?: err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define for_each_encoding_in(__x, __s, __e)	\</div><div class='add'>+	for (u32 __x = __s; __x &lt;= __e; __x = encoding_next(__x))</div><div class='add'>+</div><div class='ctx'> int __init populate_nv_trap_config(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -2041,6 +2223,7 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 	BUILD_BUG_ON(__NR_CGT_GROUP_IDS__ &gt; BIT(TC_CGT_BITS));</div><div class='ctx'> 	BUILD_BUG_ON(__NR_FGT_GROUP_IDS__ &gt; BIT(TC_FGT_BITS));</div><div class='ctx'> 	BUILD_BUG_ON(__NR_FG_FILTER_IDS__ &gt; BIT(TC_FGF_BITS));</div><div class='add'>+	BUILD_BUG_ON(__HCRX_EL2_MASK &amp; __HCRX_EL2_nMASK);</div><div class='ctx'> </div><div class='ctx'> 	for (int i = 0; i &lt; ARRAY_SIZE(encoding_to_cgt); i++) {</div><div class='ctx'> 		const struct encoding_to_trap_config *cgt = &amp;encoding_to_cgt[i];</div><div class='hunk'>@@ -2051,7 +2234,7 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		for (u32 enc = cgt-&gt;encoding; enc &lt;= cgt-&gt;end; enc = encoding_next(enc)) {</div><div class='add'>+		for_each_encoding_in(enc, cgt-&gt;encoding, cgt-&gt;end) {</div><div class='ctx'> 			prev = xa_store(&amp;sr_forward_xa, enc,</div><div class='ctx'> 					xa_mk_value(cgt-&gt;tc.val), GFP_KERNEL);</div><div class='ctx'> 			if (prev &amp;&amp; !xa_is_err(prev)) {</div><div class='hunk'>@@ -2066,6 +2249,10 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (__HCRX_EL2_RES0 != HCRX_EL2_RES0)</div><div class='add'>+		kvm_info("Sanitised HCR_EL2_RES0 = %016llx, expecting %016llx\n",</div><div class='add'>+			 __HCRX_EL2_RES0, HCRX_EL2_RES0);</div><div class='add'>+</div><div class='ctx'> 	kvm_info("nv: %ld coarse grained trap handlers\n",</div><div class='ctx'> 		 ARRAY_SIZE(encoding_to_cgt));</div><div class='ctx'> </div><div class='hunk'>@@ -2082,23 +2269,39 @@ int __init populate_nv_trap_config(void)</div><div class='ctx'> 			print_nv_trap_error(fgt, "Invalid FGT", ret);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		tc = get_trap_config(fgt-&gt;encoding);</div><div class='add'>+		for_each_encoding_in(enc, fgt-&gt;encoding, fgt-&gt;end) {</div><div class='add'>+			tc = get_trap_config(enc);</div><div class='ctx'> </div><div class='del'>-		if (tc.fgt) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			print_nv_trap_error(fgt, "Duplicate FGT", ret);</div><div class='del'>-		}</div><div class='add'>+			if (tc.fgt) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				print_nv_trap_error(fgt, "Duplicate FGT", ret);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			tc.val |= fgt-&gt;tc.val;</div><div class='add'>+			prev = xa_store(&amp;sr_forward_xa, enc,</div><div class='add'>+					xa_mk_value(tc.val), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+			if (xa_is_err(prev)) {</div><div class='add'>+				ret = xa_err(prev);</div><div class='add'>+				print_nv_trap_error(fgt, "Failed FGT insertion", ret);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		tc.val |= fgt-&gt;tc.val;</div><div class='del'>-		prev = xa_store(&amp;sr_forward_xa, fgt-&gt;encoding,</div><div class='del'>-				xa_mk_value(tc.val), GFP_KERNEL);</div><div class='add'>+			if (!aggregate_fgt(tc)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				print_nv_trap_error(fgt, "FGT bit is reserved", ret);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (xa_is_err(prev)) {</div><div class='del'>-			ret = xa_err(prev);</div><div class='del'>-			print_nv_trap_error(fgt, "Failed FGT insertion", ret);</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(non_0x18_fgt); i++) {</div><div class='add'>+		if (!aggregate_fgt(non_0x18_fgt[i])) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			kvm_err("non_0x18_fgt[%d] is reserved\n", i);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = check_all_fgt_masks(ret);</div><div class='add'>+</div><div class='ctx'> 	kvm_info("nv: %ld fine grained trap handlers\n",</div><div class='ctx'> 		 ARRAY_SIZE(encoding_to_fgt));</div><div class='ctx'> </div><div class='hunk'>@@ -2215,11 +2418,11 @@ static u64 kvm_get_sysreg_res0(struct kvm *kvm, enum vcpu_sysreg sr)</div><div class='ctx'> 	return masks-&gt;mask[sr - __VNCR_START__].res0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool check_fgt_bit(struct kvm_vcpu *vcpu, bool is_read,</div><div class='del'>-			  u64 val, const union trap_config tc)</div><div class='add'>+static bool check_fgt_bit(struct kvm_vcpu *vcpu, enum vcpu_sysreg sr,</div><div class='add'>+			  const union trap_config tc)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='del'>-	enum vcpu_sysreg sr;</div><div class='add'>+	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * KVM doesn't know about any FGTs that apply to the host, and hopefully</div><div class='hunk'>@@ -2228,6 +2431,8 @@ static bool check_fgt_bit(struct kvm_vcpu *vcpu, bool is_read,</div><div class='ctx'> 	if (is_hyp_ctxt(vcpu))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	val = __vcpu_sys_reg(vcpu, sr);</div><div class='add'>+</div><div class='ctx'> 	if (tc.pol)</div><div class='ctx'> 		return (val &amp; BIT(tc.bit));</div><div class='ctx'> </div><div class='hunk'>@@ -2242,38 +2447,17 @@ static bool check_fgt_bit(struct kvm_vcpu *vcpu, bool is_read,</div><div class='ctx'> 	if (val &amp; BIT(tc.bit))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	switch ((enum fgt_group_id)tc.fgt) {</div><div class='del'>-	case HFGxTR_GROUP:</div><div class='del'>-		sr = is_read ? HFGRTR_EL2 : HFGWTR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HDFGRTR_GROUP:</div><div class='del'>-		sr = is_read ? HDFGRTR_EL2 : HDFGWTR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HAFGRTR_GROUP:</div><div class='del'>-		sr = HAFGRTR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HFGITR_GROUP:</div><div class='del'>-		sr = HFGITR_EL2;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		WARN_ONCE(1, "Unhandled FGT group");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return !(kvm_get_sysreg_res0(kvm, sr) &amp; BIT(tc.bit));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index)</div><div class='ctx'> {</div><div class='add'>+	enum vcpu_sysreg fgtreg;</div><div class='ctx'> 	union trap_config tc;</div><div class='ctx'> 	enum trap_behaviour b;</div><div class='ctx'> 	bool is_read;</div><div class='ctx'> 	u32 sysreg;</div><div class='del'>-	u64 esr, val;</div><div class='add'>+	u64 esr;</div><div class='ctx'> </div><div class='ctx'> 	esr = kvm_vcpu_get_esr(vcpu);</div><div class='ctx'> 	sysreg = esr_sys64_to_sysreg(esr);</div><div class='hunk'>@@ -2319,26 +2503,20 @@ bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index)</div><div class='ctx'> 	case __NO_FGT_GROUP__:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case HFGxTR_GROUP:</div><div class='del'>-		if (is_read)</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HFGRTR_EL2);</div><div class='del'>-		else</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HFGWTR_EL2);</div><div class='add'>+	case HFGRTR_GROUP:</div><div class='add'>+		fgtreg = is_read ? HFGRTR_EL2 : HFGWTR_EL2;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HDFGRTR_GROUP:</div><div class='del'>-		if (is_read)</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HDFGRTR_EL2);</div><div class='del'>-		else</div><div class='del'>-			val = __vcpu_sys_reg(vcpu, HDFGWTR_EL2);</div><div class='add'>+		fgtreg = is_read ? HDFGRTR_EL2 : HDFGWTR_EL2;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HAFGRTR_GROUP:</div><div class='del'>-		val = __vcpu_sys_reg(vcpu, HAFGRTR_EL2);</div><div class='add'>+		fgtreg = HAFGRTR_EL2;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HFGITR_GROUP:</div><div class='del'>-		val = __vcpu_sys_reg(vcpu, HFGITR_EL2);</div><div class='add'>+		fgtreg = HFGITR_EL2;</div><div class='ctx'> 		switch (tc.fgf) {</div><div class='ctx'> 			u64 tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -2352,13 +2530,26 @@ bool triage_sysreg_trap(struct kvm_vcpu *vcpu, int *sr_index)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case __NR_FGT_GROUP_IDS__:</div><div class='add'>+	case HFGRTR2_GROUP:</div><div class='add'>+		fgtreg = is_read ? HFGRTR2_EL2 : HFGWTR2_EL2;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HDFGRTR2_GROUP:</div><div class='add'>+		fgtreg = is_read ? HDFGRTR2_EL2 : HDFGWTR2_EL2;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HFGITR2_GROUP:</div><div class='add'>+		fgtreg = HFGITR2_EL2;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='ctx'> 		/* Something is really wrong, bail out */</div><div class='del'>-		WARN_ONCE(1, "__NR_FGT_GROUP_IDS__");</div><div class='add'>+		WARN_ONCE(1, "Bad FGT group (encoding %08x, config %016llx)\n",</div><div class='add'>+			  sysreg, tc.val);</div><div class='ctx'> 		goto local;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (tc.fgt != __NO_FGT_GROUP__ &amp;&amp; check_fgt_bit(vcpu, is_read, val, tc))</div><div class='add'>+	if (tc.fgt != __NO_FGT_GROUP__ &amp;&amp; check_fgt_bit(vcpu, fgtreg, tc))</div><div class='ctx'> 		goto inject;</div><div class='ctx'> </div><div class='ctx'> 	b = compute_trap_behaviour(vcpu, tc);</div><div class='hunk'>@@ -2471,13 +2662,6 @@ void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 spsr, elr, esr;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Forward this trap to the virtual EL2 if the virtual</div><div class='del'>-	 * HCR_EL2.NV bit is set and this is coming from !EL2.</div><div class='del'>-	 */</div><div class='del'>-	if (forward_hcr_traps(vcpu, HCR_NV))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	spsr = vcpu_read_sys_reg(vcpu, SPSR_EL2);</div><div class='ctx'> 	spsr = kvm_check_illegal_exception_return(vcpu, spsr);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c<br/>index b73dc26bc44b..453266c96481 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/handle_exit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/handle_exit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/handle_exit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/handle_exit.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kvm.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/ubsan.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/esr.h&gt;</div><div class='ctx'> #include &lt;asm/exception.h&gt;</div><div class='hunk'>@@ -298,6 +299,81 @@ static int handle_svc(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvm_handle_gcs(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* We don't expect GCS, so treat it with contempt */</div><div class='add'>+	if (kvm_has_feat(vcpu-&gt;kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+</div><div class='add'>+	kvm_inject_undefined(vcpu);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int handle_other(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	bool is_l2 = vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu);</div><div class='add'>+	u64 hcrx = __vcpu_sys_reg(vcpu, HCRX_EL2);</div><div class='add'>+	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+	u64 iss = ESR_ELx_ISS(esr);</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	bool allowed, fwd = false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We only trap for two reasons:</div><div class='add'>+	 *</div><div class='add'>+	 * - the feature is disabled, and the only outcome is to</div><div class='add'>+	 *   generate an UNDEF.</div><div class='add'>+	 *</div><div class='add'>+	 * - the feature is enabled, but a NV guest wants to trap the</div><div class='add'>+	 *   feature used by its L2 guest. We forward the exception in</div><div class='add'>+	 *   this case.</div><div class='add'>+	 *</div><div class='add'>+	 * What we don't expect is to end-up here if the guest is</div><div class='add'>+	 * expected be be able to directly use the feature, hence the</div><div class='add'>+	 * WARN_ON below.</div><div class='add'>+	 */</div><div class='add'>+	switch (iss) {</div><div class='add'>+	case ESR_ELx_ISS_OTHER_ST64BV:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V);</div><div class='add'>+		if (is_l2)</div><div class='add'>+			fwd = !(hcrx &amp; HCRX_EL2_EnASR);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_ST64BV0:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA);</div><div class='add'>+		if (is_l2)</div><div class='add'>+			fwd = !(hcrx &amp; HCRX_EL2_EnAS0);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_LDST64B:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64);</div><div class='add'>+		if (is_l2)</div><div class='add'>+			fwd = !(hcrx &amp; HCRX_EL2_EnALS);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_TSBCSYNC:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceBuffer, TRBE_V1P1);</div><div class='add'>+		if (is_l2)</div><div class='add'>+			fwd = (__vcpu_sys_reg(vcpu, HFGITR2_EL2) &amp; HFGITR2_EL2_TSBCSYNC);</div><div class='add'>+		break;</div><div class='add'>+	case ESR_ELx_ISS_OTHER_PSBCSYNC:</div><div class='add'>+		allowed = kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, V1P5);</div><div class='add'>+		if (is_l2)</div><div class='add'>+			fwd = (__vcpu_sys_reg(vcpu, HFGITR_EL2) &amp; HFGITR_EL2_PSBCSYNC);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Clearly, we're missing something. */</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		allowed = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(allowed &amp;&amp; !fwd);</div><div class='add'>+</div><div class='add'>+	if (allowed &amp;&amp; fwd)</div><div class='add'>+		kvm_inject_nested_sync(vcpu, esr);</div><div class='add'>+	else</div><div class='add'>+		kvm_inject_undefined(vcpu);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[0 ... ESR_ELx_EC_MAX]	= kvm_handle_unknown_ec,</div><div class='ctx'> 	[ESR_ELx_EC_WFx]	= kvm_handle_wfx,</div><div class='hunk'>@@ -307,6 +383,7 @@ static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[ESR_ELx_EC_CP14_LS]	= kvm_handle_cp14_load_store,</div><div class='ctx'> 	[ESR_ELx_EC_CP10_ID]	= kvm_handle_cp10_id,</div><div class='ctx'> 	[ESR_ELx_EC_CP14_64]	= kvm_handle_cp14_64,</div><div class='add'>+	[ESR_ELx_EC_OTHER]	= handle_other,</div><div class='ctx'> 	[ESR_ELx_EC_HVC32]	= handle_hvc,</div><div class='ctx'> 	[ESR_ELx_EC_SMC32]	= handle_smc,</div><div class='ctx'> 	[ESR_ELx_EC_HVC64]	= handle_hvc,</div><div class='hunk'>@@ -317,6 +394,7 @@ static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[ESR_ELx_EC_ERET]	= kvm_handle_eret,</div><div class='ctx'> 	[ESR_ELx_EC_IABT_LOW]	= kvm_handle_guest_abort,</div><div class='ctx'> 	[ESR_ELx_EC_DABT_LOW]	= kvm_handle_guest_abort,</div><div class='add'>+	[ESR_ELx_EC_DABT_CUR]	= kvm_handle_vncr_abort,</div><div class='ctx'> 	[ESR_ELx_EC_SOFTSTP_LOW]= kvm_handle_guest_debug,</div><div class='ctx'> 	[ESR_ELx_EC_WATCHPT_LOW]= kvm_handle_guest_debug,</div><div class='ctx'> 	[ESR_ELx_EC_BREAKPT_LOW]= kvm_handle_guest_debug,</div><div class='hunk'>@@ -324,6 +402,7 @@ static exit_handle_fn arm_exit_handlers[] = {</div><div class='ctx'> 	[ESR_ELx_EC_BRK64]	= kvm_handle_guest_debug,</div><div class='ctx'> 	[ESR_ELx_EC_FP_ASIMD]	= kvm_handle_fpasimd,</div><div class='ctx'> 	[ESR_ELx_EC_PAC]	= kvm_handle_ptrauth,</div><div class='add'>+	[ESR_ELx_EC_GCS]	= kvm_handle_gcs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -474,6 +553,11 @@ void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr,</div><div class='ctx'> 			print_nvhe_hyp_panic("BUG", panic_addr);</div><div class='ctx'> 	} else if (IS_ENABLED(CONFIG_CFI_CLANG) &amp;&amp; esr_is_cfi_brk(esr)) {</div><div class='ctx'> 		kvm_nvhe_report_cfi_failure(panic_addr);</div><div class='add'>+	} else if (IS_ENABLED(CONFIG_UBSAN_KVM_EL2) &amp;&amp;</div><div class='add'>+		   ESR_ELx_EC(esr) == ESR_ELx_EC_BRK64 &amp;&amp;</div><div class='add'>+		   esr_is_ubsan_brk(esr)) {</div><div class='add'>+		print_nvhe_hyp_panic(report_ubsan_failure(esr &amp; UBSAN_BRK_MASK),</div><div class='add'>+				     panic_addr);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		print_nvhe_hyp_panic("panic", panic_addr);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/hyp/fault.h b/arch/arm64/kvm/hyp/include/hyp/fault.h<br/>index 17df94570f03..fc573fc767b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/hyp/fault.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/hyp/fault.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/hyp/fault.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/include/hyp/fault.h</a></div><div class='hunk'>@@ -12,6 +12,16 @@</div><div class='ctx'> #include &lt;asm/kvm_hyp.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> </div><div class='add'>+static inline bool __fault_safe_to_translate(u64 esr)</div><div class='add'>+{</div><div class='add'>+	u64 fsc = esr &amp; ESR_ELx_FSC;</div><div class='add'>+</div><div class='add'>+	if (esr_fsc_is_sea_ttw(esr) || esr_fsc_is_secc_ttw(esr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !(fsc == ESR_ELx_FSC_EXTABT &amp;&amp; (esr &amp; ESR_ELx_FnV));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -44,34 +54,50 @@ static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault)</div><div class='add'>+/*</div><div class='add'>+ * Checks for the conditions when HPFAR_EL2 is written, per ARM ARM R_FKLWR.</div><div class='add'>+ */</div><div class='add'>+static inline bool __hpfar_valid(u64 esr)</div><div class='ctx'> {</div><div class='del'>-	u64 hpfar, far;</div><div class='del'>-</div><div class='del'>-	far = read_sysreg_el2(SYS_FAR);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * The HPFAR can be invalid if the stage 2 fault did not</div><div class='del'>-	 * happen during a stage 1 page table walk (the ESR_EL2.S1PTW</div><div class='del'>-	 * bit is clear) and one of the two following cases are true:</div><div class='del'>-	 *   1. The fault was due to a permission fault</div><div class='del'>-	 *   2. The processor carries errata 834220</div><div class='add'>+	 * CPUs affected by ARM erratum #834220 may incorrectly report a</div><div class='add'>+	 * stage-2 translation fault when a stage-1 permission fault occurs.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Therefore, for all non S1PTW faults where we either have a</div><div class='del'>-	 * permission fault or the errata workaround is enabled, we</div><div class='del'>-	 * resolve the IPA using the AT instruction.</div><div class='add'>+	 * Re-walk the page tables to determine if a stage-1 fault actually</div><div class='add'>+	 * occurred.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(esr &amp; ESR_ELx_S1PTW) &amp;&amp;</div><div class='del'>-	    (cpus_have_final_cap(ARM64_WORKAROUND_834220) ||</div><div class='del'>-	     esr_fsc_is_permission_fault(esr))) {</div><div class='del'>-		if (!__translate_far_to_hpfar(far, &amp;hpfar))</div><div class='del'>-			return false;</div><div class='del'>-	} else {</div><div class='add'>+	if (cpus_have_final_cap(ARM64_WORKAROUND_834220) &amp;&amp;</div><div class='add'>+	    esr_fsc_is_translation_fault(esr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (esr_fsc_is_translation_fault(esr) || esr_fsc_is_access_flag_fault(esr))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if ((esr &amp; ESR_ELx_S1PTW) &amp;&amp; esr_fsc_is_permission_fault(esr))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return esr_fsc_is_addr_sz_fault(esr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault)</div><div class='add'>+{</div><div class='add'>+	u64 hpfar;</div><div class='add'>+</div><div class='add'>+	fault-&gt;far_el2		= read_sysreg_el2(SYS_FAR);</div><div class='add'>+	fault-&gt;hpfar_el2	= 0;</div><div class='add'>+</div><div class='add'>+	if (__hpfar_valid(esr))</div><div class='ctx'> 		hpfar = read_sysreg(hpfar_el2);</div><div class='del'>-	}</div><div class='add'>+	else if (unlikely(!__fault_safe_to_translate(esr)))</div><div class='add'>+		return true;</div><div class='add'>+	else if (!__translate_far_to_hpfar(fault-&gt;far_el2, &amp;hpfar))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	fault-&gt;far_el2 = far;</div><div class='del'>-	fault-&gt;hpfar_el2 = hpfar;</div><div class='add'>+	/*</div><div class='add'>+	 * Hijack HPFAR_EL2.NS (RES0 in Non-secure) to indicate a valid</div><div class='add'>+	 * HPFAR value.</div><div class='add'>+	 */</div><div class='add'>+	fault-&gt;hpfar_el2 = hpfar | HPFAR_EL2_NS;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h<br/>index b741ea6aefa5..bb9f2eecfb67 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/hyp/switch.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/hyp/switch.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/hyp/switch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/include/hyp/switch.h</a></div><div class='hunk'>@@ -65,12 +65,56 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define reg_to_fgt_masks(reg)						\</div><div class='add'>+	({								\</div><div class='add'>+		struct fgt_masks *m;					\</div><div class='add'>+		switch(reg) {						\</div><div class='add'>+		case HFGRTR_EL2:					\</div><div class='add'>+			m = &amp;hfgrtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGWTR_EL2:					\</div><div class='add'>+			m = &amp;hfgwtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGITR_EL2:					\</div><div class='add'>+			m = &amp;hfgitr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGRTR_EL2:					\</div><div class='add'>+			m = &amp;hdfgrtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGWTR_EL2:					\</div><div class='add'>+			m = &amp;hdfgwtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HAFGRTR_EL2:					\</div><div class='add'>+			m = &amp;hafgrtr_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGRTR2_EL2:					\</div><div class='add'>+			m = &amp;hfgrtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGWTR2_EL2:					\</div><div class='add'>+			m = &amp;hfgwtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGITR2_EL2:					\</div><div class='add'>+			m = &amp;hfgitr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGRTR2_EL2:					\</div><div class='add'>+			m = &amp;hdfgrtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGWTR2_EL2:					\</div><div class='add'>+			m = &amp;hdfgwtr2_masks;				\</div><div class='add'>+			break;						\</div><div class='add'>+		default:						\</div><div class='add'>+			BUILD_BUG_ON(1);				\</div><div class='add'>+		}							\</div><div class='add'>+									\</div><div class='add'>+		m;							\</div><div class='add'>+	})</div><div class='add'>+</div><div class='ctx'> #define compute_clr_set(vcpu, reg, clr, set)				\</div><div class='ctx'> 	do {								\</div><div class='del'>-		u64 hfg;						\</div><div class='del'>-		hfg = __vcpu_sys_reg(vcpu, reg) &amp; ~__ ## reg ## _RES0;	\</div><div class='del'>-		set |= hfg &amp; __ ## reg ## _MASK; 			\</div><div class='del'>-		clr |= ~hfg &amp; __ ## reg ## _nMASK; 			\</div><div class='add'>+		u64 hfg = __vcpu_sys_reg(vcpu, reg);			\</div><div class='add'>+		struct fgt_masks *m = reg_to_fgt_masks(reg);		\</div><div class='add'>+		set |= hfg &amp; m-&gt;mask;					\</div><div class='add'>+		clr |= ~hfg &amp; m-&gt;nmask;					\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> #define reg_to_fgt_group_id(reg)					\</div><div class='hunk'>@@ -79,7 +123,7 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		switch(reg) {						\</div><div class='ctx'> 		case HFGRTR_EL2:					\</div><div class='ctx'> 		case HFGWTR_EL2:					\</div><div class='del'>-			id = HFGxTR_GROUP;				\</div><div class='add'>+			id = HFGRTR_GROUP;				\</div><div class='ctx'> 			break;						\</div><div class='ctx'> 		case HFGITR_EL2:					\</div><div class='ctx'> 			id = HFGITR_GROUP;				\</div><div class='hunk'>@@ -91,6 +135,17 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		case HAFGRTR_EL2:					\</div><div class='ctx'> 			id = HAFGRTR_GROUP;				\</div><div class='ctx'> 			break;						\</div><div class='add'>+		case HFGRTR2_EL2:					\</div><div class='add'>+		case HFGWTR2_EL2:					\</div><div class='add'>+			id = HFGRTR2_GROUP;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HFGITR2_EL2:					\</div><div class='add'>+			id = HFGITR2_GROUP;				\</div><div class='add'>+			break;						\</div><div class='add'>+		case HDFGRTR2_EL2:					\</div><div class='add'>+		case HDFGWTR2_EL2:					\</div><div class='add'>+			id = HDFGRTR2_GROUP;				\</div><div class='add'>+			break;						\</div><div class='ctx'> 		default:						\</div><div class='ctx'> 			BUILD_BUG_ON(1);				\</div><div class='ctx'> 		}							\</div><div class='hunk'>@@ -101,13 +156,16 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> #define compute_undef_clr_set(vcpu, kvm, reg, clr, set)			\</div><div class='ctx'> 	do {								\</div><div class='ctx'> 		u64 hfg = kvm-&gt;arch.fgu[reg_to_fgt_group_id(reg)];	\</div><div class='del'>-		set |= hfg &amp; __ ## reg ## _MASK;			\</div><div class='del'>-		clr |= hfg &amp; __ ## reg ## _nMASK; 			\</div><div class='add'>+		struct fgt_masks *m = reg_to_fgt_masks(reg);		\</div><div class='add'>+		set |= hfg &amp; m-&gt;mask;					\</div><div class='add'>+		clr |= hfg &amp; m-&gt;nmask;					\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> #define update_fgt_traps_cs(hctxt, vcpu, kvm, reg, clr, set)		\</div><div class='ctx'> 	do {								\</div><div class='del'>-		u64 c = 0, s = 0;					\</div><div class='add'>+		struct fgt_masks *m = reg_to_fgt_masks(reg);		\</div><div class='add'>+		u64 c = clr, s = set;					\</div><div class='add'>+		u64 val;						\</div><div class='ctx'> 									\</div><div class='ctx'> 		ctxt_sys_reg(hctxt, reg) = read_sysreg_s(SYS_ ## reg);	\</div><div class='ctx'> 		if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu))		\</div><div class='hunk'>@@ -115,30 +173,15 @@ static inline void __activate_traps_fpsimd32(struct kvm_vcpu *vcpu)</div><div class='ctx'> 									\</div><div class='ctx'> 		compute_undef_clr_set(vcpu, kvm, reg, c, s);		\</div><div class='ctx'> 									\</div><div class='del'>-		s |= set;						\</div><div class='del'>-		c |= clr;						\</div><div class='del'>-		if (c || s) {						\</div><div class='del'>-			u64 val = __ ## reg ## _nMASK;			\</div><div class='del'>-			val |= s;					\</div><div class='del'>-			val &amp;= ~c;					\</div><div class='del'>-			write_sysreg_s(val, SYS_ ## reg);		\</div><div class='del'>-		}							\</div><div class='add'>+		val = m-&gt;nmask;						\</div><div class='add'>+		val |= s;						\</div><div class='add'>+		val &amp;= ~c;						\</div><div class='add'>+		write_sysreg_s(val, SYS_ ## reg);			\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> #define update_fgt_traps(hctxt, vcpu, kvm, reg)		\</div><div class='ctx'> 	update_fgt_traps_cs(hctxt, vcpu, kvm, reg, 0, 0)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Validate the fine grain trap masks.</div><div class='del'>- * Check that the masks do not overlap and that all bits are accounted for.</div><div class='del'>- */</div><div class='del'>-#define CHECK_FGT_MASKS(reg)							\</div><div class='del'>-	do {									\</div><div class='del'>-		BUILD_BUG_ON((__ ## reg ## _MASK) &amp; (__ ## reg ## _nMASK));	\</div><div class='del'>-		BUILD_BUG_ON(~((__ ## reg ## _RES0) ^ (__ ## reg ## _MASK) ^	\</div><div class='del'>-			       (__ ## reg ## _nMASK)));				\</div><div class='del'>-	} while(0)</div><div class='del'>-</div><div class='ctx'> static inline bool cpu_has_amu(void)</div><div class='ctx'> {</div><div class='ctx'>        u64 pfr0 = read_sysreg_s(SYS_ID_AA64PFR0_EL1);</div><div class='hunk'>@@ -152,56 +195,60 @@ static inline void __activate_traps_hfgxtr(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 	struct kvm *kvm = kern_hyp_va(vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='del'>-	CHECK_FGT_MASKS(HFGRTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HFGWTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HFGITR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HDFGRTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HDFGWTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HAFGRTR_EL2);</div><div class='del'>-	CHECK_FGT_MASKS(HCRX_EL2);</div><div class='del'>-</div><div class='ctx'> 	if (!cpus_have_final_cap(ARM64_HAS_FGT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HFGRTR_EL2);</div><div class='ctx'> 	update_fgt_traps_cs(hctxt, vcpu, kvm, HFGWTR_EL2, 0,</div><div class='ctx'> 			    cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38) ?</div><div class='del'>-			    HFGxTR_EL2_TCR_EL1_MASK : 0);</div><div class='add'>+			    HFGWTR_EL2_TCR_EL1_MASK : 0);</div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HFGITR_EL2);</div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HDFGRTR_EL2);</div><div class='ctx'> 	update_fgt_traps(hctxt, vcpu, kvm, HDFGWTR_EL2);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_amu())</div><div class='ctx'> 		update_fgt_traps(hctxt, vcpu, kvm, HAFGRTR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_FGT2))</div><div class='add'>+	    return;</div><div class='add'>+</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HFGRTR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HFGWTR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HFGITR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HDFGRTR2_EL2);</div><div class='add'>+	update_fgt_traps(hctxt, vcpu, kvm, HDFGWTR2_EL2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define __deactivate_fgt(htcxt, vcpu, kvm, reg)				\</div><div class='add'>+#define __deactivate_fgt(htcxt, vcpu, reg)				\</div><div class='ctx'> 	do {								\</div><div class='del'>-		if ((vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu)) ||	\</div><div class='del'>-		    kvm-&gt;arch.fgu[reg_to_fgt_group_id(reg)])		\</div><div class='del'>-			write_sysreg_s(ctxt_sys_reg(hctxt, reg),	\</div><div class='del'>-				       SYS_ ## reg);			\</div><div class='add'>+		write_sysreg_s(ctxt_sys_reg(hctxt, reg),		\</div><div class='add'>+			       SYS_ ## reg);				\</div><div class='ctx'> 	} while(0)</div><div class='ctx'> </div><div class='ctx'> static inline void __deactivate_traps_hfgxtr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='del'>-	struct kvm *kvm = kern_hyp_va(vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='ctx'> 	if (!cpus_have_final_cap(ARM64_HAS_FGT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HFGRTR_EL2);</div><div class='del'>-	if (cpus_have_final_cap(ARM64_WORKAROUND_AMPERE_AC03_CPU_38))</div><div class='del'>-		write_sysreg_s(ctxt_sys_reg(hctxt, HFGWTR_EL2), SYS_HFGWTR_EL2);</div><div class='del'>-	else</div><div class='del'>-		__deactivate_fgt(hctxt, vcpu, kvm, HFGWTR_EL2);</div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HFGITR_EL2);</div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HDFGRTR_EL2);</div><div class='del'>-	__deactivate_fgt(hctxt, vcpu, kvm, HDFGWTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGRTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGWTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGITR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGRTR_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGWTR_EL2);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has_amu())</div><div class='del'>-		__deactivate_fgt(hctxt, vcpu, kvm, HAFGRTR_EL2);</div><div class='add'>+		__deactivate_fgt(hctxt, vcpu, HAFGRTR_EL2);</div><div class='add'>+</div><div class='add'>+	if (!cpus_have_final_cap(ARM64_HAS_FGT2))</div><div class='add'>+	    return;</div><div class='add'>+</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGRTR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGWTR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HFGITR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGRTR2_EL2);</div><div class='add'>+	__deactivate_fgt(hctxt, vcpu, HDFGWTR2_EL2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void  __activate_traps_mpam(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -235,6 +282,8 @@ static inline void __deactivate_traps_mpam(void)</div><div class='ctx'> </div><div class='ctx'> static inline void __activate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='add'>+</div><div class='ctx'> 	/* Trap on AArch32 cp15 c15 (impdef sysregs) accesses (EL1 or EL0) */</div><div class='ctx'> 	write_sysreg(1 &lt;&lt; 15, hstr_el2);</div><div class='ctx'> </div><div class='hunk'>@@ -245,11 +294,8 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * EL1 instead of being trapped to EL2.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (system_supports_pmuv3()) {</div><div class='del'>-		struct kvm_cpu_context *hctxt;</div><div class='del'>-</div><div class='ctx'> 		write_sysreg(0, pmselr_el0);</div><div class='ctx'> </div><div class='del'>-		hctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 		ctxt_sys_reg(hctxt, PMUSERENR_EL0) = read_sysreg(pmuserenr_el0);</div><div class='ctx'> 		write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0);</div><div class='ctx'> 		vcpu_set_flag(vcpu, PMUSERENR_ON_CPU);</div><div class='hunk'>@@ -261,14 +307,12 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_HAS_HCX)) {</div><div class='ctx'> 		u64 hcrx = vcpu-&gt;arch.hcrx_el2;</div><div class='ctx'> 		if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu)) {</div><div class='del'>-			u64 clr = 0, set = 0;</div><div class='del'>-</div><div class='del'>-			compute_clr_set(vcpu, HCRX_EL2, clr, set);</div><div class='del'>-</div><div class='del'>-			hcrx |= set;</div><div class='del'>-			hcrx &amp;= ~clr;</div><div class='add'>+			u64 val = __vcpu_sys_reg(vcpu, HCRX_EL2);</div><div class='add'>+			hcrx |= val &amp; __HCRX_EL2_MASK;</div><div class='add'>+			hcrx &amp;= ~(~val &amp; __HCRX_EL2_nMASK);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		ctxt_sys_reg(hctxt, HCRX_EL2) = read_sysreg_s(SYS_HCRX_EL2);</div><div class='ctx'> 		write_sysreg_s(hcrx, SYS_HCRX_EL2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -278,19 +322,18 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_cpu_context *hctxt = host_data_ptr(host_ctxt);</div><div class='add'>+</div><div class='ctx'> 	write_sysreg(*host_data_ptr(host_debug_state.mdcr_el2), mdcr_el2);</div><div class='ctx'> </div><div class='ctx'> 	write_sysreg(0, hstr_el2);</div><div class='ctx'> 	if (system_supports_pmuv3()) {</div><div class='del'>-		struct kvm_cpu_context *hctxt;</div><div class='del'>-</div><div class='del'>-		hctxt = host_data_ptr(host_ctxt);</div><div class='ctx'> 		write_sysreg(ctxt_sys_reg(hctxt, PMUSERENR_EL0), pmuserenr_el0);</div><div class='ctx'> 		vcpu_clear_flag(vcpu, PMUSERENR_ON_CPU);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_HAS_HCX))</div><div class='del'>-		write_sysreg_s(HCRX_HOST_FLAGS, SYS_HCRX_EL2);</div><div class='add'>+		write_sysreg_s(ctxt_sys_reg(hctxt, HCRX_EL2), SYS_HCRX_EL2);</div><div class='ctx'> </div><div class='ctx'> 	__deactivate_traps_hfgxtr(vcpu);</div><div class='ctx'> 	__deactivate_traps_mpam();</div><div class='hunk'>@@ -301,7 +344,7 @@ static inline void ___activate_traps(struct kvm_vcpu *vcpu, u64 hcr)</div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM))</div><div class='ctx'> 		hcr |= HCR_TVM;</div><div class='ctx'> </div><div class='del'>-	write_sysreg(hcr, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(hcr);</div><div class='ctx'> </div><div class='ctx'> 	if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN) &amp;&amp; (hcr &amp; HCR_VSE))</div><div class='ctx'> 		write_sysreg_s(vcpu-&gt;arch.vsesr_el2, SYS_VSESR_EL2);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h b/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h<br/>index ea0a704da9b8..5f9d56754e39 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/nvhe/mem_protect.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/nvhe/mem_protect.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/include/nvhe/mem_protect.h</a></div><div class='hunk'>@@ -39,12 +39,12 @@ int __pkvm_host_donate_hyp(u64 pfn, u64 nr_pages);</div><div class='ctx'> int __pkvm_hyp_donate_host(u64 pfn, u64 nr_pages);</div><div class='ctx'> int __pkvm_host_share_ffa(u64 pfn, u64 nr_pages);</div><div class='ctx'> int __pkvm_host_unshare_ffa(u64 pfn, u64 nr_pages);</div><div class='del'>-int __pkvm_host_share_guest(u64 pfn, u64 gfn, struct pkvm_hyp_vcpu *vcpu,</div><div class='add'>+int __pkvm_host_share_guest(u64 pfn, u64 gfn, u64 nr_pages, struct pkvm_hyp_vcpu *vcpu,</div><div class='ctx'> 			    enum kvm_pgtable_prot prot);</div><div class='del'>-int __pkvm_host_unshare_guest(u64 gfn, struct pkvm_hyp_vm *hyp_vm);</div><div class='add'>+int __pkvm_host_unshare_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *hyp_vm);</div><div class='ctx'> int __pkvm_host_relax_perms_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu, enum kvm_pgtable_prot prot);</div><div class='del'>-int __pkvm_host_wrprotect_guest(u64 gfn, struct pkvm_hyp_vm *hyp_vm);</div><div class='del'>-int __pkvm_host_test_clear_young_guest(u64 gfn, bool mkold, struct pkvm_hyp_vm *vm);</div><div class='add'>+int __pkvm_host_wrprotect_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *hyp_vm);</div><div class='add'>+int __pkvm_host_test_clear_young_guest(u64 gfn, u64 nr_pages, bool mkold, struct pkvm_hyp_vm *vm);</div><div class='ctx'> int __pkvm_host_mkyoung_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> bool addr_is_memory(phys_addr_t phys);</div><div class='hunk'>@@ -67,4 +67,10 @@ static __always_inline void __load_host_stage2(void)</div><div class='ctx'> 	else</div><div class='ctx'> 		write_sysreg(0, vttbr_el2);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NVHE_EL2_DEBUG</div><div class='add'>+void pkvm_ownership_selftest(void *base);</div><div class='add'>+#else</div><div class='add'>+static inline void pkvm_ownership_selftest(void *base) { }</div><div class='add'>+#endif</div><div class='ctx'> #endif /* __KVM_NVHE_MEM_PROTECT__ */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/memory.h b/arch/arm64/kvm/hyp/include/nvhe/memory.h<br/>index 34233d586060..dee1a406b0c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/nvhe/memory.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/nvhe/memory.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/nvhe/memory.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/include/nvhe/memory.h</a></div><div class='hunk'>@@ -8,23 +8,30 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Bits 0-1 are reserved to track the memory ownership state of each page:</div><div class='del'>- *   00: The page is owned exclusively by the page-table owner.</div><div class='del'>- *   01: The page is owned by the page-table owner, but is shared</div><div class='del'>- *       with another entity.</div><div class='del'>- *   10: The page is shared with, but not owned by the page-table owner.</div><div class='del'>- *   11: Reserved for future use (lending).</div><div class='add'>+ * Bits 0-1 are used to encode the memory ownership state of each page from the</div><div class='add'>+ * point of view of a pKVM "component" (host, hyp, guest, ... see enum</div><div class='add'>+ * pkvm_component_id):</div><div class='add'>+ *   00: The page is owned and exclusively accessible by the component;</div><div class='add'>+ *   01: The page is owned and accessible by the component, but is also</div><div class='add'>+ *       accessible by another component;</div><div class='add'>+ *   10: The page is accessible but not owned by the component;</div><div class='add'>+ * The storage of this state depends on the component: either in the</div><div class='add'>+ * hyp_vmemmap for the host and hyp states or in PTE software bits for guests.</div><div class='ctx'>  */</div><div class='ctx'> enum pkvm_page_state {</div><div class='ctx'> 	PKVM_PAGE_OWNED			= 0ULL,</div><div class='ctx'> 	PKVM_PAGE_SHARED_OWNED		= BIT(0),</div><div class='ctx'> 	PKVM_PAGE_SHARED_BORROWED	= BIT(1),</div><div class='del'>-	__PKVM_PAGE_RESERVED		= BIT(0) | BIT(1),</div><div class='ctx'> </div><div class='del'>-	/* Meta-states which aren't encoded directly in the PTE's SW bits */</div><div class='del'>-	PKVM_NOPAGE			= BIT(2),</div><div class='add'>+	/*</div><div class='add'>+	 * 'Meta-states' are not stored directly in PTE SW bits for guest</div><div class='add'>+	 * states, but inferred from the context (e.g. invalid PTE entries).</div><div class='add'>+	 * For the host and hyp, meta-states are stored directly in the</div><div class='add'>+	 * struct hyp_page.</div><div class='add'>+	 */</div><div class='add'>+	PKVM_NOPAGE			= BIT(0) | BIT(1),</div><div class='ctx'> };</div><div class='del'>-#define PKVM_PAGE_META_STATES_MASK	(~__PKVM_PAGE_RESERVED)</div><div class='add'>+#define PKVM_PAGE_STATE_MASK		(BIT(0) | BIT(1))</div><div class='ctx'> </div><div class='ctx'> #define PKVM_PAGE_STATE_PROT_MASK	(KVM_PGTABLE_PROT_SW0 | KVM_PGTABLE_PROT_SW1)</div><div class='ctx'> static inline enum kvm_pgtable_prot pkvm_mkstate(enum kvm_pgtable_prot prot,</div><div class='hunk'>@@ -44,8 +51,15 @@ struct hyp_page {</div><div class='ctx'> 	u16 refcount;</div><div class='ctx'> 	u8 order;</div><div class='ctx'> </div><div class='del'>-	/* Host (non-meta) state. Guarded by the host stage-2 lock. */</div><div class='del'>-	enum pkvm_page_state host_state : 8;</div><div class='add'>+	/* Host state. Guarded by the host stage-2 lock. */</div><div class='add'>+	unsigned __host_state : 4;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Complement of the hyp state. Guarded by the hyp stage-1 lock. We use</div><div class='add'>+	 * the complement so that the initial 0 in __hyp_state_comp (due to the</div><div class='add'>+	 * entire vmemmap starting off zeroed) encodes PKVM_NOPAGE.</div><div class='add'>+	 */</div><div class='add'>+	unsigned __hyp_state_comp : 4;</div><div class='ctx'> </div><div class='ctx'> 	u32 host_share_guest_count;</div><div class='ctx'> };</div><div class='hunk'>@@ -82,6 +96,26 @@ static inline struct hyp_page *hyp_phys_to_page(phys_addr_t phys)</div><div class='ctx'> #define hyp_page_to_virt(page)	__hyp_va(hyp_page_to_phys(page))</div><div class='ctx'> #define hyp_page_to_pool(page)	(((struct hyp_page *)page)-&gt;pool)</div><div class='ctx'> </div><div class='add'>+static inline enum pkvm_page_state get_host_state(struct hyp_page *p)</div><div class='add'>+{</div><div class='add'>+	return p-&gt;__host_state;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void set_host_state(struct hyp_page *p, enum pkvm_page_state state)</div><div class='add'>+{</div><div class='add'>+	p-&gt;__host_state = state;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline enum pkvm_page_state get_hyp_state(struct hyp_page *p)</div><div class='add'>+{</div><div class='add'>+	return p-&gt;__hyp_state_comp ^ PKVM_PAGE_STATE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void set_hyp_state(struct hyp_page *p, enum pkvm_page_state state)</div><div class='add'>+{</div><div class='add'>+	p-&gt;__hyp_state_comp = state ^ PKVM_PAGE_STATE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Refcounting for 'struct hyp_page'.</div><div class='ctx'>  * hyp_pool::lock must be held if atomic access to the refcount is required.</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/include/nvhe/mm.h b/arch/arm64/kvm/hyp/include/nvhe/mm.h<br/>index 230e4f2527de..6e83ce35c2f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/nvhe/mm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/include/nvhe/mm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/include/nvhe/mm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/include/nvhe/mm.h</a></div><div class='hunk'>@@ -13,9 +13,11 @@</div><div class='ctx'> extern struct kvm_pgtable pkvm_pgtable;</div><div class='ctx'> extern hyp_spinlock_t pkvm_pgd_lock;</div><div class='ctx'> </div><div class='del'>-int hyp_create_pcpu_fixmap(void);</div><div class='add'>+int hyp_create_fixmap(void);</div><div class='ctx'> void *hyp_fixmap_map(phys_addr_t phys);</div><div class='ctx'> void hyp_fixmap_unmap(void);</div><div class='add'>+void *hyp_fixblock_map(phys_addr_t phys, size_t *size);</div><div class='add'>+void hyp_fixblock_unmap(void);</div><div class='ctx'> </div><div class='ctx'> int hyp_create_idmap(u32 hyp_va_bits);</div><div class='ctx'> int hyp_map_vectors(void);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/Makefile b/arch/arm64/kvm/hyp/nvhe/Makefile<br/>index b43426a493df..a76522d63c3e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/Makefile</a></div><div class='hunk'>@@ -99,3 +99,9 @@ KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_FTRACE) $(CC_FLAGS_SCS), $(KBUILD_CFLAG</div><div class='ctx'> # causes a build failure. Remove profile optimization flags.</div><div class='ctx'> KBUILD_CFLAGS := $(filter-out -fprofile-sample-use=% -fprofile-use=%, $(KBUILD_CFLAGS))</div><div class='ctx'> KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables</div><div class='add'>+</div><div class='add'>+ifeq ($(CONFIG_UBSAN_KVM_EL2),y)</div><div class='add'>+UBSAN_SANITIZE := y</div><div class='add'>+# Always use brk and not hooks</div><div class='add'>+ccflags-y += $(CFLAGS_UBSAN_TRAP)</div><div class='add'>+endif</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/ffa.c b/arch/arm64/kvm/hyp/nvhe/ffa.c<br/>index e433dfab882a..3369dd0c4009 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/ffa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/ffa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/ffa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/ffa.c</a></div><div class='hunk'>@@ -730,10 +730,10 @@ static void do_ffa_version(struct arm_smccc_res *res,</div><div class='ctx'> 		hyp_ffa_version = ffa_req_version;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hyp_ffa_post_init())</div><div class='add'>+	if (hyp_ffa_post_init()) {</div><div class='ctx'> 		res-&gt;a0 = FFA_RET_NOT_SUPPORTED;</div><div class='del'>-	else {</div><div class='del'>-		has_version_negotiated = true;</div><div class='add'>+	} else {</div><div class='add'>+		smp_store_release(&amp;has_version_negotiated, true);</div><div class='ctx'> 		res-&gt;a0 = hyp_ffa_version;</div><div class='ctx'> 	}</div><div class='ctx'> unlock:</div><div class='hunk'>@@ -809,7 +809,8 @@ bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt, u32 func_id)</div><div class='ctx'> 	if (!is_ffa_call(func_id))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (!has_version_negotiated &amp;&amp; func_id != FFA_VERSION) {</div><div class='add'>+	if (func_id != FFA_VERSION &amp;&amp;</div><div class='add'>+	    !smp_load_acquire(&amp;has_version_negotiated)) {</div><div class='ctx'> 		ffa_to_smccc_error(&amp;res, FFA_RET_INVALID_PARAMETERS);</div><div class='ctx'> 		goto out_handled;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/host.S b/arch/arm64/kvm/hyp/nvhe/host.S<br/>index 58f0cb2298cc..eef15b374abb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/host.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/host.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/host.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/host.S</a></div><div class='hunk'>@@ -124,7 +124,7 @@ SYM_FUNC_START(__hyp_do_panic)</div><div class='ctx'> 	/* Ensure host stage-2 is disabled */</div><div class='ctx'> 	mrs	x0, hcr_el2</div><div class='ctx'> 	bic	x0, x0, #HCR_VM</div><div class='del'>-	msr	hcr_el2, x0</div><div class='add'>+	msr_hcr_el2 x0</div><div class='ctx'> 	isb</div><div class='ctx'> 	tlbi	vmalls12e1</div><div class='ctx'> 	dsb	nsh</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S<br/>index f8af11189572..aada42522e7b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-init.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/hyp-init.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-init.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/hyp-init.S</a></div><div class='hunk'>@@ -100,7 +100,7 @@ SYM_CODE_START_LOCAL(___kvm_hyp_init)</div><div class='ctx'> 	msr	mair_el2, x1</div><div class='ctx'> </div><div class='ctx'> 	ldr	x1, [x0, #NVHE_INIT_HCR_EL2]</div><div class='del'>-	msr	hcr_el2, x1</div><div class='add'>+	msr_hcr_el2 x1</div><div class='ctx'> </div><div class='ctx'> 	mov	x2, #HCR_E2H</div><div class='ctx'> 	and	x2, x1, x2</div><div class='hunk'>@@ -262,7 +262,7 @@ reset:</div><div class='ctx'> </div><div class='ctx'> alternative_if ARM64_KVM_PROTECTED_MODE</div><div class='ctx'> 	mov_q	x5, HCR_HOST_NVHE_FLAGS</div><div class='del'>-	msr	hcr_el2, x5</div><div class='add'>+	msr_hcr_el2 x5</div><div class='ctx'> alternative_else_nop_endif</div><div class='ctx'> </div><div class='ctx'> 	/* Install stub vectors */</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-main.c b/arch/arm64/kvm/hyp/nvhe/hyp-main.c<br/>index 2c37680d954c..8e8848de4d47 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/hyp-main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/hyp-main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/hyp-main.c</a></div><div class='hunk'>@@ -123,10 +123,6 @@ static void flush_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='ctx'> </div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.ctxt	= host_vcpu-&gt;arch.ctxt;</div><div class='ctx'> </div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.sve_state	= kern_hyp_va(host_vcpu-&gt;arch.sve_state);</div><div class='del'>-	/* Limit guest vector length to the maximum supported by the host.  */</div><div class='del'>-	hyp_vcpu-&gt;vcpu.arch.sve_max_vl	= min(host_vcpu-&gt;arch.sve_max_vl, kvm_host_sve_max_vl);</div><div class='del'>-</div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.mdcr_el2	= host_vcpu-&gt;arch.mdcr_el2;</div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.hcr_el2 &amp;= ~(HCR_TWI | HCR_TWE);</div><div class='ctx'> 	hyp_vcpu-&gt;vcpu.arch.hcr_el2 |= READ_ONCE(host_vcpu-&gt;arch.hcr_el2) &amp;</div><div class='hunk'>@@ -249,7 +245,8 @@ static void handle___pkvm_host_share_guest(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(u64, pfn, host_ctxt, 1);</div><div class='ctx'> 	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='del'>-	DECLARE_REG(enum kvm_pgtable_prot, prot, host_ctxt, 3);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='add'>+	DECLARE_REG(enum kvm_pgtable_prot, prot, host_ctxt, 4);</div><div class='ctx'> 	struct pkvm_hyp_vcpu *hyp_vcpu;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -264,7 +261,7 @@ static void handle___pkvm_host_share_guest(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ret = __pkvm_host_share_guest(pfn, gfn, hyp_vcpu, prot);</div><div class='add'>+	ret = __pkvm_host_share_guest(pfn, gfn, nr_pages, hyp_vcpu, prot);</div><div class='ctx'> out:</div><div class='ctx'> 	cpu_reg(host_ctxt, 1) =  ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -273,6 +270,7 @@ static void handle___pkvm_host_unshare_guest(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='ctx'> 	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='ctx'> 	struct pkvm_hyp_vm *hyp_vm;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -283,7 +281,7 @@ static void handle___pkvm_host_unshare_guest(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 	if (!hyp_vm)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ret = __pkvm_host_unshare_guest(gfn, hyp_vm);</div><div class='add'>+	ret = __pkvm_host_unshare_guest(gfn, nr_pages, hyp_vm);</div><div class='ctx'> 	put_pkvm_hyp_vm(hyp_vm);</div><div class='ctx'> out:</div><div class='ctx'> 	cpu_reg(host_ctxt, 1) =  ret;</div><div class='hunk'>@@ -312,6 +310,7 @@ static void handle___pkvm_host_wrprotect_guest(struct kvm_cpu_context *host_ctxt</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='ctx'> 	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='ctx'> 	struct pkvm_hyp_vm *hyp_vm;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -322,7 +321,7 @@ static void handle___pkvm_host_wrprotect_guest(struct kvm_cpu_context *host_ctxt</div><div class='ctx'> 	if (!hyp_vm)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ret = __pkvm_host_wrprotect_guest(gfn, hyp_vm);</div><div class='add'>+	ret = __pkvm_host_wrprotect_guest(gfn, nr_pages, hyp_vm);</div><div class='ctx'> 	put_pkvm_hyp_vm(hyp_vm);</div><div class='ctx'> out:</div><div class='ctx'> 	cpu_reg(host_ctxt, 1) = ret;</div><div class='hunk'>@@ -332,7 +331,8 @@ static void handle___pkvm_host_test_clear_young_guest(struct kvm_cpu_context *ho</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_REG(pkvm_handle_t, handle, host_ctxt, 1);</div><div class='ctx'> 	DECLARE_REG(u64, gfn, host_ctxt, 2);</div><div class='del'>-	DECLARE_REG(bool, mkold, host_ctxt, 3);</div><div class='add'>+	DECLARE_REG(u64, nr_pages, host_ctxt, 3);</div><div class='add'>+	DECLARE_REG(bool, mkold, host_ctxt, 4);</div><div class='ctx'> 	struct pkvm_hyp_vm *hyp_vm;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -343,7 +343,7 @@ static void handle___pkvm_host_test_clear_young_guest(struct kvm_cpu_context *ho</div><div class='ctx'> 	if (!hyp_vm)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ret = __pkvm_host_test_clear_young_guest(gfn, mkold, hyp_vm);</div><div class='add'>+	ret = __pkvm_host_test_clear_young_guest(gfn, nr_pages, mkold, hyp_vm);</div><div class='ctx'> 	put_pkvm_hyp_vm(hyp_vm);</div><div class='ctx'> out:</div><div class='ctx'> 	cpu_reg(host_ctxt, 1) = ret;</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/hyp.lds.S b/arch/arm64/kvm/hyp/nvhe/hyp.lds.S<br/>index f4562f417d3f..d724f6d69302 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/hyp.lds.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/hyp.lds.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/hyp.lds.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/hyp.lds.S</a></div><div class='hunk'>@@ -25,5 +25,7 @@ SECTIONS {</div><div class='ctx'> 	BEGIN_HYP_SECTION(.data..percpu)</div><div class='ctx'> 		PERCPU_INPUT(L1_CACHE_BYTES)</div><div class='ctx'> 	END_HYP_SECTION</div><div class='add'>+</div><div class='ctx'> 	HYP_SECTION(.bss)</div><div class='add'>+	HYP_SECTION(.data)</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/mem_protect.c b/arch/arm64/kvm/hyp/nvhe/mem_protect.c<br/>index f34f11c720d7..95d7534c9679 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/mem_protect.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/mem_protect.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/mem_protect.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/mem_protect.c</a></div><div class='hunk'>@@ -60,6 +60,11 @@ static void hyp_unlock_component(void)</div><div class='ctx'> 	hyp_spin_unlock(&amp;pkvm_pgd_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define for_each_hyp_page(__p, __st, __sz)				\</div><div class='add'>+	for (struct hyp_page *__p = hyp_phys_to_page(__st),		\</div><div class='add'>+			     *__e = __p + ((__sz) &gt;&gt; PAGE_SHIFT);	\</div><div class='add'>+	     __p &lt; __e; __p++)</div><div class='add'>+</div><div class='ctx'> static void *host_s2_zalloc_pages_exact(size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	void *addr = hyp_alloc_pages(&amp;host_s2_pool, get_order(size));</div><div class='hunk'>@@ -161,12 +166,6 @@ int kvm_host_prepare_stage2(void *pgt_pool_base)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool guest_stage2_force_pte_cb(u64 addr, u64 end,</div><div class='del'>-				      enum kvm_pgtable_prot prot)</div><div class='del'>-{</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void *guest_s2_zalloc_pages_exact(size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	void *addr = hyp_alloc_pages(&amp;current_vm-&gt;pool, get_order(size));</div><div class='hunk'>@@ -217,16 +216,42 @@ static void guest_s2_put_page(void *addr)</div><div class='ctx'> 	hyp_put_page(&amp;current_vm-&gt;pool, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __apply_guest_page(void *va, size_t size,</div><div class='add'>+			       void (*func)(void *addr, size_t size))</div><div class='add'>+{</div><div class='add'>+	size += va - PTR_ALIGN_DOWN(va, PAGE_SIZE);</div><div class='add'>+	va = PTR_ALIGN_DOWN(va, PAGE_SIZE);</div><div class='add'>+	size = PAGE_ALIGN(size);</div><div class='add'>+</div><div class='add'>+	while (size) {</div><div class='add'>+		size_t map_size = PAGE_SIZE;</div><div class='add'>+		void *map;</div><div class='add'>+</div><div class='add'>+		if (IS_ALIGNED((unsigned long)va, PMD_SIZE) &amp;&amp; size &gt;= PMD_SIZE)</div><div class='add'>+			map = hyp_fixblock_map(__hyp_pa(va), &amp;map_size);</div><div class='add'>+		else</div><div class='add'>+			map = hyp_fixmap_map(__hyp_pa(va));</div><div class='add'>+</div><div class='add'>+		func(map, map_size);</div><div class='add'>+</div><div class='add'>+		if (map_size == PMD_SIZE)</div><div class='add'>+			hyp_fixblock_unmap();</div><div class='add'>+		else</div><div class='add'>+			hyp_fixmap_unmap();</div><div class='add'>+</div><div class='add'>+		size -= map_size;</div><div class='add'>+		va += map_size;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void clean_dcache_guest_page(void *va, size_t size)</div><div class='ctx'> {</div><div class='del'>-	__clean_dcache_guest_page(hyp_fixmap_map(__hyp_pa(va)), size);</div><div class='del'>-	hyp_fixmap_unmap();</div><div class='add'>+	__apply_guest_page(va, size, __clean_dcache_guest_page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void invalidate_icache_guest_page(void *va, size_t size)</div><div class='ctx'> {</div><div class='del'>-	__invalidate_icache_guest_page(hyp_fixmap_map(__hyp_pa(va)), size);</div><div class='del'>-	hyp_fixmap_unmap();</div><div class='add'>+	__apply_guest_page(va, size, __invalidate_icache_guest_page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_guest_prepare_stage2(struct pkvm_hyp_vm *vm, void *pgd)</div><div class='hunk'>@@ -255,8 +280,7 @@ int kvm_guest_prepare_stage2(struct pkvm_hyp_vm *vm, void *pgd)</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	guest_lock_component(vm);</div><div class='del'>-	ret = __kvm_pgtable_stage2_init(mmu-&gt;pgt, mmu, &amp;vm-&gt;mm_ops, 0,</div><div class='del'>-					guest_stage2_force_pte_cb);</div><div class='add'>+	ret = __kvm_pgtable_stage2_init(mmu-&gt;pgt, mmu, &amp;vm-&gt;mm_ops, 0, NULL);</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -309,7 +333,7 @@ int __pkvm_prot_finalize(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	kvm_flush_dcache_to_poc(params, sizeof(*params));</div><div class='ctx'> </div><div class='del'>-	write_sysreg(params-&gt;hcr_el2, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(params-&gt;hcr_el2);</div><div class='ctx'> 	__load_stage2(&amp;host_mmu.arch.mmu, &amp;host_mmu.arch);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -467,7 +491,8 @@ static int host_stage2_adjust_range(u64 addr, struct kvm_mem_range *range)</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	if (pte) {</div><div class='del'>-		WARN_ON(addr_is_memory(addr) &amp;&amp; hyp_phys_to_page(addr)-&gt;host_state != PKVM_NOPAGE);</div><div class='add'>+		WARN_ON(addr_is_memory(addr) &amp;&amp;</div><div class='add'>+			get_host_state(hyp_phys_to_page(addr)) != PKVM_NOPAGE);</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -493,17 +518,15 @@ int host_stage2_idmap_locked(phys_addr_t addr, u64 size,</div><div class='ctx'> </div><div class='ctx'> static void __host_update_page_state(phys_addr_t addr, u64 size, enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	phys_addr_t end = addr + size;</div><div class='del'>-</div><div class='del'>-	for (; addr &lt; end; addr += PAGE_SIZE)</div><div class='del'>-		hyp_phys_to_page(addr)-&gt;host_state = state;</div><div class='add'>+	for_each_hyp_page(page, addr, size)</div><div class='add'>+		set_host_state(page, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int host_stage2_set_owner_locked(phys_addr_t addr, u64 size, u8 owner_id)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!addr_is_memory(addr))</div><div class='add'>+	if (!range_is_memory(addr, addr + size))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	ret = host_stage2_try(kvm_pgtable_stage2_set_owner, &amp;host_mmu.pgt,</div><div class='hunk'>@@ -578,7 +601,14 @@ void handle_host_mem_abort(struct kvm_cpu_context *host_ctxt)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	addr = (fault.hpfar_el2 &amp; HPFAR_MASK) &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Yikes, we couldn't resolve the fault IPA. This should reinject an</div><div class='add'>+	 * abort into the host when we figure out how to do that.</div><div class='add'>+	 */</div><div class='add'>+	BUG_ON(!(fault.hpfar_el2 &amp; HPFAR_EL2_NS));</div><div class='add'>+	addr = FIELD_GET(HPFAR_EL2_FIPA, fault.hpfar_el2) &lt;&lt; 12;</div><div class='add'>+</div><div class='ctx'> 	ret = host_stage2_idmap(addr);</div><div class='ctx'> 	BUG_ON(ret &amp;&amp; ret != -EAGAIN);</div><div class='ctx'> }</div><div class='hunk'>@@ -611,16 +641,16 @@ static int check_page_state_range(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='ctx'> static int __host_check_page_state_range(u64 addr, u64 size,</div><div class='ctx'> 					 enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	u64 end = addr + size;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = check_range_allowed_memory(addr, end);</div><div class='add'>+	ret = check_range_allowed_memory(addr, addr + size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	hyp_assert_lock_held(&amp;host_mmu.lock);</div><div class='del'>-	for (; addr &lt; end; addr += PAGE_SIZE) {</div><div class='del'>-		if (hyp_phys_to_page(addr)-&gt;host_state != state)</div><div class='add'>+</div><div class='add'>+	for_each_hyp_page(page, addr, size) {</div><div class='add'>+		if (get_host_state(page) != state)</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -630,7 +660,7 @@ static int __host_check_page_state_range(u64 addr, u64 size,</div><div class='ctx'> static int __host_set_page_state_range(u64 addr, u64 size,</div><div class='ctx'> 				       enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	if (hyp_phys_to_page(addr)-&gt;host_state == PKVM_NOPAGE) {</div><div class='add'>+	if (get_host_state(hyp_phys_to_page(addr)) == PKVM_NOPAGE) {</div><div class='ctx'> 		int ret = host_stage2_idmap_locked(addr, size, PKVM_HOST_MEM_PROT);</div><div class='ctx'> </div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -642,24 +672,20 @@ static int __host_set_page_state_range(u64 addr, u64 size,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum pkvm_page_state hyp_get_page_state(kvm_pte_t pte, u64 addr)</div><div class='add'>+static void __hyp_set_page_state_range(phys_addr_t phys, u64 size, enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	if (!kvm_pte_valid(pte))</div><div class='del'>-		return PKVM_NOPAGE;</div><div class='del'>-</div><div class='del'>-	return pkvm_getstate(kvm_pgtable_hyp_pte_prot(pte));</div><div class='add'>+	for_each_hyp_page(page, phys, size)</div><div class='add'>+		set_hyp_state(page, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __hyp_check_page_state_range(u64 addr, u64 size,</div><div class='del'>-					enum pkvm_page_state state)</div><div class='add'>+static int __hyp_check_page_state_range(phys_addr_t phys, u64 size, enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	struct check_walk_data d = {</div><div class='del'>-		.desired	= state,</div><div class='del'>-		.get_page_state	= hyp_get_page_state,</div><div class='del'>-	};</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		if (get_hyp_state(page) != state)</div><div class='add'>+			return -EPERM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	hyp_assert_lock_held(&amp;pkvm_pgd_lock);</div><div class='del'>-	return check_page_state_range(&amp;pkvm_pgtable, addr, size, &amp;d);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum pkvm_page_state guest_get_page_state(kvm_pte_t pte, u64 addr)</div><div class='hunk'>@@ -670,10 +696,9 @@ static enum pkvm_page_state guest_get_page_state(kvm_pte_t pte, u64 addr)</div><div class='ctx'> 	return pkvm_getstate(kvm_pgtable_stage2_pte_prot(pte));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __guest_check_page_state_range(struct pkvm_hyp_vcpu *vcpu, u64 addr,</div><div class='add'>+static int __guest_check_page_state_range(struct pkvm_hyp_vm *vm, u64 addr,</div><div class='ctx'> 					  u64 size, enum pkvm_page_state state)</div><div class='ctx'> {</div><div class='del'>-	struct pkvm_hyp_vm *vm = pkvm_hyp_vcpu_to_hyp_vm(vcpu);</div><div class='ctx'> 	struct check_walk_data d = {</div><div class='ctx'> 		.desired	= state,</div><div class='ctx'> 		.get_page_state	= guest_get_page_state,</div><div class='hunk'>@@ -686,8 +711,6 @@ static int __guest_check_page_state_range(struct pkvm_hyp_vcpu *vcpu, u64 addr,</div><div class='ctx'> int __pkvm_host_share_hyp(u64 pfn)</div><div class='ctx'> {</div><div class='ctx'> 	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='del'>-	void *virt = __hyp_va(phys);</div><div class='del'>-	enum kvm_pgtable_prot prot;</div><div class='ctx'> 	u64 size = PAGE_SIZE;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -697,14 +720,11 @@ int __pkvm_host_share_hyp(u64 pfn)</div><div class='ctx'> 	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='del'>-	if (IS_ENABLED(CONFIG_NVHE_EL2_DEBUG)) {</div><div class='del'>-		ret = __hyp_check_page_state_range((u64)virt, size, PKVM_NOPAGE);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto unlock;</div><div class='del'>-	}</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	prot = pkvm_mkstate(PAGE_HYP, PKVM_PAGE_SHARED_BORROWED);</div><div class='del'>-	WARN_ON(pkvm_create_mappings_locked(virt, virt + size, prot));</div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_PAGE_SHARED_BORROWED);</div><div class='ctx'> 	WARN_ON(__host_set_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED));</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='hunk'>@@ -727,7 +747,7 @@ int __pkvm_host_unshare_hyp(u64 pfn)</div><div class='ctx'> 	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='del'>-	ret = __hyp_check_page_state_range(virt, size, PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_PAGE_SHARED_BORROWED);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	if (hyp_page_count((void *)virt)) {</div><div class='hunk'>@@ -735,7 +755,7 @@ int __pkvm_host_unshare_hyp(u64 pfn)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	WARN_ON(kvm_pgtable_hyp_unmap(&amp;pkvm_pgtable, virt, size) != size);</div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='ctx'> 	WARN_ON(__host_set_page_state_range(phys, size, PKVM_PAGE_OWNED));</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='hunk'>@@ -750,7 +770,6 @@ int __pkvm_host_donate_hyp(u64 pfn, u64 nr_pages)</div><div class='ctx'> 	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='ctx'> 	u64 size = PAGE_SIZE * nr_pages;</div><div class='ctx'> 	void *virt = __hyp_va(phys);</div><div class='del'>-	enum kvm_pgtable_prot prot;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	host_lock_component();</div><div class='hunk'>@@ -759,14 +778,12 @@ int __pkvm_host_donate_hyp(u64 pfn, u64 nr_pages)</div><div class='ctx'> 	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='del'>-	if (IS_ENABLED(CONFIG_NVHE_EL2_DEBUG)) {</div><div class='del'>-		ret = __hyp_check_page_state_range((u64)virt, size, PKVM_NOPAGE);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto unlock;</div><div class='del'>-	}</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	prot = pkvm_mkstate(PAGE_HYP, PKVM_PAGE_OWNED);</div><div class='del'>-	WARN_ON(pkvm_create_mappings_locked(virt, virt + size, prot));</div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='add'>+	WARN_ON(pkvm_create_mappings_locked(virt, virt + size, PAGE_HYP));</div><div class='ctx'> 	WARN_ON(host_stage2_set_owner_locked(phys, size, PKVM_ID_HYP));</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='hunk'>@@ -786,15 +803,14 @@ int __pkvm_hyp_donate_host(u64 pfn, u64 nr_pages)</div><div class='ctx'> 	host_lock_component();</div><div class='ctx'> 	hyp_lock_component();</div><div class='ctx'> </div><div class='del'>-	ret = __hyp_check_page_state_range(virt, size, PKVM_PAGE_OWNED);</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_PAGE_OWNED);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='del'>-	if (IS_ENABLED(CONFIG_NVHE_EL2_DEBUG)) {</div><div class='del'>-		ret = __host_check_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto unlock;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	__hyp_set_page_state_range(phys, size, PKVM_NOPAGE);</div><div class='ctx'> 	WARN_ON(kvm_pgtable_hyp_unmap(&amp;pkvm_pgtable, virt, size) != size);</div><div class='ctx'> 	WARN_ON(host_stage2_set_owner_locked(phys, size, PKVM_ID_HOST));</div><div class='ctx'> </div><div class='hunk'>@@ -809,24 +825,30 @@ int hyp_pin_shared_mem(void *from, void *to)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cur, start = ALIGN_DOWN((u64)from, PAGE_SIZE);</div><div class='ctx'> 	u64 end = PAGE_ALIGN((u64)to);</div><div class='add'>+	u64 phys = __hyp_pa(start);</div><div class='ctx'> 	u64 size = end - start;</div><div class='add'>+	struct hyp_page *p;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	host_lock_component();</div><div class='ctx'> 	hyp_lock_component();</div><div class='ctx'> </div><div class='del'>-	ret = __host_check_page_state_range(__hyp_pa(start), size,</div><div class='del'>-					    PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+	ret = __host_check_page_state_range(phys, size, PKVM_PAGE_SHARED_OWNED);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	ret = __hyp_check_page_state_range(start, size,</div><div class='del'>-					   PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+	ret = __hyp_check_page_state_range(phys, size, PKVM_PAGE_SHARED_BORROWED);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	for (cur = start; cur &lt; end; cur += PAGE_SIZE)</div><div class='del'>-		hyp_page_ref_inc(hyp_virt_to_page(cur));</div><div class='add'>+	for (cur = start; cur &lt; end; cur += PAGE_SIZE) {</div><div class='add'>+		p = hyp_virt_to_page(cur);</div><div class='add'>+		hyp_page_ref_inc(p);</div><div class='add'>+		if (p-&gt;refcount == 1)</div><div class='add'>+			WARN_ON(pkvm_create_mappings_locked((void *)cur,</div><div class='add'>+							    (void *)cur + PAGE_SIZE,</div><div class='add'>+							    PAGE_HYP));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	hyp_unlock_component();</div><div class='hunk'>@@ -839,12 +861,17 @@ void hyp_unpin_shared_mem(void *from, void *to)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cur, start = ALIGN_DOWN((u64)from, PAGE_SIZE);</div><div class='ctx'> 	u64 end = PAGE_ALIGN((u64)to);</div><div class='add'>+	struct hyp_page *p;</div><div class='ctx'> </div><div class='ctx'> 	host_lock_component();</div><div class='ctx'> 	hyp_lock_component();</div><div class='ctx'> </div><div class='del'>-	for (cur = start; cur &lt; end; cur += PAGE_SIZE)</div><div class='del'>-		hyp_page_ref_dec(hyp_virt_to_page(cur));</div><div class='add'>+	for (cur = start; cur &lt; end; cur += PAGE_SIZE) {</div><div class='add'>+		p = hyp_virt_to_page(cur);</div><div class='add'>+		if (p-&gt;refcount == 1)</div><div class='add'>+			WARN_ON(kvm_pgtable_hyp_unmap(&amp;pkvm_pgtable, cur, PAGE_SIZE) != PAGE_SIZE);</div><div class='add'>+		hyp_page_ref_dec(p);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	hyp_unlock_component();</div><div class='ctx'> 	host_unlock_component();</div><div class='hunk'>@@ -880,49 +907,84 @@ int __pkvm_host_unshare_ffa(u64 pfn, u64 nr_pages)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_share_guest(u64 pfn, u64 gfn, struct pkvm_hyp_vcpu *vcpu,</div><div class='add'>+static int __guest_check_transition_size(u64 phys, u64 ipa, u64 nr_pages, u64 *size)</div><div class='add'>+{</div><div class='add'>+	size_t block_size;</div><div class='add'>+</div><div class='add'>+	if (nr_pages == 1) {</div><div class='add'>+		*size = PAGE_SIZE;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We solely support second to last level huge mapping */</div><div class='add'>+	block_size = kvm_granule_size(KVM_PGTABLE_LAST_LEVEL - 1);</div><div class='add'>+</div><div class='add'>+	if (nr_pages != block_size &gt;&gt; PAGE_SHIFT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!IS_ALIGNED(phys | ipa, block_size))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*size = block_size;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __pkvm_host_share_guest(u64 pfn, u64 gfn, u64 nr_pages, struct pkvm_hyp_vcpu *vcpu,</div><div class='ctx'> 			    enum kvm_pgtable_prot prot)</div><div class='ctx'> {</div><div class='ctx'> 	struct pkvm_hyp_vm *vm = pkvm_hyp_vcpu_to_hyp_vm(vcpu);</div><div class='ctx'> 	u64 phys = hyp_pfn_to_phys(pfn);</div><div class='ctx'> 	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='del'>-	struct hyp_page *page;</div><div class='add'>+	u64 size;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (prot &amp; ~KVM_PGTABLE_PROT_RWX)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = check_range_allowed_memory(phys, phys + PAGE_SIZE);</div><div class='add'>+	ret = __guest_check_transition_size(phys, ipa, nr_pages, &amp;size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = check_range_allowed_memory(phys, phys + size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	host_lock_component();</div><div class='ctx'> 	guest_lock_component(vm);</div><div class='ctx'> </div><div class='del'>-	ret = __guest_check_page_state_range(vcpu, ipa, PAGE_SIZE, PKVM_NOPAGE);</div><div class='add'>+	ret = __guest_check_page_state_range(vm, ipa, size, PKVM_NOPAGE);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	page = hyp_phys_to_page(phys);</div><div class='del'>-	switch (page-&gt;host_state) {</div><div class='del'>-	case PKVM_PAGE_OWNED:</div><div class='del'>-		WARN_ON(__host_set_page_state_range(phys, PAGE_SIZE, PKVM_PAGE_SHARED_OWNED));</div><div class='del'>-		break;</div><div class='del'>-	case PKVM_PAGE_SHARED_OWNED:</div><div class='del'>-		if (page-&gt;host_share_guest_count)</div><div class='del'>-			break;</div><div class='del'>-		/* Only host to np-guest multi-sharing is tolerated */</div><div class='del'>-		WARN_ON(1);</div><div class='del'>-		fallthrough;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-		goto unlock;</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		switch (get_host_state(page)) {</div><div class='add'>+		case PKVM_PAGE_OWNED:</div><div class='add'>+			continue;</div><div class='add'>+		case PKVM_PAGE_SHARED_OWNED:</div><div class='add'>+			if (page-&gt;host_share_guest_count == U32_MAX) {</div><div class='add'>+				ret = -EBUSY;</div><div class='add'>+				goto unlock;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Only host to np-guest multi-sharing is tolerated */</div><div class='add'>+			if (page-&gt;host_share_guest_count)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			fallthrough;</div><div class='add'>+		default:</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		set_host_state(page, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+		page-&gt;host_share_guest_count++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	WARN_ON(kvm_pgtable_stage2_map(&amp;vm-&gt;pgt, ipa, PAGE_SIZE, phys,</div><div class='add'>+	WARN_ON(kvm_pgtable_stage2_map(&amp;vm-&gt;pgt, ipa, size, phys,</div><div class='ctx'> 				       pkvm_mkstate(prot, PKVM_PAGE_SHARED_BORROWED),</div><div class='ctx'> 				       &amp;vcpu-&gt;vcpu.arch.pkvm_memcache, 0));</div><div class='del'>-	page-&gt;host_share_guest_count++;</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='hunk'>@@ -931,10 +993,9 @@ unlock:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __check_host_shared_guest(struct pkvm_hyp_vm *vm, u64 *__phys, u64 ipa)</div><div class='add'>+static int __check_host_shared_guest(struct pkvm_hyp_vm *vm, u64 *__phys, u64 ipa, u64 size)</div><div class='ctx'> {</div><div class='ctx'> 	enum pkvm_page_state state;</div><div class='del'>-	struct hyp_page *page;</div><div class='ctx'> 	kvm_pte_t pte;</div><div class='ctx'> 	u64 phys;</div><div class='ctx'> 	s8 level;</div><div class='hunk'>@@ -945,7 +1006,7 @@ static int __check_host_shared_guest(struct pkvm_hyp_vm *vm, u64 *__phys, u64 ip</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	if (!kvm_pte_valid(pte))</div><div class='ctx'> 		return -ENOENT;</div><div class='del'>-	if (level != KVM_PGTABLE_LAST_LEVEL)</div><div class='add'>+	if (kvm_granule_size(level) != size)</div><div class='ctx'> 		return -E2BIG;</div><div class='ctx'> </div><div class='ctx'> 	state = guest_get_page_state(pte, ipa);</div><div class='hunk'>@@ -953,43 +1014,49 @@ static int __check_host_shared_guest(struct pkvm_hyp_vm *vm, u64 *__phys, u64 ip</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	phys = kvm_pte_to_phys(pte);</div><div class='del'>-	ret = check_range_allowed_memory(phys, phys + PAGE_SIZE);</div><div class='add'>+	ret = check_range_allowed_memory(phys, phys + size);</div><div class='ctx'> 	if (WARN_ON(ret))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	page = hyp_phys_to_page(phys);</div><div class='del'>-	if (page-&gt;host_state != PKVM_PAGE_SHARED_OWNED)</div><div class='del'>-		return -EPERM;</div><div class='del'>-	if (WARN_ON(!page-&gt;host_share_guest_count))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		if (get_host_state(page) != PKVM_PAGE_SHARED_OWNED)</div><div class='add'>+			return -EPERM;</div><div class='add'>+		if (WARN_ON(!page-&gt;host_share_guest_count))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	*__phys = phys;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_unshare_guest(u64 gfn, struct pkvm_hyp_vm *vm)</div><div class='add'>+int __pkvm_host_unshare_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *vm)</div><div class='ctx'> {</div><div class='ctx'> 	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='del'>-	struct hyp_page *page;</div><div class='del'>-	u64 phys;</div><div class='add'>+	u64 size, phys;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ret = __guest_check_transition_size(0, ipa, nr_pages, &amp;size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	host_lock_component();</div><div class='ctx'> 	guest_lock_component(vm);</div><div class='ctx'> </div><div class='del'>-	ret = __check_host_shared_guest(vm, &amp;phys, ipa);</div><div class='add'>+	ret = __check_host_shared_guest(vm, &amp;phys, ipa, size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	ret = kvm_pgtable_stage2_unmap(&amp;vm-&gt;pgt, ipa, PAGE_SIZE);</div><div class='add'>+	ret = kvm_pgtable_stage2_unmap(&amp;vm-&gt;pgt, ipa, size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	page = hyp_phys_to_page(phys);</div><div class='del'>-	page-&gt;host_share_guest_count--;</div><div class='del'>-	if (!page-&gt;host_share_guest_count)</div><div class='del'>-		WARN_ON(__host_set_page_state_range(phys, PAGE_SIZE, PKVM_PAGE_OWNED));</div><div class='add'>+	for_each_hyp_page(page, phys, size) {</div><div class='add'>+		/* __check_host_shared_guest() protects against underflow */</div><div class='add'>+		page-&gt;host_share_guest_count--;</div><div class='add'>+		if (!page-&gt;host_share_guest_count)</div><div class='add'>+			set_host_state(page, PKVM_PAGE_OWNED);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='hunk'>@@ -998,7 +1065,7 @@ unlock:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void assert_host_shared_guest(struct pkvm_hyp_vm *vm, u64 ipa)</div><div class='add'>+static void assert_host_shared_guest(struct pkvm_hyp_vm *vm, u64 ipa, u64 size)</div><div class='ctx'> {</div><div class='ctx'> 	u64 phys;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1009,7 +1076,7 @@ static void assert_host_shared_guest(struct pkvm_hyp_vm *vm, u64 ipa)</div><div class='ctx'> 	host_lock_component();</div><div class='ctx'> 	guest_lock_component(vm);</div><div class='ctx'> </div><div class='del'>-	ret = __check_host_shared_guest(vm, &amp;phys, ipa);</div><div class='add'>+	ret = __check_host_shared_guest(vm, &amp;phys, ipa, size);</div><div class='ctx'> </div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='ctx'> 	host_unlock_component();</div><div class='hunk'>@@ -1029,7 +1096,7 @@ int __pkvm_host_relax_perms_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu, enum kvm_</div><div class='ctx'> 	if (prot &amp; ~KVM_PGTABLE_PROT_RWX)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	assert_host_shared_guest(vm, ipa);</div><div class='add'>+	assert_host_shared_guest(vm, ipa, PAGE_SIZE);</div><div class='ctx'> 	guest_lock_component(vm);</div><div class='ctx'> 	ret = kvm_pgtable_stage2_relax_perms(&amp;vm-&gt;pgt, ipa, prot, 0);</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='hunk'>@@ -1037,33 +1104,41 @@ int __pkvm_host_relax_perms_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu, enum kvm_</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_wrprotect_guest(u64 gfn, struct pkvm_hyp_vm *vm)</div><div class='add'>+int __pkvm_host_wrprotect_guest(u64 gfn, u64 nr_pages, struct pkvm_hyp_vm *vm)</div><div class='ctx'> {</div><div class='del'>-	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='add'>+	u64 size, ipa = hyp_pfn_to_phys(gfn);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (pkvm_hyp_vm_is_protected(vm))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	assert_host_shared_guest(vm, ipa);</div><div class='add'>+	ret = __guest_check_transition_size(0, ipa, nr_pages, &amp;size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	assert_host_shared_guest(vm, ipa, size);</div><div class='ctx'> 	guest_lock_component(vm);</div><div class='del'>-	ret = kvm_pgtable_stage2_wrprotect(&amp;vm-&gt;pgt, ipa, PAGE_SIZE);</div><div class='add'>+	ret = kvm_pgtable_stage2_wrprotect(&amp;vm-&gt;pgt, ipa, size);</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int __pkvm_host_test_clear_young_guest(u64 gfn, bool mkold, struct pkvm_hyp_vm *vm)</div><div class='add'>+int __pkvm_host_test_clear_young_guest(u64 gfn, u64 nr_pages, bool mkold, struct pkvm_hyp_vm *vm)</div><div class='ctx'> {</div><div class='del'>-	u64 ipa = hyp_pfn_to_phys(gfn);</div><div class='add'>+	u64 size, ipa = hyp_pfn_to_phys(gfn);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (pkvm_hyp_vm_is_protected(vm))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	assert_host_shared_guest(vm, ipa);</div><div class='add'>+	ret = __guest_check_transition_size(0, ipa, nr_pages, &amp;size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	assert_host_shared_guest(vm, ipa, size);</div><div class='ctx'> 	guest_lock_component(vm);</div><div class='del'>-	ret = kvm_pgtable_stage2_test_clear_young(&amp;vm-&gt;pgt, ipa, PAGE_SIZE, mkold);</div><div class='add'>+	ret = kvm_pgtable_stage2_test_clear_young(&amp;vm-&gt;pgt, ipa, size, mkold);</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1077,10 +1152,210 @@ int __pkvm_host_mkyoung_guest(u64 gfn, struct pkvm_hyp_vcpu *vcpu)</div><div class='ctx'> 	if (pkvm_hyp_vm_is_protected(vm))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	assert_host_shared_guest(vm, ipa);</div><div class='add'>+	assert_host_shared_guest(vm, ipa, PAGE_SIZE);</div><div class='ctx'> 	guest_lock_component(vm);</div><div class='ctx'> 	kvm_pgtable_stage2_mkyoung(&amp;vm-&gt;pgt, ipa, 0);</div><div class='ctx'> 	guest_unlock_component(vm);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NVHE_EL2_DEBUG</div><div class='add'>+struct pkvm_expected_state {</div><div class='add'>+	enum pkvm_page_state host;</div><div class='add'>+	enum pkvm_page_state hyp;</div><div class='add'>+	enum pkvm_page_state guest[2]; /* [ gfn, gfn + 1 ] */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pkvm_expected_state selftest_state;</div><div class='add'>+static struct hyp_page *selftest_page;</div><div class='add'>+</div><div class='add'>+static struct pkvm_hyp_vm selftest_vm = {</div><div class='add'>+	.kvm = {</div><div class='add'>+		.arch = {</div><div class='add'>+			.mmu = {</div><div class='add'>+				.arch = &amp;selftest_vm.kvm.arch,</div><div class='add'>+				.pgt = &amp;selftest_vm.pgt,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pkvm_hyp_vcpu selftest_vcpu = {</div><div class='add'>+	.vcpu = {</div><div class='add'>+		.arch = {</div><div class='add'>+			.hw_mmu = &amp;selftest_vm.kvm.arch.mmu,</div><div class='add'>+		},</div><div class='add'>+		.kvm = &amp;selftest_vm.kvm,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void init_selftest_vm(void *virt)</div><div class='add'>+{</div><div class='add'>+	struct hyp_page *p = hyp_virt_to_page(virt);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	selftest_vm.kvm.arch.mmu.vtcr = host_mmu.arch.mmu.vtcr;</div><div class='add'>+	WARN_ON(kvm_guest_prepare_stage2(&amp;selftest_vm, virt));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pkvm_selftest_pages(); i++) {</div><div class='add'>+		if (p[i].refcount)</div><div class='add'>+			continue;</div><div class='add'>+		p[i].refcount = 1;</div><div class='add'>+		hyp_put_page(&amp;selftest_vm.pool, hyp_page_to_virt(&amp;p[i]));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 selftest_ipa(void)</div><div class='add'>+{</div><div class='add'>+	return BIT(selftest_vm.pgt.ia_bits - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void assert_page_state(void)</div><div class='add'>+{</div><div class='add'>+	void *virt = hyp_page_to_virt(selftest_page);</div><div class='add'>+	u64 size = PAGE_SIZE &lt;&lt; selftest_page-&gt;order;</div><div class='add'>+	struct pkvm_hyp_vcpu *vcpu = &amp;selftest_vcpu;</div><div class='add'>+	u64 phys = hyp_virt_to_phys(virt);</div><div class='add'>+	u64 ipa[2] = { selftest_ipa(), selftest_ipa() + PAGE_SIZE };</div><div class='add'>+	struct pkvm_hyp_vm *vm;</div><div class='add'>+</div><div class='add'>+	vm = pkvm_hyp_vcpu_to_hyp_vm(vcpu);</div><div class='add'>+</div><div class='add'>+	host_lock_component();</div><div class='add'>+	WARN_ON(__host_check_page_state_range(phys, size, selftest_state.host));</div><div class='add'>+	host_unlock_component();</div><div class='add'>+</div><div class='add'>+	hyp_lock_component();</div><div class='add'>+	WARN_ON(__hyp_check_page_state_range(phys, size, selftest_state.hyp));</div><div class='add'>+	hyp_unlock_component();</div><div class='add'>+</div><div class='add'>+	guest_lock_component(&amp;selftest_vm);</div><div class='add'>+	WARN_ON(__guest_check_page_state_range(vm, ipa[0], size, selftest_state.guest[0]));</div><div class='add'>+	WARN_ON(__guest_check_page_state_range(vm, ipa[1], size, selftest_state.guest[1]));</div><div class='add'>+	guest_unlock_component(&amp;selftest_vm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define assert_transition_res(res, fn, ...)		\</div><div class='add'>+	do {						\</div><div class='add'>+		WARN_ON(fn(__VA_ARGS__) != res);	\</div><div class='add'>+		assert_page_state();			\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+void pkvm_ownership_selftest(void *base)</div><div class='add'>+{</div><div class='add'>+	enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_RWX;</div><div class='add'>+	void *virt = hyp_alloc_pages(&amp;host_s2_pool, 0);</div><div class='add'>+	struct pkvm_hyp_vcpu *vcpu = &amp;selftest_vcpu;</div><div class='add'>+	struct pkvm_hyp_vm *vm = &amp;selftest_vm;</div><div class='add'>+	u64 phys, size, pfn, gfn;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!virt);</div><div class='add'>+	selftest_page = hyp_virt_to_page(virt);</div><div class='add'>+	selftest_page-&gt;refcount = 0;</div><div class='add'>+	init_selftest_vm(base);</div><div class='add'>+</div><div class='add'>+	size = PAGE_SIZE &lt;&lt; selftest_page-&gt;order;</div><div class='add'>+	phys = hyp_virt_to_phys(virt);</div><div class='add'>+	pfn = hyp_phys_to_pfn(phys);</div><div class='add'>+	gfn = hyp_phys_to_pfn(selftest_ipa());</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_NOPAGE;</div><div class='add'>+	selftest_state.hyp = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.guest[0] = selftest_state.guest[1] = PKVM_NOPAGE;</div><div class='add'>+	assert_page_state();</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_SHARED_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_PAGE_SHARED_BORROWED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	assert_transition_res(0,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+	assert_transition_res(0,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+	hyp_unpin_shared_mem(virt, virt + size);</div><div class='add'>+	WARN_ON(hyp_page_count(virt) != 1);</div><div class='add'>+	assert_transition_res(-EBUSY,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	hyp_unpin_shared_mem(virt, virt + size);</div><div class='add'>+	assert_page_state();</div><div class='add'>+	WARN_ON(hyp_page_count(virt));</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_SHARED_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-ENOENT,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	selftest_state.hyp = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_ffa, pfn, 1);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_PAGE_SHARED_OWNED;</div><div class='add'>+	selftest_state.guest[0] = PKVM_PAGE_SHARED_BORROWED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_guest, pfn, gfn, 1, vcpu, prot);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_ffa, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_share_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_host_unshare_hyp, pfn);</div><div class='add'>+	assert_transition_res(-EPERM,	__pkvm_hyp_donate_host, pfn, 1);</div><div class='add'>+	assert_transition_res(-EPERM,	hyp_pin_shared_mem, virt, virt + size);</div><div class='add'>+</div><div class='add'>+	selftest_state.guest[1] = PKVM_PAGE_SHARED_BORROWED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_share_guest, pfn, gfn + 1, 1, vcpu, prot);</div><div class='add'>+	WARN_ON(hyp_virt_to_page(virt)-&gt;host_share_guest_count != 2);</div><div class='add'>+</div><div class='add'>+	selftest_state.guest[0] = PKVM_NOPAGE;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_guest, gfn, 1, vm);</div><div class='add'>+</div><div class='add'>+	selftest_state.guest[1] = PKVM_NOPAGE;</div><div class='add'>+	selftest_state.host = PKVM_PAGE_OWNED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_unshare_guest, gfn + 1, 1, vm);</div><div class='add'>+</div><div class='add'>+	selftest_state.host = PKVM_NOPAGE;</div><div class='add'>+	selftest_state.hyp = PKVM_PAGE_OWNED;</div><div class='add'>+	assert_transition_res(0,	__pkvm_host_donate_hyp, pfn, 1);</div><div class='add'>+</div><div class='add'>+	selftest_page-&gt;refcount = 1;</div><div class='add'>+	hyp_put_page(&amp;host_s2_pool, virt);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/mm.c b/arch/arm64/kvm/hyp/nvhe/mm.c<br/>index f41c7440b34b..ae8391baebc3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/mm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/mm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/mm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/mm.c</a></div><div class='hunk'>@@ -229,9 +229,8 @@ int hyp_map_vectors(void)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void *hyp_fixmap_map(phys_addr_t phys)</div><div class='add'>+static void *fixmap_map_slot(struct hyp_fixmap_slot *slot, phys_addr_t phys)</div><div class='ctx'> {</div><div class='del'>-	struct hyp_fixmap_slot *slot = this_cpu_ptr(&amp;fixmap_slots);</div><div class='ctx'> 	kvm_pte_t pte, *ptep = slot-&gt;ptep;</div><div class='ctx'> </div><div class='ctx'> 	pte = *ptep;</div><div class='hunk'>@@ -243,10 +242,21 @@ void *hyp_fixmap_map(phys_addr_t phys)</div><div class='ctx'> 	return (void *)slot-&gt;addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void *hyp_fixmap_map(phys_addr_t phys)</div><div class='add'>+{</div><div class='add'>+	return fixmap_map_slot(this_cpu_ptr(&amp;fixmap_slots), phys);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fixmap_clear_slot(struct hyp_fixmap_slot *slot)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_pte_t *ptep = slot-&gt;ptep;</div><div class='ctx'> 	u64 addr = slot-&gt;addr;</div><div class='add'>+	u32 level;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(KVM_PTE_TYPE, *ptep) == KVM_PTE_TYPE_PAGE)</div><div class='add'>+		level = KVM_PGTABLE_LAST_LEVEL;</div><div class='add'>+	else</div><div class='add'>+		level = KVM_PGTABLE_LAST_LEVEL - 1; /* create_fixblock() guarantees PMD level */</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(*ptep, *ptep &amp; ~KVM_PTE_VALID);</div><div class='ctx'> </div><div class='hunk'>@@ -260,7 +270,7 @@ static void fixmap_clear_slot(struct hyp_fixmap_slot *slot)</div><div class='ctx'> 	 * https://lore.kernel.org/kvm/20221017115209.2099-1-will@kernel.org/T/#mf10dfbaf1eaef9274c581b81c53758918c1d0f03</div><div class='ctx'> 	 */</div><div class='ctx'> 	dsb(ishst);</div><div class='del'>-	__tlbi_level(vale2is, __TLBI_VADDR(addr, 0), KVM_PGTABLE_LAST_LEVEL);</div><div class='add'>+	__tlbi_level(vale2is, __TLBI_VADDR(addr, 0), level);</div><div class='ctx'> 	dsb(ish);</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='hunk'>@@ -273,9 +283,9 @@ void hyp_fixmap_unmap(void)</div><div class='ctx'> static int __create_fixmap_slot_cb(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 				   enum kvm_pgtable_walk_flags visit)</div><div class='ctx'> {</div><div class='del'>-	struct hyp_fixmap_slot *slot = per_cpu_ptr(&amp;fixmap_slots, (u64)ctx-&gt;arg);</div><div class='add'>+	struct hyp_fixmap_slot *slot = (struct hyp_fixmap_slot *)ctx-&gt;arg;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_pte_valid(ctx-&gt;old) || ctx-&gt;level != KVM_PGTABLE_LAST_LEVEL)</div><div class='add'>+	if (!kvm_pte_valid(ctx-&gt;old) || (ctx-&gt;end - ctx-&gt;start) != kvm_granule_size(ctx-&gt;level))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	slot-&gt;addr = ctx-&gt;addr;</div><div class='hunk'>@@ -296,13 +306,84 @@ static int create_fixmap_slot(u64 addr, u64 cpu)</div><div class='ctx'> 	struct kvm_pgtable_walker walker = {</div><div class='ctx'> 		.cb	= __create_fixmap_slot_cb,</div><div class='ctx'> 		.flags	= KVM_PGTABLE_WALK_LEAF,</div><div class='del'>-		.arg = (void *)cpu,</div><div class='add'>+		.arg	= per_cpu_ptr(&amp;fixmap_slots, cpu),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	return kvm_pgtable_walk(&amp;pkvm_pgtable, addr, PAGE_SIZE, &amp;walker);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int hyp_create_pcpu_fixmap(void)</div><div class='add'>+#if PAGE_SHIFT &lt; 16</div><div class='add'>+#define HAS_FIXBLOCK</div><div class='add'>+static struct hyp_fixmap_slot hyp_fixblock_slot;</div><div class='add'>+static DEFINE_HYP_SPINLOCK(hyp_fixblock_lock);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int create_fixblock(void)</div><div class='add'>+{</div><div class='add'>+#ifdef HAS_FIXBLOCK</div><div class='add'>+	struct kvm_pgtable_walker walker = {</div><div class='add'>+		.cb	= __create_fixmap_slot_cb,</div><div class='add'>+		.flags	= KVM_PGTABLE_WALK_LEAF,</div><div class='add'>+		.arg	= &amp;hyp_fixblock_slot,</div><div class='add'>+	};</div><div class='add'>+	unsigned long addr;</div><div class='add'>+	phys_addr_t phys;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* Find a RAM phys address, PMD aligned */</div><div class='add'>+	for (i = 0; i &lt; hyp_memblock_nr; i++) {</div><div class='add'>+		phys = ALIGN(hyp_memory[i].base, PMD_SIZE);</div><div class='add'>+		if (phys + PMD_SIZE &lt; (hyp_memory[i].base + hyp_memory[i].size))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i &gt;= hyp_memblock_nr)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	hyp_spin_lock(&amp;pkvm_pgd_lock);</div><div class='add'>+	addr = ALIGN(__io_map_base, PMD_SIZE);</div><div class='add'>+	ret = __pkvm_alloc_private_va_range(addr, PMD_SIZE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = kvm_pgtable_hyp_map(&amp;pkvm_pgtable, addr, PMD_SIZE, phys, PAGE_HYP);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = kvm_pgtable_walk(&amp;pkvm_pgtable, addr, PMD_SIZE, &amp;walker);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	hyp_spin_unlock(&amp;pkvm_pgd_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *hyp_fixblock_map(phys_addr_t phys, size_t *size)</div><div class='add'>+{</div><div class='add'>+#ifdef HAS_FIXBLOCK</div><div class='add'>+	*size = PMD_SIZE;</div><div class='add'>+	hyp_spin_lock(&amp;hyp_fixblock_lock);</div><div class='add'>+	return fixmap_map_slot(&amp;hyp_fixblock_slot, phys);</div><div class='add'>+#else</div><div class='add'>+	*size = PAGE_SIZE;</div><div class='add'>+	return hyp_fixmap_map(phys);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hyp_fixblock_unmap(void)</div><div class='add'>+{</div><div class='add'>+#ifdef HAS_FIXBLOCK</div><div class='add'>+	fixmap_clear_slot(&amp;hyp_fixblock_slot);</div><div class='add'>+	hyp_spin_unlock(&amp;hyp_fixblock_lock);</div><div class='add'>+#else</div><div class='add'>+	hyp_fixmap_unmap();</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hyp_create_fixmap(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr, i;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -322,7 +403,7 @@ int hyp_create_pcpu_fixmap(void)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return create_fixblock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hyp_create_idmap(u32 hyp_va_bits)</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c<br/>index 5a335a51deca..338505cb0171 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/pkvm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/pkvm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/pkvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/pkvm.c</a></div><div class='hunk'>@@ -372,6 +372,18 @@ static void unpin_host_vcpu(struct kvm_vcpu *host_vcpu)</div><div class='ctx'> 		hyp_unpin_shared_mem(host_vcpu, host_vcpu + 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void unpin_host_sve_state(struct pkvm_hyp_vcpu *hyp_vcpu)</div><div class='add'>+{</div><div class='add'>+	void *sve_state;</div><div class='add'>+</div><div class='add'>+	if (!vcpu_has_feature(&amp;hyp_vcpu-&gt;vcpu, KVM_ARM_VCPU_SVE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sve_state = kern_hyp_va(hyp_vcpu-&gt;vcpu.arch.sve_state);</div><div class='add'>+	hyp_unpin_shared_mem(sve_state,</div><div class='add'>+			     sve_state + vcpu_sve_state_size(&amp;hyp_vcpu-&gt;vcpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void unpin_host_vcpus(struct pkvm_hyp_vcpu *hyp_vcpus[],</div><div class='ctx'> 			     unsigned int nr_vcpus)</div><div class='ctx'> {</div><div class='hunk'>@@ -384,6 +396,7 @@ static void unpin_host_vcpus(struct pkvm_hyp_vcpu *hyp_vcpus[],</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		unpin_host_vcpu(hyp_vcpu-&gt;host_vcpu);</div><div class='add'>+		unpin_host_sve_state(hyp_vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -398,12 +411,40 @@ static void init_pkvm_hyp_vm(struct kvm *host_kvm, struct pkvm_hyp_vm *hyp_vm,</div><div class='ctx'> 	pkvm_init_features_from_host(hyp_vm, host_kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pkvm_vcpu_init_sve(struct pkvm_hyp_vcpu *hyp_vcpu, struct kvm_vcpu *host_vcpu)</div><div class='add'>+static int pkvm_vcpu_init_sve(struct pkvm_hyp_vcpu *hyp_vcpu, struct kvm_vcpu *host_vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu *vcpu = &amp;hyp_vcpu-&gt;vcpu;</div><div class='add'>+	unsigned int sve_max_vl;</div><div class='add'>+	size_t sve_state_size;</div><div class='add'>+	void *sve_state;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!vcpu_has_feature(vcpu, KVM_ARM_VCPU_SVE))</div><div class='add'>+	if (!vcpu_has_feature(vcpu, KVM_ARM_VCPU_SVE)) {</div><div class='ctx'> 		vcpu_clear_flag(vcpu, VCPU_SVE_FINALIZED);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Limit guest vector length to the maximum supported by the host. */</div><div class='add'>+	sve_max_vl = min(READ_ONCE(host_vcpu-&gt;arch.sve_max_vl), kvm_host_sve_max_vl);</div><div class='add'>+	sve_state_size = sve_state_size_from_vl(sve_max_vl);</div><div class='add'>+	sve_state = kern_hyp_va(READ_ONCE(host_vcpu-&gt;arch.sve_state));</div><div class='add'>+</div><div class='add'>+	if (!sve_state || !sve_state_size) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hyp_pin_shared_mem(sve_state, sve_state + sve_state_size);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.sve_state = sve_state;</div><div class='add'>+	vcpu-&gt;arch.sve_max_vl = sve_max_vl;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	clear_bit(KVM_ARM_VCPU_SVE, vcpu-&gt;kvm-&gt;arch.vcpu_features);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,</div><div class='hunk'>@@ -432,7 +473,7 @@ static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='del'>-	pkvm_vcpu_init_sve(hyp_vcpu, host_vcpu);</div><div class='add'>+	ret = pkvm_vcpu_init_sve(hyp_vcpu, host_vcpu);</div><div class='ctx'> done:</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		unpin_host_vcpu(host_vcpu);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/setup.c b/arch/arm64/kvm/hyp/nvhe/setup.c<br/>index d62bcb5634a2..a48d3f5a5afb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/setup.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@ static void *vmemmap_base;</div><div class='ctx'> static void *vm_table_base;</div><div class='ctx'> static void *hyp_pgt_base;</div><div class='ctx'> static void *host_s2_pgt_base;</div><div class='add'>+static void *selftest_base;</div><div class='ctx'> static void *ffa_proxy_pages;</div><div class='ctx'> static struct kvm_pgtable_mm_ops pkvm_pgtable_mm_ops;</div><div class='ctx'> static struct hyp_pool hpool;</div><div class='hunk'>@@ -38,6 +39,11 @@ static int divide_memory_pool(void *virt, unsigned long size)</div><div class='ctx'> </div><div class='ctx'> 	hyp_early_alloc_init(virt, size);</div><div class='ctx'> </div><div class='add'>+	nr_pages = pkvm_selftest_pages();</div><div class='add'>+	selftest_base = hyp_early_alloc_contig(nr_pages);</div><div class='add'>+	if (nr_pages &amp;&amp; !selftest_base)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	nr_pages = hyp_vmemmap_pages(sizeof(struct hyp_page));</div><div class='ctx'> 	vmemmap_base = hyp_early_alloc_contig(nr_pages);</div><div class='ctx'> 	if (!vmemmap_base)</div><div class='hunk'>@@ -119,6 +125,10 @@ static int recreate_hyp_mappings(phys_addr_t phys, unsigned long size,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	ret = pkvm_create_mappings(__hyp_data_start, __hyp_data_end, PAGE_HYP);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	ret = pkvm_create_mappings(__hyp_rodata_start, __hyp_rodata_end, PAGE_HYP_RO);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -180,6 +190,7 @@ static int fix_host_ownership_walker(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 				     enum kvm_pgtable_walk_flags visit)</div><div class='ctx'> {</div><div class='ctx'> 	enum pkvm_page_state state;</div><div class='add'>+	struct hyp_page *page;</div><div class='ctx'> 	phys_addr_t phys;</div><div class='ctx'> </div><div class='ctx'> 	if (!kvm_pte_valid(ctx-&gt;old))</div><div class='hunk'>@@ -192,19 +203,25 @@ static int fix_host_ownership_walker(const struct kvm_pgtable_visit_ctx *ctx,</div><div class='ctx'> 	if (!addr_is_memory(phys))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	page = hyp_phys_to_page(phys);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Adjust the host stage-2 mappings to match the ownership attributes</div><div class='del'>-	 * configured in the hypervisor stage-1.</div><div class='add'>+	 * configured in the hypervisor stage-1, and make sure to propagate them</div><div class='add'>+	 * to the hyp_vmemmap state.</div><div class='ctx'> 	 */</div><div class='ctx'> 	state = pkvm_getstate(kvm_pgtable_hyp_pte_prot(ctx-&gt;old));</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case PKVM_PAGE_OWNED:</div><div class='add'>+		set_hyp_state(page, PKVM_PAGE_OWNED);</div><div class='ctx'> 		return host_stage2_set_owner_locked(phys, PAGE_SIZE, PKVM_ID_HYP);</div><div class='ctx'> 	case PKVM_PAGE_SHARED_OWNED:</div><div class='del'>-		hyp_phys_to_page(phys)-&gt;host_state = PKVM_PAGE_SHARED_BORROWED;</div><div class='add'>+		set_hyp_state(page, PKVM_PAGE_SHARED_OWNED);</div><div class='add'>+		set_host_state(page, PKVM_PAGE_SHARED_BORROWED);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PKVM_PAGE_SHARED_BORROWED:</div><div class='del'>-		hyp_phys_to_page(phys)-&gt;host_state = PKVM_PAGE_SHARED_OWNED;</div><div class='add'>+		set_hyp_state(page, PKVM_PAGE_SHARED_BORROWED);</div><div class='add'>+		set_host_state(page, PKVM_PAGE_SHARED_OWNED);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -295,7 +312,7 @@ void __noreturn __pkvm_init_finalise(void)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ret = hyp_create_pcpu_fixmap();</div><div class='add'>+	ret = hyp_create_fixmap();</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -304,6 +321,8 @@ void __noreturn __pkvm_init_finalise(void)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	pkvm_hyp_vm_table_init(vm_table_base);</div><div class='add'>+</div><div class='add'>+	pkvm_ownership_selftest(selftest_base);</div><div class='ctx'> out:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We tail-called to here from handle___pkvm_init() and will not return,</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c<br/>index 7d2ba6ef0261..73affe1333a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/switch.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/nvhe/switch.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/nvhe/switch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/nvhe/switch.c</a></div><div class='hunk'>@@ -33,6 +33,18 @@ DEFINE_PER_CPU(struct kvm_host_data, kvm_host_data);</div><div class='ctx'> DEFINE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, kvm_hyp_vector);</div><div class='ctx'> </div><div class='add'>+struct fgt_masks hfgrtr_masks;</div><div class='add'>+struct fgt_masks hfgwtr_masks;</div><div class='add'>+struct fgt_masks hfgitr_masks;</div><div class='add'>+struct fgt_masks hdfgrtr_masks;</div><div class='add'>+struct fgt_masks hdfgwtr_masks;</div><div class='add'>+struct fgt_masks hafgrtr_masks;</div><div class='add'>+struct fgt_masks hfgrtr2_masks;</div><div class='add'>+struct fgt_masks hfgwtr2_masks;</div><div class='add'>+struct fgt_masks hfgitr2_masks;</div><div class='add'>+struct fgt_masks hdfgrtr2_masks;</div><div class='add'>+struct fgt_masks hdfgwtr2_masks;</div><div class='add'>+</div><div class='ctx'> extern void kvm_nvhe_prepare_backtrace(unsigned long fp, unsigned long pc);</div><div class='ctx'> </div><div class='ctx'> static void __activate_cptr_traps(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -142,7 +154,7 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	__deactivate_traps_common(vcpu);</div><div class='ctx'> </div><div class='del'>-	write_sysreg(this_cpu_ptr(&amp;kvm_init_params)-&gt;hcr_el2, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(this_cpu_ptr(&amp;kvm_init_params)-&gt;hcr_el2);</div><div class='ctx'> </div><div class='ctx'> 	__deactivate_cptr_traps(vcpu);</div><div class='ctx'> 	write_sysreg(__kvm_hyp_host_vector, vbar_el2);</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c<br/>index df5cc74a7dd0..c351b4abd5db 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/pgtable.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/pgtable.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/pgtable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/pgtable.c</a></div><div class='hunk'>@@ -11,12 +11,6 @@</div><div class='ctx'> #include &lt;asm/kvm_pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/stage2_pgtable.h&gt;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#define KVM_PTE_TYPE			BIT(1)</div><div class='del'>-#define KVM_PTE_TYPE_BLOCK		0</div><div class='del'>-#define KVM_PTE_TYPE_PAGE		1</div><div class='del'>-#define KVM_PTE_TYPE_TABLE		1</div><div class='del'>-</div><div class='ctx'> struct kvm_pgtable_walk_data {</div><div class='ctx'> 	struct kvm_pgtable_walker	*walker;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c<br/>index ed363aa3027e..f162b0df5cae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/vgic-v3-sr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/vgic-v3-sr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/vgic-v3-sr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/vgic-v3-sr.c</a></div><div class='hunk'>@@ -429,23 +429,27 @@ u64 __vgic_v3_get_gic_config(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * To check whether we have a MMIO-based (GICv2 compatible)</div><div class='ctx'> 	 * CPU interface, we need to disable the system register</div><div class='del'>-	 * view. To do that safely, we have to prevent any interrupt</div><div class='del'>-	 * from firing (which would be deadly).</div><div class='add'>+	 * view.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Note that this only makes sense on VHE, as interrupts are</div><div class='del'>-	 * already masked for nVHE as part of the exception entry to</div><div class='del'>-	 * EL2.</div><div class='del'>-	 */</div><div class='del'>-	if (has_vhe())</div><div class='del'>-		flags = local_daif_save();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * Table 11-2 "Permitted ICC_SRE_ELx.SRE settings" indicates</div><div class='ctx'> 	 * that to be able to set ICC_SRE_EL1.SRE to 0, all the</div><div class='ctx'> 	 * interrupt overrides must be set. You've got to love this.</div><div class='add'>+	 *</div><div class='add'>+	 * As we always run VHE with HCR_xMO set, no extra xMO</div><div class='add'>+	 * manipulation is required in that case.</div><div class='add'>+	 *</div><div class='add'>+	 * To safely disable SRE, we have to prevent any interrupt</div><div class='add'>+	 * from firing (which would be deadly). This only makes sense</div><div class='add'>+	 * on VHE, as interrupts are already masked for nVHE as part</div><div class='add'>+	 * of the exception entry to EL2.</div><div class='ctx'> 	 */</div><div class='del'>-	sysreg_clear_set(hcr_el2, 0, HCR_AMO | HCR_FMO | HCR_IMO);</div><div class='del'>-	isb();</div><div class='add'>+	if (has_vhe()) {</div><div class='add'>+		flags = local_daif_save();</div><div class='add'>+	} else {</div><div class='add'>+		sysreg_clear_set_hcr(0, HCR_AMO | HCR_FMO | HCR_IMO);</div><div class='add'>+		isb();</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	write_gicreg(0, ICC_SRE_EL1);</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='hunk'>@@ -453,11 +457,13 @@ u64 __vgic_v3_get_gic_config(void)</div><div class='ctx'> </div><div class='ctx'> 	write_gicreg(sre, ICC_SRE_EL1);</div><div class='ctx'> 	isb();</div><div class='del'>-	sysreg_clear_set(hcr_el2, HCR_AMO | HCR_FMO | HCR_IMO, 0);</div><div class='del'>-	isb();</div><div class='ctx'> </div><div class='del'>-	if (has_vhe())</div><div class='add'>+	if (has_vhe()) {</div><div class='ctx'> 		local_daif_restore(flags);</div><div class='add'>+	} else {</div><div class='add'>+		sysreg_clear_set_hcr(HCR_AMO | HCR_FMO | HCR_IMO, 0);</div><div class='add'>+		isb();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	val  = (val &amp; ICC_SRE_EL1_SRE) ? 0 : (1ULL &lt;&lt; 63);</div><div class='ctx'> 	val |= read_gicreg(ICH_VTR_EL2);</div><div class='hunk'>@@ -1052,11 +1058,11 @@ static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	switch (sysreg) {</div><div class='ctx'> 	case SYS_ICC_IGRPEN0_EL1:</div><div class='ctx'> 		if (is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGRTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		if (!is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGWTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		fallthrough;</div><div class='hunk'>@@ -1073,11 +1079,11 @@ static bool __vgic_v3_check_trap_forwarding(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	case SYS_ICC_IGRPEN1_EL1:</div><div class='ctx'> 		if (is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGRTR_EL2) &amp; HFGRTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		if (!is_read &amp;&amp;</div><div class='del'>-		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGxTR_EL2_ICC_IGRPENn_EL1))</div><div class='add'>+		    (__vcpu_sys_reg(vcpu, HFGWTR_EL2) &amp; HFGWTR_EL2_ICC_IGRPENn_EL1))</div><div class='ctx'> 			return true;</div><div class='ctx'> </div><div class='ctx'> 		fallthrough;</div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c<br/>index 731a0378ed13..c9b330dc2066 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/vhe/switch.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/vhe/switch.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/vhe/switch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/vhe/switch.c</a></div><div class='hunk'>@@ -48,21 +48,46 @@ DEFINE_PER_CPU(unsigned long, kvm_hyp_vector);</div><div class='ctx'> </div><div class='ctx'> static u64 __compute_hcr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	u64 guest_hcr = __vcpu_sys_reg(vcpu, HCR_EL2);</div><div class='ctx'> 	u64 hcr = vcpu-&gt;arch.hcr_el2;</div><div class='ctx'> </div><div class='ctx'> 	if (!vcpu_has_nv(vcpu))</div><div class='ctx'> 		return hcr;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * We rely on the invariant that a vcpu entered from HYP</div><div class='add'>+	 * context must also exit in the same context, as only an ERET</div><div class='add'>+	 * instruction can kick us out of it, and we obviously trap</div><div class='add'>+	 * that sucker. PSTATE.M will get fixed-up on exit.</div><div class='add'>+	 */</div><div class='ctx'> 	if (is_hyp_ctxt(vcpu)) {</div><div class='add'>+		host_data_set_flag(VCPU_IN_HYP_CONTEXT);</div><div class='add'>+</div><div class='ctx'> 		hcr |= HCR_NV | HCR_NV2 | HCR_AT | HCR_TTLB;</div><div class='ctx'> </div><div class='ctx'> 		if (!vcpu_el2_e2h_is_set(vcpu))</div><div class='ctx'> 			hcr |= HCR_NV1;</div><div class='ctx'> </div><div class='ctx'> 		write_sysreg_s(vcpu-&gt;arch.ctxt.vncr_array, SYS_VNCR_EL2);</div><div class='add'>+	} else {</div><div class='add'>+		host_data_clear_flag(VCPU_IN_HYP_CONTEXT);</div><div class='add'>+</div><div class='add'>+		if (guest_hcr &amp; HCR_NV) {</div><div class='add'>+			u64 va = __fix_to_virt(vncr_fixmap(smp_processor_id()));</div><div class='add'>+</div><div class='add'>+			/* Inherit the low bits from the actual register */</div><div class='add'>+			va |= __vcpu_sys_reg(vcpu, VNCR_EL2) &amp; GENMASK(PAGE_SHIFT - 1, 0);</div><div class='add'>+			write_sysreg_s(va, SYS_VNCR_EL2);</div><div class='add'>+</div><div class='add'>+			/* Force NV2 in case the guest is forgetful... */</div><div class='add'>+			guest_hcr |= HCR_NV2;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return hcr | (__vcpu_sys_reg(vcpu, HCR_EL2) &amp; ~NV_HCR_GUEST_EXCLUDE);</div><div class='add'>+	BUG_ON(host_data_test_flag(VCPU_IN_HYP_CONTEXT) &amp;&amp;</div><div class='add'>+	       host_data_test_flag(L1_VNCR_MAPPED));</div><div class='add'>+</div><div class='add'>+	return hcr | (guest_hcr &amp; ~NV_HCR_GUEST_EXCLUDE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __activate_cptr_traps(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -184,7 +209,7 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	___deactivate_traps(vcpu);</div><div class='ctx'> </div><div class='del'>-	write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(HCR_HOST_VHE_FLAGS);</div><div class='ctx'> </div><div class='ctx'> 	if (has_cntpoff()) {</div><div class='ctx'> 		struct timer_map map;</div><div class='hunk'>@@ -459,6 +484,14 @@ static bool kvm_hyp_handle_tlbi_el2(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If we have to check for any VNCR mapping being invalidated,</div><div class='add'>+	 * go back to the slow path for further processing.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu) &amp;&amp;</div><div class='add'>+	    atomic_read(&amp;vcpu-&gt;kvm-&gt;arch.vncr_map_count))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	__kvm_skip_instr(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -568,9 +601,12 @@ static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we were in HYP context on entry, adjust the PSTATE view</div><div class='del'>-	 * so that the usual helpers work correctly.</div><div class='add'>+	 * so that the usual helpers work correctly. This enforces our</div><div class='add'>+	 * invariant that the guest's HYP context status is preserved</div><div class='add'>+	 * across a run.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu_has_nv(vcpu) &amp;&amp; (read_sysreg(hcr_el2) &amp; HCR_NV)) {</div><div class='add'>+	if (vcpu_has_nv(vcpu) &amp;&amp;</div><div class='add'>+	    unlikely(host_data_test_flag(VCPU_IN_HYP_CONTEXT))) {</div><div class='ctx'> 		u64 mode = *vcpu_cpsr(vcpu) &amp; (PSR_MODE_MASK | PSR_MODE32_BIT);</div><div class='ctx'> </div><div class='ctx'> 		switch (mode) {</div><div class='hunk'>@@ -586,6 +622,10 @@ static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)</div><div class='ctx'> 		*vcpu_cpsr(vcpu) |= mode;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Apply extreme paranoia! */</div><div class='add'>+	BUG_ON(vcpu_has_nv(vcpu) &amp;&amp;</div><div class='add'>+	       !!host_data_test_flag(VCPU_IN_HYP_CONTEXT) != is_hyp_ctxt(vcpu));</div><div class='add'>+</div><div class='ctx'> 	return __fixup_guest_exit(vcpu, exit_code, hyp_exit_handlers);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/hyp/vhe/tlb.c b/arch/arm64/kvm/hyp/vhe/tlb.c<br/>index 3d50a1bd2bdb..ec2569818629 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/vhe/tlb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/hyp/vhe/tlb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/hyp/vhe/tlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/hyp/vhe/tlb.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static void enter_vmid_context(struct kvm_s2_mmu *mmu,</div><div class='ctx'> 	__load_stage2(mmu, mmu-&gt;arch);</div><div class='ctx'> 	val = read_sysreg(hcr_el2);</div><div class='ctx'> 	val &amp;= ~HCR_TGE;</div><div class='del'>-	write_sysreg(val, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(val);</div><div class='ctx'> 	isb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +73,7 @@ static void exit_vmid_context(struct tlb_inv_context *cxt)</div><div class='ctx'> 	 * We're done with the TLB operation, let's restore the host's</div><div class='ctx'> 	 * view of HCR_EL2.</div><div class='ctx'> 	 */</div><div class='del'>-	write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);</div><div class='add'>+	write_sysreg_hcr(HCR_HOST_VHE_FLAGS);</div><div class='ctx'> 	isb();</div><div class='ctx'> </div><div class='ctx'> 	/* ... and the stage-2 MMU context that we switched away from */</div><div class='head'>diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c<br/>index 2feb6c6b63af..2942ec92c5a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/mmu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/mmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/mmu.c</a></div><div class='hunk'>@@ -1304,6 +1304,10 @@ static bool fault_supports_stage2_huge_mapping(struct kvm_memory_slot *memslot,</div><div class='ctx'> 	if (map_size == PAGE_SIZE)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	/* pKVM only supports PMD_SIZE huge-mappings */</div><div class='add'>+	if (is_protected_kvm_enabled() &amp;&amp; map_size != PMD_SIZE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	size = memslot-&gt;npages * PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	gpa_start = memslot-&gt;base_gfn &lt;&lt; PAGE_SHIFT;</div><div class='hunk'>@@ -1501,6 +1505,11 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!is_protected_kvm_enabled())</div><div class='add'>+		memcache = &amp;vcpu-&gt;arch.mmu_page_cache;</div><div class='add'>+	else</div><div class='add'>+		memcache = &amp;vcpu-&gt;arch.pkvm_memcache;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Permission faults just need to update the existing leaf entry,</div><div class='ctx'> 	 * and so normally don't require allocations from the memcache. The</div><div class='hunk'>@@ -1510,13 +1519,11 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 	if (!fault_is_perm || (logging_active &amp;&amp; write_fault)) {</div><div class='ctx'> 		int min_pages = kvm_mmu_cache_min_pages(vcpu-&gt;arch.hw_mmu);</div><div class='ctx'> </div><div class='del'>-		if (!is_protected_kvm_enabled()) {</div><div class='del'>-			memcache = &amp;vcpu-&gt;arch.mmu_page_cache;</div><div class='add'>+		if (!is_protected_kvm_enabled())</div><div class='ctx'> 			ret = kvm_mmu_topup_memory_cache(memcache, min_pages);</div><div class='del'>-		} else {</div><div class='del'>-			memcache = &amp;vcpu-&gt;arch.pkvm_memcache;</div><div class='add'>+		else</div><div class='ctx'> 			ret = topup_hyp_memcache(memcache, min_pages);</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1537,7 +1544,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,</div><div class='ctx'> 	 * logging_active is guaranteed to never be true for VM_PFNMAP</div><div class='ctx'> 	 * memslots.</div><div class='ctx'> 	 */</div><div class='del'>-	if (logging_active || is_protected_kvm_enabled()) {</div><div class='add'>+	if (logging_active) {</div><div class='ctx'> 		force_pte = true;</div><div class='ctx'> 		vma_shift = PAGE_SHIFT;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1794,9 +1801,28 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	gfn_t gfn;</div><div class='ctx'> 	int ret, idx;</div><div class='ctx'> </div><div class='add'>+	/* Synchronous External Abort? */</div><div class='add'>+	if (kvm_vcpu_abt_issea(vcpu)) {</div><div class='add'>+		/*</div><div class='add'>+		 * For RAS the host kernel may handle this abort.</div><div class='add'>+		 * There is no need to pass the error into the guest.</div><div class='add'>+		 */</div><div class='add'>+		if (kvm_handle_guest_sea())</div><div class='add'>+			kvm_inject_vabt(vcpu);</div><div class='add'>+</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	esr = kvm_vcpu_get_esr(vcpu);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The fault IPA should be reliable at this point as we're not dealing</div><div class='add'>+	 * with an SEA.</div><div class='add'>+	 */</div><div class='ctx'> 	ipa = fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);</div><div class='add'>+	if (KVM_BUG_ON(ipa == INVALID_GPA, vcpu-&gt;kvm))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='ctx'> 	is_iabt = kvm_vcpu_trap_is_iabt(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (esr_fsc_is_translation_fault(esr)) {</div><div class='hunk'>@@ -1818,18 +1844,6 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Synchronous External Abort? */</div><div class='del'>-	if (kvm_vcpu_abt_issea(vcpu)) {</div><div class='del'>-		/*</div><div class='del'>-		 * For RAS the host kernel may handle this abort.</div><div class='del'>-		 * There is no need to pass the error into the guest.</div><div class='del'>-		 */</div><div class='del'>-		if (kvm_handle_guest_sea(fault_ipa, kvm_vcpu_get_esr(vcpu)))</div><div class='del'>-			kvm_inject_vabt(vcpu);</div><div class='del'>-</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_esr(vcpu),</div><div class='ctx'> 			      kvm_vcpu_get_hfar(vcpu), fault_ipa);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c<br/>index 4a3fc11f7ecf..291dbe38eb5c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/nested.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/nested.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/nested.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/kvm.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_arm.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_emulate.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='hunk'>@@ -16,6 +17,24 @@</div><div class='ctx'> </div><div class='ctx'> #include "sys_regs.h"</div><div class='ctx'> </div><div class='add'>+struct vncr_tlb {</div><div class='add'>+	/* The guest's VNCR_EL2 */</div><div class='add'>+	u64			gva;</div><div class='add'>+	struct s1_walk_info	wi;</div><div class='add'>+	struct s1_walk_result	wr;</div><div class='add'>+</div><div class='add'>+	u64			hpa;</div><div class='add'>+</div><div class='add'>+	/* -1 when not mapped on a CPU */</div><div class='add'>+	int			cpu;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * true if the TLB is valid. Can only be changed with the</div><div class='add'>+	 * mmu_lock held.</div><div class='add'>+	 */</div><div class='add'>+	bool			valid;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Ratio of live shadow S2 MMU per vcpu. This is a trade-off between</div><div class='ctx'>  * memory usage and potential number of different sets of S2 PTs in</div><div class='hunk'>@@ -28,6 +47,7 @@ void kvm_init_nested(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	kvm-&gt;arch.nested_mmus = NULL;</div><div class='ctx'> 	kvm-&gt;arch.nested_mmus_size = 0;</div><div class='add'>+	atomic_set(&amp;kvm-&gt;arch.vncr_map_count, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int init_nested_s2_mmu(struct kvm *kvm, struct kvm_s2_mmu *mmu)</div><div class='hunk'>@@ -55,6 +75,13 @@ int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	    !cpus_have_final_cap(ARM64_HAS_HCR_NV1))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (!vcpu-&gt;arch.ctxt.vncr_array)</div><div class='add'>+		vcpu-&gt;arch.ctxt.vncr_array = (u64 *)__get_free_page(GFP_KERNEL_ACCOUNT |</div><div class='add'>+								    __GFP_ZERO);</div><div class='add'>+</div><div class='add'>+	if (!vcpu-&gt;arch.ctxt.vncr_array)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Let's treat memory allocation failures as benign: If we fail to</div><div class='ctx'> 	 * allocate anything, return an error and keep the allocated array</div><div class='hunk'>@@ -85,6 +112,9 @@ int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		for (int i = kvm-&gt;arch.nested_mmus_size; i &lt; num_mmus; i++)</div><div class='ctx'> 			kvm_free_stage2_pgd(&amp;kvm-&gt;arch.nested_mmus[i]);</div><div class='ctx'> </div><div class='add'>+		free_page((unsigned long)vcpu-&gt;arch.ctxt.vncr_array);</div><div class='add'>+		vcpu-&gt;arch.ctxt.vncr_array = NULL;</div><div class='add'>+</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -405,6 +435,30 @@ static unsigned int ttl_to_size(u8 ttl)</div><div class='ctx'> 	return max_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 pgshift_level_to_ttl(u16 shift, u8 level)</div><div class='add'>+{</div><div class='add'>+	u8 ttl;</div><div class='add'>+</div><div class='add'>+	switch(shift) {</div><div class='add'>+	case 12:</div><div class='add'>+		ttl = TLBI_TTL_TG_4K;</div><div class='add'>+		break;</div><div class='add'>+	case 14:</div><div class='add'>+		ttl = TLBI_TTL_TG_16K;</div><div class='add'>+		break;</div><div class='add'>+	case 16:</div><div class='add'>+		ttl = TLBI_TTL_TG_64K;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ttl &lt;&lt;= 2;</div><div class='add'>+	ttl |= level &amp; 3;</div><div class='add'>+</div><div class='add'>+	return ttl;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Compute the equivalent of the TTL field by parsing the shadow PT.  The</div><div class='ctx'>  * granule size is extracted from the cached VTCR_EL2.TG0 while the level is</div><div class='hunk'>@@ -676,23 +730,36 @@ void kvm_init_nested_s2_mmu(struct kvm_s2_mmu *mmu)</div><div class='ctx'> void kvm_vcpu_load_hw_mmu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * The vCPU kept its reference on the MMU after the last put, keep</div><div class='del'>-	 * rolling with it.</div><div class='add'>+	 * If the vCPU kept its reference on the MMU after the last put,</div><div class='add'>+	 * keep rolling with it.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vcpu-&gt;arch.hw_mmu)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	if (is_hyp_ctxt(vcpu)) {</div><div class='del'>-		vcpu-&gt;arch.hw_mmu = &amp;vcpu-&gt;kvm-&gt;arch.mmu;</div><div class='add'>+		if (!vcpu-&gt;arch.hw_mmu)</div><div class='add'>+			vcpu-&gt;arch.hw_mmu = &amp;vcpu-&gt;kvm-&gt;arch.mmu;</div><div class='ctx'> 	} else {</div><div class='del'>-		write_lock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='del'>-		vcpu-&gt;arch.hw_mmu = get_s2_mmu_nested(vcpu);</div><div class='del'>-		write_unlock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+		if (!vcpu-&gt;arch.hw_mmu) {</div><div class='add'>+			scoped_guard(write_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock)</div><div class='add'>+				vcpu-&gt;arch.hw_mmu = get_s2_mmu_nested(vcpu);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (__vcpu_sys_reg(vcpu, HCR_EL2) &amp; HCR_NV)</div><div class='add'>+			kvm_make_request(KVM_REQ_MAP_L1_VNCR_EL2, vcpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_vcpu_put_hw_mmu(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	/* Unconditionally drop the VNCR mapping if we have one */</div><div class='add'>+	if (host_data_test_flag(L1_VNCR_MAPPED)) {</div><div class='add'>+		BUG_ON(vcpu-&gt;arch.vncr_tlb-&gt;cpu != smp_processor_id());</div><div class='add'>+		BUG_ON(is_hyp_ctxt(vcpu));</div><div class='add'>+</div><div class='add'>+		clear_fixmap(vncr_fixmap(vcpu-&gt;arch.vncr_tlb-&gt;cpu));</div><div class='add'>+		vcpu-&gt;arch.vncr_tlb-&gt;cpu = -1;</div><div class='add'>+		host_data_clear_flag(L1_VNCR_MAPPED);</div><div class='add'>+		atomic_dec(&amp;vcpu-&gt;kvm-&gt;arch.vncr_map_count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Keep a reference on the associated stage-2 MMU if the vCPU is</div><div class='ctx'> 	 * scheduling out and not in WFI emulation, suggesting it is likely to</div><div class='hunk'>@@ -743,6 +810,245 @@ int kvm_inject_s2_fault(struct kvm_vcpu *vcpu, u64 esr_el2)</div><div class='ctx'> 	return kvm_inject_nested_sync(vcpu, esr_el2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void invalidate_vncr(struct vncr_tlb *vt)</div><div class='add'>+{</div><div class='add'>+	vt-&gt;valid = false;</div><div class='add'>+	if (vt-&gt;cpu != -1)</div><div class='add'>+		clear_fixmap(vncr_fixmap(vt-&gt;cpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_invalidate_vncr_ipa(struct kvm *kvm, u64 start, u64 end)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	if (!kvm_has_feat(kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+		struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+		u64 ipa_start, ipa_end, ipa_size;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Careful here: We end-up here from an MMU notifier,</div><div class='add'>+		 * and this can race against a vcpu not being onlined</div><div class='add'>+		 * yet, without the pseudo-TLB being allocated.</div><div class='add'>+		 *</div><div class='add'>+		 * Skip those, as they obviously don't participate in</div><div class='add'>+		 * the invalidation at this stage.</div><div class='add'>+		 */</div><div class='add'>+		if (!vt)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!vt-&gt;valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ipa_size = ttl_to_size(pgshift_level_to_ttl(vt-&gt;wi.pgshift,</div><div class='add'>+							    vt-&gt;wr.level));</div><div class='add'>+		ipa_start = vt-&gt;wr.pa &amp; (ipa_size - 1);</div><div class='add'>+		ipa_end = ipa_start + ipa_size;</div><div class='add'>+</div><div class='add'>+		if (ipa_end &lt;= start || ipa_start &gt;= end)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		invalidate_vncr(vt);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct s1e2_tlbi_scope {</div><div class='add'>+	enum {</div><div class='add'>+		TLBI_ALL,</div><div class='add'>+		TLBI_VA,</div><div class='add'>+		TLBI_VAA,</div><div class='add'>+		TLBI_ASID,</div><div class='add'>+	} type;</div><div class='add'>+</div><div class='add'>+	u16 asid;</div><div class='add'>+	u64 va;</div><div class='add'>+	u64 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void invalidate_vncr_va(struct kvm *kvm,</div><div class='add'>+			       struct s1e2_tlbi_scope *scope)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+		struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+		u64 va_start, va_end, va_size;</div><div class='add'>+</div><div class='add'>+		if (!vt-&gt;valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		va_size = ttl_to_size(pgshift_level_to_ttl(vt-&gt;wi.pgshift,</div><div class='add'>+							   vt-&gt;wr.level));</div><div class='add'>+		va_start = vt-&gt;gva &amp; (va_size - 1);</div><div class='add'>+		va_end = va_start + va_size;</div><div class='add'>+</div><div class='add'>+		switch (scope-&gt;type) {</div><div class='add'>+		case TLBI_ALL:</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case TLBI_VA:</div><div class='add'>+			if (va_end &lt;= scope-&gt;va ||</div><div class='add'>+			    va_start &gt;= (scope-&gt;va + scope-&gt;size))</div><div class='add'>+				continue;</div><div class='add'>+			if (vt-&gt;wr.nG &amp;&amp; vt-&gt;wr.asid != scope-&gt;asid)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case TLBI_VAA:</div><div class='add'>+			if (va_end &lt;= scope-&gt;va ||</div><div class='add'>+			    va_start &gt;= (scope-&gt;va + scope-&gt;size))</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case TLBI_ASID:</div><div class='add'>+			if (!vt-&gt;wr.nG || vt-&gt;wr.asid != scope-&gt;asid)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		invalidate_vncr(vt);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void compute_s1_tlbi_range(struct kvm_vcpu *vcpu, u32 inst, u64 val,</div><div class='add'>+				  struct s1e2_tlbi_scope *scope)</div><div class='add'>+{</div><div class='add'>+	switch (inst) {</div><div class='add'>+	case OP_TLBI_ALLE2:</div><div class='add'>+	case OP_TLBI_ALLE2IS:</div><div class='add'>+	case OP_TLBI_ALLE2OS:</div><div class='add'>+	case OP_TLBI_VMALLE1:</div><div class='add'>+	case OP_TLBI_VMALLE1IS:</div><div class='add'>+	case OP_TLBI_VMALLE1OS:</div><div class='add'>+	case OP_TLBI_ALLE2NXS:</div><div class='add'>+	case OP_TLBI_ALLE2ISNXS:</div><div class='add'>+	case OP_TLBI_ALLE2OSNXS:</div><div class='add'>+	case OP_TLBI_VMALLE1NXS:</div><div class='add'>+	case OP_TLBI_VMALLE1ISNXS:</div><div class='add'>+	case OP_TLBI_VMALLE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_ALL;</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_VAE2:</div><div class='add'>+	case OP_TLBI_VAE2IS:</div><div class='add'>+	case OP_TLBI_VAE2OS:</div><div class='add'>+	case OP_TLBI_VAE1:</div><div class='add'>+	case OP_TLBI_VAE1IS:</div><div class='add'>+	case OP_TLBI_VAE1OS:</div><div class='add'>+	case OP_TLBI_VAE2NXS:</div><div class='add'>+	case OP_TLBI_VAE2ISNXS:</div><div class='add'>+	case OP_TLBI_VAE2OSNXS:</div><div class='add'>+	case OP_TLBI_VAE1NXS:</div><div class='add'>+	case OP_TLBI_VAE1ISNXS:</div><div class='add'>+	case OP_TLBI_VAE1OSNXS:</div><div class='add'>+	case OP_TLBI_VALE2:</div><div class='add'>+	case OP_TLBI_VALE2IS:</div><div class='add'>+	case OP_TLBI_VALE2OS:</div><div class='add'>+	case OP_TLBI_VALE1:</div><div class='add'>+	case OP_TLBI_VALE1IS:</div><div class='add'>+	case OP_TLBI_VALE1OS:</div><div class='add'>+	case OP_TLBI_VALE2NXS:</div><div class='add'>+	case OP_TLBI_VALE2ISNXS:</div><div class='add'>+	case OP_TLBI_VALE2OSNXS:</div><div class='add'>+	case OP_TLBI_VALE1NXS:</div><div class='add'>+	case OP_TLBI_VALE1ISNXS:</div><div class='add'>+	case OP_TLBI_VALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VA;</div><div class='add'>+		scope-&gt;size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val));</div><div class='add'>+		if (!scope-&gt;size)</div><div class='add'>+			scope-&gt;size = SZ_1G;</div><div class='add'>+		scope-&gt;va = (val &lt;&lt; 12) &amp; ~(scope-&gt;size - 1);</div><div class='add'>+		scope-&gt;asid = FIELD_GET(TLBIR_ASID_MASK, val);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_ASIDE1:</div><div class='add'>+	case OP_TLBI_ASIDE1IS:</div><div class='add'>+	case OP_TLBI_ASIDE1OS:</div><div class='add'>+	case OP_TLBI_ASIDE1NXS:</div><div class='add'>+	case OP_TLBI_ASIDE1ISNXS:</div><div class='add'>+	case OP_TLBI_ASIDE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_ASID;</div><div class='add'>+		scope-&gt;asid = FIELD_GET(TLBIR_ASID_MASK, val);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_VAAE1:</div><div class='add'>+	case OP_TLBI_VAAE1IS:</div><div class='add'>+	case OP_TLBI_VAAE1OS:</div><div class='add'>+	case OP_TLBI_VAAE1NXS:</div><div class='add'>+	case OP_TLBI_VAAE1ISNXS:</div><div class='add'>+	case OP_TLBI_VAAE1OSNXS:</div><div class='add'>+	case OP_TLBI_VAALE1:</div><div class='add'>+	case OP_TLBI_VAALE1IS:</div><div class='add'>+	case OP_TLBI_VAALE1OS:</div><div class='add'>+	case OP_TLBI_VAALE1NXS:</div><div class='add'>+	case OP_TLBI_VAALE1ISNXS:</div><div class='add'>+	case OP_TLBI_VAALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VAA;</div><div class='add'>+		scope-&gt;size = ttl_to_size(FIELD_GET(TLBI_TTL_MASK, val));</div><div class='add'>+		if (!scope-&gt;size)</div><div class='add'>+			scope-&gt;size = SZ_1G;</div><div class='add'>+		scope-&gt;va = (val &lt;&lt; 12) &amp; ~(scope-&gt;size - 1);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_RVAE2:</div><div class='add'>+	case OP_TLBI_RVAE2IS:</div><div class='add'>+	case OP_TLBI_RVAE2OS:</div><div class='add'>+	case OP_TLBI_RVAE1:</div><div class='add'>+	case OP_TLBI_RVAE1IS:</div><div class='add'>+	case OP_TLBI_RVAE1OS:</div><div class='add'>+	case OP_TLBI_RVAE2NXS:</div><div class='add'>+	case OP_TLBI_RVAE2ISNXS:</div><div class='add'>+	case OP_TLBI_RVAE2OSNXS:</div><div class='add'>+	case OP_TLBI_RVAE1NXS:</div><div class='add'>+	case OP_TLBI_RVAE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVAE1OSNXS:</div><div class='add'>+	case OP_TLBI_RVALE2:</div><div class='add'>+	case OP_TLBI_RVALE2IS:</div><div class='add'>+	case OP_TLBI_RVALE2OS:</div><div class='add'>+	case OP_TLBI_RVALE1:</div><div class='add'>+	case OP_TLBI_RVALE1IS:</div><div class='add'>+	case OP_TLBI_RVALE1OS:</div><div class='add'>+	case OP_TLBI_RVALE2NXS:</div><div class='add'>+	case OP_TLBI_RVALE2ISNXS:</div><div class='add'>+	case OP_TLBI_RVALE2OSNXS:</div><div class='add'>+	case OP_TLBI_RVALE1NXS:</div><div class='add'>+	case OP_TLBI_RVALE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VA;</div><div class='add'>+		scope-&gt;va = decode_range_tlbi(val, &amp;scope-&gt;size, &amp;scope-&gt;asid);</div><div class='add'>+		break;</div><div class='add'>+	case OP_TLBI_RVAAE1:</div><div class='add'>+	case OP_TLBI_RVAAE1IS:</div><div class='add'>+	case OP_TLBI_RVAAE1OS:</div><div class='add'>+	case OP_TLBI_RVAAE1NXS:</div><div class='add'>+	case OP_TLBI_RVAAE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVAAE1OSNXS:</div><div class='add'>+	case OP_TLBI_RVAALE1:</div><div class='add'>+	case OP_TLBI_RVAALE1IS:</div><div class='add'>+	case OP_TLBI_RVAALE1OS:</div><div class='add'>+	case OP_TLBI_RVAALE1NXS:</div><div class='add'>+	case OP_TLBI_RVAALE1ISNXS:</div><div class='add'>+	case OP_TLBI_RVAALE1OSNXS:</div><div class='add'>+		scope-&gt;type = TLBI_VAA;</div><div class='add'>+		scope-&gt;va = decode_range_tlbi(val, &amp;scope-&gt;size, NULL);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_handle_s1e2_tlbi(struct kvm_vcpu *vcpu, u32 inst, u64 val)</div><div class='add'>+{</div><div class='add'>+	struct s1e2_tlbi_scope scope = {};</div><div class='add'>+</div><div class='add'>+	compute_s1_tlbi_range(vcpu, inst, val, &amp;scope);</div><div class='add'>+</div><div class='add'>+	guard(write_lock)(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+	invalidate_vncr_va(vcpu-&gt;kvm, &amp;scope);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void kvm_nested_s2_wp(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -755,6 +1061,8 @@ void kvm_nested_s2_wp(struct kvm *kvm)</div><div class='ctx'> 		if (kvm_s2_mmu_valid(mmu))</div><div class='ctx'> 			kvm_stage2_wp_range(mmu, 0, kvm_phys_size(mmu));</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	kvm_invalidate_vncr_ipa(kvm, 0, BIT(kvm-&gt;arch.mmu.pgt-&gt;ia_bits));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_nested_s2_unmap(struct kvm *kvm, bool may_block)</div><div class='hunk'>@@ -769,6 +1077,8 @@ void kvm_nested_s2_unmap(struct kvm *kvm, bool may_block)</div><div class='ctx'> 		if (kvm_s2_mmu_valid(mmu))</div><div class='ctx'> 			kvm_stage2_unmap_range(mmu, 0, kvm_phys_size(mmu), may_block);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	kvm_invalidate_vncr_ipa(kvm, 0, BIT(kvm-&gt;arch.mmu.pgt-&gt;ia_bits));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_nested_s2_flush(struct kvm *kvm)</div><div class='hunk'>@@ -802,6 +1112,295 @@ void kvm_arch_flush_shadow_all(struct kvm *kvm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Dealing with VNCR_EL2 exposed by the *guest* is a complicated matter:</div><div class='add'>+ *</div><div class='add'>+ * - We introduce an internal representation of a vcpu-private TLB,</div><div class='add'>+ *   representing the mapping between the guest VA contained in VNCR_EL2,</div><div class='add'>+ *   the IPA the guest's EL2 PTs point to, and the actual PA this lives at.</div><div class='add'>+ *</div><div class='add'>+ * - On translation fault from a nested VNCR access, we create such a TLB.</div><div class='add'>+ *   If there is no mapping to describe, the guest inherits the fault.</div><div class='add'>+ *   Crucially, no actual mapping is done at this stage.</div><div class='add'>+ *</div><div class='add'>+ * - On vcpu_load() in a non-HYP context with HCR_EL2.NV==1, if the above</div><div class='add'>+ *   TLB exists, we map it in the fixmap for this CPU, and run with it. We</div><div class='add'>+ *   have to respect the permissions dictated by the guest, but not the</div><div class='add'>+ *   memory type (FWB is a must).</div><div class='add'>+ *</div><div class='add'>+ * - Note that we usually don't do a vcpu_load() on the back of a fault</div><div class='add'>+ *   (unless we are preempted), so the resolution of a translation fault</div><div class='add'>+ *   must go via a request that will map the VNCR page in the fixmap.</div><div class='add'>+ *   vcpu_load() might as well use the same mechanism.</div><div class='add'>+ *</div><div class='add'>+ * - On vcpu_put() in a non-HYP context with HCR_EL2.NV==1, if the TLB was</div><div class='add'>+ *   mapped, we unmap it. Yes it is that simple. The TLB still exists</div><div class='add'>+ *   though, and may be reused at a later load.</div><div class='add'>+ *</div><div class='add'>+ * - On permission fault, we simply forward the fault to the guest's EL2.</div><div class='add'>+ *   Get out of my way.</div><div class='add'>+ *</div><div class='add'>+ * - On any TLBI for the EL2&amp;0 translation regime, we must find any TLB that</div><div class='add'>+ *   intersects with the TLBI request, invalidate it, and unmap the page</div><div class='add'>+ *   from the fixmap. Because we need to look at all the vcpu-private TLBs,</div><div class='add'>+ *   this requires some wide-ranging locking to ensure that nothing races</div><div class='add'>+ *   against it. This may require some refcounting to avoid the search when</div><div class='add'>+ *   no such TLB is present.</div><div class='add'>+ *</div><div class='add'>+ * - On MMU notifiers, we must invalidate our TLB in a similar way, but</div><div class='add'>+ *   looking at the IPA instead. The funny part is that there may not be a</div><div class='add'>+ *   stage-2 mapping for this page if L1 hasn't accessed it using LD/ST</div><div class='add'>+ *   instructions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int kvm_vcpu_allocate_vncr_tlb(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (!kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.vncr_tlb = kzalloc(sizeof(*vcpu-&gt;arch.vncr_tlb),</div><div class='add'>+				      GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!vcpu-&gt;arch.vncr_tlb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 read_vncr_el2(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return (u64)sign_extend64(__vcpu_sys_reg(vcpu, VNCR_EL2), 48);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvm_translate_vncr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	bool write_fault, writable;</div><div class='add'>+	unsigned long mmu_seq;</div><div class='add'>+	struct vncr_tlb *vt;</div><div class='add'>+	struct page *page;</div><div class='add'>+	u64 va, pfn, gfn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we're about to walk the EL2 S1 PTs, we must invalidate the</div><div class='add'>+	 * current TLB, as it could be sampled from another vcpu doing a</div><div class='add'>+	 * TLBI *IS. A real CPU wouldn't do that, but we only keep a single</div><div class='add'>+	 * translation, so not much of a choice.</div><div class='add'>+	 *</div><div class='add'>+	 * We also prepare the next walk wilst we're at it.</div><div class='add'>+	 */</div><div class='add'>+	scoped_guard(write_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock) {</div><div class='add'>+		invalidate_vncr(vt);</div><div class='add'>+</div><div class='add'>+		vt-&gt;wi = (struct s1_walk_info) {</div><div class='add'>+			.regime	= TR_EL20,</div><div class='add'>+			.as_el0	= false,</div><div class='add'>+			.pan	= false,</div><div class='add'>+		};</div><div class='add'>+		vt-&gt;wr = (struct s1_walk_result){};</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	guard(srcu)(&amp;vcpu-&gt;kvm-&gt;srcu);</div><div class='add'>+</div><div class='add'>+	va =  read_vncr_el2(vcpu);</div><div class='add'>+</div><div class='add'>+	ret = __kvm_translate_va(vcpu, &amp;vt-&gt;wi, &amp;vt-&gt;wr, va);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	write_fault = kvm_is_write_fault(vcpu);</div><div class='add'>+</div><div class='add'>+	mmu_seq = vcpu-&gt;kvm-&gt;mmu_invalidate_seq;</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	gfn = vt-&gt;wr.pa &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	pfn = kvm_faultin_pfn(vcpu, gfn, write_fault, &amp;writable, &amp;page);</div><div class='add'>+	if (is_error_noslot_pfn(pfn) || (write_fault &amp;&amp; !writable))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	scoped_guard(write_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock) {</div><div class='add'>+		if (mmu_invalidate_retry(vcpu-&gt;kvm, mmu_seq))</div><div class='add'>+			return -EAGAIN;</div><div class='add'>+</div><div class='add'>+		vt-&gt;gva = va;</div><div class='add'>+		vt-&gt;hpa = pfn &lt;&lt; PAGE_SHIFT;</div><div class='add'>+		vt-&gt;valid = true;</div><div class='add'>+		vt-&gt;cpu = -1;</div><div class='add'>+</div><div class='add'>+		kvm_make_request(KVM_REQ_MAP_L1_VNCR_EL2, vcpu);</div><div class='add'>+		kvm_release_faultin_page(vcpu-&gt;kvm, page, false, vt-&gt;wr.pw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.pw)</div><div class='add'>+		mark_page_dirty(vcpu-&gt;kvm, gfn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void inject_vncr_perm(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+</div><div class='add'>+	/* Adjust the fault level to reflect that of the guest's */</div><div class='add'>+	esr &amp;= ~ESR_ELx_FSC;</div><div class='add'>+	esr |= FIELD_PREP(ESR_ELx_FSC,</div><div class='add'>+			  ESR_ELx_FSC_PERM_L(vt-&gt;wr.level));</div><div class='add'>+</div><div class='add'>+	kvm_inject_nested_sync(vcpu, esr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool kvm_vncr_tlb_lookup(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_read(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	if (!vt-&gt;valid)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (read_vncr_el2(vcpu) != vt-&gt;gva)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.nG) {</div><div class='add'>+		u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);</div><div class='add'>+		u64 ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR1_EL2) :</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR0_EL2));</div><div class='add'>+		u16 asid;</div><div class='add'>+</div><div class='add'>+		asid = FIELD_GET(TTBR_ASID_MASK, ttbr);</div><div class='add'>+		if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||</div><div class='add'>+		    !(tcr &amp; TCR_ASID16))</div><div class='add'>+			asid &amp;= GENMASK(7, 0);</div><div class='add'>+</div><div class='add'>+		return asid != vt-&gt;wr.asid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvm_handle_vncr_abort(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+	u64 esr = kvm_vcpu_get_esr(vcpu);</div><div class='add'>+</div><div class='add'>+	BUG_ON(!(esr &amp; ESR_ELx_VNCR_SHIFT));</div><div class='add'>+</div><div class='add'>+	if (esr_fsc_is_permission_fault(esr)) {</div><div class='add'>+		inject_vncr_perm(vcpu);</div><div class='add'>+	} else if (esr_fsc_is_translation_fault(esr)) {</div><div class='add'>+		bool valid;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		scoped_guard(read_lock, &amp;vcpu-&gt;kvm-&gt;mmu_lock)</div><div class='add'>+			valid = kvm_vncr_tlb_lookup(vcpu);</div><div class='add'>+</div><div class='add'>+		if (!valid)</div><div class='add'>+			ret = kvm_translate_vncr(vcpu);</div><div class='add'>+		else</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+</div><div class='add'>+		switch (ret) {</div><div class='add'>+		case -EAGAIN:</div><div class='add'>+		case -ENOMEM:</div><div class='add'>+			/* Let's try again... */</div><div class='add'>+			break;</div><div class='add'>+		case -EFAULT:</div><div class='add'>+		case -EINVAL:</div><div class='add'>+		case -ENOENT:</div><div class='add'>+		case -EACCES:</div><div class='add'>+			/*</div><div class='add'>+			 * Translation failed, inject the corresponding</div><div class='add'>+			 * exception back to EL2.</div><div class='add'>+			 */</div><div class='add'>+			BUG_ON(!vt-&gt;wr.failed);</div><div class='add'>+</div><div class='add'>+			esr &amp;= ~ESR_ELx_FSC;</div><div class='add'>+			esr |= FIELD_PREP(ESR_ELx_FSC, vt-&gt;wr.fst);</div><div class='add'>+</div><div class='add'>+			kvm_inject_nested_sync(vcpu, esr);</div><div class='add'>+			break;</div><div class='add'>+		case -EPERM:</div><div class='add'>+			/* Hack to deal with POE until we get kernel support */</div><div class='add'>+			inject_vncr_perm(vcpu);</div><div class='add'>+			break;</div><div class='add'>+		case 0:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		WARN_ONCE(1, "Unhandled VNCR abort, ESR=%llx\n", esr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_map_l1_vncr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vncr_tlb *vt = vcpu-&gt;arch.vncr_tlb;</div><div class='add'>+	pgprot_t prot;</div><div class='add'>+</div><div class='add'>+	guard(preempt)();</div><div class='add'>+	guard(read_lock)(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The request to map VNCR may have raced against some other</div><div class='add'>+	 * event, such as an interrupt, and may not be valid anymore.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hyp_ctxt(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check that the pseudo-TLB is valid and that VNCR_EL2 still</div><div class='add'>+	 * contains the expected value. If it doesn't, we simply bail out</div><div class='add'>+	 * without a mapping -- a transformed MSR/MRS will generate the</div><div class='add'>+	 * fault and allows us to populate the pseudo-TLB.</div><div class='add'>+	 */</div><div class='add'>+	if (!vt-&gt;valid)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (read_vncr_el2(vcpu) != vt-&gt;gva)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.nG) {</div><div class='add'>+		u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);</div><div class='add'>+		u64 ttbr = ((tcr &amp; TCR_A1) ?</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR1_EL2) :</div><div class='add'>+			    vcpu_read_sys_reg(vcpu, TTBR0_EL2));</div><div class='add'>+		u16 asid;</div><div class='add'>+</div><div class='add'>+		asid = FIELD_GET(TTBR_ASID_MASK, ttbr);</div><div class='add'>+		if (!kvm_has_feat_enum(vcpu-&gt;kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||</div><div class='add'>+		    !(tcr &amp; TCR_ASID16))</div><div class='add'>+			asid &amp;= GENMASK(7, 0);</div><div class='add'>+</div><div class='add'>+		if (asid != vt-&gt;wr.asid)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vt-&gt;cpu = smp_processor_id();</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;wr.pw &amp;&amp; vt-&gt;wr.pr)</div><div class='add'>+		prot = PAGE_KERNEL;</div><div class='add'>+	else if (vt-&gt;wr.pr)</div><div class='add'>+		prot = PAGE_KERNEL_RO;</div><div class='add'>+	else</div><div class='add'>+		prot = PAGE_NONE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We can't map write-only (or no permission at all) in the kernel,</div><div class='add'>+	 * but the guest can do it if using POE, so we'll have to turn a</div><div class='add'>+	 * translation fault into a permission fault at runtime.</div><div class='add'>+	 * FIXME: WO doesn't work at all, need POE support in the kernel.</div><div class='add'>+	 */</div><div class='add'>+	if (pgprot_val(prot) != pgprot_val(PAGE_NONE)) {</div><div class='add'>+		__set_fixmap(vncr_fixmap(vt-&gt;cpu), vt-&gt;hpa, prot);</div><div class='add'>+		host_data_set_flag(L1_VNCR_MAPPED);</div><div class='add'>+		atomic_inc(&amp;vcpu-&gt;kvm-&gt;arch.vncr_map_count);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Our emulated CPU doesn't support all the possible features. For the</div><div class='ctx'>  * sake of simplicity (and probably mental sanity), wipe out a number</div><div class='ctx'>  * of feature bits we don't intend to support for the time being.</div><div class='hunk'>@@ -1018,216 +1617,49 @@ int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	set_sysreg_masks(kvm, VMPIDR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HCR_EL2 */</div><div class='del'>-	res0 = BIT(48);</div><div class='del'>-	res1 = HCR_RW;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, TWED, IMP))</div><div class='del'>-		res0 |= GENMASK(63, 59);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, MTE, MTE2))</div><div class='del'>-		res0 |= (HCR_TID5 | HCR_DCT | HCR_ATA);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, EVT, TTLBxS))</div><div class='del'>-		res0 |= (HCR_TTLBIS | HCR_TTLBOS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, CSV2, CSV2_2) &amp;&amp;</div><div class='del'>-	    !kvm_has_feat(kvm, ID_AA64PFR1_EL1, CSV2_frac, CSV2_1p2))</div><div class='del'>-		res0 |= HCR_ENSCXT;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, EVT, IMP))</div><div class='del'>-		res0 |= (HCR_TOCU | HCR_TICAB | HCR_TID4);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, V1P1))</div><div class='del'>-		res0 |= HCR_AMVOFFEN;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1))</div><div class='del'>-		res0 |= HCR_FIEN;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR2_EL1, FWB, IMP))</div><div class='del'>-		res0 |= HCR_FWB;</div><div class='del'>-	/* Implementation choice: NV2 is the only supported config */</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))</div><div class='del'>-		res0 |= (HCR_NV2 | HCR_NV | HCR_AT);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR4_EL1, E2H0, NI))</div><div class='del'>-		res0 |= HCR_NV1;</div><div class='del'>-	if (!(kvm_vcpu_has_feature(kvm, KVM_ARM_VCPU_PTRAUTH_ADDRESS) &amp;&amp;</div><div class='del'>-	      kvm_vcpu_has_feature(kvm, KVM_ARM_VCPU_PTRAUTH_GENERIC)))</div><div class='del'>-		res0 |= (HCR_API | HCR_APK);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TME, IMP))</div><div class='del'>-		res0 |= BIT(39);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP))</div><div class='del'>-		res0 |= (HCR_TEA | HCR_TERR);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, LO, IMP))</div><div class='del'>-		res0 |= HCR_TLOR;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, VH, IMP))</div><div class='del'>-		res0 |= HCR_E2H;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR4_EL1, E2H0, IMP))</div><div class='del'>-		res1 |= HCR_E2H;</div><div class='add'>+	get_reg_fixed_bits(kvm, HCR_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HCR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HCRX_EL2 */</div><div class='del'>-	res0 = HCRX_EL2_RES0;</div><div class='del'>-	res1 = HCRX_EL2_RES1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR3_EL1, PACM, TRIVIAL_IMP))</div><div class='del'>-		res0 |= HCRX_EL2_PACMEn;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR2_EL1, FPMR, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_EnFPM;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_GCSEn;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, SYSREG_128, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_EnIDCP128;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, ADERR, DEV_ASYNC))</div><div class='del'>-		res0 |= (HCRX_EL2_EnSDERR | HCRX_EL2_EnSNERR);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, DF2, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_TMEA;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, D128, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_D128En;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, THE, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_PTTWI;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, SCTLRX, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_SCTLR2En;</div><div class='del'>-	if (!kvm_has_tcr2(kvm))</div><div class='del'>-		res0 |= HCRX_EL2_TCR2En;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, MOPS, IMP))</div><div class='del'>-		res0 |= (HCRX_EL2_MSCEn | HCRX_EL2_MCE2);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, CMOW, IMP))</div><div class='del'>-		res0 |= HCRX_EL2_CMOW;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, NMI, IMP))</div><div class='del'>-		res0 |= (HCRX_EL2_VFNMI | HCRX_EL2_VINMI | HCRX_EL2_TALLINT);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP) ||</div><div class='del'>-	    !(read_sysreg_s(SYS_SMIDR_EL1) &amp; SMIDR_EL1_SMPS))</div><div class='del'>-		res0 |= HCRX_EL2_SMPME;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, XS, IMP))</div><div class='del'>-		res0 |= (HCRX_EL2_FGTnXS | HCRX_EL2_FnXS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_V))</div><div class='del'>-		res0 |= HCRX_EL2_EnASR;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64))</div><div class='del'>-		res0 |= HCRX_EL2_EnALS;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA))</div><div class='del'>-		res0 |= HCRX_EL2_EnAS0;</div><div class='add'>+	get_reg_fixed_bits(kvm, HCRX_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HCRX_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HFG[RW]TR_EL2 */</div><div class='del'>-	res0 = res1 = 0;</div><div class='del'>-	if (!(kvm_vcpu_has_feature(kvm, KVM_ARM_VCPU_PTRAUTH_ADDRESS) &amp;&amp;</div><div class='del'>-	      kvm_vcpu_has_feature(kvm, KVM_ARM_VCPU_PTRAUTH_GENERIC)))</div><div class='del'>-		res0 |= (HFGxTR_EL2_APDAKey | HFGxTR_EL2_APDBKey |</div><div class='del'>-			 HFGxTR_EL2_APGAKey | HFGxTR_EL2_APIAKey |</div><div class='del'>-			 HFGxTR_EL2_APIBKey);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, LO, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_LORC_EL1 | HFGxTR_EL2_LOREA_EL1 |</div><div class='del'>-			 HFGxTR_EL2_LORID_EL1 | HFGxTR_EL2_LORN_EL1 |</div><div class='del'>-			 HFGxTR_EL2_LORSA_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, CSV2, CSV2_2) &amp;&amp;</div><div class='del'>-	    !kvm_has_feat(kvm, ID_AA64PFR1_EL1, CSV2_frac, CSV2_1p2))</div><div class='del'>-		res0 |= (HFGxTR_EL2_SCXTNUM_EL1 | HFGxTR_EL2_SCXTNUM_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, GIC, IMP))</div><div class='del'>-		res0 |= HFGxTR_EL2_ICC_IGRPENn_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_ERRIDR_EL1 | HFGxTR_EL2_ERRSELR_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXFR_EL1 | HFGxTR_EL2_ERXCTLR_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXSTATUS_EL1 | HFGxTR_EL2_ERXMISCn_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXPFGF_EL1 | HFGxTR_EL2_ERXPFGCTL_EL1 |</div><div class='del'>-			 HFGxTR_EL2_ERXPFGCDN_EL1 | HFGxTR_EL2_ERXADDR_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA))</div><div class='del'>-		res0 |= HFGxTR_EL2_nACCDATA_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nGCS_EL0 | HFGxTR_EL2_nGCS_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, SME, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nSMPRI_EL1 | HFGxTR_EL2_nTPIDR2_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, THE, IMP))</div><div class='del'>-		res0 |= HFGxTR_EL2_nRCWMASK_EL1;</div><div class='del'>-	if (!kvm_has_s1pie(kvm))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nPIRE0_EL1 | HFGxTR_EL2_nPIR_EL1);</div><div class='del'>-	if (!kvm_has_s1poe(kvm))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nPOR_EL0 | HFGxTR_EL2_nPOR_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, S2POE, IMP))</div><div class='del'>-		res0 |= HFGxTR_EL2_nS2POR_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR3_EL1, AIE, IMP))</div><div class='del'>-		res0 |= (HFGxTR_EL2_nMAIR2_EL1 | HFGxTR_EL2_nAMAIR2_EL1);</div><div class='del'>-	set_sysreg_masks(kvm, HFGRTR_EL2, res0 | __HFGRTR_EL2_RES0, res1);</div><div class='del'>-	set_sysreg_masks(kvm, HFGWTR_EL2, res0 | __HFGWTR_EL2_RES0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGRTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGRTR_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGWTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGWTR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HDFG[RW]TR_EL2 */</div><div class='del'>-	res0 = res1 = 0;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, DoubleLock, IMP))</div><div class='del'>-		res0 |= HDFGRTR_EL2_OSDLR_EL1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMUVer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_PMEVCNTRn_EL0 | HDFGRTR_EL2_PMEVTYPERn_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMCCFILTR_EL0 | HDFGRTR_EL2_PMCCNTR_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMCNTEN | HDFGRTR_EL2_PMINTEN |</div><div class='del'>-			 HDFGRTR_EL2_PMOVS | HDFGRTR_EL2_PMSELR_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMMIR_EL1 | HDFGRTR_EL2_PMUSERENR_EL0 |</div><div class='del'>-			 HDFGRTR_EL2_PMCEIDn_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_PMBLIMITR_EL1 | HDFGRTR_EL2_PMBPTR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMBSR_EL1 | HDFGRTR_EL2_PMSCR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMSEVFR_EL1 | HDFGRTR_EL2_PMSFCR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMSICR_EL1 | HDFGRTR_EL2_PMSIDR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMSIRR_EL1 | HDFGRTR_EL2_PMSLATFR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_PMBIDR_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceVer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_TRC | HDFGRTR_EL2_TRCAUTHSTATUS |</div><div class='del'>-			 HDFGRTR_EL2_TRCAUXCTLR | HDFGRTR_EL2_TRCCLAIM |</div><div class='del'>-			 HDFGRTR_EL2_TRCCNTVRn | HDFGRTR_EL2_TRCID |</div><div class='del'>-			 HDFGRTR_EL2_TRCIMSPECn | HDFGRTR_EL2_TRCOSLSR |</div><div class='del'>-			 HDFGRTR_EL2_TRCPRGCTLR | HDFGRTR_EL2_TRCSEQSTR |</div><div class='del'>-			 HDFGRTR_EL2_TRCSSCSRn | HDFGRTR_EL2_TRCSTATR |</div><div class='del'>-			 HDFGRTR_EL2_TRCVICTLR);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceBuffer, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_TRBBASER_EL1 | HDFGRTR_EL2_TRBIDR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_TRBLIMITR_EL1 | HDFGRTR_EL2_TRBMAR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_TRBPTR_EL1 | HDFGRTR_EL2_TRBSR_EL1 |</div><div class='del'>-			 HDFGRTR_EL2_TRBTRG_EL1);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, BRBE, IMP))</div><div class='del'>-		res0 |= (HDFGRTR_EL2_nBRBIDR | HDFGRTR_EL2_nBRBCTL |</div><div class='del'>-			 HDFGRTR_EL2_nBRBDATA);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMSVer, V1P2))</div><div class='del'>-		res0 |= HDFGRTR_EL2_nPMSNEVFR_EL1;</div><div class='del'>-	set_sysreg_masks(kvm, HDFGRTR_EL2, res0 | HDFGRTR_EL2_RES0, res1);</div><div class='del'>-</div><div class='del'>-	/* Reuse the bits from the read-side and add the write-specific stuff */</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, PMUVer, IMP))</div><div class='del'>-		res0 |= (HDFGWTR_EL2_PMCR_EL0 | HDFGWTR_EL2_PMSWINC_EL0);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceVer, IMP))</div><div class='del'>-		res0 |= HDFGWTR_EL2_TRCOSLAR;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, TraceFilt, IMP))</div><div class='del'>-		res0 |= HDFGWTR_EL2_TRFCR_EL1;</div><div class='del'>-	set_sysreg_masks(kvm, HFGWTR_EL2, res0 | HDFGWTR_EL2_RES0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGRTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGRTR_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGWTR_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGWTR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HFGITR_EL2 */</div><div class='del'>-	res0 = HFGITR_EL2_RES0;</div><div class='del'>-	res1 = HFGITR_EL2_RES1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, DPB, DPB2))</div><div class='del'>-		res0 |= HFGITR_EL2_DCCVADP;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, PAN, PAN2))</div><div class='del'>-		res0 |= (HFGITR_EL2_ATS1E1RP | HFGITR_EL2_ATS1E1WP);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))</div><div class='del'>-		res0 |= (HFGITR_EL2_TLBIRVAALE1OS | HFGITR_EL2_TLBIRVALE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1OS | HFGITR_EL2_TLBIRVAE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIVAALE1OS | HFGITR_EL2_TLBIVALE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIVAAE1OS | HFGITR_EL2_TLBIASIDE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIVAE1OS | HFGITR_EL2_TLBIVMALLE1OS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))</div><div class='del'>-		res0 |= (HFGITR_EL2_TLBIRVAALE1 | HFGITR_EL2_TLBIRVALE1 |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1 | HFGITR_EL2_TLBIRVAE1 |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAALE1IS | HFGITR_EL2_TLBIRVALE1IS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1IS | HFGITR_EL2_TLBIRVAE1IS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAALE1OS | HFGITR_EL2_TLBIRVALE1OS |</div><div class='del'>-			 HFGITR_EL2_TLBIRVAAE1OS | HFGITR_EL2_TLBIRVAE1OS);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, SPECRES, IMP))</div><div class='del'>-		res0 |= (HFGITR_EL2_CFPRCTX | HFGITR_EL2_DVPRCTX |</div><div class='del'>-			 HFGITR_EL2_CPPRCTX);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, BRBE, IMP))</div><div class='del'>-		res0 |= (HFGITR_EL2_nBRBINJ | HFGITR_EL2_nBRBIALL);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR1_EL1, GCS, IMP))</div><div class='del'>-		res0 |= (HFGITR_EL2_nGCSPUSHM_EL1 | HFGITR_EL2_nGCSSTR_EL1 |</div><div class='del'>-			 HFGITR_EL2_nGCSEPP);</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR1_EL1, SPECRES, COSP_RCTX))</div><div class='del'>-		res0 |= HFGITR_EL2_COSPRCTX;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, ATS1A, IMP))</div><div class='del'>-		res0 |= HFGITR_EL2_ATS1E1A;</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGITR_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HFGITR_EL2, res0, res1);</div><div class='ctx'> </div><div class='ctx'> 	/* HAFGRTR_EL2 - not a lot to see here */</div><div class='del'>-	res0 = HAFGRTR_EL2_RES0;</div><div class='del'>-	res1 = HAFGRTR_EL2_RES1;</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, V1P1))</div><div class='del'>-		res0 |= ~(res0 | res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HAFGRTR_EL2, &amp;res0, &amp;res1);</div><div class='ctx'> 	set_sysreg_masks(kvm, HAFGRTR_EL2, res0, res1);</div><div class='ctx'> </div><div class='add'>+	/* HFG[RW]TR2_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGRTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGRTR2_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGWTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGWTR2_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* HDFG[RW]TR2_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGRTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGRTR2_EL2, res0, res1);</div><div class='add'>+	get_reg_fixed_bits(kvm, HDFGWTR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HDFGWTR2_EL2, res0, res1);</div><div class='add'>+</div><div class='add'>+	/* HFGITR2_EL2 */</div><div class='add'>+	get_reg_fixed_bits(kvm, HFGITR2_EL2, &amp;res0, &amp;res1);</div><div class='add'>+	set_sysreg_masks(kvm, HFGITR2_EL2, res0, res1);</div><div class='add'>+</div><div class='ctx'> 	/* TCR2_EL2 */</div><div class='ctx'> 	res0 = TCR2_EL2_RES0;</div><div class='ctx'> 	res1 = TCR2_EL2_RES1;</div><div class='hunk'>@@ -1318,6 +1750,9 @@ int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	res0 |= ICH_HCR_EL2_DVIM | ICH_HCR_EL2_vSGIEOICount;</div><div class='ctx'> 	set_sysreg_masks(kvm, ICH_HCR_EL2, res0, res1);</div><div class='ctx'> </div><div class='add'>+	/* VNCR_EL2 */</div><div class='add'>+	set_sysreg_masks(kvm, VNCR_EL2, VNCR_EL2_RES0, VNCR_EL2_RES1);</div><div class='add'>+</div><div class='ctx'> out:</div><div class='ctx'> 	for (enum vcpu_sysreg sr = __SANITISED_REG_START__; sr &lt; NR_SYS_REGS; sr++)</div><div class='ctx'> 		(void)__vcpu_sys_reg(vcpu, sr);</div><div class='hunk'>@@ -1338,6 +1773,9 @@ void check_nested_vcpu_requests(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		write_unlock(&amp;vcpu-&gt;kvm-&gt;mmu_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (kvm_check_request(KVM_REQ_MAP_L1_VNCR_EL2, vcpu))</div><div class='add'>+		kvm_map_l1_vncr(vcpu);</div><div class='add'>+</div><div class='ctx'> 	/* Must be last, as may switch context! */</div><div class='ctx'> 	if (kvm_check_request(KVM_REQ_GUEST_HYP_IRQ_PENDING, vcpu))</div><div class='ctx'> 		kvm_inject_nested_irq(vcpu);</div><div class='head'>diff --git a/arch/arm64/kvm/pkvm.c b/arch/arm64/kvm/pkvm.c<br/>index 0f89157d31fd..fcd70bfe44fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/pkvm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/pkvm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/pkvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/pkvm.c</a></div><div class='hunk'>@@ -5,12 +5,12 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interval_tree_generic.h&gt;</div><div class='ctx'> #include &lt;linux/kmemleak.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_mmu.h&gt;</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/sort.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/kvm_pkvm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -24,23 +24,6 @@ static unsigned int *hyp_memblock_nr_ptr = &amp;kvm_nvhe_sym(hyp_memblock_nr);</div><div class='ctx'> phys_addr_t hyp_mem_base;</div><div class='ctx'> phys_addr_t hyp_mem_size;</div><div class='ctx'> </div><div class='del'>-static int cmp_hyp_memblock(const void *p1, const void *p2)</div><div class='del'>-{</div><div class='del'>-	const struct memblock_region *r1 = p1;</div><div class='del'>-	const struct memblock_region *r2 = p2;</div><div class='del'>-</div><div class='del'>-	return r1-&gt;base &lt; r2-&gt;base ? -1 : (r1-&gt;base &gt; r2-&gt;base);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init sort_memblock_regions(void)</div><div class='del'>-{</div><div class='del'>-	sort(hyp_memory,</div><div class='del'>-	     *hyp_memblock_nr_ptr,</div><div class='del'>-	     sizeof(struct memblock_region),</div><div class='del'>-	     cmp_hyp_memblock,</div><div class='del'>-	     NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __init register_memblock_regions(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct memblock_region *reg;</div><div class='hunk'>@@ -52,7 +35,6 @@ static int __init register_memblock_regions(void)</div><div class='ctx'> 		hyp_memory[*hyp_memblock_nr_ptr] = *reg;</div><div class='ctx'> 		(*hyp_memblock_nr_ptr)++;</div><div class='ctx'> 	}</div><div class='del'>-	sort_memblock_regions();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -79,6 +61,7 @@ void __init kvm_hyp_reserve(void)</div><div class='ctx'> 	hyp_mem_pages += host_s2_pgtable_pages();</div><div class='ctx'> 	hyp_mem_pages += hyp_vm_table_pages();</div><div class='ctx'> 	hyp_mem_pages += hyp_vmemmap_pages(STRUCT_HYP_PAGE_SIZE);</div><div class='add'>+	hyp_mem_pages += pkvm_selftest_pages();</div><div class='ctx'> 	hyp_mem_pages += hyp_ffa_proxy_pages();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -262,6 +245,7 @@ static int __init finalize_pkvm(void)</div><div class='ctx'> 	 * at, which would end badly once inaccessible.</div><div class='ctx'> 	 */</div><div class='ctx'> 	kmemleak_free_part(__hyp_bss_start, __hyp_bss_end - __hyp_bss_start);</div><div class='add'>+	kmemleak_free_part(__hyp_data_start, __hyp_data_end - __hyp_data_start);</div><div class='ctx'> 	kmemleak_free_part(__hyp_rodata_start, __hyp_rodata_end - __hyp_rodata_start);</div><div class='ctx'> 	kmemleak_free_part_phys(hyp_mem_base, hyp_mem_size);</div><div class='ctx'> </div><div class='hunk'>@@ -273,80 +257,68 @@ static int __init finalize_pkvm(void)</div><div class='ctx'> }</div><div class='ctx'> device_initcall_sync(finalize_pkvm);</div><div class='ctx'> </div><div class='del'>-static int cmp_mappings(struct rb_node *node, const struct rb_node *parent)</div><div class='add'>+static u64 __pkvm_mapping_start(struct pkvm_mapping *m)</div><div class='ctx'> {</div><div class='del'>-	struct pkvm_mapping *a = rb_entry(node, struct pkvm_mapping, node);</div><div class='del'>-	struct pkvm_mapping *b = rb_entry(parent, struct pkvm_mapping, node);</div><div class='del'>-</div><div class='del'>-	if (a-&gt;gfn &lt; b-&gt;gfn)</div><div class='del'>-		return -1;</div><div class='del'>-	if (a-&gt;gfn &gt; b-&gt;gfn)</div><div class='del'>-		return 1;</div><div class='del'>-	return 0;</div><div class='add'>+	return m-&gt;gfn * PAGE_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct rb_node *find_first_mapping_node(struct rb_root *root, u64 gfn)</div><div class='add'>+static u64 __pkvm_mapping_end(struct pkvm_mapping *m)</div><div class='ctx'> {</div><div class='del'>-	struct rb_node *node = root-&gt;rb_node, *prev = NULL;</div><div class='del'>-	struct pkvm_mapping *mapping;</div><div class='del'>-</div><div class='del'>-	while (node) {</div><div class='del'>-		mapping = rb_entry(node, struct pkvm_mapping, node);</div><div class='del'>-		if (mapping-&gt;gfn == gfn)</div><div class='del'>-			return node;</div><div class='del'>-		prev = node;</div><div class='del'>-		node = (gfn &lt; mapping-&gt;gfn) ? node-&gt;rb_left : node-&gt;rb_right;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return prev;</div><div class='add'>+	return (m-&gt;gfn + m-&gt;nr_pages) * PAGE_SIZE - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+INTERVAL_TREE_DEFINE(struct pkvm_mapping, node, u64, __subtree_last,</div><div class='add'>+		     __pkvm_mapping_start, __pkvm_mapping_end, static,</div><div class='add'>+		     pkvm_mapping);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * __tmp is updated to rb_next(__tmp) *before* entering the body of the loop to allow freeing</div><div class='del'>- * of __map inline.</div><div class='add'>+ * __tmp is updated to iter_first(pkvm_mappings) *before* entering the body of the loop to allow</div><div class='add'>+ * freeing of __map inline.</div><div class='ctx'>  */</div><div class='ctx'> #define for_each_mapping_in_range_safe(__pgt, __start, __end, __map)				\</div><div class='del'>-	for (struct rb_node *__tmp = find_first_mapping_node(&amp;(__pgt)-&gt;pkvm_mappings,		\</div><div class='del'>-							     ((__start) &gt;&gt; PAGE_SHIFT));	\</div><div class='add'>+	for (struct pkvm_mapping *__tmp = pkvm_mapping_iter_first(&amp;(__pgt)-&gt;pkvm_mappings,	\</div><div class='add'>+								  __start, __end - 1);		\</div><div class='ctx'> 	     __tmp &amp;&amp; ({									\</div><div class='del'>-				__map = rb_entry(__tmp, struct pkvm_mapping, node);		\</div><div class='del'>-				__tmp = rb_next(__tmp);						\</div><div class='add'>+				__map = __tmp;							\</div><div class='add'>+				__tmp = pkvm_mapping_iter_next(__map, __start, __end - 1);	\</div><div class='ctx'> 				true;								\</div><div class='ctx'> 		       });									\</div><div class='del'>-	    )											\</div><div class='del'>-		if (__map-&gt;gfn &lt; ((__start) &gt;&gt; PAGE_SHIFT))					\</div><div class='del'>-			continue;								\</div><div class='del'>-		else if (__map-&gt;gfn &gt;= ((__end) &gt;&gt; PAGE_SHIFT))					\</div><div class='del'>-			break;									\</div><div class='del'>-		else</div><div class='add'>+	    )</div><div class='ctx'> </div><div class='ctx'> int pkvm_pgtable_stage2_init(struct kvm_pgtable *pgt, struct kvm_s2_mmu *mmu,</div><div class='ctx'> 			     struct kvm_pgtable_mm_ops *mm_ops)</div><div class='ctx'> {</div><div class='del'>-	pgt-&gt;pkvm_mappings	= RB_ROOT;</div><div class='add'>+	pgt-&gt;pkvm_mappings	= RB_ROOT_CACHED;</div><div class='ctx'> 	pgt-&gt;mmu		= mmu;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void pkvm_pgtable_stage2_destroy(struct kvm_pgtable *pgt)</div><div class='add'>+static int __pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 start, u64 end)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt-&gt;mmu);</div><div class='ctx'> 	pkvm_handle_t handle = kvm-&gt;arch.pkvm.handle;</div><div class='ctx'> 	struct pkvm_mapping *mapping;</div><div class='del'>-	struct rb_node *node;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!handle)</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	node = rb_first(&amp;pgt-&gt;pkvm_mappings);</div><div class='del'>-	while (node) {</div><div class='del'>-		mapping = rb_entry(node, struct pkvm_mapping, node);</div><div class='del'>-		kvm_call_hyp_nvhe(__pkvm_host_unshare_guest, handle, mapping-&gt;gfn);</div><div class='del'>-		node = rb_next(node);</div><div class='del'>-		rb_erase(&amp;mapping-&gt;node, &amp;pgt-&gt;pkvm_mappings);</div><div class='add'>+	for_each_mapping_in_range_safe(pgt, start, end, mapping) {</div><div class='add'>+		ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_guest, handle, mapping-&gt;gfn,</div><div class='add'>+					mapping-&gt;nr_pages);</div><div class='add'>+		if (WARN_ON(ret))</div><div class='add'>+			return ret;</div><div class='add'>+		pkvm_mapping_remove(mapping, &amp;pgt-&gt;pkvm_mappings);</div><div class='ctx'> 		kfree(mapping);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pkvm_pgtable_stage2_destroy(struct kvm_pgtable *pgt)</div><div class='add'>+{</div><div class='add'>+	__pkvm_pgtable_stage2_unmap(pgt, 0, ~(0ULL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int pkvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='hunk'>@@ -360,42 +332,46 @@ int pkvm_pgtable_stage2_map(struct kvm_pgtable *pgt, u64 addr, u64 size,</div><div class='ctx'> 	u64 pfn = phys &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (size != PAGE_SIZE)</div><div class='add'>+	if (size != PAGE_SIZE &amp;&amp; size != PMD_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-	ret = kvm_call_hyp_nvhe(__pkvm_host_share_guest, pfn, gfn, prot);</div><div class='del'>-	if (ret) {</div><div class='del'>-		/* Is the gfn already mapped due to a racing vCPU? */</div><div class='del'>-		if (ret == -EPERM)</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Calling stage2_map() on top of existing mappings is either happening because of a race</div><div class='add'>+	 * with another vCPU, or because we're changing between page and block mappings. As per</div><div class='add'>+	 * user_mem_abort(), same-size permission faults are handled in the relax_perms() path.</div><div class='add'>+	 */</div><div class='add'>+	mapping = pkvm_mapping_iter_first(&amp;pgt-&gt;pkvm_mappings, addr, addr + size - 1);</div><div class='add'>+	if (mapping) {</div><div class='add'>+		if (size == (mapping-&gt;nr_pages * PAGE_SIZE))</div><div class='ctx'> 			return -EAGAIN;</div><div class='add'>+</div><div class='add'>+		/* Remove _any_ pkvm_mapping overlapping with the range, bigger or smaller. */</div><div class='add'>+		ret = __pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		mapping = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = kvm_call_hyp_nvhe(__pkvm_host_share_guest, pfn, gfn, size / PAGE_SIZE, prot);</div><div class='add'>+	if (WARN_ON(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	swap(mapping, cache-&gt;mapping);</div><div class='ctx'> 	mapping-&gt;gfn = gfn;</div><div class='ctx'> 	mapping-&gt;pfn = pfn;</div><div class='del'>-	WARN_ON(rb_find_add(&amp;mapping-&gt;node, &amp;pgt-&gt;pkvm_mappings, cmp_mappings));</div><div class='add'>+	mapping-&gt;nr_pages = size / PAGE_SIZE;</div><div class='add'>+	pkvm_mapping_insert(mapping, &amp;pgt-&gt;pkvm_mappings);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int pkvm_pgtable_stage2_unmap(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='ctx'> {</div><div class='del'>-	struct kvm *kvm = kvm_s2_mmu_to_kvm(pgt-&gt;mmu);</div><div class='del'>-	pkvm_handle_t handle = kvm-&gt;arch.pkvm.handle;</div><div class='del'>-	struct pkvm_mapping *mapping;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='del'>-	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping) {</div><div class='del'>-		ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_guest, handle, mapping-&gt;gfn);</div><div class='del'>-		if (WARN_ON(ret))</div><div class='del'>-			break;</div><div class='del'>-		rb_erase(&amp;mapping-&gt;node, &amp;pgt-&gt;pkvm_mappings);</div><div class='del'>-		kfree(mapping);</div><div class='del'>-	}</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm_s2_mmu_to_kvm(pgt-&gt;mmu)-&gt;mmu_lock);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return __pkvm_pgtable_stage2_unmap(pgt, addr, addr + size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int pkvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='hunk'>@@ -407,7 +383,8 @@ int pkvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> 	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping) {</div><div class='del'>-		ret = kvm_call_hyp_nvhe(__pkvm_host_wrprotect_guest, handle, mapping-&gt;gfn);</div><div class='add'>+		ret = kvm_call_hyp_nvhe(__pkvm_host_wrprotect_guest, handle, mapping-&gt;gfn,</div><div class='add'>+					mapping-&gt;nr_pages);</div><div class='ctx'> 		if (WARN_ON(ret))</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -422,7 +399,8 @@ int pkvm_pgtable_stage2_flush(struct kvm_pgtable *pgt, u64 addr, u64 size)</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> 	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping)</div><div class='del'>-		__clean_dcache_guest_page(pfn_to_kaddr(mapping-&gt;pfn), PAGE_SIZE);</div><div class='add'>+		__clean_dcache_guest_page(pfn_to_kaddr(mapping-&gt;pfn),</div><div class='add'>+					  PAGE_SIZE * mapping-&gt;nr_pages);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -437,7 +415,7 @@ bool pkvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr, u64</div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;mmu_lock);</div><div class='ctx'> 	for_each_mapping_in_range_safe(pgt, addr, addr + size, mapping)</div><div class='ctx'> 		young |= kvm_call_hyp_nvhe(__pkvm_host_test_clear_young_guest, handle, mapping-&gt;gfn,</div><div class='del'>-					   mkold);</div><div class='add'>+					   mapping-&gt;nr_pages, mkold);</div><div class='ctx'> </div><div class='ctx'> 	return young;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c<br/>index a1bc10d7116a..25c29107f13f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/pmu-emul.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/pmu-emul.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/pmu-emul.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/pmu-emul.c</a></div><div class='hunk'>@@ -280,7 +280,7 @@ static u64 kvm_pmu_hyp_counter_mask(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	hpmn = SYS_FIELD_GET(MDCR_EL2, HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));</div><div class='del'>-	n = vcpu-&gt;kvm-&gt;arch.pmcr_n;</div><div class='add'>+	n = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Programming HPMN to a value greater than PMCR_EL0.N is</div><div class='hunk'>@@ -608,14 +608,12 @@ void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val)</div><div class='ctx'> 		kvm_pmu_set_counter_value(vcpu, ARMV8_PMU_CYCLE_IDX, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; ARMV8_PMU_PMCR_P) {</div><div class='del'>-		/*</div><div class='del'>-		 * Unlike other PMU sysregs, the controls in PMCR_EL0 always apply</div><div class='del'>-		 * to the 'guest' range of counters and never the 'hyp' range.</div><div class='del'>-		 */</div><div class='ctx'> 		unsigned long mask = kvm_pmu_implemented_counter_mask(vcpu) &amp;</div><div class='del'>-				     ~kvm_pmu_hyp_counter_mask(vcpu) &amp;</div><div class='ctx'> 				     ~BIT(ARMV8_PMU_CYCLE_IDX);</div><div class='ctx'> </div><div class='add'>+		if (!vcpu_is_el2(vcpu))</div><div class='add'>+			mask &amp;= ~kvm_pmu_hyp_counter_mask(vcpu);</div><div class='add'>+</div><div class='ctx'> 		for_each_set_bit(i, &amp;mask, 32)</div><div class='ctx'> 			kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, i), 0, true);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1027,12 +1025,30 @@ u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm)</div><div class='ctx'> 	return bitmap_weight(arm_pmu-&gt;cntr_mask, ARMV8_PMU_MAX_GENERAL_COUNTERS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvm_arm_set_nr_counters(struct kvm *kvm, unsigned int nr)</div><div class='add'>+{</div><div class='add'>+	kvm-&gt;arch.nr_pmu_counters = nr;</div><div class='add'>+</div><div class='add'>+	/* Reset MDCR_EL2.HPMN behind the vcpus' back... */</div><div class='add'>+	if (test_bit(KVM_ARM_VCPU_HAS_EL2, kvm-&gt;arch.vcpu_features)) {</div><div class='add'>+		struct kvm_vcpu *vcpu;</div><div class='add'>+		unsigned long i;</div><div class='add'>+</div><div class='add'>+		kvm_for_each_vcpu(i, vcpu, kvm) {</div><div class='add'>+			u64 val = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='add'>+			val &amp;= ~MDCR_EL2_HPMN;</div><div class='add'>+			val |= FIELD_PREP(MDCR_EL2_HPMN, kvm-&gt;arch.nr_pmu_counters);</div><div class='add'>+			__vcpu_sys_reg(vcpu, MDCR_EL2) = val;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void kvm_arm_set_pmu(struct kvm *kvm, struct arm_pmu *arm_pmu)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='ctx'> 	kvm-&gt;arch.arm_pmu = arm_pmu;</div><div class='del'>-	kvm-&gt;arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);</div><div class='add'>+	kvm_arm_set_nr_counters(kvm, kvm_arm_pmu_get_max_counters(kvm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1088,6 +1104,20 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vcpu, int pmu_id)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvm_arm_pmu_v3_set_nr_counters(struct kvm_vcpu *vcpu, unsigned int n)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+</div><div class='add'>+	if (!kvm-&gt;arch.arm_pmu)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (n &gt; kvm_arm_pmu_get_max_counters(kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	kvm_arm_set_nr_counters(kvm, n);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='hunk'>@@ -1184,6 +1214,15 @@ int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> </div><div class='ctx'> 		return kvm_arm_pmu_v3_set_pmu(vcpu, pmu_id);</div><div class='ctx'> 	}</div><div class='add'>+	case KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS: {</div><div class='add'>+		unsigned int __user *uaddr = (unsigned int __user *)(long)attr-&gt;addr;</div><div class='add'>+		unsigned int n;</div><div class='add'>+</div><div class='add'>+		if (get_user(n, uaddr))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		return kvm_arm_pmu_v3_set_nr_counters(vcpu, n);</div><div class='add'>+	}</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_INIT:</div><div class='ctx'> 		return kvm_arm_pmu_v3_init(vcpu);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1222,6 +1261,7 @@ int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_INIT:</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_FILTER:</div><div class='ctx'> 	case KVM_ARM_VCPU_PMU_V3_SET_PMU:</div><div class='add'>+	case KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS:</div><div class='ctx'> 		if (kvm_vcpu_has_pmu(vcpu))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1260,8 +1300,12 @@ u8 kvm_arm_pmu_get_pmuver_limit(void)</div><div class='ctx'> u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0);</div><div class='add'>+	u64 n = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='add'>+</div><div class='add'>+	if (vcpu_has_nv(vcpu) &amp;&amp; !vcpu_is_el2(vcpu))</div><div class='add'>+		n = FIELD_GET(MDCR_EL2_HPMN, __vcpu_sys_reg(vcpu, MDCR_EL2));</div><div class='ctx'> </div><div class='del'>-	return u64_replace_bits(pmcr, vcpu-&gt;kvm-&gt;arch.pmcr_n, ARMV8_PMU_PMCR_N);</div><div class='add'>+	return u64_replace_bits(pmcr, n, ARMV8_PMU_PMCR_N);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu)</div><div class='head'>diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c<br/>index f82fcc614e13..959532422d3a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/reset.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/reset.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/reset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/reset.c</a></div><div class='hunk'>@@ -158,6 +158,8 @@ void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (sve_state)</div><div class='ctx'> 		kvm_unshare_hyp(sve_state, sve_state + vcpu_sve_state_size(vcpu));</div><div class='ctx'> 	kfree(sve_state);</div><div class='add'>+	free_page((unsigned long)vcpu-&gt;arch.ctxt.vncr_array);</div><div class='add'>+	kfree(vcpu-&gt;arch.vncr_tlb);</div><div class='ctx'> 	kfree(vcpu-&gt;arch.ccsidr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c<br/>index 005ad28f7306..a6cf2888d150 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/sys_regs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/sys_regs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/sys_regs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/sys_regs.c</a></div><div class='hunk'>@@ -785,7 +785,7 @@ static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu,</div><div class='ctx'> static u64 reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	u64 mask = BIT(ARMV8_PMU_CYCLE_IDX);</div><div class='del'>-	u8 n = vcpu-&gt;kvm-&gt;arch.pmcr_n;</div><div class='add'>+	u8 n = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='ctx'> </div><div class='ctx'> 	if (n)</div><div class='ctx'> 		mask |= GENMASK(n - 1, 0);</div><div class='hunk'>@@ -1216,8 +1216,9 @@ static int set_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> 	 * with the existing KVM behavior.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!kvm_vm_has_ran_once(kvm) &amp;&amp;</div><div class='add'>+	    !vcpu_has_nv(vcpu)	      &amp;&amp;</div><div class='ctx'> 	    new_n &lt;= kvm_arm_pmu_get_max_counters(kvm))</div><div class='del'>-		kvm-&gt;arch.pmcr_n = new_n;</div><div class='add'>+		kvm-&gt;arch.nr_pmu_counters = new_n;</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;kvm-&gt;arch.config_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1600,13 +1601,14 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 		val = sanitise_id_aa64pfr0_el1(vcpu, val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SYS_ID_AA64PFR1_EL1:</div><div class='del'>-		if (!kvm_has_mte(vcpu-&gt;kvm))</div><div class='add'>+		if (!kvm_has_mte(vcpu-&gt;kvm)) {</div><div class='ctx'> 			val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE);</div><div class='add'>+			val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE_frac);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME);</div><div class='ctx'> 		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_RNDR_trap);</div><div class='ctx'> 		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_NMI);</div><div class='del'>-		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE_frac);</div><div class='ctx'> 		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_GCS);</div><div class='ctx'> 		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_THE);</div><div class='ctx'> 		val &amp;= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTEX);</div><div class='hunk'>@@ -1945,6 +1947,12 @@ static int set_id_aa64pfr0_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if ((hw_val &amp; mpam_mask) == (user_val &amp; mpam_mask))</div><div class='ctx'> 		user_val &amp;= ~ID_AA64PFR0_EL1_MPAM_MASK;</div><div class='ctx'> </div><div class='add'>+	/* Fail the guest's request to disable the AA64 ISA at EL{0,1,2} */</div><div class='add'>+	if (!FIELD_GET(ID_AA64PFR0_EL1_EL0, user_val) ||</div><div class='add'>+	    !FIELD_GET(ID_AA64PFR0_EL1_EL1, user_val) ||</div><div class='add'>+	    (vcpu_has_nv(vcpu) &amp;&amp; !FIELD_GET(ID_AA64PFR0_EL1_EL2, user_val)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return set_id_reg(vcpu, rd, user_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1953,11 +1961,34 @@ static int set_id_aa64pfr1_el1(struct kvm_vcpu *vcpu,</div><div class='ctx'> {</div><div class='ctx'> 	u64 hw_val = read_sanitised_ftr_reg(SYS_ID_AA64PFR1_EL1);</div><div class='ctx'> 	u64 mpam_mask = ID_AA64PFR1_EL1_MPAM_frac_MASK;</div><div class='add'>+	u8 mte = SYS_FIELD_GET(ID_AA64PFR1_EL1, MTE, hw_val);</div><div class='add'>+	u8 user_mte_frac = SYS_FIELD_GET(ID_AA64PFR1_EL1, MTE_frac, user_val);</div><div class='add'>+	u8 hw_mte_frac = SYS_FIELD_GET(ID_AA64PFR1_EL1, MTE_frac, hw_val);</div><div class='ctx'> </div><div class='ctx'> 	/* See set_id_aa64pfr0_el1 for comment about MPAM */</div><div class='ctx'> 	if ((hw_val &amp; mpam_mask) == (user_val &amp; mpam_mask))</div><div class='ctx'> 		user_val &amp;= ~ID_AA64PFR1_EL1_MPAM_frac_MASK;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Previously MTE_frac was hidden from guest. However, if the</div><div class='add'>+	 * hardware supports MTE2 but not MTE_ASYM_FAULT then a value</div><div class='add'>+	 * of 0 for this field indicates that the hardware supports</div><div class='add'>+	 * MTE_ASYNC. Whereas, 0xf indicates MTE_ASYNC is not supported.</div><div class='add'>+	 *</div><div class='add'>+	 * As KVM must accept values from KVM provided by user-space,</div><div class='add'>+	 * when ID_AA64PFR1_EL1.MTE is 2 allow user-space to set</div><div class='add'>+	 * ID_AA64PFR1_EL1.MTE_frac to 0. However, ignore it to avoid</div><div class='add'>+	 * incorrectly claiming hardware support for MTE_ASYNC in the</div><div class='add'>+	 * guest.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (mte == ID_AA64PFR1_EL1_MTE_MTE2 &amp;&amp;</div><div class='add'>+	    hw_mte_frac == ID_AA64PFR1_EL1_MTE_frac_NI &amp;&amp;</div><div class='add'>+	    user_mte_frac == ID_AA64PFR1_EL1_MTE_frac_ASYNC) {</div><div class='add'>+		user_val &amp;= ~ID_AA64PFR1_EL1_MTE_frac_MASK;</div><div class='add'>+		user_val |= hw_val &amp; ID_AA64PFR1_EL1_MTE_frac_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return set_id_reg(vcpu, rd, user_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2281,15 +2312,6 @@ static bool bad_redir_trap(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			"trap of EL2 register redirected to EL1");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define EL2_REG(name, acc, rst, v) {		\</div><div class='del'>-	SYS_DESC(SYS_##name),			\</div><div class='del'>-	.access = acc,				\</div><div class='del'>-	.reset = rst,				\</div><div class='del'>-	.reg = name,				\</div><div class='del'>-	.visibility = el2_visibility,		\</div><div class='del'>-	.val = v,				\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define EL2_REG_FILTERED(name, acc, rst, v, filter) {	\</div><div class='ctx'> 	SYS_DESC(SYS_##name),			\</div><div class='ctx'> 	.access = acc,				\</div><div class='hunk'>@@ -2299,6 +2321,9 @@ static bool bad_redir_trap(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	.val = v,				\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define EL2_REG(name, acc, rst, v)			\</div><div class='add'>+	EL2_REG_FILTERED(name, acc, rst, v, el2_visibility)</div><div class='add'>+</div><div class='ctx'> #define EL2_REG_VNCR(name, rst, v)	EL2_REG(name, bad_vncr_trap, rst, v)</div><div class='ctx'> #define EL2_REG_REDIR(name, rst, v)	EL2_REG(name, bad_redir_trap, rst, v)</div><div class='ctx'> </div><div class='hunk'>@@ -2446,6 +2471,16 @@ static unsigned int sve_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='ctx'> 	return __el2_visibility(vcpu, rd, sve_visibility);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int vncr_el2_visibility(const struct kvm_vcpu *vcpu,</div><div class='add'>+					const struct sys_reg_desc *rd)</div><div class='add'>+{</div><div class='add'>+	if (el2_visibility(vcpu, rd) == 0 &amp;&amp;</div><div class='add'>+	    kvm_has_feat(vcpu-&gt;kvm, ID_AA64MMFR4_EL1, NV_frac, NV2_ONLY))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return REG_HIDDEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool access_zcr_el2(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			   struct sys_reg_params *p,</div><div class='ctx'> 			   const struct sys_reg_desc *r)</div><div class='hunk'>@@ -2570,16 +2605,33 @@ static bool access_mdcr(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			struct sys_reg_params *p,</div><div class='ctx'> 			const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='del'>-	u64 old = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='add'>+	u64 hpmn, val, old = __vcpu_sys_reg(vcpu, MDCR_EL2);</div><div class='ctx'> </div><div class='del'>-	if (!access_rw(vcpu, p, r))</div><div class='del'>-		return false;</div><div class='add'>+	if (!p-&gt;is_write) {</div><div class='add'>+		p-&gt;regval = old;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = p-&gt;regval;</div><div class='add'>+	hpmn = FIELD_GET(MDCR_EL2_HPMN, val);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If HPMN is out of bounds, limit it to what we actually</div><div class='add'>+	 * support. This matches the UNKNOWN definition of the field</div><div class='add'>+	 * in that case, and keeps the emulation simple. Sort of.</div><div class='add'>+	 */</div><div class='add'>+	if (hpmn &gt; vcpu-&gt;kvm-&gt;arch.nr_pmu_counters) {</div><div class='add'>+		hpmn = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='add'>+		u64_replace_bits(val, hpmn, MDCR_EL2_HPMN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__vcpu_sys_reg(vcpu, MDCR_EL2) = val;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Request a reload of the PMU to enable/disable the counters affected</div><div class='del'>-	 * by HPME.</div><div class='add'>+	 * Request a reload of the PMU to enable/disable the counters</div><div class='add'>+	 * affected by HPME.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((old ^ __vcpu_sys_reg(vcpu, MDCR_EL2)) &amp; MDCR_EL2_HPME)</div><div class='add'>+	if ((old ^ val) &amp; MDCR_EL2_HPME)</div><div class='ctx'> 		kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -2698,6 +2750,12 @@ static int set_imp_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,</div><div class='ctx'> 	.set_user = set_imp_id_reg,			\</div><div class='ctx'> 	.reset = reset_imp_id_reg,			\</div><div class='ctx'> 	.val = mask,					\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static u64 reset_mdcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	__vcpu_sys_reg(vcpu, r-&gt;reg) = vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='add'>+	return vcpu-&gt;kvm-&gt;arch.nr_pmu_counters;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3243,7 +3301,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 	EL2_REG(SCTLR_EL2, access_rw, reset_val, SCTLR_EL2_RES1),</div><div class='ctx'> 	EL2_REG(ACTLR_EL2, access_rw, reset_val, 0),</div><div class='ctx'> 	EL2_REG_VNCR(HCR_EL2, reset_hcr, 0),</div><div class='del'>-	EL2_REG(MDCR_EL2, access_mdcr, reset_val, 0),</div><div class='add'>+	EL2_REG(MDCR_EL2, access_mdcr, reset_mdcr, 0),</div><div class='ctx'> 	EL2_REG(CPTR_EL2, access_rw, reset_val, CPTR_NVHE_EL2_RES1),</div><div class='ctx'> 	EL2_REG_VNCR(HSTR_EL2, reset_val, 0),</div><div class='ctx'> 	EL2_REG_VNCR(HFGRTR_EL2, reset_val, 0),</div><div class='hunk'>@@ -3263,6 +3321,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {</div><div class='ctx'> 			 tcr2_el2_visibility),</div><div class='ctx'> 	EL2_REG_VNCR(VTTBR_EL2, reset_val, 0),</div><div class='ctx'> 	EL2_REG_VNCR(VTCR_EL2, reset_val, 0),</div><div class='add'>+	EL2_REG_FILTERED(VNCR_EL2, bad_vncr_trap, reset_val, 0,</div><div class='add'>+			 vncr_el2_visibility),</div><div class='ctx'> </div><div class='ctx'> 	{ SYS_DESC(SYS_DACR32_EL2), undef_access, reset_unknown, DACR32_EL2 },</div><div class='ctx'> 	EL2_REG_VNCR(HDFGRTR_EL2, reset_val, 0),</div><div class='hunk'>@@ -3546,8 +3606,7 @@ static bool handle_ripas2e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> {</div><div class='ctx'> 	u32 sys_encoding = sys_insn(p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2);</div><div class='ctx'> 	u64 vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);</div><div class='del'>-	u64 base, range, tg, num, scale;</div><div class='del'>-	int shift;</div><div class='add'>+	u64 base, range;</div><div class='ctx'> </div><div class='ctx'> 	if (!kvm_supported_tlbi_ipas2_op(vcpu, sys_encoding))</div><div class='ctx'> 		return undef_access(vcpu, p, r);</div><div class='hunk'>@@ -3557,26 +3616,7 @@ static bool handle_ripas2e1is(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	 * of the guest's S2 (different base granule size, for example), we</div><div class='ctx'> 	 * decide to ignore TTL and only use the described range.</div><div class='ctx'> 	 */</div><div class='del'>-	tg	= FIELD_GET(GENMASK(47, 46), p-&gt;regval);</div><div class='del'>-	scale	= FIELD_GET(GENMASK(45, 44), p-&gt;regval);</div><div class='del'>-	num	= FIELD_GET(GENMASK(43, 39), p-&gt;regval);</div><div class='del'>-	base	= p-&gt;regval &amp; GENMASK(36, 0);</div><div class='del'>-</div><div class='del'>-	switch(tg) {</div><div class='del'>-	case 1:</div><div class='del'>-		shift = 12;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		shift = 14;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-	default:		/* IMPDEF: handle tg==0 as 64k */</div><div class='del'>-		shift = 16;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	base &lt;&lt;= shift;</div><div class='del'>-	range = __TLBI_RANGE_PAGES(num, scale) &lt;&lt; shift;</div><div class='add'>+	base = decode_range_tlbi(p-&gt;regval, &amp;range, NULL);</div><div class='ctx'> </div><div class='ctx'> 	kvm_s2_mmu_iterate_by_vmid(vcpu-&gt;kvm, get_vmid(vttbr),</div><div class='ctx'> 				   &amp;(union tlbi_info) {</div><div class='hunk'>@@ -3642,11 +3682,22 @@ static void s2_mmu_tlbi_s1e1(struct kvm_s2_mmu *mmu,</div><div class='ctx'> 	WARN_ON(__kvm_tlbi_s1e2(mmu, info-&gt;va.addr, info-&gt;va.encoding));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool handle_tlbi_el2(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='add'>+			    const struct sys_reg_desc *r)</div><div class='add'>+{</div><div class='add'>+	u32 sys_encoding = sys_insn(p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2);</div><div class='add'>+</div><div class='add'>+	if (!kvm_supported_tlbi_s1e2_op(vcpu, sys_encoding))</div><div class='add'>+		return undef_access(vcpu, p, r);</div><div class='add'>+</div><div class='add'>+	kvm_handle_s1e2_tlbi(vcpu, sys_encoding, p-&gt;regval);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool handle_tlbi_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 			    const struct sys_reg_desc *r)</div><div class='ctx'> {</div><div class='ctx'> 	u32 sys_encoding = sys_insn(p-&gt;Op0, p-&gt;Op1, p-&gt;CRn, p-&gt;CRm, p-&gt;Op2);</div><div class='del'>-	u64 vttbr = vcpu_read_sys_reg(vcpu, VTTBR_EL2);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we're here, this is because we've trapped on a EL1 TLBI</div><div class='hunk'>@@ -3657,6 +3708,13 @@ static bool handle_tlbi_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	 * - HCR_EL2.E2H == 0 : a non-VHE guest</div><div class='ctx'> 	 * - HCR_EL2.{E2H,TGE} == { 1, 0 } : a VHE guest in guest mode</div><div class='ctx'> 	 *</div><div class='add'>+	 * Another possibility is that we are invalidating the EL2 context</div><div class='add'>+	 * using EL1 instructions, but that we landed here because we need</div><div class='add'>+	 * additional invalidation for structures that are not held in the</div><div class='add'>+	 * CPU TLBs (such as the VNCR pseudo-TLB and its EL2 mapping). In</div><div class='add'>+	 * that case, we are guaranteed that HCR_EL2.{E2H,TGE} == { 1, 1 }</div><div class='add'>+	 * as we don't allow an NV-capable L1 in a nVHE configuration.</div><div class='add'>+	 *</div><div class='ctx'> 	 * We don't expect these helpers to ever be called when running</div><div class='ctx'> 	 * in a vEL1 context.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3666,7 +3724,13 @@ static bool handle_tlbi_el1(struct kvm_vcpu *vcpu, struct sys_reg_params *p,</div><div class='ctx'> 	if (!kvm_supported_tlbi_s1e1_op(vcpu, sys_encoding))</div><div class='ctx'> 		return undef_access(vcpu, p, r);</div><div class='ctx'> </div><div class='del'>-	kvm_s2_mmu_iterate_by_vmid(vcpu-&gt;kvm, get_vmid(vttbr),</div><div class='add'>+	if (vcpu_el2_e2h_is_set(vcpu) &amp;&amp; vcpu_el2_tge_is_set(vcpu)) {</div><div class='add'>+		kvm_handle_s1e2_tlbi(vcpu, sys_encoding, p-&gt;regval);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_s2_mmu_iterate_by_vmid(vcpu-&gt;kvm,</div><div class='add'>+				   get_vmid(__vcpu_sys_reg(vcpu, VTTBR_EL2)),</div><div class='ctx'> 				   &amp;(union tlbi_info) {</div><div class='ctx'> 					   .va = {</div><div class='ctx'> 						   .addr = p-&gt;regval,</div><div class='hunk'>@@ -3788,16 +3852,21 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1IS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1IS, handle_ripas2e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_ALLE2OS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2OS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2OS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2OS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1OS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2OS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2OS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1OS, handle_vmalls12e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_RVAE2IS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2IS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2IS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2IS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2IS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2IS, handle_tlbi_el2),</div><div class='ctx'> </div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1IS, handle_alle1is),</div><div class='add'>+</div><div class='add'>+	SYS_INSN(TLBI_VALE2IS, handle_tlbi_el2),</div><div class='add'>+</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1IS, handle_vmalls12e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1OS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1, handle_ipas2e1is),</div><div class='hunk'>@@ -3807,11 +3876,17 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1, handle_ripas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1OS, handle_ripas2e1is),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2OS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2OS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2OS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2OS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2, handle_tlbi_el2),</div><div class='add'>+</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1, handle_alle1is),</div><div class='add'>+</div><div class='add'>+	SYS_INSN(TLBI_VALE2, handle_tlbi_el2),</div><div class='add'>+</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1, handle_vmalls12e1is),</div><div class='ctx'> </div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1ISNXS, handle_ipas2e1is),</div><div class='hunk'>@@ -3819,19 +3894,19 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1ISNXS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1ISNXS, handle_ripas2e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_ALLE2OSNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2OSNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2OSNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2OSNXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1OSNXS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2OSNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2OSNXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1OSNXS, handle_vmalls12e1is),</div><div class='ctx'> </div><div class='del'>-	SYS_INSN(TLBI_RVAE2ISNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2ISNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_ALLE2ISNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2ISNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2ISNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2ISNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2ISNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2ISNXS, handle_tlbi_el2),</div><div class='ctx'> </div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1ISNXS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2ISNXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2ISNXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1ISNXS, handle_vmalls12e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1OSNXS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2E1NXS, handle_ipas2e1is),</div><div class='hunk'>@@ -3841,14 +3916,14 @@ static struct sys_reg_desc sys_insn_descs[] = {</div><div class='ctx'> 	SYS_INSN(TLBI_IPAS2LE1NXS, handle_ipas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1NXS, handle_ripas2e1is),</div><div class='ctx'> 	SYS_INSN(TLBI_RIPAS2LE1OSNXS, handle_ripas2e1is),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2OSNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2OSNXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVAE2NXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_RVALE2NXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_ALLE2NXS, undef_access),</div><div class='del'>-	SYS_INSN(TLBI_VAE2NXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2OSNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2OSNXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVAE2NXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_RVALE2NXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_ALLE2NXS, handle_tlbi_el2),</div><div class='add'>+	SYS_INSN(TLBI_VAE2NXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_ALLE1NXS, handle_alle1is),</div><div class='del'>-	SYS_INSN(TLBI_VALE2NXS, undef_access),</div><div class='add'>+	SYS_INSN(TLBI_VALE2NXS, handle_tlbi_el2),</div><div class='ctx'> 	SYS_INSN(TLBI_VMALLS12E1NXS, handle_vmalls12e1is),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -5147,65 +5222,13 @@ void kvm_calculate_traps(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (test_bit(KVM_ARCH_FLAG_FGU_INITIALIZED, &amp;kvm-&gt;arch.flags))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	kvm-&gt;arch.fgu[HFGxTR_GROUP] = (HFGxTR_EL2_nAMAIR2_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nMAIR2_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nS2POR_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nACCDATA_EL1		|</div><div class='del'>-				       HFGxTR_EL2_nSMPRI_EL1_MASK	|</div><div class='del'>-				       HFGxTR_EL2_nTPIDR2_EL0_MASK);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, OS))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_TLBIRVAALE1OS|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVAALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVAAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIASIDE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIVMALLE1OS);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR0_EL1, TLB, RANGE))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_TLBIRVAALE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAALE1IS|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1IS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1IS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1IS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAALE1OS|</div><div class='del'>-						HFGITR_EL2_TLBIRVALE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAAE1OS	|</div><div class='del'>-						HFGITR_EL2_TLBIRVAE1OS);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64ISAR2_EL1, ATS1A, IMP))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= HFGITR_EL2_ATS1E1A;</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64MMFR1_EL1, PAN, PAN2))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_ATS1E1RP |</div><div class='del'>-						HFGITR_EL2_ATS1E1WP);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_s1pie(kvm))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPIRE0_EL1 |</div><div class='del'>-						HFGxTR_EL2_nPIR_EL1);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_s1poe(kvm))</div><div class='del'>-		kvm-&gt;arch.fgu[HFGxTR_GROUP] |= (HFGxTR_EL2_nPOR_EL1 |</div><div class='del'>-						HFGxTR_EL2_nPOR_EL0);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, AMU, IMP))</div><div class='del'>-		kvm-&gt;arch.fgu[HAFGRTR_GROUP] |= ~(HAFGRTR_EL2_RES0 |</div><div class='del'>-						  HAFGRTR_EL2_RES1);</div><div class='del'>-</div><div class='del'>-	if (!kvm_has_feat(kvm, ID_AA64DFR0_EL1, BRBE, IMP)) {</div><div class='del'>-		kvm-&gt;arch.fgu[HDFGRTR_GROUP] |= (HDFGRTR_EL2_nBRBDATA  |</div><div class='del'>-						 HDFGRTR_EL2_nBRBCTL   |</div><div class='del'>-						 HDFGRTR_EL2_nBRBIDR);</div><div class='del'>-		kvm-&gt;arch.fgu[HFGITR_GROUP] |= (HFGITR_EL2_nBRBINJ |</div><div class='del'>-						HFGITR_EL2_nBRBIALL);</div><div class='del'>-	}</div><div class='add'>+	compute_fgu(kvm, HFGRTR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HFGITR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HDFGRTR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HAFGRTR_GROUP);</div><div class='add'>+	compute_fgu(kvm, HFGRTR2_GROUP);</div><div class='add'>+	compute_fgu(kvm, HFGITR2_GROUP);</div><div class='add'>+	compute_fgu(kvm, HDFGRTR2_GROUP);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(KVM_ARCH_FLAG_FGU_INITIALIZED, &amp;kvm-&gt;arch.flags);</div><div class='ctx'> out:</div><div class='hunk'>@@ -5263,6 +5286,8 @@ int __init kvm_sys_reg_table_init(void)</div><div class='ctx'> </div><div class='ctx'> 	ret = populate_nv_trap_config();</div><div class='ctx'> </div><div class='add'>+	check_feature_map();</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; !ret &amp;&amp; i &lt; ARRAY_SIZE(sys_reg_descs); i++)</div><div class='ctx'> 		ret = populate_sysreg_config(sys_reg_descs + i, i);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/kvm/trace_arm.h b/arch/arm64/kvm/trace_arm.h<br/>index c18c1a95831e..9c60f6465c78 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/trace_arm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/trace_arm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/trace_arm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/trace_arm.h</a></div><div class='hunk'>@@ -176,7 +176,7 @@ TRACE_EVENT(kvm_set_way_flush,</div><div class='ctx'> 	    ),</div><div class='ctx'> </div><div class='ctx'> 	    TP_printk("S/W flush at 0x%016lx (cache %s)",</div><div class='del'>-		      __entry-&gt;vcpu_pc, __entry-&gt;cache ? "on" : "off")</div><div class='add'>+		      __entry-&gt;vcpu_pc, str_on_off(__entry-&gt;cache))</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> TRACE_EVENT(kvm_toggle_cache,</div><div class='hunk'>@@ -196,8 +196,8 @@ TRACE_EVENT(kvm_toggle_cache,</div><div class='ctx'> 	    ),</div><div class='ctx'> </div><div class='ctx'> 	    TP_printk("VM op at 0x%016lx (cache was %s, now %s)",</div><div class='del'>-		      __entry-&gt;vcpu_pc, __entry-&gt;was ? "on" : "off",</div><div class='del'>-		      __entry-&gt;now ? "on" : "off")</div><div class='add'>+		      __entry-&gt;vcpu_pc, str_on_off(__entry-&gt;was),</div><div class='add'>+		      str_on_off(__entry-&gt;now))</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-debug.c b/arch/arm64/kvm/vgic/vgic-debug.c<br/>index afb018528bc3..f8425f381de9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-debug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic-debug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/vgic/vgic-debug.c</a></div><div class='hunk'>@@ -320,3 +320,227 @@ void vgic_debug_init(struct kvm *kvm)</div><div class='ctx'> void vgic_debug_destroy(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct vgic_its_iter - Iterator for traversing VGIC ITS device tables.</div><div class='add'>+ * @dev: Pointer to the current its_device being processed.</div><div class='add'>+ * @ite: Pointer to the current its_ite within the device being processed.</div><div class='add'>+ *</div><div class='add'>+ * This structure is used to maintain the current position during iteration</div><div class='add'>+ * over the ITS device tables. It holds pointers to both the current device</div><div class='add'>+ * and the current ITE within that device.</div><div class='add'>+ */</div><div class='add'>+struct vgic_its_iter {</div><div class='add'>+	struct its_device *dev;</div><div class='add'>+	struct its_ite *ite;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * end_of_iter - Checks if the iterator has reached the end.</div><div class='add'>+ * @iter: The iterator to check.</div><div class='add'>+ *</div><div class='add'>+ * When the iterator completed processing the final ITE in the last device</div><div class='add'>+ * table, it was marked to indicate the end of iteration by setting its</div><div class='add'>+ * device and ITE pointers to NULL.</div><div class='add'>+ * This function checks whether the iterator was marked as end.</div><div class='add'>+ *</div><div class='add'>+ * Return: True if the iterator is marked as end, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool end_of_iter(struct vgic_its_iter *iter)</div><div class='add'>+{</div><div class='add'>+	return !iter-&gt;dev &amp;&amp; !iter-&gt;ite;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_iter_next - Advances the iterator to the next entry in the ITS tables.</div><div class='add'>+ * @its: The VGIC ITS structure.</div><div class='add'>+ * @iter: The iterator to advance.</div><div class='add'>+ *</div><div class='add'>+ * This function moves the iterator to the next ITE within the current device,</div><div class='add'>+ * or to the first ITE of the next device if the current ITE is the last in</div><div class='add'>+ * the device. If the current device is the last device, the iterator is set</div><div class='add'>+ * to indicate the end of iteration.</div><div class='add'>+ */</div><div class='add'>+static void vgic_its_iter_next(struct vgic_its *its, struct vgic_its_iter *iter)</div><div class='add'>+{</div><div class='add'>+	struct its_device *dev = iter-&gt;dev;</div><div class='add'>+	struct its_ite *ite = iter-&gt;ite;</div><div class='add'>+</div><div class='add'>+	if (!ite || list_is_last(&amp;ite-&gt;ite_list, &amp;dev-&gt;itt_head)) {</div><div class='add'>+		if (list_is_last(&amp;dev-&gt;dev_list, &amp;its-&gt;device_list)) {</div><div class='add'>+			dev = NULL;</div><div class='add'>+			ite = NULL;</div><div class='add'>+		} else {</div><div class='add'>+			dev = list_next_entry(dev, dev_list);</div><div class='add'>+			ite = list_first_entry_or_null(&amp;dev-&gt;itt_head,</div><div class='add'>+						       struct its_ite,</div><div class='add'>+						       ite_list);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		ite = list_next_entry(ite, ite_list);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iter-&gt;dev = dev;</div><div class='add'>+	iter-&gt;ite = ite;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_start - Start function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @pos: The starting position (offset).</div><div class='add'>+ *</div><div class='add'>+ * This function initializes the iterator to the beginning of the ITS tables</div><div class='add'>+ * and advances it to the specified position. It acquires the its_lock mutex</div><div class='add'>+ * to protect shared data.</div><div class='add'>+ *</div><div class='add'>+ * Return: An iterator pointer on success, NULL if no devices are found or</div><div class='add'>+ *         the end of the list is reached, or ERR_PTR(-ENOMEM) on memory</div><div class='add'>+ *         allocation failure.</div><div class='add'>+ */</div><div class='add'>+static void *vgic_its_debug_start(struct seq_file *s, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = s-&gt;private;</div><div class='add'>+	struct vgic_its_iter *iter;</div><div class='add'>+	struct its_device *dev;</div><div class='add'>+	loff_t offset = *pos;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;its-&gt;its_lock);</div><div class='add'>+</div><div class='add'>+	dev = list_first_entry_or_null(&amp;its-&gt;device_list,</div><div class='add'>+				       struct its_device, dev_list);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	iter = kmalloc(sizeof(*iter), GFP_KERNEL);</div><div class='add'>+	if (!iter)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	iter-&gt;dev = dev;</div><div class='add'>+	iter-&gt;ite = list_first_entry_or_null(&amp;dev-&gt;itt_head,</div><div class='add'>+					     struct its_ite, ite_list);</div><div class='add'>+</div><div class='add'>+	while (!end_of_iter(iter) &amp;&amp; offset--)</div><div class='add'>+		vgic_its_iter_next(its, iter);</div><div class='add'>+</div><div class='add'>+	if (end_of_iter(iter)) {</div><div class='add'>+		kfree(iter);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return iter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_next - Next function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @v: The current iterator.</div><div class='add'>+ * @pos: The current position (offset).</div><div class='add'>+ *</div><div class='add'>+ * This function advances the iterator to the next entry and increments the</div><div class='add'>+ * position.</div><div class='add'>+ *</div><div class='add'>+ * Return: An iterator pointer on success, or NULL if the end of the list is</div><div class='add'>+ *         reached.</div><div class='add'>+ */</div><div class='add'>+static void *vgic_its_debug_next(struct seq_file *s, void *v, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = s-&gt;private;</div><div class='add'>+	struct vgic_its_iter *iter = v;</div><div class='add'>+</div><div class='add'>+	++*pos;</div><div class='add'>+	vgic_its_iter_next(its, iter);</div><div class='add'>+</div><div class='add'>+	if (end_of_iter(iter)) {</div><div class='add'>+		kfree(iter);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return iter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_stop - Stop function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @v: The current iterator.</div><div class='add'>+ *</div><div class='add'>+ * This function frees the iterator and releases the its_lock mutex.</div><div class='add'>+ */</div><div class='add'>+static void vgic_its_debug_stop(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = s-&gt;private;</div><div class='add'>+	struct vgic_its_iter *iter = v;</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR_OR_NULL(iter))</div><div class='add'>+		kfree(iter);</div><div class='add'>+	mutex_unlock(&amp;its-&gt;its_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_show - Show function for the seq_file interface.</div><div class='add'>+ * @s: The seq_file structure.</div><div class='add'>+ * @v: The current iterator.</div><div class='add'>+ *</div><div class='add'>+ * This function formats and prints the ITS table entry information to the</div><div class='add'>+ * seq_file output.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success.</div><div class='add'>+ */</div><div class='add'>+static int vgic_its_debug_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its_iter *iter = v;</div><div class='add'>+	struct its_device *dev = iter-&gt;dev;</div><div class='add'>+	struct its_ite *ite = iter-&gt;ite;</div><div class='add'>+</div><div class='add'>+	if (list_is_first(&amp;ite-&gt;ite_list, &amp;dev-&gt;itt_head)) {</div><div class='add'>+		seq_printf(s, "\n");</div><div class='add'>+		seq_printf(s, "Device ID: 0x%x, Event ID Range: [0 - %llu]\n",</div><div class='add'>+			   dev-&gt;device_id, BIT_ULL(dev-&gt;num_eventid_bits) - 1);</div><div class='add'>+		seq_printf(s, "EVENT_ID    INTID  HWINTID   TARGET   COL_ID HW\n");</div><div class='add'>+		seq_printf(s, "-----------------------------------------------\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ite &amp;&amp; ite-&gt;irq &amp;&amp; ite-&gt;collection) {</div><div class='add'>+		seq_printf(s, "%8u %8u %8u %8u %8u %2d\n",</div><div class='add'>+			   ite-&gt;event_id, ite-&gt;irq-&gt;intid, ite-&gt;irq-&gt;hwintid,</div><div class='add'>+			   ite-&gt;collection-&gt;target_addr,</div><div class='add'>+			   ite-&gt;collection-&gt;collection_id, ite-&gt;irq-&gt;hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct seq_operations vgic_its_debug_sops = {</div><div class='add'>+	.start = vgic_its_debug_start,</div><div class='add'>+	.next  = vgic_its_debug_next,</div><div class='add'>+	.stop  = vgic_its_debug_stop,</div><div class='add'>+	.show  = vgic_its_debug_show</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DEFINE_SEQ_ATTRIBUTE(vgic_its_debug);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vgic_its_debug_init - Initializes the debugfs interface for VGIC ITS.</div><div class='add'>+ * @dev: The KVM device structure.</div><div class='add'>+ *</div><div class='add'>+ * This function creates a debugfs file named "vgic-its-state@%its_base"</div><div class='add'>+ * to expose the ITS table information.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success.</div><div class='add'>+ */</div><div class='add'>+int vgic_its_debug_init(struct kvm_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct vgic_its *its = dev-&gt;private;</div><div class='add'>+	char *name;</div><div class='add'>+</div><div class='add'>+	name = kasprintf(GFP_KERNEL, "vgic-its-state@%llx", (u64)its-&gt;vgic_its_base);</div><div class='add'>+	if (!name)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file(name, 0444, dev-&gt;kvm-&gt;debugfs_dentry, its, &amp;vgic_its_debug_fops);</div><div class='add'>+</div><div class='add'>+	kfree(name);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vgic_its_debug_destroy(struct kvm_device *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-its.c b/arch/arm64/kvm/vgic/vgic-its.c<br/>index fb96802799c6..569f9da9049f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-its.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic-its.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-its.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/vgic/vgic-its.c</a></div><div class='hunk'>@@ -154,36 +154,6 @@ out_unlock:</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct its_device {</div><div class='del'>-	struct list_head dev_list;</div><div class='del'>-</div><div class='del'>-	/* the head for the list of ITTEs */</div><div class='del'>-	struct list_head itt_head;</div><div class='del'>-	u32 num_eventid_bits;</div><div class='del'>-	gpa_t itt_addr;</div><div class='del'>-	u32 device_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define COLLECTION_NOT_MAPPED ((u32)~0)</div><div class='del'>-</div><div class='del'>-struct its_collection {</div><div class='del'>-	struct list_head coll_list;</div><div class='del'>-</div><div class='del'>-	u32 collection_id;</div><div class='del'>-	u32 target_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define its_is_collection_mapped(coll) ((coll) &amp;&amp; \</div><div class='del'>-				((coll)-&gt;target_addr != COLLECTION_NOT_MAPPED))</div><div class='del'>-</div><div class='del'>-struct its_ite {</div><div class='del'>-	struct list_head ite_list;</div><div class='del'>-</div><div class='del'>-	struct vgic_irq *irq;</div><div class='del'>-	struct its_collection *collection;</div><div class='del'>-	u32 event_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * struct vgic_its_abi - ITS abi ops and settings</div><div class='ctx'>  * @cte_esz: collection table entry size</div><div class='hunk'>@@ -1938,6 +1908,8 @@ static void vgic_its_destroy(struct kvm_device *kvm_dev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;its-&gt;its_lock);</div><div class='ctx'> </div><div class='add'>+	vgic_its_debug_destroy(kvm_dev);</div><div class='add'>+</div><div class='ctx'> 	vgic_its_free_device_list(kvm, its);</div><div class='ctx'> 	vgic_its_free_collection_list(kvm, its);</div><div class='ctx'> 	vgic_its_invalidate_cache(its);</div><div class='hunk'>@@ -2771,7 +2743,12 @@ static int vgic_its_set_attr(struct kvm_device *dev,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		return vgic_register_its_iodev(dev-&gt;kvm, its, addr);</div><div class='add'>+		ret = vgic_register_its_iodev(dev-&gt;kvm, its, addr);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		return vgic_its_debug_init(dev);</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> 	case KVM_DEV_ARM_VGIC_GRP_CTRL:</div><div class='ctx'> 		return vgic_its_ctrl(dev-&gt;kvm, its, attr-&gt;attr);</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic-v3-nested.c b/arch/arm64/kvm/vgic/vgic-v3-nested.c<br/>index bfa5bde1f106..4f6954c30674 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-v3-nested.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic-v3-nested.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic-v3-nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/vgic/vgic-v3-nested.c</a></div><div class='hunk'>@@ -240,9 +240,6 @@ static void vgic_v3_create_shadow_lr(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			goto next;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* It is illegal to have the EOI bit set with HW */</div><div class='del'>-		lr &amp;= ~ICH_LR_EOI;</div><div class='del'>-</div><div class='ctx'> 		/* Translate the virtual mapping to the real one */</div><div class='ctx'> 		lr &amp;= ~ICH_LR_PHYS_ID_MASK;</div><div class='ctx'> 		lr |= FIELD_PREP(ICH_LR_PHYS_ID_MASK, (u64)irq-&gt;hwintid);</div><div class='head'>diff --git a/arch/arm64/kvm/vgic/vgic.h b/arch/arm64/kvm/vgic/vgic.h<br/>index 0c5a63712702..4349084cb9a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/kvm/vgic/vgic.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/kvm/vgic/vgic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/kvm/vgic/vgic.h</a></div><div class='hunk'>@@ -172,6 +172,36 @@ struct vgic_reg_attr {</div><div class='ctx'> 	gpa_t addr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct its_device {</div><div class='add'>+	struct list_head dev_list;</div><div class='add'>+</div><div class='add'>+	/* the head for the list of ITTEs */</div><div class='add'>+	struct list_head itt_head;</div><div class='add'>+	u32 num_eventid_bits;</div><div class='add'>+	gpa_t itt_addr;</div><div class='add'>+	u32 device_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define COLLECTION_NOT_MAPPED ((u32)~0)</div><div class='add'>+</div><div class='add'>+struct its_collection {</div><div class='add'>+	struct list_head coll_list;</div><div class='add'>+</div><div class='add'>+	u32 collection_id;</div><div class='add'>+	u32 target_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define its_is_collection_mapped(coll) ((coll) &amp;&amp; \</div><div class='add'>+				((coll)-&gt;target_addr != COLLECTION_NOT_MAPPED))</div><div class='add'>+</div><div class='add'>+struct its_ite {</div><div class='add'>+	struct list_head ite_list;</div><div class='add'>+</div><div class='add'>+	struct vgic_irq *irq;</div><div class='add'>+	struct its_collection *collection;</div><div class='add'>+	u32 event_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int vgic_v3_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,</div><div class='ctx'> 		       struct vgic_reg_attr *reg_attr);</div><div class='ctx'> int vgic_v2_parse_attr(struct kvm_device *dev, struct kvm_device_attr *attr,</div><div class='hunk'>@@ -359,4 +389,7 @@ void vgic_v3_put_nested(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vgic_v3_handle_nested_maint_irq(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vgic_v3_nested_update_mi(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+int vgic_its_debug_init(struct kvm_device *dev);</div><div class='add'>+void vgic_its_debug_destroy(struct kvm_device *dev);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/arm64/lib/Makefile b/arch/arm64/lib/Makefile<br/>index 4d49dff721a8..027bfa9689c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/Makefile</a></div><div class='hunk'>@@ -1,4 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+obj-y += crypto/</div><div class='add'>+</div><div class='ctx'> lib-y		:= clear_user.o delay.o copy_from_user.o		\</div><div class='ctx'> 		   copy_to_user.o copy_page.o				\</div><div class='ctx'> 		   clear_page.o csum.o insn.o memchr.o memcpy.o		\</div><div class='hunk'>@@ -14,10 +17,10 @@ endif</div><div class='ctx'> lib-$(CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE) += uaccess_flushcache.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC32_ARCH) += crc32-arm64.o</div><div class='del'>-crc32-arm64-y := crc32.o crc32-glue.o</div><div class='add'>+crc32-arm64-y := crc32.o crc32-core.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC_T10DIF_ARCH) += crc-t10dif-arm64.o</div><div class='del'>-crc-t10dif-arm64-y := crc-t10dif-glue.o crc-t10dif-core.o</div><div class='add'>+crc-t10dif-arm64-y := crc-t10dif.o crc-t10dif-core.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/lib/crc-t10dif-glue.c b/arch/arm64/lib/crc-t10dif.c<br/>index bacd18f23168..c2ffe4fdb59d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/lib/crc-t10dif-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crc-t10dif-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crc-t10dif.c</a></div><div class='hunk'>@@ -17,8 +17,8 @@</div><div class='ctx'> #include &lt;asm/neon.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_asimd);</div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_pmull);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_asimd);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pmull);</div><div class='ctx'> </div><div class='ctx'> #define CRC_T10DIF_PMULL_CHUNK_SIZE	16U</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +61,7 @@ static int __init crc_t10dif_arm64_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc_t10dif_arm64_init);</div><div class='add'>+subsys_initcall(crc_t10dif_arm64_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc_t10dif_arm64_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/lib/crc32.S b/arch/arm64/lib/crc32-core.S<br/>index 68825317460f..68825317460f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/lib/crc32.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crc32.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crc32-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crc32-core.S</a></div><div class='head'>diff --git a/arch/arm64/lib/crc32-glue.c b/arch/arm64/lib/crc32.c<br/>index ed3acd71178f..ed3acd71178f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/lib/crc32-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/crc32-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crc32.c</a></div><div class='head'>diff --git a/arch/arm64/lib/crypto/.gitignore b/arch/arm64/lib/crypto/.gitignore<br/>new file mode 100644<br/>index 000000000000..12d74d8b03d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+poly1305-core.S</div><div class='add'>+sha256-core.S</div><div class='head'>diff --git a/arch/arm64/lib/crypto/Kconfig b/arch/arm64/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..129a7685cb4c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_CHACHA20_NEON</div><div class='add'>+	tristate</div><div class='add'>+	depends on KERNEL_MODE_NEON</div><div class='add'>+	default CRYPTO_LIB_CHACHA</div><div class='add'>+	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='add'>+</div><div class='add'>+config CRYPTO_POLY1305_NEON</div><div class='add'>+	tristate</div><div class='add'>+	depends on KERNEL_MODE_NEON</div><div class='add'>+	default CRYPTO_LIB_POLY1305</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='add'>+</div><div class='add'>+config CRYPTO_SHA256_ARM64</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256_SIMD</div><div class='head'>diff --git a/arch/arm64/lib/crypto/Makefile b/arch/arm64/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..946c09903711<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o</div><div class='add'>+chacha-neon-y := chacha-neon-core.o chacha-neon-glue.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_POLY1305_NEON) += poly1305-neon.o</div><div class='add'>+poly1305-neon-y := poly1305-core.o poly1305-glue.o</div><div class='add'>+AFLAGS_poly1305-core.o += -Dpoly1305_init=poly1305_block_init_arch</div><div class='add'>+AFLAGS_poly1305-core.o += -Dpoly1305_emit=poly1305_emit_arch</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256_ARM64) += sha256-arm64.o</div><div class='add'>+sha256-arm64-y := sha256.o sha256-core.o</div><div class='add'>+sha256-arm64-$(CONFIG_KERNEL_MODE_NEON) += sha256-ce.o</div><div class='add'>+</div><div class='add'>+quiet_cmd_perlasm = PERLASM $@</div><div class='add'>+      cmd_perlasm = $(PERL) $(&lt;) void $(@)</div><div class='add'>+</div><div class='add'>+$(obj)/%-core.S: $(src)/%-armv8.pl</div><div class='add'>+	$(call cmd,perlasm)</div><div class='add'>+</div><div class='add'>+$(obj)/sha256-core.S: $(src)/sha2-armv8.pl</div><div class='add'>+	$(call cmd,perlasm)</div><div class='add'>+</div><div class='add'>+clean-files += poly1305-core.S sha256-core.S</div><div class='head'>diff --git a/arch/arm64/crypto/chacha-neon-core.S b/arch/arm64/lib/crypto/chacha-neon-core.S<br/>index b70ac76f2610..80079586ecc7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/chacha-neon-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/chacha-neon-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/chacha-neon-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/chacha-neon-core.S</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /*</div><div class='del'>- * ChaCha/XChaCha NEON helper functions</div><div class='add'>+ * ChaCha/HChaCha NEON helper functions</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2016-2018 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  *</div><div class='head'>diff --git a/arch/arm64/lib/crypto/chacha-neon-glue.c b/arch/arm64/lib/crypto/chacha-neon-glue.c<br/>new file mode 100644<br/>index 000000000000..d0188f974ca5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/chacha-neon-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/chacha-neon-glue.c</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+/*</div><div class='add'>+ * ChaCha and HChaCha functions (ARM64 optimized)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016 - 2017 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License version 2 as</div><div class='add'>+ * published by the Free Software Foundation.</div><div class='add'>+ *</div><div class='add'>+ * Based on:</div><div class='add'>+ * ChaCha20 256-bit cipher algorithm, RFC7539, SIMD glue code</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Martin Willi</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify</div><div class='add'>+ * it under the terms of the GNU General Public License as published by</div><div class='add'>+ * the Free Software Foundation; either version 2 of the License, or</div><div class='add'>+ * (at your option) any later version.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_block_xor_neon(const struct chacha_state *state,</div><div class='add'>+				      u8 *dst, const u8 *src, int nrounds);</div><div class='add'>+asmlinkage void chacha_4block_xor_neon(const struct chacha_state *state,</div><div class='add'>+				       u8 *dst, const u8 *src,</div><div class='add'>+				       int nrounds, int bytes);</div><div class='add'>+asmlinkage void hchacha_block_neon(const struct chacha_state *state,</div><div class='add'>+				   u32 out[HCHACHA_OUT_WORDS], int nrounds);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='add'>+</div><div class='add'>+static void chacha_doneon(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+			  int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	while (bytes &gt; 0) {</div><div class='add'>+		int l = min(bytes, CHACHA_BLOCK_SIZE * 5);</div><div class='add'>+</div><div class='add'>+		if (l &lt;= CHACHA_BLOCK_SIZE) {</div><div class='add'>+			u8 buf[CHACHA_BLOCK_SIZE];</div><div class='add'>+</div><div class='add'>+			memcpy(buf, src, l);</div><div class='add'>+			chacha_block_xor_neon(state, buf, buf, nrounds);</div><div class='add'>+			memcpy(dst, buf, l);</div><div class='add'>+			state-&gt;x[12] += 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		chacha_4block_xor_neon(state, dst, src, nrounds, l);</div><div class='add'>+		bytes -= l;</div><div class='add'>+		src += l;</div><div class='add'>+		dst += l;</div><div class='add'>+		state-&gt;x[12] += DIV_ROUND_UP(l, CHACHA_BLOCK_SIZE);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hchacha_block_arch(const struct chacha_state *state,</div><div class='add'>+			u32 out[HCHACHA_OUT_WORDS], int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (!static_branch_likely(&amp;have_neon) || !crypto_simd_usable()) {</div><div class='add'>+		hchacha_block_generic(state, out, nrounds);</div><div class='add'>+	} else {</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		hchacha_block_neon(state, out, nrounds);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hchacha_block_arch);</div><div class='add'>+</div><div class='add'>+void chacha_crypt_arch(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+		       unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (!static_branch_likely(&amp;have_neon) || bytes &lt;= CHACHA_BLOCK_SIZE ||</div><div class='add'>+	    !crypto_simd_usable())</div><div class='add'>+		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='add'>+</div><div class='add'>+		kernel_neon_begin();</div><div class='add'>+		chacha_doneon(state, dst, src, todo, nrounds);</div><div class='add'>+		kernel_neon_end();</div><div class='add'>+</div><div class='add'>+		bytes -= todo;</div><div class='add'>+		src += todo;</div><div class='add'>+		dst += todo;</div><div class='add'>+	} while (bytes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='add'>+</div><div class='add'>+bool chacha_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;have_neon);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init chacha_simd_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (cpu_have_named_feature(ASIMD))</div><div class='add'>+		static_branch_enable(&amp;have_neon);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(chacha_simd_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit chacha_simd_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(chacha_simd_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ChaCha and HChaCha functions (ARM64 optimized)");</div><div class='add'>+MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/arm64/crypto/poly1305-armv8.pl b/arch/arm64/lib/crypto/poly1305-armv8.pl<br/>index 22c9069c0650..22c9069c0650 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/poly1305-armv8.pl?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/poly1305-armv8.pl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/poly1305-armv8.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/poly1305-armv8.pl</a></div><div class='head'>diff --git a/arch/arm64/lib/crypto/poly1305-glue.c b/arch/arm64/lib/crypto/poly1305-glue.c<br/>new file mode 100644<br/>index 000000000000..6a661cf04821<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/poly1305-glue.c</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * OpenSSL/Cryptogams accelerated Poly1305 transform for arm64</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/hwcap.h&gt;</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;crypto/internal/poly1305.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void poly1305_block_init_arch(</div><div class='add'>+	struct poly1305_block_state *state,</div><div class='add'>+	const u8 raw_key[POLY1305_BLOCK_SIZE]);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_block_init_arch);</div><div class='add'>+asmlinkage void poly1305_blocks(struct poly1305_block_state *state,</div><div class='add'>+				const u8 *src, u32 len, u32 hibit);</div><div class='add'>+asmlinkage void poly1305_blocks_neon(struct poly1305_block_state *state,</div><div class='add'>+				     const u8 *src, u32 len, u32 hibit);</div><div class='add'>+asmlinkage void poly1305_emit_arch(const struct poly1305_state *state,</div><div class='add'>+				   u8 digest[POLY1305_DIGEST_SIZE],</div><div class='add'>+				   const u32 nonce[4]);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_emit_arch);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='add'>+</div><div class='add'>+void poly1305_blocks_arch(struct poly1305_block_state *state, const u8 *src,</div><div class='add'>+			  unsigned int len, u32 padbit)</div><div class='add'>+{</div><div class='add'>+	len = round_down(len, POLY1305_BLOCK_SIZE);</div><div class='add'>+	if (static_branch_likely(&amp;have_neon)) {</div><div class='add'>+		do {</div><div class='add'>+			unsigned int todo = min_t(unsigned int, len, SZ_4K);</div><div class='add'>+</div><div class='add'>+			kernel_neon_begin();</div><div class='add'>+			poly1305_blocks_neon(state, src, todo, 1);</div><div class='add'>+			kernel_neon_end();</div><div class='add'>+</div><div class='add'>+			len -= todo;</div><div class='add'>+			src += todo;</div><div class='add'>+		} while (len);</div><div class='add'>+	} else</div><div class='add'>+		poly1305_blocks(state, src, len, 1);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_blocks_arch);</div><div class='add'>+</div><div class='add'>+bool poly1305_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	/* We always can use at least the ARM64 scalar implementation. */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(poly1305_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init neon_poly1305_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (cpu_have_named_feature(ASIMD))</div><div class='add'>+		static_branch_enable(&amp;have_neon);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(neon_poly1305_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit neon_poly1305_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(neon_poly1305_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Poly1305 authenticator (ARM64 optimized)");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/arm64/crypto/sha512-armv8.pl b/arch/arm64/lib/crypto/sha2-armv8.pl<br/>index 35ec9ae99fe1..4aebd20c498b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha512-armv8.pl?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha512-armv8.pl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/sha2-armv8.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/sha2-armv8.pl</a></div><div class='hunk'>@@ -95,7 +95,7 @@ if ($output =~ /512/) {</div><div class='ctx'> 	$reg_t="w";</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-$func="sha${BITS}_block_data_order";</div><div class='add'>+$func="sha${BITS}_blocks_arch";</div><div class='ctx'> </div><div class='ctx'> ($ctx,$inp,$num,$Ktbl)=map("x$_",(0..2,30));</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/crypto/sha2-ce-core.S b/arch/arm64/lib/crypto/sha256-ce.S<br/>index fce84d88ddb2..f3e21c6d87d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/crypto/sha2-ce-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/crypto/sha2-ce-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/sha256-ce.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/sha256-ce.S</a></div><div class='hunk'>@@ -71,8 +71,8 @@</div><div class='ctx'> 	.word		0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * int __sha256_ce_transform(struct sha256_ce_state *sst, u8 const *src,</div><div class='del'>-	 *			     int blocks)</div><div class='add'>+	 * size_t __sha256_ce_transform(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+	 *				const u8 *data, size_t nblocks);</div><div class='ctx'> 	 */</div><div class='ctx'> 	.text</div><div class='ctx'> SYM_FUNC_START(__sha256_ce_transform)</div><div class='hunk'>@@ -86,20 +86,16 @@ SYM_FUNC_START(__sha256_ce_transform)</div><div class='ctx'> 	/* load state */</div><div class='ctx'> 	ld1		{dgav.4s, dgbv.4s}, [x0]</div><div class='ctx'> </div><div class='del'>-	/* load sha256_ce_state::finalize */</div><div class='del'>-	ldr_l		w4, sha256_ce_offsetof_finalize, x4</div><div class='del'>-	ldr		w4, [x0, x4]</div><div class='del'>-</div><div class='ctx'> 	/* load input */</div><div class='ctx'> 0:	ld1		{v16.4s-v19.4s}, [x1], #64</div><div class='del'>-	sub		w2, w2, #1</div><div class='add'>+	sub		x2, x2, #1</div><div class='ctx'> </div><div class='ctx'> CPU_LE(	rev32		v16.16b, v16.16b	)</div><div class='ctx'> CPU_LE(	rev32		v17.16b, v17.16b	)</div><div class='ctx'> CPU_LE(	rev32		v18.16b, v18.16b	)</div><div class='ctx'> CPU_LE(	rev32		v19.16b, v19.16b	)</div><div class='ctx'> </div><div class='del'>-1:	add		t0.4s, v16.4s, v0.4s</div><div class='add'>+	add		t0.4s, v16.4s, v0.4s</div><div class='ctx'> 	mov		dg0v.16b, dgav.16b</div><div class='ctx'> 	mov		dg1v.16b, dgbv.16b</div><div class='ctx'> </div><div class='hunk'>@@ -127,31 +123,14 @@ CPU_LE(	rev32		v19.16b, v19.16b	)</div><div class='ctx'> 	add		dgav.4s, dgav.4s, dg0v.4s</div><div class='ctx'> 	add		dgbv.4s, dgbv.4s, dg1v.4s</div><div class='ctx'> </div><div class='del'>-	/* handled all input blocks? */</div><div class='del'>-	cbz		w2, 2f</div><div class='del'>-	cond_yield	3f, x5, x6</div><div class='del'>-	b		0b</div><div class='add'>+	/* return early if voluntary preemption is needed */</div><div class='add'>+	cond_yield	1f, x5, x6</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Final block: add padding and total bit count.</div><div class='del'>-	 * Skip if the input size was not a round multiple of the block size,</div><div class='del'>-	 * the padding is handled by the C code in that case.</div><div class='del'>-	 */</div><div class='del'>-2:	cbz		x4, 3f</div><div class='del'>-	ldr_l		w4, sha256_ce_offsetof_count, x4</div><div class='del'>-	ldr		x4, [x0, x4]</div><div class='del'>-	movi		v17.2d, #0</div><div class='del'>-	mov		x8, #0x80000000</div><div class='del'>-	movi		v18.2d, #0</div><div class='del'>-	ror		x7, x4, #29		// ror(lsl(x4, 3), 32)</div><div class='del'>-	fmov		d16, x8</div><div class='del'>-	mov		x4, #0</div><div class='del'>-	mov		v19.d[0], xzr</div><div class='del'>-	mov		v19.d[1], x7</div><div class='del'>-	b		1b</div><div class='add'>+	/* handled all input blocks? */</div><div class='add'>+	cbnz		x2, 0b</div><div class='ctx'> </div><div class='ctx'> 	/* store new state */</div><div class='del'>-3:	st1		{dgav.4s, dgbv.4s}, [x0]</div><div class='del'>-	mov		w0, w2</div><div class='add'>+1:	st1		{dgav.4s, dgbv.4s}, [x0]</div><div class='add'>+	mov		x0, x2</div><div class='ctx'> 	ret</div><div class='ctx'> SYM_FUNC_END(__sha256_ce_transform)</div><div class='head'>diff --git a/arch/arm64/lib/crypto/sha256.c b/arch/arm64/lib/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..bcf7a3adc0c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * SHA-256 optimized for ARM64</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Google LLC</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				   const u8 *data, size_t nblocks);</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='add'>+asmlinkage void sha256_block_neon(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				  const u8 *data, size_t nblocks);</div><div class='add'>+asmlinkage size_t __sha256_ce_transform(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+					const u8 *data, size_t nblocks);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_neon);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_ce);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_simd(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='add'>+	    static_branch_likely(&amp;have_neon)) {</div><div class='add'>+		if (static_branch_likely(&amp;have_ce)) {</div><div class='add'>+			do {</div><div class='add'>+				size_t rem;</div><div class='add'>+</div><div class='add'>+				kernel_neon_begin();</div><div class='add'>+				rem = __sha256_ce_transform(state,</div><div class='add'>+							    data, nblocks);</div><div class='add'>+				kernel_neon_end();</div><div class='add'>+				data += (nblocks - rem) * SHA256_BLOCK_SIZE;</div><div class='add'>+				nblocks = rem;</div><div class='add'>+			} while (nblocks);</div><div class='add'>+		} else {</div><div class='add'>+			kernel_neon_begin();</div><div class='add'>+			sha256_block_neon(state, data, nblocks);</div><div class='add'>+			kernel_neon_end();</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		sha256_blocks_arch(state, data, nblocks);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_simd);</div><div class='add'>+</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	/* We always can use at least the ARM64 scalar implementation. */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init sha256_arm64_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp;</div><div class='add'>+	    cpu_have_named_feature(ASIMD)) {</div><div class='add'>+		static_branch_enable(&amp;have_neon);</div><div class='add'>+		if (cpu_have_named_feature(SHA2))</div><div class='add'>+			static_branch_enable(&amp;have_ce);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(sha256_arm64_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit sha256_arm64_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(sha256_arm64_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 optimized for ARM64");</div><div class='head'>diff --git a/arch/arm64/lib/insn.c b/arch/arm64/lib/insn.c<br/>index 9bef696e2230..4e298baddc2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/lib/insn.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/lib/insn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/lib/insn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/lib/insn.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2014-2016 Zi Shen Lim &lt;zlim.lnx@gmail.com&gt;</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='ctx'> #include &lt;linux/printk.h&gt;</div><div class='hunk'>@@ -1500,43 +1501,41 @@ u32 aarch64_insn_gen_extr(enum aarch64_insn_variant variant,</div><div class='ctx'> 	return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, Rm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)</div><div class='add'>+static u32 __get_barrier_crm_val(enum aarch64_insn_mb_type type)</div><div class='ctx'> {</div><div class='del'>-	u32 opt;</div><div class='del'>-	u32 insn;</div><div class='del'>-</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case AARCH64_INSN_MB_SY:</div><div class='del'>-		opt = 0xf;</div><div class='del'>-		break;</div><div class='add'>+		return 0xf;</div><div class='ctx'> 	case AARCH64_INSN_MB_ST:</div><div class='del'>-		opt = 0xe;</div><div class='del'>-		break;</div><div class='add'>+		return 0xe;</div><div class='ctx'> 	case AARCH64_INSN_MB_LD:</div><div class='del'>-		opt = 0xd;</div><div class='del'>-		break;</div><div class='add'>+		return 0xd;</div><div class='ctx'> 	case AARCH64_INSN_MB_ISH:</div><div class='del'>-		opt = 0xb;</div><div class='del'>-		break;</div><div class='add'>+		return 0xb;</div><div class='ctx'> 	case AARCH64_INSN_MB_ISHST:</div><div class='del'>-		opt = 0xa;</div><div class='del'>-		break;</div><div class='add'>+		return 0xa;</div><div class='ctx'> 	case AARCH64_INSN_MB_ISHLD:</div><div class='del'>-		opt = 0x9;</div><div class='del'>-		break;</div><div class='add'>+		return 0x9;</div><div class='ctx'> 	case AARCH64_INSN_MB_NSH:</div><div class='del'>-		opt = 0x7;</div><div class='del'>-		break;</div><div class='add'>+		return 0x7;</div><div class='ctx'> 	case AARCH64_INSN_MB_NSHST:</div><div class='del'>-		opt = 0x6;</div><div class='del'>-		break;</div><div class='add'>+		return 0x6;</div><div class='ctx'> 	case AARCH64_INSN_MB_NSHLD:</div><div class='del'>-		opt = 0x5;</div><div class='del'>-		break;</div><div class='add'>+		return 0x5;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("%s: unknown dmb type %d\n", __func__, type);</div><div class='add'>+		pr_err("%s: unknown barrier type %d\n", __func__, type);</div><div class='ctx'> 		return AARCH64_BREAK_FAULT;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)</div><div class='add'>+{</div><div class='add'>+	u32 opt;</div><div class='add'>+	u32 insn;</div><div class='add'>+</div><div class='add'>+	opt = __get_barrier_crm_val(type);</div><div class='add'>+	if (opt == AARCH64_BREAK_FAULT)</div><div class='add'>+		return AARCH64_BREAK_FAULT;</div><div class='ctx'> </div><div class='ctx'> 	insn = aarch64_insn_get_dmb_value();</div><div class='ctx'> 	insn &amp;= ~GENMASK(11, 8);</div><div class='hunk'>@@ -1545,6 +1544,21 @@ u32 aarch64_insn_gen_dmb(enum aarch64_insn_mb_type type)</div><div class='ctx'> 	return insn;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 aarch64_insn_gen_dsb(enum aarch64_insn_mb_type type)</div><div class='add'>+{</div><div class='add'>+	u32 opt, insn;</div><div class='add'>+</div><div class='add'>+	opt = __get_barrier_crm_val(type);</div><div class='add'>+	if (opt == AARCH64_BREAK_FAULT)</div><div class='add'>+		return AARCH64_BREAK_FAULT;</div><div class='add'>+</div><div class='add'>+	insn = aarch64_insn_get_dsb_base_value();</div><div class='add'>+	insn &amp;= ~GENMASK(11, 8);</div><div class='add'>+	insn |= (opt &lt;&lt; 8);</div><div class='add'>+</div><div class='add'>+	return insn;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 aarch64_insn_gen_mrs(enum aarch64_insn_register result,</div><div class='ctx'> 			 enum aarch64_insn_system_register sysreg)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/arm64/mm/hugetlbpage.c b/arch/arm64/mm/hugetlbpage.c<br/>index cfe8cb8ba1cc..0c8737f4f2ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/mm/hugetlbpage.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/mm/hugetlbpage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -129,7 +129,7 @@ pte_t huge_ptep_get(struct mm_struct *mm, unsigned long addr, pte_t *ptep)</div><div class='ctx'> 	if (!pte_present(orig_pte) || !pte_cont(orig_pte))</div><div class='ctx'> 		return orig_pte;</div><div class='ctx'> </div><div class='del'>-	ncontig = num_contig_ptes(page_size(pte_page(orig_pte)), &amp;pgsize);</div><div class='add'>+	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='ctx'> 	for (i = 0; i &lt; ncontig; i++, ptep++) {</div><div class='ctx'> 		pte_t pte = __ptep_get(ptep);</div><div class='ctx'> </div><div class='hunk'>@@ -159,12 +159,11 @@ static pte_t get_clear_contig(struct mm_struct *mm,</div><div class='ctx'> 	pte_t pte, tmp_pte;</div><div class='ctx'> 	bool present;</div><div class='ctx'> </div><div class='del'>-	pte = __ptep_get_and_clear(mm, addr, ptep);</div><div class='add'>+	pte = __ptep_get_and_clear_anysz(mm, ptep, pgsize);</div><div class='ctx'> 	present = pte_present(pte);</div><div class='ctx'> 	while (--ncontig) {</div><div class='ctx'> 		ptep++;</div><div class='del'>-		addr += pgsize;</div><div class='del'>-		tmp_pte = __ptep_get_and_clear(mm, addr, ptep);</div><div class='add'>+		tmp_pte = __ptep_get_and_clear_anysz(mm, ptep, pgsize);</div><div class='ctx'> 		if (present) {</div><div class='ctx'> 			if (pte_dirty(tmp_pte))</div><div class='ctx'> 				pte = pte_mkdirty(pte);</div><div class='hunk'>@@ -183,8 +182,9 @@ static pte_t get_clear_contig_flush(struct mm_struct *mm,</div><div class='ctx'> {</div><div class='ctx'> 	pte_t orig_pte = get_clear_contig(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> 	struct vm_area_struct vma = TLB_FLUSH_VMA(mm, 0);</div><div class='add'>+	unsigned long end = addr + (pgsize * ncontig);</div><div class='ctx'> </div><div class='del'>-	flush_tlb_range(&amp;vma, addr, addr + (pgsize * ncontig));</div><div class='add'>+	__flush_hugetlb_tlb_range(&amp;vma, addr, end, pgsize, true);</div><div class='ctx'> 	return orig_pte;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -207,9 +207,12 @@ static void clear_flush(struct mm_struct *mm,</div><div class='ctx'> 	unsigned long i, saddr = addr;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ncontig; i++, addr += pgsize, ptep++)</div><div class='del'>-		__ptep_get_and_clear(mm, addr, ptep);</div><div class='add'>+		__ptep_get_and_clear_anysz(mm, ptep, pgsize);</div><div class='ctx'> </div><div class='del'>-	flush_tlb_range(&amp;vma, saddr, addr);</div><div class='add'>+	if (mm == &amp;init_mm)</div><div class='add'>+		flush_tlb_kernel_range(saddr, addr);</div><div class='add'>+	else</div><div class='add'>+		__flush_hugetlb_tlb_range(&amp;vma, saddr, addr, pgsize, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='hunk'>@@ -218,30 +221,20 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 	size_t pgsize;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int ncontig;</div><div class='del'>-	unsigned long pfn, dpfn;</div><div class='del'>-	pgprot_t hugeprot;</div><div class='ctx'> </div><div class='ctx'> 	ncontig = num_contig_ptes(sz, &amp;pgsize);</div><div class='ctx'> </div><div class='ctx'> 	if (!pte_present(pte)) {</div><div class='ctx'> 		for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize)</div><div class='del'>-			__set_ptes(mm, addr, ptep, pte, 1);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!pte_cont(pte)) {</div><div class='del'>-		__set_ptes(mm, addr, ptep, pte, 1);</div><div class='add'>+			__set_ptes_anysz(mm, ptep, pte, 1, pgsize);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pfn = pte_pfn(pte);</div><div class='del'>-	dpfn = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	hugeprot = pte_pgprot(pte);</div><div class='del'>-</div><div class='del'>-	clear_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='add'>+	/* Only need to "break" if transitioning valid -&gt; valid. */</div><div class='add'>+	if (pte_cont(pte) &amp;&amp; pte_valid(__ptep_get(ptep)))</div><div class='add'>+		clear_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize, pfn += dpfn)</div><div class='del'>-		__set_ptes(mm, addr, ptep, pfn_pte(pfn, hugeprot), 1);</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> pte_t *huge_pte_alloc(struct mm_struct *mm, struct vm_area_struct *vma,</div><div class='hunk'>@@ -431,23 +424,23 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> 			       unsigned long addr, pte_t *ptep,</div><div class='ctx'> 			       pte_t pte, int dirty)</div><div class='ctx'> {</div><div class='del'>-	int ncontig, i;</div><div class='add'>+	int ncontig;</div><div class='ctx'> 	size_t pgsize = 0;</div><div class='del'>-	unsigned long pfn = pte_pfn(pte), dpfn;</div><div class='ctx'> 	struct mm_struct *mm = vma-&gt;vm_mm;</div><div class='del'>-	pgprot_t hugeprot;</div><div class='ctx'> 	pte_t orig_pte;</div><div class='ctx'> </div><div class='add'>+	VM_WARN_ON(!pte_present(pte));</div><div class='add'>+</div><div class='ctx'> 	if (!pte_cont(pte))</div><div class='ctx'> 		return __ptep_set_access_flags(vma, addr, ptep, pte, dirty);</div><div class='ctx'> </div><div class='del'>-	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='del'>-	dpfn = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	ncontig = num_contig_ptes(huge_page_size(hstate_vma(vma)), &amp;pgsize);</div><div class='ctx'> </div><div class='ctx'> 	if (!__cont_access_flags_changed(ptep, pte, ncontig))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	orig_pte = get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='add'>+	VM_WARN_ON(!pte_present(orig_pte));</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure we don't lose the dirty or young state */</div><div class='ctx'> 	if (pte_dirty(orig_pte))</div><div class='hunk'>@@ -456,38 +449,31 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='ctx'> 	if (pte_young(orig_pte))</div><div class='ctx'> 		pte = pte_mkyoung(pte);</div><div class='ctx'> </div><div class='del'>-	hugeprot = pte_pgprot(pte);</div><div class='del'>-	for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize, pfn += dpfn)</div><div class='del'>-		__set_ptes(mm, addr, ptep, pfn_pte(pfn, hugeprot), 1);</div><div class='del'>-</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void huge_ptep_set_wrprotect(struct mm_struct *mm,</div><div class='ctx'> 			     unsigned long addr, pte_t *ptep)</div><div class='ctx'> {</div><div class='del'>-	unsigned long pfn, dpfn;</div><div class='del'>-	pgprot_t hugeprot;</div><div class='del'>-	int ncontig, i;</div><div class='add'>+	int ncontig;</div><div class='ctx'> 	size_t pgsize;</div><div class='ctx'> 	pte_t pte;</div><div class='ctx'> </div><div class='del'>-	if (!pte_cont(__ptep_get(ptep))) {</div><div class='add'>+	pte = __ptep_get(ptep);</div><div class='add'>+	VM_WARN_ON(!pte_present(pte));</div><div class='add'>+</div><div class='add'>+	if (!pte_cont(pte)) {</div><div class='ctx'> 		__ptep_set_wrprotect(mm, addr, ptep);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='del'>-	dpfn = pgsize &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	pte = get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> 	pte = pte_wrprotect(pte);</div><div class='ctx'> </div><div class='del'>-	hugeprot = pte_pgprot(pte);</div><div class='del'>-	pfn = pte_pfn(pte);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ncontig; i++, ptep++, addr += pgsize, pfn += dpfn)</div><div class='del'>-		__set_ptes(mm, addr, ptep, pfn_pte(pfn, hugeprot), 1);</div><div class='add'>+	__set_ptes_anysz(mm, ptep, pte, ncontig, pgsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='hunk'>@@ -497,10 +483,7 @@ pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,</div><div class='ctx'> 	size_t pgsize;</div><div class='ctx'> 	int ncontig;</div><div class='ctx'> </div><div class='del'>-	if (!pte_cont(__ptep_get(ptep)))</div><div class='del'>-		return ptep_clear_flush(vma, addr, ptep);</div><div class='del'>-</div><div class='del'>-	ncontig = find_num_contig(mm, addr, ptep, &amp;pgsize);</div><div class='add'>+	ncontig = num_contig_ptes(huge_page_size(hstate_vma(vma)), &amp;pgsize);</div><div class='ctx'> 	return get_clear_contig_flush(mm, addr, ptep, pgsize, ncontig);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c<br/>index b99bf3980fc6..0c8c35dd645e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/mm/init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/mm/init.c</a></div><div class='hunk'>@@ -275,26 +275,6 @@ void __init arm64_memblock_init(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {</div><div class='del'>-		extern u16 memstart_offset_seed;</div><div class='del'>-		u64 mmfr0 = read_cpuid(ID_AA64MMFR0_EL1);</div><div class='del'>-		int parange = cpuid_feature_extract_unsigned_field(</div><div class='del'>-					mmfr0, ID_AA64MMFR0_EL1_PARANGE_SHIFT);</div><div class='del'>-		s64 range = linear_region_size -</div><div class='del'>-			    BIT(id_aa64mmfr0_parange_to_phys_shift(parange));</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If the size of the linear region exceeds, by a sufficient</div><div class='del'>-		 * margin, the size of the region that the physical memory can</div><div class='del'>-		 * span, randomize the linear region as well.</div><div class='del'>-		 */</div><div class='del'>-		if (memstart_offset_seed &gt; 0 &amp;&amp; range &gt;= (s64)ARM64_MEMSTART_ALIGN) {</div><div class='del'>-			range /= ARM64_MEMSTART_ALIGN;</div><div class='del'>-			memstart_addr -= ARM64_MEMSTART_ALIGN *</div><div class='del'>-					 ((range * memstart_offset_seed) &gt;&gt; 16);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Register the kernel text, kernel data, initrd, and initial</div><div class='ctx'> 	 * pagetables with memblock.</div><div class='head'>diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c<br/>index 39fd1f7ff02a..04d4a8f676db 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/mm/pageattr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/pageattr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/mm/pageattr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/mm/pageattr.c</a></div><div class='hunk'>@@ -96,8 +96,8 @@ static int change_memory_common(unsigned long addr, int numpages,</div><div class='ctx'> 	 * we are operating on does not result in such splitting.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Let's restrict ourselves to mappings created by vmalloc (or vmap).</div><div class='del'>-	 * Those are guaranteed to consist entirely of page mappings, and</div><div class='del'>-	 * splitting is never needed.</div><div class='add'>+	 * Disallow VM_ALLOW_HUGE_VMAP mappings to guarantee that only page</div><div class='add'>+	 * mappings are updated and splitting is never needed.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * So check whether the [addr, addr + size) interval is entirely</div><div class='ctx'> 	 * covered by precisely one VM area that has the VM_ALLOC flag set.</div><div class='hunk'>@@ -105,7 +105,7 @@ static int change_memory_common(unsigned long addr, int numpages,</div><div class='ctx'> 	area = find_vm_area((void *)addr);</div><div class='ctx'> 	if (!area ||</div><div class='ctx'> 	    end &gt; (unsigned long)kasan_reset_tag(area-&gt;addr) + area-&gt;size ||</div><div class='del'>-	    !(area-&gt;flags &amp; VM_ALLOC))</div><div class='add'>+	    ((area-&gt;flags &amp; (VM_ALLOC | VM_ALLOW_HUGE_VMAP)) != VM_ALLOC))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!numpages)</div><div class='head'>diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S<br/>index fb30c8804f87..80d470aa469d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/mm/proc.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/mm/proc.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/mm/proc.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/mm/proc.S</a></div><div class='hunk'>@@ -512,26 +512,11 @@ alternative_else_nop_endif</div><div class='ctx'> 	ubfx	x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4</div><div class='ctx'> 	cbz	x1, .Lskip_indirection</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The PROT_* macros describing the various memory types may resolve to</div><div class='del'>-	 * C expressions if they include the PTE_MAYBE_* macros, and so they</div><div class='del'>-	 * can only be used from C code. The PIE_E* constants below are also</div><div class='del'>-	 * defined in terms of those macros, but will mask out those</div><div class='del'>-	 * PTE_MAYBE_* constants, whether they are set or not. So #define them</div><div class='del'>-	 * as 0x0 here so we can evaluate the PIE_E* constants in asm context.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-#define PTE_MAYBE_NG		0</div><div class='del'>-#define PTE_MAYBE_SHARED	0</div><div class='del'>-</div><div class='del'>-	mov_q	x0, PIE_E0</div><div class='add'>+	mov_q	x0, PIE_E0_ASM</div><div class='ctx'> 	msr	REG_PIRE0_EL1, x0</div><div class='del'>-	mov_q	x0, PIE_E1</div><div class='add'>+	mov_q	x0, PIE_E1_ASM</div><div class='ctx'> 	msr	REG_PIR_EL1, x0</div><div class='ctx'> </div><div class='del'>-#undef PTE_MAYBE_NG</div><div class='del'>-#undef PTE_MAYBE_SHARED</div><div class='del'>-</div><div class='ctx'> 	orr	tcr2, tcr2, TCR2_EL1_PIE</div><div class='ctx'> 	msr	REG_TCR2_EL1, x0</div><div class='ctx'> </div><div class='head'>diff --git a/arch/arm64/net/bpf_jit_comp.c b/arch/arm64/net/bpf_jit_comp.c<br/>index 70d7c89d3ac9..da8b89dd2910 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/net/bpf_jit_comp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) "bpf_jit: " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/arm-smccc.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='hunk'>@@ -17,6 +18,7 @@</div><div class='ctx'> #include &lt;asm/asm-extable.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/debug-monitors.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/text-patching.h&gt;</div><div class='hunk'>@@ -939,7 +941,51 @@ static void build_plt(struct jit_ctx *ctx)</div><div class='ctx'> 		plt-&gt;target = (u64)&amp;dummy_tramp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void build_epilogue(struct jit_ctx *ctx)</div><div class='add'>+/* Clobbers BPF registers 1-4, aka x0-x3 */</div><div class='add'>+static void __maybe_unused build_bhb_mitigation(struct jit_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	const u8 r1 = bpf2a64[BPF_REG_1]; /* aka x0 */</div><div class='add'>+	u8 k = get_spectre_bhb_loop_value();</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY) ||</div><div class='add'>+	    cpu_mitigations_off() || __nospectre_bhb ||</div><div class='add'>+	    arm64_get_spectre_v2_state() == SPECTRE_VULNERABLE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (capable(CAP_SYS_ADMIN))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (supports_clearbhb(SCOPE_SYSTEM)) {</div><div class='add'>+		emit(aarch64_insn_gen_hint(AARCH64_INSN_HINT_CLEARBHB), ctx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (k) {</div><div class='add'>+		emit_a64_mov_i64(r1, k, ctx);</div><div class='add'>+		emit(A64_B(1), ctx);</div><div class='add'>+		emit(A64_SUBS_I(true, r1, r1, 1), ctx);</div><div class='add'>+		emit(A64_B_(A64_COND_NE, -2), ctx);</div><div class='add'>+		emit(aarch64_insn_gen_dsb(AARCH64_INSN_MB_ISH), ctx);</div><div class='add'>+		emit(aarch64_insn_get_isb_value(), ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_spectre_bhb_fw_mitigated()) {</div><div class='add'>+		emit(A64_ORR_I(false, r1, AARCH64_INSN_REG_ZR,</div><div class='add'>+			       ARM_SMCCC_ARCH_WORKAROUND_3), ctx);</div><div class='add'>+		switch (arm_smccc_1_1_get_conduit()) {</div><div class='add'>+		case SMCCC_CONDUIT_HVC:</div><div class='add'>+			emit(aarch64_insn_get_hvc_value(), ctx);</div><div class='add'>+			break;</div><div class='add'>+		case SMCCC_CONDUIT_SMC:</div><div class='add'>+			emit(aarch64_insn_get_smc_value(), ctx);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pr_err_once("Firmware mitigation enabled with unknown conduit\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void build_epilogue(struct jit_ctx *ctx, bool was_classic)</div><div class='ctx'> {</div><div class='ctx'> 	const u8 r0 = bpf2a64[BPF_REG_0];</div><div class='ctx'> 	const u8 ptr = bpf2a64[TCCNT_PTR];</div><div class='hunk'>@@ -952,10 +998,13 @@ static void build_epilogue(struct jit_ctx *ctx)</div><div class='ctx'> </div><div class='ctx'> 	emit(A64_POP(A64_ZR, ptr, A64_SP), ctx);</div><div class='ctx'> </div><div class='add'>+	if (was_classic)</div><div class='add'>+		build_bhb_mitigation(ctx);</div><div class='add'>+</div><div class='ctx'> 	/* Restore FP/LR registers */</div><div class='ctx'> 	emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);</div><div class='ctx'> </div><div class='del'>-	/* Set return value */</div><div class='add'>+	/* Move the return value from bpf:r0 (aka x7) to x0 */</div><div class='ctx'> 	emit(A64_MOV(1, A64_R(0), r0), ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* Authenticate lr */</div><div class='hunk'>@@ -1898,7 +1947,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ctx.epilogue_offset = ctx.idx;</div><div class='del'>-	build_epilogue(&amp;ctx);</div><div class='add'>+	build_epilogue(&amp;ctx, was_classic);</div><div class='ctx'> 	build_plt(&amp;ctx);</div><div class='ctx'> </div><div class='ctx'> 	extable_align = __alignof__(struct exception_table_entry);</div><div class='hunk'>@@ -1961,7 +2010,7 @@ skip_init_ctx:</div><div class='ctx'> 		goto out_free_hdr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	build_epilogue(&amp;ctx);</div><div class='add'>+	build_epilogue(&amp;ctx, was_classic);</div><div class='ctx'> 	build_plt(&amp;ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* Extra pass to validate JITed code. */</div><div class='hunk'>@@ -2064,7 +2113,7 @@ bool bpf_jit_supports_subprog_tailcalls(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='del'>-			    int args_off, int retval_off, int run_ctx_off,</div><div class='add'>+			    int bargs_off, int retval_off, int run_ctx_off,</div><div class='ctx'> 			    bool save_ret)</div><div class='ctx'> {</div><div class='ctx'> 	__le32 *branch;</div><div class='hunk'>@@ -2106,7 +2155,7 @@ static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='ctx'> 	branch = ctx-&gt;image + ctx-&gt;idx;</div><div class='ctx'> 	emit(A64_NOP, ctx);</div><div class='ctx'> </div><div class='del'>-	emit(A64_ADD_I(1, A64_R(0), A64_SP, args_off), ctx);</div><div class='add'>+	emit(A64_ADD_I(1, A64_R(0), A64_SP, bargs_off), ctx);</div><div class='ctx'> 	if (!p-&gt;jited)</div><div class='ctx'> 		emit_addr_mov_i64(A64_R(1), (const u64)p-&gt;insnsi, ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -2131,7 +2180,7 @@ static void invoke_bpf_prog(struct jit_ctx *ctx, struct bpf_tramp_link *l,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void invoke_bpf_mod_ret(struct jit_ctx *ctx, struct bpf_tramp_links *tl,</div><div class='del'>-			       int args_off, int retval_off, int run_ctx_off,</div><div class='add'>+			       int bargs_off, int retval_off, int run_ctx_off,</div><div class='ctx'> 			       __le32 **branches)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -2141,7 +2190,7 @@ static void invoke_bpf_mod_ret(struct jit_ctx *ctx, struct bpf_tramp_links *tl,</div><div class='ctx'> 	 */</div><div class='ctx'> 	emit(A64_STR64I(A64_ZR, A64_SP, retval_off), ctx);</div><div class='ctx'> 	for (i = 0; i &lt; tl-&gt;nr_links; i++) {</div><div class='del'>-		invoke_bpf_prog(ctx, tl-&gt;links[i], args_off, retval_off,</div><div class='add'>+		invoke_bpf_prog(ctx, tl-&gt;links[i], bargs_off, retval_off,</div><div class='ctx'> 				run_ctx_off, true);</div><div class='ctx'> 		/* if (*(u64 *)(sp + retval_off) !=  0)</div><div class='ctx'> 		 *	goto do_fexit;</div><div class='hunk'>@@ -2155,23 +2204,125 @@ static void invoke_bpf_mod_ret(struct jit_ctx *ctx, struct bpf_tramp_links *tl,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void save_args(struct jit_ctx *ctx, int args_off, int nregs)</div><div class='add'>+struct arg_aux {</div><div class='add'>+	/* how many args are passed through registers, the rest of the args are</div><div class='add'>+	 * passed through stack</div><div class='add'>+	 */</div><div class='add'>+	int args_in_regs;</div><div class='add'>+	/* how many registers are used to pass arguments */</div><div class='add'>+	int regs_for_args;</div><div class='add'>+	/* how much stack is used for additional args passed to bpf program</div><div class='add'>+	 * that did not fit in original function registers</div><div class='add'>+	 */</div><div class='add'>+	int bstack_for_args;</div><div class='add'>+	/* home much stack is used for additional args passed to the</div><div class='add'>+	 * original function when called from trampoline (this one needs</div><div class='add'>+	 * arguments to be properly aligned)</div><div class='add'>+	 */</div><div class='add'>+	int ostack_for_args;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int calc_arg_aux(const struct btf_func_model *m,</div><div class='add'>+			 struct arg_aux *a)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	int stack_slots, nregs, slots, i;</div><div class='add'>+</div><div class='add'>+	/* verifier ensures m-&gt;nr_args &lt;= MAX_BPF_FUNC_ARGS */</div><div class='add'>+	for (i = 0, nregs = 0; i &lt; m-&gt;nr_args; i++) {</div><div class='add'>+		slots = (m-&gt;arg_size[i] + 7) / 8;</div><div class='add'>+		if (nregs + slots &lt;= 8) /* passed through register ? */</div><div class='add'>+			nregs += slots;</div><div class='add'>+		else</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a-&gt;args_in_regs = i;</div><div class='add'>+	a-&gt;regs_for_args = nregs;</div><div class='add'>+	a-&gt;ostack_for_args = 0;</div><div class='add'>+	a-&gt;bstack_for_args = 0;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nregs; i++) {</div><div class='del'>-		emit(A64_STR64I(i, A64_SP, args_off), ctx);</div><div class='del'>-		args_off += 8;</div><div class='add'>+	/* the rest arguments are passed through stack */</div><div class='add'>+	for (; i &lt; m-&gt;nr_args; i++) {</div><div class='add'>+		/* We can not know for sure about exact alignment needs for</div><div class='add'>+		 * struct passed on stack, so deny those</div><div class='add'>+		 */</div><div class='add'>+		if (m-&gt;arg_flags[i] &amp; BTF_FMODEL_STRUCT_ARG)</div><div class='add'>+			return -ENOTSUPP;</div><div class='add'>+		stack_slots = (m-&gt;arg_size[i] + 7) / 8;</div><div class='add'>+		a-&gt;bstack_for_args += stack_slots * 8;</div><div class='add'>+		a-&gt;ostack_for_args = a-&gt;ostack_for_args + stack_slots * 8;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void restore_args(struct jit_ctx *ctx, int args_off, int nregs)</div><div class='add'>+static void clear_garbage(struct jit_ctx *ctx, int reg, int effective_bytes)</div><div class='add'>+{</div><div class='add'>+	if (effective_bytes) {</div><div class='add'>+		int garbage_bits = 64 - 8 * effective_bytes;</div><div class='add'>+#ifdef CONFIG_CPU_BIG_ENDIAN</div><div class='add'>+		/* garbage bits are at the right end */</div><div class='add'>+		emit(A64_LSR(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+		emit(A64_LSL(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+#else</div><div class='add'>+		/* garbage bits are at the left end */</div><div class='add'>+		emit(A64_LSL(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+		emit(A64_LSR(1, reg, reg, garbage_bits), ctx);</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void save_args(struct jit_ctx *ctx, int bargs_off, int oargs_off,</div><div class='add'>+		      const struct btf_func_model *m,</div><div class='add'>+		      const struct arg_aux *a,</div><div class='add'>+		      bool for_call_origin)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='add'>+	int reg;</div><div class='add'>+	int doff;</div><div class='add'>+	int soff;</div><div class='add'>+	int slots;</div><div class='add'>+	u8 tmp = bpf2a64[TMP_REG_1];</div><div class='add'>+</div><div class='add'>+	/* store arguments to the stack for the bpf program, or restore</div><div class='add'>+	 * arguments from stack for the original function</div><div class='add'>+	 */</div><div class='add'>+	for (reg = 0; reg &lt; a-&gt;regs_for_args; reg++) {</div><div class='add'>+		emit(for_call_origin ?</div><div class='add'>+		     A64_LDR64I(reg, A64_SP, bargs_off) :</div><div class='add'>+		     A64_STR64I(reg, A64_SP, bargs_off),</div><div class='add'>+		     ctx);</div><div class='add'>+		bargs_off += 8;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nregs; i++) {</div><div class='del'>-		emit(A64_LDR64I(i, A64_SP, args_off), ctx);</div><div class='del'>-		args_off += 8;</div><div class='add'>+	soff = 32; /* on stack arguments start from FP + 32 */</div><div class='add'>+	doff = (for_call_origin ? oargs_off : bargs_off);</div><div class='add'>+</div><div class='add'>+	/* save on stack arguments */</div><div class='add'>+	for (i = a-&gt;args_in_regs; i &lt; m-&gt;nr_args; i++) {</div><div class='add'>+		slots = (m-&gt;arg_size[i] + 7) / 8;</div><div class='add'>+		/* verifier ensures arg_size &lt;= 16, so slots equals 1 or 2 */</div><div class='add'>+		while (slots-- &gt; 0) {</div><div class='add'>+			emit(A64_LDR64I(tmp, A64_FP, soff), ctx);</div><div class='add'>+			/* if there is unused space in the last slot, clear</div><div class='add'>+			 * the garbage contained in the space.</div><div class='add'>+			 */</div><div class='add'>+			if (slots == 0 &amp;&amp; !for_call_origin)</div><div class='add'>+				clear_garbage(ctx, tmp, m-&gt;arg_size[i] % 8);</div><div class='add'>+			emit(A64_STR64I(tmp, A64_SP, doff), ctx);</div><div class='add'>+			soff += 8;</div><div class='add'>+			doff += 8;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void restore_args(struct jit_ctx *ctx, int bargs_off, int nregs)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	for (reg = 0; reg &lt; nregs; reg++) {</div><div class='add'>+		emit(A64_LDR64I(reg, A64_SP, bargs_off), ctx);</div><div class='add'>+		bargs_off += 8;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2194,17 +2345,21 @@ static bool is_struct_ops_tramp(const struct bpf_tramp_links *fentry_links)</div><div class='ctx'>  */</div><div class='ctx'> static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 			      struct bpf_tramp_links *tlinks, void *func_addr,</div><div class='del'>-			      int nregs, u32 flags)</div><div class='add'>+			      const struct btf_func_model *m,</div><div class='add'>+			      const struct arg_aux *a,</div><div class='add'>+			      u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int stack_size;</div><div class='ctx'> 	int retaddr_off;</div><div class='ctx'> 	int regs_off;</div><div class='ctx'> 	int retval_off;</div><div class='del'>-	int args_off;</div><div class='del'>-	int nregs_off;</div><div class='add'>+	int bargs_off;</div><div class='add'>+	int nfuncargs_off;</div><div class='ctx'> 	int ip_off;</div><div class='ctx'> 	int run_ctx_off;</div><div class='add'>+	int oargs_off;</div><div class='add'>+	int nfuncargs;</div><div class='ctx'> 	struct bpf_tramp_links *fentry = &amp;tlinks[BPF_TRAMP_FENTRY];</div><div class='ctx'> 	struct bpf_tramp_links *fexit = &amp;tlinks[BPF_TRAMP_FEXIT];</div><div class='ctx'> 	struct bpf_tramp_links *fmod_ret = &amp;tlinks[BPF_TRAMP_MODIFY_RETURN];</div><div class='hunk'>@@ -2213,31 +2368,38 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	bool is_struct_ops = is_struct_ops_tramp(fentry);</div><div class='ctx'> </div><div class='ctx'> 	/* trampoline stack layout:</div><div class='del'>-	 *                  [ parent ip         ]</div><div class='del'>-	 *                  [ FP                ]</div><div class='del'>-	 * SP + retaddr_off [ self ip           ]</div><div class='del'>-	 *                  [ FP                ]</div><div class='add'>+	 *                    [ parent ip         ]</div><div class='add'>+	 *                    [ FP                ]</div><div class='add'>+	 * SP + retaddr_off   [ self ip           ]</div><div class='add'>+	 *                    [ FP                ]</div><div class='ctx'> 	 *</div><div class='del'>-	 *                  [ padding           ] align SP to multiples of 16</div><div class='add'>+	 *                    [ padding           ] align SP to multiples of 16</div><div class='ctx'> 	 *</div><div class='del'>-	 *                  [ x20               ] callee saved reg x20</div><div class='del'>-	 * SP + regs_off    [ x19               ] callee saved reg x19</div><div class='add'>+	 *                    [ x20               ] callee saved reg x20</div><div class='add'>+	 * SP + regs_off      [ x19               ] callee saved reg x19</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + retval_off  [ return value      ] BPF_TRAMP_F_CALL_ORIG or</div><div class='del'>-	 *                                        BPF_TRAMP_F_RET_FENTRY_RET</div><div class='add'>+	 * SP + retval_off    [ return value      ] BPF_TRAMP_F_CALL_ORIG or</div><div class='add'>+	 *                                          BPF_TRAMP_F_RET_FENTRY_RET</div><div class='add'>+	 *                    [ arg reg N         ]</div><div class='add'>+	 *                    [ ...               ]</div><div class='add'>+	 * SP + bargs_off     [ arg reg 1         ] for bpf</div><div class='ctx'> 	 *</div><div class='del'>-	 *                  [ arg reg N         ]</div><div class='del'>-	 *                  [ ...               ]</div><div class='del'>-	 * SP + args_off    [ arg reg 1         ]</div><div class='add'>+	 * SP + nfuncargs_off [ arg regs count    ]</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + nregs_off   [ arg regs count    ]</div><div class='add'>+	 * SP + ip_off        [ traced function   ] BPF_TRAMP_F_IP_ARG flag</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + ip_off      [ traced function   ] BPF_TRAMP_F_IP_ARG flag</div><div class='add'>+	 * SP + run_ctx_off   [ bpf_tramp_run_ctx ]</div><div class='ctx'> 	 *</div><div class='del'>-	 * SP + run_ctx_off [ bpf_tramp_run_ctx ]</div><div class='add'>+	 *                    [ stack arg N       ]</div><div class='add'>+	 *                    [ ...               ]</div><div class='add'>+	 * SP + oargs_off     [ stack arg 1       ] for original func</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	stack_size = 0;</div><div class='add'>+	oargs_off = stack_size;</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_CALL_ORIG)</div><div class='add'>+		stack_size +=  a-&gt;ostack_for_args;</div><div class='add'>+</div><div class='ctx'> 	run_ctx_off = stack_size;</div><div class='ctx'> 	/* room for bpf_tramp_run_ctx */</div><div class='ctx'> 	stack_size += round_up(sizeof(struct bpf_tramp_run_ctx), 8);</div><div class='hunk'>@@ -2247,13 +2409,14 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_IP_ARG)</div><div class='ctx'> 		stack_size += 8;</div><div class='ctx'> </div><div class='del'>-	nregs_off = stack_size;</div><div class='add'>+	nfuncargs_off = stack_size;</div><div class='ctx'> 	/* room for args count */</div><div class='ctx'> 	stack_size += 8;</div><div class='ctx'> </div><div class='del'>-	args_off = stack_size;</div><div class='add'>+	bargs_off = stack_size;</div><div class='ctx'> 	/* room for args */</div><div class='del'>-	stack_size += nregs * 8;</div><div class='add'>+	nfuncargs = a-&gt;regs_for_args + a-&gt;bstack_for_args / 8;</div><div class='add'>+	stack_size += 8 * nfuncargs;</div><div class='ctx'> </div><div class='ctx'> 	/* room for return value */</div><div class='ctx'> 	retval_off = stack_size;</div><div class='hunk'>@@ -2300,11 +2463,11 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* save arg regs count*/</div><div class='del'>-	emit(A64_MOVZ(1, A64_R(10), nregs, 0), ctx);</div><div class='del'>-	emit(A64_STR64I(A64_R(10), A64_SP, nregs_off), ctx);</div><div class='add'>+	emit(A64_MOVZ(1, A64_R(10), nfuncargs, 0), ctx);</div><div class='add'>+	emit(A64_STR64I(A64_R(10), A64_SP, nfuncargs_off), ctx);</div><div class='ctx'> </div><div class='del'>-	/* save arg regs */</div><div class='del'>-	save_args(ctx, args_off, nregs);</div><div class='add'>+	/* save args for bpf */</div><div class='add'>+	save_args(ctx, bargs_off, oargs_off, m, a, false);</div><div class='ctx'> </div><div class='ctx'> 	/* save callee saved registers */</div><div class='ctx'> 	emit(A64_STR64I(A64_R(19), A64_SP, regs_off), ctx);</div><div class='hunk'>@@ -2320,7 +2483,7 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fentry-&gt;nr_links; i++)</div><div class='del'>-		invoke_bpf_prog(ctx, fentry-&gt;links[i], args_off,</div><div class='add'>+		invoke_bpf_prog(ctx, fentry-&gt;links[i], bargs_off,</div><div class='ctx'> 				retval_off, run_ctx_off,</div><div class='ctx'> 				flags &amp; BPF_TRAMP_F_RET_FENTRY_RET);</div><div class='ctx'> </div><div class='hunk'>@@ -2330,12 +2493,13 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 		if (!branches)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		invoke_bpf_mod_ret(ctx, fmod_ret, args_off, retval_off,</div><div class='add'>+		invoke_bpf_mod_ret(ctx, fmod_ret, bargs_off, retval_off,</div><div class='ctx'> 				   run_ctx_off, branches);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='del'>-		restore_args(ctx, args_off, nregs);</div><div class='add'>+		/* save args for original func */</div><div class='add'>+		save_args(ctx, bargs_off, oargs_off, m, a, true);</div><div class='ctx'> 		/* call original func */</div><div class='ctx'> 		emit(A64_LDR64I(A64_R(10), A64_SP, retaddr_off), ctx);</div><div class='ctx'> 		emit(A64_ADR(A64_LR, AARCH64_INSN_SIZE * 2), ctx);</div><div class='hunk'>@@ -2354,7 +2518,7 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fexit-&gt;nr_links; i++)</div><div class='del'>-		invoke_bpf_prog(ctx, fexit-&gt;links[i], args_off, retval_off,</div><div class='add'>+		invoke_bpf_prog(ctx, fexit-&gt;links[i], bargs_off, retval_off,</div><div class='ctx'> 				run_ctx_off, false);</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='hunk'>@@ -2368,7 +2532,7 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_RESTORE_REGS)</div><div class='del'>-		restore_args(ctx, args_off, nregs);</div><div class='add'>+		restore_args(ctx, bargs_off, a-&gt;regs_for_args);</div><div class='ctx'> </div><div class='ctx'> 	/* restore callee saved register x19 and x20 */</div><div class='ctx'> 	emit(A64_LDR64I(A64_R(19), A64_SP, regs_off), ctx);</div><div class='hunk'>@@ -2405,21 +2569,6 @@ static int prepare_trampoline(struct jit_ctx *ctx, struct bpf_tramp_image *im,</div><div class='ctx'> 	return ctx-&gt;idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int btf_func_model_nregs(const struct btf_func_model *m)</div><div class='del'>-{</div><div class='del'>-	int nregs = m-&gt;nr_args;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* extra registers needed for struct argument */</div><div class='del'>-	for (i = 0; i &lt; MAX_BPF_FUNC_ARGS; i++) {</div><div class='del'>-		/* The arg_size is at most 16 bytes, enforced by the verifier. */</div><div class='del'>-		if (m-&gt;arg_flags[i] &amp; BTF_FMODEL_STRUCT_ARG)</div><div class='del'>-			nregs += (m-&gt;arg_size[i] + 7) / 8 - 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return nregs;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int arch_bpf_trampoline_size(const struct btf_func_model *m, u32 flags,</div><div class='ctx'> 			     struct bpf_tramp_links *tlinks, void *func_addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -2428,14 +2577,14 @@ int arch_bpf_trampoline_size(const struct btf_func_model *m, u32 flags,</div><div class='ctx'> 		.idx = 0,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct bpf_tramp_image im;</div><div class='del'>-	int nregs, ret;</div><div class='add'>+	struct arg_aux aaux;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	nregs = btf_func_model_nregs(m);</div><div class='del'>-	/* the first 8 registers are used for arguments */</div><div class='del'>-	if (nregs &gt; 8)</div><div class='del'>-		return -ENOTSUPP;</div><div class='add'>+	ret = calc_arg_aux(m, &amp;aaux);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = prepare_trampoline(&amp;ctx, &amp;im, tlinks, func_addr, nregs, flags);</div><div class='add'>+	ret = prepare_trampoline(&amp;ctx, &amp;im, tlinks, func_addr, m, &amp;aaux, flags);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2462,9 +2611,10 @@ int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,</div><div class='ctx'> 				u32 flags, struct bpf_tramp_links *tlinks,</div><div class='ctx'> 				void *func_addr)</div><div class='ctx'> {</div><div class='del'>-	int ret, nregs;</div><div class='del'>-	void *image, *tmp;</div><div class='ctx'> 	u32 size = ro_image_end - ro_image;</div><div class='add'>+	struct arg_aux aaux;</div><div class='add'>+	void *image, *tmp;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* image doesn't need to be in module memory range, so we can</div><div class='ctx'> 	 * use kvmalloc.</div><div class='hunk'>@@ -2480,13 +2630,12 @@ int arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *ro_image,</div><div class='ctx'> 		.write = true,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	nregs = btf_func_model_nregs(m);</div><div class='del'>-	/* the first 8 registers are used for arguments */</div><div class='del'>-	if (nregs &gt; 8)</div><div class='del'>-		return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	jit_fill_hole(image, (unsigned int)(ro_image_end - ro_image));</div><div class='del'>-	ret = prepare_trampoline(&amp;ctx, im, tlinks, func_addr, nregs, flags);</div><div class='add'>+	ret = calc_arg_aux(m, &amp;aaux);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = prepare_trampoline(&amp;ctx, im, tlinks, func_addr, m, &amp;aaux, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &gt; 0 &amp;&amp; validate_code(&amp;ctx) &lt; 0) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='head'>diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps<br/>index 772c1b008e43..10effd4cff6b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/tools/cpucaps?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/tools/cpucaps</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/tools/cpucaps?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/tools/cpucaps</a></div><div class='hunk'>@@ -28,6 +28,7 @@ HAS_EPAN</div><div class='ctx'> HAS_EVT</div><div class='ctx'> HAS_FPMR</div><div class='ctx'> HAS_FGT</div><div class='add'>+HAS_FGT2</div><div class='ctx'> HAS_FPSIMD</div><div class='ctx'> HAS_GCS</div><div class='ctx'> HAS_GENERIC_AUTH</div><div class='hunk'>@@ -94,6 +95,7 @@ WORKAROUND_2457168</div><div class='ctx'> WORKAROUND_2645198</div><div class='ctx'> WORKAROUND_2658417</div><div class='ctx'> WORKAROUND_AMPERE_AC03_CPU_38</div><div class='add'>+WORKAROUND_AMPERE_AC04_CPU_23</div><div class='ctx'> WORKAROUND_TRBE_OVERWRITE_FILL_MODE</div><div class='ctx'> WORKAROUND_TSB_FLUSH_FAILURE</div><div class='ctx'> WORKAROUND_TRBE_WRITE_OUT_OF_RANGE</div><div class='head'>diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg<br/>index f9476848a2ed..8a8cf6874298 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/tools/sysreg?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/tools/sysreg</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/tools/sysreg?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/tools/sysreg</a></div><div class='hunk'>@@ -101,6 +101,17 @@ Res0	63:32</div><div class='ctx'> Field	31:0	DTRTX</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	MDSELR_EL1	2	0	0	4	2</div><div class='add'>+Res0	63:6</div><div class='add'>+Field	5:4	BANK</div><div class='add'>+Res0	3:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	MDSTEPOP_EL1	2	0	0	5	2</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:0	OPCODE</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	OSECCR_EL1	2	0	0	6	2</div><div class='ctx'> Res0	63:32</div><div class='ctx'> Field	31:0	EDECCR</div><div class='hunk'>@@ -111,6 +122,285 @@ Res0	63:1</div><div class='ctx'> Field	0	OSLK</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	SPMACCESSR_EL1	2	0	9	13	3</div><div class='add'>+UnsignedEnum	63:62	P31</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	61:60	P30</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	59:58	P29</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	57:56	P28</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	55:54	P27</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	53:52	P26</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	51:50	P25</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	49:48	P24</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	47:46	P23</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	45:44	P22</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	43:42	P21</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	41:40	P20</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	39:38	P19</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	37:36	P18</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	35:34	P17</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	33:32	P16</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	31:30	P15</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	29:28	P14</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	27:26	P13</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	25:24	P12</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	23:22	P11</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	21:20	P10</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	19:18	P9</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	17:16	P8</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	15:14	P7</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	13:12	P6</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	11:10	P5</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	9:8	P4</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	7:6	P3</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	5:4	P2</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	3:2	P1</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	1:0	P0</div><div class='add'>+	0b00	TRAP_RW</div><div class='add'>+	0b01	TRAP_W</div><div class='add'>+	0b11	NOTRAP</div><div class='add'>+EndEnum</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMACCESSR_EL12	2	5	9	13	3</div><div class='add'>+Mapping	SPMACCESSR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMIIDR_EL1	2	0	9	13	4</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:20	ProductID</div><div class='add'>+Field	19:16	Variant</div><div class='add'>+Field	15:12	Revision</div><div class='add'>+Field	11:0	Implementer</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMDEVARCH_EL1	2	0	9	13	5</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:21	ARCHITECT</div><div class='add'>+Field	20	PRESENT</div><div class='add'>+Field	19:16	REVISION</div><div class='add'>+Field	15:12	ARCHVER</div><div class='add'>+Field	11:0	ARCHPART</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMDEVAFF_EL1	2	0	9	13	6</div><div class='add'>+Res0	63:40</div><div class='add'>+Field	39:32	Aff3</div><div class='add'>+Field	31	F0V</div><div class='add'>+Field	30	U</div><div class='add'>+Res0	29:25</div><div class='add'>+Field	24	MT</div><div class='add'>+Field	23:16	Aff2</div><div class='add'>+Field	15:8	Aff1</div><div class='add'>+Field	7:0	Aff0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCFGR_EL1	2	0	9	13	7</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31:28	NCG</div><div class='add'>+Res0	27:25</div><div class='add'>+Field	24	HDBG</div><div class='add'>+Field	23	TRO</div><div class='add'>+Field	22	SS</div><div class='add'>+Field	21	FZO</div><div class='add'>+Field	20	MSI</div><div class='add'>+Field	19	RAO</div><div class='add'>+Res0	18</div><div class='add'>+Field	17	NA</div><div class='add'>+Field	16	EX</div><div class='add'>+Field	15:14	RAZ</div><div class='add'>+Field	13:8	SIZE</div><div class='add'>+Field	7:0	N</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMINTENSET_EL1	2	0	9	14	1</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMINTENCLR_EL1	2	0	9	14	2</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMCCNTSVR_EL1	2	0	14	11	7</div><div class='add'>+Field	63:0	CCNT</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMICNTSVR_EL1	2	0	14	12	0</div><div class='add'>+Field	63:0	ICNT</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCR_EL0	2	3	9	12	0</div><div class='add'>+Res0	63:12</div><div class='add'>+Field	11	TRO</div><div class='add'>+Field	10	HDBG</div><div class='add'>+Field	9	FZO</div><div class='add'>+Field	8	NA</div><div class='add'>+Res0	7:5</div><div class='add'>+Field	4	EX</div><div class='add'>+Res0	3:2</div><div class='add'>+Field	1	P</div><div class='add'>+Field	0	E</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCNTENSET_EL0	2	3	9	12	1</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMCNTENCLR_EL0	2	3	9	12	2</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMOVSCLR_EL0	2	3	9	12	3</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMZR_EL0       2	3	9	12	4</div><div class='add'>+Field   63:0      P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMSELR_EL0	2	3	9	12	5</div><div class='add'>+Res0	63:10</div><div class='add'>+Field	9:4	SYSPMUSEL</div><div class='add'>+Res0	3:2</div><div class='add'>+Field	1:0	BANK</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMOVSSET_EL0	2	3	9	14	3</div><div class='add'>+Field	63:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SPMSCR_EL1	2	7	9	14	7</div><div class='add'>+Field	63:32	IMPDEF</div><div class='add'>+Field	31	RAO</div><div class='add'>+Res0	30:5</div><div class='add'>+Field	4	NAO</div><div class='add'>+Res0	3:1</div><div class='add'>+Field	0	SO</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg ID_PFR0_EL1	3	0	0	1	0</div><div class='ctx'> Res0	63:32</div><div class='ctx'> UnsignedEnum	31:28	RAS</div><div class='hunk'>@@ -907,6 +1197,7 @@ UnsignedEnum	31:28	RAS</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> 	0b0010	V1P1</div><div class='add'>+	0b0011	V2</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	27:24	GIC</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1466,6 +1757,7 @@ UnsignedEnum	63:60	LS64</div><div class='ctx'> 	0b0001	LS64</div><div class='ctx'> 	0b0010	LS64_V</div><div class='ctx'> 	0b0011	LS64_ACCDATA</div><div class='add'>+	0b0100	LS64WB</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	59:56	XS</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1945,12 +2237,21 @@ EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	ID_AA64MMFR4_EL1	3	0	0	7	4</div><div class='del'>-Res0	63:40</div><div class='add'>+Res0	63:48</div><div class='add'>+UnsignedEnum	47:44	SRMASK</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='add'>+Res0	43:40</div><div class='ctx'> UnsignedEnum	39:36	E3DSE</div><div class='ctx'> 	0b0000	NI</div><div class='ctx'> 	0b0001	IMP</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	35:28</div><div class='add'>+Res0	35:32</div><div class='add'>+UnsignedEnum	31:28	RMEGDI</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> SignedEnum	27:24	E2H0</div><div class='ctx'> 	0b0000	IMP</div><div class='ctx'> 	0b1110	NI_NV1</div><div class='hunk'>@@ -1959,6 +2260,7 @@ EndEnum</div><div class='ctx'> UnsignedEnum	23:20	NV_frac</div><div class='ctx'> 	0b0000	NV_NV2</div><div class='ctx'> 	0b0001	NV2_ONLY</div><div class='add'>+	0b0010	NV2P1</div><div class='ctx'> EndEnum</div><div class='ctx'> UnsignedEnum	19:16	FGWTE3</div><div class='ctx'> 	0b0000	NI</div><div class='hunk'>@@ -1978,7 +2280,10 @@ SignedEnum	7:4	EIESB</div><div class='ctx'> 	0b0010	ToELx</div><div class='ctx'> 	0b1111	ANY</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	3:0</div><div class='add'>+UnsignedEnum	3:0	PoPS</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	SCTLR_EL1	3	0	1	0	0</div><div class='hunk'>@@ -2053,8 +2358,30 @@ Field	1	A</div><div class='ctx'> Field	0	M</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	SCTLR_EL12      3	5	1	0	0</div><div class='add'>+Mapping	SCTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLRALIAS_EL1  3	0	1	4	6</div><div class='add'>+Mapping	SCTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLR_EL1	3	0	1	0	1</div><div class='add'>+Field   63:0    IMPDEF</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLR_EL12      3	5	1	0	1</div><div class='add'>+Mapping	ACTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLRALIAS_EL1  3	0	1	4	5</div><div class='add'>+Mapping	ACTLR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	CPACR_EL1	3	0	1	0	2</div><div class='del'>-Res0	63:30</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31	TCPAC</div><div class='add'>+Field	30	TAM</div><div class='ctx'> Field	29	E0POE</div><div class='ctx'> Field	28	TTA</div><div class='ctx'> Res0	27:26</div><div class='hunk'>@@ -2066,6 +2393,323 @@ Field	17:16	ZEN</div><div class='ctx'> Res0	15:0</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	CPACR_EL12      3	5	1	0	2</div><div class='add'>+Mapping	CPACR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	CPACRALIAS_EL1  3	0	1	4	4</div><div class='add'>+Mapping	CPACR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLRMASK_EL1	3	0	1	4	1</div><div class='add'>+Field	63:0	IMPDEF</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ACTLRMASK_EL12	3	5	1	4	1</div><div class='add'>+Mapping	ACTLRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	CPACRMASK_EL1	3	0	1	4	2</div><div class='add'>+Res0	63:32</div><div class='add'>+Field	31	TCPAC</div><div class='add'>+Field	30	TAM</div><div class='add'>+Field	29	E0POE</div><div class='add'>+Field	28	TTA</div><div class='add'>+Res0	27:25</div><div class='add'>+Field	24	SMEN</div><div class='add'>+Res0	23:21</div><div class='add'>+Field	20	FPEN</div><div class='add'>+Res0	19:17</div><div class='add'>+Field	16	ZEN</div><div class='add'>+Res0	15:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	CPACRMASK_EL12	3	5	1	4	2</div><div class='add'>+Mapping CPACRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PFAR_EL1	3	0	6	0	5</div><div class='add'>+Field	63	NS</div><div class='add'>+Field	62	NSE</div><div class='add'>+Res0	61:56</div><div class='add'>+Field	55:52	PA_55_52</div><div class='add'>+Field	51:48	PA_51_48</div><div class='add'>+Field	47:0	PA</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PFAR_EL12	3	5	6	0	5</div><div class='add'>+Mapping	PFAR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	RCWSMASK_EL1	3	0	13	0	3</div><div class='add'>+Field	63:0	RCWSMASK</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2_EL1      3	0	1	0	3</div><div class='add'>+Res0    63:13</div><div class='add'>+Field   12      CPTM0</div><div class='add'>+Field   11      CPTM</div><div class='add'>+Field   10      CPTA0</div><div class='add'>+Field   9       CPTA</div><div class='add'>+Field   8       EnPACM0</div><div class='add'>+Field   7       EnPACM</div><div class='add'>+Field   6       EnIDCP128</div><div class='add'>+Field   5       EASE</div><div class='add'>+Field   4       EnANERR</div><div class='add'>+Field   3       EnADERR</div><div class='add'>+Field   2       NMEA</div><div class='add'>+Res0    1:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2_EL12     3	5	1	0	3</div><div class='add'>+Mapping	SCTLR2_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2ALIAS_EL1 3	0	1	4	7</div><div class='add'>+Mapping	SCTLR2_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2MASK_EL1	3	0	1	4	3</div><div class='add'>+Res0	63:13</div><div class='add'>+Field	12	CPTM0</div><div class='add'>+Field	11	CPTM</div><div class='add'>+Field	10	CPTA0</div><div class='add'>+Field	9	CPTA</div><div class='add'>+Field	8	EnPACM0</div><div class='add'>+Field	7	EnPACM</div><div class='add'>+Field	6	EnIDCP128</div><div class='add'>+Field	5	EASE</div><div class='add'>+Field	4	EnANERR</div><div class='add'>+Field	3	EnADERR</div><div class='add'>+Field	2	NMEA</div><div class='add'>+Res0	1:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLR2MASK_EL12	3	5	1	4	3</div><div class='add'>+Mapping	SCTLR2MASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLRMASK_EL1	3	0	1	4	0</div><div class='add'>+Field	63	TIDCP</div><div class='add'>+Field	62	SPINTMASK</div><div class='add'>+Field	61	NMI</div><div class='add'>+Field	60	EnTP2</div><div class='add'>+Field	59	TCSO</div><div class='add'>+Field	58	TCSO0</div><div class='add'>+Field	57	EPAN</div><div class='add'>+Field	56	EnALS</div><div class='add'>+Field	55	EnAS0</div><div class='add'>+Field	54	EnASR</div><div class='add'>+Field	53	TME</div><div class='add'>+Field	52	TME0</div><div class='add'>+Field	51	TMT</div><div class='add'>+Field	50	TMT0</div><div class='add'>+Res0	49:47</div><div class='add'>+Field	46	TWEDEL</div><div class='add'>+Field	45	TWEDEn</div><div class='add'>+Field	44	DSSBS</div><div class='add'>+Field	43	ATA</div><div class='add'>+Field	42	ATA0</div><div class='add'>+Res0	41</div><div class='add'>+Field	40	TCF</div><div class='add'>+Res0	39</div><div class='add'>+Field	38	TCF0</div><div class='add'>+Field	37	ITFSB</div><div class='add'>+Field	36	BT1</div><div class='add'>+Field	35	BT0</div><div class='add'>+Field	34	EnFPM</div><div class='add'>+Field	33	MSCEn</div><div class='add'>+Field	32	CMOW</div><div class='add'>+Field	31	EnIA</div><div class='add'>+Field	30	EnIB</div><div class='add'>+Field	29	LSMAOE</div><div class='add'>+Field	28	nTLSMD</div><div class='add'>+Field	27	EnDA</div><div class='add'>+Field	26	UCI</div><div class='add'>+Field	25	EE</div><div class='add'>+Field	24	E0E</div><div class='add'>+Field	23	SPAN</div><div class='add'>+Field	22	EIS</div><div class='add'>+Field	21	IESB</div><div class='add'>+Field	20	TSCXT</div><div class='add'>+Field	19	WXN</div><div class='add'>+Field	18	nTWE</div><div class='add'>+Res0	17</div><div class='add'>+Field	16	nTWI</div><div class='add'>+Field	15	UCT</div><div class='add'>+Field	14	DZE</div><div class='add'>+Field	13	EnDB</div><div class='add'>+Field	12	I</div><div class='add'>+Field	11	EOS</div><div class='add'>+Field	10	EnRCTX</div><div class='add'>+Field	9	UMA</div><div class='add'>+Field	8	SED</div><div class='add'>+Field	7	ITD</div><div class='add'>+Field	6	nAA</div><div class='add'>+Field	5	CP15BEN</div><div class='add'>+Field	4	SA0</div><div class='add'>+Field	3	SA</div><div class='add'>+Field	2	C</div><div class='add'>+Field	1	A</div><div class='add'>+Field	0	M</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	SCTLRMASK_EL12	3	5	1	4	0</div><div class='add'>+Mapping	SCTLRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR2MASK_EL1	3	0	2	7	3</div><div class='add'>+Res0	63:22</div><div class='add'>+Field	21	FNGNA1</div><div class='add'>+Field	20	FNGNA0</div><div class='add'>+Res0	19</div><div class='add'>+Field	18	FNG1</div><div class='add'>+Field	17	FNG0</div><div class='add'>+Field	16	A2</div><div class='add'>+Field	15	DisCH1</div><div class='add'>+Field	14	DisCH0</div><div class='add'>+Res0	13:12</div><div class='add'>+Field	11	HAFT</div><div class='add'>+Field	10	PTTWI</div><div class='add'>+Res0	9:6</div><div class='add'>+Field	5	D128</div><div class='add'>+Field	4	AIE</div><div class='add'>+Field	3	POE</div><div class='add'>+Field	2	E0POE</div><div class='add'>+Field	1	PIE</div><div class='add'>+Field	0	PnCH</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR2MASK_EL12	3	5	2	7	3</div><div class='add'>+Mapping	TCR2MASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCRMASK_EL1	3	0	2	7	2</div><div class='add'>+Res0	63:62</div><div class='add'>+Field	61	MTX1</div><div class='add'>+Field	60	MTX0</div><div class='add'>+Field	59	DS</div><div class='add'>+Field	58	TCMA1</div><div class='add'>+Field	57	TCMA0</div><div class='add'>+Field	56	E0PD1</div><div class='add'>+Field	55	E0PD0</div><div class='add'>+Field	54	NFD1</div><div class='add'>+Field	53	NFD0</div><div class='add'>+Field	52	TBID1</div><div class='add'>+Field	51	TBID0</div><div class='add'>+Field	50	HWU162</div><div class='add'>+Field	49	HWU161</div><div class='add'>+Field	48	HWU160</div><div class='add'>+Field	47	HWU159</div><div class='add'>+Field	46	HWU062</div><div class='add'>+Field	45	HWU061</div><div class='add'>+Field	44	HWU060</div><div class='add'>+Field	43	HWU059</div><div class='add'>+Field	42	HPD1</div><div class='add'>+Field	41	HPD0</div><div class='add'>+Field	40	HD</div><div class='add'>+Field	39	HA</div><div class='add'>+Field	38	TBI1</div><div class='add'>+Field	37	TBI0</div><div class='add'>+Field	36	AS</div><div class='add'>+Res0	35:33</div><div class='add'>+Field	32	IPS</div><div class='add'>+Res0	31</div><div class='add'>+Field	30	TG1</div><div class='add'>+Res0	29</div><div class='add'>+Field	28	SH1</div><div class='add'>+Res0	27</div><div class='add'>+Field	26	ORGN1</div><div class='add'>+Res0	25</div><div class='add'>+Field	24	IRGN1</div><div class='add'>+Field	23	EPD1</div><div class='add'>+Field	22	A1</div><div class='add'>+Res0	21:17</div><div class='add'>+Field	16	T1SZ</div><div class='add'>+Res0	15</div><div class='add'>+Field	14	TG0</div><div class='add'>+Res0	13</div><div class='add'>+Field	12	SH0</div><div class='add'>+Res0	11</div><div class='add'>+Field	10	ORGN0</div><div class='add'>+Res0	9</div><div class='add'>+Field	8	IRGN0</div><div class='add'>+Field	7	EPD0</div><div class='add'>+Res0	6:1</div><div class='add'>+Field	0	T0SZ</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCRMASK_EL12	3	5	2	7	2</div><div class='add'>+Mapping TCRMASK_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	ERXGSR_EL1	3	0	5	3	2</div><div class='add'>+Field	63	S63</div><div class='add'>+Field	62	S62</div><div class='add'>+Field	61	S61</div><div class='add'>+Field	60	S60</div><div class='add'>+Field	59	S59</div><div class='add'>+Field	58	S58</div><div class='add'>+Field	57	S57</div><div class='add'>+Field	56	S56</div><div class='add'>+Field	55	S55</div><div class='add'>+Field	54	S54</div><div class='add'>+Field	53	S53</div><div class='add'>+Field	52	S52</div><div class='add'>+Field	51	S51</div><div class='add'>+Field	50	S50</div><div class='add'>+Field	49	S49</div><div class='add'>+Field	48	S48</div><div class='add'>+Field	47	S47</div><div class='add'>+Field	46	S46</div><div class='add'>+Field	45	S45</div><div class='add'>+Field	44	S44</div><div class='add'>+Field	43	S43</div><div class='add'>+Field	42	S42</div><div class='add'>+Field	41	S41</div><div class='add'>+Field	40	S40</div><div class='add'>+Field	39	S39</div><div class='add'>+Field	38	S38</div><div class='add'>+Field	37	S37</div><div class='add'>+Field	36	S36</div><div class='add'>+Field	35	S35</div><div class='add'>+Field	34	S34</div><div class='add'>+Field	33	S33</div><div class='add'>+Field	32	S32</div><div class='add'>+Field	31	S31</div><div class='add'>+Field	30	S30</div><div class='add'>+Field	29	S29</div><div class='add'>+Field	28	S28</div><div class='add'>+Field	27	S27</div><div class='add'>+Field	26	S26</div><div class='add'>+Field	25	S25</div><div class='add'>+Field	24	S24</div><div class='add'>+Field	23	S23</div><div class='add'>+Field	22	S22</div><div class='add'>+Field	21	S21</div><div class='add'>+Field	20	S20</div><div class='add'>+Field	19	S19</div><div class='add'>+Field	18	S18</div><div class='add'>+Field	17	S17</div><div class='add'>+Field	16	S16</div><div class='add'>+Field	15	S15</div><div class='add'>+Field	14	S14</div><div class='add'>+Field	13	S13</div><div class='add'>+Field	12	S12</div><div class='add'>+Field	11	S11</div><div class='add'>+Field	10	S10</div><div class='add'>+Field	9	S9</div><div class='add'>+Field	8	S8</div><div class='add'>+Field	7	S7</div><div class='add'>+Field	6	S6</div><div class='add'>+Field	5	S5</div><div class='add'>+Field	4	S4</div><div class='add'>+Field	3	S3</div><div class='add'>+Field	2	S2</div><div class='add'>+Field	1	S1</div><div class='add'>+Field	0	S0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	TRFCR_EL1	3	0	1	2	1</div><div class='ctx'> Res0	63:7</div><div class='ctx'> UnsignedEnum	6:5	TS</div><div class='hunk'>@@ -2078,6 +2722,16 @@ Field	1	ExTRE</div><div class='ctx'> Field	0	E0TRE</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	TRCITECR_EL1	3	0	1	2	3</div><div class='add'>+Res0	63:2</div><div class='add'>+Field	1	E1E</div><div class='add'>+Field	0	E0E</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TRCITECR_EL12	3	5	1	2	3</div><div class='add'>+Mapping	TRCITECR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	SMPRI_EL1	3	0	1	2	4</div><div class='ctx'> Res0	63:4</div><div class='ctx'> Field	3:0	PRIORITY</div><div class='hunk'>@@ -2226,7 +2880,28 @@ Field	15:0	MINLAT</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	PMSIDR_EL1	3	0	9	9	7</div><div class='del'>-Res0	63:25</div><div class='add'>+Res0	63:33</div><div class='add'>+UnsignedEnum	32	SME</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	31:28	ALTCLK</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	IMP</div><div class='add'>+	0b1111	IMPDEF</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	27	FPF</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	26	EFT</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='add'>+UnsignedEnum	25	CRR</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Field	24	PBT</div><div class='ctx'> Field	23:20	FORMAT</div><div class='ctx'> Enum	19:16	COUNTSIZE</div><div class='hunk'>@@ -2244,7 +2919,10 @@ Enum	11:8	INTERVAL</div><div class='ctx'> 	0b0111	3072</div><div class='ctx'> 	0b1000	4096</div><div class='ctx'> EndEnum</div><div class='del'>-Res0	7</div><div class='add'>+UnsignedEnum	7	FDS</div><div class='add'>+	0b0	NI</div><div class='add'>+	0b1	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Field	6	FnE</div><div class='ctx'> Field	5	ERND</div><div class='ctx'> Field	4	LDS</div><div class='hunk'>@@ -2287,6 +2965,16 @@ Field	16	COLL</div><div class='ctx'> Field	15:0	MSS</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	PMSDSFR_EL1	3	0	9	10	4</div><div class='add'>+Field	63:0	S</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMBMAR_EL1	3	0	9	10	5</div><div class='add'>+Res0	63:10</div><div class='add'>+Field	9:8	SH</div><div class='add'>+Field	7:0	Attr</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	PMBIDR_EL1	3	0	9	10	7</div><div class='ctx'> Res0	63:12</div><div class='ctx'> Enum	11:8	EA</div><div class='hunk'>@@ -2300,6 +2988,21 @@ Field	4	P</div><div class='ctx'> Field	3:0	ALIGN</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	TRBMPAM_EL1	3	0	9	11	5</div><div class='add'>+Res0	63:27</div><div class='add'>+Field	26	EN</div><div class='add'>+Field	25:24	MPAM_SP</div><div class='add'>+Field	23:16	PMG</div><div class='add'>+Field	15:0	PARTID</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMSSCR_EL1	3	0	9	13	3</div><div class='add'>+Res0	63:33</div><div class='add'>+Field	32	NC</div><div class='add'>+Res0	31:1</div><div class='add'>+Field	0	SS</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	PMUACR_EL1	3	0	9	14	4</div><div class='ctx'> Res0	63:33</div><div class='ctx'> Field	32	F0</div><div class='hunk'>@@ -2307,11 +3010,29 @@ Field	31	C</div><div class='ctx'> Field	30:0	P</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	PMECR_EL1	3	0	9	14	5</div><div class='add'>+Res0	63:5</div><div class='add'>+Field	4:3	SSE</div><div class='add'>+Field	2	KPME</div><div class='add'>+Field	1:0	PMEE</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	PMIAR_EL1	3	0	9	14	7</div><div class='add'>+Field	63:0	ADDRESS</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	PMSELR_EL0	3	3	9	12	5</div><div class='ctx'> Res0	63:5</div><div class='ctx'> Field	4:0	SEL</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	PMZR_EL0        3	3	9	13	4</div><div class='add'>+Res0	63:33</div><div class='add'>+Field	32	F0</div><div class='add'>+Field	31	C</div><div class='add'>+Field	30:0	P</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> SysregFields	CONTEXTIDR_ELx</div><div class='ctx'> Res0	63:32</div><div class='ctx'> Field	31:0	PROCID</div><div class='hunk'>@@ -2450,7 +3171,110 @@ UnsignedEnum	2:0	F8S1</div><div class='ctx'> EndEnum</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='del'>-SysregFields	HFGxTR_EL2</div><div class='add'>+Sysreg	HCR_EL2		3	4	1	1	0</div><div class='add'>+Field	63:60	TWEDEL</div><div class='add'>+Field	59	TWEDEn</div><div class='add'>+Field	58	TID5</div><div class='add'>+Field	57	DCT</div><div class='add'>+Field	56	ATA</div><div class='add'>+Field	55	TTLBOS</div><div class='add'>+Field	54	TTLBIS</div><div class='add'>+Field	53	EnSCXT</div><div class='add'>+Field	52	TOCU</div><div class='add'>+Field	51	AMVOFFEN</div><div class='add'>+Field	50	TICAB</div><div class='add'>+Field	49	TID4</div><div class='add'>+Field	48	GPF</div><div class='add'>+Field	47	FIEN</div><div class='add'>+Field	46	FWB</div><div class='add'>+Field	45	NV2</div><div class='add'>+Field	44	AT</div><div class='add'>+Field	43	NV1</div><div class='add'>+Field	42	NV</div><div class='add'>+Field	41	API</div><div class='add'>+Field	40	APK</div><div class='add'>+Field	39	TME</div><div class='add'>+Field	38	MIOCNCE</div><div class='add'>+Field	37	TEA</div><div class='add'>+Field	36	TERR</div><div class='add'>+Field	35	TLOR</div><div class='add'>+Field	34	E2H</div><div class='add'>+Field	33	ID</div><div class='add'>+Field	32	CD</div><div class='add'>+Field	31	RW</div><div class='add'>+Field	30	TRVM</div><div class='add'>+Field	29	HCD</div><div class='add'>+Field	28	TDZ</div><div class='add'>+Field	27	TGE</div><div class='add'>+Field	26	TVM</div><div class='add'>+Field	25	TTLB</div><div class='add'>+Field	24	TPU</div><div class='add'>+Field	23	TPCP</div><div class='add'>+Field	22	TSW</div><div class='add'>+Field	21	TACR</div><div class='add'>+Field	20	TIDCP</div><div class='add'>+Field	19	TSC</div><div class='add'>+Field	18	TID3</div><div class='add'>+Field	17	TID2</div><div class='add'>+Field	16	TID1</div><div class='add'>+Field	15	TID0</div><div class='add'>+Field	14	TWE</div><div class='add'>+Field	13	TWI</div><div class='add'>+Field	12	DC</div><div class='add'>+UnsignedEnum	11:10	BSU</div><div class='add'>+	0b00	NONE</div><div class='add'>+	0b01	IS</div><div class='add'>+	0b10	OS</div><div class='add'>+	0b11	FS</div><div class='add'>+EndEnum</div><div class='add'>+Field	9	FB</div><div class='add'>+Field	8	VSE</div><div class='add'>+Field	7	VI</div><div class='add'>+Field	6	VF</div><div class='add'>+Field	5	AMO</div><div class='add'>+Field	4	IMO</div><div class='add'>+Field	3	FMO</div><div class='add'>+Field	2	PTW</div><div class='add'>+Field	1	SWIO</div><div class='add'>+Field	0	VM</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg MDCR_EL2		3	4	1	1	1</div><div class='add'>+Res0	63:51</div><div class='add'>+Field	50	EnSTEPOP</div><div class='add'>+Res0	49:44</div><div class='add'>+Field	43	EBWE</div><div class='add'>+Res0	42</div><div class='add'>+Field	41:40	PMEE</div><div class='add'>+Res0	39:37</div><div class='add'>+Field	36	HPMFZS</div><div class='add'>+Res0	35:32</div><div class='add'>+Field	31:30	PMSSE</div><div class='add'>+Field	29	HPMFZO</div><div class='add'>+Field	28	MTPME</div><div class='add'>+Field	27	TDCC</div><div class='add'>+Field	26	HLP</div><div class='add'>+Field	25:24	E2TB</div><div class='add'>+Field	23	HCCD</div><div class='add'>+Res0	22:20</div><div class='add'>+Field	19	TTRF</div><div class='add'>+Res0	18</div><div class='add'>+Field	17	HPMD</div><div class='add'>+Res0	16</div><div class='add'>+Field	15	EnSPM</div><div class='add'>+Field	14	TPMS</div><div class='add'>+Field	13:12	E2PB</div><div class='add'>+Field	11	TDRA</div><div class='add'>+Field	10	TDOSA</div><div class='add'>+Field	9	TDA</div><div class='add'>+Field	8	TDE</div><div class='add'>+Field	7	HPME</div><div class='add'>+Field	6	TPM</div><div class='add'>+Field	5	TPMCR</div><div class='add'>+Field	4:0	HPMN</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg HFGRTR_EL2	3	4	1	1	4</div><div class='ctx'> Field	63	nAMAIR2_EL1</div><div class='ctx'> Field	62	nMAIR2_EL1</div><div class='ctx'> Field	61	nS2POR_EL1</div><div class='hunk'>@@ -2515,53 +3339,74 @@ Field	3	AMAIR_EL1</div><div class='ctx'> Field	2	AIDR_EL1</div><div class='ctx'> Field	1	AFSR1_EL1</div><div class='ctx'> Field	0	AFSR0_EL1</div><div class='del'>-EndSysregFields</div><div class='del'>-</div><div class='del'>-Sysreg MDCR_EL2		3	4	1	1	1</div><div class='del'>-Res0	63:51</div><div class='del'>-Field	50	EnSTEPOP</div><div class='del'>-Res0	49:44</div><div class='del'>-Field	43	EBWE</div><div class='del'>-Res0	42</div><div class='del'>-Field	41:40	PMEE</div><div class='del'>-Res0	39:37</div><div class='del'>-Field	36	HPMFZS</div><div class='del'>-Res0	35:32</div><div class='del'>-Field	31:30	PMSSE</div><div class='del'>-Field	29	HPMFZO</div><div class='del'>-Field	28	MTPME</div><div class='del'>-Field	27	TDCC</div><div class='del'>-Field	26	HLP</div><div class='del'>-Field	25:24	E2TB</div><div class='del'>-Field	23	HCCD</div><div class='del'>-Res0	22:20</div><div class='del'>-Field	19	TTRF</div><div class='del'>-Res0	18</div><div class='del'>-Field	17	HPMD</div><div class='del'>-Res0	16</div><div class='del'>-Field	15	EnSPM</div><div class='del'>-Field	14	TPMS</div><div class='del'>-Field	13:12	E2PB</div><div class='del'>-Field	11	TDRA</div><div class='del'>-Field	10	TDOSA</div><div class='del'>-Field	9	TDA</div><div class='del'>-Field	8	TDE</div><div class='del'>-Field	7	HPME</div><div class='del'>-Field	6	TPM</div><div class='del'>-Field	5	TPMCR</div><div class='del'>-Field	4:0	HPMN</div><div class='del'>-EndSysreg</div><div class='del'>-</div><div class='del'>-Sysreg HFGRTR_EL2	3	4	1	1	4</div><div class='del'>-Fields	HFGxTR_EL2</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg HFGWTR_EL2	3	4	1	1	5</div><div class='del'>-Fields	HFGxTR_EL2</div><div class='add'>+Field	63	nAMAIR2_EL1</div><div class='add'>+Field	62	nMAIR2_EL1</div><div class='add'>+Field	61	nS2POR_EL1</div><div class='add'>+Field	60	nPOR_EL1</div><div class='add'>+Field	59	nPOR_EL0</div><div class='add'>+Field	58	nPIR_EL1</div><div class='add'>+Field	57	nPIRE0_EL1</div><div class='add'>+Field	56	nRCWMASK_EL1</div><div class='add'>+Field	55	nTPIDR2_EL0</div><div class='add'>+Field	54	nSMPRI_EL1</div><div class='add'>+Field	53	nGCS_EL1</div><div class='add'>+Field	52	nGCS_EL0</div><div class='add'>+Res0	51</div><div class='add'>+Field	50	nACCDATA_EL1</div><div class='add'>+Field	49	ERXADDR_EL1</div><div class='add'>+Field	48	ERXPFGCDN_EL1</div><div class='add'>+Field	47	ERXPFGCTL_EL1</div><div class='add'>+Res0	46</div><div class='add'>+Field	45	ERXMISCn_EL1</div><div class='add'>+Field	44	ERXSTATUS_EL1</div><div class='add'>+Field	43	ERXCTLR_EL1</div><div class='add'>+Res0	42</div><div class='add'>+Field	41	ERRSELR_EL1</div><div class='add'>+Res0	40</div><div class='add'>+Field	39	ICC_IGRPENn_EL1</div><div class='add'>+Field	38	VBAR_EL1</div><div class='add'>+Field	37	TTBR1_EL1</div><div class='add'>+Field	36	TTBR0_EL1</div><div class='add'>+Field	35	TPIDR_EL0</div><div class='add'>+Field	34	TPIDRRO_EL0</div><div class='add'>+Field	33	TPIDR_EL1</div><div class='add'>+Field	32	TCR_EL1</div><div class='add'>+Field	31	SCXTNUM_EL0</div><div class='add'>+Field	30	SCXTNUM_EL1</div><div class='add'>+Field	29	SCTLR_EL1</div><div class='add'>+Res0	28</div><div class='add'>+Field	27	PAR_EL1</div><div class='add'>+Res0	26:25</div><div class='add'>+Field	24	MAIR_EL1</div><div class='add'>+Field	23	LORSA_EL1</div><div class='add'>+Field	22	LORN_EL1</div><div class='add'>+Res0	21</div><div class='add'>+Field	20	LOREA_EL1</div><div class='add'>+Field	19	LORC_EL1</div><div class='add'>+Res0	18</div><div class='add'>+Field	17	FAR_EL1</div><div class='add'>+Field	16	ESR_EL1</div><div class='add'>+Res0	15:14</div><div class='add'>+Field	13	CSSELR_EL1</div><div class='add'>+Field	12	CPACR_EL1</div><div class='add'>+Field	11	CONTEXTIDR_EL1</div><div class='add'>+Res0	10:9</div><div class='add'>+Field	8	APIBKey</div><div class='add'>+Field	7	APIAKey</div><div class='add'>+Field	6	APGAKey</div><div class='add'>+Field	5	APDBKey</div><div class='add'>+Field	4	APDAKey</div><div class='add'>+Field	3	AMAIR_EL1</div><div class='add'>+Res0	2</div><div class='add'>+Field	1	AFSR1_EL1</div><div class='add'>+Field	0	AFSR0_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg HFGITR_EL2	3	4	1	1	6</div><div class='del'>-Res0	63</div><div class='add'>+Field   63	PSBCSYNC</div><div class='ctx'> Field	62	ATS1E1A</div><div class='ctx'> Res0	61</div><div class='ctx'> Field	60	COSPRCTX</div><div class='hunk'>@@ -2971,6 +3816,12 @@ Sysreg	SMCR_EL2	3	4	1	2	6</div><div class='ctx'> Fields	SMCR_ELx</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	VNCR_EL2	3	4	2	2	0</div><div class='add'>+Field	63:57	RESS</div><div class='add'>+Field	56:12	BADDR</div><div class='add'>+Res0	11:0</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	GCSCR_EL2	3	4	2	5	0</div><div class='ctx'> Fields	GCSCR_ELx</div><div class='ctx'> EndSysreg</div><div class='hunk'>@@ -3244,6 +4095,60 @@ Sysreg	TTBR1_EL1	3	0	2	0	1</div><div class='ctx'> Fields	TTBRx_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	TCR_EL1		3	0	2	0	2</div><div class='add'>+Res0    63:62</div><div class='add'>+Field   61      MTX1</div><div class='add'>+Field   60      MTX0</div><div class='add'>+Field   59      DS</div><div class='add'>+Field   58      TCMA1</div><div class='add'>+Field   57      TCMA0</div><div class='add'>+Field   56      E0PD1</div><div class='add'>+Field   55      E0PD0</div><div class='add'>+Field   54      NFD1</div><div class='add'>+Field   53      NFD0</div><div class='add'>+Field   52      TBID1</div><div class='add'>+Field   51      TBID0</div><div class='add'>+Field   50      HWU162</div><div class='add'>+Field   49      HWU161</div><div class='add'>+Field   48      HWU160</div><div class='add'>+Field   47      HWU159</div><div class='add'>+Field   46      HWU062</div><div class='add'>+Field   45      HWU061</div><div class='add'>+Field   44      HWU060</div><div class='add'>+Field   43      HWU059</div><div class='add'>+Field   42      HPD1</div><div class='add'>+Field   41      HPD0</div><div class='add'>+Field   40      HD</div><div class='add'>+Field   39      HA</div><div class='add'>+Field   38      TBI1</div><div class='add'>+Field   37      TBI0</div><div class='add'>+Field   36      AS</div><div class='add'>+Res0    35</div><div class='add'>+Field   34:32   IPS</div><div class='add'>+Field   31:30   TG1</div><div class='add'>+Field   29:28   SH1</div><div class='add'>+Field   27:26   ORGN1</div><div class='add'>+Field   25:24   IRGN1</div><div class='add'>+Field   23      EPD1</div><div class='add'>+Field   22      A1</div><div class='add'>+Field   21:16   T1SZ</div><div class='add'>+Field   15:14   TG0</div><div class='add'>+Field   13:12   SH0</div><div class='add'>+Field   11:10   ORGN0</div><div class='add'>+Field   9:8     IRGN0</div><div class='add'>+Field   7       EPD0</div><div class='add'>+Res0    6</div><div class='add'>+Field   5:0     T0SZ</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCR_EL12        3	5	2	0	2</div><div class='add'>+Mapping	TCR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	TCRALIAS_EL1    3	0	2	7	6</div><div class='add'>+Mapping	TCR_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	TCR2_EL1	3	0	2	0	3</div><div class='ctx'> Res0	63:16</div><div class='ctx'> Field	15	DisCH1</div><div class='hunk'>@@ -3264,6 +4169,10 @@ Sysreg	TCR2_EL12	3	5	2	0	3</div><div class='ctx'> Mapping	TCR2_EL1</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='add'>+Sysreg	TCR2ALIAS_EL1   3	0	2	7	7</div><div class='add'>+Mapping	TCR2_EL1</div><div class='add'>+EndSysreg</div><div class='add'>+</div><div class='ctx'> Sysreg	TCR2_EL2	3	4	2	0	3</div><div class='ctx'> Res0	63:16</div><div class='ctx'> Field	15	DisCH1</div><div class='hunk'>@@ -3525,7 +4434,12 @@ Field	31:0	TRG</div><div class='ctx'> EndSysreg</div><div class='ctx'> </div><div class='ctx'> Sysreg	TRBIDR_EL1	3	0	9	11	7</div><div class='del'>-Res0	63:12</div><div class='add'>+Res0	63:16</div><div class='add'>+UnsignedEnum	15:12	MPAM</div><div class='add'>+	0b0000	NI</div><div class='add'>+	0b0001	DEFAULT</div><div class='add'>+	0b0010	IMP</div><div class='add'>+EndEnum</div><div class='ctx'> Enum	11:8	EA</div><div class='ctx'> 	0b0000	NON_DESC</div><div class='ctx'> 	0b0001	IGNORE</div><div class='hunk'>@@ -3536,3 +4450,10 @@ Field	5	F</div><div class='ctx'> Field	4	P</div><div class='ctx'> Field	3:0	Align</div><div class='ctx'> EndSysreg</div><div class='add'>+</div><div class='add'>+Sysreg	HPFAR_EL2	3	4	6	0	4</div><div class='add'>+Field	63	NS</div><div class='add'>+Res0	62:48</div><div class='add'>+Field	47:4	FIPA</div><div class='add'>+Res0	3:0</div><div class='add'>+EndSysreg</div><div class='head'>diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S<br/>index 9d01361696a1..ae551b857137 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/arm64/xen/hypercall.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/arm64/xen/hypercall.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/arm64/xen/hypercall.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/arm64/xen/hypercall.S</a></div><div class='hunk'>@@ -83,7 +83,26 @@ HYPERCALL3(vcpu_op);</div><div class='ctx'> HYPERCALL1(platform_op_raw);</div><div class='ctx'> HYPERCALL2(multicall);</div><div class='ctx'> HYPERCALL2(vm_assist);</div><div class='del'>-HYPERCALL3(dm_op);</div><div class='add'>+</div><div class='add'>+SYM_FUNC_START(HYPERVISOR_dm_op)</div><div class='add'>+	mov x16, #__HYPERVISOR_dm_op;	\</div><div class='add'>+	/*</div><div class='add'>+	 * dm_op hypercalls are issued by the userspace. The kernel needs to</div><div class='add'>+	 * enable access to TTBR0_EL1 as the hypervisor would issue stage 1</div><div class='add'>+	 * translations to user memory via AT instructions. Since AT</div><div class='add'>+	 * instructions are not affected by the PAN bit (ARMv8.1), we only</div><div class='add'>+	 * need the explicit uaccess_enable/disable if the TTBR0 PAN emulation</div><div class='add'>+	 * is enabled (it implies that hardware UAO and PAN disabled).</div><div class='add'>+	 */</div><div class='add'>+	uaccess_ttbr0_enable x6, x7, x8</div><div class='add'>+	hvc XEN_IMM</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable userspace access from kernel once the hyp call completed.</div><div class='add'>+	 */</div><div class='add'>+	uaccess_ttbr0_disable x6, x7</div><div class='add'>+	ret</div><div class='add'>+SYM_FUNC_END(HYPERVISOR_dm_op);</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_START(privcmd_call)</div><div class='ctx'> 	mov x16, x0</div><div class='head'>diff --git a/arch/csky/kernel/perf_event.c b/arch/csky/kernel/perf_event.c<br/>index e5f18420ce64..e0a36acd265b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/csky/kernel/perf_event.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/csky/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/csky/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/csky/kernel/perf_event.c</a></div><div class='hunk'>@@ -1139,8 +1139,7 @@ static irqreturn_t csky_pmu_handle_irq(int irq_num, void *dev)</div><div class='ctx'> 		perf_sample_data_init(&amp;data, 0, hwc-&gt;last_period);</div><div class='ctx'> 		csky_pmu_event_set_period(event);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			csky_pmu_stop_event(event);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	csky_pmu_enable(&amp;csky_pmu.pmu);</div><div class='head'>diff --git a/arch/hexagon/configs/comet_defconfig b/arch/hexagon/configs/comet_defconfig<br/>index 469c025297c6..c6108f000288 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/hexagon/configs/comet_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/hexagon/configs/comet_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/hexagon/configs/comet_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/hexagon/configs/comet_defconfig</a></div><div class='hunk'>@@ -72,9 +72,6 @@ CONFIG_INET=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_FRAME_WARN=0</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig<br/>index 067c0b994648..1a2cf012b8f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/Kconfig</a></div><div class='hunk'>@@ -73,6 +73,7 @@ config LOONGARCH</div><div class='ctx'> 	select ARCH_SUPPORTS_RT</div><div class='ctx'> 	select ARCH_USE_BUILTIN_BSWAP</div><div class='ctx'> 	select ARCH_USE_CMPXCHG_LOCKREF</div><div class='add'>+	select ARCH_USE_MEMTEST</div><div class='ctx'> 	select ARCH_USE_QUEUED_RWLOCKS</div><div class='ctx'> 	select ARCH_USE_QUEUED_SPINLOCKS</div><div class='ctx'> 	select ARCH_WANT_DEFAULT_BPF_JIT</div><div class='head'>diff --git a/arch/loongarch/configs/loongson3_defconfig b/arch/loongarch/configs/loongson3_defconfig<br/>index 90f21dfe22b1..0d59af6007b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/configs/loongson3_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/configs/loongson3_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/configs/loongson3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/configs/loongson3_defconfig</a></div><div class='hunk'>@@ -1026,7 +1026,7 @@ CONFIG_SECURITY_APPARMOR=y</div><div class='ctx'> CONFIG_SECURITY_YAMA=y</div><div class='ctx'> CONFIG_DEFAULT_SECURITY_DAC=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='del'>-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set</div><div class='add'>+CONFIG_CRYPTO_SELFTESTS=y</div><div class='ctx'> CONFIG_CRYPTO_PCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='head'>diff --git a/arch/loongarch/include/asm/asm-prototypes.h b/arch/loongarch/include/asm/asm-prototypes.h<br/>index 51f224bcfc65..704066b4f736 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/asm-prototypes.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/asm-prototypes.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/asm-prototypes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/include/asm/asm-prototypes.h</a></div><div class='hunk'>@@ -12,3 +12,11 @@ __int128_t __ashlti3(__int128_t a, int b);</div><div class='ctx'> __int128_t __ashrti3(__int128_t a, int b);</div><div class='ctx'> __int128_t __lshrti3(__int128_t a, int b);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_fork(struct task_struct *prev,</div><div class='add'>+							   struct pt_regs *regs);</div><div class='add'>+</div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_kernel_thread(struct task_struct *prev,</div><div class='add'>+								    struct pt_regs *regs,</div><div class='add'>+								    int (*fn)(void *),</div><div class='add'>+								    void *fn_arg);</div><div class='head'>diff --git a/arch/loongarch/include/asm/fpu.h b/arch/loongarch/include/asm/fpu.h<br/>index 3177674228f8..45514f314664 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/fpu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/fpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/fpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/include/asm/fpu.h</a></div><div class='hunk'>@@ -22,22 +22,29 @@</div><div class='ctx'> struct sigcontext;</div><div class='ctx'> </div><div class='ctx'> #define kernel_fpu_available() cpu_has_fpu</div><div class='del'>-extern void kernel_fpu_begin(void);</div><div class='del'>-extern void kernel_fpu_end(void);</div><div class='del'>-</div><div class='del'>-extern void _init_fpu(unsigned int);</div><div class='del'>-extern void _save_fp(struct loongarch_fpu *);</div><div class='del'>-extern void _restore_fp(struct loongarch_fpu *);</div><div class='del'>-</div><div class='del'>-extern void _save_lsx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _restore_lsx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _init_lsx_upper(void);</div><div class='del'>-extern void _restore_lsx_upper(struct loongarch_fpu *fpu);</div><div class='del'>-</div><div class='del'>-extern void _save_lasx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _restore_lasx(struct loongarch_fpu *fpu);</div><div class='del'>-extern void _init_lasx_upper(void);</div><div class='del'>-extern void _restore_lasx_upper(struct loongarch_fpu *fpu);</div><div class='add'>+</div><div class='add'>+void kernel_fpu_begin(void);</div><div class='add'>+void kernel_fpu_end(void);</div><div class='add'>+</div><div class='add'>+asmlinkage void _init_fpu(unsigned int);</div><div class='add'>+asmlinkage void _save_fp(struct loongarch_fpu *);</div><div class='add'>+asmlinkage void _restore_fp(struct loongarch_fpu *);</div><div class='add'>+asmlinkage int _save_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='add'>+asmlinkage int _restore_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='add'>+</div><div class='add'>+asmlinkage void _save_lsx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _restore_lsx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _init_lsx_upper(void);</div><div class='add'>+asmlinkage void _restore_lsx_upper(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage int _save_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='add'>+asmlinkage int _restore_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='add'>+</div><div class='add'>+asmlinkage void _save_lasx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _restore_lasx(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage void _init_lasx_upper(void);</div><div class='add'>+asmlinkage void _restore_lasx_upper(struct loongarch_fpu *fpu);</div><div class='add'>+asmlinkage int _save_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='add'>+asmlinkage int _restore_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='ctx'> </div><div class='ctx'> static inline void enable_lsx(void);</div><div class='ctx'> static inline void disable_lsx(void);</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_host.h b/arch/loongarch/include/asm/kvm_host.h<br/>index f457c2662e2f..a3c4cc46c892 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/kvm_host.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -301,7 +301,7 @@ int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu);</div><div class='ctx'> /* MMU handling */</div><div class='ctx'> void kvm_flush_tlb_all(void);</div><div class='ctx'> void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa);</div><div class='del'>-int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write);</div><div class='add'>+int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write, int ecode);</div><div class='ctx'> </div><div class='ctx'> int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable);</div><div class='ctx'> int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);</div><div class='head'>diff --git a/arch/loongarch/include/asm/kvm_vcpu.h b/arch/loongarch/include/asm/kvm_vcpu.h<br/>index 2c349f961bfb..f1efd7cfbc20 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/kvm_vcpu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/kvm_vcpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/kvm_vcpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/include/asm/kvm_vcpu.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define KVM_LOONGSON_IRQ_NUM_MASK	0xffff</div><div class='ctx'> </div><div class='ctx'> typedef union loongarch_instruction  larch_inst;</div><div class='del'>-typedef int (*exit_handle_fn)(struct kvm_vcpu *);</div><div class='add'>+typedef int (*exit_handle_fn)(struct kvm_vcpu *, int);</div><div class='ctx'> </div><div class='ctx'> int  kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst);</div><div class='ctx'> int  kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst);</div><div class='head'>diff --git a/arch/loongarch/include/asm/lbt.h b/arch/loongarch/include/asm/lbt.h<br/>index e671978bf552..38566574e562 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/lbt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/lbt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/lbt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/include/asm/lbt.h</a></div><div class='hunk'>@@ -12,9 +12,13 @@</div><div class='ctx'> #include &lt;asm/loongarch.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='del'>-extern void _init_lbt(void);</div><div class='del'>-extern void _save_lbt(struct loongarch_lbt *);</div><div class='del'>-extern void _restore_lbt(struct loongarch_lbt *);</div><div class='add'>+asmlinkage void _init_lbt(void);</div><div class='add'>+asmlinkage void _save_lbt(struct loongarch_lbt *);</div><div class='add'>+asmlinkage void _restore_lbt(struct loongarch_lbt *);</div><div class='add'>+asmlinkage int _save_lbt_context(void __user *regs, void __user *eflags);</div><div class='add'>+asmlinkage int _restore_lbt_context(void __user *regs, void __user *eflags);</div><div class='add'>+asmlinkage int _save_ftop_context(void __user *ftop);</div><div class='add'>+asmlinkage int _restore_ftop_context(void __user *ftop);</div><div class='ctx'> </div><div class='ctx'> static inline int is_lbt_enabled(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/include/asm/ptrace.h b/arch/loongarch/include/asm/ptrace.h<br/>index f3ddaed9ef7f..e5d21e836d99 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/ptrace.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/ptrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/include/asm/ptrace.h</a></div><div class='hunk'>@@ -33,9 +33,9 @@ struct pt_regs {</div><div class='ctx'> 	unsigned long __last[];</div><div class='ctx'> } __aligned(8);</div><div class='ctx'> </div><div class='del'>-static inline int regs_irqs_disabled(struct pt_regs *regs)</div><div class='add'>+static __always_inline bool regs_irqs_disabled(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	return arch_irqs_disabled_flags(regs-&gt;csr_prmd);</div><div class='add'>+	return !(regs-&gt;csr_prmd &amp; CSR_PRMD_PIE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)</div><div class='hunk'>@@ -55,7 +55,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs, unsigned long v</div><div class='ctx'> </div><div class='ctx'> /* Query offset/name of register from its name/offset */</div><div class='ctx'> extern int regs_query_register_offset(const char *name);</div><div class='del'>-#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))</div><div class='add'>+#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last) - sizeof(unsigned long))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * regs_get_register() - get register value from its offset</div><div class='head'>diff --git a/arch/loongarch/include/asm/uprobes.h b/arch/loongarch/include/asm/uprobes.h<br/>index 99a0d198927f..025fc3f0a102 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/uprobes.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/include/asm/uprobes.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/include/asm/uprobes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/include/asm/uprobes.h</a></div><div class='hunk'>@@ -15,7 +15,6 @@ typedef u32 uprobe_opcode_t;</div><div class='ctx'> #define UPROBE_XOLBP_INSN	__emit_break(BRK_UPROBE_XOLBP)</div><div class='ctx'> </div><div class='ctx'> struct arch_uprobe {</div><div class='del'>-	unsigned long	resume_era;</div><div class='ctx'> 	u32	insn[2];</div><div class='ctx'> 	u32	ixol[2];</div><div class='ctx'> 	bool	simulate;</div><div class='head'>diff --git a/arch/loongarch/kernel/Makefile b/arch/loongarch/kernel/Makefile<br/>index 4853e8b04c6f..f9dcaa60033d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/Makefile</a></div><div class='hunk'>@@ -21,10 +21,10 @@ obj-$(CONFIG_CPU_HAS_LBT)	+= lbt.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ARCH_STRICT_ALIGN)	+= unaligned.o</div><div class='ctx'> </div><div class='del'>-CFLAGS_module.o		+= $(call cc-option,-Wno-override-init,)</div><div class='del'>-CFLAGS_syscall.o	+= $(call cc-option,-Wno-override-init,)</div><div class='del'>-CFLAGS_traps.o		+= $(call cc-option,-Wno-override-init,)</div><div class='del'>-CFLAGS_perf_event.o	+= $(call cc-option,-Wno-override-init,)</div><div class='add'>+CFLAGS_module.o		+= $(call cc-disable-warning, override-init)</div><div class='add'>+CFLAGS_syscall.o	+= $(call cc-disable-warning, override-init)</div><div class='add'>+CFLAGS_traps.o		+= $(call cc-disable-warning, override-init)</div><div class='add'>+CFLAGS_perf_event.o	+= $(call cc-disable-warning, override-init)</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'>   ifndef CONFIG_DYNAMIC_FTRACE</div><div class='head'>diff --git a/arch/loongarch/kernel/entry.S b/arch/loongarch/kernel/entry.S<br/>index 48e7e34e355e..2abc29e57381 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/entry.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/entry.S</a></div><div class='hunk'>@@ -77,24 +77,22 @@ SYM_CODE_START(handle_syscall)</div><div class='ctx'> SYM_CODE_END(handle_syscall)</div><div class='ctx'> _ASM_NOKPROBE(handle_syscall)</div><div class='ctx'> </div><div class='del'>-SYM_CODE_START(ret_from_fork)</div><div class='add'>+SYM_CODE_START(ret_from_fork_asm)</div><div class='ctx'> 	UNWIND_HINT_REGS</div><div class='del'>-	bl		schedule_tail		# a0 = struct task_struct *prev</div><div class='del'>-	move		a0, sp</div><div class='del'>-	bl 		syscall_exit_to_user_mode</div><div class='add'>+	move		a1, sp</div><div class='add'>+	bl 		ret_from_fork</div><div class='ctx'> 	RESTORE_STATIC</div><div class='ctx'> 	RESTORE_SOME</div><div class='ctx'> 	RESTORE_SP_AND_RET</div><div class='del'>-SYM_CODE_END(ret_from_fork)</div><div class='add'>+SYM_CODE_END(ret_from_fork_asm)</div><div class='ctx'> </div><div class='del'>-SYM_CODE_START(ret_from_kernel_thread)</div><div class='add'>+SYM_CODE_START(ret_from_kernel_thread_asm)</div><div class='ctx'> 	UNWIND_HINT_REGS</div><div class='del'>-	bl		schedule_tail		# a0 = struct task_struct *prev</div><div class='del'>-	move		a0, s1</div><div class='del'>-	jirl		ra, s0, 0</div><div class='del'>-	move		a0, sp</div><div class='del'>-	bl		syscall_exit_to_user_mode</div><div class='add'>+	move		a1, sp</div><div class='add'>+	move		a2, s0</div><div class='add'>+	move		a3, s1</div><div class='add'>+	bl		ret_from_kernel_thread</div><div class='ctx'> 	RESTORE_STATIC</div><div class='ctx'> 	RESTORE_SOME</div><div class='ctx'> 	RESTORE_SP_AND_RET</div><div class='del'>-SYM_CODE_END(ret_from_kernel_thread)</div><div class='add'>+SYM_CODE_END(ret_from_kernel_thread_asm)</div><div class='head'>diff --git a/arch/loongarch/kernel/fpu.S b/arch/loongarch/kernel/fpu.S<br/>index 6ab640101457..28caf416ae36 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/fpu.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/fpu.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/fpu.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/fpu.S</a></div><div class='hunk'>@@ -458,6 +458,7 @@ SYM_FUNC_START(_save_fp_context)</div><div class='ctx'> 	li.w		a0, 0				# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_save_fp_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_fp_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -471,6 +472,7 @@ SYM_FUNC_START(_restore_fp_context)</div><div class='ctx'> 	li.w		a0, 0				# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_restore_fp_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_fp_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -484,6 +486,7 @@ SYM_FUNC_START(_save_lsx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_save_lsx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_lsx_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -497,6 +500,7 @@ SYM_FUNC_START(_restore_lsx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_restore_lsx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_lsx_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -510,6 +514,7 @@ SYM_FUNC_START(_save_lasx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_save_lasx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_lasx_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: fpregs</div><div class='hunk'>@@ -523,6 +528,7 @@ SYM_FUNC_START(_restore_lasx_context)</div><div class='ctx'> 	li.w	a0, 0					# success</div><div class='ctx'> 	jr	ra</div><div class='ctx'> SYM_FUNC_END(_restore_lasx_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_lasx_context)</div><div class='ctx'> </div><div class='ctx'> .L_fpu_fault:</div><div class='ctx'> 	li.w	a0, -EFAULT				# failure</div><div class='head'>diff --git a/arch/loongarch/kernel/genex.S b/arch/loongarch/kernel/genex.S<br/>index 4f0912141781..733a7665e434 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/genex.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/genex.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/genex.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/genex.S</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/stackframe.h&gt;</div><div class='ctx'> #include &lt;asm/thread_info.h&gt;</div><div class='ctx'> </div><div class='add'>+	.section .cpuidle.text, "ax"</div><div class='ctx'> 	.align	5</div><div class='ctx'> SYM_FUNC_START(__arch_cpu_idle)</div><div class='ctx'> 	/* start of idle interrupt region */</div><div class='hunk'>@@ -31,14 +32,16 @@ SYM_FUNC_START(__arch_cpu_idle)</div><div class='ctx'> 	 */</div><div class='ctx'> 	idle	0</div><div class='ctx'> 	/* end of idle interrupt region */</div><div class='del'>-1:	jr	ra</div><div class='add'>+idle_exit:</div><div class='add'>+	jr	ra</div><div class='ctx'> SYM_FUNC_END(__arch_cpu_idle)</div><div class='add'>+	.previous</div><div class='ctx'> </div><div class='ctx'> SYM_CODE_START(handle_vint)</div><div class='ctx'> 	UNWIND_HINT_UNDEFINED</div><div class='ctx'> 	BACKUP_T0T1</div><div class='ctx'> 	SAVE_ALL</div><div class='del'>-	la_abs	t1, 1b</div><div class='add'>+	la_abs	t1, idle_exit</div><div class='ctx'> 	LONG_L	t0, sp, PT_ERA</div><div class='ctx'> 	/* 3 instructions idle interrupt region */</div><div class='ctx'> 	ori	t0, t0, 0b1100</div><div class='head'>diff --git a/arch/loongarch/kernel/kfpu.c b/arch/loongarch/kernel/kfpu.c<br/>index ec5b28e570c9..4c476904227f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/kfpu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/kfpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/kfpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/kfpu.c</a></div><div class='hunk'>@@ -18,11 +18,28 @@ static unsigned int euen_mask = CSR_EUEN_FPEN;</div><div class='ctx'> static DEFINE_PER_CPU(bool, in_kernel_fpu);</div><div class='ctx'> static DEFINE_PER_CPU(unsigned int, euen_current);</div><div class='ctx'> </div><div class='add'>+static inline void fpregs_lock(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PREEMPT_RT))</div><div class='add'>+		preempt_disable();</div><div class='add'>+	else</div><div class='add'>+		local_bh_disable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void fpregs_unlock(void)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_PREEMPT_RT))</div><div class='add'>+		preempt_enable();</div><div class='add'>+	else</div><div class='add'>+		local_bh_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void kernel_fpu_begin(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int *euen_curr;</div><div class='ctx'> </div><div class='del'>-	preempt_disable();</div><div class='add'>+	if (!irqs_disabled())</div><div class='add'>+		fpregs_lock();</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(this_cpu_read(in_kernel_fpu));</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +90,8 @@ void kernel_fpu_end(void)</div><div class='ctx'> </div><div class='ctx'> 	this_cpu_write(in_kernel_fpu, false);</div><div class='ctx'> </div><div class='del'>-	preempt_enable();</div><div class='add'>+	if (!irqs_disabled())</div><div class='add'>+		fpregs_unlock();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kernel_fpu_end);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/loongarch/kernel/lbt.S b/arch/loongarch/kernel/lbt.S<br/>index 001f061d226a..71678912d24c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/lbt.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/lbt.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/lbt.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/lbt.S</a></div><div class='hunk'>@@ -90,6 +90,7 @@ SYM_FUNC_START(_save_lbt_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_save_lbt_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_lbt_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: scr</div><div class='hunk'>@@ -110,6 +111,7 @@ SYM_FUNC_START(_restore_lbt_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_restore_lbt_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_lbt_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: ftop</div><div class='hunk'>@@ -120,6 +122,7 @@ SYM_FUNC_START(_save_ftop_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_save_ftop_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_save_ftop_context)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * a0: ftop</div><div class='hunk'>@@ -150,6 +153,7 @@ SYM_FUNC_START(_restore_ftop_context)</div><div class='ctx'> 	li.w		a0, 0			# success</div><div class='ctx'> 	jr		ra</div><div class='ctx'> SYM_FUNC_END(_restore_ftop_context)</div><div class='add'>+EXPORT_SYMBOL_GPL(_restore_ftop_context)</div><div class='ctx'> </div><div class='ctx'> .L_lbt_fault:</div><div class='ctx'> 	li.w		a0, -EFAULT		# failure</div><div class='head'>diff --git a/arch/loongarch/kernel/perf_event.c b/arch/loongarch/kernel/perf_event.c<br/>index f86a4b838dd7..8ad098703488 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/perf_event.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/perf_event.c</a></div><div class='hunk'>@@ -479,8 +479,7 @@ static void handle_associated_event(struct cpu_hw_events *cpuc, int idx,</div><div class='ctx'> 	if (!loongarch_pmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (perf_event_overflow(event, data, regs))</div><div class='del'>-		loongarch_pmu_disable_event(idx);</div><div class='add'>+	perf_event_overflow(event, data, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t pmu_handle_irq(int irq, void *dev)</div><div class='head'>diff --git a/arch/loongarch/kernel/process.c b/arch/loongarch/kernel/process.c<br/>index 6e58f65455c7..3582f591bab2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/process.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/process.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/entry-common.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/sched/debug.h&gt;</div><div class='hunk'>@@ -34,6 +35,7 @@</div><div class='ctx'> #include &lt;linux/nmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/asm-prototypes.h&gt;</div><div class='ctx'> #include &lt;asm/bootinfo.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='hunk'>@@ -47,6 +49,7 @@</div><div class='ctx'> #include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/reg.h&gt;</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -63,8 +66,9 @@ EXPORT_SYMBOL(__stack_chk_guard);</div><div class='ctx'> unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;</div><div class='ctx'> EXPORT_SYMBOL(boot_option_idle_override);</div><div class='ctx'> </div><div class='del'>-asmlinkage void ret_from_fork(void);</div><div class='del'>-asmlinkage void ret_from_kernel_thread(void);</div><div class='add'>+asmlinkage void restore_and_ret(void);</div><div class='add'>+asmlinkage void ret_from_fork_asm(void);</div><div class='add'>+asmlinkage void ret_from_kernel_thread_asm(void);</div><div class='ctx'> </div><div class='ctx'> void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)</div><div class='ctx'> {</div><div class='hunk'>@@ -138,6 +142,23 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_fork(struct task_struct *prev,</div><div class='add'>+							   struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	schedule_tail(prev);</div><div class='add'>+	syscall_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void noinstr __no_stack_protector ret_from_kernel_thread(struct task_struct *prev,</div><div class='add'>+								    struct pt_regs *regs,</div><div class='add'>+								    int (*fn)(void *),</div><div class='add'>+								    void *fn_arg)</div><div class='add'>+{</div><div class='add'>+	schedule_tail(prev);</div><div class='add'>+	fn(fn_arg);</div><div class='add'>+	syscall_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Copy architecture-specific thread state</div><div class='ctx'>  */</div><div class='hunk'>@@ -165,8 +186,8 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		p-&gt;thread.reg03 = childksp;</div><div class='ctx'> 		p-&gt;thread.reg23 = (unsigned long)args-&gt;fn;</div><div class='ctx'> 		p-&gt;thread.reg24 = (unsigned long)args-&gt;fn_arg;</div><div class='del'>-		p-&gt;thread.reg01 = (unsigned long)ret_from_kernel_thread;</div><div class='del'>-		p-&gt;thread.sched_ra = (unsigned long)ret_from_kernel_thread;</div><div class='add'>+		p-&gt;thread.reg01 = (unsigned long)ret_from_kernel_thread_asm;</div><div class='add'>+		p-&gt;thread.sched_ra = (unsigned long)ret_from_kernel_thread_asm;</div><div class='ctx'> 		memset(childregs, 0, sizeof(struct pt_regs));</div><div class='ctx'> 		childregs-&gt;csr_euen = p-&gt;thread.csr_euen;</div><div class='ctx'> 		childregs-&gt;csr_crmd = p-&gt;thread.csr_crmd;</div><div class='hunk'>@@ -182,8 +203,8 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		childregs-&gt;regs[3] = usp;</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;thread.reg03 = (unsigned long) childregs;</div><div class='del'>-	p-&gt;thread.reg01 = (unsigned long) ret_from_fork;</div><div class='del'>-	p-&gt;thread.sched_ra = (unsigned long) ret_from_fork;</div><div class='add'>+	p-&gt;thread.reg01 = (unsigned long) ret_from_fork_asm;</div><div class='add'>+	p-&gt;thread.sched_ra = (unsigned long) ret_from_fork_asm;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * New tasks lose permission to use the fpu. This accelerates context</div><div class='head'>diff --git a/arch/loongarch/kernel/signal.c b/arch/loongarch/kernel/signal.c<br/>index 7a555b600171..4740cb5b2388 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/signal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/signal.c</a></div><div class='hunk'>@@ -51,27 +51,6 @@</div><div class='ctx'> #define lock_lbt_owner()	({ preempt_disable(); pagefault_disable(); })</div><div class='ctx'> #define unlock_lbt_owner()	({ pagefault_enable(); preempt_enable(); })</div><div class='ctx'> </div><div class='del'>-/* Assembly functions to move context to/from the FPU */</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_save_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_restore_fp_context(void __user *fpregs, void __user *fcc, void __user *csr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_save_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_restore_lsx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_save_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-extern asmlinkage int</div><div class='del'>-_restore_lasx_context(void __user *fpregs, void __user *fcc, void __user *fcsr);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CPU_HAS_LBT</div><div class='del'>-extern asmlinkage int _save_lbt_context(void __user *regs, void __user *eflags);</div><div class='del'>-extern asmlinkage int _restore_lbt_context(void __user *regs, void __user *eflags);</div><div class='del'>-extern asmlinkage int _save_ftop_context(void __user *ftop);</div><div class='del'>-extern asmlinkage int _restore_ftop_context(void __user *ftop);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct rt_sigframe {</div><div class='ctx'> 	struct siginfo rs_info;</div><div class='ctx'> 	struct ucontext rs_uctx;</div><div class='head'>diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c<br/>index e2d3bfeb6366..bc75a3a69fc8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/time.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/time.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/time.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/time.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ static unsigned long __init get_loops_per_jiffy(void)</div><div class='ctx'> 	return lpj;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long init_offset __nosavedata;</div><div class='add'>+static long init_offset;</div><div class='ctx'> </div><div class='ctx'> void save_counter(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/kernel/traps.c b/arch/loongarch/kernel/traps.c<br/>index 2ec3106c0da3..47fc2de6d150 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/traps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/traps.c</a></div><div class='hunk'>@@ -553,9 +553,10 @@ asmlinkage void noinstr do_ale(struct pt_regs *regs)</div><div class='ctx'> 	die_if_kernel("Kernel ale access", regs);</div><div class='ctx'> 	force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs-&gt;csr_badvaddr);</div><div class='ctx'> #else</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	unsigned int *pc;</div><div class='ctx'> </div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, regs-&gt;csr_badvaddr);</div><div class='hunk'>@@ -582,7 +583,7 @@ sigbus:</div><div class='ctx'> 	die_if_kernel("Kernel ale access", regs);</div><div class='ctx'> 	force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs-&gt;csr_badvaddr);</div><div class='ctx'> out:</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> #endif</div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='hunk'>@@ -621,12 +622,13 @@ static void bug_handler(struct pt_regs *regs)</div><div class='ctx'> asmlinkage void noinstr do_bce(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	bool user = user_mode(regs);</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	unsigned long era = exception_era(regs);</div><div class='ctx'> 	u64 badv = 0, lower = 0, upper = ULONG_MAX;</div><div class='ctx'> 	union loongarch_instruction insn;</div><div class='ctx'> 	irqentry_state_t state = irqentry_enter(regs);</div><div class='ctx'> </div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;thread.trap_nr = read_csr_excode();</div><div class='hunk'>@@ -692,7 +694,7 @@ asmlinkage void noinstr do_bce(struct pt_regs *regs)</div><div class='ctx'> 	force_sig_bnderr((void __user *)badv, (void __user *)lower, (void __user *)upper);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='hunk'>@@ -710,11 +712,12 @@ bad_era:</div><div class='ctx'> asmlinkage void noinstr do_bp(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	bool user = user_mode(regs);</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	unsigned int opcode, bcode;</div><div class='ctx'> 	unsigned long era = exception_era(regs);</div><div class='ctx'> 	irqentry_state_t state = irqentry_enter(regs);</div><div class='ctx'> </div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	if (__get_inst(&amp;opcode, (u32 *)era, user))</div><div class='hunk'>@@ -780,7 +783,7 @@ asmlinkage void noinstr do_bp(struct pt_regs *regs)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='hunk'>@@ -1015,6 +1018,7 @@ static void init_restore_lbt(void)</div><div class='ctx'> </div><div class='ctx'> asmlinkage void noinstr do_lbt(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='add'>+	bool pie = regs_irqs_disabled(regs);</div><div class='ctx'> 	irqentry_state_t state = irqentry_enter(regs);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1024,7 +1028,7 @@ asmlinkage void noinstr do_lbt(struct pt_regs *regs)</div><div class='ctx'> 	 * (including the user using 'MOVGR2GCSR' to turn on TM, which</div><div class='ctx'> 	 * will not trigger the BTE), we need to check PRMD first.</div><div class='ctx'> 	 */</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_has_lbt) {</div><div class='hunk'>@@ -1038,7 +1042,7 @@ asmlinkage void noinstr do_lbt(struct pt_regs *regs)</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (regs-&gt;csr_prmd &amp; CSR_PRMD_PIE)</div><div class='add'>+	if (!pie)</div><div class='ctx'> 		local_irq_disable();</div><div class='ctx'> </div><div class='ctx'> 	irqentry_exit(regs, state);</div><div class='head'>diff --git a/arch/loongarch/kernel/uprobes.c b/arch/loongarch/kernel/uprobes.c<br/>index 87abc7137b73..6022eb0f71db 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/uprobes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kernel/uprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kernel/uprobes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kernel/uprobes.c</a></div><div class='hunk'>@@ -42,7 +42,6 @@ int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> 	utask-&gt;autask.saved_trap_nr = current-&gt;thread.trap_nr;</div><div class='ctx'> 	current-&gt;thread.trap_nr = UPROBE_TRAP_NR;</div><div class='ctx'> 	instruction_pointer_set(regs, utask-&gt;xol_vaddr);</div><div class='del'>-	user_enable_single_step(current);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -53,13 +52,7 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON_ONCE(current-&gt;thread.trap_nr != UPROBE_TRAP_NR);</div><div class='ctx'> 	current-&gt;thread.trap_nr = utask-&gt;autask.saved_trap_nr;</div><div class='del'>-</div><div class='del'>-	if (auprobe-&gt;simulate)</div><div class='del'>-		instruction_pointer_set(regs, auprobe-&gt;resume_era);</div><div class='del'>-	else</div><div class='del'>-		instruction_pointer_set(regs, utask-&gt;vaddr + LOONGARCH_INSN_SIZE);</div><div class='del'>-</div><div class='del'>-	user_disable_single_step(current);</div><div class='add'>+	instruction_pointer_set(regs, utask-&gt;vaddr + LOONGARCH_INSN_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -70,7 +63,6 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	current-&gt;thread.trap_nr = utask-&gt;autask.saved_trap_nr;</div><div class='ctx'> 	instruction_pointer_set(regs, utask-&gt;vaddr);</div><div class='del'>-	user_disable_single_step(current);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool arch_uprobe_xol_was_trapped(struct task_struct *t)</div><div class='hunk'>@@ -90,7 +82,6 @@ bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	insn.word = auprobe-&gt;insn[0];</div><div class='ctx'> 	arch_simulate_insn(insn, regs);</div><div class='del'>-	auprobe-&gt;resume_era = regs-&gt;csr_era;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kvm/Makefile b/arch/loongarch/kvm/Makefile<br/>index f4c8e35c216a..cb41d9265662 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kvm/Makefile</a></div><div class='hunk'>@@ -21,4 +21,4 @@ kvm-y += intc/eiointc.o</div><div class='ctx'> kvm-y += intc/pch_pic.o</div><div class='ctx'> kvm-y += irqfd.o</div><div class='ctx'> </div><div class='del'>-CFLAGS_exit.o	+= $(call cc-option,-Wno-override-init,)</div><div class='add'>+CFLAGS_exit.o	+= $(call cc-disable-warning, override-init)</div><div class='head'>diff --git a/arch/loongarch/kvm/exit.c b/arch/loongarch/kvm/exit.c<br/>index ea321403644a..fa52251b3bf1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/exit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/exit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/exit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kvm/exit.c</a></div><div class='hunk'>@@ -341,7 +341,7 @@ static int kvm_trap_handle_gspr(struct kvm_vcpu *vcpu)</div><div class='ctx'>  * 2) Execute CACOP/IDLE instructions;</div><div class='ctx'>  * 3) Access to unimplemented CSRs/IOCSRs.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_gspr(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_gspr(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = RESUME_GUEST;</div><div class='ctx'> 	enum emulation_result er = EMULATE_DONE;</div><div class='hunk'>@@ -661,7 +661,7 @@ int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write)</div><div class='add'>+static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	larch_inst inst;</div><div class='hunk'>@@ -675,7 +675,7 @@ static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write)</div><div class='ctx'> 		return RESUME_GUEST;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = kvm_handle_mm_fault(vcpu, badv, write);</div><div class='add'>+	ret = kvm_handle_mm_fault(vcpu, badv, write, ecode);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		/* Treat as MMIO */</div><div class='ctx'> 		inst.word = vcpu-&gt;arch.badi;</div><div class='hunk'>@@ -705,14 +705,14 @@ static int kvm_handle_rdwr_fault(struct kvm_vcpu *vcpu, bool write)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_read_fault(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_read_fault(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='del'>-	return kvm_handle_rdwr_fault(vcpu, false);</div><div class='add'>+	return kvm_handle_rdwr_fault(vcpu, false, ecode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_write_fault(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_write_fault(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='del'>-	return kvm_handle_rdwr_fault(vcpu, true);</div><div class='add'>+	return kvm_handle_rdwr_fault(vcpu, true, ecode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int kvm_complete_user_service(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='hunk'>@@ -726,11 +726,12 @@ int kvm_complete_user_service(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> /**</div><div class='ctx'>  * kvm_handle_fpu_disabled() - Guest used fpu however it is disabled at host</div><div class='ctx'>  * @vcpu:	Virtual CPU context.</div><div class='add'>+ * @ecode:	Exception code.</div><div class='ctx'>  *</div><div class='ctx'>  * Handle when the guest attempts to use fpu which hasn't been allowed</div><div class='ctx'>  * by the root context.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_fpu_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_fpu_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_run *run = vcpu-&gt;run;</div><div class='ctx'> </div><div class='hunk'>@@ -783,11 +784,12 @@ static long kvm_save_notify(struct kvm_vcpu *vcpu)</div><div class='ctx'> /*</div><div class='ctx'>  * kvm_handle_lsx_disabled() - Guest used LSX while disabled in root.</div><div class='ctx'>  * @vcpu:      Virtual CPU context.</div><div class='add'>+ * @ecode:	Exception code.</div><div class='ctx'>  *</div><div class='ctx'>  * Handle when the guest attempts to use LSX when it is disabled in the root</div><div class='ctx'>  * context.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_lsx_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_lsx_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_own_lsx(vcpu))</div><div class='ctx'> 		kvm_queue_exception(vcpu, EXCCODE_INE, 0);</div><div class='hunk'>@@ -798,11 +800,12 @@ static int kvm_handle_lsx_disabled(struct kvm_vcpu *vcpu)</div><div class='ctx'> /*</div><div class='ctx'>  * kvm_handle_lasx_disabled() - Guest used LASX while disabled in root.</div><div class='ctx'>  * @vcpu:	Virtual CPU context.</div><div class='add'>+ * @ecode:	Exception code.</div><div class='ctx'>  *</div><div class='ctx'>  * Handle when the guest attempts to use LASX when it is disabled in the root</div><div class='ctx'>  * context.</div><div class='ctx'>  */</div><div class='del'>-static int kvm_handle_lasx_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_lasx_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_own_lasx(vcpu))</div><div class='ctx'> 		kvm_queue_exception(vcpu, EXCCODE_INE, 0);</div><div class='hunk'>@@ -810,7 +813,7 @@ static int kvm_handle_lasx_disabled(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return RESUME_GUEST;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_lbt_disabled(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_lbt_disabled(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	if (kvm_own_lbt(vcpu))</div><div class='ctx'> 		kvm_queue_exception(vcpu, EXCCODE_INE, 0);</div><div class='hunk'>@@ -872,7 +875,7 @@ static void kvm_handle_service(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_write_reg(vcpu, LOONGARCH_GPR_A0, ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_handle_hypercall(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_handle_hypercall(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	larch_inst inst;</div><div class='hunk'>@@ -932,16 +935,14 @@ static int kvm_handle_hypercall(struct kvm_vcpu *vcpu)</div><div class='ctx'> /*</div><div class='ctx'>  * LoongArch KVM callback handling for unimplemented guest exiting</div><div class='ctx'>  */</div><div class='del'>-static int kvm_fault_ni(struct kvm_vcpu *vcpu)</div><div class='add'>+static int kvm_fault_ni(struct kvm_vcpu *vcpu, int ecode)</div><div class='ctx'> {</div><div class='del'>-	unsigned int ecode, inst;</div><div class='del'>-	unsigned long estat, badv;</div><div class='add'>+	unsigned int inst;</div><div class='add'>+	unsigned long badv;</div><div class='ctx'> </div><div class='ctx'> 	/* Fetch the instruction */</div><div class='ctx'> 	inst = vcpu-&gt;arch.badi;</div><div class='ctx'> 	badv = vcpu-&gt;arch.badv;</div><div class='del'>-	estat = vcpu-&gt;arch.host_estat;</div><div class='del'>-	ecode = (estat &amp; CSR_ESTAT_EXC) &gt;&gt; CSR_ESTAT_EXC_SHIFT;</div><div class='ctx'> 	kvm_err("ECode: %d PC=%#lx Inst=0x%08x BadVaddr=%#lx ESTAT=%#lx\n",</div><div class='ctx'> 			ecode, vcpu-&gt;arch.pc, inst, badv, read_gcsr_estat());</div><div class='ctx'> 	kvm_arch_vcpu_dump_regs(vcpu);</div><div class='hunk'>@@ -966,5 +967,5 @@ static exit_handle_fn kvm_fault_tables[EXCCODE_INT_START] = {</div><div class='ctx'> </div><div class='ctx'> int kvm_handle_fault(struct kvm_vcpu *vcpu, int fault)</div><div class='ctx'> {</div><div class='del'>-	return kvm_fault_tables[fault](vcpu);</div><div class='add'>+	return kvm_fault_tables[fault](vcpu, fault);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kvm/intc/ipi.c b/arch/loongarch/kvm/intc/ipi.c<br/>index 93f4acd44523..fe734dc062ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/intc/ipi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/intc/ipi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/intc/ipi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kvm/intc/ipi.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)</div><div class='ctx'> 		ret = kvm_io_bus_read(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &amp;val);</div><div class='ctx'> 		srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='ctx'> 		if (unlikely(ret)) {</div><div class='del'>-			kvm_err("%s: : read date from addr %llx failed\n", __func__, addr);</div><div class='add'>+			kvm_err("%s: : read data from addr %llx failed\n", __func__, addr);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Construct the mask by scanning the bit 27-30 */</div><div class='hunk'>@@ -127,7 +127,7 @@ static int send_ipi_data(struct kvm_vcpu *vcpu, gpa_t addr, uint64_t data)</div><div class='ctx'> 	ret = kvm_io_bus_write(vcpu, KVM_IOCSR_BUS, addr, sizeof(val), &amp;val);</div><div class='ctx'> 	srcu_read_unlock(&amp;vcpu-&gt;kvm-&gt;srcu, idx);</div><div class='ctx'> 	if (unlikely(ret))</div><div class='del'>-		kvm_err("%s: : write date to addr %llx failed\n", __func__, addr);</div><div class='add'>+		kvm_err("%s: : write data to addr %llx failed\n", __func__, addr);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c<br/>index d165cd38c6bb..80ea63d465b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kvm/main.c</a></div><div class='hunk'>@@ -296,10 +296,10 @@ int kvm_arch_enable_virtualization_cpu(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable virtualization features granting guest direct control of</div><div class='ctx'> 	 * certain features:</div><div class='del'>-	 * GCI=2:       Trap on init or unimplement cache instruction.</div><div class='add'>+	 * GCI=2:       Trap on init or unimplemented cache instruction.</div><div class='ctx'> 	 * TORU=0:      Trap on Root Unimplement.</div><div class='ctx'> 	 * CACTRL=1:    Root control cache.</div><div class='del'>-	 * TOP=0:       Trap on Previlege.</div><div class='add'>+	 * TOP=0:       Trap on Privilege.</div><div class='ctx'> 	 * TOE=0:       Trap on Exception.</div><div class='ctx'> 	 * TIT=0:       Trap on Timer.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/arch/loongarch/kvm/mmu.c b/arch/loongarch/kvm/mmu.c<br/>index 4d203294767c..ed956c5cf2cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/mmu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/mmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kvm/mmu.c</a></div><div class='hunk'>@@ -912,7 +912,7 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long gpa, bool write)</div><div class='add'>+int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long gpa, bool write, int ecode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -921,8 +921,17 @@ int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long gpa, bool write)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Invalidate this entry in the TLB */</div><div class='del'>-	vcpu-&gt;arch.flush_gpa = gpa;</div><div class='del'>-	kvm_make_request(KVM_REQ_TLB_FLUSH_GPA, vcpu);</div><div class='add'>+	if (!cpu_has_ptw || (ecode == EXCCODE_TLBM)) {</div><div class='add'>+		/*</div><div class='add'>+		 * With HW PTW, invalid TLB is not added when page fault. But</div><div class='add'>+		 * for EXCCODE_TLBM exception, stale TLB may exist because of</div><div class='add'>+		 * the last read access.</div><div class='add'>+		 *</div><div class='add'>+		 * With SW PTW, invalid TLB is added in TLB refill exception.</div><div class='add'>+		 */</div><div class='add'>+		vcpu-&gt;arch.flush_gpa = gpa;</div><div class='add'>+		kvm_make_request(KVM_REQ_TLB_FLUSH_GPA, vcpu);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c<br/>index 8e427b379661..5af32ec62cb1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/vcpu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/kvm/vcpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/kvm/vcpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/kvm/vcpu.c</a></div><div class='hunk'>@@ -294,6 +294,7 @@ static int kvm_pre_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		vcpu-&gt;arch.aux_inuse &amp;= ~KVM_LARCH_SWCSR_LATEST;</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_request_pending(vcpu) || xfer_to_guest_mode_work_pending()) {</div><div class='add'>+			kvm_lose_pmu(vcpu);</div><div class='ctx'> 			/* make sure the vcpu mode has been written */</div><div class='ctx'> 			smp_store_mb(vcpu-&gt;mode, OUTSIDE_GUEST_MODE);</div><div class='ctx'> 			local_irq_enable();</div><div class='hunk'>@@ -902,6 +903,13 @@ static int kvm_set_one_reg(struct kvm_vcpu *vcpu,</div><div class='ctx'> 			vcpu-&gt;arch.st.guest_addr = 0;</div><div class='ctx'> 			memset(&amp;vcpu-&gt;arch.irq_pending, 0, sizeof(vcpu-&gt;arch.irq_pending));</div><div class='ctx'> 			memset(&amp;vcpu-&gt;arch.irq_clear, 0, sizeof(vcpu-&gt;arch.irq_clear));</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * When vCPU reset, clear the ESTAT and GINTC registers</div><div class='add'>+			 * Other CSR registers are cleared with function _kvm_setcsr().</div><div class='add'>+			 */</div><div class='add'>+			kvm_write_sw_gcsr(vcpu-&gt;arch.csr, LOONGARCH_CSR_GINTC, 0);</div><div class='add'>+			kvm_write_sw_gcsr(vcpu-&gt;arch.csr, LOONGARCH_CSR_ESTAT, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			ret = -EINVAL;</div><div class='head'>diff --git a/arch/loongarch/lib/crc32-loongarch.c b/arch/loongarch/lib/crc32-loongarch.c<br/>index c44ee4f32557..b37cd8537b45 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/lib/crc32-loongarch.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/lib/crc32-loongarch.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/lib/crc32-loongarch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/lib/crc32-loongarch.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@ do {							\</div><div class='ctx'> #define CRC32(crc, value, size)		_CRC32(crc, value, size, crc)</div><div class='ctx'> #define CRC32C(crc, value, size)	_CRC32(crc, value, size, crcc)</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='ctx'> </div><div class='ctx'> u32 crc32_le_arch(u32 crc, const u8 *p, size_t len)</div><div class='ctx'> {</div><div class='hunk'>@@ -114,7 +114,7 @@ static int __init crc32_loongarch_init(void)</div><div class='ctx'> 		static_branch_enable(&amp;have_crc32);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc32_loongarch_init);</div><div class='add'>+subsys_initcall(crc32_loongarch_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc32_loongarch_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/loongarch/mm/hugetlbpage.c b/arch/loongarch/mm/hugetlbpage.c<br/>index e4068906143b..cea84d7f2b91 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/mm/hugetlbpage.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/mm/hugetlbpage.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/mm/hugetlbpage.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/mm/hugetlbpage.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr,</div><div class='ctx'> 				pmd = pmd_offset(pud, addr);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return (pte_t *) pmd;</div><div class='add'>+	return pmd_none(pmdp_get(pmd)) ? NULL : (pte_t *) pmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> uint64_t pmd_to_entrylo(unsigned long pmd_val)</div><div class='head'>diff --git a/arch/loongarch/mm/init.c b/arch/loongarch/mm/init.c<br/>index fdb7f73ad160..06f11d9e4ec1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/mm/init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/mm/init.c</a></div><div class='hunk'>@@ -65,9 +65,6 @@ void __init paging_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long max_zone_pfns[MAX_NR_ZONES];</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ZONE_DMA</div><div class='del'>-	max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_ZONE_DMA32</div><div class='ctx'> 	max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/loongarch/power/hibernate.c b/arch/loongarch/power/hibernate.c<br/>index 1e0590542f98..e7b7346592cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/loongarch/power/hibernate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/loongarch/power/hibernate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/loongarch/power/hibernate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/loongarch/power/hibernate.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;asm/fpu.h&gt;</div><div class='ctx'> #include &lt;asm/loongson.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -14,6 +15,7 @@ struct pt_regs saved_regs;</div><div class='ctx'> </div><div class='ctx'> void save_processor_state(void)</div><div class='ctx'> {</div><div class='add'>+	save_counter();</div><div class='ctx'> 	saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);</div><div class='ctx'> 	saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);</div><div class='ctx'> 	saved_euen = csr_read32(LOONGARCH_CSR_EUEN);</div><div class='hunk'>@@ -26,6 +28,7 @@ void save_processor_state(void)</div><div class='ctx'> </div><div class='ctx'> void restore_processor_state(void)</div><div class='ctx'> {</div><div class='add'>+	sync_counter();</div><div class='ctx'> 	csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);</div><div class='ctx'> 	csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);</div><div class='ctx'> 	csr_write32(saved_euen, LOONGARCH_CSR_EUEN);</div><div class='head'>diff --git a/arch/m68k/coldfire/m5272.c b/arch/m68k/coldfire/m5272.c<br/>index 734dab657fe3..5b70dfdab368 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/coldfire/m5272.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/coldfire/m5272.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/coldfire/m5272.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/coldfire/m5272.c</a></div><div class='hunk'>@@ -119,7 +119,7 @@ static struct fixed_phy_status nettel_fixed_phy_status __initdata = {</div><div class='ctx'> static int __init init_BSP(void)</div><div class='ctx'> {</div><div class='ctx'> 	m5272_uarts_init();</div><div class='del'>-	fixed_phy_add(PHY_POLL, 0, &amp;nettel_fixed_phy_status);</div><div class='add'>+	fixed_phy_add(0, &amp;nettel_fixed_phy_status);</div><div class='ctx'> 	clkdev_add_table(m5272_clk_lookup, ARRAY_SIZE(m5272_clk_lookup));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/m68k/configs/amcore_defconfig b/arch/m68k/configs/amcore_defconfig<br/>index 67a0d157122d..60767811e34a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/amcore_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/amcore_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/amcore_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/amcore_defconfig</a></div><div class='hunk'>@@ -2,7 +2,6 @@ CONFIG_LOCALVERSION="amcore-002"</div><div class='ctx'> CONFIG_DEFAULT_HOSTNAME="amcore"</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> # CONFIG_FHANDLE is not set</div><div class='del'>-# CONFIG_USELIB is not set</div><div class='ctx'> CONFIG_LOG_BUF_SHIFT=14</div><div class='ctx'> CONFIG_CC_OPTIMIZE_FOR_SIZE=y</div><div class='ctx'> # CONFIG_AIO is not set</div><div class='hunk'>@@ -89,4 +88,3 @@ CONFIG_PANIC_ON_OOPS=y</div><div class='ctx'> # CONFIG_CRYPTO_ECHAINIV is not set</div><div class='ctx'> CONFIG_CRYPTO_ANSI_CPRNG=y</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=y</div><div class='head'>diff --git a/arch/m68k/configs/amiga_defconfig b/arch/m68k/configs/amiga_defconfig<br/>index 31ecb8b7b9f1..d05690289e33 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/amiga_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/amiga_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/amiga_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/amiga_defconfig</a></div><div class='hunk'>@@ -267,8 +267,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -551,7 +549,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -602,7 +600,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -621,8 +618,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -632,7 +627,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/apollo_defconfig b/arch/m68k/configs/apollo_defconfig<br/>index 1f57514624d5..a1747fbe23fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/apollo_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/apollo_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/apollo_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/apollo_defconfig</a></div><div class='hunk'>@@ -263,8 +263,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -508,7 +506,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -559,7 +557,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -578,8 +575,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -589,7 +584,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/atari_defconfig b/arch/m68k/configs/atari_defconfig<br/>index 02db7a48e57e..74293551f66b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/atari_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/atari_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/atari_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/atari_defconfig</a></div><div class='hunk'>@@ -270,8 +270,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -528,7 +526,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -579,7 +577,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -598,8 +595,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -609,7 +604,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/bvme6000_defconfig b/arch/m68k/configs/bvme6000_defconfig<br/>index f0e673cb17eb..419b13ae950a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/bvme6000_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/bvme6000_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/bvme6000_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/bvme6000_defconfig</a></div><div class='hunk'>@@ -260,8 +260,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -500,7 +498,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -551,7 +549,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -570,8 +567,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -581,7 +576,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/hp300_defconfig b/arch/m68k/configs/hp300_defconfig<br/>index e8ca5a50b86d..4c81d756587c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/hp300_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/hp300_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/hp300_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/hp300_defconfig</a></div><div class='hunk'>@@ -262,8 +262,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -510,7 +508,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -561,7 +559,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -580,8 +577,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -591,7 +586,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/mac_defconfig b/arch/m68k/configs/mac_defconfig<br/>index b3a270441bb1..daa01d7fb462 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/mac_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/mac_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/mac_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/mac_defconfig</a></div><div class='hunk'>@@ -261,8 +261,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -527,7 +525,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -578,7 +576,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -597,8 +594,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -608,7 +603,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/multi_defconfig b/arch/m68k/configs/multi_defconfig<br/>index d215dba006ce..641ca22eb3b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/multi_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/multi_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/multi_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/multi_defconfig</a></div><div class='hunk'>@@ -281,8 +281,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -614,7 +612,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -665,7 +663,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -684,8 +681,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -695,7 +690,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme147_defconfig b/arch/m68k/configs/mvme147_defconfig<br/>index a888ed93ff82..f98ffa7a1640 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme147_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/mvme147_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme147_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/mvme147_defconfig</a></div><div class='hunk'>@@ -259,8 +259,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -500,7 +498,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -551,7 +549,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -570,8 +567,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -581,7 +576,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/mvme16x_defconfig b/arch/m68k/configs/mvme16x_defconfig<br/>index b481782375f6..2bfc3f4b48f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme16x_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/mvme16x_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/mvme16x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/mvme16x_defconfig</a></div><div class='hunk'>@@ -260,8 +260,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -501,7 +499,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -552,7 +550,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -571,8 +568,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -582,7 +577,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/q40_defconfig b/arch/m68k/configs/q40_defconfig<br/>index 6eba743d8eb5..2bd46cbcca2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/q40_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/q40_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/q40_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/q40_defconfig</a></div><div class='hunk'>@@ -261,8 +261,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -517,7 +515,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -568,7 +566,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -587,8 +584,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -598,7 +593,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3_defconfig b/arch/m68k/configs/sun3_defconfig<br/>index 9bdbb418ffa8..dc7fc94fc669 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/sun3_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/sun3_defconfig</a></div><div class='hunk'>@@ -256,8 +256,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -498,7 +496,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -549,7 +547,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -567,8 +564,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -578,7 +573,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/configs/sun3x_defconfig b/arch/m68k/configs/sun3x_defconfig<br/>index e1cf20fa5343..b026a54867f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3x_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/configs/sun3x_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/configs/sun3x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/configs/sun3x_defconfig</a></div><div class='hunk'>@@ -257,8 +257,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='del'>-# CONFIG_IP_DCCP_CCID3 is not set</div><div class='ctx'> CONFIG_SCTP_COOKIE_HMAC_SHA1=y</div><div class='ctx'> CONFIG_RDS=m</div><div class='ctx'> CONFIG_RDS_TCP=m</div><div class='hunk'>@@ -498,7 +496,7 @@ CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='hunk'>@@ -549,7 +547,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_PRIME_NUMBERS=m</div><div class='ctx'> CONFIG_XZ_DEC_TEST=m</div><div class='ctx'> CONFIG_GLOB_SELFTEST=m</div><div class='ctx'> # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set</div><div class='hunk'>@@ -568,8 +565,6 @@ CONFIG_ATOMIC64_SELFTEST=m</div><div class='ctx'> CONFIG_ASYNC_RAID6_TEST=m</div><div class='ctx'> CONFIG_TEST_HEXDUMP=m</div><div class='ctx'> CONFIG_TEST_KSTRTOX=m</div><div class='del'>-CONFIG_TEST_PRINTF=m</div><div class='del'>-CONFIG_TEST_SCANF=m</div><div class='ctx'> CONFIG_TEST_BITMAP=m</div><div class='ctx'> CONFIG_TEST_UUID=m</div><div class='ctx'> CONFIG_TEST_XARRAY=m</div><div class='hunk'>@@ -579,7 +574,6 @@ CONFIG_TEST_IDA=m</div><div class='ctx'> CONFIG_TEST_BITOPS=m</div><div class='ctx'> CONFIG_TEST_VMALLOC=m</div><div class='ctx'> CONFIG_TEST_BPF=m</div><div class='del'>-CONFIG_TEST_BLACKHOLE_DEV=m</div><div class='ctx'> CONFIG_FIND_BIT_BENCHMARK=m</div><div class='ctx'> CONFIG_TEST_FIRMWARE=m</div><div class='ctx'> CONFIG_TEST_SYSCTL=m</div><div class='head'>diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c<br/>index 0fba32552836..c7e8de0d34bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/kernel/setup_mm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/kernel/setup_mm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/kernel/setup_mm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/kernel/setup_mm.c</a></div><div class='hunk'>@@ -484,7 +484,7 @@ static int hardware_proc_show(struct seq_file *m, void *v)</div><div class='ctx'> 	if (mach_get_model)</div><div class='ctx'> 		mach_get_model(model);</div><div class='ctx'> 	else</div><div class='del'>-		strcpy(model, "Unknown m68k");</div><div class='add'>+		strscpy(model, "Unknown m68k");</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "Model:\t\t%s\n", model);</div><div class='ctx'> 	for (mem = 0, i = 0; i &lt; m68k_num_memory; i++)</div><div class='head'>diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c<br/>index e324410ef239..d26c7f4f8c36 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/m68k/mac/config.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/m68k/mac/config.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/m68k/mac/config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/m68k/mac/config.c</a></div><div class='hunk'>@@ -793,7 +793,7 @@ static void __init mac_identify(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	macintosh_config = mac_data_table;</div><div class='del'>-	for (m = macintosh_config; m-&gt;ident != -1; m++) {</div><div class='add'>+	for (m = &amp;mac_data_table[1]; m-&gt;ident != -1; m++) {</div><div class='ctx'> 		if (m-&gt;ident == model) {</div><div class='ctx'> 			macintosh_config = m;</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c<br/>index 8ccf167c167e..e8c38aaf46a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/ath25/ar2315.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/ath25/ar2315.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/ath25/ar2315.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/ath25/ar2315.c</a></div><div class='hunk'>@@ -149,8 +149,8 @@ void __init ar2315_arch_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	ath25_irq_dispatch = ar2315_irq_dispatch;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(NULL, AR2315_MISC_IRQ_COUNT,</div><div class='del'>-				       &amp;ar2315_misc_irq_domain_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(NULL, AR2315_MISC_IRQ_COUNT,</div><div class='add'>+					  &amp;ar2315_misc_irq_domain_ops, NULL);</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		panic("Failed to add IRQ domain");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c<br/>index cfa103518113..4a1d874be766 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/ath25/ar5312.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/ath25/ar5312.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/ath25/ar5312.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/ath25/ar5312.c</a></div><div class='hunk'>@@ -143,8 +143,8 @@ void __init ar5312_arch_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	ath25_irq_dispatch = ar5312_irq_dispatch;</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(NULL, AR5312_MISC_IRQ_COUNT,</div><div class='del'>-				       &amp;ar5312_misc_irq_domain_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(NULL, AR5312_MISC_IRQ_COUNT,</div><div class='add'>+					  &amp;ar5312_misc_irq_domain_ops, NULL);</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		panic("Failed to add IRQ domain");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c<br/>index 247be207f293..de426a474b5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/bcm47xx/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/bcm47xx/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/bcm47xx/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/bcm47xx/setup.c</a></div><div class='hunk'>@@ -282,7 +282,7 @@ static int __init bcm47xx_register_bus_complete(void)</div><div class='ctx'> 	bcm47xx_leds_register();</div><div class='ctx'> 	bcm47xx_workarounds();</div><div class='ctx'> </div><div class='del'>-	fixed_phy_add(PHY_POLL, 0, &amp;bcm47xx_fixed_phy_status);</div><div class='add'>+	fixed_phy_add(0, &amp;bcm47xx_fixed_phy_status);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> device_initcall(bcm47xx_register_bus_complete);</div><div class='head'>diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig<br/>index 450e979ef5d9..11f4aa6e80e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/cavium-octeon/Kconfig</a></div><div class='hunk'>@@ -23,6 +23,12 @@ config CAVIUM_OCTEON_CVMSEG_SIZE</div><div class='ctx'> 	  legally range is from zero to 54 cache blocks (i.e. CVMSEG LM is</div><div class='ctx'> 	  between zero and 6192 bytes).</div><div class='ctx'> </div><div class='add'>+config CRYPTO_SHA256_OCTEON</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='add'>+	select CRYPTO_LIB_SHA256_GENERIC</div><div class='add'>+</div><div class='ctx'> endif # CPU_CAVIUM_OCTEON</div><div class='ctx'> </div><div class='ctx'> if CAVIUM_OCTEON_SOC</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-md5.c b/arch/mips/cavium-octeon/crypto/octeon-md5.c<br/>index 5ee4ade99b99..fbc84eb7fedf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-md5.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-md5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/cavium-octeon/crypto/octeon-md5.c</a></div><div class='hunk'>@@ -19,22 +19,26 @@</div><div class='ctx'>  * any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/octeon/octeon.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/md5.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "octeon-crypto.h"</div><div class='ctx'> </div><div class='add'>+struct octeon_md5_state {</div><div class='add'>+	__le32 hash[MD5_HASH_WORDS];</div><div class='add'>+	u64 byte_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * We pass everything as 64-bit. OCTEON can handle misaligned data.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void octeon_md5_store_hash(struct md5_state *ctx)</div><div class='add'>+static void octeon_md5_store_hash(struct octeon_md5_state *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	u64 *hash = (u64 *)ctx-&gt;hash;</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +46,7 @@ static void octeon_md5_store_hash(struct md5_state *ctx)</div><div class='ctx'> 	write_octeon_64bit_hash_dword(hash[1], 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void octeon_md5_read_hash(struct md5_state *ctx)</div><div class='add'>+static void octeon_md5_read_hash(struct octeon_md5_state *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	u64 *hash = (u64 *)ctx-&gt;hash;</div><div class='ctx'> </div><div class='hunk'>@@ -66,13 +70,12 @@ static void octeon_md5_transform(const void *_block)</div><div class='ctx'> </div><div class='ctx'> static int octeon_md5_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='add'>+	struct octeon_md5_state *mctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	mctx-&gt;hash[0] = MD5_H0;</div><div class='del'>-	mctx-&gt;hash[1] = MD5_H1;</div><div class='del'>-	mctx-&gt;hash[2] = MD5_H2;</div><div class='del'>-	mctx-&gt;hash[3] = MD5_H3;</div><div class='del'>-	cpu_to_le32_array(mctx-&gt;hash, 4);</div><div class='add'>+	mctx-&gt;hash[0] = cpu_to_le32(MD5_H0);</div><div class='add'>+	mctx-&gt;hash[1] = cpu_to_le32(MD5_H1);</div><div class='add'>+	mctx-&gt;hash[2] = cpu_to_le32(MD5_H2);</div><div class='add'>+	mctx-&gt;hash[3] = cpu_to_le32(MD5_H3);</div><div class='ctx'> 	mctx-&gt;byte_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -81,52 +84,38 @@ static int octeon_md5_init(struct shash_desc *desc)</div><div class='ctx'> static int octeon_md5_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			     unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='del'>-	const u32 avail = sizeof(mctx-&gt;block) - (mctx-&gt;byte_count &amp; 0x3f);</div><div class='add'>+	struct octeon_md5_state *mctx = shash_desc_ctx(desc);</div><div class='ctx'> 	struct octeon_cop2_state state;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	mctx-&gt;byte_count += len;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		memcpy((char *)mctx-&gt;block + (sizeof(mctx-&gt;block) - avail),</div><div class='del'>-		       data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)mctx-&gt;block + (sizeof(mctx-&gt;block) - avail), data,</div><div class='del'>-	       avail);</div><div class='del'>-</div><div class='ctx'> 	flags = octeon_crypto_enable(&amp;state);</div><div class='ctx'> 	octeon_md5_store_hash(mctx);</div><div class='ctx'> </div><div class='del'>-	octeon_md5_transform(mctx-&gt;block);</div><div class='del'>-	data += avail;</div><div class='del'>-	len -= avail;</div><div class='del'>-</div><div class='del'>-	while (len &gt;= sizeof(mctx-&gt;block)) {</div><div class='add'>+	do {</div><div class='ctx'> 		octeon_md5_transform(data);</div><div class='del'>-		data += sizeof(mctx-&gt;block);</div><div class='del'>-		len -= sizeof(mctx-&gt;block);</div><div class='del'>-	}</div><div class='add'>+		data += MD5_HMAC_BLOCK_SIZE;</div><div class='add'>+		len -= MD5_HMAC_BLOCK_SIZE;</div><div class='add'>+	} while (len &gt;= MD5_HMAC_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	octeon_md5_read_hash(mctx);</div><div class='ctx'> 	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	memcpy(mctx-&gt;block, data, len);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	mctx-&gt;byte_count -= len;</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int octeon_md5_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int octeon_md5_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			    unsigned int offset, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = mctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	char *p = (char *)mctx-&gt;block + offset;</div><div class='add'>+	struct octeon_md5_state *mctx = shash_desc_ctx(desc);</div><div class='ctx'> 	int padding = 56 - (offset + 1);</div><div class='ctx'> 	struct octeon_cop2_state state;</div><div class='add'>+	u32 block[MD5_BLOCK_WORDS];</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	char *p;</div><div class='ctx'> </div><div class='add'>+	p = memcpy(block, src, offset);</div><div class='add'>+	p += offset;</div><div class='ctx'> 	*p++ = 0x80;</div><div class='ctx'> </div><div class='ctx'> 	flags = octeon_crypto_enable(&amp;state);</div><div class='hunk'>@@ -134,39 +123,56 @@ static int octeon_md5_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> </div><div class='ctx'> 	if (padding &lt; 0) {</div><div class='ctx'> 		memset(p, 0x00, padding + sizeof(u64));</div><div class='del'>-		octeon_md5_transform(mctx-&gt;block);</div><div class='del'>-		p = (char *)mctx-&gt;block;</div><div class='add'>+		octeon_md5_transform(block);</div><div class='add'>+		p = (char *)block;</div><div class='ctx'> 		padding = 56;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memset(p, 0, padding);</div><div class='del'>-	mctx-&gt;block[14] = mctx-&gt;byte_count &lt;&lt; 3;</div><div class='del'>-	mctx-&gt;block[15] = mctx-&gt;byte_count &gt;&gt; 29;</div><div class='del'>-	cpu_to_le32_array(mctx-&gt;block + 14, 2);</div><div class='del'>-	octeon_md5_transform(mctx-&gt;block);</div><div class='add'>+	mctx-&gt;byte_count += offset;</div><div class='add'>+	block[14] = mctx-&gt;byte_count &lt;&lt; 3;</div><div class='add'>+	block[15] = mctx-&gt;byte_count &gt;&gt; 29;</div><div class='add'>+	cpu_to_le32_array(block + 14, 2);</div><div class='add'>+	octeon_md5_transform(block);</div><div class='ctx'> </div><div class='ctx'> 	octeon_md5_read_hash(mctx);</div><div class='ctx'> 	octeon_crypto_disable(&amp;state, flags);</div><div class='ctx'> </div><div class='add'>+	memzero_explicit(block, sizeof(block));</div><div class='ctx'> 	memcpy(out, mctx-&gt;hash, sizeof(mctx-&gt;hash));</div><div class='del'>-	memset(mctx, 0, sizeof(*mctx));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int octeon_md5_export(struct shash_desc *desc, void *out)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, ctx, sizeof(*ctx));</div><div class='add'>+	struct octeon_md5_state *ctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		u8 *u8;</div><div class='add'>+		u32 *u32;</div><div class='add'>+		u64 *u64;</div><div class='add'>+	} p = { .u8 = out };</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MD5_HASH_WORDS; i++)</div><div class='add'>+		put_unaligned(le32_to_cpu(ctx-&gt;hash[i]), p.u32++);</div><div class='add'>+	put_unaligned(ctx-&gt;byte_count, p.u64);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int octeon_md5_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(ctx, in, sizeof(*ctx));</div><div class='add'>+	struct octeon_md5_state *ctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		const u8 *u8;</div><div class='add'>+		const u32 *u32;</div><div class='add'>+		const u64 *u64;</div><div class='add'>+	} p = { .u8 = in };</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MD5_HASH_WORDS; i++)</div><div class='add'>+		ctx-&gt;hash[i] = cpu_to_le32(get_unaligned(p.u32++));</div><div class='add'>+	ctx-&gt;byte_count = get_unaligned(p.u64);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -174,15 +180,16 @@ static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	MD5_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	octeon_md5_init,</div><div class='ctx'> 	.update		=	octeon_md5_update,</div><div class='del'>-	.final		=	octeon_md5_final,</div><div class='add'>+	.finup		=	octeon_md5_finup,</div><div class='ctx'> 	.export		=	octeon_md5_export,</div><div class='ctx'> 	.import		=	octeon_md5_import,</div><div class='del'>-	.descsize	=	sizeof(struct md5_state),</div><div class='del'>-	.statesize	=	sizeof(struct md5_state),</div><div class='add'>+	.statesize	=	MD5_STATE_SIZE,</div><div class='add'>+	.descsize	=	sizeof(struct octeon_md5_state),</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"md5",</div><div class='ctx'> 		.cra_driver_name=	"octeon-md5",</div><div class='ctx'> 		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	MD5_HMAC_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha1.c b/arch/mips/cavium-octeon/crypto/octeon-sha1.c<br/>index 37a07b3c4568..e70f21a473da 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-sha1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/cavium-octeon/crypto/octeon-sha1.c</a></div><div class='hunk'>@@ -13,15 +13,13 @@</div><div class='ctx'>  * Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;asm/octeon/octeon.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "octeon-crypto.h"</div><div class='ctx'> </div><div class='hunk'>@@ -58,49 +56,23 @@ static void octeon_sha1_read_hash(struct sha1_state *sctx)</div><div class='ctx'> 	memzero_explicit(&amp;hash_tail.dword, sizeof(hash_tail.dword));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void octeon_sha1_transform(const void *_block)</div><div class='add'>+static void octeon_sha1_transform(struct sha1_state *sctx, const u8 *src,</div><div class='add'>+				  int blocks)</div><div class='ctx'> {</div><div class='del'>-	const u64 *block = _block;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_block_dword(block[0], 0);</div><div class='del'>-	write_octeon_64bit_block_dword(block[1], 1);</div><div class='del'>-	write_octeon_64bit_block_dword(block[2], 2);</div><div class='del'>-	write_octeon_64bit_block_dword(block[3], 3);</div><div class='del'>-	write_octeon_64bit_block_dword(block[4], 4);</div><div class='del'>-	write_octeon_64bit_block_dword(block[5], 5);</div><div class='del'>-	write_octeon_64bit_block_dword(block[6], 6);</div><div class='del'>-	octeon_sha1_start(block[7]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __octeon_sha1_update(struct sha1_state *sctx, const u8 *data,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int partial;</div><div class='del'>-	unsigned int done;</div><div class='del'>-	const u8 *src;</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count % SHA1_BLOCK_SIZE;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt;= SHA1_BLOCK_SIZE) {</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buffer + partial, data,</div><div class='del'>-			       done + SHA1_BLOCK_SIZE);</div><div class='del'>-			src = sctx-&gt;buffer;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			octeon_sha1_transform(src);</div><div class='del'>-			done += SHA1_BLOCK_SIZE;</div><div class='del'>-			src = data + done;</div><div class='del'>-		} while (done + SHA1_BLOCK_SIZE &lt;= len);</div><div class='del'>-</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy(sctx-&gt;buffer + partial, src, len - done);</div><div class='add'>+	do {</div><div class='add'>+		const u64 *block = (const u64 *)src;</div><div class='add'>+</div><div class='add'>+		write_octeon_64bit_block_dword(block[0], 0);</div><div class='add'>+		write_octeon_64bit_block_dword(block[1], 1);</div><div class='add'>+		write_octeon_64bit_block_dword(block[2], 2);</div><div class='add'>+		write_octeon_64bit_block_dword(block[3], 3);</div><div class='add'>+		write_octeon_64bit_block_dword(block[4], 4);</div><div class='add'>+		write_octeon_64bit_block_dword(block[5], 5);</div><div class='add'>+		write_octeon_64bit_block_dword(block[6], 6);</div><div class='add'>+		octeon_sha1_start(block[7]);</div><div class='add'>+</div><div class='add'>+		src += SHA1_BLOCK_SIZE;</div><div class='add'>+	} while (--blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int octeon_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='hunk'>@@ -109,95 +81,47 @@ static int octeon_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='ctx'> 	struct octeon_cop2_state state;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Small updates never reach the crypto engine, so the generic sha1 is</div><div class='del'>-	 * faster because of the heavyweight octeon_crypto_enable() /</div><div class='del'>-	 * octeon_crypto_disable().</div><div class='del'>-	 */</div><div class='del'>-	if ((sctx-&gt;count % SHA1_BLOCK_SIZE) + len &lt; SHA1_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha1_update(desc, data, len);</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	flags = octeon_crypto_enable(&amp;state);</div><div class='ctx'> 	octeon_sha1_store_hash(sctx);</div><div class='ctx'> </div><div class='del'>-	__octeon_sha1_update(sctx, data, len);</div><div class='add'>+	remain = sha1_base_do_update_blocks(desc, data, len,</div><div class='add'>+					    octeon_sha1_transform);</div><div class='ctx'> </div><div class='ctx'> 	octeon_sha1_read_hash(sctx);</div><div class='ctx'> 	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int octeon_sha1_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int octeon_sha1_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			     unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='ctx'> 	struct octeon_cop2_state state;</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	unsigned int pad_len;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Save number of bits. */</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64. */</div><div class='del'>-	index = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	pad_len = (index &lt; 56) ? (56 - index) : ((64+56) - index);</div><div class='ctx'> </div><div class='ctx'> 	flags = octeon_crypto_enable(&amp;state);</div><div class='ctx'> 	octeon_sha1_store_hash(sctx);</div><div class='ctx'> </div><div class='del'>-	__octeon_sha1_update(sctx, padding, pad_len);</div><div class='del'>-</div><div class='del'>-	/* Append length (before padding). */</div><div class='del'>-	__octeon_sha1_update(sctx, (const u8 *)&amp;bits, sizeof(bits));</div><div class='add'>+	sha1_base_do_finup(desc, src, len, octeon_sha1_transform);</div><div class='ctx'> </div><div class='ctx'> 	octeon_sha1_read_hash(sctx);</div><div class='ctx'> 	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 5; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Zeroize sensitive information. */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha1_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha1_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='add'>+	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg octeon_sha1_alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	octeon_sha1_update,</div><div class='del'>-	.final		=	octeon_sha1_final,</div><div class='del'>-	.export		=	octeon_sha1_export,</div><div class='del'>-	.import		=	octeon_sha1_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='add'>+	.finup		=	octeon_sha1_finup,</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name=	"octeon-sha1",</div><div class='ctx'> 		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha256.c b/arch/mips/cavium-octeon/crypto/octeon-sha256.c<br/>index 435e4a6e7f13..f93faaf1f4af 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha256.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-sha256.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/cavium-octeon/crypto/octeon-sha256.c</a></div><div class='hunk'>@@ -1,8 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * SHA-224 and SHA-256 Secure Hash Algorithm.</div><div class='add'>+ * SHA-256 Secure Hash Algorithm.</div><div class='ctx'>  *</div><div class='ctx'>  * Adapted for OCTEON by Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;.</div><div class='ctx'>  *</div><div class='hunk'>@@ -14,15 +12,10 @@</div><div class='ctx'>  * SHA224 Support Copyright 2007 Intel Corporation &lt;jonathan.lynch@intel.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='ctx'> #include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "octeon-crypto.h"</div><div class='ctx'> </div><div class='hunk'>@@ -30,212 +23,51 @@</div><div class='ctx'>  * We pass everything as 64-bit. OCTEON can handle misaligned data.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void octeon_sha256_store_hash(struct sha256_state *sctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)sctx-&gt;state;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[0], 0);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[1], 1);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[2], 2);</div><div class='del'>-	write_octeon_64bit_hash_dword(hash[3], 3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha256_read_hash(struct sha256_state *sctx)</div><div class='del'>-{</div><div class='del'>-	u64 *hash = (u64 *)sctx-&gt;state;</div><div class='del'>-</div><div class='del'>-	hash[0] = read_octeon_64bit_hash_dword(0);</div><div class='del'>-	hash[1] = read_octeon_64bit_hash_dword(1);</div><div class='del'>-	hash[2] = read_octeon_64bit_hash_dword(2);</div><div class='del'>-	hash[3] = read_octeon_64bit_hash_dword(3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void octeon_sha256_transform(const void *_block)</div><div class='del'>-{</div><div class='del'>-	const u64 *block = _block;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_block_dword(block[0], 0);</div><div class='del'>-	write_octeon_64bit_block_dword(block[1], 1);</div><div class='del'>-	write_octeon_64bit_block_dword(block[2], 2);</div><div class='del'>-	write_octeon_64bit_block_dword(block[3], 3);</div><div class='del'>-	write_octeon_64bit_block_dword(block[4], 4);</div><div class='del'>-	write_octeon_64bit_block_dword(block[5], 5);</div><div class='del'>-	write_octeon_64bit_block_dword(block[6], 6);</div><div class='del'>-	octeon_sha256_start(block[7]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __octeon_sha256_update(struct sha256_state *sctx, const u8 *data,</div><div class='del'>-				   unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int partial;</div><div class='del'>-	unsigned int done;</div><div class='del'>-	const u8 *src;</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count % SHA256_BLOCK_SIZE;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt;= SHA256_BLOCK_SIZE) {</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buf + partial, data,</div><div class='del'>-			       done + SHA256_BLOCK_SIZE);</div><div class='del'>-			src = sctx-&gt;buf;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			octeon_sha256_transform(src);</div><div class='del'>-			done += SHA256_BLOCK_SIZE;</div><div class='del'>-			src = data + done;</div><div class='del'>-		} while (done + SHA256_BLOCK_SIZE &lt;= len);</div><div class='del'>-</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy(sctx-&gt;buf + partial, src, len - done);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Small updates never reach the crypto engine, so the generic sha256 is</div><div class='del'>-	 * faster because of the heavyweight octeon_crypto_enable() /</div><div class='del'>-	 * octeon_crypto_disable().</div><div class='del'>-	 */</div><div class='del'>-	if ((sctx-&gt;count % SHA256_BLOCK_SIZE) + len &lt; SHA256_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha256_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha256_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha256_update(sctx, data, len);</div><div class='del'>-</div><div class='del'>-	octeon_sha256_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='ctx'> {</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-	struct octeon_cop2_state state;</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	unsigned int pad_len;</div><div class='add'>+	struct octeon_cop2_state cop2_state;</div><div class='add'>+	u64 *state64 = (u64 *)state;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Save number of bits. */</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64. */</div><div class='del'>-	index = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	pad_len = (index &lt; 56) ? (56 - index) : ((64+56) - index);</div><div class='del'>-</div><div class='del'>-	flags = octeon_crypto_enable(&amp;state);</div><div class='del'>-	octeon_sha256_store_hash(sctx);</div><div class='del'>-</div><div class='del'>-	__octeon_sha256_update(sctx, padding, pad_len);</div><div class='del'>-</div><div class='del'>-	/* Append length (before padding). */</div><div class='del'>-	__octeon_sha256_update(sctx, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	octeon_sha256_read_hash(sctx);</div><div class='del'>-	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Zeroize sensitive information. */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha224_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	u8 D[SHA256_DIGEST_SIZE];</div><div class='del'>-</div><div class='del'>-	octeon_sha256_final(desc, D);</div><div class='ctx'> </div><div class='del'>-	memcpy(hash, D, SHA224_DIGEST_SIZE);</div><div class='del'>-	memzero_explicit(D, SHA256_DIGEST_SIZE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha256_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg octeon_sha256_algs[2] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	octeon_sha256_update,</div><div class='del'>-	.final		=	octeon_sha256_final,</div><div class='del'>-	.export		=	octeon_sha256_export,</div><div class='del'>-	.import		=	octeon_sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name=	"octeon-sha256",</div><div class='del'>-		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	octeon_sha256_update,</div><div class='del'>-	.final		=	octeon_sha224_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name=	"octeon-sha224",</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init octeon_sha256_mod_init(void)</div><div class='del'>-{</div><div class='ctx'> 	if (!octeon_has_crypto())</div><div class='del'>-		return -ENOTSUPP;</div><div class='del'>-	return crypto_register_shashes(octeon_sha256_algs,</div><div class='del'>-				       ARRAY_SIZE(octeon_sha256_algs));</div><div class='add'>+		return sha256_blocks_generic(state, data, nblocks);</div><div class='add'>+</div><div class='add'>+	flags = octeon_crypto_enable(&amp;cop2_state);</div><div class='add'>+	write_octeon_64bit_hash_dword(state64[0], 0);</div><div class='add'>+	write_octeon_64bit_hash_dword(state64[1], 1);</div><div class='add'>+	write_octeon_64bit_hash_dword(state64[2], 2);</div><div class='add'>+	write_octeon_64bit_hash_dword(state64[3], 3);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		const u64 *block = (const u64 *)data;</div><div class='add'>+</div><div class='add'>+		write_octeon_64bit_block_dword(block[0], 0);</div><div class='add'>+		write_octeon_64bit_block_dword(block[1], 1);</div><div class='add'>+		write_octeon_64bit_block_dword(block[2], 2);</div><div class='add'>+		write_octeon_64bit_block_dword(block[3], 3);</div><div class='add'>+		write_octeon_64bit_block_dword(block[4], 4);</div><div class='add'>+		write_octeon_64bit_block_dword(block[5], 5);</div><div class='add'>+		write_octeon_64bit_block_dword(block[6], 6);</div><div class='add'>+		octeon_sha256_start(block[7]);</div><div class='add'>+</div><div class='add'>+		data += SHA256_BLOCK_SIZE;</div><div class='add'>+	} while (--nblocks);</div><div class='add'>+</div><div class='add'>+	state64[0] = read_octeon_64bit_hash_dword(0);</div><div class='add'>+	state64[1] = read_octeon_64bit_hash_dword(1);</div><div class='add'>+	state64[2] = read_octeon_64bit_hash_dword(2);</div><div class='add'>+	state64[3] = read_octeon_64bit_hash_dword(3);</div><div class='add'>+	octeon_crypto_disable(&amp;cop2_state, flags);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='ctx'> </div><div class='del'>-static void __exit octeon_sha256_mod_fini(void)</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_shashes(octeon_sha256_algs,</div><div class='del'>-				  ARRAY_SIZE(octeon_sha256_algs));</div><div class='add'>+	return octeon_has_crypto();</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-module_init(octeon_sha256_mod_init);</div><div class='del'>-module_exit(octeon_sha256_mod_fini);</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm (OCTEON)");</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 Secure Hash Algorithm (OCTEON)");</div><div class='ctx'> MODULE_AUTHOR("Aaro Koskinen &lt;aaro.koskinen@iki.fi&gt;");</div><div class='head'>diff --git a/arch/mips/cavium-octeon/crypto/octeon-sha512.c b/arch/mips/cavium-octeon/crypto/octeon-sha512.c<br/>index 2dee9354e33f..215311053db3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha512.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/crypto/octeon-sha512.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/crypto/octeon-sha512.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/cavium-octeon/crypto/octeon-sha512.c</a></div><div class='hunk'>@@ -13,15 +13,12 @@</div><div class='ctx'>  * Copyright (c) 2003 Kyle McMartin &lt;kyle@debian.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;asm/octeon/octeon.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/octeon/octeon.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "octeon-crypto.h"</div><div class='ctx'> </div><div class='hunk'>@@ -53,60 +50,31 @@ static void octeon_sha512_read_hash(struct sha512_state *sctx)</div><div class='ctx'> 	sctx-&gt;state[7] = read_octeon_64bit_hash_sha512(7);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void octeon_sha512_transform(const void *_block)</div><div class='add'>+static void octeon_sha512_transform(struct sha512_state *sctx,</div><div class='add'>+				    const u8 *src, int blocks)</div><div class='ctx'> {</div><div class='del'>-	const u64 *block = _block;</div><div class='del'>-</div><div class='del'>-	write_octeon_64bit_block_sha512(block[0], 0);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[1], 1);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[2], 2);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[3], 3);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[4], 4);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[5], 5);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[6], 6);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[7], 7);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[8], 8);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[9], 9);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[10], 10);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[11], 11);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[12], 12);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[13], 13);</div><div class='del'>-	write_octeon_64bit_block_sha512(block[14], 14);</div><div class='del'>-	octeon_sha512_start(block[15]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __octeon_sha512_update(struct sha512_state *sctx, const u8 *data,</div><div class='del'>-				   unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int part_len;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	/* Compute number of bytes mod 128. */</div><div class='del'>-	index = sctx-&gt;count[0] % SHA512_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Update number of bytes. */</div><div class='del'>-	if ((sctx-&gt;count[0] += len) &lt; len)</div><div class='del'>-		sctx-&gt;count[1]++;</div><div class='del'>-</div><div class='del'>-	part_len = SHA512_BLOCK_SIZE - index;</div><div class='del'>-</div><div class='del'>-	/* Transform as many times as possible. */</div><div class='del'>-	if (len &gt;= part_len) {</div><div class='del'>-		memcpy(&amp;sctx-&gt;buf[index], data, part_len);</div><div class='del'>-		octeon_sha512_transform(sctx-&gt;buf);</div><div class='del'>-</div><div class='del'>-		for (i = part_len; i + SHA512_BLOCK_SIZE &lt;= len;</div><div class='del'>-			i += SHA512_BLOCK_SIZE)</div><div class='del'>-			octeon_sha512_transform(&amp;data[i]);</div><div class='del'>-</div><div class='del'>-		index = 0;</div><div class='del'>-	} else {</div><div class='del'>-		i = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Buffer remaining input. */</div><div class='del'>-	memcpy(&amp;sctx-&gt;buf[index], &amp;data[i], len - i);</div><div class='add'>+	do {</div><div class='add'>+		const u64 *block = (const u64 *)src;</div><div class='add'>+</div><div class='add'>+		write_octeon_64bit_block_sha512(block[0], 0);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[1], 1);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[2], 2);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[3], 3);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[4], 4);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[5], 5);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[6], 6);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[7], 7);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[8], 8);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[9], 9);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[10], 10);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[11], 11);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[12], 12);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[13], 13);</div><div class='add'>+		write_octeon_64bit_block_sha512(block[14], 14);</div><div class='add'>+		octeon_sha512_start(block[15]);</div><div class='add'>+</div><div class='add'>+		src += SHA512_BLOCK_SIZE;</div><div class='add'>+	} while (--blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int octeon_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='hunk'>@@ -115,89 +83,48 @@ static int octeon_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='ctx'> 	struct octeon_cop2_state state;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Small updates never reach the crypto engine, so the generic sha512 is</div><div class='del'>-	 * faster because of the heavyweight octeon_crypto_enable() /</div><div class='del'>-	 * octeon_crypto_disable().</div><div class='del'>-	 */</div><div class='del'>-	if ((sctx-&gt;count[0] % SHA512_BLOCK_SIZE) + len &lt; SHA512_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha512_update(desc, data, len);</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	flags = octeon_crypto_enable(&amp;state);</div><div class='ctx'> 	octeon_sha512_store_hash(sctx);</div><div class='ctx'> </div><div class='del'>-	__octeon_sha512_update(sctx, data, len);</div><div class='add'>+	remain = sha512_base_do_update_blocks(desc, data, len,</div><div class='add'>+					      octeon_sha512_transform);</div><div class='ctx'> </div><div class='ctx'> 	octeon_sha512_read_hash(sctx);</div><div class='ctx'> 	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int octeon_sha512_final(struct shash_desc *desc, u8 *hash)</div><div class='add'>+static int octeon_sha512_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			       unsigned int len, u8 *hash)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	static u8 padding[128] = { 0x80, };</div><div class='ctx'> 	struct octeon_cop2_state state;</div><div class='del'>-	__be64 *dst = (__be64 *)hash;</div><div class='del'>-	unsigned int pad_len;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	__be64 bits[2];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Save number of bits. */</div><div class='del'>-	bits[1] = cpu_to_be64(sctx-&gt;count[0] &lt;&lt; 3);</div><div class='del'>-	bits[0] = cpu_to_be64(sctx-&gt;count[1] &lt;&lt; 3 | sctx-&gt;count[0] &gt;&gt; 61);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 112 mod 128. */</div><div class='del'>-	index = sctx-&gt;count[0] &amp; 0x7f;</div><div class='del'>-	pad_len = (index &lt; 112) ? (112 - index) : ((128+112) - index);</div><div class='ctx'> </div><div class='ctx'> 	flags = octeon_crypto_enable(&amp;state);</div><div class='ctx'> 	octeon_sha512_store_hash(sctx);</div><div class='ctx'> </div><div class='del'>-	__octeon_sha512_update(sctx, padding, pad_len);</div><div class='del'>-</div><div class='del'>-	/* Append length (before padding). */</div><div class='del'>-	__octeon_sha512_update(sctx, (const u8 *)bits, sizeof(bits));</div><div class='add'>+	sha512_base_do_finup(desc, src, len, octeon_sha512_transform);</div><div class='ctx'> </div><div class='ctx'> 	octeon_sha512_read_hash(sctx);</div><div class='ctx'> 	octeon_crypto_disable(&amp;state, flags);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest. */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		dst[i] = cpu_to_be64(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Zeroize sensitive information. */</div><div class='del'>-	memset(sctx, 0, sizeof(struct sha512_state));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int octeon_sha384_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	u8 D[64];</div><div class='del'>-</div><div class='del'>-	octeon_sha512_final(desc, D);</div><div class='del'>-</div><div class='del'>-	memcpy(hash, D, 48);</div><div class='del'>-	memzero_explicit(D, 64);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sha512_base_finish(desc, hash);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg octeon_sha512_algs[2] = { {</div><div class='ctx'> 	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha512_base_init,</div><div class='ctx'> 	.update		=	octeon_sha512_update,</div><div class='del'>-	.final		=	octeon_sha512_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.finup		=	octeon_sha512_finup,</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha512",</div><div class='ctx'> 		.cra_driver_name=	"octeon-sha512",</div><div class='ctx'> 		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -205,12 +132,14 @@ static struct shash_alg octeon_sha512_algs[2] = { {</div><div class='ctx'> 	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha384_base_init,</div><div class='ctx'> 	.update		=	octeon_sha512_update,</div><div class='del'>-	.final		=	octeon_sha384_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.finup		=	octeon_sha512_finup,</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha384",</div><div class='ctx'> 		.cra_driver_name=	"octeon-sha384",</div><div class='ctx'> 		.cra_priority	=	OCTEON_CR_OPCODE_PRIORITY,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c<br/>index e6b4d9c0c169..5c3de175ef5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/octeon-irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/cavium-octeon/octeon-irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/cavium-octeon/octeon-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/cavium-octeon/octeon-irq.c</a></div><div class='hunk'>@@ -1503,8 +1503,8 @@ static int __init octeon_irq_init_ciu(</div><div class='ctx'> 	/* Mips internal */</div><div class='ctx'> 	octeon_irq_init_core();</div><div class='ctx'> </div><div class='del'>-	ciu_domain = irq_domain_add_tree(</div><div class='del'>-		ciu_node, &amp;octeon_irq_domain_ciu_ops, dd);</div><div class='add'>+	ciu_domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &amp;octeon_irq_domain_ciu_ops,</div><div class='add'>+					    dd);</div><div class='ctx'> 	irq_set_default_domain(ciu_domain);</div><div class='ctx'> </div><div class='ctx'> 	/* CIU_0 */</div><div class='hunk'>@@ -1637,8 +1637,8 @@ static int __init octeon_irq_init_gpio(</div><div class='ctx'> 	if (gpiod) {</div><div class='ctx'> 		/* gpio domain host_data is the base hwirq number. */</div><div class='ctx'> 		gpiod-&gt;base_hwirq = base_hwirq;</div><div class='del'>-		irq_domain_add_linear(</div><div class='del'>-			gpio_node, 16, &amp;octeon_irq_domain_gpio_ops, gpiod);</div><div class='add'>+		irq_domain_create_linear(of_fwnode_handle(gpio_node), 16,</div><div class='add'>+					 &amp;octeon_irq_domain_gpio_ops, gpiod);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_warn("Cannot allocate memory for GPIO irq_domain.\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2074,8 +2074,8 @@ static int __init octeon_irq_init_ciu2(</div><div class='ctx'> 	/* Mips internal */</div><div class='ctx'> 	octeon_irq_init_core();</div><div class='ctx'> </div><div class='del'>-	ciu_domain = irq_domain_add_tree(</div><div class='del'>-		ciu_node, &amp;octeon_irq_domain_ciu2_ops, NULL);</div><div class='add'>+	ciu_domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &amp;octeon_irq_domain_ciu2_ops,</div><div class='add'>+					    NULL);</div><div class='ctx'> 	irq_set_default_domain(ciu_domain);</div><div class='ctx'> </div><div class='ctx'> 	/* CUI2 */</div><div class='hunk'>@@ -2331,11 +2331,12 @@ static int __init octeon_irq_init_cib(struct device_node *ciu_node,</div><div class='ctx'> 	}</div><div class='ctx'> 	host_data-&gt;max_bits = val;</div><div class='ctx'> </div><div class='del'>-	cib_domain = irq_domain_add_linear(ciu_node, host_data-&gt;max_bits,</div><div class='del'>-					   &amp;octeon_irq_domain_cib_ops,</div><div class='del'>-					   host_data);</div><div class='add'>+	cib_domain = irq_domain_create_linear(of_fwnode_handle(ciu_node),</div><div class='add'>+					      host_data-&gt;max_bits,</div><div class='add'>+					      &amp;octeon_irq_domain_cib_ops,</div><div class='add'>+					      host_data);</div><div class='ctx'> 	if (!cib_domain) {</div><div class='del'>-		pr_err("ERROR: Couldn't irq_domain_add_linear()\n");</div><div class='add'>+		pr_err("ERROR: Couldn't irq_domain_create_linear()\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2918,8 +2919,8 @@ static int __init octeon_irq_init_ciu3(struct device_node *ciu_node,</div><div class='ctx'> 	 * Initialize all domains to use the default domain. Specific major</div><div class='ctx'> 	 * blocks will overwrite the default domain as needed.</div><div class='ctx'> 	 */</div><div class='del'>-	domain = irq_domain_add_tree(ciu_node, &amp;octeon_dflt_domain_ciu3_ops,</div><div class='del'>-				     ciu3_info);</div><div class='add'>+	domain = irq_domain_create_tree(of_fwnode_handle(ciu_node), &amp;octeon_dflt_domain_ciu3_ops,</div><div class='add'>+					ciu3_info);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_CIU3_DOMAINS; i++)</div><div class='ctx'> 		ciu3_info-&gt;domain[i] = domain;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/configs/ath79_defconfig b/arch/mips/configs/ath79_defconfig<br/>index 8caa03a41327..cba0b85c6707 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/ath79_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ath79_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/ath79_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/ath79_defconfig</a></div><div class='hunk'>@@ -82,7 +82,6 @@ CONFIG_LEDS_GPIO=y</div><div class='ctx'> # CONFIG_IOMMU_SUPPORT is not set</div><div class='ctx'> # CONFIG_DNOTIFY is not set</div><div class='ctx'> # CONFIG_PROC_PAGE_MONITOR is not set</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_SCHED_DEBUG is not set</div><div class='head'>diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig<br/>index fe282630b51c..97d2cd997285 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/bigsur_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/bigsur_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/bigsur_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/bigsur_defconfig</a></div><div class='hunk'>@@ -81,7 +81,6 @@ CONFIG_IP_VS_SH=m</div><div class='ctx'> CONFIG_IP_VS_SED=m</div><div class='ctx'> CONFIG_IP_VS_NQ=m</div><div class='ctx'> CONFIG_IP_VS_FTP=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_BRIDGE=m</div><div class='ctx'> CONFIG_VLAN_8021Q=m</div><div class='ctx'> CONFIG_VLAN_8021Q_GVRP=y</div><div class='hunk'>@@ -238,7 +237,6 @@ CONFIG_CRYPTO_SERPENT=m</div><div class='ctx'> CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_MEMORY_INIT=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/mips/configs/cavium_octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig<br/>index f523ee6f25bf..88ae0aa85364 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/cavium_octeon_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/cavium_octeon_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/cavium_octeon_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/cavium_octeon_defconfig</a></div><div class='hunk'>@@ -157,7 +157,6 @@ CONFIG_CRYPTO_CBC=y</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5_OCTEON=y</div><div class='ctx'> CONFIG_CRYPTO_SHA1_OCTEON=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_OCTEON=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_OCTEON=m</div><div class='ctx'> CONFIG_CRYPTO_DES=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/mips/configs/decstation_64_defconfig b/arch/mips/configs/decstation_64_defconfig<br/>index 9655567614aa..85a4472cb058 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/decstation_64_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/decstation_64_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/decstation_64_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/decstation_64_defconfig</a></div><div class='hunk'>@@ -168,7 +168,6 @@ CONFIG_NLS_ISO8859_14=m</div><div class='ctx'> CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='head'>diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig<br/>index 1539fe8eb34d..a3b2c8da2dde 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/decstation_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/decstation_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/decstation_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/decstation_defconfig</a></div><div class='hunk'>@@ -163,7 +163,6 @@ CONFIG_NLS_ISO8859_14=m</div><div class='ctx'> CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='head'>diff --git a/arch/mips/configs/decstation_r4k_defconfig b/arch/mips/configs/decstation_r4k_defconfig<br/>index 58c36720c94a..a476717b8a6a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/decstation_r4k_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/decstation_r4k_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/decstation_r4k_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/decstation_r4k_defconfig</a></div><div class='hunk'>@@ -163,7 +163,6 @@ CONFIG_NLS_ISO8859_14=m</div><div class='ctx'> CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_CRYPTO_RSA=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20POLY1305=m</div><div class='head'>diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig<br/>index 5ab149cd3178..114fcd67898d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/fuloong2e_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/fuloong2e_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/fuloong2e_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/fuloong2e_defconfig</a></div><div class='hunk'>@@ -218,4 +218,3 @@ CONFIG_CRYPTO_SEED=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='head'>diff --git a/arch/mips/configs/gcw0_defconfig b/arch/mips/configs/gcw0_defconfig<br/>index bc1ef66e3999..8b7ad877e07a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/gcw0_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/gcw0_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/gcw0_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/gcw0_defconfig</a></div><div class='hunk'>@@ -13,7 +13,6 @@ CONFIG_MIPS_CMDLINE_DTB_EXTEND=y</div><div class='ctx'> CONFIG_MODULES=y</div><div class='ctx'> CONFIG_MODULE_UNLOAD=y</div><div class='ctx'> # CONFIG_BLK_DEV_BSG is not set</div><div class='del'>-# CONFIG_BOUNCE is not set</div><div class='ctx'> CONFIG_NET=y</div><div class='ctx'> CONFIG_PACKET=y</div><div class='ctx'> CONFIG_UNIX=y</div><div class='head'>diff --git a/arch/mips/configs/gpr_defconfig b/arch/mips/configs/gpr_defconfig<br/>index 12f3eed8a946..437ef6dc0b4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/gpr_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/gpr_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/gpr_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/gpr_defconfig</a></div><div class='hunk'>@@ -84,7 +84,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_TIPC=m</div><div class='ctx'> CONFIG_ATM=y</div><div class='hunk'>@@ -273,7 +272,7 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_850=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_CRYPTO_AUTHENC=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_MD4=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='head'>diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig<br/>index 31ca93d3acc5..f1a8ccf2c459 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/ip22_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip22_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/ip22_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/ip22_defconfig</a></div><div class='hunk'>@@ -326,5 +326,4 @@ CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_DEBUG_MEMORY_INIT=y</div><div class='head'>diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig<br/>index b8907b3d7a33..5d079941fd20 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/ip27_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip27_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/ip27_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/ip27_defconfig</a></div><div class='hunk'>@@ -317,4 +317,3 @@ CONFIG_CRYPTO_SERPENT=m</div><div class='ctx'> CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='head'>diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig<br/>index e0040110a3ee..6db21e498faa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/ip28_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip28_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/ip28_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/ip28_defconfig</a></div><div class='hunk'>@@ -60,6 +60,5 @@ CONFIG_TMPFS_POSIX_ACL=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V3_ACL=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/mips/configs/ip30_defconfig b/arch/mips/configs/ip30_defconfig<br/>index 270181a7320a..a4524e785469 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/ip30_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip30_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/ip30_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/ip30_defconfig</a></div><div class='hunk'>@@ -179,4 +179,3 @@ CONFIG_CRYPTO_RMD160=m</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_XCBC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='head'>diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig<br/>index 121e7e48fa77..d8ac11427f69 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/ip32_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/ip32_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/ip32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/ip32_defconfig</a></div><div class='hunk'>@@ -177,7 +177,6 @@ CONFIG_CRYPTO_SERPENT=y</div><div class='ctx'> CONFIG_CRYPTO_TEA=y</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_FONT_8x8=y</div><div class='ctx'> CONFIG_FONT_8x16=y</div><div class='head'>diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig<br/>index 71d6340497c9..5038a27d035f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/lemote2f_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/lemote2f_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/lemote2f_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/lemote2f_defconfig</a></div><div class='hunk'>@@ -297,7 +297,7 @@ CONFIG_NLS_KOI8_R=m</div><div class='ctx'> CONFIG_NLS_KOI8_U=m</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAMELLIA=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='head'>diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig<br/>index 06b7a0b97eca..e4bcdb64df6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/mtx1_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/mtx1_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/mtx1_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/mtx1_defconfig</a></div><div class='hunk'>@@ -130,7 +130,6 @@ CONFIG_BRIDGE_EBT_MARK_T=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_IP_SCTP=m</div><div class='ctx'> CONFIG_TIPC=m</div><div class='ctx'> CONFIG_ATM=y</div><div class='hunk'>@@ -662,7 +661,7 @@ CONFIG_NLS_ISO8859_15=m</div><div class='ctx'> CONFIG_NLS_KOI8_R=m</div><div class='ctx'> CONFIG_NLS_KOI8_U=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='head'>diff --git a/arch/mips/configs/omega2p_defconfig b/arch/mips/configs/omega2p_defconfig<br/>index 128f9abab7fc..e2bcdfd290a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/omega2p_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/omega2p_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/omega2p_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/omega2p_defconfig</a></div><div class='hunk'>@@ -111,7 +111,6 @@ CONFIG_NLS_KOI8_U=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='ctx'> CONFIG_XZ_DEC=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig<br/>index 0261969a6e45..9fb114ef5e2d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/rb532_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/rb532_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/rb532_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/rb532_defconfig</a></div><div class='hunk'>@@ -153,7 +153,6 @@ CONFIG_JFFS2_FS=y</div><div class='ctx'> CONFIG_JFFS2_SUMMARY=y</div><div class='ctx'> CONFIG_JFFS2_COMPRESSION_OPTIONS=y</div><div class='ctx'> CONFIG_SQUASHFS=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=m</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='head'>diff --git a/arch/mips/configs/rt305x_defconfig b/arch/mips/configs/rt305x_defconfig<br/>index 8404e0a9d8b2..8f9701efef19 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/rt305x_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/rt305x_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/rt305x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/rt305x_defconfig</a></div><div class='hunk'>@@ -128,7 +128,6 @@ CONFIG_SQUASHFS=y</div><div class='ctx'> # CONFIG_SQUASHFS_ZLIB is not set</div><div class='ctx'> CONFIG_SQUASHFS_XZ=y</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> # CONFIG_XZ_DEC_X86 is not set</div><div class='ctx'> # CONFIG_XZ_DEC_POWERPC is not set</div><div class='ctx'> # CONFIG_XZ_DEC_IA64 is not set</div><div class='head'>diff --git a/arch/mips/configs/sb1250_swarm_defconfig b/arch/mips/configs/sb1250_swarm_defconfig<br/>index ce855b644bb0..ae2afff00e01 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/sb1250_swarm_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/sb1250_swarm_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/sb1250_swarm_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/sb1250_swarm_defconfig</a></div><div class='hunk'>@@ -99,4 +99,3 @@ CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=m</div><div class='head'>diff --git a/arch/mips/configs/vocore2_defconfig b/arch/mips/configs/vocore2_defconfig<br/>index 917967fed45f..2a9a9b12847d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/vocore2_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/vocore2_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/vocore2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/vocore2_defconfig</a></div><div class='hunk'>@@ -111,7 +111,6 @@ CONFIG_NLS_KOI8_U=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='ctx'> CONFIG_XZ_DEC=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='head'>diff --git a/arch/mips/configs/xway_defconfig b/arch/mips/configs/xway_defconfig<br/>index 7b91edfe3e07..aae8497b6872 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/configs/xway_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/configs/xway_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/configs/xway_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/configs/xway_defconfig</a></div><div class='hunk'>@@ -140,7 +140,6 @@ CONFIG_SQUASHFS=y</div><div class='ctx'> # CONFIG_SQUASHFS_ZLIB is not set</div><div class='ctx'> CONFIG_SQUASHFS_XZ=y</div><div class='ctx'> CONFIG_CRYPTO_ARC4=m</div><div class='del'>-CONFIG_CRC_ITU_T=m</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/mips/crypto/Kconfig b/arch/mips/crypto/Kconfig<br/>index 545fc0e12422..6bf073ae7613 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/crypto/Kconfig</a></div><div class='hunk'>@@ -2,17 +2,6 @@</div><div class='ctx'> </div><div class='ctx'> menu "Accelerated Cryptographic Algorithms for CPU (mips)"</div><div class='ctx'> </div><div class='del'>-config CRYPTO_POLY1305_MIPS</div><div class='del'>-	tristate</div><div class='del'>-	depends on MIPS</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='del'>-	default CRYPTO_LIB_POLY1305_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: mips</div><div class='del'>-</div><div class='ctx'> config CRYPTO_MD5_OCTEON</div><div class='ctx'> 	tristate "Digests: MD5 (OCTEON)"</div><div class='ctx'> 	depends on CPU_CAVIUM_OCTEON</div><div class='hunk'>@@ -33,16 +22,6 @@ config CRYPTO_SHA1_OCTEON</div><div class='ctx'> </div><div class='ctx'> 	  Architecture: mips OCTEON</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_OCTEON</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (OCTEON)"</div><div class='del'>-	depends on CPU_CAVIUM_OCTEON</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: mips OCTEON using crypto instructions, when available</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA512_OCTEON</div><div class='ctx'> 	tristate "Hash functions: SHA-384 and SHA-512 (OCTEON)"</div><div class='ctx'> 	depends on CPU_CAVIUM_OCTEON</div><div class='hunk'>@@ -53,16 +32,4 @@ config CRYPTO_SHA512_OCTEON</div><div class='ctx'> </div><div class='ctx'> 	  Architecture: mips OCTEON using crypto instructions, when available</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA_MIPS</div><div class='del'>-	tristate</div><div class='del'>-	depends on CPU_MIPS32_R2</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	default CRYPTO_LIB_CHACHA_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: MIPS32r2</div><div class='del'>-</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/arch/mips/crypto/Makefile b/arch/mips/crypto/Makefile<br/>index fddc88281412..5adb631a69c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/crypto/Makefile</a></div><div class='hunk'>@@ -3,20 +3,3 @@</div><div class='ctx'> # Makefile for MIPS crypto files..</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o</div><div class='del'>-chacha-mips-y := chacha-core.o chacha-glue.o</div><div class='del'>-AFLAGS_chacha-core.o += -O2 # needed to fill branch delay slots</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_MIPS) += poly1305-mips.o</div><div class='del'>-poly1305-mips-y := poly1305-core.o poly1305-glue.o</div><div class='del'>-</div><div class='del'>-perlasm-flavour-$(CONFIG_32BIT) := o32</div><div class='del'>-perlasm-flavour-$(CONFIG_64BIT) := 64</div><div class='del'>-</div><div class='del'>-quiet_cmd_perlasm = PERLASM $@</div><div class='del'>-      cmd_perlasm = $(PERL) $(&lt;) $(perlasm-flavour-y) $(@)</div><div class='del'>-</div><div class='del'>-$(obj)/poly1305-core.S: $(src)/poly1305-mips.pl FORCE</div><div class='del'>-	$(call if_changed,perlasm)</div><div class='del'>-</div><div class='del'>-targets += poly1305-core.S</div><div class='head'>diff --git a/arch/mips/crypto/chacha-glue.c b/arch/mips/crypto/chacha-glue.c<br/>deleted file mode 100644<br/>index f6fc2e1079a1..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/crypto/chacha-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/chacha-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,146 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * MIPS accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				  unsigned int bytes, int nrounds);</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-asmlinkage void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds);</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_mips_stream_xor(struct skcipher_request *req,</div><div class='del'>-				  const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = round_down(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		chacha_crypt(state, walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-			     nbytes, ctx-&gt;nrounds);</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_mips(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_mips_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_mips(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-</div><div class='del'>-	hchacha_block(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_mips_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-mips",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_mips,</div><div class='del'>-		.decrypt		= chacha_mips,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-mips",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_mips,</div><div class='del'>-		.decrypt		= xchacha_mips,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-mips",</div><div class='del'>-		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_mips,</div><div class='del'>-		.decrypt		= xchacha_mips,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) ?</div><div class='del'>-		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_simd_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER))</div><div class='del'>-		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_simd_mod_init);</div><div class='del'>-module_exit(chacha_simd_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (MIPS accelerated)");</div><div class='del'>-MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-mips");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-mips");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-mips");</div><div class='head'>diff --git a/arch/mips/crypto/poly1305-glue.c b/arch/mips/crypto/poly1305-glue.c<br/>deleted file mode 100644<br/>index c03ad0bbe69c..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/crypto/poly1305-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/poly1305-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,192 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * OpenSSL/Cryptogams accelerated Poly1305 transform for MIPS</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void poly1305_init_mips(void *state, const u8 *key);</div><div class='del'>-asmlinkage void poly1305_blocks_mips(void *state, const u8 *src, u32 len, u32 hibit);</div><div class='del'>-asmlinkage void poly1305_emit_mips(void *state, u8 *digest, const u32 *nonce);</div><div class='del'>-</div><div class='del'>-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_init_mips(&amp;dctx-&gt;h, key);</div><div class='del'>-	dctx-&gt;s[0] = get_unaligned_le32(key + 16);</div><div class='del'>-	dctx-&gt;s[1] = get_unaligned_le32(key + 20);</div><div class='del'>-	dctx-&gt;s[2] = get_unaligned_le32(key + 24);</div><div class='del'>-	dctx-&gt;s[3] = get_unaligned_le32(key + 28);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_init_arch);</div><div class='del'>-</div><div class='del'>-static int mips_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mips_poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-				 u32 len, u32 hibit)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset) {</div><div class='del'>-			poly1305_init_mips(&amp;dctx-&gt;h, src);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(src +  0);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(src +  4);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(src +  8);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(src + 12);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-		if (len &lt; POLY1305_BLOCK_SIZE)</div><div class='del'>-			return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len &amp;= ~(POLY1305_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-	poly1305_blocks_mips(&amp;dctx-&gt;h, src, len, hibit);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mips_poly1305_update(struct shash_desc *desc, const u8 *src,</div><div class='del'>-				unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(len, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			mips_poly1305_blocks(dctx, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(len &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		mips_poly1305_blocks(dctx, src, len, 1);</div><div class='del'>-		src += round_down(len, POLY1305_BLOCK_SIZE);</div><div class='del'>-		len %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(len)) {</div><div class='del'>-		dctx-&gt;buflen = len;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, len);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			  unsigned int nbytes)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		u32 bytes = min(nbytes, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		nbytes -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_blocks_mips(&amp;dctx-&gt;h, dctx-&gt;buf,</div><div class='del'>-					     POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(nbytes &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		unsigned int len = round_down(nbytes, POLY1305_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-		poly1305_blocks_mips(&amp;dctx-&gt;h, src, len, 1);</div><div class='del'>-		src += len;</div><div class='del'>-		nbytes %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(nbytes)) {</div><div class='del'>-		dctx-&gt;buflen = nbytes;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, nbytes);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_update_arch);</div><div class='del'>-</div><div class='del'>-void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		poly1305_blocks_mips(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit_mips(&amp;dctx-&gt;h, dst, dctx-&gt;s);</div><div class='del'>-	*dctx = (struct poly1305_desc_ctx){};</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_final_arch);</div><div class='del'>-</div><div class='del'>-static int mips_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_arch(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg mips_poly1305_alg = {</div><div class='del'>-	.init			= mips_poly1305_init,</div><div class='del'>-	.update			= mips_poly1305_update,</div><div class='del'>-	.final			= mips_poly1305_final,</div><div class='del'>-	.digestsize		= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.descsize		= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-</div><div class='del'>-	.base.cra_name		= "poly1305",</div><div class='del'>-	.base.cra_driver_name	= "poly1305-mips",</div><div class='del'>-	.base.cra_priority	= 200,</div><div class='del'>-	.base.cra_blocksize	= POLY1305_BLOCK_SIZE,</div><div class='del'>-	.base.cra_module	= THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init mips_poly1305_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ?</div><div class='del'>-		crypto_register_shash(&amp;mips_poly1305_alg) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit mips_poly1305_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_HASH))</div><div class='del'>-		crypto_unregister_shash(&amp;mips_poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mips_poly1305_mod_init);</div><div class='del'>-module_exit(mips_poly1305_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Poly1305 transform (MIPS accelerated");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-mips");</div><div class='head'>diff --git a/arch/mips/include/asm/idle.h b/arch/mips/include/asm/idle.h<br/>index 0992cad9c632..c7d75807d13f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/include/asm/idle.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/asm/idle.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/include/asm/idle.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/include/asm/idle.h</a></div><div class='hunk'>@@ -6,11 +6,10 @@</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void (*cpu_wait)(void);</div><div class='del'>-extern void r4k_wait(void);</div><div class='del'>-extern asmlinkage void __r4k_wait(void);</div><div class='add'>+extern asmlinkage void r4k_wait(void);</div><div class='ctx'> extern void r4k_wait_irqoff(void);</div><div class='ctx'> </div><div class='del'>-static inline int using_rollback_handler(void)</div><div class='add'>+static inline int using_skipover_handler(void)</div><div class='ctx'> {</div><div class='ctx'> 	return cpu_wait == r4k_wait;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h<br/>index 85fa9962266a..ef72c46b5568 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/include/asm/ptrace.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/include/asm/ptrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/include/asm/ptrace.h</a></div><div class='hunk'>@@ -65,7 +65,8 @@ static inline void instruction_pointer_set(struct pt_regs *regs,</div><div class='ctx'> </div><div class='ctx'> /* Query offset/name of register from its name/offset */</div><div class='ctx'> extern int regs_query_register_offset(const char *name);</div><div class='del'>-#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))</div><div class='add'>+#define MAX_REG_OFFSET \</div><div class='add'>+	(offsetof(struct pt_regs, __last) - sizeof(unsigned long))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * regs_get_register() - get register value from its offset</div><div class='head'>diff --git a/arch/mips/include/asm/socket.h b/arch/mips/include/asm/socket.h<br/>index 4724a563c5bf..43a09f0dd3ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/include/asm/socket.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/include/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/include/asm/socket.h</a></div><div class='hunk'>@@ -36,15 +36,6 @@ enum sock_type {</div><div class='ctx'> 	SOCK_PACKET	= 10,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define SOCK_MAX (SOCK_PACKET + 1)</div><div class='del'>-/* Mask which covers at least up to SOCK_MASK-1.  The</div><div class='del'>- *  * remaining bits are used as flags. */</div><div class='del'>-#define SOCK_TYPE_MASK 0xf</div><div class='del'>-</div><div class='del'>-/* Flags for socket, socketpair, paccept */</div><div class='del'>-#define SOCK_CLOEXEC	O_CLOEXEC</div><div class='del'>-#define SOCK_NONBLOCK	O_NONBLOCK</div><div class='del'>-</div><div class='ctx'> #define ARCH_HAS_SOCKET_TYPES 1</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_SOCKET_H */</div><div class='head'>diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h<br/>index 22fa8f19924a..31ac655b7837 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/include/uapi/asm/socket.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/include/uapi/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/include/uapi/asm/socket.h</a></div><div class='hunk'>@@ -161,6 +161,8 @@</div><div class='ctx'> </div><div class='ctx'> #define SO_RCVPRIORITY		82</div><div class='ctx'> </div><div class='add'>+#define SO_PASSRIGHTS		83</div><div class='add'>+</div><div class='ctx'> #if !defined(__KERNEL__)</div><div class='ctx'> </div><div class='ctx'> #if __BITS_PER_LONG == 64</div><div class='head'>diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S<br/>index a572ce36a24f..08c0a01d9a29 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/kernel/genex.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/genex.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/kernel/genex.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/kernel/genex.S</a></div><div class='hunk'>@@ -104,48 +104,59 @@ handle_vcei:</div><div class='ctx'> </div><div class='ctx'> 	__FINIT</div><div class='ctx'> </div><div class='del'>-	.align	5	/* 32 byte rollback region */</div><div class='del'>-LEAF(__r4k_wait)</div><div class='del'>-	.set	push</div><div class='del'>-	.set	noreorder</div><div class='del'>-	/* start of rollback region */</div><div class='del'>-	LONG_L	t0, TI_FLAGS($28)</div><div class='del'>-	nop</div><div class='del'>-	andi	t0, _TIF_NEED_RESCHED</div><div class='del'>-	bnez	t0, 1f</div><div class='del'>-	 nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-#ifdef CONFIG_CPU_MICROMIPS</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-	nop</div><div class='del'>-#endif</div><div class='add'>+	.section .cpuidle.text,"ax"</div><div class='add'>+	/* Align to 32 bytes for the maximum idle interrupt region size. */</div><div class='add'>+	.align	5</div><div class='add'>+LEAF(r4k_wait)</div><div class='add'>+	/* Keep the ISA bit clear for calculations on local labels here. */</div><div class='add'>+0:	.fill 	0</div><div class='add'>+	/* Start of idle interrupt region. */</div><div class='add'>+	local_irq_enable</div><div class='add'>+	/*</div><div class='add'>+	 * If an interrupt lands here, before going idle on the next</div><div class='add'>+	 * instruction, we must *NOT* go idle since the interrupt could</div><div class='add'>+	 * have set TIF_NEED_RESCHED or caused a timer to need resched.</div><div class='add'>+	 * Fall through -- see skipover_handler below -- and have the</div><div class='add'>+	 * idle loop take care of things.</div><div class='add'>+	 */</div><div class='add'>+1:	.fill	0</div><div class='add'>+	/* The R2 EI/EHB sequence takes 8 bytes, otherwise pad up.  */</div><div class='add'>+	.if		1b - 0b &gt; 32</div><div class='add'>+	.error	"overlong idle interrupt region"</div><div class='add'>+	.elseif	1b - 0b &gt; 8</div><div class='add'>+	.align	4</div><div class='add'>+	.endif</div><div class='add'>+2:	.fill	0</div><div class='add'>+	.equ	r4k_wait_idle_size, 2b - 0b</div><div class='add'>+	/* End of idle interrupt region; size has to be a power of 2. */</div><div class='ctx'> 	.set	MIPS_ISA_ARCH_LEVEL_RAW</div><div class='add'>+r4k_wait_insn:</div><div class='ctx'> 	wait</div><div class='del'>-	/* end of rollback region (the region size must be power of two) */</div><div class='del'>-1:</div><div class='add'>+r4k_wait_exit:</div><div class='add'>+	.set	mips0</div><div class='add'>+	local_irq_disable</div><div class='ctx'> 	jr	ra</div><div class='del'>-	 nop</div><div class='del'>-	.set	pop</div><div class='del'>-	END(__r4k_wait)</div><div class='add'>+	END(r4k_wait)</div><div class='add'>+	.previous</div><div class='ctx'> </div><div class='del'>-	.macro	BUILD_ROLLBACK_PROLOGUE handler</div><div class='del'>-	FEXPORT(rollback_\handler)</div><div class='add'>+	.macro	BUILD_SKIPOVER_PROLOGUE handler</div><div class='add'>+	FEXPORT(skipover_\handler)</div><div class='ctx'> 	.set	push</div><div class='ctx'> 	.set	noat</div><div class='ctx'> 	MFC0	k0, CP0_EPC</div><div class='del'>-	PTR_LA	k1, __r4k_wait</div><div class='del'>-	ori	k0, 0x1f	/* 32 byte rollback region */</div><div class='del'>-	xori	k0, 0x1f</div><div class='add'>+	/* Subtract/add 2 to let the ISA bit propagate through the mask.  */</div><div class='add'>+	PTR_LA	k1, r4k_wait_insn - 2</div><div class='add'>+	ori 	k0, r4k_wait_idle_size - 2</div><div class='add'>+	.set	noreorder</div><div class='ctx'> 	bne	k0, k1, \handler</div><div class='add'>+	PTR_ADDIU 	k0, r4k_wait_exit - r4k_wait_insn + 2</div><div class='add'>+	.set	reorder</div><div class='ctx'> 	MTC0	k0, CP0_EPC</div><div class='ctx'> 	.set pop</div><div class='ctx'> 	.endm</div><div class='ctx'> </div><div class='ctx'> 	.align	5</div><div class='del'>-BUILD_ROLLBACK_PROLOGUE handle_int</div><div class='add'>+BUILD_SKIPOVER_PROLOGUE handle_int</div><div class='ctx'> NESTED(handle_int, PT_SIZE, sp)</div><div class='ctx'> 	.cfi_signal_frame</div><div class='ctx'> #ifdef CONFIG_TRACE_IRQFLAGS</div><div class='hunk'>@@ -265,7 +276,7 @@ NESTED(except_vec_ejtag_debug, 0, sp)</div><div class='ctx'>  * This prototype is copied to ebase + n*IntCtl.VS and patched</div><div class='ctx'>  * to invoke the handler</div><div class='ctx'>  */</div><div class='del'>-BUILD_ROLLBACK_PROLOGUE except_vec_vi</div><div class='add'>+BUILD_SKIPOVER_PROLOGUE except_vec_vi</div><div class='ctx'> NESTED(except_vec_vi, 0, sp)</div><div class='ctx'> 	SAVE_SOME docfi=1</div><div class='ctx'> 	SAVE_AT docfi=1</div><div class='head'>diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c<br/>index 5abc8b7340f8..80e8a04a642e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/kernel/idle.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/idle.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/kernel/idle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/kernel/idle.c</a></div><div class='hunk'>@@ -35,13 +35,6 @@ static void __cpuidle r3081_wait(void)</div><div class='ctx'> 	write_c0_conf(cfg | R30XX_CONF_HALT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __cpuidle r4k_wait(void)</div><div class='del'>-{</div><div class='del'>-	raw_local_irq_enable();</div><div class='del'>-	__r4k_wait();</div><div class='del'>-	raw_local_irq_disable();</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * This variant is preferable as it allows testing need_resched and going to</div><div class='ctx'>  * sleep depending on the outcome atomically.  Unfortunately the "It is</div><div class='head'>diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c<br/>index c4d6b09136b1..196a070349b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/kernel/perf_event_mipsxx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/perf_event_mipsxx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/kernel/perf_event_mipsxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/kernel/perf_event_mipsxx.c</a></div><div class='hunk'>@@ -791,8 +791,7 @@ static void handle_associated_event(struct cpu_hw_events *cpuc,</div><div class='ctx'> 	if (!mipspmu_event_set_period(event, hwc, idx))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (perf_event_overflow(event, data, regs))</div><div class='del'>-		mipsxx_pmu_disable_event(idx);</div><div class='add'>+	perf_event_overflow(event, data, regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c<br/>index e85bd087467e..cc26d56f3ab6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/kernel/smp-cps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/smp-cps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/kernel/smp-cps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/kernel/smp-cps.c</a></div><div class='hunk'>@@ -332,6 +332,8 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 	mips_cps_cluster_bootcfg = kcalloc(nclusters,</div><div class='ctx'> 					   sizeof(*mips_cps_cluster_bootcfg),</div><div class='ctx'> 					   GFP_KERNEL);</div><div class='add'>+	if (!mips_cps_cluster_bootcfg)</div><div class='add'>+		goto err_out;</div><div class='ctx'> </div><div class='ctx'> 	if (nclusters &gt; 1)</div><div class='ctx'> 		mips_cm_update_property();</div><div class='hunk'>@@ -348,6 +350,8 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)</div><div class='ctx'> 		mips_cps_cluster_bootcfg[cl].core_power =</div><div class='ctx'> 			kcalloc(BITS_TO_LONGS(ncores), sizeof(unsigned long),</div><div class='ctx'> 				GFP_KERNEL);</div><div class='add'>+		if (!mips_cps_cluster_bootcfg[cl].core_power)</div><div class='add'>+			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		/* Allocate VPE boot configuration structs */</div><div class='ctx'> 		for (c = 0; c &lt; ncores; c++) {</div><div class='head'>diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c<br/>index 39e248d0ed59..8ec1e185b35c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/kernel/traps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/kernel/traps.c</a></div><div class='hunk'>@@ -77,7 +77,7 @@</div><div class='ctx'> #include "access-helper.h"</div><div class='ctx'> </div><div class='ctx'> extern void check_wait(void);</div><div class='del'>-extern asmlinkage void rollback_handle_int(void);</div><div class='add'>+extern asmlinkage void skipover_handle_int(void);</div><div class='ctx'> extern asmlinkage void handle_int(void);</div><div class='ctx'> extern asmlinkage void handle_adel(void);</div><div class='ctx'> extern asmlinkage void handle_ades(void);</div><div class='hunk'>@@ -2066,7 +2066,7 @@ void *set_vi_handler(int n, vi_handler_t addr)</div><div class='ctx'> {</div><div class='ctx'> 	extern const u8 except_vec_vi[];</div><div class='ctx'> 	extern const u8 except_vec_vi_ori[], except_vec_vi_end[];</div><div class='del'>-	extern const u8 rollback_except_vec_vi[];</div><div class='add'>+	extern const u8 skipover_except_vec_vi[];</div><div class='ctx'> 	unsigned long handler;</div><div class='ctx'> 	unsigned long old_handler = vi_handlers[n];</div><div class='ctx'> 	int srssets = current_cpu_data.srsets;</div><div class='hunk'>@@ -2095,7 +2095,7 @@ void *set_vi_handler(int n, vi_handler_t addr)</div><div class='ctx'> 			change_c0_srsmap(0xf &lt;&lt; n*4, 0 &lt;&lt; n*4);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vec_start = using_rollback_handler() ? rollback_except_vec_vi :</div><div class='add'>+	vec_start = using_skipover_handler() ? skipover_except_vec_vi :</div><div class='ctx'> 					       except_vec_vi;</div><div class='ctx'> #if defined(CONFIG_CPU_MICROMIPS) || defined(CONFIG_CPU_BIG_ENDIAN)</div><div class='ctx'> 	ori_offset = except_vec_vi_ori - vec_start + 2;</div><div class='hunk'>@@ -2426,8 +2426,8 @@ void __init trap_init(void)</div><div class='ctx'> 	if (board_be_init)</div><div class='ctx'> 		board_be_init();</div><div class='ctx'> </div><div class='del'>-	set_except_vector(EXCCODE_INT, using_rollback_handler() ?</div><div class='del'>-					rollback_handle_int : handle_int);</div><div class='add'>+	set_except_vector(EXCCODE_INT, using_skipover_handler() ?</div><div class='add'>+					skipover_handle_int : handle_int);</div><div class='ctx'> 	set_except_vector(EXCCODE_MOD, handle_tlbm);</div><div class='ctx'> 	set_except_vector(EXCCODE_TLBL, handle_tlbl);</div><div class='ctx'> 	set_except_vector(EXCCODE_TLBS, handle_tlbs);</div><div class='head'>diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c<br/>index 8f208007b8e8..a112573b6e37 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/lantiq/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lantiq/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lantiq/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lantiq/irq.c</a></div><div class='hunk'>@@ -377,7 +377,7 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)</div><div class='ctx'> 	for (i = 0; i &lt; MAX_IM; i++)</div><div class='ctx'> 		irq_set_chained_handler(i + 2, ltq_hw_irq_handler);</div><div class='ctx'> </div><div class='del'>-	ltq_domain = irq_domain_add_linear(node,</div><div class='add'>+	ltq_domain = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='ctx'> 		(MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE,</div><div class='ctx'> 		&amp;irq_domain_ops, 0);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile<br/>index 9c024e6d5e54..9d75845ef78e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/Makefile</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> # Makefile for MIPS-specific library files..</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+obj-y	+= crypto/</div><div class='add'>+</div><div class='ctx'> lib-y	+= bitops.o csum_partial.o delay.o memcpy.o memset.o \</div><div class='ctx'> 	   mips-atomic.o strncpy_user.o \</div><div class='ctx'> 	   strnlen_user.o uncached.o</div><div class='head'>diff --git a/arch/mips/lib/crc32-mips.c b/arch/mips/lib/crc32-mips.c<br/>index 676a4b3e290b..45e4d2c9fbf5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/lib/crc32-mips.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/lib/crc32-mips.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crc32-mips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crc32-mips.c</a></div><div class='hunk'>@@ -62,7 +62,7 @@ do {							\</div><div class='ctx'> #define CRC32C(crc, value, size) \</div><div class='ctx'> 	_CRC32(crc, value, size, crc32c)</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='ctx'> </div><div class='ctx'> u32 crc32_le_arch(u32 crc, const u8 *p, size_t len)</div><div class='ctx'> {</div><div class='hunk'>@@ -163,7 +163,7 @@ static int __init crc32_mips_init(void)</div><div class='ctx'> 		static_branch_enable(&amp;have_crc32);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc32_mips_init);</div><div class='add'>+subsys_initcall(crc32_mips_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc32_mips_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/mips/lib/crypto/.gitignore b/arch/mips/lib/crypto/.gitignore<br/>new file mode 100644<br/>index 000000000000..0d47d4f21c6d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crypto/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+poly1305-core.S</div><div class='head'>diff --git a/arch/mips/lib/crypto/Kconfig b/arch/mips/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..0670a170c1be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_CHACHA_MIPS</div><div class='add'>+	tristate</div><div class='add'>+	depends on CPU_MIPS32_R2</div><div class='add'>+	default CRYPTO_LIB_CHACHA</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='add'>+</div><div class='add'>+config CRYPTO_POLY1305_MIPS</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_LIB_POLY1305</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='head'>diff --git a/arch/mips/lib/crypto/Makefile b/arch/mips/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..804488c7aded<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA_MIPS) += chacha-mips.o</div><div class='add'>+chacha-mips-y := chacha-core.o chacha-glue.o</div><div class='add'>+AFLAGS_chacha-core.o += -O2 # needed to fill branch delay slots</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_POLY1305_MIPS) += poly1305-mips.o</div><div class='add'>+poly1305-mips-y := poly1305-core.o poly1305-glue.o</div><div class='add'>+</div><div class='add'>+perlasm-flavour-$(CONFIG_32BIT) := o32</div><div class='add'>+perlasm-flavour-$(CONFIG_64BIT) := 64</div><div class='add'>+</div><div class='add'>+quiet_cmd_perlasm = PERLASM $@</div><div class='add'>+      cmd_perlasm = $(PERL) $(&lt;) $(perlasm-flavour-y) $(@)</div><div class='add'>+</div><div class='add'>+$(obj)/poly1305-core.S: $(src)/poly1305-mips.pl FORCE</div><div class='add'>+	$(call if_changed,perlasm)</div><div class='add'>+</div><div class='add'>+targets += poly1305-core.S</div><div class='head'>diff --git a/arch/mips/crypto/chacha-core.S b/arch/mips/lib/crypto/chacha-core.S<br/>index 5755f69cfe00..5755f69cfe00 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/crypto/chacha-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/chacha-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crypto/chacha-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crypto/chacha-core.S</a></div><div class='head'>diff --git a/arch/mips/lib/crypto/chacha-glue.c b/arch/mips/lib/crypto/chacha-glue.c<br/>new file mode 100644<br/>index 000000000000..88c097594eb0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crypto/chacha-glue.c</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * ChaCha and HChaCha functions (MIPS optimized)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 Linaro, Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_crypt_arch(struct chacha_state *state,</div><div class='add'>+				  u8 *dst, const u8 *src,</div><div class='add'>+				  unsigned int bytes, int nrounds);</div><div class='add'>+EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='add'>+</div><div class='add'>+asmlinkage void hchacha_block_arch(const struct chacha_state *state,</div><div class='add'>+				   u32 out[HCHACHA_OUT_WORDS], int nrounds);</div><div class='add'>+EXPORT_SYMBOL(hchacha_block_arch);</div><div class='add'>+</div><div class='add'>+bool chacha_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ChaCha and HChaCha functions (MIPS optimized)");</div><div class='add'>+MODULE_AUTHOR("Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/mips/lib/crypto/poly1305-glue.c b/arch/mips/lib/crypto/poly1305-glue.c<br/>new file mode 100644<br/>index 000000000000..764a38a65200<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crypto/poly1305-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crypto/poly1305-glue.c</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * OpenSSL/Cryptogams accelerated Poly1305 transform for MIPS</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/internal/poly1305.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void poly1305_block_init_arch(</div><div class='add'>+	struct poly1305_block_state *state,</div><div class='add'>+	const u8 raw_key[POLY1305_BLOCK_SIZE]);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_block_init_arch);</div><div class='add'>+asmlinkage void poly1305_blocks_arch(struct poly1305_block_state *state,</div><div class='add'>+				     const u8 *src, u32 len, u32 hibit);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_blocks_arch);</div><div class='add'>+asmlinkage void poly1305_emit_arch(const struct poly1305_state *state,</div><div class='add'>+				   u8 digest[POLY1305_DIGEST_SIZE],</div><div class='add'>+				   const u32 nonce[4]);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_emit_arch);</div><div class='add'>+</div><div class='add'>+bool poly1305_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(poly1305_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Poly1305 transform (MIPS accelerated");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/mips/crypto/poly1305-mips.pl b/arch/mips/lib/crypto/poly1305-mips.pl<br/>index b05bab884ed2..399f10c3e385 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/crypto/poly1305-mips.pl?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/crypto/poly1305-mips.pl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/lib/crypto/poly1305-mips.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/lib/crypto/poly1305-mips.pl</a></div><div class='hunk'>@@ -93,9 +93,9 @@ $code.=&lt;&lt;___;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef	__KERNEL__</div><div class='del'>-# define poly1305_init   poly1305_init_mips</div><div class='del'>-# define poly1305_blocks poly1305_blocks_mips</div><div class='del'>-# define poly1305_emit   poly1305_emit_mips</div><div class='add'>+# define poly1305_init   poly1305_block_init_arch</div><div class='add'>+# define poly1305_blocks poly1305_blocks_arch</div><div class='add'>+# define poly1305_emit   poly1305_emit_arch</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(__MIPSEB__) &amp;&amp; !defined(MIPSEB)</div><div class='hunk'>@@ -565,9 +565,9 @@ $code.=&lt;&lt;___;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef	__KERNEL__</div><div class='del'>-# define poly1305_init   poly1305_init_mips</div><div class='del'>-# define poly1305_blocks poly1305_blocks_mips</div><div class='del'>-# define poly1305_emit   poly1305_emit_mips</div><div class='add'>+# define poly1305_init   poly1305_block_init_arch</div><div class='add'>+# define poly1305_blocks poly1305_blocks_arch</div><div class='add'>+# define poly1305_emit   poly1305_emit_arch</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #if defined(__MIPSEB__) &amp;&amp; !defined(MIPSEB)</div><div class='head'>diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c<br/>index a925842ee125..17fa97ec6ffb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/pci/pci-ar2315.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/pci/pci-ar2315.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/pci/pci-ar2315.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/pci/pci-ar2315.c</a></div><div class='hunk'>@@ -469,8 +469,8 @@ static int ar2315_pci_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	apc-&gt;domain = irq_domain_add_linear(NULL, AR2315_PCI_IRQ_COUNT,</div><div class='del'>-					    &amp;ar2315_pci_irq_domain_ops, apc);</div><div class='add'>+	apc-&gt;domain = irq_domain_create_linear(NULL, AR2315_PCI_IRQ_COUNT,</div><div class='add'>+					       &amp;ar2315_pci_irq_domain_ops, apc);</div><div class='ctx'> 	if (!apc-&gt;domain) {</div><div class='ctx'> 		dev_err(dev, "failed to add IRQ domain\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/arch/mips/pci/pci-rt3883.c b/arch/mips/pci/pci-rt3883.c<br/>index 4ac68a534e4f..14454ece485d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/pci/pci-rt3883.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/pci/pci-rt3883.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/pci/pci-rt3883.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/pci/pci-rt3883.c</a></div><div class='hunk'>@@ -208,9 +208,10 @@ static int rt3883_pci_irq_init(struct device *dev,</div><div class='ctx'> 	rt3883_pci_w32(rpc, 0, RT3883_PCI_REG_PCIENA);</div><div class='ctx'> </div><div class='ctx'> 	rpc-&gt;irq_domain =</div><div class='del'>-		irq_domain_add_linear(rpc-&gt;intc_of_node, RT3883_PCI_IRQ_COUNT,</div><div class='del'>-				      &amp;rt3883_pci_irq_domain_ops,</div><div class='del'>-				      rpc);</div><div class='add'>+		irq_domain_create_linear(of_fwnode_handle(rpc-&gt;intc_of_node),</div><div class='add'>+					 RT3883_PCI_IRQ_COUNT,</div><div class='add'>+					 &amp;rt3883_pci_irq_domain_ops,</div><div class='add'>+					 rpc);</div><div class='ctx'> 	if (!rpc-&gt;irq_domain) {</div><div class='ctx'> 		dev_err(dev, "unable to add IRQ domain\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c<br/>index 46aef0a1b22a..af5bbbea949b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/mips/ralink/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/mips/ralink/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/mips/ralink/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/mips/ralink/irq.c</a></div><div class='hunk'>@@ -176,7 +176,7 @@ static int __init intc_of_init(struct device_node *node,</div><div class='ctx'> 	/* route all INTC interrupts to MIPS HW0 interrupt */</div><div class='ctx'> 	rt_intc_w32(0, INTC_REG_TYPE);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_legacy(node, RALINK_INTC_IRQ_COUNT,</div><div class='add'>+	domain = irq_domain_create_legacy(of_fwnode_handle(node), RALINK_INTC_IRQ_COUNT,</div><div class='ctx'> 			RALINK_INTC_IRQ_BASE, 0, &amp;irq_domain_ops, NULL);</div><div class='ctx'> 	if (!domain)</div><div class='ctx'> 		panic("Failed to add irqdomain");</div><div class='head'>diff --git a/arch/nios2/include/asm/pgtable.h b/arch/nios2/include/asm/pgtable.h<br/>index eab87c6beacb..e5d64c84aadf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/nios2/include/asm/pgtable.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/nios2/include/asm/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/nios2/include/asm/pgtable.h</a></div><div class='hunk'>@@ -291,4 +291,20 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,</div><div class='ctx'> #define update_mmu_cache(vma, addr, ptep) \</div><div class='ctx'> 	update_mmu_cache_range(NULL, vma, addr, ptep, 1)</div><div class='ctx'> </div><div class='add'>+static inline int pte_same(pte_t pte_a, pte_t pte_b);</div><div class='add'>+</div><div class='add'>+#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS</div><div class='add'>+static inline int ptep_set_access_flags(struct vm_area_struct *vma,</div><div class='add'>+					unsigned long address, pte_t *ptep,</div><div class='add'>+					pte_t entry, int dirty)</div><div class='add'>+{</div><div class='add'>+	if (!pte_same(*ptep, entry))</div><div class='add'>+		set_ptes(vma-&gt;vm_mm, address, ptep, entry, 1);</div><div class='add'>+	/*</div><div class='add'>+	 * update_mmu_cache will unconditionally execute, handling both</div><div class='add'>+	 * the case that the PTE changed and the spurious fault case.</div><div class='add'>+	 */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_NIOS2_PGTABLE_H */</div><div class='head'>diff --git a/arch/nios2/kernel/cpuinfo.c b/arch/nios2/kernel/cpuinfo.c<br/>index 7b1e8f9128e9..55882feb6249 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/nios2/kernel/cpuinfo.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/kernel/cpuinfo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/nios2/kernel/cpuinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/nios2/kernel/cpuinfo.c</a></div><div class='hunk'>@@ -46,10 +46,7 @@ void __init setup_cpuinfo(void)</div><div class='ctx'> 	cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency");</div><div class='ctx'> </div><div class='ctx'> 	str = of_get_property(cpu, "altr,implementation", &amp;len);</div><div class='del'>-	if (str)</div><div class='del'>-		strscpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl));</div><div class='del'>-	else</div><div class='del'>-		strcpy(cpuinfo.cpu_impl, "&lt;unknown&gt;");</div><div class='add'>+	strscpy(cpuinfo.cpu_impl, str ?: "&lt;unknown&gt;");</div><div class='ctx'> </div><div class='ctx'> 	cpuinfo.has_div = of_property_read_bool(cpu, "altr,has-div");</div><div class='ctx'> 	cpuinfo.has_mul = of_property_read_bool(cpu, "altr,has-mul");</div><div class='head'>diff --git a/arch/nios2/kernel/irq.c b/arch/nios2/kernel/irq.c<br/>index 8fa280660051..73568d8e21e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/nios2/kernel/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/kernel/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/nios2/kernel/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/nios2/kernel/irq.c</a></div><div class='hunk'>@@ -69,7 +69,8 @@ void __init init_IRQ(void)</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!node);</div><div class='ctx'> </div><div class='del'>-	domain = irq_domain_add_linear(node, NIOS2_CPU_NR_IRQS, &amp;irq_ops, NULL);</div><div class='add'>+	domain = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='add'>+					  NIOS2_CPU_NR_IRQS, &amp;irq_ops, NULL);</div><div class='ctx'> 	BUG_ON(!domain);</div><div class='ctx'> </div><div class='ctx'> 	irq_set_default_domain(domain);</div><div class='head'>diff --git a/arch/nios2/mm/tlb.c b/arch/nios2/mm/tlb.c<br/>index f90ac35f05f3..a9cbe20f9e79 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/nios2/mm/tlb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/nios2/mm/tlb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/nios2/mm/tlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/nios2/mm/tlb.c</a></div><div class='hunk'>@@ -144,10 +144,11 @@ static void flush_tlb_one(unsigned long addr)</div><div class='ctx'> 		if (((pteaddr &gt;&gt; 2) &amp; 0xfffff) != (addr &gt;&gt; PAGE_SHIFT))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		tlbmisc = RDCTL(CTL_TLBMISC);</div><div class='ctx'> 		pr_debug("Flush entry by writing way=%dl pid=%ld\n",</div><div class='del'>-			 way, (pid_misc &gt;&gt; TLBMISC_PID_SHIFT));</div><div class='add'>+			 way, ((tlbmisc &gt;&gt; TLBMISC_PID_SHIFT) &amp; TLBMISC_PID_MASK));</div><div class='ctx'> </div><div class='del'>-		tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT);</div><div class='add'>+		tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT) | (tlbmisc &amp; TLBMISC_PID);</div><div class='ctx'> 		WRCTL(CTL_TLBMISC, tlbmisc);</div><div class='ctx'> 		WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));</div><div class='ctx'> 		WRCTL(CTL_TLBACC, 0);</div><div class='hunk'>@@ -237,7 +238,8 @@ void flush_tlb_pid(unsigned long mmu_pid)</div><div class='ctx'> 			if (pid != mmu_pid)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT);</div><div class='add'>+			tlbmisc = TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT) |</div><div class='add'>+				  (pid &lt;&lt; TLBMISC_PID_SHIFT);</div><div class='ctx'> 			WRCTL(CTL_TLBMISC, tlbmisc);</div><div class='ctx'> 			WRCTL(CTL_TLBACC, 0);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -272,15 +274,17 @@ void flush_tlb_all(void)</div><div class='ctx'> 	/* remember pid/way until we return */</div><div class='ctx'> 	get_misc_and_pid(&amp;org_misc, &amp;pid_misc);</div><div class='ctx'> </div><div class='del'>-	/* Start at way 0, way is auto-incremented after each TLBACC write */</div><div class='del'>-	WRCTL(CTL_TLBMISC, TLBMISC_WE);</div><div class='del'>-</div><div class='ctx'> 	/* Map each TLB entry to physcal address 0 with no-access and a</div><div class='ctx'> 	   bad ptbase */</div><div class='ctx'> 	for (line = 0; line &lt; cpuinfo.tlb_num_lines; line++) {</div><div class='ctx'> 		WRCTL(CTL_PTEADDR, pteaddr_invalid(addr));</div><div class='del'>-		for (way = 0; way &lt; cpuinfo.tlb_num_ways; way++)</div><div class='add'>+		for (way = 0; way &lt; cpuinfo.tlb_num_ways; way++) {</div><div class='add'>+			// Code such as replace_tlb_one_pid assumes that no duplicate entries exist</div><div class='add'>+			// for a single address across ways, so also use way as a dummy PID</div><div class='add'>+			WRCTL(CTL_TLBMISC, TLBMISC_WE | (way &lt;&lt; TLBMISC_WAY_SHIFT) |</div><div class='add'>+					   (way &lt;&lt; TLBMISC_PID_SHIFT));</div><div class='ctx'> 			WRCTL(CTL_TLBACC, 0);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		addr += PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/openrisc/include/asm/cacheflush.h b/arch/openrisc/include/asm/cacheflush.h<br/>index 984c331ff5f4..0e60af486ec1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/cacheflush.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/cacheflush.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -23,6 +23,9 @@</div><div class='ctx'>  */</div><div class='ctx'> extern void local_dcache_page_flush(struct page *page);</div><div class='ctx'> extern void local_icache_page_inv(struct page *page);</div><div class='add'>+extern void local_dcache_range_flush(unsigned long start, unsigned long end);</div><div class='add'>+extern void local_dcache_range_inv(unsigned long start, unsigned long end);</div><div class='add'>+extern void local_icache_range_inv(unsigned long start, unsigned long end);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Data cache flushing always happen on the local cpu. Instruction cache</div><div class='hunk'>@@ -39,6 +42,20 @@ extern void smp_icache_page_inv(struct page *page);</div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Even if the actual block size is larger than L1_CACHE_BYTES, paddr</div><div class='add'>+ * can be incremented by L1_CACHE_BYTES. When paddr is written to the</div><div class='add'>+ * invalidate register, the entire cache line encompassing this address</div><div class='add'>+ * is invalidated. Each subsequent reference to the same cache line will</div><div class='add'>+ * not affect the invalidation process.</div><div class='add'>+ */</div><div class='add'>+#define local_dcache_block_flush(addr) \</div><div class='add'>+	local_dcache_range_flush(addr, addr + L1_CACHE_BYTES)</div><div class='add'>+#define local_dcache_block_inv(addr) \</div><div class='add'>+	local_dcache_range_inv(addr, addr + L1_CACHE_BYTES)</div><div class='add'>+#define local_icache_block_inv(addr) \</div><div class='add'>+	local_icache_range_inv(addr, addr + L1_CACHE_BYTES)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Synchronizes caches. Whenever a cpu writes executable code to memory, this</div><div class='ctx'>  * should be called to make sure the processor sees the newly written code.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/openrisc/include/asm/cpuinfo.h b/arch/openrisc/include/asm/cpuinfo.h<br/>index 5e4744153d0e..3cfc4cf0b019 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/cpuinfo.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/include/asm/cpuinfo.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/include/asm/cpuinfo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/include/asm/cpuinfo.h</a></div><div class='hunk'>@@ -15,16 +15,21 @@</div><div class='ctx'> #ifndef __ASM_OPENRISC_CPUINFO_H</div><div class='ctx'> #define __ASM_OPENRISC_CPUINFO_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/spr.h&gt;</div><div class='add'>+#include &lt;asm/spr_defs.h&gt;</div><div class='add'>+</div><div class='add'>+struct cache_desc {</div><div class='add'>+	u32 size;</div><div class='add'>+	u32 sets;</div><div class='add'>+	u32 block_size;</div><div class='add'>+	u32 ways;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct cpuinfo_or1k {</div><div class='ctx'> 	u32 clock_frequency;</div><div class='ctx'> </div><div class='del'>-	u32 icache_size;</div><div class='del'>-	u32 icache_block_size;</div><div class='del'>-	u32 icache_ways;</div><div class='del'>-</div><div class='del'>-	u32 dcache_size;</div><div class='del'>-	u32 dcache_block_size;</div><div class='del'>-	u32 dcache_ways;</div><div class='add'>+	struct cache_desc icache;</div><div class='add'>+	struct cache_desc dcache;</div><div class='ctx'> </div><div class='ctx'> 	u16 coreid;</div><div class='ctx'> };</div><div class='hunk'>@@ -32,4 +37,9 @@ struct cpuinfo_or1k {</div><div class='ctx'> extern struct cpuinfo_or1k cpuinfo_or1k[NR_CPUS];</div><div class='ctx'> extern void setup_cpuinfo(void);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Check if the cache component exists.</div><div class='add'>+ */</div><div class='add'>+extern bool cpu_cache_is_present(const unsigned int cache_type);</div><div class='add'>+</div><div class='ctx'> #endif /* __ASM_OPENRISC_CPUINFO_H */</div><div class='head'>diff --git a/arch/openrisc/kernel/Makefile b/arch/openrisc/kernel/Makefile<br/>index 79129161f3e0..e4c7d9bdd598 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/kernel/Makefile</a></div><div class='hunk'>@@ -7,7 +7,7 @@ extra-y	:= vmlinux.lds</div><div class='ctx'> </div><div class='ctx'> obj-y	:= head.o setup.o or32_ksyms.o process.o dma.o \</div><div class='ctx'> 	   traps.o time.o irq.o entry.o ptrace.o signal.o \</div><div class='del'>-	   sys_call_table.o unwinder.o</div><div class='add'>+	   sys_call_table.o unwinder.o cacheinfo.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_SMP)		+= smp.o sync-timer.o</div><div class='ctx'> obj-$(CONFIG_STACKTRACE)	+= stacktrace.o</div><div class='head'>diff --git a/arch/openrisc/kernel/cacheinfo.c b/arch/openrisc/kernel/cacheinfo.c<br/>new file mode 100644<br/>index 000000000000..61230545e4ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/cacheinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/kernel/cacheinfo.c</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * OpenRISC cacheinfo support</div><div class='add'>+ *</div><div class='add'>+ * Based on work done for MIPS and LoongArch. All original copyrights</div><div class='add'>+ * apply as per the original source declaration.</div><div class='add'>+ *</div><div class='add'>+ * OpenRISC implementation:</div><div class='add'>+ * Copyright (C) 2025 Sahil Siddiq &lt;sahilcdq@proton.me&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/cacheinfo.h&gt;</div><div class='add'>+#include &lt;asm/cpuinfo.h&gt;</div><div class='add'>+#include &lt;asm/spr.h&gt;</div><div class='add'>+#include &lt;asm/spr_defs.h&gt;</div><div class='add'>+</div><div class='add'>+static inline void ci_leaf_init(struct cacheinfo *this_leaf, enum cache_type type,</div><div class='add'>+				unsigned int level, struct cache_desc *cache, int cpu)</div><div class='add'>+{</div><div class='add'>+	this_leaf-&gt;type = type;</div><div class='add'>+	this_leaf-&gt;level = level;</div><div class='add'>+	this_leaf-&gt;coherency_line_size = cache-&gt;block_size;</div><div class='add'>+	this_leaf-&gt;number_of_sets = cache-&gt;sets;</div><div class='add'>+	this_leaf-&gt;ways_of_associativity = cache-&gt;ways;</div><div class='add'>+	this_leaf-&gt;size = cache-&gt;size;</div><div class='add'>+	cpumask_set_cpu(cpu, &amp;this_leaf-&gt;shared_cpu_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int init_cache_level(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='add'>+	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='add'>+	int leaves = 0, levels = 0;</div><div class='add'>+	unsigned long upr = mfspr(SPR_UPR);</div><div class='add'>+	unsigned long iccfgr, dccfgr;</div><div class='add'>+</div><div class='add'>+	if (!(upr &amp; SPR_UPR_UP)) {</div><div class='add'>+		printk(KERN_INFO</div><div class='add'>+		       "-- no UPR register... unable to detect configuration\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_DCP)) {</div><div class='add'>+		dccfgr = mfspr(SPR_DCCFGR);</div><div class='add'>+		cpuinfo-&gt;dcache.ways = 1 &lt;&lt; (dccfgr &amp; SPR_DCCFGR_NCW);</div><div class='add'>+		cpuinfo-&gt;dcache.sets = 1 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_NCS) &gt;&gt; 3);</div><div class='add'>+		cpuinfo-&gt;dcache.block_size = 16 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_CBS) &gt;&gt; 7);</div><div class='add'>+		cpuinfo-&gt;dcache.size =</div><div class='add'>+		    cpuinfo-&gt;dcache.sets * cpuinfo-&gt;dcache.ways * cpuinfo-&gt;dcache.block_size;</div><div class='add'>+		leaves += 1;</div><div class='add'>+		printk(KERN_INFO</div><div class='add'>+		       "-- dcache: %d bytes total, %d bytes/line, %d set(s), %d way(s)\n",</div><div class='add'>+		       cpuinfo-&gt;dcache.size, cpuinfo-&gt;dcache.block_size,</div><div class='add'>+		       cpuinfo-&gt;dcache.sets, cpuinfo-&gt;dcache.ways);</div><div class='add'>+	} else</div><div class='add'>+		printk(KERN_INFO "-- dcache disabled\n");</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_ICP)) {</div><div class='add'>+		iccfgr = mfspr(SPR_ICCFGR);</div><div class='add'>+		cpuinfo-&gt;icache.ways = 1 &lt;&lt; (iccfgr &amp; SPR_ICCFGR_NCW);</div><div class='add'>+		cpuinfo-&gt;icache.sets = 1 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_NCS) &gt;&gt; 3);</div><div class='add'>+		cpuinfo-&gt;icache.block_size = 16 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_CBS) &gt;&gt; 7);</div><div class='add'>+		cpuinfo-&gt;icache.size =</div><div class='add'>+		    cpuinfo-&gt;icache.sets * cpuinfo-&gt;icache.ways * cpuinfo-&gt;icache.block_size;</div><div class='add'>+		leaves += 1;</div><div class='add'>+		printk(KERN_INFO</div><div class='add'>+		       "-- icache: %d bytes total, %d bytes/line, %d set(s), %d way(s)\n",</div><div class='add'>+		       cpuinfo-&gt;icache.size, cpuinfo-&gt;icache.block_size,</div><div class='add'>+		       cpuinfo-&gt;icache.sets, cpuinfo-&gt;icache.ways);</div><div class='add'>+	} else</div><div class='add'>+		printk(KERN_INFO "-- icache disabled\n");</div><div class='add'>+</div><div class='add'>+	if (!leaves)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	levels = 1;</div><div class='add'>+</div><div class='add'>+	this_cpu_ci-&gt;num_leaves = leaves;</div><div class='add'>+	this_cpu_ci-&gt;num_levels = levels;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int populate_cache_leaves(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='add'>+	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='add'>+	struct cacheinfo *this_leaf = this_cpu_ci-&gt;info_list;</div><div class='add'>+	int level = 1;</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_DCP)) {</div><div class='add'>+		ci_leaf_init(this_leaf, CACHE_TYPE_DATA, level, &amp;cpuinfo-&gt;dcache, cpu);</div><div class='add'>+		this_leaf-&gt;attributes = ((mfspr(SPR_DCCFGR) &amp; SPR_DCCFGR_CWS) &gt;&gt; 8) ?</div><div class='add'>+					CACHE_WRITE_BACK : CACHE_WRITE_THROUGH;</div><div class='add'>+		this_leaf++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_cache_is_present(SPR_UPR_ICP))</div><div class='add'>+		ci_leaf_init(this_leaf, CACHE_TYPE_INST, level, &amp;cpuinfo-&gt;icache, cpu);</div><div class='add'>+</div><div class='add'>+	this_cpu_ci-&gt;cpu_map_populated = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c<br/>index b3edbb33b621..3a7b5baaa450 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/dma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/kernel/dma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/kernel/dma.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/pagewalk.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpuinfo.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/spr_defs.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -24,9 +25,6 @@ static int</div><div class='ctx'> page_set_nocache(pte_t *pte, unsigned long addr,</div><div class='ctx'> 		 unsigned long next, struct mm_walk *walk)</div><div class='ctx'> {</div><div class='del'>-	unsigned long cl;</div><div class='del'>-	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='del'>-</div><div class='ctx'> 	pte_val(*pte) |= _PAGE_CI;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -36,8 +34,7 @@ page_set_nocache(pte_t *pte, unsigned long addr,</div><div class='ctx'> 	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush page out of dcache */</div><div class='del'>-	for (cl = __pa(addr); cl &lt; __pa(next); cl += cpuinfo-&gt;dcache_block_size)</div><div class='del'>-		mtspr(SPR_DCBFR, cl);</div><div class='add'>+	local_dcache_range_flush(__pa(addr), __pa(next));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -98,21 +95,14 @@ void arch_dma_clear_uncached(void *cpu_addr, size_t size)</div><div class='ctx'> void arch_sync_dma_for_device(phys_addr_t addr, size_t size,</div><div class='ctx'> 		enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='del'>-	unsigned long cl;</div><div class='del'>-	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[smp_processor_id()];</div><div class='del'>-</div><div class='ctx'> 	switch (dir) {</div><div class='ctx'> 	case DMA_TO_DEVICE:</div><div class='ctx'> 		/* Flush the dcache for the requested range */</div><div class='del'>-		for (cl = addr; cl &lt; addr + size;</div><div class='del'>-		     cl += cpuinfo-&gt;dcache_block_size)</div><div class='del'>-			mtspr(SPR_DCBFR, cl);</div><div class='add'>+		local_dcache_range_flush(addr, addr + size);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DMA_FROM_DEVICE:</div><div class='ctx'> 		/* Invalidate the dcache for the requested range */</div><div class='del'>-		for (cl = addr; cl &lt; addr + size;</div><div class='del'>-		     cl += cpuinfo-&gt;dcache_block_size)</div><div class='del'>-			mtspr(SPR_DCBIR, cl);</div><div class='add'>+		local_dcache_range_inv(addr, addr + size);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c<br/>index be56eaafc8b9..a9fb9cc6779e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/kernel/setup.c</a></div><div class='hunk'>@@ -113,21 +113,6 @@ static void print_cpuinfo(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (upr &amp; SPR_UPR_DCP)</div><div class='del'>-		printk(KERN_INFO</div><div class='del'>-		       "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",</div><div class='del'>-		       cpuinfo-&gt;dcache_size, cpuinfo-&gt;dcache_block_size,</div><div class='del'>-		       cpuinfo-&gt;dcache_ways);</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_INFO "-- dcache disabled\n");</div><div class='del'>-	if (upr &amp; SPR_UPR_ICP)</div><div class='del'>-		printk(KERN_INFO</div><div class='del'>-		       "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",</div><div class='del'>-		       cpuinfo-&gt;icache_size, cpuinfo-&gt;icache_block_size,</div><div class='del'>-		       cpuinfo-&gt;icache_ways);</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_INFO "-- icache disabled\n");</div><div class='del'>-</div><div class='ctx'> 	if (upr &amp; SPR_UPR_DMP)</div><div class='ctx'> 		printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",</div><div class='ctx'> 		       1 &lt;&lt; ((mfspr(SPR_DMMUCFGR) &amp; SPR_DMMUCFGR_NTS) &gt;&gt; 2),</div><div class='hunk'>@@ -155,8 +140,6 @@ static void print_cpuinfo(void)</div><div class='ctx'> void __init setup_cpuinfo(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *cpu;</div><div class='del'>-	unsigned long iccfgr, dccfgr;</div><div class='del'>-	unsigned long cache_set_size;</div><div class='ctx'> 	int cpu_id = smp_processor_id();</div><div class='ctx'> 	struct cpuinfo_or1k *cpuinfo = &amp;cpuinfo_or1k[cpu_id];</div><div class='ctx'> </div><div class='hunk'>@@ -164,20 +147,6 @@ void __init setup_cpuinfo(void)</div><div class='ctx'> 	if (!cpu)</div><div class='ctx'> 		panic("Couldn't find CPU%d in device tree...\n", cpu_id);</div><div class='ctx'> </div><div class='del'>-	iccfgr = mfspr(SPR_ICCFGR);</div><div class='del'>-	cpuinfo-&gt;icache_ways = 1 &lt;&lt; (iccfgr &amp; SPR_ICCFGR_NCW);</div><div class='del'>-	cache_set_size = 1 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_NCS) &gt;&gt; 3);</div><div class='del'>-	cpuinfo-&gt;icache_block_size = 16 &lt;&lt; ((iccfgr &amp; SPR_ICCFGR_CBS) &gt;&gt; 7);</div><div class='del'>-	cpuinfo-&gt;icache_size =</div><div class='del'>-	    cache_set_size * cpuinfo-&gt;icache_ways * cpuinfo-&gt;icache_block_size;</div><div class='del'>-</div><div class='del'>-	dccfgr = mfspr(SPR_DCCFGR);</div><div class='del'>-	cpuinfo-&gt;dcache_ways = 1 &lt;&lt; (dccfgr &amp; SPR_DCCFGR_NCW);</div><div class='del'>-	cache_set_size = 1 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_NCS) &gt;&gt; 3);</div><div class='del'>-	cpuinfo-&gt;dcache_block_size = 16 &lt;&lt; ((dccfgr &amp; SPR_DCCFGR_CBS) &gt;&gt; 7);</div><div class='del'>-	cpuinfo-&gt;dcache_size =</div><div class='del'>-	    cache_set_size * cpuinfo-&gt;dcache_ways * cpuinfo-&gt;dcache_block_size;</div><div class='del'>-</div><div class='ctx'> 	if (of_property_read_u32(cpu, "clock-frequency",</div><div class='ctx'> 				 &amp;cpuinfo-&gt;clock_frequency)) {</div><div class='ctx'> 		printk(KERN_WARNING</div><div class='hunk'>@@ -294,14 +263,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 	unsigned int vr, cpucfgr;</div><div class='ctx'> 	unsigned int avr;</div><div class='ctx'> 	unsigned int version;</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='ctx'> 	struct cpuinfo_or1k *cpuinfo = v;</div><div class='add'>+	seq_printf(m, "processor\t\t: %d\n", cpuinfo-&gt;coreid);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	vr = mfspr(SPR_VR);</div><div class='ctx'> 	cpucfgr = mfspr(SPR_CPUCFGR);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	seq_printf(m, "processor\t\t: %d\n", cpuinfo-&gt;coreid);</div><div class='del'>-#endif</div><div class='ctx'> 	if (vr &amp; SPR_VR_UVRP) {</div><div class='ctx'> 		vr = mfspr(SPR_VR2);</div><div class='ctx'> 		version = vr &amp; SPR_VR2_VER;</div><div class='hunk'>@@ -320,14 +289,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)</div><div class='ctx'> 		seq_printf(m, "revision\t\t: %d\n", vr &amp; SPR_VR_REV);</div><div class='ctx'> 	}</div><div class='ctx'> 	seq_printf(m, "frequency\t\t: %ld\n", loops_per_jiffy * HZ);</div><div class='del'>-	seq_printf(m, "dcache size\t\t: %d bytes\n", cpuinfo-&gt;dcache_size);</div><div class='del'>-	seq_printf(m, "dcache block size\t: %d bytes\n",</div><div class='del'>-		   cpuinfo-&gt;dcache_block_size);</div><div class='del'>-	seq_printf(m, "dcache ways\t\t: %d\n", cpuinfo-&gt;dcache_ways);</div><div class='del'>-	seq_printf(m, "icache size\t\t: %d bytes\n", cpuinfo-&gt;icache_size);</div><div class='del'>-	seq_printf(m, "icache block size\t: %d bytes\n",</div><div class='del'>-		   cpuinfo-&gt;icache_block_size);</div><div class='del'>-	seq_printf(m, "icache ways\t\t: %d\n", cpuinfo-&gt;icache_ways);</div><div class='ctx'> 	seq_printf(m, "immu\t\t\t: %d entries, %lu ways\n",</div><div class='ctx'> 		   1 &lt;&lt; ((mfspr(SPR_DMMUCFGR) &amp; SPR_DMMUCFGR_NTS) &gt;&gt; 2),</div><div class='ctx'> 		   1 + (mfspr(SPR_DMMUCFGR) &amp; SPR_DMMUCFGR_NTW));</div><div class='head'>diff --git a/arch/openrisc/mm/cache.c b/arch/openrisc/mm/cache.c<br/>index eb43b73f3855..0f265b8e73ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/mm/cache.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/mm/cache.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/mm/cache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/mm/cache.c</a></div><div class='hunk'>@@ -14,31 +14,70 @@</div><div class='ctx'> #include &lt;asm/spr_defs.h&gt;</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='add'>+#include &lt;asm/cpuinfo.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='del'>-static __always_inline void cache_loop(struct page *page, const unsigned int reg)</div><div class='add'>+/*</div><div class='add'>+ * Check if the cache component exists.</div><div class='add'>+ */</div><div class='add'>+bool cpu_cache_is_present(const unsigned int cache_type)</div><div class='ctx'> {</div><div class='del'>-	unsigned long paddr = page_to_pfn(page) &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	unsigned long line = paddr &amp; ~(L1_CACHE_BYTES - 1);</div><div class='add'>+	unsigned long upr = mfspr(SPR_UPR);</div><div class='add'>+	unsigned long mask = SPR_UPR_UP | cache_type;</div><div class='add'>+</div><div class='add'>+	return !((upr &amp; mask) ^ mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void cache_loop(unsigned long paddr, unsigned long end,</div><div class='add'>+				       const unsigned short reg, const unsigned int cache_type)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_cache_is_present(cache_type))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	while (line &lt; paddr + PAGE_SIZE) {</div><div class='del'>-		mtspr(reg, line);</div><div class='del'>-		line += L1_CACHE_BYTES;</div><div class='add'>+	while (paddr &lt; end) {</div><div class='add'>+		mtspr(reg, paddr);</div><div class='add'>+		paddr += L1_CACHE_BYTES;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __always_inline void cache_loop_page(struct page *page, const unsigned short reg,</div><div class='add'>+					    const unsigned int cache_type)</div><div class='add'>+{</div><div class='add'>+	unsigned long paddr = page_to_pfn(page) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	unsigned long end = paddr + PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	paddr &amp;= ~(L1_CACHE_BYTES - 1);</div><div class='add'>+</div><div class='add'>+	cache_loop(paddr, end, reg, cache_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void local_dcache_page_flush(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	cache_loop(page, SPR_DCBFR);</div><div class='add'>+	cache_loop_page(page, SPR_DCBFR, SPR_UPR_DCP);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(local_dcache_page_flush);</div><div class='ctx'> </div><div class='ctx'> void local_icache_page_inv(struct page *page)</div><div class='ctx'> {</div><div class='del'>-	cache_loop(page, SPR_ICBIR);</div><div class='add'>+	cache_loop_page(page, SPR_ICBIR, SPR_UPR_ICP);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(local_icache_page_inv);</div><div class='ctx'> </div><div class='add'>+void local_dcache_range_flush(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	cache_loop(start, end, SPR_DCBFR, SPR_UPR_DCP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void local_dcache_range_inv(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	cache_loop(start, end, SPR_DCBIR, SPR_UPR_DCP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void local_icache_range_inv(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	cache_loop(start, end, SPR_ICBIR, SPR_UPR_ICP);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void update_cache(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> 	pte_t *pte)</div><div class='ctx'> {</div><div class='hunk'>@@ -58,4 +97,3 @@ void update_cache(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> 			sync_icache_dcache(folio_page(folio, nr));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-</div><div class='head'>diff --git a/arch/openrisc/mm/init.c b/arch/openrisc/mm/init.c<br/>index be1c2eb8bb94..e4904ca6f0a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/openrisc/mm/init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/openrisc/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/openrisc/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/openrisc/mm/init.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> int mem_init_done;</div><div class='ctx'> </div><div class='hunk'>@@ -176,8 +177,8 @@ void __init paging_init(void)</div><div class='ctx'> 	barrier();</div><div class='ctx'> </div><div class='ctx'> 	/* Invalidate instruction caches after code modification */</div><div class='del'>-	mtspr(SPR_ICBIR, 0x900);</div><div class='del'>-	mtspr(SPR_ICBIR, 0xa00);</div><div class='add'>+	local_icache_block_inv(0x900);</div><div class='add'>+	local_icache_block_inv(0xa00);</div><div class='ctx'> </div><div class='ctx'> 	/* New TLB miss handlers and kernel page tables are in now place.</div><div class='ctx'> 	 * Make sure that page flags get updated for all pages in TLB by</div><div class='head'>diff --git a/arch/parisc/configs/generic-32bit_defconfig b/arch/parisc/configs/generic-32bit_defconfig<br/>index f5fffc24c3bc..94928d114d4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/configs/generic-32bit_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/configs/generic-32bit_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/configs/generic-32bit_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/parisc/configs/generic-32bit_defconfig</a></div><div class='hunk'>@@ -251,7 +251,7 @@ CONFIG_CIFS=m</div><div class='ctx'> CONFIG_CIFS_XATTR=y</div><div class='ctx'> CONFIG_CIFS_POSIX=y</div><div class='ctx'> # CONFIG_CIFS_DEBUG is not set</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='hunk'>@@ -264,8 +264,6 @@ CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1=y</div><div class='ctx'> CONFIG_CRYPTO_WP512=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_FONTS=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/parisc/configs/generic-64bit_defconfig b/arch/parisc/configs/generic-64bit_defconfig<br/>index 2487765b7be3..d8cd7f858b2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/configs/generic-64bit_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/configs/generic-64bit_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/configs/generic-64bit_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/parisc/configs/generic-64bit_defconfig</a></div><div class='hunk'>@@ -283,7 +283,6 @@ CONFIG_NLS_ASCII=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='ctx'> CONFIG_NLS_ISO8859_2=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> CONFIG_CRYPTO_FCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='hunk'>@@ -292,7 +291,6 @@ CONFIG_CRYPTO_MD5=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=m</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_STRIP_ASM_SYMS=y</div><div class='head'>diff --git a/arch/parisc/include/uapi/asm/socket.h b/arch/parisc/include/uapi/asm/socket.h<br/>index 96831c988606..1f2d5b7a7f5d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/include/uapi/asm/socket.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/include/uapi/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/parisc/include/uapi/asm/socket.h</a></div><div class='hunk'>@@ -142,6 +142,8 @@</div><div class='ctx'> #define SCM_DEVMEM_DMABUF	SO_DEVMEM_DMABUF</div><div class='ctx'> #define SO_DEVMEM_DONTNEED	0x4050</div><div class='ctx'> </div><div class='add'>+#define SO_PASSRIGHTS		0x4051</div><div class='add'>+</div><div class='ctx'> #if !defined(__KERNEL__)</div><div class='ctx'> </div><div class='ctx'> #if __BITS_PER_LONG == 64</div><div class='head'>diff --git a/arch/parisc/math-emu/driver.c b/arch/parisc/math-emu/driver.c<br/>index 34495446e051..71829cb7bc81 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/parisc/math-emu/driver.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/parisc/math-emu/driver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/parisc/math-emu/driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/parisc/math-emu/driver.c</a></div><div class='hunk'>@@ -97,9 +97,19 @@ handle_fpe(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	memcpy(regs-&gt;fr, frcopy, sizeof regs-&gt;fr);</div><div class='ctx'> 	if (signalcode != 0) {</div><div class='del'>-	    force_sig_fault(signalcode &gt;&gt; 24, signalcode &amp; 0xffffff,</div><div class='del'>-			    (void __user *) regs-&gt;iaoq[0]);</div><div class='del'>-	    return -1;</div><div class='add'>+		int sig = signalcode &gt;&gt; 24;</div><div class='add'>+</div><div class='add'>+		if (sig == SIGFPE) {</div><div class='add'>+			/*</div><div class='add'>+			 * Clear floating point trap bit to avoid trapping</div><div class='add'>+			 * again on the first floating-point instruction in</div><div class='add'>+			 * the userspace signal handler.</div><div class='add'>+			 */</div><div class='add'>+			regs-&gt;fr[0] &amp;= ~(1ULL &lt;&lt; 38);</div><div class='add'>+		}</div><div class='add'>+		force_sig_fault(sig, signalcode &amp; 0xffffff,</div><div class='add'>+				(void __user *) regs-&gt;iaoq[0]);</div><div class='add'>+		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return signalcode ? -1 : 0;</div><div class='head'>diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig<br/>index 6722625a406a..c3e0cc83f120 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/Kconfig</a></div><div class='hunk'>@@ -277,6 +277,7 @@ config PPC</div><div class='ctx'> 	select HAVE_PERF_EVENTS_NMI		if PPC64</div><div class='ctx'> 	select HAVE_PERF_REGS</div><div class='ctx'> 	select HAVE_PERF_USER_STACK_DUMP</div><div class='add'>+	select HAVE_PREEMPT_DYNAMIC_KEY</div><div class='ctx'> 	select HAVE_RETHOOK			if KPROBES</div><div class='ctx'> 	select HAVE_REGS_AND_STACK_ACCESS_API</div><div class='ctx'> 	select HAVE_RELIABLE_STACKTRACE</div><div class='hunk'>@@ -894,7 +895,7 @@ config DATA_SHIFT</div><div class='ctx'> 	int "Data shift" if DATA_SHIFT_BOOL</div><div class='ctx'> 	default 24 if STRICT_KERNEL_RWX &amp;&amp; PPC64</div><div class='ctx'> 	range 17 28 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_BOOK3S_32</div><div class='del'>-	range 19 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_8xx</div><div class='add'>+	range 14 23 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_8xx</div><div class='ctx'> 	range 20 24 if (STRICT_KERNEL_RWX || DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_85xx</div><div class='ctx'> 	default 22 if STRICT_KERNEL_RWX &amp;&amp; PPC_BOOK3S_32</div><div class='ctx'> 	default 18 if (DEBUG_PAGEALLOC || KFENCE) &amp;&amp; PPC_BOOK3S_32</div><div class='hunk'>@@ -907,10 +908,10 @@ config DATA_SHIFT</div><div class='ctx'> 	  On Book3S 32 (603+), DBATs are used to map kernel text and rodata RO.</div><div class='ctx'> 	  Smaller is the alignment, greater is the number of necessary DBATs.</div><div class='ctx'> </div><div class='del'>-	  On 8xx, large pages (512kb or 8M) are used to map kernel linear</div><div class='del'>-	  memory. Aligning to 8M reduces TLB misses as only 8M pages are used</div><div class='del'>-	  in that case. If PIN_TLB is selected, it must be aligned to 8M as</div><div class='del'>-	  8M pages will be pinned.</div><div class='add'>+	  On 8xx, large pages (16kb or 512kb or 8M) are used to map kernel</div><div class='add'>+	  linear memory. Aligning to 8M reduces TLB misses as only 8M pages</div><div class='add'>+	  are used in that case. If PIN_TLB is selected, it must be aligned</div><div class='add'>+	  to 8M as 8M pages will be pinned.</div><div class='ctx'> </div><div class='ctx'> config ARCH_FORCE_MAX_ORDER</div><div class='ctx'> 	int "Order of maximal physically contiguous allocations"</div><div class='head'>diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile<br/>index 184d0680e661..a7ab087d412c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/boot/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/boot/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/boot/Makefile</a></div><div class='hunk'>@@ -70,6 +70,7 @@ BOOTCPPFLAGS	:= -nostdinc $(LINUXINCLUDE)</div><div class='ctx'> BOOTCPPFLAGS	+= -isystem $(shell $(BOOTCC) -print-file-name=include)</div><div class='ctx'> </div><div class='ctx'> BOOTCFLAGS	:= $(BOOTTARGETFLAGS) \</div><div class='add'>+		   -std=gnu11 \</div><div class='ctx'> 		   -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \</div><div class='ctx'> 		   -fno-strict-aliasing -O2 \</div><div class='ctx'> 		   -msoft-float -mno-altivec -mno-vsx \</div><div class='head'>diff --git a/arch/powerpc/boot/rs6000.h b/arch/powerpc/boot/rs6000.h<br/>index a9d879155ef9..16df8f3c43f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/boot/rs6000.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/boot/rs6000.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/boot/rs6000.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/boot/rs6000.h</a></div><div class='hunk'>@@ -1,11 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /* IBM RS/6000 "XCOFF" file definitions for BFD.</div><div class='ctx'>    Copyright (C) 1990, 1991 Free Software Foundation, Inc.</div><div class='del'>-   FIXME: Can someone provide a transliteration of this name into ASCII?</div><div class='del'>-   Using the following chars caused a compiler warning on HIUX (so I replaced</div><div class='del'>-   them with octal escapes), and isn't useful without an understanding of what</div><div class='del'>-   character set it is.</div><div class='del'>-   Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM</div><div class='add'>+   Written by Mimi Phuong-Thao Vo of IBM</div><div class='ctx'>    and John Gilmore of Cygnus Support.  */</div><div class='ctx'> </div><div class='ctx'> /********************** FILE HEADER **********************/</div><div class='head'>diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper<br/>index 1db60fe13802..3d8dc822282a 100755<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/boot/wrapper?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/boot/wrapper</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/boot/wrapper?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/boot/wrapper</a></div><div class='hunk'>@@ -234,10 +234,8 @@ fi</div><div class='ctx'> </div><div class='ctx'> # suppress some warnings in recent ld versions</div><div class='ctx'> nowarn="-z noexecstack"</div><div class='del'>-if ! ld_is_lld; then</div><div class='del'>-	if [ "$LD_VERSION" -ge "$(echo 2.39 | ld_version)" ]; then</div><div class='del'>-		nowarn="$nowarn --no-warn-rwx-segments"</div><div class='del'>-	fi</div><div class='add'>+if "${CROSS}ld" -v --no-warn-rwx-segments &gt;/dev/null 2&gt;&amp;1; then</div><div class='add'>+	nowarn="$nowarn --no-warn-rwx-segments"</div><div class='ctx'> fi</div><div class='ctx'> </div><div class='ctx'> platformo=$object/"$platform".o</div><div class='head'>diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig<br/>index 2479ab62d12f..98221bda380d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/44x/sam440ep_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/44x/sam440ep_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/44x/sam440ep_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/44x/sam440ep_defconfig</a></div><div class='hunk'>@@ -91,5 +91,4 @@ CONFIG_AFFS_FS=m</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/powerpc/configs/44x/warp_defconfig b/arch/powerpc/configs/44x/warp_defconfig<br/>index 20891c413149..5757625469c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/44x/warp_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/44x/warp_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/44x/warp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/44x/warp_defconfig</a></div><div class='hunk'>@@ -85,8 +85,6 @@ CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig<br/>index 1715ff547442..b99caba8724a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc832x_rdb_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/83xx/mpc832x_rdb_defconfig</a></div><div class='hunk'>@@ -73,6 +73,5 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=y</div><div class='ctx'> CONFIG_NLS_ISO8859_8=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig<br/>index e65c0057147f..11163052fdba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc834x_itx_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc834x_itx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc834x_itx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/83xx/mpc834x_itx_defconfig</a></div><div class='hunk'>@@ -80,5 +80,4 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig<br/>index 17714bf0ed40..312d39e4242c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig</a></div><div class='hunk'>@@ -72,5 +72,4 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig<br/>index 58fae5131fa7..ac27f99faab8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/83xx/mpc837x_rdb_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/83xx/mpc837x_rdb_defconfig</a></div><div class='hunk'>@@ -75,6 +75,5 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/85xx/ge_imp3a_defconfig b/arch/powerpc/configs/85xx/ge_imp3a_defconfig<br/>index 6f58ee1edf1f..7beb36a41d45 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/85xx/ge_imp3a_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/85xx/ge_imp3a_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/85xx/ge_imp3a_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/85xx/ge_imp3a_defconfig</a></div><div class='hunk'>@@ -221,8 +221,6 @@ CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_NLS_KOI8_R=m</div><div class='ctx'> CONFIG_NLS_KOI8_U=m</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='head'>diff --git a/arch/powerpc/configs/85xx/stx_gp3_defconfig b/arch/powerpc/configs/85xx/stx_gp3_defconfig<br/>index e7080497048d..0a42072fa23c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/85xx/stx_gp3_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/85xx/stx_gp3_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/85xx/stx_gp3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/85xx/stx_gp3_defconfig</a></div><div class='hunk'>@@ -60,8 +60,6 @@ CONFIG_CRAMFS=m</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NLS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_BDI_SWITCH=y</div><div class='head'>diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig<br/>index 3a6381aa9fdc..488d03ae6d6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/85xx/xes_mpc85xx_defconfig</a></div><div class='hunk'>@@ -132,7 +132,6 @@ CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NFSD=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> # CONFIG_DEBUG_BUGVERBOSE is not set</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='head'>diff --git a/arch/powerpc/configs/86xx-hw.config b/arch/powerpc/configs/86xx-hw.config<br/>index 0cb24b33c88e..e7bd265fae5a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/86xx-hw.config?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/86xx-hw.config</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/86xx-hw.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/86xx-hw.config</a></div><div class='hunk'>@@ -5,7 +5,6 @@ CONFIG_BROADCOM_PHY=y</div><div class='ctx'> # CONFIG_CARDBUS is not set</div><div class='ctx'> CONFIG_CHR_DEV_SG=y</div><div class='ctx'> CONFIG_CHR_DEV_ST=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_DS1682=y</div><div class='ctx'> CONFIG_EEPROM_LEGACY=y</div><div class='head'>diff --git a/arch/powerpc/configs/amigaone_defconfig b/arch/powerpc/configs/amigaone_defconfig<br/>index 200bb1ecb560..69ef3dc31c4b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/amigaone_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/amigaone_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/amigaone_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/amigaone_defconfig</a></div><div class='hunk'>@@ -106,7 +106,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_AFFS_FS=m</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='head'>diff --git a/arch/powerpc/configs/chrp32_defconfig b/arch/powerpc/configs/chrp32_defconfig<br/>index fb314f75ad4b..b799c95480ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/chrp32_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/chrp32_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/chrp32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/chrp32_defconfig</a></div><div class='hunk'>@@ -110,7 +110,6 @@ CONFIG_PROC_KCORE=y</div><div class='ctx'> CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='head'>diff --git a/arch/powerpc/configs/fsl-emb-nonhw.config b/arch/powerpc/configs/fsl-emb-nonhw.config<br/>index d6d2a458847b..2f81bc2d819e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/fsl-emb-nonhw.config?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/fsl-emb-nonhw.config</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/fsl-emb-nonhw.config?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/fsl-emb-nonhw.config</a></div><div class='hunk'>@@ -15,7 +15,6 @@ CONFIG_CGROUP_CPUACCT=y</div><div class='ctx'> CONFIG_CGROUP_SCHED=y</div><div class='ctx'> CONFIG_CGROUPS=y</div><div class='ctx'> # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CPUSETS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_CRYPTO_MD4=y</div><div class='head'>diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig<br/>index 9215bed53291..428f17b45513 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/g5_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/g5_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/g5_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/g5_defconfig</a></div><div class='hunk'>@@ -231,12 +231,11 @@ CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_ISO8859_15=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='ctx'> CONFIG_BOOTX_TEXT=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='head'>diff --git a/arch/powerpc/configs/gamecube_defconfig b/arch/powerpc/configs/gamecube_defconfig<br/>index d77eeb525366..cdd99657b71b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/gamecube_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/gamecube_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/gamecube_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/gamecube_defconfig</a></div><div class='hunk'>@@ -82,7 +82,6 @@ CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_CIFS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='ctx'> CONFIG_DEBUG_MUTEXES=y</div><div class='head'>diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig<br/>index fa707de761be..b564f9e33a0d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/linkstation_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/linkstation_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/linkstation_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/linkstation_defconfig</a></div><div class='hunk'>@@ -125,8 +125,6 @@ CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig<br/>index 83c4710017e9..a815d9e5e3e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc83xx_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/mpc83xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc83xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/mpc83xx_defconfig</a></div><div class='hunk'>@@ -97,7 +97,6 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_NFS_V4=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512=y</div><div class='head'>diff --git a/arch/powerpc/configs/mpc866_ads_defconfig b/arch/powerpc/configs/mpc866_ads_defconfig<br/>index a0d27c59ea78..dfbdd5e8e108 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc866_ads_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/mpc866_ads_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mpc866_ads_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/mpc866_ads_defconfig</a></div><div class='hunk'>@@ -38,4 +38,3 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_CRAMFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='head'>diff --git a/arch/powerpc/configs/mvme5100_defconfig b/arch/powerpc/configs/mvme5100_defconfig<br/>index d1c7fd5bf34b..fa2b3b9c5945 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mvme5100_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/mvme5100_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/mvme5100_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/mvme5100_defconfig</a></div><div class='hunk'>@@ -107,8 +107,6 @@ CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='ctx'> CONFIG_NLS_UTF8=m</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_XZ_DEC=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='head'>diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig<br/>index 61993944db40..8bbf51b38480 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/pasemi_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/pasemi_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/pasemi_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/pasemi_defconfig</a></div><div class='hunk'>@@ -159,7 +159,6 @@ CONFIG_NFSD=y</div><div class='ctx'> CONFIG_NFSD_V4=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='head'>diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig<br/>index e8b3f67bf3f5..ae45f70b29f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/pmac32_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/pmac32_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/pmac32_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/pmac32_defconfig</a></div><div class='hunk'>@@ -87,7 +87,6 @@ CONFIG_IP_NF_RAW=m</div><div class='ctx'> CONFIG_IP_NF_ARPTABLES=m</div><div class='ctx'> CONFIG_IP_NF_ARPFILTER=m</div><div class='ctx'> CONFIG_IP_NF_ARP_MANGLE=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_BT=m</div><div class='ctx'> CONFIG_BT_RFCOMM=m</div><div class='ctx'> CONFIG_BT_RFCOMM_TTY=y</div><div class='hunk'>@@ -276,7 +275,6 @@ CONFIG_NFSD_V3_ACL=y</div><div class='ctx'> CONFIG_NFSD_V4=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='head'>diff --git a/arch/powerpc/configs/powernv_defconfig b/arch/powerpc/configs/powernv_defconfig<br/>index 6b6d7467fecf..379229c982a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/powernv_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/powernv_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/powernv_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/powernv_defconfig</a></div><div class='hunk'>@@ -317,7 +317,7 @@ CONFIG_CODE_PATCHING_SELFTEST=y</div><div class='ctx'> CONFIG_FTR_FIXUP_SELFTEST=y</div><div class='ctx'> CONFIG_MSI_BITMAP_SELFTEST=y</div><div class='ctx'> CONFIG_XMON=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5_PPC=m</div><div class='head'>diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig<br/>index 8b595f67068c..41c930f74ed4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc44x_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc44x_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc44x_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/ppc44x_defconfig</a></div><div class='hunk'>@@ -90,7 +90,6 @@ CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=m</div><div class='ctx'> CONFIG_NLS_ISO8859_1=m</div><div class='del'>-CONFIG_CRC_T10DIF=m</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DETECT_HUNG_TASK=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=y</div><div class='head'>diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig<br/>index 5fa154185efa..3423c405cad4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc64_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc64_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc64_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/ppc64_defconfig</a></div><div class='hunk'>@@ -377,7 +377,7 @@ CONFIG_IMA_WRITE_POLICY=y</div><div class='ctx'> CONFIG_IMA_APPRAISE=y</div><div class='ctx'> CONFIG_IMA_ARCH_POLICY=y</div><div class='ctx'> CONFIG_IMA_APPRAISE_MODSIG=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='ctx'> CONFIG_CRYPTO_SERPENT=m</div><div class='head'>diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig<br/>index 4c05f4e4d505..90247b2a0ab0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc64e_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc64e_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc64e_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/ppc64e_defconfig</a></div><div class='hunk'>@@ -207,7 +207,6 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ASCII=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_STACK_USAGE=y</div><div class='hunk'>@@ -221,7 +220,7 @@ CONFIG_CODE_PATCHING_SELFTEST=y</div><div class='ctx'> CONFIG_FTR_FIXUP_SELFTEST=y</div><div class='ctx'> CONFIG_MSI_BITMAP_SELFTEST=y</div><div class='ctx'> CONFIG_XMON=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_CCM=m</div><div class='ctx'> CONFIG_CRYPTO_GCM=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig<br/>index a91a766b71a4..f96f8ed9856c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc6xx_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ppc6xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ppc6xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/ppc6xx_defconfig</a></div><div class='hunk'>@@ -225,7 +225,6 @@ CONFIG_BRIDGE_EBT_REDIRECT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_SNAT=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_LOG=m</div><div class='ctx'> CONFIG_BRIDGE_EBT_NFLOG=m</div><div class='del'>-CONFIG_IP_DCCP=m</div><div class='ctx'> CONFIG_TIPC=m</div><div class='ctx'> CONFIG_ATM=m</div><div class='ctx'> CONFIG_ATM_CLIP=m</div><div class='hunk'>@@ -1073,7 +1072,7 @@ CONFIG_SECURITY_NETWORK_XFRM=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX_BOOTPARAM=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX_DISABLE=y</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_CTS=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='head'>diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig<br/>index 2b175ddf82f0..0b48d2b776c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ps3_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/ps3_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/ps3_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/ps3_defconfig</a></div><div class='hunk'>@@ -148,8 +148,6 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_MICHAEL_MIC=m</div><div class='ctx'> CONFIG_CRYPTO_LZO=m</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='head'>diff --git a/arch/powerpc/configs/skiroot_defconfig b/arch/powerpc/configs/skiroot_defconfig<br/>index 3086c4a12d6d..2b71a6dc399e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/skiroot_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/skiroot_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/skiroot_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/skiroot_defconfig</a></div><div class='hunk'>@@ -278,8 +278,6 @@ CONFIG_LOCK_DOWN_KERNEL_FORCE_INTEGRITY=y</div><div class='ctx'> # CONFIG_INTEGRITY is not set</div><div class='ctx'> CONFIG_LSM="yama,loadpin,safesetid,integrity"</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='ctx'> # CONFIG_XZ_DEC_X86 is not set</div><div class='ctx'> # CONFIG_XZ_DEC_IA64 is not set</div><div class='ctx'> # CONFIG_XZ_DEC_ARM is not set</div><div class='head'>diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig<br/>index 7a978d396991..e415222bd839 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/storcenter_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/storcenter_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/storcenter_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/storcenter_defconfig</a></div><div class='hunk'>@@ -75,4 +75,3 @@ CONFIG_NLS_DEFAULT="utf8"</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_NLS_UTF8=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/powerpc/configs/wii_defconfig b/arch/powerpc/configs/wii_defconfig<br/>index 5017a697b67b..7c714a19221e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/configs/wii_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/configs/wii_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/configs/wii_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/configs/wii_defconfig</a></div><div class='hunk'>@@ -114,7 +114,6 @@ CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_CIFS=m</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_ISO8859_1=y</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_PRINTK_TIME=y</div><div class='ctx'> CONFIG_MAGIC_SYSRQ=y</div><div class='ctx'> CONFIG_DEBUG_SPINLOCK=y</div><div class='head'>diff --git a/arch/powerpc/crypto/Kconfig b/arch/powerpc/crypto/Kconfig<br/>index 370db8192ce6..caaa359f4742 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/Kconfig</a></div><div class='hunk'>@@ -17,7 +17,6 @@ config CRYPTO_CURVE25519_PPC64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_MD5_PPC</div><div class='ctx'> 	tristate "Digests: MD5"</div><div class='del'>-	depends on PPC</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  MD5 message digest algorithm (RFC1321)</div><div class='hunk'>@@ -26,7 +25,6 @@ config CRYPTO_MD5_PPC</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SHA1_PPC</div><div class='ctx'> 	tristate "Hash functions: SHA-1"</div><div class='del'>-	depends on PPC</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='ctx'> </div><div class='hunk'>@@ -34,27 +32,16 @@ config CRYPTO_SHA1_PPC</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SHA1_PPC_SPE</div><div class='ctx'> 	tristate "Hash functions: SHA-1 (SPE)"</div><div class='del'>-	depends on PPC &amp;&amp; SPE</div><div class='add'>+	depends on SPE</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='ctx'> </div><div class='ctx'> 	  Architecture: powerpc using</div><div class='ctx'> 	  - SPE (Signal Processing Engine) extensions</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_PPC_SPE</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (SPE)"</div><div class='del'>-	depends on PPC &amp;&amp; SPE</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: powerpc using</div><div class='del'>-	  - SPE (Signal Processing Engine) extensions</div><div class='del'>-</div><div class='ctx'> config CRYPTO_AES_PPC_SPE</div><div class='ctx'> 	tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (SPE)"</div><div class='del'>-	depends on PPC &amp;&amp; SPE</div><div class='add'>+	depends on SPE</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	help</div><div class='ctx'> 	  Block ciphers: AES cipher algorithms (FIPS-197)</div><div class='hunk'>@@ -92,33 +79,6 @@ config CRYPTO_AES_GCM_P10</div><div class='ctx'> 	  Support for cryptographic acceleration instructions on Power10 or</div><div class='ctx'> 	  later CPU. This module supports stitched acceleration for AES/GCM.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA20_P10</div><div class='del'>-	tristate</div><div class='del'>-	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN &amp;&amp; VSX</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	default CRYPTO_LIB_CHACHA_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: PowerPC64</div><div class='del'>-	  - Power10 or later</div><div class='del'>-	  - Little-endian</div><div class='del'>-</div><div class='del'>-config CRYPTO_POLY1305_P10</div><div class='del'>-	tristate "Hash functions: Poly1305 (P10 or later)"</div><div class='del'>-	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN &amp;&amp; VSX</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_LIB_POLY1305_GENERIC</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: PowerPC64</div><div class='del'>-	  - Power10 or later</div><div class='del'>-	  - Little-endian</div><div class='del'>-</div><div class='ctx'> config CRYPTO_DEV_VMX</div><div class='ctx'>         bool "Support for VMX cryptographic acceleration instructions"</div><div class='ctx'>         depends on PPC64 &amp;&amp; VSX</div><div class='head'>diff --git a/arch/powerpc/crypto/Makefile b/arch/powerpc/crypto/Makefile<br/>index 2f00b22b0823..8c2936ae466f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/Makefile</a></div><div class='hunk'>@@ -9,10 +9,7 @@ obj-$(CONFIG_CRYPTO_AES_PPC_SPE) += aes-ppc-spe.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_MD5_PPC) += md5-ppc.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_PPC) += sha1-powerpc.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_PPC_SPE) += sha1-ppc-spe.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_PPC_SPE) += sha256-ppc-spe.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_GCM_P10) += aes-gcm-p10-crypto.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20_P10) += chacha-p10-crypto.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_P10) += poly1305-p10-crypto.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_VMX_ENCRYPT) += vmx-crypto.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CURVE25519_PPC64) += curve25519-ppc64le.o</div><div class='ctx'> </div><div class='hunk'>@@ -20,10 +17,7 @@ aes-ppc-spe-y := aes-spe-core.o aes-spe-keys.o aes-tab-4k.o aes-spe-modes.o aes-</div><div class='ctx'> md5-ppc-y := md5-asm.o md5-glue.o</div><div class='ctx'> sha1-powerpc-y := sha1-powerpc-asm.o sha1.o</div><div class='ctx'> sha1-ppc-spe-y := sha1-spe-asm.o sha1-spe-glue.o</div><div class='del'>-sha256-ppc-spe-y := sha256-spe-asm.o sha256-spe-glue.o</div><div class='ctx'> aes-gcm-p10-crypto-y := aes-gcm-p10-glue.o aes-gcm-p10.o ghashp10-ppc.o aesp10-ppc.o</div><div class='del'>-chacha-p10-crypto-y := chacha-p10-glue.o chacha-p10le-8x.o</div><div class='del'>-poly1305-p10-crypto-y := poly1305-p10-glue.o poly1305-p10le_64.o</div><div class='ctx'> vmx-crypto-objs := vmx.o aesp8-ppc.o ghashp8-ppc.o aes.o aes_cbc.o aes_ctr.o aes_xts.o ghash.o</div><div class='ctx'> curve25519-ppc64le-y := curve25519-ppc64le-core.o curve25519-ppc64le_asm.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/aes.c b/arch/powerpc/crypto/aes.c<br/>index ec06189fbf99..3f1e5e894902 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/aes.c</a></div><div class='hunk'>@@ -7,15 +7,15 @@</div><div class='ctx'>  * Author: Marcelo Henrique Cerri &lt;mhcerri@br.ibm.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/cipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/aes_cbc.c b/arch/powerpc/crypto/aes_cbc.c<br/>index ed0debc7acb5..5f2a4f375eef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes_cbc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes_cbc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes_cbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/aes_cbc.c</a></div><div class='hunk'>@@ -12,6 +12,10 @@</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/aes_ctr.c b/arch/powerpc/crypto/aes_ctr.c<br/>index 3da75f42529a..e27c4036e711 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes_ctr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes_ctr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes_ctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/aes_ctr.c</a></div><div class='hunk'>@@ -12,6 +12,10 @@</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/aes_xts.c b/arch/powerpc/crypto/aes_xts.c<br/>index dabbccb41550..9440e771cede 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes_xts.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/aes_xts.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/aes_xts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/aes_xts.c</a></div><div class='hunk'>@@ -13,6 +13,10 @@</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "aesp8-ppc.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/crypto/chacha-p10-glue.c b/arch/powerpc/crypto/chacha-p10-glue.c<br/>deleted file mode 100644<br/>index d8796decc1fb..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/chacha-p10-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/chacha-p10-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,221 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * PowerPC P10 (ppc64le) accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright 2023- IBM Corp. All rights reserved.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_p10le_8x(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				unsigned int len, int nrounds);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_p10);</div><div class='del'>-</div><div class='del'>-static void vsx_begin(void)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	enable_kernel_vsx();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void vsx_end(void)</div><div class='del'>-{</div><div class='del'>-	disable_kernel_vsx();</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void chacha_p10_do_8x(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-			     unsigned int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	unsigned int l = bytes &amp; ~0x0FF;</div><div class='del'>-</div><div class='del'>-	if (l &gt; 0) {</div><div class='del'>-		chacha_p10le_8x(state, dst, src, l, nrounds);</div><div class='del'>-		bytes -= l;</div><div class='del'>-		src += l;</div><div class='del'>-		dst += l;</div><div class='del'>-		state[12] += l / CHACHA_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bytes &gt; 0)</div><div class='del'>-		chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	hchacha_block_generic(state, stream, nrounds);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-		       int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_p10) || bytes &lt;= CHACHA_BLOCK_SIZE ||</div><div class='del'>-	    !crypto_simd_usable())</div><div class='del'>-		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='del'>-</div><div class='del'>-		vsx_begin();</div><div class='del'>-		chacha_p10_do_8x(state, dst, src, todo, nrounds);</div><div class='del'>-		vsx_end();</div><div class='del'>-</div><div class='del'>-		bytes -= todo;</div><div class='del'>-		src += todo;</div><div class='del'>-		dst += todo;</div><div class='del'>-	} while (bytes);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_p10_stream_xor(struct skcipher_request *req,</div><div class='del'>-				 const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = rounddown(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (!crypto_simd_usable()) {</div><div class='del'>-			chacha_crypt_generic(state, walk.dst.virt.addr,</div><div class='del'>-					     walk.src.virt.addr, nbytes,</div><div class='del'>-					     ctx-&gt;nrounds);</div><div class='del'>-		} else {</div><div class='del'>-			vsx_begin();</div><div class='del'>-			chacha_p10_do_8x(state, walk.dst.virt.addr,</div><div class='del'>-				      walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='del'>-			vsx_end();</div><div class='del'>-		}</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-		if (err)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_p10(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_p10_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_p10(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-	hchacha_block_arch(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_p10_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-p10",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_p10,</div><div class='del'>-		.decrypt		= chacha_p10,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-p10",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_p10,</div><div class='del'>-		.decrypt		= xchacha_p10,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-p10",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_p10,</div><div class='del'>-		.decrypt		= xchacha_p10,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_p10_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	static_branch_enable(&amp;have_p10);</div><div class='del'>-</div><div class='del'>-	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_p10_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;have_p10))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_p10_init);</div><div class='del'>-module_exit(chacha_p10_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (P10 accelerated)");</div><div class='del'>-MODULE_AUTHOR("Danny Tsen &lt;dtsen@linux.ibm.com&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-p10");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-p10");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-p10");</div><div class='head'>diff --git a/arch/powerpc/crypto/ghash.c b/arch/powerpc/crypto/ghash.c<br/>index 77eca20bc7ac..7308735bdb33 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/ghash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/ghash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/ghash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/ghash.c</a></div><div class='hunk'>@@ -11,19 +11,18 @@</div><div class='ctx'>  *   Copyright (C) 2014 - 2018 Linaro Ltd. &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include "aesp8-ppc.h"</div><div class='ctx'> #include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/ghash.h&gt;</div><div class='del'>-#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/b128ops.h&gt;</div><div class='del'>-#include "aesp8-ppc.h"</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> void gcm_init_p8(u128 htable[16], const u64 Xi[2]);</div><div class='ctx'> void gcm_gmult_p8(u64 Xi[2], const u128 htable[16]);</div><div class='hunk'>@@ -39,15 +38,12 @@ struct p8_ghash_ctx {</div><div class='ctx'> </div><div class='ctx'> struct p8_ghash_desc_ctx {</div><div class='ctx'> 	u64 shash[2];</div><div class='del'>-	u8 buffer[GHASH_DIGEST_SIZE];</div><div class='del'>-	int bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int p8_ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct p8_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	dctx-&gt;bytes = 0;</div><div class='ctx'> 	memset(dctx-&gt;shash, 0, GHASH_DIGEST_SIZE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -74,27 +70,30 @@ static int p8_ghash_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __ghash_block(struct p8_ghash_ctx *ctx,</div><div class='del'>-				 struct p8_ghash_desc_ctx *dctx)</div><div class='add'>+				 struct p8_ghash_desc_ctx *dctx,</div><div class='add'>+				 const u8 *src)</div><div class='ctx'> {</div><div class='ctx'> 	if (crypto_simd_usable()) {</div><div class='ctx'> 		preempt_disable();</div><div class='ctx'> 		pagefault_disable();</div><div class='ctx'> 		enable_kernel_vsx();</div><div class='del'>-		gcm_ghash_p8(dctx-&gt;shash, ctx-&gt;htable,</div><div class='del'>-				dctx-&gt;buffer, GHASH_DIGEST_SIZE);</div><div class='add'>+		gcm_ghash_p8(dctx-&gt;shash, ctx-&gt;htable, src, GHASH_BLOCK_SIZE);</div><div class='ctx'> 		disable_kernel_vsx();</div><div class='ctx'> 		pagefault_enable();</div><div class='ctx'> 		preempt_enable();</div><div class='ctx'> 	} else {</div><div class='del'>-		crypto_xor((u8 *)dctx-&gt;shash, dctx-&gt;buffer, GHASH_BLOCK_SIZE);</div><div class='add'>+		crypto_xor((u8 *)dctx-&gt;shash, src, GHASH_BLOCK_SIZE);</div><div class='ctx'> 		gf128mul_lle((be128 *)dctx-&gt;shash, &amp;ctx-&gt;key);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __ghash_blocks(struct p8_ghash_ctx *ctx,</div><div class='del'>-				  struct p8_ghash_desc_ctx *dctx,</div><div class='del'>-				  const u8 *src, unsigned int srclen)</div><div class='add'>+static inline int __ghash_blocks(struct p8_ghash_ctx *ctx,</div><div class='add'>+				 struct p8_ghash_desc_ctx *dctx,</div><div class='add'>+				 const u8 *src, unsigned int srclen)</div><div class='ctx'> {</div><div class='add'>+	int remain = srclen - round_down(srclen, GHASH_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	srclen -= remain;</div><div class='ctx'> 	if (crypto_simd_usable()) {</div><div class='ctx'> 		preempt_disable();</div><div class='ctx'> 		pagefault_disable();</div><div class='hunk'>@@ -105,62 +104,38 @@ static inline void __ghash_blocks(struct p8_ghash_ctx *ctx,</div><div class='ctx'> 		pagefault_enable();</div><div class='ctx'> 		preempt_enable();</div><div class='ctx'> 	} else {</div><div class='del'>-		while (srclen &gt;= GHASH_BLOCK_SIZE) {</div><div class='add'>+		do {</div><div class='ctx'> 			crypto_xor((u8 *)dctx-&gt;shash, src, GHASH_BLOCK_SIZE);</div><div class='ctx'> 			gf128mul_lle((be128 *)dctx-&gt;shash, &amp;ctx-&gt;key);</div><div class='ctx'> 			srclen -= GHASH_BLOCK_SIZE;</div><div class='ctx'> 			src += GHASH_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='add'>+		} while (srclen);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int p8_ghash_update(struct shash_desc *desc,</div><div class='ctx'> 			   const u8 *src, unsigned int srclen)</div><div class='ctx'> {</div><div class='del'>-	unsigned int len;</div><div class='ctx'> 	struct p8_ghash_ctx *ctx = crypto_tfm_ctx(crypto_shash_tfm(desc-&gt;tfm));</div><div class='ctx'> 	struct p8_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		if (dctx-&gt;bytes + srclen &lt; GHASH_DIGEST_SIZE) {</div><div class='del'>-			memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src,</div><div class='del'>-				srclen);</div><div class='del'>-			dctx-&gt;bytes += srclen;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src,</div><div class='del'>-			GHASH_DIGEST_SIZE - dctx-&gt;bytes);</div><div class='del'>-</div><div class='del'>-		__ghash_block(ctx, dctx);</div><div class='del'>-</div><div class='del'>-		src += GHASH_DIGEST_SIZE - dctx-&gt;bytes;</div><div class='del'>-		srclen -= GHASH_DIGEST_SIZE - dctx-&gt;bytes;</div><div class='del'>-		dctx-&gt;bytes = 0;</div><div class='del'>-	}</div><div class='del'>-	len = srclen &amp; ~(GHASH_DIGEST_SIZE - 1);</div><div class='del'>-	if (len) {</div><div class='del'>-		__ghash_blocks(ctx, dctx, src, len);</div><div class='del'>-		src += len;</div><div class='del'>-		srclen -= len;</div><div class='del'>-	}</div><div class='del'>-	if (srclen) {</div><div class='del'>-		memcpy(dctx-&gt;buffer, src, srclen);</div><div class='del'>-		dctx-&gt;bytes = srclen;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	return __ghash_blocks(ctx, dctx, src, srclen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int p8_ghash_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int p8_ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			  unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	struct p8_ghash_ctx *ctx = crypto_tfm_ctx(crypto_shash_tfm(desc-&gt;tfm));</div><div class='ctx'> 	struct p8_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		for (i = dctx-&gt;bytes; i &lt; GHASH_DIGEST_SIZE; i++)</div><div class='del'>-			dctx-&gt;buffer[i] = 0;</div><div class='del'>-		__ghash_block(ctx, dctx);</div><div class='del'>-		dctx-&gt;bytes = 0;</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='add'>+</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		__ghash_block(ctx, dctx, buf);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='ctx'> 	memcpy(out, dctx-&gt;shash, GHASH_DIGEST_SIZE);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -170,14 +145,14 @@ struct shash_alg p8_ghash_alg = {</div><div class='ctx'> 	.digestsize = GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init = p8_ghash_init,</div><div class='ctx'> 	.update = p8_ghash_update,</div><div class='del'>-	.final = p8_ghash_final,</div><div class='add'>+	.finup = p8_ghash_finup,</div><div class='ctx'> 	.setkey = p8_ghash_setkey,</div><div class='del'>-	.descsize = sizeof(struct p8_ghash_desc_ctx)</div><div class='del'>-		+ sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.descsize = sizeof(struct p8_ghash_desc_ctx),</div><div class='ctx'> 	.base = {</div><div class='ctx'> 		 .cra_name = "ghash",</div><div class='ctx'> 		 .cra_driver_name = "p8_ghash",</div><div class='ctx'> 		 .cra_priority = 1000,</div><div class='add'>+		 .cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		 .cra_blocksize = GHASH_BLOCK_SIZE,</div><div class='ctx'> 		 .cra_ctxsize = sizeof(struct p8_ghash_ctx),</div><div class='ctx'> 		 .cra_module = THIS_MODULE,</div><div class='head'>diff --git a/arch/powerpc/crypto/md5-glue.c b/arch/powerpc/crypto/md5-glue.c<br/>index c24f605033bd..204440a90cd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/md5-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/md5-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/md5-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/md5-glue.c</a></div><div class='hunk'>@@ -8,25 +8,13 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/md5.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void ppc_md5_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='ctx'> </div><div class='del'>-static inline void ppc_md5_clear_context(struct md5_state *sctx)</div><div class='del'>-{</div><div class='del'>-	int count = sizeof(struct md5_state) &gt;&gt; 2;</div><div class='del'>-	u32 *ptr = (u32 *)sctx;</div><div class='del'>-</div><div class='del'>-	/* make sure we can clear the fast way */</div><div class='del'>-	BUILD_BUG_ON(sizeof(struct md5_state) % 4);</div><div class='del'>-	do { *ptr++ = 0; } while (--count);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ppc_md5_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='hunk'>@@ -44,79 +32,34 @@ static int ppc_md5_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	unsigned int avail = 64 - offset;</div><div class='del'>-	const u8 *src = data;</div><div class='ctx'> </div><div class='del'>-	sctx-&gt;byte_count += len;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		memcpy((char *)sctx-&gt;block + offset, src, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (offset) {</div><div class='del'>-		memcpy((char *)sctx-&gt;block + offset, src, avail);</div><div class='del'>-		ppc_md5_transform(sctx-&gt;hash, (const u8 *)sctx-&gt;block, 1);</div><div class='del'>-		len -= avail;</div><div class='del'>-		src += avail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len &gt; 63) {</div><div class='del'>-		ppc_md5_transform(sctx-&gt;hash, src, len &gt;&gt; 6);</div><div class='del'>-		src += len &amp; ~0x3f;</div><div class='del'>-		len &amp;= 0x3f;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)sctx-&gt;block, src, len);</div><div class='del'>-	return 0;</div><div class='add'>+	sctx-&gt;byte_count += round_down(len, MD5_HMAC_BLOCK_SIZE);</div><div class='add'>+	ppc_md5_transform(sctx-&gt;hash, data, len &gt;&gt; 6);</div><div class='add'>+	return len - round_down(len, MD5_HMAC_BLOCK_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ppc_md5_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int ppc_md5_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			 unsigned int offset, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	const u8 *src = (const u8 *)sctx-&gt;block;</div><div class='del'>-	u8 *p = (u8 *)src + offset;</div><div class='del'>-	int padlen = 55 - offset;</div><div class='del'>-	__le64 *pbits = (__le64 *)((char *)sctx-&gt;block + 56);</div><div class='add'>+	__le64 block[MD5_BLOCK_WORDS] = {};</div><div class='add'>+	u8 *p = memcpy(block, src, offset);</div><div class='ctx'> 	__le32 *dst = (__le32 *)out;</div><div class='add'>+	__le64 *pbits;</div><div class='ctx'> </div><div class='add'>+	src = p;</div><div class='add'>+	p += offset;</div><div class='ctx'> 	*p++ = 0x80;</div><div class='del'>-</div><div class='del'>-	if (padlen &lt; 0) {</div><div class='del'>-		memset(p, 0x00, padlen + sizeof (u64));</div><div class='del'>-		ppc_md5_transform(sctx-&gt;hash, src, 1);</div><div class='del'>-		p = (char *)sctx-&gt;block;</div><div class='del'>-		padlen = 56;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(p, 0, padlen);</div><div class='add'>+	sctx-&gt;byte_count += offset;</div><div class='add'>+	pbits = &amp;block[(MD5_BLOCK_WORDS / (offset &gt; 55 ? 1 : 2)) - 1];</div><div class='ctx'> 	*pbits = cpu_to_le64(sctx-&gt;byte_count &lt;&lt; 3);</div><div class='del'>-	ppc_md5_transform(sctx-&gt;hash, src, 1);</div><div class='add'>+	ppc_md5_transform(sctx-&gt;hash, src, (pbits - block + 1) / 8);</div><div class='add'>+	memzero_explicit(block, sizeof(block));</div><div class='ctx'> </div><div class='ctx'> 	dst[0] = cpu_to_le32(sctx-&gt;hash[0]);</div><div class='ctx'> 	dst[1] = cpu_to_le32(sctx-&gt;hash[1]);</div><div class='ctx'> 	dst[2] = cpu_to_le32(sctx-&gt;hash[2]);</div><div class='ctx'> 	dst[3] = cpu_to_le32(sctx-&gt;hash[3]);</div><div class='del'>-</div><div class='del'>-	ppc_md5_clear_context(sctx);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_md5_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_md5_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -124,15 +67,13 @@ static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	MD5_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	ppc_md5_init,</div><div class='ctx'> 	.update		=	ppc_md5_update,</div><div class='del'>-	.final		=	ppc_md5_final,</div><div class='del'>-	.export		=	ppc_md5_export,</div><div class='del'>-	.import		=	ppc_md5_import,</div><div class='del'>-	.descsize	=	sizeof(struct md5_state),</div><div class='del'>-	.statesize	=	sizeof(struct md5_state),</div><div class='add'>+	.finup		=	ppc_md5_finup,</div><div class='add'>+	.descsize	=	MD5_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"md5",</div><div class='ctx'> 		.cra_driver_name=	"md5-ppc",</div><div class='ctx'> 		.cra_priority	=	200,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	MD5_HMAC_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/crypto/poly1305-p10-glue.c b/arch/powerpc/crypto/poly1305-p10-glue.c<br/>deleted file mode 100644<br/>index 369686e9370b..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/poly1305-p10-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/poly1305-p10-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,186 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Poly1305 authenticator algorithm, RFC7539.</div><div class='del'>- *</div><div class='del'>- * Copyright 2023- IBM Corp. All rights reserved.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void poly1305_p10le_4blocks(void *h, const u8 *m, u32 mlen);</div><div class='del'>-asmlinkage void poly1305_64s(void *h, const u8 *m, u32 mlen, int highbit);</div><div class='del'>-asmlinkage void poly1305_emit_64(void *h, void *s, u8 *dst);</div><div class='del'>-</div><div class='del'>-static void vsx_begin(void)</div><div class='del'>-{</div><div class='del'>-	preempt_disable();</div><div class='del'>-	enable_kernel_vsx();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void vsx_end(void)</div><div class='del'>-{</div><div class='del'>-	disable_kernel_vsx();</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_p10_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	poly1305_core_init(&amp;dctx-&gt;h);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int crypto_poly1305_setdctxkey(struct poly1305_desc_ctx *dctx,</div><div class='del'>-					       const u8 *inp, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int acc = 0;</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset &amp;&amp; len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			struct poly1305_core_key *key = &amp;dctx-&gt;core_r;</div><div class='del'>-</div><div class='del'>-			key-&gt;key.r64[0] = get_unaligned_le64(&amp;inp[0]);</div><div class='del'>-			key-&gt;key.r64[1] = get_unaligned_le64(&amp;inp[8]);</div><div class='del'>-			inp += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			acc += POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(&amp;inp[0]);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(&amp;inp[4]);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(&amp;inp[8]);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(&amp;inp[12]);</div><div class='del'>-			acc += POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return acc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_p10_update(struct shash_desc *desc,</div><div class='del'>-				      const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int bytes, used;</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		srclen -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			if (likely(!crypto_poly1305_setdctxkey(dctx, dctx-&gt;buf,</div><div class='del'>-							       POLY1305_BLOCK_SIZE))) {</div><div class='del'>-				vsx_begin();</div><div class='del'>-				poly1305_64s(&amp;dctx-&gt;h, dctx-&gt;buf,</div><div class='del'>-						  POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-				vsx_end();</div><div class='del'>-			}</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(srclen &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		bytes = round_down(srclen, POLY1305_BLOCK_SIZE);</div><div class='del'>-		used = crypto_poly1305_setdctxkey(dctx, src, bytes);</div><div class='del'>-		if (likely(used)) {</div><div class='del'>-			srclen -= used;</div><div class='del'>-			src += used;</div><div class='del'>-		}</div><div class='del'>-		if (crypto_simd_usable() &amp;&amp; (srclen &gt;= POLY1305_BLOCK_SIZE*4)) {</div><div class='del'>-			vsx_begin();</div><div class='del'>-			poly1305_p10le_4blocks(&amp;dctx-&gt;h, src, srclen);</div><div class='del'>-			vsx_end();</div><div class='del'>-			src += srclen - (srclen % (POLY1305_BLOCK_SIZE * 4));</div><div class='del'>-			srclen %= POLY1305_BLOCK_SIZE * 4;</div><div class='del'>-		}</div><div class='del'>-		while (srclen &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			vsx_begin();</div><div class='del'>-			poly1305_64s(&amp;dctx-&gt;h, src, POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			vsx_end();</div><div class='del'>-			srclen -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(srclen)) {</div><div class='del'>-		dctx-&gt;buflen = srclen;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, srclen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_p10_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	if ((dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		vsx_begin();</div><div class='del'>-		poly1305_64s(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-		vsx_end();</div><div class='del'>-		dctx-&gt;buflen = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_emit_64(&amp;dctx-&gt;h, &amp;dctx-&gt;s, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg poly1305_alg = {</div><div class='del'>-	.digestsize	= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.init		= crypto_poly1305_p10_init,</div><div class='del'>-	.update		= crypto_poly1305_p10_update,</div><div class='del'>-	.final		= crypto_poly1305_p10_final,</div><div class='del'>-	.descsize	= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-	.base		= {</div><div class='del'>-		.cra_name		= "poly1305",</div><div class='del'>-		.cra_driver_name	= "poly1305-p10",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= POLY1305_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init poly1305_p10_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit poly1305_p10_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(PPC_MODULE_FEATURE_P10, poly1305_p10_init);</div><div class='del'>-module_exit(poly1305_p10_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Danny Tsen &lt;dtsen@linux.ibm.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Optimized Poly1305 for P10");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-p10");</div><div class='head'>diff --git a/arch/powerpc/crypto/sha1-spe-glue.c b/arch/powerpc/crypto/sha1-spe-glue.c<br/>index 9170892a8557..04c88e173ce1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/sha1-spe-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/sha1-spe-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/sha1-spe-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/sha1-spe-glue.c</a></div><div class='hunk'>@@ -7,16 +7,13 @@</div><div class='ctx'>  * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * MAX_BYTES defines the number of bytes that are allowed to be processed</div><div class='hunk'>@@ -30,7 +27,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define MAX_BYTES 2048</div><div class='ctx'> </div><div class='del'>-extern void ppc_spe_sha1_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='add'>+asmlinkage void ppc_spe_sha1_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='ctx'> </div><div class='ctx'> static void spe_begin(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -46,126 +43,45 @@ static void spe_end(void)</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void ppc_sha1_clear_context(struct sha1_state *sctx)</div><div class='add'>+static void ppc_spe_sha1_block(struct sha1_state *sctx, const u8 *src,</div><div class='add'>+			       int blocks)</div><div class='ctx'> {</div><div class='del'>-	int count = sizeof(struct sha1_state) &gt;&gt; 2;</div><div class='del'>-	u32 *ptr = (u32 *)sctx;</div><div class='del'>-</div><div class='del'>-	/* make sure we can clear the fast way */</div><div class='del'>-	BUILD_BUG_ON(sizeof(struct sha1_state) % 4);</div><div class='del'>-	do { *ptr++ = 0; } while (--count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	const unsigned int avail = 64 - offset;</div><div class='del'>-	unsigned int bytes;</div><div class='del'>-	const u8 *src = data;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		memcpy((char *)sctx-&gt;buffer + offset, src, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-</div><div class='del'>-	if (offset) {</div><div class='del'>-		memcpy((char *)sctx-&gt;buffer + offset, src, avail);</div><div class='add'>+	do {</div><div class='add'>+		int unit = min(blocks, MAX_BYTES / SHA1_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 		spe_begin();</div><div class='del'>-		ppc_spe_sha1_transform(sctx-&gt;state, (const u8 *)sctx-&gt;buffer, 1);</div><div class='add'>+		ppc_spe_sha1_transform(sctx-&gt;state, src, unit);</div><div class='ctx'> 		spe_end();</div><div class='ctx'> </div><div class='del'>-		len -= avail;</div><div class='del'>-		src += avail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (len &gt; 63) {</div><div class='del'>-		bytes = (len &gt; MAX_BYTES) ? MAX_BYTES : len;</div><div class='del'>-		bytes = bytes &amp; ~0x3f;</div><div class='del'>-</div><div class='del'>-		spe_begin();</div><div class='del'>-		ppc_spe_sha1_transform(sctx-&gt;state, src, bytes &gt;&gt; 6);</div><div class='del'>-		spe_end();</div><div class='del'>-</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)sctx-&gt;buffer, src, len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha1_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	char *p = (char *)sctx-&gt;buffer + offset;</div><div class='del'>-	int padlen;</div><div class='del'>-	__be64 *pbits = (__be64 *)(((char *)&amp;sctx-&gt;buffer) + 56);</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-</div><div class='del'>-	padlen = 55 - offset;</div><div class='del'>-	*p++ = 0x80;</div><div class='del'>-</div><div class='del'>-	spe_begin();</div><div class='del'>-</div><div class='del'>-	if (padlen &lt; 0) {</div><div class='del'>-		memset(p, 0x00, padlen + sizeof (u64));</div><div class='del'>-		ppc_spe_sha1_transform(sctx-&gt;state, sctx-&gt;buffer, 1);</div><div class='del'>-		p = (char *)sctx-&gt;buffer;</div><div class='del'>-		padlen = 56;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(p, 0, padlen);</div><div class='del'>-	*pbits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-	ppc_spe_sha1_transform(sctx-&gt;state, sctx-&gt;buffer, 1);</div><div class='del'>-</div><div class='del'>-	spe_end();</div><div class='del'>-</div><div class='del'>-	dst[0] = cpu_to_be32(sctx-&gt;state[0]);</div><div class='del'>-	dst[1] = cpu_to_be32(sctx-&gt;state[1]);</div><div class='del'>-	dst[2] = cpu_to_be32(sctx-&gt;state[2]);</div><div class='del'>-	dst[3] = cpu_to_be32(sctx-&gt;state[3]);</div><div class='del'>-	dst[4] = cpu_to_be32(sctx-&gt;state[4]);</div><div class='del'>-</div><div class='del'>-	ppc_sha1_clear_context(sctx);</div><div class='del'>-	return 0;</div><div class='add'>+		src += unit * SHA1_BLOCK_SIZE;</div><div class='add'>+		blocks -= unit;</div><div class='add'>+	} while (blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ppc_spe_sha1_export(struct shash_desc *desc, void *out)</div><div class='add'>+static int ppc_spe_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='add'>+	return sha1_base_do_update_blocks(desc, data, len, ppc_spe_sha1_block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ppc_spe_sha1_import(struct shash_desc *desc, const void *in)</div><div class='add'>+static int ppc_spe_sha1_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			      unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='add'>+	sha1_base_do_finup(desc, src, len, ppc_spe_sha1_block);</div><div class='add'>+	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	ppc_spe_sha1_update,</div><div class='del'>-	.final		=	ppc_spe_sha1_final,</div><div class='del'>-	.export		=	ppc_spe_sha1_export,</div><div class='del'>-	.import		=	ppc_spe_sha1_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='add'>+	.finup		=	ppc_spe_sha1_finup,</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name=	"sha1-ppc-spe",</div><div class='ctx'> 		.cra_priority	=	300,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/crypto/sha1.c b/arch/powerpc/crypto/sha1.c<br/>index f283bbd3f121..4593946aa9b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/sha1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/sha1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/sha1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/crypto/sha1.c</a></div><div class='hunk'>@@ -13,107 +13,46 @@</div><div class='ctx'>  * Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-</div><div class='del'>-void powerpc_sha_transform(u32 *state, const u8 *src);</div><div class='del'>-</div><div class='del'>-static int powerpc_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			       unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial, done;</div><div class='del'>-	const u8 *src;</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt; 63) {</div><div class='del'>-</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buffer + partial, data, done + 64);</div><div class='del'>-			src = sctx-&gt;buffer;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			powerpc_sha_transform(sctx-&gt;state, src);</div><div class='del'>-			done += 64;</div><div class='del'>-			src = data + done;</div><div class='del'>-		} while (done + 63 &lt; len);</div><div class='del'>-</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy(sctx-&gt;buffer + partial, src, len - done);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='add'>+asmlinkage void powerpc_sha_transform(u32 *state, const u8 *src);</div><div class='ctx'> </div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int powerpc_sha1_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static void powerpc_sha_block(struct sha1_state *sctx, const u8 *data,</div><div class='add'>+			      int blocks)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	u32 i, index, padlen;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 */</div><div class='del'>-	index = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	padlen = (index &lt; 56) ? (56 - index) : ((64+56) - index);</div><div class='del'>-	powerpc_sha1_update(desc, padding, padlen);</div><div class='del'>-</div><div class='del'>-	/* Append length */</div><div class='del'>-	powerpc_sha1_update(desc, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 5; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(sctx, 0, sizeof *sctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	do {</div><div class='add'>+		powerpc_sha_transform(sctx-&gt;state, data);</div><div class='add'>+		data += 64;</div><div class='add'>+	} while (--blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int powerpc_sha1_export(struct shash_desc *desc, void *out)</div><div class='add'>+static int powerpc_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			       unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='add'>+	return sha1_base_do_update_blocks(desc, data, len, powerpc_sha_block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int powerpc_sha1_import(struct shash_desc *desc, const void *in)</div><div class='add'>+/* Add padding and return the message digest. */</div><div class='add'>+static int powerpc_sha1_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			      unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='add'>+	sha1_base_do_finup(desc, src, len, powerpc_sha_block);</div><div class='add'>+	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	powerpc_sha1_update,</div><div class='del'>-	.final		=	powerpc_sha1_final,</div><div class='del'>-	.export		=	powerpc_sha1_export,</div><div class='del'>-	.import		=	powerpc_sha1_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='add'>+	.finup		=	powerpc_sha1_finup,</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name=	"sha1-powerpc",</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/powerpc/crypto/sha256-spe-glue.c b/arch/powerpc/crypto/sha256-spe-glue.c<br/>deleted file mode 100644<br/>index 2997d13236e0..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/sha256-spe-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/sha256-spe-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,235 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Glue code for SHA-256 implementation for SPE instructions (PPC)</div><div class='del'>- *</div><div class='del'>- * Based on generic implementation. The assembler module takes care </div><div class='del'>- * about the SPE registers so it can run from interrupt context.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='del'>-#include &lt;linux/hardirq.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MAX_BYTES defines the number of bytes that are allowed to be processed</div><div class='del'>- * between preempt_disable() and preempt_enable(). SHA256 takes ~2,000</div><div class='del'>- * operations per 64 bytes. e500 cores can issue two arithmetic instructions</div><div class='del'>- * per clock cycle using one 32/64 bit unit (SU1) and one 32 bit unit (SU2).</div><div class='del'>- * Thus 1KB of input data will need an estimated maximum of 18,000 cycles.</div><div class='del'>- * Headroom for cache misses included. Even with the low end model clocked</div><div class='del'>- * at 667 MHz this equals to a critical time window of less than 27us.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-#define MAX_BYTES 1024</div><div class='del'>-</div><div class='del'>-extern void ppc_spe_sha256_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='del'>-</div><div class='del'>-static void spe_begin(void)</div><div class='del'>-{</div><div class='del'>-	/* We just start SPE operations and will save SPE registers later. */</div><div class='del'>-	preempt_disable();</div><div class='del'>-	enable_kernel_spe();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spe_end(void)</div><div class='del'>-{</div><div class='del'>-	disable_kernel_spe();</div><div class='del'>-	/* reenable preemption */</div><div class='del'>-	preempt_enable();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ppc_sha256_clear_context(struct sha256_state *sctx)</div><div class='del'>-{</div><div class='del'>-	int count = sizeof(struct sha256_state) &gt;&gt; 2;</div><div class='del'>-	u32 *ptr = (u32 *)sctx;</div><div class='del'>-</div><div class='del'>-	/* make sure we can clear the fast way */</div><div class='del'>-	BUILD_BUG_ON(sizeof(struct sha256_state) % 4);</div><div class='del'>-	do { *ptr++ = 0; } while (--count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	const unsigned int avail = 64 - offset;</div><div class='del'>-	unsigned int bytes;</div><div class='del'>-	const u8 *src = data;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		memcpy((char *)sctx-&gt;buf + offset, src, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-</div><div class='del'>-	if (offset) {</div><div class='del'>-		memcpy((char *)sctx-&gt;buf + offset, src, avail);</div><div class='del'>-</div><div class='del'>-		spe_begin();</div><div class='del'>-		ppc_spe_sha256_transform(sctx-&gt;state, (const u8 *)sctx-&gt;buf, 1);</div><div class='del'>-		spe_end();</div><div class='del'>-</div><div class='del'>-		len -= avail;</div><div class='del'>-		src += avail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (len &gt; 63) {</div><div class='del'>-		/* cut input data into smaller blocks */</div><div class='del'>-		bytes = (len &gt; MAX_BYTES) ? MAX_BYTES : len;</div><div class='del'>-		bytes = bytes &amp; ~0x3f;</div><div class='del'>-</div><div class='del'>-		spe_begin();</div><div class='del'>-		ppc_spe_sha256_transform(sctx-&gt;state, src, bytes &gt;&gt; 6);</div><div class='del'>-		spe_end();</div><div class='del'>-</div><div class='del'>-		src += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)sctx-&gt;buf, src, len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	char *p = (char *)sctx-&gt;buf + offset;</div><div class='del'>-	int padlen;</div><div class='del'>-	__be64 *pbits = (__be64 *)(((char *)&amp;sctx-&gt;buf) + 56);</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-</div><div class='del'>-	padlen = 55 - offset;</div><div class='del'>-	*p++ = 0x80;</div><div class='del'>-</div><div class='del'>-	spe_begin();</div><div class='del'>-</div><div class='del'>-	if (padlen &lt; 0) {</div><div class='del'>-		memset(p, 0x00, padlen + sizeof (u64));</div><div class='del'>-		ppc_spe_sha256_transform(sctx-&gt;state, sctx-&gt;buf, 1);</div><div class='del'>-		p = (char *)sctx-&gt;buf;</div><div class='del'>-		padlen = 56;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(p, 0, padlen);</div><div class='del'>-	*pbits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-	ppc_spe_sha256_transform(sctx-&gt;state, sctx-&gt;buf, 1);</div><div class='del'>-</div><div class='del'>-	spe_end();</div><div class='del'>-</div><div class='del'>-	dst[0] = cpu_to_be32(sctx-&gt;state[0]);</div><div class='del'>-	dst[1] = cpu_to_be32(sctx-&gt;state[1]);</div><div class='del'>-	dst[2] = cpu_to_be32(sctx-&gt;state[2]);</div><div class='del'>-	dst[3] = cpu_to_be32(sctx-&gt;state[3]);</div><div class='del'>-	dst[4] = cpu_to_be32(sctx-&gt;state[4]);</div><div class='del'>-	dst[5] = cpu_to_be32(sctx-&gt;state[5]);</div><div class='del'>-	dst[6] = cpu_to_be32(sctx-&gt;state[6]);</div><div class='del'>-	dst[7] = cpu_to_be32(sctx-&gt;state[7]);</div><div class='del'>-</div><div class='del'>-	ppc_sha256_clear_context(sctx);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha224_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	__be32 D[SHA256_DIGEST_SIZE &gt;&gt; 2];</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-</div><div class='del'>-	ppc_spe_sha256_final(desc, (u8 *)D);</div><div class='del'>-</div><div class='del'>-	/* avoid bytewise memcpy */</div><div class='del'>-	dst[0] = D[0];</div><div class='del'>-	dst[1] = D[1];</div><div class='del'>-	dst[2] = D[2];</div><div class='del'>-	dst[3] = D[3];</div><div class='del'>-	dst[4] = D[4];</div><div class='del'>-	dst[5] = D[5];</div><div class='del'>-	dst[6] = D[6];</div><div class='del'>-</div><div class='del'>-	/* clear sensitive data */</div><div class='del'>-	memzero_explicit(D, SHA256_DIGEST_SIZE);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ppc_spe_sha256_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg algs[2] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	ppc_spe_sha256_update,</div><div class='del'>-	.final		=	ppc_spe_sha256_final,</div><div class='del'>-	.export		=	ppc_spe_sha256_export,</div><div class='del'>-	.import		=	ppc_spe_sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name=	"sha256-ppc-spe",</div><div class='del'>-		.cra_priority	=	300,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	ppc_spe_sha256_update,</div><div class='del'>-	.final		=	ppc_spe_sha224_final,</div><div class='del'>-	.export		=	ppc_spe_sha256_export,</div><div class='del'>-	.import		=	ppc_spe_sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name=	"sha224-ppc-spe",</div><div class='del'>-		.cra_priority	=	300,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init ppc_spe_sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ppc_spe_sha256_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ppc_spe_sha256_mod_init);</div><div class='del'>-module_exit(ppc_spe_sha256_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, SPE optimized");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224-ppc-spe");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256-ppc-spe");</div><div class='head'>diff --git a/arch/powerpc/include/asm/guest-state-buffer.h b/arch/powerpc/include/asm/guest-state-buffer.h<br/>index d107abe1468f..acd61eb36d59 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/guest-state-buffer.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/guest-state-buffer.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/guest-state-buffer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/asm/guest-state-buffer.h</a></div><div class='hunk'>@@ -28,6 +28,21 @@</div><div class='ctx'>  /* Process Table Info */</div><div class='ctx'> #define KVMPPC_GSID_PROCESS_TABLE		0x0006</div><div class='ctx'> </div><div class='add'>+/* Guest Management Heap Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_HEAP		0x0800</div><div class='add'>+</div><div class='add'>+/* Guest Management Heap Max Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_HEAP_MAX		0x0801</div><div class='add'>+</div><div class='add'>+/* Guest Pagetable Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE	0x0802</div><div class='add'>+</div><div class='add'>+/* Guest Pagetable Max Size */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX	0x0803</div><div class='add'>+</div><div class='add'>+/* Guest Pagetable Reclaim in bytes */</div><div class='add'>+#define KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM	0x0804</div><div class='add'>+</div><div class='ctx'> /* H_GUEST_RUN_VCPU input buffer Info */</div><div class='ctx'> #define KVMPPC_GSID_RUN_INPUT			0x0C00</div><div class='ctx'> /* H_GUEST_RUN_VCPU output buffer Info */</div><div class='hunk'>@@ -106,6 +121,11 @@</div><div class='ctx'> #define KVMPPC_GSE_GUESTWIDE_COUNT \</div><div class='ctx'> 	(KVMPPC_GSE_GUESTWIDE_END - KVMPPC_GSE_GUESTWIDE_START + 1)</div><div class='ctx'> </div><div class='add'>+#define KVMPPC_GSE_HOSTWIDE_START KVMPPC_GSID_L0_GUEST_HEAP</div><div class='add'>+#define KVMPPC_GSE_HOSTWIDE_END KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM</div><div class='add'>+#define KVMPPC_GSE_HOSTWIDE_COUNT \</div><div class='add'>+	(KVMPPC_GSE_HOSTWIDE_END - KVMPPC_GSE_HOSTWIDE_START + 1)</div><div class='add'>+</div><div class='ctx'> #define KVMPPC_GSE_META_START KVMPPC_GSID_RUN_INPUT</div><div class='ctx'> #define KVMPPC_GSE_META_END KVMPPC_GSID_VPA</div><div class='ctx'> #define KVMPPC_GSE_META_COUNT (KVMPPC_GSE_META_END - KVMPPC_GSE_META_START + 1)</div><div class='hunk'>@@ -130,7 +150,8 @@</div><div class='ctx'> 	(KVMPPC_GSE_INTR_REGS_END - KVMPPC_GSE_INTR_REGS_START + 1)</div><div class='ctx'> </div><div class='ctx'> #define KVMPPC_GSE_IDEN_COUNT                                 \</div><div class='del'>-	(KVMPPC_GSE_GUESTWIDE_COUNT + KVMPPC_GSE_META_COUNT + \</div><div class='add'>+	(KVMPPC_GSE_HOSTWIDE_COUNT + \</div><div class='add'>+	 KVMPPC_GSE_GUESTWIDE_COUNT + KVMPPC_GSE_META_COUNT + \</div><div class='ctx'> 	 KVMPPC_GSE_DW_REGS_COUNT + KVMPPC_GSE_W_REGS_COUNT + \</div><div class='ctx'> 	 KVMPPC_GSE_VSRS_COUNT + KVMPPC_GSE_INTR_REGS_COUNT)</div><div class='ctx'> </div><div class='hunk'>@@ -139,10 +160,11 @@</div><div class='ctx'>  */</div><div class='ctx'> enum {</div><div class='ctx'> 	KVMPPC_GS_CLASS_GUESTWIDE = 0x01,</div><div class='del'>-	KVMPPC_GS_CLASS_META = 0x02,</div><div class='del'>-	KVMPPC_GS_CLASS_DWORD_REG = 0x04,</div><div class='del'>-	KVMPPC_GS_CLASS_WORD_REG = 0x08,</div><div class='del'>-	KVMPPC_GS_CLASS_VECTOR = 0x10,</div><div class='add'>+	KVMPPC_GS_CLASS_HOSTWIDE = 0x02,</div><div class='add'>+	KVMPPC_GS_CLASS_META = 0x04,</div><div class='add'>+	KVMPPC_GS_CLASS_DWORD_REG = 0x08,</div><div class='add'>+	KVMPPC_GS_CLASS_WORD_REG = 0x10,</div><div class='add'>+	KVMPPC_GS_CLASS_VECTOR = 0x18,</div><div class='ctx'> 	KVMPPC_GS_CLASS_INTR = 0x20,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -164,6 +186,7 @@ enum {</div><div class='ctx'>  */</div><div class='ctx'> enum {</div><div class='ctx'> 	KVMPPC_GS_FLAGS_WIDE = 0x01,</div><div class='add'>+	KVMPPC_GS_FLAGS_HOST_WIDE = 0x02,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -287,7 +310,7 @@ struct kvmppc_gs_msg_ops {</div><div class='ctx'>  * struct kvmppc_gs_msg - a guest state message</div><div class='ctx'>  * @bitmap: the guest state ids that should be included</div><div class='ctx'>  * @ops: modify message behavior for reading and writing to buffers</div><div class='del'>- * @flags: guest wide or thread wide</div><div class='add'>+ * @flags: host wide, guest wide or thread wide</div><div class='ctx'>  * @data: location where buffer data will be written to or from.</div><div class='ctx'>  *</div><div class='ctx'>  * A guest state message is allows flexibility in sending in receiving data</div><div class='head'>diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h<br/>index eeef13db2770..6df6dbbe1e7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/hvcall.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/hvcall.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/hvcall.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/asm/hvcall.h</a></div><div class='hunk'>@@ -490,14 +490,15 @@</div><div class='ctx'> #define H_RPTI_PAGE_ALL (-1UL)</div><div class='ctx'> </div><div class='ctx'> /* Flags for H_GUEST_{S,G}_STATE */</div><div class='del'>-#define H_GUEST_FLAGS_WIDE     (1UL&lt;&lt;(63-0))</div><div class='add'>+#define H_GUEST_FLAGS_WIDE     (1UL &lt;&lt; (63 - 0))</div><div class='add'>+#define H_GUEST_FLAGS_HOST_WIDE	(1UL &lt;&lt; (63 - 1))</div><div class='ctx'> </div><div class='ctx'> /* Flag values used for H_{S,G}SET_GUEST_CAPABILITIES */</div><div class='del'>-#define H_GUEST_CAP_COPY_MEM	(1UL&lt;&lt;(63-0))</div><div class='del'>-#define H_GUEST_CAP_POWER9	(1UL&lt;&lt;(63-1))</div><div class='del'>-#define H_GUEST_CAP_POWER10	(1UL&lt;&lt;(63-2))</div><div class='del'>-#define H_GUEST_CAP_POWER11	(1UL&lt;&lt;(63-3))</div><div class='del'>-#define H_GUEST_CAP_BITMAP2	(1UL&lt;&lt;(63-63))</div><div class='add'>+#define H_GUEST_CAP_COPY_MEM	(1UL &lt;&lt; (63 - 0))</div><div class='add'>+#define H_GUEST_CAP_POWER9	(1UL &lt;&lt; (63 - 1))</div><div class='add'>+#define H_GUEST_CAP_POWER10	(1UL &lt;&lt; (63 - 2))</div><div class='add'>+#define H_GUEST_CAP_POWER11	(1UL &lt;&lt; (63 - 3))</div><div class='add'>+#define H_GUEST_CAP_BITMAP2	(1UL &lt;&lt; (63 - 63))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Defines for H_HTM - Macros for hardware trace macro (HTM) function.</div><div class='head'>diff --git a/arch/powerpc/include/asm/plpar_wrappers.h b/arch/powerpc/include/asm/plpar_wrappers.h<br/>index 91be7b885944..f2b6cc4341bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/plpar_wrappers.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/plpar_wrappers.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/plpar_wrappers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/asm/plpar_wrappers.h</a></div><div class='hunk'>@@ -65,6 +65,14 @@ static inline long register_dtl(unsigned long cpu, unsigned long vpa)</div><div class='ctx'> 	return vpa_call(H_VPA_REG_DTL, cpu, vpa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Invokes H_HTM hcall with parameters passed from htm_hcall_wrapper.</div><div class='add'>+ * flags: Set to hardwareTarget.</div><div class='add'>+ * target: Specifies target using node index, nodal chip index and core index.</div><div class='add'>+ * operation : action to perform ie configure, start, stop, deconfigure, trace</div><div class='add'>+ * based on the HTM type.</div><div class='add'>+ * param1, param2, param3: parameters for each action.</div><div class='add'>+ */</div><div class='ctx'> static inline long htm_call(unsigned long flags, unsigned long target,</div><div class='ctx'>                unsigned long operation, unsigned long param1,</div><div class='ctx'>                unsigned long param2, unsigned long param3)</div><div class='hunk'>@@ -73,17 +81,17 @@ static inline long htm_call(unsigned long flags, unsigned long target,</div><div class='ctx'>                                  param1, param2, param3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline long htm_get_dump_hardware(unsigned long nodeindex,</div><div class='add'>+static inline long htm_hcall_wrapper(unsigned long flags, unsigned long nodeindex,</div><div class='ctx'>                unsigned long nodalchipindex, unsigned long coreindexonchip,</div><div class='del'>-               unsigned long type, unsigned long addr, unsigned long size,</div><div class='del'>-               unsigned long offset)</div><div class='add'>+	       unsigned long type, unsigned long htm_op, unsigned long param1, unsigned long param2,</div><div class='add'>+	       unsigned long param3)</div><div class='ctx'> {</div><div class='del'>-       return htm_call(H_HTM_FLAGS_HARDWARE_TARGET,</div><div class='add'>+	return htm_call(H_HTM_FLAGS_HARDWARE_TARGET | flags,</div><div class='ctx'>                        H_HTM_TARGET_NODE_INDEX(nodeindex) |</div><div class='ctx'>                        H_HTM_TARGET_NODAL_CHIP_INDEX(nodalchipindex) |</div><div class='ctx'>                        H_HTM_TARGET_CORE_INDEX_ON_CHIP(coreindexonchip),</div><div class='del'>-                       H_HTM_OP(H_HTM_OP_DUMP_DATA) | H_HTM_TYPE(type),</div><div class='del'>-                       addr, size, offset);</div><div class='add'>+		       H_HTM_OP(htm_op) | H_HTM_TYPE(type),</div><div class='add'>+		       param1, param2, param3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern void vpa_init(int cpu);</div><div class='head'>diff --git a/arch/powerpc/include/asm/preempt.h b/arch/powerpc/include/asm/preempt.h<br/>new file mode 100644<br/>index 000000000000..000e2b9681f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/preempt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/asm/preempt.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __ASM_POWERPC_PREEMPT_H</div><div class='add'>+#define __ASM_POWERPC_PREEMPT_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm-generic/preempt.h&gt;</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_PREEMPT_DYNAMIC)</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+DECLARE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);</div><div class='add'>+#define need_irq_preemption() \</div><div class='add'>+	(static_branch_unlikely(&amp;sk_dynamic_irqentry_exit_cond_resched))</div><div class='add'>+#else</div><div class='add'>+#define need_irq_preemption()   (IS_ENABLED(CONFIG_PREEMPTION))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __ASM_POWERPC_PREEMPT_H */</div><div class='head'>diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h<br/>index 04406162fc5a..75fa0293c508 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/rtas.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/include/asm/rtas.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/asm/rtas.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/asm/rtas.h</a></div><div class='hunk'>@@ -515,6 +515,10 @@ extern char rtas_data_buf[RTAS_DATA_BUF_SIZE];</div><div class='ctx'> extern unsigned long rtas_rmo_buf;</div><div class='ctx'> </div><div class='ctx'> extern struct mutex rtas_ibm_get_vpd_lock;</div><div class='add'>+extern struct mutex rtas_ibm_get_indices_lock;</div><div class='add'>+extern struct mutex rtas_ibm_set_dynamic_indicator_lock;</div><div class='add'>+extern struct mutex rtas_ibm_get_dynamic_sensor_state_lock;</div><div class='add'>+extern struct mutex rtas_ibm_physical_attestation_lock;</div><div class='ctx'> </div><div class='ctx'> #define GLOBAL_INTERRUPT_QUEUE 9005</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/papr-indices.h b/arch/powerpc/include/uapi/asm/papr-indices.h<br/>new file mode 100644<br/>index 000000000000..c2999d89d52a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/uapi/asm/papr-indices.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/uapi/asm/papr-indices.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_PAPR_INDICES_H_</div><div class='add'>+#define _UAPI_PAPR_INDICES_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/ioctl.h&gt;</div><div class='add'>+#include &lt;asm/papr-miscdev.h&gt;</div><div class='add'>+</div><div class='add'>+#define LOC_CODE_SIZE			80</div><div class='add'>+#define RTAS_GET_INDICES_BUF_SIZE	SZ_4K</div><div class='add'>+</div><div class='add'>+struct papr_indices_io_block {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			__u8 is_sensor; /* 0 for indicator and 1 for sensor */</div><div class='add'>+			__u32 indice_type;</div><div class='add'>+		} indices;</div><div class='add'>+		struct {</div><div class='add'>+			__u32 token; /* Sensor or indicator token */</div><div class='add'>+			__u32 state; /* get / set state */</div><div class='add'>+			/*</div><div class='add'>+			 * PAPR+ 12.3.2.4 Converged Location Code Rules - Length</div><div class='add'>+			 * Restrictions. 79 characters plus null.</div><div class='add'>+			 */</div><div class='add'>+			char location_code_str[LOC_CODE_SIZE]; /* location code */</div><div class='add'>+		} dynamic_param;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ioctls for /dev/papr-indices.</div><div class='add'>+ * PAPR_INDICES_IOC_GET: Returns a get-indices handle fd to read data</div><div class='add'>+ * PAPR_DYNAMIC_SENSOR_IOC_GET: Gets the state of the input sensor</div><div class='add'>+ * PAPR_DYNAMIC_INDICATOR_IOC_SET: Sets the new state for the input indicator</div><div class='add'>+ */</div><div class='add'>+#define PAPR_INDICES_IOC_GET		_IOW(PAPR_MISCDEV_IOC_ID, 3, struct papr_indices_io_block)</div><div class='add'>+#define PAPR_DYNAMIC_SENSOR_IOC_GET	_IOWR(PAPR_MISCDEV_IOC_ID, 4, struct papr_indices_io_block)</div><div class='add'>+#define PAPR_DYNAMIC_INDICATOR_IOC_SET	_IOW(PAPR_MISCDEV_IOC_ID, 5, struct papr_indices_io_block)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_PAPR_INDICES_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/papr-physical-attestation.h b/arch/powerpc/include/uapi/asm/papr-physical-attestation.h<br/>new file mode 100644<br/>index 000000000000..ea746837bb9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/uapi/asm/papr-physical-attestation.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/uapi/asm/papr-physical-attestation.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_PAPR_PHYSICAL_ATTESTATION_H_</div><div class='add'>+#define _UAPI_PAPR_PHYSICAL_ATTESTATION_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/ioctl.h&gt;</div><div class='add'>+#include &lt;asm/papr-miscdev.h&gt;</div><div class='add'>+</div><div class='add'>+#define PAPR_PHYATTEST_MAX_INPUT 4084 /* Max 4K buffer: 4K-12 */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Defined in PAPR 2.13+ 21.6 Attestation Command Structures.</div><div class='add'>+ * User space pass this struct and the max size should be 4K.</div><div class='add'>+ */</div><div class='add'>+struct papr_phy_attest_io_block {</div><div class='add'>+	__u8 version;</div><div class='add'>+	__u8 command;</div><div class='add'>+	__u8 TCG_major_ver;</div><div class='add'>+	__u8 TCG_minor_ver;</div><div class='add'>+	__be32 length;</div><div class='add'>+	__be32 correlator;</div><div class='add'>+	__u8 payload[PAPR_PHYATTEST_MAX_INPUT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ioctl for /dev/papr-physical-attestation. Returns a attestation</div><div class='add'>+ * command fd handle</div><div class='add'>+ */</div><div class='add'>+#define PAPR_PHY_ATTEST_IOC_HANDLE _IOW(PAPR_MISCDEV_IOC_ID, 8, struct papr_phy_attest_io_block)</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_PAPR_PHYSICAL_ATTESTATION_H_ */</div><div class='head'>diff --git a/arch/powerpc/include/uapi/asm/papr-platform-dump.h b/arch/powerpc/include/uapi/asm/papr-platform-dump.h<br/>new file mode 100644<br/>index 000000000000..8a1c060e89a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/include/uapi/asm/papr-platform-dump.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/include/uapi/asm/papr-platform-dump.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='add'>+#ifndef _UAPI_PAPR_PLATFORM_DUMP_H_</div><div class='add'>+#define _UAPI_PAPR_PLATFORM_DUMP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/ioctl.h&gt;</div><div class='add'>+#include &lt;asm/papr-miscdev.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ioctl for /dev/papr-platform-dump. Returns a platform-dump handle fd</div><div class='add'>+ * corresponding to dump tag.</div><div class='add'>+ */</div><div class='add'>+#define PAPR_PLATFORM_DUMP_IOC_CREATE_HANDLE _IOW(PAPR_MISCDEV_IOC_ID, 6, __u64)</div><div class='add'>+#define PAPR_PLATFORM_DUMP_IOC_INVALIDATE    _IOW(PAPR_MISCDEV_IOC_ID, 7, __u64)</div><div class='add'>+</div><div class='add'>+#endif /* _UAPI_PAPR_PLATFORM_DUMP_H_ */</div><div class='head'>diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile<br/>index 6ac621155ec3..9d1ab3971694 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/Makefile</a></div><div class='hunk'>@@ -160,9 +160,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> obj64-$(CONFIG_PPC_TRANSACTIONAL_MEM)	+= tm.o</div><div class='ctx'> </div><div class='del'>-ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC_CORE)(CONFIG_PPC_BOOK3S),)</div><div class='ctx'> obj-y				+= ppc_save_regs.o</div><div class='del'>-endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_EPAPR_PARAVIRT)	+= epapr_paravirt.o epapr_hcalls.o</div><div class='ctx'> obj-$(CONFIG_KVM_GUEST)		+= kvm.o kvm_emul.o</div><div class='head'>diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c<br/>index df16c7f547ab..8ca49e40c473 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/fadump.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/fadump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/fadump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/fadump.c</a></div><div class='hunk'>@@ -290,10 +290,8 @@ static void __init fadump_show_config(void)</div><div class='ctx'> 	if (!fw_dump.fadump_supported)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	pr_debug("Fadump enabled    : %s\n",</div><div class='del'>-				(fw_dump.fadump_enabled ? "yes" : "no"));</div><div class='del'>-	pr_debug("Dump Active       : %s\n",</div><div class='del'>-				(fw_dump.dump_active ? "yes" : "no"));</div><div class='add'>+	pr_debug("Fadump enabled    : %s\n", str_yes_no(fw_dump.fadump_enabled));</div><div class='add'>+	pr_debug("Dump Active       : %s\n", str_yes_no(fw_dump.dump_active));</div><div class='ctx'> 	pr_debug("Dump section sizes:\n");</div><div class='ctx'> 	pr_debug("    CPU state data size: %lx\n", fw_dump.cpu_state_data_size);</div><div class='ctx'> 	pr_debug("    HPTE region size   : %lx\n", fw_dump.hpte_region_size);</div><div class='head'>diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrupt.c<br/>index 8f4acc55407b..e0c681d0b076 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/interrupt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/interrupt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/interrupt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/interrupt.c</a></div><div class='hunk'>@@ -25,6 +25,10 @@</div><div class='ctx'> unsigned long global_dbcr0[NR_CPUS];</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_PREEMPT_DYNAMIC)</div><div class='add'>+DEFINE_STATIC_KEY_TRUE(sk_dynamic_irqentry_exit_cond_resched);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PPC_BOOK3S_64</div><div class='ctx'> DEFINE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant);</div><div class='ctx'> static inline bool exit_must_hard_disable(void)</div><div class='hunk'>@@ -396,7 +400,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs)</div><div class='ctx'> 		/* Returning to a kernel context with local irqs enabled. */</div><div class='ctx'> 		WARN_ON_ONCE(!(regs-&gt;msr &amp; MSR_EE));</div><div class='ctx'> again:</div><div class='del'>-		if (IS_ENABLED(CONFIG_PREEMPTION)) {</div><div class='add'>+		if (need_irq_preemption()) {</div><div class='ctx'> 			/* Return to preemptible kernel context */</div><div class='ctx'> 			if (unlikely(read_thread_flags() &amp; _TIF_NEED_RESCHED)) {</div><div class='ctx'> 				if (preempt_count() == 0)</div><div class='head'>diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c<br/>index 0ebae6e4c19d..244eb4857e7f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/iommu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/iommu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/iommu.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/iommu-helper.h&gt;</div><div class='hunk'>@@ -769,8 +770,8 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid,</div><div class='ctx'> 	iommu_table_clear(tbl);</div><div class='ctx'> </div><div class='ctx'> 	if (!welcomed) {</div><div class='del'>-		printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",</div><div class='del'>-		       novmerge ? "disabled" : "enabled");</div><div class='add'>+		pr_info("IOMMU table initialized, virtual merging %s\n",</div><div class='add'>+			str_disabled_enabled(novmerge));</div><div class='ctx'> 		welcomed = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c<br/>index 34a5aec4908f..126bf3b06ab7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/module_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/module_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/module_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/module_64.c</a></div><div class='hunk'>@@ -258,10 +258,6 @@ static unsigned long get_stubs_size(const Elf64_Ehdr *hdr,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (i == hdr-&gt;e_shnum) {</div><div class='del'>-		pr_err("%s: doesn't contain __patchable_function_entries.\n", me-&gt;name);</div><div class='del'>-		return -ENOEXEC;</div><div class='del'>-	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("Looks like a total of %lu stubs, max\n", relocs);</div><div class='head'>diff --git a/arch/powerpc/kernel/proc_powerpc.c b/arch/powerpc/kernel/proc_powerpc.c<br/>index 3816a2bf2b84..d083b4517065 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/proc_powerpc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/proc_powerpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/proc_powerpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/proc_powerpc.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/vdso_datapage.h&gt;</div><div class='hunk'>@@ -56,7 +57,7 @@ static int __init proc_ppc64_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct proc_dir_entry *pde;</div><div class='ctx'> </div><div class='del'>-	strcpy((char *)systemcfg-&gt;eye_catcher, "SYSTEMCFG:PPC64");</div><div class='add'>+	strscpy(systemcfg-&gt;eye_catcher, "SYSTEMCFG:PPC64");</div><div class='ctx'> 	systemcfg-&gt;version.major = SYSTEMCFG_MAJOR;</div><div class='ctx'> 	systemcfg-&gt;version.minor = SYSTEMCFG_MINOR;</div><div class='ctx'> 	systemcfg-&gt;processor = mfspr(SPRN_PVR);</div><div class='head'>diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c<br/>index ef91f71e07c4..855e09886503 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/process.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/process.c</a></div><div class='hunk'>@@ -1000,7 +1000,7 @@ static inline void tm_reclaim_task(struct task_struct *tsk)</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(tm_suspend_disabled);</div><div class='ctx'> </div><div class='del'>-	TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, "</div><div class='add'>+	TM_DEBUG("---- tm_reclaim on pid %d (NIP=%lx, "</div><div class='ctx'> 		 "ccr=%lx, msr=%lx, trap=%lx)\n",</div><div class='ctx'> 		 tsk-&gt;pid, thr-&gt;regs-&gt;nip,</div><div class='ctx'> 		 thr-&gt;regs-&gt;ccr, thr-&gt;regs-&gt;msr,</div><div class='hunk'>@@ -1008,7 +1008,7 @@ static inline void tm_reclaim_task(struct task_struct *tsk)</div><div class='ctx'> </div><div class='ctx'> 	tm_reclaim_thread(thr, TM_CAUSE_RESCHED);</div><div class='ctx'> </div><div class='del'>-	TM_DEBUG("--- tm_reclaim on pid %d complete\n",</div><div class='add'>+	TM_DEBUG("---- tm_reclaim on pid %d complete\n",</div><div class='ctx'> 		 tsk-&gt;pid);</div><div class='ctx'> </div><div class='ctx'> out_and_saveregs:</div><div class='hunk'>@@ -2367,14 +2367,14 @@ void __no_sanitize_address show_stack(struct task_struct *tsk,</div><div class='ctx'> 				(sp + STACK_INT_FRAME_REGS);</div><div class='ctx'> </div><div class='ctx'> 			lr = regs-&gt;link;</div><div class='del'>-			printk("%s--- interrupt: %lx at %pS\n",</div><div class='add'>+			printk("%s---- interrupt: %lx at %pS\n",</div><div class='ctx'> 			       loglvl, regs-&gt;trap, (void *)regs-&gt;nip);</div><div class='ctx'> </div><div class='ctx'> 			// Detect the case of an empty pt_regs at the very base</div><div class='ctx'> 			// of the stack and suppress showing it in full.</div><div class='ctx'> 			if (!empty_user_regs(regs, tsk)) {</div><div class='ctx'> 				__show_regs(regs);</div><div class='del'>-				printk("%s--- interrupt: %lx\n", loglvl, regs-&gt;trap);</div><div class='add'>+				printk("%s---- interrupt: %lx\n", loglvl, regs-&gt;trap);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			firstframe = 1;</div><div class='head'>diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c<br/>index d7a738f1858d..e61245c4468e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/rtas.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/rtas.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/rtas.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/rtas.c</a></div><div class='hunk'>@@ -92,12 +92,12 @@ struct rtas_function {</div><div class='ctx'>  * Per-function locks for sequence-based RTAS functions.</div><div class='ctx'>  */</div><div class='ctx'> static DEFINE_MUTEX(rtas_ibm_activate_firmware_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_get_indices_lock);</div><div class='ctx'> static DEFINE_MUTEX(rtas_ibm_lpar_perftools_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_physical_attestation_lock);</div><div class='del'>-static DEFINE_MUTEX(rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_physical_attestation_lock);</div><div class='ctx'> DEFINE_MUTEX(rtas_ibm_get_vpd_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_get_indices_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+DEFINE_MUTEX(rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='ctx'> </div><div class='ctx'> static struct rtas_function rtas_function_table[] __ro_after_init = {</div><div class='ctx'> 	[RTAS_FNIDX__CHECK_EXCEPTION] = {</div><div class='head'>diff --git a/arch/powerpc/kernel/trace/ftrace_entry.S b/arch/powerpc/kernel/trace/ftrace_entry.S<br/>index 2c1b24100eca..3565c67fc638 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/trace/ftrace_entry.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kernel/trace/ftrace_entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kernel/trace/ftrace_entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kernel/trace/ftrace_entry.S</a></div><div class='hunk'>@@ -212,10 +212,10 @@</div><div class='ctx'> 	bne-	1f</div><div class='ctx'> </div><div class='ctx'> 	mr	r3, r15</div><div class='add'>+1:	mtlr	r3</div><div class='ctx'> 	.if \allregs == 0</div><div class='ctx'> 	REST_GPR(15, r1)</div><div class='ctx'> 	.endif</div><div class='del'>-1:	mtlr	r3</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Restore gprs */</div><div class='head'>diff --git a/arch/powerpc/kexec/crash.c b/arch/powerpc/kexec/crash.c<br/>index 9ac3266e4965..a325c1c02f96 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kexec/crash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kexec/crash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kexec/crash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kexec/crash.c</a></div><div class='hunk'>@@ -359,7 +359,10 @@ void default_machine_crash_shutdown(struct pt_regs *regs)</div><div class='ctx'> 	if (TRAP(regs) == INTERRUPT_SYSTEM_RESET)</div><div class='ctx'> 		is_via_system_reset = 1;</div><div class='ctx'> </div><div class='del'>-	crash_smp_send_stop();</div><div class='add'>+	if (IS_ENABLED(CONFIG_SMP))</div><div class='add'>+		crash_smp_send_stop();</div><div class='add'>+	else</div><div class='add'>+		crash_kexec_prepare();</div><div class='ctx'> </div><div class='ctx'> 	crash_save_cpu(regs, crashing_cpu);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig<br/>index dbfdc126bf14..2f2702c867f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kvm/Kconfig</a></div><div class='hunk'>@@ -83,6 +83,7 @@ config KVM_BOOK3S_64_HV</div><div class='ctx'> 	depends on KVM_BOOK3S_64 &amp;&amp; PPC_POWERNV</div><div class='ctx'> 	select KVM_BOOK3S_HV_POSSIBLE</div><div class='ctx'> 	select KVM_GENERIC_MMU_NOTIFIER</div><div class='add'>+	select KVM_BOOK3S_HV_PMU</div><div class='ctx'> 	select CMA</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support running unmodified book3s_64 guest kernels in</div><div class='hunk'>@@ -171,6 +172,18 @@ config KVM_BOOK3S_HV_NESTED_PMU_WORKAROUND</div><div class='ctx'> 	  those buggy L1s which saves the L2 state, at the cost of performance</div><div class='ctx'> 	  in all nested-capable guest entry/exit.</div><div class='ctx'> </div><div class='add'>+config KVM_BOOK3S_HV_PMU</div><div class='add'>+	tristate "Hypervisor Perf events for KVM Book3s-HV"</div><div class='add'>+	depends on KVM_BOOK3S_64_HV</div><div class='add'>+	help</div><div class='add'>+	  Enable Book3s-HV Hypervisor Perf events PMU named 'kvm-hv'. These</div><div class='add'>+	  Perf events give an overview of hypervisor performance overall</div><div class='add'>+	  instead of a specific guests. Currently the PMU reports</div><div class='add'>+	  L0-Hypervisor stats on a kvm-hv enabled PSeries LPAR like:</div><div class='add'>+	  * Total/Used Guest-Heap</div><div class='add'>+	  * Total/Used Guest Page-table Memory</div><div class='add'>+	  * Total amount of Guest Page-table Memory reclaimed</div><div class='add'>+</div><div class='ctx'> config KVM_BOOKE_HV</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c<br/>index 19f4d298dd17..7667563fb9ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/book3s_hv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/book3s_hv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/book3s_hv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kvm/book3s_hv.c</a></div><div class='hunk'>@@ -6541,10 +6541,6 @@ static struct kvmppc_ops kvm_ops_hv = {</div><div class='ctx'> 	.fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,</div><div class='ctx'> 	.arch_vm_ioctl  = kvm_arch_vm_ioctl_hv,</div><div class='ctx'> 	.hcall_implemented = kvmppc_hcall_impl_hv,</div><div class='del'>-#ifdef CONFIG_KVM_XICS</div><div class='del'>-	.irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,</div><div class='del'>-	.irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,</div><div class='del'>-#endif</div><div class='ctx'> 	.configure_mmu = kvmhv_configure_mmu,</div><div class='ctx'> 	.get_rmmu_info = kvmhv_get_rmmu_info,</div><div class='ctx'> 	.set_smt_mode = kvmhv_set_smt_mode,</div><div class='hunk'>@@ -6662,6 +6658,22 @@ static int kvmppc_book3s_init_hv(void)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_KVM_XICS)</div><div class='add'>+	/*</div><div class='add'>+	 * IRQ bypass is supported only for interrupts whose EOI operations are</div><div class='add'>+	 * handled via OPAL calls. Therefore, register IRQ bypass handlers</div><div class='add'>+	 * exclusively for PowerNV KVM when booted with 'xive=off', indicating</div><div class='add'>+	 * the use of the emulated XICS interrupt controller.</div><div class='add'>+	 */</div><div class='add'>+	if (!kvmhv_on_pseries()) {</div><div class='add'>+		pr_info("KVM-HV: Enabling IRQ bypass\n");</div><div class='add'>+		kvm_ops_hv.irq_bypass_add_producer =</div><div class='add'>+			kvmppc_irq_bypass_add_producer_hv;</div><div class='add'>+		kvm_ops_hv.irq_bypass_del_producer =</div><div class='add'>+			kvmppc_irq_bypass_del_producer_hv;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	kvm_ops_hv.owner = THIS_MODULE;</div><div class='ctx'> 	kvmppc_hv_ops = &amp;kvm_ops_hv;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/book3s_hv_nestedv2.c b/arch/powerpc/kvm/book3s_hv_nestedv2.c<br/>index e5c7ce1fb761..87691cf86cae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/book3s_hv_nestedv2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/book3s_hv_nestedv2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/book3s_hv_nestedv2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kvm/book3s_hv_nestedv2.c</a></div><div class='hunk'>@@ -123,6 +123,12 @@ static size_t gs_msg_ops_vcpu_get_size(struct kvmppc_gs_msg *gsm)</div><div class='ctx'> 		case KVMPPC_GSID_PROCESS_TABLE:</div><div class='ctx'> 		case KVMPPC_GSID_RUN_INPUT:</div><div class='ctx'> 		case KVMPPC_GSID_RUN_OUTPUT:</div><div class='add'>+		  /* Host wide counters */</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP_MAX:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX:</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM:</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			size += kvmppc_gse_total_size(kvmppc_gsid_size(iden));</div><div class='head'>diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c<br/>index 6a4805968966..791d1942a058 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/booke.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/booke.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/booke.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kvm/booke.c</a></div><div class='hunk'>@@ -572,7 +572,7 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Return the number of jiffies until the next timeout.  If the timeout is</div><div class='del'>- * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA</div><div class='add'>+ * longer than the TIMER_NEXT_MAX_DELTA, then return TIMER_NEXT_MAX_DELTA</div><div class='ctx'>  * because the larger value can break the timer APIs.</div><div class='ctx'>  */</div><div class='ctx'> static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -598,7 +598,7 @@ static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (do_div(nr_jiffies, tb_ticks_per_jiffy))</div><div class='ctx'> 		nr_jiffies++;</div><div class='ctx'> </div><div class='del'>-	return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);</div><div class='add'>+	return min_t(unsigned long long, nr_jiffies, TIMER_NEXT_MAX_DELTA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void arm_next_watchdog(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -616,10 +616,10 @@ static void arm_next_watchdog(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	spin_lock_irqsave(&amp;vcpu-&gt;arch.wdt_lock, flags);</div><div class='ctx'> 	nr_jiffies = watchdog_next_timeout(vcpu);</div><div class='ctx'> 	/*</div><div class='del'>-	 * If the number of jiffies of watchdog timer &gt;= NEXT_TIMER_MAX_DELTA</div><div class='add'>+	 * If the number of jiffies of watchdog timer &gt;= TIMER_NEXT_MAX_DELTA</div><div class='ctx'> 	 * then do not run the watchdog timer as this can break timer APIs.</div><div class='ctx'> 	 */</div><div class='del'>-	if (nr_jiffies &lt; NEXT_TIMER_MAX_DELTA)</div><div class='add'>+	if (nr_jiffies &lt; TIMER_NEXT_MAX_DELTA)</div><div class='ctx'> 		mod_timer(&amp;vcpu-&gt;arch.wdt_timer, jiffies + nr_jiffies);</div><div class='ctx'> 	else</div><div class='ctx'> 		timer_delete(&amp;vcpu-&gt;arch.wdt_timer);</div><div class='head'>diff --git a/arch/powerpc/kvm/guest-state-buffer.c b/arch/powerpc/kvm/guest-state-buffer.c<br/>index b80dbc58621f..871cf60ddeb6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/guest-state-buffer.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/guest-state-buffer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/guest-state-buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kvm/guest-state-buffer.c</a></div><div class='hunk'>@@ -92,6 +92,10 @@ static int kvmppc_gsid_class(u16 iden)</div><div class='ctx'> 	    (iden &lt;= KVMPPC_GSE_GUESTWIDE_END))</div><div class='ctx'> 		return KVMPPC_GS_CLASS_GUESTWIDE;</div><div class='ctx'> </div><div class='add'>+	if ((iden &gt;= KVMPPC_GSE_HOSTWIDE_START) &amp;&amp;</div><div class='add'>+	    (iden &lt;= KVMPPC_GSE_HOSTWIDE_END))</div><div class='add'>+		return KVMPPC_GS_CLASS_HOSTWIDE;</div><div class='add'>+</div><div class='ctx'> 	if ((iden &gt;= KVMPPC_GSE_META_START) &amp;&amp; (iden &lt;= KVMPPC_GSE_META_END))</div><div class='ctx'> 		return KVMPPC_GS_CLASS_META;</div><div class='ctx'> </div><div class='hunk'>@@ -118,6 +122,21 @@ static int kvmppc_gsid_type(u16 iden)</div><div class='ctx'> 	int type = -1;</div><div class='ctx'> </div><div class='ctx'> 	switch (kvmppc_gsid_class(iden)) {</div><div class='add'>+	case KVMPPC_GS_CLASS_HOSTWIDE:</div><div class='add'>+		switch (iden) {</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_HEAP_MAX:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX:</div><div class='add'>+			fallthrough;</div><div class='add'>+		case KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM:</div><div class='add'>+			type = KVMPPC_GSE_BE64;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	case KVMPPC_GS_CLASS_GUESTWIDE:</div><div class='ctx'> 		switch (iden) {</div><div class='ctx'> 		case KVMPPC_GSID_HOST_STATE_SIZE:</div><div class='hunk'>@@ -187,6 +206,9 @@ unsigned long kvmppc_gsid_flags(u16 iden)</div><div class='ctx'> 	case KVMPPC_GS_CLASS_GUESTWIDE:</div><div class='ctx'> 		flags = KVMPPC_GS_FLAGS_WIDE;</div><div class='ctx'> 		break;</div><div class='add'>+	case KVMPPC_GS_CLASS_HOSTWIDE:</div><div class='add'>+		flags = KVMPPC_GS_FLAGS_HOST_WIDE;</div><div class='add'>+		break;</div><div class='ctx'> 	case KVMPPC_GS_CLASS_META:</div><div class='ctx'> 	case KVMPPC_GS_CLASS_DWORD_REG:</div><div class='ctx'> 	case KVMPPC_GS_CLASS_WORD_REG:</div><div class='hunk'>@@ -310,6 +332,13 @@ static inline int kvmppc_gse_flatten_iden(u16 iden)</div><div class='ctx'> </div><div class='ctx'> 	bit += KVMPPC_GSE_GUESTWIDE_COUNT;</div><div class='ctx'> </div><div class='add'>+	if (class == KVMPPC_GS_CLASS_HOSTWIDE) {</div><div class='add'>+		bit += iden - KVMPPC_GSE_HOSTWIDE_START;</div><div class='add'>+		return bit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bit += KVMPPC_GSE_HOSTWIDE_COUNT;</div><div class='add'>+</div><div class='ctx'> 	if (class == KVMPPC_GS_CLASS_META) {</div><div class='ctx'> 		bit += iden - KVMPPC_GSE_META_START;</div><div class='ctx'> 		return bit;</div><div class='hunk'>@@ -356,6 +385,12 @@ static inline u16 kvmppc_gse_unflatten_iden(int bit)</div><div class='ctx'> 	}</div><div class='ctx'> 	bit -= KVMPPC_GSE_GUESTWIDE_COUNT;</div><div class='ctx'> </div><div class='add'>+	if (bit &lt; KVMPPC_GSE_HOSTWIDE_COUNT) {</div><div class='add'>+		iden = KVMPPC_GSE_HOSTWIDE_START + bit;</div><div class='add'>+		return iden;</div><div class='add'>+	}</div><div class='add'>+	bit -= KVMPPC_GSE_HOSTWIDE_COUNT;</div><div class='add'>+</div><div class='ctx'> 	if (bit &lt; KVMPPC_GSE_META_COUNT) {</div><div class='ctx'> 		iden = KVMPPC_GSE_META_START + bit;</div><div class='ctx'> 		return iden;</div><div class='hunk'>@@ -588,6 +623,8 @@ int kvmppc_gsb_send(struct kvmppc_gs_buff *gsb, unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; KVMPPC_GS_FLAGS_WIDE)</div><div class='ctx'> 		hflags |= H_GUEST_FLAGS_WIDE;</div><div class='add'>+	if (flags &amp; KVMPPC_GS_FLAGS_HOST_WIDE)</div><div class='add'>+		hflags |= H_GUEST_FLAGS_HOST_WIDE;</div><div class='ctx'> </div><div class='ctx'> 	rc = plpar_guest_set_state(hflags, gsb-&gt;guest_id, gsb-&gt;vcpu_id,</div><div class='ctx'> 				   __pa(gsb-&gt;hdr), gsb-&gt;capacity, &amp;i);</div><div class='hunk'>@@ -613,6 +650,8 @@ int kvmppc_gsb_recv(struct kvmppc_gs_buff *gsb, unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; KVMPPC_GS_FLAGS_WIDE)</div><div class='ctx'> 		hflags |= H_GUEST_FLAGS_WIDE;</div><div class='add'>+	if (flags &amp; KVMPPC_GS_FLAGS_HOST_WIDE)</div><div class='add'>+		hflags |= H_GUEST_FLAGS_HOST_WIDE;</div><div class='ctx'> </div><div class='ctx'> 	rc = plpar_guest_get_state(hflags, gsb-&gt;guest_id, gsb-&gt;vcpu_id,</div><div class='ctx'> 				   __pa(gsb-&gt;hdr), gsb-&gt;capacity, &amp;i);</div><div class='head'>diff --git a/arch/powerpc/kvm/test-guest-state-buffer.c b/arch/powerpc/kvm/test-guest-state-buffer.c<br/>index bfd225329a18..5ccca306997a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/test-guest-state-buffer.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/test-guest-state-buffer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/test-guest-state-buffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kvm/test-guest-state-buffer.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;kunit/test.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/guest-state-buffer.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ppc.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void test_creating_buffer(struct kunit *test)</div><div class='ctx'> {</div><div class='hunk'>@@ -141,6 +142,16 @@ static void test_gs_bitmap(struct kunit *test)</div><div class='ctx'> 		i++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	for (u16 iden = KVMPPC_GSID_L0_GUEST_HEAP;</div><div class='add'>+	     iden &lt;= KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM; iden++) {</div><div class='add'>+		kvmppc_gsbm_set(&amp;gsbm, iden);</div><div class='add'>+		kvmppc_gsbm_set(&amp;gsbm1, iden);</div><div class='add'>+		KUNIT_EXPECT_TRUE(test, kvmppc_gsbm_test(&amp;gsbm, iden));</div><div class='add'>+		kvmppc_gsbm_clear(&amp;gsbm, iden);</div><div class='add'>+		KUNIT_EXPECT_FALSE(test, kvmppc_gsbm_test(&amp;gsbm, iden));</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (u16 iden = KVMPPC_GSID_RUN_INPUT; iden &lt;= KVMPPC_GSID_VPA;</div><div class='ctx'> 	     iden++) {</div><div class='ctx'> 		kvmppc_gsbm_set(&amp;gsbm, iden);</div><div class='hunk'>@@ -309,12 +320,215 @@ static void test_gs_msg(struct kunit *test)</div><div class='ctx'> 	kvmppc_gsm_free(gsm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Test data struct for hostwide/L0 counters */</div><div class='add'>+struct kvmppc_gs_msg_test_hostwide_data {</div><div class='add'>+	u64 guest_heap;</div><div class='add'>+	u64 guest_heap_max;</div><div class='add'>+	u64 guest_pgtable_size;</div><div class='add'>+	u64 guest_pgtable_size_max;</div><div class='add'>+	u64 guest_pgtable_reclaim;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static size_t test_hostwide_get_size(struct kvmppc_gs_msg *gsm)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	size_t size = 0;</div><div class='add'>+	u16 ids[] = {</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(ids); i++)</div><div class='add'>+		size += kvmppc_gse_total_size(kvmppc_gsid_size(ids[i]));</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int test_hostwide_fill_info(struct kvmppc_gs_buff *gsb,</div><div class='add'>+				   struct kvmppc_gs_msg *gsm)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data *data = gsm-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+				   data-&gt;guest_heap);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+				   data-&gt;guest_heap_max);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+				   data-&gt;guest_pgtable_size);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+				   data-&gt;guest_pgtable_size_max);</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM))</div><div class='add'>+		kvmppc_gse_put_u64(gsb, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM,</div><div class='add'>+				   data-&gt;guest_pgtable_reclaim);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int test_hostwide_refresh_info(struct kvmppc_gs_msg *gsm,</div><div class='add'>+				      struct kvmppc_gs_buff *gsb)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_parser gsp = { 0 };</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data *data = gsm-&gt;data;</div><div class='add'>+	struct kvmppc_gs_elem *gse;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp, gsb);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_heap = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_heap_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_pgtable_size = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_pgtable_size_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+	if (gse)</div><div class='add'>+		data-&gt;guest_pgtable_reclaim = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvmppc_gs_msg_ops gs_msg_test_hostwide_ops = {</div><div class='add'>+	.get_size = test_hostwide_get_size,</div><div class='add'>+	.fill_info = test_hostwide_fill_info,</div><div class='add'>+	.refresh_info = test_hostwide_refresh_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void test_gs_hostwide_msg(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data test_data = {</div><div class='add'>+		.guest_heap = 0xdeadbeef,</div><div class='add'>+		.guest_heap_max = ~0ULL,</div><div class='add'>+		.guest_pgtable_size = 0xff,</div><div class='add'>+		.guest_pgtable_size_max = 0xffffff,</div><div class='add'>+		.guest_pgtable_reclaim = 0xdeadbeef,</div><div class='add'>+	};</div><div class='add'>+	struct kvmppc_gs_msg *gsm;</div><div class='add'>+	struct kvmppc_gs_buff *gsb;</div><div class='add'>+</div><div class='add'>+	gsm = kvmppc_gsm_new(&amp;gs_msg_test_hostwide_ops, &amp;test_data, GSM_SEND,</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsm);</div><div class='add'>+</div><div class='add'>+	gsb = kvmppc_gsb_new(kvmppc_gsm_size(gsm), 0, 0, GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsb);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_fill_info(gsm, gsb);</div><div class='add'>+</div><div class='add'>+	memset(&amp;test_data, 0, sizeof(test_data));</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_refresh_info(gsm, gsb);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_heap, 0xdeadbeef);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_heap_max, ~0ULL);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_pgtable_size, 0xff);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_pgtable_size_max, 0xffffff);</div><div class='add'>+	KUNIT_EXPECT_EQ(test, test_data.guest_pgtable_reclaim, 0xdeadbeef);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_free(gsm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Test if the H_GUEST_GET_STATE for hostwide counters works */</div><div class='add'>+static void test_gs_hostwide_counters(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_msg_test_hostwide_data test_data;</div><div class='add'>+	struct kvmppc_gs_parser gsp = { 0 };</div><div class='add'>+</div><div class='add'>+	struct kvmppc_gs_msg *gsm;</div><div class='add'>+	struct kvmppc_gs_buff *gsb;</div><div class='add'>+	struct kvmppc_gs_elem *gse;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!kvmhv_on_pseries())</div><div class='add'>+		kunit_skip(test, "This test need a kmv-hv guest");</div><div class='add'>+</div><div class='add'>+	gsm = kvmppc_gsm_new(&amp;gs_msg_test_hostwide_ops, &amp;test_data, GSM_SEND,</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsm);</div><div class='add'>+</div><div class='add'>+	gsb = kvmppc_gsb_new(kvmppc_gsm_size(gsm), 0, 0, GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, gsb);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_include(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_fill_info(gsm, gsb);</div><div class='add'>+</div><div class='add'>+	/* With HOST_WIDE flags guestid and vcpuid will be ignored */</div><div class='add'>+	rc = kvmppc_gsb_recv(gsb, KVMPPC_GS_FLAGS_HOST_WIDE);</div><div class='add'>+	KUNIT_ASSERT_EQ(test, rc, 0);</div><div class='add'>+</div><div class='add'>+	/* Parse the guest state buffer is successful */</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp, gsb);</div><div class='add'>+	KUNIT_ASSERT_EQ(test, rc, 0);</div><div class='add'>+</div><div class='add'>+	/* Parse the GSB and get the counters */</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 Heap counter missing");</div><div class='add'>+	kunit_info(test, "Guest Heap Size=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 Heap counter max missing");</div><div class='add'>+	kunit_info(test, "Guest Heap Size Max=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 page-table size missing");</div><div class='add'>+	kunit_info(test, "Guest Page-table Size=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 page-table size-max missing");</div><div class='add'>+	kunit_info(test, "Guest Page-table Size Max=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+	KUNIT_ASSERT_NOT_NULL_MSG(test, gse, "L0 page-table reclaim size missing");</div><div class='add'>+	kunit_info(test, "Guest Page-table Reclaim Size=%llu bytes",</div><div class='add'>+		   kvmppc_gse_get_u64(gse));</div><div class='add'>+</div><div class='add'>+	kvmppc_gsm_free(gsm);</div><div class='add'>+	kvmppc_gsb_free(gsb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct kunit_case guest_state_buffer_testcases[] = {</div><div class='ctx'> 	KUNIT_CASE(test_creating_buffer),</div><div class='ctx'> 	KUNIT_CASE(test_adding_element),</div><div class='ctx'> 	KUNIT_CASE(test_gs_bitmap),</div><div class='ctx'> 	KUNIT_CASE(test_gs_parsing),</div><div class='ctx'> 	KUNIT_CASE(test_gs_msg),</div><div class='add'>+	KUNIT_CASE(test_gs_hostwide_msg),</div><div class='add'>+	KUNIT_CASE(test_gs_hostwide_counters),</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/kvm/timing.h b/arch/powerpc/kvm/timing.h<br/>index 45817ab82bb4..14b0e23f601f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/timing.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/kvm/timing.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/kvm/timing.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/kvm/timing.h</a></div><div class='hunk'>@@ -38,11 +38,7 @@ static inline void kvmppc_set_exit_type(struct kvm_vcpu *vcpu, int type) {}</div><div class='ctx'> static inline void kvmppc_account_exit_stat(struct kvm_vcpu *vcpu, int type)</div><div class='ctx'> {</div><div class='ctx'> 	/* type has to be known at build time for optimization */</div><div class='del'>-</div><div class='del'>-	/* The BUILD_BUG_ON below breaks in funny ways, commented out</div><div class='del'>-	 * for now ... -BenH</div><div class='ctx'> 	BUILD_BUG_ON(!__builtin_constant_p(type));</div><div class='del'>-	*/</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case EXT_INTR_EXITS:</div><div class='ctx'> 		vcpu-&gt;stat.ext_intr_exits++;</div><div class='head'>diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile<br/>index dd8a4b52a0cc..481f968e42c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/Makefile</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> # Makefile for ppc-specific library files..</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+obj-y += crypto/</div><div class='add'>+</div><div class='ctx'> CFLAGS_code-patching.o += -fno-stack-protector</div><div class='ctx'> CFLAGS_feature-fixups.o += -fno-stack-protector</div><div class='ctx'> </div><div class='hunk'>@@ -79,9 +81,9 @@ CFLAGS_xor_vmx.o += -mhard-float -maltivec $(call cc-option,-mabi=altivec)</div><div class='ctx'> CFLAGS_xor_vmx.o += -isystem $(shell $(CC) -print-file-name=include)</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC32_ARCH) += crc32-powerpc.o</div><div class='del'>-crc32-powerpc-y := crc32-glue.o crc32c-vpmsum_asm.o</div><div class='add'>+crc32-powerpc-y := crc32.o crc32c-vpmsum_asm.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC_T10DIF_ARCH) += crc-t10dif-powerpc.o</div><div class='del'>-crc-t10dif-powerpc-y := crc-t10dif-glue.o crct10dif-vpmsum_asm.o</div><div class='add'>+crc-t10dif-powerpc-y := crc-t10dif.o crct10dif-vpmsum_asm.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC64) += $(obj64-y)</div><div class='head'>diff --git a/arch/powerpc/lib/crc-t10dif-glue.c b/arch/powerpc/lib/crc-t10dif.c<br/>index f411b0120cc5..be23ded3a9df 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc-t10dif-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc-t10dif-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crc-t10dif.c</a></div><div class='hunk'>@@ -6,22 +6,22 @@</div><div class='ctx'>  * [based on crc32c-vpmsum_glue.c]</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/crc-t10dif.h&gt;</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;linux/crc-t10dif.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define VMX_ALIGN		16</div><div class='ctx'> #define VMX_ALIGN_MASK		(VMX_ALIGN-1)</div><div class='ctx'> </div><div class='ctx'> #define VECTOR_BREAKPOINT	64</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_vec_crypto);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_vec_crypto);</div><div class='ctx'> </div><div class='ctx'> u32 __crct10dif_vpmsum(u32 crc, unsigned char const *p, size_t len);</div><div class='ctx'> </div><div class='hunk'>@@ -71,7 +71,7 @@ static int __init crc_t10dif_powerpc_init(void)</div><div class='ctx'> 		static_branch_enable(&amp;have_vec_crypto);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc_t10dif_powerpc_init);</div><div class='add'>+subsys_initcall(crc_t10dif_powerpc_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc_t10dif_powerpc_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/lib/crc32-vpmsum_core.S b/arch/powerpc/lib/crc-vpmsum-template.S<br/>index b0f87f595b26..b0f87f595b26 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc32-vpmsum_core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc32-vpmsum_core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc-vpmsum-template.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crc-vpmsum-template.S</a></div><div class='head'>diff --git a/arch/powerpc/lib/crc32-glue.c b/arch/powerpc/lib/crc32.c<br/>index dbd10f339183..0d9befb6e7b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc32-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc32-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crc32.c</a></div><div class='hunk'>@@ -1,19 +1,20 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define VMX_ALIGN		16</div><div class='ctx'> #define VMX_ALIGN_MASK		(VMX_ALIGN-1)</div><div class='ctx'> </div><div class='ctx'> #define VECTOR_BREAKPOINT	512</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_vec_crypto);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_vec_crypto);</div><div class='ctx'> </div><div class='ctx'> u32 __crc32c_vpmsum(u32 crc, const u8 *p, size_t len);</div><div class='ctx'> </div><div class='hunk'>@@ -72,7 +73,7 @@ static int __init crc32_powerpc_init(void)</div><div class='ctx'> 		static_branch_enable(&amp;have_vec_crypto);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc32_powerpc_init);</div><div class='add'>+subsys_initcall(crc32_powerpc_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc32_powerpc_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/powerpc/lib/crc32c-vpmsum_asm.S b/arch/powerpc/lib/crc32c-vpmsum_asm.S<br/>index bf442004ea1f..1b35c55cce0a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc32c-vpmsum_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crc32c-vpmsum_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crc32c-vpmsum_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crc32c-vpmsum_asm.S</a></div><div class='hunk'>@@ -839,4 +839,4 @@</div><div class='ctx'> </div><div class='ctx'> #define CRC_FUNCTION_NAME __crc32c_vpmsum</div><div class='ctx'> #define REFLECT</div><div class='del'>-#include "crc32-vpmsum_core.S"</div><div class='add'>+#include "crc-vpmsum-template.S"</div><div class='head'>diff --git a/arch/powerpc/lib/crct10dif-vpmsum_asm.S b/arch/powerpc/lib/crct10dif-vpmsum_asm.S<br/>index f0b93a0fe168..47a6266d89a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crct10dif-vpmsum_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/crct10dif-vpmsum_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crct10dif-vpmsum_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crct10dif-vpmsum_asm.S</a></div><div class='hunk'>@@ -842,4 +842,4 @@</div><div class='ctx'> 	.octa 0x0000000000000000000000018bb70000</div><div class='ctx'> </div><div class='ctx'> #define CRC_FUNCTION_NAME __crct10dif_vpmsum</div><div class='del'>-#include "crc32-vpmsum_core.S"</div><div class='add'>+#include "crc-vpmsum-template.S"</div><div class='head'>diff --git a/arch/powerpc/lib/crypto/Kconfig b/arch/powerpc/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..3f9e1bbd9905<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_CHACHA20_P10</div><div class='add'>+	tristate</div><div class='add'>+	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN &amp;&amp; VSX</div><div class='add'>+	default CRYPTO_LIB_CHACHA</div><div class='add'>+	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='add'>+</div><div class='add'>+config CRYPTO_POLY1305_P10</div><div class='add'>+	tristate</div><div class='add'>+	depends on PPC64 &amp;&amp; CPU_LITTLE_ENDIAN &amp;&amp; VSX</div><div class='add'>+	depends on BROKEN # Needs to be fixed to work in softirq context</div><div class='add'>+	default CRYPTO_LIB_POLY1305</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='add'>+	select CRYPTO_LIB_POLY1305_GENERIC</div><div class='add'>+</div><div class='add'>+config CRYPTO_SHA256_PPC_SPE</div><div class='add'>+	tristate</div><div class='add'>+	depends on SPE</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='head'>diff --git a/arch/powerpc/lib/crypto/Makefile b/arch/powerpc/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..27f231f8e334<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA20_P10) += chacha-p10-crypto.o</div><div class='add'>+chacha-p10-crypto-y := chacha-p10-glue.o chacha-p10le-8x.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_POLY1305_P10) += poly1305-p10-crypto.o</div><div class='add'>+poly1305-p10-crypto-y := poly1305-p10-glue.o poly1305-p10le_64.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256_PPC_SPE) += sha256-ppc-spe.o</div><div class='add'>+sha256-ppc-spe-y := sha256.o sha256-spe-asm.o</div><div class='head'>diff --git a/arch/powerpc/lib/crypto/chacha-p10-glue.c b/arch/powerpc/lib/crypto/chacha-p10-glue.c<br/>new file mode 100644<br/>index 000000000000..fcd23c6f1590<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/chacha-p10-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/chacha-p10-glue.c</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * ChaCha stream cipher (P10 accelerated)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2023- IBM Corp. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_p10le_8x(const struct chacha_state *state, u8 *dst,</div><div class='add'>+				const u8 *src, unsigned int len, int nrounds);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_p10);</div><div class='add'>+</div><div class='add'>+static void vsx_begin(void)</div><div class='add'>+{</div><div class='add'>+	preempt_disable();</div><div class='add'>+	enable_kernel_vsx();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsx_end(void)</div><div class='add'>+{</div><div class='add'>+	disable_kernel_vsx();</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha_p10_do_8x(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+			     unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	unsigned int l = bytes &amp; ~0x0FF;</div><div class='add'>+</div><div class='add'>+	if (l &gt; 0) {</div><div class='add'>+		chacha_p10le_8x(state, dst, src, l, nrounds);</div><div class='add'>+		bytes -= l;</div><div class='add'>+		src += l;</div><div class='add'>+		dst += l;</div><div class='add'>+		state-&gt;x[12] += l / CHACHA_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bytes &gt; 0)</div><div class='add'>+		chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hchacha_block_arch(const struct chacha_state *state,</div><div class='add'>+			u32 out[HCHACHA_OUT_WORDS], int nrounds)</div><div class='add'>+{</div><div class='add'>+	hchacha_block_generic(state, out, nrounds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hchacha_block_arch);</div><div class='add'>+</div><div class='add'>+void chacha_crypt_arch(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+		       unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (!static_branch_likely(&amp;have_p10) || bytes &lt;= CHACHA_BLOCK_SIZE ||</div><div class='add'>+	    !crypto_simd_usable())</div><div class='add'>+		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='add'>+</div><div class='add'>+		vsx_begin();</div><div class='add'>+		chacha_p10_do_8x(state, dst, src, todo, nrounds);</div><div class='add'>+		vsx_end();</div><div class='add'>+</div><div class='add'>+		bytes -= todo;</div><div class='add'>+		src += todo;</div><div class='add'>+		dst += todo;</div><div class='add'>+	} while (bytes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='add'>+</div><div class='add'>+bool chacha_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;have_p10);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init chacha_p10_init(void)</div><div class='add'>+{</div><div class='add'>+	if (cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='add'>+		static_branch_enable(&amp;have_p10);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(chacha_p10_init);</div><div class='add'>+</div><div class='add'>+static void __exit chacha_p10_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(chacha_p10_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ChaCha stream cipher (P10 accelerated)");</div><div class='add'>+MODULE_AUTHOR("Danny Tsen &lt;dtsen@linux.ibm.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/powerpc/crypto/chacha-p10le-8x.S b/arch/powerpc/lib/crypto/chacha-p10le-8x.S<br/>index 17bedb66b822..b29562bd5d40 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/chacha-p10le-8x.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/chacha-p10le-8x.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/chacha-p10le-8x.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/chacha-p10le-8x.S</a></div><div class='hunk'>@@ -7,9 +7,6 @@</div><div class='ctx'> #===================================================================================</div><div class='ctx'> # Written by Danny Tsen &lt;dtsen@us.ibm.com&gt;</div><div class='ctx'> #</div><div class='del'>-# chacha_p10le_8x(u32 *state, byte *dst, const byte *src,</div><div class='del'>-#				 size_t len, int nrounds);</div><div class='del'>-#</div><div class='ctx'> # do rounds,  8 quarter rounds</div><div class='ctx'> # 1.  a += b; d ^= a; d &lt;&lt;&lt;= 16;</div><div class='ctx'> # 2.  c += d; b ^= c; b &lt;&lt;&lt;= 12;</div><div class='hunk'>@@ -575,7 +572,8 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> #</div><div class='del'>-# chacha20_p10le_8x(u32 *state, byte *dst, const byte *src, size_t len, int nrounds);</div><div class='add'>+# void chacha_p10le_8x(const struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+#		       unsigned int len, int nrounds);</div><div class='ctx'> #</div><div class='ctx'> SYM_FUNC_START(chacha_p10le_8x)</div><div class='ctx'> .align 5</div><div class='head'>diff --git a/arch/powerpc/lib/crypto/poly1305-p10-glue.c b/arch/powerpc/lib/crypto/poly1305-p10-glue.c<br/>new file mode 100644<br/>index 000000000000..3f1664a724b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/poly1305-p10-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/poly1305-p10-glue.c</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Poly1305 authenticator algorithm, RFC7539.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2023- IBM Corp. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;crypto/internal/poly1305.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void poly1305_p10le_4blocks(struct poly1305_block_state *state, const u8 *m, u32 mlen);</div><div class='add'>+asmlinkage void poly1305_64s(struct poly1305_block_state *state, const u8 *m, u32 mlen, int highbit);</div><div class='add'>+asmlinkage void poly1305_emit_64(const struct poly1305_state *state, const u32 nonce[4], u8 digest[POLY1305_DIGEST_SIZE]);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_p10);</div><div class='add'>+</div><div class='add'>+static void vsx_begin(void)</div><div class='add'>+{</div><div class='add'>+	preempt_disable();</div><div class='add'>+	enable_kernel_vsx();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsx_end(void)</div><div class='add'>+{</div><div class='add'>+	disable_kernel_vsx();</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void poly1305_block_init_arch(struct poly1305_block_state *dctx,</div><div class='add'>+			      const u8 raw_key[POLY1305_BLOCK_SIZE])</div><div class='add'>+{</div><div class='add'>+	if (!static_key_enabled(&amp;have_p10))</div><div class='add'>+		return poly1305_block_init_generic(dctx, raw_key);</div><div class='add'>+</div><div class='add'>+	dctx-&gt;h = (struct poly1305_state){};</div><div class='add'>+	dctx-&gt;core_r.key.r64[0] = get_unaligned_le64(raw_key + 0);</div><div class='add'>+	dctx-&gt;core_r.key.r64[1] = get_unaligned_le64(raw_key + 8);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_block_init_arch);</div><div class='add'>+</div><div class='add'>+void poly1305_blocks_arch(struct poly1305_block_state *state, const u8 *src,</div><div class='add'>+			  unsigned int len, u32 padbit)</div><div class='add'>+{</div><div class='add'>+	if (!static_key_enabled(&amp;have_p10))</div><div class='add'>+		return poly1305_blocks_generic(state, src, len, padbit);</div><div class='add'>+	vsx_begin();</div><div class='add'>+	if (len &gt;= POLY1305_BLOCK_SIZE * 4) {</div><div class='add'>+		poly1305_p10le_4blocks(state, src, len);</div><div class='add'>+		src += len - (len % (POLY1305_BLOCK_SIZE * 4));</div><div class='add'>+		len %= POLY1305_BLOCK_SIZE * 4;</div><div class='add'>+	}</div><div class='add'>+	while (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='add'>+		poly1305_64s(state, src, POLY1305_BLOCK_SIZE, padbit);</div><div class='add'>+		len -= POLY1305_BLOCK_SIZE;</div><div class='add'>+		src += POLY1305_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+	vsx_end();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_blocks_arch);</div><div class='add'>+</div><div class='add'>+void poly1305_emit_arch(const struct poly1305_state *state,</div><div class='add'>+			u8 digest[POLY1305_DIGEST_SIZE],</div><div class='add'>+			const u32 nonce[4])</div><div class='add'>+{</div><div class='add'>+	if (!static_key_enabled(&amp;have_p10))</div><div class='add'>+		return poly1305_emit_generic(state, digest, nonce);</div><div class='add'>+	poly1305_emit_64(state, nonce, digest);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_emit_arch);</div><div class='add'>+</div><div class='add'>+bool poly1305_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;have_p10);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(poly1305_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init poly1305_p10_init(void)</div><div class='add'>+{</div><div class='add'>+	if (cpu_has_feature(CPU_FTR_ARCH_31))</div><div class='add'>+		static_branch_enable(&amp;have_p10);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(poly1305_p10_init);</div><div class='add'>+</div><div class='add'>+static void __exit poly1305_p10_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(poly1305_p10_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Danny Tsen &lt;dtsen@linux.ibm.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Optimized Poly1305 for P10");</div><div class='head'>diff --git a/arch/powerpc/crypto/poly1305-p10le_64.S b/arch/powerpc/lib/crypto/poly1305-p10le_64.S<br/>index a3c1987f1ecd..a3c1987f1ecd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/poly1305-p10le_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/poly1305-p10le_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/poly1305-p10le_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/poly1305-p10le_64.S</a></div><div class='head'>diff --git a/arch/powerpc/crypto/sha256-spe-asm.S b/arch/powerpc/lib/crypto/sha256-spe-asm.S<br/>index cd99d71dae34..cd99d71dae34 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/crypto/sha256-spe-asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/crypto/sha256-spe-asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/sha256-spe-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/sha256-spe-asm.S</a></div><div class='head'>diff --git a/arch/powerpc/lib/crypto/sha256.c b/arch/powerpc/lib/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..6b0f079587eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * SHA-256 Secure Hash Algorithm, SPE optimized</div><div class='add'>+ *</div><div class='add'>+ * Based on generic implementation. The assembler module takes care</div><div class='add'>+ * about the SPE registers so it can run from interrupt context.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2015 Markus Stockhausen &lt;stockhausen@collogia.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/switch_to.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/preempt.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * MAX_BYTES defines the number of bytes that are allowed to be processed</div><div class='add'>+ * between preempt_disable() and preempt_enable(). SHA256 takes ~2,000</div><div class='add'>+ * operations per 64 bytes. e500 cores can issue two arithmetic instructions</div><div class='add'>+ * per clock cycle using one 32/64 bit unit (SU1) and one 32 bit unit (SU2).</div><div class='add'>+ * Thus 1KB of input data will need an estimated maximum of 18,000 cycles.</div><div class='add'>+ * Headroom for cache misses included. Even with the low end model clocked</div><div class='add'>+ * at 667 MHz this equals to a critical time window of less than 27us.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#define MAX_BYTES 1024</div><div class='add'>+</div><div class='add'>+extern void ppc_spe_sha256_transform(u32 *state, const u8 *src, u32 blocks);</div><div class='add'>+</div><div class='add'>+static void spe_begin(void)</div><div class='add'>+{</div><div class='add'>+	/* We just start SPE operations and will save SPE registers later. */</div><div class='add'>+	preempt_disable();</div><div class='add'>+	enable_kernel_spe();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void spe_end(void)</div><div class='add'>+{</div><div class='add'>+	disable_kernel_spe();</div><div class='add'>+	/* reenable preemption */</div><div class='add'>+	preempt_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	do {</div><div class='add'>+		/* cut input data into smaller blocks */</div><div class='add'>+		u32 unit = min_t(size_t, nblocks,</div><div class='add'>+				 MAX_BYTES / SHA256_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+		spe_begin();</div><div class='add'>+		ppc_spe_sha256_transform(state, data, unit);</div><div class='add'>+		spe_end();</div><div class='add'>+</div><div class='add'>+		data += unit * SHA256_BLOCK_SIZE;</div><div class='add'>+		nblocks -= unit;</div><div class='add'>+	} while (nblocks);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='add'>+</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 Secure Hash Algorithm, SPE optimized");</div><div class='head'>diff --git a/arch/powerpc/lib/vmx-helper.c b/arch/powerpc/lib/vmx-helper.c<br/>index 58ed6bd613a6..54340912398f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/lib/vmx-helper.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/lib/vmx-helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/lib/vmx-helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/lib/vmx-helper.c</a></div><div class='hunk'>@@ -45,7 +45,7 @@ int exit_vmx_usercopy(void)</div><div class='ctx'> 	 * set and we are preemptible. The hack here is to schedule a</div><div class='ctx'> 	 * decrementer to fire here and reschedule for us if necessary.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_PREEMPTION) &amp;&amp; need_resched())</div><div class='add'>+	if (need_irq_preemption() &amp;&amp; need_resched())</div><div class='ctx'> 		set_dec(1);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/mm/book3s64/radix_pgtable.c b/arch/powerpc/mm/book3s64/radix_pgtable.c<br/>index 311e2112d782..9f764bc42b8c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/mm/book3s64/radix_pgtable.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/mm/book3s64/radix_pgtable.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/mm/book3s64/radix_pgtable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/mm/book3s64/radix_pgtable.c</a></div><div class='hunk'>@@ -976,7 +976,7 @@ int __meminit radix__vmemmap_create_mapping(unsigned long start,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='add'>+#ifdef CONFIG_ARCH_WANT_OPTIMIZE_DAX_VMEMMAP</div><div class='ctx'> bool vmemmap_can_optimize(struct vmem_altmap *altmap, struct dev_pagemap *pgmap)</div><div class='ctx'> {</div><div class='ctx'> 	if (radix_enabled())</div><div class='hunk'>@@ -984,6 +984,7 @@ bool vmemmap_can_optimize(struct vmem_altmap *altmap, struct dev_pagemap *pgmap)</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> int __meminit vmemmap_check_pmd(pmd_t *pmdp, int node,</div><div class='ctx'> 				unsigned long addr, unsigned long next)</div><div class='hunk'>@@ -1120,6 +1121,19 @@ int __meminit radix__vmemmap_populate(unsigned long start, unsigned long end, in</div><div class='ctx'> 	pmd_t *pmd;</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Make sure we align the start vmemmap addr so that we calculate</div><div class='add'>+	 * the correct start_pfn in altmap boundary check to decided whether</div><div class='add'>+	 * we should use altmap or RAM based backing memory allocation. Also</div><div class='add'>+	 * the address need to be aligned for set_pte operation.</div><div class='add'>+</div><div class='add'>+	 * If the start addr is already PMD_SIZE aligned we will try to use</div><div class='add'>+	 * a pmd mapping. We don't want to be too aggressive here beacause</div><div class='add'>+	 * that will cause more allocations in RAM. So only if the namespace</div><div class='add'>+	 * vmemmap start addr is PMD_SIZE aligned we will use PMD mapping.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	start = ALIGN_DOWN(start, PAGE_SIZE);</div><div class='ctx'> 	for (addr = start; addr &lt; end; addr = next) {</div><div class='ctx'> 		next = pmd_addr_end(addr, end);</div><div class='ctx'> </div><div class='hunk'>@@ -1145,8 +1159,8 @@ int __meminit radix__vmemmap_populate(unsigned long start, unsigned long end, in</div><div class='ctx'> 			 * in altmap block allocation failures, in which case</div><div class='ctx'> 			 * we fallback to RAM for vmemmap allocation.</div><div class='ctx'> 			 */</div><div class='del'>-			if (altmap &amp;&amp; (!IS_ALIGNED(addr, PMD_SIZE) ||</div><div class='del'>-				       altmap_cross_boundary(altmap, addr, PMD_SIZE))) {</div><div class='add'>+			if (!IS_ALIGNED(addr, PMD_SIZE) || (altmap &amp;&amp;</div><div class='add'>+			    altmap_cross_boundary(altmap, addr, PMD_SIZE))) {</div><div class='ctx'> 				/*</div><div class='ctx'> 				 * make sure we don't create altmap mappings</div><div class='ctx'> 				 * covering things outside the device.</div><div class='head'>diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c<br/>index c156fe0d53c3..806c74e0d5ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/mm/fault.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/mm/fault.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/mm/fault.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/pagemap.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='hunk'>@@ -218,7 +219,7 @@ static bool bad_kernel_fault(struct pt_regs *regs, unsigned long error_code,</div><div class='ctx'> 	// Read/write fault blocked by KUAP is bad, it can never succeed.</div><div class='ctx'> 	if (bad_kuap_fault(regs, address, is_write)) {</div><div class='ctx'> 		pr_crit_ratelimited("Kernel attempted to %s user page (%lx) - exploit attempt? (uid: %d)\n",</div><div class='del'>-				    is_write ? "write" : "read", address,</div><div class='add'>+				    str_write_read(is_write), address,</div><div class='ctx'> 				    from_kuid(&amp;init_user_ns, current_uid()));</div><div class='ctx'> </div><div class='ctx'> 		// Fault on user outside of certain regions (eg. copy_tofrom_user()) is bad</div><div class='hunk'>@@ -625,7 +626,7 @@ static void __bad_page_fault(struct pt_regs *regs, int sig)</div><div class='ctx'> 	case INTERRUPT_DATA_STORAGE:</div><div class='ctx'> 	case INTERRUPT_H_DATA_STORAGE:</div><div class='ctx'> 		pr_alert("BUG: %s on %s at 0x%08lx\n", msg,</div><div class='del'>-			 is_write ? "write" : "read", regs-&gt;dar);</div><div class='add'>+			 str_write_read(is_write), regs-&gt;dar);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INTERRUPT_DATA_SEGMENT:</div><div class='ctx'> 		pr_alert("BUG: %s at 0x%08lx\n", msg, regs-&gt;dar);</div><div class='head'>diff --git a/arch/powerpc/mm/nohash/8xx.c b/arch/powerpc/mm/nohash/8xx.c<br/>index 8b54f12d1889..ab1505cf42bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/mm/nohash/8xx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/mm/nohash/8xx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/mm/nohash/8xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/mm/nohash/8xx.c</a></div><div class='hunk'>@@ -54,20 +54,13 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,</div><div class='ctx'> {</div><div class='ctx'> 	pmd_t *pmdp = pmd_off_k(va);</div><div class='ctx'> 	pte_t *ptep;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(psize != MMU_PAGE_512K &amp;&amp; psize != MMU_PAGE_8M))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	unsigned int shift = mmu_psize_to_shift(psize);</div><div class='ctx'> </div><div class='ctx'> 	if (new) {</div><div class='ctx'> 		if (WARN_ON(slab_is_available()))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		if (psize == MMU_PAGE_512K) {</div><div class='del'>-			ptep = early_pte_alloc_kernel(pmdp, va);</div><div class='del'>-			/* The PTE should never be already present */</div><div class='del'>-			if (WARN_ON(pte_present(*ptep) &amp;&amp; pgprot_val(prot)))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-		} else {</div><div class='add'>+		if (psize == MMU_PAGE_8M) {</div><div class='ctx'> 			if (WARN_ON(!pmd_none(*pmdp) || !pmd_none(*(pmdp + 1))))</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -78,20 +71,25 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa,</div><div class='ctx'> 			pmd_populate_kernel(&amp;init_mm, pmdp + 1, ptep);</div><div class='ctx'> </div><div class='ctx'> 			ptep = (pte_t *)pmdp;</div><div class='add'>+		} else {</div><div class='add'>+			ptep = early_pte_alloc_kernel(pmdp, va);</div><div class='add'>+			/* The PTE should never be already present */</div><div class='add'>+			if (WARN_ON(pte_present(*ptep) &amp;&amp; pgprot_val(prot)))</div><div class='add'>+				return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (psize == MMU_PAGE_512K)</div><div class='del'>-			ptep = pte_offset_kernel(pmdp, va);</div><div class='del'>-		else</div><div class='add'>+		if (psize == MMU_PAGE_8M)</div><div class='ctx'> 			ptep = (pte_t *)pmdp;</div><div class='add'>+		else</div><div class='add'>+			ptep = pte_offset_kernel(pmdp, va);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(!ptep))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	set_huge_pte_at(&amp;init_mm, va, ptep,</div><div class='del'>-			pte_mkhuge(pfn_pte(pa &gt;&gt; PAGE_SHIFT, prot)),</div><div class='del'>-			1UL &lt;&lt; mmu_psize_to_shift(psize));</div><div class='add'>+			arch_make_huge_pte(pfn_pte(pa &gt;&gt; PAGE_SHIFT, prot), shift, 0),</div><div class='add'>+			1UL &lt;&lt; shift);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -123,14 +121,18 @@ static int mmu_mapin_ram_chunk(unsigned long offset, unsigned long top,</div><div class='ctx'> 	unsigned long p = offset;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!IS_ALIGNED(offset, SZ_512K) || !IS_ALIGNED(top, SZ_512K));</div><div class='add'>+	WARN_ON(!IS_ALIGNED(offset, SZ_16K) || !IS_ALIGNED(top, SZ_16K));</div><div class='ctx'> </div><div class='add'>+	for (; p &lt; ALIGN(p, SZ_512K) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_16K, v += SZ_16K)</div><div class='add'>+		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_16K, new);</div><div class='ctx'> 	for (; p &lt; ALIGN(p, SZ_8M) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_512K, v += SZ_512K)</div><div class='ctx'> 		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);</div><div class='ctx'> 	for (; p &lt; ALIGN_DOWN(top, SZ_8M) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_8M, v += SZ_8M)</div><div class='ctx'> 		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_8M, new);</div><div class='ctx'> 	for (; p &lt; ALIGN_DOWN(top, SZ_512K) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_512K, v += SZ_512K)</div><div class='ctx'> 		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_512K, new);</div><div class='add'>+	for (; p &lt; ALIGN_DOWN(top, SZ_16K) &amp;&amp; p &lt; top &amp;&amp; !err; p += SZ_16K, v += SZ_16K)</div><div class='add'>+		err = __early_map_kernel_hugepage(v, p, prot, MMU_PAGE_16K, new);</div><div class='ctx'> </div><div class='ctx'> 	if (!new)</div><div class='ctx'> 		flush_tlb_kernel_range(PAGE_OFFSET + v, PAGE_OFFSET + top);</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h<br/>index 6beacaec63d3..4c26912c2e3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/net/bpf_jit.h</a></div><div class='hunk'>@@ -51,8 +51,16 @@</div><div class='ctx'> 		EMIT(PPC_INST_BRANCH_COND | (((cond) &amp; 0x3ff) &lt;&lt; 16) | (offset &amp; 0xfffc));					\</div><div class='ctx'> 	} while (0)</div><div class='ctx'> </div><div class='del'>-/* Sign-extended 32-bit immediate load */</div><div class='add'>+/*</div><div class='add'>+ * Sign-extended 32-bit immediate load</div><div class='add'>+ *</div><div class='add'>+ * If this is a dummy pass (!image), account for</div><div class='add'>+ * maximum possible instructions.</div><div class='add'>+ */</div><div class='ctx'> #define PPC_LI32(d, i)		do {					      \</div><div class='add'>+	if (!image)							      \</div><div class='add'>+		ctx-&gt;idx += 2;						      \</div><div class='add'>+	else {								      \</div><div class='ctx'> 		if ((int)(uintptr_t)(i) &gt;= -32768 &amp;&amp;			      \</div><div class='ctx'> 				(int)(uintptr_t)(i) &lt; 32768)		      \</div><div class='ctx'> 			EMIT(PPC_RAW_LI(d, i));				      \</div><div class='hunk'>@@ -60,10 +68,15 @@</div><div class='ctx'> 			EMIT(PPC_RAW_LIS(d, IMM_H(i)));			      \</div><div class='ctx'> 			if (IMM_L(i))					      \</div><div class='ctx'> 				EMIT(PPC_RAW_ORI(d, d, IMM_L(i)));	      \</div><div class='del'>-		} } while(0)</div><div class='add'>+		}							      \</div><div class='add'>+	} } while (0)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPC64</div><div class='add'>+/* If dummy pass (!image), account for maximum possible instructions */</div><div class='ctx'> #define PPC_LI64(d, i)		do {					      \</div><div class='add'>+	if (!image)							      \</div><div class='add'>+		ctx-&gt;idx += 5;						      \</div><div class='add'>+	else {								      \</div><div class='ctx'> 		if ((long)(i) &gt;= -2147483648 &amp;&amp;				      \</div><div class='ctx'> 				(long)(i) &lt; 2147483648)			      \</div><div class='ctx'> 			PPC_LI32(d, i);					      \</div><div class='hunk'>@@ -84,7 +97,8 @@</div><div class='ctx'> 			if ((uintptr_t)(i) &amp; 0x000000000000ffffULL)	      \</div><div class='ctx'> 				EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) &amp;       \</div><div class='ctx'> 							0xffff));             \</div><div class='del'>-		} } while (0)</div><div class='add'>+		}							      \</div><div class='add'>+	} } while (0)</div><div class='ctx'> #define PPC_LI_ADDR	PPC_LI64</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_PPC_KERNEL_PCREL</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c<br/>index 2991bb171a9b..c0684733e9d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit_comp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -504,10 +504,11 @@ static int invoke_bpf_prog(u32 *image, u32 *ro_image, struct codegen_context *ct</div><div class='ctx'> 	EMIT(PPC_RAW_ADDI(_R3, _R1, regs_off));</div><div class='ctx'> 	if (!p-&gt;jited)</div><div class='ctx'> 		PPC_LI_ADDR(_R4, (unsigned long)p-&gt;insnsi);</div><div class='del'>-	if (!create_branch(&amp;branch_insn, (u32 *)&amp;ro_image[ctx-&gt;idx], (unsigned long)p-&gt;bpf_func,</div><div class='del'>-			   BRANCH_SET_LINK)) {</div><div class='del'>-		if (image)</div><div class='del'>-			image[ctx-&gt;idx] = ppc_inst_val(branch_insn);</div><div class='add'>+	/* Account for max possible instructions during dummy pass for size calculation */</div><div class='add'>+	if (image &amp;&amp; !create_branch(&amp;branch_insn, (u32 *)&amp;ro_image[ctx-&gt;idx],</div><div class='add'>+				    (unsigned long)p-&gt;bpf_func,</div><div class='add'>+				    BRANCH_SET_LINK)) {</div><div class='add'>+		image[ctx-&gt;idx] = ppc_inst_val(branch_insn);</div><div class='ctx'> 		ctx-&gt;idx++;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		EMIT(PPC_RAW_LL(_R12, _R25, offsetof(struct bpf_prog, bpf_func)));</div><div class='hunk'>@@ -889,7 +890,8 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im</div><div class='ctx'> 			bpf_trampoline_restore_tail_call_cnt(image, ctx, func_frame_offset, r4_off);</div><div class='ctx'> </div><div class='ctx'> 		/* Reserve space to patch branch instruction to skip fexit progs */</div><div class='del'>-		im-&gt;ip_after_call = &amp;((u32 *)ro_image)[ctx-&gt;idx];</div><div class='add'>+		if (ro_image) /* image is NULL for dummy pass */</div><div class='add'>+			im-&gt;ip_after_call = &amp;((u32 *)ro_image)[ctx-&gt;idx];</div><div class='ctx'> 		EMIT(PPC_RAW_NOP());</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -912,7 +914,8 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im, void *rw_im</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_CALL_ORIG) {</div><div class='del'>-		im-&gt;ip_epilogue = &amp;((u32 *)ro_image)[ctx-&gt;idx];</div><div class='add'>+		if (ro_image) /* image is NULL for dummy pass */</div><div class='add'>+			im-&gt;ip_epilogue = &amp;((u32 *)ro_image)[ctx-&gt;idx];</div><div class='ctx'> 		PPC_LI_ADDR(_R3, im);</div><div class='ctx'> 		ret = bpf_jit_emit_func_call_rel(image, ro_image, ctx,</div><div class='ctx'> 						 (unsigned long)__bpf_tramp_exit);</div><div class='hunk'>@@ -973,25 +976,9 @@ int arch_bpf_trampoline_size(const struct btf_func_model *m, u32 flags,</div><div class='ctx'> 			     struct bpf_tramp_links *tlinks, void *func_addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_tramp_image im;</div><div class='del'>-	void *image;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Allocate a temporary buffer for __arch_prepare_bpf_trampoline().</div><div class='del'>-	 * This will NOT cause fragmentation in direct map, as we do not</div><div class='del'>-	 * call set_memory_*() on this buffer.</div><div class='del'>-	 *</div><div class='del'>-	 * We cannot use kvmalloc here, because we need image to be in</div><div class='del'>-	 * module memory range.</div><div class='del'>-	 */</div><div class='del'>-	image = bpf_jit_alloc_exec(PAGE_SIZE);</div><div class='del'>-	if (!image)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = __arch_prepare_bpf_trampoline(&amp;im, image, image + PAGE_SIZE, image,</div><div class='del'>-					    m, flags, tlinks, func_addr);</div><div class='del'>-	bpf_jit_free_exec(image);</div><div class='del'>-</div><div class='add'>+	ret = __arch_prepare_bpf_trampoline(&amp;im, NULL, NULL, NULL, m, flags, tlinks, func_addr);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c<br/>index c4db278dae36..0aace304dfe1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit_comp32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit_comp32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit_comp32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/net/bpf_jit_comp32.c</a></div><div class='hunk'>@@ -313,7 +313,6 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		u64 func_addr;</div><div class='ctx'> 		u32 true_cond;</div><div class='ctx'> 		u32 tmp_idx;</div><div class='del'>-		int j;</div><div class='ctx'> </div><div class='ctx'> 		if (i &amp;&amp; (BPF_CLASS(code) == BPF_ALU64 || BPF_CLASS(code) == BPF_ALU) &amp;&amp;</div><div class='ctx'> 		    (BPF_CLASS(prevcode) == BPF_ALU64 || BPF_CLASS(prevcode) == BPF_ALU) &amp;&amp;</div><div class='hunk'>@@ -1099,13 +1098,8 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		 * 16 byte instruction that uses two 'struct bpf_insn'</div><div class='ctx'> 		 */</div><div class='ctx'> 		case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */</div><div class='del'>-			tmp_idx = ctx-&gt;idx;</div><div class='ctx'> 			PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm);</div><div class='ctx'> 			PPC_LI32(dst_reg, (u32)insn[i].imm);</div><div class='del'>-			/* padding to allow full 4 instructions for later patching */</div><div class='del'>-			if (!image)</div><div class='del'>-				for (j = ctx-&gt;idx - tmp_idx; j &lt; 4; j++)</div><div class='del'>-					EMIT(PPC_RAW_NOP());</div><div class='ctx'> 			/* Adjust for two bpf instructions */</div><div class='ctx'> 			addrs[++i] = ctx-&gt;idx * 4;</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c<br/>index 233703b06d7c..5daa77aee7f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit_comp64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/net/bpf_jit_comp64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/net/bpf_jit_comp64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/net/bpf_jit_comp64.c</a></div><div class='hunk'>@@ -227,7 +227,14 @@ int bpf_jit_emit_func_call_rel(u32 *image, u32 *fimage, struct codegen_context *</div><div class='ctx'> #ifdef CONFIG_PPC_KERNEL_PCREL</div><div class='ctx'> 	reladdr = func_addr - local_paca-&gt;kernelbase;</div><div class='ctx'> </div><div class='del'>-	if (reladdr &lt; (long)SZ_8G &amp;&amp; reladdr &gt;= -(long)SZ_8G) {</div><div class='add'>+	/*</div><div class='add'>+	 * If fimage is NULL (the initial pass to find image size),</div><div class='add'>+	 * account for the maximum no. of instructions possible.</div><div class='add'>+	 */</div><div class='add'>+	if (!fimage) {</div><div class='add'>+		ctx-&gt;idx += 7;</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (reladdr &lt; (long)SZ_8G &amp;&amp; reladdr &gt;= -(long)SZ_8G) {</div><div class='ctx'> 		EMIT(PPC_RAW_LD(_R12, _R13, offsetof(struct paca_struct, kernelbase)));</div><div class='ctx'> 		/* Align for subsequent prefix instruction */</div><div class='ctx'> 		if (!IS_ALIGNED((unsigned long)fimage + CTX_NIA(ctx), 8))</div><div class='hunk'>@@ -412,7 +419,6 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code</div><div class='ctx'> 		u64 imm64;</div><div class='ctx'> 		u32 true_cond;</div><div class='ctx'> 		u32 tmp_idx;</div><div class='del'>-		int j;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * addrs[] maps a BPF bytecode address into a real offset from</div><div class='hunk'>@@ -1046,12 +1052,7 @@ emit_clear:</div><div class='ctx'> 		case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */</div><div class='ctx'> 			imm64 = ((u64)(u32) insn[i].imm) |</div><div class='ctx'> 				    (((u64)(u32) insn[i+1].imm) &lt;&lt; 32);</div><div class='del'>-			tmp_idx = ctx-&gt;idx;</div><div class='ctx'> 			PPC_LI64(dst_reg, imm64);</div><div class='del'>-			/* padding to allow full 5 instructions for later patching */</div><div class='del'>-			if (!image)</div><div class='del'>-				for (j = ctx-&gt;idx - tmp_idx; j &lt; 5; j++)</div><div class='del'>-					EMIT(PPC_RAW_NOP());</div><div class='ctx'> 			/* Adjust for two bpf instructions */</div><div class='ctx'> 			addrs[++i] = ctx-&gt;idx * 4;</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile<br/>index ac2cf58d62db..7f53fcb7495a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/perf/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/perf/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/perf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/perf/Makefile</a></div><div class='hunk'>@@ -18,6 +18,8 @@ obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_VPA_PMU) += vpa-pmu.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_KVM_BOOK3S_HV_PMU) += kvm-hv-pmu.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_PPC_8xx) += 8xx-pmu.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PPC64)		+= $(obj64-y)</div><div class='head'>diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c<br/>index b906d28f74fd..8b0081441f85 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/perf/core-book3s.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/perf/core-book3s.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/perf/core-book3s.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/perf/core-book3s.c</a></div><div class='hunk'>@@ -2239,6 +2239,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 			       struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u64 period = event-&gt;hw.sample_period;</div><div class='add'>+	const u64 last_period = event-&gt;hw.last_period;</div><div class='ctx'> 	s64 prev, delta, left;</div><div class='ctx'> 	int record = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2320,7 +2321,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 	if (record) {</div><div class='ctx'> 		struct perf_sample_data data;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, ~0ULL, event-&gt;hw.last_period);</div><div class='add'>+		perf_sample_data_init(&amp;data, ~0ULL, last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (event-&gt;attr.sample_type &amp; PERF_SAMPLE_ADDR_TYPE)</div><div class='ctx'> 			perf_get_data_addr(event, regs, &amp;data.addr);</div><div class='hunk'>@@ -2343,12 +2344,10 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 			ppmu-&gt;get_mem_weight(&amp;data.weight.full, event-&gt;attr.sample_type);</div><div class='ctx'> 			data.sample_flags |= PERF_SAMPLE_WEIGHT_TYPE;</div><div class='ctx'> 		}</div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			power_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	} else if (period) {</div><div class='ctx'> 		/* Account for interrupt in case of invalid SIAR */</div><div class='del'>-		if (perf_event_account_interrupt(event))</div><div class='del'>-			power_pmu_stop(event, 0);</div><div class='add'>+		perf_event_account_interrupt(event);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c<br/>index 1a53ab08447c..7120ab20cbfe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/perf/core-fsl-emb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/perf/core-fsl-emb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/perf/core-fsl-emb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/perf/core-fsl-emb.c</a></div><div class='hunk'>@@ -590,6 +590,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 			       struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	u64 period = event-&gt;hw.sample_period;</div><div class='add'>+	const u64 last_period = event-&gt;hw.last_period;</div><div class='ctx'> 	s64 prev, delta, left;</div><div class='ctx'> 	int record = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -632,10 +633,9 @@ static void record_and_restart(struct perf_event *event, unsigned long val,</div><div class='ctx'> 	if (record) {</div><div class='ctx'> 		struct perf_sample_data data;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, last_period);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			fsl_emb_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/perf/kvm-hv-pmu.c b/arch/powerpc/perf/kvm-hv-pmu.c<br/>new file mode 100644<br/>index 000000000000..ae264c9080ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/perf/kvm-hv-pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/perf/kvm-hv-pmu.c</a></div><div class='hunk'>@@ -0,0 +1,435 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Description: PMUs specific to running nested KVM-HV guests</div><div class='add'>+ * on Book3S processors (specifically POWER9 and later).</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)  "kvmppc-pmu: " fmt</div><div class='add'>+</div><div class='add'>+#include "asm-generic/local64.h"</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ratelimit.h&gt;</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;linux/gfp_types.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='add'>+#include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/types.h&gt;</div><div class='add'>+#include &lt;asm/kvm_ppc.h&gt;</div><div class='add'>+#include &lt;asm/kvm_book3s.h&gt;</div><div class='add'>+#include &lt;asm/mmu.h&gt;</div><div class='add'>+#include &lt;asm/pgalloc.h&gt;</div><div class='add'>+#include &lt;asm/pte-walk.h&gt;</div><div class='add'>+#include &lt;asm/reg.h&gt;</div><div class='add'>+#include &lt;asm/plpar_wrappers.h&gt;</div><div class='add'>+#include &lt;asm/firmware.h&gt;</div><div class='add'>+</div><div class='add'>+#include "asm/guest-state-buffer.h"</div><div class='add'>+</div><div class='add'>+enum kvmppc_pmu_eventid {</div><div class='add'>+	KVMPPC_EVENT_HOST_HEAP,</div><div class='add'>+	KVMPPC_EVENT_HOST_HEAP_MAX,</div><div class='add'>+	KVMPPC_EVENT_HOST_PGTABLE,</div><div class='add'>+	KVMPPC_EVENT_HOST_PGTABLE_MAX,</div><div class='add'>+	KVMPPC_EVENT_HOST_PGTABLE_RECLAIM,</div><div class='add'>+	KVMPPC_EVENT_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define KVMPPC_PMU_EVENT_ATTR(_name, _id) \</div><div class='add'>+	PMU_EVENT_ATTR_ID(_name, kvmppc_events_sysfs_show, _id)</div><div class='add'>+</div><div class='add'>+static ssize_t kvmppc_events_sysfs_show(struct device *dev,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *page)</div><div class='add'>+{</div><div class='add'>+	struct perf_pmu_events_attr *pmu_attr;</div><div class='add'>+</div><div class='add'>+	pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);</div><div class='add'>+	return sprintf(page, "event=0x%02llx\n", pmu_attr-&gt;id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Holds the hostwide stats */</div><div class='add'>+static struct kvmppc_hostwide_stats {</div><div class='add'>+	u64 guest_heap;</div><div class='add'>+	u64 guest_heap_max;</div><div class='add'>+	u64 guest_pgtable_size;</div><div class='add'>+	u64 guest_pgtable_size_max;</div><div class='add'>+	u64 guest_pgtable_reclaim;</div><div class='add'>+} l0_stats;</div><div class='add'>+</div><div class='add'>+/* Protect access to l0_stats */</div><div class='add'>+static DEFINE_SPINLOCK(lock_l0_stats);</div><div class='add'>+</div><div class='add'>+/* GSB related structs needed to talk to L0 */</div><div class='add'>+static struct kvmppc_gs_msg *gsm_l0_stats;</div><div class='add'>+static struct kvmppc_gs_buff *gsb_l0_stats;</div><div class='add'>+static struct kvmppc_gs_parser gsp_l0_stats;</div><div class='add'>+</div><div class='add'>+static struct attribute *kvmppc_pmu_events_attr[] = {</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_heap, KVMPPC_EVENT_HOST_HEAP),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_heap_max, KVMPPC_EVENT_HOST_HEAP_MAX),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_pagetable, KVMPPC_EVENT_HOST_PGTABLE),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_pagetable_max, KVMPPC_EVENT_HOST_PGTABLE_MAX),</div><div class='add'>+	KVMPPC_PMU_EVENT_ATTR(host_pagetable_reclaim, KVMPPC_EVENT_HOST_PGTABLE_RECLAIM),</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group kvmppc_pmu_events_group = {</div><div class='add'>+	.name = "events",</div><div class='add'>+	.attrs = kvmppc_pmu_events_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+PMU_FORMAT_ATTR(event, "config:0-5");</div><div class='add'>+static struct attribute *kvmppc_pmu_format_attr[] = {</div><div class='add'>+	&amp;format_attr_event.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct attribute_group kvmppc_pmu_format_group = {</div><div class='add'>+	.name = "format",</div><div class='add'>+	.attrs = kvmppc_pmu_format_attr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group *kvmppc_pmu_attr_groups[] = {</div><div class='add'>+	&amp;kvmppc_pmu_events_group,</div><div class='add'>+	&amp;kvmppc_pmu_format_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Issue the hcall to get the L0-host stats.</div><div class='add'>+ * Should be called with l0-stat lock held</div><div class='add'>+ */</div><div class='add'>+static int kvmppc_update_l0_stats(void)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* With HOST_WIDE flags guestid and vcpuid will be ignored */</div><div class='add'>+	rc = kvmppc_gsb_recv(gsb_l0_stats, KVMPPC_GS_FLAGS_HOST_WIDE);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Parse the guest state buffer is successful */</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp_l0_stats, gsb_l0_stats);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Update the l0 returned stats*/</div><div class='add'>+	memset(&amp;l0_stats, 0, sizeof(l0_stats));</div><div class='add'>+	rc = kvmppc_gsm_refresh_info(gsm_l0_stats, gsb_l0_stats);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Update the value of the given perf_event */</div><div class='add'>+static int kvmppc_pmu_event_update(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	u64 curr_val, prev_val;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int config = event-&gt;attr.config;</div><div class='add'>+</div><div class='add'>+	/* Ensure no one else is modifying the l0_stats */</div><div class='add'>+	spin_lock_irqsave(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	rc = kvmppc_update_l0_stats();</div><div class='add'>+	if (!rc) {</div><div class='add'>+		switch (config) {</div><div class='add'>+		case KVMPPC_EVENT_HOST_HEAP:</div><div class='add'>+			curr_val = l0_stats.guest_heap;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_HEAP_MAX:</div><div class='add'>+			curr_val = l0_stats.guest_heap_max;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_PGTABLE:</div><div class='add'>+			curr_val = l0_stats.guest_pgtable_size;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_PGTABLE_MAX:</div><div class='add'>+			curr_val = l0_stats.guest_pgtable_size_max;</div><div class='add'>+			break;</div><div class='add'>+		case KVMPPC_EVENT_HOST_PGTABLE_RECLAIM:</div><div class='add'>+			curr_val = l0_stats.guest_pgtable_reclaim;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			rc = -ENOENT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	/* If no error than update the perf event */</div><div class='add'>+	if (!rc) {</div><div class='add'>+		prev_val = local64_xchg(&amp;event-&gt;hw.prev_count, curr_val);</div><div class='add'>+		if (curr_val &gt; prev_val)</div><div class='add'>+			local64_add(curr_val - prev_val, &amp;event-&gt;count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvmppc_pmu_event_init(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	unsigned int config = event-&gt;attr.config;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: Event(%p) id=%llu cpu=%x on_cpu=%x config=%u",</div><div class='add'>+		 __func__, event, event-&gt;id, event-&gt;cpu,</div><div class='add'>+		 event-&gt;oncpu, config);</div><div class='add'>+</div><div class='add'>+	if (event-&gt;attr.type != event-&gt;pmu-&gt;type)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (config &gt;= KVMPPC_EVENT_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	local64_set(&amp;event-&gt;hw.prev_count, 0);</div><div class='add'>+	local64_set(&amp;event-&gt;count, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_pmu_del(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	kvmppc_pmu_event_update(event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvmppc_pmu_add(struct perf_event *event, int flags)</div><div class='add'>+{</div><div class='add'>+	if (flags &amp; PERF_EF_START)</div><div class='add'>+		return kvmppc_pmu_event_update(event);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_pmu_read(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	kvmppc_pmu_event_update(event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return the size of the needed guest state buffer */</div><div class='add'>+static size_t hostwide_get_size(struct kvmppc_gs_msg *gsm)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	size_t size = 0;</div><div class='add'>+	const u16 ids[] = {</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+		KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(ids); i++)</div><div class='add'>+		size += kvmppc_gse_total_size(kvmppc_gsid_size(ids[i]));</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Populate the request guest state buffer */</div><div class='add'>+static int hostwide_fill_info(struct kvmppc_gs_buff *gsb,</div><div class='add'>+			      struct kvmppc_gs_msg *gsm)</div><div class='add'>+{</div><div class='add'>+	int rc = 0;</div><div class='add'>+	struct kvmppc_hostwide_stats  *stats = gsm-&gt;data;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * It doesn't matter what values are put into request buffer as</div><div class='add'>+	 * they are going to be overwritten anyways. But for the sake of</div><div class='add'>+	 * testcode and symmetry contents of existing stats are put</div><div class='add'>+	 * populated into the request guest state buffer.</div><div class='add'>+	 */</div><div class='add'>+	if (kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_HEAP,</div><div class='add'>+					stats-&gt;guest_heap);</div><div class='add'>+</div><div class='add'>+	if (!rc &amp;&amp; kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_HEAP_MAX))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_HEAP_MAX,</div><div class='add'>+					stats-&gt;guest_heap_max);</div><div class='add'>+</div><div class='add'>+	if (!rc &amp;&amp; kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE,</div><div class='add'>+					stats-&gt;guest_pgtable_size);</div><div class='add'>+	if (!rc &amp;&amp;</div><div class='add'>+	    kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX,</div><div class='add'>+					stats-&gt;guest_pgtable_size_max);</div><div class='add'>+	if (!rc &amp;&amp;</div><div class='add'>+	    kvmppc_gsm_includes(gsm, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM))</div><div class='add'>+		rc = kvmppc_gse_put_u64(gsb,</div><div class='add'>+					KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM,</div><div class='add'>+					stats-&gt;guest_pgtable_reclaim);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Parse and update the host wide stats from returned gsb */</div><div class='add'>+static int hostwide_refresh_info(struct kvmppc_gs_msg *gsm,</div><div class='add'>+				 struct kvmppc_gs_buff *gsb)</div><div class='add'>+{</div><div class='add'>+	struct kvmppc_gs_parser gsp = { 0 };</div><div class='add'>+	struct kvmppc_hostwide_stats *stats = gsm-&gt;data;</div><div class='add'>+	struct kvmppc_gs_elem *gse;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = kvmppc_gse_parse(&amp;gsp, gsb);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_heap = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_heap_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_pgtable_size = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_pgtable_size_max = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	gse = kvmppc_gsp_lookup(&amp;gsp, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+	if (gse)</div><div class='add'>+		stats-&gt;guest_pgtable_reclaim = kvmppc_gse_get_u64(gse);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* gsb-message ops for setting up/parsing */</div><div class='add'>+static struct kvmppc_gs_msg_ops gsb_ops_l0_stats = {</div><div class='add'>+	.get_size = hostwide_get_size,</div><div class='add'>+	.fill_info = hostwide_fill_info,</div><div class='add'>+	.refresh_info = hostwide_refresh_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvmppc_init_hostwide(void)</div><div class='add'>+{</div><div class='add'>+	int rc = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	/* already registered ? */</div><div class='add'>+	if (gsm_l0_stats) {</div><div class='add'>+		rc = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setup the Guest state message/buffer to talk to L0 */</div><div class='add'>+	gsm_l0_stats = kvmppc_gsm_new(&amp;gsb_ops_l0_stats, &amp;l0_stats,</div><div class='add'>+				      GSM_SEND, GFP_KERNEL);</div><div class='add'>+	if (!gsm_l0_stats) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Populate the Idents */</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_HEAP);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_HEAP_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_PGTABLE_SIZE_MAX);</div><div class='add'>+	kvmppc_gsm_include(gsm_l0_stats, KVMPPC_GSID_L0_GUEST_PGTABLE_RECLAIM);</div><div class='add'>+</div><div class='add'>+	/* allocate GSB. Guest/Vcpu Id is ignored */</div><div class='add'>+	gsb_l0_stats = kvmppc_gsb_new(kvmppc_gsm_size(gsm_l0_stats), 0, 0,</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!gsb_l0_stats) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ask the ops to fill in the info */</div><div class='add'>+	rc = kvmppc_gsm_fill_info(gsm_l0_stats, gsb_l0_stats);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (gsm_l0_stats)</div><div class='add'>+			kvmppc_gsm_free(gsm_l0_stats);</div><div class='add'>+		if (gsb_l0_stats)</div><div class='add'>+			kvmppc_gsb_free(gsb_l0_stats);</div><div class='add'>+		gsm_l0_stats = NULL;</div><div class='add'>+		gsb_l0_stats = NULL;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock_l0_stats, flags);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvmppc_cleanup_hostwide(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;lock_l0_stats, flags);</div><div class='add'>+</div><div class='add'>+	if (gsm_l0_stats)</div><div class='add'>+		kvmppc_gsm_free(gsm_l0_stats);</div><div class='add'>+	if (gsb_l0_stats)</div><div class='add'>+		kvmppc_gsb_free(gsb_l0_stats);</div><div class='add'>+	gsm_l0_stats = NULL;</div><div class='add'>+	gsb_l0_stats = NULL;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;lock_l0_stats, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* L1 wide counters PMU */</div><div class='add'>+static struct pmu kvmppc_pmu = {</div><div class='add'>+	.module = THIS_MODULE,</div><div class='add'>+	.task_ctx_nr = perf_sw_context,</div><div class='add'>+	.name = "kvm-hv",</div><div class='add'>+	.event_init = kvmppc_pmu_event_init,</div><div class='add'>+	.add = kvmppc_pmu_add,</div><div class='add'>+	.del = kvmppc_pmu_del,</div><div class='add'>+	.read = kvmppc_pmu_read,</div><div class='add'>+	.attr_groups = kvmppc_pmu_attr_groups,</div><div class='add'>+	.type = -1,</div><div class='add'>+	.scope = PERF_PMU_SCOPE_SYS_WIDE,</div><div class='add'>+	.capabilities = PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_INTERRUPT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init kvmppc_register_pmu(void)</div><div class='add'>+{</div><div class='add'>+	int rc = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* only support events for nestedv2 right now */</div><div class='add'>+	if (kvmhv_is_nestedv2()) {</div><div class='add'>+		rc = kvmppc_init_hostwide();</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* Register the pmu */</div><div class='add'>+		rc = perf_pmu_register(&amp;kvmppc_pmu, kvmppc_pmu.name, -1);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		pr_info("Registered kvm-hv pmu");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit kvmppc_unregister_pmu(void)</div><div class='add'>+{</div><div class='add'>+	if (kvmhv_is_nestedv2()) {</div><div class='add'>+		kvmppc_cleanup_hostwide();</div><div class='add'>+</div><div class='add'>+		if (kvmppc_pmu.type != -1)</div><div class='add'>+			perf_pmu_unregister(&amp;kvmppc_pmu);</div><div class='add'>+</div><div class='add'>+		pr_info("kvmhv_pmu unregistered.\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(kvmppc_register_pmu);</div><div class='add'>+module_exit(kvmppc_unregister_pmu);</div><div class='add'>+MODULE_DESCRIPTION("KVM PPC Book3s-hv PMU");</div><div class='add'>+MODULE_AUTHOR("Vaibhav Jain &lt;vaibhav@linux.ibm.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/powerpc/platforms/44x/gpio.c b/arch/powerpc/platforms/44x/gpio.c<br/>index e5f2319e5cbe..d540e261d85a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/44x/gpio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/44x/gpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/44x/gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/44x/gpio.c</a></div><div class='hunk'>@@ -75,8 +75,7 @@ __ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> 		clrbits32(&amp;regs-&gt;or, GPIO_MASK(gpio));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='add'>+static int ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct ppc4xx_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -88,6 +87,8 @@ ppc4xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chip-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ppc4xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='hunk'>@@ -179,7 +180,7 @@ static int __init ppc4xx_add_gpiochips(void)</div><div class='ctx'> 		gc-&gt;direction_input = ppc4xx_gpio_dir_in;</div><div class='ctx'> 		gc-&gt;direction_output = ppc4xx_gpio_dir_out;</div><div class='ctx'> 		gc-&gt;get = ppc4xx_gpio_get;</div><div class='del'>-		gc-&gt;set = ppc4xx_gpio_set;</div><div class='add'>+		gc-&gt;set_rv = ppc4xx_gpio_set;</div><div class='ctx'> </div><div class='ctx'> 		ret = of_mm_gpiochip_add_data(np, mm_gc, ppc4xx_gc);</div><div class='ctx'> 		if (ret)</div><div class='head'>diff --git a/arch/powerpc/platforms/44x/uic.c b/arch/powerpc/platforms/44x/uic.c<br/>index 31f760c2ec5d..85daf841fd3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/44x/uic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/44x/uic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/44x/uic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/44x/uic.c</a></div><div class='hunk'>@@ -254,8 +254,9 @@ static struct uic * __init uic_init_one(struct device_node *node)</div><div class='ctx'> 	}</div><div class='ctx'> 	uic-&gt;dcrbase = *dcrreg;</div><div class='ctx'> </div><div class='del'>-	uic-&gt;irqhost = irq_domain_add_linear(node, NR_UIC_INTS, &amp;uic_host_ops,</div><div class='del'>-					     uic);</div><div class='add'>+	uic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='add'>+						NR_UIC_INTS, &amp;uic_host_ops,</div><div class='add'>+						uic);</div><div class='ctx'> 	if (! uic-&gt;irqhost)</div><div class='ctx'> 		return NULL; /* FIXME: panic? */</div><div class='ctx'> </div><div class='hunk'>@@ -327,5 +328,5 @@ unsigned int uic_get_irq(void)</div><div class='ctx'> 	msr = mfdcr(primary_uic-&gt;dcrbase + UIC_MSR);</div><div class='ctx'> 	src = 32 - ffs(msr);</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(primary_uic-&gt;irqhost, src);</div><div class='add'>+	return irq_find_mapping(primary_uic-&gt;irqhost, src);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c<br/>index e995eb30bf09..2cf3c6237337 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/512x/mpc5121_ads_cpld.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/512x/mpc5121_ads_cpld.c</a></div><div class='hunk'>@@ -188,7 +188,8 @@ mpc5121_ads_cpld_pic_init(void)</div><div class='ctx'> </div><div class='ctx'> 	cpld_pic_node = of_node_get(np);</div><div class='ctx'> </div><div class='del'>-	cpld_pic_host = irq_domain_add_linear(np, 16, &amp;cpld_pic_host_ops, NULL);</div><div class='add'>+	cpld_pic_host = irq_domain_create_linear(of_fwnode_handle(np), 16,</div><div class='add'>+						 &amp;cpld_pic_host_ops, NULL);</div><div class='ctx'> 	if (!cpld_pic_host) {</div><div class='ctx'> 		printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");</div><div class='ctx'> 		goto end;</div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c<br/>index 19626cd42406..bc7f83cfec1d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/52xx/media5200.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/52xx/media5200.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/52xx/media5200.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/52xx/media5200.c</a></div><div class='hunk'>@@ -168,7 +168,7 @@ static void __init media5200_init_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;media5200_irq.lock);</div><div class='ctx'> </div><div class='del'>-	media5200_irq.irqhost = irq_domain_add_linear(fpga_np,</div><div class='add'>+	media5200_irq.irqhost = irq_domain_create_linear(of_fwnode_handle(fpga_np),</div><div class='ctx'> 			MEDIA5200_NUM_IRQS, &amp;media5200_irq_ops, &amp;media5200_irq);</div><div class='ctx'> 	if (!media5200_irq.irqhost)</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c<br/>index 1ea591ec6083..bda707d848a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/52xx/mpc52xx_gpt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/52xx/mpc52xx_gpt.c</a></div><div class='hunk'>@@ -247,9 +247,9 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)</div><div class='ctx'> 	if (!cascade_virq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	gpt-&gt;irqhost = irq_domain_add_linear(node, 1, &amp;mpc52xx_gpt_irq_ops, gpt);</div><div class='add'>+	gpt-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(node), 1, &amp;mpc52xx_gpt_irq_ops, gpt);</div><div class='ctx'> 	if (!gpt-&gt;irqhost) {</div><div class='del'>-		dev_err(gpt-&gt;dev, "irq_domain_add_linear() failed\n");</div><div class='add'>+		dev_err(gpt-&gt;dev, "irq_domain_create_linear() failed\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -280,7 +280,7 @@ static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> 	return (in_be32(&amp;gpt-&gt;regs-&gt;status) &gt;&gt; 8) &amp; 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='add'>+static int</div><div class='ctx'> mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpc52xx_gpt_priv *gpt = gpiochip_get_data(gc);</div><div class='hunk'>@@ -293,6 +293,8 @@ mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v)</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;gpt-&gt;lock, flags);</div><div class='ctx'> 	clrsetbits_be32(&amp;gpt-&gt;regs-&gt;mode, MPC52xx_GPT_MODE_GPIO_MASK, r);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;gpt-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)</div><div class='hunk'>@@ -334,7 +336,7 @@ static void mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt)</div><div class='ctx'> 	gpt-&gt;gc.direction_input  = mpc52xx_gpt_gpio_dir_in;</div><div class='ctx'> 	gpt-&gt;gc.direction_output = mpc52xx_gpt_gpio_dir_out;</div><div class='ctx'> 	gpt-&gt;gc.get = mpc52xx_gpt_gpio_get;</div><div class='del'>-	gpt-&gt;gc.set = mpc52xx_gpt_gpio_set;</div><div class='add'>+	gpt-&gt;gc.set_rv = mpc52xx_gpt_gpio_set;</div><div class='ctx'> 	gpt-&gt;gc.base = -1;</div><div class='ctx'> 	gpt-&gt;gc.parent = gpt-&gt;dev;</div><div class='ctx'> </div><div class='hunk'>@@ -369,7 +371,7 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq)</div><div class='ctx'> 	mutex_lock(&amp;mpc52xx_gpt_list_mutex);</div><div class='ctx'> 	list_for_each(pos, &amp;mpc52xx_gpt_list) {</div><div class='ctx'> 		gpt = container_of(pos, struct mpc52xx_gpt_priv, list);</div><div class='del'>-		if (gpt-&gt;irqhost &amp;&amp; irq == irq_linear_revmap(gpt-&gt;irqhost, 0)) {</div><div class='add'>+		if (gpt-&gt;irqhost &amp;&amp; irq == irq_find_mapping(gpt-&gt;irqhost, 0)) {</div><div class='ctx'> 			mutex_unlock(&amp;mpc52xx_gpt_list_mutex);</div><div class='ctx'> 			return gpt;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c<br/>index 43c881d31ca6..eb6a4e745c08 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/52xx/mpc52xx_pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/52xx/mpc52xx_pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/52xx/mpc52xx_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/52xx/mpc52xx_pic.c</a></div><div class='hunk'>@@ -446,7 +446,7 @@ void __init mpc52xx_init_irq(void)</div><div class='ctx'> 	 * As last step, add an irq host to translate the real</div><div class='ctx'> 	 * hw irq information provided by the ofw to linux virq</div><div class='ctx'> 	 */</div><div class='del'>-	mpc52xx_irqhost = irq_domain_add_linear(picnode,</div><div class='add'>+	mpc52xx_irqhost = irq_domain_create_linear(of_fwnode_handle(picnode),</div><div class='ctx'> 	                                 MPC52xx_IRQ_HIGHTESTHWIRQ,</div><div class='ctx'> 	                                 &amp;mpc52xx_irqhost_ops, NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -515,5 +515,5 @@ unsigned int mpc52xx_get_irq(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(mpc52xx_irqhost, irq);</div><div class='add'>+	return irq_find_mapping(mpc52xx_irqhost, irq);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c<br/>index 4d8fa9ed1a67..6e37dfc6c5c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c</a></div><div class='hunk'>@@ -92,10 +92,11 @@ static void mcu_power_off(void)</div><div class='ctx'> 	mutex_unlock(&amp;mcu-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='add'>+static int mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcu *mcu = gpiochip_get_data(gc);</div><div class='ctx'> 	u8 bit = 1 &lt;&lt; (4 + gpio);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mcu-&gt;lock);</div><div class='ctx'> 	if (val)</div><div class='hunk'>@@ -103,14 +104,16 @@ static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> 	else</div><div class='ctx'> 		mcu-&gt;reg_ctrl |= bit;</div><div class='ctx'> </div><div class='del'>-	i2c_smbus_write_byte_data(mcu-&gt;client, MCU_REG_CTRL, mcu-&gt;reg_ctrl);</div><div class='add'>+	ret = i2c_smbus_write_byte_data(mcu-&gt;client, MCU_REG_CTRL,</div><div class='add'>+					mcu-&gt;reg_ctrl);</div><div class='ctx'> 	mutex_unlock(&amp;mcu-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcu_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='ctx'> {</div><div class='del'>-	mcu_gpio_set(gc, gpio, val);</div><div class='del'>-	return 0;</div><div class='add'>+	return mcu_gpio_set(gc, gpio, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcu_gpiochip_add(struct mcu *mcu)</div><div class='hunk'>@@ -123,7 +126,7 @@ static int mcu_gpiochip_add(struct mcu *mcu)</div><div class='ctx'> 	gc-&gt;can_sleep = 1;</div><div class='ctx'> 	gc-&gt;ngpio = MCU_NUM_GPIO;</div><div class='ctx'> 	gc-&gt;base = -1;</div><div class='del'>-	gc-&gt;set = mcu_gpio_set;</div><div class='add'>+	gc-&gt;set_rv = mcu_gpio_set;</div><div class='ctx'> 	gc-&gt;direction_output = mcu_gpio_dir_out;</div><div class='ctx'> 	gc-&gt;parent = dev;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c<br/>index 60e0b8947ce6..4b69fb321a68 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/85xx/socrates_fpga_pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/85xx/socrates_fpga_pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/85xx/socrates_fpga_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/85xx/socrates_fpga_pic.c</a></div><div class='hunk'>@@ -83,7 +83,7 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)</div><div class='ctx'> 		if (cause &gt;&gt; (i + 16))</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='del'>-	return irq_linear_revmap(socrates_fpga_pic_irq_host,</div><div class='add'>+	return irq_find_mapping(socrates_fpga_pic_irq_host,</div><div class='ctx'> 			(irq_hw_number_t)i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -278,7 +278,7 @@ void __init socrates_fpga_pic_init(struct device_node *pic)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup an irq_domain structure */</div><div class='del'>-	socrates_fpga_pic_irq_host = irq_domain_add_linear(pic,</div><div class='add'>+	socrates_fpga_pic_irq_host = irq_domain_create_linear(of_fwnode_handle(pic),</div><div class='ctx'> 		    SOCRATES_FPGA_NUM_IRQS, &amp;socrates_fpga_pic_host_ops, NULL);</div><div class='ctx'> 	if (socrates_fpga_pic_irq_host == NULL) {</div><div class='ctx'> 		pr_err("FPGA PIC: Unable to allocate host\n");</div><div class='head'>diff --git a/arch/powerpc/platforms/8xx/cpm1-ic.c b/arch/powerpc/platforms/8xx/cpm1-ic.c<br/>index a18fc7c99f83..a49d4a9ab3bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/8xx/cpm1-ic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/8xx/cpm1-ic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/8xx/cpm1-ic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/8xx/cpm1-ic.c</a></div><div class='hunk'>@@ -59,7 +59,7 @@ static int cpm_get_irq(struct irq_desc *desc)</div><div class='ctx'> 	cpm_vec = in_be16(&amp;data-&gt;reg-&gt;cpic_civr);</div><div class='ctx'> 	cpm_vec &gt;&gt;= 11;</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(data-&gt;host, cpm_vec);</div><div class='add'>+	return irq_find_mapping(data-&gt;host, cpm_vec);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cpm_cascade(struct irq_desc *desc)</div><div class='hunk'>@@ -110,7 +110,8 @@ static int cpm_pic_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	out_be32(&amp;data-&gt;reg-&gt;cpic_cimr, 0);</div><div class='ctx'> </div><div class='del'>-	data-&gt;host = irq_domain_add_linear(dev-&gt;of_node, 64, &amp;cpm_pic_host_ops, data);</div><div class='add'>+	data-&gt;host = irq_domain_create_linear(of_fwnode_handle(dev-&gt;of_node),</div><div class='add'>+					      64, &amp;cpm_pic_host_ops, data);</div><div class='ctx'> 	if (!data-&gt;host)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/8xx/cpm1.c b/arch/powerpc/platforms/8xx/cpm1.c<br/>index 1dc095ad48fc..7462c221115c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/8xx/cpm1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/8xx/cpm1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/8xx/cpm1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/8xx/cpm1.c</a></div><div class='hunk'>@@ -417,7 +417,7 @@ static void __cpm1_gpio16_set(struct cpm1_gpio16_chip *cpm1_gc, u16 pin_mask, in</div><div class='ctx'> 	out_be16(&amp;iop-&gt;dat, cpm1_gc-&gt;cpdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+static int cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpm1_gpio16_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -428,6 +428,8 @@ static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> 	__cpm1_gpio16_set(cpm1_gc, pin_mask, value);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm1_gc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio16_to_irq(struct gpio_chip *gc, unsigned int gpio)</div><div class='hunk'>@@ -497,7 +499,7 @@ int cpm1_gpiochip_add16(struct device *dev)</div><div class='ctx'> 	gc-&gt;direction_input = cpm1_gpio16_dir_in;</div><div class='ctx'> 	gc-&gt;direction_output = cpm1_gpio16_dir_out;</div><div class='ctx'> 	gc-&gt;get = cpm1_gpio16_get;</div><div class='del'>-	gc-&gt;set = cpm1_gpio16_set;</div><div class='add'>+	gc-&gt;set_rv = cpm1_gpio16_set;</div><div class='ctx'> 	gc-&gt;to_irq = cpm1_gpio16_to_irq;</div><div class='ctx'> 	gc-&gt;parent = dev;</div><div class='ctx'> 	gc-&gt;owner = THIS_MODULE;</div><div class='hunk'>@@ -554,7 +556,7 @@ static void __cpm1_gpio32_set(struct cpm1_gpio32_chip *cpm1_gc, u32 pin_mask, in</div><div class='ctx'> 	out_be32(&amp;iop-&gt;dat, cpm1_gc-&gt;cpdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+static int cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpm1_gpio32_chip *cpm1_gc = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -565,6 +567,8 @@ static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> 	__cpm1_gpio32_set(cpm1_gc, pin_mask, value);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm1_gc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='hunk'>@@ -618,7 +622,7 @@ int cpm1_gpiochip_add32(struct device *dev)</div><div class='ctx'> 	gc-&gt;direction_input = cpm1_gpio32_dir_in;</div><div class='ctx'> 	gc-&gt;direction_output = cpm1_gpio32_dir_out;</div><div class='ctx'> 	gc-&gt;get = cpm1_gpio32_get;</div><div class='del'>-	gc-&gt;set = cpm1_gpio32_set;</div><div class='add'>+	gc-&gt;set_rv = cpm1_gpio32_set;</div><div class='ctx'> 	gc-&gt;parent = dev;</div><div class='ctx'> 	gc-&gt;owner = THIS_MODULE;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/8xx/pic.c b/arch/powerpc/platforms/8xx/pic.c<br/>index ea6b0e523c60..933d6ab7f512 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/8xx/pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/8xx/pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/8xx/pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/8xx/pic.c</a></div><div class='hunk'>@@ -80,7 +80,7 @@ unsigned int mpc8xx_get_irq(void)</div><div class='ctx'> 	if (irq == PIC_VEC_SPURRIOUS)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-        return irq_linear_revmap(mpc8xx_pic_host, irq);</div><div class='add'>+        return irq_find_mapping(mpc8xx_pic_host, irq);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -146,7 +146,8 @@ void __init mpc8xx_pic_init(void)</div><div class='ctx'> 	if (!siu_reg)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	mpc8xx_pic_host = irq_domain_add_linear(np, 64, &amp;mpc8xx_pic_host_ops, NULL);</div><div class='add'>+	mpc8xx_pic_host = irq_domain_create_linear(of_fwnode_handle(np), 64,</div><div class='add'>+						   &amp;mpc8xx_pic_host_ops, NULL);</div><div class='ctx'> 	if (!mpc8xx_pic_host)</div><div class='ctx'> 		printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c<br/>index 013d66304c31..91a8f0a7086e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/embedded6xx/flipper-pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/embedded6xx/flipper-pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/embedded6xx/flipper-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/embedded6xx/flipper-pic.c</a></div><div class='hunk'>@@ -149,8 +149,9 @@ static struct irq_domain * __init flipper_pic_init(struct device_node *np)</div><div class='ctx'> </div><div class='ctx'> 	__flipper_quiesce(io_base);</div><div class='ctx'> </div><div class='del'>-	irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,</div><div class='del'>-				  &amp;flipper_irq_domain_ops, io_base);</div><div class='add'>+	irq_domain = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+					      FLIPPER_NR_IRQS,</div><div class='add'>+					      &amp;flipper_irq_domain_ops, io_base);</div><div class='ctx'> 	if (!irq_domain) {</div><div class='ctx'> 		pr_err("failed to allocate irq_domain\n");</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -172,7 +173,7 @@ unsigned int flipper_pic_get_irq(void)</div><div class='ctx'> 		return 0;	/* no more IRQs pending */</div><div class='ctx'> </div><div class='ctx'> 	irq = __ffs(irq_status);</div><div class='del'>-	return irq_linear_revmap(flipper_irq_host, irq);</div><div class='add'>+	return irq_find_mapping(flipper_irq_host, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c<br/>index 4d2d92de30af..b57e87b0b3ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/embedded6xx/hlwd-pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/embedded6xx/hlwd-pic.c</a></div><div class='hunk'>@@ -175,8 +175,9 @@ static struct irq_domain *__init hlwd_pic_init(struct device_node *np)</div><div class='ctx'> </div><div class='ctx'> 	__hlwd_quiesce(io_base);</div><div class='ctx'> </div><div class='del'>-	irq_domain = irq_domain_add_linear(np, HLWD_NR_IRQS,</div><div class='del'>-					   &amp;hlwd_irq_domain_ops, io_base);</div><div class='add'>+	irq_domain = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+					      HLWD_NR_IRQS,</div><div class='add'>+					      &amp;hlwd_irq_domain_ops, io_base);</div><div class='ctx'> 	if (!irq_domain) {</div><div class='ctx'> 		pr_err("failed to allocate irq_domain\n");</div><div class='ctx'> 		iounmap(io_base);</div><div class='hunk'>@@ -189,7 +190,7 @@ static struct irq_domain *__init hlwd_pic_init(struct device_node *np)</div><div class='ctx'> unsigned int hlwd_pic_get_irq(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int hwirq = __hlwd_pic_get_irq(hlwd_irq_host);</div><div class='del'>-	return hwirq ? irq_linear_revmap(hlwd_irq_host, hwirq) : 0;</div><div class='add'>+	return hwirq ? irq_find_mapping(hlwd_irq_host, hwirq) : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c<br/>index 03a7c51f2645..c37783a03d25 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/powermac/pic.c</a></div><div class='hunk'>@@ -250,7 +250,7 @@ static unsigned int pmac_pic_get_irq(void)</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;pmac_pic_lock, flags);</div><div class='ctx'> 	if (unlikely(irq &lt; 0))</div><div class='ctx'> 		return 0;</div><div class='del'>-	return irq_linear_revmap(pmac_pic_host, irq);</div><div class='add'>+	return irq_find_mapping(pmac_pic_host, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pmac_pic_host_match(struct irq_domain *h, struct device_node *node,</div><div class='hunk'>@@ -327,8 +327,9 @@ static void __init pmac_pic_probe_oldstyle(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Allocate an irq host</div><div class='ctx'> 	 */</div><div class='del'>-	pmac_pic_host = irq_domain_add_linear(master, max_irqs,</div><div class='del'>-					      &amp;pmac_pic_host_ops, NULL);</div><div class='add'>+	pmac_pic_host = irq_domain_create_linear(of_fwnode_handle(master),</div><div class='add'>+						 max_irqs,</div><div class='add'>+						 &amp;pmac_pic_host_ops, NULL);</div><div class='ctx'> 	BUG_ON(pmac_pic_host == NULL);</div><div class='ctx'> 	irq_set_default_domain(pmac_pic_host);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c<br/>index 6de1cd5d8a58..e119ced05d10 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/powermac/setup.c</a></div><div class='hunk'>@@ -45,6 +45,7 @@</div><div class='ctx'> #include &lt;linux/root_dev.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -238,8 +239,7 @@ static void __init l2cr_init(void)</div><div class='ctx'> 				_set_L2CR(0);</div><div class='ctx'> 				_set_L2CR(*l2cr);</div><div class='ctx'> 				pr_info("L2CR overridden (0x%x), backside cache is %s\n",</div><div class='del'>-					*l2cr, ((*l2cr) &amp; 0x80000000) ?</div><div class='del'>-					"enabled" : "disabled");</div><div class='add'>+					*l2cr, str_enabled_disabled((*l2cr) &amp; 0x80000000));</div><div class='ctx'> 			}</div><div class='ctx'> 			of_node_put(np);</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c<br/>index 09e7fe24fac1..88e92af8acf9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/smp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/smp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/smp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/powermac/smp.c</a></div><div class='hunk'>@@ -190,7 +190,7 @@ static int __init psurge_secondary_ipi_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	psurge_host = irq_domain_add_nomap(NULL, ~0, &amp;psurge_host_ops, NULL);</div><div class='add'>+	psurge_host = irq_domain_create_nomap(NULL, ~0, &amp;psurge_host_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (psurge_host)</div><div class='ctx'> 		psurge_secondary_virq = irq_create_direct_mapping(psurge_host);</div><div class='head'>diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c<br/>index 8633891b7aa5..b4426a35aca3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/time.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powermac/time.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powermac/time.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/powermac/time.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/param.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/time.h&gt;</div><div class='hunk'>@@ -77,7 +78,7 @@ long __init pmac_time_init(void)</div><div class='ctx'> 		delta |= 0xFF000000UL;</div><div class='ctx'> 	dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) &amp; 0x80) != 0);</div><div class='ctx'> 	printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,</div><div class='del'>-		dst ? "on" : "off");</div><div class='add'>+		str_on_off(dst));</div><div class='ctx'> #endif</div><div class='ctx'> 	return delta;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig<br/>index 3fbe0295ce14..95d7ba73d43d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powernv/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powernv/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powernv/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/powernv/Kconfig</a></div><div class='hunk'>@@ -17,7 +17,7 @@ config PPC_POWERNV</div><div class='ctx'> 	select MMU_NOTIFIER</div><div class='ctx'> 	select FORCE_SMP</div><div class='ctx'> 	select ARCH_SUPPORTS_PER_VMA_LOCK</div><div class='del'>-	select PPC_RADIX_BROADCAST_TLBIE</div><div class='add'>+	select PPC_RADIX_BROADCAST_TLBIE if PPC_RADIX_MMU</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config OPAL_PRD</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/opal-irqchip.c b/arch/powerpc/platforms/powernv/opal-irqchip.c<br/>index d92759c21fae..e180bd8e1400 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powernv/opal-irqchip.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powernv/opal-irqchip.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powernv/opal-irqchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/powernv/opal-irqchip.c</a></div><div class='hunk'>@@ -191,7 +191,8 @@ int __init opal_event_init(void)</div><div class='ctx'> 	 * fall back to the legacy method (opal_event_request(...))</div><div class='ctx'> 	 * anyway. */</div><div class='ctx'> 	dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");</div><div class='del'>-	opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,</div><div class='add'>+	opal_event_irqchip.domain = irq_domain_create_linear(of_fwnode_handle(dn),</div><div class='add'>+				MAX_NUM_EVENTS,</div><div class='ctx'> 				&amp;opal_event_domain_ops, &amp;opal_event_irqchip);</div><div class='ctx'> 	of_node_put(dn);</div><div class='ctx'> 	if (!opal_event_irqchip.domain) {</div><div class='head'>diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c<br/>index ae4b549b5ca0..d8ccf2c9b98a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powernv/pci-ioda.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/powernv/pci-ioda.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/powernv/pci-ioda.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/powernv/pci-ioda.c</a></div><div class='hunk'>@@ -1897,7 +1897,7 @@ static int __init pnv_msi_allocate_domains(struct pci_controller *hose, unsigned</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hose-&gt;msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(hose-&gt;dn),</div><div class='add'>+	hose-&gt;msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(hose-&gt;dn),</div><div class='ctx'> 						     &amp;pnv_msi_domain_info,</div><div class='ctx'> 						     hose-&gt;dev_domain);</div><div class='ctx'> 	if (!hose-&gt;msi_domain) {</div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c<br/>index 61722133eb2d..22d91ac424dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/ps3/device-init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/ps3/device-init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/ps3/device-init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/ps3/device-init.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/reboot.h&gt;</div><div class='ctx'> #include &lt;linux/rcuwait.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/lv1call.h&gt;</div><div class='hunk'>@@ -724,7 +725,7 @@ static irqreturn_t ps3_notification_interrupt(int irq, void *data)</div><div class='ctx'> static int ps3_notification_read_write(struct ps3_notification_device *dev,</div><div class='ctx'> 				       u64 lpar, int write)</div><div class='ctx'> {</div><div class='del'>-	const char *op = write ? "write" : "read";</div><div class='add'>+	const char *op = str_write_read(write);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c<br/>index 95e96bd61a20..a4ad4b49eef7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/ps3/interrupt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/ps3/interrupt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/ps3/interrupt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/ps3/interrupt.c</a></div><div class='hunk'>@@ -743,7 +743,7 @@ void __init ps3_init_IRQ(void)</div><div class='ctx'> 	unsigned cpu;</div><div class='ctx'> 	struct irq_domain *host;</div><div class='ctx'> </div><div class='del'>-	host = irq_domain_add_nomap(NULL, PS3_PLUG_MAX + 1, &amp;ps3_host_ops, NULL);</div><div class='add'>+	host = irq_domain_create_nomap(NULL, PS3_PLUG_MAX + 1, &amp;ps3_host_ops, NULL);</div><div class='ctx'> 	irq_set_default_domain(host);</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig<br/>index a934c2a262f6..fa3c2fff082a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/Kconfig</a></div><div class='hunk'>@@ -23,7 +23,7 @@ config PPC_PSERIES</div><div class='ctx'> 	select FORCE_SMP</div><div class='ctx'> 	select SWIOTLB</div><div class='ctx'> 	select ARCH_SUPPORTS_PER_VMA_LOCK</div><div class='del'>-	select PPC_RADIX_BROADCAST_TLBIE</div><div class='add'>+	select PPC_RADIX_BROADCAST_TLBIE if PPC_RADIX_MMU</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> config PARAVIRT</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile<br/>index 3f3e3492e436..57222678bb3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/Makefile</a></div><div class='hunk'>@@ -3,7 +3,8 @@ ccflags-$(CONFIG_PPC_PSERIES_DEBUG)	+= -DDEBUG</div><div class='ctx'> </div><div class='ctx'> obj-y			:= lpar.o hvCall.o nvram.o reconfig.o \</div><div class='ctx'> 			   of_helpers.o rtas-work-area.o papr-sysparm.o \</div><div class='del'>-			   papr-vpd.o \</div><div class='add'>+			   papr-rtas-common.o papr-vpd.o papr-indices.o \</div><div class='add'>+			   papr-platform-dump.o papr-phy-attest.o \</div><div class='ctx'> 			   setup.o iommu.o event_sources.o ras.o \</div><div class='ctx'> 			   firmware.o power.o dlpar.o mobility.o rng.o \</div><div class='ctx'> 			   pci.o pci_dlpar.o eeh_pseries.o msi.o \</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/htmdump.c b/arch/powerpc/platforms/pseries/htmdump.c<br/>index 57fc1700f604..742ec52c9d4d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/htmdump.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/htmdump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/htmdump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/htmdump.c</a></div><div class='hunk'>@@ -10,28 +10,40 @@</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/plpar_wrappers.h&gt;</div><div class='add'>+#include &lt;asm/kvm_guest.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void *htm_buf;</div><div class='add'>+static void *htm_status_buf;</div><div class='add'>+static void *htm_info_buf;</div><div class='add'>+static void *htm_caps_buf;</div><div class='ctx'> static u32 nodeindex;</div><div class='ctx'> static u32 nodalchipindex;</div><div class='ctx'> static u32 coreindexonchip;</div><div class='ctx'> static u32 htmtype;</div><div class='add'>+static u32 htmconfigure;</div><div class='add'>+static u32 htmstart;</div><div class='add'>+static u32 htmsetup;</div><div class='add'>+static u64 htmflags;</div><div class='add'>+</div><div class='ctx'> static struct dentry *htmdump_debugfs_dir;</div><div class='add'>+#define	HTM_ENABLE	1</div><div class='add'>+#define	HTM_DISABLE	0</div><div class='add'>+#define	HTM_NOWRAP	1</div><div class='add'>+#define	HTM_WRAP	0</div><div class='ctx'> </div><div class='del'>-static ssize_t htmdump_read(struct file *filp, char __user *ubuf,</div><div class='del'>-			     size_t count, loff_t *ppos)</div><div class='add'>+/*</div><div class='add'>+ * Check the return code for H_HTM hcall.</div><div class='add'>+ * Return non-zero value (1) if either H_PARTIAL or H_SUCCESS</div><div class='add'>+ * is returned. For other return codes:</div><div class='add'>+ * Return zero if H_NOT_AVAILABLE.</div><div class='add'>+ * Return -EBUSY if hcall return busy.</div><div class='add'>+ * Return -EINVAL if any parameter or operation is not valid.</div><div class='add'>+ * Return -EPERM if HTM Virtualization Engine Technology code</div><div class='add'>+ * is not applied.</div><div class='add'>+ * Return -EIO if the HTM state is not valid.</div><div class='add'>+ */</div><div class='add'>+static ssize_t htm_return_check(long rc)</div><div class='ctx'> {</div><div class='del'>-	void *htm_buf = filp-&gt;private_data;</div><div class='del'>-	unsigned long page, read_size, available;</div><div class='del'>-	loff_t offset;</div><div class='del'>-	long rc;</div><div class='del'>-</div><div class='del'>-	page = ALIGN_DOWN(*ppos, PAGE_SIZE);</div><div class='del'>-	offset = (*ppos) % PAGE_SIZE;</div><div class='del'>-</div><div class='del'>-	rc = htm_get_dump_hardware(nodeindex, nodalchipindex, coreindexonchip,</div><div class='del'>-				   htmtype, virt_to_phys(htm_buf), PAGE_SIZE, page);</div><div class='del'>-</div><div class='ctx'> 	switch (rc) {</div><div class='ctx'> 	case H_SUCCESS:</div><div class='ctx'> 	/* H_PARTIAL for the case where all available data can't be</div><div class='hunk'>@@ -65,6 +77,38 @@ static ssize_t htmdump_read(struct file *filp, char __user *ubuf,</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Return 1 for H_SUCCESS/H_PARTIAL</div><div class='add'>+	 */</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t htmdump_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_buf = filp-&gt;private_data;</div><div class='add'>+	unsigned long page, read_size, available;</div><div class='add'>+	loff_t offset;</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	page = ALIGN_DOWN(*ppos, PAGE_SIZE);</div><div class='add'>+	offset = (*ppos) % PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm dump (H_HTM_OP_DUMP_DATA)</div><div class='add'>+	 * - last three values are address, size and offset</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_DUMP_DATA, virt_to_phys(htm_buf),</div><div class='add'>+				   PAGE_SIZE, page);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_DUMP_DATA, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	available = PAGE_SIZE;</div><div class='ctx'> 	read_size = min(count, available);</div><div class='ctx'> 	*ppos += read_size;</div><div class='hunk'>@@ -77,6 +121,292 @@ static const struct file_operations htmdump_fops = {</div><div class='ctx'> 	.open	= simple_open,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int  htmconfigure_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	long rc, ret;</div><div class='add'>+	unsigned long param1 = -1, param2 = -1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * value as 1 : configure HTM.</div><div class='add'>+	 * value as 0 : deconfigure HTM. Return -EINVAL for</div><div class='add'>+	 * other values.</div><div class='add'>+	 */</div><div class='add'>+	if (val == HTM_ENABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm configure (H_HTM_OP_CONFIGURE)</div><div class='add'>+		 * - If htmflags is set, param1 and param2 will be -1</div><div class='add'>+		 *   which is an indicator to use default htm mode reg mask</div><div class='add'>+		 *   and htm mode reg value.</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		if (!htmflags) {</div><div class='add'>+			param1 = 0;</div><div class='add'>+			param2 = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+			   htmtype, H_HTM_OP_CONFIGURE, param1, param2, 0);</div><div class='add'>+	} else if (val == HTM_DISABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm deconfigure (H_HTM_OP_DECONFIGURE)</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				htmtype, H_HTM_OP_DECONFIGURE, 0, 0, 0);</div><div class='add'>+	} else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set htmconfigure if operation succeeds */</div><div class='add'>+	htmconfigure = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmconfigure_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmconfigure;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int  htmstart_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * value as 1: start HTM</div><div class='add'>+	 * value as 0: stop HTM</div><div class='add'>+	 * Return -EINVAL for other values.</div><div class='add'>+	 */</div><div class='add'>+	if (val == HTM_ENABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm start (H_HTM_OP_START)</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+			   htmtype, H_HTM_OP_START, 0, 0, 0);</div><div class='add'>+</div><div class='add'>+	} else if (val == HTM_DISABLE) {</div><div class='add'>+		/*</div><div class='add'>+		 * Invoke H_HTM call with:</div><div class='add'>+		 * - operation as htm stop (H_HTM_OP_STOP)</div><div class='add'>+		 * - last three values are unused, hence set to zero</div><div class='add'>+		 */</div><div class='add'>+		rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				htmtype, H_HTM_OP_STOP, 0, 0, 0);</div><div class='add'>+	} else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set htmstart if H_HTM_OP_START/H_HTM_OP_STOP operation succeeds */</div><div class='add'>+	htmstart = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmstart_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmstart;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t htmstatus_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_status_buf = filp-&gt;private_data;</div><div class='add'>+	long rc, ret;</div><div class='add'>+	u64 *num_entries;</div><div class='add'>+	u64 to_copy;</div><div class='add'>+	int htmstatus_flag;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm status (H_HTM_OP_STATUS)</div><div class='add'>+	 * - last three values as addr, size and offset</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_STATUS, virt_to_phys(htm_status_buf),</div><div class='add'>+				   PAGE_SIZE, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_STATUS, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HTM status buffer, start of buffer + 0x10 gives the</div><div class='add'>+	 * number of HTM entries in the buffer. Each nest htm status</div><div class='add'>+	 * entry is 0x6 bytes where each core htm status entry is</div><div class='add'>+	 * 0x8 bytes.</div><div class='add'>+	 * So total count to copy is:</div><div class='add'>+	 * 32 bytes (for first 7 fields) + (number of HTM entries * entry size)</div><div class='add'>+	 */</div><div class='add'>+	num_entries = htm_status_buf + 0x10;</div><div class='add'>+	if (htmtype == 0x2)</div><div class='add'>+		htmstatus_flag = 0x8;</div><div class='add'>+	else</div><div class='add'>+		htmstatus_flag = 0x6;</div><div class='add'>+	to_copy = 32 + (be64_to_cpu(*num_entries) * htmstatus_flag);</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, ppos, htm_status_buf, to_copy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations htmstatus_fops = {</div><div class='add'>+	.llseek = NULL,</div><div class='add'>+	.read	= htmstatus_read,</div><div class='add'>+	.open	= simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t htminfo_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_info_buf = filp-&gt;private_data;</div><div class='add'>+	long rc, ret;</div><div class='add'>+	u64 *num_entries;</div><div class='add'>+	u64 to_copy;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm status (H_HTM_OP_STATUS)</div><div class='add'>+	 * - last three values as addr, size and offset</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_DUMP_SYSPROC_CONF, virt_to_phys(htm_info_buf),</div><div class='add'>+				   PAGE_SIZE, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_DUMP_SYSPROC_CONF, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HTM status buffer, start of buffer + 0x10 gives the</div><div class='add'>+	 * number of HTM entries in the buffer. Each entry of processor</div><div class='add'>+	 * is 16 bytes.</div><div class='add'>+	 *</div><div class='add'>+	 * So total count to copy is:</div><div class='add'>+	 * 32 bytes (for first 5 fields) + (number of HTM entries * entry size)</div><div class='add'>+	 */</div><div class='add'>+	num_entries = htm_info_buf + 0x10;</div><div class='add'>+	to_copy = 32 + (be64_to_cpu(*num_entries) * 16);</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, ppos, htm_info_buf, to_copy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t htmcaps_read(struct file *filp, char __user *ubuf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	void *htm_caps_buf = filp-&gt;private_data;</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm capabilities (H_HTM_OP_CAPABILITIES)</div><div class='add'>+	 * - last three values as addr, size (0x80 for Capabilities Output Buffer</div><div class='add'>+	 *   and zero</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+				   htmtype, H_HTM_OP_CAPABILITIES, virt_to_phys(htm_caps_buf),</div><div class='add'>+				   0x80, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_CAPABILITIES, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, ppos, htm_caps_buf, 0x80);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations htminfo_fops = {</div><div class='add'>+	.llseek = NULL,</div><div class='add'>+	.read   = htminfo_read,</div><div class='add'>+	.open   = simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct file_operations htmcaps_fops = {</div><div class='add'>+	.llseek = NULL,</div><div class='add'>+	.read   = htmcaps_read,</div><div class='add'>+	.open   = simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int  htmsetup_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	long rc, ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Input value: HTM buffer size in the power of 2</div><div class='add'>+	 * example: hex value 0x21 ( decimal: 33 ) is for</div><div class='add'>+	 * 8GB</div><div class='add'>+	 * Invoke H_HTM call with:</div><div class='add'>+	 * - operation as htm start (H_HTM_OP_SETUP)</div><div class='add'>+	 * - parameter 1 set to input value.</div><div class='add'>+	 * - last two values are unused, hence set to zero</div><div class='add'>+	 */</div><div class='add'>+	rc = htm_hcall_wrapper(htmflags, nodeindex, nodalchipindex, coreindexonchip,</div><div class='add'>+			htmtype, H_HTM_OP_SETUP, val, 0, 0);</div><div class='add'>+</div><div class='add'>+	ret = htm_return_check(rc);</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		pr_debug("H_HTM hcall failed for op: H_HTM_OP_SETUP, returning %ld\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set htmsetup if H_HTM_OP_SETUP operation succeeds */</div><div class='add'>+	htmsetup = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmsetup_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmsetup;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int  htmflags_set(void *data, u64 val)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Input value:</div><div class='add'>+	 * Currently supported flag value is to enable/disable</div><div class='add'>+	 * HTM buffer wrap. wrap is used along with "configure"</div><div class='add'>+	 * to prevent HTM buffer from wrapping.</div><div class='add'>+	 * Writing 1 will set noWrap while configuring HTM</div><div class='add'>+	 */</div><div class='add'>+	if (val == HTM_NOWRAP)</div><div class='add'>+		htmflags = H_HTM_FLAGS_NOWRAP;</div><div class='add'>+	else if (val == HTM_WRAP)</div><div class='add'>+		htmflags = 0;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int htmflags_get(void *data, u64 *val)</div><div class='add'>+{</div><div class='add'>+	*val = htmflags;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmconfigure_fops, htmconfigure_get, htmconfigure_set, "%llu\n");</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmstart_fops, htmstart_get, htmstart_set, "%llu\n");</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmsetup_fops, htmsetup_get, htmsetup_set, "%llu\n");</div><div class='add'>+DEFINE_SIMPLE_ATTRIBUTE(htmflags_fops, htmflags_get, htmflags_set, "%llu\n");</div><div class='add'>+</div><div class='ctx'> static int htmdump_init_debugfs(void)</div><div class='ctx'> {</div><div class='ctx'> 	htm_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='hunk'>@@ -98,11 +428,50 @@ static int htmdump_init_debugfs(void)</div><div class='ctx'> 			htmdump_debugfs_dir, &amp;htmtype);</div><div class='ctx'> 	debugfs_create_file("trace", 0400, htmdump_debugfs_dir, htm_buf, &amp;htmdump_fops);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Debugfs interface files to control HTM operations:</div><div class='add'>+	 */</div><div class='add'>+	debugfs_create_file("htmconfigure", 0600, htmdump_debugfs_dir, NULL, &amp;htmconfigure_fops);</div><div class='add'>+	debugfs_create_file("htmstart", 0600, htmdump_debugfs_dir, NULL, &amp;htmstart_fops);</div><div class='add'>+	debugfs_create_file("htmsetup", 0600, htmdump_debugfs_dir, NULL, &amp;htmsetup_fops);</div><div class='add'>+	debugfs_create_file("htmflags", 0600, htmdump_debugfs_dir, NULL, &amp;htmflags_fops);</div><div class='add'>+</div><div class='add'>+	/* Debugfs interface file to present status of HTM */</div><div class='add'>+	htm_status_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!htm_status_buf) {</div><div class='add'>+		pr_err("Failed to allocate htmstatus buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Debugfs interface file to present System Processor Configuration */</div><div class='add'>+	htm_info_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!htm_info_buf) {</div><div class='add'>+		pr_err("Failed to allocate htm info buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Debugfs interface file to present HTM capabilities */</div><div class='add'>+	htm_caps_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!htm_caps_buf) {</div><div class='add'>+		pr_err("Failed to allocate htm caps buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("htmstatus", 0400, htmdump_debugfs_dir, htm_status_buf, &amp;htmstatus_fops);</div><div class='add'>+	debugfs_create_file("htminfo", 0400, htmdump_debugfs_dir, htm_info_buf, &amp;htminfo_fops);</div><div class='add'>+	debugfs_create_file("htmcaps", 0400, htmdump_debugfs_dir, htm_caps_buf, &amp;htmcaps_fops);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init htmdump_init(void)</div><div class='ctx'> {</div><div class='add'>+	/* Disable on kvm guest */</div><div class='add'>+	if (is_kvm_guest()) {</div><div class='add'>+		pr_info("htmdump not supported inside KVM guest\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (htmdump_init_debugfs())</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c<br/>index d6ebc19fb99c..eec333dd2e59 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/iommu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/iommu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/iommu.c</a></div><div class='hunk'>@@ -197,7 +197,7 @@ static void tce_iommu_userspace_view_free(struct iommu_table *tbl)</div><div class='ctx'> </div><div class='ctx'> static void tce_free_pSeries(struct iommu_table *tbl)</div><div class='ctx'> {</div><div class='del'>-	if (!tbl-&gt;it_userspace)</div><div class='add'>+	if (tbl-&gt;it_userspace)</div><div class='ctx'> 		tce_iommu_userspace_view_free(tbl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c<br/>index f9d80111c322..ee1c8c6898a3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/msi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/msi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/msi.c</a></div><div class='hunk'>@@ -525,7 +525,12 @@ static struct msi_domain_info pseries_msi_domain_info = {</div><div class='ctx'> </div><div class='ctx'> static void pseries_msi_compose_msg(struct irq_data *data, struct msi_msg *msg)</div><div class='ctx'> {</div><div class='del'>-	__pci_read_msi_msg(irq_data_get_msi_desc(data), msg);</div><div class='add'>+	struct pci_dev *dev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;current_state == PCI_D0)</div><div class='add'>+		__pci_read_msi_msg(irq_data_get_msi_desc(data), msg);</div><div class='add'>+	else</div><div class='add'>+		get_cached_msi_msg(data-&gt;irq, msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct irq_chip pseries_msi_irq_chip = {</div><div class='hunk'>@@ -628,7 +633,7 @@ static int __pseries_msi_allocate_domains(struct pci_controller *phb,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phb-&gt;msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(phb-&gt;dn),</div><div class='add'>+	phb-&gt;msi_domain = pci_msi_create_irq_domain(of_fwnode_handle(phb-&gt;dn),</div><div class='ctx'> 						    &amp;pseries_msi_domain_info,</div><div class='ctx'> 						    phb-&gt;dev_domain);</div><div class='ctx'> 	if (!phb-&gt;msi_domain) {</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-indices.c b/arch/powerpc/platforms/pseries/papr-indices.c<br/>new file mode 100644<br/>index 000000000000..3c7545591c45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/papr-indices.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/papr-indices.c</a></div><div class='hunk'>@@ -0,0 +1,488 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-indices: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_helpers.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/rtas-work-area.h&gt;</div><div class='add'>+#include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;uapi/asm/papr-indices.h&gt;</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function-specific return values for ibm,set-dynamic-indicator and</div><div class='add'>+ * ibm,get-dynamic-sensor-state RTAS calls.</div><div class='add'>+ * PAPR+ v2.13 7.3.18 and 7.3.19.</div><div class='add'>+ */</div><div class='add'>+#define RTAS_IBM_DYNAMIC_INDICE_NO_INDICATOR	-3</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtas_get_indices_params - Parameters (in and out) for</div><div class='add'>+ *                                      ibm,get-indices.</div><div class='add'>+ * @is_sensor:	In: Caller-provided whether sensor or indicator.</div><div class='add'>+ * @indice_type:In: Caller-provided indice (sensor or indicator) token</div><div class='add'>+ * @work_area:	In: Caller-provided work area buffer for results.</div><div class='add'>+ * @next:	In: Sequence number. Out: Next sequence number.</div><div class='add'>+ * @status:	Out: RTAS call status.</div><div class='add'>+ */</div><div class='add'>+struct rtas_get_indices_params {</div><div class='add'>+	u8 is_sensor;</div><div class='add'>+	u32 indice_type;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	u32 next;</div><div class='add'>+	s32 status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * rtas_ibm_get_indices() - Call ibm,get-indices to fill a work area buffer.</div><div class='add'>+ * @params: See &amp;struct rtas_ibm_get_indices_params.</div><div class='add'>+ *</div><div class='add'>+ * Calls ibm,get-indices until it errors or successfully deposits data</div><div class='add'>+ * into the supplied work area. Handles RTAS retry statuses. Maps RTAS</div><div class='add'>+ * error statuses to reasonable errno values.</div><div class='add'>+ *</div><div class='add'>+ * The caller is expected to invoke rtas_ibm_get_indices() multiple times</div><div class='add'>+ * to retrieve all indices data for the provided indice type. Only one</div><div class='add'>+ * sequence should be in progress at any time; starting a new sequence</div><div class='add'>+ * will disrupt any sequence already in progress. Serialization of</div><div class='add'>+ * indices retrieval sequences is the responsibility of the caller.</div><div class='add'>+ *</div><div class='add'>+ * The caller should inspect @params.status to determine whether more</div><div class='add'>+ * calls are needed to complete the sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ve on error, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+static int rtas_ibm_get_indices(struct rtas_get_indices_params *params)</div><div class='add'>+{</div><div class='add'>+	struct rtas_work_area *work_area = params-&gt;work_area;</div><div class='add'>+	const s32 token = rtas_function_token(RTAS_FN_IBM_GET_INDICES);</div><div class='add'>+	u32 rets;</div><div class='add'>+	s32 fwrc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;rtas_ibm_get_indices_lock);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 5, 2, &amp;rets, params-&gt;is_sensor,</div><div class='add'>+				params-&gt;indice_type,</div><div class='add'>+				rtas_work_area_phys(work_area),</div><div class='add'>+				rtas_work_area_size(work_area),</div><div class='add'>+				params-&gt;next);</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_INVALID_PARAMETER: /* Indicator type is not supported */</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_START_OVER:</div><div class='add'>+		ret = -EAGAIN;</div><div class='add'>+		pr_info_ratelimited("Indices changed during retrieval, retrying\n");</div><div class='add'>+		params-&gt;next = 1;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='add'>+		params-&gt;next = rets;</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='add'>+		params-&gt;next = 0;</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,get-indices status %d\n", fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params-&gt;status = fwrc;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Internal indices sequence APIs. A sequence is a series of calls to</div><div class='add'>+ * ibm,get-indices for a given location code. The sequence ends when</div><div class='add'>+ * an error is encountered or all indices for the input has been</div><div class='add'>+ * returned.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * indices_sequence_begin() - Begin a indices retrieval sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ */</div><div class='add'>+static void indices_sequence_begin(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_get_indices_params  *param;</div><div class='add'>+</div><div class='add'>+	param = (struct rtas_get_indices_params *)seq-&gt;params;</div><div class='add'>+	/*</div><div class='add'>+	 * We could allocate the work area before acquiring the</div><div class='add'>+	 * function lock, but that would allow concurrent requests to</div><div class='add'>+	 * exhaust the limited work area pool for no benefit. So</div><div class='add'>+	 * allocate the work area under the lock.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_get_indices_lock);</div><div class='add'>+	param-&gt;work_area = rtas_work_area_alloc(RTAS_GET_INDICES_BUF_SIZE);</div><div class='add'>+	param-&gt;next = 1;</div><div class='add'>+	param-&gt;status = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * indices_sequence_end() - Finalize a indices retrieval sequence.</div><div class='add'>+ *</div><div class='add'>+ * Releases resources obtained by indices_sequence_begin().</div><div class='add'>+ */</div><div class='add'>+static void indices_sequence_end(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_get_indices_params *param;</div><div class='add'>+</div><div class='add'>+	param =  (struct rtas_get_indices_params *)seq-&gt;params;</div><div class='add'>+	rtas_work_area_free(param-&gt;work_area);</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_get_indices_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Work function to be passed to papr_rtas_blob_generate().</div><div class='add'>+ *</div><div class='add'>+ * ibm,get-indices RTAS call fills the work area with the certain</div><div class='add'>+ * format but does not return the bytes written in the buffer. So</div><div class='add'>+ * instead of kernel parsing this work area to determine the buffer</div><div class='add'>+ * length, copy the complete work area (RTAS_GET_INDICES_BUF_SIZE)</div><div class='add'>+ * to the blob and let the user space to obtain the data.</div><div class='add'>+ * Means RTAS_GET_INDICES_BUF_SIZE data will be returned for each</div><div class='add'>+ * read().</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static const char *indices_sequence_fill_work_area(struct papr_rtas_sequence *seq,</div><div class='add'>+						size_t *len)</div><div class='add'>+{</div><div class='add'>+	struct rtas_get_indices_params *p;</div><div class='add'>+	bool init_state;</div><div class='add'>+</div><div class='add'>+	p = (struct rtas_get_indices_params *)seq-&gt;params;</div><div class='add'>+	init_state = (p-&gt;next == 1) ? true : false;</div><div class='add'>+</div><div class='add'>+	if (papr_rtas_sequence_should_stop(seq, p-&gt;status, init_state))</div><div class='add'>+		return NULL;</div><div class='add'>+	if (papr_rtas_sequence_set_err(seq, rtas_ibm_get_indices(p)))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*len = RTAS_GET_INDICES_BUF_SIZE;</div><div class='add'>+	return rtas_work_area_raw_buf(p-&gt;work_area);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_indices_handle_read - returns indices blob data to the user space</div><div class='add'>+ *</div><div class='add'>+ * ibm,get-indices RTAS call fills the work area with the certian</div><div class='add'>+ * format but does not return the bytes written in the buffer and</div><div class='add'>+ * copied RTAS_GET_INDICES_BUF_SIZE data to the blob for each RTAS</div><div class='add'>+ * call. So send RTAS_GET_INDICES_BUF_SIZE buffer to the user space</div><div class='add'>+ * for each read().</div><div class='add'>+ */</div><div class='add'>+static ssize_t papr_indices_handle_read(struct file *file,</div><div class='add'>+		char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	/* we should not instantiate a handle without any data attached. */</div><div class='add'>+	if (!papr_rtas_blob_has_data(blob)) {</div><div class='add'>+		pr_err_once("handle without data\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size &lt; RTAS_GET_INDICES_BUF_SIZE) {</div><div class='add'>+		pr_err_once("Invalid buffer length %ld, expect %d\n",</div><div class='add'>+				size, RTAS_GET_INDICES_BUF_SIZE);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (size &gt; RTAS_GET_INDICES_BUF_SIZE)</div><div class='add'>+		size = RTAS_GET_INDICES_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buf, size, off, blob-&gt;data, blob-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_indices_handle_ops = {</div><div class='add'>+	.read = papr_indices_handle_read,</div><div class='add'>+	.llseek = papr_rtas_common_handle_seek,</div><div class='add'>+	.release = papr_rtas_common_handle_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_indices_create_handle() - Create a fd-based handle for reading</div><div class='add'>+ *                                indices data</div><div class='add'>+ * @ubuf: Input parameters to RTAS call such as whether sensor or indicator</div><div class='add'>+ *        and indice type in user memory</div><div class='add'>+ *</div><div class='add'>+ * Handler for PAPR_INDICES_IOC_GET ioctl command. Validates @ubuf</div><div class='add'>+ * and instantiates an immutable indices "blob" for it. The blob is</div><div class='add'>+ * attached to a file descriptor for reading by user space. The memory</div><div class='add'>+ * backing the blob is freed when the file is released.</div><div class='add'>+ *</div><div class='add'>+ * The entire requested indices is retrieved by this call and all</div><div class='add'>+ * necessary RTAS interactions are performed before returning the fd</div><div class='add'>+ * to user space. This keeps the read handler simple and ensures that</div><div class='add'>+ * the kernel can prevent interleaving of ibm,get-indices call sequences.</div><div class='add'>+ *</div><div class='add'>+ * Return: The installed fd number if successful, -ve errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static long papr_indices_create_handle(struct papr_indices_io_block __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct papr_rtas_sequence seq = {};</div><div class='add'>+	struct rtas_get_indices_params params = {};</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	if (get_user(params.is_sensor, &amp;ubuf-&gt;indices.is_sensor))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (get_user(params.indice_type, &amp;ubuf-&gt;indices.indice_type))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	seq = (struct papr_rtas_sequence) {</div><div class='add'>+		.begin = indices_sequence_begin,</div><div class='add'>+		.end = indices_sequence_end,</div><div class='add'>+		.work = indices_sequence_fill_work_area,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	seq.params = &amp;params;</div><div class='add'>+	fd = papr_rtas_setup_file_interface(&amp;seq,</div><div class='add'>+			&amp;papr_indices_handle_ops, "[papr-indices]");</div><div class='add'>+</div><div class='add'>+	return fd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Create work area with the input parameters. This function is used</div><div class='add'>+ * for both ibm,set-dynamic-indicator and ibm,get-dynamic-sensor-state</div><div class='add'>+ * RTAS Calls.</div><div class='add'>+ */</div><div class='add'>+static struct rtas_work_area *</div><div class='add'>+papr_dynamic_indice_buf_from_user(struct papr_indices_io_block __user *ubuf,</div><div class='add'>+				struct papr_indices_io_block *kbuf)</div><div class='add'>+{</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	u32 length;</div><div class='add'>+	__be32 len_be;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(kbuf, ubuf, sizeof(*kbuf)))</div><div class='add'>+		return ERR_PTR(-EFAULT);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (!string_is_terminated(kbuf-&gt;dynamic_param.location_code_str,</div><div class='add'>+			ARRAY_SIZE(kbuf-&gt;dynamic_param.location_code_str)))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The input data in the work area should be as follows:</div><div class='add'>+	 * - 32-bit integer length of the location code string,</div><div class='add'>+	 *   including NULL.</div><div class='add'>+	 * - Location code string, NULL terminated, identifying the</div><div class='add'>+	 *   token (sensor or indicator).</div><div class='add'>+	 * PAPR 2.13 - R1–7.3.18–5 ibm,set-dynamic-indicator</div><div class='add'>+	 *           - R1–7.3.19–5 ibm,get-dynamic-sensor-state</div><div class='add'>+	 */</div><div class='add'>+	/*</div><div class='add'>+	 * Length that user space passed should also include NULL</div><div class='add'>+	 * terminator.</div><div class='add'>+	 */</div><div class='add'>+	length = strlen(kbuf-&gt;dynamic_param.location_code_str) + 1;</div><div class='add'>+	if (length &gt; LOC_CODE_SIZE)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	len_be = cpu_to_be32(length);</div><div class='add'>+</div><div class='add'>+	work_area = rtas_work_area_alloc(LOC_CODE_SIZE + sizeof(u32));</div><div class='add'>+	memcpy(rtas_work_area_raw_buf(work_area), &amp;len_be, sizeof(u32));</div><div class='add'>+	memcpy((rtas_work_area_raw_buf(work_area) + sizeof(u32)),</div><div class='add'>+			&amp;kbuf-&gt;dynamic_param.location_code_str, length);</div><div class='add'>+</div><div class='add'>+	return work_area;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_dynamic_indicator_ioc_set - ibm,set-dynamic-indicator RTAS Call</div><div class='add'>+ * PAPR 2.13 7.3.18</div><div class='add'>+ *</div><div class='add'>+ * @ubuf: Input parameters to RTAS call such as indicator token and</div><div class='add'>+ *        new state.</div><div class='add'>+ *</div><div class='add'>+ * Returns success or -errno.</div><div class='add'>+ */</div><div class='add'>+static long papr_dynamic_indicator_ioc_set(struct papr_indices_io_block __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct papr_indices_io_block kbuf;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	s32 fwrc, token, ret;</div><div class='add'>+</div><div class='add'>+	token = rtas_function_token(RTAS_FN_IBM_SET_DYNAMIC_INDICATOR);</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+	work_area = papr_dynamic_indice_buf_from_user(ubuf, &amp;kbuf);</div><div class='add'>+	if (IS_ERR(work_area)) {</div><div class='add'>+		ret = PTR_ERR(work_area);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 3, 1, NULL,</div><div class='add'>+				kbuf.dynamic_param.token,</div><div class='add'>+				kbuf.dynamic_param.state,</div><div class='add'>+				rtas_work_area_phys(work_area));</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	rtas_work_area_free(work_area);</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_SUCCESS:</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_IBM_DYNAMIC_INDICE_NO_INDICATOR:	/* No such indicator */</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("unexpected ibm,set-dynamic-indicator result %d\n",</div><div class='add'>+			fwrc);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case RTAS_HARDWARE_ERROR:	/* Hardware/platform error */</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_set_dynamic_indicator_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_dynamic_sensor_ioc_get - ibm,get-dynamic-sensor-state RTAS Call</div><div class='add'>+ * PAPR 2.13 7.3.19</div><div class='add'>+ *</div><div class='add'>+ * @ubuf: Input parameters to RTAS call such as sensor token</div><div class='add'>+ *        Copies the state in user space buffer.</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * Returns success or -errno.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static long papr_dynamic_sensor_ioc_get(struct papr_indices_io_block __user *ubuf)</div><div class='add'>+{</div><div class='add'>+	struct papr_indices_io_block kbuf;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	s32 fwrc, token, ret;</div><div class='add'>+	u32 rets;</div><div class='add'>+</div><div class='add'>+	token = rtas_function_token(RTAS_FN_IBM_GET_DYNAMIC_SENSOR_STATE);</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='add'>+	work_area = papr_dynamic_indice_buf_from_user(ubuf, &amp;kbuf);</div><div class='add'>+	if (IS_ERR(work_area)) {</div><div class='add'>+		ret = PTR_ERR(work_area);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 2, 2, &amp;rets,</div><div class='add'>+				kbuf.dynamic_param.token,</div><div class='add'>+				rtas_work_area_phys(work_area));</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	rtas_work_area_free(work_area);</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_SUCCESS:</div><div class='add'>+		if (put_user(rets, &amp;ubuf-&gt;dynamic_param.state))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+		else</div><div class='add'>+			ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_IBM_DYNAMIC_INDICE_NO_INDICATOR:	/* No such indicator */</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("unexpected ibm,get-dynamic-sensor result %d\n",</div><div class='add'>+				fwrc);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case RTAS_HARDWARE_ERROR:	/* Hardware/platform error */</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_get_dynamic_sensor_state_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Top-level ioctl handler for /dev/papr-indices.</div><div class='add'>+ */</div><div class='add'>+static long papr_indices_dev_ioctl(struct file *filp, unsigned int ioctl,</div><div class='add'>+				unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	void __user *argp = (__force void __user *)arg;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	switch (ioctl) {</div><div class='add'>+	case PAPR_INDICES_IOC_GET:</div><div class='add'>+		ret = papr_indices_create_handle(argp);</div><div class='add'>+		break;</div><div class='add'>+	case PAPR_DYNAMIC_SENSOR_IOC_GET:</div><div class='add'>+		ret = papr_dynamic_sensor_ioc_get(argp);</div><div class='add'>+		break;</div><div class='add'>+	case PAPR_DYNAMIC_INDICATOR_IOC_SET:</div><div class='add'>+		if (filp-&gt;f_mode &amp; FMODE_WRITE)</div><div class='add'>+			ret = papr_dynamic_indicator_ioc_set(argp);</div><div class='add'>+		else</div><div class='add'>+			ret = -EBADF;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENOIOCTLCMD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_indices_ops = {</div><div class='add'>+	.unlocked_ioctl = papr_indices_dev_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice papr_indices_dev = {</div><div class='add'>+	.minor = MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name = "papr-indices",</div><div class='add'>+	.fops = &amp;papr_indices_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int papr_indices_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_GET_INDICES))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_SET_DYNAMIC_INDICATOR))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_GET_DYNAMIC_SENSOR_STATE))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return misc_register(&amp;papr_indices_dev);</div><div class='add'>+}</div><div class='add'>+machine_device_initcall(pseries, papr_indices_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-phy-attest.c b/arch/powerpc/platforms/pseries/papr-phy-attest.c<br/>new file mode 100644<br/>index 000000000000..1907f2411567<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/papr-phy-attest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/papr-phy-attest.c</a></div><div class='hunk'>@@ -0,0 +1,288 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-phy-attest: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_helpers.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/rtas-work-area.h&gt;</div><div class='add'>+#include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;uapi/asm/papr-physical-attestation.h&gt;</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtas_phy_attest_params - Parameters (in and out) for</div><div class='add'>+ * ibm,physical-attestation.</div><div class='add'>+ *</div><div class='add'>+ * @cmd:  In: Caller-provided attestation command buffer. Must be</div><div class='add'>+ *        RTAS-addressable.</div><div class='add'>+ * @work_area: In: Caller-provided work area buffer for attestation</div><div class='add'>+ *             command structure</div><div class='add'>+ *             Out: Caller-provided work area buffer for the response</div><div class='add'>+ * @cmd_len:   In: Caller-provided attestation command structure</div><div class='add'>+ *             length</div><div class='add'>+ * @sequence:  In: Sequence number. Out: Next sequence number.</div><div class='add'>+ * @written:   Out: Bytes written by ibm,physical-attestation to</div><div class='add'>+ *             @work_area.</div><div class='add'>+ * @status:    Out: RTAS call status.</div><div class='add'>+ */</div><div class='add'>+struct rtas_phy_attest_params {</div><div class='add'>+	struct papr_phy_attest_io_block cmd;</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	u32 cmd_len;</div><div class='add'>+	u32 sequence;</div><div class='add'>+	u32 written;</div><div class='add'>+	s32 status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtas_physical_attestation() - Call ibm,physical-attestation to</div><div class='add'>+ * fill a work area buffer.</div><div class='add'>+ * @params: See &amp;struct rtas_phy_attest_params.</div><div class='add'>+ *</div><div class='add'>+ * Calls ibm,physical-attestation until it errors or successfully</div><div class='add'>+ * deposits data into the supplied work area. Handles RTAS retry</div><div class='add'>+ * statuses. Maps RTAS error statuses to reasonable errno values.</div><div class='add'>+ *</div><div class='add'>+ * The caller is expected to invoke rtas_physical_attestation()</div><div class='add'>+ * multiple times to retrieve all the data for the provided</div><div class='add'>+ * attestation command. Only one sequence should be in progress at</div><div class='add'>+ * any time; starting a new sequence will disrupt any sequence</div><div class='add'>+ * already in progress. Serialization of attestation retrieval</div><div class='add'>+ * sequences is the responsibility of the caller.</div><div class='add'>+ *</div><div class='add'>+ * The caller should inspect @params.status to determine whether more</div><div class='add'>+ * calls are needed to complete the sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ve on error, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+static int rtas_physical_attestation(struct rtas_phy_attest_params *params)</div><div class='add'>+{</div><div class='add'>+	struct rtas_work_area *work_area;</div><div class='add'>+	s32 fwrc, token;</div><div class='add'>+	u32 rets[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	work_area = params-&gt;work_area;</div><div class='add'>+	token = rtas_function_token(RTAS_FN_IBM_PHYSICAL_ATTESTATION);</div><div class='add'>+	if (token == RTAS_UNKNOWN_SERVICE)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;rtas_ibm_physical_attestation_lock);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(token, 3, 3, rets,</div><div class='add'>+				 rtas_work_area_phys(work_area),</div><div class='add'>+				 params-&gt;cmd_len,</div><div class='add'>+				 params-&gt;sequence);</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_INVALID_PARAMETER:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='add'>+		params-&gt;sequence = rets[0];</div><div class='add'>+		fallthrough;</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='add'>+		params-&gt;written = rets[1];</div><div class='add'>+		/*</div><div class='add'>+		 * Kernel or firmware bug, do not continue.</div><div class='add'>+		 */</div><div class='add'>+		if (WARN(params-&gt;written &gt; rtas_work_area_size(work_area),</div><div class='add'>+			 "possible write beyond end of work area"))</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+		else</div><div class='add'>+			ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,get-phy_attest status %d\n", fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params-&gt;status = fwrc;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Internal physical-attestation sequence APIs. A physical-attestation</div><div class='add'>+ * sequence is a series of calls to get ibm,physical-attestation</div><div class='add'>+ * for a given attestation command. The sequence ends when an error</div><div class='add'>+ * is encountered or all data for the attestation command has been</div><div class='add'>+ * returned.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_attest_sequence_begin() - Begin a response data for attestation</div><div class='add'>+ * command retrieval sequence.</div><div class='add'>+ * @seq: user specified parameters for RTAS call from seq struct.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ */</div><div class='add'>+static void phy_attest_sequence_begin(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *param;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We could allocate the work area before acquiring the</div><div class='add'>+	 * function lock, but that would allow concurrent requests to</div><div class='add'>+	 * exhaust the limited work area pool for no benefit. So</div><div class='add'>+	 * allocate the work area under the lock.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;rtas_ibm_physical_attestation_lock);</div><div class='add'>+	param =  (struct rtas_phy_attest_params *)seq-&gt;params;</div><div class='add'>+	param-&gt;work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	memcpy(rtas_work_area_raw_buf(param-&gt;work_area), &amp;param-&gt;cmd,</div><div class='add'>+			param-&gt;cmd_len);</div><div class='add'>+	param-&gt;sequence = 1;</div><div class='add'>+	param-&gt;status = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_attest_sequence_end() - Finalize a attestation command</div><div class='add'>+ * response retrieval sequence.</div><div class='add'>+ * @seq: Sequence state.</div><div class='add'>+ *</div><div class='add'>+ * Releases resources obtained by phy_attest_sequence_begin().</div><div class='add'>+ */</div><div class='add'>+static void phy_attest_sequence_end(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *param;</div><div class='add'>+</div><div class='add'>+	param =  (struct rtas_phy_attest_params *)seq-&gt;params;</div><div class='add'>+	rtas_work_area_free(param-&gt;work_area);</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_physical_attestation_lock);</div><div class='add'>+	kfree(param);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Generator function to be passed to papr_rtas_blob_generate().</div><div class='add'>+ */</div><div class='add'>+static const char *phy_attest_sequence_fill_work_area(struct papr_rtas_sequence *seq,</div><div class='add'>+						size_t *len)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *p;</div><div class='add'>+	bool init_state;</div><div class='add'>+</div><div class='add'>+	p = (struct rtas_phy_attest_params *)seq-&gt;params;</div><div class='add'>+	init_state = (p-&gt;written == 0) ? true : false;</div><div class='add'>+</div><div class='add'>+	if (papr_rtas_sequence_should_stop(seq, p-&gt;status, init_state))</div><div class='add'>+		return NULL;</div><div class='add'>+	if (papr_rtas_sequence_set_err(seq, rtas_physical_attestation(p)))</div><div class='add'>+		return NULL;</div><div class='add'>+	*len = p-&gt;written;</div><div class='add'>+	return rtas_work_area_raw_buf(p-&gt;work_area);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_phy_attest_handle_ops = {</div><div class='add'>+	.read = papr_rtas_common_handle_read,</div><div class='add'>+	.llseek = papr_rtas_common_handle_seek,</div><div class='add'>+	.release = papr_rtas_common_handle_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_phy_attest_create_handle() - Create a fd-based handle for</div><div class='add'>+ * reading the response for the given attestation command.</div><div class='add'>+ * @ulc: Attestation command in user memory; defines the scope of</div><div class='add'>+ *       data for the attestation command to retrieve.</div><div class='add'>+ *</div><div class='add'>+ * Handler for PAPR_PHYSICAL_ATTESTATION_IOC_CREATE_HANDLE ioctl</div><div class='add'>+ * command. Validates @ulc and instantiates an immutable response</div><div class='add'>+ * "blob" for attestation command. The blob is attached to a file</div><div class='add'>+ * descriptor for reading by user space. The memory backing the blob</div><div class='add'>+ * is freed when the file is released.</div><div class='add'>+ *</div><div class='add'>+ * The entire requested response buffer for the attestation command</div><div class='add'>+ * retrieved by this call and all necessary RTAS interactions are</div><div class='add'>+ * performed before returning the fd to user space. This keeps the</div><div class='add'>+ * read handler simple and ensures that kernel can prevent</div><div class='add'>+ * interleaving ibm,physical-attestation call sequences.</div><div class='add'>+ *</div><div class='add'>+ * Return: The installed fd number if successful, -ve errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static long papr_phy_attest_create_handle(struct papr_phy_attest_io_block __user *ulc)</div><div class='add'>+{</div><div class='add'>+	struct rtas_phy_attest_params *params;</div><div class='add'>+	struct papr_rtas_sequence seq = {};</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Freed in phy_attest_sequence_end().</div><div class='add'>+	 */</div><div class='add'>+	params =  kzalloc(sizeof(*params), GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!params)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(&amp;params-&gt;cmd, ulc,</div><div class='add'>+			sizeof(struct papr_phy_attest_io_block)))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	params-&gt;cmd_len = be32_to_cpu(params-&gt;cmd.length);</div><div class='add'>+	seq = (struct papr_rtas_sequence) {</div><div class='add'>+		.begin = phy_attest_sequence_begin,</div><div class='add'>+		.end = phy_attest_sequence_end,</div><div class='add'>+		.work = phy_attest_sequence_fill_work_area,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	seq.params = (void *)params;</div><div class='add'>+</div><div class='add'>+	fd = papr_rtas_setup_file_interface(&amp;seq,</div><div class='add'>+			&amp;papr_phy_attest_handle_ops,</div><div class='add'>+			"[papr-physical-attestation]");</div><div class='add'>+</div><div class='add'>+	return fd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Top-level ioctl handler for /dev/papr-physical-attestation.</div><div class='add'>+ */</div><div class='add'>+static long papr_phy_attest_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	void __user *argp = (__force void __user *)arg;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	switch (ioctl) {</div><div class='add'>+	case PAPR_PHY_ATTEST_IOC_HANDLE:</div><div class='add'>+		ret = papr_phy_attest_create_handle(argp);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENOIOCTLCMD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_phy_attest_ops = {</div><div class='add'>+	.unlocked_ioctl = papr_phy_attest_dev_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice papr_phy_attest_dev = {</div><div class='add'>+	.minor = MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name = "papr-physical-attestation",</div><div class='add'>+	.fops = &amp;papr_phy_attest_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int papr_phy_attest_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_PHYSICAL_ATTESTATION))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return misc_register(&amp;papr_phy_attest_dev);</div><div class='add'>+}</div><div class='add'>+machine_device_initcall(pseries, papr_phy_attest_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-platform-dump.c b/arch/powerpc/platforms/pseries/papr-platform-dump.c<br/>new file mode 100644<br/>index 000000000000..f8d55eccdb6b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/papr-platform-dump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/papr-platform-dump.c</a></div><div class='hunk'>@@ -0,0 +1,411 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-platform-dump: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/anon_inodes.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;asm/machdep.h&gt;</div><div class='add'>+#include &lt;asm/rtas-work-area.h&gt;</div><div class='add'>+#include &lt;asm/rtas.h&gt;</div><div class='add'>+#include &lt;uapi/asm/papr-platform-dump.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function-specific return values for ibm,platform-dump, derived from</div><div class='add'>+ * PAPR+ v2.13 7.3.3.4.1 "ibm,platform-dump RTAS Call".</div><div class='add'>+ */</div><div class='add'>+#define	RTAS_IBM_PLATFORM_DUMP_COMPLETE	0	/* Complete dump retrieved. */</div><div class='add'>+#define	RTAS_IBM_PLATFORM_DUMP_CONTINUE	1	/* Continue dump */</div><div class='add'>+#define	RTAS_NOT_AUTHORIZED		-9002	/* Not Authorized */</div><div class='add'>+</div><div class='add'>+#define	RTAS_IBM_PLATFORM_DUMP_START	2 /* Linux status to start dump */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ibm_platform_dump_params - Parameters (in and out) for</div><div class='add'>+ *                                              ibm,platform-dump</div><div class='add'>+ * @work_area:		In: work area buffer for results.</div><div class='add'>+ * @buf_length:		In: work area buffer length in bytes</div><div class='add'>+ * @dump_tag_hi:	In: Most-significant 32 bits of a Dump_Tag representing</div><div class='add'>+ *                      an id of the dump being processed.</div><div class='add'>+ * @dump_tag_lo:	In: Least-significant 32 bits of a Dump_Tag representing</div><div class='add'>+ *                      an id of the dump being processed.</div><div class='add'>+ * @sequence_hi:	In: Sequence number in most-significant 32 bits.</div><div class='add'>+ *                      Out: Next sequence number in most-significant 32 bits.</div><div class='add'>+ * @sequence_lo:	In: Sequence number in Least-significant 32 bits</div><div class='add'>+ *                      Out: Next sequence number in Least-significant 32 bits.</div><div class='add'>+ * @bytes_ret_hi:	Out: Bytes written in most-significant 32 bits.</div><div class='add'>+ * @bytes_ret_lo:	Out: Bytes written in Least-significant 32 bits.</div><div class='add'>+ * @status:		Out: RTAS call status.</div><div class='add'>+ * @list:		Maintain the list of dumps are in progress. Can</div><div class='add'>+ *                      retrieve multiple dumps with different dump IDs at</div><div class='add'>+ *                      the same time but not with the same dump ID. This list</div><div class='add'>+ *                      is used to determine whether the dump for the same ID</div><div class='add'>+ *                      is in progress.</div><div class='add'>+ */</div><div class='add'>+struct ibm_platform_dump_params {</div><div class='add'>+	struct rtas_work_area	*work_area;</div><div class='add'>+	u32			buf_length;</div><div class='add'>+	u32			dump_tag_hi;</div><div class='add'>+	u32			dump_tag_lo;</div><div class='add'>+	u32			sequence_hi;</div><div class='add'>+	u32			sequence_lo;</div><div class='add'>+	u32			bytes_ret_hi;</div><div class='add'>+	u32			bytes_ret_lo;</div><div class='add'>+	s32			status;</div><div class='add'>+	struct list_head	list;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Multiple dumps with different dump IDs can be retrieved at the same</div><div class='add'>+ * time, but not with dame dump ID. platform_dump_list_mutex and</div><div class='add'>+ * platform_dump_list are used to prevent this behavior.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_MUTEX(platform_dump_list_mutex);</div><div class='add'>+static LIST_HEAD(platform_dump_list);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtas_ibm_platform_dump() - Call ibm,platform-dump to fill a work area</div><div class='add'>+ * buffer.</div><div class='add'>+ * @params: See &amp;struct ibm_platform_dump_params.</div><div class='add'>+ * @buf_addr: Address of dump buffer (work_area)</div><div class='add'>+ * @buf_length: Length of the buffer in bytes (min. 1024)</div><div class='add'>+ *</div><div class='add'>+ * Calls ibm,platform-dump until it errors or successfully deposits data</div><div class='add'>+ * into the supplied work area. Handles RTAS retry statuses. Maps RTAS</div><div class='add'>+ * error statuses to reasonable errno values.</div><div class='add'>+ *</div><div class='add'>+ * Can request multiple dumps with different dump IDs at the same time,</div><div class='add'>+ * but not with the same dump ID which is prevented with the check in</div><div class='add'>+ * the ioctl code (papr_platform_dump_create_handle()).</div><div class='add'>+ *</div><div class='add'>+ * The caller should inspect @params.status to determine whether more</div><div class='add'>+ * calls are needed to complete the sequence.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ve on error, 0 for dump complete and 1 for continue dump</div><div class='add'>+ */</div><div class='add'>+static int rtas_ibm_platform_dump(struct ibm_platform_dump_params *params,</div><div class='add'>+				phys_addr_t buf_addr, u32 buf_length)</div><div class='add'>+{</div><div class='add'>+	u32 rets[4];</div><div class='add'>+	s32 fwrc;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		fwrc = rtas_call(rtas_function_token(RTAS_FN_IBM_PLATFORM_DUMP),</div><div class='add'>+				6, 5,</div><div class='add'>+				rets,</div><div class='add'>+				params-&gt;dump_tag_hi,</div><div class='add'>+				params-&gt;dump_tag_lo,</div><div class='add'>+				params-&gt;sequence_hi,</div><div class='add'>+				params-&gt;sequence_lo,</div><div class='add'>+				buf_addr,</div><div class='add'>+				buf_length);</div><div class='add'>+	} while (rtas_busy_delay(fwrc));</div><div class='add'>+</div><div class='add'>+	switch (fwrc) {</div><div class='add'>+	case RTAS_HARDWARE_ERROR:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_NOT_AUTHORIZED:</div><div class='add'>+		ret = -EPERM;</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_IBM_PLATFORM_DUMP_CONTINUE:</div><div class='add'>+	case RTAS_IBM_PLATFORM_DUMP_COMPLETE:</div><div class='add'>+		params-&gt;sequence_hi = rets[0];</div><div class='add'>+		params-&gt;sequence_lo = rets[1];</div><div class='add'>+		params-&gt;bytes_ret_hi = rets[2];</div><div class='add'>+		params-&gt;bytes_ret_lo = rets[3];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_err_ratelimited("unexpected ibm,platform-dump status %d\n",</div><div class='add'>+				fwrc);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params-&gt;status = fwrc;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Platform dump is used with multiple RTAS calls to retrieve the</div><div class='add'>+ * complete dump for the provided dump ID. Once the complete dump is</div><div class='add'>+ * retrieved, the hypervisor returns dump complete status (0) for the</div><div class='add'>+ * last RTAS call and expects the caller issues one more call with</div><div class='add'>+ * NULL buffer to invalidate the dump so that the hypervisor can remove</div><div class='add'>+ * the dump.</div><div class='add'>+ *</div><div class='add'>+ * After the specific dump is invalidated in the hypervisor, expect the</div><div class='add'>+ * dump complete status for the new sequence - the user space initiates</div><div class='add'>+ * new request for the same dump ID.</div><div class='add'>+ */</div><div class='add'>+static ssize_t papr_platform_dump_handle_read(struct file *file,</div><div class='add'>+		char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params = file-&gt;private_data;</div><div class='add'>+	u64 total_bytes;</div><div class='add'>+	s32 fwrc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Dump already completed with the previous read calls.</div><div class='add'>+	 * In case if the user space issues further reads, returns</div><div class='add'>+	 * -EINVAL.</div><div class='add'>+	 */</div><div class='add'>+	if (!params-&gt;buf_length) {</div><div class='add'>+		pr_warn_once("Platform dump completed for dump ID %llu\n",</div><div class='add'>+			(u64) (((u64)params-&gt;dump_tag_hi &lt;&lt; 32) |</div><div class='add'>+				params-&gt;dump_tag_lo));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The hypervisor returns status 0 if no more data available to</div><div class='add'>+	 * download. The dump will be invalidated with ioctl (see below).</div><div class='add'>+	 */</div><div class='add'>+	if (params-&gt;status == RTAS_IBM_PLATFORM_DUMP_COMPLETE) {</div><div class='add'>+		params-&gt;buf_length = 0;</div><div class='add'>+		/*</div><div class='add'>+		 * Returns 0 to the user space so that user</div><div class='add'>+		 * space read stops.</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size &lt; SZ_1K) {</div><div class='add'>+		pr_err_once("Buffer length should be minimum 1024 bytes\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (size &gt; params-&gt;buf_length) {</div><div class='add'>+		/*</div><div class='add'>+		 * Allocate 4K work area. So if the user requests &gt; 4K,</div><div class='add'>+		 * resize the buffer length.</div><div class='add'>+		 */</div><div class='add'>+		size = params-&gt;buf_length;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwrc = rtas_ibm_platform_dump(params,</div><div class='add'>+			rtas_work_area_phys(params-&gt;work_area),</div><div class='add'>+			size);</div><div class='add'>+	if (fwrc &lt; 0)</div><div class='add'>+		return fwrc;</div><div class='add'>+</div><div class='add'>+	total_bytes = (u64) (((u64)params-&gt;bytes_ret_hi &lt;&lt; 32) |</div><div class='add'>+			params-&gt;bytes_ret_lo);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Kernel or firmware bug, do not continue.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN(total_bytes &gt; size, "possible write beyond end of work area"))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(buf, rtas_work_area_raw_buf(params-&gt;work_area),</div><div class='add'>+			total_bytes))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	return total_bytes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int papr_platform_dump_handle_release(struct inode *inode,</div><div class='add'>+					struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	if (params-&gt;work_area)</div><div class='add'>+		rtas_work_area_free(params-&gt;work_area);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;platform_dump_list_mutex);</div><div class='add'>+	list_del(&amp;params-&gt;list);</div><div class='add'>+	mutex_unlock(&amp;platform_dump_list_mutex);</div><div class='add'>+</div><div class='add'>+	kfree(params);</div><div class='add'>+	file-&gt;private_data = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This ioctl is used to invalidate the dump assuming the user space</div><div class='add'>+ * issue this ioctl after obtain the complete dump.</div><div class='add'>+ * Issue the last RTAS call with NULL buffer to invalidate the dump</div><div class='add'>+ * which means dump will be freed in the hypervisor.</div><div class='add'>+ */</div><div class='add'>+static long papr_platform_dump_invalidate_ioctl(struct file *file,</div><div class='add'>+				unsigned int ioctl, unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params;</div><div class='add'>+	u64 __user *argp = (void __user *)arg;</div><div class='add'>+	u64 param_dump_tag, dump_tag;</div><div class='add'>+</div><div class='add'>+	if (ioctl != PAPR_PLATFORM_DUMP_IOC_INVALIDATE)</div><div class='add'>+		return -ENOIOCTLCMD;</div><div class='add'>+</div><div class='add'>+	if (get_user(dump_tag, argp))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * private_data is freeded during release(), so should not</div><div class='add'>+	 * happen.</div><div class='add'>+	 */</div><div class='add'>+	if (!file-&gt;private_data) {</div><div class='add'>+		pr_err("No valid FD to invalidate dump for the ID(%llu)\n",</div><div class='add'>+				dump_tag);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params = file-&gt;private_data;</div><div class='add'>+	param_dump_tag = (u64) (((u64)params-&gt;dump_tag_hi &lt;&lt; 32) |</div><div class='add'>+				params-&gt;dump_tag_lo);</div><div class='add'>+	if (dump_tag != param_dump_tag) {</div><div class='add'>+		pr_err("Invalid dump ID(%llu) to invalidate dump\n",</div><div class='add'>+				dump_tag);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (params-&gt;status != RTAS_IBM_PLATFORM_DUMP_COMPLETE) {</div><div class='add'>+		pr_err("Platform dump is not complete, but requested "</div><div class='add'>+			"to invalidate dump for ID(%llu)\n",</div><div class='add'>+			dump_tag);</div><div class='add'>+		return -EINPROGRESS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rtas_ibm_platform_dump(params, 0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_platform_dump_handle_ops = {</div><div class='add'>+	.read = papr_platform_dump_handle_read,</div><div class='add'>+	.release = papr_platform_dump_handle_release,</div><div class='add'>+	.unlocked_ioctl	= papr_platform_dump_invalidate_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_platform_dump_create_handle() - Create a fd-based handle for</div><div class='add'>+ * reading platform dump</div><div class='add'>+ *</div><div class='add'>+ * Handler for PAPR_PLATFORM_DUMP_IOC_CREATE_HANDLE ioctl command</div><div class='add'>+ * Allocates RTAS parameter struct and work area and attached to the</div><div class='add'>+ * file descriptor for reading by user space with the multiple RTAS</div><div class='add'>+ * calls until the dump is completed. This memory allocation is freed</div><div class='add'>+ * when the file is released.</div><div class='add'>+ *</div><div class='add'>+ * Multiple dump requests with different IDs are allowed at the same</div><div class='add'>+ * time, but not with the same dump ID. So if the user space is</div><div class='add'>+ * already opened file descriptor for the specific dump ID, return</div><div class='add'>+ * -EALREADY for the next request.</div><div class='add'>+ *</div><div class='add'>+ * @dump_tag: Dump ID for the dump requested to retrieve from the</div><div class='add'>+ *		hypervisor</div><div class='add'>+ *</div><div class='add'>+ * Return: The installed fd number if successful, -ve errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static long papr_platform_dump_create_handle(u64 dump_tag)</div><div class='add'>+{</div><div class='add'>+	struct ibm_platform_dump_params *params;</div><div class='add'>+	u64 param_dump_tag;</div><div class='add'>+	struct file *file;</div><div class='add'>+	long err;</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return failure if the user space is already opened FD for</div><div class='add'>+	 * the specific dump ID. This check will prevent multiple dump</div><div class='add'>+	 * requests for the same dump ID at the same time. Generally</div><div class='add'>+	 * should not expect this, but in case.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(params, &amp;platform_dump_list, list) {</div><div class='add'>+		param_dump_tag = (u64) (((u64)params-&gt;dump_tag_hi &lt;&lt; 32) |</div><div class='add'>+					params-&gt;dump_tag_lo);</div><div class='add'>+		if (dump_tag == param_dump_tag) {</div><div class='add'>+			pr_err("Platform dump for ID(%llu) is already in progress\n",</div><div class='add'>+					dump_tag);</div><div class='add'>+			return -EALREADY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params =  kzalloc(sizeof(struct ibm_platform_dump_params),</div><div class='add'>+			GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!params)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	params-&gt;work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	params-&gt;buf_length = SZ_4K;</div><div class='add'>+	params-&gt;dump_tag_hi = (u32)(dump_tag &gt;&gt; 32);</div><div class='add'>+	params-&gt;dump_tag_lo = (u32)(dump_tag &amp; 0x00000000ffffffffULL);</div><div class='add'>+	params-&gt;status = RTAS_IBM_PLATFORM_DUMP_START;</div><div class='add'>+</div><div class='add'>+	fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);</div><div class='add'>+	if (fd &lt; 0) {</div><div class='add'>+		err = fd;</div><div class='add'>+		goto free_area;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	file = anon_inode_getfile_fmode("[papr-platform-dump]",</div><div class='add'>+				&amp;papr_platform_dump_handle_ops,</div><div class='add'>+				(void *)params, O_RDONLY,</div><div class='add'>+				FMODE_LSEEK | FMODE_PREAD);</div><div class='add'>+	if (IS_ERR(file)) {</div><div class='add'>+		err = PTR_ERR(file);</div><div class='add'>+		goto put_fd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fd_install(fd, file);</div><div class='add'>+</div><div class='add'>+	list_add(&amp;params-&gt;list, &amp;platform_dump_list);</div><div class='add'>+</div><div class='add'>+	pr_info("%s (%d) initiated platform dump for dump tag %llu\n",</div><div class='add'>+		current-&gt;comm, current-&gt;pid, dump_tag);</div><div class='add'>+	return fd;</div><div class='add'>+put_fd:</div><div class='add'>+	put_unused_fd(fd);</div><div class='add'>+free_area:</div><div class='add'>+	rtas_work_area_free(params-&gt;work_area);</div><div class='add'>+	kfree(params);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Top-level ioctl handler for /dev/papr-platform-dump.</div><div class='add'>+ */</div><div class='add'>+static long papr_platform_dump_dev_ioctl(struct file *filp,</div><div class='add'>+					unsigned int ioctl,</div><div class='add'>+					unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	u64 __user *argp = (void __user *)arg;</div><div class='add'>+	u64 dump_tag;</div><div class='add'>+	long ret;</div><div class='add'>+</div><div class='add'>+	if (get_user(dump_tag, argp))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	switch (ioctl) {</div><div class='add'>+	case PAPR_PLATFORM_DUMP_IOC_CREATE_HANDLE:</div><div class='add'>+		mutex_lock(&amp;platform_dump_list_mutex);</div><div class='add'>+		ret = papr_platform_dump_create_handle(dump_tag);</div><div class='add'>+		mutex_unlock(&amp;platform_dump_list_mutex);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -ENOIOCTLCMD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations papr_platform_dump_ops = {</div><div class='add'>+	.unlocked_ioctl = papr_platform_dump_dev_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice papr_platform_dump_dev = {</div><div class='add'>+	.minor = MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name = "papr-platform-dump",</div><div class='add'>+	.fops = &amp;papr_platform_dump_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int papr_platform_dump_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!rtas_function_implemented(RTAS_FN_IBM_PLATFORM_DUMP))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return misc_register(&amp;papr_platform_dump_dev);</div><div class='add'>+}</div><div class='add'>+machine_device_initcall(pseries, papr_platform_dump_init);</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-rtas-common.c b/arch/powerpc/platforms/pseries/papr-rtas-common.c<br/>new file mode 100644<br/>index 000000000000..33c606e3378a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/papr-rtas-common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/papr-rtas-common.c</a></div><div class='hunk'>@@ -0,0 +1,311 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "papr-common: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/file.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/anon_inodes.h&gt;</div><div class='add'>+#include &lt;linux/sched/signal.h&gt;</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Sequence based RTAS HCALL has to issue multiple times to retrieve</div><div class='add'>+ * complete data from the hypervisor. For some of these RTAS calls,</div><div class='add'>+ * the OS should not interleave calls with different input until the</div><div class='add'>+ * sequence is completed. So data is collected for these calls during</div><div class='add'>+ * ioctl handle and export to user space with read() handle.</div><div class='add'>+ * This file provides common functions needed for such sequence based</div><div class='add'>+ * RTAS calls Ex: ibm,get-vpd and ibm,get-indices.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+bool papr_rtas_blob_has_data(const struct papr_rtas_blob *blob)</div><div class='add'>+{</div><div class='add'>+	return blob-&gt;data &amp;&amp; blob-&gt;len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void papr_rtas_blob_free(const struct papr_rtas_blob *blob)</div><div class='add'>+{</div><div class='add'>+	if (blob) {</div><div class='add'>+		kvfree(blob-&gt;data);</div><div class='add'>+		kfree(blob);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_blob_extend() - Append data to a &amp;struct papr_rtas_blob.</div><div class='add'>+ * @blob: The blob to extend.</div><div class='add'>+ * @data: The new data to append to @blob.</div><div class='add'>+ * @len:  The length of @data.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: -ENOMEM on allocation failure, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+static int papr_rtas_blob_extend(struct papr_rtas_blob *blob,</div><div class='add'>+				const char *data, size_t len)</div><div class='add'>+{</div><div class='add'>+	const size_t new_len = blob-&gt;len + len;</div><div class='add'>+	const size_t old_len = blob-&gt;len;</div><div class='add'>+	const char *old_ptr = blob-&gt;data;</div><div class='add'>+	char *new_ptr;</div><div class='add'>+</div><div class='add'>+	new_ptr = kvrealloc(old_ptr, new_len, GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!new_ptr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;new_ptr[old_len], data, len);</div><div class='add'>+	blob-&gt;data = new_ptr;</div><div class='add'>+	blob-&gt;len = new_len;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_blob_generate() - Construct a new &amp;struct papr_rtas_blob.</div><div class='add'>+ * @seq: work function of the caller that is called to obtain</div><div class='add'>+ *       data with the caller RTAS call.</div><div class='add'>+ *</div><div class='add'>+ * The @work callback is invoked until it returns NULL. @seq is</div><div class='add'>+ * passed to @work in its first argument on each call. When</div><div class='add'>+ * @work returns data, it should store the data length in its</div><div class='add'>+ * second argument.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: A completely populated &amp;struct papr_rtas_blob, or NULL on error.</div><div class='add'>+ */</div><div class='add'>+static const struct papr_rtas_blob *</div><div class='add'>+papr_rtas_blob_generate(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	struct papr_rtas_blob *blob;</div><div class='add'>+	const char *buf;</div><div class='add'>+	size_t len;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	blob  = kzalloc(sizeof(*blob), GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!blob)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!seq-&gt;work)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	while (err == 0 &amp;&amp; (buf = seq-&gt;work(seq, &amp;len)))</div><div class='add'>+		err = papr_rtas_blob_extend(blob, buf, len);</div><div class='add'>+</div><div class='add'>+	if (err != 0 || !papr_rtas_blob_has_data(blob))</div><div class='add'>+		goto free_blob;</div><div class='add'>+</div><div class='add'>+	return blob;</div><div class='add'>+free_blob:</div><div class='add'>+	papr_rtas_blob_free(blob);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int papr_rtas_sequence_set_err(struct papr_rtas_sequence *seq, int err)</div><div class='add'>+{</div><div class='add'>+	/* Preserve the first error recorded. */</div><div class='add'>+	if (seq-&gt;error == 0)</div><div class='add'>+		seq-&gt;error = err;</div><div class='add'>+</div><div class='add'>+	return seq-&gt;error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Higher-level retrieval code below. These functions use the</div><div class='add'>+ * papr_rtas_blob_* and sequence_* APIs defined above to create fd-based</div><div class='add'>+ * handles for consumption by user space.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_run_sequence() - Run a single retrieval sequence.</div><div class='add'>+ * @seq:	Functions of the caller to complete the sequence</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep. Holds a mutex and an RTAS work area for its</div><div class='add'>+ *          duration. Typically performs multiple sleepable slab</div><div class='add'>+ *          allocations.</div><div class='add'>+ *</div><div class='add'>+ * Return: A populated &amp;struct papr_rtas_blob on success. Encoded error</div><div class='add'>+ * pointer otherwise.</div><div class='add'>+ */</div><div class='add'>+static const struct papr_rtas_blob *papr_rtas_run_sequence(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob;</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;begin)</div><div class='add'>+		seq-&gt;begin(seq);</div><div class='add'>+</div><div class='add'>+	blob = papr_rtas_blob_generate(seq);</div><div class='add'>+	if (!blob)</div><div class='add'>+		papr_rtas_sequence_set_err(seq, -ENOMEM);</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;end)</div><div class='add'>+		seq-&gt;end(seq);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;error) {</div><div class='add'>+		papr_rtas_blob_free(blob);</div><div class='add'>+		return ERR_PTR(seq-&gt;error);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return blob;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_retrieve() - Return the data blob that is exposed to</div><div class='add'>+ * user space.</div><div class='add'>+ * @seq: RTAS call specific functions to be invoked until the</div><div class='add'>+ *       sequence is completed.</div><div class='add'>+ *</div><div class='add'>+ * Run sequences against @param until a blob is successfully</div><div class='add'>+ * instantiated, or a hard error is encountered, or a fatal signal is</div><div class='add'>+ * pending.</div><div class='add'>+ *</div><div class='add'>+ * Context: May sleep.</div><div class='add'>+ * Return: A fully populated data blob when successful. Encoded error</div><div class='add'>+ * pointer otherwise.</div><div class='add'>+ */</div><div class='add'>+const struct papr_rtas_blob *papr_rtas_retrieve(struct papr_rtas_sequence *seq)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * EAGAIN means the sequence returns error with a -4 (data</div><div class='add'>+	 * changed and need to start the sequence) status from RTAS calls</div><div class='add'>+	 * and we should attempt a new sequence. PAPR+ (v2.13 R1–7.3.20–5</div><div class='add'>+	 * - ibm,get-vpd, R1–7.3.17–6 - ibm,get-indices) indicates that</div><div class='add'>+	 * this should be a transient condition, not something that</div><div class='add'>+	 * happens continuously. But we'll stop trying on a fatal signal.</div><div class='add'>+	 */</div><div class='add'>+	do {</div><div class='add'>+		blob = papr_rtas_run_sequence(seq);</div><div class='add'>+		if (!IS_ERR(blob)) /* Success. */</div><div class='add'>+			break;</div><div class='add'>+		if (PTR_ERR(blob) != -EAGAIN) /* Hard error. */</div><div class='add'>+			break;</div><div class='add'>+		cond_resched();</div><div class='add'>+	} while (!fatal_signal_pending(current));</div><div class='add'>+</div><div class='add'>+	return blob;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * papr_rtas_setup_file_interface - Complete the sequence and obtain</div><div class='add'>+ * the data and export to user space with fd-based handles. Then the</div><div class='add'>+ * user spave gets the data with read() handle.</div><div class='add'>+ * @seq: RTAS call specific functions to get the data.</div><div class='add'>+ * @fops: RTAS call specific file operations such as read().</div><div class='add'>+ * @name: RTAS call specific char device node.</div><div class='add'>+ *</div><div class='add'>+ * Return: FD handle for consumption by user space</div><div class='add'>+ */</div><div class='add'>+long papr_rtas_setup_file_interface(struct papr_rtas_sequence *seq,</div><div class='add'>+				const struct file_operations *fops,</div><div class='add'>+				char *name)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob;</div><div class='add'>+	struct file *file;</div><div class='add'>+	long ret;</div><div class='add'>+	int fd;</div><div class='add'>+</div><div class='add'>+	blob = papr_rtas_retrieve(seq);</div><div class='add'>+	if (IS_ERR(blob))</div><div class='add'>+		return PTR_ERR(blob);</div><div class='add'>+</div><div class='add'>+	fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);</div><div class='add'>+	if (fd &lt; 0) {</div><div class='add'>+		ret = fd;</div><div class='add'>+		goto free_blob;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	file = anon_inode_getfile_fmode(name, fops, (void *)blob,</div><div class='add'>+			O_RDONLY, FMODE_LSEEK | FMODE_PREAD);</div><div class='add'>+	if (IS_ERR(file)) {</div><div class='add'>+		ret = PTR_ERR(file);</div><div class='add'>+		goto put_fd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fd_install(fd, file);</div><div class='add'>+	return fd;</div><div class='add'>+</div><div class='add'>+put_fd:</div><div class='add'>+	put_unused_fd(fd);</div><div class='add'>+free_blob:</div><div class='add'>+	papr_rtas_blob_free(blob);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * papr_rtas_sequence_should_stop() - Determine whether RTAS retrieval</div><div class='add'>+ *                                    sequence should continue.</div><div class='add'>+ *</div><div class='add'>+ * Examines the sequence error state and outputs of the last call to</div><div class='add'>+ * the specific RTAS to determine whether the sequence in progress</div><div class='add'>+ * should continue or stop.</div><div class='add'>+ *</div><div class='add'>+ * Return: True if the sequence has encountered an error or if all data</div><div class='add'>+ *         for this sequence has been retrieved. False otherwise.</div><div class='add'>+ */</div><div class='add'>+bool papr_rtas_sequence_should_stop(const struct papr_rtas_sequence *seq,</div><div class='add'>+				s32 status, bool init_state)</div><div class='add'>+{</div><div class='add'>+	bool done;</div><div class='add'>+</div><div class='add'>+	if (seq-&gt;error)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	switch (status) {</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='add'>+		if (init_state)</div><div class='add'>+			done = false; /* Initial state. */</div><div class='add'>+		else</div><div class='add'>+			done = true; /* All data consumed. */</div><div class='add'>+		break;</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='add'>+		done = false; /* More data available. */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		done = true; /* Error encountered. */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * User space read to retrieve data for the corresponding RTAS call.</div><div class='add'>+ * papr_rtas_blob is filled with the data using the corresponding RTAS</div><div class='add'>+ * call sequence API.</div><div class='add'>+ */</div><div class='add'>+ssize_t papr_rtas_common_handle_read(struct file *file,</div><div class='add'>+	       char __user *buf, size_t size, loff_t *off)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	/* We should not instantiate a handle without any data attached. */</div><div class='add'>+	if (!papr_rtas_blob_has_data(blob)) {</div><div class='add'>+		pr_err_once("handle without data\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buf, size, off, blob-&gt;data, blob-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int papr_rtas_common_handle_release(struct inode *inode,</div><div class='add'>+		struct file *file)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	papr_rtas_blob_free(blob);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+loff_t papr_rtas_common_handle_seek(struct file *file, loff_t off,</div><div class='add'>+					int whence)</div><div class='add'>+{</div><div class='add'>+	const struct papr_rtas_blob *blob = file-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return fixed_size_llseek(file, off, whence, blob-&gt;len);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-rtas-common.h b/arch/powerpc/platforms/pseries/papr-rtas-common.h<br/>new file mode 100644<br/>index 000000000000..4ceabcaf4905<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/papr-rtas-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/papr-rtas-common.h</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+#ifndef _ASM_POWERPC_PAPR_RTAS_COMMON_H</div><div class='add'>+#define _ASM_POWERPC_PAPR_RTAS_COMMON_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Return codes for sequence based RTAS calls.</div><div class='add'>+ * Not listed under PAPR+ v2.13 7.2.8: "Return Codes".</div><div class='add'>+ * But defined in the specific section of each RTAS call.</div><div class='add'>+ */</div><div class='add'>+#define RTAS_SEQ_COMPLETE	0 /* All data has been retrieved. */</div><div class='add'>+#define RTAS_SEQ_MORE_DATA	1 /* More data is available */</div><div class='add'>+#define RTAS_SEQ_START_OVER	-4 /* Data changed, restart call sequence. */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Internal "blob" APIs for accumulating RTAS call results into</div><div class='add'>+ * an immutable buffer to be attached to a file descriptor.</div><div class='add'>+ */</div><div class='add'>+struct papr_rtas_blob {</div><div class='add'>+	const char *data;</div><div class='add'>+	size_t len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct papr_sequence - State for managing a sequence of RTAS calls.</div><div class='add'>+ * @error:  Shall be zero as long as the sequence has not encountered an error,</div><div class='add'>+ *          -ve errno otherwise. Use papr_rtas_sequence_set_err() to update.</div><div class='add'>+ * @params: Parameter block to pass to rtas_*() calls.</div><div class='add'>+ * @begin: Work area allocation and initialize the needed parameter</div><div class='add'>+ *         values passed to RTAS call</div><div class='add'>+ * @end: Free the allocated work area</div><div class='add'>+ * @work: Obtain data with RTAS call and invoke it until the sequence is</div><div class='add'>+ *        completed.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+struct papr_rtas_sequence {</div><div class='add'>+	int error;</div><div class='add'>+	void *params;</div><div class='add'>+	void (*begin)(struct papr_rtas_sequence *seq);</div><div class='add'>+	void (*end)(struct papr_rtas_sequence *seq);</div><div class='add'>+	const char *(*work)(struct papr_rtas_sequence *seq, size_t *len);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern bool papr_rtas_blob_has_data(const struct papr_rtas_blob *blob);</div><div class='add'>+extern void papr_rtas_blob_free(const struct papr_rtas_blob *blob);</div><div class='add'>+extern int papr_rtas_sequence_set_err(struct papr_rtas_sequence *seq,</div><div class='add'>+		int err);</div><div class='add'>+extern const struct papr_rtas_blob *papr_rtas_retrieve(struct papr_rtas_sequence *seq);</div><div class='add'>+extern long papr_rtas_setup_file_interface(struct papr_rtas_sequence *seq,</div><div class='add'>+			const struct file_operations *fops, char *name);</div><div class='add'>+extern bool papr_rtas_sequence_should_stop(const struct papr_rtas_sequence *seq,</div><div class='add'>+				s32 status, bool init_state);</div><div class='add'>+extern ssize_t papr_rtas_common_handle_read(struct file *file,</div><div class='add'>+			char __user *buf, size_t size, loff_t *off);</div><div class='add'>+extern int papr_rtas_common_handle_release(struct inode *inode,</div><div class='add'>+					struct file *file);</div><div class='add'>+extern loff_t papr_rtas_common_handle_seek(struct file *file, loff_t off,</div><div class='add'>+					int whence);</div><div class='add'>+#endif /* _ASM_POWERPC_PAPR_RTAS_COMMON_H */</div><div class='add'>+</div><div class='head'>diff --git a/arch/powerpc/platforms/pseries/papr-vpd.c b/arch/powerpc/platforms/pseries/papr-vpd.c<br/>index c86950d7105a..f38c188fc4a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/papr-vpd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/platforms/pseries/papr-vpd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/platforms/pseries/papr-vpd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/platforms/pseries/papr-vpd.c</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) "papr-vpd: " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/anon_inodes.h&gt;</div><div class='ctx'> #include &lt;linux/build_bug.h&gt;</div><div class='ctx'> #include &lt;linux/file.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='hunk'>@@ -20,14 +19,7 @@</div><div class='ctx'> #include &lt;asm/rtas-work-area.h&gt;</div><div class='ctx'> #include &lt;asm/rtas.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/papr-vpd.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Function-specific return values for ibm,get-vpd, derived from PAPR+</div><div class='del'>- * v2.13 7.3.20 "ibm,get-vpd RTAS Call".</div><div class='del'>- */</div><div class='del'>-#define RTAS_IBM_GET_VPD_COMPLETE    0 /* All VPD has been retrieved. */</div><div class='del'>-#define RTAS_IBM_GET_VPD_MORE_DATA   1 /* More VPD is available. */</div><div class='del'>-#define RTAS_IBM_GET_VPD_START_OVER -4 /* VPD changed, restart call sequence. */</div><div class='add'>+#include "papr-rtas-common.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct rtas_ibm_get_vpd_params - Parameters (in and out) for ibm,get-vpd.</div><div class='hunk'>@@ -91,13 +83,14 @@ static int rtas_ibm_get_vpd(struct rtas_ibm_get_vpd_params *params)</div><div class='ctx'> 	case RTAS_INVALID_PARAMETER:</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		break;</div><div class='del'>-	case RTAS_IBM_GET_VPD_START_OVER:</div><div class='add'>+	case RTAS_SEQ_START_OVER:</div><div class='ctx'> 		ret = -EAGAIN;</div><div class='add'>+		pr_info_ratelimited("VPD changed during retrieval, retrying\n");</div><div class='ctx'> 		break;</div><div class='del'>-	case RTAS_IBM_GET_VPD_MORE_DATA:</div><div class='add'>+	case RTAS_SEQ_MORE_DATA:</div><div class='ctx'> 		params-&gt;sequence = rets[0];</div><div class='ctx'> 		fallthrough;</div><div class='del'>-	case RTAS_IBM_GET_VPD_COMPLETE:</div><div class='add'>+	case RTAS_SEQ_COMPLETE:</div><div class='ctx'> 		params-&gt;written = rets[1];</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Kernel or firmware bug, do not continue.</div><div class='hunk'>@@ -119,91 +112,6 @@ static int rtas_ibm_get_vpd(struct rtas_ibm_get_vpd_params *params)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Internal VPD "blob" APIs for accumulating ibm,get-vpd results into</div><div class='del'>- * an immutable buffer to be attached to a file descriptor.</div><div class='del'>- */</div><div class='del'>-struct vpd_blob {</div><div class='del'>-	const char *data;</div><div class='del'>-	size_t len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool vpd_blob_has_data(const struct vpd_blob *blob)</div><div class='del'>-{</div><div class='del'>-	return blob-&gt;data &amp;&amp; blob-&gt;len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void vpd_blob_free(const struct vpd_blob *blob)</div><div class='del'>-{</div><div class='del'>-	if (blob) {</div><div class='del'>-		kvfree(blob-&gt;data);</div><div class='del'>-		kfree(blob);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * vpd_blob_extend() - Append data to a &amp;struct vpd_blob.</div><div class='del'>- * @blob: The blob to extend.</div><div class='del'>- * @data: The new data to append to @blob.</div><div class='del'>- * @len:  The length of @data.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep.</div><div class='del'>- * Return: -ENOMEM on allocation failure, 0 otherwise.</div><div class='del'>- */</div><div class='del'>-static int vpd_blob_extend(struct vpd_blob *blob, const char *data, size_t len)</div><div class='del'>-{</div><div class='del'>-	const size_t new_len = blob-&gt;len + len;</div><div class='del'>-	const size_t old_len = blob-&gt;len;</div><div class='del'>-	const char *old_ptr = blob-&gt;data;</div><div class='del'>-	char *new_ptr;</div><div class='del'>-</div><div class='del'>-	new_ptr = kvrealloc(old_ptr, new_len, GFP_KERNEL_ACCOUNT);</div><div class='del'>-	if (!new_ptr)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;new_ptr[old_len], data, len);</div><div class='del'>-	blob-&gt;data = new_ptr;</div><div class='del'>-	blob-&gt;len = new_len;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * vpd_blob_generate() - Construct a new &amp;struct vpd_blob.</div><div class='del'>- * @generator: Function that supplies the blob data.</div><div class='del'>- * @arg:       Context pointer supplied by caller, passed to @generator.</div><div class='del'>- *</div><div class='del'>- * The @generator callback is invoked until it returns NULL. @arg is</div><div class='del'>- * passed to @generator in its first argument on each call. When</div><div class='del'>- * @generator returns data, it should store the data length in its</div><div class='del'>- * second argument.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep.</div><div class='del'>- * Return: A completely populated &amp;struct vpd_blob, or NULL on error.</div><div class='del'>- */</div><div class='del'>-static const struct vpd_blob *</div><div class='del'>-vpd_blob_generate(const char * (*generator)(void *, size_t *), void *arg)</div><div class='del'>-{</div><div class='del'>-	struct vpd_blob *blob;</div><div class='del'>-	const char *buf;</div><div class='del'>-	size_t len;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	blob  = kzalloc(sizeof(*blob), GFP_KERNEL_ACCOUNT);</div><div class='del'>-	if (!blob)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	while (err == 0 &amp;&amp; (buf = generator(arg, &amp;len)))</div><div class='del'>-		err = vpd_blob_extend(blob, buf, len);</div><div class='del'>-</div><div class='del'>-	if (err != 0 || !vpd_blob_has_data(blob))</div><div class='del'>-		goto free_blob;</div><div class='del'>-</div><div class='del'>-	return blob;</div><div class='del'>-free_blob:</div><div class='del'>-	vpd_blob_free(blob);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Internal VPD sequence APIs. A VPD sequence is a series of calls to</div><div class='ctx'>  * ibm,get-vpd for a given location code. The sequence ends when an</div><div class='ctx'>  * error is encountered or all VPD for the location code has been</div><div class='hunk'>@@ -211,30 +119,14 @@ free_blob:</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct vpd_sequence - State for managing a VPD sequence.</div><div class='del'>- * @error:  Shall be zero as long as the sequence has not encountered an error,</div><div class='del'>- *          -ve errno otherwise. Use vpd_sequence_set_err() to update this.</div><div class='del'>- * @params: Parameter block to pass to rtas_ibm_get_vpd().</div><div class='del'>- */</div><div class='del'>-struct vpd_sequence {</div><div class='del'>-	int error;</div><div class='del'>-	struct rtas_ibm_get_vpd_params params;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * vpd_sequence_begin() - Begin a VPD retrieval sequence.</div><div class='del'>- * @seq:      Uninitialized sequence state.</div><div class='del'>- * @loc_code: Location code that defines the scope of the VPD to return.</div><div class='del'>- *</div><div class='del'>- * Initializes @seq with the resources necessary to carry out a VPD</div><div class='del'>- * sequence. Callers must pass @seq to vpd_sequence_end() regardless</div><div class='del'>- * of whether the sequence succeeds.</div><div class='add'>+ * @seq: vpd call parameters from sequence struct</div><div class='ctx'>  *</div><div class='ctx'>  * Context: May sleep.</div><div class='ctx'>  */</div><div class='del'>-static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='del'>-			       const struct papr_location_code *loc_code)</div><div class='add'>+static void vpd_sequence_begin(struct papr_rtas_sequence *seq)</div><div class='ctx'> {</div><div class='add'>+	struct rtas_ibm_get_vpd_params *vpd_params;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use a static data structure for the location code passed to</div><div class='ctx'> 	 * RTAS to ensure it's in the RMA and avoid a separate work</div><div class='hunk'>@@ -242,6 +134,7 @@ static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='ctx'> 	 */</div><div class='ctx'> 	static struct papr_location_code static_loc_code;</div><div class='ctx'> </div><div class='add'>+	vpd_params =  (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We could allocate the work area before acquiring the</div><div class='ctx'> 	 * function lock, but that would allow concurrent requests to</div><div class='hunk'>@@ -249,14 +142,12 @@ static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='ctx'> 	 * allocate the work area under the lock.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mutex_lock(&amp;rtas_ibm_get_vpd_lock);</div><div class='del'>-	static_loc_code = *loc_code;</div><div class='del'>-	*seq = (struct vpd_sequence) {</div><div class='del'>-		.params = {</div><div class='del'>-			.work_area = rtas_work_area_alloc(SZ_4K),</div><div class='del'>-			.loc_code = &amp;static_loc_code,</div><div class='del'>-			.sequence = 1,</div><div class='del'>-		},</div><div class='del'>-	};</div><div class='add'>+	static_loc_code = *(struct papr_location_code *)vpd_params-&gt;loc_code;</div><div class='add'>+	vpd_params =  (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='add'>+	vpd_params-&gt;work_area = rtas_work_area_alloc(SZ_4K);</div><div class='add'>+	vpd_params-&gt;loc_code = &amp;static_loc_code;</div><div class='add'>+	vpd_params-&gt;sequence = 1;</div><div class='add'>+	vpd_params-&gt;status = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -265,180 +156,39 @@ static void vpd_sequence_begin(struct vpd_sequence *seq,</div><div class='ctx'>  *</div><div class='ctx'>  * Releases resources obtained by vpd_sequence_begin().</div><div class='ctx'>  */</div><div class='del'>-static void vpd_sequence_end(struct vpd_sequence *seq)</div><div class='add'>+static void vpd_sequence_end(struct papr_rtas_sequence *seq)</div><div class='ctx'> {</div><div class='del'>-	rtas_work_area_free(seq-&gt;params.work_area);</div><div class='del'>-	mutex_unlock(&amp;rtas_ibm_get_vpd_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * vpd_sequence_should_stop() - Determine whether a VPD retrieval sequence</div><div class='del'>- *                              should continue.</div><div class='del'>- * @seq: VPD sequence state.</div><div class='del'>- *</div><div class='del'>- * Examines the sequence error state and outputs of the last call to</div><div class='del'>- * ibm,get-vpd to determine whether the sequence in progress should</div><div class='del'>- * continue or stop.</div><div class='del'>- *</div><div class='del'>- * Return: True if the sequence has encountered an error or if all VPD for</div><div class='del'>- *         this sequence has been retrieved. False otherwise.</div><div class='del'>- */</div><div class='del'>-static bool vpd_sequence_should_stop(const struct vpd_sequence *seq)</div><div class='del'>-{</div><div class='del'>-	bool done;</div><div class='del'>-</div><div class='del'>-	if (seq-&gt;error)</div><div class='del'>-		return true;</div><div class='add'>+	struct rtas_ibm_get_vpd_params *vpd_params;</div><div class='ctx'> </div><div class='del'>-	switch (seq-&gt;params.status) {</div><div class='del'>-	case 0:</div><div class='del'>-		if (seq-&gt;params.written == 0)</div><div class='del'>-			done = false; /* Initial state. */</div><div class='del'>-		else</div><div class='del'>-			done = true; /* All data consumed. */</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		done = false; /* More data available. */</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		done = true; /* Error encountered. */</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return done;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vpd_sequence_set_err(struct vpd_sequence *seq, int err)</div><div class='del'>-{</div><div class='del'>-	/* Preserve the first error recorded. */</div><div class='del'>-	if (seq-&gt;error == 0)</div><div class='del'>-		seq-&gt;error = err;</div><div class='del'>-</div><div class='del'>-	return seq-&gt;error;</div><div class='add'>+	vpd_params =  (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='add'>+	rtas_work_area_free(vpd_params-&gt;work_area);</div><div class='add'>+	mutex_unlock(&amp;rtas_ibm_get_vpd_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Generator function to be passed to vpd_blob_generate().</div><div class='add'>+ * Generator function to be passed to papr_rtas_blob_generate().</div><div class='ctx'>  */</div><div class='del'>-static const char *vpd_sequence_fill_work_area(void *arg, size_t *len)</div><div class='add'>+static const char *vpd_sequence_fill_work_area(struct papr_rtas_sequence *seq,</div><div class='add'>+						size_t *len)</div><div class='ctx'> {</div><div class='del'>-	struct vpd_sequence *seq = arg;</div><div class='del'>-	struct rtas_ibm_get_vpd_params *p = &amp;seq-&gt;params;</div><div class='add'>+	struct rtas_ibm_get_vpd_params *p;</div><div class='add'>+	bool init_state;</div><div class='ctx'> </div><div class='del'>-	if (vpd_sequence_should_stop(seq))</div><div class='add'>+	p = (struct rtas_ibm_get_vpd_params *)seq-&gt;params;</div><div class='add'>+	init_state = (p-&gt;written == 0) ? true : false;</div><div class='add'>+</div><div class='add'>+	if (papr_rtas_sequence_should_stop(seq, p-&gt;status, init_state))</div><div class='ctx'> 		return NULL;</div><div class='del'>-	if (vpd_sequence_set_err(seq, rtas_ibm_get_vpd(p)))</div><div class='add'>+	if (papr_rtas_sequence_set_err(seq, rtas_ibm_get_vpd(p)))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	*len = p-&gt;written;</div><div class='ctx'> 	return rtas_work_area_raw_buf(p-&gt;work_area);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Higher-level VPD retrieval code below. These functions use the</div><div class='del'>- * vpd_blob_* and vpd_sequence_* APIs defined above to create fd-based</div><div class='del'>- * VPD handles for consumption by user space.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * papr_vpd_run_sequence() - Run a single VPD retrieval sequence.</div><div class='del'>- * @loc_code: Location code that defines the scope of VPD to return.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep. Holds a mutex and an RTAS work area for its</div><div class='del'>- *          duration. Typically performs multiple sleepable slab</div><div class='del'>- *          allocations.</div><div class='del'>- *</div><div class='del'>- * Return: A populated &amp;struct vpd_blob on success. Encoded error</div><div class='del'>- * pointer otherwise.</div><div class='del'>- */</div><div class='del'>-static const struct vpd_blob *papr_vpd_run_sequence(const struct papr_location_code *loc_code)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob;</div><div class='del'>-	struct vpd_sequence seq;</div><div class='del'>-</div><div class='del'>-	vpd_sequence_begin(&amp;seq, loc_code);</div><div class='del'>-	blob = vpd_blob_generate(vpd_sequence_fill_work_area, &amp;seq);</div><div class='del'>-	if (!blob)</div><div class='del'>-		vpd_sequence_set_err(&amp;seq, -ENOMEM);</div><div class='del'>-	vpd_sequence_end(&amp;seq);</div><div class='del'>-</div><div class='del'>-	if (seq.error) {</div><div class='del'>-		vpd_blob_free(blob);</div><div class='del'>-		return ERR_PTR(seq.error);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return blob;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * papr_vpd_retrieve() - Return the VPD for a location code.</div><div class='del'>- * @loc_code: Location code that defines the scope of VPD to return.</div><div class='del'>- *</div><div class='del'>- * Run VPD sequences against @loc_code until a blob is successfully</div><div class='del'>- * instantiated, or a hard error is encountered, or a fatal signal is</div><div class='del'>- * pending.</div><div class='del'>- *</div><div class='del'>- * Context: May sleep.</div><div class='del'>- * Return: A fully populated VPD blob when successful. Encoded error</div><div class='del'>- * pointer otherwise.</div><div class='del'>- */</div><div class='del'>-static const struct vpd_blob *papr_vpd_retrieve(const struct papr_location_code *loc_code)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * EAGAIN means the sequence errored with a -4 (VPD changed)</div><div class='del'>-	 * status from ibm,get-vpd, and we should attempt a new</div><div class='del'>-	 * sequence. PAPR+ v2.13 R1–7.3.20–5 indicates that this</div><div class='del'>-	 * should be a transient condition, not something that happens</div><div class='del'>-	 * continuously. But we'll stop trying on a fatal signal.</div><div class='del'>-	 */</div><div class='del'>-	do {</div><div class='del'>-		blob = papr_vpd_run_sequence(loc_code);</div><div class='del'>-		if (!IS_ERR(blob)) /* Success. */</div><div class='del'>-			break;</div><div class='del'>-		if (PTR_ERR(blob) != -EAGAIN) /* Hard error. */</div><div class='del'>-			break;</div><div class='del'>-		pr_info_ratelimited("VPD changed during retrieval, retrying\n");</div><div class='del'>-		cond_resched();</div><div class='del'>-	} while (!fatal_signal_pending(current));</div><div class='del'>-</div><div class='del'>-	return blob;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t papr_vpd_handle_read(struct file *file, char __user *buf, size_t size, loff_t *off)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	/* bug: we should not instantiate a handle without any data attached. */</div><div class='del'>-	if (!vpd_blob_has_data(blob)) {</div><div class='del'>-		pr_err_once("handle without data\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return simple_read_from_buffer(buf, size, off, blob-&gt;data, blob-&gt;len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int papr_vpd_handle_release(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	vpd_blob_free(blob);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static loff_t papr_vpd_handle_seek(struct file *file, loff_t off, int whence)</div><div class='del'>-{</div><div class='del'>-	const struct vpd_blob *blob = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	return fixed_size_llseek(file, off, whence, blob-&gt;len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> static const struct file_operations papr_vpd_handle_ops = {</div><div class='del'>-	.read = papr_vpd_handle_read,</div><div class='del'>-	.llseek = papr_vpd_handle_seek,</div><div class='del'>-	.release = papr_vpd_handle_release,</div><div class='add'>+	.read = papr_rtas_common_handle_read,</div><div class='add'>+	.llseek = papr_rtas_common_handle_seek,</div><div class='add'>+	.release = papr_rtas_common_handle_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -460,10 +210,9 @@ static const struct file_operations papr_vpd_handle_ops = {</div><div class='ctx'>  */</div><div class='ctx'> static long papr_vpd_create_handle(struct papr_location_code __user *ulc)</div><div class='ctx'> {</div><div class='add'>+	struct rtas_ibm_get_vpd_params vpd_params = {};</div><div class='add'>+	struct papr_rtas_sequence seq = {};</div><div class='ctx'> 	struct papr_location_code klc;</div><div class='del'>-	const struct vpd_blob *blob;</div><div class='del'>-	struct file *file;</div><div class='del'>-	long err;</div><div class='ctx'> 	int fd;</div><div class='ctx'> </div><div class='ctx'> 	if (copy_from_user(&amp;klc, ulc, sizeof(klc)))</div><div class='hunk'>@@ -472,30 +221,19 @@ static long papr_vpd_create_handle(struct papr_location_code __user *ulc)</div><div class='ctx'> 	if (!string_is_terminated(klc.str, ARRAY_SIZE(klc.str)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	blob = papr_vpd_retrieve(&amp;klc);</div><div class='del'>-	if (IS_ERR(blob))</div><div class='del'>-		return PTR_ERR(blob);</div><div class='add'>+	seq = (struct papr_rtas_sequence) {</div><div class='add'>+		.begin = vpd_sequence_begin,</div><div class='add'>+		.end = vpd_sequence_end,</div><div class='add'>+		.work = vpd_sequence_fill_work_area,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);</div><div class='del'>-	if (fd &lt; 0) {</div><div class='del'>-		err = fd;</div><div class='del'>-		goto free_blob;</div><div class='del'>-	}</div><div class='add'>+	vpd_params.loc_code = &amp;klc;</div><div class='add'>+	seq.params = (void *)&amp;vpd_params;</div><div class='add'>+</div><div class='add'>+	fd = papr_rtas_setup_file_interface(&amp;seq, &amp;papr_vpd_handle_ops,</div><div class='add'>+			"[papr-vpd]");</div><div class='ctx'> </div><div class='del'>-	file = anon_inode_getfile_fmode("[papr-vpd]", &amp;papr_vpd_handle_ops,</div><div class='del'>-				  (void *)blob, O_RDONLY,</div><div class='del'>-				  FMODE_LSEEK | FMODE_PREAD);</div><div class='del'>-	if (IS_ERR(file)) {</div><div class='del'>-		err = PTR_ERR(file);</div><div class='del'>-		goto put_fd;</div><div class='del'>-	}</div><div class='del'>-	fd_install(fd, file);</div><div class='ctx'> 	return fd;</div><div class='del'>-put_fd:</div><div class='del'>-	put_unused_fd(fd);</div><div class='del'>-free_blob:</div><div class='del'>-	vpd_blob_free(blob);</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c<br/>index e14493685fe8..4a59ed1d62ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/cpm2_pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/cpm2_pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/cpm2_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/cpm2_pic.c</a></div><div class='hunk'>@@ -207,7 +207,7 @@ unsigned int cpm2_get_irq(void)</div><div class='ctx'> </div><div class='ctx'> 	if (irq == 0)</div><div class='ctx'> 		return(-1);</div><div class='del'>-	return irq_linear_revmap(cpm2_pic_host, irq);</div><div class='add'>+	return irq_find_mapping(cpm2_pic_host, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm2_pic_host_map(struct irq_domain *h, unsigned int virq,</div><div class='hunk'>@@ -259,7 +259,8 @@ void cpm2_pic_init(struct device_node *node)</div><div class='ctx'> 	out_be32(&amp;cpm2_intctl-&gt;ic_scprrl, 0x05309770);</div><div class='ctx'> </div><div class='ctx'> 	/* create a legacy host */</div><div class='del'>-	cpm2_pic_host = irq_domain_add_linear(node, 64, &amp;cpm2_pic_host_ops, NULL);</div><div class='add'>+	cpm2_pic_host = irq_domain_create_linear(of_fwnode_handle(node), 64,</div><div class='add'>+						 &amp;cpm2_pic_host_ops, NULL);</div><div class='ctx'> 	if (cpm2_pic_host == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c<br/>index 47db732981a8..e22fc638dbc7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/cpm_common.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/cpm_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/cpm_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/cpm_common.c</a></div><div class='hunk'>@@ -138,7 +138,7 @@ static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,</div><div class='ctx'> 	out_be32(&amp;iop-&gt;dat, cpm2_gc-&gt;cpdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+static int cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);</div><div class='ctx'> 	struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);</div><div class='hunk'>@@ -150,6 +150,8 @@ static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> 	__cpm2_gpio32_set(mm_gc, pin_mask, value);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpm2_gc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)</div><div class='hunk'>@@ -208,7 +210,7 @@ int cpm2_gpiochip_add32(struct device *dev)</div><div class='ctx'> 	gc-&gt;direction_input = cpm2_gpio32_dir_in;</div><div class='ctx'> 	gc-&gt;direction_output = cpm2_gpio32_dir_out;</div><div class='ctx'> 	gc-&gt;get = cpm2_gpio32_get;</div><div class='del'>-	gc-&gt;set = cpm2_gpio32_set;</div><div class='add'>+	gc-&gt;set_rv = cpm2_gpio32_set;</div><div class='ctx'> 	gc-&gt;parent = dev;</div><div class='ctx'> 	gc-&gt;owner = THIS_MODULE;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/sysdev/ehv_pic.c b/arch/powerpc/sysdev/ehv_pic.c<br/>index fb502b72fca1..b6f9774038e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/ehv_pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/ehv_pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/ehv_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/ehv_pic.c</a></div><div class='hunk'>@@ -175,7 +175,7 @@ unsigned int ehv_pic_get_irq(void)</div><div class='ctx'> 	 * this will also setup revmap[] in the slow path for the first</div><div class='ctx'> 	 * time, next calls will always use fast path by indexing revmap</div><div class='ctx'> 	 */</div><div class='del'>-	return irq_linear_revmap(global_ehv_pic-&gt;irqhost, irq);</div><div class='add'>+	return irq_find_mapping(global_ehv_pic-&gt;irqhost, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ehv_pic_host_match(struct irq_domain *h, struct device_node *node,</div><div class='hunk'>@@ -269,8 +269,9 @@ void __init ehv_pic_init(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ehv_pic-&gt;irqhost = irq_domain_add_linear(np, NR_EHV_PIC_INTS,</div><div class='del'>-						 &amp;ehv_pic_host_ops, ehv_pic);</div><div class='add'>+	ehv_pic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+						    NR_EHV_PIC_INTS,</div><div class='add'>+						    &amp;ehv_pic_host_ops, ehv_pic);</div><div class='ctx'> 	if (!ehv_pic-&gt;irqhost) {</div><div class='ctx'> 		of_node_put(np);</div><div class='ctx'> 		kfree(ehv_pic);</div><div class='head'>diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c<br/>index 7b9a5ea9cad9..4fe8a7b1b288 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/fsl_msi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/fsl_msi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/fsl_msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/fsl_msi.c</a></div><div class='hunk'>@@ -412,7 +412,7 @@ static int fsl_of_msi_probe(struct platform_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	platform_set_drvdata(dev, msi);</div><div class='ctx'> </div><div class='del'>-	msi-&gt;irqhost = irq_domain_add_linear(dev-&gt;dev.of_node,</div><div class='add'>+	msi-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(dev-&gt;dev.of_node),</div><div class='ctx'> 				      NR_MSI_IRQS_MAX, &amp;fsl_msi_host_ops, msi);</div><div class='ctx'> </div><div class='ctx'> 	if (msi-&gt;irqhost == NULL) {</div><div class='head'>diff --git a/arch/powerpc/sysdev/ge/ge_pic.c b/arch/powerpc/sysdev/ge/ge_pic.c<br/>index a6c424680c37..0bc3f0b36528 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/ge/ge_pic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/ge/ge_pic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/ge/ge_pic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/ge/ge_pic.c</a></div><div class='hunk'>@@ -214,8 +214,9 @@ void __init gef_pic_init(struct device_node *np)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup an irq_domain structure */</div><div class='del'>-	gef_pic_irq_host = irq_domain_add_linear(np, GEF_PIC_NUM_IRQS,</div><div class='del'>-					  &amp;gef_pic_host_ops, NULL);</div><div class='add'>+	gef_pic_irq_host = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='add'>+						    GEF_PIC_NUM_IRQS,</div><div class='add'>+						    &amp;gef_pic_host_ops, NULL);</div><div class='ctx'> 	if (gef_pic_irq_host == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -244,7 +245,7 @@ unsigned int gef_pic_get_irq(void)</div><div class='ctx'> 			if (active &amp; (0x1 &lt;&lt; hwirq))</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='del'>-		virq = irq_linear_revmap(gef_pic_irq_host,</div><div class='add'>+		virq = irq_find_mapping(gef_pic_irq_host,</div><div class='ctx'> 			(irq_hw_number_t)hwirq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c<br/>index 06e391485da7..99bb2b916949 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/i8259.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/i8259.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/i8259.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/i8259.c</a></div><div class='hunk'>@@ -260,8 +260,8 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;i8259_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* create a legacy host */</div><div class='del'>-	i8259_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0,</div><div class='del'>-					   &amp;i8259_host_ops, NULL);</div><div class='add'>+	i8259_host = irq_domain_create_legacy(of_fwnode_handle(node), NR_IRQS_LEGACY, 0, 0,</div><div class='add'>+					      &amp;i8259_host_ops, NULL);</div><div class='ctx'> 	if (i8259_host == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "i8259: failed to allocate irq host !\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c<br/>index a35be0232978..70be2105865d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/ipic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/ipic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/ipic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/ipic.c</a></div><div class='hunk'>@@ -711,8 +711,9 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)</div><div class='ctx'> 	if (ipic == NULL)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	ipic-&gt;irqhost = irq_domain_add_linear(node, NR_IPIC_INTS,</div><div class='del'>-					      &amp;ipic_host_ops, ipic);</div><div class='add'>+	ipic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(node),</div><div class='add'>+						 NR_IPIC_INTS,</div><div class='add'>+						 &amp;ipic_host_ops, ipic);</div><div class='ctx'> 	if (ipic-&gt;irqhost == NULL) {</div><div class='ctx'> 		kfree(ipic);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -800,7 +801,7 @@ unsigned int ipic_get_irq(void)</div><div class='ctx'> 	if (irq == 0)    /* 0 --&gt; no irq is pending */</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(primary_ipic-&gt;irqhost, irq);</div><div class='add'>+	return irq_find_mapping(primary_ipic-&gt;irqhost, irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SUSPEND</div><div class='head'>diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c<br/>index 4afbab83a2e2..ad7310bba00b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/mpic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/mpic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/mpic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/mpic.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/syscore_ops.h&gt;</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='hunk'>@@ -474,9 +475,9 @@ static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase,</div><div class='ctx'> 		addr = addr | ((u64)readl(base + HT_MSI_ADDR_HI) &lt;&lt; 32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	printk(KERN_DEBUG "mpic:   - HT:%02x.%x %s MSI mapping found @ 0x%llx\n",</div><div class='del'>-		PCI_SLOT(devfn), PCI_FUNC(devfn),</div><div class='del'>-		flags &amp; HT_MSI_FLAGS_ENABLE ? "enabled" : "disabled", addr);</div><div class='add'>+	pr_debug("mpic:   - HT:%02x.%x %s MSI mapping found @ 0x%llx\n",</div><div class='add'>+		 PCI_SLOT(devfn), PCI_FUNC(devfn),</div><div class='add'>+		 str_enabled_disabled(flags &amp; HT_MSI_FLAGS_ENABLE), addr);</div><div class='ctx'> </div><div class='ctx'> 	if (!(flags &amp; HT_MSI_FLAGS_ENABLE))</div><div class='ctx'> 		writeb(flags | HT_MSI_FLAGS_ENABLE, base + HT_MSI_FLAGS);</div><div class='hunk'>@@ -1483,9 +1484,9 @@ struct mpic * __init mpic_alloc(struct device_node *node,</div><div class='ctx'> 	mpic-&gt;isu_shift = 1 + __ilog2(mpic-&gt;isu_size - 1);</div><div class='ctx'> 	mpic-&gt;isu_mask = (1 &lt;&lt; mpic-&gt;isu_shift) - 1;</div><div class='ctx'> </div><div class='del'>-	mpic-&gt;irqhost = irq_domain_add_linear(mpic-&gt;node,</div><div class='del'>-				       intvec_top,</div><div class='del'>-				       &amp;mpic_host_ops, mpic);</div><div class='add'>+	mpic-&gt;irqhost = irq_domain_create_linear(of_fwnode_handle(mpic-&gt;node),</div><div class='add'>+						 intvec_top,</div><div class='add'>+						 &amp;mpic_host_ops, mpic);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * FIXME: The code leaks the MPIC object and mappings here; this</div><div class='hunk'>@@ -1785,7 +1786,7 @@ static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(mpic-&gt;irqhost, src);</div><div class='add'>+	return irq_find_mapping(mpic-&gt;irqhost, src);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> unsigned int mpic_get_one_irq(struct mpic *mpic)</div><div class='hunk'>@@ -1823,7 +1824,7 @@ unsigned int mpic_get_coreint_irq(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return irq_linear_revmap(mpic-&gt;irqhost, src);</div><div class='add'>+	return irq_find_mapping(mpic-&gt;irqhost, src);</div><div class='ctx'> #else</div><div class='ctx'> 	return 0;</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c<br/>index 0e42f7bad7db..07d0f6a83879 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/tsi108_pci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/tsi108_pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/tsi108_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/tsi108_pci.c</a></div><div class='hunk'>@@ -404,8 +404,8 @@ void __init tsi108_pci_int_init(struct device_node *node)</div><div class='ctx'> {</div><div class='ctx'> 	DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");</div><div class='ctx'> </div><div class='del'>-	pci_irq_host = irq_domain_add_legacy(node, NR_IRQS_LEGACY, 0, 0,</div><div class='del'>-					     &amp;pci_irq_domain_ops, NULL);</div><div class='add'>+	pci_irq_host = irq_domain_create_legacy(of_fwnode_handle(node), NR_IRQS_LEGACY, 0, 0,</div><div class='add'>+						&amp;pci_irq_domain_ops, NULL);</div><div class='ctx'> 	if (pci_irq_host == NULL) {</div><div class='ctx'> 		printk(KERN_ERR "pci_irq_host: failed to allocate irq domain!\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c<br/>index dc2e61837396..f10592405024 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/xive/common.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/sysdev/xive/common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/sysdev/xive/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/sysdev/xive/common.c</a></div><div class='hunk'>@@ -1464,7 +1464,7 @@ static const struct irq_domain_ops xive_irq_domain_ops = {</div><div class='ctx'> </div><div class='ctx'> static void __init xive_init_host(struct device_node *np)</div><div class='ctx'> {</div><div class='del'>-	xive_irq_domain = irq_domain_add_tree(np, &amp;xive_irq_domain_ops, NULL);</div><div class='add'>+	xive_irq_domain = irq_domain_create_tree(of_fwnode_handle(np), &amp;xive_irq_domain_ops, NULL);</div><div class='ctx'> 	if (WARN_ON(xive_irq_domain == NULL))</div><div class='ctx'> 		return;</div><div class='ctx'> 	irq_set_default_domain(xive_irq_domain);</div><div class='head'>diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c<br/>index 88abffa8b54c..cb3a3244ae6f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/powerpc/xmon/xmon.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/powerpc/xmon/xmon.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/powerpc/xmon/xmon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/powerpc/xmon/xmon.c</a></div><div class='hunk'>@@ -1770,7 +1770,7 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr,</div><div class='ctx'> 				       sp + STACK_INT_FRAME_REGS);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='del'>-			printf("--- Exception: %lx %s at ", regs.trap,</div><div class='add'>+			printf("---- Exception: %lx %s at ", regs.trap,</div><div class='ctx'> 			       getvecname(TRAP(&amp;regs)));</div><div class='ctx'> 			pc = regs.nip;</div><div class='ctx'> 			lr = regs.link;</div><div class='head'>diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi<br/>index c18822ec849f..58cd546392e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv18xx.dtsi?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/boot/dts/sophgo/cv18xx.dtsi</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/boot/dts/sophgo/cv18xx.dtsi?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/boot/dts/sophgo/cv18xx.dtsi</a></div><div class='hunk'>@@ -341,7 +341,7 @@</div><div class='ctx'> 					   1024 1024 1024 1024&gt;;</div><div class='ctx'> 			snps,priority = &lt;0 1 2 3 4 5 6 7&gt;;</div><div class='ctx'> 			snps,dma-masters = &lt;2&gt;;</div><div class='del'>-			snps,data-width = &lt;4&gt;;</div><div class='add'>+			snps,data-width = &lt;2&gt;;</div><div class='ctx'> 			status = "disabled";</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/crypto/Kconfig b/arch/riscv/crypto/Kconfig<br/>index c67095a3d669..cd9b776602f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/crypto/Kconfig</a></div><div class='hunk'>@@ -18,16 +18,6 @@ config CRYPTO_AES_RISCV64</div><div class='ctx'> 	  - Zvkb vector crypto extension (CTR)</div><div class='ctx'> 	  - Zvkg vector crypto extension (XTS)</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA_RISCV64</div><div class='del'>-	tristate "Ciphers: ChaCha"</div><div class='del'>-	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20 stream cipher algorithm</div><div class='del'>-</div><div class='del'>-	  Architecture: riscv64 using:</div><div class='del'>-	  - Zvkb vector crypto extension</div><div class='del'>-</div><div class='ctx'> config CRYPTO_GHASH_RISCV64</div><div class='ctx'> 	tristate "Hash functions: GHASH"</div><div class='ctx'> 	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='hunk'>@@ -38,17 +28,6 @@ config CRYPTO_GHASH_RISCV64</div><div class='ctx'> 	  Architecture: riscv64 using:</div><div class='ctx'> 	  - Zvkg vector crypto extension</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_RISCV64</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256"</div><div class='del'>-	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithm (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: riscv64 using:</div><div class='del'>-	  - Zvknha or Zvknhb vector crypto extensions</div><div class='del'>-	  - Zvkb vector crypto extension</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA512_RISCV64</div><div class='ctx'> 	tristate "Hash functions: SHA-384 and SHA-512"</div><div class='ctx'> 	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='hunk'>@@ -64,7 +43,7 @@ config CRYPTO_SM3_RISCV64</div><div class='ctx'> 	tristate "Hash functions: SM3 (ShangMi 3)"</div><div class='ctx'> 	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/crypto/Makefile b/arch/riscv/crypto/Makefile<br/>index 247c7bc7288c..e10e8257734e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/crypto/Makefile</a></div><div class='hunk'>@@ -4,15 +4,9 @@ obj-$(CONFIG_CRYPTO_AES_RISCV64) += aes-riscv64.o</div><div class='ctx'> aes-riscv64-y := aes-riscv64-glue.o aes-riscv64-zvkned.o \</div><div class='ctx'> 		 aes-riscv64-zvkned-zvbb-zvkg.o aes-riscv64-zvkned-zvkb.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA_RISCV64) += chacha-riscv64.o</div><div class='del'>-chacha-riscv64-y := chacha-riscv64-glue.o chacha-riscv64-zvkb.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH_RISCV64) += ghash-riscv64.o</div><div class='ctx'> ghash-riscv64-y := ghash-riscv64-glue.o ghash-riscv64-zvkg.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_RISCV64) += sha256-riscv64.o</div><div class='del'>-sha256-riscv64-y := sha256-riscv64-glue.o sha256-riscv64-zvknha_or_zvknhb-zvkb.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512_RISCV64) += sha512-riscv64.o</div><div class='ctx'> sha512-riscv64-y := sha512-riscv64-glue.o sha512-riscv64-zvknhb-zvkb.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/crypto/chacha-riscv64-glue.c b/arch/riscv/crypto/chacha-riscv64-glue.c<br/>deleted file mode 100644<br/>index 10b46f36375a..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/chacha-riscv64-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/chacha-riscv64-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,101 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/*</div><div class='del'>- * ChaCha20 using the RISC-V vector crypto extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2023 SiFive, Inc.</div><div class='del'>- * Author: Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/vector.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha20_zvkb(const u32 key[8], const u8 *in, u8 *out,</div><div class='del'>-			      size_t len, const u32 iv[4]);</div><div class='del'>-</div><div class='del'>-static int riscv64_chacha20_crypt(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	u32 iv[CHACHA_IV_SIZE / sizeof(u32)];</div><div class='del'>-	u8 block_buffer[CHACHA_BLOCK_SIZE];</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	const struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	unsigned int nbytes;</div><div class='del'>-	unsigned int tail_bytes;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	iv[0] = get_unaligned_le32(req-&gt;iv);</div><div class='del'>-	iv[1] = get_unaligned_le32(req-&gt;iv + 4);</div><div class='del'>-	iv[2] = get_unaligned_le32(req-&gt;iv + 8);</div><div class='del'>-	iv[3] = get_unaligned_le32(req-&gt;iv + 12);</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	while (walk.nbytes) {</div><div class='del'>-		nbytes = walk.nbytes &amp; ~(CHACHA_BLOCK_SIZE - 1);</div><div class='del'>-		tail_bytes = walk.nbytes &amp; (CHACHA_BLOCK_SIZE - 1);</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (nbytes) {</div><div class='del'>-			chacha20_zvkb(ctx-&gt;key, walk.src.virt.addr,</div><div class='del'>-				      walk.dst.virt.addr, nbytes, iv);</div><div class='del'>-			iv[0] += nbytes / CHACHA_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-		if (walk.nbytes == walk.total &amp;&amp; tail_bytes &gt; 0) {</div><div class='del'>-			memcpy(block_buffer, walk.src.virt.addr + nbytes,</div><div class='del'>-			       tail_bytes);</div><div class='del'>-			chacha20_zvkb(ctx-&gt;key, block_buffer, block_buffer,</div><div class='del'>-				      CHACHA_BLOCK_SIZE, iv);</div><div class='del'>-			memcpy(walk.dst.virt.addr + nbytes, block_buffer,</div><div class='del'>-			       tail_bytes);</div><div class='del'>-			tail_bytes = 0;</div><div class='del'>-		}</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, tail_bytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg riscv64_chacha_alg = {</div><div class='del'>-	.setkey = chacha20_setkey,</div><div class='del'>-	.encrypt = riscv64_chacha20_crypt,</div><div class='del'>-	.decrypt = riscv64_chacha20_crypt,</div><div class='del'>-	.min_keysize = CHACHA_KEY_SIZE,</div><div class='del'>-	.max_keysize = CHACHA_KEY_SIZE,</div><div class='del'>-	.ivsize = CHACHA_IV_SIZE,</div><div class='del'>-	.chunksize = CHACHA_BLOCK_SIZE,</div><div class='del'>-	.walksize = 4 * CHACHA_BLOCK_SIZE,</div><div class='del'>-	.base = {</div><div class='del'>-		.cra_blocksize = 1,</div><div class='del'>-		.cra_ctxsize = sizeof(struct chacha_ctx),</div><div class='del'>-		.cra_priority = 300,</div><div class='del'>-		.cra_name = "chacha20",</div><div class='del'>-		.cra_driver_name = "chacha20-riscv64-zvkb",</div><div class='del'>-		.cra_module = THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init riscv64_chacha_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (riscv_isa_extension_available(NULL, ZVKB) &amp;&amp;</div><div class='del'>-	    riscv_vector_vlen() &gt;= 128)</div><div class='del'>-		return crypto_register_skcipher(&amp;riscv64_chacha_alg);</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit riscv64_chacha_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_skcipher(&amp;riscv64_chacha_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(riscv64_chacha_mod_init);</div><div class='del'>-module_exit(riscv64_chacha_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha20 (RISC-V accelerated)");</div><div class='del'>-MODULE_AUTHOR("Jerry Shih &lt;jerry.shih@sifive.com&gt;");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='head'>diff --git a/arch/riscv/crypto/ghash-riscv64-glue.c b/arch/riscv/crypto/ghash-riscv64-glue.c<br/>index 312e7891fd0a..d86073d25387 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/ghash-riscv64-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/ghash-riscv64-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/crypto/ghash-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/crypto/ghash-riscv64-glue.c</a></div><div class='hunk'>@@ -11,11 +11,16 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;asm/vector.h&gt;</div><div class='add'>+#include &lt;crypto/b128ops.h&gt;</div><div class='add'>+#include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void ghash_zvkg(be128 *accumulator, const be128 *key, const u8 *data,</div><div class='ctx'> 			   size_t len);</div><div class='hunk'>@@ -26,8 +31,6 @@ struct riscv64_ghash_tfm_ctx {</div><div class='ctx'> </div><div class='ctx'> struct riscv64_ghash_desc_ctx {</div><div class='ctx'> 	be128 accumulator;</div><div class='del'>-	u8 buffer[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int riscv64_ghash_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='hunk'>@@ -78,50 +81,24 @@ static int riscv64_ghash_update(struct shash_desc *desc, const u8 *src,</div><div class='ctx'> {</div><div class='ctx'> 	const struct riscv64_ghash_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct riscv64_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int len;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		if (dctx-&gt;bytes + srclen &lt; GHASH_BLOCK_SIZE) {</div><div class='del'>-			memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src, srclen);</div><div class='del'>-			dctx-&gt;bytes += srclen;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		memcpy(dctx-&gt;buffer + dctx-&gt;bytes, src,</div><div class='del'>-		       GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='del'>-		riscv64_ghash_blocks(tctx, dctx, dctx-&gt;buffer,</div><div class='del'>-				     GHASH_BLOCK_SIZE);</div><div class='del'>-		src += GHASH_BLOCK_SIZE - dctx-&gt;bytes;</div><div class='del'>-		srclen -= GHASH_BLOCK_SIZE - dctx-&gt;bytes;</div><div class='del'>-		dctx-&gt;bytes = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len = round_down(srclen, GHASH_BLOCK_SIZE);</div><div class='del'>-	if (len) {</div><div class='del'>-		riscv64_ghash_blocks(tctx, dctx, src, len);</div><div class='del'>-		src += len;</div><div class='del'>-		srclen -= len;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (srclen) {</div><div class='del'>-		memcpy(dctx-&gt;buffer, src, srclen);</div><div class='del'>-		dctx-&gt;bytes = srclen;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	riscv64_ghash_blocks(tctx, dctx, src,</div><div class='add'>+			     round_down(srclen, GHASH_BLOCK_SIZE));</div><div class='add'>+	return srclen - round_down(srclen, GHASH_BLOCK_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_ghash_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int riscv64_ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			       unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	const struct riscv64_ghash_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct riscv64_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		for (i = dctx-&gt;bytes; i &lt; GHASH_BLOCK_SIZE; i++)</div><div class='del'>-			dctx-&gt;buffer[i] = 0;</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='ctx'> </div><div class='del'>-		riscv64_ghash_blocks(tctx, dctx, dctx-&gt;buffer,</div><div class='del'>-				     GHASH_BLOCK_SIZE);</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		riscv64_ghash_blocks(tctx, dctx, buf, GHASH_BLOCK_SIZE);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(out, &amp;dctx-&gt;accumulator, GHASH_DIGEST_SIZE);</div><div class='hunk'>@@ -131,7 +108,7 @@ static int riscv64_ghash_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> static struct shash_alg riscv64_ghash_alg = {</div><div class='ctx'> 	.init = riscv64_ghash_init,</div><div class='ctx'> 	.update = riscv64_ghash_update,</div><div class='del'>-	.final = riscv64_ghash_final,</div><div class='add'>+	.finup = riscv64_ghash_finup,</div><div class='ctx'> 	.setkey = riscv64_ghash_setkey,</div><div class='ctx'> 	.descsize = sizeof(struct riscv64_ghash_desc_ctx),</div><div class='ctx'> 	.digestsize = GHASH_DIGEST_SIZE,</div><div class='hunk'>@@ -139,6 +116,7 @@ static struct shash_alg riscv64_ghash_alg = {</div><div class='ctx'> 		.cra_blocksize = GHASH_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize = sizeof(struct riscv64_ghash_tfm_ctx),</div><div class='ctx'> 		.cra_priority = 300,</div><div class='add'>+		.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_name = "ghash",</div><div class='ctx'> 		.cra_driver_name = "ghash-riscv64-zvkg",</div><div class='ctx'> 		.cra_module = THIS_MODULE,</div><div class='head'>diff --git a/arch/riscv/crypto/sha256-riscv64-glue.c b/arch/riscv/crypto/sha256-riscv64-glue.c<br/>deleted file mode 100644<br/>index 71e051e40a64..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sha256-riscv64-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sha256-riscv64-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * SHA-256 and SHA-224 using the RISC-V vector crypto extensions</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2022 VRULL GmbH</div><div class='del'>- * Author: Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2023 SiFive, Inc.</div><div class='del'>- * Author: Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;asm/vector.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note: the asm function only uses the 'state' field of struct sha256_state.</div><div class='del'>- * It is assumed to be the first field.</div><div class='del'>- */</div><div class='del'>-asmlinkage void sha256_transform_zvknha_or_zvknhb_zvkb(</div><div class='del'>-	struct sha256_state *state, const u8 *data, int num_blocks);</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure struct sha256_state begins directly with the SHA-256</div><div class='del'>-	 * 256-bit internal state, as this is what the asm function expects.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);</div><div class='del'>-</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		sha256_base_do_update(desc, data, len,</div><div class='del'>-				      sha256_transform_zvknha_or_zvknhb_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-	} else {</div><div class='del'>-		crypto_sha256_update(desc, data, len);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (len)</div><div class='del'>-			sha256_base_do_update(</div><div class='del'>-				desc, data, len,</div><div class='del'>-				sha256_transform_zvknha_or_zvknhb_zvkb);</div><div class='del'>-		sha256_base_do_finalize(</div><div class='del'>-			desc, sha256_transform_zvknha_or_zvknhb_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		return sha256_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crypto_sha256_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return riscv64_sha256_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int riscv64_sha256_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_init(desc) ?:</div><div class='del'>-	       riscv64_sha256_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg riscv64_sha256_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.init = sha256_base_init,</div><div class='del'>-		.update = riscv64_sha256_update,</div><div class='del'>-		.final = riscv64_sha256_final,</div><div class='del'>-		.finup = riscv64_sha256_finup,</div><div class='del'>-		.digest = riscv64_sha256_digest,</div><div class='del'>-		.descsize = sizeof(struct sha256_state),</div><div class='del'>-		.digestsize = SHA256_DIGEST_SIZE,</div><div class='del'>-		.base = {</div><div class='del'>-			.cra_blocksize = SHA256_BLOCK_SIZE,</div><div class='del'>-			.cra_priority = 300,</div><div class='del'>-			.cra_name = "sha256",</div><div class='del'>-			.cra_driver_name = "sha256-riscv64-zvknha_or_zvknhb-zvkb",</div><div class='del'>-			.cra_module = THIS_MODULE,</div><div class='del'>-		},</div><div class='del'>-	}, {</div><div class='del'>-		.init = sha224_base_init,</div><div class='del'>-		.update = riscv64_sha256_update,</div><div class='del'>-		.final = riscv64_sha256_final,</div><div class='del'>-		.finup = riscv64_sha256_finup,</div><div class='del'>-		.descsize = sizeof(struct sha256_state),</div><div class='del'>-		.digestsize = SHA224_DIGEST_SIZE,</div><div class='del'>-		.base = {</div><div class='del'>-			.cra_blocksize = SHA224_BLOCK_SIZE,</div><div class='del'>-			.cra_priority = 300,</div><div class='del'>-			.cra_name = "sha224",</div><div class='del'>-			.cra_driver_name = "sha224-riscv64-zvknha_or_zvknhb-zvkb",</div><div class='del'>-			.cra_module = THIS_MODULE,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init riscv64_sha256_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	/* Both zvknha and zvknhb provide the SHA-256 instructions. */</div><div class='del'>-	if ((riscv_isa_extension_available(NULL, ZVKNHA) ||</div><div class='del'>-	     riscv_isa_extension_available(NULL, ZVKNHB)) &amp;&amp;</div><div class='del'>-	    riscv_isa_extension_available(NULL, ZVKB) &amp;&amp;</div><div class='del'>-	    riscv_vector_vlen() &gt;= 128)</div><div class='del'>-		return crypto_register_shashes(riscv64_sha256_algs,</div><div class='del'>-					       ARRAY_SIZE(riscv64_sha256_algs));</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit riscv64_sha256_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(riscv64_sha256_algs,</div><div class='del'>-				  ARRAY_SIZE(riscv64_sha256_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(riscv64_sha256_mod_init);</div><div class='del'>-module_exit(riscv64_sha256_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("SHA-256 (RISC-V accelerated)");</div><div class='del'>-MODULE_AUTHOR("Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='head'>diff --git a/arch/riscv/crypto/sha512-riscv64-glue.c b/arch/riscv/crypto/sha512-riscv64-glue.c<br/>index 43b56a08aeb5..4634fca78ae2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sha512-riscv64-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sha512-riscv64-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sha512-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/crypto/sha512-riscv64-glue.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -24,8 +24,8 @@</div><div class='ctx'> asmlinkage void sha512_transform_zvknhb_zvkb(</div><div class='ctx'> 	struct sha512_state *state, const u8 *data, int num_blocks);</div><div class='ctx'> </div><div class='del'>-static int riscv64_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len)</div><div class='add'>+static void sha512_block(struct sha512_state *state, const u8 *data,</div><div class='add'>+			 int num_blocks)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ensure struct sha512_state begins directly with the SHA-512</div><div class='hunk'>@@ -35,35 +35,24 @@ static int riscv64_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_simd_usable()) {</div><div class='ctx'> 		kernel_vector_begin();</div><div class='del'>-		sha512_base_do_update(desc, data, len,</div><div class='del'>-				      sha512_transform_zvknhb_zvkb);</div><div class='add'>+		sha512_transform_zvknhb_zvkb(state, data, num_blocks);</div><div class='ctx'> 		kernel_vector_end();</div><div class='ctx'> 	} else {</div><div class='del'>-		crypto_sha512_update(desc, data, len);</div><div class='add'>+		sha512_generic_block_fn(state, data, num_blocks);</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				unsigned int len, u8 *out)</div><div class='add'>+static int riscv64_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				 unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (len)</div><div class='del'>-			sha512_base_do_update(desc, data, len,</div><div class='del'>-					      sha512_transform_zvknhb_zvkb);</div><div class='del'>-		sha512_base_do_finalize(desc, sha512_transform_zvknhb_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		return sha512_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return crypto_sha512_finup(desc, data, len, out);</div><div class='add'>+	return sha512_base_do_update_blocks(desc, data, len, sha512_block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_sha512_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int riscv64_sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	return riscv64_sha512_finup(desc, NULL, 0, out);</div><div class='add'>+	sha512_base_do_finup(desc, data, len, sha512_block);</div><div class='add'>+	return sha512_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int riscv64_sha512_digest(struct shash_desc *desc, const u8 *data,</div><div class='hunk'>@@ -77,14 +66,15 @@ static struct shash_alg riscv64_sha512_algs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.init = sha512_base_init,</div><div class='ctx'> 		.update = riscv64_sha512_update,</div><div class='del'>-		.final = riscv64_sha512_final,</div><div class='ctx'> 		.finup = riscv64_sha512_finup,</div><div class='ctx'> 		.digest = riscv64_sha512_digest,</div><div class='del'>-		.descsize = sizeof(struct sha512_state),</div><div class='add'>+		.descsize = SHA512_STATE_SIZE,</div><div class='ctx'> 		.digestsize = SHA512_DIGEST_SIZE,</div><div class='ctx'> 		.base = {</div><div class='ctx'> 			.cra_blocksize = SHA512_BLOCK_SIZE,</div><div class='ctx'> 			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				     CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 			.cra_name = "sha512",</div><div class='ctx'> 			.cra_driver_name = "sha512-riscv64-zvknhb-zvkb",</div><div class='ctx'> 			.cra_module = THIS_MODULE,</div><div class='hunk'>@@ -92,13 +82,14 @@ static struct shash_alg riscv64_sha512_algs[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.init = sha384_base_init,</div><div class='ctx'> 		.update = riscv64_sha512_update,</div><div class='del'>-		.final = riscv64_sha512_final,</div><div class='ctx'> 		.finup = riscv64_sha512_finup,</div><div class='del'>-		.descsize = sizeof(struct sha512_state),</div><div class='add'>+		.descsize = SHA512_STATE_SIZE,</div><div class='ctx'> 		.digestsize = SHA384_DIGEST_SIZE,</div><div class='ctx'> 		.base = {</div><div class='ctx'> 			.cra_blocksize = SHA384_BLOCK_SIZE,</div><div class='ctx'> 			.cra_priority = 300,</div><div class='add'>+			.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				     CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 			.cra_name = "sha384",</div><div class='ctx'> 			.cra_driver_name = "sha384-riscv64-zvknhb-zvkb",</div><div class='ctx'> 			.cra_module = THIS_MODULE,</div><div class='head'>diff --git a/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S b/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S<br/>index 3a9ae210f915..89f4a10d12dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/crypto/sha512-riscv64-zvknhb-zvkb.S</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> // - RISC-V Vector SHA-2 Secure Hash extension ('Zvknhb')</div><div class='ctx'> // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> .option arch, +zvknhb, +zvkb</div><div class='hunk'>@@ -95,7 +95,7 @@</div><div class='ctx'> </div><div class='ctx'> // void sha512_transform_zvknhb_zvkb(u64 state[8], const u8 *data,</div><div class='ctx'> //				     int num_blocks);</div><div class='del'>-SYM_TYPED_FUNC_START(sha512_transform_zvknhb_zvkb)</div><div class='add'>+SYM_FUNC_START(sha512_transform_zvknhb_zvkb)</div><div class='ctx'> </div><div class='ctx'> 	// Setup mask for the vmerge to replace the first word (idx==0) in</div><div class='ctx'> 	// message scheduling.  There are 4 words, so an 8-bit mask suffices.</div><div class='head'>diff --git a/arch/riscv/crypto/sm3-riscv64-glue.c b/arch/riscv/crypto/sm3-riscv64-glue.c<br/>index e1737a970c7c..abdfe4a63a27 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sm3-riscv64-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sm3-riscv64-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sm3-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/crypto/sm3-riscv64-glue.c</a></div><div class='hunk'>@@ -13,8 +13,9 @@</div><div class='ctx'> #include &lt;asm/vector.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -24,8 +25,8 @@</div><div class='ctx'> asmlinkage void sm3_transform_zvksh_zvkb(</div><div class='ctx'> 	struct sm3_state *state, const u8 *data, int num_blocks);</div><div class='ctx'> </div><div class='del'>-static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			      unsigned int len)</div><div class='add'>+static void sm3_block(struct sm3_state *state, const u8 *data,</div><div class='add'>+		      int num_blocks)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ensure struct sm3_state begins directly with the SM3</div><div class='hunk'>@@ -35,52 +36,36 @@ static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_simd_usable()) {</div><div class='ctx'> 		kernel_vector_begin();</div><div class='del'>-		sm3_base_do_update(desc, data, len, sm3_transform_zvksh_zvkb);</div><div class='add'>+		sm3_transform_zvksh_zvkb(state, data, num_blocks);</div><div class='ctx'> 		kernel_vector_end();</div><div class='ctx'> 	} else {</div><div class='del'>-		sm3_update(shash_desc_ctx(desc), data, len);</div><div class='add'>+		sm3_block_generic(state, data, num_blocks);</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_sm3_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len, u8 *out)</div><div class='add'>+static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			      unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sm3_state *ctx;</div><div class='del'>-</div><div class='del'>-	if (crypto_simd_usable()) {</div><div class='del'>-		kernel_vector_begin();</div><div class='del'>-		if (len)</div><div class='del'>-			sm3_base_do_update(desc, data, len,</div><div class='del'>-					   sm3_transform_zvksh_zvkb);</div><div class='del'>-		sm3_base_do_finalize(desc, sm3_transform_zvksh_zvkb);</div><div class='del'>-		kernel_vector_end();</div><div class='del'>-</div><div class='del'>-		return sm3_base_finish(desc, out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ctx = shash_desc_ctx(desc);</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_update(ctx, data, len);</div><div class='del'>-	sm3_final(ctx, out);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sm3_base_do_update_blocks(desc, data, len, sm3_block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int riscv64_sm3_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int riscv64_sm3_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			     unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	return riscv64_sm3_finup(desc, NULL, 0, out);</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_block);</div><div class='add'>+	return sm3_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg riscv64_sm3_alg = {</div><div class='ctx'> 	.init = sm3_base_init,</div><div class='ctx'> 	.update = riscv64_sm3_update,</div><div class='del'>-	.final = riscv64_sm3_final,</div><div class='ctx'> 	.finup = riscv64_sm3_finup,</div><div class='del'>-	.descsize = sizeof(struct sm3_state),</div><div class='add'>+	.descsize = SM3_STATE_SIZE,</div><div class='ctx'> 	.digestsize = SM3_DIGEST_SIZE,</div><div class='ctx'> 	.base = {</div><div class='ctx'> 		.cra_blocksize = SM3_BLOCK_SIZE,</div><div class='add'>+		.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+			     CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_priority = 300,</div><div class='ctx'> 		.cra_name = "sm3",</div><div class='ctx'> 		.cra_driver_name = "sm3-riscv64-zvksh-zvkb",</div><div class='head'>diff --git a/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S b/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S<br/>index a2b65d961c04..4fe754846f65 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/crypto/sm3-riscv64-zvksh-zvkb.S</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> // - RISC-V Vector SM3 Secure Hash extension ('Zvksh')</div><div class='ctx'> // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> .option arch, +zvksh, +zvkb</div><div class='hunk'>@@ -81,7 +81,7 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> // void sm3_transform_zvksh_zvkb(u32 state[8], const u8 *data, int num_blocks);</div><div class='del'>-SYM_TYPED_FUNC_START(sm3_transform_zvksh_zvkb)</div><div class='add'>+SYM_FUNC_START(sm3_transform_zvksh_zvkb)</div><div class='ctx'> </div><div class='ctx'> 	// Load the state and endian-swap each 32-bit word.</div><div class='ctx'> 	vsetivli	zero, 8, e32, m2, ta, ma</div><div class='head'>diff --git a/arch/riscv/include/asm/alternative-macros.h b/arch/riscv/include/asm/alternative-macros.h<br/>index 721ec275ce57..231d777d936c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/alternative-macros.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/alternative-macros.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/alternative-macros.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/alternative-macros.h</a></div><div class='hunk'>@@ -115,24 +115,19 @@</div><div class='ctx'> 	\old_c</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#define _ALTERNATIVE_CFG(old_c, ...)	\</div><div class='del'>-	ALTERNATIVE_CFG old_c</div><div class='del'>-</div><div class='del'>-#define _ALTERNATIVE_CFG_2(old_c, ...)	\</div><div class='del'>-	ALTERNATIVE_CFG old_c</div><div class='add'>+#define __ALTERNATIVE_CFG(old_c, ...)		ALTERNATIVE_CFG old_c</div><div class='add'>+#define __ALTERNATIVE_CFG_2(old_c, ...)		ALTERNATIVE_CFG old_c</div><div class='ctx'> </div><div class='ctx'> #else /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='del'>-#define __ALTERNATIVE_CFG(old_c)	\</div><div class='del'>-	old_c "\n"</div><div class='add'>+#define __ALTERNATIVE_CFG(old_c, ...)		old_c "\n"</div><div class='add'>+#define __ALTERNATIVE_CFG_2(old_c, ...)		old_c "\n"</div><div class='ctx'> </div><div class='del'>-#define _ALTERNATIVE_CFG(old_c, ...)	\</div><div class='del'>-	__ALTERNATIVE_CFG(old_c)</div><div class='add'>+#endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='del'>-#define _ALTERNATIVE_CFG_2(old_c, ...)	\</div><div class='del'>-	__ALTERNATIVE_CFG(old_c)</div><div class='add'>+#define _ALTERNATIVE_CFG(old_c, ...)		__ALTERNATIVE_CFG(old_c)</div><div class='add'>+#define _ALTERNATIVE_CFG_2(old_c, ...)		__ALTERNATIVE_CFG_2(old_c)</div><div class='ctx'> </div><div class='del'>-#endif /* __ASSEMBLY__ */</div><div class='ctx'> #endif /* CONFIG_RISCV_ALTERNATIVE */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/riscv/include/asm/asm-prototypes.h b/arch/riscv/include/asm/asm-prototypes.h<br/>index cd627ec289f1..bfc8ea5f9319 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/asm-prototypes.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/asm-prototypes.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/asm-prototypes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/asm-prototypes.h</a></div><div class='hunk'>@@ -52,6 +52,8 @@ DECLARE_DO_ERROR_INFO(do_trap_ecall_s);</div><div class='ctx'> DECLARE_DO_ERROR_INFO(do_trap_ecall_m);</div><div class='ctx'> DECLARE_DO_ERROR_INFO(do_trap_break);</div><div class='ctx'> </div><div class='add'>+asmlinkage void ret_from_fork_kernel(void *fn_arg, int (*fn)(void *), struct pt_regs *regs);</div><div class='add'>+asmlinkage void ret_from_fork_user(struct pt_regs *regs);</div><div class='ctx'> asmlinkage void handle_bad_stack(struct pt_regs *regs);</div><div class='ctx'> asmlinkage void do_page_fault(struct pt_regs *regs);</div><div class='ctx'> asmlinkage void do_irq(struct pt_regs *regs);</div><div class='head'>diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h<br/>index 8de73f91bfa3..b59ffeb668d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/cacheflush.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/cacheflush.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/cacheflush.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/cacheflush.h</a></div><div class='hunk'>@@ -34,11 +34,6 @@ static inline void flush_dcache_page(struct page *page)</div><div class='ctx'> 	flush_dcache_folio(page_folio(page));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * RISC-V doesn't have an instruction to flush parts of the instruction cache,</div><div class='del'>- * so instead we just flush the whole thing.</div><div class='del'>- */</div><div class='del'>-#define flush_icache_range(start, end) flush_icache_all()</div><div class='ctx'> #define flush_icache_user_page(vma, pg, addr, len)	\</div><div class='ctx'> do {							\</div><div class='ctx'> 	if (vma-&gt;vm_flags &amp; VM_EXEC)			\</div><div class='hunk'>@@ -78,6 +73,16 @@ void flush_icache_mm(struct mm_struct *mm, bool local);</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_SMP */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * RISC-V doesn't have an instruction to flush parts of the instruction cache,</div><div class='add'>+ * so instead we just flush the whole thing.</div><div class='add'>+ */</div><div class='add'>+#define flush_icache_range flush_icache_range</div><div class='add'>+static inline void flush_icache_range(unsigned long start, unsigned long end)</div><div class='add'>+{</div><div class='add'>+	flush_icache_all();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> extern unsigned int riscv_cbom_block_size;</div><div class='ctx'> extern unsigned int riscv_cboz_block_size;</div><div class='ctx'> void riscv_init_cbo_blocksizes(void);</div><div class='head'>diff --git a/arch/riscv/include/asm/kgdb.h b/arch/riscv/include/asm/kgdb.h<br/>index 46677daf708b..cc11c4544cff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kgdb.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kgdb.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kgdb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/kgdb.h</a></div><div class='hunk'>@@ -19,16 +19,9 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef	__ASSEMBLY__</div><div class='ctx'> </div><div class='add'>+void arch_kgdb_breakpoint(void);</div><div class='ctx'> extern unsigned long kgdb_compiled_break;</div><div class='ctx'> </div><div class='del'>-static inline void arch_kgdb_breakpoint(void)</div><div class='del'>-{</div><div class='del'>-	asm(".global kgdb_compiled_break\n"</div><div class='del'>-	    ".option norvc\n"</div><div class='del'>-	    "kgdb_compiled_break: ebreak\n"</div><div class='del'>-	    ".option rvc\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* !__ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #define DBG_REG_ZERO "zero"</div><div class='head'>diff --git a/arch/riscv/include/asm/kvm_aia.h b/arch/riscv/include/asm/kvm_aia.h<br/>index 1f37b600ca47..3b643b9efc07 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_aia.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_aia.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_aia.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/kvm_aia.h</a></div><div class='hunk'>@@ -63,9 +63,6 @@ struct kvm_vcpu_aia {</div><div class='ctx'> 	/* CPU AIA CSR context of Guest VCPU */</div><div class='ctx'> 	struct kvm_vcpu_aia_csr guest_csr;</div><div class='ctx'> </div><div class='del'>-	/* CPU AIA CSR context upon Guest VCPU reset */</div><div class='del'>-	struct kvm_vcpu_aia_csr guest_reset_csr;</div><div class='del'>-</div><div class='ctx'> 	/* Guest physical address of IMSIC for this VCPU */</div><div class='ctx'> 	gpa_t		imsic_addr;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h<br/>index 0e9c2fab6378..85cfebc32e4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_host.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -119,6 +119,9 @@ struct kvm_arch {</div><div class='ctx'> </div><div class='ctx'> 	/* AIA Guest/VM context */</div><div class='ctx'> 	struct kvm_aia aia;</div><div class='add'>+</div><div class='add'>+	/* KVM_CAP_RISCV_MP_STATE_RESET */</div><div class='add'>+	bool mp_state_reset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_cpu_trap {</div><div class='hunk'>@@ -193,6 +196,12 @@ struct kvm_vcpu_smstateen_csr {</div><div class='ctx'> 	unsigned long sstateen0;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct kvm_vcpu_reset_state {</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	unsigned long pc;</div><div class='add'>+	unsigned long a1;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct kvm_vcpu_arch {</div><div class='ctx'> 	/* VCPU ran at least once */</div><div class='ctx'> 	bool ran_atleast_once;</div><div class='hunk'>@@ -227,12 +236,8 @@ struct kvm_vcpu_arch {</div><div class='ctx'> 	/* CPU Smstateen CSR context of Guest VCPU */</div><div class='ctx'> 	struct kvm_vcpu_smstateen_csr smstateen_csr;</div><div class='ctx'> </div><div class='del'>-	/* CPU context upon Guest VCPU reset */</div><div class='del'>-	struct kvm_cpu_context guest_reset_context;</div><div class='del'>-	spinlock_t reset_cntx_lock;</div><div class='del'>-</div><div class='del'>-	/* CPU CSR context upon Guest VCPU reset */</div><div class='del'>-	struct kvm_vcpu_csr guest_reset_csr;</div><div class='add'>+	/* CPU reset state of Guest VCPU */</div><div class='add'>+	struct kvm_vcpu_reset_state reset_state;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * VCPU interrupts</div><div class='head'>diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h<br/>index 4ed6203cdd30..439ab2b3534f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_vcpu_sbi.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_vcpu_sbi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_vcpu_sbi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/kvm_vcpu_sbi.h</a></div><div class='hunk'>@@ -55,6 +55,9 @@ void kvm_riscv_vcpu_sbi_forward(struct kvm_vcpu *vcpu, struct kvm_run *run);</div><div class='ctx'> void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				     struct kvm_run *run,</div><div class='ctx'> 				     u32 type, u64 flags);</div><div class='add'>+void kvm_riscv_vcpu_sbi_request_reset(struct kvm_vcpu *vcpu,</div><div class='add'>+				      unsigned long pc, unsigned long a1);</div><div class='add'>+void kvm_riscv_vcpu_sbi_load_reset_state(struct kvm_vcpu *vcpu);</div><div class='ctx'> int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run);</div><div class='ctx'> int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				   const struct kvm_one_reg *reg);</div><div class='head'>diff --git a/arch/riscv/include/asm/kvm_vcpu_vector.h b/arch/riscv/include/asm/kvm_vcpu_vector.h<br/>index 27f5bccdd8b0..57a798a4cb0d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_vcpu_vector.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/kvm_vcpu_vector.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/kvm_vcpu_vector.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/kvm_vcpu_vector.h</a></div><div class='hunk'>@@ -33,8 +33,7 @@ void kvm_riscv_vcpu_guest_vector_restore(struct kvm_cpu_context *cntx,</div><div class='ctx'> 					 unsigned long *isa);</div><div class='ctx'> void kvm_riscv_vcpu_host_vector_save(struct kvm_cpu_context *cntx);</div><div class='ctx'> void kvm_riscv_vcpu_host_vector_restore(struct kvm_cpu_context *cntx);</div><div class='del'>-int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu,</div><div class='del'>-					struct kvm_cpu_context *cntx);</div><div class='add'>+int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu);</div><div class='ctx'> void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu);</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='hunk'>@@ -62,8 +61,7 @@ static inline void kvm_riscv_vcpu_host_vector_restore(struct kvm_cpu_context *cn</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu,</div><div class='del'>-						      struct kvm_cpu_context *cntx)</div><div class='add'>+static inline int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/riscv/include/asm/syscall.h b/arch/riscv/include/asm/syscall.h<br/>index 121fff429dce..eceabf59ae48 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/syscall.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/include/asm/syscall.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/include/asm/syscall.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/include/asm/syscall.h</a></div><div class='hunk'>@@ -62,8 +62,11 @@ static inline void syscall_get_arguments(struct task_struct *task,</div><div class='ctx'> 					 unsigned long *args)</div><div class='ctx'> {</div><div class='ctx'> 	args[0] = regs-&gt;orig_a0;</div><div class='del'>-	args++;</div><div class='del'>-	memcpy(args, &amp;regs-&gt;a1, 5 * sizeof(args[0]));</div><div class='add'>+	args[1] = regs-&gt;a1;</div><div class='add'>+	args[2] = regs-&gt;a2;</div><div class='add'>+	args[3] = regs-&gt;a3;</div><div class='add'>+	args[4] = regs-&gt;a4;</div><div class='add'>+	args[5] = regs-&gt;a5;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int syscall_get_arch(struct task_struct *task)</div><div class='head'>diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile<br/>index 8d186bfced45..f7480c9c6f8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/Makefile</a></div><div class='hunk'>@@ -9,8 +9,8 @@ CFLAGS_REMOVE_patch.o	= $(CC_FLAGS_FTRACE)</div><div class='ctx'> CFLAGS_REMOVE_sbi.o	= $(CC_FLAGS_FTRACE)</div><div class='ctx'> CFLAGS_REMOVE_return_address.o	= $(CC_FLAGS_FTRACE)</div><div class='ctx'> endif</div><div class='del'>-CFLAGS_syscall_table.o	+= $(call cc-option,-Wno-override-init,)</div><div class='del'>-CFLAGS_compat_syscall_table.o += $(call cc-option,-Wno-override-init,)</div><div class='add'>+CFLAGS_syscall_table.o	+= $(call cc-disable-warning, override-init)</div><div class='add'>+CFLAGS_compat_syscall_table.o += $(call cc-disable-warning, override-init)</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_KEXEC_CORE</div><div class='ctx'> AFLAGS_kexec_relocate.o := -mcmodel=medany $(call cc-option,-mno-relax)</div><div class='head'>diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S<br/>index 33a5a9f2a0d4..0fb338000c6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/entry.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/entry.S</a></div><div class='hunk'>@@ -319,17 +319,21 @@ SYM_CODE_END(handle_kernel_stack_overflow)</div><div class='ctx'> ASM_NOKPROBE(handle_kernel_stack_overflow)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-SYM_CODE_START(ret_from_fork)</div><div class='add'>+SYM_CODE_START(ret_from_fork_kernel_asm)</div><div class='add'>+	call schedule_tail</div><div class='add'>+	move a0, s1 /* fn_arg */</div><div class='add'>+	move a1, s0 /* fn */</div><div class='add'>+	move a2, sp /* pt_regs */</div><div class='add'>+	call ret_from_fork_kernel</div><div class='add'>+	j ret_from_exception</div><div class='add'>+SYM_CODE_END(ret_from_fork_kernel_asm)</div><div class='add'>+</div><div class='add'>+SYM_CODE_START(ret_from_fork_user_asm)</div><div class='ctx'> 	call schedule_tail</div><div class='del'>-	beqz s0, 1f	/* not from kernel thread */</div><div class='del'>-	/* Call fn(arg) */</div><div class='del'>-	move a0, s1</div><div class='del'>-	jalr s0</div><div class='del'>-1:</div><div class='ctx'> 	move a0, sp /* pt_regs */</div><div class='del'>-	call syscall_exit_to_user_mode</div><div class='add'>+	call ret_from_fork_user</div><div class='ctx'> 	j ret_from_exception</div><div class='del'>-SYM_CODE_END(ret_from_fork)</div><div class='add'>+SYM_CODE_END(ret_from_fork_user_asm)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_IRQ_STACKS</div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S<br/>index 356d5397b2a2..bdf3352acf4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/head.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/head.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/head.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/head.S</a></div><div class='hunk'>@@ -131,6 +131,12 @@ secondary_start_sbi:</div><div class='ctx'> 	csrw CSR_IE, zero</div><div class='ctx'> 	csrw CSR_IP, zero</div><div class='ctx'> </div><div class='add'>+#ifndef CONFIG_RISCV_M_MODE</div><div class='add'>+	/* Enable time CSR */</div><div class='add'>+	li t0, 0x2</div><div class='add'>+	csrw CSR_SCOUNTEREN, t0</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	/* Load the global pointer */</div><div class='ctx'> 	load_global_pointer</div><div class='ctx'> </div><div class='hunk'>@@ -226,6 +232,10 @@ SYM_CODE_START(_start_kernel)</div><div class='ctx'> 	 * to hand it to us.</div><div class='ctx'> 	 */</div><div class='ctx'> 	csrr a0, CSR_MHARTID</div><div class='add'>+#else</div><div class='add'>+	/* Enable time CSR */</div><div class='add'>+	li t0, 0x2</div><div class='add'>+	csrw CSR_SCOUNTEREN, t0</div><div class='ctx'> #endif /* CONFIG_RISCV_M_MODE */</div><div class='ctx'> </div><div class='ctx'> 	/* Load the global pointer */</div><div class='head'>diff --git a/arch/riscv/kernel/kgdb.c b/arch/riscv/kernel/kgdb.c<br/>index 2e0266ae6bd7..9f3db3503dab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/kgdb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/kgdb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/kgdb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/kgdb.c</a></div><div class='hunk'>@@ -254,6 +254,12 @@ void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)</div><div class='ctx'> 	regs-&gt;epc = pc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+noinline void arch_kgdb_breakpoint(void)</div><div class='add'>+{</div><div class='add'>+	asm(".global kgdb_compiled_break\n"</div><div class='add'>+	    "kgdb_compiled_break: ebreak\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void kgdb_arch_handle_qxfer_pkt(char *remcom_in_buffer,</div><div class='ctx'> 				char *remcom_out_buffer)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/riscv/kernel/module-sections.c b/arch/riscv/kernel/module-sections.c<br/>index e264e59e596e..91d0b355ceef 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/module-sections.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/module-sections.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/module-sections.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/module-sections.c</a></div><div class='hunk'>@@ -73,16 +73,17 @@ static bool duplicate_rela(const Elf_Rela *rela, int idx)</div><div class='ctx'> static void count_max_entries(Elf_Rela *relas, int num,</div><div class='ctx'> 			      unsigned int *plts, unsigned int *gots)</div><div class='ctx'> {</div><div class='del'>-	unsigned int type, i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num; i++) {</div><div class='del'>-		type = ELF_RISCV_R_TYPE(relas[i].r_info);</div><div class='del'>-		if (type == R_RISCV_CALL_PLT) {</div><div class='add'>+	for (int i = 0; i &lt; num; i++) {</div><div class='add'>+		switch (ELF_R_TYPE(relas[i].r_info)) {</div><div class='add'>+		case R_RISCV_CALL_PLT:</div><div class='add'>+		case R_RISCV_PLT32:</div><div class='ctx'> 			if (!duplicate_rela(relas, i))</div><div class='ctx'> 				(*plts)++;</div><div class='del'>-		} else if (type == R_RISCV_GOT_HI20) {</div><div class='add'>+			break;</div><div class='add'>+		case R_RISCV_GOT_HI20:</div><div class='ctx'> 			if (!duplicate_rela(relas, i))</div><div class='ctx'> 				(*gots)++;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c<br/>index 47d0ebeec93c..7f6147c18033 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/module.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/module.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/module.c</a></div><div class='hunk'>@@ -648,7 +648,7 @@ process_accumulated_relocations(struct module *me,</div><div class='ctx'> 		kfree(bucket_iter);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	kfree(*relocation_hashtable);</div><div class='add'>+	kvfree(*relocation_hashtable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int add_relocation_to_accumulate(struct module *me, int type,</div><div class='hunk'>@@ -752,9 +752,10 @@ initialize_relocation_hashtable(unsigned int num_relocations,</div><div class='ctx'> </div><div class='ctx'> 	hashtable_size &lt;&lt;= should_double_size;</div><div class='ctx'> </div><div class='del'>-	*relocation_hashtable = kmalloc_array(hashtable_size,</div><div class='del'>-					      sizeof(**relocation_hashtable),</div><div class='del'>-					      GFP_KERNEL);</div><div class='add'>+	/* Number of relocations may be large, so kvmalloc it */</div><div class='add'>+	*relocation_hashtable = kvmalloc_array(hashtable_size,</div><div class='add'>+					       sizeof(**relocation_hashtable),</div><div class='add'>+					       GFP_KERNEL);</div><div class='ctx'> 	if (!*relocation_hashtable)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -859,7 +860,7 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				j++;</div><div class='del'>-				if (j &gt; sechdrs[relsec].sh_size / sizeof(*rel))</div><div class='add'>+				if (j == num_relocations)</div><div class='ctx'> 					j = 0;</div><div class='ctx'> </div><div class='ctx'> 			} while (j_idx != j);</div><div class='head'>diff --git a/arch/riscv/kernel/probes/uprobes.c b/arch/riscv/kernel/probes/uprobes.c<br/>index 4b3dc8beaf77..cc15f7ca6cc1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/probes/uprobes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/probes/uprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/probes/uprobes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/probes/uprobes.c</a></div><div class='hunk'>@@ -167,6 +167,7 @@ void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,</div><div class='ctx'> 	/* Initialize the slot */</div><div class='ctx'> 	void *kaddr = kmap_atomic(page);</div><div class='ctx'> 	void *dst = kaddr + (vaddr &amp; ~PAGE_MASK);</div><div class='add'>+	unsigned long start = (unsigned long)dst;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(dst, src, len);</div><div class='ctx'> </div><div class='hunk'>@@ -176,13 +177,6 @@ void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,</div><div class='ctx'> 		*(uprobe_opcode_t *)dst = __BUG_INSN_32;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	flush_icache_range(start, start + len);</div><div class='ctx'> 	kunmap_atomic(kaddr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We probably need flush_icache_user_page() but it needs vma.</div><div class='del'>-	 * This should work on most of architectures by default. If</div><div class='del'>-	 * architecture needs to do something different it can define</div><div class='del'>-	 * its own version of the function.</div><div class='del'>-	 */</div><div class='del'>-	flush_dcache_page(page);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c<br/>index 7c244de77180..bbf7ec6a75c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/process.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/process.c</a></div><div class='hunk'>@@ -17,7 +17,9 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/personality.h&gt;</div><div class='add'>+#include &lt;linux/entry-common.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/asm-prototypes.h&gt;</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/csr.h&gt;</div><div class='hunk'>@@ -36,7 +38,8 @@ unsigned long __stack_chk_guard __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(__stack_chk_guard);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-extern asmlinkage void ret_from_fork(void);</div><div class='add'>+extern asmlinkage void ret_from_fork_kernel_asm(void);</div><div class='add'>+extern asmlinkage void ret_from_fork_user_asm(void);</div><div class='ctx'> </div><div class='ctx'> void noinstr arch_cpu_idle(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -206,6 +209,18 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+asmlinkage void ret_from_fork_kernel(void *fn_arg, int (*fn)(void *), struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	fn(fn_arg);</div><div class='add'>+</div><div class='add'>+	syscall_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+asmlinkage void ret_from_fork_user(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	syscall_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long clone_flags = args-&gt;flags;</div><div class='hunk'>@@ -228,6 +243,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> </div><div class='ctx'> 		p-&gt;thread.s[0] = (unsigned long)args-&gt;fn;</div><div class='ctx'> 		p-&gt;thread.s[1] = (unsigned long)args-&gt;fn_arg;</div><div class='add'>+		p-&gt;thread.ra = (unsigned long)ret_from_fork_kernel_asm;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		*childregs = *(current_pt_regs());</div><div class='ctx'> 		/* Turn off status.VS */</div><div class='hunk'>@@ -237,12 +253,11 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)</div><div class='ctx'> 		if (clone_flags &amp; CLONE_SETTLS)</div><div class='ctx'> 			childregs-&gt;tp = tls;</div><div class='ctx'> 		childregs-&gt;a0 = 0; /* Return value of fork() */</div><div class='del'>-		p-&gt;thread.s[0] = 0;</div><div class='add'>+		p-&gt;thread.ra = (unsigned long)ret_from_fork_user_asm;</div><div class='ctx'> 	}</div><div class='ctx'> 	p-&gt;thread.riscv_v_flags = 0;</div><div class='ctx'> 	if (has_vector() || has_xtheadvector())</div><div class='ctx'> 		riscv_v_thread_alloc(p);</div><div class='del'>-	p-&gt;thread.ra = (unsigned long)ret_from_fork;</div><div class='ctx'> 	p-&gt;thread.sp = (unsigned long)childregs; /* kernel sp */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -275,6 +290,9 @@ long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg)</div><div class='ctx'> 	unsigned long pmm;</div><div class='ctx'> 	u8 pmlen;</div><div class='ctx'> </div><div class='add'>+	if (!riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (is_compat_thread(ti))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -330,6 +348,9 @@ long get_tagged_addr_ctrl(struct task_struct *task)</div><div class='ctx'> 	struct thread_info *ti = task_thread_info(task);</div><div class='ctx'> 	long ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (!riscv_has_extension_unlikely(RISCV_ISA_EXT_SUPM))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (is_compat_thread(ti))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c<br/>index c174544eefc8..f7c9a1caa83e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/setup.c</a></div><div class='hunk'>@@ -66,6 +66,9 @@ static struct resource bss_res = { .name = "Kernel bss", };</div><div class='ctx'> static struct resource elfcorehdr_res = { .name = "ELF Core hdr", };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static int num_standard_resources;</div><div class='add'>+static struct resource *standard_resources;</div><div class='add'>+</div><div class='ctx'> static int __init add_resource(struct resource *parent,</div><div class='ctx'> 				struct resource *res)</div><div class='ctx'> {</div><div class='hunk'>@@ -139,7 +142,7 @@ static void __init init_resources(void)</div><div class='ctx'> 	struct resource *res = NULL;</div><div class='ctx'> 	struct resource *mem_res = NULL;</div><div class='ctx'> 	size_t mem_res_sz = 0;</div><div class='del'>-	int num_resources = 0, res_idx = 0;</div><div class='add'>+	int num_resources = 0, res_idx = 0, non_resv_res = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* + 1 as memblock_alloc() might increase memblock.reserved.cnt */</div><div class='hunk'>@@ -193,6 +196,7 @@ static void __init init_resources(void)</div><div class='ctx'> 	/* Add /memory regions to the resource tree */</div><div class='ctx'> 	for_each_mem_region(region) {</div><div class='ctx'> 		res = &amp;mem_res[res_idx--];</div><div class='add'>+		non_resv_res++;</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(memblock_is_nomap(region))) {</div><div class='ctx'> 			res-&gt;name = "Reserved";</div><div class='hunk'>@@ -210,6 +214,9 @@ static void __init init_resources(void)</div><div class='ctx'> 			goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	num_standard_resources = non_resv_res;</div><div class='add'>+	standard_resources = &amp;mem_res[res_idx + 1];</div><div class='add'>+</div><div class='ctx'> 	/* Clean-up any unused pre-allocated resources */</div><div class='ctx'> 	if (res_idx &gt;= 0)</div><div class='ctx'> 		memblock_free(mem_res, (res_idx + 1) * sizeof(*mem_res));</div><div class='hunk'>@@ -221,6 +228,33 @@ static void __init init_resources(void)</div><div class='ctx'> 	memblock_free(mem_res, mem_res_sz);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __init reserve_memblock_reserved_regions(void)</div><div class='add'>+{</div><div class='add'>+	u64 i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_standard_resources; i++) {</div><div class='add'>+		struct resource *mem = &amp;standard_resources[i];</div><div class='add'>+		phys_addr_t r_start, r_end, mem_size = resource_size(mem);</div><div class='add'>+</div><div class='add'>+		if (!memblock_is_region_reserved(mem-&gt;start, mem_size))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for_each_reserved_mem_range(j, &amp;r_start, &amp;r_end) {</div><div class='add'>+			resource_size_t start, end;</div><div class='add'>+</div><div class='add'>+			start = max(PFN_PHYS(PFN_DOWN(r_start)), mem-&gt;start);</div><div class='add'>+			end = min(PFN_PHYS(PFN_UP(r_end)) - 1, mem-&gt;end);</div><div class='add'>+</div><div class='add'>+			if (start &gt; mem-&gt;end || end &lt; mem-&gt;start)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			reserve_region_with_split(mem, start, end, "Reserved");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+arch_initcall(reserve_memblock_reserved_regions);</div><div class='ctx'> </div><div class='ctx'> static void __init parse_dtb(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c<br/>index 8ff8e8b36524..9c83848797a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/traps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/traps.c</a></div><div class='hunk'>@@ -198,47 +198,57 @@ asmlinkage __visible __trap_section void do_trap_insn_illegal(struct pt_regs *re</div><div class='ctx'> DO_ERROR_INFO(do_trap_load_fault,</div><div class='ctx'> 	SIGSEGV, SEGV_ACCERR, "load access fault");</div><div class='ctx'> </div><div class='del'>-asmlinkage __visible __trap_section void do_trap_load_misaligned(struct pt_regs *regs)</div><div class='add'>+enum misaligned_access_type {</div><div class='add'>+	MISALIGNED_STORE,</div><div class='add'>+	MISALIGNED_LOAD,</div><div class='add'>+};</div><div class='add'>+static const struct {</div><div class='add'>+	const char *type_str;</div><div class='add'>+	int (*handler)(struct pt_regs *regs);</div><div class='add'>+} misaligned_handler[] = {</div><div class='add'>+	[MISALIGNED_STORE] = {</div><div class='add'>+		.type_str = "Oops - store (or AMO) address misaligned",</div><div class='add'>+		.handler = handle_misaligned_store,</div><div class='add'>+	},</div><div class='add'>+	[MISALIGNED_LOAD] = {</div><div class='add'>+		.type_str = "Oops - load address misaligned",</div><div class='add'>+		.handler = handle_misaligned_load,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void do_trap_misaligned(struct pt_regs *regs, enum misaligned_access_type type)</div><div class='ctx'> {</div><div class='add'>+	irqentry_state_t state;</div><div class='add'>+</div><div class='ctx'> 	if (user_mode(regs)) {</div><div class='ctx'> 		irqentry_enter_from_user_mode(regs);</div><div class='add'>+		local_irq_enable();</div><div class='add'>+	} else {</div><div class='add'>+		state = irqentry_nmi_enter(regs);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (handle_misaligned_load(regs))</div><div class='del'>-			do_trap_error(regs, SIGBUS, BUS_ADRALN, regs-&gt;epc,</div><div class='del'>-			      "Oops - load address misaligned");</div><div class='add'>+	if (misaligned_handler[type].handler(regs))</div><div class='add'>+		do_trap_error(regs, SIGBUS, BUS_ADRALN, regs-&gt;epc,</div><div class='add'>+			      misaligned_handler[type].type_str);</div><div class='ctx'> </div><div class='add'>+	if (user_mode(regs)) {</div><div class='add'>+		local_irq_disable();</div><div class='ctx'> 		irqentry_exit_to_user_mode(regs);</div><div class='ctx'> 	} else {</div><div class='del'>-		irqentry_state_t state = irqentry_nmi_enter(regs);</div><div class='del'>-</div><div class='del'>-		if (handle_misaligned_load(regs))</div><div class='del'>-			do_trap_error(regs, SIGBUS, BUS_ADRALN, regs-&gt;epc,</div><div class='del'>-			      "Oops - load address misaligned");</div><div class='del'>-</div><div class='ctx'> 		irqentry_nmi_exit(regs, state);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-asmlinkage __visible __trap_section void do_trap_store_misaligned(struct pt_regs *regs)</div><div class='add'>+asmlinkage __visible __trap_section void do_trap_load_misaligned(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	if (user_mode(regs)) {</div><div class='del'>-		irqentry_enter_from_user_mode(regs);</div><div class='del'>-</div><div class='del'>-		if (handle_misaligned_store(regs))</div><div class='del'>-			do_trap_error(regs, SIGBUS, BUS_ADRALN, regs-&gt;epc,</div><div class='del'>-				"Oops - store (or AMO) address misaligned");</div><div class='del'>-</div><div class='del'>-		irqentry_exit_to_user_mode(regs);</div><div class='del'>-	} else {</div><div class='del'>-		irqentry_state_t state = irqentry_nmi_enter(regs);</div><div class='del'>-</div><div class='del'>-		if (handle_misaligned_store(regs))</div><div class='del'>-			do_trap_error(regs, SIGBUS, BUS_ADRALN, regs-&gt;epc,</div><div class='del'>-				"Oops - store (or AMO) address misaligned");</div><div class='add'>+	do_trap_misaligned(regs, MISALIGNED_LOAD);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		irqentry_nmi_exit(regs, state);</div><div class='del'>-	}</div><div class='add'>+asmlinkage __visible __trap_section void do_trap_store_misaligned(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	do_trap_misaligned(regs, MISALIGNED_STORE);</div><div class='ctx'> }</div><div class='add'>+</div><div class='ctx'> DO_ERROR_INFO(do_trap_store_fault,</div><div class='ctx'> 	SIGSEGV, SEGV_ACCERR, "store (or AMO) access fault");</div><div class='ctx'> DO_ERROR_INFO(do_trap_ecall_s,</div><div class='head'>diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c<br/>index 4354c87c0376..77c788660223 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/traps_misaligned.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/traps_misaligned.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/traps_misaligned.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/traps_misaligned.c</a></div><div class='hunk'>@@ -88,6 +88,13 @@</div><div class='ctx'> #define INSN_MATCH_C_FSWSP		0xe002</div><div class='ctx'> #define INSN_MASK_C_FSWSP		0xe003</div><div class='ctx'> </div><div class='add'>+#define INSN_MATCH_C_LHU		0x8400</div><div class='add'>+#define INSN_MASK_C_LHU			0xfc43</div><div class='add'>+#define INSN_MATCH_C_LH			0x8440</div><div class='add'>+#define INSN_MASK_C_LH			0xfc43</div><div class='add'>+#define INSN_MATCH_C_SH			0x8c00</div><div class='add'>+#define INSN_MASK_C_SH			0xfc43</div><div class='add'>+</div><div class='ctx'> #define INSN_LEN(insn)			((((insn) &amp; 0x3) &lt; 0x3) ? 2 : 4)</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_64BIT)</div><div class='hunk'>@@ -268,7 +275,7 @@ static unsigned long get_f32_rs(unsigned long insn, u8 fp_reg_offset,</div><div class='ctx'> 	int __ret;					\</div><div class='ctx'> 							\</div><div class='ctx'> 	if (user_mode(regs)) {				\</div><div class='del'>-		__ret = __get_user(insn, (type __user *) insn_addr); \</div><div class='add'>+		__ret = get_user(insn, (type __user *) insn_addr); \</div><div class='ctx'> 	} else {					\</div><div class='ctx'> 		insn = *(type *)insn_addr;		\</div><div class='ctx'> 		__ret = 0;				\</div><div class='hunk'>@@ -431,6 +438,13 @@ static int handle_scalar_misaligned_load(struct pt_regs *regs)</div><div class='ctx'> 		fp = 1;</div><div class='ctx'> 		len = 4;</div><div class='ctx'> #endif</div><div class='add'>+	} else if ((insn &amp; INSN_MASK_C_LHU) == INSN_MATCH_C_LHU) {</div><div class='add'>+		len = 2;</div><div class='add'>+		insn = RVC_RS2S(insn) &lt;&lt; SH_RD;</div><div class='add'>+	} else if ((insn &amp; INSN_MASK_C_LH) == INSN_MATCH_C_LH) {</div><div class='add'>+		len = 2;</div><div class='add'>+		shift = 8 * (sizeof(ulong) - len);</div><div class='add'>+		insn = RVC_RS2S(insn) &lt;&lt; SH_RD;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		regs-&gt;epc = epc;</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -530,6 +544,9 @@ static int handle_scalar_misaligned_store(struct pt_regs *regs)</div><div class='ctx'> 		len = 4;</div><div class='ctx'> 		val.data_ulong = GET_F32_RS2C(insn, regs);</div><div class='ctx'> #endif</div><div class='add'>+	} else if ((insn &amp; INSN_MASK_C_SH) == INSN_MATCH_C_SH) {</div><div class='add'>+		len = 2;</div><div class='add'>+		val.data_ulong = GET_RS2S(insn, regs);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		regs-&gt;epc = epc;</div><div class='ctx'> 		return -1;</div><div class='head'>diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c<br/>index 585d2dcf2dab..b8ba13819d05 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kernel/unaligned_access_speed.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kernel/unaligned_access_speed.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kernel/unaligned_access_speed.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kernel/unaligned_access_speed.c</a></div><div class='hunk'>@@ -439,29 +439,36 @@ static int __init check_unaligned_access_all_cpus(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	if (unaligned_scalar_speed_param == RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN &amp;&amp;</div><div class='del'>-	    !check_unaligned_access_emulated_all_cpus()) {</div><div class='del'>-		check_unaligned_access_speed_all_cpus();</div><div class='del'>-	} else {</div><div class='del'>-		pr_info("scalar unaligned access speed set to '%s' by command line\n",</div><div class='del'>-			speed_str[unaligned_scalar_speed_param]);</div><div class='add'>+	if (unaligned_scalar_speed_param != RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN) {</div><div class='add'>+		pr_info("scalar unaligned access speed set to '%s' (%lu) by command line\n",</div><div class='add'>+			speed_str[unaligned_scalar_speed_param], unaligned_scalar_speed_param);</div><div class='ctx'> 		for_each_online_cpu(cpu)</div><div class='ctx'> 			per_cpu(misaligned_access_speed, cpu) = unaligned_scalar_speed_param;</div><div class='add'>+	} else if (!check_unaligned_access_emulated_all_cpus()) {</div><div class='add'>+		check_unaligned_access_speed_all_cpus();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unaligned_vector_speed_param != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) {</div><div class='add'>+		if (!has_vector() &amp;&amp;</div><div class='add'>+		    unaligned_vector_speed_param != RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED) {</div><div class='add'>+			pr_warn("vector support is not available, ignoring unaligned_vector_speed=%s\n",</div><div class='add'>+				speed_str[unaligned_vector_speed_param]);</div><div class='add'>+		} else {</div><div class='add'>+			pr_info("vector unaligned access speed set to '%s' (%lu) by command line\n",</div><div class='add'>+				speed_str[unaligned_vector_speed_param], unaligned_vector_speed_param);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!has_vector())</div><div class='ctx'> 		unaligned_vector_speed_param = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED;</div><div class='ctx'> </div><div class='del'>-	if (unaligned_vector_speed_param == RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN &amp;&amp;</div><div class='del'>-	    !check_vector_unaligned_access_emulated_all_cpus() &amp;&amp;</div><div class='del'>-	    IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) {</div><div class='del'>-		kthread_run(vec_check_unaligned_access_speed_all_cpus,</div><div class='del'>-			    NULL, "vec_check_unaligned_access_speed_all_cpus");</div><div class='del'>-	} else {</div><div class='del'>-		pr_info("vector unaligned access speed set to '%s' by command line\n",</div><div class='del'>-			speed_str[unaligned_vector_speed_param]);</div><div class='add'>+	if (unaligned_vector_speed_param != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN) {</div><div class='ctx'> 		for_each_online_cpu(cpu)</div><div class='ctx'> 			per_cpu(vector_misaligned_access, cpu) = unaligned_vector_speed_param;</div><div class='add'>+	} else if (!check_vector_unaligned_access_emulated_all_cpus() &amp;&amp;</div><div class='add'>+		   IS_ENABLED(CONFIG_RISCV_PROBE_VECTOR_UNALIGNED_ACCESS)) {</div><div class='add'>+		kthread_run(vec_check_unaligned_access_speed_all_cpus,</div><div class='add'>+			    NULL, "vec_check_unaligned_access_speed_all_cpus");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig<br/>index 0c3cbb0915ff..704c2899197e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/Kconfig</a></div><div class='hunk'>@@ -18,7 +18,7 @@ menuconfig VIRTUALIZATION</div><div class='ctx'> if VIRTUALIZATION</div><div class='ctx'> </div><div class='ctx'> config KVM</div><div class='del'>-	tristate "Kernel-based Virtual Machine (KVM) support (EXPERIMENTAL)"</div><div class='add'>+	tristate "Kernel-based Virtual Machine (KVM) support"</div><div class='ctx'> 	depends on RISCV_SBI &amp;&amp; MMU</div><div class='ctx'> 	select HAVE_KVM_IRQCHIP</div><div class='ctx'> 	select HAVE_KVM_IRQ_ROUTING</div><div class='head'>diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c<br/>index 39cd26af5a69..43e472ff3e1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/aia_device.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/aia_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/aia_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/aia_device.c</a></div><div class='hunk'>@@ -526,12 +526,10 @@ int kvm_riscv_vcpu_aia_update(struct kvm_vcpu *vcpu)</div><div class='ctx'> void kvm_riscv_vcpu_aia_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu_aia_csr *csr = &amp;vcpu-&gt;arch.aia_context.guest_csr;</div><div class='del'>-	struct kvm_vcpu_aia_csr *reset_csr =</div><div class='del'>-				&amp;vcpu-&gt;arch.aia_context.guest_reset_csr;</div><div class='ctx'> </div><div class='ctx'> 	if (!kvm_riscv_aia_available())</div><div class='ctx'> 		return;</div><div class='del'>-	memcpy(csr, reset_csr, sizeof(*csr));</div><div class='add'>+	memset(csr, 0, sizeof(*csr));</div><div class='ctx'> </div><div class='ctx'> 	/* Proceed only if AIA was initialized successfully */</div><div class='ctx'> 	if (!kvm_riscv_aia_initialized(vcpu-&gt;kvm))</div><div class='head'>diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c<br/>index 60d684c76c58..e0a01af426ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/vcpu.c</a></div><div class='hunk'>@@ -51,12 +51,33 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {</div><div class='ctx'> 		       sizeof(kvm_vcpu_stats_desc),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)</div><div class='add'>+static void kvm_riscv_vcpu_context_reset(struct kvm_vcpu *vcpu,</div><div class='add'>+					 bool kvm_sbi_reset)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_vcpu_csr *csr = &amp;vcpu-&gt;arch.guest_csr;</div><div class='del'>-	struct kvm_vcpu_csr *reset_csr = &amp;vcpu-&gt;arch.guest_reset_csr;</div><div class='ctx'> 	struct kvm_cpu_context *cntx = &amp;vcpu-&gt;arch.guest_context;</div><div class='del'>-	struct kvm_cpu_context *reset_cntx = &amp;vcpu-&gt;arch.guest_reset_context;</div><div class='add'>+	void *vector_datap = cntx-&gt;vector.datap;</div><div class='add'>+</div><div class='add'>+	memset(cntx, 0, sizeof(*cntx));</div><div class='add'>+	memset(csr, 0, sizeof(*csr));</div><div class='add'>+	memset(&amp;vcpu-&gt;arch.smstateen_csr, 0, sizeof(vcpu-&gt;arch.smstateen_csr));</div><div class='add'>+</div><div class='add'>+	/* Restore datap as it's not a part of the guest context. */</div><div class='add'>+	cntx-&gt;vector.datap = vector_datap;</div><div class='add'>+</div><div class='add'>+	if (kvm_sbi_reset)</div><div class='add'>+		kvm_riscv_vcpu_sbi_load_reset_state(vcpu);</div><div class='add'>+</div><div class='add'>+	/* Setup reset state of shadow SSTATUS and HSTATUS CSRs */</div><div class='add'>+	cntx-&gt;sstatus = SR_SPP | SR_SPIE;</div><div class='add'>+</div><div class='add'>+	cntx-&gt;hstatus |= HSTATUS_VTW;</div><div class='add'>+	cntx-&gt;hstatus |= HSTATUS_SPVP;</div><div class='add'>+	cntx-&gt;hstatus |= HSTATUS_SPV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu, bool kvm_sbi_reset)</div><div class='add'>+{</div><div class='ctx'> 	bool loaded;</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='hunk'>@@ -71,11 +92,7 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.last_exit_cpu = -1;</div><div class='ctx'> </div><div class='del'>-	memcpy(csr, reset_csr, sizeof(*csr));</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;vcpu-&gt;arch.reset_cntx_lock);</div><div class='del'>-	memcpy(cntx, reset_cntx, sizeof(*cntx));</div><div class='del'>-	spin_unlock(&amp;vcpu-&gt;arch.reset_cntx_lock);</div><div class='add'>+	kvm_riscv_vcpu_context_reset(vcpu, kvm_sbi_reset);</div><div class='ctx'> </div><div class='ctx'> 	kvm_riscv_vcpu_fp_reset(vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -110,8 +127,6 @@ int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)</div><div class='ctx'> int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='del'>-	struct kvm_cpu_context *cntx;</div><div class='del'>-	struct kvm_vcpu_csr *reset_csr = &amp;vcpu-&gt;arch.guest_reset_csr;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;vcpu-&gt;arch.mp_state_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -131,24 +146,11 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	/* Setup VCPU hfence queue */</div><div class='ctx'> 	spin_lock_init(&amp;vcpu-&gt;arch.hfence_lock);</div><div class='ctx'> </div><div class='del'>-	/* Setup reset state of shadow SSTATUS and HSTATUS CSRs */</div><div class='del'>-	spin_lock_init(&amp;vcpu-&gt;arch.reset_cntx_lock);</div><div class='add'>+	spin_lock_init(&amp;vcpu-&gt;arch.reset_state.lock);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;vcpu-&gt;arch.reset_cntx_lock);</div><div class='del'>-	cntx = &amp;vcpu-&gt;arch.guest_reset_context;</div><div class='del'>-	cntx-&gt;sstatus = SR_SPP | SR_SPIE;</div><div class='del'>-	cntx-&gt;hstatus = 0;</div><div class='del'>-	cntx-&gt;hstatus |= HSTATUS_VTW;</div><div class='del'>-	cntx-&gt;hstatus |= HSTATUS_SPVP;</div><div class='del'>-	cntx-&gt;hstatus |= HSTATUS_SPV;</div><div class='del'>-	spin_unlock(&amp;vcpu-&gt;arch.reset_cntx_lock);</div><div class='del'>-</div><div class='del'>-	if (kvm_riscv_vcpu_alloc_vector_context(vcpu, cntx))</div><div class='add'>+	if (kvm_riscv_vcpu_alloc_vector_context(vcpu))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* By default, make CY, TM, and IR counters accessible in VU mode */</div><div class='del'>-	reset_csr-&gt;scounteren = 0x7;</div><div class='del'>-</div><div class='ctx'> 	/* Setup VCPU timer */</div><div class='ctx'> 	kvm_riscv_vcpu_timer_init(vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -167,7 +169,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_riscv_vcpu_sbi_init(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset VCPU */</div><div class='del'>-	kvm_riscv_reset_vcpu(vcpu);</div><div class='add'>+	kvm_riscv_reset_vcpu(vcpu, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -516,6 +518,12 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	case KVM_MP_STATE_STOPPED:</div><div class='ctx'> 		__kvm_riscv_vcpu_power_off(vcpu);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_MP_STATE_INIT_RECEIVED:</div><div class='add'>+		if (vcpu-&gt;kvm-&gt;arch.mp_state_reset)</div><div class='add'>+			kvm_riscv_reset_vcpu(vcpu, false);</div><div class='add'>+		else</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -704,7 +712,7 @@ static void kvm_riscv_check_vcpu_requests(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu))</div><div class='del'>-			kvm_riscv_reset_vcpu(vcpu);</div><div class='add'>+			kvm_riscv_reset_vcpu(vcpu, true);</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_check_request(KVM_REQ_UPDATE_HGATP, vcpu))</div><div class='ctx'> 			kvm_riscv_gstage_update_hgatp(vcpu);</div><div class='head'>diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c<br/>index d1c83a77735e..6e09b518a5d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_sbi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_sbi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_sbi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/vcpu_sbi.c</a></div><div class='hunk'>@@ -143,9 +143,9 @@ void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	struct kvm_vcpu *tmp;</div><div class='ctx'> </div><div class='ctx'> 	kvm_for_each_vcpu(i, tmp, vcpu-&gt;kvm) {</div><div class='del'>-		spin_lock(&amp;vcpu-&gt;arch.mp_state_lock);</div><div class='add'>+		spin_lock(&amp;tmp-&gt;arch.mp_state_lock);</div><div class='ctx'> 		WRITE_ONCE(tmp-&gt;arch.mp_state.mp_state, KVM_MP_STATE_STOPPED);</div><div class='del'>-		spin_unlock(&amp;vcpu-&gt;arch.mp_state_lock);</div><div class='add'>+		spin_unlock(&amp;tmp-&gt;arch.mp_state_lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	kvm_make_all_cpus_request(vcpu-&gt;kvm, KVM_REQ_SLEEP);</div><div class='ctx'> </div><div class='hunk'>@@ -156,6 +156,34 @@ void kvm_riscv_vcpu_sbi_system_reset(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	run-&gt;exit_reason = KVM_EXIT_SYSTEM_EVENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kvm_riscv_vcpu_sbi_request_reset(struct kvm_vcpu *vcpu,</div><div class='add'>+				      unsigned long pc, unsigned long a1)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.reset_state.lock);</div><div class='add'>+	vcpu-&gt;arch.reset_state.pc = pc;</div><div class='add'>+	vcpu-&gt;arch.reset_state.a1 = a1;</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.reset_state.lock);</div><div class='add'>+</div><div class='add'>+	kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvm_riscv_vcpu_sbi_load_reset_state(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu_csr *csr = &amp;vcpu-&gt;arch.guest_csr;</div><div class='add'>+	struct kvm_cpu_context *cntx = &amp;vcpu-&gt;arch.guest_context;</div><div class='add'>+	struct kvm_vcpu_reset_state *reset_state = &amp;vcpu-&gt;arch.reset_state;</div><div class='add'>+</div><div class='add'>+	cntx-&gt;a0 = vcpu-&gt;vcpu_id;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;vcpu-&gt;arch.reset_state.lock);</div><div class='add'>+	cntx-&gt;sepc = reset_state-&gt;pc;</div><div class='add'>+	cntx-&gt;a1 = reset_state-&gt;a1;</div><div class='add'>+	spin_unlock(&amp;vcpu-&gt;arch.reset_state.lock);</div><div class='add'>+</div><div class='add'>+	cntx-&gt;sstatus &amp;= ~SR_SIE;</div><div class='add'>+	csr-&gt;vsatp = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_riscv_vcpu_sbi_return(struct kvm_vcpu *vcpu, struct kvm_run *run)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_cpu_context *cp = &amp;vcpu-&gt;arch.guest_context;</div><div class='head'>diff --git a/arch/riscv/kvm/vcpu_sbi_hsm.c b/arch/riscv/kvm/vcpu_sbi_hsm.c<br/>index 3070bb31745d..f26207f84bab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_sbi_hsm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_sbi_hsm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_sbi_hsm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/vcpu_sbi_hsm.c</a></div><div class='hunk'>@@ -15,7 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> static int kvm_sbi_hsm_vcpu_start(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_cpu_context *reset_cntx;</div><div class='ctx'> 	struct kvm_cpu_context *cp = &amp;vcpu-&gt;arch.guest_context;</div><div class='ctx'> 	struct kvm_vcpu *target_vcpu;</div><div class='ctx'> 	unsigned long target_vcpuid = cp-&gt;a0;</div><div class='hunk'>@@ -32,17 +31,7 @@ static int kvm_sbi_hsm_vcpu_start(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;target_vcpu-&gt;arch.reset_cntx_lock);</div><div class='del'>-	reset_cntx = &amp;target_vcpu-&gt;arch.guest_reset_context;</div><div class='del'>-	/* start address */</div><div class='del'>-	reset_cntx-&gt;sepc = cp-&gt;a1;</div><div class='del'>-	/* target vcpu id to start */</div><div class='del'>-	reset_cntx-&gt;a0 = target_vcpuid;</div><div class='del'>-	/* private data passed from kernel */</div><div class='del'>-	reset_cntx-&gt;a1 = cp-&gt;a2;</div><div class='del'>-	spin_unlock(&amp;target_vcpu-&gt;arch.reset_cntx_lock);</div><div class='del'>-</div><div class='del'>-	kvm_make_request(KVM_REQ_VCPU_RESET, target_vcpu);</div><div class='add'>+	kvm_riscv_vcpu_sbi_request_reset(target_vcpu, cp-&gt;a1, cp-&gt;a2);</div><div class='ctx'> </div><div class='ctx'> 	__kvm_riscv_vcpu_power_on(target_vcpu);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/riscv/kvm/vcpu_sbi_system.c b/arch/riscv/kvm/vcpu_sbi_system.c<br/>index bc0ebba89003..359be90b0fc5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_sbi_system.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_sbi_system.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_sbi_system.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/vcpu_sbi_system.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@ static int kvm_sbi_ext_susp_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,</div><div class='ctx'> 				    struct kvm_vcpu_sbi_return *retdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_cpu_context *cp = &amp;vcpu-&gt;arch.guest_context;</div><div class='del'>-	struct kvm_cpu_context *reset_cntx;</div><div class='ctx'> 	unsigned long funcid = cp-&gt;a6;</div><div class='ctx'> 	unsigned long hva, i;</div><div class='ctx'> 	struct kvm_vcpu *tmp;</div><div class='hunk'>@@ -45,14 +44,7 @@ static int kvm_sbi_ext_susp_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		spin_lock(&amp;vcpu-&gt;arch.reset_cntx_lock);</div><div class='del'>-		reset_cntx = &amp;vcpu-&gt;arch.guest_reset_context;</div><div class='del'>-		reset_cntx-&gt;sepc = cp-&gt;a1;</div><div class='del'>-		reset_cntx-&gt;a0 = vcpu-&gt;vcpu_id;</div><div class='del'>-		reset_cntx-&gt;a1 = cp-&gt;a2;</div><div class='del'>-		spin_unlock(&amp;vcpu-&gt;arch.reset_cntx_lock);</div><div class='del'>-</div><div class='del'>-		kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);</div><div class='add'>+		kvm_riscv_vcpu_sbi_request_reset(vcpu, cp-&gt;a1, cp-&gt;a2);</div><div class='ctx'> </div><div class='ctx'> 		/* userspace provides the suspend implementation */</div><div class='ctx'> 		kvm_riscv_vcpu_sbi_forward(vcpu, run);</div><div class='head'>diff --git a/arch/riscv/kvm/vcpu_vector.c b/arch/riscv/kvm/vcpu_vector.c<br/>index d92d1348045c..a5f88cb717f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_vector.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vcpu_vector.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vcpu_vector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/vcpu_vector.c</a></div><div class='hunk'>@@ -22,6 +22,9 @@ void kvm_riscv_vcpu_vector_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_cpu_context *cntx = &amp;vcpu-&gt;arch.guest_context;</div><div class='ctx'> </div><div class='ctx'> 	cntx-&gt;sstatus &amp;= ~SR_VS;</div><div class='add'>+</div><div class='add'>+	cntx-&gt;vector.vlenb = riscv_v_vsize / 32;</div><div class='add'>+</div><div class='ctx'> 	if (riscv_isa_extension_available(isa, v)) {</div><div class='ctx'> 		cntx-&gt;sstatus |= SR_VS_INITIAL;</div><div class='ctx'> 		WARN_ON(!cntx-&gt;vector.datap);</div><div class='hunk'>@@ -70,13 +73,11 @@ void kvm_riscv_vcpu_host_vector_restore(struct kvm_cpu_context *cntx)</div><div class='ctx'> 		__kvm_riscv_vector_restore(cntx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu,</div><div class='del'>-					struct kvm_cpu_context *cntx)</div><div class='add'>+int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	cntx-&gt;vector.datap = kmalloc(riscv_v_vsize, GFP_KERNEL);</div><div class='del'>-	if (!cntx-&gt;vector.datap)</div><div class='add'>+	vcpu-&gt;arch.guest_context.vector.datap = kzalloc(riscv_v_vsize, GFP_KERNEL);</div><div class='add'>+	if (!vcpu-&gt;arch.guest_context.vector.datap)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	cntx-&gt;vector.vlenb = riscv_v_vsize / 32;</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;arch.host_context.vector.datap = kzalloc(riscv_v_vsize, GFP_KERNEL);</div><div class='ctx'> 	if (!vcpu-&gt;arch.host_context.vector.datap)</div><div class='hunk'>@@ -87,7 +88,7 @@ int kvm_riscv_vcpu_alloc_vector_context(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> void kvm_riscv_vcpu_free_vector_context(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	kfree(vcpu-&gt;arch.guest_reset_context.vector.datap);</div><div class='add'>+	kfree(vcpu-&gt;arch.guest_context.vector.datap);</div><div class='ctx'> 	kfree(vcpu-&gt;arch.host_context.vector.datap);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/riscv/kvm/vm.c b/arch/riscv/kvm/vm.c<br/>index 7396b8654f45..b27ec8f96697 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/kvm/vm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/kvm/vm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/kvm/vm.c</a></div><div class='hunk'>@@ -209,6 +209,19 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int kvm_vm_ioctl_enable_cap(struct kvm *kvm, struct kvm_enable_cap *cap)</div><div class='add'>+{</div><div class='add'>+	switch (cap-&gt;cap) {</div><div class='add'>+	case KVM_CAP_RISCV_MP_STATE_RESET:</div><div class='add'>+		if (cap-&gt;flags)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		kvm-&gt;arch.mp_state_reset = true;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)</div><div class='ctx'> {</div><div class='ctx'> 	return -EINVAL;</div><div class='head'>diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile<br/>index b1c46153606a..0baec92d2f55 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/lib/Makefile</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-y			+= crypto/</div><div class='ctx'> lib-y			+= delay.o</div><div class='ctx'> lib-y			+= memcpy.o</div><div class='ctx'> lib-y			+= memset.o</div><div class='head'>diff --git a/arch/riscv/lib/crypto/Kconfig b/arch/riscv/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..47c99ea97ce2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_CHACHA_RISCV64</div><div class='add'>+	tristate</div><div class='add'>+	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='add'>+	default CRYPTO_LIB_CHACHA</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='add'>+	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='add'>+</div><div class='add'>+config CRYPTO_SHA256_RISCV64</div><div class='add'>+	tristate</div><div class='add'>+	depends on 64BIT &amp;&amp; RISCV_ISA_V &amp;&amp; TOOLCHAIN_HAS_VECTOR_CRYPTO</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256_SIMD</div><div class='add'>+	select CRYPTO_LIB_SHA256_GENERIC</div><div class='head'>diff --git a/arch/riscv/lib/crypto/Makefile b/arch/riscv/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..b7cb877a2c07<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA_RISCV64) += chacha-riscv64.o</div><div class='add'>+chacha-riscv64-y := chacha-riscv64-glue.o chacha-riscv64-zvkb.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256_RISCV64) += sha256-riscv64.o</div><div class='add'>+sha256-riscv64-y := sha256.o sha256-riscv64-zvknha_or_zvknhb-zvkb.o</div><div class='head'>diff --git a/arch/riscv/lib/crypto/chacha-riscv64-glue.c b/arch/riscv/lib/crypto/chacha-riscv64-glue.c<br/>new file mode 100644<br/>index 000000000000..8c3f11d79be3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/lib/crypto/chacha-riscv64-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/lib/crypto/chacha-riscv64-glue.c</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * ChaCha stream cipher (RISC-V optimized)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 SiFive, Inc.</div><div class='add'>+ * Author: Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;asm/vector.h&gt;</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;crypto/internal/simd.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(use_zvkb);</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_zvkb(struct chacha_state *state, const u8 *in, u8 *out,</div><div class='add'>+			    size_t nblocks, int nrounds);</div><div class='add'>+</div><div class='add'>+void hchacha_block_arch(const struct chacha_state *state,</div><div class='add'>+			u32 out[HCHACHA_OUT_WORDS], int nrounds)</div><div class='add'>+{</div><div class='add'>+	hchacha_block_generic(state, out, nrounds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hchacha_block_arch);</div><div class='add'>+</div><div class='add'>+void chacha_crypt_arch(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+		       unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	u8 block_buffer[CHACHA_BLOCK_SIZE];</div><div class='add'>+	unsigned int full_blocks = bytes / CHACHA_BLOCK_SIZE;</div><div class='add'>+	unsigned int tail_bytes = bytes % CHACHA_BLOCK_SIZE;</div><div class='add'>+</div><div class='add'>+	if (!static_branch_likely(&amp;use_zvkb) || !crypto_simd_usable())</div><div class='add'>+		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='add'>+</div><div class='add'>+	kernel_vector_begin();</div><div class='add'>+	if (full_blocks) {</div><div class='add'>+		chacha_zvkb(state, src, dst, full_blocks, nrounds);</div><div class='add'>+		src += full_blocks * CHACHA_BLOCK_SIZE;</div><div class='add'>+		dst += full_blocks * CHACHA_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+	if (tail_bytes) {</div><div class='add'>+		memcpy(block_buffer, src, tail_bytes);</div><div class='add'>+		chacha_zvkb(state, block_buffer, block_buffer, 1, nrounds);</div><div class='add'>+		memcpy(dst, block_buffer, tail_bytes);</div><div class='add'>+	}</div><div class='add'>+	kernel_vector_end();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='add'>+</div><div class='add'>+bool chacha_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;use_zvkb);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init riscv64_chacha_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (riscv_isa_extension_available(NULL, ZVKB) &amp;&amp;</div><div class='add'>+	    riscv_vector_vlen() &gt;= 128)</div><div class='add'>+		static_branch_enable(&amp;use_zvkb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(riscv64_chacha_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit riscv64_chacha_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(riscv64_chacha_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ChaCha stream cipher (RISC-V optimized)");</div><div class='add'>+MODULE_AUTHOR("Jerry Shih &lt;jerry.shih@sifive.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/riscv/crypto/chacha-riscv64-zvkb.S b/arch/riscv/lib/crypto/chacha-riscv64-zvkb.S<br/>index bf057737ac69..b777d0b4e379 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/chacha-riscv64-zvkb.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/chacha-riscv64-zvkb.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/lib/crypto/chacha-riscv64-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/lib/crypto/chacha-riscv64-zvkb.S</a></div><div class='hunk'>@@ -46,11 +46,11 @@</div><div class='ctx'> .text</div><div class='ctx'> .option arch, +zvkb</div><div class='ctx'> </div><div class='del'>-#define KEYP		a0</div><div class='add'>+#define STATEP		a0</div><div class='ctx'> #define INP		a1</div><div class='ctx'> #define OUTP		a2</div><div class='del'>-#define LEN		a3</div><div class='del'>-#define IVP		a4</div><div class='add'>+#define NBLOCKS		a3</div><div class='add'>+#define NROUNDS		a4</div><div class='ctx'> </div><div class='ctx'> #define CONSTS0		a5</div><div class='ctx'> #define CONSTS1		a6</div><div class='hunk'>@@ -59,7 +59,7 @@</div><div class='ctx'> #define TMP		t1</div><div class='ctx'> #define VL		t2</div><div class='ctx'> #define STRIDE		t3</div><div class='del'>-#define NROUNDS		t4</div><div class='add'>+#define ROUND_CTR	t4</div><div class='ctx'> #define KEY0		s0</div><div class='ctx'> #define KEY1		s1</div><div class='ctx'> #define KEY2		s2</div><div class='hunk'>@@ -132,14 +132,16 @@</div><div class='ctx'> 	vror.vi		\b3, \b3, 32 - 7</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-// void chacha20_zvkb(const u32 key[8], const u8 *in, u8 *out, size_t len,</div><div class='del'>-//		      const u32 iv[4]);</div><div class='add'>+// void chacha_zvkb(struct chacha_state *state, const u8 *in, u8 *out,</div><div class='add'>+//		    size_t nblocks, int nrounds);</div><div class='ctx'> //</div><div class='del'>-// |len| must be nonzero and a multiple of 64 (CHACHA_BLOCK_SIZE).</div><div class='del'>-// The counter is treated as 32-bit, following the RFC7539 convention.</div><div class='del'>-SYM_FUNC_START(chacha20_zvkb)</div><div class='del'>-	srli		LEN, LEN, 6	// Bytes to blocks</div><div class='del'>-</div><div class='add'>+// |nblocks| is the number of 64-byte blocks to process, and must be nonzero.</div><div class='add'>+//</div><div class='add'>+// |state| gives the ChaCha state matrix, including the 32-bit counter in</div><div class='add'>+// state-&gt;x[12] following the RFC7539 convention; note that this differs from</div><div class='add'>+// the original Salsa20 paper which uses a 64-bit counter in state-&gt;x[12..13].</div><div class='add'>+// The updated 32-bit counter is written back to state-&gt;x[12] before returning.</div><div class='add'>+SYM_FUNC_START(chacha_zvkb)</div><div class='ctx'> 	addi		sp, sp, -96</div><div class='ctx'> 	sd		s0, 0(sp)</div><div class='ctx'> 	sd		s1, 8(sp)</div><div class='hunk'>@@ -157,26 +159,26 @@ SYM_FUNC_START(chacha20_zvkb)</div><div class='ctx'> 	li		STRIDE, 64</div><div class='ctx'> </div><div class='ctx'> 	// Set up the initial state matrix in scalar registers.</div><div class='del'>-	li		CONSTS0, 0x61707865	// "expa" little endian</div><div class='del'>-	li		CONSTS1, 0x3320646e	// "nd 3" little endian</div><div class='del'>-	li		CONSTS2, 0x79622d32	// "2-by" little endian</div><div class='del'>-	li		CONSTS3, 0x6b206574	// "te k" little endian</div><div class='del'>-	lw		KEY0, 0(KEYP)</div><div class='del'>-	lw		KEY1, 4(KEYP)</div><div class='del'>-	lw		KEY2, 8(KEYP)</div><div class='del'>-	lw		KEY3, 12(KEYP)</div><div class='del'>-	lw		KEY4, 16(KEYP)</div><div class='del'>-	lw		KEY5, 20(KEYP)</div><div class='del'>-	lw		KEY6, 24(KEYP)</div><div class='del'>-	lw		KEY7, 28(KEYP)</div><div class='del'>-	lw		COUNTER, 0(IVP)</div><div class='del'>-	lw		NONCE0, 4(IVP)</div><div class='del'>-	lw		NONCE1, 8(IVP)</div><div class='del'>-	lw		NONCE2, 12(IVP)</div><div class='add'>+	lw		CONSTS0, 0(STATEP)</div><div class='add'>+	lw		CONSTS1, 4(STATEP)</div><div class='add'>+	lw		CONSTS2, 8(STATEP)</div><div class='add'>+	lw		CONSTS3, 12(STATEP)</div><div class='add'>+	lw		KEY0, 16(STATEP)</div><div class='add'>+	lw		KEY1, 20(STATEP)</div><div class='add'>+	lw		KEY2, 24(STATEP)</div><div class='add'>+	lw		KEY3, 28(STATEP)</div><div class='add'>+	lw		KEY4, 32(STATEP)</div><div class='add'>+	lw		KEY5, 36(STATEP)</div><div class='add'>+	lw		KEY6, 40(STATEP)</div><div class='add'>+	lw		KEY7, 44(STATEP)</div><div class='add'>+	lw		COUNTER, 48(STATEP)</div><div class='add'>+	lw		NONCE0, 52(STATEP)</div><div class='add'>+	lw		NONCE1, 56(STATEP)</div><div class='add'>+	lw		NONCE2, 60(STATEP)</div><div class='ctx'> </div><div class='ctx'> .Lblock_loop:</div><div class='ctx'> 	// Set vl to the number of blocks to process in this iteration.</div><div class='del'>-	vsetvli		VL, LEN, e32, m1, ta, ma</div><div class='add'>+	vsetvli		VL, NBLOCKS, e32, m1, ta, ma</div><div class='ctx'> </div><div class='ctx'> 	// Set up the initial state matrix for the next VL blocks in v0-v15.</div><div class='ctx'> 	// v{i} holds the i'th 32-bit word of the state matrix for all blocks.</div><div class='hunk'>@@ -203,16 +205,16 @@ SYM_FUNC_START(chacha20_zvkb)</div><div class='ctx'> 	// v{16+i} holds the i'th 32-bit word for all blocks.</div><div class='ctx'> 	vlsseg8e32.v	v16, (INP), STRIDE</div><div class='ctx'> </div><div class='del'>-	li		NROUNDS, 20</div><div class='add'>+	mv		ROUND_CTR, NROUNDS</div><div class='ctx'> .Lnext_doubleround:</div><div class='del'>-	addi		NROUNDS, NROUNDS, -2</div><div class='add'>+	addi		ROUND_CTR, ROUND_CTR, -2</div><div class='ctx'> 	// column round</div><div class='ctx'> 	chacha_round	v0, v4, v8, v12, v1, v5, v9, v13, \</div><div class='ctx'> 			v2, v6, v10, v14, v3, v7, v11, v15</div><div class='ctx'> 	// diagonal round</div><div class='ctx'> 	chacha_round	v0, v5, v10, v15, v1, v6, v11, v12, \</div><div class='ctx'> 			v2, v7, v8, v13, v3, v4, v9, v14</div><div class='del'>-	bnez		NROUNDS, .Lnext_doubleround</div><div class='add'>+	bnez		ROUND_CTR, .Lnext_doubleround</div><div class='ctx'> </div><div class='ctx'> 	// Load the second half of the input data for each block into v24-v31.</div><div class='ctx'> 	// v{24+i} holds the {8+i}'th 32-bit word for all blocks.</div><div class='hunk'>@@ -271,12 +273,13 @@ SYM_FUNC_START(chacha20_zvkb)</div><div class='ctx'> 	// Update the counter, the remaining number of blocks, and the input and</div><div class='ctx'> 	// output pointers according to the number of blocks processed (VL).</div><div class='ctx'> 	add		COUNTER, COUNTER, VL</div><div class='del'>-	sub		LEN, LEN, VL</div><div class='add'>+	sub		NBLOCKS, NBLOCKS, VL</div><div class='ctx'> 	slli		TMP, VL, 6</div><div class='ctx'> 	add		OUTP, OUTP, TMP</div><div class='ctx'> 	add		INP, INP, TMP</div><div class='del'>-	bnez		LEN, .Lblock_loop</div><div class='add'>+	bnez		NBLOCKS, .Lblock_loop</div><div class='ctx'> </div><div class='add'>+	sw		COUNTER, 48(STATEP)</div><div class='ctx'> 	ld		s0, 0(sp)</div><div class='ctx'> 	ld		s1, 8(sp)</div><div class='ctx'> 	ld		s2, 16(sp)</div><div class='hunk'>@@ -291,4 +294,4 @@ SYM_FUNC_START(chacha20_zvkb)</div><div class='ctx'> 	ld		s11, 88(sp)</div><div class='ctx'> 	addi		sp, sp, 96</div><div class='ctx'> 	ret</div><div class='del'>-SYM_FUNC_END(chacha20_zvkb)</div><div class='add'>+SYM_FUNC_END(chacha_zvkb)</div><div class='head'>diff --git a/arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S b/arch/riscv/lib/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S<br/>index 8ebcc17de4dc..fad501ad0617 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/lib/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/lib/crypto/sha256-riscv64-zvknha_or_zvknhb-zvkb.S</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'> // - RISC-V Vector SHA-2 Secure Hash extension ('Zvknha' or 'Zvknhb')</div><div class='ctx'> // - RISC-V Vector Cryptography Bit-manipulation extension ('Zvkb')</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> .option arch, +zvknha, +zvkb</div><div class='hunk'>@@ -106,9 +106,9 @@</div><div class='ctx'> 	sha256_4rounds	\last, \k3, W3, W0, W1, W2</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-// void sha256_transform_zvknha_or_zvknhb_zvkb(u32 state[8], const u8 *data,</div><div class='del'>-//					       int num_blocks);</div><div class='del'>-SYM_TYPED_FUNC_START(sha256_transform_zvknha_or_zvknhb_zvkb)</div><div class='add'>+// void sha256_transform_zvknha_or_zvknhb_zvkb(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+//					       const u8 *data, size_t nblocks);</div><div class='add'>+SYM_FUNC_START(sha256_transform_zvknha_or_zvknhb_zvkb)</div><div class='ctx'> </div><div class='ctx'> 	// Load the round constants into K0-K15.</div><div class='ctx'> 	vsetivli	zero, 4, e32, m1, ta, ma</div><div class='head'>diff --git a/arch/riscv/lib/crypto/sha256.c b/arch/riscv/lib/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..71808397dff4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/lib/crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * SHA-256 (RISC-V accelerated)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2022 VRULL GmbH</div><div class='add'>+ * Author: Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 SiFive, Inc.</div><div class='add'>+ * Author: Jerry Shih &lt;jerry.shih@sifive.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/vector.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void sha256_transform_zvknha_or_zvknhb_zvkb(</div><div class='add'>+	u32 state[SHA256_STATE_WORDS], const u8 *data, size_t nblocks);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_extensions);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_simd(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	if (static_branch_likely(&amp;have_extensions)) {</div><div class='add'>+		kernel_vector_begin();</div><div class='add'>+		sha256_transform_zvknha_or_zvknhb_zvkb(state, data, nblocks);</div><div class='add'>+		kernel_vector_end();</div><div class='add'>+	} else {</div><div class='add'>+		sha256_blocks_generic(state, data, nblocks);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_simd);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	sha256_blocks_generic(state, data, nblocks);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='add'>+</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;have_extensions);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init riscv64_sha256_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	/* Both zvknha and zvknhb provide the SHA-256 instructions. */</div><div class='add'>+	if ((riscv_isa_extension_available(NULL, ZVKNHA) ||</div><div class='add'>+	     riscv_isa_extension_available(NULL, ZVKNHB)) &amp;&amp;</div><div class='add'>+	    riscv_isa_extension_available(NULL, ZVKB) &amp;&amp;</div><div class='add'>+	    riscv_vector_vlen() &gt;= 128)</div><div class='add'>+		static_branch_enable(&amp;have_extensions);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(riscv64_sha256_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit riscv64_sha256_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(riscv64_sha256_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 (RISC-V accelerated)");</div><div class='add'>+MODULE_AUTHOR("Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/arch/riscv/net/bpf_jit.h b/arch/riscv/net/bpf_jit.h<br/>index 1d1c78d4cff1..e7b032dfd17f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/net/bpf_jit.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/net/bpf_jit.h</a></div><div class='hunk'>@@ -608,6 +608,21 @@ static inline u32 rv_fence(u8 pred, u8 succ)</div><div class='ctx'> 	return rv_i_insn(imm11_0, 0, 0, 0, 0xf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void emit_fence_r_rw(struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	emit(rv_fence(0x2, 0x3), ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void emit_fence_rw_w(struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	emit(rv_fence(0x3, 0x1), ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void emit_fence_rw_rw(struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	emit(rv_fence(0x3, 0x3), ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32 rv_nop(void)</div><div class='ctx'> {</div><div class='ctx'> 	return rv_i_insn(0, 0, 0, 0, 0x13);</div><div class='head'>diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c<br/>index ca60db75199d..10e01ff06312 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_comp64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/net/bpf_jit_comp64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_comp64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/net/bpf_jit_comp64.c</a></div><div class='hunk'>@@ -473,11 +473,212 @@ static inline void emit_kcfi(u32 hash, struct rv_jit_context *ctx)</div><div class='ctx'> 		emit(hash, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void emit_atomic(u8 rd, u8 rs, s16 off, s32 imm, bool is64,</div><div class='del'>-			struct rv_jit_context *ctx)</div><div class='add'>+static int emit_load_8(bool sign_ext, u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int insns_start;</div><div class='add'>+</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		insns_start = ctx-&gt;ninsns;</div><div class='add'>+		if (sign_ext)</div><div class='add'>+			emit(rv_lb(rd, off, rs), ctx);</div><div class='add'>+		else</div><div class='add'>+			emit(rv_lbu(rd, off, rs), ctx);</div><div class='add'>+		return ctx-&gt;ninsns - insns_start;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='add'>+	insns_start = ctx-&gt;ninsns;</div><div class='add'>+	if (sign_ext)</div><div class='add'>+		emit(rv_lb(rd, 0, RV_REG_T1), ctx);</div><div class='add'>+	else</div><div class='add'>+		emit(rv_lbu(rd, 0, RV_REG_T1), ctx);</div><div class='add'>+	return ctx-&gt;ninsns - insns_start;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_load_16(bool sign_ext, u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int insns_start;</div><div class='add'>+</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		insns_start = ctx-&gt;ninsns;</div><div class='add'>+		if (sign_ext)</div><div class='add'>+			emit(rv_lh(rd, off, rs), ctx);</div><div class='add'>+		else</div><div class='add'>+			emit(rv_lhu(rd, off, rs), ctx);</div><div class='add'>+		return ctx-&gt;ninsns - insns_start;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='add'>+	insns_start = ctx-&gt;ninsns;</div><div class='add'>+	if (sign_ext)</div><div class='add'>+		emit(rv_lh(rd, 0, RV_REG_T1), ctx);</div><div class='add'>+	else</div><div class='add'>+		emit(rv_lhu(rd, 0, RV_REG_T1), ctx);</div><div class='add'>+	return ctx-&gt;ninsns - insns_start;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_load_32(bool sign_ext, u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int insns_start;</div><div class='add'>+</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		insns_start = ctx-&gt;ninsns;</div><div class='add'>+		if (sign_ext)</div><div class='add'>+			emit(rv_lw(rd, off, rs), ctx);</div><div class='add'>+		else</div><div class='add'>+			emit(rv_lwu(rd, off, rs), ctx);</div><div class='add'>+		return ctx-&gt;ninsns - insns_start;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='add'>+	insns_start = ctx-&gt;ninsns;</div><div class='add'>+	if (sign_ext)</div><div class='add'>+		emit(rv_lw(rd, 0, RV_REG_T1), ctx);</div><div class='add'>+	else</div><div class='add'>+		emit(rv_lwu(rd, 0, RV_REG_T1), ctx);</div><div class='add'>+	return ctx-&gt;ninsns - insns_start;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_load_64(bool sign_ext, u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	int insns_start;</div><div class='add'>+</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		insns_start = ctx-&gt;ninsns;</div><div class='add'>+		emit_ld(rd, off, rs, ctx);</div><div class='add'>+		return ctx-&gt;ninsns - insns_start;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='add'>+	insns_start = ctx-&gt;ninsns;</div><div class='add'>+	emit_ld(rd, 0, RV_REG_T1, ctx);</div><div class='add'>+	return ctx-&gt;ninsns - insns_start;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emit_store_8(u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		emit(rv_sb(rd, off, rs), ctx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+	emit(rv_sb(RV_REG_T1, 0, rs), ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emit_store_16(u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		emit(rv_sh(rd, off, rs), ctx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+	emit(rv_sh(RV_REG_T1, 0, rs), ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emit_store_32(u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		emit_sw(rd, off, rs, ctx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+	emit_sw(RV_REG_T1, 0, rs, ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emit_store_64(u8 rd, s32 off, u8 rs, struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	if (is_12b_int(off)) {</div><div class='add'>+		emit_sd(rd, off, rs, ctx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emit_imm(RV_REG_T1, off, ctx);</div><div class='add'>+	emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='add'>+	emit_sd(RV_REG_T1, 0, rs, ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_atomic_ld_st(u8 rd, u8 rs, const struct bpf_insn *insn,</div><div class='add'>+			     struct rv_jit_context *ctx)</div><div class='add'>+{</div><div class='add'>+	u8 code = insn-&gt;code;</div><div class='add'>+	s32 imm = insn-&gt;imm;</div><div class='add'>+	s16 off = insn-&gt;off;</div><div class='add'>+</div><div class='add'>+	switch (imm) {</div><div class='add'>+	/* dst_reg = load_acquire(src_reg + off16) */</div><div class='add'>+	case BPF_LOAD_ACQ:</div><div class='add'>+		switch (BPF_SIZE(code)) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			emit_load_8(false, rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			emit_load_16(false, rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			emit_load_32(false, rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			emit_load_64(false, rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		emit_fence_r_rw(ctx);</div><div class='add'>+</div><div class='add'>+		/* If our next insn is a redundant zext, return 1 to tell</div><div class='add'>+		 * build_body() to skip it.</div><div class='add'>+		 */</div><div class='add'>+		if (BPF_SIZE(code) != BPF_DW &amp;&amp; insn_is_zext(&amp;insn[1]))</div><div class='add'>+			return 1;</div><div class='add'>+		break;</div><div class='add'>+	/* store_release(dst_reg + off16, src_reg) */</div><div class='add'>+	case BPF_STORE_REL:</div><div class='add'>+		emit_fence_rw_w(ctx);</div><div class='add'>+		switch (BPF_SIZE(code)) {</div><div class='add'>+		case BPF_B:</div><div class='add'>+			emit_store_8(rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_H:</div><div class='add'>+			emit_store_16(rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_W:</div><div class='add'>+			emit_store_32(rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		case BPF_DW:</div><div class='add'>+			emit_store_64(rd, off, rs, ctx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err_once("bpf-jit: invalid atomic load/store opcode %02x\n", imm);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emit_atomic_rmw(u8 rd, u8 rs, const struct bpf_insn *insn,</div><div class='add'>+			   struct rv_jit_context *ctx)</div><div class='ctx'> {</div><div class='del'>-	u8 r0;</div><div class='add'>+	u8 r0, code = insn-&gt;code;</div><div class='add'>+	s16 off = insn-&gt;off;</div><div class='add'>+	s32 imm = insn-&gt;imm;</div><div class='ctx'> 	int jmp_offset;</div><div class='add'>+	bool is64;</div><div class='add'>+</div><div class='add'>+	if (BPF_SIZE(code) != BPF_W &amp;&amp; BPF_SIZE(code) != BPF_DW) {</div><div class='add'>+		pr_err_once("bpf-jit: 1- and 2-byte RMW atomics are not supported\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	is64 = BPF_SIZE(code) == BPF_DW;</div><div class='ctx'> </div><div class='ctx'> 	if (off) {</div><div class='ctx'> 		if (is_12b_int(off)) {</div><div class='hunk'>@@ -554,9 +755,14 @@ static void emit_atomic(u8 rd, u8 rs, s16 off, s32 imm, bool is64,</div><div class='ctx'> 		     rv_sc_w(RV_REG_T3, rs, rd, 0, 1), ctx);</div><div class='ctx'> 		jmp_offset = ninsns_rvoff(-6);</div><div class='ctx'> 		emit(rv_bne(RV_REG_T3, 0, jmp_offset &gt;&gt; 1), ctx);</div><div class='del'>-		emit(rv_fence(0x3, 0x3), ctx);</div><div class='add'>+		emit_fence_rw_rw(ctx);</div><div class='ctx'> 		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err_once("bpf-jit: invalid atomic RMW opcode %02x\n", imm);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define BPF_FIXUP_OFFSET_MASK   GENMASK(26, 0)</div><div class='hunk'>@@ -1650,8 +1856,8 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEM32 | BPF_W:</div><div class='ctx'> 	case BPF_LDX | BPF_PROBE_MEM32 | BPF_DW:</div><div class='ctx'> 	{</div><div class='del'>-		int insn_len, insns_start;</div><div class='ctx'> 		bool sign_ext;</div><div class='add'>+		int insn_len;</div><div class='ctx'> </div><div class='ctx'> 		sign_ext = BPF_MODE(insn-&gt;code) == BPF_MEMSX ||</div><div class='ctx'> 			   BPF_MODE(insn-&gt;code) == BPF_PROBE_MEMSX;</div><div class='hunk'>@@ -1663,78 +1869,16 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> </div><div class='ctx'> 		switch (BPF_SIZE(code)) {</div><div class='ctx'> 		case BPF_B:</div><div class='del'>-			if (is_12b_int(off)) {</div><div class='del'>-				insns_start = ctx-&gt;ninsns;</div><div class='del'>-				if (sign_ext)</div><div class='del'>-					emit(rv_lb(rd, off, rs), ctx);</div><div class='del'>-				else</div><div class='del'>-					emit(rv_lbu(rd, off, rs), ctx);</div><div class='del'>-				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-			emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='del'>-			insns_start = ctx-&gt;ninsns;</div><div class='del'>-			if (sign_ext)</div><div class='del'>-				emit(rv_lb(rd, 0, RV_REG_T1), ctx);</div><div class='del'>-			else</div><div class='del'>-				emit(rv_lbu(rd, 0, RV_REG_T1), ctx);</div><div class='del'>-			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			insn_len = emit_load_8(sign_ext, rd, off, rs, ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_H:</div><div class='del'>-			if (is_12b_int(off)) {</div><div class='del'>-				insns_start = ctx-&gt;ninsns;</div><div class='del'>-				if (sign_ext)</div><div class='del'>-					emit(rv_lh(rd, off, rs), ctx);</div><div class='del'>-				else</div><div class='del'>-					emit(rv_lhu(rd, off, rs), ctx);</div><div class='del'>-				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-			emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='del'>-			insns_start = ctx-&gt;ninsns;</div><div class='del'>-			if (sign_ext)</div><div class='del'>-				emit(rv_lh(rd, 0, RV_REG_T1), ctx);</div><div class='del'>-			else</div><div class='del'>-				emit(rv_lhu(rd, 0, RV_REG_T1), ctx);</div><div class='del'>-			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			insn_len = emit_load_16(sign_ext, rd, off, rs, ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_W:</div><div class='del'>-			if (is_12b_int(off)) {</div><div class='del'>-				insns_start = ctx-&gt;ninsns;</div><div class='del'>-				if (sign_ext)</div><div class='del'>-					emit(rv_lw(rd, off, rs), ctx);</div><div class='del'>-				else</div><div class='del'>-					emit(rv_lwu(rd, off, rs), ctx);</div><div class='del'>-				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-			emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='del'>-			insns_start = ctx-&gt;ninsns;</div><div class='del'>-			if (sign_ext)</div><div class='del'>-				emit(rv_lw(rd, 0, RV_REG_T1), ctx);</div><div class='del'>-			else</div><div class='del'>-				emit(rv_lwu(rd, 0, RV_REG_T1), ctx);</div><div class='del'>-			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			insn_len = emit_load_32(sign_ext, rd, off, rs, ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BPF_DW:</div><div class='del'>-			if (is_12b_int(off)) {</div><div class='del'>-				insns_start = ctx-&gt;ninsns;</div><div class='del'>-				emit_ld(rd, off, rs, ctx);</div><div class='del'>-				insn_len = ctx-&gt;ninsns - insns_start;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-			emit_add(RV_REG_T1, RV_REG_T1, rs, ctx);</div><div class='del'>-			insns_start = ctx-&gt;ninsns;</div><div class='del'>-			emit_ld(rd, 0, RV_REG_T1, ctx);</div><div class='del'>-			insn_len = ctx-&gt;ninsns - insns_start;</div><div class='add'>+			insn_len = emit_load_64(sign_ext, rd, off, rs, ctx);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1879,49 +2023,27 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,</div><div class='ctx'> </div><div class='ctx'> 	/* STX: *(size *)(dst + off) = src */</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_B:</div><div class='del'>-		if (is_12b_int(off)) {</div><div class='del'>-			emit(rv_sb(rd, off, rs), ctx);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-		emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='del'>-		emit(rv_sb(RV_REG_T1, 0, rs), ctx);</div><div class='add'>+		emit_store_8(rd, off, rs, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_H:</div><div class='del'>-		if (is_12b_int(off)) {</div><div class='del'>-			emit(rv_sh(rd, off, rs), ctx);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-		emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='del'>-		emit(rv_sh(RV_REG_T1, 0, rs), ctx);</div><div class='add'>+		emit_store_16(rd, off, rs, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_W:</div><div class='del'>-		if (is_12b_int(off)) {</div><div class='del'>-			emit_sw(rd, off, rs, ctx);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-		emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='del'>-		emit_sw(RV_REG_T1, 0, rs, ctx);</div><div class='add'>+		emit_store_32(rd, off, rs, ctx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BPF_STX | BPF_MEM | BPF_DW:</div><div class='del'>-		if (is_12b_int(off)) {</div><div class='del'>-			emit_sd(rd, off, rs, ctx);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		emit_imm(RV_REG_T1, off, ctx);</div><div class='del'>-		emit_add(RV_REG_T1, RV_REG_T1, rd, ctx);</div><div class='del'>-		emit_sd(RV_REG_T1, 0, rs, ctx);</div><div class='add'>+		emit_store_64(rd, off, rs, ctx);</div><div class='ctx'> 		break;</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_B:</div><div class='add'>+	case BPF_STX | BPF_ATOMIC | BPF_H:</div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_W:</div><div class='ctx'> 	case BPF_STX | BPF_ATOMIC | BPF_DW:</div><div class='del'>-		emit_atomic(rd, rs, off, imm,</div><div class='del'>-			    BPF_SIZE(code) == BPF_DW, ctx);</div><div class='add'>+		if (bpf_atomic_is_load_store(insn))</div><div class='add'>+			ret = emit_atomic_ld_st(rd, rs, insn, ctx);</div><div class='add'>+		else</div><div class='add'>+			ret = emit_atomic_rmw(rd, rs, insn, ctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case BPF_STX | BPF_PROBE_MEM32 | BPF_B:</div><div class='head'>diff --git a/arch/riscv/net/bpf_jit_core.c b/arch/riscv/net/bpf_jit_core.c<br/>index f8cd2f70a7fb..f6ca5cfa6b2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/riscv/net/bpf_jit_core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/riscv/net/bpf_jit_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/riscv/net/bpf_jit_core.c</a></div><div class='hunk'>@@ -26,9 +26,8 @@ static int build_body(struct rv_jit_context *ctx, bool extra_pass, int *offset)</div><div class='ctx'> 		int ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = bpf_jit_emit_insn(insn, ctx, extra_pass);</div><div class='del'>-		/* BPF_LD | BPF_IMM | BPF_DW: skip the next instruction. */</div><div class='ctx'> 		if (ret &gt; 0)</div><div class='del'>-			i++;</div><div class='add'>+			i++; /* skip the next instruction */</div><div class='ctx'> 		if (offset)</div><div class='ctx'> 			offset[i] = ctx-&gt;ninsns;</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='head'>diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig<br/>index db8161ebb43c..0c16dc443e2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/Kconfig</a></div><div class='hunk'>@@ -146,6 +146,7 @@ config S390</div><div class='ctx'> 	select ARCH_WANTS_NO_INSTR</div><div class='ctx'> 	select ARCH_WANT_DEFAULT_BPF_JIT</div><div class='ctx'> 	select ARCH_WANT_IPC_PARSE_VERSION</div><div class='add'>+	select ARCH_WANT_IRQS_OFF_ACTIVATE_MM</div><div class='ctx'> 	select ARCH_WANT_KERNEL_PMD_MKWRITE</div><div class='ctx'> 	select ARCH_WANT_LD_ORPHAN_WARN</div><div class='ctx'> 	select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP</div><div class='hunk'>@@ -332,6 +333,10 @@ config HAVE_MARCH_Z16_FEATURES</div><div class='ctx'> 	def_bool n</div><div class='ctx'> 	select HAVE_MARCH_Z15_FEATURES</div><div class='ctx'> </div><div class='add'>+config HAVE_MARCH_Z17_FEATURES</div><div class='add'>+	def_bool n</div><div class='add'>+	select HAVE_MARCH_Z16_FEATURES</div><div class='add'>+</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Processor type"</div><div class='ctx'> 	default MARCH_Z196</div><div class='hunk'>@@ -397,6 +402,14 @@ config MARCH_Z16</div><div class='ctx'> 	  Select this to enable optimizations for IBM z16 (3931 and</div><div class='ctx'> 	  3932 series).</div><div class='ctx'> </div><div class='add'>+config MARCH_Z17</div><div class='add'>+	bool "IBM z17"</div><div class='add'>+	select HAVE_MARCH_Z17_FEATURES</div><div class='add'>+	depends on $(cc-option,-march=z17)</div><div class='add'>+	help</div><div class='add'>+	  Select this to enable optimizations for IBM z17 (9175 and</div><div class='add'>+	  9176 series).</div><div class='add'>+</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> config MARCH_Z10_TUNE</div><div class='hunk'>@@ -420,6 +433,9 @@ config MARCH_Z15_TUNE</div><div class='ctx'> config MARCH_Z16_TUNE</div><div class='ctx'> 	def_bool TUNE_Z16 || MARCH_Z16 &amp;&amp; TUNE_DEFAULT</div><div class='ctx'> </div><div class='add'>+config MARCH_Z17_TUNE</div><div class='add'>+	def_bool TUNE_Z17 || MARCH_Z17 &amp;&amp; TUNE_DEFAULT</div><div class='add'>+</div><div class='ctx'> choice</div><div class='ctx'> 	prompt "Tune code generation"</div><div class='ctx'> 	default TUNE_DEFAULT</div><div class='hunk'>@@ -464,6 +480,10 @@ config TUNE_Z16</div><div class='ctx'> 	bool "IBM z16"</div><div class='ctx'> 	depends on $(cc-option,-mtune=z16)</div><div class='ctx'> </div><div class='add'>+config TUNE_Z17</div><div class='add'>+	bool "IBM z17"</div><div class='add'>+	depends on $(cc-option,-mtune=z17)</div><div class='add'>+</div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='ctx'> config 64BIT</div><div class='head'>diff --git a/arch/s390/Makefile b/arch/s390/Makefile<br/>index b06dc53bfed5..7679bc16b692 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/Makefile</a></div><div class='hunk'>@@ -48,6 +48,7 @@ mflags-$(CONFIG_MARCH_Z13)    := -march=z13</div><div class='ctx'> mflags-$(CONFIG_MARCH_Z14)    := -march=z14</div><div class='ctx'> mflags-$(CONFIG_MARCH_Z15)    := -march=z15</div><div class='ctx'> mflags-$(CONFIG_MARCH_Z16)    := -march=z16</div><div class='add'>+mflags-$(CONFIG_MARCH_Z17)    := -march=z17</div><div class='ctx'> </div><div class='ctx'> export CC_FLAGS_MARCH := $(mflags-y)</div><div class='ctx'> </div><div class='hunk'>@@ -61,6 +62,7 @@ cflags-$(CONFIG_MARCH_Z13_TUNE)		+= -mtune=z13</div><div class='ctx'> cflags-$(CONFIG_MARCH_Z14_TUNE)		+= -mtune=z14</div><div class='ctx'> cflags-$(CONFIG_MARCH_Z15_TUNE)		+= -mtune=z15</div><div class='ctx'> cflags-$(CONFIG_MARCH_Z16_TUNE)		+= -mtune=z16</div><div class='add'>+cflags-$(CONFIG_MARCH_Z17_TUNE)		+= -mtune=z17</div><div class='ctx'> </div><div class='ctx'> cflags-y += -Wa,-I$(srctree)/arch/$(ARCH)/include</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/boot/ipl_parm.c b/arch/s390/boot/ipl_parm.c<br/>index d04e9b89d14a..f584d7da29cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/ipl_parm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/ipl_parm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/ipl_parm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/boot/ipl_parm.c</a></div><div class='hunk'>@@ -179,7 +179,7 @@ void setup_boot_command_line(void)</div><div class='ctx'> 	if (has_ebcdic_char(parmarea.command_line))</div><div class='ctx'> 		EBCASC(parmarea.command_line, COMMAND_LINE_SIZE);</div><div class='ctx'> 	/* copy arch command line */</div><div class='del'>-	strcpy(early_command_line, strim(parmarea.command_line));</div><div class='add'>+	strscpy(early_command_line, strim(parmarea.command_line));</div><div class='ctx'> </div><div class='ctx'> 	/* append IPL PARM data to the boot command line */</div><div class='ctx'> 	if (!is_prot_virt_guest() &amp;&amp; ipl_block_valid)</div><div class='hunk'>@@ -253,7 +253,8 @@ void parse_boot_command_line(void)</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	__kaslr_enabled = IS_ENABLED(CONFIG_RANDOMIZE_BASE);</div><div class='del'>-	args = strcpy(command_line_buf, early_command_line);</div><div class='add'>+	strscpy(command_line_buf, early_command_line);</div><div class='add'>+	args = command_line_buf;</div><div class='ctx'> 	while (*args) {</div><div class='ctx'> 		args = next_arg(args, &amp;param, &amp;val);</div><div class='ctx'> </div><div class='hunk'>@@ -309,7 +310,7 @@ void parse_boot_command_line(void)</div><div class='ctx'> 		if (!strcmp(param, "bootdebug")) {</div><div class='ctx'> 			bootdebug = true;</div><div class='ctx'> 			if (val)</div><div class='del'>-				strncpy(bootdebug_filter, val, sizeof(bootdebug_filter) - 1);</div><div class='add'>+				strscpy(bootdebug_filter, val);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!strcmp(param, "quiet"))</div><div class='ctx'> 			boot_console_loglevel = CONSOLE_LOGLEVEL_QUIET;</div><div class='head'>diff --git a/arch/s390/boot/printk.c b/arch/s390/boot/printk.c<br/>index 8cf6331bc060..4bb6bc95704e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/printk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/printk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/printk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/boot/printk.c</a></div><div class='hunk'>@@ -29,7 +29,8 @@ static void boot_rb_add(const char *str, size_t len)</div><div class='ctx'> 	/* store strings separated by '\0' */</div><div class='ctx'> 	if (len + 1 &gt; avail)</div><div class='ctx'> 		boot_rb_off = 0;</div><div class='del'>-	strcpy(boot_rb + boot_rb_off, str);</div><div class='add'>+	avail = sizeof(boot_rb) - boot_rb_off - 1;</div><div class='add'>+	strscpy(boot_rb + boot_rb_off, str, avail);</div><div class='ctx'> 	boot_rb_off += len + 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -158,10 +159,10 @@ static noinline char *strsym(char *buf, void *ip)</div><div class='ctx'> </div><div class='ctx'> 	p = findsym((unsigned long)ip, &amp;off, &amp;len);</div><div class='ctx'> 	if (p) {</div><div class='del'>-		strncpy(buf, p, MAX_SYMLEN);</div><div class='add'>+		strscpy(buf, p, MAX_SYMLEN);</div><div class='ctx'> 		/* reserve 15 bytes for offset/len in symbol+0x1234/0x1234 */</div><div class='ctx'> 		p = buf + strnlen(buf, MAX_SYMLEN - 15);</div><div class='del'>-		strcpy(p, "+0x");</div><div class='add'>+		strscpy(p, "+0x", MAX_SYMLEN - (p - buf));</div><div class='ctx'> 		as_hex(p + 3, off, 0);</div><div class='ctx'> 		strcat(p, "/0x");</div><div class='ctx'> 		as_hex(p + strlen(p), len, 0);</div><div class='head'>diff --git a/arch/s390/boot/startup.c b/arch/s390/boot/startup.c<br/>index 06316fb8e0fa..da8337e63a3e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/startup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/startup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/startup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/boot/startup.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;asm/boot_data.h&gt;</div><div class='ctx'> #include &lt;asm/extmem.h&gt;</div><div class='ctx'> #include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/diag288.h&gt;</div><div class='ctx'> #include &lt;asm/maccess.h&gt;</div><div class='ctx'> #include &lt;asm/machine.h&gt;</div><div class='ctx'> #include &lt;asm/sysinfo.h&gt;</div><div class='hunk'>@@ -71,6 +72,20 @@ static void detect_machine_type(void)</div><div class='ctx'> 		set_machine_feature(MFEATURE_VM);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void detect_diag288(void)</div><div class='add'>+{</div><div class='add'>+	/* "BEGIN" in EBCDIC character set */</div><div class='add'>+	static const char cmd[] = "\xc2\xc5\xc7\xc9\xd5";</div><div class='add'>+	unsigned long action, len;</div><div class='add'>+</div><div class='add'>+	action = machine_is_vm() ? (unsigned long)cmd : LPARWDT_RESTART;</div><div class='add'>+	len = machine_is_vm() ? sizeof(cmd) : 0;</div><div class='add'>+	if (__diag288(WDT_FUNC_INIT, MIN_INTERVAL, action, len))</div><div class='add'>+		return;</div><div class='add'>+	__diag288(WDT_FUNC_CANCEL, 0, 0, 0);</div><div class='add'>+	set_machine_feature(MFEATURE_DIAG288);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void detect_diag9c(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpu;</div><div class='hunk'>@@ -519,6 +534,8 @@ void startup_kernel(void)</div><div class='ctx'> 	detect_facilities();</div><div class='ctx'> 	detect_diag9c();</div><div class='ctx'> 	detect_machine_type();</div><div class='add'>+	/* detect_diag288() needs machine type */</div><div class='add'>+	detect_diag288();</div><div class='ctx'> 	cmma_init();</div><div class='ctx'> 	sanitize_prot_virt_host();</div><div class='ctx'> 	max_physmem_end = detect_max_physmem_end();</div><div class='head'>diff --git a/arch/s390/boot/string.c b/arch/s390/boot/string.c<br/>index f6b9b1df48a8..bd68161434a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/boot/string.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/boot/string.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/boot/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/boot/string.c</a></div><div class='hunk'>@@ -29,6 +29,18 @@ int strncmp(const char *cs, const char *ct, size_t count)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+ssize_t sized_strscpy(char *dst, const char *src, size_t count)</div><div class='add'>+{</div><div class='add'>+	size_t len;</div><div class='add'>+</div><div class='add'>+	if (count == 0)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+	len = strnlen(src, count - 1);</div><div class='add'>+	memcpy(dst, src, len);</div><div class='add'>+	dst[len] = '\0';</div><div class='add'>+	return src[len] ? -E2BIG : len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void *memset64(uint64_t *s, uint64_t v, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	uint64_t *xs = s;</div><div class='head'>diff --git a/arch/s390/configs/debug_defconfig b/arch/s390/configs/debug_defconfig<br/>index 6f2c9ce1b154..8ecad727497e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/configs/debug_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/configs/debug_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/configs/debug_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/configs/debug_defconfig</a></div><div class='hunk'>@@ -38,7 +38,6 @@ CONFIG_USER_NS=y</div><div class='ctx'> CONFIG_CHECKPOINT_RESTORE=y</div><div class='ctx'> CONFIG_SCHED_AUTOGROUP=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='del'>-# CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='ctx'> CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_KEXEC_FILE=y</div><div class='hunk'>@@ -92,7 +91,6 @@ CONFIG_UNIXWARE_DISKLABEL=y</div><div class='ctx'> CONFIG_IOSCHED_BFQ=y</div><div class='ctx'> CONFIG_BINFMT_MISC=m</div><div class='ctx'> CONFIG_ZSWAP=y</div><div class='del'>-CONFIG_ZSMALLOC=y</div><div class='ctx'> CONFIG_ZSMALLOC_STAT=y</div><div class='ctx'> CONFIG_SLAB_BUCKETS=y</div><div class='ctx'> CONFIG_SLUB_STATS=y</div><div class='hunk'>@@ -395,6 +393,9 @@ CONFIG_CLS_U32_MARK=y</div><div class='ctx'> CONFIG_NET_CLS_FLOW=m</div><div class='ctx'> CONFIG_NET_CLS_CGROUP=y</div><div class='ctx'> CONFIG_NET_CLS_BPF=m</div><div class='add'>+CONFIG_NET_CLS_FLOWER=m</div><div class='add'>+CONFIG_NET_CLS_MATCHALL=m</div><div class='add'>+CONFIG_NET_EMATCH=y</div><div class='ctx'> CONFIG_NET_CLS_ACT=y</div><div class='ctx'> CONFIG_NET_ACT_POLICE=m</div><div class='ctx'> CONFIG_NET_ACT_GACT=m</div><div class='hunk'>@@ -405,6 +406,9 @@ CONFIG_NET_ACT_PEDIT=m</div><div class='ctx'> CONFIG_NET_ACT_SIMP=m</div><div class='ctx'> CONFIG_NET_ACT_SKBEDIT=m</div><div class='ctx'> CONFIG_NET_ACT_CSUM=m</div><div class='add'>+CONFIG_NET_ACT_VLAN=m</div><div class='add'>+CONFIG_NET_ACT_TUNNEL_KEY=m</div><div class='add'>+CONFIG_NET_ACT_CT=m</div><div class='ctx'> CONFIG_NET_ACT_GATE=m</div><div class='ctx'> CONFIG_NET_TC_SKB_EXT=y</div><div class='ctx'> CONFIG_DNS_RESOLVER=y</div><div class='hunk'>@@ -628,8 +632,16 @@ CONFIG_VIRTIO_PCI=m</div><div class='ctx'> CONFIG_VIRTIO_BALLOON=m</div><div class='ctx'> CONFIG_VIRTIO_MEM=m</div><div class='ctx'> CONFIG_VIRTIO_INPUT=y</div><div class='add'>+CONFIG_VDPA=m</div><div class='add'>+CONFIG_VDPA_SIM=m</div><div class='add'>+CONFIG_VDPA_SIM_NET=m</div><div class='add'>+CONFIG_VDPA_SIM_BLOCK=m</div><div class='add'>+CONFIG_VDPA_USER=m</div><div class='add'>+CONFIG_MLX5_VDPA_NET=m</div><div class='add'>+CONFIG_VP_VDPA=m</div><div class='ctx'> CONFIG_VHOST_NET=m</div><div class='ctx'> CONFIG_VHOST_VSOCK=m</div><div class='add'>+CONFIG_VHOST_VDPA=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='ctx'> CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT4_FS_SECURITY=y</div><div class='hunk'>@@ -654,7 +666,6 @@ CONFIG_NILFS2_FS=m</div><div class='ctx'> CONFIG_BCACHEFS_FS=y</div><div class='ctx'> CONFIG_BCACHEFS_QUOTA=y</div><div class='ctx'> CONFIG_BCACHEFS_POSIX_ACL=y</div><div class='del'>-CONFIG_FS_DAX=y</div><div class='ctx'> CONFIG_EXPORTFS_BLOCK_OPS=y</div><div class='ctx'> CONFIG_FS_ENCRYPTION=y</div><div class='ctx'> CONFIG_FS_VERITY=y</div><div class='hunk'>@@ -724,11 +735,10 @@ CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_DLM=m</div><div class='ctx'> CONFIG_UNICODE=y</div><div class='ctx'> CONFIG_PERSISTENT_KEYRINGS=y</div><div class='add'>+CONFIG_BIG_KEYS=y</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_KEY_NOTIFICATIONS=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='del'>-CONFIG_HARDENED_USERCOPY=y</div><div class='del'>-CONFIG_FORTIFY_SOURCE=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX=y</div><div class='ctx'> CONFIG_SECURITY_SELINUX_BOOTPARAM=y</div><div class='ctx'> CONFIG_SECURITY_LOCKDOWN_LSM=y</div><div class='hunk'>@@ -741,12 +751,14 @@ CONFIG_IMA=y</div><div class='ctx'> CONFIG_IMA_DEFAULT_HASH_SHA256=y</div><div class='ctx'> CONFIG_IMA_WRITE_POLICY=y</div><div class='ctx'> CONFIG_IMA_APPRAISE=y</div><div class='add'>+CONFIG_FORTIFY_SOURCE=y</div><div class='add'>+CONFIG_HARDENED_USERCOPY=y</div><div class='ctx'> CONFIG_BUG_ON_DATA_CORRUPTION=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='del'>-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set</div><div class='add'>+CONFIG_CRYPTO_SELFTESTS=y</div><div class='ctx'> CONFIG_CRYPTO_PCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='hunk'>@@ -756,7 +768,6 @@ CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='ctx'> CONFIG_CRYPTO_ARIA=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='del'>-CONFIG_CRYPTO_CAMELLIA=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='ctx'> CONFIG_CRYPTO_DES=m</div><div class='hunk'>@@ -795,13 +806,11 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_S390=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA3_256_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA3_512_S390=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_S390=m</div><div class='ctx'> CONFIG_CRYPTO_AES_S390=m</div><div class='ctx'> CONFIG_CRYPTO_DES_S390=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA_S390=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC_S390=m</div><div class='ctx'> CONFIG_ZCRYPT=m</div><div class='ctx'> CONFIG_PKEY=m</div><div class='hunk'>@@ -812,9 +821,9 @@ CONFIG_PKEY_UV=m</div><div class='ctx'> CONFIG_CRYPTO_PAES_S390=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_VIRTIO=m</div><div class='ctx'> CONFIG_SYSTEM_BLACKLIST_KEYRING=y</div><div class='add'>+CONFIG_CRYPTO_KRB5=m</div><div class='add'>+CONFIG_CRYPTO_KRB5_SELFTESTS=y</div><div class='ctx'> CONFIG_CORDIC=m</div><div class='del'>-CONFIG_CRYPTO_LIB_CURVE25519=m</div><div class='del'>-CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_RANDOM32_SELFTEST=y</div><div class='ctx'> CONFIG_XZ_DEC_MICROLZMA=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='head'>diff --git a/arch/s390/configs/defconfig b/arch/s390/configs/defconfig<br/>index f18a7d97ac21..c13a77765162 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/configs/defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/configs/defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/configs/defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/configs/defconfig</a></div><div class='hunk'>@@ -36,7 +36,6 @@ CONFIG_USER_NS=y</div><div class='ctx'> CONFIG_CHECKPOINT_RESTORE=y</div><div class='ctx'> CONFIG_SCHED_AUTOGROUP=y</div><div class='ctx'> CONFIG_EXPERT=y</div><div class='del'>-# CONFIG_SYSFS_SYSCALL is not set</div><div class='ctx'> CONFIG_PROFILING=y</div><div class='ctx'> CONFIG_KEXEC=y</div><div class='ctx'> CONFIG_KEXEC_FILE=y</div><div class='hunk'>@@ -86,7 +85,6 @@ CONFIG_UNIXWARE_DISKLABEL=y</div><div class='ctx'> CONFIG_IOSCHED_BFQ=y</div><div class='ctx'> CONFIG_BINFMT_MISC=m</div><div class='ctx'> CONFIG_ZSWAP=y</div><div class='del'>-CONFIG_ZSMALLOC=y</div><div class='ctx'> CONFIG_ZSMALLOC_STAT=y</div><div class='ctx'> CONFIG_SLAB_BUCKETS=y</div><div class='ctx'> # CONFIG_COMPAT_BRK is not set</div><div class='hunk'>@@ -385,6 +383,9 @@ CONFIG_CLS_U32_MARK=y</div><div class='ctx'> CONFIG_NET_CLS_FLOW=m</div><div class='ctx'> CONFIG_NET_CLS_CGROUP=y</div><div class='ctx'> CONFIG_NET_CLS_BPF=m</div><div class='add'>+CONFIG_NET_CLS_FLOWER=m</div><div class='add'>+CONFIG_NET_CLS_MATCHALL=m</div><div class='add'>+CONFIG_NET_EMATCH=y</div><div class='ctx'> CONFIG_NET_CLS_ACT=y</div><div class='ctx'> CONFIG_NET_ACT_POLICE=m</div><div class='ctx'> CONFIG_NET_ACT_GACT=m</div><div class='hunk'>@@ -395,6 +396,9 @@ CONFIG_NET_ACT_PEDIT=m</div><div class='ctx'> CONFIG_NET_ACT_SIMP=m</div><div class='ctx'> CONFIG_NET_ACT_SKBEDIT=m</div><div class='ctx'> CONFIG_NET_ACT_CSUM=m</div><div class='add'>+CONFIG_NET_ACT_VLAN=m</div><div class='add'>+CONFIG_NET_ACT_TUNNEL_KEY=m</div><div class='add'>+CONFIG_NET_ACT_CT=m</div><div class='ctx'> CONFIG_NET_ACT_GATE=m</div><div class='ctx'> CONFIG_NET_TC_SKB_EXT=y</div><div class='ctx'> CONFIG_DNS_RESOLVER=y</div><div class='hunk'>@@ -618,8 +622,16 @@ CONFIG_VIRTIO_PCI=m</div><div class='ctx'> CONFIG_VIRTIO_BALLOON=m</div><div class='ctx'> CONFIG_VIRTIO_MEM=m</div><div class='ctx'> CONFIG_VIRTIO_INPUT=y</div><div class='add'>+CONFIG_VDPA=m</div><div class='add'>+CONFIG_VDPA_SIM=m</div><div class='add'>+CONFIG_VDPA_SIM_NET=m</div><div class='add'>+CONFIG_VDPA_SIM_BLOCK=m</div><div class='add'>+CONFIG_VDPA_USER=m</div><div class='add'>+CONFIG_MLX5_VDPA_NET=m</div><div class='add'>+CONFIG_VP_VDPA=m</div><div class='ctx'> CONFIG_VHOST_NET=m</div><div class='ctx'> CONFIG_VHOST_VSOCK=m</div><div class='add'>+CONFIG_VHOST_VDPA=m</div><div class='ctx'> CONFIG_EXT4_FS=y</div><div class='ctx'> CONFIG_EXT4_FS_POSIX_ACL=y</div><div class='ctx'> CONFIG_EXT4_FS_SECURITY=y</div><div class='hunk'>@@ -641,7 +653,6 @@ CONFIG_NILFS2_FS=m</div><div class='ctx'> CONFIG_BCACHEFS_FS=m</div><div class='ctx'> CONFIG_BCACHEFS_QUOTA=y</div><div class='ctx'> CONFIG_BCACHEFS_POSIX_ACL=y</div><div class='del'>-CONFIG_FS_DAX=y</div><div class='ctx'> CONFIG_EXPORTFS_BLOCK_OPS=y</div><div class='ctx'> CONFIG_FS_ENCRYPTION=y</div><div class='ctx'> CONFIG_FS_VERITY=y</div><div class='hunk'>@@ -711,6 +722,7 @@ CONFIG_NLS_UTF8=m</div><div class='ctx'> CONFIG_DLM=m</div><div class='ctx'> CONFIG_UNICODE=y</div><div class='ctx'> CONFIG_PERSISTENT_KEYRINGS=y</div><div class='add'>+CONFIG_BIG_KEYS=y</div><div class='ctx'> CONFIG_ENCRYPTED_KEYS=m</div><div class='ctx'> CONFIG_KEY_NOTIFICATIONS=y</div><div class='ctx'> CONFIG_SECURITY=y</div><div class='hunk'>@@ -729,10 +741,10 @@ CONFIG_IMA_APPRAISE=y</div><div class='ctx'> CONFIG_BUG_ON_DATA_CORRUPTION=y</div><div class='ctx'> CONFIG_CRYPTO_FIPS=y</div><div class='ctx'> CONFIG_CRYPTO_USER=m</div><div class='del'>-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set</div><div class='add'>+CONFIG_CRYPTO_SELFTESTS=y</div><div class='ctx'> CONFIG_CRYPTO_PCRYPT=m</div><div class='ctx'> CONFIG_CRYPTO_CRYPTD=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_DH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDH=m</div><div class='ctx'> CONFIG_CRYPTO_ECDSA=m</div><div class='hunk'>@@ -742,7 +754,6 @@ CONFIG_CRYPTO_AES_TI=m</div><div class='ctx'> CONFIG_CRYPTO_ANUBIS=m</div><div class='ctx'> CONFIG_CRYPTO_ARIA=m</div><div class='ctx'> CONFIG_CRYPTO_BLOWFISH=m</div><div class='del'>-CONFIG_CRYPTO_CAMELLIA=m</div><div class='ctx'> CONFIG_CRYPTO_CAST5=m</div><div class='ctx'> CONFIG_CRYPTO_CAST6=m</div><div class='ctx'> CONFIG_CRYPTO_DES=m</div><div class='hunk'>@@ -782,13 +793,11 @@ CONFIG_CRYPTO_USER_API_RNG=m</div><div class='ctx'> CONFIG_CRYPTO_USER_API_AEAD=m</div><div class='ctx'> CONFIG_CRYPTO_SHA512_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA1_S390=m</div><div class='del'>-CONFIG_CRYPTO_SHA256_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA3_256_S390=m</div><div class='ctx'> CONFIG_CRYPTO_SHA3_512_S390=m</div><div class='ctx'> CONFIG_CRYPTO_GHASH_S390=m</div><div class='ctx'> CONFIG_CRYPTO_AES_S390=m</div><div class='ctx'> CONFIG_CRYPTO_DES_S390=m</div><div class='del'>-CONFIG_CRYPTO_CHACHA_S390=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC_S390=m</div><div class='ctx'> CONFIG_ZCRYPT=m</div><div class='ctx'> CONFIG_PKEY=m</div><div class='hunk'>@@ -799,10 +808,10 @@ CONFIG_PKEY_UV=m</div><div class='ctx'> CONFIG_CRYPTO_PAES_S390=m</div><div class='ctx'> CONFIG_CRYPTO_DEV_VIRTIO=m</div><div class='ctx'> CONFIG_SYSTEM_BLACKLIST_KEYRING=y</div><div class='add'>+CONFIG_CRYPTO_KRB5=m</div><div class='add'>+CONFIG_CRYPTO_KRB5_SELFTESTS=y</div><div class='ctx'> CONFIG_CORDIC=m</div><div class='ctx'> CONFIG_PRIME_NUMBERS=m</div><div class='del'>-CONFIG_CRYPTO_LIB_CURVE25519=m</div><div class='del'>-CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m</div><div class='ctx'> CONFIG_XZ_DEC_MICROLZMA=y</div><div class='ctx'> CONFIG_DMA_CMA=y</div><div class='ctx'> CONFIG_CMA_SIZE_MBYTES=0</div><div class='head'>diff --git a/arch/s390/configs/zfcpdump_defconfig b/arch/s390/configs/zfcpdump_defconfig<br/>index 853b2326a171..8163c1702720 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/configs/zfcpdump_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/configs/zfcpdump_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/configs/zfcpdump_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/configs/zfcpdump_defconfig</a></div><div class='hunk'>@@ -70,7 +70,6 @@ CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF4=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_PANIC_ON_OOPS=y</div><div class='del'>-# CONFIG_SCHED_DEBUG is not set</div><div class='ctx'> CONFIG_RCU_CPU_STALL_TIMEOUT=60</div><div class='ctx'> # CONFIG_RCU_TRACE is not set</div><div class='ctx'> # CONFIG_FTRACE is not set</div><div class='head'>diff --git a/arch/s390/crypto/Kconfig b/arch/s390/crypto/Kconfig<br/>index 8c4db8b64fa2..e2c27588b21a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/Kconfig</a></div><div class='hunk'>@@ -4,7 +4,6 @@ menu "Accelerated Cryptographic Algorithms for CPU (s390)"</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SHA512_S390</div><div class='ctx'> 	tristate "Hash functions: SHA-384 and SHA-512"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA-384 and SHA-512 secure hash algorithms (FIPS 180)</div><div class='hunk'>@@ -15,7 +14,6 @@ config CRYPTO_SHA512_S390</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SHA1_S390</div><div class='ctx'> 	tristate "Hash functions: SHA-1"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA-1 secure hash algorithm (FIPS 180)</div><div class='hunk'>@@ -24,20 +22,8 @@ config CRYPTO_SHA1_S390</div><div class='ctx'> </div><div class='ctx'> 	  It is available as of z990.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_S390</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256"</div><div class='del'>-	depends on S390</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: s390</div><div class='del'>-</div><div class='del'>-	  It is available as of z9.</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA3_256_S390</div><div class='ctx'> 	tristate "Hash functions: SHA3-224 and SHA3-256"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA3-224 and SHA3-256 secure hash algorithms (FIPS 202)</div><div class='hunk'>@@ -48,7 +34,6 @@ config CRYPTO_SHA3_256_S390</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SHA3_512_S390</div><div class='ctx'> 	tristate "Hash functions: SHA3-384 and SHA3-512"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA3-384 and SHA3-512 secure hash algorithms (FIPS 202)</div><div class='hunk'>@@ -59,7 +44,6 @@ config CRYPTO_SHA3_512_S390</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_GHASH_S390</div><div class='ctx'> 	tristate "Hash functions: GHASH"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  GCM GHASH hash function (NIST SP800-38D)</div><div class='hunk'>@@ -70,7 +54,6 @@ config CRYPTO_GHASH_S390</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_S390</div><div class='ctx'> 	tristate "Ciphers: AES, modes: ECB, CBC, CTR, XTS, GCM"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	help</div><div class='hunk'>@@ -92,7 +75,6 @@ config CRYPTO_AES_S390</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_DES_S390</div><div class='ctx'> 	tristate "Ciphers: DES and Triple DES EDE, modes: ECB, CBC, CTR"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_LIB_DES</div><div class='hunk'>@@ -107,23 +89,8 @@ config CRYPTO_DES_S390</div><div class='ctx'> 	  As of z990 the ECB and CBC mode are hardware accelerated.</div><div class='ctx'> 	  As of z196 the CTR mode is hardware accelerated.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA_S390</div><div class='del'>-	tristate</div><div class='del'>-	depends on S390</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	default CRYPTO_LIB_CHACHA_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving cipher: ChaCha20 stream cipher (RFC 7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: s390</div><div class='del'>-</div><div class='del'>-	  It is available as of z13.</div><div class='del'>-</div><div class='ctx'> config CRYPTO_HMAC_S390</div><div class='ctx'> 	tristate "Keyed-hash message authentication code: HMAC"</div><div class='del'>-	depends on S390</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  s390 specific HMAC hardware support for SHA224, SHA256, SHA384 and</div><div class='head'>diff --git a/arch/s390/crypto/Makefile b/arch/s390/crypto/Makefile<br/>index 14dafadbcbed..21757d86cd49 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/Makefile</a></div><div class='hunk'>@@ -4,17 +4,13 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_S390) += sha1_s390.o sha_common.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_S390) += sha256_s390.o sha_common.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512_S390) += sha512_s390.o sha_common.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA3_256_S390) += sha3_256_s390.o sha_common.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA3_512_S390) += sha3_512_s390.o sha_common.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DES_S390) += des_s390.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_S390) += aes_s390.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_PAES_S390) += paes_s390.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA_S390) += chacha_s390.o</div><div class='ctx'> obj-$(CONFIG_S390_PRNG) += prng.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH_S390) += ghash_s390.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_HMAC_S390) += hmac_s390.o</div><div class='ctx'> obj-y += arch_random.o</div><div class='del'>-</div><div class='del'>-chacha_s390-y := chacha-glue.o chacha-s390.o</div><div class='head'>diff --git a/arch/s390/crypto/chacha-glue.c b/arch/s390/crypto/chacha-glue.c<br/>deleted file mode 100644<br/>index 920e9f0941e7..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/chacha-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/chacha-glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,124 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * s390 ChaCha stream cipher.</div><div class='del'>- *</div><div class='del'>- * Copyright IBM Corp. 2021</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define KMSG_COMPONENT "chacha_s390"</div><div class='del'>-#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-#include &lt;asm/fpu.h&gt;</div><div class='del'>-#include "chacha-s390.h"</div><div class='del'>-</div><div class='del'>-static void chacha20_crypt_s390(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				unsigned int nbytes, const u32 *key,</div><div class='del'>-				u32 *counter)</div><div class='del'>-{</div><div class='del'>-	DECLARE_KERNEL_FPU_ONSTACK32(vxstate);</div><div class='del'>-</div><div class='del'>-	kernel_fpu_begin(&amp;vxstate, KERNEL_VXR);</div><div class='del'>-	chacha20_vx(dst, src, nbytes, key, counter);</div><div class='del'>-	kernel_fpu_end(&amp;vxstate, KERNEL_VXR);</div><div class='del'>-</div><div class='del'>-	*counter += round_up(nbytes, CHACHA_BLOCK_SIZE) / CHACHA_BLOCK_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha20_s390(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	u32 state[CHACHA_STATE_WORDS] __aligned(16);</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	unsigned int nbytes;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	chacha_init(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		nbytes = walk.nbytes;</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = round_down(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt;= CHACHA_BLOCK_SIZE) {</div><div class='del'>-			chacha_crypt_generic(state, walk.dst.virt.addr,</div><div class='del'>-					     walk.src.virt.addr, nbytes,</div><div class='del'>-					     ctx-&gt;nrounds);</div><div class='del'>-		} else {</div><div class='del'>-			chacha20_crypt_s390(state, walk.dst.virt.addr,</div><div class='del'>-					    walk.src.virt.addr, nbytes,</div><div class='del'>-					    &amp;state[4], &amp;state[12]);</div><div class='del'>-		}</div><div class='del'>-		rc = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	/* TODO: implement hchacha_block_arch() in assembly */</div><div class='del'>-	hchacha_block_generic(state, stream, nrounds);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-		       unsigned int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	/* s390 chacha20 implementation has 20 rounds hard-coded,</div><div class='del'>-	 * it cannot handle a block of data or less, but otherwise</div><div class='del'>-	 * it can handle data of arbitrary size</div><div class='del'>-	 */</div><div class='del'>-	if (bytes &lt;= CHACHA_BLOCK_SIZE || nrounds != 20 || !cpu_has_vx())</div><div class='del'>-		chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-	else</div><div class='del'>-		chacha20_crypt_s390(state, dst, src, bytes,</div><div class='del'>-				    &amp;state[4], &amp;state[12]);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg chacha_algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-s390",</div><div class='del'>-		.base.cra_priority	= 900,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha20_s390,</div><div class='del'>-		.decrypt		= chacha20_s390,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) ?</div><div class='del'>-		crypto_register_skciphers(chacha_algs, ARRAY_SIZE(chacha_algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER))</div><div class='del'>-		crypto_unregister_skciphers(chacha_algs, ARRAY_SIZE(chacha_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(S390_CPU_FEATURE_VXRS, chacha_mod_init);</div><div class='del'>-module_exit(chacha_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("ChaCha20 stream cipher");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='head'>diff --git a/arch/s390/crypto/ghash_s390.c b/arch/s390/crypto/ghash_s390.c<br/>index 0800a2a5799f..dcbcee37cb63 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/ghash_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/ghash_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/ghash_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/ghash_s390.c</a></div><div class='hunk'>@@ -8,29 +8,28 @@</div><div class='ctx'>  * Author(s): Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cpacf.h&gt;</div><div class='add'>+#include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/cpacf.h&gt;</div><div class='del'>-</div><div class='del'>-#define GHASH_BLOCK_SIZE	16</div><div class='del'>-#define GHASH_DIGEST_SIZE	16</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='del'>-struct ghash_ctx {</div><div class='add'>+struct s390_ghash_ctx {</div><div class='ctx'> 	u8 key[GHASH_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ghash_desc_ctx {</div><div class='add'>+struct s390_ghash_desc_ctx {</div><div class='ctx'> 	u8 icv[GHASH_BLOCK_SIZE];</div><div class='ctx'> 	u8 key[GHASH_BLOCK_SIZE];</div><div class='del'>-	u8 buffer[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct s390_ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct s390_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='ctx'> 	memset(dctx, 0, sizeof(*dctx));</div><div class='ctx'> 	memcpy(dctx-&gt;key, ctx-&gt;key, GHASH_BLOCK_SIZE);</div><div class='hunk'>@@ -41,7 +40,7 @@ static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> static int ghash_setkey(struct crypto_shash *tfm,</div><div class='ctx'> 			const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_ctx *ctx = crypto_shash_ctx(tfm);</div><div class='add'>+	struct s390_ghash_ctx *ctx = crypto_shash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	if (keylen != GHASH_BLOCK_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -54,80 +53,71 @@ static int ghash_setkey(struct crypto_shash *tfm,</div><div class='ctx'> static int ghash_update(struct shash_desc *desc,</div><div class='ctx'> 			 const u8 *src, unsigned int srclen)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='add'>+	struct s390_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	unsigned int n;</div><div class='del'>-	u8 *buf = dctx-&gt;buffer;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		u8 *pos = buf + (GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='ctx'> </div><div class='del'>-		n = min(srclen, dctx-&gt;bytes);</div><div class='del'>-		dctx-&gt;bytes -= n;</div><div class='del'>-		srclen -= n;</div><div class='del'>-</div><div class='del'>-		memcpy(pos, src, n);</div><div class='del'>-		src += n;</div><div class='add'>+	n = srclen &amp; ~(GHASH_BLOCK_SIZE - 1);</div><div class='add'>+	cpacf_kimd(CPACF_KIMD_GHASH, dctx, src, n);</div><div class='add'>+	return srclen - n;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (!dctx-&gt;bytes) {</div><div class='del'>-			cpacf_kimd(CPACF_KIMD_GHASH, dctx, buf,</div><div class='del'>-				   GHASH_BLOCK_SIZE);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+static void ghash_flush(struct s390_ghash_desc_ctx *dctx, const u8 *src,</div><div class='add'>+			unsigned int len)</div><div class='add'>+{</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 buf[GHASH_BLOCK_SIZE] = {};</div><div class='ctx'> </div><div class='del'>-	n = srclen &amp; ~(GHASH_BLOCK_SIZE - 1);</div><div class='del'>-	if (n) {</div><div class='del'>-		cpacf_kimd(CPACF_KIMD_GHASH, dctx, src, n);</div><div class='del'>-		src += n;</div><div class='del'>-		srclen -= n;</div><div class='add'>+		memcpy(buf, src, len);</div><div class='add'>+		cpacf_kimd(CPACF_KIMD_GHASH, dctx, buf, GHASH_BLOCK_SIZE);</div><div class='add'>+		memzero_explicit(buf, sizeof(buf));</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (srclen) {</div><div class='del'>-		dctx-&gt;bytes = GHASH_BLOCK_SIZE - srclen;</div><div class='del'>-		memcpy(buf, src, srclen);</div><div class='del'>-	}</div><div class='add'>+static int ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+		       unsigned int len, u8 *dst)</div><div class='add'>+{</div><div class='add'>+	struct s390_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='add'>+	ghash_flush(dctx, src, len);</div><div class='add'>+	memcpy(dst, dctx-&gt;icv, GHASH_BLOCK_SIZE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_flush(struct ghash_desc_ctx *dctx)</div><div class='add'>+static int ghash_export(struct shash_desc *desc, void *out)</div><div class='ctx'> {</div><div class='del'>-	u8 *buf = dctx-&gt;buffer;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		u8 *pos = buf + (GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='del'>-</div><div class='del'>-		memset(pos, 0, dctx-&gt;bytes);</div><div class='del'>-		cpacf_kimd(CPACF_KIMD_GHASH, dctx, buf, GHASH_BLOCK_SIZE);</div><div class='del'>-		dctx-&gt;bytes = 0;</div><div class='del'>-	}</div><div class='add'>+	struct s390_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='add'>+	memcpy(out, dctx-&gt;icv, GHASH_DIGEST_SIZE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int ghash_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	int ret;</div><div class='add'>+	struct s390_ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct s390_ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	ret = ghash_flush(dctx);</div><div class='del'>-	if (!ret)</div><div class='del'>-		memcpy(dst, dctx-&gt;icv, GHASH_BLOCK_SIZE);</div><div class='del'>-	return ret;</div><div class='add'>+	memcpy(dctx-&gt;icv, in, GHASH_DIGEST_SIZE);</div><div class='add'>+	memcpy(dctx-&gt;key, ctx-&gt;key, GHASH_BLOCK_SIZE);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.digestsize	= GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init		= ghash_init,</div><div class='ctx'> 	.update		= ghash_update,</div><div class='del'>-	.final		= ghash_final,</div><div class='add'>+	.finup		= ghash_finup,</div><div class='ctx'> 	.setkey		= ghash_setkey,</div><div class='del'>-	.descsize	= sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.export		= ghash_export,</div><div class='add'>+	.import		= ghash_import,</div><div class='add'>+	.statesize	= sizeof(struct ghash_desc_ctx),</div><div class='add'>+	.descsize	= sizeof(struct s390_ghash_desc_ctx),</div><div class='ctx'> 	.base		= {</div><div class='ctx'> 		.cra_name		= "ghash",</div><div class='ctx'> 		.cra_driver_name	= "ghash-s390",</div><div class='ctx'> 		.cra_priority		= 300,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= GHASH_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize		= sizeof(struct ghash_ctx),</div><div class='add'>+		.cra_ctxsize		= sizeof(struct s390_ghash_ctx),</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/arch/s390/crypto/hmac_s390.c b/arch/s390/crypto/hmac_s390.c<br/>index bba9a818dfdc..93a1098d9f8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/hmac_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/hmac_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/hmac_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/hmac_s390.c</a></div><div class='hunk'>@@ -9,10 +9,14 @@</div><div class='ctx'> #define pr_fmt(fmt)	KMSG_COMPONENT ": " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpacf.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/hmac.h&gt;</div><div class='add'>+#include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * KMAC param block layout for sha2 function codes:</div><div class='hunk'>@@ -71,32 +75,31 @@ union s390_kmac_gr0 {</div><div class='ctx'> struct s390_kmac_sha2_ctx {</div><div class='ctx'> 	u8 param[MAX_DIGEST_SIZE + MAX_IMBL_SIZE + MAX_BLOCK_SIZE];</div><div class='ctx'> 	union s390_kmac_gr0 gr0;</div><div class='del'>-	u8 buf[MAX_BLOCK_SIZE];</div><div class='del'>-	unsigned int buflen;</div><div class='add'>+	u64 buflen[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * kmac_sha2_set_imbl - sets the input message bit-length based on the blocksize</div><div class='ctx'>  */</div><div class='del'>-static inline void kmac_sha2_set_imbl(u8 *param, unsigned int buflen,</div><div class='del'>-				      unsigned int blocksize)</div><div class='add'>+static inline void kmac_sha2_set_imbl(u8 *param, u64 buflen_lo,</div><div class='add'>+				      u64 buflen_hi, unsigned int blocksize)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *imbl = param + SHA2_IMBL_OFFSET(blocksize);</div><div class='ctx'> </div><div class='ctx'> 	switch (blocksize) {</div><div class='ctx'> 	case SHA256_BLOCK_SIZE:</div><div class='del'>-		*(u64 *)imbl = (u64)buflen * BITS_PER_BYTE;</div><div class='add'>+		*(u64 *)imbl = buflen_lo * BITS_PER_BYTE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SHA512_BLOCK_SIZE:</div><div class='del'>-		*(u128 *)imbl = (u128)buflen * BITS_PER_BYTE;</div><div class='add'>+		*(u128 *)imbl = (((u128)buflen_hi &lt;&lt; 64) + buflen_lo) &lt;&lt; 3;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hash_key(const u8 *in, unsigned int inlen,</div><div class='del'>-		    u8 *digest, unsigned int digestsize)</div><div class='add'>+static int hash_data(const u8 *in, unsigned int inlen,</div><div class='add'>+		     u8 *digest, unsigned int digestsize, bool final)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long func;</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -123,19 +126,23 @@ static int hash_key(const u8 *in, unsigned int inlen,</div><div class='ctx'> </div><div class='ctx'> 	switch (digestsize) {</div><div class='ctx'> 	case SHA224_DIGEST_SIZE:</div><div class='del'>-		func = CPACF_KLMD_SHA_256;</div><div class='add'>+		func = final ? CPACF_KLMD_SHA_256 : CPACF_KIMD_SHA_256;</div><div class='ctx'> 		PARAM_INIT(256, 224, inlen * 8);</div><div class='add'>+		if (!final)</div><div class='add'>+			digestsize = SHA256_DIGEST_SIZE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SHA256_DIGEST_SIZE:</div><div class='del'>-		func = CPACF_KLMD_SHA_256;</div><div class='add'>+		func = final ? CPACF_KLMD_SHA_256 : CPACF_KIMD_SHA_256;</div><div class='ctx'> 		PARAM_INIT(256, 256, inlen * 8);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SHA384_DIGEST_SIZE:</div><div class='del'>-		func = CPACF_KLMD_SHA_512;</div><div class='add'>+		func = final ? CPACF_KLMD_SHA_512 : CPACF_KIMD_SHA_512;</div><div class='ctx'> 		PARAM_INIT(512, 384, inlen * 8);</div><div class='add'>+		if (!final)</div><div class='add'>+			digestsize = SHA512_DIGEST_SIZE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SHA512_DIGEST_SIZE:</div><div class='del'>-		func = CPACF_KLMD_SHA_512;</div><div class='add'>+		func = final ? CPACF_KLMD_SHA_512 : CPACF_KIMD_SHA_512;</div><div class='ctx'> 		PARAM_INIT(512, 512, inlen * 8);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -151,6 +158,12 @@ static int hash_key(const u8 *in, unsigned int inlen,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hash_key(const u8 *in, unsigned int inlen,</div><div class='add'>+		    u8 *digest, unsigned int digestsize)</div><div class='add'>+{</div><div class='add'>+	return hash_data(in, inlen, digest, digestsize, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int s390_hmac_sha2_setkey(struct crypto_shash *tfm,</div><div class='ctx'> 				 const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -176,7 +189,8 @@ static int s390_hmac_sha2_init(struct shash_desc *desc)</div><div class='ctx'> 	memcpy(ctx-&gt;param + SHA2_KEY_OFFSET(bs),</div><div class='ctx'> 	       tfm_ctx-&gt;key, bs);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;buflen = 0;</div><div class='add'>+	ctx-&gt;buflen[0] = 0;</div><div class='add'>+	ctx-&gt;buflen[1] = 0;</div><div class='ctx'> 	ctx-&gt;gr0.reg = 0;</div><div class='ctx'> 	switch (crypto_shash_digestsize(desc-&gt;tfm)) {</div><div class='ctx'> 	case SHA224_DIGEST_SIZE:</div><div class='hunk'>@@ -203,48 +217,31 @@ static int s390_hmac_sha2_update(struct shash_desc *desc,</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_kmac_sha2_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> 	unsigned int bs = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='del'>-	unsigned int offset, n;</div><div class='del'>-</div><div class='del'>-	/* check current buffer */</div><div class='del'>-	offset = ctx-&gt;buflen % bs;</div><div class='del'>-	ctx-&gt;buflen += len;</div><div class='del'>-	if (offset + len &lt; bs)</div><div class='del'>-		goto store;</div><div class='del'>-</div><div class='del'>-	/* process one stored block */</div><div class='del'>-	if (offset) {</div><div class='del'>-		n = bs - offset;</div><div class='del'>-		memcpy(ctx-&gt;buf + offset, data, n);</div><div class='del'>-		ctx-&gt;gr0.iimp = 1;</div><div class='del'>-		_cpacf_kmac(&amp;ctx-&gt;gr0.reg, ctx-&gt;param, ctx-&gt;buf, bs);</div><div class='del'>-		data += n;</div><div class='del'>-		len -= n;</div><div class='del'>-		offset = 0;</div><div class='del'>-	}</div><div class='del'>-	/* process as many blocks as possible */</div><div class='del'>-	if (len &gt;= bs) {</div><div class='del'>-		n = (len / bs) * bs;</div><div class='del'>-		ctx-&gt;gr0.iimp = 1;</div><div class='del'>-		_cpacf_kmac(&amp;ctx-&gt;gr0.reg, ctx-&gt;param, data, n);</div><div class='del'>-		data += n;</div><div class='del'>-		len -= n;</div><div class='del'>-	}</div><div class='del'>-store:</div><div class='del'>-	/* store incomplete block in buffer */</div><div class='del'>-	if (len)</div><div class='del'>-		memcpy(ctx-&gt;buf + offset, data, len);</div><div class='add'>+	unsigned int n = round_down(len, bs);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	ctx-&gt;buflen[0] += n;</div><div class='add'>+	if (ctx-&gt;buflen[0] &lt; n)</div><div class='add'>+		ctx-&gt;buflen[1]++;</div><div class='add'>+</div><div class='add'>+	/* process as many blocks as possible */</div><div class='add'>+	ctx-&gt;gr0.iimp = 1;</div><div class='add'>+	_cpacf_kmac(&amp;ctx-&gt;gr0.reg, ctx-&gt;param, data, n);</div><div class='add'>+	return len - n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int s390_hmac_sha2_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int s390_hmac_sha2_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+				unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_kmac_sha2_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> 	unsigned int bs = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='ctx'> </div><div class='add'>+	ctx-&gt;buflen[0] += len;</div><div class='add'>+	if (ctx-&gt;buflen[0] &lt; len)</div><div class='add'>+		ctx-&gt;buflen[1]++;</div><div class='add'>+</div><div class='ctx'> 	ctx-&gt;gr0.iimp = 0;</div><div class='del'>-	kmac_sha2_set_imbl(ctx-&gt;param, ctx-&gt;buflen, bs);</div><div class='del'>-	_cpacf_kmac(&amp;ctx-&gt;gr0.reg, ctx-&gt;param, ctx-&gt;buf, ctx-&gt;buflen % bs);</div><div class='add'>+	kmac_sha2_set_imbl(ctx-&gt;param, ctx-&gt;buflen[0], ctx-&gt;buflen[1], bs);</div><div class='add'>+	_cpacf_kmac(&amp;ctx-&gt;gr0.reg, ctx-&gt;param, src, len);</div><div class='ctx'> 	memcpy(out, ctx-&gt;param, crypto_shash_digestsize(desc-&gt;tfm));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -262,7 +259,7 @@ static int s390_hmac_sha2_digest(struct shash_desc *desc,</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;gr0.iimp = 0;</div><div class='del'>-	kmac_sha2_set_imbl(ctx-&gt;param, len,</div><div class='add'>+	kmac_sha2_set_imbl(ctx-&gt;param, len, 0,</div><div class='ctx'> 			   crypto_shash_blocksize(desc-&gt;tfm));</div><div class='ctx'> 	_cpacf_kmac(&amp;ctx-&gt;gr0.reg, ctx-&gt;param, data, len);</div><div class='ctx'> 	memcpy(out, ctx-&gt;param, ds);</div><div class='hunk'>@@ -270,22 +267,89 @@ static int s390_hmac_sha2_digest(struct shash_desc *desc,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define S390_HMAC_SHA2_ALG(x) {						\</div><div class='add'>+static int s390_hmac_export_zero(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+	u8 ipad[SHA512_BLOCK_SIZE];</div><div class='add'>+	struct s390_hmac_ctx *ctx;</div><div class='add'>+	unsigned int bs;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	ctx = crypto_shash_ctx(tfm);</div><div class='add'>+	bs = crypto_shash_blocksize(tfm);</div><div class='add'>+	for (i = 0; i &lt; bs; i++)</div><div class='add'>+		ipad[i] = ctx-&gt;key[i] ^ HMAC_IPAD_VALUE;</div><div class='add'>+</div><div class='add'>+	err = hash_data(ipad, bs, out, crypto_shash_digestsize(tfm), false);</div><div class='add'>+	memzero_explicit(ipad, sizeof(ipad));</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int s390_hmac_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct s390_kmac_sha2_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	unsigned int bs = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='add'>+	unsigned int ds = bs / 2;</div><div class='add'>+	union {</div><div class='add'>+		u8 *u8;</div><div class='add'>+		u64 *u64;</div><div class='add'>+	} p = { .u8 = out };</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;gr0.ikp)</div><div class='add'>+		err = s390_hmac_export_zero(desc, out);</div><div class='add'>+	else</div><div class='add'>+		memcpy(p.u8, ctx-&gt;param, ds);</div><div class='add'>+	p.u8 += ds;</div><div class='add'>+	put_unaligned(ctx-&gt;buflen[0], p.u64++);</div><div class='add'>+	if (ds == SHA512_DIGEST_SIZE)</div><div class='add'>+		put_unaligned(ctx-&gt;buflen[1], p.u64);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int s390_hmac_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct s390_kmac_sha2_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	unsigned int bs = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='add'>+	unsigned int ds = bs / 2;</div><div class='add'>+	union {</div><div class='add'>+		const u8 *u8;</div><div class='add'>+		const u64 *u64;</div><div class='add'>+	} p = { .u8 = in };</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = s390_hmac_sha2_init(desc);</div><div class='add'>+	memcpy(ctx-&gt;param, p.u8, ds);</div><div class='add'>+	p.u8 += ds;</div><div class='add'>+	ctx-&gt;buflen[0] = get_unaligned(p.u64++);</div><div class='add'>+	if (ds == SHA512_DIGEST_SIZE)</div><div class='add'>+		ctx-&gt;buflen[1] = get_unaligned(p.u64);</div><div class='add'>+	if (ctx-&gt;buflen[0] | ctx-&gt;buflen[1])</div><div class='add'>+		ctx-&gt;gr0.ikp = 1;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define S390_HMAC_SHA2_ALG(x, ss) {					\</div><div class='ctx'> 	.fc = CPACF_KMAC_HMAC_SHA_##x,					\</div><div class='ctx'> 	.alg = {							\</div><div class='ctx'> 		.init = s390_hmac_sha2_init,				\</div><div class='ctx'> 		.update = s390_hmac_sha2_update,			\</div><div class='del'>-		.final = s390_hmac_sha2_final,				\</div><div class='add'>+		.finup = s390_hmac_sha2_finup,				\</div><div class='ctx'> 		.digest = s390_hmac_sha2_digest,			\</div><div class='ctx'> 		.setkey = s390_hmac_sha2_setkey,			\</div><div class='add'>+		.export = s390_hmac_export,				\</div><div class='add'>+		.import = s390_hmac_import,				\</div><div class='ctx'> 		.descsize = sizeof(struct s390_kmac_sha2_ctx),		\</div><div class='ctx'> 		.halg = {						\</div><div class='add'>+			.statesize = ss,				\</div><div class='ctx'> 			.digestsize = SHA##x##_DIGEST_SIZE,		\</div><div class='ctx'> 			.base = {					\</div><div class='ctx'> 				.cra_name = "hmac(sha" #x ")",		\</div><div class='ctx'> 				.cra_driver_name = "hmac_s390_sha" #x,	\</div><div class='ctx'> 				.cra_blocksize = SHA##x##_BLOCK_SIZE,	\</div><div class='ctx'> 				.cra_priority = 400,			\</div><div class='add'>+				.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY | \</div><div class='add'>+					     CRYPTO_AHASH_ALG_FINUP_MAX, \</div><div class='ctx'> 				.cra_ctxsize = sizeof(struct s390_hmac_ctx), \</div><div class='ctx'> 				.cra_module = THIS_MODULE,		\</div><div class='ctx'> 			},						\</div><div class='hunk'>@@ -298,10 +362,10 @@ static struct s390_hmac_alg {</div><div class='ctx'> 	unsigned int fc;</div><div class='ctx'> 	struct shash_alg alg;</div><div class='ctx'> } s390_hmac_algs[] = {</div><div class='del'>-	S390_HMAC_SHA2_ALG(224),</div><div class='del'>-	S390_HMAC_SHA2_ALG(256),</div><div class='del'>-	S390_HMAC_SHA2_ALG(384),</div><div class='del'>-	S390_HMAC_SHA2_ALG(512),</div><div class='add'>+	S390_HMAC_SHA2_ALG(224, sizeof(struct crypto_sha256_state)),</div><div class='add'>+	S390_HMAC_SHA2_ALG(256, sizeof(struct crypto_sha256_state)),</div><div class='add'>+	S390_HMAC_SHA2_ALG(384, SHA512_STATE_SIZE),</div><div class='add'>+	S390_HMAC_SHA2_ALG(512, SHA512_STATE_SIZE),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __always_inline void _s390_hmac_algs_unregister(void)</div><div class='head'>diff --git a/arch/s390/crypto/paes_s390.c b/arch/s390/crypto/paes_s390.c<br/>index 511093713a6f..8a340c16acb4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/paes_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/paes_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/paes_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/paes_s390.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  * s390 implementation of the AES Cipher Algorithm with protected keys.</div><div class='ctx'>  *</div><div class='ctx'>  * s390 Version:</div><div class='del'>- *   Copyright IBM Corp. 2017, 2023</div><div class='add'>+ *   Copyright IBM Corp. 2017, 2025</div><div class='ctx'>  *   Author(s): Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;</div><div class='ctx'>  *		Harald Freudenberger &lt;freude@de.ibm.com&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -13,16 +13,18 @@</div><div class='ctx'> #define KMSG_COMPONENT "paes_s390"</div><div class='ctx'> #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;linux/bug.h&gt;</div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/engine.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/xts.h&gt;</div><div class='ctx'> #include &lt;asm/cpacf.h&gt;</div><div class='hunk'>@@ -44,23 +46,61 @@ static DEFINE_MUTEX(ctrblk_lock);</div><div class='ctx'> </div><div class='ctx'> static cpacf_mask_t km_functions, kmc_functions, kmctr_functions;</div><div class='ctx'> </div><div class='add'>+static struct crypto_engine *paes_crypto_engine;</div><div class='add'>+#define MAX_QLEN 10</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * protected key specific stuff</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> struct paes_protkey {</div><div class='ctx'> 	u32 type;</div><div class='ctx'> 	u32 len;</div><div class='ctx'> 	u8 protkey[PXTS_256_PROTKEY_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct key_blob {</div><div class='del'>-	/*</div><div class='del'>-	 * Small keys will be stored in the keybuf. Larger keys are</div><div class='del'>-	 * stored in extra allocated memory. In both cases does</div><div class='del'>-	 * key point to the memory where the key is stored.</div><div class='del'>-	 * The code distinguishes by checking keylen against</div><div class='del'>-	 * sizeof(keybuf). See the two following helper functions.</div><div class='del'>-	 */</div><div class='del'>-	u8 *key;</div><div class='del'>-	u8 keybuf[128];</div><div class='add'>+#define PK_STATE_NO_KEY		     0</div><div class='add'>+#define PK_STATE_CONVERT_IN_PROGRESS 1</div><div class='add'>+#define PK_STATE_VALID		     2</div><div class='add'>+</div><div class='add'>+struct s390_paes_ctx {</div><div class='add'>+	/* source key material used to derive a protected key from */</div><div class='add'>+	u8 keybuf[PAES_MAX_KEYSIZE];</div><div class='add'>+	unsigned int keylen;</div><div class='add'>+</div><div class='add'>+	/* cpacf function code to use with this protected key type */</div><div class='add'>+	long fc;</div><div class='add'>+</div><div class='add'>+	/* nr of requests enqueued via crypto engine which use this tfm ctx */</div><div class='add'>+	atomic_t via_engine_ctr;</div><div class='add'>+</div><div class='add'>+	/* spinlock to atomic read/update all the following fields */</div><div class='add'>+	spinlock_t pk_lock;</div><div class='add'>+</div><div class='add'>+	/* see PK_STATE* defines above, &lt; 0 holds convert failure rc  */</div><div class='add'>+	int pk_state;</div><div class='add'>+	/* if state is valid, pk holds the protected key */</div><div class='add'>+	struct paes_protkey pk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct s390_pxts_ctx {</div><div class='add'>+	/* source key material used to derive a protected key from */</div><div class='add'>+	u8 keybuf[2 * PAES_MAX_KEYSIZE];</div><div class='ctx'> 	unsigned int keylen;</div><div class='add'>+</div><div class='add'>+	/* cpacf function code to use with this protected key type */</div><div class='add'>+	long fc;</div><div class='add'>+</div><div class='add'>+	/* nr of requests enqueued via crypto engine which use this tfm ctx */</div><div class='add'>+	atomic_t via_engine_ctr;</div><div class='add'>+</div><div class='add'>+	/* spinlock to atomic read/update all the following fields */</div><div class='add'>+	spinlock_t pk_lock;</div><div class='add'>+</div><div class='add'>+	/* see PK_STATE* defines above, &lt; 0 holds convert failure rc  */</div><div class='add'>+	int pk_state;</div><div class='add'>+	/* if state is valid, pk[] hold(s) the protected key(s) */</div><div class='add'>+	struct paes_protkey pk[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -89,214 +129,370 @@ static inline u32 make_clrkey_token(const u8 *ck, size_t cklen, u8 *dest)</div><div class='ctx'> 	return sizeof(*token) + cklen;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int _key_to_kb(struct key_blob *kb,</div><div class='del'>-			     const u8 *key,</div><div class='del'>-			     unsigned int keylen)</div><div class='add'>+/*</div><div class='add'>+ * paes_ctx_setkey() - Set key value into context, maybe construct</div><div class='add'>+ * a clear key token digestible by pkey from a clear key value.</div><div class='add'>+ */</div><div class='add'>+static inline int paes_ctx_setkey(struct s390_paes_ctx *ctx,</div><div class='add'>+				  const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='add'>+	if (keylen &gt; sizeof(ctx-&gt;keybuf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	switch (keylen) {</div><div class='ctx'> 	case 16:</div><div class='ctx'> 	case 24:</div><div class='ctx'> 	case 32:</div><div class='ctx'> 		/* clear key value, prepare pkey clear key token in keybuf */</div><div class='del'>-		memset(kb-&gt;keybuf, 0, sizeof(kb-&gt;keybuf));</div><div class='del'>-		kb-&gt;keylen = make_clrkey_token(key, keylen, kb-&gt;keybuf);</div><div class='del'>-		kb-&gt;key = kb-&gt;keybuf;</div><div class='add'>+		memset(ctx-&gt;keybuf, 0, sizeof(ctx-&gt;keybuf));</div><div class='add'>+		ctx-&gt;keylen = make_clrkey_token(key, keylen, ctx-&gt;keybuf);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* other key material, let pkey handle this */</div><div class='del'>-		if (keylen &lt;= sizeof(kb-&gt;keybuf))</div><div class='del'>-			kb-&gt;key = kb-&gt;keybuf;</div><div class='del'>-		else {</div><div class='del'>-			kb-&gt;key = kmalloc(keylen, GFP_KERNEL);</div><div class='del'>-			if (!kb-&gt;key)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-		memcpy(kb-&gt;key, key, keylen);</div><div class='del'>-		kb-&gt;keylen = keylen;</div><div class='add'>+		memcpy(ctx-&gt;keybuf, key, keylen);</div><div class='add'>+		ctx-&gt;keylen = keylen;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int _xts_key_to_kb(struct key_blob *kb,</div><div class='del'>-				 const u8 *key,</div><div class='del'>-				 unsigned int keylen)</div><div class='add'>+/*</div><div class='add'>+ * pxts_ctx_setkey() - Set key value into context, maybe construct</div><div class='add'>+ * a clear key token digestible by pkey from a clear key value.</div><div class='add'>+ */</div><div class='add'>+static inline int pxts_ctx_setkey(struct s390_pxts_ctx *ctx,</div><div class='add'>+				  const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='ctx'> 	size_t cklen = keylen / 2;</div><div class='ctx'> </div><div class='del'>-	memset(kb-&gt;keybuf, 0, sizeof(kb-&gt;keybuf));</div><div class='add'>+	if (keylen &gt; sizeof(ctx-&gt;keybuf))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (keylen) {</div><div class='ctx'> 	case 32:</div><div class='ctx'> 	case 64:</div><div class='ctx'> 		/* clear key value, prepare pkey clear key tokens in keybuf */</div><div class='del'>-		kb-&gt;key = kb-&gt;keybuf;</div><div class='del'>-		kb-&gt;keylen  = make_clrkey_token(key, cklen, kb-&gt;key);</div><div class='del'>-		kb-&gt;keylen += make_clrkey_token(key + cklen, cklen,</div><div class='del'>-						kb-&gt;key + kb-&gt;keylen);</div><div class='add'>+		memset(ctx-&gt;keybuf, 0, sizeof(ctx-&gt;keybuf));</div><div class='add'>+		ctx-&gt;keylen = make_clrkey_token(key, cklen, ctx-&gt;keybuf);</div><div class='add'>+		ctx-&gt;keylen += make_clrkey_token(key + cklen, cklen,</div><div class='add'>+						 ctx-&gt;keybuf + ctx-&gt;keylen);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* other key material, let pkey handle this */</div><div class='del'>-		if (keylen &lt;= sizeof(kb-&gt;keybuf)) {</div><div class='del'>-			kb-&gt;key = kb-&gt;keybuf;</div><div class='del'>-		} else {</div><div class='del'>-			kb-&gt;key = kmalloc(keylen, GFP_KERNEL);</div><div class='del'>-			if (!kb-&gt;key)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-		memcpy(kb-&gt;key, key, keylen);</div><div class='del'>-		kb-&gt;keylen = keylen;</div><div class='add'>+		memcpy(ctx-&gt;keybuf, key, keylen);</div><div class='add'>+		ctx-&gt;keylen = keylen;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void _free_kb_keybuf(struct key_blob *kb)</div><div class='add'>+/*</div><div class='add'>+ * Convert the raw key material into a protected key via PKEY api.</div><div class='add'>+ * This function may sleep - don't call in non-sleeping context.</div><div class='add'>+ */</div><div class='add'>+static inline int convert_key(const u8 *key, unsigned int keylen,</div><div class='add'>+			      struct paes_protkey *pk)</div><div class='ctx'> {</div><div class='del'>-	if (kb-&gt;key &amp;&amp; kb-&gt;key != kb-&gt;keybuf</div><div class='del'>-	    &amp;&amp; kb-&gt;keylen &gt; sizeof(kb-&gt;keybuf)) {</div><div class='del'>-		kfree_sensitive(kb-&gt;key);</div><div class='del'>-		kb-&gt;key = NULL;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	pk-&gt;len = sizeof(pk-&gt;protkey);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In case of a busy card retry with increasing delay</div><div class='add'>+	 * of 200, 400, 800 and 1600 ms - in total 3 s.</div><div class='add'>+	 */</div><div class='add'>+	for (rc = -EIO, i = 0; rc &amp;&amp; i &lt; 5; i++) {</div><div class='add'>+		if (rc == -EBUSY &amp;&amp; msleep_interruptible((1 &lt;&lt; i) * 100)) {</div><div class='add'>+			rc = -EINTR;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		rc = pkey_key2protkey(key, keylen,</div><div class='add'>+				      pk-&gt;protkey, &amp;pk-&gt;len, &amp;pk-&gt;type,</div><div class='add'>+				      PKEY_XFLAG_NOMEMALLOC);</div><div class='ctx'> 	}</div><div class='del'>-	memzero_explicit(kb-&gt;keybuf, sizeof(kb-&gt;keybuf));</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct s390_paes_ctx {</div><div class='del'>-	struct key_blob kb;</div><div class='add'>+/*</div><div class='add'>+ * (Re-)Convert the raw key material from the ctx into a protected key</div><div class='add'>+ * via convert_key() function. Update the pk_state, pk_type, pk_len</div><div class='add'>+ * and the protected key in the tfm context.</div><div class='add'>+ * Please note this function may be invoked concurrently with the very</div><div class='add'>+ * same tfm context. The pk_lock spinlock in the context ensures an</div><div class='add'>+ * atomic update of the pk and the pk state but does not guarantee any</div><div class='add'>+ * order of update. So a fresh converted valid protected key may get</div><div class='add'>+ * updated with an 'old' expired key value. As the cpacf instructions</div><div class='add'>+ * detect this, refuse to operate with an invalid key and the calling</div><div class='add'>+ * code triggers a (re-)conversion this does no harm. This may lead to</div><div class='add'>+ * unnecessary additional conversion but never to invalid data on en-</div><div class='add'>+ * or decrypt operations.</div><div class='add'>+ */</div><div class='add'>+static int paes_convert_key(struct s390_paes_ctx *ctx)</div><div class='add'>+{</div><div class='ctx'> 	struct paes_protkey pk;</div><div class='del'>-	spinlock_t pk_lock;</div><div class='del'>-	unsigned long fc;</div><div class='del'>-};</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-struct s390_pxts_ctx {</div><div class='del'>-	struct key_blob kb;</div><div class='del'>-	struct paes_protkey pk[2];</div><div class='del'>-	spinlock_t pk_lock;</div><div class='del'>-	unsigned long fc;</div><div class='del'>-};</div><div class='add'>+	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	ctx-&gt;pk_state = PK_STATE_CONVERT_IN_PROGRESS;</div><div class='add'>+	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> </div><div class='del'>-static inline int __paes_keyblob2pkey(const u8 *key, unsigned int keylen,</div><div class='del'>-				      struct paes_protkey *pk)</div><div class='del'>-{</div><div class='del'>-	int i, rc = -EIO;</div><div class='add'>+	rc = convert_key(ctx-&gt;keybuf, ctx-&gt;keylen, &amp;pk);</div><div class='ctx'> </div><div class='del'>-	/* try three times in case of busy card */</div><div class='del'>-	for (i = 0; rc &amp;&amp; i &lt; 3; i++) {</div><div class='del'>-		if (rc == -EBUSY &amp;&amp; in_task()) {</div><div class='del'>-			if (msleep_interruptible(1000))</div><div class='del'>-				return -EINTR;</div><div class='del'>-		}</div><div class='del'>-		rc = pkey_key2protkey(key, keylen, pk-&gt;protkey, &amp;pk-&gt;len,</div><div class='del'>-				      &amp;pk-&gt;type);</div><div class='add'>+	/* update context */</div><div class='add'>+	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	if (rc) {</div><div class='add'>+		ctx-&gt;pk_state = rc;</div><div class='add'>+	} else {</div><div class='add'>+		ctx-&gt;pk_state = PK_STATE_VALID;</div><div class='add'>+		ctx-&gt;pk = pk;</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> </div><div class='add'>+	memzero_explicit(&amp;pk, sizeof(pk));</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int __paes_convert_key(struct s390_paes_ctx *ctx)</div><div class='add'>+/*</div><div class='add'>+ * (Re-)Convert the raw xts key material from the ctx into a</div><div class='add'>+ * protected key via convert_key() function. Update the pk_state,</div><div class='add'>+ * pk_type, pk_len and the protected key in the tfm context.</div><div class='add'>+ * See also comments on function paes_convert_key.</div><div class='add'>+ */</div><div class='add'>+static int pxts_convert_key(struct s390_pxts_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	struct paes_protkey pk;</div><div class='add'>+	struct paes_protkey pk0, pk1;</div><div class='add'>+	size_t split_keylen;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	pk.len = sizeof(pk.protkey);</div><div class='del'>-	rc = __paes_keyblob2pkey(ctx-&gt;kb.key, ctx-&gt;kb.keylen, &amp;pk);</div><div class='add'>+	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	ctx-&gt;pk_state = PK_STATE_CONVERT_IN_PROGRESS;</div><div class='add'>+	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+</div><div class='add'>+	rc = convert_key(ctx-&gt;keybuf, ctx-&gt;keylen, &amp;pk0);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	switch (pk0.type) {</div><div class='add'>+	case PKEY_KEYTYPE_AES_128:</div><div class='add'>+	case PKEY_KEYTYPE_AES_256:</div><div class='add'>+		/* second keytoken required */</div><div class='add'>+		if (ctx-&gt;keylen % 2) {</div><div class='add'>+			rc = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		split_keylen = ctx-&gt;keylen / 2;</div><div class='add'>+		rc = convert_key(ctx-&gt;keybuf + split_keylen,</div><div class='add'>+				 split_keylen, &amp;pk1);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+		if (pk0.type != pk1.type) {</div><div class='add'>+			rc = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_XTS_128:</div><div class='add'>+	case PKEY_KEYTYPE_AES_XTS_256:</div><div class='add'>+		/* single key */</div><div class='add'>+		pk1.type = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* unsupported protected keytype */</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	/* update context */</div><div class='ctx'> 	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	memcpy(&amp;ctx-&gt;pk, &amp;pk, sizeof(pk));</div><div class='add'>+	if (rc) {</div><div class='add'>+		ctx-&gt;pk_state = rc;</div><div class='add'>+	} else {</div><div class='add'>+		ctx-&gt;pk_state = PK_STATE_VALID;</div><div class='add'>+		ctx-&gt;pk[0] = pk0;</div><div class='add'>+		ctx-&gt;pk[1] = pk1;</div><div class='add'>+	}</div><div class='ctx'> 	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	memzero_explicit(&amp;pk0, sizeof(pk0));</div><div class='add'>+	memzero_explicit(&amp;pk1, sizeof(pk1));</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ecb_paes_init(struct crypto_skcipher *tfm)</div><div class='del'>-{</div><div class='del'>-	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+/*</div><div class='add'>+ * PAES ECB implementation</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;kb.key = NULL;</div><div class='del'>-	spin_lock_init(&amp;ctx-&gt;pk_lock);</div><div class='add'>+struct ecb_param {</div><div class='add'>+	u8 key[PAES_256_PROTKEY_SIZE];</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+struct s390_pecb_req_ctx {</div><div class='add'>+	unsigned long modifier;</div><div class='add'>+	struct skcipher_walk walk;</div><div class='add'>+	bool param_init_done;</div><div class='add'>+	struct ecb_param param;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void ecb_paes_exit(struct crypto_skcipher *tfm)</div><div class='add'>+static int ecb_paes_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='add'>+			   unsigned int key_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int __ecb_paes_set_key(struct s390_paes_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	unsigned long fc;</div><div class='add'>+	long fc;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	rc = __paes_convert_key(ctx);</div><div class='add'>+	/* set raw key into context */</div><div class='add'>+	rc = paes_ctx_setkey(ctx, in_key, key_len);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Pick the correct function code based on the protected key type */</div><div class='del'>-	fc = (ctx-&gt;pk.type == PKEY_KEYTYPE_AES_128) ? CPACF_KM_PAES_128 :</div><div class='del'>-		(ctx-&gt;pk.type == PKEY_KEYTYPE_AES_192) ? CPACF_KM_PAES_192 :</div><div class='del'>-		(ctx-&gt;pk.type == PKEY_KEYTYPE_AES_256) ? CPACF_KM_PAES_256 : 0;</div><div class='add'>+	/* convert key into protected key */</div><div class='add'>+	rc = paes_convert_key(ctx);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Check if the function code is available */</div><div class='add'>+	/* Pick the correct function code based on the protected key type */</div><div class='add'>+	switch (ctx-&gt;pk.type) {</div><div class='add'>+	case PKEY_KEYTYPE_AES_128:</div><div class='add'>+		fc = CPACF_KM_PAES_128;</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_192:</div><div class='add'>+		fc = CPACF_KM_PAES_192;</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_256:</div><div class='add'>+		fc = CPACF_KM_PAES_256;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		fc = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> 	ctx-&gt;fc = (fc &amp;&amp; cpacf_test_func(&amp;km_functions, fc)) ? fc : 0;</div><div class='ctx'> </div><div class='del'>-	return ctx-&gt;fc ? 0 : -EINVAL;</div><div class='add'>+	rc = fc ? 0 : -EINVAL;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ecb_paes_set_key(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='del'>-			    unsigned int key_len)</div><div class='add'>+static int ecb_paes_do_crypt(struct s390_paes_ctx *ctx,</div><div class='add'>+			     struct s390_pecb_req_ctx *req_ctx,</div><div class='add'>+			     bool maysleep)</div><div class='ctx'> {</div><div class='del'>-	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='del'>-	rc = _key_to_kb(&amp;ctx-&gt;kb, in_key, key_len);</div><div class='add'>+	struct ecb_param *param = &amp;req_ctx-&gt;param;</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='add'>+	unsigned int nbytes, n, k;</div><div class='add'>+	int pk_state, rc = 0;</div><div class='add'>+</div><div class='add'>+	if (!req_ctx-&gt;param_init_done) {</div><div class='add'>+		/* fetch and check protected key state */</div><div class='add'>+		spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		pk_state = ctx-&gt;pk_state;</div><div class='add'>+		switch (pk_state) {</div><div class='add'>+		case PK_STATE_NO_KEY:</div><div class='add'>+			rc = -ENOKEY;</div><div class='add'>+			break;</div><div class='add'>+		case PK_STATE_CONVERT_IN_PROGRESS:</div><div class='add'>+			rc = -EKEYEXPIRED;</div><div class='add'>+			break;</div><div class='add'>+		case PK_STATE_VALID:</div><div class='add'>+			memcpy(param-&gt;key, ctx-&gt;pk.protkey, sizeof(param-&gt;key));</div><div class='add'>+			req_ctx-&gt;param_init_done = true;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			rc = pk_state &lt; 0 ? pk_state : -EIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	}</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	return __ecb_paes_set_key(ctx);</div><div class='add'>+	/*</div><div class='add'>+	 * Note that in case of partial processing or failure the walk</div><div class='add'>+	 * is NOT unmapped here. So a follow up task may reuse the walk</div><div class='add'>+	 * or in case of unrecoverable failure needs to unmap it.</div><div class='add'>+	 */</div><div class='add'>+	while ((nbytes = walk-&gt;nbytes) != 0) {</div><div class='add'>+		/* only use complete blocks */</div><div class='add'>+		n = nbytes &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='add'>+		k = cpacf_km(ctx-&gt;fc | req_ctx-&gt;modifier, param,</div><div class='add'>+			     walk-&gt;dst.virt.addr, walk-&gt;src.virt.addr, n);</div><div class='add'>+		if (k)</div><div class='add'>+			rc = skcipher_walk_done(walk, nbytes - k);</div><div class='add'>+		if (k &lt; n) {</div><div class='add'>+			if (!maysleep) {</div><div class='add'>+				rc = -EKEYEXPIRED;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			rc = paes_convert_key(ctx);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+			memcpy(param-&gt;key, ctx-&gt;pk.protkey, sizeof(param-&gt;key));</div><div class='add'>+			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ecb_paes_crypt(struct skcipher_request *req, unsigned long modifier)</div><div class='ctx'> {</div><div class='add'>+	struct s390_pecb_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='ctx'> 	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct {</div><div class='del'>-		u8 key[PAES_256_PROTKEY_SIZE];</div><div class='del'>-	} param;</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	unsigned int nbytes, n, k;</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	rc = skcipher_walk_virt(&amp;walk, req, false);</div><div class='add'>+	/*</div><div class='add'>+	 * Attempt synchronous encryption first. If it fails, schedule the request</div><div class='add'>+	 * asynchronously via the crypto engine. To preserve execution order,</div><div class='add'>+	 * once a request is queued to the engine, further requests using the same</div><div class='add'>+	 * tfm will also be routed through the engine.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	rc = skcipher_walk_virt(walk, req, false);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	memcpy(param.key, ctx-&gt;pk.protkey, PAES_256_PROTKEY_SIZE);</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	req_ctx-&gt;modifier = modifier;</div><div class='add'>+	req_ctx-&gt;param_init_done = false;</div><div class='ctx'> </div><div class='del'>-	while ((nbytes = walk.nbytes) != 0) {</div><div class='del'>-		/* only use complete blocks */</div><div class='del'>-		n = nbytes &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='del'>-		k = cpacf_km(ctx-&gt;fc | modifier, &amp;param,</div><div class='del'>-			     walk.dst.virt.addr, walk.src.virt.addr, n);</div><div class='del'>-		if (k)</div><div class='del'>-			rc = skcipher_walk_done(&amp;walk, nbytes - k);</div><div class='del'>-		if (k &lt; n) {</div><div class='del'>-			if (__paes_convert_key(ctx))</div><div class='del'>-				return skcipher_walk_done(&amp;walk, -EIO);</div><div class='del'>-			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-			memcpy(param.key, ctx-&gt;pk.protkey, PAES_256_PROTKEY_SIZE);</div><div class='del'>-			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-		}</div><div class='add'>+	/* Try synchronous operation if no active engine usage */</div><div class='add'>+	if (!atomic_read(&amp;ctx-&gt;via_engine_ctr)) {</div><div class='add'>+		rc = ecb_paes_do_crypt(ctx, req_ctx, false);</div><div class='add'>+		if (rc == 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If sync operation failed or key expired or there are already</div><div class='add'>+	 * requests enqueued via engine, fallback to async. Mark tfm as</div><div class='add'>+	 * using engine to serialize requests.</div><div class='add'>+	 */</div><div class='add'>+	if (rc == 0 || rc == -EKEYEXPIRED) {</div><div class='add'>+		atomic_inc(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+		rc = crypto_transfer_skcipher_request_to_engine(paes_crypto_engine, req);</div><div class='add'>+		if (rc != -EINPROGRESS)</div><div class='add'>+			atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -310,112 +506,256 @@ static int ecb_paes_decrypt(struct skcipher_request *req)</div><div class='ctx'> 	return ecb_paes_crypt(req, CPACF_DECRYPT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct skcipher_alg ecb_paes_alg = {</div><div class='del'>-	.base.cra_name		=	"ecb(paes)",</div><div class='del'>-	.base.cra_driver_name	=	"ecb-paes-s390",</div><div class='del'>-	.base.cra_priority	=	401,	/* combo: aes + ecb + 1 */</div><div class='del'>-	.base.cra_blocksize	=	AES_BLOCK_SIZE,</div><div class='del'>-	.base.cra_ctxsize	=	sizeof(struct s390_paes_ctx),</div><div class='del'>-	.base.cra_module	=	THIS_MODULE,</div><div class='del'>-	.base.cra_list		=	LIST_HEAD_INIT(ecb_paes_alg.base.cra_list),</div><div class='del'>-	.init			=	ecb_paes_init,</div><div class='del'>-	.exit			=	ecb_paes_exit,</div><div class='del'>-	.min_keysize		=	PAES_MIN_KEYSIZE,</div><div class='del'>-	.max_keysize		=	PAES_MAX_KEYSIZE,</div><div class='del'>-	.setkey			=	ecb_paes_set_key,</div><div class='del'>-	.encrypt		=	ecb_paes_encrypt,</div><div class='del'>-	.decrypt		=	ecb_paes_decrypt,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int cbc_paes_init(struct crypto_skcipher *tfm)</div><div class='add'>+static int ecb_paes_init(struct crypto_skcipher *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;kb.key = NULL;</div><div class='add'>+	memset(ctx, 0, sizeof(*ctx));</div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> </div><div class='add'>+	crypto_skcipher_set_reqsize(tfm, sizeof(struct s390_pecb_req_ctx));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cbc_paes_exit(struct crypto_skcipher *tfm)</div><div class='add'>+static void ecb_paes_exit(struct crypto_skcipher *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='add'>+	memzero_explicit(ctx, sizeof(*ctx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int __cbc_paes_set_key(struct s390_paes_ctx *ctx)</div><div class='add'>+static int ecb_paes_do_one_request(struct crypto_engine *engine, void *areq)</div><div class='ctx'> {</div><div class='del'>-	unsigned long fc;</div><div class='add'>+	struct skcipher_request *req = skcipher_request_cast(areq);</div><div class='add'>+	struct s390_pecb_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	rc = __paes_convert_key(ctx);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	/* walk has already been prepared */</div><div class='add'>+</div><div class='add'>+	rc = ecb_paes_do_crypt(ctx, req_ctx, true);</div><div class='add'>+	if (rc == -EKEYEXPIRED) {</div><div class='add'>+		/*</div><div class='add'>+		 * Protected key expired, conversion is in process.</div><div class='add'>+		 * Trigger a re-schedule of this request by returning</div><div class='add'>+		 * -ENOSPC ("hardware queue is full") to the crypto engine.</div><div class='add'>+		 * To avoid immediately re-invocation of this callback,</div><div class='add'>+		 * tell the scheduler to voluntarily give up the CPU here.</div><div class='add'>+		 */</div><div class='add'>+		cond_resched();</div><div class='add'>+		pr_debug("rescheduling request\n");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	} else if (rc) {</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Pick the correct function code based on the protected key type */</div><div class='del'>-	fc = (ctx-&gt;pk.type == PKEY_KEYTYPE_AES_128) ? CPACF_KMC_PAES_128 :</div><div class='del'>-		(ctx-&gt;pk.type == PKEY_KEYTYPE_AES_192) ? CPACF_KMC_PAES_192 :</div><div class='del'>-		(ctx-&gt;pk.type == PKEY_KEYTYPE_AES_256) ? CPACF_KMC_PAES_256 : 0;</div><div class='add'>+	memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("request complete with rc=%d\n", rc);</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+	crypto_finalize_skcipher_request(engine, req, rc);</div><div class='add'>+	local_bh_enable();</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Check if the function code is available */</div><div class='del'>-	ctx-&gt;fc = (fc &amp;&amp; cpacf_test_func(&amp;kmc_functions, fc)) ? fc : 0;</div><div class='add'>+static struct skcipher_engine_alg ecb_paes_alg = {</div><div class='add'>+	.base = {</div><div class='add'>+		.base.cra_name	      = "ecb(paes)",</div><div class='add'>+		.base.cra_driver_name = "ecb-paes-s390",</div><div class='add'>+		.base.cra_priority    = 401,	/* combo: aes + ecb + 1 */</div><div class='add'>+		.base.cra_blocksize   = AES_BLOCK_SIZE,</div><div class='add'>+		.base.cra_ctxsize     = sizeof(struct s390_paes_ctx),</div><div class='add'>+		.base.cra_module      = THIS_MODULE,</div><div class='add'>+		.base.cra_list	      = LIST_HEAD_INIT(ecb_paes_alg.base.base.cra_list),</div><div class='add'>+		.init		      = ecb_paes_init,</div><div class='add'>+		.exit		      = ecb_paes_exit,</div><div class='add'>+		.min_keysize	      = PAES_MIN_KEYSIZE,</div><div class='add'>+		.max_keysize	      = PAES_MAX_KEYSIZE,</div><div class='add'>+		.setkey		      = ecb_paes_setkey,</div><div class='add'>+		.encrypt	      = ecb_paes_encrypt,</div><div class='add'>+		.decrypt	      = ecb_paes_decrypt,</div><div class='add'>+	},</div><div class='add'>+	.op = {</div><div class='add'>+		.do_one_request	      = ecb_paes_do_one_request,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	return ctx-&gt;fc ? 0 : -EINVAL;</div><div class='del'>-}</div><div class='add'>+/*</div><div class='add'>+ * PAES CBC implementation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct cbc_param {</div><div class='add'>+	u8 iv[AES_BLOCK_SIZE];</div><div class='add'>+	u8 key[PAES_256_PROTKEY_SIZE];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct s390_pcbc_req_ctx {</div><div class='add'>+	unsigned long modifier;</div><div class='add'>+	struct skcipher_walk walk;</div><div class='add'>+	bool param_init_done;</div><div class='add'>+	struct cbc_param param;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static int cbc_paes_set_key(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='del'>-			    unsigned int key_len)</div><div class='add'>+static int cbc_paes_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='add'>+			   unsigned int key_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	long fc;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='del'>-	rc = _key_to_kb(&amp;ctx-&gt;kb, in_key, key_len);</div><div class='add'>+	/* set raw key into context */</div><div class='add'>+	rc = paes_ctx_setkey(ctx, in_key, key_len);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	return __cbc_paes_set_key(ctx);</div><div class='add'>+	/* convert raw key into protected key */</div><div class='add'>+	rc = paes_convert_key(ctx);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Pick the correct function code based on the protected key type */</div><div class='add'>+	switch (ctx-&gt;pk.type) {</div><div class='add'>+	case PKEY_KEYTYPE_AES_128:</div><div class='add'>+		fc = CPACF_KMC_PAES_128;</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_192:</div><div class='add'>+		fc = CPACF_KMC_PAES_192;</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_256:</div><div class='add'>+		fc = CPACF_KMC_PAES_256;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		fc = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;fc = (fc &amp;&amp; cpacf_test_func(&amp;kmc_functions, fc)) ? fc : 0;</div><div class='add'>+</div><div class='add'>+	rc = fc ? 0 : -EINVAL;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cbc_paes_crypt(struct skcipher_request *req, unsigned long modifier)</div><div class='add'>+static int cbc_paes_do_crypt(struct s390_paes_ctx *ctx,</div><div class='add'>+			     struct s390_pcbc_req_ctx *req_ctx,</div><div class='add'>+			     bool maysleep)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct {</div><div class='del'>-		u8 iv[AES_BLOCK_SIZE];</div><div class='del'>-		u8 key[PAES_256_PROTKEY_SIZE];</div><div class='del'>-	} param;</div><div class='del'>-	struct skcipher_walk walk;</div><div class='add'>+	struct cbc_param *param = &amp;req_ctx-&gt;param;</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='ctx'> 	unsigned int nbytes, n, k;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = skcipher_walk_virt(&amp;walk, req, false);</div><div class='add'>+	int pk_state, rc = 0;</div><div class='add'>+</div><div class='add'>+	if (!req_ctx-&gt;param_init_done) {</div><div class='add'>+		/* fetch and check protected key state */</div><div class='add'>+		spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		pk_state = ctx-&gt;pk_state;</div><div class='add'>+		switch (pk_state) {</div><div class='add'>+		case PK_STATE_NO_KEY:</div><div class='add'>+			rc = -ENOKEY;</div><div class='add'>+			break;</div><div class='add'>+		case PK_STATE_CONVERT_IN_PROGRESS:</div><div class='add'>+			rc = -EKEYEXPIRED;</div><div class='add'>+			break;</div><div class='add'>+		case PK_STATE_VALID:</div><div class='add'>+			memcpy(param-&gt;key, ctx-&gt;pk.protkey, sizeof(param-&gt;key));</div><div class='add'>+			req_ctx-&gt;param_init_done = true;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			rc = pk_state &lt; 0 ? pk_state : -EIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	}</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	memcpy(param.iv, walk.iv, AES_BLOCK_SIZE);</div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	memcpy(param.key, ctx-&gt;pk.protkey, PAES_256_PROTKEY_SIZE);</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	memcpy(param-&gt;iv, walk-&gt;iv, AES_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	while ((nbytes = walk.nbytes) != 0) {</div><div class='add'>+	/*</div><div class='add'>+	 * Note that in case of partial processing or failure the walk</div><div class='add'>+	 * is NOT unmapped here. So a follow up task may reuse the walk</div><div class='add'>+	 * or in case of unrecoverable failure needs to unmap it.</div><div class='add'>+	 */</div><div class='add'>+	while ((nbytes = walk-&gt;nbytes) != 0) {</div><div class='ctx'> 		/* only use complete blocks */</div><div class='ctx'> 		n = nbytes &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='del'>-		k = cpacf_kmc(ctx-&gt;fc | modifier, &amp;param,</div><div class='del'>-			      walk.dst.virt.addr, walk.src.virt.addr, n);</div><div class='add'>+		k = cpacf_kmc(ctx-&gt;fc | req_ctx-&gt;modifier, param,</div><div class='add'>+			      walk-&gt;dst.virt.addr, walk-&gt;src.virt.addr, n);</div><div class='ctx'> 		if (k) {</div><div class='del'>-			memcpy(walk.iv, param.iv, AES_BLOCK_SIZE);</div><div class='del'>-			rc = skcipher_walk_done(&amp;walk, nbytes - k);</div><div class='add'>+			memcpy(walk-&gt;iv, param-&gt;iv, AES_BLOCK_SIZE);</div><div class='add'>+			rc = skcipher_walk_done(walk, nbytes - k);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (k &lt; n) {</div><div class='del'>-			if (__paes_convert_key(ctx))</div><div class='del'>-				return skcipher_walk_done(&amp;walk, -EIO);</div><div class='add'>+			if (!maysleep) {</div><div class='add'>+				rc = -EKEYEXPIRED;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			rc = paes_convert_key(ctx);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='ctx'> 			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-			memcpy(param.key, ctx-&gt;pk.protkey, PAES_256_PROTKEY_SIZE);</div><div class='add'>+			memcpy(param-&gt;key, ctx-&gt;pk.protkey, sizeof(param-&gt;key));</div><div class='ctx'> 			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cbc_paes_crypt(struct skcipher_request *req, unsigned long modifier)</div><div class='add'>+{</div><div class='add'>+	struct s390_pcbc_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Attempt synchronous encryption first. If it fails, schedule the request</div><div class='add'>+	 * asynchronously via the crypto engine. To preserve execution order,</div><div class='add'>+	 * once a request is queued to the engine, further requests using the same</div><div class='add'>+	 * tfm will also be routed through the engine.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	rc = skcipher_walk_virt(walk, req, false);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	req_ctx-&gt;modifier = modifier;</div><div class='add'>+	req_ctx-&gt;param_init_done = false;</div><div class='add'>+</div><div class='add'>+	/* Try synchronous operation if no active engine usage */</div><div class='add'>+	if (!atomic_read(&amp;ctx-&gt;via_engine_ctr)) {</div><div class='add'>+		rc = cbc_paes_do_crypt(ctx, req_ctx, false);</div><div class='add'>+		if (rc == 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If sync operation failed or key expired or there are already</div><div class='add'>+	 * requests enqueued via engine, fallback to async. Mark tfm as</div><div class='add'>+	 * using engine to serialize requests.</div><div class='add'>+	 */</div><div class='add'>+	if (rc == 0 || rc == -EKEYEXPIRED) {</div><div class='add'>+		atomic_inc(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+		rc = crypto_transfer_skcipher_request_to_engine(paes_crypto_engine, req);</div><div class='add'>+		if (rc != -EINPROGRESS)</div><div class='add'>+			atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -429,496 +769,882 @@ static int cbc_paes_decrypt(struct skcipher_request *req)</div><div class='ctx'> 	return cbc_paes_crypt(req, CPACF_DECRYPT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct skcipher_alg cbc_paes_alg = {</div><div class='del'>-	.base.cra_name		=	"cbc(paes)",</div><div class='del'>-	.base.cra_driver_name	=	"cbc-paes-s390",</div><div class='del'>-	.base.cra_priority	=	402,	/* ecb-paes-s390 + 1 */</div><div class='del'>-	.base.cra_blocksize	=	AES_BLOCK_SIZE,</div><div class='del'>-	.base.cra_ctxsize	=	sizeof(struct s390_paes_ctx),</div><div class='del'>-	.base.cra_module	=	THIS_MODULE,</div><div class='del'>-	.base.cra_list		=	LIST_HEAD_INIT(cbc_paes_alg.base.cra_list),</div><div class='del'>-	.init			=	cbc_paes_init,</div><div class='del'>-	.exit			=	cbc_paes_exit,</div><div class='del'>-	.min_keysize		=	PAES_MIN_KEYSIZE,</div><div class='del'>-	.max_keysize		=	PAES_MAX_KEYSIZE,</div><div class='del'>-	.ivsize			=	AES_BLOCK_SIZE,</div><div class='del'>-	.setkey			=	cbc_paes_set_key,</div><div class='del'>-	.encrypt		=	cbc_paes_encrypt,</div><div class='del'>-	.decrypt		=	cbc_paes_decrypt,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int xts_paes_init(struct crypto_skcipher *tfm)</div><div class='add'>+static int cbc_paes_init(struct crypto_skcipher *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;kb.key = NULL;</div><div class='add'>+	memset(ctx, 0, sizeof(*ctx));</div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> </div><div class='add'>+	crypto_skcipher_set_reqsize(tfm, sizeof(struct s390_pcbc_req_ctx));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xts_paes_exit(struct crypto_skcipher *tfm)</div><div class='add'>+static void cbc_paes_exit(struct crypto_skcipher *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='add'>+	memzero_explicit(ctx, sizeof(*ctx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int __xts_paes_convert_key(struct s390_pxts_ctx *ctx)</div><div class='add'>+static int cbc_paes_do_one_request(struct crypto_engine *engine, void *areq)</div><div class='ctx'> {</div><div class='del'>-	struct paes_protkey pk0, pk1;</div><div class='del'>-	size_t split_keylen;</div><div class='add'>+	struct skcipher_request *req = skcipher_request_cast(areq);</div><div class='add'>+	struct s390_pcbc_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	pk0.len = sizeof(pk0.protkey);</div><div class='del'>-	pk1.len = sizeof(pk1.protkey);</div><div class='del'>-</div><div class='del'>-	rc = __paes_keyblob2pkey(ctx-&gt;kb.key, ctx-&gt;kb.keylen, &amp;pk0);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	/* walk has already been prepared */</div><div class='add'>+</div><div class='add'>+	rc = cbc_paes_do_crypt(ctx, req_ctx, true);</div><div class='add'>+	if (rc == -EKEYEXPIRED) {</div><div class='add'>+		/*</div><div class='add'>+		 * Protected key expired, conversion is in process.</div><div class='add'>+		 * Trigger a re-schedule of this request by returning</div><div class='add'>+		 * -ENOSPC ("hardware queue is full") to the crypto engine.</div><div class='add'>+		 * To avoid immediately re-invocation of this callback,</div><div class='add'>+		 * tell the scheduler to voluntarily give up the CPU here.</div><div class='add'>+		 */</div><div class='add'>+		cond_resched();</div><div class='add'>+		pr_debug("rescheduling request\n");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	} else if (rc) {</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	switch (pk0.type) {</div><div class='del'>-	case PKEY_KEYTYPE_AES_128:</div><div class='del'>-	case PKEY_KEYTYPE_AES_256:</div><div class='del'>-		/* second keytoken required */</div><div class='del'>-		if (ctx-&gt;kb.keylen % 2)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		split_keylen = ctx-&gt;kb.keylen / 2;</div><div class='add'>+	memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("request complete with rc=%d\n", rc);</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+	crypto_finalize_skcipher_request(engine, req, rc);</div><div class='add'>+	local_bh_enable();</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		rc = __paes_keyblob2pkey(ctx-&gt;kb.key + split_keylen,</div><div class='del'>-					 split_keylen, &amp;pk1);</div><div class='del'>-		if (rc)</div><div class='del'>-			return rc;</div><div class='add'>+static struct skcipher_engine_alg cbc_paes_alg = {</div><div class='add'>+	.base = {</div><div class='add'>+		.base.cra_name	      = "cbc(paes)",</div><div class='add'>+		.base.cra_driver_name = "cbc-paes-s390",</div><div class='add'>+		.base.cra_priority    = 402,	/* cbc-paes-s390 + 1 */</div><div class='add'>+		.base.cra_blocksize   = AES_BLOCK_SIZE,</div><div class='add'>+		.base.cra_ctxsize     = sizeof(struct s390_paes_ctx),</div><div class='add'>+		.base.cra_module      = THIS_MODULE,</div><div class='add'>+		.base.cra_list	      = LIST_HEAD_INIT(cbc_paes_alg.base.base.cra_list),</div><div class='add'>+		.init		      = cbc_paes_init,</div><div class='add'>+		.exit		      = cbc_paes_exit,</div><div class='add'>+		.min_keysize	      = PAES_MIN_KEYSIZE,</div><div class='add'>+		.max_keysize	      = PAES_MAX_KEYSIZE,</div><div class='add'>+		.ivsize		      = AES_BLOCK_SIZE,</div><div class='add'>+		.setkey		      = cbc_paes_setkey,</div><div class='add'>+		.encrypt	      = cbc_paes_encrypt,</div><div class='add'>+		.decrypt	      = cbc_paes_decrypt,</div><div class='add'>+	},</div><div class='add'>+	.op = {</div><div class='add'>+		.do_one_request	      = cbc_paes_do_one_request,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-		if (pk0.type != pk1.type)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	case PKEY_KEYTYPE_AES_XTS_128:</div><div class='del'>-	case PKEY_KEYTYPE_AES_XTS_256:</div><div class='del'>-		/* single key */</div><div class='del'>-		pk1.type = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/* unsupported protected keytype */</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+/*</div><div class='add'>+ * PAES CTR implementation</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	ctx-&gt;pk[0] = pk0;</div><div class='del'>-	ctx-&gt;pk[1] = pk1;</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+struct ctr_param {</div><div class='add'>+	u8 key[PAES_256_PROTKEY_SIZE];</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+struct s390_pctr_req_ctx {</div><div class='add'>+	unsigned long modifier;</div><div class='add'>+	struct skcipher_walk walk;</div><div class='add'>+	bool param_init_done;</div><div class='add'>+	struct ctr_param param;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static inline int __xts_paes_set_key(struct s390_pxts_ctx *ctx)</div><div class='add'>+static int ctr_paes_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='add'>+			   unsigned int key_len)</div><div class='ctx'> {</div><div class='del'>-	unsigned long fc;</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	long fc;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	rc = __xts_paes_convert_key(ctx);</div><div class='add'>+	/* set raw key into context */</div><div class='add'>+	rc = paes_ctx_setkey(ctx, in_key, key_len);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* convert raw key into protected key */</div><div class='add'>+	rc = paes_convert_key(ctx);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* Pick the correct function code based on the protected key type */</div><div class='del'>-	switch (ctx-&gt;pk[0].type) {</div><div class='add'>+	switch (ctx-&gt;pk.type) {</div><div class='ctx'> 	case PKEY_KEYTYPE_AES_128:</div><div class='del'>-		fc = CPACF_KM_PXTS_128;</div><div class='del'>-		break;</div><div class='del'>-	case PKEY_KEYTYPE_AES_256:</div><div class='del'>-		fc = CPACF_KM_PXTS_256;</div><div class='add'>+		fc = CPACF_KMCTR_PAES_128;</div><div class='ctx'> 		break;</div><div class='del'>-	case PKEY_KEYTYPE_AES_XTS_128:</div><div class='del'>-		fc = CPACF_KM_PXTS_128_FULL;</div><div class='add'>+	case PKEY_KEYTYPE_AES_192:</div><div class='add'>+		fc = CPACF_KMCTR_PAES_192;</div><div class='ctx'> 		break;</div><div class='del'>-	case PKEY_KEYTYPE_AES_XTS_256:</div><div class='del'>-		fc = CPACF_KM_PXTS_256_FULL;</div><div class='add'>+	case PKEY_KEYTYPE_AES_256:</div><div class='add'>+		fc = CPACF_KMCTR_PAES_256;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		fc = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	ctx-&gt;fc = (fc &amp;&amp; cpacf_test_func(&amp;kmctr_functions, fc)) ? fc : 0;</div><div class='ctx'> </div><div class='del'>-	/* Check if the function code is available */</div><div class='del'>-	ctx-&gt;fc = (fc &amp;&amp; cpacf_test_func(&amp;km_functions, fc)) ? fc : 0;</div><div class='add'>+	rc = fc ? 0 : -EINVAL;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int __ctrblk_init(u8 *ctrptr, u8 *iv, unsigned int nbytes)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, n;</div><div class='add'>+</div><div class='add'>+	/* only use complete blocks, max. PAGE_SIZE */</div><div class='add'>+	memcpy(ctrptr, iv, AES_BLOCK_SIZE);</div><div class='add'>+	n = (nbytes &gt; PAGE_SIZE) ? PAGE_SIZE : nbytes &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='add'>+	for (i = (n / AES_BLOCK_SIZE) - 1; i &gt; 0; i--) {</div><div class='add'>+		memcpy(ctrptr + AES_BLOCK_SIZE, ctrptr, AES_BLOCK_SIZE);</div><div class='add'>+		crypto_inc(ctrptr + AES_BLOCK_SIZE, AES_BLOCK_SIZE);</div><div class='add'>+		ctrptr += AES_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+	return n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ctr_paes_do_crypt(struct s390_paes_ctx *ctx,</div><div class='add'>+			     struct s390_pctr_req_ctx *req_ctx,</div><div class='add'>+			     bool maysleep)</div><div class='add'>+{</div><div class='add'>+	struct ctr_param *param = &amp;req_ctx-&gt;param;</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='add'>+	u8 buf[AES_BLOCK_SIZE], *ctrptr;</div><div class='add'>+	unsigned int nbytes, n, k;</div><div class='add'>+	int pk_state, locked, rc = 0;</div><div class='add'>+</div><div class='add'>+	if (!req_ctx-&gt;param_init_done) {</div><div class='add'>+		/* fetch and check protected key state */</div><div class='add'>+		spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		pk_state = ctx-&gt;pk_state;</div><div class='add'>+		switch (pk_state) {</div><div class='add'>+		case PK_STATE_NO_KEY:</div><div class='add'>+			rc = -ENOKEY;</div><div class='add'>+			break;</div><div class='add'>+		case PK_STATE_CONVERT_IN_PROGRESS:</div><div class='add'>+			rc = -EKEYEXPIRED;</div><div class='add'>+			break;</div><div class='add'>+		case PK_STATE_VALID:</div><div class='add'>+			memcpy(param-&gt;key, ctx-&gt;pk.protkey, sizeof(param-&gt;key));</div><div class='add'>+			req_ctx-&gt;param_init_done = true;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			rc = pk_state &lt; 0 ? pk_state : -EIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	}</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	locked = mutex_trylock(&amp;ctrblk_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Note that in case of partial processing or failure the walk</div><div class='add'>+	 * is NOT unmapped here. So a follow up task may reuse the walk</div><div class='add'>+	 * or in case of unrecoverable failure needs to unmap it.</div><div class='add'>+	 */</div><div class='add'>+	while ((nbytes = walk-&gt;nbytes) &gt;= AES_BLOCK_SIZE) {</div><div class='add'>+		n = AES_BLOCK_SIZE;</div><div class='add'>+		if (nbytes &gt;= 2 * AES_BLOCK_SIZE &amp;&amp; locked)</div><div class='add'>+			n = __ctrblk_init(ctrblk, walk-&gt;iv, nbytes);</div><div class='add'>+		ctrptr = (n &gt; AES_BLOCK_SIZE) ? ctrblk : walk-&gt;iv;</div><div class='add'>+		k = cpacf_kmctr(ctx-&gt;fc, param, walk-&gt;dst.virt.addr,</div><div class='add'>+				walk-&gt;src.virt.addr, n, ctrptr);</div><div class='add'>+		if (k) {</div><div class='add'>+			if (ctrptr == ctrblk)</div><div class='add'>+				memcpy(walk-&gt;iv, ctrptr + k - AES_BLOCK_SIZE,</div><div class='add'>+				       AES_BLOCK_SIZE);</div><div class='add'>+			crypto_inc(walk-&gt;iv, AES_BLOCK_SIZE);</div><div class='add'>+			rc = skcipher_walk_done(walk, nbytes - k);</div><div class='add'>+		}</div><div class='add'>+		if (k &lt; n) {</div><div class='add'>+			if (!maysleep) {</div><div class='add'>+				if (locked)</div><div class='add'>+					mutex_unlock(&amp;ctrblk_lock);</div><div class='add'>+				rc = -EKEYEXPIRED;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			rc = paes_convert_key(ctx);</div><div class='add'>+			if (rc) {</div><div class='add'>+				if (locked)</div><div class='add'>+					mutex_unlock(&amp;ctrblk_lock);</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+			memcpy(param-&gt;key, ctx-&gt;pk.protkey, sizeof(param-&gt;key));</div><div class='add'>+			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (locked)</div><div class='add'>+		mutex_unlock(&amp;ctrblk_lock);</div><div class='add'>+</div><div class='add'>+	/* final block may be &lt; AES_BLOCK_SIZE, copy only nbytes */</div><div class='add'>+	if (nbytes) {</div><div class='add'>+		memset(buf, 0, AES_BLOCK_SIZE);</div><div class='add'>+		memcpy(buf, walk-&gt;src.virt.addr, nbytes);</div><div class='add'>+		while (1) {</div><div class='add'>+			if (cpacf_kmctr(ctx-&gt;fc, param, buf,</div><div class='add'>+					buf, AES_BLOCK_SIZE,</div><div class='add'>+					walk-&gt;iv) == AES_BLOCK_SIZE)</div><div class='add'>+				break;</div><div class='add'>+			if (!maysleep) {</div><div class='add'>+				rc = -EKEYEXPIRED;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			rc = paes_convert_key(ctx);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+			memcpy(param-&gt;key, ctx-&gt;pk.protkey, sizeof(param-&gt;key));</div><div class='add'>+			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		}</div><div class='add'>+		memcpy(walk-&gt;dst.virt.addr, buf, nbytes);</div><div class='add'>+		crypto_inc(walk-&gt;iv, AES_BLOCK_SIZE);</div><div class='add'>+		rc = skcipher_walk_done(walk, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ctr_paes_crypt(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	struct s390_pctr_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Attempt synchronous encryption first. If it fails, schedule the request</div><div class='add'>+	 * asynchronously via the crypto engine. To preserve execution order,</div><div class='add'>+	 * once a request is queued to the engine, further requests using the same</div><div class='add'>+	 * tfm will also be routed through the engine.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	rc = skcipher_walk_virt(walk, req, false);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	req_ctx-&gt;param_init_done = false;</div><div class='add'>+</div><div class='add'>+	/* Try synchronous operation if no active engine usage */</div><div class='add'>+	if (!atomic_read(&amp;ctx-&gt;via_engine_ctr)) {</div><div class='add'>+		rc = ctr_paes_do_crypt(ctx, req_ctx, false);</div><div class='add'>+		if (rc == 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If sync operation failed or key expired or there are already</div><div class='add'>+	 * requests enqueued via engine, fallback to async. Mark tfm as</div><div class='add'>+	 * using engine to serialize requests.</div><div class='add'>+	 */</div><div class='add'>+	if (rc == 0 || rc == -EKEYEXPIRED) {</div><div class='add'>+		atomic_inc(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+		rc = crypto_transfer_skcipher_request_to_engine(paes_crypto_engine, req);</div><div class='add'>+		if (rc != -EINPROGRESS)</div><div class='add'>+			atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ctr_paes_init(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	memset(ctx, 0, sizeof(*ctx));</div><div class='add'>+	spin_lock_init(&amp;ctx-&gt;pk_lock);</div><div class='add'>+</div><div class='add'>+	crypto_skcipher_set_reqsize(tfm, sizeof(struct s390_pctr_req_ctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ctr_paes_exit(struct crypto_skcipher *tfm)</div><div class='add'>+{</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	memzero_explicit(ctx, sizeof(*ctx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ctr_paes_do_one_request(struct crypto_engine *engine, void *areq)</div><div class='add'>+{</div><div class='add'>+	struct skcipher_request *req = skcipher_request_cast(areq);</div><div class='add'>+	struct s390_pctr_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-	return ctx-&gt;fc ? 0 : -EINVAL;</div><div class='add'>+	/* walk has already been prepared */</div><div class='add'>+</div><div class='add'>+	rc = ctr_paes_do_crypt(ctx, req_ctx, true);</div><div class='add'>+	if (rc == -EKEYEXPIRED) {</div><div class='add'>+		/*</div><div class='add'>+		 * Protected key expired, conversion is in process.</div><div class='add'>+		 * Trigger a re-schedule of this request by returning</div><div class='add'>+		 * -ENOSPC ("hardware queue is full") to the crypto engine.</div><div class='add'>+		 * To avoid immediately re-invocation of this callback,</div><div class='add'>+		 * tell the scheduler to voluntarily give up the CPU here.</div><div class='add'>+		 */</div><div class='add'>+		cond_resched();</div><div class='add'>+		pr_debug("rescheduling request\n");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	} else if (rc) {</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("request complete with rc=%d\n", rc);</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+	crypto_finalize_skcipher_request(engine, req, rc);</div><div class='add'>+	local_bh_enable();</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xts_paes_set_key(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='del'>-			    unsigned int in_keylen)</div><div class='add'>+static struct skcipher_engine_alg ctr_paes_alg = {</div><div class='add'>+	.base = {</div><div class='add'>+		.base.cra_name	      =	"ctr(paes)",</div><div class='add'>+		.base.cra_driver_name =	"ctr-paes-s390",</div><div class='add'>+		.base.cra_priority    =	402,	/* ecb-paes-s390 + 1 */</div><div class='add'>+		.base.cra_blocksize   =	1,</div><div class='add'>+		.base.cra_ctxsize     =	sizeof(struct s390_paes_ctx),</div><div class='add'>+		.base.cra_module      =	THIS_MODULE,</div><div class='add'>+		.base.cra_list	      =	LIST_HEAD_INIT(ctr_paes_alg.base.base.cra_list),</div><div class='add'>+		.init		      =	ctr_paes_init,</div><div class='add'>+		.exit		      =	ctr_paes_exit,</div><div class='add'>+		.min_keysize	      =	PAES_MIN_KEYSIZE,</div><div class='add'>+		.max_keysize	      =	PAES_MAX_KEYSIZE,</div><div class='add'>+		.ivsize		      =	AES_BLOCK_SIZE,</div><div class='add'>+		.setkey		      =	ctr_paes_setkey,</div><div class='add'>+		.encrypt	      =	ctr_paes_crypt,</div><div class='add'>+		.decrypt	      =	ctr_paes_crypt,</div><div class='add'>+		.chunksize	      =	AES_BLOCK_SIZE,</div><div class='add'>+	},</div><div class='add'>+	.op = {</div><div class='add'>+		.do_one_request	      = ctr_paes_do_one_request,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * PAES XTS implementation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct xts_full_km_param {</div><div class='add'>+	u8 key[64];</div><div class='add'>+	u8 tweak[16];</div><div class='add'>+	u8 nap[16];</div><div class='add'>+	u8 wkvp[32];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct xts_km_param {</div><div class='add'>+	u8 key[PAES_256_PROTKEY_SIZE];</div><div class='add'>+	u8 init[16];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct xts_pcc_param {</div><div class='add'>+	u8 key[PAES_256_PROTKEY_SIZE];</div><div class='add'>+	u8 tweak[16];</div><div class='add'>+	u8 block[16];</div><div class='add'>+	u8 bit[16];</div><div class='add'>+	u8 xts[16];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct s390_pxts_req_ctx {</div><div class='add'>+	unsigned long modifier;</div><div class='add'>+	struct skcipher_walk walk;</div><div class='add'>+	bool param_init_done;</div><div class='add'>+	union {</div><div class='add'>+		struct xts_full_km_param full_km_param;</div><div class='add'>+		struct xts_km_param km_param;</div><div class='add'>+	} param;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int xts_paes_setkey(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='add'>+			   unsigned int in_keylen)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> 	u8 ckey[2 * AES_MAX_KEY_SIZE];</div><div class='ctx'> 	unsigned int ckey_len;</div><div class='add'>+	long fc;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if ((in_keylen == 32 || in_keylen == 64) &amp;&amp;</div><div class='ctx'> 	    xts_verify_key(tfm, in_key, in_keylen))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='del'>-	rc = _xts_key_to_kb(&amp;ctx-&gt;kb, in_key, in_keylen);</div><div class='add'>+	/* set raw key into context */</div><div class='add'>+	rc = pxts_ctx_setkey(ctx, in_key, in_keylen);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	rc = __xts_paes_set_key(ctx);</div><div class='add'>+	/* convert raw key(s) into protected key(s) */</div><div class='add'>+	rc = pxts_convert_key(ctx);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * It is not possible on a single protected key (e.g. full AES-XTS) to</div><div class='del'>-	 * check, if k1 and k2 are the same.</div><div class='del'>-	 */</div><div class='del'>-	if (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_XTS_128 ||</div><div class='del'>-	    ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_XTS_256)</div><div class='del'>-		return 0;</div><div class='del'>-	/*</div><div class='ctx'> 	 * xts_verify_key verifies the key length is not odd and makes</div><div class='ctx'> 	 * sure that the two keys are not the same. This can be done</div><div class='del'>-	 * on the two protected keys as well</div><div class='add'>+	 * on the two protected keys as well - but not for full xts keys.</div><div class='ctx'> 	 */</div><div class='del'>-	ckey_len = (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_128) ?</div><div class='del'>-		AES_KEYSIZE_128 : AES_KEYSIZE_256;</div><div class='del'>-	memcpy(ckey, ctx-&gt;pk[0].protkey, ckey_len);</div><div class='del'>-	memcpy(ckey + ckey_len, ctx-&gt;pk[1].protkey, ckey_len);</div><div class='del'>-	return xts_verify_key(tfm, ckey, 2*ckey_len);</div><div class='add'>+	if (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_128 ||</div><div class='add'>+	    ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_256) {</div><div class='add'>+		ckey_len = (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_128) ?</div><div class='add'>+			AES_KEYSIZE_128 : AES_KEYSIZE_256;</div><div class='add'>+		memcpy(ckey, ctx-&gt;pk[0].protkey, ckey_len);</div><div class='add'>+		memcpy(ckey + ckey_len, ctx-&gt;pk[1].protkey, ckey_len);</div><div class='add'>+		rc = xts_verify_key(tfm, ckey, 2 * ckey_len);</div><div class='add'>+		memzero_explicit(ckey, sizeof(ckey));</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Pick the correct function code based on the protected key type */</div><div class='add'>+	switch (ctx-&gt;pk[0].type) {</div><div class='add'>+	case PKEY_KEYTYPE_AES_128:</div><div class='add'>+		fc = CPACF_KM_PXTS_128;</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_256:</div><div class='add'>+		fc = CPACF_KM_PXTS_256;</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_XTS_128:</div><div class='add'>+		fc = CPACF_KM_PXTS_128_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case PKEY_KEYTYPE_AES_XTS_256:</div><div class='add'>+		fc = CPACF_KM_PXTS_256_FULL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		fc = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;fc = (fc &amp;&amp; cpacf_test_func(&amp;km_functions, fc)) ? fc : 0;</div><div class='add'>+</div><div class='add'>+	rc = fc ? 0 : -EINVAL;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int paes_xts_crypt_full(struct skcipher_request *req,</div><div class='del'>-			       unsigned long modifier)</div><div class='add'>+static int xts_paes_do_crypt_fullkey(struct s390_pxts_ctx *ctx,</div><div class='add'>+				     struct s390_pxts_req_ctx *req_ctx,</div><div class='add'>+				     bool maysleep)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct xts_full_km_param *param = &amp;req_ctx-&gt;param.full_km_param;</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='ctx'> 	unsigned int keylen, offset, nbytes, n, k;</div><div class='del'>-	struct {</div><div class='del'>-		u8 key[64];</div><div class='del'>-		u8 tweak[16];</div><div class='del'>-		u8 nap[16];</div><div class='del'>-		u8 wkvp[32];</div><div class='del'>-	} fxts_param = {</div><div class='del'>-		.nap = {0},</div><div class='del'>-	};</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	int rc;</div><div class='add'>+	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	rc = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	/*</div><div class='add'>+	 * The calling function xts_paes_do_crypt() ensures the</div><div class='add'>+	 * protected key state is always PK_STATE_VALID when this</div><div class='add'>+	 * function is invoked.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	keylen = (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_XTS_128) ? 32 : 64;</div><div class='ctx'> 	offset = (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_XTS_128) ? 32 : 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	memcpy(fxts_param.key + offset, ctx-&gt;pk[0].protkey, keylen);</div><div class='del'>-	memcpy(fxts_param.wkvp, ctx-&gt;pk[0].protkey + keylen,</div><div class='del'>-	       sizeof(fxts_param.wkvp));</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	memcpy(fxts_param.tweak, walk.iv, sizeof(fxts_param.tweak));</div><div class='del'>-	fxts_param.nap[0] = 0x01; /* initial alpha power (1, little-endian) */</div><div class='add'>+	if (!req_ctx-&gt;param_init_done) {</div><div class='add'>+		memset(param, 0, sizeof(*param));</div><div class='add'>+		spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		memcpy(param-&gt;key + offset, ctx-&gt;pk[0].protkey, keylen);</div><div class='add'>+		memcpy(param-&gt;wkvp, ctx-&gt;pk[0].protkey + keylen, sizeof(param-&gt;wkvp));</div><div class='add'>+		spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		memcpy(param-&gt;tweak, walk-&gt;iv, sizeof(param-&gt;tweak));</div><div class='add'>+		param-&gt;nap[0] = 0x01; /* initial alpha power (1, little-endian) */</div><div class='add'>+		req_ctx-&gt;param_init_done = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	while ((nbytes = walk.nbytes) != 0) {</div><div class='add'>+	/*</div><div class='add'>+	 * Note that in case of partial processing or failure the walk</div><div class='add'>+	 * is NOT unmapped here. So a follow up task may reuse the walk</div><div class='add'>+	 * or in case of unrecoverable failure needs to unmap it.</div><div class='add'>+	 */</div><div class='add'>+	while ((nbytes = walk-&gt;nbytes) != 0) {</div><div class='ctx'> 		/* only use complete blocks */</div><div class='ctx'> 		n = nbytes &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='del'>-		k = cpacf_km(ctx-&gt;fc | modifier, fxts_param.key + offset,</div><div class='del'>-			     walk.dst.virt.addr, walk.src.virt.addr, n);</div><div class='add'>+		k = cpacf_km(ctx-&gt;fc | req_ctx-&gt;modifier, param-&gt;key + offset,</div><div class='add'>+			     walk-&gt;dst.virt.addr, walk-&gt;src.virt.addr, n);</div><div class='ctx'> 		if (k)</div><div class='del'>-			rc = skcipher_walk_done(&amp;walk, nbytes - k);</div><div class='add'>+			rc = skcipher_walk_done(walk, nbytes - k);</div><div class='ctx'> 		if (k &lt; n) {</div><div class='del'>-			if (__xts_paes_convert_key(ctx))</div><div class='del'>-				return skcipher_walk_done(&amp;walk, -EIO);</div><div class='add'>+			if (!maysleep) {</div><div class='add'>+				rc = -EKEYEXPIRED;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			rc = pxts_convert_key(ctx);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='ctx'> 			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-			memcpy(fxts_param.key + offset, ctx-&gt;pk[0].protkey,</div><div class='del'>-			       keylen);</div><div class='del'>-			memcpy(fxts_param.wkvp, ctx-&gt;pk[0].protkey + keylen,</div><div class='del'>-			       sizeof(fxts_param.wkvp));</div><div class='add'>+			memcpy(param-&gt;key + offset, ctx-&gt;pk[0].protkey, keylen);</div><div class='add'>+			memcpy(param-&gt;wkvp, ctx-&gt;pk[0].protkey + keylen, sizeof(param-&gt;wkvp));</div><div class='ctx'> 			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int paes_xts_crypt(struct skcipher_request *req, unsigned long modifier)</div><div class='add'>+static inline int __xts_2keys_prep_param(struct s390_pxts_ctx *ctx,</div><div class='add'>+					 struct xts_km_param *param,</div><div class='add'>+					 struct skcipher_walk *walk,</div><div class='add'>+					 unsigned int keylen,</div><div class='add'>+					 unsigned int offset, bool maysleep)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct xts_pcc_param pcc_param;</div><div class='add'>+	unsigned long cc = 1;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	while (cc) {</div><div class='add'>+		memset(&amp;pcc_param, 0, sizeof(pcc_param));</div><div class='add'>+		memcpy(pcc_param.tweak, walk-&gt;iv, sizeof(pcc_param.tweak));</div><div class='add'>+		spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		memcpy(pcc_param.key + offset, ctx-&gt;pk[1].protkey, keylen);</div><div class='add'>+		memcpy(param-&gt;key + offset, ctx-&gt;pk[0].protkey, keylen);</div><div class='add'>+		spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+		cc = cpacf_pcc(ctx-&gt;fc, pcc_param.key + offset);</div><div class='add'>+		if (cc) {</div><div class='add'>+			if (!maysleep) {</div><div class='add'>+				rc = -EKEYEXPIRED;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			rc = pxts_convert_key(ctx);</div><div class='add'>+			if (rc)</div><div class='add'>+				break;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		memcpy(param-&gt;init, pcc_param.xts, 16);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memzero_explicit(pcc_param.key, sizeof(pcc_param.key));</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xts_paes_do_crypt_2keys(struct s390_pxts_ctx *ctx,</div><div class='add'>+				   struct s390_pxts_req_ctx *req_ctx,</div><div class='add'>+				   bool maysleep)</div><div class='add'>+{</div><div class='add'>+	struct xts_km_param *param = &amp;req_ctx-&gt;param.km_param;</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='ctx'> 	unsigned int keylen, offset, nbytes, n, k;</div><div class='del'>-	struct {</div><div class='del'>-		u8 key[PAES_256_PROTKEY_SIZE];</div><div class='del'>-		u8 tweak[16];</div><div class='del'>-		u8 block[16];</div><div class='del'>-		u8 bit[16];</div><div class='del'>-		u8 xts[16];</div><div class='del'>-	} pcc_param;</div><div class='del'>-	struct {</div><div class='del'>-		u8 key[PAES_256_PROTKEY_SIZE];</div><div class='del'>-		u8 init[16];</div><div class='del'>-	} xts_param;</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	int rc;</div><div class='add'>+	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	rc = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	/*</div><div class='add'>+	 * The calling function xts_paes_do_crypt() ensures the</div><div class='add'>+	 * protected key state is always PK_STATE_VALID when this</div><div class='add'>+	 * function is invoked.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	keylen = (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_128) ? 48 : 64;</div><div class='ctx'> 	offset = (ctx-&gt;pk[0].type == PKEY_KEYTYPE_AES_128) ? 16 : 0;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;pcc_param, 0, sizeof(pcc_param));</div><div class='del'>-	memcpy(pcc_param.tweak, walk.iv, sizeof(pcc_param.tweak));</div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	memcpy(pcc_param.key + offset, ctx-&gt;pk[1].protkey, keylen);</div><div class='del'>-	memcpy(xts_param.key + offset, ctx-&gt;pk[0].protkey, keylen);</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	cpacf_pcc(ctx-&gt;fc, pcc_param.key + offset);</div><div class='del'>-	memcpy(xts_param.init, pcc_param.xts, 16);</div><div class='add'>+	if (!req_ctx-&gt;param_init_done) {</div><div class='add'>+		rc = __xts_2keys_prep_param(ctx, param, walk,</div><div class='add'>+					    keylen, offset, maysleep);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out;</div><div class='add'>+		req_ctx-&gt;param_init_done = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	while ((nbytes = walk.nbytes) != 0) {</div><div class='add'>+	/*</div><div class='add'>+	 * Note that in case of partial processing or failure the walk</div><div class='add'>+	 * is NOT unmapped here. So a follow up task may reuse the walk</div><div class='add'>+	 * or in case of unrecoverable failure needs to unmap it.</div><div class='add'>+	 */</div><div class='add'>+	while ((nbytes = walk-&gt;nbytes) != 0) {</div><div class='ctx'> 		/* only use complete blocks */</div><div class='ctx'> 		n = nbytes &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='del'>-		k = cpacf_km(ctx-&gt;fc | modifier, xts_param.key + offset,</div><div class='del'>-			     walk.dst.virt.addr, walk.src.virt.addr, n);</div><div class='add'>+		k = cpacf_km(ctx-&gt;fc | req_ctx-&gt;modifier, param-&gt;key + offset,</div><div class='add'>+			     walk-&gt;dst.virt.addr, walk-&gt;src.virt.addr, n);</div><div class='ctx'> 		if (k)</div><div class='del'>-			rc = skcipher_walk_done(&amp;walk, nbytes - k);</div><div class='add'>+			rc = skcipher_walk_done(walk, nbytes - k);</div><div class='ctx'> 		if (k &lt; n) {</div><div class='del'>-			if (__xts_paes_convert_key(ctx))</div><div class='del'>-				return skcipher_walk_done(&amp;walk, -EIO);</div><div class='add'>+			if (!maysleep) {</div><div class='add'>+				rc = -EKEYEXPIRED;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			rc = pxts_convert_key(ctx);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='ctx'> 			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-			memcpy(xts_param.key + offset,</div><div class='del'>-			       ctx-&gt;pk[0].protkey, keylen);</div><div class='add'>+			memcpy(param-&gt;key + offset, ctx-&gt;pk[0].protkey, keylen);</div><div class='ctx'> 			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int xts_paes_crypt(struct skcipher_request *req, unsigned long modifier)</div><div class='add'>+static int xts_paes_do_crypt(struct s390_pxts_ctx *ctx,</div><div class='add'>+			     struct s390_pxts_req_ctx *req_ctx,</div><div class='add'>+			     bool maysleep)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	int pk_state, rc = 0;</div><div class='add'>+</div><div class='add'>+	/* fetch and check protected key state */</div><div class='add'>+	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	pk_state = ctx-&gt;pk_state;</div><div class='add'>+	switch (pk_state) {</div><div class='add'>+	case PK_STATE_NO_KEY:</div><div class='add'>+		rc = -ENOKEY;</div><div class='add'>+		break;</div><div class='add'>+	case PK_STATE_CONVERT_IN_PROGRESS:</div><div class='add'>+		rc = -EKEYEXPIRED;</div><div class='add'>+		break;</div><div class='add'>+	case PK_STATE_VALID:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		rc = pk_state &lt; 0 ? pk_state : -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='add'>+	/* Call the 'real' crypt function based on the xts prot key type. */</div><div class='ctx'> 	switch (ctx-&gt;fc) {</div><div class='ctx'> 	case CPACF_KM_PXTS_128:</div><div class='ctx'> 	case CPACF_KM_PXTS_256:</div><div class='del'>-		return paes_xts_crypt(req, modifier);</div><div class='add'>+		rc = xts_paes_do_crypt_2keys(ctx, req_ctx, maysleep);</div><div class='add'>+		break;</div><div class='ctx'> 	case CPACF_KM_PXTS_128_FULL:</div><div class='ctx'> 	case CPACF_KM_PXTS_256_FULL:</div><div class='del'>-		return paes_xts_crypt_full(req, modifier);</div><div class='add'>+		rc = xts_paes_do_crypt_fullkey(ctx, req_ctx, maysleep);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		rc = -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static int xts_paes_encrypt(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	return xts_paes_crypt(req, 0);</div><div class='add'>+out:</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xts_paes_decrypt(struct skcipher_request *req)</div><div class='add'>+static inline int xts_paes_crypt(struct skcipher_request *req, unsigned long modifier)</div><div class='ctx'> {</div><div class='del'>-	return xts_paes_crypt(req, CPACF_DECRYPT);</div><div class='del'>-}</div><div class='add'>+	struct s390_pxts_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-static struct skcipher_alg xts_paes_alg = {</div><div class='del'>-	.base.cra_name		=	"xts(paes)",</div><div class='del'>-	.base.cra_driver_name	=	"xts-paes-s390",</div><div class='del'>-	.base.cra_priority	=	402,	/* ecb-paes-s390 + 1 */</div><div class='del'>-	.base.cra_blocksize	=	AES_BLOCK_SIZE,</div><div class='del'>-	.base.cra_ctxsize	=	sizeof(struct s390_pxts_ctx),</div><div class='del'>-	.base.cra_module	=	THIS_MODULE,</div><div class='del'>-	.base.cra_list		=	LIST_HEAD_INIT(xts_paes_alg.base.cra_list),</div><div class='del'>-	.init			=	xts_paes_init,</div><div class='del'>-	.exit			=	xts_paes_exit,</div><div class='del'>-	.min_keysize		=	2 * PAES_MIN_KEYSIZE,</div><div class='del'>-	.max_keysize		=	2 * PAES_MAX_KEYSIZE,</div><div class='del'>-	.ivsize			=	AES_BLOCK_SIZE,</div><div class='del'>-	.setkey			=	xts_paes_set_key,</div><div class='del'>-	.encrypt		=	xts_paes_encrypt,</div><div class='del'>-	.decrypt		=	xts_paes_decrypt,</div><div class='del'>-};</div><div class='add'>+	/*</div><div class='add'>+	 * Attempt synchronous encryption first. If it fails, schedule the request</div><div class='add'>+	 * asynchronously via the crypto engine. To preserve execution order,</div><div class='add'>+	 * once a request is queued to the engine, further requests using the same</div><div class='add'>+	 * tfm will also be routed through the engine.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='del'>-static int ctr_paes_init(struct crypto_skcipher *tfm)</div><div class='del'>-{</div><div class='del'>-	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	rc = skcipher_walk_virt(walk, req, false);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;kb.key = NULL;</div><div class='del'>-	spin_lock_init(&amp;ctx-&gt;pk_lock);</div><div class='add'>+	req_ctx-&gt;modifier = modifier;</div><div class='add'>+	req_ctx-&gt;param_init_done = false;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	/* Try synchronous operation if no active engine usage */</div><div class='add'>+	if (!atomic_read(&amp;ctx-&gt;via_engine_ctr)) {</div><div class='add'>+		rc = xts_paes_do_crypt(ctx, req_ctx, false);</div><div class='add'>+		if (rc == 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static void ctr_paes_exit(struct crypto_skcipher *tfm)</div><div class='del'>-{</div><div class='del'>-	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	/*</div><div class='add'>+	 * If sync operation failed or key expired or there are already</div><div class='add'>+	 * requests enqueued via engine, fallback to async. Mark tfm as</div><div class='add'>+	 * using engine to serialize requests.</div><div class='add'>+	 */</div><div class='add'>+	if (rc == 0 || rc == -EKEYEXPIRED) {</div><div class='add'>+		atomic_inc(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+		rc = crypto_transfer_skcipher_request_to_engine(paes_crypto_engine, req);</div><div class='add'>+		if (rc != -EINPROGRESS)</div><div class='add'>+			atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='ctx'> </div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='add'>+out:</div><div class='add'>+	if (rc != -EINPROGRESS)</div><div class='add'>+		memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("rc=%d\n", rc);</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int __ctr_paes_set_key(struct s390_paes_ctx *ctx)</div><div class='add'>+static int xts_paes_encrypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='del'>-	unsigned long fc;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = __paes_convert_key(ctx);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	/* Pick the correct function code based on the protected key type */</div><div class='del'>-	fc = (ctx-&gt;pk.type == PKEY_KEYTYPE_AES_128) ? CPACF_KMCTR_PAES_128 :</div><div class='del'>-		(ctx-&gt;pk.type == PKEY_KEYTYPE_AES_192) ? CPACF_KMCTR_PAES_192 :</div><div class='del'>-		(ctx-&gt;pk.type == PKEY_KEYTYPE_AES_256) ?</div><div class='del'>-		CPACF_KMCTR_PAES_256 : 0;</div><div class='del'>-</div><div class='del'>-	/* Check if the function code is available */</div><div class='del'>-	ctx-&gt;fc = (fc &amp;&amp; cpacf_test_func(&amp;kmctr_functions, fc)) ? fc : 0;</div><div class='add'>+	return xts_paes_crypt(req, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return ctx-&gt;fc ? 0 : -EINVAL;</div><div class='add'>+static int xts_paes_decrypt(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	return xts_paes_crypt(req, CPACF_DECRYPT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ctr_paes_set_key(struct crypto_skcipher *tfm, const u8 *in_key,</div><div class='del'>-			    unsigned int key_len)</div><div class='add'>+static int xts_paes_init(struct crypto_skcipher *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	int rc;</div><div class='add'>+	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	_free_kb_keybuf(&amp;ctx-&gt;kb);</div><div class='del'>-	rc = _key_to_kb(&amp;ctx-&gt;kb, in_key, key_len);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	memset(ctx, 0, sizeof(*ctx));</div><div class='add'>+	spin_lock_init(&amp;ctx-&gt;pk_lock);</div><div class='ctx'> </div><div class='del'>-	return __ctr_paes_set_key(ctx);</div><div class='add'>+	crypto_skcipher_set_reqsize(tfm, sizeof(struct s390_pxts_req_ctx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int __ctrblk_init(u8 *ctrptr, u8 *iv, unsigned int nbytes)</div><div class='add'>+static void xts_paes_exit(struct crypto_skcipher *tfm)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i, n;</div><div class='add'>+	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	/* only use complete blocks, max. PAGE_SIZE */</div><div class='del'>-	memcpy(ctrptr, iv, AES_BLOCK_SIZE);</div><div class='del'>-	n = (nbytes &gt; PAGE_SIZE) ? PAGE_SIZE : nbytes &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='del'>-	for (i = (n / AES_BLOCK_SIZE) - 1; i &gt; 0; i--) {</div><div class='del'>-		memcpy(ctrptr + AES_BLOCK_SIZE, ctrptr, AES_BLOCK_SIZE);</div><div class='del'>-		crypto_inc(ctrptr + AES_BLOCK_SIZE, AES_BLOCK_SIZE);</div><div class='del'>-		ctrptr += AES_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-	return n;</div><div class='add'>+	memzero_explicit(ctx, sizeof(*ctx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ctr_paes_crypt(struct skcipher_request *req)</div><div class='add'>+static int xts_paes_do_one_request(struct crypto_engine *engine, void *areq)</div><div class='ctx'> {</div><div class='add'>+	struct skcipher_request *req = skcipher_request_cast(areq);</div><div class='add'>+	struct s390_pxts_req_ctx *req_ctx = skcipher_request_ctx(req);</div><div class='ctx'> 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct s390_paes_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	u8 buf[AES_BLOCK_SIZE], *ctrptr;</div><div class='del'>-	struct {</div><div class='del'>-		u8 key[PAES_256_PROTKEY_SIZE];</div><div class='del'>-	} param;</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	unsigned int nbytes, n, k;</div><div class='del'>-	int rc, locked;</div><div class='del'>-</div><div class='del'>-	rc = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-	memcpy(param.key, ctx-&gt;pk.protkey, PAES_256_PROTKEY_SIZE);</div><div class='del'>-	spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-</div><div class='del'>-	locked = mutex_trylock(&amp;ctrblk_lock);</div><div class='add'>+	struct s390_pxts_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct skcipher_walk *walk = &amp;req_ctx-&gt;walk;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-	while ((nbytes = walk.nbytes) &gt;= AES_BLOCK_SIZE) {</div><div class='del'>-		n = AES_BLOCK_SIZE;</div><div class='del'>-		if (nbytes &gt;= 2*AES_BLOCK_SIZE &amp;&amp; locked)</div><div class='del'>-			n = __ctrblk_init(ctrblk, walk.iv, nbytes);</div><div class='del'>-		ctrptr = (n &gt; AES_BLOCK_SIZE) ? ctrblk : walk.iv;</div><div class='del'>-		k = cpacf_kmctr(ctx-&gt;fc, &amp;param, walk.dst.virt.addr,</div><div class='del'>-				walk.src.virt.addr, n, ctrptr);</div><div class='del'>-		if (k) {</div><div class='del'>-			if (ctrptr == ctrblk)</div><div class='del'>-				memcpy(walk.iv, ctrptr + k - AES_BLOCK_SIZE,</div><div class='del'>-				       AES_BLOCK_SIZE);</div><div class='del'>-			crypto_inc(walk.iv, AES_BLOCK_SIZE);</div><div class='del'>-			rc = skcipher_walk_done(&amp;walk, nbytes - k);</div><div class='del'>-		}</div><div class='del'>-		if (k &lt; n) {</div><div class='del'>-			if (__paes_convert_key(ctx)) {</div><div class='del'>-				if (locked)</div><div class='del'>-					mutex_unlock(&amp;ctrblk_lock);</div><div class='del'>-				return skcipher_walk_done(&amp;walk, -EIO);</div><div class='del'>-			}</div><div class='del'>-			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-			memcpy(param.key, ctx-&gt;pk.protkey, PAES_256_PROTKEY_SIZE);</div><div class='del'>-			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (locked)</div><div class='del'>-		mutex_unlock(&amp;ctrblk_lock);</div><div class='del'>-	/*</div><div class='del'>-	 * final block may be &lt; AES_BLOCK_SIZE, copy only nbytes</div><div class='del'>-	 */</div><div class='del'>-	if (nbytes) {</div><div class='del'>-		memset(buf, 0, AES_BLOCK_SIZE);</div><div class='del'>-		memcpy(buf, walk.src.virt.addr, nbytes);</div><div class='del'>-		while (1) {</div><div class='del'>-			if (cpacf_kmctr(ctx-&gt;fc, &amp;param, buf,</div><div class='del'>-					buf, AES_BLOCK_SIZE,</div><div class='del'>-					walk.iv) == AES_BLOCK_SIZE)</div><div class='del'>-				break;</div><div class='del'>-			if (__paes_convert_key(ctx))</div><div class='del'>-				return skcipher_walk_done(&amp;walk, -EIO);</div><div class='del'>-			spin_lock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-			memcpy(param.key, ctx-&gt;pk.protkey, PAES_256_PROTKEY_SIZE);</div><div class='del'>-			spin_unlock_bh(&amp;ctx-&gt;pk_lock);</div><div class='del'>-		}</div><div class='del'>-		memcpy(walk.dst.virt.addr, buf, nbytes);</div><div class='del'>-		crypto_inc(walk.iv, AES_BLOCK_SIZE);</div><div class='del'>-		rc = skcipher_walk_done(&amp;walk, nbytes);</div><div class='add'>+	/* walk has already been prepared */</div><div class='add'>+</div><div class='add'>+	rc = xts_paes_do_crypt(ctx, req_ctx, true);</div><div class='add'>+	if (rc == -EKEYEXPIRED) {</div><div class='add'>+		/*</div><div class='add'>+		 * Protected key expired, conversion is in process.</div><div class='add'>+		 * Trigger a re-schedule of this request by returning</div><div class='add'>+		 * -ENOSPC ("hardware queue is full") to the crypto engine.</div><div class='add'>+		 * To avoid immediately re-invocation of this callback,</div><div class='add'>+		 * tell the scheduler to voluntarily give up the CPU here.</div><div class='add'>+		 */</div><div class='add'>+		cond_resched();</div><div class='add'>+		pr_debug("rescheduling request\n");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	} else if (rc) {</div><div class='add'>+		skcipher_walk_done(walk, rc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	memzero_explicit(&amp;req_ctx-&gt;param, sizeof(req_ctx-&gt;param));</div><div class='add'>+	pr_debug("request complete with rc=%d\n", rc);</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	atomic_dec(&amp;ctx-&gt;via_engine_ctr);</div><div class='add'>+	crypto_finalize_skcipher_request(engine, req, rc);</div><div class='add'>+	local_bh_enable();</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct skcipher_alg ctr_paes_alg = {</div><div class='del'>-	.base.cra_name		=	"ctr(paes)",</div><div class='del'>-	.base.cra_driver_name	=	"ctr-paes-s390",</div><div class='del'>-	.base.cra_priority	=	402,	/* ecb-paes-s390 + 1 */</div><div class='del'>-	.base.cra_blocksize	=	1,</div><div class='del'>-	.base.cra_ctxsize	=	sizeof(struct s390_paes_ctx),</div><div class='del'>-	.base.cra_module	=	THIS_MODULE,</div><div class='del'>-	.base.cra_list		=	LIST_HEAD_INIT(ctr_paes_alg.base.cra_list),</div><div class='del'>-	.init			=	ctr_paes_init,</div><div class='del'>-	.exit			=	ctr_paes_exit,</div><div class='del'>-	.min_keysize		=	PAES_MIN_KEYSIZE,</div><div class='del'>-	.max_keysize		=	PAES_MAX_KEYSIZE,</div><div class='del'>-	.ivsize			=	AES_BLOCK_SIZE,</div><div class='del'>-	.setkey			=	ctr_paes_set_key,</div><div class='del'>-	.encrypt		=	ctr_paes_crypt,</div><div class='del'>-	.decrypt		=	ctr_paes_crypt,</div><div class='del'>-	.chunksize		=	AES_BLOCK_SIZE,</div><div class='add'>+static struct skcipher_engine_alg xts_paes_alg = {</div><div class='add'>+	.base = {</div><div class='add'>+		.base.cra_name	      =	"xts(paes)",</div><div class='add'>+		.base.cra_driver_name =	"xts-paes-s390",</div><div class='add'>+		.base.cra_priority    =	402,	/* ecb-paes-s390 + 1 */</div><div class='add'>+		.base.cra_blocksize   =	AES_BLOCK_SIZE,</div><div class='add'>+		.base.cra_ctxsize     =	sizeof(struct s390_pxts_ctx),</div><div class='add'>+		.base.cra_module      =	THIS_MODULE,</div><div class='add'>+		.base.cra_list	      =	LIST_HEAD_INIT(xts_paes_alg.base.base.cra_list),</div><div class='add'>+		.init		      =	xts_paes_init,</div><div class='add'>+		.exit		      =	xts_paes_exit,</div><div class='add'>+		.min_keysize	      =	2 * PAES_MIN_KEYSIZE,</div><div class='add'>+		.max_keysize	      =	2 * PAES_MAX_KEYSIZE,</div><div class='add'>+		.ivsize		      =	AES_BLOCK_SIZE,</div><div class='add'>+		.setkey		      =	xts_paes_setkey,</div><div class='add'>+		.encrypt	      =	xts_paes_encrypt,</div><div class='add'>+		.decrypt	      =	xts_paes_decrypt,</div><div class='add'>+	},</div><div class='add'>+	.op = {</div><div class='add'>+		.do_one_request	      = xts_paes_do_one_request,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline void __crypto_unregister_skcipher(struct skcipher_alg *alg)</div><div class='add'>+/*</div><div class='add'>+ * alg register, unregister, module init, exit</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct miscdevice paes_dev = {</div><div class='add'>+	.name	= "paes",</div><div class='add'>+	.minor	= MISC_DYNAMIC_MINOR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void __crypto_unregister_skcipher(struct skcipher_engine_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	if (!list_empty(&amp;alg-&gt;base.cra_list))</div><div class='del'>-		crypto_unregister_skcipher(alg);</div><div class='add'>+	if (!list_empty(&amp;alg-&gt;base.base.cra_list))</div><div class='add'>+		crypto_engine_unregister_skcipher(alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void paes_s390_fini(void)</div><div class='ctx'> {</div><div class='add'>+	if (paes_crypto_engine) {</div><div class='add'>+		crypto_engine_stop(paes_crypto_engine);</div><div class='add'>+		crypto_engine_exit(paes_crypto_engine);</div><div class='add'>+	}</div><div class='ctx'> 	__crypto_unregister_skcipher(&amp;ctr_paes_alg);</div><div class='ctx'> 	__crypto_unregister_skcipher(&amp;xts_paes_alg);</div><div class='ctx'> 	__crypto_unregister_skcipher(&amp;cbc_paes_alg);</div><div class='ctx'> 	__crypto_unregister_skcipher(&amp;ecb_paes_alg);</div><div class='ctx'> 	if (ctrblk)</div><div class='del'>-		free_page((unsigned long) ctrblk);</div><div class='add'>+		free_page((unsigned long)ctrblk);</div><div class='add'>+	misc_deregister(&amp;paes_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init paes_s390_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	/* register a simple paes pseudo misc device */</div><div class='add'>+	rc = misc_register(&amp;paes_dev);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* with this pseudo devie alloc and start a crypto engine */</div><div class='add'>+	paes_crypto_engine =</div><div class='add'>+		crypto_engine_alloc_init_and_set(paes_dev.this_device,</div><div class='add'>+						 true, NULL, false, MAX_QLEN);</div><div class='add'>+	if (!paes_crypto_engine) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+	rc = crypto_engine_start(paes_crypto_engine);</div><div class='add'>+	if (rc) {</div><div class='add'>+		crypto_engine_exit(paes_crypto_engine);</div><div class='add'>+		paes_crypto_engine = NULL;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Query available functions for KM, KMC and KMCTR */</div><div class='ctx'> 	cpacf_query(CPACF_KM, &amp;km_functions);</div><div class='ctx'> 	cpacf_query(CPACF_KMC, &amp;kmc_functions);</div><div class='hunk'>@@ -927,40 +1653,45 @@ static int __init paes_s390_init(void)</div><div class='ctx'> 	if (cpacf_test_func(&amp;km_functions, CPACF_KM_PAES_128) ||</div><div class='ctx'> 	    cpacf_test_func(&amp;km_functions, CPACF_KM_PAES_192) ||</div><div class='ctx'> 	    cpacf_test_func(&amp;km_functions, CPACF_KM_PAES_256)) {</div><div class='del'>-		rc = crypto_register_skcipher(&amp;ecb_paes_alg);</div><div class='add'>+		rc = crypto_engine_register_skcipher(&amp;ecb_paes_alg);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto out_err;</div><div class='add'>+		pr_debug("%s registered\n", ecb_paes_alg.base.base.cra_driver_name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpacf_test_func(&amp;kmc_functions, CPACF_KMC_PAES_128) ||</div><div class='ctx'> 	    cpacf_test_func(&amp;kmc_functions, CPACF_KMC_PAES_192) ||</div><div class='ctx'> 	    cpacf_test_func(&amp;kmc_functions, CPACF_KMC_PAES_256)) {</div><div class='del'>-		rc = crypto_register_skcipher(&amp;cbc_paes_alg);</div><div class='add'>+		rc = crypto_engine_register_skcipher(&amp;cbc_paes_alg);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto out_err;</div><div class='add'>+		pr_debug("%s registered\n", cbc_paes_alg.base.base.cra_driver_name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpacf_test_func(&amp;km_functions, CPACF_KM_PXTS_128) ||</div><div class='ctx'> 	    cpacf_test_func(&amp;km_functions, CPACF_KM_PXTS_256)) {</div><div class='del'>-		rc = crypto_register_skcipher(&amp;xts_paes_alg);</div><div class='add'>+		rc = crypto_engine_register_skcipher(&amp;xts_paes_alg);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto out_err;</div><div class='add'>+		pr_debug("%s registered\n", xts_paes_alg.base.base.cra_driver_name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpacf_test_func(&amp;kmctr_functions, CPACF_KMCTR_PAES_128) ||</div><div class='ctx'> 	    cpacf_test_func(&amp;kmctr_functions, CPACF_KMCTR_PAES_192) ||</div><div class='ctx'> 	    cpacf_test_func(&amp;kmctr_functions, CPACF_KMCTR_PAES_256)) {</div><div class='del'>-		ctrblk = (u8 *) __get_free_page(GFP_KERNEL);</div><div class='add'>+		ctrblk = (u8 *)__get_free_page(GFP_KERNEL);</div><div class='ctx'> 		if (!ctrblk) {</div><div class='ctx'> 			rc = -ENOMEM;</div><div class='ctx'> 			goto out_err;</div><div class='ctx'> 		}</div><div class='del'>-		rc = crypto_register_skcipher(&amp;ctr_paes_alg);</div><div class='add'>+		rc = crypto_engine_register_skcipher(&amp;ctr_paes_alg);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto out_err;</div><div class='add'>+		pr_debug("%s registered\n", ctr_paes_alg.base.base.cra_driver_name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='ctx'> out_err:</div><div class='ctx'> 	paes_s390_fini();</div><div class='ctx'> 	return rc;</div><div class='head'>diff --git a/arch/s390/crypto/sha.h b/arch/s390/crypto/sha.h<br/>index 2bb22db54c31..d757ccbce2b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/sha.h</a></div><div class='hunk'>@@ -10,27 +10,33 @@</div><div class='ctx'> #ifndef _CRYPTO_ARCH_S390_SHA_H</div><div class='ctx'> #define _CRYPTO_ARCH_S390_SHA_H</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha3.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* must be big enough for the largest SHA variant */</div><div class='del'>-#define SHA3_STATE_SIZE			200</div><div class='ctx'> #define CPACF_MAX_PARMBLOCK_SIZE	SHA3_STATE_SIZE</div><div class='ctx'> #define SHA_MAX_BLOCK_SIZE		SHA3_224_BLOCK_SIZE</div><div class='add'>+#define S390_SHA_CTX_SIZE		sizeof(struct s390_sha_ctx)</div><div class='ctx'> </div><div class='ctx'> struct s390_sha_ctx {</div><div class='ctx'> 	u64 count;		/* message length in bytes */</div><div class='del'>-	u32 state[CPACF_MAX_PARMBLOCK_SIZE / sizeof(u32)];</div><div class='del'>-	u8 buf[SHA_MAX_BLOCK_SIZE];</div><div class='add'>+	union {</div><div class='add'>+		u32 state[CPACF_MAX_PARMBLOCK_SIZE / sizeof(u32)];</div><div class='add'>+		struct {</div><div class='add'>+			u64 state[SHA512_DIGEST_SIZE / sizeof(u64)];</div><div class='add'>+			u64 count_hi;</div><div class='add'>+		} sha512;</div><div class='add'>+	};</div><div class='ctx'> 	int func;		/* KIMD function to use */</div><div class='del'>-	int first_message_part;</div><div class='add'>+	bool first_message_part;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct shash_desc;</div><div class='ctx'> </div><div class='del'>-int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len);</div><div class='del'>-int s390_sha_final(struct shash_desc *desc, u8 *out);</div><div class='add'>+int s390_sha_update_blocks(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			   unsigned int len);</div><div class='add'>+int s390_sha_finup(struct shash_desc *desc, const u8 *src, unsigned int len,</div><div class='add'>+		   u8 *out);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/s390/crypto/sha1_s390.c b/arch/s390/crypto/sha1_s390.c<br/>index bc3a22704e09..d229cbd2ba22 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha1_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha1_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha1_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/sha1_s390.c</a></div><div class='hunk'>@@ -18,12 +18,12 @@</div><div class='ctx'>  *   Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='ctx'>  *   Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='ctx'>  */</div><div class='add'>+#include &lt;asm/cpacf.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;asm/cpacf.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sha.h"</div><div class='ctx'> </div><div class='hunk'>@@ -49,7 +49,6 @@ static int s390_sha1_export(struct shash_desc *desc, void *out)</div><div class='ctx'> </div><div class='ctx'> 	octx-&gt;count = sctx-&gt;count;</div><div class='ctx'> 	memcpy(octx-&gt;state, sctx-&gt;state, sizeof(octx-&gt;state));</div><div class='del'>-	memcpy(octx-&gt;buffer, sctx-&gt;buf, sizeof(octx-&gt;buffer));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +59,6 @@ static int s390_sha1_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> </div><div class='ctx'> 	sctx-&gt;count = ictx-&gt;count;</div><div class='ctx'> 	memcpy(sctx-&gt;state, ictx-&gt;state, sizeof(ictx-&gt;state));</div><div class='del'>-	memcpy(sctx-&gt;buf, ictx-&gt;buffer, sizeof(ictx-&gt;buffer));</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA_1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -68,16 +66,18 @@ static int s390_sha1_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	s390_sha1_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='add'>+	.update		=	s390_sha_update_blocks,</div><div class='add'>+	.finup		=	s390_sha_finup,</div><div class='ctx'> 	.export		=	s390_sha1_export,</div><div class='ctx'> 	.import		=	s390_sha1_import,</div><div class='del'>-	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	S390_SHA_CTX_SIZE,</div><div class='add'>+	.statesize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name=	"sha1-s390",</div><div class='ctx'> 		.cra_priority	=	300,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/s390/crypto/sha256_s390.c b/arch/s390/crypto/sha256_s390.c<br/>deleted file mode 100644<br/>index 6f1ccdf93d3e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha256_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha256_s390.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,143 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0+</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * s390 implementation of the SHA256 and SHA224 Secure Hash Algorithm.</div><div class='del'>- *</div><div class='del'>- * s390 Version:</div><div class='del'>- *   Copyright IBM Corp. 2005, 2011</div><div class='del'>- *   Author(s): Jan Glauber (jang@de.ibm.com)</div><div class='del'>- */</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;asm/cpacf.h&gt;</div><div class='del'>-</div><div class='del'>-#include "sha.h"</div><div class='del'>-</div><div class='del'>-static int s390_sha256_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;state[0] = SHA256_H0;</div><div class='del'>-	sctx-&gt;state[1] = SHA256_H1;</div><div class='del'>-	sctx-&gt;state[2] = SHA256_H2;</div><div class='del'>-	sctx-&gt;state[3] = SHA256_H3;</div><div class='del'>-	sctx-&gt;state[4] = SHA256_H4;</div><div class='del'>-	sctx-&gt;state[5] = SHA256_H5;</div><div class='del'>-	sctx-&gt;state[6] = SHA256_H6;</div><div class='del'>-	sctx-&gt;state[7] = SHA256_H7;</div><div class='del'>-	sctx-&gt;count = 0;</div><div class='del'>-	sctx-&gt;func = CPACF_KIMD_SHA_256;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct sha256_state *octx = out;</div><div class='del'>-</div><div class='del'>-	octx-&gt;count = sctx-&gt;count;</div><div class='del'>-	memcpy(octx-&gt;state, sctx-&gt;state, sizeof(octx-&gt;state));</div><div class='del'>-	memcpy(octx-&gt;buf, sctx-&gt;buf, sizeof(octx-&gt;buf));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const struct sha256_state *ictx = in;</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count = ictx-&gt;count;</div><div class='del'>-	memcpy(sctx-&gt;state, ictx-&gt;state, sizeof(ictx-&gt;state));</div><div class='del'>-	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='del'>-	sctx-&gt;func = CPACF_KIMD_SHA_256;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha256_alg = {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	s390_sha256_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='del'>-	.export		=	sha256_export,</div><div class='del'>-	.import		=	sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name=	"sha256-s390",</div><div class='del'>-		.cra_priority	=	300,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int s390_sha224_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;state[0] = SHA224_H0;</div><div class='del'>-	sctx-&gt;state[1] = SHA224_H1;</div><div class='del'>-	sctx-&gt;state[2] = SHA224_H2;</div><div class='del'>-	sctx-&gt;state[3] = SHA224_H3;</div><div class='del'>-	sctx-&gt;state[4] = SHA224_H4;</div><div class='del'>-	sctx-&gt;state[5] = SHA224_H5;</div><div class='del'>-	sctx-&gt;state[6] = SHA224_H6;</div><div class='del'>-	sctx-&gt;state[7] = SHA224_H7;</div><div class='del'>-	sctx-&gt;count = 0;</div><div class='del'>-	sctx-&gt;func = CPACF_KIMD_SHA_256;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha224_alg = {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	s390_sha224_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='del'>-	.export		=	sha256_export,</div><div class='del'>-	.import		=	sha256_import,</div><div class='del'>-	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name=	"sha224-s390",</div><div class='del'>-		.cra_priority	=	300,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init sha256_s390_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!cpacf_query_func(CPACF_KIMD, CPACF_KIMD_SHA_256))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	ret = crypto_register_shash(&amp;sha256_alg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-	ret = crypto_register_shash(&amp;sha224_alg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		crypto_unregister_shash(&amp;sha256_alg);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_s390_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;sha224_alg);</div><div class='del'>-	crypto_unregister_shash(&amp;sha256_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_cpu_feature_match(S390_CPU_FEATURE_MSA, sha256_s390_init);</div><div class='del'>-module_exit(sha256_s390_fini);</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA256 and SHA224 Secure Hash Algorithm");</div><div class='head'>diff --git a/arch/s390/crypto/sha3_256_s390.c b/arch/s390/crypto/sha3_256_s390.c<br/>index a84ef692f572..4a7731ac6bcd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha3_256_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha3_256_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha3_256_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/sha3_256_s390.c</a></div><div class='hunk'>@@ -8,12 +8,14 @@</div><div class='ctx'>  *   Copyright IBM Corp. 2019</div><div class='ctx'>  *   Author(s): Joerg Schmidbauer (jschmidb@de.ibm.com)</div><div class='ctx'>  */</div><div class='add'>+#include &lt;asm/cpacf.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;crypto/sha3.h&gt;</div><div class='del'>-#include &lt;asm/cpacf.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sha.h"</div><div class='ctx'> </div><div class='hunk'>@@ -21,11 +23,11 @@ static int sha3_256_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (!test_facility(86)) /* msa 12 */</div><div class='add'>+	sctx-&gt;first_message_part = test_facility(86);</div><div class='add'>+	if (!sctx-&gt;first_message_part)</div><div class='ctx'> 		memset(sctx-&gt;state, 0, sizeof(sctx-&gt;state));</div><div class='ctx'> 	sctx-&gt;count = 0;</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_256;</div><div class='del'>-	sctx-&gt;first_message_part = 1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -35,11 +37,11 @@ static int sha3_256_export(struct shash_desc *desc, void *out)</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> 	struct sha3_state *octx = out;</div><div class='ctx'> </div><div class='del'>-	octx-&gt;rsiz = sctx-&gt;count;</div><div class='add'>+	if (sctx-&gt;first_message_part) {</div><div class='add'>+		memset(sctx-&gt;state, 0, sizeof(sctx-&gt;state));</div><div class='add'>+		sctx-&gt;first_message_part = 0;</div><div class='add'>+	}</div><div class='ctx'> 	memcpy(octx-&gt;st, sctx-&gt;state, sizeof(octx-&gt;st));</div><div class='del'>-	memcpy(octx-&gt;buf, sctx-&gt;buf, sizeof(octx-&gt;buf));</div><div class='del'>-	octx-&gt;partial = sctx-&gt;first_message_part;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -48,10 +50,9 @@ static int sha3_256_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct sha3_state *ictx = in;</div><div class='ctx'> </div><div class='del'>-	sctx-&gt;count = ictx-&gt;rsiz;</div><div class='add'>+	sctx-&gt;count = 0;</div><div class='ctx'> 	memcpy(sctx-&gt;state, ictx-&gt;st, sizeof(ictx-&gt;st));</div><div class='del'>-	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='del'>-	sctx-&gt;first_message_part = ictx-&gt;partial;</div><div class='add'>+	sctx-&gt;first_message_part = 0;</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_256;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -60,30 +61,26 @@ static int sha3_256_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> static int sha3_224_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const struct sha3_state *ictx = in;</div><div class='ctx'> </div><div class='del'>-	sctx-&gt;count = ictx-&gt;rsiz;</div><div class='del'>-	memcpy(sctx-&gt;state, ictx-&gt;st, sizeof(ictx-&gt;st));</div><div class='del'>-	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='del'>-	sctx-&gt;first_message_part = ictx-&gt;partial;</div><div class='add'>+	sha3_256_import(desc, in);</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_224;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha3_256_alg = {</div><div class='ctx'> 	.digestsize	=	SHA3_256_DIGEST_SIZE,	   /* = 32 */</div><div class='ctx'> 	.init		=	sha3_256_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='add'>+	.update		=	s390_sha_update_blocks,</div><div class='add'>+	.finup		=	s390_sha_finup,</div><div class='ctx'> 	.export		=	sha3_256_export,</div><div class='ctx'> 	.import		=	sha3_256_import,</div><div class='del'>-	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha3_state),</div><div class='add'>+	.descsize	=	S390_SHA_CTX_SIZE,</div><div class='add'>+	.statesize	=	SHA3_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"sha3-256",</div><div class='ctx'> 		.cra_driver_name =	"sha3-256-s390",</div><div class='ctx'> 		.cra_priority	 =	300,</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	SHA3_256_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -93,28 +90,25 @@ static int sha3_224_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (!test_facility(86)) /* msa 12 */</div><div class='del'>-		memset(sctx-&gt;state, 0, sizeof(sctx-&gt;state));</div><div class='del'>-	sctx-&gt;count = 0;</div><div class='add'>+	sha3_256_init(desc);</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_224;</div><div class='del'>-	sctx-&gt;first_message_part = 1;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha3_224_alg = {</div><div class='ctx'> 	.digestsize	=	SHA3_224_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha3_224_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='add'>+	.update		=	s390_sha_update_blocks,</div><div class='add'>+	.finup		=	s390_sha_finup,</div><div class='ctx'> 	.export		=	sha3_256_export, /* same as for 256 */</div><div class='ctx'> 	.import		=	sha3_224_import, /* function code different! */</div><div class='del'>-	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha3_state),</div><div class='add'>+	.descsize	=	S390_SHA_CTX_SIZE,</div><div class='add'>+	.statesize	=	SHA3_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"sha3-224",</div><div class='ctx'> 		.cra_driver_name =	"sha3-224-s390",</div><div class='ctx'> 		.cra_priority	 =	300,</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	SHA3_224_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/s390/crypto/sha3_512_s390.c b/arch/s390/crypto/sha3_512_s390.c<br/>index 07528fc98ff7..018f02fff444 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha3_512_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha3_512_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha3_512_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/sha3_512_s390.c</a></div><div class='hunk'>@@ -7,12 +7,14 @@</div><div class='ctx'>  * Copyright IBM Corp. 2019</div><div class='ctx'>  * Author(s): Joerg Schmidbauer (jschmidb@de.ibm.com)</div><div class='ctx'>  */</div><div class='add'>+#include &lt;asm/cpacf.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;crypto/sha3.h&gt;</div><div class='del'>-#include &lt;asm/cpacf.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sha.h"</div><div class='ctx'> </div><div class='hunk'>@@ -20,11 +22,11 @@ static int sha3_512_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (!test_facility(86)) /* msa 12 */</div><div class='add'>+	sctx-&gt;first_message_part = test_facility(86);</div><div class='add'>+	if (!sctx-&gt;first_message_part)</div><div class='ctx'> 		memset(sctx-&gt;state, 0, sizeof(sctx-&gt;state));</div><div class='ctx'> 	sctx-&gt;count = 0;</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_512;</div><div class='del'>-	sctx-&gt;first_message_part = 1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -34,13 +36,12 @@ static int sha3_512_export(struct shash_desc *desc, void *out)</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> 	struct sha3_state *octx = out;</div><div class='ctx'> </div><div class='del'>-	octx-&gt;rsiz = sctx-&gt;count;</div><div class='del'>-	octx-&gt;rsizw = sctx-&gt;count &gt;&gt; 32;</div><div class='ctx'> </div><div class='add'>+	if (sctx-&gt;first_message_part) {</div><div class='add'>+		memset(sctx-&gt;state, 0, sizeof(sctx-&gt;state));</div><div class='add'>+		sctx-&gt;first_message_part = 0;</div><div class='add'>+	}</div><div class='ctx'> 	memcpy(octx-&gt;st, sctx-&gt;state, sizeof(octx-&gt;st));</div><div class='del'>-	memcpy(octx-&gt;buf, sctx-&gt;buf, sizeof(octx-&gt;buf));</div><div class='del'>-	octx-&gt;partial = sctx-&gt;first_message_part;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -49,13 +50,9 @@ static int sha3_512_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct sha3_state *ictx = in;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(ictx-&gt;rsizw))</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	sctx-&gt;count = ictx-&gt;rsiz;</div><div class='del'>-</div><div class='add'>+	sctx-&gt;count = 0;</div><div class='ctx'> 	memcpy(sctx-&gt;state, ictx-&gt;st, sizeof(ictx-&gt;st));</div><div class='del'>-	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='del'>-	sctx-&gt;first_message_part = ictx-&gt;partial;</div><div class='add'>+	sctx-&gt;first_message_part = 0;</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_512;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -64,33 +61,26 @@ static int sha3_512_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> static int sha3_384_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='del'>-	const struct sha3_state *ictx = in;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(ictx-&gt;rsizw))</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	sctx-&gt;count = ictx-&gt;rsiz;</div><div class='del'>-</div><div class='del'>-	memcpy(sctx-&gt;state, ictx-&gt;st, sizeof(ictx-&gt;st));</div><div class='del'>-	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='del'>-	sctx-&gt;first_message_part = ictx-&gt;partial;</div><div class='add'>+	sha3_512_import(desc, in);</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_384;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha3_512_alg = {</div><div class='ctx'> 	.digestsize	=	SHA3_512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha3_512_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='add'>+	.update		=	s390_sha_update_blocks,</div><div class='add'>+	.finup		=	s390_sha_finup,</div><div class='ctx'> 	.export		=	sha3_512_export,</div><div class='ctx'> 	.import		=	sha3_512_import,</div><div class='del'>-	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha3_state),</div><div class='add'>+	.descsize	=	S390_SHA_CTX_SIZE,</div><div class='add'>+	.statesize	=	SHA3_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"sha3-512",</div><div class='ctx'> 		.cra_driver_name =	"sha3-512-s390",</div><div class='ctx'> 		.cra_priority	 =	300,</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	SHA3_512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -102,28 +92,25 @@ static int sha3_384_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	if (!test_facility(86)) /* msa 12 */</div><div class='del'>-		memset(sctx-&gt;state, 0, sizeof(sctx-&gt;state));</div><div class='del'>-	sctx-&gt;count = 0;</div><div class='add'>+	sha3_512_init(desc);</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA3_384;</div><div class='del'>-	sctx-&gt;first_message_part = 1;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha3_384_alg = {</div><div class='ctx'> 	.digestsize	=	SHA3_384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha3_384_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='add'>+	.update		=	s390_sha_update_blocks,</div><div class='add'>+	.finup		=	s390_sha_finup,</div><div class='ctx'> 	.export		=	sha3_512_export, /* same as for 512 */</div><div class='ctx'> 	.import		=	sha3_384_import, /* function code different! */</div><div class='del'>-	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha3_state),</div><div class='add'>+	.descsize	=	S390_SHA_CTX_SIZE,</div><div class='add'>+	.statesize	=	SHA3_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"sha3-384",</div><div class='ctx'> 		.cra_driver_name =	"sha3-384-s390",</div><div class='ctx'> 		.cra_priority	 =	300,</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	SHA3_384_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize	 =	sizeof(struct s390_sha_ctx),</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='head'>diff --git a/arch/s390/crypto/sha512_s390.c b/arch/s390/crypto/sha512_s390.c<br/>index 04f11c407763..33711a29618c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha512_s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha512_s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha512_s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/sha512_s390.c</a></div><div class='hunk'>@@ -7,14 +7,13 @@</div><div class='ctx'>  * Copyright IBM Corp. 2007</div><div class='ctx'>  * Author(s): Jan Glauber (jang@de.ibm.com)</div><div class='ctx'>  */</div><div class='add'>+#include &lt;asm/cpacf.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/cpufeature.h&gt;</div><div class='del'>-#include &lt;asm/cpacf.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sha.h"</div><div class='ctx'> </div><div class='hunk'>@@ -22,15 +21,16 @@ static int sha512_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[0] = SHA512_H0;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[2] = SHA512_H1;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[4] = SHA512_H2;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[6] = SHA512_H3;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[8] = SHA512_H4;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[10] = SHA512_H5;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[12] = SHA512_H6;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[14] = SHA512_H7;</div><div class='add'>+	ctx-&gt;sha512.state[0] = SHA512_H0;</div><div class='add'>+	ctx-&gt;sha512.state[1] = SHA512_H1;</div><div class='add'>+	ctx-&gt;sha512.state[2] = SHA512_H2;</div><div class='add'>+	ctx-&gt;sha512.state[3] = SHA512_H3;</div><div class='add'>+	ctx-&gt;sha512.state[4] = SHA512_H4;</div><div class='add'>+	ctx-&gt;sha512.state[5] = SHA512_H5;</div><div class='add'>+	ctx-&gt;sha512.state[6] = SHA512_H6;</div><div class='add'>+	ctx-&gt;sha512.state[7] = SHA512_H7;</div><div class='ctx'> 	ctx-&gt;count = 0;</div><div class='add'>+	ctx-&gt;sha512.count_hi = 0;</div><div class='ctx'> 	ctx-&gt;func = CPACF_KIMD_SHA_512;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -42,9 +42,8 @@ static int sha512_export(struct shash_desc *desc, void *out)</div><div class='ctx'> 	struct sha512_state *octx = out;</div><div class='ctx'> </div><div class='ctx'> 	octx-&gt;count[0] = sctx-&gt;count;</div><div class='del'>-	octx-&gt;count[1] = 0;</div><div class='add'>+	octx-&gt;count[1] = sctx-&gt;sha512.count_hi;</div><div class='ctx'> 	memcpy(octx-&gt;state, sctx-&gt;state, sizeof(octx-&gt;state));</div><div class='del'>-	memcpy(octx-&gt;buf, sctx-&gt;buf, sizeof(octx-&gt;buf));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -53,12 +52,10 @@ static int sha512_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> 	struct s390_sha_ctx *sctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct sha512_state *ictx = in;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(ictx-&gt;count[1]))</div><div class='del'>-		return -ERANGE;</div><div class='ctx'> 	sctx-&gt;count = ictx-&gt;count[0];</div><div class='add'>+	sctx-&gt;sha512.count_hi = ictx-&gt;count[1];</div><div class='ctx'> </div><div class='ctx'> 	memcpy(sctx-&gt;state, ictx-&gt;state, sizeof(ictx-&gt;state));</div><div class='del'>-	memcpy(sctx-&gt;buf, ictx-&gt;buf, sizeof(ictx-&gt;buf));</div><div class='ctx'> 	sctx-&gt;func = CPACF_KIMD_SHA_512;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -66,16 +63,18 @@ static int sha512_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> static struct shash_alg sha512_alg = {</div><div class='ctx'> 	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha512_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='add'>+	.update		=	s390_sha_update_blocks,</div><div class='add'>+	.finup		=	s390_sha_finup,</div><div class='ctx'> 	.export		=	sha512_export,</div><div class='ctx'> 	.import		=	sha512_import,</div><div class='ctx'> 	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha512_state),</div><div class='add'>+	.statesize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha512",</div><div class='ctx'> 		.cra_driver_name=	"sha512-s390",</div><div class='ctx'> 		.cra_priority	=	300,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -87,15 +86,16 @@ static int sha384_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[0] = SHA384_H0;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[2] = SHA384_H1;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[4] = SHA384_H2;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[6] = SHA384_H3;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[8] = SHA384_H4;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[10] = SHA384_H5;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[12] = SHA384_H6;</div><div class='del'>-	*(__u64 *)&amp;ctx-&gt;state[14] = SHA384_H7;</div><div class='add'>+	ctx-&gt;sha512.state[0] = SHA384_H0;</div><div class='add'>+	ctx-&gt;sha512.state[1] = SHA384_H1;</div><div class='add'>+	ctx-&gt;sha512.state[2] = SHA384_H2;</div><div class='add'>+	ctx-&gt;sha512.state[3] = SHA384_H3;</div><div class='add'>+	ctx-&gt;sha512.state[4] = SHA384_H4;</div><div class='add'>+	ctx-&gt;sha512.state[5] = SHA384_H5;</div><div class='add'>+	ctx-&gt;sha512.state[6] = SHA384_H6;</div><div class='add'>+	ctx-&gt;sha512.state[7] = SHA384_H7;</div><div class='ctx'> 	ctx-&gt;count = 0;</div><div class='add'>+	ctx-&gt;sha512.count_hi = 0;</div><div class='ctx'> 	ctx-&gt;func = CPACF_KIMD_SHA_512;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -104,17 +104,19 @@ static int sha384_init(struct shash_desc *desc)</div><div class='ctx'> static struct shash_alg sha384_alg = {</div><div class='ctx'> 	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha384_init,</div><div class='del'>-	.update		=	s390_sha_update,</div><div class='del'>-	.final		=	s390_sha_final,</div><div class='add'>+	.update		=	s390_sha_update_blocks,</div><div class='add'>+	.finup		=	s390_sha_finup,</div><div class='ctx'> 	.export		=	sha512_export,</div><div class='ctx'> 	.import		=	sha512_import,</div><div class='ctx'> 	.descsize	=	sizeof(struct s390_sha_ctx),</div><div class='del'>-	.statesize	=	sizeof(struct sha512_state),</div><div class='add'>+	.statesize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha384",</div><div class='ctx'> 		.cra_driver_name=	"sha384-s390",</div><div class='ctx'> 		.cra_priority	=	300,</div><div class='ctx'> 		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_ctxsize	=	sizeof(struct s390_sha_ctx),</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c<br/>index 961d7d522af1..b5e2c365ea05 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha_common.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/sha_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/crypto/sha_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/crypto/sha_common.c</a></div><div class='hunk'>@@ -13,50 +13,33 @@</div><div class='ctx'> #include &lt;asm/cpacf.h&gt;</div><div class='ctx'> #include "sha.h"</div><div class='ctx'> </div><div class='del'>-int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len)</div><div class='add'>+int s390_sha_update_blocks(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			   unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct s390_sha_ctx *ctx = shash_desc_ctx(desc);</div><div class='ctx'> 	unsigned int bsize = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='del'>-	unsigned int index, n;</div><div class='add'>+	struct s390_sha_ctx *ctx = shash_desc_ctx(desc);</div><div class='add'>+	unsigned int n;</div><div class='ctx'> 	int fc;</div><div class='ctx'> </div><div class='del'>-	/* how much is already in the buffer? */</div><div class='del'>-	index = ctx-&gt;count % bsize;</div><div class='del'>-	ctx-&gt;count += len;</div><div class='del'>-</div><div class='del'>-	if ((index + len) &lt; bsize)</div><div class='del'>-		goto store;</div><div class='del'>-</div><div class='ctx'> 	fc = ctx-&gt;func;</div><div class='ctx'> 	if (ctx-&gt;first_message_part)</div><div class='del'>-		fc |= test_facility(86) ? CPACF_KIMD_NIP : 0;</div><div class='del'>-</div><div class='del'>-	/* process one stored block */</div><div class='del'>-	if (index) {</div><div class='del'>-		memcpy(ctx-&gt;buf + index, data, bsize - index);</div><div class='del'>-		cpacf_kimd(fc, ctx-&gt;state, ctx-&gt;buf, bsize);</div><div class='del'>-		ctx-&gt;first_message_part = 0;</div><div class='del'>-		fc &amp;= ~CPACF_KIMD_NIP;</div><div class='del'>-		data += bsize - index;</div><div class='del'>-		len -= bsize - index;</div><div class='del'>-		index = 0;</div><div class='del'>-	}</div><div class='add'>+		fc |= CPACF_KIMD_NIP;</div><div class='ctx'> </div><div class='ctx'> 	/* process as many blocks as possible */</div><div class='del'>-	if (len &gt;= bsize) {</div><div class='del'>-		n = (len / bsize) * bsize;</div><div class='del'>-		cpacf_kimd(fc, ctx-&gt;state, data, n);</div><div class='del'>-		ctx-&gt;first_message_part = 0;</div><div class='del'>-		data += n;</div><div class='del'>-		len -= n;</div><div class='add'>+	n = (len / bsize) * bsize;</div><div class='add'>+	ctx-&gt;count += n;</div><div class='add'>+	switch (ctx-&gt;func) {</div><div class='add'>+	case CPACF_KLMD_SHA_512:</div><div class='add'>+	case CPACF_KLMD_SHA3_384:</div><div class='add'>+		if (ctx-&gt;count &lt; n)</div><div class='add'>+			ctx-&gt;sha512.count_hi++;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='del'>-store:</div><div class='del'>-	if (len)</div><div class='del'>-		memcpy(ctx-&gt;buf + index , data, len);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	cpacf_kimd(fc, ctx-&gt;state, data, n);</div><div class='add'>+	ctx-&gt;first_message_part = 0;</div><div class='add'>+	return len - n;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(s390_sha_update);</div><div class='add'>+EXPORT_SYMBOL_GPL(s390_sha_update_blocks);</div><div class='ctx'> </div><div class='ctx'> static int s390_crypto_shash_parmsize(int func)</div><div class='ctx'> {</div><div class='hunk'>@@ -77,15 +60,15 @@ static int s390_crypto_shash_parmsize(int func)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int s390_sha_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+int s390_sha_finup(struct shash_desc *desc, const u8 *src, unsigned int len,</div><div class='add'>+		   u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct s390_sha_ctx *ctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int bsize = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='del'>-	u64 bits;</div><div class='del'>-	unsigned int n;</div><div class='ctx'> 	int mbl_offset, fc;</div><div class='add'>+	u64 bits;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;count += len;</div><div class='ctx'> </div><div class='del'>-	n = ctx-&gt;count % bsize;</div><div class='ctx'> 	bits = ctx-&gt;count * 8;</div><div class='ctx'> 	mbl_offset = s390_crypto_shash_parmsize(ctx-&gt;func);</div><div class='ctx'> 	if (mbl_offset &lt; 0)</div><div class='hunk'>@@ -95,17 +78,16 @@ int s390_sha_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> </div><div class='ctx'> 	/* set total msg bit length (mbl) in CPACF parmblock */</div><div class='ctx'> 	switch (ctx-&gt;func) {</div><div class='del'>-	case CPACF_KLMD_SHA_1:</div><div class='del'>-	case CPACF_KLMD_SHA_256:</div><div class='del'>-		memcpy(ctx-&gt;state + mbl_offset, &amp;bits, sizeof(bits));</div><div class='del'>-		break;</div><div class='ctx'> 	case CPACF_KLMD_SHA_512:</div><div class='del'>-		/*</div><div class='del'>-		 * the SHA512 parmblock has a 128-bit mbl field, clear</div><div class='del'>-		 * high-order u64 field, copy bits to low-order u64 field</div><div class='del'>-		 */</div><div class='del'>-		memset(ctx-&gt;state + mbl_offset, 0x00, sizeof(bits));</div><div class='add'>+		/* The SHA512 parmblock has a 128-bit mbl field. */</div><div class='add'>+		if (ctx-&gt;count &lt; len)</div><div class='add'>+			ctx-&gt;sha512.count_hi++;</div><div class='add'>+		ctx-&gt;sha512.count_hi &lt;&lt;= 3;</div><div class='add'>+		ctx-&gt;sha512.count_hi |= ctx-&gt;count &gt;&gt; 61;</div><div class='ctx'> 		mbl_offset += sizeof(u64) / sizeof(u32);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case CPACF_KLMD_SHA_1:</div><div class='add'>+	case CPACF_KLMD_SHA_256:</div><div class='ctx'> 		memcpy(ctx-&gt;state + mbl_offset, &amp;bits, sizeof(bits));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CPACF_KLMD_SHA3_224:</div><div class='hunk'>@@ -121,16 +103,14 @@ int s390_sha_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 	fc |= test_facility(86) ? CPACF_KLMD_DUFOP : 0;</div><div class='ctx'> 	if (ctx-&gt;first_message_part)</div><div class='ctx'> 		fc |= CPACF_KLMD_NIP;</div><div class='del'>-	cpacf_klmd(fc, ctx-&gt;state, ctx-&gt;buf, n);</div><div class='add'>+	cpacf_klmd(fc, ctx-&gt;state, src, len);</div><div class='ctx'> </div><div class='ctx'> 	/* copy digest to out */</div><div class='ctx'> 	memcpy(out, ctx-&gt;state, crypto_shash_digestsize(desc-&gt;tfm));</div><div class='del'>-	/* wipe context */</div><div class='del'>-	memset(ctx, 0, sizeof *ctx);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(s390_sha_final);</div><div class='add'>+EXPORT_SYMBOL_GPL(s390_sha_finup);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("s390 SHA cipher common functions");</div><div class='head'>diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c<br/>index 04ea1c03a5ff..96409573c75d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/hypfs/inode.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/hypfs/inode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/hypfs/inode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/hypfs/inode.c</a></div><div class='hunk'>@@ -342,7 +342,7 @@ static struct dentry *hypfs_create_file(struct dentry *parent, const char *name,</div><div class='ctx'> 	struct inode *inode;</div><div class='ctx'> </div><div class='ctx'> 	inode_lock(d_inode(parent));</div><div class='del'>-	dentry = lookup_one_len(name, parent, strlen(name));</div><div class='add'>+	dentry = lookup_noperm(&amp;QSTR(name), parent);</div><div class='ctx'> 	if (IS_ERR(dentry)) {</div><div class='ctx'> 		dentry = ERR_PTR(-ENOMEM);</div><div class='ctx'> 		goto fail;</div><div class='head'>diff --git a/arch/s390/include/asm/asce.h b/arch/s390/include/asm/asce.h<br/>new file mode 100644<br/>index 000000000000..f6dfaaba735a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/asce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/asce.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_S390_ASCE_H</div><div class='add'>+#define _ASM_S390_ASCE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/thread_info.h&gt;</div><div class='add'>+#include &lt;linux/irqflags.h&gt;</div><div class='add'>+#include &lt;asm/lowcore.h&gt;</div><div class='add'>+#include &lt;asm/ctlreg.h&gt;</div><div class='add'>+</div><div class='add'>+static inline bool enable_sacf_uaccess(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (test_thread_flag(TIF_ASCE_PRIMARY))</div><div class='add'>+		return true;</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	local_ctl_load(1, &amp;get_lowcore()-&gt;kernel_asce);</div><div class='add'>+	set_thread_flag(TIF_ASCE_PRIMARY);</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void disable_sacf_uaccess(bool previous)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (previous)</div><div class='add'>+		return;</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	local_ctl_load(1, &amp;get_lowcore()-&gt;user_asce);</div><div class='add'>+	clear_thread_flag(TIF_ASCE_PRIMARY);</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_S390_ASCE_H */</div><div class='head'>diff --git a/arch/s390/include/asm/cpacf.h b/arch/s390/include/asm/cpacf.h<br/>index 59ab1192e2d5..54cb97603ec0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/cpacf.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/cpacf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/cpacf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/cpacf.h</a></div><div class='hunk'>@@ -649,18 +649,30 @@ static inline void cpacf_trng(u8 *ucbuf, unsigned long ucbuf_len,</div><div class='ctx'>  *		 instruction</div><div class='ctx'>  * @func: the function code passed to PCC; see CPACF_KM_xxx defines</div><div class='ctx'>  * @param: address of parameter block; see POP for details on each func</div><div class='add'>+ *</div><div class='add'>+ * Returns the condition code, this is</div><div class='add'>+ * 0 - cc code 0 (normal completion)</div><div class='add'>+ * 1 - cc code 1 (protected key wkvp mismatch or src operand out of range)</div><div class='add'>+ * 2 - cc code 2 (something invalid, scalar multiply infinity, ...)</div><div class='add'>+ * Condition code 3 (partial completion) is handled within the asm code</div><div class='add'>+ * and never returned.</div><div class='ctx'>  */</div><div class='del'>-static inline void cpacf_pcc(unsigned long func, void *param)</div><div class='add'>+static inline int cpacf_pcc(unsigned long func, void *param)</div><div class='ctx'> {</div><div class='add'>+	int cc;</div><div class='add'>+</div><div class='ctx'> 	asm volatile(</div><div class='ctx'> 		"	lgr	0,%[fc]\n"</div><div class='ctx'> 		"	lgr	1,%[pba]\n"</div><div class='ctx'> 		"0:	.insn	rre,%[opc] &lt;&lt; 16,0,0\n" /* PCC opcode */</div><div class='ctx'> 		"	brc	1,0b\n" /* handle partial completion */</div><div class='del'>-		:</div><div class='add'>+		CC_IPM(cc)</div><div class='add'>+		: CC_OUT(cc, cc)</div><div class='ctx'> 		: [fc] "d" (func), [pba] "d" ((unsigned long)param),</div><div class='ctx'> 		  [opc] "i" (CPACF_PCC)</div><div class='del'>-		: "cc", "memory", "0", "1");</div><div class='add'>+		: CC_CLOBBER_LIST("memory", "0", "1"));</div><div class='add'>+</div><div class='add'>+	return CC_TRANSFORM(cc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/arch/s390/include/asm/cpufeature.h b/arch/s390/include/asm/cpufeature.h<br/>index e08169bd63a5..6c6a99660e78 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/cpufeature.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/cpufeature.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/cpufeature.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/cpufeature.h</a></div><div class='hunk'>@@ -15,6 +15,7 @@ enum {</div><div class='ctx'> 	S390_CPU_FEATURE_MSA,</div><div class='ctx'> 	S390_CPU_FEATURE_VXRS,</div><div class='ctx'> 	S390_CPU_FEATURE_UV,</div><div class='add'>+	S390_CPU_FEATURE_D288,</div><div class='ctx'> 	MAX_CPU_FEATURES</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/diag288.h b/arch/s390/include/asm/diag288.h<br/>new file mode 100644<br/>index 000000000000..5e1b43cea9d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/diag288.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/diag288.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+#ifndef _ASM_S390_DIAG288_H</div><div class='add'>+#define _ASM_S390_DIAG288_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/asm-extable.h&gt;</div><div class='add'>+#include &lt;asm/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define MIN_INTERVAL 15	    /* Minimal time supported by diag288 */</div><div class='add'>+#define MAX_INTERVAL 3600   /* One hour should be enough - pure estimation */</div><div class='add'>+</div><div class='add'>+#define WDT_DEFAULT_TIMEOUT 30</div><div class='add'>+</div><div class='add'>+/* Function codes - init, change, cancel */</div><div class='add'>+#define WDT_FUNC_INIT 0</div><div class='add'>+#define WDT_FUNC_CHANGE 1</div><div class='add'>+#define WDT_FUNC_CANCEL 2</div><div class='add'>+#define WDT_FUNC_CONCEAL 0x80000000</div><div class='add'>+</div><div class='add'>+/* Action codes for LPAR watchdog */</div><div class='add'>+#define LPARWDT_RESTART 0</div><div class='add'>+</div><div class='add'>+static inline int __diag288(unsigned int func, unsigned int timeout,</div><div class='add'>+			    unsigned long action, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	union register_pair r1 = { .even = func, .odd = timeout, };</div><div class='add'>+	union register_pair r3 = { .even = action, .odd = len, };</div><div class='add'>+	int rc = -EINVAL;</div><div class='add'>+</div><div class='add'>+	asm volatile(</div><div class='add'>+		"	diag	%[r1],%[r3],0x288\n"</div><div class='add'>+		"0:	lhi	%[rc],0\n"</div><div class='add'>+		"1:"</div><div class='add'>+		EX_TABLE(0b, 1b)</div><div class='add'>+		: [rc] "+d" (rc)</div><div class='add'>+		: [r1] "d" (r1.pair), [r3] "d" (r3.pair)</div><div class='add'>+		: "cc", "memory");</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_S390_DIAG288_H */</div><div class='head'>diff --git a/arch/s390/include/asm/futex.h b/arch/s390/include/asm/futex.h<br/>index f5781794356b..942f21c39697 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/futex.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/futex.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/futex.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/futex.h</a></div><div class='hunk'>@@ -13,9 +13,11 @@</div><div class='ctx'> static uaccess_kmsan_or_inline int						\</div><div class='ctx'> __futex_atomic_##name(int oparg, int *old, u32 __user *uaddr)			\</div><div class='ctx'> {										\</div><div class='add'>+	bool sacf_flag;								\</div><div class='ctx'> 	int rc, new;								\</div><div class='ctx'> 										\</div><div class='ctx'> 	instrument_copy_from_user_before(old, uaddr, sizeof(*old));		\</div><div class='add'>+	sacf_flag = enable_sacf_uaccess();					\</div><div class='ctx'> 	asm_inline volatile(							\</div><div class='ctx'> 		"	sacf	256\n"						\</div><div class='ctx'> 		"0:	l	%[old],%[uaddr]\n"				\</div><div class='hunk'>@@ -32,6 +34,7 @@ __futex_atomic_##name(int oparg, int *old, u32 __user *uaddr)			\</div><div class='ctx'> 		  [new] "=&amp;d" (new), [uaddr] "+Q" (*uaddr)			\</div><div class='ctx'> 		: [oparg] "d" (oparg)						\</div><div class='ctx'> 		: "cc");							\</div><div class='add'>+	disable_sacf_uaccess(sacf_flag);					\</div><div class='ctx'> 	if (!rc)								\</div><div class='ctx'> 		instrument_copy_from_user_after(old, uaddr, sizeof(*old), 0);	\</div><div class='ctx'> 	return rc;								\</div><div class='hunk'>@@ -75,9 +78,11 @@ int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)</div><div class='ctx'> static uaccess_kmsan_or_inline</div><div class='ctx'> int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval, u32 newval)</div><div class='ctx'> {</div><div class='add'>+	bool sacf_flag;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	instrument_copy_from_user_before(uval, uaddr, sizeof(*uval));</div><div class='add'>+	sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 	asm_inline volatile(</div><div class='ctx'> 		"	sacf	256\n"</div><div class='ctx'> 		"0:	cs	%[old],%[new],%[uaddr]\n"</div><div class='hunk'>@@ -88,6 +93,7 @@ int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval, u32</div><div class='ctx'> 		: [rc] "=d" (rc), [old] "+d" (oldval), [uaddr] "+Q" (*uaddr)</div><div class='ctx'> 		: [new] "d" (newval)</div><div class='ctx'> 		: "cc", "memory");</div><div class='add'>+	disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 	*uval = oldval;</div><div class='ctx'> 	instrument_copy_from_user_after(uval, uaddr, sizeof(*uval), 0);</div><div class='ctx'> 	return rc;</div><div class='head'>diff --git a/arch/s390/include/asm/machine.h b/arch/s390/include/asm/machine.h<br/>index 54478caa5237..8abe5afdbfc4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/machine.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/machine.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/machine.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/machine.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #define MFEATURE_VM		7</div><div class='ctx'> #define MFEATURE_KVM		8</div><div class='ctx'> #define MFEATURE_LPAR		9</div><div class='add'>+#define MFEATURE_DIAG288	10</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/march.h b/arch/s390/include/asm/march.h<br/>index fd9eef3be44c..11a71bd14954 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/march.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/march.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/march.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/march.h</a></div><div class='hunk'>@@ -33,6 +33,10 @@</div><div class='ctx'> #define MARCH_HAS_Z16_FEATURES 1</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_HAVE_MARCH_Z17_FEATURES</div><div class='add'>+#define MARCH_HAS_Z17_FEATURES 1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __DECOMPRESSOR */</div><div class='ctx'> </div><div class='ctx'> #endif /* __ASM_S390_MARCH_H */</div><div class='head'>diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h<br/>index 88f84beebb9e..d9b8501bc93d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/mmu_context.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/mmu_context.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/mmu_context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/mm_types.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/ctlreg.h&gt;</div><div class='add'>+#include &lt;asm/asce.h&gt;</div><div class='ctx'> #include &lt;asm-generic/mm_hooks.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define init_new_context init_new_context</div><div class='hunk'>@@ -77,7 +78,8 @@ static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *</div><div class='ctx'> 	else</div><div class='ctx'> 		get_lowcore()-&gt;user_asce.val = next-&gt;context.asce;</div><div class='ctx'> 	cpumask_set_cpu(cpu, &amp;next-&gt;context.cpu_attach_mask);</div><div class='del'>-	/* Clear previous user-ASCE from CR7 */</div><div class='add'>+	/* Clear previous user-ASCE from CR1 and CR7 */</div><div class='add'>+	local_ctl_load(1, &amp;s390_invalid_asce);</div><div class='ctx'> 	local_ctl_load(7, &amp;s390_invalid_asce);</div><div class='ctx'> 	if (prev != next)</div><div class='ctx'> 		cpumask_clear_cpu(cpu, &amp;prev-&gt;context.cpu_attach_mask);</div><div class='hunk'>@@ -99,6 +101,7 @@ static inline void finish_arch_post_lock_switch(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='ctx'> 	struct mm_struct *mm = tsk-&gt;mm;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (mm) {</div><div class='ctx'> 		preempt_disable();</div><div class='hunk'>@@ -108,15 +111,25 @@ static inline void finish_arch_post_lock_switch(void)</div><div class='ctx'> 		__tlb_flush_mm_lazy(mm);</div><div class='ctx'> 		preempt_enable();</div><div class='ctx'> 	}</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	if (test_thread_flag(TIF_ASCE_PRIMARY))</div><div class='add'>+		local_ctl_load(1, &amp;get_lowcore()-&gt;kernel_asce);</div><div class='add'>+	else</div><div class='add'>+		local_ctl_load(1, &amp;get_lowcore()-&gt;user_asce);</div><div class='ctx'> 	local_ctl_load(7, &amp;get_lowcore()-&gt;user_asce);</div><div class='add'>+	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define activate_mm activate_mm</div><div class='ctx'> static inline void activate_mm(struct mm_struct *prev,</div><div class='ctx'>                                struct mm_struct *next)</div><div class='ctx'> {</div><div class='del'>-	switch_mm(prev, next, current);</div><div class='add'>+	switch_mm_irqs_off(prev, next, current);</div><div class='ctx'> 	cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));</div><div class='add'>+	if (test_thread_flag(TIF_ASCE_PRIMARY))</div><div class='add'>+		local_ctl_load(1, &amp;get_lowcore()-&gt;kernel_asce);</div><div class='add'>+	else</div><div class='add'>+		local_ctl_load(1, &amp;get_lowcore()-&gt;user_asce);</div><div class='ctx'> 	local_ctl_load(7, &amp;get_lowcore()-&gt;user_asce);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/include/asm/nospec-branch.h b/arch/s390/include/asm/nospec-branch.h<br/>index 192835a3e24d..c7c96282f011 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/nospec-branch.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/nospec-branch.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/nospec-branch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/nospec-branch.h</a></div><div class='hunk'>@@ -26,8 +26,6 @@ static inline bool nospec_uses_trampoline(void)</div><div class='ctx'> 	return __is_defined(CC_USING_EXPOLINE) &amp;&amp; !nospec_disable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_EXPOLINE_EXTERN</div><div class='del'>-</div><div class='ctx'> void __s390_indirect_jump_r1(void);</div><div class='ctx'> void __s390_indirect_jump_r2(void);</div><div class='ctx'> void __s390_indirect_jump_r3(void);</div><div class='hunk'>@@ -44,8 +42,6 @@ void __s390_indirect_jump_r13(void);</div><div class='ctx'> void __s390_indirect_jump_r14(void);</div><div class='ctx'> void __s390_indirect_jump_r15(void);</div><div class='ctx'> </div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #endif /* __ASSEMBLY__ */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_S390_EXPOLINE_H */</div><div class='head'>diff --git a/arch/s390/include/asm/pkey.h b/arch/s390/include/asm/pkey.h<br/>index 5dca1a46a9f6..b7b59faf16f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/pkey.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/pkey.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/pkey.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/pkey.h</a></div><div class='hunk'>@@ -20,9 +20,22 @@</div><div class='ctx'>  * @param key pointer to a buffer containing the key blob</div><div class='ctx'>  * @param keylen size of the key blob in bytes</div><div class='ctx'>  * @param protkey pointer to buffer receiving the protected key</div><div class='add'>+ * @param xflags additional execution flags (see PKEY_XFLAG_* definitions below)</div><div class='add'>+ *	  As of now the only supported flag is PKEY_XFLAG_NOMEMALLOC.</div><div class='ctx'>  * @return 0 on success, negative errno value on failure</div><div class='ctx'>  */</div><div class='ctx'> int pkey_key2protkey(const u8 *key, u32 keylen,</div><div class='del'>-		     u8 *protkey, u32 *protkeylen, u32 *protkeytype);</div><div class='add'>+		     u8 *protkey, u32 *protkeylen, u32 *protkeytype,</div><div class='add'>+		     u32 xflags);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If this flag is given in the xflags parameter, the pkey implementation</div><div class='add'>+ * is not allowed to allocate memory but instead should fall back to use</div><div class='add'>+ * preallocated memory or simple fail with -ENOMEM.</div><div class='add'>+ * This flag is for protected key derive within a cipher or similar</div><div class='add'>+ * which must not allocate memory which would cause io operations - see</div><div class='add'>+ * also the CRYPTO_ALG_ALLOCATES_MEMORY flag in crypto.h.</div><div class='add'>+ */</div><div class='add'>+#define PKEY_XFLAG_NOMEMALLOC 0x0001</div><div class='ctx'> </div><div class='ctx'> #endif /* _KAPI_PKEY_H */</div><div class='head'>diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h<br/>index c66f3fc6daaf..62c0ab4a4b9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/ptrace.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/ptrace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/ptrace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/ptrace.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/ptrace.h&gt;</div><div class='add'>+#include &lt;asm/thread_info.h&gt;</div><div class='ctx'> #include &lt;asm/tpi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PIF_SYSCALL			0	/* inside a system call */</div><div class='hunk'>@@ -126,7 +127,6 @@ struct pt_regs {</div><div class='ctx'> 		struct tpi_info tpi_info;</div><div class='ctx'> 	};</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	unsigned long cr1;</div><div class='ctx'> 	unsigned long last_break;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -229,8 +229,44 @@ static inline void instruction_pointer_set(struct pt_regs *regs,</div><div class='ctx'> </div><div class='ctx'> int regs_query_register_offset(const char *name);</div><div class='ctx'> const char *regs_query_register_name(unsigned int offset);</div><div class='del'>-unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);</div><div class='del'>-unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);</div><div class='add'>+</div><div class='add'>+static __always_inline unsigned long kernel_stack_pointer(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	return regs-&gt;gprs[15];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	if (offset &gt;= NUM_GPRS)</div><div class='add'>+		return 0;</div><div class='add'>+	return regs-&gt;gprs[offset];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	unsigned long ksp = kernel_stack_pointer(regs);</div><div class='add'>+</div><div class='add'>+	return (addr &amp; ~(THREAD_SIZE - 1)) == (ksp &amp; ~(THREAD_SIZE - 1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * regs_get_kernel_stack_nth() - get Nth entry of the stack</div><div class='add'>+ * @regs:pt_regs which contains kernel stack pointer.</div><div class='add'>+ * @n:stack entry number.</div><div class='add'>+ *</div><div class='add'>+ * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which</div><div class='add'>+ * is specifined by @regs. If the @n th entry is NOT in the kernel stack,</div><div class='add'>+ * this returns 0.</div><div class='add'>+ */</div><div class='add'>+static __always_inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)</div><div class='add'>+{</div><div class='add'>+	unsigned long addr;</div><div class='add'>+</div><div class='add'>+	addr = kernel_stack_pointer(regs) + n * sizeof(long);</div><div class='add'>+	if (!regs_within_kernel_stack(regs, addr))</div><div class='add'>+		return 0;</div><div class='add'>+	return READ_ONCE_NOCHECK(addr);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * regs_get_kernel_argument() - get Nth function argument in kernel</div><div class='hunk'>@@ -251,11 +287,6 @@ static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,</div><div class='ctx'> 	return regs_get_kernel_stack_nth(regs, argoffset + n);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	return regs-&gt;gprs[15];</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)</div><div class='ctx'> {</div><div class='ctx'> 	regs-&gt;gprs[2] = rc;</div><div class='head'>diff --git a/arch/s390/include/asm/string.h b/arch/s390/include/asm/string.h<br/>index 2ab868cbae6c..f8f68f4ef255 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/string.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/string.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/string.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/string.h</a></div><div class='hunk'>@@ -26,11 +26,9 @@ void *memmove(void *dest, const void *src, size_t n);</div><div class='ctx'> #define __HAVE_ARCH_MEMSCAN	/* inline &amp; arch function */</div><div class='ctx'> #define __HAVE_ARCH_STRCAT	/* inline &amp; arch function */</div><div class='ctx'> #define __HAVE_ARCH_STRCMP	/* arch function */</div><div class='del'>-#define __HAVE_ARCH_STRCPY	/* inline &amp; arch function */</div><div class='ctx'> #define __HAVE_ARCH_STRLCAT	/* arch function */</div><div class='ctx'> #define __HAVE_ARCH_STRLEN	/* inline &amp; arch function */</div><div class='ctx'> #define __HAVE_ARCH_STRNCAT	/* arch function */</div><div class='del'>-#define __HAVE_ARCH_STRNCPY	/* arch function */</div><div class='ctx'> #define __HAVE_ARCH_STRNLEN	/* inline &amp; arch function */</div><div class='ctx'> #define __HAVE_ARCH_STRSTR	/* arch function */</div><div class='ctx'> #define __HAVE_ARCH_MEMSET16	/* arch function */</div><div class='hunk'>@@ -42,7 +40,6 @@ int memcmp(const void *s1, const void *s2, size_t n);</div><div class='ctx'> int strcmp(const char *s1, const char *s2);</div><div class='ctx'> size_t strlcat(char *dest, const char *src, size_t n);</div><div class='ctx'> char *strncat(char *dest, const char *src, size_t n);</div><div class='del'>-char *strncpy(char *dest, const char *src, size_t n);</div><div class='ctx'> char *strstr(const char *s1, const char *s2);</div><div class='ctx'> #endif /* !defined(CONFIG_KASAN) &amp;&amp; !defined(CONFIG_KMSAN) */</div><div class='ctx'> </div><div class='hunk'>@@ -155,22 +152,6 @@ static inline char *strcat(char *dst, const char *src)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef __HAVE_ARCH_STRCPY</div><div class='del'>-static inline char *strcpy(char *dst, const char *src)</div><div class='del'>-{</div><div class='del'>-	char *ret = dst;</div><div class='del'>-</div><div class='del'>-	asm volatile(</div><div class='del'>-		"	lghi	0,0\n"</div><div class='del'>-		"0:	mvst	%[dst],%[src]\n"</div><div class='del'>-		"	jo	0b"</div><div class='del'>-		: [dst] "+&amp;a" (dst), [src] "+&amp;a" (src)</div><div class='del'>-		:</div><div class='del'>-		: "cc", "memory", "0");</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #if defined(__HAVE_ARCH_STRLEN) || (defined(CONFIG_KASAN) &amp;&amp; !defined(__SANITIZE_ADDRESS__))</div><div class='ctx'> static inline size_t __no_sanitize_prefix_strfunc(strlen)(const char *s)</div><div class='ctx'> {</div><div class='hunk'>@@ -208,7 +189,6 @@ static inline size_t strnlen(const char * s, size_t n)</div><div class='ctx'> void *memchr(const void * s, int c, size_t n);</div><div class='ctx'> void *memscan(void *s, int c, size_t n);</div><div class='ctx'> char *strcat(char *dst, const char *src);</div><div class='del'>-char *strcpy(char *dst, const char *src);</div><div class='ctx'> size_t strlen(const char *s);</div><div class='ctx'> size_t strnlen(const char * s, size_t n);</div><div class='ctx'> #endif /* !IN_ARCH_STRING_C */</div><div class='head'>diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h<br/>index 91f569cae1ce..391eb04d26d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/thread_info.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/thread_info.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/thread_info.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/thread_info.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #define _ASM_THREAD_INFO_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;vdso/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * General size of kernel stacks</div><div class='hunk'>@@ -24,8 +25,6 @@</div><div class='ctx'> #define STACK_INIT_OFFSET (THREAD_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLY__</div><div class='del'>-#include &lt;asm/lowcore.h&gt;</div><div class='del'>-#include &lt;asm/page.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * low level task data that entry.S needs immediate access to</div><div class='hunk'>@@ -64,6 +63,7 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define TIF_NEED_RESCHED_LAZY	3	/* lazy rescheduling needed */</div><div class='ctx'> #define TIF_UPROBE		4	/* breakpointed or single-stepping */</div><div class='ctx'> #define TIF_PATCH_PENDING	5	/* pending live patching update */</div><div class='add'>+#define TIF_ASCE_PRIMARY	6	/* primary asce is kernel asce */</div><div class='ctx'> #define TIF_NOTIFY_SIGNAL	7	/* signal notifications exist */</div><div class='ctx'> #define TIF_GUARDED_STORAGE	8	/* load guarded storage control block */</div><div class='ctx'> #define TIF_ISOLATE_BP_GUEST	9	/* Run KVM guests with isolated BP */</div><div class='hunk'>@@ -85,6 +85,7 @@ void arch_setup_new_exec(void);</div><div class='ctx'> #define _TIF_NEED_RESCHED_LAZY	BIT(TIF_NEED_RESCHED_LAZY)</div><div class='ctx'> #define _TIF_UPROBE		BIT(TIF_UPROBE)</div><div class='ctx'> #define _TIF_PATCH_PENDING	BIT(TIF_PATCH_PENDING)</div><div class='add'>+#define _TIF_ASCE_PRIMARY	BIT(TIF_ASCE_PRIMARY)</div><div class='ctx'> #define _TIF_NOTIFY_SIGNAL	BIT(TIF_NOTIFY_SIGNAL)</div><div class='ctx'> #define _TIF_GUARDED_STORAGE	BIT(TIF_GUARDED_STORAGE)</div><div class='ctx'> #define _TIF_ISOLATE_BP_GUEST	BIT(TIF_ISOLATE_BP_GUEST)</div><div class='head'>diff --git a/arch/s390/include/asm/uaccess.h b/arch/s390/include/asm/uaccess.h<br/>index 8629d70ec38b..a43fc88c0050 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/uaccess.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/uaccess.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/uaccess.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/uaccess.h</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;asm/extable.h&gt;</div><div class='ctx'> #include &lt;asm/facility.h&gt;</div><div class='ctx'> #include &lt;asm-generic/access_ok.h&gt;</div><div class='add'>+#include &lt;asm/asce.h&gt;</div><div class='ctx'> #include &lt;linux/instrumented.h&gt;</div><div class='ctx'> </div><div class='ctx'> void debug_user_asce(int exit);</div><div class='hunk'>@@ -478,6 +479,7 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 					      __uint128_t old, __uint128_t new,</div><div class='ctx'> 					      unsigned long key, int size)</div><div class='ctx'> {</div><div class='add'>+	bool sacf_flag;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (size) {</div><div class='hunk'>@@ -490,6 +492,7 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 		_old = ((unsigned int)old &amp; 0xff) &lt;&lt; shift;</div><div class='ctx'> 		_new = ((unsigned int)new &amp; 0xff) &lt;&lt; shift;</div><div class='ctx'> 		mask = ~(0xff &lt;&lt; shift);</div><div class='add'>+		sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 		asm_inline volatile(</div><div class='ctx'> 			"	spka	0(%[key])\n"</div><div class='ctx'> 			"	sacf	256\n"</div><div class='hunk'>@@ -524,6 +527,7 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 			  [default_key] "J" (PAGE_DEFAULT_KEY),</div><div class='ctx'> 			  [max_loops] "J" (CMPXCHG_USER_KEY_MAX_LOOPS)</div><div class='ctx'> 			: "memory", "cc");</div><div class='add'>+		disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 		*(unsigned char *)uval = prev &gt;&gt; shift;</div><div class='ctx'> 		if (!count)</div><div class='ctx'> 			rc = -EAGAIN;</div><div class='hunk'>@@ -538,6 +542,7 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 		_old = ((unsigned int)old &amp; 0xffff) &lt;&lt; shift;</div><div class='ctx'> 		_new = ((unsigned int)new &amp; 0xffff) &lt;&lt; shift;</div><div class='ctx'> 		mask = ~(0xffff &lt;&lt; shift);</div><div class='add'>+		sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 		asm_inline volatile(</div><div class='ctx'> 			"	spka	0(%[key])\n"</div><div class='ctx'> 			"	sacf	256\n"</div><div class='hunk'>@@ -572,6 +577,7 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 			  [default_key] "J" (PAGE_DEFAULT_KEY),</div><div class='ctx'> 			  [max_loops] "J" (CMPXCHG_USER_KEY_MAX_LOOPS)</div><div class='ctx'> 			: "memory", "cc");</div><div class='add'>+		disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 		*(unsigned short *)uval = prev &gt;&gt; shift;</div><div class='ctx'> 		if (!count)</div><div class='ctx'> 			rc = -EAGAIN;</div><div class='hunk'>@@ -580,6 +586,7 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 	case 4:	{</div><div class='ctx'> 		unsigned int prev = old;</div><div class='ctx'> </div><div class='add'>+		sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 		asm_inline volatile(</div><div class='ctx'> 			"	spka	0(%[key])\n"</div><div class='ctx'> 			"	sacf	256\n"</div><div class='hunk'>@@ -595,12 +602,14 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 			  [key] "a" (key &lt;&lt; 4),</div><div class='ctx'> 			  [default_key] "J" (PAGE_DEFAULT_KEY)</div><div class='ctx'> 			: "memory", "cc");</div><div class='add'>+		disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 		*(unsigned int *)uval = prev;</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> 	case 8: {</div><div class='ctx'> 		unsigned long prev = old;</div><div class='ctx'> </div><div class='add'>+		sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 		asm_inline volatile(</div><div class='ctx'> 			"	spka	0(%[key])\n"</div><div class='ctx'> 			"	sacf	256\n"</div><div class='hunk'>@@ -616,12 +625,14 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 			  [key] "a" (key &lt;&lt; 4),</div><div class='ctx'> 			  [default_key] "J" (PAGE_DEFAULT_KEY)</div><div class='ctx'> 			: "memory", "cc");</div><div class='add'>+		disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 		*(unsigned long *)uval = prev;</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> 	case 16: {</div><div class='ctx'> 		__uint128_t prev = old;</div><div class='ctx'> </div><div class='add'>+		sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 		asm_inline volatile(</div><div class='ctx'> 			"	spka	0(%[key])\n"</div><div class='ctx'> 			"	sacf	256\n"</div><div class='hunk'>@@ -637,6 +648,7 @@ static __always_inline int __cmpxchg_user_key(unsigned long address, void *uval,</div><div class='ctx'> 			  [key] "a" (key &lt;&lt; 4),</div><div class='ctx'> 			  [default_key] "J" (PAGE_DEFAULT_KEY)</div><div class='ctx'> 			: "memory", "cc");</div><div class='add'>+		disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 		*(__uint128_t *)uval = prev;</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/s390/include/asm/uv.h b/arch/s390/include/asm/uv.h<br/>index 46fb0ef6f984..b008402ec9aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/include/asm/uv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/include/asm/uv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/include/asm/uv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/include/asm/uv.h</a></div><div class='hunk'>@@ -616,8 +616,9 @@ static inline int uv_remove_shared(unsigned long addr)</div><div class='ctx'> 	return share(addr, UVC_CMD_REMOVE_SHARED_ACCESS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int uv_get_secret_metadata(const u8 secret_id[UV_SECRET_ID_LEN],</div><div class='del'>-			   struct uv_secret_list_item_hdr *secret);</div><div class='add'>+int uv_find_secret(const u8 secret_id[UV_SECRET_ID_LEN],</div><div class='add'>+		   struct uv_secret_list *list,</div><div class='add'>+		   struct uv_secret_list_item_hdr *secret);</div><div class='ctx'> int uv_retrieve_secret(u16 secret_idx, u8 *buf, size_t buf_size);</div><div class='ctx'> </div><div class='ctx'> extern int prot_virt_host;</div><div class='head'>diff --git a/arch/s390/kernel/asm-offsets.c b/arch/s390/kernel/asm-offsets.c<br/>index 841e05f7fa7e..95ecad9c7d7d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/asm-offsets.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/asm-offsets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -50,7 +50,6 @@ int main(void)</div><div class='ctx'> 	OFFSET(__PT_ORIG_GPR2, pt_regs, orig_gpr2);</div><div class='ctx'> 	OFFSET(__PT_INT_CODE, pt_regs, int_code);</div><div class='ctx'> 	OFFSET(__PT_FLAGS, pt_regs, flags);</div><div class='del'>-	OFFSET(__PT_CR1, pt_regs, cr1);</div><div class='ctx'> 	OFFSET(__PT_LAST_BREAK, pt_regs, last_break);</div><div class='ctx'> 	DEFINE(__PT_SIZE, sizeof(struct pt_regs));</div><div class='ctx'> 	BLANK();</div><div class='head'>diff --git a/arch/s390/kernel/cert_store.c b/arch/s390/kernel/cert_store.c<br/>index 03f3a1e52430..c217a5e64094 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/cert_store.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/cert_store.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/cert_store.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/cert_store.c</a></div><div class='hunk'>@@ -138,7 +138,7 @@ static void cert_store_key_describe(const struct key *key, struct seq_file *m)</div><div class='ctx'> 	 * First 64 bytes of the key description is key name in EBCDIC CP 500.</div><div class='ctx'> 	 * Convert it to ASCII for displaying in /proc/keys.</div><div class='ctx'> 	 */</div><div class='del'>-	strscpy(ascii, key-&gt;description, sizeof(ascii));</div><div class='add'>+	strscpy(ascii, key-&gt;description);</div><div class='ctx'> 	EBCASC_500(ascii, VC_NAME_LEN_BYTES);</div><div class='ctx'> 	seq_puts(m, ascii);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/cpufeature.c b/arch/s390/kernel/cpufeature.c<br/>index 1b2ae42a0c15..76210f001028 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/cpufeature.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/cpufeature.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/cpufeature.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/cpufeature.c</a></div><div class='hunk'>@@ -5,11 +5,13 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;linux/bug.h&gt;</div><div class='add'>+#include &lt;asm/machine.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	TYPE_HWCAP,</div><div class='ctx'> 	TYPE_FACILITY,</div><div class='add'>+	TYPE_MACHINE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct s390_cpu_feature {</div><div class='hunk'>@@ -21,6 +23,7 @@ static struct s390_cpu_feature s390_cpu_features[MAX_CPU_FEATURES] = {</div><div class='ctx'> 	[S390_CPU_FEATURE_MSA]	= {.type = TYPE_HWCAP, .num = HWCAP_NR_MSA},</div><div class='ctx'> 	[S390_CPU_FEATURE_VXRS]	= {.type = TYPE_HWCAP, .num = HWCAP_NR_VXRS},</div><div class='ctx'> 	[S390_CPU_FEATURE_UV]	= {.type = TYPE_FACILITY, .num = 158},</div><div class='add'>+	[S390_CPU_FEATURE_D288]	= {.type = TYPE_MACHINE, .num = MFEATURE_DIAG288},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -38,6 +41,8 @@ int cpu_have_feature(unsigned int num)</div><div class='ctx'> 		return !!(elf_hwcap &amp; BIT(feature-&gt;num));</div><div class='ctx'> 	case TYPE_FACILITY:</div><div class='ctx'> 		return test_facility(feature-&gt;num);</div><div class='add'>+	case TYPE_MACHINE:</div><div class='add'>+		return test_machine_feature(feature-&gt;num);</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/arch/s390/kernel/crash_dump.c b/arch/s390/kernel/crash_dump.c<br/>index 4a981266b483..adb164223f8c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/crash_dump.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/crash_dump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/crash_dump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/crash_dump.c</a></div><div class='hunk'>@@ -354,7 +354,7 @@ static void *nt_prpsinfo(void *ptr)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;prpsinfo, 0, sizeof(prpsinfo));</div><div class='ctx'> 	prpsinfo.pr_sname = 'R';</div><div class='del'>-	strcpy(prpsinfo.pr_fname, "vmlinux");</div><div class='add'>+	strscpy(prpsinfo.pr_fname, "vmlinux");</div><div class='ctx'> 	return nt_init(ptr, PRPSINFO, prpsinfo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c<br/>index ce038e9205f7..2a41be2f7925 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/debug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/debug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/debug.c</a></div><div class='hunk'>@@ -251,7 +251,7 @@ static debug_info_t *debug_info_alloc(const char *name, int pages_per_area,</div><div class='ctx'> 	rc-&gt;level	   = level;</div><div class='ctx'> 	rc-&gt;buf_size	   = buf_size;</div><div class='ctx'> 	rc-&gt;entry_size	   = sizeof(debug_entry_t) + buf_size;</div><div class='del'>-	strscpy(rc-&gt;name, name, sizeof(rc-&gt;name));</div><div class='add'>+	strscpy(rc-&gt;name, name);</div><div class='ctx'> 	memset(rc-&gt;views, 0, DEBUG_MAX_VIEWS * sizeof(struct debug_view *));</div><div class='ctx'> 	memset(rc-&gt;debugfs_entries, 0, DEBUG_MAX_VIEWS * sizeof(struct dentry *));</div><div class='ctx'> 	refcount_set(&amp;(rc-&gt;ref_count), 0);</div><div class='head'>diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S<br/>index dd291c9ad6a6..0f00f4b06d51 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/entry.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/entry.S</a></div><div class='hunk'>@@ -116,7 +116,7 @@ _LPP_OFFSET	= __LC_LPP</div><div class='ctx'> 	.macro SIEEXIT sie_control,lowcore</div><div class='ctx'> 	lg	%r9,\sie_control			# get control block pointer</div><div class='ctx'> 	ni	__SIE_PROG0C+3(%r9),0xfe		# no longer in SIE</div><div class='del'>-	lctlg	%c1,%c1,__LC_KERNEL_ASCE(\lowcore)	# load primary asce</div><div class='add'>+	lctlg	%c1,%c1,__LC_USER_ASCE(\lowcore)	# load primary asce</div><div class='ctx'> 	lg	%r9,__LC_CURRENT(\lowcore)</div><div class='ctx'> 	mvi	__TI_sie(%r9),0</div><div class='ctx'> 	larl	%r9,sie_exit			# skip forward to sie_exit</div><div class='hunk'>@@ -208,7 +208,7 @@ SYM_FUNC_START(__sie64a)</div><div class='ctx'> 	lg	%r14,__SF_SIE_CONTROL(%r15)	# get control block pointer</div><div class='ctx'> 	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE</div><div class='ctx'> 	GET_LC	%r14</div><div class='del'>-	lctlg	%c1,%c1,__LC_KERNEL_ASCE(%r14)	# load primary asce</div><div class='add'>+	lctlg	%c1,%c1,__LC_USER_ASCE(%r14)	# load primary asce</div><div class='ctx'> 	lg	%r14,__LC_CURRENT(%r14)</div><div class='ctx'> 	mvi	__TI_sie(%r14),0</div><div class='ctx'> SYM_INNER_LABEL(sie_exit, SYM_L_GLOBAL)</div><div class='hunk'>@@ -240,7 +240,6 @@ SYM_CODE_START(system_call)</div><div class='ctx'> 	lghi	%r14,0</div><div class='ctx'> .Lsysc_per:</div><div class='ctx'> 	STBEAR	__LC_LAST_BREAK(%r13)</div><div class='del'>-	lctlg	%c1,%c1,__LC_KERNEL_ASCE(%r13)</div><div class='ctx'> 	lg	%r15,__LC_KERNEL_STACK(%r13)</div><div class='ctx'> 	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)</div><div class='ctx'> 	stmg	%r0,%r7,STACK_FRAME_OVERHEAD+__PT_R0(%r15)</div><div class='hunk'>@@ -261,7 +260,6 @@ SYM_CODE_START(system_call)</div><div class='ctx'> 	lgr	%r3,%r14</div><div class='ctx'> 	brasl	%r14,__do_syscall</div><div class='ctx'> 	STACKLEAK_ERASE</div><div class='del'>-	lctlg	%c1,%c1,__LC_USER_ASCE(%r13)</div><div class='ctx'> 	mvc	__LC_RETURN_PSW(16,%r13),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)</div><div class='ctx'> 	BPON</div><div class='ctx'> 	LBEAR	STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15)</div><div class='hunk'>@@ -278,7 +276,6 @@ SYM_CODE_START(ret_from_fork)</div><div class='ctx'> 	brasl	%r14,__ret_from_fork</div><div class='ctx'> 	STACKLEAK_ERASE</div><div class='ctx'> 	GET_LC	%r13</div><div class='del'>-	lctlg	%c1,%c1,__LC_USER_ASCE(%r13)</div><div class='ctx'> 	mvc	__LC_RETURN_PSW(16,%r13),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)</div><div class='ctx'> 	BPON</div><div class='ctx'> 	LBEAR	STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15)</div><div class='hunk'>@@ -299,10 +296,7 @@ SYM_CODE_START(pgm_check_handler)</div><div class='ctx'> 	lmg	%r8,%r9,__LC_PGM_OLD_PSW(%r13)</div><div class='ctx'> 	xgr	%r10,%r10</div><div class='ctx'> 	tmhh	%r8,0x0001		# coming from user space?</div><div class='del'>-	jno	.Lpgm_skip_asce</div><div class='del'>-	lctlg	%c1,%c1,__LC_KERNEL_ASCE(%r13)</div><div class='del'>-	j	3f			# -&gt; fault in user space</div><div class='del'>-.Lpgm_skip_asce:</div><div class='add'>+	jo	3f			# -&gt; fault in user space</div><div class='ctx'> #if IS_ENABLED(CONFIG_KVM)</div><div class='ctx'> 	lg	%r11,__LC_CURRENT(%r13)</div><div class='ctx'> 	tm	__TI_sie(%r11),0xff</div><div class='hunk'>@@ -340,7 +334,6 @@ SYM_CODE_START(pgm_check_handler)</div><div class='ctx'> 	tmhh	%r8,0x0001		# returning to user space?</div><div class='ctx'> 	jno	.Lpgm_exit_kernel</div><div class='ctx'> 	STACKLEAK_ERASE</div><div class='del'>-	lctlg	%c1,%c1,__LC_USER_ASCE(%r13)</div><div class='ctx'> 	BPON</div><div class='ctx'> 	stpt	__LC_EXIT_TIMER(%r13)</div><div class='ctx'> .Lpgm_exit_kernel:</div><div class='hunk'>@@ -384,8 +377,7 @@ SYM_CODE_START(\name)</div><div class='ctx'> #endif</div><div class='ctx'> 0:	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)</div><div class='ctx'> 	j	2f</div><div class='del'>-1:	lctlg	%c1,%c1,__LC_KERNEL_ASCE(%r13)</div><div class='del'>-	lg	%r15,__LC_KERNEL_STACK(%r13)</div><div class='add'>+1:	lg	%r15,__LC_KERNEL_STACK(%r13)</div><div class='ctx'> 2:	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)</div><div class='ctx'> 	la	%r11,STACK_FRAME_OVERHEAD(%r15)</div><div class='ctx'> 	stmg	%r0,%r7,__PT_R0(%r11)</div><div class='hunk'>@@ -408,7 +400,6 @@ SYM_CODE_START(\name)</div><div class='ctx'> 	tmhh	%r8,0x0001		# returning to user ?</div><div class='ctx'> 	jno	2f</div><div class='ctx'> 	STACKLEAK_ERASE</div><div class='del'>-	lctlg	%c1,%c1,__LC_USER_ASCE(%r13)</div><div class='ctx'> 	BPON</div><div class='ctx'> 	stpt	__LC_EXIT_TIMER(%r13)</div><div class='ctx'> 2:	LBEAR	__PT_LAST_BREAK(%r11)</div><div class='hunk'>@@ -476,8 +467,6 @@ SYM_CODE_START(mcck_int_handler)</div><div class='ctx'> .Lmcck_user:</div><div class='ctx'> 	lg	%r15,__LC_MCCK_STACK(%r13)</div><div class='ctx'> 	la	%r11,STACK_FRAME_OVERHEAD(%r15)</div><div class='del'>-	stctg	%c1,%c1,__PT_CR1(%r11)</div><div class='del'>-	lctlg	%c1,%c1,__LC_KERNEL_ASCE(%r13)</div><div class='ctx'> 	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)</div><div class='ctx'> 	lay	%r14,__LC_GPREGS_SAVE_AREA(%r13)</div><div class='ctx'> 	mvc	__PT_R0(128,%r11),0(%r14)</div><div class='hunk'>@@ -495,7 +484,6 @@ SYM_CODE_START(mcck_int_handler)</div><div class='ctx'> 	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)</div><div class='ctx'> 	lgr	%r2,%r11		# pass pointer to pt_regs</div><div class='ctx'> 	brasl	%r14,s390_do_machine_check</div><div class='del'>-	lctlg	%c1,%c1,__PT_CR1(%r11)</div><div class='ctx'> 	lmg	%r0,%r10,__PT_R0(%r11)</div><div class='ctx'> 	mvc	__LC_RETURN_MCCK_PSW(16,%r13),__PT_PSW(%r11) # move return PSW</div><div class='ctx'> 	tm	__LC_RETURN_MCCK_PSW+1(%r13),0x01 # returning to user ?</div><div class='hunk'>@@ -602,7 +590,8 @@ SYM_CODE_START(stack_invalid)</div><div class='ctx'> 	stmg	%r0,%r7,__PT_R0(%r11)</div><div class='ctx'> 	stmg	%r8,%r9,__PT_PSW(%r11)</div><div class='ctx'> 	mvc	__PT_R8(64,%r11),0(%r14)</div><div class='del'>-	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2</div><div class='add'>+	GET_LC	%r2</div><div class='add'>+	mvc	__PT_ORIG_GPR2(8,%r11),__LC_PGM_LAST_BREAK(%r2)</div><div class='ctx'> 	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)</div><div class='ctx'> 	lgr	%r2,%r11		# pass pointer to pt_regs</div><div class='ctx'> 	jg	kernel_stack_invalid</div><div class='head'>diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c<br/>index 3b9d9ccfad63..ff15f91affde 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/ipl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/ipl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/ipl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/ipl.c</a></div><div class='hunk'>@@ -270,7 +270,7 @@ static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj,	\</div><div class='ctx'> {									\</div><div class='ctx'> 	if (len &gt;= sizeof(_value))					\</div><div class='ctx'> 		return -E2BIG;						\</div><div class='del'>-	len = strscpy(_value, buf, sizeof(_value));			\</div><div class='add'>+	len = strscpy(_value, buf);					\</div><div class='ctx'> 	if ((ssize_t)len &lt; 0)						\</div><div class='ctx'> 		return len;						\</div><div class='ctx'> 	strim(_value);							\</div><div class='hunk'>@@ -2249,26 +2249,28 @@ static int __init s390_ipl_init(void)</div><div class='ctx'> </div><div class='ctx'> __initcall(s390_ipl_init);</div><div class='ctx'> </div><div class='del'>-static void __init strncpy_skip_quote(char *dst, char *src, int n)</div><div class='add'>+static void __init strscpy_skip_quote(char *dst, char *src, int n)</div><div class='ctx'> {</div><div class='ctx'> 	int sx, dx;</div><div class='ctx'> </div><div class='del'>-	dx = 0;</div><div class='del'>-	for (sx = 0; src[sx] != 0; sx++) {</div><div class='add'>+	if (!n)</div><div class='add'>+		return;</div><div class='add'>+	for (sx = 0, dx = 0; src[sx]; sx++) {</div><div class='ctx'> 		if (src[sx] == '"')</div><div class='ctx'> 			continue;</div><div class='del'>-		dst[dx++] = src[sx];</div><div class='del'>-		if (dx &gt;= n)</div><div class='add'>+		dst[dx] = src[sx];</div><div class='add'>+		if (dx + 1 == n)</div><div class='ctx'> 			break;</div><div class='add'>+		dx++;</div><div class='ctx'> 	}</div><div class='add'>+	dst[dx] = '\0';</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init vmcmd_on_reboot_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	if (!machine_is_vm())</div><div class='ctx'> 		return 1;</div><div class='del'>-	strncpy_skip_quote(vmcmd_on_reboot, str, VMCMD_MAX_SIZE);</div><div class='del'>-	vmcmd_on_reboot[VMCMD_MAX_SIZE] = 0;</div><div class='add'>+	strscpy_skip_quote(vmcmd_on_reboot, str, sizeof(vmcmd_on_reboot));</div><div class='ctx'> 	on_reboot_trigger.action = &amp;vmcmd_action;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -2278,8 +2280,7 @@ static int __init vmcmd_on_panic_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	if (!machine_is_vm())</div><div class='ctx'> 		return 1;</div><div class='del'>-	strncpy_skip_quote(vmcmd_on_panic, str, VMCMD_MAX_SIZE);</div><div class='del'>-	vmcmd_on_panic[VMCMD_MAX_SIZE] = 0;</div><div class='add'>+	strscpy_skip_quote(vmcmd_on_panic, str, sizeof(vmcmd_on_panic));</div><div class='ctx'> 	on_panic_trigger.action = &amp;vmcmd_action;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -2289,8 +2290,7 @@ static int __init vmcmd_on_halt_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	if (!machine_is_vm())</div><div class='ctx'> 		return 1;</div><div class='del'>-	strncpy_skip_quote(vmcmd_on_halt, str, VMCMD_MAX_SIZE);</div><div class='del'>-	vmcmd_on_halt[VMCMD_MAX_SIZE] = 0;</div><div class='add'>+	strscpy_skip_quote(vmcmd_on_halt, str, sizeof(vmcmd_on_halt));</div><div class='ctx'> 	on_halt_trigger.action = &amp;vmcmd_action;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -2300,8 +2300,7 @@ static int __init vmcmd_on_poff_setup(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	if (!machine_is_vm())</div><div class='ctx'> 		return 1;</div><div class='del'>-	strncpy_skip_quote(vmcmd_on_poff, str, VMCMD_MAX_SIZE);</div><div class='del'>-	vmcmd_on_poff[VMCMD_MAX_SIZE] = 0;</div><div class='add'>+	strscpy_skip_quote(vmcmd_on_poff, str, sizeof(vmcmd_on_poff));</div><div class='ctx'> 	on_poff_trigger.action = &amp;vmcmd_action;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/kernel/perf_cpum_cf.c b/arch/s390/kernel/perf_cpum_cf.c<br/>index 33205dd410e4..6a262e198e35 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/perf_cpum_cf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/perf_cpum_cf.c</a></div><div class='hunk'>@@ -442,7 +442,7 @@ static void cpum_cf_make_setsize(enum cpumf_ctr_set ctrset)</div><div class='ctx'> 			ctrset_size = 48;</div><div class='ctx'> 		else if (cpumf_ctr_info.csvn &gt;= 3 &amp;&amp; cpumf_ctr_info.csvn &lt;= 5)</div><div class='ctx'> 			ctrset_size = 128;</div><div class='del'>-		else if (cpumf_ctr_info.csvn == 6 || cpumf_ctr_info.csvn == 7)</div><div class='add'>+		else if (cpumf_ctr_info.csvn &gt;= 6 &amp;&amp; cpumf_ctr_info.csvn &lt;= 8)</div><div class='ctx'> 			ctrset_size = 160;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CPUMF_CTR_SET_MT_DIAG:</div><div class='hunk'>@@ -858,18 +858,13 @@ static int cpumf_pmu_event_type(struct perf_event *event)</div><div class='ctx'> static int cpumf_pmu_event_init(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int type = event-&gt;attr.type;</div><div class='del'>-	int err;</div><div class='add'>+	int err = -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	if (type == PERF_TYPE_HARDWARE || type == PERF_TYPE_RAW)</div><div class='ctx'> 		err = __hw_perf_event_init(event, type);</div><div class='ctx'> 	else if (event-&gt;pmu-&gt;type == type)</div><div class='ctx'> 		/* Registered as unknown PMU */</div><div class='ctx'> 		err = __hw_perf_event_init(event, cpumf_pmu_event_type(event));</div><div class='del'>-	else</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	if (unlikely(err) &amp;&amp; event-&gt;destroy)</div><div class='del'>-		event-&gt;destroy(event);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -985,8 +980,6 @@ static int cfdiag_push_sample(struct perf_event *event,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	overflow = perf_event_overflow(event, &amp;data, &amp;regs);</div><div class='del'>-	if (overflow)</div><div class='del'>-		event-&gt;pmu-&gt;stop(event, 0);</div><div class='ctx'> </div><div class='ctx'> 	perf_event_update_userpage(event);</div><div class='ctx'> 	return overflow;</div><div class='hunk'>@@ -1819,8 +1812,6 @@ static int cfdiag_event_init(struct perf_event *event)</div><div class='ctx'> 	event-&gt;destroy = hw_perf_event_destroy;</div><div class='ctx'> </div><div class='ctx'> 	err = cfdiag_event_init2(event);</div><div class='del'>-	if (unlikely(err))</div><div class='del'>-		event-&gt;destroy(event);</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/kernel/perf_cpum_cf_events.c b/arch/s390/kernel/perf_cpum_cf_events.c<br/>index e4a6bfc91080..7ace1f9e4ccf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf_events.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/perf_cpum_cf_events.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_cf_events.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/perf_cpum_cf_events.c</a></div><div class='hunk'>@@ -237,7 +237,6 @@ CPUMF_EVENT_ATTR(cf_z14, TX_C_TABORT_NO_SPECIAL, 0x00f4);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z14, TX_C_TABORT_SPECIAL, 0x00f5);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z14, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);</div><div class='del'>-</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, L1D_RO_EXCL_WRITES, 0x0080);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, DTLB2_WRITES, 0x0081);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, DTLB2_MISSES, 0x0082);</div><div class='hunk'>@@ -291,8 +290,8 @@ CPUMF_EVENT_ATTR(cf_z15, TX_C_TABORT_NO_SPECIAL, 0x00f4);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, TX_C_TABORT_SPECIAL, 0x00f5);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, DFLT_ACCESS, 0x00f7);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, DFLT_CYCLES, 0x00fc);</div><div class='del'>-CPUMF_EVENT_ATTR(cf_z15, DFLT_CC, 0x00108);</div><div class='del'>-CPUMF_EVENT_ATTR(cf_z15, DFLT_CCFINISH, 0x00109);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z15, DFLT_CC, 0x0108);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z15, DFLT_CCFINISH, 0x0109);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z16, L1D_RO_EXCL_WRITES, 0x0080);</div><div class='hunk'>@@ -365,6 +364,83 @@ CPUMF_EVENT_ATTR(cf_z16, NNPA_WAIT_LOCK, 0x010d);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z16, NNPA_HOLD_LOCK, 0x010e);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);</div><div class='ctx'> CPUMF_EVENT_ATTR(cf_z16, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, L1D_RO_EXCL_WRITES, 0x0080);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DTLB2_WRITES, 0x0081);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DTLB2_MISSES, 0x0082);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, CRSTE_1MB_WRITES, 0x0083);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DTLB2_GPAGE_WRITES, 0x0084);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ITLB2_WRITES, 0x0086);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ITLB2_MISSES, 0x0087);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TLB2_PTE_WRITES, 0x0089);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TLB2_CRSTE_WRITES, 0x008a);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TLB2_ENGINES_BUSY, 0x008b);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TX_C_TEND, 0x008c);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TX_NC_TEND, 0x008d);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, L1C_TLB2_MISSES, 0x008f);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_REQ, 0x0091);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_IV, 0x0092);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_CHIP_HIT, 0x0093);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_REQ_DRAWER_HIT, 0x0094);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP, 0x0095);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_IV, 0x0096);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_CHIP_HIT, 0x0097);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT, 0x0098);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE, 0x0099);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER, 0x009a);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER, 0x009b);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_CHIP_MEMORY, 0x009c);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_MODULE_MEMORY, 0x009d);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_ON_DRAWER_MEMORY, 0x009e);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DCW_OFF_DRAWER_MEMORY, 0x009f);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_IV, 0x00a0);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT, 0x00a1);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT, 0x00a2);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_IV, 0x00a3);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT, 0x00a4);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT, 0x00a5);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_IV, 0x00a6);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT, 0x00a7);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT, 0x00a8);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_REQ, 0x00a9);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_IV, 0x00aa);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_CHIP_HIT, 0x00ab);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_REQ_DRAWER_HIT, 0x00ac);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP, 0x00ad);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_IV, 0x00ae);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_CHIP_HIT, 0x00af);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT, 0x00b0);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_ON_MODULE, 0x00b1);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_ON_DRAWER, 0x00b2);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, ICW_OFF_DRAWER, 0x00b3);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, CYCLES_SAMETHRD, 0x00ca);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, CYCLES_DIFFTHRD, 0x00cb);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, INST_SAMETHRD, 0x00cc);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, INST_DIFFTHRD, 0x00cd);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, WRONG_BRANCH_PREDICTION, 0x00ce);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, VX_BCD_EXECUTION_SLOTS, 0x00e1);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DECIMAL_INSTRUCTIONS, 0x00e2);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, LAST_HOST_TRANSLATIONS, 0x00e8);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TX_NC_TABORT, 0x00f4);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_NO_SPECIAL, 0x00f5);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, TX_C_TABORT_SPECIAL, 0x00f6);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DFLT_ACCESS, 0x00f8);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DFLT_CYCLES, 0x00fd);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, SORTL, 0x0100);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DFLT_CC, 0x0109);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, DFLT_CCFINISH, 0x010a);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_INVOCATIONS, 0x010b);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPLETIONS, 0x010c);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_WAIT_LOCK, 0x010d);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_HOLD_LOCK, 0x010e);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_ONCHIP, 0x0110);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_OFFCHIP, 0x0111);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_INST_DIFF, 0x0112);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_4K_PREFETCH, 0x0114);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_COMPL_LOCK, 0x0115);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK, 0x0116);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO, 0x0117);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);</div><div class='add'>+CPUMF_EVENT_ATTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *cpumcf_fvn1_pmu_event_attr[] __initdata = {</div><div class='ctx'> 	CPUMF_EVENT_PTR(cf_fvn1, CPU_CYCLES),</div><div class='hunk'>@@ -414,7 +490,7 @@ static struct attribute *cpumcf_svn_12345_pmu_event_attr[] __initdata = {</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct attribute *cpumcf_svn_67_pmu_event_attr[] __initdata = {</div><div class='add'>+static struct attribute *cpumcf_svn_678_pmu_event_attr[] __initdata = {</div><div class='ctx'> 	CPUMF_EVENT_PTR(cf_svn_12345, PRNG_FUNCTIONS),</div><div class='ctx'> 	CPUMF_EVENT_PTR(cf_svn_12345, PRNG_CYCLES),</div><div class='ctx'> 	CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_FUNCTIONS),</div><div class='hunk'>@@ -779,6 +855,87 @@ static struct attribute *cpumcf_z16_pmu_event_attr[] __initdata = {</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct attribute *cpumcf_z17_pmu_event_attr[] __initdata = {</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, L1D_RO_EXCL_WRITES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DTLB2_WRITES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DTLB2_MISSES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, CRSTE_1MB_WRITES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DTLB2_GPAGE_WRITES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ITLB2_WRITES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ITLB2_MISSES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TLB2_PTE_WRITES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TLB2_CRSTE_WRITES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TLB2_ENGINES_BUSY),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TX_C_TEND),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TX_NC_TEND),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, L1C_TLB2_MISSES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_REQ),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_REQ_IV),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_REQ_CHIP_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_REQ_DRAWER_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_IV),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_CHIP_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_DRAWER_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_CHIP_MEMORY),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_MODULE_MEMORY),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_ON_DRAWER_MEMORY),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DCW_OFF_DRAWER_MEMORY),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_IV),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_CHIP_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_ON_MODULE_DRAWER_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_IV),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_CHIP_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_ON_DRAWER_DRAWER_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_IV),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_CHIP_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, IDCW_OFF_DRAWER_DRAWER_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_REQ),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_REQ_IV),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_REQ_CHIP_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_REQ_DRAWER_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_IV),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_CHIP_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_ON_CHIP_DRAWER_HIT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_ON_MODULE),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_ON_DRAWER),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, ICW_OFF_DRAWER),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, CYCLES_SAMETHRD),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, CYCLES_DIFFTHRD),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, INST_SAMETHRD),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, INST_DIFFTHRD),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, WRONG_BRANCH_PREDICTION),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, VX_BCD_EXECUTION_SLOTS),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DECIMAL_INSTRUCTIONS),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, LAST_HOST_TRANSLATIONS),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TX_NC_TABORT),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_NO_SPECIAL),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, TX_C_TABORT_SPECIAL),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DFLT_ACCESS),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DFLT_CYCLES),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, SORTL),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DFLT_CC),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, DFLT_CCFINISH),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_INVOCATIONS),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_COMPLETIONS),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_WAIT_LOCK),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_HOLD_LOCK),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_INST_ONCHIP),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_INST_OFFCHIP),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_INST_DIFF),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_4K_PREFETCH),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_COMPL_LOCK),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, NNPA_RETRY_LOCK_WITH_PLO),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_ONE_THR_ACTIVE),</div><div class='add'>+	CPUMF_EVENT_PTR(cf_z17, MT_DIAG_CYCLES_TWO_THR_ACTIVE),</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* END: CPUM_CF COUNTER DEFINITIONS ===================================== */</div><div class='ctx'> </div><div class='ctx'> static struct attribute_group cpumcf_pmu_events_group = {</div><div class='hunk'>@@ -859,7 +1016,7 @@ __init const struct attribute_group **cpumf_cf_event_group(void)</div><div class='ctx'> 	if (ci.csvn &gt;= 1 &amp;&amp; ci.csvn &lt;= 5)</div><div class='ctx'> 		csvn = cpumcf_svn_12345_pmu_event_attr;</div><div class='ctx'> 	else if (ci.csvn &gt;= 6)</div><div class='del'>-		csvn = cpumcf_svn_67_pmu_event_attr;</div><div class='add'>+		csvn = cpumcf_svn_678_pmu_event_attr;</div><div class='ctx'> </div><div class='ctx'> 	/* Determine model-specific counter set(s) */</div><div class='ctx'> 	get_cpu_id(&amp;cpu_id);</div><div class='hunk'>@@ -892,6 +1049,10 @@ __init const struct attribute_group **cpumf_cf_event_group(void)</div><div class='ctx'> 	case 0x3932:</div><div class='ctx'> 		model = cpumcf_z16_pmu_event_attr;</div><div class='ctx'> 		break;</div><div class='add'>+	case 0x9175:</div><div class='add'>+	case 0x9176:</div><div class='add'>+		model = cpumcf_z17_pmu_event_attr;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		model = none;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/s390/kernel/perf_cpum_sf.c b/arch/s390/kernel/perf_cpum_sf.c<br/>index 5f60248cb468..91469401f2c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_sf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/perf_cpum_sf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/perf_cpum_sf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/perf_cpum_sf.c</a></div><div class='hunk'>@@ -885,9 +885,6 @@ static int cpumsf_pmu_event_init(struct perf_event *event)</div><div class='ctx'> 		event-&gt;attr.exclude_idle = 0;</div><div class='ctx'> </div><div class='ctx'> 	err = __hw_perf_event_init(event);</div><div class='del'>-	if (unlikely(err))</div><div class='del'>-		if (event-&gt;destroy)</div><div class='del'>-			event-&gt;destroy(event);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1075,10 +1072,7 @@ static int perf_push_sample(struct perf_event *event,</div><div class='ctx'> 	overflow = 0;</div><div class='ctx'> 	if (perf_event_exclude(event, &amp;regs, sde_regs))</div><div class='ctx'> 		goto out;</div><div class='del'>-	if (perf_event_overflow(event, &amp;data, &amp;regs)) {</div><div class='del'>-		overflow = 1;</div><div class='del'>-		event-&gt;pmu-&gt;stop(event, 0);</div><div class='del'>-	}</div><div class='add'>+	overflow = perf_event_overflow(event, &amp;data, &amp;regs);</div><div class='ctx'> 	perf_event_update_userpage(event);</div><div class='ctx'> out:</div><div class='ctx'> 	return overflow;</div><div class='head'>diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c<br/>index 54e281436a28..11f70c1e2797 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/processor.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/processor.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/processor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/processor.c</a></div><div class='hunk'>@@ -268,31 +268,35 @@ static int __init setup_elf_platform(void)</div><div class='ctx'> 	add_device_randomness(&amp;cpu_id, sizeof(cpu_id));</div><div class='ctx'> 	switch (cpu_id.machine) {</div><div class='ctx'> 	default:	/* Use "z10" as default. */</div><div class='del'>-		strcpy(elf_platform, "z10");</div><div class='add'>+		strscpy(elf_platform, "z10");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x2817:</div><div class='ctx'> 	case 0x2818:</div><div class='del'>-		strcpy(elf_platform, "z196");</div><div class='add'>+		strscpy(elf_platform, "z196");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x2827:</div><div class='ctx'> 	case 0x2828:</div><div class='del'>-		strcpy(elf_platform, "zEC12");</div><div class='add'>+		strscpy(elf_platform, "zEC12");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x2964:</div><div class='ctx'> 	case 0x2965:</div><div class='del'>-		strcpy(elf_platform, "z13");</div><div class='add'>+		strscpy(elf_platform, "z13");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x3906:</div><div class='ctx'> 	case 0x3907:</div><div class='del'>-		strcpy(elf_platform, "z14");</div><div class='add'>+		strscpy(elf_platform, "z14");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x8561:</div><div class='ctx'> 	case 0x8562:</div><div class='del'>-		strcpy(elf_platform, "z15");</div><div class='add'>+		strscpy(elf_platform, "z15");</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x3931:</div><div class='ctx'> 	case 0x3932:</div><div class='del'>-		strcpy(elf_platform, "z16");</div><div class='add'>+		strscpy(elf_platform, "z16");</div><div class='add'>+		break;</div><div class='add'>+	case 0x9175:</div><div class='add'>+	case 0x9176:</div><div class='add'>+		strscpy(elf_platform, "z17");</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c<br/>index 34b8d9e745df..e1240f6b29fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/ptrace.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/ptrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/ptrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/ptrace.c</a></div><div class='hunk'>@@ -1524,13 +1524,6 @@ static const char *gpr_names[NUM_GPRS] = {</div><div class='ctx'> 	"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset)</div><div class='del'>-{</div><div class='del'>-	if (offset &gt;= NUM_GPRS)</div><div class='del'>-		return 0;</div><div class='del'>-	return regs-&gt;gprs[offset];</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int regs_query_register_offset(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long offset;</div><div class='hunk'>@@ -1550,29 +1543,3 @@ const char *regs_query_register_name(unsigned int offset)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	return gpr_names[offset];</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)</div><div class='del'>-{</div><div class='del'>-	unsigned long ksp = kernel_stack_pointer(regs);</div><div class='del'>-</div><div class='del'>-	return (addr &amp; ~(THREAD_SIZE - 1)) == (ksp &amp; ~(THREAD_SIZE - 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * regs_get_kernel_stack_nth() - get Nth entry of the stack</div><div class='del'>- * @regs:pt_regs which contains kernel stack pointer.</div><div class='del'>- * @n:stack entry number.</div><div class='del'>- *</div><div class='del'>- * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which</div><div class='del'>- * is specifined by @regs. If the @n th entry is NOT in the kernel stack,</div><div class='del'>- * this returns 0.</div><div class='del'>- */</div><div class='del'>-unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)</div><div class='del'>-{</div><div class='del'>-	unsigned long addr;</div><div class='del'>-</div><div class='del'>-	addr = kernel_stack_pointer(regs) + n * sizeof(long);</div><div class='del'>-	if (!regs_within_kernel_stack(regs, addr))</div><div class='del'>-		return 0;</div><div class='del'>-	return READ_ONCE_NOCHECK(addr);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c<br/>index 63f41dfaba85..81f12bb77f62 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/smp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/smp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/smp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/smp.c</a></div><div class='hunk'>@@ -263,7 +263,7 @@ static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)</div><div class='ctx'> 	abs_lc = get_abs_lowcore();</div><div class='ctx'> 	memcpy(lc-&gt;cregs_save_area, abs_lc-&gt;cregs_save_area, sizeof(lc-&gt;cregs_save_area));</div><div class='ctx'> 	put_abs_lowcore(abs_lc);</div><div class='del'>-	lc-&gt;cregs_save_area[1] = lc-&gt;kernel_asce;</div><div class='add'>+	lc-&gt;cregs_save_area[1] = lc-&gt;user_asce;</div><div class='ctx'> 	lc-&gt;cregs_save_area[7] = lc-&gt;user_asce;</div><div class='ctx'> 	save_access_regs((unsigned int *) lc-&gt;access_regs_save_area);</div><div class='ctx'> 	arch_spin_lock_setup(cpu);</div><div class='head'>diff --git a/arch/s390/kernel/uv.c b/arch/s390/kernel/uv.c<br/>index 9a5d5be8acf4..4ab0b6b4866e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kernel/uv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kernel/uv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kernel/uv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kernel/uv.c</a></div><div class='hunk'>@@ -782,7 +782,12 @@ out_kobj:</div><div class='ctx'> device_initcall(uv_sysfs_init);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Find the secret with the secret_id in the provided list.</div><div class='add'>+ * Locate a secret in the list by its id.</div><div class='add'>+ * @secret_id: search pattern.</div><div class='add'>+ * @list: ephemeral buffer space</div><div class='add'>+ * @secret: output data, containing the secret's metadata.</div><div class='add'>+ *</div><div class='add'>+ * Search for a secret with the given secret_id in the Ultravisor secret store.</div><div class='ctx'>  *</div><div class='ctx'>  * Context: might sleep.</div><div class='ctx'>  */</div><div class='hunk'>@@ -803,12 +808,15 @@ static int find_secret_in_page(const u8 secret_id[UV_SECRET_ID_LEN],</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Do the actual search for `uv_get_secret_metadata`.</div><div class='add'>+ * @secret_id: search pattern.</div><div class='add'>+ * @list: ephemeral buffer space</div><div class='add'>+ * @secret: output data, containing the secret's metadata.</div><div class='ctx'>  *</div><div class='ctx'>  * Context: might sleep.</div><div class='ctx'>  */</div><div class='del'>-static int find_secret(const u8 secret_id[UV_SECRET_ID_LEN],</div><div class='del'>-		       struct uv_secret_list *list,</div><div class='del'>-		       struct uv_secret_list_item_hdr *secret)</div><div class='add'>+int uv_find_secret(const u8 secret_id[UV_SECRET_ID_LEN],</div><div class='add'>+		   struct uv_secret_list *list,</div><div class='add'>+		   struct uv_secret_list_item_hdr *secret)</div><div class='ctx'> {</div><div class='ctx'> 	u16 start_idx = 0;</div><div class='ctx'> 	u16 list_rc;</div><div class='hunk'>@@ -830,36 +838,7 @@ static int find_secret(const u8 secret_id[UV_SECRET_ID_LEN],</div><div class='ctx'> </div><div class='ctx'> 	return -ENOENT;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * uv_get_secret_metadata() - get secret metadata for a given secret id.</div><div class='del'>- * @secret_id: search pattern.</div><div class='del'>- * @secret: output data, containing the secret's metadata.</div><div class='del'>- *</div><div class='del'>- * Search for a secret with the given secret_id in the Ultravisor secret store.</div><div class='del'>- *</div><div class='del'>- * Context: might sleep.</div><div class='del'>- *</div><div class='del'>- * Return:</div><div class='del'>- * * %0:	- Found entry; secret-&gt;idx and secret-&gt;type are valid.</div><div class='del'>- * * %ENOENT	- No entry found.</div><div class='del'>- * * %ENODEV:	- Not supported: UV not available or command not available.</div><div class='del'>- * * %EIO:	- Other unexpected UV error.</div><div class='del'>- */</div><div class='del'>-int uv_get_secret_metadata(const u8 secret_id[UV_SECRET_ID_LEN],</div><div class='del'>-			   struct uv_secret_list_item_hdr *secret)</div><div class='del'>-{</div><div class='del'>-	struct uv_secret_list *buf;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	buf = kzalloc(sizeof(*buf), GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	rc = find_secret(secret_id, buf, secret);</div><div class='del'>-	kfree(buf);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(uv_get_secret_metadata);</div><div class='add'>+EXPORT_SYMBOL_GPL(uv_find_secret);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * uv_retrieve_secret() - get the secret value for the secret index.</div><div class='head'>diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c<br/>index 610dd44a948b..a06a000f196c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kvm/intercept.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/intercept.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kvm/intercept.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kvm/intercept.c</a></div><div class='hunk'>@@ -95,7 +95,7 @@ static int handle_validity(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	vcpu-&gt;stat.exit_validity++;</div><div class='ctx'> 	trace_kvm_s390_intercept_validity(vcpu, viwhy);</div><div class='del'>-	KVM_EVENT(3, "validity intercept 0x%x for pid %u (kvm 0x%pK)", viwhy,</div><div class='add'>+	KVM_EVENT(3, "validity intercept 0x%x for pid %u (kvm 0x%p)", viwhy,</div><div class='ctx'> 		  current-&gt;pid, vcpu-&gt;kvm);</div><div class='ctx'> </div><div class='ctx'> 	/* do not warn on invalid runtime instrumentation mode */</div><div class='head'>diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c<br/>index 2811a6c093b8..60c360c18690 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kvm/interrupt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/interrupt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kvm/interrupt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kvm/interrupt.c</a></div><div class='hunk'>@@ -3161,7 +3161,7 @@ void kvm_s390_gisa_clear(struct kvm *kvm)</div><div class='ctx'> 	if (!gi-&gt;origin)</div><div class='ctx'> 		return;</div><div class='ctx'> 	gisa_clear_ipm(gi-&gt;origin);</div><div class='del'>-	VM_EVENT(kvm, 3, "gisa 0x%pK cleared", gi-&gt;origin);</div><div class='add'>+	VM_EVENT(kvm, 3, "gisa 0x%p cleared", gi-&gt;origin);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_s390_gisa_init(struct kvm *kvm)</div><div class='hunk'>@@ -3177,7 +3177,7 @@ void kvm_s390_gisa_init(struct kvm *kvm)</div><div class='ctx'> 	hrtimer_setup(&amp;gi-&gt;timer, gisa_vcpu_kicker, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> 	memset(gi-&gt;origin, 0, sizeof(struct kvm_s390_gisa));</div><div class='ctx'> 	gi-&gt;origin-&gt;next_alert = (u32)virt_to_phys(gi-&gt;origin);</div><div class='del'>-	VM_EVENT(kvm, 3, "gisa 0x%pK initialized", gi-&gt;origin);</div><div class='add'>+	VM_EVENT(kvm, 3, "gisa 0x%p initialized", gi-&gt;origin);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_s390_gisa_enable(struct kvm *kvm)</div><div class='hunk'>@@ -3218,7 +3218,7 @@ void kvm_s390_gisa_destroy(struct kvm *kvm)</div><div class='ctx'> 		process_gib_alert_list();</div><div class='ctx'> 	hrtimer_cancel(&amp;gi-&gt;timer);</div><div class='ctx'> 	gi-&gt;origin = NULL;</div><div class='del'>-	VM_EVENT(kvm, 3, "gisa 0x%pK destroyed", gisa);</div><div class='add'>+	VM_EVENT(kvm, 3, "gisa 0x%p destroyed", gisa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_s390_gisa_disable(struct kvm *kvm)</div><div class='hunk'>@@ -3467,7 +3467,7 @@ int __init kvm_s390_gib_init(u8 nisc)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	KVM_EVENT(3, "gib 0x%pK (nisc=%d) initialized", gib, gib-&gt;nisc);</div><div class='add'>+	KVM_EVENT(3, "gib 0x%p (nisc=%d) initialized", gib, gib-&gt;nisc);</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='ctx'> out_unreg_gal:</div><div class='head'>diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c<br/>index fff863734975..3f3175193fd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kvm/kvm-s390.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/kvm-s390.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kvm/kvm-s390.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kvm/kvm-s390.c</a></div><div class='hunk'>@@ -1022,7 +1022,7 @@ static int kvm_s390_set_mem_control(struct kvm *kvm, struct kvm_device_attr *att</div><div class='ctx'> 		}</div><div class='ctx'> 		mutex_unlock(&amp;kvm-&gt;lock);</div><div class='ctx'> 		VM_EVENT(kvm, 3, "SET: max guest address: %lu", new_limit);</div><div class='del'>-		VM_EVENT(kvm, 3, "New guest asce: 0x%pK",</div><div class='add'>+		VM_EVENT(kvm, 3, "New guest asce: 0x%p",</div><div class='ctx'> 			 (void *) kvm-&gt;arch.gmap-&gt;asce);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3466,7 +3466,7 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)</div><div class='ctx'> 		kvm_s390_gisa_init(kvm);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;kvm-&gt;arch.pv.need_cleanup);</div><div class='ctx'> 	kvm-&gt;arch.pv.set_aside = NULL;</div><div class='del'>-	KVM_EVENT(3, "vm 0x%pK created by pid %u", kvm, current-&gt;pid);</div><div class='add'>+	KVM_EVENT(3, "vm 0x%p created by pid %u", kvm, current-&gt;pid);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> out_err:</div><div class='hunk'>@@ -3529,7 +3529,7 @@ void kvm_arch_destroy_vm(struct kvm *kvm)</div><div class='ctx'> 	kvm_s390_destroy_adapters(kvm);</div><div class='ctx'> 	kvm_s390_clear_float_irqs(kvm);</div><div class='ctx'> 	kvm_s390_vsie_destroy(kvm);</div><div class='del'>-	KVM_EVENT(3, "vm 0x%pK destroyed", kvm);</div><div class='add'>+	KVM_EVENT(3, "vm 0x%p destroyed", kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Section: vcpu related */</div><div class='hunk'>@@ -3650,7 +3650,7 @@ static int sca_switch_to_extended(struct kvm *kvm)</div><div class='ctx'> </div><div class='ctx'> 	free_page((unsigned long)old_sca);</div><div class='ctx'> </div><div class='del'>-	VM_EVENT(kvm, 2, "Switched to ESCA (0x%pK -&gt; 0x%pK)",</div><div class='add'>+	VM_EVENT(kvm, 2, "Switched to ESCA (0x%p -&gt; 0x%p)",</div><div class='ctx'> 		 old_sca, kvm-&gt;arch.sca);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -4027,7 +4027,7 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 			goto out_free_sie_block;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	VM_EVENT(vcpu-&gt;kvm, 3, "create cpu %d at 0x%pK, sie block at 0x%pK",</div><div class='add'>+	VM_EVENT(vcpu-&gt;kvm, 3, "create cpu %d at 0x%p, sie block at 0x%p",</div><div class='ctx'> 		 vcpu-&gt;vcpu_id, vcpu, vcpu-&gt;arch.sie_block);</div><div class='ctx'> 	trace_kvm_s390_create_vcpu(vcpu-&gt;vcpu_id, vcpu, vcpu-&gt;arch.sie_block);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/kvm/trace-s390.h b/arch/s390/kvm/trace-s390.h<br/>index 9ac92dbf680d..9e28f165c114 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/kvm/trace-s390.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/kvm/trace-s390.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/kvm/trace-s390.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/kvm/trace-s390.h</a></div><div class='hunk'>@@ -56,7 +56,7 @@ TRACE_EVENT(kvm_s390_create_vcpu,</div><div class='ctx'> 		    __entry-&gt;sie_block = sie_block;</div><div class='ctx'> 		    ),</div><div class='ctx'> </div><div class='del'>-	    TP_printk("create cpu %d at 0x%pK, sie block at 0x%pK",</div><div class='add'>+	    TP_printk("create cpu %d at 0x%p, sie block at 0x%p",</div><div class='ctx'> 		      __entry-&gt;id, __entry-&gt;vcpu, __entry-&gt;sie_block)</div><div class='ctx'> 	);</div><div class='ctx'> </div><div class='hunk'>@@ -255,7 +255,7 @@ TRACE_EVENT(kvm_s390_enable_css,</div><div class='ctx'> 		    __entry-&gt;kvm = kvm;</div><div class='ctx'> 		    ),</div><div class='ctx'> </div><div class='del'>-	    TP_printk("enabling channel I/O support (kvm @ %pK)\n",</div><div class='add'>+	    TP_printk("enabling channel I/O support (kvm @ %p)\n",</div><div class='ctx'> 		      __entry-&gt;kvm)</div><div class='ctx'> 	);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/lib/Makefile b/arch/s390/lib/Makefile<br/>index 14bbfe50033c..cd35cdbfa871 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/Makefile</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> # Makefile for s390-specific library files..</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+obj-y += crypto/</div><div class='ctx'> lib-y += delay.o string.o uaccess.o find.o spinlock.o tishift.o</div><div class='ctx'> lib-y += csum-partial.o</div><div class='ctx'> obj-y += mem.o xor.o</div><div class='hunk'>@@ -26,4 +27,4 @@ lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o</div><div class='ctx'> obj-$(CONFIG_EXPOLINE_EXTERN) += expoline.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC32_ARCH) += crc32-s390.o</div><div class='del'>-crc32-s390-y := crc32-glue.o crc32le-vx.o crc32be-vx.o</div><div class='add'>+crc32-s390-y := crc32.o crc32le-vx.o crc32be-vx.o</div><div class='head'>diff --git a/arch/s390/lib/crc32-glue.c b/arch/s390/lib/crc32.c<br/>index 124214a27340..3c4b344417c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/lib/crc32-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/crc32-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/crc32.c</a></div><div class='hunk'>@@ -18,8 +18,6 @@</div><div class='ctx'> #define VX_ALIGNMENT		16L</div><div class='ctx'> #define VX_ALIGN_MASK		(VX_ALIGNMENT - 1)</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_vxrs);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * DEFINE_CRC32_VX() - Define a CRC-32 function using the vector extension</div><div class='ctx'>  *</div><div class='hunk'>@@ -34,8 +32,7 @@ static DEFINE_STATIC_KEY_FALSE(have_vxrs);</div><div class='ctx'> 		unsigned long prealign, aligned, remaining;		    \</div><div class='ctx'> 		DECLARE_KERNEL_FPU_ONSTACK16(vxstate);			    \</div><div class='ctx'> 									    \</div><div class='del'>-		if (datalen &lt; VX_MIN_LEN + VX_ALIGN_MASK ||		    \</div><div class='del'>-		    !static_branch_likely(&amp;have_vxrs))			    \</div><div class='add'>+		if (datalen &lt; VX_MIN_LEN + VX_ALIGN_MASK || !cpu_has_vx())  \</div><div class='ctx'> 			return ___crc32_sw(crc, data, datalen);		    \</div><div class='ctx'> 									    \</div><div class='ctx'> 		if ((unsigned long)data &amp; VX_ALIGN_MASK) {		    \</div><div class='hunk'>@@ -64,25 +61,13 @@ DEFINE_CRC32_VX(crc32_le_arch, crc32_le_vgfm_16, crc32_le_base)</div><div class='ctx'> DEFINE_CRC32_VX(crc32_be_arch, crc32_be_vgfm_16, crc32_be_base)</div><div class='ctx'> DEFINE_CRC32_VX(crc32c_arch, crc32c_le_vgfm_16, crc32c_base)</div><div class='ctx'> </div><div class='del'>-static int __init crc32_s390_init(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_have_feature(S390_CPU_FEATURE_VXRS))</div><div class='del'>-		static_branch_enable(&amp;have_vxrs);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-arch_initcall(crc32_s390_init);</div><div class='del'>-</div><div class='del'>-static void __exit crc32_s390_exit(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-module_exit(crc32_s390_exit);</div><div class='del'>-</div><div class='ctx'> u32 crc32_optimizations(void)</div><div class='ctx'> {</div><div class='del'>-	if (static_key_enabled(&amp;have_vxrs))</div><div class='add'>+	if (cpu_has_vx()) {</div><div class='ctx'> 		return CRC32_LE_OPTIMIZATION |</div><div class='ctx'> 		       CRC32_BE_OPTIMIZATION |</div><div class='ctx'> 		       CRC32C_OPTIMIZATION;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(crc32_optimizations);</div><div class='head'>diff --git a/arch/s390/lib/crypto/Kconfig b/arch/s390/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..e3f855ef4393<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_CHACHA_S390</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_LIB_CHACHA</div><div class='add'>+	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='add'>+</div><div class='add'>+config CRYPTO_SHA256_S390</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='add'>+	select CRYPTO_LIB_SHA256_GENERIC</div><div class='head'>diff --git a/arch/s390/lib/crypto/Makefile b/arch/s390/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..920197967f46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA_S390) += chacha_s390.o</div><div class='add'>+chacha_s390-y := chacha-glue.o chacha-s390.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256_S390) += sha256.o</div><div class='head'>diff --git a/arch/s390/lib/crypto/chacha-glue.c b/arch/s390/lib/crypto/chacha-glue.c<br/>new file mode 100644<br/>index 000000000000..f95ba3483bbc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/crypto/chacha-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/crypto/chacha-glue.c</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * ChaCha stream cipher (s390 optimized)</div><div class='add'>+ *</div><div class='add'>+ * Copyright IBM Corp. 2021</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define KMSG_COMPONENT "chacha_s390"</div><div class='add'>+#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='add'>+#include &lt;asm/fpu.h&gt;</div><div class='add'>+#include "chacha-s390.h"</div><div class='add'>+</div><div class='add'>+void hchacha_block_arch(const struct chacha_state *state,</div><div class='add'>+			u32 out[HCHACHA_OUT_WORDS], int nrounds)</div><div class='add'>+{</div><div class='add'>+	/* TODO: implement hchacha_block_arch() in assembly */</div><div class='add'>+	hchacha_block_generic(state, out, nrounds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hchacha_block_arch);</div><div class='add'>+</div><div class='add'>+void chacha_crypt_arch(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+		       unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	/* s390 chacha20 implementation has 20 rounds hard-coded,</div><div class='add'>+	 * it cannot handle a block of data or less, but otherwise</div><div class='add'>+	 * it can handle data of arbitrary size</div><div class='add'>+	 */</div><div class='add'>+	if (bytes &lt;= CHACHA_BLOCK_SIZE || nrounds != 20 || !cpu_has_vx()) {</div><div class='add'>+		chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='add'>+	} else {</div><div class='add'>+		DECLARE_KERNEL_FPU_ONSTACK32(vxstate);</div><div class='add'>+</div><div class='add'>+		kernel_fpu_begin(&amp;vxstate, KERNEL_VXR);</div><div class='add'>+		chacha20_vx(dst, src, bytes, &amp;state-&gt;x[4], &amp;state-&gt;x[12]);</div><div class='add'>+		kernel_fpu_end(&amp;vxstate, KERNEL_VXR);</div><div class='add'>+</div><div class='add'>+		state-&gt;x[12] += round_up(bytes, CHACHA_BLOCK_SIZE) /</div><div class='add'>+				CHACHA_BLOCK_SIZE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='add'>+</div><div class='add'>+bool chacha_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return cpu_has_vx();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ChaCha stream cipher (s390 optimized)");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/arch/s390/crypto/chacha-s390.S b/arch/s390/lib/crypto/chacha-s390.S<br/>index 63f3102678c0..63f3102678c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/chacha-s390.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/chacha-s390.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/crypto/chacha-s390.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/crypto/chacha-s390.S</a></div><div class='head'>diff --git a/arch/s390/crypto/chacha-s390.h b/arch/s390/lib/crypto/chacha-s390.h<br/>index 733744ce30f5..733744ce30f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/crypto/chacha-s390.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/crypto/chacha-s390.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/crypto/chacha-s390.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/crypto/chacha-s390.h</a></div><div class='head'>diff --git a/arch/s390/lib/crypto/sha256.c b/arch/s390/lib/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..7dfe120fafab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * SHA-256 optimized using the CP Assist for Cryptographic Functions (CPACF)</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Google LLC</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/cpacf.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_cpacf_sha256);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	if (static_branch_likely(&amp;have_cpacf_sha256))</div><div class='add'>+		cpacf_kimd(CPACF_KIMD_SHA_256, state, data,</div><div class='add'>+			   nblocks * SHA256_BLOCK_SIZE);</div><div class='add'>+	else</div><div class='add'>+		sha256_blocks_generic(state, data, nblocks);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='add'>+</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;have_cpacf_sha256);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init sha256_s390_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (cpu_have_feature(S390_CPU_FEATURE_MSA) &amp;&amp;</div><div class='add'>+	    cpacf_query_func(CPACF_KIMD, CPACF_KIMD_SHA_256))</div><div class='add'>+		static_branch_enable(&amp;have_cpacf_sha256);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(sha256_s390_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit sha256_s390_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(sha256_s390_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 using the CP Assist for Cryptographic Functions (CPACF)");</div><div class='head'>diff --git a/arch/s390/lib/string.c b/arch/s390/lib/string.c<br/>index 373fa1f01937..099de76e8b1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/lib/string.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/string.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/string.c</a></div><div class='hunk'>@@ -78,50 +78,6 @@ EXPORT_SYMBOL(strnlen);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * strcpy - Copy a %NUL terminated string</div><div class='del'>- * @dest: Where to copy the string to</div><div class='del'>- * @src: Where to copy the string from</div><div class='del'>- *</div><div class='del'>- * returns a pointer to @dest</div><div class='del'>- */</div><div class='del'>-#ifdef __HAVE_ARCH_STRCPY</div><div class='del'>-char *strcpy(char *dest, const char *src)</div><div class='del'>-{</div><div class='del'>-	char *ret = dest;</div><div class='del'>-</div><div class='del'>-	asm volatile(</div><div class='del'>-		"	lghi	0,0\n"</div><div class='del'>-		"0:	mvst	%[dest],%[src]\n"</div><div class='del'>-		"	jo	0b\n"</div><div class='del'>-		: [dest] "+&amp;a" (dest), [src] "+&amp;a" (src)</div><div class='del'>-		:</div><div class='del'>-		: "cc", "memory", "0");</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(strcpy);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * strncpy - Copy a length-limited, %NUL-terminated string</div><div class='del'>- * @dest: Where to copy the string to</div><div class='del'>- * @src: Where to copy the string from</div><div class='del'>- * @n: The maximum number of bytes to copy</div><div class='del'>- *</div><div class='del'>- * The result is not %NUL-terminated if the source exceeds</div><div class='del'>- * @n bytes.</div><div class='del'>- */</div><div class='del'>-#ifdef __HAVE_ARCH_STRNCPY</div><div class='del'>-char *strncpy(char *dest, const char *src, size_t n)</div><div class='del'>-{</div><div class='del'>-	size_t len = __strnend(src, n) - src;</div><div class='del'>-	memset(dest + len, 0, n - len);</div><div class='del'>-	memcpy(dest, src, len);</div><div class='del'>-	return dest;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(strncpy);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * strcat - Append one %NUL-terminated string to another</div><div class='ctx'>  * @dest: The string to be appended to</div><div class='ctx'>  * @src: The string to append to it</div><div class='hunk'>@@ -181,9 +137,6 @@ EXPORT_SYMBOL(strlcat);</div><div class='ctx'>  * @n: The maximum numbers of bytes to copy</div><div class='ctx'>  *</div><div class='ctx'>  * returns a pointer to @dest</div><div class='del'>- *</div><div class='del'>- * Note that in contrast to strncpy, strncat ensures the result is</div><div class='del'>- * terminated.</div><div class='ctx'>  */</div><div class='ctx'> #ifdef __HAVE_ARCH_STRNCAT</div><div class='ctx'> char *strncat(char *dest, const char *src, size_t n)</div><div class='head'>diff --git a/arch/s390/lib/uaccess.c b/arch/s390/lib/uaccess.c<br/>index cec20db88479..fa7d98fa1320 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/lib/uaccess.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/lib/uaccess.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/lib/uaccess.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/lib/uaccess.c</a></div><div class='hunk'>@@ -17,17 +17,18 @@</div><div class='ctx'> #ifdef CONFIG_DEBUG_ENTRY</div><div class='ctx'> void debug_user_asce(int exit)</div><div class='ctx'> {</div><div class='add'>+	struct lowcore *lc = get_lowcore();</div><div class='ctx'> 	struct ctlreg cr1, cr7;</div><div class='ctx'> </div><div class='ctx'> 	local_ctl_store(1, &amp;cr1);</div><div class='ctx'> 	local_ctl_store(7, &amp;cr7);</div><div class='del'>-	if (cr1.val == get_lowcore()-&gt;kernel_asce.val &amp;&amp; cr7.val == get_lowcore()-&gt;user_asce.val)</div><div class='add'>+	if (cr1.val == lc-&gt;user_asce.val &amp;&amp; cr7.val == lc-&gt;user_asce.val)</div><div class='ctx'> 		return;</div><div class='ctx'> 	panic("incorrect ASCE on kernel %s\n"</div><div class='ctx'> 	      "cr1:    %016lx cr7:  %016lx\n"</div><div class='ctx'> 	      "kernel: %016lx user: %016lx\n",</div><div class='ctx'> 	      exit ? "exit" : "entry", cr1.val, cr7.val,</div><div class='del'>-	      get_lowcore()-&gt;kernel_asce.val, get_lowcore()-&gt;user_asce.val);</div><div class='add'>+	      lc-&gt;kernel_asce.val, lc-&gt;user_asce.val);</div><div class='ctx'> }</div><div class='ctx'> #endif /*CONFIG_DEBUG_ENTRY */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/mm/extmem.c b/arch/s390/mm/extmem.c<br/>index a6b8b8ea9086..f7da53e212f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/mm/extmem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/mm/extmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/mm/extmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/mm/extmem.c</a></div><div class='hunk'>@@ -530,6 +530,14 @@ segment_modify_shared (char *name, int do_nonshared)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __dcss_diag_purge_on_cpu_0(void *data)</div><div class='add'>+{</div><div class='add'>+	struct dcss_segment *seg = (struct dcss_segment *)data;</div><div class='add'>+	unsigned long dummy;</div><div class='add'>+</div><div class='add'>+	dcss_diag(&amp;purgeseg_scode, seg-&gt;dcss_name, &amp;dummy, &amp;dummy);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Decrease the use count of a DCSS segment and remove</div><div class='ctx'>  * it from the address space if nobody is using it</div><div class='hunk'>@@ -538,7 +546,6 @@ segment_modify_shared (char *name, int do_nonshared)</div><div class='ctx'> void</div><div class='ctx'> segment_unload(char *name)</div><div class='ctx'> {</div><div class='del'>-	unsigned long dummy;</div><div class='ctx'> 	struct dcss_segment *seg;</div><div class='ctx'> </div><div class='ctx'> 	if (!machine_is_vm())</div><div class='hunk'>@@ -556,7 +563,14 @@ segment_unload(char *name)</div><div class='ctx'> 	kfree(seg-&gt;res);</div><div class='ctx'> 	vmem_remove_mapping(seg-&gt;start_addr, seg-&gt;end - seg-&gt;start_addr + 1);</div><div class='ctx'> 	list_del(&amp;seg-&gt;list);</div><div class='del'>-	dcss_diag(&amp;purgeseg_scode, seg-&gt;dcss_name, &amp;dummy, &amp;dummy);</div><div class='add'>+	/*</div><div class='add'>+	 * Workaround for z/VM issue, where calling the DCSS unload diag on</div><div class='add'>+	 * a non-IPL CPU would cause bogus sclp maximum memory detection on</div><div class='add'>+	 * next IPL.</div><div class='add'>+	 * IPL CPU 0 cannot be set offline, so the dcss_diag() call can</div><div class='add'>+	 * directly be scheduled to that CPU.</div><div class='add'>+	 */</div><div class='add'>+	smp_call_function_single(0, __dcss_diag_purge_on_cpu_0, seg, 1);</div><div class='ctx'> 	kfree(seg);</div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;dcss_lock);</div><div class='head'>diff --git a/arch/s390/mm/pgalloc.c b/arch/s390/mm/pgalloc.c<br/>index e3a6f8ae156c..d177bea0bd73 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/mm/pgalloc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/mm/pgalloc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/mm/pgalloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/mm/pgalloc.c</a></div><div class='hunk'>@@ -38,11 +38,15 @@ void crst_table_free(struct mm_struct *mm, unsigned long *table)</div><div class='ctx'> static void __crst_table_upgrade(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mm_struct *mm = arg;</div><div class='add'>+	struct ctlreg asce;</div><div class='ctx'> </div><div class='ctx'> 	/* change all active ASCEs to avoid the creation of new TLBs */</div><div class='ctx'> 	if (current-&gt;active_mm == mm) {</div><div class='del'>-		get_lowcore()-&gt;user_asce.val = mm-&gt;context.asce;</div><div class='del'>-		local_ctl_load(7, &amp;get_lowcore()-&gt;user_asce);</div><div class='add'>+		asce.val = mm-&gt;context.asce;</div><div class='add'>+		get_lowcore()-&gt;user_asce = asce;</div><div class='add'>+		local_ctl_load(7, &amp;asce);</div><div class='add'>+		if (!test_thread_flag(TIF_ASCE_PRIMARY))</div><div class='add'>+			local_ctl_load(1, &amp;asce);</div><div class='ctx'> 	}</div><div class='ctx'> 	__tlb_flush_local();</div><div class='ctx'> }</div><div class='hunk'>@@ -52,6 +56,8 @@ int crst_table_upgrade(struct mm_struct *mm, unsigned long end)</div><div class='ctx'> 	unsigned long *pgd = NULL, *p4d = NULL, *__pgd;</div><div class='ctx'> 	unsigned long asce_limit = mm-&gt;context.asce_limit;</div><div class='ctx'> </div><div class='add'>+	mmap_assert_write_locked(mm);</div><div class='add'>+</div><div class='ctx'> 	/* upgrade should only happen from 3 to 4, 3 to 5, or 4 to 5 levels */</div><div class='ctx'> 	VM_BUG_ON(asce_limit &lt; _REGION2_SIZE);</div><div class='ctx'> </div><div class='hunk'>@@ -75,13 +81,6 @@ int crst_table_upgrade(struct mm_struct *mm, unsigned long end)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;mm-&gt;page_table_lock);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This routine gets called with mmap_lock lock held and there is</div><div class='del'>-	 * no reason to optimize for the case of otherwise. However, if</div><div class='del'>-	 * that would ever change, the below check will let us know.</div><div class='del'>-	 */</div><div class='del'>-	VM_BUG_ON(asce_limit != mm-&gt;context.asce_limit);</div><div class='del'>-</div><div class='ctx'> 	if (p4d) {</div><div class='ctx'> 		__pgd = (unsigned long *) mm-&gt;pgd;</div><div class='ctx'> 		p4d_populate(mm, (p4d_t *) p4d, (pud_t *) __pgd);</div><div class='head'>diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c<br/>index 0776dfde2dba..c7f8313ba449 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/net/bpf_jit_comp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -48,8 +48,6 @@ struct bpf_jit {</div><div class='ctx'> 	int lit64;		/* Current position in 64-bit literal pool */</div><div class='ctx'> 	int base_ip;		/* Base address for literal pool */</div><div class='ctx'> 	int exit_ip;		/* Address of exit */</div><div class='del'>-	int r1_thunk_ip;	/* Address of expoline thunk for 'br %r1' */</div><div class='del'>-	int r14_thunk_ip;	/* Address of expoline thunk for 'br %r14' */</div><div class='ctx'> 	int tail_call_start;	/* Tail call start offset */</div><div class='ctx'> 	int excnt;		/* Number of exception table entries */</div><div class='ctx'> 	int prologue_plt_ret;	/* Return address for prologue hotpatch PLT */</div><div class='hunk'>@@ -127,6 +125,18 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)</div><div class='ctx'> 		jit-&gt;seen_regs |= (1 &lt;&lt; r1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static s32 off_to_pcrel(struct bpf_jit *jit, u32 off)</div><div class='add'>+{</div><div class='add'>+	return off - jit-&gt;prg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static s64 ptr_to_pcrel(struct bpf_jit *jit, const void *ptr)</div><div class='add'>+{</div><div class='add'>+	if (jit-&gt;prg_buf)</div><div class='add'>+		return (const u8 *)ptr - ((const u8 *)jit-&gt;prg_buf + jit-&gt;prg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define REG_SET_SEEN(b1)					\</div><div class='ctx'> ({								\</div><div class='ctx'> 	reg_set_seen(jit, b1);					\</div><div class='hunk'>@@ -201,7 +211,7 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)</div><div class='ctx'> </div><div class='ctx'> #define EMIT4_PCREL_RIC(op, mask, target)			\</div><div class='ctx'> ({								\</div><div class='del'>-	int __rel = ((target) - jit-&gt;prg) / 2;			\</div><div class='add'>+	int __rel = off_to_pcrel(jit, target) / 2;		\</div><div class='ctx'> 	_EMIT4((op) | (mask) &lt;&lt; 20 | (__rel &amp; 0xffff));		\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='hunk'>@@ -239,7 +249,7 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)</div><div class='ctx'> </div><div class='ctx'> #define EMIT6_PCREL_RIEB(op1, op2, b1, b2, mask, target)	\</div><div class='ctx'> ({								\</div><div class='del'>-	unsigned int rel = (int)((target) - jit-&gt;prg) / 2;	\</div><div class='add'>+	unsigned int rel = off_to_pcrel(jit, target) / 2;	\</div><div class='ctx'> 	_EMIT6((op1) | reg(b1, b2) &lt;&lt; 16 | (rel &amp; 0xffff),	\</div><div class='ctx'> 	       (op2) | (mask) &lt;&lt; 12);				\</div><div class='ctx'> 	REG_SET_SEEN(b1);					\</div><div class='hunk'>@@ -248,7 +258,7 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)</div><div class='ctx'> </div><div class='ctx'> #define EMIT6_PCREL_RIEC(op1, op2, b1, imm, mask, target)	\</div><div class='ctx'> ({								\</div><div class='del'>-	unsigned int rel = (int)((target) - jit-&gt;prg) / 2;	\</div><div class='add'>+	unsigned int rel = off_to_pcrel(jit, target) / 2;	\</div><div class='ctx'> 	_EMIT6((op1) | (reg_high(b1) | (mask)) &lt;&lt; 16 |		\</div><div class='ctx'> 		(rel &amp; 0xffff), (op2) | ((imm) &amp; 0xff) &lt;&lt; 8);	\</div><div class='ctx'> 	REG_SET_SEEN(b1);					\</div><div class='hunk'>@@ -257,29 +267,41 @@ static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)</div><div class='ctx'> </div><div class='ctx'> #define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask)		\</div><div class='ctx'> ({								\</div><div class='del'>-	int rel = (addrs[(i) + (off) + 1] - jit-&gt;prg) / 2;	\</div><div class='add'>+	int rel = off_to_pcrel(jit, addrs[(i) + (off) + 1]) / 2;\</div><div class='ctx'> 	_EMIT6((op1) | reg(b1, b2) &lt;&lt; 16 | (rel &amp; 0xffff), (op2) | (mask));\</div><div class='ctx'> 	REG_SET_SEEN(b1);					\</div><div class='ctx'> 	REG_SET_SEEN(b2);					\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='add'>+static void emit6_pcrel_ril(struct bpf_jit *jit, u32 op, s64 pcrel)</div><div class='add'>+{</div><div class='add'>+	u32 pc32dbl = (s32)(pcrel / 2);</div><div class='add'>+</div><div class='add'>+	_EMIT6(op | pc32dbl &gt;&gt; 16, pc32dbl &amp; 0xffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emit6_pcrel_rilb(struct bpf_jit *jit, u32 op, u8 b, s64 pcrel)</div><div class='add'>+{</div><div class='add'>+	emit6_pcrel_ril(jit, op | reg_high(b) &lt;&lt; 16, pcrel);</div><div class='add'>+	REG_SET_SEEN(b);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define EMIT6_PCREL_RILB(op, b, target)				\</div><div class='del'>-({								\</div><div class='del'>-	unsigned int rel = (int)((target) - jit-&gt;prg) / 2;	\</div><div class='del'>-	_EMIT6((op) | reg_high(b) &lt;&lt; 16 | rel &gt;&gt; 16, rel &amp; 0xffff);\</div><div class='del'>-	REG_SET_SEEN(b);					\</div><div class='del'>-})</div><div class='add'>+	emit6_pcrel_rilb(jit, op, b, off_to_pcrel(jit, target))</div><div class='ctx'> </div><div class='del'>-#define EMIT6_PCREL_RIL(op, target)				\</div><div class='del'>-({								\</div><div class='del'>-	unsigned int rel = (int)((target) - jit-&gt;prg) / 2;	\</div><div class='del'>-	_EMIT6((op) | rel &gt;&gt; 16, rel &amp; 0xffff);			\</div><div class='del'>-})</div><div class='add'>+#define EMIT6_PCREL_RILB_PTR(op, b, target_ptr)			\</div><div class='add'>+	emit6_pcrel_rilb(jit, op, b, ptr_to_pcrel(jit, target_ptr))</div><div class='add'>+</div><div class='add'>+static void emit6_pcrel_rilc(struct bpf_jit *jit, u32 op, u8 mask, s64 pcrel)</div><div class='add'>+{</div><div class='add'>+	emit6_pcrel_ril(jit, op | mask &lt;&lt; 20, pcrel);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define EMIT6_PCREL_RILC(op, mask, target)			\</div><div class='del'>-({								\</div><div class='del'>-	EMIT6_PCREL_RIL((op) | (mask) &lt;&lt; 20, (target));		\</div><div class='del'>-})</div><div class='add'>+	emit6_pcrel_rilc(jit, op, mask, off_to_pcrel(jit, target))</div><div class='add'>+</div><div class='add'>+#define EMIT6_PCREL_RILC_PTR(op, mask, target_ptr)		\</div><div class='add'>+	emit6_pcrel_rilc(jit, op, mask, ptr_to_pcrel(jit, target_ptr))</div><div class='ctx'> </div><div class='ctx'> #define _EMIT6_IMM(op, imm)					\</div><div class='ctx'> ({								\</div><div class='hunk'>@@ -503,7 +525,7 @@ static void bpf_skip(struct bpf_jit *jit, int size)</div><div class='ctx'> {</div><div class='ctx'> 	if (size &gt;= 6 &amp;&amp; !is_valid_rel(size)) {</div><div class='ctx'> 		/* brcl 0xf,size */</div><div class='del'>-		EMIT6_PCREL_RIL(0xc0f4000000, size);</div><div class='add'>+		EMIT6_PCREL_RILC(0xc0040000, 0xf, size);</div><div class='ctx'> 		size -= 6;</div><div class='ctx'> 	} else if (size &gt;= 4 &amp;&amp; is_valid_rel(size)) {</div><div class='ctx'> 		/* brc 0xf,size */</div><div class='hunk'>@@ -605,43 +627,30 @@ static void bpf_jit_prologue(struct bpf_jit *jit, struct bpf_prog *fp,</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Setup stack and backchain */</div><div class='ctx'> 	if (is_first_pass(jit) || (jit-&gt;seen &amp; SEEN_STACK)) {</div><div class='del'>-		if (is_first_pass(jit) || (jit-&gt;seen &amp; SEEN_FUNC))</div><div class='del'>-			/* lgr %w1,%r15 (backchain) */</div><div class='del'>-			EMIT4(0xb9040000, REG_W1, REG_15);</div><div class='add'>+		/* lgr %w1,%r15 (backchain) */</div><div class='add'>+		EMIT4(0xb9040000, REG_W1, REG_15);</div><div class='ctx'> 		/* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */</div><div class='ctx'> 		EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED);</div><div class='ctx'> 		/* aghi %r15,-STK_OFF */</div><div class='ctx'> 		EMIT4_IMM(0xa70b0000, REG_15, -(STK_OFF + stack_depth));</div><div class='del'>-		if (is_first_pass(jit) || (jit-&gt;seen &amp; SEEN_FUNC))</div><div class='del'>-			/* stg %w1,152(%r15) (backchain) */</div><div class='del'>-			EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,</div><div class='del'>-				      REG_15, 152);</div><div class='add'>+		/* stg %w1,152(%r15) (backchain) */</div><div class='add'>+		EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,</div><div class='add'>+			      REG_15, 152);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Emit an expoline for a jump that follows</div><div class='add'>+ * Jump using a register either directly or via an expoline thunk</div><div class='ctx'>  */</div><div class='del'>-static void emit_expoline(struct bpf_jit *jit)</div><div class='del'>-{</div><div class='del'>-	/* exrl %r0,.+10 */</div><div class='del'>-	EMIT6_PCREL_RIL(0xc6000000, jit-&gt;prg + 10);</div><div class='del'>-	/* j . */</div><div class='del'>-	EMIT4_PCREL(0xa7f40000, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Emit __s390_indirect_jump_r1 thunk if necessary</div><div class='del'>- */</div><div class='del'>-static void emit_r1_thunk(struct bpf_jit *jit)</div><div class='del'>-{</div><div class='del'>-	if (nospec_uses_trampoline()) {</div><div class='del'>-		jit-&gt;r1_thunk_ip = jit-&gt;prg;</div><div class='del'>-		emit_expoline(jit);</div><div class='del'>-		/* br %r1 */</div><div class='del'>-		_EMIT2(0x07f1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+#define EMIT_JUMP_REG(reg) do {						\</div><div class='add'>+	if (nospec_uses_trampoline())					\</div><div class='add'>+		/* brcl 0xf,__s390_indirect_jump_rN */			\</div><div class='add'>+		EMIT6_PCREL_RILC_PTR(0xc0040000, 0x0f,			\</div><div class='add'>+				     __s390_indirect_jump_r ## reg);	\</div><div class='add'>+	else								\</div><div class='add'>+		/* br %rN */						\</div><div class='add'>+		_EMIT2(0x07f0 | reg);					\</div><div class='add'>+} while (0)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Call r1 either directly or via __s390_indirect_jump_r1 thunk</div><div class='hunk'>@@ -650,7 +659,8 @@ static void call_r1(struct bpf_jit *jit)</div><div class='ctx'> {</div><div class='ctx'> 	if (nospec_uses_trampoline())</div><div class='ctx'> 		/* brasl %r14,__s390_indirect_jump_r1 */</div><div class='del'>-		EMIT6_PCREL_RILB(0xc0050000, REG_14, jit-&gt;r1_thunk_ip);</div><div class='add'>+		EMIT6_PCREL_RILB_PTR(0xc0050000, REG_14,</div><div class='add'>+				     __s390_indirect_jump_r1);</div><div class='ctx'> 	else</div><div class='ctx'> 		/* basr %r14,%r1 */</div><div class='ctx'> 		EMIT2(0x0d00, REG_14, REG_1);</div><div class='hunk'>@@ -666,16 +676,7 @@ static void bpf_jit_epilogue(struct bpf_jit *jit, u32 stack_depth)</div><div class='ctx'> 	EMIT4(0xb9040000, REG_2, BPF_REG_0);</div><div class='ctx'> 	/* Restore registers */</div><div class='ctx'> 	save_restore_regs(jit, REGS_RESTORE, stack_depth, 0);</div><div class='del'>-	if (nospec_uses_trampoline()) {</div><div class='del'>-		jit-&gt;r14_thunk_ip = jit-&gt;prg;</div><div class='del'>-		/* Generate __s390_indirect_jump_r14 thunk */</div><div class='del'>-		emit_expoline(jit);</div><div class='del'>-	}</div><div class='del'>-	/* br %r14 */</div><div class='del'>-	_EMIT2(0x07fe);</div><div class='del'>-</div><div class='del'>-	if (is_first_pass(jit) || (jit-&gt;seen &amp; SEEN_FUNC))</div><div class='del'>-		emit_r1_thunk(jit);</div><div class='add'>+	EMIT_JUMP_REG(14);</div><div class='ctx'> </div><div class='ctx'> 	jit-&gt;prg = ALIGN(jit-&gt;prg, 8);</div><div class='ctx'> 	jit-&gt;prologue_plt = jit-&gt;prg;</div><div class='hunk'>@@ -1877,7 +1878,8 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp,</div><div class='ctx'> 			/* aghi %r1,tail_call_start */</div><div class='ctx'> 			EMIT4_IMM(0xa70b0000, REG_1, jit-&gt;tail_call_start);</div><div class='ctx'> 			/* brcl 0xf,__s390_indirect_jump_r1 */</div><div class='del'>-			EMIT6_PCREL_RILC(0xc0040000, 0xf, jit-&gt;r1_thunk_ip);</div><div class='add'>+			EMIT6_PCREL_RILC_PTR(0xc0040000, 0xf,</div><div class='add'>+					     __s390_indirect_jump_r1);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* bc 0xf,tail_call_start(%r1) */</div><div class='ctx'> 			_EMIT4(0x47f01000 + jit-&gt;tail_call_start);</div><div class='hunk'>@@ -2585,9 +2587,8 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im,</div><div class='ctx'> 	if (nr_stack_args &gt; MAX_NR_STACK_ARGS)</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='del'>-	/* Return to %r14, since func_addr and %r0 are not available. */</div><div class='del'>-	if ((!func_addr &amp;&amp; !(flags &amp; BPF_TRAMP_F_ORIG_STACK)) ||</div><div class='del'>-	    (flags &amp; BPF_TRAMP_F_INDIRECT))</div><div class='add'>+	/* Return to %r14 in the struct_ops case. */</div><div class='add'>+	if (flags &amp; BPF_TRAMP_F_INDIRECT)</div><div class='ctx'> 		flags |= BPF_TRAMP_F_SKIP_FRAME;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2847,17 +2848,10 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im,</div><div class='ctx'> 	       0xf000 | tjit-&gt;tccnt_off);</div><div class='ctx'> 	/* aghi %r15,stack_size */</div><div class='ctx'> 	EMIT4_IMM(0xa70b0000, REG_15, tjit-&gt;stack_size);</div><div class='del'>-	/* Emit an expoline for the following indirect jump. */</div><div class='del'>-	if (nospec_uses_trampoline())</div><div class='del'>-		emit_expoline(jit);</div><div class='ctx'> 	if (flags &amp; BPF_TRAMP_F_SKIP_FRAME)</div><div class='del'>-		/* br %r14 */</div><div class='del'>-		_EMIT2(0x07fe);</div><div class='add'>+		EMIT_JUMP_REG(14);</div><div class='ctx'> 	else</div><div class='del'>-		/* br %r1 */</div><div class='del'>-		_EMIT2(0x07f1);</div><div class='del'>-</div><div class='del'>-	emit_r1_thunk(jit);</div><div class='add'>+		EMIT_JUMP_REG(1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c<br/>index 5bbdc4190b8b..cd6676c2d602 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/pci/pci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/pci/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/pci/pci.c</a></div><div class='hunk'>@@ -45,6 +45,7 @@</div><div class='ctx'> /* list of all detected zpci devices */</div><div class='ctx'> static LIST_HEAD(zpci_list);</div><div class='ctx'> static DEFINE_SPINLOCK(zpci_list_lock);</div><div class='add'>+static DEFINE_MUTEX(zpci_add_remove_lock);</div><div class='ctx'> </div><div class='ctx'> static DECLARE_BITMAP(zpci_domain, ZPCI_DOMAIN_BITMAP_SIZE);</div><div class='ctx'> static DEFINE_SPINLOCK(zpci_domain_lock);</div><div class='hunk'>@@ -70,6 +71,15 @@ EXPORT_SYMBOL_GPL(zpci_aipb);</div><div class='ctx'> struct airq_iv *zpci_aif_sbv;</div><div class='ctx'> EXPORT_SYMBOL_GPL(zpci_aif_sbv);</div><div class='ctx'> </div><div class='add'>+void zpci_zdev_put(struct zpci_dev *zdev)</div><div class='add'>+{</div><div class='add'>+	if (!zdev)</div><div class='add'>+		return;</div><div class='add'>+	mutex_lock(&amp;zpci_add_remove_lock);</div><div class='add'>+	kref_put_lock(&amp;zdev-&gt;kref, zpci_release_device, &amp;zpci_list_lock);</div><div class='add'>+	mutex_unlock(&amp;zpci_add_remove_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct zpci_dev *get_zdev_by_fid(u32 fid)</div><div class='ctx'> {</div><div class='ctx'> 	struct zpci_dev *tmp, *zdev = NULL;</div><div class='hunk'>@@ -837,6 +847,7 @@ int zpci_add_device(struct zpci_dev *zdev)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;zpci_add_remove_lock);</div><div class='ctx'> 	zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", zdev-&gt;fid, zdev-&gt;fh, zdev-&gt;state);</div><div class='ctx'> 	rc = zpci_init_iommu(zdev);</div><div class='ctx'> 	if (rc)</div><div class='hunk'>@@ -850,12 +861,14 @@ int zpci_add_device(struct zpci_dev *zdev)</div><div class='ctx'> 	spin_lock(&amp;zpci_list_lock);</div><div class='ctx'> 	list_add_tail(&amp;zdev-&gt;entry, &amp;zpci_list);</div><div class='ctx'> 	spin_unlock(&amp;zpci_list_lock);</div><div class='add'>+	mutex_unlock(&amp;zpci_add_remove_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error_destroy_iommu:</div><div class='ctx'> 	zpci_destroy_iommu(zdev);</div><div class='ctx'> error:</div><div class='ctx'> 	zpci_dbg(0, "add fid:%x, rc:%d\n", zdev-&gt;fid, rc);</div><div class='add'>+	mutex_unlock(&amp;zpci_add_remove_lock);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -925,21 +938,20 @@ int zpci_deconfigure_device(struct zpci_dev *zdev)</div><div class='ctx'>  * @zdev: the zpci_dev that was reserved</div><div class='ctx'>  *</div><div class='ctx'>  * Handle the case that a given zPCI function was reserved by another system.</div><div class='del'>- * After a call to this function the zpci_dev can not be found via</div><div class='del'>- * get_zdev_by_fid() anymore but may still be accessible via existing</div><div class='del'>- * references though it will not be functional anymore.</div><div class='ctx'>  */</div><div class='ctx'> void zpci_device_reserved(struct zpci_dev *zdev)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * Remove device from zpci_list as it is going away. This also</div><div class='del'>-	 * makes sure we ignore subsequent zPCI events for this device.</div><div class='del'>-	 */</div><div class='del'>-	spin_lock(&amp;zpci_list_lock);</div><div class='del'>-	list_del(&amp;zdev-&gt;entry);</div><div class='del'>-	spin_unlock(&amp;zpci_list_lock);</div><div class='add'>+	lockdep_assert_held(&amp;zdev-&gt;state_lock);</div><div class='add'>+	/* We may declare the device reserved multiple times */</div><div class='add'>+	if (zdev-&gt;state == ZPCI_FN_STATE_RESERVED)</div><div class='add'>+		return;</div><div class='ctx'> 	zdev-&gt;state = ZPCI_FN_STATE_RESERVED;</div><div class='ctx'> 	zpci_dbg(3, "rsv fid:%x\n", zdev-&gt;fid);</div><div class='add'>+	/*</div><div class='add'>+	 * The underlying device is gone. Allow the zdev to be freed</div><div class='add'>+	 * as soon as all other references are gone by accounting for</div><div class='add'>+	 * the removal as a dropped reference.</div><div class='add'>+	 */</div><div class='ctx'> 	zpci_zdev_put(zdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -947,13 +959,14 @@ void zpci_release_device(struct kref *kref)</div><div class='ctx'> {</div><div class='ctx'> 	struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;zpci_add_remove_lock);</div><div class='ctx'> 	WARN_ON(zdev-&gt;state != ZPCI_FN_STATE_RESERVED);</div><div class='del'>-</div><div class='del'>-	if (zdev-&gt;zbus-&gt;bus)</div><div class='del'>-		zpci_bus_remove_device(zdev, false);</div><div class='del'>-</div><div class='del'>-	if (zdev_enabled(zdev))</div><div class='del'>-		zpci_disable_device(zdev);</div><div class='add'>+	/*</div><div class='add'>+	 * We already hold zpci_list_lock thanks to kref_put_lock().</div><div class='add'>+	 * This makes sure no new reference can be taken from the list.</div><div class='add'>+	 */</div><div class='add'>+	list_del(&amp;zdev-&gt;entry);</div><div class='add'>+	spin_unlock(&amp;zpci_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (zdev-&gt;has_hp_slot)</div><div class='ctx'> 		zpci_exit_slot(zdev);</div><div class='head'>diff --git a/arch/s390/pci/pci_bus.h b/arch/s390/pci/pci_bus.h<br/>index e86a9419d233..ae3d7a9159bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_bus.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_bus.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_bus.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/pci/pci_bus.h</a></div><div class='hunk'>@@ -21,11 +21,8 @@ int zpci_bus_scan_device(struct zpci_dev *zdev);</div><div class='ctx'> void zpci_bus_remove_device(struct zpci_dev *zdev, bool set_error);</div><div class='ctx'> </div><div class='ctx'> void zpci_release_device(struct kref *kref);</div><div class='del'>-static inline void zpci_zdev_put(struct zpci_dev *zdev)</div><div class='del'>-{</div><div class='del'>-	if (zdev)</div><div class='del'>-		kref_put(&amp;zdev-&gt;kref, zpci_release_device);</div><div class='del'>-}</div><div class='add'>+</div><div class='add'>+void zpci_zdev_put(struct zpci_dev *zdev);</div><div class='ctx'> </div><div class='ctx'> static inline void zpci_zdev_get(struct zpci_dev *zdev)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/s390/pci/pci_clp.c b/arch/s390/pci/pci_clp.c<br/>index 9a929bbcc397..241f7251c873 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_clp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_clp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_clp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/pci/pci_clp.c</a></div><div class='hunk'>@@ -428,6 +428,8 @@ static void __clp_add(struct clp_fh_list_entry *entry, void *data)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	zdev = zpci_create_device(entry-&gt;fid, entry-&gt;fh, entry-&gt;config_state);</div><div class='add'>+	if (IS_ERR(zdev))</div><div class='add'>+		return;</div><div class='ctx'> 	list_add_tail(&amp;zdev-&gt;entry, scan_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/s390/pci/pci_event.c b/arch/s390/pci/pci_event.c<br/>index 7bd7721c1239..2fbee3887d13 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_event.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/pci/pci_event.c</a></div><div class='hunk'>@@ -335,6 +335,22 @@ static void zpci_event_hard_deconfigured(struct zpci_dev *zdev, u32 fh)</div><div class='ctx'> 	zdev-&gt;state = ZPCI_FN_STATE_STANDBY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void zpci_event_reappear(struct zpci_dev *zdev)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;zdev-&gt;state_lock);</div><div class='add'>+	/*</div><div class='add'>+	 * The zdev is in the reserved state. This means that it was presumed to</div><div class='add'>+	 * go away but there are still undropped references. Now, the platform</div><div class='add'>+	 * announced its availability again. Bring back the lingering zdev</div><div class='add'>+	 * to standby. This is safe because we hold a temporary reference</div><div class='add'>+	 * now so that it won't go away. Account for the re-appearance of the</div><div class='add'>+	 * underlying device by incrementing the reference count.</div><div class='add'>+	 */</div><div class='add'>+	zdev-&gt;state = ZPCI_FN_STATE_STANDBY;</div><div class='add'>+	zpci_zdev_get(zdev);</div><div class='add'>+	zpci_dbg(1, "rea fid:%x, fh:%x\n", zdev-&gt;fid, zdev-&gt;fh);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)</div><div class='ctx'> {</div><div class='ctx'> 	struct zpci_dev *zdev = get_zdev_by_fid(ccdf-&gt;fid);</div><div class='hunk'>@@ -358,8 +374,10 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='add'>+			if (zdev-&gt;state == ZPCI_FN_STATE_RESERVED)</div><div class='add'>+				zpci_event_reappear(zdev);</div><div class='ctx'> 			/* the configuration request may be stale */</div><div class='del'>-			if (zdev-&gt;state != ZPCI_FN_STATE_STANDBY)</div><div class='add'>+			else if (zdev-&gt;state != ZPCI_FN_STATE_STANDBY)</div><div class='ctx'> 				break;</div><div class='ctx'> 			zdev-&gt;state = ZPCI_FN_STATE_CONFIGURED;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -375,6 +393,8 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf)</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='add'>+			if (zdev-&gt;state == ZPCI_FN_STATE_RESERVED)</div><div class='add'>+				zpci_event_reappear(zdev);</div><div class='ctx'> 			zpci_update_fh(zdev, ccdf-&gt;fh);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/arch/s390/pci/pci_mmio.c b/arch/s390/pci/pci_mmio.c<br/>index 5fcc1a3b04bd..51e7a28af899 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_mmio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/pci/pci_mmio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/pci/pci_mmio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/pci/pci_mmio.c</a></div><div class='hunk'>@@ -32,8 +32,10 @@ static inline int __pcistb_mio_inuser(</div><div class='ctx'> 		u64 len, u8 *status)</div><div class='ctx'> {</div><div class='ctx'> 	int cc, exception;</div><div class='add'>+	bool sacf_flag;</div><div class='ctx'> </div><div class='ctx'> 	exception = 1;</div><div class='add'>+	sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 	asm_inline volatile (</div><div class='ctx'> 		"	sacf	256\n"</div><div class='ctx'> 		"0:	.insn	rsy,0xeb00000000d4,%[len],%[ioaddr],%[src]\n"</div><div class='hunk'>@@ -44,6 +46,7 @@ static inline int __pcistb_mio_inuser(</div><div class='ctx'> 		: CC_OUT(cc, cc), [len] "+d" (len), [exc] "+d" (exception)</div><div class='ctx'> 		: [ioaddr] "a" (ioaddr), [src] "Q" (*((u8 __force *)src))</div><div class='ctx'> 		: CC_CLOBBER_LIST("memory"));</div><div class='add'>+	disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 	*status = len &gt;&gt; 24 &amp; 0xff;</div><div class='ctx'> 	return exception ? -ENXIO : CC_TRANSFORM(cc);</div><div class='ctx'> }</div><div class='hunk'>@@ -54,6 +57,7 @@ static inline int __pcistg_mio_inuser(</div><div class='ctx'> {</div><div class='ctx'> 	union register_pair ioaddr_len = {.even = (u64 __force)ioaddr, .odd = ulen};</div><div class='ctx'> 	int cc, exception;</div><div class='add'>+	bool sacf_flag;</div><div class='ctx'> 	u64 val = 0;</div><div class='ctx'> 	u64 cnt = ulen;</div><div class='ctx'> 	u8 tmp;</div><div class='hunk'>@@ -64,6 +68,7 @@ static inline int __pcistg_mio_inuser(</div><div class='ctx'> 	 * address space. pcistg then uses the user mappings.</div><div class='ctx'> 	 */</div><div class='ctx'> 	exception = 1;</div><div class='add'>+	sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 	asm_inline volatile (</div><div class='ctx'> 		"	sacf	256\n"</div><div class='ctx'> 		"0:	llgc	%[tmp],0(%[src])\n"</div><div class='hunk'>@@ -81,6 +86,7 @@ static inline int __pcistg_mio_inuser(</div><div class='ctx'> 		  CC_OUT(cc, cc), [ioaddr_len] "+&amp;d" (ioaddr_len.pair)</div><div class='ctx'> 		:</div><div class='ctx'> 		: CC_CLOBBER_LIST("memory"));</div><div class='add'>+	disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 	*status = ioaddr_len.odd &gt;&gt; 24 &amp; 0xff;</div><div class='ctx'> </div><div class='ctx'> 	cc = exception ? -ENXIO : CC_TRANSFORM(cc);</div><div class='hunk'>@@ -204,6 +210,7 @@ static inline int __pcilg_mio_inuser(</div><div class='ctx'> 		u64 ulen, u8 *status)</div><div class='ctx'> {</div><div class='ctx'> 	union register_pair ioaddr_len = {.even = (u64 __force)ioaddr, .odd = ulen};</div><div class='add'>+	bool sacf_flag;</div><div class='ctx'> 	u64 cnt = ulen;</div><div class='ctx'> 	int shift = ulen * 8;</div><div class='ctx'> 	int cc, exception;</div><div class='hunk'>@@ -215,6 +222,7 @@ static inline int __pcilg_mio_inuser(</div><div class='ctx'> 	 * user address @dst</div><div class='ctx'> 	 */</div><div class='ctx'> 	exception = 1;</div><div class='add'>+	sacf_flag = enable_sacf_uaccess();</div><div class='ctx'> 	asm_inline volatile (</div><div class='ctx'> 		"	sacf	256\n"</div><div class='ctx'> 		"0:	.insn	rre,0xb9d60000,%[val],%[ioaddr_len]\n"</div><div class='hunk'>@@ -236,10 +244,10 @@ static inline int __pcilg_mio_inuser(</div><div class='ctx'> 		: [ioaddr_len] "+&amp;d" (ioaddr_len.pair), [exc] "+d" (exception),</div><div class='ctx'> 		  CC_OUT(cc, cc), [val] "=d" (val),</div><div class='ctx'> 		  [dst] "+a" (dst), [cnt] "+d" (cnt), [tmp] "=d" (tmp),</div><div class='del'>-		  [shift] "+d" (shift)</div><div class='add'>+		  [shift] "+a" (shift)</div><div class='ctx'> 		:</div><div class='ctx'> 		: CC_CLOBBER_LIST("memory"));</div><div class='del'>-</div><div class='add'>+	disable_sacf_uaccess(sacf_flag);</div><div class='ctx'> 	cc = exception ? -ENXIO : CC_TRANSFORM(cc);</div><div class='ctx'> 	/* did we write everything to the user space buffer? */</div><div class='ctx'> 	if (!cc &amp;&amp; cnt != 0)</div><div class='head'>diff --git a/arch/s390/tools/gen_facilities.c b/arch/s390/tools/gen_facilities.c<br/>index 855f818deb98..d5c68ade71ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/s390/tools/gen_facilities.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/s390/tools/gen_facilities.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/s390/tools/gen_facilities.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/s390/tools/gen_facilities.c</a></div><div class='hunk'>@@ -54,6 +54,9 @@ static struct facility_def facility_defs[] = {</div><div class='ctx'> #ifdef CONFIG_HAVE_MARCH_Z15_FEATURES</div><div class='ctx'> 			61, /* miscellaneous-instruction-extension 3 */</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_HAVE_MARCH_Z17_FEATURES</div><div class='add'>+			84, /* miscellaneous-instruction-extension 4 */</div><div class='add'>+#endif</div><div class='ctx'> 			-1 /* END */</div><div class='ctx'> 		}</div><div class='ctx'> 	},</div><div class='head'>diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c<br/>index f9f3b14f70d5..730c01b225bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-se/7343/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/boards/mach-se/7343/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-se/7343/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/boards/mach-se/7343/irq.c</a></div><div class='hunk'>@@ -47,8 +47,9 @@ static void __init se7343_domain_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	se7343_irq_domain = irq_domain_add_linear(NULL, SE7343_FPGA_IRQ_NR,</div><div class='del'>-						  &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	se7343_irq_domain = irq_domain_create_linear(NULL, SE7343_FPGA_IRQ_NR,</div><div class='add'>+						     &amp;irq_domain_simple_ops,</div><div class='add'>+						     NULL);</div><div class='ctx'> 	if (unlikely(!se7343_irq_domain)) {</div><div class='ctx'> 		printk("Failed to get IRQ domain\n");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -70,7 +71,7 @@ static void __init se7343_gc_init(void)</div><div class='ctx'> 	struct irq_chip_type *ct;</div><div class='ctx'> 	unsigned int irq_base;</div><div class='ctx'> </div><div class='del'>-	irq_base = irq_linear_revmap(se7343_irq_domain, 0);</div><div class='add'>+	irq_base = irq_find_mapping(se7343_irq_domain, 0);</div><div class='ctx'> </div><div class='ctx'> 	gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7343_irq_regs,</div><div class='ctx'> 				    handle_level_irq);</div><div class='head'>diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c<br/>index efa96edd47dc..49aa3a2b1b8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-se/7722/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/boards/mach-se/7722/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-se/7722/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/boards/mach-se/7722/irq.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@ static void __init se7722_domain_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	se7722_irq_domain = irq_domain_add_linear(NULL, SE7722_FPGA_IRQ_NR,</div><div class='add'>+	se7722_irq_domain = irq_domain_create_linear(NULL, SE7722_FPGA_IRQ_NR,</div><div class='ctx'> 						  &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> 	if (unlikely(!se7722_irq_domain)) {</div><div class='ctx'> 		printk("Failed to get IRQ domain\n");</div><div class='hunk'>@@ -69,7 +69,7 @@ static void __init se7722_gc_init(void)</div><div class='ctx'> 	struct irq_chip_type *ct;</div><div class='ctx'> 	unsigned int irq_base;</div><div class='ctx'> </div><div class='del'>-	irq_base = irq_linear_revmap(se7722_irq_domain, 0);</div><div class='add'>+	irq_base = irq_find_mapping(se7722_irq_domain, 0);</div><div class='ctx'> </div><div class='ctx'> 	gc = irq_alloc_generic_chip(DRV_NAME, 1, irq_base, se7722_irq_regs,</div><div class='ctx'> 				    handle_level_irq);</div><div class='head'>diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c<br/>index f82d3a6a844a..c13d51b29702 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-x3proto/gpio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/boards/mach-x3proto/gpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/boards/mach-x3proto/gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/boards/mach-x3proto/gpio.c</a></div><div class='hunk'>@@ -108,7 +108,7 @@ int __init x3proto_gpio_setup(void)</div><div class='ctx'> 	if (unlikely(ret))</div><div class='ctx'> 		goto err_gpio;</div><div class='ctx'> </div><div class='del'>-	x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS,</div><div class='add'>+	x3proto_irq_domain = irq_domain_create_linear(NULL, NR_BASEBOARD_GPIOS,</div><div class='ctx'> 						   &amp;x3proto_gpio_irq_ops, NULL);</div><div class='ctx'> 	if (unlikely(!x3proto_irq_domain))</div><div class='ctx'> 		goto err_irq;</div><div class='head'>diff --git a/arch/sh/configs/ap325rxa_defconfig b/arch/sh/configs/ap325rxa_defconfig<br/>index 4464a2ad42ed..b6f36c938f1d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/ap325rxa_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/ap325rxa_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/ap325rxa_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/ap325rxa_defconfig</a></div><div class='hunk'>@@ -99,4 +99,3 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_CRYPTO=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig<br/>index ee1b36682155..e76694aace25 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/ecovec24_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/ecovec24_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/ecovec24_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/ecovec24_defconfig</a></div><div class='hunk'>@@ -128,4 +128,3 @@ CONFIG_DEBUG_FS=y</div><div class='ctx'> CONFIG_CRYPTO=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig<br/>index 296ed768cbbb..ee3f6db7d8da 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/edosk7705_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/edosk7705_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/edosk7705_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/edosk7705_defconfig</a></div><div class='hunk'>@@ -33,4 +33,3 @@ CONFIG_CMDLINE_FROM_BOOTLOADER=y</div><div class='ctx'> # CONFIG_PROC_FS is not set</div><div class='ctx'> # CONFIG_SYSFS is not set</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/sh/configs/espt_defconfig b/arch/sh/configs/espt_defconfig<br/>index 67716a44463e..da176f100e00 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/espt_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/espt_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/espt_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/espt_defconfig</a></div><div class='hunk'>@@ -110,4 +110,3 @@ CONFIG_NLS_UTF8=y</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/hp6xx_defconfig b/arch/sh/configs/hp6xx_defconfig<br/>index 77e3185f63e4..3582af15ad86 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/hp6xx_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/hp6xx_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/hp6xx_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/hp6xx_defconfig</a></div><div class='hunk'>@@ -56,5 +56,3 @@ CONFIG_CRYPTO_PCBC=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC16=y</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/kfr2r09-romimage_defconfig b/arch/sh/configs/kfr2r09-romimage_defconfig<br/>index 42bf34181a3e..88fbb65cb9f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/kfr2r09-romimage_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/kfr2r09-romimage_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/kfr2r09-romimage_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/kfr2r09-romimage_defconfig</a></div><div class='hunk'>@@ -49,4 +49,3 @@ CONFIG_TMPFS=y</div><div class='ctx'> # CONFIG_NETWORK_FILESYSTEMS is not set</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig<br/>index d871623955c5..924bb3233b0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/landisk_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/landisk_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/landisk_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/landisk_defconfig</a></div><div class='hunk'>@@ -111,4 +111,3 @@ CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=y</div><div class='ctx'> CONFIG_SH_STANDARD_BIOS=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/lboxre2_defconfig b/arch/sh/configs/lboxre2_defconfig<br/>index 6a234761bfd7..0307bb2be79f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/lboxre2_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/lboxre2_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/lboxre2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/lboxre2_defconfig</a></div><div class='hunk'>@@ -58,4 +58,3 @@ CONFIG_ROMFS_FS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_437=y</div><div class='ctx'> CONFIG_SH_STANDARD_BIOS=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/magicpanelr2_defconfig b/arch/sh/configs/magicpanelr2_defconfig<br/>index 8d443749550e..93b9aa32dc7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/magicpanelr2_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/magicpanelr2_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/magicpanelr2_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/magicpanelr2_defconfig</a></div><div class='hunk'>@@ -86,5 +86,3 @@ CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_KOBJECT=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_FRAME_POINTER=y</div><div class='del'>-CONFIG_CRC_CCITT=m</div><div class='del'>-CONFIG_CRC16=m</div><div class='head'>diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig<br/>index 2d1e65cad239..31dbd8888aaa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/migor_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/migor_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/migor_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/migor_defconfig</a></div><div class='hunk'>@@ -87,7 +87,5 @@ CONFIG_TMPFS=y</div><div class='ctx'> CONFIG_NFS_FS=y</div><div class='ctx'> CONFIG_ROOT_NFS=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='del'>-CONFIG_CRYPTO_MANAGER=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/r7780mp_defconfig b/arch/sh/configs/r7780mp_defconfig<br/>index 6bd6c0ae85d7..f28b8c4181c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/r7780mp_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/r7780mp_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/r7780mp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/r7780mp_defconfig</a></div><div class='hunk'>@@ -105,4 +105,3 @@ CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig<br/>index cde668569cc1..3a4239f20ff1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/r7785rp_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/r7785rp_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/r7785rp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/r7785rp_defconfig</a></div><div class='hunk'>@@ -103,4 +103,3 @@ CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/rts7751r2d1_defconfig b/arch/sh/configs/rts7751r2d1_defconfig<br/>index c863a11c7592..69568cc40396 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/rts7751r2d1_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/rts7751r2d1_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/rts7751r2d1_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/rts7751r2d1_defconfig</a></div><div class='hunk'>@@ -87,4 +87,3 @@ CONFIG_MINIX_FS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/rts7751r2dplus_defconfig b/arch/sh/configs/rts7751r2dplus_defconfig<br/>index 7e4f710d46c7..ecb4bdb5bb58 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/rts7751r2dplus_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/rts7751r2dplus_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/rts7751r2dplus_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/rts7751r2dplus_defconfig</a></div><div class='hunk'>@@ -92,4 +92,3 @@ CONFIG_MINIX_FS=y</div><div class='ctx'> CONFIG_NLS_CODEPAGE_932=y</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/sdk7780_defconfig b/arch/sh/configs/sdk7780_defconfig<br/>index cd24cf08210e..9870d16d9711 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/sdk7780_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sdk7780_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/sdk7780_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/sdk7780_defconfig</a></div><div class='hunk'>@@ -136,4 +136,3 @@ CONFIG_SH_STANDARD_BIOS=y</div><div class='ctx'> CONFIG_CRYPTO_MD5=y</div><div class='ctx'> CONFIG_CRYPTO_DES=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig<br/>index 472fdf365cad..64f9308ee586 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/se7206_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7206_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/se7206_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/se7206_defconfig</a></div><div class='hunk'>@@ -101,6 +101,3 @@ CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='del'>-CONFIG_CRC_ITU_T=y</div><div class='head'>diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig<br/>index 49a4961889de..8770a72e6a63 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/se7712_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7712_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/se7712_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/se7712_defconfig</a></div><div class='hunk'>@@ -96,4 +96,3 @@ CONFIG_FRAME_POINTER=y</div><div class='ctx'> CONFIG_CRYPTO_ECB=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='head'>diff --git a/arch/sh/configs/se7721_defconfig b/arch/sh/configs/se7721_defconfig<br/>index de293792db84..b15c6406a0e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/se7721_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7721_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/se7721_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/se7721_defconfig</a></div><div class='hunk'>@@ -122,4 +122,3 @@ CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> CONFIG_FRAME_POINTER=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='head'>diff --git a/arch/sh/configs/se7724_defconfig b/arch/sh/configs/se7724_defconfig<br/>index 96521271758c..9501e69eb886 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/se7724_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/se7724_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/se7724_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/se7724_defconfig</a></div><div class='hunk'>@@ -128,4 +128,3 @@ CONFIG_NLS_ISO8859_1=y</div><div class='ctx'> CONFIG_CRYPTO=y</div><div class='ctx'> CONFIG_CRYPTO_CBC=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/sh03_defconfig b/arch/sh/configs/sh03_defconfig<br/>index 48f38ec236b6..4d75c92cac10 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/sh03_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh03_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/sh03_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/sh03_defconfig</a></div><div class='hunk'>@@ -120,6 +120,5 @@ CONFIG_CRYPTO_HMAC=y</div><div class='ctx'> CONFIG_CRYPTO_SHA1=y</div><div class='ctx'> CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='ctx'> CONFIG_RTC_CLASS=y</div><div class='ctx'> CONFIG_RTC_DRV_GENERIC=y</div><div class='head'>diff --git a/arch/sh/configs/sh2007_defconfig b/arch/sh/configs/sh2007_defconfig<br/>index 1b1174a07e36..cc6292b3235a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/sh2007_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh2007_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/sh2007_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/sh2007_defconfig</a></div><div class='hunk'>@@ -193,5 +193,3 @@ CONFIG_CRYPTO_DEFLATE=y</div><div class='ctx'> CONFIG_CRYPTO_LZO=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='ctx'> # CONFIG_CRYPTO_HW is not set</div><div class='del'>-CONFIG_CRC_CCITT=y</div><div class='del'>-CONFIG_CRC16=y</div><div class='head'>diff --git a/arch/sh/configs/sh7724_generic_defconfig b/arch/sh/configs/sh7724_generic_defconfig<br/>index 5440bd0ca4ed..e6298f22623a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/sh7724_generic_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh7724_generic_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/sh7724_generic_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/sh7724_generic_defconfig</a></div><div class='hunk'>@@ -39,4 +39,3 @@ CONFIG_UIO_PDRV_GENIRQ=y</div><div class='ctx'> # CONFIG_SYSFS is not set</div><div class='ctx'> # CONFIG_MISC_FILESYSTEMS is not set</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/sh/configs/sh7763rdp_defconfig b/arch/sh/configs/sh7763rdp_defconfig<br/>index 57923c3296cc..b77b3313157e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/sh7763rdp_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh7763rdp_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/sh7763rdp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/sh7763rdp_defconfig</a></div><div class='hunk'>@@ -112,4 +112,3 @@ CONFIG_NLS_UTF8=y</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='ctx'> CONFIG_DEBUG_FS=y</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC_T10DIF=y</div><div class='head'>diff --git a/arch/sh/configs/sh7770_generic_defconfig b/arch/sh/configs/sh7770_generic_defconfig<br/>index 4338af8d02d0..2e2b46980b58 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/sh7770_generic_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/sh7770_generic_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/sh7770_generic_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/sh7770_generic_defconfig</a></div><div class='hunk'>@@ -41,4 +41,3 @@ CONFIG_UIO_PDRV_GENIRQ=y</div><div class='ctx'> # CONFIG_SYSFS is not set</div><div class='ctx'> # CONFIG_MISC_FILESYSTEMS is not set</div><div class='ctx'> # CONFIG_ENABLE_MUST_CHECK is not set</div><div class='del'>-# CONFIG_CRC32 is not set</div><div class='head'>diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig<br/>index 8e85f205d8f5..f022ada363b5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sh/configs/titan_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sh/configs/titan_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sh/configs/titan_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sh/configs/titan_defconfig</a></div><div class='hunk'>@@ -264,4 +264,3 @@ CONFIG_CRYPTO_SERPENT=m</div><div class='ctx'> CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC16=m</div><div class='head'>diff --git a/arch/sparc/configs/sparc64_defconfig b/arch/sparc/configs/sparc64_defconfig<br/>index 01b2bdfbf9a8..7a7c4dec2925 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/configs/sparc64_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/configs/sparc64_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/configs/sparc64_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/configs/sparc64_defconfig</a></div><div class='hunk'>@@ -205,7 +205,7 @@ CONFIG_BLK_DEV_IO_TRACE=y</div><div class='ctx'> CONFIG_UPROBE_EVENTS=y</div><div class='ctx'> CONFIG_KEYS=y</div><div class='ctx'> CONFIG_CRYPTO_NULL=m</div><div class='del'>-CONFIG_CRYPTO_TEST=m</div><div class='add'>+CONFIG_CRYPTO_BENCHMARK=m</div><div class='ctx'> CONFIG_CRYPTO_LRW=m</div><div class='ctx'> CONFIG_CRYPTO_PCBC=m</div><div class='ctx'> CONFIG_CRYPTO_XTS=m</div><div class='hunk'>@@ -229,7 +229,6 @@ CONFIG_CRYPTO_SERPENT=m</div><div class='ctx'> CONFIG_CRYPTO_TEA=m</div><div class='ctx'> CONFIG_CRYPTO_TWOFISH=m</div><div class='ctx'> # CONFIG_CRYPTO_ANSI_CPRNG is not set</div><div class='del'>-CONFIG_CRC16=m</div><div class='ctx'> CONFIG_VCC=m</div><div class='ctx'> CONFIG_PATA_CMD64X=y</div><div class='ctx'> CONFIG_IP_PNP=y</div><div class='head'>diff --git a/arch/sparc/crypto/Kconfig b/arch/sparc/crypto/Kconfig<br/>index e858597de89d..a6ba319c42dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/Kconfig</a></div><div class='hunk'>@@ -36,16 +36,6 @@ config CRYPTO_SHA1_SPARC64</div><div class='ctx'> </div><div class='ctx'> 	  Architecture: sparc64</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_SPARC64</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256"</div><div class='del'>-	depends on SPARC64</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: sparc64 using crypto instructions, when available</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA512_SPARC64</div><div class='ctx'> 	tristate "Hash functions: SHA-384 and SHA-512"</div><div class='ctx'> 	depends on SPARC64</div><div class='head'>diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile<br/>index a2d7fca40cb4..701c39edb0d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/Makefile</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_SPARC64) += sha1-sparc64.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_SPARC64) += sha256-sparc64.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512_SPARC64) += sha512-sparc64.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_MD5_SPARC64) += md5-sparc64.o</div><div class='ctx'> </div><div class='hunk'>@@ -13,7 +12,6 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += des-sparc64.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CAMELLIA_SPARC64) += camellia-sparc64.o</div><div class='ctx'> </div><div class='ctx'> sha1-sparc64-y := sha1_asm.o sha1_glue.o</div><div class='del'>-sha256-sparc64-y := sha256_asm.o sha256_glue.o</div><div class='ctx'> sha512-sparc64-y := sha512_asm.o sha512_glue.o</div><div class='ctx'> md5-sparc64-y := md5_asm.o md5_glue.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/crypto/aes_asm.S b/arch/sparc/crypto/aes_asm.S<br/>index 155cefb98520..f291174a72a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/aes_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/aes_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/aes_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/aes_asm.S</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> #define ENCRYPT_TWO_ROUNDS(KEY_BASE, I0, I1, T0, T1) \</div><div class='ctx'> 	AES_EROUND01(KEY_BASE +  0, I0, I1, T0) \</div><div class='ctx'> 	AES_EROUND23(KEY_BASE +  2, I0, I1, T1) \</div><div class='head'>diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c<br/>index 683150830356..359f22643b05 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/aes_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/aes_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/aes_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/aes_glue.c</a></div><div class='hunk'>@@ -27,11 +27,10 @@</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fpumacro.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/pstate.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> struct aes_ops {</div><div class='ctx'> 	void (*encrypt)(const u64 *key, const u32 *input, u32 *output);</div><div class='ctx'> 	void (*decrypt)(const u64 *key, const u32 *input, u32 *output);</div><div class='head'>diff --git a/arch/sparc/crypto/camellia_asm.S b/arch/sparc/crypto/camellia_asm.S<br/>index dcdc9193fcd7..8471b346ef54 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/camellia_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/camellia_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/camellia_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/camellia_asm.S</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> #define CAMELLIA_6ROUNDS(KEY_BASE, I0, I1) \</div><div class='ctx'> 	CAMELLIA_F(KEY_BASE +  0, I1, I0, I1) \</div><div class='ctx'> 	CAMELLIA_F(KEY_BASE +  2, I0, I1, I0) \</div><div class='head'>diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c<br/>index aaa9714378e6..e7a1e1c42b99 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/camellia_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/camellia_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/camellia_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/camellia_glue.c</a></div><div class='hunk'>@@ -15,11 +15,10 @@</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fpumacro.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/pstate.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> #define CAMELLIA_MIN_KEY_SIZE        16</div><div class='ctx'> #define CAMELLIA_MAX_KEY_SIZE        32</div><div class='ctx'> #define CAMELLIA_BLOCK_SIZE          16</div><div class='head'>diff --git a/arch/sparc/crypto/des_asm.S b/arch/sparc/crypto/des_asm.S<br/>index 7157468a679d..d534446cbef9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/des_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/des_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/des_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/des_asm.S</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> 	.align	32</div><div class='ctx'> ENTRY(des_sparc64_key_expand)</div><div class='ctx'> 	/* %o0=input_key, %o1=output_key */</div><div class='head'>diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c<br/>index a499102bf706..e50ec4cd57cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/des_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/des_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/des_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/des_glue.c</a></div><div class='hunk'>@@ -16,11 +16,10 @@</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fpumacro.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/pstate.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> struct des_sparc64_ctx {</div><div class='ctx'> 	u64 encrypt_expkey[DES_EXPKEY_WORDS / 2];</div><div class='ctx'> 	u64 decrypt_expkey[DES_EXPKEY_WORDS / 2];</div><div class='head'>diff --git a/arch/sparc/crypto/md5_asm.S b/arch/sparc/crypto/md5_asm.S<br/>index 7a6637455f37..60b544e4d205 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/md5_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/md5_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/md5_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/md5_asm.S</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> ENTRY(md5_sparc64_transform)</div><div class='ctx'> 	/* %o0 = digest, %o1 = data, %o2 = rounds */</div><div class='ctx'> 	VISEntryHalf</div><div class='head'>diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c<br/>index 511db98d590a..b3615f0cdf62 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/md5_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/md5_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/md5_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/md5_glue.c</a></div><div class='hunk'>@@ -14,121 +14,104 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/elf.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='add'>+#include &lt;asm/pstate.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/md5.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/pstate.h&gt;</div><div class='del'>-#include &lt;asm/elf.h&gt;</div><div class='del'>-</div><div class='del'>-#include "opcodes.h"</div><div class='add'>+struct sparc_md5_state {</div><div class='add'>+	__le32 hash[MD5_HASH_WORDS];</div><div class='add'>+	u64 byte_count;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-asmlinkage void md5_sparc64_transform(u32 *digest, const char *data,</div><div class='add'>+asmlinkage void md5_sparc64_transform(__le32 *digest, const char *data,</div><div class='ctx'> 				      unsigned int rounds);</div><div class='ctx'> </div><div class='ctx'> static int md5_sparc64_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='add'>+	struct sparc_md5_state *mctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	mctx-&gt;hash[0] = MD5_H0;</div><div class='del'>-	mctx-&gt;hash[1] = MD5_H1;</div><div class='del'>-	mctx-&gt;hash[2] = MD5_H2;</div><div class='del'>-	mctx-&gt;hash[3] = MD5_H3;</div><div class='del'>-	le32_to_cpu_array(mctx-&gt;hash, 4);</div><div class='add'>+	mctx-&gt;hash[0] = cpu_to_le32(MD5_H0);</div><div class='add'>+	mctx-&gt;hash[1] = cpu_to_le32(MD5_H1);</div><div class='add'>+	mctx-&gt;hash[2] = cpu_to_le32(MD5_H2);</div><div class='add'>+	mctx-&gt;hash[3] = cpu_to_le32(MD5_H3);</div><div class='ctx'> 	mctx-&gt;byte_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __md5_sparc64_update(struct md5_state *sctx, const u8 *data,</div><div class='del'>-				 unsigned int len, unsigned int partial)</div><div class='del'>-{</div><div class='del'>-	unsigned int done = 0;</div><div class='del'>-</div><div class='del'>-	sctx-&gt;byte_count += len;</div><div class='del'>-	if (partial) {</div><div class='del'>-		done = MD5_HMAC_BLOCK_SIZE - partial;</div><div class='del'>-		memcpy((u8 *)sctx-&gt;block + partial, data, done);</div><div class='del'>-		md5_sparc64_transform(sctx-&gt;hash, (u8 *)sctx-&gt;block, 1);</div><div class='del'>-	}</div><div class='del'>-	if (len - done &gt;= MD5_HMAC_BLOCK_SIZE) {</div><div class='del'>-		const unsigned int rounds = (len - done) / MD5_HMAC_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-		md5_sparc64_transform(sctx-&gt;hash, data + done, rounds);</div><div class='del'>-		done += rounds * MD5_HMAC_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(sctx-&gt;block, data + done, len - done);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int md5_sparc64_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			      unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = sctx-&gt;byte_count % MD5_HMAC_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Handle the fast case right here */</div><div class='del'>-	if (partial + len &lt; MD5_HMAC_BLOCK_SIZE) {</div><div class='del'>-		sctx-&gt;byte_count += len;</div><div class='del'>-		memcpy((u8 *)sctx-&gt;block + partial, data, len);</div><div class='del'>-	} else</div><div class='del'>-		__md5_sparc64_update(sctx, data, len, partial);</div><div class='add'>+	struct sparc_md5_state *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	sctx-&gt;byte_count += round_down(len, MD5_HMAC_BLOCK_SIZE);</div><div class='add'>+	md5_sparc64_transform(sctx-&gt;hash, data, len / MD5_HMAC_BLOCK_SIZE);</div><div class='add'>+	return len - round_down(len, MD5_HMAC_BLOCK_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Add padding and return the message digest. */</div><div class='del'>-static int md5_sparc64_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int md5_sparc64_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			     unsigned int offset, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int i, index, padlen;</div><div class='del'>-	u32 *dst = (u32 *)out;</div><div class='del'>-	__le64 bits;</div><div class='del'>-	static const u8 padding[MD5_HMAC_BLOCK_SIZE] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_le64(sctx-&gt;byte_count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 and append length */</div><div class='del'>-	index = sctx-&gt;byte_count % MD5_HMAC_BLOCK_SIZE;</div><div class='del'>-	padlen = (index &lt; 56) ? (56 - index) : ((MD5_HMAC_BLOCK_SIZE+56) - index);</div><div class='del'>-</div><div class='del'>-	/* We need to fill a whole block for __md5_sparc64_update() */</div><div class='del'>-	if (padlen &lt;= 56) {</div><div class='del'>-		sctx-&gt;byte_count += padlen;</div><div class='del'>-		memcpy((u8 *)sctx-&gt;block + index, padding, padlen);</div><div class='del'>-	} else {</div><div class='del'>-		__md5_sparc64_update(sctx, padding, padlen, index);</div><div class='del'>-	}</div><div class='del'>-	__md5_sparc64_update(sctx, (const u8 *)&amp;bits, sizeof(bits), 56);</div><div class='add'>+	struct sparc_md5_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	__le64 block[MD5_BLOCK_WORDS] = {};</div><div class='add'>+	u8 *p = memcpy(block, src, offset);</div><div class='add'>+	__le32 *dst = (__le32 *)out;</div><div class='add'>+	__le64 *pbits;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	src = p;</div><div class='add'>+	p += offset;</div><div class='add'>+	*p++ = 0x80;</div><div class='add'>+	sctx-&gt;byte_count += offset;</div><div class='add'>+	pbits = &amp;block[(MD5_BLOCK_WORDS / (offset &gt; 55 ? 1 : 2)) - 1];</div><div class='add'>+	*pbits = cpu_to_le64(sctx-&gt;byte_count &lt;&lt; 3);</div><div class='add'>+	md5_sparc64_transform(sctx-&gt;hash, src, (pbits - block + 1) / 8);</div><div class='add'>+	memzero_explicit(block, sizeof(block));</div><div class='ctx'> </div><div class='ctx'> 	/* Store state in digest */</div><div class='ctx'> 	for (i = 0; i &lt; MD5_HASH_WORDS; i++)</div><div class='ctx'> 		dst[i] = sctx-&gt;hash[i];</div><div class='ctx'> </div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int md5_sparc64_export(struct shash_desc *desc, void *out)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='add'>+	struct sparc_md5_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		u8 *u8;</div><div class='add'>+		u32 *u32;</div><div class='add'>+		u64 *u64;</div><div class='add'>+	} p = { .u8 = out };</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; MD5_HASH_WORDS; i++)</div><div class='add'>+		put_unaligned(le32_to_cpu(sctx-&gt;hash[i]), p.u32++);</div><div class='add'>+	put_unaligned(sctx-&gt;byte_count, p.u64);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int md5_sparc64_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='del'>-	struct md5_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='add'>+	struct sparc_md5_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		const u8 *u8;</div><div class='add'>+		const u32 *u32;</div><div class='add'>+		const u64 *u64;</div><div class='add'>+	} p = { .u8 = in };</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; MD5_HASH_WORDS; i++)</div><div class='add'>+		sctx-&gt;hash[i] = cpu_to_le32(get_unaligned(p.u32++));</div><div class='add'>+	sctx-&gt;byte_count = get_unaligned(p.u64);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -136,15 +119,16 @@ static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	MD5_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	md5_sparc64_init,</div><div class='ctx'> 	.update		=	md5_sparc64_update,</div><div class='del'>-	.final		=	md5_sparc64_final,</div><div class='add'>+	.finup		=	md5_sparc64_finup,</div><div class='ctx'> 	.export		=	md5_sparc64_export,</div><div class='ctx'> 	.import		=	md5_sparc64_import,</div><div class='del'>-	.descsize	=	sizeof(struct md5_state),</div><div class='del'>-	.statesize	=	sizeof(struct md5_state),</div><div class='add'>+	.descsize	=	sizeof(struct sparc_md5_state),</div><div class='add'>+	.statesize	=	sizeof(struct sparc_md5_state),</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"md5",</div><div class='ctx'> 		.cra_driver_name=	"md5-sparc64",</div><div class='ctx'> 		.cra_priority	=	SPARC_CR_OPCODE_PRIORITY,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	MD5_HMAC_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/sparc/crypto/sha1_asm.S b/arch/sparc/crypto/sha1_asm.S<br/>index 7d8bf354f0e7..00b46bac1b08 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha1_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha1_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha1_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/sha1_asm.S</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> ENTRY(sha1_sparc64_transform)</div><div class='ctx'> 	/* %o0 = digest, %o1 = data, %o2 = rounds */</div><div class='ctx'> 	VISEntryHalf</div><div class='head'>diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c<br/>index 06b7becfcb21..ef19d5023b1b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha1_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha1_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha1_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/sha1_glue.c</a></div><div class='hunk'>@@ -11,124 +11,44 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/elf.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='add'>+#include &lt;asm/pstate.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/pstate.h&gt;</div><div class='del'>-#include &lt;asm/elf.h&gt;</div><div class='del'>-</div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha1_sparc64_transform(u32 *digest, const char *data,</div><div class='del'>-				       unsigned int rounds);</div><div class='del'>-</div><div class='del'>-static void __sha1_sparc64_update(struct sha1_state *sctx, const u8 *data,</div><div class='del'>-				  unsigned int len, unsigned int partial)</div><div class='del'>-{</div><div class='del'>-	unsigned int done = 0;</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	if (partial) {</div><div class='del'>-		done = SHA1_BLOCK_SIZE - partial;</div><div class='del'>-		memcpy(sctx-&gt;buffer + partial, data, done);</div><div class='del'>-		sha1_sparc64_transform(sctx-&gt;state, sctx-&gt;buffer, 1);</div><div class='del'>-	}</div><div class='del'>-	if (len - done &gt;= SHA1_BLOCK_SIZE) {</div><div class='del'>-		const unsigned int rounds = (len - done) / SHA1_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-		sha1_sparc64_transform(sctx-&gt;state, data + done, rounds);</div><div class='del'>-		done += rounds * SHA1_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(sctx-&gt;buffer, data + done, len - done);</div><div class='del'>-}</div><div class='add'>+asmlinkage void sha1_sparc64_transform(struct sha1_state *digest,</div><div class='add'>+				       const u8 *data, int rounds);</div><div class='ctx'> </div><div class='ctx'> static int sha1_sparc64_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			       unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = sctx-&gt;count % SHA1_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Handle the fast case right here */</div><div class='del'>-	if (partial + len &lt; SHA1_BLOCK_SIZE) {</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		memcpy(sctx-&gt;buffer + partial, data, len);</div><div class='del'>-	} else</div><div class='del'>-		__sha1_sparc64_update(sctx, data, len, partial);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sha1_base_do_update_blocks(desc, data, len,</div><div class='add'>+					  sha1_sparc64_transform);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Add padding and return the message digest. */</div><div class='del'>-static int sha1_sparc64_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int i, index, padlen;</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	static const u8 padding[SHA1_BLOCK_SIZE] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 and append length */</div><div class='del'>-	index = sctx-&gt;count % SHA1_BLOCK_SIZE;</div><div class='del'>-	padlen = (index &lt; 56) ? (56 - index) : ((SHA1_BLOCK_SIZE+56) - index);</div><div class='del'>-</div><div class='del'>-	/* We need to fill a whole block for __sha1_sparc64_update() */</div><div class='del'>-	if (padlen &lt;= 56) {</div><div class='del'>-		sctx-&gt;count += padlen;</div><div class='del'>-		memcpy(sctx-&gt;buffer + index, padding, padlen);</div><div class='del'>-	} else {</div><div class='del'>-		__sha1_sparc64_update(sctx, padding, padlen, index);</div><div class='del'>-	}</div><div class='del'>-	__sha1_sparc64_update(sctx, (const u8 *)&amp;bits, sizeof(bits), 56);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 5; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_sparc64_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha1_sparc64_import(struct shash_desc *desc, const void *in)</div><div class='add'>+static int sha1_sparc64_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			      unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	sha1_base_do_finup(desc, src, len, sha1_sparc64_transform);</div><div class='add'>+	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	sha1_sparc64_update,</div><div class='del'>-	.final		=	sha1_sparc64_final,</div><div class='del'>-	.export		=	sha1_sparc64_export,</div><div class='del'>-	.import		=	sha1_sparc64_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='add'>+	.finup		=	sha1_sparc64_finup,</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name=	"sha1-sparc64",</div><div class='ctx'> 		.cra_priority	=	SPARC_CR_OPCODE_PRIORITY,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c<br/>deleted file mode 100644<br/>index 285561a1cde5..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha256_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha256_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,210 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/* Glue code for SHA256 hashing optimized for sparc64 crypto opcodes.</div><div class='del'>- *</div><div class='del'>- * This is based largely upon crypto/sha256_generic.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) Jean-Luc Cooke &lt;jlcooke@certainkey.com&gt;</div><div class='del'>- * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='del'>- * SHA224 Support Copyright 2007 Intel Corporation &lt;jonathan.lynch@intel.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pstate.h&gt;</div><div class='del'>-#include &lt;asm/elf.h&gt;</div><div class='del'>-</div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_sparc64_transform(u32 *digest, const char *data,</div><div class='del'>-					 unsigned int rounds);</div><div class='del'>-</div><div class='del'>-static void __sha256_sparc64_update(struct sha256_state *sctx, const u8 *data,</div><div class='del'>-				    unsigned int len, unsigned int partial)</div><div class='del'>-{</div><div class='del'>-	unsigned int done = 0;</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	if (partial) {</div><div class='del'>-		done = SHA256_BLOCK_SIZE - partial;</div><div class='del'>-		memcpy(sctx-&gt;buf + partial, data, done);</div><div class='del'>-		sha256_sparc64_transform(sctx-&gt;state, sctx-&gt;buf, 1);</div><div class='del'>-	}</div><div class='del'>-	if (len - done &gt;= SHA256_BLOCK_SIZE) {</div><div class='del'>-		const unsigned int rounds = (len - done) / SHA256_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-		sha256_sparc64_transform(sctx-&gt;state, data + done, rounds);</div><div class='del'>-		done += rounds * SHA256_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(sctx-&gt;buf, data + done, len - done);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_sparc64_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-				 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = sctx-&gt;count % SHA256_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Handle the fast case right here */</div><div class='del'>-	if (partial + len &lt; SHA256_BLOCK_SIZE) {</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		memcpy(sctx-&gt;buf + partial, data, len);</div><div class='del'>-	} else</div><div class='del'>-		__sha256_sparc64_update(sctx, data, len, partial);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_sparc64_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int i, index, padlen;</div><div class='del'>-	__be32 *dst = (__be32 *)out;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	static const u8 padding[SHA256_BLOCK_SIZE] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_be64(sctx-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 and append length */</div><div class='del'>-	index = sctx-&gt;count % SHA256_BLOCK_SIZE;</div><div class='del'>-	padlen = (index &lt; 56) ? (56 - index) : ((SHA256_BLOCK_SIZE+56) - index);</div><div class='del'>-</div><div class='del'>-	/* We need to fill a whole block for __sha256_sparc64_update() */</div><div class='del'>-	if (padlen &lt;= 56) {</div><div class='del'>-		sctx-&gt;count += padlen;</div><div class='del'>-		memcpy(sctx-&gt;buf + index, padding, padlen);</div><div class='del'>-	} else {</div><div class='del'>-		__sha256_sparc64_update(sctx, padding, padlen, index);</div><div class='del'>-	}</div><div class='del'>-	__sha256_sparc64_update(sctx, (const u8 *)&amp;bits, sizeof(bits), 56);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		dst[i] = cpu_to_be32(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha224_sparc64_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	u8 D[SHA256_DIGEST_SIZE];</div><div class='del'>-</div><div class='del'>-	sha256_sparc64_final(desc, D);</div><div class='del'>-</div><div class='del'>-	memcpy(hash, D, SHA224_DIGEST_SIZE);</div><div class='del'>-	memzero_explicit(D, SHA256_DIGEST_SIZE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_sparc64_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_sparc64_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha256_alg = {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	sha256_sparc64_update,</div><div class='del'>-	.final		=	sha256_sparc64_final,</div><div class='del'>-	.export		=	sha256_sparc64_export,</div><div class='del'>-	.import		=	sha256_sparc64_import,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name=	"sha256-sparc64",</div><div class='del'>-		.cra_priority	=	SPARC_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha224_alg = {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	sha256_sparc64_update,</div><div class='del'>-	.final		=	sha224_sparc64_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name=	"sha224-sparc64",</div><div class='del'>-		.cra_priority	=	SPARC_CR_OPCODE_PRIORITY,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool __init sparc64_has_sha256_opcode(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long cfr;</div><div class='del'>-</div><div class='del'>-	if (!(sparc64_elf_hwcap &amp; HWCAP_SPARC_CRYPTO))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	__asm__ __volatile__("rd %%asr26, %0" : "=r" (cfr));</div><div class='del'>-	if (!(cfr &amp; CFR_SHA256))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init sha256_sparc64_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (sparc64_has_sha256_opcode()) {</div><div class='del'>-		int ret = crypto_register_shash(&amp;sha224_alg);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret = crypto_register_shash(&amp;sha256_alg);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			crypto_unregister_shash(&amp;sha224_alg);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		pr_info("Using sparc64 sha256 opcode optimized SHA-256/SHA-224 implementation\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	pr_info("sparc64 sha256 opcode not available.\n");</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_sparc64_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;sha224_alg);</div><div class='del'>-	crypto_unregister_shash(&amp;sha256_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha256_sparc64_mod_init);</div><div class='del'>-module_exit(sha256_sparc64_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 opcode accelerated");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-</div><div class='del'>-#include "crop_devid.c"</div><div class='head'>diff --git a/arch/sparc/crypto/sha512_asm.S b/arch/sparc/crypto/sha512_asm.S<br/>index b2f6e6728802..9932b4fe1b59 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha512_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha512_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha512_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/sha512_asm.S</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> ENTRY(sha512_sparc64_transform)</div><div class='ctx'> 	/* %o0 = digest, %o1 = data, %o2 = rounds */</div><div class='ctx'> 	VISEntry</div><div class='head'>diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c<br/>index d66efa4ec59a..47b9277b6877 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha512_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha512_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha512_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/crypto/sha512_glue.c</a></div><div class='hunk'>@@ -10,115 +10,42 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/elf.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='add'>+#include &lt;asm/pstate.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/pstate.h&gt;</div><div class='del'>-#include &lt;asm/elf.h&gt;</div><div class='del'>-</div><div class='del'>-#include "opcodes.h"</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void sha512_sparc64_transform(u64 *digest, const char *data,</div><div class='ctx'> 					 unsigned int rounds);</div><div class='ctx'> </div><div class='del'>-static void __sha512_sparc64_update(struct sha512_state *sctx, const u8 *data,</div><div class='del'>-				    unsigned int len, unsigned int partial)</div><div class='add'>+static void sha512_block(struct sha512_state *sctx, const u8 *src, int blocks)</div><div class='ctx'> {</div><div class='del'>-	unsigned int done = 0;</div><div class='del'>-</div><div class='del'>-	if ((sctx-&gt;count[0] += len) &lt; len)</div><div class='del'>-		sctx-&gt;count[1]++;</div><div class='del'>-	if (partial) {</div><div class='del'>-		done = SHA512_BLOCK_SIZE - partial;</div><div class='del'>-		memcpy(sctx-&gt;buf + partial, data, done);</div><div class='del'>-		sha512_sparc64_transform(sctx-&gt;state, sctx-&gt;buf, 1);</div><div class='del'>-	}</div><div class='del'>-	if (len - done &gt;= SHA512_BLOCK_SIZE) {</div><div class='del'>-		const unsigned int rounds = (len - done) / SHA512_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-		sha512_sparc64_transform(sctx-&gt;state, data + done, rounds);</div><div class='del'>-		done += rounds * SHA512_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(sctx-&gt;buf, data + done, len - done);</div><div class='add'>+	sha512_sparc64_transform(sctx-&gt;state, src, blocks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha512_sparc64_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 				 unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial = sctx-&gt;count[0] % SHA512_BLOCK_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Handle the fast case right here */</div><div class='del'>-	if (partial + len &lt; SHA512_BLOCK_SIZE) {</div><div class='del'>-		if ((sctx-&gt;count[0] += len) &lt; len)</div><div class='del'>-			sctx-&gt;count[1]++;</div><div class='del'>-		memcpy(sctx-&gt;buf + partial, data, len);</div><div class='del'>-	} else</div><div class='del'>-		__sha512_sparc64_update(sctx, data, len, partial);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sha512_base_do_update_blocks(desc, data, len, sha512_block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha512_sparc64_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int sha512_sparc64_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+				unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int i, index, padlen;</div><div class='del'>-	__be64 *dst = (__be64 *)out;</div><div class='del'>-	__be64 bits[2];</div><div class='del'>-	static const u8 padding[SHA512_BLOCK_SIZE] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	/* Save number of bits */</div><div class='del'>-	bits[1] = cpu_to_be64(sctx-&gt;count[0] &lt;&lt; 3);</div><div class='del'>-	bits[0] = cpu_to_be64(sctx-&gt;count[1] &lt;&lt; 3 | sctx-&gt;count[0] &gt;&gt; 61);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 112 mod 128 and append length */</div><div class='del'>-	index = sctx-&gt;count[0] % SHA512_BLOCK_SIZE;</div><div class='del'>-	padlen = (index &lt; 112) ? (112 - index) : ((SHA512_BLOCK_SIZE+112) - index);</div><div class='del'>-</div><div class='del'>-	/* We need to fill a whole block for __sha512_sparc64_update() */</div><div class='del'>-	if (padlen &lt;= 112) {</div><div class='del'>-		if ((sctx-&gt;count[0] += padlen) &lt; padlen)</div><div class='del'>-			sctx-&gt;count[1]++;</div><div class='del'>-		memcpy(sctx-&gt;buf + index, padding, padlen);</div><div class='del'>-	} else {</div><div class='del'>-		__sha512_sparc64_update(sctx, padding, padlen, index);</div><div class='del'>-	}</div><div class='del'>-	__sha512_sparc64_update(sctx, (const u8 *)&amp;bits, sizeof(bits), 112);</div><div class='del'>-</div><div class='del'>-	/* Store state in digest */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		dst[i] = cpu_to_be64(sctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha384_sparc64_final(struct shash_desc *desc, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	u8 D[64];</div><div class='del'>-</div><div class='del'>-	sha512_sparc64_final(desc, D);</div><div class='del'>-</div><div class='del'>-	memcpy(hash, D, 48);</div><div class='del'>-	memzero_explicit(D, 64);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	sha512_base_do_finup(desc, src, len, sha512_block);</div><div class='add'>+	return sha512_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha512 = {</div><div class='ctx'> 	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha512_base_init,</div><div class='ctx'> 	.update		=	sha512_sparc64_update,</div><div class='del'>-	.final		=	sha512_sparc64_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.finup		=	sha512_sparc64_finup,</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha512",</div><div class='ctx'> 		.cra_driver_name=	"sha512-sparc64",</div><div class='hunk'>@@ -132,8 +59,8 @@ static struct shash_alg sha384 = {</div><div class='ctx'> 	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha384_base_init,</div><div class='ctx'> 	.update		=	sha512_sparc64_update,</div><div class='del'>-	.final		=	sha384_sparc64_final,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.finup		=	sha512_sparc64_finup,</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha384",</div><div class='ctx'> 		.cra_driver_name=	"sha384-sparc64",</div><div class='head'>diff --git a/arch/sparc/crypto/opcodes.h b/arch/sparc/include/asm/opcodes.h<br/>index 417b6a10a337..ebfda6eb49b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/opcodes.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/opcodes.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/include/asm/opcodes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/include/asm/opcodes.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef _OPCODES_H</div><div class='del'>-#define _OPCODES_H</div><div class='add'>+#ifndef _SPARC_ASM_OPCODES_H</div><div class='add'>+#define _SPARC_ASM_OPCODES_H</div><div class='ctx'> </div><div class='ctx'> #define SPARC_CR_OPCODE_PRIORITY	300</div><div class='ctx'> </div><div class='hunk'>@@ -97,4 +97,4 @@</div><div class='ctx'> #define MOVXTOD_G7_F62		\</div><div class='ctx'> 	.word	0xbfb02307;</div><div class='ctx'> </div><div class='del'>-#endif /* _OPCODES_H */</div><div class='add'>+#endif /* _SPARC_ASM_OPCODES_H */</div><div class='head'>diff --git a/arch/sparc/include/uapi/asm/socket.h b/arch/sparc/include/uapi/asm/socket.h<br/>index 5b464a568664..adcba7329386 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/include/uapi/asm/socket.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/include/uapi/asm/socket.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/include/uapi/asm/socket.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/include/uapi/asm/socket.h</a></div><div class='hunk'>@@ -143,6 +143,8 @@</div><div class='ctx'> </div><div class='ctx'> #define SO_RCVPRIORITY           0x005b</div><div class='ctx'> </div><div class='add'>+#define SO_PASSRIGHTS            0x005c</div><div class='add'>+</div><div class='ctx'> #if !defined(__KERNEL__)</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/arch/sparc/kernel/Makefile b/arch/sparc/kernel/Makefile<br/>index 58ea4ef9b622..3453f330e363 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/kernel/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/kernel/Makefile</a></div><div class='hunk'>@@ -35,6 +35,7 @@ obj-y                   += process.o</div><div class='ctx'> obj-y                   += signal_$(BITS).o</div><div class='ctx'> obj-y                   += sigutil_$(BITS).o</div><div class='ctx'> obj-$(CONFIG_SPARC32)   += ioport.o</div><div class='add'>+obj-y                   += setup.o</div><div class='ctx'> obj-y                   += setup_$(BITS).o</div><div class='ctx'> obj-y                   += idprom.o</div><div class='ctx'> obj-y                   += sys_sparc_$(BITS).o</div><div class='head'>diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c<br/>index f02a283a8e8f..cae4d33002a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/kernel/perf_event.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/kernel/perf_event.c</a></div><div class='hunk'>@@ -1668,8 +1668,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,</div><div class='ctx'> 		if (!sparc_perf_event_set_period(event, hwc, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			sparc_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	finish_clock = sched_clock();</div><div class='head'>diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c<br/>new file mode 100644<br/>index 000000000000..4975867d9001<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/kernel/setup.c</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;linux/sysctl.h&gt;</div><div class='add'>+</div><div class='add'>+static const struct ctl_table sparc_sysctl_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.procname	= "reboot-cmd",</div><div class='add'>+		.data		= reboot_command,</div><div class='add'>+		.maxlen		= 256,</div><div class='add'>+		.mode		= 0644,</div><div class='add'>+		.proc_handler	= proc_dostring,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.procname	= "stop-a",</div><div class='add'>+		.data		= &amp;stop_a_enabled,</div><div class='add'>+		.maxlen		= sizeof(int),</div><div class='add'>+		.mode		= 0644,</div><div class='add'>+		.proc_handler	= proc_dointvec,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.procname	= "scons-poweroff",</div><div class='add'>+		.data		= &amp;scons_pwroff,</div><div class='add'>+		.maxlen		= sizeof(int),</div><div class='add'>+		.mode		= 0644,</div><div class='add'>+		.proc_handler	= proc_dointvec,</div><div class='add'>+	},</div><div class='add'>+#ifdef CONFIG_SPARC64</div><div class='add'>+	{</div><div class='add'>+		.procname	= "tsb-ratio",</div><div class='add'>+		.data		= &amp;sysctl_tsb_ratio,</div><div class='add'>+		.maxlen		= sizeof(int),</div><div class='add'>+		.mode		= 0644,</div><div class='add'>+		.proc_handler	= proc_dointvec,</div><div class='add'>+	},</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int __init init_sparc_sysctls(void)</div><div class='add'>+{</div><div class='add'>+	register_sysctl_init("kernel", sparc_sysctl_table);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+arch_initcall(init_sparc_sysctls);</div><div class='head'>diff --git a/arch/sparc/lib/Makefile b/arch/sparc/lib/Makefile<br/>index 5724d0f356eb..5cf9781d68b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/lib/Makefile</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> asflags-y := -ansi -DST_DIV0=0x02</div><div class='ctx'> </div><div class='add'>+obj-y                 += crypto/</div><div class='ctx'> lib-$(CONFIG_SPARC32) += ashrdi3.o</div><div class='ctx'> lib-$(CONFIG_SPARC32) += memcpy.o memset.o</div><div class='ctx'> lib-y                 += strlen.o</div><div class='hunk'>@@ -54,4 +55,4 @@ obj-$(CONFIG_SPARC64) += iomap.o</div><div class='ctx'> obj-$(CONFIG_SPARC32) += atomic32.o</div><div class='ctx'> obj-$(CONFIG_SPARC64) += PeeCeeI.o</div><div class='ctx'> obj-$(CONFIG_CRC32_ARCH) += crc32-sparc.o</div><div class='del'>-crc32-sparc-y := crc32_glue.o crc32c_asm.o</div><div class='add'>+crc32-sparc-y := crc32.o crc32c_asm.o</div><div class='head'>diff --git a/arch/sparc/lib/crc32_glue.c b/arch/sparc/lib/crc32.c<br/>index a70752c729cf..40d4720a42a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/lib/crc32_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crc32_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/lib/crc32.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/* Glue code for CRC32C optimized for sparc64 crypto opcodes.</div><div class='add'>+/* CRC32c (Castagnoli), sparc64 crc32c opcode accelerated</div><div class='ctx'>  *</div><div class='ctx'>  * This is based largely upon arch/x86/crypto/crc32c-intel.c</div><div class='ctx'>  *</div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> #include &lt;asm/pstate.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_crc32c_opcode);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32c_opcode);</div><div class='ctx'> </div><div class='ctx'> u32 crc32_le_arch(u32 crc, const u8 *data, size_t len)</div><div class='ctx'> {</div><div class='hunk'>@@ -74,7 +74,7 @@ static int __init crc32_sparc_init(void)</div><div class='ctx'> 	pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc32_sparc_init);</div><div class='add'>+subsys_initcall(crc32_sparc_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc32_sparc_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/sparc/lib/crc32c_asm.S b/arch/sparc/lib/crc32c_asm.S<br/>index ee454fa6aed6..4db873850f44 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/lib/crc32c_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/lib/crc32c_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/crc32c_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/lib/crc32c_asm.S</a></div><div class='hunk'>@@ -1,10 +1,9 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> #include &lt;asm/asi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../crypto/opcodes.h"</div><div class='del'>-</div><div class='ctx'> ENTRY(crc32c_sparc64)</div><div class='ctx'> 	/* %o0=crc32p, %o1=data_ptr, %o2=len */</div><div class='ctx'> 	VISEntryHalf</div><div class='head'>diff --git a/arch/sparc/lib/crypto/Kconfig b/arch/sparc/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..e5c3e4d3dba6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_SHA256_SPARC64</div><div class='add'>+	tristate</div><div class='add'>+	depends on SPARC64</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='add'>+	select CRYPTO_LIB_SHA256_GENERIC</div><div class='head'>diff --git a/arch/sparc/lib/crypto/Makefile b/arch/sparc/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..75ee244ad6f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256_SPARC64) += sha256-sparc64.o</div><div class='add'>+sha256-sparc64-y := sha256.o sha256_asm.o</div><div class='head'>diff --git a/arch/sparc/lib/crypto/sha256.c b/arch/sparc/lib/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..8bdec2db08b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/lib/crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * SHA-256 accelerated using the sparc64 sha256 opcodes</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) Jean-Luc Cooke &lt;jlcooke@certainkey.com&gt;</div><div class='add'>+ * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='add'>+ * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='add'>+ * SHA224 Support Copyright 2007 Intel Corporation &lt;jonathan.lynch@intel.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;asm/elf.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='add'>+#include &lt;asm/pstate.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_sha256_opcodes);</div><div class='add'>+</div><div class='add'>+asmlinkage void sha256_sparc64_transform(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+					 const u8 *data, size_t nblocks);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	if (static_branch_likely(&amp;have_sha256_opcodes))</div><div class='add'>+		sha256_sparc64_transform(state, data, nblocks);</div><div class='add'>+	else</div><div class='add'>+		sha256_blocks_generic(state, data, nblocks);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='add'>+</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;have_sha256_opcodes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init sha256_sparc64_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long cfr;</div><div class='add'>+</div><div class='add'>+	if (!(sparc64_elf_hwcap &amp; HWCAP_SPARC_CRYPTO))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	__asm__ __volatile__("rd %%asr26, %0" : "=r" (cfr));</div><div class='add'>+	if (!(cfr &amp; CFR_SHA256))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	static_branch_enable(&amp;have_sha256_opcodes);</div><div class='add'>+	pr_info("Using sparc64 sha256 opcode optimized SHA-256/SHA-224 implementation\n");</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(sha256_sparc64_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit sha256_sparc64_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(sha256_sparc64_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 accelerated using the sparc64 sha256 opcodes");</div><div class='head'>diff --git a/arch/sparc/crypto/sha256_asm.S b/arch/sparc/lib/crypto/sha256_asm.S<br/>index 0b39ec7d7ca2..ddcdd3daf31e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/sparc/crypto/sha256_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/sparc/crypto/sha256_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/sparc/lib/crypto/sha256_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/sparc/lib/crypto/sha256_asm.S</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;asm/opcodes.h&gt;</div><div class='ctx'> #include &lt;asm/visasm.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "opcodes.h"</div><div class='del'>-</div><div class='ctx'> ENTRY(sha256_sparc64_transform)</div><div class='del'>-	/* %o0 = digest, %o1 = data, %o2 = rounds */</div><div class='add'>+	/* %o0 = state, %o1 = data, %o2 = nblocks */</div><div class='ctx'> 	VISEntryHalf</div><div class='ctx'> 	ld	[%o0 + 0x00], %f0</div><div class='ctx'> 	ld	[%o0 + 0x04], %f1</div><div class='head'>diff --git a/arch/um/Makefile b/arch/um/Makefile<br/>index 1d36a613aad8..9ed792e565c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/um/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/um/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/um/Makefile</a></div><div class='hunk'>@@ -154,5 +154,6 @@ MRPROPER_FILES += $(HOST_DIR)/include/generated</div><div class='ctx'> archclean:</div><div class='ctx'> 	@find . \( -name '*.bb' -o -name '*.bbg' -o -name '*.da' \</div><div class='ctx'> 		-o -name '*.gcov' \) -type f -print | xargs rm -f</div><div class='add'>+	$(Q)$(MAKE) -f $(srctree)/Makefile ARCH=$(HEADER_ARCH) clean</div><div class='ctx'> </div><div class='ctx'> export HEADER_ARCH SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING DEV_NULL_PATH</div><div class='head'>diff --git a/arch/um/include/asm/fpu/api.h b/arch/um/include/asm/fpu/api.h<br/>index 71bfd9ef3938..3abf67c83c40 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/um/include/asm/fpu/api.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/include/asm/fpu/api.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/um/include/asm/fpu/api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/um/include/asm/fpu/api.h</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> #ifndef _ASM_UM_FPU_API_H</div><div class='ctx'> #define _ASM_UM_FPU_API_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='ctx'> /* Copyright (c) 2020 Cambridge Greys Ltd</div><div class='ctx'>  * Copyright (c) 2020 Red Hat Inc.</div><div class='ctx'>  * A set of "dummy" defines to allow the direct inclusion</div><div class='head'>diff --git a/arch/um/include/asm/uaccess.h b/arch/um/include/asm/uaccess.h<br/>index 3a08f9029a3f..1c6e0ae41b0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/um/include/asm/uaccess.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/include/asm/uaccess.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/um/include/asm/uaccess.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/um/include/asm/uaccess.h</a></div><div class='hunk'>@@ -55,6 +55,7 @@ do {									\</div><div class='ctx'> 		goto err_label;						\</div><div class='ctx'> 	}								\</div><div class='ctx'> 	*((type *)dst) = get_unaligned((type *)(src));			\</div><div class='add'>+	barrier();							\</div><div class='ctx'> 	current-&gt;thread.segv_continue = NULL;				\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='hunk'>@@ -66,6 +67,7 @@ do {									\</div><div class='ctx'> 	if (__faulted)							\</div><div class='ctx'> 		goto err_label;						\</div><div class='ctx'> 	put_unaligned(*((type *)src), (type *)(dst));			\</div><div class='add'>+	barrier();							\</div><div class='ctx'> 	current-&gt;thread.segv_continue = NULL;				\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/um/kernel/trap.c b/arch/um/kernel/trap.c<br/>index ce073150dc20..ef2272e92a43 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/um/kernel/trap.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/kernel/trap.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/um/kernel/trap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/um/kernel/trap.c</a></div><div class='hunk'>@@ -225,20 +225,20 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user,</div><div class='ctx'> 			panic("Failed to sync kernel TLBs: %d", err);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-	else if (current-&gt;mm == NULL) {</div><div class='del'>-		if (current-&gt;pagefault_disabled) {</div><div class='del'>-			if (!mc) {</div><div class='del'>-				show_regs(container_of(regs, struct pt_regs, regs));</div><div class='del'>-				panic("Segfault with pagefaults disabled but no mcontext");</div><div class='del'>-			}</div><div class='del'>-			if (!current-&gt;thread.segv_continue) {</div><div class='del'>-				show_regs(container_of(regs, struct pt_regs, regs));</div><div class='del'>-				panic("Segfault without recovery target");</div><div class='del'>-			}</div><div class='del'>-			mc_set_rip(mc, current-&gt;thread.segv_continue);</div><div class='del'>-			current-&gt;thread.segv_continue = NULL;</div><div class='del'>-			goto out;</div><div class='add'>+	else if (current-&gt;pagefault_disabled) {</div><div class='add'>+		if (!mc) {</div><div class='add'>+			show_regs(container_of(regs, struct pt_regs, regs));</div><div class='add'>+			panic("Segfault with pagefaults disabled but no mcontext");</div><div class='ctx'> 		}</div><div class='add'>+		if (!current-&gt;thread.segv_continue) {</div><div class='add'>+			show_regs(container_of(regs, struct pt_regs, regs));</div><div class='add'>+			panic("Segfault without recovery target");</div><div class='add'>+		}</div><div class='add'>+		mc_set_rip(mc, current-&gt;thread.segv_continue);</div><div class='add'>+		current-&gt;thread.segv_continue = NULL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	else if (current-&gt;mm == NULL) {</div><div class='ctx'> 		show_regs(container_of(regs, struct pt_regs, regs));</div><div class='ctx'> 		panic("Segfault with no mm");</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c<br/>index d4b3b6742ec8..2f5ee045bc7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/um/kernel/um_arch.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/um/kernel/um_arch.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/um/kernel/um_arch.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/um/kernel/um_arch.c</a></div><div class='hunk'>@@ -477,7 +477,7 @@ void *text_poke_copy(void *addr, const void *opcode, size_t len)</div><div class='ctx'> 	return text_poke(addr, opcode, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void text_poke_sync(void)</div><div class='add'>+void smp_text_poke_sync_each_cpu(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig<br/>index 4b9f378e05f6..ae1654280c40 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/Kconfig</a></div><div class='hunk'>@@ -38,6 +38,7 @@ config X86_64</div><div class='ctx'> 	select ARCH_HAS_ELFCORE_COMPAT</div><div class='ctx'> 	select ZONE_DMA32</div><div class='ctx'> 	select EXECMEM if DYNAMIC_FTRACE</div><div class='add'>+	select ACPI_MRRM if ACPI</div><div class='ctx'> </div><div class='ctx'> config FORCE_DYNAMIC_FTRACE</div><div class='ctx'> 	def_bool y</div><div class='hunk'>@@ -153,6 +154,7 @@ config X86</div><div class='ctx'> 	select ARCH_WANT_HUGETLB_VMEMMAP_PREINIT if X86_64</div><div class='ctx'> 	select ARCH_WANTS_THP_SWAP		if X86_64</div><div class='ctx'> 	select ARCH_HAS_PARANOID_L1D_FLUSH</div><div class='add'>+	select ARCH_WANT_IRQS_OFF_ACTIVATE_MM</div><div class='ctx'> 	select BUILDTIME_TABLE_SORT</div><div class='ctx'> 	select CLKEVT_I8253</div><div class='ctx'> 	select CLOCKSOURCE_WATCHDOG</div><div class='hunk'>@@ -426,8 +428,7 @@ config DYNAMIC_PHYSICAL_MASK</div><div class='ctx'> </div><div class='ctx'> config PGTABLE_LEVELS</div><div class='ctx'> 	int</div><div class='del'>-	default 5 if X86_5LEVEL</div><div class='del'>-	default 4 if X86_64</div><div class='add'>+	default 5 if X86_64</div><div class='ctx'> 	default 3 if X86_PAE</div><div class='ctx'> 	default 2</div><div class='ctx'> </div><div class='hunk'>@@ -507,8 +508,9 @@ config X86_MPPARSE</div><div class='ctx'> config X86_CPU_RESCTRL</div><div class='ctx'> 	bool "x86 CPU resource control support"</div><div class='ctx'> 	depends on X86 &amp;&amp; (CPU_SUP_INTEL || CPU_SUP_AMD)</div><div class='del'>-	select KERNFS</div><div class='del'>-	select PROC_CPU_RESCTRL		if PROC_FS</div><div class='add'>+	depends on MISC_FILESYSTEMS</div><div class='add'>+	select ARCH_HAS_CPU_RESCTRL</div><div class='add'>+	select RESCTRL_FS</div><div class='ctx'> 	select RESCTRL_FS_PSEUDO_LOCK</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable x86 CPU resource control support.</div><div class='hunk'>@@ -526,12 +528,6 @@ config X86_CPU_RESCTRL</div><div class='ctx'> </div><div class='ctx'> 	  Say N if unsure.</div><div class='ctx'> </div><div class='del'>-config RESCTRL_FS_PSEUDO_LOCK</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  Software mechanism to pin data in a cache portion using</div><div class='del'>-	  micro-architecture specific knowledge.</div><div class='del'>-</div><div class='ctx'> config X86_FRED</div><div class='ctx'> 	bool "Flexible Return and Event Delivery"</div><div class='ctx'> 	depends on X86_64</div><div class='hunk'>@@ -799,6 +795,7 @@ config PARAVIRT</div><div class='ctx'> </div><div class='ctx'> config PARAVIRT_XXL</div><div class='ctx'> 	bool</div><div class='add'>+	depends on X86_64</div><div class='ctx'> </div><div class='ctx'> config PARAVIRT_DEBUG</div><div class='ctx'> 	bool "paravirt-ops debugging"</div><div class='hunk'>@@ -1463,27 +1460,6 @@ config X86_PAE</div><div class='ctx'> 	  has the cost of more pagetable lookup overhead, and also</div><div class='ctx'> 	  consumes more pagetable space per process.</div><div class='ctx'> </div><div class='del'>-config X86_5LEVEL</div><div class='del'>-	bool "Enable 5-level page tables support"</div><div class='del'>-	default y</div><div class='del'>-	select DYNAMIC_MEMORY_LAYOUT</div><div class='del'>-	select SPARSEMEM_VMEMMAP</div><div class='del'>-	depends on X86_64</div><div class='del'>-	help</div><div class='del'>-	  5-level paging enables access to larger address space:</div><div class='del'>-	  up to 128 PiB of virtual address space and 4 PiB of</div><div class='del'>-	  physical address space.</div><div class='del'>-</div><div class='del'>-	  It will be supported by future Intel CPUs.</div><div class='del'>-</div><div class='del'>-	  A kernel with the option enabled can be booted on machines that</div><div class='del'>-	  support 4- or 5-level paging.</div><div class='del'>-</div><div class='del'>-	  See Documentation/arch/x86/x86_64/5level-paging.rst for more</div><div class='del'>-	  information.</div><div class='del'>-</div><div class='del'>-	  Say N if unsure.</div><div class='del'>-</div><div class='ctx'> config X86_DIRECT_GBPAGES</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on X86_64</div><div class='hunk'>@@ -1579,6 +1555,7 @@ config ARCH_SPARSEMEM_ENABLE</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	select SPARSEMEM_STATIC if X86_32</div><div class='ctx'> 	select SPARSEMEM_VMEMMAP_ENABLE if X86_64</div><div class='add'>+	select SPARSEMEM_VMEMMAP if X86_64</div><div class='ctx'> </div><div class='ctx'> config ARCH_SPARSEMEM_DEFAULT</div><div class='ctx'> 	def_bool X86_64 || (NUMA &amp;&amp; X86_32)</div><div class='hunk'>@@ -1881,8 +1858,7 @@ endchoice</div><div class='ctx'> config X86_SGX</div><div class='ctx'> 	bool "Software Guard eXtensions (SGX)"</div><div class='ctx'> 	depends on X86_64 &amp;&amp; CPU_SUP_INTEL &amp;&amp; X86_X2APIC</div><div class='del'>-	depends on CRYPTO=y</div><div class='del'>-	depends on CRYPTO_SHA256=y</div><div class='add'>+	select CRYPTO_LIB_SHA256</div><div class='ctx'> 	select MMU_NOTIFIER</div><div class='ctx'> 	select NUMA_KEEP_MEMINFO if NUMA</div><div class='ctx'> 	select XARRAY_MULTI</div><div class='hunk'>@@ -2167,17 +2143,10 @@ config PHYSICAL_ALIGN</div><div class='ctx'> </div><div class='ctx'> 	  Don't change this unless you know what you are doing.</div><div class='ctx'> </div><div class='del'>-config DYNAMIC_MEMORY_LAYOUT</div><div class='del'>-	bool</div><div class='del'>-	help</div><div class='del'>-	  This option makes base addresses of vmalloc and vmemmap as well as</div><div class='del'>-	  __PAGE_OFFSET movable during boot.</div><div class='del'>-</div><div class='ctx'> config RANDOMIZE_MEMORY</div><div class='ctx'> 	bool "Randomize the kernel memory sections"</div><div class='ctx'> 	depends on X86_64</div><div class='ctx'> 	depends on RANDOMIZE_BASE</div><div class='del'>-	select DYNAMIC_MEMORY_LAYOUT</div><div class='ctx'> 	default RANDOMIZE_BASE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Randomizes the base virtual address of kernel memory sections</div><div class='hunk'>@@ -2368,6 +2337,7 @@ config STRICT_SIGALTSTACK_SIZE</div><div class='ctx'> config CFI_AUTO_DEFAULT</div><div class='ctx'> 	bool "Attempt to use FineIBT by default at boot time"</div><div class='ctx'> 	depends on FINEIBT</div><div class='add'>+	depends on !RUST || RUSTC_VERSION &gt;= 108800</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  Attempt to use FineIBT by default at boot time. If enabled,</div><div class='hunk'>@@ -2710,6 +2680,18 @@ config MITIGATION_SSB</div><div class='ctx'> 	  of speculative execution in a similar way to the Meltdown and Spectre</div><div class='ctx'> 	  security vulnerabilities.</div><div class='ctx'> </div><div class='add'>+config MITIGATION_ITS</div><div class='add'>+	bool "Enable Indirect Target Selection mitigation"</div><div class='add'>+	depends on CPU_SUP_INTEL &amp;&amp; X86_64</div><div class='add'>+	depends on MITIGATION_RETPOLINE &amp;&amp; MITIGATION_RETHUNK</div><div class='add'>+	select EXECMEM</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Enable Indirect Target Selection (ITS) mitigation. ITS is a bug in</div><div class='add'>+	  BPU on some Intel CPUs that may allow Spectre V2 style attacks. If</div><div class='add'>+	  disabled, mitigation cannot be enabled via cmdline.</div><div class='add'>+	  See &lt;file:Documentation/admin-guide/hw-vuln/indirect-target-selection.rst&gt;</div><div class='add'>+</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> config ARCH_HAS_ADD_PAGES</div><div class='head'>diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler<br/>index 6d20a6ce0507..c827f694fb72 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.assembler?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig.assembler</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.assembler?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/Kconfig.assembler</a></div><div class='hunk'>@@ -6,20 +6,6 @@ config AS_AVX512</div><div class='ctx'> 	help</div><div class='ctx'> 	  Supported by binutils &gt;= 2.25 and LLVM integrated assembler</div><div class='ctx'> </div><div class='del'>-config AS_SHA1_NI</div><div class='del'>-	def_bool $(as-instr,sha1msg1 %xmm0$(comma)%xmm1)</div><div class='del'>-	help</div><div class='del'>-	  Supported by binutils &gt;= 2.24 and LLVM integrated assembler</div><div class='del'>-</div><div class='del'>-config AS_SHA256_NI</div><div class='del'>-	def_bool $(as-instr,sha256msg1 %xmm0$(comma)%xmm1)</div><div class='del'>-	help</div><div class='del'>-	  Supported by binutils &gt;= 2.24 and LLVM integrated assembler</div><div class='del'>-config AS_TPAUSE</div><div class='del'>-	def_bool $(as-instr,tpause %ecx)</div><div class='del'>-	help</div><div class='del'>-	  Supported by binutils &gt;= 2.31.1 and LLVM integrated assembler &gt;= V7</div><div class='del'>-</div><div class='ctx'> config AS_GFNI</div><div class='ctx'> 	def_bool $(as-instr,vgf2p8mulb %xmm0$(comma)%xmm1$(comma)%xmm2)</div><div class='ctx'> 	help</div><div class='head'>diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu<br/>index 753b8763abae..f928cf6e3252 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.cpu?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig.cpu</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.cpu?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/Kconfig.cpu</a></div><div class='hunk'>@@ -245,6 +245,30 @@ config MATOM</div><div class='ctx'> </div><div class='ctx'> endchoice</div><div class='ctx'> </div><div class='add'>+config CC_HAS_MARCH_NATIVE</div><div class='add'>+	# This flag might not be available in cross-compilers:</div><div class='add'>+	def_bool $(cc-option, -march=native)</div><div class='add'>+	# LLVM 18 has an easily triggered internal compiler error in core</div><div class='add'>+	# networking code with '-march=native' on certain systems:</div><div class='add'>+	# https://github.com/llvm/llvm-project/issues/72026</div><div class='add'>+	# LLVM 19 introduces an optimization that resolves some high stack</div><div class='add'>+	# usage warnings that only appear wth '-march=native'.</div><div class='add'>+	depends on CC_IS_GCC || CLANG_VERSION &gt;= 190100</div><div class='add'>+</div><div class='add'>+config X86_NATIVE_CPU</div><div class='add'>+	bool "Build and optimize for local/native CPU"</div><div class='add'>+	depends on X86_64</div><div class='add'>+	depends on CC_HAS_MARCH_NATIVE</div><div class='add'>+	help</div><div class='add'>+	  Optimize for the current CPU used to compile the kernel.</div><div class='add'>+	  Use this option if you intend to build the kernel for your</div><div class='add'>+	  local machine.</div><div class='add'>+</div><div class='add'>+	  Note that such a kernel might not work optimally on a</div><div class='add'>+	  different x86 machine.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> config X86_GENERIC</div><div class='ctx'> 	bool "Generic x86 support"</div><div class='ctx'> 	depends on X86_32</div><div class='head'>diff --git a/arch/x86/Kconfig.cpufeatures b/arch/x86/Kconfig.cpufeatures<br/>index e12d5b7e39a2..250c10627ab3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.cpufeatures?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Kconfig.cpufeatures</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/Kconfig.cpufeatures?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/Kconfig.cpufeatures</a></div><div class='hunk'>@@ -132,10 +132,6 @@ config X86_DISABLED_FEATURE_OSPKE</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on !X86_INTEL_MEMORY_PROTECTION_KEYS</div><div class='ctx'> </div><div class='del'>-config X86_DISABLED_FEATURE_LA57</div><div class='del'>-	def_bool y</div><div class='del'>-	depends on !X86_5LEVEL</div><div class='del'>-</div><div class='ctx'> config X86_DISABLED_FEATURE_PTI</div><div class='ctx'> 	def_bool y</div><div class='ctx'> 	depends on !MITIGATION_PAGE_TABLE_ISOLATION</div><div class='head'>diff --git a/arch/x86/Makefile b/arch/x86/Makefile<br/>index 594723005d95..1913d342969b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/Makefile</a></div><div class='hunk'>@@ -173,8 +173,13 @@ else</div><div class='ctx'> 	# Use -mskip-rax-setup if supported.</div><div class='ctx'> 	KBUILD_CFLAGS += $(call cc-option,-mskip-rax-setup)</div><div class='ctx'> </div><div class='add'>+ifdef CONFIG_X86_NATIVE_CPU</div><div class='add'>+        KBUILD_CFLAGS += -march=native</div><div class='add'>+        KBUILD_RUSTFLAGS += -Ctarget-cpu=native</div><div class='add'>+else</div><div class='ctx'>         KBUILD_CFLAGS += -march=x86-64 -mtune=generic</div><div class='ctx'>         KBUILD_RUSTFLAGS += -Ctarget-cpu=x86-64 -Ztune-cpu=generic</div><div class='add'>+endif</div><div class='ctx'> </div><div class='ctx'>         KBUILD_CFLAGS += -mno-red-zone</div><div class='ctx'>         KBUILD_CFLAGS += -mcmodel=kernel</div><div class='hunk'>@@ -281,6 +286,7 @@ archprepare: $(cpufeaturemasks.hdr)</div><div class='ctx'> ###</div><div class='ctx'> # Kernel objects</div><div class='ctx'> </div><div class='add'>+core-y  += arch/x86/boot/startup/</div><div class='ctx'> libs-y  += arch/x86/lib/</div><div class='ctx'> </div><div class='ctx'> # drivers-y are linked after core-y</div><div class='head'>diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile<br/>index 81f55da81967..640fcac3af74 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/Makefile</a></div><div class='hunk'>@@ -59,7 +59,7 @@ KBUILD_CFLAGS	+= $(CONFIG_CC_IMPLICIT_FALLTHROUGH)</div><div class='ctx'> $(obj)/bzImage: asflags-y  := $(SVGA_MODE)</div><div class='ctx'> </div><div class='ctx'> quiet_cmd_image = BUILD   $@</div><div class='del'>-      cmd_image = cp $&lt; $@; truncate -s %4K $@; cat $(obj)/vmlinux.bin &gt;&gt;$@</div><div class='add'>+      cmd_image = (dd if=$&lt; bs=4k conv=sync status=none; cat $(filter-out $&lt;,$(real-prereqs))) &gt;$@</div><div class='ctx'> </div><div class='ctx'> $(obj)/bzImage: $(obj)/setup.bin $(obj)/vmlinux.bin FORCE</div><div class='ctx'> 	$(call if_changed,image)</div><div class='head'>diff --git a/arch/x86/boot/bioscall.S b/arch/x86/boot/bioscall.S<br/>index aa9b96457584..cf4a6155714e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/bioscall.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/bioscall.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/bioscall.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/bioscall.S</a></div><div class='hunk'>@@ -32,7 +32,7 @@ intcall:</div><div class='ctx'> 	movw	%dx, %si</div><div class='ctx'> 	movw	%sp, %di</div><div class='ctx'> 	movw	$11, %cx</div><div class='del'>-	rep; movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> </div><div class='ctx'> 	/* Pop full state from the stack */</div><div class='ctx'> 	popal</div><div class='hunk'>@@ -67,7 +67,7 @@ intcall:</div><div class='ctx'> 	jz	4f</div><div class='ctx'> 	movw	%sp, %si</div><div class='ctx'> 	movw	$11, %cx</div><div class='del'>-	rep; movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> 4:	addw	$44, %sp</div><div class='ctx'> </div><div class='ctx'> 	/* Restore state and return */</div><div class='head'>diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h<br/>index 38f17a1e1e36..60580836daf7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/boot.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/boot.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/boot.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/boot.h</a></div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> extern struct setup_header hdr;</div><div class='ctx'> extern struct boot_params boot_params;</div><div class='ctx'> </div><div class='del'>-#define cpu_relax()	asm volatile("rep; nop")</div><div class='add'>+#define cpu_relax()	asm volatile("pause")</div><div class='ctx'> </div><div class='ctx'> static inline void io_delay(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -155,14 +155,14 @@ static inline void wrgs32(u32 v, addr_t addr)</div><div class='ctx'> static inline bool memcmp_fs(const void *s1, addr_t s2, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	bool diff;</div><div class='del'>-	asm volatile("fs; repe; cmpsb" CC_SET(nz)</div><div class='add'>+	asm volatile("fs repe cmpsb" CC_SET(nz)</div><div class='ctx'> 		     : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len));</div><div class='ctx'> 	return diff;</div><div class='ctx'> }</div><div class='ctx'> static inline bool memcmp_gs(const void *s1, addr_t s2, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	bool diff;</div><div class='del'>-	asm volatile("gs; repe; cmpsb" CC_SET(nz)</div><div class='add'>+	asm volatile("gs repe cmpsb" CC_SET(nz)</div><div class='ctx'> 		     : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len));</div><div class='ctx'> 	return diff;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile<br/>index fdbce022db55..f4f7b22d8113 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/Makefile</a></div><div class='hunk'>@@ -44,10 +44,10 @@ KBUILD_CFLAGS += -D__DISABLE_EXPORTS</div><div class='ctx'> KBUILD_CFLAGS += $(call cc-option,-Wa$(comma)-mrelax-relocations=no)</div><div class='ctx'> KBUILD_CFLAGS += -include $(srctree)/include/linux/hidden.h</div><div class='ctx'> </div><div class='del'>-# sev.c indirectly includes inat-table.h which is generated during</div><div class='add'>+# sev-decode-insn.c indirectly includes inat-table.c which is generated during</div><div class='ctx'> # compilation and stored in $(objtree). Add the directory to the includes so</div><div class='ctx'> # that the compiler finds it even with out-of-tree builds (make O=/some/path).</div><div class='del'>-CFLAGS_sev.o += -I$(objtree)/arch/x86/lib/</div><div class='add'>+CFLAGS_sev-handle-vc.o += -I$(objtree)/arch/x86/lib/</div><div class='ctx'> </div><div class='ctx'> KBUILD_AFLAGS  := $(KBUILD_CFLAGS) -D__ASSEMBLY__</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +73,7 @@ LDFLAGS_vmlinux += -T</div><div class='ctx'> hostprogs	:= mkpiggy</div><div class='ctx'> HOST_EXTRACFLAGS += -I$(srctree)/tools/include</div><div class='ctx'> </div><div class='del'>-sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|__start_rodata\|__bss_start\|_end\)$$/\#define VO_\2 _AC(0x\1,UL)/p'</div><div class='add'>+sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABbCDGRSTtVW] \(_text\|__start_rodata\|__bss_start\|_end\)$$/\#define VO_\2 _AC(0x\1,UL)/p'</div><div class='ctx'> </div><div class='ctx'> quiet_cmd_voffset = VOFFSET $@</div><div class='ctx'>       cmd_voffset = $(NM) $&lt; | sed -n $(sed-voffset) &gt; $@</div><div class='hunk'>@@ -96,8 +96,7 @@ ifdef CONFIG_X86_64</div><div class='ctx'> 	vmlinux-objs-y += $(obj)/idt_64.o $(obj)/idt_handlers_64.o</div><div class='ctx'> 	vmlinux-objs-$(CONFIG_AMD_MEM_ENCRYPT) += $(obj)/mem_encrypt.o</div><div class='ctx'> 	vmlinux-objs-y += $(obj)/pgtable_64.o</div><div class='del'>-	vmlinux-objs-$(CONFIG_AMD_MEM_ENCRYPT) += $(obj)/sev.o</div><div class='del'>-	vmlinux-objs-y += $(obj)/la57toggle.o</div><div class='add'>+	vmlinux-objs-$(CONFIG_AMD_MEM_ENCRYPT) += $(obj)/sev.o $(obj)/sev-handle-vc.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> vmlinux-objs-$(CONFIG_ACPI) += $(obj)/acpi.o</div><div class='hunk'>@@ -106,6 +105,7 @@ vmlinux-objs-$(CONFIG_UNACCEPTED_MEMORY) += $(obj)/mem.o</div><div class='ctx'> </div><div class='ctx'> vmlinux-objs-$(CONFIG_EFI) += $(obj)/efi.o</div><div class='ctx'> vmlinux-libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a</div><div class='add'>+vmlinux-libs-$(CONFIG_X86_64)	+= $(objtree)/arch/x86/boot/startup/lib.a</div><div class='ctx'> </div><div class='ctx'> $(obj)/vmlinux: $(vmlinux-objs-y) $(vmlinux-libs-y) FORCE</div><div class='ctx'> 	$(call if_changed,ld)</div><div class='head'>diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S<br/>index eafd4f185e77..d9dab940ff62 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/head_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/head_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/head_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/head_64.S</a></div><div class='hunk'>@@ -35,7 +35,6 @@</div><div class='ctx'> #include &lt;asm/bootparam.h&gt;</div><div class='ctx'> #include &lt;asm/desc_defs.h&gt;</div><div class='ctx'> #include &lt;asm/trapnr.h&gt;</div><div class='del'>-#include "pgtable.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Fix alignment at 16 bytes. Following CONFIG_FUNCTION_ALIGNMENT will result</div><div class='head'>diff --git a/arch/x86/boot/compressed/mem.c b/arch/x86/boot/compressed/mem.c<br/>index dbba332e4a12..0e9f84ab4bdc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/mem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/mem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/mem.c</a></div><div class='hunk'>@@ -38,7 +38,7 @@ void arch_accept_memory(phys_addr_t start, phys_addr_t end)</div><div class='ctx'> 	if (early_is_tdx_guest()) {</div><div class='ctx'> 		if (!tdx_accept_memory(start, end))</div><div class='ctx'> 			panic("TDX: Failed to accept memory\n");</div><div class='del'>-	} else if (sev_snp_enabled()) {</div><div class='add'>+	} else if (early_is_sevsnp_guest()) {</div><div class='ctx'> 		snp_accept_memory(start, end);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		error("Cannot accept memory: unknown platform\n");</div><div class='head'>diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c<br/>index 1cdcd4aaf395..94b5991da001 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/misc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/misc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/misc.c</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "misc.h"</div><div class='ctx'> #include "error.h"</div><div class='del'>-#include "pgtable.h"</div><div class='ctx'> #include "../string.h"</div><div class='ctx'> #include "../voffset.h"</div><div class='ctx'> #include &lt;asm/bootparam_utils.h&gt;</div><div class='head'>diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h<br/>index dd8d1a85f671..db1048621ea2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/misc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/misc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/misc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/misc.h</a></div><div class='hunk'>@@ -136,6 +136,9 @@ static inline void console_init(void)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AMD_MEM_ENCRYPT</div><div class='add'>+struct es_em_ctxt;</div><div class='add'>+struct insn;</div><div class='add'>+</div><div class='ctx'> void sev_enable(struct boot_params *bp);</div><div class='ctx'> void snp_check_features(void);</div><div class='ctx'> void sev_es_shutdown_ghcb(void);</div><div class='hunk'>@@ -143,6 +146,11 @@ extern bool sev_es_check_ghcb_fault(unsigned long address);</div><div class='ctx'> void snp_set_page_private(unsigned long paddr);</div><div class='ctx'> void snp_set_page_shared(unsigned long paddr);</div><div class='ctx'> void sev_prep_identity_maps(unsigned long top_level_pgt);</div><div class='add'>+</div><div class='add'>+enum es_result vc_decode_insn(struct es_em_ctxt *ctxt);</div><div class='add'>+bool insn_has_rep_prefix(struct insn *insn);</div><div class='add'>+void sev_insn_decode_init(void);</div><div class='add'>+bool early_setup_ghcb(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void sev_enable(struct boot_params *bp)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/boot/compressed/pgtable.h b/arch/x86/boot/compressed/pgtable.h<br/>deleted file mode 100644<br/>index 6d595abe06b3..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/pgtable.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/pgtable.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-#ifndef BOOT_COMPRESSED_PAGETABLE_H</div><div class='del'>-#define BOOT_COMPRESSED_PAGETABLE_H</div><div class='del'>-</div><div class='del'>-#define TRAMPOLINE_32BIT_SIZE		(2 * PAGE_SIZE)</div><div class='del'>-</div><div class='del'>-#define TRAMPOLINE_32BIT_CODE_OFFSET	PAGE_SIZE</div><div class='del'>-#define TRAMPOLINE_32BIT_CODE_SIZE	0xA0</div><div class='del'>-</div><div class='del'>-#ifndef __ASSEMBLER__</div><div class='del'>-</div><div class='del'>-extern unsigned long *trampoline_32bit;</div><div class='del'>-</div><div class='del'>-extern void trampoline_32bit_src(void *trampoline, bool enable_5lvl);</div><div class='del'>-</div><div class='del'>-extern const u16 trampoline_ljmp_imm_offset;</div><div class='del'>-</div><div class='del'>-#endif /* __ASSEMBLER__ */</div><div class='del'>-#endif /* BOOT_COMPRESSED_PAGETABLE_H */</div><div class='head'>diff --git a/arch/x86/boot/compressed/pgtable_64.c b/arch/x86/boot/compressed/pgtable_64.c<br/>index d8c5de40669d..bdd26050dff7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/pgtable_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/pgtable_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/pgtable_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/pgtable_64.c</a></div><div class='hunk'>@@ -4,19 +4,16 @@</div><div class='ctx'> #include &lt;asm/bootparam_utils.h&gt;</div><div class='ctx'> #include &lt;asm/e820/types.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='del'>-#include "pgtable.h"</div><div class='ctx'> #include "../string.h"</div><div class='ctx'> #include "efi.h"</div><div class='ctx'> </div><div class='ctx'> #define BIOS_START_MIN		0x20000U	/* 128K, less than this is insane */</div><div class='ctx'> #define BIOS_START_MAX		0x9f000U	/* 640K, absolute maximum */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='ctx'> /* __pgtable_l5_enabled needs to be in .data to avoid being cleared along with .bss */</div><div class='ctx'> unsigned int __section(".data") __pgtable_l5_enabled;</div><div class='ctx'> unsigned int __section(".data") pgdir_shift = 39;</div><div class='ctx'> unsigned int __section(".data") ptrs_per_p4d = 1;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /* Buffer to preserve trampoline memory */</div><div class='ctx'> static char trampoline_save[TRAMPOLINE_32BIT_SIZE];</div><div class='hunk'>@@ -115,18 +112,13 @@ asmlinkage void configure_5level_paging(struct boot_params *bp, void *pgtable)</div><div class='ctx'> 	 * Check if LA57 is desired and supported.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * There are several parts to the check:</div><div class='del'>-	 *   - if the kernel supports 5-level paging: CONFIG_X86_5LEVEL=y</div><div class='ctx'> 	 *   - if user asked to disable 5-level paging: no5lvl in cmdline</div><div class='ctx'> 	 *   - if the machine supports 5-level paging:</div><div class='ctx'> 	 *     + CPUID leaf 7 is supported</div><div class='ctx'> 	 *     + the leaf has the feature bit set</div><div class='del'>-	 *</div><div class='del'>-	 * That's substitute for boot_cpu_has() in early boot code.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_X86_5LEVEL) &amp;&amp;</div><div class='del'>-			!cmdline_find_option_bool("no5lvl") &amp;&amp;</div><div class='del'>-			native_cpuid_eax(0) &gt;= 7 &amp;&amp;</div><div class='del'>-			(native_cpuid_ecx(7) &amp; (1 &lt;&lt; (X86_FEATURE_LA57 &amp; 31)))) {</div><div class='add'>+	if (!cmdline_find_option_bool("no5lvl") &amp;&amp;</div><div class='add'>+	    native_cpuid_eax(0) &gt;= 7 &amp;&amp; (native_cpuid_ecx(7) &amp; BIT(16))) {</div><div class='ctx'> 		l5_required = true;</div><div class='ctx'> </div><div class='ctx'> 		/* Initialize variables for 5-level paging */</div><div class='head'>diff --git a/arch/x86/boot/compressed/sev-handle-vc.c b/arch/x86/boot/compressed/sev-handle-vc.c<br/>new file mode 100644<br/>index 000000000000..89dd02de2a0f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/sev-handle-vc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/sev-handle-vc.c</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include "misc.h"</div><div class='add'>+#include "sev.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;asm/insn.h&gt;</div><div class='add'>+#include &lt;asm/pgtable_types.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+#include &lt;asm/sev.h&gt;</div><div class='add'>+#include &lt;asm/trapnr.h&gt;</div><div class='add'>+#include &lt;asm/trap_pf.h&gt;</div><div class='add'>+#include &lt;asm/fpu/xcr.h&gt;</div><div class='add'>+</div><div class='add'>+#define __BOOT_COMPRESSED</div><div class='add'>+</div><div class='add'>+/* Basic instruction decoding support needed */</div><div class='add'>+#include "../../lib/inat.c"</div><div class='add'>+#include "../../lib/insn.c"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Copy a version of this function here - insn-eval.c can't be used in</div><div class='add'>+ * pre-decompression code.</div><div class='add'>+ */</div><div class='add'>+bool insn_has_rep_prefix(struct insn *insn)</div><div class='add'>+{</div><div class='add'>+	insn_byte_t p;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	insn_get_prefixes(insn);</div><div class='add'>+</div><div class='add'>+	for_each_insn_prefix(insn, i, p) {</div><div class='add'>+		if (p == 0xf2 || p == 0xf3)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	char buffer[MAX_INSN_SIZE];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memcpy(buffer, (unsigned char *)ctxt-&gt;regs-&gt;ip, MAX_INSN_SIZE);</div><div class='add'>+</div><div class='add'>+	ret = insn_decode(&amp;ctxt-&gt;insn, buffer, MAX_INSN_SIZE, INSN_MODE_64);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+extern void sev_insn_decode_init(void) __alias(inat_init_tables);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Only a dummy for insn_get_seg_base() - Early boot-code is 64bit only and</div><div class='add'>+ * doesn't use segments.</div><div class='add'>+ */</div><div class='add'>+static unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)</div><div class='add'>+{</div><div class='add'>+	return 0UL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,</div><div class='add'>+				   void *dst, char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	memcpy(dst, buf, size);</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,</div><div class='add'>+				  void *src, char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	memcpy(buf, src, size);</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_ioio_check(struct es_em_ctxt *ctxt, u16 port, size_t size)</div><div class='add'>+{</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool fault_in_kernel_space(unsigned long address)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define sev_printk(fmt, ...)</div><div class='add'>+</div><div class='add'>+#include "../../coco/sev/vc-shared.c"</div><div class='add'>+</div><div class='add'>+void do_boot_stage2_vc(struct pt_regs *regs, unsigned long exit_code)</div><div class='add'>+{</div><div class='add'>+	struct es_em_ctxt ctxt;</div><div class='add'>+	enum es_result result;</div><div class='add'>+</div><div class='add'>+	if (!boot_ghcb &amp;&amp; !early_setup_ghcb())</div><div class='add'>+		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='add'>+</div><div class='add'>+	vc_ghcb_invalidate(boot_ghcb);</div><div class='add'>+	result = vc_init_em_ctxt(&amp;ctxt, regs, exit_code);</div><div class='add'>+	if (result != ES_OK)</div><div class='add'>+		goto finish;</div><div class='add'>+</div><div class='add'>+	result = vc_check_opcode_bytes(&amp;ctxt, exit_code);</div><div class='add'>+	if (result != ES_OK)</div><div class='add'>+		goto finish;</div><div class='add'>+</div><div class='add'>+	switch (exit_code) {</div><div class='add'>+	case SVM_EXIT_RDTSC:</div><div class='add'>+	case SVM_EXIT_RDTSCP:</div><div class='add'>+		result = vc_handle_rdtsc(boot_ghcb, &amp;ctxt, exit_code);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_IOIO:</div><div class='add'>+		result = vc_handle_ioio(boot_ghcb, &amp;ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_CPUID:</div><div class='add'>+		result = vc_handle_cpuid(boot_ghcb, &amp;ctxt);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		result = ES_UNSUPPORTED;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+finish:</div><div class='add'>+	if (result == ES_OK)</div><div class='add'>+		vc_finish_insn(&amp;ctxt);</div><div class='add'>+	else if (result != ES_RETRY)</div><div class='add'>+		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c<br/>index bb55934c1cee..fd1b67dfea22 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/sev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/sev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/sev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/sev.c</a></div><div class='hunk'>@@ -21,99 +21,14 @@</div><div class='ctx'> #include &lt;asm/fpu/xcr.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "error.h"</div><div class='del'>-#include "../msr.h"</div><div class='add'>+#include "sev.h"</div><div class='ctx'> </div><div class='ctx'> static struct ghcb boot_ghcb_page __aligned(PAGE_SIZE);</div><div class='ctx'> struct ghcb *boot_ghcb;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Copy a version of this function here - insn-eval.c can't be used in</div><div class='del'>- * pre-decompression code.</div><div class='del'>- */</div><div class='del'>-static bool insn_has_rep_prefix(struct insn *insn)</div><div class='del'>-{</div><div class='del'>-	insn_byte_t p;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	insn_get_prefixes(insn);</div><div class='del'>-</div><div class='del'>-	for_each_insn_prefix(insn, i, p) {</div><div class='del'>-		if (p == 0xf2 || p == 0xf3)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Only a dummy for insn_get_seg_base() - Early boot-code is 64bit only and</div><div class='del'>- * doesn't use segments.</div><div class='del'>- */</div><div class='del'>-static unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)</div><div class='del'>-{</div><div class='del'>-	return 0UL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u64 sev_es_rd_ghcb_msr(void)</div><div class='del'>-{</div><div class='del'>-	struct msr m;</div><div class='del'>-</div><div class='del'>-	boot_rdmsr(MSR_AMD64_SEV_ES_GHCB, &amp;m);</div><div class='del'>-</div><div class='del'>-	return m.q;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void sev_es_wr_ghcb_msr(u64 val)</div><div class='del'>-{</div><div class='del'>-	struct msr m;</div><div class='del'>-</div><div class='del'>-	m.q = val;</div><div class='del'>-	boot_wrmsr(MSR_AMD64_SEV_ES_GHCB, &amp;m);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	char buffer[MAX_INSN_SIZE];</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	memcpy(buffer, (unsigned char *)ctxt-&gt;regs-&gt;ip, MAX_INSN_SIZE);</div><div class='del'>-</div><div class='del'>-	ret = insn_decode(&amp;ctxt-&gt;insn, buffer, MAX_INSN_SIZE, INSN_MODE_64);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,</div><div class='del'>-				   void *dst, char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	memcpy(dst, buf, size);</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,</div><div class='del'>-				  void *src, char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	memcpy(buf, src, size);</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_ioio_check(struct es_em_ctxt *ctxt, u16 port, size_t size)</div><div class='del'>-{</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool fault_in_kernel_space(unsigned long address)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #undef __init</div><div class='ctx'> #define __init</div><div class='ctx'> </div><div class='hunk'>@@ -122,24 +37,27 @@ static bool fault_in_kernel_space(unsigned long address)</div><div class='ctx'> </div><div class='ctx'> #define __BOOT_COMPRESSED</div><div class='ctx'> </div><div class='del'>-/* Basic instruction decoding support needed */</div><div class='del'>-#include "../../lib/inat.c"</div><div class='del'>-#include "../../lib/insn.c"</div><div class='del'>-</div><div class='del'>-/* Include code for early handlers */</div><div class='del'>-#include "../../coco/sev/shared.c"</div><div class='add'>+extern struct svsm_ca *boot_svsm_caa;</div><div class='add'>+extern u64 boot_svsm_caa_pa;</div><div class='ctx'> </div><div class='del'>-static struct svsm_ca *svsm_get_caa(void)</div><div class='add'>+struct svsm_ca *svsm_get_caa(void)</div><div class='ctx'> {</div><div class='ctx'> 	return boot_svsm_caa;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 svsm_get_caa_pa(void)</div><div class='add'>+u64 svsm_get_caa_pa(void)</div><div class='ctx'> {</div><div class='ctx'> 	return boot_svsm_caa_pa;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int svsm_perform_call_protocol(struct svsm_call *call)</div><div class='add'>+int svsm_perform_call_protocol(struct svsm_call *call);</div><div class='add'>+</div><div class='add'>+u8 snp_vmpl;</div><div class='add'>+</div><div class='add'>+/* Include code for early handlers */</div><div class='add'>+#include "../../boot/startup/sev-shared.c"</div><div class='add'>+</div><div class='add'>+int svsm_perform_call_protocol(struct svsm_call *call)</div><div class='ctx'> {</div><div class='ctx'> 	struct ghcb *ghcb;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -157,17 +75,14 @@ static int svsm_perform_call_protocol(struct svsm_call *call)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool sev_snp_enabled(void)</div><div class='add'>+static bool sev_snp_enabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	return sev_status &amp; MSR_AMD64_SEV_SNP_ENABLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __page_state_change(unsigned long paddr, enum psc_op op)</div><div class='ctx'> {</div><div class='del'>-	u64 val;</div><div class='del'>-</div><div class='del'>-	if (!sev_snp_enabled())</div><div class='del'>-		return;</div><div class='add'>+	u64 val, msr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If private -&gt; shared then invalidate the page before requesting the</div><div class='hunk'>@@ -176,6 +91,9 @@ static void __page_state_change(unsigned long paddr, enum psc_op op)</div><div class='ctx'> 	if (op == SNP_PAGE_STATE_SHARED)</div><div class='ctx'> 		pvalidate_4k_page(paddr, paddr, false);</div><div class='ctx'> </div><div class='add'>+	/* Save the current GHCB MSR value */</div><div class='add'>+	msr = sev_es_rd_ghcb_msr();</div><div class='add'>+</div><div class='ctx'> 	/* Issue VMGEXIT to change the page state in RMP table. */</div><div class='ctx'> 	sev_es_wr_ghcb_msr(GHCB_MSR_PSC_REQ_GFN(paddr &gt;&gt; PAGE_SHIFT, op));</div><div class='ctx'> 	VMGEXIT();</div><div class='hunk'>@@ -185,6 +103,9 @@ static void __page_state_change(unsigned long paddr, enum psc_op op)</div><div class='ctx'> 	if ((GHCB_RESP_CODE(val) != GHCB_MSR_PSC_RESP) || GHCB_MSR_PSC_RESP_VAL(val))</div><div class='ctx'> 		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC);</div><div class='ctx'> </div><div class='add'>+	/* Restore the GHCB MSR value */</div><div class='add'>+	sev_es_wr_ghcb_msr(msr);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Now that page state is changed in the RMP table, validate it so that it is</div><div class='ctx'> 	 * consistent with the RMP entry.</div><div class='hunk'>@@ -195,15 +116,21 @@ static void __page_state_change(unsigned long paddr, enum psc_op op)</div><div class='ctx'> </div><div class='ctx'> void snp_set_page_private(unsigned long paddr)</div><div class='ctx'> {</div><div class='add'>+	if (!sev_snp_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	__page_state_change(paddr, SNP_PAGE_STATE_PRIVATE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void snp_set_page_shared(unsigned long paddr)</div><div class='ctx'> {</div><div class='add'>+	if (!sev_snp_enabled())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	__page_state_change(paddr, SNP_PAGE_STATE_SHARED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool early_setup_ghcb(void)</div><div class='add'>+bool early_setup_ghcb(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (set_page_decrypted((unsigned long)&amp;boot_ghcb_page))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -214,7 +141,7 @@ static bool early_setup_ghcb(void)</div><div class='ctx'> 	boot_ghcb = &amp;boot_ghcb_page;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize lookup tables for the instruction decoder */</div><div class='del'>-	inat_init_tables();</div><div class='add'>+	sev_insn_decode_init();</div><div class='ctx'> </div><div class='ctx'> 	/* SNP guest requires the GHCB GPA must be registered */</div><div class='ctx'> 	if (sev_snp_enabled())</div><div class='hunk'>@@ -223,56 +150,10 @@ static bool early_setup_ghcb(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static phys_addr_t __snp_accept_memory(struct snp_psc_desc *desc,</div><div class='del'>-				       phys_addr_t pa, phys_addr_t pa_end)</div><div class='del'>-{</div><div class='del'>-	struct psc_hdr *hdr;</div><div class='del'>-	struct psc_entry *e;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	hdr = &amp;desc-&gt;hdr;</div><div class='del'>-	memset(hdr, 0, sizeof(*hdr));</div><div class='del'>-</div><div class='del'>-	e = desc-&gt;entries;</div><div class='del'>-</div><div class='del'>-	i = 0;</div><div class='del'>-	while (pa &lt; pa_end &amp;&amp; i &lt; VMGEXIT_PSC_MAX_ENTRY) {</div><div class='del'>-		hdr-&gt;end_entry = i;</div><div class='del'>-</div><div class='del'>-		e-&gt;gfn = pa &gt;&gt; PAGE_SHIFT;</div><div class='del'>-		e-&gt;operation = SNP_PAGE_STATE_PRIVATE;</div><div class='del'>-		if (IS_ALIGNED(pa, PMD_SIZE) &amp;&amp; (pa_end - pa) &gt;= PMD_SIZE) {</div><div class='del'>-			e-&gt;pagesize = RMP_PG_SIZE_2M;</div><div class='del'>-			pa += PMD_SIZE;</div><div class='del'>-		} else {</div><div class='del'>-			e-&gt;pagesize = RMP_PG_SIZE_4K;</div><div class='del'>-			pa += PAGE_SIZE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		e++;</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vmgexit_psc(boot_ghcb, desc))</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC);</div><div class='del'>-</div><div class='del'>-	pvalidate_pages(desc);</div><div class='del'>-</div><div class='del'>-	return pa;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void snp_accept_memory(phys_addr_t start, phys_addr_t end)</div><div class='ctx'> {</div><div class='del'>-	struct snp_psc_desc desc = {};</div><div class='del'>-	unsigned int i;</div><div class='del'>-	phys_addr_t pa;</div><div class='del'>-</div><div class='del'>-	if (!boot_ghcb &amp;&amp; !early_setup_ghcb())</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC);</div><div class='del'>-</div><div class='del'>-	pa = start;</div><div class='del'>-	while (pa &lt; end)</div><div class='del'>-		pa = __snp_accept_memory(&amp;desc, pa, end);</div><div class='add'>+	for (phys_addr_t pa = start; pa &lt; end; pa += PAGE_SIZE)</div><div class='add'>+		__page_state_change(pa, SNP_PAGE_STATE_PRIVATE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void sev_es_shutdown_ghcb(void)</div><div class='hunk'>@@ -333,46 +214,6 @@ bool sev_es_check_ghcb_fault(unsigned long address)</div><div class='ctx'> 	return ((address &amp; PAGE_MASK) == (unsigned long)&amp;boot_ghcb_page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void do_boot_stage2_vc(struct pt_regs *regs, unsigned long exit_code)</div><div class='del'>-{</div><div class='del'>-	struct es_em_ctxt ctxt;</div><div class='del'>-	enum es_result result;</div><div class='del'>-</div><div class='del'>-	if (!boot_ghcb &amp;&amp; !early_setup_ghcb())</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='del'>-</div><div class='del'>-	vc_ghcb_invalidate(boot_ghcb);</div><div class='del'>-	result = vc_init_em_ctxt(&amp;ctxt, regs, exit_code);</div><div class='del'>-	if (result != ES_OK)</div><div class='del'>-		goto finish;</div><div class='del'>-</div><div class='del'>-	result = vc_check_opcode_bytes(&amp;ctxt, exit_code);</div><div class='del'>-	if (result != ES_OK)</div><div class='del'>-		goto finish;</div><div class='del'>-</div><div class='del'>-	switch (exit_code) {</div><div class='del'>-	case SVM_EXIT_RDTSC:</div><div class='del'>-	case SVM_EXIT_RDTSCP:</div><div class='del'>-		result = vc_handle_rdtsc(boot_ghcb, &amp;ctxt, exit_code);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_IOIO:</div><div class='del'>-		result = vc_handle_ioio(boot_ghcb, &amp;ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_CPUID:</div><div class='del'>-		result = vc_handle_cpuid(boot_ghcb, &amp;ctxt);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		result = ES_UNSUPPORTED;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-finish:</div><div class='del'>-	if (result == ES_OK)</div><div class='del'>-		vc_finish_insn(&amp;ctxt);</div><div class='del'>-	else if (result != ES_RETRY)</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * SNP_FEATURES_IMPL_REQ is the mask of SNP features that will need</div><div class='ctx'>  * guest side implementation for proper functioning of the guest. If any</div><div class='hunk'>@@ -682,3 +523,43 @@ void sev_prep_identity_maps(unsigned long top_level_pgt)</div><div class='ctx'> </div><div class='ctx'> 	sev_verify_cbit(top_level_pgt);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool early_is_sevsnp_guest(void)</div><div class='add'>+{</div><div class='add'>+	static bool sevsnp;</div><div class='add'>+</div><div class='add'>+	if (sevsnp)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (!(sev_get_status() &amp; MSR_AMD64_SEV_SNP_ENABLED))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	sevsnp = true;</div><div class='add'>+</div><div class='add'>+	if (!snp_vmpl) {</div><div class='add'>+		unsigned int eax, ebx, ecx, edx;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * CPUID Fn8000_001F_EAX[28] - SVSM support</div><div class='add'>+		 */</div><div class='add'>+		eax = 0x8000001f;</div><div class='add'>+		ecx = 0;</div><div class='add'>+		native_cpuid(&amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+		if (eax &amp; BIT(28)) {</div><div class='add'>+			struct msr m;</div><div class='add'>+</div><div class='add'>+			/* Obtain the address of the calling area to use */</div><div class='add'>+			boot_rdmsr(MSR_SVSM_CAA, &amp;m);</div><div class='add'>+			boot_svsm_caa = (void *)m.q;</div><div class='add'>+			boot_svsm_caa_pa = m.q;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * The real VMPL level cannot be discovered, but the</div><div class='add'>+			 * memory acceptance routines make no use of that so</div><div class='add'>+			 * any non-zero value suffices here.</div><div class='add'>+			 */</div><div class='add'>+			snp_vmpl = U8_MAX;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/boot/compressed/sev.h b/arch/x86/boot/compressed/sev.h<br/>index fc725a981b09..92f79c21939c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/sev.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/sev.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/sev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/sev.h</a></div><div class='hunk'>@@ -10,13 +10,34 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AMD_MEM_ENCRYPT</div><div class='ctx'> </div><div class='del'>-bool sev_snp_enabled(void);</div><div class='add'>+#include "../msr.h"</div><div class='add'>+</div><div class='ctx'> void snp_accept_memory(phys_addr_t start, phys_addr_t end);</div><div class='add'>+u64 sev_get_status(void);</div><div class='add'>+bool early_is_sevsnp_guest(void);</div><div class='add'>+</div><div class='add'>+static inline u64 sev_es_rd_ghcb_msr(void)</div><div class='add'>+{</div><div class='add'>+	struct msr m;</div><div class='add'>+</div><div class='add'>+	boot_rdmsr(MSR_AMD64_SEV_ES_GHCB, &amp;m);</div><div class='add'>+</div><div class='add'>+	return m.q;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void sev_es_wr_ghcb_msr(u64 val)</div><div class='add'>+{</div><div class='add'>+	struct msr m;</div><div class='add'>+</div><div class='add'>+	m.q = val;</div><div class='add'>+	boot_wrmsr(MSR_AMD64_SEV_ES_GHCB, &amp;m);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-static inline bool sev_snp_enabled(void) { return false; }</div><div class='ctx'> static inline void snp_accept_memory(phys_addr_t start, phys_addr_t end) { }</div><div class='add'>+static inline u64 sev_get_status(void) { return 0; }</div><div class='add'>+static inline bool early_is_sevsnp_guest(void) { return false; }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/boot/compressed/string.c b/arch/x86/boot/compressed/string.c<br/>index 81fc1eaa3229..9af19d9614cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/string.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/string.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/compressed/string.c</a></div><div class='hunk'>@@ -15,9 +15,9 @@ static void *____memcpy(void *dest, const void *src, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	int d0, d1, d2;</div><div class='ctx'> 	asm volatile(</div><div class='del'>-		"rep ; movsl\n\t"</div><div class='add'>+		"rep movsl\n\t"</div><div class='ctx'> 		"movl %4,%%ecx\n\t"</div><div class='del'>-		"rep ; movsb\n\t"</div><div class='add'>+		"rep movsb"</div><div class='ctx'> 		: "=&amp;c" (d0), "=&amp;D" (d1), "=&amp;S" (d2)</div><div class='ctx'> 		: "0" (n &gt;&gt; 2), "g" (n &amp; 3), "1" (dest), "2" (src)</div><div class='ctx'> 		: "memory");</div><div class='hunk'>@@ -29,9 +29,9 @@ static void *____memcpy(void *dest, const void *src, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	long d0, d1, d2;</div><div class='ctx'> 	asm volatile(</div><div class='del'>-		"rep ; movsq\n\t"</div><div class='add'>+		"rep movsq\n\t"</div><div class='ctx'> 		"movq %4,%%rcx\n\t"</div><div class='del'>-		"rep ; movsb\n\t"</div><div class='add'>+		"rep movsb"</div><div class='ctx'> 		: "=&amp;c" (d0), "=&amp;D" (d1), "=&amp;S" (d2)</div><div class='ctx'> 		: "0" (n &gt;&gt; 3), "g" (n &amp; 7), "1" (dest), "2" (src)</div><div class='ctx'> 		: "memory");</div><div class='head'>diff --git a/arch/x86/boot/copy.S b/arch/x86/boot/copy.S<br/>index 6afd05e819d2..3973a67cd04e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/copy.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/copy.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/copy.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/copy.S</a></div><div class='hunk'>@@ -22,10 +22,10 @@ SYM_FUNC_START_NOALIGN(memcpy)</div><div class='ctx'> 	movw	%dx, %si</div><div class='ctx'> 	pushw	%cx</div><div class='ctx'> 	shrw	$2, %cx</div><div class='del'>-	rep; movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> 	popw	%cx</div><div class='ctx'> 	andw	$3, %cx</div><div class='del'>-	rep; movsb</div><div class='add'>+	rep movsb</div><div class='ctx'> 	popw	%di</div><div class='ctx'> 	popw	%si</div><div class='ctx'> 	retl</div><div class='hunk'>@@ -38,10 +38,10 @@ SYM_FUNC_START_NOALIGN(memset)</div><div class='ctx'> 	imull	$0x01010101,%eax</div><div class='ctx'> 	pushw	%cx</div><div class='ctx'> 	shrw	$2, %cx</div><div class='del'>-	rep; stosl</div><div class='add'>+	rep stosl</div><div class='ctx'> 	popw	%cx</div><div class='ctx'> 	andw	$3, %cx</div><div class='del'>-	rep; stosb</div><div class='add'>+	rep stosb</div><div class='ctx'> 	popw	%di</div><div class='ctx'> 	retl</div><div class='ctx'> SYM_FUNC_END(memset)</div><div class='head'>diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S<br/>index b5c79f43359b..e30649e44d8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/header.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/header.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/header.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/header.S</a></div><div class='hunk'>@@ -361,12 +361,8 @@ xloadflags:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='ctx'> #define XLF56 (XLF_5LEVEL|XLF_5LEVEL_ENABLED)</div><div class='ctx'> #else</div><div class='del'>-#define XLF56 XLF_5LEVEL</div><div class='del'>-#endif</div><div class='del'>-#else</div><div class='ctx'> #define XLF56 0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -585,7 +581,7 @@ start_of_setup:</div><div class='ctx'> 	xorl	%eax, %eax</div><div class='ctx'> 	subw	%di, %cx</div><div class='ctx'> 	shrw	$2, %cx</div><div class='del'>-	rep; stosl</div><div class='add'>+	rep stosl</div><div class='ctx'> </div><div class='ctx'> # Jump to C code (should not return)</div><div class='ctx'> 	calll	main</div><div class='head'>diff --git a/arch/x86/boot/startup/Makefile b/arch/x86/boot/startup/Makefile<br/>new file mode 100644<br/>index 000000000000..b514f7e81332<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/Makefile</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+KBUILD_AFLAGS		+= -D__DISABLE_EXPORTS</div><div class='add'>+KBUILD_CFLAGS		+= -D__DISABLE_EXPORTS -mcmodel=small -fPIC \</div><div class='add'>+			   -Os -DDISABLE_BRANCH_PROFILING \</div><div class='add'>+			   $(DISABLE_STACKLEAK_PLUGIN) \</div><div class='add'>+			   -fno-stack-protector -D__NO_FORTIFY \</div><div class='add'>+			   -fno-jump-tables \</div><div class='add'>+			   -include $(srctree)/include/linux/hidden.h</div><div class='add'>+</div><div class='add'>+# disable ftrace hooks and LTO</div><div class='add'>+KBUILD_CFLAGS	:= $(subst $(CC_FLAGS_FTRACE),,$(KBUILD_CFLAGS))</div><div class='add'>+KBUILD_CFLAGS	:= $(filter-out $(CC_FLAGS_LTO),$(KBUILD_CFLAGS))</div><div class='add'>+KASAN_SANITIZE	:= n</div><div class='add'>+KCSAN_SANITIZE	:= n</div><div class='add'>+KMSAN_SANITIZE	:= n</div><div class='add'>+UBSAN_SANITIZE	:= n</div><div class='add'>+KCOV_INSTRUMENT	:= n</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_X86_64)		+= gdt_idt.o map_kernel.o</div><div class='add'>+obj-$(CONFIG_AMD_MEM_ENCRYPT)	+= sme.o sev-startup.o</div><div class='add'>+</div><div class='add'>+lib-$(CONFIG_X86_64)		+= la57toggle.o</div><div class='add'>+lib-$(CONFIG_EFI_MIXED)		+= efi-mixed.o</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# Disable objtool validation for all library code, which is intended</div><div class='add'>+# to be linked into the decompressor or the EFI stub but not vmlinux</div><div class='add'>+#</div><div class='add'>+$(patsubst %.o,$(obj)/%.o,$(lib-y)): OBJECT_FILES_NON_STANDARD := y</div><div class='head'>diff --git a/drivers/firmware/efi/libstub/x86-mixed.S b/arch/x86/boot/startup/efi-mixed.S<br/>index e04ed99bc449..e04ed99bc449 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/libstub/x86-mixed.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/efi/libstub/x86-mixed.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/efi-mixed.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/efi-mixed.S</a></div><div class='head'>diff --git a/arch/x86/boot/startup/gdt_idt.c b/arch/x86/boot/startup/gdt_idt.c<br/>new file mode 100644<br/>index 000000000000..a3112a69b06a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/gdt_idt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/gdt_idt.c</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/desc.h&gt;</div><div class='add'>+#include &lt;asm/init.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/sev.h&gt;</div><div class='add'>+#include &lt;asm/trapnr.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Data structures and code used for IDT setup in head_64.S. The bringup-IDT is</div><div class='add'>+ * used until the idt_table takes over. On the boot CPU this happens in</div><div class='add'>+ * x86_64_start_kernel(), on secondary CPUs in start_secondary(). In both cases</div><div class='add'>+ * this happens in the functions called from head_64.S.</div><div class='add'>+ *</div><div class='add'>+ * The idt_table can't be used that early because all the code modifying it is</div><div class='add'>+ * in idt.c and can be instrumented by tracing or KASAN, which both don't work</div><div class='add'>+ * during early CPU bringup. Also the idt_table has the runtime vectors</div><div class='add'>+ * configured which require certain CPU state to be setup already (like TSS),</div><div class='add'>+ * which also hasn't happened yet in early CPU bringup.</div><div class='add'>+ */</div><div class='add'>+static gate_desc bringup_idt_table[NUM_EXCEPTION_VECTORS] __page_aligned_data;</div><div class='add'>+</div><div class='add'>+/* This may run while still in the direct mapping */</div><div class='add'>+void __head startup_64_load_idt(void *vc_handler)</div><div class='add'>+{</div><div class='add'>+	struct desc_ptr desc = {</div><div class='add'>+		.address = (unsigned long)rip_rel_ptr(bringup_idt_table),</div><div class='add'>+		.size    = sizeof(bringup_idt_table) - 1,</div><div class='add'>+	};</div><div class='add'>+	struct idt_data data;</div><div class='add'>+	gate_desc idt_desc;</div><div class='add'>+</div><div class='add'>+	/* @vc_handler is set only for a VMM Communication Exception */</div><div class='add'>+	if (vc_handler) {</div><div class='add'>+		init_idt_data(&amp;data, X86_TRAP_VC, vc_handler);</div><div class='add'>+		idt_init_desc(&amp;idt_desc, &amp;data);</div><div class='add'>+		native_write_idt_entry((gate_desc *)desc.address, X86_TRAP_VC, &amp;idt_desc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	native_load_idt(&amp;desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Setup boot CPU state needed before kernel switches to virtual addresses.</div><div class='add'>+ */</div><div class='add'>+void __head startup_64_setup_gdt_idt(void)</div><div class='add'>+{</div><div class='add'>+	struct gdt_page *gp = rip_rel_ptr((void *)(__force unsigned long)&amp;gdt_page);</div><div class='add'>+	void *handler = NULL;</div><div class='add'>+</div><div class='add'>+	struct desc_ptr startup_gdt_descr = {</div><div class='add'>+		.address = (unsigned long)gp-&gt;gdt,</div><div class='add'>+		.size    = GDT_SIZE - 1,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Load GDT */</div><div class='add'>+	native_load_gdt(&amp;startup_gdt_descr);</div><div class='add'>+</div><div class='add'>+	/* New GDT is live - reload data segment registers */</div><div class='add'>+	asm volatile("movl %%eax, %%ds\n"</div><div class='add'>+		     "movl %%eax, %%ss\n"</div><div class='add'>+		     "movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory");</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))</div><div class='add'>+		handler = rip_rel_ptr(vc_no_ghcb);</div><div class='add'>+</div><div class='add'>+	startup_64_load_idt(handler);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/boot/compressed/la57toggle.S b/arch/x86/boot/startup/la57toggle.S<br/>index 9ee002387eb1..370075b4d95b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/compressed/la57toggle.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/compressed/la57toggle.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/la57toggle.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/la57toggle.S</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'> #include &lt;asm/boot.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/processor-flags.h&gt;</div><div class='del'>-#include "pgtable.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is the 32-bit trampoline that will be copied over to low memory. It</div><div class='head'>diff --git a/arch/x86/boot/startup/map_kernel.c b/arch/x86/boot/startup/map_kernel.c<br/>new file mode 100644<br/>index 000000000000..332dbe6688c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/map_kernel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/map_kernel.c</a></div><div class='hunk'>@@ -0,0 +1,217 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/init.h&gt;</div><div class='add'>+#include &lt;asm/sections.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/sev.h&gt;</div><div class='add'>+</div><div class='add'>+extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];</div><div class='add'>+extern unsigned int next_early_pgt;</div><div class='add'>+</div><div class='add'>+static inline bool check_la57_support(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * 5-level paging is detected and enabled at kernel decompression</div><div class='add'>+	 * stage. Only check if it has been enabled there.</div><div class='add'>+	 */</div><div class='add'>+	if (!(native_read_cr4() &amp; X86_CR4_LA57))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	__pgtable_l5_enabled	= 1;</div><div class='add'>+	pgdir_shift		= 48;</div><div class='add'>+	ptrs_per_p4d		= 512;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long __head sme_postprocess_startup(struct boot_params *bp,</div><div class='add'>+						    pmdval_t *pmd,</div><div class='add'>+						    unsigned long p2v_offset)</div><div class='add'>+{</div><div class='add'>+	unsigned long paddr, paddr_end;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Encrypt the kernel and related (if SME is active) */</div><div class='add'>+	sme_encrypt_kernel(bp);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear the memory encryption mask from the .bss..decrypted section.</div><div class='add'>+	 * The bss section will be memset to zero later in the initialization so</div><div class='add'>+	 * there is no need to zero it after changing the memory encryption</div><div class='add'>+	 * attribute.</div><div class='add'>+	 */</div><div class='add'>+	if (sme_get_me_mask()) {</div><div class='add'>+		paddr = (unsigned long)rip_rel_ptr(__start_bss_decrypted);</div><div class='add'>+		paddr_end = (unsigned long)rip_rel_ptr(__end_bss_decrypted);</div><div class='add'>+</div><div class='add'>+		for (; paddr &lt; paddr_end; paddr += PMD_SIZE) {</div><div class='add'>+			/*</div><div class='add'>+			 * On SNP, transition the page to shared in the RMP table so that</div><div class='add'>+			 * it is consistent with the page table attribute change.</div><div class='add'>+			 *</div><div class='add'>+			 * __start_bss_decrypted has a virtual address in the high range</div><div class='add'>+			 * mapping (kernel .text). PVALIDATE, by way of</div><div class='add'>+			 * early_snp_set_memory_shared(), requires a valid virtual</div><div class='add'>+			 * address but the kernel is currently running off of the identity</div><div class='add'>+			 * mapping so use the PA to get a *currently* valid virtual address.</div><div class='add'>+			 */</div><div class='add'>+			early_snp_set_memory_shared(paddr, paddr, PTRS_PER_PMD);</div><div class='add'>+</div><div class='add'>+			i = pmd_index(paddr - p2v_offset);</div><div class='add'>+			pmd[i] -= sme_get_me_mask();</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Return the SME encryption mask (if SME is active) to be used as a</div><div class='add'>+	 * modifier for the initial pgdir entry programmed into CR3.</div><div class='add'>+	 */</div><div class='add'>+	return sme_get_me_mask();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This code is compiled using PIC codegen because it will execute from the</div><div class='add'>+ * early 1:1 mapping of memory, which deviates from the mapping expected by the</div><div class='add'>+ * linker. Due to this deviation, taking the address of a global variable will</div><div class='add'>+ * produce an ambiguous result when using the plain &amp; operator.  Instead,</div><div class='add'>+ * rip_rel_ptr() must be used, which will return the RIP-relative address in</div><div class='add'>+ * the 1:1 mapping of memory. Kernel virtual addresses can be determined by</div><div class='add'>+ * subtracting p2v_offset from the RIP-relative address.</div><div class='add'>+ */</div><div class='add'>+unsigned long __head __startup_64(unsigned long p2v_offset,</div><div class='add'>+				  struct boot_params *bp)</div><div class='add'>+{</div><div class='add'>+	pmd_t (*early_pgts)[PTRS_PER_PMD] = rip_rel_ptr(early_dynamic_pgts);</div><div class='add'>+	unsigned long physaddr = (unsigned long)rip_rel_ptr(_text);</div><div class='add'>+	unsigned long va_text, va_end;</div><div class='add'>+	unsigned long pgtable_flags;</div><div class='add'>+	unsigned long load_delta;</div><div class='add'>+	pgdval_t *pgd;</div><div class='add'>+	p4dval_t *p4d;</div><div class='add'>+	pudval_t *pud;</div><div class='add'>+	pmdval_t *pmd, pmd_entry;</div><div class='add'>+	bool la57;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	la57 = check_la57_support();</div><div class='add'>+</div><div class='add'>+	/* Is the address too large? */</div><div class='add'>+	if (physaddr &gt;&gt; MAX_PHYSMEM_BITS)</div><div class='add'>+		for (;;);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Compute the delta between the address I am compiled to run at</div><div class='add'>+	 * and the address I am actually running at.</div><div class='add'>+	 */</div><div class='add'>+	phys_base = load_delta = __START_KERNEL_map + p2v_offset;</div><div class='add'>+</div><div class='add'>+	/* Is the address not 2M aligned? */</div><div class='add'>+	if (load_delta &amp; ~PMD_MASK)</div><div class='add'>+		for (;;);</div><div class='add'>+</div><div class='add'>+	va_text = physaddr - p2v_offset;</div><div class='add'>+	va_end  = (unsigned long)rip_rel_ptr(_end) - p2v_offset;</div><div class='add'>+</div><div class='add'>+	/* Include the SME encryption mask in the fixup value */</div><div class='add'>+	load_delta += sme_get_me_mask();</div><div class='add'>+</div><div class='add'>+	/* Fixup the physical addresses in the page table */</div><div class='add'>+</div><div class='add'>+	pgd = rip_rel_ptr(early_top_pgt);</div><div class='add'>+	pgd[pgd_index(__START_KERNEL_map)] += load_delta;</div><div class='add'>+</div><div class='add'>+	if (la57) {</div><div class='add'>+		p4d = (p4dval_t *)rip_rel_ptr(level4_kernel_pgt);</div><div class='add'>+		p4d[MAX_PTRS_PER_P4D - 1] += load_delta;</div><div class='add'>+</div><div class='add'>+		pgd[pgd_index(__START_KERNEL_map)] = (pgdval_t)p4d | _PAGE_TABLE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	level3_kernel_pgt[PTRS_PER_PUD - 2].pud += load_delta;</div><div class='add'>+	level3_kernel_pgt[PTRS_PER_PUD - 1].pud += load_delta;</div><div class='add'>+</div><div class='add'>+	for (i = FIXMAP_PMD_TOP; i &gt; FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--)</div><div class='add'>+		level2_fixmap_pgt[i].pmd += load_delta;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set up the identity mapping for the switchover.  These</div><div class='add'>+	 * entries should *NOT* have the global bit set!  This also</div><div class='add'>+	 * creates a bunch of nonsense entries but that is fine --</div><div class='add'>+	 * it avoids problems around wraparound.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	pud = &amp;early_pgts[0]-&gt;pmd;</div><div class='add'>+	pmd = &amp;early_pgts[1]-&gt;pmd;</div><div class='add'>+	next_early_pgt = 2;</div><div class='add'>+</div><div class='add'>+	pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();</div><div class='add'>+</div><div class='add'>+	if (la57) {</div><div class='add'>+		p4d = &amp;early_pgts[next_early_pgt++]-&gt;pmd;</div><div class='add'>+</div><div class='add'>+		i = (physaddr &gt;&gt; PGDIR_SHIFT) % PTRS_PER_PGD;</div><div class='add'>+		pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;</div><div class='add'>+		pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;</div><div class='add'>+</div><div class='add'>+		i = physaddr &gt;&gt; P4D_SHIFT;</div><div class='add'>+		p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;</div><div class='add'>+		p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;</div><div class='add'>+	} else {</div><div class='add'>+		i = (physaddr &gt;&gt; PGDIR_SHIFT) % PTRS_PER_PGD;</div><div class='add'>+		pgd[i + 0] = (pgdval_t)pud + pgtable_flags;</div><div class='add'>+		pgd[i + 1] = (pgdval_t)pud + pgtable_flags;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i = physaddr &gt;&gt; PUD_SHIFT;</div><div class='add'>+	pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;</div><div class='add'>+	pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;</div><div class='add'>+</div><div class='add'>+	pmd_entry = __PAGE_KERNEL_LARGE_EXEC &amp; ~_PAGE_GLOBAL;</div><div class='add'>+	pmd_entry += sme_get_me_mask();</div><div class='add'>+	pmd_entry +=  physaddr;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DIV_ROUND_UP(va_end - va_text, PMD_SIZE); i++) {</div><div class='add'>+		int idx = i + (physaddr &gt;&gt; PMD_SHIFT);</div><div class='add'>+</div><div class='add'>+		pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Fixup the kernel text+data virtual addresses. Note that</div><div class='add'>+	 * we might write invalid pmds, when the kernel is relocated</div><div class='add'>+	 * cleanup_highmap() fixes this up along with the mappings</div><div class='add'>+	 * beyond _end.</div><div class='add'>+	 *</div><div class='add'>+	 * Only the region occupied by the kernel image has so far</div><div class='add'>+	 * been checked against the table of usable memory regions</div><div class='add'>+	 * provided by the firmware, so invalidate pages outside that</div><div class='add'>+	 * region. A page table entry that maps to a reserved area of</div><div class='add'>+	 * memory would allow processor speculation into that area,</div><div class='add'>+	 * and on some hardware (particularly the UV platform) even</div><div class='add'>+	 * speculative access to some reserved areas is caught as an</div><div class='add'>+	 * error, causing the BIOS to halt the system.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	pmd = rip_rel_ptr(level2_kernel_pgt);</div><div class='add'>+</div><div class='add'>+	/* invalidate pages before the kernel image */</div><div class='add'>+	for (i = 0; i &lt; pmd_index(va_text); i++)</div><div class='add'>+		pmd[i] &amp;= ~_PAGE_PRESENT;</div><div class='add'>+</div><div class='add'>+	/* fixup pages that are part of the kernel image */</div><div class='add'>+	for (; i &lt;= pmd_index(va_end); i++)</div><div class='add'>+		if (pmd[i] &amp; _PAGE_PRESENT)</div><div class='add'>+			pmd[i] += load_delta;</div><div class='add'>+</div><div class='add'>+	/* invalidate pages after the kernel image */</div><div class='add'>+	for (; i &lt; PTRS_PER_PMD; i++)</div><div class='add'>+		pmd[i] &amp;= ~_PAGE_PRESENT;</div><div class='add'>+</div><div class='add'>+	return sme_postprocess_startup(bp, pmd, p2v_offset);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/coco/sev/shared.c b/arch/x86/boot/startup/sev-shared.c<br/>index 2e4122f8aa6b..7a706db87b93 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/shared.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/shared.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/sev-shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/sev-shared.c</a></div><div class='hunk'>@@ -14,76 +14,23 @@</div><div class='ctx'> #ifndef __BOOT_COMPRESSED</div><div class='ctx'> #define error(v)			pr_err(v)</div><div class='ctx'> #define has_cpuflag(f)			boot_cpu_has(f)</div><div class='del'>-#define sev_printk(fmt, ...)		printk(fmt, ##__VA_ARGS__)</div><div class='del'>-#define sev_printk_rtl(fmt, ...)	printk_ratelimited(fmt, ##__VA_ARGS__)</div><div class='ctx'> #else</div><div class='ctx'> #undef WARN</div><div class='ctx'> #define WARN(condition, format...) (!!(condition))</div><div class='del'>-#define sev_printk(fmt, ...)</div><div class='del'>-#define sev_printk_rtl(fmt, ...)</div><div class='ctx'> #undef vc_forward_exception</div><div class='ctx'> #define vc_forward_exception(c)		panic("SNP: Hypervisor requested exception\n")</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * SVSM related information:</div><div class='del'>- *   When running under an SVSM, the VMPL that Linux is executing at must be</div><div class='del'>- *   non-zero. The VMPL is therefore used to indicate the presence of an SVSM.</div><div class='del'>- *</div><div class='ctx'>  *   During boot, the page tables are set up as identity mapped and later</div><div class='ctx'>  *   changed to use kernel virtual addresses. Maintain separate virtual and</div><div class='ctx'>  *   physical addresses for the CAA to allow SVSM functions to be used during</div><div class='ctx'>  *   early boot, both with identity mapped virtual addresses and proper kernel</div><div class='ctx'>  *   virtual addresses.</div><div class='ctx'>  */</div><div class='del'>-u8 snp_vmpl __ro_after_init;</div><div class='del'>-EXPORT_SYMBOL_GPL(snp_vmpl);</div><div class='del'>-static struct svsm_ca *boot_svsm_caa __ro_after_init;</div><div class='del'>-static u64 boot_svsm_caa_pa __ro_after_init;</div><div class='del'>-</div><div class='del'>-static struct svsm_ca *svsm_get_caa(void);</div><div class='del'>-static u64 svsm_get_caa_pa(void);</div><div class='del'>-static int svsm_perform_call_protocol(struct svsm_call *call);</div><div class='del'>-</div><div class='del'>-/* I/O parameters for CPUID-related helpers */</div><div class='del'>-struct cpuid_leaf {</div><div class='del'>-	u32 fn;</div><div class='del'>-	u32 subfn;</div><div class='del'>-	u32 eax;</div><div class='del'>-	u32 ebx;</div><div class='del'>-	u32 ecx;</div><div class='del'>-	u32 edx;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Individual entries of the SNP CPUID table, as defined by the SNP</div><div class='del'>- * Firmware ABI, Revision 0.9, Section 7.1, Table 14.</div><div class='del'>- */</div><div class='del'>-struct snp_cpuid_fn {</div><div class='del'>-	u32 eax_in;</div><div class='del'>-	u32 ecx_in;</div><div class='del'>-	u64 xcr0_in;</div><div class='del'>-	u64 xss_in;</div><div class='del'>-	u32 eax;</div><div class='del'>-	u32 ebx;</div><div class='del'>-	u32 ecx;</div><div class='del'>-	u32 edx;</div><div class='del'>-	u64 __reserved;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SNP CPUID table, as defined by the SNP Firmware ABI, Revision 0.9,</div><div class='del'>- * Section 8.14.2.6. Also noted there is the SNP firmware-enforced limit</div><div class='del'>- * of 64 entries per CPUID table.</div><div class='del'>- */</div><div class='del'>-#define SNP_CPUID_COUNT_MAX 64</div><div class='del'>-</div><div class='del'>-struct snp_cpuid_table {</div><div class='del'>-	u32 count;</div><div class='del'>-	u32 __reserved1;</div><div class='del'>-	u64 __reserved2;</div><div class='del'>-	struct snp_cpuid_fn fn[SNP_CPUID_COUNT_MAX];</div><div class='del'>-} __packed;</div><div class='add'>+struct svsm_ca *boot_svsm_caa __ro_after_init;</div><div class='add'>+u64 boot_svsm_caa_pa __ro_after_init;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Since feature negotiation related variables are set early in the boot</div><div class='hunk'>@@ -107,7 +54,7 @@ static u32 cpuid_std_range_max __ro_after_init;</div><div class='ctx'> static u32 cpuid_hyp_range_max __ro_after_init;</div><div class='ctx'> static u32 cpuid_ext_range_max __ro_after_init;</div><div class='ctx'> </div><div class='del'>-static bool __init sev_es_check_cpu_features(void)</div><div class='add'>+bool __init sev_es_check_cpu_features(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!has_cpuflag(X86_FEATURE_RDRAND)) {</div><div class='ctx'> 		error("RDRAND instruction not supported - no trusted source of randomness available\n");</div><div class='hunk'>@@ -117,7 +64,7 @@ static bool __init sev_es_check_cpu_features(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __head __noreturn</div><div class='add'>+void __head __noreturn</div><div class='ctx'> sev_es_terminate(unsigned int set, unsigned int reason)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val = GHCB_MSR_TERM_REQ;</div><div class='hunk'>@@ -136,7 +83,7 @@ sev_es_terminate(unsigned int set, unsigned int reason)</div><div class='ctx'> /*</div><div class='ctx'>  * The hypervisor features are available from GHCB version 2 onward.</div><div class='ctx'>  */</div><div class='del'>-static u64 get_hv_features(void)</div><div class='add'>+u64 get_hv_features(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='hunk'>@@ -153,7 +100,7 @@ static u64 get_hv_features(void)</div><div class='ctx'> 	return GHCB_MSR_HV_FT_RESP_VAL(val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void snp_register_ghcb_early(unsigned long paddr)</div><div class='add'>+void snp_register_ghcb_early(unsigned long paddr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long pfn = paddr &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	u64 val;</div><div class='hunk'>@@ -169,7 +116,7 @@ static void snp_register_ghcb_early(unsigned long paddr)</div><div class='ctx'> 		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_REGISTER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool sev_es_negotiate_protocol(void)</div><div class='add'>+bool sev_es_negotiate_protocol(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='hunk'>@@ -190,39 +137,6 @@ static bool sev_es_negotiate_protocol(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline void vc_ghcb_invalidate(struct ghcb *ghcb)</div><div class='del'>-{</div><div class='del'>-	ghcb-&gt;save.sw_exit_code = 0;</div><div class='del'>-	__builtin_memset(ghcb-&gt;save.valid_bitmap, 0, sizeof(ghcb-&gt;save.valid_bitmap));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool vc_decoding_needed(unsigned long exit_code)</div><div class='del'>-{</div><div class='del'>-	/* Exceptions don't require to decode the instruction */</div><div class='del'>-	return !(exit_code &gt;= SVM_EXIT_EXCP_BASE &amp;&amp;</div><div class='del'>-		 exit_code &lt;= SVM_EXIT_LAST_EXCP);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_init_em_ctxt(struct es_em_ctxt *ctxt,</div><div class='del'>-				      struct pt_regs *regs,</div><div class='del'>-				      unsigned long exit_code)</div><div class='del'>-{</div><div class='del'>-	enum es_result ret = ES_OK;</div><div class='del'>-</div><div class='del'>-	memset(ctxt, 0, sizeof(*ctxt));</div><div class='del'>-	ctxt-&gt;regs = regs;</div><div class='del'>-</div><div class='del'>-	if (vc_decoding_needed(exit_code))</div><div class='del'>-		ret = vc_decode_insn(ctxt);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void vc_finish_insn(struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	ctxt-&gt;regs-&gt;ip += ctxt-&gt;insn.length;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static enum es_result verify_exception_info(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ret;</div><div class='hunk'>@@ -344,7 +258,7 @@ static int svsm_perform_ghcb_protocol(struct ghcb *ghcb, struct svsm_call *call)</div><div class='ctx'> 	 * Fill in protocol and format specifiers. This can be called very early</div><div class='ctx'> 	 * in the boot, so use rip-relative references as needed.</div><div class='ctx'> 	 */</div><div class='del'>-	ghcb-&gt;protocol_version = RIP_REL_REF(ghcb_version);</div><div class='add'>+	ghcb-&gt;protocol_version = ghcb_version;</div><div class='ctx'> 	ghcb-&gt;ghcb_usage       = GHCB_DEFAULT_USAGE;</div><div class='ctx'> </div><div class='ctx'> 	ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_SNP_RUN_VMPL);</div><div class='hunk'>@@ -371,10 +285,10 @@ static int svsm_perform_ghcb_protocol(struct ghcb *ghcb, struct svsm_call *call)</div><div class='ctx'> 	return svsm_process_result_codes(call);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,</div><div class='del'>-					  struct es_em_ctxt *ctxt,</div><div class='del'>-					  u64 exit_code, u64 exit_info_1,</div><div class='del'>-					  u64 exit_info_2)</div><div class='add'>+enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,</div><div class='add'>+				   struct es_em_ctxt *ctxt,</div><div class='add'>+				   u64 exit_code, u64 exit_info_1,</div><div class='add'>+				   u64 exit_info_2)</div><div class='ctx'> {</div><div class='ctx'> 	/* Fill in protocol and format specifiers */</div><div class='ctx'> 	ghcb-&gt;protocol_version = ghcb_version;</div><div class='hunk'>@@ -473,9 +387,9 @@ static int sev_cpuid_hv(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid</div><div class='ctx'>  * while running with the initial identity mapping as well as the</div><div class='ctx'>  * switch-over to kernel virtual addresses later.</div><div class='ctx'>  */</div><div class='del'>-static const struct snp_cpuid_table *snp_cpuid_get_table(void)</div><div class='add'>+const struct snp_cpuid_table *snp_cpuid_get_table(void)</div><div class='ctx'> {</div><div class='del'>-	return &amp;RIP_REL_REF(cpuid_table_copy);</div><div class='add'>+	return rip_rel_ptr(&amp;cpuid_table_copy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -672,7 +586,7 @@ snp_cpuid_postprocess(struct ghcb *ghcb, struct es_em_ctxt *ctxt,</div><div class='ctx'>  * Returns -EOPNOTSUPP if feature not enabled. Any other non-zero return value</div><div class='ctx'>  * should be treated as fatal by caller.</div><div class='ctx'>  */</div><div class='del'>-static int __head</div><div class='add'>+int __head</div><div class='ctx'> snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)</div><div class='ctx'> {</div><div class='ctx'> 	const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table();</div><div class='hunk'>@@ -701,9 +615,9 @@ snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf)</div><div class='ctx'> 		leaf-&gt;eax = leaf-&gt;ebx = leaf-&gt;ecx = leaf-&gt;edx = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* Skip post-processing for out-of-range zero leafs. */</div><div class='del'>-		if (!(leaf-&gt;fn &lt;= RIP_REL_REF(cpuid_std_range_max) ||</div><div class='del'>-		      (leaf-&gt;fn &gt;= 0x40000000 &amp;&amp; leaf-&gt;fn &lt;= RIP_REL_REF(cpuid_hyp_range_max)) ||</div><div class='del'>-		      (leaf-&gt;fn &gt;= 0x80000000 &amp;&amp; leaf-&gt;fn &lt;= RIP_REL_REF(cpuid_ext_range_max))))</div><div class='add'>+		if (!(leaf-&gt;fn &lt;= cpuid_std_range_max ||</div><div class='add'>+		      (leaf-&gt;fn &gt;= 0x40000000 &amp;&amp; leaf-&gt;fn &lt;= cpuid_hyp_range_max) ||</div><div class='add'>+		      (leaf-&gt;fn &gt;= 0x80000000 &amp;&amp; leaf-&gt;fn &lt;= cpuid_ext_range_max)))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -782,391 +696,6 @@ fail:</div><div class='ctx'> 	sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum es_result vc_insn_string_check(struct es_em_ctxt *ctxt,</div><div class='del'>-					   unsigned long address,</div><div class='del'>-					   bool write)</div><div class='del'>-{</div><div class='del'>-	if (user_mode(ctxt-&gt;regs) &amp;&amp; fault_in_kernel_space(address)) {</div><div class='del'>-		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='del'>-		ctxt-&gt;fi.error_code = X86_PF_USER;</div><div class='del'>-		ctxt-&gt;fi.cr2        = address;</div><div class='del'>-		if (write)</div><div class='del'>-			ctxt-&gt;fi.error_code |= X86_PF_WRITE;</div><div class='del'>-</div><div class='del'>-		return ES_EXCEPTION;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_insn_string_read(struct es_em_ctxt *ctxt,</div><div class='del'>-					  void *src, char *buf,</div><div class='del'>-					  unsigned int data_size,</div><div class='del'>-					  unsigned int count,</div><div class='del'>-					  bool backwards)</div><div class='del'>-{</div><div class='del'>-	int i, b = backwards ? -1 : 1;</div><div class='del'>-	unsigned long address = (unsigned long)src;</div><div class='del'>-	enum es_result ret;</div><div class='del'>-</div><div class='del'>-	ret = vc_insn_string_check(ctxt, address, false);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		void *s = src + (i * data_size * b);</div><div class='del'>-		char *d = buf + (i * data_size);</div><div class='del'>-</div><div class='del'>-		ret = vc_read_mem(ctxt, s, d, data_size);</div><div class='del'>-		if (ret != ES_OK)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_insn_string_write(struct es_em_ctxt *ctxt,</div><div class='del'>-					   void *dst, char *buf,</div><div class='del'>-					   unsigned int data_size,</div><div class='del'>-					   unsigned int count,</div><div class='del'>-					   bool backwards)</div><div class='del'>-{</div><div class='del'>-	int i, s = backwards ? -1 : 1;</div><div class='del'>-	unsigned long address = (unsigned long)dst;</div><div class='del'>-	enum es_result ret;</div><div class='del'>-</div><div class='del'>-	ret = vc_insn_string_check(ctxt, address, true);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		void *d = dst + (i * data_size * s);</div><div class='del'>-		char *b = buf + (i * data_size);</div><div class='del'>-</div><div class='del'>-		ret = vc_write_mem(ctxt, d, b, data_size);</div><div class='del'>-		if (ret != ES_OK)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define IOIO_TYPE_STR  BIT(2)</div><div class='del'>-#define IOIO_TYPE_IN   1</div><div class='del'>-#define IOIO_TYPE_INS  (IOIO_TYPE_IN | IOIO_TYPE_STR)</div><div class='del'>-#define IOIO_TYPE_OUT  0</div><div class='del'>-#define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)</div><div class='del'>-</div><div class='del'>-#define IOIO_REP       BIT(3)</div><div class='del'>-</div><div class='del'>-#define IOIO_ADDR_64   BIT(9)</div><div class='del'>-#define IOIO_ADDR_32   BIT(8)</div><div class='del'>-#define IOIO_ADDR_16   BIT(7)</div><div class='del'>-</div><div class='del'>-#define IOIO_DATA_32   BIT(6)</div><div class='del'>-#define IOIO_DATA_16   BIT(5)</div><div class='del'>-#define IOIO_DATA_8    BIT(4)</div><div class='del'>-</div><div class='del'>-#define IOIO_SEG_ES    (0 &lt;&lt; 10)</div><div class='del'>-#define IOIO_SEG_DS    (3 &lt;&lt; 10)</div><div class='del'>-</div><div class='del'>-static enum es_result vc_ioio_exitinfo(struct es_em_ctxt *ctxt, u64 *exitinfo)</div><div class='del'>-{</div><div class='del'>-	struct insn *insn = &amp;ctxt-&gt;insn;</div><div class='del'>-	size_t size;</div><div class='del'>-	u64 port;</div><div class='del'>-</div><div class='del'>-	*exitinfo = 0;</div><div class='del'>-</div><div class='del'>-	switch (insn-&gt;opcode.bytes[0]) {</div><div class='del'>-	/* INS opcodes */</div><div class='del'>-	case 0x6c:</div><div class='del'>-	case 0x6d:</div><div class='del'>-		*exitinfo |= IOIO_TYPE_INS;</div><div class='del'>-		*exitinfo |= IOIO_SEG_ES;</div><div class='del'>-		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* OUTS opcodes */</div><div class='del'>-	case 0x6e:</div><div class='del'>-	case 0x6f:</div><div class='del'>-		*exitinfo |= IOIO_TYPE_OUTS;</div><div class='del'>-		*exitinfo |= IOIO_SEG_DS;</div><div class='del'>-		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* IN immediate opcodes */</div><div class='del'>-	case 0xe4:</div><div class='del'>-	case 0xe5:</div><div class='del'>-		*exitinfo |= IOIO_TYPE_IN;</div><div class='del'>-		port	   = (u8)insn-&gt;immediate.value &amp; 0xffff;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* OUT immediate opcodes */</div><div class='del'>-	case 0xe6:</div><div class='del'>-	case 0xe7:</div><div class='del'>-		*exitinfo |= IOIO_TYPE_OUT;</div><div class='del'>-		port	   = (u8)insn-&gt;immediate.value &amp; 0xffff;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* IN register opcodes */</div><div class='del'>-	case 0xec:</div><div class='del'>-	case 0xed:</div><div class='del'>-		*exitinfo |= IOIO_TYPE_IN;</div><div class='del'>-		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* OUT register opcodes */</div><div class='del'>-	case 0xee:</div><div class='del'>-	case 0xef:</div><div class='del'>-		*exitinfo |= IOIO_TYPE_OUT;</div><div class='del'>-		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*exitinfo |= port &lt;&lt; 16;</div><div class='del'>-</div><div class='del'>-	switch (insn-&gt;opcode.bytes[0]) {</div><div class='del'>-	case 0x6c:</div><div class='del'>-	case 0x6e:</div><div class='del'>-	case 0xe4:</div><div class='del'>-	case 0xe6:</div><div class='del'>-	case 0xec:</div><div class='del'>-	case 0xee:</div><div class='del'>-		/* Single byte opcodes */</div><div class='del'>-		*exitinfo |= IOIO_DATA_8;</div><div class='del'>-		size       = 1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/* Length determined by instruction parsing */</div><div class='del'>-		*exitinfo |= (insn-&gt;opnd_bytes == 2) ? IOIO_DATA_16</div><div class='del'>-						     : IOIO_DATA_32;</div><div class='del'>-		size       = (insn-&gt;opnd_bytes == 2) ? 2 : 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (insn-&gt;addr_bytes) {</div><div class='del'>-	case 2:</div><div class='del'>-		*exitinfo |= IOIO_ADDR_16;</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		*exitinfo |= IOIO_ADDR_32;</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		*exitinfo |= IOIO_ADDR_64;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (insn_has_rep_prefix(insn))</div><div class='del'>-		*exitinfo |= IOIO_REP;</div><div class='del'>-</div><div class='del'>-	return vc_ioio_check(ctxt, (u16)port, size);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='del'>-	u64 exit_info_1, exit_info_2;</div><div class='del'>-	enum es_result ret;</div><div class='del'>-</div><div class='del'>-	ret = vc_ioio_exitinfo(ctxt, &amp;exit_info_1);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (exit_info_1 &amp; IOIO_TYPE_STR) {</div><div class='del'>-</div><div class='del'>-		/* (REP) INS/OUTS */</div><div class='del'>-</div><div class='del'>-		bool df = ((regs-&gt;flags &amp; X86_EFLAGS_DF) == X86_EFLAGS_DF);</div><div class='del'>-		unsigned int io_bytes, exit_bytes;</div><div class='del'>-		unsigned int ghcb_count, op_count;</div><div class='del'>-		unsigned long es_base;</div><div class='del'>-		u64 sw_scratch;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * For the string variants with rep prefix the amount of in/out</div><div class='del'>-		 * operations per #VC exception is limited so that the kernel</div><div class='del'>-		 * has a chance to take interrupts and re-schedule while the</div><div class='del'>-		 * instruction is emulated.</div><div class='del'>-		 */</div><div class='del'>-		io_bytes   = (exit_info_1 &gt;&gt; 4) &amp; 0x7;</div><div class='del'>-		ghcb_count = sizeof(ghcb-&gt;shared_buffer) / io_bytes;</div><div class='del'>-</div><div class='del'>-		op_count    = (exit_info_1 &amp; IOIO_REP) ? regs-&gt;cx : 1;</div><div class='del'>-		exit_info_2 = min(op_count, ghcb_count);</div><div class='del'>-		exit_bytes  = exit_info_2 * io_bytes;</div><div class='del'>-</div><div class='del'>-		es_base = insn_get_seg_base(ctxt-&gt;regs, INAT_SEG_REG_ES);</div><div class='del'>-</div><div class='del'>-		/* Read bytes of OUTS into the shared buffer */</div><div class='del'>-		if (!(exit_info_1 &amp; IOIO_TYPE_IN)) {</div><div class='del'>-			ret = vc_insn_string_read(ctxt,</div><div class='del'>-					       (void *)(es_base + regs-&gt;si),</div><div class='del'>-					       ghcb-&gt;shared_buffer, io_bytes,</div><div class='del'>-					       exit_info_2, df);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Issue an VMGEXIT to the HV to consume the bytes from the</div><div class='del'>-		 * shared buffer or to have it write them into the shared buffer</div><div class='del'>-		 * depending on the instruction: OUTS or INS.</div><div class='del'>-		 */</div><div class='del'>-		sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer);</div><div class='del'>-		ghcb_set_sw_scratch(ghcb, sw_scratch);</div><div class='del'>-		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO,</div><div class='del'>-					  exit_info_1, exit_info_2);</div><div class='del'>-		if (ret != ES_OK)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		/* Read bytes from shared buffer into the guest's destination. */</div><div class='del'>-		if (exit_info_1 &amp; IOIO_TYPE_IN) {</div><div class='del'>-			ret = vc_insn_string_write(ctxt,</div><div class='del'>-						   (void *)(es_base + regs-&gt;di),</div><div class='del'>-						   ghcb-&gt;shared_buffer, io_bytes,</div><div class='del'>-						   exit_info_2, df);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-</div><div class='del'>-			if (df)</div><div class='del'>-				regs-&gt;di -= exit_bytes;</div><div class='del'>-			else</div><div class='del'>-				regs-&gt;di += exit_bytes;</div><div class='del'>-		} else {</div><div class='del'>-			if (df)</div><div class='del'>-				regs-&gt;si -= exit_bytes;</div><div class='del'>-			else</div><div class='del'>-				regs-&gt;si += exit_bytes;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (exit_info_1 &amp; IOIO_REP)</div><div class='del'>-			regs-&gt;cx -= exit_info_2;</div><div class='del'>-</div><div class='del'>-		ret = regs-&gt;cx ? ES_RETRY : ES_OK;</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-</div><div class='del'>-		/* IN/OUT into/from rAX */</div><div class='del'>-</div><div class='del'>-		int bits = (exit_info_1 &amp; 0x70) &gt;&gt; 1;</div><div class='del'>-		u64 rax = 0;</div><div class='del'>-</div><div class='del'>-		if (!(exit_info_1 &amp; IOIO_TYPE_IN))</div><div class='del'>-			rax = lower_bits(regs-&gt;ax, bits);</div><div class='del'>-</div><div class='del'>-		ghcb_set_rax(ghcb, rax);</div><div class='del'>-</div><div class='del'>-		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, exit_info_1, 0);</div><div class='del'>-		if (ret != ES_OK)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		if (exit_info_1 &amp; IOIO_TYPE_IN) {</div><div class='del'>-			if (!ghcb_rax_is_valid(ghcb))</div><div class='del'>-				return ES_VMM_ERROR;</div><div class='del'>-			regs-&gt;ax = lower_bits(ghcb-&gt;save.rax, bits);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vc_handle_cpuid_snp(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='del'>-	struct cpuid_leaf leaf;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	leaf.fn = regs-&gt;ax;</div><div class='del'>-	leaf.subfn = regs-&gt;cx;</div><div class='del'>-	ret = snp_cpuid(ghcb, ctxt, &amp;leaf);</div><div class='del'>-	if (!ret) {</div><div class='del'>-		regs-&gt;ax = leaf.eax;</div><div class='del'>-		regs-&gt;bx = leaf.ebx;</div><div class='del'>-		regs-&gt;cx = leaf.ecx;</div><div class='del'>-		regs-&gt;dx = leaf.edx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_cpuid(struct ghcb *ghcb,</div><div class='del'>-				      struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='del'>-	u32 cr4 = native_read_cr4();</div><div class='del'>-	enum es_result ret;</div><div class='del'>-	int snp_cpuid_ret;</div><div class='del'>-</div><div class='del'>-	snp_cpuid_ret = vc_handle_cpuid_snp(ghcb, ctxt);</div><div class='del'>-	if (!snp_cpuid_ret)</div><div class='del'>-		return ES_OK;</div><div class='del'>-	if (snp_cpuid_ret != -EOPNOTSUPP)</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	ghcb_set_rax(ghcb, regs-&gt;ax);</div><div class='del'>-	ghcb_set_rcx(ghcb, regs-&gt;cx);</div><div class='del'>-</div><div class='del'>-	if (cr4 &amp; X86_CR4_OSXSAVE)</div><div class='del'>-		/* Safe to read xcr0 */</div><div class='del'>-		ghcb_set_xcr0(ghcb, xgetbv(XCR_XFEATURE_ENABLED_MASK));</div><div class='del'>-	else</div><div class='del'>-		/* xgetbv will cause #GP - use reset value for xcr0 */</div><div class='del'>-		ghcb_set_xcr0(ghcb, 1);</div><div class='del'>-</div><div class='del'>-	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_CPUID, 0, 0);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (!(ghcb_rax_is_valid(ghcb) &amp;&amp;</div><div class='del'>-	      ghcb_rbx_is_valid(ghcb) &amp;&amp;</div><div class='del'>-	      ghcb_rcx_is_valid(ghcb) &amp;&amp;</div><div class='del'>-	      ghcb_rdx_is_valid(ghcb)))</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='del'>-	regs-&gt;bx = ghcb-&gt;save.rbx;</div><div class='del'>-	regs-&gt;cx = ghcb-&gt;save.rcx;</div><div class='del'>-	regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_rdtsc(struct ghcb *ghcb,</div><div class='del'>-				      struct es_em_ctxt *ctxt,</div><div class='del'>-				      unsigned long exit_code)</div><div class='del'>-{</div><div class='del'>-	bool rdtscp = (exit_code == SVM_EXIT_RDTSCP);</div><div class='del'>-	enum es_result ret;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The hypervisor should not be intercepting RDTSC/RDTSCP when Secure</div><div class='del'>-	 * TSC is enabled. A #VC exception will be generated if the RDTSC/RDTSCP</div><div class='del'>-	 * instructions are being intercepted. If this should occur and Secure</div><div class='del'>-	 * TSC is enabled, guest execution should be terminated as the guest</div><div class='del'>-	 * cannot rely on the TSC value provided by the hypervisor.</div><div class='del'>-	 */</div><div class='del'>-	if (sev_status &amp; MSR_AMD64_SNP_SECURE_TSC)</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	ret = sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, 0, 0);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (!(ghcb_rax_is_valid(ghcb) &amp;&amp; ghcb_rdx_is_valid(ghcb) &amp;&amp;</div><div class='del'>-	     (!rdtscp || ghcb_rcx_is_valid(ghcb))))</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='del'>-	ctxt-&gt;regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='del'>-	if (rdtscp)</div><div class='del'>-		ctxt-&gt;regs-&gt;cx = ghcb-&gt;save.rcx;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct cc_setup_data {</div><div class='ctx'> 	struct setup_data header;</div><div class='ctx'> 	u32 cc_blob_address;</div><div class='hunk'>@@ -1224,36 +753,14 @@ static void __head setup_cpuid_table(const struct cc_blob_sev_info *cc_info)</div><div class='ctx'> 		const struct snp_cpuid_fn *fn = &amp;cpuid_table-&gt;fn[i];</div><div class='ctx'> </div><div class='ctx'> 		if (fn-&gt;eax_in == 0x0)</div><div class='del'>-			RIP_REL_REF(cpuid_std_range_max) = fn-&gt;eax;</div><div class='add'>+			cpuid_std_range_max = fn-&gt;eax;</div><div class='ctx'> 		else if (fn-&gt;eax_in == 0x40000000)</div><div class='del'>-			RIP_REL_REF(cpuid_hyp_range_max) = fn-&gt;eax;</div><div class='add'>+			cpuid_hyp_range_max = fn-&gt;eax;</div><div class='ctx'> 		else if (fn-&gt;eax_in == 0x80000000)</div><div class='del'>-			RIP_REL_REF(cpuid_ext_range_max) = fn-&gt;eax;</div><div class='add'>+			cpuid_ext_range_max = fn-&gt;eax;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __pval_terminate(u64 pfn, bool action, unsigned int page_size,</div><div class='del'>-				    int ret, u64 svsm_ret)</div><div class='del'>-{</div><div class='del'>-	WARN(1, "PVALIDATE failure: pfn: 0x%llx, action: %u, size: %u, ret: %d, svsm_ret: 0x%llx\n",</div><div class='del'>-	     pfn, action, page_size, ret, svsm_ret);</div><div class='del'>-</div><div class='del'>-	sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PVALIDATE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void svsm_pval_terminate(struct svsm_pvalidate_call *pc, int ret, u64 svsm_ret)</div><div class='del'>-{</div><div class='del'>-	unsigned int page_size;</div><div class='del'>-	bool action;</div><div class='del'>-	u64 pfn;</div><div class='del'>-</div><div class='del'>-	pfn = pc-&gt;entry[pc-&gt;cur_index].pfn;</div><div class='del'>-	action = pc-&gt;entry[pc-&gt;cur_index].action;</div><div class='del'>-	page_size = pc-&gt;entry[pc-&gt;cur_index].page_size;</div><div class='del'>-</div><div class='del'>-	__pval_terminate(pfn, action, page_size, ret, svsm_ret);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __head svsm_pval_4k_page(unsigned long paddr, bool validate)</div><div class='ctx'> {</div><div class='ctx'> 	struct svsm_pvalidate_call *pc;</div><div class='hunk'>@@ -1296,11 +803,7 @@ static void __head pvalidate_4k_page(unsigned long vaddr, unsigned long paddr,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This can be called very early during boot, so use rIP-relative</div><div class='del'>-	 * references as needed.</div><div class='del'>-	 */</div><div class='del'>-	if (RIP_REL_REF(snp_vmpl)) {</div><div class='add'>+	if (snp_vmpl) {</div><div class='ctx'> 		svsm_pval_4k_page(paddr, validate);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = pvalidate(vaddr, RMP_PG_SIZE_4K, validate);</div><div class='hunk'>@@ -1309,351 +812,6 @@ static void __head pvalidate_4k_page(unsigned long vaddr, unsigned long paddr,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pval_pages(struct snp_psc_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct psc_entry *e;</div><div class='del'>-	unsigned long vaddr;</div><div class='del'>-	unsigned int size;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	bool validate;</div><div class='del'>-	u64 pfn;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt;= desc-&gt;hdr.end_entry; i++) {</div><div class='del'>-		e = &amp;desc-&gt;entries[i];</div><div class='del'>-</div><div class='del'>-		pfn = e-&gt;gfn;</div><div class='del'>-		vaddr = (unsigned long)pfn_to_kaddr(pfn);</div><div class='del'>-		size = e-&gt;pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K;</div><div class='del'>-		validate = e-&gt;operation == SNP_PAGE_STATE_PRIVATE;</div><div class='del'>-</div><div class='del'>-		rc = pvalidate(vaddr, size, validate);</div><div class='del'>-		if (!rc)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (rc == PVALIDATE_FAIL_SIZEMISMATCH &amp;&amp; size == RMP_PG_SIZE_2M) {</div><div class='del'>-			unsigned long vaddr_end = vaddr + PMD_SIZE;</div><div class='del'>-</div><div class='del'>-			for (; vaddr &lt; vaddr_end; vaddr += PAGE_SIZE, pfn++) {</div><div class='del'>-				rc = pvalidate(vaddr, RMP_PG_SIZE_4K, validate);</div><div class='del'>-				if (rc)</div><div class='del'>-					__pval_terminate(pfn, validate, RMP_PG_SIZE_4K, rc, 0);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			__pval_terminate(pfn, validate, size, rc, 0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 svsm_build_ca_from_pfn_range(u64 pfn, u64 pfn_end, bool action,</div><div class='del'>-					struct svsm_pvalidate_call *pc)</div><div class='del'>-{</div><div class='del'>-	struct svsm_pvalidate_entry *pe;</div><div class='del'>-</div><div class='del'>-	/* Nothing in the CA yet */</div><div class='del'>-	pc-&gt;num_entries = 0;</div><div class='del'>-	pc-&gt;cur_index   = 0;</div><div class='del'>-</div><div class='del'>-	pe = &amp;pc-&gt;entry[0];</div><div class='del'>-</div><div class='del'>-	while (pfn &lt; pfn_end) {</div><div class='del'>-		pe-&gt;page_size = RMP_PG_SIZE_4K;</div><div class='del'>-		pe-&gt;action    = action;</div><div class='del'>-		pe-&gt;ignore_cf = 0;</div><div class='del'>-		pe-&gt;pfn       = pfn;</div><div class='del'>-</div><div class='del'>-		pe++;</div><div class='del'>-		pfn++;</div><div class='del'>-</div><div class='del'>-		pc-&gt;num_entries++;</div><div class='del'>-		if (pc-&gt;num_entries == SVSM_PVALIDATE_MAX_COUNT)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return pfn;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int svsm_build_ca_from_psc_desc(struct snp_psc_desc *desc, unsigned int desc_entry,</div><div class='del'>-				       struct svsm_pvalidate_call *pc)</div><div class='del'>-{</div><div class='del'>-	struct svsm_pvalidate_entry *pe;</div><div class='del'>-	struct psc_entry *e;</div><div class='del'>-</div><div class='del'>-	/* Nothing in the CA yet */</div><div class='del'>-	pc-&gt;num_entries = 0;</div><div class='del'>-	pc-&gt;cur_index   = 0;</div><div class='del'>-</div><div class='del'>-	pe = &amp;pc-&gt;entry[0];</div><div class='del'>-	e  = &amp;desc-&gt;entries[desc_entry];</div><div class='del'>-</div><div class='del'>-	while (desc_entry &lt;= desc-&gt;hdr.end_entry) {</div><div class='del'>-		pe-&gt;page_size = e-&gt;pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K;</div><div class='del'>-		pe-&gt;action    = e-&gt;operation == SNP_PAGE_STATE_PRIVATE;</div><div class='del'>-		pe-&gt;ignore_cf = 0;</div><div class='del'>-		pe-&gt;pfn       = e-&gt;gfn;</div><div class='del'>-</div><div class='del'>-		pe++;</div><div class='del'>-		e++;</div><div class='del'>-</div><div class='del'>-		desc_entry++;</div><div class='del'>-		pc-&gt;num_entries++;</div><div class='del'>-		if (pc-&gt;num_entries == SVSM_PVALIDATE_MAX_COUNT)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return desc_entry;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void svsm_pval_pages(struct snp_psc_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct svsm_pvalidate_entry pv_4k[VMGEXIT_PSC_MAX_ENTRY];</div><div class='del'>-	unsigned int i, pv_4k_count = 0;</div><div class='del'>-	struct svsm_pvalidate_call *pc;</div><div class='del'>-	struct svsm_call call = {};</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	bool action;</div><div class='del'>-	u64 pc_pa;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This can be called very early in the boot, use native functions in</div><div class='del'>-	 * order to avoid paravirt issues.</div><div class='del'>-	 */</div><div class='del'>-	flags = native_local_irq_save();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The SVSM calling area (CA) can support processing 510 entries at a</div><div class='del'>-	 * time. Loop through the Page State Change descriptor until the CA is</div><div class='del'>-	 * full or the last entry in the descriptor is reached, at which time</div><div class='del'>-	 * the SVSM is invoked. This repeats until all entries in the descriptor</div><div class='del'>-	 * are processed.</div><div class='del'>-	 */</div><div class='del'>-	call.caa = svsm_get_caa();</div><div class='del'>-</div><div class='del'>-	pc = (struct svsm_pvalidate_call *)call.caa-&gt;svsm_buffer;</div><div class='del'>-	pc_pa = svsm_get_caa_pa() + offsetof(struct svsm_ca, svsm_buffer);</div><div class='del'>-</div><div class='del'>-	/* Protocol 0, Call ID 1 */</div><div class='del'>-	call.rax = SVSM_CORE_CALL(SVSM_CORE_PVALIDATE);</div><div class='del'>-	call.rcx = pc_pa;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt;= desc-&gt;hdr.end_entry;) {</div><div class='del'>-		i = svsm_build_ca_from_psc_desc(desc, i, pc);</div><div class='del'>-</div><div class='del'>-		do {</div><div class='del'>-			ret = svsm_perform_call_protocol(&amp;call);</div><div class='del'>-			if (!ret)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Check if the entry failed because of an RMP mismatch (a</div><div class='del'>-			 * PVALIDATE at 2M was requested, but the page is mapped in</div><div class='del'>-			 * the RMP as 4K).</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			if (call.rax_out == SVSM_PVALIDATE_FAIL_SIZEMISMATCH &amp;&amp;</div><div class='del'>-			    pc-&gt;entry[pc-&gt;cur_index].page_size == RMP_PG_SIZE_2M) {</div><div class='del'>-				/* Save this entry for post-processing at 4K */</div><div class='del'>-				pv_4k[pv_4k_count++] = pc-&gt;entry[pc-&gt;cur_index];</div><div class='del'>-</div><div class='del'>-				/* Skip to the next one unless at the end of the list */</div><div class='del'>-				pc-&gt;cur_index++;</div><div class='del'>-				if (pc-&gt;cur_index &lt; pc-&gt;num_entries)</div><div class='del'>-					ret = -EAGAIN;</div><div class='del'>-				else</div><div class='del'>-					ret = 0;</div><div class='del'>-			}</div><div class='del'>-		} while (ret == -EAGAIN);</div><div class='del'>-</div><div class='del'>-		if (ret)</div><div class='del'>-			svsm_pval_terminate(pc, ret, call.rax_out);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Process any entries that failed to be validated at 2M and validate them at 4K */</div><div class='del'>-	for (i = 0; i &lt; pv_4k_count; i++) {</div><div class='del'>-		u64 pfn, pfn_end;</div><div class='del'>-</div><div class='del'>-		action  = pv_4k[i].action;</div><div class='del'>-		pfn     = pv_4k[i].pfn;</div><div class='del'>-		pfn_end = pfn + 512;</div><div class='del'>-</div><div class='del'>-		while (pfn &lt; pfn_end) {</div><div class='del'>-			pfn = svsm_build_ca_from_pfn_range(pfn, pfn_end, action, pc);</div><div class='del'>-</div><div class='del'>-			ret = svsm_perform_call_protocol(&amp;call);</div><div class='del'>-			if (ret)</div><div class='del'>-				svsm_pval_terminate(pc, ret, call.rax_out);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	native_local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pvalidate_pages(struct snp_psc_desc *desc)</div><div class='del'>-{</div><div class='del'>-	if (snp_vmpl)</div><div class='del'>-		svsm_pval_pages(desc);</div><div class='del'>-	else</div><div class='del'>-		pval_pages(desc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int vmgexit_psc(struct ghcb *ghcb, struct snp_psc_desc *desc)</div><div class='del'>-{</div><div class='del'>-	int cur_entry, end_entry, ret = 0;</div><div class='del'>-	struct snp_psc_desc *data;</div><div class='del'>-	struct es_em_ctxt ctxt;</div><div class='del'>-</div><div class='del'>-	vc_ghcb_invalidate(ghcb);</div><div class='del'>-</div><div class='del'>-	/* Copy the input desc into GHCB shared buffer */</div><div class='del'>-	data = (struct snp_psc_desc *)ghcb-&gt;shared_buffer;</div><div class='del'>-	memcpy(ghcb-&gt;shared_buffer, desc, min_t(int, GHCB_SHARED_BUF_SIZE, sizeof(*desc)));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * As per the GHCB specification, the hypervisor can resume the guest</div><div class='del'>-	 * before processing all the entries. Check whether all the entries</div><div class='del'>-	 * are processed. If not, then keep retrying. Note, the hypervisor</div><div class='del'>-	 * will update the data memory directly to indicate the status, so</div><div class='del'>-	 * reference the data-&gt;hdr everywhere.</div><div class='del'>-	 *</div><div class='del'>-	 * The strategy here is to wait for the hypervisor to change the page</div><div class='del'>-	 * state in the RMP table before guest accesses the memory pages. If the</div><div class='del'>-	 * page state change was not successful, then later memory access will</div><div class='del'>-	 * result in a crash.</div><div class='del'>-	 */</div><div class='del'>-	cur_entry = data-&gt;hdr.cur_entry;</div><div class='del'>-	end_entry = data-&gt;hdr.end_entry;</div><div class='del'>-</div><div class='del'>-	while (data-&gt;hdr.cur_entry &lt;= data-&gt;hdr.end_entry) {</div><div class='del'>-		ghcb_set_sw_scratch(ghcb, (u64)__pa(data));</div><div class='del'>-</div><div class='del'>-		/* This will advance the shared buffer data points to. */</div><div class='del'>-		ret = sev_es_ghcb_hv_call(ghcb, &amp;ctxt, SVM_VMGEXIT_PSC, 0, 0);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Page State Change VMGEXIT can pass error code through</div><div class='del'>-		 * exit_info_2.</div><div class='del'>-		 */</div><div class='del'>-		if (WARN(ret || ghcb-&gt;save.sw_exit_info_2,</div><div class='del'>-			 "SNP: PSC failed ret=%d exit_info_2=%llx\n",</div><div class='del'>-			 ret, ghcb-&gt;save.sw_exit_info_2)) {</div><div class='del'>-			ret = 1;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Verify that reserved bit is not set */</div><div class='del'>-		if (WARN(data-&gt;hdr.reserved, "Reserved bit is set in the PSC header\n")) {</div><div class='del'>-			ret = 1;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Sanity check that entry processing is not going backwards.</div><div class='del'>-		 * This will happen only if hypervisor is tricking us.</div><div class='del'>-		 */</div><div class='del'>-		if (WARN(data-&gt;hdr.end_entry &gt; end_entry || cur_entry &gt; data-&gt;hdr.cur_entry,</div><div class='del'>-"SNP: PSC processing going backward, end_entry %d (got %d) cur_entry %d (got %d)\n",</div><div class='del'>-			 end_entry, data-&gt;hdr.end_entry, cur_entry, data-&gt;hdr.cur_entry)) {</div><div class='del'>-			ret = 1;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_check_opcode_bytes(struct es_em_ctxt *ctxt,</div><div class='del'>-					    unsigned long exit_code)</div><div class='del'>-{</div><div class='del'>-	unsigned int opcode = (unsigned int)ctxt-&gt;insn.opcode.value;</div><div class='del'>-	u8 modrm = ctxt-&gt;insn.modrm.value;</div><div class='del'>-</div><div class='del'>-	switch (exit_code) {</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_IOIO:</div><div class='del'>-	case SVM_EXIT_NPF:</div><div class='del'>-		/* handled separately */</div><div class='del'>-		return ES_OK;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_CPUID:</div><div class='del'>-		if (opcode == 0xa20f)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_INVD:</div><div class='del'>-		if (opcode == 0x080f)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_MONITOR:</div><div class='del'>-		/* MONITOR and MONITORX instructions generate the same error code */</div><div class='del'>-		if (opcode == 0x010f &amp;&amp; (modrm == 0xc8 || modrm == 0xfa))</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_MWAIT:</div><div class='del'>-		/* MWAIT and MWAITX instructions generate the same error code */</div><div class='del'>-		if (opcode == 0x010f &amp;&amp; (modrm == 0xc9 || modrm == 0xfb))</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_MSR:</div><div class='del'>-		/* RDMSR */</div><div class='del'>-		if (opcode == 0x320f ||</div><div class='del'>-		/* WRMSR */</div><div class='del'>-		    opcode == 0x300f)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_RDPMC:</div><div class='del'>-		if (opcode == 0x330f)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_RDTSC:</div><div class='del'>-		if (opcode == 0x310f)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_RDTSCP:</div><div class='del'>-		if (opcode == 0x010f &amp;&amp; modrm == 0xf9)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_READ_DR7:</div><div class='del'>-		if (opcode == 0x210f &amp;&amp;</div><div class='del'>-		    X86_MODRM_REG(ctxt-&gt;insn.modrm.value) == 7)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_VMMCALL:</div><div class='del'>-		if (opcode == 0x010f &amp;&amp; modrm == 0xd9)</div><div class='del'>-			return ES_OK;</div><div class='del'>-</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_WRITE_DR7:</div><div class='del'>-		if (opcode == 0x230f &amp;&amp;</div><div class='del'>-		    X86_MODRM_REG(ctxt-&gt;insn.modrm.value) == 7)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SVM_EXIT_WBINVD:</div><div class='del'>-		if (opcode == 0x90f)</div><div class='del'>-			return ES_OK;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	sev_printk(KERN_ERR "Wrong/unhandled opcode bytes: 0x%x, exit_code: 0x%lx, rIP: 0x%lx\n",</div><div class='del'>-		   opcode, exit_code, ctxt-&gt;regs-&gt;ip);</div><div class='del'>-</div><div class='del'>-	return ES_UNSUPPORTED;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Maintain the GPA of the SVSM Calling Area (CA) in order to utilize the SVSM</div><div class='ctx'>  * services needed when not running in VMPL0.</div><div class='hunk'>@@ -1681,7 +839,7 @@ static bool __head svsm_setup_ca(const struct cc_blob_sev_info *cc_info)</div><div class='ctx'> 	 * routine is running identity mapped when called, both by the decompressor</div><div class='ctx'> 	 * code and the early kernel code.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!rmpadjust((unsigned long)&amp;RIP_REL_REF(boot_ghcb_page), RMP_PG_SIZE_4K, 1))</div><div class='add'>+	if (!rmpadjust((unsigned long)rip_rel_ptr(&amp;boot_ghcb_page), RMP_PG_SIZE_4K, 1))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1698,7 +856,7 @@ static bool __head svsm_setup_ca(const struct cc_blob_sev_info *cc_info)</div><div class='ctx'> 	if (!secrets_page-&gt;svsm_guest_vmpl)</div><div class='ctx'> 		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SVSM_VMPL0);</div><div class='ctx'> </div><div class='del'>-	RIP_REL_REF(snp_vmpl) = secrets_page-&gt;svsm_guest_vmpl;</div><div class='add'>+	snp_vmpl = secrets_page-&gt;svsm_guest_vmpl;</div><div class='ctx'> </div><div class='ctx'> 	caa = secrets_page-&gt;svsm_caa;</div><div class='ctx'> </div><div class='hunk'>@@ -1713,8 +871,8 @@ static bool __head svsm_setup_ca(const struct cc_blob_sev_info *cc_info)</div><div class='ctx'> 	 * The CA is identity mapped when this routine is called, both by the</div><div class='ctx'> 	 * decompressor code and the early kernel code.</div><div class='ctx'> 	 */</div><div class='del'>-	RIP_REL_REF(boot_svsm_caa) = (struct svsm_ca *)caa;</div><div class='del'>-	RIP_REL_REF(boot_svsm_caa_pa) = caa;</div><div class='add'>+	boot_svsm_caa = (struct svsm_ca *)caa;</div><div class='add'>+	boot_svsm_caa_pa = caa;</div><div class='ctx'> </div><div class='ctx'> 	/* Advertise the SVSM presence via CPUID. */</div><div class='ctx'> 	cpuid_table = (struct snp_cpuid_table *)snp_cpuid_get_table();</div><div class='head'>diff --git a/arch/x86/boot/startup/sev-startup.c b/arch/x86/boot/startup/sev-startup.c<br/>new file mode 100644<br/>index 000000000000..0b7e3b950183<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/sev-startup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/sev-startup.c</a></div><div class='hunk'>@@ -0,0 +1,368 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * AMD Memory Encryption Support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 SUSE</div><div class='add'>+ *</div><div class='add'>+ * Author: Joerg Roedel &lt;jroedel@suse.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)	"SEV: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/percpu-defs.h&gt;</div><div class='add'>+#include &lt;linux/cc_platform.h&gt;</div><div class='add'>+#include &lt;linux/printk.h&gt;</div><div class='add'>+#include &lt;linux/mm_types.h&gt;</div><div class='add'>+#include &lt;linux/set_memory.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/cpumask.h&gt;</div><div class='add'>+#include &lt;linux/efi.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/psp-sev.h&gt;</div><div class='add'>+#include &lt;uapi/linux/sev-guest.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/init.h&gt;</div><div class='add'>+#include &lt;asm/cpu_entry_area.h&gt;</div><div class='add'>+#include &lt;asm/stacktrace.h&gt;</div><div class='add'>+#include &lt;asm/sev.h&gt;</div><div class='add'>+#include &lt;asm/sev-internal.h&gt;</div><div class='add'>+#include &lt;asm/insn-eval.h&gt;</div><div class='add'>+#include &lt;asm/fpu/xcr.h&gt;</div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/svm.h&gt;</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+#include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='add'>+#include &lt;asm/cmdline.h&gt;</div><div class='add'>+</div><div class='add'>+/* For early boot hypervisor communication in SEV-ES enabled guests */</div><div class='add'>+struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Needs to be in the .data section because we need it NULL before bss is</div><div class='add'>+ * cleared</div><div class='add'>+ */</div><div class='add'>+struct ghcb *boot_ghcb __section(".data");</div><div class='add'>+</div><div class='add'>+/* Bitmap of SEV features supported by the hypervisor */</div><div class='add'>+u64 sev_hv_features __ro_after_init;</div><div class='add'>+</div><div class='add'>+/* Secrets page physical address from the CC blob */</div><div class='add'>+u64 sev_secrets_pa __ro_after_init;</div><div class='add'>+</div><div class='add'>+/* For early boot SVSM communication */</div><div class='add'>+struct svsm_ca boot_svsm_ca_page __aligned(PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+DEFINE_PER_CPU(struct svsm_ca *, svsm_caa);</div><div class='add'>+DEFINE_PER_CPU(u64, svsm_caa_pa);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Nothing shall interrupt this code path while holding the per-CPU</div><div class='add'>+ * GHCB. The backup GHCB is only for NMIs interrupting this path.</div><div class='add'>+ *</div><div class='add'>+ * Callers must disable local interrupts around it.</div><div class='add'>+ */</div><div class='add'>+noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state)</div><div class='add'>+{</div><div class='add'>+	struct sev_es_runtime_data *data;</div><div class='add'>+	struct ghcb *ghcb;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!irqs_disabled());</div><div class='add'>+</div><div class='add'>+	data = this_cpu_read(runtime_data);</div><div class='add'>+	ghcb = &amp;data-&gt;ghcb_page;</div><div class='add'>+</div><div class='add'>+	if (unlikely(data-&gt;ghcb_active)) {</div><div class='add'>+		/* GHCB is already in use - save its contents */</div><div class='add'>+</div><div class='add'>+		if (unlikely(data-&gt;backup_ghcb_active)) {</div><div class='add'>+			/*</div><div class='add'>+			 * Backup-GHCB is also already in use. There is no way</div><div class='add'>+			 * to continue here so just kill the machine. To make</div><div class='add'>+			 * panic() work, mark GHCBs inactive so that messages</div><div class='add'>+			 * can be printed out.</div><div class='add'>+			 */</div><div class='add'>+			data-&gt;ghcb_active        = false;</div><div class='add'>+			data-&gt;backup_ghcb_active = false;</div><div class='add'>+</div><div class='add'>+			instrumentation_begin();</div><div class='add'>+			panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use");</div><div class='add'>+			instrumentation_end();</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Mark backup_ghcb active before writing to it */</div><div class='add'>+		data-&gt;backup_ghcb_active = true;</div><div class='add'>+</div><div class='add'>+		state-&gt;ghcb = &amp;data-&gt;backup_ghcb;</div><div class='add'>+</div><div class='add'>+		/* Backup GHCB content */</div><div class='add'>+		*state-&gt;ghcb = *ghcb;</div><div class='add'>+	} else {</div><div class='add'>+		state-&gt;ghcb = NULL;</div><div class='add'>+		data-&gt;ghcb_active = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ghcb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Include code shared with pre-decompression boot stage */</div><div class='add'>+#include "sev-shared.c"</div><div class='add'>+</div><div class='add'>+noinstr void __sev_put_ghcb(struct ghcb_state *state)</div><div class='add'>+{</div><div class='add'>+	struct sev_es_runtime_data *data;</div><div class='add'>+	struct ghcb *ghcb;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!irqs_disabled());</div><div class='add'>+</div><div class='add'>+	data = this_cpu_read(runtime_data);</div><div class='add'>+	ghcb = &amp;data-&gt;ghcb_page;</div><div class='add'>+</div><div class='add'>+	if (state-&gt;ghcb) {</div><div class='add'>+		/* Restore GHCB from Backup */</div><div class='add'>+		*ghcb = *state-&gt;ghcb;</div><div class='add'>+		data-&gt;backup_ghcb_active = false;</div><div class='add'>+		state-&gt;ghcb = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Invalidate the GHCB so a VMGEXIT instruction issued</div><div class='add'>+		 * from userspace won't appear to be valid.</div><div class='add'>+		 */</div><div class='add'>+		vc_ghcb_invalidate(ghcb);</div><div class='add'>+		data-&gt;ghcb_active = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int svsm_perform_call_protocol(struct svsm_call *call)</div><div class='add'>+{</div><div class='add'>+	struct ghcb_state state;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ghcb *ghcb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This can be called very early in the boot, use native functions in</div><div class='add'>+	 * order to avoid paravirt issues.</div><div class='add'>+	 */</div><div class='add'>+	flags = native_local_irq_save();</div><div class='add'>+</div><div class='add'>+	if (sev_cfg.ghcbs_initialized)</div><div class='add'>+		ghcb = __sev_get_ghcb(&amp;state);</div><div class='add'>+	else if (boot_ghcb)</div><div class='add'>+		ghcb = boot_ghcb;</div><div class='add'>+	else</div><div class='add'>+		ghcb = NULL;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ret = ghcb ? svsm_perform_ghcb_protocol(ghcb, call)</div><div class='add'>+			   : svsm_perform_msr_protocol(call);</div><div class='add'>+	} while (ret == -EAGAIN);</div><div class='add'>+</div><div class='add'>+	if (sev_cfg.ghcbs_initialized)</div><div class='add'>+		__sev_put_ghcb(&amp;state);</div><div class='add'>+</div><div class='add'>+	native_local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __head</div><div class='add'>+early_set_pages_state(unsigned long vaddr, unsigned long paddr,</div><div class='add'>+		      unsigned long npages, enum psc_op op)</div><div class='add'>+{</div><div class='add'>+	unsigned long paddr_end;</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	vaddr = vaddr &amp; PAGE_MASK;</div><div class='add'>+</div><div class='add'>+	paddr = paddr &amp; PAGE_MASK;</div><div class='add'>+	paddr_end = paddr + (npages &lt;&lt; PAGE_SHIFT);</div><div class='add'>+</div><div class='add'>+	while (paddr &lt; paddr_end) {</div><div class='add'>+		/* Page validation must be rescinded before changing to shared */</div><div class='add'>+		if (op == SNP_PAGE_STATE_SHARED)</div><div class='add'>+			pvalidate_4k_page(vaddr, paddr, false);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Use the MSR protocol because this function can be called before</div><div class='add'>+		 * the GHCB is established.</div><div class='add'>+		 */</div><div class='add'>+		sev_es_wr_ghcb_msr(GHCB_MSR_PSC_REQ_GFN(paddr &gt;&gt; PAGE_SHIFT, op));</div><div class='add'>+		VMGEXIT();</div><div class='add'>+</div><div class='add'>+		val = sev_es_rd_ghcb_msr();</div><div class='add'>+</div><div class='add'>+		if (GHCB_RESP_CODE(val) != GHCB_MSR_PSC_RESP)</div><div class='add'>+			goto e_term;</div><div class='add'>+</div><div class='add'>+		if (GHCB_MSR_PSC_RESP_VAL(val))</div><div class='add'>+			goto e_term;</div><div class='add'>+</div><div class='add'>+		/* Page validation must be performed after changing to private */</div><div class='add'>+		if (op == SNP_PAGE_STATE_PRIVATE)</div><div class='add'>+			pvalidate_4k_page(vaddr, paddr, true);</div><div class='add'>+</div><div class='add'>+		vaddr += PAGE_SIZE;</div><div class='add'>+		paddr += PAGE_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+e_term:</div><div class='add'>+	sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __head early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,</div><div class='add'>+					 unsigned long npages)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * This can be invoked in early boot while running identity mapped, so</div><div class='add'>+	 * use an open coded check for SNP instead of using cc_platform_has().</div><div class='add'>+	 * This eliminates worries about jump tables or checking boot_cpu_data</div><div class='add'>+	 * in the cc_platform_has() function.</div><div class='add'>+	 */</div><div class='add'>+	if (!(sev_status &amp; MSR_AMD64_SEV_SNP_ENABLED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	 /*</div><div class='add'>+	  * Ask the hypervisor to mark the memory pages as private in the RMP</div><div class='add'>+	  * table.</div><div class='add'>+	  */</div><div class='add'>+	early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_PRIVATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __head early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr,</div><div class='add'>+					unsigned long npages)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * This can be invoked in early boot while running identity mapped, so</div><div class='add'>+	 * use an open coded check for SNP instead of using cc_platform_has().</div><div class='add'>+	 * This eliminates worries about jump tables or checking boot_cpu_data</div><div class='add'>+	 * in the cc_platform_has() function.</div><div class='add'>+	 */</div><div class='add'>+	if (!(sev_status &amp; MSR_AMD64_SEV_SNP_ENABLED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	 /* Ask hypervisor to mark the memory pages shared in the RMP table. */</div><div class='add'>+	early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_SHARED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Initial set up of SNP relies on information provided by the</div><div class='add'>+ * Confidential Computing blob, which can be passed to the kernel</div><div class='add'>+ * in the following ways, depending on how it is booted:</div><div class='add'>+ *</div><div class='add'>+ * - when booted via the boot/decompress kernel:</div><div class='add'>+ *   - via boot_params</div><div class='add'>+ *</div><div class='add'>+ * - when booted directly by firmware/bootloader (e.g. CONFIG_PVH):</div><div class='add'>+ *   - via a setup_data entry, as defined by the Linux Boot Protocol</div><div class='add'>+ *</div><div class='add'>+ * Scan for the blob in that order.</div><div class='add'>+ */</div><div class='add'>+static __head struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp)</div><div class='add'>+{</div><div class='add'>+	struct cc_blob_sev_info *cc_info;</div><div class='add'>+</div><div class='add'>+	/* Boot kernel would have passed the CC blob via boot_params. */</div><div class='add'>+	if (bp-&gt;cc_blob_address) {</div><div class='add'>+		cc_info = (struct cc_blob_sev_info *)(unsigned long)bp-&gt;cc_blob_address;</div><div class='add'>+		goto found_cc_info;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If kernel was booted directly, without the use of the</div><div class='add'>+	 * boot/decompression kernel, the CC blob may have been passed via</div><div class='add'>+	 * setup_data instead.</div><div class='add'>+	 */</div><div class='add'>+	cc_info = find_cc_blob_setup_data(bp);</div><div class='add'>+	if (!cc_info)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+found_cc_info:</div><div class='add'>+	if (cc_info-&gt;magic != CC_BLOB_SEV_HDR_MAGIC)</div><div class='add'>+		snp_abort();</div><div class='add'>+</div><div class='add'>+	return cc_info;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __head void svsm_setup(struct cc_blob_sev_info *cc_info)</div><div class='add'>+{</div><div class='add'>+	struct svsm_call call = {};</div><div class='add'>+	int ret;</div><div class='add'>+	u64 pa;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Record the SVSM Calling Area address (CAA) if the guest is not</div><div class='add'>+	 * running at VMPL0. The CA will be used to communicate with the</div><div class='add'>+	 * SVSM to perform the SVSM services.</div><div class='add'>+	 */</div><div class='add'>+	if (!svsm_setup_ca(cc_info))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * It is very early in the boot and the kernel is running identity</div><div class='add'>+	 * mapped but without having adjusted the pagetables to where the</div><div class='add'>+	 * kernel was loaded (physbase), so the get the CA address using</div><div class='add'>+	 * RIP-relative addressing.</div><div class='add'>+	 */</div><div class='add'>+	pa = (u64)rip_rel_ptr(&amp;boot_svsm_ca_page);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Switch over to the boot SVSM CA while the current CA is still</div><div class='add'>+	 * addressable. There is no GHCB at this point so use the MSR protocol.</div><div class='add'>+	 *</div><div class='add'>+	 * SVSM_CORE_REMAP_CA call:</div><div class='add'>+	 *   RAX = 0 (Protocol=0, CallID=0)</div><div class='add'>+	 *   RCX = New CA GPA</div><div class='add'>+	 */</div><div class='add'>+	call.caa = svsm_get_caa();</div><div class='add'>+	call.rax = SVSM_CORE_CALL(SVSM_CORE_REMAP_CA);</div><div class='add'>+	call.rcx = pa;</div><div class='add'>+	ret = svsm_perform_call_protocol(&amp;call);</div><div class='add'>+	if (ret)</div><div class='add'>+		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SVSM_CA_REMAP_FAIL);</div><div class='add'>+</div><div class='add'>+	boot_svsm_caa = (struct svsm_ca *)pa;</div><div class='add'>+	boot_svsm_caa_pa = pa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool __head snp_init(struct boot_params *bp)</div><div class='add'>+{</div><div class='add'>+	struct cc_blob_sev_info *cc_info;</div><div class='add'>+</div><div class='add'>+	if (!bp)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	cc_info = find_cc_blob(bp);</div><div class='add'>+	if (!cc_info)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (cc_info-&gt;secrets_phys &amp;&amp; cc_info-&gt;secrets_len == PAGE_SIZE)</div><div class='add'>+		sev_secrets_pa = cc_info-&gt;secrets_phys;</div><div class='add'>+	else</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	setup_cpuid_table(cc_info);</div><div class='add'>+</div><div class='add'>+	svsm_setup(cc_info);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The CC blob will be used later to access the secrets page. Cache</div><div class='add'>+	 * it here like the boot kernel does.</div><div class='add'>+	 */</div><div class='add'>+	bp-&gt;cc_blob_address = (u32)(unsigned long)cc_info;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __head __noreturn snp_abort(void)</div><div class='add'>+{</div><div class='add'>+	sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/boot/startup/sme.c<br/>index 5eecdd92da10..70ea1748c0a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/mem_encrypt_identity.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/mem_encrypt_identity.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/startup/sme.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/startup/sme.c</a></div><div class='hunk'>@@ -45,8 +45,6 @@</div><div class='ctx'> #include &lt;asm/coco.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mm_internal.h"</div><div class='del'>-</div><div class='ctx'> #define PGD_FLAGS		_KERNPG_TABLE_NOENC</div><div class='ctx'> #define P4D_FLAGS		_KERNPG_TABLE_NOENC</div><div class='ctx'> #define PUD_FLAGS		_KERNPG_TABLE_NOENC</div><div class='hunk'>@@ -299,8 +297,7 @@ void __head sme_encrypt_kernel(struct boot_params *bp)</div><div class='ctx'> 	 * instrumentation or checking boot_cpu_data in the cc_platform_has()</div><div class='ctx'> 	 * function.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!sme_get_me_mask() ||</div><div class='del'>-	    RIP_REL_REF(sev_status) &amp; MSR_AMD64_SEV_ENABLED)</div><div class='add'>+	if (!sme_get_me_mask() || sev_status &amp; MSR_AMD64_SEV_ENABLED)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -318,8 +315,8 @@ void __head sme_encrypt_kernel(struct boot_params *bp)</div><div class='ctx'> 	 *     memory from being cached.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	kernel_start = (unsigned long)RIP_REL_REF(_text);</div><div class='del'>-	kernel_end = ALIGN((unsigned long)RIP_REL_REF(_end), PMD_SIZE);</div><div class='add'>+	kernel_start = (unsigned long)rip_rel_ptr(_text);</div><div class='add'>+	kernel_end = ALIGN((unsigned long)rip_rel_ptr(_end), PMD_SIZE);</div><div class='ctx'> 	kernel_len = kernel_end - kernel_start;</div><div class='ctx'> </div><div class='ctx'> 	initrd_start = 0;</div><div class='hunk'>@@ -345,7 +342,7 @@ void __head sme_encrypt_kernel(struct boot_params *bp)</div><div class='ctx'> 	 *   pagetable structures for the encryption of the kernel</div><div class='ctx'> 	 *   pagetable structures for workarea (in case not currently mapped)</div><div class='ctx'> 	 */</div><div class='del'>-	execute_start = workarea_start = (unsigned long)RIP_REL_REF(sme_workarea);</div><div class='add'>+	execute_start = workarea_start = (unsigned long)rip_rel_ptr(sme_workarea);</div><div class='ctx'> 	execute_end = execute_start + (PAGE_SIZE * 2) + PMD_SIZE;</div><div class='ctx'> 	execute_len = execute_end - execute_start;</div><div class='ctx'> </div><div class='hunk'>@@ -526,7 +523,7 @@ void __head sme_enable(struct boot_params *bp)</div><div class='ctx'> 	me_mask = 1UL &lt;&lt; (ebx &amp; 0x3f);</div><div class='ctx'> </div><div class='ctx'> 	/* Check the SEV MSR whether SEV or SME is enabled */</div><div class='del'>-	RIP_REL_REF(sev_status) = msr = __rdmsr(MSR_AMD64_SEV);</div><div class='add'>+	sev_status = msr = native_rdmsrq(MSR_AMD64_SEV);</div><div class='ctx'> 	feature_mask = (msr &amp; MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -557,13 +554,22 @@ void __head sme_enable(struct boot_params *bp)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='ctx'> 		/* For SME, check the SYSCFG MSR */</div><div class='del'>-		msr = __rdmsr(MSR_AMD64_SYSCFG);</div><div class='add'>+		msr = native_rdmsrq(MSR_AMD64_SYSCFG);</div><div class='ctx'> 		if (!(msr &amp; MSR_AMD64_SYSCFG_MEM_ENCRYPT))</div><div class='ctx'> 			return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	RIP_REL_REF(sme_me_mask) = me_mask;</div><div class='del'>-	RIP_REL_REF(physical_mask) &amp;= ~me_mask;</div><div class='del'>-	RIP_REL_REF(cc_vendor) = CC_VENDOR_AMD;</div><div class='add'>+	sme_me_mask	= me_mask;</div><div class='add'>+	physical_mask	&amp;= ~me_mask;</div><div class='add'>+	cc_vendor	= CC_VENDOR_AMD;</div><div class='ctx'> 	cc_set_mask(me_mask);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION</div><div class='add'>+/* Local version for startup code, which never operates on user page tables */</div><div class='add'>+__weak</div><div class='add'>+pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)</div><div class='add'>+{</div><div class='add'>+	return pgd;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/boot/string.c b/arch/x86/boot/string.c<br/>index 84f7a883ce1e..f35369bb14c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/string.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/string.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/string.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/string.c</a></div><div class='hunk'>@@ -32,7 +32,7 @@</div><div class='ctx'> int memcmp(const void *s1, const void *s2, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	bool diff;</div><div class='del'>-	asm("repe; cmpsb" CC_SET(nz)</div><div class='add'>+	asm("repe cmpsb" CC_SET(nz)</div><div class='ctx'> 	    : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len));</div><div class='ctx'> 	return diff;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c<br/>index f2e96905b3fe..0641c8c46aee 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/boot/video.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/boot/video.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/boot/video.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/boot/video.c</a></div><div class='hunk'>@@ -292,7 +292,7 @@ static void restore_screen(void)</div><div class='ctx'> 			     "shrw %%cx ; "</div><div class='ctx'> 			     "jnc 1f ; "</div><div class='ctx'> 			     "stosw \n\t"</div><div class='del'>-			     "1: rep;stosl ; "</div><div class='add'>+			     "1: rep stosl ; "</div><div class='ctx'> 			     "popw %%es"</div><div class='ctx'> 			     : "+D" (dst), "+c" (npad)</div><div class='ctx'> 			     : "bdS" (video_segment),</div><div class='head'>diff --git a/arch/x86/coco/core.c b/arch/x86/coco/core.c<br/>index 9a0ddda3aa69..d4610af68114 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/coco/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/coco/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/coco/core.c</a></div><div class='hunk'>@@ -18,7 +18,9 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum cc_vendor cc_vendor __ro_after_init = CC_VENDOR_NONE;</div><div class='add'>+SYM_PIC_ALIAS(cc_vendor);</div><div class='ctx'> u64 cc_mask __ro_after_init;</div><div class='add'>+SYM_PIC_ALIAS(cc_mask);</div><div class='ctx'> </div><div class='ctx'> static struct cc_attr_flags {</div><div class='ctx'> 	__u64 host_sev_snp	: 1,</div><div class='head'>diff --git a/arch/x86/coco/sev/Makefile b/arch/x86/coco/sev/Makefile<br/>index dcb06dc8b5ae..db3255b979bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/coco/sev/Makefile</a></div><div class='hunk'>@@ -1,22 +1,9 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-obj-y += core.o</div><div class='del'>-</div><div class='del'>-# jump tables are emitted using absolute references in non-PIC code</div><div class='del'>-# so they cannot be used in the early SEV startup code</div><div class='del'>-CFLAGS_core.o += -fno-jump-tables</div><div class='del'>-</div><div class='del'>-ifdef CONFIG_FUNCTION_TRACER</div><div class='del'>-CFLAGS_REMOVE_core.o = -pg</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-KASAN_SANITIZE_core.o	:= n</div><div class='del'>-KMSAN_SANITIZE_core.o	:= n</div><div class='del'>-KCOV_INSTRUMENT_core.o	:= n</div><div class='del'>-</div><div class='del'>-# With some compiler versions the generated code results in boot hangs, caused</div><div class='del'>-# by several compilation units. To be safe, disable all instrumentation.</div><div class='del'>-KCSAN_SANITIZE		:= n</div><div class='add'>+obj-y += core.o sev-nmi.o vc-handle.o</div><div class='ctx'> </div><div class='ctx'> # Clang 14 and older may fail to respect __no_sanitize_undefined when inlining</div><div class='del'>-UBSAN_SANITIZE		:= n</div><div class='add'>+UBSAN_SANITIZE_sev-nmi.o	:= n</div><div class='add'>+</div><div class='add'>+# GCC may fail to respect __no_sanitize_address when inlining</div><div class='add'>+KASAN_SANITIZE_sev-nmi.o	:= n</div><div class='head'>diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c<br/>index b0c1a7a57497..fbc1215d2746 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/sev/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/coco/sev/core.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;asm/cpu_entry_area.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='add'>+#include &lt;asm/sev-internal.h&gt;</div><div class='ctx'> #include &lt;asm/insn-eval.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/xcr.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='hunk'>@@ -41,10 +42,9 @@</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/cmdline.h&gt;</div><div class='del'>-</div><div class='del'>-#define DR7_RESET_VALUE        0x400</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* AP INIT values as documented in the APM2  section "Processor Initialization State" */</div><div class='ctx'> #define AP_INIT_CS_LIMIT		0xffff</div><div class='hunk'>@@ -81,21 +81,6 @@ static const char * const sev_status_feat_names[] = {</div><div class='ctx'> 	[MSR_AMD64_SNP_SMT_PROT_BIT]		= "SMTProt",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* For early boot hypervisor communication in SEV-ES enabled guests */</div><div class='del'>-static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Needs to be in the .data section because we need it NULL before bss is</div><div class='del'>- * cleared</div><div class='del'>- */</div><div class='del'>-static struct ghcb *boot_ghcb __section(".data");</div><div class='del'>-</div><div class='del'>-/* Bitmap of SEV features supported by the hypervisor */</div><div class='del'>-static u64 sev_hv_features __ro_after_init;</div><div class='del'>-</div><div class='del'>-/* Secrets page physical address from the CC blob */</div><div class='del'>-static u64 secrets_pa __ro_after_init;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * For Secure TSC guests, the BSP fetches TSC_INFO using SNP guest messaging and</div><div class='ctx'>  * initializes snp_tsc_scale and snp_tsc_offset. These values are replicated</div><div class='hunk'>@@ -105,558 +90,196 @@ static u64 snp_tsc_scale __ro_after_init;</div><div class='ctx'> static u64 snp_tsc_offset __ro_after_init;</div><div class='ctx'> static u64 snp_tsc_freq_khz __ro_after_init;</div><div class='ctx'> </div><div class='del'>-/* #VC handler runtime per-CPU data */</div><div class='del'>-struct sev_es_runtime_data {</div><div class='del'>-	struct ghcb ghcb_page;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reserve one page per CPU as backup storage for the unencrypted GHCB.</div><div class='del'>-	 * It is needed when an NMI happens while the #VC handler uses the real</div><div class='del'>-	 * GHCB, and the NMI handler itself is causing another #VC exception. In</div><div class='del'>-	 * that case the GHCB content of the first handler needs to be backed up</div><div class='del'>-	 * and restored.</div><div class='del'>-	 */</div><div class='del'>-	struct ghcb backup_ghcb;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Mark the per-cpu GHCBs as in-use to detect nested #VC exceptions.</div><div class='del'>-	 * There is no need for it to be atomic, because nothing is written to</div><div class='del'>-	 * the GHCB between the read and the write of ghcb_active. So it is safe</div><div class='del'>-	 * to use it when a nested #VC exception happens before the write.</div><div class='del'>-	 *</div><div class='del'>-	 * This is necessary for example in the #VC-&gt;NMI-&gt;#VC case when the NMI</div><div class='del'>-	 * happens while the first #VC handler uses the GHCB. When the NMI code</div><div class='del'>-	 * raises a second #VC handler it might overwrite the contents of the</div><div class='del'>-	 * GHCB written by the first handler. To avoid this the content of the</div><div class='del'>-	 * GHCB is saved and restored when the GHCB is detected to be in use</div><div class='del'>-	 * already.</div><div class='del'>-	 */</div><div class='del'>-	bool ghcb_active;</div><div class='del'>-	bool backup_ghcb_active;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Cached DR7 value - write it on DR7 writes and return it on reads.</div><div class='del'>-	 * That value will never make it to the real hardware DR7 as debugging</div><div class='del'>-	 * is currently unsupported in SEV-ES guests.</div><div class='del'>-	 */</div><div class='del'>-	unsigned long dr7;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ghcb_state {</div><div class='del'>-	struct ghcb *ghcb;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* For early boot SVSM communication */</div><div class='del'>-static struct svsm_ca boot_svsm_ca_page __aligned(PAGE_SIZE);</div><div class='del'>-</div><div class='del'>-static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);</div><div class='del'>-static DEFINE_PER_CPU(struct sev_es_save_area *, sev_vmsa);</div><div class='del'>-static DEFINE_PER_CPU(struct svsm_ca *, svsm_caa);</div><div class='del'>-static DEFINE_PER_CPU(u64, svsm_caa_pa);</div><div class='del'>-</div><div class='del'>-static __always_inline bool on_vc_stack(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned long sp = regs-&gt;sp;</div><div class='del'>-</div><div class='del'>-	/* User-mode RSP is not trusted */</div><div class='del'>-	if (user_mode(regs))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* SYSCALL gap still has user-mode RSP */</div><div class='del'>-	if (ip_within_syscall_gap(regs))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return ((sp &gt;= __this_cpu_ist_bottom_va(VC)) &amp;&amp; (sp &lt; __this_cpu_ist_top_va(VC)));</div><div class='del'>-}</div><div class='add'>+DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);</div><div class='add'>+DEFINE_PER_CPU(struct sev_es_save_area *, sev_vmsa);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This function handles the case when an NMI is raised in the #VC</div><div class='del'>- * exception handler entry code, before the #VC handler has switched off</div><div class='del'>- * its IST stack. In this case, the IST entry for #VC must be adjusted,</div><div class='del'>- * so that any nested #VC exception will not overwrite the stack</div><div class='del'>- * contents of the interrupted #VC handler.</div><div class='del'>- *</div><div class='del'>- * The IST entry is adjusted unconditionally so that it can be also be</div><div class='del'>- * unconditionally adjusted back in __sev_es_ist_exit(). Otherwise a</div><div class='del'>- * nested sev_es_ist_exit() call may adjust back the IST entry too</div><div class='del'>- * early.</div><div class='del'>- *</div><div class='del'>- * The __sev_es_ist_enter() and __sev_es_ist_exit() functions always run</div><div class='del'>- * on the NMI IST stack, as they are only called from NMI handling code</div><div class='del'>- * right now.</div><div class='add'>+ * SVSM related information:</div><div class='add'>+ *   When running under an SVSM, the VMPL that Linux is executing at must be</div><div class='add'>+ *   non-zero. The VMPL is therefore used to indicate the presence of an SVSM.</div><div class='ctx'>  */</div><div class='del'>-void noinstr __sev_es_ist_enter(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned long old_ist, new_ist;</div><div class='del'>-</div><div class='del'>-	/* Read old IST entry */</div><div class='del'>-	new_ist = old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);</div><div class='add'>+u8 snp_vmpl __ro_after_init;</div><div class='add'>+EXPORT_SYMBOL_GPL(snp_vmpl);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If NMI happened while on the #VC IST stack, set the new IST</div><div class='del'>-	 * value below regs-&gt;sp, so that the interrupted stack frame is</div><div class='del'>-	 * not overwritten by subsequent #VC exceptions.</div><div class='del'>-	 */</div><div class='del'>-	if (on_vc_stack(regs))</div><div class='del'>-		new_ist = regs-&gt;sp;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reserve additional 8 bytes and store old IST value so this</div><div class='del'>-	 * adjustment can be unrolled in __sev_es_ist_exit().</div><div class='del'>-	 */</div><div class='del'>-	new_ist -= sizeof(old_ist);</div><div class='del'>-	*(unsigned long *)new_ist = old_ist;</div><div class='del'>-</div><div class='del'>-	/* Set new IST entry */</div><div class='del'>-	this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void noinstr __sev_es_ist_exit(void)</div><div class='add'>+static u64 __init get_snp_jump_table_addr(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned long ist;</div><div class='add'>+	struct snp_secrets_page *secrets;</div><div class='add'>+	void __iomem *mem;</div><div class='add'>+	u64 addr;</div><div class='ctx'> </div><div class='del'>-	/* Read IST entry */</div><div class='del'>-	ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);</div><div class='add'>+	mem = ioremap_encrypted(sev_secrets_pa, PAGE_SIZE);</div><div class='add'>+	if (!mem) {</div><div class='add'>+		pr_err("Unable to locate AP jump table address: failed to map the SNP secrets page.\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(ist == __this_cpu_ist_top_va(VC)))</div><div class='del'>-		return;</div><div class='add'>+	secrets = (__force struct snp_secrets_page *)mem;</div><div class='add'>+</div><div class='add'>+	addr = secrets-&gt;os_area.ap_jump_table_pa;</div><div class='add'>+	iounmap(mem);</div><div class='ctx'> </div><div class='del'>-	/* Read back old IST entry and write it to the TSS */</div><div class='del'>-	this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist);</div><div class='add'>+	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Nothing shall interrupt this code path while holding the per-CPU</div><div class='del'>- * GHCB. The backup GHCB is only for NMIs interrupting this path.</div><div class='del'>- *</div><div class='del'>- * Callers must disable local interrupts around it.</div><div class='del'>- */</div><div class='del'>-static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state)</div><div class='add'>+static u64 __init get_jump_table_addr(void)</div><div class='ctx'> {</div><div class='del'>-	struct sev_es_runtime_data *data;</div><div class='add'>+	struct ghcb_state state;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	struct ghcb *ghcb;</div><div class='add'>+	u64 ret = 0;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!irqs_disabled());</div><div class='del'>-</div><div class='del'>-	data = this_cpu_read(runtime_data);</div><div class='del'>-	ghcb = &amp;data-&gt;ghcb_page;</div><div class='del'>-</div><div class='del'>-	if (unlikely(data-&gt;ghcb_active)) {</div><div class='del'>-		/* GHCB is already in use - save its contents */</div><div class='del'>-</div><div class='del'>-		if (unlikely(data-&gt;backup_ghcb_active)) {</div><div class='del'>-			/*</div><div class='del'>-			 * Backup-GHCB is also already in use. There is no way</div><div class='del'>-			 * to continue here so just kill the machine. To make</div><div class='del'>-			 * panic() work, mark GHCBs inactive so that messages</div><div class='del'>-			 * can be printed out.</div><div class='del'>-			 */</div><div class='del'>-			data-&gt;ghcb_active        = false;</div><div class='del'>-			data-&gt;backup_ghcb_active = false;</div><div class='del'>-</div><div class='del'>-			instrumentation_begin();</div><div class='del'>-			panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use");</div><div class='del'>-			instrumentation_end();</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Mark backup_ghcb active before writing to it */</div><div class='del'>-		data-&gt;backup_ghcb_active = true;</div><div class='add'>+	if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP))</div><div class='add'>+		return get_snp_jump_table_addr();</div><div class='ctx'> </div><div class='del'>-		state-&gt;ghcb = &amp;data-&gt;backup_ghcb;</div><div class='add'>+	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-		/* Backup GHCB content */</div><div class='del'>-		*state-&gt;ghcb = *ghcb;</div><div class='del'>-	} else {</div><div class='del'>-		state-&gt;ghcb = NULL;</div><div class='del'>-		data-&gt;ghcb_active = true;</div><div class='del'>-	}</div><div class='add'>+	ghcb = __sev_get_ghcb(&amp;state);</div><div class='ctx'> </div><div class='del'>-	return ghcb;</div><div class='del'>-}</div><div class='add'>+	vc_ghcb_invalidate(ghcb);</div><div class='add'>+	ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE);</div><div class='add'>+	ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE);</div><div class='add'>+	ghcb_set_sw_exit_info_2(ghcb, 0);</div><div class='ctx'> </div><div class='del'>-static inline u64 sev_es_rd_ghcb_msr(void)</div><div class='del'>-{</div><div class='del'>-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);</div><div class='del'>-}</div><div class='add'>+	sev_es_wr_ghcb_msr(__pa(ghcb));</div><div class='add'>+	VMGEXIT();</div><div class='ctx'> </div><div class='del'>-static __always_inline void sev_es_wr_ghcb_msr(u64 val)</div><div class='del'>-{</div><div class='del'>-	u32 low, high;</div><div class='add'>+	if (ghcb_sw_exit_info_1_is_valid(ghcb) &amp;&amp;</div><div class='add'>+	    ghcb_sw_exit_info_2_is_valid(ghcb))</div><div class='add'>+		ret = ghcb-&gt;save.sw_exit_info_2;</div><div class='ctx'> </div><div class='del'>-	low  = (u32)(val);</div><div class='del'>-	high = (u32)(val &gt;&gt; 32);</div><div class='add'>+	__sev_put_ghcb(&amp;state);</div><div class='ctx'> </div><div class='del'>-	native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);</div><div class='del'>-}</div><div class='add'>+	local_irq_restore(flags);</div><div class='ctx'> </div><div class='del'>-static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,</div><div class='del'>-				unsigned char *buffer)</div><div class='del'>-{</div><div class='del'>-	return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt-&gt;regs-&gt;ip, MAX_INSN_SIZE);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+static inline void __pval_terminate(u64 pfn, bool action, unsigned int page_size,</div><div class='add'>+				    int ret, u64 svsm_ret)</div><div class='ctx'> {</div><div class='del'>-	char buffer[MAX_INSN_SIZE];</div><div class='del'>-	int insn_bytes;</div><div class='del'>-</div><div class='del'>-	insn_bytes = insn_fetch_from_user_inatomic(ctxt-&gt;regs, buffer);</div><div class='del'>-	if (insn_bytes == 0) {</div><div class='del'>-		/* Nothing could be copied */</div><div class='del'>-		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='del'>-		ctxt-&gt;fi.error_code = X86_PF_INSTR | X86_PF_USER;</div><div class='del'>-		ctxt-&gt;fi.cr2        = ctxt-&gt;regs-&gt;ip;</div><div class='del'>-		return ES_EXCEPTION;</div><div class='del'>-	} else if (insn_bytes == -EINVAL) {</div><div class='del'>-		/* Effective RIP could not be calculated */</div><div class='del'>-		ctxt-&gt;fi.vector     = X86_TRAP_GP;</div><div class='del'>-		ctxt-&gt;fi.error_code = 0;</div><div class='del'>-		ctxt-&gt;fi.cr2        = 0;</div><div class='del'>-		return ES_EXCEPTION;</div><div class='del'>-	}</div><div class='add'>+	WARN(1, "PVALIDATE failure: pfn: 0x%llx, action: %u, size: %u, ret: %d, svsm_ret: 0x%llx\n",</div><div class='add'>+	     pfn, action, page_size, ret, svsm_ret);</div><div class='ctx'> </div><div class='del'>-	if (!insn_decode_from_regs(&amp;ctxt-&gt;insn, ctxt-&gt;regs, buffer, insn_bytes))</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='del'>-</div><div class='del'>-	if (ctxt-&gt;insn.immediate.got)</div><div class='del'>-		return ES_OK;</div><div class='del'>-	else</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='add'>+	sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PVALIDATE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+static void svsm_pval_terminate(struct svsm_pvalidate_call *pc, int ret, u64 svsm_ret)</div><div class='ctx'> {</div><div class='del'>-	char buffer[MAX_INSN_SIZE];</div><div class='del'>-	int res, ret;</div><div class='add'>+	unsigned int page_size;</div><div class='add'>+	bool action;</div><div class='add'>+	u64 pfn;</div><div class='ctx'> </div><div class='del'>-	res = vc_fetch_insn_kernel(ctxt, buffer);</div><div class='del'>-	if (res) {</div><div class='del'>-		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='del'>-		ctxt-&gt;fi.error_code = X86_PF_INSTR;</div><div class='del'>-		ctxt-&gt;fi.cr2        = ctxt-&gt;regs-&gt;ip;</div><div class='del'>-		return ES_EXCEPTION;</div><div class='del'>-	}</div><div class='add'>+	pfn = pc-&gt;entry[pc-&gt;cur_index].pfn;</div><div class='add'>+	action = pc-&gt;entry[pc-&gt;cur_index].action;</div><div class='add'>+	page_size = pc-&gt;entry[pc-&gt;cur_index].page_size;</div><div class='ctx'> </div><div class='del'>-	ret = insn_decode(&amp;ctxt-&gt;insn, buffer, MAX_INSN_SIZE, INSN_MODE_64);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='del'>-	else</div><div class='del'>-		return ES_OK;</div><div class='add'>+	__pval_terminate(pfn, action, page_size, ret, svsm_ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+static void pval_pages(struct snp_psc_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	if (user_mode(ctxt-&gt;regs))</div><div class='del'>-		return __vc_decode_user_insn(ctxt);</div><div class='del'>-	else</div><div class='del'>-		return __vc_decode_kern_insn(ctxt);</div><div class='del'>-}</div><div class='add'>+	struct psc_entry *e;</div><div class='add'>+	unsigned long vaddr;</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	bool validate;</div><div class='add'>+	u64 pfn;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,</div><div class='del'>-				   char *dst, char *buf, size_t size)</div><div class='del'>-{</div><div class='del'>-	unsigned long error_code = X86_PF_PROT | X86_PF_WRITE;</div><div class='add'>+	for (i = 0; i &lt;= desc-&gt;hdr.end_entry; i++) {</div><div class='add'>+		e = &amp;desc-&gt;entries[i];</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This function uses __put_user() independent of whether kernel or user</div><div class='del'>-	 * memory is accessed. This works fine because __put_user() does no</div><div class='del'>-	 * sanity checks of the pointer being accessed. All that it does is</div><div class='del'>-	 * to report when the access failed.</div><div class='del'>-	 *</div><div class='del'>-	 * Also, this function runs in atomic context, so __put_user() is not</div><div class='del'>-	 * allowed to sleep. The page-fault handler detects that it is running</div><div class='del'>-	 * in atomic context and will not try to take mmap_sem and handle the</div><div class='del'>-	 * fault, so additional pagefault_enable()/disable() calls are not</div><div class='del'>-	 * needed.</div><div class='del'>-	 *</div><div class='del'>-	 * The access can't be done via copy_to_user() here because</div><div class='del'>-	 * vc_write_mem() must not use string instructions to access unsafe</div><div class='del'>-	 * memory. The reason is that MOVS is emulated by the #VC handler by</div><div class='del'>-	 * splitting the move up into a read and a write and taking a nested #VC</div><div class='del'>-	 * exception on whatever of them is the MMIO access. Using string</div><div class='del'>-	 * instructions here would cause infinite nesting.</div><div class='del'>-	 */</div><div class='del'>-	switch (size) {</div><div class='del'>-	case 1: {</div><div class='del'>-		u8 d1;</div><div class='del'>-		u8 __user *target = (u8 __user *)dst;</div><div class='del'>-</div><div class='del'>-		memcpy(&amp;d1, buf, 1);</div><div class='del'>-		if (__put_user(d1, target))</div><div class='del'>-			goto fault;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case 2: {</div><div class='del'>-		u16 d2;</div><div class='del'>-		u16 __user *target = (u16 __user *)dst;</div><div class='add'>+		pfn = e-&gt;gfn;</div><div class='add'>+		vaddr = (unsigned long)pfn_to_kaddr(pfn);</div><div class='add'>+		size = e-&gt;pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K;</div><div class='add'>+		validate = e-&gt;operation == SNP_PAGE_STATE_PRIVATE;</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;d2, buf, 2);</div><div class='del'>-		if (__put_user(d2, target))</div><div class='del'>-			goto fault;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case 4: {</div><div class='del'>-		u32 d4;</div><div class='del'>-		u32 __user *target = (u32 __user *)dst;</div><div class='add'>+		rc = pvalidate(vaddr, size, validate);</div><div class='add'>+		if (!rc)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;d4, buf, 4);</div><div class='del'>-		if (__put_user(d4, target))</div><div class='del'>-			goto fault;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case 8: {</div><div class='del'>-		u64 d8;</div><div class='del'>-		u64 __user *target = (u64 __user *)dst;</div><div class='add'>+		if (rc == PVALIDATE_FAIL_SIZEMISMATCH &amp;&amp; size == RMP_PG_SIZE_2M) {</div><div class='add'>+			unsigned long vaddr_end = vaddr + PMD_SIZE;</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;d8, buf, 8);</div><div class='del'>-		if (__put_user(d8, target))</div><div class='del'>-			goto fault;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	default:</div><div class='del'>-		WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);</div><div class='del'>-		return ES_UNSUPPORTED;</div><div class='add'>+			for (; vaddr &lt; vaddr_end; vaddr += PAGE_SIZE, pfn++) {</div><div class='add'>+				rc = pvalidate(vaddr, RMP_PG_SIZE_4K, validate);</div><div class='add'>+				if (rc)</div><div class='add'>+					__pval_terminate(pfn, validate, RMP_PG_SIZE_4K, rc, 0);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			__pval_terminate(pfn, validate, size, rc, 0);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-</div><div class='del'>-fault:</div><div class='del'>-	if (user_mode(ctxt-&gt;regs))</div><div class='del'>-		error_code |= X86_PF_USER;</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;fi.vector = X86_TRAP_PF;</div><div class='del'>-	ctxt-&gt;fi.error_code = error_code;</div><div class='del'>-	ctxt-&gt;fi.cr2 = (unsigned long)dst;</div><div class='del'>-</div><div class='del'>-	return ES_EXCEPTION;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,</div><div class='del'>-				  char *src, char *buf, size_t size)</div><div class='add'>+static u64 svsm_build_ca_from_pfn_range(u64 pfn, u64 pfn_end, bool action,</div><div class='add'>+					struct svsm_pvalidate_call *pc)</div><div class='ctx'> {</div><div class='del'>-	unsigned long error_code = X86_PF_PROT;</div><div class='add'>+	struct svsm_pvalidate_entry *pe;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * This function uses __get_user() independent of whether kernel or user</div><div class='del'>-	 * memory is accessed. This works fine because __get_user() does no</div><div class='del'>-	 * sanity checks of the pointer being accessed. All that it does is</div><div class='del'>-	 * to report when the access failed.</div><div class='del'>-	 *</div><div class='del'>-	 * Also, this function runs in atomic context, so __get_user() is not</div><div class='del'>-	 * allowed to sleep. The page-fault handler detects that it is running</div><div class='del'>-	 * in atomic context and will not try to take mmap_sem and handle the</div><div class='del'>-	 * fault, so additional pagefault_enable()/disable() calls are not</div><div class='del'>-	 * needed.</div><div class='del'>-	 *</div><div class='del'>-	 * The access can't be done via copy_from_user() here because</div><div class='del'>-	 * vc_read_mem() must not use string instructions to access unsafe</div><div class='del'>-	 * memory. The reason is that MOVS is emulated by the #VC handler by</div><div class='del'>-	 * splitting the move up into a read and a write and taking a nested #VC</div><div class='del'>-	 * exception on whatever of them is the MMIO access. Using string</div><div class='del'>-	 * instructions here would cause infinite nesting.</div><div class='del'>-	 */</div><div class='del'>-	switch (size) {</div><div class='del'>-	case 1: {</div><div class='del'>-		u8 d1;</div><div class='del'>-		u8 __user *s = (u8 __user *)src;</div><div class='del'>-</div><div class='del'>-		if (__get_user(d1, s))</div><div class='del'>-			goto fault;</div><div class='del'>-		memcpy(buf, &amp;d1, 1);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case 2: {</div><div class='del'>-		u16 d2;</div><div class='del'>-		u16 __user *s = (u16 __user *)src;</div><div class='del'>-</div><div class='del'>-		if (__get_user(d2, s))</div><div class='del'>-			goto fault;</div><div class='del'>-		memcpy(buf, &amp;d2, 2);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case 4: {</div><div class='del'>-		u32 d4;</div><div class='del'>-		u32 __user *s = (u32 __user *)src;</div><div class='del'>-</div><div class='del'>-		if (__get_user(d4, s))</div><div class='del'>-			goto fault;</div><div class='del'>-		memcpy(buf, &amp;d4, 4);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	case 8: {</div><div class='del'>-		u64 d8;</div><div class='del'>-		u64 __user *s = (u64 __user *)src;</div><div class='del'>-		if (__get_user(d8, s))</div><div class='del'>-			goto fault;</div><div class='del'>-		memcpy(buf, &amp;d8, 8);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	default:</div><div class='del'>-		WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);</div><div class='del'>-		return ES_UNSUPPORTED;</div><div class='del'>-	}</div><div class='add'>+	/* Nothing in the CA yet */</div><div class='add'>+	pc-&gt;num_entries = 0;</div><div class='add'>+	pc-&gt;cur_index   = 0;</div><div class='ctx'> </div><div class='del'>-	return ES_OK;</div><div class='add'>+	pe = &amp;pc-&gt;entry[0];</div><div class='ctx'> </div><div class='del'>-fault:</div><div class='del'>-	if (user_mode(ctxt-&gt;regs))</div><div class='del'>-		error_code |= X86_PF_USER;</div><div class='add'>+	while (pfn &lt; pfn_end) {</div><div class='add'>+		pe-&gt;page_size = RMP_PG_SIZE_4K;</div><div class='add'>+		pe-&gt;action    = action;</div><div class='add'>+		pe-&gt;ignore_cf = 0;</div><div class='add'>+		pe-&gt;pfn       = pfn;</div><div class='ctx'> </div><div class='del'>-	ctxt-&gt;fi.vector = X86_TRAP_PF;</div><div class='del'>-	ctxt-&gt;fi.error_code = error_code;</div><div class='del'>-	ctxt-&gt;fi.cr2 = (unsigned long)src;</div><div class='add'>+		pe++;</div><div class='add'>+		pfn++;</div><div class='ctx'> </div><div class='del'>-	return ES_EXCEPTION;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt,</div><div class='del'>-					   unsigned long vaddr, phys_addr_t *paddr)</div><div class='del'>-{</div><div class='del'>-	unsigned long va = (unsigned long)vaddr;</div><div class='del'>-	unsigned int level;</div><div class='del'>-	phys_addr_t pa;</div><div class='del'>-	pgd_t *pgd;</div><div class='del'>-	pte_t *pte;</div><div class='del'>-</div><div class='del'>-	pgd = __va(read_cr3_pa());</div><div class='del'>-	pgd = &amp;pgd[pgd_index(va)];</div><div class='del'>-	pte = lookup_address_in_pgd(pgd, va, &amp;level);</div><div class='del'>-	if (!pte) {</div><div class='del'>-		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='del'>-		ctxt-&gt;fi.cr2        = vaddr;</div><div class='del'>-		ctxt-&gt;fi.error_code = 0;</div><div class='del'>-</div><div class='del'>-		if (user_mode(ctxt-&gt;regs))</div><div class='del'>-			ctxt-&gt;fi.error_code |= X86_PF_USER;</div><div class='del'>-</div><div class='del'>-		return ES_EXCEPTION;</div><div class='add'>+		pc-&gt;num_entries++;</div><div class='add'>+		if (pc-&gt;num_entries == SVSM_PVALIDATE_MAX_COUNT)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(pte_val(*pte) &amp; _PAGE_ENC))</div><div class='del'>-		/* Emulated MMIO to/from encrypted memory not supported */</div><div class='del'>-		return ES_UNSUPPORTED;</div><div class='del'>-</div><div class='del'>-	pa = (phys_addr_t)pte_pfn(*pte) &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	pa |= va &amp; ~page_level_mask(level);</div><div class='del'>-</div><div class='del'>-	*paddr = pa;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='add'>+	return pfn;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum es_result vc_ioio_check(struct es_em_ctxt *ctxt, u16 port, size_t size)</div><div class='add'>+static int svsm_build_ca_from_psc_desc(struct snp_psc_desc *desc, unsigned int desc_entry,</div><div class='add'>+				       struct svsm_pvalidate_call *pc)</div><div class='ctx'> {</div><div class='del'>-	BUG_ON(size &gt; 4);</div><div class='del'>-</div><div class='del'>-	if (user_mode(ctxt-&gt;regs)) {</div><div class='del'>-		struct thread_struct *t = &amp;current-&gt;thread;</div><div class='del'>-		struct io_bitmap *iobm = t-&gt;io_bitmap;</div><div class='del'>-		size_t idx;</div><div class='del'>-</div><div class='del'>-		if (!iobm)</div><div class='del'>-			goto fault;</div><div class='del'>-</div><div class='del'>-		for (idx = port; idx &lt; port + size; ++idx) {</div><div class='del'>-			if (test_bit(idx, iobm-&gt;bitmap))</div><div class='del'>-				goto fault;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='add'>+	struct svsm_pvalidate_entry *pe;</div><div class='add'>+	struct psc_entry *e;</div><div class='ctx'> </div><div class='del'>-fault:</div><div class='del'>-	ctxt-&gt;fi.vector = X86_TRAP_GP;</div><div class='del'>-	ctxt-&gt;fi.error_code = 0;</div><div class='add'>+	/* Nothing in the CA yet */</div><div class='add'>+	pc-&gt;num_entries = 0;</div><div class='add'>+	pc-&gt;cur_index   = 0;</div><div class='ctx'> </div><div class='del'>-	return ES_EXCEPTION;</div><div class='del'>-}</div><div class='add'>+	pe = &amp;pc-&gt;entry[0];</div><div class='add'>+	e  = &amp;desc-&gt;entries[desc_entry];</div><div class='ctx'> </div><div class='del'>-static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	long error_code = ctxt-&gt;fi.error_code;</div><div class='del'>-	int trapnr = ctxt-&gt;fi.vector;</div><div class='add'>+	while (desc_entry &lt;= desc-&gt;hdr.end_entry) {</div><div class='add'>+		pe-&gt;page_size = e-&gt;pagesize ? RMP_PG_SIZE_2M : RMP_PG_SIZE_4K;</div><div class='add'>+		pe-&gt;action    = e-&gt;operation == SNP_PAGE_STATE_PRIVATE;</div><div class='add'>+		pe-&gt;ignore_cf = 0;</div><div class='add'>+		pe-&gt;pfn       = e-&gt;gfn;</div><div class='ctx'> </div><div class='del'>-	ctxt-&gt;regs-&gt;orig_ax = ctxt-&gt;fi.error_code;</div><div class='add'>+		pe++;</div><div class='add'>+		e++;</div><div class='ctx'> </div><div class='del'>-	switch (trapnr) {</div><div class='del'>-	case X86_TRAP_GP:</div><div class='del'>-		exc_general_protection(ctxt-&gt;regs, error_code);</div><div class='del'>-		break;</div><div class='del'>-	case X86_TRAP_UD:</div><div class='del'>-		exc_invalid_op(ctxt-&gt;regs);</div><div class='del'>-		break;</div><div class='del'>-	case X86_TRAP_PF:</div><div class='del'>-		write_cr2(ctxt-&gt;fi.cr2);</div><div class='del'>-		exc_page_fault(ctxt-&gt;regs, error_code);</div><div class='del'>-		break;</div><div class='del'>-	case X86_TRAP_AC:</div><div class='del'>-		exc_alignment_check(ctxt-&gt;regs, error_code);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n");</div><div class='del'>-		BUG();</div><div class='add'>+		desc_entry++;</div><div class='add'>+		pc-&gt;num_entries++;</div><div class='add'>+		if (pc-&gt;num_entries == SVSM_PVALIDATE_MAX_COUNT)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Include code shared with pre-decompression boot stage */</div><div class='del'>-#include "shared.c"</div><div class='del'>-</div><div class='del'>-static inline struct svsm_ca *svsm_get_caa(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Use rIP-relative references when called early in the boot. If</div><div class='del'>-	 * -&gt;use_cas is set, then it is late in the boot and no need</div><div class='del'>-	 * to worry about rIP-relative references.</div><div class='del'>-	 */</div><div class='del'>-	if (RIP_REL_REF(sev_cfg).use_cas)</div><div class='del'>-		return this_cpu_read(svsm_caa);</div><div class='del'>-	else</div><div class='del'>-		return RIP_REL_REF(boot_svsm_caa);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static u64 svsm_get_caa_pa(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Use rIP-relative references when called early in the boot. If</div><div class='del'>-	 * -&gt;use_cas is set, then it is late in the boot and no need</div><div class='del'>-	 * to worry about rIP-relative references.</div><div class='del'>-	 */</div><div class='del'>-	if (RIP_REL_REF(sev_cfg).use_cas)</div><div class='del'>-		return this_cpu_read(svsm_caa_pa);</div><div class='del'>-	else</div><div class='del'>-		return RIP_REL_REF(boot_svsm_caa_pa);</div><div class='add'>+	return desc_entry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static noinstr void __sev_put_ghcb(struct ghcb_state *state)</div><div class='add'>+static void svsm_pval_pages(struct snp_psc_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct sev_es_runtime_data *data;</div><div class='del'>-	struct ghcb *ghcb;</div><div class='del'>-</div><div class='del'>-	WARN_ON(!irqs_disabled());</div><div class='del'>-</div><div class='del'>-	data = this_cpu_read(runtime_data);</div><div class='del'>-	ghcb = &amp;data-&gt;ghcb_page;</div><div class='del'>-</div><div class='del'>-	if (state-&gt;ghcb) {</div><div class='del'>-		/* Restore GHCB from Backup */</div><div class='del'>-		*ghcb = *state-&gt;ghcb;</div><div class='del'>-		data-&gt;backup_ghcb_active = false;</div><div class='del'>-		state-&gt;ghcb = NULL;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * Invalidate the GHCB so a VMGEXIT instruction issued</div><div class='del'>-		 * from userspace won't appear to be valid.</div><div class='del'>-		 */</div><div class='del'>-		vc_ghcb_invalidate(ghcb);</div><div class='del'>-		data-&gt;ghcb_active = false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int svsm_perform_call_protocol(struct svsm_call *call)</div><div class='del'>-{</div><div class='del'>-	struct ghcb_state state;</div><div class='add'>+	struct svsm_pvalidate_entry pv_4k[VMGEXIT_PSC_MAX_ENTRY];</div><div class='add'>+	unsigned int i, pv_4k_count = 0;</div><div class='add'>+	struct svsm_pvalidate_call *pc;</div><div class='add'>+	struct svsm_call call = {};</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	struct ghcb *ghcb;</div><div class='add'>+	bool action;</div><div class='add'>+	u64 pc_pa;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -666,180 +289,145 @@ static int svsm_perform_call_protocol(struct svsm_call *call)</div><div class='ctx'> 	flags = native_local_irq_save();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Use rip-relative references when called early in the boot. If</div><div class='del'>-	 * ghcbs_initialized is set, then it is late in the boot and no need</div><div class='del'>-	 * to worry about rip-relative references in called functions.</div><div class='add'>+	 * The SVSM calling area (CA) can support processing 510 entries at a</div><div class='add'>+	 * time. Loop through the Page State Change descriptor until the CA is</div><div class='add'>+	 * full or the last entry in the descriptor is reached, at which time</div><div class='add'>+	 * the SVSM is invoked. This repeats until all entries in the descriptor</div><div class='add'>+	 * are processed.</div><div class='ctx'> 	 */</div><div class='del'>-	if (RIP_REL_REF(sev_cfg).ghcbs_initialized)</div><div class='del'>-		ghcb = __sev_get_ghcb(&amp;state);</div><div class='del'>-	else if (RIP_REL_REF(boot_ghcb))</div><div class='del'>-		ghcb = RIP_REL_REF(boot_ghcb);</div><div class='del'>-	else</div><div class='del'>-		ghcb = NULL;</div><div class='add'>+	call.caa = svsm_get_caa();</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		ret = ghcb ? svsm_perform_ghcb_protocol(ghcb, call)</div><div class='del'>-			   : svsm_perform_msr_protocol(call);</div><div class='del'>-	} while (ret == -EAGAIN);</div><div class='add'>+	pc = (struct svsm_pvalidate_call *)call.caa-&gt;svsm_buffer;</div><div class='add'>+	pc_pa = svsm_get_caa_pa() + offsetof(struct svsm_ca, svsm_buffer);</div><div class='ctx'> </div><div class='del'>-	if (RIP_REL_REF(sev_cfg).ghcbs_initialized)</div><div class='del'>-		__sev_put_ghcb(&amp;state);</div><div class='add'>+	/* Protocol 0, Call ID 1 */</div><div class='add'>+	call.rax = SVSM_CORE_CALL(SVSM_CORE_PVALIDATE);</div><div class='add'>+	call.rcx = pc_pa;</div><div class='ctx'> </div><div class='del'>-	native_local_irq_restore(flags);</div><div class='add'>+	for (i = 0; i &lt;= desc-&gt;hdr.end_entry;) {</div><div class='add'>+		i = svsm_build_ca_from_psc_desc(desc, i, pc);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='add'>+		do {</div><div class='add'>+			ret = svsm_perform_call_protocol(&amp;call);</div><div class='add'>+			if (!ret)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='del'>-void noinstr __sev_es_nmi_complete(void)</div><div class='del'>-{</div><div class='del'>-	struct ghcb_state state;</div><div class='del'>-	struct ghcb *ghcb;</div><div class='add'>+			/*</div><div class='add'>+			 * Check if the entry failed because of an RMP mismatch (a</div><div class='add'>+			 * PVALIDATE at 2M was requested, but the page is mapped in</div><div class='add'>+			 * the RMP as 4K).</div><div class='add'>+			 */</div><div class='ctx'> </div><div class='del'>-	ghcb = __sev_get_ghcb(&amp;state);</div><div class='add'>+			if (call.rax_out == SVSM_PVALIDATE_FAIL_SIZEMISMATCH &amp;&amp;</div><div class='add'>+			    pc-&gt;entry[pc-&gt;cur_index].page_size == RMP_PG_SIZE_2M) {</div><div class='add'>+				/* Save this entry for post-processing at 4K */</div><div class='add'>+				pv_4k[pv_4k_count++] = pc-&gt;entry[pc-&gt;cur_index];</div><div class='add'>+</div><div class='add'>+				/* Skip to the next one unless at the end of the list */</div><div class='add'>+				pc-&gt;cur_index++;</div><div class='add'>+				if (pc-&gt;cur_index &lt; pc-&gt;num_entries)</div><div class='add'>+					ret = -EAGAIN;</div><div class='add'>+				else</div><div class='add'>+					ret = 0;</div><div class='add'>+			}</div><div class='add'>+		} while (ret == -EAGAIN);</div><div class='ctx'> </div><div class='del'>-	vc_ghcb_invalidate(ghcb);</div><div class='del'>-	ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE);</div><div class='del'>-	ghcb_set_sw_exit_info_1(ghcb, 0);</div><div class='del'>-	ghcb_set_sw_exit_info_2(ghcb, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			svsm_pval_terminate(pc, ret, call.rax_out);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	sev_es_wr_ghcb_msr(__pa_nodebug(ghcb));</div><div class='del'>-	VMGEXIT();</div><div class='add'>+	/* Process any entries that failed to be validated at 2M and validate them at 4K */</div><div class='add'>+	for (i = 0; i &lt; pv_4k_count; i++) {</div><div class='add'>+		u64 pfn, pfn_end;</div><div class='ctx'> </div><div class='del'>-	__sev_put_ghcb(&amp;state);</div><div class='del'>-}</div><div class='add'>+		action  = pv_4k[i].action;</div><div class='add'>+		pfn     = pv_4k[i].pfn;</div><div class='add'>+		pfn_end = pfn + 512;</div><div class='ctx'> </div><div class='del'>-static u64 __init get_snp_jump_table_addr(void)</div><div class='del'>-{</div><div class='del'>-	struct snp_secrets_page *secrets;</div><div class='del'>-	void __iomem *mem;</div><div class='del'>-	u64 addr;</div><div class='add'>+		while (pfn &lt; pfn_end) {</div><div class='add'>+			pfn = svsm_build_ca_from_pfn_range(pfn, pfn_end, action, pc);</div><div class='ctx'> </div><div class='del'>-	mem = ioremap_encrypted(secrets_pa, PAGE_SIZE);</div><div class='del'>-	if (!mem) {</div><div class='del'>-		pr_err("Unable to locate AP jump table address: failed to map the SNP secrets page.\n");</div><div class='del'>-		return 0;</div><div class='add'>+			ret = svsm_perform_call_protocol(&amp;call);</div><div class='add'>+			if (ret)</div><div class='add'>+				svsm_pval_terminate(pc, ret, call.rax_out);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	secrets = (__force struct snp_secrets_page *)mem;</div><div class='del'>-</div><div class='del'>-	addr = secrets-&gt;os_area.ap_jump_table_pa;</div><div class='del'>-	iounmap(mem);</div><div class='del'>-</div><div class='del'>-	return addr;</div><div class='add'>+	native_local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 __init get_jump_table_addr(void)</div><div class='add'>+static void pvalidate_pages(struct snp_psc_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct ghcb_state state;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct ghcb *ghcb;</div><div class='del'>-	u64 ret = 0;</div><div class='del'>-</div><div class='del'>-	if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP))</div><div class='del'>-		return get_snp_jump_table_addr();</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='add'>+	if (snp_vmpl)</div><div class='add'>+		svsm_pval_pages(desc);</div><div class='add'>+	else</div><div class='add'>+		pval_pages(desc);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ghcb = __sev_get_ghcb(&amp;state);</div><div class='add'>+static int vmgexit_psc(struct ghcb *ghcb, struct snp_psc_desc *desc)</div><div class='add'>+{</div><div class='add'>+	int cur_entry, end_entry, ret = 0;</div><div class='add'>+	struct snp_psc_desc *data;</div><div class='add'>+	struct es_em_ctxt ctxt;</div><div class='ctx'> </div><div class='ctx'> 	vc_ghcb_invalidate(ghcb);</div><div class='del'>-	ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE);</div><div class='del'>-	ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE);</div><div class='del'>-	ghcb_set_sw_exit_info_2(ghcb, 0);</div><div class='del'>-</div><div class='del'>-	sev_es_wr_ghcb_msr(__pa(ghcb));</div><div class='del'>-	VMGEXIT();</div><div class='del'>-</div><div class='del'>-	if (ghcb_sw_exit_info_1_is_valid(ghcb) &amp;&amp;</div><div class='del'>-	    ghcb_sw_exit_info_2_is_valid(ghcb))</div><div class='del'>-		ret = ghcb-&gt;save.sw_exit_info_2;</div><div class='del'>-</div><div class='del'>-	__sev_put_ghcb(&amp;state);</div><div class='del'>-</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void __head</div><div class='del'>-early_set_pages_state(unsigned long vaddr, unsigned long paddr,</div><div class='del'>-		      unsigned long npages, enum psc_op op)</div><div class='del'>-{</div><div class='del'>-	unsigned long paddr_end;</div><div class='del'>-	u64 val;</div><div class='add'>+	/* Copy the input desc into GHCB shared buffer */</div><div class='add'>+	data = (struct snp_psc_desc *)ghcb-&gt;shared_buffer;</div><div class='add'>+	memcpy(ghcb-&gt;shared_buffer, desc, min_t(int, GHCB_SHARED_BUF_SIZE, sizeof(*desc)));</div><div class='ctx'> </div><div class='del'>-	vaddr = vaddr &amp; PAGE_MASK;</div><div class='add'>+	/*</div><div class='add'>+	 * As per the GHCB specification, the hypervisor can resume the guest</div><div class='add'>+	 * before processing all the entries. Check whether all the entries</div><div class='add'>+	 * are processed. If not, then keep retrying. Note, the hypervisor</div><div class='add'>+	 * will update the data memory directly to indicate the status, so</div><div class='add'>+	 * reference the data-&gt;hdr everywhere.</div><div class='add'>+	 *</div><div class='add'>+	 * The strategy here is to wait for the hypervisor to change the page</div><div class='add'>+	 * state in the RMP table before guest accesses the memory pages. If the</div><div class='add'>+	 * page state change was not successful, then later memory access will</div><div class='add'>+	 * result in a crash.</div><div class='add'>+	 */</div><div class='add'>+	cur_entry = data-&gt;hdr.cur_entry;</div><div class='add'>+	end_entry = data-&gt;hdr.end_entry;</div><div class='ctx'> </div><div class='del'>-	paddr = paddr &amp; PAGE_MASK;</div><div class='del'>-	paddr_end = paddr + (npages &lt;&lt; PAGE_SHIFT);</div><div class='add'>+	while (data-&gt;hdr.cur_entry &lt;= data-&gt;hdr.end_entry) {</div><div class='add'>+		ghcb_set_sw_scratch(ghcb, (u64)__pa(data));</div><div class='ctx'> </div><div class='del'>-	while (paddr &lt; paddr_end) {</div><div class='del'>-		/* Page validation must be rescinded before changing to shared */</div><div class='del'>-		if (op == SNP_PAGE_STATE_SHARED)</div><div class='del'>-			pvalidate_4k_page(vaddr, paddr, false);</div><div class='add'>+		/* This will advance the shared buffer data points to. */</div><div class='add'>+		ret = sev_es_ghcb_hv_call(ghcb, &amp;ctxt, SVM_VMGEXIT_PSC, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Use the MSR protocol because this function can be called before</div><div class='del'>-		 * the GHCB is established.</div><div class='add'>+		 * Page State Change VMGEXIT can pass error code through</div><div class='add'>+		 * exit_info_2.</div><div class='ctx'> 		 */</div><div class='del'>-		sev_es_wr_ghcb_msr(GHCB_MSR_PSC_REQ_GFN(paddr &gt;&gt; PAGE_SHIFT, op));</div><div class='del'>-		VMGEXIT();</div><div class='del'>-</div><div class='del'>-		val = sev_es_rd_ghcb_msr();</div><div class='del'>-</div><div class='del'>-		if (GHCB_RESP_CODE(val) != GHCB_MSR_PSC_RESP)</div><div class='del'>-			goto e_term;</div><div class='del'>-</div><div class='del'>-		if (GHCB_MSR_PSC_RESP_VAL(val))</div><div class='del'>-			goto e_term;</div><div class='add'>+		if (WARN(ret || ghcb-&gt;save.sw_exit_info_2,</div><div class='add'>+			 "SNP: PSC failed ret=%d exit_info_2=%llx\n",</div><div class='add'>+			 ret, ghcb-&gt;save.sw_exit_info_2)) {</div><div class='add'>+			ret = 1;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		/* Page validation must be performed after changing to private */</div><div class='del'>-		if (op == SNP_PAGE_STATE_PRIVATE)</div><div class='del'>-			pvalidate_4k_page(vaddr, paddr, true);</div><div class='add'>+		/* Verify that reserved bit is not set */</div><div class='add'>+		if (WARN(data-&gt;hdr.reserved, "Reserved bit is set in the PSC header\n")) {</div><div class='add'>+			ret = 1;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		vaddr += PAGE_SIZE;</div><div class='del'>-		paddr += PAGE_SIZE;</div><div class='add'>+		/*</div><div class='add'>+		 * Sanity check that entry processing is not going backwards.</div><div class='add'>+		 * This will happen only if hypervisor is tricking us.</div><div class='add'>+		 */</div><div class='add'>+		if (WARN(data-&gt;hdr.end_entry &gt; end_entry || cur_entry &gt; data-&gt;hdr.cur_entry,</div><div class='add'>+"SNP: PSC processing going backward, end_entry %d (got %d) cur_entry %d (got %d)\n",</div><div class='add'>+			 end_entry, data-&gt;hdr.end_entry, cur_entry, data-&gt;hdr.cur_entry)) {</div><div class='add'>+			ret = 1;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-e_term:</div><div class='del'>-	sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_PSC);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __head early_snp_set_memory_private(unsigned long vaddr, unsigned long paddr,</div><div class='del'>-					 unsigned long npages)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * This can be invoked in early boot while running identity mapped, so</div><div class='del'>-	 * use an open coded check for SNP instead of using cc_platform_has().</div><div class='del'>-	 * This eliminates worries about jump tables or checking boot_cpu_data</div><div class='del'>-	 * in the cc_platform_has() function.</div><div class='del'>-	 */</div><div class='del'>-	if (!(RIP_REL_REF(sev_status) &amp; MSR_AMD64_SEV_SNP_ENABLED))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	 /*</div><div class='del'>-	  * Ask the hypervisor to mark the memory pages as private in the RMP</div><div class='del'>-	  * table.</div><div class='del'>-	  */</div><div class='del'>-	early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_PRIVATE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __head early_snp_set_memory_shared(unsigned long vaddr, unsigned long paddr,</div><div class='del'>-					unsigned long npages)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * This can be invoked in early boot while running identity mapped, so</div><div class='del'>-	 * use an open coded check for SNP instead of using cc_platform_has().</div><div class='del'>-	 * This eliminates worries about jump tables or checking boot_cpu_data</div><div class='del'>-	 * in the cc_platform_has() function.</div><div class='del'>-	 */</div><div class='del'>-	if (!(RIP_REL_REF(sev_status) &amp; MSR_AMD64_SEV_SNP_ENABLED))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	 /* Ask hypervisor to mark the memory pages shared in the RMP table. */</div><div class='del'>-	early_set_pages_state(vaddr, paddr, npages, SNP_PAGE_STATE_SHARED);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned long __set_pages_state(struct snp_psc_desc *data, unsigned long vaddr,</div><div class='hunk'>@@ -959,6 +547,102 @@ void snp_accept_memory(phys_addr_t start, phys_addr_t end)</div><div class='ctx'> 	set_pages_state(vaddr, npages, SNP_PAGE_STATE_PRIVATE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vmgexit_ap_control(u64 event, struct sev_es_save_area *vmsa, u32 apic_id)</div><div class='add'>+{</div><div class='add'>+	bool create = event != SVM_VMGEXIT_AP_DESTROY;</div><div class='add'>+	struct ghcb_state state;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ghcb *ghcb;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+</div><div class='add'>+	ghcb = __sev_get_ghcb(&amp;state);</div><div class='add'>+</div><div class='add'>+	vc_ghcb_invalidate(ghcb);</div><div class='add'>+</div><div class='add'>+	if (create)</div><div class='add'>+		ghcb_set_rax(ghcb, vmsa-&gt;sev_features);</div><div class='add'>+</div><div class='add'>+	ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_CREATION);</div><div class='add'>+	ghcb_set_sw_exit_info_1(ghcb,</div><div class='add'>+				((u64)apic_id &lt;&lt; 32)	|</div><div class='add'>+				((u64)snp_vmpl &lt;&lt; 16)	|</div><div class='add'>+				event);</div><div class='add'>+	ghcb_set_sw_exit_info_2(ghcb, __pa(vmsa));</div><div class='add'>+</div><div class='add'>+	sev_es_wr_ghcb_msr(__pa(ghcb));</div><div class='add'>+	VMGEXIT();</div><div class='add'>+</div><div class='add'>+	if (!ghcb_sw_exit_info_1_is_valid(ghcb) ||</div><div class='add'>+	    lower_32_bits(ghcb-&gt;save.sw_exit_info_1)) {</div><div class='add'>+		pr_err("SNP AP %s error\n", (create ? "CREATE" : "DESTROY"));</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__sev_put_ghcb(&amp;state);</div><div class='add'>+</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int snp_set_vmsa(void *va, void *caa, int apic_id, bool make_vmsa)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (snp_vmpl) {</div><div class='add'>+		struct svsm_call call = {};</div><div class='add'>+		unsigned long flags;</div><div class='add'>+</div><div class='add'>+		local_irq_save(flags);</div><div class='add'>+</div><div class='add'>+		call.caa = this_cpu_read(svsm_caa);</div><div class='add'>+		call.rcx = __pa(va);</div><div class='add'>+</div><div class='add'>+		if (make_vmsa) {</div><div class='add'>+			/* Protocol 0, Call ID 2 */</div><div class='add'>+			call.rax = SVSM_CORE_CALL(SVSM_CORE_CREATE_VCPU);</div><div class='add'>+			call.rdx = __pa(caa);</div><div class='add'>+			call.r8  = apic_id;</div><div class='add'>+		} else {</div><div class='add'>+			/* Protocol 0, Call ID 3 */</div><div class='add'>+			call.rax = SVSM_CORE_CALL(SVSM_CORE_DELETE_VCPU);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = svsm_perform_call_protocol(&amp;call);</div><div class='add'>+</div><div class='add'>+		local_irq_restore(flags);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * If the kernel runs at VMPL0, it can change the VMSA</div><div class='add'>+		 * bit for a page using the RMPADJUST instruction.</div><div class='add'>+		 * However, for the instruction to succeed it must</div><div class='add'>+		 * target the permissions of a lesser privileged (higher</div><div class='add'>+		 * numbered) VMPL level, so use VMPL1.</div><div class='add'>+		 */</div><div class='add'>+		u64 attrs = 1;</div><div class='add'>+</div><div class='add'>+		if (make_vmsa)</div><div class='add'>+			attrs |= RMPADJUST_VMSA_PAGE_BIT;</div><div class='add'>+</div><div class='add'>+		ret = rmpadjust((unsigned long)va, RMP_PG_SIZE_4K, attrs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void snp_cleanup_vmsa(struct sev_es_save_area *vmsa, int apic_id)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = snp_set_vmsa(vmsa, NULL, apic_id, false);</div><div class='add'>+	if (err)</div><div class='add'>+		pr_err("clear VMSA page failed (%u), leaking page\n", err);</div><div class='add'>+	else</div><div class='add'>+		free_page((unsigned long)vmsa);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void set_pte_enc(pte_t *kpte, int level, void *va)</div><div class='ctx'> {</div><div class='ctx'> 	struct pte_enc_desc d = {</div><div class='hunk'>@@ -1005,7 +689,8 @@ static void unshare_all_memory(void)</div><div class='ctx'> 			data = per_cpu(runtime_data, cpu);</div><div class='ctx'> 			ghcb = (unsigned long)&amp;data-&gt;ghcb_page;</div><div class='ctx'> </div><div class='del'>-			if (addr &lt;= ghcb &amp;&amp; ghcb &lt;= addr + size) {</div><div class='add'>+			/* Handle the case of a huge page containing the GHCB page */</div><div class='add'>+			if (addr &lt;= ghcb &amp;&amp; ghcb &lt; addr + size) {</div><div class='ctx'> 				skipped_addr = true;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1055,11 +740,70 @@ void snp_kexec_begin(void)</div><div class='ctx'> 		pr_warn("Failed to stop shared&lt;-&gt;private conversions\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Shutdown all APs except the one handling kexec/kdump and clearing</div><div class='add'>+ * the VMSA tag on AP's VMSA pages as they are not being used as</div><div class='add'>+ * VMSA page anymore.</div><div class='add'>+ */</div><div class='add'>+static void shutdown_all_aps(void)</div><div class='add'>+{</div><div class='add'>+	struct sev_es_save_area *vmsa;</div><div class='add'>+	int apic_id, this_cpu, cpu;</div><div class='add'>+</div><div class='add'>+	this_cpu = get_cpu();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * APs are already in HLT loop when enc_kexec_finish() callback</div><div class='add'>+	 * is invoked.</div><div class='add'>+	 */</div><div class='add'>+	for_each_present_cpu(cpu) {</div><div class='add'>+		vmsa = per_cpu(sev_vmsa, cpu);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The BSP or offlined APs do not have guest allocated VMSA</div><div class='add'>+		 * and there is no need  to clear the VMSA tag for this page.</div><div class='add'>+		 */</div><div class='add'>+		if (!vmsa)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Cannot clear the VMSA tag for the currently running vCPU.</div><div class='add'>+		 */</div><div class='add'>+		if (this_cpu == cpu) {</div><div class='add'>+			unsigned long pa;</div><div class='add'>+			struct page *p;</div><div class='add'>+</div><div class='add'>+			pa = __pa(vmsa);</div><div class='add'>+			/*</div><div class='add'>+			 * Mark the VMSA page of the running vCPU as offline</div><div class='add'>+			 * so that is excluded and not touched by makedumpfile</div><div class='add'>+			 * while generating vmcore during kdump.</div><div class='add'>+			 */</div><div class='add'>+			p = pfn_to_online_page(pa &gt;&gt; PAGE_SHIFT);</div><div class='add'>+			if (p)</div><div class='add'>+				__SetPageOffline(p);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		apic_id = cpuid_to_apicid[cpu];</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Issue AP destroy to ensure AP gets kicked out of guest mode</div><div class='add'>+		 * to allow using RMPADJUST to remove the VMSA tag on it's</div><div class='add'>+		 * VMSA page.</div><div class='add'>+		 */</div><div class='add'>+		vmgexit_ap_control(SVM_VMGEXIT_AP_DESTROY, vmsa, apic_id);</div><div class='add'>+		snp_cleanup_vmsa(vmsa, apic_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	put_cpu();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void snp_kexec_finish(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_es_runtime_data *data;</div><div class='add'>+	unsigned long size, addr;</div><div class='ctx'> 	unsigned int level, cpu;</div><div class='del'>-	unsigned long size;</div><div class='ctx'> 	struct ghcb *ghcb;</div><div class='ctx'> 	pte_t *pte;</div><div class='ctx'> </div><div class='hunk'>@@ -1069,6 +813,8 @@ void snp_kexec_finish(void)</div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_KEXEC_CORE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	shutdown_all_aps();</div><div class='add'>+</div><div class='ctx'> 	unshare_all_memory();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1085,54 +831,11 @@ void snp_kexec_finish(void)</div><div class='ctx'> 		ghcb = &amp;data-&gt;ghcb_page;</div><div class='ctx'> 		pte = lookup_address((unsigned long)ghcb, &amp;level);</div><div class='ctx'> 		size = page_level_size(level);</div><div class='del'>-		set_pte_enc(pte, level, (void *)ghcb);</div><div class='del'>-		snp_set_memory_private((unsigned long)ghcb, (size / PAGE_SIZE));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int snp_set_vmsa(void *va, void *caa, int apic_id, bool make_vmsa)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (snp_vmpl) {</div><div class='del'>-		struct svsm_call call = {};</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-		call.caa = this_cpu_read(svsm_caa);</div><div class='del'>-		call.rcx = __pa(va);</div><div class='del'>-</div><div class='del'>-		if (make_vmsa) {</div><div class='del'>-			/* Protocol 0, Call ID 2 */</div><div class='del'>-			call.rax = SVSM_CORE_CALL(SVSM_CORE_CREATE_VCPU);</div><div class='del'>-			call.rdx = __pa(caa);</div><div class='del'>-			call.r8  = apic_id;</div><div class='del'>-		} else {</div><div class='del'>-			/* Protocol 0, Call ID 3 */</div><div class='del'>-			call.rax = SVSM_CORE_CALL(SVSM_CORE_DELETE_VCPU);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = svsm_perform_call_protocol(&amp;call);</div><div class='del'>-</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * If the kernel runs at VMPL0, it can change the VMSA</div><div class='del'>-		 * bit for a page using the RMPADJUST instruction.</div><div class='del'>-		 * However, for the instruction to succeed it must</div><div class='del'>-		 * target the permissions of a lesser privileged (higher</div><div class='del'>-		 * numbered) VMPL level, so use VMPL1.</div><div class='del'>-		 */</div><div class='del'>-		u64 attrs = 1;</div><div class='del'>-</div><div class='del'>-		if (make_vmsa)</div><div class='del'>-			attrs |= RMPADJUST_VMSA_PAGE_BIT;</div><div class='del'>-</div><div class='del'>-		ret = rmpadjust((unsigned long)va, RMP_PG_SIZE_4K, attrs);</div><div class='add'>+		/* Handle the case of a huge page containing the GHCB page */</div><div class='add'>+		addr = (unsigned long)ghcb &amp; page_level_mask(level);</div><div class='add'>+		set_pte_enc(pte, level, (void *)addr);</div><div class='add'>+		snp_set_memory_private(addr, (size / PAGE_SIZE));</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __ATTR_BASE		(SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK)</div><div class='hunk'>@@ -1166,24 +869,10 @@ static void *snp_alloc_vmsa_page(int cpu)</div><div class='ctx'> 	return page_address(p + 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void snp_cleanup_vmsa(struct sev_es_save_area *vmsa, int apic_id)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = snp_set_vmsa(vmsa, NULL, apic_id, false);</div><div class='del'>-	if (err)</div><div class='del'>-		pr_err("clear VMSA page failed (%u), leaking page\n", err);</div><div class='del'>-	else</div><div class='del'>-		free_page((unsigned long)vmsa);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_es_save_area *cur_vmsa, *vmsa;</div><div class='del'>-	struct ghcb_state state;</div><div class='ctx'> 	struct svsm_ca *caa;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct ghcb *ghcb;</div><div class='ctx'> 	u8 sipi_vector;</div><div class='ctx'> 	int cpu, ret;</div><div class='ctx'> 	u64 cr4;</div><div class='hunk'>@@ -1297,33 +986,7 @@ static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Issue VMGEXIT AP Creation NAE event */</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-	ghcb = __sev_get_ghcb(&amp;state);</div><div class='del'>-</div><div class='del'>-	vc_ghcb_invalidate(ghcb);</div><div class='del'>-	ghcb_set_rax(ghcb, vmsa-&gt;sev_features);</div><div class='del'>-	ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_CREATION);</div><div class='del'>-	ghcb_set_sw_exit_info_1(ghcb,</div><div class='del'>-				((u64)apic_id &lt;&lt; 32)	|</div><div class='del'>-				((u64)snp_vmpl &lt;&lt; 16)	|</div><div class='del'>-				SVM_VMGEXIT_AP_CREATE);</div><div class='del'>-	ghcb_set_sw_exit_info_2(ghcb, __pa(vmsa));</div><div class='del'>-</div><div class='del'>-	sev_es_wr_ghcb_msr(__pa(ghcb));</div><div class='del'>-	VMGEXIT();</div><div class='del'>-</div><div class='del'>-	if (!ghcb_sw_exit_info_1_is_valid(ghcb) ||</div><div class='del'>-	    lower_32_bits(ghcb-&gt;save.sw_exit_info_1)) {</div><div class='del'>-		pr_err("SNP AP Creation error\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__sev_put_ghcb(&amp;state);</div><div class='del'>-</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	/* Perform cleanup if there was an error */</div><div class='add'>+	ret = vmgexit_ap_control(SVM_VMGEXIT_AP_CREATE, vmsa, apic_id);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		snp_cleanup_vmsa(vmsa, apic_id);</div><div class='ctx'> 		vmsa = NULL;</div><div class='hunk'>@@ -1417,90 +1080,6 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Writes to the SVSM CAA MSR are ignored */</div><div class='del'>-static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write)</div><div class='del'>-{</div><div class='del'>-	if (write)</div><div class='del'>-		return ES_OK;</div><div class='del'>-</div><div class='del'>-	regs-&gt;ax = lower_32_bits(this_cpu_read(svsm_caa_pa));</div><div class='del'>-	regs-&gt;dx = upper_32_bits(this_cpu_read(svsm_caa_pa));</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * TSC related accesses should not exit to the hypervisor when a guest is</div><div class='del'>- * executing with Secure TSC enabled, so special handling is required for</div><div class='del'>- * accesses of MSR_IA32_TSC and MSR_AMD64_GUEST_TSC_FREQ.</div><div class='del'>- */</div><div class='del'>-static enum es_result __vc_handle_secure_tsc_msrs(struct pt_regs *regs, bool write)</div><div class='del'>-{</div><div class='del'>-	u64 tsc;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * GUEST_TSC_FREQ should not be intercepted when Secure TSC is enabled.</div><div class='del'>-	 * Terminate the SNP guest when the interception is enabled.</div><div class='del'>-	 */</div><div class='del'>-	if (regs-&gt;cx == MSR_AMD64_GUEST_TSC_FREQ)</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Writes: Writing to MSR_IA32_TSC can cause subsequent reads of the TSC</div><div class='del'>-	 *         to return undefined values, so ignore all writes.</div><div class='del'>-	 *</div><div class='del'>-	 * Reads: Reads of MSR_IA32_TSC should return the current TSC value, use</div><div class='del'>-	 *        the value returned by rdtsc_ordered().</div><div class='del'>-	 */</div><div class='del'>-	if (write) {</div><div class='del'>-		WARN_ONCE(1, "TSC MSR writes are verboten!\n");</div><div class='del'>-		return ES_OK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tsc = rdtsc_ordered();</div><div class='del'>-	regs-&gt;ax = lower_32_bits(tsc);</div><div class='del'>-	regs-&gt;dx = upper_32_bits(tsc);</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='del'>-	enum es_result ret;</div><div class='del'>-	bool write;</div><div class='del'>-</div><div class='del'>-	/* Is it a WRMSR? */</div><div class='del'>-	write = ctxt-&gt;insn.opcode.bytes[1] == 0x30;</div><div class='del'>-</div><div class='del'>-	switch (regs-&gt;cx) {</div><div class='del'>-	case MSR_SVSM_CAA:</div><div class='del'>-		return __vc_handle_msr_caa(regs, write);</div><div class='del'>-	case MSR_IA32_TSC:</div><div class='del'>-	case MSR_AMD64_GUEST_TSC_FREQ:</div><div class='del'>-		if (sev_status &amp; MSR_AMD64_SNP_SECURE_TSC)</div><div class='del'>-			return __vc_handle_secure_tsc_msrs(regs, write);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ghcb_set_rcx(ghcb, regs-&gt;cx);</div><div class='del'>-	if (write) {</div><div class='del'>-		ghcb_set_rax(ghcb, regs-&gt;ax);</div><div class='del'>-		ghcb_set_rdx(ghcb, regs-&gt;dx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, write, 0);</div><div class='del'>-</div><div class='del'>-	if ((ret == ES_OK) &amp;&amp; !write) {</div><div class='del'>-		regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='del'>-		regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void snp_register_per_cpu_ghcb(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_es_runtime_data *data;</div><div class='hunk'>@@ -1713,748 +1292,6 @@ void __init sev_es_init_vc_handling(void)</div><div class='ctx'> 	initial_vc_handler = (unsigned long)kernel_exc_vmm_communication;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	int trapnr = ctxt-&gt;fi.vector;</div><div class='del'>-</div><div class='del'>-	if (trapnr == X86_TRAP_PF)</div><div class='del'>-		native_write_cr2(ctxt-&gt;fi.cr2);</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;regs-&gt;orig_ax = ctxt-&gt;fi.error_code;</div><div class='del'>-	do_early_exception(ctxt-&gt;regs, trapnr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long *vc_insn_get_rm(struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	long *reg_array;</div><div class='del'>-	int offset;</div><div class='del'>-</div><div class='del'>-	reg_array = (long *)ctxt-&gt;regs;</div><div class='del'>-	offset    = insn_get_modrm_rm_off(&amp;ctxt-&gt;insn, ctxt-&gt;regs);</div><div class='del'>-</div><div class='del'>-	if (offset &lt; 0)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	offset /= sizeof(long);</div><div class='del'>-</div><div class='del'>-	return reg_array + offset;</div><div class='del'>-}</div><div class='del'>-static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt,</div><div class='del'>-				 unsigned int bytes, bool read)</div><div class='del'>-{</div><div class='del'>-	u64 exit_code, exit_info_1, exit_info_2;</div><div class='del'>-	unsigned long ghcb_pa = __pa(ghcb);</div><div class='del'>-	enum es_result res;</div><div class='del'>-	phys_addr_t paddr;</div><div class='del'>-	void __user *ref;</div><div class='del'>-</div><div class='del'>-	ref = insn_get_addr_ref(&amp;ctxt-&gt;insn, ctxt-&gt;regs);</div><div class='del'>-	if (ref == (void __user *)-1L)</div><div class='del'>-		return ES_UNSUPPORTED;</div><div class='del'>-</div><div class='del'>-	exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE;</div><div class='del'>-</div><div class='del'>-	res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &amp;paddr);</div><div class='del'>-	if (res != ES_OK) {</div><div class='del'>-		if (res == ES_EXCEPTION &amp;&amp; !read)</div><div class='del'>-			ctxt-&gt;fi.error_code |= X86_PF_WRITE;</div><div class='del'>-</div><div class='del'>-		return res;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	exit_info_1 = paddr;</div><div class='del'>-	/* Can never be greater than 8 */</div><div class='del'>-	exit_info_2 = bytes;</div><div class='del'>-</div><div class='del'>-	ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer));</div><div class='del'>-</div><div class='del'>-	return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The MOVS instruction has two memory operands, which raises the</div><div class='del'>- * problem that it is not known whether the access to the source or the</div><div class='del'>- * destination caused the #VC exception (and hence whether an MMIO read</div><div class='del'>- * or write operation needs to be emulated).</div><div class='del'>- *</div><div class='del'>- * Instead of playing games with walking page-tables and trying to guess</div><div class='del'>- * whether the source or destination is an MMIO range, split the move</div><div class='del'>- * into two operations, a read and a write with only one memory operand.</div><div class='del'>- * This will cause a nested #VC exception on the MMIO address which can</div><div class='del'>- * then be handled.</div><div class='del'>- *</div><div class='del'>- * This implementation has the benefit that it also supports MOVS where</div><div class='del'>- * source _and_ destination are MMIO regions.</div><div class='del'>- *</div><div class='del'>- * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a</div><div class='del'>- * rare operation. If it turns out to be a performance problem the split</div><div class='del'>- * operations can be moved to memcpy_fromio() and memcpy_toio().</div><div class='del'>- */</div><div class='del'>-static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt,</div><div class='del'>-					  unsigned int bytes)</div><div class='del'>-{</div><div class='del'>-	unsigned long ds_base, es_base;</div><div class='del'>-	unsigned char *src, *dst;</div><div class='del'>-	unsigned char buffer[8];</div><div class='del'>-	enum es_result ret;</div><div class='del'>-	bool rep;</div><div class='del'>-	int off;</div><div class='del'>-</div><div class='del'>-	ds_base = insn_get_seg_base(ctxt-&gt;regs, INAT_SEG_REG_DS);</div><div class='del'>-	es_base = insn_get_seg_base(ctxt-&gt;regs, INAT_SEG_REG_ES);</div><div class='del'>-</div><div class='del'>-	if (ds_base == -1L || es_base == -1L) {</div><div class='del'>-		ctxt-&gt;fi.vector = X86_TRAP_GP;</div><div class='del'>-		ctxt-&gt;fi.error_code = 0;</div><div class='del'>-		return ES_EXCEPTION;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	src = ds_base + (unsigned char *)ctxt-&gt;regs-&gt;si;</div><div class='del'>-	dst = es_base + (unsigned char *)ctxt-&gt;regs-&gt;di;</div><div class='del'>-</div><div class='del'>-	ret = vc_read_mem(ctxt, src, buffer, bytes);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = vc_write_mem(ctxt, dst, buffer, bytes);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (ctxt-&gt;regs-&gt;flags &amp; X86_EFLAGS_DF)</div><div class='del'>-		off = -bytes;</div><div class='del'>-	else</div><div class='del'>-		off =  bytes;</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;regs-&gt;si += off;</div><div class='del'>-	ctxt-&gt;regs-&gt;di += off;</div><div class='del'>-</div><div class='del'>-	rep = insn_has_rep_prefix(&amp;ctxt-&gt;insn);</div><div class='del'>-	if (rep)</div><div class='del'>-		ctxt-&gt;regs-&gt;cx -= 1;</div><div class='del'>-</div><div class='del'>-	if (!rep || ctxt-&gt;regs-&gt;cx == 0)</div><div class='del'>-		return ES_OK;</div><div class='del'>-	else</div><div class='del'>-		return ES_RETRY;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct insn *insn = &amp;ctxt-&gt;insn;</div><div class='del'>-	enum insn_mmio_type mmio;</div><div class='del'>-	unsigned int bytes = 0;</div><div class='del'>-	enum es_result ret;</div><div class='del'>-	u8 sign_byte;</div><div class='del'>-	long *reg_data;</div><div class='del'>-</div><div class='del'>-	mmio = insn_decode_mmio(insn, &amp;bytes);</div><div class='del'>-	if (mmio == INSN_MMIO_DECODE_FAILED)</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='del'>-</div><div class='del'>-	if (mmio != INSN_MMIO_WRITE_IMM &amp;&amp; mmio != INSN_MMIO_MOVS) {</div><div class='del'>-		reg_data = insn_get_modrm_reg_ptr(insn, ctxt-&gt;regs);</div><div class='del'>-		if (!reg_data)</div><div class='del'>-			return ES_DECODE_FAILED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (user_mode(ctxt-&gt;regs))</div><div class='del'>-		return ES_UNSUPPORTED;</div><div class='del'>-</div><div class='del'>-	switch (mmio) {</div><div class='del'>-	case INSN_MMIO_WRITE:</div><div class='del'>-		memcpy(ghcb-&gt;shared_buffer, reg_data, bytes);</div><div class='del'>-		ret = vc_do_mmio(ghcb, ctxt, bytes, false);</div><div class='del'>-		break;</div><div class='del'>-	case INSN_MMIO_WRITE_IMM:</div><div class='del'>-		memcpy(ghcb-&gt;shared_buffer, insn-&gt;immediate1.bytes, bytes);</div><div class='del'>-		ret = vc_do_mmio(ghcb, ctxt, bytes, false);</div><div class='del'>-		break;</div><div class='del'>-	case INSN_MMIO_READ:</div><div class='del'>-		ret = vc_do_mmio(ghcb, ctxt, bytes, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* Zero-extend for 32-bit operation */</div><div class='del'>-		if (bytes == 4)</div><div class='del'>-			*reg_data = 0;</div><div class='del'>-</div><div class='del'>-		memcpy(reg_data, ghcb-&gt;shared_buffer, bytes);</div><div class='del'>-		break;</div><div class='del'>-	case INSN_MMIO_READ_ZERO_EXTEND:</div><div class='del'>-		ret = vc_do_mmio(ghcb, ctxt, bytes, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* Zero extend based on operand size */</div><div class='del'>-		memset(reg_data, 0, insn-&gt;opnd_bytes);</div><div class='del'>-		memcpy(reg_data, ghcb-&gt;shared_buffer, bytes);</div><div class='del'>-		break;</div><div class='del'>-	case INSN_MMIO_READ_SIGN_EXTEND:</div><div class='del'>-		ret = vc_do_mmio(ghcb, ctxt, bytes, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (bytes == 1) {</div><div class='del'>-			u8 *val = (u8 *)ghcb-&gt;shared_buffer;</div><div class='del'>-</div><div class='del'>-			sign_byte = (*val &amp; 0x80) ? 0xff : 0x00;</div><div class='del'>-		} else {</div><div class='del'>-			u16 *val = (u16 *)ghcb-&gt;shared_buffer;</div><div class='del'>-</div><div class='del'>-			sign_byte = (*val &amp; 0x8000) ? 0xff : 0x00;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Sign extend based on operand size */</div><div class='del'>-		memset(reg_data, sign_byte, insn-&gt;opnd_bytes);</div><div class='del'>-		memcpy(reg_data, ghcb-&gt;shared_buffer, bytes);</div><div class='del'>-		break;</div><div class='del'>-	case INSN_MMIO_MOVS:</div><div class='del'>-		ret = vc_handle_mmio_movs(ctxt, bytes);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = ES_UNSUPPORTED;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_dr7_write(struct ghcb *ghcb,</div><div class='del'>-					  struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct sev_es_runtime_data *data = this_cpu_read(runtime_data);</div><div class='del'>-	long val, *reg = vc_insn_get_rm(ctxt);</div><div class='del'>-	enum es_result ret;</div><div class='del'>-</div><div class='del'>-	if (sev_status &amp; MSR_AMD64_SNP_DEBUG_SWAP)</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	if (!reg)</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='del'>-</div><div class='del'>-	val = *reg;</div><div class='del'>-</div><div class='del'>-	/* Upper 32 bits must be written as zeroes */</div><div class='del'>-	if (val &gt;&gt; 32) {</div><div class='del'>-		ctxt-&gt;fi.vector = X86_TRAP_GP;</div><div class='del'>-		ctxt-&gt;fi.error_code = 0;</div><div class='del'>-		return ES_EXCEPTION;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear out other reserved bits and set bit 10 */</div><div class='del'>-	val = (val &amp; 0xffff23ffL) | BIT(10);</div><div class='del'>-</div><div class='del'>-	/* Early non-zero writes to DR7 are not supported */</div><div class='del'>-	if (!data &amp;&amp; (val &amp; ~DR7_RESET_VALUE))</div><div class='del'>-		return ES_UNSUPPORTED;</div><div class='del'>-</div><div class='del'>-	/* Using a value of 0 for ExitInfo1 means RAX holds the value */</div><div class='del'>-	ghcb_set_rax(ghcb, val);</div><div class='del'>-	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (data)</div><div class='del'>-		data-&gt;dr7 = val;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_dr7_read(struct ghcb *ghcb,</div><div class='del'>-					 struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	struct sev_es_runtime_data *data = this_cpu_read(runtime_data);</div><div class='del'>-	long *reg = vc_insn_get_rm(ctxt);</div><div class='del'>-</div><div class='del'>-	if (sev_status &amp; MSR_AMD64_SNP_DEBUG_SWAP)</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	if (!reg)</div><div class='del'>-		return ES_DECODE_FAILED;</div><div class='del'>-</div><div class='del'>-	if (data)</div><div class='del'>-		*reg = data-&gt;dr7;</div><div class='del'>-	else</div><div class='del'>-		*reg = DR7_RESET_VALUE;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,</div><div class='del'>-				       struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	enum es_result ret;</div><div class='del'>-</div><div class='del'>-	ghcb_set_rcx(ghcb, ctxt-&gt;regs-&gt;cx);</div><div class='del'>-</div><div class='del'>-	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (!(ghcb_rax_is_valid(ghcb) &amp;&amp; ghcb_rdx_is_valid(ghcb)))</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='del'>-	ctxt-&gt;regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_monitor(struct ghcb *ghcb,</div><div class='del'>-					struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Treat it as a NOP and do not leak a physical address to the</div><div class='del'>-	 * hypervisor.</div><div class='del'>-	 */</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_mwait(struct ghcb *ghcb,</div><div class='del'>-				      struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	/* Treat the same as MONITOR/MONITORX */</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_vmmcall(struct ghcb *ghcb,</div><div class='del'>-					struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	enum es_result ret;</div><div class='del'>-</div><div class='del'>-	ghcb_set_rax(ghcb, ctxt-&gt;regs-&gt;ax);</div><div class='del'>-	ghcb_set_cpl(ghcb, user_mode(ctxt-&gt;regs) ? 3 : 0);</div><div class='del'>-</div><div class='del'>-	if (x86_platform.hyper.sev_es_hcall_prepare)</div><div class='del'>-		x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt-&gt;regs);</div><div class='del'>-</div><div class='del'>-	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0);</div><div class='del'>-	if (ret != ES_OK)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (!ghcb_rax_is_valid(ghcb))</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	ctxt-&gt;regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Call sev_es_hcall_finish() after regs-&gt;ax is already set.</div><div class='del'>-	 * This allows the hypervisor handler to overwrite it again if</div><div class='del'>-	 * necessary.</div><div class='del'>-	 */</div><div class='del'>-	if (x86_platform.hyper.sev_es_hcall_finish &amp;&amp;</div><div class='del'>-	    !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt-&gt;regs))</div><div class='del'>-		return ES_VMM_ERROR;</div><div class='del'>-</div><div class='del'>-	return ES_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_trap_ac(struct ghcb *ghcb,</div><div class='del'>-					struct es_em_ctxt *ctxt)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Calling ecx_alignment_check() directly does not work, because it</div><div class='del'>-	 * enables IRQs and the GHCB is active. Forward the exception and call</div><div class='del'>-	 * it later from vc_forward_exception().</div><div class='del'>-	 */</div><div class='del'>-	ctxt-&gt;fi.vector = X86_TRAP_AC;</div><div class='del'>-	ctxt-&gt;fi.error_code = 0;</div><div class='del'>-	return ES_EXCEPTION;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,</div><div class='del'>-					 struct ghcb *ghcb,</div><div class='del'>-					 unsigned long exit_code)</div><div class='del'>-{</div><div class='del'>-	enum es_result result = vc_check_opcode_bytes(ctxt, exit_code);</div><div class='del'>-</div><div class='del'>-	if (result != ES_OK)</div><div class='del'>-		return result;</div><div class='del'>-</div><div class='del'>-	switch (exit_code) {</div><div class='del'>-	case SVM_EXIT_READ_DR7:</div><div class='del'>-		result = vc_handle_dr7_read(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_WRITE_DR7:</div><div class='del'>-		result = vc_handle_dr7_write(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_EXCP_BASE + X86_TRAP_AC:</div><div class='del'>-		result = vc_handle_trap_ac(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_RDTSC:</div><div class='del'>-	case SVM_EXIT_RDTSCP:</div><div class='del'>-		result = vc_handle_rdtsc(ghcb, ctxt, exit_code);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_RDPMC:</div><div class='del'>-		result = vc_handle_rdpmc(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_INVD:</div><div class='del'>-		pr_err_ratelimited("#VC exception for INVD??? Seriously???\n");</div><div class='del'>-		result = ES_UNSUPPORTED;</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_CPUID:</div><div class='del'>-		result = vc_handle_cpuid(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_IOIO:</div><div class='del'>-		result = vc_handle_ioio(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_MSR:</div><div class='del'>-		result = vc_handle_msr(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_VMMCALL:</div><div class='del'>-		result = vc_handle_vmmcall(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_WBINVD:</div><div class='del'>-		result = vc_handle_wbinvd(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_MONITOR:</div><div class='del'>-		result = vc_handle_monitor(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_MWAIT:</div><div class='del'>-		result = vc_handle_mwait(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case SVM_EXIT_NPF:</div><div class='del'>-		result = vc_handle_mmio(ghcb, ctxt);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/*</div><div class='del'>-		 * Unexpected #VC exception</div><div class='del'>-		 */</div><div class='del'>-		result = ES_UNSUPPORTED;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline bool is_vc2_stack(unsigned long sp)</div><div class='del'>-{</div><div class='del'>-	return (sp &gt;= __this_cpu_ist_bottom_va(VC2) &amp;&amp; sp &lt; __this_cpu_ist_top_va(VC2));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline bool vc_from_invalid_context(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned long sp, prev_sp;</div><div class='del'>-</div><div class='del'>-	sp      = (unsigned long)regs;</div><div class='del'>-	prev_sp = regs-&gt;sp;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the code was already executing on the VC2 stack when the #VC</div><div class='del'>-	 * happened, let it proceed to the normal handling routine. This way the</div><div class='del'>-	 * code executing on the VC2 stack can cause #VC exceptions to get handled.</div><div class='del'>-	 */</div><div class='del'>-	return is_vc2_stack(sp) &amp;&amp; !is_vc2_stack(prev_sp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool vc_raw_handle_exception(struct pt_regs *regs, unsigned long error_code)</div><div class='del'>-{</div><div class='del'>-	struct ghcb_state state;</div><div class='del'>-	struct es_em_ctxt ctxt;</div><div class='del'>-	enum es_result result;</div><div class='del'>-	struct ghcb *ghcb;</div><div class='del'>-	bool ret = true;</div><div class='del'>-</div><div class='del'>-	ghcb = __sev_get_ghcb(&amp;state);</div><div class='del'>-</div><div class='del'>-	vc_ghcb_invalidate(ghcb);</div><div class='del'>-	result = vc_init_em_ctxt(&amp;ctxt, regs, error_code);</div><div class='del'>-</div><div class='del'>-	if (result == ES_OK)</div><div class='del'>-		result = vc_handle_exitcode(&amp;ctxt, ghcb, error_code);</div><div class='del'>-</div><div class='del'>-	__sev_put_ghcb(&amp;state);</div><div class='del'>-</div><div class='del'>-	/* Done - now check the result */</div><div class='del'>-	switch (result) {</div><div class='del'>-	case ES_OK:</div><div class='del'>-		vc_finish_insn(&amp;ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case ES_UNSUPPORTED:</div><div class='del'>-		pr_err_ratelimited("Unsupported exit-code 0x%02lx in #VC exception (IP: 0x%lx)\n",</div><div class='del'>-				   error_code, regs-&gt;ip);</div><div class='del'>-		ret = false;</div><div class='del'>-		break;</div><div class='del'>-	case ES_VMM_ERROR:</div><div class='del'>-		pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='del'>-				   error_code, regs-&gt;ip);</div><div class='del'>-		ret = false;</div><div class='del'>-		break;</div><div class='del'>-	case ES_DECODE_FAILED:</div><div class='del'>-		pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='del'>-				   error_code, regs-&gt;ip);</div><div class='del'>-		ret = false;</div><div class='del'>-		break;</div><div class='del'>-	case ES_EXCEPTION:</div><div class='del'>-		vc_forward_exception(&amp;ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case ES_RETRY:</div><div class='del'>-		/* Nothing to do */</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		pr_emerg("Unknown result in %s():%d\n", __func__, result);</div><div class='del'>-		/*</div><div class='del'>-		 * Emulating the instruction which caused the #VC exception</div><div class='del'>-		 * failed - can't continue so print debug information</div><div class='del'>-		 */</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline bool vc_is_db(unsigned long error_code)</div><div class='del'>-{</div><div class='del'>-	return error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Runtime #VC exception handler when raised from kernel mode. Runs in NMI mode</div><div class='del'>- * and will panic when an error happens.</div><div class='del'>- */</div><div class='del'>-DEFINE_IDTENTRY_VC_KERNEL(exc_vmm_communication)</div><div class='del'>-{</div><div class='del'>-	irqentry_state_t irq_state;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * With the current implementation it is always possible to switch to a</div><div class='del'>-	 * safe stack because #VC exceptions only happen at known places, like</div><div class='del'>-	 * intercepted instructions or accesses to MMIO areas/IO ports. They can</div><div class='del'>-	 * also happen with code instrumentation when the hypervisor intercepts</div><div class='del'>-	 * #DB, but the critical paths are forbidden to be instrumented, so #DB</div><div class='del'>-	 * exceptions currently also only happen in safe places.</div><div class='del'>-	 *</div><div class='del'>-	 * But keep this here in case the noinstr annotations are violated due</div><div class='del'>-	 * to bug elsewhere.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(vc_from_invalid_context(regs))) {</div><div class='del'>-		instrumentation_begin();</div><div class='del'>-		panic("Can't handle #VC exception from unsupported context\n");</div><div class='del'>-		instrumentation_end();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Handle #DB before calling into !noinstr code to avoid recursive #DB.</div><div class='del'>-	 */</div><div class='del'>-	if (vc_is_db(error_code)) {</div><div class='del'>-		exc_debug(regs);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq_state = irqentry_nmi_enter(regs);</div><div class='del'>-</div><div class='del'>-	instrumentation_begin();</div><div class='del'>-</div><div class='del'>-	if (!vc_raw_handle_exception(regs, error_code)) {</div><div class='del'>-		/* Show some debug info */</div><div class='del'>-		show_regs(regs);</div><div class='del'>-</div><div class='del'>-		/* Ask hypervisor to sev_es_terminate */</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='del'>-</div><div class='del'>-		/* If that fails and we get here - just panic */</div><div class='del'>-		panic("Returned from Terminate-Request to Hypervisor\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	instrumentation_end();</div><div class='del'>-	irqentry_nmi_exit(regs, irq_state);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Runtime #VC exception handler when raised from user mode. Runs in IRQ mode</div><div class='del'>- * and will kill the current task with SIGBUS when an error happens.</div><div class='del'>- */</div><div class='del'>-DEFINE_IDTENTRY_VC_USER(exc_vmm_communication)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Handle #DB before calling into !noinstr code to avoid recursive #DB.</div><div class='del'>-	 */</div><div class='del'>-	if (vc_is_db(error_code)) {</div><div class='del'>-		noist_exc_debug(regs);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irqentry_enter_from_user_mode(regs);</div><div class='del'>-	instrumentation_begin();</div><div class='del'>-</div><div class='del'>-	if (!vc_raw_handle_exception(regs, error_code)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Do not kill the machine if user-space triggered the</div><div class='del'>-		 * exception. Send SIGBUS instead and let user-space deal with</div><div class='del'>-		 * it.</div><div class='del'>-		 */</div><div class='del'>-		force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	instrumentation_end();</div><div class='del'>-	irqentry_exit_to_user_mode(regs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool __init handle_vc_boot_ghcb(struct pt_regs *regs)</div><div class='del'>-{</div><div class='del'>-	unsigned long exit_code = regs-&gt;orig_ax;</div><div class='del'>-	struct es_em_ctxt ctxt;</div><div class='del'>-	enum es_result result;</div><div class='del'>-</div><div class='del'>-	vc_ghcb_invalidate(boot_ghcb);</div><div class='del'>-</div><div class='del'>-	result = vc_init_em_ctxt(&amp;ctxt, regs, exit_code);</div><div class='del'>-	if (result == ES_OK)</div><div class='del'>-		result = vc_handle_exitcode(&amp;ctxt, boot_ghcb, exit_code);</div><div class='del'>-</div><div class='del'>-	/* Done - now check the result */</div><div class='del'>-	switch (result) {</div><div class='del'>-	case ES_OK:</div><div class='del'>-		vc_finish_insn(&amp;ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case ES_UNSUPPORTED:</div><div class='del'>-		early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",</div><div class='del'>-				exit_code, regs-&gt;ip);</div><div class='del'>-		goto fail;</div><div class='del'>-	case ES_VMM_ERROR:</div><div class='del'>-		early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='del'>-				exit_code, regs-&gt;ip);</div><div class='del'>-		goto fail;</div><div class='del'>-	case ES_DECODE_FAILED:</div><div class='del'>-		early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='del'>-				exit_code, regs-&gt;ip);</div><div class='del'>-		goto fail;</div><div class='del'>-	case ES_EXCEPTION:</div><div class='del'>-		vc_early_forward_exception(&amp;ctxt);</div><div class='del'>-		break;</div><div class='del'>-	case ES_RETRY:</div><div class='del'>-		/* Nothing to do */</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-</div><div class='del'>-fail:</div><div class='del'>-	show_regs(regs);</div><div class='del'>-</div><div class='del'>-	sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initial set up of SNP relies on information provided by the</div><div class='del'>- * Confidential Computing blob, which can be passed to the kernel</div><div class='del'>- * in the following ways, depending on how it is booted:</div><div class='del'>- *</div><div class='del'>- * - when booted via the boot/decompress kernel:</div><div class='del'>- *   - via boot_params</div><div class='del'>- *</div><div class='del'>- * - when booted directly by firmware/bootloader (e.g. CONFIG_PVH):</div><div class='del'>- *   - via a setup_data entry, as defined by the Linux Boot Protocol</div><div class='del'>- *</div><div class='del'>- * Scan for the blob in that order.</div><div class='del'>- */</div><div class='del'>-static __head struct cc_blob_sev_info *find_cc_blob(struct boot_params *bp)</div><div class='del'>-{</div><div class='del'>-	struct cc_blob_sev_info *cc_info;</div><div class='del'>-</div><div class='del'>-	/* Boot kernel would have passed the CC blob via boot_params. */</div><div class='del'>-	if (bp-&gt;cc_blob_address) {</div><div class='del'>-		cc_info = (struct cc_blob_sev_info *)(unsigned long)bp-&gt;cc_blob_address;</div><div class='del'>-		goto found_cc_info;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If kernel was booted directly, without the use of the</div><div class='del'>-	 * boot/decompression kernel, the CC blob may have been passed via</div><div class='del'>-	 * setup_data instead.</div><div class='del'>-	 */</div><div class='del'>-	cc_info = find_cc_blob_setup_data(bp);</div><div class='del'>-	if (!cc_info)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-found_cc_info:</div><div class='del'>-	if (cc_info-&gt;magic != CC_BLOB_SEV_HDR_MAGIC)</div><div class='del'>-		snp_abort();</div><div class='del'>-</div><div class='del'>-	return cc_info;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __head void svsm_setup(struct cc_blob_sev_info *cc_info)</div><div class='del'>-{</div><div class='del'>-	struct svsm_call call = {};</div><div class='del'>-	int ret;</div><div class='del'>-	u64 pa;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Record the SVSM Calling Area address (CAA) if the guest is not</div><div class='del'>-	 * running at VMPL0. The CA will be used to communicate with the</div><div class='del'>-	 * SVSM to perform the SVSM services.</div><div class='del'>-	 */</div><div class='del'>-	if (!svsm_setup_ca(cc_info))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * It is very early in the boot and the kernel is running identity</div><div class='del'>-	 * mapped but without having adjusted the pagetables to where the</div><div class='del'>-	 * kernel was loaded (physbase), so the get the CA address using</div><div class='del'>-	 * RIP-relative addressing.</div><div class='del'>-	 */</div><div class='del'>-	pa = (u64)&amp;RIP_REL_REF(boot_svsm_ca_page);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Switch over to the boot SVSM CA while the current CA is still</div><div class='del'>-	 * addressable. There is no GHCB at this point so use the MSR protocol.</div><div class='del'>-	 *</div><div class='del'>-	 * SVSM_CORE_REMAP_CA call:</div><div class='del'>-	 *   RAX = 0 (Protocol=0, CallID=0)</div><div class='del'>-	 *   RCX = New CA GPA</div><div class='del'>-	 */</div><div class='del'>-	call.caa = svsm_get_caa();</div><div class='del'>-	call.rax = SVSM_CORE_CALL(SVSM_CORE_REMAP_CA);</div><div class='del'>-	call.rcx = pa;</div><div class='del'>-	ret = svsm_perform_call_protocol(&amp;call);</div><div class='del'>-	if (ret)</div><div class='del'>-		sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_SVSM_CA_REMAP_FAIL);</div><div class='del'>-</div><div class='del'>-	RIP_REL_REF(boot_svsm_caa) = (struct svsm_ca *)pa;</div><div class='del'>-	RIP_REL_REF(boot_svsm_caa_pa) = pa;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool __head snp_init(struct boot_params *bp)</div><div class='del'>-{</div><div class='del'>-	struct cc_blob_sev_info *cc_info;</div><div class='del'>-</div><div class='del'>-	if (!bp)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	cc_info = find_cc_blob(bp);</div><div class='del'>-	if (!cc_info)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (cc_info-&gt;secrets_phys &amp;&amp; cc_info-&gt;secrets_len == PAGE_SIZE)</div><div class='del'>-		secrets_pa = cc_info-&gt;secrets_phys;</div><div class='del'>-	else</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	setup_cpuid_table(cc_info);</div><div class='del'>-</div><div class='del'>-	svsm_setup(cc_info);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The CC blob will be used later to access the secrets page. Cache</div><div class='del'>-	 * it here like the boot kernel does.</div><div class='del'>-	 */</div><div class='del'>-	bp-&gt;cc_blob_address = (u32)(unsigned long)cc_info;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __head __noreturn snp_abort(void)</div><div class='del'>-{</div><div class='del'>-	sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SNP_UNSUPPORTED);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * SEV-SNP guests should only execute dmi_setup() if EFI_CONFIG_TABLES are</div><div class='ctx'>  * enabled, as the alternative (fallback) logic for DMI probing in the legacy</div><div class='hunk'>@@ -2625,11 +1462,74 @@ e_restore_irq:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * snp_svsm_vtpm_probe() - Probe if SVSM provides a vTPM device</div><div class='add'>+ *</div><div class='add'>+ * Check that there is SVSM and that it supports at least TPM_SEND_COMMAND</div><div class='add'>+ * which is the only request used so far.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the platform provides a vTPM SVSM device, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool snp_svsm_vtpm_probe(void)</div><div class='add'>+{</div><div class='add'>+	struct svsm_call call = {};</div><div class='add'>+</div><div class='add'>+	/* The vTPM device is available only if a SVSM is present */</div><div class='add'>+	if (!snp_vmpl)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	call.caa = svsm_get_caa();</div><div class='add'>+	call.rax = SVSM_VTPM_CALL(SVSM_VTPM_QUERY);</div><div class='add'>+</div><div class='add'>+	if (svsm_perform_call_protocol(&amp;call))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Check platform commands contains TPM_SEND_COMMAND - platform command 8 */</div><div class='add'>+	return call.rcx_out &amp; BIT_ULL(8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * snp_svsm_vtpm_send_command() - Execute a vTPM operation on SVSM</div><div class='add'>+ * @buffer: A buffer used to both send the command and receive the response.</div><div class='add'>+ *</div><div class='add'>+ * Execute a SVSM_VTPM_CMD call as defined by</div><div class='add'>+ * "Secure VM Service Module for SEV-SNP Guests" Publication # 58019 Revision: 1.00</div><div class='add'>+ *</div><div class='add'>+ * All command request/response buffers have a common structure as specified by</div><div class='add'>+ * the following table:</div><div class='add'>+ *     Byte      Size       In/Out    Description</div><div class='add'>+ *     Offset    (Bytes)</div><div class='add'>+ *     0x000     4          In        Platform command</div><div class='add'>+ *                          Out       Platform command response size</div><div class='add'>+ *</div><div class='add'>+ * Each command can build upon this common request/response structure to create</div><div class='add'>+ * a structure specific to the command. See include/linux/tpm_svsm.h for more</div><div class='add'>+ * details.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure</div><div class='add'>+ */</div><div class='add'>+int snp_svsm_vtpm_send_command(u8 *buffer)</div><div class='add'>+{</div><div class='add'>+	struct svsm_call call = {};</div><div class='add'>+</div><div class='add'>+	call.caa = svsm_get_caa();</div><div class='add'>+	call.rax = SVSM_VTPM_CALL(SVSM_VTPM_CMD);</div><div class='add'>+	call.rcx = __pa(buffer);</div><div class='add'>+</div><div class='add'>+	return svsm_perform_call_protocol(&amp;call);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(snp_svsm_vtpm_send_command);</div><div class='add'>+</div><div class='ctx'> static struct platform_device sev_guest_device = {</div><div class='ctx'> 	.name		= "sev-guest",</div><div class='ctx'> 	.id		= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct platform_device tpm_svsm_device = {</div><div class='add'>+	.name		= "tpm-svsm",</div><div class='add'>+	.id		= -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init snp_init_platform_device(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!cc_platform_has(CC_ATTR_GUEST_SEV_SNP))</div><div class='hunk'>@@ -2638,7 +1538,11 @@ static int __init snp_init_platform_device(void)</div><div class='ctx'> 	if (platform_device_register(&amp;sev_guest_device))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	pr_info("SNP guest platform device initialized.\n");</div><div class='add'>+	if (snp_svsm_vtpm_probe() &amp;&amp;</div><div class='add'>+	    platform_device_register(&amp;tpm_svsm_device))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	pr_info("SNP guest platform devices initialized.\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> device_initcall(snp_init_platform_device);</div><div class='hunk'>@@ -2835,7 +1739,7 @@ struct snp_msg_desc *snp_msg_alloc(void)</div><div class='ctx'> 	if (!mdesc)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	mem = ioremap_encrypted(secrets_pa, PAGE_SIZE);</div><div class='add'>+	mem = ioremap_encrypted(sev_secrets_pa, PAGE_SIZE);</div><div class='ctx'> 	if (!mem)</div><div class='ctx'> 		goto e_free_mdesc;</div><div class='ctx'> </div><div class='hunk'>@@ -3278,7 +2182,7 @@ void __init snp_secure_tsc_init(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);</div><div class='del'>-	rdmsrl(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz);</div><div class='add'>+	rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz);</div><div class='ctx'> 	snp_tsc_freq_khz = (unsigned long)(tsc_freq_mhz * 1000);</div><div class='ctx'> </div><div class='ctx'> 	x86_platform.calibrate_cpu = securetsc_get_tsc_khz;</div><div class='head'>diff --git a/arch/x86/coco/sev/sev-nmi.c b/arch/x86/coco/sev/sev-nmi.c<br/>new file mode 100644<br/>index 000000000000..d8dfaddfb367<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/sev-nmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/coco/sev/sev-nmi.c</a></div><div class='hunk'>@@ -0,0 +1,108 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * AMD Memory Encryption Support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 SUSE</div><div class='add'>+ *</div><div class='add'>+ * Author: Joerg Roedel &lt;jroedel@suse.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)	"SEV: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bug.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cpu_entry_area.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+#include &lt;asm/ptrace.h&gt;</div><div class='add'>+#include &lt;asm/sev.h&gt;</div><div class='add'>+#include &lt;asm/sev-internal.h&gt;</div><div class='add'>+</div><div class='add'>+static __always_inline bool on_vc_stack(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	unsigned long sp = regs-&gt;sp;</div><div class='add'>+</div><div class='add'>+	/* User-mode RSP is not trusted */</div><div class='add'>+	if (user_mode(regs))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* SYSCALL gap still has user-mode RSP */</div><div class='add'>+	if (ip_within_syscall_gap(regs))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return ((sp &gt;= __this_cpu_ist_bottom_va(VC)) &amp;&amp; (sp &lt; __this_cpu_ist_top_va(VC)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This function handles the case when an NMI is raised in the #VC</div><div class='add'>+ * exception handler entry code, before the #VC handler has switched off</div><div class='add'>+ * its IST stack. In this case, the IST entry for #VC must be adjusted,</div><div class='add'>+ * so that any nested #VC exception will not overwrite the stack</div><div class='add'>+ * contents of the interrupted #VC handler.</div><div class='add'>+ *</div><div class='add'>+ * The IST entry is adjusted unconditionally so that it can be also be</div><div class='add'>+ * unconditionally adjusted back in __sev_es_ist_exit(). Otherwise a</div><div class='add'>+ * nested sev_es_ist_exit() call may adjust back the IST entry too</div><div class='add'>+ * early.</div><div class='add'>+ *</div><div class='add'>+ * The __sev_es_ist_enter() and __sev_es_ist_exit() functions always run</div><div class='add'>+ * on the NMI IST stack, as they are only called from NMI handling code</div><div class='add'>+ * right now.</div><div class='add'>+ */</div><div class='add'>+void noinstr __sev_es_ist_enter(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	unsigned long old_ist, new_ist;</div><div class='add'>+</div><div class='add'>+	/* Read old IST entry */</div><div class='add'>+	new_ist = old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If NMI happened while on the #VC IST stack, set the new IST</div><div class='add'>+	 * value below regs-&gt;sp, so that the interrupted stack frame is</div><div class='add'>+	 * not overwritten by subsequent #VC exceptions.</div><div class='add'>+	 */</div><div class='add'>+	if (on_vc_stack(regs))</div><div class='add'>+		new_ist = regs-&gt;sp;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reserve additional 8 bytes and store old IST value so this</div><div class='add'>+	 * adjustment can be unrolled in __sev_es_ist_exit().</div><div class='add'>+	 */</div><div class='add'>+	new_ist -= sizeof(old_ist);</div><div class='add'>+	*(unsigned long *)new_ist = old_ist;</div><div class='add'>+</div><div class='add'>+	/* Set new IST entry */</div><div class='add'>+	this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void noinstr __sev_es_ist_exit(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long ist;</div><div class='add'>+</div><div class='add'>+	/* Read IST entry */</div><div class='add'>+	ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(ist == __this_cpu_ist_top_va(VC)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Read back old IST entry and write it to the TSS */</div><div class='add'>+	this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void noinstr __sev_es_nmi_complete(void)</div><div class='add'>+{</div><div class='add'>+	struct ghcb_state state;</div><div class='add'>+	struct ghcb *ghcb;</div><div class='add'>+</div><div class='add'>+	ghcb = __sev_get_ghcb(&amp;state);</div><div class='add'>+</div><div class='add'>+	vc_ghcb_invalidate(ghcb);</div><div class='add'>+	ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE);</div><div class='add'>+	ghcb_set_sw_exit_info_1(ghcb, 0);</div><div class='add'>+	ghcb_set_sw_exit_info_2(ghcb, 0);</div><div class='add'>+</div><div class='add'>+	sev_es_wr_ghcb_msr(__pa_nodebug(ghcb));</div><div class='add'>+	VMGEXIT();</div><div class='add'>+</div><div class='add'>+	__sev_put_ghcb(&amp;state);</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/coco/sev/vc-handle.c b/arch/x86/coco/sev/vc-handle.c<br/>new file mode 100644<br/>index 000000000000..0989d98da130<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/vc-handle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/coco/sev/vc-handle.c</a></div><div class='hunk'>@@ -0,0 +1,1061 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * AMD Memory Encryption Support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 SUSE</div><div class='add'>+ *</div><div class='add'>+ * Author: Joerg Roedel &lt;jroedel@suse.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)	"SEV: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sched/debug.h&gt;	/* For show_regs() */</div><div class='add'>+#include &lt;linux/cc_platform.h&gt;</div><div class='add'>+#include &lt;linux/printk.h&gt;</div><div class='add'>+#include &lt;linux/mm_types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/psp-sev.h&gt;</div><div class='add'>+#include &lt;uapi/linux/sev-guest.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/init.h&gt;</div><div class='add'>+#include &lt;asm/stacktrace.h&gt;</div><div class='add'>+#include &lt;asm/sev.h&gt;</div><div class='add'>+#include &lt;asm/sev-internal.h&gt;</div><div class='add'>+#include &lt;asm/insn-eval.h&gt;</div><div class='add'>+#include &lt;asm/fpu/xcr.h&gt;</div><div class='add'>+#include &lt;asm/processor.h&gt;</div><div class='add'>+#include &lt;asm/setup.h&gt;</div><div class='add'>+#include &lt;asm/traps.h&gt;</div><div class='add'>+#include &lt;asm/svm.h&gt;</div><div class='add'>+#include &lt;asm/smp.h&gt;</div><div class='add'>+#include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='add'>+</div><div class='add'>+static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt,</div><div class='add'>+					   unsigned long vaddr, phys_addr_t *paddr)</div><div class='add'>+{</div><div class='add'>+	unsigned long va = (unsigned long)vaddr;</div><div class='add'>+	unsigned int level;</div><div class='add'>+	phys_addr_t pa;</div><div class='add'>+	pgd_t *pgd;</div><div class='add'>+	pte_t *pte;</div><div class='add'>+</div><div class='add'>+	pgd = __va(read_cr3_pa());</div><div class='add'>+	pgd = &amp;pgd[pgd_index(va)];</div><div class='add'>+	pte = lookup_address_in_pgd(pgd, va, &amp;level);</div><div class='add'>+	if (!pte) {</div><div class='add'>+		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='add'>+		ctxt-&gt;fi.cr2        = vaddr;</div><div class='add'>+		ctxt-&gt;fi.error_code = 0;</div><div class='add'>+</div><div class='add'>+		if (user_mode(ctxt-&gt;regs))</div><div class='add'>+			ctxt-&gt;fi.error_code |= X86_PF_USER;</div><div class='add'>+</div><div class='add'>+		return ES_EXCEPTION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(pte_val(*pte) &amp; _PAGE_ENC))</div><div class='add'>+		/* Emulated MMIO to/from encrypted memory not supported */</div><div class='add'>+		return ES_UNSUPPORTED;</div><div class='add'>+</div><div class='add'>+	pa = (phys_addr_t)pte_pfn(*pte) &lt;&lt; PAGE_SHIFT;</div><div class='add'>+	pa |= va &amp; ~page_level_mask(level);</div><div class='add'>+</div><div class='add'>+	*paddr = pa;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_ioio_check(struct es_em_ctxt *ctxt, u16 port, size_t size)</div><div class='add'>+{</div><div class='add'>+	BUG_ON(size &gt; 4);</div><div class='add'>+</div><div class='add'>+	if (user_mode(ctxt-&gt;regs)) {</div><div class='add'>+		struct thread_struct *t = &amp;current-&gt;thread;</div><div class='add'>+		struct io_bitmap *iobm = t-&gt;io_bitmap;</div><div class='add'>+		size_t idx;</div><div class='add'>+</div><div class='add'>+		if (!iobm)</div><div class='add'>+			goto fault;</div><div class='add'>+</div><div class='add'>+		for (idx = port; idx &lt; port + size; ++idx) {</div><div class='add'>+			if (test_bit(idx, iobm-&gt;bitmap))</div><div class='add'>+				goto fault;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+</div><div class='add'>+fault:</div><div class='add'>+	ctxt-&gt;fi.vector = X86_TRAP_GP;</div><div class='add'>+	ctxt-&gt;fi.error_code = 0;</div><div class='add'>+</div><div class='add'>+	return ES_EXCEPTION;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vc_forward_exception(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	long error_code = ctxt-&gt;fi.error_code;</div><div class='add'>+	int trapnr = ctxt-&gt;fi.vector;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;regs-&gt;orig_ax = ctxt-&gt;fi.error_code;</div><div class='add'>+</div><div class='add'>+	switch (trapnr) {</div><div class='add'>+	case X86_TRAP_GP:</div><div class='add'>+		exc_general_protection(ctxt-&gt;regs, error_code);</div><div class='add'>+		break;</div><div class='add'>+	case X86_TRAP_UD:</div><div class='add'>+		exc_invalid_op(ctxt-&gt;regs);</div><div class='add'>+		break;</div><div class='add'>+	case X86_TRAP_PF:</div><div class='add'>+		write_cr2(ctxt-&gt;fi.cr2);</div><div class='add'>+		exc_page_fault(ctxt-&gt;regs, error_code);</div><div class='add'>+		break;</div><div class='add'>+	case X86_TRAP_AC:</div><div class='add'>+		exc_alignment_check(ctxt-&gt;regs, error_code);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n");</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,</div><div class='add'>+				unsigned char *buffer)</div><div class='add'>+{</div><div class='add'>+	return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt-&gt;regs-&gt;ip, MAX_INSN_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result __vc_decode_user_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	char buffer[MAX_INSN_SIZE];</div><div class='add'>+	int insn_bytes;</div><div class='add'>+</div><div class='add'>+	insn_bytes = insn_fetch_from_user_inatomic(ctxt-&gt;regs, buffer);</div><div class='add'>+	if (insn_bytes == 0) {</div><div class='add'>+		/* Nothing could be copied */</div><div class='add'>+		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='add'>+		ctxt-&gt;fi.error_code = X86_PF_INSTR | X86_PF_USER;</div><div class='add'>+		ctxt-&gt;fi.cr2        = ctxt-&gt;regs-&gt;ip;</div><div class='add'>+		return ES_EXCEPTION;</div><div class='add'>+	} else if (insn_bytes == -EINVAL) {</div><div class='add'>+		/* Effective RIP could not be calculated */</div><div class='add'>+		ctxt-&gt;fi.vector     = X86_TRAP_GP;</div><div class='add'>+		ctxt-&gt;fi.error_code = 0;</div><div class='add'>+		ctxt-&gt;fi.cr2        = 0;</div><div class='add'>+		return ES_EXCEPTION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!insn_decode_from_regs(&amp;ctxt-&gt;insn, ctxt-&gt;regs, buffer, insn_bytes))</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+</div><div class='add'>+	if (ctxt-&gt;insn.immediate.got)</div><div class='add'>+		return ES_OK;</div><div class='add'>+	else</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result __vc_decode_kern_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	char buffer[MAX_INSN_SIZE];</div><div class='add'>+	int res, ret;</div><div class='add'>+</div><div class='add'>+	res = vc_fetch_insn_kernel(ctxt, buffer);</div><div class='add'>+	if (res) {</div><div class='add'>+		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='add'>+		ctxt-&gt;fi.error_code = X86_PF_INSTR;</div><div class='add'>+		ctxt-&gt;fi.cr2        = ctxt-&gt;regs-&gt;ip;</div><div class='add'>+		return ES_EXCEPTION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = insn_decode(&amp;ctxt-&gt;insn, buffer, MAX_INSN_SIZE, INSN_MODE_64);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+	else</div><div class='add'>+		return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	if (user_mode(ctxt-&gt;regs))</div><div class='add'>+		return __vc_decode_user_insn(ctxt);</div><div class='add'>+	else</div><div class='add'>+		return __vc_decode_kern_insn(ctxt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,</div><div class='add'>+				   char *dst, char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	unsigned long error_code = X86_PF_PROT | X86_PF_WRITE;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This function uses __put_user() independent of whether kernel or user</div><div class='add'>+	 * memory is accessed. This works fine because __put_user() does no</div><div class='add'>+	 * sanity checks of the pointer being accessed. All that it does is</div><div class='add'>+	 * to report when the access failed.</div><div class='add'>+	 *</div><div class='add'>+	 * Also, this function runs in atomic context, so __put_user() is not</div><div class='add'>+	 * allowed to sleep. The page-fault handler detects that it is running</div><div class='add'>+	 * in atomic context and will not try to take mmap_sem and handle the</div><div class='add'>+	 * fault, so additional pagefault_enable()/disable() calls are not</div><div class='add'>+	 * needed.</div><div class='add'>+	 *</div><div class='add'>+	 * The access can't be done via copy_to_user() here because</div><div class='add'>+	 * vc_write_mem() must not use string instructions to access unsafe</div><div class='add'>+	 * memory. The reason is that MOVS is emulated by the #VC handler by</div><div class='add'>+	 * splitting the move up into a read and a write and taking a nested #VC</div><div class='add'>+	 * exception on whatever of them is the MMIO access. Using string</div><div class='add'>+	 * instructions here would cause infinite nesting.</div><div class='add'>+	 */</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1: {</div><div class='add'>+		u8 d1;</div><div class='add'>+		u8 __user *target = (u8 __user *)dst;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;d1, buf, 1);</div><div class='add'>+		if (__put_user(d1, target))</div><div class='add'>+			goto fault;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case 2: {</div><div class='add'>+		u16 d2;</div><div class='add'>+		u16 __user *target = (u16 __user *)dst;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;d2, buf, 2);</div><div class='add'>+		if (__put_user(d2, target))</div><div class='add'>+			goto fault;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case 4: {</div><div class='add'>+		u32 d4;</div><div class='add'>+		u32 __user *target = (u32 __user *)dst;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;d4, buf, 4);</div><div class='add'>+		if (__put_user(d4, target))</div><div class='add'>+			goto fault;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case 8: {</div><div class='add'>+		u64 d8;</div><div class='add'>+		u64 __user *target = (u64 __user *)dst;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;d8, buf, 8);</div><div class='add'>+		if (__put_user(d8, target))</div><div class='add'>+			goto fault;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);</div><div class='add'>+		return ES_UNSUPPORTED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+</div><div class='add'>+fault:</div><div class='add'>+	if (user_mode(ctxt-&gt;regs))</div><div class='add'>+		error_code |= X86_PF_USER;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;fi.vector = X86_TRAP_PF;</div><div class='add'>+	ctxt-&gt;fi.error_code = error_code;</div><div class='add'>+	ctxt-&gt;fi.cr2 = (unsigned long)dst;</div><div class='add'>+</div><div class='add'>+	return ES_EXCEPTION;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,</div><div class='add'>+				  char *src, char *buf, size_t size)</div><div class='add'>+{</div><div class='add'>+	unsigned long error_code = X86_PF_PROT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This function uses __get_user() independent of whether kernel or user</div><div class='add'>+	 * memory is accessed. This works fine because __get_user() does no</div><div class='add'>+	 * sanity checks of the pointer being accessed. All that it does is</div><div class='add'>+	 * to report when the access failed.</div><div class='add'>+	 *</div><div class='add'>+	 * Also, this function runs in atomic context, so __get_user() is not</div><div class='add'>+	 * allowed to sleep. The page-fault handler detects that it is running</div><div class='add'>+	 * in atomic context and will not try to take mmap_sem and handle the</div><div class='add'>+	 * fault, so additional pagefault_enable()/disable() calls are not</div><div class='add'>+	 * needed.</div><div class='add'>+	 *</div><div class='add'>+	 * The access can't be done via copy_from_user() here because</div><div class='add'>+	 * vc_read_mem() must not use string instructions to access unsafe</div><div class='add'>+	 * memory. The reason is that MOVS is emulated by the #VC handler by</div><div class='add'>+	 * splitting the move up into a read and a write and taking a nested #VC</div><div class='add'>+	 * exception on whatever of them is the MMIO access. Using string</div><div class='add'>+	 * instructions here would cause infinite nesting.</div><div class='add'>+	 */</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1: {</div><div class='add'>+		u8 d1;</div><div class='add'>+		u8 __user *s = (u8 __user *)src;</div><div class='add'>+</div><div class='add'>+		if (__get_user(d1, s))</div><div class='add'>+			goto fault;</div><div class='add'>+		memcpy(buf, &amp;d1, 1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case 2: {</div><div class='add'>+		u16 d2;</div><div class='add'>+		u16 __user *s = (u16 __user *)src;</div><div class='add'>+</div><div class='add'>+		if (__get_user(d2, s))</div><div class='add'>+			goto fault;</div><div class='add'>+		memcpy(buf, &amp;d2, 2);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case 4: {</div><div class='add'>+		u32 d4;</div><div class='add'>+		u32 __user *s = (u32 __user *)src;</div><div class='add'>+</div><div class='add'>+		if (__get_user(d4, s))</div><div class='add'>+			goto fault;</div><div class='add'>+		memcpy(buf, &amp;d4, 4);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case 8: {</div><div class='add'>+		u64 d8;</div><div class='add'>+		u64 __user *s = (u64 __user *)src;</div><div class='add'>+		if (__get_user(d8, s))</div><div class='add'>+			goto fault;</div><div class='add'>+		memcpy(buf, &amp;d8, 8);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);</div><div class='add'>+		return ES_UNSUPPORTED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+</div><div class='add'>+fault:</div><div class='add'>+	if (user_mode(ctxt-&gt;regs))</div><div class='add'>+		error_code |= X86_PF_USER;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;fi.vector = X86_TRAP_PF;</div><div class='add'>+	ctxt-&gt;fi.error_code = error_code;</div><div class='add'>+	ctxt-&gt;fi.cr2 = (unsigned long)src;</div><div class='add'>+</div><div class='add'>+	return ES_EXCEPTION;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define sev_printk(fmt, ...)		printk(fmt, ##__VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#include "vc-shared.c"</div><div class='add'>+</div><div class='add'>+/* Writes to the SVSM CAA MSR are ignored */</div><div class='add'>+static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write)</div><div class='add'>+{</div><div class='add'>+	if (write)</div><div class='add'>+		return ES_OK;</div><div class='add'>+</div><div class='add'>+	regs-&gt;ax = lower_32_bits(this_cpu_read(svsm_caa_pa));</div><div class='add'>+	regs-&gt;dx = upper_32_bits(this_cpu_read(svsm_caa_pa));</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TSC related accesses should not exit to the hypervisor when a guest is</div><div class='add'>+ * executing with Secure TSC enabled, so special handling is required for</div><div class='add'>+ * accesses of MSR_IA32_TSC and MSR_AMD64_GUEST_TSC_FREQ.</div><div class='add'>+ */</div><div class='add'>+static enum es_result __vc_handle_secure_tsc_msrs(struct pt_regs *regs, bool write)</div><div class='add'>+{</div><div class='add'>+	u64 tsc;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GUEST_TSC_FREQ should not be intercepted when Secure TSC is enabled.</div><div class='add'>+	 * Terminate the SNP guest when the interception is enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (regs-&gt;cx == MSR_AMD64_GUEST_TSC_FREQ)</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Writes: Writing to MSR_IA32_TSC can cause subsequent reads of the TSC</div><div class='add'>+	 *         to return undefined values, so ignore all writes.</div><div class='add'>+	 *</div><div class='add'>+	 * Reads: Reads of MSR_IA32_TSC should return the current TSC value, use</div><div class='add'>+	 *        the value returned by rdtsc_ordered().</div><div class='add'>+	 */</div><div class='add'>+	if (write) {</div><div class='add'>+		WARN_ONCE(1, "TSC MSR writes are verboten!\n");</div><div class='add'>+		return ES_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tsc = rdtsc_ordered();</div><div class='add'>+	regs-&gt;ax = lower_32_bits(tsc);</div><div class='add'>+	regs-&gt;dx = upper_32_bits(tsc);</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='add'>+	enum es_result ret;</div><div class='add'>+	bool write;</div><div class='add'>+</div><div class='add'>+	/* Is it a WRMSR? */</div><div class='add'>+	write = ctxt-&gt;insn.opcode.bytes[1] == 0x30;</div><div class='add'>+</div><div class='add'>+	switch (regs-&gt;cx) {</div><div class='add'>+	case MSR_SVSM_CAA:</div><div class='add'>+		return __vc_handle_msr_caa(regs, write);</div><div class='add'>+	case MSR_IA32_TSC:</div><div class='add'>+	case MSR_AMD64_GUEST_TSC_FREQ:</div><div class='add'>+		if (sev_status &amp; MSR_AMD64_SNP_SECURE_TSC)</div><div class='add'>+			return __vc_handle_secure_tsc_msrs(regs, write);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ghcb_set_rcx(ghcb, regs-&gt;cx);</div><div class='add'>+	if (write) {</div><div class='add'>+		ghcb_set_rax(ghcb, regs-&gt;ax);</div><div class='add'>+		ghcb_set_rdx(ghcb, regs-&gt;dx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, write, 0);</div><div class='add'>+</div><div class='add'>+	if ((ret == ES_OK) &amp;&amp; !write) {</div><div class='add'>+		regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='add'>+		regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	int trapnr = ctxt-&gt;fi.vector;</div><div class='add'>+</div><div class='add'>+	if (trapnr == X86_TRAP_PF)</div><div class='add'>+		native_write_cr2(ctxt-&gt;fi.cr2);</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;regs-&gt;orig_ax = ctxt-&gt;fi.error_code;</div><div class='add'>+	do_early_exception(ctxt-&gt;regs, trapnr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long *vc_insn_get_rm(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	long *reg_array;</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	reg_array = (long *)ctxt-&gt;regs;</div><div class='add'>+	offset    = insn_get_modrm_rm_off(&amp;ctxt-&gt;insn, ctxt-&gt;regs);</div><div class='add'>+</div><div class='add'>+	if (offset &lt; 0)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	offset /= sizeof(long);</div><div class='add'>+</div><div class='add'>+	return reg_array + offset;</div><div class='add'>+}</div><div class='add'>+static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt,</div><div class='add'>+				 unsigned int bytes, bool read)</div><div class='add'>+{</div><div class='add'>+	u64 exit_code, exit_info_1, exit_info_2;</div><div class='add'>+	unsigned long ghcb_pa = __pa(ghcb);</div><div class='add'>+	enum es_result res;</div><div class='add'>+	phys_addr_t paddr;</div><div class='add'>+	void __user *ref;</div><div class='add'>+</div><div class='add'>+	ref = insn_get_addr_ref(&amp;ctxt-&gt;insn, ctxt-&gt;regs);</div><div class='add'>+	if (ref == (void __user *)-1L)</div><div class='add'>+		return ES_UNSUPPORTED;</div><div class='add'>+</div><div class='add'>+	exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE;</div><div class='add'>+</div><div class='add'>+	res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &amp;paddr);</div><div class='add'>+	if (res != ES_OK) {</div><div class='add'>+		if (res == ES_EXCEPTION &amp;&amp; !read)</div><div class='add'>+			ctxt-&gt;fi.error_code |= X86_PF_WRITE;</div><div class='add'>+</div><div class='add'>+		return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	exit_info_1 = paddr;</div><div class='add'>+	/* Can never be greater than 8 */</div><div class='add'>+	exit_info_2 = bytes;</div><div class='add'>+</div><div class='add'>+	ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer));</div><div class='add'>+</div><div class='add'>+	return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The MOVS instruction has two memory operands, which raises the</div><div class='add'>+ * problem that it is not known whether the access to the source or the</div><div class='add'>+ * destination caused the #VC exception (and hence whether an MMIO read</div><div class='add'>+ * or write operation needs to be emulated).</div><div class='add'>+ *</div><div class='add'>+ * Instead of playing games with walking page-tables and trying to guess</div><div class='add'>+ * whether the source or destination is an MMIO range, split the move</div><div class='add'>+ * into two operations, a read and a write with only one memory operand.</div><div class='add'>+ * This will cause a nested #VC exception on the MMIO address which can</div><div class='add'>+ * then be handled.</div><div class='add'>+ *</div><div class='add'>+ * This implementation has the benefit that it also supports MOVS where</div><div class='add'>+ * source _and_ destination are MMIO regions.</div><div class='add'>+ *</div><div class='add'>+ * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a</div><div class='add'>+ * rare operation. If it turns out to be a performance problem the split</div><div class='add'>+ * operations can be moved to memcpy_fromio() and memcpy_toio().</div><div class='add'>+ */</div><div class='add'>+static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt,</div><div class='add'>+					  unsigned int bytes)</div><div class='add'>+{</div><div class='add'>+	unsigned long ds_base, es_base;</div><div class='add'>+	unsigned char *src, *dst;</div><div class='add'>+	unsigned char buffer[8];</div><div class='add'>+	enum es_result ret;</div><div class='add'>+	bool rep;</div><div class='add'>+	int off;</div><div class='add'>+</div><div class='add'>+	ds_base = insn_get_seg_base(ctxt-&gt;regs, INAT_SEG_REG_DS);</div><div class='add'>+	es_base = insn_get_seg_base(ctxt-&gt;regs, INAT_SEG_REG_ES);</div><div class='add'>+</div><div class='add'>+	if (ds_base == -1L || es_base == -1L) {</div><div class='add'>+		ctxt-&gt;fi.vector = X86_TRAP_GP;</div><div class='add'>+		ctxt-&gt;fi.error_code = 0;</div><div class='add'>+		return ES_EXCEPTION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	src = ds_base + (unsigned char *)ctxt-&gt;regs-&gt;si;</div><div class='add'>+	dst = es_base + (unsigned char *)ctxt-&gt;regs-&gt;di;</div><div class='add'>+</div><div class='add'>+	ret = vc_read_mem(ctxt, src, buffer, bytes);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = vc_write_mem(ctxt, dst, buffer, bytes);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ctxt-&gt;regs-&gt;flags &amp; X86_EFLAGS_DF)</div><div class='add'>+		off = -bytes;</div><div class='add'>+	else</div><div class='add'>+		off =  bytes;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;regs-&gt;si += off;</div><div class='add'>+	ctxt-&gt;regs-&gt;di += off;</div><div class='add'>+</div><div class='add'>+	rep = insn_has_rep_prefix(&amp;ctxt-&gt;insn);</div><div class='add'>+	if (rep)</div><div class='add'>+		ctxt-&gt;regs-&gt;cx -= 1;</div><div class='add'>+</div><div class='add'>+	if (!rep || ctxt-&gt;regs-&gt;cx == 0)</div><div class='add'>+		return ES_OK;</div><div class='add'>+	else</div><div class='add'>+		return ES_RETRY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct insn *insn = &amp;ctxt-&gt;insn;</div><div class='add'>+	enum insn_mmio_type mmio;</div><div class='add'>+	unsigned int bytes = 0;</div><div class='add'>+	enum es_result ret;</div><div class='add'>+	u8 sign_byte;</div><div class='add'>+	long *reg_data;</div><div class='add'>+</div><div class='add'>+	mmio = insn_decode_mmio(insn, &amp;bytes);</div><div class='add'>+	if (mmio == INSN_MMIO_DECODE_FAILED)</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+</div><div class='add'>+	if (mmio != INSN_MMIO_WRITE_IMM &amp;&amp; mmio != INSN_MMIO_MOVS) {</div><div class='add'>+		reg_data = insn_get_modrm_reg_ptr(insn, ctxt-&gt;regs);</div><div class='add'>+		if (!reg_data)</div><div class='add'>+			return ES_DECODE_FAILED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (user_mode(ctxt-&gt;regs))</div><div class='add'>+		return ES_UNSUPPORTED;</div><div class='add'>+</div><div class='add'>+	switch (mmio) {</div><div class='add'>+	case INSN_MMIO_WRITE:</div><div class='add'>+		memcpy(ghcb-&gt;shared_buffer, reg_data, bytes);</div><div class='add'>+		ret = vc_do_mmio(ghcb, ctxt, bytes, false);</div><div class='add'>+		break;</div><div class='add'>+	case INSN_MMIO_WRITE_IMM:</div><div class='add'>+		memcpy(ghcb-&gt;shared_buffer, insn-&gt;immediate1.bytes, bytes);</div><div class='add'>+		ret = vc_do_mmio(ghcb, ctxt, bytes, false);</div><div class='add'>+		break;</div><div class='add'>+	case INSN_MMIO_READ:</div><div class='add'>+		ret = vc_do_mmio(ghcb, ctxt, bytes, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* Zero-extend for 32-bit operation */</div><div class='add'>+		if (bytes == 4)</div><div class='add'>+			*reg_data = 0;</div><div class='add'>+</div><div class='add'>+		memcpy(reg_data, ghcb-&gt;shared_buffer, bytes);</div><div class='add'>+		break;</div><div class='add'>+	case INSN_MMIO_READ_ZERO_EXTEND:</div><div class='add'>+		ret = vc_do_mmio(ghcb, ctxt, bytes, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* Zero extend based on operand size */</div><div class='add'>+		memset(reg_data, 0, insn-&gt;opnd_bytes);</div><div class='add'>+		memcpy(reg_data, ghcb-&gt;shared_buffer, bytes);</div><div class='add'>+		break;</div><div class='add'>+	case INSN_MMIO_READ_SIGN_EXTEND:</div><div class='add'>+		ret = vc_do_mmio(ghcb, ctxt, bytes, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (bytes == 1) {</div><div class='add'>+			u8 *val = (u8 *)ghcb-&gt;shared_buffer;</div><div class='add'>+</div><div class='add'>+			sign_byte = (*val &amp; 0x80) ? 0xff : 0x00;</div><div class='add'>+		} else {</div><div class='add'>+			u16 *val = (u16 *)ghcb-&gt;shared_buffer;</div><div class='add'>+</div><div class='add'>+			sign_byte = (*val &amp; 0x8000) ? 0xff : 0x00;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Sign extend based on operand size */</div><div class='add'>+		memset(reg_data, sign_byte, insn-&gt;opnd_bytes);</div><div class='add'>+		memcpy(reg_data, ghcb-&gt;shared_buffer, bytes);</div><div class='add'>+		break;</div><div class='add'>+	case INSN_MMIO_MOVS:</div><div class='add'>+		ret = vc_handle_mmio_movs(ctxt, bytes);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = ES_UNSUPPORTED;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_dr7_write(struct ghcb *ghcb,</div><div class='add'>+					  struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct sev_es_runtime_data *data = this_cpu_read(runtime_data);</div><div class='add'>+	long val, *reg = vc_insn_get_rm(ctxt);</div><div class='add'>+	enum es_result ret;</div><div class='add'>+</div><div class='add'>+	if (sev_status &amp; MSR_AMD64_SNP_DEBUG_SWAP)</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	if (!reg)</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+</div><div class='add'>+	val = *reg;</div><div class='add'>+</div><div class='add'>+	/* Upper 32 bits must be written as zeroes */</div><div class='add'>+	if (val &gt;&gt; 32) {</div><div class='add'>+		ctxt-&gt;fi.vector = X86_TRAP_GP;</div><div class='add'>+		ctxt-&gt;fi.error_code = 0;</div><div class='add'>+		return ES_EXCEPTION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear out other reserved bits and set bit 10 */</div><div class='add'>+	val = (val &amp; 0xffff23ffL) | BIT(10);</div><div class='add'>+</div><div class='add'>+	/* Early non-zero writes to DR7 are not supported */</div><div class='add'>+	if (!data &amp;&amp; (val &amp; ~DR7_RESET_VALUE))</div><div class='add'>+		return ES_UNSUPPORTED;</div><div class='add'>+</div><div class='add'>+	/* Using a value of 0 for ExitInfo1 means RAX holds the value */</div><div class='add'>+	ghcb_set_rax(ghcb, val);</div><div class='add'>+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (data)</div><div class='add'>+		data-&gt;dr7 = val;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_dr7_read(struct ghcb *ghcb,</div><div class='add'>+					 struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct sev_es_runtime_data *data = this_cpu_read(runtime_data);</div><div class='add'>+	long *reg = vc_insn_get_rm(ctxt);</div><div class='add'>+</div><div class='add'>+	if (sev_status &amp; MSR_AMD64_SNP_DEBUG_SWAP)</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	if (!reg)</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+</div><div class='add'>+	if (data)</div><div class='add'>+		*reg = data-&gt;dr7;</div><div class='add'>+	else</div><div class='add'>+		*reg = DR7_RESET_VALUE;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,</div><div class='add'>+				       struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	enum es_result ret;</div><div class='add'>+</div><div class='add'>+	ghcb_set_rcx(ghcb, ctxt-&gt;regs-&gt;cx);</div><div class='add'>+</div><div class='add'>+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(ghcb_rax_is_valid(ghcb) &amp;&amp; ghcb_rdx_is_valid(ghcb)))</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='add'>+	ctxt-&gt;regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_monitor(struct ghcb *ghcb,</div><div class='add'>+					struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Treat it as a NOP and do not leak a physical address to the</div><div class='add'>+	 * hypervisor.</div><div class='add'>+	 */</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_mwait(struct ghcb *ghcb,</div><div class='add'>+				      struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	/* Treat the same as MONITOR/MONITORX */</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_vmmcall(struct ghcb *ghcb,</div><div class='add'>+					struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	enum es_result ret;</div><div class='add'>+</div><div class='add'>+	ghcb_set_rax(ghcb, ctxt-&gt;regs-&gt;ax);</div><div class='add'>+	ghcb_set_cpl(ghcb, user_mode(ctxt-&gt;regs) ? 3 : 0);</div><div class='add'>+</div><div class='add'>+	if (x86_platform.hyper.sev_es_hcall_prepare)</div><div class='add'>+		x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt-&gt;regs);</div><div class='add'>+</div><div class='add'>+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!ghcb_rax_is_valid(ghcb))</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Call sev_es_hcall_finish() after regs-&gt;ax is already set.</div><div class='add'>+	 * This allows the hypervisor handler to overwrite it again if</div><div class='add'>+	 * necessary.</div><div class='add'>+	 */</div><div class='add'>+	if (x86_platform.hyper.sev_es_hcall_finish &amp;&amp;</div><div class='add'>+	    !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt-&gt;regs))</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_trap_ac(struct ghcb *ghcb,</div><div class='add'>+					struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Calling ecx_alignment_check() directly does not work, because it</div><div class='add'>+	 * enables IRQs and the GHCB is active. Forward the exception and call</div><div class='add'>+	 * it later from vc_forward_exception().</div><div class='add'>+	 */</div><div class='add'>+	ctxt-&gt;fi.vector = X86_TRAP_AC;</div><div class='add'>+	ctxt-&gt;fi.error_code = 0;</div><div class='add'>+	return ES_EXCEPTION;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,</div><div class='add'>+					 struct ghcb *ghcb,</div><div class='add'>+					 unsigned long exit_code)</div><div class='add'>+{</div><div class='add'>+	enum es_result result = vc_check_opcode_bytes(ctxt, exit_code);</div><div class='add'>+</div><div class='add'>+	if (result != ES_OK)</div><div class='add'>+		return result;</div><div class='add'>+</div><div class='add'>+	switch (exit_code) {</div><div class='add'>+	case SVM_EXIT_READ_DR7:</div><div class='add'>+		result = vc_handle_dr7_read(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_WRITE_DR7:</div><div class='add'>+		result = vc_handle_dr7_write(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_EXCP_BASE + X86_TRAP_AC:</div><div class='add'>+		result = vc_handle_trap_ac(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_RDTSC:</div><div class='add'>+	case SVM_EXIT_RDTSCP:</div><div class='add'>+		result = vc_handle_rdtsc(ghcb, ctxt, exit_code);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_RDPMC:</div><div class='add'>+		result = vc_handle_rdpmc(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_INVD:</div><div class='add'>+		pr_err_ratelimited("#VC exception for INVD??? Seriously???\n");</div><div class='add'>+		result = ES_UNSUPPORTED;</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_CPUID:</div><div class='add'>+		result = vc_handle_cpuid(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_IOIO:</div><div class='add'>+		result = vc_handle_ioio(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_MSR:</div><div class='add'>+		result = vc_handle_msr(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_VMMCALL:</div><div class='add'>+		result = vc_handle_vmmcall(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_WBINVD:</div><div class='add'>+		result = vc_handle_wbinvd(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_MONITOR:</div><div class='add'>+		result = vc_handle_monitor(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_MWAIT:</div><div class='add'>+		result = vc_handle_mwait(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case SVM_EXIT_NPF:</div><div class='add'>+		result = vc_handle_mmio(ghcb, ctxt);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/*</div><div class='add'>+		 * Unexpected #VC exception</div><div class='add'>+		 */</div><div class='add'>+		result = ES_UNSUPPORTED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool is_vc2_stack(unsigned long sp)</div><div class='add'>+{</div><div class='add'>+	return (sp &gt;= __this_cpu_ist_bottom_va(VC2) &amp;&amp; sp &lt; __this_cpu_ist_top_va(VC2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool vc_from_invalid_context(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	unsigned long sp, prev_sp;</div><div class='add'>+</div><div class='add'>+	sp      = (unsigned long)regs;</div><div class='add'>+	prev_sp = regs-&gt;sp;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the code was already executing on the VC2 stack when the #VC</div><div class='add'>+	 * happened, let it proceed to the normal handling routine. This way the</div><div class='add'>+	 * code executing on the VC2 stack can cause #VC exceptions to get handled.</div><div class='add'>+	 */</div><div class='add'>+	return is_vc2_stack(sp) &amp;&amp; !is_vc2_stack(prev_sp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vc_raw_handle_exception(struct pt_regs *regs, unsigned long error_code)</div><div class='add'>+{</div><div class='add'>+	struct ghcb_state state;</div><div class='add'>+	struct es_em_ctxt ctxt;</div><div class='add'>+	enum es_result result;</div><div class='add'>+	struct ghcb *ghcb;</div><div class='add'>+	bool ret = true;</div><div class='add'>+</div><div class='add'>+	ghcb = __sev_get_ghcb(&amp;state);</div><div class='add'>+</div><div class='add'>+	vc_ghcb_invalidate(ghcb);</div><div class='add'>+	result = vc_init_em_ctxt(&amp;ctxt, regs, error_code);</div><div class='add'>+</div><div class='add'>+	if (result == ES_OK)</div><div class='add'>+		result = vc_handle_exitcode(&amp;ctxt, ghcb, error_code);</div><div class='add'>+</div><div class='add'>+	__sev_put_ghcb(&amp;state);</div><div class='add'>+</div><div class='add'>+	/* Done - now check the result */</div><div class='add'>+	switch (result) {</div><div class='add'>+	case ES_OK:</div><div class='add'>+		vc_finish_insn(&amp;ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case ES_UNSUPPORTED:</div><div class='add'>+		pr_err_ratelimited("Unsupported exit-code 0x%02lx in #VC exception (IP: 0x%lx)\n",</div><div class='add'>+				   error_code, regs-&gt;ip);</div><div class='add'>+		ret = false;</div><div class='add'>+		break;</div><div class='add'>+	case ES_VMM_ERROR:</div><div class='add'>+		pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='add'>+				   error_code, regs-&gt;ip);</div><div class='add'>+		ret = false;</div><div class='add'>+		break;</div><div class='add'>+	case ES_DECODE_FAILED:</div><div class='add'>+		pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='add'>+				   error_code, regs-&gt;ip);</div><div class='add'>+		ret = false;</div><div class='add'>+		break;</div><div class='add'>+	case ES_EXCEPTION:</div><div class='add'>+		vc_forward_exception(&amp;ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case ES_RETRY:</div><div class='add'>+		/* Nothing to do */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_emerg("Unknown result in %s():%d\n", __func__, result);</div><div class='add'>+		/*</div><div class='add'>+		 * Emulating the instruction which caused the #VC exception</div><div class='add'>+		 * failed - can't continue so print debug information</div><div class='add'>+		 */</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool vc_is_db(unsigned long error_code)</div><div class='add'>+{</div><div class='add'>+	return error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Runtime #VC exception handler when raised from kernel mode. Runs in NMI mode</div><div class='add'>+ * and will panic when an error happens.</div><div class='add'>+ */</div><div class='add'>+DEFINE_IDTENTRY_VC_KERNEL(exc_vmm_communication)</div><div class='add'>+{</div><div class='add'>+	irqentry_state_t irq_state;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * With the current implementation it is always possible to switch to a</div><div class='add'>+	 * safe stack because #VC exceptions only happen at known places, like</div><div class='add'>+	 * intercepted instructions or accesses to MMIO areas/IO ports. They can</div><div class='add'>+	 * also happen with code instrumentation when the hypervisor intercepts</div><div class='add'>+	 * #DB, but the critical paths are forbidden to be instrumented, so #DB</div><div class='add'>+	 * exceptions currently also only happen in safe places.</div><div class='add'>+	 *</div><div class='add'>+	 * But keep this here in case the noinstr annotations are violated due</div><div class='add'>+	 * to bug elsewhere.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(vc_from_invalid_context(regs))) {</div><div class='add'>+		instrumentation_begin();</div><div class='add'>+		panic("Can't handle #VC exception from unsupported context\n");</div><div class='add'>+		instrumentation_end();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Handle #DB before calling into !noinstr code to avoid recursive #DB.</div><div class='add'>+	 */</div><div class='add'>+	if (vc_is_db(error_code)) {</div><div class='add'>+		exc_debug(regs);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_state = irqentry_nmi_enter(regs);</div><div class='add'>+</div><div class='add'>+	instrumentation_begin();</div><div class='add'>+</div><div class='add'>+	if (!vc_raw_handle_exception(regs, error_code)) {</div><div class='add'>+		/* Show some debug info */</div><div class='add'>+		show_regs(regs);</div><div class='add'>+</div><div class='add'>+		/* Ask hypervisor to sev_es_terminate */</div><div class='add'>+		sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='add'>+</div><div class='add'>+		/* If that fails and we get here - just panic */</div><div class='add'>+		panic("Returned from Terminate-Request to Hypervisor\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	instrumentation_end();</div><div class='add'>+	irqentry_nmi_exit(regs, irq_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Runtime #VC exception handler when raised from user mode. Runs in IRQ mode</div><div class='add'>+ * and will kill the current task with SIGBUS when an error happens.</div><div class='add'>+ */</div><div class='add'>+DEFINE_IDTENTRY_VC_USER(exc_vmm_communication)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Handle #DB before calling into !noinstr code to avoid recursive #DB.</div><div class='add'>+	 */</div><div class='add'>+	if (vc_is_db(error_code)) {</div><div class='add'>+		noist_exc_debug(regs);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irqentry_enter_from_user_mode(regs);</div><div class='add'>+	instrumentation_begin();</div><div class='add'>+</div><div class='add'>+	if (!vc_raw_handle_exception(regs, error_code)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Do not kill the machine if user-space triggered the</div><div class='add'>+		 * exception. Send SIGBUS instead and let user-space deal with</div><div class='add'>+		 * it.</div><div class='add'>+		 */</div><div class='add'>+		force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	instrumentation_end();</div><div class='add'>+	irqentry_exit_to_user_mode(regs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool __init handle_vc_boot_ghcb(struct pt_regs *regs)</div><div class='add'>+{</div><div class='add'>+	unsigned long exit_code = regs-&gt;orig_ax;</div><div class='add'>+	struct es_em_ctxt ctxt;</div><div class='add'>+	enum es_result result;</div><div class='add'>+</div><div class='add'>+	vc_ghcb_invalidate(boot_ghcb);</div><div class='add'>+</div><div class='add'>+	result = vc_init_em_ctxt(&amp;ctxt, regs, exit_code);</div><div class='add'>+	if (result == ES_OK)</div><div class='add'>+		result = vc_handle_exitcode(&amp;ctxt, boot_ghcb, exit_code);</div><div class='add'>+</div><div class='add'>+	/* Done - now check the result */</div><div class='add'>+	switch (result) {</div><div class='add'>+	case ES_OK:</div><div class='add'>+		vc_finish_insn(&amp;ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case ES_UNSUPPORTED:</div><div class='add'>+		early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",</div><div class='add'>+				exit_code, regs-&gt;ip);</div><div class='add'>+		goto fail;</div><div class='add'>+	case ES_VMM_ERROR:</div><div class='add'>+		early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='add'>+				exit_code, regs-&gt;ip);</div><div class='add'>+		goto fail;</div><div class='add'>+	case ES_DECODE_FAILED:</div><div class='add'>+		early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",</div><div class='add'>+				exit_code, regs-&gt;ip);</div><div class='add'>+		goto fail;</div><div class='add'>+	case ES_EXCEPTION:</div><div class='add'>+		vc_early_forward_exception(&amp;ctxt);</div><div class='add'>+		break;</div><div class='add'>+	case ES_RETRY:</div><div class='add'>+		/* Nothing to do */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		BUG();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	show_regs(regs);</div><div class='add'>+</div><div class='add'>+	sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/arch/x86/coco/sev/vc-shared.c b/arch/x86/coco/sev/vc-shared.c<br/>new file mode 100644<br/>index 000000000000..2c0ab0fdc060<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/coco/sev/vc-shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/coco/sev/vc-shared.c</a></div><div class='hunk'>@@ -0,0 +1,504 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+static enum es_result vc_check_opcode_bytes(struct es_em_ctxt *ctxt,</div><div class='add'>+					    unsigned long exit_code)</div><div class='add'>+{</div><div class='add'>+	unsigned int opcode = (unsigned int)ctxt-&gt;insn.opcode.value;</div><div class='add'>+	u8 modrm = ctxt-&gt;insn.modrm.value;</div><div class='add'>+</div><div class='add'>+	switch (exit_code) {</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_IOIO:</div><div class='add'>+	case SVM_EXIT_NPF:</div><div class='add'>+		/* handled separately */</div><div class='add'>+		return ES_OK;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_CPUID:</div><div class='add'>+		if (opcode == 0xa20f)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_INVD:</div><div class='add'>+		if (opcode == 0x080f)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_MONITOR:</div><div class='add'>+		/* MONITOR and MONITORX instructions generate the same error code */</div><div class='add'>+		if (opcode == 0x010f &amp;&amp; (modrm == 0xc8 || modrm == 0xfa))</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_MWAIT:</div><div class='add'>+		/* MWAIT and MWAITX instructions generate the same error code */</div><div class='add'>+		if (opcode == 0x010f &amp;&amp; (modrm == 0xc9 || modrm == 0xfb))</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_MSR:</div><div class='add'>+		/* RDMSR */</div><div class='add'>+		if (opcode == 0x320f ||</div><div class='add'>+		/* WRMSR */</div><div class='add'>+		    opcode == 0x300f)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_RDPMC:</div><div class='add'>+		if (opcode == 0x330f)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_RDTSC:</div><div class='add'>+		if (opcode == 0x310f)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_RDTSCP:</div><div class='add'>+		if (opcode == 0x010f &amp;&amp; modrm == 0xf9)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_READ_DR7:</div><div class='add'>+		if (opcode == 0x210f &amp;&amp;</div><div class='add'>+		    X86_MODRM_REG(ctxt-&gt;insn.modrm.value) == 7)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_VMMCALL:</div><div class='add'>+		if (opcode == 0x010f &amp;&amp; modrm == 0xd9)</div><div class='add'>+			return ES_OK;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_WRITE_DR7:</div><div class='add'>+		if (opcode == 0x230f &amp;&amp;</div><div class='add'>+		    X86_MODRM_REG(ctxt-&gt;insn.modrm.value) == 7)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SVM_EXIT_WBINVD:</div><div class='add'>+		if (opcode == 0x90f)</div><div class='add'>+			return ES_OK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sev_printk(KERN_ERR "Wrong/unhandled opcode bytes: 0x%x, exit_code: 0x%lx, rIP: 0x%lx\n",</div><div class='add'>+		   opcode, exit_code, ctxt-&gt;regs-&gt;ip);</div><div class='add'>+</div><div class='add'>+	return ES_UNSUPPORTED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vc_decoding_needed(unsigned long exit_code)</div><div class='add'>+{</div><div class='add'>+	/* Exceptions don't require to decode the instruction */</div><div class='add'>+	return !(exit_code &gt;= SVM_EXIT_EXCP_BASE &amp;&amp;</div><div class='add'>+		 exit_code &lt;= SVM_EXIT_LAST_EXCP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_init_em_ctxt(struct es_em_ctxt *ctxt,</div><div class='add'>+				      struct pt_regs *regs,</div><div class='add'>+				      unsigned long exit_code)</div><div class='add'>+{</div><div class='add'>+	enum es_result ret = ES_OK;</div><div class='add'>+</div><div class='add'>+	memset(ctxt, 0, sizeof(*ctxt));</div><div class='add'>+	ctxt-&gt;regs = regs;</div><div class='add'>+</div><div class='add'>+	if (vc_decoding_needed(exit_code))</div><div class='add'>+		ret = vc_decode_insn(ctxt);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vc_finish_insn(struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	ctxt-&gt;regs-&gt;ip += ctxt-&gt;insn.length;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_insn_string_check(struct es_em_ctxt *ctxt,</div><div class='add'>+					   unsigned long address,</div><div class='add'>+					   bool write)</div><div class='add'>+{</div><div class='add'>+	if (user_mode(ctxt-&gt;regs) &amp;&amp; fault_in_kernel_space(address)) {</div><div class='add'>+		ctxt-&gt;fi.vector     = X86_TRAP_PF;</div><div class='add'>+		ctxt-&gt;fi.error_code = X86_PF_USER;</div><div class='add'>+		ctxt-&gt;fi.cr2        = address;</div><div class='add'>+		if (write)</div><div class='add'>+			ctxt-&gt;fi.error_code |= X86_PF_WRITE;</div><div class='add'>+</div><div class='add'>+		return ES_EXCEPTION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_insn_string_read(struct es_em_ctxt *ctxt,</div><div class='add'>+					  void *src, char *buf,</div><div class='add'>+					  unsigned int data_size,</div><div class='add'>+					  unsigned int count,</div><div class='add'>+					  bool backwards)</div><div class='add'>+{</div><div class='add'>+	int i, b = backwards ? -1 : 1;</div><div class='add'>+	unsigned long address = (unsigned long)src;</div><div class='add'>+	enum es_result ret;</div><div class='add'>+</div><div class='add'>+	ret = vc_insn_string_check(ctxt, address, false);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		void *s = src + (i * data_size * b);</div><div class='add'>+		char *d = buf + (i * data_size);</div><div class='add'>+</div><div class='add'>+		ret = vc_read_mem(ctxt, s, d, data_size);</div><div class='add'>+		if (ret != ES_OK)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_insn_string_write(struct es_em_ctxt *ctxt,</div><div class='add'>+					   void *dst, char *buf,</div><div class='add'>+					   unsigned int data_size,</div><div class='add'>+					   unsigned int count,</div><div class='add'>+					   bool backwards)</div><div class='add'>+{</div><div class='add'>+	int i, s = backwards ? -1 : 1;</div><div class='add'>+	unsigned long address = (unsigned long)dst;</div><div class='add'>+	enum es_result ret;</div><div class='add'>+</div><div class='add'>+	ret = vc_insn_string_check(ctxt, address, true);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		void *d = dst + (i * data_size * s);</div><div class='add'>+		char *b = buf + (i * data_size);</div><div class='add'>+</div><div class='add'>+		ret = vc_write_mem(ctxt, d, b, data_size);</div><div class='add'>+		if (ret != ES_OK)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define IOIO_TYPE_STR  BIT(2)</div><div class='add'>+#define IOIO_TYPE_IN   1</div><div class='add'>+#define IOIO_TYPE_INS  (IOIO_TYPE_IN | IOIO_TYPE_STR)</div><div class='add'>+#define IOIO_TYPE_OUT  0</div><div class='add'>+#define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)</div><div class='add'>+</div><div class='add'>+#define IOIO_REP       BIT(3)</div><div class='add'>+</div><div class='add'>+#define IOIO_ADDR_64   BIT(9)</div><div class='add'>+#define IOIO_ADDR_32   BIT(8)</div><div class='add'>+#define IOIO_ADDR_16   BIT(7)</div><div class='add'>+</div><div class='add'>+#define IOIO_DATA_32   BIT(6)</div><div class='add'>+#define IOIO_DATA_16   BIT(5)</div><div class='add'>+#define IOIO_DATA_8    BIT(4)</div><div class='add'>+</div><div class='add'>+#define IOIO_SEG_ES    (0 &lt;&lt; 10)</div><div class='add'>+#define IOIO_SEG_DS    (3 &lt;&lt; 10)</div><div class='add'>+</div><div class='add'>+static enum es_result vc_ioio_exitinfo(struct es_em_ctxt *ctxt, u64 *exitinfo)</div><div class='add'>+{</div><div class='add'>+	struct insn *insn = &amp;ctxt-&gt;insn;</div><div class='add'>+	size_t size;</div><div class='add'>+	u64 port;</div><div class='add'>+</div><div class='add'>+	*exitinfo = 0;</div><div class='add'>+</div><div class='add'>+	switch (insn-&gt;opcode.bytes[0]) {</div><div class='add'>+	/* INS opcodes */</div><div class='add'>+	case 0x6c:</div><div class='add'>+	case 0x6d:</div><div class='add'>+		*exitinfo |= IOIO_TYPE_INS;</div><div class='add'>+		*exitinfo |= IOIO_SEG_ES;</div><div class='add'>+		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* OUTS opcodes */</div><div class='add'>+	case 0x6e:</div><div class='add'>+	case 0x6f:</div><div class='add'>+		*exitinfo |= IOIO_TYPE_OUTS;</div><div class='add'>+		*exitinfo |= IOIO_SEG_DS;</div><div class='add'>+		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* IN immediate opcodes */</div><div class='add'>+	case 0xe4:</div><div class='add'>+	case 0xe5:</div><div class='add'>+		*exitinfo |= IOIO_TYPE_IN;</div><div class='add'>+		port	   = (u8)insn-&gt;immediate.value &amp; 0xffff;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* OUT immediate opcodes */</div><div class='add'>+	case 0xe6:</div><div class='add'>+	case 0xe7:</div><div class='add'>+		*exitinfo |= IOIO_TYPE_OUT;</div><div class='add'>+		port	   = (u8)insn-&gt;immediate.value &amp; 0xffff;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* IN register opcodes */</div><div class='add'>+	case 0xec:</div><div class='add'>+	case 0xed:</div><div class='add'>+		*exitinfo |= IOIO_TYPE_IN;</div><div class='add'>+		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* OUT register opcodes */</div><div class='add'>+	case 0xee:</div><div class='add'>+	case 0xef:</div><div class='add'>+		*exitinfo |= IOIO_TYPE_OUT;</div><div class='add'>+		port	   = ctxt-&gt;regs-&gt;dx &amp; 0xffff;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return ES_DECODE_FAILED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*exitinfo |= port &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	switch (insn-&gt;opcode.bytes[0]) {</div><div class='add'>+	case 0x6c:</div><div class='add'>+	case 0x6e:</div><div class='add'>+	case 0xe4:</div><div class='add'>+	case 0xe6:</div><div class='add'>+	case 0xec:</div><div class='add'>+	case 0xee:</div><div class='add'>+		/* Single byte opcodes */</div><div class='add'>+		*exitinfo |= IOIO_DATA_8;</div><div class='add'>+		size       = 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Length determined by instruction parsing */</div><div class='add'>+		*exitinfo |= (insn-&gt;opnd_bytes == 2) ? IOIO_DATA_16</div><div class='add'>+						     : IOIO_DATA_32;</div><div class='add'>+		size       = (insn-&gt;opnd_bytes == 2) ? 2 : 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (insn-&gt;addr_bytes) {</div><div class='add'>+	case 2:</div><div class='add'>+		*exitinfo |= IOIO_ADDR_16;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		*exitinfo |= IOIO_ADDR_32;</div><div class='add'>+		break;</div><div class='add'>+	case 8:</div><div class='add'>+		*exitinfo |= IOIO_ADDR_64;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (insn_has_rep_prefix(insn))</div><div class='add'>+		*exitinfo |= IOIO_REP;</div><div class='add'>+</div><div class='add'>+	return vc_ioio_check(ctxt, (u16)port, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='add'>+	u64 exit_info_1, exit_info_2;</div><div class='add'>+	enum es_result ret;</div><div class='add'>+</div><div class='add'>+	ret = vc_ioio_exitinfo(ctxt, &amp;exit_info_1);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (exit_info_1 &amp; IOIO_TYPE_STR) {</div><div class='add'>+</div><div class='add'>+		/* (REP) INS/OUTS */</div><div class='add'>+</div><div class='add'>+		bool df = ((regs-&gt;flags &amp; X86_EFLAGS_DF) == X86_EFLAGS_DF);</div><div class='add'>+		unsigned int io_bytes, exit_bytes;</div><div class='add'>+		unsigned int ghcb_count, op_count;</div><div class='add'>+		unsigned long es_base;</div><div class='add'>+		u64 sw_scratch;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * For the string variants with rep prefix the amount of in/out</div><div class='add'>+		 * operations per #VC exception is limited so that the kernel</div><div class='add'>+		 * has a chance to take interrupts and re-schedule while the</div><div class='add'>+		 * instruction is emulated.</div><div class='add'>+		 */</div><div class='add'>+		io_bytes   = (exit_info_1 &gt;&gt; 4) &amp; 0x7;</div><div class='add'>+		ghcb_count = sizeof(ghcb-&gt;shared_buffer) / io_bytes;</div><div class='add'>+</div><div class='add'>+		op_count    = (exit_info_1 &amp; IOIO_REP) ? regs-&gt;cx : 1;</div><div class='add'>+		exit_info_2 = min(op_count, ghcb_count);</div><div class='add'>+		exit_bytes  = exit_info_2 * io_bytes;</div><div class='add'>+</div><div class='add'>+		es_base = insn_get_seg_base(ctxt-&gt;regs, INAT_SEG_REG_ES);</div><div class='add'>+</div><div class='add'>+		/* Read bytes of OUTS into the shared buffer */</div><div class='add'>+		if (!(exit_info_1 &amp; IOIO_TYPE_IN)) {</div><div class='add'>+			ret = vc_insn_string_read(ctxt,</div><div class='add'>+					       (void *)(es_base + regs-&gt;si),</div><div class='add'>+					       ghcb-&gt;shared_buffer, io_bytes,</div><div class='add'>+					       exit_info_2, df);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Issue an VMGEXIT to the HV to consume the bytes from the</div><div class='add'>+		 * shared buffer or to have it write them into the shared buffer</div><div class='add'>+		 * depending on the instruction: OUTS or INS.</div><div class='add'>+		 */</div><div class='add'>+		sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer);</div><div class='add'>+		ghcb_set_sw_scratch(ghcb, sw_scratch);</div><div class='add'>+		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO,</div><div class='add'>+					  exit_info_1, exit_info_2);</div><div class='add'>+		if (ret != ES_OK)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Read bytes from shared buffer into the guest's destination. */</div><div class='add'>+		if (exit_info_1 &amp; IOIO_TYPE_IN) {</div><div class='add'>+			ret = vc_insn_string_write(ctxt,</div><div class='add'>+						   (void *)(es_base + regs-&gt;di),</div><div class='add'>+						   ghcb-&gt;shared_buffer, io_bytes,</div><div class='add'>+						   exit_info_2, df);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			if (df)</div><div class='add'>+				regs-&gt;di -= exit_bytes;</div><div class='add'>+			else</div><div class='add'>+				regs-&gt;di += exit_bytes;</div><div class='add'>+		} else {</div><div class='add'>+			if (df)</div><div class='add'>+				regs-&gt;si -= exit_bytes;</div><div class='add'>+			else</div><div class='add'>+				regs-&gt;si += exit_bytes;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (exit_info_1 &amp; IOIO_REP)</div><div class='add'>+			regs-&gt;cx -= exit_info_2;</div><div class='add'>+</div><div class='add'>+		ret = regs-&gt;cx ? ES_RETRY : ES_OK;</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+</div><div class='add'>+		/* IN/OUT into/from rAX */</div><div class='add'>+</div><div class='add'>+		int bits = (exit_info_1 &amp; 0x70) &gt;&gt; 1;</div><div class='add'>+		u64 rax = 0;</div><div class='add'>+</div><div class='add'>+		if (!(exit_info_1 &amp; IOIO_TYPE_IN))</div><div class='add'>+			rax = lower_bits(regs-&gt;ax, bits);</div><div class='add'>+</div><div class='add'>+		ghcb_set_rax(ghcb, rax);</div><div class='add'>+</div><div class='add'>+		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, exit_info_1, 0);</div><div class='add'>+		if (ret != ES_OK)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (exit_info_1 &amp; IOIO_TYPE_IN) {</div><div class='add'>+			if (!ghcb_rax_is_valid(ghcb))</div><div class='add'>+				return ES_VMM_ERROR;</div><div class='add'>+			regs-&gt;ax = lower_bits(ghcb-&gt;save.rax, bits);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vc_handle_cpuid_snp(struct ghcb *ghcb, struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='add'>+	struct cpuid_leaf leaf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	leaf.fn = regs-&gt;ax;</div><div class='add'>+	leaf.subfn = regs-&gt;cx;</div><div class='add'>+	ret = snp_cpuid(ghcb, ctxt, &amp;leaf);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		regs-&gt;ax = leaf.eax;</div><div class='add'>+		regs-&gt;bx = leaf.ebx;</div><div class='add'>+		regs-&gt;cx = leaf.ecx;</div><div class='add'>+		regs-&gt;dx = leaf.edx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_cpuid(struct ghcb *ghcb,</div><div class='add'>+				      struct es_em_ctxt *ctxt)</div><div class='add'>+{</div><div class='add'>+	struct pt_regs *regs = ctxt-&gt;regs;</div><div class='add'>+	u32 cr4 = native_read_cr4();</div><div class='add'>+	enum es_result ret;</div><div class='add'>+	int snp_cpuid_ret;</div><div class='add'>+</div><div class='add'>+	snp_cpuid_ret = vc_handle_cpuid_snp(ghcb, ctxt);</div><div class='add'>+	if (!snp_cpuid_ret)</div><div class='add'>+		return ES_OK;</div><div class='add'>+	if (snp_cpuid_ret != -EOPNOTSUPP)</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	ghcb_set_rax(ghcb, regs-&gt;ax);</div><div class='add'>+	ghcb_set_rcx(ghcb, regs-&gt;cx);</div><div class='add'>+</div><div class='add'>+	if (cr4 &amp; X86_CR4_OSXSAVE)</div><div class='add'>+		/* Safe to read xcr0 */</div><div class='add'>+		ghcb_set_xcr0(ghcb, xgetbv(XCR_XFEATURE_ENABLED_MASK));</div><div class='add'>+	else</div><div class='add'>+		/* xgetbv will cause #GP - use reset value for xcr0 */</div><div class='add'>+		ghcb_set_xcr0(ghcb, 1);</div><div class='add'>+</div><div class='add'>+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_CPUID, 0, 0);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(ghcb_rax_is_valid(ghcb) &amp;&amp;</div><div class='add'>+	      ghcb_rbx_is_valid(ghcb) &amp;&amp;</div><div class='add'>+	      ghcb_rcx_is_valid(ghcb) &amp;&amp;</div><div class='add'>+	      ghcb_rdx_is_valid(ghcb)))</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='add'>+	regs-&gt;bx = ghcb-&gt;save.rbx;</div><div class='add'>+	regs-&gt;cx = ghcb-&gt;save.rcx;</div><div class='add'>+	regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum es_result vc_handle_rdtsc(struct ghcb *ghcb,</div><div class='add'>+				      struct es_em_ctxt *ctxt,</div><div class='add'>+				      unsigned long exit_code)</div><div class='add'>+{</div><div class='add'>+	bool rdtscp = (exit_code == SVM_EXIT_RDTSCP);</div><div class='add'>+	enum es_result ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The hypervisor should not be intercepting RDTSC/RDTSCP when Secure</div><div class='add'>+	 * TSC is enabled. A #VC exception will be generated if the RDTSC/RDTSCP</div><div class='add'>+	 * instructions are being intercepted. If this should occur and Secure</div><div class='add'>+	 * TSC is enabled, guest execution should be terminated as the guest</div><div class='add'>+	 * cannot rely on the TSC value provided by the hypervisor.</div><div class='add'>+	 */</div><div class='add'>+	if (sev_status &amp; MSR_AMD64_SNP_SECURE_TSC)</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	ret = sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, 0, 0);</div><div class='add'>+	if (ret != ES_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(ghcb_rax_is_valid(ghcb) &amp;&amp; ghcb_rdx_is_valid(ghcb) &amp;&amp;</div><div class='add'>+	     (!rdtscp || ghcb_rcx_is_valid(ghcb))))</div><div class='add'>+		return ES_VMM_ERROR;</div><div class='add'>+</div><div class='add'>+	ctxt-&gt;regs-&gt;ax = ghcb-&gt;save.rax;</div><div class='add'>+	ctxt-&gt;regs-&gt;dx = ghcb-&gt;save.rdx;</div><div class='add'>+	if (rdtscp)</div><div class='add'>+		ctxt-&gt;regs-&gt;cx = ghcb-&gt;save.rcx;</div><div class='add'>+</div><div class='add'>+	return ES_OK;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c<br/>index edab6d6049be..7b2833705d47 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/coco/tdx/tdx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/coco/tdx/tdx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/coco/tdx/tdx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/coco/tdx/tdx.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> /* TDX Module call error codes */</div><div class='ctx'> #define TDCALL_RETURN_CODE(a)	((a) &gt;&gt; 32)</div><div class='ctx'> #define TDCALL_INVALID_OPERAND	0xc0000100</div><div class='add'>+#define TDCALL_OPERAND_BUSY	0x80000200</div><div class='ctx'> </div><div class='ctx'> #define TDREPORT_SUBTYPE_0	0</div><div class='ctx'> </div><div class='hunk'>@@ -109,12 +110,13 @@ static inline u64 tdg_vm_wr(u64 field, u64 value, u64 mask)</div><div class='ctx'>  *              REPORTDATA to be included into TDREPORT.</div><div class='ctx'>  * @tdreport: Address of the output buffer to store TDREPORT.</div><div class='ctx'>  *</div><div class='del'>- * Refer to section titled "TDG.MR.REPORT leaf" in the TDX Module</div><div class='del'>- * v1.0 specification for more information on TDG.MR.REPORT TDCALL.</div><div class='add'>+ * Refer to section titled "TDG.MR.REPORT leaf" in the TDX Module v1.0</div><div class='add'>+ * specification for more information on TDG.MR.REPORT TDCALL.</div><div class='add'>+ *</div><div class='ctx'>  * It is used in the TDX guest driver module to get the TDREPORT0.</div><div class='ctx'>  *</div><div class='del'>- * Return 0 on success, -EINVAL for invalid operands, or -EIO on</div><div class='del'>- * other TDCALL failures.</div><div class='add'>+ * Return 0 on success, -ENXIO for invalid operands, -EBUSY for busy operation,</div><div class='add'>+ * or -EIO on other TDCALL failures.</div><div class='ctx'>  */</div><div class='ctx'> int tdx_mcall_get_report0(u8 *reportdata, u8 *tdreport)</div><div class='ctx'> {</div><div class='hunk'>@@ -128,7 +130,9 @@ int tdx_mcall_get_report0(u8 *reportdata, u8 *tdreport)</div><div class='ctx'> 	ret = __tdcall(TDG_MR_REPORT, &amp;args);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		if (TDCALL_RETURN_CODE(ret) == TDCALL_INVALID_OPERAND)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		else if (TDCALL_RETURN_CODE(ret) == TDCALL_OPERAND_BUSY)</div><div class='add'>+			return -EBUSY;</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -137,6 +141,42 @@ int tdx_mcall_get_report0(u8 *reportdata, u8 *tdreport)</div><div class='ctx'> EXPORT_SYMBOL_GPL(tdx_mcall_get_report0);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * tdx_mcall_extend_rtmr() - Wrapper to extend RTMR registers using</div><div class='add'>+ *			     TDG.MR.RTMR.EXTEND TDCALL.</div><div class='add'>+ * @index: Index of RTMR register to be extended.</div><div class='add'>+ * @data: Address of the input buffer with RTMR register extend data.</div><div class='add'>+ *</div><div class='add'>+ * Refer to section titled "TDG.MR.RTMR.EXTEND leaf" in the TDX Module v1.0</div><div class='add'>+ * specification for more information on TDG.MR.RTMR.EXTEND TDCALL.</div><div class='add'>+ *</div><div class='add'>+ * It is used in the TDX guest driver module to allow user to extend the RTMR</div><div class='add'>+ * registers.</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success, -ENXIO for invalid operands, -EBUSY for busy operation,</div><div class='add'>+ * or -EIO on other TDCALL failures.</div><div class='add'>+ */</div><div class='add'>+int tdx_mcall_extend_rtmr(u8 index, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = virt_to_phys(data),</div><div class='add'>+		.rdx = index,</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = __tdcall(TDG_MR_RTMR_EXTEND, &amp;args);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (TDCALL_RETURN_CODE(ret) == TDCALL_INVALID_OPERAND)</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		if (TDCALL_RETURN_CODE(ret) == TDCALL_OPERAND_BUSY)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdx_mcall_extend_rtmr);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * tdx_hcall_get_quote() - Wrapper to request TD Quote using GetQuote</div><div class='ctx'>  *                         hypercall.</div><div class='ctx'>  * @buf: Address of the directly mapped shared kernel buffer which</div><div class='head'>diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig<br/>index 91801138b10b..7cd2f395f301 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/configs/i386_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/configs/i386_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/configs/i386_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/configs/i386_defconfig</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> CONFIG_WERROR=y</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_POSIX_MQUEUE=y</div><div class='del'>-CONFIG_USELIB=y</div><div class='ctx'> CONFIG_AUDIT=y</div><div class='ctx'> CONFIG_NO_HZ=y</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='head'>diff --git a/arch/x86/crypto/Kconfig b/arch/x86/crypto/Kconfig<br/>index 3d948f10c94c..56cfdc79e2c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/Kconfig</a></div><div class='hunk'>@@ -4,7 +4,7 @@ menu "Accelerated Cryptographic Algorithms for CPU (x86)"</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CURVE25519_X86</div><div class='ctx'> 	tristate</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_KPP</div><div class='ctx'> 	select CRYPTO_LIB_CURVE25519_GENERIC</div><div class='ctx'> 	select CRYPTO_ARCH_HAVE_LIB_CURVE25519</div><div class='hunk'>@@ -17,13 +17,11 @@ config CRYPTO_CURVE25519_X86</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_AES_NI_INTEL</div><div class='ctx'> 	tristate "Ciphers: AES, modes: ECB, CBC, CTS, CTR, XCTR, XTS, GCM (AES-NI/VAES)"</div><div class='del'>-	depends on X86</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='ctx'> 	select CRYPTO_LIB_AES</div><div class='ctx'> 	select CRYPTO_LIB_GF128MUL</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Block cipher: AES cipher algorithms</div><div class='ctx'> 	  AEAD cipher: AES with GCM</div><div class='hunk'>@@ -38,7 +36,7 @@ config CRYPTO_AES_NI_INTEL</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_BLOWFISH_X86_64</div><div class='ctx'> 	tristate "Ciphers: Blowfish, modes: ECB, CBC"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_BLOWFISH_COMMON</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='hunk'>@@ -50,7 +48,7 @@ config CRYPTO_BLOWFISH_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CAMELLIA_X86_64</div><div class='ctx'> 	tristate "Ciphers: Camellia with modes: ECB, CBC"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='ctx'> 	help</div><div class='hunk'>@@ -61,10 +59,9 @@ config CRYPTO_CAMELLIA_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CAMELLIA_AESNI_AVX_X86_64</div><div class='ctx'> 	tristate "Ciphers: Camellia with modes: ECB, CBC (AES-NI/AVX)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_CAMELLIA_X86_64</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	imply CRYPTO_XTS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: Camellia with ECB and CBC modes</div><div class='hunk'>@@ -75,7 +72,7 @@ config CRYPTO_CAMELLIA_AESNI_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CAMELLIA_AESNI_AVX2_X86_64</div><div class='ctx'> 	tristate "Ciphers: Camellia with modes: ECB, CBC (AES-NI/AVX2)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_CAMELLIA_AESNI_AVX_X86_64</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: Camellia with ECB and CBC modes</div><div class='hunk'>@@ -86,11 +83,10 @@ config CRYPTO_CAMELLIA_AESNI_AVX2_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CAST5_AVX_X86_64</div><div class='ctx'> 	tristate "Ciphers: CAST5 with modes: ECB, CBC (AVX)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_CAST5</div><div class='ctx'> 	select CRYPTO_CAST_COMMON</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: CAST5 (CAST-128) cipher algorithm</div><div class='hunk'>@@ -103,11 +99,10 @@ config CRYPTO_CAST5_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CAST6_AVX_X86_64</div><div class='ctx'> 	tristate "Ciphers: CAST6 with modes: ECB, CBC (AVX)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_CAST6</div><div class='ctx'> 	select CRYPTO_CAST_COMMON</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	imply CRYPTO_XTS</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='ctx'> 	help</div><div class='hunk'>@@ -121,7 +116,7 @@ config CRYPTO_CAST6_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_DES3_EDE_X86_64</div><div class='ctx'> 	tristate "Ciphers: Triple DES EDE with modes: ECB, CBC"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_LIB_DES</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='hunk'>@@ -135,10 +130,9 @@ config CRYPTO_DES3_EDE_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SERPENT_SSE2_X86_64</div><div class='ctx'> 	tristate "Ciphers: Serpent with modes: ECB, CBC (SSE2)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_SERPENT</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: Serpent cipher algorithm</div><div class='hunk'>@@ -151,10 +145,9 @@ config CRYPTO_SERPENT_SSE2_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SERPENT_SSE2_586</div><div class='ctx'> 	tristate "Ciphers: Serpent with modes: ECB, CBC (32-bit with SSE2)"</div><div class='del'>-	depends on X86 &amp;&amp; !64BIT</div><div class='add'>+	depends on !64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_SERPENT</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: Serpent cipher algorithm</div><div class='hunk'>@@ -167,10 +160,9 @@ config CRYPTO_SERPENT_SSE2_586</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SERPENT_AVX_X86_64</div><div class='ctx'> 	tristate "Ciphers: Serpent with modes: ECB, CBC (AVX)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_SERPENT</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	imply CRYPTO_XTS</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='ctx'> 	help</div><div class='hunk'>@@ -184,7 +176,7 @@ config CRYPTO_SERPENT_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SERPENT_AVX2_X86_64</div><div class='ctx'> 	tristate "Ciphers: Serpent with modes: ECB, CBC (AVX2)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SERPENT_AVX_X86_64</div><div class='ctx'> 	help</div><div class='ctx'> 	  Length-preserving ciphers: Serpent cipher algorithm</div><div class='hunk'>@@ -197,9 +189,8 @@ config CRYPTO_SERPENT_AVX2_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SM4_AESNI_AVX_X86_64</div><div class='ctx'> 	tristate "Ciphers: SM4 with modes: ECB, CBC, CTR (AES-NI/AVX)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_SM4</div><div class='ctx'> 	help</div><div class='hunk'>@@ -218,9 +209,8 @@ config CRYPTO_SM4_AESNI_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SM4_AESNI_AVX2_X86_64</div><div class='ctx'> 	tristate "Ciphers: SM4 with modes: ECB, CBC, CTR (AES-NI/AVX2)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_SM4</div><div class='ctx'> 	select CRYPTO_SM4_AESNI_AVX_X86_64</div><div class='hunk'>@@ -240,7 +230,7 @@ config CRYPTO_SM4_AESNI_AVX2_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_TWOFISH_586</div><div class='ctx'> 	tristate "Ciphers: Twofish (32-bit)"</div><div class='del'>-	depends on (X86 || UML_X86) &amp;&amp; !64BIT</div><div class='add'>+	depends on !64BIT</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_TWOFISH_COMMON</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='hunk'>@@ -251,7 +241,7 @@ config CRYPTO_TWOFISH_586</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_TWOFISH_X86_64</div><div class='ctx'> 	tristate "Ciphers: Twofish"</div><div class='del'>-	depends on (X86 || UML_X86) &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_TWOFISH_COMMON</div><div class='ctx'> 	imply CRYPTO_CTR</div><div class='hunk'>@@ -262,7 +252,7 @@ config CRYPTO_TWOFISH_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_TWOFISH_X86_64_3WAY</div><div class='ctx'> 	tristate "Ciphers: Twofish with modes: ECB, CBC (3-way parallel)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_TWOFISH_COMMON</div><div class='ctx'> 	select CRYPTO_TWOFISH_X86_64</div><div class='hunk'>@@ -277,9 +267,8 @@ config CRYPTO_TWOFISH_X86_64_3WAY</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_TWOFISH_AVX_X86_64</div><div class='ctx'> 	tristate "Ciphers: Twofish with modes: ECB, CBC (AVX)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	select CRYPTO_TWOFISH_COMMON</div><div class='ctx'> 	select CRYPTO_TWOFISH_X86_64</div><div class='ctx'> 	select CRYPTO_TWOFISH_X86_64_3WAY</div><div class='hunk'>@@ -295,9 +284,8 @@ config CRYPTO_TWOFISH_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_ARIA_AESNI_AVX_X86_64</div><div class='ctx'> 	tristate "Ciphers: ARIA with modes: ECB, CTR (AES-NI/AVX/GFNI)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_ARIA</div><div class='ctx'> 	help</div><div class='hunk'>@@ -313,9 +301,8 @@ config CRYPTO_ARIA_AESNI_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_ARIA_AESNI_AVX2_X86_64</div><div class='ctx'> 	tristate "Ciphers: ARIA with modes: ECB, CTR (AES-NI/AVX2/GFNI)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_ARIA</div><div class='ctx'> 	select CRYPTO_ARIA_AESNI_AVX_X86_64</div><div class='hunk'>@@ -332,9 +319,8 @@ config CRYPTO_ARIA_AESNI_AVX2_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_ARIA_GFNI_AVX512_X86_64</div><div class='ctx'> 	tristate "Ciphers: ARIA with modes: ECB, CTR (AVX512/GFNI)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT &amp;&amp; AS_AVX512 &amp;&amp; AS_GFNI</div><div class='add'>+	depends on 64BIT &amp;&amp; AS_GFNI</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	select CRYPTO_ALGAPI</div><div class='ctx'> 	select CRYPTO_ARIA</div><div class='ctx'> 	select CRYPTO_ARIA_AESNI_AVX_X86_64</div><div class='hunk'>@@ -349,27 +335,10 @@ config CRYPTO_ARIA_GFNI_AVX512_X86_64</div><div class='ctx'> </div><div class='ctx'> 	  Processes 64 blocks in parallel.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_CHACHA20_X86_64</div><div class='del'>-	tristate</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='del'>-	default CRYPTO_LIB_CHACHA_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12</div><div class='del'>-	  stream cipher algorithms</div><div class='del'>-</div><div class='del'>-	  Architecture: x86_64 using:</div><div class='del'>-	  - SSSE3 (Supplemental SSE3)</div><div class='del'>-	  - AVX2 (Advanced Vector Extensions 2)</div><div class='del'>-	  - AVX-512VL (Advanced Vector Extensions-512VL)</div><div class='del'>-</div><div class='ctx'> config CRYPTO_AEGIS128_AESNI_SSE2</div><div class='ctx'> 	tristate "AEAD ciphers: AEGIS-128 (AES-NI/SSE4.1)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='del'>-	select CRYPTO_SIMD</div><div class='ctx'> 	help</div><div class='ctx'> 	  AEGIS-128 AEAD algorithm</div><div class='ctx'> </div><div class='hunk'>@@ -379,7 +348,7 @@ config CRYPTO_AEGIS128_AESNI_SSE2</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_NHPOLY1305_SSE2</div><div class='ctx'> 	tristate "Hash functions: NHPoly1305 (SSE2)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_NHPOLY1305</div><div class='ctx'> 	help</div><div class='ctx'> 	  NHPoly1305 hash function for Adiantum</div><div class='hunk'>@@ -389,7 +358,7 @@ config CRYPTO_NHPOLY1305_SSE2</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_NHPOLY1305_AVX2</div><div class='ctx'> 	tristate "Hash functions: NHPoly1305 (AVX2)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_NHPOLY1305</div><div class='ctx'> 	help</div><div class='ctx'> 	  NHPoly1305 hash function for Adiantum</div><div class='hunk'>@@ -397,21 +366,9 @@ config CRYPTO_NHPOLY1305_AVX2</div><div class='ctx'> 	  Architecture: x86_64 using:</div><div class='ctx'> 	  - AVX2 (Advanced Vector Extensions 2)</div><div class='ctx'> </div><div class='del'>-config CRYPTO_BLAKE2S_X86</div><div class='del'>-	bool "Hash functions: BLAKE2s (SSSE3/AVX-512)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_LIB_BLAKE2S_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_BLAKE2S</div><div class='del'>-	help</div><div class='del'>-	  BLAKE2s cryptographic hash function (RFC 7693)</div><div class='del'>-</div><div class='del'>-	  Architecture: x86_64 using:</div><div class='del'>-	  - SSSE3 (Supplemental SSE3)</div><div class='del'>-	  - AVX-512 (Advanced Vector Extensions-512)</div><div class='del'>-</div><div class='ctx'> config CRYPTO_POLYVAL_CLMUL_NI</div><div class='ctx'> 	tristate "Hash functions: POLYVAL (CLMUL-NI)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_POLYVAL</div><div class='ctx'> 	help</div><div class='ctx'> 	  POLYVAL hash function for HCTR2</div><div class='hunk'>@@ -419,23 +376,9 @@ config CRYPTO_POLYVAL_CLMUL_NI</div><div class='ctx'> 	  Architecture: x86_64 using:</div><div class='ctx'> 	  - CLMUL-NI (carry-less multiplication new instructions)</div><div class='ctx'> </div><div class='del'>-config CRYPTO_POLY1305_X86_64</div><div class='del'>-	tristate</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_LIB_POLY1305_GENERIC</div><div class='del'>-	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='del'>-	default CRYPTO_LIB_POLY1305_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Architecture: x86_64 using:</div><div class='del'>-	  - SSE2 (Streaming SIMD Extensions 2)</div><div class='del'>-	  - AVX2 (Advanced Vector Extensions 2)</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA1_SSSE3</div><div class='ctx'> 	tristate "Hash functions: SHA-1 (SSSE3/AVX/AVX2/SHA-NI)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SHA1</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='hunk'>@@ -447,23 +390,9 @@ config CRYPTO_SHA1_SSSE3</div><div class='ctx'> 	  - AVX2 (Advanced Vector Extensions 2)</div><div class='ctx'> 	  - SHA-NI (SHA Extensions New Instructions)</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SHA256_SSSE3</div><div class='del'>-	tristate "Hash functions: SHA-224 and SHA-256 (SSSE3/AVX/AVX2/SHA-NI)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_SHA256</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	help</div><div class='del'>-	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180)</div><div class='del'>-</div><div class='del'>-	  Architecture: x86_64 using:</div><div class='del'>-	  - SSSE3 (Supplemental SSE3)</div><div class='del'>-	  - AVX (Advanced Vector Extensions)</div><div class='del'>-	  - AVX2 (Advanced Vector Extensions 2)</div><div class='del'>-	  - SHA-NI (SHA Extensions New Instructions)</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SHA512_SSSE3</div><div class='ctx'> 	tristate "Hash functions: SHA-384 and SHA-512 (SSSE3/AVX/AVX2)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_SHA512</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='hunk'>@@ -476,9 +405,9 @@ config CRYPTO_SHA512_SSSE3</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SM3_AVX_X86_64</div><div class='ctx'> 	tristate "Hash functions: SM3 (AVX)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 secure hash function as defined by OSCCA GM/T 0004-2012 SM3</div><div class='ctx'> </div><div class='hunk'>@@ -489,7 +418,7 @@ config CRYPTO_SM3_AVX_X86_64</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_GHASH_CLMUL_NI_INTEL</div><div class='ctx'> 	tristate "Hash functions: GHASH (CLMUL-NI)"</div><div class='del'>-	depends on X86 &amp;&amp; 64BIT</div><div class='add'>+	depends on 64BIT</div><div class='ctx'> 	select CRYPTO_CRYPTD</div><div class='ctx'> 	help</div><div class='ctx'> 	  GCM GHASH hash function (NIST SP800-38D)</div><div class='head'>diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile<br/>index 5d19f41bde58..aa289a9e0153 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/Makefile</a></div><div class='hunk'>@@ -42,10 +42,6 @@ cast6-avx-x86_64-y := cast6-avx-x86_64-asm_64.o cast6_avx_glue.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AEGIS128_AESNI_SSE2) += aegis128-aesni.o</div><div class='ctx'> aegis128-aesni-y := aegis128-aesni-asm.o aegis128-aesni-glue.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20_X86_64) += chacha-x86_64.o</div><div class='del'>-chacha-x86_64-y := chacha-avx2-x86_64.o chacha-ssse3-x86_64.o chacha_glue.o</div><div class='del'>-chacha-x86_64-$(CONFIG_AS_AVX512) += chacha-avx512vl-x86_64.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o</div><div class='ctx'> aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o</div><div class='ctx'> aesni-intel-$(CONFIG_64BIT) += aes-ctr-avx-x86_64.o \</div><div class='hunk'>@@ -56,29 +52,17 @@ aesni-intel-$(CONFIG_64BIT) += aes-gcm-avx10-x86_64.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o</div><div class='del'>-sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ssse3_glue.o</div><div class='del'>-sha1-ssse3-$(CONFIG_AS_SHA1_NI) += sha1_ni_asm.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o</div><div class='del'>-sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o</div><div class='del'>-sha256-ssse3-$(CONFIG_AS_SHA256_NI) += sha256_ni_asm.o</div><div class='add'>+sha1-ssse3-y := sha1_avx2_x86_64_asm.o sha1_ssse3_asm.o sha1_ni_asm.o sha1_ssse3_glue.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o</div><div class='ctx'> sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_BLAKE2S_X86) += libblake2s-x86_64.o</div><div class='del'>-libblake2s-x86_64-y := blake2s-core.o blake2s-glue.o</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL) += ghash-clmulni-intel.o</div><div class='ctx'> ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRYPTO_POLYVAL_CLMUL_NI) += polyval-clmulni.o</div><div class='ctx'> polyval-clmulni-y := polyval-clmulni_asm.o polyval-clmulni_glue.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305_X86_64) += poly1305-x86_64.o</div><div class='del'>-poly1305-x86_64-y := poly1305-x86_64-cryptogams.o poly1305_glue.o</div><div class='del'>-targets += poly1305-x86_64-cryptogams.S</div><div class='del'>-</div><div class='ctx'> obj-$(CONFIG_CRYPTO_NHPOLY1305_SSE2) += nhpoly1305-sse2.o</div><div class='ctx'> nhpoly1305-sse2-y := nh-sse2-x86_64.o nhpoly1305-sse2-glue.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_NHPOLY1305_AVX2) += nhpoly1305-avx2.o</div><div class='hunk'>@@ -104,10 +88,5 @@ aria-aesni-avx2-x86_64-y := aria-aesni-avx2-asm_64.o aria_aesni_avx2_glue.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64) += aria-gfni-avx512-x86_64.o</div><div class='ctx'> aria-gfni-avx512-x86_64-y := aria-gfni-avx512-asm_64.o aria_gfni_avx512_glue.o</div><div class='ctx'> </div><div class='del'>-quiet_cmd_perlasm = PERLASM $@</div><div class='del'>-      cmd_perlasm = $(PERL) $&lt; &gt; $@</div><div class='del'>-$(obj)/%.S: $(src)/%.pl FORCE</div><div class='del'>-	$(call if_changed,perlasm)</div><div class='del'>-</div><div class='ctx'> # Disable GCOV in odd or sensitive code</div><div class='ctx'> GCOV_PROFILE_curve25519-x86_64.o := n</div><div class='head'>diff --git a/arch/x86/crypto/aegis128-aesni-glue.c b/arch/x86/crypto/aegis128-aesni-glue.c<br/>index 26786e15abac..f1b6d40154e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aegis128-aesni-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aegis128-aesni-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aegis128-aesni-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/aegis128-aesni-glue.c</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -233,21 +232,18 @@ static struct aead_alg crypto_aegis128_aesni_alg = {</div><div class='ctx'> 	.chunksize = AEGIS128_BLOCK_SIZE,</div><div class='ctx'> </div><div class='ctx'> 	.base = {</div><div class='del'>-		.cra_flags = CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.cra_blocksize = 1,</div><div class='ctx'> 		.cra_ctxsize = sizeof(struct aegis_ctx) +</div><div class='ctx'> 			       __alignof__(struct aegis_ctx),</div><div class='ctx'> 		.cra_priority = 400,</div><div class='ctx'> </div><div class='del'>-		.cra_name = "__aegis128",</div><div class='del'>-		.cra_driver_name = "__aegis128-aesni",</div><div class='add'>+		.cra_name = "aegis128",</div><div class='add'>+		.cra_driver_name = "aegis128-aesni",</div><div class='ctx'> </div><div class='ctx'> 		.cra_module = THIS_MODULE,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_aead_alg *simd_alg;</div><div class='del'>-</div><div class='ctx'> static int __init crypto_aegis128_aesni_module_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_XMM4_1) ||</div><div class='hunk'>@@ -255,13 +251,12 @@ static int __init crypto_aegis128_aesni_module_init(void)</div><div class='ctx'> 	    !cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	return simd_register_aeads_compat(&amp;crypto_aegis128_aesni_alg, 1,</div><div class='del'>-					  &amp;simd_alg);</div><div class='add'>+	return crypto_register_aead(&amp;crypto_aegis128_aesni_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit crypto_aegis128_aesni_module_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_aeads(&amp;crypto_aegis128_aesni_alg, 1, &amp;simd_alg);</div><div class='add'>+	crypto_unregister_aead(&amp;crypto_aegis128_aesni_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(crypto_aegis128_aesni_module_init);</div><div class='head'>diff --git a/arch/x86/crypto/aes-ctr-avx-x86_64.S b/arch/x86/crypto/aes-ctr-avx-x86_64.S<br/>index 1685d8b24b2c..bbbfd80f5a50 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aes-ctr-avx-x86_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aes-ctr-avx-x86_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aes-ctr-avx-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/aes-ctr-avx-x86_64.S</a></div><div class='hunk'>@@ -48,8 +48,7 @@</div><div class='ctx'> // using the following sets of CPU features:</div><div class='ctx'> //	- AES-NI &amp;&amp; AVX</div><div class='ctx'> //	- VAES &amp;&amp; AVX2</div><div class='del'>-//	- VAES &amp;&amp; (AVX10/256 || (AVX512BW &amp;&amp; AVX512VL)) &amp;&amp; BMI2</div><div class='del'>-//	- VAES &amp;&amp; (AVX10/512 || (AVX512BW &amp;&amp; AVX512VL)) &amp;&amp; BMI2</div><div class='add'>+//	- VAES &amp;&amp; AVX512BW &amp;&amp; AVX512VL &amp;&amp; BMI2</div><div class='ctx'> //</div><div class='ctx'> // See the function definitions at the bottom of the file for more information.</div><div class='ctx'> </div><div class='hunk'>@@ -76,7 +75,6 @@</div><div class='ctx'> .text</div><div class='ctx'> </div><div class='ctx'> // Move a vector between memory and a register.</div><div class='del'>-// The register operand must be in the first 16 vector registers.</div><div class='ctx'> .macro	_vmovdqu	src, dst</div><div class='ctx'> .if VL &lt; 64</div><div class='ctx'> 	vmovdqu		\src, \dst</div><div class='hunk'>@@ -86,7 +84,6 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> // Move a vector between registers.</div><div class='del'>-// The registers must be in the first 16 vector registers.</div><div class='ctx'> .macro	_vmovdqa	src, dst</div><div class='ctx'> .if VL &lt; 64</div><div class='ctx'> 	vmovdqa		\src, \dst</div><div class='hunk'>@@ -96,7 +93,7 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> // Broadcast a 128-bit value from memory to all 128-bit lanes of a vector</div><div class='del'>-// register.  The register operand must be in the first 16 vector registers.</div><div class='add'>+// register.</div><div class='ctx'> .macro	_vbroadcast128	src, dst</div><div class='ctx'> .if VL == 16</div><div class='ctx'> 	vmovdqu		\src, \dst</div><div class='hunk'>@@ -108,7 +105,6 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> // XOR two vectors together.</div><div class='del'>-// Any register operands must be in the first 16 vector registers.</div><div class='ctx'> .macro	_vpxor	src1, src2, dst</div><div class='ctx'> .if VL &lt; 64</div><div class='ctx'> 	vpxor		\src1, \src2, \dst</div><div class='hunk'>@@ -199,8 +195,8 @@</div><div class='ctx'> // XOR each with the zero-th round key.  Also update LE_CTR if !\final.</div><div class='ctx'> .macro	_prepare_2_ctr_vecs	is_xctr, i0, i1, final=0</div><div class='ctx'> .if \is_xctr</div><div class='del'>-  .if USE_AVX10</div><div class='del'>-	_vmovdqa	LE_CTR, AESDATA\i0</div><div class='add'>+  .if USE_AVX512</div><div class='add'>+	vmovdqa64	LE_CTR, AESDATA\i0</div><div class='ctx'> 	vpternlogd	$0x96, XCTR_IV, RNDKEY0, AESDATA\i0</div><div class='ctx'>   .else</div><div class='ctx'> 	vpxor		XCTR_IV, LE_CTR, AESDATA\i0</div><div class='hunk'>@@ -208,7 +204,7 @@</div><div class='ctx'>   .endif</div><div class='ctx'> 	vpaddq		LE_CTR_INC1, LE_CTR, AESDATA\i1</div><div class='ctx'> </div><div class='del'>-  .if USE_AVX10</div><div class='add'>+  .if USE_AVX512</div><div class='ctx'> 	vpternlogd	$0x96, XCTR_IV, RNDKEY0, AESDATA\i1</div><div class='ctx'>   .else</div><div class='ctx'> 	vpxor		XCTR_IV, AESDATA\i1, AESDATA\i1</div><div class='hunk'>@@ -481,18 +477,12 @@</div><div class='ctx'> .Lxor_tail_partial_vec_0\@:</div><div class='ctx'> 	// XOR the remaining 1 &lt;= LEN &lt; VL bytes.  It's easy if masked</div><div class='ctx'> 	// loads/stores are available; otherwise it's a bit harder...</div><div class='del'>-.if USE_AVX10</div><div class='del'>-  .if VL &lt;= 32</div><div class='del'>-	mov		$-1, %eax</div><div class='del'>-	bzhi		LEN, %eax, %eax</div><div class='del'>-	kmovd		%eax, %k1</div><div class='del'>-  .else</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	mov		$-1, %rax</div><div class='ctx'> 	bzhi		LEN64, %rax, %rax</div><div class='ctx'> 	kmovq		%rax, %k1</div><div class='del'>-  .endif</div><div class='ctx'> 	vmovdqu8	(SRC), AESDATA1{%k1}{z}</div><div class='del'>-	_vpxor		AESDATA1, AESDATA0, AESDATA0</div><div class='add'>+	vpxord		AESDATA1, AESDATA0, AESDATA0</div><div class='ctx'> 	vmovdqu8	AESDATA0, (DST){%k1}</div><div class='ctx'> .else</div><div class='ctx'>   .if VL == 32</div><div class='hunk'>@@ -554,7 +544,7 @@</div><div class='ctx'> // eliminates carries.  |ctr| is the per-message block counter starting at 1.</div><div class='ctx'> </div><div class='ctx'> .set	VL, 16</div><div class='del'>-.set	USE_AVX10, 0</div><div class='add'>+.set	USE_AVX512, 0</div><div class='ctx'> SYM_TYPED_FUNC_START(aes_ctr64_crypt_aesni_avx)</div><div class='ctx'> 	_aes_ctr_crypt	0</div><div class='ctx'> SYM_FUNC_END(aes_ctr64_crypt_aesni_avx)</div><div class='hunk'>@@ -564,7 +554,7 @@ SYM_FUNC_END(aes_xctr_crypt_aesni_avx)</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='ctx'> .set	VL, 32</div><div class='del'>-.set	USE_AVX10, 0</div><div class='add'>+.set	USE_AVX512, 0</div><div class='ctx'> SYM_TYPED_FUNC_START(aes_ctr64_crypt_vaes_avx2)</div><div class='ctx'> 	_aes_ctr_crypt	0</div><div class='ctx'> SYM_FUNC_END(aes_ctr64_crypt_vaes_avx2)</div><div class='hunk'>@@ -572,21 +562,12 @@ SYM_TYPED_FUNC_START(aes_xctr_crypt_vaes_avx2)</div><div class='ctx'> 	_aes_ctr_crypt	1</div><div class='ctx'> SYM_FUNC_END(aes_xctr_crypt_vaes_avx2)</div><div class='ctx'> </div><div class='del'>-.set	VL, 32</div><div class='del'>-.set	USE_AVX10, 1</div><div class='del'>-SYM_TYPED_FUNC_START(aes_ctr64_crypt_vaes_avx10_256)</div><div class='del'>-	_aes_ctr_crypt	0</div><div class='del'>-SYM_FUNC_END(aes_ctr64_crypt_vaes_avx10_256)</div><div class='del'>-SYM_TYPED_FUNC_START(aes_xctr_crypt_vaes_avx10_256)</div><div class='del'>-	_aes_ctr_crypt	1</div><div class='del'>-SYM_FUNC_END(aes_xctr_crypt_vaes_avx10_256)</div><div class='del'>-</div><div class='ctx'> .set	VL, 64</div><div class='del'>-.set	USE_AVX10, 1</div><div class='del'>-SYM_TYPED_FUNC_START(aes_ctr64_crypt_vaes_avx10_512)</div><div class='add'>+.set	USE_AVX512, 1</div><div class='add'>+SYM_TYPED_FUNC_START(aes_ctr64_crypt_vaes_avx512)</div><div class='ctx'> 	_aes_ctr_crypt	0</div><div class='del'>-SYM_FUNC_END(aes_ctr64_crypt_vaes_avx10_512)</div><div class='del'>-SYM_TYPED_FUNC_START(aes_xctr_crypt_vaes_avx10_512)</div><div class='add'>+SYM_FUNC_END(aes_ctr64_crypt_vaes_avx512)</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xctr_crypt_vaes_avx512)</div><div class='ctx'> 	_aes_ctr_crypt	1</div><div class='del'>-SYM_FUNC_END(aes_xctr_crypt_vaes_avx10_512)</div><div class='add'>+SYM_FUNC_END(aes_xctr_crypt_vaes_avx512)</div><div class='ctx'> #endif // CONFIG_AS_VAES &amp;&amp; CONFIG_AS_VPCLMULQDQ</div><div class='head'>diff --git a/arch/x86/crypto/aes-xts-avx-x86_64.S b/arch/x86/crypto/aes-xts-avx-x86_64.S<br/>index 93ba0ddbe009..db79cdf81588 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aes-xts-avx-x86_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aes-xts-avx-x86_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aes-xts-avx-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/aes-xts-avx-x86_64.S</a></div><div class='hunk'>@@ -52,32 +52,25 @@</div><div class='ctx'>  * different code, it uses a macro to generate several implementations that</div><div class='ctx'>  * share similar source code but are targeted at different CPUs, listed below:</div><div class='ctx'>  *</div><div class='del'>- * AES-NI + AVX</div><div class='add'>+ * AES-NI &amp;&amp; AVX</div><div class='ctx'>  *    - 128-bit vectors (1 AES block per vector)</div><div class='ctx'>  *    - VEX-coded instructions</div><div class='ctx'>  *    - xmm0-xmm15</div><div class='ctx'>  *    - This is for older CPUs that lack VAES but do have AVX.</div><div class='ctx'>  *</div><div class='del'>- * VAES + VPCLMULQDQ + AVX2</div><div class='add'>+ * VAES &amp;&amp; VPCLMULQDQ &amp;&amp; AVX2</div><div class='ctx'>  *    - 256-bit vectors (2 AES blocks per vector)</div><div class='ctx'>  *    - VEX-coded instructions</div><div class='ctx'>  *    - ymm0-ymm15</div><div class='del'>- *    - This is for CPUs that have VAES but lack AVX512 or AVX10,</div><div class='del'>- *      e.g. Intel's Alder Lake and AMD's Zen 3.</div><div class='add'>+ *    - This is for CPUs that have VAES but either lack AVX512 (e.g. Intel's</div><div class='add'>+ *      Alder Lake and AMD's Zen 3) or downclock too eagerly when using zmm</div><div class='add'>+ *      registers (e.g. Intel's Ice Lake).</div><div class='ctx'>  *</div><div class='del'>- * VAES + VPCLMULQDQ + AVX10/256 + BMI2</div><div class='del'>- *    - 256-bit vectors (2 AES blocks per vector)</div><div class='add'>+ * VAES &amp;&amp; VPCLMULQDQ &amp;&amp; AVX512BW &amp;&amp; AVX512VL &amp;&amp; BMI2</div><div class='add'>+ *    - 512-bit vectors (4 AES blocks per vector)</div><div class='ctx'>  *    - EVEX-coded instructions</div><div class='del'>- *    - ymm0-ymm31</div><div class='del'>- *    - This is for CPUs that have AVX512 but where using zmm registers causes</div><div class='del'>- *      downclocking, and for CPUs that have AVX10/256 but not AVX10/512.</div><div class='del'>- *    - By "AVX10/256" we really mean (AVX512BW + AVX512VL) || AVX10/256.</div><div class='del'>- *      To avoid confusion with 512-bit, we just write AVX10/256.</div><div class='del'>- *</div><div class='del'>- * VAES + VPCLMULQDQ + AVX10/512 + BMI2</div><div class='del'>- *    - Same as the previous one, but upgrades to 512-bit vectors</div><div class='del'>- *      (4 AES blocks per vector) in zmm0-zmm31.</div><div class='del'>- *    - This is for CPUs that have good AVX512 or AVX10/512 support.</div><div class='add'>+ *    - zmm0-zmm31</div><div class='add'>+ *    - This is for CPUs that have good AVX512 support.</div><div class='ctx'>  *</div><div class='ctx'>  * This file doesn't have an implementation for AES-NI alone (without AVX), as</div><div class='ctx'>  * the lack of VEX would make all the assembly code different.</div><div class='hunk'>@@ -107,9 +100,20 @@</div><div class='ctx'> 	// exists when there's a carry out of the low 64 bits of the tweak.</div><div class='ctx'> 	.quad	0x87, 1</div><div class='ctx'> </div><div class='add'>+	// These are the shift amounts that are needed when multiplying by [x^0,</div><div class='add'>+	// x^1, x^2, x^3] to compute the first vector of tweaks when VL=64.</div><div class='add'>+	//</div><div class='add'>+	// The right shifts by 64 are expected to zeroize the destination.</div><div class='add'>+	// 'vpsrlvq' is indeed defined to do that; i.e. it doesn't truncate the</div><div class='add'>+	// amount to 64 &amp; 63 = 0 like the 'shr' scalar shift instruction would.</div><div class='add'>+.Lrshift_amounts:</div><div class='add'>+	.byte	64, 64, 63, 63, 62, 62, 61, 61</div><div class='add'>+.Llshift_amounts:</div><div class='add'>+	.byte	0, 0, 1, 1, 2, 2, 3, 3</div><div class='add'>+</div><div class='ctx'> 	// This table contains constants for vpshufb and vpblendvb, used to</div><div class='ctx'> 	// handle variable byte shifts and blending during ciphertext stealing</div><div class='del'>-	// on CPUs that don't support AVX10-style masking.</div><div class='add'>+	// on CPUs that don't support AVX512-style masking.</div><div class='ctx'> .Lcts_permute_table:</div><div class='ctx'> 	.byte	0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80</div><div class='ctx'> 	.byte	0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80</div><div class='hunk'>@@ -138,7 +142,7 @@</div><div class='ctx'> .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15</div><div class='ctx'> 	_define_Vi	\i</div><div class='ctx'> .endr</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> .irp i, 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31</div><div class='ctx'> 	_define_Vi	\i</div><div class='ctx'> .endr</div><div class='hunk'>@@ -193,7 +197,7 @@</div><div class='ctx'> 	// keys to the *end* of this register range.  I.e., AES-128 uses</div><div class='ctx'> 	// KEY5-KEY14, AES-192 uses KEY3-KEY14, and AES-256 uses KEY1-KEY14.</div><div class='ctx'> 	// (All also use KEY0 for the XOR-only "round" at the beginning.)</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	.set	KEY1_XMM,	%xmm16</div><div class='ctx'> 	.set	KEY1,		V16</div><div class='ctx'> 	.set	KEY2_XMM,	%xmm17</div><div class='hunk'>@@ -227,7 +231,6 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> // Move a vector between memory and a register.</div><div class='del'>-// The register operand must be in the first 16 vector registers.</div><div class='ctx'> .macro	_vmovdqu	src, dst</div><div class='ctx'> .if VL &lt; 64</div><div class='ctx'> 	vmovdqu		\src, \dst</div><div class='hunk'>@@ -238,9 +241,9 @@</div><div class='ctx'> </div><div class='ctx'> // Broadcast a 128-bit value into a vector.</div><div class='ctx'> .macro	_vbroadcast128	src, dst</div><div class='del'>-.if VL == 16 &amp;&amp; !USE_AVX10</div><div class='add'>+.if VL == 16</div><div class='ctx'> 	vmovdqu		\src, \dst</div><div class='del'>-.elseif VL == 32 &amp;&amp; !USE_AVX10</div><div class='add'>+.elseif VL == 32</div><div class='ctx'> 	vbroadcasti128	\src, \dst</div><div class='ctx'> .else</div><div class='ctx'> 	vbroadcasti32x4	\src, \dst</div><div class='hunk'>@@ -248,7 +251,6 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> // XOR two vectors together.</div><div class='del'>-// Any register operands must be in the first 16 vector registers.</div><div class='ctx'> .macro	_vpxor	src1, src2, dst</div><div class='ctx'> .if VL &lt; 64</div><div class='ctx'> 	vpxor		\src1, \src2, \dst</div><div class='hunk'>@@ -259,7 +261,7 @@</div><div class='ctx'> </div><div class='ctx'> // XOR three vectors together.</div><div class='ctx'> .macro	_xor3	src1, src2, src3_and_dst</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	// vpternlogd with immediate 0x96 is a three-argument XOR.</div><div class='ctx'> 	vpternlogd	$0x96, \src1, \src2, \src3_and_dst</div><div class='ctx'> .else</div><div class='hunk'>@@ -274,7 +276,7 @@</div><div class='ctx'> 	vpshufd		$0x13, \src, \tmp</div><div class='ctx'> 	vpaddq		\src, \src, \dst</div><div class='ctx'> 	vpsrad		$31, \tmp, \tmp</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	vpternlogd	$0x78, GF_POLY_XMM, \tmp, \dst</div><div class='ctx'> .else</div><div class='ctx'> 	vpand		GF_POLY_XMM, \tmp, \tmp</div><div class='hunk'>@@ -303,52 +305,75 @@</div><div class='ctx'> // Given the first XTS tweak at (TWEAK), compute the first set of tweaks and</div><div class='ctx'> // store them in the vector registers TWEAK0-TWEAK3.  Clobbers V0-V5.</div><div class='ctx'> .macro	_compute_first_set_of_tweaks</div><div class='del'>-	vmovdqu		(TWEAK), TWEAK0_XMM</div><div class='del'>-	_vbroadcast128	.Lgf_poly(%rip), GF_POLY</div><div class='ctx'> .if VL == 16</div><div class='del'>-	// With VL=16, multiplying by x serially is fastest.</div><div class='add'>+	vmovdqu		(TWEAK), TWEAK0_XMM</div><div class='add'>+	vmovdqu		.Lgf_poly(%rip), GF_POLY</div><div class='ctx'> 	_next_tweak	TWEAK0, %xmm0, TWEAK1</div><div class='ctx'> 	_next_tweak	TWEAK1, %xmm0, TWEAK2</div><div class='ctx'> 	_next_tweak	TWEAK2, %xmm0, TWEAK3</div><div class='del'>-.else</div><div class='del'>-.if VL == 32</div><div class='del'>-	// Compute the second block of TWEAK0.</div><div class='add'>+.elseif VL == 32</div><div class='add'>+	vmovdqu		(TWEAK), TWEAK0_XMM</div><div class='add'>+	vbroadcasti128	.Lgf_poly(%rip), GF_POLY</div><div class='add'>+</div><div class='add'>+	// Compute the first vector of tweaks.</div><div class='ctx'> 	_next_tweak	TWEAK0_XMM, %xmm0, %xmm1</div><div class='ctx'> 	vinserti128	$1, %xmm1, TWEAK0, TWEAK0</div><div class='del'>-.elseif VL == 64</div><div class='del'>-	// Compute the remaining blocks of TWEAK0.</div><div class='del'>-	_next_tweak	TWEAK0_XMM, %xmm0, %xmm1</div><div class='del'>-	_next_tweak	%xmm1, %xmm0, %xmm2</div><div class='del'>-	_next_tweak	%xmm2, %xmm0, %xmm3</div><div class='del'>-	vinserti32x4	$1, %xmm1, TWEAK0, TWEAK0</div><div class='del'>-	vinserti32x4	$2, %xmm2, TWEAK0, TWEAK0</div><div class='del'>-	vinserti32x4	$3, %xmm3, TWEAK0, TWEAK0</div><div class='del'>-.endif</div><div class='del'>-	// Compute TWEAK[1-3] from TWEAK0.</div><div class='del'>-	vpsrlq		$64 - 1*VL/16, TWEAK0, V0</div><div class='del'>-	vpsrlq		$64 - 2*VL/16, TWEAK0, V2</div><div class='del'>-	vpsrlq		$64 - 3*VL/16, TWEAK0, V4</div><div class='add'>+</div><div class='add'>+	// Compute the next three vectors of tweaks:</div><div class='add'>+	//	TWEAK1 = TWEAK0 * [x^2, x^2]</div><div class='add'>+	//	TWEAK2 = TWEAK0 * [x^4, x^4]</div><div class='add'>+	//	TWEAK3 = TWEAK0 * [x^6, x^6]</div><div class='add'>+	vpsrlq		$64 - 2, TWEAK0, V0</div><div class='add'>+	vpsrlq		$64 - 4, TWEAK0, V2</div><div class='add'>+	vpsrlq		$64 - 6, TWEAK0, V4</div><div class='ctx'> 	vpclmulqdq	$0x01, GF_POLY, V0, V1</div><div class='ctx'> 	vpclmulqdq	$0x01, GF_POLY, V2, V3</div><div class='ctx'> 	vpclmulqdq	$0x01, GF_POLY, V4, V5</div><div class='ctx'> 	vpslldq		$8, V0, V0</div><div class='ctx'> 	vpslldq		$8, V2, V2</div><div class='ctx'> 	vpslldq		$8, V4, V4</div><div class='del'>-	vpsllq		$1*VL/16, TWEAK0, TWEAK1</div><div class='del'>-	vpsllq		$2*VL/16, TWEAK0, TWEAK2</div><div class='del'>-	vpsllq		$3*VL/16, TWEAK0, TWEAK3</div><div class='del'>-.if USE_AVX10</div><div class='del'>-	vpternlogd	$0x96, V0, V1, TWEAK1</div><div class='del'>-	vpternlogd	$0x96, V2, V3, TWEAK2</div><div class='del'>-	vpternlogd	$0x96, V4, V5, TWEAK3</div><div class='del'>-.else</div><div class='add'>+	vpsllq		$2, TWEAK0, TWEAK1</div><div class='add'>+	vpsllq		$4, TWEAK0, TWEAK2</div><div class='add'>+	vpsllq		$6, TWEAK0, TWEAK3</div><div class='ctx'> 	vpxor		V0, TWEAK1, TWEAK1</div><div class='ctx'> 	vpxor		V2, TWEAK2, TWEAK2</div><div class='ctx'> 	vpxor		V4, TWEAK3, TWEAK3</div><div class='ctx'> 	vpxor		V1, TWEAK1, TWEAK1</div><div class='ctx'> 	vpxor		V3, TWEAK2, TWEAK2</div><div class='ctx'> 	vpxor		V5, TWEAK3, TWEAK3</div><div class='del'>-.endif</div><div class='add'>+.else</div><div class='add'>+	vbroadcasti32x4	(TWEAK), TWEAK0</div><div class='add'>+	vbroadcasti32x4	.Lgf_poly(%rip), GF_POLY</div><div class='add'>+</div><div class='add'>+	// Compute the first vector of tweaks:</div><div class='add'>+	//	TWEAK0 = broadcast128(TWEAK) * [x^0, x^1, x^2, x^3]</div><div class='add'>+	vpmovzxbq	.Lrshift_amounts(%rip), V4</div><div class='add'>+	vpsrlvq		V4, TWEAK0, V0</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, V0, V1</div><div class='add'>+	vpmovzxbq	.Llshift_amounts(%rip), V4</div><div class='add'>+	vpslldq		$8, V0, V0</div><div class='add'>+	vpsllvq		V4, TWEAK0, TWEAK0</div><div class='add'>+	vpternlogd	$0x96, V0, V1, TWEAK0</div><div class='add'>+</div><div class='add'>+	// Compute the next three vectors of tweaks:</div><div class='add'>+	//	TWEAK1 = TWEAK0 * [x^4, x^4, x^4, x^4]</div><div class='add'>+	//	TWEAK2 = TWEAK0 * [x^8, x^8, x^8, x^8]</div><div class='add'>+	//	TWEAK3 = TWEAK0 * [x^12, x^12, x^12, x^12]</div><div class='add'>+	// x^8 only needs byte-aligned shifts, so optimize accordingly.</div><div class='add'>+	vpsrlq		$64 - 4, TWEAK0, V0</div><div class='add'>+	vpsrldq		$(64 - 8) / 8, TWEAK0, V2</div><div class='add'>+	vpsrlq		$64 - 12, TWEAK0, V4</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, V0, V1</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, V2, V3</div><div class='add'>+	vpclmulqdq	$0x01, GF_POLY, V4, V5</div><div class='add'>+	vpslldq		$8, V0, V0</div><div class='add'>+	vpslldq		$8, V4, V4</div><div class='add'>+	vpsllq		$4, TWEAK0, TWEAK1</div><div class='add'>+	vpslldq		$8 / 8, TWEAK0, TWEAK2</div><div class='add'>+	vpsllq		$12, TWEAK0, TWEAK3</div><div class='add'>+	vpternlogd	$0x96, V0, V1, TWEAK1</div><div class='add'>+	vpxord		V3, TWEAK2, TWEAK2</div><div class='add'>+	vpternlogd	$0x96, V4, V5, TWEAK3</div><div class='ctx'> .endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -474,26 +499,26 @@</div><div class='ctx'> 	lea		OFFS-16(KEY, KEYLEN64, 4), KEY</div><div class='ctx'> </div><div class='ctx'> 	// If all 32 SIMD registers are available, cache all the round keys.</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	cmp		$24, KEYLEN</div><div class='ctx'> 	jl		.Laes128\@</div><div class='ctx'> 	je		.Laes192\@</div><div class='del'>-	_vbroadcast128	-6*16(KEY), KEY1</div><div class='del'>-	_vbroadcast128	-5*16(KEY), KEY2</div><div class='add'>+	vbroadcasti32x4	-6*16(KEY), KEY1</div><div class='add'>+	vbroadcasti32x4	-5*16(KEY), KEY2</div><div class='ctx'> .Laes192\@:</div><div class='del'>-	_vbroadcast128	-4*16(KEY), KEY3</div><div class='del'>-	_vbroadcast128	-3*16(KEY), KEY4</div><div class='add'>+	vbroadcasti32x4	-4*16(KEY), KEY3</div><div class='add'>+	vbroadcasti32x4	-3*16(KEY), KEY4</div><div class='ctx'> .Laes128\@:</div><div class='del'>-	_vbroadcast128	-2*16(KEY), KEY5</div><div class='del'>-	_vbroadcast128	-1*16(KEY), KEY6</div><div class='del'>-	_vbroadcast128	0*16(KEY), KEY7</div><div class='del'>-	_vbroadcast128	1*16(KEY), KEY8</div><div class='del'>-	_vbroadcast128	2*16(KEY), KEY9</div><div class='del'>-	_vbroadcast128	3*16(KEY), KEY10</div><div class='del'>-	_vbroadcast128	4*16(KEY), KEY11</div><div class='del'>-	_vbroadcast128	5*16(KEY), KEY12</div><div class='del'>-	_vbroadcast128	6*16(KEY), KEY13</div><div class='del'>-	_vbroadcast128	7*16(KEY), KEY14</div><div class='add'>+	vbroadcasti32x4	-2*16(KEY), KEY5</div><div class='add'>+	vbroadcasti32x4	-1*16(KEY), KEY6</div><div class='add'>+	vbroadcasti32x4	0*16(KEY), KEY7</div><div class='add'>+	vbroadcasti32x4	1*16(KEY), KEY8</div><div class='add'>+	vbroadcasti32x4	2*16(KEY), KEY9</div><div class='add'>+	vbroadcasti32x4	3*16(KEY), KEY10</div><div class='add'>+	vbroadcasti32x4	4*16(KEY), KEY11</div><div class='add'>+	vbroadcasti32x4	5*16(KEY), KEY12</div><div class='add'>+	vbroadcasti32x4	6*16(KEY), KEY13</div><div class='add'>+	vbroadcasti32x4	7*16(KEY), KEY14</div><div class='ctx'> .endif</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -521,7 +546,7 @@</div><div class='ctx'> // using the same key for all block(s).  The round key is loaded from the</div><div class='ctx'> // appropriate register or memory location for round \i.  May clobber \tmp.</div><div class='ctx'> .macro _vaes_1x		enc, i, xmm_suffix, data, tmp</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	_vaes		\enc, KEY\i\xmm_suffix, \data</div><div class='ctx'> .else</div><div class='ctx'> .ifnb \xmm_suffix</div><div class='hunk'>@@ -538,7 +563,7 @@</div><div class='ctx'> // appropriate register or memory location for round \i.  In addition, does two</div><div class='ctx'> // steps of the computation of the next set of tweaks.  May clobber V4 and V5.</div><div class='ctx'> .macro	_vaes_4x	enc, i</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	_tweak_step	(2*(\i-5))</div><div class='ctx'> 	_vaes		\enc, KEY\i, V0</div><div class='ctx'> 	_vaes		\enc, KEY\i, V1</div><div class='hunk'>@@ -574,7 +599,7 @@</div><div class='ctx'> .irp i, 5,6,7,8,9,10,11,12,13</div><div class='ctx'> 	_vaes_1x	\enc, \i, \xmm_suffix, \data, tmp=\tmp</div><div class='ctx'> .endr</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	vpxord		KEY14\xmm_suffix, \tweak, \tmp</div><div class='ctx'> .else</div><div class='ctx'> .ifnb \xmm_suffix</div><div class='hunk'>@@ -617,11 +642,11 @@</div><div class='ctx'> 	// This is the main loop, en/decrypting 4*VL bytes per iteration.</div><div class='ctx'> </div><div class='ctx'> 	// XOR each source block with its tweak and the zero-th round key.</div><div class='del'>-.if USE_AVX10</div><div class='del'>-	_vmovdqu	0*VL(SRC), V0</div><div class='del'>-	_vmovdqu	1*VL(SRC), V1</div><div class='del'>-	_vmovdqu	2*VL(SRC), V2</div><div class='del'>-	_vmovdqu	3*VL(SRC), V3</div><div class='add'>+.if USE_AVX512</div><div class='add'>+	vmovdqu8	0*VL(SRC), V0</div><div class='add'>+	vmovdqu8	1*VL(SRC), V1</div><div class='add'>+	vmovdqu8	2*VL(SRC), V2</div><div class='add'>+	vmovdqu8	3*VL(SRC), V3</div><div class='ctx'> 	vpternlogd	$0x96, TWEAK0, KEY0, V0</div><div class='ctx'> 	vpternlogd	$0x96, TWEAK1, KEY0, V1</div><div class='ctx'> 	vpternlogd	$0x96, TWEAK2, KEY0, V2</div><div class='hunk'>@@ -654,7 +679,7 @@</div><div class='ctx'> 	// Reduce latency by doing the XOR before the vaesenclast, utilizing the</div><div class='ctx'> 	// property vaesenclast(key, a) ^ b == vaesenclast(key ^ b, a)</div><div class='ctx'> 	// (and likewise for vaesdeclast).</div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	_tweak_step	18</div><div class='ctx'> 	_tweak_step	19</div><div class='ctx'> 	vpxord		TWEAK0, KEY14, V4</div><div class='hunk'>@@ -762,7 +787,7 @@</div><div class='ctx'> 	_aes_crypt	\enc, _XMM, TWEAK1_XMM, %xmm0, tmp=%xmm1</div><div class='ctx'> .endif</div><div class='ctx'> </div><div class='del'>-.if USE_AVX10</div><div class='add'>+.if USE_AVX512</div><div class='ctx'> 	// Create a mask that has the first LEN bits set.</div><div class='ctx'> 	mov		$-1, %r9d</div><div class='ctx'> 	bzhi		LEN, %r9d, %r9d</div><div class='hunk'>@@ -811,7 +836,7 @@</div><div class='ctx'> //			   u8 iv[AES_BLOCK_SIZE]);</div><div class='ctx'> //</div><div class='ctx'> // Encrypt |iv| using the AES key |tweak_key| to get the first tweak.  Assumes</div><div class='del'>-// that the CPU supports AES-NI and AVX, but not necessarily VAES or AVX10.</div><div class='add'>+// that the CPU supports AES-NI and AVX, but not necessarily VAES or AVX512.</div><div class='ctx'> SYM_TYPED_FUNC_START(aes_xts_encrypt_iv)</div><div class='ctx'> 	.set	TWEAK_KEY,	%rdi</div><div class='ctx'> 	.set	IV,		%rsi</div><div class='hunk'>@@ -853,7 +878,7 @@ SYM_FUNC_END(aes_xts_encrypt_iv)</div><div class='ctx'> // multiple of 16, then this function updates |tweak| to contain the next tweak.</div><div class='ctx'> </div><div class='ctx'> .set	VL, 16</div><div class='del'>-.set	USE_AVX10, 0</div><div class='add'>+.set	USE_AVX512, 0</div><div class='ctx'> SYM_TYPED_FUNC_START(aes_xts_encrypt_aesni_avx)</div><div class='ctx'> 	_aes_xts_crypt	1</div><div class='ctx'> SYM_FUNC_END(aes_xts_encrypt_aesni_avx)</div><div class='hunk'>@@ -863,7 +888,7 @@ SYM_FUNC_END(aes_xts_decrypt_aesni_avx)</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='ctx'> .set	VL, 32</div><div class='del'>-.set	USE_AVX10, 0</div><div class='add'>+.set	USE_AVX512, 0</div><div class='ctx'> SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx2)</div><div class='ctx'> 	_aes_xts_crypt	1</div><div class='ctx'> SYM_FUNC_END(aes_xts_encrypt_vaes_avx2)</div><div class='hunk'>@@ -871,21 +896,12 @@ SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx2)</div><div class='ctx'> 	_aes_xts_crypt	0</div><div class='ctx'> SYM_FUNC_END(aes_xts_decrypt_vaes_avx2)</div><div class='ctx'> </div><div class='del'>-.set	VL, 32</div><div class='del'>-.set	USE_AVX10, 1</div><div class='del'>-SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx10_256)</div><div class='del'>-	_aes_xts_crypt	1</div><div class='del'>-SYM_FUNC_END(aes_xts_encrypt_vaes_avx10_256)</div><div class='del'>-SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx10_256)</div><div class='del'>-	_aes_xts_crypt	0</div><div class='del'>-SYM_FUNC_END(aes_xts_decrypt_vaes_avx10_256)</div><div class='del'>-</div><div class='ctx'> .set	VL, 64</div><div class='del'>-.set	USE_AVX10, 1</div><div class='del'>-SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx10_512)</div><div class='add'>+.set	USE_AVX512, 1</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_encrypt_vaes_avx512)</div><div class='ctx'> 	_aes_xts_crypt	1</div><div class='del'>-SYM_FUNC_END(aes_xts_encrypt_vaes_avx10_512)</div><div class='del'>-SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx10_512)</div><div class='add'>+SYM_FUNC_END(aes_xts_encrypt_vaes_avx512)</div><div class='add'>+SYM_TYPED_FUNC_START(aes_xts_decrypt_vaes_avx512)</div><div class='ctx'> 	_aes_xts_crypt	0</div><div class='del'>-SYM_FUNC_END(aes_xts_decrypt_vaes_avx10_512)</div><div class='add'>+SYM_FUNC_END(aes_xts_decrypt_vaes_avx512)</div><div class='ctx'> #endif /* CONFIG_AS_VAES &amp;&amp; CONFIG_AS_VPCLMULQDQ */</div><div class='head'>diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c<br/>index bc655d794a95..061b1ced93c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aesni-intel_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aesni-intel_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aesni-intel_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/aesni-intel_glue.c</a></div><div class='hunk'>@@ -566,10 +566,9 @@ static struct crypto_alg aesni_cipher_alg = {</div><div class='ctx'> static struct skcipher_alg aesni_skciphers[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__ecb(aes)",</div><div class='del'>-			.cra_driver_name	= "__ecb-aes-aesni",</div><div class='add'>+			.cra_name		= "ecb(aes)",</div><div class='add'>+			.cra_driver_name	= "ecb-aes-aesni",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= CRYPTO_AES_CTX_SIZE,</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -581,10 +580,9 @@ static struct skcipher_alg aesni_skciphers[] = {</div><div class='ctx'> 		.decrypt	= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__cbc(aes)",</div><div class='del'>-			.cra_driver_name	= "__cbc-aes-aesni",</div><div class='add'>+			.cra_name		= "cbc(aes)",</div><div class='add'>+			.cra_driver_name	= "cbc-aes-aesni",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= CRYPTO_AES_CTX_SIZE,</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -597,10 +595,9 @@ static struct skcipher_alg aesni_skciphers[] = {</div><div class='ctx'> 		.decrypt	= cbc_decrypt,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__cts(cbc(aes))",</div><div class='del'>-			.cra_driver_name	= "__cts-cbc-aes-aesni",</div><div class='add'>+			.cra_name		= "cts(cbc(aes))",</div><div class='add'>+			.cra_driver_name	= "cts-cbc-aes-aesni",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= CRYPTO_AES_CTX_SIZE,</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -615,10 +612,9 @@ static struct skcipher_alg aesni_skciphers[] = {</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__ctr(aes)",</div><div class='del'>-			.cra_driver_name	= "__ctr-aes-aesni",</div><div class='add'>+			.cra_name		= "ctr(aes)",</div><div class='add'>+			.cra_driver_name	= "ctr-aes-aesni",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= 1,</div><div class='ctx'> 			.cra_ctxsize		= CRYPTO_AES_CTX_SIZE,</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -633,10 +629,9 @@ static struct skcipher_alg aesni_skciphers[] = {</div><div class='ctx'> #endif</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__xts(aes)",</div><div class='del'>-			.cra_driver_name	= "__xts-aes-aesni",</div><div class='add'>+			.cra_name		= "xts(aes)",</div><div class='add'>+			.cra_driver_name	= "xts-aes-aesni",</div><div class='ctx'> 			.cra_priority		= 401,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= AES_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= XTS_AES_CTX_SIZE,</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -651,9 +646,6 @@ static struct skcipher_alg aesni_skciphers[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static</div><div class='del'>-struct simd_skcipher_alg *aesni_simd_skciphers[ARRAY_SIZE(aesni_skciphers)];</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> asmlinkage void aes_xts_encrypt_iv(const struct crypto_aes_ctx *tweak_key,</div><div class='ctx'> 				   u8 iv[AES_BLOCK_SIZE]);</div><div class='hunk'>@@ -792,10 +784,9 @@ static int xctr_crypt_##suffix(struct skcipher_request *req)		       \</div><div class='ctx'> }									       \</div><div class='ctx'> 									       \</div><div class='ctx'> static struct skcipher_alg skcipher_algs_##suffix[] = {{		       \</div><div class='del'>-	.base.cra_name		= "__xts(aes)",				       \</div><div class='del'>-	.base.cra_driver_name	= "__xts-aes-" driver_name_suffix,	       \</div><div class='add'>+	.base.cra_name		= "xts(aes)",				       \</div><div class='add'>+	.base.cra_driver_name	= "xts-aes-" driver_name_suffix,	       \</div><div class='ctx'> 	.base.cra_priority	= priority,				       \</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,			       \</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,			       \</div><div class='ctx'> 	.base.cra_ctxsize	= XTS_AES_CTX_SIZE,			       \</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,				       \</div><div class='hunk'>@@ -807,10 +798,9 @@ static struct skcipher_alg skcipher_algs_##suffix[] = {{		       \</div><div class='ctx'> 	.encrypt		= xts_encrypt_##suffix,			       \</div><div class='ctx'> 	.decrypt		= xts_decrypt_##suffix,			       \</div><div class='ctx'> }, {									       \</div><div class='del'>-	.base.cra_name		= "__ctr(aes)",				       \</div><div class='del'>-	.base.cra_driver_name	= "__ctr-aes-" driver_name_suffix,	       \</div><div class='add'>+	.base.cra_name		= "ctr(aes)",				       \</div><div class='add'>+	.base.cra_driver_name	= "ctr-aes-" driver_name_suffix,	       \</div><div class='ctx'> 	.base.cra_priority	= priority,				       \</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,			       \</div><div class='ctx'> 	.base.cra_blocksize	= 1,					       \</div><div class='ctx'> 	.base.cra_ctxsize	= CRYPTO_AES_CTX_SIZE,			       \</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,				       \</div><div class='hunk'>@@ -822,10 +812,9 @@ static struct skcipher_alg skcipher_algs_##suffix[] = {{		       \</div><div class='ctx'> 	.encrypt		= ctr_crypt_##suffix,			       \</div><div class='ctx'> 	.decrypt		= ctr_crypt_##suffix,			       \</div><div class='ctx'> }, {									       \</div><div class='del'>-	.base.cra_name		= "__xctr(aes)",			       \</div><div class='del'>-	.base.cra_driver_name	= "__xctr-aes-" driver_name_suffix,	       \</div><div class='add'>+	.base.cra_name		= "xctr(aes)",				       \</div><div class='add'>+	.base.cra_driver_name	= "xctr-aes-" driver_name_suffix,	       \</div><div class='ctx'> 	.base.cra_priority	= priority,				       \</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_INTERNAL,			       \</div><div class='ctx'> 	.base.cra_blocksize	= 1,					       \</div><div class='ctx'> 	.base.cra_ctxsize	= CRYPTO_AES_CTX_SIZE,			       \</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,				       \</div><div class='hunk'>@@ -836,16 +825,12 @@ static struct skcipher_alg skcipher_algs_##suffix[] = {{		       \</div><div class='ctx'> 	.setkey			= aesni_skcipher_setkey,		       \</div><div class='ctx'> 	.encrypt		= xctr_crypt_##suffix,			       \</div><div class='ctx'> 	.decrypt		= xctr_crypt_##suffix,			       \</div><div class='del'>-}};									       \</div><div class='del'>-									       \</div><div class='del'>-static struct simd_skcipher_alg *					       \</div><div class='del'>-simd_skcipher_algs_##suffix[ARRAY_SIZE(skcipher_algs_##suffix)]</div><div class='add'>+}}</div><div class='ctx'> </div><div class='ctx'> DEFINE_AVX_SKCIPHER_ALGS(aesni_avx, "aesni-avx", 500);</div><div class='ctx'> #if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='ctx'> DEFINE_AVX_SKCIPHER_ALGS(vaes_avx2, "vaes-avx2", 600);</div><div class='del'>-DEFINE_AVX_SKCIPHER_ALGS(vaes_avx10_256, "vaes-avx10_256", 700);</div><div class='del'>-DEFINE_AVX_SKCIPHER_ALGS(vaes_avx10_512, "vaes-avx10_512", 800);</div><div class='add'>+DEFINE_AVX_SKCIPHER_ALGS(vaes_avx512, "vaes-avx512", 800);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* The common part of the x86_64 AES-GCM key struct */</div><div class='hunk'>@@ -1499,10 +1484,9 @@ static struct aead_alg aes_gcm_algs_##suffix[] = { {			       \</div><div class='ctx'> 	.chunksize		= AES_BLOCK_SIZE,			       \</div><div class='ctx'> 	.maxauthsize		= 16,					       \</div><div class='ctx'> 	.base = {							       \</div><div class='del'>-		.cra_name		= "__gcm(aes)",			       \</div><div class='del'>-		.cra_driver_name	= "__" generic_driver_name,	       \</div><div class='add'>+		.cra_name		= "gcm(aes)",			       \</div><div class='add'>+		.cra_driver_name	= generic_driver_name,		       \</div><div class='ctx'> 		.cra_priority		= (priority),			       \</div><div class='del'>-		.cra_flags		= CRYPTO_ALG_INTERNAL,		       \</div><div class='ctx'> 		.cra_blocksize		= 1,				       \</div><div class='ctx'> 		.cra_ctxsize		= (ctxsize),			       \</div><div class='ctx'> 		.cra_module		= THIS_MODULE,			       \</div><div class='hunk'>@@ -1516,17 +1500,14 @@ static struct aead_alg aes_gcm_algs_##suffix[] = { {			       \</div><div class='ctx'> 	.chunksize		= AES_BLOCK_SIZE,			       \</div><div class='ctx'> 	.maxauthsize		= 16,					       \</div><div class='ctx'> 	.base = {							       \</div><div class='del'>-		.cra_name		= "__rfc4106(gcm(aes))",	       \</div><div class='del'>-		.cra_driver_name	= "__" rfc_driver_name,		       \</div><div class='add'>+		.cra_name		= "rfc4106(gcm(aes))",		       \</div><div class='add'>+		.cra_driver_name	= rfc_driver_name,		       \</div><div class='ctx'> 		.cra_priority		= (priority),			       \</div><div class='del'>-		.cra_flags		= CRYPTO_ALG_INTERNAL,		       \</div><div class='ctx'> 		.cra_blocksize		= 1,				       \</div><div class='ctx'> 		.cra_ctxsize		= (ctxsize),			       \</div><div class='ctx'> 		.cra_module		= THIS_MODULE,			       \</div><div class='ctx'> 	},								       \</div><div class='del'>-} };									       \</div><div class='del'>-									       \</div><div class='del'>-static struct simd_aead_alg *aes_gcm_simdalgs_##suffix[2]		       \</div><div class='add'>+} }</div><div class='ctx'> </div><div class='ctx'> /* aes_gcm_algs_aesni */</div><div class='ctx'> DEFINE_GCM_ALGS(aesni, /* no flags */ 0,</div><div class='hunk'>@@ -1556,14 +1537,12 @@ static int __init register_avx_algs(void)</div><div class='ctx'> </div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_AVX))</div><div class='ctx'> 		return 0;</div><div class='del'>-	err = simd_register_skciphers_compat(skcipher_algs_aesni_avx,</div><div class='del'>-					     ARRAY_SIZE(skcipher_algs_aesni_avx),</div><div class='del'>-					     simd_skcipher_algs_aesni_avx);</div><div class='add'>+	err = crypto_register_skciphers(skcipher_algs_aesni_avx,</div><div class='add'>+					ARRAY_SIZE(skcipher_algs_aesni_avx));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='del'>-	err = simd_register_aeads_compat(aes_gcm_algs_aesni_avx,</div><div class='del'>-					 ARRAY_SIZE(aes_gcm_algs_aesni_avx),</div><div class='del'>-					 aes_gcm_simdalgs_aesni_avx);</div><div class='add'>+	err = crypto_register_aeads(aes_gcm_algs_aesni_avx,</div><div class='add'>+				    ARRAY_SIZE(aes_gcm_algs_aesni_avx));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1579,9 +1558,8 @@ static int __init register_avx_algs(void)</div><div class='ctx'> 	    !boot_cpu_has(X86_FEATURE_PCLMULQDQ) ||</div><div class='ctx'> 	    !cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))</div><div class='ctx'> 		return 0;</div><div class='del'>-	err = simd_register_skciphers_compat(skcipher_algs_vaes_avx2,</div><div class='del'>-					     ARRAY_SIZE(skcipher_algs_vaes_avx2),</div><div class='del'>-					     simd_skcipher_algs_vaes_avx2);</div><div class='add'>+	err = crypto_register_skciphers(skcipher_algs_vaes_avx2,</div><div class='add'>+					ARRAY_SIZE(skcipher_algs_vaes_avx2));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -1592,76 +1570,52 @@ static int __init register_avx_algs(void)</div><div class='ctx'> 			       XFEATURE_MASK_AVX512, NULL))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	err = simd_register_skciphers_compat(skcipher_algs_vaes_avx10_256,</div><div class='del'>-					     ARRAY_SIZE(skcipher_algs_vaes_avx10_256),</div><div class='del'>-					     simd_skcipher_algs_vaes_avx10_256);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	err = simd_register_aeads_compat(aes_gcm_algs_vaes_avx10_256,</div><div class='del'>-					 ARRAY_SIZE(aes_gcm_algs_vaes_avx10_256),</div><div class='del'>-					 aes_gcm_simdalgs_vaes_avx10_256);</div><div class='add'>+	err = crypto_register_aeads(aes_gcm_algs_vaes_avx10_256,</div><div class='add'>+				    ARRAY_SIZE(aes_gcm_algs_vaes_avx10_256));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_PREFER_YMM)) {</div><div class='ctx'> 		int i;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(skcipher_algs_vaes_avx10_512); i++)</div><div class='del'>-			skcipher_algs_vaes_avx10_512[i].base.cra_priority = 1;</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(skcipher_algs_vaes_avx512); i++)</div><div class='add'>+			skcipher_algs_vaes_avx512[i].base.cra_priority = 1;</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(aes_gcm_algs_vaes_avx10_512); i++)</div><div class='ctx'> 			aes_gcm_algs_vaes_avx10_512[i].base.cra_priority = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = simd_register_skciphers_compat(skcipher_algs_vaes_avx10_512,</div><div class='del'>-					     ARRAY_SIZE(skcipher_algs_vaes_avx10_512),</div><div class='del'>-					     simd_skcipher_algs_vaes_avx10_512);</div><div class='add'>+	err = crypto_register_skciphers(skcipher_algs_vaes_avx512,</div><div class='add'>+					ARRAY_SIZE(skcipher_algs_vaes_avx512));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='del'>-	err = simd_register_aeads_compat(aes_gcm_algs_vaes_avx10_512,</div><div class='del'>-					 ARRAY_SIZE(aes_gcm_algs_vaes_avx10_512),</div><div class='del'>-					 aes_gcm_simdalgs_vaes_avx10_512);</div><div class='add'>+	err = crypto_register_aeads(aes_gcm_algs_vaes_avx10_512,</div><div class='add'>+				    ARRAY_SIZE(aes_gcm_algs_vaes_avx10_512));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> #endif /* CONFIG_AS_VAES &amp;&amp; CONFIG_AS_VPCLMULQDQ */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define unregister_skciphers(A) \</div><div class='add'>+	if (refcount_read(&amp;(A)[0].base.cra_refcnt) != 0) \</div><div class='add'>+		crypto_unregister_skciphers((A), ARRAY_SIZE(A))</div><div class='add'>+#define unregister_aeads(A) \</div><div class='add'>+	if (refcount_read(&amp;(A)[0].base.cra_refcnt) != 0) \</div><div class='add'>+		crypto_unregister_aeads((A), ARRAY_SIZE(A))</div><div class='add'>+</div><div class='ctx'> static void unregister_avx_algs(void)</div><div class='ctx'> {</div><div class='del'>-	if (simd_skcipher_algs_aesni_avx[0])</div><div class='del'>-		simd_unregister_skciphers(skcipher_algs_aesni_avx,</div><div class='del'>-					  ARRAY_SIZE(skcipher_algs_aesni_avx),</div><div class='del'>-					  simd_skcipher_algs_aesni_avx);</div><div class='del'>-	if (aes_gcm_simdalgs_aesni_avx[0])</div><div class='del'>-		simd_unregister_aeads(aes_gcm_algs_aesni_avx,</div><div class='del'>-				      ARRAY_SIZE(aes_gcm_algs_aesni_avx),</div><div class='del'>-				      aes_gcm_simdalgs_aesni_avx);</div><div class='add'>+	unregister_skciphers(skcipher_algs_aesni_avx);</div><div class='add'>+	unregister_aeads(aes_gcm_algs_aesni_avx);</div><div class='ctx'> #if defined(CONFIG_AS_VAES) &amp;&amp; defined(CONFIG_AS_VPCLMULQDQ)</div><div class='del'>-	if (simd_skcipher_algs_vaes_avx2[0])</div><div class='del'>-		simd_unregister_skciphers(skcipher_algs_vaes_avx2,</div><div class='del'>-					  ARRAY_SIZE(skcipher_algs_vaes_avx2),</div><div class='del'>-					  simd_skcipher_algs_vaes_avx2);</div><div class='del'>-	if (simd_skcipher_algs_vaes_avx10_256[0])</div><div class='del'>-		simd_unregister_skciphers(skcipher_algs_vaes_avx10_256,</div><div class='del'>-					  ARRAY_SIZE(skcipher_algs_vaes_avx10_256),</div><div class='del'>-					  simd_skcipher_algs_vaes_avx10_256);</div><div class='del'>-	if (aes_gcm_simdalgs_vaes_avx10_256[0])</div><div class='del'>-		simd_unregister_aeads(aes_gcm_algs_vaes_avx10_256,</div><div class='del'>-				      ARRAY_SIZE(aes_gcm_algs_vaes_avx10_256),</div><div class='del'>-				      aes_gcm_simdalgs_vaes_avx10_256);</div><div class='del'>-	if (simd_skcipher_algs_vaes_avx10_512[0])</div><div class='del'>-		simd_unregister_skciphers(skcipher_algs_vaes_avx10_512,</div><div class='del'>-					  ARRAY_SIZE(skcipher_algs_vaes_avx10_512),</div><div class='del'>-					  simd_skcipher_algs_vaes_avx10_512);</div><div class='del'>-	if (aes_gcm_simdalgs_vaes_avx10_512[0])</div><div class='del'>-		simd_unregister_aeads(aes_gcm_algs_vaes_avx10_512,</div><div class='del'>-				      ARRAY_SIZE(aes_gcm_algs_vaes_avx10_512),</div><div class='del'>-				      aes_gcm_simdalgs_vaes_avx10_512);</div><div class='add'>+	unregister_skciphers(skcipher_algs_vaes_avx2);</div><div class='add'>+	unregister_skciphers(skcipher_algs_vaes_avx512);</div><div class='add'>+	unregister_aeads(aes_gcm_algs_vaes_avx10_256);</div><div class='add'>+	unregister_aeads(aes_gcm_algs_vaes_avx10_512);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> #else /* CONFIG_X86_64 */</div><div class='ctx'> static struct aead_alg aes_gcm_algs_aesni[0];</div><div class='del'>-static struct simd_aead_alg *aes_gcm_simdalgs_aesni[0];</div><div class='ctx'> </div><div class='ctx'> static int __init register_avx_algs(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1690,15 +1644,13 @@ static int __init aesni_init(void)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = simd_register_skciphers_compat(aesni_skciphers,</div><div class='del'>-					     ARRAY_SIZE(aesni_skciphers),</div><div class='del'>-					     aesni_simd_skciphers);</div><div class='add'>+	err = crypto_register_skciphers(aesni_skciphers,</div><div class='add'>+					ARRAY_SIZE(aesni_skciphers));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto unregister_cipher;</div><div class='ctx'> </div><div class='del'>-	err = simd_register_aeads_compat(aes_gcm_algs_aesni,</div><div class='del'>-					 ARRAY_SIZE(aes_gcm_algs_aesni),</div><div class='del'>-					 aes_gcm_simdalgs_aesni);</div><div class='add'>+	err = crypto_register_aeads(aes_gcm_algs_aesni,</div><div class='add'>+				    ARRAY_SIZE(aes_gcm_algs_aesni));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto unregister_skciphers;</div><div class='ctx'> </div><div class='hunk'>@@ -1710,12 +1662,11 @@ static int __init aesni_init(void)</div><div class='ctx'> </div><div class='ctx'> unregister_avx:</div><div class='ctx'> 	unregister_avx_algs();</div><div class='del'>-	simd_unregister_aeads(aes_gcm_algs_aesni,</div><div class='del'>-			      ARRAY_SIZE(aes_gcm_algs_aesni),</div><div class='del'>-			      aes_gcm_simdalgs_aesni);</div><div class='add'>+	crypto_unregister_aeads(aes_gcm_algs_aesni,</div><div class='add'>+				ARRAY_SIZE(aes_gcm_algs_aesni));</div><div class='ctx'> unregister_skciphers:</div><div class='del'>-	simd_unregister_skciphers(aesni_skciphers, ARRAY_SIZE(aesni_skciphers),</div><div class='del'>-				  aesni_simd_skciphers);</div><div class='add'>+	crypto_unregister_skciphers(aesni_skciphers,</div><div class='add'>+				    ARRAY_SIZE(aesni_skciphers));</div><div class='ctx'> unregister_cipher:</div><div class='ctx'> 	crypto_unregister_alg(&amp;aesni_cipher_alg);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1723,11 +1674,10 @@ unregister_cipher:</div><div class='ctx'> </div><div class='ctx'> static void __exit aesni_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_aeads(aes_gcm_algs_aesni,</div><div class='del'>-			      ARRAY_SIZE(aes_gcm_algs_aesni),</div><div class='del'>-			      aes_gcm_simdalgs_aesni);</div><div class='del'>-	simd_unregister_skciphers(aesni_skciphers, ARRAY_SIZE(aesni_skciphers),</div><div class='del'>-				  aesni_simd_skciphers);</div><div class='add'>+	crypto_unregister_aeads(aes_gcm_algs_aesni,</div><div class='add'>+				ARRAY_SIZE(aes_gcm_algs_aesni));</div><div class='add'>+	crypto_unregister_skciphers(aesni_skciphers,</div><div class='add'>+				    ARRAY_SIZE(aesni_skciphers));</div><div class='ctx'> 	crypto_unregister_alg(&amp;aesni_cipher_alg);</div><div class='ctx'> 	unregister_avx_algs();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/crypto/aria_aesni_avx2_glue.c b/arch/x86/crypto/aria_aesni_avx2_glue.c<br/>index 87a11804fc77..b4bddcd58457 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aria_aesni_avx2_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aria_aesni_avx2_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aria_aesni_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/aria_aesni_avx2_glue.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/aria.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='hunk'>@@ -165,10 +164,9 @@ static int aria_avx2_init_tfm(struct crypto_skcipher *tfm)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(aria)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-aria-avx2",</div><div class='add'>+		.base.cra_name		= "ecb(aria)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-aria-avx2",</div><div class='ctx'> 		.base.cra_priority	= 500,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= ARIA_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct aria_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -178,11 +176,10 @@ static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 		.encrypt		= aria_avx2_ecb_encrypt,</div><div class='ctx'> 		.decrypt		= aria_avx2_ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__ctr(aria)",</div><div class='del'>-		.base.cra_driver_name	= "__ctr-aria-avx2",</div><div class='add'>+		.base.cra_name		= "ctr(aria)",</div><div class='add'>+		.base.cra_driver_name	= "ctr-aria-avx2",</div><div class='ctx'> 		.base.cra_priority	= 500,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL |</div><div class='del'>-					  CRYPTO_ALG_SKCIPHER_REQSIZE_LARGE,</div><div class='add'>+		.base.cra_flags		= CRYPTO_ALG_SKCIPHER_REQSIZE_LARGE,</div><div class='ctx'> 		.base.cra_blocksize	= 1,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct aria_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -197,8 +194,6 @@ static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *aria_simd_algs[ARRAY_SIZE(aria_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init aria_avx2_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -233,15 +228,12 @@ static int __init aria_avx2_init(void)</div><div class='ctx'> 		aria_ops.aria_ctr_crypt_32way = aria_aesni_avx2_ctr_crypt_32way;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(aria_algs,</div><div class='del'>-					      ARRAY_SIZE(aria_algs),</div><div class='del'>-					      aria_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(aria_algs, ARRAY_SIZE(aria_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit aria_avx2_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs),</div><div class='del'>-				  aria_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(aria_avx2_init);</div><div class='head'>diff --git a/arch/x86/crypto/aria_aesni_avx_glue.c b/arch/x86/crypto/aria_aesni_avx_glue.c<br/>index 4e1516b76669..ab9b38d05332 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aria_aesni_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aria_aesni_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aria_aesni_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/aria_aesni_avx_glue.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/aria.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='hunk'>@@ -152,10 +151,9 @@ static int aria_avx_init_tfm(struct crypto_skcipher *tfm)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(aria)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-aria-avx",</div><div class='add'>+		.base.cra_name		= "ecb(aria)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-aria-avx",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= ARIA_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct aria_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -165,10 +163,9 @@ static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 		.encrypt		= aria_avx_ecb_encrypt,</div><div class='ctx'> 		.decrypt		= aria_avx_ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__ctr(aria)",</div><div class='del'>-		.base.cra_driver_name	= "__ctr-aria-avx",</div><div class='add'>+		.base.cra_name		= "ctr(aria)",</div><div class='add'>+		.base.cra_driver_name	= "ctr-aria-avx",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= 1,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct aria_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -184,8 +181,6 @@ static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *aria_simd_algs[ARRAY_SIZE(aria_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init aria_avx_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -213,15 +208,12 @@ static int __init aria_avx_init(void)</div><div class='ctx'> 		aria_ops.aria_ctr_crypt_16way = aria_aesni_avx_ctr_crypt_16way;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(aria_algs,</div><div class='del'>-					      ARRAY_SIZE(aria_algs),</div><div class='del'>-					      aria_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(aria_algs, ARRAY_SIZE(aria_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit aria_avx_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs),</div><div class='del'>-				  aria_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(aria_avx_init);</div><div class='head'>diff --git a/arch/x86/crypto/aria_gfni_avx512_glue.c b/arch/x86/crypto/aria_gfni_avx512_glue.c<br/>index f4a2208d2638..363cbf4399cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/aria_gfni_avx512_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/aria_gfni_avx512_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/aria_gfni_avx512_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/aria_gfni_avx512_glue.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/aria.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='hunk'>@@ -165,10 +164,9 @@ static int aria_avx512_init_tfm(struct crypto_skcipher *tfm)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(aria)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-aria-avx512",</div><div class='add'>+		.base.cra_name		= "ecb(aria)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-aria-avx512",</div><div class='ctx'> 		.base.cra_priority	= 600,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= ARIA_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct aria_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -178,11 +176,10 @@ static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 		.encrypt		= aria_avx512_ecb_encrypt,</div><div class='ctx'> 		.decrypt		= aria_avx512_ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__ctr(aria)",</div><div class='del'>-		.base.cra_driver_name	= "__ctr-aria-avx512",</div><div class='add'>+		.base.cra_name		= "ctr(aria)",</div><div class='add'>+		.base.cra_driver_name	= "ctr-aria-avx512",</div><div class='ctx'> 		.base.cra_priority	= 600,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL |</div><div class='del'>-					  CRYPTO_ALG_SKCIPHER_REQSIZE_LARGE,</div><div class='add'>+		.base.cra_flags		= CRYPTO_ALG_SKCIPHER_REQSIZE_LARGE,</div><div class='ctx'> 		.base.cra_blocksize	= 1,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct aria_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -197,8 +194,6 @@ static struct skcipher_alg aria_algs[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *aria_simd_algs[ARRAY_SIZE(aria_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init aria_avx512_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -229,15 +224,12 @@ static int __init aria_avx512_init(void)</div><div class='ctx'> 	aria_ops.aria_decrypt_64way = aria_gfni_avx512_decrypt_64way;</div><div class='ctx'> 	aria_ops.aria_ctr_crypt_64way = aria_gfni_avx512_ctr_crypt_64way;</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(aria_algs,</div><div class='del'>-					      ARRAY_SIZE(aria_algs),</div><div class='del'>-					      aria_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(aria_algs, ARRAY_SIZE(aria_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit aria_avx512_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs),</div><div class='del'>-				  aria_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(aria_avx512_init);</div><div class='head'>diff --git a/arch/x86/crypto/camellia_aesni_avx2_glue.c b/arch/x86/crypto/camellia_aesni_avx2_glue.c<br/>index e7e4d64e9577..2d2f4e16537c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/camellia_aesni_avx2_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/camellia_aesni_avx2_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/camellia_aesni_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/camellia_aesni_avx2_glue.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -69,10 +68,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg camellia_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(camellia)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-camellia-aesni-avx2",</div><div class='add'>+		.base.cra_name		= "ecb(camellia)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-camellia-aesni-avx2",</div><div class='ctx'> 		.base.cra_priority	= 500,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAMELLIA_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct camellia_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -82,10 +80,9 @@ static struct skcipher_alg camellia_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(camellia)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-camellia-aesni-avx2",</div><div class='add'>+		.base.cra_name		= "cbc(camellia)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-camellia-aesni-avx2",</div><div class='ctx'> 		.base.cra_priority	= 500,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAMELLIA_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct camellia_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -98,8 +95,6 @@ static struct skcipher_alg camellia_algs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *camellia_simd_algs[ARRAY_SIZE(camellia_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init camellia_aesni_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -118,15 +113,13 @@ static int __init camellia_aesni_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(camellia_algs,</div><div class='del'>-					      ARRAY_SIZE(camellia_algs),</div><div class='del'>-					      camellia_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(camellia_algs,</div><div class='add'>+					 ARRAY_SIZE(camellia_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit camellia_aesni_fini(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(camellia_algs, ARRAY_SIZE(camellia_algs),</div><div class='del'>-				  camellia_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(camellia_algs, ARRAY_SIZE(camellia_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(camellia_aesni_init);</div><div class='head'>diff --git a/arch/x86/crypto/camellia_aesni_avx_glue.c b/arch/x86/crypto/camellia_aesni_avx_glue.c<br/>index c7ccf63e741e..a7d162388142 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/camellia_aesni_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/camellia_aesni_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/camellia_aesni_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/camellia_aesni_avx_glue.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -69,10 +68,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg camellia_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(camellia)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-camellia-aesni",</div><div class='add'>+		.base.cra_name		= "ecb(camellia)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-camellia-aesni",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAMELLIA_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct camellia_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -82,10 +80,9 @@ static struct skcipher_alg camellia_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(camellia)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-camellia-aesni",</div><div class='add'>+		.base.cra_name		= "cbc(camellia)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-camellia-aesni",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAMELLIA_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct camellia_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -98,8 +95,6 @@ static struct skcipher_alg camellia_algs[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *camellia_simd_algs[ARRAY_SIZE(camellia_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init camellia_aesni_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -117,15 +112,13 @@ static int __init camellia_aesni_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(camellia_algs,</div><div class='del'>-					      ARRAY_SIZE(camellia_algs),</div><div class='del'>-					      camellia_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(camellia_algs,</div><div class='add'>+					 ARRAY_SIZE(camellia_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit camellia_aesni_fini(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(camellia_algs, ARRAY_SIZE(camellia_algs),</div><div class='del'>-				  camellia_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(camellia_algs, ARRAY_SIZE(camellia_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(camellia_aesni_init);</div><div class='head'>diff --git a/arch/x86/crypto/cast5_avx_glue.c b/arch/x86/crypto/cast5_avx_glue.c<br/>index 3976a87f92ad..3aca04d43b34 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/cast5_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/cast5_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/cast5_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/cast5_avx_glue.c</a></div><div class='hunk'>@@ -8,7 +8,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/cast5.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -64,10 +63,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg cast5_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(cast5)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-cast5-avx",</div><div class='add'>+		.base.cra_name		= "ecb(cast5)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-cast5-avx",</div><div class='ctx'> 		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAST5_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct cast5_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -77,10 +75,9 @@ static struct skcipher_alg cast5_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(cast5)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-cast5-avx",</div><div class='add'>+		.base.cra_name		= "cbc(cast5)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-cast5-avx",</div><div class='ctx'> 		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAST5_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct cast5_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -93,8 +90,6 @@ static struct skcipher_alg cast5_algs[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *cast5_simd_algs[ARRAY_SIZE(cast5_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init cast5_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -105,15 +100,13 @@ static int __init cast5_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(cast5_algs,</div><div class='del'>-					      ARRAY_SIZE(cast5_algs),</div><div class='del'>-					      cast5_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(cast5_algs,</div><div class='add'>+					 ARRAY_SIZE(cast5_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit cast5_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(cast5_algs, ARRAY_SIZE(cast5_algs),</div><div class='del'>-				  cast5_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(cast5_algs, ARRAY_SIZE(cast5_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(cast5_init);</div><div class='head'>diff --git a/arch/x86/crypto/cast6_avx_glue.c b/arch/x86/crypto/cast6_avx_glue.c<br/>index 7e2aea372349..c4dd28c30303 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/cast6_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/cast6_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/cast6_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/cast6_avx_glue.c</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/cast6.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ecb_cbc_helpers.h"</div><div class='ctx'> </div><div class='hunk'>@@ -64,10 +63,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg cast6_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(cast6)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-cast6-avx",</div><div class='add'>+		.base.cra_name		= "ecb(cast6)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-cast6-avx",</div><div class='ctx'> 		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAST6_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct cast6_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -77,10 +75,9 @@ static struct skcipher_alg cast6_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(cast6)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-cast6-avx",</div><div class='add'>+		.base.cra_name		= "cbc(cast6)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-cast6-avx",</div><div class='ctx'> 		.base.cra_priority	= 200,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= CAST6_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct cast6_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -93,8 +90,6 @@ static struct skcipher_alg cast6_algs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *cast6_simd_algs[ARRAY_SIZE(cast6_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init cast6_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -105,15 +100,12 @@ static int __init cast6_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(cast6_algs,</div><div class='del'>-					      ARRAY_SIZE(cast6_algs),</div><div class='del'>-					      cast6_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(cast6_algs, ARRAY_SIZE(cast6_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit cast6_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(cast6_algs, ARRAY_SIZE(cast6_algs),</div><div class='del'>-				  cast6_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(cast6_algs, ARRAY_SIZE(cast6_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(cast6_init);</div><div class='head'>diff --git a/arch/x86/crypto/chacha_glue.c b/arch/x86/crypto/chacha_glue.c<br/>deleted file mode 100644<br/>index 8bb74a272879..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/chacha_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/chacha_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,311 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * x64 SIMD accelerated ChaCha and XChaCha stream ciphers,</div><div class='del'>- * including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_block_xor_ssse3(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       unsigned int len, int nrounds);</div><div class='del'>-asmlinkage void chacha_4block_xor_ssse3(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-					unsigned int len, int nrounds);</div><div class='del'>-asmlinkage void hchacha_block_ssse3(const u32 *state, u32 *out, int nrounds);</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_2block_xor_avx2(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       unsigned int len, int nrounds);</div><div class='del'>-asmlinkage void chacha_4block_xor_avx2(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       unsigned int len, int nrounds);</div><div class='del'>-asmlinkage void chacha_8block_xor_avx2(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-				       unsigned int len, int nrounds);</div><div class='del'>-</div><div class='del'>-asmlinkage void chacha_2block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-					   unsigned int len, int nrounds);</div><div class='del'>-asmlinkage void chacha_4block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-					   unsigned int len, int nrounds);</div><div class='del'>-asmlinkage void chacha_8block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-					   unsigned int len, int nrounds);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_simd);</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx2);</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx512vl);</div><div class='del'>-</div><div class='del'>-static unsigned int chacha_advance(unsigned int len, unsigned int maxblocks)</div><div class='del'>-{</div><div class='del'>-	len = min(len, maxblocks * CHACHA_BLOCK_SIZE);</div><div class='del'>-	return round_up(len, CHACHA_BLOCK_SIZE) / CHACHA_BLOCK_SIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void chacha_dosimd(u32 *state, u8 *dst, const u8 *src,</div><div class='del'>-			  unsigned int bytes, int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (IS_ENABLED(CONFIG_AS_AVX512) &amp;&amp;</div><div class='del'>-	    static_branch_likely(&amp;chacha_use_avx512vl)) {</div><div class='del'>-		while (bytes &gt;= CHACHA_BLOCK_SIZE * 8) {</div><div class='del'>-			chacha_8block_xor_avx512vl(state, dst, src, bytes,</div><div class='del'>-						   nrounds);</div><div class='del'>-			bytes -= CHACHA_BLOCK_SIZE * 8;</div><div class='del'>-			src += CHACHA_BLOCK_SIZE * 8;</div><div class='del'>-			dst += CHACHA_BLOCK_SIZE * 8;</div><div class='del'>-			state[12] += 8;</div><div class='del'>-		}</div><div class='del'>-		if (bytes &gt; CHACHA_BLOCK_SIZE * 4) {</div><div class='del'>-			chacha_8block_xor_avx512vl(state, dst, src, bytes,</div><div class='del'>-						   nrounds);</div><div class='del'>-			state[12] += chacha_advance(bytes, 8);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		if (bytes &gt; CHACHA_BLOCK_SIZE * 2) {</div><div class='del'>-			chacha_4block_xor_avx512vl(state, dst, src, bytes,</div><div class='del'>-						   nrounds);</div><div class='del'>-			state[12] += chacha_advance(bytes, 4);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		if (bytes) {</div><div class='del'>-			chacha_2block_xor_avx512vl(state, dst, src, bytes,</div><div class='del'>-						   nrounds);</div><div class='del'>-			state[12] += chacha_advance(bytes, 2);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (static_branch_likely(&amp;chacha_use_avx2)) {</div><div class='del'>-		while (bytes &gt;= CHACHA_BLOCK_SIZE * 8) {</div><div class='del'>-			chacha_8block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='del'>-			bytes -= CHACHA_BLOCK_SIZE * 8;</div><div class='del'>-			src += CHACHA_BLOCK_SIZE * 8;</div><div class='del'>-			dst += CHACHA_BLOCK_SIZE * 8;</div><div class='del'>-			state[12] += 8;</div><div class='del'>-		}</div><div class='del'>-		if (bytes &gt; CHACHA_BLOCK_SIZE * 4) {</div><div class='del'>-			chacha_8block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='del'>-			state[12] += chacha_advance(bytes, 8);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		if (bytes &gt; CHACHA_BLOCK_SIZE * 2) {</div><div class='del'>-			chacha_4block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='del'>-			state[12] += chacha_advance(bytes, 4);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		if (bytes &gt; CHACHA_BLOCK_SIZE) {</div><div class='del'>-			chacha_2block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='del'>-			state[12] += chacha_advance(bytes, 2);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (bytes &gt;= CHACHA_BLOCK_SIZE * 4) {</div><div class='del'>-		chacha_4block_xor_ssse3(state, dst, src, bytes, nrounds);</div><div class='del'>-		bytes -= CHACHA_BLOCK_SIZE * 4;</div><div class='del'>-		src += CHACHA_BLOCK_SIZE * 4;</div><div class='del'>-		dst += CHACHA_BLOCK_SIZE * 4;</div><div class='del'>-		state[12] += 4;</div><div class='del'>-	}</div><div class='del'>-	if (bytes &gt; CHACHA_BLOCK_SIZE) {</div><div class='del'>-		chacha_4block_xor_ssse3(state, dst, src, bytes, nrounds);</div><div class='del'>-		state[12] += chacha_advance(bytes, 4);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	if (bytes) {</div><div class='del'>-		chacha_block_xor_ssse3(state, dst, src, bytes, nrounds);</div><div class='del'>-		state[12]++;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void hchacha_block_arch(const u32 *state, u32 *stream, int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;chacha_use_simd) || !crypto_simd_usable()) {</div><div class='del'>-		hchacha_block_generic(state, stream, nrounds);</div><div class='del'>-	} else {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		hchacha_block_ssse3(state, stream, nrounds);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hchacha_block_arch);</div><div class='del'>-</div><div class='del'>-void chacha_crypt_arch(u32 *state, u8 *dst, const u8 *src, unsigned int bytes,</div><div class='del'>-		       int nrounds)</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;chacha_use_simd) || !crypto_simd_usable() ||</div><div class='del'>-	    bytes &lt;= CHACHA_BLOCK_SIZE)</div><div class='del'>-		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='del'>-</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		chacha_dosimd(state, dst, src, todo, nrounds);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-		bytes -= todo;</div><div class='del'>-		src += todo;</div><div class='del'>-		dst += todo;</div><div class='del'>-	} while (bytes);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='del'>-</div><div class='del'>-static int chacha_simd_stream_xor(struct skcipher_request *req,</div><div class='del'>-				  const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	u32 state[CHACHA_STATE_WORDS] __aligned(8);</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = round_down(nbytes, walk.stride);</div><div class='del'>-</div><div class='del'>-		if (!static_branch_likely(&amp;chacha_use_simd) ||</div><div class='del'>-		    !crypto_simd_usable()) {</div><div class='del'>-			chacha_crypt_generic(state, walk.dst.virt.addr,</div><div class='del'>-					     walk.src.virt.addr, nbytes,</div><div class='del'>-					     ctx-&gt;nrounds);</div><div class='del'>-		} else {</div><div class='del'>-			kernel_fpu_begin();</div><div class='del'>-			chacha_dosimd(state, walk.dst.virt.addr,</div><div class='del'>-				      walk.src.virt.addr, nbytes,</div><div class='del'>-				      ctx-&gt;nrounds);</div><div class='del'>-			kernel_fpu_end();</div><div class='del'>-		}</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int chacha_simd(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_simd_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xchacha_simd(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	u32 state[CHACHA_STATE_WORDS] __aligned(8);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-</div><div class='del'>-	if (req-&gt;cryptlen &gt; CHACHA_BLOCK_SIZE &amp;&amp; crypto_simd_usable()) {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		hchacha_block_ssse3(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	} else {</div><div class='del'>-		hchacha_block_generic(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	}</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8);</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8);</div><div class='del'>-	return chacha_simd_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-simd",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= chacha_simd,</div><div class='del'>-		.decrypt		= chacha_simd,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-simd",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= xchacha_simd,</div><div class='del'>-		.decrypt		= xchacha_simd,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-simd",</div><div class='del'>-		.base.cra_priority	= 300,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= xchacha_simd,</div><div class='del'>-		.decrypt		= xchacha_simd,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!boot_cpu_has(X86_FEATURE_SSSE3))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	static_branch_enable(&amp;chacha_use_simd);</div><div class='del'>-</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp;</div><div class='del'>-	    boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='del'>-	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {</div><div class='del'>-		static_branch_enable(&amp;chacha_use_avx2);</div><div class='del'>-</div><div class='del'>-		if (IS_ENABLED(CONFIG_AS_AVX512) &amp;&amp;</div><div class='del'>-		    boot_cpu_has(X86_FEATURE_AVX512VL) &amp;&amp;</div><div class='del'>-		    boot_cpu_has(X86_FEATURE_AVX512BW)) /* kmovq */</div><div class='del'>-			static_branch_enable(&amp;chacha_use_avx512vl);</div><div class='del'>-	}</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) ?</div><div class='del'>-		crypto_register_skciphers(algs, ARRAY_SIZE(algs)) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_simd_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_SKCIPHER) &amp;&amp; boot_cpu_has(X86_FEATURE_SSSE3))</div><div class='del'>-		crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(chacha_simd_mod_init);</div><div class='del'>-module_exit(chacha_simd_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (x64 SIMD accelerated)");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-simd");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-simd");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-simd");</div><div class='head'>diff --git a/arch/x86/crypto/ghash-clmulni-intel_asm.S b/arch/x86/crypto/ghash-clmulni-intel_asm.S<br/>index 99cb983ded9e..c4fbaa82ed7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/ghash-clmulni-intel_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/ghash-clmulni-intel_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/ghash-clmulni-intel_asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/ghash-clmulni-intel_asm.S</a></div><div class='hunk'>@@ -103,8 +103,8 @@ SYM_FUNC_START(clmul_ghash_mul)</div><div class='ctx'> SYM_FUNC_END(clmul_ghash_mul)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,</div><div class='del'>- *			   const le128 *shash);</div><div class='add'>+ * int clmul_ghash_update(char *dst, const char *src, unsigned int srclen,</div><div class='add'>+ *			  const le128 *shash);</div><div class='ctx'>  */</div><div class='ctx'> SYM_FUNC_START(clmul_ghash_update)</div><div class='ctx'> 	FRAME_BEGIN</div><div class='hunk'>@@ -127,6 +127,7 @@ SYM_FUNC_START(clmul_ghash_update)</div><div class='ctx'> 	pshufb BSWAP, DATA</div><div class='ctx'> 	movups DATA, (%rdi)</div><div class='ctx'> .Lupdate_just_ret:</div><div class='add'>+	mov %rdx, %rax</div><div class='ctx'> 	FRAME_END</div><div class='ctx'> 	RET</div><div class='ctx'> SYM_FUNC_END(clmul_ghash_update)</div><div class='head'>diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c<br/>index c759ec808bf1..aea5d4d06be7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/ghash-clmulni-intel_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/ghash-clmulni-intel_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/ghash-clmulni-intel_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/ghash-clmulni-intel_glue.c</a></div><div class='hunk'>@@ -7,41 +7,27 @@</div><div class='ctx'>  *   Author: Huang Ying &lt;ying.huang@intel.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/cryptd.h&gt;</div><div class='del'>-#include &lt;crypto/gf128mul.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;crypto/b128ops.h&gt;</div><div class='add'>+#include &lt;crypto/ghash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='del'>-#define GHASH_BLOCK_SIZE	16</div><div class='del'>-#define GHASH_DIGEST_SIZE	16</div><div class='add'>+asmlinkage void clmul_ghash_mul(char *dst, const le128 *shash);</div><div class='ctx'> </div><div class='del'>-void clmul_ghash_mul(char *dst, const le128 *shash);</div><div class='add'>+asmlinkage int clmul_ghash_update(char *dst, const char *src,</div><div class='add'>+				  unsigned int srclen, const le128 *shash);</div><div class='ctx'> </div><div class='del'>-void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,</div><div class='del'>-			const le128 *shash);</div><div class='del'>-</div><div class='del'>-struct ghash_async_ctx {</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ghash_ctx {</div><div class='add'>+struct x86_ghash_ctx {</div><div class='ctx'> 	le128 shash;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ghash_desc_ctx {</div><div class='del'>-	u8 buffer[GHASH_BLOCK_SIZE];</div><div class='del'>-	u32 bytes;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='hunk'>@@ -54,7 +40,7 @@ static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> static int ghash_setkey(struct crypto_shash *tfm,</div><div class='ctx'> 			const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='del'>-	struct ghash_ctx *ctx = crypto_shash_ctx(tfm);</div><div class='add'>+	struct x86_ghash_ctx *ctx = crypto_shash_ctx(tfm);</div><div class='ctx'> 	u64 a, b;</div><div class='ctx'> </div><div class='ctx'> 	if (keylen != GHASH_BLOCK_SIZE)</div><div class='hunk'>@@ -95,64 +81,38 @@ static int ghash_setkey(struct crypto_shash *tfm,</div><div class='ctx'> static int ghash_update(struct shash_desc *desc,</div><div class='ctx'> 			 const u8 *src, unsigned int srclen)</div><div class='ctx'> {</div><div class='add'>+	struct x86_ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	u8 *dst = dctx-&gt;buffer;</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	kernel_fpu_begin();</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		int n = min(srclen, dctx-&gt;bytes);</div><div class='del'>-		u8 *pos = dst + (GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='del'>-</div><div class='del'>-		dctx-&gt;bytes -= n;</div><div class='del'>-		srclen -= n;</div><div class='del'>-</div><div class='del'>-		while (n--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='del'>-</div><div class='del'>-		if (!dctx-&gt;bytes)</div><div class='del'>-			clmul_ghash_mul(dst, &amp;ctx-&gt;shash);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	clmul_ghash_update(dst, src, srclen, &amp;ctx-&gt;shash);</div><div class='add'>+	remain = clmul_ghash_update(dst, src, srclen, &amp;ctx-&gt;shash);</div><div class='ctx'> 	kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-	if (srclen &amp; 0xf) {</div><div class='del'>-		src += srclen - (srclen &amp; 0xf);</div><div class='del'>-		srclen &amp;= 0xf;</div><div class='del'>-		dctx-&gt;bytes = GHASH_BLOCK_SIZE - srclen;</div><div class='del'>-		while (srclen--)</div><div class='del'>-			*dst++ ^= *src++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ghash_flush(struct ghash_ctx *ctx, struct ghash_desc_ctx *dctx)</div><div class='add'>+static void ghash_flush(struct x86_ghash_ctx *ctx, struct ghash_desc_ctx *dctx,</div><div class='add'>+			const u8 *src, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *dst = dctx-&gt;buffer;</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		u8 *tmp = dst + (GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='del'>-</div><div class='del'>-		while (dctx-&gt;bytes--)</div><div class='del'>-			*tmp++ ^= 0;</div><div class='del'>-</div><div class='del'>-		kernel_fpu_begin();</div><div class='add'>+	kernel_fpu_begin();</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(dst, src, len);</div><div class='ctx'> 		clmul_ghash_mul(dst, &amp;ctx-&gt;shash);</div><div class='del'>-		kernel_fpu_end();</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	dctx-&gt;bytes = 0;</div><div class='add'>+	kernel_fpu_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+		       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='add'>+	struct x86_ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	u8 *buf = dctx-&gt;buffer;</div><div class='ctx'> </div><div class='del'>-	ghash_flush(ctx, dctx);</div><div class='add'>+	ghash_flush(ctx, dctx, src, len);</div><div class='ctx'> 	memcpy(dst, buf, GHASH_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -162,186 +122,20 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.digestsize	= GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init		= ghash_init,</div><div class='ctx'> 	.update		= ghash_update,</div><div class='del'>-	.final		= ghash_final,</div><div class='add'>+	.finup		= ghash_finup,</div><div class='ctx'> 	.setkey		= ghash_setkey,</div><div class='ctx'> 	.descsize	= sizeof(struct ghash_desc_ctx),</div><div class='ctx'> 	.base		= {</div><div class='del'>-		.cra_name		= "__ghash",</div><div class='del'>-		.cra_driver_name	= "__ghash-pclmulqdqni",</div><div class='del'>-		.cra_priority		= 0,</div><div class='del'>-		.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='add'>+		.cra_name		= "ghash",</div><div class='add'>+		.cra_driver_name	= "ghash-pclmulqdqni",</div><div class='add'>+		.cra_priority		= 400,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= GHASH_BLOCK_SIZE,</div><div class='del'>-		.cra_ctxsize		= sizeof(struct ghash_ctx),</div><div class='add'>+		.cra_ctxsize		= sizeof(struct x86_ghash_ctx),</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int ghash_async_init(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-	struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-	struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);</div><div class='del'>-</div><div class='del'>-	desc-&gt;tfm = child;</div><div class='del'>-	return crypto_shash_init(desc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ghash_init_cryptd_req(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	ahash_request_set_tfm(cryptd_req, &amp;cryptd_tfm-&gt;base);</div><div class='del'>-	ahash_request_set_callback(cryptd_req, req-&gt;base.flags,</div><div class='del'>-				   req-&gt;base.complete, req-&gt;base.data);</div><div class='del'>-	ahash_request_set_crypt(cryptd_req, req-&gt;src, req-&gt;result,</div><div class='del'>-				req-&gt;nbytes);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_update(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (in_atomic() &amp;&amp; cryptd_ahash_queued(cryptd_tfm))) {</div><div class='del'>-		ghash_init_cryptd_req(req);</div><div class='del'>-		return crypto_ahash_update(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-		return shash_ahash_update(req, desc);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_final(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (in_atomic() &amp;&amp; cryptd_ahash_queued(cryptd_tfm))) {</div><div class='del'>-		ghash_init_cryptd_req(req);</div><div class='del'>-		return crypto_ahash_final(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-		return crypto_shash_final(desc, req-&gt;result);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_import(struct ahash_request *req, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	ghash_async_init(req);</div><div class='del'>-	memcpy(dctx, in, sizeof(*dctx));</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_export(struct ahash_request *req, void *out)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, dctx, sizeof(*dctx));</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_digest(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct ahash_request *cryptd_req = ahash_request_ctx(req);</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm = ctx-&gt;cryptd_tfm;</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (in_atomic() &amp;&amp; cryptd_ahash_queued(cryptd_tfm))) {</div><div class='del'>-		ghash_init_cryptd_req(req);</div><div class='del'>-		return crypto_ahash_digest(cryptd_req);</div><div class='del'>-	} else {</div><div class='del'>-		struct shash_desc *desc = cryptd_shash_desc(cryptd_req);</div><div class='del'>-		struct crypto_shash *child = cryptd_ahash_child(cryptd_tfm);</div><div class='del'>-</div><div class='del'>-		desc-&gt;tfm = child;</div><div class='del'>-		return shash_ahash_digest(req, desc);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_setkey(struct crypto_ahash *tfm, const u8 *key,</div><div class='del'>-			      unsigned int keylen)</div><div class='del'>-{</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='del'>-	struct crypto_ahash *child = &amp;ctx-&gt;cryptd_tfm-&gt;base;</div><div class='del'>-</div><div class='del'>-	crypto_ahash_clear_flags(child, CRYPTO_TFM_REQ_MASK);</div><div class='del'>-	crypto_ahash_set_flags(child, crypto_ahash_get_flags(tfm)</div><div class='del'>-			       &amp; CRYPTO_TFM_REQ_MASK);</div><div class='del'>-	return crypto_ahash_setkey(child, key, keylen);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ghash_async_init_tfm(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct cryptd_ahash *cryptd_tfm;</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	cryptd_tfm = cryptd_alloc_ahash("__ghash-pclmulqdqni",</div><div class='del'>-					CRYPTO_ALG_INTERNAL,</div><div class='del'>-					CRYPTO_ALG_INTERNAL);</div><div class='del'>-	if (IS_ERR(cryptd_tfm))</div><div class='del'>-		return PTR_ERR(cryptd_tfm);</div><div class='del'>-	ctx-&gt;cryptd_tfm = cryptd_tfm;</div><div class='del'>-	crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),</div><div class='del'>-				 sizeof(struct ahash_request) +</div><div class='del'>-				 crypto_ahash_reqsize(&amp;cryptd_tfm-&gt;base));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ghash_async_exit_tfm(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	struct ghash_async_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	cryptd_free_ahash(ctx-&gt;cryptd_tfm);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct ahash_alg ghash_async_alg = {</div><div class='del'>-	.init		= ghash_async_init,</div><div class='del'>-	.update		= ghash_async_update,</div><div class='del'>-	.final		= ghash_async_final,</div><div class='del'>-	.setkey		= ghash_async_setkey,</div><div class='del'>-	.digest		= ghash_async_digest,</div><div class='del'>-	.export		= ghash_async_export,</div><div class='del'>-	.import		= ghash_async_import,</div><div class='del'>-	.halg = {</div><div class='del'>-		.digestsize	= GHASH_DIGEST_SIZE,</div><div class='del'>-		.statesize = sizeof(struct ghash_desc_ctx),</div><div class='del'>-		.base = {</div><div class='del'>-			.cra_name		= "ghash",</div><div class='del'>-			.cra_driver_name	= "ghash-clmulni",</div><div class='del'>-			.cra_priority		= 400,</div><div class='del'>-			.cra_ctxsize		= sizeof(struct ghash_async_ctx),</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_ASYNC,</div><div class='del'>-			.cra_blocksize		= GHASH_BLOCK_SIZE,</div><div class='del'>-			.cra_module		= THIS_MODULE,</div><div class='del'>-			.cra_init		= ghash_async_init_tfm,</div><div class='del'>-			.cra_exit		= ghash_async_exit_tfm,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct x86_cpu_id pcmul_cpu_id[] = {</div><div class='ctx'> 	X86_MATCH_FEATURE(X86_FEATURE_PCLMULQDQ, NULL), /* Pickle-Mickle-Duck */</div><div class='ctx'> 	{}</div><div class='hunk'>@@ -350,29 +144,14 @@ MODULE_DEVICE_TABLE(x86cpu, pcmul_cpu_id);</div><div class='ctx'> </div><div class='ctx'> static int __init ghash_pclmulqdqni_mod_init(void)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='ctx'> 	if (!x86_match_cpu(pcmul_cpu_id))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	err = crypto_register_shash(&amp;ghash_alg);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_out;</div><div class='del'>-	err = crypto_register_ahash(&amp;ghash_async_alg);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_shash;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_shash:</div><div class='del'>-	crypto_unregister_shash(&amp;ghash_alg);</div><div class='del'>-err_out:</div><div class='del'>-	return err;</div><div class='add'>+	return crypto_register_shash(&amp;ghash_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit ghash_pclmulqdqni_mod_exit(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_ahash(&amp;ghash_async_alg);</div><div class='ctx'> 	crypto_unregister_shash(&amp;ghash_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/poly1305_glue.c b/arch/x86/crypto/poly1305_glue.c<br/>deleted file mode 100644<br/>index 08ff4b489f7e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/poly1305_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/poly1305_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,290 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2015-2019 Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;. All Rights Reserved.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-#include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void poly1305_init_x86_64(void *ctx,</div><div class='del'>-				     const u8 key[POLY1305_BLOCK_SIZE]);</div><div class='del'>-asmlinkage void poly1305_blocks_x86_64(void *ctx, const u8 *inp,</div><div class='del'>-				       const size_t len, const u32 padbit);</div><div class='del'>-asmlinkage void poly1305_emit_x86_64(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],</div><div class='del'>-				     const u32 nonce[4]);</div><div class='del'>-asmlinkage void poly1305_emit_avx(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],</div><div class='del'>-				  const u32 nonce[4]);</div><div class='del'>-asmlinkage void poly1305_blocks_avx(void *ctx, const u8 *inp, const size_t len,</div><div class='del'>-				    const u32 padbit);</div><div class='del'>-asmlinkage void poly1305_blocks_avx2(void *ctx, const u8 *inp, const size_t len,</div><div class='del'>-				     const u32 padbit);</div><div class='del'>-asmlinkage void poly1305_blocks_avx512(void *ctx, const u8 *inp,</div><div class='del'>-				       const size_t len, const u32 padbit);</div><div class='del'>-</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx);</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx2);</div><div class='del'>-static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx512);</div><div class='del'>-</div><div class='del'>-struct poly1305_arch_internal {</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u32 h[5];</div><div class='del'>-			u32 is_base2_26;</div><div class='del'>-		};</div><div class='del'>-		u64 hs[3];</div><div class='del'>-	};</div><div class='del'>-	u64 r[2];</div><div class='del'>-	u64 pad;</div><div class='del'>-	struct { u32 r2, r1, r4, r3; } rn[9];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* The AVX code uses base 2^26, while the scalar code uses base 2^64. If we hit</div><div class='del'>- * the unfortunate situation of using AVX and then having to go back to scalar</div><div class='del'>- * -- because the user is silly and has called the update function from two</div><div class='del'>- * separate contexts -- then we need to convert back to the original base before</div><div class='del'>- * proceeding. It is possible to reason that the initial reduction below is</div><div class='del'>- * sufficient given the implementation invariants. However, for an avoidance of</div><div class='del'>- * doubt and because this is not performance critical, we do the full reduction</div><div class='del'>- * anyway. Z3 proof of below function: https://xn--4db.cc/ltPtHCKN/py</div><div class='del'>- */</div><div class='del'>-static void convert_to_base2_64(void *ctx)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_arch_internal *state = ctx;</div><div class='del'>-	u32 cy;</div><div class='del'>-</div><div class='del'>-	if (!state-&gt;is_base2_26)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	cy = state-&gt;h[0] &gt;&gt; 26; state-&gt;h[0] &amp;= 0x3ffffff; state-&gt;h[1] += cy;</div><div class='del'>-	cy = state-&gt;h[1] &gt;&gt; 26; state-&gt;h[1] &amp;= 0x3ffffff; state-&gt;h[2] += cy;</div><div class='del'>-	cy = state-&gt;h[2] &gt;&gt; 26; state-&gt;h[2] &amp;= 0x3ffffff; state-&gt;h[3] += cy;</div><div class='del'>-	cy = state-&gt;h[3] &gt;&gt; 26; state-&gt;h[3] &amp;= 0x3ffffff; state-&gt;h[4] += cy;</div><div class='del'>-	state-&gt;hs[0] = ((u64)state-&gt;h[2] &lt;&lt; 52) | ((u64)state-&gt;h[1] &lt;&lt; 26) | state-&gt;h[0];</div><div class='del'>-	state-&gt;hs[1] = ((u64)state-&gt;h[4] &lt;&lt; 40) | ((u64)state-&gt;h[3] &lt;&lt; 14) | (state-&gt;h[2] &gt;&gt; 12);</div><div class='del'>-	state-&gt;hs[2] = state-&gt;h[4] &gt;&gt; 24;</div><div class='del'>-#define ULT(a, b) ((a ^ ((a ^ b) | ((a - b) ^ b))) &gt;&gt; (sizeof(a) * 8 - 1))</div><div class='del'>-	cy = (state-&gt;hs[2] &gt;&gt; 2) + (state-&gt;hs[2] &amp; ~3ULL);</div><div class='del'>-	state-&gt;hs[2] &amp;= 3;</div><div class='del'>-	state-&gt;hs[0] += cy;</div><div class='del'>-	state-&gt;hs[1] += (cy = ULT(state-&gt;hs[0], cy));</div><div class='del'>-	state-&gt;hs[2] += ULT(state-&gt;hs[1], cy);</div><div class='del'>-#undef ULT</div><div class='del'>-	state-&gt;is_base2_26 = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_BLOCK_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_init_x86_64(ctx, key);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly1305_simd_blocks(void *ctx, const u8 *inp, size_t len,</div><div class='del'>-				 const u32 padbit)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_arch_internal *state = ctx;</div><div class='del'>-</div><div class='del'>-	/* SIMD disables preemption, so relax after processing each page. */</div><div class='del'>-	BUILD_BUG_ON(SZ_4K &lt; POLY1305_BLOCK_SIZE ||</div><div class='del'>-		     SZ_4K % POLY1305_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-	if (!static_branch_likely(&amp;poly1305_use_avx) ||</div><div class='del'>-	    (len &lt; (POLY1305_BLOCK_SIZE * 18) &amp;&amp; !state-&gt;is_base2_26) ||</div><div class='del'>-	    !crypto_simd_usable()) {</div><div class='del'>-		convert_to_base2_64(ctx);</div><div class='del'>-		poly1305_blocks_x86_64(ctx, inp, len, padbit);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		const size_t bytes = min_t(size_t, len, SZ_4K);</div><div class='del'>-</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		if (IS_ENABLED(CONFIG_AS_AVX512) &amp;&amp; static_branch_likely(&amp;poly1305_use_avx512))</div><div class='del'>-			poly1305_blocks_avx512(ctx, inp, bytes, padbit);</div><div class='del'>-		else if (static_branch_likely(&amp;poly1305_use_avx2))</div><div class='del'>-			poly1305_blocks_avx2(ctx, inp, bytes, padbit);</div><div class='del'>-		else</div><div class='del'>-			poly1305_blocks_avx(ctx, inp, bytes, padbit);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-		len -= bytes;</div><div class='del'>-		inp += bytes;</div><div class='del'>-	} while (len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],</div><div class='del'>-			       const u32 nonce[4])</div><div class='del'>-{</div><div class='del'>-	if (!static_branch_likely(&amp;poly1305_use_avx))</div><div class='del'>-		poly1305_emit_x86_64(ctx, mac, nonce);</div><div class='del'>-	else</div><div class='del'>-		poly1305_emit_avx(ctx, mac, nonce);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])</div><div class='del'>-{</div><div class='del'>-	poly1305_simd_init(&amp;dctx-&gt;h, key);</div><div class='del'>-	dctx-&gt;s[0] = get_unaligned_le32(&amp;key[16]);</div><div class='del'>-	dctx-&gt;s[1] = get_unaligned_le32(&amp;key[20]);</div><div class='del'>-	dctx-&gt;s[2] = get_unaligned_le32(&amp;key[24]);</div><div class='del'>-	dctx-&gt;s[3] = get_unaligned_le32(&amp;key[28]);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;sset = true;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_init_arch);</div><div class='del'>-</div><div class='del'>-static unsigned int crypto_poly1305_setdctxkey(struct poly1305_desc_ctx *dctx,</div><div class='del'>-					       const u8 *inp, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	unsigned int acc = 0;</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		if (!dctx-&gt;rset &amp;&amp; len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_simd_init(&amp;dctx-&gt;h, inp);</div><div class='del'>-			inp += POLY1305_BLOCK_SIZE;</div><div class='del'>-			len -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			acc += POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 1;</div><div class='del'>-		}</div><div class='del'>-		if (len &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(&amp;inp[0]);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(&amp;inp[4]);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(&amp;inp[8]);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(&amp;inp[12]);</div><div class='del'>-			acc += POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return acc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void poly1305_update_arch(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			  unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	unsigned int bytes, used;</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		srclen -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			if (likely(!crypto_poly1305_setdctxkey(dctx, dctx-&gt;buf, POLY1305_BLOCK_SIZE)))</div><div class='del'>-				poly1305_simd_blocks(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(srclen &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		bytes = round_down(srclen, POLY1305_BLOCK_SIZE);</div><div class='del'>-		srclen -= bytes;</div><div class='del'>-		used = crypto_poly1305_setdctxkey(dctx, src, bytes);</div><div class='del'>-		if (likely(bytes - used))</div><div class='del'>-			poly1305_simd_blocks(&amp;dctx-&gt;h, src + used, bytes - used, 1);</div><div class='del'>-		src += bytes;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(srclen)) {</div><div class='del'>-		dctx-&gt;buflen = srclen;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, srclen);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_update_arch);</div><div class='del'>-</div><div class='del'>-void poly1305_final_arch(struct poly1305_desc_ctx *dctx, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		dctx-&gt;buf[dctx-&gt;buflen++] = 1;</div><div class='del'>-		memset(dctx-&gt;buf + dctx-&gt;buflen, 0,</div><div class='del'>-		       POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		poly1305_simd_blocks(&amp;dctx-&gt;h, dctx-&gt;buf, POLY1305_BLOCK_SIZE, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_simd_emit(&amp;dctx-&gt;h, dst, dctx-&gt;s);</div><div class='del'>-	memzero_explicit(dctx, sizeof(*dctx));</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(poly1305_final_arch);</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*dctx = (struct poly1305_desc_ctx){};</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_update(struct shash_desc *desc,</div><div class='del'>-				  const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	poly1305_update_arch(dctx, src, srclen);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_arch(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg alg = {</div><div class='del'>-	.digestsize	= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.init		= crypto_poly1305_init,</div><div class='del'>-	.update		= crypto_poly1305_update,</div><div class='del'>-	.final		= crypto_poly1305_final,</div><div class='del'>-	.descsize	= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-	.base		= {</div><div class='del'>-		.cra_name		= "poly1305",</div><div class='del'>-		.cra_driver_name	= "poly1305-simd",</div><div class='del'>-		.cra_priority		= 300,</div><div class='del'>-		.cra_blocksize		= POLY1305_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init poly1305_simd_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp;</div><div class='del'>-	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))</div><div class='del'>-		static_branch_enable(&amp;poly1305_use_avx);</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp; boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='del'>-	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))</div><div class='del'>-		static_branch_enable(&amp;poly1305_use_avx2);</div><div class='del'>-	if (IS_ENABLED(CONFIG_AS_AVX512) &amp;&amp; boot_cpu_has(X86_FEATURE_AVX) &amp;&amp;</div><div class='del'>-	    boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp; boot_cpu_has(X86_FEATURE_AVX512F) &amp;&amp;</div><div class='del'>-	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM | XFEATURE_MASK_AVX512, NULL) &amp;&amp;</div><div class='del'>-	    /* Skylake downclocks unacceptably much when using zmm, but later generations are fast. */</div><div class='del'>-	    boot_cpu_data.x86_vfm != INTEL_SKYLAKE_X)</div><div class='del'>-		static_branch_enable(&amp;poly1305_use_avx512);</div><div class='del'>-	return IS_REACHABLE(CONFIG_CRYPTO_HASH) ? crypto_register_shash(&amp;alg) : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit poly1305_simd_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	if (IS_REACHABLE(CONFIG_CRYPTO_HASH))</div><div class='del'>-		crypto_unregister_shash(&amp;alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(poly1305_simd_mod_init);</div><div class='del'>-module_exit(poly1305_simd_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Poly1305 authenticator");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-simd");</div><div class='head'>diff --git a/arch/x86/crypto/polyval-clmulni_glue.c b/arch/x86/crypto/polyval-clmulni_glue.c<br/>index 8fa58b0f3cb3..6b466867f91a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/polyval-clmulni_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/polyval-clmulni_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/polyval-clmulni_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/polyval-clmulni_glue.c</a></div><div class='hunk'>@@ -16,16 +16,15 @@</div><div class='ctx'>  * operations.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/polyval.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define POLYVAL_ALIGN	16</div><div class='ctx'> #define POLYVAL_ALIGN_ATTR __aligned(POLYVAL_ALIGN)</div><div class='hunk'>@@ -42,7 +41,6 @@ struct polyval_tfm_ctx {</div><div class='ctx'> </div><div class='ctx'> struct polyval_desc_ctx {</div><div class='ctx'> 	u8 buffer[POLYVAL_BLOCK_SIZE];</div><div class='del'>-	u32 bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> asmlinkage void clmul_polyval_update(const struct polyval_tfm_ctx *keys,</div><div class='hunk'>@@ -57,25 +55,16 @@ static inline struct polyval_tfm_ctx *polyval_tfm_ctx(struct crypto_shash *tfm)</div><div class='ctx'> static void internal_polyval_update(const struct polyval_tfm_ctx *keys,</div><div class='ctx'> 	const u8 *in, size_t nblocks, u8 *accumulator)</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		clmul_polyval_update(keys, in, nblocks, accumulator);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	} else {</div><div class='del'>-		polyval_update_non4k(keys-&gt;key_powers[NUM_KEY_POWERS-1], in,</div><div class='del'>-			nblocks, accumulator);</div><div class='del'>-	}</div><div class='add'>+	kernel_fpu_begin();</div><div class='add'>+	clmul_polyval_update(keys, in, nblocks, accumulator);</div><div class='add'>+	kernel_fpu_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void internal_polyval_mul(u8 *op1, const u8 *op2)</div><div class='ctx'> {</div><div class='del'>-	if (likely(crypto_simd_usable())) {</div><div class='del'>-		kernel_fpu_begin();</div><div class='del'>-		clmul_polyval_mul(op1, op2);</div><div class='del'>-		kernel_fpu_end();</div><div class='del'>-	} else {</div><div class='del'>-		polyval_mul_non4k(op1, op2);</div><div class='del'>-	}</div><div class='add'>+	kernel_fpu_begin();</div><div class='add'>+	clmul_polyval_mul(op1, op2);</div><div class='add'>+	kernel_fpu_end();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int polyval_x86_setkey(struct crypto_shash *tfm,</div><div class='hunk'>@@ -112,49 +101,27 @@ static int polyval_x86_update(struct shash_desc *desc,</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct polyval_tfm_ctx *tctx = polyval_tfm_ctx(desc-&gt;tfm);</div><div class='del'>-	u8 *pos;</div><div class='ctx'> 	unsigned int nblocks;</div><div class='del'>-	unsigned int n;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		n = min(srclen, dctx-&gt;bytes);</div><div class='del'>-		pos = dctx-&gt;buffer + POLYVAL_BLOCK_SIZE - dctx-&gt;bytes;</div><div class='del'>-</div><div class='del'>-		dctx-&gt;bytes -= n;</div><div class='del'>-		srclen -= n;</div><div class='del'>-</div><div class='del'>-		while (n--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='ctx'> </div><div class='del'>-		if (!dctx-&gt;bytes)</div><div class='del'>-			internal_polyval_mul(dctx-&gt;buffer,</div><div class='del'>-					    tctx-&gt;key_powers[NUM_KEY_POWERS-1]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (srclen &gt;= POLYVAL_BLOCK_SIZE) {</div><div class='add'>+	do {</div><div class='ctx'> 		/* Allow rescheduling every 4K bytes. */</div><div class='ctx'> 		nblocks = min(srclen, 4096U) / POLYVAL_BLOCK_SIZE;</div><div class='ctx'> 		internal_polyval_update(tctx, src, nblocks, dctx-&gt;buffer);</div><div class='ctx'> 		srclen -= nblocks * POLYVAL_BLOCK_SIZE;</div><div class='ctx'> 		src += nblocks * POLYVAL_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='add'>+	} while (srclen &gt;= POLYVAL_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	if (srclen) {</div><div class='del'>-		dctx-&gt;bytes = POLYVAL_BLOCK_SIZE - srclen;</div><div class='del'>-		pos = dctx-&gt;buffer;</div><div class='del'>-		while (srclen--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return srclen;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int polyval_x86_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int polyval_x86_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			     unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct polyval_tfm_ctx *tctx = polyval_tfm_ctx(desc-&gt;tfm);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(dctx-&gt;buffer, src, len);</div><div class='ctx'> 		internal_polyval_mul(dctx-&gt;buffer,</div><div class='ctx'> 				     tctx-&gt;key_powers[NUM_KEY_POWERS-1]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -168,13 +135,14 @@ static struct shash_alg polyval_alg = {</div><div class='ctx'> 	.digestsize	= POLYVAL_DIGEST_SIZE,</div><div class='ctx'> 	.init		= polyval_x86_init,</div><div class='ctx'> 	.update		= polyval_x86_update,</div><div class='del'>-	.final		= polyval_x86_final,</div><div class='add'>+	.finup		= polyval_x86_finup,</div><div class='ctx'> 	.setkey		= polyval_x86_setkey,</div><div class='ctx'> 	.descsize	= sizeof(struct polyval_desc_ctx),</div><div class='ctx'> 	.base		= {</div><div class='ctx'> 		.cra_name		= "polyval",</div><div class='ctx'> 		.cra_driver_name	= "polyval-clmulni",</div><div class='ctx'> 		.cra_priority		= 200,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= POLYVAL_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		= POLYVAL_CTX_SIZE,</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='head'>diff --git a/arch/x86/crypto/serpent_avx2_glue.c b/arch/x86/crypto/serpent_avx2_glue.c<br/>index 347e97f4b713..f5f2121b7956 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/serpent_avx2_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/serpent_avx2_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/serpent_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/serpent_avx2_glue.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/serpent.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "serpent-avx.h"</div><div class='hunk'>@@ -65,10 +64,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(serpent)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-serpent-avx2",</div><div class='add'>+		.base.cra_name		= "ecb(serpent)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-serpent-avx2",</div><div class='ctx'> 		.base.cra_priority	= 600,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= SERPENT_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct serpent_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -78,10 +76,9 @@ static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(serpent)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-serpent-avx2",</div><div class='add'>+		.base.cra_name		= "cbc(serpent)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-serpent-avx2",</div><div class='ctx'> 		.base.cra_priority	= 600,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= SERPENT_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct serpent_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -94,8 +91,6 @@ static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *serpent_simd_algs[ARRAY_SIZE(serpent_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init serpent_avx2_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -110,15 +105,13 @@ static int __init serpent_avx2_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(serpent_algs,</div><div class='del'>-					      ARRAY_SIZE(serpent_algs),</div><div class='del'>-					      serpent_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(serpent_algs,</div><div class='add'>+					 ARRAY_SIZE(serpent_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit serpent_avx2_fini(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(serpent_algs, ARRAY_SIZE(serpent_algs),</div><div class='del'>-				  serpent_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(serpent_algs, ARRAY_SIZE(serpent_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(serpent_avx2_init);</div><div class='head'>diff --git a/arch/x86/crypto/serpent_avx_glue.c b/arch/x86/crypto/serpent_avx_glue.c<br/>index 6c248e1ea4ef..e640abc1cb8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/serpent_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/serpent_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/serpent_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/serpent_avx_glue.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/serpent.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "serpent-avx.h"</div><div class='hunk'>@@ -71,10 +70,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(serpent)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-serpent-avx",</div><div class='add'>+		.base.cra_name		= "ecb(serpent)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-serpent-avx",</div><div class='ctx'> 		.base.cra_priority	= 500,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= SERPENT_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct serpent_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -84,10 +82,9 @@ static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(serpent)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-serpent-avx",</div><div class='add'>+		.base.cra_name		= "cbc(serpent)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-serpent-avx",</div><div class='ctx'> 		.base.cra_priority	= 500,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= SERPENT_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct serpent_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -100,8 +97,6 @@ static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *serpent_simd_algs[ARRAY_SIZE(serpent_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init serpent_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -112,15 +107,13 @@ static int __init serpent_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(serpent_algs,</div><div class='del'>-					      ARRAY_SIZE(serpent_algs),</div><div class='del'>-					      serpent_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(serpent_algs,</div><div class='add'>+					 ARRAY_SIZE(serpent_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit serpent_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(serpent_algs, ARRAY_SIZE(serpent_algs),</div><div class='del'>-				  serpent_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(serpent_algs, ARRAY_SIZE(serpent_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(serpent_init);</div><div class='head'>diff --git a/arch/x86/crypto/serpent_sse2_glue.c b/arch/x86/crypto/serpent_sse2_glue.c<br/>index d78f37e9b2cf..80ee17ec21b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/serpent_sse2_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/serpent_sse2_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/serpent_sse2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/serpent_sse2_glue.c</a></div><div class='hunk'>@@ -18,7 +18,6 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/b128ops.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/serpent.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "serpent-sse2.h"</div><div class='hunk'>@@ -74,10 +73,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(serpent)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-serpent-sse2",</div><div class='add'>+		.base.cra_name		= "ecb(serpent)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-serpent-sse2",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= SERPENT_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct serpent_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -87,10 +85,9 @@ static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(serpent)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-serpent-sse2",</div><div class='add'>+		.base.cra_name		= "cbc(serpent)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-serpent-sse2",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= SERPENT_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct serpent_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -103,8 +100,6 @@ static struct skcipher_alg serpent_algs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *serpent_simd_algs[ARRAY_SIZE(serpent_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init serpent_sse2_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_XMM2)) {</div><div class='hunk'>@@ -112,15 +107,13 @@ static int __init serpent_sse2_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(serpent_algs,</div><div class='del'>-					      ARRAY_SIZE(serpent_algs),</div><div class='del'>-					      serpent_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(serpent_algs,</div><div class='add'>+					 ARRAY_SIZE(serpent_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit serpent_sse2_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(serpent_algs, ARRAY_SIZE(serpent_algs),</div><div class='del'>-				  serpent_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(serpent_algs, ARRAY_SIZE(serpent_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(serpent_sse2_init);</div><div class='head'>diff --git a/arch/x86/crypto/sha1_ssse3_glue.c b/arch/x86/crypto/sha1_ssse3_glue.c<br/>index ab8bc54f254d..0a912bfc86c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha1_ssse3_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha1_ssse3_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha1_ssse3_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/sha1_ssse3_glue.c</a></div><div class='hunk'>@@ -16,21 +16,17 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id module_cpu_ids[] = {</div><div class='del'>-#ifdef CONFIG_AS_SHA1_NI</div><div class='ctx'> 	X86_MATCH_FEATURE(X86_FEATURE_SHA_NI, NULL),</div><div class='del'>-#endif</div><div class='ctx'> 	X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),</div><div class='ctx'> 	X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),</div><div class='ctx'> 	X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),</div><div class='hunk'>@@ -38,14 +34,10 @@ static const struct x86_cpu_id module_cpu_ids[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);</div><div class='ctx'> </div><div class='del'>-static int sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			     unsigned int len, sha1_block_fn *sha1_xform)</div><div class='add'>+static inline int sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			      unsigned int len, sha1_block_fn *sha1_xform)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA1_BLOCK_SIZE) + len &lt; SHA1_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha1_update(desc, data, len);</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure struct sha1_state begins directly with the SHA1</div><div class='hunk'>@@ -54,22 +46,18 @@ static int sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	BUILD_BUG_ON(offsetof(struct sha1_state, state) != 0);</div><div class='ctx'> </div><div class='ctx'> 	kernel_fpu_begin();</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_xform);</div><div class='add'>+	remain = sha1_base_do_update_blocks(desc, data, len, sha1_xform);</div><div class='ctx'> 	kernel_fpu_end();</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha1_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out, sha1_block_fn *sha1_xform)</div><div class='add'>+static inline int sha1_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			     unsigned int len, u8 *out,</div><div class='add'>+			     sha1_block_fn *sha1_xform)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha1_finup(desc, data, len, out);</div><div class='del'>-</div><div class='ctx'> 	kernel_fpu_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha1_base_do_update(desc, data, len, sha1_xform);</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_xform);</div><div class='add'>+	sha1_base_do_finup(desc, data, len, sha1_xform);</div><div class='ctx'> 	kernel_fpu_end();</div><div class='ctx'> </div><div class='ctx'> 	return sha1_base_finish(desc, out);</div><div class='hunk'>@@ -90,23 +78,17 @@ static int sha1_ssse3_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	return sha1_finup(desc, data, len, out, sha1_transform_ssse3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int sha1_ssse3_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_ssse3_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha1_ssse3_alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	sha1_ssse3_update,</div><div class='del'>-	.final		=	sha1_ssse3_final,</div><div class='ctx'> 	.finup		=	sha1_ssse3_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name =	"sha1-ssse3",</div><div class='ctx'> 		.cra_priority	=	150,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -140,22 +122,17 @@ static int sha1_avx_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	return sha1_finup(desc, data, len, out, sha1_transform_avx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha1_avx_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_avx_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha1_avx_alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	sha1_avx_update,</div><div class='del'>-	.final		=	sha1_avx_final,</div><div class='ctx'> 	.finup		=	sha1_avx_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name =	"sha1-avx",</div><div class='ctx'> 		.cra_priority	=	160,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -200,8 +177,8 @@ static bool avx2_usable(void)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sha1_apply_transform_avx2(struct sha1_state *state,</div><div class='del'>-				      const u8 *data, int blocks)</div><div class='add'>+static inline void sha1_apply_transform_avx2(struct sha1_state *state,</div><div class='add'>+					     const u8 *data, int blocks)</div><div class='ctx'> {</div><div class='ctx'> 	/* Select the optimal transform based on data block size */</div><div class='ctx'> 	if (blocks &gt;= SHA1_AVX2_BLOCK_OPTSIZE)</div><div class='hunk'>@@ -222,22 +199,17 @@ static int sha1_avx2_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	return sha1_finup(desc, data, len, out, sha1_apply_transform_avx2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha1_avx2_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_avx2_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha1_avx2_alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	sha1_avx2_update,</div><div class='del'>-	.final		=	sha1_avx2_final,</div><div class='ctx'> 	.finup		=	sha1_avx2_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name =	"sha1-avx2",</div><div class='ctx'> 		.cra_priority	=	170,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -256,7 +228,6 @@ static void unregister_sha1_avx2(void)</div><div class='ctx'> 		crypto_unregister_shash(&amp;sha1_avx2_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_AS_SHA1_NI</div><div class='ctx'> asmlinkage void sha1_ni_transform(struct sha1_state *digest, const u8 *data,</div><div class='ctx'> 				  int rounds);</div><div class='ctx'> </div><div class='hunk'>@@ -272,22 +243,17 @@ static int sha1_ni_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	return sha1_finup(desc, data, len, out, sha1_ni_transform);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sha1_ni_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha1_ni_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha1_ni_alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	sha1_ni_update,</div><div class='del'>-	.final		=	sha1_ni_final,</div><div class='ctx'> 	.finup		=	sha1_ni_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name =	"sha1-ni",</div><div class='ctx'> 		.cra_priority	=	250,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -306,11 +272,6 @@ static void unregister_sha1_ni(void)</div><div class='ctx'> 		crypto_unregister_shash(&amp;sha1_ni_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-static inline int register_sha1_ni(void) { return 0; }</div><div class='del'>-static inline void unregister_sha1_ni(void) { }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> static int __init sha1_ssse3_mod_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!x86_match_cpu(module_cpu_ids))</div><div class='hunk'>@@ -360,6 +321,4 @@ MODULE_ALIAS_CRYPTO("sha1");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("sha1-ssse3");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("sha1-avx");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("sha1-avx2");</div><div class='del'>-#ifdef CONFIG_AS_SHA1_NI</div><div class='ctx'> MODULE_ALIAS_CRYPTO("sha1-ni");</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/crypto/sha256_ssse3_glue.c b/arch/x86/crypto/sha256_ssse3_glue.c<br/>deleted file mode 100644<br/>index e04a43d9f7d5..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256_ssse3_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha256_ssse3_glue.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,467 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Cryptographic API.</div><div class='del'>- *</div><div class='del'>- * Glue code for the SHA256 Secure Hash Algorithm assembler implementations</div><div class='del'>- * using SSSE3, AVX, AVX2, and SHA-NI instructions.</div><div class='del'>- *</div><div class='del'>- * This file is based on sha256_generic.c</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2013 Intel Corporation.</div><div class='del'>- *</div><div class='del'>- * Author:</div><div class='del'>- *     Tim Chen &lt;tim.c.chen@linux.intel.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the Free</div><div class='del'>- * Software Foundation; either version 2 of the License, or (at your option)</div><div class='del'>- * any later version.</div><div class='del'>- *</div><div class='del'>- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,</div><div class='del'>- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF</div><div class='del'>- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND</div><div class='del'>- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS</div><div class='del'>- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN</div><div class='del'>- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN</div><div class='del'>- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE</div><div class='del'>- * SOFTWARE.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_transform_ssse3(struct sha256_state *state,</div><div class='del'>-				       const u8 *data, int blocks);</div><div class='del'>-</div><div class='del'>-static const struct x86_cpu_id module_cpu_ids[] = {</div><div class='del'>-#ifdef CONFIG_AS_SHA256_NI</div><div class='del'>-	X86_MATCH_FEATURE(X86_FEATURE_SHA_NI, NULL),</div><div class='del'>-#endif</div><div class='del'>-	X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),</div><div class='del'>-	X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),</div><div class='del'>-	X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);</div><div class='del'>-</div><div class='del'>-static int _sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			  unsigned int len, sha256_block_fn *sha256_xform)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count % SHA256_BLOCK_SIZE) + len &lt; SHA256_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha256_update(desc, data, len);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Make sure struct sha256_state begins directly with the SHA256</div><div class='del'>-	 * 256-bit internal state, as this is what the asm functions expect.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);</div><div class='del'>-</div><div class='del'>-	kernel_fpu_begin();</div><div class='del'>-	sha256_base_do_update(desc, data, len, sha256_xform);</div><div class='del'>-	kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-	      unsigned int len, u8 *out, sha256_block_fn *sha256_xform)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha256_finup(desc, data, len, out);</div><div class='del'>-</div><div class='del'>-	kernel_fpu_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha256_base_do_update(desc, data, len, sha256_xform);</div><div class='del'>-	sha256_base_do_finalize(desc, sha256_xform);</div><div class='del'>-	kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-	return sha256_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ssse3_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return _sha256_update(desc, data, len, sha256_transform_ssse3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ssse3_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-	      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_finup(desc, data, len, out, sha256_transform_ssse3);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int sha256_ssse3_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_ssse3_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ssse3_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-	      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_init(desc) ?:</div><div class='del'>-	       sha256_ssse3_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha256_ssse3_algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	sha256_ssse3_update,</div><div class='del'>-	.final		=	sha256_ssse3_final,</div><div class='del'>-	.finup		=	sha256_ssse3_finup,</div><div class='del'>-	.digest		=	sha256_ssse3_digest,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-ssse3",</div><div class='del'>-		.cra_priority	=	150,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	sha256_ssse3_update,</div><div class='del'>-	.final		=	sha256_ssse3_final,</div><div class='del'>-	.finup		=	sha256_ssse3_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-ssse3",</div><div class='del'>-		.cra_priority	=	150,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int register_sha256_ssse3(void)</div><div class='del'>-{</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_SSSE3))</div><div class='del'>-		return crypto_register_shashes(sha256_ssse3_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_ssse3_algs));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void unregister_sha256_ssse3(void)</div><div class='del'>-{</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_SSSE3))</div><div class='del'>-		crypto_unregister_shashes(sha256_ssse3_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_ssse3_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_transform_avx(struct sha256_state *state,</div><div class='del'>-				     const u8 *data, int blocks);</div><div class='del'>-</div><div class='del'>-static int sha256_avx_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return _sha256_update(desc, data, len, sha256_transform_avx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_avx_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_finup(desc, data, len, out, sha256_transform_avx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_avx_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_avx_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_avx_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_init(desc) ?:</div><div class='del'>-	       sha256_avx_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha256_avx_algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	sha256_avx_update,</div><div class='del'>-	.final		=	sha256_avx_final,</div><div class='del'>-	.finup		=	sha256_avx_finup,</div><div class='del'>-	.digest		=	sha256_avx_digest,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-avx",</div><div class='del'>-		.cra_priority	=	160,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	sha256_avx_update,</div><div class='del'>-	.final		=	sha256_avx_final,</div><div class='del'>-	.finup		=	sha256_avx_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-avx",</div><div class='del'>-		.cra_priority	=	160,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static bool avx_usable(void)</div><div class='del'>-{</div><div class='del'>-	if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {</div><div class='del'>-		if (boot_cpu_has(X86_FEATURE_AVX))</div><div class='del'>-			pr_info("AVX detected but unusable.\n");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int register_sha256_avx(void)</div><div class='del'>-{</div><div class='del'>-	if (avx_usable())</div><div class='del'>-		return crypto_register_shashes(sha256_avx_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_avx_algs));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void unregister_sha256_avx(void)</div><div class='del'>-{</div><div class='del'>-	if (avx_usable())</div><div class='del'>-		crypto_unregister_shashes(sha256_avx_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_avx_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-asmlinkage void sha256_transform_rorx(struct sha256_state *state,</div><div class='del'>-				      const u8 *data, int blocks);</div><div class='del'>-</div><div class='del'>-static int sha256_avx2_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return _sha256_update(desc, data, len, sha256_transform_rorx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_avx2_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_finup(desc, data, len, out, sha256_transform_rorx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_avx2_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_avx2_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_avx2_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_init(desc) ?:</div><div class='del'>-	       sha256_avx2_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha256_avx2_algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	sha256_avx2_update,</div><div class='del'>-	.final		=	sha256_avx2_final,</div><div class='del'>-	.finup		=	sha256_avx2_finup,</div><div class='del'>-	.digest		=	sha256_avx2_digest,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-avx2",</div><div class='del'>-		.cra_priority	=	170,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	sha256_avx2_update,</div><div class='del'>-	.final		=	sha256_avx2_final,</div><div class='del'>-	.finup		=	sha256_avx2_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-avx2",</div><div class='del'>-		.cra_priority	=	170,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static bool avx2_usable(void)</div><div class='del'>-{</div><div class='del'>-	if (avx_usable() &amp;&amp; boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='del'>-		    boot_cpu_has(X86_FEATURE_BMI2))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int register_sha256_avx2(void)</div><div class='del'>-{</div><div class='del'>-	if (avx2_usable())</div><div class='del'>-		return crypto_register_shashes(sha256_avx2_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_avx2_algs));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void unregister_sha256_avx2(void)</div><div class='del'>-{</div><div class='del'>-	if (avx2_usable())</div><div class='del'>-		crypto_unregister_shashes(sha256_avx2_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_avx2_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_AS_SHA256_NI</div><div class='del'>-asmlinkage void sha256_ni_transform(struct sha256_state *digest,</div><div class='del'>-				    const u8 *data, int rounds);</div><div class='del'>-</div><div class='del'>-static int sha256_ni_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			 unsigned int len)</div><div class='del'>-{</div><div class='del'>-	return _sha256_update(desc, data, len, sha256_ni_transform);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ni_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_finup(desc, data, len, out, sha256_ni_transform);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ni_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_ni_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sha256_ni_digest(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha256_base_init(desc) ?:</div><div class='del'>-	       sha256_ni_finup(desc, data, len, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha256_ni_algs[] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	sha256_ni_update,</div><div class='del'>-	.final		=	sha256_ni_final,</div><div class='del'>-	.finup		=	sha256_ni_finup,</div><div class='del'>-	.digest		=	sha256_ni_digest,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name =	"sha256-ni",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	sha256_ni_update,</div><div class='del'>-	.final		=	sha256_ni_final,</div><div class='del'>-	.finup		=	sha256_ni_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name =	"sha224-ni",</div><div class='del'>-		.cra_priority	=	250,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int register_sha256_ni(void)</div><div class='del'>-{</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_SHA_NI))</div><div class='del'>-		return crypto_register_shashes(sha256_ni_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_ni_algs));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void unregister_sha256_ni(void)</div><div class='del'>-{</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_SHA_NI))</div><div class='del'>-		crypto_unregister_shashes(sha256_ni_algs,</div><div class='del'>-				ARRAY_SIZE(sha256_ni_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static inline int register_sha256_ni(void) { return 0; }</div><div class='del'>-static inline void unregister_sha256_ni(void) { }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int __init sha256_ssse3_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!x86_match_cpu(module_cpu_ids))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (register_sha256_ssse3())</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	if (register_sha256_avx()) {</div><div class='del'>-		unregister_sha256_ssse3();</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (register_sha256_avx2()) {</div><div class='del'>-		unregister_sha256_avx();</div><div class='del'>-		unregister_sha256_ssse3();</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (register_sha256_ni()) {</div><div class='del'>-		unregister_sha256_avx2();</div><div class='del'>-		unregister_sha256_avx();</div><div class='del'>-		unregister_sha256_ssse3();</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-fail:</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_ssse3_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	unregister_sha256_ni();</div><div class='del'>-	unregister_sha256_avx2();</div><div class='del'>-	unregister_sha256_avx();</div><div class='del'>-	unregister_sha256_ssse3();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(sha256_ssse3_mod_init);</div><div class='del'>-module_exit(sha256_ssse3_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm, Supplemental SSE3 accelerated");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256-ssse3");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256-avx");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256-avx2");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224-ssse3");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224-avx");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224-avx2");</div><div class='del'>-#ifdef CONFIG_AS_SHA256_NI</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256-ni");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224-ni");</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/crypto/sha512_ssse3_glue.c b/arch/x86/crypto/sha512_ssse3_glue.c<br/>index 6d3b85e53d0e..067684c54395 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha512_ssse3_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha512_ssse3_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha512_ssse3_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/sha512_ssse3_glue.c</a></div><div class='hunk'>@@ -27,17 +27,13 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void sha512_transform_ssse3(struct sha512_state *state,</div><div class='ctx'> 				       const u8 *data, int blocks);</div><div class='hunk'>@@ -45,11 +41,7 @@ asmlinkage void sha512_transform_ssse3(struct sha512_state *state,</div><div class='ctx'> static int sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 		       unsigned int len, sha512_block_fn *sha512_xform)</div><div class='ctx'> {</div><div class='del'>-	struct sha512_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-	    (sctx-&gt;count[0] % SHA512_BLOCK_SIZE) + len &lt; SHA512_BLOCK_SIZE)</div><div class='del'>-		return crypto_sha512_update(desc, data, len);</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure struct sha512_state begins directly with the SHA512</div><div class='hunk'>@@ -58,22 +50,17 @@ static int sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	BUILD_BUG_ON(offsetof(struct sha512_state, state) != 0);</div><div class='ctx'> </div><div class='ctx'> 	kernel_fpu_begin();</div><div class='del'>-	sha512_base_do_update(desc, data, len, sha512_xform);</div><div class='add'>+	remain = sha512_base_do_update_blocks(desc, data, len, sha512_xform);</div><div class='ctx'> 	kernel_fpu_end();</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	      unsigned int len, u8 *out, sha512_block_fn *sha512_xform)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable())</div><div class='del'>-		return crypto_sha512_finup(desc, data, len, out);</div><div class='del'>-</div><div class='ctx'> 	kernel_fpu_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sha512_base_do_update(desc, data, len, sha512_xform);</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_xform);</div><div class='add'>+	sha512_base_do_finup(desc, data, len, sha512_xform);</div><div class='ctx'> 	kernel_fpu_end();</div><div class='ctx'> </div><div class='ctx'> 	return sha512_base_finish(desc, out);</div><div class='hunk'>@@ -91,23 +78,18 @@ static int sha512_ssse3_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	return sha512_finup(desc, data, len, out, sha512_transform_ssse3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int sha512_ssse3_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_ssse3_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha512_ssse3_algs[] = { {</div><div class='ctx'> 	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha512_base_init,</div><div class='ctx'> 	.update		=	sha512_ssse3_update,</div><div class='del'>-	.final		=	sha512_ssse3_final,</div><div class='ctx'> 	.finup		=	sha512_ssse3_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha512",</div><div class='ctx'> 		.cra_driver_name =	"sha512-ssse3",</div><div class='ctx'> 		.cra_priority	=	150,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -115,13 +97,14 @@ static struct shash_alg sha512_ssse3_algs[] = { {</div><div class='ctx'> 	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha384_base_init,</div><div class='ctx'> 	.update		=	sha512_ssse3_update,</div><div class='del'>-	.final		=	sha512_ssse3_final,</div><div class='ctx'> 	.finup		=	sha512_ssse3_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha384",</div><div class='ctx'> 		.cra_driver_name =	"sha384-ssse3",</div><div class='ctx'> 		.cra_priority	=	150,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -167,23 +150,18 @@ static int sha512_avx_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	return sha512_finup(desc, data, len, out, sha512_transform_avx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int sha512_avx_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_avx_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha512_avx_algs[] = { {</div><div class='ctx'> 	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha512_base_init,</div><div class='ctx'> 	.update		=	sha512_avx_update,</div><div class='del'>-	.final		=	sha512_avx_final,</div><div class='ctx'> 	.finup		=	sha512_avx_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha512",</div><div class='ctx'> 		.cra_driver_name =	"sha512-avx",</div><div class='ctx'> 		.cra_priority	=	160,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -191,13 +169,14 @@ static struct shash_alg sha512_avx_algs[] = { {</div><div class='ctx'> 	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha384_base_init,</div><div class='ctx'> 	.update		=	sha512_avx_update,</div><div class='del'>-	.final		=	sha512_avx_final,</div><div class='ctx'> 	.finup		=	sha512_avx_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha384",</div><div class='ctx'> 		.cra_driver_name =	"sha384-avx",</div><div class='ctx'> 		.cra_priority	=	160,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -233,23 +212,18 @@ static int sha512_avx2_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	return sha512_finup(desc, data, len, out, sha512_transform_rorx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Add padding and return the message digest. */</div><div class='del'>-static int sha512_avx2_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	return sha512_avx2_finup(desc, NULL, 0, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha512_avx2_algs[] = { {</div><div class='ctx'> 	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha512_base_init,</div><div class='ctx'> 	.update		=	sha512_avx2_update,</div><div class='del'>-	.final		=	sha512_avx2_final,</div><div class='ctx'> 	.finup		=	sha512_avx2_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha512",</div><div class='ctx'> 		.cra_driver_name =	"sha512-avx2",</div><div class='ctx'> 		.cra_priority	=	170,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -257,13 +231,14 @@ static struct shash_alg sha512_avx2_algs[] = { {</div><div class='ctx'> 	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha384_base_init,</div><div class='ctx'> 	.update		=	sha512_avx2_update,</div><div class='del'>-	.final		=	sha512_avx2_final,</div><div class='ctx'> 	.finup		=	sha512_avx2_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha384",</div><div class='ctx'> 		.cra_driver_name =	"sha384-avx2",</div><div class='ctx'> 		.cra_priority	=	170,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/crypto/sm3_avx_glue.c b/arch/x86/crypto/sm3_avx_glue.c<br/>index 661b6f22ffcd..6e8c42b9dc8e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sm3_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sm3_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sm3_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/sm3_avx_glue.c</a></div><div class='hunk'>@@ -10,12 +10,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/simd.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void sm3_transform_avx(struct sm3_state *state,</div><div class='ctx'> 			const u8 *data, int nblocks);</div><div class='hunk'>@@ -23,13 +22,7 @@ asmlinkage void sm3_transform_avx(struct sm3_state *state,</div><div class='ctx'> static int sm3_avx_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			 unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sm3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (!crypto_simd_usable() ||</div><div class='del'>-			(sctx-&gt;count % SM3_BLOCK_SIZE) + len &lt; SM3_BLOCK_SIZE) {</div><div class='del'>-		sm3_update(sctx, data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	int remain;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure struct sm3_state begins directly with the SM3</div><div class='hunk'>@@ -38,45 +31,17 @@ static int sm3_avx_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	BUILD_BUG_ON(offsetof(struct sm3_state, state) != 0);</div><div class='ctx'> </div><div class='ctx'> 	kernel_fpu_begin();</div><div class='del'>-	sm3_base_do_update(desc, data, len, sm3_transform_avx);</div><div class='add'>+	remain = sm3_base_do_update_blocks(desc, data, len, sm3_transform_avx);</div><div class='ctx'> 	kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sm3_avx_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 		      unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		struct sm3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-		if (len)</div><div class='del'>-			sm3_update(sctx, data, len);</div><div class='del'>-</div><div class='del'>-		sm3_final(sctx, out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	kernel_fpu_begin();</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_base_do_update(desc, data, len, sm3_transform_avx);</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_transform_avx);</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_transform_avx);</div><div class='ctx'> 	kernel_fpu_end();</div><div class='del'>-</div><div class='del'>-	return sm3_base_finish(desc, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sm3_avx_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (!crypto_simd_usable()) {</div><div class='del'>-		sm3_final(shash_desc_ctx(desc), out);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kernel_fpu_begin();</div><div class='del'>-	sm3_base_do_finalize(desc, sm3_transform_avx);</div><div class='del'>-	kernel_fpu_end();</div><div class='del'>-</div><div class='ctx'> 	return sm3_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -84,13 +49,14 @@ static struct shash_alg sm3_avx_alg = {</div><div class='ctx'> 	.digestsize	=	SM3_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sm3_base_init,</div><div class='ctx'> 	.update		=	sm3_avx_update,</div><div class='del'>-	.final		=	sm3_avx_final,</div><div class='ctx'> 	.finup		=	sm3_avx_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sm3_state),</div><div class='add'>+	.descsize	=	SM3_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sm3",</div><div class='ctx'> 		.cra_driver_name =	"sm3-avx",</div><div class='ctx'> 		.cra_priority	=	300,</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SM3_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/crypto/sm4_aesni_avx2_glue.c b/arch/x86/crypto/sm4_aesni_avx2_glue.c<br/>index 1148fd4cd57f..fec0ab7a63dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sm4_aesni_avx2_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sm4_aesni_avx2_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sm4_aesni_avx2_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/sm4_aesni_avx2_glue.c</a></div><div class='hunk'>@@ -8,11 +8,10 @@</div><div class='ctx'>  * Copyright (c) 2021 Tianjia Zhang &lt;tianjia.zhang@linux.alibaba.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/sm4.h&gt;</div><div class='ctx'> #include "sm4-avx.h"</div><div class='hunk'>@@ -48,10 +47,9 @@ static int ctr_crypt(struct skcipher_request *req)</div><div class='ctx'> static struct skcipher_alg sm4_aesni_avx2_skciphers[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__ecb(sm4)",</div><div class='del'>-			.cra_driver_name	= "__ecb-sm4-aesni-avx2",</div><div class='add'>+			.cra_name		= "ecb(sm4)",</div><div class='add'>+			.cra_driver_name	= "ecb-sm4-aesni-avx2",</div><div class='ctx'> 			.cra_priority		= 500,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -64,10 +62,9 @@ static struct skcipher_alg sm4_aesni_avx2_skciphers[] = {</div><div class='ctx'> 		.decrypt	= sm4_avx_ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__cbc(sm4)",</div><div class='del'>-			.cra_driver_name	= "__cbc-sm4-aesni-avx2",</div><div class='add'>+			.cra_name		= "cbc(sm4)",</div><div class='add'>+			.cra_driver_name	= "cbc-sm4-aesni-avx2",</div><div class='ctx'> 			.cra_priority		= 500,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -81,10 +78,9 @@ static struct skcipher_alg sm4_aesni_avx2_skciphers[] = {</div><div class='ctx'> 		.decrypt	= cbc_decrypt,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__ctr(sm4)",</div><div class='del'>-			.cra_driver_name	= "__ctr-sm4-aesni-avx2",</div><div class='add'>+			.cra_name		= "ctr(sm4)",</div><div class='add'>+			.cra_driver_name	= "ctr-sm4-aesni-avx2",</div><div class='ctx'> 			.cra_priority		= 500,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= 1,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -100,9 +96,6 @@ static struct skcipher_alg sm4_aesni_avx2_skciphers[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *</div><div class='del'>-simd_sm4_aesni_avx2_skciphers[ARRAY_SIZE(sm4_aesni_avx2_skciphers)];</div><div class='del'>-</div><div class='ctx'> static int __init sm4_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -121,16 +114,14 @@ static int __init sm4_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(sm4_aesni_avx2_skciphers,</div><div class='del'>-					ARRAY_SIZE(sm4_aesni_avx2_skciphers),</div><div class='del'>-					simd_sm4_aesni_avx2_skciphers);</div><div class='add'>+	return crypto_register_skciphers(sm4_aesni_avx2_skciphers,</div><div class='add'>+					 ARRAY_SIZE(sm4_aesni_avx2_skciphers));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit sm4_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(sm4_aesni_avx2_skciphers,</div><div class='del'>-				ARRAY_SIZE(sm4_aesni_avx2_skciphers),</div><div class='del'>-				simd_sm4_aesni_avx2_skciphers);</div><div class='add'>+	crypto_unregister_skciphers(sm4_aesni_avx2_skciphers,</div><div class='add'>+				    ARRAY_SIZE(sm4_aesni_avx2_skciphers));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(sm4_init);</div><div class='head'>diff --git a/arch/x86/crypto/sm4_aesni_avx_glue.c b/arch/x86/crypto/sm4_aesni_avx_glue.c<br/>index 85b4ca78b47b..72867fc49ce8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sm4_aesni_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sm4_aesni_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/sm4_aesni_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/sm4_aesni_avx_glue.c</a></div><div class='hunk'>@@ -8,11 +8,10 @@</div><div class='ctx'>  * Copyright (c) 2021 Tianjia Zhang &lt;tianjia.zhang@linux.alibaba.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;asm/simd.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/sm4.h&gt;</div><div class='ctx'> #include "sm4-avx.h"</div><div class='hunk'>@@ -263,10 +262,9 @@ static int ctr_crypt(struct skcipher_request *req)</div><div class='ctx'> static struct skcipher_alg sm4_aesni_avx_skciphers[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__ecb(sm4)",</div><div class='del'>-			.cra_driver_name	= "__ecb-sm4-aesni-avx",</div><div class='add'>+			.cra_name		= "ecb(sm4)",</div><div class='add'>+			.cra_driver_name	= "ecb-sm4-aesni-avx",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -279,10 +277,9 @@ static struct skcipher_alg sm4_aesni_avx_skciphers[] = {</div><div class='ctx'> 		.decrypt	= sm4_avx_ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__cbc(sm4)",</div><div class='del'>-			.cra_driver_name	= "__cbc-sm4-aesni-avx",</div><div class='add'>+			.cra_name		= "cbc(sm4)",</div><div class='add'>+			.cra_driver_name	= "cbc-sm4-aesni-avx",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= SM4_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -296,10 +293,9 @@ static struct skcipher_alg sm4_aesni_avx_skciphers[] = {</div><div class='ctx'> 		.decrypt	= cbc_decrypt,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.base = {</div><div class='del'>-			.cra_name		= "__ctr(sm4)",</div><div class='del'>-			.cra_driver_name	= "__ctr-sm4-aesni-avx",</div><div class='add'>+			.cra_name		= "ctr(sm4)",</div><div class='add'>+			.cra_driver_name	= "ctr-sm4-aesni-avx",</div><div class='ctx'> 			.cra_priority		= 400,</div><div class='del'>-			.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 			.cra_blocksize		= 1,</div><div class='ctx'> 			.cra_ctxsize		= sizeof(struct sm4_ctx),</div><div class='ctx'> 			.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -315,9 +311,6 @@ static struct skcipher_alg sm4_aesni_avx_skciphers[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *</div><div class='del'>-simd_sm4_aesni_avx_skciphers[ARRAY_SIZE(sm4_aesni_avx_skciphers)];</div><div class='del'>-</div><div class='ctx'> static int __init sm4_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -335,16 +328,14 @@ static int __init sm4_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(sm4_aesni_avx_skciphers,</div><div class='del'>-					ARRAY_SIZE(sm4_aesni_avx_skciphers),</div><div class='del'>-					simd_sm4_aesni_avx_skciphers);</div><div class='add'>+	return crypto_register_skciphers(sm4_aesni_avx_skciphers,</div><div class='add'>+					 ARRAY_SIZE(sm4_aesni_avx_skciphers));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit sm4_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(sm4_aesni_avx_skciphers,</div><div class='del'>-					ARRAY_SIZE(sm4_aesni_avx_skciphers),</div><div class='del'>-					simd_sm4_aesni_avx_skciphers);</div><div class='add'>+	crypto_unregister_skciphers(sm4_aesni_avx_skciphers,</div><div class='add'>+				    ARRAY_SIZE(sm4_aesni_avx_skciphers));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(sm4_init);</div><div class='head'>diff --git a/arch/x86/crypto/twofish_avx_glue.c b/arch/x86/crypto/twofish_avx_glue.c<br/>index 3eb3440b477a..9e20db013750 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/twofish_avx_glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/twofish_avx_glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/crypto/twofish_avx_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/crypto/twofish_avx_glue.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/simd.h&gt;</div><div class='ctx'> #include &lt;crypto/twofish.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "twofish.h"</div><div class='hunk'>@@ -74,10 +73,9 @@ static int cbc_decrypt(struct skcipher_request *req)</div><div class='ctx'> </div><div class='ctx'> static struct skcipher_alg twofish_algs[] = {</div><div class='ctx'> 	{</div><div class='del'>-		.base.cra_name		= "__ecb(twofish)",</div><div class='del'>-		.base.cra_driver_name	= "__ecb-twofish-avx",</div><div class='add'>+		.base.cra_name		= "ecb(twofish)",</div><div class='add'>+		.base.cra_driver_name	= "ecb-twofish-avx",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= TF_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct twofish_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -87,10 +85,9 @@ static struct skcipher_alg twofish_algs[] = {</div><div class='ctx'> 		.encrypt		= ecb_encrypt,</div><div class='ctx'> 		.decrypt		= ecb_decrypt,</div><div class='ctx'> 	}, {</div><div class='del'>-		.base.cra_name		= "__cbc(twofish)",</div><div class='del'>-		.base.cra_driver_name	= "__cbc-twofish-avx",</div><div class='add'>+		.base.cra_name		= "cbc(twofish)",</div><div class='add'>+		.base.cra_driver_name	= "cbc-twofish-avx",</div><div class='ctx'> 		.base.cra_priority	= 400,</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_INTERNAL,</div><div class='ctx'> 		.base.cra_blocksize	= TF_BLOCK_SIZE,</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct twofish_ctx),</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,</div><div class='hunk'>@@ -103,8 +100,6 @@ static struct skcipher_alg twofish_algs[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct simd_skcipher_alg *twofish_simd_algs[ARRAY_SIZE(twofish_algs)];</div><div class='del'>-</div><div class='ctx'> static int __init twofish_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	const char *feature_name;</div><div class='hunk'>@@ -114,15 +109,13 @@ static int __init twofish_init(void)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return simd_register_skciphers_compat(twofish_algs,</div><div class='del'>-					      ARRAY_SIZE(twofish_algs),</div><div class='del'>-					      twofish_simd_algs);</div><div class='add'>+	return crypto_register_skciphers(twofish_algs,</div><div class='add'>+					 ARRAY_SIZE(twofish_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit twofish_exit(void)</div><div class='ctx'> {</div><div class='del'>-	simd_unregister_skciphers(twofish_algs, ARRAY_SIZE(twofish_algs),</div><div class='del'>-				  twofish_simd_algs);</div><div class='add'>+	crypto_unregister_skciphers(twofish_algs, ARRAY_SIZE(twofish_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(twofish_init);</div><div class='head'>diff --git a/arch/x86/entry/entry.S b/arch/x86/entry/entry.S<br/>index d3caa31240ed..175958b02f2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/entry.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/entry.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/entry.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/entry/entry.S</a></div><div class='hunk'>@@ -17,19 +17,20 @@</div><div class='ctx'> </div><div class='ctx'> .pushsection .noinstr.text, "ax"</div><div class='ctx'> </div><div class='del'>-SYM_FUNC_START(entry_ibpb)</div><div class='add'>+/* Clobbers AX, CX, DX */</div><div class='add'>+SYM_FUNC_START(write_ibpb)</div><div class='ctx'> 	ANNOTATE_NOENDBR</div><div class='ctx'> 	movl	$MSR_IA32_PRED_CMD, %ecx</div><div class='del'>-	movl	$PRED_CMD_IBPB, %eax</div><div class='add'>+	movl	_ASM_RIP(x86_pred_cmd), %eax</div><div class='ctx'> 	xorl	%edx, %edx</div><div class='ctx'> 	wrmsr</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure IBPB clears return stack preductions too. */</div><div class='ctx'> 	FILL_RETURN_BUFFER %rax, RSB_CLEAR_LOOPS, X86_BUG_IBPB_NO_RET</div><div class='ctx'> 	RET</div><div class='del'>-SYM_FUNC_END(entry_ibpb)</div><div class='add'>+SYM_FUNC_END(write_ibpb)</div><div class='ctx'> /* For KVM */</div><div class='del'>-EXPORT_SYMBOL_GPL(entry_ibpb);</div><div class='add'>+EXPORT_SYMBOL_GPL(write_ibpb);</div><div class='ctx'> </div><div class='ctx'> .popsection</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S<br/>index f40bdf97d390..ed04a968cc7d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/entry_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/entry_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/entry_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/entry/entry_64.S</a></div><div class='hunk'>@@ -1525,7 +1525,9 @@ SYM_CODE_END(rewind_stack_and_make_dead)</div><div class='ctx'>  * ORC to unwind properly.</div><div class='ctx'>  *</div><div class='ctx'>  * The alignment is for performance and not for safety, and may be safely</div><div class='del'>- * refactored in the future if needed.</div><div class='add'>+ * refactored in the future if needed. The .skips are for safety, to ensure</div><div class='add'>+ * that all RETs are in the second half of a cacheline to mitigate Indirect</div><div class='add'>+ * Target Selection, rather than taking the slowpath via its_return_thunk.</div><div class='ctx'>  */</div><div class='ctx'> SYM_FUNC_START(clear_bhb_loop)</div><div class='ctx'> 	ANNOTATE_NOENDBR</div><div class='hunk'>@@ -1536,10 +1538,22 @@ SYM_FUNC_START(clear_bhb_loop)</div><div class='ctx'> 	call	1f</div><div class='ctx'> 	jmp	5f</div><div class='ctx'> 	.align 64, 0xcc</div><div class='add'>+	/*</div><div class='add'>+	 * Shift instructions so that the RET is in the upper half of the</div><div class='add'>+	 * cacheline and don't take the slowpath to its_return_thunk.</div><div class='add'>+	 */</div><div class='add'>+	.skip 32 - (.Lret1 - 1f), 0xcc</div><div class='ctx'> 	ANNOTATE_INTRA_FUNCTION_CALL</div><div class='ctx'> 1:	call	2f</div><div class='del'>-	RET</div><div class='add'>+.Lret1:	RET</div><div class='ctx'> 	.align 64, 0xcc</div><div class='add'>+	/*</div><div class='add'>+	 * As above shift instructions for RET at .Lret2 as well.</div><div class='add'>+	 *</div><div class='add'>+	 * This should be ideally be: .skip 32 - (.Lret2 - 2f), 0xcc</div><div class='add'>+	 * but some Clang versions (e.g. 18) don't like this.</div><div class='add'>+	 */</div><div class='add'>+	.skip 32 - 18, 0xcc</div><div class='ctx'> 2:	movl	$5, %eax</div><div class='ctx'> 3:	jmp	4f</div><div class='ctx'> 	nop</div><div class='hunk'>@@ -1547,7 +1561,7 @@ SYM_FUNC_START(clear_bhb_loop)</div><div class='ctx'> 	jnz	3b</div><div class='ctx'> 	sub	$1, %ecx</div><div class='ctx'> 	jnz	1b</div><div class='del'>-	RET</div><div class='add'>+.Lret2:	RET</div><div class='ctx'> 5:	lfence</div><div class='ctx'> 	pop	%rbp</div><div class='ctx'> 	RET</div><div class='head'>diff --git a/arch/x86/entry/vdso/vma.c b/arch/x86/entry/vdso/vma.c<br/>index adb299d3b6a1..afe105b2f907 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/vdso/vma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/vdso/vma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/vdso/vma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/entry/vdso/vma.c</a></div><div class='hunk'>@@ -65,7 +65,6 @@ static vm_fault_t vdso_fault(const struct vm_special_mapping *sm,</div><div class='ctx'> static void vdso_fix_landing(const struct vdso_image *image,</div><div class='ctx'> 		struct vm_area_struct *new_vma)</div><div class='ctx'> {</div><div class='del'>-#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION</div><div class='ctx'> 	if (in_ia32_syscall() &amp;&amp; image == &amp;vdso_image_32) {</div><div class='ctx'> 		struct pt_regs *regs = current_pt_regs();</div><div class='ctx'> 		unsigned long vdso_land = image-&gt;sym_int80_landing_pad;</div><div class='hunk'>@@ -76,7 +75,6 @@ static void vdso_fix_landing(const struct vdso_image *image,</div><div class='ctx'> 		if (regs-&gt;ip == old_land_addr)</div><div class='ctx'> 			regs-&gt;ip = new_vma-&gt;vm_start + vdso_land;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vdso_mremap(const struct vm_special_mapping *sm,</div><div class='hunk'>@@ -227,7 +225,6 @@ int map_vdso_once(const struct vdso_image *image, unsigned long addr)</div><div class='ctx'> 	return map_vdso(image, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)</div><div class='ctx'> static int load_vdso32(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (vdso32_enabled != 1)  /* Other values all mean "disabled" */</div><div class='hunk'>@@ -235,45 +232,38 @@ static int load_vdso32(void)</div><div class='ctx'> </div><div class='ctx'> 	return map_vdso(&amp;vdso_image_32, 0);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='ctx'> int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='ctx'> {</div><div class='del'>-	if (!vdso64_enabled)</div><div class='del'>-		return 0;</div><div class='add'>+	if (IS_ENABLED(CONFIG_X86_64)) {</div><div class='add'>+		if (!vdso64_enabled)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		return map_vdso(&amp;vdso_image_64, 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return map_vdso(&amp;vdso_image_64, 0);</div><div class='add'>+	return load_vdso32();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_COMPAT</div><div class='ctx'> int compat_arch_setup_additional_pages(struct linux_binprm *bprm,</div><div class='ctx'> 				       int uses_interp, bool x32)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_X86_X32_ABI</div><div class='del'>-	if (x32) {</div><div class='add'>+	if (IS_ENABLED(CONFIG_X86_X32_ABI) &amp;&amp; x32) {</div><div class='ctx'> 		if (!vdso64_enabled)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		return map_vdso(&amp;vdso_image_x32, 0);</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_IA32_EMULATION</div><div class='del'>-	return load_vdso32();</div><div class='del'>-#else</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_IA32_EMULATION))</div><div class='add'>+		return load_vdso32();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-#else</div><div class='del'>-int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)</div><div class='del'>-{</div><div class='del'>-	return load_vdso32();</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> bool arch_syscall_is_vdso_sigreturn(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)</div><div class='ctx'> 	const struct vdso_image *image = current-&gt;mm-&gt;context.vdso_image;</div><div class='ctx'> 	unsigned long vdso = (unsigned long) current-&gt;mm-&gt;context.vdso;</div><div class='ctx'> </div><div class='hunk'>@@ -282,7 +272,6 @@ bool arch_syscall_is_vdso_sigreturn(struct pt_regs *regs)</div><div class='ctx'> 		    regs-&gt;ip == vdso + image-&gt;sym_vdso32_rt_sigreturn_landing_pad)</div><div class='ctx'> 			return true;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c<br/>index 2fb7d53cf333..c9103a6fa06e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/entry/vsyscall/vsyscall_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/entry/vsyscall/vsyscall_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/entry/vsyscall/vsyscall_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/entry/vsyscall/vsyscall_64.c</a></div><div class='hunk'>@@ -341,9 +341,7 @@ void __init set_vsyscall_pgtable_user_bits(pgd_t *root)</div><div class='ctx'> 	pgd = pgd_offset_pgd(root, VSYSCALL_ADDR);</div><div class='ctx'> 	set_pgd(pgd, __pgd(pgd_val(*pgd) | _PAGE_USER));</div><div class='ctx'> 	p4d = p4d_offset(pgd, VSYSCALL_ADDR);</div><div class='del'>-#if CONFIG_PGTABLE_LEVELS &gt;= 5</div><div class='ctx'> 	set_p4d(p4d, __p4d(p4d_val(*p4d) | _PAGE_USER));</div><div class='del'>-#endif</div><div class='ctx'> 	pud = pud_offset(p4d, VSYSCALL_ADDR);</div><div class='ctx'> 	set_pud(pud, __pud(pud_val(*pud) | _PAGE_USER));</div><div class='ctx'> 	pmd = pmd_offset(pud, VSYSCALL_ADDR);</div><div class='head'>diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c<br/>index ec3427463382..06f35a6b58a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/brs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/brs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/brs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/amd/brs.c</a></div><div class='hunk'>@@ -44,12 +44,12 @@ static inline unsigned int brs_to(int idx)</div><div class='ctx'> static __always_inline void set_debug_extn_cfg(u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	/* bits[4:3] must always be set to 11b */</div><div class='del'>-	__wrmsr(MSR_AMD_DBG_EXTN_CFG, val | 3ULL &lt;&lt; 3, val &gt;&gt; 32);</div><div class='add'>+	native_wrmsrq(MSR_AMD_DBG_EXTN_CFG, val | 3ULL &lt;&lt; 3);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 get_debug_extn_cfg(void)</div><div class='ctx'> {</div><div class='del'>-	return __rdmsr(MSR_AMD_DBG_EXTN_CFG);</div><div class='add'>+	return native_rdmsrq(MSR_AMD_DBG_EXTN_CFG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool __init amd_brs_detect(void)</div><div class='hunk'>@@ -187,7 +187,7 @@ void amd_brs_reset(void)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Mark first entry as poisoned</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(brs_to(0), BRS_POISON);</div><div class='add'>+	wrmsrq(brs_to(0), BRS_POISON);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __init amd_brs_init(void)</div><div class='hunk'>@@ -325,7 +325,7 @@ void amd_brs_drain(void)</div><div class='ctx'> 		u32 brs_idx = tos - i;</div><div class='ctx'> 		u64 from, to;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(brs_to(brs_idx), to);</div><div class='add'>+		rdmsrq(brs_to(brs_idx), to);</div><div class='ctx'> </div><div class='ctx'> 		/* Entry does not belong to us (as marked by kernel) */</div><div class='ctx'> 		if (to == BRS_POISON)</div><div class='hunk'>@@ -341,7 +341,7 @@ void amd_brs_drain(void)</div><div class='ctx'> 		if (!amd_brs_match_plm(event, to))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(brs_from(brs_idx), from);</div><div class='add'>+		rdmsrq(brs_from(brs_idx), from);</div><div class='ctx'> </div><div class='ctx'> 		perf_clear_branch_entry_bitfields(br+nr);</div><div class='ctx'> </div><div class='hunk'>@@ -371,7 +371,7 @@ static void amd_brs_poison_buffer(void)</div><div class='ctx'> 	idx = amd_brs_get_tos(&amp;cfg);</div><div class='ctx'> </div><div class='ctx'> 	/* Poison target of entry */</div><div class='del'>-	wrmsrl(brs_to(idx), BRS_POISON);</div><div class='add'>+	wrmsrq(brs_to(idx), BRS_POISON);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c<br/>index 30d6ceb4c8ad..b20661b8621d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/amd/core.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='ctx'> #include &lt;asm/apicdef.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='hunk'>@@ -563,13 +564,13 @@ static void amd_pmu_cpu_reset(int cpu)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear enable bits i.e. PerfCntrGlobalCtl.PerfCntrEn */</div><div class='del'>-	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, 0);</div><div class='add'>+	wrmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear freeze and overflow bits i.e. PerfCntrGLobalStatus.LbrFreeze</div><div class='ctx'> 	 * and PerfCntrGLobalStatus.PerfCntrOvfl</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR,</div><div class='add'>+	wrmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR,</div><div class='ctx'> 	       GLOBAL_STATUS_LBRS_FROZEN | amd_pmu_global_cntr_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -651,7 +652,7 @@ static void amd_pmu_cpu_dead(int cpu)</div><div class='ctx'> </div><div class='ctx'> static __always_inline void amd_pmu_set_global_ctl(u64 ctl)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, ctl);</div><div class='add'>+	wrmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u64 amd_pmu_get_global_status(void)</div><div class='hunk'>@@ -659,7 +660,7 @@ static inline u64 amd_pmu_get_global_status(void)</div><div class='ctx'> 	u64 status;</div><div class='ctx'> </div><div class='ctx'> 	/* PerfCntrGlobalStatus is read-only */</div><div class='del'>-	rdmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, status);</div><div class='add'>+	rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, status);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -672,14 +673,14 @@ static inline void amd_pmu_ack_global_status(u64 status)</div><div class='ctx'> 	 * clears the same bit in PerfCntrGlobalStatus</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR, status);</div><div class='add'>+	wrmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool amd_pmu_test_overflow_topbit(int idx)</div><div class='ctx'> {</div><div class='ctx'> 	u64 counter;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(x86_pmu_event_addr(idx), counter);</div><div class='add'>+	rdmsrq(x86_pmu_event_addr(idx), counter);</div><div class='ctx'> </div><div class='ctx'> 	return !(counter &amp; BIT_ULL(x86_pmu.cntval_bits - 1));</div><div class='ctx'> }</div><div class='hunk'>@@ -1003,8 +1004,7 @@ static int amd_pmu_v2_handle_irq(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 		perf_sample_save_brstack(&amp;data, event, &amp;cpuc-&gt;lbr_stack, NULL);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c<br/>index 0252b7ea8bca..112f43b23ebf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/ibs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/ibs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/ibs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/amd/ibs.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/sched/clock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='hunk'>@@ -26,7 +27,7 @@ static u32 ibs_caps;</div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='del'>-#include &lt;asm/amd-ibs.h&gt;</div><div class='add'>+#include &lt;asm/amd/ibs.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* attr.config2 */</div><div class='ctx'> #define IBS_SW_FILTER_MASK	1</div><div class='hunk'>@@ -424,7 +425,7 @@ perf_ibs_event_update(struct perf_ibs *perf_ibs, struct perf_event *event,</div><div class='ctx'> 	 * prev count manually on overflow.</div><div class='ctx'> 	 */</div><div class='ctx'> 	while (!perf_event_try_update(event, count, 64)) {</div><div class='del'>-		rdmsrl(event-&gt;hw.config_base, *config);</div><div class='add'>+		rdmsrq(event-&gt;hw.config_base, *config);</div><div class='ctx'> 		count = perf_ibs-&gt;get_count(*config);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -435,9 +436,9 @@ static inline void perf_ibs_enable_event(struct perf_ibs *perf_ibs,</div><div class='ctx'> 	u64 tmp = hwc-&gt;config | config;</div><div class='ctx'> </div><div class='ctx'> 	if (perf_ibs-&gt;fetch_count_reset_broken)</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, tmp &amp; ~perf_ibs-&gt;enable_mask);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, tmp &amp; ~perf_ibs-&gt;enable_mask);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, tmp | perf_ibs-&gt;enable_mask);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, tmp | perf_ibs-&gt;enable_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -452,9 +453,9 @@ static inline void perf_ibs_disable_event(struct perf_ibs *perf_ibs,</div><div class='ctx'> {</div><div class='ctx'> 	config &amp;= ~perf_ibs-&gt;cnt_mask;</div><div class='ctx'> 	if (boot_cpu_data.x86 == 0x10)</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, config);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, config);</div><div class='ctx'> 	config &amp;= ~perf_ibs-&gt;enable_mask;</div><div class='del'>-	wrmsrl(hwc-&gt;config_base, config);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -513,7 +514,7 @@ static void perf_ibs_stop(struct perf_event *event, int flags)</div><div class='ctx'> 	if (!stopping &amp;&amp; (hwc-&gt;state &amp; PERF_HES_UPTODATE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(hwc-&gt;config_base, config);</div><div class='add'>+	rdmsrq(hwc-&gt;config_base, config);</div><div class='ctx'> </div><div class='ctx'> 	if (stopping) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1256,7 +1257,7 @@ fail:</div><div class='ctx'> 	hwc = &amp;event-&gt;hw;</div><div class='ctx'> 	msr = hwc-&gt;config_base;</div><div class='ctx'> 	buf = ibs_data.regs;</div><div class='del'>-	rdmsrl(msr, *buf);</div><div class='add'>+	rdmsrq(msr, *buf);</div><div class='ctx'> 	if (!(*buf++ &amp; perf_ibs-&gt;valid_mask))</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -1274,7 +1275,7 @@ fail:</div><div class='ctx'> 	offset_max = perf_ibs_get_offset_max(perf_ibs, event, check_rip);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		rdmsrl(msr + offset, *buf++);</div><div class='add'>+		rdmsrq(msr + offset, *buf++);</div><div class='ctx'> 		size++;</div><div class='ctx'> 		offset = find_next_bit(perf_ibs-&gt;offset_mask,</div><div class='ctx'> 				       perf_ibs-&gt;offset_max,</div><div class='hunk'>@@ -1304,17 +1305,17 @@ fail:</div><div class='ctx'> 	if (event-&gt;attr.sample_type &amp; PERF_SAMPLE_RAW) {</div><div class='ctx'> 		if (perf_ibs == &amp;perf_ibs_op) {</div><div class='ctx'> 			if (ibs_caps &amp; IBS_CAPS_BRNTRGT) {</div><div class='del'>-				rdmsrl(MSR_AMD64_IBSBRTARGET, *buf++);</div><div class='add'>+				rdmsrq(MSR_AMD64_IBSBRTARGET, *buf++);</div><div class='ctx'> 				br_target_idx = size;</div><div class='ctx'> 				size++;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (ibs_caps &amp; IBS_CAPS_OPDATA4) {</div><div class='del'>-				rdmsrl(MSR_AMD64_IBSOPDATA4, *buf++);</div><div class='add'>+				rdmsrq(MSR_AMD64_IBSOPDATA4, *buf++);</div><div class='ctx'> 				size++;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (perf_ibs == &amp;perf_ibs_fetch &amp;&amp; (ibs_caps &amp; IBS_CAPS_FETCHCTLEXTD)) {</div><div class='del'>-			rdmsrl(MSR_AMD64_ICIBSEXTDCTL, *buf++);</div><div class='add'>+			rdmsrq(MSR_AMD64_ICIBSEXTDCTL, *buf++);</div><div class='ctx'> 			size++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1373,9 +1374,7 @@ fail:</div><div class='ctx'> 		hwc-&gt;sample_period = perf_ibs-&gt;min_period;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (throttle) {</div><div class='del'>-		perf_ibs_stop(event, 0);</div><div class='del'>-	} else {</div><div class='add'>+	if (!throttle) {</div><div class='ctx'> 		if (perf_ibs == &amp;perf_ibs_op) {</div><div class='ctx'> 			if (ibs_caps &amp; IBS_CAPS_OPCNTEXT) {</div><div class='ctx'> 				new_config = period &amp; IBS_OP_MAX_CNT_EXT_MASK;</div><div class='hunk'>@@ -1565,7 +1564,7 @@ static inline int ibs_eilvt_valid(void)</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_IBSCTL, val);</div><div class='add'>+	rdmsrq(MSR_AMD64_IBSCTL, val);</div><div class='ctx'> 	offset = val &amp; IBSCTL_LVT_OFFSET_MASK;</div><div class='ctx'> </div><div class='ctx'> 	if (!(val &amp; IBSCTL_LVT_OFFSET_VALID)) {</div><div class='hunk'>@@ -1680,7 +1679,7 @@ static inline int get_ibs_lvt_offset(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_IBSCTL, val);</div><div class='add'>+	rdmsrq(MSR_AMD64_IBSCTL, val);</div><div class='ctx'> 	if (!(val &amp; IBSCTL_LVT_OFFSET_VALID))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c<br/>index f8228d8243f7..a721da9987dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/iommu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/iommu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/iommu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/amd/iommu.c</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/amd-iommu.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> #include "iommu.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/events/amd/lbr.c b/arch/x86/events/amd/lbr.c<br/>index c06ccca96851..d24da377df77 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/lbr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/lbr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/lbr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/amd/lbr.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='hunk'>@@ -61,19 +62,19 @@ struct branch_entry {</div><div class='ctx'> </div><div class='ctx'> static __always_inline void amd_pmu_lbr_set_from(unsigned int idx, u64 val)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_AMD_SAMP_BR_FROM + idx * 2, val);</div><div class='add'>+	wrmsrq(MSR_AMD_SAMP_BR_FROM + idx * 2, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void amd_pmu_lbr_set_to(unsigned int idx, u64 val)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_AMD_SAMP_BR_FROM + idx * 2 + 1, val);</div><div class='add'>+	wrmsrq(MSR_AMD_SAMP_BR_FROM + idx * 2 + 1, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 amd_pmu_lbr_get_from(unsigned int idx)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD_SAMP_BR_FROM + idx * 2, val);</div><div class='add'>+	rdmsrq(MSR_AMD_SAMP_BR_FROM + idx * 2, val);</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='hunk'>@@ -82,7 +83,7 @@ static __always_inline u64 amd_pmu_lbr_get_to(unsigned int idx)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD_SAMP_BR_FROM + idx * 2 + 1, val);</div><div class='add'>+	rdmsrq(MSR_AMD_SAMP_BR_FROM + idx * 2 + 1, val);</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='hunk'>@@ -333,7 +334,7 @@ void amd_pmu_lbr_reset(void)</div><div class='ctx'> </div><div class='ctx'> 	cpuc-&gt;last_task_ctx = NULL;</div><div class='ctx'> 	cpuc-&gt;last_log_id = 0;</div><div class='del'>-	wrmsrl(MSR_AMD64_LBR_SELECT, 0);</div><div class='add'>+	wrmsrq(MSR_AMD64_LBR_SELECT, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void amd_pmu_lbr_add(struct perf_event *event)</div><div class='hunk'>@@ -396,16 +397,16 @@ void amd_pmu_lbr_enable_all(void)</div><div class='ctx'> 	/* Set hardware branch filter */</div><div class='ctx'> 	if (cpuc-&gt;lbr_select) {</div><div class='ctx'> 		lbr_select = cpuc-&gt;lbr_sel-&gt;config &amp; LBR_SELECT_MASK;</div><div class='del'>-		wrmsrl(MSR_AMD64_LBR_SELECT, lbr_select);</div><div class='add'>+		wrmsrq(MSR_AMD64_LBR_SELECT, lbr_select);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_AMD_LBR_PMC_FREEZE)) {</div><div class='del'>-		rdmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl);</div><div class='del'>-		wrmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);</div><div class='add'>+		rdmsrq(MSR_IA32_DEBUGCTLMSR, dbg_ctl);</div><div class='add'>+		wrmsrq(MSR_IA32_DEBUGCTLMSR, dbg_ctl | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);</div><div class='del'>-	wrmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg | DBG_EXTN_CFG_LBRV2EN);</div><div class='add'>+	rdmsrq(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);</div><div class='add'>+	wrmsrq(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg | DBG_EXTN_CFG_LBRV2EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void amd_pmu_lbr_disable_all(void)</div><div class='head'>diff --git a/arch/x86/events/amd/power.c b/arch/x86/events/amd/power.c<br/>index 37d5b380516e..dad42790cf7d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/power.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/power.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/power.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/amd/power.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='ctx'> /* Event code: LSB 8 bits, passed in attr-&gt;config any other bit is reserved. */</div><div class='hunk'>@@ -48,8 +49,8 @@ static void event_update(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> 	prev_pwr_acc = hwc-&gt;pwr_acc;</div><div class='ctx'> 	prev_ptsc = hwc-&gt;ptsc;</div><div class='del'>-	rdmsrl(MSR_F15H_CU_PWR_ACCUMULATOR, new_pwr_acc);</div><div class='del'>-	rdmsrl(MSR_F15H_PTSC, new_ptsc);</div><div class='add'>+	rdmsrq(MSR_F15H_CU_PWR_ACCUMULATOR, new_pwr_acc);</div><div class='add'>+	rdmsrq(MSR_F15H_PTSC, new_ptsc);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Calculate the CU power consumption over a time period, the unit of</div><div class='hunk'>@@ -75,8 +76,8 @@ static void __pmu_event_start(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> 	event-&gt;hw.state = 0;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_F15H_PTSC, event-&gt;hw.ptsc);</div><div class='del'>-	rdmsrl(MSR_F15H_CU_PWR_ACCUMULATOR, event-&gt;hw.pwr_acc);</div><div class='add'>+	rdmsrq(MSR_F15H_PTSC, event-&gt;hw.ptsc);</div><div class='add'>+	rdmsrq(MSR_F15H_CU_PWR_ACCUMULATOR, event-&gt;hw.pwr_acc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pmu_event_start(struct perf_event *event, int mode)</div><div class='hunk'>@@ -272,7 +273,7 @@ static int __init amd_power_pmu_init(void)</div><div class='ctx'> </div><div class='ctx'> 	cpu_pwr_sample_ratio = cpuid_ecx(0x80000007);</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &amp;max_cu_acc_power)) {</div><div class='add'>+	if (rdmsrq_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &amp;max_cu_acc_power)) {</div><div class='ctx'> 		pr_err("Failed to read max compute unit power accumulator MSR\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c<br/>index 49c26ce2b115..e8b6af199c73 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/amd/uncore.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/amd/uncore.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/amd/uncore.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/amd/uncore.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #define NUM_COUNTERS_NB		4</div><div class='ctx'> #define NUM_COUNTERS_L2		4</div><div class='ctx'> #define NUM_COUNTERS_L3		6</div><div class='add'>+#define NUM_COUNTERS_MAX	64</div><div class='ctx'> </div><div class='ctx'> #define RDPMC_BASE_NB		6</div><div class='ctx'> #define RDPMC_BASE_LLC		10</div><div class='hunk'>@@ -38,7 +39,10 @@ struct amd_uncore_ctx {</div><div class='ctx'> 	int refcnt;</div><div class='ctx'> 	int cpu;</div><div class='ctx'> 	struct perf_event **events;</div><div class='del'>-	struct hlist_node node;</div><div class='add'>+	unsigned long active_mask[BITS_TO_LONGS(NUM_COUNTERS_MAX)];</div><div class='add'>+	int nr_active;</div><div class='add'>+	struct hrtimer hrtimer;</div><div class='add'>+	u64 hrtimer_duration;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amd_uncore_pmu {</div><div class='hunk'>@@ -83,11 +87,51 @@ struct amd_uncore {</div><div class='ctx'> </div><div class='ctx'> static struct amd_uncore uncores[UNCORE_TYPE_MAX];</div><div class='ctx'> </div><div class='add'>+/* Interval for hrtimer, defaults to 60000 milliseconds */</div><div class='add'>+static unsigned int update_interval = 60 * MSEC_PER_SEC;</div><div class='add'>+module_param(update_interval, uint, 0444);</div><div class='add'>+</div><div class='ctx'> static struct amd_uncore_pmu *event_to_amd_uncore_pmu(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	return container_of(event-&gt;pmu, struct amd_uncore_pmu, pmu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static enum hrtimer_restart amd_uncore_hrtimer(struct hrtimer *hrtimer)</div><div class='add'>+{</div><div class='add'>+	struct amd_uncore_ctx *ctx;</div><div class='add'>+	struct perf_event *event;</div><div class='add'>+	int bit;</div><div class='add'>+</div><div class='add'>+	ctx = container_of(hrtimer, struct amd_uncore_ctx, hrtimer);</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;nr_active || ctx-&gt;cpu != smp_processor_id())</div><div class='add'>+		return HRTIMER_NORESTART;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(bit, ctx-&gt;active_mask, NUM_COUNTERS_MAX) {</div><div class='add'>+		event = ctx-&gt;events[bit];</div><div class='add'>+		event-&gt;pmu-&gt;read(event);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hrtimer_forward_now(hrtimer, ns_to_ktime(ctx-&gt;hrtimer_duration));</div><div class='add'>+	return HRTIMER_RESTART;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amd_uncore_start_hrtimer(struct amd_uncore_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	hrtimer_start(&amp;ctx-&gt;hrtimer, ns_to_ktime(ctx-&gt;hrtimer_duration),</div><div class='add'>+		      HRTIMER_MODE_REL_PINNED_HARD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amd_uncore_cancel_hrtimer(struct amd_uncore_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	hrtimer_cancel(&amp;ctx-&gt;hrtimer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amd_uncore_init_hrtimer(struct amd_uncore_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	hrtimer_setup(&amp;ctx-&gt;hrtimer, amd_uncore_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void amd_uncore_read(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='hunk'>@@ -106,9 +150,9 @@ static void amd_uncore_read(struct perf_event *event)</div><div class='ctx'> 	 * read counts directly from the corresponding PERF_CTR.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (hwc-&gt;event_base_rdpmc &lt; 0)</div><div class='del'>-		rdmsrl(hwc-&gt;event_base, new);</div><div class='add'>+		rdmsrq(hwc-&gt;event_base, new);</div><div class='ctx'> 	else</div><div class='del'>-		rdpmcl(hwc-&gt;event_base_rdpmc, new);</div><div class='add'>+		new = rdpmc(hwc-&gt;event_base_rdpmc);</div><div class='ctx'> </div><div class='ctx'> 	local64_set(&amp;hwc-&gt;prev_count, new);</div><div class='ctx'> 	delta = (new &lt;&lt; COUNTER_SHIFT) - (prev &lt;&lt; COUNTER_SHIFT);</div><div class='hunk'>@@ -118,27 +162,40 @@ static void amd_uncore_read(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> static void amd_uncore_start(struct perf_event *event, int flags)</div><div class='ctx'> {</div><div class='add'>+	struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event);</div><div class='add'>+	struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu-&gt;ctx, event-&gt;cpu);</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='add'>+	if (!ctx-&gt;nr_active++)</div><div class='add'>+		amd_uncore_start_hrtimer(ctx);</div><div class='add'>+</div><div class='ctx'> 	if (flags &amp; PERF_EF_RELOAD)</div><div class='del'>-		wrmsrl(hwc-&gt;event_base, (u64)local64_read(&amp;hwc-&gt;prev_count));</div><div class='add'>+		wrmsrq(hwc-&gt;event_base, (u64)local64_read(&amp;hwc-&gt;prev_count));</div><div class='ctx'> </div><div class='ctx'> 	hwc-&gt;state = 0;</div><div class='del'>-	wrmsrl(hwc-&gt;config_base, (hwc-&gt;config | ARCH_PERFMON_EVENTSEL_ENABLE));</div><div class='add'>+	__set_bit(hwc-&gt;idx, ctx-&gt;active_mask);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, (hwc-&gt;config | ARCH_PERFMON_EVENTSEL_ENABLE));</div><div class='ctx'> 	perf_event_update_userpage(event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void amd_uncore_stop(struct perf_event *event, int flags)</div><div class='ctx'> {</div><div class='add'>+	struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event);</div><div class='add'>+	struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu-&gt;ctx, event-&gt;cpu);</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config);</div><div class='ctx'> 	hwc-&gt;state |= PERF_HES_STOPPED;</div><div class='ctx'> </div><div class='ctx'> 	if ((flags &amp; PERF_EF_UPDATE) &amp;&amp; !(hwc-&gt;state &amp; PERF_HES_UPTODATE)) {</div><div class='ctx'> 		event-&gt;pmu-&gt;read(event);</div><div class='ctx'> 		hwc-&gt;state |= PERF_HES_UPTODATE;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (!--ctx-&gt;nr_active)</div><div class='add'>+		amd_uncore_cancel_hrtimer(ctx);</div><div class='add'>+</div><div class='add'>+	__clear_bit(hwc-&gt;idx, ctx-&gt;active_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amd_uncore_add(struct perf_event *event, int flags)</div><div class='hunk'>@@ -491,6 +548,9 @@ static int amd_uncore_ctx_init(struct amd_uncore *uncore, unsigned int cpu)</div><div class='ctx'> 				goto fail;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			amd_uncore_init_hrtimer(curr);</div><div class='add'>+			curr-&gt;hrtimer_duration = (u64)update_interval * NSEC_PER_MSEC;</div><div class='add'>+</div><div class='ctx'> 			cpumask_set_cpu(cpu, &amp;pmu-&gt;active_mask);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -880,16 +940,55 @@ static int amd_uncore_umc_event_init(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> static void amd_uncore_umc_start(struct perf_event *event, int flags)</div><div class='ctx'> {</div><div class='add'>+	struct amd_uncore_pmu *pmu = event_to_amd_uncore_pmu(event);</div><div class='add'>+	struct amd_uncore_ctx *ctx = *per_cpu_ptr(pmu-&gt;ctx, event-&gt;cpu);</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='add'>+	if (!ctx-&gt;nr_active++)</div><div class='add'>+		amd_uncore_start_hrtimer(ctx);</div><div class='add'>+</div><div class='ctx'> 	if (flags &amp; PERF_EF_RELOAD)</div><div class='del'>-		wrmsrl(hwc-&gt;event_base, (u64)local64_read(&amp;hwc-&gt;prev_count));</div><div class='add'>+		wrmsrq(hwc-&gt;event_base, (u64)local64_read(&amp;hwc-&gt;prev_count));</div><div class='ctx'> </div><div class='ctx'> 	hwc-&gt;state = 0;</div><div class='del'>-	wrmsrl(hwc-&gt;config_base, (hwc-&gt;config | AMD64_PERFMON_V2_ENABLE_UMC));</div><div class='add'>+	__set_bit(hwc-&gt;idx, ctx-&gt;active_mask);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, (hwc-&gt;config | AMD64_PERFMON_V2_ENABLE_UMC));</div><div class='ctx'> 	perf_event_update_userpage(event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void amd_uncore_umc_read(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+	u64 prev, new, shift;</div><div class='add'>+	s64 delta;</div><div class='add'>+</div><div class='add'>+	shift = COUNTER_SHIFT + 1;</div><div class='add'>+	prev = local64_read(&amp;hwc-&gt;prev_count);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * UMC counters do not have RDPMC assignments. Read counts directly</div><div class='add'>+	 * from the corresponding PERF_CTR.</div><div class='add'>+	 */</div><div class='add'>+	rdmsrl(hwc-&gt;event_base, new);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Unlike the other uncore counters, UMC counters saturate and set the</div><div class='add'>+	 * Overflow bit (bit 48) on overflow. Since they do not roll over,</div><div class='add'>+	 * proactively reset the corresponding PERF_CTR when bit 47 is set so</div><div class='add'>+	 * that the counter never gets a chance to saturate.</div><div class='add'>+	 */</div><div class='add'>+	if (new &amp; BIT_ULL(63 - COUNTER_SHIFT)) {</div><div class='add'>+		wrmsrl(hwc-&gt;event_base, 0);</div><div class='add'>+		local64_set(&amp;hwc-&gt;prev_count, 0);</div><div class='add'>+	} else {</div><div class='add'>+		local64_set(&amp;hwc-&gt;prev_count, new);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	delta = (new &lt;&lt; shift) - (prev &lt;&lt; shift);</div><div class='add'>+	delta &gt;&gt;= shift;</div><div class='add'>+	local64_add(delta, &amp;event-&gt;count);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static</div><div class='ctx'> void amd_uncore_umc_ctx_scan(struct amd_uncore *uncore, unsigned int cpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -968,7 +1067,7 @@ int amd_uncore_umc_ctx_init(struct amd_uncore *uncore, unsigned int cpu)</div><div class='ctx'> 				.del		= amd_uncore_del,</div><div class='ctx'> 				.start		= amd_uncore_umc_start,</div><div class='ctx'> 				.stop		= amd_uncore_stop,</div><div class='del'>-				.read		= amd_uncore_read,</div><div class='add'>+				.read		= amd_uncore_umc_read,</div><div class='ctx'> 				.capabilities	= PERF_PMU_CAP_NO_EXCLUDE | PERF_PMU_CAP_NO_INTERRUPT,</div><div class='ctx'> 				.module		= THIS_MODULE,</div><div class='ctx'> 			};</div><div class='head'>diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c<br/>index 6866cc5acb0b..7610f26dfbd9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/core.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='hunk'>@@ -95,6 +96,11 @@ DEFINE_STATIC_CALL_NULL(x86_pmu_filter, *x86_pmu.filter);</div><div class='ctx'> </div><div class='ctx'> DEFINE_STATIC_CALL_NULL(x86_pmu_late_setup, *x86_pmu.late_setup);</div><div class='ctx'> </div><div class='add'>+DEFINE_STATIC_CALL_NULL(x86_pmu_pebs_enable, *x86_pmu.pebs_enable);</div><div class='add'>+DEFINE_STATIC_CALL_NULL(x86_pmu_pebs_disable, *x86_pmu.pebs_disable);</div><div class='add'>+DEFINE_STATIC_CALL_NULL(x86_pmu_pebs_enable_all, *x86_pmu.pebs_enable_all);</div><div class='add'>+DEFINE_STATIC_CALL_NULL(x86_pmu_pebs_disable_all, *x86_pmu.pebs_disable_all);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This one is magic, it will get called even when PMU init fails (because</div><div class='ctx'>  * there is no PMU), in which case it should simply return NULL.</div><div class='hunk'>@@ -134,7 +140,7 @@ u64 x86_perf_event_update(struct perf_event *event)</div><div class='ctx'> 	 */</div><div class='ctx'> 	prev_raw_count = local64_read(&amp;hwc-&gt;prev_count);</div><div class='ctx'> 	do {</div><div class='del'>-		rdpmcl(hwc-&gt;event_base_rdpmc, new_raw_count);</div><div class='add'>+		new_raw_count = rdpmc(hwc-&gt;event_base_rdpmc);</div><div class='ctx'> 	} while (!local64_try_cmpxchg(&amp;hwc-&gt;prev_count,</div><div class='ctx'> 				      &amp;prev_raw_count, new_raw_count));</div><div class='ctx'> </div><div class='hunk'>@@ -269,7 +275,7 @@ bool check_hw_exists(struct pmu *pmu, unsigned long *cntr_mask,</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_set_bit(i, cntr_mask, X86_PMC_IDX_MAX) {</div><div class='ctx'> 		reg = x86_pmu_config_addr(i);</div><div class='del'>-		ret = rdmsrl_safe(reg, &amp;val);</div><div class='add'>+		ret = rdmsrq_safe(reg, &amp;val);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto msr_fail;</div><div class='ctx'> 		if (val &amp; ARCH_PERFMON_EVENTSEL_ENABLE) {</div><div class='hunk'>@@ -283,7 +289,7 @@ bool check_hw_exists(struct pmu *pmu, unsigned long *cntr_mask,</div><div class='ctx'> </div><div class='ctx'> 	if (*(u64 *)fixed_cntr_mask) {</div><div class='ctx'> 		reg = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;</div><div class='del'>-		ret = rdmsrl_safe(reg, &amp;val);</div><div class='add'>+		ret = rdmsrq_safe(reg, &amp;val);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto msr_fail;</div><div class='ctx'> 		for_each_set_bit(i, fixed_cntr_mask, X86_PMC_IDX_MAX) {</div><div class='hunk'>@@ -314,11 +320,11 @@ bool check_hw_exists(struct pmu *pmu, unsigned long *cntr_mask,</div><div class='ctx'> 	 * (qemu/kvm) that don't trap on the MSR access and always return 0s.</div><div class='ctx'> 	 */</div><div class='ctx'> 	reg = x86_pmu_event_addr(reg_safe);</div><div class='del'>-	if (rdmsrl_safe(reg, &amp;val))</div><div class='add'>+	if (rdmsrq_safe(reg, &amp;val))</div><div class='ctx'> 		goto msr_fail;</div><div class='ctx'> 	val ^= 0xffffUL;</div><div class='del'>-	ret = wrmsrl_safe(reg, val);</div><div class='del'>-	ret |= rdmsrl_safe(reg, &amp;val_new);</div><div class='add'>+	ret = wrmsrq_safe(reg, val);</div><div class='add'>+	ret |= rdmsrq_safe(reg, &amp;val_new);</div><div class='ctx'> 	if (ret || val != val_new)</div><div class='ctx'> 		goto msr_fail;</div><div class='ctx'> </div><div class='hunk'>@@ -629,7 +635,7 @@ int x86_pmu_hw_config(struct perf_event *event)</div><div class='ctx'> 	if (event-&gt;attr.type == event-&gt;pmu-&gt;type)</div><div class='ctx'> 		event-&gt;hw.config |= x86_pmu_get_event_config(event);</div><div class='ctx'> </div><div class='del'>-	if (!event-&gt;attr.freq &amp;&amp; x86_pmu.limit_period) {</div><div class='add'>+	if (is_sampling_event(event) &amp;&amp; !event-&gt;attr.freq &amp;&amp; x86_pmu.limit_period) {</div><div class='ctx'> 		s64 left = event-&gt;attr.sample_period;</div><div class='ctx'> 		x86_pmu.limit_period(event, &amp;left);</div><div class='ctx'> 		if (left &gt; event-&gt;attr.sample_period)</div><div class='hunk'>@@ -674,6 +680,7 @@ static int __x86_pmu_event_init(struct perf_event *event)</div><div class='ctx'> 	event-&gt;hw.idx = -1;</div><div class='ctx'> 	event-&gt;hw.last_cpu = -1;</div><div class='ctx'> 	event-&gt;hw.last_tag = ~0ULL;</div><div class='add'>+	event-&gt;hw.dyn_constraint = ~0ULL;</div><div class='ctx'> </div><div class='ctx'> 	/* mark unused */</div><div class='ctx'> 	event-&gt;hw.extra_reg.idx = EXTRA_REG_NONE;</div><div class='hunk'>@@ -693,13 +700,13 @@ void x86_pmu_disable_all(void)</div><div class='ctx'> </div><div class='ctx'> 		if (!test_bit(idx, cpuc-&gt;active_mask))</div><div class='ctx'> 			continue;</div><div class='del'>-		rdmsrl(x86_pmu_config_addr(idx), val);</div><div class='add'>+		rdmsrq(x86_pmu_config_addr(idx), val);</div><div class='ctx'> 		if (!(val &amp; ARCH_PERFMON_EVENTSEL_ENABLE))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		val &amp;= ~ARCH_PERFMON_EVENTSEL_ENABLE;</div><div class='del'>-		wrmsrl(x86_pmu_config_addr(idx), val);</div><div class='add'>+		wrmsrq(x86_pmu_config_addr(idx), val);</div><div class='ctx'> 		if (is_counter_pair(hwc))</div><div class='del'>-			wrmsrl(x86_pmu_config_addr(idx + 1), 0);</div><div class='add'>+			wrmsrq(x86_pmu_config_addr(idx + 1), 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -754,17 +761,18 @@ void x86_pmu_enable_all(int added)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int is_x86_event(struct perf_event *event)</div><div class='add'>+int is_x86_event(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!is_hybrid())</div><div class='del'>-		return event-&gt;pmu == &amp;pmu;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; x86_pmu.num_hybrid_pmus; i++) {</div><div class='del'>-		if (event-&gt;pmu == &amp;x86_pmu.hybrid_pmu[i].pmu)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='add'>+	/*</div><div class='add'>+	 * For a non-hybrid platforms, the type of X86 pmu is</div><div class='add'>+	 * always PERF_TYPE_RAW.</div><div class='add'>+	 * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE</div><div class='add'>+	 * is a unique capability for the X86 PMU.</div><div class='add'>+	 * Use them to detect a X86 event.</div><div class='add'>+	 */</div><div class='add'>+	if (event-&gt;pmu-&gt;type == PERF_TYPE_RAW ||</div><div class='add'>+	    event-&gt;pmu-&gt;capabilities &amp; PERF_PMU_CAP_EXTENDED_HW_TYPE)</div><div class='add'>+		return true;</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='hunk'>@@ -1420,14 +1428,14 @@ int x86_perf_event_set_period(struct perf_event *event)</div><div class='ctx'> 	 */</div><div class='ctx'> 	local64_set(&amp;hwc-&gt;prev_count, (u64)-left);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;event_base, (u64)(-left) &amp; x86_pmu.cntval_mask);</div><div class='add'>+	wrmsrq(hwc-&gt;event_base, (u64)(-left) &amp; x86_pmu.cntval_mask);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Sign extend the Merge event counter's upper 16 bits since</div><div class='ctx'> 	 * we currently declare a 48-bit counter width</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (is_counter_pair(hwc))</div><div class='del'>-		wrmsrl(x86_pmu_event_addr(idx + 1), 0xffff);</div><div class='add'>+		wrmsrq(x86_pmu_event_addr(idx + 1), 0xffff);</div><div class='ctx'> </div><div class='ctx'> 	perf_event_update_userpage(event);</div><div class='ctx'> </div><div class='hunk'>@@ -1550,10 +1558,10 @@ void perf_event_print_debug(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (x86_pmu.version &gt;= 2) {</div><div class='del'>-		rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);</div><div class='del'>-		rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);</div><div class='del'>-		rdmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow);</div><div class='del'>-		rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed);</div><div class='add'>+		rdmsrq(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);</div><div class='add'>+		rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, status);</div><div class='add'>+		rdmsrq(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow);</div><div class='add'>+		rdmsrq(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed);</div><div class='ctx'> </div><div class='ctx'> 		pr_info("\n");</div><div class='ctx'> 		pr_info("CPU#%d: ctrl:       %016llx\n", cpu, ctrl);</div><div class='hunk'>@@ -1561,19 +1569,19 @@ void perf_event_print_debug(void)</div><div class='ctx'> 		pr_info("CPU#%d: overflow:   %016llx\n", cpu, overflow);</div><div class='ctx'> 		pr_info("CPU#%d: fixed:      %016llx\n", cpu, fixed);</div><div class='ctx'> 		if (pebs_constraints) {</div><div class='del'>-			rdmsrl(MSR_IA32_PEBS_ENABLE, pebs);</div><div class='add'>+			rdmsrq(MSR_IA32_PEBS_ENABLE, pebs);</div><div class='ctx'> 			pr_info("CPU#%d: pebs:       %016llx\n", cpu, pebs);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (x86_pmu.lbr_nr) {</div><div class='del'>-			rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+			rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> 			pr_info("CPU#%d: debugctl:   %016llx\n", cpu, debugctl);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	pr_info("CPU#%d: active:     %016llx\n", cpu, *(u64 *)cpuc-&gt;active_mask);</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(idx, cntr_mask, X86_PMC_IDX_MAX) {</div><div class='del'>-		rdmsrl(x86_pmu_config_addr(idx), pmc_ctrl);</div><div class='del'>-		rdmsrl(x86_pmu_event_addr(idx), pmc_count);</div><div class='add'>+		rdmsrq(x86_pmu_config_addr(idx), pmc_ctrl);</div><div class='add'>+		rdmsrq(x86_pmu_event_addr(idx), pmc_count);</div><div class='ctx'> </div><div class='ctx'> 		prev_left = per_cpu(pmc_prev_left[idx], cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -1587,7 +1595,7 @@ void perf_event_print_debug(void)</div><div class='ctx'> 	for_each_set_bit(idx, fixed_cntr_mask, X86_PMC_IDX_MAX) {</div><div class='ctx'> 		if (fixed_counter_disabled(idx, cpuc-&gt;pmu))</div><div class='ctx'> 			continue;</div><div class='del'>-		rdmsrl(x86_pmu_fixed_ctr_addr(idx), pmc_count);</div><div class='add'>+		rdmsrq(x86_pmu_fixed_ctr_addr(idx), pmc_count);</div><div class='ctx'> </div><div class='ctx'> 		pr_info("CPU#%d: fixed-PMC%d count: %016llx\n",</div><div class='ctx'> 			cpu, idx, pmc_count);</div><div class='hunk'>@@ -1683,6 +1691,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 	struct cpu_hw_events *cpuc;</div><div class='ctx'> 	struct perf_event *event;</div><div class='ctx'> 	int idx, handled = 0;</div><div class='add'>+	u64 last_period;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='hunk'>@@ -1702,6 +1711,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		event = cpuc-&gt;events[idx];</div><div class='add'>+		last_period = event-&gt;hw.last_period;</div><div class='ctx'> </div><div class='ctx'> 		val = static_call(x86_pmu_update)(event);</div><div class='ctx'> 		if (val &amp; (1ULL &lt;&lt; (x86_pmu.cntval_bits - 1)))</div><div class='hunk'>@@ -1715,12 +1725,11 @@ int x86_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 		if (!static_call(x86_pmu_set_period)(event))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, last_period);</div><div class='ctx'> </div><div class='ctx'> 		perf_sample_save_brstack(&amp;data, event, &amp;cpuc-&gt;lbr_stack, NULL);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (handled)</div><div class='hunk'>@@ -2046,6 +2055,11 @@ static void x86_pmu_static_call_update(void)</div><div class='ctx'> 	static_call_update(x86_pmu_filter, x86_pmu.filter);</div><div class='ctx'> </div><div class='ctx'> 	static_call_update(x86_pmu_late_setup, x86_pmu.late_setup);</div><div class='add'>+</div><div class='add'>+	static_call_update(x86_pmu_pebs_enable, x86_pmu.pebs_enable);</div><div class='add'>+	static_call_update(x86_pmu_pebs_disable, x86_pmu.pebs_disable);</div><div class='add'>+	static_call_update(x86_pmu_pebs_enable_all, x86_pmu.pebs_enable_all);</div><div class='add'>+	static_call_update(x86_pmu_pebs_disable_all, x86_pmu.pebs_disable_all);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void _x86_pmu_read(struct perf_event *event)</div><div class='hunk'>@@ -2496,9 +2510,9 @@ void perf_clear_dirty_counters(void)</div><div class='ctx'> 			if (!test_bit(i - INTEL_PMC_IDX_FIXED, hybrid(cpuc-&gt;pmu, fixed_cntr_mask)))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			wrmsrl(x86_pmu_fixed_ctr_addr(i - INTEL_PMC_IDX_FIXED), 0);</div><div class='add'>+			wrmsrq(x86_pmu_fixed_ctr_addr(i - INTEL_PMC_IDX_FIXED), 0);</div><div class='ctx'> 		} else {</div><div class='del'>-			wrmsrl(x86_pmu_event_addr(i), 0);</div><div class='add'>+			wrmsrq(x86_pmu_event_addr(i), 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2803,8 +2817,15 @@ static unsigned long get_segment_base(unsigned int segment)</div><div class='ctx'> #ifdef CONFIG_MODIFY_LDT_SYSCALL</div><div class='ctx'> 		struct ldt_struct *ldt;</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * If we're not in a valid context with a real (not just lazy)</div><div class='add'>+		 * user mm, then don't even try.</div><div class='add'>+		 */</div><div class='add'>+		if (!nmi_uaccess_okay())</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='ctx'> 		/* IRQs are off, so this synchronizes with smp_store_release */</div><div class='del'>-		ldt = READ_ONCE(current-&gt;active_mm-&gt;context.ldt);</div><div class='add'>+		ldt = smp_load_acquire(&amp;current-&gt;mm-&gt;context.ldt);</div><div class='ctx'> 		if (!ldt || idx &gt;= ldt-&gt;nr_entries)</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c<br/>index a95e6c91c4d7..61da6b8a3d51 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/bts.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/bts.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/bts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/bts.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='hunk'>@@ -80,54 +81,54 @@ static void *</div><div class='ctx'> bts_buffer_setup_aux(struct perf_event *event, void **pages,</div><div class='ctx'> 		     int nr_pages, bool overwrite)</div><div class='ctx'> {</div><div class='del'>-	struct bts_buffer *buf;</div><div class='add'>+	struct bts_buffer *bb;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	int cpu = event-&gt;cpu;</div><div class='ctx'> 	int node = (cpu == -1) ? cpu : cpu_to_node(cpu);</div><div class='ctx'> 	unsigned long offset;</div><div class='ctx'> 	size_t size = nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	int pg, nbuf, pad;</div><div class='add'>+	int pg, nr_buf, pad;</div><div class='ctx'> </div><div class='ctx'> 	/* count all the high order buffers */</div><div class='del'>-	for (pg = 0, nbuf = 0; pg &lt; nr_pages;) {</div><div class='add'>+	for (pg = 0, nr_buf = 0; pg &lt; nr_pages;) {</div><div class='ctx'> 		page = virt_to_page(pages[pg]);</div><div class='ctx'> 		pg += buf_nr_pages(page);</div><div class='del'>-		nbuf++;</div><div class='add'>+		nr_buf++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * to avoid interrupts in overwrite mode, only allow one physical</div><div class='ctx'> 	 */</div><div class='del'>-	if (overwrite &amp;&amp; nbuf &gt; 1)</div><div class='add'>+	if (overwrite &amp;&amp; nr_buf &gt; 1)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	buf = kzalloc_node(offsetof(struct bts_buffer, buf[nbuf]), GFP_KERNEL, node);</div><div class='del'>-	if (!buf)</div><div class='add'>+	bb = kzalloc_node(struct_size(bb, buf, nr_buf), GFP_KERNEL, node);</div><div class='add'>+	if (!bb)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	buf-&gt;nr_pages = nr_pages;</div><div class='del'>-	buf-&gt;nr_bufs = nbuf;</div><div class='del'>-	buf-&gt;snapshot = overwrite;</div><div class='del'>-	buf-&gt;data_pages = pages;</div><div class='del'>-	buf-&gt;real_size = size - size % BTS_RECORD_SIZE;</div><div class='add'>+	bb-&gt;nr_pages = nr_pages;</div><div class='add'>+	bb-&gt;nr_bufs = nr_buf;</div><div class='add'>+	bb-&gt;snapshot = overwrite;</div><div class='add'>+	bb-&gt;data_pages = pages;</div><div class='add'>+	bb-&gt;real_size = size - size % BTS_RECORD_SIZE;</div><div class='ctx'> </div><div class='del'>-	for (pg = 0, nbuf = 0, offset = 0, pad = 0; nbuf &lt; buf-&gt;nr_bufs; nbuf++) {</div><div class='add'>+	for (pg = 0, nr_buf = 0, offset = 0, pad = 0; nr_buf &lt; bb-&gt;nr_bufs; nr_buf++) {</div><div class='ctx'> 		unsigned int __nr_pages;</div><div class='ctx'> </div><div class='ctx'> 		page = virt_to_page(pages[pg]);</div><div class='ctx'> 		__nr_pages = buf_nr_pages(page);</div><div class='del'>-		buf-&gt;buf[nbuf].page = page;</div><div class='del'>-		buf-&gt;buf[nbuf].offset = offset;</div><div class='del'>-		buf-&gt;buf[nbuf].displacement = (pad ? BTS_RECORD_SIZE - pad : 0);</div><div class='del'>-		buf-&gt;buf[nbuf].size = buf_size(page) - buf-&gt;buf[nbuf].displacement;</div><div class='del'>-		pad = buf-&gt;buf[nbuf].size % BTS_RECORD_SIZE;</div><div class='del'>-		buf-&gt;buf[nbuf].size -= pad;</div><div class='add'>+		bb-&gt;buf[nr_buf].page = page;</div><div class='add'>+		bb-&gt;buf[nr_buf].offset = offset;</div><div class='add'>+		bb-&gt;buf[nr_buf].displacement = (pad ? BTS_RECORD_SIZE - pad : 0);</div><div class='add'>+		bb-&gt;buf[nr_buf].size = buf_size(page) - bb-&gt;buf[nr_buf].displacement;</div><div class='add'>+		pad = bb-&gt;buf[nr_buf].size % BTS_RECORD_SIZE;</div><div class='add'>+		bb-&gt;buf[nr_buf].size -= pad;</div><div class='ctx'> </div><div class='ctx'> 		pg += __nr_pages;</div><div class='ctx'> 		offset += __nr_pages &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return buf;</div><div class='add'>+	return bb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bts_buffer_free_aux(void *data)</div><div class='hunk'>@@ -135,25 +136,25 @@ static void bts_buffer_free_aux(void *data)</div><div class='ctx'> 	kfree(data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long bts_buffer_offset(struct bts_buffer *buf, unsigned int idx)</div><div class='add'>+static unsigned long bts_buffer_offset(struct bts_buffer *bb, unsigned int idx)</div><div class='ctx'> {</div><div class='del'>-	return buf-&gt;buf[idx].offset + buf-&gt;buf[idx].displacement;</div><div class='add'>+	return bb-&gt;buf[idx].offset + bb-&gt;buf[idx].displacement;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-bts_config_buffer(struct bts_buffer *buf)</div><div class='add'>+bts_config_buffer(struct bts_buffer *bb)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu = raw_smp_processor_id();</div><div class='ctx'> 	struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;</div><div class='del'>-	struct bts_phys *phys = &amp;buf-&gt;buf[buf-&gt;cur_buf];</div><div class='add'>+	struct bts_phys *phys = &amp;bb-&gt;buf[bb-&gt;cur_buf];</div><div class='ctx'> 	unsigned long index, thresh = 0, end = phys-&gt;size;</div><div class='ctx'> 	struct page *page = phys-&gt;page;</div><div class='ctx'> </div><div class='del'>-	index = local_read(&amp;buf-&gt;head);</div><div class='add'>+	index = local_read(&amp;bb-&gt;head);</div><div class='ctx'> </div><div class='del'>-	if (!buf-&gt;snapshot) {</div><div class='del'>-		if (buf-&gt;end &lt; phys-&gt;offset + buf_size(page))</div><div class='del'>-			end = buf-&gt;end - phys-&gt;offset - phys-&gt;displacement;</div><div class='add'>+	if (!bb-&gt;snapshot) {</div><div class='add'>+		if (bb-&gt;end &lt; phys-&gt;offset + buf_size(page))</div><div class='add'>+			end = bb-&gt;end - phys-&gt;offset - phys-&gt;displacement;</div><div class='ctx'> </div><div class='ctx'> 		index -= phys-&gt;offset + phys-&gt;displacement;</div><div class='ctx'> </div><div class='hunk'>@@ -168,7 +169,7 @@ bts_config_buffer(struct bts_buffer *buf)</div><div class='ctx'> 	ds-&gt;bts_buffer_base = (u64)(long)page_address(page) + phys-&gt;displacement;</div><div class='ctx'> 	ds-&gt;bts_index = ds-&gt;bts_buffer_base + index;</div><div class='ctx'> 	ds-&gt;bts_absolute_maximum = ds-&gt;bts_buffer_base + end;</div><div class='del'>-	ds-&gt;bts_interrupt_threshold = !buf-&gt;snapshot</div><div class='add'>+	ds-&gt;bts_interrupt_threshold = !bb-&gt;snapshot</div><div class='ctx'> 		? ds-&gt;bts_buffer_base + thresh</div><div class='ctx'> 		: ds-&gt;bts_absolute_maximum + BTS_RECORD_SIZE;</div><div class='ctx'> }</div><div class='hunk'>@@ -184,16 +185,16 @@ static void bts_update(struct bts_ctx *bts)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu = raw_smp_processor_id();</div><div class='ctx'> 	struct debug_store *ds = per_cpu(cpu_hw_events, cpu).ds;</div><div class='del'>-	struct bts_buffer *buf = perf_get_aux(&amp;bts-&gt;handle);</div><div class='add'>+	struct bts_buffer *bb = perf_get_aux(&amp;bts-&gt;handle);</div><div class='ctx'> 	unsigned long index = ds-&gt;bts_index - ds-&gt;bts_buffer_base, old, head;</div><div class='ctx'> </div><div class='del'>-	if (!buf)</div><div class='add'>+	if (!bb)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	head = index + bts_buffer_offset(buf, buf-&gt;cur_buf);</div><div class='del'>-	old = local_xchg(&amp;buf-&gt;head, head);</div><div class='add'>+	head = index + bts_buffer_offset(bb, bb-&gt;cur_buf);</div><div class='add'>+	old = local_xchg(&amp;bb-&gt;head, head);</div><div class='ctx'> </div><div class='del'>-	if (!buf-&gt;snapshot) {</div><div class='add'>+	if (!bb-&gt;snapshot) {</div><div class='ctx'> 		if (old == head)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='hunk'>@@ -205,9 +206,9 @@ static void bts_update(struct bts_ctx *bts)</div><div class='ctx'> 		 * old and head are always in the same physical buffer, so we</div><div class='ctx'> 		 * can subtract them to get the data size.</div><div class='ctx'> 		 */</div><div class='del'>-		local_add(head - old, &amp;buf-&gt;data_size);</div><div class='add'>+		local_add(head - old, &amp;bb-&gt;data_size);</div><div class='ctx'> 	} else {</div><div class='del'>-		local_set(&amp;buf-&gt;data_size, head);</div><div class='add'>+		local_set(&amp;bb-&gt;data_size, head);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -218,7 +219,7 @@ static void bts_update(struct bts_ctx *bts)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-bts_buffer_reset(struct bts_buffer *buf, struct perf_output_handle *handle);</div><div class='add'>+bts_buffer_reset(struct bts_buffer *bb, struct perf_output_handle *handle);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Ordering PMU callbacks wrt themselves and the PMI is done by means</div><div class='hunk'>@@ -232,17 +233,17 @@ bts_buffer_reset(struct bts_buffer *buf, struct perf_output_handle *handle);</div><div class='ctx'> static void __bts_event_start(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	struct bts_ctx *bts = this_cpu_ptr(bts_ctx);</div><div class='del'>-	struct bts_buffer *buf = perf_get_aux(&amp;bts-&gt;handle);</div><div class='add'>+	struct bts_buffer *bb = perf_get_aux(&amp;bts-&gt;handle);</div><div class='ctx'> 	u64 config = 0;</div><div class='ctx'> </div><div class='del'>-	if (!buf-&gt;snapshot)</div><div class='add'>+	if (!bb-&gt;snapshot)</div><div class='ctx'> 		config |= ARCH_PERFMON_EVENTSEL_INT;</div><div class='ctx'> 	if (!event-&gt;attr.exclude_kernel)</div><div class='ctx'> 		config |= ARCH_PERFMON_EVENTSEL_OS;</div><div class='ctx'> 	if (!event-&gt;attr.exclude_user)</div><div class='ctx'> 		config |= ARCH_PERFMON_EVENTSEL_USR;</div><div class='ctx'> </div><div class='del'>-	bts_config_buffer(buf);</div><div class='add'>+	bts_config_buffer(bb);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * local barrier to make sure that ds configuration made it</div><div class='hunk'>@@ -261,13 +262,13 @@ static void bts_event_start(struct perf_event *event, int flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct bts_ctx *bts = this_cpu_ptr(bts_ctx);</div><div class='del'>-	struct bts_buffer *buf;</div><div class='add'>+	struct bts_buffer *bb;</div><div class='ctx'> </div><div class='del'>-	buf = perf_aux_output_begin(&amp;bts-&gt;handle, event);</div><div class='del'>-	if (!buf)</div><div class='add'>+	bb = perf_aux_output_begin(&amp;bts-&gt;handle, event);</div><div class='add'>+	if (!bb)</div><div class='ctx'> 		goto fail_stop;</div><div class='ctx'> </div><div class='del'>-	if (bts_buffer_reset(buf, &amp;bts-&gt;handle))</div><div class='add'>+	if (bts_buffer_reset(bb, &amp;bts-&gt;handle))</div><div class='ctx'> 		goto fail_end_stop;</div><div class='ctx'> </div><div class='ctx'> 	bts-&gt;ds_back.bts_buffer_base = cpuc-&gt;ds-&gt;bts_buffer_base;</div><div class='hunk'>@@ -306,27 +307,27 @@ static void bts_event_stop(struct perf_event *event, int flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct bts_ctx *bts = this_cpu_ptr(bts_ctx);</div><div class='del'>-	struct bts_buffer *buf = NULL;</div><div class='add'>+	struct bts_buffer *bb = NULL;</div><div class='ctx'> 	int state = READ_ONCE(bts-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	if (state == BTS_STATE_ACTIVE)</div><div class='ctx'> 		__bts_event_stop(event, BTS_STATE_STOPPED);</div><div class='ctx'> </div><div class='ctx'> 	if (state != BTS_STATE_STOPPED)</div><div class='del'>-		buf = perf_get_aux(&amp;bts-&gt;handle);</div><div class='add'>+		bb = perf_get_aux(&amp;bts-&gt;handle);</div><div class='ctx'> </div><div class='ctx'> 	event-&gt;hw.state |= PERF_HES_STOPPED;</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; PERF_EF_UPDATE) {</div><div class='ctx'> 		bts_update(bts);</div><div class='ctx'> </div><div class='del'>-		if (buf) {</div><div class='del'>-			if (buf-&gt;snapshot)</div><div class='add'>+		if (bb) {</div><div class='add'>+			if (bb-&gt;snapshot)</div><div class='ctx'> 				bts-&gt;handle.head =</div><div class='del'>-					local_xchg(&amp;buf-&gt;data_size,</div><div class='del'>-						   buf-&gt;nr_pages &lt;&lt; PAGE_SHIFT);</div><div class='add'>+					local_xchg(&amp;bb-&gt;data_size,</div><div class='add'>+						   bb-&gt;nr_pages &lt;&lt; PAGE_SHIFT);</div><div class='ctx'> 			perf_aux_output_end(&amp;bts-&gt;handle,</div><div class='del'>-			                    local_xchg(&amp;buf-&gt;data_size, 0));</div><div class='add'>+					    local_xchg(&amp;bb-&gt;data_size, 0));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		cpuc-&gt;ds-&gt;bts_index = bts-&gt;ds_back.bts_buffer_base;</div><div class='hunk'>@@ -382,19 +383,19 @@ void intel_bts_disable_local(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-bts_buffer_reset(struct bts_buffer *buf, struct perf_output_handle *handle)</div><div class='add'>+bts_buffer_reset(struct bts_buffer *bb, struct perf_output_handle *handle)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long head, space, next_space, pad, gap, skip, wakeup;</div><div class='ctx'> 	unsigned int next_buf;</div><div class='ctx'> 	struct bts_phys *phys, *next_phys;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (buf-&gt;snapshot)</div><div class='add'>+	if (bb-&gt;snapshot)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	head = handle-&gt;head &amp; ((buf-&gt;nr_pages &lt;&lt; PAGE_SHIFT) - 1);</div><div class='add'>+	head = handle-&gt;head &amp; ((bb-&gt;nr_pages &lt;&lt; PAGE_SHIFT) - 1);</div><div class='ctx'> </div><div class='del'>-	phys = &amp;buf-&gt;buf[buf-&gt;cur_buf];</div><div class='add'>+	phys = &amp;bb-&gt;buf[bb-&gt;cur_buf];</div><div class='ctx'> 	space = phys-&gt;offset + phys-&gt;displacement + phys-&gt;size - head;</div><div class='ctx'> 	pad = space;</div><div class='ctx'> 	if (space &gt; handle-&gt;size) {</div><div class='hunk'>@@ -403,10 +404,10 @@ bts_buffer_reset(struct bts_buffer *buf, struct perf_output_handle *handle)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (space &lt;= BTS_SAFETY_MARGIN) {</div><div class='ctx'> 		/* See if next phys buffer has more space */</div><div class='del'>-		next_buf = buf-&gt;cur_buf + 1;</div><div class='del'>-		if (next_buf &gt;= buf-&gt;nr_bufs)</div><div class='add'>+		next_buf = bb-&gt;cur_buf + 1;</div><div class='add'>+		if (next_buf &gt;= bb-&gt;nr_bufs)</div><div class='ctx'> 			next_buf = 0;</div><div class='del'>-		next_phys = &amp;buf-&gt;buf[next_buf];</div><div class='add'>+		next_phys = &amp;bb-&gt;buf[next_buf];</div><div class='ctx'> 		gap = buf_size(phys-&gt;page) - phys-&gt;displacement - phys-&gt;size +</div><div class='ctx'> 		      next_phys-&gt;displacement;</div><div class='ctx'> 		skip = pad + gap;</div><div class='hunk'>@@ -431,8 +432,8 @@ bts_buffer_reset(struct bts_buffer *buf, struct perf_output_handle *handle)</div><div class='ctx'> 				 * anymore, so we must not be racing with</div><div class='ctx'> 				 * bts_update().</div><div class='ctx'> 				 */</div><div class='del'>-				buf-&gt;cur_buf = next_buf;</div><div class='del'>-				local_set(&amp;buf-&gt;head, head);</div><div class='add'>+				bb-&gt;cur_buf = next_buf;</div><div class='add'>+				local_set(&amp;bb-&gt;head, head);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -445,7 +446,7 @@ bts_buffer_reset(struct bts_buffer *buf, struct perf_output_handle *handle)</div><div class='ctx'> 		space -= space % BTS_RECORD_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	buf-&gt;end = head + space;</div><div class='add'>+	bb-&gt;end = head + space;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If we have no space, the lost notification would have been sent when</div><div class='hunk'>@@ -462,7 +463,7 @@ int intel_bts_interrupt(void)</div><div class='ctx'> 	struct debug_store *ds = this_cpu_ptr(&amp;cpu_hw_events)-&gt;ds;</div><div class='ctx'> 	struct bts_ctx *bts;</div><div class='ctx'> 	struct perf_event *event;</div><div class='del'>-	struct bts_buffer *buf;</div><div class='add'>+	struct bts_buffer *bb;</div><div class='ctx'> 	s64 old_head;</div><div class='ctx'> 	int err = -ENOSPC, handled = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -485,8 +486,8 @@ int intel_bts_interrupt(void)</div><div class='ctx'> 	if (READ_ONCE(bts-&gt;state) == BTS_STATE_STOPPED)</div><div class='ctx'> 		return handled;</div><div class='ctx'> </div><div class='del'>-	buf = perf_get_aux(&amp;bts-&gt;handle);</div><div class='del'>-	if (!buf)</div><div class='add'>+	bb = perf_get_aux(&amp;bts-&gt;handle);</div><div class='add'>+	if (!bb)</div><div class='ctx'> 		return handled;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -494,26 +495,26 @@ int intel_bts_interrupt(void)</div><div class='ctx'> 	 * there's no other way of telling, because the pointer will</div><div class='ctx'> 	 * keep moving</div><div class='ctx'> 	 */</div><div class='del'>-	if (buf-&gt;snapshot)</div><div class='add'>+	if (bb-&gt;snapshot)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	old_head = local_read(&amp;buf-&gt;head);</div><div class='add'>+	old_head = local_read(&amp;bb-&gt;head);</div><div class='ctx'> 	bts_update(bts);</div><div class='ctx'> </div><div class='ctx'> 	/* no new data */</div><div class='del'>-	if (old_head == local_read(&amp;buf-&gt;head))</div><div class='add'>+	if (old_head == local_read(&amp;bb-&gt;head))</div><div class='ctx'> 		return handled;</div><div class='ctx'> </div><div class='del'>-	perf_aux_output_end(&amp;bts-&gt;handle, local_xchg(&amp;buf-&gt;data_size, 0));</div><div class='add'>+	perf_aux_output_end(&amp;bts-&gt;handle, local_xchg(&amp;bb-&gt;data_size, 0));</div><div class='ctx'> </div><div class='del'>-	buf = perf_aux_output_begin(&amp;bts-&gt;handle, event);</div><div class='del'>-	if (buf)</div><div class='del'>-		err = bts_buffer_reset(buf, &amp;bts-&gt;handle);</div><div class='add'>+	bb = perf_aux_output_begin(&amp;bts-&gt;handle, event);</div><div class='add'>+	if (bb)</div><div class='add'>+		err = bts_buffer_reset(bb, &amp;bts-&gt;handle);</div><div class='ctx'> </div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		WRITE_ONCE(bts-&gt;state, BTS_STATE_STOPPED);</div><div class='ctx'> </div><div class='del'>-		if (buf) {</div><div class='add'>+		if (bb) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * BTS_STATE_STOPPED should be visible before</div><div class='ctx'> 			 * cleared handle::event</div><div class='hunk'>@@ -599,7 +600,11 @@ static void bts_event_read(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> static __init int bts_init(void)</div><div class='ctx'> {</div><div class='del'>-	if (!boot_cpu_has(X86_FEATURE_DTES64) || !x86_pmu.bts)</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_DTES64))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS);</div><div class='add'>+	if (!x86_pmu.bts)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_PTI)) {</div><div class='head'>diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c<br/>index 09d2d66c9f21..466283326630 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/core.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;asm/intel_pt.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='hunk'>@@ -2224,6 +2225,18 @@ static struct extra_reg intel_cmt_extra_regs[] __read_mostly = {</div><div class='ctx'> 	EVENT_EXTRA_END</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+EVENT_ATTR_STR(topdown-fe-bound,       td_fe_bound_skt,        "event=0x9c,umask=0x01");</div><div class='add'>+EVENT_ATTR_STR(topdown-retiring,       td_retiring_skt,        "event=0xc2,umask=0x02");</div><div class='add'>+EVENT_ATTR_STR(topdown-be-bound,       td_be_bound_skt,        "event=0xa4,umask=0x02");</div><div class='add'>+</div><div class='add'>+static struct attribute *skt_events_attrs[] = {</div><div class='add'>+	EVENT_PTR(td_fe_bound_skt),</div><div class='add'>+	EVENT_PTR(td_retiring_skt),</div><div class='add'>+	EVENT_PTR(td_bad_spec_cmt),</div><div class='add'>+	EVENT_PTR(td_be_bound_skt),</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define KNL_OT_L2_HITE		BIT_ULL(19) /* Other Tile L2 Hit */</div><div class='ctx'> #define KNL_OT_L2_HITF		BIT_ULL(20) /* Other Tile L2 Hit */</div><div class='ctx'> #define KNL_MCDRAM_LOCAL	BIT_ULL(21)</div><div class='hunk'>@@ -2285,7 +2298,7 @@ static __always_inline void __intel_pmu_disable_all(bool bts)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_CTRL, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (bts &amp;&amp; test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc-&gt;active_mask))</div><div class='ctx'> 		intel_pmu_disable_bts();</div><div class='hunk'>@@ -2294,7 +2307,7 @@ static __always_inline void __intel_pmu_disable_all(bool bts)</div><div class='ctx'> static __always_inline void intel_pmu_disable_all(void)</div><div class='ctx'> {</div><div class='ctx'> 	__intel_pmu_disable_all(true);</div><div class='del'>-	intel_pmu_pebs_disable_all();</div><div class='add'>+	static_call_cond(x86_pmu_pebs_disable_all)();</div><div class='ctx'> 	intel_pmu_lbr_disable_all();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2306,11 +2319,11 @@ static void __intel_pmu_enable_all(int added, bool pmi)</div><div class='ctx'> 	intel_pmu_lbr_enable_all(pmi);</div><div class='ctx'> </div><div class='ctx'> 	if (cpuc-&gt;fixed_ctrl_val != cpuc-&gt;active_fixed_ctrl_val) {</div><div class='del'>-		wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, cpuc-&gt;fixed_ctrl_val);</div><div class='add'>+		wrmsrq(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, cpuc-&gt;fixed_ctrl_val);</div><div class='ctx'> 		cpuc-&gt;active_fixed_ctrl_val = cpuc-&gt;fixed_ctrl_val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL,</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_CTRL,</div><div class='ctx'> 	       intel_ctrl &amp; ~cpuc-&gt;intel_ctrl_guest_mask);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc-&gt;active_mask)) {</div><div class='hunk'>@@ -2326,7 +2339,7 @@ static void __intel_pmu_enable_all(int added, bool pmi)</div><div class='ctx'> </div><div class='ctx'> static void intel_pmu_enable_all(int added)</div><div class='ctx'> {</div><div class='del'>-	intel_pmu_pebs_enable_all();</div><div class='add'>+	static_call_cond(x86_pmu_pebs_enable_all)();</div><div class='ctx'> 	__intel_pmu_enable_all(added, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2426,12 +2439,12 @@ static void intel_pmu_nhm_workaround(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		wrmsrl(MSR_ARCH_PERFMON_EVENTSEL0 + i, nhm_magic[i]);</div><div class='del'>-		wrmsrl(MSR_ARCH_PERFMON_PERFCTR0 + i, 0x0);</div><div class='add'>+		wrmsrq(MSR_ARCH_PERFMON_EVENTSEL0 + i, nhm_magic[i]);</div><div class='add'>+		wrmsrq(MSR_ARCH_PERFMON_PERFCTR0 + i, 0x0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0xf);</div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0x0);</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_CTRL, 0xf);</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_CTRL, 0x0);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 4; i++) {</div><div class='ctx'> 		event = cpuc-&gt;events[i];</div><div class='hunk'>@@ -2441,7 +2454,7 @@ static void intel_pmu_nhm_workaround(void)</div><div class='ctx'> 			__x86_pmu_enable_event(&amp;event-&gt;hw,</div><div class='ctx'> 					ARCH_PERFMON_EVENTSEL_ENABLE);</div><div class='ctx'> 		} else</div><div class='del'>-			wrmsrl(MSR_ARCH_PERFMON_EVENTSEL0 + i, 0x0);</div><div class='add'>+			wrmsrq(MSR_ARCH_PERFMON_EVENTSEL0 + i, 0x0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2458,7 +2471,7 @@ static void intel_set_tfa(struct cpu_hw_events *cpuc, bool on)</div><div class='ctx'> </div><div class='ctx'> 	if (cpuc-&gt;tfa_shadow != val) {</div><div class='ctx'> 		cpuc-&gt;tfa_shadow = val;</div><div class='del'>-		wrmsrl(MSR_TSX_FORCE_ABORT, val);</div><div class='add'>+		wrmsrq(MSR_TSX_FORCE_ABORT, val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2489,14 +2502,14 @@ static inline u64 intel_pmu_get_status(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 status;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);</div><div class='add'>+	rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, status);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void intel_pmu_ack_status(u64 ack)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool event_is_checkpointed(struct perf_event *event)</div><div class='hunk'>@@ -2583,7 +2596,7 @@ static void intel_pmu_disable_event(struct perf_event *event)</div><div class='ctx'> 	 * so we don't trigger the event without PEBS bit set.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (unlikely(event-&gt;attr.precise_ip))</div><div class='del'>-		intel_pmu_pebs_disable(event);</div><div class='add'>+		static_call(x86_pmu_pebs_disable)(event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pmu_assign_event(struct perf_event *event, int idx)</div><div class='hunk'>@@ -2603,6 +2616,9 @@ static void intel_pmu_del_event(struct perf_event *event)</div><div class='ctx'> 		intel_pmu_lbr_del(event);</div><div class='ctx'> 	if (event-&gt;attr.precise_ip)</div><div class='ctx'> 		intel_pmu_pebs_del(event);</div><div class='add'>+	if (is_pebs_counter_event_group(event) ||</div><div class='add'>+	    is_acr_event_group(event))</div><div class='add'>+		this_cpu_ptr(&amp;cpu_hw_events)-&gt;n_late_setup--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int icl_set_topdown_event_period(struct perf_event *event)</div><div class='hunk'>@@ -2619,15 +2635,15 @@ static int icl_set_topdown_event_period(struct perf_event *event)</div><div class='ctx'> 	 * Don't need to clear them again.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (left == x86_pmu.max_period) {</div><div class='del'>-		wrmsrl(MSR_CORE_PERF_FIXED_CTR3, 0);</div><div class='del'>-		wrmsrl(MSR_PERF_METRICS, 0);</div><div class='add'>+		wrmsrq(MSR_CORE_PERF_FIXED_CTR3, 0);</div><div class='add'>+		wrmsrq(MSR_PERF_METRICS, 0);</div><div class='ctx'> 		hwc-&gt;saved_slots = 0;</div><div class='ctx'> 		hwc-&gt;saved_metric = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((hwc-&gt;saved_slots) &amp;&amp; is_slots_event(event)) {</div><div class='del'>-		wrmsrl(MSR_CORE_PERF_FIXED_CTR3, hwc-&gt;saved_slots);</div><div class='del'>-		wrmsrl(MSR_PERF_METRICS, hwc-&gt;saved_metric);</div><div class='add'>+		wrmsrq(MSR_CORE_PERF_FIXED_CTR3, hwc-&gt;saved_slots);</div><div class='add'>+		wrmsrq(MSR_PERF_METRICS, hwc-&gt;saved_metric);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	perf_event_update_userpage(event);</div><div class='hunk'>@@ -2724,12 +2740,12 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,</div><div class='ctx'> </div><div class='ctx'> 	if (!val) {</div><div class='ctx'> 		/* read Fixed counter 3 */</div><div class='del'>-		rdpmcl((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);</div><div class='add'>+		slots = rdpmc(3 | INTEL_PMC_FIXED_RDPMC_BASE);</div><div class='ctx'> 		if (!slots)</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='ctx'> 		/* read PERF_METRICS */</div><div class='del'>-		rdpmcl(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);</div><div class='add'>+		metrics = rdpmc(INTEL_PMC_FIXED_RDPMC_METRICS);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		slots = val[0];</div><div class='ctx'> 		metrics = val[1];</div><div class='hunk'>@@ -2773,8 +2789,8 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,</div><div class='ctx'> </div><div class='ctx'> 	if (reset) {</div><div class='ctx'> 		/* The fixed counter 3 has to be written before the PERF_METRICS. */</div><div class='del'>-		wrmsrl(MSR_CORE_PERF_FIXED_CTR3, 0);</div><div class='del'>-		wrmsrl(MSR_PERF_METRICS, 0);</div><div class='add'>+		wrmsrq(MSR_CORE_PERF_FIXED_CTR3, 0);</div><div class='add'>+		wrmsrq(MSR_PERF_METRICS, 0);</div><div class='ctx'> 		if (event)</div><div class='ctx'> 			update_saved_topdown_regs(event, 0, 0, metric_end);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2880,6 +2896,52 @@ static void intel_pmu_enable_fixed(struct perf_event *event)</div><div class='ctx'> 	cpuc-&gt;fixed_ctrl_val |= bits;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void intel_pmu_config_acr(int idx, u64 mask, u32 reload)</div><div class='add'>+{</div><div class='add'>+	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='add'>+	int msr_b, msr_c;</div><div class='add'>+</div><div class='add'>+	if (!mask &amp;&amp; !cpuc-&gt;acr_cfg_b[idx])</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (idx &lt; INTEL_PMC_IDX_FIXED) {</div><div class='add'>+		msr_b = MSR_IA32_PMC_V6_GP0_CFG_B;</div><div class='add'>+		msr_c = MSR_IA32_PMC_V6_GP0_CFG_C;</div><div class='add'>+	} else {</div><div class='add'>+		msr_b = MSR_IA32_PMC_V6_FX0_CFG_B;</div><div class='add'>+		msr_c = MSR_IA32_PMC_V6_FX0_CFG_C;</div><div class='add'>+		idx -= INTEL_PMC_IDX_FIXED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpuc-&gt;acr_cfg_b[idx] != mask) {</div><div class='add'>+		wrmsrl(msr_b + x86_pmu.addr_offset(idx, false), mask);</div><div class='add'>+		cpuc-&gt;acr_cfg_b[idx] = mask;</div><div class='add'>+	}</div><div class='add'>+	/* Only need to update the reload value when there is a valid config value. */</div><div class='add'>+	if (mask &amp;&amp; cpuc-&gt;acr_cfg_c[idx] != reload) {</div><div class='add'>+		wrmsrl(msr_c + x86_pmu.addr_offset(idx, false), reload);</div><div class='add'>+		cpuc-&gt;acr_cfg_c[idx] = reload;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intel_pmu_enable_acr(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (!is_acr_event_group(event) || !event-&gt;attr.config2) {</div><div class='add'>+		/*</div><div class='add'>+		 * The disable doesn't clear the ACR CFG register.</div><div class='add'>+		 * Check and clear the ACR CFG register.</div><div class='add'>+		 */</div><div class='add'>+		intel_pmu_config_acr(hwc-&gt;idx, 0, 0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intel_pmu_config_acr(hwc-&gt;idx, hwc-&gt;config1, -hwc-&gt;sample_period);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_CALL_NULL(intel_pmu_enable_acr_event, intel_pmu_enable_acr);</div><div class='add'>+</div><div class='ctx'> static void intel_pmu_enable_event(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	u64 enable_mask = ARCH_PERFMON_EVENTSEL_ENABLE;</div><div class='hunk'>@@ -2887,16 +2949,19 @@ static void intel_pmu_enable_event(struct perf_event *event)</div><div class='ctx'> 	int idx = hwc-&gt;idx;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(event-&gt;attr.precise_ip))</div><div class='del'>-		intel_pmu_pebs_enable(event);</div><div class='add'>+		static_call(x86_pmu_pebs_enable)(event);</div><div class='ctx'> </div><div class='ctx'> 	switch (idx) {</div><div class='ctx'> 	case 0 ... INTEL_PMC_IDX_FIXED - 1:</div><div class='ctx'> 		if (branch_sample_counters(event))</div><div class='ctx'> 			enable_mask |= ARCH_PERFMON_EVENTSEL_BR_CNTR;</div><div class='ctx'> 		intel_set_masks(event, idx);</div><div class='add'>+		static_call_cond(intel_pmu_enable_acr_event)(event);</div><div class='ctx'> 		__x86_pmu_enable_event(hwc, enable_mask);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS - 1:</div><div class='add'>+		static_call_cond(intel_pmu_enable_acr_event)(event);</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case INTEL_PMC_IDX_METRIC_BASE ... INTEL_PMC_IDX_METRIC_END:</div><div class='ctx'> 		intel_pmu_enable_fixed(event);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2914,12 +2979,51 @@ static void intel_pmu_enable_event(struct perf_event *event)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void intel_pmu_acr_late_setup(struct cpu_hw_events *cpuc)</div><div class='add'>+{</div><div class='add'>+	struct perf_event *event, *leader;</div><div class='add'>+	int i, j, idx;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cpuc-&gt;n_events; i++) {</div><div class='add'>+		leader = cpuc-&gt;event_list[i];</div><div class='add'>+		if (!is_acr_event_group(leader))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* The ACR events must be contiguous. */</div><div class='add'>+		for (j = i; j &lt; cpuc-&gt;n_events; j++) {</div><div class='add'>+			event = cpuc-&gt;event_list[j];</div><div class='add'>+			if (event-&gt;group_leader != leader-&gt;group_leader)</div><div class='add'>+				break;</div><div class='add'>+			for_each_set_bit(idx, (unsigned long *)&amp;event-&gt;attr.config2, X86_PMC_IDX_MAX) {</div><div class='add'>+				if (WARN_ON_ONCE(i + idx &gt; cpuc-&gt;n_events))</div><div class='add'>+					return;</div><div class='add'>+				__set_bit(cpuc-&gt;assign[i + idx], (unsigned long *)&amp;event-&gt;hw.config1);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		i = j - 1;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void intel_pmu_late_setup(void)</div><div class='add'>+{</div><div class='add'>+	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='add'>+</div><div class='add'>+	if (!cpuc-&gt;n_late_setup)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	intel_pmu_pebs_late_setup(cpuc);</div><div class='add'>+	intel_pmu_acr_late_setup(cpuc);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void intel_pmu_add_event(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	if (event-&gt;attr.precise_ip)</div><div class='ctx'> 		intel_pmu_pebs_add(event);</div><div class='ctx'> 	if (intel_pmu_needs_branch_stack(event))</div><div class='ctx'> 		intel_pmu_lbr_add(event);</div><div class='add'>+	if (is_pebs_counter_event_group(event) ||</div><div class='add'>+	    is_acr_event_group(event))</div><div class='add'>+		this_cpu_ptr(&amp;cpu_hw_events)-&gt;n_late_setup++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2937,7 +3041,7 @@ int intel_pmu_save_and_restart(struct perf_event *event)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (unlikely(event_is_checkpointed(event))) {</div><div class='ctx'> 		/* No race with NMIs because the counter should not be armed */</div><div class='del'>-		wrmsrl(event-&gt;hw.event_base, 0);</div><div class='add'>+		wrmsrq(event-&gt;hw.event_base, 0);</div><div class='ctx'> 		local64_set(&amp;event-&gt;hw.prev_count, 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	return static_call(x86_pmu_set_period)(event);</div><div class='hunk'>@@ -2976,13 +3080,13 @@ static void intel_pmu_reset(void)</div><div class='ctx'> 	pr_info("clearing PMU state on CPU#%d\n", smp_processor_id());</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(idx, cntr_mask, INTEL_PMC_MAX_GENERIC) {</div><div class='del'>-		wrmsrl_safe(x86_pmu_config_addr(idx), 0ull);</div><div class='del'>-		wrmsrl_safe(x86_pmu_event_addr(idx),  0ull);</div><div class='add'>+		wrmsrq_safe(x86_pmu_config_addr(idx), 0ull);</div><div class='add'>+		wrmsrq_safe(x86_pmu_event_addr(idx),  0ull);</div><div class='ctx'> 	}</div><div class='ctx'> 	for_each_set_bit(idx, fixed_cntr_mask, INTEL_PMC_MAX_FIXED) {</div><div class='ctx'> 		if (fixed_counter_disabled(idx, cpuc-&gt;pmu))</div><div class='ctx'> 			continue;</div><div class='del'>-		wrmsrl_safe(x86_pmu_fixed_ctr_addr(idx), 0ull);</div><div class='add'>+		wrmsrq_safe(x86_pmu_fixed_ctr_addr(idx), 0ull);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ds)</div><div class='hunk'>@@ -2991,7 +3095,7 @@ static void intel_pmu_reset(void)</div><div class='ctx'> 	/* Ack all overflows and disable fixed counters */</div><div class='ctx'> 	if (x86_pmu.version &gt;= 2) {</div><div class='ctx'> 		intel_pmu_ack_status(intel_pmu_get_status());</div><div class='del'>-		wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);</div><div class='add'>+		wrmsrq(MSR_CORE_PERF_GLOBAL_CTRL, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reset LBRs and LBR freezing */</div><div class='hunk'>@@ -3035,8 +3139,7 @@ static void x86_pmu_handle_guest_pebs(struct pt_regs *regs,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		perf_sample_data_init(data, 0, event-&gt;hw.last_period);</div><div class='del'>-		if (perf_event_overflow(event, data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, data, regs);</div><div class='ctx'> </div><div class='ctx'> 		/* Inject one fake event is enough. */</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -3049,7 +3152,6 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	int bit;</div><div class='ctx'> 	int handled = 0;</div><div class='del'>-	u64 intel_ctrl = hybrid(cpuc-&gt;pmu, intel_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	inc_irq_stat(apic_perf_irqs);</div><div class='ctx'> </div><div class='hunk'>@@ -3093,7 +3195,6 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)</div><div class='ctx'> 		handled++;</div><div class='ctx'> 		x86_pmu_handle_guest_pebs(regs, &amp;data);</div><div class='ctx'> 		static_call(x86_pmu_drain_pebs)(regs, &amp;data);</div><div class='del'>-		status &amp;= intel_ctrl | GLOBAL_STATUS_TRACE_TOPAPMI;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * PMI throttle may be triggered, which stops the PEBS event.</div><div class='hunk'>@@ -3103,7 +3204,16 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)</div><div class='ctx'> 		 * Update the MSR if pebs_enabled is changed.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (pebs_enabled != cpuc-&gt;pebs_enabled)</div><div class='del'>-			wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc-&gt;pebs_enabled);</div><div class='add'>+			wrmsrq(MSR_IA32_PEBS_ENABLE, cpuc-&gt;pebs_enabled);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Above PEBS handler (PEBS counters snapshotting) has updated fixed</div><div class='add'>+		 * counter 3 and perf metrics counts if they are in counter group,</div><div class='add'>+		 * unnecessary to update again.</div><div class='add'>+		 */</div><div class='add'>+		if (cpuc-&gt;events[INTEL_PMC_IDX_FIXED_SLOTS] &amp;&amp;</div><div class='add'>+		    is_pebs_counter_event_group(cpuc-&gt;events[INTEL_PMC_IDX_FIXED_SLOTS]))</div><div class='add'>+			status &amp;= ~GLOBAL_STATUS_PERF_METRICS_OVF_BIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3123,6 +3233,8 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)</div><div class='ctx'> 		static_call(intel_pmu_update_topdown_event)(NULL, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	status &amp;= hybrid(cpuc-&gt;pmu, intel_ctrl);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Checkpointed counters can lead to 'spurious' PMIs because the</div><div class='ctx'> 	 * rollback caused by the PMI will have cleared the overflow status</div><div class='hunk'>@@ -3132,6 +3244,7 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(bit, (unsigned long *)&amp;status, X86_PMC_IDX_MAX) {</div><div class='ctx'> 		struct perf_event *event = cpuc-&gt;events[bit];</div><div class='add'>+		u64 last_period;</div><div class='ctx'> </div><div class='ctx'> 		handled++;</div><div class='ctx'> </div><div class='hunk'>@@ -3159,16 +3272,17 @@ static int handle_pmi_common(struct pt_regs *regs, u64 status)</div><div class='ctx'> 		if (is_pebs_counter_event_group(event))</div><div class='ctx'> 			x86_pmu.drain_pebs(regs, &amp;data);</div><div class='ctx'> </div><div class='add'>+		last_period = event-&gt;hw.last_period;</div><div class='add'>+</div><div class='ctx'> 		if (!intel_pmu_save_and_restart(event))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, last_period);</div><div class='ctx'> </div><div class='ctx'> 		if (has_branch_stack(event))</div><div class='ctx'> 			intel_pmu_lbr_save_brstack(&amp;data, cpuc, event);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return handled;</div><div class='hunk'>@@ -3730,10 +3844,9 @@ intel_get_event_constraints(struct cpu_hw_events *cpuc, int idx,</div><div class='ctx'> 	if (cpuc-&gt;excl_cntrs)</div><div class='ctx'> 		return intel_get_excl_constraints(cpuc, event, idx, c2);</div><div class='ctx'> </div><div class='del'>-	/* Not all counters support the branch counter feature. */</div><div class='del'>-	if (branch_sample_counters(event)) {</div><div class='add'>+	if (event-&gt;hw.dyn_constraint != ~0ULL) {</div><div class='ctx'> 		c2 = dyn_constraint(cpuc, c2, idx);</div><div class='del'>-		c2-&gt;idxmsk64 &amp;= x86_pmu.lbr_counters;</div><div class='add'>+		c2-&gt;idxmsk64 &amp;= event-&gt;hw.dyn_constraint;</div><div class='ctx'> 		c2-&gt;weight = hweight64(c2-&gt;idxmsk64);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4074,6 +4187,39 @@ end:</div><div class='ctx'> 	return start;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool intel_pmu_has_acr(struct pmu *pmu)</div><div class='add'>+{</div><div class='add'>+	return !!hybrid(pmu, acr_cause_mask64);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool intel_pmu_is_acr_group(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	/* The group leader has the ACR flag set */</div><div class='add'>+	if (is_acr_event_group(event))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* The acr_mask is set */</div><div class='add'>+	if (event-&gt;attr.config2)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void intel_pmu_set_acr_cntr_constr(struct perf_event *event,</div><div class='add'>+						 u64 *cause_mask, int *num)</div><div class='add'>+{</div><div class='add'>+	event-&gt;hw.dyn_constraint &amp;= hybrid(event-&gt;pmu, acr_cntr_mask64);</div><div class='add'>+	*cause_mask |= event-&gt;attr.config2;</div><div class='add'>+	*num += 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void intel_pmu_set_acr_caused_constr(struct perf_event *event,</div><div class='add'>+						   int idx, u64 cause_mask)</div><div class='add'>+{</div><div class='add'>+	if (test_bit(idx, (unsigned long *)&amp;cause_mask))</div><div class='add'>+		event-&gt;hw.dyn_constraint &amp;= hybrid(event-&gt;pmu, acr_cause_mask64);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int intel_pmu_hw_config(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = x86_pmu_hw_config(event);</div><div class='hunk'>@@ -4135,15 +4281,19 @@ static int intel_pmu_hw_config(struct perf_event *event)</div><div class='ctx'> 		leader = event-&gt;group_leader;</div><div class='ctx'> 		if (branch_sample_call_stack(leader))</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		if (branch_sample_counters(leader))</div><div class='add'>+		if (branch_sample_counters(leader)) {</div><div class='ctx'> 			num++;</div><div class='add'>+			leader-&gt;hw.dyn_constraint &amp;= x86_pmu.lbr_counters;</div><div class='add'>+		}</div><div class='ctx'> 		leader-&gt;hw.flags |= PERF_X86_EVENT_BRANCH_COUNTERS;</div><div class='ctx'> </div><div class='ctx'> 		for_each_sibling_event(sibling, leader) {</div><div class='ctx'> 			if (branch_sample_call_stack(sibling))</div><div class='ctx'> 				return -EINVAL;</div><div class='del'>-			if (branch_sample_counters(sibling))</div><div class='add'>+			if (branch_sample_counters(sibling)) {</div><div class='ctx'> 				num++;</div><div class='add'>+				sibling-&gt;hw.dyn_constraint &amp;= x86_pmu.lbr_counters;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (num &gt; fls(x86_pmu.lbr_counters))</div><div class='hunk'>@@ -4198,6 +4348,94 @@ static int intel_pmu_hw_config(struct perf_event *event)</div><div class='ctx'> 	    event-&gt;attr.precise_ip)</div><div class='ctx'> 		event-&gt;group_leader-&gt;hw.flags |= PERF_X86_EVENT_PEBS_CNTR;</div><div class='ctx'> </div><div class='add'>+	if (intel_pmu_has_acr(event-&gt;pmu) &amp;&amp; intel_pmu_is_acr_group(event)) {</div><div class='add'>+		struct perf_event *sibling, *leader = event-&gt;group_leader;</div><div class='add'>+		struct pmu *pmu = event-&gt;pmu;</div><div class='add'>+		bool has_sw_event = false;</div><div class='add'>+		int num = 0, idx = 0;</div><div class='add'>+		u64 cause_mask = 0;</div><div class='add'>+</div><div class='add'>+		/* Not support perf metrics */</div><div class='add'>+		if (is_metric_event(event))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		/* Not support freq mode */</div><div class='add'>+		if (event-&gt;attr.freq)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		/* PDist is not supported */</div><div class='add'>+		if (event-&gt;attr.config2 &amp;&amp; event-&gt;attr.precise_ip &gt; 2)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		/* The reload value cannot exceeds the max period */</div><div class='add'>+		if (event-&gt;attr.sample_period &gt; x86_pmu.max_period)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		/*</div><div class='add'>+		 * The counter-constraints of each event cannot be finalized</div><div class='add'>+		 * unless the whole group is scanned. However, it's hard</div><div class='add'>+		 * to know whether the event is the last one of the group.</div><div class='add'>+		 * Recalculate the counter-constraints for each event when</div><div class='add'>+		 * adding a new event.</div><div class='add'>+		 *</div><div class='add'>+		 * The group is traversed twice, which may be optimized later.</div><div class='add'>+		 * In the first round,</div><div class='add'>+		 * - Find all events which do reload when other events</div><div class='add'>+		 *   overflow and set the corresponding counter-constraints</div><div class='add'>+		 * - Add all events, which can cause other events reload,</div><div class='add'>+		 *   in the cause_mask</div><div class='add'>+		 * - Error out if the number of events exceeds the HW limit</div><div class='add'>+		 * - The ACR events must be contiguous.</div><div class='add'>+		 *   Error out if there are non-X86 events between ACR events.</div><div class='add'>+		 *   This is not a HW limit, but a SW limit.</div><div class='add'>+		 *   With the assumption, the intel_pmu_acr_late_setup() can</div><div class='add'>+		 *   easily convert the event idx to counter idx without</div><div class='add'>+		 *   traversing the whole event list.</div><div class='add'>+		 */</div><div class='add'>+		if (!is_x86_event(leader))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (leader-&gt;attr.config2)</div><div class='add'>+			intel_pmu_set_acr_cntr_constr(leader, &amp;cause_mask, &amp;num);</div><div class='add'>+</div><div class='add'>+		if (leader-&gt;nr_siblings) {</div><div class='add'>+			for_each_sibling_event(sibling, leader) {</div><div class='add'>+				if (!is_x86_event(sibling)) {</div><div class='add'>+					has_sw_event = true;</div><div class='add'>+					continue;</div><div class='add'>+				}</div><div class='add'>+				if (!sibling-&gt;attr.config2)</div><div class='add'>+					continue;</div><div class='add'>+				if (has_sw_event)</div><div class='add'>+					return -EINVAL;</div><div class='add'>+				intel_pmu_set_acr_cntr_constr(sibling, &amp;cause_mask, &amp;num);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (leader != event &amp;&amp; event-&gt;attr.config2) {</div><div class='add'>+			if (has_sw_event)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			intel_pmu_set_acr_cntr_constr(event, &amp;cause_mask, &amp;num);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (hweight64(cause_mask) &gt; hweight64(hybrid(pmu, acr_cause_mask64)) ||</div><div class='add'>+		    num &gt; hweight64(hybrid(event-&gt;pmu, acr_cntr_mask64)))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		/*</div><div class='add'>+		 * In the second round, apply the counter-constraints for</div><div class='add'>+		 * the events which can cause other events reload.</div><div class='add'>+		 */</div><div class='add'>+		intel_pmu_set_acr_caused_constr(leader, idx++, cause_mask);</div><div class='add'>+</div><div class='add'>+		if (leader-&gt;nr_siblings) {</div><div class='add'>+			for_each_sibling_event(sibling, leader)</div><div class='add'>+				intel_pmu_set_acr_caused_constr(sibling, idx++, cause_mask);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (leader != event)</div><div class='add'>+			intel_pmu_set_acr_caused_constr(event, idx, cause_mask);</div><div class='add'>+</div><div class='add'>+		leader-&gt;hw.flags |= PERF_X86_EVENT_ACR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if ((event-&gt;attr.type == PERF_TYPE_HARDWARE) ||</div><div class='ctx'> 	    (event-&gt;attr.type == PERF_TYPE_HW_CACHE))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -4345,7 +4583,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data)</div><div class='ctx'> 		.guest = intel_ctrl &amp; ~cpuc-&gt;intel_ctrl_host_mask &amp; ~pebs_mask,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.pebs)</div><div class='add'>+	if (!x86_pmu.ds_pebs)</div><div class='ctx'> 		return arr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -4386,7 +4624,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data)</div><div class='ctx'> 	arr[pebs_enable] = (struct perf_guest_switch_msr){</div><div class='ctx'> 		.msr = MSR_IA32_PEBS_ENABLE,</div><div class='ctx'> 		.host = cpuc-&gt;pebs_enabled &amp; ~cpuc-&gt;intel_ctrl_guest_mask,</div><div class='del'>-		.guest = pebs_mask &amp; ~cpuc-&gt;intel_ctrl_host_mask,</div><div class='add'>+		.guest = pebs_mask &amp; ~cpuc-&gt;intel_ctrl_host_mask &amp; kvm_pmu-&gt;pebs_enable,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	if (arr[pebs_enable].host) {</div><div class='hunk'>@@ -4943,7 +5181,7 @@ int intel_cpuc_prepare(struct cpu_hw_events *cpuc, int cpu)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (x86_pmu.flags &amp; (PMU_FL_EXCL_CNTRS | PMU_FL_TFA | PMU_FL_BR_CNTR)) {</div><div class='add'>+	if (x86_pmu.flags &amp; (PMU_FL_EXCL_CNTRS | PMU_FL_TFA | PMU_FL_DYN_CONSTRAINT)) {</div><div class='ctx'> 		size_t sz = X86_PMC_IDX_MAX * sizeof(struct event_constraint);</div><div class='ctx'> </div><div class='ctx'> 		cpuc-&gt;constraint_list = kzalloc_node(sz, GFP_KERNEL, cpu_to_node(cpu));</div><div class='hunk'>@@ -5032,7 +5270,7 @@ static inline bool intel_pmu_broken_perf_cap(void)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void update_pmu_cap(struct x86_hybrid_pmu *pmu)</div><div class='add'>+static void update_pmu_cap(struct pmu *pmu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cntr, fixed_cntr, ecx, edx;</div><div class='ctx'> 	union cpuid35_eax eax;</div><div class='hunk'>@@ -5041,20 +5279,30 @@ static void update_pmu_cap(struct x86_hybrid_pmu *pmu)</div><div class='ctx'> 	cpuid(ARCH_PERFMON_EXT_LEAF, &amp;eax.full, &amp;ebx.full, &amp;ecx, &amp;edx);</div><div class='ctx'> </div><div class='ctx'> 	if (ebx.split.umask2)</div><div class='del'>-		pmu-&gt;config_mask |= ARCH_PERFMON_EVENTSEL_UMASK2;</div><div class='add'>+		hybrid(pmu, config_mask) |= ARCH_PERFMON_EVENTSEL_UMASK2;</div><div class='ctx'> 	if (ebx.split.eq)</div><div class='del'>-		pmu-&gt;config_mask |= ARCH_PERFMON_EVENTSEL_EQ;</div><div class='add'>+		hybrid(pmu, config_mask) |= ARCH_PERFMON_EVENTSEL_EQ;</div><div class='ctx'> </div><div class='ctx'> 	if (eax.split.cntr_subleaf) {</div><div class='ctx'> 		cpuid_count(ARCH_PERFMON_EXT_LEAF, ARCH_PERFMON_NUM_COUNTER_LEAF,</div><div class='ctx'> 			    &amp;cntr, &amp;fixed_cntr, &amp;ecx, &amp;edx);</div><div class='del'>-		pmu-&gt;cntr_mask64 = cntr;</div><div class='del'>-		pmu-&gt;fixed_cntr_mask64 = fixed_cntr;</div><div class='add'>+		hybrid(pmu, cntr_mask64) = cntr;</div><div class='add'>+		hybrid(pmu, fixed_cntr_mask64) = fixed_cntr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eax.split.acr_subleaf) {</div><div class='add'>+		cpuid_count(ARCH_PERFMON_EXT_LEAF, ARCH_PERFMON_ACR_LEAF,</div><div class='add'>+			    &amp;cntr, &amp;fixed_cntr, &amp;ecx, &amp;edx);</div><div class='add'>+		/* The mask of the counters which can be reloaded */</div><div class='add'>+		hybrid(pmu, acr_cntr_mask64) = cntr | ((u64)fixed_cntr &lt;&lt; INTEL_PMC_IDX_FIXED);</div><div class='add'>+</div><div class='add'>+		/* The mask of the counters which can cause a reload of reloadable counters */</div><div class='add'>+		hybrid(pmu, acr_cause_mask64) = ecx | ((u64)edx &lt;&lt; INTEL_PMC_IDX_FIXED);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_pmu_broken_perf_cap()) {</div><div class='ctx'> 		/* Perf Metric (Bit 15) and PEBS via PT (Bit 16) are hybrid enumeration */</div><div class='del'>-		rdmsrl(MSR_IA32_PERF_CAPABILITIES, pmu-&gt;intel_cap.capabilities);</div><div class='add'>+		rdmsrq(MSR_IA32_PERF_CAPABILITIES, hybrid(pmu, intel_cap).capabilities);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5141,7 +5389,7 @@ static bool init_hybrid_pmu(int cpu)</div><div class='ctx'> 		goto end;</div><div class='ctx'> </div><div class='ctx'> 	if (this_cpu_has(X86_FEATURE_ARCH_PERFMON_EXT))</div><div class='del'>-		update_pmu_cap(pmu);</div><div class='add'>+		update_pmu_cap(&amp;pmu-&gt;pmu);</div><div class='ctx'> </div><div class='ctx'> 	intel_pmu_check_hybrid_pmus(pmu);</div><div class='ctx'> </div><div class='hunk'>@@ -5202,7 +5450,7 @@ static void intel_pmu_cpu_starting(int cpu)</div><div class='ctx'> 	if (!is_hybrid() &amp;&amp; x86_pmu.intel_cap.perf_metrics) {</div><div class='ctx'> 		union perf_capabilities perf_cap;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap.capabilities);</div><div class='add'>+		rdmsrq(MSR_IA32_PERF_CAPABILITIES, perf_cap.capabilities);</div><div class='ctx'> 		if (!perf_cap.perf_metrics) {</div><div class='ctx'> 			x86_pmu.intel_cap.perf_metrics = 0;</div><div class='ctx'> 			x86_pmu.intel_ctrl &amp;= ~(1ULL &lt;&lt; GLOBAL_CTRL_EN_PERF_METRICS);</div><div class='hunk'>@@ -5515,7 +5763,7 @@ static __init void intel_clovertown_quirk(void)</div><div class='ctx'> 	 * these chips.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pr_warn("PEBS disabled due to CPU errata\n");</div><div class='del'>-	x86_pmu.pebs = 0;</div><div class='add'>+	x86_pmu.ds_pebs = 0;</div><div class='ctx'> 	x86_pmu.pebs_constraints = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5610,24 +5858,24 @@ static bool check_msr(unsigned long msr, u64 mask)</div><div class='ctx'> 	 * matches, this is needed to detect certain hardware emulators</div><div class='ctx'> 	 * (qemu/kvm) that don't trap on the MSR access and always return 0s.</div><div class='ctx'> 	 */</div><div class='del'>-	if (rdmsrl_safe(msr, &amp;val_old))</div><div class='add'>+	if (rdmsrq_safe(msr, &amp;val_old))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Only change the bits which can be updated by wrmsrl.</div><div class='add'>+	 * Only change the bits which can be updated by wrmsrq.</div><div class='ctx'> 	 */</div><div class='ctx'> 	val_tmp = val_old ^ mask;</div><div class='ctx'> </div><div class='ctx'> 	if (is_lbr_from(msr))</div><div class='ctx'> 		val_tmp = lbr_from_signext_quirk_wr(val_tmp);</div><div class='ctx'> </div><div class='del'>-	if (wrmsrl_safe(msr, val_tmp) ||</div><div class='del'>-	    rdmsrl_safe(msr, &amp;val_new))</div><div class='add'>+	if (wrmsrq_safe(msr, val_tmp) ||</div><div class='add'>+	    rdmsrq_safe(msr, &amp;val_new))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Quirk only affects validation in wrmsr(), so wrmsrl()'s value</div><div class='del'>-	 * should equal rdmsrl()'s even with the quirk.</div><div class='add'>+	 * Quirk only affects validation in wrmsr(), so wrmsrq()'s value</div><div class='add'>+	 * should equal rdmsrq()'s even with the quirk.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (val_new != val_tmp)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -5638,7 +5886,7 @@ static bool check_msr(unsigned long msr, u64 mask)</div><div class='ctx'> 	/* Here it's sure that the MSR can be safely accessed.</div><div class='ctx'> 	 * Restore the old value and return.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(msr, val_old);</div><div class='add'>+	wrmsrq(msr, val_old);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -6003,7 +6251,7 @@ tsx_is_visible(struct kobject *kobj, struct attribute *attr, int i)</div><div class='ctx'> static umode_t</div><div class='ctx'> pebs_is_visible(struct kobject *kobj, struct attribute *attr, int i)</div><div class='ctx'> {</div><div class='del'>-	return x86_pmu.pebs ? attr-&gt;mode : 0;</div><div class='add'>+	return x86_pmu.ds_pebs ? attr-&gt;mode : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static umode_t</div><div class='hunk'>@@ -6034,6 +6282,21 @@ td_is_visible(struct kobject *kobj, struct attribute *attr, int i)</div><div class='ctx'> 	return attr-&gt;mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+PMU_FORMAT_ATTR(acr_mask,	"config2:0-63");</div><div class='add'>+</div><div class='add'>+static struct attribute *format_acr_attrs[] = {</div><div class='add'>+	&amp;format_attr_acr_mask.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static umode_t</div><div class='add'>+acr_is_visible(struct kobject *kobj, struct attribute *attr, int i)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = kobj_to_dev(kobj);</div><div class='add'>+</div><div class='add'>+	return intel_pmu_has_acr(dev_get_drvdata(dev)) ? attr-&gt;mode : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct attribute_group group_events_td  = {</div><div class='ctx'> 	.name = "events",</div><div class='ctx'> 	.is_visible = td_is_visible,</div><div class='hunk'>@@ -6076,6 +6339,12 @@ static struct attribute_group group_format_evtsel_ext = {</div><div class='ctx'> 	.is_visible = evtsel_ext_is_visible,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct attribute_group group_format_acr = {</div><div class='add'>+	.name       = "format",</div><div class='add'>+	.attrs      = format_acr_attrs,</div><div class='add'>+	.is_visible = acr_is_visible,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct attribute_group group_default = {</div><div class='ctx'> 	.attrs      = intel_pmu_attrs,</div><div class='ctx'> 	.is_visible = default_is_visible,</div><div class='hunk'>@@ -6090,6 +6359,7 @@ static const struct attribute_group *attr_update[] = {</div><div class='ctx'> 	&amp;group_format_extra,</div><div class='ctx'> 	&amp;group_format_extra_skl,</div><div class='ctx'> 	&amp;group_format_evtsel_ext,</div><div class='add'>+	&amp;group_format_acr,</div><div class='ctx'> 	&amp;group_default,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='hunk'>@@ -6374,6 +6644,7 @@ static const struct attribute_group *hybrid_attr_update[] = {</div><div class='ctx'> 	&amp;group_caps_lbr,</div><div class='ctx'> 	&amp;hybrid_group_format_extra,</div><div class='ctx'> 	&amp;group_format_evtsel_ext,</div><div class='add'>+	&amp;group_format_acr,</div><div class='ctx'> 	&amp;group_default,</div><div class='ctx'> 	&amp;hybrid_group_cpus,</div><div class='ctx'> 	NULL,</div><div class='hunk'>@@ -6566,6 +6837,7 @@ static __always_inline void intel_pmu_init_skt(struct pmu *pmu)</div><div class='ctx'> 	intel_pmu_init_grt(pmu);</div><div class='ctx'> 	hybrid(pmu, event_constraints) = intel_skt_event_constraints;</div><div class='ctx'> 	hybrid(pmu, extra_regs) = intel_cmt_extra_regs;</div><div class='add'>+	static_call_update(intel_pmu_enable_acr_event, intel_pmu_enable_acr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> __init int intel_pmu_init(void)</div><div class='hunk'>@@ -6626,6 +6898,7 @@ __init int intel_pmu_init(void)</div><div class='ctx'> </div><div class='ctx'> 	x86_pmu.pebs_events_mask	= intel_pmu_pebs_mask(x86_pmu.cntr_mask64);</div><div class='ctx'> 	x86_pmu.pebs_capable		= PEBS_COUNTER_MASK;</div><div class='add'>+	x86_pmu.config_mask		= X86_RAW_EVENT_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Quirk: v2 perfmon does not report fixed-purpose events, so</div><div class='hunk'>@@ -6642,7 +6915,7 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_PDCM)) {</div><div class='ctx'> 		u64 capabilities;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities);</div><div class='add'>+		rdmsrq(MSR_IA32_PERF_CAPABILITIES, capabilities);</div><div class='ctx'> 		x86_pmu.intel_cap.capabilities = capabilities;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6654,7 +6927,7 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_ARCH_LBR))</div><div class='ctx'> 		intel_pmu_arch_lbr_init();</div><div class='ctx'> </div><div class='del'>-	intel_ds_init();</div><div class='add'>+	intel_pebs_init();</div><div class='ctx'> </div><div class='ctx'> 	x86_add_quirk(intel_arch_events_quirk); /* Install first, so it runs last */</div><div class='ctx'> </div><div class='hunk'>@@ -6665,6 +6938,12 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='add'>+	 * Many features on and after V6 require dynamic constraint,</div><div class='add'>+	 * e.g., Arch PEBS, ACR.</div><div class='add'>+	 */</div><div class='add'>+	if (version &gt;= 6)</div><div class='add'>+		x86_pmu.flags |= PMU_FL_DYN_CONSTRAINT;</div><div class='add'>+	/*</div><div class='ctx'> 	 * Install the hw-cache-events table:</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (boot_cpu_data.x86_vfm) {</div><div class='hunk'>@@ -6875,6 +7154,18 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 		name = "crestmont";</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case INTEL_ATOM_DARKMONT_X:</div><div class='add'>+		intel_pmu_init_skt(NULL);</div><div class='add'>+		intel_pmu_pebs_data_source_cmt();</div><div class='add'>+		x86_pmu.pebs_latency_data = cmt_latency_data;</div><div class='add'>+		x86_pmu.get_event_constraints = cmt_get_event_constraints;</div><div class='add'>+		td_attr = skt_events_attrs;</div><div class='add'>+		mem_attr = grt_mem_attrs;</div><div class='add'>+		extra_attr = cmt_format_attr;</div><div class='add'>+		pr_cont("Darkmont events, ");</div><div class='add'>+		name = "darkmont";</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	case INTEL_WESTMERE:</div><div class='ctx'> 	case INTEL_WESTMERE_EP:</div><div class='ctx'> 	case INTEL_WESTMERE_EX:</div><div class='hunk'>@@ -7305,8 +7596,17 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 		name = "meteorlake_hybrid";</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case INTEL_PANTHERLAKE_L:</div><div class='add'>+		pr_cont("Pantherlake Hybrid events, ");</div><div class='add'>+		name = "pantherlake_hybrid";</div><div class='add'>+		goto lnl_common;</div><div class='add'>+</div><div class='ctx'> 	case INTEL_LUNARLAKE_M:</div><div class='ctx'> 	case INTEL_ARROWLAKE:</div><div class='add'>+		pr_cont("Lunarlake Hybrid events, ");</div><div class='add'>+		name = "lunarlake_hybrid";</div><div class='add'>+</div><div class='add'>+	lnl_common:</div><div class='ctx'> 		intel_pmu_init_hybrid(hybrid_big_small);</div><div class='ctx'> </div><div class='ctx'> 		x86_pmu.pebs_latency_data = lnl_latency_data;</div><div class='hunk'>@@ -7328,8 +7628,6 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 		intel_pmu_init_skt(&amp;pmu-&gt;pmu);</div><div class='ctx'> </div><div class='ctx'> 		intel_pmu_pebs_data_source_lnl();</div><div class='del'>-		pr_cont("Lunarlake Hybrid events, ");</div><div class='del'>-		name = "lunarlake_hybrid";</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case INTEL_ARROWLAKE_H:</div><div class='hunk'>@@ -7417,6 +7715,18 @@ __init int intel_pmu_init(void)</div><div class='ctx'> 		x86_pmu.attr_update = hybrid_attr_update;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * The archPerfmonExt (0x23) includes an enhanced enumeration of</div><div class='add'>+	 * PMU architectural features with a per-core view. For non-hybrid,</div><div class='add'>+	 * each core has the same PMU capabilities. It's good enough to</div><div class='add'>+	 * update the x86_pmu from the booting CPU. For hybrid, the x86_pmu</div><div class='add'>+	 * is used to keep the common capabilities. Still keep the values</div><div class='add'>+	 * from the leaf 0xa. The core specific update will be done later</div><div class='add'>+	 * when a new type is online.</div><div class='add'>+	 */</div><div class='add'>+	if (!is_hybrid() &amp;&amp; boot_cpu_has(X86_FEATURE_ARCH_PERFMON_EXT))</div><div class='add'>+		update_pmu_cap(NULL);</div><div class='add'>+</div><div class='ctx'> 	intel_pmu_check_counters_mask(&amp;x86_pmu.cntr_mask64,</div><div class='ctx'> 				      &amp;x86_pmu.fixed_cntr_mask64,</div><div class='ctx'> 				      &amp;x86_pmu.intel_ctrl);</div><div class='head'>diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c<br/>index ae4ec16156bb..ec753e39b007 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/cstate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/cstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/cstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/cstate.c</a></div><div class='hunk'>@@ -111,6 +111,7 @@</div><div class='ctx'> #include &lt;linux/nospec.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> #include "../probe.h"</div><div class='ctx'> </div><div class='hunk'>@@ -320,7 +321,7 @@ static inline u64 cstate_pmu_read_counter(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(event-&gt;hw.event_base, val);</div><div class='add'>+	rdmsrq(event-&gt;hw.event_base, val);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c<br/>index 1f7e1a692a7a..c0b7ac1c7594 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/ds.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/ds.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/ds.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/ds.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/timer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='hunk'>@@ -624,7 +625,7 @@ static int alloc_pebs_buffer(int cpu)</div><div class='ctx'> 	int max, node = cpu_to_node(cpu);</div><div class='ctx'> 	void *buffer, *insn_buff, *cea;</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.pebs)</div><div class='add'>+	if (!x86_pmu.ds_pebs)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	buffer = dsalloc_pages(bsiz, GFP_KERNEL, cpu);</div><div class='hunk'>@@ -659,7 +660,7 @@ static void release_pebs_buffer(int cpu)</div><div class='ctx'> 	struct cpu_hw_events *hwev = per_cpu_ptr(&amp;cpu_hw_events, cpu);</div><div class='ctx'> 	void *cea;</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.pebs)</div><div class='add'>+	if (!x86_pmu.ds_pebs)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	kfree(per_cpu(insn_buffer, cpu));</div><div class='hunk'>@@ -734,7 +735,7 @@ void release_ds_buffers(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.bts &amp;&amp; !x86_pmu.pebs)</div><div class='add'>+	if (!x86_pmu.bts &amp;&amp; !x86_pmu.ds_pebs)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu)</div><div class='hunk'>@@ -750,7 +751,8 @@ void release_ds_buffers(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='del'>-		release_pebs_buffer(cpu);</div><div class='add'>+		if (x86_pmu.ds_pebs)</div><div class='add'>+			release_pebs_buffer(cpu);</div><div class='ctx'> 		release_bts_buffer(cpu);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -761,15 +763,17 @@ void reserve_ds_buffers(void)</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='ctx'> 	x86_pmu.bts_active = 0;</div><div class='del'>-	x86_pmu.pebs_active = 0;</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.bts &amp;&amp; !x86_pmu.pebs)</div><div class='add'>+	if (x86_pmu.ds_pebs)</div><div class='add'>+		x86_pmu.pebs_active = 0;</div><div class='add'>+</div><div class='add'>+	if (!x86_pmu.bts &amp;&amp; !x86_pmu.ds_pebs)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (!x86_pmu.bts)</div><div class='ctx'> 		bts_err = 1;</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.pebs)</div><div class='add'>+	if (!x86_pmu.ds_pebs)</div><div class='ctx'> 		pebs_err = 1;</div><div class='ctx'> </div><div class='ctx'> 	for_each_possible_cpu(cpu) {</div><div class='hunk'>@@ -781,7 +785,8 @@ void reserve_ds_buffers(void)</div><div class='ctx'> 		if (!bts_err &amp;&amp; alloc_bts_buffer(cpu))</div><div class='ctx'> 			bts_err = 1;</div><div class='ctx'> </div><div class='del'>-		if (!pebs_err &amp;&amp; alloc_pebs_buffer(cpu))</div><div class='add'>+		if (x86_pmu.ds_pebs &amp;&amp; !pebs_err &amp;&amp;</div><div class='add'>+		    alloc_pebs_buffer(cpu))</div><div class='ctx'> 			pebs_err = 1;</div><div class='ctx'> </div><div class='ctx'> 		if (bts_err &amp;&amp; pebs_err)</div><div class='hunk'>@@ -793,7 +798,7 @@ void reserve_ds_buffers(void)</div><div class='ctx'> 			release_bts_buffer(cpu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pebs_err) {</div><div class='add'>+	if (x86_pmu.ds_pebs &amp;&amp; pebs_err) {</div><div class='ctx'> 		for_each_possible_cpu(cpu)</div><div class='ctx'> 			release_pebs_buffer(cpu);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -805,7 +810,7 @@ void reserve_ds_buffers(void)</div><div class='ctx'> 		if (x86_pmu.bts &amp;&amp; !bts_err)</div><div class='ctx'> 			x86_pmu.bts_active = 1;</div><div class='ctx'> </div><div class='del'>-		if (x86_pmu.pebs &amp;&amp; !pebs_err)</div><div class='add'>+		if (x86_pmu.ds_pebs &amp;&amp; !pebs_err)</div><div class='ctx'> 			x86_pmu.pebs_active = 1;</div><div class='ctx'> </div><div class='ctx'> 		for_each_possible_cpu(cpu) {</div><div class='hunk'>@@ -1355,9 +1360,8 @@ static void __intel_pmu_pebs_update_cfg(struct perf_event *event,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void intel_pmu_late_setup(void)</div><div class='add'>+void intel_pmu_pebs_late_setup(struct cpu_hw_events *cpuc)</div><div class='ctx'> {</div><div class='del'>-	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> 	struct perf_event *event;</div><div class='ctx'> 	u64 pebs_data_cfg = 0;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -1399,8 +1403,10 @@ static u64 pebs_update_adaptive_cfg(struct perf_event *event)</div><div class='ctx'> 	 * + precise_ip &lt; 2 for the non event IP</div><div class='ctx'> 	 * + For RTM TSX weight we need GPRs for the abort code.</div><div class='ctx'> 	 */</div><div class='del'>-	gprs = (sample_type &amp; PERF_SAMPLE_REGS_INTR) &amp;&amp;</div><div class='del'>-	       (attr-&gt;sample_regs_intr &amp; PEBS_GP_REGS);</div><div class='add'>+	gprs = ((sample_type &amp; PERF_SAMPLE_REGS_INTR) &amp;&amp;</div><div class='add'>+		(attr-&gt;sample_regs_intr &amp; PEBS_GP_REGS)) ||</div><div class='add'>+	       ((sample_type &amp; PERF_SAMPLE_REGS_USER) &amp;&amp;</div><div class='add'>+		(attr-&gt;sample_regs_user &amp; PEBS_GP_REGS));</div><div class='ctx'> </div><div class='ctx'> 	tsx_weight = (sample_type &amp; PERF_SAMPLE_WEIGHT_TYPE) &amp;&amp;</div><div class='ctx'> 		     ((attr-&gt;config &amp; INTEL_ARCH_EVENT_MASK) ==</div><div class='hunk'>@@ -1515,7 +1521,7 @@ static void intel_pmu_pebs_via_pt_enable(struct perf_event *event)</div><div class='ctx'> 		else</div><div class='ctx'> 			value = ds-&gt;pebs_event_reset[MAX_PEBS_EVENTS + idx];</div><div class='ctx'> 	}</div><div class='del'>-	wrmsrl(base + idx, value);</div><div class='add'>+	wrmsrq(base + idx, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void intel_pmu_drain_large_pebs(struct cpu_hw_events *cpuc)</div><div class='hunk'>@@ -1552,7 +1558,7 @@ void intel_pmu_pebs_enable(struct perf_event *event)</div><div class='ctx'> 			 */</div><div class='ctx'> 			intel_pmu_drain_pebs_buffer();</div><div class='ctx'> 			adaptive_pebs_record_size_update();</div><div class='del'>-			wrmsrl(MSR_PEBS_DATA_CFG, pebs_data_cfg);</div><div class='add'>+			wrmsrq(MSR_PEBS_DATA_CFG, pebs_data_cfg);</div><div class='ctx'> 			cpuc-&gt;active_pebs_data_cfg = pebs_data_cfg;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1615,7 +1621,7 @@ void intel_pmu_pebs_disable(struct perf_event *event)</div><div class='ctx'> 	intel_pmu_pebs_via_pt_disable(event);</div><div class='ctx'> </div><div class='ctx'> 	if (cpuc-&gt;enabled)</div><div class='del'>-		wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc-&gt;pebs_enabled);</div><div class='add'>+		wrmsrq(MSR_IA32_PEBS_ENABLE, cpuc-&gt;pebs_enabled);</div><div class='ctx'> </div><div class='ctx'> 	hwc-&gt;config |= ARCH_PERFMON_EVENTSEL_INT;</div><div class='ctx'> }</div><div class='hunk'>@@ -1625,7 +1631,7 @@ void intel_pmu_pebs_enable_all(void)</div><div class='ctx'> 	struct cpu_hw_events *cpuc = this_cpu_ptr(&amp;cpu_hw_events);</div><div class='ctx'> </div><div class='ctx'> 	if (cpuc-&gt;pebs_enabled)</div><div class='del'>-		wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc-&gt;pebs_enabled);</div><div class='add'>+		wrmsrq(MSR_IA32_PEBS_ENABLE, cpuc-&gt;pebs_enabled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_pebs_disable_all(void)</div><div class='hunk'>@@ -1826,8 +1832,6 @@ static void setup_pebs_fixed_sample_data(struct perf_event *event,</div><div class='ctx'> </div><div class='ctx'> 	perf_sample_data_init(data, 0, event-&gt;hw.last_period);</div><div class='ctx'> </div><div class='del'>-	data-&gt;period = event-&gt;hw.last_period;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use latency for weight (only avail with PEBS-LL)</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2080,7 +2084,6 @@ static void setup_pebs_adaptive_sample_data(struct perf_event *event,</div><div class='ctx'> 	sample_type = event-&gt;attr.sample_type;</div><div class='ctx'> 	format_group = basic-&gt;format_group;</div><div class='ctx'> 	perf_sample_data_init(data, 0, event-&gt;hw.last_period);</div><div class='del'>-	data-&gt;period = event-&gt;hw.last_period;</div><div class='ctx'> </div><div class='ctx'> 	setup_pebs_time(event, data, basic-&gt;tsc);</div><div class='ctx'> </div><div class='hunk'>@@ -2123,7 +2126,7 @@ static void setup_pebs_adaptive_sample_data(struct perf_event *event,</div><div class='ctx'> 			regs-&gt;flags &amp;= ~PERF_EFLAGS_EXACT;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (sample_type &amp; PERF_SAMPLE_REGS_INTR)</div><div class='add'>+		if (sample_type &amp; (PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER))</div><div class='ctx'> 			adaptive_pebs_save_regs(regs, gprs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2274,7 +2277,7 @@ intel_pmu_save_and_restart_reload(struct perf_event *event, int count)</div><div class='ctx'> 	WARN_ON(this_cpu_read(cpu_hw_events.enabled));</div><div class='ctx'> </div><div class='ctx'> 	prev_raw_count = local64_read(&amp;hwc-&gt;prev_count);</div><div class='del'>-	rdpmcl(hwc-&gt;event_base_rdpmc, new_raw_count);</div><div class='add'>+	new_raw_count = rdpmc(hwc-&gt;event_base_rdpmc);</div><div class='ctx'> 	local64_set(&amp;hwc-&gt;prev_count, new_raw_count);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2357,8 +2360,7 @@ __intel_pmu_pebs_last_event(struct perf_event *event,</div><div class='ctx'> 		 * All but the last records are processed.</div><div class='ctx'> 		 * The last one is left to be able to call the overflow handler.</div><div class='ctx'> 		 */</div><div class='del'>-		if (perf_event_overflow(event, data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (hwc-&gt;flags &amp; PERF_X86_EVENT_AUTO_RELOAD) {</div><div class='hunk'>@@ -2377,8 +2379,25 @@ __intel_pmu_pebs_last_event(struct perf_event *event,</div><div class='ctx'> 			 */</div><div class='ctx'> 			intel_pmu_save_and_restart_reload(event, count);</div><div class='ctx'> 		}</div><div class='del'>-	} else</div><div class='del'>-		intel_pmu_save_and_restart(event);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * For a non-precise event, it's possible the</div><div class='add'>+		 * counters-snapshotting records a positive value for the</div><div class='add'>+		 * overflowed event. Then the HW auto-reload mechanism</div><div class='add'>+		 * reset the counter to 0 immediately, because the</div><div class='add'>+		 * pebs_event_reset is cleared if the PERF_X86_EVENT_AUTO_RELOAD</div><div class='add'>+		 * is not set. The counter backwards may be observed in a</div><div class='add'>+		 * PMI handler.</div><div class='add'>+		 *</div><div class='add'>+		 * Since the event value has been updated when processing the</div><div class='add'>+		 * counters-snapshotting record, only needs to set the new</div><div class='add'>+		 * period for the counter.</div><div class='add'>+		 */</div><div class='add'>+		if (is_pebs_counter_event_group(event))</div><div class='add'>+			static_call(x86_pmu_set_period)(event);</div><div class='add'>+		else</div><div class='add'>+			intel_pmu_save_and_restart(event);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void</div><div class='hunk'>@@ -2446,8 +2465,9 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs, struct perf_sample_</div><div class='ctx'> 				setup_pebs_fixed_sample_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_pmu_pebs_event_update_no_drain(struct cpu_hw_events *cpuc, int size)</div><div class='add'>+static void intel_pmu_pebs_event_update_no_drain(struct cpu_hw_events *cpuc, u64 mask)</div><div class='ctx'> {</div><div class='add'>+	u64 pebs_enabled = cpuc-&gt;pebs_enabled &amp; mask;</div><div class='ctx'> 	struct perf_event *event;</div><div class='ctx'> 	int bit;</div><div class='ctx'> </div><div class='hunk'>@@ -2458,7 +2478,7 @@ static void intel_pmu_pebs_event_update_no_drain(struct cpu_hw_events *cpuc, int</div><div class='ctx'> 	 * It needs to call intel_pmu_save_and_restart_reload() to</div><div class='ctx'> 	 * update the event-&gt;count for this case.</div><div class='ctx'> 	 */</div><div class='del'>-	for_each_set_bit(bit, (unsigned long *)&amp;cpuc-&gt;pebs_enabled, size) {</div><div class='add'>+	for_each_set_bit(bit, (unsigned long *)&amp;pebs_enabled, X86_PMC_IDX_MAX) {</div><div class='ctx'> 		event = cpuc-&gt;events[bit];</div><div class='ctx'> 		if (event-&gt;hw.flags &amp; PERF_X86_EVENT_AUTO_RELOAD)</div><div class='ctx'> 			intel_pmu_save_and_restart_reload(event, 0);</div><div class='hunk'>@@ -2493,7 +2513,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, struct perf_sample_d</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(base &gt;= top)) {</div><div class='del'>-		intel_pmu_pebs_event_update_no_drain(cpuc, size);</div><div class='add'>+		intel_pmu_pebs_event_update_no_drain(cpuc, mask);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2569,8 +2589,8 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, struct perf_sample_d</div><div class='ctx'> 		if (error[bit]) {</div><div class='ctx'> 			perf_log_lost_samples(event, error[bit]);</div><div class='ctx'> </div><div class='del'>-			if (iregs &amp;&amp; perf_event_account_interrupt(event))</div><div class='del'>-				x86_pmu_stop(event, 0);</div><div class='add'>+			if (iregs)</div><div class='add'>+				perf_event_account_interrupt(event);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (counts[bit]) {</div><div class='hunk'>@@ -2607,7 +2627,7 @@ static void intel_pmu_drain_pebs_icl(struct pt_regs *iregs, struct perf_sample_d</div><div class='ctx'> 	       (hybrid(cpuc-&gt;pmu, fixed_cntr_mask64) &lt;&lt; INTEL_PMC_IDX_FIXED);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(base &gt;= top)) {</div><div class='del'>-		intel_pmu_pebs_event_update_no_drain(cpuc, X86_PMC_IDX_MAX);</div><div class='add'>+		intel_pmu_pebs_event_update_no_drain(cpuc, mask);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2650,10 +2670,10 @@ static void intel_pmu_drain_pebs_icl(struct pt_regs *iregs, struct perf_sample_d</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * BTS, PEBS probe and setup</div><div class='add'>+ * PEBS probe and setup</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-void __init intel_ds_init(void)</div><div class='add'>+void __init intel_pebs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * No support for 32bit formats</div><div class='hunk'>@@ -2661,13 +2681,12 @@ void __init intel_ds_init(void)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_DTES64))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	x86_pmu.bts  = boot_cpu_has(X86_FEATURE_BTS);</div><div class='del'>-	x86_pmu.pebs = boot_cpu_has(X86_FEATURE_PEBS);</div><div class='add'>+	x86_pmu.ds_pebs = boot_cpu_has(X86_FEATURE_PEBS);</div><div class='ctx'> 	x86_pmu.pebs_buffer_size = PEBS_BUFFER_SIZE;</div><div class='ctx'> 	if (x86_pmu.version &lt;= 4)</div><div class='ctx'> 		x86_pmu.pebs_no_isolation = 1;</div><div class='ctx'> </div><div class='del'>-	if (x86_pmu.pebs) {</div><div class='add'>+	if (x86_pmu.ds_pebs) {</div><div class='ctx'> 		char pebs_type = x86_pmu.intel_cap.pebs_trap ?  '+' : '-';</div><div class='ctx'> 		char *pebs_qual = "";</div><div class='ctx'> 		int format = x86_pmu.intel_cap.pebs_format;</div><div class='hunk'>@@ -2675,6 +2694,11 @@ void __init intel_ds_init(void)</div><div class='ctx'> 		if (format &lt; 4)</div><div class='ctx'> 			x86_pmu.intel_cap.pebs_baseline = 0;</div><div class='ctx'> </div><div class='add'>+		x86_pmu.pebs_enable = intel_pmu_pebs_enable;</div><div class='add'>+		x86_pmu.pebs_disable = intel_pmu_pebs_disable;</div><div class='add'>+		x86_pmu.pebs_enable_all = intel_pmu_pebs_enable_all;</div><div class='add'>+		x86_pmu.pebs_disable_all = intel_pmu_pebs_disable_all;</div><div class='add'>+</div><div class='ctx'> 		switch (format) {</div><div class='ctx'> 		case 0:</div><div class='ctx'> 			pr_cont("PEBS fmt0%c, ", pebs_type);</div><div class='hunk'>@@ -2759,7 +2783,7 @@ void __init intel_ds_init(void)</div><div class='ctx'> </div><div class='ctx'> 		default:</div><div class='ctx'> 			pr_cont("no PEBS fmt%d%c, ", format, pebs_type);</div><div class='del'>-			x86_pmu.pebs = 0;</div><div class='add'>+			x86_pmu.ds_pebs = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2768,8 +2792,8 @@ void perf_restore_debug_store(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct debug_store *ds = __this_cpu_read(cpu_hw_events.ds);</div><div class='ctx'> </div><div class='del'>-	if (!x86_pmu.bts &amp;&amp; !x86_pmu.pebs)</div><div class='add'>+	if (!x86_pmu.bts &amp;&amp; !x86_pmu.ds_pebs)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_DS_AREA, (unsigned long)ds);</div><div class='add'>+	wrmsrq(MSR_IA32_DS_AREA, (unsigned long)ds);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/events/intel/knc.c b/arch/x86/events/intel/knc.c<br/>index 034a1f6a457c..e614baf42926 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/knc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/knc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/knc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/knc.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='hunk'>@@ -159,18 +160,18 @@ static void knc_pmu_disable_all(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='add'>+	rdmsrq(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='ctx'> 	val &amp;= ~(KNC_ENABLE_COUNTER0|KNC_ENABLE_COUNTER1);</div><div class='del'>-	wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='add'>+	wrmsrq(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void knc_pmu_enable_all(int added)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='add'>+	rdmsrq(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='ctx'> 	val |= (KNC_ENABLE_COUNTER0|KNC_ENABLE_COUNTER1);</div><div class='del'>-	wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='add'>+	wrmsrq(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -182,7 +183,7 @@ knc_pmu_disable_event(struct perf_event *event)</div><div class='ctx'> 	val = hwc-&gt;config;</div><div class='ctx'> 	val &amp;= ~ARCH_PERFMON_EVENTSEL_ENABLE;</div><div class='ctx'> </div><div class='del'>-	(void)wrmsrl_safe(hwc-&gt;config_base + hwc-&gt;idx, val);</div><div class='add'>+	(void)wrmsrq_safe(hwc-&gt;config_base + hwc-&gt;idx, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void knc_pmu_enable_event(struct perf_event *event)</div><div class='hunk'>@@ -193,21 +194,21 @@ static void knc_pmu_enable_event(struct perf_event *event)</div><div class='ctx'> 	val = hwc-&gt;config;</div><div class='ctx'> 	val |= ARCH_PERFMON_EVENTSEL_ENABLE;</div><div class='ctx'> </div><div class='del'>-	(void)wrmsrl_safe(hwc-&gt;config_base + hwc-&gt;idx, val);</div><div class='add'>+	(void)wrmsrq_safe(hwc-&gt;config_base + hwc-&gt;idx, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u64 knc_pmu_get_status(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 status;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status);</div><div class='add'>+	rdmsrq(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void knc_pmu_ack_status(u64 ack)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack);</div><div class='add'>+	wrmsrq(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int knc_pmu_handle_irq(struct pt_regs *regs)</div><div class='hunk'>@@ -241,19 +242,20 @@ again:</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(bit, (unsigned long *)&amp;status, X86_PMC_IDX_MAX) {</div><div class='ctx'> 		struct perf_event *event = cpuc-&gt;events[bit];</div><div class='add'>+		u64 last_period;</div><div class='ctx'> </div><div class='ctx'> 		handled++;</div><div class='ctx'> </div><div class='ctx'> 		if (!test_bit(bit, cpuc-&gt;active_mask))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		last_period = event-&gt;hw.last_period;</div><div class='ctx'> 		if (!intel_pmu_save_and_restart(event))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		perf_sample_data_init(&amp;data, 0, event-&gt;hw.last_period);</div><div class='add'>+		perf_sample_data_init(&amp;data, 0, last_period);</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c<br/>index f44c3d866f24..7aa59966e7c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/lbr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/lbr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/lbr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/lbr.c</a></div><div class='hunk'>@@ -137,9 +137,9 @@ static void __intel_pmu_lbr_enable(bool pmi)</div><div class='ctx'> 	if (cpuc-&gt;lbr_sel)</div><div class='ctx'> 		lbr_select = cpuc-&gt;lbr_sel-&gt;config &amp; x86_pmu.lbr_sel_mask;</div><div class='ctx'> 	if (!static_cpu_has(X86_FEATURE_ARCH_LBR) &amp;&amp; !pmi &amp;&amp; cpuc-&gt;lbr_sel)</div><div class='del'>-		wrmsrl(MSR_LBR_SELECT, lbr_select);</div><div class='add'>+		wrmsrq(MSR_LBR_SELECT, lbr_select);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+	rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> 	orig_debugctl = debugctl;</div><div class='ctx'> </div><div class='ctx'> 	if (!static_cpu_has(X86_FEATURE_ARCH_LBR))</div><div class='hunk'>@@ -155,10 +155,10 @@ static void __intel_pmu_lbr_enable(bool pmi)</div><div class='ctx'> 		debugctl |= DEBUGCTLMSR_FREEZE_LBRS_ON_PMI;</div><div class='ctx'> </div><div class='ctx'> 	if (orig_debugctl != debugctl)</div><div class='del'>-		wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+		wrmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> </div><div class='ctx'> 	if (static_cpu_has(X86_FEATURE_ARCH_LBR))</div><div class='del'>-		wrmsrl(MSR_ARCH_LBR_CTL, lbr_select | ARCH_LBR_CTL_LBREN);</div><div class='add'>+		wrmsrq(MSR_ARCH_LBR_CTL, lbr_select | ARCH_LBR_CTL_LBREN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_lbr_reset_32(void)</div><div class='hunk'>@@ -166,7 +166,7 @@ void intel_pmu_lbr_reset_32(void)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; x86_pmu.lbr_nr; i++)</div><div class='del'>-		wrmsrl(x86_pmu.lbr_from + i, 0);</div><div class='add'>+		wrmsrq(x86_pmu.lbr_from + i, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_lbr_reset_64(void)</div><div class='hunk'>@@ -174,17 +174,17 @@ void intel_pmu_lbr_reset_64(void)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; x86_pmu.lbr_nr; i++) {</div><div class='del'>-		wrmsrl(x86_pmu.lbr_from + i, 0);</div><div class='del'>-		wrmsrl(x86_pmu.lbr_to   + i, 0);</div><div class='add'>+		wrmsrq(x86_pmu.lbr_from + i, 0);</div><div class='add'>+		wrmsrq(x86_pmu.lbr_to   + i, 0);</div><div class='ctx'> 		if (x86_pmu.lbr_has_info)</div><div class='del'>-			wrmsrl(x86_pmu.lbr_info + i, 0);</div><div class='add'>+			wrmsrq(x86_pmu.lbr_info + i, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pmu_arch_lbr_reset(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Write to ARCH_LBR_DEPTH MSR, all LBR entries are reset to 0 */</div><div class='del'>-	wrmsrl(MSR_ARCH_LBR_DEPTH, x86_pmu.lbr_nr);</div><div class='add'>+	wrmsrq(MSR_ARCH_LBR_DEPTH, x86_pmu.lbr_nr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_lbr_reset(void)</div><div class='hunk'>@@ -199,7 +199,7 @@ void intel_pmu_lbr_reset(void)</div><div class='ctx'> 	cpuc-&gt;last_task_ctx = NULL;</div><div class='ctx'> 	cpuc-&gt;last_log_id = 0;</div><div class='ctx'> 	if (!static_cpu_has(X86_FEATURE_ARCH_LBR) &amp;&amp; cpuc-&gt;lbr_select)</div><div class='del'>-		wrmsrl(MSR_LBR_SELECT, 0);</div><div class='add'>+		wrmsrq(MSR_LBR_SELECT, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -209,7 +209,7 @@ static inline u64 intel_pmu_lbr_tos(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 tos;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(x86_pmu.lbr_tos, tos);</div><div class='add'>+	rdmsrq(x86_pmu.lbr_tos, tos);</div><div class='ctx'> 	return tos;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -282,17 +282,17 @@ static u64 lbr_from_signext_quirk_rd(u64 val)</div><div class='ctx'> static __always_inline void wrlbr_from(unsigned int idx, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	val = lbr_from_signext_quirk_wr(val);</div><div class='del'>-	wrmsrl(x86_pmu.lbr_from + idx, val);</div><div class='add'>+	wrmsrq(x86_pmu.lbr_from + idx, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void wrlbr_to(unsigned int idx, u64 val)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(x86_pmu.lbr_to + idx, val);</div><div class='add'>+	wrmsrq(x86_pmu.lbr_to + idx, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void wrlbr_info(unsigned int idx, u64 val)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(x86_pmu.lbr_info + idx, val);</div><div class='add'>+	wrmsrq(x86_pmu.lbr_info + idx, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 rdlbr_from(unsigned int idx, struct lbr_entry *lbr)</div><div class='hunk'>@@ -302,7 +302,7 @@ static __always_inline u64 rdlbr_from(unsigned int idx, struct lbr_entry *lbr)</div><div class='ctx'> 	if (lbr)</div><div class='ctx'> 		return lbr-&gt;from;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(x86_pmu.lbr_from + idx, val);</div><div class='add'>+	rdmsrq(x86_pmu.lbr_from + idx, val);</div><div class='ctx'> </div><div class='ctx'> 	return lbr_from_signext_quirk_rd(val);</div><div class='ctx'> }</div><div class='hunk'>@@ -314,7 +314,7 @@ static __always_inline u64 rdlbr_to(unsigned int idx, struct lbr_entry *lbr)</div><div class='ctx'> 	if (lbr)</div><div class='ctx'> 		return lbr-&gt;to;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(x86_pmu.lbr_to + idx, val);</div><div class='add'>+	rdmsrq(x86_pmu.lbr_to + idx, val);</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='hunk'>@@ -326,7 +326,7 @@ static __always_inline u64 rdlbr_info(unsigned int idx, struct lbr_entry *lbr)</div><div class='ctx'> 	if (lbr)</div><div class='ctx'> 		return lbr-&gt;info;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(x86_pmu.lbr_info + idx, val);</div><div class='add'>+	rdmsrq(x86_pmu.lbr_info + idx, val);</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='hunk'>@@ -380,10 +380,10 @@ void intel_pmu_lbr_restore(void *ctx)</div><div class='ctx'> 			wrlbr_info(lbr_idx, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(x86_pmu.lbr_tos, tos);</div><div class='add'>+	wrmsrq(x86_pmu.lbr_tos, tos);</div><div class='ctx'> </div><div class='ctx'> 	if (cpuc-&gt;lbr_select)</div><div class='del'>-		wrmsrl(MSR_LBR_SELECT, task_ctx-&gt;lbr_sel);</div><div class='add'>+		wrmsrq(MSR_LBR_SELECT, task_ctx-&gt;lbr_sel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pmu_arch_lbr_restore(void *ctx)</div><div class='hunk'>@@ -475,7 +475,7 @@ void intel_pmu_lbr_save(void *ctx)</div><div class='ctx'> 	task_ctx-&gt;tos = tos;</div><div class='ctx'> </div><div class='ctx'> 	if (cpuc-&gt;lbr_select)</div><div class='del'>-		rdmsrl(MSR_LBR_SELECT, task_ctx-&gt;lbr_sel);</div><div class='add'>+		rdmsrq(MSR_LBR_SELECT, task_ctx-&gt;lbr_sel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pmu_arch_lbr_save(void *ctx)</div><div class='hunk'>@@ -752,7 +752,7 @@ void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc)</div><div class='ctx'> 			u64     lbr;</div><div class='ctx'> 		} msr_lastbranch;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr);</div><div class='add'>+		rdmsrq(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr);</div><div class='ctx'> </div><div class='ctx'> 		perf_clear_branch_entry_bitfields(br);</div><div class='ctx'> </div><div class='hunk'>@@ -1602,7 +1602,7 @@ void __init intel_pmu_arch_lbr_init(void)</div><div class='ctx'> 		goto clear_arch_lbr;</div><div class='ctx'> </div><div class='ctx'> 	/* Apply the max depth of Arch LBR */</div><div class='del'>-	if (wrmsrl_safe(MSR_ARCH_LBR_DEPTH, lbr_nr))</div><div class='add'>+	if (wrmsrq_safe(MSR_ARCH_LBR_DEPTH, lbr_nr))</div><div class='ctx'> 		goto clear_arch_lbr;</div><div class='ctx'> </div><div class='ctx'> 	x86_pmu.lbr_depth_mask = eax.split.lbr_depth_mask;</div><div class='hunk'>@@ -1618,7 +1618,7 @@ void __init intel_pmu_arch_lbr_init(void)</div><div class='ctx'> 	x86_pmu.lbr_nr = lbr_nr;</div><div class='ctx'> </div><div class='ctx'> 	if (!!x86_pmu.lbr_counters)</div><div class='del'>-		x86_pmu.flags |= PMU_FL_BR_CNTR;</div><div class='add'>+		x86_pmu.flags |= PMU_FL_BR_CNTR | PMU_FL_DYN_CONSTRAINT;</div><div class='ctx'> </div><div class='ctx'> 	if (x86_pmu.lbr_mispred)</div><div class='ctx'> 		static_branch_enable(&amp;x86_lbr_mispred);</div><div class='head'>diff --git a/arch/x86/events/intel/p4.c b/arch/x86/events/intel/p4.c<br/>index c85a9fc44355..e5fd7367e45d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/p4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/p4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/p4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/p4.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='hunk'>@@ -859,9 +860,9 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)</div><div class='ctx'> 	u64 v;</div><div class='ctx'> </div><div class='ctx'> 	/* an official way for overflow indication */</div><div class='del'>-	rdmsrl(hwc-&gt;config_base, v);</div><div class='add'>+	rdmsrq(hwc-&gt;config_base, v);</div><div class='ctx'> 	if (v &amp; P4_CCCR_OVF) {</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, v &amp; ~P4_CCCR_OVF);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, v &amp; ~P4_CCCR_OVF);</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -872,7 +873,7 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)</div><div class='ctx'> 	 * the counter has reached zero value and continued counting before</div><div class='ctx'> 	 * real NMI signal was received:</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(hwc-&gt;event_base, v);</div><div class='add'>+	rdmsrq(hwc-&gt;event_base, v);</div><div class='ctx'> 	if (!(v &amp; ARCH_P4_UNFLAGGED_BIT))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='hunk'>@@ -897,8 +898,8 @@ static void p4_pmu_disable_pebs(void)</div><div class='ctx'> 	 * So at moment let leave metrics turned on forever -- it's</div><div class='ctx'> 	 * ok for now but need to be revisited!</div><div class='ctx'> 	 *</div><div class='del'>-	 * (void)wrmsrl_safe(MSR_IA32_PEBS_ENABLE, 0);</div><div class='del'>-	 * (void)wrmsrl_safe(MSR_P4_PEBS_MATRIX_VERT, 0);</div><div class='add'>+	 * (void)wrmsrq_safe(MSR_IA32_PEBS_ENABLE, 0);</div><div class='add'>+	 * (void)wrmsrq_safe(MSR_P4_PEBS_MATRIX_VERT, 0);</div><div class='ctx'> 	 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -911,7 +912,7 @@ static inline void p4_pmu_disable_event(struct perf_event *event)</div><div class='ctx'> 	 * state we need to clear P4_CCCR_OVF, otherwise interrupt get</div><div class='ctx'> 	 * asserted again and again</div><div class='ctx'> 	 */</div><div class='del'>-	(void)wrmsrl_safe(hwc-&gt;config_base,</div><div class='add'>+	(void)wrmsrq_safe(hwc-&gt;config_base,</div><div class='ctx'> 		p4_config_unpack_cccr(hwc-&gt;config) &amp; ~P4_CCCR_ENABLE &amp; ~P4_CCCR_OVF &amp; ~P4_CCCR_RESERVED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -944,8 +945,8 @@ static void p4_pmu_enable_pebs(u64 config)</div><div class='ctx'> </div><div class='ctx'> 	bind = &amp;p4_pebs_bind_map[idx];</div><div class='ctx'> </div><div class='del'>-	(void)wrmsrl_safe(MSR_IA32_PEBS_ENABLE,	(u64)bind-&gt;metric_pebs);</div><div class='del'>-	(void)wrmsrl_safe(MSR_P4_PEBS_MATRIX_VERT,	(u64)bind-&gt;metric_vert);</div><div class='add'>+	(void)wrmsrq_safe(MSR_IA32_PEBS_ENABLE,	(u64)bind-&gt;metric_pebs);</div><div class='add'>+	(void)wrmsrq_safe(MSR_P4_PEBS_MATRIX_VERT,	(u64)bind-&gt;metric_vert);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __p4_pmu_enable_event(struct perf_event *event)</div><div class='hunk'>@@ -979,8 +980,8 @@ static void __p4_pmu_enable_event(struct perf_event *event)</div><div class='ctx'> 	 */</div><div class='ctx'> 	p4_pmu_enable_pebs(hwc-&gt;config);</div><div class='ctx'> </div><div class='del'>-	(void)wrmsrl_safe(escr_addr, escr_conf);</div><div class='del'>-	(void)wrmsrl_safe(hwc-&gt;config_base,</div><div class='add'>+	(void)wrmsrq_safe(escr_addr, escr_conf);</div><div class='add'>+	(void)wrmsrq_safe(hwc-&gt;config_base,</div><div class='ctx'> 				(cccr &amp; ~P4_CCCR_RESERVED) | P4_CCCR_ENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1024,7 +1025,7 @@ static int p4_pmu_set_period(struct perf_event *event)</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * the former idea is taken from OProfile code</div><div class='ctx'> 		 */</div><div class='del'>-		wrmsrl(hwc-&gt;event_base, (u64)(-left) &amp; x86_pmu.cntval_mask);</div><div class='add'>+		wrmsrq(hwc-&gt;event_base, (u64)(-left) &amp; x86_pmu.cntval_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1072,8 +1073,7 @@ static int p4_pmu_handle_irq(struct pt_regs *regs)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (handled)</div><div class='hunk'>@@ -1398,7 +1398,7 @@ __init int p4_pmu_init(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_set_bit(i, x86_pmu.cntr_mask, X86_PMC_IDX_MAX) {</div><div class='ctx'> 		reg = x86_pmu_config_addr(i);</div><div class='del'>-		wrmsrl_safe(reg, 0ULL);</div><div class='add'>+		wrmsrq_safe(reg, 0ULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/arch/x86/events/intel/p6.c b/arch/x86/events/intel/p6.c<br/>index 65b45e9d7016..6e41de355bd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/p6.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/p6.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/p6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/p6.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='hunk'>@@ -142,9 +143,9 @@ static void p6_pmu_disable_all(void)</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	/* p6 only has one enable register */</div><div class='del'>-	rdmsrl(MSR_P6_EVNTSEL0, val);</div><div class='add'>+	rdmsrq(MSR_P6_EVNTSEL0, val);</div><div class='ctx'> 	val &amp;= ~ARCH_PERFMON_EVENTSEL_ENABLE;</div><div class='del'>-	wrmsrl(MSR_P6_EVNTSEL0, val);</div><div class='add'>+	wrmsrq(MSR_P6_EVNTSEL0, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void p6_pmu_enable_all(int added)</div><div class='hunk'>@@ -152,9 +153,9 @@ static void p6_pmu_enable_all(int added)</div><div class='ctx'> 	unsigned long val;</div><div class='ctx'> </div><div class='ctx'> 	/* p6 only has one enable register */</div><div class='del'>-	rdmsrl(MSR_P6_EVNTSEL0, val);</div><div class='add'>+	rdmsrq(MSR_P6_EVNTSEL0, val);</div><div class='ctx'> 	val |= ARCH_PERFMON_EVENTSEL_ENABLE;</div><div class='del'>-	wrmsrl(MSR_P6_EVNTSEL0, val);</div><div class='add'>+	wrmsrq(MSR_P6_EVNTSEL0, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='hunk'>@@ -163,7 +164,7 @@ p6_pmu_disable_event(struct perf_event *event)</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> 	u64 val = P6_NOP_EVENT;</div><div class='ctx'> </div><div class='del'>-	(void)wrmsrl_safe(hwc-&gt;config_base, val);</div><div class='add'>+	(void)wrmsrq_safe(hwc-&gt;config_base, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void p6_pmu_enable_event(struct perf_event *event)</div><div class='hunk'>@@ -180,7 +181,7 @@ static void p6_pmu_enable_event(struct perf_event *event)</div><div class='ctx'> 	 * to actually enable the events.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	(void)wrmsrl_safe(hwc-&gt;config_base, val);</div><div class='add'>+	(void)wrmsrq_safe(hwc-&gt;config_base, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> PMU_FORMAT_ATTR(event,	"config:0-7"	);</div><div class='head'>diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c<br/>index fa37565f6418..e8cf29d2b10c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/pt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/pt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/pt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/pt.c</a></div><div class='hunk'>@@ -18,12 +18,13 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/intel_pt.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> #include "pt.h"</div><div class='hunk'>@@ -194,7 +195,7 @@ static int __init pt_pmu_hw_init(void)</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	long i;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_PLATFORM_INFO, reg);</div><div class='add'>+	rdmsrq(MSR_PLATFORM_INFO, reg);</div><div class='ctx'> 	pt_pmu.max_nonturbo_ratio = (reg &amp; 0xff00) &gt;&gt; 8;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -230,7 +231,7 @@ static int __init pt_pmu_hw_init(void)</div><div class='ctx'> 		 * "IA32_VMX_MISC[bit 14]" being 1 means PT can trace</div><div class='ctx'> 		 * post-VMXON.</div><div class='ctx'> 		 */</div><div class='del'>-		rdmsrl(MSR_IA32_VMX_MISC, reg);</div><div class='add'>+		rdmsrq(MSR_IA32_VMX_MISC, reg);</div><div class='ctx'> 		if (reg &amp; BIT(14))</div><div class='ctx'> 			pt_pmu.vmx = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -426,7 +427,7 @@ static void pt_config_start(struct perf_event *event)</div><div class='ctx'> 	if (READ_ONCE(pt-&gt;vmx_on))</div><div class='ctx'> 		perf_aux_output_flag(&amp;pt-&gt;handle, PERF_AUX_FLAG_PARTIAL);</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_CTL, ctl);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_CTL, ctl);</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(event-&gt;hw.aux_config, ctl);</div><div class='ctx'> }</div><div class='hunk'>@@ -485,12 +486,12 @@ static u64 pt_config_filters(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> 		/* avoid redundant msr writes */</div><div class='ctx'> 		if (pt-&gt;filters.filter[range].msr_a != filter-&gt;msr_a) {</div><div class='del'>-			wrmsrl(pt_address_ranges[range].msr_a, filter-&gt;msr_a);</div><div class='add'>+			wrmsrq(pt_address_ranges[range].msr_a, filter-&gt;msr_a);</div><div class='ctx'> 			pt-&gt;filters.filter[range].msr_a = filter-&gt;msr_a;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (pt-&gt;filters.filter[range].msr_b != filter-&gt;msr_b) {</div><div class='del'>-			wrmsrl(pt_address_ranges[range].msr_b, filter-&gt;msr_b);</div><div class='add'>+			wrmsrq(pt_address_ranges[range].msr_b, filter-&gt;msr_b);</div><div class='ctx'> 			pt-&gt;filters.filter[range].msr_b = filter-&gt;msr_b;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -509,7 +510,7 @@ static void pt_config(struct perf_event *event)</div><div class='ctx'> 	/* First round: clear STATUS, in particular the PSB byte counter. */</div><div class='ctx'> 	if (!event-&gt;hw.aux_config) {</div><div class='ctx'> 		perf_event_itrace_started(event);</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_STATUS, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_STATUS, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	reg = pt_config_filters(event);</div><div class='hunk'>@@ -569,7 +570,7 @@ static void pt_config_stop(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> 	ctl &amp;= ~RTIT_CTL_TRACEEN;</div><div class='ctx'> 	if (!READ_ONCE(pt-&gt;vmx_on))</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_CTL, ctl);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_CTL, ctl);</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(event-&gt;hw.aux_config, ctl);</div><div class='ctx'> </div><div class='hunk'>@@ -658,13 +659,13 @@ static void pt_config_buffer(struct pt_buffer *buf)</div><div class='ctx'> 	reg = virt_to_phys(base);</div><div class='ctx'> 	if (pt-&gt;output_base != reg) {</div><div class='ctx'> 		pt-&gt;output_base = reg;</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, reg);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_OUTPUT_BASE, reg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	reg = 0x7f | (mask &lt;&lt; 7) | ((u64)buf-&gt;output_off &lt;&lt; 32);</div><div class='ctx'> 	if (pt-&gt;output_mask != reg) {</div><div class='ctx'> 		pt-&gt;output_mask = reg;</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, reg);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_OUTPUT_MASK, reg);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -926,7 +927,7 @@ static void pt_handle_status(struct pt *pt)</div><div class='ctx'> 	int advance = 0;</div><div class='ctx'> 	u64 status;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_STATUS, status);</div><div class='add'>+	rdmsrq(MSR_IA32_RTIT_STATUS, status);</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; RTIT_STATUS_ERROR) {</div><div class='ctx'> 		pr_err_ratelimited("ToPA ERROR encountered, trying to recover\n");</div><div class='hunk'>@@ -970,7 +971,7 @@ static void pt_handle_status(struct pt *pt)</div><div class='ctx'> 	if (advance)</div><div class='ctx'> 		pt_buffer_advance(buf);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_RTIT_STATUS, status);</div><div class='add'>+	wrmsrq(MSR_IA32_RTIT_STATUS, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -985,12 +986,12 @@ static void pt_read_offset(struct pt_buffer *buf)</div><div class='ctx'> 	struct topa_page *tp;</div><div class='ctx'> </div><div class='ctx'> 	if (!buf-&gt;single) {</div><div class='del'>-		rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, pt-&gt;output_base);</div><div class='add'>+		rdmsrq(MSR_IA32_RTIT_OUTPUT_BASE, pt-&gt;output_base);</div><div class='ctx'> 		tp = phys_to_virt(pt-&gt;output_base);</div><div class='ctx'> 		buf-&gt;cur = &amp;tp-&gt;topa;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, pt-&gt;output_mask);</div><div class='add'>+	rdmsrq(MSR_IA32_RTIT_OUTPUT_MASK, pt-&gt;output_mask);</div><div class='ctx'> 	/* offset within current output region */</div><div class='ctx'> 	buf-&gt;output_off = pt-&gt;output_mask &gt;&gt; 32;</div><div class='ctx'> 	/* index of current output region within this table */</div><div class='hunk'>@@ -1585,7 +1586,7 @@ void intel_pt_handle_vmx(int on)</div><div class='ctx'> </div><div class='ctx'> 	/* Turn PTs back on */</div><div class='ctx'> 	if (!on &amp;&amp; event)</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_CTL, event-&gt;hw.aux_config);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_CTL, event-&gt;hw.aux_config);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -1611,7 +1612,7 @@ static void pt_event_start(struct perf_event *event, int mode)</div><div class='ctx'> 			 * PMI might have just cleared these, so resume_allowed</div><div class='ctx'> 			 * must be checked again also.</div><div class='ctx'> 			 */</div><div class='del'>-			rdmsrl(MSR_IA32_RTIT_STATUS, status);</div><div class='add'>+			rdmsrq(MSR_IA32_RTIT_STATUS, status);</div><div class='ctx'> 			if (!(status &amp; (RTIT_STATUS_TRIGGEREN |</div><div class='ctx'> 					RTIT_STATUS_ERROR |</div><div class='ctx'> 					RTIT_STATUS_STOPPED)) &amp;&amp;</div><div class='hunk'>@@ -1839,7 +1840,7 @@ static __init int pt_init(void)</div><div class='ctx'> 	for_each_online_cpu(cpu) {</div><div class='ctx'> 		u64 ctl;</div><div class='ctx'> </div><div class='del'>-		ret = rdmsrl_safe_on_cpu(cpu, MSR_IA32_RTIT_CTL, &amp;ctl);</div><div class='add'>+		ret = rdmsrq_safe_on_cpu(cpu, MSR_IA32_RTIT_CTL, &amp;ctl);</div><div class='ctx'> 		if (!ret &amp;&amp; (ctl &amp; RTIT_CTL_TRACEEN))</div><div class='ctx'> 			prior_warn++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1863,6 +1864,8 @@ static __init int pt_init(void)</div><div class='ctx'> </div><div class='ctx'> 	if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries))</div><div class='ctx'> 		pt_pmu.pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG;</div><div class='add'>+	else</div><div class='add'>+		pt_pmu.pmu.capabilities = PERF_PMU_CAP_AUX_PREFER_LARGE;</div><div class='ctx'> </div><div class='ctx'> 	pt_pmu.pmu.capabilities		|= PERF_PMU_CAP_EXCLUSIVE |</div><div class='ctx'> 					   PERF_PMU_CAP_ITRACE |</div><div class='head'>diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c<br/>index a34e50fc4a8f..e0815a12db90 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/uncore.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "uncore.h"</div><div class='ctx'> #include "uncore_discovery.h"</div><div class='ctx'> </div><div class='hunk'>@@ -150,7 +151,7 @@ u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *eve</div><div class='ctx'> {</div><div class='ctx'> 	u64 count;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(event-&gt;hw.event_base, count);</div><div class='add'>+	rdmsrq(event-&gt;hw.event_base, count);</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='hunk'>@@ -305,17 +306,11 @@ static enum hrtimer_restart uncore_pmu_hrtimer(struct hrtimer *hrtimer)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_uncore_box *box;</div><div class='ctx'> 	struct perf_event *event;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	int bit;</div><div class='ctx'> </div><div class='ctx'> 	box = container_of(hrtimer, struct intel_uncore_box, hrtimer);</div><div class='ctx'> 	if (!box-&gt;n_active || box-&gt;cpu != smp_processor_id())</div><div class='ctx'> 		return HRTIMER_NORESTART;</div><div class='del'>-	/*</div><div class='del'>-	 * disable local interrupt to prevent uncore_pmu_event_start/stop</div><div class='del'>-	 * to interrupt the update process</div><div class='del'>-	 */</div><div class='del'>-	local_irq_save(flags);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * handle boxes with an active event list as opposed to active</div><div class='hunk'>@@ -328,8 +323,6 @@ static enum hrtimer_restart uncore_pmu_hrtimer(struct hrtimer *hrtimer)</div><div class='ctx'> 	for_each_set_bit(bit, box-&gt;active_mask, UNCORE_PMC_IDX_MAX)</div><div class='ctx'> 		uncore_perf_event_update(box, box-&gt;events[bit]);</div><div class='ctx'> </div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='ctx'> 	hrtimer_forward_now(hrtimer, ns_to_ktime(box-&gt;hrtimer_duration));</div><div class='ctx'> 	return HRTIMER_RESTART;</div><div class='ctx'> }</div><div class='hunk'>@@ -337,7 +330,7 @@ static enum hrtimer_restart uncore_pmu_hrtimer(struct hrtimer *hrtimer)</div><div class='ctx'> void uncore_pmu_start_hrtimer(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	hrtimer_start(&amp;box-&gt;hrtimer, ns_to_ktime(box-&gt;hrtimer_duration),</div><div class='del'>-		      HRTIMER_MODE_REL_PINNED);</div><div class='add'>+		      HRTIMER_MODE_REL_PINNED_HARD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box)</div><div class='hunk'>@@ -347,7 +340,7 @@ void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box)</div><div class='ctx'> </div><div class='ctx'> static void uncore_pmu_init_hrtimer(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	hrtimer_setup(&amp;box-&gt;hrtimer, uncore_pmu_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='add'>+	hrtimer_setup(&amp;box-&gt;hrtimer, uncore_pmu_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_HARD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_box *uncore_alloc_box(struct intel_uncore_type *type,</div><div class='head'>diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/intel/uncore_discovery.c<br/>index 571e44b49691..18a3022f26a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_discovery.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_discovery.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_discovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/uncore_discovery.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "uncore.h"</div><div class='ctx'> #include "uncore_discovery.h"</div><div class='ctx'> </div><div class='hunk'>@@ -441,17 +442,17 @@ static u64 intel_generic_uncore_box_ctl(struct intel_uncore_box *box)</div><div class='ctx'> </div><div class='ctx'> void intel_generic_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(intel_generic_uncore_box_ctl(box), GENERIC_PMON_BOX_CTL_INT);</div><div class='add'>+	wrmsrq(intel_generic_uncore_box_ctl(box), GENERIC_PMON_BOX_CTL_INT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_generic_uncore_msr_disable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(intel_generic_uncore_box_ctl(box), GENERIC_PMON_BOX_CTL_FRZ);</div><div class='add'>+	wrmsrq(intel_generic_uncore_box_ctl(box), GENERIC_PMON_BOX_CTL_FRZ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_generic_uncore_msr_enable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(intel_generic_uncore_box_ctl(box), 0);</div><div class='add'>+	wrmsrq(intel_generic_uncore_box_ctl(box), 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_generic_uncore_msr_enable_event(struct intel_uncore_box *box,</div><div class='hunk'>@@ -459,7 +460,7 @@ static void intel_generic_uncore_msr_enable_event(struct intel_uncore_box *box,</div><div class='ctx'> {</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_generic_uncore_msr_disable_event(struct intel_uncore_box *box,</div><div class='hunk'>@@ -467,7 +468,7 @@ static void intel_generic_uncore_msr_disable_event(struct intel_uncore_box *box,</div><div class='ctx'> {</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, 0);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops generic_uncore_msr_ops = {</div><div class='head'>diff --git a/arch/x86/events/intel/uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c<br/>index 466833478e81..8962e7cb21e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_nhmex.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_nhmex.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_nhmex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/uncore_nhmex.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Nehalem-EX/Westmere-EX uncore support */</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "uncore.h"</div><div class='ctx'> </div><div class='ctx'> /* NHM-EX event control */</div><div class='hunk'>@@ -200,12 +201,12 @@ DEFINE_UNCORE_FORMAT_ATTR(mask, mask, "config2:0-63");</div><div class='ctx'> </div><div class='ctx'> static void nhmex_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, NHMEX_U_PMON_GLOBAL_EN_ALL);</div><div class='add'>+	wrmsrq(NHMEX_U_MSR_PMON_GLOBAL_CTL, NHMEX_U_PMON_GLOBAL_EN_ALL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nhmex_uncore_msr_exit_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, 0);</div><div class='add'>+	wrmsrq(NHMEX_U_MSR_PMON_GLOBAL_CTL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box)</div><div class='hunk'>@@ -214,12 +215,12 @@ static void nhmex_uncore_msr_disable_box(struct intel_uncore_box *box)</div><div class='ctx'> 	u64 config;</div><div class='ctx'> </div><div class='ctx'> 	if (msr) {</div><div class='del'>-		rdmsrl(msr, config);</div><div class='add'>+		rdmsrq(msr, config);</div><div class='ctx'> 		config &amp;= ~((1ULL &lt;&lt; uncore_num_counters(box)) - 1);</div><div class='ctx'> 		/* WBox has a fixed counter */</div><div class='ctx'> 		if (uncore_msr_fixed_ctl(box))</div><div class='ctx'> 			config &amp;= ~NHMEX_W_PMON_GLOBAL_FIXED_EN;</div><div class='del'>-		wrmsrl(msr, config);</div><div class='add'>+		wrmsrq(msr, config);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -229,18 +230,18 @@ static void nhmex_uncore_msr_enable_box(struct intel_uncore_box *box)</div><div class='ctx'> 	u64 config;</div><div class='ctx'> </div><div class='ctx'> 	if (msr) {</div><div class='del'>-		rdmsrl(msr, config);</div><div class='add'>+		rdmsrq(msr, config);</div><div class='ctx'> 		config |= (1ULL &lt;&lt; uncore_num_counters(box)) - 1;</div><div class='ctx'> 		/* WBox has a fixed counter */</div><div class='ctx'> 		if (uncore_msr_fixed_ctl(box))</div><div class='ctx'> 			config |= NHMEX_W_PMON_GLOBAL_FIXED_EN;</div><div class='del'>-		wrmsrl(msr, config);</div><div class='add'>+		wrmsrq(msr, config);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nhmex_uncore_msr_disable_event(struct intel_uncore_box *box, struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(event-&gt;hw.config_base, 0);</div><div class='add'>+	wrmsrq(event-&gt;hw.config_base, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event)</div><div class='hunk'>@@ -248,11 +249,11 @@ static void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct p</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (hwc-&gt;idx == UNCORE_PMC_IDX_FIXED)</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, NHMEX_PMON_CTL_EN_BIT0);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, NHMEX_PMON_CTL_EN_BIT0);</div><div class='ctx'> 	else if (box-&gt;pmu-&gt;type-&gt;event_mask &amp; NHMEX_PMON_CTL_EN_BIT0)</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT22);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT22);</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT0);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define NHMEX_UNCORE_OPS_COMMON_INIT()				\</div><div class='hunk'>@@ -382,10 +383,10 @@ static void nhmex_bbox_msr_enable_event(struct intel_uncore_box *box, struct per</div><div class='ctx'> 	struct hw_perf_event_extra *reg2 = &amp;hwc-&gt;branch_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE) {</div><div class='del'>-		wrmsrl(reg1-&gt;reg, reg1-&gt;config);</div><div class='del'>-		wrmsrl(reg1-&gt;reg + 1, reg2-&gt;config);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, reg1-&gt;config);</div><div class='add'>+		wrmsrq(reg1-&gt;reg + 1, reg2-&gt;config);</div><div class='ctx'> 	}</div><div class='del'>-	wrmsrl(hwc-&gt;config_base, NHMEX_PMON_CTL_EN_BIT0 |</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, NHMEX_PMON_CTL_EN_BIT0 |</div><div class='ctx'> 		(hwc-&gt;config &amp; NHMEX_B_PMON_CTL_EV_SEL_MASK));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -467,12 +468,12 @@ static void nhmex_sbox_msr_enable_event(struct intel_uncore_box *box, struct per</div><div class='ctx'> 	struct hw_perf_event_extra *reg2 = &amp;hwc-&gt;branch_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE) {</div><div class='del'>-		wrmsrl(reg1-&gt;reg, 0);</div><div class='del'>-		wrmsrl(reg1-&gt;reg + 1, reg1-&gt;config);</div><div class='del'>-		wrmsrl(reg1-&gt;reg + 2, reg2-&gt;config);</div><div class='del'>-		wrmsrl(reg1-&gt;reg, NHMEX_S_PMON_MM_CFG_EN);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, 0);</div><div class='add'>+		wrmsrq(reg1-&gt;reg + 1, reg1-&gt;config);</div><div class='add'>+		wrmsrq(reg1-&gt;reg + 2, reg2-&gt;config);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, NHMEX_S_PMON_MM_CFG_EN);</div><div class='ctx'> 	}</div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT22);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT22);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct attribute *nhmex_uncore_sbox_formats_attr[] = {</div><div class='hunk'>@@ -842,25 +843,25 @@ static void nhmex_mbox_msr_enable_event(struct intel_uncore_box *box, struct per</div><div class='ctx'> </div><div class='ctx'> 	idx = __BITS_VALUE(reg1-&gt;idx, 0, 8);</div><div class='ctx'> 	if (idx != 0xff)</div><div class='del'>-		wrmsrl(__BITS_VALUE(reg1-&gt;reg, 0, 16),</div><div class='add'>+		wrmsrq(__BITS_VALUE(reg1-&gt;reg, 0, 16),</div><div class='ctx'> 			nhmex_mbox_shared_reg_config(box, idx));</div><div class='ctx'> 	idx = __BITS_VALUE(reg1-&gt;idx, 1, 8);</div><div class='ctx'> 	if (idx != 0xff)</div><div class='del'>-		wrmsrl(__BITS_VALUE(reg1-&gt;reg, 1, 16),</div><div class='add'>+		wrmsrq(__BITS_VALUE(reg1-&gt;reg, 1, 16),</div><div class='ctx'> 			nhmex_mbox_shared_reg_config(box, idx));</div><div class='ctx'> </div><div class='ctx'> 	if (reg2-&gt;idx != EXTRA_REG_NONE) {</div><div class='del'>-		wrmsrl(reg2-&gt;reg, 0);</div><div class='add'>+		wrmsrq(reg2-&gt;reg, 0);</div><div class='ctx'> 		if (reg2-&gt;config != ~0ULL) {</div><div class='del'>-			wrmsrl(reg2-&gt;reg + 1,</div><div class='add'>+			wrmsrq(reg2-&gt;reg + 1,</div><div class='ctx'> 				reg2-&gt;config &amp; NHMEX_M_PMON_ADDR_MATCH_MASK);</div><div class='del'>-			wrmsrl(reg2-&gt;reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK &amp;</div><div class='add'>+			wrmsrq(reg2-&gt;reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK &amp;</div><div class='ctx'> 				(reg2-&gt;config &gt;&gt; NHMEX_M_PMON_ADDR_MASK_SHIFT));</div><div class='del'>-			wrmsrl(reg2-&gt;reg, NHMEX_M_PMON_MM_CFG_EN);</div><div class='add'>+			wrmsrq(reg2-&gt;reg, NHMEX_M_PMON_MM_CFG_EN);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT0);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config | NHMEX_PMON_CTL_EN_BIT0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> DEFINE_UNCORE_FORMAT_ATTR(count_mode,		count_mode,	"config:2-3");</div><div class='hunk'>@@ -1121,31 +1122,31 @@ static void nhmex_rbox_msr_enable_event(struct intel_uncore_box *box, struct per</div><div class='ctx'> </div><div class='ctx'> 	switch (idx % 6) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG0(port), reg1-&gt;config);</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_IPERF_CFG0(port), reg1-&gt;config);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG1(port), reg1-&gt;config);</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_IPERF_CFG1(port), reg1-&gt;config);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 	case 3:</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_QLX_CFG(port),</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_QLX_CFG(port),</div><div class='ctx'> 			uncore_shared_reg_config(box, 2 + (idx / 6) * 5));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port),</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port),</div><div class='ctx'> 			hwc-&gt;config &gt;&gt; 32);</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MATCH(port), reg1-&gt;config);</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MASK(port), reg2-&gt;config);</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_XBR_SET1_MATCH(port), reg1-&gt;config);</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_XBR_SET1_MASK(port), reg2-&gt;config);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 5:</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port),</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port),</div><div class='ctx'> 			hwc-&gt;config &gt;&gt; 32);</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MATCH(port), reg1-&gt;config);</div><div class='del'>-		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MASK(port), reg2-&gt;config);</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_XBR_SET2_MATCH(port), reg1-&gt;config);</div><div class='add'>+		wrmsrq(NHMEX_R_MSR_PORTN_XBR_SET2_MASK(port), reg2-&gt;config);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, NHMEX_PMON_CTL_EN_BIT0 |</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, NHMEX_PMON_CTL_EN_BIT0 |</div><div class='ctx'> 		(hwc-&gt;config &amp; NHMEX_R_PMON_CTL_EV_SEL_MASK));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c<br/>index edb7fd50efe0..a1a96833e30e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_snb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_snb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_snb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/uncore_snb.c</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Nehalem/SandBridge/Haswell/Broadwell/Skylake uncore support */</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "uncore.h"</div><div class='ctx'> #include "uncore_discovery.h"</div><div class='ctx'> </div><div class='hunk'>@@ -260,34 +261,34 @@ static void snb_uncore_msr_enable_event(struct intel_uncore_box *box, struct per</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (hwc-&gt;idx &lt; UNCORE_PMC_IDX_FIXED)</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, hwc-&gt;config | SNB_UNC_CTL_EN);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, hwc-&gt;config | SNB_UNC_CTL_EN);</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, SNB_UNC_CTL_EN);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, SNB_UNC_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void snb_uncore_msr_disable_event(struct intel_uncore_box *box, struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(event-&gt;hw.config_base, 0);</div><div class='add'>+	wrmsrq(event-&gt;hw.config_base, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void snb_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0) {</div><div class='del'>-		wrmsrl(SNB_UNC_PERF_GLOBAL_CTL,</div><div class='add'>+		wrmsrq(SNB_UNC_PERF_GLOBAL_CTL,</div><div class='ctx'> 			SNB_UNC_GLOBAL_CTL_EN | SNB_UNC_GLOBAL_CTL_CORE_ALL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void snb_uncore_msr_enable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(SNB_UNC_PERF_GLOBAL_CTL,</div><div class='add'>+	wrmsrq(SNB_UNC_PERF_GLOBAL_CTL,</div><div class='ctx'> 		SNB_UNC_GLOBAL_CTL_EN | SNB_UNC_GLOBAL_CTL_CORE_ALL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void snb_uncore_msr_exit_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0)</div><div class='del'>-		wrmsrl(SNB_UNC_PERF_GLOBAL_CTL, 0);</div><div class='add'>+		wrmsrq(SNB_UNC_PERF_GLOBAL_CTL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct uncore_event_desc snb_uncore_events[] = {</div><div class='hunk'>@@ -372,7 +373,7 @@ void snb_uncore_cpu_init(void)</div><div class='ctx'> static void skl_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0) {</div><div class='del'>-		wrmsrl(SKL_UNC_PERF_GLOBAL_CTL,</div><div class='add'>+		wrmsrq(SKL_UNC_PERF_GLOBAL_CTL,</div><div class='ctx'> 			SNB_UNC_GLOBAL_CTL_EN | SKL_UNC_GLOBAL_CTL_CORE_ALL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -383,14 +384,14 @@ static void skl_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> </div><div class='ctx'> static void skl_uncore_msr_enable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(SKL_UNC_PERF_GLOBAL_CTL,</div><div class='add'>+	wrmsrq(SKL_UNC_PERF_GLOBAL_CTL,</div><div class='ctx'> 		SNB_UNC_GLOBAL_CTL_EN | SKL_UNC_GLOBAL_CTL_CORE_ALL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void skl_uncore_msr_exit_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0)</div><div class='del'>-		wrmsrl(SKL_UNC_PERF_GLOBAL_CTL, 0);</div><div class='add'>+		wrmsrq(SKL_UNC_PERF_GLOBAL_CTL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops skl_uncore_msr_ops = {</div><div class='hunk'>@@ -504,7 +505,7 @@ static int icl_get_cbox_num(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 num_boxes;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(ICL_UNC_CBO_CONFIG, num_boxes);</div><div class='add'>+	rdmsrq(ICL_UNC_CBO_CONFIG, num_boxes);</div><div class='ctx'> </div><div class='ctx'> 	return num_boxes &amp; ICL_UNC_NUM_CBO_MASK;</div><div class='ctx'> }</div><div class='hunk'>@@ -525,7 +526,7 @@ static struct intel_uncore_type *tgl_msr_uncores[] = {</div><div class='ctx'> static void rkl_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0)</div><div class='del'>-		wrmsrl(SKL_UNC_PERF_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='add'>+		wrmsrq(SKL_UNC_PERF_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void tgl_uncore_cpu_init(void)</div><div class='hunk'>@@ -541,24 +542,24 @@ void tgl_uncore_cpu_init(void)</div><div class='ctx'> static void adl_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0)</div><div class='del'>-		wrmsrl(ADL_UNC_PERF_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='add'>+		wrmsrq(ADL_UNC_PERF_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void adl_uncore_msr_enable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(ADL_UNC_PERF_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='add'>+	wrmsrq(ADL_UNC_PERF_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void adl_uncore_msr_disable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0)</div><div class='del'>-		wrmsrl(ADL_UNC_PERF_GLOBAL_CTL, 0);</div><div class='add'>+		wrmsrq(ADL_UNC_PERF_GLOBAL_CTL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void adl_uncore_msr_exit_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0)</div><div class='del'>-		wrmsrl(ADL_UNC_PERF_GLOBAL_CTL, 0);</div><div class='add'>+		wrmsrq(ADL_UNC_PERF_GLOBAL_CTL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops adl_uncore_msr_ops = {</div><div class='hunk'>@@ -691,7 +692,7 @@ static struct intel_uncore_type mtl_uncore_hac_cbox = {</div><div class='ctx'> </div><div class='ctx'> static void mtl_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(uncore_msr_box_ctl(box), SNB_UNC_GLOBAL_CTL_EN);</div><div class='add'>+	wrmsrq(uncore_msr_box_ctl(box), SNB_UNC_GLOBAL_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops mtl_uncore_msr_ops = {</div><div class='hunk'>@@ -758,7 +759,7 @@ static struct intel_uncore_type *lnl_msr_uncores[] = {</div><div class='ctx'> static void lnl_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	if (box-&gt;pmu-&gt;pmu_idx == 0)</div><div class='del'>-		wrmsrl(LNL_UNC_MSR_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='add'>+		wrmsrq(LNL_UNC_MSR_GLOBAL_CTL, SNB_UNC_GLOBAL_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops lnl_uncore_msr_ops = {</div><div class='hunk'>@@ -1306,12 +1307,12 @@ int skl_uncore_pci_init(void)</div><div class='ctx'> /* Nehalem uncore support */</div><div class='ctx'> static void nhm_uncore_msr_disable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(NHM_UNC_PERF_GLOBAL_CTL, 0);</div><div class='add'>+	wrmsrq(NHM_UNC_PERF_GLOBAL_CTL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nhm_uncore_msr_enable_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(NHM_UNC_PERF_GLOBAL_CTL, NHM_UNC_GLOBAL_CTL_EN_PC_ALL | NHM_UNC_GLOBAL_CTL_EN_FC);</div><div class='add'>+	wrmsrq(NHM_UNC_PERF_GLOBAL_CTL, NHM_UNC_GLOBAL_CTL_EN_PC_ALL | NHM_UNC_GLOBAL_CTL_EN_FC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event)</div><div class='hunk'>@@ -1319,9 +1320,9 @@ static void nhm_uncore_msr_enable_event(struct intel_uncore_box *box, struct per</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (hwc-&gt;idx &lt; UNCORE_PMC_IDX_FIXED)</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, hwc-&gt;config | SNB_UNC_CTL_EN);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, hwc-&gt;config | SNB_UNC_CTL_EN);</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl(hwc-&gt;config_base, NHM_UNC_FIXED_CTR_CTL_EN);</div><div class='add'>+		wrmsrq(hwc-&gt;config_base, NHM_UNC_FIXED_CTR_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct attribute *nhm_uncore_formats_attr[] = {</div><div class='head'>diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c<br/>index 60973c209c0e..2824dc9950be 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_snbep.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/intel/uncore_snbep.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/intel/uncore_snbep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/intel/uncore_snbep.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* SandyBridge-EP/IvyTown uncore support */</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "uncore.h"</div><div class='ctx'> #include "uncore_discovery.h"</div><div class='ctx'> </div><div class='hunk'>@@ -618,9 +619,9 @@ static void snbep_uncore_msr_disable_box(struct intel_uncore_box *box)</div><div class='ctx'> </div><div class='ctx'> 	msr = uncore_msr_box_ctl(box);</div><div class='ctx'> 	if (msr) {</div><div class='del'>-		rdmsrl(msr, config);</div><div class='add'>+		rdmsrq(msr, config);</div><div class='ctx'> 		config |= SNBEP_PMON_BOX_CTL_FRZ;</div><div class='del'>-		wrmsrl(msr, config);</div><div class='add'>+		wrmsrq(msr, config);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -631,9 +632,9 @@ static void snbep_uncore_msr_enable_box(struct intel_uncore_box *box)</div><div class='ctx'> </div><div class='ctx'> 	msr = uncore_msr_box_ctl(box);</div><div class='ctx'> 	if (msr) {</div><div class='del'>-		rdmsrl(msr, config);</div><div class='add'>+		rdmsrq(msr, config);</div><div class='ctx'> 		config &amp;= ~SNBEP_PMON_BOX_CTL_FRZ;</div><div class='del'>-		wrmsrl(msr, config);</div><div class='add'>+		wrmsrq(msr, config);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -643,9 +644,9 @@ static void snbep_uncore_msr_enable_event(struct intel_uncore_box *box, struct p</div><div class='ctx'> 	struct hw_perf_event_extra *reg1 = &amp;hwc-&gt;extra_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE)</div><div class='del'>-		wrmsrl(reg1-&gt;reg, uncore_shared_reg_config(box, 0));</div><div class='add'>+		wrmsrq(reg1-&gt;reg, uncore_shared_reg_config(box, 0));</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void snbep_uncore_msr_disable_event(struct intel_uncore_box *box,</div><div class='hunk'>@@ -653,7 +654,7 @@ static void snbep_uncore_msr_disable_event(struct intel_uncore_box *box,</div><div class='ctx'> {</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void snbep_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='hunk'>@@ -661,7 +662,7 @@ static void snbep_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> 	unsigned msr = uncore_msr_box_ctl(box);</div><div class='ctx'> </div><div class='ctx'> 	if (msr)</div><div class='del'>-		wrmsrl(msr, SNBEP_PMON_BOX_CTL_INT);</div><div class='add'>+		wrmsrq(msr, SNBEP_PMON_BOX_CTL_INT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct attribute *snbep_uncore_formats_attr[] = {</div><div class='hunk'>@@ -1532,7 +1533,7 @@ static void ivbep_uncore_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned msr = uncore_msr_box_ctl(box);</div><div class='ctx'> 	if (msr)</div><div class='del'>-		wrmsrl(msr, IVBEP_PMON_BOX_CTL_INT);</div><div class='add'>+		wrmsrq(msr, IVBEP_PMON_BOX_CTL_INT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ivbep_uncore_pci_init_box(struct intel_uncore_box *box)</div><div class='hunk'>@@ -1783,11 +1784,11 @@ static void ivbep_cbox_enable_event(struct intel_uncore_box *box, struct perf_ev</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE) {</div><div class='ctx'> 		u64 filter = uncore_shared_reg_config(box, 0);</div><div class='del'>-		wrmsrl(reg1-&gt;reg, filter &amp; 0xffffffff);</div><div class='del'>-		wrmsrl(reg1-&gt;reg + 6, filter &gt;&gt; 32);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, filter &amp; 0xffffffff);</div><div class='add'>+		wrmsrq(reg1-&gt;reg + 6, filter &gt;&gt; 32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops ivbep_uncore_cbox_ops = {</div><div class='hunk'>@@ -2767,11 +2768,11 @@ static void hswep_cbox_enable_event(struct intel_uncore_box *box,</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE) {</div><div class='ctx'> 		u64 filter = uncore_shared_reg_config(box, 0);</div><div class='del'>-		wrmsrl(reg1-&gt;reg, filter &amp; 0xffffffff);</div><div class='del'>-		wrmsrl(reg1-&gt;reg + 1, filter &gt;&gt; 32);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, filter &amp; 0xffffffff);</div><div class='add'>+		wrmsrq(reg1-&gt;reg + 1, filter &gt;&gt; 32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops hswep_uncore_cbox_ops = {</div><div class='hunk'>@@ -2816,7 +2817,7 @@ static void hswep_uncore_sbox_msr_init_box(struct intel_uncore_box *box)</div><div class='ctx'> </div><div class='ctx'> 		for_each_set_bit(i, (unsigned long *)&amp;init, 64) {</div><div class='ctx'> 			flags |= (1ULL &lt;&lt; i);</div><div class='del'>-			wrmsrl(msr, flags);</div><div class='add'>+			wrmsrq(msr, flags);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3708,7 +3709,7 @@ static void skx_iio_enable_event(struct intel_uncore_box *box,</div><div class='ctx'> {</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops skx_uncore_iio_ops = {</div><div class='hunk'>@@ -3765,7 +3766,7 @@ static int skx_msr_cpu_bus_read(int cpu, u64 *topology)</div><div class='ctx'> {</div><div class='ctx'> 	u64 msr_value;</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_on_cpu(cpu, SKX_MSR_CPU_BUS_NUMBER, &amp;msr_value) ||</div><div class='add'>+	if (rdmsrq_on_cpu(cpu, SKX_MSR_CPU_BUS_NUMBER, &amp;msr_value) ||</div><div class='ctx'> 			!(msr_value &amp; SKX_MSR_CPU_BUS_VALID_BIT))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='hunk'>@@ -4655,9 +4656,9 @@ static void snr_cha_enable_event(struct intel_uncore_box *box,</div><div class='ctx'> 	struct hw_perf_event_extra *reg1 = &amp;hwc-&gt;extra_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE)</div><div class='del'>-		wrmsrl(reg1-&gt;reg, reg1-&gt;config);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, reg1-&gt;config);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config | SNBEP_PMON_CTL_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct intel_uncore_ops snr_uncore_chabox_ops = {</div><div class='hunk'>@@ -4891,28 +4892,28 @@ static struct uncore_event_desc snr_uncore_iio_freerunning_events[] = {</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(ioclk,			"event=0xff,umask=0x10"),</div><div class='ctx'> 	/* Free-Running IIO BANDWIDTH IN Counters */</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port0,		"event=0xff,umask=0x20"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit,	"MiB"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port1,		"event=0xff,umask=0x21"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit,	"MiB"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port2,		"event=0xff,umask=0x22"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit,	"MiB"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port3,		"event=0xff,umask=0x23"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit,	"MiB"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port4,		"event=0xff,umask=0x24"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit,	"MiB"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port5,		"event=0xff,umask=0x25"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit,	"MiB"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port6,		"event=0xff,umask=0x26"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit,	"MiB"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port7,		"event=0xff,umask=0x27"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale,	"3.814697266e-6"),</div><div class='add'>+	INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale,	"3.0517578125e-5"),</div><div class='ctx'> 	INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit,	"MiB"),</div><div class='ctx'> 	{ /* end: all zeroes */ },</div><div class='ctx'> };</div><div class='hunk'>@@ -5485,37 +5486,6 @@ static struct freerunning_counters icx_iio_freerunning[] = {</div><div class='ctx'> 	[ICX_IIO_MSR_BW_IN]	= { 0xaa0, 0x1, 0x10, 8, 48, icx_iio_bw_freerunning_box_offsets },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct uncore_event_desc icx_uncore_iio_freerunning_events[] = {</div><div class='del'>-	/* Free-Running IIO CLOCKS Counter */</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(ioclk,			"event=0xff,umask=0x10"),</div><div class='del'>-	/* Free-Running IIO BANDWIDTH IN Counters */</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port0,		"event=0xff,umask=0x20"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port1,		"event=0xff,umask=0x21"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port2,		"event=0xff,umask=0x22"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port3,		"event=0xff,umask=0x23"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port4,		"event=0xff,umask=0x24"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port5,		"event=0xff,umask=0x25"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port6,		"event=0xff,umask=0x26"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port7,		"event=0xff,umask=0x27"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit,	"MiB"),</div><div class='del'>-	{ /* end: all zeroes */ },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct intel_uncore_type icx_uncore_iio_free_running = {</div><div class='ctx'> 	.name			= "iio_free_running",</div><div class='ctx'> 	.num_counters		= 9,</div><div class='hunk'>@@ -5523,7 +5493,7 @@ static struct intel_uncore_type icx_uncore_iio_free_running = {</div><div class='ctx'> 	.num_freerunning_types	= ICX_IIO_FREERUNNING_TYPE_MAX,</div><div class='ctx'> 	.freerunning		= icx_iio_freerunning,</div><div class='ctx'> 	.ops			= &amp;skx_uncore_iio_freerunning_ops,</div><div class='del'>-	.event_descs		= icx_uncore_iio_freerunning_events,</div><div class='add'>+	.event_descs		= snr_uncore_iio_freerunning_events,</div><div class='ctx'> 	.format_group		= &amp;skx_uncore_iio_freerunning_format_group,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -5913,9 +5883,9 @@ static void spr_uncore_msr_enable_event(struct intel_uncore_box *box,</div><div class='ctx'> 	struct hw_perf_event_extra *reg1 = &amp;hwc-&gt;extra_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE)</div><div class='del'>-		wrmsrl(reg1-&gt;reg, reg1-&gt;config);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, reg1-&gt;config);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void spr_uncore_msr_disable_event(struct intel_uncore_box *box,</div><div class='hunk'>@@ -5925,9 +5895,9 @@ static void spr_uncore_msr_disable_event(struct intel_uncore_box *box,</div><div class='ctx'> 	struct hw_perf_event_extra *reg1 = &amp;hwc-&gt;extra_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (reg1-&gt;idx != EXTRA_REG_NONE)</div><div class='del'>-		wrmsrl(reg1-&gt;reg, 0);</div><div class='add'>+		wrmsrq(reg1-&gt;reg, 0);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, 0);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *event)</div><div class='hunk'>@@ -6320,69 +6290,13 @@ static struct freerunning_counters spr_iio_freerunning[] = {</div><div class='ctx'> 	[SPR_IIO_MSR_BW_OUT]	= { 0x3808, 0x1, 0x10, 8, 48 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct uncore_event_desc spr_uncore_iio_freerunning_events[] = {</div><div class='del'>-	/* Free-Running IIO CLOCKS Counter */</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(ioclk,			"event=0xff,umask=0x10"),</div><div class='del'>-	/* Free-Running IIO BANDWIDTH IN Counters */</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port0,		"event=0xff,umask=0x20"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port0.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port0.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port1,		"event=0xff,umask=0x21"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port1.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port1.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port2,		"event=0xff,umask=0x22"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port2.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port2.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port3,		"event=0xff,umask=0x23"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port3.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port3.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port4,		"event=0xff,umask=0x24"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port4.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port4.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port5,		"event=0xff,umask=0x25"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port5.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port5.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port6,		"event=0xff,umask=0x26"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port6.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port6.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port7,		"event=0xff,umask=0x27"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port7.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_in_port7.unit,	"MiB"),</div><div class='del'>-	/* Free-Running IIO BANDWIDTH OUT Counters */</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port0,		"event=0xff,umask=0x30"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port0.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port0.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port1,		"event=0xff,umask=0x31"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port1.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port1.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port2,		"event=0xff,umask=0x32"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port2.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port2.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port3,		"event=0xff,umask=0x33"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port3.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port3.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port4,		"event=0xff,umask=0x34"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port4.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port4.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port5,		"event=0xff,umask=0x35"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port5.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port5.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port6,		"event=0xff,umask=0x36"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port6.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port6.unit,	"MiB"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port7,		"event=0xff,umask=0x37"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port7.scale,	"3.814697266e-6"),</div><div class='del'>-	INTEL_UNCORE_EVENT_DESC(bw_out_port7.unit,	"MiB"),</div><div class='del'>-	{ /* end: all zeroes */ },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct intel_uncore_type spr_uncore_iio_free_running = {</div><div class='ctx'> 	.name			= "iio_free_running",</div><div class='ctx'> 	.num_counters		= 17,</div><div class='ctx'> 	.num_freerunning_types	= SPR_IIO_FREERUNNING_TYPE_MAX,</div><div class='ctx'> 	.freerunning		= spr_iio_freerunning,</div><div class='ctx'> 	.ops			= &amp;skx_uncore_iio_freerunning_ops,</div><div class='del'>-	.event_descs		= spr_uncore_iio_freerunning_events,</div><div class='add'>+	.event_descs		= snr_uncore_iio_freerunning_events,</div><div class='ctx'> 	.format_group		= &amp;skx_uncore_iio_freerunning_format_group,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -6572,7 +6486,7 @@ void spr_uncore_cpu_init(void)</div><div class='ctx'> 		 * of UNCORE_SPR_CHA) is incorrect on some SPR variants because of a</div><div class='ctx'> 		 * firmware bug. Using the value from SPR_MSR_UNC_CBO_CONFIG to replace it.</div><div class='ctx'> 		 */</div><div class='del'>-		rdmsrl(SPR_MSR_UNC_CBO_CONFIG, num_cbo);</div><div class='add'>+		rdmsrq(SPR_MSR_UNC_CBO_CONFIG, num_cbo);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The MSR doesn't work on the EMR XCC, but the firmware bug doesn't impact</div><div class='ctx'> 		 * the EMR XCC. Don't let the value from the MSR replace the existing value.</div><div class='head'>diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c<br/>index 45b1866ff051..7f5007a4752a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/msr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/msr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/msr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/msr.c</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/nospec.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "probe.h"</div><div class='ctx'> </div><div class='ctx'> enum perf_msr_id {</div><div class='hunk'>@@ -231,7 +233,7 @@ static inline u64 msr_read_counter(struct perf_event *event)</div><div class='ctx'> 	u64 now;</div><div class='ctx'> </div><div class='ctx'> 	if (event-&gt;hw.event_base)</div><div class='del'>-		rdmsrl(event-&gt;hw.event_base, now);</div><div class='add'>+		rdmsrq(event-&gt;hw.event_base, now);</div><div class='ctx'> 	else</div><div class='ctx'> 		now = rdtsc_ordered();</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h<br/>index 2c0ce0e9545e..2b969386dcdd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/perf_event.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/perf_event.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/perf_event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/perf_event.h</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;asm/fpu/xstate.h&gt;</div><div class='ctx'> #include &lt;asm/intel_ds.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* To enable MSR tracing please use the generic trace points. */</div><div class='ctx'> </div><div class='hunk'>@@ -110,14 +111,26 @@ static inline bool is_topdown_event(struct perf_event *event)</div><div class='ctx'> 	return is_metric_event(event) || is_slots_event(event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int is_x86_event(struct perf_event *event);</div><div class='add'>+</div><div class='add'>+static inline bool check_leader_group(struct perf_event *leader, int flags)</div><div class='add'>+{</div><div class='add'>+	return is_x86_event(leader) ? !!(leader-&gt;hw.flags &amp; flags) : false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool is_branch_counters_group(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	return event-&gt;group_leader-&gt;hw.flags &amp; PERF_X86_EVENT_BRANCH_COUNTERS;</div><div class='add'>+	return check_leader_group(event-&gt;group_leader, PERF_X86_EVENT_BRANCH_COUNTERS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_pebs_counter_event_group(struct perf_event *event)</div><div class='ctx'> {</div><div class='del'>-	return event-&gt;group_leader-&gt;hw.flags &amp; PERF_X86_EVENT_PEBS_CNTR;</div><div class='add'>+	return check_leader_group(event-&gt;group_leader, PERF_X86_EVENT_PEBS_CNTR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_acr_event_group(struct perf_event *event)</div><div class='add'>+{</div><div class='add'>+	return check_leader_group(event-&gt;group_leader, PERF_X86_EVENT_ACR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct amd_nb {</div><div class='hunk'>@@ -261,6 +274,7 @@ struct cpu_hw_events {</div><div class='ctx'> 	struct event_constraint	*event_constraint[X86_PMC_IDX_MAX];</div><div class='ctx'> </div><div class='ctx'> 	int			n_excl; /* the number of exclusive events */</div><div class='add'>+	int			n_late_setup; /* the num of events needs late setup */</div><div class='ctx'> </div><div class='ctx'> 	unsigned int		txn_flags;</div><div class='ctx'> 	int			is_fake;</div><div class='hunk'>@@ -286,6 +300,10 @@ struct cpu_hw_events {</div><div class='ctx'> 	u64			fixed_ctrl_val;</div><div class='ctx'> 	u64			active_fixed_ctrl_val;</div><div class='ctx'> </div><div class='add'>+	/* Intel ACR configuration */</div><div class='add'>+	u64			acr_cfg_b[X86_PMC_IDX_MAX];</div><div class='add'>+	u64			acr_cfg_c[X86_PMC_IDX_MAX];</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Intel LBR bits</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -707,6 +725,15 @@ struct x86_hybrid_pmu {</div><div class='ctx'> 			u64		fixed_cntr_mask64;</div><div class='ctx'> 			unsigned long	fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+			u64		acr_cntr_mask64;</div><div class='add'>+			unsigned long	acr_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+			u64		acr_cause_mask64;</div><div class='add'>+			unsigned long	acr_cause_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];</div><div class='add'>+	};</div><div class='ctx'> 	struct event_constraint		unconstrained;</div><div class='ctx'> </div><div class='ctx'> 	u64				hw_cache_event_ids</div><div class='hunk'>@@ -789,6 +816,10 @@ struct x86_pmu {</div><div class='ctx'> 	int		(*hw_config)(struct perf_event *event);</div><div class='ctx'> 	int		(*schedule_events)(struct cpu_hw_events *cpuc, int n, int *assign);</div><div class='ctx'> 	void		(*late_setup)(void);</div><div class='add'>+	void		(*pebs_enable)(struct perf_event *event);</div><div class='add'>+	void		(*pebs_disable)(struct perf_event *event);</div><div class='add'>+	void		(*pebs_enable_all)(void);</div><div class='add'>+	void		(*pebs_disable_all)(void);</div><div class='ctx'> 	unsigned	eventsel;</div><div class='ctx'> 	unsigned	perfctr;</div><div class='ctx'> 	unsigned	fixedctr;</div><div class='hunk'>@@ -805,6 +836,14 @@ struct x86_pmu {</div><div class='ctx'> 			u64		fixed_cntr_mask64;</div><div class='ctx'> 			unsigned long	fixed_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];</div><div class='ctx'> 	};</div><div class='add'>+	union {</div><div class='add'>+			u64		acr_cntr_mask64;</div><div class='add'>+			unsigned long	acr_cntr_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+			u64		acr_cause_mask64;</div><div class='add'>+			unsigned long	acr_cause_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];</div><div class='add'>+	};</div><div class='ctx'> 	int		cntval_bits;</div><div class='ctx'> 	u64		cntval_mask;</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -871,7 +910,7 @@ struct x86_pmu {</div><div class='ctx'> 	 */</div><div class='ctx'> 	unsigned int	bts			:1,</div><div class='ctx'> 			bts_active		:1,</div><div class='del'>-			pebs			:1,</div><div class='add'>+			ds_pebs			:1,</div><div class='ctx'> 			pebs_active		:1,</div><div class='ctx'> 			pebs_broken		:1,</div><div class='ctx'> 			pebs_prec_dist		:1,</div><div class='hunk'>@@ -1042,6 +1081,7 @@ do {									\</div><div class='ctx'> #define PMU_FL_MEM_LOADS_AUX	0x100 /* Require an auxiliary event for the complete memory info */</div><div class='ctx'> #define PMU_FL_RETIRE_LATENCY	0x200 /* Support Retire Latency in PEBS */</div><div class='ctx'> #define PMU_FL_BR_CNTR		0x400 /* Support branch counter logging */</div><div class='add'>+#define PMU_FL_DYN_CONSTRAINT	0x800 /* Needs dynamic constraint */</div><div class='ctx'> </div><div class='ctx'> #define EVENT_VAR(_id)  event_attr_##_id</div><div class='ctx'> #define EVENT_PTR(_id) &amp;event_attr_##_id.attr.attr</div><div class='hunk'>@@ -1084,6 +1124,7 @@ static struct perf_pmu_format_hybrid_attr format_attr_hybrid_##_name = {\</div><div class='ctx'> 	.pmu_type	= _pmu,						\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int is_x86_event(struct perf_event *event);</div><div class='ctx'> struct pmu *x86_get_pmu(unsigned int cpu);</div><div class='ctx'> extern struct x86_pmu x86_pmu __read_mostly;</div><div class='ctx'> </div><div class='hunk'>@@ -1091,6 +1132,10 @@ DECLARE_STATIC_CALL(x86_pmu_set_period, *x86_pmu.set_period);</div><div class='ctx'> DECLARE_STATIC_CALL(x86_pmu_update,     *x86_pmu.update);</div><div class='ctx'> DECLARE_STATIC_CALL(x86_pmu_drain_pebs,	*x86_pmu.drain_pebs);</div><div class='ctx'> DECLARE_STATIC_CALL(x86_pmu_late_setup,	*x86_pmu.late_setup);</div><div class='add'>+DECLARE_STATIC_CALL(x86_pmu_pebs_enable, *x86_pmu.pebs_enable);</div><div class='add'>+DECLARE_STATIC_CALL(x86_pmu_pebs_disable, *x86_pmu.pebs_disable);</div><div class='add'>+DECLARE_STATIC_CALL(x86_pmu_pebs_enable_all, *x86_pmu.pebs_enable_all);</div><div class='add'>+DECLARE_STATIC_CALL(x86_pmu_pebs_disable_all, *x86_pmu.pebs_disable_all);</div><div class='ctx'> </div><div class='ctx'> static __always_inline struct x86_perf_task_context_opt *task_context_opt(void *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -1198,16 +1243,16 @@ static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,</div><div class='ctx'> 	u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);</div><div class='ctx'> </div><div class='ctx'> 	if (hwc-&gt;extra_reg.reg)</div><div class='del'>-		wrmsrl(hwc-&gt;extra_reg.reg, hwc-&gt;extra_reg.config);</div><div class='add'>+		wrmsrq(hwc-&gt;extra_reg.reg, hwc-&gt;extra_reg.config);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Add enabled Merge event on next counter</div><div class='ctx'> 	 * if large increment event being enabled on this counter</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (is_counter_pair(hwc))</div><div class='del'>-		wrmsrl(x86_pmu_config_addr(hwc-&gt;idx + 1), x86_pmu.perf_ctr_pair_en);</div><div class='add'>+		wrmsrq(x86_pmu_config_addr(hwc-&gt;idx + 1), x86_pmu.perf_ctr_pair_en);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, (hwc-&gt;config | enable_mask) &amp; ~disable_mask);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, (hwc-&gt;config | enable_mask) &amp; ~disable_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void x86_pmu_enable_all(int added);</div><div class='hunk'>@@ -1223,10 +1268,10 @@ static inline void x86_pmu_disable_event(struct perf_event *event)</div><div class='ctx'> 	u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);</div><div class='ctx'> 	struct hw_perf_event *hwc = &amp;event-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(hwc-&gt;config_base, hwc-&gt;config &amp; ~disable_mask);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, hwc-&gt;config &amp; ~disable_mask);</div><div class='ctx'> </div><div class='ctx'> 	if (is_counter_pair(hwc))</div><div class='del'>-		wrmsrl(x86_pmu_config_addr(hwc-&gt;idx + 1), 0);</div><div class='add'>+		wrmsrq(x86_pmu_config_addr(hwc-&gt;idx + 1), 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void x86_pmu_enable_event(struct perf_event *event);</div><div class='hunk'>@@ -1394,12 +1439,12 @@ static __always_inline void __amd_pmu_lbr_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 dbg_ctl, dbg_extn_cfg;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);</div><div class='del'>-	wrmsrl(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg &amp; ~DBG_EXTN_CFG_LBRV2EN);</div><div class='add'>+	rdmsrq(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg);</div><div class='add'>+	wrmsrq(MSR_AMD_DBG_EXTN_CFG, dbg_extn_cfg &amp; ~DBG_EXTN_CFG_LBRV2EN);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_AMD_LBR_PMC_FREEZE)) {</div><div class='del'>-		rdmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl);</div><div class='del'>-		wrmsrl(MSR_IA32_DEBUGCTLMSR, dbg_ctl &amp; ~DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);</div><div class='add'>+		rdmsrq(MSR_IA32_DEBUGCTLMSR, dbg_ctl);</div><div class='add'>+		wrmsrq(MSR_IA32_DEBUGCTLMSR, dbg_ctl &amp; ~DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1531,21 +1576,21 @@ static inline bool intel_pmu_has_bts(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> static __always_inline void __intel_pmu_pebs_disable_all(void)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_IA32_PEBS_ENABLE, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_PEBS_ENABLE, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void __intel_pmu_arch_lbr_disable(void)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_ARCH_LBR_CTL, 0);</div><div class='add'>+	wrmsrq(MSR_ARCH_LBR_CTL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void __intel_pmu_lbr_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 debugctl;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+	rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> 	debugctl &amp;= ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI);</div><div class='del'>-	wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+	wrmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int intel_pmu_save_and_restart(struct perf_event *event);</div><div class='hunk'>@@ -1580,6 +1625,8 @@ void intel_pmu_disable_bts(void);</div><div class='ctx'> </div><div class='ctx'> int intel_pmu_drain_bts_buffer(void);</div><div class='ctx'> </div><div class='add'>+void intel_pmu_late_setup(void);</div><div class='add'>+</div><div class='ctx'> u64 grt_latency_data(struct perf_event *event, u64 status);</div><div class='ctx'> </div><div class='ctx'> u64 cmt_latency_data(struct perf_event *event, u64 status);</div><div class='hunk'>@@ -1636,11 +1683,13 @@ void intel_pmu_pebs_disable_all(void);</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_pebs_sched_task(struct perf_event_pmu_context *pmu_ctx, bool sched_in);</div><div class='ctx'> </div><div class='add'>+void intel_pmu_pebs_late_setup(struct cpu_hw_events *cpuc);</div><div class='add'>+</div><div class='ctx'> void intel_pmu_drain_pebs_buffer(void);</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_store_pebs_lbrs(struct lbr_entry *lbr);</div><div class='ctx'> </div><div class='del'>-void intel_ds_init(void);</div><div class='add'>+void intel_pebs_init(void);</div><div class='ctx'> </div><div class='ctx'> void intel_pmu_lbr_save_brstack(struct perf_sample_data *data,</div><div class='ctx'> 				struct cpu_hw_events *cpuc,</div><div class='head'>diff --git a/arch/x86/events/perf_event_flags.h b/arch/x86/events/perf_event_flags.h<br/>index 1d9e385649b5..70078334e4a3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/perf_event_flags.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/perf_event_flags.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/perf_event_flags.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/perf_event_flags.h</a></div><div class='hunk'>@@ -2,23 +2,24 @@</div><div class='ctx'> /*</div><div class='ctx'>  * struct hw_perf_event.flags flags</div><div class='ctx'>  */</div><div class='del'>-PERF_ARCH(PEBS_LDLAT,		0x00001) /* ld+ldlat data address sampling */</div><div class='del'>-PERF_ARCH(PEBS_ST,		0x00002) /* st data address sampling */</div><div class='del'>-PERF_ARCH(PEBS_ST_HSW,		0x00004) /* haswell style datala, store */</div><div class='del'>-PERF_ARCH(PEBS_LD_HSW,		0x00008) /* haswell style datala, load */</div><div class='del'>-PERF_ARCH(PEBS_NA_HSW,		0x00010) /* haswell style datala, unknown */</div><div class='del'>-PERF_ARCH(EXCL,			0x00020) /* HT exclusivity on counter */</div><div class='del'>-PERF_ARCH(DYNAMIC,		0x00040) /* dynamic alloc'd constraint */</div><div class='del'>-PERF_ARCH(PEBS_CNTR,		0x00080) /* PEBS counters snapshot */</div><div class='del'>-PERF_ARCH(EXCL_ACCT,		0x00100) /* accounted EXCL event */</div><div class='del'>-PERF_ARCH(AUTO_RELOAD,		0x00200) /* use PEBS auto-reload */</div><div class='del'>-PERF_ARCH(LARGE_PEBS,		0x00400) /* use large PEBS */</div><div class='del'>-PERF_ARCH(PEBS_VIA_PT,		0x00800) /* use PT buffer for PEBS */</div><div class='del'>-PERF_ARCH(PAIR,			0x01000) /* Large Increment per Cycle */</div><div class='del'>-PERF_ARCH(LBR_SELECT,		0x02000) /* Save/Restore MSR_LBR_SELECT */</div><div class='del'>-PERF_ARCH(TOPDOWN,		0x04000) /* Count Topdown slots/metrics events */</div><div class='del'>-PERF_ARCH(PEBS_STLAT,		0x08000) /* st+stlat data address sampling */</div><div class='del'>-PERF_ARCH(AMD_BRS,		0x10000) /* AMD Branch Sampling */</div><div class='del'>-PERF_ARCH(PEBS_LAT_HYBRID,	0x20000) /* ld and st lat for hybrid */</div><div class='del'>-PERF_ARCH(NEEDS_BRANCH_STACK,	0x40000) /* require branch stack setup */</div><div class='del'>-PERF_ARCH(BRANCH_COUNTERS,	0x80000) /* logs the counters in the extra space of each branch */</div><div class='add'>+PERF_ARCH(PEBS_LDLAT,		0x0000001) /* ld+ldlat data address sampling */</div><div class='add'>+PERF_ARCH(PEBS_ST,		0x0000002) /* st data address sampling */</div><div class='add'>+PERF_ARCH(PEBS_ST_HSW,		0x0000004) /* haswell style datala, store */</div><div class='add'>+PERF_ARCH(PEBS_LD_HSW,		0x0000008) /* haswell style datala, load */</div><div class='add'>+PERF_ARCH(PEBS_NA_HSW,		0x0000010) /* haswell style datala, unknown */</div><div class='add'>+PERF_ARCH(EXCL,			0x0000020) /* HT exclusivity on counter */</div><div class='add'>+PERF_ARCH(DYNAMIC,		0x0000040) /* dynamic alloc'd constraint */</div><div class='add'>+PERF_ARCH(PEBS_CNTR,		0x0000080) /* PEBS counters snapshot */</div><div class='add'>+PERF_ARCH(EXCL_ACCT,		0x0000100) /* accounted EXCL event */</div><div class='add'>+PERF_ARCH(AUTO_RELOAD,		0x0000200) /* use PEBS auto-reload */</div><div class='add'>+PERF_ARCH(LARGE_PEBS,		0x0000400) /* use large PEBS */</div><div class='add'>+PERF_ARCH(PEBS_VIA_PT,		0x0000800) /* use PT buffer for PEBS */</div><div class='add'>+PERF_ARCH(PAIR,			0x0001000) /* Large Increment per Cycle */</div><div class='add'>+PERF_ARCH(LBR_SELECT,		0x0002000) /* Save/Restore MSR_LBR_SELECT */</div><div class='add'>+PERF_ARCH(TOPDOWN,		0x0004000) /* Count Topdown slots/metrics events */</div><div class='add'>+PERF_ARCH(PEBS_STLAT,		0x0008000) /* st+stlat data address sampling */</div><div class='add'>+PERF_ARCH(AMD_BRS,		0x0010000) /* AMD Branch Sampling */</div><div class='add'>+PERF_ARCH(PEBS_LAT_HYBRID,	0x0020000) /* ld and st lat for hybrid */</div><div class='add'>+PERF_ARCH(NEEDS_BRANCH_STACK,	0x0040000) /* require branch stack setup */</div><div class='add'>+PERF_ARCH(BRANCH_COUNTERS,	0x0080000) /* logs the counters in the extra space of each branch */</div><div class='add'>+PERF_ARCH(ACR,			0x0100000) /* Auto counter reload */</div><div class='head'>diff --git a/arch/x86/events/probe.c b/arch/x86/events/probe.c<br/>index 600bf8d15c0c..bb719d0d3f0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/probe.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/probe.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/probe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/probe.c</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "probe.h"</div><div class='ctx'> </div><div class='ctx'> static umode_t</div><div class='hunk'>@@ -43,7 +45,7 @@ perf_msr_probe(struct perf_msr *msr, int cnt, bool zero, void *data)</div><div class='ctx'> 			if (msr[bit].test &amp;&amp; !msr[bit].test(bit, data))</div><div class='ctx'> 				continue;</div><div class='ctx'> 			/* Virt sucks; you cannot tell if a R/O MSR is present :/ */</div><div class='del'>-			if (rdmsrl_safe(msr[bit].msr, &amp;val))</div><div class='add'>+			if (rdmsrq_safe(msr[bit].msr, &amp;val))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			mask = msr[bit].mask;</div><div class='head'>diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c<br/>index 8ddace8cea96..defd86137f12 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/rapl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/rapl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/rapl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/rapl.c</a></div><div class='hunk'>@@ -65,6 +65,7 @@</div><div class='ctx'> #include &lt;linux/nospec.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "perf_event.h"</div><div class='ctx'> #include "probe.h"</div><div class='ctx'> </div><div class='hunk'>@@ -192,7 +193,7 @@ static inline unsigned int get_rapl_pmu_idx(int cpu, int scope)</div><div class='ctx'> static inline u64 rapl_read_counter(struct perf_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	u64 raw;</div><div class='del'>-	rdmsrl(event-&gt;hw.event_base, raw);</div><div class='add'>+	rdmsrq(event-&gt;hw.event_base, raw);</div><div class='ctx'> 	return raw;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -221,7 +222,7 @@ static u64 rapl_event_update(struct perf_event *event)</div><div class='ctx'> </div><div class='ctx'> 	prev_raw_count = local64_read(&amp;hwc-&gt;prev_count);</div><div class='ctx'> 	do {</div><div class='del'>-		rdmsrl(event-&gt;hw.event_base, new_raw_count);</div><div class='add'>+		rdmsrq(event-&gt;hw.event_base, new_raw_count);</div><div class='ctx'> 	} while (!local64_try_cmpxchg(&amp;hwc-&gt;prev_count,</div><div class='ctx'> 				      &amp;prev_raw_count, new_raw_count));</div><div class='ctx'> </div><div class='hunk'>@@ -610,8 +611,8 @@ static int rapl_check_hw_unit(void)</div><div class='ctx'> 	u64 msr_rapl_power_unit_bits;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* protect rdmsrl() to handle virtualization */</div><div class='del'>-	if (rdmsrl_safe(rapl_model-&gt;msr_power_unit, &amp;msr_rapl_power_unit_bits))</div><div class='add'>+	/* protect rdmsrq() to handle virtualization */</div><div class='add'>+	if (rdmsrq_safe(rapl_model-&gt;msr_power_unit, &amp;msr_rapl_power_unit_bits))</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	for (i = 0; i &lt; NR_RAPL_PKG_DOMAINS; i++)</div><div class='ctx'> 		rapl_pkg_hw_unit[i] = (msr_rapl_power_unit_bits &gt;&gt; 8) &amp; 0x1FULL;</div><div class='head'>diff --git a/arch/x86/events/utils.c b/arch/x86/events/utils.c<br/>index dab4ed199227..77fd00b3305e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/utils.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/utils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/utils.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "perf_event.h"</div><div class='ctx'> </div><div class='ctx'> static int decode_branch_type(struct insn *insn)</div><div class='head'>diff --git a/arch/x86/events/zhaoxin/core.c b/arch/x86/events/zhaoxin/core.c<br/>index 2fd9b0cf9a5e..4bdfcf091200 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/events/zhaoxin/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/events/zhaoxin/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/events/zhaoxin/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/events/zhaoxin/core.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/hardirq.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../perf_event.h"</div><div class='ctx'> </div><div class='hunk'>@@ -254,26 +255,26 @@ static __initconst const u64 zxe_hw_cache_event_ids</div><div class='ctx'> </div><div class='ctx'> static void zhaoxin_pmu_disable_all(void)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_CTRL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void zhaoxin_pmu_enable_all(int added)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u64 zhaoxin_pmu_get_status(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 status;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);</div><div class='add'>+	rdmsrq(MSR_CORE_PERF_GLOBAL_STATUS, status);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void zhaoxin_pmu_ack_status(u64 ack)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);</div><div class='add'>+	wrmsrq(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void zxc_pmu_ack_status(u64 ack)</div><div class='hunk'>@@ -293,9 +294,9 @@ static void zhaoxin_pmu_disable_fixed(struct hw_perf_event *hwc)</div><div class='ctx'> </div><div class='ctx'> 	mask = 0xfULL &lt;&lt; (idx * 4);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(hwc-&gt;config_base, ctrl_val);</div><div class='add'>+	rdmsrq(hwc-&gt;config_base, ctrl_val);</div><div class='ctx'> 	ctrl_val &amp;= ~mask;</div><div class='del'>-	wrmsrl(hwc-&gt;config_base, ctrl_val);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, ctrl_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void zhaoxin_pmu_disable_event(struct perf_event *event)</div><div class='hunk'>@@ -329,10 +330,10 @@ static void zhaoxin_pmu_enable_fixed(struct hw_perf_event *hwc)</div><div class='ctx'> 	bits &lt;&lt;= (idx * 4);</div><div class='ctx'> 	mask = 0xfULL &lt;&lt; (idx * 4);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(hwc-&gt;config_base, ctrl_val);</div><div class='add'>+	rdmsrq(hwc-&gt;config_base, ctrl_val);</div><div class='ctx'> 	ctrl_val &amp;= ~mask;</div><div class='ctx'> 	ctrl_val |= bits;</div><div class='del'>-	wrmsrl(hwc-&gt;config_base, ctrl_val);</div><div class='add'>+	wrmsrq(hwc-&gt;config_base, ctrl_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void zhaoxin_pmu_enable_event(struct perf_event *event)</div><div class='hunk'>@@ -397,8 +398,7 @@ again:</div><div class='ctx'> 		if (!x86_perf_event_set_period(event))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-			x86_pmu_stop(event, 0);</div><div class='add'>+		perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c<br/>index 6d91ac5f9836..bfde0a3498b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_apic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_apic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_apic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/hyperv/hv_apic.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;asm/hypervisor.h&gt;</div><div class='ctx'> #include &lt;asm/mshyperv.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/trace/hyperv.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +38,7 @@ static u64 hv_apic_icr_read(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 reg_val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_ICR, reg_val);</div><div class='add'>+	rdmsrq(HV_X64_MSR_ICR, reg_val);</div><div class='ctx'> 	return reg_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -49,7 +50,7 @@ static void hv_apic_icr_write(u32 low, u32 id)</div><div class='ctx'> 	reg_val = reg_val &lt;&lt; 32;</div><div class='ctx'> 	reg_val |= low;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(HV_X64_MSR_ICR, reg_val);</div><div class='add'>+	wrmsrq(HV_X64_MSR_ICR, reg_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 hv_apic_read(u32 reg)</div><div class='hunk'>@@ -75,10 +76,10 @@ static void hv_apic_write(u32 reg, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	switch (reg) {</div><div class='ctx'> 	case APIC_EOI:</div><div class='del'>-		wrmsr(HV_X64_MSR_EOI, val, 0);</div><div class='add'>+		wrmsrq(HV_X64_MSR_EOI, val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case APIC_TASKPRI:</div><div class='del'>-		wrmsr(HV_X64_MSR_TPR, val, 0);</div><div class='add'>+		wrmsrq(HV_X64_MSR_TPR, val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		native_apic_mem_write(reg, val);</div><div class='hunk'>@@ -92,7 +93,7 @@ static void hv_apic_eoi_write(void)</div><div class='ctx'> 	if (hvp &amp;&amp; (xchg(&amp;hvp-&gt;apic_assist, 0) &amp; 0x1))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsr(HV_X64_MSR_EOI, APIC_EOI_ACK, 0);</div><div class='add'>+	wrmsrq(HV_X64_MSR_EOI, APIC_EOI_ACK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool cpu_is_self(int cpu)</div><div class='head'>diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c<br/>index ddeb40930bc8..5d27194a2efa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/hyperv/hv_init.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;asm/hypervisor.h&gt;</div><div class='ctx'> #include &lt;hyperv/hvhdk.h&gt;</div><div class='ctx'> #include &lt;asm/mshyperv.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/idtentry.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='ctx'> #include &lt;linux/kexec.h&gt;</div><div class='hunk'>@@ -62,7 +63,7 @@ static int hyperv_init_ghcb(void)</div><div class='ctx'> 	 * returned by MSR_AMD64_SEV_ES_GHCB is above shared</div><div class='ctx'> 	 * memory boundary and map it here.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa);</div><div class='add'>+	rdmsrq(MSR_AMD64_SEV_ES_GHCB, ghcb_gpa);</div><div class='ctx'> </div><div class='ctx'> 	/* Mask out vTOM bit. ioremap_cache() maps decrypted */</div><div class='ctx'> 	ghcb_gpa &amp;= ~ms_hyperv.shared_gpa_boundary;</div><div class='hunk'>@@ -95,7 +96,7 @@ static int hv_cpu_init(unsigned int cpu)</div><div class='ctx'> 		 * For root partition we get the hypervisor provided VP assist</div><div class='ctx'> 		 * page, instead of allocating a new page.</div><div class='ctx'> 		 */</div><div class='del'>-		rdmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='add'>+		rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='ctx'> 		*hvp = memremap(msr.pfn &lt;&lt; HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT,</div><div class='ctx'> 				PAGE_SIZE, MEMREMAP_WB);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -128,7 +129,7 @@ static int hv_cpu_init(unsigned int cpu)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!WARN_ON(!(*hvp))) {</div><div class='ctx'> 		msr.enable = 1;</div><div class='del'>-		wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='add'>+		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return hyperv_init_ghcb();</div><div class='hunk'>@@ -140,7 +141,7 @@ static void hv_reenlightenment_notify(struct work_struct *dummy)</div><div class='ctx'> {</div><div class='ctx'> 	struct hv_tsc_emulation_status emu_status;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&amp;emu_status);</div><div class='add'>+	rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&amp;emu_status);</div><div class='ctx'> </div><div class='ctx'> 	/* Don't issue the callback if TSC accesses are not emulated */</div><div class='ctx'> 	if (hv_reenlightenment_cb &amp;&amp; emu_status.inprogress)</div><div class='hunk'>@@ -153,11 +154,11 @@ void hyperv_stop_tsc_emulation(void)</div><div class='ctx'> 	u64 freq;</div><div class='ctx'> 	struct hv_tsc_emulation_status emu_status;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&amp;emu_status);</div><div class='add'>+	rdmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&amp;emu_status);</div><div class='ctx'> 	emu_status.inprogress = 0;</div><div class='del'>-	wrmsrl(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&amp;emu_status);</div><div class='add'>+	wrmsrq(HV_X64_MSR_TSC_EMULATION_STATUS, *(u64 *)&amp;emu_status);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);</div><div class='add'>+	rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq);</div><div class='ctx'> 	tsc_khz = div64_u64(freq, 1000);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hyperv_stop_tsc_emulation);</div><div class='hunk'>@@ -203,8 +204,8 @@ void set_hv_tscchange_cb(void (*cb)(void))</div><div class='ctx'> </div><div class='ctx'> 	re_ctrl.target_vp = hv_vp_index[get_cpu()];</div><div class='ctx'> </div><div class='del'>-	wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&amp;re_ctrl));</div><div class='del'>-	wrmsrl(HV_X64_MSR_TSC_EMULATION_CONTROL, *((u64 *)&amp;emu_ctrl));</div><div class='add'>+	wrmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&amp;re_ctrl));</div><div class='add'>+	wrmsrq(HV_X64_MSR_TSC_EMULATION_CONTROL, *((u64 *)&amp;emu_ctrl));</div><div class='ctx'> </div><div class='ctx'> 	put_cpu();</div><div class='ctx'> }</div><div class='hunk'>@@ -217,9 +218,9 @@ void clear_hv_tscchange_cb(void)</div><div class='ctx'> 	if (!hv_reenlightenment_available())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&amp;re_ctrl);</div><div class='add'>+	rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&amp;re_ctrl);</div><div class='ctx'> 	re_ctrl.enabled = 0;</div><div class='del'>-	wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&amp;re_ctrl);</div><div class='add'>+	wrmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *(u64 *)&amp;re_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	hv_reenlightenment_cb = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -251,16 +252,16 @@ static int hv_cpu_die(unsigned int cpu)</div><div class='ctx'> 			 */</div><div class='ctx'> 			memunmap(hv_vp_assist_page[cpu]);</div><div class='ctx'> 			hv_vp_assist_page[cpu] = NULL;</div><div class='del'>-			rdmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='add'>+			rdmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='ctx'> 			msr.enable = 0;</div><div class='ctx'> 		}</div><div class='del'>-		wrmsrl(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='add'>+		wrmsrq(HV_X64_MSR_VP_ASSIST_PAGE, msr.as_uint64);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (hv_reenlightenment_cb == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&amp;re_ctrl));</div><div class='add'>+	rdmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&amp;re_ctrl));</div><div class='ctx'> 	if (re_ctrl.target_vp == hv_vp_index[cpu]) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Reassign reenlightenment notifications to some other online</div><div class='hunk'>@@ -274,7 +275,7 @@ static int hv_cpu_die(unsigned int cpu)</div><div class='ctx'> 		else</div><div class='ctx'> 			re_ctrl.enabled = 0;</div><div class='ctx'> </div><div class='del'>-		wrmsrl(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&amp;re_ctrl));</div><div class='add'>+		wrmsrq(HV_X64_MSR_REENLIGHTENMENT_CONTROL, *((u64 *)&amp;re_ctrl));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -331,9 +332,9 @@ static int hv_suspend(void)</div><div class='ctx'> 	hv_hypercall_pg = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable the hypercall page in the hypervisor */</div><div class='del'>-	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> 	hypercall_msr.enable = 0;</div><div class='del'>-	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+	wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> </div><div class='ctx'> 	ret = hv_cpu_die(0);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -348,11 +349,11 @@ static void hv_resume(void)</div><div class='ctx'> 	WARN_ON(ret);</div><div class='ctx'> </div><div class='ctx'> 	/* Re-enable the hypercall page */</div><div class='del'>-	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> 	hypercall_msr.enable = 1;</div><div class='ctx'> 	hypercall_msr.guest_physical_address =</div><div class='ctx'> 		vmalloc_to_pfn(hv_hypercall_pg_saved);</div><div class='del'>-	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+	wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> </div><div class='ctx'> 	hv_hypercall_pg = hv_hypercall_pg_saved;</div><div class='ctx'> 	hv_hypercall_pg_saved = NULL;</div><div class='hunk'>@@ -499,7 +500,7 @@ void __init hyperv_init(void)</div><div class='ctx'> 	 * in such a VM and is only used in such a VM.</div><div class='ctx'> 	 */</div><div class='ctx'> 	guest_id = hv_generate_guest_id(LINUX_VERSION_CODE);</div><div class='del'>-	wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id);</div><div class='add'>+	wrmsrq(HV_X64_MSR_GUEST_OS_ID, guest_id);</div><div class='ctx'> </div><div class='ctx'> 	/* With the paravisor, the VM must also write the ID via GHCB/GHCI */</div><div class='ctx'> 	hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, guest_id);</div><div class='hunk'>@@ -515,7 +516,7 @@ void __init hyperv_init(void)</div><div class='ctx'> 	if (hv_hypercall_pg == NULL)</div><div class='ctx'> 		goto clean_guest_os_id;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> 	hypercall_msr.enable = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (hv_root_partition()) {</div><div class='hunk'>@@ -532,7 +533,7 @@ void __init hyperv_init(void)</div><div class='ctx'> 		 * so it is populated with code, then copy the code to an</div><div class='ctx'> 		 * executable page.</div><div class='ctx'> 		 */</div><div class='del'>-		wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+		wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> </div><div class='ctx'> 		pg = vmalloc_to_page(hv_hypercall_pg);</div><div class='ctx'> 		src = memremap(hypercall_msr.guest_physical_address &lt;&lt; PAGE_SHIFT, PAGE_SIZE,</div><div class='hunk'>@@ -544,7 +545,7 @@ void __init hyperv_init(void)</div><div class='ctx'> 		hv_remap_tsc_clocksource();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		hypercall_msr.guest_physical_address = vmalloc_to_pfn(hv_hypercall_pg);</div><div class='del'>-		wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+		wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> skip_hypercall_pg_init:</div><div class='hunk'>@@ -608,7 +609,7 @@ skip_hypercall_pg_init:</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> clean_guest_os_id:</div><div class='del'>-	wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);</div><div class='add'>+	wrmsrq(HV_X64_MSR_GUEST_OS_ID, 0);</div><div class='ctx'> 	hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, 0);</div><div class='ctx'> 	cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE);</div><div class='ctx'> free_ghcb_page:</div><div class='hunk'>@@ -629,7 +630,7 @@ void hyperv_cleanup(void)</div><div class='ctx'> 	union hv_reference_tsc_msr tsc_msr;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset our OS id */</div><div class='del'>-	wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);</div><div class='add'>+	wrmsrq(HV_X64_MSR_GUEST_OS_ID, 0);</div><div class='ctx'> 	hv_ivm_msr_write(HV_X64_MSR_GUEST_OS_ID, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -667,18 +668,18 @@ void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die)</div><div class='ctx'> 		return;</div><div class='ctx'> 	panic_reported = true;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id);</div><div class='add'>+	rdmsrq(HV_X64_MSR_GUEST_OS_ID, guest_id);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(HV_X64_MSR_CRASH_P0, err);</div><div class='del'>-	wrmsrl(HV_X64_MSR_CRASH_P1, guest_id);</div><div class='del'>-	wrmsrl(HV_X64_MSR_CRASH_P2, regs-&gt;ip);</div><div class='del'>-	wrmsrl(HV_X64_MSR_CRASH_P3, regs-&gt;ax);</div><div class='del'>-	wrmsrl(HV_X64_MSR_CRASH_P4, regs-&gt;sp);</div><div class='add'>+	wrmsrq(HV_X64_MSR_CRASH_P0, err);</div><div class='add'>+	wrmsrq(HV_X64_MSR_CRASH_P1, guest_id);</div><div class='add'>+	wrmsrq(HV_X64_MSR_CRASH_P2, regs-&gt;ip);</div><div class='add'>+	wrmsrq(HV_X64_MSR_CRASH_P3, regs-&gt;ax);</div><div class='add'>+	wrmsrq(HV_X64_MSR_CRASH_P4, regs-&gt;sp);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Let Hyper-V know there is crash data available</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(HV_X64_MSR_CRASH_CTL, HV_CRASH_CTL_CRASH_NOTIFY);</div><div class='add'>+	wrmsrq(HV_X64_MSR_CRASH_CTL, HV_CRASH_CTL_CRASH_NOTIFY);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hyperv_report_panic);</div><div class='ctx'> </div><div class='hunk'>@@ -701,7 +702,7 @@ bool hv_is_hyperv_initialized(void)</div><div class='ctx'> 	 * that the hypercall page is setup</div><div class='ctx'> 	 */</div><div class='ctx'> 	hypercall_msr.as_uint64 = 0;</div><div class='del'>-	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='add'>+	rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);</div><div class='ctx'> </div><div class='ctx'> 	return hypercall_msr.enable;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/hyperv/hv_spinlock.c b/arch/x86/hyperv/hv_spinlock.c<br/>index 151e851bef09..81b006601370 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_spinlock.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_spinlock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_spinlock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/hyperv/hv_spinlock.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;asm/mshyperv.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> static bool hv_pvspin __initdata = true;</div><div class='ctx'> </div><div class='hunk'>@@ -39,18 +40,18 @@ static void hv_qlock_wait(u8 *byte, u8 val)</div><div class='ctx'> 	 * To prevent a race against the unlock path it is required to</div><div class='ctx'> 	 * disable interrupts before accessing the HV_X64_MSR_GUEST_IDLE</div><div class='ctx'> 	 * MSR. Otherwise, if the IPI from hv_qlock_kick() arrives between</div><div class='del'>-	 * the lock value check and the rdmsrl() then the vCPU might be put</div><div class='add'>+	 * the lock value check and the rdmsrq() then the vCPU might be put</div><div class='ctx'> 	 * into 'idle' state by the hypervisor and kept in that state for</div><div class='ctx'> 	 * an unspecified amount of time.</div><div class='ctx'> 	 */</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	/*</div><div class='del'>-	 * Only issue the rdmsrl() when the lock state has not changed.</div><div class='add'>+	 * Only issue the rdmsrq() when the lock state has not changed.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (READ_ONCE(*byte) == val) {</div><div class='ctx'> 		unsigned long msr_val;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(HV_X64_MSR_GUEST_IDLE, msr_val);</div><div class='add'>+		rdmsrq(HV_X64_MSR_GUEST_IDLE, msr_val);</div><div class='ctx'> </div><div class='ctx'> 		(void)msr_val;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c<br/>index 13242ed8ff16..4580936dcb03 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_vtl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/hv_vtl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/hyperv/hv_vtl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/hyperv/hv_vtl.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='ctx'> #include &lt;asm/mshyperv.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/reboot.h&gt;</div><div class='ctx'> #include &lt;../kernel/smpboot.h&gt;</div><div class='hunk'>@@ -149,11 +150,11 @@ static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored)</div><div class='ctx'> 	input-&gt;vp_context.rip = rip;</div><div class='ctx'> 	input-&gt;vp_context.rsp = rsp;</div><div class='ctx'> 	input-&gt;vp_context.rflags = 0x0000000000000002;</div><div class='del'>-	input-&gt;vp_context.efer = __rdmsr(MSR_EFER);</div><div class='add'>+	input-&gt;vp_context.efer = native_rdmsrq(MSR_EFER);</div><div class='ctx'> 	input-&gt;vp_context.cr0 = native_read_cr0();</div><div class='ctx'> 	input-&gt;vp_context.cr3 = __native_read_cr3();</div><div class='ctx'> 	input-&gt;vp_context.cr4 = native_read_cr4();</div><div class='del'>-	input-&gt;vp_context.msr_cr_pat = __rdmsr(MSR_IA32_CR_PAT);</div><div class='add'>+	input-&gt;vp_context.msr_cr_pat = native_rdmsrq(MSR_IA32_CR_PAT);</div><div class='ctx'> 	input-&gt;vp_context.idtr.limit = idt_ptr.size;</div><div class='ctx'> 	input-&gt;vp_context.idtr.base = idt_ptr.address;</div><div class='ctx'> 	input-&gt;vp_context.gdtr.limit = gdt_ptr.size;</div><div class='head'>diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c<br/>index 77bf05f06b9e..09a165a3c41e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/hyperv/ivm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/hyperv/ivm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/hyperv/ivm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/hyperv/ivm.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;uapi/asm/vmx.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AMD_MEM_ENCRYPT</div><div class='hunk'>@@ -110,12 +111,12 @@ u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size)</div><div class='ctx'> </div><div class='ctx'> static inline u64 rd_ghcb_msr(void)</div><div class='ctx'> {</div><div class='del'>-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);</div><div class='add'>+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void wr_ghcb_msr(u64 val)</div><div class='ctx'> {</div><div class='del'>-	native_wrmsrl(MSR_AMD64_SEV_ES_GHCB, val);</div><div class='add'>+	native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum es_result hv_ghcb_hv_call(struct ghcb *ghcb, u64 exit_code,</div><div class='head'>diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h<br/>index 1dd14381bcb6..fab11192c60a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/acrn.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/acrn.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/acrn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/acrn.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@ void acrn_remove_intr_handler(void);</div><div class='ctx'> static inline u32 acrn_cpuid_base(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))</div><div class='del'>-		return hypervisor_cpuid_base("ACRNACRNACRN", 0);</div><div class='add'>+		return cpuid_base_hypervisor("ACRNACRNACRN", 0);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h<br/>index 4a37a8bd87fd..15bc07a5ebb3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/alternative.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/alternative.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/alternative.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/alternative.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/stringify.h&gt;</div><div class='ctx'> #include &lt;linux/objtool.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/bug.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ALT_FLAGS_SHIFT		16</div><div class='ctx'> </div><div class='hunk'>@@ -82,6 +83,12 @@ struct alt_instr {</div><div class='ctx'> </div><div class='ctx'> extern struct alt_instr __alt_instructions[], __alt_instructions_end[];</div><div class='ctx'> </div><div class='add'>+extern s32 __retpoline_sites[], __retpoline_sites_end[];</div><div class='add'>+extern s32 __return_sites[],	__return_sites_end[];</div><div class='add'>+extern s32 __cfi_sites[],	__cfi_sites_end[];</div><div class='add'>+extern s32 __ibt_endbr_seal[],	__ibt_endbr_seal_end[];</div><div class='add'>+extern s32 __smp_locks[],	__smp_locks_end[];</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Debug flag that can be tested to see whether alternative</div><div class='ctx'>  * instructions were patched in already:</div><div class='hunk'>@@ -124,6 +131,37 @@ static __always_inline int x86_call_depth_emit_accounting(u8 **pprog,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MITIGATION_ITS</div><div class='add'>+extern void its_init_mod(struct module *mod);</div><div class='add'>+extern void its_fini_mod(struct module *mod);</div><div class='add'>+extern void its_free_mod(struct module *mod);</div><div class='add'>+extern u8 *its_static_thunk(int reg);</div><div class='add'>+#else /* CONFIG_MITIGATION_ITS */</div><div class='add'>+static inline void its_init_mod(struct module *mod) { }</div><div class='add'>+static inline void its_fini_mod(struct module *mod) { }</div><div class='add'>+static inline void its_free_mod(struct module *mod) { }</div><div class='add'>+static inline u8 *its_static_thunk(int reg)</div><div class='add'>+{</div><div class='add'>+	WARN_ONCE(1, "ITS not compiled in");</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MITIGATION_RETHUNK) &amp;&amp; defined(CONFIG_OBJTOOL)</div><div class='add'>+extern bool cpu_wants_rethunk(void);</div><div class='add'>+extern bool cpu_wants_rethunk_at(void *addr);</div><div class='add'>+#else</div><div class='add'>+static __always_inline bool cpu_wants_rethunk(void)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+static __always_inline bool cpu_wants_rethunk_at(void *addr)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> extern void alternatives_smp_module_add(struct module *mod, char *name,</div><div class='ctx'> 					void *locks, void *locks_end,</div><div class='hunk'>@@ -335,11 +373,6 @@ void nop_func(void);</div><div class='ctx'> 	__ALTERNATIVE(\oldinstr, \newinstr, \ft_flags)</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='del'>-#define old_len			141b-140b</div><div class='del'>-#define new_len1		144f-143f</div><div class='del'>-#define new_len2		145f-144f</div><div class='del'>-#define new_len3		146f-145f</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Same as ALTERNATIVE macro above but for two alternatives. If CPU</div><div class='ctx'>  * has @feature1, it replaces @oldinstr with @newinstr1. If CPU has</div><div class='head'>diff --git a/arch/x86/include/asm/amd/fch.h b/arch/x86/include/asm/amd/fch.h<br/>new file mode 100644<br/>index 000000000000..2cf5153edbc2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd/fch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/amd/fch.h</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_X86_AMD_FCH_H_</div><div class='add'>+#define _ASM_X86_AMD_FCH_H_</div><div class='add'>+</div><div class='add'>+#define FCH_PM_BASE			0xFED80300</div><div class='add'>+</div><div class='add'>+/* Register offsets from PM base: */</div><div class='add'>+#define FCH_PM_DECODEEN			0x00</div><div class='add'>+#define FCH_PM_DECODEEN_SMBUS0SEL	GENMASK(20, 19)</div><div class='add'>+#define FCH_PM_SCRATCH			0x80</div><div class='add'>+#define FCH_PM_S5_RESET_STATUS		0xC0</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_AMD_FCH_H_ */</div><div class='head'>diff --git a/arch/x86/include/asm/amd_hsmp.h b/arch/x86/include/asm/amd/hsmp.h<br/>index 03c2ce3edaf5..2137f62853ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd_hsmp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd_hsmp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd/hsmp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/amd/hsmp.h</a></div><div class='hunk'>@@ -1,5 +1,4 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */</div><div class='del'>-</div><div class='ctx'> #ifndef _ASM_X86_AMD_HSMP_H_</div><div class='ctx'> #define _ASM_X86_AMD_HSMP_H_</div><div class='ctx'> </div><div class='hunk'>@@ -13,4 +12,5 @@ static inline int hsmp_send_message(struct hsmp_message *msg)</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='ctx'> #endif /*_ASM_X86_AMD_HSMP_H_*/</div><div class='head'>diff --git a/arch/x86/include/asm/amd-ibs.h b/arch/x86/include/asm/amd/ibs.h<br/>index 77f3a589a99a..3ee5903982c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd-ibs.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd-ibs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd/ibs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/amd/ibs.h</a></div><div class='hunk'>@@ -1,4 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_X86_AMD_IBS_H</div><div class='add'>+#define _ASM_X86_AMD_IBS_H</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * From PPR Vol 1 for AMD Family 19h Model 01h B1</div><div class='ctx'>  * 55898 Rev 0.35 - Feb 5, 2021</div><div class='hunk'>@@ -151,3 +154,5 @@ struct perf_ibs_data {</div><div class='ctx'> 	};</div><div class='ctx'> 	u64		regs[MSR_AMD64_IBS_REG_COUNT_MAX];</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+#endif /* _ASM_X86_AMD_IBS_H */</div><div class='head'>diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd/nb.h<br/>index adfa0854cf2d..ddb5108cf46c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd_nb.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd_nb.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd/nb.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/amd/nb.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;asm/amd_node.h&gt;</div><div class='add'>+#include &lt;asm/amd/node.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct amd_nb_bus_dev_range {</div><div class='ctx'> 	u8 bus;</div><div class='head'>diff --git a/arch/x86/include/asm/amd_node.h b/arch/x86/include/asm/amd/node.h<br/>index 23fe617898a8..23fe617898a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd_node.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/amd_node.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/amd/node.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/amd/node.h</a></div><div class='head'>diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h<br/>index c903d358405d..68e10e30fe9b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/apic.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/apic.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/apic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/apic.h</a></div><div class='hunk'>@@ -120,7 +120,7 @@ static inline bool apic_is_x2apic_enabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_IA32_APICBASE, &amp;msr))</div><div class='add'>+	if (rdmsrq_safe(MSR_IA32_APICBASE, &amp;msr))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return msr &amp; X2APIC_ENABLE;</div><div class='ctx'> }</div><div class='hunk'>@@ -209,12 +209,12 @@ static inline void native_apic_msr_write(u32 reg, u32 v)</div><div class='ctx'> 	    reg == APIC_LVR)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsr(APIC_BASE_MSR + (reg &gt;&gt; 4), v, 0);</div><div class='add'>+	wrmsrq(APIC_BASE_MSR + (reg &gt;&gt; 4), v);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void native_apic_msr_eoi(void)</div><div class='ctx'> {</div><div class='del'>-	__wrmsr(APIC_BASE_MSR + (APIC_EOI &gt;&gt; 4), APIC_EOI_ACK, 0);</div><div class='add'>+	native_wrmsrq(APIC_BASE_MSR + (APIC_EOI &gt;&gt; 4), APIC_EOI_ACK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 native_apic_msr_read(u32 reg)</div><div class='hunk'>@@ -224,20 +224,20 @@ static inline u32 native_apic_msr_read(u32 reg)</div><div class='ctx'> 	if (reg == APIC_DFR)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(APIC_BASE_MSR + (reg &gt;&gt; 4), msr);</div><div class='add'>+	rdmsrq(APIC_BASE_MSR + (reg &gt;&gt; 4), msr);</div><div class='ctx'> 	return (u32)msr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void native_x2apic_icr_write(u32 low, u32 id)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(APIC_BASE_MSR + (APIC_ICR &gt;&gt; 4), ((__u64) id) &lt;&lt; 32 | low);</div><div class='add'>+	wrmsrq(APIC_BASE_MSR + (APIC_ICR &gt;&gt; 4), ((__u64) id) &lt;&lt; 32 | low);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u64 native_x2apic_icr_read(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long val;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(APIC_BASE_MSR + (APIC_ICR &gt;&gt; 4), val);</div><div class='add'>+	rdmsrq(APIC_BASE_MSR + (APIC_ICR &gt;&gt; 4), val);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/arch_hweight.h b/arch/x86/include/asm/arch_hweight.h<br/>index cbc6157f0b4b..b5982b94bdba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/arch_hweight.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/arch_hweight.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/arch_hweight.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/arch_hweight.h</a></div><div class='hunk'>@@ -16,8 +16,7 @@ static __always_inline unsigned int __arch_hweight32(unsigned int w)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int res;</div><div class='ctx'> </div><div class='del'>-	asm_inline (ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE</div><div class='del'>-				"call __sw_hweight32",</div><div class='add'>+	asm_inline (ALTERNATIVE("call __sw_hweight32",</div><div class='ctx'> 				"popcntl %[val], %[cnt]", X86_FEATURE_POPCNT)</div><div class='ctx'> 			 : [cnt] "=" REG_OUT (res), ASM_CALL_CONSTRAINT</div><div class='ctx'> 			 : [val] REG_IN (w));</div><div class='hunk'>@@ -46,8 +45,7 @@ static __always_inline unsigned long __arch_hweight64(__u64 w)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long res;</div><div class='ctx'> </div><div class='del'>-	asm_inline (ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE</div><div class='del'>-				"call __sw_hweight64",</div><div class='add'>+	asm_inline (ALTERNATIVE("call __sw_hweight64",</div><div class='ctx'> 				"popcntq %[val], %[cnt]", X86_FEATURE_POPCNT)</div><div class='ctx'> 			 : [cnt] "=" REG_OUT (res), ASM_CALL_CONSTRAINT</div><div class='ctx'> 			 : [val] REG_IN (w));</div><div class='head'>diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h<br/>index cc2881576c2c..f963848024a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/asm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/asm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/asm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/asm.h</a></div><div class='hunk'>@@ -114,17 +114,12 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='del'>-#ifndef __pic__</div><div class='ctx'> static __always_inline __pure void *rip_rel_ptr(void *p)</div><div class='ctx'> {</div><div class='ctx'> 	asm("leaq %c1(%%rip), %0" : "=r"(p) : "i"(p));</div><div class='ctx'> </div><div class='ctx'> 	return p;</div><div class='ctx'> }</div><div class='del'>-#define RIP_REL_REF(var)	(*(typeof(&amp;(var)))rip_rel_ptr(&amp;(var)))</div><div class='del'>-#else</div><div class='del'>-#define RIP_REL_REF(var)	(var)</div><div class='del'>-#endif</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -243,5 +238,24 @@ register unsigned long current_stack_pointer asm(_ASM_SP);</div><div class='ctx'> #define _ASM_EXTABLE_FAULT(from, to)				\</div><div class='ctx'> 	_ASM_EXTABLE_TYPE(from, to, EX_TYPE_FAULT)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Both i386 and x86_64 returns 64-bit values in edx:eax for certain</div><div class='add'>+ * instructions, but GCC's "A" constraint has different meanings.</div><div class='add'>+ * For i386, "A" means exactly edx:eax, while for x86_64 it</div><div class='add'>+ * means rax *or* rdx.</div><div class='add'>+ *</div><div class='add'>+ * These helpers wrapping these semantic differences save one instruction</div><div class='add'>+ * clearing the high half of 'low':</div><div class='add'>+ */</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+# define EAX_EDX_DECLARE_ARGS(val, low, high)	unsigned long low, high</div><div class='add'>+# define EAX_EDX_VAL(val, low, high)		((low) | (high) &lt;&lt; 32)</div><div class='add'>+# define EAX_EDX_RET(val, low, high)		"=a" (low), "=d" (high)</div><div class='add'>+#else</div><div class='add'>+# define EAX_EDX_DECLARE_ARGS(val, low, high)	u64 val</div><div class='add'>+# define EAX_EDX_VAL(val, low, high)		(val)</div><div class='add'>+# define EAX_EDX_RET(val, low, high)		"=A" (val)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __KERNEL__ */</div><div class='ctx'> #endif /* _ASM_X86_ASM_H */</div><div class='head'>diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h<br/>index 100413aff640..eebbc8889e70 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/bitops.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/bitops.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/bitops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/bitops.h</a></div><div class='hunk'>@@ -248,7 +248,7 @@ arch_test_bit_acquire(unsigned long nr, const volatile unsigned long *addr)</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long variable__ffs(unsigned long word)</div><div class='ctx'> {</div><div class='del'>-	asm("rep; bsf %1,%0"</div><div class='add'>+	asm("tzcnt %1,%0"</div><div class='ctx'> 		: "=r" (word)</div><div class='ctx'> 		: ASM_INPUT_RM (word));</div><div class='ctx'> 	return word;</div><div class='hunk'>@@ -267,10 +267,7 @@ static __always_inline unsigned long variable__ffs(unsigned long word)</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long variable_ffz(unsigned long word)</div><div class='ctx'> {</div><div class='del'>-	asm("rep; bsf %1,%0"</div><div class='del'>-		: "=r" (word)</div><div class='del'>-		: "r" (~word));</div><div class='del'>-	return word;</div><div class='add'>+	return variable__ffs(~word);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h<br/>index 3f02ff6d333d..02b23aa78955 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/boot.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/boot.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/boot.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/boot.h</a></div><div class='hunk'>@@ -74,6 +74,11 @@</div><div class='ctx'> # define BOOT_STACK_SIZE	0x1000</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define TRAMPOLINE_32BIT_SIZE		(2 * PAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define TRAMPOLINE_32BIT_CODE_OFFSET	PAGE_SIZE</div><div class='add'>+#define TRAMPOLINE_32BIT_CODE_SIZE	0xA0</div><div class='add'>+</div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='ctx'> extern unsigned int output_len;</div><div class='ctx'> extern const unsigned long kernel_text_size;</div><div class='hunk'>@@ -83,6 +88,11 @@ unsigned long decompress_kernel(unsigned char *outbuf, unsigned long virt_addr,</div><div class='ctx'> 				void (*error)(char *x));</div><div class='ctx'> </div><div class='ctx'> extern struct boot_params *boot_params_ptr;</div><div class='add'>+extern unsigned long *trampoline_32bit;</div><div class='add'>+extern const u16 trampoline_ljmp_imm_offset;</div><div class='add'>+</div><div class='add'>+void trampoline_32bit_src(void *trampoline, bool enable_5lvl);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_BOOT_H */</div><div class='head'>diff --git a/arch/x86/include/asm/coco.h b/arch/x86/include/asm/coco.h<br/>index e7225452963f..e1dbf8df1b69 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/coco.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/coco.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/coco.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/coco.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@ static inline u64 cc_get_mask(void)</div><div class='ctx'> </div><div class='ctx'> static inline void cc_set_mask(u64 mask)</div><div class='ctx'> {</div><div class='del'>-	RIP_REL_REF(cc_mask) = mask;</div><div class='add'>+	cc_mask = mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u64 cc_mkenc(u64 val);</div><div class='head'>diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h<br/>index 6c2c152d8a67..5b50e0e35129 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpufeatures.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/cpufeatures.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpufeatures.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/cpufeatures.h</a></div><div class='hunk'>@@ -75,7 +75,7 @@</div><div class='ctx'> #define X86_FEATURE_CENTAUR_MCR		( 3*32+ 3) /* "centaur_mcr" Centaur MCRs (= MTRRs) */</div><div class='ctx'> #define X86_FEATURE_K8			( 3*32+ 4) /* Opteron, Athlon64 */</div><div class='ctx'> #define X86_FEATURE_ZEN5		( 3*32+ 5) /* CPU based on Zen5 microarchitecture */</div><div class='del'>-/* Free                                 ( 3*32+ 6) */</div><div class='add'>+#define X86_FEATURE_ZEN6		( 3*32+ 6) /* CPU based on Zen6 microarchitecture */</div><div class='ctx'> /* Free                                 ( 3*32+ 7) */</div><div class='ctx'> #define X86_FEATURE_CONSTANT_TSC	( 3*32+ 8) /* "constant_tsc" TSC ticks at a constant rate */</div><div class='ctx'> #define X86_FEATURE_UP			( 3*32+ 9) /* "up" SMP kernel running on UP */</div><div class='hunk'>@@ -476,11 +476,13 @@</div><div class='ctx'> #define X86_FEATURE_CLEAR_BHB_LOOP	(21*32+ 1) /* Clear branch history at syscall entry using SW loop */</div><div class='ctx'> #define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* BHI_DIS_S HW control available */</div><div class='ctx'> #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */</div><div class='del'>-#define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */</div><div class='del'>-#define X86_FEATURE_AMD_FAST_CPPC	(21*32 + 5) /* Fast CPPC */</div><div class='del'>-#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */</div><div class='del'>-#define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32 + 7) /* Workload Classification */</div><div class='del'>-#define X86_FEATURE_PREFER_YMM		(21*32 + 8) /* Avoid ZMM registers due to downclocking */</div><div class='add'>+#define X86_FEATURE_CLEAR_BHB_VMEXIT	(21*32+ 4) /* Clear branch history at vmexit using SW loop */</div><div class='add'>+#define X86_FEATURE_AMD_FAST_CPPC	(21*32+ 5) /* Fast CPPC */</div><div class='add'>+#define X86_FEATURE_AMD_HTR_CORES	(21*32+ 6) /* Heterogeneous Core Topology */</div><div class='add'>+#define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32+ 7) /* Workload Classification */</div><div class='add'>+#define X86_FEATURE_PREFER_YMM		(21*32+ 8) /* Avoid ZMM registers due to downclocking */</div><div class='add'>+#define X86_FEATURE_APX			(21*32+ 9) /* Advanced Performance Extensions */</div><div class='add'>+#define X86_FEATURE_INDIRECT_THUNK_ITS	(21*32+10) /* Use thunk for indirect branches in lower half of cacheline */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * BUG word(s)</div><div class='hunk'>@@ -519,7 +521,7 @@</div><div class='ctx'> #define X86_BUG_ITLB_MULTIHIT		X86_BUG(23) /* "itlb_multihit" CPU may incur MCE during certain page attribute changes */</div><div class='ctx'> #define X86_BUG_SRBDS			X86_BUG(24) /* "srbds" CPU may leak RNG bits if not mitigated */</div><div class='ctx'> #define X86_BUG_MMIO_STALE_DATA		X86_BUG(25) /* "mmio_stale_data" CPU is affected by Processor MMIO Stale Data vulnerabilities */</div><div class='del'>-#define X86_BUG_MMIO_UNKNOWN		X86_BUG(26) /* "mmio_unknown" CPU is too old and its MMIO Stale Data status is unknown */</div><div class='add'>+/* unused, was #define X86_BUG_MMIO_UNKNOWN		X86_BUG(26) "mmio_unknown" CPU is too old and its MMIO Stale Data status is unknown */</div><div class='ctx'> #define X86_BUG_RETBLEED		X86_BUG(27) /* "retbleed" CPU is affected by RETBleed */</div><div class='ctx'> #define X86_BUG_EIBRS_PBRSB		X86_BUG(28) /* "eibrs_pbrsb" EIBRS is vulnerable to Post Barrier RSB Predictions */</div><div class='ctx'> #define X86_BUG_SMT_RSB			X86_BUG(29) /* "smt_rsb" CPU is vulnerable to Cross-Thread Return Address Predictions */</div><div class='hunk'>@@ -527,10 +529,14 @@</div><div class='ctx'> #define X86_BUG_TDX_PW_MCE		X86_BUG(31) /* "tdx_pw_mce" CPU may incur #MC if non-TD software does partial write to TDX private memory */</div><div class='ctx'> </div><div class='ctx'> /* BUG word 2 */</div><div class='del'>-#define X86_BUG_SRSO			X86_BUG(1*32 + 0) /* "srso" AMD SRSO bug */</div><div class='del'>-#define X86_BUG_DIV0			X86_BUG(1*32 + 1) /* "div0" AMD DIV0 speculation bug */</div><div class='del'>-#define X86_BUG_RFDS			X86_BUG(1*32 + 2) /* "rfds" CPU is vulnerable to Register File Data Sampling */</div><div class='del'>-#define X86_BUG_BHI			X86_BUG(1*32 + 3) /* "bhi" CPU is affected by Branch History Injection */</div><div class='del'>-#define X86_BUG_IBPB_NO_RET	   	X86_BUG(1*32 + 4) /* "ibpb_no_ret" IBPB omits return target predictions */</div><div class='del'>-#define X86_BUG_SPECTRE_V2_USER		X86_BUG(1*32 + 5) /* "spectre_v2_user" CPU is affected by Spectre variant 2 attack between user processes */</div><div class='add'>+#define X86_BUG_SRSO			X86_BUG( 1*32+ 0) /* "srso" AMD SRSO bug */</div><div class='add'>+#define X86_BUG_DIV0			X86_BUG( 1*32+ 1) /* "div0" AMD DIV0 speculation bug */</div><div class='add'>+#define X86_BUG_RFDS			X86_BUG( 1*32+ 2) /* "rfds" CPU is vulnerable to Register File Data Sampling */</div><div class='add'>+#define X86_BUG_BHI			X86_BUG( 1*32+ 3) /* "bhi" CPU is affected by Branch History Injection */</div><div class='add'>+#define X86_BUG_IBPB_NO_RET		X86_BUG( 1*32+ 4) /* "ibpb_no_ret" IBPB omits return target predictions */</div><div class='add'>+#define X86_BUG_SPECTRE_V2_USER		X86_BUG( 1*32+ 5) /* "spectre_v2_user" CPU is affected by Spectre variant 2 attack between user processes */</div><div class='add'>+#define X86_BUG_OLD_MICROCODE		X86_BUG( 1*32+ 6) /* "old_microcode" CPU has old microcode, it is surely vulnerable to something */</div><div class='add'>+#define X86_BUG_ITS			X86_BUG( 1*32+ 7) /* "its" CPU is affected by Indirect Target Selection */</div><div class='add'>+#define X86_BUG_ITS_NATIVE_ONLY		X86_BUG( 1*32+ 8) /* "its_native_only" CPU is affected by ITS, VMX is not affected */</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_CPUFEATURES_H */</div><div class='head'>diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h<br/>index 9c180c9cc58e..44fa82e1267c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpuid/api.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/cpuid/api.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpuid/api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/cpuid/api.h</a></div><div class='hunk'>@@ -14,9 +14,9 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='del'>-bool have_cpuid_p(void);</div><div class='add'>+bool cpuid_feature(void);</div><div class='ctx'> #else</div><div class='del'>-static inline bool have_cpuid_p(void)</div><div class='add'>+static inline bool cpuid_feature(void)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -36,9 +36,9 @@ static inline void native_cpuid(u32 *eax, u32 *ebx,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define NATIVE_CPUID_REG(reg)					\</div><div class='del'>-static inline u32 native_cpuid_##reg(u32 op)	\</div><div class='add'>+static inline u32 native_cpuid_##reg(u32 op)			\</div><div class='ctx'> {								\</div><div class='del'>-	u32 eax = op, ebx, ecx = 0, edx;		\</div><div class='add'>+	u32 eax = op, ebx, ecx = 0, edx;			\</div><div class='ctx'> 								\</div><div class='ctx'> 	native_cpuid(&amp;eax, &amp;ebx, &amp;ecx, &amp;edx);			\</div><div class='ctx'> 								\</div><div class='hunk'>@@ -160,6 +160,10 @@ static inline void __cpuid_read_reg(u32 leaf, u32 subleaf,</div><div class='ctx'> 	__cpuid_read_reg(leaf, 0, regidx, (u32 *)(reg));	\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Hypervisor-related APIs:</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> static __always_inline bool cpuid_function_is_indexed(u32 function)</div><div class='ctx'> {</div><div class='ctx'> 	switch (function) {</div><div class='hunk'>@@ -184,14 +188,14 @@ static __always_inline bool cpuid_function_is_indexed(u32 function)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define for_each_possible_hypervisor_cpuid_base(function) \</div><div class='add'>+#define for_each_possible_cpuid_base_hypervisor(function) \</div><div class='ctx'> 	for (function = 0x40000000; function &lt; 0x40010000; function += 0x100)</div><div class='ctx'> </div><div class='del'>-static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)</div><div class='add'>+static inline u32 cpuid_base_hypervisor(const char *sig, u32 leaves)</div><div class='ctx'> {</div><div class='ctx'> 	u32 base, eax, signature[3];</div><div class='ctx'> </div><div class='del'>-	for_each_possible_hypervisor_cpuid_base(base) {</div><div class='add'>+	for_each_possible_cpuid_base_hypervisor(base) {</div><div class='ctx'> 		cpuid(base, &amp;eax, &amp;signature[0], &amp;signature[1], &amp;signature[2]);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -207,4 +211,82 @@ static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * CPUID(0x2) parsing:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cpuid_leaf_0x2() - Return sanitized CPUID(0x2) register output</div><div class='add'>+ * @regs:	Output parameter</div><div class='add'>+ *</div><div class='add'>+ * Query CPUID(0x2) and store its output in @regs.  Force set any</div><div class='add'>+ * invalid 1-byte descriptor returned by the hardware to zero (the NULL</div><div class='add'>+ * cache/TLB descriptor) before returning it to the caller.</div><div class='add'>+ *</div><div class='add'>+ * Use for_each_cpuid_0x2_desc() to iterate over the register output in</div><div class='add'>+ * parsed form.</div><div class='add'>+ */</div><div class='add'>+static inline void cpuid_leaf_0x2(union leaf_0x2_regs *regs)</div><div class='add'>+{</div><div class='add'>+	cpuid_leaf(0x2, regs);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * All Intel CPUs must report an iteration count of 1.	In case</div><div class='add'>+	 * of bogus hardware, treat all returned descriptors as NULL.</div><div class='add'>+	 */</div><div class='add'>+	if (regs-&gt;desc[0] != 0x01) {</div><div class='add'>+		for (int i = 0; i &lt; 4; i++)</div><div class='add'>+			regs-&gt;regv[i] = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The most significant bit (MSB) of each register must be clear.</div><div class='add'>+	 * If a register is invalid, replace its descriptors with NULL.</div><div class='add'>+	 */</div><div class='add'>+	for (int i = 0; i &lt; 4; i++) {</div><div class='add'>+		if (regs-&gt;reg[i].invalid)</div><div class='add'>+			regs-&gt;regv[i] = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * for_each_cpuid_0x2_desc() - Iterator for parsed CPUID(0x2) descriptors</div><div class='add'>+ * @_regs:	CPUID(0x2) register output, as returned by cpuid_leaf_0x2()</div><div class='add'>+ * @_ptr:	u8 pointer, for macro internal use only</div><div class='add'>+ * @_desc:	Pointer to the parsed CPUID(0x2) descriptor at each iteration</div><div class='add'>+ *</div><div class='add'>+ * Loop over the 1-byte descriptors in the passed CPUID(0x2) output registers</div><div class='add'>+ * @_regs.  Provide the parsed information for each descriptor through @_desc.</div><div class='add'>+ *</div><div class='add'>+ * To handle cache-specific descriptors, switch on @_desc-&gt;c_type.  For TLB</div><div class='add'>+ * descriptors, switch on @_desc-&gt;t_type.</div><div class='add'>+ *</div><div class='add'>+ * Example usage for cache descriptors::</div><div class='add'>+ *</div><div class='add'>+ *	const struct leaf_0x2_table *desc;</div><div class='add'>+ *	union leaf_0x2_regs regs;</div><div class='add'>+ *	u8 *ptr;</div><div class='add'>+ *</div><div class='add'>+ *	cpuid_leaf_0x2(&amp;regs);</div><div class='add'>+ *	for_each_cpuid_0x2_desc(regs, ptr, desc) {</div><div class='add'>+ *		switch (desc-&gt;c_type) {</div><div class='add'>+ *			...</div><div class='add'>+ *		}</div><div class='add'>+ *	}</div><div class='add'>+ */</div><div class='add'>+#define for_each_cpuid_0x2_desc(_regs, _ptr, _desc)				\</div><div class='add'>+	for (_ptr = &amp;(_regs).desc[1];						\</div><div class='add'>+	     _ptr &lt; &amp;(_regs).desc[16] &amp;&amp; (_desc = &amp;cpuid_0x2_table[*_ptr]);	\</div><div class='add'>+	     _ptr++)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CPUID(0x80000006) parsing:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static inline bool cpuid_amd_hygon_has_l3_cache(void)</div><div class='add'>+{</div><div class='add'>+	return cpuid_edx(0x80000006);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_CPUID_API_H */</div><div class='head'>diff --git a/arch/x86/include/asm/cpuid/types.h b/arch/x86/include/asm/cpuid/types.h<br/>index 8582e27e836d..8a00364b79de 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpuid/types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/cpuid/types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/cpuid/types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/cpuid/types.h</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #ifndef _ASM_X86_CPUID_TYPES_H</div><div class='ctx'> #define _ASM_X86_CPUID_TYPES_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -29,4 +30,98 @@ enum cpuid_regs_idx {</div><div class='ctx'> #define CPUID_LEAF_FREQ		0x16</div><div class='ctx'> #define CPUID_LEAF_TILE		0x1d</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Types for CPUID(0x2) parsing:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct leaf_0x2_reg {</div><div class='add'>+		u32		: 31,</div><div class='add'>+			invalid	: 1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union leaf_0x2_regs {</div><div class='add'>+	struct leaf_0x2_reg	reg[4];</div><div class='add'>+	u32			regv[4];</div><div class='add'>+	u8			desc[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Leaf 0x2 1-byte descriptors' cache types</div><div class='add'>+ * To be used for their mappings at cpuid_0x2_table[]</div><div class='add'>+ *</div><div class='add'>+ * Start at 1 since type 0 is reserved for HW byte descriptors which are</div><div class='add'>+ * not recognized by the kernel; i.e., those without an explicit mapping.</div><div class='add'>+ */</div><div class='add'>+enum _cache_table_type {</div><div class='add'>+	CACHE_L1_INST		= 1,</div><div class='add'>+	CACHE_L1_DATA,</div><div class='add'>+	CACHE_L2,</div><div class='add'>+	CACHE_L3</div><div class='add'>+	/* Adjust __TLB_TABLE_TYPE_BEGIN before adding more types */</div><div class='add'>+} __packed;</div><div class='add'>+#ifndef __CHECKER__</div><div class='add'>+static_assert(sizeof(enum _cache_table_type) == 1);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Ensure that leaf 0x2 cache and TLB type values do not intersect,</div><div class='add'>+ * since they share the same type field at struct cpuid_0x2_table.</div><div class='add'>+ */</div><div class='add'>+#define __TLB_TABLE_TYPE_BEGIN		(CACHE_L3 + 1)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Leaf 0x2 1-byte descriptors' TLB types</div><div class='add'>+ * To be used for their mappings at cpuid_0x2_table[]</div><div class='add'>+ */</div><div class='add'>+enum _tlb_table_type {</div><div class='add'>+	TLB_INST_4K		= __TLB_TABLE_TYPE_BEGIN,</div><div class='add'>+	TLB_INST_4M,</div><div class='add'>+	TLB_INST_2M_4M,</div><div class='add'>+	TLB_INST_ALL,</div><div class='add'>+</div><div class='add'>+	TLB_DATA_4K,</div><div class='add'>+	TLB_DATA_4M,</div><div class='add'>+	TLB_DATA_2M_4M,</div><div class='add'>+	TLB_DATA_4K_4M,</div><div class='add'>+	TLB_DATA_1G,</div><div class='add'>+	TLB_DATA_1G_2M_4M,</div><div class='add'>+</div><div class='add'>+	TLB_DATA0_4K,</div><div class='add'>+	TLB_DATA0_4M,</div><div class='add'>+	TLB_DATA0_2M_4M,</div><div class='add'>+</div><div class='add'>+	STLB_4K,</div><div class='add'>+	STLB_4K_2M,</div><div class='add'>+} __packed;</div><div class='add'>+#ifndef __CHECKER__</div><div class='add'>+static_assert(sizeof(enum _tlb_table_type) == 1);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Combined parsing table for leaf 0x2 cache and TLB descriptors.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct leaf_0x2_table {</div><div class='add'>+	union {</div><div class='add'>+		enum _cache_table_type	c_type;</div><div class='add'>+		enum _tlb_table_type	t_type;</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		short			c_size;</div><div class='add'>+		short			entries;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct leaf_0x2_table cpuid_0x2_table[256];</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * All of leaf 0x2's one-byte TLB descriptors implies the same number of entries</div><div class='add'>+ * for their respective TLB types.  TLB descriptor 0x63 is an exception: it</div><div class='add'>+ * implies 4 dTLB entries for 1GB pages and 32 dTLB entries for 2MB or 4MB pages.</div><div class='add'>+ *</div><div class='add'>+ * Encode that descriptor's dTLB entry count for 2MB/4MB pages here, as the entry</div><div class='add'>+ * count for dTLB 1GB pages is already encoded at the cpuid_0x2_table[]'s mapping.</div><div class='add'>+ */</div><div class='add'>+#define TLB_0x63_2M_4M_ENTRIES		32</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_CPUID_TYPES_H */</div><div class='head'>diff --git a/arch/x86/include/asm/debugreg.h b/arch/x86/include/asm/debugreg.h<br/>index fdbbbfec745a..363110e6b2e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/debugreg.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/debugreg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/debugreg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/debugreg.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@ DECLARE_PER_CPU(unsigned long, cpu_dr7);</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long native_get_debugreg(int regno)</div><div class='ctx'> {</div><div class='del'>-	unsigned long val = 0;	/* Damn you, gcc! */</div><div class='add'>+	unsigned long val;</div><div class='ctx'> </div><div class='ctx'> 	switch (regno) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -43,7 +43,7 @@ static __always_inline unsigned long native_get_debugreg(int regno)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 7:</div><div class='ctx'> 		/*</div><div class='del'>-		 * Apply __FORCE_ORDER to DR7 reads to forbid re-ordering them</div><div class='add'>+		 * Use "asm volatile" for DR7 reads to forbid re-ordering them</div><div class='ctx'> 		 * with other code.</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * This is needed because a DR7 access can cause a #VC exception</div><div class='hunk'>@@ -55,7 +55,7 @@ static __always_inline unsigned long native_get_debugreg(int regno)</div><div class='ctx'> 		 * re-ordered to happen before the call to sev_es_ist_enter(),</div><div class='ctx'> 		 * causing stack recursion.</div><div class='ctx'> 		 */</div><div class='del'>-		asm volatile("mov %%db7, %0" : "=r" (val) : __FORCE_ORDER);</div><div class='add'>+		asm volatile("mov %%db7, %0" : "=r" (val));</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BUG();</div><div class='hunk'>@@ -83,15 +83,15 @@ static __always_inline void native_set_debugreg(int regno, unsigned long value)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 7:</div><div class='ctx'> 		/*</div><div class='del'>-		 * Apply __FORCE_ORDER to DR7 writes to forbid re-ordering them</div><div class='add'>+		 * Use "asm volatile" for DR7 writes to forbid re-ordering them</div><div class='ctx'> 		 * with other code.</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * While is didn't happen with a DR7 write (see the DR7 read</div><div class='ctx'> 		 * comment above which explains where it happened), add the</div><div class='del'>-		 * __FORCE_ORDER here too to avoid similar problems in the</div><div class='add'>+		 * "asm volatile" here too to avoid similar problems in the</div><div class='ctx'> 		 * future.</div><div class='ctx'> 		 */</div><div class='del'>-		asm volatile("mov %0, %%db7"	::"r" (value), __FORCE_ORDER);</div><div class='add'>+		asm volatile("mov %0, %%db7"	::"r" (value));</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BUG();</div><div class='hunk'>@@ -169,7 +169,7 @@ static inline unsigned long get_debugctlmsr(void)</div><div class='ctx'> 	if (boot_cpu_data.x86 &lt; 6)</div><div class='ctx'> 		return 0;</div><div class='ctx'> #endif</div><div class='del'>-	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);</div><div class='add'>+	rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctlmsr);</div><div class='ctx'> </div><div class='ctx'> 	return debugctlmsr;</div><div class='ctx'> }</div><div class='hunk'>@@ -180,7 +180,7 @@ static inline void update_debugctlmsr(unsigned long debugctlmsr)</div><div class='ctx'> 	if (boot_cpu_data.x86 &lt; 6)</div><div class='ctx'> 		return;</div><div class='ctx'> #endif</div><div class='del'>-	wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);</div><div class='add'>+	wrmsrq(MSR_IA32_DEBUGCTLMSR, debugctlmsr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_DEBUGREG_H */</div><div class='head'>diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h<br/>index 128602612eca..6c8fdc96be7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/elf.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/elf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/elf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/elf.h</a></div><div class='hunk'>@@ -76,12 +76,8 @@ typedef struct user_i387_struct elf_fpregset_t;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='ctx'> extern unsigned int vdso64_enabled;</div><div class='del'>-#endif</div><div class='del'>-#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)</div><div class='ctx'> extern unsigned int vdso32_enabled;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This is used to ensure we don't load something for the wrong architecture.</div><div class='head'>diff --git a/arch/x86/include/asm/entry-common.h b/arch/x86/include/asm/entry-common.h<br/>index 77d20555e04d..d535a97c7284 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/entry-common.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/entry-common.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/entry-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/entry-common.h</a></div><div class='hunk'>@@ -53,7 +53,6 @@ static inline void arch_exit_work(unsigned long ti_work)</div><div class='ctx'> 	if (unlikely(ti_work &amp; _TIF_IO_BITMAP))</div><div class='ctx'> 		tss_update_io_bitmap();</div><div class='ctx'> </div><div class='del'>-	fpregs_assert_state_consistent();</div><div class='ctx'> 	if (unlikely(ti_work &amp; _TIF_NEED_FPU_LOAD))</div><div class='ctx'> 		switch_fpu_return();</div><div class='ctx'> }</div><div class='hunk'>@@ -61,7 +60,9 @@ static inline void arch_exit_work(unsigned long ti_work)</div><div class='ctx'> static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,</div><div class='ctx'> 						  unsigned long ti_work)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ENABLED(CONFIG_X86_DEBUG_FPU) || unlikely(ti_work))</div><div class='add'>+	fpregs_assert_state_consistent();</div><div class='add'>+</div><div class='add'>+	if (unlikely(ti_work))</div><div class='ctx'> 		arch_exit_work(ti_work);</div><div class='ctx'> </div><div class='ctx'> 	fred_update_rsp0();</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h<br/>index f42de5f05e7e..cd6f194a912b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/api.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/api.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/fpu/api.h</a></div><div class='hunk'>@@ -126,6 +126,7 @@ static inline void fpstate_init_soft(struct swregs_state *soft) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* State tracking */</div><div class='add'>+DECLARE_PER_CPU(bool, kernel_fpu_allowed);</div><div class='ctx'> DECLARE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);</div><div class='ctx'> </div><div class='ctx'> /* Process cleanup */</div><div class='hunk'>@@ -136,7 +137,7 @@ static inline void fpstate_free(struct fpu *fpu) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* fpstate-related functions which are exported to KVM */</div><div class='del'>-extern void fpstate_clear_xstate_component(struct fpstate *fps, unsigned int xfeature);</div><div class='add'>+extern void fpstate_clear_xstate_component(struct fpstate *fpstate, unsigned int xfeature);</div><div class='ctx'> </div><div class='ctx'> extern u64 xstate_get_guest_group_perm(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/fpu/sched.h b/arch/x86/include/asm/fpu/sched.h<br/>index c485f1944c5f..c060549c6c94 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/sched.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/sched.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/sched.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/fpu/sched.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;asm/trace/fpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> extern void save_fpregs_to_fpstate(struct fpu *fpu);</div><div class='del'>-extern void fpu__drop(struct fpu *fpu);</div><div class='add'>+extern void fpu__drop(struct task_struct *tsk);</div><div class='ctx'> extern int  fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal,</div><div class='ctx'> 		      unsigned long shstk_addr);</div><div class='ctx'> extern void fpu_flush_thread(void);</div><div class='hunk'>@@ -18,31 +18,25 @@ extern void fpu_flush_thread(void);</div><div class='ctx'> /*</div><div class='ctx'>  * FPU state switching for scheduling.</div><div class='ctx'>  *</div><div class='del'>- * This is a two-stage process:</div><div class='add'>+ * switch_fpu() saves the old state and sets TIF_NEED_FPU_LOAD if</div><div class='add'>+ * TIF_NEED_FPU_LOAD is not set.  This is done within the context</div><div class='add'>+ * of the old process.</div><div class='ctx'>  *</div><div class='del'>- *  - switch_fpu_prepare() saves the old state.</div><div class='del'>- *    This is done within the context of the old process.</div><div class='del'>- *</div><div class='del'>- *  - switch_fpu_finish() sets TIF_NEED_FPU_LOAD; the floating point state</div><div class='del'>- *    will get loaded on return to userspace, or when the kernel needs it.</div><div class='del'>- *</div><div class='del'>- * If TIF_NEED_FPU_LOAD is cleared then the CPU's FPU registers</div><div class='del'>- * are saved in the current thread's FPU register state.</div><div class='del'>- *</div><div class='del'>- * If TIF_NEED_FPU_LOAD is set then CPU's FPU registers may not</div><div class='del'>- * hold current()'s FPU registers. It is required to load the</div><div class='add'>+ * Once TIF_NEED_FPU_LOAD is set, it is required to load the</div><div class='ctx'>  * registers before returning to userland or using the content</div><div class='ctx'>  * otherwise.</div><div class='ctx'>  *</div><div class='ctx'>  * The FPU context is only stored/restored for a user task and</div><div class='ctx'>  * PF_KTHREAD is used to distinguish between kernel and user threads.</div><div class='ctx'>  */</div><div class='del'>-static inline void switch_fpu_prepare(struct task_struct *old, int cpu)</div><div class='add'>+static inline void switch_fpu(struct task_struct *old, int cpu)</div><div class='ctx'> {</div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_FPU) &amp;&amp;</div><div class='add'>+	if (!test_tsk_thread_flag(old, TIF_NEED_FPU_LOAD) &amp;&amp;</div><div class='add'>+	    cpu_feature_enabled(X86_FEATURE_FPU) &amp;&amp;</div><div class='ctx'> 	    !(old-&gt;flags &amp; (PF_KTHREAD | PF_USER_WORKER))) {</div><div class='del'>-		struct fpu *old_fpu = &amp;old-&gt;thread.fpu;</div><div class='add'>+		struct fpu *old_fpu = x86_task_fpu(old);</div><div class='ctx'> </div><div class='add'>+		set_tsk_thread_flag(old, TIF_NEED_FPU_LOAD);</div><div class='ctx'> 		save_fpregs_to_fpstate(old_fpu);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The save operation preserved register state, so the</div><div class='hunk'>@@ -50,7 +44,7 @@ static inline void switch_fpu_prepare(struct task_struct *old, int cpu)</div><div class='ctx'> 		 * current CPU number in @old_fpu, so the next return</div><div class='ctx'> 		 * to user space can avoid the FPU register restore</div><div class='ctx'> 		 * when is returns on the same CPU and still owns the</div><div class='del'>-		 * context.</div><div class='add'>+		 * context. See fpregs_restore_userregs().</div><div class='ctx'> 		 */</div><div class='ctx'> 		old_fpu-&gt;last_cpu = cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -58,14 +52,4 @@ static inline void switch_fpu_prepare(struct task_struct *old, int cpu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Delay loading of the complete FPU state until the return to userland.</div><div class='del'>- * PKRU is handled separately.</div><div class='del'>- */</div><div class='del'>-static inline void switch_fpu_finish(struct task_struct *new)</div><div class='del'>-{</div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_FPU))</div><div class='del'>-		set_tsk_thread_flag(new, TIF_NEED_FPU_LOAD);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* _ASM_X86_FPU_SCHED_H */</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h<br/>index de16862bf230..1c94121acd3d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/fpu/types.h</a></div><div class='hunk'>@@ -125,6 +125,7 @@ enum xfeature {</div><div class='ctx'> 	XFEATURE_RSRVD_COMP_16,</div><div class='ctx'> 	XFEATURE_XTILE_CFG,</div><div class='ctx'> 	XFEATURE_XTILE_DATA,</div><div class='add'>+	XFEATURE_APX,</div><div class='ctx'> </div><div class='ctx'> 	XFEATURE_MAX,</div><div class='ctx'> };</div><div class='hunk'>@@ -145,6 +146,7 @@ enum xfeature {</div><div class='ctx'> #define XFEATURE_MASK_LBR		(1 &lt;&lt; XFEATURE_LBR)</div><div class='ctx'> #define XFEATURE_MASK_XTILE_CFG		(1 &lt;&lt; XFEATURE_XTILE_CFG)</div><div class='ctx'> #define XFEATURE_MASK_XTILE_DATA	(1 &lt;&lt; XFEATURE_XTILE_DATA)</div><div class='add'>+#define XFEATURE_MASK_APX		(1 &lt;&lt; XFEATURE_APX)</div><div class='ctx'> </div><div class='ctx'> #define XFEATURE_MASK_FPSSE		(XFEATURE_MASK_FP | XFEATURE_MASK_SSE)</div><div class='ctx'> #define XFEATURE_MASK_AVX512		(XFEATURE_MASK_OPMASK \</div><div class='hunk'>@@ -304,6 +306,13 @@ struct xtile_data {</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * State component 19: 8B extended general purpose register.</div><div class='add'>+ */</div><div class='add'>+struct apx_state {</div><div class='add'>+	u64				egpr[16];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * State component 10 is supervisor state used for context-switching the</div><div class='ctx'>  * PASID state.</div><div class='ctx'>  */</div><div class='hunk'>@@ -407,9 +416,11 @@ struct fpu_state_perm {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * @__state_perm:</div><div class='ctx'> 	 *</div><div class='del'>-	 * This bitmap indicates the permission for state components, which</div><div class='del'>-	 * are available to a thread group. The permission prctl() sets the</div><div class='del'>-	 * enabled state bits in thread_group_leader()-&gt;thread.fpu.</div><div class='add'>+	 * This bitmap indicates the permission for state components</div><div class='add'>+	 * available to a thread group, including both user and supervisor</div><div class='add'>+	 * components and software-defined bits like FPU_GUEST_PERM_LOCKED.</div><div class='add'>+	 * The permission prctl() sets the enabled state bits in</div><div class='add'>+	 * thread_group_leader()-&gt;thread.fpu.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * All run time operations use the per thread information in the</div><div class='ctx'> 	 * currently active fpu.fpstate which contains the xfeature masks</div><div class='hunk'>@@ -525,13 +536,6 @@ struct fpu_guest {</div><div class='ctx'> 	u64				xfeatures;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * @perm:			xfeature bitmap of features which are</div><div class='del'>-	 *				permitted to be enabled for the guest</div><div class='del'>-	 *				vCPU.</div><div class='del'>-	 */</div><div class='del'>-	u64				perm;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * @xfd_err:			Save the guest value.</div><div class='ctx'> 	 */</div><div class='ctx'> 	u64				xfd_err;</div><div class='head'>diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h<br/>index 7f39fe7980c5..b308a76afbb7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/xstate.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fpu/xstate.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fpu/xstate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/fpu/xstate.h</a></div><div class='hunk'>@@ -32,7 +32,8 @@</div><div class='ctx'> 				      XFEATURE_MASK_PKRU | \</div><div class='ctx'> 				      XFEATURE_MASK_BNDREGS | \</div><div class='ctx'> 				      XFEATURE_MASK_BNDCSR | \</div><div class='del'>-				      XFEATURE_MASK_XTILE)</div><div class='add'>+				      XFEATURE_MASK_XTILE | \</div><div class='add'>+				      XFEATURE_MASK_APX)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Features which are restored when returning to user space.</div><div class='head'>diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h<br/>index 2a29e5216881..12b34d5b2953 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fred.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fred.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fred.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/fred.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/const.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/trapnr.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/include/asm/fsgsbase.h b/arch/x86/include/asm/fsgsbase.h<br/>index 02f239569b93..ab2547f97c2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fsgsbase.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/fsgsbase.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/fsgsbase.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/fsgsbase.h</a></div><div class='hunk'>@@ -60,7 +60,7 @@ static inline unsigned long x86_fsbase_read_cpu(void)</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_FSGSBASE))</div><div class='ctx'> 		fsbase = rdfsbase();</div><div class='ctx'> 	else</div><div class='del'>-		rdmsrl(MSR_FS_BASE, fsbase);</div><div class='add'>+		rdmsrq(MSR_FS_BASE, fsbase);</div><div class='ctx'> </div><div class='ctx'> 	return fsbase;</div><div class='ctx'> }</div><div class='hunk'>@@ -70,7 +70,7 @@ static inline void x86_fsbase_write_cpu(unsigned long fsbase)</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_FSGSBASE))</div><div class='ctx'> 		wrfsbase(fsbase);</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl(MSR_FS_BASE, fsbase);</div><div class='add'>+		wrmsrq(MSR_FS_BASE, fsbase);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern unsigned long x86_gsbase_read_cpu_inactive(void);</div><div class='head'>diff --git a/arch/x86/include/asm/inat.h b/arch/x86/include/asm/inat.h<br/>index 53e4015242b4..97f341777db5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/inat.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/inat.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/inat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/inat.h</a></div><div class='hunk'>@@ -82,6 +82,7 @@</div><div class='ctx'> #define INAT_NO_REX2	(1 &lt;&lt; (INAT_FLAG_OFFS + 8))</div><div class='ctx'> #define INAT_REX2_VARIANT	(1 &lt;&lt; (INAT_FLAG_OFFS + 9))</div><div class='ctx'> #define INAT_EVEX_SCALABLE	(1 &lt;&lt; (INAT_FLAG_OFFS + 10))</div><div class='add'>+#define INAT_INV64	(1 &lt;&lt; (INAT_FLAG_OFFS + 11))</div><div class='ctx'> /* Attribute making macros for attribute tables */</div><div class='ctx'> #define INAT_MAKE_PREFIX(pfx)	(pfx &lt;&lt; INAT_PFX_OFFS)</div><div class='ctx'> #define INAT_MAKE_ESCAPE(esc)	(esc &lt;&lt; INAT_ESC_OFFS)</div><div class='hunk'>@@ -242,4 +243,9 @@ static inline int inat_evex_scalable(insn_attr_t attr)</div><div class='ctx'> {</div><div class='ctx'> 	return attr &amp; INAT_EVEX_SCALABLE;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline int inat_is_invalid64(insn_attr_t attr)</div><div class='add'>+{</div><div class='add'>+	return attr &amp; INAT_INV64;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h<br/>index 3a97a7eefb51..be10c188614f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/intel-family.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/intel-family.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/intel-family.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/intel-family.h</a></div><div class='hunk'>@@ -126,6 +126,8 @@</div><div class='ctx'> #define INTEL_GRANITERAPIDS_X		IFM(6, 0xAD) /* Redwood Cove */</div><div class='ctx'> #define INTEL_GRANITERAPIDS_D		IFM(6, 0xAE)</div><div class='ctx'> </div><div class='add'>+#define INTEL_BARTLETTLAKE		IFM(6, 0xD7) /* Raptor Cove */</div><div class='add'>+</div><div class='ctx'> /* "Hybrid" Processors (P-Core/E-Core) */</div><div class='ctx'> </div><div class='ctx'> #define INTEL_LAKEFIELD			IFM(6, 0x8A) /* Sunny Cove / Tremont */</div><div class='head'>diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h<br/>index e889c3bab5a2..ca309a3227c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/io.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/io.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/io.h</a></div><div class='hunk'>@@ -217,7 +217,7 @@ void memset_io(volatile void __iomem *, int, size_t);</div><div class='ctx'> static inline void __iowrite32_copy(void __iomem *to, const void *from,</div><div class='ctx'> 				    size_t count)</div><div class='ctx'> {</div><div class='del'>-	asm volatile("rep ; movsl"</div><div class='add'>+	asm volatile("rep movsl"</div><div class='ctx'> 		     : "=&amp;c"(count), "=&amp;D"(to), "=&amp;S"(from)</div><div class='ctx'> 		     : "0"(count), "1"(to), "2"(from)</div><div class='ctx'> 		     : "memory");</div><div class='hunk'>@@ -282,7 +282,7 @@ static inline void outs##bwl(u16 port, const void *addr, unsigned long count) \</div><div class='ctx'> 			count--;					\</div><div class='ctx'> 		}							\</div><div class='ctx'> 	} else {							\</div><div class='del'>-		asm volatile("rep; outs" #bwl				\</div><div class='add'>+		asm volatile("rep outs" #bwl				\</div><div class='ctx'> 			     : "+S"(addr), "+c"(count)			\</div><div class='ctx'> 			     : "d"(port) : "memory");			\</div><div class='ctx'> 	}								\</div><div class='hunk'>@@ -298,7 +298,7 @@ static inline void ins##bwl(u16 port, void *addr, unsigned long count)	\</div><div class='ctx'> 			count--;					\</div><div class='ctx'> 		}							\</div><div class='ctx'> 	} else {							\</div><div class='del'>-		asm volatile("rep; ins" #bwl				\</div><div class='add'>+		asm volatile("rep ins" #bwl				\</div><div class='ctx'> 			     : "+D"(addr), "+c"(count)			\</div><div class='ctx'> 			     : "d"(port) : "memory");			\</div><div class='ctx'> 	}								\</div><div class='head'>diff --git a/arch/x86/include/asm/kexec.h b/arch/x86/include/asm/kexec.h<br/>index 5432457d2338..f2ad77929d6e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/kexec.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/kexec.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/kexec.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/kexec.h</a></div><div class='hunk'>@@ -8,6 +8,9 @@</div><div class='ctx'> # define PA_PGD			2</div><div class='ctx'> # define PA_SWAP_PAGE		3</div><div class='ctx'> # define PAGES_NR		4</div><div class='add'>+#else</div><div class='add'>+/* Size of each exception handler referenced by the IDT */</div><div class='add'>+# define KEXEC_DEBUG_EXC_HANDLER_SIZE	6 /* PUSHI, PUSHI, 2-byte JMP */</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> # define KEXEC_CONTROL_PAGE_SIZE	4096</div><div class='hunk'>@@ -59,6 +62,10 @@ struct kimage;</div><div class='ctx'> extern unsigned long kexec_va_control_page;</div><div class='ctx'> extern unsigned long kexec_pa_table_page;</div><div class='ctx'> extern unsigned long kexec_pa_swap_page;</div><div class='add'>+extern gate_desc kexec_debug_idt[];</div><div class='add'>+extern unsigned char kexec_debug_exc_vectors[];</div><div class='add'>+extern uint16_t kexec_debug_8250_port;</div><div class='add'>+extern unsigned long kexec_debug_8250_mmio32;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/kvm-x86-ops.h<br/>index 823c0434bbad..79406bf07a1c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/kvm-x86-ops.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/kvm-x86-ops.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/kvm-x86-ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/kvm-x86-ops.h</a></div><div class='hunk'>@@ -21,6 +21,7 @@ KVM_X86_OP(has_emulated_msr)</div><div class='ctx'> KVM_X86_OP(vcpu_after_set_cpuid)</div><div class='ctx'> KVM_X86_OP(vm_init)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(vm_destroy)</div><div class='add'>+KVM_X86_OP_OPTIONAL(vm_pre_destroy)</div><div class='ctx'> KVM_X86_OP_OPTIONAL_RET0(vcpu_precreate)</div><div class='ctx'> KVM_X86_OP(vcpu_create)</div><div class='ctx'> KVM_X86_OP(vcpu_free)</div><div class='hunk'>@@ -115,6 +116,7 @@ KVM_X86_OP_OPTIONAL(pi_start_assignment)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(apicv_pre_state_restore)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(apicv_post_state_restore)</div><div class='ctx'> KVM_X86_OP_OPTIONAL_RET0(dy_apicv_has_pending_interrupt)</div><div class='add'>+KVM_X86_OP_OPTIONAL(protected_apic_has_interrupt)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(set_hv_timer)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(cancel_hv_timer)</div><div class='ctx'> KVM_X86_OP(setup_mce)</div><div class='hunk'>@@ -125,7 +127,8 @@ KVM_X86_OP(leave_smm)</div><div class='ctx'> KVM_X86_OP(enable_smi_window)</div><div class='ctx'> #endif</div><div class='ctx'> KVM_X86_OP_OPTIONAL(dev_get_attr)</div><div class='del'>-KVM_X86_OP_OPTIONAL(mem_enc_ioctl)</div><div class='add'>+KVM_X86_OP(mem_enc_ioctl)</div><div class='add'>+KVM_X86_OP_OPTIONAL(vcpu_mem_enc_ioctl)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(mem_enc_register_region)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(mem_enc_unregister_region)</div><div class='ctx'> KVM_X86_OP_OPTIONAL(vm_copy_enc_context_from)</div><div class='head'>diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h<br/>index a884ab544335..67b464651c8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/kvm_host.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/kvm_host.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/kvm_host.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/kvm_host.h</a></div><div class='hunk'>@@ -34,7 +34,9 @@</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='add'>+#include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_page_track.h&gt;</div><div class='ctx'> #include &lt;asm/kvm_vcpu_regs.h&gt;</div><div class='ctx'> #include &lt;asm/reboot.h&gt;</div><div class='hunk'>@@ -607,8 +609,15 @@ struct kvm_pmu {</div><div class='ctx'> struct kvm_pmu_ops;</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='del'>-	KVM_DEBUGREG_BP_ENABLED = 1,</div><div class='del'>-	KVM_DEBUGREG_WONT_EXIT = 2,</div><div class='add'>+	KVM_DEBUGREG_BP_ENABLED		= BIT(0),</div><div class='add'>+	KVM_DEBUGREG_WONT_EXIT		= BIT(1),</div><div class='add'>+	/*</div><div class='add'>+	 * Guest debug registers (DR0-3, DR6 and DR7) are saved/restored by</div><div class='add'>+	 * hardware on exit from or enter to guest. KVM needn't switch them.</div><div class='add'>+	 * DR0-3, DR6 and DR7 are set to their architectural INIT value on VM</div><div class='add'>+	 * exit, host values need to be restored.</div><div class='add'>+	 */</div><div class='add'>+	KVM_DEBUGREG_AUTO_SWITCH	= BIT(2),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_mtrr {</div><div class='hunk'>@@ -1472,8 +1481,13 @@ struct kvm_arch {</div><div class='ctx'> 	struct once nx_once;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	/* The number of TDP MMU pages across all roots. */</div><div class='add'>+#ifdef CONFIG_KVM_PROVE_MMU</div><div class='add'>+	/*</div><div class='add'>+	 * The number of TDP MMU pages across all roots.  Used only to sanity</div><div class='add'>+	 * check that KVM isn't leaking TDP MMU pages.</div><div class='add'>+	 */</div><div class='ctx'> 	atomic64_t tdp_mmu_pages;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * List of struct kvm_mmu_pages being used as roots.</div><div class='hunk'>@@ -1564,6 +1578,13 @@ struct kvm_arch {</div><div class='ctx'> 	struct kvm_mmu_memory_cache split_desc_cache;</div><div class='ctx'> </div><div class='ctx'> 	gfn_t gfn_direct_bits;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A Zero</div><div class='add'>+	 * value indicates CPU dirty logging is unsupported or disabled in</div><div class='add'>+	 * current VM.</div><div class='add'>+	 */</div><div class='add'>+	int cpu_dirty_log_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_vm_stat {</div><div class='hunk'>@@ -1667,6 +1688,7 @@ struct kvm_x86_ops {</div><div class='ctx'> 	unsigned int vm_size;</div><div class='ctx'> 	int (*vm_init)(struct kvm *kvm);</div><div class='ctx'> 	void (*vm_destroy)(struct kvm *kvm);</div><div class='add'>+	void (*vm_pre_destroy)(struct kvm *kvm);</div><div class='ctx'> </div><div class='ctx'> 	/* Create, but do not attach this VCPU */</div><div class='ctx'> 	int (*vcpu_precreate)(struct kvm *kvm);</div><div class='hunk'>@@ -1816,11 +1838,6 @@ struct kvm_x86_ops {</div><div class='ctx'> 			       struct x86_exception *exception);</div><div class='ctx'> 	void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer.  A zero</div><div class='del'>-	 * value indicates CPU dirty logging is unsupported or disabled.</div><div class='del'>-	 */</div><div class='del'>-	int cpu_dirty_log_size;</div><div class='ctx'> 	void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> 	const struct kvm_x86_nested_ops *nested_ops;</div><div class='hunk'>@@ -1834,6 +1851,7 @@ struct kvm_x86_ops {</div><div class='ctx'> 	void (*apicv_pre_state_restore)(struct kvm_vcpu *vcpu);</div><div class='ctx'> 	void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);</div><div class='ctx'> 	bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);</div><div class='add'>+	bool (*protected_apic_has_interrupt)(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> 	int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,</div><div class='ctx'> 			    bool *expired);</div><div class='hunk'>@@ -1850,6 +1868,7 @@ struct kvm_x86_ops {</div><div class='ctx'> </div><div class='ctx'> 	int (*dev_get_attr)(u32 group, u64 attr, u64 *val);</div><div class='ctx'> 	int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);</div><div class='add'>+	int (*vcpu_mem_enc_ioctl)(struct kvm_vcpu *vcpu, void __user *argp);</div><div class='ctx'> 	int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);</div><div class='ctx'> 	int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);</div><div class='ctx'> 	int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);</div><div class='hunk'>@@ -2272,7 +2291,7 @@ static inline unsigned long read_msr(unsigned long msr)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(msr, value);</div><div class='add'>+	rdmsrq(msr, value);</div><div class='ctx'> 	return value;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -2326,6 +2345,7 @@ int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,</div><div class='ctx'> int kvm_add_user_return_msr(u32 msr);</div><div class='ctx'> int kvm_find_user_return_msr(u32 msr);</div><div class='ctx'> int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);</div><div class='add'>+void kvm_user_return_msr_update_cache(unsigned int index, u64 val);</div><div class='ctx'> </div><div class='ctx'> static inline bool kvm_is_supported_user_return_msr(u32 msr)</div><div class='ctx'> {</div><div class='hunk'>@@ -2409,7 +2429,12 @@ int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);</div><div class='ctx'> 	 KVM_X86_QUIRK_FIX_HYPERCALL_INSN |	\</div><div class='ctx'> 	 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS |	\</div><div class='ctx'> 	 KVM_X86_QUIRK_SLOT_ZAP_ALL |		\</div><div class='del'>-	 KVM_X86_QUIRK_STUFF_FEATURE_MSRS)</div><div class='add'>+	 KVM_X86_QUIRK_STUFF_FEATURE_MSRS |	\</div><div class='add'>+	 KVM_X86_QUIRK_IGNORE_GUEST_PAT)</div><div class='add'>+</div><div class='add'>+#define KVM_X86_CONDITIONAL_QUIRKS		\</div><div class='add'>+	(KVM_X86_QUIRK_CD_NW_CLEARED |		\</div><div class='add'>+	 KVM_X86_QUIRK_IGNORE_GUEST_PAT)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * KVM previously used a u32 field in kvm_run to indicate the hypercall was</div><div class='hunk'>@@ -2418,4 +2443,9 @@ int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);</div><div class='ctx'>  */</div><div class='ctx'> #define KVM_EXIT_HYPERCALL_MBZ		GENMASK_ULL(31, 1)</div><div class='ctx'> </div><div class='add'>+static inline bool kvm_arch_has_irq_bypass(void)</div><div class='add'>+{</div><div class='add'>+	return enable_apicv &amp;&amp; irq_remapping_cap(IRQ_POSTING_CAP);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_KVM_HOST_H */</div><div class='head'>diff --git a/arch/x86/include/asm/linkage.h b/arch/x86/include/asm/linkage.h<br/>index b51d8a4673f5..9d38ae744a2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/linkage.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/linkage.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/linkage.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/linkage.h</a></div><div class='hunk'>@@ -141,5 +141,15 @@</div><div class='ctx'> #define SYM_FUNC_START_WEAK_NOALIGN(name)		\</div><div class='ctx'> 	SYM_START(name, SYM_L_WEAK, SYM_A_NONE)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Expose 'sym' to the startup code in arch/x86/boot/startup/, by emitting an</div><div class='add'>+ * alias prefixed with __pi_</div><div class='add'>+ */</div><div class='add'>+#ifdef __ASSEMBLER__</div><div class='add'>+#define SYM_PIC_ALIAS(sym)	SYM_ALIAS(__pi_ ## sym, sym, SYM_L_GLOBAL)</div><div class='add'>+#else</div><div class='add'>+#define SYM_PIC_ALIAS(sym)	extern typeof(sym) __PASTE(__pi_, sym) __alias(sym)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_LINKAGE_H */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h<br/>index 1530ee301dfe..ea6494628cb0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mem_encrypt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mem_encrypt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mem_encrypt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/mem_encrypt.h</a></div><div class='hunk'>@@ -61,7 +61,7 @@ void __init sev_es_init_vc_handling(void);</div><div class='ctx'> </div><div class='ctx'> static inline u64 sme_get_me_mask(void)</div><div class='ctx'> {</div><div class='del'>-	return RIP_REL_REF(sme_me_mask);</div><div class='add'>+	return sme_me_mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define __bss_decrypted __section(".bss..decrypted")</div><div class='head'>diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h<br/>index 695e569159c1..8b41f26f003b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/microcode.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/microcode.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/microcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/microcode.h</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> #ifndef _ASM_X86_MICROCODE_H</div><div class='ctx'> #define _ASM_X86_MICROCODE_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+</div><div class='ctx'> struct cpu_signature {</div><div class='ctx'> 	unsigned int sig;</div><div class='ctx'> 	unsigned int pf;</div><div class='hunk'>@@ -17,10 +19,12 @@ struct ucode_cpu_info {</div><div class='ctx'> void load_ucode_bsp(void);</div><div class='ctx'> void load_ucode_ap(void);</div><div class='ctx'> void microcode_bsp_resume(void);</div><div class='add'>+bool __init microcode_loader_disabled(void);</div><div class='ctx'> #else</div><div class='ctx'> static inline void load_ucode_bsp(void)	{ }</div><div class='ctx'> static inline void load_ucode_ap(void) { }</div><div class='ctx'> static inline void microcode_bsp_resume(void) { }</div><div class='add'>+static inline bool __init microcode_loader_disabled(void) { return false; }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> extern unsigned long initrd_start_early;</div><div class='hunk'>@@ -61,7 +65,7 @@ static inline u32 intel_get_microcode_revision(void)</div><div class='ctx'> {</div><div class='ctx'> 	u32 rev, dummy;</div><div class='ctx'> </div><div class='del'>-	native_wrmsrl(MSR_IA32_UCODE_REV, 0);</div><div class='add'>+	native_wrmsrq(MSR_IA32_UCODE_REV, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* As documented in the SDM: Do a CPUID 1 here */</div><div class='ctx'> 	native_cpuid_eax(1);</div><div class='head'>diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h<br/>index 8b8055a8eb9e..0fe9c569d171 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mmu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mmu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/mmu.h</a></div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> #define MM_CONTEXT_LOCK_LAM		2</div><div class='ctx'> /* Allow LAM and SVA coexisting */</div><div class='ctx'> #define MM_CONTEXT_FORCE_TAGGED_SVA	3</div><div class='add'>+/* Tracks mm_cpumask */</div><div class='add'>+#define MM_CONTEXT_NOTRACK		4</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * x86 has arch-specific MMU state beyond what lives in mm_struct.</div><div class='hunk'>@@ -44,9 +46,7 @@ typedef struct {</div><div class='ctx'> 	struct ldt_struct	*ldt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ADDRESS_MASKING</div><div class='ctx'> 	/* Active LAM mode:  X86_CR3_LAM_U48 or X86_CR3_LAM_U57 or 0 (disabled) */</div><div class='head'>diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h<br/>index 2398058b6e83..73bf3b1b44e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mmu_context.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mmu_context.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mmu_context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/mmu_context.h</a></div><div class='hunk'>@@ -190,7 +190,7 @@ extern void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,</div><div class='ctx'> #define activate_mm(prev, next)			\</div><div class='ctx'> do {						\</div><div class='ctx'> 	paravirt_enter_mmap(next);		\</div><div class='del'>-	switch_mm((prev), (next), NULL);	\</div><div class='add'>+	switch_mm_irqs_off((prev), (next), NULL);	\</div><div class='ctx'> } while (0);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='hunk'>@@ -247,6 +247,16 @@ static inline bool is_64bit_mm(struct mm_struct *mm)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static inline bool is_notrack_mm(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	return test_bit(MM_CONTEXT_NOTRACK, &amp;mm-&gt;context.flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void set_notrack_mm(struct mm_struct *mm)</div><div class='add'>+{</div><div class='add'>+	set_bit(MM_CONTEXT_NOTRACK, &amp;mm-&gt;context.flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * We only want to enforce protection keys on the current process</div><div class='ctx'>  * because we effectively have no access to PKRU for other</div><div class='hunk'>@@ -272,4 +282,7 @@ unsigned long __get_current_cr3_fast(void);</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm-generic/mmu_context.h&gt;</div><div class='ctx'> </div><div class='add'>+extern struct mm_struct *use_temporary_mm(struct mm_struct *temp_mm);</div><div class='add'>+extern void unuse_temporary_mm(struct mm_struct *prev_mm);</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_MMU_CONTEXT_H */</div><div class='head'>diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h<br/>index bab5ccfc60a7..778444310cfb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mshyperv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mshyperv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mshyperv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/mshyperv.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;asm/nospec-branch.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;hyperv/hvhdk.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -304,7 +305,7 @@ void hv_set_non_nested_msr(unsigned int reg, u64 value);</div><div class='ctx'> </div><div class='ctx'> static __always_inline u64 hv_raw_get_msr(unsigned int reg)</div><div class='ctx'> {</div><div class='del'>-	return __rdmsr(reg);</div><div class='add'>+	return native_rdmsrq(reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_HYPERV */</div><div class='head'>diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h<br/>index e6134ef2263d..b7dded3c8113 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/msr-index.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/msr-index.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/msr-index.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/msr-index.h</a></div><div class='hunk'>@@ -211,6 +211,14 @@</div><div class='ctx'> 						 * VERW clears CPU Register</div><div class='ctx'> 						 * File.</div><div class='ctx'> 						 */</div><div class='add'>+#define ARCH_CAP_ITS_NO			BIT_ULL(62) /*</div><div class='add'>+						     * Not susceptible to</div><div class='add'>+						     * Indirect Target Selection.</div><div class='add'>+						     * This bit is not set by</div><div class='add'>+						     * HW, but is synthesized by</div><div class='add'>+						     * VMMs for guests to know</div><div class='add'>+						     * their affected status.</div><div class='add'>+						     */</div><div class='ctx'> </div><div class='ctx'> #define MSR_IA32_FLUSH_CMD		0x0000010b</div><div class='ctx'> #define L1D_FLUSH			BIT(0)	/*</div><div class='hunk'>@@ -525,7 +533,7 @@</div><div class='ctx'> #define MSR_HWP_CAPABILITIES		0x00000771</div><div class='ctx'> #define MSR_HWP_REQUEST_PKG		0x00000772</div><div class='ctx'> #define MSR_HWP_INTERRUPT		0x00000773</div><div class='del'>-#define MSR_HWP_REQUEST 		0x00000774</div><div class='add'>+#define MSR_HWP_REQUEST			0x00000774</div><div class='ctx'> #define MSR_HWP_STATUS			0x00000777</div><div class='ctx'> </div><div class='ctx'> /* CPUID.6.EAX */</div><div class='hunk'>@@ -542,16 +550,16 @@</div><div class='ctx'> #define HWP_LOWEST_PERF(x)		(((x) &gt;&gt; 24) &amp; 0xff)</div><div class='ctx'> </div><div class='ctx'> /* IA32_HWP_REQUEST */</div><div class='del'>-#define HWP_MIN_PERF(x) 		(x &amp; 0xff)</div><div class='del'>-#define HWP_MAX_PERF(x) 		((x &amp; 0xff) &lt;&lt; 8)</div><div class='add'>+#define HWP_MIN_PERF(x)			(x &amp; 0xff)</div><div class='add'>+#define HWP_MAX_PERF(x)			((x &amp; 0xff) &lt;&lt; 8)</div><div class='ctx'> #define HWP_DESIRED_PERF(x)		((x &amp; 0xff) &lt;&lt; 16)</div><div class='del'>-#define HWP_ENERGY_PERF_PREFERENCE(x)	(((unsigned long long) x &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define HWP_ENERGY_PERF_PREFERENCE(x)	(((u64)x &amp; 0xff) &lt;&lt; 24)</div><div class='ctx'> #define HWP_EPP_PERFORMANCE		0x00</div><div class='ctx'> #define HWP_EPP_BALANCE_PERFORMANCE	0x80</div><div class='ctx'> #define HWP_EPP_BALANCE_POWERSAVE	0xC0</div><div class='ctx'> #define HWP_EPP_POWERSAVE		0xFF</div><div class='del'>-#define HWP_ACTIVITY_WINDOW(x)		((unsigned long long)(x &amp; 0xff3) &lt;&lt; 32)</div><div class='del'>-#define HWP_PACKAGE_CONTROL(x)		((unsigned long long)(x &amp; 0x1) &lt;&lt; 42)</div><div class='add'>+#define HWP_ACTIVITY_WINDOW(x)		((u64)(x &amp; 0xff3) &lt;&lt; 32)</div><div class='add'>+#define HWP_PACKAGE_CONTROL(x)		((u64)(x &amp; 0x1) &lt;&lt; 42)</div><div class='ctx'> </div><div class='ctx'> /* IA32_HWP_STATUS */</div><div class='ctx'> #define HWP_GUARANTEED_CHANGE(x)	(x &amp; 0x1)</div><div class='hunk'>@@ -594,7 +602,11 @@</div><div class='ctx'> /* V6 PMON MSR range */</div><div class='ctx'> #define MSR_IA32_PMC_V6_GP0_CTR		0x1900</div><div class='ctx'> #define MSR_IA32_PMC_V6_GP0_CFG_A	0x1901</div><div class='add'>+#define MSR_IA32_PMC_V6_GP0_CFG_B	0x1902</div><div class='add'>+#define MSR_IA32_PMC_V6_GP0_CFG_C	0x1903</div><div class='ctx'> #define MSR_IA32_PMC_V6_FX0_CTR		0x1980</div><div class='add'>+#define MSR_IA32_PMC_V6_FX0_CFG_B	0x1982</div><div class='add'>+#define MSR_IA32_PMC_V6_FX0_CFG_C	0x1983</div><div class='ctx'> #define MSR_IA32_PMC_V6_STEP		4</div><div class='ctx'> </div><div class='ctx'> /* KeyID partitioning between MKTME and TDX */</div><div class='head'>diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h<br/>index 9397a319d165..4096b8af4ba7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/msr.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/msr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/msr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/msr.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;uapi/asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/shared/msr.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct msr_info {</div><div class='hunk'>@@ -37,23 +38,6 @@ struct saved_msrs {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"</div><div class='del'>- * constraint has different meanings. For i386, "A" means exactly</div><div class='del'>- * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,</div><div class='del'>- * it means rax *or* rdx.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='del'>-/* Using 64-bit values saves one instruction clearing the high half of low */</div><div class='del'>-#define DECLARE_ARGS(val, low, high)	unsigned long low, high</div><div class='del'>-#define EAX_EDX_VAL(val, low, high)	((low) | (high) &lt;&lt; 32)</div><div class='del'>-#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)</div><div class='del'>-#else</div><div class='del'>-#define DECLARE_ARGS(val, low, high)	unsigned long long val</div><div class='del'>-#define EAX_EDX_VAL(val, low, high)	(val)</div><div class='del'>-#define EAX_EDX_RET(val, low, high)	"=A" (val)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Be very careful with includes. This header is prone to include loops.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;asm/atomic.h&gt;</div><div class='hunk'>@@ -63,13 +47,13 @@ struct saved_msrs {</div><div class='ctx'> DECLARE_TRACEPOINT(read_msr);</div><div class='ctx'> DECLARE_TRACEPOINT(write_msr);</div><div class='ctx'> DECLARE_TRACEPOINT(rdpmc);</div><div class='del'>-extern void do_trace_write_msr(unsigned int msr, u64 val, int failed);</div><div class='del'>-extern void do_trace_read_msr(unsigned int msr, u64 val, int failed);</div><div class='del'>-extern void do_trace_rdpmc(unsigned int msr, u64 val, int failed);</div><div class='add'>+extern void do_trace_write_msr(u32 msr, u64 val, int failed);</div><div class='add'>+extern void do_trace_read_msr(u32 msr, u64 val, int failed);</div><div class='add'>+extern void do_trace_rdpmc(u32 msr, u64 val, int failed);</div><div class='ctx'> #else</div><div class='del'>-static inline void do_trace_write_msr(unsigned int msr, u64 val, int failed) {}</div><div class='del'>-static inline void do_trace_read_msr(unsigned int msr, u64 val, int failed) {}</div><div class='del'>-static inline void do_trace_rdpmc(unsigned int msr, u64 val, int failed) {}</div><div class='add'>+static inline void do_trace_write_msr(u32 msr, u64 val, int failed) {}</div><div class='add'>+static inline void do_trace_read_msr(u32 msr, u64 val, int failed) {}</div><div class='add'>+static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -79,9 +63,9 @@ static inline void do_trace_rdpmc(unsigned int msr, u64 val, int failed) {}</div><div class='ctx'>  * think of extending them - you will be slapped with a stinking trout or a frozen</div><div class='ctx'>  * shark will reach you, wherever you are! You've been warned.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline unsigned long long __rdmsr(unsigned int msr)</div><div class='add'>+static __always_inline u64 __rdmsr(u32 msr)</div><div class='ctx'> {</div><div class='del'>-	DECLARE_ARGS(val, low, high);</div><div class='add'>+	EAX_EDX_DECLARE_ARGS(val, low, high);</div><div class='ctx'> </div><div class='ctx'> 	asm volatile("1: rdmsr\n"</div><div class='ctx'> 		     "2:\n"</div><div class='hunk'>@@ -91,12 +75,12 @@ static __always_inline unsigned long long __rdmsr(unsigned int msr)</div><div class='ctx'> 	return EAX_EDX_VAL(val, low, high);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline void __wrmsr(unsigned int msr, u32 low, u32 high)</div><div class='add'>+static __always_inline void __wrmsrq(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	asm volatile("1: wrmsr\n"</div><div class='ctx'> 		     "2:\n"</div><div class='ctx'> 		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)</div><div class='del'>-		     : : "c" (msr), "a"(low), "d" (high) : "memory");</div><div class='add'>+		     : : "c" (msr), "a" ((u32)val), "d" ((u32)(val &gt;&gt; 32)) : "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define native_rdmsr(msr, val1, val2)			\</div><div class='hunk'>@@ -106,16 +90,20 @@ do {							\</div><div class='ctx'> 	(void)((val2) = (u32)(__val &gt;&gt; 32));		\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+static __always_inline u64 native_rdmsrq(u32 msr)</div><div class='add'>+{</div><div class='add'>+	return __rdmsr(msr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define native_wrmsr(msr, low, high)			\</div><div class='del'>-	__wrmsr(msr, low, high)</div><div class='add'>+	__wrmsrq((msr), (u64)(high) &lt;&lt; 32 | (low))</div><div class='ctx'> </div><div class='del'>-#define native_wrmsrl(msr, val)				\</div><div class='del'>-	__wrmsr((msr), (u32)((u64)(val)),		\</div><div class='del'>-		       (u32)((u64)(val) &gt;&gt; 32))</div><div class='add'>+#define native_wrmsrq(msr, val)				\</div><div class='add'>+	__wrmsrq((msr), (val))</div><div class='ctx'> </div><div class='del'>-static inline unsigned long long native_read_msr(unsigned int msr)</div><div class='add'>+static inline u64 native_read_msr(u32 msr)</div><div class='ctx'> {</div><div class='del'>-	unsigned long long val;</div><div class='add'>+	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	val = __rdmsr(msr);</div><div class='ctx'> </div><div class='hunk'>@@ -125,34 +113,35 @@ static inline unsigned long long native_read_msr(unsigned int msr)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long long native_read_msr_safe(unsigned int msr,</div><div class='del'>-						      int *err)</div><div class='add'>+static inline int native_read_msr_safe(u32 msr, u64 *p)</div><div class='ctx'> {</div><div class='del'>-	DECLARE_ARGS(val, low, high);</div><div class='add'>+	int err;</div><div class='add'>+	EAX_EDX_DECLARE_ARGS(val, low, high);</div><div class='ctx'> </div><div class='ctx'> 	asm volatile("1: rdmsr ; xor %[err],%[err]\n"</div><div class='ctx'> 		     "2:\n\t"</div><div class='ctx'> 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])</div><div class='del'>-		     : [err] "=r" (*err), EAX_EDX_RET(val, low, high)</div><div class='add'>+		     : [err] "=r" (err), EAX_EDX_RET(val, low, high)</div><div class='ctx'> 		     : "c" (msr));</div><div class='ctx'> 	if (tracepoint_enabled(read_msr))</div><div class='del'>-		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);</div><div class='del'>-	return EAX_EDX_VAL(val, low, high);</div><div class='add'>+		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), err);</div><div class='add'>+</div><div class='add'>+	*p = EAX_EDX_VAL(val, low, high);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Can be uninlined because referenced by paravirt */</div><div class='del'>-static inline void notrace</div><div class='del'>-native_write_msr(unsigned int msr, u32 low, u32 high)</div><div class='add'>+static inline void notrace native_write_msr(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='del'>-	__wrmsr(msr, low, high);</div><div class='add'>+	native_wrmsrq(msr, val);</div><div class='ctx'> </div><div class='ctx'> 	if (tracepoint_enabled(write_msr))</div><div class='del'>-		do_trace_write_msr(msr, ((u64)high &lt;&lt; 32 | low), 0);</div><div class='add'>+		do_trace_write_msr(msr, val, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Can be uninlined because referenced by paravirt */</div><div class='del'>-static inline int notrace</div><div class='del'>-native_write_msr_safe(unsigned int msr, u32 low, u32 high)</div><div class='add'>+static inline int notrace native_write_msr_safe(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -160,73 +149,19 @@ native_write_msr_safe(unsigned int msr, u32 low, u32 high)</div><div class='ctx'> 		     "2:\n\t"</div><div class='ctx'> 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_WRMSR_SAFE, %[err])</div><div class='ctx'> 		     : [err] "=a" (err)</div><div class='del'>-		     : "c" (msr), "0" (low), "d" (high)</div><div class='add'>+		     : "c" (msr), "0" ((u32)val), "d" ((u32)(val &gt;&gt; 32))</div><div class='ctx'> 		     : "memory");</div><div class='ctx'> 	if (tracepoint_enabled(write_msr))</div><div class='del'>-		do_trace_write_msr(msr, ((u64)high &lt;&lt; 32 | low), err);</div><div class='add'>+		do_trace_write_msr(msr, val, err);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern int rdmsr_safe_regs(u32 regs[8]);</div><div class='ctx'> extern int wrmsr_safe_regs(u32 regs[8]);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * rdtsc() - returns the current TSC without ordering constraints</div><div class='del'>- *</div><div class='del'>- * rdtsc() returns the result of RDTSC as a 64-bit integer.  The</div><div class='del'>- * only ordering constraint it supplies is the ordering implied by</div><div class='del'>- * "asm volatile": it will put the RDTSC in the place you expect.  The</div><div class='del'>- * CPU can and will speculatively execute that RDTSC, though, so the</div><div class='del'>- * results can be non-monotonic if compared on different CPUs.</div><div class='del'>- */</div><div class='del'>-static __always_inline unsigned long long rdtsc(void)</div><div class='add'>+static inline u64 native_read_pmc(int counter)</div><div class='ctx'> {</div><div class='del'>-	DECLARE_ARGS(val, low, high);</div><div class='del'>-</div><div class='del'>-	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));</div><div class='del'>-</div><div class='del'>-	return EAX_EDX_VAL(val, low, high);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtsc_ordered() - read the current TSC in program order</div><div class='del'>- *</div><div class='del'>- * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.</div><div class='del'>- * It is ordered like a load to a global in-memory counter.  It should</div><div class='del'>- * be impossible to observe non-monotonic rdtsc_unordered() behavior</div><div class='del'>- * across multiple CPUs as long as the TSC is synced.</div><div class='del'>- */</div><div class='del'>-static __always_inline unsigned long long rdtsc_ordered(void)</div><div class='del'>-{</div><div class='del'>-	DECLARE_ARGS(val, low, high);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The RDTSC instruction is not ordered relative to memory</div><div class='del'>-	 * access.  The Intel SDM and the AMD APM are both vague on this</div><div class='del'>-	 * point, but empirically an RDTSC instruction can be</div><div class='del'>-	 * speculatively executed before prior loads.  An RDTSC</div><div class='del'>-	 * immediately after an appropriate barrier appears to be</div><div class='del'>-	 * ordered as a normal load, that is, it provides the same</div><div class='del'>-	 * ordering guarantees as reading from a global memory location</div><div class='del'>-	 * that some other imaginary CPU is updating continuously with a</div><div class='del'>-	 * time stamp.</div><div class='del'>-	 *</div><div class='del'>-	 * Thus, use the preferred barrier on the respective CPU, aiming for</div><div class='del'>-	 * RDTSCP as the default.</div><div class='del'>-	 */</div><div class='del'>-	asm volatile(ALTERNATIVE_2("rdtsc",</div><div class='del'>-				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,</div><div class='del'>-				   "rdtscp", X86_FEATURE_RDTSCP)</div><div class='del'>-			: EAX_EDX_RET(val, low, high)</div><div class='del'>-			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */</div><div class='del'>-			:: "ecx");</div><div class='del'>-</div><div class='del'>-	return EAX_EDX_VAL(val, low, high);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned long long native_read_pmc(int counter)</div><div class='del'>-{</div><div class='del'>-	DECLARE_ARGS(val, low, high);</div><div class='add'>+	EAX_EDX_DECLARE_ARGS(val, low, high);</div><div class='ctx'> </div><div class='ctx'> 	asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));</div><div class='ctx'> 	if (tracepoint_enabled(rdpmc))</div><div class='hunk'>@@ -251,51 +186,44 @@ do {								\</div><div class='ctx'> 	(void)((high) = (u32)(__val &gt;&gt; 32));			\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-static inline void wrmsr(unsigned int msr, u32 low, u32 high)</div><div class='add'>+static inline void wrmsr(u32 msr, u32 low, u32 high)</div><div class='ctx'> {</div><div class='del'>-	native_write_msr(msr, low, high);</div><div class='add'>+	native_write_msr(msr, (u64)high &lt;&lt; 32 | low);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define rdmsrl(msr, val)			\</div><div class='add'>+#define rdmsrq(msr, val)			\</div><div class='ctx'> 	((val) = native_read_msr((msr)))</div><div class='ctx'> </div><div class='del'>-static inline void wrmsrl(unsigned int msr, u64 val)</div><div class='add'>+static inline void wrmsrq(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='del'>-	native_write_msr(msr, (u32)(val &amp; 0xffffffffULL), (u32)(val &gt;&gt; 32));</div><div class='add'>+	native_write_msr(msr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* wrmsr with exception handling */</div><div class='del'>-static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high)</div><div class='add'>+static inline int wrmsrq_safe(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='del'>-	return native_write_msr_safe(msr, low, high);</div><div class='add'>+	return native_write_msr_safe(msr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* rdmsr with exception handling */</div><div class='ctx'> #define rdmsr_safe(msr, low, high)				\</div><div class='ctx'> ({								\</div><div class='del'>-	int __err;						\</div><div class='del'>-	u64 __val = native_read_msr_safe((msr), &amp;__err);	\</div><div class='add'>+	u64 __val;						\</div><div class='add'>+	int __err = native_read_msr_safe((msr), &amp;__val);	\</div><div class='ctx'> 	(*low) = (u32)__val;					\</div><div class='ctx'> 	(*high) = (u32)(__val &gt;&gt; 32);				\</div><div class='ctx'> 	__err;							\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-static inline int rdmsrl_safe(unsigned int msr, unsigned long long *p)</div><div class='add'>+static inline int rdmsrq_safe(u32 msr, u64 *p)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	*p = native_read_msr_safe(msr, &amp;err);</div><div class='del'>-	return err;</div><div class='add'>+	return native_read_msr_safe(msr, p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define rdpmc(counter, low, high)			\</div><div class='del'>-do {							\</div><div class='del'>-	u64 _l = native_read_pmc((counter));		\</div><div class='del'>-	(low)  = (u32)_l;				\</div><div class='del'>-	(high) = (u32)(_l &gt;&gt; 32);			\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define rdpmcl(counter, val) ((val) = native_read_pmc(counter))</div><div class='add'>+static __always_inline u64 rdpmc(int counter)</div><div class='add'>+{</div><div class='add'>+	return native_read_pmc(counter);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif	/* !CONFIG_PARAVIRT_XXL */</div><div class='ctx'> </div><div class='hunk'>@@ -315,11 +243,11 @@ static __always_inline void wrmsrns(u32 msr, u64 val)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * 64-bit version of wrmsr_safe():</div><div class='add'>+ * Dual u32 version of wrmsrq_safe():</div><div class='ctx'>  */</div><div class='del'>-static inline int wrmsrl_safe(u32 msr, u64 val)</div><div class='add'>+static inline int wrmsr_safe(u32 msr, u32 low, u32 high)</div><div class='ctx'> {</div><div class='del'>-	return wrmsr_safe(msr, (u32)val,  (u32)(val &gt;&gt; 32));</div><div class='add'>+	return wrmsrq_safe(msr, (u64)high &lt;&lt; 32 | low);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct msr __percpu *msrs_alloc(void);</div><div class='hunk'>@@ -330,14 +258,14 @@ int msr_clear_bit(u32 msr, u8 bit);</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);</div><div class='ctx'> int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);</div><div class='del'>-int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);</div><div class='del'>-int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q);</div><div class='add'>+int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);</div><div class='add'>+int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q);</div><div class='ctx'> void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);</div><div class='ctx'> void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr __percpu *msrs);</div><div class='ctx'> int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);</div><div class='ctx'> int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);</div><div class='del'>-int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);</div><div class='del'>-int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);</div><div class='add'>+int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);</div><div class='add'>+int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);</div><div class='ctx'> int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);</div><div class='ctx'> int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);</div><div class='ctx'> #else  /*  CONFIG_SMP  */</div><div class='hunk'>@@ -351,14 +279,14 @@ static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)</div><div class='ctx'> 	wrmsr(msr_no, l, h);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-static inline int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='add'>+static inline int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='ctx'> {</div><div class='del'>-	rdmsrl(msr_no, *q);</div><div class='add'>+	rdmsrq(msr_no, *q);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-static inline int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='add'>+static inline int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(msr_no, q);</div><div class='add'>+	wrmsrq(msr_no, q);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,</div><div class='hunk'>@@ -380,13 +308,13 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)</div><div class='ctx'> {</div><div class='ctx'> 	return wrmsr_safe(msr_no, l, h);</div><div class='ctx'> }</div><div class='del'>-static inline int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='add'>+static inline int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='ctx'> {</div><div class='del'>-	return rdmsrl_safe(msr_no, q);</div><div class='add'>+	return rdmsrq_safe(msr_no, q);</div><div class='ctx'> }</div><div class='del'>-static inline int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='add'>+static inline int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='ctx'> {</div><div class='del'>-	return wrmsrl_safe(msr_no, q);</div><div class='add'>+	return wrmsrq_safe(msr_no, q);</div><div class='ctx'> }</div><div class='ctx'> static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])</div><div class='ctx'> {</div><div class='hunk'>@@ -397,5 +325,11 @@ static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])</div><div class='ctx'> 	return wrmsr_safe_regs(regs);</div><div class='ctx'> }</div><div class='ctx'> #endif  /* CONFIG_SMP */</div><div class='add'>+</div><div class='add'>+/* Compatibility wrappers: */</div><div class='add'>+#define rdmsrl(msr, val) rdmsrq(msr, val)</div><div class='add'>+#define wrmsrl(msr, val) wrmsrq(msr, val)</div><div class='add'>+#define rdmsrl_on_cpu(cpu, msr, q) rdmsrq_on_cpu(cpu, msr, q)</div><div class='add'>+</div><div class='ctx'> #endif /* __ASSEMBLER__ */</div><div class='ctx'> #endif /* _ASM_X86_MSR_H */</div><div class='head'>diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h<br/>index ce857ef54cf1..dd2b129b0418 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mwait.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/mwait.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/mwait.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/mwait.h</a></div><div class='hunk'>@@ -25,29 +25,31 @@</div><div class='ctx'> #define TPAUSE_C01_STATE		1</div><div class='ctx'> #define TPAUSE_C02_STATE		0</div><div class='ctx'> </div><div class='del'>-static __always_inline void __monitor(const void *eax, unsigned long ecx,</div><div class='del'>-			     unsigned long edx)</div><div class='add'>+static __always_inline void __monitor(const void *eax, u32 ecx, u32 edx)</div><div class='ctx'> {</div><div class='del'>-	/* "monitor %eax, %ecx, %edx;" */</div><div class='del'>-	asm volatile(".byte 0x0f, 0x01, 0xc8;"</div><div class='del'>-		     :: "a" (eax), "c" (ecx), "d"(edx));</div><div class='add'>+	/*</div><div class='add'>+	 * Use the instruction mnemonic with implicit operands, as the LLVM</div><div class='add'>+	 * assembler fails to assemble the mnemonic with explicit operands:</div><div class='add'>+	 */</div><div class='add'>+	asm volatile("monitor" :: "a" (eax), "c" (ecx), "d" (edx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline void __monitorx(const void *eax, unsigned long ecx,</div><div class='del'>-			      unsigned long edx)</div><div class='add'>+static __always_inline void __monitorx(const void *eax, u32 ecx, u32 edx)</div><div class='ctx'> {</div><div class='del'>-	/* "monitorx %eax, %ecx, %edx;" */</div><div class='del'>-	asm volatile(".byte 0x0f, 0x01, 0xfa;"</div><div class='add'>+	/* "monitorx %eax, %ecx, %edx" */</div><div class='add'>+	asm volatile(".byte 0x0f, 0x01, 0xfa"</div><div class='ctx'> 		     :: "a" (eax), "c" (ecx), "d"(edx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline void __mwait(unsigned long eax, unsigned long ecx)</div><div class='add'>+static __always_inline void __mwait(u32 eax, u32 ecx)</div><div class='ctx'> {</div><div class='ctx'> 	mds_idle_clear_cpu_buffers();</div><div class='ctx'> </div><div class='del'>-	/* "mwait %eax, %ecx;" */</div><div class='del'>-	asm volatile(".byte 0x0f, 0x01, 0xc9;"</div><div class='del'>-		     :: "a" (eax), "c" (ecx));</div><div class='add'>+	/*</div><div class='add'>+	 * Use the instruction mnemonic with implicit operands, as the LLVM</div><div class='add'>+	 * assembler fails to assemble the mnemonic with explicit operands:</div><div class='add'>+	 */</div><div class='add'>+	asm volatile("mwait" :: "a" (eax), "c" (ecx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -76,13 +78,12 @@ static __always_inline void __mwait(unsigned long eax, unsigned long ecx)</div><div class='ctx'>  * EAX                     (logical) address to monitor</div><div class='ctx'>  * ECX                     #GP if not zero</div><div class='ctx'>  */</div><div class='del'>-static __always_inline void __mwaitx(unsigned long eax, unsigned long ebx,</div><div class='del'>-				     unsigned long ecx)</div><div class='add'>+static __always_inline void __mwaitx(u32 eax, u32 ebx, u32 ecx)</div><div class='ctx'> {</div><div class='ctx'> 	/* No MDS buffer clear as this is AMD/HYGON only */</div><div class='ctx'> </div><div class='del'>-	/* "mwaitx %eax, %ebx, %ecx;" */</div><div class='del'>-	asm volatile(".byte 0x0f, 0x01, 0xfb;"</div><div class='add'>+	/* "mwaitx %eax, %ebx, %ecx" */</div><div class='add'>+	asm volatile(".byte 0x0f, 0x01, 0xfb"</div><div class='ctx'> 		     :: "a" (eax), "b" (ebx), "c" (ecx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -95,12 +96,11 @@ static __always_inline void __mwaitx(unsigned long eax, unsigned long ebx,</div><div class='ctx'>  * executing mwait, it would otherwise go unnoticed and the next tick</div><div class='ctx'>  * would not be reprogrammed accordingly before mwait ever wakes up.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline void __sti_mwait(unsigned long eax, unsigned long ecx)</div><div class='add'>+static __always_inline void __sti_mwait(u32 eax, u32 ecx)</div><div class='ctx'> {</div><div class='ctx'> 	mds_idle_clear_cpu_buffers();</div><div class='del'>-	/* "mwait %eax, %ecx;" */</div><div class='del'>-	asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"</div><div class='del'>-		     :: "a" (eax), "c" (ecx));</div><div class='add'>+</div><div class='add'>+	asm volatile("sti; mwait" :: "a" (eax), "c" (ecx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -113,16 +113,13 @@ static __always_inline void __sti_mwait(unsigned long eax, unsigned long ecx)</div><div class='ctx'>  * New with Core Duo processors, MWAIT can take some hints based on CPU</div><div class='ctx'>  * capability.</div><div class='ctx'>  */</div><div class='del'>-static __always_inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx)</div><div class='add'>+static __always_inline void mwait_idle_with_hints(u32 eax, u32 ecx)</div><div class='ctx'> {</div><div class='ctx'> 	if (static_cpu_has_bug(X86_BUG_MONITOR) || !current_set_polling_and_test()) {</div><div class='del'>-		if (static_cpu_has_bug(X86_BUG_CLFLUSH_MONITOR)) {</div><div class='del'>-			mb();</div><div class='del'>-			clflush((void *)&amp;current_thread_info()-&gt;flags);</div><div class='del'>-			mb();</div><div class='del'>-		}</div><div class='add'>+		const void *addr = &amp;current_thread_info()-&gt;flags;</div><div class='ctx'> </div><div class='del'>-		__monitor((void *)&amp;current_thread_info()-&gt;flags, 0, 0);</div><div class='add'>+		alternative_input("", "clflush (%[addr])", X86_BUG_CLFLUSH_MONITOR, [addr] "a" (addr));</div><div class='add'>+		__monitor(addr, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 		if (!need_resched()) {</div><div class='ctx'> 			if (ecx &amp; 1) {</div><div class='hunk'>@@ -144,16 +141,9 @@ static __always_inline void mwait_idle_with_hints(unsigned long eax, unsigned lo</div><div class='ctx'>  */</div><div class='ctx'> static inline void __tpause(u32 ecx, u32 edx, u32 eax)</div><div class='ctx'> {</div><div class='del'>-	/* "tpause %ecx, %edx, %eax;" */</div><div class='del'>-	#ifdef CONFIG_AS_TPAUSE</div><div class='del'>-	asm volatile("tpause %%ecx\n"</div><div class='del'>-		     :</div><div class='del'>-		     : "c"(ecx), "d"(edx), "a"(eax));</div><div class='del'>-	#else</div><div class='del'>-	asm volatile(".byte 0x66, 0x0f, 0xae, 0xf1\t\n"</div><div class='del'>-		     :</div><div class='del'>-		     : "c"(ecx), "d"(edx), "a"(eax));</div><div class='del'>-	#endif</div><div class='add'>+	/* "tpause %ecx" */</div><div class='add'>+	asm volatile(".byte 0x66, 0x0f, 0xae, 0xf1"</div><div class='add'>+		     :: "c" (ecx), "d" (edx), "a" (eax));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_MWAIT_H */</div><div class='head'>diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h<br/>index f677382093f3..79d88d12c8fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/nmi.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/nmi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/nmi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/nmi.h</a></div><div class='hunk'>@@ -14,12 +14,26 @@ extern void release_perfctr_nmi(unsigned int);</div><div class='ctx'> extern int reserve_evntsel_nmi(unsigned int);</div><div class='ctx'> extern void release_evntsel_nmi(unsigned int);</div><div class='ctx'> </div><div class='del'>-extern int unknown_nmi_panic;</div><div class='del'>-</div><div class='ctx'> #endif /* CONFIG_X86_LOCAL_APIC */</div><div class='ctx'> </div><div class='add'>+extern int unknown_nmi_panic;</div><div class='add'>+extern int panic_on_unrecovered_nmi;</div><div class='add'>+extern int panic_on_io_nmi;</div><div class='add'>+</div><div class='add'>+/* NMI handler flags */</div><div class='ctx'> #define NMI_FLAG_FIRST	1</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * enum - NMI types.</div><div class='add'>+ * @NMI_LOCAL:    Local NMI, CPU-specific NMI generated by the Local APIC.</div><div class='add'>+ * @NMI_UNKNOWN:  Unknown NMI, the source of the NMI may not be identified.</div><div class='add'>+ * @NMI_SERR:     System Error NMI, typically triggered by PCI errors.</div><div class='add'>+ * @NMI_IO_CHECK: I/O Check NMI, related to I/O errors.</div><div class='add'>+ * @NMI_MAX:      Maximum value for NMI types.</div><div class='add'>+ *</div><div class='add'>+ * NMI types are used to categorize NMIs and to dispatch them to the</div><div class='add'>+ * appropriate handler.</div><div class='add'>+ */</div><div class='ctx'> enum {</div><div class='ctx'> 	NMI_LOCAL=0,</div><div class='ctx'> 	NMI_UNKNOWN,</div><div class='hunk'>@@ -28,6 +42,7 @@ enum {</div><div class='ctx'> 	NMI_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* NMI handler return values */</div><div class='ctx'> #define NMI_DONE	0</div><div class='ctx'> #define NMI_HANDLED	1</div><div class='ctx'> </div><div class='hunk'>@@ -41,6 +56,25 @@ struct nmiaction {</div><div class='ctx'> 	const char		*name;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * register_nmi_handler - Register a handler for a specific NMI type</div><div class='add'>+ * @t:    NMI type (e.g. NMI_LOCAL)</div><div class='add'>+ * @fn:   The NMI handler</div><div class='add'>+ * @fg:   Flags associated with the NMI handler</div><div class='add'>+ * @n:    Name of the NMI handler</div><div class='add'>+ * @init: Optional __init* attributes for struct nmiaction</div><div class='add'>+ *</div><div class='add'>+ * Adds the provided handler to the list of handlers for the specified</div><div class='add'>+ * NMI type. Handlers flagged with NMI_FLAG_FIRST would be executed first.</div><div class='add'>+ *</div><div class='add'>+ * Sometimes the source of an NMI can't be reliably determined which</div><div class='add'>+ * results in an NMI being tagged as "unknown". Register an additional</div><div class='add'>+ * handler using the NMI type - NMI_UNKNOWN to handle such cases. The</div><div class='add'>+ * caller would get one last chance to assume responsibility for the</div><div class='add'>+ * NMI.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or an error code on failure.</div><div class='add'>+ */</div><div class='ctx'> #define register_nmi_handler(t, fn, fg, n, init...)	\</div><div class='ctx'> ({							\</div><div class='ctx'> 	static struct nmiaction init fn##_na = {	\</div><div class='hunk'>@@ -54,7 +88,16 @@ struct nmiaction {</div><div class='ctx'> </div><div class='ctx'> int __register_nmi_handler(unsigned int, struct nmiaction *);</div><div class='ctx'> </div><div class='del'>-void unregister_nmi_handler(unsigned int, const char *);</div><div class='add'>+/**</div><div class='add'>+ * unregister_nmi_handler - Unregister a handler for a specific NMI type</div><div class='add'>+ * @type: NMI type (e.g. NMI_LOCAL)</div><div class='add'>+ * @name: Name of the NMI handler used during registration</div><div class='add'>+ *</div><div class='add'>+ * Removes the handler associated with the specified NMI type from the</div><div class='add'>+ * NMI handler list. The "name" is used as a lookup key to identify the</div><div class='add'>+ * handler.</div><div class='add'>+ */</div><div class='add'>+void unregister_nmi_handler(unsigned int type, const char *name);</div><div class='ctx'> </div><div class='ctx'> void set_emergency_nmi_handler(unsigned int type, nmi_handler_t handler);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h<br/>index 8a5cc8e70439..20d754b98f3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/nospec-branch.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/nospec-branch.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/nospec-branch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/nospec-branch.h</a></div><div class='hunk'>@@ -269,7 +269,7 @@</div><div class='ctx'>  * typically has NO_MELTDOWN).</div><div class='ctx'>  *</div><div class='ctx'>  * While retbleed_untrain_ret() doesn't clobber anything but requires stack,</div><div class='del'>- * entry_ibpb() will clobber AX, CX, DX.</div><div class='add'>+ * write_ibpb() will clobber AX, CX, DX.</div><div class='ctx'>  *</div><div class='ctx'>  * As such, this must be placed after every *SWITCH_TO_KERNEL_CR3 at a point</div><div class='ctx'>  * where we have a stack but before any RET instruction.</div><div class='hunk'>@@ -279,7 +279,7 @@</div><div class='ctx'> 	VALIDATE_UNRET_END</div><div class='ctx'> 	CALL_UNTRAIN_RET</div><div class='ctx'> 	ALTERNATIVE_2 "",						\</div><div class='del'>-		      "call entry_ibpb", \ibpb_feature,			\</div><div class='add'>+		      "call write_ibpb", \ibpb_feature,			\</div><div class='ctx'> 		     __stringify(\call_depth_insns), X86_FEATURE_CALL_DEPTH</div><div class='ctx'> #endif</div><div class='ctx'> .endm</div><div class='hunk'>@@ -327,7 +327,7 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> .macro CLEAR_BRANCH_HISTORY_VMEXIT</div><div class='del'>-	ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT</div><div class='add'>+	ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_VMEXIT</div><div class='ctx'> .endm</div><div class='ctx'> #else</div><div class='ctx'> #define CLEAR_BRANCH_HISTORY</div><div class='hunk'>@@ -336,10 +336,14 @@</div><div class='ctx'> </div><div class='ctx'> #else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='add'>+#define ITS_THUNK_SIZE	64</div><div class='add'>+</div><div class='ctx'> typedef u8 retpoline_thunk_t[RETPOLINE_THUNK_SIZE];</div><div class='add'>+typedef u8 its_thunk_t[ITS_THUNK_SIZE];</div><div class='ctx'> extern retpoline_thunk_t __x86_indirect_thunk_array[];</div><div class='ctx'> extern retpoline_thunk_t __x86_indirect_call_thunk_array[];</div><div class='ctx'> extern retpoline_thunk_t __x86_indirect_jump_thunk_array[];</div><div class='add'>+extern its_thunk_t	 __x86_indirect_its_thunk_array[];</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MITIGATION_RETHUNK</div><div class='ctx'> extern void __x86_return_thunk(void);</div><div class='hunk'>@@ -363,12 +367,18 @@ static inline void srso_return_thunk(void) {}</div><div class='ctx'> static inline void srso_alias_return_thunk(void) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MITIGATION_ITS</div><div class='add'>+extern void its_return_thunk(void);</div><div class='add'>+#else</div><div class='add'>+static inline void its_return_thunk(void) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> extern void retbleed_return_thunk(void);</div><div class='ctx'> extern void srso_return_thunk(void);</div><div class='ctx'> extern void srso_alias_return_thunk(void);</div><div class='ctx'> </div><div class='ctx'> extern void entry_untrain_ret(void);</div><div class='del'>-extern void entry_ibpb(void);</div><div class='add'>+extern void write_ibpb(void);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> extern void clear_bhb_loop(void);</div><div class='hunk'>@@ -514,11 +524,11 @@ void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)</div><div class='ctx'> 		: "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern u64 x86_pred_cmd;</div><div class='del'>-</div><div class='ctx'> static inline void indirect_branch_prediction_barrier(void)</div><div class='ctx'> {</div><div class='del'>-	alternative_msr_write(MSR_IA32_PRED_CMD, x86_pred_cmd, X86_FEATURE_IBPB);</div><div class='add'>+	asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB)</div><div class='add'>+			    : ASM_CALL_CONSTRAINT</div><div class='add'>+			    :: "rax", "rcx", "rdx", "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* The Intel SPEC CTRL MSR base value cache */</div><div class='hunk'>@@ -561,7 +571,7 @@ DECLARE_STATIC_KEY_FALSE(mds_idle_clear);</div><div class='ctx'> </div><div class='ctx'> DECLARE_STATIC_KEY_FALSE(switch_mm_cond_l1d_flush);</div><div class='ctx'> </div><div class='del'>-DECLARE_STATIC_KEY_FALSE(mmio_stale_data_clear);</div><div class='add'>+DECLARE_STATIC_KEY_FALSE(cpu_buf_vm_clear);</div><div class='ctx'> </div><div class='ctx'> extern u16 mds_verw_sel;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h<br/>index a9b62e0e6f79..623f1e9f493e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_32_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_32_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_32_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/page_32_types.h</a></div><div class='hunk'>@@ -73,7 +73,6 @@ extern unsigned int __VMALLOC_RESERVE;</div><div class='ctx'> extern int sysctl_legacy_va_layout;</div><div class='ctx'> </div><div class='ctx'> extern void find_low_pfn_range(void);</div><div class='del'>-extern void setup_bootmem_allocator(void);</div><div class='ctx'> </div><div class='ctx'> #endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/page_64.h b/arch/x86/include/asm/page_64.h<br/>index d3aab6f4e59a..015d23f3e01f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_64.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/page_64.h</a></div><div class='hunk'>@@ -62,7 +62,6 @@ static inline void clear_page(void *page)</div><div class='ctx'> void copy_page(void *to, void *from);</div><div class='ctx'> KCFI_REFERENCE(copy_page);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='ctx'> /*</div><div class='ctx'>  * User space process size.  This is the first address outside the user range.</div><div class='ctx'>  * There are a few constraints that determine this:</div><div class='hunk'>@@ -93,7 +92,6 @@ static __always_inline unsigned long task_size_max(void)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-#endif	/* CONFIG_X86_5LEVEL */</div><div class='ctx'> </div><div class='ctx'> #endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h<br/>index 1faa8f88850a..7400dab373fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_64_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_64_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_64_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/page_64_types.h</a></div><div class='hunk'>@@ -41,25 +41,14 @@</div><div class='ctx'> #define __PAGE_OFFSET_BASE_L5	_AC(0xff11000000000000, UL)</div><div class='ctx'> #define __PAGE_OFFSET_BASE_L4	_AC(0xffff888000000000, UL)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT</div><div class='ctx'> #define __PAGE_OFFSET           page_offset_base</div><div class='del'>-#else</div><div class='del'>-#define __PAGE_OFFSET           __PAGE_OFFSET_BASE_L4</div><div class='del'>-#endif /* CONFIG_DYNAMIC_MEMORY_LAYOUT */</div><div class='ctx'> </div><div class='ctx'> #define __START_KERNEL_map	_AC(0xffffffff80000000, UL)</div><div class='ctx'> </div><div class='ctx'> /* See Documentation/arch/x86/x86_64/mm.rst for a description of the memory map. */</div><div class='ctx'> </div><div class='ctx'> #define __PHYSICAL_MASK_SHIFT	52</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='ctx'> #define __VIRTUAL_MASK_SHIFT	(pgtable_l5_enabled() ? 56 : 47)</div><div class='del'>-/* See task_size_max() in &lt;asm/page_64.h&gt; */</div><div class='del'>-#else</div><div class='del'>-#define __VIRTUAL_MASK_SHIFT	47</div><div class='del'>-#define task_size_max()		((_AC(1,UL) &lt;&lt; __VIRTUAL_MASK_SHIFT) - PAGE_SIZE)</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define TASK_SIZE_MAX		task_size_max()</div><div class='ctx'> #define DEFAULT_MAP_WINDOW	((1UL &lt;&lt; 47) - PAGE_SIZE)</div><div class='head'>diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h<br/>index 9f77bf03d747..018a8d906ca3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/page_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/page_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/page_types.h</a></div><div class='hunk'>@@ -29,9 +29,7 @@</div><div class='ctx'> #define VM_DATA_DEFAULT_FLAGS	VM_DATA_FLAGS_TSK_EXEC</div><div class='ctx'> </div><div class='ctx'> /* Physical address where kernel should be loaded. */</div><div class='del'>-#define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \</div><div class='del'>-				+ (CONFIG_PHYSICAL_ALIGN - 1)) \</div><div class='del'>-				&amp; ~(CONFIG_PHYSICAL_ALIGN - 1))</div><div class='add'>+#define LOAD_PHYSICAL_ADDR	__ALIGN_KERNEL_MASK(CONFIG_PHYSICAL_START, CONFIG_PHYSICAL_ALIGN - 1)</div><div class='ctx'> </div><div class='ctx'> #define __START_KERNEL		(__START_KERNEL_map + LOAD_PHYSICAL_ADDR)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h<br/>index c4c23190925c..b5e59a7ba0d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/paravirt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/paravirt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/paravirt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/paravirt.h</a></div><div class='hunk'>@@ -175,26 +175,24 @@ static inline void __write_cr4(unsigned long x)</div><div class='ctx'> 	PVOP_VCALL1(cpu.write_cr4, x);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u64 paravirt_read_msr(unsigned msr)</div><div class='add'>+static inline u64 paravirt_read_msr(u32 msr)</div><div class='ctx'> {</div><div class='ctx'> 	return PVOP_CALL1(u64, cpu.read_msr, msr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void paravirt_write_msr(unsigned msr,</div><div class='del'>-				      unsigned low, unsigned high)</div><div class='add'>+static inline void paravirt_write_msr(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='del'>-	PVOP_VCALL3(cpu.write_msr, msr, low, high);</div><div class='add'>+	PVOP_VCALL2(cpu.write_msr, msr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)</div><div class='add'>+static inline int paravirt_read_msr_safe(u32 msr, u64 *val)</div><div class='ctx'> {</div><div class='del'>-	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);</div><div class='add'>+	return PVOP_CALL2(int, cpu.read_msr_safe, msr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int paravirt_write_msr_safe(unsigned msr,</div><div class='del'>-					  unsigned low, unsigned high)</div><div class='add'>+static inline int paravirt_write_msr_safe(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='del'>-	return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high);</div><div class='add'>+	return PVOP_CALL2(int, cpu.write_msr_safe, msr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define rdmsr(msr, val1, val2)			\</div><div class='hunk'>@@ -204,55 +202,46 @@ do {						\</div><div class='ctx'> 	val2 = _l &gt;&gt; 32;			\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-#define wrmsr(msr, val1, val2)			\</div><div class='del'>-do {						\</div><div class='del'>-	paravirt_write_msr(msr, val1, val2);	\</div><div class='del'>-} while (0)</div><div class='add'>+static __always_inline void wrmsr(u32 msr, u32 low, u32 high)</div><div class='add'>+{</div><div class='add'>+	paravirt_write_msr(msr, (u64)high &lt;&lt; 32 | low);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define rdmsrl(msr, val)			\</div><div class='add'>+#define rdmsrq(msr, val)			\</div><div class='ctx'> do {						\</div><div class='ctx'> 	val = paravirt_read_msr(msr);		\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-static inline void wrmsrl(unsigned msr, u64 val)</div><div class='add'>+static inline void wrmsrq(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='del'>-	wrmsr(msr, (u32)val, (u32)(val&gt;&gt;32));</div><div class='add'>+	paravirt_write_msr(msr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define wrmsr_safe(msr, a, b)	paravirt_write_msr_safe(msr, a, b)</div><div class='add'>+static inline int wrmsrq_safe(u32 msr, u64 val)</div><div class='add'>+{</div><div class='add'>+	return paravirt_write_msr_safe(msr, val);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /* rdmsr with exception handling */</div><div class='ctx'> #define rdmsr_safe(msr, a, b)				\</div><div class='ctx'> ({							\</div><div class='del'>-	int _err;					\</div><div class='del'>-	u64 _l = paravirt_read_msr_safe(msr, &amp;_err);	\</div><div class='add'>+	u64 _l;						\</div><div class='add'>+	int _err = paravirt_read_msr_safe((msr), &amp;_l);	\</div><div class='ctx'> 	(*a) = (u32)_l;					\</div><div class='del'>-	(*b) = _l &gt;&gt; 32;				\</div><div class='add'>+	(*b) = (u32)(_l &gt;&gt; 32);				\</div><div class='ctx'> 	_err;						\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)</div><div class='add'>+static __always_inline int rdmsrq_safe(u32 msr, u64 *p)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	*p = paravirt_read_msr_safe(msr, &amp;err);</div><div class='del'>-	return err;</div><div class='add'>+	return paravirt_read_msr_safe(msr, p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned long long paravirt_read_pmc(int counter)</div><div class='add'>+static __always_inline u64 rdpmc(int counter)</div><div class='ctx'> {</div><div class='ctx'> 	return PVOP_CALL1(u64, cpu.read_pmc, counter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define rdpmc(counter, low, high)		\</div><div class='del'>-do {						\</div><div class='del'>-	u64 _l = paravirt_read_pmc(counter);	\</div><div class='del'>-	low = (u32)_l;				\</div><div class='del'>-	high = _l &gt;&gt; 32;			\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))</div><div class='del'>-</div><div class='ctx'> static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)</div><div class='ctx'> {</div><div class='ctx'> 	PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);</div><div class='hunk'>@@ -474,8 +463,6 @@ static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)</div><div class='ctx'> 	PVOP_VCALL2(mmu.set_p4d, p4dp, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if CONFIG_PGTABLE_LEVELS &gt;= 5</div><div class='del'>-</div><div class='ctx'> static inline p4d_t __p4d(p4dval_t val)</div><div class='ctx'> {</div><div class='ctx'> 	p4dval_t ret = PVOP_ALT_CALLEE1(p4dval_t, mmu.make_p4d, val,</div><div class='hunk'>@@ -507,8 +494,6 @@ static inline void __set_pgd(pgd_t *pgdp, pgd_t pgd)</div><div class='ctx'> 		set_pgd(pgdp, native_make_pgd(0));			\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='del'>-#endif  /* CONFIG_PGTABLE_LEVELS == 5 */</div><div class='del'>-</div><div class='ctx'> static inline void p4d_clear(p4d_t *p4dp)</div><div class='ctx'> {</div><div class='ctx'> 	set_p4d(p4dp, native_make_p4d(0));</div><div class='head'>diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h<br/>index 631c306ce1ff..37a8627d8277 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/paravirt_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/paravirt_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/paravirt_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/paravirt_types.h</a></div><div class='hunk'>@@ -91,15 +91,15 @@ struct pv_cpu_ops {</div><div class='ctx'> 		      unsigned int *ecx, unsigned int *edx);</div><div class='ctx'> </div><div class='ctx'> 	/* Unsafe MSR operations.  These will warn or panic on failure. */</div><div class='del'>-	u64 (*read_msr)(unsigned int msr);</div><div class='del'>-	void (*write_msr)(unsigned int msr, unsigned low, unsigned high);</div><div class='add'>+	u64 (*read_msr)(u32 msr);</div><div class='add'>+	void (*write_msr)(u32 msr, u64 val);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Safe MSR operations.</div><div class='del'>-	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.</div><div class='add'>+	 * Returns 0 or -EIO.</div><div class='ctx'> 	 */</div><div class='del'>-	u64 (*read_msr_safe)(unsigned int msr, int *err);</div><div class='del'>-	int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high);</div><div class='add'>+	int (*read_msr_safe)(u32 msr, u64 *val);</div><div class='add'>+	int (*write_msr_safe)(u32 msr, u64 val);</div><div class='ctx'> </div><div class='ctx'> 	u64 (*read_pmc)(int counter);</div><div class='ctx'> </div><div class='hunk'>@@ -189,12 +189,10 @@ struct pv_mmu_ops {</div><div class='ctx'> </div><div class='ctx'> 	void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval);</div><div class='ctx'> </div><div class='del'>-#if CONFIG_PGTABLE_LEVELS &gt;= 5</div><div class='ctx'> 	struct paravirt_callee_save p4d_val;</div><div class='ctx'> 	struct paravirt_callee_save make_p4d;</div><div class='ctx'> </div><div class='ctx'> 	void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval);</div><div class='del'>-#endif	/* CONFIG_PGTABLE_LEVELS &gt;= 5 */</div><div class='ctx'> </div><div class='ctx'> 	struct pv_lazy_ops lazy_mode;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h<br/>index 5fe314a2e73e..b0d03b6c279b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/percpu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/percpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/percpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/percpu.h</a></div><div class='hunk'>@@ -29,6 +29,8 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> </div><div class='add'>+#define __force_percpu_prefix	"%%"__stringify(__percpu_seg)":"</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_CC_HAS_NAMED_AS</div><div class='ctx'> </div><div class='ctx'> #ifdef __CHECKER__</div><div class='hunk'>@@ -36,23 +38,23 @@</div><div class='ctx'> # define __seg_fs		__attribute__((address_space(__seg_fs)))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define __percpu_prefix</div><div class='ctx'> #define __percpu_seg_override	CONCATENATE(__seg_, __percpu_seg)</div><div class='del'>-#define __percpu_prefix		""</div><div class='ctx'> </div><div class='ctx'> #else /* !CONFIG_CC_HAS_NAMED_AS: */</div><div class='ctx'> </div><div class='add'>+#define __percpu_prefix		__force_percpu_prefix</div><div class='ctx'> #define __percpu_seg_override</div><div class='del'>-#define __percpu_prefix		"%%"__stringify(__percpu_seg)":"</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_CC_HAS_NAMED_AS */</div><div class='ctx'> </div><div class='del'>-#define __force_percpu_prefix	"%%"__stringify(__percpu_seg)":"</div><div class='del'>-#define __my_cpu_offset		this_cpu_read(this_cpu_off)</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Compared to the generic __my_cpu_offset version, the following</div><div class='ctx'>  * saves one instruction and avoids clobbering a temp register.</div><div class='del'>- *</div><div class='add'>+ */</div><div class='add'>+#define __my_cpu_offset		this_cpu_read(this_cpu_off)</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * arch_raw_cpu_ptr should not be used in 32-bit VDSO for a 64-bit</div><div class='ctx'>  * kernel, because games are played with CONFIG_X86_64 there and</div><div class='ctx'>  * sizeof(this_cpu_off) becames 4.</div><div class='hunk'>@@ -77,9 +79,9 @@</div><div class='ctx'> </div><div class='ctx'> #else /* !CONFIG_SMP: */</div><div class='ctx'> </div><div class='add'>+#define __force_percpu_prefix</div><div class='add'>+#define __percpu_prefix</div><div class='ctx'> #define __percpu_seg_override</div><div class='del'>-#define __percpu_prefix		""</div><div class='del'>-#define __force_percpu_prefix	""</div><div class='ctx'> </div><div class='ctx'> #define PER_CPU_VAR(var)	(var)__percpu_rel</div><div class='ctx'> </div><div class='hunk'>@@ -97,8 +99,8 @@</div><div class='ctx'> # define __my_cpu_var(var)	(*__my_cpu_ptr(&amp;(var)))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define __percpu_arg(x)		__percpu_prefix "%" #x</div><div class='ctx'> #define __force_percpu_arg(x)	__force_percpu_prefix "%" #x</div><div class='add'>+#define __percpu_arg(x)		__percpu_prefix "%" #x</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * For arch-specific code, we can use direct single-insn ops (they</div><div class='head'>diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h<br/>index 812dac3f79f0..70d1d94aca7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/perf_event.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/perf_event.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/perf_event.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/perf_event.h</a></div><div class='hunk'>@@ -195,6 +195,7 @@ union cpuid10_edx {</div><div class='ctx'>  */</div><div class='ctx'> #define ARCH_PERFMON_EXT_LEAF			0x00000023</div><div class='ctx'> #define ARCH_PERFMON_NUM_COUNTER_LEAF		0x1</div><div class='add'>+#define ARCH_PERFMON_ACR_LEAF			0x2</div><div class='ctx'> </div><div class='ctx'> union cpuid35_eax {</div><div class='ctx'> 	struct {</div><div class='head'>diff --git a/arch/x86/include/asm/pgalloc.h b/arch/x86/include/asm/pgalloc.h<br/>index a33147520044..c88691b15f3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgalloc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgalloc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgalloc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/pgalloc.h</a></div><div class='hunk'>@@ -6,6 +6,8 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;		/* for struct page */</div><div class='ctx'> #include &lt;linux/pagemap.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='add'>+</div><div class='ctx'> #define __HAVE_ARCH_PTE_ALLOC_ONE</div><div class='ctx'> #define __HAVE_ARCH_PGD_FREE</div><div class='ctx'> #include &lt;asm-generic/pgalloc.h&gt;</div><div class='hunk'>@@ -29,16 +31,17 @@ static inline void paravirt_release_pud(unsigned long pfn) {}</div><div class='ctx'> static inline void paravirt_release_p4d(unsigned long pfn) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION</div><div class='ctx'> /*</div><div class='del'>- * Instead of one PGD, we acquire two PGDs.  Being order-1, it is</div><div class='del'>- * both 8k in size and 8k-aligned.  That lets us just flip bit 12</div><div class='del'>- * in a pointer to swap between the two 4k halves.</div><div class='add'>+ * In case of Page Table Isolation active, we acquire two PGDs instead of one.</div><div class='add'>+ * Being order-1, it is both 8k in size and 8k-aligned.  That lets us just</div><div class='add'>+ * flip bit 12 in a pointer to swap between the two 4k halves.</div><div class='ctx'>  */</div><div class='del'>-#define PGD_ALLOCATION_ORDER 1</div><div class='del'>-#else</div><div class='del'>-#define PGD_ALLOCATION_ORDER 0</div><div class='del'>-#endif</div><div class='add'>+static inline unsigned int pgd_allocation_order(void)</div><div class='add'>+{</div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_PTI))</div><div class='add'>+		return 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Allocate and free page tables.</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable-2level_types.h b/arch/x86/include/asm/pgtable-2level_types.h<br/>index 66425424ce91..54690bd4ddbe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable-2level_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable-2level_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable-2level_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/pgtable-2level_types.h</a></div><div class='hunk'>@@ -18,8 +18,6 @@ typedef union {</div><div class='ctx'> } pte_t;</div><div class='ctx'> #endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-#define SHARED_KERNEL_PMD	0</div><div class='del'>-</div><div class='ctx'> #define ARCH_PAGE_TABLE_SYNC_MASK	PGTBL_PMD_MODIFIED</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable-3level_types.h b/arch/x86/include/asm/pgtable-3level_types.h<br/>index 9d5b257d44e3..580b09bf6a45 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable-3level_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable-3level_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable-3level_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/pgtable-3level_types.h</a></div><div class='hunk'>@@ -27,9 +27,7 @@ typedef union {</div><div class='ctx'> } pmd_t;</div><div class='ctx'> #endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-#define SHARED_KERNEL_PMD	(!static_cpu_has(X86_FEATURE_PTI))</div><div class='del'>-</div><div class='del'>-#define ARCH_PAGE_TABLE_SYNC_MASK	(SHARED_KERNEL_PMD ? 0 : PGTBL_PMD_MODIFIED)</div><div class='add'>+#define ARCH_PAGE_TABLE_SYNC_MASK	PGTBL_PMD_MODIFIED</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PGDIR_SHIFT determines what a top-level page table entry can map</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h<br/>index 7bd6bd6df4a1..5ddba366d3b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/pgtable.h</a></div><div class='hunk'>@@ -292,13 +292,6 @@ static inline unsigned long pgd_pfn(pgd_t pgd)</div><div class='ctx'> 	return (pgd_val(pgd) &amp; PTE_PFN_MASK) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define p4d_leaf p4d_leaf</div><div class='del'>-static inline bool p4d_leaf(p4d_t p4d)</div><div class='del'>-{</div><div class='del'>-	/* No 512 GiB pages yet */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define pte_page(pte)	pfn_to_page(pte_pfn(pte))</div><div class='ctx'> </div><div class='ctx'> #define pmd_leaf pmd_leaf</div><div class='hunk'>@@ -1472,9 +1465,6 @@ static inline bool pgdp_maps_userspace(void *__ptr)</div><div class='ctx'> 	return (((ptr &amp; ~PAGE_MASK) / sizeof(pgd_t)) &lt; PGD_KERNEL_START);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define pgd_leaf	pgd_leaf</div><div class='del'>-static inline bool pgd_leaf(pgd_t pgd) { return false; }</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION</div><div class='ctx'> /*</div><div class='ctx'>  * All top-level MITIGATION_PAGE_TABLE_ISOLATION page tables are order-1 pages</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h<br/>index b89f8f1194a9..f06e5d6a2747 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable_64.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/pgtable_64.h</a></div><div class='hunk'>@@ -41,11 +41,9 @@ static inline void sync_initial_page_table(void) { }</div><div class='ctx'> 	pr_err("%s:%d: bad pud %p(%016lx)\n",		\</div><div class='ctx'> 	       __FILE__, __LINE__, &amp;(e), pud_val(e))</div><div class='ctx'> </div><div class='del'>-#if CONFIG_PGTABLE_LEVELS &gt;= 5</div><div class='ctx'> #define p4d_ERROR(e)					\</div><div class='ctx'> 	pr_err("%s:%d: bad p4d %p(%016lx)\n",		\</div><div class='ctx'> 	       __FILE__, __LINE__, &amp;(e), p4d_val(e))</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #define pgd_ERROR(e)					\</div><div class='ctx'> 	pr_err("%s:%d: bad pgd %p(%016lx)\n",		\</div><div class='head'>diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h<br/>index 5bb782d856f2..4604f924d8b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable_64_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/pgtable_64_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/pgtable_64_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/pgtable_64_types.h</a></div><div class='hunk'>@@ -23,7 +23,6 @@ typedef struct { pmdval_t pmd; } pmd_t;</div><div class='ctx'> </div><div class='ctx'> extern unsigned int __pgtable_l5_enabled;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='ctx'> #ifdef USE_EARLY_PGTABLE_L5</div><div class='ctx'> /*</div><div class='ctx'>  * cpu_feature_enabled() is not available in early boot code.</div><div class='hunk'>@@ -37,19 +36,11 @@ static inline bool pgtable_l5_enabled(void)</div><div class='ctx'> #define pgtable_l5_enabled() cpu_feature_enabled(X86_FEATURE_LA57)</div><div class='ctx'> #endif /* USE_EARLY_PGTABLE_L5 */</div><div class='ctx'> </div><div class='del'>-#else</div><div class='del'>-#define pgtable_l5_enabled() 0</div><div class='del'>-#endif /* CONFIG_X86_5LEVEL */</div><div class='del'>-</div><div class='ctx'> extern unsigned int pgdir_shift;</div><div class='ctx'> extern unsigned int ptrs_per_p4d;</div><div class='ctx'> </div><div class='ctx'> #endif	/* !__ASSEMBLER__ */</div><div class='ctx'> </div><div class='del'>-#define SHARED_KERNEL_PMD	0</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * PGDIR_SHIFT determines what a top-level page table entry can map</div><div class='ctx'>  */</div><div class='hunk'>@@ -67,17 +58,6 @@ extern unsigned int ptrs_per_p4d;</div><div class='ctx'> </div><div class='ctx'> #define MAX_POSSIBLE_PHYSMEM_BITS	52</div><div class='ctx'> </div><div class='del'>-#else /* CONFIG_X86_5LEVEL */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * PGDIR_SHIFT determines what a top-level page table entry can map</div><div class='del'>- */</div><div class='del'>-#define PGDIR_SHIFT		39</div><div class='del'>-#define PTRS_PER_PGD		512</div><div class='del'>-#define MAX_PTRS_PER_P4D	1</div><div class='del'>-</div><div class='del'>-#endif /* CONFIG_X86_5LEVEL */</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * 3rd level page</div><div class='ctx'>  */</div><div class='hunk'>@@ -130,15 +110,9 @@ extern unsigned int ptrs_per_p4d;</div><div class='ctx'> #define __VMEMMAP_BASE_L4	0xffffea0000000000UL</div><div class='ctx'> #define __VMEMMAP_BASE_L5	0xffd4000000000000UL</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT</div><div class='ctx'> # define VMALLOC_START		vmalloc_base</div><div class='ctx'> # define VMALLOC_SIZE_TB	(pgtable_l5_enabled() ? VMALLOC_SIZE_TB_L5 : VMALLOC_SIZE_TB_L4)</div><div class='ctx'> # define VMEMMAP_START		vmemmap_base</div><div class='del'>-#else</div><div class='del'>-# define VMALLOC_START		__VMALLOC_BASE_L4</div><div class='del'>-# define VMALLOC_SIZE_TB	VMALLOC_SIZE_TB_L4</div><div class='del'>-# define VMEMMAP_START		__VMEMMAP_BASE_L4</div><div class='del'>-#endif /* CONFIG_DYNAMIC_MEMORY_LAYOUT */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_RANDOMIZE_MEMORY</div><div class='ctx'> # define DIRECT_MAP_PHYSMEM_END	direct_map_physmem_end</div><div class='head'>diff --git a/arch/x86/include/asm/posted_intr.h b/arch/x86/include/asm/posted_intr.h<br/>index de788b400fba..bb107ebbe713 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/posted_intr.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/posted_intr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/posted_intr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/posted_intr.h</a></div><div class='hunk'>@@ -81,6 +81,11 @@ static inline bool pi_test_sn(struct pi_desc *pi_desc)</div><div class='ctx'> 	return test_bit(POSTED_INTR_SN, (unsigned long *)&amp;pi_desc-&gt;control);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool pi_test_pir(int vector, struct pi_desc *pi_desc)</div><div class='add'>+{</div><div class='add'>+	return test_bit(vector, (unsigned long *)pi_desc-&gt;pir);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Non-atomic helpers */</div><div class='ctx'> static inline void __pi_set_sn(struct pi_desc *pi_desc)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h<br/>index 5d2f7e5aff26..bde58f6510ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/processor.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/processor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/processor.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/processor.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@ struct vm86;</div><div class='ctx'> #include &lt;uapi/asm/sigcontext.h&gt;</div><div class='ctx'> #include &lt;asm/current.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeatures.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/pgtable_types.h&gt;</div><div class='ctx'> #include &lt;asm/percpu.h&gt;</div><div class='hunk'>@@ -514,15 +514,14 @@ struct thread_struct {</div><div class='ctx'> </div><div class='ctx'> 	struct thread_shstk	shstk;</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-	/* Floating point and extended processor state */</div><div class='del'>-	struct fpu		fpu;</div><div class='del'>-	/*</div><div class='del'>-	 * WARNING: 'fpu' is dynamically-sized.  It *MUST* be at</div><div class='del'>-	 * the end.</div><div class='del'>-	 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_DEBUG_FPU</div><div class='add'>+extern struct fpu *x86_task_fpu(struct task_struct *task);</div><div class='add'>+#else</div><div class='add'>+# define x86_task_fpu(task)	((struct fpu *)((void *)(task) + sizeof(*(task))))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> extern void fpu_thread_struct_whitelist(unsigned long *offset, unsigned long *size);</div><div class='ctx'> </div><div class='ctx'> static inline void arch_thread_struct_whitelist(unsigned long *offset,</div><div class='hunk'>@@ -734,6 +733,7 @@ void store_cpu_caps(struct cpuinfo_x86 *info);</div><div class='ctx'> </div><div class='ctx'> enum l1tf_mitigations {</div><div class='ctx'> 	L1TF_MITIGATION_OFF,</div><div class='add'>+	L1TF_MITIGATION_AUTO,</div><div class='ctx'> 	L1TF_MITIGATION_FLUSH_NOWARN,</div><div class='ctx'> 	L1TF_MITIGATION_FLUSH,</div><div class='ctx'> 	L1TF_MITIGATION_FLUSH_NOSMT,</div><div class='head'>diff --git a/arch/x86/include/asm/resctrl.h b/arch/x86/include/asm/resctrl.h<br/>index 011bf67a1866..feb93b50e990 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/resctrl.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/resctrl.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/resctrl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/resctrl.h</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> #include &lt;linux/resctrl_types.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This value can never be a valid CLOSID, and is used when mapping a</div><div class='ctx'>  * (closid, rmid) pair to an index and back. On x86 only the RMID is</div><div class='hunk'>@@ -175,7 +177,7 @@ static inline bool resctrl_arch_match_rmid(struct task_struct *tsk, u32 ignored,</div><div class='ctx'> 	return READ_ONCE(tsk-&gt;rmid) == rmid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void resctrl_sched_in(struct task_struct *tsk)</div><div class='add'>+static inline void resctrl_arch_sched_in(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='ctx'> 	if (static_branch_likely(&amp;rdt_enable_key))</div><div class='ctx'> 		__resctrl_sched_in(tsk);</div><div class='hunk'>@@ -194,25 +196,22 @@ static inline u32 resctrl_arch_rmid_idx_encode(u32 ignored, u32 rmid)</div><div class='ctx'> </div><div class='ctx'> /* x86 can always read an rmid, nothing needs allocating */</div><div class='ctx'> struct rdt_resource;</div><div class='del'>-static inline void *resctrl_arch_mon_ctx_alloc(struct rdt_resource *r, int evtid)</div><div class='add'>+static inline void *resctrl_arch_mon_ctx_alloc(struct rdt_resource *r,</div><div class='add'>+					       enum resctrl_event_id evtid)</div><div class='ctx'> {</div><div class='ctx'> 	might_sleep();</div><div class='ctx'> 	return NULL;</div><div class='del'>-};</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static inline void resctrl_arch_mon_ctx_free(struct rdt_resource *r, int evtid,</div><div class='del'>-					     void *ctx) { };</div><div class='add'>+static inline void resctrl_arch_mon_ctx_free(struct rdt_resource *r,</div><div class='add'>+					     enum resctrl_event_id evtid,</div><div class='add'>+					     void *ctx) { }</div><div class='ctx'> </div><div class='del'>-u64 resctrl_arch_get_prefetch_disable_bits(void);</div><div class='del'>-int resctrl_arch_pseudo_lock_fn(void *_plr);</div><div class='del'>-int resctrl_arch_measure_cycles_lat_fn(void *_plr);</div><div class='del'>-int resctrl_arch_measure_l2_residency(void *_plr);</div><div class='del'>-int resctrl_arch_measure_l3_residency(void *_plr);</div><div class='ctx'> void resctrl_cpu_detect(struct cpuinfo_x86 *c);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-static inline void resctrl_sched_in(struct task_struct *tsk) {}</div><div class='add'>+static inline void resctrl_arch_sched_in(struct task_struct *tsk) {}</div><div class='ctx'> static inline void resctrl_cpu_detect(struct cpuinfo_x86 *c) {}</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_X86_CPU_RESCTRL */</div><div class='head'>diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h<br/>index ad9212df0ec0..6324f4c6c545 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/setup.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/setup.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/setup.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/setup.h</a></div><div class='hunk'>@@ -52,6 +52,7 @@ extern void reserve_standard_io_resources(void);</div><div class='ctx'> extern void i386_reserve_resources(void);</div><div class='ctx'> extern unsigned long __startup_64(unsigned long p2v_offset, struct boot_params *bp);</div><div class='ctx'> extern void startup_64_setup_gdt_idt(void);</div><div class='add'>+extern void startup_64_load_idt(void *vc_handler);</div><div class='ctx'> extern void early_setup_idt(void);</div><div class='ctx'> extern void __init do_early_exception(struct pt_regs *regs, int trapnr);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h<br/>index acb85b9346d8..0020d77a0800 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sev-common.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/sev-common.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sev-common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/sev-common.h</a></div><div class='hunk'>@@ -116,7 +116,7 @@ enum psc_op {</div><div class='ctx'> #define GHCB_MSR_VMPL_REQ		0x016</div><div class='ctx'> #define GHCB_MSR_VMPL_REQ_LEVEL(v)			\</div><div class='ctx'> 	/* GHCBData[39:32] */				\</div><div class='del'>-	(((u64)(v) &amp; GENMASK_ULL(7, 0) &lt;&lt; 32) |		\</div><div class='add'>+	((((u64)(v) &amp; GENMASK_ULL(7, 0)) &lt;&lt; 32) |	\</div><div class='ctx'> 	/* GHCBDdata[11:0] */				\</div><div class='ctx'> 	GHCB_MSR_VMPL_REQ)</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h<br/>new file mode 100644<br/>index 000000000000..3dfd306d1c9e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sev-internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/sev-internal.h</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+#define DR7_RESET_VALUE        0x400</div><div class='add'>+</div><div class='add'>+extern struct ghcb boot_ghcb_page;</div><div class='add'>+extern u64 sev_hv_features;</div><div class='add'>+extern u64 sev_secrets_pa;</div><div class='add'>+</div><div class='add'>+/* #VC handler runtime per-CPU data */</div><div class='add'>+struct sev_es_runtime_data {</div><div class='add'>+	struct ghcb ghcb_page;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reserve one page per CPU as backup storage for the unencrypted GHCB.</div><div class='add'>+	 * It is needed when an NMI happens while the #VC handler uses the real</div><div class='add'>+	 * GHCB, and the NMI handler itself is causing another #VC exception. In</div><div class='add'>+	 * that case the GHCB content of the first handler needs to be backed up</div><div class='add'>+	 * and restored.</div><div class='add'>+	 */</div><div class='add'>+	struct ghcb backup_ghcb;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Mark the per-cpu GHCBs as in-use to detect nested #VC exceptions.</div><div class='add'>+	 * There is no need for it to be atomic, because nothing is written to</div><div class='add'>+	 * the GHCB between the read and the write of ghcb_active. So it is safe</div><div class='add'>+	 * to use it when a nested #VC exception happens before the write.</div><div class='add'>+	 *</div><div class='add'>+	 * This is necessary for example in the #VC-&gt;NMI-&gt;#VC case when the NMI</div><div class='add'>+	 * happens while the first #VC handler uses the GHCB. When the NMI code</div><div class='add'>+	 * raises a second #VC handler it might overwrite the contents of the</div><div class='add'>+	 * GHCB written by the first handler. To avoid this the content of the</div><div class='add'>+	 * GHCB is saved and restored when the GHCB is detected to be in use</div><div class='add'>+	 * already.</div><div class='add'>+	 */</div><div class='add'>+	bool ghcb_active;</div><div class='add'>+	bool backup_ghcb_active;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Cached DR7 value - write it on DR7 writes and return it on reads.</div><div class='add'>+	 * That value will never make it to the real hardware DR7 as debugging</div><div class='add'>+	 * is currently unsupported in SEV-ES guests.</div><div class='add'>+	 */</div><div class='add'>+	unsigned long dr7;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ghcb_state {</div><div class='add'>+	struct ghcb *ghcb;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct svsm_ca boot_svsm_ca_page;</div><div class='add'>+</div><div class='add'>+struct ghcb *__sev_get_ghcb(struct ghcb_state *state);</div><div class='add'>+void __sev_put_ghcb(struct ghcb_state *state);</div><div class='add'>+</div><div class='add'>+DECLARE_PER_CPU(struct sev_es_runtime_data*, runtime_data);</div><div class='add'>+DECLARE_PER_CPU(struct sev_es_save_area *, sev_vmsa);</div><div class='add'>+</div><div class='add'>+void early_set_pages_state(unsigned long vaddr, unsigned long paddr,</div><div class='add'>+			   unsigned long npages, enum psc_op op);</div><div class='add'>+</div><div class='add'>+DECLARE_PER_CPU(struct svsm_ca *, svsm_caa);</div><div class='add'>+DECLARE_PER_CPU(u64, svsm_caa_pa);</div><div class='add'>+</div><div class='add'>+extern struct svsm_ca *boot_svsm_caa;</div><div class='add'>+extern u64 boot_svsm_caa_pa;</div><div class='add'>+</div><div class='add'>+static __always_inline struct svsm_ca *svsm_get_caa(void)</div><div class='add'>+{</div><div class='add'>+	if (sev_cfg.use_cas)</div><div class='add'>+		return this_cpu_read(svsm_caa);</div><div class='add'>+	else</div><div class='add'>+		return boot_svsm_caa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline u64 svsm_get_caa_pa(void)</div><div class='add'>+{</div><div class='add'>+	if (sev_cfg.use_cas)</div><div class='add'>+		return this_cpu_read(svsm_caa_pa);</div><div class='add'>+	else</div><div class='add'>+		return boot_svsm_caa_pa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int svsm_perform_call_protocol(struct svsm_call *call);</div><div class='add'>+</div><div class='add'>+static inline u64 sev_es_rd_ghcb_msr(void)</div><div class='add'>+{</div><div class='add'>+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void sev_es_wr_ghcb_msr(u64 val)</div><div class='add'>+{</div><div class='add'>+	u32 low, high;</div><div class='add'>+</div><div class='add'>+	low  = (u32)(val);</div><div class='add'>+	high = (u32)(val &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void snp_register_ghcb_early(unsigned long paddr);</div><div class='add'>+bool sev_es_negotiate_protocol(void);</div><div class='add'>+bool sev_es_check_cpu_features(void);</div><div class='add'>+u64 get_hv_features(void);</div><div class='add'>+</div><div class='add'>+const struct snp_cpuid_table *snp_cpuid_get_table(void);</div><div class='head'>diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h<br/>index ba7999f66abe..58e028d42e41 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sev.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/sev.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/sev.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/sev.h</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;asm/sev-common.h&gt;</div><div class='ctx'> #include &lt;asm/coco.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='add'>+#include &lt;asm/svm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define GHCB_PROTOCOL_MIN	1ULL</div><div class='ctx'> #define GHCB_PROTOCOL_MAX	2ULL</div><div class='hunk'>@@ -83,6 +84,36 @@ extern void vc_no_ghcb(void);</div><div class='ctx'> extern void vc_boot_ghcb(void);</div><div class='ctx'> extern bool handle_vc_boot_ghcb(struct pt_regs *regs);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Individual entries of the SNP CPUID table, as defined by the SNP</div><div class='add'>+ * Firmware ABI, Revision 0.9, Section 7.1, Table 14.</div><div class='add'>+ */</div><div class='add'>+struct snp_cpuid_fn {</div><div class='add'>+	u32 eax_in;</div><div class='add'>+	u32 ecx_in;</div><div class='add'>+	u64 xcr0_in;</div><div class='add'>+	u64 xss_in;</div><div class='add'>+	u32 eax;</div><div class='add'>+	u32 ebx;</div><div class='add'>+	u32 ecx;</div><div class='add'>+	u32 edx;</div><div class='add'>+	u64 __reserved;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SNP CPUID table, as defined by the SNP Firmware ABI, Revision 0.9,</div><div class='add'>+ * Section 8.14.2.6. Also noted there is the SNP firmware-enforced limit</div><div class='add'>+ * of 64 entries per CPUID table.</div><div class='add'>+ */</div><div class='add'>+#define SNP_CPUID_COUNT_MAX 64</div><div class='add'>+</div><div class='add'>+struct snp_cpuid_table {</div><div class='add'>+	u32 count;</div><div class='add'>+	u32 __reserved1;</div><div class='add'>+	u64 __reserved2;</div><div class='add'>+	struct snp_cpuid_fn fn[SNP_CPUID_COUNT_MAX];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /* PVALIDATE return codes */</div><div class='ctx'> #define PVALIDATE_FAIL_SIZEMISMATCH	6</div><div class='ctx'> </div><div class='hunk'>@@ -384,6 +415,10 @@ struct svsm_call {</div><div class='ctx'> #define SVSM_ATTEST_SERVICES		0</div><div class='ctx'> #define SVSM_ATTEST_SINGLE_SERVICE	1</div><div class='ctx'> </div><div class='add'>+#define SVSM_VTPM_CALL(x)		((2ULL &lt;&lt; 32) | (x))</div><div class='add'>+#define SVSM_VTPM_QUERY			0</div><div class='add'>+#define SVSM_VTPM_CMD			1</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_AMD_MEM_ENCRYPT</div><div class='ctx'> </div><div class='ctx'> extern u8 snp_vmpl;</div><div class='hunk'>@@ -481,9 +516,39 @@ void snp_msg_free(struct snp_msg_desc *mdesc);</div><div class='ctx'> int snp_send_guest_request(struct snp_msg_desc *mdesc, struct snp_guest_req *req,</div><div class='ctx'> 			   struct snp_guest_request_ioctl *rio);</div><div class='ctx'> </div><div class='add'>+int snp_svsm_vtpm_send_command(u8 *buffer);</div><div class='add'>+</div><div class='ctx'> void __init snp_secure_tsc_prepare(void);</div><div class='ctx'> void __init snp_secure_tsc_init(void);</div><div class='ctx'> </div><div class='add'>+static __always_inline void vc_ghcb_invalidate(struct ghcb *ghcb)</div><div class='add'>+{</div><div class='add'>+	ghcb-&gt;save.sw_exit_code = 0;</div><div class='add'>+	__builtin_memset(ghcb-&gt;save.valid_bitmap, 0, sizeof(ghcb-&gt;save.valid_bitmap));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void vc_forward_exception(struct es_em_ctxt *ctxt);</div><div class='add'>+</div><div class='add'>+/* I/O parameters for CPUID-related helpers */</div><div class='add'>+struct cpuid_leaf {</div><div class='add'>+	u32 fn;</div><div class='add'>+	u32 subfn;</div><div class='add'>+	u32 eax;</div><div class='add'>+	u32 ebx;</div><div class='add'>+	u32 ecx;</div><div class='add'>+	u32 edx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int snp_cpuid(struct ghcb *ghcb, struct es_em_ctxt *ctxt, struct cpuid_leaf *leaf);</div><div class='add'>+</div><div class='add'>+void __noreturn sev_es_terminate(unsigned int set, unsigned int reason);</div><div class='add'>+enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,</div><div class='add'>+				   struct es_em_ctxt *ctxt,</div><div class='add'>+				   u64 exit_code, u64 exit_info_1,</div><div class='add'>+				   u64 exit_info_2);</div><div class='add'>+</div><div class='add'>+extern struct ghcb *boot_ghcb;</div><div class='add'>+</div><div class='ctx'> #else	/* !CONFIG_AMD_MEM_ENCRYPT */</div><div class='ctx'> </div><div class='ctx'> #define snp_vmpl 0</div><div class='hunk'>@@ -524,6 +589,7 @@ static inline struct snp_msg_desc *snp_msg_alloc(void) { return NULL; }</div><div class='ctx'> static inline void snp_msg_free(struct snp_msg_desc *mdesc) { }</div><div class='ctx'> static inline int snp_send_guest_request(struct snp_msg_desc *mdesc, struct snp_guest_req *req,</div><div class='ctx'> 					 struct snp_guest_request_ioctl *rio) { return -ENODEV; }</div><div class='add'>+static inline int snp_svsm_vtpm_send_command(u8 *buffer) { return -ENODEV; }</div><div class='ctx'> static inline void __init snp_secure_tsc_prepare(void) { }</div><div class='ctx'> static inline void __init snp_secure_tsc_init(void) { }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/shared/tdx.h b/arch/x86/include/asm/shared/tdx.h<br/>index a28ff6b14145..2f3820342598 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/shared/tdx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/shared/tdx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/shared/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/shared/tdx.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> /* TDX module Call Leaf IDs */</div><div class='ctx'> #define TDG_VP_VMCALL			0</div><div class='ctx'> #define TDG_VP_INFO			1</div><div class='add'>+#define TDG_MR_RTMR_EXTEND		2</div><div class='ctx'> #define TDG_VP_VEINFO_GET		3</div><div class='ctx'> #define TDG_MR_REPORT			4</div><div class='ctx'> #define TDG_MEM_PAGE_ACCEPT		6</div><div class='hunk'>@@ -67,11 +68,18 @@</div><div class='ctx'> #define TD_CTLS_LOCK			BIT_ULL(TD_CTLS_LOCK_BIT)</div><div class='ctx'> </div><div class='ctx'> /* TDX hypercall Leaf IDs */</div><div class='add'>+#define TDVMCALL_GET_TD_VM_CALL_INFO	0x10000</div><div class='ctx'> #define TDVMCALL_MAP_GPA		0x10001</div><div class='ctx'> #define TDVMCALL_GET_QUOTE		0x10002</div><div class='ctx'> #define TDVMCALL_REPORT_FATAL_ERROR	0x10003</div><div class='ctx'> </div><div class='del'>-#define TDVMCALL_STATUS_RETRY		1</div><div class='add'>+/*</div><div class='add'>+ * TDG.VP.VMCALL Status Codes (returned in R10)</div><div class='add'>+ */</div><div class='add'>+#define TDVMCALL_STATUS_SUCCESS		0x0000000000000000ULL</div><div class='add'>+#define TDVMCALL_STATUS_RETRY		0x0000000000000001ULL</div><div class='add'>+#define TDVMCALL_STATUS_INVALID_OPERAND	0x8000000000000000ULL</div><div class='add'>+#define TDVMCALL_STATUS_ALIGN_ERROR	0x8000000000000002ULL</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Bitmasks of exposed registers (with VMM).</div><div class='head'>diff --git a/arch/x86/include/asm/simd.h b/arch/x86/include/asm/simd.h<br/>index a341c878e977..b8027b63cd7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/simd.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/simd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/simd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/simd.h</a></div><div class='hunk'>@@ -1,6 +1,10 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef _ASM_SIMD_H</div><div class='add'>+#define _ASM_SIMD_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;linux/compiler_attributes.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * may_use_simd - whether it is allowable at this time to issue SIMD</div><div class='hunk'>@@ -10,3 +14,5 @@ static __must_check inline bool may_use_simd(void)</div><div class='ctx'> {</div><div class='ctx'> 	return irq_fpu_usable();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+#endif	/* _ASM_SIMD_H */</div><div class='head'>diff --git a/arch/x86/include/asm/smap.h b/arch/x86/include/asm/smap.h<br/>index 55a5e656e4b9..4f84d421d1cf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/smap.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/smap.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/smap.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/smap.h</a></div><div class='hunk'>@@ -16,23 +16,23 @@</div><div class='ctx'> #ifdef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #define ASM_CLAC \</div><div class='del'>-	ALTERNATIVE __stringify(ANNOTATE_IGNORE_ALTERNATIVE), "clac", X86_FEATURE_SMAP</div><div class='add'>+	ALTERNATIVE "", "clac", X86_FEATURE_SMAP</div><div class='ctx'> </div><div class='ctx'> #define ASM_STAC \</div><div class='del'>-	ALTERNATIVE __stringify(ANNOTATE_IGNORE_ALTERNATIVE), "stac", X86_FEATURE_SMAP</div><div class='add'>+	ALTERNATIVE "", "stac", X86_FEATURE_SMAP</div><div class='ctx'> </div><div class='ctx'> #else /* __ASSEMBLER__ */</div><div class='ctx'> </div><div class='ctx'> static __always_inline void clac(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Note: a barrier is implicit in alternative() */</div><div class='del'>-	alternative(ANNOTATE_IGNORE_ALTERNATIVE "", "clac", X86_FEATURE_SMAP);</div><div class='add'>+	alternative("", "clac", X86_FEATURE_SMAP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void stac(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* Note: a barrier is implicit in alternative() */</div><div class='del'>-	alternative(ANNOTATE_IGNORE_ALTERNATIVE "", "stac", X86_FEATURE_SMAP);</div><div class='add'>+	alternative("", "stac", X86_FEATURE_SMAP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long smap_save(void)</div><div class='hunk'>@@ -59,9 +59,9 @@ static __always_inline void smap_restore(unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> /* These macros can be used in asm() statements */</div><div class='ctx'> #define ASM_CLAC \</div><div class='del'>-	ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "", "clac", X86_FEATURE_SMAP)</div><div class='add'>+	ALTERNATIVE("", "clac", X86_FEATURE_SMAP)</div><div class='ctx'> #define ASM_STAC \</div><div class='del'>-	ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "", "stac", X86_FEATURE_SMAP)</div><div class='add'>+	ALTERNATIVE("", "stac", X86_FEATURE_SMAP)</div><div class='ctx'> </div><div class='ctx'> #define ASM_CLAC_UNSAFE \</div><div class='ctx'> 	ALTERNATIVE("", ANNOTATE_IGNORE_ALTERNATIVE "clac", X86_FEATURE_SMAP)</div><div class='head'>diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h<br/>index 658b690b2ccb..00b7e0398210 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/spec-ctrl.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/spec-ctrl.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/spec-ctrl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/spec-ctrl.h</a></div><div class='hunk'>@@ -84,7 +84,7 @@ static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)</div><div class='ctx'> static __always_inline void __update_spec_ctrl(u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	__this_cpu_write(x86_spec_ctrl_current, val);</div><div class='del'>-	native_wrmsrl(MSR_IA32_SPEC_CTRL, val);</div><div class='add'>+	native_wrmsrq(MSR_IA32_SPEC_CTRL, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='head'>diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h<br/>index 6266d6b9e0b8..ecda17efa042 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/special_insns.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/special_insns.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/special_insns.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/special_insns.h</a></div><div class='hunk'>@@ -10,30 +10,19 @@</div><div class='ctx'> #include &lt;linux/irqflags.h&gt;</div><div class='ctx'> #include &lt;linux/jump_label.h&gt;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The compiler should not reorder volatile asm statements with respect to each</div><div class='del'>- * other: they should execute in program order. However GCC 4.9.x and 5.x have</div><div class='del'>- * a bug (which was fixed in 8.1, 7.3 and 6.5) where they might reorder</div><div class='del'>- * volatile asm. The write functions are not affected since they have memory</div><div class='del'>- * clobbers preventing reordering. To prevent reads from being reordered with</div><div class='del'>- * respect to writes, use a dummy memory operand.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define __FORCE_ORDER "m"(*(unsigned int *)0x1000UL)</div><div class='del'>-</div><div class='ctx'> void native_write_cr0(unsigned long val);</div><div class='ctx'> </div><div class='ctx'> static inline unsigned long native_read_cr0(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long val;</div><div class='del'>-	asm volatile("mov %%cr0,%0\n\t" : "=r" (val) : __FORCE_ORDER);</div><div class='add'>+	asm volatile("mov %%cr0,%0" : "=r" (val));</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline unsigned long native_read_cr2(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long val;</div><div class='del'>-	asm volatile("mov %%cr2,%0\n\t" : "=r" (val) : __FORCE_ORDER);</div><div class='add'>+	asm volatile("mov %%cr2,%0" : "=r" (val));</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -45,7 +34,7 @@ static __always_inline void native_write_cr2(unsigned long val)</div><div class='ctx'> static __always_inline unsigned long __native_read_cr3(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long val;</div><div class='del'>-	asm volatile("mov %%cr3,%0\n\t" : "=r" (val) : __FORCE_ORDER);</div><div class='add'>+	asm volatile("mov %%cr3,%0" : "=r" (val));</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -66,10 +55,10 @@ static inline unsigned long native_read_cr4(void)</div><div class='ctx'> 	asm volatile("1: mov %%cr4, %0\n"</div><div class='ctx'> 		     "2:\n"</div><div class='ctx'> 		     _ASM_EXTABLE(1b, 2b)</div><div class='del'>-		     : "=r" (val) : "0" (0), __FORCE_ORDER);</div><div class='add'>+		     : "=r" (val) : "0" (0));</div><div class='ctx'> #else</div><div class='ctx'> 	/* CR4 always exists on x86_64. */</div><div class='del'>-	asm volatile("mov %%cr4,%0\n\t" : "=r" (val) : __FORCE_ORDER);</div><div class='add'>+	asm volatile("mov %%cr4,%0" : "=r" (val));</div><div class='ctx'> #endif</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/include/asm/string_32.h b/arch/x86/include/asm/string_32.h<br/>index 32c0d981a82a..e9cce169bb4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/string_32.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/string_32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/string_32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/string_32.h</a></div><div class='hunk'>@@ -33,11 +33,11 @@ extern size_t strlen(const char *s);</div><div class='ctx'> static __always_inline void *__memcpy(void *to, const void *from, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	int d0, d1, d2;</div><div class='del'>-	asm volatile("rep ; movsl\n\t"</div><div class='add'>+	asm volatile("rep movsl\n\t"</div><div class='ctx'> 		     "movl %4,%%ecx\n\t"</div><div class='ctx'> 		     "andl $3,%%ecx\n\t"</div><div class='ctx'> 		     "jz 1f\n\t"</div><div class='del'>-		     "rep ; movsb\n\t"</div><div class='add'>+		     "rep movsb\n\t"</div><div class='ctx'> 		     "1:"</div><div class='ctx'> 		     : "=&amp;c" (d0), "=&amp;D" (d1), "=&amp;S" (d2)</div><div class='ctx'> 		     : "0" (n / 4), "g" (n), "1" ((long)to), "2" ((long)from)</div><div class='hunk'>@@ -89,7 +89,7 @@ static __always_inline void *__constant_memcpy(void *to, const void *from,</div><div class='ctx'> 	if (n &gt;= 5 * 4) {</div><div class='ctx'> 		/* large block: use rep prefix */</div><div class='ctx'> 		int ecx;</div><div class='del'>-		asm volatile("rep ; movsl"</div><div class='add'>+		asm volatile("rep movsl"</div><div class='ctx'> 			     : "=&amp;c" (ecx), "=&amp;D" (edi), "=&amp;S" (esi)</div><div class='ctx'> 			     : "0" (n / 4), "1" (edi), "2" (esi)</div><div class='ctx'> 			     : "memory"</div><div class='hunk'>@@ -165,8 +165,7 @@ extern void *memchr(const void *cs, int c, size_t count);</div><div class='ctx'> static inline void *__memset_generic(void *s, char c, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int d0, d1;</div><div class='del'>-	asm volatile("rep\n\t"</div><div class='del'>-		     "stosb"</div><div class='add'>+	asm volatile("rep stosb"</div><div class='ctx'> 		     : "=&amp;c" (d0), "=&amp;D" (d1)</div><div class='ctx'> 		     : "a" (c), "1" (s), "0" (count)</div><div class='ctx'> 		     : "memory");</div><div class='hunk'>@@ -199,8 +198,7 @@ extern void *memset(void *, int, size_t);</div><div class='ctx'> static inline void *memset16(uint16_t *s, uint16_t v, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	int d0, d1;</div><div class='del'>-	asm volatile("rep\n\t"</div><div class='del'>-		     "stosw"</div><div class='add'>+	asm volatile("rep stosw"</div><div class='ctx'> 		     : "=&amp;c" (d0), "=&amp;D" (d1)</div><div class='ctx'> 		     : "a" (v), "1" (s), "0" (n)</div><div class='ctx'> 		     : "memory");</div><div class='hunk'>@@ -211,8 +209,7 @@ static inline void *memset16(uint16_t *s, uint16_t v, size_t n)</div><div class='ctx'> static inline void *memset32(uint32_t *s, uint32_t v, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	int d0, d1;</div><div class='del'>-	asm volatile("rep\n\t"</div><div class='del'>-		     "stosl"</div><div class='add'>+	asm volatile("rep stosl"</div><div class='ctx'> 		     : "=&amp;c" (d0), "=&amp;D" (d1)</div><div class='ctx'> 		     : "a" (v), "1" (s), "0" (n)</div><div class='ctx'> 		     : "memory");</div><div class='head'>diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h<br/>index d8416b3bf832..e8e5aab06255 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/suspend_32.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/suspend_32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/suspend_32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/suspend_32.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* image of the saved processor state */</div><div class='ctx'> struct saved_context {</div><div class='head'>diff --git a/arch/x86/include/asm/suspend_64.h b/arch/x86/include/asm/suspend_64.h<br/>index 54df06687d83..b512f9665f78 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/suspend_64.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/suspend_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/suspend_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/suspend_64.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Image of the saved processor state, used by the low level ACPI suspend to</div><div class='head'>diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h<br/>index 75248546403d..499b1c15cc8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/switch_to.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/switch_to.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/switch_to.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/switch_to.h</a></div><div class='hunk'>@@ -52,6 +52,8 @@ do {									\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+</div><div class='ctx'> static inline void refresh_sysenter_cs(struct thread_struct *thread)</div><div class='ctx'> {</div><div class='ctx'> 	/* Only happens when SEP is enabled, no need to test "SEP"arately: */</div><div class='hunk'>@@ -59,7 +61,7 @@ static inline void refresh_sysenter_cs(struct thread_struct *thread)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	this_cpu_write(cpu_tss_rw.x86_tss.ss1, thread-&gt;sysenter_cs);</div><div class='del'>-	wrmsr(MSR_IA32_SYSENTER_CS, thread-&gt;sysenter_cs, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_SYSENTER_CS, thread-&gt;sysenter_cs);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h<br/>index 4a1922ec80cf..8b19294600c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/tdx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/tdx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/tdx.h</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/mmzone.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/errno.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='hunk'>@@ -18,6 +19,7 @@</div><div class='ctx'>  * TDX module.</div><div class='ctx'>  */</div><div class='ctx'> #define TDX_ERROR			_BITUL(63)</div><div class='add'>+#define TDX_NON_RECOVERABLE		_BITUL(62)</div><div class='ctx'> #define TDX_SW_ERROR			(TDX_ERROR | GENMASK_ULL(47, 40))</div><div class='ctx'> #define TDX_SEAMCALL_VMFAILINVALID	(TDX_SW_ERROR | _UL(0xFFFF0000))</div><div class='ctx'> </div><div class='hunk'>@@ -33,6 +35,8 @@</div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/asm/mce.h&gt;</div><div class='add'>+#include &lt;asm/tdx_global_metadata.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Used by the #VE exception handler to gather the #VE exception</div><div class='hunk'>@@ -64,6 +68,8 @@ bool tdx_early_handle_ve(struct pt_regs *regs);</div><div class='ctx'> </div><div class='ctx'> int tdx_mcall_get_report0(u8 *reportdata, u8 *tdreport);</div><div class='ctx'> </div><div class='add'>+int tdx_mcall_extend_rtmr(u8 index, u8 *data);</div><div class='add'>+</div><div class='ctx'> u64 tdx_hcall_get_quote(u8 *buf, size_t size);</div><div class='ctx'> </div><div class='ctx'> void __init tdx_dump_attributes(u64 td_attr);</div><div class='hunk'>@@ -119,11 +125,82 @@ static inline u64 sc_retry(sc_func_t func, u64 fn,</div><div class='ctx'> int tdx_cpu_enable(void);</div><div class='ctx'> int tdx_enable(void);</div><div class='ctx'> const char *tdx_dump_mce_info(struct mce *m);</div><div class='add'>+const struct tdx_sys_info *tdx_get_sysinfo(void);</div><div class='add'>+</div><div class='add'>+int tdx_guest_keyid_alloc(void);</div><div class='add'>+u32 tdx_get_nr_guest_keyids(void);</div><div class='add'>+void tdx_guest_keyid_free(unsigned int keyid);</div><div class='add'>+</div><div class='add'>+struct tdx_td {</div><div class='add'>+	/* TD root structure: */</div><div class='add'>+	struct page *tdr_page;</div><div class='add'>+</div><div class='add'>+	int tdcs_nr_pages;</div><div class='add'>+	/* TD control structure: */</div><div class='add'>+	struct page **tdcs_pages;</div><div class='add'>+</div><div class='add'>+	/* Size of `tdcx_pages` in struct tdx_vp */</div><div class='add'>+	int tdcx_nr_pages;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tdx_vp {</div><div class='add'>+	/* TDVP root page */</div><div class='add'>+	struct page *tdvpr_page;</div><div class='add'>+</div><div class='add'>+	/* TD vCPU control structure: */</div><div class='add'>+	struct page **tdcx_pages;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u64 mk_keyed_paddr(u16 hkid, struct page *page)</div><div class='add'>+{</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = page_to_phys(page);</div><div class='add'>+	/* KeyID bits are just above the physical address bits: */</div><div class='add'>+	ret |= (u64)hkid &lt;&lt; boot_cpu_data.x86_phys_bits;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int pg_level_to_tdx_sept_level(enum pg_level level)</div><div class='add'>+{</div><div class='add'>+        WARN_ON_ONCE(level == PG_LEVEL_NONE);</div><div class='add'>+        return level - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 tdh_vp_enter(struct tdx_vp *vp, struct tdx_module_args *args);</div><div class='add'>+u64 tdh_mng_addcx(struct tdx_td *td, struct page *tdcs_page);</div><div class='add'>+u64 tdh_mem_page_add(struct tdx_td *td, u64 gpa, struct page *page, struct page *source, u64 *ext_err1, u64 *ext_err2);</div><div class='add'>+u64 tdh_mem_sept_add(struct tdx_td *td, u64 gpa, int level, struct page *page, u64 *ext_err1, u64 *ext_err2);</div><div class='add'>+u64 tdh_vp_addcx(struct tdx_vp *vp, struct page *tdcx_page);</div><div class='add'>+u64 tdh_mem_page_aug(struct tdx_td *td, u64 gpa, int level, struct page *page, u64 *ext_err1, u64 *ext_err2);</div><div class='add'>+u64 tdh_mem_range_block(struct tdx_td *td, u64 gpa, int level, u64 *ext_err1, u64 *ext_err2);</div><div class='add'>+u64 tdh_mng_key_config(struct tdx_td *td);</div><div class='add'>+u64 tdh_mng_create(struct tdx_td *td, u16 hkid);</div><div class='add'>+u64 tdh_vp_create(struct tdx_td *td, struct tdx_vp *vp);</div><div class='add'>+u64 tdh_mng_rd(struct tdx_td *td, u64 field, u64 *data);</div><div class='add'>+u64 tdh_mr_extend(struct tdx_td *td, u64 gpa, u64 *ext_err1, u64 *ext_err2);</div><div class='add'>+u64 tdh_mr_finalize(struct tdx_td *td);</div><div class='add'>+u64 tdh_vp_flush(struct tdx_vp *vp);</div><div class='add'>+u64 tdh_mng_vpflushdone(struct tdx_td *td);</div><div class='add'>+u64 tdh_mng_key_freeid(struct tdx_td *td);</div><div class='add'>+u64 tdh_mng_init(struct tdx_td *td, u64 td_params, u64 *extended_err);</div><div class='add'>+u64 tdh_vp_init(struct tdx_vp *vp, u64 initial_rcx, u32 x2apicid);</div><div class='add'>+u64 tdh_vp_rd(struct tdx_vp *vp, u64 field, u64 *data);</div><div class='add'>+u64 tdh_vp_wr(struct tdx_vp *vp, u64 field, u64 data, u64 mask);</div><div class='add'>+u64 tdh_phymem_page_reclaim(struct page *page, u64 *tdx_pt, u64 *tdx_owner, u64 *tdx_size);</div><div class='add'>+u64 tdh_mem_track(struct tdx_td *tdr);</div><div class='add'>+u64 tdh_mem_page_remove(struct tdx_td *td, u64 gpa, u64 level, u64 *ext_err1, u64 *ext_err2);</div><div class='add'>+u64 tdh_phymem_cache_wb(bool resume);</div><div class='add'>+u64 tdh_phymem_page_wbinvd_tdr(struct tdx_td *td);</div><div class='add'>+u64 tdh_phymem_page_wbinvd_hkid(u64 hkid, struct page *page);</div><div class='ctx'> #else</div><div class='ctx'> static inline void tdx_init(void) { }</div><div class='ctx'> static inline int tdx_cpu_enable(void) { return -ENODEV; }</div><div class='ctx'> static inline int tdx_enable(void)  { return -ENODEV; }</div><div class='add'>+static inline u32 tdx_get_nr_guest_keyids(void) { return 0; }</div><div class='ctx'> static inline const char *tdx_dump_mce_info(struct mce *m) { return NULL; }</div><div class='add'>+static inline const struct tdx_sys_info *tdx_get_sysinfo(void) { return NULL; }</div><div class='ctx'> #endif	/* CONFIG_INTEL_TDX_HOST */</div><div class='ctx'> </div><div class='ctx'> #endif /* !__ASSEMBLER__ */</div><div class='head'>diff --git a/arch/x86/virt/vmx/tdx/tdx_global_metadata.h b/arch/x86/include/asm/tdx_global_metadata.h<br/>index 6dd3c9695f59..060a2ad744bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx_global_metadata.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/tdx_global_metadata.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/tdx_global_metadata.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/tdx_global_metadata.h</a></div><div class='hunk'>@@ -17,9 +17,28 @@ struct tdx_sys_info_tdmr {</div><div class='ctx'> 	u16 pamt_1g_entry_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct tdx_sys_info_td_ctrl {</div><div class='add'>+	u16 tdr_base_size;</div><div class='add'>+	u16 tdcs_base_size;</div><div class='add'>+	u16 tdvps_base_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tdx_sys_info_td_conf {</div><div class='add'>+	u64 attributes_fixed0;</div><div class='add'>+	u64 attributes_fixed1;</div><div class='add'>+	u64 xfam_fixed0;</div><div class='add'>+	u64 xfam_fixed1;</div><div class='add'>+	u16 num_cpuid_config;</div><div class='add'>+	u16 max_vcpus_per_td;</div><div class='add'>+	u64 cpuid_config_leaves[128];</div><div class='add'>+	u64 cpuid_config_values[128][2];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct tdx_sys_info {</div><div class='ctx'> 	struct tdx_sys_info_features features;</div><div class='ctx'> 	struct tdx_sys_info_tdmr tdmr;</div><div class='add'>+	struct tdx_sys_info_td_ctrl td_ctrl;</div><div class='add'>+	struct tdx_sys_info_td_conf td_conf;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/arch/x86/include/asm/text-patching.h b/arch/x86/include/asm/text-patching.h<br/>index ab9e143ec9fe..5337f1be18f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/text-patching.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/text-patching.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/text-patching.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/text-patching.h</a></div><div class='hunk'>@@ -11,11 +11,11 @@</div><div class='ctx'>  * JUMP_LABEL_NOP_SIZE/RELATIVEJUMP_SIZE, which are 5.</div><div class='ctx'>  * Raise it if needed.</div><div class='ctx'>  */</div><div class='del'>-#define POKE_MAX_OPCODE_SIZE	5</div><div class='add'>+#define TEXT_POKE_MAX_OPCODE_SIZE	5</div><div class='ctx'> </div><div class='ctx'> extern void text_poke_early(void *addr, const void *opcode, size_t len);</div><div class='ctx'> </div><div class='del'>-extern void apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len);</div><div class='add'>+extern void text_poke_apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Clear and restore the kernel write-protection flag on the local CPU.</div><div class='hunk'>@@ -32,17 +32,17 @@ extern void apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u</div><div class='ctx'>  * an inconsistent instruction while you patch.</div><div class='ctx'>  */</div><div class='ctx'> extern void *text_poke(void *addr, const void *opcode, size_t len);</div><div class='del'>-extern void text_poke_sync(void);</div><div class='add'>+extern void smp_text_poke_sync_each_cpu(void);</div><div class='ctx'> extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);</div><div class='ctx'> extern void *text_poke_copy(void *addr, const void *opcode, size_t len);</div><div class='ctx'> #define text_poke_copy text_poke_copy</div><div class='ctx'> extern void *text_poke_copy_locked(void *addr, const void *opcode, size_t len, bool core_ok);</div><div class='ctx'> extern void *text_poke_set(void *addr, int c, size_t len);</div><div class='del'>-extern int poke_int3_handler(struct pt_regs *regs);</div><div class='del'>-extern void text_poke_bp(void *addr, const void *opcode, size_t len, const void *emulate);</div><div class='add'>+extern int smp_text_poke_int3_handler(struct pt_regs *regs);</div><div class='add'>+extern void smp_text_poke_single(void *addr, const void *opcode, size_t len, const void *emulate);</div><div class='ctx'> </div><div class='del'>-extern void text_poke_queue(void *addr, const void *opcode, size_t len, const void *emulate);</div><div class='del'>-extern void text_poke_finish(void);</div><div class='add'>+extern void smp_text_poke_batch_add(void *addr, const void *opcode, size_t len, const void *emulate);</div><div class='add'>+extern void smp_text_poke_batch_finish(void);</div><div class='ctx'> </div><div class='ctx'> #define INT3_INSN_SIZE		1</div><div class='ctx'> #define INT3_INSN_OPCODE	0xCC</div><div class='hunk'>@@ -82,7 +82,7 @@ static __always_inline int text_opcode_size(u8 opcode)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> union text_poke_insn {</div><div class='del'>-	u8 text[POKE_MAX_OPCODE_SIZE];</div><div class='add'>+	u8 text[TEXT_POKE_MAX_OPCODE_SIZE];</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u8 opcode;</div><div class='ctx'> 		s32 disp;</div><div class='hunk'>@@ -128,8 +128,8 @@ void *text_gen_insn(u8 opcode, const void *addr, const void *dest)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> extern int after_bootmem;</div><div class='del'>-extern __ro_after_init struct mm_struct *poking_mm;</div><div class='del'>-extern __ro_after_init unsigned long poking_addr;</div><div class='add'>+extern __ro_after_init struct mm_struct *text_poke_mm;</div><div class='add'>+extern __ro_after_init unsigned long text_poke_mm_addr;</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_UML_X86</div><div class='ctx'> static __always_inline</div><div class='hunk'>@@ -142,13 +142,14 @@ static __always_inline</div><div class='ctx'> void int3_emulate_push(struct pt_regs *regs, unsigned long val)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * The int3 handler in entry_64.S adds a gap between the</div><div class='add'>+	 * The INT3 handler in entry_64.S adds a gap between the</div><div class='ctx'> 	 * stack where the break point happened, and the saving of</div><div class='ctx'> 	 * pt_regs. We can extend the original stack because of</div><div class='del'>-	 * this gap. See the idtentry macro's create_gap option.</div><div class='add'>+	 * this gap. See the idtentry macro's X86_TRAP_BP logic.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Similarly entry_32.S will have a gap on the stack for (any) hardware</div><div class='del'>-	 * exception and pt_regs; see FIXUP_FRAME.</div><div class='add'>+	 * Similarly, entry_32.S will have a gap on the stack for</div><div class='add'>+	 * (any) hardware exception and pt_regs; see the</div><div class='add'>+	 * FIXUP_FRAME macro.</div><div class='ctx'> 	 */</div><div class='ctx'> 	regs-&gt;sp -= sizeof(unsigned long);</div><div class='ctx'> 	*(unsigned long *)regs-&gt;sp = val;</div><div class='head'>diff --git a/arch/x86/include/asm/trace/common.h b/arch/x86/include/asm/trace/common.h<br/>deleted file mode 100644<br/>index f0f9bcdb74d9..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/trace/common.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/trace/common.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-#ifndef _ASM_TRACE_COMMON_H</div><div class='del'>-#define _ASM_TRACE_COMMON_H</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TRACING</div><div class='del'>-DECLARE_STATIC_KEY_FALSE(trace_pagefault_key);</div><div class='del'>-#define trace_pagefault_enabled()			\</div><div class='del'>-	static_branch_unlikely(&amp;trace_pagefault_key)</div><div class='del'>-#else</div><div class='del'>-static inline bool trace_pagefault_enabled(void) { return false; }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/include/asm/trace/fpu.h b/arch/x86/include/asm/trace/fpu.h<br/>index 4645a6334063..0454d5e60e5d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/trace/fpu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/trace/fpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/trace/fpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/trace/fpu.h</a></div><div class='hunk'>@@ -74,11 +74,6 @@ DEFINE_EVENT(x86_fpu, x86_fpu_dropped,</div><div class='ctx'> 	TP_ARGS(fpu)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='del'>-DEFINE_EVENT(x86_fpu, x86_fpu_copy_src,</div><div class='del'>-	TP_PROTO(struct fpu *fpu),</div><div class='del'>-	TP_ARGS(fpu)</div><div class='del'>-);</div><div class='del'>-</div><div class='ctx'> DEFINE_EVENT(x86_fpu, x86_fpu_copy_dst,</div><div class='ctx'> 	TP_PROTO(struct fpu *fpu),</div><div class='ctx'> 	TP_ARGS(fpu)</div><div class='head'>diff --git a/arch/x86/include/asm/trace/irq_vectors.h b/arch/x86/include/asm/trace/irq_vectors.h<br/>index 88e7f0f3bf62..7408bebdfde0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/trace/irq_vectors.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/trace/irq_vectors.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/trace/irq_vectors.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/trace/irq_vectors.h</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'> #define _TRACE_IRQ_VECTORS_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/tracepoint.h&gt;</div><div class='del'>-#include &lt;asm/trace/common.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_LOCAL_APIC</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h<br/>index 94408a784c8e..4f7f09f50552 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/tsc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/tsc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/tsc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/tsc.h</a></div><div class='hunk'>@@ -5,10 +5,65 @@</div><div class='ctx'> #ifndef _ASM_X86_TSC_H</div><div class='ctx'> #define _ASM_X86_TSC_H</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * rdtsc() - returns the current TSC without ordering constraints</div><div class='add'>+ *</div><div class='add'>+ * rdtsc() returns the result of RDTSC as a 64-bit integer.  The</div><div class='add'>+ * only ordering constraint it supplies is the ordering implied by</div><div class='add'>+ * "asm volatile": it will put the RDTSC in the place you expect.  The</div><div class='add'>+ * CPU can and will speculatively execute that RDTSC, though, so the</div><div class='add'>+ * results can be non-monotonic if compared on different CPUs.</div><div class='add'>+ */</div><div class='add'>+static __always_inline u64 rdtsc(void)</div><div class='add'>+{</div><div class='add'>+	EAX_EDX_DECLARE_ARGS(val, low, high);</div><div class='add'>+</div><div class='add'>+	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));</div><div class='add'>+</div><div class='add'>+	return EAX_EDX_VAL(val, low, high);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rdtsc_ordered() - read the current TSC in program order</div><div class='add'>+ *</div><div class='add'>+ * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.</div><div class='add'>+ * It is ordered like a load to a global in-memory counter.  It should</div><div class='add'>+ * be impossible to observe non-monotonic rdtsc_unordered() behavior</div><div class='add'>+ * across multiple CPUs as long as the TSC is synced.</div><div class='add'>+ */</div><div class='add'>+static __always_inline u64 rdtsc_ordered(void)</div><div class='add'>+{</div><div class='add'>+	EAX_EDX_DECLARE_ARGS(val, low, high);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The RDTSC instruction is not ordered relative to memory</div><div class='add'>+	 * access.  The Intel SDM and the AMD APM are both vague on this</div><div class='add'>+	 * point, but empirically an RDTSC instruction can be</div><div class='add'>+	 * speculatively executed before prior loads.  An RDTSC</div><div class='add'>+	 * immediately after an appropriate barrier appears to be</div><div class='add'>+	 * ordered as a normal load, that is, it provides the same</div><div class='add'>+	 * ordering guarantees as reading from a global memory location</div><div class='add'>+	 * that some other imaginary CPU is updating continuously with a</div><div class='add'>+	 * time stamp.</div><div class='add'>+	 *</div><div class='add'>+	 * Thus, use the preferred barrier on the respective CPU, aiming for</div><div class='add'>+	 * RDTSCP as the default.</div><div class='add'>+	 */</div><div class='add'>+	asm volatile(ALTERNATIVE_2("rdtsc",</div><div class='add'>+				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,</div><div class='add'>+				   "rdtscp", X86_FEATURE_RDTSCP)</div><div class='add'>+			: EAX_EDX_RET(val, low, high)</div><div class='add'>+			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */</div><div class='add'>+			:: "ecx");</div><div class='add'>+</div><div class='add'>+	return EAX_EDX_VAL(val, low, high);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Standard way to access the cycle counter.</div><div class='ctx'>  */</div><div class='head'>diff --git a/arch/x86/include/asm/uaccess_64.h b/arch/x86/include/asm/uaccess_64.h<br/>index c52f0133425b..c8a5ae35c871 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/uaccess_64.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/uaccess_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/uaccess_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/uaccess_64.h</a></div><div class='hunk'>@@ -26,8 +26,8 @@ extern unsigned long USER_PTR_MAX;</div><div class='ctx'>  */</div><div class='ctx'> static inline unsigned long __untagged_addr(unsigned long addr)</div><div class='ctx'> {</div><div class='del'>-	asm (ALTERNATIVE("",</div><div class='del'>-			 "and " __percpu_arg([mask]) ", %[addr]", X86_FEATURE_LAM)</div><div class='add'>+	asm_inline (ALTERNATIVE("", "and " __percpu_arg([mask]) ", %[addr]",</div><div class='add'>+				X86_FEATURE_LAM)</div><div class='ctx'> 	     : [addr] "+r" (addr)</div><div class='ctx'> 	     : [mask] "m" (__my_cpu_var(tlbstate_untag_mask)));</div><div class='ctx'> </div><div class='hunk'>@@ -54,7 +54,7 @@ static inline unsigned long __untagged_addr_remote(struct mm_struct *mm,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define valid_user_address(x) \</div><div class='del'>-	((__force unsigned long)(x) &lt;= runtime_const_ptr(USER_PTR_MAX))</div><div class='add'>+	likely((__force unsigned long)(x) &lt;= runtime_const_ptr(USER_PTR_MAX))</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Masking the user address is an alternative to a conditional</div><div class='head'>diff --git a/arch/x86/include/asm/vdso.h b/arch/x86/include/asm/vdso.h<br/>index 80be0da733df..b7253ef3205a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vdso.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/vdso.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vdso.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/vdso.h</a></div><div class='hunk'>@@ -27,17 +27,9 @@ struct vdso_image {</div><div class='ctx'> 	long sym_vdso32_rt_sigreturn_landing_pad;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_64</div><div class='ctx'> extern const struct vdso_image vdso_image_64;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_X86_X32_ABI</div><div class='ctx'> extern const struct vdso_image vdso_image_x32;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined CONFIG_X86_32 || defined CONFIG_COMPAT</div><div class='ctx'> extern const struct vdso_image vdso_image_32;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> extern int __init init_vdso_image(const struct vdso_image *image);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/include/asm/vdso/processor.h b/arch/x86/include/asm/vdso/processor.h<br/>index c9b2ba7a9ec4..7000aeb59aa2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vdso/processor.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/vdso/processor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vdso/processor.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/vdso/processor.h</a></div><div class='hunk'>@@ -7,15 +7,15 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef __ASSEMBLER__</div><div class='ctx'> </div><div class='del'>-/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */</div><div class='del'>-static __always_inline void rep_nop(void)</div><div class='add'>+/* PAUSE is a good thing to insert into busy-wait loops. */</div><div class='add'>+static __always_inline void native_pause(void)</div><div class='ctx'> {</div><div class='del'>-	asm volatile("rep; nop" ::: "memory");</div><div class='add'>+	asm volatile("pause" ::: "memory");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __always_inline void cpu_relax(void)</div><div class='ctx'> {</div><div class='del'>-	rep_nop();</div><div class='add'>+	native_pause();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct getcpu_cache;</div><div class='head'>diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h<br/>index 8707361b24da..cca7d6641287 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vmx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/vmx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/vmx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/vmx.h</a></div><div class='hunk'>@@ -256,6 +256,7 @@ enum vmcs_field {</div><div class='ctx'> 	TSC_MULTIPLIER_HIGH             = 0x00002033,</div><div class='ctx'> 	TERTIARY_VM_EXEC_CONTROL	= 0x00002034,</div><div class='ctx'> 	TERTIARY_VM_EXEC_CONTROL_HIGH	= 0x00002035,</div><div class='add'>+	SHARED_EPT_POINTER		= 0x0000203C,</div><div class='ctx'> 	PID_POINTER_TABLE		= 0x00002042,</div><div class='ctx'> 	PID_POINTER_TABLE_HIGH		= 0x00002043,</div><div class='ctx'> 	GUEST_PHYSICAL_ADDRESS          = 0x00002400,</div><div class='hunk'>@@ -586,6 +587,7 @@ enum vm_entry_failure_code {</div><div class='ctx'> #define EPT_VIOLATION_PROT_READ		BIT(3)</div><div class='ctx'> #define EPT_VIOLATION_PROT_WRITE	BIT(4)</div><div class='ctx'> #define EPT_VIOLATION_PROT_EXEC		BIT(5)</div><div class='add'>+#define EPT_VIOLATION_EXEC_FOR_RING3_LIN BIT(6)</div><div class='ctx'> #define EPT_VIOLATION_PROT_MASK		(EPT_VIOLATION_PROT_READ  | \</div><div class='ctx'> 					 EPT_VIOLATION_PROT_WRITE | \</div><div class='ctx'> 					 EPT_VIOLATION_PROT_EXEC)</div><div class='head'>diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h<br/>index 213cf5379a5a..36698cc9fb44 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/x86_init.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/x86_init.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/x86_init.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/x86_init.h</a></div><div class='hunk'>@@ -292,6 +292,7 @@ struct x86_hyper_runtime {</div><div class='ctx'>  * @set_wallclock:		set time back to HW clock</div><div class='ctx'>  * @is_untracked_pat_range	exclude from PAT logic</div><div class='ctx'>  * @nmi_init			enable NMI on cpus</div><div class='add'>+ * @get_nmi_reason		get the reason an NMI was received</div><div class='ctx'>  * @save_sched_clock_state:	save state for sched_clock() on suspend</div><div class='ctx'>  * @restore_sched_clock_state:	restore state for sched_clock() on resume</div><div class='ctx'>  * @apic_post_init:		adjust apic if needed</div><div class='head'>diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h<br/>index bd0fc69a10a7..c2fc7869b996 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/asm/xen/hypervisor.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/asm/xen/hypervisor.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/asm/xen/hypervisor.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/asm/xen/hypervisor.h</a></div><div class='hunk'>@@ -43,7 +43,7 @@ extern struct start_info *xen_start_info;</div><div class='ctx'> </div><div class='ctx'> static inline uint32_t xen_cpuid_base(void)</div><div class='ctx'> {</div><div class='del'>-	return hypervisor_cpuid_base(XEN_SIGNATURE, 2);</div><div class='add'>+	return cpuid_base_hypervisor(XEN_SIGNATURE, 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct pci_dev;</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h<br/>index 460306b35a4b..225a12e0d5d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/uapi/asm/kvm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/uapi/asm/kvm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/uapi/asm/kvm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/uapi/asm/kvm.h</a></div><div class='hunk'>@@ -441,6 +441,7 @@ struct kvm_sync_regs {</div><div class='ctx'> #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 &lt;&lt; 6)</div><div class='ctx'> #define KVM_X86_QUIRK_SLOT_ZAP_ALL		(1 &lt;&lt; 7)</div><div class='ctx'> #define KVM_X86_QUIRK_STUFF_FEATURE_MSRS	(1 &lt;&lt; 8)</div><div class='add'>+#define KVM_X86_QUIRK_IGNORE_GUEST_PAT		(1 &lt;&lt; 9)</div><div class='ctx'> </div><div class='ctx'> #define KVM_STATE_NESTED_FORMAT_VMX	0</div><div class='ctx'> #define KVM_STATE_NESTED_FORMAT_SVM	1</div><div class='hunk'>@@ -930,4 +931,74 @@ struct kvm_hyperv_eventfd {</div><div class='ctx'> #define KVM_X86_SNP_VM		4</div><div class='ctx'> #define KVM_X86_TDX_VM		5</div><div class='ctx'> </div><div class='add'>+/* Trust Domain eXtension sub-ioctl() commands. */</div><div class='add'>+enum kvm_tdx_cmd_id {</div><div class='add'>+	KVM_TDX_CAPABILITIES = 0,</div><div class='add'>+	KVM_TDX_INIT_VM,</div><div class='add'>+	KVM_TDX_INIT_VCPU,</div><div class='add'>+	KVM_TDX_INIT_MEM_REGION,</div><div class='add'>+	KVM_TDX_FINALIZE_VM,</div><div class='add'>+	KVM_TDX_GET_CPUID,</div><div class='add'>+</div><div class='add'>+	KVM_TDX_CMD_NR_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvm_tdx_cmd {</div><div class='add'>+	/* enum kvm_tdx_cmd_id */</div><div class='add'>+	__u32 id;</div><div class='add'>+	/* flags for sub-commend. If sub-command doesn't use this, set zero. */</div><div class='add'>+	__u32 flags;</div><div class='add'>+	/*</div><div class='add'>+	 * data for each sub-command. An immediate or a pointer to the actual</div><div class='add'>+	 * data in process virtual address.  If sub-command doesn't use it,</div><div class='add'>+	 * set zero.</div><div class='add'>+	 */</div><div class='add'>+	__u64 data;</div><div class='add'>+	/*</div><div class='add'>+	 * Auxiliary error code.  The sub-command may return TDX SEAMCALL</div><div class='add'>+	 * status code in addition to -Exxx.</div><div class='add'>+	 */</div><div class='add'>+	__u64 hw_error;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvm_tdx_capabilities {</div><div class='add'>+	__u64 supported_attrs;</div><div class='add'>+	__u64 supported_xfam;</div><div class='add'>+	__u64 reserved[254];</div><div class='add'>+</div><div class='add'>+	/* Configurable CPUID bits for userspace */</div><div class='add'>+	struct kvm_cpuid2 cpuid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvm_tdx_init_vm {</div><div class='add'>+	__u64 attributes;</div><div class='add'>+	__u64 xfam;</div><div class='add'>+	__u64 mrconfigid[6];	/* sha384 digest */</div><div class='add'>+	__u64 mrowner[6];	/* sha384 digest */</div><div class='add'>+	__u64 mrownerconfig[6];	/* sha384 digest */</div><div class='add'>+</div><div class='add'>+	/* The total space for TD_PARAMS before the CPUIDs is 256 bytes */</div><div class='add'>+	__u64 reserved[12];</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Call KVM_TDX_INIT_VM before vcpu creation, thus before</div><div class='add'>+	 * KVM_SET_CPUID2.</div><div class='add'>+	 * This configuration supersedes KVM_SET_CPUID2s for VCPUs because the</div><div class='add'>+	 * TDX module directly virtualizes those CPUIDs without VMM.  The user</div><div class='add'>+	 * space VMM, e.g. qemu, should make KVM_SET_CPUID2 consistent with</div><div class='add'>+	 * those values.  If it doesn't, KVM may have wrong idea of vCPUIDs of</div><div class='add'>+	 * the guest, and KVM may wrongly emulate CPUIDs or MSRs that the TDX</div><div class='add'>+	 * module doesn't virtualize.</div><div class='add'>+	 */</div><div class='add'>+	struct kvm_cpuid2 cpuid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define KVM_TDX_MEASURE_MEMORY_REGION   _BITULL(0)</div><div class='add'>+</div><div class='add'>+struct kvm_tdx_init_mem_region {</div><div class='add'>+	__u64 source_addr;</div><div class='add'>+	__u64 gpa;</div><div class='add'>+	__u64 nr_pages;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* _ASM_X86_KVM_H */</div><div class='head'>diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h<br/>index a5faf6d88f1b..f0f4a4cf84a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/include/uapi/asm/vmx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/include/uapi/asm/vmx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/include/uapi/asm/vmx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/include/uapi/asm/vmx.h</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #define EXIT_REASON_TRIPLE_FAULT        2</div><div class='ctx'> #define EXIT_REASON_INIT_SIGNAL			3</div><div class='ctx'> #define EXIT_REASON_SIPI_SIGNAL         4</div><div class='add'>+#define EXIT_REASON_OTHER_SMI           6</div><div class='ctx'> </div><div class='ctx'> #define EXIT_REASON_INTERRUPT_WINDOW    7</div><div class='ctx'> #define EXIT_REASON_NMI_WINDOW          8</div><div class='hunk'>@@ -92,6 +93,7 @@</div><div class='ctx'> #define EXIT_REASON_TPAUSE              68</div><div class='ctx'> #define EXIT_REASON_BUS_LOCK            74</div><div class='ctx'> #define EXIT_REASON_NOTIFY              75</div><div class='add'>+#define EXIT_REASON_TDCALL              77</div><div class='ctx'> </div><div class='ctx'> #define VMX_EXIT_REASONS \</div><div class='ctx'> 	{ EXIT_REASON_EXCEPTION_NMI,         "EXCEPTION_NMI" }, \</div><div class='hunk'>@@ -155,7 +157,8 @@</div><div class='ctx'> 	{ EXIT_REASON_UMWAIT,                "UMWAIT" }, \</div><div class='ctx'> 	{ EXIT_REASON_TPAUSE,                "TPAUSE" }, \</div><div class='ctx'> 	{ EXIT_REASON_BUS_LOCK,              "BUS_LOCK" }, \</div><div class='del'>-	{ EXIT_REASON_NOTIFY,                "NOTIFY" }</div><div class='add'>+	{ EXIT_REASON_NOTIFY,                "NOTIFY" }, \</div><div class='add'>+	{ EXIT_REASON_TDCALL,                "TDCALL" }</div><div class='ctx'> </div><div class='ctx'> #define VMX_EXIT_REASON_FLAGS \</div><div class='ctx'> 	{ VMX_EXIT_REASONS_FAILED_VMENTRY,	"FAILED_VMENTRY" }</div><div class='head'>diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile<br/>index 84cfa179802c..99a783fd4691 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/Makefile</a></div><div class='hunk'>@@ -141,7 +141,6 @@ obj-$(CONFIG_OF)			+= devicetree.o</div><div class='ctx'> obj-$(CONFIG_UPROBES)			+= uprobes.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PERF_EVENTS)		+= perf_regs.o</div><div class='del'>-obj-$(CONFIG_TRACING)			+= tracepoint.o</div><div class='ctx'> obj-$(CONFIG_SCHED_MC_PRIO)		+= itmt.o</div><div class='ctx'> obj-$(CONFIG_X86_UMIP)			+= umip.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c<br/>index dae6a73be40e..9fa321a95eb3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/boot.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/boot.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/boot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/acpi/boot.c</a></div><div class='hunk'>@@ -23,6 +23,8 @@</div><div class='ctx'> #include &lt;linux/serial_core.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;xen/xen.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='ctx'> #include &lt;asm/irqdomain.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='hunk'>@@ -1729,6 +1731,15 @@ int __init acpi_mps_check(void)</div><div class='ctx'> {</div><div class='ctx'> #if defined(CONFIG_X86_LOCAL_APIC) &amp;&amp; !defined(CONFIG_X86_MPPARSE)</div><div class='ctx'> /* mptable code is not built-in*/</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Xen disables ACPI in PV DomU guests but it still emulates APIC and</div><div class='add'>+	 * supports SMP. Returning early here ensures that APIC is not disabled</div><div class='add'>+	 * unnecessarily and the guest is not limited to a single vCPU.</div><div class='add'>+	 */</div><div class='add'>+	if (xen_pv_domain() &amp;&amp; !xen_initial_domain())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (acpi_disabled || acpi_noirq) {</div><div class='ctx'> 		pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n");</div><div class='ctx'> 		return 1;</div><div class='head'>diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c<br/>index 77bfb846490c..7047124490f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/cppc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/cppc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/cppc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/acpi/cppc.c</a></div><div class='hunk'>@@ -49,7 +49,7 @@ int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe_on_cpu(cpunum, reg-&gt;address, val);</div><div class='add'>+	err = rdmsrq_safe_on_cpu(cpunum, reg-&gt;address, val);</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		u64 mask = GENMASK_ULL(reg-&gt;bit_offset + reg-&gt;bit_width - 1,</div><div class='ctx'> 				       reg-&gt;bit_offset);</div><div class='hunk'>@@ -65,7 +65,7 @@ int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)</div><div class='ctx'> 	u64 rd_val;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe_on_cpu(cpunum, reg-&gt;address, &amp;rd_val);</div><div class='add'>+	err = rdmsrq_safe_on_cpu(cpunum, reg-&gt;address, &amp;rd_val);</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		u64 mask = GENMASK_ULL(reg-&gt;bit_offset + reg-&gt;bit_width - 1,</div><div class='ctx'> 				       reg-&gt;bit_offset);</div><div class='hunk'>@@ -74,7 +74,7 @@ int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)</div><div class='ctx'> 		val &amp;= mask;</div><div class='ctx'> 		rd_val &amp;= ~mask;</div><div class='ctx'> 		rd_val |= val;</div><div class='del'>-		err = wrmsrl_safe_on_cpu(cpunum, reg-&gt;address, rd_val);</div><div class='add'>+		err = wrmsrq_safe_on_cpu(cpunum, reg-&gt;address, rd_val);</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -147,7 +147,7 @@ int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_CPPC)) {</div><div class='del'>-		ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &amp;val);</div><div class='add'>+		ret = rdmsrq_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &amp;val);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -272,7 +272,7 @@ int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* detect if running on heterogeneous design */</div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES)) {</div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_AMD_HTR_CORES)) {</div><div class='ctx'> 		switch (core_type) {</div><div class='ctx'> 		case TOPO_CPU_TYPE_UNKNOWN:</div><div class='ctx'> 			pr_warn("Undefined core type found for cpu %d\n", cpu);</div><div class='head'>diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c<br/>index d5ac34186555..8698d66563ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/cstate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/cstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/cstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/acpi/cstate.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;acpi/processor.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='ctx'> #include &lt;asm/special_insns.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='head'>diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c<br/>index 6dfecb27b846..91fa262f0e30 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/sleep.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/acpi/sleep.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/acpi/sleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/acpi/sleep.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/hypervisor.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ftrace.h&gt;</div><div class='head'>diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c<br/>index bf82c6f7d690..ecfe7b497cad 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/alternative.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/alternative.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/alternative.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/alternative.c</a></div><div class='hunk'>@@ -1,36 +1,17 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #define pr_fmt(fmt) "SMP alternatives: " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/mmu_context.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/stringify.h&gt;</div><div class='del'>-#include &lt;linux/highmem.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/memory.h&gt;</div><div class='del'>-#include &lt;linux/stop_machine.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/kdebug.h&gt;</div><div class='del'>-#include &lt;linux/kprobes.h&gt;</div><div class='del'>-#include &lt;linux/mmu_context.h&gt;</div><div class='del'>-#include &lt;linux/bsearch.h&gt;</div><div class='del'>-#include &lt;linux/sync_core.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;asm/text-patching.h&gt;</div><div class='del'>-#include &lt;asm/alternative.h&gt;</div><div class='del'>-#include &lt;asm/sections.h&gt;</div><div class='del'>-#include &lt;asm/mce.h&gt;</div><div class='del'>-#include &lt;asm/nmi.h&gt;</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/fixmap.h&gt;</div><div class='del'>-#include &lt;asm/paravirt.h&gt;</div><div class='del'>-#include &lt;asm/asm-prototypes.h&gt;</div><div class='del'>-#include &lt;asm/cfi.h&gt;</div><div class='add'>+#include &lt;asm/ibt.h&gt;</div><div class='add'>+#include &lt;asm/set_memory.h&gt;</div><div class='add'>+#include &lt;asm/nmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> int __read_mostly alternatives_patched;</div><div class='ctx'> </div><div class='hunk'>@@ -124,6 +105,171 @@ const unsigned char * const x86_nops[ASM_NOP_MAX+1] =</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_FINEIBT</div><div class='add'>+static bool cfi_paranoid __ro_after_init;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MITIGATION_ITS</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MODULES</div><div class='add'>+static struct module *its_mod;</div><div class='add'>+#endif</div><div class='add'>+static void *its_page;</div><div class='add'>+static unsigned int its_offset;</div><div class='add'>+</div><div class='add'>+/* Initialize a thunk with the "jmp *reg; int3" instructions. */</div><div class='add'>+static void *its_init_thunk(void *thunk, int reg)</div><div class='add'>+{</div><div class='add'>+	u8 *bytes = thunk;</div><div class='add'>+	int offset = 0;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FINEIBT</div><div class='add'>+	if (cfi_paranoid) {</div><div class='add'>+		/*</div><div class='add'>+		 * When ITS uses indirect branch thunk the fineibt_paranoid</div><div class='add'>+		 * caller sequence doesn't fit in the caller site. So put the</div><div class='add'>+		 * remaining part of the sequence (&lt;ea&gt; + JNE) into the ITS</div><div class='add'>+		 * thunk.</div><div class='add'>+		 */</div><div class='add'>+		bytes[i++] = 0xea; /* invalid instruction */</div><div class='add'>+		bytes[i++] = 0x75; /* JNE */</div><div class='add'>+		bytes[i++] = 0xfd;</div><div class='add'>+</div><div class='add'>+		offset = 1;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (reg &gt;= 8) {</div><div class='add'>+		bytes[i++] = 0x41; /* REX.B prefix */</div><div class='add'>+		reg -= 8;</div><div class='add'>+	}</div><div class='add'>+	bytes[i++] = 0xff;</div><div class='add'>+	bytes[i++] = 0xe0 + reg; /* jmp *reg */</div><div class='add'>+	bytes[i++] = 0xcc;</div><div class='add'>+</div><div class='add'>+	return thunk + offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MODULES</div><div class='add'>+void its_init_mod(struct module *mod)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_INDIRECT_THUNK_ITS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;text_mutex);</div><div class='add'>+	its_mod = mod;</div><div class='add'>+	its_page = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void its_fini_mod(struct module *mod)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_INDIRECT_THUNK_ITS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(its_mod != mod);</div><div class='add'>+</div><div class='add'>+	its_mod = NULL;</div><div class='add'>+	its_page = NULL;</div><div class='add'>+	mutex_unlock(&amp;text_mutex);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; mod-&gt;its_num_pages; i++) {</div><div class='add'>+		void *page = mod-&gt;its_page_array[i];</div><div class='add'>+		execmem_restore_rox(page, PAGE_SIZE);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void its_free_mod(struct module *mod)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_INDIRECT_THUNK_ITS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; mod-&gt;its_num_pages; i++) {</div><div class='add'>+		void *page = mod-&gt;its_page_array[i];</div><div class='add'>+		execmem_free(page);</div><div class='add'>+	}</div><div class='add'>+	kfree(mod-&gt;its_page_array);</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_MODULES */</div><div class='add'>+</div><div class='add'>+static void *its_alloc(void)</div><div class='add'>+{</div><div class='add'>+	void *page __free(execmem) = execmem_alloc(EXECMEM_MODULE_TEXT, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	if (!page)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MODULES</div><div class='add'>+	if (its_mod) {</div><div class='add'>+		void *tmp = krealloc(its_mod-&gt;its_page_array,</div><div class='add'>+				     (its_mod-&gt;its_num_pages+1) * sizeof(void *),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!tmp)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		its_mod-&gt;its_page_array = tmp;</div><div class='add'>+		its_mod-&gt;its_page_array[its_mod-&gt;its_num_pages++] = page;</div><div class='add'>+</div><div class='add'>+		execmem_make_temp_rw(page, PAGE_SIZE);</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_MODULES */</div><div class='add'>+</div><div class='add'>+	return no_free_ptr(page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *its_allocate_thunk(int reg)</div><div class='add'>+{</div><div class='add'>+	int size = 3 + (reg / 8);</div><div class='add'>+	void *thunk;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FINEIBT</div><div class='add'>+	/*</div><div class='add'>+	 * The ITS thunk contains an indirect jump and an int3 instruction so</div><div class='add'>+	 * its size is 3 or 4 bytes depending on the register used. If CFI</div><div class='add'>+	 * paranoid is used then 3 extra bytes are added in the ITS thunk to</div><div class='add'>+	 * complete the fineibt_paranoid caller sequence.</div><div class='add'>+	 */</div><div class='add'>+	if (cfi_paranoid)</div><div class='add'>+		size += 3;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (!its_page || (its_offset + size - 1) &gt;= PAGE_SIZE) {</div><div class='add'>+		its_page = its_alloc();</div><div class='add'>+		if (!its_page) {</div><div class='add'>+			pr_err("ITS page allocation failed\n");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		memset(its_page, INT3_INSN_OPCODE, PAGE_SIZE);</div><div class='add'>+		its_offset = 32;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the indirect branch instruction will be in the lower half</div><div class='add'>+	 * of a cacheline, then update the offset to reach the upper half.</div><div class='add'>+	 */</div><div class='add'>+	if ((its_offset + size - 1) % 64 &lt; 32)</div><div class='add'>+		its_offset = ((its_offset - 1) | 0x3F) + 33;</div><div class='add'>+</div><div class='add'>+	thunk = its_page + its_offset;</div><div class='add'>+	its_offset += size;</div><div class='add'>+</div><div class='add'>+	return its_init_thunk(thunk, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 *its_static_thunk(int reg)</div><div class='add'>+{</div><div class='add'>+	u8 *thunk = __x86_indirect_its_thunk_array[reg];</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FINEIBT</div><div class='add'>+	/* Paranoid thunk starts 2 bytes before */</div><div class='add'>+	if (cfi_paranoid)</div><div class='add'>+		return thunk - 2;</div><div class='add'>+#endif</div><div class='add'>+	return thunk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Nomenclature for variable names to simplify and clarify this code and ease</div><div class='ctx'>  * any potential staring at it:</div><div class='hunk'>@@ -171,13 +317,6 @@ static void add_nop(u8 *buf, unsigned int len)</div><div class='ctx'> 		*buf = INT3_INSN_OPCODE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern s32 __retpoline_sites[], __retpoline_sites_end[];</div><div class='del'>-extern s32 __return_sites[], __return_sites_end[];</div><div class='del'>-extern s32 __cfi_sites[], __cfi_sites_end[];</div><div class='del'>-extern s32 __ibt_endbr_seal[], __ibt_endbr_seal_end[];</div><div class='del'>-extern s32 __smp_locks[], __smp_locks_end[];</div><div class='del'>-void text_poke_early(void *addr, const void *opcode, size_t len);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Matches NOP and NOPL, not any of the other possible NOPs.</div><div class='ctx'>  */</div><div class='hunk'>@@ -369,7 +508,7 @@ static void __apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len)</div><div class='add'>+void text_poke_apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len)</div><div class='ctx'> {</div><div class='ctx'> 	__apply_relocation(buf, instr, instrlen, repl, repl_len);</div><div class='ctx'> 	optimize_nops(instr, buf, instrlen);</div><div class='hunk'>@@ -457,7 +596,7 @@ void __init_or_module noinline apply_alternatives(struct alt_instr *start,</div><div class='ctx'> 	DPRINTK(ALT, "alt table %px, -&gt; %px", start, end);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * In the case CONFIG_X86_5LEVEL=y, KASAN_SHADOW_START is defined using</div><div class='add'>+	 * KASAN_SHADOW_START is defined using</div><div class='ctx'> 	 * cpu_feature_enabled(X86_FEATURE_LA57) and is therefore patched here.</div><div class='ctx'> 	 * During the process, KASAN becomes confused seeing partial LA57</div><div class='ctx'> 	 * conversion and triggers a false-positive out-of-bound report.</div><div class='hunk'>@@ -525,7 +664,7 @@ void __init_or_module noinline apply_alternatives(struct alt_instr *start,</div><div class='ctx'> 		for (; insn_buff_sz &lt; a-&gt;instrlen; insn_buff_sz++)</div><div class='ctx'> 			insn_buff[insn_buff_sz] = 0x90;</div><div class='ctx'> </div><div class='del'>-		apply_relocation(insn_buff, instr, a-&gt;instrlen, replacement, a-&gt;replacementlen);</div><div class='add'>+		text_poke_apply_relocation(insn_buff, instr, a-&gt;instrlen, replacement, a-&gt;replacementlen);</div><div class='ctx'> </div><div class='ctx'> 		DUMP_BYTES(ALT, instr, a-&gt;instrlen, "%px:   old_insn: ", instr);</div><div class='ctx'> 		DUMP_BYTES(ALT, replacement, a-&gt;replacementlen, "%px:   rpl_insn: ", replacement);</div><div class='hunk'>@@ -581,7 +720,8 @@ static int emit_indirect(int op, int reg, u8 *bytes)</div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int emit_call_track_retpoline(void *addr, struct insn *insn, int reg, u8 *bytes)</div><div class='add'>+static int __emit_trampoline(void *addr, struct insn *insn, u8 *bytes,</div><div class='add'>+			     void *call_dest, void *jmp_dest)</div><div class='ctx'> {</div><div class='ctx'> 	u8 op = insn-&gt;opcode.bytes[0];</div><div class='ctx'> 	int i = 0;</div><div class='hunk'>@@ -602,7 +742,7 @@ static int emit_call_track_retpoline(void *addr, struct insn *insn, int reg, u8</div><div class='ctx'> 	switch (op) {</div><div class='ctx'> 	case CALL_INSN_OPCODE:</div><div class='ctx'> 		__text_gen_insn(bytes+i, op, addr+i,</div><div class='del'>-				__x86_indirect_call_thunk_array[reg],</div><div class='add'>+				call_dest,</div><div class='ctx'> 				CALL_INSN_SIZE);</div><div class='ctx'> 		i += CALL_INSN_SIZE;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -610,7 +750,7 @@ static int emit_call_track_retpoline(void *addr, struct insn *insn, int reg, u8</div><div class='ctx'> 	case JMP32_INSN_OPCODE:</div><div class='ctx'> clang_jcc:</div><div class='ctx'> 		__text_gen_insn(bytes+i, op, addr+i,</div><div class='del'>-				__x86_indirect_jump_thunk_array[reg],</div><div class='add'>+				jmp_dest,</div><div class='ctx'> 				JMP32_INSN_SIZE);</div><div class='ctx'> 		i += JMP32_INSN_SIZE;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -625,6 +765,48 @@ clang_jcc:</div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emit_call_track_retpoline(void *addr, struct insn *insn, int reg, u8 *bytes)</div><div class='add'>+{</div><div class='add'>+	return __emit_trampoline(addr, insn, bytes,</div><div class='add'>+				 __x86_indirect_call_thunk_array[reg],</div><div class='add'>+				 __x86_indirect_jump_thunk_array[reg]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MITIGATION_ITS</div><div class='add'>+static int emit_its_trampoline(void *addr, struct insn *insn, int reg, u8 *bytes)</div><div class='add'>+{</div><div class='add'>+	u8 *thunk = __x86_indirect_its_thunk_array[reg];</div><div class='add'>+	u8 *tmp = its_allocate_thunk(reg);</div><div class='add'>+</div><div class='add'>+	if (tmp)</div><div class='add'>+		thunk = tmp;</div><div class='add'>+</div><div class='add'>+	return __emit_trampoline(addr, insn, bytes, thunk, thunk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check if an indirect branch is at ITS-unsafe address */</div><div class='add'>+static bool cpu_wants_indirect_its_thunk_at(unsigned long addr, int reg)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_INDIRECT_THUNK_ITS))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Indirect branch opcode is 2 or 3 bytes depending on reg */</div><div class='add'>+	addr += 1 + reg / 8;</div><div class='add'>+</div><div class='add'>+	/* Lower-half of the cacheline? */</div><div class='add'>+	return !(addr &amp; 0x20);</div><div class='add'>+}</div><div class='add'>+#else /* CONFIG_MITIGATION_ITS */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_FINEIBT</div><div class='add'>+static bool cpu_wants_indirect_its_thunk_at(unsigned long addr, int reg)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_MITIGATION_ITS */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Rewrite the compiler generated retpoline thunk calls.</div><div class='ctx'>  *</div><div class='hunk'>@@ -699,6 +881,15 @@ static int patch_retpoline(void *addr, struct insn *insn, u8 *bytes)</div><div class='ctx'> 		bytes[i++] = 0xe8; /* LFENCE */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MITIGATION_ITS</div><div class='add'>+	/*</div><div class='add'>+	 * Check if the address of last byte of emitted-indirect is in</div><div class='add'>+	 * lower-half of the cacheline. Such branches need ITS mitigation.</div><div class='add'>+	 */</div><div class='add'>+	if (cpu_wants_indirect_its_thunk_at((unsigned long)addr + i, reg))</div><div class='add'>+		return emit_its_trampoline(addr, insn, reg, bytes);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	ret = emit_indirect(op, reg, bytes + i);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -732,6 +923,7 @@ void __init_or_module noinline apply_retpolines(s32 *start, s32 *end)</div><div class='ctx'> 		int len, ret;</div><div class='ctx'> 		u8 bytes[16];</div><div class='ctx'> 		u8 op1, op2;</div><div class='add'>+		u8 *dest;</div><div class='ctx'> </div><div class='ctx'> 		ret = insn_decode_kernel(&amp;insn, addr);</div><div class='ctx'> 		if (WARN_ON_ONCE(ret &lt; 0))</div><div class='hunk'>@@ -748,6 +940,12 @@ void __init_or_module noinline apply_retpolines(s32 *start, s32 *end)</div><div class='ctx'> </div><div class='ctx'> 		case CALL_INSN_OPCODE:</div><div class='ctx'> 		case JMP32_INSN_OPCODE:</div><div class='add'>+			/* Check for cfi_paranoid + ITS */</div><div class='add'>+			dest = addr + insn.length + insn.immediate.value;</div><div class='add'>+			if (dest[-1] == 0xea &amp;&amp; (dest[0] &amp; 0xf0) == 0x70) {</div><div class='add'>+				WARN_ON_ONCE(cfi_mode != CFI_FINEIBT);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case 0x0f: /* escape */</div><div class='hunk'>@@ -775,6 +973,21 @@ void __init_or_module noinline apply_retpolines(s32 *start, s32 *end)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MITIGATION_RETHUNK</div><div class='ctx'> </div><div class='add'>+bool cpu_wants_rethunk(void)</div><div class='add'>+{</div><div class='add'>+	return cpu_feature_enabled(X86_FEATURE_RETHUNK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool cpu_wants_rethunk_at(void *addr)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_RETHUNK))</div><div class='add'>+		return false;</div><div class='add'>+	if (x86_return_thunk != its_return_thunk)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return !((unsigned long)addr &amp; 0x20);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Rewrite the compiler generated return thunk tail-calls.</div><div class='ctx'>  *</div><div class='hunk'>@@ -791,7 +1004,7 @@ static int patch_return(void *addr, struct insn *insn, u8 *bytes)</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Patch the custom return thunks... */</div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) {</div><div class='add'>+	if (cpu_wants_rethunk_at(addr)) {</div><div class='ctx'> 		i = JMP32_INSN_SIZE;</div><div class='ctx'> 		__text_gen_insn(bytes, JMP32_INSN_OPCODE, addr, x86_return_thunk, i);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -808,7 +1021,7 @@ void __init_or_module noinline apply_returns(s32 *start, s32 *end)</div><div class='ctx'> {</div><div class='ctx'> 	s32 *s;</div><div class='ctx'> </div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_RETHUNK))</div><div class='add'>+	if (cpu_wants_rethunk())</div><div class='ctx'> 		static_call_force_reinit();</div><div class='ctx'> </div><div class='ctx'> 	for (s = start; s &lt; end; s++) {</div><div class='hunk'>@@ -1022,8 +1235,6 @@ int cfi_get_func_arity(void *func)</div><div class='ctx'> static bool cfi_rand __ro_after_init = true;</div><div class='ctx'> static u32  cfi_seed __ro_after_init;</div><div class='ctx'> </div><div class='del'>-static bool cfi_paranoid __ro_after_init = false;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Re-hash the CFI hash with a boot-time seed while making sure the result is</div><div class='ctx'>  * not a valid ENDBR instruction.</div><div class='hunk'>@@ -1436,6 +1647,19 @@ static int cfi_rand_callers(s32 *start, s32 *end)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emit_paranoid_trampoline(void *addr, struct insn *insn, int reg, u8 *bytes)</div><div class='add'>+{</div><div class='add'>+	u8 *thunk = (void *)__x86_indirect_its_thunk_array[reg] - 2;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MITIGATION_ITS</div><div class='add'>+	u8 *tmp = its_allocate_thunk(reg);</div><div class='add'>+	if (tmp)</div><div class='add'>+		thunk = tmp;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return __emit_trampoline(addr, insn, bytes, thunk, thunk);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int cfi_rewrite_callers(s32 *start, s32 *end)</div><div class='ctx'> {</div><div class='ctx'> 	s32 *s;</div><div class='hunk'>@@ -1477,9 +1701,14 @@ static int cfi_rewrite_callers(s32 *start, s32 *end)</div><div class='ctx'> 		memcpy(bytes, fineibt_paranoid_start, fineibt_paranoid_size);</div><div class='ctx'> 		memcpy(bytes + fineibt_caller_hash, &amp;hash, 4);</div><div class='ctx'> </div><div class='del'>-		ret = emit_indirect(op, 11, bytes + fineibt_paranoid_ind);</div><div class='del'>-		if (WARN_ON_ONCE(ret != 3))</div><div class='del'>-			continue;</div><div class='add'>+		if (cpu_wants_indirect_its_thunk_at((unsigned long)addr + fineibt_paranoid_ind, 11)) {</div><div class='add'>+			emit_paranoid_trampoline(addr + fineibt_caller_size,</div><div class='add'>+						 &amp;insn, 11, bytes + fineibt_caller_size);</div><div class='add'>+		} else {</div><div class='add'>+			ret = emit_indirect(op, 11, bytes + fineibt_paranoid_ind);</div><div class='add'>+			if (WARN_ON_ONCE(ret != 3))</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		text_poke_early(addr, bytes, fineibt_paranoid_size);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1706,29 +1935,66 @@ Efault:</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool is_paranoid_thunk(unsigned long addr)</div><div class='add'>+{</div><div class='add'>+	u32 thunk;</div><div class='add'>+</div><div class='add'>+	__get_kernel_nofault(&amp;thunk, (u32 *)addr, u32, Efault);</div><div class='add'>+	return (thunk &amp; 0x00FFFFFF) == 0xfd75ea;</div><div class='add'>+</div><div class='add'>+Efault:</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * regs-&gt;ip points to a LOCK Jcc.d8 instruction from the fineibt_paranoid_start[]</div><div class='del'>- * sequence.</div><div class='add'>+ * sequence, or to an invalid instruction (0xea) + Jcc.d8 for cfi_paranoid + ITS</div><div class='add'>+ * thunk.</div><div class='ctx'>  */</div><div class='ctx'> static bool decode_fineibt_paranoid(struct pt_regs *regs, unsigned long *target, u32 *type)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long addr = regs-&gt;ip - fineibt_paranoid_ud;</div><div class='del'>-	u32 hash;</div><div class='ctx'> </div><div class='del'>-	if (!cfi_paranoid || !is_cfi_trap(addr + fineibt_caller_size - LEN_UD2))</div><div class='add'>+	if (!cfi_paranoid)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	__get_kernel_nofault(&amp;hash, addr + fineibt_caller_hash, u32, Efault);</div><div class='del'>-	*target = regs-&gt;r11 + fineibt_preamble_size;</div><div class='del'>-	*type = regs-&gt;r10;</div><div class='add'>+	if (is_cfi_trap(addr + fineibt_caller_size - LEN_UD2)) {</div><div class='add'>+		*target = regs-&gt;r11 + fineibt_preamble_size;</div><div class='add'>+		*type = regs-&gt;r10;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Since the trapping instruction is the exact, but LOCK prefixed,</div><div class='add'>+		 * Jcc.d8 that got us here, the normal fixup will work.</div><div class='add'>+		 */</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Since the trapping instruction is the exact, but LOCK prefixed,</div><div class='del'>-	 * Jcc.d8 that got us here, the normal fixup will work.</div><div class='add'>+	 * The cfi_paranoid + ITS thunk combination results in:</div><div class='add'>+	 *</div><div class='add'>+	 *  0:   41 ba 78 56 34 12       mov    $0x12345678, %r10d</div><div class='add'>+	 *  6:   45 3b 53 f7             cmp    -0x9(%r11), %r10d</div><div class='add'>+	 *  a:   4d 8d 5b f0             lea    -0x10(%r11), %r11</div><div class='add'>+	 *  e:   2e e8 XX XX XX XX	 cs call __x86_indirect_paranoid_thunk_r11</div><div class='add'>+	 *</div><div class='add'>+	 * Where the paranoid_thunk looks like:</div><div class='add'>+	 *</div><div class='add'>+	 *  1d:  &lt;ea&gt;                    (bad)</div><div class='add'>+	 *  __x86_indirect_paranoid_thunk_r11:</div><div class='add'>+	 *  1e:  75 fd                   jne 1d</div><div class='add'>+	 *  __x86_indirect_its_thunk_r11:</div><div class='add'>+	 *  20:  41 ff eb                jmp *%r11</div><div class='add'>+	 *  23:  cc                      int3</div><div class='add'>+	 *</div><div class='ctx'> 	 */</div><div class='del'>-	return true;</div><div class='add'>+	if (is_paranoid_thunk(regs-&gt;ip)) {</div><div class='add'>+		*target = regs-&gt;r11 + fineibt_preamble_size;</div><div class='add'>+		*type = regs-&gt;r10;</div><div class='add'>+</div><div class='add'>+		regs-&gt;ip = *target;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-Efault:</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2010,7 +2276,7 @@ __visible noinline void __init __alt_reloc_selftest(void *arg)</div><div class='ctx'> static noinline void __init alt_reloc_selftest(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * Tests apply_relocation().</div><div class='add'>+	 * Tests text_poke_apply_relocation().</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * This has a relative immediate (CALL) in a place other than the first</div><div class='ctx'> 	 * instruction and additionally on x86_64 we get a RIP-relative LEA:</div><div class='hunk'>@@ -2031,6 +2297,8 @@ static noinline void __init alt_reloc_selftest(void)</div><div class='ctx'> </div><div class='ctx'> void __init alternative_instructions(void)</div><div class='ctx'> {</div><div class='add'>+	u64 ibt;</div><div class='add'>+</div><div class='ctx'> 	int3_selftest();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2057,6 +2325,9 @@ void __init alternative_instructions(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	paravirt_set_cap();</div><div class='ctx'> </div><div class='add'>+	/* Keep CET-IBT disabled until caller/callee are patched */</div><div class='add'>+	ibt = ibt_save(/*disable*/ true);</div><div class='add'>+</div><div class='ctx'> 	__apply_fineibt(__retpoline_sites, __retpoline_sites_end,</div><div class='ctx'> 			__cfi_sites, __cfi_sites_end, true);</div><div class='ctx'> </div><div class='hunk'>@@ -2080,6 +2351,8 @@ void __init alternative_instructions(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	apply_seal_endbr(__ibt_endbr_seal, __ibt_endbr_seal_end);</div><div class='ctx'> </div><div class='add'>+	ibt_restore(ibt);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	/* Patch to UP if other cpus not imminent. */</div><div class='ctx'> 	if (!noreplace_smp &amp;&amp; (num_present_cpus() == 1 || setup_max_cpus &lt;= 1)) {</div><div class='hunk'>@@ -2140,76 +2413,8 @@ void __init_or_module text_poke_early(void *addr, const void *opcode,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-typedef struct {</div><div class='del'>-	struct mm_struct *mm;</div><div class='del'>-} temp_mm_state_t;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Using a temporary mm allows to set temporary mappings that are not accessible</div><div class='del'>- * by other CPUs. Such mappings are needed to perform sensitive memory writes</div><div class='del'>- * that override the kernel memory protections (e.g., W^X), without exposing the</div><div class='del'>- * temporary page-table mappings that are required for these write operations to</div><div class='del'>- * other CPUs. Using a temporary mm also allows to avoid TLB shootdowns when the</div><div class='del'>- * mapping is torn down.</div><div class='del'>- *</div><div class='del'>- * Context: The temporary mm needs to be used exclusively by a single core. To</div><div class='del'>- *          harden security IRQs must be disabled while the temporary mm is</div><div class='del'>- *          loaded, thereby preventing interrupt handler bugs from overriding</div><div class='del'>- *          the kernel memory protection.</div><div class='del'>- */</div><div class='del'>-static inline temp_mm_state_t use_temporary_mm(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	temp_mm_state_t temp_state;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_irqs_disabled();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Make sure not to be in TLB lazy mode, as otherwise we'll end up</div><div class='del'>-	 * with a stale address space WITHOUT being in lazy mode after</div><div class='del'>-	 * restoring the previous mm.</div><div class='del'>-	 */</div><div class='del'>-	if (this_cpu_read(cpu_tlbstate_shared.is_lazy))</div><div class='del'>-		leave_mm();</div><div class='del'>-</div><div class='del'>-	temp_state.mm = this_cpu_read(cpu_tlbstate.loaded_mm);</div><div class='del'>-	switch_mm_irqs_off(NULL, mm, current);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If breakpoints are enabled, disable them while the temporary mm is</div><div class='del'>-	 * used. Userspace might set up watchpoints on addresses that are used</div><div class='del'>-	 * in the temporary mm, which would lead to wrong signals being sent or</div><div class='del'>-	 * crashes.</div><div class='del'>-	 *</div><div class='del'>-	 * Note that breakpoints are not disabled selectively, which also causes</div><div class='del'>-	 * kernel breakpoints (e.g., perf's) to be disabled. This might be</div><div class='del'>-	 * undesirable, but still seems reasonable as the code that runs in the</div><div class='del'>-	 * temporary mm should be short.</div><div class='del'>-	 */</div><div class='del'>-	if (hw_breakpoint_active())</div><div class='del'>-		hw_breakpoint_disable();</div><div class='del'>-</div><div class='del'>-	return temp_state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__ro_after_init struct mm_struct *poking_mm;</div><div class='del'>-__ro_after_init unsigned long poking_addr;</div><div class='del'>-</div><div class='del'>-static inline void unuse_temporary_mm(temp_mm_state_t prev_state)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_irqs_disabled();</div><div class='del'>-</div><div class='del'>-	switch_mm_irqs_off(NULL, prev_state.mm, current);</div><div class='del'>-</div><div class='del'>-	/* Clear the cpumask, to indicate no TLB flushing is needed anywhere */</div><div class='del'>-	cpumask_clear_cpu(raw_smp_processor_id(), mm_cpumask(poking_mm));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Restore the breakpoints if they were disabled before the temporary mm</div><div class='del'>-	 * was loaded.</div><div class='del'>-	 */</div><div class='del'>-	if (hw_breakpoint_active())</div><div class='del'>-		hw_breakpoint_restore();</div><div class='del'>-}</div><div class='add'>+__ro_after_init struct mm_struct *text_poke_mm;</div><div class='add'>+__ro_after_init unsigned long text_poke_mm_addr;</div><div class='ctx'> </div><div class='ctx'> static void text_poke_memcpy(void *dst, const void *src, size_t len)</div><div class='ctx'> {</div><div class='hunk'>@@ -2229,7 +2434,7 @@ static void *__text_poke(text_poke_f func, void *addr, const void *src, size_t l</div><div class='ctx'> {</div><div class='ctx'> 	bool cross_page_boundary = offset_in_page(addr) + len &gt; PAGE_SIZE;</div><div class='ctx'> 	struct page *pages[2] = {NULL};</div><div class='del'>-	temp_mm_state_t prev;</div><div class='add'>+	struct mm_struct *prev_mm;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	pte_t pte, *ptep;</div><div class='ctx'> 	spinlock_t *ptl;</div><div class='hunk'>@@ -2266,7 +2471,7 @@ static void *__text_poke(text_poke_f func, void *addr, const void *src, size_t l</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The lock is not really needed, but this allows to avoid open-coding.</div><div class='ctx'> 	 */</div><div class='del'>-	ptep = get_locked_pte(poking_mm, poking_addr, &amp;ptl);</div><div class='add'>+	ptep = get_locked_pte(text_poke_mm, text_poke_mm_addr, &amp;ptl);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This must not fail; preallocated in poking_init().</div><div class='hunk'>@@ -2276,21 +2481,21 @@ static void *__text_poke(text_poke_f func, void *addr, const void *src, size_t l</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='ctx'> 	pte = mk_pte(pages[0], pgprot);</div><div class='del'>-	set_pte_at(poking_mm, poking_addr, ptep, pte);</div><div class='add'>+	set_pte_at(text_poke_mm, text_poke_mm_addr, ptep, pte);</div><div class='ctx'> </div><div class='ctx'> 	if (cross_page_boundary) {</div><div class='ctx'> 		pte = mk_pte(pages[1], pgprot);</div><div class='del'>-		set_pte_at(poking_mm, poking_addr + PAGE_SIZE, ptep + 1, pte);</div><div class='add'>+		set_pte_at(text_poke_mm, text_poke_mm_addr + PAGE_SIZE, ptep + 1, pte);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Loading the temporary mm behaves as a compiler barrier, which</div><div class='ctx'> 	 * guarantees that the PTE will be set at the time memcpy() is done.</div><div class='ctx'> 	 */</div><div class='del'>-	prev = use_temporary_mm(poking_mm);</div><div class='add'>+	prev_mm = use_temporary_mm(text_poke_mm);</div><div class='ctx'> </div><div class='ctx'> 	kasan_disable_current();</div><div class='del'>-	func((u8 *)poking_addr + offset_in_page(addr), src, len);</div><div class='add'>+	func((u8 *)text_poke_mm_addr + offset_in_page(addr), src, len);</div><div class='ctx'> 	kasan_enable_current();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2299,22 +2504,22 @@ static void *__text_poke(text_poke_f func, void *addr, const void *src, size_t l</div><div class='ctx'> 	 */</div><div class='ctx'> 	barrier();</div><div class='ctx'> </div><div class='del'>-	pte_clear(poking_mm, poking_addr, ptep);</div><div class='add'>+	pte_clear(text_poke_mm, text_poke_mm_addr, ptep);</div><div class='ctx'> 	if (cross_page_boundary)</div><div class='del'>-		pte_clear(poking_mm, poking_addr + PAGE_SIZE, ptep + 1);</div><div class='add'>+		pte_clear(text_poke_mm, text_poke_mm_addr + PAGE_SIZE, ptep + 1);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Loading the previous page-table hierarchy requires a serializing</div><div class='ctx'> 	 * instruction that already allows the core to see the updated version.</div><div class='ctx'> 	 * Xen-PV is assumed to serialize execution in a similar manner.</div><div class='ctx'> 	 */</div><div class='del'>-	unuse_temporary_mm(prev);</div><div class='add'>+	unuse_temporary_mm(prev_mm);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Flushing the TLB might involve IPIs, which would require enabled</div><div class='ctx'> 	 * IRQs, but not if the mm is not used, as it is in this point.</div><div class='ctx'> 	 */</div><div class='del'>-	flush_tlb_mm_range(poking_mm, poking_addr, poking_addr +</div><div class='add'>+	flush_tlb_mm_range(text_poke_mm, text_poke_mm_addr, text_poke_mm_addr +</div><div class='ctx'> 			   (cross_page_boundary ? 2 : 1) * PAGE_SIZE,</div><div class='ctx'> 			   PAGE_SHIFT, false);</div><div class='ctx'> </div><div class='hunk'>@@ -2450,7 +2655,7 @@ static void do_sync_core(void *info)</div><div class='ctx'> 	sync_core();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void text_poke_sync(void)</div><div class='add'>+void smp_text_poke_sync_each_cpu(void)</div><div class='ctx'> {</div><div class='ctx'> 	on_each_cpu(do_sync_core, NULL, 1);</div><div class='ctx'> }</div><div class='hunk'>@@ -2460,64 +2665,66 @@ void text_poke_sync(void)</div><div class='ctx'>  * this thing. When len == 6 everything is prefixed with 0x0f and we map</div><div class='ctx'>  * opcode to Jcc.d8, using len to distinguish.</div><div class='ctx'>  */</div><div class='del'>-struct text_poke_loc {</div><div class='add'>+struct smp_text_poke_loc {</div><div class='ctx'> 	/* addr := _stext + rel_addr */</div><div class='ctx'> 	s32 rel_addr;</div><div class='ctx'> 	s32 disp;</div><div class='ctx'> 	u8 len;</div><div class='ctx'> 	u8 opcode;</div><div class='del'>-	const u8 text[POKE_MAX_OPCODE_SIZE];</div><div class='del'>-	/* see text_poke_bp_batch() */</div><div class='add'>+	const u8 text[TEXT_POKE_MAX_OPCODE_SIZE];</div><div class='add'>+	/* see smp_text_poke_batch_finish() */</div><div class='ctx'> 	u8 old;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct bp_patching_desc {</div><div class='del'>-	struct text_poke_loc *vec;</div><div class='add'>+#define TEXT_POKE_ARRAY_MAX (PAGE_SIZE / sizeof(struct smp_text_poke_loc))</div><div class='add'>+</div><div class='add'>+static struct smp_text_poke_array {</div><div class='add'>+	struct smp_text_poke_loc vec[TEXT_POKE_ARRAY_MAX];</div><div class='ctx'> 	int nr_entries;</div><div class='del'>-	atomic_t refs;</div><div class='del'>-};</div><div class='add'>+} text_poke_array;</div><div class='ctx'> </div><div class='del'>-static struct bp_patching_desc bp_desc;</div><div class='add'>+static DEFINE_PER_CPU(atomic_t, text_poke_array_refs);</div><div class='ctx'> </div><div class='del'>-static __always_inline</div><div class='del'>-struct bp_patching_desc *try_get_desc(void)</div><div class='add'>+/*</div><div class='add'>+ * These four __always_inline annotations imply noinstr, necessary</div><div class='add'>+ * due to smp_text_poke_int3_handler() being noinstr:</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static __always_inline bool try_get_text_poke_array(void)</div><div class='ctx'> {</div><div class='del'>-	struct bp_patching_desc *desc = &amp;bp_desc;</div><div class='add'>+	atomic_t *refs = this_cpu_ptr(&amp;text_poke_array_refs);</div><div class='ctx'> </div><div class='del'>-	if (!raw_atomic_inc_not_zero(&amp;desc-&gt;refs))</div><div class='del'>-		return NULL;</div><div class='add'>+	if (!raw_atomic_inc_not_zero(refs))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	return desc;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline void put_desc(void)</div><div class='add'>+static __always_inline void put_text_poke_array(void)</div><div class='ctx'> {</div><div class='del'>-	struct bp_patching_desc *desc = &amp;bp_desc;</div><div class='add'>+	atomic_t *refs = this_cpu_ptr(&amp;text_poke_array_refs);</div><div class='ctx'> </div><div class='ctx'> 	smp_mb__before_atomic();</div><div class='del'>-	raw_atomic_dec(&amp;desc-&gt;refs);</div><div class='add'>+	raw_atomic_dec(refs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline void *text_poke_addr(struct text_poke_loc *tp)</div><div class='add'>+static __always_inline void *text_poke_addr(const struct smp_text_poke_loc *tpl)</div><div class='ctx'> {</div><div class='del'>-	return _stext + tp-&gt;rel_addr;</div><div class='add'>+	return _stext + tpl-&gt;rel_addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __always_inline int patch_cmp(const void *key, const void *elt)</div><div class='add'>+static __always_inline int patch_cmp(const void *tpl_a, const void *tpl_b)</div><div class='ctx'> {</div><div class='del'>-	struct text_poke_loc *tp = (struct text_poke_loc *) elt;</div><div class='del'>-</div><div class='del'>-	if (key &lt; text_poke_addr(tp))</div><div class='add'>+	if (tpl_a &lt; text_poke_addr(tpl_b))</div><div class='ctx'> 		return -1;</div><div class='del'>-	if (key &gt; text_poke_addr(tp))</div><div class='add'>+	if (tpl_a &gt; text_poke_addr(tpl_b))</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-noinstr int poke_int3_handler(struct pt_regs *regs)</div><div class='add'>+noinstr int smp_text_poke_int3_handler(struct pt_regs *regs)</div><div class='ctx'> {</div><div class='del'>-	struct bp_patching_desc *desc;</div><div class='del'>-	struct text_poke_loc *tp;</div><div class='add'>+	struct smp_text_poke_loc *tpl;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	void *ip;</div><div class='ctx'> </div><div class='hunk'>@@ -2526,41 +2733,40 @@ noinstr int poke_int3_handler(struct pt_regs *regs)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Having observed our INT3 instruction, we now must observe</div><div class='del'>-	 * bp_desc with non-zero refcount:</div><div class='add'>+	 * text_poke_array with non-zero refcount:</div><div class='ctx'> 	 *</div><div class='del'>-	 *	bp_desc.refs = 1		INT3</div><div class='del'>-	 *	WMB				RMB</div><div class='del'>-	 *	write INT3			if (bp_desc.refs != 0)</div><div class='add'>+	 *	text_poke_array_refs = 1		INT3</div><div class='add'>+	 *	WMB			RMB</div><div class='add'>+	 *	write INT3		if (text_poke_array_refs != 0)</div><div class='ctx'> 	 */</div><div class='ctx'> 	smp_rmb();</div><div class='ctx'> </div><div class='del'>-	desc = try_get_desc();</div><div class='del'>-	if (!desc)</div><div class='add'>+	if (!try_get_text_poke_array())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Discount the INT3. See text_poke_bp_batch().</div><div class='add'>+	 * Discount the INT3. See smp_text_poke_batch_finish().</div><div class='ctx'> 	 */</div><div class='ctx'> 	ip = (void *) regs-&gt;ip - INT3_INSN_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Skip the binary search if there is a single member in the vector.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(desc-&gt;nr_entries &gt; 1)) {</div><div class='del'>-		tp = __inline_bsearch(ip, desc-&gt;vec, desc-&gt;nr_entries,</div><div class='del'>-				      sizeof(struct text_poke_loc),</div><div class='add'>+	if (unlikely(text_poke_array.nr_entries &gt; 1)) {</div><div class='add'>+		tpl = __inline_bsearch(ip, text_poke_array.vec, text_poke_array.nr_entries,</div><div class='add'>+				      sizeof(struct smp_text_poke_loc),</div><div class='ctx'> 				      patch_cmp);</div><div class='del'>-		if (!tp)</div><div class='add'>+		if (!tpl)</div><div class='ctx'> 			goto out_put;</div><div class='ctx'> 	} else {</div><div class='del'>-		tp = desc-&gt;vec;</div><div class='del'>-		if (text_poke_addr(tp) != ip)</div><div class='add'>+		tpl = text_poke_array.vec;</div><div class='add'>+		if (text_poke_addr(tpl) != ip)</div><div class='ctx'> 			goto out_put;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ip += tp-&gt;len;</div><div class='add'>+	ip += tpl-&gt;len;</div><div class='ctx'> </div><div class='del'>-	switch (tp-&gt;opcode) {</div><div class='add'>+	switch (tpl-&gt;opcode) {</div><div class='ctx'> 	case INT3_INSN_OPCODE:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Someone poked an explicit INT3, they'll want to handle it,</div><div class='hunk'>@@ -2573,16 +2779,16 @@ noinstr int poke_int3_handler(struct pt_regs *regs)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case CALL_INSN_OPCODE:</div><div class='del'>-		int3_emulate_call(regs, (long)ip + tp-&gt;disp);</div><div class='add'>+		int3_emulate_call(regs, (long)ip + tpl-&gt;disp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case JMP32_INSN_OPCODE:</div><div class='ctx'> 	case JMP8_INSN_OPCODE:</div><div class='del'>-		int3_emulate_jmp(regs, (long)ip + tp-&gt;disp);</div><div class='add'>+		int3_emulate_jmp(regs, (long)ip + tpl-&gt;disp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case 0x70 ... 0x7f: /* Jcc */</div><div class='del'>-		int3_emulate_jcc(regs, tp-&gt;opcode &amp; 0xf, (long)ip, tp-&gt;disp);</div><div class='add'>+		int3_emulate_jcc(regs, tpl-&gt;opcode &amp; 0xf, (long)ip, tpl-&gt;disp);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2592,51 +2798,50 @@ noinstr int poke_int3_handler(struct pt_regs *regs)</div><div class='ctx'> 	ret = 1;</div><div class='ctx'> </div><div class='ctx'> out_put:</div><div class='del'>-	put_desc();</div><div class='add'>+	put_text_poke_array();</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define TP_VEC_MAX (PAGE_SIZE / sizeof(struct text_poke_loc))</div><div class='del'>-static struct text_poke_loc tp_vec[TP_VEC_MAX];</div><div class='del'>-static int tp_vec_nr;</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * text_poke_bp_batch() -- update instructions on live kernel on SMP</div><div class='del'>- * @tp:			vector of instructions to patch</div><div class='del'>- * @nr_entries:		number of entries in the vector</div><div class='add'>+ * smp_text_poke_batch_finish() -- update instructions on live kernel on SMP</div><div class='ctx'>  *</div><div class='del'>- * Modify multi-byte instruction by using int3 breakpoint on SMP.</div><div class='del'>- * We completely avoid stop_machine() here, and achieve the</div><div class='del'>- * synchronization using int3 breakpoint.</div><div class='add'>+ * Input state:</div><div class='add'>+ *  text_poke_array.vec: vector of instructions to patch</div><div class='add'>+ *  text_poke_array.nr_entries: number of entries in the vector</div><div class='add'>+ *</div><div class='add'>+ * Modify multi-byte instructions by using INT3 breakpoints on SMP.</div><div class='add'>+ * We completely avoid using stop_machine() here, and achieve the</div><div class='add'>+ * synchronization using INT3 breakpoints and SMP cross-calls.</div><div class='ctx'>  *</div><div class='ctx'>  * The way it is done:</div><div class='ctx'>  *	- For each entry in the vector:</div><div class='del'>- *		- add a int3 trap to the address that will be patched</div><div class='del'>- *	- sync cores</div><div class='add'>+ *		- add an INT3 trap to the address that will be patched</div><div class='add'>+ *	- SMP sync all CPUs</div><div class='ctx'>  *	- For each entry in the vector:</div><div class='ctx'>  *		- update all but the first byte of the patched range</div><div class='del'>- *	- sync cores</div><div class='add'>+ *	- SMP sync all CPUs</div><div class='ctx'>  *	- For each entry in the vector:</div><div class='del'>- *		- replace the first byte (int3) by the first byte of</div><div class='add'>+ *		- replace the first byte (INT3) by the first byte of the</div><div class='ctx'>  *		  replacing opcode</div><div class='del'>- *	- sync cores</div><div class='add'>+ *	- SMP sync all CPUs</div><div class='ctx'>  */</div><div class='del'>-static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries)</div><div class='add'>+void smp_text_poke_batch_finish(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char int3 = INT3_INSN_OPCODE;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int do_sync;</div><div class='ctx'> </div><div class='del'>-	lockdep_assert_held(&amp;text_mutex);</div><div class='add'>+	if (!text_poke_array.nr_entries)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	bp_desc.vec = tp;</div><div class='del'>-	bp_desc.nr_entries = nr_entries;</div><div class='add'>+	lockdep_assert_held(&amp;text_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Corresponds to the implicit memory barrier in try_get_desc() to</div><div class='del'>-	 * ensure reading a non-zero refcount provides up to date bp_desc data.</div><div class='add'>+	 * Corresponds to the implicit memory barrier in try_get_text_poke_array() to</div><div class='add'>+	 * ensure reading a non-zero refcount provides up to date text_poke_array data.</div><div class='ctx'> 	 */</div><div class='del'>-	atomic_set_release(&amp;bp_desc.refs, 1);</div><div class='add'>+	for_each_possible_cpu(i)</div><div class='add'>+		atomic_set_release(per_cpu_ptr(&amp;text_poke_array_refs, i), 1);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Function tracing can enable thousands of places that need to be</div><div class='hunk'>@@ -2649,33 +2854,33 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries</div><div class='ctx'> 	cond_resched();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Corresponding read barrier in int3 notifier for making sure the</div><div class='del'>-	 * nr_entries and handler are correctly ordered wrt. patching.</div><div class='add'>+	 * Corresponding read barrier in INT3 notifier for making sure the</div><div class='add'>+	 * text_poke_array.nr_entries and handler are correctly ordered wrt. patching.</div><div class='ctx'> 	 */</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * First step: add a int3 trap to the address that will be patched.</div><div class='add'>+	 * First step: add a INT3 trap to the address that will be patched.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; nr_entries; i++) {</div><div class='del'>-		tp[i].old = *(u8 *)text_poke_addr(&amp;tp[i]);</div><div class='del'>-		text_poke(text_poke_addr(&amp;tp[i]), &amp;int3, INT3_INSN_SIZE);</div><div class='add'>+	for (i = 0; i &lt; text_poke_array.nr_entries; i++) {</div><div class='add'>+		text_poke_array.vec[i].old = *(u8 *)text_poke_addr(&amp;text_poke_array.vec[i]);</div><div class='add'>+		text_poke(text_poke_addr(&amp;text_poke_array.vec[i]), &amp;int3, INT3_INSN_SIZE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	text_poke_sync();</div><div class='add'>+	smp_text_poke_sync_each_cpu();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Second step: update all but the first byte of the patched range.</div><div class='ctx'> 	 */</div><div class='del'>-	for (do_sync = 0, i = 0; i &lt; nr_entries; i++) {</div><div class='del'>-		u8 old[POKE_MAX_OPCODE_SIZE+1] = { tp[i].old, };</div><div class='del'>-		u8 _new[POKE_MAX_OPCODE_SIZE+1];</div><div class='del'>-		const u8 *new = tp[i].text;</div><div class='del'>-		int len = tp[i].len;</div><div class='add'>+	for (do_sync = 0, i = 0; i &lt; text_poke_array.nr_entries; i++) {</div><div class='add'>+		u8 old[TEXT_POKE_MAX_OPCODE_SIZE+1] = { text_poke_array.vec[i].old, };</div><div class='add'>+		u8 _new[TEXT_POKE_MAX_OPCODE_SIZE+1];</div><div class='add'>+		const u8 *new = text_poke_array.vec[i].text;</div><div class='add'>+		int len = text_poke_array.vec[i].len;</div><div class='ctx'> </div><div class='ctx'> 		if (len - INT3_INSN_SIZE &gt; 0) {</div><div class='ctx'> 			memcpy(old + INT3_INSN_SIZE,</div><div class='del'>-			       text_poke_addr(&amp;tp[i]) + INT3_INSN_SIZE,</div><div class='add'>+			       text_poke_addr(&amp;text_poke_array.vec[i]) + INT3_INSN_SIZE,</div><div class='ctx'> 			       len - INT3_INSN_SIZE);</div><div class='ctx'> </div><div class='ctx'> 			if (len == 6) {</div><div class='hunk'>@@ -2684,7 +2889,7 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries</div><div class='ctx'> 				new = _new;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			text_poke(text_poke_addr(&amp;tp[i]) + INT3_INSN_SIZE,</div><div class='add'>+			text_poke(text_poke_addr(&amp;text_poke_array.vec[i]) + INT3_INSN_SIZE,</div><div class='ctx'> 				  new + INT3_INSN_SIZE,</div><div class='ctx'> 				  len - INT3_INSN_SIZE);</div><div class='ctx'> </div><div class='hunk'>@@ -2715,7 +2920,7 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries</div><div class='ctx'> 		 * The old instruction is recorded so that the event can be</div><div class='ctx'> 		 * processed forwards or backwards.</div><div class='ctx'> 		 */</div><div class='del'>-		perf_event_text_poke(text_poke_addr(&amp;tp[i]), old, len, new, len);</div><div class='add'>+		perf_event_text_poke(text_poke_addr(&amp;text_poke_array.vec[i]), old, len, new, len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (do_sync) {</div><div class='hunk'>@@ -2724,63 +2929,79 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries</div><div class='ctx'> 		 * not necessary and we'd be safe even without it. But</div><div class='ctx'> 		 * better safe than sorry (plus there's not only Intel).</div><div class='ctx'> 		 */</div><div class='del'>-		text_poke_sync();</div><div class='add'>+		smp_text_poke_sync_each_cpu();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Third step: replace the first byte (int3) by the first byte of</div><div class='add'>+	 * Third step: replace the first byte (INT3) by the first byte of the</div><div class='ctx'> 	 * replacing opcode.</div><div class='ctx'> 	 */</div><div class='del'>-	for (do_sync = 0, i = 0; i &lt; nr_entries; i++) {</div><div class='del'>-		u8 byte = tp[i].text[0];</div><div class='add'>+	for (do_sync = 0, i = 0; i &lt; text_poke_array.nr_entries; i++) {</div><div class='add'>+		u8 byte = text_poke_array.vec[i].text[0];</div><div class='ctx'> </div><div class='del'>-		if (tp[i].len == 6)</div><div class='add'>+		if (text_poke_array.vec[i].len == 6)</div><div class='ctx'> 			byte = 0x0f;</div><div class='ctx'> </div><div class='ctx'> 		if (byte == INT3_INSN_OPCODE)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		text_poke(text_poke_addr(&amp;tp[i]), &amp;byte, INT3_INSN_SIZE);</div><div class='add'>+		text_poke(text_poke_addr(&amp;text_poke_array.vec[i]), &amp;byte, INT3_INSN_SIZE);</div><div class='ctx'> 		do_sync++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (do_sync)</div><div class='del'>-		text_poke_sync();</div><div class='add'>+		smp_text_poke_sync_each_cpu();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Remove and wait for refs to be zero.</div><div class='add'>+	 *</div><div class='add'>+	 * Notably, if after step-3 above the INT3 got removed, then the</div><div class='add'>+	 * smp_text_poke_sync_each_cpu() will have serialized against any running INT3</div><div class='add'>+	 * handlers and the below spin-wait will not happen.</div><div class='add'>+	 *</div><div class='add'>+	 * IOW. unless the replacement instruction is INT3, this case goes</div><div class='add'>+	 * unused.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!atomic_dec_and_test(&amp;bp_desc.refs))</div><div class='del'>-		atomic_cond_read_acquire(&amp;bp_desc.refs, !VAL);</div><div class='add'>+	for_each_possible_cpu(i) {</div><div class='add'>+		atomic_t *refs = per_cpu_ptr(&amp;text_poke_array_refs, i);</div><div class='add'>+</div><div class='add'>+		if (unlikely(!atomic_dec_and_test(refs)))</div><div class='add'>+			atomic_cond_read_acquire(refs, !VAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* They are all completed: */</div><div class='add'>+	text_poke_array.nr_entries = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,</div><div class='del'>-			       const void *opcode, size_t len, const void *emulate)</div><div class='add'>+static void __smp_text_poke_batch_add(void *addr, const void *opcode, size_t len, const void *emulate)</div><div class='ctx'> {</div><div class='add'>+	struct smp_text_poke_loc *tpl;</div><div class='ctx'> 	struct insn insn;</div><div class='ctx'> 	int ret, i = 0;</div><div class='ctx'> </div><div class='add'>+	tpl = &amp;text_poke_array.vec[text_poke_array.nr_entries++];</div><div class='add'>+</div><div class='ctx'> 	if (len == 6)</div><div class='ctx'> 		i = 1;</div><div class='del'>-	memcpy((void *)tp-&gt;text, opcode+i, len-i);</div><div class='add'>+	memcpy((void *)tpl-&gt;text, opcode+i, len-i);</div><div class='ctx'> 	if (!emulate)</div><div class='ctx'> 		emulate = opcode;</div><div class='ctx'> </div><div class='ctx'> 	ret = insn_decode_kernel(&amp;insn, emulate);</div><div class='ctx'> 	BUG_ON(ret &lt; 0);</div><div class='ctx'> </div><div class='del'>-	tp-&gt;rel_addr = addr - (void *)_stext;</div><div class='del'>-	tp-&gt;len = len;</div><div class='del'>-	tp-&gt;opcode = insn.opcode.bytes[0];</div><div class='add'>+	tpl-&gt;rel_addr = addr - (void *)_stext;</div><div class='add'>+	tpl-&gt;len = len;</div><div class='add'>+	tpl-&gt;opcode = insn.opcode.bytes[0];</div><div class='ctx'> </div><div class='ctx'> 	if (is_jcc32(&amp;insn)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Map Jcc.d32 onto Jcc.d8 and use len to distinguish.</div><div class='ctx'> 		 */</div><div class='del'>-		tp-&gt;opcode = insn.opcode.bytes[1] - 0x10;</div><div class='add'>+		tpl-&gt;opcode = insn.opcode.bytes[1] - 0x10;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (tp-&gt;opcode) {</div><div class='add'>+	switch (tpl-&gt;opcode) {</div><div class='ctx'> 	case RET_INSN_OPCODE:</div><div class='ctx'> 	case JMP32_INSN_OPCODE:</div><div class='ctx'> 	case JMP8_INSN_OPCODE:</div><div class='hunk'>@@ -2789,14 +3010,14 @@ static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,</div><div class='ctx'> 		 * next instruction can be padded with INT3.</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (i = insn.length; i &lt; len; i++)</div><div class='del'>-			BUG_ON(tp-&gt;text[i] != INT3_INSN_OPCODE);</div><div class='add'>+			BUG_ON(tpl-&gt;text[i] != INT3_INSN_OPCODE);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		BUG_ON(len != insn.length);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (tp-&gt;opcode) {</div><div class='add'>+	switch (tpl-&gt;opcode) {</div><div class='ctx'> 	case INT3_INSN_OPCODE:</div><div class='ctx'> 	case RET_INSN_OPCODE:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2805,21 +3026,21 @@ static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,</div><div class='ctx'> 	case JMP32_INSN_OPCODE:</div><div class='ctx'> 	case JMP8_INSN_OPCODE:</div><div class='ctx'> 	case 0x70 ... 0x7f: /* Jcc */</div><div class='del'>-		tp-&gt;disp = insn.immediate.value;</div><div class='add'>+		tpl-&gt;disp = insn.immediate.value;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default: /* assume NOP */</div><div class='ctx'> 		switch (len) {</div><div class='ctx'> 		case 2: /* NOP2 -- emulate as JMP8+0 */</div><div class='ctx'> 			BUG_ON(memcmp(emulate, x86_nops[len], len));</div><div class='del'>-			tp-&gt;opcode = JMP8_INSN_OPCODE;</div><div class='del'>-			tp-&gt;disp = 0;</div><div class='add'>+			tpl-&gt;opcode = JMP8_INSN_OPCODE;</div><div class='add'>+			tpl-&gt;disp = 0;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case 5: /* NOP5 -- emulate as JMP32+0 */</div><div class='ctx'> 			BUG_ON(memcmp(emulate, x86_nops[len], len));</div><div class='del'>-			tp-&gt;opcode = JMP32_INSN_OPCODE;</div><div class='del'>-			tp-&gt;disp = 0;</div><div class='add'>+			tpl-&gt;opcode = JMP32_INSN_OPCODE;</div><div class='add'>+			tpl-&gt;disp = 0;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		default: /* unknown instruction */</div><div class='hunk'>@@ -2830,51 +3051,50 @@ static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * We hard rely on the tp_vec being ordered; ensure this is so by flushing</div><div class='add'>+ * We hard rely on the text_poke_array.vec being ordered; ensure this is so by flushing</div><div class='ctx'>  * early if needed.</div><div class='ctx'>  */</div><div class='del'>-static bool tp_order_fail(void *addr)</div><div class='add'>+static bool text_poke_addr_ordered(void *addr)</div><div class='ctx'> {</div><div class='del'>-	struct text_poke_loc *tp;</div><div class='del'>-</div><div class='del'>-	if (!tp_vec_nr)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (!addr) /* force */</div><div class='del'>-		return true;</div><div class='add'>+	WARN_ON_ONCE(!addr);</div><div class='ctx'> </div><div class='del'>-	tp = &amp;tp_vec[tp_vec_nr - 1];</div><div class='del'>-	if ((unsigned long)text_poke_addr(tp) &gt; (unsigned long)addr)</div><div class='add'>+	if (!text_poke_array.nr_entries)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void text_poke_flush(void *addr)</div><div class='del'>-{</div><div class='del'>-	if (tp_vec_nr == TP_VEC_MAX || tp_order_fail(addr)) {</div><div class='del'>-		text_poke_bp_batch(tp_vec, tp_vec_nr);</div><div class='del'>-		tp_vec_nr = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+	/*</div><div class='add'>+	 * If the last current entry's address is higher than the</div><div class='add'>+	 * new entry's address we'd like to add, then ordering</div><div class='add'>+	 * is violated and we must first flush all pending patching</div><div class='add'>+	 * requests:</div><div class='add'>+	 */</div><div class='add'>+	if (text_poke_addr(text_poke_array.vec + text_poke_array.nr_entries-1) &gt; addr)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-void text_poke_finish(void)</div><div class='del'>-{</div><div class='del'>-	text_poke_flush(NULL);</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __ref text_poke_queue(void *addr, const void *opcode, size_t len, const void *emulate)</div><div class='add'>+/**</div><div class='add'>+ * smp_text_poke_batch_add() -- update instruction on live kernel on SMP, batched</div><div class='add'>+ * @addr:	address to patch</div><div class='add'>+ * @opcode:	opcode of new instruction</div><div class='add'>+ * @len:	length to copy</div><div class='add'>+ * @emulate:	instruction to be emulated</div><div class='add'>+ *</div><div class='add'>+ * Add a new instruction to the current queue of to-be-patched instructions</div><div class='add'>+ * the kernel maintains. The patching request will not be executed immediately,</div><div class='add'>+ * but becomes part of an array of patching requests, optimized for batched</div><div class='add'>+ * execution. All pending patching requests will be executed on the next</div><div class='add'>+ * smp_text_poke_batch_finish() call.</div><div class='add'>+ */</div><div class='add'>+void __ref smp_text_poke_batch_add(void *addr, const void *opcode, size_t len, const void *emulate)</div><div class='ctx'> {</div><div class='del'>-	struct text_poke_loc *tp;</div><div class='del'>-</div><div class='del'>-	text_poke_flush(addr);</div><div class='del'>-</div><div class='del'>-	tp = &amp;tp_vec[tp_vec_nr++];</div><div class='del'>-	text_poke_loc_init(tp, addr, opcode, len, emulate);</div><div class='add'>+	if (text_poke_array.nr_entries == TEXT_POKE_ARRAY_MAX || !text_poke_addr_ordered(addr))</div><div class='add'>+		smp_text_poke_batch_finish();</div><div class='add'>+	__smp_text_poke_batch_add(addr, opcode, len, emulate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * text_poke_bp() -- update instructions on live kernel on SMP</div><div class='add'>+ * smp_text_poke_single() -- update instruction on live kernel on SMP immediately</div><div class='ctx'>  * @addr:	address to patch</div><div class='ctx'>  * @opcode:	opcode of new instruction</div><div class='ctx'>  * @len:	length to copy</div><div class='hunk'>@@ -2882,12 +3102,11 @@ void __ref text_poke_queue(void *addr, const void *opcode, size_t len, const voi</div><div class='ctx'>  *</div><div class='ctx'>  * Update a single instruction with the vector in the stack, avoiding</div><div class='ctx'>  * dynamically allocated memory. This function should be used when it is</div><div class='del'>- * not possible to allocate memory.</div><div class='add'>+ * not possible to allocate memory for a vector. The single instruction</div><div class='add'>+ * is patched in immediately.</div><div class='ctx'>  */</div><div class='del'>-void __ref text_poke_bp(void *addr, const void *opcode, size_t len, const void *emulate)</div><div class='add'>+void __ref smp_text_poke_single(void *addr, const void *opcode, size_t len, const void *emulate)</div><div class='ctx'> {</div><div class='del'>-	struct text_poke_loc tp;</div><div class='del'>-</div><div class='del'>-	text_poke_loc_init(&amp;tp, addr, opcode, len, emulate);</div><div class='del'>-	text_poke_bp_batch(&amp;tp, 1);</div><div class='add'>+	__smp_text_poke_batch_add(addr, opcode, len, emulate);</div><div class='add'>+	smp_text_poke_batch_finish();</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/amd_gart_64.c b/arch/x86/kernel/amd_gart_64.c<br/>index c884deca839b..3485d419c2f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_gart_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/amd_gart_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_gart_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/amd_gart_64.c</a></div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> #include &lt;asm/gart.h&gt;</div><div class='ctx'> #include &lt;asm/set_memory.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> </div><div class='ctx'> static unsigned long iommu_bus_base;	/* GART remapping area (physical) */</div><div class='head'>diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c<br/>index 6d12a9b69432..c1acead6227a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_nb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/amd_nb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_nb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/amd_nb.c</a></div><div class='hunk'>@@ -13,7 +13,9 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/pci_ids.h&gt;</div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> static u32 *flush_words;</div><div class='ctx'> </div><div class='hunk'>@@ -91,10 +93,7 @@ static int amd_cache_northbridges(void)</div><div class='ctx'> 	if (amd_gart_present())</div><div class='ctx'> 		amd_northbridges.flags |= AMD_NB_GART;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Check for L3 cache presence.</div><div class='del'>-	 */</div><div class='del'>-	if (!cpuid_edx(0x80000006))</div><div class='add'>+	if (!cpuid_amd_hygon_has_l3_cache())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -151,7 +150,7 @@ struct resource *amd_get_mmconfig_range(struct resource *res)</div><div class='ctx'> </div><div class='ctx'> 	/* Assume CPUs from Fam10h have mmconfig, although not all VMs do */</div><div class='ctx'> 	if (boot_cpu_data.x86 &lt; 0x10 ||</div><div class='del'>-	    rdmsrl_safe(MSR_FAM10H_MMIO_CONF_BASE, &amp;msr))</div><div class='add'>+	    rdmsrq_safe(MSR_FAM10H_MMIO_CONF_BASE, &amp;msr))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* mmconfig is not enabled */</div><div class='head'>diff --git a/arch/x86/kernel/amd_node.c b/arch/x86/kernel/amd_node.c<br/>index b670fa85c61b..a40176b62eb5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_node.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/amd_node.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/amd_node.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/amd_node.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;asm/amd_node.h&gt;</div><div class='add'>+#include &lt;asm/amd/node.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * AMD Nodes are a physical collection of I/O devices within an SoC. There can be one</div><div class='head'>diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c<br/>index 89c0c8a3fc7e..769321185a08 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/aperture_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/aperture_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/aperture_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/aperture_64.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> #include &lt;asm/gart.h&gt;</div><div class='ctx'> #include &lt;asm/pci-direct.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c<br/>index 62584a347931..d73ba5a7b623 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/apic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/apic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/apic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/apic/apic.c</a></div><div class='hunk'>@@ -59,6 +59,7 @@</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/tsc.h&gt;</div><div class='ctx'> #include &lt;asm/hypervisor.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='hunk'>@@ -425,7 +426,7 @@ static int lapic_next_deadline(unsigned long delta,</div><div class='ctx'> 	weak_wrmsr_fence();</div><div class='ctx'> </div><div class='ctx'> 	tsc = rdtsc();</div><div class='del'>-	wrmsrl(MSR_IA32_TSC_DEADLINE, tsc + (((u64) delta) * TSC_DIVISOR));</div><div class='add'>+	wrmsrq(MSR_IA32_TSC_DEADLINE, tsc + (((u64) delta) * TSC_DIVISOR));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -449,7 +450,7 @@ static int lapic_timer_shutdown(struct clock_event_device *evt)</div><div class='ctx'> 	 * the timer _and_ zero the counter registers:</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (v &amp; APIC_LVT_TIMER_TSCDEADLINE)</div><div class='del'>-		wrmsrl(MSR_IA32_TSC_DEADLINE, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_TSC_DEADLINE, 0);</div><div class='ctx'> 	else</div><div class='ctx'> 		apic_write(APIC_TMICT, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -1694,7 +1695,7 @@ static bool x2apic_hw_locked(void)</div><div class='ctx'> </div><div class='ctx'> 	x86_arch_cap_msr = x86_read_arch_cap_msr();</div><div class='ctx'> 	if (x86_arch_cap_msr &amp; ARCH_CAP_XAPIC_DISABLE) {</div><div class='del'>-		rdmsrl(MSR_IA32_XAPIC_DISABLE_STATUS, msr);</div><div class='add'>+		rdmsrq(MSR_IA32_XAPIC_DISABLE_STATUS, msr);</div><div class='ctx'> 		return (msr &amp; LEGACY_XAPIC_DISABLED);</div><div class='ctx'> 	}</div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -1707,12 +1708,12 @@ static void __x2apic_disable(void)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_APIC))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_APICBASE, msr);</div><div class='add'>+	rdmsrq(MSR_IA32_APICBASE, msr);</div><div class='ctx'> 	if (!(msr &amp; X2APIC_ENABLE))</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Disable xapic and x2apic first and then reenable xapic mode */</div><div class='del'>-	wrmsrl(MSR_IA32_APICBASE, msr &amp; ~(X2APIC_ENABLE | XAPIC_ENABLE));</div><div class='del'>-	wrmsrl(MSR_IA32_APICBASE, msr &amp; ~X2APIC_ENABLE);</div><div class='add'>+	wrmsrq(MSR_IA32_APICBASE, msr &amp; ~(X2APIC_ENABLE | XAPIC_ENABLE));</div><div class='add'>+	wrmsrq(MSR_IA32_APICBASE, msr &amp; ~X2APIC_ENABLE);</div><div class='ctx'> 	printk_once(KERN_INFO "x2apic disabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1720,10 +1721,10 @@ static void __x2apic_enable(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_APICBASE, msr);</div><div class='add'>+	rdmsrq(MSR_IA32_APICBASE, msr);</div><div class='ctx'> 	if (msr &amp; X2APIC_ENABLE)</div><div class='ctx'> 		return;</div><div class='del'>-	wrmsrl(MSR_IA32_APICBASE, msr | X2APIC_ENABLE);</div><div class='add'>+	wrmsrq(MSR_IA32_APICBASE, msr | X2APIC_ENABLE);</div><div class='ctx'> 	printk_once(KERN_INFO "x2apic enabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c<br/>index 16410f087b7a..e272bc7fdc8e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/apic_numachip.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/apic_numachip.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/apic_numachip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/apic/apic_numachip.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/numachip/numachip.h&gt;</div><div class='ctx'> #include &lt;asm/numachip/numachip_csr.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -31,7 +32,7 @@ static u32 numachip1_get_apic_id(u32 x)</div><div class='ctx'> 	unsigned int id = (x &gt;&gt; 24) &amp; 0xff;</div><div class='ctx'> </div><div class='ctx'> 	if (static_cpu_has(X86_FEATURE_NODEID_MSR)) {</div><div class='del'>-		rdmsrl(MSR_FAM10H_NODE_ID, value);</div><div class='add'>+		rdmsrq(MSR_FAM10H_NODE_ID, value);</div><div class='ctx'> 		id |= (value &lt;&lt; 2) &amp; 0xff00;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +43,7 @@ static u32 numachip2_get_apic_id(u32 x)</div><div class='ctx'> {</div><div class='ctx'> 	u64 mcfg;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_FAM10H_MMIO_CONF_BASE, mcfg);</div><div class='add'>+	rdmsrq(MSR_FAM10H_MMIO_CONF_BASE, mcfg);</div><div class='ctx'> 	return ((mcfg &gt;&gt; (28 - 8)) &amp; 0xfff00) | (x &gt;&gt; 24);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -150,7 +151,7 @@ static void fixup_cpu_id(struct cpuinfo_x86 *c, int node)</div><div class='ctx'> </div><div class='ctx'> 	/* Account for nodes per socket in multi-core-module processors */</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_NODEID_MSR)) {</div><div class='del'>-		rdmsrl(MSR_FAM10H_NODE_ID, val);</div><div class='add'>+		rdmsrq(MSR_FAM10H_NODE_ID, val);</div><div class='ctx'> 		nodes = ((val &gt;&gt; 3) &amp; 7) + 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c<br/>index eebc360ed1bb..5ba2feb2c04c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/io_apic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/io_apic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/io_apic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/apic/io_apic.c</a></div><div class='hunk'>@@ -1486,7 +1486,7 @@ static void __init delay_with_tsc(void)</div><div class='ctx'> 	 * 1 GHz == 40 jiffies</div><div class='ctx'> 	 */</div><div class='ctx'> 	do {</div><div class='del'>-		rep_nop();</div><div class='add'>+		native_pause();</div><div class='ctx'> 		now = rdtsc();</div><div class='ctx'> 	} while ((now - start) &lt; 40000000000ULL / HZ &amp;&amp;	time_before_eq(jiffies, end));</div><div class='ctx'> }</div><div class='hunk'>@@ -2225,7 +2225,7 @@ static int mp_irqdomain_create(int ioapic)</div><div class='ctx'> </div><div class='ctx'> 	/* Handle device tree enumerated APICs proper */</div><div class='ctx'> 	if (cfg-&gt;dev) {</div><div class='del'>-		fn = of_node_to_fwnode(cfg-&gt;dev);</div><div class='add'>+		fn = of_fwnode_handle(cfg-&gt;dev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		fn = irq_domain_alloc_named_id_fwnode("IO-APIC", mpc_ioapic_id(ioapic));</div><div class='ctx'> 		if (!fn)</div><div class='head'>diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c<br/>index fee42a73d64a..93069b13d3af 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/vector.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/apic/vector.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/apic/vector.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/apic/vector.c</a></div><div class='hunk'>@@ -864,7 +864,7 @@ void lapic_offline(void)</div><div class='ctx'> 	__vector_cleanup(cl, false);</div><div class='ctx'> </div><div class='ctx'> 	irq_matrix_offline(vector_matrix);</div><div class='del'>-	WARN_ON_ONCE(try_to_del_timer_sync(&amp;cl-&gt;timer) &lt; 0);</div><div class='add'>+	WARN_ON_ONCE(timer_delete_sync_try(&amp;cl-&gt;timer) &lt; 0);</div><div class='ctx'> 	WARN_ON_ONCE(!hlist_empty(&amp;cl-&gt;head));</div><div class='ctx'> </div><div class='ctx'> 	unlock_vector_lock();</div><div class='head'>diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c<br/>index ad4ea6fb3b6c..6259b474073b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/asm-offsets.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/asm-offsets.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/asm-offsets.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/asm-offsets.c</a></div><div class='hunk'>@@ -33,6 +33,14 @@</div><div class='ctx'> </div><div class='ctx'> static void __used common(void)</div><div class='ctx'> {</div><div class='add'>+	OFFSET(CPUINFO_x86, cpuinfo_x86, x86);</div><div class='add'>+	OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor);</div><div class='add'>+	OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);</div><div class='add'>+	OFFSET(CPUINFO_x86_stepping, cpuinfo_x86, x86_stepping);</div><div class='add'>+	OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level);</div><div class='add'>+	OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability);</div><div class='add'>+	OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);</div><div class='add'>+</div><div class='ctx'> 	BLANK();</div><div class='ctx'> 	OFFSET(TASK_threadsp, task_struct, thread.sp);</div><div class='ctx'> #ifdef CONFIG_STACKPROTECTOR</div><div class='head'>diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c<br/>index 2b411cd00a4e..e0a292db97b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/asm-offsets_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/asm-offsets_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/asm-offsets_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/asm-offsets_32.c</a></div><div class='hunk'>@@ -12,15 +12,6 @@ void foo(void);</div><div class='ctx'> </div><div class='ctx'> void foo(void)</div><div class='ctx'> {</div><div class='del'>-	OFFSET(CPUINFO_x86, cpuinfo_x86, x86);</div><div class='del'>-	OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor);</div><div class='del'>-	OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model);</div><div class='del'>-	OFFSET(CPUINFO_x86_stepping, cpuinfo_x86, x86_stepping);</div><div class='del'>-	OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level);</div><div class='del'>-	OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability);</div><div class='del'>-	OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id);</div><div class='del'>-	BLANK();</div><div class='del'>-</div><div class='ctx'> 	OFFSET(PT_EBX, pt_regs, bx);</div><div class='ctx'> 	OFFSET(PT_ECX, pt_regs, cx);</div><div class='ctx'> 	OFFSET(PT_EDX, pt_regs, dx);</div><div class='head'>diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c<br/>index d86d7d6e750c..a951333c5995 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/callthunks.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/callthunks.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/callthunks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/callthunks.c</a></div><div class='hunk'>@@ -185,7 +185,7 @@ static void *patch_dest(void *dest, bool direct)</div><div class='ctx'> 	u8 *pad = dest - tsize;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(insn_buff, skl_call_thunk_template, tsize);</div><div class='del'>-	apply_relocation(insn_buff, pad, tsize, skl_call_thunk_template, tsize);</div><div class='add'>+	text_poke_apply_relocation(insn_buff, pad, tsize, skl_call_thunk_template, tsize);</div><div class='ctx'> </div><div class='ctx'> 	/* Already patched? */</div><div class='ctx'> 	if (!bcmp(pad, insn_buff, tsize))</div><div class='hunk'>@@ -294,7 +294,7 @@ static bool is_callthunk(void *addr)</div><div class='ctx'> 	pad = (void *)(dest - tmpl_size);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(insn_buff, skl_call_thunk_template, tmpl_size);</div><div class='del'>-	apply_relocation(insn_buff, pad, tmpl_size, skl_call_thunk_template, tmpl_size);</div><div class='add'>+	text_poke_apply_relocation(insn_buff, pad, tmpl_size, skl_call_thunk_template, tmpl_size);</div><div class='ctx'> </div><div class='ctx'> 	return !bcmp(pad, insn_buff, tmpl_size);</div><div class='ctx'> }</div><div class='hunk'>@@ -312,7 +312,7 @@ int x86_call_depth_emit_accounting(u8 **pprog, void *func, void *ip)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(insn_buff, skl_call_thunk_template, tmpl_size);</div><div class='del'>-	apply_relocation(insn_buff, ip, tmpl_size, skl_call_thunk_template, tmpl_size);</div><div class='add'>+	text_poke_apply_relocation(insn_buff, ip, tmpl_size, skl_call_thunk_template, tmpl_size);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(*pprog, insn_buff, tmpl_size);</div><div class='ctx'> 	*pprog += tmpl_size;</div><div class='head'>diff --git a/arch/x86/kernel/cet.c b/arch/x86/kernel/cet.c<br/>index 303bf74d175b..99444409c026 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cet.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cet.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cet.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/bugs.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum cp_error_code {</div><div class='hunk'>@@ -55,7 +56,7 @@ static void do_user_cp_fault(struct pt_regs *regs, unsigned long error_code)</div><div class='ctx'> 	 * will be whatever is live in userspace. So read the SSP before enabling</div><div class='ctx'> 	 * interrupts so locking the fpregs to do it later is not required.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_IA32_PL3_SSP, ssp);</div><div class='add'>+	rdmsrq(MSR_IA32_PL3_SSP, ssp);</div><div class='ctx'> </div><div class='ctx'> 	cond_local_irq_enable(regs);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile<br/>index 4efdf5c2efc8..1e26179ff18c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/Makefile</a></div><div class='hunk'>@@ -24,7 +24,7 @@ obj-y			+= rdrand.o</div><div class='ctx'> obj-y			+= match.o</div><div class='ctx'> obj-y			+= bugs.o</div><div class='ctx'> obj-y			+= aperfmperf.o</div><div class='del'>-obj-y			+= cpuid-deps.o</div><div class='add'>+obj-y			+= cpuid-deps.o cpuid_0x2_table.o</div><div class='ctx'> obj-y			+= umwait.o</div><div class='ctx'> obj-y 			+= capflags.o powerflags.o</div><div class='ctx'> </div><div class='hunk'>@@ -38,6 +38,9 @@ obj-y					+= intel.o tsx.o</div><div class='ctx'> obj-$(CONFIG_PM)			+= intel_epb.o</div><div class='ctx'> endif</div><div class='ctx'> obj-$(CONFIG_CPU_SUP_AMD)		+= amd.o</div><div class='add'>+ifeq ($(CONFIG_AMD_NB)$(CONFIG_SYSFS),yy)</div><div class='add'>+obj-y					+= amd_cache_disable.o</div><div class='add'>+endif</div><div class='ctx'> obj-$(CONFIG_CPU_SUP_HYGON)		+= hygon.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUP_CYRIX_32)		+= cyrix.o</div><div class='ctx'> obj-$(CONFIG_CPU_SUP_CENTAUR)		+= centaur.o</div><div class='head'>diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c<br/>index 79569f72b8ee..93da466dfe2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/amd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/amd.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/sched/clock.h&gt;</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='ctx'> #include &lt;linux/topology.h&gt;</div><div class='add'>+#include &lt;asm/amd/fch.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/cacheinfo.h&gt;</div><div class='hunk'>@@ -21,6 +22,7 @@</div><div class='ctx'> #include &lt;asm/delay.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/resctrl.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='hunk'>@@ -31,7 +33,7 @@</div><div class='ctx'> </div><div class='ctx'> u16 invlpgb_count_max __ro_after_init;</div><div class='ctx'> </div><div class='del'>-static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)</div><div class='add'>+static inline int rdmsrq_amd_safe(unsigned msr, u64 *p)</div><div class='ctx'> {</div><div class='ctx'> 	u32 gprs[8] = { 0 };</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -49,7 +51,7 @@ static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)</div><div class='add'>+static inline int wrmsrq_amd_safe(unsigned msr, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	u32 gprs[8] = { 0 };</div><div class='ctx'> </div><div class='hunk'>@@ -383,7 +385,7 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 		    (c-&gt;x86 == 0x10 &amp;&amp; c-&gt;x86_model &gt;= 0x2)) {</div><div class='ctx'> 			u64 val;</div><div class='ctx'> </div><div class='del'>-			rdmsrl(MSR_K7_HWCR, val);</div><div class='add'>+			rdmsrq(MSR_K7_HWCR, val);</div><div class='ctx'> 			if (!(val &amp; BIT(24)))</div><div class='ctx'> 				pr_warn(FW_BUG "TSC doesn't count with P0 frequency!\n");</div><div class='ctx'> 		}</div><div class='hunk'>@@ -422,7 +424,7 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 		 * Try to cache the base value so further operations can</div><div class='ctx'> 		 * avoid RMW. If that faults, do not enable SSBD.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &amp;x86_amd_ls_cfg_base)) {</div><div class='add'>+		if (!rdmsrq_safe(MSR_AMD64_LS_CFG, &amp;x86_amd_ls_cfg_base)) {</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_LS_CFG_SSBD);</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_SSBD);</div><div class='ctx'> 			x86_amd_ls_cfg_ssbd_mask = 1ULL &lt;&lt; bit;</div><div class='hunk'>@@ -472,6 +474,11 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 		case 0x60 ... 0x7f:</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_ZEN5);</div><div class='ctx'> 			break;</div><div class='add'>+		case 0x50 ... 0x5f:</div><div class='add'>+		case 0x90 ... 0xaf:</div><div class='add'>+		case 0xc0 ... 0xcf:</div><div class='add'>+			setup_force_cpu_cap(X86_FEATURE_ZEN6);</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			goto warn;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -508,7 +515,7 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_has(c, X86_FEATURE_SME) || cpu_has(c, X86_FEATURE_SEV)) {</div><div class='ctx'> 		/* Check if memory encryption is enabled */</div><div class='del'>-		rdmsrl(MSR_AMD64_SYSCFG, msr);</div><div class='add'>+		rdmsrq(MSR_AMD64_SYSCFG, msr);</div><div class='ctx'> 		if (!(msr &amp; MSR_AMD64_SYSCFG_MEM_ENCRYPT))</div><div class='ctx'> 			goto clear_all;</div><div class='ctx'> </div><div class='hunk'>@@ -525,7 +532,7 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)</div><div class='ctx'> 		if (!sme_me_mask)</div><div class='ctx'> 			setup_clear_cpu_cap(X86_FEATURE_SME);</div><div class='ctx'> </div><div class='del'>-		rdmsrl(MSR_K7_HWCR, msr);</div><div class='add'>+		rdmsrq(MSR_K7_HWCR, msr);</div><div class='ctx'> 		if (!(msr &amp; MSR_K7_HWCR_SMMLOCK))</div><div class='ctx'> 			goto clear_sev;</div><div class='ctx'> </div><div class='hunk'>@@ -612,7 +619,7 @@ static void early_init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) &amp;&amp; !cpu_has(c, X86_FEATURE_IBPB_BRTYPE)) {</div><div class='ctx'> 		if (c-&gt;x86 == 0x17 &amp;&amp; boot_cpu_has(X86_FEATURE_AMD_IBPB))</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);</div><div class='del'>-		else if (c-&gt;x86 &gt;= 0x19 &amp;&amp; !wrmsrl_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) {</div><div class='add'>+		else if (c-&gt;x86 &gt;= 0x19 &amp;&amp; !wrmsrq_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) {</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_SBPB);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -636,14 +643,14 @@ static void init_amd_k8(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (c-&gt;x86_model &lt; 0x14 &amp;&amp; cpu_has(c, X86_FEATURE_LAHF_LM) &amp;&amp; !cpu_has(c, X86_FEATURE_HYPERVISOR)) {</div><div class='ctx'> 		clear_cpu_cap(c, X86_FEATURE_LAHF_LM);</div><div class='del'>-		if (!rdmsrl_amd_safe(0xc001100d, &amp;value)) {</div><div class='add'>+		if (!rdmsrq_amd_safe(0xc001100d, &amp;value)) {</div><div class='ctx'> 			value &amp;= ~BIT_64(32);</div><div class='del'>-			wrmsrl_amd_safe(0xc001100d, value);</div><div class='add'>+			wrmsrq_amd_safe(0xc001100d, value);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!c-&gt;x86_model_id[0])</div><div class='del'>-		strcpy(c-&gt;x86_model_id, "Hammer");</div><div class='add'>+		strscpy(c-&gt;x86_model_id, "Hammer");</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -788,9 +795,9 @@ static void init_amd_bd(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 * Disable it on the affected CPUs.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if ((c-&gt;x86_model &gt;= 0x02) &amp;&amp; (c-&gt;x86_model &lt; 0x20)) {</div><div class='del'>-		if (!rdmsrl_safe(MSR_F15H_IC_CFG, &amp;value) &amp;&amp; !(value &amp; 0x1E)) {</div><div class='add'>+		if (!rdmsrq_safe(MSR_F15H_IC_CFG, &amp;value) &amp;&amp; !(value &amp; 0x1E)) {</div><div class='ctx'> 			value |= 0x1E;</div><div class='del'>-			wrmsrl_safe(MSR_F15H_IC_CFG, value);</div><div class='add'>+			wrmsrq_safe(MSR_F15H_IC_CFG, value);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -805,6 +812,7 @@ static void init_amd_bd(struct cpuinfo_x86 *c)</div><div class='ctx'> static const struct x86_cpu_id erratum_1386_microcode[] = {</div><div class='ctx'> 	X86_MATCH_VFM_STEPS(VFM_MAKE(X86_VENDOR_AMD, 0x17, 0x01), 0x2, 0x2, 0x0800126e),</div><div class='ctx'> 	X86_MATCH_VFM_STEPS(VFM_MAKE(X86_VENDOR_AMD, 0x17, 0x31), 0x0, 0x0, 0x08301052),</div><div class='add'>+	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void fix_erratum_1386(struct cpuinfo_x86 *c)</div><div class='hunk'>@@ -838,9 +846,9 @@ void init_spectral_chicken(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 * suppresses non-branch predictions.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!cpu_has(c, X86_FEATURE_HYPERVISOR)) {</div><div class='del'>-		if (!rdmsrl_safe(MSR_ZEN2_SPECTRAL_CHICKEN, &amp;value)) {</div><div class='add'>+		if (!rdmsrq_safe(MSR_ZEN2_SPECTRAL_CHICKEN, &amp;value)) {</div><div class='ctx'> 			value |= MSR_ZEN2_SPECTRAL_CHICKEN_BIT;</div><div class='del'>-			wrmsrl_safe(MSR_ZEN2_SPECTRAL_CHICKEN, value);</div><div class='add'>+			wrmsrq_safe(MSR_ZEN2_SPECTRAL_CHICKEN, value);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -868,6 +876,16 @@ static void init_amd_zen1(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> 	pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");</div><div class='ctx'> 	setup_force_cpu_bug(X86_BUG_DIV0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Turn off the Instructions Retired free counter on machines that are</div><div class='add'>+	 * susceptible to erratum #1054 "Instructions Retired Performance</div><div class='add'>+	 * Counter May Be Inaccurate".</div><div class='add'>+	 */</div><div class='add'>+	if (c-&gt;x86_model &lt; 0x30) {</div><div class='add'>+		msr_clear_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT);</div><div class='add'>+		clear_cpu_cap(c, X86_FEATURE_IRPERF);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool cpu_has_zenbleed_microcode(void)</div><div class='hunk'>@@ -1014,7 +1032,7 @@ static void init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 	init_amd_cacheinfo(c);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has(c, X86_FEATURE_SVM)) {</div><div class='del'>-		rdmsrl(MSR_VM_CR, vm_cr);</div><div class='add'>+		rdmsrq(MSR_VM_CR, vm_cr);</div><div class='ctx'> 		if (vm_cr &amp; SVM_VM_CR_SVM_DIS_MASK) {</div><div class='ctx'> 			pr_notice_once("SVM disabled (by BIOS) in MSR_VM_CR\n");</div><div class='ctx'> 			clear_cpu_cap(c, X86_FEATURE_SVM);</div><div class='hunk'>@@ -1051,13 +1069,8 @@ static void init_amd(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_XENPV))</div><div class='ctx'> 		set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Turn on the Instructions Retired free counter on machines not</div><div class='del'>-	 * susceptible to erratum #1054 "Instructions Retired Performance</div><div class='del'>-	 * Counter May Be Inaccurate".</div><div class='del'>-	 */</div><div class='del'>-	if (cpu_has(c, X86_FEATURE_IRPERF) &amp;&amp;</div><div class='del'>-	    (boot_cpu_has(X86_FEATURE_ZEN1) &amp;&amp; c-&gt;x86_model &gt; 0x2f))</div><div class='add'>+	/* Enable the Instructions Retired free counter */</div><div class='add'>+	if (cpu_has(c, X86_FEATURE_IRPERF))</div><div class='ctx'> 		msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT);</div><div class='ctx'> </div><div class='ctx'> 	check_null_seg_clears_base(c);</div><div class='hunk'>@@ -1200,7 +1213,7 @@ void amd_set_dr_addr_mask(unsigned long mask, unsigned int dr)</div><div class='ctx'> 	if (per_cpu(amd_dr_addr_mask, cpu)[dr] == mask)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsr(amd_msr_dr_addr_masks[dr], mask, 0);</div><div class='add'>+	wrmsrq(amd_msr_dr_addr_masks[dr], mask);</div><div class='ctx'> 	per_cpu(amd_dr_addr_mask, cpu)[dr] = mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1231,3 +1244,56 @@ void amd_check_microcode(void)</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_ZEN2))</div><div class='ctx'> 		on_each_cpu(zenbleed_check_cpu, NULL, 1);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static const char * const s5_reset_reason_txt[] = {</div><div class='add'>+	[0]  = "thermal pin BP_THERMTRIP_L was tripped",</div><div class='add'>+	[1]  = "power button was pressed for 4 seconds",</div><div class='add'>+	[2]  = "shutdown pin was tripped",</div><div class='add'>+	[4]  = "remote ASF power off command was received",</div><div class='add'>+	[9]  = "internal CPU thermal limit was tripped",</div><div class='add'>+	[16] = "system reset pin BP_SYS_RST_L was tripped",</div><div class='add'>+	[17] = "software issued PCI reset",</div><div class='add'>+	[18] = "software wrote 0x4 to reset control register 0xCF9",</div><div class='add'>+	[19] = "software wrote 0x6 to reset control register 0xCF9",</div><div class='add'>+	[20] = "software wrote 0xE to reset control register 0xCF9",</div><div class='add'>+	[21] = "ACPI power state transition occurred",</div><div class='add'>+	[22] = "keyboard reset pin KB_RST_L was tripped",</div><div class='add'>+	[23] = "internal CPU shutdown event occurred",</div><div class='add'>+	[24] = "system failed to boot before failed boot timer expired",</div><div class='add'>+	[25] = "hardware watchdog timer expired",</div><div class='add'>+	[26] = "remote ASF reset command was received",</div><div class='add'>+	[27] = "an uncorrected error caused a data fabric sync flood event",</div><div class='add'>+	[29] = "FCH and MP1 failed warm reset handshake",</div><div class='add'>+	[30] = "a parity error occurred",</div><div class='add'>+	[31] = "a software sync flood event occurred",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int print_s5_reset_status_mmio(void)</div><div class='add'>+{</div><div class='add'>+	unsigned long value;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_ZEN))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	addr = ioremap(FCH_PM_BASE + FCH_PM_S5_RESET_STATUS, sizeof(value));</div><div class='add'>+	if (!addr)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	value = ioread32(addr);</div><div class='add'>+	iounmap(addr);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(s5_reset_reason_txt); i++) {</div><div class='add'>+		if (!(value &amp; BIT(i)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (s5_reset_reason_txt[i]) {</div><div class='add'>+			pr_info("x86/amd: Previous system reset reason [0x%08lx]: %s\n",</div><div class='add'>+				value, s5_reset_reason_txt[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+late_initcall(print_s5_reset_status_mmio);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/amd_cache_disable.c b/arch/x86/kernel/cpu/amd_cache_disable.c<br/>new file mode 100644<br/>index 000000000000..8843b9557aea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/amd_cache_disable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/amd_cache_disable.c</a></div><div class='hunk'>@@ -0,0 +1,301 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * AMD L3 cache_disable_{0,1} sysfs handling</div><div class='add'>+ * Documentation/ABI/testing/sysfs-devices-system-cpu</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/cacheinfo.h&gt;</div><div class='add'>+#include &lt;linux/capability.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/sysfs.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cpu.h"</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * L3 cache descriptors</div><div class='add'>+ */</div><div class='add'>+static void amd_calc_l3_indices(struct amd_northbridge *nb)</div><div class='add'>+{</div><div class='add'>+	struct amd_l3_cache *l3 = &amp;nb-&gt;l3_cache;</div><div class='add'>+	unsigned int sc0, sc1, sc2, sc3;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	pci_read_config_dword(nb-&gt;misc, 0x1C4, &amp;val);</div><div class='add'>+</div><div class='add'>+	/* calculate subcache sizes */</div><div class='add'>+	l3-&gt;subcaches[0] = sc0 = !(val &amp; BIT(0));</div><div class='add'>+	l3-&gt;subcaches[1] = sc1 = !(val &amp; BIT(4));</div><div class='add'>+</div><div class='add'>+	if (boot_cpu_data.x86 == 0x15) {</div><div class='add'>+		l3-&gt;subcaches[0] = sc0 += !(val &amp; BIT(1));</div><div class='add'>+		l3-&gt;subcaches[1] = sc1 += !(val &amp; BIT(5));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	l3-&gt;subcaches[2] = sc2 = !(val &amp; BIT(8))  + !(val &amp; BIT(9));</div><div class='add'>+	l3-&gt;subcaches[3] = sc3 = !(val &amp; BIT(12)) + !(val &amp; BIT(13));</div><div class='add'>+</div><div class='add'>+	l3-&gt;indices = (max(max3(sc0, sc1, sc2), sc3) &lt;&lt; 10) - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * check whether a slot used for disabling an L3 index is occupied.</div><div class='add'>+ * @l3: L3 cache descriptor</div><div class='add'>+ * @slot: slot number (0..1)</div><div class='add'>+ *</div><div class='add'>+ * @returns: the disabled index if used or negative value if slot free.</div><div class='add'>+ */</div><div class='add'>+static int amd_get_l3_disable_slot(struct amd_northbridge *nb, unsigned int slot)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg = 0;</div><div class='add'>+</div><div class='add'>+	pci_read_config_dword(nb-&gt;misc, 0x1BC + slot * 4, &amp;reg);</div><div class='add'>+</div><div class='add'>+	/* check whether this slot is activated already */</div><div class='add'>+	if (reg &amp; (3UL &lt;&lt; 30))</div><div class='add'>+		return reg &amp; 0xfff;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_cache_disable(struct cacheinfo *ci, char *buf, unsigned int slot)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	struct amd_northbridge *nb = ci-&gt;priv;</div><div class='add'>+</div><div class='add'>+	index = amd_get_l3_disable_slot(nb, slot);</div><div class='add'>+	if (index &gt;= 0)</div><div class='add'>+		return sysfs_emit(buf, "%d\n", index);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "FREE\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SHOW_CACHE_DISABLE(slot)					\</div><div class='add'>+static ssize_t								\</div><div class='add'>+cache_disable_##slot##_show(struct device *dev,				\</div><div class='add'>+			    struct device_attribute *attr, char *buf)	\</div><div class='add'>+{									\</div><div class='add'>+	struct cacheinfo *ci = dev_get_drvdata(dev);			\</div><div class='add'>+	return show_cache_disable(ci, buf, slot);			\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+SHOW_CACHE_DISABLE(0)</div><div class='add'>+SHOW_CACHE_DISABLE(1)</div><div class='add'>+</div><div class='add'>+static void amd_l3_disable_index(struct amd_northbridge *nb, int cpu,</div><div class='add'>+				 unsigned int slot, unsigned long idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	idx |= BIT(30);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 *  disable index in all 4 subcaches</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		u32 reg = idx | (i &lt;&lt; 20);</div><div class='add'>+</div><div class='add'>+		if (!nb-&gt;l3_cache.subcaches[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pci_write_config_dword(nb-&gt;misc, 0x1BC + slot * 4, reg);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * We need to WBINVD on a core on the node containing the L3</div><div class='add'>+		 * cache which indices we disable therefore a simple wbinvd()</div><div class='add'>+		 * is not sufficient.</div><div class='add'>+		 */</div><div class='add'>+		wbinvd_on_cpu(cpu);</div><div class='add'>+</div><div class='add'>+		reg |= BIT(31);</div><div class='add'>+		pci_write_config_dword(nb-&gt;misc, 0x1BC + slot * 4, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * disable a L3 cache index by using a disable-slot</div><div class='add'>+ *</div><div class='add'>+ * @l3:    L3 cache descriptor</div><div class='add'>+ * @cpu:   A CPU on the node containing the L3 cache</div><div class='add'>+ * @slot:  slot number (0..1)</div><div class='add'>+ * @index: index to disable</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on success, error status on failure</div><div class='add'>+ */</div><div class='add'>+static int amd_set_l3_disable_slot(struct amd_northbridge *nb, int cpu,</div><div class='add'>+				   unsigned int slot, unsigned long index)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/*  check if @slot is already used or the index is already disabled */</div><div class='add'>+	ret = amd_get_l3_disable_slot(nb, slot);</div><div class='add'>+	if (ret &gt;= 0)</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	if (index &gt; nb-&gt;l3_cache.indices)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* check whether the other slot has disabled the same index already */</div><div class='add'>+	if (index == amd_get_l3_disable_slot(nb, !slot))</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	amd_l3_disable_index(nb, cpu, slot, index);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_cache_disable(struct cacheinfo *ci, const char *buf,</div><div class='add'>+				   size_t count, unsigned int slot)</div><div class='add'>+{</div><div class='add'>+	struct amd_northbridge *nb = ci-&gt;priv;</div><div class='add'>+	unsigned long val = 0;</div><div class='add'>+	int cpu, err = 0;</div><div class='add'>+</div><div class='add'>+	if (!capable(CAP_SYS_ADMIN))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	cpu = cpumask_first(&amp;ci-&gt;shared_cpu_map);</div><div class='add'>+</div><div class='add'>+	if (kstrtoul(buf, 10, &amp;val) &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = amd_set_l3_disable_slot(nb, cpu, slot, val);</div><div class='add'>+	if (err) {</div><div class='add'>+		if (err == -EEXIST)</div><div class='add'>+			pr_warn("L3 slot %d in use/index already disabled!\n",</div><div class='add'>+				   slot);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define STORE_CACHE_DISABLE(slot)					\</div><div class='add'>+static ssize_t								\</div><div class='add'>+cache_disable_##slot##_store(struct device *dev,			\</div><div class='add'>+			     struct device_attribute *attr,		\</div><div class='add'>+			     const char *buf, size_t count)		\</div><div class='add'>+{									\</div><div class='add'>+	struct cacheinfo *ci = dev_get_drvdata(dev);			\</div><div class='add'>+	return store_cache_disable(ci, buf, count, slot);		\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+STORE_CACHE_DISABLE(0)</div><div class='add'>+STORE_CACHE_DISABLE(1)</div><div class='add'>+</div><div class='add'>+static ssize_t subcaches_show(struct device *dev, struct device_attribute *attr,</div><div class='add'>+			      char *buf)</div><div class='add'>+{</div><div class='add'>+	struct cacheinfo *ci = dev_get_drvdata(dev);</div><div class='add'>+	int cpu = cpumask_first(&amp;ci-&gt;shared_cpu_map);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%x\n", amd_get_subcaches(cpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t subcaches_store(struct device *dev,</div><div class='add'>+			       struct device_attribute *attr,</div><div class='add'>+			       const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct cacheinfo *ci = dev_get_drvdata(dev);</div><div class='add'>+	int cpu = cpumask_first(&amp;ci-&gt;shared_cpu_map);</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='add'>+	if (!capable(CAP_SYS_ADMIN))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	if (kstrtoul(buf, 16, &amp;val) &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (amd_set_subcaches(cpu, val))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR_RW(cache_disable_0);</div><div class='add'>+static DEVICE_ATTR_RW(cache_disable_1);</div><div class='add'>+static DEVICE_ATTR_RW(subcaches);</div><div class='add'>+</div><div class='add'>+static umode_t cache_private_attrs_is_visible(struct kobject *kobj,</div><div class='add'>+					      struct attribute *attr, int unused)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = kobj_to_dev(kobj);</div><div class='add'>+	struct cacheinfo *ci = dev_get_drvdata(dev);</div><div class='add'>+	umode_t mode = attr-&gt;mode;</div><div class='add'>+</div><div class='add'>+	if (!ci-&gt;priv)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((attr == &amp;dev_attr_subcaches.attr) &amp;&amp;</div><div class='add'>+	    amd_nb_has_feature(AMD_NB_L3_PARTITIONING))</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	if ((attr == &amp;dev_attr_cache_disable_0.attr ||</div><div class='add'>+	     attr == &amp;dev_attr_cache_disable_1.attr) &amp;&amp;</div><div class='add'>+	    amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct attribute_group cache_private_group = {</div><div class='add'>+	.is_visible = cache_private_attrs_is_visible,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void init_amd_l3_attrs(void)</div><div class='add'>+{</div><div class='add'>+	static struct attribute **amd_l3_attrs;</div><div class='add'>+	int n = 1;</div><div class='add'>+</div><div class='add'>+	if (amd_l3_attrs) /* already initialized */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))</div><div class='add'>+		n += 2;</div><div class='add'>+	if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))</div><div class='add'>+		n += 1;</div><div class='add'>+</div><div class='add'>+	amd_l3_attrs = kcalloc(n, sizeof(*amd_l3_attrs), GFP_KERNEL);</div><div class='add'>+	if (!amd_l3_attrs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	n = 0;</div><div class='add'>+	if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) {</div><div class='add'>+		amd_l3_attrs[n++] = &amp;dev_attr_cache_disable_0.attr;</div><div class='add'>+		amd_l3_attrs[n++] = &amp;dev_attr_cache_disable_1.attr;</div><div class='add'>+	}</div><div class='add'>+	if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))</div><div class='add'>+		amd_l3_attrs[n++] = &amp;dev_attr_subcaches.attr;</div><div class='add'>+</div><div class='add'>+	cache_private_group.attrs = amd_l3_attrs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct attribute_group *cache_get_priv_group(struct cacheinfo *ci)</div><div class='add'>+{</div><div class='add'>+	struct amd_northbridge *nb = ci-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (ci-&gt;level &lt; 3 || !nb)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (nb &amp;&amp; nb-&gt;l3_cache.indices)</div><div class='add'>+		init_amd_l3_attrs();</div><div class='add'>+</div><div class='add'>+	return &amp;cache_private_group;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct amd_northbridge *amd_init_l3_cache(int index)</div><div class='add'>+{</div><div class='add'>+	struct amd_northbridge *nb;</div><div class='add'>+	int node;</div><div class='add'>+</div><div class='add'>+	/* only for L3, and not in virtualized environments */</div><div class='add'>+	if (index &lt; 3)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	node = topology_amd_node_id(smp_processor_id());</div><div class='add'>+	nb = node_to_amd_nb(node);</div><div class='add'>+	if (nb &amp;&amp; !nb-&gt;l3_cache.indices)</div><div class='add'>+		amd_calc_l3_indices(nb);</div><div class='add'>+</div><div class='add'>+	return nb;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kernel/cpu/aperfmperf.c b/arch/x86/kernel/cpu/aperfmperf.c<br/>index 6cf31a1649c4..a315b0627dfb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/aperfmperf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/aperfmperf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/aperfmperf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/aperfmperf.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='hunk'>@@ -40,8 +41,8 @@ static void init_counter_refs(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 aperf, mperf;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_APERF, aperf);</div><div class='del'>-	rdmsrl(MSR_IA32_MPERF, mperf);</div><div class='add'>+	rdmsrq(MSR_IA32_APERF, aperf);</div><div class='add'>+	rdmsrq(MSR_IA32_MPERF, mperf);</div><div class='ctx'> </div><div class='ctx'> 	this_cpu_write(cpu_samples.aperf, aperf);</div><div class='ctx'> 	this_cpu_write(cpu_samples.mperf, mperf);</div><div class='hunk'>@@ -99,7 +100,7 @@ static bool __init turbo_disabled(void)</div><div class='ctx'> 	u64 misc_en;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_IA32_MISC_ENABLE, &amp;misc_en);</div><div class='add'>+	err = rdmsrq_safe(MSR_IA32_MISC_ENABLE, &amp;misc_en);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -110,11 +111,11 @@ static bool __init slv_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_ATOM_CORE_RATIOS, base_freq);</div><div class='add'>+	err = rdmsrq_safe(MSR_ATOM_CORE_RATIOS, base_freq);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_ATOM_CORE_TURBO_RATIOS, turbo_freq);</div><div class='add'>+	err = rdmsrq_safe(MSR_ATOM_CORE_TURBO_RATIOS, turbo_freq);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -152,13 +153,13 @@ static bool __init knl_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq,</div><div class='ctx'> 	int err, i;</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);</div><div class='add'>+	err = rdmsrq_safe(MSR_PLATFORM_INFO, base_freq);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	*base_freq = (*base_freq &gt;&gt; 8) &amp; 0xFF;	    /* max P state */</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &amp;msr);</div><div class='add'>+	err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, &amp;msr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -190,17 +191,17 @@ static bool __init skx_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq, int s</div><div class='ctx'> 	u32 group_size;</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);</div><div class='add'>+	err = rdmsrq_safe(MSR_PLATFORM_INFO, base_freq);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	*base_freq = (*base_freq &gt;&gt; 8) &amp; 0xFF;      /* max P state */</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &amp;ratios);</div><div class='add'>+	err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, &amp;ratios);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT1, &amp;counts);</div><div class='add'>+	err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT1, &amp;counts);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -220,11 +221,11 @@ static bool __init core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);</div><div class='add'>+	err = rdmsrq_safe(MSR_PLATFORM_INFO, base_freq);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &amp;msr);</div><div class='add'>+	err = rdmsrq_safe(MSR_TURBO_RATIO_LIMIT, &amp;msr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -474,8 +475,8 @@ void arch_scale_freq_tick(void)</div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_APERFMPERF))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_APERF, aperf);</div><div class='del'>-	rdmsrl(MSR_IA32_MPERF, mperf);</div><div class='add'>+	rdmsrq(MSR_IA32_APERF, aperf);</div><div class='add'>+	rdmsrq(MSR_IA32_MPERF, mperf);</div><div class='ctx'> 	acnt = aperf - s-&gt;aperf;</div><div class='ctx'> 	mcnt = mperf - s-&gt;mperf;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c<br/>index 4386aa6c69e1..7f94e6a5497d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/bugs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/bugs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/bugs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/bugs.c</a></div><div class='hunk'>@@ -34,21 +34,66 @@</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Speculation Vulnerability Handling</div><div class='add'>+ *</div><div class='add'>+ * Each vulnerability is handled with the following functions:</div><div class='add'>+ *   &lt;vuln&gt;_select_mitigation() -- Selects a mitigation to use.  This should</div><div class='add'>+ *				   take into account all relevant command line</div><div class='add'>+ *				   options.</div><div class='add'>+ *   &lt;vuln&gt;_update_mitigation() -- This is called after all vulnerabilities have</div><div class='add'>+ *				   selected a mitigation, in case the selection</div><div class='add'>+ *				   may want to change based on other choices</div><div class='add'>+ *				   made.  This function is optional.</div><div class='add'>+ *   &lt;vuln&gt;_apply_mitigation() -- Enable the selected mitigation.</div><div class='add'>+ *</div><div class='add'>+ * The compile-time mitigation in all cases should be AUTO.  An explicit</div><div class='add'>+ * command-line option can override AUTO.  If no such option is</div><div class='add'>+ * provided, &lt;vuln&gt;_select_mitigation() will override AUTO to the best</div><div class='add'>+ * mitigation option.</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> static void __init spectre_v1_select_mitigation(void);</div><div class='add'>+static void __init spectre_v1_apply_mitigation(void);</div><div class='ctx'> static void __init spectre_v2_select_mitigation(void);</div><div class='add'>+static void __init spectre_v2_update_mitigation(void);</div><div class='add'>+static void __init spectre_v2_apply_mitigation(void);</div><div class='ctx'> static void __init retbleed_select_mitigation(void);</div><div class='add'>+static void __init retbleed_update_mitigation(void);</div><div class='add'>+static void __init retbleed_apply_mitigation(void);</div><div class='ctx'> static void __init spectre_v2_user_select_mitigation(void);</div><div class='add'>+static void __init spectre_v2_user_update_mitigation(void);</div><div class='add'>+static void __init spectre_v2_user_apply_mitigation(void);</div><div class='ctx'> static void __init ssb_select_mitigation(void);</div><div class='add'>+static void __init ssb_apply_mitigation(void);</div><div class='ctx'> static void __init l1tf_select_mitigation(void);</div><div class='add'>+static void __init l1tf_apply_mitigation(void);</div><div class='ctx'> static void __init mds_select_mitigation(void);</div><div class='del'>-static void __init md_clear_update_mitigation(void);</div><div class='del'>-static void __init md_clear_select_mitigation(void);</div><div class='add'>+static void __init mds_update_mitigation(void);</div><div class='add'>+static void __init mds_apply_mitigation(void);</div><div class='ctx'> static void __init taa_select_mitigation(void);</div><div class='add'>+static void __init taa_update_mitigation(void);</div><div class='add'>+static void __init taa_apply_mitigation(void);</div><div class='ctx'> static void __init mmio_select_mitigation(void);</div><div class='add'>+static void __init mmio_update_mitigation(void);</div><div class='add'>+static void __init mmio_apply_mitigation(void);</div><div class='add'>+static void __init rfds_select_mitigation(void);</div><div class='add'>+static void __init rfds_update_mitigation(void);</div><div class='add'>+static void __init rfds_apply_mitigation(void);</div><div class='ctx'> static void __init srbds_select_mitigation(void);</div><div class='add'>+static void __init srbds_apply_mitigation(void);</div><div class='ctx'> static void __init l1d_flush_select_mitigation(void);</div><div class='ctx'> static void __init srso_select_mitigation(void);</div><div class='add'>+static void __init srso_update_mitigation(void);</div><div class='add'>+static void __init srso_apply_mitigation(void);</div><div class='ctx'> static void __init gds_select_mitigation(void);</div><div class='add'>+static void __init gds_apply_mitigation(void);</div><div class='add'>+static void __init bhi_select_mitigation(void);</div><div class='add'>+static void __init bhi_update_mitigation(void);</div><div class='add'>+static void __init bhi_apply_mitigation(void);</div><div class='add'>+static void __init its_select_mitigation(void);</div><div class='add'>+static void __init its_update_mitigation(void);</div><div class='add'>+static void __init its_apply_mitigation(void);</div><div class='ctx'> </div><div class='ctx'> /* The base value of the SPEC_CTRL MSR without task-specific bits set */</div><div class='ctx'> u64 x86_spec_ctrl_base;</div><div class='hunk'>@@ -59,7 +104,6 @@ DEFINE_PER_CPU(u64, x86_spec_ctrl_current);</div><div class='ctx'> EXPORT_PER_CPU_SYMBOL_GPL(x86_spec_ctrl_current);</div><div class='ctx'> </div><div class='ctx'> u64 x86_pred_cmd __ro_after_init = PRED_CMD_IBPB;</div><div class='del'>-EXPORT_SYMBOL_GPL(x86_pred_cmd);</div><div class='ctx'> </div><div class='ctx'> static u64 __ro_after_init x86_arch_cap_msr;</div><div class='ctx'> </div><div class='hunk'>@@ -67,11 +111,19 @@ static DEFINE_MUTEX(spec_ctrl_mutex);</div><div class='ctx'> </div><div class='ctx'> void (*x86_return_thunk)(void) __ro_after_init = __x86_return_thunk;</div><div class='ctx'> </div><div class='add'>+static void __init set_return_thunk(void *thunk)</div><div class='add'>+{</div><div class='add'>+	if (x86_return_thunk != __x86_return_thunk)</div><div class='add'>+		pr_warn("x86/bugs: return thunk changed\n");</div><div class='add'>+</div><div class='add'>+	x86_return_thunk = thunk;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Update SPEC_CTRL MSR and its cached copy unconditionally */</div><div class='ctx'> static void update_spec_ctrl(u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	this_cpu_write(x86_spec_ctrl_current, val);</div><div class='del'>-	wrmsrl(MSR_IA32_SPEC_CTRL, val);</div><div class='add'>+	wrmsrq(MSR_IA32_SPEC_CTRL, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -90,7 +142,7 @@ void update_spec_ctrl_cond(u64 val)</div><div class='ctx'> 	 * forced the update can be delayed until that time.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS))</div><div class='del'>-		wrmsrl(MSR_IA32_SPEC_CTRL, val);</div><div class='add'>+		wrmsrq(MSR_IA32_SPEC_CTRL, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> noinstr u64 spec_ctrl_current(void)</div><div class='hunk'>@@ -128,9 +180,13 @@ EXPORT_SYMBOL_GPL(mds_idle_clear);</div><div class='ctx'>  */</div><div class='ctx'> DEFINE_STATIC_KEY_FALSE(switch_mm_cond_l1d_flush);</div><div class='ctx'> </div><div class='del'>-/* Controls CPU Fill buffer clear before KVM guest MMIO accesses */</div><div class='del'>-DEFINE_STATIC_KEY_FALSE(mmio_stale_data_clear);</div><div class='del'>-EXPORT_SYMBOL_GPL(mmio_stale_data_clear);</div><div class='add'>+/*</div><div class='add'>+ * Controls CPU Fill buffer clear before VMenter. This is a subset of</div><div class='add'>+ * X86_FEATURE_CLEAR_CPU_BUF, and should only be enabled when KVM-only</div><div class='add'>+ * mitigation is required.</div><div class='add'>+ */</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(cpu_buf_vm_clear);</div><div class='add'>+EXPORT_SYMBOL_GPL(cpu_buf_vm_clear);</div><div class='ctx'> </div><div class='ctx'> void __init cpu_select_mitigations(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -140,7 +196,7 @@ void __init cpu_select_mitigations(void)</div><div class='ctx'> 	 * init code as it is not enumerated and depends on the family.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_MSR_SPEC_CTRL)) {</div><div class='del'>-		rdmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);</div><div class='add'>+		rdmsrq(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Previously running kernel (kexec), may have some controls</div><div class='hunk'>@@ -155,30 +211,67 @@ void __init cpu_select_mitigations(void)</div><div class='ctx'> 	/* Select the proper CPU mitigations before patching alternatives: */</div><div class='ctx'> 	spectre_v1_select_mitigation();</div><div class='ctx'> 	spectre_v2_select_mitigation();</div><div class='del'>-	/*</div><div class='del'>-	 * retbleed_select_mitigation() relies on the state set by</div><div class='del'>-	 * spectre_v2_select_mitigation(); specifically it wants to know about</div><div class='del'>-	 * spectre_v2=ibrs.</div><div class='del'>-	 */</div><div class='ctx'> 	retbleed_select_mitigation();</div><div class='del'>-	/*</div><div class='del'>-	 * spectre_v2_user_select_mitigation() relies on the state set by</div><div class='del'>-	 * retbleed_select_mitigation(); specifically the STIBP selection is</div><div class='del'>-	 * forced for UNRET or IBPB.</div><div class='del'>-	 */</div><div class='ctx'> 	spectre_v2_user_select_mitigation();</div><div class='ctx'> 	ssb_select_mitigation();</div><div class='ctx'> 	l1tf_select_mitigation();</div><div class='del'>-	md_clear_select_mitigation();</div><div class='add'>+	mds_select_mitigation();</div><div class='add'>+	taa_select_mitigation();</div><div class='add'>+	mmio_select_mitigation();</div><div class='add'>+	rfds_select_mitigation();</div><div class='ctx'> 	srbds_select_mitigation();</div><div class='ctx'> 	l1d_flush_select_mitigation();</div><div class='add'>+	srso_select_mitigation();</div><div class='add'>+	gds_select_mitigation();</div><div class='add'>+	its_select_mitigation();</div><div class='add'>+	bhi_select_mitigation();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * srso_select_mitigation() depends and must run after</div><div class='del'>-	 * retbleed_select_mitigation().</div><div class='add'>+	 * After mitigations are selected, some may need to update their</div><div class='add'>+	 * choices.</div><div class='ctx'> 	 */</div><div class='del'>-	srso_select_mitigation();</div><div class='del'>-	gds_select_mitigation();</div><div class='add'>+	spectre_v2_update_mitigation();</div><div class='add'>+	/*</div><div class='add'>+	 * retbleed_update_mitigation() relies on the state set by</div><div class='add'>+	 * spectre_v2_update_mitigation(); specifically it wants to know about</div><div class='add'>+	 * spectre_v2=ibrs.</div><div class='add'>+	 */</div><div class='add'>+	retbleed_update_mitigation();</div><div class='add'>+	/*</div><div class='add'>+	 * its_update_mitigation() depends on spectre_v2_update_mitigation()</div><div class='add'>+	 * and retbleed_update_mitigation().</div><div class='add'>+	 */</div><div class='add'>+	its_update_mitigation();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * spectre_v2_user_update_mitigation() depends on</div><div class='add'>+	 * retbleed_update_mitigation(), specifically the STIBP</div><div class='add'>+	 * selection is forced for UNRET or IBPB.</div><div class='add'>+	 */</div><div class='add'>+	spectre_v2_user_update_mitigation();</div><div class='add'>+	mds_update_mitigation();</div><div class='add'>+	taa_update_mitigation();</div><div class='add'>+	mmio_update_mitigation();</div><div class='add'>+	rfds_update_mitigation();</div><div class='add'>+	bhi_update_mitigation();</div><div class='add'>+	/* srso_update_mitigation() depends on retbleed_update_mitigation(). */</div><div class='add'>+	srso_update_mitigation();</div><div class='add'>+</div><div class='add'>+	spectre_v1_apply_mitigation();</div><div class='add'>+	spectre_v2_apply_mitigation();</div><div class='add'>+	retbleed_apply_mitigation();</div><div class='add'>+	spectre_v2_user_apply_mitigation();</div><div class='add'>+	ssb_apply_mitigation();</div><div class='add'>+	l1tf_apply_mitigation();</div><div class='add'>+	mds_apply_mitigation();</div><div class='add'>+	taa_apply_mitigation();</div><div class='add'>+	mmio_apply_mitigation();</div><div class='add'>+	rfds_apply_mitigation();</div><div class='add'>+	srbds_apply_mitigation();</div><div class='add'>+	srso_apply_mitigation();</div><div class='add'>+	gds_apply_mitigation();</div><div class='add'>+	its_apply_mitigation();</div><div class='add'>+	bhi_apply_mitigation();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -228,9 +321,9 @@ static void x86_amd_ssb_disable(void)</div><div class='ctx'> 	u64 msrval = x86_amd_ls_cfg_base | x86_amd_ls_cfg_ssbd_mask;</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_VIRT_SSBD))</div><div class='del'>-		wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, SPEC_CTRL_SSBD);</div><div class='add'>+		wrmsrq(MSR_AMD64_VIRT_SPEC_CTRL, SPEC_CTRL_SSBD);</div><div class='ctx'> 	else if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD))</div><div class='del'>-		wrmsrl(MSR_AMD64_LS_CFG, msrval);</div><div class='add'>+		wrmsrq(MSR_AMD64_LS_CFG, msrval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #undef pr_fmt</div><div class='hunk'>@@ -281,6 +374,12 @@ enum rfds_mitigations {</div><div class='ctx'> static enum rfds_mitigations rfds_mitigation __ro_after_init =</div><div class='ctx'> 	IS_ENABLED(CONFIG_MITIGATION_RFDS) ? RFDS_MITIGATION_AUTO : RFDS_MITIGATION_OFF;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Set if any of MDS/TAA/MMIO/RFDS are going to enable VERW clearing</div><div class='add'>+ * through X86_FEATURE_CLEAR_CPU_BUF on kernel and guest entry.</div><div class='add'>+ */</div><div class='add'>+static bool verw_clear_cpu_buf_mitigation_selected __ro_after_init;</div><div class='add'>+</div><div class='ctx'> static void __init mds_select_mitigation(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_MDS) || cpu_mitigations_off()) {</div><div class='hunk'>@@ -291,12 +390,34 @@ static void __init mds_select_mitigation(void)</div><div class='ctx'> 	if (mds_mitigation == MDS_MITIGATION_AUTO)</div><div class='ctx'> 		mds_mitigation = MDS_MITIGATION_FULL;</div><div class='ctx'> </div><div class='add'>+	if (mds_mitigation == MDS_MITIGATION_OFF)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	verw_clear_cpu_buf_mitigation_selected = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init mds_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_MDS) || cpu_mitigations_off())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* If TAA, MMIO, or RFDS are being mitigated, MDS gets mitigated too. */</div><div class='add'>+	if (verw_clear_cpu_buf_mitigation_selected)</div><div class='add'>+		mds_mitigation = MDS_MITIGATION_FULL;</div><div class='add'>+</div><div class='ctx'> 	if (mds_mitigation == MDS_MITIGATION_FULL) {</div><div class='ctx'> 		if (!boot_cpu_has(X86_FEATURE_MD_CLEAR))</div><div class='ctx'> 			mds_mitigation = MDS_MITIGATION_VMWERV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF);</div><div class='add'>+	pr_info("%s\n", mds_strings[mds_mitigation]);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static void __init mds_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (mds_mitigation == MDS_MITIGATION_FULL ||</div><div class='add'>+	    mds_mitigation == MDS_MITIGATION_VMWERV) {</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF);</div><div class='ctx'> 		if (!boot_cpu_has(X86_BUG_MSBDS_ONLY) &amp;&amp;</div><div class='ctx'> 		    (mds_nosmt || cpu_mitigations_auto_nosmt()))</div><div class='ctx'> 			cpu_smt_disable(false);</div><div class='hunk'>@@ -336,6 +457,11 @@ static const char * const taa_strings[] = {</div><div class='ctx'> 	[TAA_MITIGATION_TSX_DISABLED]	= "Mitigation: TSX disabled",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool __init taa_vulnerable(void)</div><div class='add'>+{</div><div class='add'>+	return boot_cpu_has_bug(X86_BUG_TAA) &amp;&amp; boot_cpu_has(X86_FEATURE_RTM);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init taa_select_mitigation(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_TAA)) {</div><div class='hunk'>@@ -349,48 +475,63 @@ static void __init taa_select_mitigation(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cpu_mitigations_off()) {</div><div class='add'>+	if (cpu_mitigations_off())</div><div class='ctx'> 		taa_mitigation = TAA_MITIGATION_OFF;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * TAA mitigation via VERW is turned off if both</div><div class='del'>-	 * tsx_async_abort=off and mds=off are specified.</div><div class='del'>-	 */</div><div class='del'>-	if (taa_mitigation == TAA_MITIGATION_OFF &amp;&amp;</div><div class='del'>-	    mds_mitigation == MDS_MITIGATION_OFF)</div><div class='add'>+	/* Microcode will be checked in taa_update_mitigation(). */</div><div class='add'>+	if (taa_mitigation == TAA_MITIGATION_AUTO)</div><div class='add'>+		taa_mitigation = TAA_MITIGATION_VERW;</div><div class='add'>+</div><div class='add'>+	if (taa_mitigation != TAA_MITIGATION_OFF)</div><div class='add'>+		verw_clear_cpu_buf_mitigation_selected = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init taa_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!taa_vulnerable() || cpu_mitigations_off())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_MD_CLEAR))</div><div class='add'>+	if (verw_clear_cpu_buf_mitigation_selected)</div><div class='ctx'> 		taa_mitigation = TAA_MITIGATION_VERW;</div><div class='del'>-	else</div><div class='del'>-		taa_mitigation = TAA_MITIGATION_UCODE_NEEDED;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * VERW doesn't clear the CPU buffers when MD_CLEAR=1 and MDS_NO=1.</div><div class='del'>-	 * A microcode update fixes this behavior to clear CPU buffers. It also</div><div class='del'>-	 * adds support for MSR_IA32_TSX_CTRL which is enumerated by the</div><div class='del'>-	 * ARCH_CAP_TSX_CTRL_MSR bit.</div><div class='del'>-	 *</div><div class='del'>-	 * On MDS_NO=1 CPUs if ARCH_CAP_TSX_CTRL_MSR is not set, microcode</div><div class='del'>-	 * update is required.</div><div class='del'>-	 */</div><div class='del'>-	if ( (x86_arch_cap_msr &amp; ARCH_CAP_MDS_NO) &amp;&amp;</div><div class='del'>-	    !(x86_arch_cap_msr &amp; ARCH_CAP_TSX_CTRL_MSR))</div><div class='del'>-		taa_mitigation = TAA_MITIGATION_UCODE_NEEDED;</div><div class='add'>+	if (taa_mitigation == TAA_MITIGATION_VERW) {</div><div class='add'>+		/* Check if the requisite ucode is available. */</div><div class='add'>+		if (!boot_cpu_has(X86_FEATURE_MD_CLEAR))</div><div class='add'>+			taa_mitigation = TAA_MITIGATION_UCODE_NEEDED;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * TSX is enabled, select alternate mitigation for TAA which is</div><div class='del'>-	 * the same as MDS. Enable MDS static branch to clear CPU buffers.</div><div class='del'>-	 *</div><div class='del'>-	 * For guests that can't determine whether the correct microcode is</div><div class='del'>-	 * present on host, enable the mitigation for UCODE_NEEDED as well.</div><div class='del'>-	 */</div><div class='del'>-	setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF);</div><div class='add'>+		/*</div><div class='add'>+		 * VERW doesn't clear the CPU buffers when MD_CLEAR=1 and MDS_NO=1.</div><div class='add'>+		 * A microcode update fixes this behavior to clear CPU buffers. It also</div><div class='add'>+		 * adds support for MSR_IA32_TSX_CTRL which is enumerated by the</div><div class='add'>+		 * ARCH_CAP_TSX_CTRL_MSR bit.</div><div class='add'>+		 *</div><div class='add'>+		 * On MDS_NO=1 CPUs if ARCH_CAP_TSX_CTRL_MSR is not set, microcode</div><div class='add'>+		 * update is required.</div><div class='add'>+		 */</div><div class='add'>+		if ((x86_arch_cap_msr &amp; ARCH_CAP_MDS_NO) &amp;&amp;</div><div class='add'>+		   !(x86_arch_cap_msr &amp; ARCH_CAP_TSX_CTRL_MSR))</div><div class='add'>+			taa_mitigation = TAA_MITIGATION_UCODE_NEEDED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (taa_nosmt || cpu_mitigations_auto_nosmt())</div><div class='del'>-		cpu_smt_disable(false);</div><div class='add'>+	pr_info("%s\n", taa_strings[taa_mitigation]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init taa_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (taa_mitigation == TAA_MITIGATION_VERW ||</div><div class='add'>+	    taa_mitigation == TAA_MITIGATION_UCODE_NEEDED) {</div><div class='add'>+		/*</div><div class='add'>+		 * TSX is enabled, select alternate mitigation for TAA which is</div><div class='add'>+		 * the same as MDS. Enable MDS static branch to clear CPU buffers.</div><div class='add'>+		 *</div><div class='add'>+		 * For guests that can't determine whether the correct microcode is</div><div class='add'>+		 * present on host, enable the mitigation for UCODE_NEEDED as well.</div><div class='add'>+		 */</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF);</div><div class='add'>+</div><div class='add'>+		if (taa_nosmt || cpu_mitigations_auto_nosmt())</div><div class='add'>+			cpu_smt_disable(false);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init tsx_async_abort_parse_cmdline(char *str)</div><div class='hunk'>@@ -428,31 +569,67 @@ static const char * const mmio_strings[] = {</div><div class='ctx'> static void __init mmio_select_mitigation(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA) ||</div><div class='del'>-	     boot_cpu_has_bug(X86_BUG_MMIO_UNKNOWN) ||</div><div class='ctx'> 	     cpu_mitigations_off()) {</div><div class='ctx'> 		mmio_mitigation = MMIO_MITIGATION_OFF;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Microcode will be checked in mmio_update_mitigation(). */</div><div class='add'>+	if (mmio_mitigation == MMIO_MITIGATION_AUTO)</div><div class='add'>+		mmio_mitigation = MMIO_MITIGATION_VERW;</div><div class='add'>+</div><div class='ctx'> 	if (mmio_mitigation == MMIO_MITIGATION_OFF)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable CPU buffer clear mitigation for host and VMM, if also affected</div><div class='del'>-	 * by MDS or TAA. Otherwise, enable mitigation for VMM only.</div><div class='add'>+	 * by MDS or TAA.</div><div class='ctx'> 	 */</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_MDS) || (boot_cpu_has_bug(X86_BUG_TAA) &amp;&amp;</div><div class='del'>-					      boot_cpu_has(X86_FEATURE_RTM)))</div><div class='del'>-		setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF);</div><div class='add'>+	if (boot_cpu_has_bug(X86_BUG_MDS) || taa_vulnerable())</div><div class='add'>+		verw_clear_cpu_buf_mitigation_selected = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init mmio_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA) || cpu_mitigations_off())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (verw_clear_cpu_buf_mitigation_selected)</div><div class='add'>+		mmio_mitigation = MMIO_MITIGATION_VERW;</div><div class='add'>+</div><div class='add'>+	if (mmio_mitigation == MMIO_MITIGATION_VERW) {</div><div class='add'>+		/*</div><div class='add'>+		 * Check if the system has the right microcode.</div><div class='add'>+		 *</div><div class='add'>+		 * CPU Fill buffer clear mitigation is enumerated by either an explicit</div><div class='add'>+		 * FB_CLEAR or by the presence of both MD_CLEAR and L1D_FLUSH on MDS</div><div class='add'>+		 * affected systems.</div><div class='add'>+		 */</div><div class='add'>+		if (!((x86_arch_cap_msr &amp; ARCH_CAP_FB_CLEAR) ||</div><div class='add'>+		      (boot_cpu_has(X86_FEATURE_MD_CLEAR) &amp;&amp;</div><div class='add'>+		       boot_cpu_has(X86_FEATURE_FLUSH_L1D) &amp;&amp;</div><div class='add'>+		     !(x86_arch_cap_msr &amp; ARCH_CAP_MDS_NO))))</div><div class='add'>+			mmio_mitigation = MMIO_MITIGATION_UCODE_NEEDED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("%s\n", mmio_strings[mmio_mitigation]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init mmio_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (mmio_mitigation == MMIO_MITIGATION_OFF)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * X86_FEATURE_CLEAR_CPU_BUF could be enabled by other VERW based</div><div class='del'>-	 * mitigations, disable KVM-only mitigation in that case.</div><div class='add'>+	 * Only enable the VMM mitigation if the CPU buffer clear mitigation is</div><div class='add'>+	 * not being used.</div><div class='ctx'> 	 */</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_CLEAR_CPU_BUF))</div><div class='del'>-		static_branch_disable(&amp;mmio_stale_data_clear);</div><div class='del'>-	else</div><div class='del'>-		static_branch_enable(&amp;mmio_stale_data_clear);</div><div class='add'>+	if (verw_clear_cpu_buf_mitigation_selected) {</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF);</div><div class='add'>+		static_branch_disable(&amp;cpu_buf_vm_clear);</div><div class='add'>+	} else {</div><div class='add'>+		static_branch_enable(&amp;cpu_buf_vm_clear);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If Processor-MMIO-Stale-Data bug is present and Fill Buffer data can</div><div class='hunk'>@@ -462,21 +639,6 @@ static void __init mmio_select_mitigation(void)</div><div class='ctx'> 	if (!(x86_arch_cap_msr &amp; ARCH_CAP_FBSDP_NO))</div><div class='ctx'> 		static_branch_enable(&amp;mds_idle_clear);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Check if the system has the right microcode.</div><div class='del'>-	 *</div><div class='del'>-	 * CPU Fill buffer clear mitigation is enumerated by either an explicit</div><div class='del'>-	 * FB_CLEAR or by the presence of both MD_CLEAR and L1D_FLUSH on MDS</div><div class='del'>-	 * affected systems.</div><div class='del'>-	 */</div><div class='del'>-	if ((x86_arch_cap_msr &amp; ARCH_CAP_FB_CLEAR) ||</div><div class='del'>-	    (boot_cpu_has(X86_FEATURE_MD_CLEAR) &amp;&amp;</div><div class='del'>-	     boot_cpu_has(X86_FEATURE_FLUSH_L1D) &amp;&amp;</div><div class='del'>-	     !(x86_arch_cap_msr &amp; ARCH_CAP_MDS_NO)))</div><div class='del'>-		mmio_mitigation = MMIO_MITIGATION_VERW;</div><div class='del'>-	else</div><div class='del'>-		mmio_mitigation = MMIO_MITIGATION_UCODE_NEEDED;</div><div class='del'>-</div><div class='ctx'> 	if (mmio_nosmt || cpu_mitigations_auto_nosmt())</div><div class='ctx'> 		cpu_smt_disable(false);</div><div class='ctx'> }</div><div class='hunk'>@@ -511,22 +673,48 @@ static const char * const rfds_strings[] = {</div><div class='ctx'> 	[RFDS_MITIGATION_UCODE_NEEDED]		= "Vulnerable: No microcode",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline bool __init verw_clears_cpu_reg_file(void)</div><div class='add'>+{</div><div class='add'>+	return (x86_arch_cap_msr &amp; ARCH_CAP_RFDS_CLEAR);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init rfds_select_mitigation(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_RFDS) || cpu_mitigations_off()) {</div><div class='ctx'> 		rfds_mitigation = RFDS_MITIGATION_OFF;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (rfds_mitigation == RFDS_MITIGATION_AUTO)</div><div class='add'>+		rfds_mitigation = RFDS_MITIGATION_VERW;</div><div class='add'>+</div><div class='ctx'> 	if (rfds_mitigation == RFDS_MITIGATION_OFF)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (rfds_mitigation == RFDS_MITIGATION_AUTO)</div><div class='add'>+	if (verw_clears_cpu_reg_file())</div><div class='add'>+		verw_clear_cpu_buf_mitigation_selected = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init rfds_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_RFDS) || cpu_mitigations_off())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (verw_clear_cpu_buf_mitigation_selected)</div><div class='ctx'> 		rfds_mitigation = RFDS_MITIGATION_VERW;</div><div class='ctx'> </div><div class='del'>-	if (x86_arch_cap_msr &amp; ARCH_CAP_RFDS_CLEAR)</div><div class='add'>+	if (rfds_mitigation == RFDS_MITIGATION_VERW) {</div><div class='add'>+		if (!verw_clears_cpu_reg_file())</div><div class='add'>+			rfds_mitigation = RFDS_MITIGATION_UCODE_NEEDED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_info("%s\n", rfds_strings[rfds_mitigation]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init rfds_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (rfds_mitigation == RFDS_MITIGATION_VERW)</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_CLEAR_CPU_BUF);</div><div class='del'>-	else</div><div class='del'>-		rfds_mitigation = RFDS_MITIGATION_UCODE_NEEDED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __init int rfds_parse_cmdline(char *str)</div><div class='hunk'>@@ -547,76 +735,11 @@ static __init int rfds_parse_cmdline(char *str)</div><div class='ctx'> early_param("reg_file_data_sampling", rfds_parse_cmdline);</div><div class='ctx'> </div><div class='ctx'> #undef pr_fmt</div><div class='del'>-#define pr_fmt(fmt)     "" fmt</div><div class='del'>-</div><div class='del'>-static void __init md_clear_update_mitigation(void)</div><div class='del'>-{</div><div class='del'>-	if (cpu_mitigations_off())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!boot_cpu_has(X86_FEATURE_CLEAR_CPU_BUF))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * X86_FEATURE_CLEAR_CPU_BUF is now enabled. Update MDS, TAA and MMIO</div><div class='del'>-	 * Stale Data mitigation, if necessary.</div><div class='del'>-	 */</div><div class='del'>-	if (mds_mitigation == MDS_MITIGATION_OFF &amp;&amp;</div><div class='del'>-	    boot_cpu_has_bug(X86_BUG_MDS)) {</div><div class='del'>-		mds_mitigation = MDS_MITIGATION_FULL;</div><div class='del'>-		mds_select_mitigation();</div><div class='del'>-	}</div><div class='del'>-	if (taa_mitigation == TAA_MITIGATION_OFF &amp;&amp;</div><div class='del'>-	    boot_cpu_has_bug(X86_BUG_TAA)) {</div><div class='del'>-		taa_mitigation = TAA_MITIGATION_VERW;</div><div class='del'>-		taa_select_mitigation();</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * MMIO_MITIGATION_OFF is not checked here so that mmio_stale_data_clear</div><div class='del'>-	 * gets updated correctly as per X86_FEATURE_CLEAR_CPU_BUF state.</div><div class='del'>-	 */</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA)) {</div><div class='del'>-		mmio_mitigation = MMIO_MITIGATION_VERW;</div><div class='del'>-		mmio_select_mitigation();</div><div class='del'>-	}</div><div class='del'>-	if (rfds_mitigation == RFDS_MITIGATION_OFF &amp;&amp;</div><div class='del'>-	    boot_cpu_has_bug(X86_BUG_RFDS)) {</div><div class='del'>-		rfds_mitigation = RFDS_MITIGATION_VERW;</div><div class='del'>-		rfds_select_mitigation();</div><div class='del'>-	}</div><div class='del'>-out:</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_MDS))</div><div class='del'>-		pr_info("MDS: %s\n", mds_strings[mds_mitigation]);</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_TAA))</div><div class='del'>-		pr_info("TAA: %s\n", taa_strings[taa_mitigation]);</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA))</div><div class='del'>-		pr_info("MMIO Stale Data: %s\n", mmio_strings[mmio_mitigation]);</div><div class='del'>-	else if (boot_cpu_has_bug(X86_BUG_MMIO_UNKNOWN))</div><div class='del'>-		pr_info("MMIO Stale Data: Unknown: No mitigations\n");</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_RFDS))</div><div class='del'>-		pr_info("Register File Data Sampling: %s\n", rfds_strings[rfds_mitigation]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init md_clear_select_mitigation(void)</div><div class='del'>-{</div><div class='del'>-	mds_select_mitigation();</div><div class='del'>-	taa_select_mitigation();</div><div class='del'>-	mmio_select_mitigation();</div><div class='del'>-	rfds_select_mitigation();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * As these mitigations are inter-related and rely on VERW instruction</div><div class='del'>-	 * to clear the microarchitural buffers, update and print their status</div><div class='del'>-	 * after mitigation selection is done for each of these vulnerabilities.</div><div class='del'>-	 */</div><div class='del'>-	md_clear_update_mitigation();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#undef pr_fmt</div><div class='ctx'> #define pr_fmt(fmt)	"SRBDS: " fmt</div><div class='ctx'> </div><div class='ctx'> enum srbds_mitigations {</div><div class='ctx'> 	SRBDS_MITIGATION_OFF,</div><div class='add'>+	SRBDS_MITIGATION_AUTO,</div><div class='ctx'> 	SRBDS_MITIGATION_UCODE_NEEDED,</div><div class='ctx'> 	SRBDS_MITIGATION_FULL,</div><div class='ctx'> 	SRBDS_MITIGATION_TSX_OFF,</div><div class='hunk'>@@ -624,7 +747,7 @@ enum srbds_mitigations {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static enum srbds_mitigations srbds_mitigation __ro_after_init =</div><div class='del'>-	IS_ENABLED(CONFIG_MITIGATION_SRBDS) ? SRBDS_MITIGATION_FULL : SRBDS_MITIGATION_OFF;</div><div class='add'>+	IS_ENABLED(CONFIG_MITIGATION_SRBDS) ? SRBDS_MITIGATION_AUTO : SRBDS_MITIGATION_OFF;</div><div class='ctx'> </div><div class='ctx'> static const char * const srbds_strings[] = {</div><div class='ctx'> 	[SRBDS_MITIGATION_OFF]		= "Vulnerable",</div><div class='hunk'>@@ -656,7 +779,7 @@ void update_srbds_msr(void)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_SRBDS_CTRL))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='add'>+	rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	switch (srbds_mitigation) {</div><div class='ctx'> 	case SRBDS_MITIGATION_OFF:</div><div class='hunk'>@@ -670,13 +793,18 @@ void update_srbds_msr(void)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='add'>+	wrmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init srbds_select_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	if (!boot_cpu_has_bug(X86_BUG_SRBDS))</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_SRBDS) || cpu_mitigations_off()) {</div><div class='add'>+		srbds_mitigation = SRBDS_MITIGATION_OFF;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (srbds_mitigation == SRBDS_MITIGATION_AUTO)</div><div class='add'>+		srbds_mitigation = SRBDS_MITIGATION_FULL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check to see if this is one of the MDS_NO systems supporting TSX that</div><div class='hunk'>@@ -690,13 +818,17 @@ static void __init srbds_select_mitigation(void)</div><div class='ctx'> 		srbds_mitigation = SRBDS_MITIGATION_HYPERVISOR;</div><div class='ctx'> 	else if (!boot_cpu_has(X86_FEATURE_SRBDS_CTRL))</div><div class='ctx'> 		srbds_mitigation = SRBDS_MITIGATION_UCODE_NEEDED;</div><div class='del'>-	else if (cpu_mitigations_off() || srbds_off)</div><div class='add'>+	else if (srbds_off)</div><div class='ctx'> 		srbds_mitigation = SRBDS_MITIGATION_OFF;</div><div class='ctx'> </div><div class='del'>-	update_srbds_msr();</div><div class='ctx'> 	pr_info("%s\n", srbds_strings[srbds_mitigation]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __init srbds_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	update_srbds_msr();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init srbds_parse_cmdline(char *str)</div><div class='ctx'> {</div><div class='ctx'> 	if (!str)</div><div class='hunk'>@@ -743,6 +875,7 @@ early_param("l1d_flush", l1d_flush_parse_cmdline);</div><div class='ctx'> </div><div class='ctx'> enum gds_mitigations {</div><div class='ctx'> 	GDS_MITIGATION_OFF,</div><div class='add'>+	GDS_MITIGATION_AUTO,</div><div class='ctx'> 	GDS_MITIGATION_UCODE_NEEDED,</div><div class='ctx'> 	GDS_MITIGATION_FORCE,</div><div class='ctx'> 	GDS_MITIGATION_FULL,</div><div class='hunk'>@@ -751,7 +884,7 @@ enum gds_mitigations {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static enum gds_mitigations gds_mitigation __ro_after_init =</div><div class='del'>-	IS_ENABLED(CONFIG_MITIGATION_GDS) ? GDS_MITIGATION_FULL : GDS_MITIGATION_OFF;</div><div class='add'>+	IS_ENABLED(CONFIG_MITIGATION_GDS) ? GDS_MITIGATION_AUTO : GDS_MITIGATION_OFF;</div><div class='ctx'> </div><div class='ctx'> static const char * const gds_strings[] = {</div><div class='ctx'> 	[GDS_MITIGATION_OFF]		= "Vulnerable",</div><div class='hunk'>@@ -776,7 +909,7 @@ void update_gds_msr(void)</div><div class='ctx'> </div><div class='ctx'> 	switch (gds_mitigation) {</div><div class='ctx'> 	case GDS_MITIGATION_OFF:</div><div class='del'>-		rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='add'>+		rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='ctx'> 		mcu_ctrl |= GDS_MITG_DIS;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case GDS_MITIGATION_FULL_LOCKED:</div><div class='hunk'>@@ -786,23 +919,24 @@ void update_gds_msr(void)</div><div class='ctx'> 		 * CPUs.</div><div class='ctx'> 		 */</div><div class='ctx'> 	case GDS_MITIGATION_FULL:</div><div class='del'>-		rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='add'>+		rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='ctx'> 		mcu_ctrl &amp;= ~GDS_MITG_DIS;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case GDS_MITIGATION_FORCE:</div><div class='ctx'> 	case GDS_MITIGATION_UCODE_NEEDED:</div><div class='ctx'> 	case GDS_MITIGATION_HYPERVISOR:</div><div class='add'>+	case GDS_MITIGATION_AUTO:</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='add'>+	wrmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check to make sure that the WRMSR value was not ignored. Writes to</div><div class='ctx'> 	 * GDS_MITG_DIS will be ignored if this processor is locked but the boot</div><div class='ctx'> 	 * processor was not.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl_after);</div><div class='add'>+	rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl_after);</div><div class='ctx'> 	WARN_ON_ONCE(mcu_ctrl != mcu_ctrl_after);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -815,33 +949,28 @@ static void __init gds_select_mitigation(void)</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {</div><div class='ctx'> 		gds_mitigation = GDS_MITIGATION_HYPERVISOR;</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_mitigations_off())</div><div class='ctx'> 		gds_mitigation = GDS_MITIGATION_OFF;</div><div class='ctx'> 	/* Will verify below that mitigation _can_ be disabled */</div><div class='ctx'> </div><div class='add'>+	if (gds_mitigation == GDS_MITIGATION_AUTO)</div><div class='add'>+		gds_mitigation = GDS_MITIGATION_FULL;</div><div class='add'>+</div><div class='ctx'> 	/* No microcode */</div><div class='ctx'> 	if (!(x86_arch_cap_msr &amp; ARCH_CAP_GDS_CTRL)) {</div><div class='del'>-		if (gds_mitigation == GDS_MITIGATION_FORCE) {</div><div class='del'>-			/*</div><div class='del'>-			 * This only needs to be done on the boot CPU so do it</div><div class='del'>-			 * here rather than in update_gds_msr()</div><div class='del'>-			 */</div><div class='del'>-			setup_clear_cpu_cap(X86_FEATURE_AVX);</div><div class='del'>-			pr_warn("Microcode update needed! Disabling AVX as mitigation.\n");</div><div class='del'>-		} else {</div><div class='add'>+		if (gds_mitigation != GDS_MITIGATION_FORCE)</div><div class='ctx'> 			gds_mitigation = GDS_MITIGATION_UCODE_NEEDED;</div><div class='del'>-		}</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Microcode has mitigation, use it */</div><div class='ctx'> 	if (gds_mitigation == GDS_MITIGATION_FORCE)</div><div class='ctx'> 		gds_mitigation = GDS_MITIGATION_FULL;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='add'>+	rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);</div><div class='ctx'> 	if (mcu_ctrl &amp; GDS_MITG_LOCKED) {</div><div class='ctx'> 		if (gds_mitigation == GDS_MITIGATION_OFF)</div><div class='ctx'> 			pr_warn("Mitigation locked. Disable failed.\n");</div><div class='hunk'>@@ -855,9 +984,25 @@ static void __init gds_select_mitigation(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		gds_mitigation = GDS_MITIGATION_FULL_LOCKED;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init gds_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_GDS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Microcode is present */</div><div class='add'>+	if (x86_arch_cap_msr &amp; ARCH_CAP_GDS_CTRL)</div><div class='add'>+		update_gds_msr();</div><div class='add'>+	else if (gds_mitigation == GDS_MITIGATION_FORCE) {</div><div class='add'>+		/*</div><div class='add'>+		 * This only needs to be done on the boot CPU so do it</div><div class='add'>+		 * here rather than in update_gds_msr()</div><div class='add'>+		 */</div><div class='add'>+		setup_clear_cpu_cap(X86_FEATURE_AVX);</div><div class='add'>+		pr_warn("Microcode update needed! Disabling AVX as mitigation.\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	update_gds_msr();</div><div class='del'>-out:</div><div class='ctx'> 	pr_info("%s\n", gds_strings[gds_mitigation]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -918,10 +1063,14 @@ static bool smap_works_speculatively(void)</div><div class='ctx'> </div><div class='ctx'> static void __init spectre_v1_select_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1) || cpu_mitigations_off()) {</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1) || cpu_mitigations_off())</div><div class='ctx'> 		spectre_v1_mitigation = SPECTRE_V1_MITIGATION_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init spectre_v1_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1) || cpu_mitigations_off())</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (spectre_v1_mitigation == SPECTRE_V1_MITIGATION_AUTO) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -974,8 +1123,20 @@ enum spectre_v2_mitigation spectre_v2_enabled __ro_after_init = SPECTRE_V2_NONE;</div><div class='ctx'> #undef pr_fmt</div><div class='ctx'> #define pr_fmt(fmt)     "RETBleed: " fmt</div><div class='ctx'> </div><div class='add'>+enum its_mitigation {</div><div class='add'>+	ITS_MITIGATION_OFF,</div><div class='add'>+	ITS_MITIGATION_AUTO,</div><div class='add'>+	ITS_MITIGATION_VMEXIT_ONLY,</div><div class='add'>+	ITS_MITIGATION_ALIGNED_THUNKS,</div><div class='add'>+	ITS_MITIGATION_RETPOLINE_STUFF,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static enum its_mitigation its_mitigation __ro_after_init =</div><div class='add'>+	IS_ENABLED(CONFIG_MITIGATION_ITS) ? ITS_MITIGATION_AUTO : ITS_MITIGATION_OFF;</div><div class='add'>+</div><div class='ctx'> enum retbleed_mitigation {</div><div class='ctx'> 	RETBLEED_MITIGATION_NONE,</div><div class='add'>+	RETBLEED_MITIGATION_AUTO,</div><div class='ctx'> 	RETBLEED_MITIGATION_UNRET,</div><div class='ctx'> 	RETBLEED_MITIGATION_IBPB,</div><div class='ctx'> 	RETBLEED_MITIGATION_IBRS,</div><div class='hunk'>@@ -983,14 +1144,6 @@ enum retbleed_mitigation {</div><div class='ctx'> 	RETBLEED_MITIGATION_STUFF,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum retbleed_mitigation_cmd {</div><div class='del'>-	RETBLEED_CMD_OFF,</div><div class='del'>-	RETBLEED_CMD_AUTO,</div><div class='del'>-	RETBLEED_CMD_UNRET,</div><div class='del'>-	RETBLEED_CMD_IBPB,</div><div class='del'>-	RETBLEED_CMD_STUFF,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const char * const retbleed_strings[] = {</div><div class='ctx'> 	[RETBLEED_MITIGATION_NONE]	= "Vulnerable",</div><div class='ctx'> 	[RETBLEED_MITIGATION_UNRET]	= "Mitigation: untrained return thunk",</div><div class='hunk'>@@ -1001,9 +1154,7 @@ static const char * const retbleed_strings[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static enum retbleed_mitigation retbleed_mitigation __ro_after_init =</div><div class='del'>-	RETBLEED_MITIGATION_NONE;</div><div class='del'>-static enum retbleed_mitigation_cmd retbleed_cmd __ro_after_init =</div><div class='del'>-	IS_ENABLED(CONFIG_MITIGATION_RETBLEED) ? RETBLEED_CMD_AUTO : RETBLEED_CMD_OFF;</div><div class='add'>+	IS_ENABLED(CONFIG_MITIGATION_RETBLEED) ? RETBLEED_MITIGATION_AUTO : RETBLEED_MITIGATION_NONE;</div><div class='ctx'> </div><div class='ctx'> static int __ro_after_init retbleed_nosmt = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1020,15 +1171,15 @@ static int __init retbleed_parse_cmdline(char *str)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!strcmp(str, "off")) {</div><div class='del'>-			retbleed_cmd = RETBLEED_CMD_OFF;</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_NONE;</div><div class='ctx'> 		} else if (!strcmp(str, "auto")) {</div><div class='del'>-			retbleed_cmd = RETBLEED_CMD_AUTO;</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_AUTO;</div><div class='ctx'> 		} else if (!strcmp(str, "unret")) {</div><div class='del'>-			retbleed_cmd = RETBLEED_CMD_UNRET;</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_UNRET;</div><div class='ctx'> 		} else if (!strcmp(str, "ibpb")) {</div><div class='del'>-			retbleed_cmd = RETBLEED_CMD_IBPB;</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_IBPB;</div><div class='ctx'> 		} else if (!strcmp(str, "stuff")) {</div><div class='del'>-			retbleed_cmd = RETBLEED_CMD_STUFF;</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_STUFF;</div><div class='ctx'> 		} else if (!strcmp(str, "nosmt")) {</div><div class='ctx'> 			retbleed_nosmt = true;</div><div class='ctx'> 		} else if (!strcmp(str, "force")) {</div><div class='hunk'>@@ -1049,77 +1200,122 @@ early_param("retbleed", retbleed_parse_cmdline);</div><div class='ctx'> </div><div class='ctx'> static void __init retbleed_select_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	bool mitigate_smt = false;</div><div class='del'>-</div><div class='del'>-	if (!boot_cpu_has_bug(X86_BUG_RETBLEED) || cpu_mitigations_off())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	switch (retbleed_cmd) {</div><div class='del'>-	case RETBLEED_CMD_OFF:</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_RETBLEED) || cpu_mitigations_off()) {</div><div class='add'>+		retbleed_mitigation = RETBLEED_MITIGATION_NONE;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	case RETBLEED_CMD_UNRET:</div><div class='del'>-		if (IS_ENABLED(CONFIG_MITIGATION_UNRET_ENTRY)) {</div><div class='del'>-			retbleed_mitigation = RETBLEED_MITIGATION_UNRET;</div><div class='del'>-		} else {</div><div class='add'>+	switch (retbleed_mitigation) {</div><div class='add'>+	case RETBLEED_MITIGATION_UNRET:</div><div class='add'>+		if (!IS_ENABLED(CONFIG_MITIGATION_UNRET_ENTRY)) {</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_AUTO;</div><div class='ctx'> 			pr_err("WARNING: kernel not compiled with MITIGATION_UNRET_ENTRY.\n");</div><div class='del'>-			goto do_cmd_auto;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='del'>-	case RETBLEED_CMD_IBPB:</div><div class='add'>+	case RETBLEED_MITIGATION_IBPB:</div><div class='ctx'> 		if (!boot_cpu_has(X86_FEATURE_IBPB)) {</div><div class='ctx'> 			pr_err("WARNING: CPU does not support IBPB.\n");</div><div class='del'>-			goto do_cmd_auto;</div><div class='del'>-		} else if (IS_ENABLED(CONFIG_MITIGATION_IBPB_ENTRY)) {</div><div class='del'>-			retbleed_mitigation = RETBLEED_MITIGATION_IBPB;</div><div class='del'>-		} else {</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_AUTO;</div><div class='add'>+		} else if (!IS_ENABLED(CONFIG_MITIGATION_IBPB_ENTRY)) {</div><div class='ctx'> 			pr_err("WARNING: kernel not compiled with MITIGATION_IBPB_ENTRY.\n");</div><div class='del'>-			goto do_cmd_auto;</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_AUTO;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case RETBLEED_MITIGATION_STUFF:</div><div class='add'>+		if (!IS_ENABLED(CONFIG_MITIGATION_CALL_DEPTH_TRACKING)) {</div><div class='add'>+			pr_err("WARNING: kernel not compiled with MITIGATION_CALL_DEPTH_TRACKING.\n");</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_AUTO;</div><div class='add'>+		} else if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {</div><div class='add'>+			pr_err("WARNING: retbleed=stuff only supported for Intel CPUs.\n");</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_AUTO;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	case RETBLEED_CMD_STUFF:</div><div class='del'>-		if (IS_ENABLED(CONFIG_MITIGATION_CALL_DEPTH_TRACKING) &amp;&amp;</div><div class='del'>-		    spectre_v2_enabled == SPECTRE_V2_RETPOLINE) {</div><div class='del'>-			retbleed_mitigation = RETBLEED_MITIGATION_STUFF;</div><div class='add'>+	if (retbleed_mitigation != RETBLEED_MITIGATION_AUTO)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	/* Intel mitigation selected in retbleed_update_mitigation() */</div><div class='add'>+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||</div><div class='add'>+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {</div><div class='add'>+		if (IS_ENABLED(CONFIG_MITIGATION_UNRET_ENTRY))</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_UNRET;</div><div class='add'>+		else if (IS_ENABLED(CONFIG_MITIGATION_IBPB_ENTRY) &amp;&amp;</div><div class='add'>+			 boot_cpu_has(X86_FEATURE_IBPB))</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_IBPB;</div><div class='add'>+		else</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_NONE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init retbleed_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_RETBLEED) || cpu_mitigations_off())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (retbleed_mitigation == RETBLEED_MITIGATION_NONE)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * retbleed=stuff is only allowed on Intel.  If stuffing can't be used</div><div class='add'>+	 * then a different mitigation will be selected below.</div><div class='add'>+	 *</div><div class='add'>+	 * its=stuff will also attempt to enable stuffing.</div><div class='add'>+	 */</div><div class='add'>+	if (retbleed_mitigation == RETBLEED_MITIGATION_STUFF ||</div><div class='add'>+	    its_mitigation == ITS_MITIGATION_RETPOLINE_STUFF) {</div><div class='add'>+		if (spectre_v2_enabled != SPECTRE_V2_RETPOLINE) {</div><div class='add'>+			pr_err("WARNING: retbleed=stuff depends on spectre_v2=retpoline\n");</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_AUTO;</div><div class='ctx'> 		} else {</div><div class='del'>-			if (IS_ENABLED(CONFIG_MITIGATION_CALL_DEPTH_TRACKING))</div><div class='del'>-				pr_err("WARNING: retbleed=stuff depends on spectre_v2=retpoline\n");</div><div class='del'>-			else</div><div class='del'>-				pr_err("WARNING: kernel not compiled with MITIGATION_CALL_DEPTH_TRACKING.\n");</div><div class='add'>+			if (retbleed_mitigation != RETBLEED_MITIGATION_STUFF)</div><div class='add'>+				pr_info("Retbleed mitigation updated to stuffing\n");</div><div class='ctx'> </div><div class='del'>-			goto do_cmd_auto;</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_STUFF;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-do_cmd_auto:</div><div class='del'>-	case RETBLEED_CMD_AUTO:</div><div class='del'>-		if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||</div><div class='del'>-		    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {</div><div class='del'>-			if (IS_ENABLED(CONFIG_MITIGATION_UNRET_ENTRY))</div><div class='del'>-				retbleed_mitigation = RETBLEED_MITIGATION_UNRET;</div><div class='del'>-			else if (IS_ENABLED(CONFIG_MITIGATION_IBPB_ENTRY) &amp;&amp;</div><div class='del'>-				 boot_cpu_has(X86_FEATURE_IBPB))</div><div class='del'>-				retbleed_mitigation = RETBLEED_MITIGATION_IBPB;</div><div class='add'>+	}</div><div class='add'>+	/*</div><div class='add'>+	 * Let IBRS trump all on Intel without affecting the effects of the</div><div class='add'>+	 * retbleed= cmdline option except for call depth based stuffing</div><div class='add'>+	 */</div><div class='add'>+	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {</div><div class='add'>+		switch (spectre_v2_enabled) {</div><div class='add'>+		case SPECTRE_V2_IBRS:</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_IBRS;</div><div class='add'>+			break;</div><div class='add'>+		case SPECTRE_V2_EIBRS:</div><div class='add'>+		case SPECTRE_V2_EIBRS_RETPOLINE:</div><div class='add'>+		case SPECTRE_V2_EIBRS_LFENCE:</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_EIBRS;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			if (retbleed_mitigation != RETBLEED_MITIGATION_STUFF)</div><div class='add'>+				pr_err(RETBLEED_INTEL_MSG);</div><div class='ctx'> 		}</div><div class='add'>+		/* If nothing has set the mitigation yet, default to NONE. */</div><div class='add'>+		if (retbleed_mitigation == RETBLEED_MITIGATION_AUTO)</div><div class='add'>+			retbleed_mitigation = RETBLEED_MITIGATION_NONE;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	pr_info("%s\n", retbleed_strings[retbleed_mitigation]);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * The Intel mitigation (IBRS or eIBRS) was already selected in</div><div class='del'>-		 * spectre_v2_select_mitigation().  'retbleed_mitigation' will</div><div class='del'>-		 * be set accordingly below.</div><div class='del'>-		 */</div><div class='ctx'> </div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+static void __init retbleed_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	bool mitigate_smt = false;</div><div class='ctx'> </div><div class='ctx'> 	switch (retbleed_mitigation) {</div><div class='add'>+	case RETBLEED_MITIGATION_NONE:</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	case RETBLEED_MITIGATION_UNRET:</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_UNRET);</div><div class='ctx'> </div><div class='del'>-		x86_return_thunk = retbleed_return_thunk;</div><div class='add'>+		set_return_thunk(retbleed_return_thunk);</div><div class='ctx'> </div><div class='ctx'> 		if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &amp;&amp;</div><div class='ctx'> 		    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)</div><div class='hunk'>@@ -1142,7 +1338,7 @@ do_cmd_auto:</div><div class='ctx'> 		setup_clear_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * There is no need for RSB filling: entry_ibpb() ensures</div><div class='add'>+		 * There is no need for RSB filling: write_ibpb() ensures</div><div class='ctx'> 		 * all predictions, including the RSB, are invalidated,</div><div class='ctx'> 		 * regardless of IBPB implementation.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1154,7 +1350,7 @@ do_cmd_auto:</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_CALL_DEPTH);</div><div class='ctx'> </div><div class='del'>-		x86_return_thunk = call_depth_return_thunk;</div><div class='add'>+		set_return_thunk(call_depth_return_thunk);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1164,28 +1360,131 @@ do_cmd_auto:</div><div class='ctx'> 	if (mitigate_smt &amp;&amp; !boot_cpu_has(X86_FEATURE_STIBP) &amp;&amp;</div><div class='ctx'> 	    (retbleed_nosmt || cpu_mitigations_auto_nosmt()))</div><div class='ctx'> 		cpu_smt_disable(false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#undef pr_fmt</div><div class='add'>+#define pr_fmt(fmt)     "ITS: " fmt</div><div class='add'>+</div><div class='add'>+static const char * const its_strings[] = {</div><div class='add'>+	[ITS_MITIGATION_OFF]			= "Vulnerable",</div><div class='add'>+	[ITS_MITIGATION_VMEXIT_ONLY]		= "Mitigation: Vulnerable, KVM: Not affected",</div><div class='add'>+	[ITS_MITIGATION_ALIGNED_THUNKS]		= "Mitigation: Aligned branch/return thunks",</div><div class='add'>+	[ITS_MITIGATION_RETPOLINE_STUFF]	= "Mitigation: Retpolines, Stuffing RSB",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init its_parse_cmdline(char *str)</div><div class='add'>+{</div><div class='add'>+	if (!str)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_MITIGATION_ITS)) {</div><div class='add'>+		pr_err("Mitigation disabled at compile time, ignoring option (%s)", str);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!strcmp(str, "off")) {</div><div class='add'>+		its_mitigation = ITS_MITIGATION_OFF;</div><div class='add'>+	} else if (!strcmp(str, "on")) {</div><div class='add'>+		its_mitigation = ITS_MITIGATION_ALIGNED_THUNKS;</div><div class='add'>+	} else if (!strcmp(str, "force")) {</div><div class='add'>+		its_mitigation = ITS_MITIGATION_ALIGNED_THUNKS;</div><div class='add'>+		setup_force_cpu_bug(X86_BUG_ITS);</div><div class='add'>+	} else if (!strcmp(str, "vmexit")) {</div><div class='add'>+		its_mitigation = ITS_MITIGATION_VMEXIT_ONLY;</div><div class='add'>+	} else if (!strcmp(str, "stuff")) {</div><div class='add'>+		its_mitigation = ITS_MITIGATION_RETPOLINE_STUFF;</div><div class='add'>+	} else {</div><div class='add'>+		pr_err("Ignoring unknown indirect_target_selection option (%s).", str);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+early_param("indirect_target_selection", its_parse_cmdline);</div><div class='add'>+</div><div class='add'>+static void __init its_select_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_ITS) || cpu_mitigations_off()) {</div><div class='add'>+		its_mitigation = ITS_MITIGATION_OFF;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (its_mitigation == ITS_MITIGATION_AUTO)</div><div class='add'>+		its_mitigation = ITS_MITIGATION_ALIGNED_THUNKS;</div><div class='add'>+</div><div class='add'>+	if (its_mitigation == ITS_MITIGATION_OFF)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_MITIGATION_RETPOLINE) ||</div><div class='add'>+	    !IS_ENABLED(CONFIG_MITIGATION_RETHUNK)) {</div><div class='add'>+		pr_err("WARNING: ITS mitigation depends on retpoline and rethunk support\n");</div><div class='add'>+		its_mitigation = ITS_MITIGATION_OFF;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B)) {</div><div class='add'>+		pr_err("WARNING: ITS mitigation is not compatible with CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B\n");</div><div class='add'>+		its_mitigation = ITS_MITIGATION_OFF;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (its_mitigation == ITS_MITIGATION_RETPOLINE_STUFF &amp;&amp;</div><div class='add'>+	    !IS_ENABLED(CONFIG_MITIGATION_CALL_DEPTH_TRACKING)) {</div><div class='add'>+		pr_err("RSB stuff mitigation not supported, using default\n");</div><div class='add'>+		its_mitigation = ITS_MITIGATION_ALIGNED_THUNKS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (its_mitigation == ITS_MITIGATION_VMEXIT_ONLY &amp;&amp;</div><div class='add'>+	    !boot_cpu_has_bug(X86_BUG_ITS_NATIVE_ONLY))</div><div class='add'>+		its_mitigation = ITS_MITIGATION_ALIGNED_THUNKS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init its_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_ITS) || cpu_mitigations_off())</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (spectre_v2_enabled) {</div><div class='add'>+	case SPECTRE_V2_NONE:</div><div class='add'>+		pr_err("WARNING: Spectre-v2 mitigation is off, disabling ITS\n");</div><div class='add'>+		its_mitigation = ITS_MITIGATION_OFF;</div><div class='add'>+		break;</div><div class='add'>+	case SPECTRE_V2_RETPOLINE:</div><div class='add'>+		/* Retpoline+CDT mitigates ITS */</div><div class='add'>+		if (retbleed_mitigation == RETBLEED_MITIGATION_STUFF)</div><div class='add'>+			its_mitigation = ITS_MITIGATION_RETPOLINE_STUFF;</div><div class='add'>+		break;</div><div class='add'>+	case SPECTRE_V2_LFENCE:</div><div class='add'>+	case SPECTRE_V2_EIBRS_LFENCE:</div><div class='add'>+		pr_err("WARNING: ITS mitigation is not compatible with lfence mitigation\n");</div><div class='add'>+		its_mitigation = ITS_MITIGATION_OFF;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Let IBRS trump all on Intel without affecting the effects of the</div><div class='del'>-	 * retbleed= cmdline option except for call depth based stuffing</div><div class='add'>+	 * retbleed_update_mitigation() will try to do stuffing if its=stuff.</div><div class='add'>+	 * If it can't, such as if spectre_v2!=retpoline, then fall back to</div><div class='add'>+	 * aligned thunks.</div><div class='ctx'> 	 */</div><div class='del'>-	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {</div><div class='del'>-		switch (spectre_v2_enabled) {</div><div class='del'>-		case SPECTRE_V2_IBRS:</div><div class='del'>-			retbleed_mitigation = RETBLEED_MITIGATION_IBRS;</div><div class='del'>-			break;</div><div class='del'>-		case SPECTRE_V2_EIBRS:</div><div class='del'>-		case SPECTRE_V2_EIBRS_RETPOLINE:</div><div class='del'>-		case SPECTRE_V2_EIBRS_LFENCE:</div><div class='del'>-			retbleed_mitigation = RETBLEED_MITIGATION_EIBRS;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			if (retbleed_mitigation != RETBLEED_MITIGATION_STUFF)</div><div class='del'>-				pr_err(RETBLEED_INTEL_MSG);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (its_mitigation == ITS_MITIGATION_RETPOLINE_STUFF &amp;&amp;</div><div class='add'>+	    retbleed_mitigation != RETBLEED_MITIGATION_STUFF)</div><div class='add'>+		its_mitigation = ITS_MITIGATION_ALIGNED_THUNKS;</div><div class='ctx'> </div><div class='del'>-	pr_info("%s\n", retbleed_strings[retbleed_mitigation]);</div><div class='add'>+	pr_info("%s\n", its_strings[its_mitigation]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init its_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	/* its=stuff forces retbleed stuffing and is enabled there. */</div><div class='add'>+	if (its_mitigation != ITS_MITIGATION_ALIGNED_THUNKS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_RETPOLINE))</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_INDIRECT_THUNK_ITS);</div><div class='add'>+</div><div class='add'>+	setup_force_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='add'>+	set_return_thunk(its_return_thunk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #undef pr_fmt</div><div class='hunk'>@@ -1265,6 +1564,8 @@ enum spectre_v2_mitigation_cmd {</div><div class='ctx'> 	SPECTRE_V2_CMD_IBRS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static enum spectre_v2_mitigation_cmd spectre_v2_cmd __ro_after_init = SPECTRE_V2_CMD_AUTO;</div><div class='add'>+</div><div class='ctx'> enum spectre_v2_user_cmd {</div><div class='ctx'> 	SPECTRE_V2_USER_CMD_NONE,</div><div class='ctx'> 	SPECTRE_V2_USER_CMD_AUTO,</div><div class='hunk'>@@ -1303,31 +1604,18 @@ static void __init spec_v2_user_print_cond(const char *reason, bool secure)</div><div class='ctx'> 		pr_info("spectre_v2_user=%s forced on command line.\n", reason);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __ro_after_init enum spectre_v2_mitigation_cmd spectre_v2_cmd;</div><div class='del'>-</div><div class='del'>-static enum spectre_v2_user_cmd __init</div><div class='del'>-spectre_v2_parse_user_cmdline(void)</div><div class='add'>+static enum spectre_v2_user_cmd __init spectre_v2_parse_user_cmdline(void)</div><div class='ctx'> {</div><div class='del'>-	enum spectre_v2_user_cmd mode;</div><div class='ctx'> 	char arg[20];</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='del'>-	mode = IS_ENABLED(CONFIG_MITIGATION_SPECTRE_V2) ?</div><div class='del'>-		SPECTRE_V2_USER_CMD_AUTO : SPECTRE_V2_USER_CMD_NONE;</div><div class='del'>-</div><div class='del'>-	switch (spectre_v2_cmd) {</div><div class='del'>-	case SPECTRE_V2_CMD_NONE:</div><div class='add'>+	if (cpu_mitigations_off() || !IS_ENABLED(CONFIG_MITIGATION_SPECTRE_V2))</div><div class='ctx'> 		return SPECTRE_V2_USER_CMD_NONE;</div><div class='del'>-	case SPECTRE_V2_CMD_FORCE:</div><div class='del'>-		return SPECTRE_V2_USER_CMD_FORCE;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = cmdline_find_option(boot_command_line, "spectre_v2_user",</div><div class='ctx'> 				  arg, sizeof(arg));</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		return mode;</div><div class='add'>+		return SPECTRE_V2_USER_CMD_AUTO;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(v2_user_options); i++) {</div><div class='ctx'> 		if (match_option(arg, ret, v2_user_options[i].option)) {</div><div class='hunk'>@@ -1338,7 +1626,7 @@ spectre_v2_parse_user_cmdline(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pr_err("Unknown user space protection option (%s). Switching to default\n", arg);</div><div class='del'>-	return mode;</div><div class='add'>+	return SPECTRE_V2_USER_CMD_AUTO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool spectre_v2_in_ibrs_mode(enum spectre_v2_mitigation mode)</div><div class='hunk'>@@ -1346,60 +1634,72 @@ static inline bool spectre_v2_in_ibrs_mode(enum spectre_v2_mitigation mode)</div><div class='ctx'> 	return spectre_v2_in_eibrs_mode(mode) || mode == SPECTRE_V2_IBRS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init</div><div class='del'>-spectre_v2_user_select_mitigation(void)</div><div class='add'>+static void __init spectre_v2_user_select_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	enum spectre_v2_user_mitigation mode = SPECTRE_V2_USER_NONE;</div><div class='del'>-	enum spectre_v2_user_cmd cmd;</div><div class='del'>-</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_IBPB) &amp;&amp; !boot_cpu_has(X86_FEATURE_STIBP))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	cmd = spectre_v2_parse_user_cmdline();</div><div class='del'>-	switch (cmd) {</div><div class='add'>+	switch (spectre_v2_parse_user_cmdline()) {</div><div class='ctx'> 	case SPECTRE_V2_USER_CMD_NONE:</div><div class='del'>-		goto set_mode;</div><div class='add'>+		return;</div><div class='ctx'> 	case SPECTRE_V2_USER_CMD_FORCE:</div><div class='del'>-		mode = SPECTRE_V2_USER_STRICT;</div><div class='add'>+		spectre_v2_user_ibpb  = SPECTRE_V2_USER_STRICT;</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_STRICT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPECTRE_V2_USER_CMD_AUTO:</div><div class='ctx'> 	case SPECTRE_V2_USER_CMD_PRCTL:</div><div class='add'>+		spectre_v2_user_ibpb  = SPECTRE_V2_USER_PRCTL;</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_PRCTL;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPECTRE_V2_USER_CMD_PRCTL_IBPB:</div><div class='del'>-		mode = SPECTRE_V2_USER_PRCTL;</div><div class='add'>+		spectre_v2_user_ibpb  = SPECTRE_V2_USER_STRICT;</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_PRCTL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPECTRE_V2_USER_CMD_SECCOMP:</div><div class='add'>+		if (IS_ENABLED(CONFIG_SECCOMP))</div><div class='add'>+			spectre_v2_user_ibpb = SPECTRE_V2_USER_SECCOMP;</div><div class='add'>+		else</div><div class='add'>+			spectre_v2_user_ibpb = SPECTRE_V2_USER_PRCTL;</div><div class='add'>+		spectre_v2_user_stibp = spectre_v2_user_ibpb;</div><div class='add'>+		break;</div><div class='ctx'> 	case SPECTRE_V2_USER_CMD_SECCOMP_IBPB:</div><div class='add'>+		spectre_v2_user_ibpb = SPECTRE_V2_USER_STRICT;</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_SECCOMP))</div><div class='del'>-			mode = SPECTRE_V2_USER_SECCOMP;</div><div class='add'>+			spectre_v2_user_stibp = SPECTRE_V2_USER_SECCOMP;</div><div class='ctx'> 		else</div><div class='del'>-			mode = SPECTRE_V2_USER_PRCTL;</div><div class='add'>+			spectre_v2_user_stibp = SPECTRE_V2_USER_PRCTL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initialize Indirect Branch Prediction Barrier */</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_IBPB)) {</div><div class='del'>-		static_branch_enable(&amp;switch_vcpu_ibpb);</div><div class='add'>+	/*</div><div class='add'>+	 * At this point, an STIBP mode other than "off" has been set.</div><div class='add'>+	 * If STIBP support is not being forced, check if STIBP always-on</div><div class='add'>+	 * is preferred.</div><div class='add'>+	 */</div><div class='add'>+	if ((spectre_v2_user_stibp == SPECTRE_V2_USER_PRCTL ||</div><div class='add'>+	     spectre_v2_user_stibp == SPECTRE_V2_USER_SECCOMP) &amp;&amp;</div><div class='add'>+	    boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON))</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_STRICT_PREFERRED;</div><div class='ctx'> </div><div class='del'>-		spectre_v2_user_ibpb = mode;</div><div class='del'>-		switch (cmd) {</div><div class='del'>-		case SPECTRE_V2_USER_CMD_NONE:</div><div class='del'>-			break;</div><div class='del'>-		case SPECTRE_V2_USER_CMD_FORCE:</div><div class='del'>-		case SPECTRE_V2_USER_CMD_PRCTL_IBPB:</div><div class='del'>-		case SPECTRE_V2_USER_CMD_SECCOMP_IBPB:</div><div class='del'>-			static_branch_enable(&amp;switch_mm_always_ibpb);</div><div class='del'>-			spectre_v2_user_ibpb = SPECTRE_V2_USER_STRICT;</div><div class='del'>-			break;</div><div class='del'>-		case SPECTRE_V2_USER_CMD_PRCTL:</div><div class='del'>-		case SPECTRE_V2_USER_CMD_AUTO:</div><div class='del'>-		case SPECTRE_V2_USER_CMD_SECCOMP:</div><div class='del'>-			static_branch_enable(&amp;switch_mm_cond_ibpb);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_IBPB))</div><div class='add'>+		spectre_v2_user_ibpb = SPECTRE_V2_USER_NONE;</div><div class='ctx'> </div><div class='del'>-		pr_info("mitigation: Enabling %s Indirect Branch Prediction Barrier\n",</div><div class='del'>-			static_key_enabled(&amp;switch_mm_always_ibpb) ?</div><div class='del'>-			"always-on" : "conditional");</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_STIBP))</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init spectre_v2_user_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_IBPB) &amp;&amp; !boot_cpu_has(X86_FEATURE_STIBP))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* The spectre_v2 cmd line can override spectre_v2_user options */</div><div class='add'>+	if (spectre_v2_cmd == SPECTRE_V2_CMD_NONE) {</div><div class='add'>+		spectre_v2_user_ibpb = SPECTRE_V2_USER_NONE;</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_NONE;</div><div class='add'>+	} else if (spectre_v2_cmd == SPECTRE_V2_CMD_FORCE) {</div><div class='add'>+		spectre_v2_user_ibpb = SPECTRE_V2_USER_STRICT;</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_STRICT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1417,30 +1717,44 @@ spectre_v2_user_select_mitigation(void)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_STIBP) ||</div><div class='ctx'> 	    !cpu_smt_possible() ||</div><div class='ctx'> 	    (spectre_v2_in_eibrs_mode(spectre_v2_enabled) &amp;&amp;</div><div class='del'>-	     !boot_cpu_has(X86_FEATURE_AUTOIBRS)))</div><div class='add'>+	     !boot_cpu_has(X86_FEATURE_AUTOIBRS))) {</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_NONE;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * At this point, an STIBP mode other than "off" has been set.</div><div class='del'>-	 * If STIBP support is not being forced, check if STIBP always-on</div><div class='del'>-	 * is preferred.</div><div class='del'>-	 */</div><div class='del'>-	if (mode != SPECTRE_V2_USER_STRICT &amp;&amp;</div><div class='del'>-	    boot_cpu_has(X86_FEATURE_AMD_STIBP_ALWAYS_ON))</div><div class='del'>-		mode = SPECTRE_V2_USER_STRICT_PREFERRED;</div><div class='del'>-</div><div class='del'>-	if (retbleed_mitigation == RETBLEED_MITIGATION_UNRET ||</div><div class='del'>-	    retbleed_mitigation == RETBLEED_MITIGATION_IBPB) {</div><div class='del'>-		if (mode != SPECTRE_V2_USER_STRICT &amp;&amp;</div><div class='del'>-		    mode != SPECTRE_V2_USER_STRICT_PREFERRED)</div><div class='add'>+	if (spectre_v2_user_stibp != SPECTRE_V2_USER_NONE &amp;&amp;</div><div class='add'>+	    (retbleed_mitigation == RETBLEED_MITIGATION_UNRET ||</div><div class='add'>+	     retbleed_mitigation == RETBLEED_MITIGATION_IBPB)) {</div><div class='add'>+		if (spectre_v2_user_stibp != SPECTRE_V2_USER_STRICT &amp;&amp;</div><div class='add'>+		    spectre_v2_user_stibp != SPECTRE_V2_USER_STRICT_PREFERRED)</div><div class='ctx'> 			pr_info("Selecting STIBP always-on mode to complement retbleed mitigation\n");</div><div class='del'>-		mode = SPECTRE_V2_USER_STRICT_PREFERRED;</div><div class='add'>+		spectre_v2_user_stibp = SPECTRE_V2_USER_STRICT_PREFERRED;</div><div class='ctx'> 	}</div><div class='add'>+	pr_info("%s\n", spectre_v2_user_strings[spectre_v2_user_stibp]);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	spectre_v2_user_stibp = mode;</div><div class='add'>+static void __init spectre_v2_user_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	/* Initialize Indirect Branch Prediction Barrier */</div><div class='add'>+	if (spectre_v2_user_ibpb != SPECTRE_V2_USER_NONE) {</div><div class='add'>+		static_branch_enable(&amp;switch_vcpu_ibpb);</div><div class='add'>+</div><div class='add'>+		switch (spectre_v2_user_ibpb) {</div><div class='add'>+		case SPECTRE_V2_USER_STRICT:</div><div class='add'>+			static_branch_enable(&amp;switch_mm_always_ibpb);</div><div class='add'>+			break;</div><div class='add'>+		case SPECTRE_V2_USER_PRCTL:</div><div class='add'>+		case SPECTRE_V2_USER_SECCOMP:</div><div class='add'>+			static_branch_enable(&amp;switch_mm_cond_ibpb);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-set_mode:</div><div class='del'>-	pr_info("%s\n", spectre_v2_user_strings[mode]);</div><div class='add'>+		pr_info("mitigation: Enabling %s Indirect Branch Prediction Barrier\n",</div><div class='add'>+			static_key_enabled(&amp;switch_mm_always_ibpb) ?</div><div class='add'>+			"always-on" : "conditional");</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char * const spectre_v2_strings[] = {</div><div class='hunk'>@@ -1592,51 +1906,54 @@ static void __init spec_ctrl_disable_kernel_rrsba(void)</div><div class='ctx'> 	rrsba_disabled = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __init spectre_v2_determine_rsb_fill_type_at_vmexit(enum spectre_v2_mitigation mode)</div><div class='add'>+static void __init spectre_v2_select_rsb_mitigation(enum spectre_v2_mitigation mode)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * Similar to context switches, there are two types of RSB attacks</div><div class='del'>-	 * after VM exit:</div><div class='add'>+	 * WARNING! There are many subtleties to consider when changing *any*</div><div class='add'>+	 * code related to RSB-related mitigations.  Before doing so, carefully</div><div class='add'>+	 * read the following document, and update if necessary:</div><div class='ctx'> 	 *</div><div class='del'>-	 * 1) RSB underflow</div><div class='add'>+	 *   Documentation/admin-guide/hw-vuln/rsb.rst</div><div class='ctx'> 	 *</div><div class='del'>-	 * 2) Poisoned RSB entry</div><div class='add'>+	 * In an overly simplified nutshell:</div><div class='ctx'> 	 *</div><div class='del'>-	 * When retpoline is enabled, both are mitigated by filling/clearing</div><div class='del'>-	 * the RSB.</div><div class='add'>+	 *   - User-&gt;user RSB attacks are conditionally mitigated during</div><div class='add'>+	 *     context switches by cond_mitigation -&gt; write_ibpb().</div><div class='ctx'> 	 *</div><div class='del'>-	 * When IBRS is enabled, while #1 would be mitigated by the IBRS branch</div><div class='del'>-	 * prediction isolation protections, RSB still needs to be cleared</div><div class='del'>-	 * because of #2.  Note that SMEP provides no protection here, unlike</div><div class='del'>-	 * user-space-poisoned RSB entries.</div><div class='add'>+	 *   - User-&gt;kernel and guest-&gt;host attacks are mitigated by eIBRS or</div><div class='add'>+	 *     RSB filling.</div><div class='ctx'> 	 *</div><div class='del'>-	 * eIBRS should protect against RSB poisoning, but if the EIBRS_PBRSB</div><div class='del'>-	 * bug is present then a LITE version of RSB protection is required,</div><div class='del'>-	 * just a single call needs to retire before a RET is executed.</div><div class='add'>+	 *     Though, depending on config, note that other alternative</div><div class='add'>+	 *     mitigations may end up getting used instead, e.g., IBPB on</div><div class='add'>+	 *     entry/vmexit, call depth tracking, or return thunks.</div><div class='ctx'> 	 */</div><div class='add'>+</div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case SPECTRE_V2_NONE:</div><div class='del'>-		return;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	case SPECTRE_V2_EIBRS_LFENCE:</div><div class='ctx'> 	case SPECTRE_V2_EIBRS:</div><div class='add'>+	case SPECTRE_V2_EIBRS_LFENCE:</div><div class='add'>+	case SPECTRE_V2_EIBRS_RETPOLINE:</div><div class='ctx'> 		if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) {</div><div class='del'>-			setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);</div><div class='ctx'> 			pr_info("Spectre v2 / PBRSB-eIBRS: Retire a single CALL on VMEXIT\n");</div><div class='add'>+			setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT_LITE);</div><div class='ctx'> 		}</div><div class='del'>-		return;</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	case SPECTRE_V2_EIBRS_RETPOLINE:</div><div class='ctx'> 	case SPECTRE_V2_RETPOLINE:</div><div class='ctx'> 	case SPECTRE_V2_LFENCE:</div><div class='ctx'> 	case SPECTRE_V2_IBRS:</div><div class='add'>+		pr_info("Spectre v2 / SpectreRSB: Filling RSB on context switch and VMEXIT\n");</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_RSB_VMEXIT);</div><div class='del'>-		pr_info("Spectre v2 / SpectreRSB : Filling RSB on VMEXIT\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation at VM exit");</div><div class='del'>-	dump_stack();</div><div class='add'>+	default:</div><div class='add'>+		pr_warn_once("Unknown Spectre v2 mode, disabling RSB mitigation\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1657,12 +1974,13 @@ static bool __init spec_ctrl_bhi_dis(void)</div><div class='ctx'> </div><div class='ctx'> enum bhi_mitigations {</div><div class='ctx'> 	BHI_MITIGATION_OFF,</div><div class='add'>+	BHI_MITIGATION_AUTO,</div><div class='ctx'> 	BHI_MITIGATION_ON,</div><div class='ctx'> 	BHI_MITIGATION_VMEXIT_ONLY,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static enum bhi_mitigations bhi_mitigation __ro_after_init =</div><div class='del'>-	IS_ENABLED(CONFIG_MITIGATION_SPECTRE_BHI) ? BHI_MITIGATION_ON : BHI_MITIGATION_OFF;</div><div class='add'>+	IS_ENABLED(CONFIG_MITIGATION_SPECTRE_BHI) ? BHI_MITIGATION_AUTO : BHI_MITIGATION_OFF;</div><div class='ctx'> </div><div class='ctx'> static int __init spectre_bhi_parse_cmdline(char *str)</div><div class='ctx'> {</div><div class='hunk'>@@ -1684,6 +2002,25 @@ early_param("spectre_bhi", spectre_bhi_parse_cmdline);</div><div class='ctx'> </div><div class='ctx'> static void __init bhi_select_mitigation(void)</div><div class='ctx'> {</div><div class='add'>+	if (!boot_cpu_has(X86_BUG_BHI) || cpu_mitigations_off())</div><div class='add'>+		bhi_mitigation = BHI_MITIGATION_OFF;</div><div class='add'>+</div><div class='add'>+	if (bhi_mitigation == BHI_MITIGATION_AUTO)</div><div class='add'>+		bhi_mitigation = BHI_MITIGATION_ON;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init bhi_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (spectre_v2_cmd == SPECTRE_V2_CMD_NONE)</div><div class='add'>+		bhi_mitigation = BHI_MITIGATION_OFF;</div><div class='add'>+</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2) &amp;&amp;</div><div class='add'>+	     spectre_v2_cmd == SPECTRE_V2_CMD_AUTO)</div><div class='add'>+		bhi_mitigation = BHI_MITIGATION_OFF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init bhi_apply_mitigation(void)</div><div class='add'>+{</div><div class='ctx'> 	if (bhi_mitigation == BHI_MITIGATION_OFF)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1695,95 +2032,101 @@ static void __init bhi_select_mitigation(void)</div><div class='ctx'> 			return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Mitigate in hardware if supported */</div><div class='del'>-	if (spec_ctrl_bhi_dis())</div><div class='add'>+	if (!IS_ENABLED(CONFIG_X86_64))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_X86_64))</div><div class='add'>+	/* Mitigate in hardware if supported */</div><div class='add'>+	if (spec_ctrl_bhi_dis())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (bhi_mitigation == BHI_MITIGATION_VMEXIT_ONLY) {</div><div class='ctx'> 		pr_info("Spectre BHI mitigation: SW BHB clearing on VM exit only\n");</div><div class='del'>-		setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT);</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_VMEXIT);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Spectre BHI mitigation: SW BHB clearing on syscall and VM exit\n");</div><div class='ctx'> 	setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_LOOP);</div><div class='del'>-	setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT);</div><div class='add'>+	setup_force_cpu_cap(X86_FEATURE_CLEAR_BHB_VMEXIT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init spectre_v2_select_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	enum spectre_v2_mitigation_cmd cmd = spectre_v2_parse_cmdline();</div><div class='del'>-	enum spectre_v2_mitigation mode = SPECTRE_V2_NONE;</div><div class='add'>+	spectre_v2_cmd = spectre_v2_parse_cmdline();</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If the CPU is not affected and the command line mode is NONE or AUTO</div><div class='del'>-	 * then nothing to do.</div><div class='del'>-	 */</div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2) &amp;&amp;</div><div class='del'>-	    (cmd == SPECTRE_V2_CMD_NONE || cmd == SPECTRE_V2_CMD_AUTO))</div><div class='add'>+	    (spectre_v2_cmd == SPECTRE_V2_CMD_NONE || spectre_v2_cmd == SPECTRE_V2_CMD_AUTO))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='add'>+	switch (spectre_v2_cmd) {</div><div class='ctx'> 	case SPECTRE_V2_CMD_NONE:</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_FORCE:</div><div class='ctx'> 	case SPECTRE_V2_CMD_AUTO:</div><div class='ctx'> 		if (boot_cpu_has(X86_FEATURE_IBRS_ENHANCED)) {</div><div class='del'>-			mode = SPECTRE_V2_EIBRS;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (IS_ENABLED(CONFIG_MITIGATION_IBRS_ENTRY) &amp;&amp;</div><div class='del'>-		    boot_cpu_has_bug(X86_BUG_RETBLEED) &amp;&amp;</div><div class='del'>-		    retbleed_cmd != RETBLEED_CMD_OFF &amp;&amp;</div><div class='del'>-		    retbleed_cmd != RETBLEED_CMD_STUFF &amp;&amp;</div><div class='del'>-		    boot_cpu_has(X86_FEATURE_IBRS) &amp;&amp;</div><div class='del'>-		    boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {</div><div class='del'>-			mode = SPECTRE_V2_IBRS;</div><div class='add'>+			spectre_v2_enabled = SPECTRE_V2_EIBRS;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		mode = spectre_v2_select_retpoline();</div><div class='add'>+		spectre_v2_enabled = spectre_v2_select_retpoline();</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_RETPOLINE_LFENCE:</div><div class='ctx'> 		pr_err(SPECTRE_V2_LFENCE_MSG);</div><div class='del'>-		mode = SPECTRE_V2_LFENCE;</div><div class='add'>+		spectre_v2_enabled = SPECTRE_V2_LFENCE;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_RETPOLINE_GENERIC:</div><div class='del'>-		mode = SPECTRE_V2_RETPOLINE;</div><div class='add'>+		spectre_v2_enabled = SPECTRE_V2_RETPOLINE;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_RETPOLINE:</div><div class='del'>-		mode = spectre_v2_select_retpoline();</div><div class='add'>+		spectre_v2_enabled = spectre_v2_select_retpoline();</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_IBRS:</div><div class='del'>-		mode = SPECTRE_V2_IBRS;</div><div class='add'>+		spectre_v2_enabled = SPECTRE_V2_IBRS;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_EIBRS:</div><div class='del'>-		mode = SPECTRE_V2_EIBRS;</div><div class='add'>+		spectre_v2_enabled = SPECTRE_V2_EIBRS;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_EIBRS_LFENCE:</div><div class='del'>-		mode = SPECTRE_V2_EIBRS_LFENCE;</div><div class='add'>+		spectre_v2_enabled = SPECTRE_V2_EIBRS_LFENCE;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPECTRE_V2_CMD_EIBRS_RETPOLINE:</div><div class='del'>-		mode = SPECTRE_V2_EIBRS_RETPOLINE;</div><div class='add'>+		spectre_v2_enabled = SPECTRE_V2_EIBRS_RETPOLINE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init spectre_v2_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (spectre_v2_cmd == SPECTRE_V2_CMD_AUTO &amp;&amp;</div><div class='add'>+	    !spectre_v2_in_eibrs_mode(spectre_v2_enabled)) {</div><div class='add'>+		if (IS_ENABLED(CONFIG_MITIGATION_IBRS_ENTRY) &amp;&amp;</div><div class='add'>+		    boot_cpu_has_bug(X86_BUG_RETBLEED) &amp;&amp;</div><div class='add'>+		    retbleed_mitigation != RETBLEED_MITIGATION_NONE &amp;&amp;</div><div class='add'>+		    retbleed_mitigation != RETBLEED_MITIGATION_STUFF &amp;&amp;</div><div class='add'>+		    boot_cpu_has(X86_FEATURE_IBRS) &amp;&amp;</div><div class='add'>+		    boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {</div><div class='add'>+			spectre_v2_enabled = SPECTRE_V2_IBRS;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (mode == SPECTRE_V2_EIBRS &amp;&amp; unprivileged_ebpf_enabled())</div><div class='add'>+	if (boot_cpu_has_bug(X86_BUG_SPECTRE_V2) &amp;&amp; !cpu_mitigations_off())</div><div class='add'>+		pr_info("%s\n", spectre_v2_strings[spectre_v2_enabled]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init spectre_v2_apply_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	if (spectre_v2_enabled == SPECTRE_V2_EIBRS &amp;&amp; unprivileged_ebpf_enabled())</div><div class='ctx'> 		pr_err(SPECTRE_V2_EIBRS_EBPF_MSG);</div><div class='ctx'> </div><div class='del'>-	if (spectre_v2_in_ibrs_mode(mode)) {</div><div class='add'>+	if (spectre_v2_in_ibrs_mode(spectre_v2_enabled)) {</div><div class='ctx'> 		if (boot_cpu_has(X86_FEATURE_AUTOIBRS)) {</div><div class='ctx'> 			msr_set_bit(MSR_EFER, _EFER_AUTOIBRS);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1792,8 +2135,10 @@ static void __init spectre_v2_select_mitigation(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (mode) {</div><div class='add'>+	switch (spectre_v2_enabled) {</div><div class='ctx'> 	case SPECTRE_V2_NONE:</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	case SPECTRE_V2_EIBRS:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -1819,59 +2164,12 @@ static void __init spectre_v2_select_mitigation(void)</div><div class='ctx'> 	 * JMPs gets protection against BHI and Intramode-BTI, but RET</div><div class='ctx'> 	 * prediction from a non-RSB predictor is still a risk.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mode == SPECTRE_V2_EIBRS_LFENCE ||</div><div class='del'>-	    mode == SPECTRE_V2_EIBRS_RETPOLINE ||</div><div class='del'>-	    mode == SPECTRE_V2_RETPOLINE)</div><div class='add'>+	if (spectre_v2_enabled == SPECTRE_V2_EIBRS_LFENCE ||</div><div class='add'>+	    spectre_v2_enabled == SPECTRE_V2_EIBRS_RETPOLINE ||</div><div class='add'>+	    spectre_v2_enabled == SPECTRE_V2_RETPOLINE)</div><div class='ctx'> 		spec_ctrl_disable_kernel_rrsba();</div><div class='ctx'> </div><div class='del'>-	if (boot_cpu_has(X86_BUG_BHI))</div><div class='del'>-		bhi_select_mitigation();</div><div class='del'>-</div><div class='del'>-	spectre_v2_enabled = mode;</div><div class='del'>-	pr_info("%s\n", spectre_v2_strings[mode]);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If Spectre v2 protection has been enabled, fill the RSB during a</div><div class='del'>-	 * context switch.  In general there are two types of RSB attacks</div><div class='del'>-	 * across context switches, for which the CALLs/RETs may be unbalanced.</div><div class='del'>-	 *</div><div class='del'>-	 * 1) RSB underflow</div><div class='del'>-	 *</div><div class='del'>-	 *    Some Intel parts have "bottomless RSB".  When the RSB is empty,</div><div class='del'>-	 *    speculated return targets may come from the branch predictor,</div><div class='del'>-	 *    which could have a user-poisoned BTB or BHB entry.</div><div class='del'>-	 *</div><div class='del'>-	 *    AMD has it even worse: *all* returns are speculated from the BTB,</div><div class='del'>-	 *    regardless of the state of the RSB.</div><div class='del'>-	 *</div><div class='del'>-	 *    When IBRS or eIBRS is enabled, the "user -&gt; kernel" attack</div><div class='del'>-	 *    scenario is mitigated by the IBRS branch prediction isolation</div><div class='del'>-	 *    properties, so the RSB buffer filling wouldn't be necessary to</div><div class='del'>-	 *    protect against this type of attack.</div><div class='del'>-	 *</div><div class='del'>-	 *    The "user -&gt; user" attack scenario is mitigated by RSB filling.</div><div class='del'>-	 *</div><div class='del'>-	 * 2) Poisoned RSB entry</div><div class='del'>-	 *</div><div class='del'>-	 *    If the 'next' in-kernel return stack is shorter than 'prev',</div><div class='del'>-	 *    'next' could be tricked into speculating with a user-poisoned RSB</div><div class='del'>-	 *    entry.</div><div class='del'>-	 *</div><div class='del'>-	 *    The "user -&gt; kernel" attack scenario is mitigated by SMEP and</div><div class='del'>-	 *    eIBRS.</div><div class='del'>-	 *</div><div class='del'>-	 *    The "user -&gt; user" scenario, also known as SpectreBHB, requires</div><div class='del'>-	 *    RSB clearing.</div><div class='del'>-	 *</div><div class='del'>-	 * So to mitigate all cases, unconditionally fill RSB on context</div><div class='del'>-	 * switches.</div><div class='del'>-	 *</div><div class='del'>-	 * FIXME: Is this pointless for retbleed-affected AMD?</div><div class='del'>-	 */</div><div class='del'>-	setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);</div><div class='del'>-	pr_info("Spectre v2 / SpectreRSB mitigation: Filling RSB on context switch\n");</div><div class='del'>-</div><div class='del'>-	spectre_v2_determine_rsb_fill_type_at_vmexit(mode);</div><div class='add'>+	spectre_v2_select_rsb_mitigation(spectre_v2_enabled);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Retpoline protects the kernel, but doesn't protect firmware.  IBRS</div><div class='hunk'>@@ -1879,28 +2177,26 @@ static void __init spectre_v2_select_mitigation(void)</div><div class='ctx'> 	 * firmware calls only when IBRS / Enhanced / Automatic IBRS aren't</div><div class='ctx'> 	 * otherwise enabled.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Use "mode" to check Enhanced IBRS instead of boot_cpu_has(), because</div><div class='del'>-	 * the user might select retpoline on the kernel command line and if</div><div class='del'>-	 * the CPU supports Enhanced IBRS, kernel might un-intentionally not</div><div class='del'>-	 * enable IBRS around firmware calls.</div><div class='add'>+	 * Use "spectre_v2_enabled" to check Enhanced IBRS instead of</div><div class='add'>+	 * boot_cpu_has(), because the user might select retpoline on the kernel</div><div class='add'>+	 * command line and if the CPU supports Enhanced IBRS, kernel might</div><div class='add'>+	 * un-intentionally not enable IBRS around firmware calls.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (boot_cpu_has_bug(X86_BUG_RETBLEED) &amp;&amp;</div><div class='ctx'> 	    boot_cpu_has(X86_FEATURE_IBPB) &amp;&amp;</div><div class='ctx'> 	    (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||</div><div class='ctx'> 	     boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)) {</div><div class='ctx'> </div><div class='del'>-		if (retbleed_cmd != RETBLEED_CMD_IBPB) {</div><div class='add'>+		if (retbleed_mitigation != RETBLEED_MITIGATION_IBPB) {</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_USE_IBPB_FW);</div><div class='ctx'> 			pr_info("Enabling Speculation Barrier for firmware calls\n");</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	} else if (boot_cpu_has(X86_FEATURE_IBRS) &amp;&amp; !spectre_v2_in_ibrs_mode(mode)) {</div><div class='add'>+	} else if (boot_cpu_has(X86_FEATURE_IBRS) &amp;&amp;</div><div class='add'>+		   !spectre_v2_in_ibrs_mode(spectre_v2_enabled)) {</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_USE_IBRS_FW);</div><div class='ctx'> 		pr_info("Enabling Restricted Speculation for firmware calls\n");</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* Set up IBPB and STIBP depending on the general spectre V2 command */</div><div class='del'>-	spectre_v2_cmd = cmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void update_stibp_msr(void * __unused)</div><div class='hunk'>@@ -2089,19 +2385,18 @@ static enum ssb_mitigation_cmd __init ssb_parse_cmdline(void)</div><div class='ctx'> 	return cmd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum ssb_mitigation __init __ssb_select_mitigation(void)</div><div class='add'>+static void __init ssb_select_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	enum ssb_mitigation mode = SPEC_STORE_BYPASS_NONE;</div><div class='ctx'> 	enum ssb_mitigation_cmd cmd;</div><div class='ctx'> </div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_SSBD))</div><div class='del'>-		return mode;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	cmd = ssb_parse_cmdline();</div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS) &amp;&amp;</div><div class='ctx'> 	    (cmd == SPEC_STORE_BYPASS_CMD_NONE ||</div><div class='ctx'> 	     cmd == SPEC_STORE_BYPASS_CMD_AUTO))</div><div class='del'>-		return mode;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case SPEC_STORE_BYPASS_CMD_SECCOMP:</div><div class='hunk'>@@ -2110,28 +2405,35 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)</div><div class='ctx'> 		 * enabled.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_SECCOMP))</div><div class='del'>-			mode = SPEC_STORE_BYPASS_SECCOMP;</div><div class='add'>+			ssb_mode = SPEC_STORE_BYPASS_SECCOMP;</div><div class='ctx'> 		else</div><div class='del'>-			mode = SPEC_STORE_BYPASS_PRCTL;</div><div class='add'>+			ssb_mode = SPEC_STORE_BYPASS_PRCTL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEC_STORE_BYPASS_CMD_ON:</div><div class='del'>-		mode = SPEC_STORE_BYPASS_DISABLE;</div><div class='add'>+		ssb_mode = SPEC_STORE_BYPASS_DISABLE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEC_STORE_BYPASS_CMD_AUTO:</div><div class='ctx'> 	case SPEC_STORE_BYPASS_CMD_PRCTL:</div><div class='del'>-		mode = SPEC_STORE_BYPASS_PRCTL;</div><div class='add'>+		ssb_mode = SPEC_STORE_BYPASS_PRCTL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEC_STORE_BYPASS_CMD_NONE:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	if (boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))</div><div class='add'>+		pr_info("%s\n", ssb_strings[ssb_mode]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init ssb_apply_mitigation(void)</div><div class='add'>+{</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We have three CPU feature flags that are in play here:</div><div class='ctx'> 	 *  - X86_BUG_SPEC_STORE_BYPASS - CPU is susceptible.</div><div class='ctx'> 	 *  - X86_FEATURE_SSBD - CPU is able to turn off speculative store bypass</div><div class='ctx'> 	 *  - X86_FEATURE_SPEC_STORE_BYPASS_DISABLE - engage the mitigation</div><div class='ctx'> 	 */</div><div class='del'>-	if (mode == SPEC_STORE_BYPASS_DISABLE) {</div><div class='add'>+	if (ssb_mode == SPEC_STORE_BYPASS_DISABLE) {</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Intel uses the SPEC CTRL MSR Bit(2) for this, while AMD may</div><div class='hunk'>@@ -2145,16 +2447,6 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)</div><div class='ctx'> 			update_spec_ctrl(x86_spec_ctrl_base);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return mode;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ssb_select_mitigation(void)</div><div class='del'>-{</div><div class='del'>-	ssb_mode = __ssb_select_mitigation();</div><div class='del'>-</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))</div><div class='del'>-		pr_info("%s\n", ssb_strings[ssb_mode]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #undef pr_fmt</div><div class='hunk'>@@ -2410,7 +2702,7 @@ EXPORT_SYMBOL_GPL(itlb_multihit_kvm_mitigation);</div><div class='ctx'> </div><div class='ctx'> /* Default mitigation for L1TF-affected CPUs */</div><div class='ctx'> enum l1tf_mitigations l1tf_mitigation __ro_after_init =</div><div class='del'>-	IS_ENABLED(CONFIG_MITIGATION_L1TF) ? L1TF_MITIGATION_FLUSH : L1TF_MITIGATION_OFF;</div><div class='add'>+	IS_ENABLED(CONFIG_MITIGATION_L1TF) ? L1TF_MITIGATION_AUTO : L1TF_MITIGATION_OFF;</div><div class='ctx'> #if IS_ENABLED(CONFIG_KVM_INTEL)</div><div class='ctx'> EXPORT_SYMBOL_GPL(l1tf_mitigation);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -2458,22 +2750,33 @@ static void override_cache_bits(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> static void __init l1tf_select_mitigation(void)</div><div class='ctx'> {</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_L1TF) || cpu_mitigations_off()) {</div><div class='add'>+		l1tf_mitigation = L1TF_MITIGATION_OFF;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (l1tf_mitigation == L1TF_MITIGATION_AUTO) {</div><div class='add'>+		if (cpu_mitigations_auto_nosmt())</div><div class='add'>+			l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOSMT;</div><div class='add'>+		else</div><div class='add'>+			l1tf_mitigation = L1TF_MITIGATION_FLUSH;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init l1tf_apply_mitigation(void)</div><div class='add'>+{</div><div class='ctx'> 	u64 half_pa;</div><div class='ctx'> </div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_L1TF))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (cpu_mitigations_off())</div><div class='del'>-		l1tf_mitigation = L1TF_MITIGATION_OFF;</div><div class='del'>-	else if (cpu_mitigations_auto_nosmt())</div><div class='del'>-		l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOSMT;</div><div class='del'>-</div><div class='ctx'> 	override_cache_bits(&amp;boot_cpu_data);</div><div class='ctx'> </div><div class='ctx'> 	switch (l1tf_mitigation) {</div><div class='ctx'> 	case L1TF_MITIGATION_OFF:</div><div class='ctx'> 	case L1TF_MITIGATION_FLUSH_NOWARN:</div><div class='ctx'> 	case L1TF_MITIGATION_FLUSH:</div><div class='add'>+	case L1TF_MITIGATION_AUTO:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case L1TF_MITIGATION_FLUSH_NOSMT:</div><div class='ctx'> 	case L1TF_MITIGATION_FULL:</div><div class='hunk'>@@ -2533,6 +2836,7 @@ early_param("l1tf", l1tf_cmdline);</div><div class='ctx'> </div><div class='ctx'> enum srso_mitigation {</div><div class='ctx'> 	SRSO_MITIGATION_NONE,</div><div class='add'>+	SRSO_MITIGATION_AUTO,</div><div class='ctx'> 	SRSO_MITIGATION_UCODE_NEEDED,</div><div class='ctx'> 	SRSO_MITIGATION_SAFE_RET_UCODE_NEEDED,</div><div class='ctx'> 	SRSO_MITIGATION_MICROCODE,</div><div class='hunk'>@@ -2542,14 +2846,6 @@ enum srso_mitigation {</div><div class='ctx'> 	SRSO_MITIGATION_BP_SPEC_REDUCE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum srso_mitigation_cmd {</div><div class='del'>-	SRSO_CMD_OFF,</div><div class='del'>-	SRSO_CMD_MICROCODE,</div><div class='del'>-	SRSO_CMD_SAFE_RET,</div><div class='del'>-	SRSO_CMD_IBPB,</div><div class='del'>-	SRSO_CMD_IBPB_ON_VMEXIT,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const char * const srso_strings[] = {</div><div class='ctx'> 	[SRSO_MITIGATION_NONE]			= "Vulnerable",</div><div class='ctx'> 	[SRSO_MITIGATION_UCODE_NEEDED]		= "Vulnerable: No microcode",</div><div class='hunk'>@@ -2561,8 +2857,7 @@ static const char * const srso_strings[] = {</div><div class='ctx'> 	[SRSO_MITIGATION_BP_SPEC_REDUCE]	= "Mitigation: Reduced Speculation"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static enum srso_mitigation srso_mitigation __ro_after_init = SRSO_MITIGATION_NONE;</div><div class='del'>-static enum srso_mitigation_cmd srso_cmd __ro_after_init = SRSO_CMD_SAFE_RET;</div><div class='add'>+static enum srso_mitigation srso_mitigation __ro_after_init = SRSO_MITIGATION_AUTO;</div><div class='ctx'> </div><div class='ctx'> static int __init srso_parse_cmdline(char *str)</div><div class='ctx'> {</div><div class='hunk'>@@ -2570,15 +2865,15 @@ static int __init srso_parse_cmdline(char *str)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!strcmp(str, "off"))</div><div class='del'>-		srso_cmd = SRSO_CMD_OFF;</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_NONE;</div><div class='ctx'> 	else if (!strcmp(str, "microcode"))</div><div class='del'>-		srso_cmd = SRSO_CMD_MICROCODE;</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_MICROCODE;</div><div class='ctx'> 	else if (!strcmp(str, "safe-ret"))</div><div class='del'>-		srso_cmd = SRSO_CMD_SAFE_RET;</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_SAFE_RET;</div><div class='ctx'> 	else if (!strcmp(str, "ibpb"))</div><div class='del'>-		srso_cmd = SRSO_CMD_IBPB;</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_IBPB;</div><div class='ctx'> 	else if (!strcmp(str, "ibpb-vmexit"))</div><div class='del'>-		srso_cmd = SRSO_CMD_IBPB_ON_VMEXIT;</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_IBPB_ON_VMEXIT;</div><div class='ctx'> 	else</div><div class='ctx'> 		pr_err("Ignoring unknown SRSO option (%s).", str);</div><div class='ctx'> </div><div class='hunk'>@@ -2590,132 +2885,85 @@ early_param("spec_rstack_overflow", srso_parse_cmdline);</div><div class='ctx'> </div><div class='ctx'> static void __init srso_select_mitigation(void)</div><div class='ctx'> {</div><div class='del'>-	bool has_microcode = boot_cpu_has(X86_FEATURE_IBPB_BRTYPE);</div><div class='add'>+	bool has_microcode;</div><div class='ctx'> </div><div class='del'>-	if (!boot_cpu_has_bug(X86_BUG_SRSO) ||</div><div class='del'>-	    cpu_mitigations_off() ||</div><div class='del'>-	    srso_cmd == SRSO_CMD_OFF) {</div><div class='del'>-		if (boot_cpu_has(X86_FEATURE_SBPB))</div><div class='del'>-			x86_pred_cmd = PRED_CMD_SBPB;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_SRSO) || cpu_mitigations_off())</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_NONE;</div><div class='add'>+</div><div class='add'>+	if (srso_mitigation == SRSO_MITIGATION_NONE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (srso_mitigation == SRSO_MITIGATION_AUTO)</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_SAFE_RET;</div><div class='ctx'> </div><div class='add'>+	has_microcode = boot_cpu_has(X86_FEATURE_IBPB_BRTYPE);</div><div class='ctx'> 	if (has_microcode) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Zen1/2 with SMT off aren't vulnerable after the right</div><div class='ctx'> 		 * IBPB microcode has been applied.</div><div class='del'>-		 *</div><div class='del'>-		 * Zen1/2 don't have SBPB, no need to try to enable it here.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (boot_cpu_data.x86 &lt; 0x19 &amp;&amp; !cpu_smt_possible()) {</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_SRSO_NO);</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (retbleed_mitigation == RETBLEED_MITIGATION_IBPB) {</div><div class='del'>-			srso_mitigation = SRSO_MITIGATION_IBPB;</div><div class='del'>-			goto out;</div><div class='add'>+			srso_mitigation = SRSO_MITIGATION_NONE;</div><div class='add'>+			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_warn("IBPB-extending microcode not applied!\n");</div><div class='ctx'> 		pr_warn(SRSO_NOTICE);</div><div class='del'>-</div><div class='del'>-		/* may be overwritten by SRSO_CMD_SAFE_RET below */</div><div class='del'>-		srso_mitigation = SRSO_MITIGATION_UCODE_NEEDED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (srso_cmd) {</div><div class='del'>-	case SRSO_CMD_MICROCODE:</div><div class='del'>-		if (has_microcode) {</div><div class='del'>-			srso_mitigation = SRSO_MITIGATION_MICROCODE;</div><div class='del'>-			pr_warn(SRSO_NOTICE);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SRSO_CMD_SAFE_RET:</div><div class='del'>-		if (boot_cpu_has(X86_FEATURE_SRSO_USER_KERNEL_NO))</div><div class='add'>+	switch (srso_mitigation) {</div><div class='add'>+	case SRSO_MITIGATION_SAFE_RET:</div><div class='add'>+		if (boot_cpu_has(X86_FEATURE_SRSO_USER_KERNEL_NO)) {</div><div class='add'>+			srso_mitigation = SRSO_MITIGATION_IBPB_ON_VMEXIT;</div><div class='ctx'> 			goto ibpb_on_vmexit;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (IS_ENABLED(CONFIG_MITIGATION_SRSO)) {</div><div class='del'>-			/*</div><div class='del'>-			 * Enable the return thunk for generated code</div><div class='del'>-			 * like ftrace, static_call, etc.</div><div class='del'>-			 */</div><div class='del'>-			setup_force_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='del'>-			setup_force_cpu_cap(X86_FEATURE_UNRET);</div><div class='del'>-</div><div class='del'>-			if (boot_cpu_data.x86 == 0x19) {</div><div class='del'>-				setup_force_cpu_cap(X86_FEATURE_SRSO_ALIAS);</div><div class='del'>-				x86_return_thunk = srso_alias_return_thunk;</div><div class='del'>-			} else {</div><div class='del'>-				setup_force_cpu_cap(X86_FEATURE_SRSO);</div><div class='del'>-				x86_return_thunk = srso_return_thunk;</div><div class='del'>-			}</div><div class='del'>-			if (has_microcode)</div><div class='del'>-				srso_mitigation = SRSO_MITIGATION_SAFE_RET;</div><div class='del'>-			else</div><div class='del'>-				srso_mitigation = SRSO_MITIGATION_SAFE_RET_UCODE_NEEDED;</div><div class='del'>-		} else {</div><div class='add'>+		if (!IS_ENABLED(CONFIG_MITIGATION_SRSO)) {</div><div class='ctx'> 			pr_err("WARNING: kernel not compiled with MITIGATION_SRSO.\n");</div><div class='add'>+			srso_mitigation = SRSO_MITIGATION_NONE;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='del'>-	case SRSO_CMD_IBPB:</div><div class='del'>-		if (IS_ENABLED(CONFIG_MITIGATION_IBPB_ENTRY)) {</div><div class='del'>-			if (has_microcode) {</div><div class='del'>-				setup_force_cpu_cap(X86_FEATURE_ENTRY_IBPB);</div><div class='del'>-				setup_force_cpu_cap(X86_FEATURE_IBPB_ON_VMEXIT);</div><div class='del'>-				srso_mitigation = SRSO_MITIGATION_IBPB;</div><div class='del'>-</div><div class='del'>-				/*</div><div class='del'>-				 * IBPB on entry already obviates the need for</div><div class='del'>-				 * software-based untraining so clear those in case some</div><div class='del'>-				 * other mitigation like Retbleed has selected them.</div><div class='del'>-				 */</div><div class='del'>-				setup_clear_cpu_cap(X86_FEATURE_UNRET);</div><div class='del'>-				setup_clear_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='del'>-</div><div class='del'>-				/*</div><div class='del'>-				 * There is no need for RSB filling: entry_ibpb() ensures</div><div class='del'>-				 * all predictions, including the RSB, are invalidated,</div><div class='del'>-				 * regardless of IBPB implementation.</div><div class='del'>-				 */</div><div class='del'>-				setup_clear_cpu_cap(X86_FEATURE_RSB_VMEXIT);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			pr_err("WARNING: kernel not compiled with MITIGATION_IBPB_ENTRY.\n");</div><div class='del'>-		}</div><div class='add'>+		if (!has_microcode)</div><div class='add'>+			srso_mitigation = SRSO_MITIGATION_SAFE_RET_UCODE_NEEDED;</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='ctx'> ibpb_on_vmexit:</div><div class='del'>-	case SRSO_CMD_IBPB_ON_VMEXIT:</div><div class='add'>+	case SRSO_MITIGATION_IBPB_ON_VMEXIT:</div><div class='ctx'> 		if (boot_cpu_has(X86_FEATURE_SRSO_BP_SPEC_REDUCE)) {</div><div class='ctx'> 			pr_notice("Reducing speculation to address VM/HV SRSO attack vector.\n");</div><div class='ctx'> 			srso_mitigation = SRSO_MITIGATION_BP_SPEC_REDUCE;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		if (IS_ENABLED(CONFIG_MITIGATION_IBPB_ENTRY)) {</div><div class='del'>-			if (has_microcode) {</div><div class='del'>-				setup_force_cpu_cap(X86_FEATURE_IBPB_ON_VMEXIT);</div><div class='del'>-				srso_mitigation = SRSO_MITIGATION_IBPB_ON_VMEXIT;</div><div class='del'>-</div><div class='del'>-				/*</div><div class='del'>-				 * There is no need for RSB filling: entry_ibpb() ensures</div><div class='del'>-				 * all predictions, including the RSB, are invalidated,</div><div class='del'>-				 * regardless of IBPB implementation.</div><div class='del'>-				 */</div><div class='del'>-				setup_clear_cpu_cap(X86_FEATURE_RSB_VMEXIT);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='add'>+		fallthrough;</div><div class='add'>+	case SRSO_MITIGATION_IBPB:</div><div class='add'>+		if (!IS_ENABLED(CONFIG_MITIGATION_IBPB_ENTRY)) {</div><div class='ctx'> 			pr_err("WARNING: kernel not compiled with MITIGATION_IBPB_ENTRY.\n");</div><div class='add'>+			srso_mitigation = SRSO_MITIGATION_NONE;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (!has_microcode)</div><div class='add'>+			srso_mitigation = SRSO_MITIGATION_UCODE_NEEDED;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='add'>+static void __init srso_update_mitigation(void)</div><div class='add'>+{</div><div class='add'>+	/* If retbleed is using IBPB, that works for SRSO as well */</div><div class='add'>+	if (retbleed_mitigation == RETBLEED_MITIGATION_IBPB &amp;&amp;</div><div class='add'>+	    boot_cpu_has(X86_FEATURE_IBPB_BRTYPE))</div><div class='add'>+		srso_mitigation = SRSO_MITIGATION_IBPB;</div><div class='add'>+</div><div class='add'>+	if (boot_cpu_has_bug(X86_BUG_SRSO) &amp;&amp;</div><div class='add'>+	    !cpu_mitigations_off() &amp;&amp;</div><div class='add'>+	    !boot_cpu_has(X86_FEATURE_SRSO_NO))</div><div class='add'>+		pr_info("%s\n", srso_strings[srso_mitigation]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init srso_apply_mitigation(void)</div><div class='add'>+{</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear the feature flag if this mitigation is not selected as that</div><div class='ctx'> 	 * feature flag controls the BpSpecReduce MSR bit toggling in KVM.</div><div class='hunk'>@@ -2723,8 +2971,52 @@ out:</div><div class='ctx'> 	if (srso_mitigation != SRSO_MITIGATION_BP_SPEC_REDUCE)</div><div class='ctx'> 		setup_clear_cpu_cap(X86_FEATURE_SRSO_BP_SPEC_REDUCE);</div><div class='ctx'> </div><div class='del'>-	if (srso_mitigation != SRSO_MITIGATION_NONE)</div><div class='del'>-		pr_info("%s\n", srso_strings[srso_mitigation]);</div><div class='add'>+	if (srso_mitigation == SRSO_MITIGATION_NONE) {</div><div class='add'>+		if (boot_cpu_has(X86_FEATURE_SBPB))</div><div class='add'>+			x86_pred_cmd = PRED_CMD_SBPB;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (srso_mitigation) {</div><div class='add'>+	case SRSO_MITIGATION_SAFE_RET:</div><div class='add'>+	case SRSO_MITIGATION_SAFE_RET_UCODE_NEEDED:</div><div class='add'>+		/*</div><div class='add'>+		 * Enable the return thunk for generated code</div><div class='add'>+		 * like ftrace, static_call, etc.</div><div class='add'>+		 */</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_UNRET);</div><div class='add'>+</div><div class='add'>+		if (boot_cpu_data.x86 == 0x19) {</div><div class='add'>+			setup_force_cpu_cap(X86_FEATURE_SRSO_ALIAS);</div><div class='add'>+			set_return_thunk(srso_alias_return_thunk);</div><div class='add'>+		} else {</div><div class='add'>+			setup_force_cpu_cap(X86_FEATURE_SRSO);</div><div class='add'>+			set_return_thunk(srso_return_thunk);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case SRSO_MITIGATION_IBPB:</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_ENTRY_IBPB);</div><div class='add'>+		/*</div><div class='add'>+		 * IBPB on entry already obviates the need for</div><div class='add'>+		 * software-based untraining so clear those in case some</div><div class='add'>+		 * other mitigation like Retbleed has selected them.</div><div class='add'>+		 */</div><div class='add'>+		setup_clear_cpu_cap(X86_FEATURE_UNRET);</div><div class='add'>+		setup_clear_cpu_cap(X86_FEATURE_RETHUNK);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case SRSO_MITIGATION_IBPB_ON_VMEXIT:</div><div class='add'>+		setup_force_cpu_cap(X86_FEATURE_IBPB_ON_VMEXIT);</div><div class='add'>+		/*</div><div class='add'>+		 * There is no need for RSB filling: entry_ibpb() ensures</div><div class='add'>+		 * all predictions, including the RSB, are invalidated,</div><div class='add'>+		 * regardless of IBPB implementation.</div><div class='add'>+		 */</div><div class='add'>+		setup_clear_cpu_cap(X86_FEATURE_RSB_VMEXIT);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #undef pr_fmt</div><div class='hunk'>@@ -2819,9 +3111,6 @@ static ssize_t tsx_async_abort_show_state(char *buf)</div><div class='ctx'> </div><div class='ctx'> static ssize_t mmio_stale_data_show_state(char *buf)</div><div class='ctx'> {</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_MMIO_UNKNOWN))</div><div class='del'>-		return sysfs_emit(buf, "Unknown: No mitigations\n");</div><div class='del'>-</div><div class='ctx'> 	if (mmio_mitigation == MMIO_MITIGATION_OFF)</div><div class='ctx'> 		return sysfs_emit(buf, "%s\n", mmio_strings[mmio_mitigation]);</div><div class='ctx'> </div><div class='hunk'>@@ -2839,6 +3128,19 @@ static ssize_t rfds_show_state(char *buf)</div><div class='ctx'> 	return sysfs_emit(buf, "%s\n", rfds_strings[rfds_mitigation]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t old_microcode_show_state(char *buf)</div><div class='add'>+{</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))</div><div class='add'>+		return sysfs_emit(buf, "Unknown: running under hypervisor");</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "Vulnerable\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t its_show_state(char *buf)</div><div class='add'>+{</div><div class='add'>+	return sysfs_emit(buf, "%s\n", its_strings[its_mitigation]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static char *stibp_state(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) &amp;&amp;</div><div class='hunk'>@@ -2897,7 +3199,7 @@ static const char *spectre_bhi_state(void)</div><div class='ctx'> 		 !boot_cpu_has(X86_FEATURE_RETPOLINE_LFENCE) &amp;&amp;</div><div class='ctx'> 		 rrsba_disabled)</div><div class='ctx'> 		return "; BHI: Retpoline";</div><div class='del'>-	else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT))</div><div class='add'>+	else if (boot_cpu_has(X86_FEATURE_CLEAR_BHB_VMEXIT))</div><div class='ctx'> 		return "; BHI: Vulnerable, KVM: SW loop";</div><div class='ctx'> </div><div class='ctx'> 	return "; BHI: Vulnerable";</div><div class='hunk'>@@ -3006,7 +3308,6 @@ static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr</div><div class='ctx'> 		return srbds_show_state(buf);</div><div class='ctx'> </div><div class='ctx'> 	case X86_BUG_MMIO_STALE_DATA:</div><div class='del'>-	case X86_BUG_MMIO_UNKNOWN:</div><div class='ctx'> 		return mmio_stale_data_show_state(buf);</div><div class='ctx'> </div><div class='ctx'> 	case X86_BUG_RETBLEED:</div><div class='hunk'>@@ -3021,6 +3322,12 @@ static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr</div><div class='ctx'> 	case X86_BUG_RFDS:</div><div class='ctx'> 		return rfds_show_state(buf);</div><div class='ctx'> </div><div class='add'>+	case X86_BUG_OLD_MICROCODE:</div><div class='add'>+		return old_microcode_show_state(buf);</div><div class='add'>+</div><div class='add'>+	case X86_BUG_ITS:</div><div class='add'>+		return its_show_state(buf);</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3075,10 +3382,7 @@ ssize_t cpu_show_srbds(struct device *dev, struct device_attribute *attr, char *</div><div class='ctx'> </div><div class='ctx'> ssize_t cpu_show_mmio_stale_data(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='del'>-	if (boot_cpu_has_bug(X86_BUG_MMIO_UNKNOWN))</div><div class='del'>-		return cpu_show_common(dev, attr, buf, X86_BUG_MMIO_UNKNOWN);</div><div class='del'>-	else</div><div class='del'>-		return cpu_show_common(dev, attr, buf, X86_BUG_MMIO_STALE_DATA);</div><div class='add'>+	return cpu_show_common(dev, attr, buf, X86_BUG_MMIO_STALE_DATA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> ssize_t cpu_show_retbleed(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='hunk'>@@ -3100,6 +3404,16 @@ ssize_t cpu_show_reg_file_data_sampling(struct device *dev, struct device_attrib</div><div class='ctx'> {</div><div class='ctx'> 	return cpu_show_common(dev, attr, buf, X86_BUG_RFDS);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+ssize_t cpu_show_old_microcode(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	return cpu_show_common(dev, attr, buf, X86_BUG_OLD_MICROCODE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+ssize_t cpu_show_indirect_target_selection(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	return cpu_show_common(dev, attr, buf, X86_BUG_ITS);</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> void __warn_thunk(void)</div><div class='head'>diff --git a/arch/x86/kernel/cpu/bus_lock.c b/arch/x86/kernel/cpu/bus_lock.c<br/>index 237faf7e700c..981f8b1f0792 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/bus_lock.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/bus_lock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/bus_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/bus_lock.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;asm/cmdline.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum split_lock_detect_state {</div><div class='ctx'> 	sld_off = 0,</div><div class='hunk'>@@ -95,15 +96,15 @@ static bool split_lock_verify_msr(bool on)</div><div class='ctx'> {</div><div class='ctx'> 	u64 ctrl, tmp;</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_TEST_CTRL, &amp;ctrl))</div><div class='add'>+	if (rdmsrq_safe(MSR_TEST_CTRL, &amp;ctrl))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (on)</div><div class='ctx'> 		ctrl |= MSR_TEST_CTRL_SPLIT_LOCK_DETECT;</div><div class='ctx'> 	else</div><div class='ctx'> 		ctrl &amp;= ~MSR_TEST_CTRL_SPLIT_LOCK_DETECT;</div><div class='del'>-	if (wrmsrl_safe(MSR_TEST_CTRL, ctrl))</div><div class='add'>+	if (wrmsrq_safe(MSR_TEST_CTRL, ctrl))</div><div class='ctx'> 		return false;</div><div class='del'>-	rdmsrl(MSR_TEST_CTRL, tmp);</div><div class='add'>+	rdmsrq(MSR_TEST_CTRL, tmp);</div><div class='ctx'> 	return ctrl == tmp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -137,7 +138,7 @@ static void __init __split_lock_setup(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_TEST_CTRL, msr_test_ctrl_cache);</div><div class='add'>+	rdmsrq(MSR_TEST_CTRL, msr_test_ctrl_cache);</div><div class='ctx'> </div><div class='ctx'> 	if (!split_lock_verify_msr(true)) {</div><div class='ctx'> 		pr_info("MSR access failed: Disabled\n");</div><div class='hunk'>@@ -145,7 +146,7 @@ static void __init __split_lock_setup(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Restore the MSR to its cached value. */</div><div class='del'>-	wrmsrl(MSR_TEST_CTRL, msr_test_ctrl_cache);</div><div class='add'>+	wrmsrq(MSR_TEST_CTRL, msr_test_ctrl_cache);</div><div class='ctx'> </div><div class='ctx'> 	setup_force_cpu_cap(X86_FEATURE_SPLIT_LOCK_DETECT);</div><div class='ctx'> }</div><div class='hunk'>@@ -162,7 +163,7 @@ static void sld_update_msr(bool on)</div><div class='ctx'> 	if (on)</div><div class='ctx'> 		test_ctrl_val |= MSR_TEST_CTRL_SPLIT_LOCK_DETECT;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_TEST_CTRL, test_ctrl_val);</div><div class='add'>+	wrmsrq(MSR_TEST_CTRL, test_ctrl_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void split_lock_init(void)</div><div class='hunk'>@@ -297,7 +298,7 @@ void bus_lock_init(void)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_BUS_LOCK_DETECT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_DEBUGCTLMSR, val);</div><div class='add'>+	rdmsrq(MSR_IA32_DEBUGCTLMSR, val);</div><div class='ctx'> </div><div class='ctx'> 	if ((boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT) &amp;&amp;</div><div class='ctx'> 	    (sld_state == sld_warn || sld_state == sld_fatal)) ||</div><div class='hunk'>@@ -311,7 +312,7 @@ void bus_lock_init(void)</div><div class='ctx'> 		val |= DEBUGCTLMSR_BUS_LOCK_DETECT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_DEBUGCTLMSR, val);</div><div class='add'>+	wrmsrq(MSR_IA32_DEBUGCTLMSR, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool handle_user_split_lock(struct pt_regs *regs, long error_code)</div><div class='hunk'>@@ -375,7 +376,7 @@ static void __init split_lock_setup(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 * MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT is.  All CPUs that set</div><div class='ctx'> 	 * it have split lock detection.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_IA32_CORE_CAPS, ia32_core_caps);</div><div class='add'>+	rdmsrq(MSR_IA32_CORE_CAPS, ia32_core_caps);</div><div class='ctx'> 	if (ia32_core_caps &amp; MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT)</div><div class='ctx'> 		goto supported;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c<br/>index b3a520959b51..adfa7e8bb865 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cacheinfo.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/cacheinfo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cacheinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/cacheinfo.c</a></div><div class='hunk'>@@ -1,35 +1,28 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /*</div><div class='del'>- *	Routines to identify caches on Intel CPU.</div><div class='add'>+ * x86 CPU caches detection and configuration</div><div class='ctx'>  *</div><div class='del'>- *	Changes:</div><div class='del'>- *	Venkatesh Pallipadi	: Adding cache identification through cpuid(4)</div><div class='del'>- *	Ashok Raj &lt;ashok.raj@intel.com&gt;: Work with CPU hotplug infrastructure.</div><div class='del'>- *	Andi Kleen / Andreas Herrmann	: CPUID4 emulation on AMD.</div><div class='add'>+ * Previous changes</div><div class='add'>+ * - Venkatesh Pallipadi:		Cache identification through CPUID(0x4)</div><div class='add'>+ * - Ashok Raj &lt;ashok.raj@intel.com&gt;:	Work with CPU hotplug infrastructure</div><div class='add'>+ * - Andi Kleen / Andreas Herrmann:	CPUID(0x4) emulation on AMD</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cacheinfo.h&gt;</div><div class='del'>-#include &lt;linux/capability.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/cpuhotplug.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/stop_machine.h&gt;</div><div class='del'>-#include &lt;linux/sysfs.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> #include &lt;asm/cacheinfo.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='del'>-#define LVL_1_INST	1</div><div class='del'>-#define LVL_1_DATA	2</div><div class='del'>-#define LVL_2		3</div><div class='del'>-#define LVL_3		4</div><div class='del'>-</div><div class='ctx'> /* Shared last level cache maps */</div><div class='ctx'> DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);</div><div class='ctx'> </div><div class='hunk'>@@ -41,208 +34,127 @@ static cpumask_var_t cpu_cacheinfo_mask;</div><div class='ctx'> /* Kernel controls MTRR and/or PAT MSRs. */</div><div class='ctx'> unsigned int memory_caching_control __ro_after_init;</div><div class='ctx'> </div><div class='del'>-struct _cache_table {</div><div class='del'>-	unsigned char descriptor;</div><div class='del'>-	char cache_type;</div><div class='del'>-	short size;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define MB(x)	((x) * 1024)</div><div class='del'>-</div><div class='del'>-/* All the cache descriptor types we care about (no TLB or</div><div class='del'>-   trace cache entries) */</div><div class='del'>-</div><div class='del'>-static const struct _cache_table cache_table[] =</div><div class='del'>-{</div><div class='del'>-	{ 0x06, LVL_1_INST, 8 },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x08, LVL_1_INST, 16 },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x09, LVL_1_INST, 32 },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x0a, LVL_1_DATA, 8 },	/* 2 way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x0c, LVL_1_DATA, 16 },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x0d, LVL_1_DATA, 16 },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x0e, LVL_1_DATA, 24 },	/* 6-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x21, LVL_2,      256 },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x22, LVL_3,      512 },	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x23, LVL_3,      MB(1) },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x25, LVL_3,      MB(2) },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x29, LVL_3,      MB(4) },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x2c, LVL_1_DATA, 32 },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x30, LVL_1_INST, 32 },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x39, LVL_2,      128 },	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x3a, LVL_2,      192 },	/* 6-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x3b, LVL_2,      128 },	/* 2-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x3c, LVL_2,      256 },	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x3d, LVL_2,      384 },	/* 6-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x3e, LVL_2,      512 },	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x3f, LVL_2,      256 },	/* 2-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x41, LVL_2,      128 },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x42, LVL_2,      256 },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x43, LVL_2,      512 },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x44, LVL_2,      MB(1) },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x45, LVL_2,      MB(2) },	/* 4-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x46, LVL_3,      MB(4) },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x47, LVL_3,      MB(8) },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x48, LVL_2,      MB(3) },	/* 12-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x49, LVL_3,      MB(4) },	/* 16-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x4a, LVL_3,      MB(6) },	/* 12-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x4b, LVL_3,      MB(8) },	/* 16-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x4c, LVL_3,      MB(12) },	/* 12-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x4d, LVL_3,      MB(16) },	/* 16-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x4e, LVL_2,      MB(6) },	/* 24-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x60, LVL_1_DATA, 16 },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x66, LVL_1_DATA, 8 },	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x67, LVL_1_DATA, 16 },	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x68, LVL_1_DATA, 32 },	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x78, LVL_2,      MB(1) },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x79, LVL_2,      128 },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x7a, LVL_2,      256 },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x7b, LVL_2,      512 },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x7c, LVL_2,      MB(1) },	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='del'>-	{ 0x7d, LVL_2,      MB(2) },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x7f, LVL_2,      512 },	/* 2-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x80, LVL_2,      512 },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x82, LVL_2,      256 },	/* 8-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x83, LVL_2,      512 },	/* 8-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x84, LVL_2,      MB(1) },	/* 8-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x85, LVL_2,      MB(2) },	/* 8-way set assoc, 32 byte line size */</div><div class='del'>-	{ 0x86, LVL_2,      512 },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x87, LVL_2,      MB(1) },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xd0, LVL_3,      512 },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xd1, LVL_3,      MB(1) },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xd2, LVL_3,      MB(2) },	/* 4-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xd6, LVL_3,      MB(1) },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xd7, LVL_3,      MB(2) },	/* 8-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xd8, LVL_3,      MB(4) },	/* 12-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xdc, LVL_3,      MB(2) },	/* 12-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xdd, LVL_3,      MB(4) },	/* 12-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xde, LVL_3,      MB(8) },	/* 12-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xe2, LVL_3,      MB(2) },	/* 16-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xe3, LVL_3,      MB(4) },	/* 16-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xe4, LVL_3,      MB(8) },	/* 16-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xea, LVL_3,      MB(12) },	/* 24-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xeb, LVL_3,      MB(18) },	/* 24-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0xec, LVL_3,      MB(24) },	/* 24-way set assoc, 64 byte line size */</div><div class='del'>-	{ 0x00, 0, 0}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> enum _cache_type {</div><div class='del'>-	CTYPE_NULL = 0,</div><div class='del'>-	CTYPE_DATA = 1,</div><div class='del'>-	CTYPE_INST = 2,</div><div class='del'>-	CTYPE_UNIFIED = 3</div><div class='add'>+	CTYPE_NULL	= 0,</div><div class='add'>+	CTYPE_DATA	= 1,</div><div class='add'>+	CTYPE_INST	= 2,</div><div class='add'>+	CTYPE_UNIFIED	= 3</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union _cpuid4_leaf_eax {</div><div class='ctx'> 	struct {</div><div class='del'>-		enum _cache_type	type:5;</div><div class='del'>-		unsigned int		level:3;</div><div class='del'>-		unsigned int		is_self_initializing:1;</div><div class='del'>-		unsigned int		is_fully_associative:1;</div><div class='del'>-		unsigned int		reserved:4;</div><div class='del'>-		unsigned int		num_threads_sharing:12;</div><div class='del'>-		unsigned int		num_cores_on_die:6;</div><div class='add'>+		enum _cache_type	type			:5;</div><div class='add'>+		unsigned int		level			:3;</div><div class='add'>+		unsigned int		is_self_initializing	:1;</div><div class='add'>+		unsigned int		is_fully_associative	:1;</div><div class='add'>+		unsigned int		reserved		:4;</div><div class='add'>+		unsigned int		num_threads_sharing	:12;</div><div class='add'>+		unsigned int		num_cores_on_die	:6;</div><div class='ctx'> 	} split;</div><div class='ctx'> 	u32 full;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union _cpuid4_leaf_ebx {</div><div class='ctx'> 	struct {</div><div class='del'>-		unsigned int		coherency_line_size:12;</div><div class='del'>-		unsigned int		physical_line_partition:10;</div><div class='del'>-		unsigned int		ways_of_associativity:10;</div><div class='add'>+		unsigned int		coherency_line_size	:12;</div><div class='add'>+		unsigned int		physical_line_partition	:10;</div><div class='add'>+		unsigned int		ways_of_associativity	:10;</div><div class='ctx'> 	} split;</div><div class='ctx'> 	u32 full;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union _cpuid4_leaf_ecx {</div><div class='ctx'> 	struct {</div><div class='del'>-		unsigned int		number_of_sets:32;</div><div class='add'>+		unsigned int		number_of_sets		:32;</div><div class='ctx'> 	} split;</div><div class='ctx'> 	u32 full;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct _cpuid4_info_regs {</div><div class='add'>+struct _cpuid4_info {</div><div class='ctx'> 	union _cpuid4_leaf_eax eax;</div><div class='ctx'> 	union _cpuid4_leaf_ebx ebx;</div><div class='ctx'> 	union _cpuid4_leaf_ecx ecx;</div><div class='ctx'> 	unsigned int id;</div><div class='ctx'> 	unsigned long size;</div><div class='del'>-	struct amd_northbridge *nb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* AMD doesn't have CPUID4. Emulate it here to report the same</div><div class='del'>-   information to the user.  This makes some assumptions about the machine:</div><div class='del'>-   L2 not shared, no SMT etc. that is currently true on AMD CPUs.</div><div class='add'>+/* Map CPUID(0x4) EAX.cache_type to &lt;linux/cacheinfo.h&gt; types */</div><div class='add'>+static const enum cache_type cache_type_map[] = {</div><div class='add'>+	[CTYPE_NULL]	= CACHE_TYPE_NOCACHE,</div><div class='add'>+	[CTYPE_DATA]	= CACHE_TYPE_DATA,</div><div class='add'>+	[CTYPE_INST]	= CACHE_TYPE_INST,</div><div class='add'>+	[CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Fallback AMD CPUID(0x4) emulation</div><div class='add'>+ * AMD CPUs with TOPOEXT can just use CPUID(0x8000001d)</div><div class='add'>+ *</div><div class='add'>+ * @AMD_L2_L3_INVALID_ASSOC: cache info for the respective L2/L3 cache should</div><div class='add'>+ * be determined from CPUID(0x8000001d) instead of CPUID(0x80000006).</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define AMD_CPUID4_FULLY_ASSOCIATIVE	0xffff</div><div class='add'>+#define AMD_L2_L3_INVALID_ASSOC		0x9</div><div class='ctx'> </div><div class='del'>-   In theory the TLBs could be reported as fake type (they are in "dummy").</div><div class='del'>-   Maybe later */</div><div class='ctx'> union l1_cache {</div><div class='ctx'> 	struct {</div><div class='del'>-		unsigned line_size:8;</div><div class='del'>-		unsigned lines_per_tag:8;</div><div class='del'>-		unsigned assoc:8;</div><div class='del'>-		unsigned size_in_kb:8;</div><div class='add'>+		unsigned line_size	:8;</div><div class='add'>+		unsigned lines_per_tag	:8;</div><div class='add'>+		unsigned assoc		:8;</div><div class='add'>+		unsigned size_in_kb	:8;</div><div class='ctx'> 	};</div><div class='del'>-	unsigned val;</div><div class='add'>+	unsigned int val;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union l2_cache {</div><div class='ctx'> 	struct {</div><div class='del'>-		unsigned line_size:8;</div><div class='del'>-		unsigned lines_per_tag:4;</div><div class='del'>-		unsigned assoc:4;</div><div class='del'>-		unsigned size_in_kb:16;</div><div class='add'>+		unsigned line_size	:8;</div><div class='add'>+		unsigned lines_per_tag	:4;</div><div class='add'>+		unsigned assoc		:4;</div><div class='add'>+		unsigned size_in_kb	:16;</div><div class='ctx'> 	};</div><div class='del'>-	unsigned val;</div><div class='add'>+	unsigned int val;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union l3_cache {</div><div class='ctx'> 	struct {</div><div class='del'>-		unsigned line_size:8;</div><div class='del'>-		unsigned lines_per_tag:4;</div><div class='del'>-		unsigned assoc:4;</div><div class='del'>-		unsigned res:2;</div><div class='del'>-		unsigned size_encoded:14;</div><div class='add'>+		unsigned line_size	:8;</div><div class='add'>+		unsigned lines_per_tag	:4;</div><div class='add'>+		unsigned assoc		:4;</div><div class='add'>+		unsigned res		:2;</div><div class='add'>+		unsigned size_encoded	:14;</div><div class='ctx'> 	};</div><div class='del'>-	unsigned val;</div><div class='add'>+	unsigned int val;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* L2/L3 associativity mapping */</div><div class='ctx'> static const unsigned short assocs[] = {</div><div class='del'>-	[1] = 1,</div><div class='del'>-	[2] = 2,</div><div class='del'>-	[4] = 4,</div><div class='del'>-	[6] = 8,</div><div class='del'>-	[8] = 16,</div><div class='del'>-	[0xa] = 32,</div><div class='del'>-	[0xb] = 48,</div><div class='del'>-	[0xc] = 64,</div><div class='del'>-	[0xd] = 96,</div><div class='del'>-	[0xe] = 128,</div><div class='del'>-	[0xf] = 0xffff /* fully associative - no way to show this currently */</div><div class='add'>+	[1]		= 1,</div><div class='add'>+	[2]		= 2,</div><div class='add'>+	[3]		= 3,</div><div class='add'>+	[4]		= 4,</div><div class='add'>+	[5]		= 6,</div><div class='add'>+	[6]		= 8,</div><div class='add'>+	[8]		= 16,</div><div class='add'>+	[0xa]		= 32,</div><div class='add'>+	[0xb]		= 48,</div><div class='add'>+	[0xc]		= 64,</div><div class='add'>+	[0xd]		= 96,</div><div class='add'>+	[0xe]		= 128,</div><div class='add'>+	[0xf]		= AMD_CPUID4_FULLY_ASSOCIATIVE</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const unsigned char levels[] = { 1, 1, 2, 3 };</div><div class='del'>-static const unsigned char types[] = { 1, 2, 3, 3 };</div><div class='add'>+static const unsigned char types[]  = { 1, 2, 3, 3 };</div><div class='ctx'> </div><div class='del'>-static const enum cache_type cache_type_map[] = {</div><div class='del'>-	[CTYPE_NULL] = CACHE_TYPE_NOCACHE,</div><div class='del'>-	[CTYPE_DATA] = CACHE_TYPE_DATA,</div><div class='del'>-	[CTYPE_INST] = CACHE_TYPE_INST,</div><div class='del'>-	[CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,</div><div class='del'>-		     union _cpuid4_leaf_ebx *ebx,</div><div class='del'>-		     union _cpuid4_leaf_ecx *ecx)</div><div class='add'>+static void legacy_amd_cpuid4(int index, union _cpuid4_leaf_eax *eax,</div><div class='add'>+			      union _cpuid4_leaf_ebx *ebx, union _cpuid4_leaf_ecx *ecx)</div><div class='ctx'> {</div><div class='del'>-	unsigned dummy;</div><div class='del'>-	unsigned line_size, lines_per_tag, assoc, size_in_kb;</div><div class='del'>-	union l1_cache l1i, l1d;</div><div class='add'>+	unsigned int dummy, line_size, lines_per_tag, assoc, size_in_kb;</div><div class='add'>+	union l1_cache l1i, l1d, *l1;</div><div class='ctx'> 	union l2_cache l2;</div><div class='ctx'> 	union l3_cache l3;</div><div class='del'>-	union l1_cache *l1 = &amp;l1d;</div><div class='ctx'> </div><div class='ctx'> 	eax-&gt;full = 0;</div><div class='ctx'> 	ebx-&gt;full = 0;</div><div class='hunk'>@@ -251,430 +163,155 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,</div><div class='ctx'> 	cpuid(0x80000005, &amp;dummy, &amp;dummy, &amp;l1d.val, &amp;l1i.val);</div><div class='ctx'> 	cpuid(0x80000006, &amp;dummy, &amp;dummy, &amp;l2.val, &amp;l3.val);</div><div class='ctx'> </div><div class='del'>-	switch (leaf) {</div><div class='add'>+	l1 = &amp;l1d;</div><div class='add'>+	switch (index) {</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		l1 = &amp;l1i;</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		if (!l1-&gt;val)</div><div class='ctx'> 			return;</div><div class='del'>-		assoc = assocs[l1-&gt;assoc];</div><div class='del'>-		line_size = l1-&gt;line_size;</div><div class='del'>-		lines_per_tag = l1-&gt;lines_per_tag;</div><div class='del'>-		size_in_kb = l1-&gt;size_in_kb;</div><div class='add'>+</div><div class='add'>+		assoc		= (l1-&gt;assoc == 0xff) ? AMD_CPUID4_FULLY_ASSOCIATIVE : l1-&gt;assoc;</div><div class='add'>+		line_size	= l1-&gt;line_size;</div><div class='add'>+		lines_per_tag	= l1-&gt;lines_per_tag;</div><div class='add'>+		size_in_kb	= l1-&gt;size_in_kb;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		if (!l2.val)</div><div class='add'>+		if (!l2.assoc || l2.assoc == AMD_L2_L3_INVALID_ASSOC)</div><div class='ctx'> 			return;</div><div class='del'>-		assoc = assocs[l2.assoc];</div><div class='del'>-		line_size = l2.line_size;</div><div class='del'>-		lines_per_tag = l2.lines_per_tag;</div><div class='del'>-		/* cpu_data has errata corrections for K7 applied */</div><div class='del'>-		size_in_kb = __this_cpu_read(cpu_info.x86_cache_size);</div><div class='add'>+</div><div class='add'>+		/* Use x86_cache_size as it might have K7 errata fixes */</div><div class='add'>+		assoc		= assocs[l2.assoc];</div><div class='add'>+		line_size	= l2.line_size;</div><div class='add'>+		lines_per_tag	= l2.lines_per_tag;</div><div class='add'>+		size_in_kb	= __this_cpu_read(cpu_info.x86_cache_size);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='del'>-		if (!l3.val)</div><div class='add'>+		if (!l3.assoc || l3.assoc == AMD_L2_L3_INVALID_ASSOC)</div><div class='ctx'> 			return;</div><div class='del'>-		assoc = assocs[l3.assoc];</div><div class='del'>-		line_size = l3.line_size;</div><div class='del'>-		lines_per_tag = l3.lines_per_tag;</div><div class='del'>-		size_in_kb = l3.size_encoded * 512;</div><div class='add'>+</div><div class='add'>+		assoc		= assocs[l3.assoc];</div><div class='add'>+		line_size	= l3.line_size;</div><div class='add'>+		lines_per_tag	= l3.lines_per_tag;</div><div class='add'>+		size_in_kb	= l3.size_encoded * 512;</div><div class='ctx'> 		if (boot_cpu_has(X86_FEATURE_AMD_DCM)) {</div><div class='del'>-			size_in_kb = size_in_kb &gt;&gt; 1;</div><div class='del'>-			assoc = assoc &gt;&gt; 1;</div><div class='add'>+			size_in_kb	= size_in_kb &gt;&gt; 1;</div><div class='add'>+			assoc		= assoc &gt;&gt; 1;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	eax-&gt;split.is_self_initializing = 1;</div><div class='del'>-	eax-&gt;split.type = types[leaf];</div><div class='del'>-	eax-&gt;split.level = levels[leaf];</div><div class='del'>-	eax-&gt;split.num_threads_sharing = 0;</div><div class='del'>-	eax-&gt;split.num_cores_on_die = topology_num_cores_per_package();</div><div class='add'>+	eax-&gt;split.is_self_initializing		= 1;</div><div class='add'>+	eax-&gt;split.type				= types[index];</div><div class='add'>+	eax-&gt;split.level			= levels[index];</div><div class='add'>+	eax-&gt;split.num_threads_sharing		= 0;</div><div class='add'>+	eax-&gt;split.num_cores_on_die		= topology_num_cores_per_package();</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	if (assoc == 0xffff)</div><div class='add'>+	if (assoc == AMD_CPUID4_FULLY_ASSOCIATIVE)</div><div class='ctx'> 		eax-&gt;split.is_fully_associative = 1;</div><div class='del'>-	ebx-&gt;split.coherency_line_size = line_size - 1;</div><div class='del'>-	ebx-&gt;split.ways_of_associativity = assoc - 1;</div><div class='del'>-	ebx-&gt;split.physical_line_partition = lines_per_tag - 1;</div><div class='del'>-	ecx-&gt;split.number_of_sets = (size_in_kb * 1024) / line_size /</div><div class='del'>-		(ebx-&gt;split.ways_of_associativity + 1) - 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_AMD_NB) &amp;&amp; defined(CONFIG_SYSFS)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * L3 cache descriptors</div><div class='del'>- */</div><div class='del'>-static void amd_calc_l3_indices(struct amd_northbridge *nb)</div><div class='del'>-{</div><div class='del'>-	struct amd_l3_cache *l3 = &amp;nb-&gt;l3_cache;</div><div class='del'>-	unsigned int sc0, sc1, sc2, sc3;</div><div class='del'>-	u32 val = 0;</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(nb-&gt;misc, 0x1C4, &amp;val);</div><div class='del'>-</div><div class='del'>-	/* calculate subcache sizes */</div><div class='del'>-	l3-&gt;subcaches[0] = sc0 = !(val &amp; BIT(0));</div><div class='del'>-	l3-&gt;subcaches[1] = sc1 = !(val &amp; BIT(4));</div><div class='del'>-</div><div class='del'>-	if (boot_cpu_data.x86 == 0x15) {</div><div class='del'>-		l3-&gt;subcaches[0] = sc0 += !(val &amp; BIT(1));</div><div class='del'>-		l3-&gt;subcaches[1] = sc1 += !(val &amp; BIT(5));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	l3-&gt;subcaches[2] = sc2 = !(val &amp; BIT(8))  + !(val &amp; BIT(9));</div><div class='del'>-	l3-&gt;subcaches[3] = sc3 = !(val &amp; BIT(12)) + !(val &amp; BIT(13));</div><div class='del'>-</div><div class='del'>-	l3-&gt;indices = (max(max3(sc0, sc1, sc2), sc3) &lt;&lt; 10) - 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * check whether a slot used for disabling an L3 index is occupied.</div><div class='del'>- * @l3: L3 cache descriptor</div><div class='del'>- * @slot: slot number (0..1)</div><div class='del'>- *</div><div class='del'>- * @returns: the disabled index if used or negative value if slot free.</div><div class='del'>- */</div><div class='del'>-static int amd_get_l3_disable_slot(struct amd_northbridge *nb, unsigned slot)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg = 0;</div><div class='del'>-</div><div class='del'>-	pci_read_config_dword(nb-&gt;misc, 0x1BC + slot * 4, &amp;reg);</div><div class='del'>-</div><div class='del'>-	/* check whether this slot is activated already */</div><div class='del'>-	if (reg &amp; (3UL &lt;&lt; 30))</div><div class='del'>-		return reg &amp; 0xfff;</div><div class='del'>-</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t show_cache_disable(struct cacheinfo *this_leaf, char *buf,</div><div class='del'>-				  unsigned int slot)</div><div class='del'>-{</div><div class='del'>-	int index;</div><div class='del'>-	struct amd_northbridge *nb = this_leaf-&gt;priv;</div><div class='del'>-</div><div class='del'>-	index = amd_get_l3_disable_slot(nb, slot);</div><div class='del'>-	if (index &gt;= 0)</div><div class='del'>-		return sprintf(buf, "%d\n", index);</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "FREE\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define SHOW_CACHE_DISABLE(slot)					\</div><div class='del'>-static ssize_t								\</div><div class='del'>-cache_disable_##slot##_show(struct device *dev,				\</div><div class='del'>-			    struct device_attribute *attr, char *buf)	\</div><div class='del'>-{									\</div><div class='del'>-	struct cacheinfo *this_leaf = dev_get_drvdata(dev);		\</div><div class='del'>-	return show_cache_disable(this_leaf, buf, slot);		\</div><div class='del'>-}</div><div class='del'>-SHOW_CACHE_DISABLE(0)</div><div class='del'>-SHOW_CACHE_DISABLE(1)</div><div class='del'>-</div><div class='del'>-static void amd_l3_disable_index(struct amd_northbridge *nb, int cpu,</div><div class='del'>-				 unsigned slot, unsigned long idx)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	idx |= BIT(30);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *  disable index in all 4 subcaches</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		u32 reg = idx | (i &lt;&lt; 20);</div><div class='del'>-</div><div class='del'>-		if (!nb-&gt;l3_cache.subcaches[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		pci_write_config_dword(nb-&gt;misc, 0x1BC + slot * 4, reg);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * We need to WBINVD on a core on the node containing the L3</div><div class='del'>-		 * cache which indices we disable therefore a simple wbinvd()</div><div class='del'>-		 * is not sufficient.</div><div class='del'>-		 */</div><div class='del'>-		wbinvd_on_cpu(cpu);</div><div class='del'>-</div><div class='del'>-		reg |= BIT(31);</div><div class='del'>-		pci_write_config_dword(nb-&gt;misc, 0x1BC + slot * 4, reg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * disable a L3 cache index by using a disable-slot</div><div class='del'>- *</div><div class='del'>- * @l3:    L3 cache descriptor</div><div class='del'>- * @cpu:   A CPU on the node containing the L3 cache</div><div class='del'>- * @slot:  slot number (0..1)</div><div class='del'>- * @index: index to disable</div><div class='del'>- *</div><div class='del'>- * @return: 0 on success, error status on failure</div><div class='del'>- */</div><div class='del'>-static int amd_set_l3_disable_slot(struct amd_northbridge *nb, int cpu,</div><div class='del'>-			    unsigned slot, unsigned long index)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	/*  check if @slot is already used or the index is already disabled */</div><div class='del'>-	ret = amd_get_l3_disable_slot(nb, slot);</div><div class='del'>-	if (ret &gt;= 0)</div><div class='del'>-		return -EEXIST;</div><div class='del'>-</div><div class='del'>-	if (index &gt; nb-&gt;l3_cache.indices)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* check whether the other slot has disabled the same index already */</div><div class='del'>-	if (index == amd_get_l3_disable_slot(nb, !slot))</div><div class='del'>-		return -EEXIST;</div><div class='del'>-</div><div class='del'>-	amd_l3_disable_index(nb, cpu, slot, index);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t store_cache_disable(struct cacheinfo *this_leaf,</div><div class='del'>-				   const char *buf, size_t count,</div><div class='del'>-				   unsigned int slot)</div><div class='del'>-{</div><div class='del'>-	unsigned long val = 0;</div><div class='del'>-	int cpu, err = 0;</div><div class='del'>-	struct amd_northbridge *nb = this_leaf-&gt;priv;</div><div class='del'>-</div><div class='del'>-	if (!capable(CAP_SYS_ADMIN))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	cpu = cpumask_first(&amp;this_leaf-&gt;shared_cpu_map);</div><div class='del'>-</div><div class='del'>-	if (kstrtoul(buf, 10, &amp;val) &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	err = amd_set_l3_disable_slot(nb, cpu, slot, val);</div><div class='del'>-	if (err) {</div><div class='del'>-		if (err == -EEXIST)</div><div class='del'>-			pr_warn("L3 slot %d in use/index already disabled!\n",</div><div class='del'>-				   slot);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define STORE_CACHE_DISABLE(slot)					\</div><div class='del'>-static ssize_t								\</div><div class='del'>-cache_disable_##slot##_store(struct device *dev,			\</div><div class='del'>-			     struct device_attribute *attr,		\</div><div class='del'>-			     const char *buf, size_t count)		\</div><div class='del'>-{									\</div><div class='del'>-	struct cacheinfo *this_leaf = dev_get_drvdata(dev);		\</div><div class='del'>-	return store_cache_disable(this_leaf, buf, count, slot);	\</div><div class='del'>-}</div><div class='del'>-STORE_CACHE_DISABLE(0)</div><div class='del'>-STORE_CACHE_DISABLE(1)</div><div class='del'>-</div><div class='del'>-static ssize_t subcaches_show(struct device *dev,</div><div class='del'>-			      struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	struct cacheinfo *this_leaf = dev_get_drvdata(dev);</div><div class='del'>-	int cpu = cpumask_first(&amp;this_leaf-&gt;shared_cpu_map);</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%x\n", amd_get_subcaches(cpu));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t subcaches_store(struct device *dev,</div><div class='del'>-			       struct device_attribute *attr,</div><div class='del'>-			       const char *buf, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct cacheinfo *this_leaf = dev_get_drvdata(dev);</div><div class='del'>-	int cpu = cpumask_first(&amp;this_leaf-&gt;shared_cpu_map);</div><div class='del'>-	unsigned long val;</div><div class='del'>-</div><div class='del'>-	if (!capable(CAP_SYS_ADMIN))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	if (kstrtoul(buf, 16, &amp;val) &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (amd_set_subcaches(cpu, val))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='add'>+	ebx-&gt;split.coherency_line_size		= line_size - 1;</div><div class='add'>+	ebx-&gt;split.ways_of_associativity	= assoc - 1;</div><div class='add'>+	ebx-&gt;split.physical_line_partition	= lines_per_tag - 1;</div><div class='add'>+	ecx-&gt;split.number_of_sets		= (size_in_kb * 1024) / line_size /</div><div class='add'>+		(ebx-&gt;split.ways_of_associativity + 1) - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR_RW(cache_disable_0);</div><div class='del'>-static DEVICE_ATTR_RW(cache_disable_1);</div><div class='del'>-static DEVICE_ATTR_RW(subcaches);</div><div class='del'>-</div><div class='del'>-static umode_t</div><div class='del'>-cache_private_attrs_is_visible(struct kobject *kobj,</div><div class='del'>-			       struct attribute *attr, int unused)</div><div class='add'>+static int cpuid4_info_fill_done(struct _cpuid4_info *id4, union _cpuid4_leaf_eax eax,</div><div class='add'>+				 union _cpuid4_leaf_ebx ebx, union _cpuid4_leaf_ecx ecx)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = kobj_to_dev(kobj);</div><div class='del'>-	struct cacheinfo *this_leaf = dev_get_drvdata(dev);</div><div class='del'>-	umode_t mode = attr-&gt;mode;</div><div class='del'>-</div><div class='del'>-	if (!this_leaf-&gt;priv)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if ((attr == &amp;dev_attr_subcaches.attr) &amp;&amp;</div><div class='del'>-	    amd_nb_has_feature(AMD_NB_L3_PARTITIONING))</div><div class='del'>-		return mode;</div><div class='add'>+	if (eax.split.type == CTYPE_NULL)</div><div class='add'>+		return -EIO;</div><div class='ctx'> </div><div class='del'>-	if ((attr == &amp;dev_attr_cache_disable_0.attr ||</div><div class='del'>-	     attr == &amp;dev_attr_cache_disable_1.attr) &amp;&amp;</div><div class='del'>-	    amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))</div><div class='del'>-		return mode;</div><div class='add'>+	id4-&gt;eax = eax;</div><div class='add'>+	id4-&gt;ebx = ebx;</div><div class='add'>+	id4-&gt;ecx = ecx;</div><div class='add'>+	id4-&gt;size = (ecx.split.number_of_sets          + 1) *</div><div class='add'>+		    (ebx.split.coherency_line_size     + 1) *</div><div class='add'>+		    (ebx.split.physical_line_partition + 1) *</div><div class='add'>+		    (ebx.split.ways_of_associativity   + 1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct attribute_group cache_private_group = {</div><div class='del'>-	.is_visible = cache_private_attrs_is_visible,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void init_amd_l3_attrs(void)</div><div class='del'>-{</div><div class='del'>-	int n = 1;</div><div class='del'>-	static struct attribute **amd_l3_attrs;</div><div class='del'>-</div><div class='del'>-	if (amd_l3_attrs) /* already initialized */</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE))</div><div class='del'>-		n += 2;</div><div class='del'>-	if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))</div><div class='del'>-		n += 1;</div><div class='del'>-</div><div class='del'>-	amd_l3_attrs = kcalloc(n, sizeof(*amd_l3_attrs), GFP_KERNEL);</div><div class='del'>-	if (!amd_l3_attrs)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	n = 0;</div><div class='del'>-	if (amd_nb_has_feature(AMD_NB_L3_INDEX_DISABLE)) {</div><div class='del'>-		amd_l3_attrs[n++] = &amp;dev_attr_cache_disable_0.attr;</div><div class='del'>-		amd_l3_attrs[n++] = &amp;dev_attr_cache_disable_1.attr;</div><div class='del'>-	}</div><div class='del'>-	if (amd_nb_has_feature(AMD_NB_L3_PARTITIONING))</div><div class='del'>-		amd_l3_attrs[n++] = &amp;dev_attr_subcaches.attr;</div><div class='del'>-</div><div class='del'>-	cache_private_group.attrs = amd_l3_attrs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct attribute_group *</div><div class='del'>-cache_get_priv_group(struct cacheinfo *this_leaf)</div><div class='add'>+static int amd_fill_cpuid4_info(int index, struct _cpuid4_info *id4)</div><div class='ctx'> {</div><div class='del'>-	struct amd_northbridge *nb = this_leaf-&gt;priv;</div><div class='del'>-</div><div class='del'>-	if (this_leaf-&gt;level &lt; 3 || !nb)</div><div class='del'>-		return NULL;</div><div class='add'>+	union _cpuid4_leaf_eax eax;</div><div class='add'>+	union _cpuid4_leaf_ebx ebx;</div><div class='add'>+	union _cpuid4_leaf_ecx ecx;</div><div class='add'>+	u32 ignored;</div><div class='ctx'> </div><div class='del'>-	if (nb &amp;&amp; nb-&gt;l3_cache.indices)</div><div class='del'>-		init_amd_l3_attrs();</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_TOPOEXT) || boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)</div><div class='add'>+		cpuid_count(0x8000001d, index, &amp;eax.full, &amp;ebx.full, &amp;ecx.full, &amp;ignored);</div><div class='add'>+	else</div><div class='add'>+		legacy_amd_cpuid4(index, &amp;eax, &amp;ebx, &amp;ecx);</div><div class='ctx'> </div><div class='del'>-	return &amp;cache_private_group;</div><div class='add'>+	return cpuid4_info_fill_done(id4, eax, ebx, ecx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amd_init_l3_cache(struct _cpuid4_info_regs *this_leaf, int index)</div><div class='add'>+static int intel_fill_cpuid4_info(int index, struct _cpuid4_info *id4)</div><div class='ctx'> {</div><div class='del'>-	int node;</div><div class='add'>+	union _cpuid4_leaf_eax eax;</div><div class='add'>+	union _cpuid4_leaf_ebx ebx;</div><div class='add'>+	union _cpuid4_leaf_ecx ecx;</div><div class='add'>+	u32 ignored;</div><div class='ctx'> </div><div class='del'>-	/* only for L3, and not in virtualized environments */</div><div class='del'>-	if (index &lt; 3)</div><div class='del'>-		return;</div><div class='add'>+	cpuid_count(4, index, &amp;eax.full, &amp;ebx.full, &amp;ecx.full, &amp;ignored);</div><div class='ctx'> </div><div class='del'>-	node = topology_amd_node_id(smp_processor_id());</div><div class='del'>-	this_leaf-&gt;nb = node_to_amd_nb(node);</div><div class='del'>-	if (this_leaf-&gt;nb &amp;&amp; !this_leaf-&gt;nb-&gt;l3_cache.indices)</div><div class='del'>-		amd_calc_l3_indices(this_leaf-&gt;nb);</div><div class='add'>+	return cpuid4_info_fill_done(id4, eax, ebx, ecx);</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-#define amd_init_l3_cache(x, y)</div><div class='del'>-#endif  /* CONFIG_AMD_NB &amp;&amp; CONFIG_SYSFS */</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-cpuid4_cache_lookup_regs(int index, struct _cpuid4_info_regs *this_leaf)</div><div class='add'>+static int fill_cpuid4_info(int index, struct _cpuid4_info *id4)</div><div class='ctx'> {</div><div class='del'>-	union _cpuid4_leaf_eax	eax;</div><div class='del'>-	union _cpuid4_leaf_ebx	ebx;</div><div class='del'>-	union _cpuid4_leaf_ecx	ecx;</div><div class='del'>-	unsigned		edx;</div><div class='del'>-</div><div class='del'>-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {</div><div class='del'>-		if (boot_cpu_has(X86_FEATURE_TOPOEXT))</div><div class='del'>-			cpuid_count(0x8000001d, index, &amp;eax.full,</div><div class='del'>-				    &amp;ebx.full, &amp;ecx.full, &amp;edx);</div><div class='del'>-		else</div><div class='del'>-			amd_cpuid4(index, &amp;eax, &amp;ebx, &amp;ecx);</div><div class='del'>-		amd_init_l3_cache(this_leaf, index);</div><div class='del'>-	} else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {</div><div class='del'>-		cpuid_count(0x8000001d, index, &amp;eax.full,</div><div class='del'>-			    &amp;ebx.full, &amp;ecx.full, &amp;edx);</div><div class='del'>-		amd_init_l3_cache(this_leaf, index);</div><div class='del'>-	} else {</div><div class='del'>-		cpuid_count(4, index, &amp;eax.full, &amp;ebx.full, &amp;ecx.full, &amp;edx);</div><div class='del'>-	}</div><div class='add'>+	u8 cpu_vendor = boot_cpu_data.x86_vendor;</div><div class='ctx'> </div><div class='del'>-	if (eax.split.type == CTYPE_NULL)</div><div class='del'>-		return -EIO; /* better error ? */</div><div class='del'>-</div><div class='del'>-	this_leaf-&gt;eax = eax;</div><div class='del'>-	this_leaf-&gt;ebx = ebx;</div><div class='del'>-	this_leaf-&gt;ecx = ecx;</div><div class='del'>-	this_leaf-&gt;size = (ecx.split.number_of_sets          + 1) *</div><div class='del'>-			  (ebx.split.coherency_line_size     + 1) *</div><div class='del'>-			  (ebx.split.physical_line_partition + 1) *</div><div class='del'>-			  (ebx.split.ways_of_associativity   + 1);</div><div class='del'>-	return 0;</div><div class='add'>+	return (cpu_vendor == X86_VENDOR_AMD || cpu_vendor == X86_VENDOR_HYGON) ?</div><div class='add'>+		amd_fill_cpuid4_info(index, id4) :</div><div class='add'>+		intel_fill_cpuid4_info(index, id4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int find_num_cache_leaves(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='del'>-	unsigned int		eax, ebx, ecx, edx, op;</div><div class='del'>-	union _cpuid4_leaf_eax	cache_eax;</div><div class='del'>-	int 			i = -1;</div><div class='del'>-</div><div class='del'>-	if (c-&gt;x86_vendor == X86_VENDOR_AMD ||</div><div class='del'>-	    c-&gt;x86_vendor == X86_VENDOR_HYGON)</div><div class='del'>-		op = 0x8000001d;</div><div class='del'>-	else</div><div class='del'>-		op = 4;</div><div class='add'>+	unsigned int eax, ebx, ecx, edx, op;</div><div class='add'>+	union _cpuid4_leaf_eax cache_eax;</div><div class='add'>+	int i = -1;</div><div class='ctx'> </div><div class='add'>+	/* Do a CPUID(op) loop to calculate num_cache_leaves */</div><div class='add'>+	op = (c-&gt;x86_vendor == X86_VENDOR_AMD || c-&gt;x86_vendor == X86_VENDOR_HYGON) ? 0x8000001d : 4;</div><div class='ctx'> 	do {</div><div class='ctx'> 		++i;</div><div class='del'>-		/* Do cpuid(op) loop to find out num_cache_leaves */</div><div class='ctx'> 		cpuid_count(op, i, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='ctx'> 		cache_eax.full = eax;</div><div class='ctx'> 	} while (cache_eax.split.type != CTYPE_NULL);</div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * AMD/Hygon CPUs may have multiple LLCs if L3 caches exist.</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, u16 die_id)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * We may have multiple LLCs if L3 caches exist, so check if we</div><div class='del'>-	 * have an L3 cache by looking at the L3 cache CPUID leaf.</div><div class='del'>-	 */</div><div class='del'>-	if (!cpuid_edx(0x80000006))</div><div class='add'>+	if (!cpuid_amd_hygon_has_l3_cache())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;x86 &lt; 0x17) {</div><div class='del'>-		/* LLC is at the node level. */</div><div class='add'>+		/* Pre-Zen: LLC is at the node level */</div><div class='ctx'> 		c-&gt;topo.llc_id = die_id;</div><div class='ctx'> 	} else if (c-&gt;x86 == 0x17 &amp;&amp; c-&gt;x86_model &lt;= 0x1F) {</div><div class='ctx'> 		/*</div><div class='del'>-		 * LLC is at the core complex level.</div><div class='del'>-		 * Core complex ID is ApicId[3] for these processors.</div><div class='add'>+		 * Family 17h up to 1F models: LLC is at the core</div><div class='add'>+		 * complex level.  Core complex ID is ApicId[3].</div><div class='ctx'> 		 */</div><div class='ctx'> 		c-&gt;topo.llc_id = c-&gt;topo.apicid &gt;&gt; 3;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='del'>-		 * LLC ID is calculated from the number of threads sharing the</div><div class='del'>-		 * cache.</div><div class='del'>-		 * */</div><div class='add'>+		 * Newer families: LLC ID is calculated from the number</div><div class='add'>+		 * of threads sharing the L3 cache.</div><div class='add'>+		 */</div><div class='ctx'> 		u32 eax, ebx, ecx, edx, num_sharing_cache = 0;</div><div class='ctx'> 		u32 llc_index = find_num_cache_leaves(c) - 1;</div><div class='ctx'> </div><div class='hunk'>@@ -683,25 +320,21 @@ void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, u16 die_id)</div><div class='ctx'> 			num_sharing_cache = ((eax &gt;&gt; 14) &amp; 0xfff) + 1;</div><div class='ctx'> </div><div class='ctx'> 		if (num_sharing_cache) {</div><div class='del'>-			int bits = get_count_order(num_sharing_cache);</div><div class='add'>+			int index_msb = get_count_order(num_sharing_cache);</div><div class='ctx'> </div><div class='del'>-			c-&gt;topo.llc_id = c-&gt;topo.apicid &gt;&gt; bits;</div><div class='add'>+			c-&gt;topo.llc_id = c-&gt;topo.apicid &gt;&gt; index_msb;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * We may have multiple LLCs if L3 caches exist, so check if we</div><div class='del'>-	 * have an L3 cache by looking at the L3 cache CPUID leaf.</div><div class='del'>-	 */</div><div class='del'>-	if (!cpuid_edx(0x80000006))</div><div class='add'>+	if (!cpuid_amd_hygon_has_l3_cache())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * LLC is at the core complex level.</div><div class='del'>-	 * Core complex ID is ApicId[3] for these processors.</div><div class='add'>+	 * Hygons are similar to AMD Family 17h up to 1F models: LLC is</div><div class='add'>+	 * at the core complex level.  Core complex ID is ApicId[3].</div><div class='ctx'> 	 */</div><div class='ctx'> 	c-&gt;topo.llc_id = c-&gt;topo.apicid &gt;&gt; 3;</div><div class='ctx'> }</div><div class='hunk'>@@ -710,14 +343,10 @@ void init_amd_cacheinfo(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_cacheinfo *ci = get_cpu_cacheinfo(c-&gt;cpu_index);</div><div class='ctx'> </div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_TOPOEXT))</div><div class='ctx'> 		ci-&gt;num_leaves = find_num_cache_leaves(c);</div><div class='del'>-	} else if (c-&gt;extended_cpuid_level &gt;= 0x80000006) {</div><div class='del'>-		if (cpuid_edx(0x80000006) &amp; 0xf000)</div><div class='del'>-			ci-&gt;num_leaves = 4;</div><div class='del'>-		else</div><div class='del'>-			ci-&gt;num_leaves = 3;</div><div class='del'>-	}</div><div class='add'>+	else if (c-&gt;extended_cpuid_level &gt;= 0x80000006)</div><div class='add'>+		ci-&gt;num_leaves = (cpuid_edx(0x80000006) &amp; 0xf000) ? 4 : 3;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void init_hygon_cacheinfo(struct cpuinfo_x86 *c)</div><div class='hunk'>@@ -727,148 +356,131 @@ void init_hygon_cacheinfo(struct cpuinfo_x86 *c)</div><div class='ctx'> 	ci-&gt;num_leaves = find_num_cache_leaves(c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void init_intel_cacheinfo(struct cpuinfo_x86 *c)</div><div class='add'>+static void intel_cacheinfo_done(struct cpuinfo_x86 *c, unsigned int l3,</div><div class='add'>+				 unsigned int l2, unsigned int l1i, unsigned int l1d)</div><div class='ctx'> {</div><div class='del'>-	/* Cache sizes */</div><div class='del'>-	unsigned int l1i = 0, l1d = 0, l2 = 0, l3 = 0;</div><div class='del'>-	unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */</div><div class='del'>-	unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */</div><div class='del'>-	unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;</div><div class='del'>-	struct cpu_cacheinfo *ci = get_cpu_cacheinfo(c-&gt;cpu_index);</div><div class='add'>+	/*</div><div class='add'>+	 * If llc_id is still unset, then cpuid_level &lt; 4, which implies</div><div class='add'>+	 * that the only possibility left is SMT.  Since CPUID(0x2) doesn't</div><div class='add'>+	 * specify any shared caches and SMT shares all caches, we can</div><div class='add'>+	 * unconditionally set LLC ID to the package ID so that all</div><div class='add'>+	 * threads share it.</div><div class='add'>+	 */</div><div class='add'>+	if (c-&gt;topo.llc_id == BAD_APICID)</div><div class='add'>+		c-&gt;topo.llc_id = c-&gt;topo.pkg_id;</div><div class='ctx'> </div><div class='del'>-	if (c-&gt;cpuid_level &gt; 3) {</div><div class='del'>-		/*</div><div class='del'>-		 * There should be at least one leaf. A non-zero value means</div><div class='del'>-		 * that the number of leaves has been initialized.</div><div class='del'>-		 */</div><div class='del'>-		if (!ci-&gt;num_leaves)</div><div class='del'>-			ci-&gt;num_leaves = find_num_cache_leaves(c);</div><div class='add'>+	c-&gt;x86_cache_size = l3 ? l3 : (l2 ? l2 : l1i + l1d);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Whenever possible use cpuid(4), deterministic cache</div><div class='del'>-		 * parameters cpuid leaf to find the cache details</div><div class='del'>-		 */</div><div class='del'>-		for (i = 0; i &lt; ci-&gt;num_leaves; i++) {</div><div class='del'>-			struct _cpuid4_info_regs this_leaf = {};</div><div class='del'>-			int retval;</div><div class='add'>+	if (!l2)</div><div class='add'>+		cpu_detect_cache_sizes(c);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			retval = cpuid4_cache_lookup_regs(i, &amp;this_leaf);</div><div class='del'>-			if (retval &lt; 0)</div><div class='del'>-				continue;</div><div class='add'>+/*</div><div class='add'>+ * Legacy Intel CPUID(0x2) path if CPUID(0x4) is not available.</div><div class='add'>+ */</div><div class='add'>+static void intel_cacheinfo_0x2(struct cpuinfo_x86 *c)</div><div class='add'>+{</div><div class='add'>+	unsigned int l1i = 0, l1d = 0, l2 = 0, l3 = 0;</div><div class='add'>+	const struct leaf_0x2_table *desc;</div><div class='add'>+	union leaf_0x2_regs regs;</div><div class='add'>+	u8 *ptr;</div><div class='ctx'> </div><div class='del'>-			switch (this_leaf.eax.split.level) {</div><div class='del'>-			case 1:</div><div class='del'>-				if (this_leaf.eax.split.type == CTYPE_DATA)</div><div class='del'>-					new_l1d = this_leaf.size/1024;</div><div class='del'>-				else if (this_leaf.eax.split.type == CTYPE_INST)</div><div class='del'>-					new_l1i = this_leaf.size/1024;</div><div class='del'>-				break;</div><div class='del'>-			case 2:</div><div class='del'>-				new_l2 = this_leaf.size/1024;</div><div class='del'>-				num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;</div><div class='del'>-				index_msb = get_count_order(num_threads_sharing);</div><div class='del'>-				l2_id = c-&gt;topo.apicid &amp; ~((1 &lt;&lt; index_msb) - 1);</div><div class='del'>-				break;</div><div class='del'>-			case 3:</div><div class='del'>-				new_l3 = this_leaf.size/1024;</div><div class='del'>-				num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;</div><div class='del'>-				index_msb = get_count_order(num_threads_sharing);</div><div class='del'>-				l3_id = c-&gt;topo.apicid &amp; ~((1 &lt;&lt; index_msb) - 1);</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (c-&gt;cpuid_level &lt; 2)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* Don't use CPUID(2) if CPUID(4) is supported. */</div><div class='del'>-	if (!ci-&gt;num_leaves &amp;&amp; c-&gt;cpuid_level &gt; 1) {</div><div class='del'>-		/* supports eax=2  call */</div><div class='del'>-		int j, n;</div><div class='del'>-		unsigned int regs[4];</div><div class='del'>-		unsigned char *dp = (unsigned char *)regs;</div><div class='del'>-</div><div class='del'>-		/* Number of times to iterate */</div><div class='del'>-		n = cpuid_eax(2) &amp; 0xFF;</div><div class='del'>-</div><div class='del'>-		for (i = 0 ; i &lt; n ; i++) {</div><div class='del'>-			cpuid(2, &amp;regs[0], &amp;regs[1], &amp;regs[2], &amp;regs[3]);</div><div class='del'>-</div><div class='del'>-			/* If bit 31 is set, this is an unknown format */</div><div class='del'>-			for (j = 0 ; j &lt; 4 ; j++)</div><div class='del'>-				if (regs[j] &amp; (1 &lt;&lt; 31))</div><div class='del'>-					regs[j] = 0;</div><div class='del'>-</div><div class='del'>-			/* Byte 0 is level count, not a descriptor */</div><div class='del'>-			for (j = 1 ; j &lt; 16 ; j++) {</div><div class='del'>-				unsigned char des = dp[j];</div><div class='del'>-				unsigned char k = 0;</div><div class='del'>-</div><div class='del'>-				/* look up this descriptor in the table */</div><div class='del'>-				while (cache_table[k].descriptor != 0) {</div><div class='del'>-					if (cache_table[k].descriptor == des) {</div><div class='del'>-						switch (cache_table[k].cache_type) {</div><div class='del'>-						case LVL_1_INST:</div><div class='del'>-							l1i += cache_table[k].size;</div><div class='del'>-							break;</div><div class='del'>-						case LVL_1_DATA:</div><div class='del'>-							l1d += cache_table[k].size;</div><div class='del'>-							break;</div><div class='del'>-						case LVL_2:</div><div class='del'>-							l2 += cache_table[k].size;</div><div class='del'>-							break;</div><div class='del'>-						case LVL_3:</div><div class='del'>-							l3 += cache_table[k].size;</div><div class='del'>-							break;</div><div class='del'>-						}</div><div class='del'>-</div><div class='del'>-						break;</div><div class='del'>-					}</div><div class='del'>-</div><div class='del'>-					k++;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='add'>+	cpuid_leaf_0x2(&amp;regs);</div><div class='add'>+	for_each_cpuid_0x2_desc(regs, ptr, desc) {</div><div class='add'>+		switch (desc-&gt;c_type) {</div><div class='add'>+		case CACHE_L1_INST:	l1i += desc-&gt;c_size; break;</div><div class='add'>+		case CACHE_L1_DATA:	l1d += desc-&gt;c_size; break;</div><div class='add'>+		case CACHE_L2:		l2  += desc-&gt;c_size; break;</div><div class='add'>+		case CACHE_L3:		l3  += desc-&gt;c_size; break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (new_l1d)</div><div class='del'>-		l1d = new_l1d;</div><div class='add'>+	intel_cacheinfo_done(c, l3, l2, l1i, l1d);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (new_l1i)</div><div class='del'>-		l1i = new_l1i;</div><div class='add'>+static unsigned int calc_cache_topo_id(struct cpuinfo_x86 *c, const struct _cpuid4_info *id4)</div><div class='add'>+{</div><div class='add'>+	unsigned int num_threads_sharing;</div><div class='add'>+	int index_msb;</div><div class='ctx'> </div><div class='del'>-	if (new_l2) {</div><div class='del'>-		l2 = new_l2;</div><div class='del'>-		c-&gt;topo.llc_id = l2_id;</div><div class='del'>-		c-&gt;topo.l2c_id = l2_id;</div><div class='del'>-	}</div><div class='add'>+	num_threads_sharing = 1 + id4-&gt;eax.split.num_threads_sharing;</div><div class='add'>+	index_msb = get_count_order(num_threads_sharing);</div><div class='add'>+	return c-&gt;topo.apicid &amp; ~((1 &lt;&lt; index_msb) - 1);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (new_l3) {</div><div class='del'>-		l3 = new_l3;</div><div class='del'>-		c-&gt;topo.llc_id = l3_id;</div><div class='del'>-	}</div><div class='add'>+static bool intel_cacheinfo_0x4(struct cpuinfo_x86 *c)</div><div class='add'>+{</div><div class='add'>+	struct cpu_cacheinfo *ci = get_cpu_cacheinfo(c-&gt;cpu_index);</div><div class='add'>+	unsigned int l2_id = BAD_APICID, l3_id = BAD_APICID;</div><div class='add'>+	unsigned int l1d = 0, l1i = 0, l2 = 0, l3 = 0;</div><div class='add'>+</div><div class='add'>+	if (c-&gt;cpuid_level &lt; 4)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If llc_id is not yet set, this means cpuid_level &lt; 4 which in</div><div class='del'>-	 * turns means that the only possibility is SMT (as indicated in</div><div class='del'>-	 * cpuid1). Since cpuid2 doesn't specify shared caches, and we know</div><div class='del'>-	 * that SMT shares all caches, we can unconditionally set cpu_llc_id to</div><div class='del'>-	 * c-&gt;topo.pkg_id.</div><div class='add'>+	 * There should be at least one leaf. A non-zero value means</div><div class='add'>+	 * that the number of leaves has been previously initialized.</div><div class='ctx'> 	 */</div><div class='del'>-	if (c-&gt;topo.llc_id == BAD_APICID)</div><div class='del'>-		c-&gt;topo.llc_id = c-&gt;topo.pkg_id;</div><div class='add'>+	if (!ci-&gt;num_leaves)</div><div class='add'>+		ci-&gt;num_leaves = find_num_cache_leaves(c);</div><div class='add'>+</div><div class='add'>+	if (!ci-&gt;num_leaves)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	c-&gt;x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));</div><div class='add'>+	for (int i = 0; i &lt; ci-&gt;num_leaves; i++) {</div><div class='add'>+		struct _cpuid4_info id4 = {};</div><div class='add'>+		int ret;</div><div class='ctx'> </div><div class='del'>-	if (!l2)</div><div class='del'>-		cpu_detect_cache_sizes(c);</div><div class='add'>+		ret = intel_fill_cpuid4_info(i, &amp;id4);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (id4.eax.split.level) {</div><div class='add'>+		case 1:</div><div class='add'>+			if (id4.eax.split.type == CTYPE_DATA)</div><div class='add'>+				l1d = id4.size / 1024;</div><div class='add'>+			else if (id4.eax.split.type == CTYPE_INST)</div><div class='add'>+				l1i = id4.size / 1024;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			l2 = id4.size / 1024;</div><div class='add'>+			l2_id = calc_cache_topo_id(c, &amp;id4);</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			l3 = id4.size / 1024;</div><div class='add'>+			l3_id = calc_cache_topo_id(c, &amp;id4);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	c-&gt;topo.l2c_id = l2_id;</div><div class='add'>+	c-&gt;topo.llc_id = (l3_id == BAD_APICID) ? l2_id : l3_id;</div><div class='add'>+	intel_cacheinfo_done(c, l3, l2, l1i, l1d);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void init_intel_cacheinfo(struct cpuinfo_x86 *c)</div><div class='add'>+{</div><div class='add'>+	/* Don't use CPUID(0x2) if CPUID(0x4) is supported. */</div><div class='add'>+	if (intel_cacheinfo_0x4(c))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	intel_cacheinfo_0x2(c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * &lt;linux/cacheinfo.h&gt; shared_cpu_map setup, AMD/Hygon</div><div class='add'>+ */</div><div class='ctx'> static int __cache_amd_cpumap_setup(unsigned int cpu, int index,</div><div class='del'>-				    struct _cpuid4_info_regs *base)</div><div class='add'>+				    const struct _cpuid4_info *id4)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_cacheinfo *this_cpu_ci;</div><div class='del'>-	struct cacheinfo *this_leaf;</div><div class='add'>+	struct cacheinfo *ci;</div><div class='ctx'> 	int i, sibling;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -880,18 +492,18 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index,</div><div class='ctx'> 			this_cpu_ci = get_cpu_cacheinfo(i);</div><div class='ctx'> 			if (!this_cpu_ci-&gt;info_list)</div><div class='ctx'> 				continue;</div><div class='del'>-			this_leaf = this_cpu_ci-&gt;info_list + index;</div><div class='add'>+</div><div class='add'>+			ci = this_cpu_ci-&gt;info_list + index;</div><div class='ctx'> 			for_each_cpu(sibling, cpu_llc_shared_mask(cpu)) {</div><div class='ctx'> 				if (!cpu_online(sibling))</div><div class='ctx'> 					continue;</div><div class='del'>-				cpumask_set_cpu(sibling,</div><div class='del'>-						&amp;this_leaf-&gt;shared_cpu_map);</div><div class='add'>+				cpumask_set_cpu(sibling, &amp;ci-&gt;shared_cpu_map);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {</div><div class='ctx'> 		unsigned int apicid, nshared, first, last;</div><div class='ctx'> </div><div class='del'>-		nshared = base-&gt;eax.split.num_threads_sharing + 1;</div><div class='add'>+		nshared = id4-&gt;eax.split.num_threads_sharing + 1;</div><div class='ctx'> 		apicid = cpu_data(cpu).topo.apicid;</div><div class='ctx'> 		first = apicid - (apicid % nshared);</div><div class='ctx'> 		last = first + nshared - 1;</div><div class='hunk'>@@ -905,14 +517,13 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index,</div><div class='ctx'> 			if ((apicid &lt; first) || (apicid &gt; last))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			this_leaf = this_cpu_ci-&gt;info_list + index;</div><div class='add'>+			ci = this_cpu_ci-&gt;info_list + index;</div><div class='ctx'> </div><div class='ctx'> 			for_each_online_cpu(sibling) {</div><div class='ctx'> 				apicid = cpu_data(sibling).topo.apicid;</div><div class='ctx'> 				if ((apicid &lt; first) || (apicid &gt; last))</div><div class='ctx'> 					continue;</div><div class='del'>-				cpumask_set_cpu(sibling,</div><div class='del'>-						&amp;this_leaf-&gt;shared_cpu_map);</div><div class='add'>+				cpumask_set_cpu(sibling, &amp;ci-&gt;shared_cpu_map);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -921,25 +532,27 @@ static int __cache_amd_cpumap_setup(unsigned int cpu, int index,</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * &lt;linux/cacheinfo.h&gt; shared_cpu_map setup, Intel + fallback AMD/Hygon</div><div class='add'>+ */</div><div class='ctx'> static void __cache_cpumap_setup(unsigned int cpu, int index,</div><div class='del'>-				 struct _cpuid4_info_regs *base)</div><div class='add'>+				 const struct _cpuid4_info *id4)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='del'>-	struct cacheinfo *this_leaf, *sibling_leaf;</div><div class='add'>+	struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='add'>+	struct cacheinfo *ci, *sibling_ci;</div><div class='ctx'> 	unsigned long num_threads_sharing;</div><div class='ctx'> 	int index_msb, i;</div><div class='del'>-	struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='ctx'> </div><div class='del'>-	if (c-&gt;x86_vendor == X86_VENDOR_AMD ||</div><div class='del'>-	    c-&gt;x86_vendor == X86_VENDOR_HYGON) {</div><div class='del'>-		if (__cache_amd_cpumap_setup(cpu, index, base))</div><div class='add'>+	if (c-&gt;x86_vendor == X86_VENDOR_AMD || c-&gt;x86_vendor == X86_VENDOR_HYGON) {</div><div class='add'>+		if (__cache_amd_cpumap_setup(cpu, index, id4))</div><div class='ctx'> 			return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	this_leaf = this_cpu_ci-&gt;info_list + index;</div><div class='del'>-	num_threads_sharing = 1 + base-&gt;eax.split.num_threads_sharing;</div><div class='add'>+	ci = this_cpu_ci-&gt;info_list + index;</div><div class='add'>+	num_threads_sharing = 1 + id4-&gt;eax.split.num_threads_sharing;</div><div class='ctx'> </div><div class='del'>-	cpumask_set_cpu(cpu, &amp;this_leaf-&gt;shared_cpu_map);</div><div class='add'>+	cpumask_set_cpu(cpu, &amp;ci-&gt;shared_cpu_map);</div><div class='ctx'> 	if (num_threads_sharing == 1)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -949,30 +562,29 @@ static void __cache_cpumap_setup(unsigned int cpu, int index,</div><div class='ctx'> 		if (cpu_data(i).topo.apicid &gt;&gt; index_msb == c-&gt;topo.apicid &gt;&gt; index_msb) {</div><div class='ctx'> 			struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);</div><div class='ctx'> </div><div class='add'>+			/* Skip if itself or no cacheinfo */</div><div class='ctx'> 			if (i == cpu || !sib_cpu_ci-&gt;info_list)</div><div class='del'>-				continue;/* skip if itself or no cacheinfo */</div><div class='del'>-			sibling_leaf = sib_cpu_ci-&gt;info_list + index;</div><div class='del'>-			cpumask_set_cpu(i, &amp;this_leaf-&gt;shared_cpu_map);</div><div class='del'>-			cpumask_set_cpu(cpu, &amp;sibling_leaf-&gt;shared_cpu_map);</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			sibling_ci = sib_cpu_ci-&gt;info_list + index;</div><div class='add'>+			cpumask_set_cpu(i, &amp;ci-&gt;shared_cpu_map);</div><div class='add'>+			cpumask_set_cpu(cpu, &amp;sibling_ci-&gt;shared_cpu_map);</div><div class='ctx'> 		}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ci_leaf_init(struct cacheinfo *this_leaf,</div><div class='del'>-			 struct _cpuid4_info_regs *base)</div><div class='add'>+static void ci_info_init(struct cacheinfo *ci, const struct _cpuid4_info *id4,</div><div class='add'>+			 struct amd_northbridge *nb)</div><div class='ctx'> {</div><div class='del'>-	this_leaf-&gt;id = base-&gt;id;</div><div class='del'>-	this_leaf-&gt;attributes = CACHE_ID;</div><div class='del'>-	this_leaf-&gt;level = base-&gt;eax.split.level;</div><div class='del'>-	this_leaf-&gt;type = cache_type_map[base-&gt;eax.split.type];</div><div class='del'>-	this_leaf-&gt;coherency_line_size =</div><div class='del'>-				base-&gt;ebx.split.coherency_line_size + 1;</div><div class='del'>-	this_leaf-&gt;ways_of_associativity =</div><div class='del'>-				base-&gt;ebx.split.ways_of_associativity + 1;</div><div class='del'>-	this_leaf-&gt;size = base-&gt;size;</div><div class='del'>-	this_leaf-&gt;number_of_sets = base-&gt;ecx.split.number_of_sets + 1;</div><div class='del'>-	this_leaf-&gt;physical_line_partition =</div><div class='del'>-				base-&gt;ebx.split.physical_line_partition + 1;</div><div class='del'>-	this_leaf-&gt;priv = base-&gt;nb;</div><div class='add'>+	ci-&gt;id				= id4-&gt;id;</div><div class='add'>+	ci-&gt;attributes			= CACHE_ID;</div><div class='add'>+	ci-&gt;level			= id4-&gt;eax.split.level;</div><div class='add'>+	ci-&gt;type			= cache_type_map[id4-&gt;eax.split.type];</div><div class='add'>+	ci-&gt;coherency_line_size		= id4-&gt;ebx.split.coherency_line_size + 1;</div><div class='add'>+	ci-&gt;ways_of_associativity	= id4-&gt;ebx.split.ways_of_associativity + 1;</div><div class='add'>+	ci-&gt;size			= id4-&gt;size;</div><div class='add'>+	ci-&gt;number_of_sets		= id4-&gt;ecx.split.number_of_sets + 1;</div><div class='add'>+	ci-&gt;physical_line_partition	= id4-&gt;ebx.split.physical_line_partition + 1;</div><div class='add'>+	ci-&gt;priv			= nb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int init_cache_level(unsigned int cpu)</div><div class='hunk'>@@ -987,38 +599,45 @@ int init_cache_level(unsigned int cpu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The max shared threads number comes from CPUID.4:EAX[25-14] with input</div><div class='add'>+ * The max shared threads number comes from CPUID(0x4) EAX[25-14] with input</div><div class='ctx'>  * ECX as cache index. Then right shift apicid by the number's order to get</div><div class='ctx'>  * cache id for this cache node.</div><div class='ctx'>  */</div><div class='del'>-static void get_cache_id(int cpu, struct _cpuid4_info_regs *id4_regs)</div><div class='add'>+static void get_cache_id(int cpu, struct _cpuid4_info *id4)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='ctx'> 	unsigned long num_threads_sharing;</div><div class='ctx'> 	int index_msb;</div><div class='ctx'> </div><div class='del'>-	num_threads_sharing = 1 + id4_regs-&gt;eax.split.num_threads_sharing;</div><div class='add'>+	num_threads_sharing = 1 + id4-&gt;eax.split.num_threads_sharing;</div><div class='ctx'> 	index_msb = get_count_order(num_threads_sharing);</div><div class='del'>-	id4_regs-&gt;id = c-&gt;topo.apicid &gt;&gt; index_msb;</div><div class='add'>+	id4-&gt;id = c-&gt;topo.apicid &gt;&gt; index_msb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int populate_cache_leaves(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned int idx, ret;</div><div class='ctx'> 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);</div><div class='del'>-	struct cacheinfo *this_leaf = this_cpu_ci-&gt;info_list;</div><div class='del'>-	struct _cpuid4_info_regs id4_regs = {};</div><div class='add'>+	struct cacheinfo *ci = this_cpu_ci-&gt;info_list;</div><div class='add'>+	u8 cpu_vendor = boot_cpu_data.x86_vendor;</div><div class='add'>+	struct amd_northbridge *nb = NULL;</div><div class='add'>+	struct _cpuid4_info id4 = {};</div><div class='add'>+	int idx, ret;</div><div class='ctx'> </div><div class='ctx'> 	for (idx = 0; idx &lt; this_cpu_ci-&gt;num_leaves; idx++) {</div><div class='del'>-		ret = cpuid4_cache_lookup_regs(idx, &amp;id4_regs);</div><div class='add'>+		ret = fill_cpuid4_info(idx, &amp;id4);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='del'>-		get_cache_id(cpu, &amp;id4_regs);</div><div class='del'>-		ci_leaf_init(this_leaf++, &amp;id4_regs);</div><div class='del'>-		__cache_cpumap_setup(cpu, idx, &amp;id4_regs);</div><div class='add'>+</div><div class='add'>+		get_cache_id(cpu, &amp;id4);</div><div class='add'>+</div><div class='add'>+		if (cpu_vendor == X86_VENDOR_AMD || cpu_vendor == X86_VENDOR_HYGON)</div><div class='add'>+			nb = amd_init_l3_cache(idx);</div><div class='add'>+</div><div class='add'>+		ci_info_init(ci++, &amp;id4, nb);</div><div class='add'>+		__cache_cpumap_setup(cpu, idx, &amp;id4);</div><div class='ctx'> 	}</div><div class='del'>-	this_cpu_ci-&gt;cpu_map_populated = true;</div><div class='ctx'> </div><div class='add'>+	this_cpu_ci-&gt;cpu_map_populated = true;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1034,31 +653,33 @@ int populate_cache_leaves(unsigned int cpu)</div><div class='ctx'> static unsigned long saved_cr4;</div><div class='ctx'> static DEFINE_RAW_SPINLOCK(cache_disable_lock);</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Cache flushing is the most time-consuming step when programming the</div><div class='add'>+ * MTRRs.  On many Intel CPUs without known erratas, it can be skipped</div><div class='add'>+ * if the CPU declares cache self-snooping support.</div><div class='add'>+ */</div><div class='add'>+static void maybe_flush_caches(void)</div><div class='add'>+{</div><div class='add'>+	if (!static_cpu_has(X86_FEATURE_SELFSNOOP))</div><div class='add'>+		wbinvd();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void cache_disable(void) __acquires(cache_disable_lock)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long cr0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Note that this is not ideal</div><div class='del'>-	 * since the cache is only flushed/disabled for this CPU while the</div><div class='del'>-	 * MTRRs are changed, but changing this requires more invasive</div><div class='del'>-	 * changes to the way the kernel boots</div><div class='add'>+	 * This is not ideal since the cache is only flushed/disabled</div><div class='add'>+	 * for this CPU while the MTRRs are changed, but changing this</div><div class='add'>+	 * requires more invasive changes to the way the kernel boots.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='ctx'> 	raw_spin_lock(&amp;cache_disable_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Enter the no-fill (CD=1, NW=0) cache mode and flush caches. */</div><div class='ctx'> 	cr0 = read_cr0() | X86_CR0_CD;</div><div class='ctx'> 	write_cr0(cr0);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Cache flushing is the most time-consuming step when programming</div><div class='del'>-	 * the MTRRs. Fortunately, as per the Intel Software Development</div><div class='del'>-	 * Manual, we can skip it if the processor supports cache self-</div><div class='del'>-	 * snooping.</div><div class='del'>-	 */</div><div class='del'>-	if (!static_cpu_has(X86_FEATURE_SELFSNOOP))</div><div class='del'>-		wbinvd();</div><div class='add'>+	maybe_flush_caches();</div><div class='ctx'> </div><div class='ctx'> 	/* Save value of CR4 and clear Page Global Enable (bit 7) */</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_PGE)) {</div><div class='hunk'>@@ -1073,9 +694,7 @@ void cache_disable(void) __acquires(cache_disable_lock)</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_MTRR))</div><div class='ctx'> 		mtrr_disable();</div><div class='ctx'> </div><div class='del'>-	/* Again, only flush caches if we have to. */</div><div class='del'>-	if (!static_cpu_has(X86_FEATURE_SELFSNOOP))</div><div class='del'>-		wbinvd();</div><div class='add'>+	maybe_flush_caches();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cache_enable(void) __releases(cache_disable_lock)</div><div class='head'>diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c<br/>index 12126adbc3a9..8feb8fd2957a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/common.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/common.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/alternative.h&gt;</div><div class='ctx'> #include &lt;asm/cmdline.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/doublefault.h&gt;</div><div class='hunk'>@@ -148,7 +148,7 @@ static void ppin_init(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 */</div><div class='ctx'> 	info = (struct ppin_info *)id-&gt;driver_data;</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(info-&gt;msr_ppin_ctl, &amp;val))</div><div class='add'>+	if (rdmsrq_safe(info-&gt;msr_ppin_ctl, &amp;val))</div><div class='ctx'> 		goto clear_ppin;</div><div class='ctx'> </div><div class='ctx'> 	if ((val &amp; 3UL) == 1UL) {</div><div class='hunk'>@@ -158,13 +158,13 @@ static void ppin_init(struct cpuinfo_x86 *c)</div><div class='ctx'> </div><div class='ctx'> 	/* If PPIN is disabled, try to enable */</div><div class='ctx'> 	if (!(val &amp; 2UL)) {</div><div class='del'>-		wrmsrl_safe(info-&gt;msr_ppin_ctl,  val | 2UL);</div><div class='del'>-		rdmsrl_safe(info-&gt;msr_ppin_ctl, &amp;val);</div><div class='add'>+		wrmsrq_safe(info-&gt;msr_ppin_ctl,  val | 2UL);</div><div class='add'>+		rdmsrq_safe(info-&gt;msr_ppin_ctl, &amp;val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Is the enable bit set? */</div><div class='ctx'> 	if (val &amp; 2UL) {</div><div class='del'>-		c-&gt;ppin = __rdmsr(info-&gt;msr_ppin);</div><div class='add'>+		c-&gt;ppin = native_rdmsrq(info-&gt;msr_ppin);</div><div class='ctx'> 		set_cpu_cap(c, info-&gt;feature);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -242,6 +242,7 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {</div><div class='ctx'> #endif</div><div class='ctx'> } };</div><div class='ctx'> EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);</div><div class='add'>+SYM_PIC_ALIAS(gdt_page);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> static int __init x86_nopcid_setup(char *s)</div><div class='hunk'>@@ -321,7 +322,7 @@ static int __init cachesize_setup(char *str)</div><div class='ctx'> __setup("cachesize=", cachesize_setup);</div><div class='ctx'> </div><div class='ctx'> /* Probe for the CPUID instruction */</div><div class='del'>-bool have_cpuid_p(void)</div><div class='add'>+bool cpuid_feature(void)</div><div class='ctx'> {</div><div class='ctx'> 	return flag_is_changeable_p(X86_EFLAGS_ID);</div><div class='ctx'> }</div><div class='hunk'>@@ -562,9 +563,9 @@ __noendbr u64 ibt_save(bool disable)</div><div class='ctx'> 	u64 msr = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_IBT)) {</div><div class='del'>-		rdmsrl(MSR_IA32_S_CET, msr);</div><div class='add'>+		rdmsrq(MSR_IA32_S_CET, msr);</div><div class='ctx'> 		if (disable)</div><div class='del'>-			wrmsrl(MSR_IA32_S_CET, msr &amp; ~CET_ENDBR_EN);</div><div class='add'>+			wrmsrq(MSR_IA32_S_CET, msr &amp; ~CET_ENDBR_EN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return msr;</div><div class='hunk'>@@ -575,10 +576,10 @@ __noendbr void ibt_restore(u64 save)</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_IBT)) {</div><div class='del'>-		rdmsrl(MSR_IA32_S_CET, msr);</div><div class='add'>+		rdmsrq(MSR_IA32_S_CET, msr);</div><div class='ctx'> 		msr &amp;= ~CET_ENDBR_EN;</div><div class='ctx'> 		msr |= (save &amp; CET_ENDBR_EN);</div><div class='del'>-		wrmsrl(MSR_IA32_S_CET, msr);</div><div class='add'>+		wrmsrq(MSR_IA32_S_CET, msr);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -602,15 +603,15 @@ static __always_inline void setup_cet(struct cpuinfo_x86 *c)</div><div class='ctx'> 		set_cpu_cap(c, X86_FEATURE_USER_SHSTK);</div><div class='ctx'> </div><div class='ctx'> 	if (kernel_ibt)</div><div class='del'>-		wrmsrl(MSR_IA32_S_CET, CET_ENDBR_EN);</div><div class='add'>+		wrmsrq(MSR_IA32_S_CET, CET_ENDBR_EN);</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl(MSR_IA32_S_CET, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_S_CET, 0);</div><div class='ctx'> </div><div class='ctx'> 	cr4_set_bits(X86_CR4_CET);</div><div class='ctx'> </div><div class='ctx'> 	if (kernel_ibt &amp;&amp; ibt_selftest()) {</div><div class='ctx'> 		pr_err("IBT selftest: Failed!\n");</div><div class='del'>-		wrmsrl(MSR_IA32_S_CET, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_S_CET, 0);</div><div class='ctx'> 		setup_clear_cpu_cap(X86_FEATURE_IBT);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -621,8 +622,8 @@ __noendbr void cet_disable(void)</div><div class='ctx'> 	      cpu_feature_enabled(X86_FEATURE_SHSTK)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_S_CET, 0);</div><div class='del'>-	wrmsrl(MSR_IA32_U_CET, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_S_CET, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_U_CET, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -751,9 +752,9 @@ void __init switch_gdt_and_percpu_base(int cpu)</div><div class='ctx'> 	 * No need to load %gs. It is already correct.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Writing %gs on 64bit would zero GSBASE which would make any per</div><div class='del'>-	 * CPU operation up to the point of the wrmsrl() fault.</div><div class='add'>+	 * CPU operation up to the point of the wrmsrq() fault.</div><div class='ctx'> 	 *</div><div class='del'>-	 * Set GSBASE to the new offset. Until the wrmsrl() happens the</div><div class='add'>+	 * Set GSBASE to the new offset. Until the wrmsrq() happens the</div><div class='ctx'> 	 * early mapping is still valid. That means the GSBASE update will</div><div class='ctx'> 	 * lose any prior per CPU data which was not copied over in</div><div class='ctx'> 	 * setup_per_cpu_areas().</div><div class='hunk'>@@ -761,7 +762,7 @@ void __init switch_gdt_and_percpu_base(int cpu)</div><div class='ctx'> 	 * This works even with stackprotector enabled because the</div><div class='ctx'> 	 * per CPU stack canary is 0 in both per CPU areas.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(MSR_GS_BASE, cpu_kernelmode_gs_base(cpu));</div><div class='add'>+	wrmsrq(MSR_GS_BASE, cpu_kernelmode_gs_base(cpu));</div><div class='ctx'> #else</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * %fs is already set to __KERNEL_PERCPU, but after switching GDT</div><div class='hunk'>@@ -1005,17 +1006,18 @@ void get_cpu_cap(struct cpuinfo_x86 *c)</div><div class='ctx'> 		c-&gt;x86_capability[CPUID_D_1_EAX] = eax;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* AMD-defined flags: level 0x80000001 */</div><div class='add'>+	/*</div><div class='add'>+	 * Check if extended CPUID leaves are implemented: Max extended</div><div class='add'>+	 * CPUID leaf must be in the 0x80000001-0x8000ffff range.</div><div class='add'>+	 */</div><div class='ctx'> 	eax = cpuid_eax(0x80000000);</div><div class='del'>-	c-&gt;extended_cpuid_level = eax;</div><div class='add'>+	c-&gt;extended_cpuid_level = ((eax &amp; 0xffff0000) == 0x80000000) ? eax : 0;</div><div class='ctx'> </div><div class='del'>-	if ((eax &amp; 0xffff0000) == 0x80000000) {</div><div class='del'>-		if (eax &gt;= 0x80000001) {</div><div class='del'>-			cpuid(0x80000001, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+	if (c-&gt;extended_cpuid_level &gt;= 0x80000001) {</div><div class='add'>+		cpuid(0x80000001, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='ctx'> </div><div class='del'>-			c-&gt;x86_capability[CPUID_8000_0001_ECX] = ecx;</div><div class='del'>-			c-&gt;x86_capability[CPUID_8000_0001_EDX] = edx;</div><div class='del'>-		}</div><div class='add'>+		c-&gt;x86_capability[CPUID_8000_0001_ECX] = ecx;</div><div class='add'>+		c-&gt;x86_capability[CPUID_8000_0001_EDX] = edx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;extended_cpuid_level &gt;= 0x80000007) {</div><div class='hunk'>@@ -1227,6 +1229,10 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {</div><div class='ctx'> #define GDS		BIT(6)</div><div class='ctx'> /* CPU is affected by Register File Data Sampling */</div><div class='ctx'> #define RFDS		BIT(7)</div><div class='add'>+/* CPU is affected by Indirect Target Selection */</div><div class='add'>+#define ITS		BIT(8)</div><div class='add'>+/* CPU is affected by Indirect Target Selection, but guest-host isolation is not affected */</div><div class='add'>+#define ITS_NATIVE_ONLY	BIT(9)</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_IVYBRIDGE,	     X86_STEP_MAX,	SRBDS),</div><div class='hunk'>@@ -1238,22 +1244,25 @@ static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_BROADWELL_G,	     X86_STEP_MAX,	SRBDS),</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_BROADWELL_X,	     X86_STEP_MAX,	MMIO),</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_BROADWELL,	     X86_STEP_MAX,	SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X,		      0x5,	MMIO | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_SKYLAKE_X,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | ITS),</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_SKYLAKE_L,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | SRBDS),</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_SKYLAKE,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | SRBDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_KABYLAKE,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L,		      0xb,	MMIO | RETBLEED | GDS | SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_KABYLAKE_L,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | SRBDS | ITS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_KABYLAKE,		      0xc,	MMIO | RETBLEED | GDS | SRBDS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_KABYLAKE,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | SRBDS | ITS),</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_CANNONLAKE_L,	     X86_STEP_MAX,	RETBLEED),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_ICELAKE_L,	     X86_STEP_MAX,	MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_ICELAKE_D,	     X86_STEP_MAX,	MMIO | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_ICELAKE_X,	     X86_STEP_MAX,	MMIO | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_COMETLAKE,	     X86_STEP_MAX,	MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L,		      0x0,	MMIO | RETBLEED),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L,	     X86_STEP_MAX,	MMIO | MMIO_SBDS | RETBLEED | GDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_TIGERLAKE_L,	     X86_STEP_MAX,	GDS),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_TIGERLAKE,	     X86_STEP_MAX,	GDS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_ICELAKE_L,	     X86_STEP_MAX,	MMIO | MMIO_SBDS | RETBLEED | GDS | ITS | ITS_NATIVE_ONLY),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_ICELAKE_D,	     X86_STEP_MAX,	MMIO | GDS | ITS | ITS_NATIVE_ONLY),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_ICELAKE_X,	     X86_STEP_MAX,	MMIO | GDS | ITS | ITS_NATIVE_ONLY),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_COMETLAKE,	     X86_STEP_MAX,	MMIO | MMIO_SBDS | RETBLEED | GDS | ITS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L,		      0x0,	MMIO | RETBLEED | ITS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_COMETLAKE_L,	     X86_STEP_MAX,	MMIO | MMIO_SBDS | RETBLEED | GDS | ITS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_TIGERLAKE_L,	     X86_STEP_MAX,	GDS | ITS | ITS_NATIVE_ONLY),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_TIGERLAKE,	     X86_STEP_MAX,	GDS | ITS | ITS_NATIVE_ONLY),</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_LAKEFIELD,	     X86_STEP_MAX,	MMIO | MMIO_SBDS | RETBLEED),</div><div class='del'>-	VULNBL_INTEL_STEPS(INTEL_ROCKETLAKE,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS),</div><div class='add'>+	VULNBL_INTEL_STEPS(INTEL_ROCKETLAKE,	     X86_STEP_MAX,	MMIO | RETBLEED | GDS | ITS | ITS_NATIVE_ONLY),</div><div class='ctx'> 	VULNBL_INTEL_TYPE(INTEL_ALDERLAKE,		     ATOM,	RFDS),</div><div class='ctx'> 	VULNBL_INTEL_STEPS(INTEL_ALDERLAKE_L,	     X86_STEP_MAX,	RFDS),</div><div class='ctx'> 	VULNBL_INTEL_TYPE(INTEL_RAPTORLAKE,		     ATOM,	RFDS),</div><div class='hunk'>@@ -1288,7 +1297,7 @@ u64 x86_read_arch_cap_msr(void)</div><div class='ctx'> 	u64 x86_arch_cap_msr = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))</div><div class='del'>-		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, x86_arch_cap_msr);</div><div class='add'>+		rdmsrq(MSR_IA32_ARCH_CAPABILITIES, x86_arch_cap_msr);</div><div class='ctx'> </div><div class='ctx'> 	return x86_arch_cap_msr;</div><div class='ctx'> }</div><div class='hunk'>@@ -1318,10 +1327,78 @@ static bool __init vulnerable_to_rfds(u64 x86_arch_cap_msr)</div><div class='ctx'> 	return cpu_matches(cpu_vuln_blacklist, RFDS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool __init vulnerable_to_its(u64 x86_arch_cap_msr)</div><div class='add'>+{</div><div class='add'>+	/* The "immunity" bit trumps everything else: */</div><div class='add'>+	if (x86_arch_cap_msr &amp; ARCH_CAP_ITS_NO)</div><div class='add'>+		return false;</div><div class='add'>+	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* None of the affected CPUs have BHI_CTRL */</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_BHI_CTRL))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If a VMM did not expose ITS_NO, assume that a guest could</div><div class='add'>+	 * be running on a vulnerable hardware or may migrate to such</div><div class='add'>+	 * hardware.</div><div class='add'>+	 */</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (cpu_matches(cpu_vuln_blacklist, ITS))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct x86_cpu_id cpu_latest_microcode[] = {</div><div class='add'>+#include "microcode/intel-ucode-defs.h"</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool __init cpu_has_old_microcode(void)</div><div class='add'>+{</div><div class='add'>+	const struct x86_cpu_id *m = x86_match_cpu(cpu_latest_microcode);</div><div class='add'>+</div><div class='add'>+	/* Give unknown CPUs a pass: */</div><div class='add'>+	if (!m) {</div><div class='add'>+		/* Intel CPUs should be in the list. Warn if not: */</div><div class='add'>+		if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)</div><div class='add'>+			pr_info("x86/CPU: Model not found in latest microcode list\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hosts usually lie to guests with a super high microcode</div><div class='add'>+	 * version. Just ignore what hosts tell guests:</div><div class='add'>+	 */</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Consider all debug microcode to be old: */</div><div class='add'>+	if (boot_cpu_data.microcode &amp; BIT(31))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* Give new microcode a pass: */</div><div class='add'>+	if (boot_cpu_data.microcode &gt;= m-&gt;driver_data)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Uh oh, too old: */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	u64 x86_arch_cap_msr = x86_read_arch_cap_msr();</div><div class='ctx'> </div><div class='add'>+	if (cpu_has_old_microcode()) {</div><div class='add'>+		pr_warn("x86/CPU: Running old microcode\n");</div><div class='add'>+		setup_force_cpu_bug(X86_BUG_OLD_MICROCODE);</div><div class='add'>+		add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Set ITLB_MULTIHIT bug if cpu is not in the whitelist and not mitigated */</div><div class='ctx'> 	if (!cpu_matches(cpu_vuln_whitelist, NO_ITLB_MULTIHIT) &amp;&amp;</div><div class='ctx'> 	    !(x86_arch_cap_msr &amp; ARCH_CAP_PSCHANGE_MC_NO))</div><div class='hunk'>@@ -1402,15 +1479,10 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 * Affected CPU list is generally enough to enumerate the vulnerability,</div><div class='ctx'> 	 * but for virtualization case check for ARCH_CAP MSR bits also, VMM may</div><div class='ctx'> 	 * not want the guest to enumerate the bug.</div><div class='del'>-	 *</div><div class='del'>-	 * Set X86_BUG_MMIO_UNKNOWN for CPUs that are neither in the blacklist,</div><div class='del'>-	 * nor in the whitelist and also don't enumerate MSR ARCH_CAP MMIO bits.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!arch_cap_mmio_immune(x86_arch_cap_msr)) {</div><div class='ctx'> 		if (cpu_matches(cpu_vuln_blacklist, MMIO))</div><div class='ctx'> 			setup_force_cpu_bug(X86_BUG_MMIO_STALE_DATA);</div><div class='del'>-		else if (!cpu_matches(cpu_vuln_whitelist, NO_MMIO))</div><div class='del'>-			setup_force_cpu_bug(X86_BUG_MMIO_UNKNOWN);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_has(c, X86_FEATURE_BTC_NO)) {</div><div class='hunk'>@@ -1439,9 +1511,12 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (vulnerable_to_rfds(x86_arch_cap_msr))</div><div class='ctx'> 		setup_force_cpu_bug(X86_BUG_RFDS);</div><div class='ctx'> </div><div class='del'>-	/* When virtualized, eIBRS could be hidden, assume vulnerable */</div><div class='del'>-	if (!(x86_arch_cap_msr &amp; ARCH_CAP_BHI_NO) &amp;&amp;</div><div class='del'>-	    !cpu_matches(cpu_vuln_whitelist, NO_BHI) &amp;&amp;</div><div class='add'>+	/*</div><div class='add'>+	 * Intel parts with eIBRS are vulnerable to BHI attacks. Parts with</div><div class='add'>+	 * BHI_NO still need to use the BHI mitigation to prevent Intra-mode</div><div class='add'>+	 * attacks.  When virtualized, eIBRS could be hidden, assume vulnerable.</div><div class='add'>+	 */</div><div class='add'>+	if (!cpu_matches(cpu_vuln_whitelist, NO_BHI) &amp;&amp;</div><div class='ctx'> 	    (boot_cpu_has(X86_FEATURE_IBRS_ENHANCED) ||</div><div class='ctx'> 	     boot_cpu_has(X86_FEATURE_HYPERVISOR)))</div><div class='ctx'> 		setup_force_cpu_bug(X86_BUG_BHI);</div><div class='hunk'>@@ -1449,6 +1524,12 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (cpu_has(c, X86_FEATURE_AMD_IBPB) &amp;&amp; !cpu_has(c, X86_FEATURE_AMD_IBPB_RET))</div><div class='ctx'> 		setup_force_cpu_bug(X86_BUG_IBPB_NO_RET);</div><div class='ctx'> </div><div class='add'>+	if (vulnerable_to_its(x86_arch_cap_msr)) {</div><div class='add'>+		setup_force_cpu_bug(X86_BUG_ITS);</div><div class='add'>+		if (cpu_matches(cpu_vuln_blacklist, ITS_NATIVE_ONLY))</div><div class='add'>+			setup_force_cpu_bug(X86_BUG_ITS_NATIVE_ONLY);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (cpu_matches(cpu_vuln_whitelist, NO_MELTDOWN))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1630,11 +1711,11 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)</div><div class='ctx'> 	memset(&amp;c-&gt;x86_capability, 0, sizeof(c-&gt;x86_capability));</div><div class='ctx'> 	c-&gt;extended_cpuid_level = 0;</div><div class='ctx'> </div><div class='del'>-	if (!have_cpuid_p())</div><div class='add'>+	if (!cpuid_feature())</div><div class='ctx'> 		identify_cpu_without_cpuid(c);</div><div class='ctx'> </div><div class='ctx'> 	/* cyrix could have cpuid enabled via c_identify()*/</div><div class='del'>-	if (have_cpuid_p()) {</div><div class='add'>+	if (cpuid_feature()) {</div><div class='ctx'> 		cpu_detect(c);</div><div class='ctx'> 		get_cpu_vendor(c);</div><div class='ctx'> 		intel_unlock_cpuid_leafs(c);</div><div class='hunk'>@@ -1749,11 +1830,11 @@ static bool detect_null_seg_behavior(void)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	unsigned long old_base, tmp;</div><div class='del'>-	rdmsrl(MSR_FS_BASE, old_base);</div><div class='del'>-	wrmsrl(MSR_FS_BASE, 1);</div><div class='add'>+	rdmsrq(MSR_FS_BASE, old_base);</div><div class='add'>+	wrmsrq(MSR_FS_BASE, 1);</div><div class='ctx'> 	loadsegment(fs, 0);</div><div class='del'>-	rdmsrl(MSR_FS_BASE, tmp);</div><div class='del'>-	wrmsrl(MSR_FS_BASE, old_base);</div><div class='add'>+	rdmsrq(MSR_FS_BASE, tmp);</div><div class='add'>+	wrmsrq(MSR_FS_BASE, old_base);</div><div class='ctx'> 	return tmp == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1794,11 +1875,11 @@ static void generic_identify(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	c-&gt;extended_cpuid_level = 0;</div><div class='ctx'> </div><div class='del'>-	if (!have_cpuid_p())</div><div class='add'>+	if (!cpuid_feature())</div><div class='ctx'> 		identify_cpu_without_cpuid(c);</div><div class='ctx'> </div><div class='ctx'> 	/* cyrix could have cpuid enabled via c_identify()*/</div><div class='del'>-	if (!have_cpuid_p())</div><div class='add'>+	if (!cpuid_feature())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cpu_detect(c);</div><div class='hunk'>@@ -1982,9 +2063,9 @@ void enable_sep_cpu(void)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	tss-&gt;x86_tss.ss1 = __KERNEL_CS;</div><div class='del'>-	wrmsr(MSR_IA32_SYSENTER_CS, tss-&gt;x86_tss.ss1, 0);</div><div class='del'>-	wrmsr(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1), 0);</div><div class='del'>-	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_SYSENTER_CS, tss-&gt;x86_tss.ss1);</div><div class='add'>+	wrmsrq(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1));</div><div class='add'>+	wrmsrq(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32);</div><div class='ctx'> </div><div class='ctx'> 	put_cpu();</div><div class='ctx'> }</div><div class='hunk'>@@ -2091,7 +2172,7 @@ DEFINE_PER_CPU_CACHE_HOT(unsigned long, cpu_current_top_of_stack) = TOP_OF_INIT_</div><div class='ctx'> DEFINE_PER_CPU_CACHE_HOT(u64, __x86_call_depth);</div><div class='ctx'> EXPORT_PER_CPU_SYMBOL(__x86_call_depth);</div><div class='ctx'> </div><div class='del'>-static void wrmsrl_cstar(unsigned long val)</div><div class='add'>+static void wrmsrq_cstar(unsigned long val)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Intel CPUs do not support 32-bit SYSCALL. Writing to MSR_CSTAR</div><div class='hunk'>@@ -2099,37 +2180,37 @@ static void wrmsrl_cstar(unsigned long val)</div><div class='ctx'> 	 * guest. Avoid the pointless write on all Intel CPUs.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)</div><div class='del'>-		wrmsrl(MSR_CSTAR, val);</div><div class='add'>+		wrmsrq(MSR_CSTAR, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void idt_syscall_init(void)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64);</div><div class='add'>+	wrmsrq(MSR_LSTAR, (unsigned long)entry_SYSCALL_64);</div><div class='ctx'> </div><div class='ctx'> 	if (ia32_enabled()) {</div><div class='del'>-		wrmsrl_cstar((unsigned long)entry_SYSCALL_compat);</div><div class='add'>+		wrmsrq_cstar((unsigned long)entry_SYSCALL_compat);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * This only works on Intel CPUs.</div><div class='ctx'> 		 * On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP.</div><div class='ctx'> 		 * This does not cause SYSENTER to jump to the wrong location, because</div><div class='ctx'> 		 * AMD doesn't allow SYSENTER in long mode (either 32- or 64-bit).</div><div class='ctx'> 		 */</div><div class='del'>-		wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);</div><div class='del'>-		wrmsrl_safe(MSR_IA32_SYSENTER_ESP,</div><div class='add'>+		wrmsrq_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);</div><div class='add'>+		wrmsrq_safe(MSR_IA32_SYSENTER_ESP,</div><div class='ctx'> 			    (unsigned long)(cpu_entry_stack(smp_processor_id()) + 1));</div><div class='del'>-		wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);</div><div class='add'>+		wrmsrq_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);</div><div class='ctx'> 	} else {</div><div class='del'>-		wrmsrl_cstar((unsigned long)entry_SYSCALL32_ignore);</div><div class='del'>-		wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);</div><div class='del'>-		wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);</div><div class='del'>-		wrmsrl_safe(MSR_IA32_SYSENTER_EIP, 0ULL);</div><div class='add'>+		wrmsrq_cstar((unsigned long)entry_SYSCALL32_ignore);</div><div class='add'>+		wrmsrq_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);</div><div class='add'>+		wrmsrq_safe(MSR_IA32_SYSENTER_ESP, 0ULL);</div><div class='add'>+		wrmsrq_safe(MSR_IA32_SYSENTER_EIP, 0ULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Flags to clear on syscall; clear as much as possible</div><div class='ctx'> 	 * to minimize user space-kernel interference.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(MSR_SYSCALL_MASK,</div><div class='add'>+	wrmsrq(MSR_SYSCALL_MASK,</div><div class='ctx'> 	       X86_EFLAGS_CF|X86_EFLAGS_PF|X86_EFLAGS_AF|</div><div class='ctx'> 	       X86_EFLAGS_ZF|X86_EFLAGS_SF|X86_EFLAGS_TF|</div><div class='ctx'> 	       X86_EFLAGS_IF|X86_EFLAGS_DF|X86_EFLAGS_OF|</div><div class='hunk'>@@ -2198,7 +2279,7 @@ static inline void setup_getcpu(int cpu)</div><div class='ctx'> 	struct desc_struct d = { };</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_RDTSCP) || boot_cpu_has(X86_FEATURE_RDPID))</div><div class='del'>-		wrmsr(MSR_TSC_AUX, cpudata, 0);</div><div class='add'>+		wrmsrq(MSR_TSC_AUX, cpudata);</div><div class='ctx'> </div><div class='ctx'> 	/* Store CPU and node number in limit. */</div><div class='ctx'> 	d.limit0 = cpudata;</div><div class='hunk'>@@ -2313,8 +2394,8 @@ void cpu_init(void)</div><div class='ctx'> 		memset(cur-&gt;thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);</div><div class='ctx'> 		syscall_init();</div><div class='ctx'> </div><div class='del'>-		wrmsrl(MSR_FS_BASE, 0);</div><div class='del'>-		wrmsrl(MSR_KERNEL_GS_BASE, 0);</div><div class='add'>+		wrmsrq(MSR_FS_BASE, 0);</div><div class='add'>+		wrmsrq(MSR_KERNEL_GS_BASE, 0);</div><div class='ctx'> 		barrier();</div><div class='ctx'> </div><div class='ctx'> 		x2apic_setup();</div><div class='head'>diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h<br/>index 51deb60a9d26..bc38b2d56f26 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cpu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/cpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/cpu.h</a></div><div class='hunk'>@@ -75,6 +75,15 @@ extern void check_null_seg_clears_base(struct cpuinfo_x86 *c);</div><div class='ctx'> void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, u16 die_id);</div><div class='ctx'> void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c);</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_AMD_NB) &amp;&amp; defined(CONFIG_SYSFS)</div><div class='add'>+struct amd_northbridge *amd_init_l3_cache(int index);</div><div class='add'>+#else</div><div class='add'>+static inline struct amd_northbridge *amd_init_l3_cache(int index)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> unsigned int aperfmperf_get_khz(int cpu);</div><div class='ctx'> void cpu_select_mitigations(void);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c<br/>index a2fbea0be535..46efcbd6afa4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cpuid-deps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/cpuid-deps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cpuid-deps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/cpuid-deps.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@ static const struct cpuid_dep cpuid_deps[] = {</div><div class='ctx'> 	{ X86_FEATURE_PKU,			X86_FEATURE_XSAVE     },</div><div class='ctx'> 	{ X86_FEATURE_MPX,			X86_FEATURE_XSAVE     },</div><div class='ctx'> 	{ X86_FEATURE_XGETBV1,			X86_FEATURE_XSAVE     },</div><div class='add'>+	{ X86_FEATURE_APX,			X86_FEATURE_XSAVE     },</div><div class='ctx'> 	{ X86_FEATURE_CMOV,			X86_FEATURE_FXSR      },</div><div class='ctx'> 	{ X86_FEATURE_MMX,			X86_FEATURE_FXSR      },</div><div class='ctx'> 	{ X86_FEATURE_MMXEXT,			X86_FEATURE_MMX       },</div><div class='hunk'>@@ -82,8 +83,12 @@ static const struct cpuid_dep cpuid_deps[] = {</div><div class='ctx'> 	{ X86_FEATURE_XFD,			X86_FEATURE_XSAVES    },</div><div class='ctx'> 	{ X86_FEATURE_XFD,			X86_FEATURE_XGETBV1   },</div><div class='ctx'> 	{ X86_FEATURE_AMX_TILE,			X86_FEATURE_XFD       },</div><div class='add'>+	{ X86_FEATURE_AMX_FP16,			X86_FEATURE_AMX_TILE  },</div><div class='add'>+	{ X86_FEATURE_AMX_BF16,			X86_FEATURE_AMX_TILE  },</div><div class='add'>+	{ X86_FEATURE_AMX_INT8,			X86_FEATURE_AMX_TILE  },</div><div class='ctx'> 	{ X86_FEATURE_SHSTK,			X86_FEATURE_XSAVES    },</div><div class='ctx'> 	{ X86_FEATURE_FRED,			X86_FEATURE_LKGS      },</div><div class='add'>+	{ X86_FEATURE_SPEC_CTRL_SSBD,		X86_FEATURE_SPEC_CTRL },</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/cpuid_0x2_table.c b/arch/x86/kernel/cpu/cpuid_0x2_table.c<br/>new file mode 100644<br/>index 000000000000..89bc8db5e9c6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/cpuid_0x2_table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/cpuid_0x2_table.c</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cpuid/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "cpu.h"</div><div class='add'>+</div><div class='add'>+#define CACHE_ENTRY(_desc, _type, _size)	\</div><div class='add'>+	[_desc] = {				\</div><div class='add'>+		.c_type = (_type),		\</div><div class='add'>+		.c_size = (_size) / SZ_1K,	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define TLB_ENTRY(_desc, _type, _entries)	\</div><div class='add'>+	[_desc] = {				\</div><div class='add'>+		.t_type = (_type),		\</div><div class='add'>+		.entries = (_entries),		\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+const struct leaf_0x2_table cpuid_0x2_table[256] = {</div><div class='add'>+	CACHE_ENTRY(0x06, CACHE_L1_INST,	SZ_8K	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x08, CACHE_L1_INST,	SZ_16K	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x09, CACHE_L1_INST,	SZ_32K	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x0a, CACHE_L1_DATA,	SZ_8K	),	/* 2 way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x0c, CACHE_L1_DATA,	SZ_16K	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x0d, CACHE_L1_DATA,	SZ_16K	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x0e, CACHE_L1_DATA,	SZ_24K	),	/* 6-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x21, CACHE_L2,		SZ_256K	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x22, CACHE_L3,		SZ_512K	),	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x23, CACHE_L3,		SZ_1M	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x25, CACHE_L3,		SZ_2M	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x29, CACHE_L3,		SZ_4M	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x2c, CACHE_L1_DATA,	SZ_32K	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x30, CACHE_L1_INST,	SZ_32K	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x39, CACHE_L2,		SZ_128K	),	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x3a, CACHE_L2,		SZ_192K	),	/* 6-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x3b, CACHE_L2,		SZ_128K	),	/* 2-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x3c, CACHE_L2,		SZ_256K	),	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x3d, CACHE_L2,		SZ_384K	),	/* 6-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x3e, CACHE_L2,		SZ_512K	),	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x3f, CACHE_L2,		SZ_256K	),	/* 2-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x41, CACHE_L2,		SZ_128K	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x42, CACHE_L2,		SZ_256K	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x43, CACHE_L2,		SZ_512K	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x44, CACHE_L2,		SZ_1M	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x45, CACHE_L2,		SZ_2M	),	/* 4-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x46, CACHE_L3,		SZ_4M	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x47, CACHE_L3,		SZ_8M	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x48, CACHE_L2,		SZ_3M	),	/* 12-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x49, CACHE_L3,		SZ_4M	),	/* 16-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x4a, CACHE_L3,		SZ_6M	),	/* 12-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x4b, CACHE_L3,		SZ_8M	),	/* 16-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x4c, CACHE_L3,		SZ_12M	),	/* 12-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x4d, CACHE_L3,		SZ_16M	),	/* 16-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x4e, CACHE_L2,		SZ_6M	),	/* 24-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x60, CACHE_L1_DATA,	SZ_16K	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x66, CACHE_L1_DATA,	SZ_8K	),	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x67, CACHE_L1_DATA,	SZ_16K	),	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x68, CACHE_L1_DATA,	SZ_32K	),	/* 4-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x78, CACHE_L2,		SZ_1M	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x79, CACHE_L2,		SZ_128K	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x7a, CACHE_L2,		SZ_256K	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x7b, CACHE_L2,		SZ_512K	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x7c, CACHE_L2,		SZ_1M	),	/* 8-way set assoc, sectored cache, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x7d, CACHE_L2,		SZ_2M	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x7f, CACHE_L2,		SZ_512K	),	/* 2-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x80, CACHE_L2,		SZ_512K	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x82, CACHE_L2,		SZ_256K	),	/* 8-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x83, CACHE_L2,		SZ_512K	),	/* 8-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x84, CACHE_L2,		SZ_1M	),	/* 8-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x85, CACHE_L2,		SZ_2M	),	/* 8-way set assoc, 32 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x86, CACHE_L2,		SZ_512K	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0x87, CACHE_L2,		SZ_1M	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xd0, CACHE_L3,		SZ_512K	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xd1, CACHE_L3,		SZ_1M	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xd2, CACHE_L3,		SZ_2M	),	/* 4-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xd6, CACHE_L3,		SZ_1M	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xd7, CACHE_L3,		SZ_2M	),	/* 8-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xd8, CACHE_L3,		SZ_4M	),	/* 12-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xdc, CACHE_L3,		SZ_2M	),	/* 12-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xdd, CACHE_L3,		SZ_4M	),	/* 12-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xde, CACHE_L3,		SZ_8M	),	/* 12-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xe2, CACHE_L3,		SZ_2M	),	/* 16-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xe3, CACHE_L3,		SZ_4M	),	/* 16-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xe4, CACHE_L3,		SZ_8M	),	/* 16-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xea, CACHE_L3,		SZ_12M	),	/* 24-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xeb, CACHE_L3,		SZ_18M	),	/* 24-way set assoc, 64 byte line size */</div><div class='add'>+	CACHE_ENTRY(0xec, CACHE_L3,		SZ_24M	),	/* 24-way set assoc, 64 byte line size */</div><div class='add'>+</div><div class='add'>+	TLB_ENTRY(  0x01, TLB_INST_4K,		32	),	/* TLB_INST 4 KByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0x02, TLB_INST_4M,		2	),	/* TLB_INST 4 MByte pages, full associative */</div><div class='add'>+	TLB_ENTRY(  0x03, TLB_DATA_4K,		64	),	/* TLB_DATA 4 KByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0x04, TLB_DATA_4M,		8	),	/* TLB_DATA 4 MByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0x05, TLB_DATA_4M,		32	),	/* TLB_DATA 4 MByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0x0b, TLB_INST_4M,		4	),	/* TLB_INST 4 MByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0x4f, TLB_INST_4K,		32	),	/* TLB_INST 4 KByte pages */</div><div class='add'>+	TLB_ENTRY(  0x50, TLB_INST_ALL,		64	),	/* TLB_INST 4 KByte and 2-MByte or 4-MByte pages */</div><div class='add'>+	TLB_ENTRY(  0x51, TLB_INST_ALL,		128	),	/* TLB_INST 4 KByte and 2-MByte or 4-MByte pages */</div><div class='add'>+	TLB_ENTRY(  0x52, TLB_INST_ALL,		256	),	/* TLB_INST 4 KByte and 2-MByte or 4-MByte pages */</div><div class='add'>+	TLB_ENTRY(  0x55, TLB_INST_2M_4M,	7	),	/* TLB_INST 2-MByte or 4-MByte pages, fully associative */</div><div class='add'>+	TLB_ENTRY(  0x56, TLB_DATA0_4M,		16	),	/* TLB_DATA0 4 MByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0x57, TLB_DATA0_4K,		16	),	/* TLB_DATA0 4 KByte pages, 4-way associative */</div><div class='add'>+	TLB_ENTRY(  0x59, TLB_DATA0_4K,		16	),	/* TLB_DATA0 4 KByte pages, fully associative */</div><div class='add'>+	TLB_ENTRY(  0x5a, TLB_DATA0_2M_4M,	32	),	/* TLB_DATA0 2-MByte or 4 MByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0x5b, TLB_DATA_4K_4M,	64	),	/* TLB_DATA 4 KByte and 4 MByte pages */</div><div class='add'>+	TLB_ENTRY(  0x5c, TLB_DATA_4K_4M,	128	),	/* TLB_DATA 4 KByte and 4 MByte pages */</div><div class='add'>+	TLB_ENTRY(  0x5d, TLB_DATA_4K_4M,	256	),	/* TLB_DATA 4 KByte and 4 MByte pages */</div><div class='add'>+	TLB_ENTRY(  0x61, TLB_INST_4K,		48	),	/* TLB_INST 4 KByte pages, full associative */</div><div class='add'>+	TLB_ENTRY(  0x63, TLB_DATA_1G_2M_4M,	4	),	/* TLB_DATA 1 GByte pages, 4-way set associative</div><div class='add'>+								 * (plus 32 entries TLB_DATA 2 MByte or 4 MByte pages, not encoded here) */</div><div class='add'>+	TLB_ENTRY(  0x6b, TLB_DATA_4K,		256	),	/* TLB_DATA 4 KByte pages, 8-way associative */</div><div class='add'>+	TLB_ENTRY(  0x6c, TLB_DATA_2M_4M,	128	),	/* TLB_DATA 2 MByte or 4 MByte pages, 8-way associative */</div><div class='add'>+	TLB_ENTRY(  0x6d, TLB_DATA_1G,		16	),	/* TLB_DATA 1 GByte pages, fully associative */</div><div class='add'>+	TLB_ENTRY(  0x76, TLB_INST_2M_4M,	8	),	/* TLB_INST 2-MByte or 4-MByte pages, fully associative */</div><div class='add'>+	TLB_ENTRY(  0xb0, TLB_INST_4K,		128	),	/* TLB_INST 4 KByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0xb1, TLB_INST_2M_4M,	4	),	/* TLB_INST 2M pages, 4-way, 8 entries or 4M pages, 4-way entries */</div><div class='add'>+	TLB_ENTRY(  0xb2, TLB_INST_4K,		64	),	/* TLB_INST 4KByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0xb3, TLB_DATA_4K,		128	),	/* TLB_DATA 4 KByte pages, 4-way set associative */</div><div class='add'>+	TLB_ENTRY(  0xb4, TLB_DATA_4K,		256	),	/* TLB_DATA 4 KByte pages, 4-way associative */</div><div class='add'>+	TLB_ENTRY(  0xb5, TLB_INST_4K,		64	),	/* TLB_INST 4 KByte pages, 8-way set associative */</div><div class='add'>+	TLB_ENTRY(  0xb6, TLB_INST_4K,		128	),	/* TLB_INST 4 KByte pages, 8-way set associative */</div><div class='add'>+	TLB_ENTRY(  0xba, TLB_DATA_4K,		64	),	/* TLB_DATA 4 KByte pages, 4-way associative */</div><div class='add'>+	TLB_ENTRY(  0xc0, TLB_DATA_4K_4M,	8	),	/* TLB_DATA 4 KByte and 4 MByte pages, 4-way associative */</div><div class='add'>+	TLB_ENTRY(  0xc1, STLB_4K_2M,		1024	),	/* STLB 4 KByte and 2 MByte pages, 8-way associative */</div><div class='add'>+	TLB_ENTRY(  0xc2, TLB_DATA_2M_4M,	16	),	/* TLB_DATA 2 MByte/4MByte pages, 4-way associative */</div><div class='add'>+	TLB_ENTRY(  0xca, STLB_4K,		512	),	/* STLB 4 KByte pages, 4-way associative */</div><div class='add'>+};</div><div class='head'>diff --git a/arch/x86/kernel/cpu/feat_ctl.c b/arch/x86/kernel/cpu/feat_ctl.c<br/>index 4a4118784c13..d69757246bde 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/feat_ctl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/feat_ctl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/feat_ctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/feat_ctl.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/vmx.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -118,7 +119,7 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)</div><div class='ctx'> 	bool enable_vmx;</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_IA32_FEAT_CTL, &amp;msr)) {</div><div class='add'>+	if (rdmsrq_safe(MSR_IA32_FEAT_CTL, &amp;msr)) {</div><div class='ctx'> 		clear_cpu_cap(c, X86_FEATURE_VMX);</div><div class='ctx'> 		clear_cpu_cap(c, X86_FEATURE_SGX);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -165,7 +166,7 @@ void init_ia32_feat_ctl(struct cpuinfo_x86 *c)</div><div class='ctx'> 			msr |= FEAT_CTL_SGX_LC_ENABLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_FEAT_CTL, msr);</div><div class='add'>+	wrmsrq(MSR_IA32_FEAT_CTL, msr);</div><div class='ctx'> </div><div class='ctx'> update_caps:</div><div class='ctx'> 	set_cpu_cap(c, X86_FEATURE_MSR_IA32_FEAT_CTL);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c<br/>index 6af4a4a90a52..2154f12766fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/hygon.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/hygon.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/hygon.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/hygon.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;asm/cacheinfo.h&gt;</div><div class='ctx'> #include &lt;asm/spec-ctrl.h&gt;</div><div class='ctx'> #include &lt;asm/delay.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +97,7 @@ static void bsp_init_hygon(struct cpuinfo_x86 *c)</div><div class='ctx'> 	if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) {</div><div class='ctx'> 		u64 val;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(MSR_K7_HWCR, val);</div><div class='add'>+		rdmsrq(MSR_K7_HWCR, val);</div><div class='ctx'> 		if (!(val &amp; BIT(24)))</div><div class='ctx'> 			pr_warn(FW_BUG "TSC doesn't count with P0 frequency!\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -110,7 +111,7 @@ static void bsp_init_hygon(struct cpuinfo_x86 *c)</div><div class='ctx'> 		 * Try to cache the base value so further operations can</div><div class='ctx'> 		 * avoid RMW. If that faults, do not enable SSBD.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!rdmsrl_safe(MSR_AMD64_LS_CFG, &amp;x86_amd_ls_cfg_base)) {</div><div class='add'>+		if (!rdmsrq_safe(MSR_AMD64_LS_CFG, &amp;x86_amd_ls_cfg_base)) {</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_LS_CFG_SSBD);</div><div class='ctx'> 			setup_force_cpu_cap(X86_FEATURE_SSBD);</div><div class='ctx'> 			x86_amd_ls_cfg_ssbd_mask = 1ULL &lt;&lt; 10;</div><div class='hunk'>@@ -194,7 +195,7 @@ static void init_hygon(struct cpuinfo_x86 *c)</div><div class='ctx'> 	init_hygon_cacheinfo(c);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_has(c, X86_FEATURE_SVM)) {</div><div class='del'>-		rdmsrl(MSR_VM_CR, vm_cr);</div><div class='add'>+		rdmsrq(MSR_VM_CR, vm_cr);</div><div class='ctx'> 		if (vm_cr &amp; SVM_VM_CR_SVM_DIS_MASK) {</div><div class='ctx'> 			pr_notice_once("SVM disabled (by BIOS) in MSR_VM_CR\n");</div><div class='ctx'> 			clear_cpu_cap(c, X86_FEATURE_SVM);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c<br/>index cdc9813871ef..076eaa41b8c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/intel.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/minmax.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> #include &lt;linux/topology.h&gt;</div><div class='hunk'>@@ -15,6 +16,7 @@</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/hwcap2.h&gt;</div><div class='ctx'> #include &lt;asm/intel-family.h&gt;</div><div class='ctx'> #include &lt;asm/microcode.h&gt;</div><div class='hunk'>@@ -157,7 +159,7 @@ static void detect_tme_early(struct cpuinfo_x86 *c)</div><div class='ctx'> 	u64 tme_activate;</div><div class='ctx'> 	int keyid_bits;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_TME_ACTIVATE, tme_activate);</div><div class='add'>+	rdmsrq(MSR_IA32_TME_ACTIVATE, tme_activate);</div><div class='ctx'> </div><div class='ctx'> 	if (!TME_ACTIVATE_LOCKED(tme_activate) || !TME_ACTIVATE_ENABLED(tme_activate)) {</div><div class='ctx'> 		pr_info_once("x86/tme: not enabled by BIOS\n");</div><div class='hunk'>@@ -299,7 +301,7 @@ static void early_init_intel(struct cpuinfo_x86 *c)</div><div class='ctx'> 	 * string flag and enhanced fast string capabilities accordingly.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (c-&gt;x86_vfm &gt;= INTEL_PENTIUM_M_DOTHAN) {</div><div class='del'>-		rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);</div><div class='add'>+		rdmsrq(MSR_IA32_MISC_ENABLE, misc_enable);</div><div class='ctx'> 		if (misc_enable &amp; MSR_IA32_MISC_ENABLE_FAST_STRING) {</div><div class='ctx'> 			/* X86_FEATURE_ERMS is set based on CPUID */</div><div class='ctx'> 			set_cpu_cap(c, X86_FEATURE_REP_GOOD);</div><div class='hunk'>@@ -488,7 +490,7 @@ static void init_cpuid_fault(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> </div><div class='del'>-	if (!rdmsrl_safe(MSR_PLATFORM_INFO, &amp;msr)) {</div><div class='add'>+	if (!rdmsrq_safe(MSR_PLATFORM_INFO, &amp;msr)) {</div><div class='ctx'> 		if (msr &amp; MSR_PLATFORM_INFO_CPUID_FAULT)</div><div class='ctx'> 			set_cpu_cap(c, X86_FEATURE_CPUID_FAULT);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -498,7 +500,7 @@ static void init_intel_misc_features(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='ctx'> 	u64 msr;</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_MISC_FEATURES_ENABLES, &amp;msr))</div><div class='add'>+	if (rdmsrq_safe(MSR_MISC_FEATURES_ENABLES, &amp;msr))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear all MISC features */</div><div class='hunk'>@@ -509,7 +511,7 @@ static void init_intel_misc_features(struct cpuinfo_x86 *c)</div><div class='ctx'> 	probe_xeon_phi_r3mwait(c);</div><div class='ctx'> </div><div class='ctx'> 	msr = this_cpu_read(msr_misc_features_shadow);</div><div class='del'>-	wrmsrl(MSR_MISC_FEATURES_ENABLES, msr);</div><div class='add'>+	wrmsrq(MSR_MISC_FEATURES_ENABLES, msr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -646,103 +648,11 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define TLB_INST_4K		0x01</div><div class='del'>-#define TLB_INST_4M		0x02</div><div class='del'>-#define TLB_INST_2M_4M		0x03</div><div class='del'>-</div><div class='del'>-#define TLB_INST_ALL		0x05</div><div class='del'>-#define TLB_INST_1G		0x06</div><div class='del'>-</div><div class='del'>-#define TLB_DATA_4K		0x11</div><div class='del'>-#define TLB_DATA_4M		0x12</div><div class='del'>-#define TLB_DATA_2M_4M		0x13</div><div class='del'>-#define TLB_DATA_4K_4M		0x14</div><div class='del'>-</div><div class='del'>-#define TLB_DATA_1G		0x16</div><div class='del'>-#define TLB_DATA_1G_2M_4M	0x17</div><div class='del'>-</div><div class='del'>-#define TLB_DATA0_4K		0x21</div><div class='del'>-#define TLB_DATA0_4M		0x22</div><div class='del'>-#define TLB_DATA0_2M_4M		0x23</div><div class='del'>-</div><div class='del'>-#define STLB_4K			0x41</div><div class='del'>-#define STLB_4K_2M		0x42</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * All of leaf 0x2's one-byte TLB descriptors implies the same number of</div><div class='del'>- * entries for their respective TLB types.  The 0x63 descriptor is an</div><div class='del'>- * exception: it implies 4 dTLB entries for 1GB pages 32 dTLB entries</div><div class='del'>- * for 2MB or 4MB pages.  Encode descriptor 0x63 dTLB entry count for</div><div class='del'>- * 2MB/4MB pages here, as its count for dTLB 1GB pages is already at the</div><div class='del'>- * intel_tlb_table[] mapping.</div><div class='del'>- */</div><div class='del'>-#define TLB_0x63_2M_4M_ENTRIES	32</div><div class='del'>-</div><div class='del'>-struct _tlb_table {</div><div class='del'>-	unsigned char descriptor;</div><div class='del'>-	char tlb_type;</div><div class='del'>-	unsigned int entries;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct _tlb_table intel_tlb_table[] = {</div><div class='del'>-	{ 0x01, TLB_INST_4K,		32},	/* TLB_INST 4 KByte pages, 4-way set associative */</div><div class='del'>-	{ 0x02, TLB_INST_4M,		2},	/* TLB_INST 4 MByte pages, full associative */</div><div class='del'>-	{ 0x03, TLB_DATA_4K,		64},	/* TLB_DATA 4 KByte pages, 4-way set associative */</div><div class='del'>-	{ 0x04, TLB_DATA_4M,		8},	/* TLB_DATA 4 MByte pages, 4-way set associative */</div><div class='del'>-	{ 0x05, TLB_DATA_4M,		32},	/* TLB_DATA 4 MByte pages, 4-way set associative */</div><div class='del'>-	{ 0x0b, TLB_INST_4M,		4},	/* TLB_INST 4 MByte pages, 4-way set associative */</div><div class='del'>-	{ 0x4f, TLB_INST_4K,		32},	/* TLB_INST 4 KByte pages */</div><div class='del'>-	{ 0x50, TLB_INST_ALL,		64},	/* TLB_INST 4 KByte and 2-MByte or 4-MByte pages */</div><div class='del'>-	{ 0x51, TLB_INST_ALL,		128},	/* TLB_INST 4 KByte and 2-MByte or 4-MByte pages */</div><div class='del'>-	{ 0x52, TLB_INST_ALL,		256},	/* TLB_INST 4 KByte and 2-MByte or 4-MByte pages */</div><div class='del'>-	{ 0x55, TLB_INST_2M_4M,		7},	/* TLB_INST 2-MByte or 4-MByte pages, fully associative */</div><div class='del'>-	{ 0x56, TLB_DATA0_4M,		16},	/* TLB_DATA0 4 MByte pages, 4-way set associative */</div><div class='del'>-	{ 0x57, TLB_DATA0_4K,		16},	/* TLB_DATA0 4 KByte pages, 4-way associative */</div><div class='del'>-	{ 0x59, TLB_DATA0_4K,		16},	/* TLB_DATA0 4 KByte pages, fully associative */</div><div class='del'>-	{ 0x5a, TLB_DATA0_2M_4M,	32},	/* TLB_DATA0 2-MByte or 4 MByte pages, 4-way set associative */</div><div class='del'>-	{ 0x5b, TLB_DATA_4K_4M,		64},	/* TLB_DATA 4 KByte and 4 MByte pages */</div><div class='del'>-	{ 0x5c, TLB_DATA_4K_4M,		128},	/* TLB_DATA 4 KByte and 4 MByte pages */</div><div class='del'>-	{ 0x5d, TLB_DATA_4K_4M,		256},	/* TLB_DATA 4 KByte and 4 MByte pages */</div><div class='del'>-	{ 0x61, TLB_INST_4K,		48},	/* TLB_INST 4 KByte pages, full associative */</div><div class='del'>-	{ 0x63, TLB_DATA_1G_2M_4M,	4},	/* TLB_DATA 1 GByte pages, 4-way set associative</div><div class='del'>-						 * (plus 32 entries TLB_DATA 2 MByte or 4 MByte pages, not encoded here) */</div><div class='del'>-	{ 0x6b, TLB_DATA_4K,		256},	/* TLB_DATA 4 KByte pages, 8-way associative */</div><div class='del'>-	{ 0x6c, TLB_DATA_2M_4M,		128},	/* TLB_DATA 2 MByte or 4 MByte pages, 8-way associative */</div><div class='del'>-	{ 0x6d, TLB_DATA_1G,		16},	/* TLB_DATA 1 GByte pages, fully associative */</div><div class='del'>-	{ 0x76, TLB_INST_2M_4M,		8},	/* TLB_INST 2-MByte or 4-MByte pages, fully associative */</div><div class='del'>-	{ 0xb0, TLB_INST_4K,		128},	/* TLB_INST 4 KByte pages, 4-way set associative */</div><div class='del'>-	{ 0xb1, TLB_INST_2M_4M,		4},	/* TLB_INST 2M pages, 4-way, 8 entries or 4M pages, 4-way entries */</div><div class='del'>-	{ 0xb2, TLB_INST_4K,		64},	/* TLB_INST 4KByte pages, 4-way set associative */</div><div class='del'>-	{ 0xb3, TLB_DATA_4K,		128},	/* TLB_DATA 4 KByte pages, 4-way set associative */</div><div class='del'>-	{ 0xb4, TLB_DATA_4K,		256},	/* TLB_DATA 4 KByte pages, 4-way associative */</div><div class='del'>-	{ 0xb5, TLB_INST_4K,		64},	/* TLB_INST 4 KByte pages, 8-way set associative */</div><div class='del'>-	{ 0xb6, TLB_INST_4K,		128},	/* TLB_INST 4 KByte pages, 8-way set associative */</div><div class='del'>-	{ 0xba, TLB_DATA_4K,		64},	/* TLB_DATA 4 KByte pages, 4-way associative */</div><div class='del'>-	{ 0xc0, TLB_DATA_4K_4M,		8},	/* TLB_DATA 4 KByte and 4 MByte pages, 4-way associative */</div><div class='del'>-	{ 0xc1, STLB_4K_2M,		1024},	/* STLB 4 KByte and 2 MByte pages, 8-way associative */</div><div class='del'>-	{ 0xc2, TLB_DATA_2M_4M,		16},	/* TLB_DATA 2 MByte/4MByte pages, 4-way associative */</div><div class='del'>-	{ 0xca, STLB_4K,		512},	/* STLB 4 KByte pages, 4-way associative */</div><div class='del'>-	{ 0x00, 0, 0 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void intel_tlb_lookup(const unsigned char desc)</div><div class='add'>+static void intel_tlb_lookup(const struct leaf_0x2_table *desc)</div><div class='ctx'> {</div><div class='del'>-	unsigned int entries;</div><div class='del'>-	unsigned char k;</div><div class='del'>-</div><div class='del'>-	if (desc == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* look up this descriptor in the table */</div><div class='del'>-	for (k = 0; intel_tlb_table[k].descriptor != desc &amp;&amp;</div><div class='del'>-	     intel_tlb_table[k].descriptor != 0; k++)</div><div class='del'>-		;</div><div class='add'>+	short entries = desc-&gt;entries;</div><div class='ctx'> </div><div class='del'>-	if (intel_tlb_table[k].tlb_type == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	entries = intel_tlb_table[k].entries;</div><div class='del'>-	switch (intel_tlb_table[k].tlb_type) {</div><div class='add'>+	switch (desc-&gt;t_type) {</div><div class='ctx'> 	case STLB_4K:</div><div class='ctx'> 		tlb_lli_4k = max(tlb_lli_4k, entries);</div><div class='ctx'> 		tlb_lld_4k = max(tlb_lld_4k, entries);</div><div class='hunk'>@@ -799,28 +709,16 @@ static void intel_tlb_lookup(const unsigned char desc)</div><div class='ctx'> </div><div class='ctx'> static void intel_detect_tlb(struct cpuinfo_x86 *c)</div><div class='ctx'> {</div><div class='del'>-	int i, j, n;</div><div class='del'>-	unsigned int regs[4];</div><div class='del'>-	unsigned char *desc = (unsigned char *)regs;</div><div class='add'>+	const struct leaf_0x2_table *desc;</div><div class='add'>+	union leaf_0x2_regs regs;</div><div class='add'>+	u8 *ptr;</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;cpuid_level &lt; 2)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* Number of times to iterate */</div><div class='del'>-	n = cpuid_eax(2) &amp; 0xFF;</div><div class='del'>-</div><div class='del'>-	for (i = 0 ; i &lt; n ; i++) {</div><div class='del'>-		cpuid(2, &amp;regs[0], &amp;regs[1], &amp;regs[2], &amp;regs[3]);</div><div class='del'>-</div><div class='del'>-		/* If bit 31 is set, this is an unknown format */</div><div class='del'>-		for (j = 0 ; j &lt; 4 ; j++)</div><div class='del'>-			if (regs[j] &amp; (1 &lt;&lt; 31))</div><div class='del'>-				regs[j] = 0;</div><div class='del'>-</div><div class='del'>-		/* Byte 0 is level count, not a descriptor */</div><div class='del'>-		for (j = 1 ; j &lt; 16 ; j++)</div><div class='del'>-			intel_tlb_lookup(desc[j]);</div><div class='del'>-	}</div><div class='add'>+	cpuid_leaf_0x2(&amp;regs);</div><div class='add'>+	for_each_cpuid_0x2_desc(regs, ptr, desc)</div><div class='add'>+		intel_tlb_lookup(desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct cpu_dev intel_cpu_dev = {</div><div class='head'>diff --git a/arch/x86/kernel/cpu/intel_epb.c b/arch/x86/kernel/cpu/intel_epb.c<br/>index 30b1d63b97f3..bc7671f920a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel_epb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/intel_epb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/intel_epb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/intel_epb.c</a></div><div class='hunk'>@@ -79,7 +79,7 @@ static int intel_epb_save(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 epb;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb);</div><div class='add'>+	rdmsrq(MSR_IA32_ENERGY_PERF_BIAS, epb);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ensure that saved_epb will always be nonzero after this write even if</div><div class='ctx'> 	 * the EPB value read from the MSR is 0.</div><div class='hunk'>@@ -94,7 +94,7 @@ static void intel_epb_restore(void)</div><div class='ctx'> 	u64 val = this_cpu_read(saved_epb);</div><div class='ctx'> 	u64 epb;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb);</div><div class='add'>+	rdmsrq(MSR_IA32_ENERGY_PERF_BIAS, epb);</div><div class='ctx'> 	if (val) {</div><div class='ctx'> 		val &amp;= EPB_MASK;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -111,7 +111,7 @@ static void intel_epb_restore(void)</div><div class='ctx'> 			pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, (epb &amp; ~EPB_MASK) | val);</div><div class='add'>+	wrmsrq(MSR_IA32_ENERGY_PERF_BIAS, (epb &amp; ~EPB_MASK) | val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct syscore_ops intel_epb_syscore_ops = {</div><div class='hunk'>@@ -135,7 +135,7 @@ static ssize_t energy_perf_bias_show(struct device *dev,</div><div class='ctx'> 	u64 epb;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = rdmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='add'>+	ret = rdmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -157,11 +157,11 @@ static ssize_t energy_perf_bias_store(struct device *dev,</div><div class='ctx'> 	else if (kstrtou64(buf, 0, &amp;val) || val &gt; MAX_EPB)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = rdmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='add'>+	ret = rdmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = wrmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS,</div><div class='add'>+	ret = wrmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS,</div><div class='ctx'> 			    (epb &amp; ~EPB_MASK) | val);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c<br/>index 1075a90141da..9d852c3b2cb5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/amd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/mce/amd.c</a></div><div class='hunk'>@@ -662,12 +662,12 @@ static void disable_err_thresholding(struct cpuinfo_x86 *c, unsigned int bank)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_K7_HWCR, hwcr);</div><div class='add'>+	rdmsrq(MSR_K7_HWCR, hwcr);</div><div class='ctx'> </div><div class='ctx'> 	/* McStatusWrEn has to be set */</div><div class='ctx'> 	need_toggle = !(hwcr &amp; BIT(18));</div><div class='ctx'> 	if (need_toggle)</div><div class='del'>-		wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));</div><div class='add'>+		wrmsrq(MSR_K7_HWCR, hwcr | BIT(18));</div><div class='ctx'> </div><div class='ctx'> 	/* Clear CntP bit safely */</div><div class='ctx'> 	for (i = 0; i &lt; num_msrs; i++)</div><div class='hunk'>@@ -675,7 +675,7 @@ static void disable_err_thresholding(struct cpuinfo_x86 *c, unsigned int bank)</div><div class='ctx'> </div><div class='ctx'> 	/* restore old settings */</div><div class='ctx'> 	if (need_toggle)</div><div class='del'>-		wrmsrl(MSR_K7_HWCR, hwcr);</div><div class='add'>+		wrmsrq(MSR_K7_HWCR, hwcr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* cpu init entry point, called from mce.c with preempt off */</div><div class='hunk'>@@ -805,12 +805,12 @@ static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mce_flags.smca) {</div><div class='del'>-		rdmsrl(MSR_AMD64_SMCA_MCx_IPID(bank), m-&gt;ipid);</div><div class='add'>+		rdmsrq(MSR_AMD64_SMCA_MCx_IPID(bank), m-&gt;ipid);</div><div class='ctx'> </div><div class='ctx'> 		if (m-&gt;status &amp; MCI_STATUS_SYNDV) {</div><div class='del'>-			rdmsrl(MSR_AMD64_SMCA_MCx_SYND(bank), m-&gt;synd);</div><div class='del'>-			rdmsrl(MSR_AMD64_SMCA_MCx_SYND1(bank), err.vendor.amd.synd1);</div><div class='del'>-			rdmsrl(MSR_AMD64_SMCA_MCx_SYND2(bank), err.vendor.amd.synd2);</div><div class='add'>+			rdmsrq(MSR_AMD64_SMCA_MCx_SYND(bank), m-&gt;synd);</div><div class='add'>+			rdmsrq(MSR_AMD64_SMCA_MCx_SYND1(bank), err.vendor.amd.synd1);</div><div class='add'>+			rdmsrq(MSR_AMD64_SMCA_MCx_SYND2(bank), err.vendor.amd.synd2);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -834,16 +834,16 @@ _log_error_bank(unsigned int bank, u32 msr_stat, u32 msr_addr, u64 misc)</div><div class='ctx'> {</div><div class='ctx'> 	u64 status, addr = 0;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(msr_stat, status);</div><div class='add'>+	rdmsrq(msr_stat, status);</div><div class='ctx'> 	if (!(status &amp; MCI_STATUS_VAL))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; MCI_STATUS_ADDRV)</div><div class='del'>-		rdmsrl(msr_addr, addr);</div><div class='add'>+		rdmsrq(msr_addr, addr);</div><div class='ctx'> </div><div class='ctx'> 	__log_error(bank, status, addr, misc);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(msr_stat, 0);</div><div class='add'>+	wrmsrq(msr_stat, 0);</div><div class='ctx'> </div><div class='ctx'> 	return status &amp; MCI_STATUS_DEFERRED;</div><div class='ctx'> }</div><div class='hunk'>@@ -862,7 +862,7 @@ static bool _log_error_deferred(unsigned int bank, u32 misc)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear MCA_DESTAT if the deferred error was logged from MCA_STATUS. */</div><div class='del'>-	wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(bank), 0);</div><div class='add'>+	wrmsrq(MSR_AMD64_SMCA_MCx_DESTAT(bank), 0);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c<br/>index f6fd71b64b66..e9b3c5d4a52e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/mce/core.c</a></div><div class='hunk'>@@ -121,7 +121,7 @@ void mce_prep_record_common(struct mce *m)</div><div class='ctx'> {</div><div class='ctx'> 	m-&gt;cpuid	= cpuid_eax(1);</div><div class='ctx'> 	m-&gt;cpuvendor	= boot_cpu_data.x86_vendor;</div><div class='del'>-	m-&gt;mcgcap	= __rdmsr(MSR_IA32_MCG_CAP);</div><div class='add'>+	m-&gt;mcgcap	= native_rdmsrq(MSR_IA32_MCG_CAP);</div><div class='ctx'> 	/* need the internal __ version to avoid deadlocks */</div><div class='ctx'> 	m-&gt;time		= __ktime_get_real_seconds();</div><div class='ctx'> }</div><div class='hunk'>@@ -388,9 +388,9 @@ void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* MSR access wrappers used for error injection */</div><div class='del'>-noinstr u64 mce_rdmsrl(u32 msr)</div><div class='add'>+noinstr u64 mce_rdmsrq(u32 msr)</div><div class='ctx'> {</div><div class='del'>-	DECLARE_ARGS(val, low, high);</div><div class='add'>+	EAX_EDX_DECLARE_ARGS(val, low, high);</div><div class='ctx'> </div><div class='ctx'> 	if (__this_cpu_read(injectm.finished)) {</div><div class='ctx'> 		int offset;</div><div class='hunk'>@@ -423,7 +423,7 @@ noinstr u64 mce_rdmsrl(u32 msr)</div><div class='ctx'> 	return EAX_EDX_VAL(val, low, high);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static noinstr void mce_wrmsrl(u32 msr, u64 v)</div><div class='add'>+static noinstr void mce_wrmsrq(u32 msr, u64 v)</div><div class='ctx'> {</div><div class='ctx'> 	u32 low, high;</div><div class='ctx'> </div><div class='hunk'>@@ -444,7 +444,7 @@ static noinstr void mce_wrmsrl(u32 msr, u64 v)</div><div class='ctx'> 	low  = (u32)v;</div><div class='ctx'> 	high = (u32)(v &gt;&gt; 32);</div><div class='ctx'> </div><div class='del'>-	/* See comment in mce_rdmsrl() */</div><div class='add'>+	/* See comment in mce_rdmsrq() */</div><div class='ctx'> 	asm volatile("1: wrmsr\n"</div><div class='ctx'> 		     "2:\n"</div><div class='ctx'> 		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR_IN_MCE)</div><div class='hunk'>@@ -468,7 +468,7 @@ static noinstr void mce_gather_info(struct mce_hw_err *err, struct pt_regs *regs</div><div class='ctx'> 	instrumentation_end();</div><div class='ctx'> </div><div class='ctx'> 	m = &amp;err-&gt;m;</div><div class='del'>-	m-&gt;mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);</div><div class='add'>+	m-&gt;mcgstatus = mce_rdmsrq(MSR_IA32_MCG_STATUS);</div><div class='ctx'> 	if (regs) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Get the address of the instruction at the time of</div><div class='hunk'>@@ -488,7 +488,7 @@ static noinstr void mce_gather_info(struct mce_hw_err *err, struct pt_regs *regs</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Use accurate RIP reporting if available. */</div><div class='ctx'> 		if (mca_cfg.rip_msr)</div><div class='del'>-			m-&gt;ip = mce_rdmsrl(mca_cfg.rip_msr);</div><div class='add'>+			m-&gt;ip = mce_rdmsrq(mca_cfg.rip_msr);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -684,10 +684,10 @@ static noinstr void mce_read_aux(struct mce_hw_err *err, int i)</div><div class='ctx'> 	struct mce *m = &amp;err-&gt;m;</div><div class='ctx'> </div><div class='ctx'> 	if (m-&gt;status &amp; MCI_STATUS_MISCV)</div><div class='del'>-		m-&gt;misc = mce_rdmsrl(mca_msr_reg(i, MCA_MISC));</div><div class='add'>+		m-&gt;misc = mce_rdmsrq(mca_msr_reg(i, MCA_MISC));</div><div class='ctx'> </div><div class='ctx'> 	if (m-&gt;status &amp; MCI_STATUS_ADDRV) {</div><div class='del'>-		m-&gt;addr = mce_rdmsrl(mca_msr_reg(i, MCA_ADDR));</div><div class='add'>+		m-&gt;addr = mce_rdmsrq(mca_msr_reg(i, MCA_ADDR));</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Mask the reported address by the reported granularity.</div><div class='hunk'>@@ -702,12 +702,12 @@ static noinstr void mce_read_aux(struct mce_hw_err *err, int i)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mce_flags.smca) {</div><div class='del'>-		m-&gt;ipid = mce_rdmsrl(MSR_AMD64_SMCA_MCx_IPID(i));</div><div class='add'>+		m-&gt;ipid = mce_rdmsrq(MSR_AMD64_SMCA_MCx_IPID(i));</div><div class='ctx'> </div><div class='ctx'> 		if (m-&gt;status &amp; MCI_STATUS_SYNDV) {</div><div class='del'>-			m-&gt;synd = mce_rdmsrl(MSR_AMD64_SMCA_MCx_SYND(i));</div><div class='del'>-			err-&gt;vendor.amd.synd1 = mce_rdmsrl(MSR_AMD64_SMCA_MCx_SYND1(i));</div><div class='del'>-			err-&gt;vendor.amd.synd2 = mce_rdmsrl(MSR_AMD64_SMCA_MCx_SYND2(i));</div><div class='add'>+			m-&gt;synd = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND(i));</div><div class='add'>+			err-&gt;vendor.amd.synd1 = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND1(i));</div><div class='add'>+			err-&gt;vendor.amd.synd2 = mce_rdmsrq(MSR_AMD64_SMCA_MCx_SYND2(i));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -753,7 +753,7 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)</div><div class='ctx'> 		m-&gt;bank = i;</div><div class='ctx'> </div><div class='ctx'> 		barrier();</div><div class='del'>-		m-&gt;status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));</div><div class='add'>+		m-&gt;status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Update storm tracking here, before checking for the</div><div class='hunk'>@@ -829,7 +829,7 @@ clear_it:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Clear state for this bank.</div><div class='ctx'> 		 */</div><div class='del'>-		mce_wrmsrl(mca_msr_reg(i, MCA_STATUS), 0);</div><div class='add'>+		mce_wrmsrq(mca_msr_reg(i, MCA_STATUS), 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -887,8 +887,8 @@ quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)</div><div class='ctx'>  */</div><div class='ctx'> static noinstr bool quirk_skylake_repmov(void)</div><div class='ctx'> {</div><div class='del'>-	u64 mcgstatus   = mce_rdmsrl(MSR_IA32_MCG_STATUS);</div><div class='del'>-	u64 misc_enable = mce_rdmsrl(MSR_IA32_MISC_ENABLE);</div><div class='add'>+	u64 mcgstatus   = mce_rdmsrq(MSR_IA32_MCG_STATUS);</div><div class='add'>+	u64 misc_enable = mce_rdmsrq(MSR_IA32_MISC_ENABLE);</div><div class='ctx'> 	u64 mc1_status;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -899,7 +899,7 @@ static noinstr bool quirk_skylake_repmov(void)</div><div class='ctx'> 	    !(misc_enable &amp; MSR_IA32_MISC_ENABLE_FAST_STRING))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	mc1_status = mce_rdmsrl(MSR_IA32_MCx_STATUS(1));</div><div class='add'>+	mc1_status = mce_rdmsrq(MSR_IA32_MCx_STATUS(1));</div><div class='ctx'> </div><div class='ctx'> 	/* Check for a software-recoverable data fetch error. */</div><div class='ctx'> 	if ((mc1_status &amp;</div><div class='hunk'>@@ -910,8 +910,8 @@ static noinstr bool quirk_skylake_repmov(void)</div><div class='ctx'> 	      MCI_STATUS_ADDRV | MCI_STATUS_MISCV |</div><div class='ctx'> 	      MCI_STATUS_AR | MCI_STATUS_S)) {</div><div class='ctx'> 		misc_enable &amp;= ~MSR_IA32_MISC_ENABLE_FAST_STRING;</div><div class='del'>-		mce_wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);</div><div class='del'>-		mce_wrmsrl(MSR_IA32_MCx_STATUS(1), 0);</div><div class='add'>+		mce_wrmsrq(MSR_IA32_MISC_ENABLE, misc_enable);</div><div class='add'>+		mce_wrmsrq(MSR_IA32_MCx_STATUS(1), 0);</div><div class='ctx'> </div><div class='ctx'> 		instrumentation_begin();</div><div class='ctx'> 		pr_err_once("Erratum detected, disable fast string copy instructions.\n");</div><div class='hunk'>@@ -955,7 +955,7 @@ static __always_inline int mce_no_way_out(struct mce_hw_err *err, char **msg, un</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; this_cpu_read(mce_num_banks); i++) {</div><div class='del'>-		m-&gt;status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));</div><div class='add'>+		m-&gt;status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));</div><div class='ctx'> 		if (!(m-&gt;status &amp; MCI_STATUS_VAL))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1274,7 +1274,7 @@ static __always_inline void mce_clear_state(unsigned long *toclear)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; this_cpu_read(mce_num_banks); i++) {</div><div class='ctx'> 		if (arch_test_bit(i, toclear))</div><div class='del'>-			mce_wrmsrl(mca_msr_reg(i, MCA_STATUS), 0);</div><div class='add'>+			mce_wrmsrq(mca_msr_reg(i, MCA_STATUS), 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1298,7 +1298,7 @@ static noinstr bool mce_check_crashing_cpu(void)</div><div class='ctx'> 	    (crashing_cpu != -1 &amp;&amp; crashing_cpu != cpu)) {</div><div class='ctx'> 		u64 mcgstatus;</div><div class='ctx'> </div><div class='del'>-		mcgstatus = __rdmsr(MSR_IA32_MCG_STATUS);</div><div class='add'>+		mcgstatus = native_rdmsrq(MSR_IA32_MCG_STATUS);</div><div class='ctx'> </div><div class='ctx'> 		if (boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN) {</div><div class='ctx'> 			if (mcgstatus &amp; MCG_STATUS_LMCES)</div><div class='hunk'>@@ -1306,7 +1306,7 @@ static noinstr bool mce_check_crashing_cpu(void)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (mcgstatus &amp; MCG_STATUS_RIPV) {</div><div class='del'>-			__wrmsr(MSR_IA32_MCG_STATUS, 0, 0);</div><div class='add'>+			native_wrmsrq(MSR_IA32_MCG_STATUS, 0);</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1335,7 +1335,7 @@ __mc_scan_banks(struct mce_hw_err *err, struct pt_regs *regs,</div><div class='ctx'> 		m-&gt;addr = 0;</div><div class='ctx'> 		m-&gt;bank = i;</div><div class='ctx'> </div><div class='del'>-		m-&gt;status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));</div><div class='add'>+		m-&gt;status = mce_rdmsrq(mca_msr_reg(i, MCA_STATUS));</div><div class='ctx'> 		if (!(m-&gt;status &amp; MCI_STATUS_VAL))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1693,7 +1693,7 @@ out:</div><div class='ctx'> 	instrumentation_end();</div><div class='ctx'> </div><div class='ctx'> clear:</div><div class='del'>-	mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);</div><div class='add'>+	mce_wrmsrq(MSR_IA32_MCG_STATUS, 0);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(do_machine_check);</div><div class='ctx'> </div><div class='hunk'>@@ -1822,7 +1822,7 @@ static void __mcheck_cpu_cap_init(void)</div><div class='ctx'> 	u64 cap;</div><div class='ctx'> 	u8 b;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCG_CAP, cap);</div><div class='add'>+	rdmsrq(MSR_IA32_MCG_CAP, cap);</div><div class='ctx'> </div><div class='ctx'> 	b = cap &amp; MCG_BANKCNT_MASK;</div><div class='ctx'> </div><div class='hunk'>@@ -1863,7 +1863,7 @@ static void __mcheck_cpu_init_generic(void)</div><div class='ctx'> </div><div class='ctx'> 	cr4_set_bits(X86_CR4_MCE);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCG_CAP, cap);</div><div class='add'>+	rdmsrq(MSR_IA32_MCG_CAP, cap);</div><div class='ctx'> 	if (cap &amp; MCG_CTL_P)</div><div class='ctx'> 		wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);</div><div class='ctx'> }</div><div class='hunk'>@@ -1878,8 +1878,8 @@ static void __mcheck_cpu_init_clear_banks(void)</div><div class='ctx'> </div><div class='ctx'> 		if (!b-&gt;init)</div><div class='ctx'> 			continue;</div><div class='del'>-		wrmsrl(mca_msr_reg(i, MCA_CTL), b-&gt;ctl);</div><div class='del'>-		wrmsrl(mca_msr_reg(i, MCA_STATUS), 0);</div><div class='add'>+		wrmsrq(mca_msr_reg(i, MCA_CTL), b-&gt;ctl);</div><div class='add'>+		wrmsrq(mca_msr_reg(i, MCA_STATUS), 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1905,7 +1905,7 @@ static void __mcheck_cpu_check_banks(void)</div><div class='ctx'> 		if (!b-&gt;init)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(mca_msr_reg(i, MCA_CTL), msrval);</div><div class='add'>+		rdmsrq(mca_msr_reg(i, MCA_CTL), msrval);</div><div class='ctx'> 		b-&gt;init = !!msrval;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2436,7 +2436,7 @@ static void mce_disable_error_reporting(void)</div><div class='ctx'> 		struct mce_bank *b = &amp;mce_banks[i];</div><div class='ctx'> </div><div class='ctx'> 		if (b-&gt;init)</div><div class='del'>-			wrmsrl(mca_msr_reg(i, MCA_CTL), 0);</div><div class='add'>+			wrmsrq(mca_msr_reg(i, MCA_CTL), 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='hunk'>@@ -2786,7 +2786,7 @@ static void mce_reenable_cpu(void)</div><div class='ctx'> 		struct mce_bank *b = &amp;mce_banks[i];</div><div class='ctx'> </div><div class='ctx'> 		if (b-&gt;init)</div><div class='del'>-			wrmsrl(mca_msr_reg(i, MCA_CTL), b-&gt;ctl);</div><div class='add'>+			wrmsrq(mca_msr_reg(i, MCA_CTL), b-&gt;ctl);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c<br/>index 06e3cf7229ce..d02c4f556cd0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/inject.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/inject.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/inject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/mce/inject.c</a></div><div class='hunk'>@@ -24,10 +24,11 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/irq_vectors.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -475,27 +476,27 @@ static void prepare_msrs(void *info)</div><div class='ctx'> 	struct mce m = *(struct mce *)info;</div><div class='ctx'> 	u8 b = m.bank;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);</div><div class='add'>+	wrmsrq(MSR_IA32_MCG_STATUS, m.mcgstatus);</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_SMCA)) {</div><div class='ctx'> 		if (m.inject_flags == DFR_INT_INJ) {</div><div class='del'>-			wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(b), m.status);</div><div class='del'>-			wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), m.addr);</div><div class='add'>+			wrmsrq(MSR_AMD64_SMCA_MCx_DESTAT(b), m.status);</div><div class='add'>+			wrmsrq(MSR_AMD64_SMCA_MCx_DEADDR(b), m.addr);</div><div class='ctx'> 		} else {</div><div class='del'>-			wrmsrl(MSR_AMD64_SMCA_MCx_STATUS(b), m.status);</div><div class='del'>-			wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), m.addr);</div><div class='add'>+			wrmsrq(MSR_AMD64_SMCA_MCx_STATUS(b), m.status);</div><div class='add'>+			wrmsrq(MSR_AMD64_SMCA_MCx_ADDR(b), m.addr);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), m.synd);</div><div class='add'>+		wrmsrq(MSR_AMD64_SMCA_MCx_SYND(b), m.synd);</div><div class='ctx'> </div><div class='ctx'> 		if (m.misc)</div><div class='del'>-			wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), m.misc);</div><div class='add'>+			wrmsrq(MSR_AMD64_SMCA_MCx_MISC(b), m.misc);</div><div class='ctx'> 	} else {</div><div class='del'>-		wrmsrl(MSR_IA32_MCx_STATUS(b), m.status);</div><div class='del'>-		wrmsrl(MSR_IA32_MCx_ADDR(b), m.addr);</div><div class='add'>+		wrmsrq(MSR_IA32_MCx_STATUS(b), m.status);</div><div class='add'>+		wrmsrq(MSR_IA32_MCx_ADDR(b), m.addr);</div><div class='ctx'> </div><div class='ctx'> 		if (m.misc)</div><div class='del'>-			wrmsrl(MSR_IA32_MCx_MISC(b), m.misc);</div><div class='add'>+			wrmsrq(MSR_IA32_MCx_MISC(b), m.misc);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -589,7 +590,7 @@ static int inj_bank_set(void *data, u64 val)</div><div class='ctx'> 	u64 cap;</div><div class='ctx'> </div><div class='ctx'> 	/* Get bank count on target CPU so we can handle non-uniform values. */</div><div class='del'>-	rdmsrl_on_cpu(m-&gt;extcpu, MSR_IA32_MCG_CAP, &amp;cap);</div><div class='add'>+	rdmsrq_on_cpu(m-&gt;extcpu, MSR_IA32_MCG_CAP, &amp;cap);</div><div class='ctx'> 	n_banks = cap &amp; MCG_BANKCNT_MASK;</div><div class='ctx'> </div><div class='ctx'> 	if (val &gt;= n_banks) {</div><div class='hunk'>@@ -613,7 +614,7 @@ static int inj_bank_set(void *data, u64 val)</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_SMCA)) {</div><div class='ctx'> 		u64 ipid;</div><div class='ctx'> </div><div class='del'>-		if (rdmsrl_on_cpu(m-&gt;extcpu, MSR_AMD64_SMCA_MCx_IPID(val), &amp;ipid)) {</div><div class='add'>+		if (rdmsrq_on_cpu(m-&gt;extcpu, MSR_AMD64_SMCA_MCx_IPID(val), &amp;ipid)) {</div><div class='ctx'> 			pr_err("Error reading IPID on CPU%d\n", m-&gt;extcpu);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -741,15 +742,15 @@ static void check_hw_inj_possible(void)</div><div class='ctx'> 		u64 status = MCI_STATUS_VAL, ipid;</div><div class='ctx'> </div><div class='ctx'> 		/* Check whether bank is populated */</div><div class='del'>-		rdmsrl(MSR_AMD64_SMCA_MCx_IPID(bank), ipid);</div><div class='add'>+		rdmsrq(MSR_AMD64_SMCA_MCx_IPID(bank), ipid);</div><div class='ctx'> 		if (!ipid)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		toggle_hw_mce_inject(cpu, true);</div><div class='ctx'> </div><div class='del'>-		wrmsrl_safe(mca_msr_reg(bank, MCA_STATUS), status);</div><div class='del'>-		rdmsrl_safe(mca_msr_reg(bank, MCA_STATUS), &amp;status);</div><div class='del'>-		wrmsrl_safe(mca_msr_reg(bank, MCA_STATUS), 0);</div><div class='add'>+		wrmsrq_safe(mca_msr_reg(bank, MCA_STATUS), status);</div><div class='add'>+		rdmsrq_safe(mca_msr_reg(bank, MCA_STATUS), &amp;status);</div><div class='add'>+		wrmsrq_safe(mca_msr_reg(bank, MCA_STATUS), 0);</div><div class='ctx'> </div><div class='ctx'> 		if (!status) {</div><div class='ctx'> 			hw_injection_possible = false;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/intel.c b/arch/x86/kernel/cpu/mce/intel.c<br/>index f863df0ff42c..efcf21e9552e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/intel.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/mce/intel.c</a></div><div class='hunk'>@@ -94,7 +94,7 @@ static bool cmci_supported(int *banks)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_APIC) || lapic_get_maxlvt() &lt; 6)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCG_CAP, cap);</div><div class='add'>+	rdmsrq(MSR_IA32_MCG_CAP, cap);</div><div class='ctx'> 	*banks = min_t(unsigned, MAX_NR_BANKS, cap &amp; MCG_BANKCNT_MASK);</div><div class='ctx'> 	return !!(cap &amp; MCG_CMCI_P);</div><div class='ctx'> }</div><div class='hunk'>@@ -106,7 +106,7 @@ static bool lmce_supported(void)</div><div class='ctx'> 	if (mca_cfg.lmce_disabled)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCG_CAP, tmp);</div><div class='add'>+	rdmsrq(MSR_IA32_MCG_CAP, tmp);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * LMCE depends on recovery support in the processor. Hence both</div><div class='hunk'>@@ -123,7 +123,7 @@ static bool lmce_supported(void)</div><div class='ctx'> 	 * WARN if the MSR isn't locked as init_ia32_feat_ctl() unconditionally</div><div class='ctx'> 	 * locks the MSR in the event that it wasn't already locked by BIOS.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_IA32_FEAT_CTL, tmp);</div><div class='add'>+	rdmsrq(MSR_IA32_FEAT_CTL, tmp);</div><div class='ctx'> 	if (WARN_ON_ONCE(!(tmp &amp; FEAT_CTL_LOCKED)))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -141,9 +141,9 @@ static void cmci_set_threshold(int bank, int thresh)</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;cmci_discover_lock, flags);</div><div class='del'>-	rdmsrl(MSR_IA32_MCx_CTL2(bank), val);</div><div class='add'>+	rdmsrq(MSR_IA32_MCx_CTL2(bank), val);</div><div class='ctx'> 	val &amp;= ~MCI_CTL2_CMCI_THRESHOLD_MASK;</div><div class='del'>-	wrmsrl(MSR_IA32_MCx_CTL2(bank), val | thresh);</div><div class='add'>+	wrmsrq(MSR_IA32_MCx_CTL2(bank), val | thresh);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;cmci_discover_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -184,7 +184,7 @@ static bool cmci_skip_bank(int bank, u64 *val)</div><div class='ctx'> 	if (test_bit(bank, mce_banks_ce_disabled))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCx_CTL2(bank), *val);</div><div class='add'>+	rdmsrq(MSR_IA32_MCx_CTL2(bank), *val);</div><div class='ctx'> </div><div class='ctx'> 	/* Already owned by someone else? */</div><div class='ctx'> 	if (*val &amp; MCI_CTL2_CMCI_EN) {</div><div class='hunk'>@@ -232,8 +232,8 @@ static void cmci_claim_bank(int bank, u64 val, int bios_zero_thresh, int *bios_w</div><div class='ctx'> 	struct mca_storm_desc *storm = this_cpu_ptr(&amp;storm_desc);</div><div class='ctx'> </div><div class='ctx'> 	val |= MCI_CTL2_CMCI_EN;</div><div class='del'>-	wrmsrl(MSR_IA32_MCx_CTL2(bank), val);</div><div class='del'>-	rdmsrl(MSR_IA32_MCx_CTL2(bank), val);</div><div class='add'>+	wrmsrq(MSR_IA32_MCx_CTL2(bank), val);</div><div class='add'>+	rdmsrq(MSR_IA32_MCx_CTL2(bank), val);</div><div class='ctx'> </div><div class='ctx'> 	/* If the enable bit did not stick, this bank should be polled. */</div><div class='ctx'> 	if (!(val &amp; MCI_CTL2_CMCI_EN)) {</div><div class='hunk'>@@ -324,9 +324,9 @@ static void __cmci_disable_bank(int bank)</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(bank, this_cpu_ptr(mce_banks_owned)))</div><div class='ctx'> 		return;</div><div class='del'>-	rdmsrl(MSR_IA32_MCx_CTL2(bank), val);</div><div class='add'>+	rdmsrq(MSR_IA32_MCx_CTL2(bank), val);</div><div class='ctx'> 	val &amp;= ~MCI_CTL2_CMCI_EN;</div><div class='del'>-	wrmsrl(MSR_IA32_MCx_CTL2(bank), val);</div><div class='add'>+	wrmsrq(MSR_IA32_MCx_CTL2(bank), val);</div><div class='ctx'> 	__clear_bit(bank, this_cpu_ptr(mce_banks_owned));</div><div class='ctx'> </div><div class='ctx'> 	if ((val &amp; MCI_CTL2_CMCI_THRESHOLD_MASK) == CMCI_STORM_THRESHOLD)</div><div class='hunk'>@@ -430,10 +430,10 @@ void intel_init_lmce(void)</div><div class='ctx'> 	if (!lmce_supported())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCG_EXT_CTL, val);</div><div class='add'>+	rdmsrq(MSR_IA32_MCG_EXT_CTL, val);</div><div class='ctx'> </div><div class='ctx'> 	if (!(val &amp; MCG_EXT_CTL_LMCE_EN))</div><div class='del'>-		wrmsrl(MSR_IA32_MCG_EXT_CTL, val | MCG_EXT_CTL_LMCE_EN);</div><div class='add'>+		wrmsrq(MSR_IA32_MCG_EXT_CTL, val | MCG_EXT_CTL_LMCE_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void intel_clear_lmce(void)</div><div class='hunk'>@@ -443,9 +443,9 @@ void intel_clear_lmce(void)</div><div class='ctx'> 	if (!lmce_supported())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCG_EXT_CTL, val);</div><div class='add'>+	rdmsrq(MSR_IA32_MCG_EXT_CTL, val);</div><div class='ctx'> 	val &amp;= ~MCG_EXT_CTL_LMCE_EN;</div><div class='del'>-	wrmsrl(MSR_IA32_MCG_EXT_CTL, val);</div><div class='add'>+	wrmsrq(MSR_IA32_MCG_EXT_CTL, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -460,10 +460,10 @@ static void intel_imc_init(struct cpuinfo_x86 *c)</div><div class='ctx'> 	case INTEL_SANDYBRIDGE_X:</div><div class='ctx'> 	case INTEL_IVYBRIDGE_X:</div><div class='ctx'> 	case INTEL_HASWELL_X:</div><div class='del'>-		if (rdmsrl_safe(MSR_ERROR_CONTROL, &amp;error_control))</div><div class='add'>+		if (rdmsrq_safe(MSR_ERROR_CONTROL, &amp;error_control))</div><div class='ctx'> 			return;</div><div class='ctx'> 		error_control |= 2;</div><div class='del'>-		wrmsrl_safe(MSR_ERROR_CONTROL, error_control);</div><div class='add'>+		wrmsrq_safe(MSR_ERROR_CONTROL, error_control);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h<br/>index 95a504ece43e..b5ba598e54cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mce/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mce/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/mce/internal.h</a></div><div class='hunk'>@@ -312,7 +312,7 @@ static __always_inline void pentium_machine_check(struct pt_regs *regs) {}</div><div class='ctx'> static __always_inline void winchip_machine_check(struct pt_regs *regs) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-noinstr u64 mce_rdmsrl(u32 msr);</div><div class='add'>+noinstr u64 mce_rdmsrq(u32 msr);</div><div class='ctx'> </div><div class='ctx'> static __always_inline u32 mca_msr_reg(int bank, enum mca_msr reg)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c<br/>index b61028cf5c8a..097e39327942 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/amd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/microcode/amd.c</a></div><div class='hunk'>@@ -199,6 +199,12 @@ static bool need_sha_check(u32 cur_rev)</div><div class='ctx'> 	case 0xa70c0: return cur_rev &lt;= 0xa70C009; break;</div><div class='ctx'> 	case 0xaa001: return cur_rev &lt;= 0xaa00116; break;</div><div class='ctx'> 	case 0xaa002: return cur_rev &lt;= 0xaa00218; break;</div><div class='add'>+	case 0xb0021: return cur_rev &lt;= 0xb002146; break;</div><div class='add'>+	case 0xb1010: return cur_rev &lt;= 0xb101046; break;</div><div class='add'>+	case 0xb2040: return cur_rev &lt;= 0xb204031; break;</div><div class='add'>+	case 0xb4040: return cur_rev &lt;= 0xb404031; break;</div><div class='add'>+	case 0xb6000: return cur_rev &lt;= 0xb600031; break;</div><div class='add'>+	case 0xb7000: return cur_rev &lt;= 0xb700031; break;</div><div class='ctx'> 	default: break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -211,11 +217,9 @@ static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsi</div><div class='ctx'> {</div><div class='ctx'> 	struct patch_digest *pd = NULL;</div><div class='ctx'> 	u8 digest[SHA256_DIGEST_SIZE];</div><div class='del'>-	struct sha256_state s;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (x86_family(bsp_cpuid_1_eax) &lt; 0x17 ||</div><div class='del'>-	    x86_family(bsp_cpuid_1_eax) &gt; 0x19)</div><div class='add'>+	if (x86_family(bsp_cpuid_1_eax) &lt; 0x17)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	if (!need_sha_check(cur_rev))</div><div class='hunk'>@@ -230,9 +234,7 @@ static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsi</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sha256_init(&amp;s);</div><div class='del'>-	sha256_update(&amp;s, data, len);</div><div class='del'>-	sha256_final(&amp;s, digest);</div><div class='add'>+	sha256(data, len, digest);</div><div class='ctx'> </div><div class='ctx'> 	if (memcmp(digest, pd-&gt;sha256, sizeof(digest))) {</div><div class='ctx'> 		pr_err("Patch 0x%x SHA256 digest mismatch!\n", patch_id);</div><div class='hunk'>@@ -602,7 +604,7 @@ static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,</div><div class='ctx'> 	if (!verify_sha256_digest(mc-&gt;hdr.patch_id, *cur_rev, (const u8 *)p_addr, psize))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	native_wrmsrl(MSR_AMD64_PATCH_LOADER, p_addr);</div><div class='add'>+	native_wrmsrq(MSR_AMD64_PATCH_LOADER, p_addr);</div><div class='ctx'> </div><div class='ctx'> 	if (x86_family(bsp_cpuid_1_eax) == 0x17) {</div><div class='ctx'> 		unsigned long p_addr_end = p_addr + psize - 1;</div><div class='hunk'>@@ -1093,15 +1095,17 @@ static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t siz</div><div class='ctx'> </div><div class='ctx'> static int __init save_microcode_in_initrd(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cpuid_1_eax = native_cpuid_eax(1);</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;boot_cpu_data;</div><div class='ctx'> 	struct cont_desc desc = { 0 };</div><div class='add'>+	unsigned int cpuid_1_eax;</div><div class='ctx'> 	enum ucode_state ret;</div><div class='ctx'> 	struct cpio_data cp;</div><div class='ctx'> </div><div class='del'>-	if (dis_ucode_ldr || c-&gt;x86_vendor != X86_VENDOR_AMD || c-&gt;x86 &lt; 0x10)</div><div class='add'>+	if (microcode_loader_disabled() || c-&gt;x86_vendor != X86_VENDOR_AMD || c-&gt;x86 &lt; 0x10)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	cpuid_1_eax = native_cpuid_eax(1);</div><div class='add'>+</div><div class='ctx'> 	if (!find_blobs_in_containers(&amp;cp))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -1171,11 +1175,18 @@ static void microcode_fini_cpu_amd(int cpu)</div><div class='ctx'> 	uci-&gt;mc = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void finalize_late_load_amd(int result)</div><div class='add'>+{</div><div class='add'>+	if (result)</div><div class='add'>+		cleanup();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct microcode_ops microcode_amd_ops = {</div><div class='ctx'> 	.request_microcode_fw	= request_microcode_amd,</div><div class='ctx'> 	.collect_cpu_info	= collect_cpu_info_amd,</div><div class='ctx'> 	.apply_microcode	= apply_microcode_amd,</div><div class='ctx'> 	.microcode_fini_cpu	= microcode_fini_cpu_amd,</div><div class='add'>+	.finalize_late_load	= finalize_late_load_amd,</div><div class='ctx'> 	.nmi_safe		= true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c<br/>index b3658d11e7b6..fe50eb5b7c4a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/microcode/core.c</a></div><div class='hunk'>@@ -37,12 +37,13 @@</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/cmdline.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='del'>-static struct microcode_ops	*microcode_ops;</div><div class='del'>-bool dis_ucode_ldr = true;</div><div class='add'>+static struct microcode_ops *microcode_ops;</div><div class='add'>+static bool dis_ucode_ldr = false;</div><div class='ctx'> </div><div class='ctx'> bool force_minrev = IS_ENABLED(CONFIG_MICROCODE_LATE_FORCE_MINREV);</div><div class='ctx'> module_param(force_minrev, bool, S_IRUSR | S_IWUSR);</div><div class='hunk'>@@ -84,6 +85,9 @@ static bool amd_check_current_patch_level(void)</div><div class='ctx'> 	u32 lvl, dummy, i;</div><div class='ctx'> 	u32 *levels;</div><div class='ctx'> </div><div class='add'>+	if (x86_cpuid_vendor() != X86_VENDOR_AMD)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);</div><div class='ctx'> </div><div class='ctx'> 	levels = final_levels;</div><div class='hunk'>@@ -95,27 +99,29 @@ static bool amd_check_current_patch_level(void)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool __init check_loader_disabled_bsp(void)</div><div class='add'>+bool __init microcode_loader_disabled(void)</div><div class='ctx'> {</div><div class='del'>-	static const char *__dis_opt_str = "dis_ucode_ldr";</div><div class='del'>-	const char *cmdline = boot_command_line;</div><div class='del'>-	const char *option  = __dis_opt_str;</div><div class='add'>+	if (dis_ucode_ldr)</div><div class='add'>+		return true;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not</div><div class='del'>-	 * completely accurate as xen pv guests don't see that CPUID bit set but</div><div class='del'>-	 * that's good enough as they don't land on the BSP path anyway.</div><div class='add'>+	 * Disable when:</div><div class='add'>+	 *</div><div class='add'>+	 * 1) The CPU does not support CPUID.</div><div class='add'>+	 *</div><div class='add'>+	 * 2) Bit 31 in CPUID[1]:ECX is clear</div><div class='add'>+	 *    The bit is reserved for hypervisor use. This is still not</div><div class='add'>+	 *    completely accurate as XEN PV guests don't see that CPUID bit</div><div class='add'>+	 *    set, but that's good enough as they don't land on the BSP</div><div class='add'>+	 *    path anyway.</div><div class='add'>+	 *</div><div class='add'>+	 * 3) Certain AMD patch levels are not allowed to be</div><div class='add'>+	 *    overwritten.</div><div class='ctx'> 	 */</div><div class='del'>-	if (native_cpuid_ecx(1) &amp; BIT(31))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	if (x86_cpuid_vendor() == X86_VENDOR_AMD) {</div><div class='del'>-		if (amd_check_current_patch_level())</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cmdline_find_option_bool(cmdline, option) &lt;= 0)</div><div class='del'>-		dis_ucode_ldr = false;</div><div class='add'>+	if (!cpuid_feature() ||</div><div class='add'>+	    native_cpuid_ecx(1) &amp; BIT(31) ||</div><div class='add'>+	    amd_check_current_patch_level())</div><div class='add'>+		dis_ucode_ldr = true;</div><div class='ctx'> </div><div class='ctx'> 	return dis_ucode_ldr;</div><div class='ctx'> }</div><div class='hunk'>@@ -125,7 +131,10 @@ void __init load_ucode_bsp(void)</div><div class='ctx'> 	unsigned int cpuid_1_eax;</div><div class='ctx'> 	bool intel = true;</div><div class='ctx'> </div><div class='del'>-	if (!have_cpuid_p())</div><div class='add'>+	if (cmdline_find_option_bool(boot_command_line, "dis_ucode_ldr") &gt; 0)</div><div class='add'>+		dis_ucode_ldr = true;</div><div class='add'>+</div><div class='add'>+	if (microcode_loader_disabled())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cpuid_1_eax = native_cpuid_eax(1);</div><div class='hunk'>@@ -146,9 +155,6 @@ void __init load_ucode_bsp(void)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (check_loader_disabled_bsp())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	if (intel)</div><div class='ctx'> 		load_ucode_intel_bsp(&amp;early_data);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -159,6 +165,11 @@ void load_ucode_ap(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int cpuid_1_eax;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Can't use microcode_loader_disabled() here - .init section</div><div class='add'>+	 * hell. It doesn't have to either - the BSP variant must've</div><div class='add'>+	 * parsed cmdline already anyway.</div><div class='add'>+	 */</div><div class='ctx'> 	if (dis_ucode_ldr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -686,6 +697,8 @@ static int load_late_locked(void)</div><div class='ctx'> 		return load_late_stop_cpus(true);</div><div class='ctx'> 	case UCODE_NFOUND:</div><div class='ctx'> 		return -ENOENT;</div><div class='add'>+	case UCODE_OK:</div><div class='add'>+		return 0;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EBADFD;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -810,7 +823,7 @@ static int __init microcode_init(void)</div><div class='ctx'> 	struct cpuinfo_x86 *c = &amp;boot_cpu_data;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='del'>-	if (dis_ucode_ldr)</div><div class='add'>+	if (microcode_loader_disabled())</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;x86_vendor == X86_VENDOR_INTEL)</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h b/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h<br/>new file mode 100644<br/>index 000000000000..cb6e601701ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/intel-ucode-defs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/microcode/intel-ucode-defs.h</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x03, .steppings = 0x0004, .driver_data = 0x2 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x05, .steppings = 0x0001, .driver_data = 0x45 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x05, .steppings = 0x0002, .driver_data = 0x40 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x05, .steppings = 0x0004, .driver_data = 0x2c },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x05, .steppings = 0x0008, .driver_data = 0x10 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x06, .steppings = 0x0001, .driver_data = 0xa },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x06, .steppings = 0x0020, .driver_data = 0x3 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x06, .steppings = 0x0400, .driver_data = 0xd },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x06, .steppings = 0x2000, .driver_data = 0x7 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x07, .steppings = 0x0002, .driver_data = 0x14 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x07, .steppings = 0x0004, .driver_data = 0x38 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x07, .steppings = 0x0008, .driver_data = 0x2e },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x08, .steppings = 0x0002, .driver_data = 0x11 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x08, .steppings = 0x0008, .driver_data = 0x8 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x08, .steppings = 0x0040, .driver_data = 0xc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x08, .steppings = 0x0400, .driver_data = 0x5 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x09, .steppings = 0x0020, .driver_data = 0x47 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0a, .steppings = 0x0001, .driver_data = 0x3 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0a, .steppings = 0x0002, .driver_data = 0x1 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0b, .steppings = 0x0002, .driver_data = 0x1d },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0b, .steppings = 0x0010, .driver_data = 0x2 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0d, .steppings = 0x0040, .driver_data = 0x18 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0e, .steppings = 0x0100, .driver_data = 0x39 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0e, .steppings = 0x1000, .driver_data = 0x59 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0f, .steppings = 0x0004, .driver_data = 0x5d },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0f, .steppings = 0x0040, .driver_data = 0xd2 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0f, .steppings = 0x0080, .driver_data = 0x6b },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0f, .steppings = 0x0400, .driver_data = 0x95 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0f, .steppings = 0x0800, .driver_data = 0xbc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x0f, .steppings = 0x2000, .driver_data = 0xa4 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x16, .steppings = 0x0002, .driver_data = 0x44 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x17, .steppings = 0x0040, .driver_data = 0x60f },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x17, .steppings = 0x0080, .driver_data = 0x70a },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x17, .steppings = 0x0400, .driver_data = 0xa0b },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x1a, .steppings = 0x0010, .driver_data = 0x12 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x1a, .steppings = 0x0020, .driver_data = 0x1d },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x1c, .steppings = 0x0004, .driver_data = 0x219 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x1c, .steppings = 0x0400, .driver_data = 0x107 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x1d, .steppings = 0x0002, .driver_data = 0x29 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x1e, .steppings = 0x0020, .driver_data = 0xa },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x25, .steppings = 0x0004, .driver_data = 0x11 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x25, .steppings = 0x0020, .driver_data = 0x7 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x26, .steppings = 0x0002, .driver_data = 0x105 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x2a, .steppings = 0x0080, .driver_data = 0x2f },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x2c, .steppings = 0x0004, .driver_data = 0x1f },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x2d, .steppings = 0x0040, .driver_data = 0x621 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x2d, .steppings = 0x0080, .driver_data = 0x71a },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x2e, .steppings = 0x0040, .driver_data = 0xd },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x2f, .steppings = 0x0004, .driver_data = 0x3b },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x37, .steppings = 0x0100, .driver_data = 0x838 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x37, .steppings = 0x0200, .driver_data = 0x90d },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3a, .steppings = 0x0200, .driver_data = 0x21 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3c, .steppings = 0x0008, .driver_data = 0x28 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3d, .steppings = 0x0010, .driver_data = 0x2f },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3e, .steppings = 0x0010, .driver_data = 0x42e },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3e, .steppings = 0x0040, .driver_data = 0x600 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3e, .steppings = 0x0080, .driver_data = 0x715 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3f, .steppings = 0x0004, .driver_data = 0x49 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x3f, .steppings = 0x0010, .driver_data = 0x1a },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x45, .steppings = 0x0002, .driver_data = 0x26 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x46, .steppings = 0x0002, .driver_data = 0x1c },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x47, .steppings = 0x0002, .driver_data = 0x22 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x4c, .steppings = 0x0008, .driver_data = 0x368 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x4c, .steppings = 0x0010, .driver_data = 0x411 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x4d, .steppings = 0x0100, .driver_data = 0x12d },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x4e, .steppings = 0x0008, .driver_data = 0xf0 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x55, .steppings = 0x0008, .driver_data = 0x1000191 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x55, .steppings = 0x0010, .driver_data = 0x2007006 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x55, .steppings = 0x0020, .driver_data = 0x3000010 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x55, .steppings = 0x0040, .driver_data = 0x4003605 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x55, .steppings = 0x0080, .driver_data = 0x5003707 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x55, .steppings = 0x0800, .driver_data = 0x7002904 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x56, .steppings = 0x0004, .driver_data = 0x1c },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x56, .steppings = 0x0008, .driver_data = 0x700001c },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x56, .steppings = 0x0010, .driver_data = 0xf00001a },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x56, .steppings = 0x0020, .driver_data = 0xe000015 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x5c, .steppings = 0x0004, .driver_data = 0x14 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x5c, .steppings = 0x0200, .driver_data = 0x48 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x5c, .steppings = 0x0400, .driver_data = 0x28 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x5e, .steppings = 0x0008, .driver_data = 0xf0 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x5f, .steppings = 0x0002, .driver_data = 0x3e },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x66, .steppings = 0x0008, .driver_data = 0x2a },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x6a, .steppings = 0x0020, .driver_data = 0xc0002f0 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x6a, .steppings = 0x0040, .driver_data = 0xd0003e7 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x6c, .steppings = 0x0002, .driver_data = 0x10002b0 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x7a, .steppings = 0x0002, .driver_data = 0x42 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x7a, .steppings = 0x0100, .driver_data = 0x24 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x7e, .steppings = 0x0020, .driver_data = 0xc6 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8a, .steppings = 0x0002, .driver_data = 0x33 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8c, .steppings = 0x0002, .driver_data = 0xb8 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8c, .steppings = 0x0004, .driver_data = 0x38 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8d, .steppings = 0x0002, .driver_data = 0x52 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8e, .steppings = 0x0200, .driver_data = 0xf6 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8e, .steppings = 0x0400, .driver_data = 0xf6 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8e, .steppings = 0x0800, .driver_data = 0xf6 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8e, .steppings = 0x1000, .driver_data = 0xfc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8f, .steppings = 0x0100, .driver_data = 0x2c000390 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8f, .steppings = 0x0080, .driver_data = 0x2b000603 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8f, .steppings = 0x0040, .driver_data = 0x2c000390 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8f, .steppings = 0x0020, .driver_data = 0x2c000390 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x8f, .steppings = 0x0010, .driver_data = 0x2c000390 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x96, .steppings = 0x0002, .driver_data = 0x1a },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x97, .steppings = 0x0004, .driver_data = 0x37 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x97, .steppings = 0x0020, .driver_data = 0x37 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xbf, .steppings = 0x0004, .driver_data = 0x37 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xbf, .steppings = 0x0020, .driver_data = 0x37 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9a, .steppings = 0x0008, .driver_data = 0x435 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9a, .steppings = 0x0010, .driver_data = 0x435 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9c, .steppings = 0x0001, .driver_data = 0x24000026 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9e, .steppings = 0x0200, .driver_data = 0xf8 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9e, .steppings = 0x0400, .driver_data = 0xf8 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9e, .steppings = 0x0800, .driver_data = 0xf6 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9e, .steppings = 0x1000, .driver_data = 0xf8 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0x9e, .steppings = 0x2000, .driver_data = 0x100 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xa5, .steppings = 0x0004, .driver_data = 0xfc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xa5, .steppings = 0x0008, .driver_data = 0xfc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xa5, .steppings = 0x0020, .driver_data = 0xfc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xa6, .steppings = 0x0001, .driver_data = 0xfe },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xa6, .steppings = 0x0002, .driver_data = 0xfc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xa7, .steppings = 0x0002, .driver_data = 0x62 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xaa, .steppings = 0x0010, .driver_data = 0x20 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xb7, .steppings = 0x0002, .driver_data = 0x12b },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xba, .steppings = 0x0004, .driver_data = 0x4123 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xba, .steppings = 0x0008, .driver_data = 0x4123 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xba, .steppings = 0x0100, .driver_data = 0x4123 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xbe, .steppings = 0x0001, .driver_data = 0x1a },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xcf, .steppings = 0x0004, .driver_data = 0x21000283 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6,  .model = 0xcf, .steppings = 0x0002, .driver_data = 0x21000283 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x00, .steppings = 0x0080, .driver_data = 0x12 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x00, .steppings = 0x0400, .driver_data = 0x15 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x01, .steppings = 0x0004, .driver_data = 0x2e },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x02, .steppings = 0x0010, .driver_data = 0x21 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x02, .steppings = 0x0020, .driver_data = 0x2c },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x02, .steppings = 0x0040, .driver_data = 0x10 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x02, .steppings = 0x0080, .driver_data = 0x39 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x02, .steppings = 0x0200, .driver_data = 0x2f },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x03, .steppings = 0x0004, .driver_data = 0xa },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x03, .steppings = 0x0008, .driver_data = 0xc },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x03, .steppings = 0x0010, .driver_data = 0x17 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x04, .steppings = 0x0002, .driver_data = 0x17 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x04, .steppings = 0x0008, .driver_data = 0x5 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x04, .steppings = 0x0010, .driver_data = 0x6 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x04, .steppings = 0x0080, .driver_data = 0x3 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x04, .steppings = 0x0100, .driver_data = 0xe },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x04, .steppings = 0x0200, .driver_data = 0x3 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x04, .steppings = 0x0400, .driver_data = 0x4 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x06, .steppings = 0x0004, .driver_data = 0xf },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x06, .steppings = 0x0010, .driver_data = 0x4 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x06, .steppings = 0x0020, .driver_data = 0x8 },</div><div class='add'>+{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf,  .model = 0x06, .steppings = 0x0100, .driver_data = 0x9 },</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c<br/>index 819199bc0119..371ca6eac00e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/intel.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/microcode/intel.c</a></div><div class='hunk'>@@ -320,7 +320,7 @@ static enum ucode_state __apply_microcode(struct ucode_cpu_info *uci,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* write microcode via MSR 0x79 */</div><div class='del'>-	native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc-&gt;bits);</div><div class='add'>+	native_wrmsrq(MSR_IA32_UCODE_WRITE, (unsigned long)mc-&gt;bits);</div><div class='ctx'> </div><div class='ctx'> 	rev = intel_get_microcode_revision();</div><div class='ctx'> 	if (rev != mc-&gt;hdr.rev)</div><div class='hunk'>@@ -389,7 +389,7 @@ static int __init save_builtin_microcode(void)</div><div class='ctx'> 	if (xchg(&amp;ucode_patch_va, NULL) != UCODE_BSP_LOADED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (dis_ucode_ldr || boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)</div><div class='add'>+	if (microcode_loader_disabled() || boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	uci.mc = get_microcode_blob(&amp;uci, true);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h<br/>index 5df621752fef..50a9702ae4e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/microcode/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/microcode/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/microcode/internal.h</a></div><div class='hunk'>@@ -94,7 +94,6 @@ static inline unsigned int x86_cpuid_family(void)</div><div class='ctx'> 	return x86_family(eax);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern bool dis_ucode_ldr;</div><div class='ctx'> extern bool force_minrev;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPU_SUP_AMD</div><div class='head'>diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c<br/>index 3e2533954675..c78f860419d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mshyperv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mshyperv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mshyperv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/mshyperv.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;asm/reboot.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;clocksource/hyperv_timer.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/numa.h&gt;</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -70,7 +71,7 @@ u64 hv_get_non_nested_msr(unsigned int reg)</div><div class='ctx'> 	if (hv_is_synic_msr(reg) &amp;&amp; ms_hyperv.paravisor_present)</div><div class='ctx'> 		hv_ivm_msr_read(reg, &amp;value);</div><div class='ctx'> 	else</div><div class='del'>-		rdmsrl(reg, value);</div><div class='add'>+		rdmsrq(reg, value);</div><div class='ctx'> 	return value;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hv_get_non_nested_msr);</div><div class='hunk'>@@ -82,9 +83,9 @@ void hv_set_non_nested_msr(unsigned int reg, u64 value)</div><div class='ctx'> </div><div class='ctx'> 		/* Write proxy bit via wrmsl instruction */</div><div class='ctx'> 		if (hv_is_sint_msr(reg))</div><div class='del'>-			wrmsrl(reg, value | 1 &lt;&lt; 20);</div><div class='add'>+			wrmsrq(reg, value | 1 &lt;&lt; 20);</div><div class='ctx'> 	} else {</div><div class='del'>-		wrmsrl(reg, value);</div><div class='add'>+		wrmsrq(reg, value);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hv_set_non_nested_msr);</div><div class='hunk'>@@ -345,7 +346,7 @@ static unsigned long hv_get_tsc_khz(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long freq;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);</div><div class='add'>+	rdmsrq(HV_X64_MSR_TSC_FREQUENCY, freq);</div><div class='ctx'> </div><div class='ctx'> 	return freq / 1000;</div><div class='ctx'> }</div><div class='hunk'>@@ -541,7 +542,7 @@ static void __init ms_hyperv_init_platform(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		u64	hv_lapic_frequency;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);</div><div class='add'>+		rdmsrq(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);</div><div class='ctx'> 		hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);</div><div class='ctx'> 		lapic_timer_period = hv_lapic_frequency;</div><div class='ctx'> 		pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",</div><div class='hunk'>@@ -574,7 +575,7 @@ static void __init ms_hyperv_init_platform(void)</div><div class='ctx'> 		 * setting of this MSR bit should happen before init_intel()</div><div class='ctx'> 		 * is called.</div><div class='ctx'> 		 */</div><div class='del'>-		wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC);</div><div class='add'>+		wrmsrq(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC);</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c<br/>index e2c6b471d230..8c18327eb10b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mtrr/generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/mtrr/generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/mtrr/generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/mtrr/generic.c</a></div><div class='hunk'>@@ -593,7 +593,7 @@ static void get_fixed_ranges(mtrr_type *frs)</div><div class='ctx'> </div><div class='ctx'> void mtrr_save_fixed_ranges(void *info)</div><div class='ctx'> {</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_MTRR))</div><div class='add'>+	if (mtrr_state.have_fixed)</div><div class='ctx'> 		get_fixed_ranges(mtrr_state.fixed_ranges);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/Makefile b/arch/x86/kernel/cpu/resctrl/Makefile<br/>index 0c13b0befd8a..d8a04b195da2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/Makefile</a></div><div class='hunk'>@@ -2,4 +2,6 @@</div><div class='ctx'> obj-$(CONFIG_X86_CPU_RESCTRL)		+= core.o rdtgroup.o monitor.o</div><div class='ctx'> obj-$(CONFIG_X86_CPU_RESCTRL)		+= ctrlmondata.o</div><div class='ctx'> obj-$(CONFIG_RESCTRL_FS_PSEUDO_LOCK)	+= pseudo_lock.o</div><div class='add'>+</div><div class='add'>+# To allow define_trace.h's recursive include:</div><div class='ctx'> CFLAGS_pseudo_lock.o = -I$(src)</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c<br/>index cf29681d01e0..7109cbfcad4f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/core.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/cpuhotplug.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/resctrl.h&gt;</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +61,6 @@ struct rdt_hw_resource rdt_resources_all[RDT_NUM_RESOURCES] = {</div><div class='ctx'> 	[RDT_RESOURCE_L3] =</div><div class='ctx'> 	{</div><div class='ctx'> 		.r_resctrl = {</div><div class='del'>-			.rid			= RDT_RESOURCE_L3,</div><div class='ctx'> 			.name			= "L3",</div><div class='ctx'> 			.ctrl_scope		= RESCTRL_L3_CACHE,</div><div class='ctx'> 			.mon_scope		= RESCTRL_L3_CACHE,</div><div class='hunk'>@@ -74,7 +74,6 @@ struct rdt_hw_resource rdt_resources_all[RDT_NUM_RESOURCES] = {</div><div class='ctx'> 	[RDT_RESOURCE_L2] =</div><div class='ctx'> 	{</div><div class='ctx'> 		.r_resctrl = {</div><div class='del'>-			.rid			= RDT_RESOURCE_L2,</div><div class='ctx'> 			.name			= "L2",</div><div class='ctx'> 			.ctrl_scope		= RESCTRL_L2_CACHE,</div><div class='ctx'> 			.ctrl_domains		= ctrl_domain_init(RDT_RESOURCE_L2),</div><div class='hunk'>@@ -86,7 +85,6 @@ struct rdt_hw_resource rdt_resources_all[RDT_NUM_RESOURCES] = {</div><div class='ctx'> 	[RDT_RESOURCE_MBA] =</div><div class='ctx'> 	{</div><div class='ctx'> 		.r_resctrl = {</div><div class='del'>-			.rid			= RDT_RESOURCE_MBA,</div><div class='ctx'> 			.name			= "MB",</div><div class='ctx'> 			.ctrl_scope		= RESCTRL_L3_CACHE,</div><div class='ctx'> 			.ctrl_domains		= ctrl_domain_init(RDT_RESOURCE_MBA),</div><div class='hunk'>@@ -96,7 +94,6 @@ struct rdt_hw_resource rdt_resources_all[RDT_NUM_RESOURCES] = {</div><div class='ctx'> 	[RDT_RESOURCE_SMBA] =</div><div class='ctx'> 	{</div><div class='ctx'> 		.r_resctrl = {</div><div class='del'>-			.rid			= RDT_RESOURCE_SMBA,</div><div class='ctx'> 			.name			= "SMBA",</div><div class='ctx'> 			.ctrl_scope		= RESCTRL_L3_CACHE,</div><div class='ctx'> 			.ctrl_domains		= ctrl_domain_init(RDT_RESOURCE_SMBA),</div><div class='hunk'>@@ -145,10 +142,10 @@ static inline void cache_alloc_hsw_probe(void)</div><div class='ctx'> 	struct rdt_resource *r  = &amp;hw_res-&gt;r_resctrl;</div><div class='ctx'> 	u64 max_cbm = BIT_ULL_MASK(20) - 1, l3_cbm_0;</div><div class='ctx'> </div><div class='del'>-	if (wrmsrl_safe(MSR_IA32_L3_CBM_BASE, max_cbm))</div><div class='add'>+	if (wrmsrq_safe(MSR_IA32_L3_CBM_BASE, max_cbm))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0);</div><div class='add'>+	rdmsrq(MSR_IA32_L3_CBM_BASE, l3_cbm_0);</div><div class='ctx'> </div><div class='ctx'> 	/* If all the bits were set in MSR, return success */</div><div class='ctx'> 	if (l3_cbm_0 != max_cbm)</div><div class='hunk'>@@ -164,21 +161,6 @@ static inline void cache_alloc_hsw_probe(void)</div><div class='ctx'> 	rdt_alloc_capable = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool is_mba_sc(struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	if (!r)</div><div class='del'>-		r = resctrl_arch_get_resource(RDT_RESOURCE_MBA);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The software controller support is only applicable to MBA resource.</div><div class='del'>-	 * Make sure to check for resource type.</div><div class='del'>-	 */</div><div class='del'>-	if (r-&gt;rid != RDT_RESOURCE_MBA)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return r-&gt;membw.mba_sc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * rdt_get_mb_table() - get a mapping of bandwidth(b/w) percentage values</div><div class='ctx'>  * exposed to user interface and the h/w understandable delay values.</div><div class='hunk'>@@ -309,7 +291,7 @@ static void mba_wrmsr_amd(struct msr_param *m)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = m-&gt;low; i &lt; m-&gt;high; i++)</div><div class='del'>-		wrmsrl(hw_res-&gt;msr_base + i, hw_dom-&gt;ctrl_val[i]);</div><div class='add'>+		wrmsrq(hw_res-&gt;msr_base + i, hw_dom-&gt;ctrl_val[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -334,7 +316,7 @@ static void mba_wrmsr_intel(struct msr_param *m)</div><div class='ctx'> </div><div class='ctx'> 	/*  Write the delay values for mba. */</div><div class='ctx'> 	for (i = m-&gt;low; i &lt; m-&gt;high; i++)</div><div class='del'>-		wrmsrl(hw_res-&gt;msr_base + i, delay_bw_map(hw_dom-&gt;ctrl_val[i], m-&gt;res));</div><div class='add'>+		wrmsrq(hw_res-&gt;msr_base + i, delay_bw_map(hw_dom-&gt;ctrl_val[i], m-&gt;res));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cat_wrmsr(struct msr_param *m)</div><div class='hunk'>@@ -344,7 +326,7 @@ static void cat_wrmsr(struct msr_param *m)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = m-&gt;low; i &lt; m-&gt;high; i++)</div><div class='del'>-		wrmsrl(hw_res-&gt;msr_base + i, hw_dom-&gt;ctrl_val[i]);</div><div class='add'>+		wrmsrq(hw_res-&gt;msr_base + i, hw_dom-&gt;ctrl_val[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u32 resctrl_arch_get_num_closid(struct rdt_resource *r)</div><div class='hunk'>@@ -737,7 +719,7 @@ struct rdt_options {</div><div class='ctx'> 	bool	force_off, force_on;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct rdt_options rdt_options[]  __initdata = {</div><div class='add'>+static struct rdt_options rdt_options[]  __ro_after_init = {</div><div class='ctx'> 	RDT_OPT(RDT_FLAG_CMT,	    "cmt",	X86_FEATURE_CQM_OCCUP_LLC),</div><div class='ctx'> 	RDT_OPT(RDT_FLAG_MBM_TOTAL, "mbmtotal", X86_FEATURE_CQM_MBM_TOTAL),</div><div class='ctx'> 	RDT_OPT(RDT_FLAG_MBM_LOCAL, "mbmlocal", X86_FEATURE_CQM_MBM_LOCAL),</div><div class='hunk'>@@ -777,7 +759,7 @@ static int __init set_rdt_options(char *str)</div><div class='ctx'> }</div><div class='ctx'> __setup("rdt", set_rdt_options);</div><div class='ctx'> </div><div class='del'>-bool __init rdt_cpu_has(int flag)</div><div class='add'>+bool rdt_cpu_has(int flag)</div><div class='ctx'> {</div><div class='ctx'> 	bool ret = boot_cpu_has(flag);</div><div class='ctx'> 	struct rdt_options *o;</div><div class='hunk'>@@ -797,7 +779,7 @@ bool __init rdt_cpu_has(int flag)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-__init bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt)</div><div class='add'>+bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt)</div><div class='ctx'> {</div><div class='ctx'> 	if (!rdt_cpu_has(X86_FEATURE_BMEC))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1011,7 +993,11 @@ void resctrl_cpu_detect(struct cpuinfo_x86 *c)</div><div class='ctx'> static int __init resctrl_arch_late_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct rdt_resource *r;</div><div class='del'>-	int state, ret;</div><div class='add'>+	int state, ret, i;</div><div class='add'>+</div><div class='add'>+	/* for_each_rdt_resource() requires all rid to be initialised. */</div><div class='add'>+	for (i = 0; i &lt; RDT_NUM_RESOURCES; i++)</div><div class='add'>+		rdt_resources_all[i].r_resctrl.rid = i;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize functions(or definitions) that are different</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c<br/>index 0a0ac5f6112e..1189c0df4ad7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/ctrlmondata.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/ctrlmondata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/ctrlmondata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/ctrlmondata.c</a></div><div class='hunk'>@@ -16,277 +16,9 @@</div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='del'>-#include &lt;linux/kernfs.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/tick.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='del'>-struct rdt_parse_data {</div><div class='del'>-	struct rdtgroup		*rdtgrp;</div><div class='del'>-	char			*buf;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-typedef int (ctrlval_parser_t)(struct rdt_parse_data *data,</div><div class='del'>-			       struct resctrl_schema *s,</div><div class='del'>-			       struct rdt_ctrl_domain *d);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check whether MBA bandwidth percentage value is correct. The value is</div><div class='del'>- * checked against the minimum and max bandwidth values specified by the</div><div class='del'>- * hardware. The allocated bandwidth percentage is rounded to the next</div><div class='del'>- * control step available on the hardware.</div><div class='del'>- */</div><div class='del'>-static bool bw_validate(char *buf, u32 *data, struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	u32 bw;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Only linear delay values is supported for current Intel SKUs.</div><div class='del'>-	 */</div><div class='del'>-	if (!r-&gt;membw.delay_linear &amp;&amp; r-&gt;membw.arch_needs_linear) {</div><div class='del'>-		rdt_last_cmd_puts("No support for non-linear MB domains\n");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = kstrtou32(buf, 10, &amp;bw);</div><div class='del'>-	if (ret) {</div><div class='del'>-		rdt_last_cmd_printf("Invalid MB value %s\n", buf);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Nothing else to do if software controller is enabled. */</div><div class='del'>-	if (is_mba_sc(r)) {</div><div class='del'>-		*data = bw;</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bw &lt; r-&gt;membw.min_bw || bw &gt; r-&gt;membw.max_bw) {</div><div class='del'>-		rdt_last_cmd_printf("MB value %u out of range [%d,%d]\n",</div><div class='del'>-				    bw, r-&gt;membw.min_bw, r-&gt;membw.max_bw);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*data = roundup(bw, (unsigned long)r-&gt;membw.bw_gran);</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int parse_bw(struct rdt_parse_data *data, struct resctrl_schema *s,</div><div class='del'>-		    struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_staged_config *cfg;</div><div class='del'>-	u32 closid = data-&gt;rdtgrp-&gt;closid;</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-	u32 bw_val;</div><div class='del'>-</div><div class='del'>-	cfg = &amp;d-&gt;staged_config[s-&gt;conf_type];</div><div class='del'>-	if (cfg-&gt;have_new_ctrl) {</div><div class='del'>-		rdt_last_cmd_printf("Duplicate domain %d\n", d-&gt;hdr.id);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!bw_validate(data-&gt;buf, &amp;bw_val, r))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (is_mba_sc(r)) {</div><div class='del'>-		d-&gt;mbps_val[closid] = bw_val;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cfg-&gt;new_ctrl = bw_val;</div><div class='del'>-	cfg-&gt;have_new_ctrl = true;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check whether a cache bit mask is valid.</div><div class='del'>- * On Intel CPUs, non-contiguous 1s value support is indicated by CPUID:</div><div class='del'>- *   - CPUID.0x10.1:ECX[3]: L3 non-contiguous 1s value supported if 1</div><div class='del'>- *   - CPUID.0x10.2:ECX[3]: L2 non-contiguous 1s value supported if 1</div><div class='del'>- *</div><div class='del'>- * Haswell does not support a non-contiguous 1s value and additionally</div><div class='del'>- * requires at least two bits set.</div><div class='del'>- * AMD allows non-contiguous bitmasks.</div><div class='del'>- */</div><div class='del'>-static bool cbm_validate(char *buf, u32 *data, struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	u32 supported_bits = BIT_MASK(r-&gt;cache.cbm_len) - 1;</div><div class='del'>-	unsigned int cbm_len = r-&gt;cache.cbm_len;</div><div class='del'>-	unsigned long first_bit, zero_bit, val;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = kstrtoul(buf, 16, &amp;val);</div><div class='del'>-	if (ret) {</div><div class='del'>-		rdt_last_cmd_printf("Non-hex character in the mask %s\n", buf);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((r-&gt;cache.min_cbm_bits &gt; 0 &amp;&amp; val == 0) || val &gt; supported_bits) {</div><div class='del'>-		rdt_last_cmd_puts("Mask out of range\n");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	first_bit = find_first_bit(&amp;val, cbm_len);</div><div class='del'>-	zero_bit = find_next_zero_bit(&amp;val, cbm_len, first_bit);</div><div class='del'>-</div><div class='del'>-	/* Are non-contiguous bitmasks allowed? */</div><div class='del'>-	if (!r-&gt;cache.arch_has_sparse_bitmasks &amp;&amp;</div><div class='del'>-	    (find_next_bit(&amp;val, cbm_len, zero_bit) &lt; cbm_len)) {</div><div class='del'>-		rdt_last_cmd_printf("The mask %lx has non-consecutive 1-bits\n", val);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((zero_bit - first_bit) &lt; r-&gt;cache.min_cbm_bits) {</div><div class='del'>-		rdt_last_cmd_printf("Need at least %d bits in the mask\n",</div><div class='del'>-				    r-&gt;cache.min_cbm_bits);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*data = val;</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Read one cache bit mask (hex). Check that it is valid for the current</div><div class='del'>- * resource type.</div><div class='del'>- */</div><div class='del'>-static int parse_cbm(struct rdt_parse_data *data, struct resctrl_schema *s,</div><div class='del'>-		     struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp = data-&gt;rdtgrp;</div><div class='del'>-	struct resctrl_staged_config *cfg;</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-	u32 cbm_val;</div><div class='del'>-</div><div class='del'>-	cfg = &amp;d-&gt;staged_config[s-&gt;conf_type];</div><div class='del'>-	if (cfg-&gt;have_new_ctrl) {</div><div class='del'>-		rdt_last_cmd_printf("Duplicate domain %d\n", d-&gt;hdr.id);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Cannot set up more than one pseudo-locked region in a cache</div><div class='del'>-	 * hierarchy.</div><div class='del'>-	 */</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP &amp;&amp;</div><div class='del'>-	    rdtgroup_pseudo_locked_in_hierarchy(d)) {</div><div class='del'>-		rdt_last_cmd_puts("Pseudo-locked region in hierarchy\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!cbm_validate(data-&gt;buf, &amp;cbm_val, r))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if ((rdtgrp-&gt;mode == RDT_MODE_EXCLUSIVE ||</div><div class='del'>-	     rdtgrp-&gt;mode == RDT_MODE_SHAREABLE) &amp;&amp;</div><div class='del'>-	    rdtgroup_cbm_overlaps_pseudo_locked(d, cbm_val)) {</div><div class='del'>-		rdt_last_cmd_puts("CBM overlaps with pseudo-locked region\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The CBM may not overlap with the CBM of another closid if</div><div class='del'>-	 * either is exclusive.</div><div class='del'>-	 */</div><div class='del'>-	if (rdtgroup_cbm_overlaps(s, d, cbm_val, rdtgrp-&gt;closid, true)) {</div><div class='del'>-		rdt_last_cmd_puts("Overlaps with exclusive group\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgroup_cbm_overlaps(s, d, cbm_val, rdtgrp-&gt;closid, false)) {</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_EXCLUSIVE ||</div><div class='del'>-		    rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-			rdt_last_cmd_puts("Overlaps with other group\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cfg-&gt;new_ctrl = cbm_val;</div><div class='del'>-	cfg-&gt;have_new_ctrl = true;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * For each domain in this resource we expect to find a series of:</div><div class='del'>- *	id=mask</div><div class='del'>- * separated by ";". The "id" is in decimal, and must match one of</div><div class='del'>- * the "id"s for this resource.</div><div class='del'>- */</div><div class='del'>-static int parse_line(char *line, struct resctrl_schema *s,</div><div class='del'>-		      struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	enum resctrl_conf_type t = s-&gt;conf_type;</div><div class='del'>-	ctrlval_parser_t *parse_ctrlval = NULL;</div><div class='del'>-	struct resctrl_staged_config *cfg;</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-	struct rdt_parse_data data;</div><div class='del'>-	struct rdt_ctrl_domain *d;</div><div class='del'>-	char *dom = NULL, *id;</div><div class='del'>-	unsigned long dom_id;</div><div class='del'>-</div><div class='del'>-	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	switch (r-&gt;schema_fmt) {</div><div class='del'>-	case RESCTRL_SCHEMA_BITMAP:</div><div class='del'>-		parse_ctrlval = &amp;parse_cbm;</div><div class='del'>-		break;</div><div class='del'>-	case RESCTRL_SCHEMA_RANGE:</div><div class='del'>-		parse_ctrlval = &amp;parse_bw;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (WARN_ON_ONCE(!parse_ctrlval))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP &amp;&amp;</div><div class='del'>-	    (r-&gt;rid == RDT_RESOURCE_MBA || r-&gt;rid == RDT_RESOURCE_SMBA)) {</div><div class='del'>-		rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-next:</div><div class='del'>-	if (!line || line[0] == '\0')</div><div class='del'>-		return 0;</div><div class='del'>-	dom = strsep(&amp;line, ";");</div><div class='del'>-	id = strsep(&amp;dom, "=");</div><div class='del'>-	if (!dom || kstrtoul(id, 10, &amp;dom_id)) {</div><div class='del'>-		rdt_last_cmd_puts("Missing '=' or non-numeric domain\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	dom = strim(dom);</div><div class='del'>-	list_for_each_entry(d, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-		if (d-&gt;hdr.id == dom_id) {</div><div class='del'>-			data.buf = dom;</div><div class='del'>-			data.rdtgrp = rdtgrp;</div><div class='del'>-			if (parse_ctrlval(&amp;data, s, d))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-			if (rdtgrp-&gt;mode ==  RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-				cfg = &amp;d-&gt;staged_config[t];</div><div class='del'>-				/*</div><div class='del'>-				 * In pseudo-locking setup mode and just</div><div class='del'>-				 * parsed a valid CBM that should be</div><div class='del'>-				 * pseudo-locked. Only one locked region per</div><div class='del'>-				 * resource group and domain so just do</div><div class='del'>-				 * the required initialization for single</div><div class='del'>-				 * region and return.</div><div class='del'>-				 */</div><div class='del'>-				rdtgrp-&gt;plr-&gt;s = s;</div><div class='del'>-				rdtgrp-&gt;plr-&gt;d = d;</div><div class='del'>-				rdtgrp-&gt;plr-&gt;cbm = cfg-&gt;new_ctrl;</div><div class='del'>-				d-&gt;plr = rdtgrp-&gt;plr;</div><div class='del'>-				return 0;</div><div class='del'>-			}</div><div class='del'>-			goto next;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d,</div><div class='ctx'> 			    u32 closid, enum resctrl_conf_type t, u32 cfg_val)</div><div class='ctx'> {</div><div class='hunk'>@@ -351,100 +83,6 @@ int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rdtgroup_parse_resource(char *resname, char *tok,</div><div class='del'>-				   struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(s, &amp;resctrl_schema_all, list) {</div><div class='del'>-		if (!strcmp(resname, s-&gt;name) &amp;&amp; rdtgrp-&gt;closid &lt; s-&gt;num_closid)</div><div class='del'>-			return parse_line(tok, s, rdtgrp);</div><div class='del'>-	}</div><div class='del'>-	rdt_last_cmd_printf("Unknown or unsupported resource name '%s'\n", resname);</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-ssize_t rdtgroup_schemata_write(struct kernfs_open_file *of,</div><div class='del'>-				char *buf, size_t nbytes, loff_t off)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	char *tok, *resname;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	/* Valid input requires a trailing newline */</div><div class='del'>-	if (nbytes == 0 || buf[nbytes - 1] != '\n')</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	buf[nbytes - 1] = '\0';</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * No changes to pseudo-locked region allowed. It has to be removed</div><div class='del'>-	 * and re-created instead.</div><div class='del'>-	 */</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		rdt_last_cmd_puts("Resource group is pseudo-locked\n");</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rdt_staged_configs_clear();</div><div class='del'>-</div><div class='del'>-	while ((tok = strsep(&amp;buf, "\n")) != NULL) {</div><div class='del'>-		resname = strim(strsep(&amp;tok, ":"));</div><div class='del'>-		if (!tok) {</div><div class='del'>-			rdt_last_cmd_puts("Missing ':'\n");</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		if (tok[0] == '\0') {</div><div class='del'>-			rdt_last_cmd_printf("Missing '%s' value\n", resname);</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		ret = rdtgroup_parse_resource(resname, tok, rdtgrp);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(s, &amp;resctrl_schema_all, list) {</div><div class='del'>-		r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Writes to mba_sc resources update the software controller,</div><div class='del'>-		 * not the control MSR.</div><div class='del'>-		 */</div><div class='del'>-		if (is_mba_sc(r))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		ret = resctrl_arch_update_domains(r, rdtgrp-&gt;closid);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-		/*</div><div class='del'>-		 * If pseudo-locking fails we keep the resource group in</div><div class='del'>-		 * mode RDT_MODE_PSEUDO_LOCKSETUP with its class of service</div><div class='del'>-		 * active and updated for just the domain the pseudo-locked</div><div class='del'>-		 * region was requested for.</div><div class='del'>-		 */</div><div class='del'>-		ret = rdtgroup_pseudo_lock_create(rdtgrp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	rdt_staged_configs_clear();</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-	return ret ?: nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d,</div><div class='ctx'> 			    u32 closid, enum resctrl_conf_type type)</div><div class='ctx'> {</div><div class='hunk'>@@ -453,276 +91,3 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d,</div><div class='ctx'> </div><div class='ctx'> 	return hw_dom-&gt;ctrl_val[idx];</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static void show_doms(struct seq_file *s, struct resctrl_schema *schema, int closid)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = schema-&gt;res;</div><div class='del'>-	struct rdt_ctrl_domain *dom;</div><div class='del'>-	bool sep = false;</div><div class='del'>-	u32 ctrl_val;</div><div class='del'>-</div><div class='del'>-	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "%*s:", max_name_width, schema-&gt;name);</div><div class='del'>-	list_for_each_entry(dom, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-		if (sep)</div><div class='del'>-			seq_puts(s, ";");</div><div class='del'>-</div><div class='del'>-		if (is_mba_sc(r))</div><div class='del'>-			ctrl_val = dom-&gt;mbps_val[closid];</div><div class='del'>-		else</div><div class='del'>-			ctrl_val = resctrl_arch_get_config(r, dom, closid,</div><div class='del'>-							   schema-&gt;conf_type);</div><div class='del'>-</div><div class='del'>-		seq_printf(s, schema-&gt;fmt_str, dom-&gt;hdr.id, ctrl_val);</div><div class='del'>-		sep = true;</div><div class='del'>-	}</div><div class='del'>-	seq_puts(s, "\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int rdtgroup_schemata_show(struct kernfs_open_file *of,</div><div class='del'>-			   struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *schema;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	u32 closid;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (rdtgrp) {</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-			list_for_each_entry(schema, &amp;resctrl_schema_all, list) {</div><div class='del'>-				seq_printf(s, "%s:uninitialized\n", schema-&gt;name);</div><div class='del'>-			}</div><div class='del'>-		} else if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED) {</div><div class='del'>-			if (!rdtgrp-&gt;plr-&gt;d) {</div><div class='del'>-				rdt_last_cmd_clear();</div><div class='del'>-				rdt_last_cmd_puts("Cache domain offline\n");</div><div class='del'>-				ret = -ENODEV;</div><div class='del'>-			} else {</div><div class='del'>-				seq_printf(s, "%s:%d=%x\n",</div><div class='del'>-					   rdtgrp-&gt;plr-&gt;s-&gt;res-&gt;name,</div><div class='del'>-					   rdtgrp-&gt;plr-&gt;d-&gt;hdr.id,</div><div class='del'>-					   rdtgrp-&gt;plr-&gt;cbm);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			closid = rdtgrp-&gt;closid;</div><div class='del'>-			list_for_each_entry(schema, &amp;resctrl_schema_all, list) {</div><div class='del'>-				if (closid &lt; schema-&gt;num_closid)</div><div class='del'>-					show_doms(s, schema, closid);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-	}</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int smp_mon_event_count(void *arg)</div><div class='del'>-{</div><div class='del'>-	mon_event_count(arg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-ssize_t rdtgroup_mba_mbps_event_write(struct kernfs_open_file *of,</div><div class='del'>-				      char *buf, size_t nbytes, loff_t off)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	/* Valid input requires a trailing newline */</div><div class='del'>-	if (nbytes == 0 || buf[nbytes - 1] != '\n')</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	buf[nbytes - 1] = '\0';</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-</div><div class='del'>-	if (!strcmp(buf, "mbm_local_bytes")) {</div><div class='del'>-		if (resctrl_arch_is_mbm_local_enabled())</div><div class='del'>-			rdtgrp-&gt;mba_mbps_event = QOS_L3_MBM_LOCAL_EVENT_ID;</div><div class='del'>-		else</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-	} else if (!strcmp(buf, "mbm_total_bytes")) {</div><div class='del'>-		if (resctrl_arch_is_mbm_total_enabled())</div><div class='del'>-			rdtgrp-&gt;mba_mbps_event = QOS_L3_MBM_TOTAL_EVENT_ID;</div><div class='del'>-		else</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-	} else {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		rdt_last_cmd_printf("Unsupported event id '%s'\n", buf);</div><div class='del'>-</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return ret ?: nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int rdtgroup_mba_mbps_event_show(struct kernfs_open_file *of,</div><div class='del'>-				 struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	if (rdtgrp) {</div><div class='del'>-		switch (rdtgrp-&gt;mba_mbps_event) {</div><div class='del'>-		case QOS_L3_MBM_LOCAL_EVENT_ID:</div><div class='del'>-			seq_puts(s, "mbm_local_bytes\n");</div><div class='del'>-			break;</div><div class='del'>-		case QOS_L3_MBM_TOTAL_EVENT_ID:</div><div class='del'>-			seq_puts(s, "mbm_total_bytes\n");</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			pr_warn_once("Bad event %d\n", rdtgrp-&gt;mba_mbps_event);</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct rdt_domain_hdr *resctrl_find_domain(struct list_head *h, int id,</div><div class='del'>-					   struct list_head **pos)</div><div class='del'>-{</div><div class='del'>-	struct rdt_domain_hdr *d;</div><div class='del'>-	struct list_head *l;</div><div class='del'>-</div><div class='del'>-	list_for_each(l, h) {</div><div class='del'>-		d = list_entry(l, struct rdt_domain_hdr, list);</div><div class='del'>-		/* When id is found, return its domain. */</div><div class='del'>-		if (id == d-&gt;id)</div><div class='del'>-			return d;</div><div class='del'>-		/* Stop searching when finding id's position in sorted list. */</div><div class='del'>-		if (id &lt; d-&gt;id)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pos)</div><div class='del'>-		*pos = l;</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void mon_event_read(struct rmid_read *rr, struct rdt_resource *r,</div><div class='del'>-		    struct rdt_mon_domain *d, struct rdtgroup *rdtgrp,</div><div class='del'>-		    cpumask_t *cpumask, int evtid, int first)</div><div class='del'>-{</div><div class='del'>-	int cpu;</div><div class='del'>-</div><div class='del'>-	/* When picking a CPU from cpu_mask, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Setup the parameters to pass to mon_event_count() to read the data.</div><div class='del'>-	 */</div><div class='del'>-	rr-&gt;rgrp = rdtgrp;</div><div class='del'>-	rr-&gt;evtid = evtid;</div><div class='del'>-	rr-&gt;r = r;</div><div class='del'>-	rr-&gt;d = d;</div><div class='del'>-	rr-&gt;first = first;</div><div class='del'>-	rr-&gt;arch_mon_ctx = resctrl_arch_mon_ctx_alloc(r, evtid);</div><div class='del'>-	if (IS_ERR(rr-&gt;arch_mon_ctx)) {</div><div class='del'>-		rr-&gt;err = -EINVAL;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cpu = cpumask_any_housekeeping(cpumask, RESCTRL_PICK_ANY_CPU);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * cpumask_any_housekeeping() prefers housekeeping CPUs, but</div><div class='del'>-	 * are all the CPUs nohz_full? If yes, pick a CPU to IPI.</div><div class='del'>-	 * MPAM's resctrl_arch_rmid_read() is unable to read the</div><div class='del'>-	 * counters on some platforms if its called in IRQ context.</div><div class='del'>-	 */</div><div class='del'>-	if (tick_nohz_full_cpu(cpu))</div><div class='del'>-		smp_call_function_any(cpumask, mon_event_count, rr, 1);</div><div class='del'>-	else</div><div class='del'>-		smp_call_on_cpu(cpu, smp_mon_event_count, rr, false);</div><div class='del'>-</div><div class='del'>-	resctrl_arch_mon_ctx_free(r, evtid, rr-&gt;arch_mon_ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int rdtgroup_mondata_show(struct seq_file *m, void *arg)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_open_file *of = m-&gt;private;</div><div class='del'>-	struct rdt_domain_hdr *hdr;</div><div class='del'>-	struct rmid_read rr = {0};</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-	u32 resid, evtid, domid;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	union mon_data_bits md;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	md.priv = of-&gt;kn-&gt;priv;</div><div class='del'>-	resid = md.u.rid;</div><div class='del'>-	domid = md.u.domid;</div><div class='del'>-	evtid = md.u.evtid;</div><div class='del'>-	r = resctrl_arch_get_resource(resid);</div><div class='del'>-</div><div class='del'>-	if (md.u.sum) {</div><div class='del'>-		/*</div><div class='del'>-		 * This file requires summing across all domains that share</div><div class='del'>-		 * the L3 cache id that was provided in the "domid" field of the</div><div class='del'>-		 * mon_data_bits union. Search all domains in the resource for</div><div class='del'>-		 * one that matches this cache id.</div><div class='del'>-		 */</div><div class='del'>-		list_for_each_entry(d, &amp;r-&gt;mon_domains, hdr.list) {</div><div class='del'>-			if (d-&gt;ci-&gt;id == domid) {</div><div class='del'>-				rr.ci = d-&gt;ci;</div><div class='del'>-				mon_event_read(&amp;rr, r, NULL, rdtgrp,</div><div class='del'>-					       &amp;d-&gt;ci-&gt;shared_cpu_map, evtid, false);</div><div class='del'>-				goto checkresult;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto out;</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * This file provides data from a single domain. Search</div><div class='del'>-		 * the resource to find the domain with "domid".</div><div class='del'>-		 */</div><div class='del'>-		hdr = resctrl_find_domain(&amp;r-&gt;mon_domains, domid, NULL);</div><div class='del'>-		if (!hdr || WARN_ON_ONCE(hdr-&gt;type != RESCTRL_MON_DOMAIN)) {</div><div class='del'>-			ret = -ENOENT;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		d = container_of(hdr, struct rdt_mon_domain, hdr);</div><div class='del'>-		mon_event_read(&amp;rr, r, d, rdtgrp, &amp;d-&gt;hdr.cpu_mask, evtid, false);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-checkresult:</div><div class='del'>-</div><div class='del'>-	if (rr.err == -EIO)</div><div class='del'>-		seq_puts(m, "Error\n");</div><div class='del'>-	else if (rr.err == -EINVAL)</div><div class='del'>-		seq_puts(m, "Unavailable\n");</div><div class='del'>-	else</div><div class='del'>-		seq_printf(m, "%llu\n", rr.val);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h<br/>index eaae99602b61..5e3c41b36437 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/internal.h</a></div><div class='hunk'>@@ -3,28 +3,21 @@</div><div class='ctx'> #define _ASM_X86_RESCTRL_INTERNAL_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/resctrl.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/kernfs.h&gt;</div><div class='del'>-#include &lt;linux/fs_context.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/tick.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/resctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define L3_QOS_CDP_ENABLE		0x01ULL</div><div class='ctx'> </div><div class='ctx'> #define L2_QOS_CDP_ENABLE		0x01ULL</div><div class='ctx'> </div><div class='del'>-#define CQM_LIMBOCHECK_INTERVAL	1000</div><div class='del'>-</div><div class='ctx'> #define MBM_CNTR_WIDTH_BASE		24</div><div class='del'>-#define MBM_OVERFLOW_INTERVAL		1000</div><div class='del'>-#define MAX_MBA_BW			100u</div><div class='add'>+</div><div class='ctx'> #define MBA_IS_LINEAR			0x4</div><div class='add'>+</div><div class='ctx'> #define MBM_CNTR_WIDTH_OFFSET_AMD	20</div><div class='ctx'> </div><div class='ctx'> #define RMID_VAL_ERROR			BIT_ULL(63)</div><div class='add'>+</div><div class='ctx'> #define RMID_VAL_UNAVAIL		BIT_ULL(62)</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * With the above fields in use 62 bits remain in MSR_IA32_QM_CTR for</div><div class='ctx'>  * data to be returned. The counter width is discovered from the hardware</div><div class='hunk'>@@ -33,278 +26,6 @@</div><div class='ctx'> #define MBM_CNTR_WIDTH_OFFSET_MAX (62 - MBM_CNTR_WIDTH_BASE)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * cpumask_any_housekeeping() - Choose any CPU in @mask, preferring those that</div><div class='del'>- *			        aren't marked nohz_full</div><div class='del'>- * @mask:	The mask to pick a CPU from.</div><div class='del'>- * @exclude_cpu:The CPU to avoid picking.</div><div class='del'>- *</div><div class='del'>- * Returns a CPU from @mask, but not @exclude_cpu. If there are housekeeping</div><div class='del'>- * CPUs that don't use nohz_full, these are preferred. Pass</div><div class='del'>- * RESCTRL_PICK_ANY_CPU to avoid excluding any CPUs.</div><div class='del'>- *</div><div class='del'>- * When a CPU is excluded, returns &gt;= nr_cpu_ids if no CPUs are available.</div><div class='del'>- */</div><div class='del'>-static inline unsigned int</div><div class='del'>-cpumask_any_housekeeping(const struct cpumask *mask, int exclude_cpu)</div><div class='del'>-{</div><div class='del'>-	unsigned int cpu, hk_cpu;</div><div class='del'>-</div><div class='del'>-	if (exclude_cpu == RESCTRL_PICK_ANY_CPU)</div><div class='del'>-		cpu = cpumask_any(mask);</div><div class='del'>-	else</div><div class='del'>-		cpu = cpumask_any_but(mask, exclude_cpu);</div><div class='del'>-</div><div class='del'>-	/* Only continue if tick_nohz_full_mask has been initialized. */</div><div class='del'>-	if (!tick_nohz_full_enabled())</div><div class='del'>-		return cpu;</div><div class='del'>-</div><div class='del'>-	/* If the CPU picked isn't marked nohz_full nothing more needs doing. */</div><div class='del'>-	if (cpu &lt; nr_cpu_ids &amp;&amp; !tick_nohz_full_cpu(cpu))</div><div class='del'>-		return cpu;</div><div class='del'>-</div><div class='del'>-	/* Try to find a CPU that isn't nohz_full to use in preference */</div><div class='del'>-	hk_cpu = cpumask_nth_andnot(0, mask, tick_nohz_full_mask);</div><div class='del'>-	if (hk_cpu == exclude_cpu)</div><div class='del'>-		hk_cpu = cpumask_nth_andnot(1, mask, tick_nohz_full_mask);</div><div class='del'>-</div><div class='del'>-	if (hk_cpu &lt; nr_cpu_ids)</div><div class='del'>-		cpu = hk_cpu;</div><div class='del'>-</div><div class='del'>-	return cpu;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct rdt_fs_context {</div><div class='del'>-	struct kernfs_fs_context	kfc;</div><div class='del'>-	bool				enable_cdpl2;</div><div class='del'>-	bool				enable_cdpl3;</div><div class='del'>-	bool				enable_mba_mbps;</div><div class='del'>-	bool				enable_debug;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline struct rdt_fs_context *rdt_fc2context(struct fs_context *fc)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_fs_context *kfc = fc-&gt;fs_private;</div><div class='del'>-</div><div class='del'>-	return container_of(kfc, struct rdt_fs_context, kfc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct mon_evt - Entry in the event list of a resource</div><div class='del'>- * @evtid:		event id</div><div class='del'>- * @name:		name of the event</div><div class='del'>- * @configurable:	true if the event is configurable</div><div class='del'>- * @list:		entry in &amp;rdt_resource-&gt;evt_list</div><div class='del'>- */</div><div class='del'>-struct mon_evt {</div><div class='del'>-	enum resctrl_event_id	evtid;</div><div class='del'>-	char			*name;</div><div class='del'>-	bool			configurable;</div><div class='del'>-	struct list_head	list;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union mon_data_bits - Monitoring details for each event file.</div><div class='del'>- * @priv:              Used to store monitoring event data in @u</div><div class='del'>- *                     as kernfs private data.</div><div class='del'>- * @u.rid:             Resource id associated with the event file.</div><div class='del'>- * @u.evtid:           Event id associated with the event file.</div><div class='del'>- * @u.sum:             Set when event must be summed across multiple</div><div class='del'>- *                     domains.</div><div class='del'>- * @u.domid:           When @u.sum is zero this is the domain to which</div><div class='del'>- *                     the event file belongs. When @sum is one this</div><div class='del'>- *                     is the id of the L3 cache that all domains to be</div><div class='del'>- *                     summed share.</div><div class='del'>- * @u:                 Name of the bit fields struct.</div><div class='del'>- */</div><div class='del'>-union mon_data_bits {</div><div class='del'>-	void *priv;</div><div class='del'>-	struct {</div><div class='del'>-		unsigned int rid		: 10;</div><div class='del'>-		enum resctrl_event_id evtid	: 7;</div><div class='del'>-		unsigned int sum		: 1;</div><div class='del'>-		unsigned int domid		: 14;</div><div class='del'>-	} u;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct rmid_read - Data passed across smp_call*() to read event count.</div><div class='del'>- * @rgrp:  Resource group for which the counter is being read. If it is a parent</div><div class='del'>- *	   resource group then its event count is summed with the count from all</div><div class='del'>- *	   its child resource groups.</div><div class='del'>- * @r:	   Resource describing the properties of the event being read.</div><div class='del'>- * @d:	   Domain that the counter should be read from. If NULL then sum all</div><div class='del'>- *	   domains in @r sharing L3 @ci.id</div><div class='del'>- * @evtid: Which monitor event to read.</div><div class='del'>- * @first: Initialize MBM counter when true.</div><div class='del'>- * @ci:    Cacheinfo for L3. Only set when @d is NULL. Used when summing domains.</div><div class='del'>- * @err:   Error encountered when reading counter.</div><div class='del'>- * @val:   Returned value of event counter. If @rgrp is a parent resource group,</div><div class='del'>- *	   @val includes the sum of event counts from its child resource groups.</div><div class='del'>- *	   If @d is NULL, @val includes the sum of all domains in @r sharing @ci.id,</div><div class='del'>- *	   (summed across child resource groups if @rgrp is a parent resource group).</div><div class='del'>- * @arch_mon_ctx: Hardware monitor allocated for this read request (MPAM only).</div><div class='del'>- */</div><div class='del'>-struct rmid_read {</div><div class='del'>-	struct rdtgroup		*rgrp;</div><div class='del'>-	struct rdt_resource	*r;</div><div class='del'>-	struct rdt_mon_domain	*d;</div><div class='del'>-	enum resctrl_event_id	evtid;</div><div class='del'>-	bool			first;</div><div class='del'>-	struct cacheinfo	*ci;</div><div class='del'>-	int			err;</div><div class='del'>-	u64			val;</div><div class='del'>-	void			*arch_mon_ctx;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct list_head resctrl_schema_all;</div><div class='del'>-extern bool resctrl_mounted;</div><div class='del'>-</div><div class='del'>-enum rdt_group_type {</div><div class='del'>-	RDTCTRL_GROUP = 0,</div><div class='del'>-	RDTMON_GROUP,</div><div class='del'>-	RDT_NUM_GROUP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * enum rdtgrp_mode - Mode of a RDT resource group</div><div class='del'>- * @RDT_MODE_SHAREABLE: This resource group allows sharing of its allocations</div><div class='del'>- * @RDT_MODE_EXCLUSIVE: No sharing of this resource group's allocations allowed</div><div class='del'>- * @RDT_MODE_PSEUDO_LOCKSETUP: Resource group will be used for Pseudo-Locking</div><div class='del'>- * @RDT_MODE_PSEUDO_LOCKED: No sharing of this resource group's allocations</div><div class='del'>- *                          allowed AND the allocations are Cache Pseudo-Locked</div><div class='del'>- * @RDT_NUM_MODES: Total number of modes</div><div class='del'>- *</div><div class='del'>- * The mode of a resource group enables control over the allowed overlap</div><div class='del'>- * between allocations associated with different resource groups (classes</div><div class='del'>- * of service). User is able to modify the mode of a resource group by</div><div class='del'>- * writing to the "mode" resctrl file associated with the resource group.</div><div class='del'>- *</div><div class='del'>- * The "shareable", "exclusive", and "pseudo-locksetup" modes are set by</div><div class='del'>- * writing the appropriate text to the "mode" file. A resource group enters</div><div class='del'>- * "pseudo-locked" mode after the schemata is written while the resource</div><div class='del'>- * group is in "pseudo-locksetup" mode.</div><div class='del'>- */</div><div class='del'>-enum rdtgrp_mode {</div><div class='del'>-	RDT_MODE_SHAREABLE = 0,</div><div class='del'>-	RDT_MODE_EXCLUSIVE,</div><div class='del'>-	RDT_MODE_PSEUDO_LOCKSETUP,</div><div class='del'>-	RDT_MODE_PSEUDO_LOCKED,</div><div class='del'>-</div><div class='del'>-	/* Must be last */</div><div class='del'>-	RDT_NUM_MODES,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct mongroup - store mon group's data in resctrl fs.</div><div class='del'>- * @mon_data_kn:		kernfs node for the mon_data directory</div><div class='del'>- * @parent:			parent rdtgrp</div><div class='del'>- * @crdtgrp_list:		child rdtgroup node list</div><div class='del'>- * @rmid:			rmid for this rdtgroup</div><div class='del'>- */</div><div class='del'>-struct mongroup {</div><div class='del'>-	struct kernfs_node	*mon_data_kn;</div><div class='del'>-	struct rdtgroup		*parent;</div><div class='del'>-	struct list_head	crdtgrp_list;</div><div class='del'>-	u32			rmid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct rdtgroup - store rdtgroup's data in resctrl file system.</div><div class='del'>- * @kn:				kernfs node</div><div class='del'>- * @rdtgroup_list:		linked list for all rdtgroups</div><div class='del'>- * @closid:			closid for this rdtgroup</div><div class='del'>- * @cpu_mask:			CPUs assigned to this rdtgroup</div><div class='del'>- * @flags:			status bits</div><div class='del'>- * @waitcount:			how many cpus expect to find this</div><div class='del'>- *				group when they acquire rdtgroup_mutex</div><div class='del'>- * @type:			indicates type of this rdtgroup - either</div><div class='del'>- *				monitor only or ctrl_mon group</div><div class='del'>- * @mon:			mongroup related data</div><div class='del'>- * @mode:			mode of resource group</div><div class='del'>- * @mba_mbps_event:		input monitoring event id when mba_sc is enabled</div><div class='del'>- * @plr:			pseudo-locked region</div><div class='del'>- */</div><div class='del'>-struct rdtgroup {</div><div class='del'>-	struct kernfs_node		*kn;</div><div class='del'>-	struct list_head		rdtgroup_list;</div><div class='del'>-	u32				closid;</div><div class='del'>-	struct cpumask			cpu_mask;</div><div class='del'>-	int				flags;</div><div class='del'>-	atomic_t			waitcount;</div><div class='del'>-	enum rdt_group_type		type;</div><div class='del'>-	struct mongroup			mon;</div><div class='del'>-	enum rdtgrp_mode		mode;</div><div class='del'>-	enum resctrl_event_id		mba_mbps_event;</div><div class='del'>-	struct pseudo_lock_region	*plr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* rdtgroup.flags */</div><div class='del'>-#define	RDT_DELETED		1</div><div class='del'>-</div><div class='del'>-/* rftype.flags */</div><div class='del'>-#define RFTYPE_FLAGS_CPUS_LIST	1</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Define the file type flags for base and info directories.</div><div class='del'>- */</div><div class='del'>-#define RFTYPE_INFO			BIT(0)</div><div class='del'>-#define RFTYPE_BASE			BIT(1)</div><div class='del'>-#define RFTYPE_CTRL			BIT(4)</div><div class='del'>-#define RFTYPE_MON			BIT(5)</div><div class='del'>-#define RFTYPE_TOP			BIT(6)</div><div class='del'>-#define RFTYPE_RES_CACHE		BIT(8)</div><div class='del'>-#define RFTYPE_RES_MB			BIT(9)</div><div class='del'>-#define RFTYPE_DEBUG			BIT(10)</div><div class='del'>-#define RFTYPE_CTRL_INFO		(RFTYPE_INFO | RFTYPE_CTRL)</div><div class='del'>-#define RFTYPE_MON_INFO			(RFTYPE_INFO | RFTYPE_MON)</div><div class='del'>-#define RFTYPE_TOP_INFO			(RFTYPE_INFO | RFTYPE_TOP)</div><div class='del'>-#define RFTYPE_CTRL_BASE		(RFTYPE_BASE | RFTYPE_CTRL)</div><div class='del'>-#define RFTYPE_MON_BASE			(RFTYPE_BASE | RFTYPE_MON)</div><div class='del'>-</div><div class='del'>-/* List of all resource groups */</div><div class='del'>-extern struct list_head rdt_all_groups;</div><div class='del'>-</div><div class='del'>-extern int max_name_width;</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct rftype - describe each file in the resctrl file system</div><div class='del'>- * @name:	File name</div><div class='del'>- * @mode:	Access mode</div><div class='del'>- * @kf_ops:	File operations</div><div class='del'>- * @flags:	File specific RFTYPE_FLAGS_* flags</div><div class='del'>- * @fflags:	File specific RFTYPE_* flags</div><div class='del'>- * @seq_show:	Show content of the file</div><div class='del'>- * @write:	Write to the file</div><div class='del'>- */</div><div class='del'>-struct rftype {</div><div class='del'>-	char			*name;</div><div class='del'>-	umode_t			mode;</div><div class='del'>-	const struct kernfs_ops	*kf_ops;</div><div class='del'>-	unsigned long		flags;</div><div class='del'>-	unsigned long		fflags;</div><div class='del'>-</div><div class='del'>-	int (*seq_show)(struct kernfs_open_file *of,</div><div class='del'>-			struct seq_file *sf, void *v);</div><div class='del'>-	/*</div><div class='del'>-	 * write() is the generic write callback which maps directly to</div><div class='del'>-	 * kernfs write operation and overrides all other operations.</div><div class='del'>-	 * Maximum write size is determined by -&gt;max_write_len.</div><div class='del'>-	 */</div><div class='del'>-	ssize_t (*write)(struct kernfs_open_file *of,</div><div class='del'>-			 char *buf, size_t nbytes, loff_t off);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct mbm_state - status for each MBM counter in each domain</div><div class='del'>- * @prev_bw_bytes: Previous bytes value read for bandwidth calculation</div><div class='del'>- * @prev_bw:	The most recent bandwidth in MBps</div><div class='del'>- */</div><div class='del'>-struct mbm_state {</div><div class='del'>-	u64	prev_bw_bytes;</div><div class='del'>-	u32	prev_bw;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * struct arch_mbm_state - values used to compute resctrl_arch_rmid_read()s</div><div class='ctx'>  *			   return value.</div><div class='ctx'>  * @chunks:	Total data moved (multiply by rdt_group.mon_scale to get bytes)</div><div class='hunk'>@@ -401,24 +122,7 @@ static inline struct rdt_hw_resource *resctrl_to_arch_res(struct rdt_resource *r</div><div class='ctx'> 	return container_of(r, struct rdt_hw_resource, r_resctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern struct mutex rdtgroup_mutex;</div><div class='del'>-</div><div class='del'>-static inline const char *rdt_kn_name(const struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	return rcu_dereference_check(kn-&gt;name, lockdep_is_held(&amp;rdtgroup_mutex));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> extern struct rdt_hw_resource rdt_resources_all[];</div><div class='del'>-extern struct rdtgroup rdtgroup_default;</div><div class='del'>-extern struct dentry *debugfs_resctrl;</div><div class='del'>-extern enum resctrl_event_id mba_mbps_default_event;</div><div class='del'>-</div><div class='del'>-static inline bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level l)</div><div class='del'>-{</div><div class='del'>-	return rdt_resources_all[l].cdp_enabled;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable);</div><div class='ctx'> </div><div class='ctx'> void arch_mon_domain_online(struct rdt_resource *r, struct rdt_mon_domain *d);</div><div class='ctx'> </div><div class='hunk'>@@ -455,99 +159,14 @@ union cpuid_0x10_x_edx {</div><div class='ctx'> 	unsigned int full;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void rdt_last_cmd_clear(void);</div><div class='del'>-void rdt_last_cmd_puts(const char *s);</div><div class='del'>-__printf(1, 2)</div><div class='del'>-void rdt_last_cmd_printf(const char *fmt, ...);</div><div class='del'>-</div><div class='ctx'> void rdt_ctrl_update(void *arg);</div><div class='del'>-struct rdtgroup *rdtgroup_kn_lock_live(struct kernfs_node *kn);</div><div class='del'>-void rdtgroup_kn_unlock(struct kernfs_node *kn);</div><div class='del'>-int rdtgroup_kn_mode_restrict(struct rdtgroup *r, const char *name);</div><div class='del'>-int rdtgroup_kn_mode_restore(struct rdtgroup *r, const char *name,</div><div class='del'>-			     umode_t mask);</div><div class='del'>-ssize_t rdtgroup_schemata_write(struct kernfs_open_file *of,</div><div class='del'>-				char *buf, size_t nbytes, loff_t off);</div><div class='del'>-int rdtgroup_schemata_show(struct kernfs_open_file *of,</div><div class='del'>-			   struct seq_file *s, void *v);</div><div class='del'>-ssize_t rdtgroup_mba_mbps_event_write(struct kernfs_open_file *of,</div><div class='del'>-				      char *buf, size_t nbytes, loff_t off);</div><div class='del'>-int rdtgroup_mba_mbps_event_show(struct kernfs_open_file *of,</div><div class='del'>-				 struct seq_file *s, void *v);</div><div class='del'>-bool rdtgroup_cbm_overlaps(struct resctrl_schema *s, struct rdt_ctrl_domain *d,</div><div class='del'>-			   unsigned long cbm, int closid, bool exclusive);</div><div class='del'>-unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r, struct rdt_ctrl_domain *d,</div><div class='del'>-				  unsigned long cbm);</div><div class='del'>-enum rdtgrp_mode rdtgroup_mode_by_closid(int closid);</div><div class='del'>-int rdtgroup_tasks_assigned(struct rdtgroup *r);</div><div class='del'>-int closids_supported(void);</div><div class='del'>-void closid_free(int closid);</div><div class='del'>-int alloc_rmid(u32 closid);</div><div class='del'>-void free_rmid(u32 closid, u32 rmid);</div><div class='del'>-int rdt_get_mon_l3_config(struct rdt_resource *r);</div><div class='del'>-void resctrl_mon_resource_exit(void);</div><div class='del'>-bool __init rdt_cpu_has(int flag);</div><div class='del'>-void mon_event_count(void *info);</div><div class='del'>-int rdtgroup_mondata_show(struct seq_file *m, void *arg);</div><div class='del'>-void mon_event_read(struct rmid_read *rr, struct rdt_resource *r,</div><div class='del'>-		    struct rdt_mon_domain *d, struct rdtgroup *rdtgrp,</div><div class='del'>-		    cpumask_t *cpumask, int evtid, int first);</div><div class='del'>-int __init resctrl_mon_resource_init(void);</div><div class='del'>-void mbm_setup_overflow_handler(struct rdt_mon_domain *dom,</div><div class='del'>-				unsigned long delay_ms,</div><div class='del'>-				int exclude_cpu);</div><div class='del'>-void mbm_handle_overflow(struct work_struct *work);</div><div class='del'>-void __init intel_rdt_mbm_apply_quirk(void);</div><div class='del'>-bool is_mba_sc(struct rdt_resource *r);</div><div class='del'>-void cqm_setup_limbo_handler(struct rdt_mon_domain *dom, unsigned long delay_ms,</div><div class='del'>-			     int exclude_cpu);</div><div class='del'>-void cqm_handle_limbo(struct work_struct *work);</div><div class='del'>-bool has_busy_rmid(struct rdt_mon_domain *d);</div><div class='del'>-void __check_limbo(struct rdt_mon_domain *d, bool force_free);</div><div class='del'>-void rdt_domain_reconfigure_cdp(struct rdt_resource *r);</div><div class='del'>-void resctrl_file_fflags_init(const char *config, unsigned long fflags);</div><div class='del'>-void rdt_staged_configs_clear(void);</div><div class='del'>-bool closid_allocated(unsigned int closid);</div><div class='del'>-int resctrl_find_cleanest_closid(void);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_RESCTRL_FS_PSEUDO_LOCK</div><div class='del'>-int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp);</div><div class='del'>-int rdtgroup_locksetup_exit(struct rdtgroup *rdtgrp);</div><div class='del'>-bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_ctrl_domain *d, unsigned long cbm);</div><div class='del'>-bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_ctrl_domain *d);</div><div class='del'>-int rdt_pseudo_lock_init(void);</div><div class='del'>-void rdt_pseudo_lock_release(void);</div><div class='del'>-int rdtgroup_pseudo_lock_create(struct rdtgroup *rdtgrp);</div><div class='del'>-void rdtgroup_pseudo_lock_remove(struct rdtgroup *rdtgrp);</div><div class='del'>-#else</div><div class='del'>-static inline int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static inline int rdtgroup_locksetup_exit(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_ctrl_domain *d, unsigned long cbm)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='add'>+int rdt_get_mon_l3_config(struct rdt_resource *r);</div><div class='ctx'> </div><div class='del'>-static inline bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='add'>+bool rdt_cpu_has(int flag);</div><div class='ctx'> </div><div class='del'>-static inline int rdt_pseudo_lock_init(void) { return 0; }</div><div class='del'>-static inline void rdt_pseudo_lock_release(void) { }</div><div class='del'>-static inline int rdtgroup_pseudo_lock_create(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='add'>+void __init intel_rdt_mbm_apply_quirk(void);</div><div class='ctx'> </div><div class='del'>-static inline void rdtgroup_pseudo_lock_remove(struct rdtgroup *rdtgrp) { }</div><div class='del'>-#endif /* CONFIG_RESCTRL_FS_PSEUDO_LOCK */</div><div class='add'>+void rdt_domain_reconfigure_cdp(struct rdt_resource *r);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ASM_X86_RESCTRL_INTERNAL_H */</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/resctrl/monitor.c<br/>index a93ed7d2a160..c261558276cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/monitor.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/monitor.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/monitor.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/monitor.c</a></div><div class='hunk'>@@ -18,62 +18,12 @@</div><div class='ctx'> #define pr_fmt(fmt)	"resctrl: " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/resctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/resctrl.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "internal.h"</div><div class='del'>-#include "trace.h"</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct rmid_entry - dirty tracking for all RMID.</div><div class='del'>- * @closid:	The CLOSID for this entry.</div><div class='del'>- * @rmid:	The RMID for this entry.</div><div class='del'>- * @busy:	The number of domains with cached data using this RMID.</div><div class='del'>- * @list:	Member of the rmid_free_lru list when busy == 0.</div><div class='del'>- *</div><div class='del'>- * Depending on the architecture the correct monitor is accessed using</div><div class='del'>- * both @closid and @rmid, or @rmid only.</div><div class='del'>- *</div><div class='del'>- * Take the rdtgroup_mutex when accessing.</div><div class='del'>- */</div><div class='del'>-struct rmid_entry {</div><div class='del'>-	u32				closid;</div><div class='del'>-	u32				rmid;</div><div class='del'>-	int				busy;</div><div class='del'>-	struct list_head		list;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * @rmid_free_lru - A least recently used list of free RMIDs</div><div class='del'>- *     These RMIDs are guaranteed to have an occupancy less than the</div><div class='del'>- *     threshold occupancy</div><div class='del'>- */</div><div class='del'>-static LIST_HEAD(rmid_free_lru);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * @closid_num_dirty_rmid    The number of dirty RMID each CLOSID has.</div><div class='del'>- *     Only allocated when CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID is defined.</div><div class='del'>- *     Indexed by CLOSID. Protected by rdtgroup_mutex.</div><div class='del'>- */</div><div class='del'>-static u32 *closid_num_dirty_rmid;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * @rmid_limbo_count - count of currently unused but (potentially)</div><div class='del'>- *     dirty RMIDs.</div><div class='del'>- *     This counts RMIDs that no one is currently using but that</div><div class='del'>- *     may have a occupancy value &gt; resctrl_rmid_realloc_threshold. User can</div><div class='del'>- *     change the threshold occupancy value.</div><div class='del'>- */</div><div class='del'>-static unsigned int rmid_limbo_count;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * @rmid_entry - The entry in the limbo and free lists.</div><div class='del'>- */</div><div class='del'>-static struct rmid_entry	*rmid_ptrs;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Global boolean for rdt_monitor which is true if any</div><div class='hunk'>@@ -86,23 +36,12 @@ bool rdt_mon_capable;</div><div class='ctx'>  */</div><div class='ctx'> unsigned int rdt_mon_features;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This is the threshold cache occupancy in bytes at which we will consider an</div><div class='del'>- * RMID available for re-allocation.</div><div class='del'>- */</div><div class='del'>-unsigned int resctrl_rmid_realloc_threshold;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is the maximum value for the reallocation threshold, in bytes.</div><div class='del'>- */</div><div class='del'>-unsigned int resctrl_rmid_realloc_limit;</div><div class='del'>-</div><div class='ctx'> #define CF(cf)	((unsigned long)(1048576 * (cf) + 0.5))</div><div class='ctx'> </div><div class='ctx'> static int snc_nodes_per_l3_cache = 1;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The correction factor table is documented in Documentation/arch/x86/resctrl.rst.</div><div class='add'>+ * The correction factor table is documented in Documentation/filesystems/resctrl.rst.</div><div class='ctx'>  * If rmid &gt; rmid threshold, MBM total and local values should be multiplied</div><div class='ctx'>  * by the correction factor.</div><div class='ctx'>  *</div><div class='hunk'>@@ -151,6 +90,7 @@ static const struct mbm_correction_factor_table {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 mbm_cf_rmidthreshold __read_mostly = UINT_MAX;</div><div class='add'>+</div><div class='ctx'> static u64 mbm_cf __read_mostly;</div><div class='ctx'> </div><div class='ctx'> static inline u64 get_corrected_mbm_count(u32 rmid, unsigned long val)</div><div class='hunk'>@@ -163,33 +103,6 @@ static inline u64 get_corrected_mbm_count(u32 rmid, unsigned long val)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * x86 and arm64 differ in their handling of monitoring.</div><div class='del'>- * x86's RMID are independent numbers, there is only one source of traffic</div><div class='del'>- * with an RMID value of '1'.</div><div class='del'>- * arm64's PMG extends the PARTID/CLOSID space, there are multiple sources of</div><div class='del'>- * traffic with a PMG value of '1', one for each CLOSID, meaning the RMID</div><div class='del'>- * value is no longer unique.</div><div class='del'>- * To account for this, resctrl uses an index. On x86 this is just the RMID,</div><div class='del'>- * on arm64 it encodes the CLOSID and RMID. This gives a unique number.</div><div class='del'>- *</div><div class='del'>- * The domain's rmid_busy_llc and rmid_ptrs[] are sized by index. The arch code</div><div class='del'>- * must accept an attempt to read every index.</div><div class='del'>- */</div><div class='del'>-static inline struct rmid_entry *__rmid_entry(u32 idx)</div><div class='del'>-{</div><div class='del'>-	struct rmid_entry *entry;</div><div class='del'>-	u32 closid, rmid;</div><div class='del'>-</div><div class='del'>-	entry = &amp;rmid_ptrs[idx];</div><div class='del'>-	resctrl_arch_rmid_idx_decode(idx, &amp;closid, &amp;rmid);</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(entry-&gt;closid != closid);</div><div class='del'>-	WARN_ON_ONCE(entry-&gt;rmid != rmid);</div><div class='del'>-</div><div class='del'>-	return entry;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * When Sub-NUMA Cluster (SNC) mode is not enabled (as indicated by</div><div class='ctx'>  * "snc_nodes_per_l3_cache == 1") no translation of the RMID value is</div><div class='ctx'>  * needed. The physical RMID is the same as the logical RMID.</div><div class='hunk'>@@ -238,7 +151,7 @@ static int __rmid_read_phys(u32 prmid, enum resctrl_event_id eventid, u64 *val)</div><div class='ctx'> 	 * are error bits.</div><div class='ctx'> 	 */</div><div class='ctx'> 	wrmsr(MSR_IA32_QM_EVTSEL, eventid, prmid);</div><div class='del'>-	rdmsrl(MSR_IA32_QM_CTR, msr_val);</div><div class='add'>+	rdmsrq(MSR_IA32_QM_CTR, msr_val);</div><div class='ctx'> </div><div class='ctx'> 	if (msr_val &amp; RMID_VAL_ERROR)</div><div class='ctx'> 		return -EIO;</div><div class='hunk'>@@ -260,12 +173,11 @@ static struct arch_mbm_state *get_arch_mbm_state(struct rdt_hw_mon_domain *hw_do</div><div class='ctx'> 		return &amp;hw_dom-&gt;arch_mbm_total[rmid];</div><div class='ctx'> 	case QOS_L3_MBM_LOCAL_EVENT_ID:</div><div class='ctx'> 		return &amp;hw_dom-&gt;arch_mbm_local[rmid];</div><div class='add'>+	default:</div><div class='add'>+		/* Never expect to get here */</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* Never expect to get here */</div><div class='del'>-	WARN_ON_ONCE(1);</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_mon_domain *d,</div><div class='hunk'>@@ -346,769 +258,6 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void limbo_release_entry(struct rmid_entry *entry)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rmid_limbo_count--;</div><div class='del'>-	list_add_tail(&amp;entry-&gt;list, &amp;rmid_free_lru);</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID))</div><div class='del'>-		closid_num_dirty_rmid[entry-&gt;closid]--;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check the RMIDs that are marked as busy for this domain. If the</div><div class='del'>- * reported LLC occupancy is below the threshold clear the busy bit and</div><div class='del'>- * decrement the count. If the busy count gets to zero on an RMID, we</div><div class='del'>- * free the RMID</div><div class='del'>- */</div><div class='del'>-void __check_limbo(struct rdt_mon_domain *d, bool force_free)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-	u32 idx_limit = resctrl_arch_system_num_rmid_idx();</div><div class='del'>-	struct rmid_entry *entry;</div><div class='del'>-	u32 idx, cur_idx = 1;</div><div class='del'>-	void *arch_mon_ctx;</div><div class='del'>-	bool rmid_dirty;</div><div class='del'>-	u64 val = 0;</div><div class='del'>-</div><div class='del'>-	arch_mon_ctx = resctrl_arch_mon_ctx_alloc(r, QOS_L3_OCCUP_EVENT_ID);</div><div class='del'>-	if (IS_ERR(arch_mon_ctx)) {</div><div class='del'>-		pr_warn_ratelimited("Failed to allocate monitor context: %ld",</div><div class='del'>-				    PTR_ERR(arch_mon_ctx));</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Skip RMID 0 and start from RMID 1 and check all the RMIDs that</div><div class='del'>-	 * are marked as busy for occupancy &lt; threshold. If the occupancy</div><div class='del'>-	 * is less than the threshold decrement the busy counter of the</div><div class='del'>-	 * RMID and move it to the free list when the counter reaches 0.</div><div class='del'>-	 */</div><div class='del'>-	for (;;) {</div><div class='del'>-		idx = find_next_bit(d-&gt;rmid_busy_llc, idx_limit, cur_idx);</div><div class='del'>-		if (idx &gt;= idx_limit)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		entry = __rmid_entry(idx);</div><div class='del'>-		if (resctrl_arch_rmid_read(r, d, entry-&gt;closid, entry-&gt;rmid,</div><div class='del'>-					   QOS_L3_OCCUP_EVENT_ID, &amp;val,</div><div class='del'>-					   arch_mon_ctx)) {</div><div class='del'>-			rmid_dirty = true;</div><div class='del'>-		} else {</div><div class='del'>-			rmid_dirty = (val &gt;= resctrl_rmid_realloc_threshold);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * x86's CLOSID and RMID are independent numbers, so the entry's</div><div class='del'>-			 * CLOSID is an empty CLOSID (X86_RESCTRL_EMPTY_CLOSID). On Arm the</div><div class='del'>-			 * RMID (PMG) extends the CLOSID (PARTID) space with bits that aren't</div><div class='del'>-			 * used to select the configuration. It is thus necessary to track both</div><div class='del'>-			 * CLOSID and RMID because there may be dependencies between them</div><div class='del'>-			 * on some architectures.</div><div class='del'>-			 */</div><div class='del'>-			trace_mon_llc_occupancy_limbo(entry-&gt;closid, entry-&gt;rmid, d-&gt;hdr.id, val);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (force_free || !rmid_dirty) {</div><div class='del'>-			clear_bit(idx, d-&gt;rmid_busy_llc);</div><div class='del'>-			if (!--entry-&gt;busy)</div><div class='del'>-				limbo_release_entry(entry);</div><div class='del'>-		}</div><div class='del'>-		cur_idx = idx + 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	resctrl_arch_mon_ctx_free(r, QOS_L3_OCCUP_EVENT_ID, arch_mon_ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool has_busy_rmid(struct rdt_mon_domain *d)</div><div class='del'>-{</div><div class='del'>-	u32 idx_limit = resctrl_arch_system_num_rmid_idx();</div><div class='del'>-</div><div class='del'>-	return find_first_bit(d-&gt;rmid_busy_llc, idx_limit) != idx_limit;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct rmid_entry *resctrl_find_free_rmid(u32 closid)</div><div class='del'>-{</div><div class='del'>-	struct rmid_entry *itr;</div><div class='del'>-	u32 itr_idx, cmp_idx;</div><div class='del'>-</div><div class='del'>-	if (list_empty(&amp;rmid_free_lru))</div><div class='del'>-		return rmid_limbo_count ? ERR_PTR(-EBUSY) : ERR_PTR(-ENOSPC);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(itr, &amp;rmid_free_lru, list) {</div><div class='del'>-		/*</div><div class='del'>-		 * Get the index of this free RMID, and the index it would need</div><div class='del'>-		 * to be if it were used with this CLOSID.</div><div class='del'>-		 * If the CLOSID is irrelevant on this architecture, the two</div><div class='del'>-		 * index values are always the same on every entry and thus the</div><div class='del'>-		 * very first entry will be returned.</div><div class='del'>-		 */</div><div class='del'>-		itr_idx = resctrl_arch_rmid_idx_encode(itr-&gt;closid, itr-&gt;rmid);</div><div class='del'>-		cmp_idx = resctrl_arch_rmid_idx_encode(closid, itr-&gt;rmid);</div><div class='del'>-</div><div class='del'>-		if (itr_idx == cmp_idx)</div><div class='del'>-			return itr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ERR_PTR(-ENOSPC);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * resctrl_find_cleanest_closid() - Find a CLOSID where all the associated</div><div class='del'>- *                                  RMID are clean, or the CLOSID that has</div><div class='del'>- *                                  the most clean RMID.</div><div class='del'>- *</div><div class='del'>- * MPAM's equivalent of RMID are per-CLOSID, meaning a freshly allocated CLOSID</div><div class='del'>- * may not be able to allocate clean RMID. To avoid this the allocator will</div><div class='del'>- * choose the CLOSID with the most clean RMID.</div><div class='del'>- *</div><div class='del'>- * When the CLOSID and RMID are independent numbers, the first free CLOSID will</div><div class='del'>- * be returned.</div><div class='del'>- */</div><div class='del'>-int resctrl_find_cleanest_closid(void)</div><div class='del'>-{</div><div class='del'>-	u32 cleanest_closid = ~0;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (!IS_ENABLED(CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; closids_supported(); i++) {</div><div class='del'>-		int num_dirty;</div><div class='del'>-</div><div class='del'>-		if (closid_allocated(i))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		num_dirty = closid_num_dirty_rmid[i];</div><div class='del'>-		if (num_dirty == 0)</div><div class='del'>-			return i;</div><div class='del'>-</div><div class='del'>-		if (cleanest_closid == ~0)</div><div class='del'>-			cleanest_closid = i;</div><div class='del'>-</div><div class='del'>-		if (num_dirty &lt; closid_num_dirty_rmid[cleanest_closid])</div><div class='del'>-			cleanest_closid = i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cleanest_closid == ~0)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	return cleanest_closid;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * For MPAM the RMID value is not unique, and has to be considered with</div><div class='del'>- * the CLOSID. The (CLOSID, RMID) pair is allocated on all domains, which</div><div class='del'>- * allows all domains to be managed by a single free list.</div><div class='del'>- * Each domain also has a rmid_busy_llc to reduce the work of the limbo handler.</div><div class='del'>- */</div><div class='del'>-int alloc_rmid(u32 closid)</div><div class='del'>-{</div><div class='del'>-	struct rmid_entry *entry;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	entry = resctrl_find_free_rmid(closid);</div><div class='del'>-	if (IS_ERR(entry))</div><div class='del'>-		return PTR_ERR(entry);</div><div class='del'>-</div><div class='del'>-	list_del(&amp;entry-&gt;list);</div><div class='del'>-	return entry-&gt;rmid;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void add_rmid_to_limbo(struct rmid_entry *entry)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-	u32 idx;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	idx = resctrl_arch_rmid_idx_encode(entry-&gt;closid, entry-&gt;rmid);</div><div class='del'>-</div><div class='del'>-	entry-&gt;busy = 0;</div><div class='del'>-	list_for_each_entry(d, &amp;r-&gt;mon_domains, hdr.list) {</div><div class='del'>-		/*</div><div class='del'>-		 * For the first limbo RMID in the domain,</div><div class='del'>-		 * setup up the limbo worker.</div><div class='del'>-		 */</div><div class='del'>-		if (!has_busy_rmid(d))</div><div class='del'>-			cqm_setup_limbo_handler(d, CQM_LIMBOCHECK_INTERVAL,</div><div class='del'>-						RESCTRL_PICK_ANY_CPU);</div><div class='del'>-		set_bit(idx, d-&gt;rmid_busy_llc);</div><div class='del'>-		entry-&gt;busy++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rmid_limbo_count++;</div><div class='del'>-	if (IS_ENABLED(CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID))</div><div class='del'>-		closid_num_dirty_rmid[entry-&gt;closid]++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void free_rmid(u32 closid, u32 rmid)</div><div class='del'>-{</div><div class='del'>-	u32 idx = resctrl_arch_rmid_idx_encode(closid, rmid);</div><div class='del'>-	struct rmid_entry *entry;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Do not allow the default rmid to be free'd. Comparing by index</div><div class='del'>-	 * allows architectures that ignore the closid parameter to avoid an</div><div class='del'>-	 * unnecessary check.</div><div class='del'>-	 */</div><div class='del'>-	if (!resctrl_arch_mon_capable() ||</div><div class='del'>-	    idx == resctrl_arch_rmid_idx_encode(RESCTRL_RESERVED_CLOSID,</div><div class='del'>-						RESCTRL_RESERVED_RMID))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	entry = __rmid_entry(idx);</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_is_llc_occupancy_enabled())</div><div class='del'>-		add_rmid_to_limbo(entry);</div><div class='del'>-	else</div><div class='del'>-		list_add_tail(&amp;entry-&gt;list, &amp;rmid_free_lru);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mbm_state *get_mbm_state(struct rdt_mon_domain *d, u32 closid,</div><div class='del'>-				       u32 rmid, enum resctrl_event_id evtid)</div><div class='del'>-{</div><div class='del'>-	u32 idx = resctrl_arch_rmid_idx_encode(closid, rmid);</div><div class='del'>-</div><div class='del'>-	switch (evtid) {</div><div class='del'>-	case QOS_L3_MBM_TOTAL_EVENT_ID:</div><div class='del'>-		return &amp;d-&gt;mbm_total[idx];</div><div class='del'>-	case QOS_L3_MBM_LOCAL_EVENT_ID:</div><div class='del'>-		return &amp;d-&gt;mbm_local[idx];</div><div class='del'>-	default:</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)</div><div class='del'>-{</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-	struct mbm_state *m;</div><div class='del'>-	int err, ret;</div><div class='del'>-	u64 tval = 0;</div><div class='del'>-</div><div class='del'>-	if (rr-&gt;first) {</div><div class='del'>-		resctrl_arch_reset_rmid(rr-&gt;r, rr-&gt;d, closid, rmid, rr-&gt;evtid);</div><div class='del'>-		m = get_mbm_state(rr-&gt;d, closid, rmid, rr-&gt;evtid);</div><div class='del'>-		if (m)</div><div class='del'>-			memset(m, 0, sizeof(struct mbm_state));</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rr-&gt;d) {</div><div class='del'>-		/* Reading a single domain, must be on a CPU in that domain. */</div><div class='del'>-		if (!cpumask_test_cpu(cpu, &amp;rr-&gt;d-&gt;hdr.cpu_mask))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		rr-&gt;err = resctrl_arch_rmid_read(rr-&gt;r, rr-&gt;d, closid, rmid,</div><div class='del'>-						 rr-&gt;evtid, &amp;tval, rr-&gt;arch_mon_ctx);</div><div class='del'>-		if (rr-&gt;err)</div><div class='del'>-			return rr-&gt;err;</div><div class='del'>-</div><div class='del'>-		rr-&gt;val += tval;</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Summing domains that share a cache, must be on a CPU for that cache. */</div><div class='del'>-	if (!cpumask_test_cpu(cpu, &amp;rr-&gt;ci-&gt;shared_cpu_map))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Legacy files must report the sum of an event across all</div><div class='del'>-	 * domains that share the same L3 cache instance.</div><div class='del'>-	 * Report success if a read from any domain succeeds, -EINVAL</div><div class='del'>-	 * (translated to "Unavailable" for user space) if reading from</div><div class='del'>-	 * all domains fail for any reason.</div><div class='del'>-	 */</div><div class='del'>-	ret = -EINVAL;</div><div class='del'>-	list_for_each_entry(d, &amp;rr-&gt;r-&gt;mon_domains, hdr.list) {</div><div class='del'>-		if (d-&gt;ci-&gt;id != rr-&gt;ci-&gt;id)</div><div class='del'>-			continue;</div><div class='del'>-		err = resctrl_arch_rmid_read(rr-&gt;r, d, closid, rmid,</div><div class='del'>-					     rr-&gt;evtid, &amp;tval, rr-&gt;arch_mon_ctx);</div><div class='del'>-		if (!err) {</div><div class='del'>-			rr-&gt;val += tval;</div><div class='del'>-			ret = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		rr-&gt;err = ret;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * mbm_bw_count() - Update bw count from values previously read by</div><div class='del'>- *		    __mon_event_count().</div><div class='del'>- * @closid:	The closid used to identify the cached mbm_state.</div><div class='del'>- * @rmid:	The rmid used to identify the cached mbm_state.</div><div class='del'>- * @rr:		The struct rmid_read populated by __mon_event_count().</div><div class='del'>- *</div><div class='del'>- * Supporting function to calculate the memory bandwidth</div><div class='del'>- * and delta bandwidth in MBps. The chunks value previously read by</div><div class='del'>- * __mon_event_count() is compared with the chunks value from the previous</div><div class='del'>- * invocation. This must be called once per second to maintain values in MBps.</div><div class='del'>- */</div><div class='del'>-static void mbm_bw_count(u32 closid, u32 rmid, struct rmid_read *rr)</div><div class='del'>-{</div><div class='del'>-	u64 cur_bw, bytes, cur_bytes;</div><div class='del'>-	struct mbm_state *m;</div><div class='del'>-</div><div class='del'>-	m = get_mbm_state(rr-&gt;d, closid, rmid, rr-&gt;evtid);</div><div class='del'>-	if (WARN_ON_ONCE(!m))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	cur_bytes = rr-&gt;val;</div><div class='del'>-	bytes = cur_bytes - m-&gt;prev_bw_bytes;</div><div class='del'>-	m-&gt;prev_bw_bytes = cur_bytes;</div><div class='del'>-</div><div class='del'>-	cur_bw = bytes / SZ_1M;</div><div class='del'>-</div><div class='del'>-	m-&gt;prev_bw = cur_bw;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is scheduled by mon_event_read() to read the CQM/MBM counters</div><div class='del'>- * on a domain.</div><div class='del'>- */</div><div class='del'>-void mon_event_count(void *info)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp, *entry;</div><div class='del'>-	struct rmid_read *rr = info;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rr-&gt;rgrp;</div><div class='del'>-</div><div class='del'>-	ret = __mon_event_count(rdtgrp-&gt;closid, rdtgrp-&gt;mon.rmid, rr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For Ctrl groups read data from child monitor groups and</div><div class='del'>-	 * add them together. Count events which are read successfully.</div><div class='del'>-	 * Discard the rmid_read's reporting errors.</div><div class='del'>-	 */</div><div class='del'>-	head = &amp;rdtgrp-&gt;mon.crdtgrp_list;</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;type == RDTCTRL_GROUP) {</div><div class='del'>-		list_for_each_entry(entry, head, mon.crdtgrp_list) {</div><div class='del'>-			if (__mon_event_count(entry-&gt;closid, entry-&gt;mon.rmid,</div><div class='del'>-					      rr) == 0)</div><div class='del'>-				ret = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * __mon_event_count() calls for newly created monitor groups may</div><div class='del'>-	 * report -EINVAL/Unavailable if the monitor hasn't seen any traffic.</div><div class='del'>-	 * Discard error if any of the monitor event reads succeeded.</div><div class='del'>-	 */</div><div class='del'>-	if (ret == 0)</div><div class='del'>-		rr-&gt;err = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct rdt_ctrl_domain *get_ctrl_domain_from_cpu(int cpu,</div><div class='del'>-							struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	struct rdt_ctrl_domain *d;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(d, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-		/* Find the domain that contains this CPU */</div><div class='del'>-		if (cpumask_test_cpu(cpu, &amp;d-&gt;hdr.cpu_mask))</div><div class='del'>-			return d;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Feedback loop for MBA software controller (mba_sc)</div><div class='del'>- *</div><div class='del'>- * mba_sc is a feedback loop where we periodically read MBM counters and</div><div class='del'>- * adjust the bandwidth percentage values via the IA32_MBA_THRTL_MSRs so</div><div class='del'>- * that:</div><div class='del'>- *</div><div class='del'>- *   current bandwidth(cur_bw) &lt; user specified bandwidth(user_bw)</div><div class='del'>- *</div><div class='del'>- * This uses the MBM counters to measure the bandwidth and MBA throttle</div><div class='del'>- * MSRs to control the bandwidth for a particular rdtgrp. It builds on the</div><div class='del'>- * fact that resctrl rdtgroups have both monitoring and control.</div><div class='del'>- *</div><div class='del'>- * The frequency of the checks is 1s and we just tag along the MBM overflow</div><div class='del'>- * timer. Having 1s interval makes the calculation of bandwidth simpler.</div><div class='del'>- *</div><div class='del'>- * Although MBA's goal is to restrict the bandwidth to a maximum, there may</div><div class='del'>- * be a need to increase the bandwidth to avoid unnecessarily restricting</div><div class='del'>- * the L2 &lt;-&gt; L3 traffic.</div><div class='del'>- *</div><div class='del'>- * Since MBA controls the L2 external bandwidth where as MBM measures the</div><div class='del'>- * L3 external bandwidth the following sequence could lead to such a</div><div class='del'>- * situation.</div><div class='del'>- *</div><div class='del'>- * Consider an rdtgroup which had high L3 &lt;-&gt; memory traffic in initial</div><div class='del'>- * phases -&gt; mba_sc kicks in and reduced bandwidth percentage values -&gt; but</div><div class='del'>- * after some time rdtgroup has mostly L2 &lt;-&gt; L3 traffic.</div><div class='del'>- *</div><div class='del'>- * In this case we may restrict the rdtgroup's L2 &lt;-&gt; L3 traffic as its</div><div class='del'>- * throttle MSRs already have low percentage values.  To avoid</div><div class='del'>- * unnecessarily restricting such rdtgroups, we also increase the bandwidth.</div><div class='del'>- */</div><div class='del'>-static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_mon_domain *dom_mbm)</div><div class='del'>-{</div><div class='del'>-	u32 closid, rmid, cur_msr_val, new_msr_val;</div><div class='del'>-	struct mbm_state *pmbm_data, *cmbm_data;</div><div class='del'>-	struct rdt_ctrl_domain *dom_mba;</div><div class='del'>-	enum resctrl_event_id evt_id;</div><div class='del'>-	struct rdt_resource *r_mba;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-	struct rdtgroup *entry;</div><div class='del'>-	u32 cur_bw, user_bw;</div><div class='del'>-</div><div class='del'>-	r_mba = resctrl_arch_get_resource(RDT_RESOURCE_MBA);</div><div class='del'>-	evt_id = rgrp-&gt;mba_mbps_event;</div><div class='del'>-</div><div class='del'>-	closid = rgrp-&gt;closid;</div><div class='del'>-	rmid = rgrp-&gt;mon.rmid;</div><div class='del'>-	pmbm_data = get_mbm_state(dom_mbm, closid, rmid, evt_id);</div><div class='del'>-	if (WARN_ON_ONCE(!pmbm_data))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	dom_mba = get_ctrl_domain_from_cpu(smp_processor_id(), r_mba);</div><div class='del'>-	if (!dom_mba) {</div><div class='del'>-		pr_warn_once("Failure to get domain for MBA update\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cur_bw = pmbm_data-&gt;prev_bw;</div><div class='del'>-	user_bw = dom_mba-&gt;mbps_val[closid];</div><div class='del'>-</div><div class='del'>-	/* MBA resource doesn't support CDP */</div><div class='del'>-	cur_msr_val = resctrl_arch_get_config(r_mba, dom_mba, closid, CDP_NONE);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * For Ctrl groups read data from child monitor groups.</div><div class='del'>-	 */</div><div class='del'>-	head = &amp;rgrp-&gt;mon.crdtgrp_list;</div><div class='del'>-	list_for_each_entry(entry, head, mon.crdtgrp_list) {</div><div class='del'>-		cmbm_data = get_mbm_state(dom_mbm, entry-&gt;closid, entry-&gt;mon.rmid, evt_id);</div><div class='del'>-		if (WARN_ON_ONCE(!cmbm_data))</div><div class='del'>-			return;</div><div class='del'>-		cur_bw += cmbm_data-&gt;prev_bw;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Scale up/down the bandwidth linearly for the ctrl group.  The</div><div class='del'>-	 * bandwidth step is the bandwidth granularity specified by the</div><div class='del'>-	 * hardware.</div><div class='del'>-	 * Always increase throttling if current bandwidth is above the</div><div class='del'>-	 * target set by user.</div><div class='del'>-	 * But avoid thrashing up and down on every poll by checking</div><div class='del'>-	 * whether a decrease in throttling is likely to push the group</div><div class='del'>-	 * back over target. E.g. if currently throttling to 30% of bandwidth</div><div class='del'>-	 * on a system with 10% granularity steps, check whether moving to</div><div class='del'>-	 * 40% would go past the limit by multiplying current bandwidth by</div><div class='del'>-	 * "(30 + 10) / 30".</div><div class='del'>-	 */</div><div class='del'>-	if (cur_msr_val &gt; r_mba-&gt;membw.min_bw &amp;&amp; user_bw &lt; cur_bw) {</div><div class='del'>-		new_msr_val = cur_msr_val - r_mba-&gt;membw.bw_gran;</div><div class='del'>-	} else if (cur_msr_val &lt; MAX_MBA_BW &amp;&amp;</div><div class='del'>-		   (user_bw &gt; (cur_bw * (cur_msr_val + r_mba-&gt;membw.min_bw) / cur_msr_val))) {</div><div class='del'>-		new_msr_val = cur_msr_val + r_mba-&gt;membw.bw_gran;</div><div class='del'>-	} else {</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	resctrl_arch_update_one(r_mba, dom_mba, closid, CDP_NONE, new_msr_val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mbm_update_one_event(struct rdt_resource *r, struct rdt_mon_domain *d,</div><div class='del'>-				 u32 closid, u32 rmid, enum resctrl_event_id evtid)</div><div class='del'>-{</div><div class='del'>-	struct rmid_read rr = {0};</div><div class='del'>-</div><div class='del'>-	rr.r = r;</div><div class='del'>-	rr.d = d;</div><div class='del'>-	rr.evtid = evtid;</div><div class='del'>-	rr.arch_mon_ctx = resctrl_arch_mon_ctx_alloc(rr.r, rr.evtid);</div><div class='del'>-	if (IS_ERR(rr.arch_mon_ctx)) {</div><div class='del'>-		pr_warn_ratelimited("Failed to allocate monitor context: %ld",</div><div class='del'>-				    PTR_ERR(rr.arch_mon_ctx));</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__mon_event_count(closid, rmid, &amp;rr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the software controller is enabled, compute the</div><div class='del'>-	 * bandwidth for this event id.</div><div class='del'>-	 */</div><div class='del'>-	if (is_mba_sc(NULL))</div><div class='del'>-		mbm_bw_count(closid, rmid, &amp;rr);</div><div class='del'>-</div><div class='del'>-	resctrl_arch_mon_ctx_free(rr.r, rr.evtid, rr.arch_mon_ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mbm_update(struct rdt_resource *r, struct rdt_mon_domain *d,</div><div class='del'>-		       u32 closid, u32 rmid)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * This is protected from concurrent reads from user as both</div><div class='del'>-	 * the user and overflow handler hold the global mutex.</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_arch_is_mbm_total_enabled())</div><div class='del'>-		mbm_update_one_event(r, d, closid, rmid, QOS_L3_MBM_TOTAL_EVENT_ID);</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_is_mbm_local_enabled())</div><div class='del'>-		mbm_update_one_event(r, d, closid, rmid, QOS_L3_MBM_LOCAL_EVENT_ID);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Handler to scan the limbo list and move the RMIDs</div><div class='del'>- * to free list whose occupancy &lt; threshold_occupancy.</div><div class='del'>- */</div><div class='del'>-void cqm_handle_limbo(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	unsigned long delay = msecs_to_jiffies(CQM_LIMBOCHECK_INTERVAL);</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	d = container_of(work, struct rdt_mon_domain, cqm_limbo.work);</div><div class='del'>-</div><div class='del'>-	__check_limbo(d, false);</div><div class='del'>-</div><div class='del'>-	if (has_busy_rmid(d)) {</div><div class='del'>-		d-&gt;cqm_work_cpu = cpumask_any_housekeeping(&amp;d-&gt;hdr.cpu_mask,</div><div class='del'>-							   RESCTRL_PICK_ANY_CPU);</div><div class='del'>-		schedule_delayed_work_on(d-&gt;cqm_work_cpu, &amp;d-&gt;cqm_limbo,</div><div class='del'>-					 delay);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cqm_setup_limbo_handler() - Schedule the limbo handler to run for this</div><div class='del'>- *                             domain.</div><div class='del'>- * @dom:           The domain the limbo handler should run for.</div><div class='del'>- * @delay_ms:      How far in the future the handler should run.</div><div class='del'>- * @exclude_cpu:   Which CPU the handler should not run on,</div><div class='del'>- *		   RESCTRL_PICK_ANY_CPU to pick any CPU.</div><div class='del'>- */</div><div class='del'>-void cqm_setup_limbo_handler(struct rdt_mon_domain *dom, unsigned long delay_ms,</div><div class='del'>-			     int exclude_cpu)</div><div class='del'>-{</div><div class='del'>-	unsigned long delay = msecs_to_jiffies(delay_ms);</div><div class='del'>-	int cpu;</div><div class='del'>-</div><div class='del'>-	cpu = cpumask_any_housekeeping(&amp;dom-&gt;hdr.cpu_mask, exclude_cpu);</div><div class='del'>-	dom-&gt;cqm_work_cpu = cpu;</div><div class='del'>-</div><div class='del'>-	if (cpu &lt; nr_cpu_ids)</div><div class='del'>-		schedule_delayed_work_on(cpu, &amp;dom-&gt;cqm_limbo, delay);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void mbm_handle_overflow(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	unsigned long delay = msecs_to_jiffies(MBM_OVERFLOW_INTERVAL);</div><div class='del'>-	struct rdtgroup *prgrp, *crgrp;</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the filesystem has been unmounted this work no longer needs to</div><div class='del'>-	 * run.</div><div class='del'>-	 */</div><div class='del'>-	if (!resctrl_mounted || !resctrl_arch_mon_capable())</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	r = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-	d = container_of(work, struct rdt_mon_domain, mbm_over.work);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(prgrp, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		mbm_update(r, d, prgrp-&gt;closid, prgrp-&gt;mon.rmid);</div><div class='del'>-</div><div class='del'>-		head = &amp;prgrp-&gt;mon.crdtgrp_list;</div><div class='del'>-		list_for_each_entry(crgrp, head, mon.crdtgrp_list)</div><div class='del'>-			mbm_update(r, d, crgrp-&gt;closid, crgrp-&gt;mon.rmid);</div><div class='del'>-</div><div class='del'>-		if (is_mba_sc(NULL))</div><div class='del'>-			update_mba_bw(prgrp, d);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Re-check for housekeeping CPUs. This allows the overflow handler to</div><div class='del'>-	 * move off a nohz_full CPU quickly.</div><div class='del'>-	 */</div><div class='del'>-	d-&gt;mbm_work_cpu = cpumask_any_housekeeping(&amp;d-&gt;hdr.cpu_mask,</div><div class='del'>-						   RESCTRL_PICK_ANY_CPU);</div><div class='del'>-	schedule_delayed_work_on(d-&gt;mbm_work_cpu, &amp;d-&gt;mbm_over, delay);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mbm_setup_overflow_handler() - Schedule the overflow handler to run for this</div><div class='del'>- *                                domain.</div><div class='del'>- * @dom:           The domain the overflow handler should run for.</div><div class='del'>- * @delay_ms:      How far in the future the handler should run.</div><div class='del'>- * @exclude_cpu:   Which CPU the handler should not run on,</div><div class='del'>- *		   RESCTRL_PICK_ANY_CPU to pick any CPU.</div><div class='del'>- */</div><div class='del'>-void mbm_setup_overflow_handler(struct rdt_mon_domain *dom, unsigned long delay_ms,</div><div class='del'>-				int exclude_cpu)</div><div class='del'>-{</div><div class='del'>-	unsigned long delay = msecs_to_jiffies(delay_ms);</div><div class='del'>-	int cpu;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * When a domain comes online there is no guarantee the filesystem is</div><div class='del'>-	 * mounted. If not, there is no need to catch counter overflow.</div><div class='del'>-	 */</div><div class='del'>-	if (!resctrl_mounted || !resctrl_arch_mon_capable())</div><div class='del'>-		return;</div><div class='del'>-	cpu = cpumask_any_housekeeping(&amp;dom-&gt;hdr.cpu_mask, exclude_cpu);</div><div class='del'>-	dom-&gt;mbm_work_cpu = cpu;</div><div class='del'>-</div><div class='del'>-	if (cpu &lt; nr_cpu_ids)</div><div class='del'>-		schedule_delayed_work_on(cpu, &amp;dom-&gt;mbm_over, delay);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int dom_data_init(struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	u32 idx_limit = resctrl_arch_system_num_rmid_idx();</div><div class='del'>-	u32 num_closid = resctrl_arch_get_num_closid(r);</div><div class='del'>-	struct rmid_entry *entry = NULL;</div><div class='del'>-	int err = 0, i;</div><div class='del'>-	u32 idx;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-	if (IS_ENABLED(CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID)) {</div><div class='del'>-		u32 *tmp;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If the architecture hasn't provided a sanitised value here,</div><div class='del'>-		 * this may result in larger arrays than necessary. Resctrl will</div><div class='del'>-		 * use a smaller system wide value based on the resources in</div><div class='del'>-		 * use.</div><div class='del'>-		 */</div><div class='del'>-		tmp = kcalloc(num_closid, sizeof(*tmp), GFP_KERNEL);</div><div class='del'>-		if (!tmp) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			goto out_unlock;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		closid_num_dirty_rmid = tmp;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rmid_ptrs = kcalloc(idx_limit, sizeof(struct rmid_entry), GFP_KERNEL);</div><div class='del'>-	if (!rmid_ptrs) {</div><div class='del'>-		if (IS_ENABLED(CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID)) {</div><div class='del'>-			kfree(closid_num_dirty_rmid);</div><div class='del'>-			closid_num_dirty_rmid = NULL;</div><div class='del'>-		}</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; idx_limit; i++) {</div><div class='del'>-		entry = &amp;rmid_ptrs[i];</div><div class='del'>-		INIT_LIST_HEAD(&amp;entry-&gt;list);</div><div class='del'>-</div><div class='del'>-		resctrl_arch_rmid_idx_decode(i, &amp;entry-&gt;closid, &amp;entry-&gt;rmid);</div><div class='del'>-		list_add_tail(&amp;entry-&gt;list, &amp;rmid_free_lru);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * RESCTRL_RESERVED_CLOSID and RESCTRL_RESERVED_RMID are special and</div><div class='del'>-	 * are always allocated. These are used for the rdtgroup_default</div><div class='del'>-	 * control group, which will be setup later in resctrl_init().</div><div class='del'>-	 */</div><div class='del'>-	idx = resctrl_arch_rmid_idx_encode(RESCTRL_RESERVED_CLOSID,</div><div class='del'>-					   RESCTRL_RESERVED_RMID);</div><div class='del'>-	entry = __rmid_entry(idx);</div><div class='del'>-	list_del(&amp;entry-&gt;list);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dom_data_exit(struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (!r-&gt;mon_capable)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID)) {</div><div class='del'>-		kfree(closid_num_dirty_rmid);</div><div class='del'>-		closid_num_dirty_rmid = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kfree(rmid_ptrs);</div><div class='del'>-	rmid_ptrs = NULL;</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mon_evt llc_occupancy_event = {</div><div class='del'>-	.name		= "llc_occupancy",</div><div class='del'>-	.evtid		= QOS_L3_OCCUP_EVENT_ID,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct mon_evt mbm_total_event = {</div><div class='del'>-	.name		= "mbm_total_bytes",</div><div class='del'>-	.evtid		= QOS_L3_MBM_TOTAL_EVENT_ID,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct mon_evt mbm_local_event = {</div><div class='del'>-	.name		= "mbm_local_bytes",</div><div class='del'>-	.evtid		= QOS_L3_MBM_LOCAL_EVENT_ID,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initialize the event list for the resource.</div><div class='del'>- *</div><div class='del'>- * Note that MBM events are also part of RDT_RESOURCE_L3 resource</div><div class='del'>- * because as per the SDM the total and local memory bandwidth</div><div class='del'>- * are enumerated as part of L3 monitoring.</div><div class='del'>- */</div><div class='del'>-static void l3_mon_evt_init(struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	INIT_LIST_HEAD(&amp;r-&gt;evt_list);</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_is_llc_occupancy_enabled())</div><div class='del'>-		list_add_tail(&amp;llc_occupancy_event.list, &amp;r-&gt;evt_list);</div><div class='del'>-	if (resctrl_arch_is_mbm_total_enabled())</div><div class='del'>-		list_add_tail(&amp;mbm_total_event.list, &amp;r-&gt;evt_list);</div><div class='del'>-	if (resctrl_arch_is_mbm_local_enabled())</div><div class='del'>-		list_add_tail(&amp;mbm_local_event.list, &amp;r-&gt;evt_list);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The power-on reset value of MSR_RMID_SNC_CONFIG is 0x1</div><div class='ctx'>  * which indicates that RMIDs are configured in legacy mode.</div><div class='hunk'>@@ -1192,51 +341,6 @@ static __init int snc_get_config(void)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * resctrl_mon_resource_init() - Initialise global monitoring structures.</div><div class='del'>- *</div><div class='del'>- * Allocate and initialise global monitor resources that do not belong to a</div><div class='del'>- * specific domain. i.e. the rmid_ptrs[] used for the limbo and free lists.</div><div class='del'>- * Called once during boot after the struct rdt_resource's have been configured</div><div class='del'>- * but before the filesystem is mounted.</div><div class='del'>- * Resctrl's cpuhp callbacks may be called before this point to bring a domain</div><div class='del'>- * online.</div><div class='del'>- *</div><div class='del'>- * Returns 0 for success, or -ENOMEM.</div><div class='del'>- */</div><div class='del'>-int __init resctrl_mon_resource_init(void)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!r-&gt;mon_capable)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	ret = dom_data_init(r);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	l3_mon_evt_init(r);</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_is_evt_configurable(QOS_L3_MBM_TOTAL_EVENT_ID)) {</div><div class='del'>-		mbm_total_event.configurable = true;</div><div class='del'>-		resctrl_file_fflags_init("mbm_total_bytes_config",</div><div class='del'>-					 RFTYPE_MON_INFO | RFTYPE_RES_CACHE);</div><div class='del'>-	}</div><div class='del'>-	if (resctrl_arch_is_evt_configurable(QOS_L3_MBM_LOCAL_EVENT_ID)) {</div><div class='del'>-		mbm_local_event.configurable = true;</div><div class='del'>-		resctrl_file_fflags_init("mbm_local_bytes_config",</div><div class='del'>-					 RFTYPE_MON_INFO | RFTYPE_RES_CACHE);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_is_mbm_local_enabled())</div><div class='del'>-		mba_mbps_default_event = QOS_L3_MBM_LOCAL_EVENT_ID;</div><div class='del'>-	else if (resctrl_arch_is_mbm_total_enabled())</div><div class='del'>-		mba_mbps_default_event = QOS_L3_MBM_TOTAL_EVENT_ID;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int __init rdt_get_mon_l3_config(struct rdt_resource *r)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int mbm_offset = boot_cpu_data.x86_cache_mbm_width_offset;</div><div class='hunk'>@@ -1284,13 +388,6 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void resctrl_mon_resource_exit(void)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-</div><div class='del'>-	dom_data_exit(r);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init intel_rdt_mbm_apply_quirk(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cf_index;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c<br/>index 92ea1472bde9..de580eca3363 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/pseudo_lock.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/pseudo_lock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/pseudo_lock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/pseudo_lock.c</a></div><div class='hunk'>@@ -11,26 +11,22 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/cacheflush.h&gt;</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='del'>-#include &lt;linux/cpumask.h&gt;</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/kthread.h&gt;</div><div class='del'>-#include &lt;linux/mman.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/pm_qos.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/resctrl.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/resctrl.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../../events/perf_event.h" /* For X86_CONFIG() */</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='del'>-#include "trace.h"</div><div class='add'>+</div><div class='add'>+#include "pseudo_lock_trace.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The bits needed to disable hardware prefetching varies based on the</div><div class='hunk'>@@ -38,29 +34,6 @@</div><div class='ctx'>  */</div><div class='ctx'> static u64 prefetch_disable_bits;</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Major number assigned to and shared by all devices exposing</div><div class='del'>- * pseudo-locked regions.</div><div class='del'>- */</div><div class='del'>-static unsigned int pseudo_lock_major;</div><div class='del'>-static unsigned long pseudo_lock_minor_avail = GENMASK(MINORBITS, 0);</div><div class='del'>-</div><div class='del'>-static char *pseudo_lock_devnode(const struct device *dev, umode_t *mode)</div><div class='del'>-{</div><div class='del'>-	const struct rdtgroup *rdtgrp;</div><div class='del'>-</div><div class='del'>-	rdtgrp = dev_get_drvdata(dev);</div><div class='del'>-	if (mode)</div><div class='del'>-		*mode = 0600;</div><div class='del'>-	guard(mutex)(&amp;rdtgroup_mutex);</div><div class='del'>-	return kasprintf(GFP_KERNEL, "pseudo_lock/%s", rdt_kn_name(rdtgrp-&gt;kn));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct class pseudo_lock_class = {</div><div class='del'>-	.name = "pseudo_lock",</div><div class='del'>-	.devnode = pseudo_lock_devnode,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * resctrl_arch_get_prefetch_disable_bits - prefetch disable bits of supported</div><div class='ctx'>  *                                          platforms</div><div class='hunk'>@@ -122,298 +95,6 @@ u64 resctrl_arch_get_prefetch_disable_bits(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pseudo_lock_minor_get - Obtain available minor number</div><div class='del'>- * @minor: Pointer to where new minor number will be stored</div><div class='del'>- *</div><div class='del'>- * A bitmask is used to track available minor numbers. Here the next free</div><div class='del'>- * minor number is marked as unavailable and returned.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure.</div><div class='del'>- */</div><div class='del'>-static int pseudo_lock_minor_get(unsigned int *minor)</div><div class='del'>-{</div><div class='del'>-	unsigned long first_bit;</div><div class='del'>-</div><div class='del'>-	first_bit = find_first_bit(&amp;pseudo_lock_minor_avail, MINORBITS);</div><div class='del'>-</div><div class='del'>-	if (first_bit == MINORBITS)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	__clear_bit(first_bit, &amp;pseudo_lock_minor_avail);</div><div class='del'>-	*minor = first_bit;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_minor_release - Return minor number to available</div><div class='del'>- * @minor: The minor number made available</div><div class='del'>- */</div><div class='del'>-static void pseudo_lock_minor_release(unsigned int minor)</div><div class='del'>-{</div><div class='del'>-	__set_bit(minor, &amp;pseudo_lock_minor_avail);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * region_find_by_minor - Locate a pseudo-lock region by inode minor number</div><div class='del'>- * @minor: The minor number of the device representing pseudo-locked region</div><div class='del'>- *</div><div class='del'>- * When the character device is accessed we need to determine which</div><div class='del'>- * pseudo-locked region it belongs to. This is done by matching the minor</div><div class='del'>- * number of the device to the pseudo-locked region it belongs.</div><div class='del'>- *</div><div class='del'>- * Minor numbers are assigned at the time a pseudo-locked region is associated</div><div class='del'>- * with a cache instance.</div><div class='del'>- *</div><div class='del'>- * Return: On success return pointer to resource group owning the pseudo-locked</div><div class='del'>- *         region, NULL on failure.</div><div class='del'>- */</div><div class='del'>-static struct rdtgroup *region_find_by_minor(unsigned int minor)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp, *rdtgrp_match = NULL;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(rdtgrp, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		if (rdtgrp-&gt;plr &amp;&amp; rdtgrp-&gt;plr-&gt;minor == minor) {</div><div class='del'>-			rdtgrp_match = rdtgrp;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return rdtgrp_match;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct pseudo_lock_pm_req - A power management QoS request list entry</div><div class='del'>- * @list:	Entry within the @pm_reqs list for a pseudo-locked region</div><div class='del'>- * @req:	PM QoS request</div><div class='del'>- */</div><div class='del'>-struct pseudo_lock_pm_req {</div><div class='del'>-	struct list_head list;</div><div class='del'>-	struct dev_pm_qos_request req;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void pseudo_lock_cstates_relax(struct pseudo_lock_region *plr)</div><div class='del'>-{</div><div class='del'>-	struct pseudo_lock_pm_req *pm_req, *next;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(pm_req, next, &amp;plr-&gt;pm_reqs, list) {</div><div class='del'>-		dev_pm_qos_remove_request(&amp;pm_req-&gt;req);</div><div class='del'>-		list_del(&amp;pm_req-&gt;list);</div><div class='del'>-		kfree(pm_req);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_cstates_constrain - Restrict cores from entering C6</div><div class='del'>- * @plr: Pseudo-locked region</div><div class='del'>- *</div><div class='del'>- * To prevent the cache from being affected by power management entering</div><div class='del'>- * C6 has to be avoided. This is accomplished by requesting a latency</div><div class='del'>- * requirement lower than lowest C6 exit latency of all supported</div><div class='del'>- * platforms as found in the cpuidle state tables in the intel_idle driver.</div><div class='del'>- * At this time it is possible to do so with a single latency requirement</div><div class='del'>- * for all supported platforms.</div><div class='del'>- *</div><div class='del'>- * Since Goldmont is supported, which is affected by X86_BUG_MONITOR,</div><div class='del'>- * the ACPI latencies need to be considered while keeping in mind that C2</div><div class='del'>- * may be set to map to deeper sleep states. In this case the latency</div><div class='del'>- * requirement needs to prevent entering C2 also.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure</div><div class='del'>- */</div><div class='del'>-static int pseudo_lock_cstates_constrain(struct pseudo_lock_region *plr)</div><div class='del'>-{</div><div class='del'>-	struct pseudo_lock_pm_req *pm_req;</div><div class='del'>-	int cpu;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	for_each_cpu(cpu, &amp;plr-&gt;d-&gt;hdr.cpu_mask) {</div><div class='del'>-		pm_req = kzalloc(sizeof(*pm_req), GFP_KERNEL);</div><div class='del'>-		if (!pm_req) {</div><div class='del'>-			rdt_last_cmd_puts("Failure to allocate memory for PM QoS\n");</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto out_err;</div><div class='del'>-		}</div><div class='del'>-		ret = dev_pm_qos_add_request(get_cpu_device(cpu),</div><div class='del'>-					     &amp;pm_req-&gt;req,</div><div class='del'>-					     DEV_PM_QOS_RESUME_LATENCY,</div><div class='del'>-					     30);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			rdt_last_cmd_printf("Failed to add latency req CPU%d\n",</div><div class='del'>-					    cpu);</div><div class='del'>-			kfree(pm_req);</div><div class='del'>-			ret = -1;</div><div class='del'>-			goto out_err;</div><div class='del'>-		}</div><div class='del'>-		list_add(&amp;pm_req-&gt;list, &amp;plr-&gt;pm_reqs);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_err:</div><div class='del'>-	pseudo_lock_cstates_relax(plr);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_region_clear - Reset pseudo-lock region data</div><div class='del'>- * @plr: pseudo-lock region</div><div class='del'>- *</div><div class='del'>- * All content of the pseudo-locked region is reset - any memory allocated</div><div class='del'>- * freed.</div><div class='del'>- *</div><div class='del'>- * Return: void</div><div class='del'>- */</div><div class='del'>-static void pseudo_lock_region_clear(struct pseudo_lock_region *plr)</div><div class='del'>-{</div><div class='del'>-	plr-&gt;size = 0;</div><div class='del'>-	plr-&gt;line_size = 0;</div><div class='del'>-	kfree(plr-&gt;kmem);</div><div class='del'>-	plr-&gt;kmem = NULL;</div><div class='del'>-	plr-&gt;s = NULL;</div><div class='del'>-	if (plr-&gt;d)</div><div class='del'>-		plr-&gt;d-&gt;plr = NULL;</div><div class='del'>-	plr-&gt;d = NULL;</div><div class='del'>-	plr-&gt;cbm = 0;</div><div class='del'>-	plr-&gt;debugfs_dir = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_region_init - Initialize pseudo-lock region information</div><div class='del'>- * @plr: pseudo-lock region</div><div class='del'>- *</div><div class='del'>- * Called after user provided a schemata to be pseudo-locked. From the</div><div class='del'>- * schemata the &amp;struct pseudo_lock_region is on entry already initialized</div><div class='del'>- * with the resource, domain, and capacity bitmask. Here the information</div><div class='del'>- * required for pseudo-locking is deduced from this data and &amp;struct</div><div class='del'>- * pseudo_lock_region initialized further. This information includes:</div><div class='del'>- * - size in bytes of the region to be pseudo-locked</div><div class='del'>- * - cache line size to know the stride with which data needs to be accessed</div><div class='del'>- *   to be pseudo-locked</div><div class='del'>- * - a cpu associated with the cache instance on which the pseudo-locking</div><div class='del'>- *   flow can be executed</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure. Descriptive error will be written</div><div class='del'>- * to last_cmd_status buffer.</div><div class='del'>- */</div><div class='del'>-static int pseudo_lock_region_init(struct pseudo_lock_region *plr)</div><div class='del'>-{</div><div class='del'>-	enum resctrl_scope scope = plr-&gt;s-&gt;res-&gt;ctrl_scope;</div><div class='del'>-	struct cacheinfo *ci;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON_ONCE(scope != RESCTRL_L2_CACHE &amp;&amp; scope != RESCTRL_L3_CACHE))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	/* Pick the first cpu we find that is associated with the cache. */</div><div class='del'>-	plr-&gt;cpu = cpumask_first(&amp;plr-&gt;d-&gt;hdr.cpu_mask);</div><div class='del'>-</div><div class='del'>-	if (!cpu_online(plr-&gt;cpu)) {</div><div class='del'>-		rdt_last_cmd_printf("CPU %u associated with cache not online\n",</div><div class='del'>-				    plr-&gt;cpu);</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ci = get_cpu_cacheinfo_level(plr-&gt;cpu, scope);</div><div class='del'>-	if (ci) {</div><div class='del'>-		plr-&gt;line_size = ci-&gt;coherency_line_size;</div><div class='del'>-		plr-&gt;size = rdtgroup_cbm_to_size(plr-&gt;s-&gt;res, plr-&gt;d, plr-&gt;cbm);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = -1;</div><div class='del'>-	rdt_last_cmd_puts("Unable to determine cache line size\n");</div><div class='del'>-out_region:</div><div class='del'>-	pseudo_lock_region_clear(plr);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_init - Initialize a pseudo-lock region</div><div class='del'>- * @rdtgrp: resource group to which new pseudo-locked region will belong</div><div class='del'>- *</div><div class='del'>- * A pseudo-locked region is associated with a resource group. When this</div><div class='del'>- * association is created the pseudo-locked region is initialized. The</div><div class='del'>- * details of the pseudo-locked region are not known at this time so only</div><div class='del'>- * allocation is done and association established.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure</div><div class='del'>- */</div><div class='del'>-static int pseudo_lock_init(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	struct pseudo_lock_region *plr;</div><div class='del'>-</div><div class='del'>-	plr = kzalloc(sizeof(*plr), GFP_KERNEL);</div><div class='del'>-	if (!plr)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	init_waitqueue_head(&amp;plr-&gt;lock_thread_wq);</div><div class='del'>-	INIT_LIST_HEAD(&amp;plr-&gt;pm_reqs);</div><div class='del'>-	rdtgrp-&gt;plr = plr;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_region_alloc - Allocate kernel memory that will be pseudo-locked</div><div class='del'>- * @plr: pseudo-lock region</div><div class='del'>- *</div><div class='del'>- * Initialize the details required to set up the pseudo-locked region and</div><div class='del'>- * allocate the contiguous memory that will be pseudo-locked to the cache.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure.  Descriptive error will be written</div><div class='del'>- * to last_cmd_status buffer.</div><div class='del'>- */</div><div class='del'>-static int pseudo_lock_region_alloc(struct pseudo_lock_region *plr)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pseudo_lock_region_init(plr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We do not yet support contiguous regions larger than</div><div class='del'>-	 * KMALLOC_MAX_SIZE.</div><div class='del'>-	 */</div><div class='del'>-	if (plr-&gt;size &gt; KMALLOC_MAX_SIZE) {</div><div class='del'>-		rdt_last_cmd_puts("Requested region exceeds maximum size\n");</div><div class='del'>-		ret = -E2BIG;</div><div class='del'>-		goto out_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	plr-&gt;kmem = kzalloc(plr-&gt;size, GFP_KERNEL);</div><div class='del'>-	if (!plr-&gt;kmem) {</div><div class='del'>-		rdt_last_cmd_puts("Unable to allocate memory\n");</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out_region;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-	goto out;</div><div class='del'>-out_region:</div><div class='del'>-	pseudo_lock_region_clear(plr);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_free - Free a pseudo-locked region</div><div class='del'>- * @rdtgrp: resource group to which pseudo-locked region belonged</div><div class='del'>- *</div><div class='del'>- * The pseudo-locked region's resources have already been released, or not</div><div class='del'>- * yet created at this point. Now it can be freed and disassociated from the</div><div class='del'>- * resource group.</div><div class='del'>- *</div><div class='del'>- * Return: void</div><div class='del'>- */</div><div class='del'>-static void pseudo_lock_free(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	pseudo_lock_region_clear(rdtgrp-&gt;plr);</div><div class='del'>-	kfree(rdtgrp-&gt;plr);</div><div class='del'>-	rdtgrp-&gt;plr = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * resctrl_arch_pseudo_lock_fn - Load kernel memory into cache</div><div class='ctx'>  * @_plr: the pseudo-lock region descriptor</div><div class='ctx'>  *</div><div class='hunk'>@@ -481,8 +162,8 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)</div><div class='ctx'> 	 * the buffer and evict pseudo-locked memory read earlier from the</div><div class='ctx'> 	 * cache.</div><div class='ctx'> 	 */</div><div class='del'>-	saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);</div><div class='del'>-	__wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);</div><div class='add'>+	saved_msr = native_rdmsrq(MSR_MISC_FEATURE_CONTROL);</div><div class='add'>+	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);</div><div class='ctx'> 	closid_p = this_cpu_read(pqr_state.cur_closid);</div><div class='ctx'> 	rmid_p = this_cpu_read(pqr_state.cur_rmid);</div><div class='ctx'> 	mem_r = plr-&gt;kmem;</div><div class='hunk'>@@ -494,7 +175,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)</div><div class='ctx'> 	 * pseudo-locked followed by reading of kernel memory to load it</div><div class='ctx'> 	 * into the cache.</div><div class='ctx'> 	 */</div><div class='del'>-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr-&gt;closid);</div><div class='add'>+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr-&gt;closid);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Cache was flushed earlier. Now access kernel memory to read it</div><div class='hunk'>@@ -531,10 +212,10 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)</div><div class='ctx'> 	 * Critical section end: restore closid with capacity bitmask that</div><div class='ctx'> 	 * does not overlap with pseudo-locked region.</div><div class='ctx'> 	 */</div><div class='del'>-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);</div><div class='add'>+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);</div><div class='ctx'> </div><div class='ctx'> 	/* Re-enable the hardware prefetcher(s) */</div><div class='del'>-	wrmsrl(MSR_MISC_FEATURE_CONTROL, saved_msr);</div><div class='add'>+	wrmsrq(MSR_MISC_FEATURE_CONTROL, saved_msr);</div><div class='ctx'> 	local_irq_enable();</div><div class='ctx'> </div><div class='ctx'> 	plr-&gt;thread_done = 1;</div><div class='hunk'>@@ -543,340 +224,6 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * rdtgroup_monitor_in_progress - Test if monitoring in progress</div><div class='del'>- * @rdtgrp: resource group being queried</div><div class='del'>- *</div><div class='del'>- * Return: 1 if monitor groups have been created for this resource</div><div class='del'>- * group, 0 otherwise.</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_monitor_in_progress(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	return !list_empty(&amp;rdtgrp-&gt;mon.crdtgrp_list);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_locksetup_user_restrict - Restrict user access to group</div><div class='del'>- * @rdtgrp: resource group needing access restricted</div><div class='del'>- *</div><div class='del'>- * A resource group used for cache pseudo-locking cannot have cpus or tasks</div><div class='del'>- * assigned to it. This is communicated to the user by restricting access</div><div class='del'>- * to all the files that can be used to make such changes.</div><div class='del'>- *</div><div class='del'>- * Permissions restored with rdtgroup_locksetup_user_restore()</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure. If a failure occurs during the</div><div class='del'>- * restriction of access an attempt will be made to restore permissions but</div><div class='del'>- * the state of the mode of these files will be uncertain when a failure</div><div class='del'>- * occurs.</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_locksetup_user_restrict(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_mode_restrict(rdtgrp, "tasks");</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_mode_restrict(rdtgrp, "cpus");</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_tasks;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_mode_restrict(rdtgrp, "cpus_list");</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_cpus;</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_mon_capable()) {</div><div class='del'>-		ret = rdtgroup_kn_mode_restrict(rdtgrp, "mon_groups");</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_cpus_list;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-err_cpus_list:</div><div class='del'>-	rdtgroup_kn_mode_restore(rdtgrp, "cpus_list", 0777);</div><div class='del'>-err_cpus:</div><div class='del'>-	rdtgroup_kn_mode_restore(rdtgrp, "cpus", 0777);</div><div class='del'>-err_tasks:</div><div class='del'>-	rdtgroup_kn_mode_restore(rdtgrp, "tasks", 0777);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_locksetup_user_restore - Restore user access to group</div><div class='del'>- * @rdtgrp: resource group needing access restored</div><div class='del'>- *</div><div class='del'>- * Restore all file access previously removed using</div><div class='del'>- * rdtgroup_locksetup_user_restrict()</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure.  If a failure occurs during the</div><div class='del'>- * restoration of access an attempt will be made to restrict permissions</div><div class='del'>- * again but the state of the mode of these files will be uncertain when</div><div class='del'>- * a failure occurs.</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_locksetup_user_restore(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_mode_restore(rdtgrp, "tasks", 0777);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_mode_restore(rdtgrp, "cpus", 0777);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_tasks;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_mode_restore(rdtgrp, "cpus_list", 0777);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_cpus;</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_mon_capable()) {</div><div class='del'>-		ret = rdtgroup_kn_mode_restore(rdtgrp, "mon_groups", 0777);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_cpus_list;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-err_cpus_list:</div><div class='del'>-	rdtgroup_kn_mode_restrict(rdtgrp, "cpus_list");</div><div class='del'>-err_cpus:</div><div class='del'>-	rdtgroup_kn_mode_restrict(rdtgrp, "cpus");</div><div class='del'>-err_tasks:</div><div class='del'>-	rdtgroup_kn_mode_restrict(rdtgrp, "tasks");</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_locksetup_enter - Resource group enters locksetup mode</div><div class='del'>- * @rdtgrp: resource group requested to enter locksetup mode</div><div class='del'>- *</div><div class='del'>- * A resource group enters locksetup mode to reflect that it would be used</div><div class='del'>- * to represent a pseudo-locked region and is in the process of being set</div><div class='del'>- * up to do so. A resource group used for a pseudo-locked region would</div><div class='del'>- * lose the closid associated with it so we cannot allow it to have any</div><div class='del'>- * tasks or cpus assigned nor permit tasks or cpus to be assigned in the</div><div class='del'>- * future. Monitoring of a pseudo-locked region is not allowed either.</div><div class='del'>- *</div><div class='del'>- * The above and more restrictions on a pseudo-locked region are checked</div><div class='del'>- * for and enforced before the resource group enters the locksetup mode.</div><div class='del'>- *</div><div class='del'>- * Returns: 0 if the resource group successfully entered locksetup mode, &lt;0</div><div class='del'>- * on failure. On failure the last_cmd_status buffer is updated with text to</div><div class='del'>- * communicate details of failure to the user.</div><div class='del'>- */</div><div class='del'>-int rdtgroup_locksetup_enter(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The default resource group can neither be removed nor lose the</div><div class='del'>-	 * default closid associated with it.</div><div class='del'>-	 */</div><div class='del'>-	if (rdtgrp == &amp;rdtgroup_default) {</div><div class='del'>-		rdt_last_cmd_puts("Cannot pseudo-lock default group\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Cache Pseudo-locking not supported when CDP is enabled.</div><div class='del'>-	 *</div><div class='del'>-	 * Some things to consider if you would like to enable this</div><div class='del'>-	 * support (using L3 CDP as example):</div><div class='del'>-	 * - When CDP is enabled two separate resources are exposed,</div><div class='del'>-	 *   L3DATA and L3CODE, but they are actually on the same cache.</div><div class='del'>-	 *   The implication for pseudo-locking is that if a</div><div class='del'>-	 *   pseudo-locked region is created on a domain of one</div><div class='del'>-	 *   resource (eg. L3CODE), then a pseudo-locked region cannot</div><div class='del'>-	 *   be created on that same domain of the other resource</div><div class='del'>-	 *   (eg. L3DATA). This is because the creation of a</div><div class='del'>-	 *   pseudo-locked region involves a call to wbinvd that will</div><div class='del'>-	 *   affect all cache allocations on particular domain.</div><div class='del'>-	 * - Considering the previous, it may be possible to only</div><div class='del'>-	 *   expose one of the CDP resources to pseudo-locking and</div><div class='del'>-	 *   hide the other. For example, we could consider to only</div><div class='del'>-	 *   expose L3DATA and since the L3 cache is unified it is</div><div class='del'>-	 *   still possible to place instructions there are execute it.</div><div class='del'>-	 * - If only one region is exposed to pseudo-locking we should</div><div class='del'>-	 *   still keep in mind that availability of a portion of cache</div><div class='del'>-	 *   for pseudo-locking should take into account both resources.</div><div class='del'>-	 *   Similarly, if a pseudo-locked region is created in one</div><div class='del'>-	 *   resource, the portion of cache used by it should be made</div><div class='del'>-	 *   unavailable to all future allocations from both resources.</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_arch_get_cdp_enabled(RDT_RESOURCE_L3) ||</div><div class='del'>-	    resctrl_arch_get_cdp_enabled(RDT_RESOURCE_L2)) {</div><div class='del'>-		rdt_last_cmd_puts("CDP enabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Not knowing the bits to disable prefetching implies that this</div><div class='del'>-	 * platform does not support Cache Pseudo-Locking.</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_arch_get_prefetch_disable_bits() == 0) {</div><div class='del'>-		rdt_last_cmd_puts("Pseudo-locking not supported\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgroup_monitor_in_progress(rdtgrp)) {</div><div class='del'>-		rdt_last_cmd_puts("Monitoring in progress\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgroup_tasks_assigned(rdtgrp)) {</div><div class='del'>-		rdt_last_cmd_puts("Tasks assigned to resource group\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!cpumask_empty(&amp;rdtgrp-&gt;cpu_mask)) {</div><div class='del'>-		rdt_last_cmd_puts("CPUs assigned to resource group\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgroup_locksetup_user_restrict(rdtgrp)) {</div><div class='del'>-		rdt_last_cmd_puts("Unable to modify resctrl permissions\n");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = pseudo_lock_init(rdtgrp);</div><div class='del'>-	if (ret) {</div><div class='del'>-		rdt_last_cmd_puts("Unable to init pseudo-lock region\n");</div><div class='del'>-		goto out_release;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If this system is capable of monitoring a rmid would have been</div><div class='del'>-	 * allocated when the control group was created. This is not needed</div><div class='del'>-	 * anymore when this group would be used for pseudo-locking. This</div><div class='del'>-	 * is safe to call on platforms not capable of monitoring.</div><div class='del'>-	 */</div><div class='del'>-	free_rmid(rdtgrp-&gt;closid, rdtgrp-&gt;mon.rmid);</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_release:</div><div class='del'>-	rdtgroup_locksetup_user_restore(rdtgrp);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_locksetup_exit - resource group exist locksetup mode</div><div class='del'>- * @rdtgrp: resource group</div><div class='del'>- *</div><div class='del'>- * When a resource group exits locksetup mode the earlier restrictions are</div><div class='del'>- * lifted.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure</div><div class='del'>- */</div><div class='del'>-int rdtgroup_locksetup_exit(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_mon_capable()) {</div><div class='del'>-		ret = alloc_rmid(rdtgrp-&gt;closid);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			rdt_last_cmd_puts("Out of RMIDs\n");</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-		rdtgrp-&gt;mon.rmid = ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_locksetup_user_restore(rdtgrp);</div><div class='del'>-	if (ret) {</div><div class='del'>-		free_rmid(rdtgrp-&gt;closid, rdtgrp-&gt;mon.rmid);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pseudo_lock_free(rdtgrp);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_cbm_overlaps_pseudo_locked - Test if CBM or portion is pseudo-locked</div><div class='del'>- * @d: RDT domain</div><div class='del'>- * @cbm: CBM to test</div><div class='del'>- *</div><div class='del'>- * @d represents a cache instance and @cbm a capacity bitmask that is</div><div class='del'>- * considered for it. Determine if @cbm overlaps with any existing</div><div class='del'>- * pseudo-locked region on @d.</div><div class='del'>- *</div><div class='del'>- * @cbm is unsigned long, even if only 32 bits are used, to make the</div><div class='del'>- * bitmap functions work correctly.</div><div class='del'>- *</div><div class='del'>- * Return: true if @cbm overlaps with pseudo-locked region on @d, false</div><div class='del'>- * otherwise.</div><div class='del'>- */</div><div class='del'>-bool rdtgroup_cbm_overlaps_pseudo_locked(struct rdt_ctrl_domain *d, unsigned long cbm)</div><div class='del'>-{</div><div class='del'>-	unsigned int cbm_len;</div><div class='del'>-	unsigned long cbm_b;</div><div class='del'>-</div><div class='del'>-	if (d-&gt;plr) {</div><div class='del'>-		cbm_len = d-&gt;plr-&gt;s-&gt;res-&gt;cache.cbm_len;</div><div class='del'>-		cbm_b = d-&gt;plr-&gt;cbm;</div><div class='del'>-		if (bitmap_intersects(&amp;cbm, &amp;cbm_b, cbm_len))</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_pseudo_locked_in_hierarchy - Pseudo-locked region in cache hierarchy</div><div class='del'>- * @d: RDT domain under test</div><div class='del'>- *</div><div class='del'>- * The setup of a pseudo-locked region affects all cache instances within</div><div class='del'>- * the hierarchy of the region. It is thus essential to know if any</div><div class='del'>- * pseudo-locked regions exist within a cache hierarchy to prevent any</div><div class='del'>- * attempts to create new pseudo-locked regions in the same hierarchy.</div><div class='del'>- *</div><div class='del'>- * Return: true if a pseudo-locked region exists in the hierarchy of @d or</div><div class='del'>- *         if it is not possible to test due to memory allocation issue,</div><div class='del'>- *         false otherwise.</div><div class='del'>- */</div><div class='del'>-bool rdtgroup_pseudo_locked_in_hierarchy(struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	struct rdt_ctrl_domain *d_i;</div><div class='del'>-	cpumask_var_t cpu_with_psl;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	bool ret = false;</div><div class='del'>-</div><div class='del'>-	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;cpu_with_psl, GFP_KERNEL))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * First determine which cpus have pseudo-locked regions</div><div class='del'>-	 * associated with them.</div><div class='del'>-	 */</div><div class='del'>-	for_each_alloc_capable_rdt_resource(r) {</div><div class='del'>-		list_for_each_entry(d_i, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-			if (d_i-&gt;plr)</div><div class='del'>-				cpumask_or(cpu_with_psl, cpu_with_psl,</div><div class='del'>-					   &amp;d_i-&gt;hdr.cpu_mask);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Next test if new pseudo-locked region would intersect with</div><div class='del'>-	 * existing region.</div><div class='del'>-	 */</div><div class='del'>-	if (cpumask_intersects(&amp;d-&gt;hdr.cpu_mask, cpu_with_psl))</div><div class='del'>-		ret = true;</div><div class='del'>-</div><div class='del'>-	free_cpumask_var(cpu_with_psl);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * resctrl_arch_measure_cycles_lat_fn - Measure cycle latency to read</div><div class='ctx'>  *                                      pseudo-locked memory</div><div class='ctx'>  * @_plr: pseudo-lock region to measure</div><div class='hunk'>@@ -904,7 +251,7 @@ int resctrl_arch_measure_cycles_lat_fn(void *_plr)</div><div class='ctx'> 	 * Disable hardware prefetchers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);</div><div class='del'>-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);</div><div class='add'>+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);</div><div class='ctx'> 	mem_r = READ_ONCE(plr-&gt;kmem);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Dummy execute of the time measurement to load the needed</div><div class='hunk'>@@ -1000,7 +347,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,</div><div class='ctx'> 	 * Disable hardware prefetchers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);</div><div class='del'>-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);</div><div class='add'>+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize rest of local variables */</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1018,8 +365,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,</div><div class='ctx'> 	 * used in L1 cache, second to capture accurate value that does not</div><div class='ctx'> 	 * include cache misses incurred because of instruction loads.</div><div class='ctx'> 	 */</div><div class='del'>-	rdpmcl(hit_pmcnum, hits_before);</div><div class='del'>-	rdpmcl(miss_pmcnum, miss_before);</div><div class='add'>+	hits_before = rdpmc(hit_pmcnum);</div><div class='add'>+	miss_before = rdpmc(miss_pmcnum);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * From SDM: Performing back-to-back fast reads are not guaranteed</div><div class='ctx'> 	 * to be monotonic.</div><div class='hunk'>@@ -1027,8 +374,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,</div><div class='ctx'> 	 * before proceeding.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rmb();</div><div class='del'>-	rdpmcl(hit_pmcnum, hits_before);</div><div class='del'>-	rdpmcl(miss_pmcnum, miss_before);</div><div class='add'>+	hits_before = rdpmc(hit_pmcnum);</div><div class='add'>+	miss_before = rdpmc(miss_pmcnum);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use LFENCE to ensure all previous instructions are retired</div><div class='ctx'> 	 * before proceeding.</div><div class='hunk'>@@ -1050,8 +397,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,</div><div class='ctx'> 	 * before proceeding.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rmb();</div><div class='del'>-	rdpmcl(hit_pmcnum, hits_after);</div><div class='del'>-	rdpmcl(miss_pmcnum, miss_after);</div><div class='add'>+	hits_after = rdpmc(hit_pmcnum);</div><div class='add'>+	miss_after = rdpmc(miss_pmcnum);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Use LFENCE to ensure all previous instructions are retired</div><div class='ctx'> 	 * before proceeding.</div><div class='hunk'>@@ -1168,433 +515,3 @@ out:</div><div class='ctx'> 	wake_up_interruptible(&amp;plr-&gt;lock_thread_wq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * pseudo_lock_measure_cycles - Trigger latency measure to pseudo-locked region</div><div class='del'>- * @rdtgrp: Resource group to which the pseudo-locked region belongs.</div><div class='del'>- * @sel: Selector of which measurement to perform on a pseudo-locked region.</div><div class='del'>- *</div><div class='del'>- * The measurement of latency to access a pseudo-locked region should be</div><div class='del'>- * done from a cpu that is associated with that pseudo-locked region.</div><div class='del'>- * Determine which cpu is associated with this region and start a thread on</div><div class='del'>- * that cpu to perform the measurement, wait for that thread to complete.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure</div><div class='del'>- */</div><div class='del'>-static int pseudo_lock_measure_cycles(struct rdtgroup *rdtgrp, int sel)</div><div class='del'>-{</div><div class='del'>-	struct pseudo_lock_region *plr = rdtgrp-&gt;plr;</div><div class='del'>-	struct task_struct *thread;</div><div class='del'>-	unsigned int cpu;</div><div class='del'>-	int ret = -1;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;flags &amp; RDT_DELETED) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!plr-&gt;d) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	plr-&gt;thread_done = 0;</div><div class='del'>-	cpu = cpumask_first(&amp;plr-&gt;d-&gt;hdr.cpu_mask);</div><div class='del'>-	if (!cpu_online(cpu)) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	plr-&gt;cpu = cpu;</div><div class='del'>-</div><div class='del'>-	if (sel == 1)</div><div class='del'>-		thread = kthread_run_on_cpu(resctrl_arch_measure_cycles_lat_fn,</div><div class='del'>-					    plr, cpu, "pseudo_lock_measure/%u");</div><div class='del'>-	else if (sel == 2)</div><div class='del'>-		thread = kthread_run_on_cpu(resctrl_arch_measure_l2_residency,</div><div class='del'>-					    plr, cpu, "pseudo_lock_measure/%u");</div><div class='del'>-	else if (sel == 3)</div><div class='del'>-		thread = kthread_run_on_cpu(resctrl_arch_measure_l3_residency,</div><div class='del'>-					    plr, cpu, "pseudo_lock_measure/%u");</div><div class='del'>-	else</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(thread)) {</div><div class='del'>-		ret = PTR_ERR(thread);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = wait_event_interruptible(plr-&gt;lock_thread_wq,</div><div class='del'>-				       plr-&gt;thread_done == 1);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t pseudo_lock_measure_trigger(struct file *file,</div><div class='del'>-					   const char __user *user_buf,</div><div class='del'>-					   size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp = file-&gt;private_data;</div><div class='del'>-	size_t buf_size;</div><div class='del'>-	char buf[32];</div><div class='del'>-	int ret;</div><div class='del'>-	int sel;</div><div class='del'>-</div><div class='del'>-	buf_size = min(count, (sizeof(buf) - 1));</div><div class='del'>-	if (copy_from_user(buf, user_buf, buf_size))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	buf[buf_size] = '\0';</div><div class='del'>-	ret = kstrtoint(buf, 10, &amp;sel);</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		if (sel != 1 &amp;&amp; sel != 2 &amp;&amp; sel != 3)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		ret = debugfs_file_get(file-&gt;f_path.dentry);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-		ret = pseudo_lock_measure_cycles(rdtgrp, sel);</div><div class='del'>-		if (ret == 0)</div><div class='del'>-			ret = count;</div><div class='del'>-		debugfs_file_put(file-&gt;f_path.dentry);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations pseudo_measure_fops = {</div><div class='del'>-	.write = pseudo_lock_measure_trigger,</div><div class='del'>-	.open = simple_open,</div><div class='del'>-	.llseek = default_llseek,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_pseudo_lock_create - Create a pseudo-locked region</div><div class='del'>- * @rdtgrp: resource group to which pseudo-lock region belongs</div><div class='del'>- *</div><div class='del'>- * Called when a resource group in the pseudo-locksetup mode receives a</div><div class='del'>- * valid schemata that should be pseudo-locked. Since the resource group is</div><div class='del'>- * in pseudo-locksetup mode the &amp;struct pseudo_lock_region has already been</div><div class='del'>- * allocated and initialized with the essential information. If a failure</div><div class='del'>- * occurs the resource group remains in the pseudo-locksetup mode with the</div><div class='del'>- * &amp;struct pseudo_lock_region associated with it, but cleared from all</div><div class='del'>- * information and ready for the user to re-attempt pseudo-locking by</div><div class='del'>- * writing the schemata again.</div><div class='del'>- *</div><div class='del'>- * Return: 0 if the pseudo-locked region was successfully pseudo-locked, &lt;0</div><div class='del'>- * on failure. Descriptive error will be written to last_cmd_status buffer.</div><div class='del'>- */</div><div class='del'>-int rdtgroup_pseudo_lock_create(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	struct pseudo_lock_region *plr = rdtgrp-&gt;plr;</div><div class='del'>-	struct task_struct *thread;</div><div class='del'>-	unsigned int new_minor;</div><div class='del'>-	struct device *dev;</div><div class='del'>-	char *kn_name __free(kfree) = NULL;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pseudo_lock_region_alloc(plr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = pseudo_lock_cstates_constrain(plr);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out_region;</div><div class='del'>-	}</div><div class='del'>-	kn_name = kstrdup(rdt_kn_name(rdtgrp-&gt;kn), GFP_KERNEL);</div><div class='del'>-	if (!kn_name) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out_cstates;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	plr-&gt;thread_done = 0;</div><div class='del'>-</div><div class='del'>-	thread = kthread_run_on_cpu(resctrl_arch_pseudo_lock_fn, plr,</div><div class='del'>-				    plr-&gt;cpu, "pseudo_lock/%u");</div><div class='del'>-	if (IS_ERR(thread)) {</div><div class='del'>-		ret = PTR_ERR(thread);</div><div class='del'>-		rdt_last_cmd_printf("Locking thread returned error %d\n", ret);</div><div class='del'>-		goto out_cstates;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = wait_event_interruptible(plr-&gt;lock_thread_wq,</div><div class='del'>-				       plr-&gt;thread_done == 1);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		/*</div><div class='del'>-		 * If the thread does not get on the CPU for whatever</div><div class='del'>-		 * reason and the process which sets up the region is</div><div class='del'>-		 * interrupted then this will leave the thread in runnable</div><div class='del'>-		 * state and once it gets on the CPU it will dereference</div><div class='del'>-		 * the cleared, but not freed, plr struct resulting in an</div><div class='del'>-		 * empty pseudo-locking loop.</div><div class='del'>-		 */</div><div class='del'>-		rdt_last_cmd_puts("Locking thread interrupted\n");</div><div class='del'>-		goto out_cstates;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = pseudo_lock_minor_get(&amp;new_minor);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		rdt_last_cmd_puts("Unable to obtain a new minor number\n");</div><div class='del'>-		goto out_cstates;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Unlock access but do not release the reference. The</div><div class='del'>-	 * pseudo-locked region will still be here on return.</div><div class='del'>-	 *</div><div class='del'>-	 * The mutex has to be released temporarily to avoid a potential</div><div class='del'>-	 * deadlock with the mm-&gt;mmap_lock which is obtained in the</div><div class='del'>-	 * device_create() and debugfs_create_dir() callpath below as well as</div><div class='del'>-	 * before the mmap() callback is called.</div><div class='del'>-	 */</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (!IS_ERR_OR_NULL(debugfs_resctrl)) {</div><div class='del'>-		plr-&gt;debugfs_dir = debugfs_create_dir(kn_name, debugfs_resctrl);</div><div class='del'>-		if (!IS_ERR_OR_NULL(plr-&gt;debugfs_dir))</div><div class='del'>-			debugfs_create_file("pseudo_lock_measure", 0200,</div><div class='del'>-					    plr-&gt;debugfs_dir, rdtgrp,</div><div class='del'>-					    &amp;pseudo_measure_fops);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev = device_create(&amp;pseudo_lock_class, NULL,</div><div class='del'>-			    MKDEV(pseudo_lock_major, new_minor),</div><div class='del'>-			    rdtgrp, "%s", kn_name);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(dev)) {</div><div class='del'>-		ret = PTR_ERR(dev);</div><div class='del'>-		rdt_last_cmd_printf("Failed to create character device: %d\n",</div><div class='del'>-				    ret);</div><div class='del'>-		goto out_debugfs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* We released the mutex - check if group was removed while we did so */</div><div class='del'>-	if (rdtgrp-&gt;flags &amp; RDT_DELETED) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out_device;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	plr-&gt;minor = new_minor;</div><div class='del'>-</div><div class='del'>-	rdtgrp-&gt;mode = RDT_MODE_PSEUDO_LOCKED;</div><div class='del'>-	closid_free(rdtgrp-&gt;closid);</div><div class='del'>-	rdtgroup_kn_mode_restore(rdtgrp, "cpus", 0444);</div><div class='del'>-	rdtgroup_kn_mode_restore(rdtgrp, "cpus_list", 0444);</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_device:</div><div class='del'>-	device_destroy(&amp;pseudo_lock_class, MKDEV(pseudo_lock_major, new_minor));</div><div class='del'>-out_debugfs:</div><div class='del'>-	debugfs_remove_recursive(plr-&gt;debugfs_dir);</div><div class='del'>-	pseudo_lock_minor_release(new_minor);</div><div class='del'>-out_cstates:</div><div class='del'>-	pseudo_lock_cstates_relax(plr);</div><div class='del'>-out_region:</div><div class='del'>-	pseudo_lock_region_clear(plr);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_pseudo_lock_remove - Remove a pseudo-locked region</div><div class='del'>- * @rdtgrp: resource group to which the pseudo-locked region belongs</div><div class='del'>- *</div><div class='del'>- * The removal of a pseudo-locked region can be initiated when the resource</div><div class='del'>- * group is removed from user space via a "rmdir" from userspace or the</div><div class='del'>- * unmount of the resctrl filesystem. On removal the resource group does</div><div class='del'>- * not go back to pseudo-locksetup mode before it is removed, instead it is</div><div class='del'>- * removed directly. There is thus asymmetry with the creation where the</div><div class='del'>- * &amp;struct pseudo_lock_region is removed here while it was not created in</div><div class='del'>- * rdtgroup_pseudo_lock_create().</div><div class='del'>- *</div><div class='del'>- * Return: void</div><div class='del'>- */</div><div class='del'>-void rdtgroup_pseudo_lock_remove(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	struct pseudo_lock_region *plr = rdtgrp-&gt;plr;</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-		/*</div><div class='del'>-		 * Default group cannot be a pseudo-locked region so we can</div><div class='del'>-		 * free closid here.</div><div class='del'>-		 */</div><div class='del'>-		closid_free(rdtgrp-&gt;closid);</div><div class='del'>-		goto free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pseudo_lock_cstates_relax(plr);</div><div class='del'>-	debugfs_remove_recursive(rdtgrp-&gt;plr-&gt;debugfs_dir);</div><div class='del'>-	device_destroy(&amp;pseudo_lock_class, MKDEV(pseudo_lock_major, plr-&gt;minor));</div><div class='del'>-	pseudo_lock_minor_release(plr-&gt;minor);</div><div class='del'>-</div><div class='del'>-free:</div><div class='del'>-	pseudo_lock_free(rdtgrp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pseudo_lock_dev_open(struct inode *inode, struct file *filp)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rdtgrp = region_find_by_minor(iminor(inode));</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	filp-&gt;private_data = rdtgrp;</div><div class='del'>-	atomic_inc(&amp;rdtgrp-&gt;waitcount);</div><div class='del'>-	/* Perform a non-seekable open - llseek is not supported */</div><div class='del'>-	filp-&gt;f_mode &amp;= ~(FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pseudo_lock_dev_release(struct inode *inode, struct file *filp)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-	rdtgrp = filp-&gt;private_data;</div><div class='del'>-	WARN_ON(!rdtgrp);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	filp-&gt;private_data = NULL;</div><div class='del'>-	atomic_dec(&amp;rdtgrp-&gt;waitcount);</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pseudo_lock_dev_mremap(struct vm_area_struct *area)</div><div class='del'>-{</div><div class='del'>-	/* Not supported */</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct vm_operations_struct pseudo_mmap_ops = {</div><div class='del'>-	.mremap = pseudo_lock_dev_mremap,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int pseudo_lock_dev_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='del'>-{</div><div class='del'>-	unsigned long vsize = vma-&gt;vm_end - vma-&gt;vm_start;</div><div class='del'>-	unsigned long off = vma-&gt;vm_pgoff &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	struct pseudo_lock_region *plr;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	unsigned long physical;</div><div class='del'>-	unsigned long psize;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rdtgrp = filp-&gt;private_data;</div><div class='del'>-	WARN_ON(!rdtgrp);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	plr = rdtgrp-&gt;plr;</div><div class='del'>-</div><div class='del'>-	if (!plr-&gt;d) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Task is required to run with affinity to the cpus associated</div><div class='del'>-	 * with the pseudo-locked region. If this is not the case the task</div><div class='del'>-	 * may be scheduled elsewhere and invalidate entries in the</div><div class='del'>-	 * pseudo-locked region.</div><div class='del'>-	 */</div><div class='del'>-	if (!cpumask_subset(current-&gt;cpus_ptr, &amp;plr-&gt;d-&gt;hdr.cpu_mask)) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	physical = __pa(plr-&gt;kmem) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	psize = plr-&gt;size - off;</div><div class='del'>-</div><div class='del'>-	if (off &gt; plr-&gt;size) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure changes are carried directly to the memory being mapped,</div><div class='del'>-	 * do not allow copy-on-write mapping.</div><div class='del'>-	 */</div><div class='del'>-	if (!(vma-&gt;vm_flags &amp; VM_SHARED)) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vsize &gt; psize) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(plr-&gt;kmem + off, 0, vsize);</div><div class='del'>-</div><div class='del'>-	if (remap_pfn_range(vma, vma-&gt;vm_start, physical + vma-&gt;vm_pgoff,</div><div class='del'>-			    vsize, vma-&gt;vm_page_prot)) {</div><div class='del'>-		mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-	vma-&gt;vm_ops = &amp;pseudo_mmap_ops;</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations pseudo_lock_dev_fops = {</div><div class='del'>-	.owner =	THIS_MODULE,</div><div class='del'>-	.read =		NULL,</div><div class='del'>-	.write =	NULL,</div><div class='del'>-	.open =		pseudo_lock_dev_open,</div><div class='del'>-	.release =	pseudo_lock_dev_release,</div><div class='del'>-	.mmap =		pseudo_lock_dev_mmap,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int rdt_pseudo_lock_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = register_chrdev(0, "pseudo_lock", &amp;pseudo_lock_dev_fops);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	pseudo_lock_major = ret;</div><div class='del'>-</div><div class='del'>-	ret = class_register(&amp;pseudo_lock_class);</div><div class='del'>-	if (ret) {</div><div class='del'>-		unregister_chrdev(pseudo_lock_major, "pseudo_lock");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void rdt_pseudo_lock_release(void)</div><div class='del'>-{</div><div class='del'>-	class_unregister(&amp;pseudo_lock_class);</div><div class='del'>-	unregister_chrdev(pseudo_lock_major, "pseudo_lock");</div><div class='del'>-	pseudo_lock_major = 0;</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/trace.h b/arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h<br/>index 2a506316b303..7c8aef08010f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/trace.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/trace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/pseudo_lock_trace.h</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> #undef TRACE_SYSTEM</div><div class='ctx'> #define TRACE_SYSTEM resctrl</div><div class='ctx'> </div><div class='del'>-#if !defined(_TRACE_RESCTRL_H) || defined(TRACE_HEADER_MULTI_READ)</div><div class='del'>-#define _TRACE_RESCTRL_H</div><div class='add'>+#if !defined(_X86_RESCTRL_PSEUDO_LOCK_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)</div><div class='add'>+#define _X86_RESCTRL_PSEUDO_LOCK_TRACE_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/tracepoint.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -35,25 +35,11 @@ TRACE_EVENT(pseudo_lock_l3,</div><div class='ctx'> 	    TP_printk("hits=%llu miss=%llu",</div><div class='ctx'> 		      __entry-&gt;l3_hits, __entry-&gt;l3_miss));</div><div class='ctx'> </div><div class='del'>-TRACE_EVENT(mon_llc_occupancy_limbo,</div><div class='del'>-	    TP_PROTO(u32 ctrl_hw_id, u32 mon_hw_id, int domain_id, u64 llc_occupancy_bytes),</div><div class='del'>-	    TP_ARGS(ctrl_hw_id, mon_hw_id, domain_id, llc_occupancy_bytes),</div><div class='del'>-	    TP_STRUCT__entry(__field(u32, ctrl_hw_id)</div><div class='del'>-			     __field(u32, mon_hw_id)</div><div class='del'>-			     __field(int, domain_id)</div><div class='del'>-			     __field(u64, llc_occupancy_bytes)),</div><div class='del'>-	    TP_fast_assign(__entry-&gt;ctrl_hw_id = ctrl_hw_id;</div><div class='del'>-			   __entry-&gt;mon_hw_id = mon_hw_id;</div><div class='del'>-			   __entry-&gt;domain_id = domain_id;</div><div class='del'>-			   __entry-&gt;llc_occupancy_bytes = llc_occupancy_bytes;),</div><div class='del'>-	    TP_printk("ctrl_hw_id=%u mon_hw_id=%u domain_id=%d llc_occupancy_bytes=%llu",</div><div class='del'>-		      __entry-&gt;ctrl_hw_id, __entry-&gt;mon_hw_id, __entry-&gt;domain_id,</div><div class='del'>-		      __entry-&gt;llc_occupancy_bytes)</div><div class='del'>-	   );</div><div class='del'>-</div><div class='del'>-#endif /* _TRACE_RESCTRL_H */</div><div class='add'>+#endif /* _X86_RESCTRL_PSEUDO_LOCK_TRACE_H */</div><div class='ctx'> </div><div class='ctx'> #undef TRACE_INCLUDE_PATH</div><div class='ctx'> #define TRACE_INCLUDE_PATH .</div><div class='del'>-#define TRACE_INCLUDE_FILE trace</div><div class='add'>+</div><div class='add'>+#define TRACE_INCLUDE_FILE pseudo_lock_trace</div><div class='add'>+</div><div class='ctx'> #include &lt;trace/define_trace.h&gt;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c<br/>index 93ec829015f1..885026468440 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/rdtgroup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/resctrl/rdtgroup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/resctrl/rdtgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/resctrl/rdtgroup.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/fs_parser.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/kernfs.h&gt;</div><div class='add'>+#include &lt;linux/resctrl.h&gt;</div><div class='ctx'> #include &lt;linux/seq_buf.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/sched/signal.h&gt;</div><div class='hunk'>@@ -28,341 +29,17 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/linux/magic.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/resctrl.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "internal.h"</div><div class='ctx'> </div><div class='ctx'> DEFINE_STATIC_KEY_FALSE(rdt_enable_key);</div><div class='del'>-DEFINE_STATIC_KEY_FALSE(rdt_mon_enable_key);</div><div class='del'>-DEFINE_STATIC_KEY_FALSE(rdt_alloc_enable_key);</div><div class='del'>-</div><div class='del'>-/* Mutex to protect rdtgroup access. */</div><div class='del'>-DEFINE_MUTEX(rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-static struct kernfs_root *rdt_root;</div><div class='del'>-struct rdtgroup rdtgroup_default;</div><div class='del'>-LIST_HEAD(rdt_all_groups);</div><div class='del'>-</div><div class='del'>-/* list of entries for the schemata file */</div><div class='del'>-LIST_HEAD(resctrl_schema_all);</div><div class='del'>-</div><div class='del'>-/* The filesystem can only be mounted once. */</div><div class='del'>-bool resctrl_mounted;</div><div class='del'>-</div><div class='del'>-/* Kernel fs node for "info" directory under root */</div><div class='del'>-static struct kernfs_node *kn_info;</div><div class='del'>-</div><div class='del'>-/* Kernel fs node for "mon_groups" directory under root */</div><div class='del'>-static struct kernfs_node *kn_mongrp;</div><div class='del'>-</div><div class='del'>-/* Kernel fs node for "mon_data" directory under root */</div><div class='del'>-static struct kernfs_node *kn_mondata;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Used to store the max resource name width to display the schemata names in</div><div class='del'>- * a tabular format.</div><div class='del'>- */</div><div class='del'>-int max_name_width;</div><div class='del'>-</div><div class='del'>-static struct seq_buf last_cmd_status;</div><div class='del'>-static char last_cmd_status_buf[512];</div><div class='del'>-</div><div class='del'>-static int rdtgroup_setup_root(struct rdt_fs_context *ctx);</div><div class='del'>-static void rdtgroup_destroy_root(void);</div><div class='del'>-</div><div class='del'>-struct dentry *debugfs_resctrl;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Memory bandwidth monitoring event to use for the default CTRL_MON group</div><div class='del'>- * and each new CTRL_MON group created by the user.  Only relevant when</div><div class='del'>- * the filesystem is mounted with the "mba_MBps" option so it does not</div><div class='del'>- * matter that it remains uninitialized on systems that do not support</div><div class='del'>- * the "mba_MBps" option.</div><div class='del'>- */</div><div class='del'>-enum resctrl_event_id mba_mbps_default_event;</div><div class='del'>-</div><div class='del'>-static bool resctrl_debug;</div><div class='del'>-</div><div class='del'>-void rdt_last_cmd_clear(void)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-	seq_buf_clear(&amp;last_cmd_status);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void rdt_last_cmd_puts(const char *s)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-	seq_buf_puts(&amp;last_cmd_status, s);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void rdt_last_cmd_printf(const char *fmt, ...)</div><div class='del'>-{</div><div class='del'>-	va_list ap;</div><div class='del'>-</div><div class='del'>-	va_start(ap, fmt);</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-	seq_buf_vprintf(&amp;last_cmd_status, fmt, ap);</div><div class='del'>-	va_end(ap);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void rdt_staged_configs_clear(void)</div><div class='del'>-{</div><div class='del'>-	struct rdt_ctrl_domain *dom;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	for_each_alloc_capable_rdt_resource(r) {</div><div class='del'>-		list_for_each_entry(dom, &amp;r-&gt;ctrl_domains, hdr.list)</div><div class='del'>-			memset(dom-&gt;staged_config, 0, sizeof(dom-&gt;staged_config));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool resctrl_is_mbm_enabled(void)</div><div class='del'>-{</div><div class='del'>-	return (resctrl_arch_is_mbm_total_enabled() ||</div><div class='del'>-		resctrl_arch_is_mbm_local_enabled());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool resctrl_is_mbm_event(int e)</div><div class='del'>-{</div><div class='del'>-	return (e &gt;= QOS_L3_MBM_TOTAL_EVENT_ID &amp;&amp;</div><div class='del'>-		e &lt;= QOS_L3_MBM_LOCAL_EVENT_ID);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Trivial allocator for CLOSIDs. Since h/w only supports a small number,</div><div class='del'>- * we can keep a bitmap of free CLOSIDs in a single integer.</div><div class='del'>- *</div><div class='del'>- * Using a global CLOSID across all resources has some advantages and</div><div class='del'>- * some drawbacks:</div><div class='del'>- * + We can simply set current's closid to assign a task to a resource</div><div class='del'>- *   group.</div><div class='del'>- * + Context switch code can avoid extra memory references deciding which</div><div class='del'>- *   CLOSID to load into the PQR_ASSOC MSR</div><div class='del'>- * - We give up some options in configuring resource groups across multi-socket</div><div class='del'>- *   systems.</div><div class='del'>- * - Our choices on how to configure each resource become progressively more</div><div class='del'>- *   limited as the number of resources grows.</div><div class='del'>- */</div><div class='del'>-static unsigned long closid_free_map;</div><div class='del'>-static int closid_free_map_len;</div><div class='del'>-</div><div class='del'>-int closids_supported(void)</div><div class='del'>-{</div><div class='del'>-	return closid_free_map_len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void closid_init(void)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s;</div><div class='del'>-	u32 rdt_min_closid = 32;</div><div class='del'>-</div><div class='del'>-	/* Compute rdt_min_closid across all resources */</div><div class='del'>-	list_for_each_entry(s, &amp;resctrl_schema_all, list)</div><div class='del'>-		rdt_min_closid = min(rdt_min_closid, s-&gt;num_closid);</div><div class='del'>-</div><div class='del'>-	closid_free_map = BIT_MASK(rdt_min_closid) - 1;</div><div class='del'>-</div><div class='del'>-	/* RESCTRL_RESERVED_CLOSID is always reserved for the default group */</div><div class='del'>-	__clear_bit(RESCTRL_RESERVED_CLOSID, &amp;closid_free_map);</div><div class='del'>-	closid_free_map_len = rdt_min_closid;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int closid_alloc(void)</div><div class='del'>-{</div><div class='del'>-	int cleanest_closid;</div><div class='del'>-	u32 closid;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_RESCTRL_RMID_DEPENDS_ON_CLOSID) &amp;&amp;</div><div class='del'>-	    resctrl_arch_is_llc_occupancy_enabled()) {</div><div class='del'>-		cleanest_closid = resctrl_find_cleanest_closid();</div><div class='del'>-		if (cleanest_closid &lt; 0)</div><div class='del'>-			return cleanest_closid;</div><div class='del'>-		closid = cleanest_closid;</div><div class='del'>-	} else {</div><div class='del'>-		closid = ffs(closid_free_map);</div><div class='del'>-		if (closid == 0)</div><div class='del'>-			return -ENOSPC;</div><div class='del'>-		closid--;</div><div class='del'>-	}</div><div class='del'>-	__clear_bit(closid, &amp;closid_free_map);</div><div class='del'>-</div><div class='del'>-	return closid;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void closid_free(int closid)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	__set_bit(closid, &amp;closid_free_map);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * closid_allocated - test if provided closid is in use</div><div class='del'>- * @closid: closid to be tested</div><div class='del'>- *</div><div class='del'>- * Return: true if @closid is currently associated with a resource group,</div><div class='del'>- * false if @closid is free</div><div class='del'>- */</div><div class='del'>-bool closid_allocated(unsigned int closid)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	return !test_bit(closid, &amp;closid_free_map);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_mode_by_closid - Return mode of resource group with closid</div><div class='del'>- * @closid: closid if the resource group</div><div class='del'>- *</div><div class='del'>- * Each resource group is associated with a @closid. Here the mode</div><div class='del'>- * of a resource group can be queried by searching for it using its closid.</div><div class='del'>- *</div><div class='del'>- * Return: mode as &amp;enum rdtgrp_mode of resource group with closid @closid</div><div class='del'>- */</div><div class='del'>-enum rdtgrp_mode rdtgroup_mode_by_closid(int closid)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(rdtgrp, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		if (rdtgrp-&gt;closid == closid)</div><div class='del'>-			return rdtgrp-&gt;mode;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return RDT_NUM_MODES;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char * const rdt_mode_str[] = {</div><div class='del'>-	[RDT_MODE_SHAREABLE]		= "shareable",</div><div class='del'>-	[RDT_MODE_EXCLUSIVE]		= "exclusive",</div><div class='del'>-	[RDT_MODE_PSEUDO_LOCKSETUP]	= "pseudo-locksetup",</div><div class='del'>-	[RDT_MODE_PSEUDO_LOCKED]	= "pseudo-locked",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_mode_str - Return the string representation of mode</div><div class='del'>- * @mode: the resource group mode as &amp;enum rdtgroup_mode</div><div class='del'>- *</div><div class='del'>- * Return: string representation of valid mode, "unknown" otherwise</div><div class='del'>- */</div><div class='del'>-static const char *rdtgroup_mode_str(enum rdtgrp_mode mode)</div><div class='del'>-{</div><div class='del'>-	if (mode &lt; RDT_MODE_SHAREABLE || mode &gt;= RDT_NUM_MODES)</div><div class='del'>-		return "unknown";</div><div class='del'>-</div><div class='del'>-	return rdt_mode_str[mode];</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-/* set uid and gid of rdtgroup dirs and files to that of the creator */</div><div class='del'>-static int rdtgroup_kn_set_ugid(struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	struct iattr iattr = { .ia_valid = ATTR_UID | ATTR_GID,</div><div class='del'>-				.ia_uid = current_fsuid(),</div><div class='del'>-				.ia_gid = current_fsgid(), };</div><div class='del'>-</div><div class='del'>-	if (uid_eq(iattr.ia_uid, GLOBAL_ROOT_UID) &amp;&amp;</div><div class='del'>-	    gid_eq(iattr.ia_gid, GLOBAL_ROOT_GID))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return kernfs_setattr(kn, &amp;iattr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_add_file(struct kernfs_node *parent_kn, struct rftype *rft)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	kn = __kernfs_create_file(parent_kn, rft-&gt;name, rft-&gt;mode,</div><div class='del'>-				  GLOBAL_ROOT_UID, GLOBAL_ROOT_GID,</div><div class='del'>-				  0, rft-&gt;kf_ops, rft, NULL, NULL);</div><div class='del'>-	if (IS_ERR(kn))</div><div class='del'>-		return PTR_ERR(kn);</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_set_ugid(kn);</div><div class='del'>-	if (ret) {</div><div class='del'>-		kernfs_remove(kn);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_seqfile_show(struct seq_file *m, void *arg)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_open_file *of = m-&gt;private;</div><div class='del'>-	struct rftype *rft = of-&gt;kn-&gt;priv;</div><div class='del'>-</div><div class='del'>-	if (rft-&gt;seq_show)</div><div class='del'>-		return rft-&gt;seq_show(of, m, arg);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t rdtgroup_file_write(struct kernfs_open_file *of, char *buf,</div><div class='del'>-				   size_t nbytes, loff_t off)</div><div class='del'>-{</div><div class='del'>-	struct rftype *rft = of-&gt;kn-&gt;priv;</div><div class='del'>-</div><div class='del'>-	if (rft-&gt;write)</div><div class='del'>-		return rft-&gt;write(of, buf, nbytes, off);</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct kernfs_ops rdtgroup_kf_single_ops = {</div><div class='del'>-	.atomic_write_len	= PAGE_SIZE,</div><div class='del'>-	.write			= rdtgroup_file_write,</div><div class='del'>-	.seq_show		= rdtgroup_seqfile_show,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct kernfs_ops kf_mondata_ops = {</div><div class='del'>-	.atomic_write_len	= PAGE_SIZE,</div><div class='del'>-	.seq_show		= rdtgroup_mondata_show,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool is_cpu_list(struct kernfs_open_file *of)</div><div class='del'>-{</div><div class='del'>-	struct rftype *rft = of-&gt;kn-&gt;priv;</div><div class='del'>-</div><div class='del'>-	return rft-&gt;flags &amp; RFTYPE_FLAGS_CPUS_LIST;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_cpus_show(struct kernfs_open_file *of,</div><div class='del'>-			      struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	struct cpumask *mask;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	if (rdtgrp) {</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED) {</div><div class='del'>-			if (!rdtgrp-&gt;plr-&gt;d) {</div><div class='del'>-				rdt_last_cmd_clear();</div><div class='del'>-				rdt_last_cmd_puts("Cache domain offline\n");</div><div class='del'>-				ret = -ENODEV;</div><div class='del'>-			} else {</div><div class='del'>-				mask = &amp;rdtgrp-&gt;plr-&gt;d-&gt;hdr.cpu_mask;</div><div class='del'>-				seq_printf(s, is_cpu_list(of) ?</div><div class='del'>-					   "%*pbl\n" : "%*pb\n",</div><div class='del'>-					   cpumask_pr_args(mask));</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			seq_printf(s, is_cpu_list(of) ? "%*pbl\n" : "%*pb\n",</div><div class='del'>-				   cpumask_pr_args(&amp;rdtgrp-&gt;cpu_mask));</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-	}</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(rdt_mon_enable_key);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(rdt_alloc_enable_key);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * This is safe against resctrl_sched_in() called from __switch_to()</div><div class='add'>+ * This is safe against resctrl_arch_sched_in() called from __switch_to()</div><div class='ctx'>  * because __switch_to() is executed with interrupts disabled. A local call</div><div class='ctx'>  * from update_closid_rmid() is protected against __switch_to() because</div><div class='ctx'>  * preemption is disabled.</div><div class='hunk'>@@ -381,1223 +58,7 @@ void resctrl_arch_sync_cpu_closid_rmid(void *info)</div><div class='ctx'> 	 * executing task might have its own closid selected. Just reuse</div><div class='ctx'> 	 * the context switch code.</div><div class='ctx'> 	 */</div><div class='del'>-	resctrl_sched_in(current);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Update the PGR_ASSOC MSR on all cpus in @cpu_mask,</div><div class='del'>- *</div><div class='del'>- * Per task closids/rmids must have been set up before calling this function.</div><div class='del'>- * @r may be NULL.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-update_closid_rmid(const struct cpumask *cpu_mask, struct rdtgroup *r)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_cpu_defaults defaults, *p = NULL;</div><div class='del'>-</div><div class='del'>-	if (r) {</div><div class='del'>-		defaults.closid = r-&gt;closid;</div><div class='del'>-		defaults.rmid = r-&gt;mon.rmid;</div><div class='del'>-		p = &amp;defaults;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	on_each_cpu_mask(cpu_mask, resctrl_arch_sync_cpu_closid_rmid, p, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cpus_mon_write(struct rdtgroup *rdtgrp, cpumask_var_t newmask,</div><div class='del'>-			  cpumask_var_t tmpmask)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *prgrp = rdtgrp-&gt;mon.parent, *crgrp;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-</div><div class='del'>-	/* Check whether cpus belong to parent ctrl group */</div><div class='del'>-	cpumask_andnot(tmpmask, newmask, &amp;prgrp-&gt;cpu_mask);</div><div class='del'>-	if (!cpumask_empty(tmpmask)) {</div><div class='del'>-		rdt_last_cmd_puts("Can only add CPUs to mongroup that belong to parent\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check whether cpus are dropped from this group */</div><div class='del'>-	cpumask_andnot(tmpmask, &amp;rdtgrp-&gt;cpu_mask, newmask);</div><div class='del'>-	if (!cpumask_empty(tmpmask)) {</div><div class='del'>-		/* Give any dropped cpus to parent rdtgroup */</div><div class='del'>-		cpumask_or(&amp;prgrp-&gt;cpu_mask, &amp;prgrp-&gt;cpu_mask, tmpmask);</div><div class='del'>-		update_closid_rmid(tmpmask, prgrp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we added cpus, remove them from previous group that owned them</div><div class='del'>-	 * and update per-cpu rmid</div><div class='del'>-	 */</div><div class='del'>-	cpumask_andnot(tmpmask, newmask, &amp;rdtgrp-&gt;cpu_mask);</div><div class='del'>-	if (!cpumask_empty(tmpmask)) {</div><div class='del'>-		head = &amp;prgrp-&gt;mon.crdtgrp_list;</div><div class='del'>-		list_for_each_entry(crgrp, head, mon.crdtgrp_list) {</div><div class='del'>-			if (crgrp == rdtgrp)</div><div class='del'>-				continue;</div><div class='del'>-			cpumask_andnot(&amp;crgrp-&gt;cpu_mask, &amp;crgrp-&gt;cpu_mask,</div><div class='del'>-				       tmpmask);</div><div class='del'>-		}</div><div class='del'>-		update_closid_rmid(tmpmask, rdtgrp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Done pushing/pulling - update this group with new mask */</div><div class='del'>-	cpumask_copy(&amp;rdtgrp-&gt;cpu_mask, newmask);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cpumask_rdtgrp_clear(struct rdtgroup *r, struct cpumask *m)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *crgrp;</div><div class='del'>-</div><div class='del'>-	cpumask_andnot(&amp;r-&gt;cpu_mask, &amp;r-&gt;cpu_mask, m);</div><div class='del'>-	/* update the child mon group masks as well*/</div><div class='del'>-	list_for_each_entry(crgrp, &amp;r-&gt;mon.crdtgrp_list, mon.crdtgrp_list)</div><div class='del'>-		cpumask_and(&amp;crgrp-&gt;cpu_mask, &amp;r-&gt;cpu_mask, &amp;crgrp-&gt;cpu_mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cpus_ctrl_write(struct rdtgroup *rdtgrp, cpumask_var_t newmask,</div><div class='del'>-			   cpumask_var_t tmpmask, cpumask_var_t tmpmask1)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *r, *crgrp;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-</div><div class='del'>-	/* Check whether cpus are dropped from this group */</div><div class='del'>-	cpumask_andnot(tmpmask, &amp;rdtgrp-&gt;cpu_mask, newmask);</div><div class='del'>-	if (!cpumask_empty(tmpmask)) {</div><div class='del'>-		/* Can't drop from default group */</div><div class='del'>-		if (rdtgrp == &amp;rdtgroup_default) {</div><div class='del'>-			rdt_last_cmd_puts("Can't drop CPUs from default group\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Give any dropped cpus to rdtgroup_default */</div><div class='del'>-		cpumask_or(&amp;rdtgroup_default.cpu_mask,</div><div class='del'>-			   &amp;rdtgroup_default.cpu_mask, tmpmask);</div><div class='del'>-		update_closid_rmid(tmpmask, &amp;rdtgroup_default);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we added cpus, remove them from previous group and</div><div class='del'>-	 * the prev group's child groups that owned them</div><div class='del'>-	 * and update per-cpu closid/rmid.</div><div class='del'>-	 */</div><div class='del'>-	cpumask_andnot(tmpmask, newmask, &amp;rdtgrp-&gt;cpu_mask);</div><div class='del'>-	if (!cpumask_empty(tmpmask)) {</div><div class='del'>-		list_for_each_entry(r, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-			if (r == rdtgrp)</div><div class='del'>-				continue;</div><div class='del'>-			cpumask_and(tmpmask1, &amp;r-&gt;cpu_mask, tmpmask);</div><div class='del'>-			if (!cpumask_empty(tmpmask1))</div><div class='del'>-				cpumask_rdtgrp_clear(r, tmpmask1);</div><div class='del'>-		}</div><div class='del'>-		update_closid_rmid(tmpmask, rdtgrp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Done pushing/pulling - update this group with new mask */</div><div class='del'>-	cpumask_copy(&amp;rdtgrp-&gt;cpu_mask, newmask);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Clear child mon group masks since there is a new parent mask</div><div class='del'>-	 * now and update the rmid for the cpus the child lost.</div><div class='del'>-	 */</div><div class='del'>-	head = &amp;rdtgrp-&gt;mon.crdtgrp_list;</div><div class='del'>-	list_for_each_entry(crgrp, head, mon.crdtgrp_list) {</div><div class='del'>-		cpumask_and(tmpmask, &amp;rdtgrp-&gt;cpu_mask, &amp;crgrp-&gt;cpu_mask);</div><div class='del'>-		update_closid_rmid(tmpmask, rdtgrp);</div><div class='del'>-		cpumask_clear(&amp;crgrp-&gt;cpu_mask);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t rdtgroup_cpus_write(struct kernfs_open_file *of,</div><div class='del'>-				   char *buf, size_t nbytes, loff_t off)</div><div class='del'>-{</div><div class='del'>-	cpumask_var_t tmpmask, newmask, tmpmask1;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;tmpmask, GFP_KERNEL))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;newmask, GFP_KERNEL)) {</div><div class='del'>-		free_cpumask_var(tmpmask);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;tmpmask1, GFP_KERNEL)) {</div><div class='del'>-		free_cpumask_var(tmpmask);</div><div class='del'>-		free_cpumask_var(newmask);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED ||</div><div class='del'>-	    rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		rdt_last_cmd_puts("Pseudo-locking in progress\n");</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (is_cpu_list(of))</div><div class='del'>-		ret = cpulist_parse(buf, newmask);</div><div class='del'>-	else</div><div class='del'>-		ret = cpumask_parse(buf, newmask);</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		rdt_last_cmd_puts("Bad CPU list/mask\n");</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* check that user didn't specify any offline cpus */</div><div class='del'>-	cpumask_andnot(tmpmask, newmask, cpu_online_mask);</div><div class='del'>-	if (!cpumask_empty(tmpmask)) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		rdt_last_cmd_puts("Can only assign online CPUs\n");</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;type == RDTCTRL_GROUP)</div><div class='del'>-		ret = cpus_ctrl_write(rdtgrp, newmask, tmpmask, tmpmask1);</div><div class='del'>-	else if (rdtgrp-&gt;type == RDTMON_GROUP)</div><div class='del'>-		ret = cpus_mon_write(rdtgrp, newmask, tmpmask);</div><div class='del'>-	else</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-</div><div class='del'>-unlock:</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-	free_cpumask_var(tmpmask);</div><div class='del'>-	free_cpumask_var(newmask);</div><div class='del'>-	free_cpumask_var(tmpmask1);</div><div class='del'>-</div><div class='del'>-	return ret ?: nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_remove - the helper to remove resource group safely</div><div class='del'>- * @rdtgrp: resource group to remove</div><div class='del'>- *</div><div class='del'>- * On resource group creation via a mkdir, an extra kernfs_node reference is</div><div class='del'>- * taken to ensure that the rdtgroup structure remains accessible for the</div><div class='del'>- * rdtgroup_kn_unlock() calls where it is removed.</div><div class='del'>- *</div><div class='del'>- * Drop the extra reference here, then free the rdtgroup structure.</div><div class='del'>- *</div><div class='del'>- * Return: void</div><div class='del'>- */</div><div class='del'>-static void rdtgroup_remove(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	kernfs_put(rdtgrp-&gt;kn);</div><div class='del'>-	kfree(rdtgrp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _update_task_closid_rmid(void *task)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * If the task is still current on this CPU, update PQR_ASSOC MSR.</div><div class='del'>-	 * Otherwise, the MSR is updated when the task is scheduled in.</div><div class='del'>-	 */</div><div class='del'>-	if (task == current)</div><div class='del'>-		resctrl_sched_in(task);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void update_task_closid_rmid(struct task_struct *t)</div><div class='del'>-{</div><div class='del'>-	if (IS_ENABLED(CONFIG_SMP) &amp;&amp; task_curr(t))</div><div class='del'>-		smp_call_function_single(task_cpu(t), _update_task_closid_rmid, t, 1);</div><div class='del'>-	else</div><div class='del'>-		_update_task_closid_rmid(t);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool task_in_rdtgroup(struct task_struct *tsk, struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	u32 closid, rmid = rdtgrp-&gt;mon.rmid;</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;type == RDTCTRL_GROUP)</div><div class='del'>-		closid = rdtgrp-&gt;closid;</div><div class='del'>-	else if (rdtgrp-&gt;type == RDTMON_GROUP)</div><div class='del'>-		closid = rdtgrp-&gt;mon.parent-&gt;closid;</div><div class='del'>-	else</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return resctrl_arch_match_closid(tsk, closid) &amp;&amp;</div><div class='del'>-	       resctrl_arch_match_rmid(tsk, closid, rmid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __rdtgroup_move_task(struct task_struct *tsk,</div><div class='del'>-				struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	/* If the task is already in rdtgrp, no need to move the task. */</div><div class='del'>-	if (task_in_rdtgroup(tsk, rdtgrp))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set the task's closid/rmid before the PQR_ASSOC MSR can be</div><div class='del'>-	 * updated by them.</div><div class='del'>-	 *</div><div class='del'>-	 * For ctrl_mon groups, move both closid and rmid.</div><div class='del'>-	 * For monitor groups, can move the tasks only from</div><div class='del'>-	 * their parent CTRL group.</div><div class='del'>-	 */</div><div class='del'>-	if (rdtgrp-&gt;type == RDTMON_GROUP &amp;&amp;</div><div class='del'>-	    !resctrl_arch_match_closid(tsk, rdtgrp-&gt;mon.parent-&gt;closid)) {</div><div class='del'>-		rdt_last_cmd_puts("Can't move task to different control group\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;type == RDTMON_GROUP)</div><div class='del'>-		resctrl_arch_set_closid_rmid(tsk, rdtgrp-&gt;mon.parent-&gt;closid,</div><div class='del'>-					     rdtgrp-&gt;mon.rmid);</div><div class='del'>-	else</div><div class='del'>-		resctrl_arch_set_closid_rmid(tsk, rdtgrp-&gt;closid,</div><div class='del'>-					     rdtgrp-&gt;mon.rmid);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Ensure the task's closid and rmid are written before determining if</div><div class='del'>-	 * the task is current that will decide if it will be interrupted.</div><div class='del'>-	 * This pairs with the full barrier between the rq-&gt;curr update and</div><div class='del'>-	 * resctrl_sched_in() during context switch.</div><div class='del'>-	 */</div><div class='del'>-	smp_mb();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * By now, the task's closid and rmid are set. If the task is current</div><div class='del'>-	 * on a CPU, the PQR_ASSOC MSR needs to be updated to make the resource</div><div class='del'>-	 * group go into effect. If the task is not current, the MSR will be</div><div class='del'>-	 * updated when the task is scheduled in.</div><div class='del'>-	 */</div><div class='del'>-	update_task_closid_rmid(tsk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool is_closid_match(struct task_struct *t, struct rdtgroup *r)</div><div class='del'>-{</div><div class='del'>-	return (resctrl_arch_alloc_capable() &amp;&amp; (r-&gt;type == RDTCTRL_GROUP) &amp;&amp;</div><div class='del'>-		resctrl_arch_match_closid(t, r-&gt;closid));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool is_rmid_match(struct task_struct *t, struct rdtgroup *r)</div><div class='del'>-{</div><div class='del'>-	return (resctrl_arch_mon_capable() &amp;&amp; (r-&gt;type == RDTMON_GROUP) &amp;&amp;</div><div class='del'>-		resctrl_arch_match_rmid(t, r-&gt;mon.parent-&gt;closid,</div><div class='del'>-					r-&gt;mon.rmid));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_tasks_assigned - Test if tasks have been assigned to resource group</div><div class='del'>- * @r: Resource group</div><div class='del'>- *</div><div class='del'>- * Return: 1 if tasks have been assigned to @r, 0 otherwise</div><div class='del'>- */</div><div class='del'>-int rdtgroup_tasks_assigned(struct rdtgroup *r)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *p, *t;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	for_each_process_thread(p, t) {</div><div class='del'>-		if (is_closid_match(t, r) || is_rmid_match(t, r)) {</div><div class='del'>-			ret = 1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_task_write_permission(struct task_struct *task,</div><div class='del'>-					  struct kernfs_open_file *of)</div><div class='del'>-{</div><div class='del'>-	const struct cred *tcred = get_task_cred(task);</div><div class='del'>-	const struct cred *cred = current_cred();</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Even if we're attaching all tasks in the thread group, we only</div><div class='del'>-	 * need to check permissions on one of them.</div><div class='del'>-	 */</div><div class='del'>-	if (!uid_eq(cred-&gt;euid, GLOBAL_ROOT_UID) &amp;&amp;</div><div class='del'>-	    !uid_eq(cred-&gt;euid, tcred-&gt;uid) &amp;&amp;</div><div class='del'>-	    !uid_eq(cred-&gt;euid, tcred-&gt;suid)) {</div><div class='del'>-		rdt_last_cmd_printf("No permission to move task %d\n", task-&gt;pid);</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	put_cred(tcred);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_move_task(pid_t pid, struct rdtgroup *rdtgrp,</div><div class='del'>-			      struct kernfs_open_file *of)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *tsk;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	if (pid) {</div><div class='del'>-		tsk = find_task_by_vpid(pid);</div><div class='del'>-		if (!tsk) {</div><div class='del'>-			rcu_read_unlock();</div><div class='del'>-			rdt_last_cmd_printf("No task %d\n", pid);</div><div class='del'>-			return -ESRCH;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		tsk = current;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	get_task_struct(tsk);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_task_write_permission(tsk, of);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = __rdtgroup_move_task(tsk, rdtgrp);</div><div class='del'>-</div><div class='del'>-	put_task_struct(tsk);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t rdtgroup_tasks_write(struct kernfs_open_file *of,</div><div class='del'>-				    char *buf, size_t nbytes, loff_t off)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	char *pid_str;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	pid_t pid;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED ||</div><div class='del'>-	    rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		rdt_last_cmd_puts("Pseudo-locking in progress\n");</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (buf &amp;&amp; buf[0] != '\0' &amp;&amp; buf[0] != '\n') {</div><div class='del'>-		pid_str = strim(strsep(&amp;buf, ","));</div><div class='del'>-</div><div class='del'>-		if (kstrtoint(pid_str, 0, &amp;pid)) {</div><div class='del'>-			rdt_last_cmd_printf("Task list parsing error pid %s\n", pid_str);</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (pid &lt; 0) {</div><div class='del'>-			rdt_last_cmd_printf("Invalid pid %d\n", pid);</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = rdtgroup_move_task(pid, rdtgrp, of);</div><div class='del'>-		if (ret) {</div><div class='del'>-			rdt_last_cmd_printf("Error while processing task %d\n", pid);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-unlock:</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return ret ?: nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void show_rdt_tasks(struct rdtgroup *r, struct seq_file *s)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *p, *t;</div><div class='del'>-	pid_t pid;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	for_each_process_thread(p, t) {</div><div class='del'>-		if (is_closid_match(t, r) || is_rmid_match(t, r)) {</div><div class='del'>-			pid = task_pid_vnr(t);</div><div class='del'>-			if (pid)</div><div class='del'>-				seq_printf(s, "%d\n", pid);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_tasks_show(struct kernfs_open_file *of,</div><div class='del'>-			       struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (rdtgrp)</div><div class='del'>-		show_rdt_tasks(rdtgrp, s);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_closid_show(struct kernfs_open_file *of,</div><div class='del'>-				struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (rdtgrp)</div><div class='del'>-		seq_printf(s, "%u\n", rdtgrp-&gt;closid);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_rmid_show(struct kernfs_open_file *of,</div><div class='del'>-			      struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (rdtgrp)</div><div class='del'>-		seq_printf(s, "%u\n", rdtgrp-&gt;mon.rmid);</div><div class='del'>-	else</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PROC_CPU_RESCTRL</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * A task can only be part of one resctrl control group and of one monitor</div><div class='del'>- * group which is associated to that control group.</div><div class='del'>- *</div><div class='del'>- * 1)   res:</div><div class='del'>- *      mon:</div><div class='del'>- *</div><div class='del'>- *    resctrl is not available.</div><div class='del'>- *</div><div class='del'>- * 2)   res:/</div><div class='del'>- *      mon:</div><div class='del'>- *</div><div class='del'>- *    Task is part of the root resctrl control group, and it is not associated</div><div class='del'>- *    to any monitor group.</div><div class='del'>- *</div><div class='del'>- * 3)  res:/</div><div class='del'>- *     mon:mon0</div><div class='del'>- *</div><div class='del'>- *    Task is part of the root resctrl control group and monitor group mon0.</div><div class='del'>- *</div><div class='del'>- * 4)  res:group0</div><div class='del'>- *     mon:</div><div class='del'>- *</div><div class='del'>- *    Task is part of resctrl control group group0, and it is not associated</div><div class='del'>- *    to any monitor group.</div><div class='del'>- *</div><div class='del'>- * 5) res:group0</div><div class='del'>- *    mon:mon1</div><div class='del'>- *</div><div class='del'>- *    Task is part of resctrl control group group0 and monitor group mon1.</div><div class='del'>- */</div><div class='del'>-int proc_resctrl_show(struct seq_file *s, struct pid_namespace *ns,</div><div class='del'>-		      struct pid *pid, struct task_struct *tsk)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtg;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	/* Return empty if resctrl has not been mounted. */</div><div class='del'>-	if (!resctrl_mounted) {</div><div class='del'>-		seq_puts(s, "res:\nmon:\n");</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(rdtg, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		struct rdtgroup *crg;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Task information is only relevant for shareable</div><div class='del'>-		 * and exclusive groups.</div><div class='del'>-		 */</div><div class='del'>-		if (rdtg-&gt;mode != RDT_MODE_SHAREABLE &amp;&amp;</div><div class='del'>-		    rdtg-&gt;mode != RDT_MODE_EXCLUSIVE)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!resctrl_arch_match_closid(tsk, rdtg-&gt;closid))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "res:%s%s\n", (rdtg == &amp;rdtgroup_default) ? "/" : "",</div><div class='del'>-			   rdt_kn_name(rdtg-&gt;kn));</div><div class='del'>-		seq_puts(s, "mon:");</div><div class='del'>-		list_for_each_entry(crg, &amp;rdtg-&gt;mon.crdtgrp_list,</div><div class='del'>-				    mon.crdtgrp_list) {</div><div class='del'>-			if (!resctrl_arch_match_rmid(tsk, crg-&gt;mon.parent-&gt;closid,</div><div class='del'>-						     crg-&gt;mon.rmid))</div><div class='del'>-				continue;</div><div class='del'>-			seq_printf(s, "%s", rdt_kn_name(crg-&gt;kn));</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		seq_putc(s, '\n');</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * The above search should succeed. Otherwise return</div><div class='del'>-	 * with an error.</div><div class='del'>-	 */</div><div class='del'>-	ret = -ENOENT;</div><div class='del'>-unlock:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int rdt_last_cmd_status_show(struct kernfs_open_file *of,</div><div class='del'>-				    struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-	len = seq_buf_used(&amp;last_cmd_status);</div><div class='del'>-	if (len)</div><div class='del'>-		seq_printf(seq, "%.*s", len, last_cmd_status_buf);</div><div class='del'>-	else</div><div class='del'>-		seq_puts(seq, "ok\n");</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void *rdt_kn_parent_priv(struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * The parent pointer is only valid within RCU section since it can be</div><div class='del'>-	 * replaced.</div><div class='del'>-	 */</div><div class='del'>-	guard(rcu)();</div><div class='del'>-	return rcu_dereference(kn-&gt;__parent)-&gt;priv;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_num_closids_show(struct kernfs_open_file *of,</div><div class='del'>-				struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%u\n", s-&gt;num_closid);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_default_ctrl_show(struct kernfs_open_file *of,</div><div class='del'>-			     struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%x\n", resctrl_get_default_ctrl(r));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_min_cbm_bits_show(struct kernfs_open_file *of,</div><div class='del'>-			     struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%u\n", r-&gt;cache.min_cbm_bits);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_shareable_bits_show(struct kernfs_open_file *of,</div><div class='del'>-				   struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%x\n", r-&gt;cache.shareable_bits);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * rdt_bit_usage_show - Display current usage of resources</div><div class='del'>- *</div><div class='del'>- * A domain is a shared resource that can now be allocated differently. Here</div><div class='del'>- * we display the current regions of the domain as an annotated bitmask.</div><div class='del'>- * For each domain of this resource its allocation bitmask</div><div class='del'>- * is annotated as below to indicate the current usage of the corresponding bit:</div><div class='del'>- *   0 - currently unused</div><div class='del'>- *   X - currently available for sharing and used by software and hardware</div><div class='del'>- *   H - currently used by hardware only but available for software use</div><div class='del'>- *   S - currently used and shareable by software only</div><div class='del'>- *   E - currently used exclusively by one resource group</div><div class='del'>- *   P - currently pseudo-locked by one resource group</div><div class='del'>- */</div><div class='del'>-static int rdt_bit_usage_show(struct kernfs_open_file *of,</div><div class='del'>-			      struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	/*</div><div class='del'>-	 * Use unsigned long even though only 32 bits are used to ensure</div><div class='del'>-	 * test_bit() is used safely.</div><div class='del'>-	 */</div><div class='del'>-	unsigned long sw_shareable = 0, hw_shareable = 0;</div><div class='del'>-	unsigned long exclusive = 0, pseudo_locked = 0;</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-	struct rdt_ctrl_domain *dom;</div><div class='del'>-	int i, hwb, swb, excl, psl;</div><div class='del'>-	enum rdtgrp_mode mode;</div><div class='del'>-	bool sep = false;</div><div class='del'>-	u32 ctrl_val;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-	hw_shareable = r-&gt;cache.shareable_bits;</div><div class='del'>-	list_for_each_entry(dom, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-		if (sep)</div><div class='del'>-			seq_putc(seq, ';');</div><div class='del'>-		sw_shareable = 0;</div><div class='del'>-		exclusive = 0;</div><div class='del'>-		seq_printf(seq, "%d=", dom-&gt;hdr.id);</div><div class='del'>-		for (i = 0; i &lt; closids_supported(); i++) {</div><div class='del'>-			if (!closid_allocated(i))</div><div class='del'>-				continue;</div><div class='del'>-			ctrl_val = resctrl_arch_get_config(r, dom, i,</div><div class='del'>-							   s-&gt;conf_type);</div><div class='del'>-			mode = rdtgroup_mode_by_closid(i);</div><div class='del'>-			switch (mode) {</div><div class='del'>-			case RDT_MODE_SHAREABLE:</div><div class='del'>-				sw_shareable |= ctrl_val;</div><div class='del'>-				break;</div><div class='del'>-			case RDT_MODE_EXCLUSIVE:</div><div class='del'>-				exclusive |= ctrl_val;</div><div class='del'>-				break;</div><div class='del'>-			case RDT_MODE_PSEUDO_LOCKSETUP:</div><div class='del'>-			/*</div><div class='del'>-			 * RDT_MODE_PSEUDO_LOCKSETUP is possible</div><div class='del'>-			 * here but not included since the CBM</div><div class='del'>-			 * associated with this CLOSID in this mode</div><div class='del'>-			 * is not initialized and no task or cpu can be</div><div class='del'>-			 * assigned this CLOSID.</div><div class='del'>-			 */</div><div class='del'>-				break;</div><div class='del'>-			case RDT_MODE_PSEUDO_LOCKED:</div><div class='del'>-			case RDT_NUM_MODES:</div><div class='del'>-				WARN(1,</div><div class='del'>-				     "invalid mode for closid %d\n", i);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		for (i = r-&gt;cache.cbm_len - 1; i &gt;= 0; i--) {</div><div class='del'>-			pseudo_locked = dom-&gt;plr ? dom-&gt;plr-&gt;cbm : 0;</div><div class='del'>-			hwb = test_bit(i, &amp;hw_shareable);</div><div class='del'>-			swb = test_bit(i, &amp;sw_shareable);</div><div class='del'>-			excl = test_bit(i, &amp;exclusive);</div><div class='del'>-			psl = test_bit(i, &amp;pseudo_locked);</div><div class='del'>-			if (hwb &amp;&amp; swb)</div><div class='del'>-				seq_putc(seq, 'X');</div><div class='del'>-			else if (hwb &amp;&amp; !swb)</div><div class='del'>-				seq_putc(seq, 'H');</div><div class='del'>-			else if (!hwb &amp;&amp; swb)</div><div class='del'>-				seq_putc(seq, 'S');</div><div class='del'>-			else if (excl)</div><div class='del'>-				seq_putc(seq, 'E');</div><div class='del'>-			else if (psl)</div><div class='del'>-				seq_putc(seq, 'P');</div><div class='del'>-			else /* Unused bits remain */</div><div class='del'>-				seq_putc(seq, '0');</div><div class='del'>-		}</div><div class='del'>-		sep = true;</div><div class='del'>-	}</div><div class='del'>-	seq_putc(seq, '\n');</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_min_bw_show(struct kernfs_open_file *of,</div><div class='del'>-			     struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%u\n", r-&gt;membw.min_bw);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_num_rmids_show(struct kernfs_open_file *of,</div><div class='del'>-			      struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%d\n", r-&gt;num_rmid);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_mon_features_show(struct kernfs_open_file *of,</div><div class='del'>-				 struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct mon_evt *mevt;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(mevt, &amp;r-&gt;evt_list, list) {</div><div class='del'>-		seq_printf(seq, "%s\n", mevt-&gt;name);</div><div class='del'>-		if (mevt-&gt;configurable)</div><div class='del'>-			seq_printf(seq, "%s_config\n", mevt-&gt;name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_bw_gran_show(struct kernfs_open_file *of,</div><div class='del'>-			     struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%u\n", r-&gt;membw.bw_gran);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_delay_linear_show(struct kernfs_open_file *of,</div><div class='del'>-			     struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%u\n", r-&gt;membw.delay_linear);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int max_threshold_occ_show(struct kernfs_open_file *of,</div><div class='del'>-				  struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	seq_printf(seq, "%u\n", resctrl_rmid_realloc_threshold);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_thread_throttle_mode_show(struct kernfs_open_file *of,</div><div class='del'>-					 struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	switch (r-&gt;membw.throttle_mode) {</div><div class='del'>-	case THREAD_THROTTLE_PER_THREAD:</div><div class='del'>-		seq_puts(seq, "per-thread\n");</div><div class='del'>-		return 0;</div><div class='del'>-	case THREAD_THROTTLE_MAX:</div><div class='del'>-		seq_puts(seq, "max\n");</div><div class='del'>-		return 0;</div><div class='del'>-	case THREAD_THROTTLE_UNDEFINED:</div><div class='del'>-		seq_puts(seq, "undefined\n");</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(1);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t max_threshold_occ_write(struct kernfs_open_file *of,</div><div class='del'>-				       char *buf, size_t nbytes, loff_t off)</div><div class='del'>-{</div><div class='del'>-	unsigned int bytes;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = kstrtouint(buf, 0, &amp;bytes);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (bytes &gt; resctrl_rmid_realloc_limit)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	resctrl_rmid_realloc_threshold = resctrl_arch_round_mon_val(bytes);</div><div class='del'>-</div><div class='del'>-	return nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * rdtgroup_mode_show - Display mode of this resource group</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_mode_show(struct kernfs_open_file *of,</div><div class='del'>-			      struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "%s\n", rdtgroup_mode_str(rdtgrp-&gt;mode));</div><div class='del'>-</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum resctrl_conf_type resctrl_peer_type(enum resctrl_conf_type my_type)</div><div class='del'>-{</div><div class='del'>-	switch (my_type) {</div><div class='del'>-	case CDP_CODE:</div><div class='del'>-		return CDP_DATA;</div><div class='del'>-	case CDP_DATA:</div><div class='del'>-		return CDP_CODE;</div><div class='del'>-	default:</div><div class='del'>-	case CDP_NONE:</div><div class='del'>-		return CDP_NONE;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_has_sparse_bitmasks_show(struct kernfs_open_file *of,</div><div class='del'>-					struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	seq_printf(seq, "%u\n", r-&gt;cache.arch_has_sparse_bitmasks);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * __rdtgroup_cbm_overlaps - Does CBM for intended closid overlap with other</div><div class='del'>- * @r: Resource to which domain instance @d belongs.</div><div class='del'>- * @d: The domain instance for which @closid is being tested.</div><div class='del'>- * @cbm: Capacity bitmask being tested.</div><div class='del'>- * @closid: Intended closid for @cbm.</div><div class='del'>- * @type: CDP type of @r.</div><div class='del'>- * @exclusive: Only check if overlaps with exclusive resource groups</div><div class='del'>- *</div><div class='del'>- * Checks if provided @cbm intended to be used for @closid on domain</div><div class='del'>- * @d overlaps with any other closids or other hardware usage associated</div><div class='del'>- * with this domain. If @exclusive is true then only overlaps with</div><div class='del'>- * resource groups in exclusive mode will be considered. If @exclusive</div><div class='del'>- * is false then overlaps with any resource group or hardware entities</div><div class='del'>- * will be considered.</div><div class='del'>- *</div><div class='del'>- * @cbm is unsigned long, even if only 32 bits are used, to make the</div><div class='del'>- * bitmap functions work correctly.</div><div class='del'>- *</div><div class='del'>- * Return: false if CBM does not overlap, true if it does.</div><div class='del'>- */</div><div class='del'>-static bool __rdtgroup_cbm_overlaps(struct rdt_resource *r, struct rdt_ctrl_domain *d,</div><div class='del'>-				    unsigned long cbm, int closid,</div><div class='del'>-				    enum resctrl_conf_type type, bool exclusive)</div><div class='del'>-{</div><div class='del'>-	enum rdtgrp_mode mode;</div><div class='del'>-	unsigned long ctrl_b;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Check for any overlap with regions used by hardware directly */</div><div class='del'>-	if (!exclusive) {</div><div class='del'>-		ctrl_b = r-&gt;cache.shareable_bits;</div><div class='del'>-		if (bitmap_intersects(&amp;cbm, &amp;ctrl_b, r-&gt;cache.cbm_len))</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check for overlap with other resource groups */</div><div class='del'>-	for (i = 0; i &lt; closids_supported(); i++) {</div><div class='del'>-		ctrl_b = resctrl_arch_get_config(r, d, i, type);</div><div class='del'>-		mode = rdtgroup_mode_by_closid(i);</div><div class='del'>-		if (closid_allocated(i) &amp;&amp; i != closid &amp;&amp;</div><div class='del'>-		    mode != RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-			if (bitmap_intersects(&amp;cbm, &amp;ctrl_b, r-&gt;cache.cbm_len)) {</div><div class='del'>-				if (exclusive) {</div><div class='del'>-					if (mode == RDT_MODE_EXCLUSIVE)</div><div class='del'>-						return true;</div><div class='del'>-					continue;</div><div class='del'>-				}</div><div class='del'>-				return true;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_cbm_overlaps - Does CBM overlap with other use of hardware</div><div class='del'>- * @s: Schema for the resource to which domain instance @d belongs.</div><div class='del'>- * @d: The domain instance for which @closid is being tested.</div><div class='del'>- * @cbm: Capacity bitmask being tested.</div><div class='del'>- * @closid: Intended closid for @cbm.</div><div class='del'>- * @exclusive: Only check if overlaps with exclusive resource groups</div><div class='del'>- *</div><div class='del'>- * Resources that can be allocated using a CBM can use the CBM to control</div><div class='del'>- * the overlap of these allocations. rdtgroup_cmb_overlaps() is the test</div><div class='del'>- * for overlap. Overlap test is not limited to the specific resource for</div><div class='del'>- * which the CBM is intended though - when dealing with CDP resources that</div><div class='del'>- * share the underlying hardware the overlap check should be performed on</div><div class='del'>- * the CDP resource sharing the hardware also.</div><div class='del'>- *</div><div class='del'>- * Refer to description of __rdtgroup_cbm_overlaps() for the details of the</div><div class='del'>- * overlap test.</div><div class='del'>- *</div><div class='del'>- * Return: true if CBM overlap detected, false if there is no overlap</div><div class='del'>- */</div><div class='del'>-bool rdtgroup_cbm_overlaps(struct resctrl_schema *s, struct rdt_ctrl_domain *d,</div><div class='del'>-			   unsigned long cbm, int closid, bool exclusive)</div><div class='del'>-{</div><div class='del'>-	enum resctrl_conf_type peer_type = resctrl_peer_type(s-&gt;conf_type);</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-</div><div class='del'>-	if (__rdtgroup_cbm_overlaps(r, d, cbm, closid, s-&gt;conf_type,</div><div class='del'>-				    exclusive))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	if (!resctrl_arch_get_cdp_enabled(r-&gt;rid))</div><div class='del'>-		return false;</div><div class='del'>-	return  __rdtgroup_cbm_overlaps(r, d, cbm, closid, peer_type, exclusive);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_mode_test_exclusive - Test if this resource group can be exclusive</div><div class='del'>- * @rdtgrp: Resource group identified through its closid.</div><div class='del'>- *</div><div class='del'>- * An exclusive resource group implies that there should be no sharing of</div><div class='del'>- * its allocated resources. At the time this group is considered to be</div><div class='del'>- * exclusive this test can determine if its current schemata supports this</div><div class='del'>- * setting by testing for overlap with all other resource groups.</div><div class='del'>- *</div><div class='del'>- * Return: true if resource group can be exclusive, false if there is overlap</div><div class='del'>- * with allocations of other resource groups and thus this resource group</div><div class='del'>- * cannot be exclusive.</div><div class='del'>- */</div><div class='del'>-static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	int closid = rdtgrp-&gt;closid;</div><div class='del'>-	struct rdt_ctrl_domain *d;</div><div class='del'>-	struct resctrl_schema *s;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	bool has_cache = false;</div><div class='del'>-	u32 ctrl;</div><div class='del'>-</div><div class='del'>-	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(s, &amp;resctrl_schema_all, list) {</div><div class='del'>-		r = s-&gt;res;</div><div class='del'>-		if (r-&gt;rid == RDT_RESOURCE_MBA || r-&gt;rid == RDT_RESOURCE_SMBA)</div><div class='del'>-			continue;</div><div class='del'>-		has_cache = true;</div><div class='del'>-		list_for_each_entry(d, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-			ctrl = resctrl_arch_get_config(r, d, closid,</div><div class='del'>-						       s-&gt;conf_type);</div><div class='del'>-			if (rdtgroup_cbm_overlaps(s, d, ctrl, closid, false)) {</div><div class='del'>-				rdt_last_cmd_puts("Schemata overlaps\n");</div><div class='del'>-				return false;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!has_cache) {</div><div class='del'>-		rdt_last_cmd_puts("Cannot be exclusive without CAT/CDP\n");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * rdtgroup_mode_write - Modify the resource group's mode</div><div class='del'>- */</div><div class='del'>-static ssize_t rdtgroup_mode_write(struct kernfs_open_file *of,</div><div class='del'>-				   char *buf, size_t nbytes, loff_t off)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	enum rdtgrp_mode mode;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	/* Valid input requires a trailing newline */</div><div class='del'>-	if (nbytes == 0 || buf[nbytes - 1] != '\n')</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	buf[nbytes - 1] = '\0';</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-</div><div class='del'>-	mode = rdtgrp-&gt;mode;</div><div class='del'>-</div><div class='del'>-	if ((!strcmp(buf, "shareable") &amp;&amp; mode == RDT_MODE_SHAREABLE) ||</div><div class='del'>-	    (!strcmp(buf, "exclusive") &amp;&amp; mode == RDT_MODE_EXCLUSIVE) ||</div><div class='del'>-	    (!strcmp(buf, "pseudo-locksetup") &amp;&amp;</div><div class='del'>-	     mode == RDT_MODE_PSEUDO_LOCKSETUP) ||</div><div class='del'>-	    (!strcmp(buf, "pseudo-locked") &amp;&amp; mode == RDT_MODE_PSEUDO_LOCKED))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (mode == RDT_MODE_PSEUDO_LOCKED) {</div><div class='del'>-		rdt_last_cmd_puts("Cannot change pseudo-locked group\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!strcmp(buf, "shareable")) {</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-			ret = rdtgroup_locksetup_exit(rdtgrp);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto out;</div><div class='del'>-		}</div><div class='del'>-		rdtgrp-&gt;mode = RDT_MODE_SHAREABLE;</div><div class='del'>-	} else if (!strcmp(buf, "exclusive")) {</div><div class='del'>-		if (!rdtgroup_mode_test_exclusive(rdtgrp)) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-			ret = rdtgroup_locksetup_exit(rdtgrp);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto out;</div><div class='del'>-		}</div><div class='del'>-		rdtgrp-&gt;mode = RDT_MODE_EXCLUSIVE;</div><div class='del'>-	} else if (IS_ENABLED(CONFIG_RESCTRL_FS_PSEUDO_LOCK) &amp;&amp;</div><div class='del'>-		   !strcmp(buf, "pseudo-locksetup")) {</div><div class='del'>-		ret = rdtgroup_locksetup_enter(rdtgrp);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-		rdtgrp-&gt;mode = RDT_MODE_PSEUDO_LOCKSETUP;</div><div class='del'>-	} else {</div><div class='del'>-		rdt_last_cmd_puts("Unknown or unsupported mode\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-	return ret ?: nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_cbm_to_size - Translate CBM to size in bytes</div><div class='del'>- * @r: RDT resource to which @d belongs.</div><div class='del'>- * @d: RDT domain instance.</div><div class='del'>- * @cbm: bitmask for which the size should be computed.</div><div class='del'>- *</div><div class='del'>- * The bitmask provided associated with the RDT domain instance @d will be</div><div class='del'>- * translated into how many bytes it represents. The size in bytes is</div><div class='del'>- * computed by first dividing the total cache size by the CBM length to</div><div class='del'>- * determine how many bytes each bit in the bitmask represents. The result</div><div class='del'>- * is multiplied with the number of bits set in the bitmask.</div><div class='del'>- *</div><div class='del'>- * @cbm is unsigned long, even if only 32 bits are used to make the</div><div class='del'>- * bitmap functions work correctly.</div><div class='del'>- */</div><div class='del'>-unsigned int rdtgroup_cbm_to_size(struct rdt_resource *r,</div><div class='del'>-				  struct rdt_ctrl_domain *d, unsigned long cbm)</div><div class='del'>-{</div><div class='del'>-	unsigned int size = 0;</div><div class='del'>-	struct cacheinfo *ci;</div><div class='del'>-	int num_b;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON_ONCE(r-&gt;ctrl_scope != RESCTRL_L2_CACHE &amp;&amp; r-&gt;ctrl_scope != RESCTRL_L3_CACHE))</div><div class='del'>-		return size;</div><div class='del'>-</div><div class='del'>-	num_b = bitmap_weight(&amp;cbm, r-&gt;cache.cbm_len);</div><div class='del'>-	ci = get_cpu_cacheinfo_level(cpumask_any(&amp;d-&gt;hdr.cpu_mask), r-&gt;ctrl_scope);</div><div class='del'>-	if (ci)</div><div class='del'>-		size = ci-&gt;size / r-&gt;cache.cbm_len * num_b;</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * rdtgroup_size_show - Display size in bytes of allocated regions</div><div class='del'>- *</div><div class='del'>- * The "size" file mirrors the layout of the "schemata" file, printing the</div><div class='del'>- * size in bytes of each region instead of the capacity bitmask.</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_size_show(struct kernfs_open_file *of,</div><div class='del'>-			      struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *schema;</div><div class='del'>-	enum resctrl_conf_type type;</div><div class='del'>-	struct rdt_ctrl_domain *d;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	unsigned int size;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	u32 closid;</div><div class='del'>-	bool sep;</div><div class='del'>-	u32 ctrl;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(of-&gt;kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED) {</div><div class='del'>-		if (!rdtgrp-&gt;plr-&gt;d) {</div><div class='del'>-			rdt_last_cmd_clear();</div><div class='del'>-			rdt_last_cmd_puts("Cache domain offline\n");</div><div class='del'>-			ret = -ENODEV;</div><div class='del'>-		} else {</div><div class='del'>-			seq_printf(s, "%*s:", max_name_width,</div><div class='del'>-				   rdtgrp-&gt;plr-&gt;s-&gt;name);</div><div class='del'>-			size = rdtgroup_cbm_to_size(rdtgrp-&gt;plr-&gt;s-&gt;res,</div><div class='del'>-						    rdtgrp-&gt;plr-&gt;d,</div><div class='del'>-						    rdtgrp-&gt;plr-&gt;cbm);</div><div class='del'>-			seq_printf(s, "%d=%u\n", rdtgrp-&gt;plr-&gt;d-&gt;hdr.id, size);</div><div class='del'>-		}</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	closid = rdtgrp-&gt;closid;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(schema, &amp;resctrl_schema_all, list) {</div><div class='del'>-		r = schema-&gt;res;</div><div class='del'>-		type = schema-&gt;conf_type;</div><div class='del'>-		sep = false;</div><div class='del'>-		seq_printf(s, "%*s:", max_name_width, schema-&gt;name);</div><div class='del'>-		list_for_each_entry(d, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-			if (sep)</div><div class='del'>-				seq_putc(s, ';');</div><div class='del'>-			if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP) {</div><div class='del'>-				size = 0;</div><div class='del'>-			} else {</div><div class='del'>-				if (is_mba_sc(r))</div><div class='del'>-					ctrl = d-&gt;mbps_val[closid];</div><div class='del'>-				else</div><div class='del'>-					ctrl = resctrl_arch_get_config(r, d,</div><div class='del'>-								       closid,</div><div class='del'>-								       type);</div><div class='del'>-				if (r-&gt;rid == RDT_RESOURCE_MBA ||</div><div class='del'>-				    r-&gt;rid == RDT_RESOURCE_SMBA)</div><div class='del'>-					size = ctrl;</div><div class='del'>-				else</div><div class='del'>-					size = rdtgroup_cbm_to_size(r, d, ctrl);</div><div class='del'>-			}</div><div class='del'>-			seq_printf(s, "%d=%u", d-&gt;hdr.id, size);</div><div class='del'>-			sep = true;</div><div class='del'>-		}</div><div class='del'>-		seq_putc(s, '\n');</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	rdtgroup_kn_unlock(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	resctrl_arch_sched_in(current);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define INVALID_CONFIG_INDEX   UINT_MAX</div><div class='hunk'>@@ -1635,68 +96,12 @@ void resctrl_arch_mon_event_config_read(void *_config_info)</div><div class='ctx'> 		pr_warn_once("Invalid event id %d\n", config_info-&gt;evtid);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval);</div><div class='add'>+	rdmsrq(MSR_IA32_EVT_CFG_BASE + index, msrval);</div><div class='ctx'> </div><div class='ctx'> 	/* Report only the valid event configuration bits */</div><div class='ctx'> 	config_info-&gt;mon_config = msrval &amp; MAX_EVT_CONFIG_BITS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mondata_config_read(struct resctrl_mon_config_info *mon_info)</div><div class='del'>-{</div><div class='del'>-	smp_call_function_any(&amp;mon_info-&gt;d-&gt;hdr.cpu_mask,</div><div class='del'>-			      resctrl_arch_mon_event_config_read, mon_info, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32 evtid)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_mon_config_info mon_info;</div><div class='del'>-	struct rdt_mon_domain *dom;</div><div class='del'>-	bool sep = false;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(dom, &amp;r-&gt;mon_domains, hdr.list) {</div><div class='del'>-		if (sep)</div><div class='del'>-			seq_puts(s, ";");</div><div class='del'>-</div><div class='del'>-		memset(&amp;mon_info, 0, sizeof(struct resctrl_mon_config_info));</div><div class='del'>-		mon_info.r = r;</div><div class='del'>-		mon_info.d = dom;</div><div class='del'>-		mon_info.evtid = evtid;</div><div class='del'>-		mondata_config_read(&amp;mon_info);</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "%d=0x%02x", dom-&gt;hdr.id, mon_info.mon_config);</div><div class='del'>-		sep = true;</div><div class='del'>-	}</div><div class='del'>-	seq_puts(s, "\n");</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mbm_total_bytes_config_show(struct kernfs_open_file *of,</div><div class='del'>-				       struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	mbm_config_show(seq, r, QOS_L3_MBM_TOTAL_EVENT_ID);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mbm_local_bytes_config_show(struct kernfs_open_file *of,</div><div class='del'>-				       struct seq_file *seq, void *v)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-</div><div class='del'>-	mbm_config_show(seq, r, QOS_L3_MBM_LOCAL_EVENT_ID);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void resctrl_arch_mon_event_config_write(void *_config_info)</div><div class='ctx'> {</div><div class='ctx'> 	struct resctrl_mon_config_info *config_info = _config_info;</div><div class='hunk'>@@ -1707,638 +112,21 @@ void resctrl_arch_mon_event_config_write(void *_config_info)</div><div class='ctx'> 		pr_warn_once("Invalid event id %d\n", config_info-&gt;evtid);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	wrmsr(MSR_IA32_EVT_CFG_BASE + index, config_info-&gt;mon_config, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mbm_config_write_domain(struct rdt_resource *r,</div><div class='del'>-				    struct rdt_mon_domain *d, u32 evtid, u32 val)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_mon_config_info mon_info = {0};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Read the current config value first. If both are the same then</div><div class='del'>-	 * no need to write it again.</div><div class='del'>-	 */</div><div class='del'>-	mon_info.r = r;</div><div class='del'>-	mon_info.d = d;</div><div class='del'>-	mon_info.evtid = evtid;</div><div class='del'>-	mondata_config_read(&amp;mon_info);</div><div class='del'>-	if (mon_info.mon_config == val)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mon_info.mon_config = val;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Update MSR_IA32_EVT_CFG_BASE MSR on one of the CPUs in the</div><div class='del'>-	 * domain. The MSRs offset from MSR MSR_IA32_EVT_CFG_BASE</div><div class='del'>-	 * are scoped at the domain level. Writing any of these MSRs</div><div class='del'>-	 * on one CPU is observed by all the CPUs in the domain.</div><div class='del'>-	 */</div><div class='del'>-	smp_call_function_any(&amp;d-&gt;hdr.cpu_mask, resctrl_arch_mon_event_config_write,</div><div class='del'>-			      &amp;mon_info, 1);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * When an Event Configuration is changed, the bandwidth counters</div><div class='del'>-	 * for all RMIDs and Events will be cleared by the hardware. The</div><div class='del'>-	 * hardware also sets MSR_IA32_QM_CTR.Unavailable (bit 62) for</div><div class='del'>-	 * every RMID on the next read to any event for every RMID.</div><div class='del'>-	 * Subsequent reads will have MSR_IA32_QM_CTR.Unavailable (bit 62)</div><div class='del'>-	 * cleared while it is tracked by the hardware. Clear the</div><div class='del'>-	 * mbm_local and mbm_total counts for all the RMIDs.</div><div class='del'>-	 */</div><div class='del'>-	resctrl_arch_reset_rmid_all(r, d);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mon_config_write(struct rdt_resource *r, char *tok, u32 evtid)</div><div class='del'>-{</div><div class='del'>-	char *dom_str = NULL, *id_str;</div><div class='del'>-	unsigned long dom_id, val;</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-</div><div class='del'>-	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-next:</div><div class='del'>-	if (!tok || tok[0] == '\0')</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Start processing the strings for each domain */</div><div class='del'>-	dom_str = strim(strsep(&amp;tok, ";"));</div><div class='del'>-	id_str = strsep(&amp;dom_str, "=");</div><div class='del'>-</div><div class='del'>-	if (!id_str || kstrtoul(id_str, 10, &amp;dom_id)) {</div><div class='del'>-		rdt_last_cmd_puts("Missing '=' or non-numeric domain id\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!dom_str || kstrtoul(dom_str, 16, &amp;val)) {</div><div class='del'>-		rdt_last_cmd_puts("Non-numeric event configuration value\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Value from user cannot be more than the supported set of events */</div><div class='del'>-	if ((val &amp; r-&gt;mbm_cfg_mask) != val) {</div><div class='del'>-		rdt_last_cmd_printf("Invalid event configuration: max valid mask is 0x%02x\n",</div><div class='del'>-				    r-&gt;mbm_cfg_mask);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(d, &amp;r-&gt;mon_domains, hdr.list) {</div><div class='del'>-		if (d-&gt;hdr.id == dom_id) {</div><div class='del'>-			mbm_config_write_domain(r, d, evtid, val);</div><div class='del'>-			goto next;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t mbm_total_bytes_config_write(struct kernfs_open_file *of,</div><div class='del'>-					    char *buf, size_t nbytes,</div><div class='del'>-					    loff_t off)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Valid input requires a trailing newline */</div><div class='del'>-	if (nbytes == 0 || buf[nbytes - 1] != '\n')</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-</div><div class='del'>-	buf[nbytes - 1] = '\0';</div><div class='del'>-</div><div class='del'>-	ret = mon_config_write(r, buf, QOS_L3_MBM_TOTAL_EVENT_ID);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-</div><div class='del'>-	return ret ?: nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t mbm_local_bytes_config_write(struct kernfs_open_file *of,</div><div class='del'>-					    char *buf, size_t nbytes,</div><div class='del'>-					    loff_t off)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = rdt_kn_parent_priv(of-&gt;kn);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Valid input requires a trailing newline */</div><div class='del'>-	if (nbytes == 0 || buf[nbytes - 1] != '\n')</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-</div><div class='del'>-	buf[nbytes - 1] = '\0';</div><div class='del'>-</div><div class='del'>-	ret = mon_config_write(r, buf, QOS_L3_MBM_LOCAL_EVENT_ID);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-</div><div class='del'>-	return ret ?: nbytes;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* rdtgroup information files for one cache resource. */</div><div class='del'>-static struct rftype res_common_files[] = {</div><div class='del'>-	{</div><div class='del'>-		.name		= "last_cmd_status",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_last_cmd_status_show,</div><div class='del'>-		.fflags		= RFTYPE_TOP_INFO,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "num_closids",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_num_closids_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "mon_features",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_mon_features_show,</div><div class='del'>-		.fflags		= RFTYPE_MON_INFO,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "num_rmids",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_num_rmids_show,</div><div class='del'>-		.fflags		= RFTYPE_MON_INFO,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "cbm_mask",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_default_ctrl_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_CACHE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "min_cbm_bits",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_min_cbm_bits_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_CACHE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "shareable_bits",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_shareable_bits_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_CACHE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "bit_usage",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_bit_usage_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_CACHE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "min_bandwidth",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_min_bw_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_MB,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "bandwidth_gran",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_bw_gran_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_MB,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "delay_linear",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_delay_linear_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_MB,</div><div class='del'>-	},</div><div class='del'>-	/*</div><div class='del'>-	 * Platform specific which (if any) capabilities are provided by</div><div class='del'>-	 * thread_throttle_mode. Defer "fflags" initialization to platform</div><div class='del'>-	 * discovery.</div><div class='del'>-	 */</div><div class='del'>-	{</div><div class='del'>-		.name		= "thread_throttle_mode",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_thread_throttle_mode_show,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "max_threshold_occupancy",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.write		= max_threshold_occ_write,</div><div class='del'>-		.seq_show	= max_threshold_occ_show,</div><div class='del'>-		.fflags		= RFTYPE_MON_INFO | RFTYPE_RES_CACHE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "mbm_total_bytes_config",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= mbm_total_bytes_config_show,</div><div class='del'>-		.write		= mbm_total_bytes_config_write,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "mbm_local_bytes_config",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= mbm_local_bytes_config_show,</div><div class='del'>-		.write		= mbm_local_bytes_config_write,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "cpus",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.write		= rdtgroup_cpus_write,</div><div class='del'>-		.seq_show	= rdtgroup_cpus_show,</div><div class='del'>-		.fflags		= RFTYPE_BASE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "cpus_list",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.write		= rdtgroup_cpus_write,</div><div class='del'>-		.seq_show	= rdtgroup_cpus_show,</div><div class='del'>-		.flags		= RFTYPE_FLAGS_CPUS_LIST,</div><div class='del'>-		.fflags		= RFTYPE_BASE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "tasks",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.write		= rdtgroup_tasks_write,</div><div class='del'>-		.seq_show	= rdtgroup_tasks_show,</div><div class='del'>-		.fflags		= RFTYPE_BASE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "mon_hw_id",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdtgroup_rmid_show,</div><div class='del'>-		.fflags		= RFTYPE_MON_BASE | RFTYPE_DEBUG,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "schemata",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.write		= rdtgroup_schemata_write,</div><div class='del'>-		.seq_show	= rdtgroup_schemata_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_BASE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "mba_MBps_event",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.write		= rdtgroup_mba_mbps_event_write,</div><div class='del'>-		.seq_show	= rdtgroup_mba_mbps_event_show,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "mode",</div><div class='del'>-		.mode		= 0644,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.write		= rdtgroup_mode_write,</div><div class='del'>-		.seq_show	= rdtgroup_mode_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_BASE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "size",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdtgroup_size_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_BASE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "sparse_masks",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdt_has_sparse_bitmasks_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_INFO | RFTYPE_RES_CACHE,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.name		= "ctrl_hw_id",</div><div class='del'>-		.mode		= 0444,</div><div class='del'>-		.kf_ops		= &amp;rdtgroup_kf_single_ops,</div><div class='del'>-		.seq_show	= rdtgroup_closid_show,</div><div class='del'>-		.fflags		= RFTYPE_CTRL_BASE | RFTYPE_DEBUG,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int rdtgroup_add_files(struct kernfs_node *kn, unsigned long fflags)</div><div class='del'>-{</div><div class='del'>-	struct rftype *rfts, *rft;</div><div class='del'>-	int ret, len;</div><div class='del'>-</div><div class='del'>-	rfts = res_common_files;</div><div class='del'>-	len = ARRAY_SIZE(res_common_files);</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (resctrl_debug)</div><div class='del'>-		fflags |= RFTYPE_DEBUG;</div><div class='del'>-</div><div class='del'>-	for (rft = rfts; rft &lt; rfts + len; rft++) {</div><div class='del'>-		if (rft-&gt;fflags &amp;&amp; ((fflags &amp; rft-&gt;fflags) == rft-&gt;fflags)) {</div><div class='del'>-			ret = rdtgroup_add_file(kn, rft);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto error;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-error:</div><div class='del'>-	pr_warn("Failed to add %s, err=%d\n", rft-&gt;name, ret);</div><div class='del'>-	while (--rft &gt;= rfts) {</div><div class='del'>-		if ((fflags &amp; rft-&gt;fflags) == rft-&gt;fflags)</div><div class='del'>-			kernfs_remove_by_name(kn, rft-&gt;name);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct rftype *rdtgroup_get_rftype_by_name(const char *name)</div><div class='del'>-{</div><div class='del'>-	struct rftype *rfts, *rft;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	rfts = res_common_files;</div><div class='del'>-	len = ARRAY_SIZE(res_common_files);</div><div class='del'>-</div><div class='del'>-	for (rft = rfts; rft &lt; rfts + len; rft++) {</div><div class='del'>-		if (!strcmp(rft-&gt;name, name))</div><div class='del'>-			return rft;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void thread_throttle_mode_init(void)</div><div class='del'>-{</div><div class='del'>-	enum membw_throttle_mode throttle_mode = THREAD_THROTTLE_UNDEFINED;</div><div class='del'>-	struct rdt_resource *r_mba, *r_smba;</div><div class='del'>-</div><div class='del'>-	r_mba = resctrl_arch_get_resource(RDT_RESOURCE_MBA);</div><div class='del'>-	if (r_mba-&gt;alloc_capable &amp;&amp;</div><div class='del'>-	    r_mba-&gt;membw.throttle_mode != THREAD_THROTTLE_UNDEFINED)</div><div class='del'>-		throttle_mode = r_mba-&gt;membw.throttle_mode;</div><div class='del'>-</div><div class='del'>-	r_smba = resctrl_arch_get_resource(RDT_RESOURCE_SMBA);</div><div class='del'>-	if (r_smba-&gt;alloc_capable &amp;&amp;</div><div class='del'>-	    r_smba-&gt;membw.throttle_mode != THREAD_THROTTLE_UNDEFINED)</div><div class='del'>-		throttle_mode = r_smba-&gt;membw.throttle_mode;</div><div class='del'>-</div><div class='del'>-	if (throttle_mode == THREAD_THROTTLE_UNDEFINED)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	resctrl_file_fflags_init("thread_throttle_mode",</div><div class='del'>-				 RFTYPE_CTRL_INFO | RFTYPE_RES_MB);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void resctrl_file_fflags_init(const char *config, unsigned long fflags)</div><div class='del'>-{</div><div class='del'>-	struct rftype *rft;</div><div class='del'>-</div><div class='del'>-	rft = rdtgroup_get_rftype_by_name(config);</div><div class='del'>-	if (rft)</div><div class='del'>-		rft-&gt;fflags = fflags;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_kn_mode_restrict - Restrict user access to named resctrl file</div><div class='del'>- * @r: The resource group with which the file is associated.</div><div class='del'>- * @name: Name of the file</div><div class='del'>- *</div><div class='del'>- * The permissions of named resctrl file, directory, or link are modified</div><div class='del'>- * to not allow read, write, or execute by any user.</div><div class='del'>- *</div><div class='del'>- * WARNING: This function is intended to communicate to the user that the</div><div class='del'>- * resctrl file has been locked down - that it is not relevant to the</div><div class='del'>- * particular state the system finds itself in. It should not be relied</div><div class='del'>- * on to protect from user access because after the file's permissions</div><div class='del'>- * are restricted the user can still change the permissions using chmod</div><div class='del'>- * from the command line.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure.</div><div class='del'>- */</div><div class='del'>-int rdtgroup_kn_mode_restrict(struct rdtgroup *r, const char *name)</div><div class='del'>-{</div><div class='del'>-	struct iattr iattr = {.ia_valid = ATTR_MODE,};</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	kn = kernfs_find_and_get_ns(r-&gt;kn, name, NULL);</div><div class='del'>-	if (!kn)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	switch (kernfs_type(kn)) {</div><div class='del'>-	case KERNFS_DIR:</div><div class='del'>-		iattr.ia_mode = S_IFDIR;</div><div class='del'>-		break;</div><div class='del'>-	case KERNFS_FILE:</div><div class='del'>-		iattr.ia_mode = S_IFREG;</div><div class='del'>-		break;</div><div class='del'>-	case KERNFS_LINK:</div><div class='del'>-		iattr.ia_mode = S_IFLNK;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = kernfs_setattr(kn, &amp;iattr);</div><div class='del'>-	kernfs_put(kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * rdtgroup_kn_mode_restore - Restore user access to named resctrl file</div><div class='del'>- * @r: The resource group with which the file is associated.</div><div class='del'>- * @name: Name of the file</div><div class='del'>- * @mask: Mask of permissions that should be restored</div><div class='del'>- *</div><div class='del'>- * Restore the permissions of the named file. If @name is a directory the</div><div class='del'>- * permissions of its parent will be used.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, &lt;0 on failure.</div><div class='del'>- */</div><div class='del'>-int rdtgroup_kn_mode_restore(struct rdtgroup *r, const char *name,</div><div class='del'>-			     umode_t mask)</div><div class='del'>-{</div><div class='del'>-	struct iattr iattr = {.ia_valid = ATTR_MODE,};</div><div class='del'>-	struct kernfs_node *kn, *parent;</div><div class='del'>-	struct rftype *rfts, *rft;</div><div class='del'>-	int ret, len;</div><div class='del'>-</div><div class='del'>-	rfts = res_common_files;</div><div class='del'>-	len = ARRAY_SIZE(res_common_files);</div><div class='del'>-</div><div class='del'>-	for (rft = rfts; rft &lt; rfts + len; rft++) {</div><div class='del'>-		if (!strcmp(rft-&gt;name, name))</div><div class='del'>-			iattr.ia_mode = rft-&gt;mode &amp; mask;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kn = kernfs_find_and_get_ns(r-&gt;kn, name, NULL);</div><div class='del'>-	if (!kn)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	switch (kernfs_type(kn)) {</div><div class='del'>-	case KERNFS_DIR:</div><div class='del'>-		parent = kernfs_get_parent(kn);</div><div class='del'>-		if (parent) {</div><div class='del'>-			iattr.ia_mode |= parent-&gt;mode;</div><div class='del'>-			kernfs_put(parent);</div><div class='del'>-		}</div><div class='del'>-		iattr.ia_mode |= S_IFDIR;</div><div class='del'>-		break;</div><div class='del'>-	case KERNFS_FILE:</div><div class='del'>-		iattr.ia_mode |= S_IFREG;</div><div class='del'>-		break;</div><div class='del'>-	case KERNFS_LINK:</div><div class='del'>-		iattr.ia_mode |= S_IFLNK;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = kernfs_setattr(kn, &amp;iattr);</div><div class='del'>-	kernfs_put(kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_mkdir_info_resdir(void *priv, char *name,</div><div class='del'>-				      unsigned long fflags)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *kn_subdir;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	kn_subdir = kernfs_create_dir(kn_info, name,</div><div class='del'>-				      kn_info-&gt;mode, priv);</div><div class='del'>-	if (IS_ERR(kn_subdir))</div><div class='del'>-		return PTR_ERR(kn_subdir);</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_set_ugid(kn_subdir);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_add_files(kn_subdir, fflags);</div><div class='del'>-	if (!ret)</div><div class='del'>-		kernfs_activate(kn_subdir);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long fflags_from_resource(struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	switch (r-&gt;rid) {</div><div class='del'>-	case RDT_RESOURCE_L3:</div><div class='del'>-	case RDT_RESOURCE_L2:</div><div class='del'>-		return RFTYPE_RES_CACHE;</div><div class='del'>-	case RDT_RESOURCE_MBA:</div><div class='del'>-	case RDT_RESOURCE_SMBA:</div><div class='del'>-		return RFTYPE_RES_MB;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return WARN_ON_ONCE(1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_create_info_dir(struct kernfs_node *parent_kn)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	unsigned long fflags;</div><div class='del'>-	char name[32];</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* create the directory */</div><div class='del'>-	kn_info = kernfs_create_dir(parent_kn, "info", parent_kn-&gt;mode, NULL);</div><div class='del'>-	if (IS_ERR(kn_info))</div><div class='del'>-		return PTR_ERR(kn_info);</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_add_files(kn_info, RFTYPE_TOP_INFO);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_destroy;</div><div class='del'>-</div><div class='del'>-	/* loop over enabled controls, these are all alloc_capable */</div><div class='del'>-	list_for_each_entry(s, &amp;resctrl_schema_all, list) {</div><div class='del'>-		r = s-&gt;res;</div><div class='del'>-		fflags = fflags_from_resource(r) | RFTYPE_CTRL_INFO;</div><div class='del'>-		ret = rdtgroup_mkdir_info_resdir(s, s-&gt;name, fflags);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_destroy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for_each_mon_capable_rdt_resource(r) {</div><div class='del'>-		fflags = fflags_from_resource(r) | RFTYPE_MON_INFO;</div><div class='del'>-		sprintf(name, "%s_MON", r-&gt;name);</div><div class='del'>-		ret = rdtgroup_mkdir_info_resdir(r, name, fflags);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_destroy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_set_ugid(kn_info);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_destroy;</div><div class='del'>-</div><div class='del'>-	kernfs_activate(kn_info);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_destroy:</div><div class='del'>-	kernfs_remove(kn_info);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mongroup_create_dir(struct kernfs_node *parent_kn, struct rdtgroup *prgrp,</div><div class='del'>-		    char *name, struct kernfs_node **dest_kn)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* create the directory */</div><div class='del'>-	kn = kernfs_create_dir(parent_kn, name, parent_kn-&gt;mode, prgrp);</div><div class='del'>-	if (IS_ERR(kn))</div><div class='del'>-		return PTR_ERR(kn);</div><div class='del'>-</div><div class='del'>-	if (dest_kn)</div><div class='del'>-		*dest_kn = kn;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_set_ugid(kn);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_destroy;</div><div class='del'>-</div><div class='del'>-	kernfs_activate(kn);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_destroy:</div><div class='del'>-	kernfs_remove(kn);</div><div class='del'>-	return ret;</div><div class='add'>+	wrmsrq(MSR_IA32_EVT_CFG_BASE + index, config_info-&gt;mon_config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void l3_qos_cfg_update(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	bool *enable = arg;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_L3_QOS_CFG, *enable ? L3_QOS_CDP_ENABLE : 0ULL);</div><div class='add'>+	wrmsrq(MSR_IA32_L3_QOS_CFG, *enable ? L3_QOS_CDP_ENABLE : 0ULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void l2_qos_cfg_update(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	bool *enable = arg;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_L2_QOS_CFG, *enable ? L2_QOS_CDP_ENABLE : 0ULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool is_mba_linear(void)</div><div class='del'>-{</div><div class='del'>-	return resctrl_arch_get_resource(RDT_RESOURCE_MBA)-&gt;membw.delay_linear;</div><div class='add'>+	wrmsrq(MSR_IA32_L2_QOS_CFG, *enable ? L2_QOS_CDP_ENABLE : 0ULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int set_cache_qos_cfg(int level, bool enable)</div><div class='hunk'>@@ -2396,76 +184,6 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *r)</div><div class='ctx'> 		l3_qos_cfg_update(&amp;hw_res-&gt;cdp_enabled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mba_sc_domain_allocate(struct rdt_resource *r, struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	u32 num_closid = resctrl_arch_get_num_closid(r);</div><div class='del'>-	int cpu = cpumask_any(&amp;d-&gt;hdr.cpu_mask);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	d-&gt;mbps_val = kcalloc_node(num_closid, sizeof(*d-&gt;mbps_val),</div><div class='del'>-				   GFP_KERNEL, cpu_to_node(cpu));</div><div class='del'>-	if (!d-&gt;mbps_val)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_closid; i++)</div><div class='del'>-		d-&gt;mbps_val[i] = MBA_MAX_MBPS;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mba_sc_domain_destroy(struct rdt_resource *r,</div><div class='del'>-				  struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	kfree(d-&gt;mbps_val);</div><div class='del'>-	d-&gt;mbps_val = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MBA software controller is supported only if</div><div class='del'>- * MBM is supported and MBA is in linear scale,</div><div class='del'>- * and the MBM monitor scope is the same as MBA</div><div class='del'>- * control scope.</div><div class='del'>- */</div><div class='del'>-static bool supports_mba_mbps(void)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *rmbm = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-	struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_MBA);</div><div class='del'>-</div><div class='del'>-	return (resctrl_is_mbm_enabled() &amp;&amp;</div><div class='del'>-		r-&gt;alloc_capable &amp;&amp; is_mba_linear() &amp;&amp;</div><div class='del'>-		r-&gt;ctrl_scope == rmbm-&gt;mon_scope);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable or disable the MBA software controller</div><div class='del'>- * which helps user specify bandwidth in MBps.</div><div class='del'>- */</div><div class='del'>-static int set_mba_sc(bool mba_sc)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r = resctrl_arch_get_resource(RDT_RESOURCE_MBA);</div><div class='del'>-	u32 num_closid = resctrl_arch_get_num_closid(r);</div><div class='del'>-	struct rdt_ctrl_domain *d;</div><div class='del'>-	unsigned long fflags;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!supports_mba_mbps() || mba_sc == is_mba_sc(r))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	r-&gt;membw.mba_sc = mba_sc;</div><div class='del'>-</div><div class='del'>-	rdtgroup_default.mba_mbps_event = mba_mbps_default_event;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(d, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-		for (i = 0; i &lt; num_closid; i++)</div><div class='del'>-			d-&gt;mbps_val[i] = MBA_MAX_MBPS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fflags = mba_sc ? RFTYPE_CTRL_BASE | RFTYPE_MON_BASE : 0;</div><div class='del'>-	resctrl_file_fflags_init("mba_MBps_event", fflags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int cdp_enable(int level)</div><div class='ctx'> {</div><div class='ctx'> 	struct rdt_resource *r_l = &amp;rdt_resources_all[level].r_resctrl;</div><div class='hunk'>@@ -2506,419 +224,9 @@ int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We don't allow rdtgroup directories to be created anywhere</div><div class='del'>- * except the root directory. Thus when looking for the rdtgroup</div><div class='del'>- * structure for a kernfs node we are either looking at a directory,</div><div class='del'>- * in which case the rdtgroup structure is pointed at by the "priv"</div><div class='del'>- * field, otherwise we have a file, and need only look to the parent</div><div class='del'>- * to find the rdtgroup.</div><div class='del'>- */</div><div class='del'>-static struct rdtgroup *kernfs_to_rdtgroup(struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	if (kernfs_type(kn) == KERNFS_DIR) {</div><div class='del'>-		/*</div><div class='del'>-		 * All the resource directories use "kn-&gt;priv"</div><div class='del'>-		 * to point to the "struct rdtgroup" for the</div><div class='del'>-		 * resource. "info" and its subdirectories don't</div><div class='del'>-		 * have rdtgroup structures, so return NULL here.</div><div class='del'>-		 */</div><div class='del'>-		if (kn == kn_info ||</div><div class='del'>-		    rcu_access_pointer(kn-&gt;__parent) == kn_info)</div><div class='del'>-			return NULL;</div><div class='del'>-		else</div><div class='del'>-			return kn-&gt;priv;</div><div class='del'>-	} else {</div><div class='del'>-		return rdt_kn_parent_priv(kn);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rdtgroup_kn_get(struct rdtgroup *rdtgrp, struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	atomic_inc(&amp;rdtgrp-&gt;waitcount);</div><div class='del'>-	kernfs_break_active_protection(kn);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rdtgroup_kn_put(struct rdtgroup *rdtgrp, struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	if (atomic_dec_and_test(&amp;rdtgrp-&gt;waitcount) &amp;&amp;</div><div class='del'>-	    (rdtgrp-&gt;flags &amp; RDT_DELETED)) {</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP ||</div><div class='del'>-		    rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED)</div><div class='del'>-			rdtgroup_pseudo_lock_remove(rdtgrp);</div><div class='del'>-		kernfs_unbreak_active_protection(kn);</div><div class='del'>-		rdtgroup_remove(rdtgrp);</div><div class='del'>-	} else {</div><div class='del'>-		kernfs_unbreak_active_protection(kn);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct rdtgroup *rdtgroup_kn_lock_live(struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp = kernfs_to_rdtgroup(kn);</div><div class='del'>-</div><div class='del'>-	if (!rdtgrp)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	rdtgroup_kn_get(rdtgrp, kn);</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	/* Was this group deleted while we waited? */</div><div class='del'>-	if (rdtgrp-&gt;flags &amp; RDT_DELETED)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return rdtgrp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void rdtgroup_kn_unlock(struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp = kernfs_to_rdtgroup(kn);</div><div class='del'>-</div><div class='del'>-	if (!rdtgrp)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-</div><div class='del'>-	rdtgroup_kn_put(rdtgrp, kn);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mkdir_mondata_all(struct kernfs_node *parent_kn,</div><div class='del'>-			     struct rdtgroup *prgrp,</div><div class='del'>-			     struct kernfs_node **mon_data_kn);</div><div class='del'>-</div><div class='del'>-static void rdt_disable_ctx(void)</div><div class='del'>-{</div><div class='del'>-	resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L3, false);</div><div class='del'>-	resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L2, false);</div><div class='del'>-	set_mba_sc(false);</div><div class='del'>-</div><div class='del'>-	resctrl_debug = false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_enable_ctx(struct rdt_fs_context *ctx)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;enable_cdpl2) {</div><div class='del'>-		ret = resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L2, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;enable_cdpl3) {</div><div class='del'>-		ret = resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L3, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_cdpl2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;enable_mba_mbps) {</div><div class='del'>-		ret = set_mba_sc(true);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_cdpl3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ctx-&gt;enable_debug)</div><div class='del'>-		resctrl_debug = true;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_cdpl3:</div><div class='del'>-	resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L3, false);</div><div class='del'>-out_cdpl2:</div><div class='del'>-	resctrl_arch_set_cdp_enabled(RDT_RESOURCE_L2, false);</div><div class='del'>-out_done:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int schemata_list_add(struct rdt_resource *r, enum resctrl_conf_type type)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s;</div><div class='del'>-	const char *suffix = "";</div><div class='del'>-	int ret, cl;</div><div class='del'>-</div><div class='del'>-	s = kzalloc(sizeof(*s), GFP_KERNEL);</div><div class='del'>-	if (!s)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	s-&gt;res = r;</div><div class='del'>-	s-&gt;num_closid = resctrl_arch_get_num_closid(r);</div><div class='del'>-	if (resctrl_arch_get_cdp_enabled(r-&gt;rid))</div><div class='del'>-		s-&gt;num_closid /= 2;</div><div class='del'>-</div><div class='del'>-	s-&gt;conf_type = type;</div><div class='del'>-	switch (type) {</div><div class='del'>-	case CDP_CODE:</div><div class='del'>-		suffix = "CODE";</div><div class='del'>-		break;</div><div class='del'>-	case CDP_DATA:</div><div class='del'>-		suffix = "DATA";</div><div class='del'>-		break;</div><div class='del'>-	case CDP_NONE:</div><div class='del'>-		suffix = "";</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = snprintf(s-&gt;name, sizeof(s-&gt;name), "%s%s", r-&gt;name, suffix);</div><div class='del'>-	if (ret &gt;= sizeof(s-&gt;name)) {</div><div class='del'>-		kfree(s);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cl = strlen(s-&gt;name);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If CDP is supported by this resource, but not enabled,</div><div class='del'>-	 * include the suffix. This ensures the tabular format of the</div><div class='del'>-	 * schemata file does not change between mounts of the filesystem.</div><div class='del'>-	 */</div><div class='del'>-	if (r-&gt;cdp_capable &amp;&amp; !resctrl_arch_get_cdp_enabled(r-&gt;rid))</div><div class='del'>-		cl += 4;</div><div class='del'>-</div><div class='del'>-	if (cl &gt; max_name_width)</div><div class='del'>-		max_name_width = cl;</div><div class='del'>-</div><div class='del'>-	switch (r-&gt;schema_fmt) {</div><div class='del'>-	case RESCTRL_SCHEMA_BITMAP:</div><div class='del'>-		s-&gt;fmt_str = "%d=%x";</div><div class='del'>-		break;</div><div class='del'>-	case RESCTRL_SCHEMA_RANGE:</div><div class='del'>-		s-&gt;fmt_str = "%d=%u";</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (WARN_ON_ONCE(!s-&gt;fmt_str)) {</div><div class='del'>-		kfree(s);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;s-&gt;list);</div><div class='del'>-	list_add(&amp;s-&gt;list, &amp;resctrl_schema_all);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int schemata_list_create(void)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	for_each_alloc_capable_rdt_resource(r) {</div><div class='del'>-		if (resctrl_arch_get_cdp_enabled(r-&gt;rid)) {</div><div class='del'>-			ret = schemata_list_add(r, CDP_CODE);</div><div class='del'>-			if (ret)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			ret = schemata_list_add(r, CDP_DATA);</div><div class='del'>-		} else {</div><div class='del'>-			ret = schemata_list_add(r, CDP_NONE);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (ret)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void schemata_list_destroy(void)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s, *tmp;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(s, tmp, &amp;resctrl_schema_all, list) {</div><div class='del'>-		list_del(&amp;s-&gt;list);</div><div class='del'>-		kfree(s);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdt_get_tree(struct fs_context *fc)</div><div class='del'>-{</div><div class='del'>-	struct rdt_fs_context *ctx = rdt_fc2context(fc);</div><div class='del'>-	unsigned long flags = RFTYPE_CTRL_BASE;</div><div class='del'>-	struct rdt_mon_domain *dom;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-	/*</div><div class='del'>-	 * resctrl file system can only be mounted once.</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_mounted) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_setup_root(ctx);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	ret = rdt_enable_ctx(ctx);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_root;</div><div class='del'>-</div><div class='del'>-	ret = schemata_list_create();</div><div class='del'>-	if (ret) {</div><div class='del'>-		schemata_list_destroy();</div><div class='del'>-		goto out_ctx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	closid_init();</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_mon_capable())</div><div class='del'>-		flags |= RFTYPE_MON;</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_add_files(rdtgroup_default.kn, flags);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_schemata_free;</div><div class='del'>-</div><div class='del'>-	kernfs_activate(rdtgroup_default.kn);</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_create_info_dir(rdtgroup_default.kn);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out_schemata_free;</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_mon_capable()) {</div><div class='del'>-		ret = mongroup_create_dir(rdtgroup_default.kn,</div><div class='del'>-					  &amp;rdtgroup_default, "mon_groups",</div><div class='del'>-					  &amp;kn_mongrp);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out_info;</div><div class='del'>-</div><div class='del'>-		ret = mkdir_mondata_all(rdtgroup_default.kn,</div><div class='del'>-					&amp;rdtgroup_default, &amp;kn_mondata);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out_mongrp;</div><div class='del'>-		rdtgroup_default.mon.mon_data_kn = kn_mondata;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = rdt_pseudo_lock_init();</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_mondata;</div><div class='del'>-</div><div class='del'>-	ret = kernfs_get_tree(fc);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out_psl;</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_alloc_capable())</div><div class='del'>-		resctrl_arch_enable_alloc();</div><div class='del'>-	if (resctrl_arch_mon_capable())</div><div class='del'>-		resctrl_arch_enable_mon();</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_alloc_capable() || resctrl_arch_mon_capable())</div><div class='del'>-		resctrl_mounted = true;</div><div class='del'>-</div><div class='del'>-	if (resctrl_is_mbm_enabled()) {</div><div class='del'>-		r = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-		list_for_each_entry(dom, &amp;r-&gt;mon_domains, hdr.list)</div><div class='del'>-			mbm_setup_overflow_handler(dom, MBM_OVERFLOW_INTERVAL,</div><div class='del'>-						   RESCTRL_PICK_ANY_CPU);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	goto out;</div><div class='del'>-</div><div class='del'>-out_psl:</div><div class='del'>-	rdt_pseudo_lock_release();</div><div class='del'>-out_mondata:</div><div class='del'>-	if (resctrl_arch_mon_capable())</div><div class='del'>-		kernfs_remove(kn_mondata);</div><div class='del'>-out_mongrp:</div><div class='del'>-	if (resctrl_arch_mon_capable())</div><div class='del'>-		kernfs_remove(kn_mongrp);</div><div class='del'>-out_info:</div><div class='del'>-	kernfs_remove(kn_info);</div><div class='del'>-out_schemata_free:</div><div class='del'>-	schemata_list_destroy();</div><div class='del'>-out_ctx:</div><div class='del'>-	rdt_disable_ctx();</div><div class='del'>-out_root:</div><div class='del'>-	rdtgroup_destroy_root();</div><div class='del'>-out:</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-enum rdt_param {</div><div class='del'>-	Opt_cdp,</div><div class='del'>-	Opt_cdpl2,</div><div class='del'>-	Opt_mba_mbps,</div><div class='del'>-	Opt_debug,</div><div class='del'>-	nr__rdt_params</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct fs_parameter_spec rdt_fs_parameters[] = {</div><div class='del'>-	fsparam_flag("cdp",		Opt_cdp),</div><div class='del'>-	fsparam_flag("cdpl2",		Opt_cdpl2),</div><div class='del'>-	fsparam_flag("mba_MBps",	Opt_mba_mbps),</div><div class='del'>-	fsparam_flag("debug",		Opt_debug),</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int rdt_parse_param(struct fs_context *fc, struct fs_parameter *param)</div><div class='del'>-{</div><div class='del'>-	struct rdt_fs_context *ctx = rdt_fc2context(fc);</div><div class='del'>-	struct fs_parse_result result;</div><div class='del'>-	const char *msg;</div><div class='del'>-	int opt;</div><div class='del'>-</div><div class='del'>-	opt = fs_parse(fc, rdt_fs_parameters, param, &amp;result);</div><div class='del'>-	if (opt &lt; 0)</div><div class='del'>-		return opt;</div><div class='del'>-</div><div class='del'>-	switch (opt) {</div><div class='del'>-	case Opt_cdp:</div><div class='del'>-		ctx-&gt;enable_cdpl3 = true;</div><div class='del'>-		return 0;</div><div class='del'>-	case Opt_cdpl2:</div><div class='del'>-		ctx-&gt;enable_cdpl2 = true;</div><div class='del'>-		return 0;</div><div class='del'>-	case Opt_mba_mbps:</div><div class='del'>-		msg = "mba_MBps requires MBM and linear scale MBA at L3 scope";</div><div class='del'>-		if (!supports_mba_mbps())</div><div class='del'>-			return invalfc(fc, msg);</div><div class='del'>-		ctx-&gt;enable_mba_mbps = true;</div><div class='del'>-		return 0;</div><div class='del'>-	case Opt_debug:</div><div class='del'>-		ctx-&gt;enable_debug = true;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rdt_fs_context_free(struct fs_context *fc)</div><div class='add'>+bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level l)</div><div class='ctx'> {</div><div class='del'>-	struct rdt_fs_context *ctx = rdt_fc2context(fc);</div><div class='del'>-</div><div class='del'>-	kernfs_free_fs_context(fc);</div><div class='del'>-	kfree(ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct fs_context_operations rdt_fs_context_ops = {</div><div class='del'>-	.free		= rdt_fs_context_free,</div><div class='del'>-	.parse_param	= rdt_parse_param,</div><div class='del'>-	.get_tree	= rdt_get_tree,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int rdt_init_fs_context(struct fs_context *fc)</div><div class='del'>-{</div><div class='del'>-	struct rdt_fs_context *ctx;</div><div class='del'>-</div><div class='del'>-	ctx = kzalloc(sizeof(struct rdt_fs_context), GFP_KERNEL);</div><div class='del'>-	if (!ctx)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ctx-&gt;kfc.magic = RDTGROUP_SUPER_MAGIC;</div><div class='del'>-	fc-&gt;fs_private = &amp;ctx-&gt;kfc;</div><div class='del'>-	fc-&gt;ops = &amp;rdt_fs_context_ops;</div><div class='del'>-	put_user_ns(fc-&gt;user_ns);</div><div class='del'>-	fc-&gt;user_ns = get_user_ns(&amp;init_user_ns);</div><div class='del'>-	fc-&gt;global = true;</div><div class='del'>-	return 0;</div><div class='add'>+	return rdt_resources_all[l].cdp_enabled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void resctrl_arch_reset_all_ctrls(struct rdt_resource *r)</div><div class='hunk'>@@ -2952,1454 +260,3 @@ void resctrl_arch_reset_all_ctrls(struct rdt_resource *r)</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Move tasks from one to the other group. If @from is NULL, then all tasks</div><div class='del'>- * in the systems are moved unconditionally (used for teardown).</div><div class='del'>- *</div><div class='del'>- * If @mask is not NULL the cpus on which moved tasks are running are set</div><div class='del'>- * in that mask so the update smp function call is restricted to affected</div><div class='del'>- * cpus.</div><div class='del'>- */</div><div class='del'>-static void rdt_move_group_tasks(struct rdtgroup *from, struct rdtgroup *to,</div><div class='del'>-				 struct cpumask *mask)</div><div class='del'>-{</div><div class='del'>-	struct task_struct *p, *t;</div><div class='del'>-</div><div class='del'>-	read_lock(&amp;tasklist_lock);</div><div class='del'>-	for_each_process_thread(p, t) {</div><div class='del'>-		if (!from || is_closid_match(t, from) ||</div><div class='del'>-		    is_rmid_match(t, from)) {</div><div class='del'>-			resctrl_arch_set_closid_rmid(t, to-&gt;closid,</div><div class='del'>-						     to-&gt;mon.rmid);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Order the closid/rmid stores above before the loads</div><div class='del'>-			 * in task_curr(). This pairs with the full barrier</div><div class='del'>-			 * between the rq-&gt;curr update and resctrl_sched_in()</div><div class='del'>-			 * during context switch.</div><div class='del'>-			 */</div><div class='del'>-			smp_mb();</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * If the task is on a CPU, set the CPU in the mask.</div><div class='del'>-			 * The detection is inaccurate as tasks might move or</div><div class='del'>-			 * schedule before the smp function call takes place.</div><div class='del'>-			 * In such a case the function call is pointless, but</div><div class='del'>-			 * there is no other side effect.</div><div class='del'>-			 */</div><div class='del'>-			if (IS_ENABLED(CONFIG_SMP) &amp;&amp; mask &amp;&amp; task_curr(t))</div><div class='del'>-				cpumask_set_cpu(task_cpu(t), mask);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	read_unlock(&amp;tasklist_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void free_all_child_rdtgrp(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *sentry, *stmp;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-</div><div class='del'>-	head = &amp;rdtgrp-&gt;mon.crdtgrp_list;</div><div class='del'>-	list_for_each_entry_safe(sentry, stmp, head, mon.crdtgrp_list) {</div><div class='del'>-		free_rmid(sentry-&gt;closid, sentry-&gt;mon.rmid);</div><div class='del'>-		list_del(&amp;sentry-&gt;mon.crdtgrp_list);</div><div class='del'>-</div><div class='del'>-		if (atomic_read(&amp;sentry-&gt;waitcount) != 0)</div><div class='del'>-			sentry-&gt;flags = RDT_DELETED;</div><div class='del'>-		else</div><div class='del'>-			rdtgroup_remove(sentry);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Forcibly remove all of subdirectories under root.</div><div class='del'>- */</div><div class='del'>-static void rmdir_all_sub(void)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp, *tmp;</div><div class='del'>-</div><div class='del'>-	/* Move all tasks to the default resource group */</div><div class='del'>-	rdt_move_group_tasks(NULL, &amp;rdtgroup_default, NULL);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(rdtgrp, tmp, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		/* Free any child rmids */</div><div class='del'>-		free_all_child_rdtgrp(rdtgrp);</div><div class='del'>-</div><div class='del'>-		/* Remove each rdtgroup other than root */</div><div class='del'>-		if (rdtgrp == &amp;rdtgroup_default)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP ||</div><div class='del'>-		    rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED)</div><div class='del'>-			rdtgroup_pseudo_lock_remove(rdtgrp);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Give any CPUs back to the default group. We cannot copy</div><div class='del'>-		 * cpu_online_mask because a CPU might have executed the</div><div class='del'>-		 * offline callback already, but is still marked online.</div><div class='del'>-		 */</div><div class='del'>-		cpumask_or(&amp;rdtgroup_default.cpu_mask,</div><div class='del'>-			   &amp;rdtgroup_default.cpu_mask, &amp;rdtgrp-&gt;cpu_mask);</div><div class='del'>-</div><div class='del'>-		free_rmid(rdtgrp-&gt;closid, rdtgrp-&gt;mon.rmid);</div><div class='del'>-</div><div class='del'>-		kernfs_remove(rdtgrp-&gt;kn);</div><div class='del'>-		list_del(&amp;rdtgrp-&gt;rdtgroup_list);</div><div class='del'>-</div><div class='del'>-		if (atomic_read(&amp;rdtgrp-&gt;waitcount) != 0)</div><div class='del'>-			rdtgrp-&gt;flags = RDT_DELETED;</div><div class='del'>-		else</div><div class='del'>-			rdtgroup_remove(rdtgrp);</div><div class='del'>-	}</div><div class='del'>-	/* Notify online CPUs to update per cpu storage and PQR_ASSOC MSR */</div><div class='del'>-	update_closid_rmid(cpu_online_mask, &amp;rdtgroup_default);</div><div class='del'>-</div><div class='del'>-	kernfs_remove(kn_info);</div><div class='del'>-	kernfs_remove(kn_mongrp);</div><div class='del'>-	kernfs_remove(kn_mondata);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rdt_kill_sb(struct super_block *sb)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rdt_disable_ctx();</div><div class='del'>-</div><div class='del'>-	/* Put everything back to default values. */</div><div class='del'>-	for_each_alloc_capable_rdt_resource(r)</div><div class='del'>-		resctrl_arch_reset_all_ctrls(r);</div><div class='del'>-</div><div class='del'>-	rmdir_all_sub();</div><div class='del'>-	rdt_pseudo_lock_release();</div><div class='del'>-	rdtgroup_default.mode = RDT_MODE_SHAREABLE;</div><div class='del'>-	schemata_list_destroy();</div><div class='del'>-	rdtgroup_destroy_root();</div><div class='del'>-	if (resctrl_arch_alloc_capable())</div><div class='del'>-		resctrl_arch_disable_alloc();</div><div class='del'>-	if (resctrl_arch_mon_capable())</div><div class='del'>-		resctrl_arch_disable_mon();</div><div class='del'>-	resctrl_mounted = false;</div><div class='del'>-	kernfs_kill_sb(sb);</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct file_system_type rdt_fs_type = {</div><div class='del'>-	.name			= "resctrl",</div><div class='del'>-	.init_fs_context	= rdt_init_fs_context,</div><div class='del'>-	.parameters		= rdt_fs_parameters,</div><div class='del'>-	.kill_sb		= rdt_kill_sb,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int mon_addfile(struct kernfs_node *parent_kn, const char *name,</div><div class='del'>-		       void *priv)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	kn = __kernfs_create_file(parent_kn, name, 0444,</div><div class='del'>-				  GLOBAL_ROOT_UID, GLOBAL_ROOT_GID, 0,</div><div class='del'>-				  &amp;kf_mondata_ops, priv, NULL, NULL);</div><div class='del'>-	if (IS_ERR(kn))</div><div class='del'>-		return PTR_ERR(kn);</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_set_ugid(kn);</div><div class='del'>-	if (ret) {</div><div class='del'>-		kernfs_remove(kn);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mon_rmdir_one_subdir(struct kernfs_node *pkn, char *name, char *subname)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-</div><div class='del'>-	kn = kernfs_find_and_get(pkn, name);</div><div class='del'>-	if (!kn)</div><div class='del'>-		return;</div><div class='del'>-	kernfs_put(kn);</div><div class='del'>-</div><div class='del'>-	if (kn-&gt;dir.subdirs &lt;= 1)</div><div class='del'>-		kernfs_remove(kn);</div><div class='del'>-	else</div><div class='del'>-		kernfs_remove_by_name(kn, subname);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Remove all subdirectories of mon_data of ctrl_mon groups</div><div class='del'>- * and monitor groups for the given domain.</div><div class='del'>- * Remove files and directories containing "sum" of domain data</div><div class='del'>- * when last domain being summed is removed.</div><div class='del'>- */</div><div class='del'>-static void rmdir_mondata_subdir_allrdtgrp(struct rdt_resource *r,</div><div class='del'>-					   struct rdt_mon_domain *d)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *prgrp, *crgrp;</div><div class='del'>-	char subname[32];</div><div class='del'>-	bool snc_mode;</div><div class='del'>-	char name[32];</div><div class='del'>-</div><div class='del'>-	snc_mode = r-&gt;mon_scope == RESCTRL_L3_NODE;</div><div class='del'>-	sprintf(name, "mon_%s_%02d", r-&gt;name, snc_mode ? d-&gt;ci-&gt;id : d-&gt;hdr.id);</div><div class='del'>-	if (snc_mode)</div><div class='del'>-		sprintf(subname, "mon_sub_%s_%02d", r-&gt;name, d-&gt;hdr.id);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(prgrp, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		mon_rmdir_one_subdir(prgrp-&gt;mon.mon_data_kn, name, subname);</div><div class='del'>-</div><div class='del'>-		list_for_each_entry(crgrp, &amp;prgrp-&gt;mon.crdtgrp_list, mon.crdtgrp_list)</div><div class='del'>-			mon_rmdir_one_subdir(crgrp-&gt;mon.mon_data_kn, name, subname);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mon_add_all_files(struct kernfs_node *kn, struct rdt_mon_domain *d,</div><div class='del'>-			     struct rdt_resource *r, struct rdtgroup *prgrp,</div><div class='del'>-			     bool do_sum)</div><div class='del'>-{</div><div class='del'>-	struct rmid_read rr = {0};</div><div class='del'>-	union mon_data_bits priv;</div><div class='del'>-	struct mon_evt *mevt;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(list_empty(&amp;r-&gt;evt_list)))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	priv.u.rid = r-&gt;rid;</div><div class='del'>-	priv.u.domid = do_sum ? d-&gt;ci-&gt;id : d-&gt;hdr.id;</div><div class='del'>-	priv.u.sum = do_sum;</div><div class='del'>-	list_for_each_entry(mevt, &amp;r-&gt;evt_list, list) {</div><div class='del'>-		priv.u.evtid = mevt-&gt;evtid;</div><div class='del'>-		ret = mon_addfile(kn, mevt-&gt;name, priv.priv);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		if (!do_sum &amp;&amp; resctrl_is_mbm_event(mevt-&gt;evtid))</div><div class='del'>-			mon_event_read(&amp;rr, r, d, prgrp, &amp;d-&gt;hdr.cpu_mask, mevt-&gt;evtid, true);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mkdir_mondata_subdir(struct kernfs_node *parent_kn,</div><div class='del'>-				struct rdt_mon_domain *d,</div><div class='del'>-				struct rdt_resource *r, struct rdtgroup *prgrp)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *kn, *ckn;</div><div class='del'>-	char name[32];</div><div class='del'>-	bool snc_mode;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	snc_mode = r-&gt;mon_scope == RESCTRL_L3_NODE;</div><div class='del'>-	sprintf(name, "mon_%s_%02d", r-&gt;name, snc_mode ? d-&gt;ci-&gt;id : d-&gt;hdr.id);</div><div class='del'>-	kn = kernfs_find_and_get(parent_kn, name);</div><div class='del'>-	if (kn) {</div><div class='del'>-		/*</div><div class='del'>-		 * rdtgroup_mutex will prevent this directory from being</div><div class='del'>-		 * removed. No need to keep this hold.</div><div class='del'>-		 */</div><div class='del'>-		kernfs_put(kn);</div><div class='del'>-	} else {</div><div class='del'>-		kn = kernfs_create_dir(parent_kn, name, parent_kn-&gt;mode, prgrp);</div><div class='del'>-		if (IS_ERR(kn))</div><div class='del'>-			return PTR_ERR(kn);</div><div class='del'>-</div><div class='del'>-		ret = rdtgroup_kn_set_ugid(kn);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_destroy;</div><div class='del'>-		ret = mon_add_all_files(kn, d, r, prgrp, snc_mode);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_destroy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (snc_mode) {</div><div class='del'>-		sprintf(name, "mon_sub_%s_%02d", r-&gt;name, d-&gt;hdr.id);</div><div class='del'>-		ckn = kernfs_create_dir(kn, name, parent_kn-&gt;mode, prgrp);</div><div class='del'>-		if (IS_ERR(ckn)) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			goto out_destroy;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = rdtgroup_kn_set_ugid(ckn);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_destroy;</div><div class='del'>-</div><div class='del'>-		ret = mon_add_all_files(ckn, d, r, prgrp, false);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_destroy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kernfs_activate(kn);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_destroy:</div><div class='del'>-	kernfs_remove(kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Add all subdirectories of mon_data for "ctrl_mon" groups</div><div class='del'>- * and "monitor" groups with given domain id.</div><div class='del'>- */</div><div class='del'>-static void mkdir_mondata_subdir_allrdtgrp(struct rdt_resource *r,</div><div class='del'>-					   struct rdt_mon_domain *d)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *parent_kn;</div><div class='del'>-	struct rdtgroup *prgrp, *crgrp;</div><div class='del'>-	struct list_head *head;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(prgrp, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		parent_kn = prgrp-&gt;mon.mon_data_kn;</div><div class='del'>-		mkdir_mondata_subdir(parent_kn, d, r, prgrp);</div><div class='del'>-</div><div class='del'>-		head = &amp;prgrp-&gt;mon.crdtgrp_list;</div><div class='del'>-		list_for_each_entry(crgrp, head, mon.crdtgrp_list) {</div><div class='del'>-			parent_kn = crgrp-&gt;mon.mon_data_kn;</div><div class='del'>-			mkdir_mondata_subdir(parent_kn, d, r, crgrp);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mkdir_mondata_subdir_alldom(struct kernfs_node *parent_kn,</div><div class='del'>-				       struct rdt_resource *r,</div><div class='del'>-				       struct rdtgroup *prgrp)</div><div class='del'>-{</div><div class='del'>-	struct rdt_mon_domain *dom;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Walking r-&gt;domains, ensure it can't race with cpuhp */</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(dom, &amp;r-&gt;mon_domains, hdr.list) {</div><div class='del'>-		ret = mkdir_mondata_subdir(parent_kn, dom, r, prgrp);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This creates a directory mon_data which contains the monitored data.</div><div class='del'>- *</div><div class='del'>- * mon_data has one directory for each domain which are named</div><div class='del'>- * in the format mon_&lt;domain_name&gt;_&lt;domain_id&gt;. For ex: A mon_data</div><div class='del'>- * with L3 domain looks as below:</div><div class='del'>- * ./mon_data:</div><div class='del'>- * mon_L3_00</div><div class='del'>- * mon_L3_01</div><div class='del'>- * mon_L3_02</div><div class='del'>- * ...</div><div class='del'>- *</div><div class='del'>- * Each domain directory has one file per event:</div><div class='del'>- * ./mon_L3_00/:</div><div class='del'>- * llc_occupancy</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static int mkdir_mondata_all(struct kernfs_node *parent_kn,</div><div class='del'>-			     struct rdtgroup *prgrp,</div><div class='del'>-			     struct kernfs_node **dest_kn)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Create the mon_data directory first.</div><div class='del'>-	 */</div><div class='del'>-	ret = mongroup_create_dir(parent_kn, prgrp, "mon_data", &amp;kn);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (dest_kn)</div><div class='del'>-		*dest_kn = kn;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Create the subdirectories for each domain. Note that all events</div><div class='del'>-	 * in a domain like L3 are grouped into a resource whose domain is L3</div><div class='del'>-	 */</div><div class='del'>-	for_each_mon_capable_rdt_resource(r) {</div><div class='del'>-		ret = mkdir_mondata_subdir_alldom(kn, r, prgrp);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_destroy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_destroy:</div><div class='del'>-	kernfs_remove(kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cbm_ensure_valid - Enforce validity on provided CBM</div><div class='del'>- * @_val:	Candidate CBM</div><div class='del'>- * @r:		RDT resource to which the CBM belongs</div><div class='del'>- *</div><div class='del'>- * The provided CBM represents all cache portions available for use. This</div><div class='del'>- * may be represented by a bitmap that does not consist of contiguous ones</div><div class='del'>- * and thus be an invalid CBM.</div><div class='del'>- * Here the provided CBM is forced to be a valid CBM by only considering</div><div class='del'>- * the first set of contiguous bits as valid and clearing all bits.</div><div class='del'>- * The intention here is to provide a valid default CBM with which a new</div><div class='del'>- * resource group is initialized. The user can follow this with a</div><div class='del'>- * modification to the CBM if the default does not satisfy the</div><div class='del'>- * requirements.</div><div class='del'>- */</div><div class='del'>-static u32 cbm_ensure_valid(u32 _val, struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	unsigned int cbm_len = r-&gt;cache.cbm_len;</div><div class='del'>-	unsigned long first_bit, zero_bit;</div><div class='del'>-	unsigned long val = _val;</div><div class='del'>-</div><div class='del'>-	if (!val)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	first_bit = find_first_bit(&amp;val, cbm_len);</div><div class='del'>-	zero_bit = find_next_zero_bit(&amp;val, cbm_len, first_bit);</div><div class='del'>-</div><div class='del'>-	/* Clear any remaining bits to ensure contiguous region */</div><div class='del'>-	bitmap_clear(&amp;val, zero_bit, cbm_len - zero_bit);</div><div class='del'>-	return (u32)val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initialize cache resources per RDT domain</div><div class='del'>- *</div><div class='del'>- * Set the RDT domain up to start off with all usable allocations. That is,</div><div class='del'>- * all shareable and unused bits. All-zero CBM is invalid.</div><div class='del'>- */</div><div class='del'>-static int __init_one_rdt_domain(struct rdt_ctrl_domain *d, struct resctrl_schema *s,</div><div class='del'>-				 u32 closid)</div><div class='del'>-{</div><div class='del'>-	enum resctrl_conf_type peer_type = resctrl_peer_type(s-&gt;conf_type);</div><div class='del'>-	enum resctrl_conf_type t = s-&gt;conf_type;</div><div class='del'>-	struct resctrl_staged_config *cfg;</div><div class='del'>-	struct rdt_resource *r = s-&gt;res;</div><div class='del'>-	u32 used_b = 0, unused_b = 0;</div><div class='del'>-	unsigned long tmp_cbm;</div><div class='del'>-	enum rdtgrp_mode mode;</div><div class='del'>-	u32 peer_ctl, ctrl_val;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	cfg = &amp;d-&gt;staged_config[t];</div><div class='del'>-	cfg-&gt;have_new_ctrl = false;</div><div class='del'>-	cfg-&gt;new_ctrl = r-&gt;cache.shareable_bits;</div><div class='del'>-	used_b = r-&gt;cache.shareable_bits;</div><div class='del'>-	for (i = 0; i &lt; closids_supported(); i++) {</div><div class='del'>-		if (closid_allocated(i) &amp;&amp; i != closid) {</div><div class='del'>-			mode = rdtgroup_mode_by_closid(i);</div><div class='del'>-			if (mode == RDT_MODE_PSEUDO_LOCKSETUP)</div><div class='del'>-				/*</div><div class='del'>-				 * ctrl values for locksetup aren't relevant</div><div class='del'>-				 * until the schemata is written, and the mode</div><div class='del'>-				 * becomes RDT_MODE_PSEUDO_LOCKED.</div><div class='del'>-				 */</div><div class='del'>-				continue;</div><div class='del'>-			/*</div><div class='del'>-			 * If CDP is active include peer domain's</div><div class='del'>-			 * usage to ensure there is no overlap</div><div class='del'>-			 * with an exclusive group.</div><div class='del'>-			 */</div><div class='del'>-			if (resctrl_arch_get_cdp_enabled(r-&gt;rid))</div><div class='del'>-				peer_ctl = resctrl_arch_get_config(r, d, i,</div><div class='del'>-								   peer_type);</div><div class='del'>-			else</div><div class='del'>-				peer_ctl = 0;</div><div class='del'>-			ctrl_val = resctrl_arch_get_config(r, d, i,</div><div class='del'>-							   s-&gt;conf_type);</div><div class='del'>-			used_b |= ctrl_val | peer_ctl;</div><div class='del'>-			if (mode == RDT_MODE_SHAREABLE)</div><div class='del'>-				cfg-&gt;new_ctrl |= ctrl_val | peer_ctl;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (d-&gt;plr &amp;&amp; d-&gt;plr-&gt;cbm &gt; 0)</div><div class='del'>-		used_b |= d-&gt;plr-&gt;cbm;</div><div class='del'>-	unused_b = used_b ^ (BIT_MASK(r-&gt;cache.cbm_len) - 1);</div><div class='del'>-	unused_b &amp;= BIT_MASK(r-&gt;cache.cbm_len) - 1;</div><div class='del'>-	cfg-&gt;new_ctrl |= unused_b;</div><div class='del'>-	/*</div><div class='del'>-	 * Force the initial CBM to be valid, user can</div><div class='del'>-	 * modify the CBM based on system availability.</div><div class='del'>-	 */</div><div class='del'>-	cfg-&gt;new_ctrl = cbm_ensure_valid(cfg-&gt;new_ctrl, r);</div><div class='del'>-	/*</div><div class='del'>-	 * Assign the u32 CBM to an unsigned long to ensure that</div><div class='del'>-	 * bitmap_weight() does not access out-of-bound memory.</div><div class='del'>-	 */</div><div class='del'>-	tmp_cbm = cfg-&gt;new_ctrl;</div><div class='del'>-	if (bitmap_weight(&amp;tmp_cbm, r-&gt;cache.cbm_len) &lt; r-&gt;cache.min_cbm_bits) {</div><div class='del'>-		rdt_last_cmd_printf("No space on %s:%d\n", s-&gt;name, d-&gt;hdr.id);</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-	}</div><div class='del'>-	cfg-&gt;have_new_ctrl = true;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initialize cache resources with default values.</div><div class='del'>- *</div><div class='del'>- * A new RDT group is being created on an allocation capable (CAT)</div><div class='del'>- * supporting system. Set this group up to start off with all usable</div><div class='del'>- * allocations.</div><div class='del'>- *</div><div class='del'>- * If there are no more shareable bits available on any domain then</div><div class='del'>- * the entire allocation will fail.</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_init_cat(struct resctrl_schema *s, u32 closid)</div><div class='del'>-{</div><div class='del'>-	struct rdt_ctrl_domain *d;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(d, &amp;s-&gt;res-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-		ret = __init_one_rdt_domain(d, s, closid);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Initialize MBA resource with default values. */</div><div class='del'>-static void rdtgroup_init_mba(struct rdt_resource *r, u32 closid)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_staged_config *cfg;</div><div class='del'>-	struct rdt_ctrl_domain *d;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(d, &amp;r-&gt;ctrl_domains, hdr.list) {</div><div class='del'>-		if (is_mba_sc(r)) {</div><div class='del'>-			d-&gt;mbps_val[closid] = MBA_MAX_MBPS;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cfg = &amp;d-&gt;staged_config[CDP_NONE];</div><div class='del'>-		cfg-&gt;new_ctrl = resctrl_get_default_ctrl(r);</div><div class='del'>-		cfg-&gt;have_new_ctrl = true;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Initialize the RDT group's allocations. */</div><div class='del'>-static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	struct resctrl_schema *s;</div><div class='del'>-	struct rdt_resource *r;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rdt_staged_configs_clear();</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(s, &amp;resctrl_schema_all, list) {</div><div class='del'>-		r = s-&gt;res;</div><div class='del'>-		if (r-&gt;rid == RDT_RESOURCE_MBA ||</div><div class='del'>-		    r-&gt;rid == RDT_RESOURCE_SMBA) {</div><div class='del'>-			rdtgroup_init_mba(r, rdtgrp-&gt;closid);</div><div class='del'>-			if (is_mba_sc(r))</div><div class='del'>-				continue;</div><div class='del'>-		} else {</div><div class='del'>-			ret = rdtgroup_init_cat(s, rdtgrp-&gt;closid);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = resctrl_arch_update_domains(r, rdtgrp-&gt;closid);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			rdt_last_cmd_puts("Failed to initialize allocations\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rdtgrp-&gt;mode = RDT_MODE_SHAREABLE;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	rdt_staged_configs_clear();</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mkdir_rdt_prepare_rmid_alloc(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!resctrl_arch_mon_capable())</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	ret = alloc_rmid(rdtgrp-&gt;closid);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		rdt_last_cmd_puts("Out of RMIDs\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	rdtgrp-&gt;mon.rmid = ret;</div><div class='del'>-</div><div class='del'>-	ret = mkdir_mondata_all(rdtgrp-&gt;kn, rdtgrp, &amp;rdtgrp-&gt;mon.mon_data_kn);</div><div class='del'>-	if (ret) {</div><div class='del'>-		rdt_last_cmd_puts("kernfs subdir error\n");</div><div class='del'>-		free_rmid(rdtgrp-&gt;closid, rdtgrp-&gt;mon.rmid);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mkdir_rdt_prepare_rmid_free(struct rdtgroup *rgrp)</div><div class='del'>-{</div><div class='del'>-	if (resctrl_arch_mon_capable())</div><div class='del'>-		free_rmid(rgrp-&gt;closid, rgrp-&gt;mon.rmid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mkdir_rdt_prepare(struct kernfs_node *parent_kn,</div><div class='del'>-			     const char *name, umode_t mode,</div><div class='del'>-			     enum rdt_group_type rtype, struct rdtgroup **r)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *prdtgrp, *rdtgrp;</div><div class='del'>-	unsigned long files = 0;</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	prdtgrp = rdtgroup_kn_lock_live(parent_kn);</div><div class='del'>-	if (!prdtgrp) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rtype == RDTMON_GROUP &amp;&amp;</div><div class='del'>-	    (prdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP ||</div><div class='del'>-	     prdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED)) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		rdt_last_cmd_puts("Pseudo-locking in progress\n");</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate the rdtgroup. */</div><div class='del'>-	rdtgrp = kzalloc(sizeof(*rdtgrp), GFP_KERNEL);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		ret = -ENOSPC;</div><div class='del'>-		rdt_last_cmd_puts("Kernel out of memory\n");</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-	*r = rdtgrp;</div><div class='del'>-	rdtgrp-&gt;mon.parent = prdtgrp;</div><div class='del'>-	rdtgrp-&gt;type = rtype;</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdtgrp-&gt;mon.crdtgrp_list);</div><div class='del'>-</div><div class='del'>-	/* kernfs creates the directory for rdtgrp */</div><div class='del'>-	kn = kernfs_create_dir(parent_kn, name, mode, rdtgrp);</div><div class='del'>-	if (IS_ERR(kn)) {</div><div class='del'>-		ret = PTR_ERR(kn);</div><div class='del'>-		rdt_last_cmd_puts("kernfs create error\n");</div><div class='del'>-		goto out_free_rgrp;</div><div class='del'>-	}</div><div class='del'>-	rdtgrp-&gt;kn = kn;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * kernfs_remove() will drop the reference count on "kn" which</div><div class='del'>-	 * will free it. But we still need it to stick around for the</div><div class='del'>-	 * rdtgroup_kn_unlock(kn) call. Take one extra reference here,</div><div class='del'>-	 * which will be dropped by kernfs_put() in rdtgroup_remove().</div><div class='del'>-	 */</div><div class='del'>-	kernfs_get(kn);</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_kn_set_ugid(kn);</div><div class='del'>-	if (ret) {</div><div class='del'>-		rdt_last_cmd_puts("kernfs perm error\n");</div><div class='del'>-		goto out_destroy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rtype == RDTCTRL_GROUP) {</div><div class='del'>-		files = RFTYPE_BASE | RFTYPE_CTRL;</div><div class='del'>-		if (resctrl_arch_mon_capable())</div><div class='del'>-			files |= RFTYPE_MON;</div><div class='del'>-	} else {</div><div class='del'>-		files = RFTYPE_BASE | RFTYPE_MON;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_add_files(kn, files);</div><div class='del'>-	if (ret) {</div><div class='del'>-		rdt_last_cmd_puts("kernfs fill error\n");</div><div class='del'>-		goto out_destroy;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The caller unlocks the parent_kn upon success.</div><div class='del'>-	 */</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_destroy:</div><div class='del'>-	kernfs_put(rdtgrp-&gt;kn);</div><div class='del'>-	kernfs_remove(rdtgrp-&gt;kn);</div><div class='del'>-out_free_rgrp:</div><div class='del'>-	kfree(rdtgrp);</div><div class='del'>-out_unlock:</div><div class='del'>-	rdtgroup_kn_unlock(parent_kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mkdir_rdt_prepare_clean(struct rdtgroup *rgrp)</div><div class='del'>-{</div><div class='del'>-	kernfs_remove(rgrp-&gt;kn);</div><div class='del'>-	rdtgroup_remove(rgrp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Create a monitor group under "mon_groups" directory of a control</div><div class='del'>- * and monitor group(ctrl_mon). This is a resource group</div><div class='del'>- * to monitor a subset of tasks and cpus in its parent ctrl_mon group.</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_mkdir_mon(struct kernfs_node *parent_kn,</div><div class='del'>-			      const char *name, umode_t mode)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp, *prgrp;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mkdir_rdt_prepare(parent_kn, name, mode, RDTMON_GROUP, &amp;rdtgrp);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	prgrp = rdtgrp-&gt;mon.parent;</div><div class='del'>-	rdtgrp-&gt;closid = prgrp-&gt;closid;</div><div class='del'>-</div><div class='del'>-	ret = mkdir_rdt_prepare_rmid_alloc(rdtgrp);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mkdir_rdt_prepare_clean(rdtgrp);</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kernfs_activate(rdtgrp-&gt;kn);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Add the rdtgrp to the list of rdtgrps the parent</div><div class='del'>-	 * ctrl_mon group has to track.</div><div class='del'>-	 */</div><div class='del'>-	list_add_tail(&amp;rdtgrp-&gt;mon.crdtgrp_list, &amp;prgrp-&gt;mon.crdtgrp_list);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	rdtgroup_kn_unlock(parent_kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * These are rdtgroups created under the root directory. Can be used</div><div class='del'>- * to allocate and monitor resources.</div><div class='del'>- */</div><div class='del'>-static int rdtgroup_mkdir_ctrl_mon(struct kernfs_node *parent_kn,</div><div class='del'>-				   const char *name, umode_t mode)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	struct kernfs_node *kn;</div><div class='del'>-	u32 closid;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mkdir_rdt_prepare(parent_kn, name, mode, RDTCTRL_GROUP, &amp;rdtgrp);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	kn = rdtgrp-&gt;kn;</div><div class='del'>-	ret = closid_alloc();</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		rdt_last_cmd_puts("Out of CLOSIDs\n");</div><div class='del'>-		goto out_common_fail;</div><div class='del'>-	}</div><div class='del'>-	closid = ret;</div><div class='del'>-	ret = 0;</div><div class='del'>-</div><div class='del'>-	rdtgrp-&gt;closid = closid;</div><div class='del'>-</div><div class='del'>-	ret = mkdir_rdt_prepare_rmid_alloc(rdtgrp);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_closid_free;</div><div class='del'>-</div><div class='del'>-	kernfs_activate(rdtgrp-&gt;kn);</div><div class='del'>-</div><div class='del'>-	ret = rdtgroup_init_alloc(rdtgrp);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out_rmid_free;</div><div class='del'>-</div><div class='del'>-	list_add(&amp;rdtgrp-&gt;rdtgroup_list, &amp;rdt_all_groups);</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_mon_capable()) {</div><div class='del'>-		/*</div><div class='del'>-		 * Create an empty mon_groups directory to hold the subset</div><div class='del'>-		 * of tasks and cpus to monitor.</div><div class='del'>-		 */</div><div class='del'>-		ret = mongroup_create_dir(kn, rdtgrp, "mon_groups", NULL);</div><div class='del'>-		if (ret) {</div><div class='del'>-			rdt_last_cmd_puts("kernfs subdir error\n");</div><div class='del'>-			goto out_del_list;</div><div class='del'>-		}</div><div class='del'>-		if (is_mba_sc(NULL))</div><div class='del'>-			rdtgrp-&gt;mba_mbps_event = mba_mbps_default_event;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	goto out_unlock;</div><div class='del'>-</div><div class='del'>-out_del_list:</div><div class='del'>-	list_del(&amp;rdtgrp-&gt;rdtgroup_list);</div><div class='del'>-out_rmid_free:</div><div class='del'>-	mkdir_rdt_prepare_rmid_free(rdtgrp);</div><div class='del'>-out_closid_free:</div><div class='del'>-	closid_free(closid);</div><div class='del'>-out_common_fail:</div><div class='del'>-	mkdir_rdt_prepare_clean(rdtgrp);</div><div class='del'>-out_unlock:</div><div class='del'>-	rdtgroup_kn_unlock(parent_kn);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We allow creating mon groups only with in a directory called "mon_groups"</div><div class='del'>- * which is present in every ctrl_mon group. Check if this is a valid</div><div class='del'>- * "mon_groups" directory.</div><div class='del'>- *</div><div class='del'>- * 1. The directory should be named "mon_groups".</div><div class='del'>- * 2. The mon group itself should "not" be named "mon_groups".</div><div class='del'>- *   This makes sure "mon_groups" directory always has a ctrl_mon group</div><div class='del'>- *   as parent.</div><div class='del'>- */</div><div class='del'>-static bool is_mon_groups(struct kernfs_node *kn, const char *name)</div><div class='del'>-{</div><div class='del'>-	return (!strcmp(rdt_kn_name(kn), "mon_groups") &amp;&amp;</div><div class='del'>-		strcmp(name, "mon_groups"));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_mkdir(struct kernfs_node *parent_kn, const char *name,</div><div class='del'>-			  umode_t mode)</div><div class='del'>-{</div><div class='del'>-	/* Do not accept '\n' to avoid unparsable situation. */</div><div class='del'>-	if (strchr(name, '\n'))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the parent directory is the root directory and RDT</div><div class='del'>-	 * allocation is supported, add a control and monitoring</div><div class='del'>-	 * subdirectory</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_arch_alloc_capable() &amp;&amp; parent_kn == rdtgroup_default.kn)</div><div class='del'>-		return rdtgroup_mkdir_ctrl_mon(parent_kn, name, mode);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If RDT monitoring is supported and the parent directory is a valid</div><div class='del'>-	 * "mon_groups" directory, add a monitoring subdirectory.</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_arch_mon_capable() &amp;&amp; is_mon_groups(parent_kn, name))</div><div class='del'>-		return rdtgroup_mkdir_mon(parent_kn, name, mode);</div><div class='del'>-</div><div class='del'>-	return -EPERM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_rmdir_mon(struct rdtgroup *rdtgrp, cpumask_var_t tmpmask)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *prdtgrp = rdtgrp-&gt;mon.parent;</div><div class='del'>-	u32 closid, rmid;</div><div class='del'>-	int cpu;</div><div class='del'>-</div><div class='del'>-	/* Give any tasks back to the parent group */</div><div class='del'>-	rdt_move_group_tasks(rdtgrp, prdtgrp, tmpmask);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Update per cpu closid/rmid of the moved CPUs first.</div><div class='del'>-	 * Note: the closid will not change, but the arch code still needs it.</div><div class='del'>-	 */</div><div class='del'>-	closid = prdtgrp-&gt;closid;</div><div class='del'>-	rmid = prdtgrp-&gt;mon.rmid;</div><div class='del'>-	for_each_cpu(cpu, &amp;rdtgrp-&gt;cpu_mask)</div><div class='del'>-		resctrl_arch_set_cpu_default_closid_rmid(cpu, closid, rmid);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Update the MSR on moved CPUs and CPUs which have moved</div><div class='del'>-	 * task running on them.</div><div class='del'>-	 */</div><div class='del'>-	cpumask_or(tmpmask, tmpmask, &amp;rdtgrp-&gt;cpu_mask);</div><div class='del'>-	update_closid_rmid(tmpmask, NULL);</div><div class='del'>-</div><div class='del'>-	rdtgrp-&gt;flags = RDT_DELETED;</div><div class='del'>-	free_rmid(rdtgrp-&gt;closid, rdtgrp-&gt;mon.rmid);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Remove the rdtgrp from the parent ctrl_mon group's list</div><div class='del'>-	 */</div><div class='del'>-	WARN_ON(list_empty(&amp;prdtgrp-&gt;mon.crdtgrp_list));</div><div class='del'>-	list_del(&amp;rdtgrp-&gt;mon.crdtgrp_list);</div><div class='del'>-</div><div class='del'>-	kernfs_remove(rdtgrp-&gt;kn);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_ctrl_remove(struct rdtgroup *rdtgrp)</div><div class='del'>-{</div><div class='del'>-	rdtgrp-&gt;flags = RDT_DELETED;</div><div class='del'>-	list_del(&amp;rdtgrp-&gt;rdtgroup_list);</div><div class='del'>-</div><div class='del'>-	kernfs_remove(rdtgrp-&gt;kn);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_rmdir_ctrl(struct rdtgroup *rdtgrp, cpumask_var_t tmpmask)</div><div class='del'>-{</div><div class='del'>-	u32 closid, rmid;</div><div class='del'>-	int cpu;</div><div class='del'>-</div><div class='del'>-	/* Give any tasks back to the default group */</div><div class='del'>-	rdt_move_group_tasks(rdtgrp, &amp;rdtgroup_default, tmpmask);</div><div class='del'>-</div><div class='del'>-	/* Give any CPUs back to the default group */</div><div class='del'>-	cpumask_or(&amp;rdtgroup_default.cpu_mask,</div><div class='del'>-		   &amp;rdtgroup_default.cpu_mask, &amp;rdtgrp-&gt;cpu_mask);</div><div class='del'>-</div><div class='del'>-	/* Update per cpu closid and rmid of the moved CPUs first */</div><div class='del'>-	closid = rdtgroup_default.closid;</div><div class='del'>-	rmid = rdtgroup_default.mon.rmid;</div><div class='del'>-	for_each_cpu(cpu, &amp;rdtgrp-&gt;cpu_mask)</div><div class='del'>-		resctrl_arch_set_cpu_default_closid_rmid(cpu, closid, rmid);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Update the MSR on moved CPUs and CPUs which have moved</div><div class='del'>-	 * task running on them.</div><div class='del'>-	 */</div><div class='del'>-	cpumask_or(tmpmask, tmpmask, &amp;rdtgrp-&gt;cpu_mask);</div><div class='del'>-	update_closid_rmid(tmpmask, NULL);</div><div class='del'>-</div><div class='del'>-	free_rmid(rdtgrp-&gt;closid, rdtgrp-&gt;mon.rmid);</div><div class='del'>-	closid_free(rdtgrp-&gt;closid);</div><div class='del'>-</div><div class='del'>-	rdtgroup_ctrl_remove(rdtgrp);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Free all the child monitor group rmids.</div><div class='del'>-	 */</div><div class='del'>-	free_all_child_rdtgrp(rdtgrp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct kernfs_node *rdt_kn_parent(struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Valid within the RCU section it was obtained or while rdtgroup_mutex</div><div class='del'>-	 * is held.</div><div class='del'>-	 */</div><div class='del'>-	return rcu_dereference_check(kn-&gt;__parent, lockdep_is_held(&amp;rdtgroup_mutex));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_rmdir(struct kernfs_node *kn)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *parent_kn;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	cpumask_var_t tmpmask;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;tmpmask, GFP_KERNEL))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	rdtgrp = rdtgroup_kn_lock_live(kn);</div><div class='del'>-	if (!rdtgrp) {</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	parent_kn = rdt_kn_parent(kn);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the rdtgroup is a ctrl_mon group and parent directory</div><div class='del'>-	 * is the root directory, remove the ctrl_mon group.</div><div class='del'>-	 *</div><div class='del'>-	 * If the rdtgroup is a mon group and parent directory</div><div class='del'>-	 * is a valid "mon_groups" directory, remove the mon group.</div><div class='del'>-	 */</div><div class='del'>-	if (rdtgrp-&gt;type == RDTCTRL_GROUP &amp;&amp; parent_kn == rdtgroup_default.kn &amp;&amp;</div><div class='del'>-	    rdtgrp != &amp;rdtgroup_default) {</div><div class='del'>-		if (rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKSETUP ||</div><div class='del'>-		    rdtgrp-&gt;mode == RDT_MODE_PSEUDO_LOCKED) {</div><div class='del'>-			ret = rdtgroup_ctrl_remove(rdtgrp);</div><div class='del'>-		} else {</div><div class='del'>-			ret = rdtgroup_rmdir_ctrl(rdtgrp, tmpmask);</div><div class='del'>-		}</div><div class='del'>-	} else if (rdtgrp-&gt;type == RDTMON_GROUP &amp;&amp;</div><div class='del'>-		 is_mon_groups(parent_kn, rdt_kn_name(kn))) {</div><div class='del'>-		ret = rdtgroup_rmdir_mon(rdtgrp, tmpmask);</div><div class='del'>-	} else {</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	rdtgroup_kn_unlock(kn);</div><div class='del'>-	free_cpumask_var(tmpmask);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mongrp_reparent() - replace parent CTRL_MON group of a MON group</div><div class='del'>- * @rdtgrp:		the MON group whose parent should be replaced</div><div class='del'>- * @new_prdtgrp:	replacement parent CTRL_MON group for @rdtgrp</div><div class='del'>- * @cpus:		cpumask provided by the caller for use during this call</div><div class='del'>- *</div><div class='del'>- * Replaces the parent CTRL_MON group for a MON group, resulting in all member</div><div class='del'>- * tasks' CLOSID immediately changing to that of the new parent group.</div><div class='del'>- * Monitoring data for the group is unaffected by this operation.</div><div class='del'>- */</div><div class='del'>-static void mongrp_reparent(struct rdtgroup *rdtgrp,</div><div class='del'>-			    struct rdtgroup *new_prdtgrp,</div><div class='del'>-			    cpumask_var_t cpus)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *prdtgrp = rdtgrp-&gt;mon.parent;</div><div class='del'>-</div><div class='del'>-	WARN_ON(rdtgrp-&gt;type != RDTMON_GROUP);</div><div class='del'>-	WARN_ON(new_prdtgrp-&gt;type != RDTCTRL_GROUP);</div><div class='del'>-</div><div class='del'>-	/* Nothing to do when simply renaming a MON group. */</div><div class='del'>-	if (prdtgrp == new_prdtgrp)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	WARN_ON(list_empty(&amp;prdtgrp-&gt;mon.crdtgrp_list));</div><div class='del'>-	list_move_tail(&amp;rdtgrp-&gt;mon.crdtgrp_list,</div><div class='del'>-		       &amp;new_prdtgrp-&gt;mon.crdtgrp_list);</div><div class='del'>-</div><div class='del'>-	rdtgrp-&gt;mon.parent = new_prdtgrp;</div><div class='del'>-	rdtgrp-&gt;closid = new_prdtgrp-&gt;closid;</div><div class='del'>-</div><div class='del'>-	/* Propagate updated closid to all tasks in this group. */</div><div class='del'>-	rdt_move_group_tasks(rdtgrp, rdtgrp, cpus);</div><div class='del'>-</div><div class='del'>-	update_closid_rmid(cpus, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_rename(struct kernfs_node *kn,</div><div class='del'>-			   struct kernfs_node *new_parent, const char *new_name)</div><div class='del'>-{</div><div class='del'>-	struct kernfs_node *kn_parent;</div><div class='del'>-	struct rdtgroup *new_prdtgrp;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-	cpumask_var_t tmpmask;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	rdtgrp = kernfs_to_rdtgroup(kn);</div><div class='del'>-	new_prdtgrp = kernfs_to_rdtgroup(new_parent);</div><div class='del'>-	if (!rdtgrp || !new_prdtgrp)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	/* Release both kernfs active_refs before obtaining rdtgroup mutex. */</div><div class='del'>-	rdtgroup_kn_get(rdtgrp, kn);</div><div class='del'>-	rdtgroup_kn_get(new_prdtgrp, new_parent);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rdt_last_cmd_clear();</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Don't allow kernfs_to_rdtgroup() to return a parent rdtgroup if</div><div class='del'>-	 * either kernfs_node is a file.</div><div class='del'>-	 */</div><div class='del'>-	if (kernfs_type(kn) != KERNFS_DIR ||</div><div class='del'>-	    kernfs_type(new_parent) != KERNFS_DIR) {</div><div class='del'>-		rdt_last_cmd_puts("Source and destination must be directories");</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((rdtgrp-&gt;flags &amp; RDT_DELETED) || (new_prdtgrp-&gt;flags &amp; RDT_DELETED)) {</div><div class='del'>-		ret = -ENOENT;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kn_parent = rdt_kn_parent(kn);</div><div class='del'>-	if (rdtgrp-&gt;type != RDTMON_GROUP || !kn_parent ||</div><div class='del'>-	    !is_mon_groups(kn_parent, rdt_kn_name(kn))) {</div><div class='del'>-		rdt_last_cmd_puts("Source must be a MON group\n");</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!is_mon_groups(new_parent, new_name)) {</div><div class='del'>-		rdt_last_cmd_puts("Destination must be a mon_groups subdirectory\n");</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the MON group is monitoring CPUs, the CPUs must be assigned to the</div><div class='del'>-	 * current parent CTRL_MON group and therefore cannot be assigned to</div><div class='del'>-	 * the new parent, making the move illegal.</div><div class='del'>-	 */</div><div class='del'>-	if (!cpumask_empty(&amp;rdtgrp-&gt;cpu_mask) &amp;&amp;</div><div class='del'>-	    rdtgrp-&gt;mon.parent != new_prdtgrp) {</div><div class='del'>-		rdt_last_cmd_puts("Cannot move a MON group that monitors CPUs\n");</div><div class='del'>-		ret = -EPERM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allocate the cpumask for use in mongrp_reparent() to avoid the</div><div class='del'>-	 * possibility of failing to allocate it after kernfs_rename() has</div><div class='del'>-	 * succeeded.</div><div class='del'>-	 */</div><div class='del'>-	if (!zalloc_cpumask_var(&amp;tmpmask, GFP_KERNEL)) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Perform all input validation and allocations needed to ensure</div><div class='del'>-	 * mongrp_reparent() will succeed before calling kernfs_rename(),</div><div class='del'>-	 * otherwise it would be necessary to revert this call if</div><div class='del'>-	 * mongrp_reparent() failed.</div><div class='del'>-	 */</div><div class='del'>-	ret = kernfs_rename(kn, new_parent, new_name);</div><div class='del'>-	if (!ret)</div><div class='del'>-		mongrp_reparent(rdtgrp, new_prdtgrp, tmpmask);</div><div class='del'>-</div><div class='del'>-	free_cpumask_var(tmpmask);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-	rdtgroup_kn_put(rdtgrp, kn);</div><div class='del'>-	rdtgroup_kn_put(new_prdtgrp, new_parent);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rdtgroup_show_options(struct seq_file *seq, struct kernfs_root *kf)</div><div class='del'>-{</div><div class='del'>-	if (resctrl_arch_get_cdp_enabled(RDT_RESOURCE_L3))</div><div class='del'>-		seq_puts(seq, ",cdp");</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_get_cdp_enabled(RDT_RESOURCE_L2))</div><div class='del'>-		seq_puts(seq, ",cdpl2");</div><div class='del'>-</div><div class='del'>-	if (is_mba_sc(resctrl_arch_get_resource(RDT_RESOURCE_MBA)))</div><div class='del'>-		seq_puts(seq, ",mba_MBps");</div><div class='del'>-</div><div class='del'>-	if (resctrl_debug)</div><div class='del'>-		seq_puts(seq, ",debug");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct kernfs_syscall_ops rdtgroup_kf_syscall_ops = {</div><div class='del'>-	.mkdir		= rdtgroup_mkdir,</div><div class='del'>-	.rmdir		= rdtgroup_rmdir,</div><div class='del'>-	.rename		= rdtgroup_rename,</div><div class='del'>-	.show_options	= rdtgroup_show_options,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int rdtgroup_setup_root(struct rdt_fs_context *ctx)</div><div class='del'>-{</div><div class='del'>-	rdt_root = kernfs_create_root(&amp;rdtgroup_kf_syscall_ops,</div><div class='del'>-				      KERNFS_ROOT_CREATE_DEACTIVATED |</div><div class='del'>-				      KERNFS_ROOT_EXTRA_OPEN_PERM_CHECK,</div><div class='del'>-				      &amp;rdtgroup_default);</div><div class='del'>-	if (IS_ERR(rdt_root))</div><div class='del'>-		return PTR_ERR(rdt_root);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;kfc.root = rdt_root;</div><div class='del'>-	rdtgroup_default.kn = kernfs_root_to_node(rdt_root);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rdtgroup_destroy_root(void)</div><div class='del'>-{</div><div class='del'>-	kernfs_destroy_root(rdt_root);</div><div class='del'>-	rdtgroup_default.kn = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init rdtgroup_setup_default(void)</div><div class='del'>-{</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	rdtgroup_default.closid = RESCTRL_RESERVED_CLOSID;</div><div class='del'>-	rdtgroup_default.mon.rmid = RESCTRL_RESERVED_RMID;</div><div class='del'>-	rdtgroup_default.type = RDTCTRL_GROUP;</div><div class='del'>-	INIT_LIST_HEAD(&amp;rdtgroup_default.mon.crdtgrp_list);</div><div class='del'>-</div><div class='del'>-	list_add(&amp;rdtgroup_default.rdtgroup_list, &amp;rdt_all_groups);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void domain_destroy_mon_state(struct rdt_mon_domain *d)</div><div class='del'>-{</div><div class='del'>-	bitmap_free(d-&gt;rmid_busy_llc);</div><div class='del'>-	kfree(d-&gt;mbm_total);</div><div class='del'>-	kfree(d-&gt;mbm_local);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void resctrl_offline_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (supports_mba_mbps() &amp;&amp; r-&gt;rid == RDT_RESOURCE_MBA)</div><div class='del'>-		mba_sc_domain_destroy(r, d);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void resctrl_offline_mon_domain(struct rdt_resource *r, struct rdt_mon_domain *d)</div><div class='del'>-{</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If resctrl is mounted, remove all the</div><div class='del'>-	 * per domain monitor data directories.</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_mounted &amp;&amp; resctrl_arch_mon_capable())</div><div class='del'>-		rmdir_mondata_subdir_allrdtgrp(r, d);</div><div class='del'>-</div><div class='del'>-	if (resctrl_is_mbm_enabled())</div><div class='del'>-		cancel_delayed_work(&amp;d-&gt;mbm_over);</div><div class='del'>-	if (resctrl_arch_is_llc_occupancy_enabled() &amp;&amp; has_busy_rmid(d)) {</div><div class='del'>-		/*</div><div class='del'>-		 * When a package is going down, forcefully</div><div class='del'>-		 * decrement rmid-&gt;ebusy. There is no way to know</div><div class='del'>-		 * that the L3 was flushed and hence may lead to</div><div class='del'>-		 * incorrect counts in rare scenarios, but leaving</div><div class='del'>-		 * the RMID as busy creates RMID leaks if the</div><div class='del'>-		 * package never comes back.</div><div class='del'>-		 */</div><div class='del'>-		__check_limbo(d, true);</div><div class='del'>-		cancel_delayed_work(&amp;d-&gt;cqm_limbo);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	domain_destroy_mon_state(d);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * domain_setup_mon_state() -  Initialise domain monitoring structures.</div><div class='del'>- * @r:	The resource for the newly online domain.</div><div class='del'>- * @d:	The newly online domain.</div><div class='del'>- *</div><div class='del'>- * Allocate monitor resources that belong to this domain.</div><div class='del'>- * Called when the first CPU of a domain comes online, regardless of whether</div><div class='del'>- * the filesystem is mounted.</div><div class='del'>- * During boot this may be called before global allocations have been made by</div><div class='del'>- * resctrl_mon_resource_init().</div><div class='del'>- *</div><div class='del'>- * Returns 0 for success, or -ENOMEM.</div><div class='del'>- */</div><div class='del'>-static int domain_setup_mon_state(struct rdt_resource *r, struct rdt_mon_domain *d)</div><div class='del'>-{</div><div class='del'>-	u32 idx_limit = resctrl_arch_system_num_rmid_idx();</div><div class='del'>-	size_t tsize;</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_is_llc_occupancy_enabled()) {</div><div class='del'>-		d-&gt;rmid_busy_llc = bitmap_zalloc(idx_limit, GFP_KERNEL);</div><div class='del'>-		if (!d-&gt;rmid_busy_llc)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	if (resctrl_arch_is_mbm_total_enabled()) {</div><div class='del'>-		tsize = sizeof(*d-&gt;mbm_total);</div><div class='del'>-		d-&gt;mbm_total = kcalloc(idx_limit, tsize, GFP_KERNEL);</div><div class='del'>-		if (!d-&gt;mbm_total) {</div><div class='del'>-			bitmap_free(d-&gt;rmid_busy_llc);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (resctrl_arch_is_mbm_local_enabled()) {</div><div class='del'>-		tsize = sizeof(*d-&gt;mbm_local);</div><div class='del'>-		d-&gt;mbm_local = kcalloc(idx_limit, tsize, GFP_KERNEL);</div><div class='del'>-		if (!d-&gt;mbm_local) {</div><div class='del'>-			bitmap_free(d-&gt;rmid_busy_llc);</div><div class='del'>-			kfree(d-&gt;mbm_total);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int resctrl_online_ctrl_domain(struct rdt_resource *r, struct rdt_ctrl_domain *d)</div><div class='del'>-{</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	if (supports_mba_mbps() &amp;&amp; r-&gt;rid == RDT_RESOURCE_MBA) {</div><div class='del'>-		/* RDT_RESOURCE_MBA is never mon_capable */</div><div class='del'>-		err = mba_sc_domain_allocate(r, d);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int resctrl_online_mon_domain(struct rdt_resource *r, struct rdt_mon_domain *d)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	err = domain_setup_mon_state(r, d);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	if (resctrl_is_mbm_enabled()) {</div><div class='del'>-		INIT_DELAYED_WORK(&amp;d-&gt;mbm_over, mbm_handle_overflow);</div><div class='del'>-		mbm_setup_overflow_handler(d, MBM_OVERFLOW_INTERVAL,</div><div class='del'>-					   RESCTRL_PICK_ANY_CPU);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (resctrl_arch_is_llc_occupancy_enabled())</div><div class='del'>-		INIT_DELAYED_WORK(&amp;d-&gt;cqm_limbo, cqm_handle_limbo);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the filesystem is not mounted then only the default resource group</div><div class='del'>-	 * exists. Creation of its directories is deferred until mount time</div><div class='del'>-	 * by rdt_get_tree() calling mkdir_mondata_all().</div><div class='del'>-	 * If resctrl is mounted, add per domain monitor data directories.</div><div class='del'>-	 */</div><div class='del'>-	if (resctrl_mounted &amp;&amp; resctrl_arch_mon_capable())</div><div class='del'>-		mkdir_mondata_subdir_allrdtgrp(r, d);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void resctrl_online_cpu(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-	/* The CPU is set in default rdtgroup after online. */</div><div class='del'>-	cpumask_set_cpu(cpu, &amp;rdtgroup_default.cpu_mask);</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void clear_childcpus(struct rdtgroup *r, unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	struct rdtgroup *cr;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(cr, &amp;r-&gt;mon.crdtgrp_list, mon.crdtgrp_list) {</div><div class='del'>-		if (cpumask_test_and_clear_cpu(cpu, &amp;cr-&gt;cpu_mask))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct rdt_mon_domain *get_mon_domain_from_cpu(int cpu,</div><div class='del'>-						      struct rdt_resource *r)</div><div class='del'>-{</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_cpus_held();</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(d, &amp;r-&gt;mon_domains, hdr.list) {</div><div class='del'>-		/* Find the domain that contains this CPU */</div><div class='del'>-		if (cpumask_test_cpu(cpu, &amp;d-&gt;hdr.cpu_mask))</div><div class='del'>-			return d;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void resctrl_offline_cpu(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	struct rdt_resource *l3 = resctrl_arch_get_resource(RDT_RESOURCE_L3);</div><div class='del'>-	struct rdt_mon_domain *d;</div><div class='del'>-	struct rdtgroup *rdtgrp;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;rdtgroup_mutex);</div><div class='del'>-	list_for_each_entry(rdtgrp, &amp;rdt_all_groups, rdtgroup_list) {</div><div class='del'>-		if (cpumask_test_and_clear_cpu(cpu, &amp;rdtgrp-&gt;cpu_mask)) {</div><div class='del'>-			clear_childcpus(rdtgrp, cpu);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!l3-&gt;mon_capable)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	d = get_mon_domain_from_cpu(cpu, l3);</div><div class='del'>-	if (d) {</div><div class='del'>-		if (resctrl_is_mbm_enabled() &amp;&amp; cpu == d-&gt;mbm_work_cpu) {</div><div class='del'>-			cancel_delayed_work(&amp;d-&gt;mbm_over);</div><div class='del'>-			mbm_setup_overflow_handler(d, 0, cpu);</div><div class='del'>-		}</div><div class='del'>-		if (resctrl_arch_is_llc_occupancy_enabled() &amp;&amp;</div><div class='del'>-		    cpu == d-&gt;cqm_work_cpu &amp;&amp; has_busy_rmid(d)) {</div><div class='del'>-			cancel_delayed_work(&amp;d-&gt;cqm_limbo);</div><div class='del'>-			cqm_setup_limbo_handler(d, 0, cpu);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;rdtgroup_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * resctrl_init - resctrl filesystem initialization</div><div class='del'>- *</div><div class='del'>- * Setup resctrl file system including set up root, create mount point,</div><div class='del'>- * register resctrl filesystem, and initialize files under root directory.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success or -errno</div><div class='del'>- */</div><div class='del'>-int __init resctrl_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	seq_buf_init(&amp;last_cmd_status, last_cmd_status_buf,</div><div class='del'>-		     sizeof(last_cmd_status_buf));</div><div class='del'>-</div><div class='del'>-	rdtgroup_setup_default();</div><div class='del'>-</div><div class='del'>-	thread_throttle_mode_init();</div><div class='del'>-</div><div class='del'>-	ret = resctrl_mon_resource_init();</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = sysfs_create_mount_point(fs_kobj, "resctrl");</div><div class='del'>-	if (ret) {</div><div class='del'>-		resctrl_mon_resource_exit();</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = register_filesystem(&amp;rdt_fs_type);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto cleanup_mountpoint;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Adding the resctrl debugfs directory here may not be ideal since</div><div class='del'>-	 * it would let the resctrl debugfs directory appear on the debugfs</div><div class='del'>-	 * filesystem before the resctrl filesystem is mounted.</div><div class='del'>-	 * It may also be ok since that would enable debugging of RDT before</div><div class='del'>-	 * resctrl is mounted.</div><div class='del'>-	 * The reason why the debugfs directory is created here and not in</div><div class='del'>-	 * rdt_get_tree() is because rdt_get_tree() takes rdtgroup_mutex and</div><div class='del'>-	 * during the debugfs directory creation also &amp;sb-&gt;s_type-&gt;i_mutex_key</div><div class='del'>-	 * (the lockdep class of inode-&gt;i_rwsem). Other filesystem</div><div class='del'>-	 * interactions (eg. SyS_getdents) have the lock ordering:</div><div class='del'>-	 * &amp;sb-&gt;s_type-&gt;i_mutex_key --&gt; &amp;mm-&gt;mmap_lock</div><div class='del'>-	 * During mmap(), called with &amp;mm-&gt;mmap_lock, the rdtgroup_mutex</div><div class='del'>-	 * is taken, thus creating dependency:</div><div class='del'>-	 * &amp;mm-&gt;mmap_lock --&gt; rdtgroup_mutex for the latter that can cause</div><div class='del'>-	 * issues considering the other two lock dependencies.</div><div class='del'>-	 * By creating the debugfs directory here we avoid a dependency</div><div class='del'>-	 * that may cause deadlock (even though file operations cannot</div><div class='del'>-	 * occur until the filesystem is mounted, but I do not know how to</div><div class='del'>-	 * tell lockdep that).</div><div class='del'>-	 */</div><div class='del'>-	debugfs_resctrl = debugfs_create_dir("resctrl", NULL);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-cleanup_mountpoint:</div><div class='del'>-	sysfs_remove_mount_point(fs_kobj, "resctrl");</div><div class='del'>-	resctrl_mon_resource_exit();</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit resctrl_exit(void)</div><div class='del'>-{</div><div class='del'>-	debugfs_remove_recursive(debugfs_resctrl);</div><div class='del'>-	unregister_filesystem(&amp;rdt_fs_type);</div><div class='del'>-	sysfs_remove_mount_point(fs_kobj, "resctrl");</div><div class='del'>-</div><div class='del'>-	resctrl_mon_resource_exit();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c<br/>index 16f3ca30626a..dbf6d71bdf18 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/scattered.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/scattered.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/scattered.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/scattered.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@ static const struct cpuid_bit cpuid_bits[] = {</div><div class='ctx'> 	{ X86_FEATURE_APERFMPERF,		CPUID_ECX,  0, 0x00000006, 0 },</div><div class='ctx'> 	{ X86_FEATURE_EPB,			CPUID_ECX,  3, 0x00000006, 0 },</div><div class='ctx'> 	{ X86_FEATURE_INTEL_PPIN,		CPUID_EBX,  0, 0x00000007, 1 },</div><div class='add'>+	{ X86_FEATURE_APX,			CPUID_EDX, 21, 0x00000007, 1 },</div><div class='ctx'> 	{ X86_FEATURE_RRSBA_CTRL,		CPUID_EDX,  2, 0x00000007, 2 },</div><div class='ctx'> 	{ X86_FEATURE_BHI_CTRL,			CPUID_EDX,  4, 0x00000007, 2 },</div><div class='ctx'> 	{ X86_FEATURE_CQM_LLC,			CPUID_EDX,  1, 0x0000000f, 0 },</div><div class='hunk'>@@ -53,7 +54,7 @@ static const struct cpuid_bit cpuid_bits[] = {</div><div class='ctx'> 	{ X86_FEATURE_PERFMON_V2,		CPUID_EAX,  0, 0x80000022, 0 },</div><div class='ctx'> 	{ X86_FEATURE_AMD_LBR_V2,		CPUID_EAX,  1, 0x80000022, 0 },</div><div class='ctx'> 	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },</div><div class='del'>-	{ X86_FEATURE_AMD_HETEROGENEOUS_CORES,	CPUID_EAX, 30, 0x80000026, 0 },</div><div class='add'>+	{ X86_FEATURE_AMD_HTR_CORES,		CPUID_EAX, 30, 0x80000026, 0 },</div><div class='ctx'> 	{ 0, 0, 0, 0, 0 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/sgx/driver.h b/arch/x86/kernel/cpu/sgx/driver.h<br/>index 4eddb4d571ef..30f39f92c98f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/sgx/driver.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/sgx/driver.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/sgx/driver.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/sgx/driver.h</a></div><div class='hunk'>@@ -2,7 +2,6 @@</div><div class='ctx'> #ifndef __ARCH_SGX_DRIVER_H__</div><div class='ctx'> #define __ARCH_SGX_DRIVER_H__</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/hash.h&gt;</div><div class='ctx'> #include &lt;linux/kref.h&gt;</div><div class='ctx'> #include &lt;linux/mmu_notifier.h&gt;</div><div class='ctx'> #include &lt;linux/radix-tree.h&gt;</div><div class='head'>diff --git a/arch/x86/kernel/cpu/sgx/ioctl.c b/arch/x86/kernel/cpu/sgx/ioctl.c<br/>index 776a20172867..66f1efa16fbb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/sgx/ioctl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/sgx/ioctl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/sgx/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/sgx/ioctl.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/mman.h&gt;</div><div class='ctx'> #include &lt;asm/sgx.h&gt;</div><div class='add'>+#include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;linux/mman.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/file.h&gt;</div><div class='hunk'>@@ -463,31 +464,6 @@ static long sgx_ioc_enclave_add_pages(struct sgx_encl *encl, void __user *arg)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __sgx_get_key_hash(struct crypto_shash *tfm, const void *modulus,</div><div class='del'>-			      void *hash)</div><div class='del'>-{</div><div class='del'>-	SHASH_DESC_ON_STACK(shash, tfm);</div><div class='del'>-</div><div class='del'>-	shash-&gt;tfm = tfm;</div><div class='del'>-</div><div class='del'>-	return crypto_shash_digest(shash, modulus, SGX_MODULUS_SIZE, hash);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sgx_get_key_hash(const void *modulus, void *hash)</div><div class='del'>-{</div><div class='del'>-	struct crypto_shash *tfm;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	tfm = crypto_alloc_shash("sha256", 0, CRYPTO_ALG_ASYNC);</div><div class='del'>-	if (IS_ERR(tfm))</div><div class='del'>-		return PTR_ERR(tfm);</div><div class='del'>-</div><div class='del'>-	ret = __sgx_get_key_hash(tfm, modulus, hash);</div><div class='del'>-</div><div class='del'>-	crypto_free_shash(tfm);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sgx_encl_init(struct sgx_encl *encl, struct sgx_sigstruct *sigstruct,</div><div class='ctx'> 			 void *token)</div><div class='ctx'> {</div><div class='hunk'>@@ -523,9 +499,7 @@ static int sgx_encl_init(struct sgx_encl *encl, struct sgx_sigstruct *sigstruct,</div><div class='ctx'> 	    sgx_xfrm_reserved_mask)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = sgx_get_key_hash(sigstruct-&gt;modulus, mrsigner);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	sha256(sigstruct-&gt;modulus, SGX_MODULUS_SIZE, (u8 *)mrsigner);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;encl-&gt;lock);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c<br/>index 8ce352fc72ac..2de01b379aa3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/sgx/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/sgx/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/sgx/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/sgx/main.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/sgx.h&gt;</div><div class='ctx'> #include "driver.h"</div><div class='ctx'> #include "encl.h"</div><div class='hunk'>@@ -719,6 +720,8 @@ int arch_memory_failure(unsigned long pfn, int flags)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	sgx_unmark_page_reclaimable(page);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * TBD: Add additional plumbing to enable pre-emptive</div><div class='ctx'> 	 * action for asynchronous poison notification. Until</div><div class='hunk'>@@ -871,7 +874,7 @@ void sgx_update_lepubkeyhash(u64 *lepubkeyhash)</div><div class='ctx'> 	WARN_ON_ONCE(preemptible());</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 4; i++)</div><div class='del'>-		wrmsrl(MSR_IA32_SGXLEPUBKEYHASH0 + i, lepubkeyhash[i]);</div><div class='add'>+		wrmsrq(MSR_IA32_SGXLEPUBKEYHASH0 + i, lepubkeyhash[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct file_operations sgx_provision_fops = {</div><div class='head'>diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c<br/>index 01456236a6dd..e35ccdc84910 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/topology.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;asm/hypervisor.h&gt;</div><div class='ctx'> #include &lt;asm/io_apic.h&gt;</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='hunk'>@@ -154,7 +155,7 @@ static __init bool check_for_real_bsp(u32 apic_id)</div><div class='ctx'> 	 * kernel must rely on the firmware enumeration order.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (has_apic_base) {</div><div class='del'>-		rdmsrl(MSR_IA32_APICBASE, msr);</div><div class='add'>+		rdmsrq(MSR_IA32_APICBASE, msr);</div><div class='ctx'> 		is_bsp = !!(msr &amp; MSR_IA32_APICBASE_BSP);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topology_amd.c<br/>index 03b3c9c3a45e..843b1655ab45 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology_amd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/topology_amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/topology_amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/topology_amd.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/memtype.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='hunk'>@@ -133,7 +134,7 @@ static void parse_fam10h_node_id(struct topo_scan *tscan)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_NODEID_MSR))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_FAM10H_NODE_ID, nid.msr);</div><div class='add'>+	rdmsrq(MSR_FAM10H_NODE_ID, nid.msr);</div><div class='ctx'> 	store_node(tscan, nid.nodes_per_pkg + 1, nid.node_id);</div><div class='ctx'> 	tscan-&gt;c-&gt;topo.llc_id = nid.node_id;</div><div class='ctx'> }</div><div class='hunk'>@@ -160,7 +161,7 @@ static void topoext_fixup(struct topo_scan *tscan)</div><div class='ctx'> 	if (msr_set_bit(0xc0011005, 54) &lt;= 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(0xc0011005, msrval);</div><div class='add'>+	rdmsrq(0xc0011005, msrval);</div><div class='ctx'> 	if (msrval &amp; BIT_64(54)) {</div><div class='ctx'> 		set_cpu_cap(c, X86_FEATURE_TOPOEXT);</div><div class='ctx'> 		pr_info_once(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");</div><div class='hunk'>@@ -182,7 +183,7 @@ static void parse_topology_amd(struct topo_scan *tscan)</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_TOPOEXT))</div><div class='ctx'> 		has_topoext = cpu_parse_topology_ext(tscan);</div><div class='ctx'> </div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES))</div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_AMD_HTR_CORES))</div><div class='ctx'> 		tscan-&gt;c-&gt;topo.cpu_type = cpuid_ebx(0x80000026);</div><div class='ctx'> </div><div class='ctx'> 	if (!has_topoext &amp;&amp; !parse_8000_0008(tscan))</div><div class='head'>diff --git a/arch/x86/kernel/cpu/tsx.c b/arch/x86/kernel/cpu/tsx.c<br/>index b31ee4f1657a..49782724a943 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/tsx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/tsx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/tsx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/tsx.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cmdline.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +25,7 @@ static void tsx_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 tsx;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_TSX_CTRL, tsx);</div><div class='add'>+	rdmsrq(MSR_IA32_TSX_CTRL, tsx);</div><div class='ctx'> </div><div class='ctx'> 	/* Force all transactions to immediately abort */</div><div class='ctx'> 	tsx |= TSX_CTRL_RTM_DISABLE;</div><div class='hunk'>@@ -37,14 +38,14 @@ static void tsx_disable(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	tsx |= TSX_CTRL_CPUID_CLEAR;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_TSX_CTRL, tsx);</div><div class='add'>+	wrmsrq(MSR_IA32_TSX_CTRL, tsx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tsx_enable(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 tsx;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_TSX_CTRL, tsx);</div><div class='add'>+	rdmsrq(MSR_IA32_TSX_CTRL, tsx);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the RTM feature in the cpu */</div><div class='ctx'> 	tsx &amp;= ~TSX_CTRL_RTM_DISABLE;</div><div class='hunk'>@@ -56,7 +57,7 @@ static void tsx_enable(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	tsx &amp;= ~TSX_CTRL_CPUID_CLEAR;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_TSX_CTRL, tsx);</div><div class='add'>+	wrmsrq(MSR_IA32_TSX_CTRL, tsx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum tsx_ctrl_states x86_get_tsx_auto_mode(void)</div><div class='hunk'>@@ -115,13 +116,13 @@ static void tsx_clear_cpuid(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT) &amp;&amp;</div><div class='ctx'> 	    boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {</div><div class='del'>-		rdmsrl(MSR_TSX_FORCE_ABORT, msr);</div><div class='add'>+		rdmsrq(MSR_TSX_FORCE_ABORT, msr);</div><div class='ctx'> 		msr |= MSR_TFA_TSX_CPUID_CLEAR;</div><div class='del'>-		wrmsrl(MSR_TSX_FORCE_ABORT, msr);</div><div class='add'>+		wrmsrq(MSR_TSX_FORCE_ABORT, msr);</div><div class='ctx'> 	} else if (cpu_feature_enabled(X86_FEATURE_MSR_TSX_CTRL)) {</div><div class='del'>-		rdmsrl(MSR_IA32_TSX_CTRL, msr);</div><div class='add'>+		rdmsrq(MSR_IA32_TSX_CTRL, msr);</div><div class='ctx'> 		msr |= TSX_CTRL_CPUID_CLEAR;</div><div class='del'>-		wrmsrl(MSR_IA32_TSX_CTRL, msr);</div><div class='add'>+		wrmsrq(MSR_IA32_TSX_CTRL, msr);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -146,11 +147,11 @@ static void tsx_dev_mode_disable(void)</div><div class='ctx'> 	    !cpu_feature_enabled(X86_FEATURE_SRBDS_CTRL))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl);</div><div class='add'>+	rdmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	if (mcu_opt_ctrl &amp; RTM_ALLOW) {</div><div class='ctx'> 		mcu_opt_ctrl &amp;= ~RTM_ALLOW;</div><div class='del'>-		wrmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl);</div><div class='add'>+		wrmsrq(MSR_IA32_MCU_OPT_CTRL, mcu_opt_ctrl);</div><div class='ctx'> 		setup_force_cpu_cap(X86_FEATURE_RTM_ALWAYS_ABORT);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/cpu/umwait.c b/arch/x86/kernel/cpu/umwait.c<br/>index 2293efd6ffa6..933fcd7ff250 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/umwait.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/umwait.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/umwait.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/umwait.c</a></div><div class='hunk'>@@ -33,7 +33,7 @@ static DEFINE_MUTEX(umwait_lock);</div><div class='ctx'> static void umwait_update_control_msr(void * unused)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_irqs_disabled();</div><div class='del'>-	wrmsr(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached), 0);</div><div class='add'>+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -71,7 +71,7 @@ static int umwait_cpu_offline(unsigned int cpu)</div><div class='ctx'> 	 * the original control MSR value in umwait_init(). So there</div><div class='ctx'> 	 * is no race condition here.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsr(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -214,7 +214,7 @@ static int __init umwait_init(void)</div><div class='ctx'> 	 * changed. This is the only place where orig_umwait_control_cached</div><div class='ctx'> 	 * is modified.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);</div><div class='add'>+	rdmsrq(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);</div><div class='ctx'> </div><div class='ctx'> 	ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "umwait:online",</div><div class='ctx'> 				umwait_cpu_online, umwait_cpu_offline);</div><div class='head'>diff --git a/arch/x86/kernel/cpu/zhaoxin.c b/arch/x86/kernel/cpu/zhaoxin.c<br/>index 90eba7eb5335..89b1c8a70fe8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/zhaoxin.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/cpu/zhaoxin.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/cpu/zhaoxin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/cpu/zhaoxin.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpu.h"</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c<br/>index c6fefd4585f8..71ee20102a8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/dumpstack.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/dumpstack.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/dumpstack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/dumpstack.c</a></div><div class='hunk'>@@ -23,8 +23,6 @@</div><div class='ctx'> #include &lt;asm/stacktrace.h&gt;</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> </div><div class='del'>-int panic_on_unrecovered_nmi;</div><div class='del'>-int panic_on_io_nmi;</div><div class='ctx'> static int die_counter;</div><div class='ctx'> </div><div class='ctx'> static struct pt_regs exec_summary_regs;</div><div class='head'>diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c<br/>index 57120f0749cc..9920122018a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/e820.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/e820.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/e820.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/e820.c</a></div><div class='hunk'>@@ -753,22 +753,21 @@ void __init e820__memory_setup_extended(u64 phys_addr, u32 data_len)</div><div class='ctx'> void __init e820__register_nosave_regions(unsigned long limit_pfn)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	unsigned long pfn = 0;</div><div class='add'>+	u64 last_addr = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; e820_table-&gt;nr_entries; i++) {</div><div class='ctx'> 		struct e820_entry *entry = &amp;e820_table-&gt;entries[i];</div><div class='ctx'> </div><div class='del'>-		if (pfn &lt; PFN_UP(entry-&gt;addr))</div><div class='del'>-			register_nosave_region(pfn, PFN_UP(entry-&gt;addr));</div><div class='del'>-</div><div class='del'>-		pfn = PFN_DOWN(entry-&gt;addr + entry-&gt;size);</div><div class='del'>-</div><div class='ctx'> 		if (entry-&gt;type != E820_TYPE_RAM)</div><div class='del'>-			register_nosave_region(PFN_UP(entry-&gt;addr), pfn);</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		if (pfn &gt;= limit_pfn)</div><div class='del'>-			break;</div><div class='add'>+		if (last_addr &lt; entry-&gt;addr)</div><div class='add'>+			register_nosave_region(PFN_DOWN(last_addr), PFN_UP(entry-&gt;addr));</div><div class='add'>+</div><div class='add'>+		last_addr = entry-&gt;addr + entry-&gt;size;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	register_nosave_region(PFN_DOWN(last_addr), limit_pfn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='hunk'>@@ -1300,6 +1299,14 @@ void __init e820__memblock_setup(void)</div><div class='ctx'> 		memblock_add(entry-&gt;addr, entry-&gt;size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * 32-bit systems are limited to 4BG of memory even with HIGHMEM and</div><div class='add'>+	 * to even less without it.</div><div class='add'>+	 * Discard memory after max_pfn - the actual limit detected at runtime.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ENABLED(CONFIG_X86_32))</div><div class='add'>+		memblock_remove(PFN_PHYS(max_pfn), -1);</div><div class='add'>+</div><div class='ctx'> 	/* Throw away partial pages: */</div><div class='ctx'> 	memblock_trim_memory(PAGE_SIZE);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c<br/>index 611f27e3890c..cba75306e5b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/early_printk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/early_printk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/early_printk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/early_printk.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/console.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/kexec.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/screen_info.h&gt;</div><div class='hunk'>@@ -144,6 +145,11 @@ static __init void early_serial_hw_init(unsigned divisor)</div><div class='ctx'> 	static_call(serial_out)(early_serial_base, DLL, divisor &amp; 0xff);</div><div class='ctx'> 	static_call(serial_out)(early_serial_base, DLH, (divisor &gt;&gt; 8) &amp; 0xff);</div><div class='ctx'> 	static_call(serial_out)(early_serial_base, LCR, c &amp; ~DLAB);</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_KEXEC_CORE) &amp;&amp; defined(CONFIG_X86_64)</div><div class='add'>+	if (static_call_query(serial_in) == io_serial_in)</div><div class='add'>+		kexec_debug_8250_port = early_serial_base;</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define DEFAULT_BAUD 9600</div><div class='hunk'>@@ -327,6 +333,9 @@ static __init void early_pci_serial_init(char *s)</div><div class='ctx'> 		/* WARNING! assuming the address is always in the first 4G */</div><div class='ctx'> 		early_serial_base =</div><div class='ctx'> 			(unsigned long)early_ioremap(bar0 &amp; PCI_BASE_ADDRESS_MEM_MASK, 0x10);</div><div class='add'>+#if defined(CONFIG_KEXEC_CORE) &amp;&amp; defined(CONFIG_X86_64)</div><div class='add'>+		kexec_debug_8250_mmio32 = bar0 &amp; PCI_BASE_ADDRESS_MEM_MASK;</div><div class='add'>+#endif</div><div class='ctx'> 		write_pci_config(bus, slot, func, PCI_COMMAND,</div><div class='ctx'> 				 cmdreg|PCI_COMMAND_MEMORY);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -389,10 +398,10 @@ static int __init setup_early_printk(char *buf)</div><div class='ctx'> 	keep = (strstr(buf, "keep") != NULL);</div><div class='ctx'> </div><div class='ctx'> 	while (*buf != '\0') {</div><div class='del'>-		if (!strncmp(buf, "mmio", 4)) {</div><div class='del'>-			early_mmio_serial_init(buf + 4);</div><div class='add'>+		if (!strncmp(buf, "mmio32", 6)) {</div><div class='add'>+			buf += 6;</div><div class='add'>+			early_mmio_serial_init(buf);</div><div class='ctx'> 			early_console_register(&amp;early_serial_console, keep);</div><div class='del'>-			buf += 4;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!strncmp(buf, "serial", 6)) {</div><div class='ctx'> 			buf += 6;</div><div class='hunk'>@@ -407,9 +416,9 @@ static int __init setup_early_printk(char *buf)</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> 		if (!strncmp(buf, "pciserial", 9)) {</div><div class='del'>-			early_pci_serial_init(buf + 9);</div><div class='add'>+			buf += 9; /* Keep from match the above "pciserial" */</div><div class='add'>+			early_pci_serial_init(buf);</div><div class='ctx'> 			early_console_register(&amp;early_serial_console, keep);</div><div class='del'>-			buf += 9; /* Keep from match the above "serial" */</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='ctx'> 		if (!strncmp(buf, "vga", 3) &amp;&amp;</div><div class='head'>diff --git a/arch/x86/kernel/fpu/context.h b/arch/x86/kernel/fpu/context.h<br/>index f6d856bd50bc..10d0a720659c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/context.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/context.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/context.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fpu/context.h</a></div><div class='hunk'>@@ -53,7 +53,7 @@ static inline void fpregs_activate(struct fpu *fpu)</div><div class='ctx'> /* Internal helper for switch_fpu_return() and signal frame setup */</div><div class='ctx'> static inline void fpregs_restore_userregs(void)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON_ONCE(current-&gt;flags &amp; (PF_KTHREAD | PF_USER_WORKER)))</div><div class='hunk'>@@ -67,7 +67,7 @@ static inline void fpregs_restore_userregs(void)</div><div class='ctx'> 		 * If PKRU is enabled, then the PKRU value is already</div><div class='ctx'> 		 * correct because it was either set in switch_to() or in</div><div class='ctx'> 		 * flush_thread(). So it is excluded because it might be</div><div class='del'>-		 * not up to date in current-&gt;thread.fpu.xsave state.</div><div class='add'>+		 * not up to date in current-&gt;thread.fpu-&gt;xsave state.</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * XFD state is handled in restore_fpregs_from_fpstate().</div><div class='ctx'> 		 */</div><div class='head'>diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c<br/>index 91d6341f281f..ea138583dd92 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fpu/core.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;asm/fpu/sched.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/signal.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/types.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/irq_regs.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -43,14 +44,27 @@ struct fpu_state_config fpu_user_cfg __ro_after_init;</div><div class='ctx'>  */</div><div class='ctx'> struct fpstate init_fpstate __ro_after_init;</div><div class='ctx'> </div><div class='del'>-/* Track in-kernel FPU usage */</div><div class='del'>-static DEFINE_PER_CPU(bool, in_kernel_fpu);</div><div class='add'>+/*</div><div class='add'>+ * Track FPU initialization and kernel-mode usage. 'true' means the FPU is</div><div class='add'>+ * initialized and is not currently being used by the kernel:</div><div class='add'>+ */</div><div class='add'>+DEFINE_PER_CPU(bool, kernel_fpu_allowed);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Track which context is using the FPU on the CPU:</div><div class='ctx'>  */</div><div class='ctx'> DEFINE_PER_CPU(struct fpu *, fpu_fpregs_owner_ctx);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86_DEBUG_FPU</div><div class='add'>+struct fpu *x86_task_fpu(struct task_struct *task)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON_ONCE(task-&gt;flags &amp; PF_KTHREAD))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return (void *)task + sizeof(*task);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Can we use the FPU in kernel mode with the</div><div class='ctx'>  * whole "kernel_fpu_begin/end()" sequence?</div><div class='hunk'>@@ -61,15 +75,18 @@ bool irq_fpu_usable(void)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * In kernel FPU usage already active?  This detects any explicitly</div><div class='del'>-	 * nested usage in task or softirq context, which is unsupported.  It</div><div class='del'>-	 * also detects attempted usage in a hardirq that has interrupted a</div><div class='del'>-	 * kernel-mode FPU section.</div><div class='add'>+	 * Return false in the following cases:</div><div class='add'>+	 *</div><div class='add'>+	 * - FPU is not yet initialized. This can happen only when the call is</div><div class='add'>+	 *   coming from CPU onlining, for example for microcode checksumming.</div><div class='add'>+	 * - The kernel is already using the FPU, either because of explicit</div><div class='add'>+	 *   nesting (which should never be done), or because of implicit</div><div class='add'>+	 *   nesting when a hardirq interrupted a kernel-mode FPU section.</div><div class='add'>+	 *</div><div class='add'>+	 * The single boolean check below handles both cases:</div><div class='ctx'> 	 */</div><div class='del'>-	if (this_cpu_read(in_kernel_fpu)) {</div><div class='del'>-		WARN_ON_FPU(!in_hardirq());</div><div class='add'>+	if (!this_cpu_read(kernel_fpu_allowed))</div><div class='ctx'> 		return false;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When not in NMI or hard interrupt context, FPU can be used in:</div><div class='hunk'>@@ -202,7 +219,7 @@ void fpu_reset_from_exception_fixup(void)</div><div class='ctx'> #if IS_ENABLED(CONFIG_KVM)</div><div class='ctx'> static void __fpstate_reset(struct fpstate *fpstate, u64 xfd);</div><div class='ctx'> </div><div class='del'>-static void fpu_init_guest_permissions(struct fpu_guest *gfpu)</div><div class='add'>+static void fpu_lock_guest_permissions(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct fpu_state_perm *fpuperm;</div><div class='ctx'> 	u64 perm;</div><div class='hunk'>@@ -211,15 +228,13 @@ static void fpu_init_guest_permissions(struct fpu_guest *gfpu)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-	fpuperm = &amp;current-&gt;group_leader-&gt;thread.fpu.guest_perm;</div><div class='add'>+	fpuperm = &amp;x86_task_fpu(current-&gt;group_leader)-&gt;guest_perm;</div><div class='ctx'> 	perm = fpuperm-&gt;__state_perm;</div><div class='ctx'> </div><div class='ctx'> 	/* First fpstate allocation locks down permissions. */</div><div class='ctx'> 	WRITE_ONCE(fpuperm-&gt;__state_perm, perm | FPU_GUEST_PERM_LOCKED);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='del'>-</div><div class='del'>-	gfpu-&gt;perm = perm &amp; ~FPU_GUEST_PERM_LOCKED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool fpu_alloc_guest_fpstate(struct fpu_guest *gfpu)</div><div class='hunk'>@@ -240,7 +255,6 @@ bool fpu_alloc_guest_fpstate(struct fpu_guest *gfpu)</div><div class='ctx'> </div><div class='ctx'> 	gfpu-&gt;fpstate		= fpstate;</div><div class='ctx'> 	gfpu-&gt;xfeatures		= fpu_kernel_cfg.default_features;</div><div class='del'>-	gfpu-&gt;perm		= fpu_kernel_cfg.default_features;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * KVM sets the FP+SSE bits in the XSAVE header when copying FPU state</div><div class='hunk'>@@ -255,7 +269,7 @@ bool fpu_alloc_guest_fpstate(struct fpu_guest *gfpu)</div><div class='ctx'> 	if (WARN_ON_ONCE(fpu_user_cfg.default_size &gt; gfpu-&gt;uabi_size))</div><div class='ctx'> 		gfpu-&gt;uabi_size = fpu_user_cfg.default_size;</div><div class='ctx'> </div><div class='del'>-	fpu_init_guest_permissions(gfpu);</div><div class='add'>+	fpu_lock_guest_permissions();</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -263,16 +277,16 @@ EXPORT_SYMBOL_GPL(fpu_alloc_guest_fpstate);</div><div class='ctx'> </div><div class='ctx'> void fpu_free_guest_fpstate(struct fpu_guest *gfpu)</div><div class='ctx'> {</div><div class='del'>-	struct fpstate *fps = gfpu-&gt;fpstate;</div><div class='add'>+	struct fpstate *fpstate = gfpu-&gt;fpstate;</div><div class='ctx'> </div><div class='del'>-	if (!fps)</div><div class='add'>+	if (!fpstate)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(!fps-&gt;is_valloc || !fps-&gt;is_guest || fps-&gt;in_use))</div><div class='add'>+	if (WARN_ON_ONCE(!fpstate-&gt;is_valloc || !fpstate-&gt;is_guest || fpstate-&gt;in_use))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	gfpu-&gt;fpstate = NULL;</div><div class='del'>-	vfree(fps);</div><div class='add'>+	vfree(fpstate);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(fpu_free_guest_fpstate);</div><div class='ctx'> </div><div class='hunk'>@@ -323,12 +337,12 @@ EXPORT_SYMBOL_GPL(fpu_update_guest_xfd);</div><div class='ctx'>  */</div><div class='ctx'> void fpu_sync_guest_vmexit_xfd_state(void)</div><div class='ctx'> {</div><div class='del'>-	struct fpstate *fps = current-&gt;thread.fpu.fpstate;</div><div class='add'>+	struct fpstate *fpstate = x86_task_fpu(current)-&gt;fpstate;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_irqs_disabled();</div><div class='ctx'> 	if (fpu_state_size_dynamic()) {</div><div class='del'>-		rdmsrl(MSR_IA32_XFD, fps-&gt;xfd);</div><div class='del'>-		__this_cpu_write(xfd_state, fps-&gt;xfd);</div><div class='add'>+		rdmsrq(MSR_IA32_XFD, fpstate-&gt;xfd);</div><div class='add'>+		__this_cpu_write(xfd_state, fpstate-&gt;xfd);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(fpu_sync_guest_vmexit_xfd_state);</div><div class='hunk'>@@ -337,7 +351,7 @@ EXPORT_SYMBOL_GPL(fpu_sync_guest_vmexit_xfd_state);</div><div class='ctx'> int fpu_swap_kvm_fpstate(struct fpu_guest *guest_fpu, bool enter_guest)</div><div class='ctx'> {</div><div class='ctx'> 	struct fpstate *guest_fps = guest_fpu-&gt;fpstate;</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> 	struct fpstate *cur_fps = fpu-&gt;fpstate;</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock();</div><div class='hunk'>@@ -431,14 +445,15 @@ void kernel_fpu_begin_mask(unsigned int kfpu_mask)</div><div class='ctx'> 		fpregs_lock();</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON_FPU(!irq_fpu_usable());</div><div class='del'>-	WARN_ON_FPU(this_cpu_read(in_kernel_fpu));</div><div class='ctx'> </div><div class='del'>-	this_cpu_write(in_kernel_fpu, true);</div><div class='add'>+	/* Toggle kernel_fpu_allowed to false: */</div><div class='add'>+	WARN_ON_FPU(!this_cpu_read(kernel_fpu_allowed));</div><div class='add'>+	this_cpu_write(kernel_fpu_allowed, false);</div><div class='ctx'> </div><div class='ctx'> 	if (!(current-&gt;flags &amp; (PF_KTHREAD | PF_USER_WORKER)) &amp;&amp;</div><div class='ctx'> 	    !test_thread_flag(TIF_NEED_FPU_LOAD)) {</div><div class='ctx'> 		set_thread_flag(TIF_NEED_FPU_LOAD);</div><div class='del'>-		save_fpregs_to_fpstate(&amp;current-&gt;thread.fpu);</div><div class='add'>+		save_fpregs_to_fpstate(x86_task_fpu(current));</div><div class='ctx'> 	}</div><div class='ctx'> 	__cpu_invalidate_fpregs_state();</div><div class='ctx'> </div><div class='hunk'>@@ -453,9 +468,10 @@ EXPORT_SYMBOL_GPL(kernel_fpu_begin_mask);</div><div class='ctx'> </div><div class='ctx'> void kernel_fpu_end(void)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON_FPU(!this_cpu_read(in_kernel_fpu));</div><div class='add'>+	/* Toggle kernel_fpu_allowed back to true: */</div><div class='add'>+	WARN_ON_FPU(this_cpu_read(kernel_fpu_allowed));</div><div class='add'>+	this_cpu_write(kernel_fpu_allowed, true);</div><div class='ctx'> </div><div class='del'>-	this_cpu_write(in_kernel_fpu, false);</div><div class='ctx'> 	if (!irqs_disabled())</div><div class='ctx'> 		fpregs_unlock();</div><div class='ctx'> }</div><div class='hunk'>@@ -467,7 +483,7 @@ EXPORT_SYMBOL_GPL(kernel_fpu_end);</div><div class='ctx'>  */</div><div class='ctx'> void fpu_sync_fpstate(struct fpu *fpu)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON_FPU(fpu != &amp;current-&gt;thread.fpu);</div><div class='add'>+	WARN_ON_FPU(fpu != x86_task_fpu(current));</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock();</div><div class='ctx'> 	trace_x86_fpu_before_save(fpu);</div><div class='hunk'>@@ -552,7 +568,7 @@ void fpstate_reset(struct fpu *fpu)</div><div class='ctx'> static inline void fpu_inherit_perms(struct fpu *dst_fpu)</div><div class='ctx'> {</div><div class='ctx'> 	if (fpu_state_size_dynamic()) {</div><div class='del'>-		struct fpu *src_fpu = &amp;current-&gt;group_leader-&gt;thread.fpu;</div><div class='add'>+		struct fpu *src_fpu = x86_task_fpu(current-&gt;group_leader);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irq(&amp;current-&gt;sighand-&gt;siglock);</div><div class='ctx'> 		/* Fork also inherits the permissions of the parent */</div><div class='hunk'>@@ -572,7 +588,7 @@ static int update_fpu_shstk(struct task_struct *dst, unsigned long ssp)</div><div class='ctx'> 	if (!ssp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	xstate = get_xsave_addr(&amp;dst-&gt;thread.fpu.fpstate-&gt;regs.xsave,</div><div class='add'>+	xstate = get_xsave_addr(&amp;x86_task_fpu(dst)-&gt;fpstate-&gt;regs.xsave,</div><div class='ctx'> 				XFEATURE_CET_USER);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -593,8 +609,16 @@ static int update_fpu_shstk(struct task_struct *dst, unsigned long ssp)</div><div class='ctx'> int fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal,</div><div class='ctx'> 	      unsigned long ssp)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *src_fpu = &amp;current-&gt;thread.fpu;</div><div class='del'>-	struct fpu *dst_fpu = &amp;dst-&gt;thread.fpu;</div><div class='add'>+	/*</div><div class='add'>+	 * We allocate the new FPU structure right after the end of the task struct.</div><div class='add'>+	 * task allocation size already took this into account.</div><div class='add'>+	 *</div><div class='add'>+	 * This is safe because task_struct size is a multiple of cacheline size,</div><div class='add'>+	 * thus x86_task_fpu() will always be cacheline aligned as well.</div><div class='add'>+	 */</div><div class='add'>+	struct fpu *dst_fpu = (void *)dst + sizeof(*dst);</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(*dst) % SMP_CACHE_BYTES != 0);</div><div class='ctx'> </div><div class='ctx'> 	/* The new task's FPU state cannot be valid in the hardware. */</div><div class='ctx'> 	dst_fpu-&gt;last_cpu = -1;</div><div class='hunk'>@@ -657,19 +681,22 @@ int fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal,</div><div class='ctx'> 	if (update_fpu_shstk(dst, ssp))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='del'>-	trace_x86_fpu_copy_src(src_fpu);</div><div class='ctx'> 	trace_x86_fpu_copy_dst(dst_fpu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Whitelist the FPU register state embedded into task_struct for hardened</div><div class='del'>- * usercopy.</div><div class='add'>+ * While struct fpu is no longer part of struct thread_struct, it is still</div><div class='add'>+ * allocated after struct task_struct in the "task_struct" kmem cache. But</div><div class='add'>+ * since FPU is expected to be part of struct thread_struct, we have to</div><div class='add'>+ * adjust for it here.</div><div class='ctx'>  */</div><div class='ctx'> void fpu_thread_struct_whitelist(unsigned long *offset, unsigned long *size)</div><div class='ctx'> {</div><div class='del'>-	*offset = offsetof(struct thread_struct, fpu.__fpstate.regs);</div><div class='add'>+	/* The allocation follows struct task_struct. */</div><div class='add'>+	*offset = sizeof(struct task_struct) - offsetof(struct task_struct, thread);</div><div class='add'>+	*offset += offsetof(struct fpu, __fpstate.regs);</div><div class='ctx'> 	*size = fpu_kernel_cfg.default_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -682,11 +709,18 @@ void fpu_thread_struct_whitelist(unsigned long *offset, unsigned long *size)</div><div class='ctx'>  * a state-restore is coming: either an explicit one,</div><div class='ctx'>  * or a reschedule.</div><div class='ctx'>  */</div><div class='del'>-void fpu__drop(struct fpu *fpu)</div><div class='add'>+void fpu__drop(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='add'>+	struct fpu *fpu;</div><div class='add'>+</div><div class='add'>+	if (test_tsk_thread_flag(tsk, TIF_NEED_FPU_LOAD))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fpu = x86_task_fpu(tsk);</div><div class='add'>+</div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> </div><div class='del'>-	if (fpu == &amp;current-&gt;thread.fpu) {</div><div class='add'>+	if (fpu == x86_task_fpu(current)) {</div><div class='ctx'> 		/* Ignore delayed exceptions from user space */</div><div class='ctx'> 		asm volatile("1: fwait\n"</div><div class='ctx'> 			     "2:\n"</div><div class='hunk'>@@ -718,9 +752,9 @@ static inline void restore_fpregs_from_init_fpstate(u64 features_mask)</div><div class='ctx'> /*</div><div class='ctx'>  * Reset current-&gt;fpu memory state to the init values.</div><div class='ctx'>  */</div><div class='del'>-static void fpu_reset_fpregs(void)</div><div class='add'>+static void fpu_reset_fpstate_regs(void)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock();</div><div class='ctx'> 	__fpu_invalidate_fpregs_state(fpu);</div><div class='hunk'>@@ -749,11 +783,11 @@ static void fpu_reset_fpregs(void)</div><div class='ctx'>  */</div><div class='ctx'> void fpu__clear_user_states(struct fpu *fpu)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON_FPU(fpu != &amp;current-&gt;thread.fpu);</div><div class='add'>+	WARN_ON_FPU(fpu != x86_task_fpu(current));</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock();</div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_FPU)) {</div><div class='del'>-		fpu_reset_fpregs();</div><div class='add'>+		fpu_reset_fpstate_regs();</div><div class='ctx'> 		fpregs_unlock();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -782,8 +816,8 @@ void fpu__clear_user_states(struct fpu *fpu)</div><div class='ctx'> </div><div class='ctx'> void fpu_flush_thread(void)</div><div class='ctx'> {</div><div class='del'>-	fpstate_reset(&amp;current-&gt;thread.fpu);</div><div class='del'>-	fpu_reset_fpregs();</div><div class='add'>+	fpstate_reset(x86_task_fpu(current));</div><div class='add'>+	fpu_reset_fpstate_regs();</div><div class='ctx'> }</div><div class='ctx'> /*</div><div class='ctx'>  * Load FPU context before returning to userspace.</div><div class='hunk'>@@ -823,7 +857,7 @@ void fpregs_lock_and_load(void)</div><div class='ctx'>  */</div><div class='ctx'> void fpregs_assert_state_consistent(void)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> </div><div class='ctx'> 	if (test_thread_flag(TIF_NEED_FPU_LOAD))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -835,7 +869,7 @@ EXPORT_SYMBOL_GPL(fpregs_assert_state_consistent);</div><div class='ctx'> </div><div class='ctx'> void fpregs_mark_activate(void)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> </div><div class='ctx'> 	fpregs_activate(fpu);</div><div class='ctx'> 	fpu-&gt;last_cpu = smp_processor_id();</div><div class='head'>diff --git a/arch/x86/kernel/fpu/init.c b/arch/x86/kernel/fpu/init.c<br/>index 998a08f17e33..99db41bf9fa6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fpu/init.c</a></div><div class='hunk'>@@ -38,7 +38,7 @@ static void fpu__init_cpu_generic(void)</div><div class='ctx'> 	/* Flush out any pending x87 state: */</div><div class='ctx'> #ifdef CONFIG_MATH_EMULATION</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_FPU))</div><div class='del'>-		fpstate_init_soft(&amp;current-&gt;thread.fpu.fpstate-&gt;regs.soft);</div><div class='add'>+		;</div><div class='ctx'> 	else</div><div class='ctx'> #endif</div><div class='ctx'> 		asm volatile ("fninit");</div><div class='hunk'>@@ -51,6 +51,9 @@ void fpu__init_cpu(void)</div><div class='ctx'> {</div><div class='ctx'> 	fpu__init_cpu_generic();</div><div class='ctx'> 	fpu__init_cpu_xstate();</div><div class='add'>+</div><div class='add'>+	/* Start allowing kernel-mode FPU: */</div><div class='add'>+	this_cpu_write(kernel_fpu_allowed, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool __init fpu__probe_without_cpuid(void)</div><div class='hunk'>@@ -73,6 +76,8 @@ static bool __init fpu__probe_without_cpuid(void)</div><div class='ctx'> </div><div class='ctx'> static void __init fpu__init_system_early_generic(void)</div><div class='ctx'> {</div><div class='add'>+	set_thread_flag(TIF_NEED_FPU_LOAD);</div><div class='add'>+</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_CPUID) &amp;&amp;</div><div class='ctx'> 	    !test_bit(X86_FEATURE_FPU, (unsigned long *)cpu_caps_cleared)) {</div><div class='ctx'> 		if (fpu__probe_without_cpuid())</div><div class='hunk'>@@ -94,7 +99,6 @@ static void __init fpu__init_system_early_generic(void)</div><div class='ctx'>  * Boot time FPU feature detection code:</div><div class='ctx'>  */</div><div class='ctx'> unsigned int mxcsr_feature_mask __ro_after_init = 0xffffffffu;</div><div class='del'>-EXPORT_SYMBOL_GPL(mxcsr_feature_mask);</div><div class='ctx'> </div><div class='ctx'> static void __init fpu__init_system_mxcsr(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -150,11 +154,13 @@ static void __init fpu__init_task_struct_size(void)</div><div class='ctx'> {</div><div class='ctx'> 	int task_size = sizeof(struct task_struct);</div><div class='ctx'> </div><div class='add'>+	task_size += sizeof(struct fpu);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Subtract off the static size of the register state.</div><div class='ctx'> 	 * It potentially has a bunch of padding.</div><div class='ctx'> 	 */</div><div class='del'>-	task_size -= sizeof(current-&gt;thread.fpu.__fpstate.regs);</div><div class='add'>+	task_size -= sizeof(union fpregs_state);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Add back the dynamically-calculated register state</div><div class='hunk'>@@ -164,14 +170,9 @@ static void __init fpu__init_task_struct_size(void)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We dynamically size 'struct fpu', so we require that</div><div class='del'>-	 * it be at the end of 'thread_struct' and that</div><div class='del'>-	 * 'thread_struct' be at the end of 'task_struct'.  If</div><div class='del'>-	 * you hit a compile error here, check the structure to</div><div class='del'>-	 * see if something got added to the end.</div><div class='add'>+	 * 'state' be at the end of 'it:</div><div class='ctx'> 	 */</div><div class='ctx'> 	CHECK_MEMBER_AT_END_OF(struct fpu, __fpstate);</div><div class='del'>-	CHECK_MEMBER_AT_END_OF(struct thread_struct, fpu);</div><div class='del'>-	CHECK_MEMBER_AT_END_OF(struct task_struct, thread);</div><div class='ctx'> </div><div class='ctx'> 	arch_task_struct_size = task_size;</div><div class='ctx'> }</div><div class='hunk'>@@ -204,7 +205,6 @@ static void __init fpu__init_system_xstate_size_legacy(void)</div><div class='ctx'> 	fpu_kernel_cfg.default_size = size;</div><div class='ctx'> 	fpu_user_cfg.max_size = size;</div><div class='ctx'> 	fpu_user_cfg.default_size = size;</div><div class='del'>-	fpstate_reset(&amp;current-&gt;thread.fpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -213,7 +213,6 @@ static void __init fpu__init_system_xstate_size_legacy(void)</div><div class='ctx'>  */</div><div class='ctx'> void __init fpu__init_system(void)</div><div class='ctx'> {</div><div class='del'>-	fpstate_reset(&amp;current-&gt;thread.fpu);</div><div class='ctx'> 	fpu__init_system_early_generic();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/kernel/fpu/regset.c b/arch/x86/kernel/fpu/regset.c<br/>index 887b0b8e21e3..0986c2200adc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/regset.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/regset.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/regset.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fpu/regset.c</a></div><div class='hunk'>@@ -45,7 +45,7 @@ int regset_xregset_fpregs_active(struct task_struct *target, const struct user_r</div><div class='ctx'>  */</div><div class='ctx'> static void sync_fpstate(struct fpu *fpu)</div><div class='ctx'> {</div><div class='del'>-	if (fpu == &amp;current-&gt;thread.fpu)</div><div class='add'>+	if (fpu == x86_task_fpu(current))</div><div class='ctx'> 		fpu_sync_fpstate(fpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +63,7 @@ static void fpu_force_restore(struct fpu *fpu)</div><div class='ctx'> 	 * Only stopped child tasks can be used to modify the FPU</div><div class='ctx'> 	 * state in the fpstate buffer:</div><div class='ctx'> 	 */</div><div class='del'>-	WARN_ON_FPU(fpu == &amp;current-&gt;thread.fpu);</div><div class='add'>+	WARN_ON_FPU(fpu == x86_task_fpu(current));</div><div class='ctx'> </div><div class='ctx'> 	__fpu_invalidate_fpregs_state(fpu);</div><div class='ctx'> }</div><div class='hunk'>@@ -71,7 +71,7 @@ static void fpu_force_restore(struct fpu *fpu)</div><div class='ctx'> int xfpregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 		struct membuf to)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(target);</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_FXSR))</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -91,7 +91,7 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 		unsigned int pos, unsigned int count,</div><div class='ctx'> 		const void *kbuf, const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(target);</div><div class='ctx'> 	struct fxregs_state newstate;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -133,7 +133,7 @@ int xstateregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_XSAVE))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	sync_fpstate(&amp;target-&gt;thread.fpu);</div><div class='add'>+	sync_fpstate(x86_task_fpu(target));</div><div class='ctx'> </div><div class='ctx'> 	copy_xstate_to_uabi_buf(to, target, XSTATE_COPY_XSAVE);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -143,7 +143,7 @@ int xstateregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 		  unsigned int pos, unsigned int count,</div><div class='ctx'> 		  const void *kbuf, const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(target);</div><div class='ctx'> 	struct xregs_state *tmpbuf = NULL;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -187,7 +187,7 @@ int ssp_active(struct task_struct *target, const struct user_regset *regset)</div><div class='ctx'> int ssp_get(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 	    struct membuf to)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(target);</div><div class='ctx'> 	struct cet_user_state *cetregs;</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_USER_SHSTK) ||</div><div class='hunk'>@@ -214,7 +214,7 @@ int ssp_set(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 	    unsigned int pos, unsigned int count,</div><div class='ctx'> 	    const void *kbuf, const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(target);</div><div class='ctx'> 	struct xregs_state *xsave = &amp;fpu-&gt;fpstate-&gt;regs.xsave;</div><div class='ctx'> 	struct cet_user_state *cetregs;</div><div class='ctx'> 	unsigned long user_ssp;</div><div class='hunk'>@@ -368,7 +368,7 @@ static void __convert_from_fxsr(struct user_i387_ia32_struct *env,</div><div class='ctx'> void</div><div class='ctx'> convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)</div><div class='ctx'> {</div><div class='del'>-	__convert_from_fxsr(env, tsk, &amp;tsk-&gt;thread.fpu.fpstate-&gt;regs.fxsave);</div><div class='add'>+	__convert_from_fxsr(env, tsk, &amp;x86_task_fpu(tsk)-&gt;fpstate-&gt;regs.fxsave);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void convert_to_fxsr(struct fxregs_state *fxsave,</div><div class='hunk'>@@ -401,7 +401,7 @@ void convert_to_fxsr(struct fxregs_state *fxsave,</div><div class='ctx'> int fpregs_get(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 	       struct membuf to)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(target);</div><div class='ctx'> 	struct user_i387_ia32_struct env;</div><div class='ctx'> 	struct fxregs_state fxsave, *fx;</div><div class='ctx'> </div><div class='hunk'>@@ -433,7 +433,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset,</div><div class='ctx'> 	       unsigned int pos, unsigned int count,</div><div class='ctx'> 	       const void *kbuf, const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;target-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(target);</div><div class='ctx'> 	struct user_i387_ia32_struct env;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c<br/>index 6c69cb28b298..c3ec2512f2bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/signal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/signal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fpu/signal.c</a></div><div class='hunk'>@@ -43,13 +43,13 @@ static inline bool check_xstate_in_sigframe(struct fxregs_state __user *fxbuf,</div><div class='ctx'> 	 * fpstate layout with out copying the extended state information</div><div class='ctx'> 	 * in the memory layout.</div><div class='ctx'> 	 */</div><div class='del'>-	if (__get_user(magic2, (__u32 __user *)(fpstate + current-&gt;thread.fpu.fpstate-&gt;user_size)))</div><div class='add'>+	if (__get_user(magic2, (__u32 __user *)(fpstate + x86_task_fpu(current)-&gt;fpstate-&gt;user_size)))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(magic2 == FP_XSTATE_MAGIC2))</div><div class='ctx'> 		return true;</div><div class='ctx'> setfx:</div><div class='del'>-	trace_x86_fpu_xstate_check_failed(&amp;current-&gt;thread.fpu);</div><div class='add'>+	trace_x86_fpu_xstate_check_failed(x86_task_fpu(current));</div><div class='ctx'> </div><div class='ctx'> 	/* Set the parameters for fx only state */</div><div class='ctx'> 	fx_sw-&gt;magic1 = 0;</div><div class='hunk'>@@ -64,13 +64,13 @@ setfx:</div><div class='ctx'> static inline bool save_fsave_header(struct task_struct *tsk, void __user *buf)</div><div class='ctx'> {</div><div class='ctx'> 	if (use_fxsr()) {</div><div class='del'>-		struct xregs_state *xsave = &amp;tsk-&gt;thread.fpu.fpstate-&gt;regs.xsave;</div><div class='add'>+		struct xregs_state *xsave = &amp;x86_task_fpu(tsk)-&gt;fpstate-&gt;regs.xsave;</div><div class='ctx'> 		struct user_i387_ia32_struct env;</div><div class='ctx'> 		struct _fpstate_32 __user *fp = buf;</div><div class='ctx'> </div><div class='ctx'> 		fpregs_lock();</div><div class='ctx'> 		if (!test_thread_flag(TIF_NEED_FPU_LOAD))</div><div class='del'>-			fxsave(&amp;tsk-&gt;thread.fpu.fpstate-&gt;regs.fxsave);</div><div class='add'>+			fxsave(&amp;x86_task_fpu(tsk)-&gt;fpstate-&gt;regs.fxsave);</div><div class='ctx'> 		fpregs_unlock();</div><div class='ctx'> </div><div class='ctx'> 		convert_from_fxsr(&amp;env, tsk);</div><div class='hunk'>@@ -114,7 +114,6 @@ static inline bool save_xstate_epilog(void __user *buf, int ia32_frame,</div><div class='ctx'> {</div><div class='ctx'> 	struct xregs_state __user *x = buf;</div><div class='ctx'> 	struct _fpx_sw_bytes sw_bytes = {};</div><div class='del'>-	u32 xfeatures;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup the bytes not touched by the [f]xsave and reserved for SW. */</div><div class='hunk'>@@ -128,12 +127,6 @@ static inline bool save_xstate_epilog(void __user *buf, int ia32_frame,</div><div class='ctx'> 			  (__u32 __user *)(buf + fpstate-&gt;user_size));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Read the xfeatures which we copied (directly from the cpu or</div><div class='del'>-	 * from the state in task struct) to the user buffers.</div><div class='del'>-	 */</div><div class='del'>-	err |= __get_user(xfeatures, (__u32 __user *)&amp;x-&gt;header.xfeatures);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='ctx'> 	 * For legacy compatible, we always set FP/SSE bits in the bit</div><div class='ctx'> 	 * vector while saving the state to the user context. This will</div><div class='ctx'> 	 * enable us capturing any changes(during sigreturn) to</div><div class='hunk'>@@ -144,9 +137,7 @@ static inline bool save_xstate_epilog(void __user *buf, int ia32_frame,</div><div class='ctx'> 	 * header as well as change any contents in the memory layout.</div><div class='ctx'> 	 * xrestore as part of sigreturn will capture all the changes.</div><div class='ctx'> 	 */</div><div class='del'>-	xfeatures |= XFEATURE_MASK_FPSSE;</div><div class='del'>-</div><div class='del'>-	err |= __put_user(xfeatures, (__u32 __user *)&amp;x-&gt;header.xfeatures);</div><div class='add'>+	err |= set_xfeature_in_sigframe(x, XFEATURE_MASK_FPSSE);</div><div class='ctx'> </div><div class='ctx'> 	return !err;</div><div class='ctx'> }</div><div class='hunk'>@@ -184,7 +175,7 @@ static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf, u32 pk</div><div class='ctx'> bool copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size, u32 pkru)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='del'>-	struct fpstate *fpstate = tsk-&gt;thread.fpu.fpstate;</div><div class='add'>+	struct fpstate *fpstate = x86_task_fpu(tsk)-&gt;fpstate;</div><div class='ctx'> 	bool ia32_fxstate = (buf != buf_fx);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -272,7 +263,7 @@ static int __restore_fpregs_from_user(void __user *buf, u64 ufeatures,</div><div class='ctx'>  */</div><div class='ctx'> static bool restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Restore enabled features only. */</div><div class='hunk'>@@ -332,7 +323,7 @@ static bool __fpu_restore_sig(void __user *buf, void __user *buf_fx,</div><div class='ctx'> 			      bool ia32_fxstate)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *tsk = current;</div><div class='del'>-	struct fpu *fpu = &amp;tsk-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(tsk);</div><div class='ctx'> 	struct user_i387_ia32_struct env;</div><div class='ctx'> 	bool success, fx_only = false;</div><div class='ctx'> 	union fpregs_state *fpregs;</div><div class='hunk'>@@ -452,7 +443,7 @@ static inline unsigned int xstate_sigframe_size(struct fpstate *fpstate)</div><div class='ctx'>  */</div><div class='ctx'> bool fpu__restore_sig(void __user *buf, int ia32_frame)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> 	void __user *buf_fx = buf;</div><div class='ctx'> 	bool ia32_fxstate = false;</div><div class='ctx'> 	bool success = false;</div><div class='hunk'>@@ -499,7 +490,7 @@ unsigned long</div><div class='ctx'> fpu__alloc_mathframe(unsigned long sp, int ia32_frame,</div><div class='ctx'> 		     unsigned long *buf_fx, unsigned long *size)</div><div class='ctx'> {</div><div class='del'>-	unsigned long frame_size = xstate_sigframe_size(current-&gt;thread.fpu.fpstate);</div><div class='add'>+	unsigned long frame_size = xstate_sigframe_size(x86_task_fpu(current)-&gt;fpstate);</div><div class='ctx'> </div><div class='ctx'> 	*buf_fx = sp = round_down(sp - frame_size, 64);</div><div class='ctx'> 	if (ia32_frame &amp;&amp; use_fxsr()) {</div><div class='head'>diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c<br/>index 6a41d1610d8b..9aa9ac8399ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/xstate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/xstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/xstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fpu/xstate.c</a></div><div class='hunk'>@@ -14,13 +14,15 @@</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/coredump.h&gt;</div><div class='add'>+#include &lt;linux/sort.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/regset.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/signal.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/xcr.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/prctl.h&gt;</div><div class='ctx'> #include &lt;asm/elf.h&gt;</div><div class='hunk'>@@ -62,6 +64,7 @@ static const char *xfeature_names[] =</div><div class='ctx'> 	"unknown xstate feature",</div><div class='ctx'> 	"AMX Tile config",</div><div class='ctx'> 	"AMX Tile data",</div><div class='add'>+	"APX registers",</div><div class='ctx'> 	"unknown xstate feature",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -80,6 +83,7 @@ static unsigned short xsave_cpuid_features[] __initdata = {</div><div class='ctx'> 	[XFEATURE_CET_USER]			= X86_FEATURE_SHSTK,</div><div class='ctx'> 	[XFEATURE_XTILE_CFG]			= X86_FEATURE_AMX_TILE,</div><div class='ctx'> 	[XFEATURE_XTILE_DATA]			= X86_FEATURE_AMX_TILE,</div><div class='add'>+	[XFEATURE_APX]				= X86_FEATURE_APX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static unsigned int xstate_offsets[XFEATURE_MAX] __ro_after_init =</div><div class='hunk'>@@ -88,6 +92,31 @@ static unsigned int xstate_sizes[XFEATURE_MAX] __ro_after_init =</div><div class='ctx'> 	{ [ 0 ... XFEATURE_MAX - 1] = -1};</div><div class='ctx'> static unsigned int xstate_flags[XFEATURE_MAX] __ro_after_init;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Ordering of xstate components in uncompacted format:  The xfeature</div><div class='add'>+ * number does not necessarily indicate its position in the XSAVE buffer.</div><div class='add'>+ * This array defines the traversal order of xstate features.</div><div class='add'>+ */</div><div class='add'>+static unsigned int xfeature_uncompact_order[XFEATURE_MAX] __ro_after_init =</div><div class='add'>+	{ [ 0 ... XFEATURE_MAX - 1] = -1};</div><div class='add'>+</div><div class='add'>+static inline unsigned int next_xfeature_order(unsigned int i, u64 mask)</div><div class='add'>+{</div><div class='add'>+	for (; xfeature_uncompact_order[i] != -1; i++) {</div><div class='add'>+		if (mask &amp; BIT_ULL(xfeature_uncompact_order[i]))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Iterate xstate features in uncompacted order: */</div><div class='add'>+#define for_each_extended_xfeature_in_order(i, mask)	\</div><div class='add'>+	for (i = 0;					\</div><div class='add'>+	     i = next_xfeature_order(i, mask),		\</div><div class='add'>+	     xfeature_uncompact_order[i] != -1;		\</div><div class='add'>+	     i++)</div><div class='add'>+</div><div class='ctx'> #define XSTATE_FLAG_SUPERVISOR	BIT(0)</div><div class='ctx'> #define XSTATE_FLAG_ALIGNED64	BIT(1)</div><div class='ctx'> </div><div class='hunk'>@@ -199,7 +228,7 @@ void fpu__init_cpu_xstate(void)</div><div class='ctx'> 	 * MSR_IA32_XSS sets supervisor states managed by XSAVES.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_XSAVES)) {</div><div class='del'>-		wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() |</div><div class='add'>+		wrmsrq(MSR_IA32_XSS, xfeatures_mask_supervisor() |</div><div class='ctx'> 				     xfeatures_mask_independent());</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -209,16 +238,20 @@ static bool xfeature_enabled(enum xfeature xfeature)</div><div class='ctx'> 	return fpu_kernel_cfg.max_features &amp; BIT_ULL(xfeature);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int compare_xstate_offsets(const void *xfeature1, const void *xfeature2)</div><div class='add'>+{</div><div class='add'>+	return  xstate_offsets[*(unsigned int *)xfeature1] -</div><div class='add'>+		xstate_offsets[*(unsigned int *)xfeature2];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Record the offsets and sizes of various xstates contained</div><div class='del'>- * in the XSAVE state memory layout.</div><div class='add'>+ * in the XSAVE state memory layout. Also, create an ordered</div><div class='add'>+ * list of xfeatures for handling out-of-order offsets.</div><div class='ctx'>  */</div><div class='ctx'> static void __init setup_xstate_cache(void)</div><div class='ctx'> {</div><div class='del'>-	u32 eax, ebx, ecx, edx, i;</div><div class='del'>-	/* start at the beginning of the "extended state" */</div><div class='del'>-	unsigned int last_good_offset = offsetof(struct xregs_state,</div><div class='del'>-						 extended_state_area);</div><div class='add'>+	u32 eax, ebx, ecx, edx, xfeature, i = 0;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The FP xstates and SSE xstates are legacy states. They are always</div><div class='ctx'> 	 * in the fixed offsets in the xsave area in either compacted form</div><div class='hunk'>@@ -232,31 +265,30 @@ static void __init setup_xstate_cache(void)</div><div class='ctx'> 	xstate_sizes[XFEATURE_SSE]	= sizeof_field(struct fxregs_state,</div><div class='ctx'> 						       xmm_space);</div><div class='ctx'> </div><div class='del'>-	for_each_extended_xfeature(i, fpu_kernel_cfg.max_features) {</div><div class='del'>-		cpuid_count(CPUID_LEAF_XSTATE, i, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='add'>+	for_each_extended_xfeature(xfeature, fpu_kernel_cfg.max_features) {</div><div class='add'>+		cpuid_count(CPUID_LEAF_XSTATE, xfeature, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx);</div><div class='ctx'> </div><div class='del'>-		xstate_sizes[i] = eax;</div><div class='del'>-		xstate_flags[i] = ecx;</div><div class='add'>+		xstate_sizes[xfeature] = eax;</div><div class='add'>+		xstate_flags[xfeature] = ecx;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If an xfeature is supervisor state, the offset in EBX is</div><div class='ctx'> 		 * invalid, leave it to -1.</div><div class='ctx'> 		 */</div><div class='del'>-		if (xfeature_is_supervisor(i))</div><div class='add'>+		if (xfeature_is_supervisor(xfeature))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		xstate_offsets[i] = ebx;</div><div class='add'>+		xstate_offsets[xfeature] = ebx;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * In our xstate size checks, we assume that the highest-numbered</div><div class='del'>-		 * xstate feature has the highest offset in the buffer.  Ensure</div><div class='del'>-		 * it does.</div><div class='del'>-		 */</div><div class='del'>-		WARN_ONCE(last_good_offset &gt; xstate_offsets[i],</div><div class='del'>-			  "x86/fpu: misordered xstate at %d\n", last_good_offset);</div><div class='del'>-</div><div class='del'>-		last_good_offset = xstate_offsets[i];</div><div class='add'>+		/* Populate the list of xfeatures before sorting */</div><div class='add'>+		xfeature_uncompact_order[i++] = xfeature;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Sort xfeatures by their offsets to support out-of-order</div><div class='add'>+	 * offsets in the uncompacted format.</div><div class='add'>+	 */</div><div class='add'>+	sort(xfeature_uncompact_order, i, sizeof(unsigned int), compare_xstate_offsets, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -340,7 +372,8 @@ static __init void os_xrstor_booting(struct xregs_state *xstate)</div><div class='ctx'> 	 XFEATURE_MASK_BNDCSR |			\</div><div class='ctx'> 	 XFEATURE_MASK_PASID |			\</div><div class='ctx'> 	 XFEATURE_MASK_CET_USER |		\</div><div class='del'>-	 XFEATURE_MASK_XTILE)</div><div class='add'>+	 XFEATURE_MASK_XTILE |			\</div><div class='add'>+	 XFEATURE_MASK_APX)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * setup the xstate image representing the init state</div><div class='hunk'>@@ -540,6 +573,7 @@ static bool __init check_xstate_against_struct(int nr)</div><div class='ctx'> 	case XFEATURE_PASID:	  return XCHECK_SZ(sz, nr, struct ia32_pasid_state);</div><div class='ctx'> 	case XFEATURE_XTILE_CFG:  return XCHECK_SZ(sz, nr, struct xtile_cfg);</div><div class='ctx'> 	case XFEATURE_CET_USER:	  return XCHECK_SZ(sz, nr, struct cet_user_state);</div><div class='add'>+	case XFEATURE_APX:        return XCHECK_SZ(sz, nr, struct apx_state);</div><div class='ctx'> 	case XFEATURE_XTILE_DATA: check_xtile_data_against_struct(sz); return true;</div><div class='ctx'> 	default:</div><div class='ctx'> 		XSTATE_WARN_ON(1, "No structure for xstate: %d\n", nr);</div><div class='hunk'>@@ -552,13 +586,20 @@ static bool __init check_xstate_against_struct(int nr)</div><div class='ctx'> static unsigned int xstate_calculate_size(u64 xfeatures, bool compacted)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int topmost = fls64(xfeatures) -  1;</div><div class='del'>-	unsigned int offset = xstate_offsets[topmost];</div><div class='add'>+	unsigned int offset, i;</div><div class='ctx'> </div><div class='ctx'> 	if (topmost &lt;= XFEATURE_SSE)</div><div class='ctx'> 		return sizeof(struct xregs_state);</div><div class='ctx'> </div><div class='del'>-	if (compacted)</div><div class='add'>+	if (compacted) {</div><div class='ctx'> 		offset = xfeature_get_offset(xfeatures, topmost);</div><div class='add'>+	} else {</div><div class='add'>+		/* Walk through the xfeature order to pick the last */</div><div class='add'>+		for_each_extended_xfeature_in_order(i, xfeatures)</div><div class='add'>+			topmost = xfeature_uncompact_order[i];</div><div class='add'>+		offset = xstate_offsets[topmost];</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return offset + xstate_sizes[topmost];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -639,7 +680,7 @@ static unsigned int __init get_xsave_compacted_size(void)</div><div class='ctx'> 		return get_compacted_size();</div><div class='ctx'> </div><div class='ctx'> 	/* Disable independent features. */</div><div class='del'>-	wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor());</div><div class='add'>+	wrmsrq(MSR_IA32_XSS, xfeatures_mask_supervisor());</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ask the hardware what size is required of the buffer.</div><div class='hunk'>@@ -648,7 +689,7 @@ static unsigned int __init get_xsave_compacted_size(void)</div><div class='ctx'> 	size = get_compacted_size();</div><div class='ctx'> </div><div class='ctx'> 	/* Re-enable independent features so XSAVES will work on them again. */</div><div class='del'>-	wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor() | mask);</div><div class='add'>+	wrmsrq(MSR_IA32_XSS, xfeatures_mask_supervisor() | mask);</div><div class='ctx'> </div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='hunk'>@@ -711,6 +752,8 @@ static int __init init_xstate_size(void)</div><div class='ctx'>  */</div><div class='ctx'> static void __init fpu__init_disable_system_xstate(unsigned int legacy_size)</div><div class='ctx'> {</div><div class='add'>+	pr_info("x86/fpu: XSAVE disabled\n");</div><div class='add'>+</div><div class='ctx'> 	fpu_kernel_cfg.max_features = 0;</div><div class='ctx'> 	cr4_clear_bits(X86_CR4_OSXSAVE);</div><div class='ctx'> 	setup_clear_cpu_cap(X86_FEATURE_XSAVE);</div><div class='hunk'>@@ -727,7 +770,7 @@ static void __init fpu__init_disable_system_xstate(unsigned int legacy_size)</div><div class='ctx'> 	 */</div><div class='ctx'> 	init_fpstate.xfd = 0;</div><div class='ctx'> </div><div class='del'>-	fpstate_reset(&amp;current-&gt;thread.fpu);</div><div class='add'>+	fpstate_reset(x86_task_fpu(current));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -775,6 +818,17 @@ void __init fpu__init_system_xstate(unsigned int legacy_size)</div><div class='ctx'> 		goto out_disable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (fpu_kernel_cfg.max_features &amp; XFEATURE_MASK_APX &amp;&amp;</div><div class='add'>+	    fpu_kernel_cfg.max_features &amp; (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)) {</div><div class='add'>+		/*</div><div class='add'>+		 * This is a problematic CPU configuration where two</div><div class='add'>+		 * conflicting state components are both enumerated.</div><div class='add'>+		 */</div><div class='add'>+		pr_err("x86/fpu: Both APX/MPX present in the CPU's xstate features: 0x%llx.\n",</div><div class='add'>+		       fpu_kernel_cfg.max_features);</div><div class='add'>+		goto out_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	fpu_kernel_cfg.independent_features = fpu_kernel_cfg.max_features &amp;</div><div class='ctx'> 					      XFEATURE_MASK_INDEPENDENT;</div><div class='ctx'> </div><div class='hunk'>@@ -834,9 +888,6 @@ void __init fpu__init_system_xstate(unsigned int legacy_size)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_disable;</div><div class='ctx'> </div><div class='del'>-	/* Reset the state for the current task */</div><div class='del'>-	fpstate_reset(&amp;current-&gt;thread.fpu);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Update info used for ptrace frames; use standard-format size and no</div><div class='ctx'> 	 * supervisor xstates:</div><div class='hunk'>@@ -852,7 +903,7 @@ void __init fpu__init_system_xstate(unsigned int legacy_size)</div><div class='ctx'> 	init_fpstate.xfeatures		= fpu_kernel_cfg.default_features;</div><div class='ctx'> </div><div class='ctx'> 	if (init_fpstate.size &gt; sizeof(init_fpstate.regs)) {</div><div class='del'>-		pr_warn("x86/fpu: init_fpstate buffer too small (%zu &lt; %d), disabling XSAVE\n",</div><div class='add'>+		pr_warn("x86/fpu: init_fpstate buffer too small (%zu &lt; %d)\n",</div><div class='ctx'> 			sizeof(init_fpstate.regs), init_fpstate.size);</div><div class='ctx'> 		goto out_disable;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -864,7 +915,7 @@ void __init fpu__init_system_xstate(unsigned int legacy_size)</div><div class='ctx'> 	 * xfeatures mask.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (xfeatures != fpu_kernel_cfg.max_features) {</div><div class='del'>-		pr_err("x86/fpu: xfeatures modified from 0x%016llx to 0x%016llx during init, disabling XSAVE\n",</div><div class='add'>+		pr_err("x86/fpu: xfeatures modified from 0x%016llx to 0x%016llx during init\n",</div><div class='ctx'> 		       xfeatures, fpu_kernel_cfg.max_features);</div><div class='ctx'> 		goto out_disable;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -904,12 +955,12 @@ void fpu__resume_cpu(void)</div><div class='ctx'> 	 * of XSAVES and MSR_IA32_XSS.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_XSAVES)) {</div><div class='del'>-		wrmsrl(MSR_IA32_XSS, xfeatures_mask_supervisor()  |</div><div class='add'>+		wrmsrq(MSR_IA32_XSS, xfeatures_mask_supervisor()  |</div><div class='ctx'> 				     xfeatures_mask_independent());</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (fpu_state_size_dynamic())</div><div class='del'>-		wrmsrl(MSR_IA32_XFD, current-&gt;thread.fpu.fpstate-&gt;xfd);</div><div class='add'>+		wrmsrq(MSR_IA32_XFD, x86_task_fpu(current)-&gt;fpstate-&gt;xfd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1071,10 +1122,9 @@ void __copy_xstate_to_uabi_buf(struct membuf to, struct fpstate *fpstate,</div><div class='ctx'> 	const unsigned int off_mxcsr = offsetof(struct fxregs_state, mxcsr);</div><div class='ctx'> 	struct xregs_state *xinit = &amp;init_fpstate.regs.xsave;</div><div class='ctx'> 	struct xregs_state *xsave = &amp;fpstate-&gt;regs.xsave;</div><div class='add'>+	unsigned int zerofrom, i, xfeature;</div><div class='ctx'> 	struct xstate_header header;</div><div class='del'>-	unsigned int zerofrom;</div><div class='ctx'> 	u64 mask;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;header, 0, sizeof(header));</div><div class='ctx'> 	header.xfeatures = xsave-&gt;header.xfeatures;</div><div class='hunk'>@@ -1143,15 +1193,16 @@ void __copy_xstate_to_uabi_buf(struct membuf to, struct fpstate *fpstate,</div><div class='ctx'> 	 */</div><div class='ctx'> 	mask = header.xfeatures;</div><div class='ctx'> </div><div class='del'>-	for_each_extended_xfeature(i, mask) {</div><div class='add'>+	for_each_extended_xfeature_in_order(i, mask) {</div><div class='add'>+		xfeature = xfeature_uncompact_order[i];</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * If there was a feature or alignment gap, zero the space</div><div class='ctx'> 		 * in the destination buffer.</div><div class='ctx'> 		 */</div><div class='del'>-		if (zerofrom &lt; xstate_offsets[i])</div><div class='del'>-			membuf_zero(&amp;to, xstate_offsets[i] - zerofrom);</div><div class='add'>+		if (zerofrom &lt; xstate_offsets[xfeature])</div><div class='add'>+			membuf_zero(&amp;to, xstate_offsets[xfeature] - zerofrom);</div><div class='ctx'> </div><div class='del'>-		if (i == XFEATURE_PKRU) {</div><div class='add'>+		if (xfeature == XFEATURE_PKRU) {</div><div class='ctx'> 			struct pkru_state pkru = {0};</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * PKRU is not necessarily up to date in the</div><div class='hunk'>@@ -1161,14 +1212,14 @@ void __copy_xstate_to_uabi_buf(struct membuf to, struct fpstate *fpstate,</div><div class='ctx'> 			membuf_write(&amp;to, &amp;pkru, sizeof(pkru));</div><div class='ctx'> 		} else {</div><div class='ctx'> 			membuf_write(&amp;to,</div><div class='del'>-				     __raw_xsave_addr(xsave, i),</div><div class='del'>-				     xstate_sizes[i]);</div><div class='add'>+				     __raw_xsave_addr(xsave, xfeature),</div><div class='add'>+				     xstate_sizes[xfeature]);</div><div class='ctx'> 		}</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Keep track of the last copied state in the non-compacted</div><div class='ctx'> 		 * target buffer for gap zeroing.</div><div class='ctx'> 		 */</div><div class='del'>-		zerofrom = xstate_offsets[i] + xstate_sizes[i];</div><div class='add'>+		zerofrom = xstate_offsets[xfeature] + xstate_sizes[xfeature];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -1191,8 +1242,8 @@ out:</div><div class='ctx'> void copy_xstate_to_uabi_buf(struct membuf to, struct task_struct *tsk,</div><div class='ctx'> 			     enum xstate_copy_mode copy_mode)</div><div class='ctx'> {</div><div class='del'>-	__copy_xstate_to_uabi_buf(to, tsk-&gt;thread.fpu.fpstate,</div><div class='del'>-				  tsk-&gt;thread.fpu.fpstate-&gt;user_xfeatures,</div><div class='add'>+	__copy_xstate_to_uabi_buf(to, x86_task_fpu(tsk)-&gt;fpstate,</div><div class='add'>+				  x86_task_fpu(tsk)-&gt;fpstate-&gt;user_xfeatures,</div><div class='ctx'> 				  tsk-&gt;thread.pkru, copy_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1332,7 +1383,7 @@ int copy_uabi_from_kernel_to_xstate(struct fpstate *fpstate, const void *kbuf, u</div><div class='ctx'> int copy_sigframe_from_user_to_xstate(struct task_struct *tsk,</div><div class='ctx'> 				      const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	return copy_uabi_to_xstate(tsk-&gt;thread.fpu.fpstate, NULL, ubuf, &amp;tsk-&gt;thread.pkru);</div><div class='add'>+	return copy_uabi_to_xstate(x86_task_fpu(tsk)-&gt;fpstate, NULL, ubuf, &amp;tsk-&gt;thread.pkru);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool validate_independent_components(u64 mask)</div><div class='hunk'>@@ -1398,9 +1449,9 @@ void xrstors(struct xregs_state *xstate, u64 mask)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_KVM)</div><div class='del'>-void fpstate_clear_xstate_component(struct fpstate *fps, unsigned int xfeature)</div><div class='add'>+void fpstate_clear_xstate_component(struct fpstate *fpstate, unsigned int xfeature)</div><div class='ctx'> {</div><div class='del'>-	void *addr = get_xsave_addr(&amp;fps-&gt;regs.xsave, xfeature);</div><div class='add'>+	void *addr = get_xsave_addr(&amp;fpstate-&gt;regs.xsave, xfeature);</div><div class='ctx'> </div><div class='ctx'> 	if (addr)</div><div class='ctx'> 		memset(addr, 0, xstate_sizes[xfeature]);</div><div class='hunk'>@@ -1426,7 +1477,7 @@ static bool xstate_op_valid(struct fpstate *fpstate, u64 mask, bool rstor)</div><div class='ctx'> 	  * The XFD MSR does not match fpstate-&gt;xfd. That's invalid when</div><div class='ctx'> 	  * the passed in fpstate is current's fpstate.</div><div class='ctx'> 	  */</div><div class='del'>-	if (fpstate-&gt;xfd == current-&gt;thread.fpu.fpstate-&gt;xfd)</div><div class='add'>+	if (fpstate-&gt;xfd == x86_task_fpu(current)-&gt;fpstate-&gt;xfd)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1503,7 +1554,7 @@ void fpstate_free(struct fpu *fpu)</div><div class='ctx'> static int fpstate_realloc(u64 xfeatures, unsigned int ksize,</div><div class='ctx'> 			   unsigned int usize, struct fpu_guest *guest_fpu)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> 	struct fpstate *curfps, *newfps = NULL;</div><div class='ctx'> 	unsigned int fpsize;</div><div class='ctx'> 	bool in_use;</div><div class='hunk'>@@ -1596,7 +1647,7 @@ static int __xstate_request_perm(u64 permitted, u64 requested, bool guest)</div><div class='ctx'> 	 * AVX512.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool compacted = cpu_feature_enabled(X86_FEATURE_XCOMPACTED);</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;group_leader-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current-&gt;group_leader);</div><div class='ctx'> 	struct fpu_state_perm *perm;</div><div class='ctx'> 	unsigned int ksize, usize;</div><div class='ctx'> 	u64 mask;</div><div class='hunk'>@@ -1606,16 +1657,20 @@ static int __xstate_request_perm(u64 permitted, u64 requested, bool guest)</div><div class='ctx'> 	if ((permitted &amp; requested) == requested)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Calculate the resulting kernel state size */</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate the resulting kernel state size.  Note, @permitted also</div><div class='add'>+	 * contains supervisor xfeatures even though supervisor are always</div><div class='add'>+	 * permitted for kernel and guest FPUs, and never permitted for user</div><div class='add'>+	 * FPUs.</div><div class='add'>+	 */</div><div class='ctx'> 	mask = permitted | requested;</div><div class='del'>-	/* Take supervisor states into account on the host */</div><div class='del'>-	if (!guest)</div><div class='del'>-		mask |= xfeatures_mask_supervisor();</div><div class='ctx'> 	ksize = xstate_calculate_size(mask, compacted);</div><div class='ctx'> </div><div class='del'>-	/* Calculate the resulting user state size */</div><div class='del'>-	mask &amp;= XFEATURE_MASK_USER_SUPPORTED;</div><div class='del'>-	usize = xstate_calculate_size(mask, false);</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate the resulting user state size.  Take care not to clobber</div><div class='add'>+	 * the supervisor xfeatures in the new mask!</div><div class='add'>+	 */</div><div class='add'>+	usize = xstate_calculate_size(mask &amp; XFEATURE_MASK_USER_SUPPORTED, false);</div><div class='ctx'> </div><div class='ctx'> 	if (!guest) {</div><div class='ctx'> 		ret = validate_sigaltstack(usize);</div><div class='hunk'>@@ -1699,7 +1754,7 @@ int __xfd_enable_feature(u64 xfd_err, struct fpu_guest *guest_fpu)</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fpu = &amp;current-&gt;group_leader-&gt;thread.fpu;</div><div class='add'>+	fpu = x86_task_fpu(current-&gt;group_leader);</div><div class='ctx'> 	perm = guest_fpu ? &amp;fpu-&gt;guest_perm : &amp;fpu-&gt;perm;</div><div class='ctx'> 	ksize = perm-&gt;__state_size;</div><div class='ctx'> 	usize = perm-&gt;__user_state_size;</div><div class='hunk'>@@ -1804,7 +1859,7 @@ long fpu_xstate_prctl(int option, unsigned long arg2)</div><div class='ctx'>  */</div><div class='ctx'> static void avx512_status(struct seq_file *m, struct task_struct *task)</div><div class='ctx'> {</div><div class='del'>-	unsigned long timestamp = READ_ONCE(task-&gt;thread.fpu.avx512_timestamp);</div><div class='add'>+	unsigned long timestamp = READ_ONCE(x86_task_fpu(task)-&gt;avx512_timestamp);</div><div class='ctx'> 	long delta;</div><div class='ctx'> </div><div class='ctx'> 	if (!timestamp) {</div><div class='head'>diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h<br/>index 0fd34f53f025..52ce19289989 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/xstate.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fpu/xstate.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fpu/xstate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fpu/xstate.h</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/xstate.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/xcr.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> DECLARE_PER_CPU(u64, xfd_state);</div><div class='hunk'>@@ -22,7 +23,7 @@ static inline void xstate_init_xcomp_bv(struct xregs_state *xsave, u64 mask)</div><div class='ctx'> </div><div class='ctx'> static inline u64 xstate_get_group_perm(bool guest)</div><div class='ctx'> {</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;group_leader-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current-&gt;group_leader);</div><div class='ctx'> 	struct fpu_state_perm *perm;</div><div class='ctx'> </div><div class='ctx'> 	/* Pairs with WRITE_ONCE() in xstate_request_perm() */</div><div class='hunk'>@@ -69,21 +70,31 @@ static inline u64 xfeatures_mask_independent(void)</div><div class='ctx'> 	return fpu_kernel_cfg.independent_features;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int set_xfeature_in_sigframe(struct xregs_state __user *xbuf, u64 mask)</div><div class='add'>+{</div><div class='add'>+	u64 xfeatures;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Read the xfeatures value already saved in the user buffer */</div><div class='add'>+	err  = __get_user(xfeatures, &amp;xbuf-&gt;header.xfeatures);</div><div class='add'>+	xfeatures |= mask;</div><div class='add'>+	err |= __put_user(xfeatures, &amp;xbuf-&gt;header.xfeatures);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Update the value of PKRU register that was already pushed onto the signal frame.</div><div class='ctx'>  */</div><div class='del'>-static inline int update_pkru_in_sigframe(struct xregs_state __user *buf, u64 mask, u32 pkru)</div><div class='add'>+static inline int update_pkru_in_sigframe(struct xregs_state __user *buf, u32 pkru)</div><div class='ctx'> {</div><div class='del'>-	u64 xstate_bv;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!cpu_feature_enabled(X86_FEATURE_OSPKE)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Mark PKRU as in-use so that it is restored correctly. */</div><div class='del'>-	xstate_bv = (mask &amp; xfeatures_in_use()) | XFEATURE_MASK_PKRU;</div><div class='del'>-</div><div class='del'>-	err =  __put_user(xstate_bv, &amp;buf-&gt;header.xfeatures);</div><div class='add'>+	err = set_xfeature_in_sigframe(buf, XFEATURE_MASK_PKRU);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -171,7 +182,7 @@ static inline void xfd_validate_state(struct fpstate *fpstate, u64 mask, bool rs</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> static inline void xfd_set_state(u64 xfd)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_IA32_XFD, xfd);</div><div class='add'>+	wrmsrq(MSR_IA32_XFD, xfd);</div><div class='ctx'> 	__this_cpu_write(xfd_state, xfd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -288,7 +299,7 @@ static inline int xsave_to_user_sigframe(struct xregs_state __user *buf, u32 pkr</div><div class='ctx'> 	 * internally, e.g. PKRU. That's user space ABI and also required</div><div class='ctx'> 	 * to allow the signal handler to modify PKRU.</div><div class='ctx'> 	 */</div><div class='del'>-	struct fpstate *fpstate = current-&gt;thread.fpu.fpstate;</div><div class='add'>+	struct fpstate *fpstate = x86_task_fpu(current)-&gt;fpstate;</div><div class='ctx'> 	u64 mask = fpstate-&gt;user_xfeatures;</div><div class='ctx'> 	u32 lmask;</div><div class='ctx'> 	u32 hmask;</div><div class='hunk'>@@ -307,7 +318,7 @@ static inline int xsave_to_user_sigframe(struct xregs_state __user *buf, u32 pkr</div><div class='ctx'> 	clac();</div><div class='ctx'> </div><div class='ctx'> 	if (!err)</div><div class='del'>-		err = update_pkru_in_sigframe(buf, mask, pkru);</div><div class='add'>+		err = update_pkru_in_sigframe(buf, pkru);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -322,7 +333,7 @@ static inline int xrstor_from_user_sigframe(struct xregs_state __user *buf, u64</div><div class='ctx'> 	u32 hmask = mask &gt;&gt; 32;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	xfd_validate_state(current-&gt;thread.fpu.fpstate, mask, true);</div><div class='add'>+	xfd_validate_state(x86_task_fpu(current)-&gt;fpstate, mask, true);</div><div class='ctx'> </div><div class='ctx'> 	stac();</div><div class='ctx'> 	XSTATE_OP(XRSTOR, xstate, lmask, hmask, err);</div><div class='head'>diff --git a/arch/x86/kernel/fred.c b/arch/x86/kernel/fred.c<br/>index 5e2cd1004980..816187da3a47 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/fred.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/fred.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/fred.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/fred.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/fred.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -43,23 +44,23 @@ void cpu_init_fred_exceptions(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	loadsegment(ss, __KERNEL_DS);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_FRED_CONFIG,</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_CONFIG,</div><div class='ctx'> 	       /* Reserve for CALL emulation */</div><div class='ctx'> 	       FRED_CONFIG_REDZONE |</div><div class='ctx'> 	       FRED_CONFIG_INT_STKLVL(0) |</div><div class='ctx'> 	       FRED_CONFIG_ENTRYPOINT(asm_fred_entrypoint_user));</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_FRED_STKLVLS, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_STKLVLS, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ater a CPU offline/online cycle, the FRED RSP0 MSR should be</div><div class='ctx'> 	 * resynchronized with its per-CPU cache.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(MSR_IA32_FRED_RSP0, __this_cpu_read(fred_rsp0));</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_RSP0, __this_cpu_read(fred_rsp0));</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_FRED_RSP1, 0);</div><div class='del'>-	wrmsrl(MSR_IA32_FRED_RSP2, 0);</div><div class='del'>-	wrmsrl(MSR_IA32_FRED_RSP3, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_RSP1, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_RSP2, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_RSP3, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable FRED */</div><div class='ctx'> 	cr4_set_bits(X86_CR4_FRED);</div><div class='hunk'>@@ -79,14 +80,14 @@ void cpu_init_fred_rsps(void)</div><div class='ctx'> 	 * (remember that user space faults are always taken on stack level 0)</div><div class='ctx'> 	 * is to avoid overflowing the kernel stack.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(MSR_IA32_FRED_STKLVLS,</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_STKLVLS,</div><div class='ctx'> 	       FRED_STKLVL(X86_TRAP_DB,  FRED_DB_STACK_LEVEL) |</div><div class='ctx'> 	       FRED_STKLVL(X86_TRAP_NMI, FRED_NMI_STACK_LEVEL) |</div><div class='ctx'> 	       FRED_STKLVL(X86_TRAP_MC,  FRED_MC_STACK_LEVEL) |</div><div class='ctx'> 	       FRED_STKLVL(X86_TRAP_DF,  FRED_DF_STACK_LEVEL));</div><div class='ctx'> </div><div class='ctx'> 	/* The FRED equivalents to IST stacks... */</div><div class='del'>-	wrmsrl(MSR_IA32_FRED_RSP1, __this_cpu_ist_top_va(DB));</div><div class='del'>-	wrmsrl(MSR_IA32_FRED_RSP2, __this_cpu_ist_top_va(NMI));</div><div class='del'>-	wrmsrl(MSR_IA32_FRED_RSP3, __this_cpu_ist_top_va(DF));</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_RSP1, __this_cpu_ist_top_va(DB));</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_RSP2, __this_cpu_ist_top_va(NMI));</div><div class='add'>+	wrmsrq(MSR_IA32_FRED_RSP3, __this_cpu_ist_top_va(DF));</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c<br/>index cace6e8d7cc7..252e82bcfd2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/ftrace.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/ftrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/ftrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/ftrace.c</a></div><div class='hunk'>@@ -55,10 +55,10 @@ void ftrace_arch_code_modify_post_process(void)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ftrace_make_{call,nop}() may be called during</div><div class='del'>-	 * module load, and we need to finish the text_poke_queue()</div><div class='add'>+	 * module load, and we need to finish the smp_text_poke_batch_add()</div><div class='ctx'> 	 * that they do, here.</div><div class='ctx'> 	 */</div><div class='del'>-	text_poke_finish();</div><div class='add'>+	smp_text_poke_batch_finish();</div><div class='ctx'> 	ftrace_poke_late = 0;</div><div class='ctx'> 	mutex_unlock(&amp;text_mutex);</div><div class='ctx'> }</div><div class='hunk'>@@ -119,7 +119,7 @@ ftrace_modify_code_direct(unsigned long ip, const char *old_code,</div><div class='ctx'> </div><div class='ctx'> 	/* replace the text with the new text */</div><div class='ctx'> 	if (ftrace_poke_late)</div><div class='del'>-		text_poke_queue((void *)ip, new_code, MCOUNT_INSN_SIZE, NULL);</div><div class='add'>+		smp_text_poke_batch_add((void *)ip, new_code, MCOUNT_INSN_SIZE, NULL);</div><div class='ctx'> 	else</div><div class='ctx'> 		text_poke_early((void *)ip, new_code, MCOUNT_INSN_SIZE);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -186,11 +186,11 @@ int ftrace_update_ftrace_func(ftrace_func_t func)</div><div class='ctx'> </div><div class='ctx'> 	ip = (unsigned long)(&amp;ftrace_call);</div><div class='ctx'> 	new = ftrace_call_replace(ip, (unsigned long)func);</div><div class='del'>-	text_poke_bp((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='add'>+	smp_text_poke_single((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='ctx'> </div><div class='ctx'> 	ip = (unsigned long)(&amp;ftrace_regs_call);</div><div class='ctx'> 	new = ftrace_call_replace(ip, (unsigned long)func);</div><div class='del'>-	text_poke_bp((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='add'>+	smp_text_poke_single((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -247,10 +247,10 @@ void ftrace_replace_code(int enable)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		text_poke_queue((void *)rec-&gt;ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='add'>+		smp_text_poke_batch_add((void *)rec-&gt;ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='ctx'> 		ftrace_update_record(rec, enable);</div><div class='ctx'> 	}</div><div class='del'>-	text_poke_finish();</div><div class='add'>+	smp_text_poke_batch_finish();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_ftrace_update_code(int command)</div><div class='hunk'>@@ -354,7 +354,7 @@ create_trampoline(struct ftrace_ops *ops, unsigned int *tramp_size)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	ip = trampoline + size;</div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_RETHUNK))</div><div class='add'>+	if (cpu_wants_rethunk_at(ip))</div><div class='ctx'> 		__text_gen_insn(ip, JMP32_INSN_OPCODE, ip, x86_return_thunk, JMP32_INSN_SIZE);</div><div class='ctx'> 	else</div><div class='ctx'> 		memcpy(ip, retq, sizeof(retq));</div><div class='hunk'>@@ -492,7 +492,7 @@ void arch_ftrace_update_trampoline(struct ftrace_ops *ops)</div><div class='ctx'> 	mutex_lock(&amp;text_mutex);</div><div class='ctx'> 	/* Do a safe modify in case the trampoline is executing */</div><div class='ctx'> 	new = ftrace_call_replace(ip, (unsigned long)func);</div><div class='del'>-	text_poke_bp((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='add'>+	smp_text_poke_single((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='ctx'> 	mutex_unlock(&amp;text_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -586,7 +586,7 @@ static int ftrace_mod_jmp(unsigned long ip, void *func)</div><div class='ctx'> 	const char *new;</div><div class='ctx'> </div><div class='ctx'> 	new = ftrace_jmp_replace(ip, (unsigned long)func);</div><div class='del'>-	text_poke_bp((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='add'>+	smp_text_poke_single((void *)ip, new, MCOUNT_INSN_SIZE, NULL);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c<br/>index de001b2146ab..375f2d7f1762 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/head32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/head32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/head32.c</a></div><div class='hunk'>@@ -145,10 +145,6 @@ void __init __no_stack_protector mk_early_pgtbl_32(void)</div><div class='ctx'> 	*ptr = (unsigned long)ptep + PAGE_OFFSET;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MICROCODE_INITRD32</div><div class='del'>-	/* Running on a hypervisor? */</div><div class='del'>-	if (native_cpuid_ecx(1) &amp; BIT(31))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	params = (struct boot_params *)__pa_nodebug(&amp;boot_params);</div><div class='ctx'> 	if (!params-&gt;hdr.ramdisk_size || !params-&gt;hdr.ramdisk_image)</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c<br/>index fa9b6339975f..533fcf5636fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/head64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/head64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/head64.c</a></div><div class='hunk'>@@ -47,234 +47,22 @@</div><div class='ctx'>  * Manage page tables very early on.</div><div class='ctx'>  */</div><div class='ctx'> extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];</div><div class='del'>-static unsigned int __initdata next_early_pgt;</div><div class='add'>+unsigned int __initdata next_early_pgt;</div><div class='add'>+SYM_PIC_ALIAS(next_early_pgt);</div><div class='ctx'> pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE &amp; ~(_PAGE_GLOBAL | _PAGE_NX);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='ctx'> unsigned int __pgtable_l5_enabled __ro_after_init;</div><div class='ctx'> unsigned int pgdir_shift __ro_after_init = 39;</div><div class='ctx'> EXPORT_SYMBOL(pgdir_shift);</div><div class='ctx'> unsigned int ptrs_per_p4d __ro_after_init = 1;</div><div class='ctx'> EXPORT_SYMBOL(ptrs_per_p4d);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT</div><div class='ctx'> unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4;</div><div class='ctx'> EXPORT_SYMBOL(page_offset_base);</div><div class='ctx'> unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4;</div><div class='ctx'> EXPORT_SYMBOL(vmalloc_base);</div><div class='ctx'> unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4;</div><div class='ctx'> EXPORT_SYMBOL(vmemmap_base);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static inline bool check_la57_support(void)</div><div class='del'>-{</div><div class='del'>-	if (!IS_ENABLED(CONFIG_X86_5LEVEL))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * 5-level paging is detected and enabled at kernel decompression</div><div class='del'>-	 * stage. Only check if it has been enabled there.</div><div class='del'>-	 */</div><div class='del'>-	if (!(native_read_cr4() &amp; X86_CR4_LA57))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	RIP_REL_REF(__pgtable_l5_enabled)	= 1;</div><div class='del'>-	RIP_REL_REF(pgdir_shift)		= 48;</div><div class='del'>-	RIP_REL_REF(ptrs_per_p4d)		= 512;</div><div class='del'>-	RIP_REL_REF(page_offset_base)		= __PAGE_OFFSET_BASE_L5;</div><div class='del'>-	RIP_REL_REF(vmalloc_base)		= __VMALLOC_BASE_L5;</div><div class='del'>-	RIP_REL_REF(vmemmap_base)		= __VMEMMAP_BASE_L5;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long __head sme_postprocess_startup(struct boot_params *bp,</div><div class='del'>-						    pmdval_t *pmd,</div><div class='del'>-						    unsigned long p2v_offset)</div><div class='del'>-{</div><div class='del'>-	unsigned long paddr, paddr_end;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Encrypt the kernel and related (if SME is active) */</div><div class='del'>-	sme_encrypt_kernel(bp);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Clear the memory encryption mask from the .bss..decrypted section.</div><div class='del'>-	 * The bss section will be memset to zero later in the initialization so</div><div class='del'>-	 * there is no need to zero it after changing the memory encryption</div><div class='del'>-	 * attribute.</div><div class='del'>-	 */</div><div class='del'>-	if (sme_get_me_mask()) {</div><div class='del'>-		paddr = (unsigned long)&amp;RIP_REL_REF(__start_bss_decrypted);</div><div class='del'>-		paddr_end = (unsigned long)&amp;RIP_REL_REF(__end_bss_decrypted);</div><div class='del'>-</div><div class='del'>-		for (; paddr &lt; paddr_end; paddr += PMD_SIZE) {</div><div class='del'>-			/*</div><div class='del'>-			 * On SNP, transition the page to shared in the RMP table so that</div><div class='del'>-			 * it is consistent with the page table attribute change.</div><div class='del'>-			 *</div><div class='del'>-			 * __start_bss_decrypted has a virtual address in the high range</div><div class='del'>-			 * mapping (kernel .text). PVALIDATE, by way of</div><div class='del'>-			 * early_snp_set_memory_shared(), requires a valid virtual</div><div class='del'>-			 * address but the kernel is currently running off of the identity</div><div class='del'>-			 * mapping so use the PA to get a *currently* valid virtual address.</div><div class='del'>-			 */</div><div class='del'>-			early_snp_set_memory_shared(paddr, paddr, PTRS_PER_PMD);</div><div class='del'>-</div><div class='del'>-			i = pmd_index(paddr - p2v_offset);</div><div class='del'>-			pmd[i] -= sme_get_me_mask();</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Return the SME encryption mask (if SME is active) to be used as a</div><div class='del'>-	 * modifier for the initial pgdir entry programmed into CR3.</div><div class='del'>-	 */</div><div class='del'>-	return sme_get_me_mask();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Code in __startup_64() can be relocated during execution, but the compiler</div><div class='del'>- * doesn't have to generate PC-relative relocations when accessing globals from</div><div class='del'>- * that function. Clang actually does not generate them, which leads to</div><div class='del'>- * boot-time crashes. To work around this problem, every global pointer must</div><div class='del'>- * be accessed using RIP_REL_REF(). Kernel virtual addresses can be determined</div><div class='del'>- * by subtracting p2v_offset from the RIP-relative address.</div><div class='del'>- */</div><div class='del'>-unsigned long __head __startup_64(unsigned long p2v_offset,</div><div class='del'>-				  struct boot_params *bp)</div><div class='del'>-{</div><div class='del'>-	pmd_t (*early_pgts)[PTRS_PER_PMD] = RIP_REL_REF(early_dynamic_pgts);</div><div class='del'>-	unsigned long physaddr = (unsigned long)&amp;RIP_REL_REF(_text);</div><div class='del'>-	unsigned long va_text, va_end;</div><div class='del'>-	unsigned long pgtable_flags;</div><div class='del'>-	unsigned long load_delta;</div><div class='del'>-	pgdval_t *pgd;</div><div class='del'>-	p4dval_t *p4d;</div><div class='del'>-	pudval_t *pud;</div><div class='del'>-	pmdval_t *pmd, pmd_entry;</div><div class='del'>-	bool la57;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	la57 = check_la57_support();</div><div class='del'>-</div><div class='del'>-	/* Is the address too large? */</div><div class='del'>-	if (physaddr &gt;&gt; MAX_PHYSMEM_BITS)</div><div class='del'>-		for (;;);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Compute the delta between the address I am compiled to run at</div><div class='del'>-	 * and the address I am actually running at.</div><div class='del'>-	 */</div><div class='del'>-	load_delta = __START_KERNEL_map + p2v_offset;</div><div class='del'>-	RIP_REL_REF(phys_base) = load_delta;</div><div class='del'>-</div><div class='del'>-	/* Is the address not 2M aligned? */</div><div class='del'>-	if (load_delta &amp; ~PMD_MASK)</div><div class='del'>-		for (;;);</div><div class='del'>-</div><div class='del'>-	va_text = physaddr - p2v_offset;</div><div class='del'>-	va_end  = (unsigned long)&amp;RIP_REL_REF(_end) - p2v_offset;</div><div class='del'>-</div><div class='del'>-	/* Include the SME encryption mask in the fixup value */</div><div class='del'>-	load_delta += sme_get_me_mask();</div><div class='del'>-</div><div class='del'>-	/* Fixup the physical addresses in the page table */</div><div class='del'>-</div><div class='del'>-	pgd = &amp;RIP_REL_REF(early_top_pgt)-&gt;pgd;</div><div class='del'>-	pgd[pgd_index(__START_KERNEL_map)] += load_delta;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_X86_5LEVEL) &amp;&amp; la57) {</div><div class='del'>-		p4d = (p4dval_t *)&amp;RIP_REL_REF(level4_kernel_pgt);</div><div class='del'>-		p4d[MAX_PTRS_PER_P4D - 1] += load_delta;</div><div class='del'>-</div><div class='del'>-		pgd[pgd_index(__START_KERNEL_map)] = (pgdval_t)p4d | _PAGE_TABLE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	RIP_REL_REF(level3_kernel_pgt)[PTRS_PER_PUD - 2].pud += load_delta;</div><div class='del'>-	RIP_REL_REF(level3_kernel_pgt)[PTRS_PER_PUD - 1].pud += load_delta;</div><div class='del'>-</div><div class='del'>-	for (i = FIXMAP_PMD_TOP; i &gt; FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--)</div><div class='del'>-		RIP_REL_REF(level2_fixmap_pgt)[i].pmd += load_delta;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set up the identity mapping for the switchover.  These</div><div class='del'>-	 * entries should *NOT* have the global bit set!  This also</div><div class='del'>-	 * creates a bunch of nonsense entries but that is fine --</div><div class='del'>-	 * it avoids problems around wraparound.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	pud = &amp;early_pgts[0]-&gt;pmd;</div><div class='del'>-	pmd = &amp;early_pgts[1]-&gt;pmd;</div><div class='del'>-	RIP_REL_REF(next_early_pgt) = 2;</div><div class='del'>-</div><div class='del'>-	pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();</div><div class='del'>-</div><div class='del'>-	if (la57) {</div><div class='del'>-		p4d = &amp;early_pgts[RIP_REL_REF(next_early_pgt)++]-&gt;pmd;</div><div class='del'>-</div><div class='del'>-		i = (physaddr &gt;&gt; PGDIR_SHIFT) % PTRS_PER_PGD;</div><div class='del'>-		pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;</div><div class='del'>-		pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;</div><div class='del'>-</div><div class='del'>-		i = physaddr &gt;&gt; P4D_SHIFT;</div><div class='del'>-		p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;</div><div class='del'>-		p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;</div><div class='del'>-	} else {</div><div class='del'>-		i = (physaddr &gt;&gt; PGDIR_SHIFT) % PTRS_PER_PGD;</div><div class='del'>-		pgd[i + 0] = (pgdval_t)pud + pgtable_flags;</div><div class='del'>-		pgd[i + 1] = (pgdval_t)pud + pgtable_flags;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i = physaddr &gt;&gt; PUD_SHIFT;</div><div class='del'>-	pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;</div><div class='del'>-	pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;</div><div class='del'>-</div><div class='del'>-	pmd_entry = __PAGE_KERNEL_LARGE_EXEC &amp; ~_PAGE_GLOBAL;</div><div class='del'>-	/* Filter out unsupported __PAGE_KERNEL_* bits: */</div><div class='del'>-	pmd_entry &amp;= RIP_REL_REF(__supported_pte_mask);</div><div class='del'>-	pmd_entry += sme_get_me_mask();</div><div class='del'>-	pmd_entry +=  physaddr;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; DIV_ROUND_UP(va_end - va_text, PMD_SIZE); i++) {</div><div class='del'>-		int idx = i + (physaddr &gt;&gt; PMD_SHIFT);</div><div class='del'>-</div><div class='del'>-		pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Fixup the kernel text+data virtual addresses. Note that</div><div class='del'>-	 * we might write invalid pmds, when the kernel is relocated</div><div class='del'>-	 * cleanup_highmap() fixes this up along with the mappings</div><div class='del'>-	 * beyond _end.</div><div class='del'>-	 *</div><div class='del'>-	 * Only the region occupied by the kernel image has so far</div><div class='del'>-	 * been checked against the table of usable memory regions</div><div class='del'>-	 * provided by the firmware, so invalidate pages outside that</div><div class='del'>-	 * region. A page table entry that maps to a reserved area of</div><div class='del'>-	 * memory would allow processor speculation into that area,</div><div class='del'>-	 * and on some hardware (particularly the UV platform) even</div><div class='del'>-	 * speculative access to some reserved areas is caught as an</div><div class='del'>-	 * error, causing the BIOS to halt the system.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	pmd = &amp;RIP_REL_REF(level2_kernel_pgt)-&gt;pmd;</div><div class='del'>-</div><div class='del'>-	/* invalidate pages before the kernel image */</div><div class='del'>-	for (i = 0; i &lt; pmd_index(va_text); i++)</div><div class='del'>-		pmd[i] &amp;= ~_PAGE_PRESENT;</div><div class='del'>-</div><div class='del'>-	/* fixup pages that are part of the kernel image */</div><div class='del'>-	for (; i &lt;= pmd_index(va_end); i++)</div><div class='del'>-		if (pmd[i] &amp; _PAGE_PRESENT)</div><div class='del'>-			pmd[i] += load_delta;</div><div class='del'>-</div><div class='del'>-	/* invalidate pages after the kernel image */</div><div class='del'>-	for (; i &lt; PTRS_PER_PMD; i++)</div><div class='del'>-		pmd[i] &amp;= ~_PAGE_PRESENT;</div><div class='del'>-</div><div class='del'>-	return sme_postprocess_startup(bp, pmd, p2v_offset);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /* Wipe all early page tables except for the kernel symbol map */</div><div class='ctx'> static void __init reset_early_page_tables(void)</div><div class='hunk'>@@ -449,6 +237,12 @@ asmlinkage __visible void __init __noreturn x86_64_start_kernel(char * real_mode</div><div class='ctx'> 	/* Kill off the identity-map trampoline */</div><div class='ctx'> 	reset_early_page_tables();</div><div class='ctx'> </div><div class='add'>+	if (pgtable_l5_enabled()) {</div><div class='add'>+		page_offset_base	= __PAGE_OFFSET_BASE_L5;</div><div class='add'>+		vmalloc_base		= __VMALLOC_BASE_L5;</div><div class='add'>+		vmemmap_base		= __VMEMMAP_BASE_L5;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	clear_bss();</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -513,41 +307,6 @@ void __init __noreturn x86_64_start_reservations(char *real_mode_data)</div><div class='ctx'> 	start_kernel();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Data structures and code used for IDT setup in head_64.S. The bringup-IDT is</div><div class='del'>- * used until the idt_table takes over. On the boot CPU this happens in</div><div class='del'>- * x86_64_start_kernel(), on secondary CPUs in start_secondary(). In both cases</div><div class='del'>- * this happens in the functions called from head_64.S.</div><div class='del'>- *</div><div class='del'>- * The idt_table can't be used that early because all the code modifying it is</div><div class='del'>- * in idt.c and can be instrumented by tracing or KASAN, which both don't work</div><div class='del'>- * during early CPU bringup. Also the idt_table has the runtime vectors</div><div class='del'>- * configured which require certain CPU state to be setup already (like TSS),</div><div class='del'>- * which also hasn't happened yet in early CPU bringup.</div><div class='del'>- */</div><div class='del'>-static gate_desc bringup_idt_table[NUM_EXCEPTION_VECTORS] __page_aligned_data;</div><div class='del'>-</div><div class='del'>-/* This may run while still in the direct mapping */</div><div class='del'>-static void __head startup_64_load_idt(void *vc_handler)</div><div class='del'>-{</div><div class='del'>-	struct desc_ptr desc = {</div><div class='del'>-		.address = (unsigned long)&amp;RIP_REL_REF(bringup_idt_table),</div><div class='del'>-		.size    = sizeof(bringup_idt_table) - 1,</div><div class='del'>-	};</div><div class='del'>-	struct idt_data data;</div><div class='del'>-	gate_desc idt_desc;</div><div class='del'>-</div><div class='del'>-	/* @vc_handler is set only for a VMM Communication Exception */</div><div class='del'>-	if (vc_handler) {</div><div class='del'>-		init_idt_data(&amp;data, X86_TRAP_VC, vc_handler);</div><div class='del'>-		idt_init_desc(&amp;idt_desc, &amp;data);</div><div class='del'>-		native_write_idt_entry((gate_desc *)desc.address, X86_TRAP_VC, &amp;idt_desc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	native_load_idt(&amp;desc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This is used when running on kernel addresses */</div><div class='ctx'> void early_setup_idt(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *handler = NULL;</div><div class='hunk'>@@ -559,30 +318,3 @@ void early_setup_idt(void)</div><div class='ctx'> </div><div class='ctx'> 	startup_64_load_idt(handler);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Setup boot CPU state needed before kernel switches to virtual addresses.</div><div class='del'>- */</div><div class='del'>-void __head startup_64_setup_gdt_idt(void)</div><div class='del'>-{</div><div class='del'>-	struct desc_struct *gdt = (void *)(__force unsigned long)gdt_page.gdt;</div><div class='del'>-	void *handler = NULL;</div><div class='del'>-</div><div class='del'>-	struct desc_ptr startup_gdt_descr = {</div><div class='del'>-		.address = (unsigned long)&amp;RIP_REL_REF(*gdt),</div><div class='del'>-		.size    = GDT_SIZE - 1,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Load GDT */</div><div class='del'>-	native_load_gdt(&amp;startup_gdt_descr);</div><div class='del'>-</div><div class='del'>-	/* New GDT is live - reload data segment registers */</div><div class='del'>-	asm volatile("movl %%eax, %%ds\n"</div><div class='del'>-		     "movl %%eax, %%ss\n"</div><div class='del'>-		     "movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory");</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))</div><div class='del'>-		handler = &amp;RIP_REL_REF(vc_no_ghcb);</div><div class='del'>-</div><div class='del'>-	startup_64_load_idt(handler);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S<br/>index 2e42056d2306..76743dfad6ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_32.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head_32.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_32.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/head_32.S</a></div><div class='hunk'>@@ -86,7 +86,7 @@ SYM_CODE_START(startup_32)</div><div class='ctx'> 	movl $pa(__bss_stop),%ecx</div><div class='ctx'> 	subl %edi,%ecx</div><div class='ctx'> 	shrl $2,%ecx</div><div class='del'>-	rep ; stosl</div><div class='add'>+	rep stosl</div><div class='ctx'> /*</div><div class='ctx'>  * Copy bootup parameters out of the way.</div><div class='ctx'>  * Note: %esi still has the pointer to the real-mode data.</div><div class='hunk'>@@ -98,15 +98,13 @@ SYM_CODE_START(startup_32)</div><div class='ctx'> 	movl $pa(boot_params),%edi</div><div class='ctx'> 	movl $(PARAM_SIZE/4),%ecx</div><div class='ctx'> 	cld</div><div class='del'>-	rep</div><div class='del'>-	movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> 	movl pa(boot_params) + NEW_CL_POINTER,%esi</div><div class='ctx'> 	andl %esi,%esi</div><div class='ctx'> 	jz 1f			# No command line</div><div class='ctx'> 	movl $pa(boot_command_line),%edi</div><div class='ctx'> 	movl $(COMMAND_LINE_SIZE/4),%ecx</div><div class='del'>-	rep</div><div class='del'>-	movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> 1:</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OLPC</div><div class='head'>diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S<br/>index fefe2a25cf02..3e9b3a3bd039 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/head_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/head_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/head_64.S</a></div><div class='hunk'>@@ -573,6 +573,7 @@ SYM_CODE_START_NOALIGN(vc_no_ghcb)</div><div class='ctx'> 	/* Pure iret required here - don't use INTERRUPT_RETURN */</div><div class='ctx'> 	iretq</div><div class='ctx'> SYM_CODE_END(vc_no_ghcb)</div><div class='add'>+SYM_PIC_ALIAS(vc_no_ghcb);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION</div><div class='hunk'>@@ -604,10 +605,12 @@ SYM_DATA_START_PTI_ALIGNED(early_top_pgt)</div><div class='ctx'> 	.quad	level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC</div><div class='ctx'> 	.fill	PTI_USER_PGD_FILL,8,0</div><div class='ctx'> SYM_DATA_END(early_top_pgt)</div><div class='add'>+SYM_PIC_ALIAS(early_top_pgt)</div><div class='ctx'> </div><div class='ctx'> SYM_DATA_START_PAGE_ALIGNED(early_dynamic_pgts)</div><div class='ctx'> 	.fill	512*EARLY_DYNAMIC_PAGE_TABLES,8,0</div><div class='ctx'> SYM_DATA_END(early_dynamic_pgts)</div><div class='add'>+SYM_PIC_ALIAS(early_dynamic_pgts);</div><div class='ctx'> </div><div class='ctx'> SYM_DATA(early_recursion_flag, .long 0)</div><div class='ctx'> </div><div class='hunk'>@@ -646,12 +649,11 @@ SYM_DATA_START_PTI_ALIGNED(init_top_pgt)</div><div class='ctx'> SYM_DATA_END(init_top_pgt)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='ctx'> SYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt)</div><div class='ctx'> 	.fill	511,8,0</div><div class='ctx'> 	.quad	level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC</div><div class='ctx'> SYM_DATA_END(level4_kernel_pgt)</div><div class='del'>-#endif</div><div class='add'>+SYM_PIC_ALIAS(level4_kernel_pgt)</div><div class='ctx'> </div><div class='ctx'> SYM_DATA_START_PAGE_ALIGNED(level3_kernel_pgt)</div><div class='ctx'> 	.fill	L3_START_KERNEL,8,0</div><div class='hunk'>@@ -659,6 +661,7 @@ SYM_DATA_START_PAGE_ALIGNED(level3_kernel_pgt)</div><div class='ctx'> 	.quad	level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC</div><div class='ctx'> 	.quad	level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC</div><div class='ctx'> SYM_DATA_END(level3_kernel_pgt)</div><div class='add'>+SYM_PIC_ALIAS(level3_kernel_pgt)</div><div class='ctx'> </div><div class='ctx'> SYM_DATA_START_PAGE_ALIGNED(level2_kernel_pgt)</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -676,6 +679,7 @@ SYM_DATA_START_PAGE_ALIGNED(level2_kernel_pgt)</div><div class='ctx'> 	 */</div><div class='ctx'> 	PMDS(0, __PAGE_KERNEL_LARGE_EXEC, KERNEL_IMAGE_SIZE/PMD_SIZE)</div><div class='ctx'> SYM_DATA_END(level2_kernel_pgt)</div><div class='add'>+SYM_PIC_ALIAS(level2_kernel_pgt)</div><div class='ctx'> </div><div class='ctx'> SYM_DATA_START_PAGE_ALIGNED(level2_fixmap_pgt)</div><div class='ctx'> 	.fill	(512 - 4 - FIXMAP_PMD_NUM),8,0</div><div class='hunk'>@@ -688,6 +692,7 @@ SYM_DATA_START_PAGE_ALIGNED(level2_fixmap_pgt)</div><div class='ctx'> 	/* 6 MB reserved space + a 2MB hole */</div><div class='ctx'> 	.fill	4,8,0</div><div class='ctx'> SYM_DATA_END(level2_fixmap_pgt)</div><div class='add'>+SYM_PIC_ALIAS(level2_fixmap_pgt)</div><div class='ctx'> </div><div class='ctx'> SYM_DATA_START_PAGE_ALIGNED(level1_fixmap_pgt)</div><div class='ctx'> 	.rept (FIXMAP_PMD_NUM)</div><div class='hunk'>@@ -703,6 +708,7 @@ SYM_DATA(smpboot_control,		.long 0)</div><div class='ctx'> 	.align 16</div><div class='ctx'> /* This must match the first entry in level2_kernel_pgt */</div><div class='ctx'> SYM_DATA(phys_base, .quad 0x0)</div><div class='add'>+SYM_PIC_ALIAS(phys_base);</div><div class='ctx'> EXPORT_SYMBOL(phys_base)</div><div class='ctx'> </div><div class='ctx'> #include "../xen/xen-head.S"</div><div class='head'>diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c<br/>index 7f4b2966e15c..d6387dde3ff9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/hpet.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/hpet.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/hpet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/hpet.c</a></div><div class='hunk'>@@ -7,11 +7,12 @@</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/irq_remapping.h&gt;</div><div class='ctx'> #include &lt;asm/hpet.h&gt;</div><div class='ctx'> #include &lt;asm/time.h&gt;</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #undef  pr_fmt</div><div class='ctx'> #define pr_fmt(fmt) "hpet: " fmt</div><div class='hunk'>@@ -970,7 +971,7 @@ static bool __init hpet_is_pc10_damaged(void)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Check whether PC10 is enabled in PKG C-state limit */</div><div class='del'>-	rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, pcfg);</div><div class='add'>+	rdmsrq(MSR_PKG_CST_CONFIG_CONTROL, pcfg);</div><div class='ctx'> 	if ((pcfg &amp; 0xF) &lt; 8)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/i8253.c b/arch/x86/kernel/i8253.c<br/>index 80e262bb627f..cb9852ad6098 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/i8253.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/i8253.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/i8253.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/i8253.c</a></div><div class='hunk'>@@ -46,7 +46,8 @@ bool __init pit_timer_init(void)</div><div class='ctx'> 		 * VMMs otherwise steal CPU time just to pointlessly waggle</div><div class='ctx'> 		 * the (masked) IRQ.</div><div class='ctx'> 		 */</div><div class='del'>-		clockevent_i8253_disable();</div><div class='add'>+		scoped_guard(irq)</div><div class='add'>+			clockevent_i8253_disable();</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> 	clockevent_i8253_init(true);</div><div class='head'>diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c<br/>index cd8ed1edbf9e..9e9a591a5fec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/jailhouse.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/jailhouse.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/jailhouse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/jailhouse.c</a></div><div class='hunk'>@@ -49,7 +49,7 @@ static uint32_t jailhouse_cpuid_base(void)</div><div class='ctx'> 	    !boot_cpu_has(X86_FEATURE_HYPERVISOR))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);</div><div class='add'>+	return cpuid_base_hypervisor("Jailhouse\0\0\0", 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static uint32_t __init jailhouse_detect(void)</div><div class='head'>diff --git a/arch/x86/kernel/jump_label.c b/arch/x86/kernel/jump_label.c<br/>index f5b8ef02d172..a7949a54a0ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/jump_label.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/jump_label.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/jump_label.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/jump_label.c</a></div><div class='hunk'>@@ -102,7 +102,7 @@ __jump_label_transform(struct jump_entry *entry,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	text_poke_bp((void *)jump_entry_code(entry), jlp.code, jlp.size, NULL);</div><div class='add'>+	smp_text_poke_single((void *)jump_entry_code(entry), jlp.code, jlp.size, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __ref jump_label_transform(struct jump_entry *entry,</div><div class='hunk'>@@ -135,7 +135,7 @@ bool arch_jump_label_transform_queue(struct jump_entry *entry,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;text_mutex);</div><div class='ctx'> 	jlp = __jump_label_patch(entry, type);</div><div class='del'>-	text_poke_queue((void *)jump_entry_code(entry), jlp.code, jlp.size, NULL);</div><div class='add'>+	smp_text_poke_batch_add((void *)jump_entry_code(entry), jlp.code, jlp.size, NULL);</div><div class='ctx'> 	mutex_unlock(&amp;text_mutex);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -143,6 +143,6 @@ bool arch_jump_label_transform_queue(struct jump_entry *entry,</div><div class='ctx'> void arch_jump_label_transform_apply(void)</div><div class='ctx'> {</div><div class='ctx'> 	mutex_lock(&amp;text_mutex);</div><div class='del'>-	text_poke_finish();</div><div class='add'>+	smp_text_poke_batch_finish();</div><div class='ctx'> 	mutex_unlock(&amp;text_mutex);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c<br/>index 09608fd93687..47cb8eb138ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/kprobes/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kprobes/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/kprobes/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/kprobes/core.c</a></div><div class='hunk'>@@ -808,7 +808,7 @@ void arch_arm_kprobe(struct kprobe *p)</div><div class='ctx'> 	u8 int3 = INT3_INSN_OPCODE;</div><div class='ctx'> </div><div class='ctx'> 	text_poke(p-&gt;addr, &amp;int3, 1);</div><div class='del'>-	text_poke_sync();</div><div class='add'>+	smp_text_poke_sync_each_cpu();</div><div class='ctx'> 	perf_event_text_poke(p-&gt;addr, &amp;p-&gt;opcode, 1, &amp;int3, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -818,7 +818,7 @@ void arch_disarm_kprobe(struct kprobe *p)</div><div class='ctx'> </div><div class='ctx'> 	perf_event_text_poke(p-&gt;addr, &amp;int3, 1, &amp;p-&gt;opcode, 1);</div><div class='ctx'> 	text_poke(p-&gt;addr, &amp;p-&gt;opcode, 1);</div><div class='del'>-	text_poke_sync();</div><div class='add'>+	smp_text_poke_sync_each_cpu();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_remove_kprobe(struct kprobe *p)</div><div class='head'>diff --git a/arch/x86/kernel/kprobes/opt.c b/arch/x86/kernel/kprobes/opt.c<br/>index 36d6809c6c9e..0aabd4c4e2c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/kprobes/opt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kprobes/opt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/kprobes/opt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/kprobes/opt.c</a></div><div class='hunk'>@@ -488,7 +488,7 @@ void arch_optimize_kprobes(struct list_head *oplist)</div><div class='ctx'> 		insn_buff[0] = JMP32_INSN_OPCODE;</div><div class='ctx'> 		*(s32 *)(&amp;insn_buff[1]) = rel;</div><div class='ctx'> </div><div class='del'>-		text_poke_bp(op-&gt;kp.addr, insn_buff, JMP32_INSN_SIZE, NULL);</div><div class='add'>+		smp_text_poke_single(op-&gt;kp.addr, insn_buff, JMP32_INSN_SIZE, NULL);</div><div class='ctx'> </div><div class='ctx'> 		list_del_init(&amp;op-&gt;list);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -513,11 +513,11 @@ void arch_unoptimize_kprobe(struct optimized_kprobe *op)</div><div class='ctx'> 	       JMP32_INSN_SIZE - INT3_INSN_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	text_poke(addr, new, INT3_INSN_SIZE);</div><div class='del'>-	text_poke_sync();</div><div class='add'>+	smp_text_poke_sync_each_cpu();</div><div class='ctx'> 	text_poke(addr + INT3_INSN_SIZE,</div><div class='ctx'> 		  new + INT3_INSN_SIZE,</div><div class='ctx'> 		  JMP32_INSN_SIZE - INT3_INSN_SIZE);</div><div class='del'>-	text_poke_sync();</div><div class='add'>+	smp_text_poke_sync_each_cpu();</div><div class='ctx'> </div><div class='ctx'> 	perf_event_text_poke(op-&gt;kp.addr, old, JMP32_INSN_SIZE, new, JMP32_INSN_SIZE);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c<br/>index 3be9b3342c67..921c1c783bc1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/kvm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kvm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/kvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/kvm.c</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='ctx'> #include &lt;asm/cpuidle_haltpoll.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/ptrace.h&gt;</div><div class='ctx'> #include &lt;asm/reboot.h&gt;</div><div class='ctx'> #include &lt;asm/svm.h&gt;</div><div class='hunk'>@@ -301,7 +302,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_asyncpf_interrupt)</div><div class='ctx'> 		token = __this_cpu_read(apf_reason.token);</div><div class='ctx'> 		kvm_async_pf_task_wake(token);</div><div class='ctx'> 		__this_cpu_write(apf_reason.token, 0);</div><div class='del'>-		wrmsrl(MSR_KVM_ASYNC_PF_ACK, 1);</div><div class='add'>+		wrmsrq(MSR_KVM_ASYNC_PF_ACK, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	set_irq_regs(old_regs);</div><div class='hunk'>@@ -327,7 +328,7 @@ static void kvm_register_steal_time(void)</div><div class='ctx'> 	if (!has_steal_clock)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_KVM_STEAL_TIME, (slow_virt_to_phys(st) | KVM_MSR_ENABLED));</div><div class='add'>+	wrmsrq(MSR_KVM_STEAL_TIME, (slow_virt_to_phys(st) | KVM_MSR_ENABLED));</div><div class='ctx'> 	pr_debug("stealtime: cpu %d, msr %llx\n", cpu,</div><div class='ctx'> 		(unsigned long long) slow_virt_to_phys(st));</div><div class='ctx'> }</div><div class='hunk'>@@ -361,9 +362,9 @@ static void kvm_guest_cpu_init(void)</div><div class='ctx'> 		if (kvm_para_has_feature(KVM_FEATURE_ASYNC_PF_VMEXIT))</div><div class='ctx'> 			pa |= KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;</div><div class='ctx'> </div><div class='del'>-		wrmsrl(MSR_KVM_ASYNC_PF_INT, HYPERVISOR_CALLBACK_VECTOR);</div><div class='add'>+		wrmsrq(MSR_KVM_ASYNC_PF_INT, HYPERVISOR_CALLBACK_VECTOR);</div><div class='ctx'> </div><div class='del'>-		wrmsrl(MSR_KVM_ASYNC_PF_EN, pa);</div><div class='add'>+		wrmsrq(MSR_KVM_ASYNC_PF_EN, pa);</div><div class='ctx'> 		__this_cpu_write(async_pf_enabled, true);</div><div class='ctx'> 		pr_debug("setup async PF for cpu %d\n", smp_processor_id());</div><div class='ctx'> 	}</div><div class='hunk'>@@ -376,7 +377,7 @@ static void kvm_guest_cpu_init(void)</div><div class='ctx'> 		__this_cpu_write(kvm_apic_eoi, 0);</div><div class='ctx'> 		pa = slow_virt_to_phys(this_cpu_ptr(&amp;kvm_apic_eoi))</div><div class='ctx'> 			| KVM_MSR_ENABLED;</div><div class='del'>-		wrmsrl(MSR_KVM_PV_EOI_EN, pa);</div><div class='add'>+		wrmsrq(MSR_KVM_PV_EOI_EN, pa);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (has_steal_clock)</div><div class='hunk'>@@ -388,7 +389,7 @@ static void kvm_pv_disable_apf(void)</div><div class='ctx'> 	if (!__this_cpu_read(async_pf_enabled))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_KVM_ASYNC_PF_EN, 0);</div><div class='add'>+	wrmsrq(MSR_KVM_ASYNC_PF_EN, 0);</div><div class='ctx'> 	__this_cpu_write(async_pf_enabled, false);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("disable async PF for cpu %d\n", smp_processor_id());</div><div class='hunk'>@@ -399,7 +400,7 @@ static void kvm_disable_steal_time(void)</div><div class='ctx'> 	if (!has_steal_clock)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsr(MSR_KVM_STEAL_TIME, 0, 0);</div><div class='add'>+	wrmsrq(MSR_KVM_STEAL_TIME, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u64 kvm_steal_clock(int cpu)</div><div class='hunk'>@@ -451,9 +452,9 @@ static void kvm_guest_cpu_offline(bool shutdown)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_disable_steal_time();</div><div class='ctx'> 	if (kvm_para_has_feature(KVM_FEATURE_PV_EOI))</div><div class='del'>-		wrmsrl(MSR_KVM_PV_EOI_EN, 0);</div><div class='add'>+		wrmsrq(MSR_KVM_PV_EOI_EN, 0);</div><div class='ctx'> 	if (kvm_para_has_feature(KVM_FEATURE_MIGRATION_CONTROL))</div><div class='del'>-		wrmsrl(MSR_KVM_MIGRATION_CONTROL, 0);</div><div class='add'>+		wrmsrq(MSR_KVM_MIGRATION_CONTROL, 0);</div><div class='ctx'> 	kvm_pv_disable_apf();</div><div class='ctx'> 	if (!shutdown)</div><div class='ctx'> 		apf_task_wake_all();</div><div class='hunk'>@@ -615,7 +616,7 @@ static int __init setup_efi_kvm_sev_migration(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pr_info("%s : live migration enabled in EFI\n", __func__);</div><div class='del'>-	wrmsrl(MSR_KVM_MIGRATION_CONTROL, KVM_MIGRATION_READY);</div><div class='add'>+	wrmsrq(MSR_KVM_MIGRATION_CONTROL, KVM_MIGRATION_READY);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -728,7 +729,7 @@ static int kvm_suspend(void)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL</div><div class='ctx'> 	if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL))</div><div class='del'>-		rdmsrl(MSR_KVM_POLL_CONTROL, val);</div><div class='add'>+		rdmsrq(MSR_KVM_POLL_CONTROL, val);</div><div class='ctx'> 	has_guest_poll = !(val &amp; 1);</div><div class='ctx'> #endif</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -740,7 +741,7 @@ static void kvm_resume(void)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL</div><div class='ctx'> 	if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL) &amp;&amp; has_guest_poll)</div><div class='del'>-		wrmsrl(MSR_KVM_POLL_CONTROL, 0);</div><div class='add'>+		wrmsrq(MSR_KVM_POLL_CONTROL, 0);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -874,7 +875,7 @@ static noinline uint32_t __kvm_cpuid_base(void)</div><div class='ctx'> 		return 0;	/* So we don't blow up on old processors */</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))</div><div class='del'>-		return hypervisor_cpuid_base(KVM_SIGNATURE, 0);</div><div class='add'>+		return cpuid_base_hypervisor(KVM_SIGNATURE, 0);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -975,7 +976,7 @@ static void __init kvm_init_platform(void)</div><div class='ctx'> 		 * If not booted using EFI, enable Live migration support.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!efi_enabled(EFI_BOOT))</div><div class='del'>-			wrmsrl(MSR_KVM_MIGRATION_CONTROL,</div><div class='add'>+			wrmsrq(MSR_KVM_MIGRATION_CONTROL,</div><div class='ctx'> 			       KVM_MIGRATION_READY);</div><div class='ctx'> 	}</div><div class='ctx'> 	kvmclock_init();</div><div class='hunk'>@@ -1124,12 +1125,12 @@ out:</div><div class='ctx'> </div><div class='ctx'> static void kvm_disable_host_haltpoll(void *i)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_KVM_POLL_CONTROL, 0);</div><div class='add'>+	wrmsrq(MSR_KVM_POLL_CONTROL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvm_enable_host_haltpoll(void *i)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_KVM_POLL_CONTROL, 1);</div><div class='add'>+	wrmsrq(MSR_KVM_POLL_CONTROL, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_haltpoll_enable(unsigned int cpu)</div><div class='head'>diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c<br/>index 5b2c15214a6b..ca0a49eeac4a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/kvmclock.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/kvmclock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/kvmclock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/kvmclock.c</a></div><div class='hunk'>@@ -60,7 +60,7 @@ EXPORT_PER_CPU_SYMBOL_GPL(hv_clock_per_cpu);</div><div class='ctx'>  */</div><div class='ctx'> static void kvm_get_wallclock(struct timespec64 *now)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(msr_kvm_wall_clock, slow_virt_to_phys(&amp;wall_clock));</div><div class='add'>+	wrmsrq(msr_kvm_wall_clock, slow_virt_to_phys(&amp;wall_clock));</div><div class='ctx'> 	preempt_disable();</div><div class='ctx'> 	pvclock_read_wallclock(&amp;wall_clock, this_cpu_pvti(), now);</div><div class='ctx'> 	preempt_enable();</div><div class='hunk'>@@ -173,7 +173,7 @@ static void kvm_register_clock(char *txt)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	pa = slow_virt_to_phys(&amp;src-&gt;pvti) | 0x01ULL;</div><div class='del'>-	wrmsrl(msr_kvm_system_time, pa);</div><div class='add'>+	wrmsrq(msr_kvm_system_time, pa);</div><div class='ctx'> 	pr_debug("kvm-clock: cpu %d, msr %llx, %s", smp_processor_id(), pa, txt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -196,7 +196,7 @@ static void kvm_setup_secondary_clock(void)</div><div class='ctx'> void kvmclock_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (msr_kvm_system_time)</div><div class='del'>-		native_write_msr(msr_kvm_system_time, 0, 0);</div><div class='add'>+		native_write_msr(msr_kvm_system_time, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __init kvmclock_init_mem(void)</div><div class='head'>diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c<br/>index 80265162aeff..1f325304c4a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/machine_kexec_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/machine_kexec_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/machine_kexec_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/machine_kexec_32.c</a></div><div class='hunk'>@@ -42,7 +42,7 @@ static void load_segments(void)</div><div class='ctx'> </div><div class='ctx'> static void machine_kexec_free_page_tables(struct kimage *image)</div><div class='ctx'> {</div><div class='del'>-	free_pages((unsigned long)image-&gt;arch.pgd, PGD_ALLOCATION_ORDER);</div><div class='add'>+	free_pages((unsigned long)image-&gt;arch.pgd, pgd_allocation_order());</div><div class='ctx'> 	image-&gt;arch.pgd = NULL;</div><div class='ctx'> #ifdef CONFIG_X86_PAE</div><div class='ctx'> 	free_page((unsigned long)image-&gt;arch.pmd0);</div><div class='hunk'>@@ -59,7 +59,7 @@ static void machine_kexec_free_page_tables(struct kimage *image)</div><div class='ctx'> static int machine_kexec_alloc_page_tables(struct kimage *image)</div><div class='ctx'> {</div><div class='ctx'> 	image-&gt;arch.pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,</div><div class='del'>-						    PGD_ALLOCATION_ORDER);</div><div class='add'>+						    pgd_allocation_order());</div><div class='ctx'> #ifdef CONFIG_X86_PAE</div><div class='ctx'> 	image-&gt;arch.pmd0 = (pmd_t *)get_zeroed_page(GFP_KERNEL);</div><div class='ctx'> 	image-&gt;arch.pmd1 = (pmd_t *)get_zeroed_page(GFP_KERNEL);</div><div class='head'>diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c<br/>index a68f5a0a9f37..949c9e4bfad2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/machine_kexec_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/machine_kexec_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/machine_kexec_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/machine_kexec_64.c</a></div><div class='hunk'>@@ -76,6 +76,19 @@ map_acpi_tables(struct x86_mapping_info *info, pgd_t *level4p)</div><div class='ctx'> static int map_acpi_tables(struct x86_mapping_info *info, pgd_t *level4p) { return 0; }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+static int map_mmio_serial(struct x86_mapping_info *info, pgd_t *level4p)</div><div class='add'>+{</div><div class='add'>+	unsigned long mstart, mend;</div><div class='add'>+</div><div class='add'>+	if (!kexec_debug_8250_mmio32)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mstart = kexec_debug_8250_mmio32 &amp; PAGE_MASK;</div><div class='add'>+	mend = (kexec_debug_8250_mmio32 + PAGE_SIZE + 23) &amp; PAGE_MASK;</div><div class='add'>+	pr_info("Map PCI serial at %lx - %lx\n", mstart, mend);</div><div class='add'>+	return kernel_ident_mapping_init(info, level4p, mstart, mend);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_KEXEC_FILE</div><div class='ctx'> const struct kexec_file_ops * const kexec_file_loaders[] = {</div><div class='ctx'> 		&amp;kexec_bzImage64_ops,</div><div class='hunk'>@@ -285,6 +298,10 @@ static int init_pgtable(struct kimage *image, unsigned long control_page)</div><div class='ctx'> 	if (result)</div><div class='ctx'> 		return result;</div><div class='ctx'> </div><div class='add'>+	result = map_mmio_serial(&amp;info, image-&gt;arch.pgd);</div><div class='add'>+	if (result)</div><div class='add'>+		return result;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This must be last because the intermediate page table pages it</div><div class='ctx'> 	 * allocates will not be control pages and may overlap the image.</div><div class='hunk'>@@ -304,6 +321,24 @@ static void load_segments(void)</div><div class='ctx'> 		);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void prepare_debug_idt(unsigned long control_page, unsigned long vec_ofs)</div><div class='add'>+{</div><div class='add'>+	gate_desc idtentry = { 0 };</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	idtentry.bits.p		= 1;</div><div class='add'>+	idtentry.bits.type	= GATE_TRAP;</div><div class='add'>+	idtentry.segment	= __KERNEL_CS;</div><div class='add'>+	idtentry.offset_low	= (control_page &amp; 0xFFFF) + vec_ofs;</div><div class='add'>+	idtentry.offset_middle	= (control_page &gt;&gt; 16) &amp; 0xFFFF;</div><div class='add'>+	idtentry.offset_high	= control_page &gt;&gt; 32;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 16; i++) {</div><div class='add'>+		kexec_debug_idt[i] = idtentry;</div><div class='add'>+		idtentry.offset_low += KEXEC_DEBUG_EXC_HANDLER_SIZE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int machine_kexec_prepare(struct kimage *image)</div><div class='ctx'> {</div><div class='ctx'> 	void *control_page = page_address(image-&gt;control_code_page);</div><div class='hunk'>@@ -321,6 +356,9 @@ int machine_kexec_prepare(struct kimage *image)</div><div class='ctx'> 	if (image-&gt;type == KEXEC_TYPE_DEFAULT)</div><div class='ctx'> 		kexec_pa_swap_page = page_to_pfn(image-&gt;swap_page) &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='add'>+	prepare_debug_idt((unsigned long)__pa(control_page),</div><div class='add'>+			  (unsigned long)kexec_debug_exc_vectors - reloc_start);</div><div class='add'>+</div><div class='ctx'> 	__memcpy(control_page, __relocate_kernel_start, reloc_end - reloc_start);</div><div class='ctx'> </div><div class='ctx'> 	set_memory_rox((unsigned long)control_page, 1);</div><div class='hunk'>@@ -396,16 +434,10 @@ void __nocfi machine_kexec(struct kimage *image)</div><div class='ctx'> 	 * with from a table in memory.  At no other time is the</div><div class='ctx'> 	 * descriptor table in memory accessed.</div><div class='ctx'> 	 *</div><div class='del'>-	 * I take advantage of this here by force loading the</div><div class='del'>-	 * segments, before I zap the gdt with an invalid value.</div><div class='add'>+	 * Take advantage of this here by force loading the segments,</div><div class='add'>+	 * before the GDT is zapped with an invalid value.</div><div class='ctx'> 	 */</div><div class='ctx'> 	load_segments();</div><div class='del'>-	/*</div><div class='del'>-	 * The gdt &amp; idt are now invalid.</div><div class='del'>-	 * If you want to load them you must set up your own idt &amp; gdt.</div><div class='del'>-	 */</div><div class='del'>-	native_idt_invalidate();</div><div class='del'>-	native_gdt_invalidate();</div><div class='ctx'> </div><div class='ctx'> 	/* now call it */</div><div class='ctx'> 	image-&gt;start = relocate_kernel_ptr((unsigned long)image-&gt;head,</div><div class='head'>diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c<br/>index 1f54eedc3015..ef6104e7cc72 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/mmconf-fam10h_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/mmconf-fam10h_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/mmconf-fam10h_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/mmconf-fam10h_64.c</a></div><div class='hunk'>@@ -97,7 +97,7 @@ static void get_fam10h_pci_mmconf_base(void)</div><div class='ctx'> </div><div class='ctx'> 	/* SYS_CFG */</div><div class='ctx'> 	address = MSR_AMD64_SYSCFG;</div><div class='del'>-	rdmsrl(address, val);</div><div class='add'>+	rdmsrq(address, val);</div><div class='ctx'> </div><div class='ctx'> 	/* TOP_MEM2 is not enabled? */</div><div class='ctx'> 	if (!(val &amp; (1&lt;&lt;21))) {</div><div class='hunk'>@@ -105,7 +105,7 @@ static void get_fam10h_pci_mmconf_base(void)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* TOP_MEM2 */</div><div class='ctx'> 		address = MSR_K8_TOP_MEM2;</div><div class='del'>-		rdmsrl(address, val);</div><div class='add'>+		rdmsrq(address, val);</div><div class='ctx'> 		tom2 = max(val &amp; 0xffffff800000ULL, 1ULL &lt;&lt; 32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -177,7 +177,7 @@ void fam10h_check_enable_mmcfg(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	address = MSR_FAM10H_MMIO_CONF_BASE;</div><div class='del'>-	rdmsrl(address, val);</div><div class='add'>+	rdmsrq(address, val);</div><div class='ctx'> </div><div class='ctx'> 	/* try to make sure that AP's setting is identical to BSP setting */</div><div class='ctx'> 	if (val &amp; FAM10H_MMIO_CONF_ENABLE) {</div><div class='hunk'>@@ -212,7 +212,7 @@ void fam10h_check_enable_mmcfg(void)</div><div class='ctx'> 	     (FAM10H_MMIO_CONF_BUSRANGE_MASK&lt;&lt;FAM10H_MMIO_CONF_BUSRANGE_SHIFT));</div><div class='ctx'> 	val |= fam10h_pci_mmconf_base | (8 &lt;&lt; FAM10H_MMIO_CONF_BUSRANGE_SHIFT) |</div><div class='ctx'> 	       FAM10H_MMIO_CONF_ENABLE;</div><div class='del'>-	wrmsrl(address, val);</div><div class='add'>+	wrmsrq(address, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init set_check_enable_amd_mmconf(const struct dmi_system_id *d)</div><div class='head'>diff --git a/arch/x86/kernel/module.c b/arch/x86/kernel/module.c<br/>index a7998f351701..0ffbae902e2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/module.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/module.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/module.c</a></div><div class='hunk'>@@ -206,7 +206,7 @@ static int write_relocate_add(Elf64_Shdr *sechdrs,</div><div class='ctx'> 				   write, apply);</div><div class='ctx'> </div><div class='ctx'> 	if (!early) {</div><div class='del'>-		text_poke_sync();</div><div class='add'>+		smp_text_poke_sync_each_cpu();</div><div class='ctx'> 		mutex_unlock(&amp;text_mutex);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -266,6 +266,8 @@ int module_finalize(const Elf_Ehdr *hdr,</div><div class='ctx'> 			ibt_endbr = s;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	its_init_mod(me);</div><div class='add'>+</div><div class='ctx'> 	if (retpolines || cfi) {</div><div class='ctx'> 		void *rseg = NULL, *cseg = NULL;</div><div class='ctx'> 		unsigned int rsize = 0, csize = 0;</div><div class='hunk'>@@ -286,6 +288,9 @@ int module_finalize(const Elf_Ehdr *hdr,</div><div class='ctx'> 		void *rseg = (void *)retpolines-&gt;sh_addr;</div><div class='ctx'> 		apply_retpolines(rseg, rseg + retpolines-&gt;sh_size);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	its_fini_mod(me);</div><div class='add'>+</div><div class='ctx'> 	if (returns) {</div><div class='ctx'> 		void *rseg = (void *)returns-&gt;sh_addr;</div><div class='ctx'> 		apply_returns(rseg, rseg + returns-&gt;sh_size);</div><div class='hunk'>@@ -326,4 +331,5 @@ int module_finalize(const Elf_Ehdr *hdr,</div><div class='ctx'> void module_arch_cleanup(struct module *mod)</div><div class='ctx'> {</div><div class='ctx'> 	alternatives_smp_module_del(mod);</div><div class='add'>+	its_free_mod(mod);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c<br/>index 9a95d00f1423..be93ec7255bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/nmi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/nmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/nmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/nmi.c</a></div><div class='hunk'>@@ -49,27 +49,20 @@ struct nmi_desc {</div><div class='ctx'> 	struct list_head head;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct nmi_desc nmi_desc[NMI_MAX] = </div><div class='del'>-{</div><div class='del'>-	{</div><div class='del'>-		.lock = __RAW_SPIN_LOCK_UNLOCKED(&amp;nmi_desc[0].lock),</div><div class='del'>-		.head = LIST_HEAD_INIT(nmi_desc[0].head),</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.lock = __RAW_SPIN_LOCK_UNLOCKED(&amp;nmi_desc[1].lock),</div><div class='del'>-		.head = LIST_HEAD_INIT(nmi_desc[1].head),</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.lock = __RAW_SPIN_LOCK_UNLOCKED(&amp;nmi_desc[2].lock),</div><div class='del'>-		.head = LIST_HEAD_INIT(nmi_desc[2].head),</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.lock = __RAW_SPIN_LOCK_UNLOCKED(&amp;nmi_desc[3].lock),</div><div class='del'>-		.head = LIST_HEAD_INIT(nmi_desc[3].head),</div><div class='del'>-	},</div><div class='add'>+#define NMI_DESC_INIT(type) { \</div><div class='add'>+	.lock = __RAW_SPIN_LOCK_UNLOCKED(&amp;nmi_desc[type].lock), \</div><div class='add'>+	.head = LIST_HEAD_INIT(nmi_desc[type].head), \</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static struct nmi_desc nmi_desc[NMI_MAX] = {</div><div class='add'>+	NMI_DESC_INIT(NMI_LOCAL),</div><div class='add'>+	NMI_DESC_INIT(NMI_UNKNOWN),</div><div class='add'>+	NMI_DESC_INIT(NMI_SERR),</div><div class='add'>+	NMI_DESC_INIT(NMI_IO_CHECK),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define nmi_to_desc(type) (&amp;nmi_desc[type])</div><div class='add'>+</div><div class='ctx'> struct nmi_stats {</div><div class='ctx'> 	unsigned int normal;</div><div class='ctx'> 	unsigned int unknown;</div><div class='hunk'>@@ -91,6 +84,9 @@ static DEFINE_PER_CPU(struct nmi_stats, nmi_stats);</div><div class='ctx'> static int ignore_nmis __read_mostly;</div><div class='ctx'> </div><div class='ctx'> int unknown_nmi_panic;</div><div class='add'>+int panic_on_unrecovered_nmi;</div><div class='add'>+int panic_on_io_nmi;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Prevent NMI reason port (0x61) being accessed simultaneously, can</div><div class='ctx'>  * only be used in NMI handler.</div><div class='hunk'>@@ -104,8 +100,6 @@ static int __init setup_unknown_nmi_panic(char *str)</div><div class='ctx'> }</div><div class='ctx'> __setup("unknown_nmi_panic", setup_unknown_nmi_panic);</div><div class='ctx'> </div><div class='del'>-#define nmi_to_desc(type) (&amp;nmi_desc[type])</div><div class='del'>-</div><div class='ctx'> static u64 nmi_longest_ns = 1 * NSEC_PER_MSEC;</div><div class='ctx'> </div><div class='ctx'> static int __init nmi_warning_debugfs(void)</div><div class='hunk'>@@ -125,12 +119,12 @@ static void nmi_check_duration(struct nmiaction *action, u64 duration)</div><div class='ctx'> </div><div class='ctx'> 	action-&gt;max_duration = duration;</div><div class='ctx'> </div><div class='del'>-	remainder_ns = do_div(duration, (1000 * 1000));</div><div class='del'>-	decimal_msecs = remainder_ns / 1000;</div><div class='add'>+	/* Convert duration from nsec to msec */</div><div class='add'>+	remainder_ns = do_div(duration, NSEC_PER_MSEC);</div><div class='add'>+	decimal_msecs = remainder_ns / NSEC_PER_USEC;</div><div class='ctx'> </div><div class='del'>-	printk_ratelimited(KERN_INFO</div><div class='del'>-		"INFO: NMI handler (%ps) took too long to run: %lld.%03d msecs\n",</div><div class='del'>-		action-&gt;handler, duration, decimal_msecs);</div><div class='add'>+	pr_info_ratelimited("INFO: NMI handler (%ps) took too long to run: %lld.%03d msecs\n",</div><div class='add'>+			    action-&gt;handler, duration, decimal_msecs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nmi_handle(unsigned int type, struct pt_regs *regs)</div><div class='hunk'>@@ -333,10 +327,9 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)</div><div class='ctx'> 	int handled;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Use 'false' as back-to-back NMIs are dealt with one level up.</div><div class='del'>-	 * Of course this makes having multiple 'unknown' handlers useless</div><div class='del'>-	 * as only the first one is ever run (unless it can actually determine</div><div class='del'>-	 * if it caused the NMI)</div><div class='add'>+	 * As a last resort, let the "unknown" handlers make a</div><div class='add'>+	 * best-effort attempt to figure out if they can claim</div><div class='add'>+	 * responsibility for this Unknown NMI.</div><div class='ctx'> 	 */</div><div class='ctx'> 	handled = nmi_handle(NMI_UNKNOWN, regs);</div><div class='ctx'> 	if (handled) {</div><div class='hunk'>@@ -366,17 +359,18 @@ static noinstr void default_do_nmi(struct pt_regs *regs)</div><div class='ctx'> 	bool b2b = false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * CPU-specific NMI must be processed before non-CPU-specific</div><div class='del'>-	 * NMI, otherwise we may lose it, because the CPU-specific</div><div class='del'>-	 * NMI can not be detected/processed on other CPUs.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Back-to-back NMIs are interesting because they can either</div><div class='del'>-	 * be two NMI or more than two NMIs (any thing over two is dropped</div><div class='del'>-	 * due to NMI being edge-triggered).  If this is the second half</div><div class='del'>-	 * of the back-to-back NMI, assume we dropped things and process</div><div class='del'>-	 * more handlers.  Otherwise reset the 'swallow' NMI behaviour</div><div class='add'>+	 * Back-to-back NMIs are detected by comparing the RIP of the</div><div class='add'>+	 * current NMI with that of the previous NMI. If it is the same,</div><div class='add'>+	 * it is assumed that the CPU did not have a chance to jump back</div><div class='add'>+	 * into a non-NMI context and execute code in between the two</div><div class='add'>+	 * NMIs.</div><div class='add'>+	 *</div><div class='add'>+	 * They are interesting because even if there are more than two,</div><div class='add'>+	 * only a maximum of two can be detected (anything over two is</div><div class='add'>+	 * dropped due to NMI being edge-triggered). If this is the</div><div class='add'>+	 * second half of the back-to-back NMI, assume we dropped things</div><div class='add'>+	 * and process more handlers. Otherwise, reset the 'swallow' NMI</div><div class='add'>+	 * behavior.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (regs-&gt;ip == __this_cpu_read(last_nmi_rip))</div><div class='ctx'> 		b2b = true;</div><div class='hunk'>@@ -390,6 +384,11 @@ static noinstr void default_do_nmi(struct pt_regs *regs)</div><div class='ctx'> 	if (microcode_nmi_handler_enabled() &amp;&amp; microcode_nmi_handler())</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * CPU-specific NMI must be processed before non-CPU-specific</div><div class='add'>+	 * NMI, otherwise we may lose it, because the CPU-specific</div><div class='add'>+	 * NMI can not be detected/processed on other CPUs.</div><div class='add'>+	 */</div><div class='ctx'> 	handled = nmi_handle(NMI_LOCAL, regs);</div><div class='ctx'> 	__this_cpu_add(nmi_stats.normal, handled);</div><div class='ctx'> 	if (handled) {</div><div class='hunk'>@@ -426,13 +425,14 @@ static noinstr void default_do_nmi(struct pt_regs *regs)</div><div class='ctx'> 			pci_serr_error(reason, regs);</div><div class='ctx'> 		else if (reason &amp; NMI_REASON_IOCHK)</div><div class='ctx'> 			io_check_error(reason, regs);</div><div class='del'>-#ifdef CONFIG_X86_32</div><div class='add'>+</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Reassert NMI in case it became active</div><div class='ctx'> 		 * meanwhile as it's edge-triggered:</div><div class='ctx'> 		 */</div><div class='del'>-		reassert_nmi();</div><div class='del'>-#endif</div><div class='add'>+		if (IS_ENABLED(CONFIG_X86_32))</div><div class='add'>+			reassert_nmi();</div><div class='add'>+</div><div class='ctx'> 		__this_cpu_add(nmi_stats.external, 1);</div><div class='ctx'> 		raw_spin_unlock(&amp;nmi_reason_lock);</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -751,4 +751,3 @@ void local_touch_nmi(void)</div><div class='ctx'> {</div><div class='ctx'> 	__this_cpu_write(last_nmi_rip, 0);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(local_touch_nmi);</div><div class='head'>diff --git a/arch/x86/kernel/nmi_selftest.c b/arch/x86/kernel/nmi_selftest.c<br/>index e93a8545c74d..a010e9d062bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/nmi_selftest.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/nmi_selftest.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/nmi_selftest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/nmi_selftest.c</a></div><div class='hunk'>@@ -1,7 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /*</div><div class='del'>- * arch/x86/kernel/nmi-selftest.c</div><div class='del'>- *</div><div class='ctx'>  * Testsuite for NMI: IPIs</div><div class='ctx'>  *</div><div class='ctx'>  * Started by Don Zickus:</div><div class='hunk'>@@ -30,7 +28,6 @@ static DECLARE_BITMAP(nmi_ipi_mask, NR_CPUS) __initdata;</div><div class='ctx'> </div><div class='ctx'> static int __initdata testcase_total;</div><div class='ctx'> static int __initdata testcase_successes;</div><div class='del'>-static int __initdata expected_testcase_failures;</div><div class='ctx'> static int __initdata unexpected_testcase_failures;</div><div class='ctx'> static int __initdata unexpected_testcase_unknowns;</div><div class='ctx'> </div><div class='hunk'>@@ -120,26 +117,22 @@ static void __init dotest(void (*testcase_fn)(void), int expected)</div><div class='ctx'> 		unexpected_testcase_failures++;</div><div class='ctx'> </div><div class='ctx'> 		if (nmi_fail == FAILURE)</div><div class='del'>-			printk(KERN_CONT "FAILED |");</div><div class='add'>+			pr_cont("FAILED |");</div><div class='ctx'> 		else if (nmi_fail == TIMEOUT)</div><div class='del'>-			printk(KERN_CONT "TIMEOUT|");</div><div class='add'>+			pr_cont("TIMEOUT|");</div><div class='ctx'> 		else</div><div class='del'>-			printk(KERN_CONT "ERROR  |");</div><div class='add'>+			pr_cont("ERROR  |");</div><div class='ctx'> 		dump_stack();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		testcase_successes++;</div><div class='del'>-		printk(KERN_CONT "  ok  |");</div><div class='add'>+		pr_cont("  ok  |");</div><div class='ctx'> 	}</div><div class='del'>-	testcase_total++;</div><div class='add'>+	pr_cont("\n");</div><div class='ctx'> </div><div class='add'>+	testcase_total++;</div><div class='ctx'> 	reset_nmi();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void __init print_testname(const char *testname)</div><div class='del'>-{</div><div class='del'>-	printk("%12s:", testname);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void __init nmi_selftest(void)</div><div class='ctx'> {</div><div class='ctx'> 	init_nmi_testsuite();</div><div class='hunk'>@@ -147,38 +140,25 @@ void __init nmi_selftest(void)</div><div class='ctx'>         /*</div><div class='ctx'> 	 * Run the testsuite:</div><div class='ctx'> 	 */</div><div class='del'>-	printk("----------------\n");</div><div class='del'>-	printk("| NMI testsuite:\n");</div><div class='del'>-	printk("--------------------\n");</div><div class='add'>+	pr_info("----------------\n");</div><div class='add'>+	pr_info("| NMI testsuite:\n");</div><div class='add'>+	pr_info("--------------------\n");</div><div class='ctx'> </div><div class='del'>-	print_testname("remote IPI");</div><div class='add'>+	pr_info("%12s:", "remote IPI");</div><div class='ctx'> 	dotest(remote_ipi, SUCCESS);</div><div class='del'>-	printk(KERN_CONT "\n");</div><div class='del'>-	print_testname("local IPI");</div><div class='add'>+</div><div class='add'>+	pr_info("%12s:", "local IPI");</div><div class='ctx'> 	dotest(local_ipi, SUCCESS);</div><div class='del'>-	printk(KERN_CONT "\n");</div><div class='ctx'> </div><div class='ctx'> 	cleanup_nmi_testsuite();</div><div class='ctx'> </div><div class='add'>+	pr_info("--------------------\n");</div><div class='ctx'> 	if (unexpected_testcase_failures) {</div><div class='del'>-		printk("--------------------\n");</div><div class='del'>-		printk("BUG: %3d unexpected failures (out of %3d) - debugging disabled! |\n",</div><div class='add'>+		pr_info("BUG: %3d unexpected failures (out of %3d) - debugging disabled! |\n",</div><div class='ctx'> 			unexpected_testcase_failures, testcase_total);</div><div class='del'>-		printk("-----------------------------------------------------------------\n");</div><div class='del'>-	} else if (expected_testcase_failures &amp;&amp; testcase_successes) {</div><div class='del'>-		printk("--------------------\n");</div><div class='del'>-		printk("%3d out of %3d testcases failed, as expected. |\n",</div><div class='del'>-			expected_testcase_failures, testcase_total);</div><div class='del'>-		printk("----------------------------------------------------\n");</div><div class='del'>-	} else if (expected_testcase_failures &amp;&amp; !testcase_successes) {</div><div class='del'>-		printk("--------------------\n");</div><div class='del'>-		printk("All %3d testcases failed, as expected. |\n",</div><div class='del'>-			expected_testcase_failures);</div><div class='del'>-		printk("----------------------------------------\n");</div><div class='ctx'> 	} else {</div><div class='del'>-		printk("--------------------\n");</div><div class='del'>-		printk("Good, all %3d testcases passed! |\n",</div><div class='add'>+		pr_info("Good, all %3d testcases passed! |\n",</div><div class='ctx'> 			testcase_successes);</div><div class='del'>-		printk("---------------------------------\n");</div><div class='ctx'> 	}</div><div class='add'>+	pr_info("-----------------------------------------------------------------\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c<br/>index 1ccd05d8999f..ab3e172dcc69 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/paravirt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/paravirt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/paravirt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/paravirt.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='ctx'> #include &lt;asm/io_bitmap.h&gt;</div><div class='ctx'> #include &lt;asm/gsseg.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* stub always returning 0. */</div><div class='ctx'> DEFINE_ASM_FUNC(paravirt_ret0, "xor %eax,%eax", .entry.text);</div><div class='hunk'>@@ -210,12 +211,10 @@ struct paravirt_patch_template pv_ops = {</div><div class='ctx'> </div><div class='ctx'> 	.mmu.set_p4d		= native_set_p4d,</div><div class='ctx'> </div><div class='del'>-#if CONFIG_PGTABLE_LEVELS &gt;= 5</div><div class='ctx'> 	.mmu.p4d_val		= PTE_IDENT,</div><div class='ctx'> 	.mmu.make_p4d		= PTE_IDENT,</div><div class='ctx'> </div><div class='ctx'> 	.mmu.set_pgd		= native_set_pgd,</div><div class='del'>-#endif /* CONFIG_PGTABLE_LEVELS &gt;= 5 */</div><div class='ctx'> </div><div class='ctx'> 	.mmu.pte_val		= PTE_IDENT,</div><div class='ctx'> 	.mmu.pgd_val		= PTE_IDENT,</div><div class='head'>diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c<br/>index 962c3ce39323..c1d2dac72b9c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/process.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/process.c</a></div><div class='hunk'>@@ -30,7 +30,7 @@</div><div class='ctx'> #include &lt;linux/hw_breakpoint.h&gt;</div><div class='ctx'> #include &lt;linux/entry-common.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='hunk'>@@ -52,6 +52,7 @@</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> #include &lt;asm/tdx.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/shstk.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "process.h"</div><div class='hunk'>@@ -93,17 +94,12 @@ EXPORT_PER_CPU_SYMBOL_GPL(__tss_limit_invalid);</div><div class='ctx'>  */</div><div class='ctx'> int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> {</div><div class='del'>-	/* init_task is not dynamically sized (incomplete FPU state) */</div><div class='del'>-	if (unlikely(src == &amp;init_task))</div><div class='del'>-		memcpy_and_pad(dst, arch_task_struct_size, src, sizeof(init_task), 0);</div><div class='del'>-	else</div><div class='del'>-		memcpy(dst, src, arch_task_struct_size);</div><div class='add'>+	/* fpu_clone() will initialize the "dst_fpu" memory */</div><div class='add'>+	memcpy_and_pad(dst, arch_task_struct_size, src, sizeof(*dst), 0);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_VM86</div><div class='ctx'> 	dst-&gt;thread.vm86 = NULL;</div><div class='ctx'> #endif</div><div class='del'>-	/* Drop the copied pointer to current's fpstate */</div><div class='del'>-	dst-&gt;thread.fpu.fpstate = NULL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -111,8 +107,8 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> void arch_release_task_struct(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='del'>-	if (fpu_state_size_dynamic())</div><div class='del'>-		fpstate_free(&amp;tsk-&gt;thread.fpu);</div><div class='add'>+	if (fpu_state_size_dynamic() &amp;&amp; !(tsk-&gt;flags &amp; (PF_KTHREAD | PF_USER_WORKER)))</div><div class='add'>+		fpstate_free(x86_task_fpu(tsk));</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -122,7 +118,6 @@ void arch_release_task_struct(struct task_struct *tsk)</div><div class='ctx'> void exit_thread(struct task_struct *tsk)</div><div class='ctx'> {</div><div class='ctx'> 	struct thread_struct *t = &amp;tsk-&gt;thread;</div><div class='del'>-	struct fpu *fpu = &amp;t-&gt;fpu;</div><div class='ctx'> </div><div class='ctx'> 	if (test_thread_flag(TIF_IO_BITMAP))</div><div class='ctx'> 		io_bitmap_exit(tsk);</div><div class='hunk'>@@ -130,7 +125,7 @@ void exit_thread(struct task_struct *tsk)</div><div class='ctx'> 	free_vm86(t);</div><div class='ctx'> </div><div class='ctx'> 	shstk_free(tsk);</div><div class='del'>-	fpu__drop(fpu);</div><div class='add'>+	fpu__drop(tsk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int set_new_tls(struct task_struct *p, unsigned long tls)</div><div class='hunk'>@@ -344,7 +339,7 @@ static void set_cpuid_faulting(bool on)</div><div class='ctx'> 	msrval &amp;= ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT;</div><div class='ctx'> 	msrval |= (on &lt;&lt; MSR_MISC_FEATURES_ENABLES_CPUID_FAULT_BIT);</div><div class='ctx'> 	this_cpu_write(msr_misc_features_shadow, msrval);</div><div class='del'>-	wrmsrl(MSR_MISC_FEATURES_ENABLES, msrval);</div><div class='add'>+	wrmsrq(MSR_MISC_FEATURES_ENABLES, msrval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void disable_cpuid(void)</div><div class='hunk'>@@ -561,7 +556,7 @@ static __always_inline void amd_set_core_ssb_state(unsigned long tifn)</div><div class='ctx'> </div><div class='ctx'> 	if (!static_cpu_has(X86_FEATURE_ZEN)) {</div><div class='ctx'> 		msr |= ssbd_tif_to_amd_ls_cfg(tifn);</div><div class='del'>-		wrmsrl(MSR_AMD64_LS_CFG, msr);</div><div class='add'>+		wrmsrq(MSR_AMD64_LS_CFG, msr);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -578,7 +573,7 @@ static __always_inline void amd_set_core_ssb_state(unsigned long tifn)</div><div class='ctx'> 		raw_spin_lock(&amp;st-&gt;shared_state-&gt;lock);</div><div class='ctx'> 		/* First sibling enables SSBD: */</div><div class='ctx'> 		if (!st-&gt;shared_state-&gt;disable_state)</div><div class='del'>-			wrmsrl(MSR_AMD64_LS_CFG, msr);</div><div class='add'>+			wrmsrq(MSR_AMD64_LS_CFG, msr);</div><div class='ctx'> 		st-&gt;shared_state-&gt;disable_state++;</div><div class='ctx'> 		raw_spin_unlock(&amp;st-&gt;shared_state-&gt;lock);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -588,7 +583,7 @@ static __always_inline void amd_set_core_ssb_state(unsigned long tifn)</div><div class='ctx'> 		raw_spin_lock(&amp;st-&gt;shared_state-&gt;lock);</div><div class='ctx'> 		st-&gt;shared_state-&gt;disable_state--;</div><div class='ctx'> 		if (!st-&gt;shared_state-&gt;disable_state)</div><div class='del'>-			wrmsrl(MSR_AMD64_LS_CFG, msr);</div><div class='add'>+			wrmsrq(MSR_AMD64_LS_CFG, msr);</div><div class='ctx'> 		raw_spin_unlock(&amp;st-&gt;shared_state-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -597,7 +592,7 @@ static __always_inline void amd_set_core_ssb_state(unsigned long tifn)</div><div class='ctx'> {</div><div class='ctx'> 	u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_AMD64_LS_CFG, msr);</div><div class='add'>+	wrmsrq(MSR_AMD64_LS_CFG, msr);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -607,7 +602,7 @@ static __always_inline void amd_set_ssb_virt_state(unsigned long tifn)</div><div class='ctx'> 	 * SSBD has the same definition in SPEC_CTRL and VIRT_SPEC_CTRL,</div><div class='ctx'> 	 * so ssbd_tif_to_spec_ctrl() just works.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn));</div><div class='add'>+	wrmsrq(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -710,11 +705,11 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	    arch_has_block_step()) {</div><div class='ctx'> 		unsigned long debugctl, msk;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+		rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> 		debugctl &amp;= ~DEBUGCTLMSR_BTF;</div><div class='ctx'> 		msk = tifn &amp; _TIF_BLOCKSTEP;</div><div class='ctx'> 		debugctl |= (msk &gt;&gt; TIF_BLOCKSTEP) &lt;&lt; DEBUGCTLMSR_BTF_SHIFT;</div><div class='del'>-		wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+		wrmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((tifp ^ tifn) &amp; _TIF_NOTSC)</div><div class='hunk'>@@ -907,13 +902,10 @@ static __init bool prefer_mwait_c1_over_halt(void)</div><div class='ctx'> static __cpuidle void mwait_idle(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (!current_set_polling_and_test()) {</div><div class='del'>-		if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) {</div><div class='del'>-			mb(); /* quirk */</div><div class='del'>-			clflush((void *)&amp;current_thread_info()-&gt;flags);</div><div class='del'>-			mb(); /* quirk */</div><div class='del'>-		}</div><div class='add'>+		const void *addr = &amp;current_thread_info()-&gt;flags;</div><div class='ctx'> </div><div class='del'>-		__monitor((void *)&amp;current_thread_info()-&gt;flags, 0, 0);</div><div class='add'>+		alternative_input("", "clflush (%[addr])", X86_BUG_CLFLUSH_MONITOR, [addr] "a" (addr));</div><div class='add'>+		__monitor(addr, 0, 0);</div><div class='ctx'> 		if (!need_resched()) {</div><div class='ctx'> 			__sti_mwait(0, 0);</div><div class='ctx'> 			raw_local_irq_disable();</div><div class='head'>diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c<br/>index 4636ef359973..a10e180cbf23 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/process_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/process_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/process_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/process_32.c</a></div><div class='hunk'>@@ -160,8 +160,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> </div><div class='ctx'> 	/* never put a printk in __switch_to... printk() calls wake_up*() indirectly */</div><div class='ctx'> </div><div class='del'>-	if (!test_tsk_thread_flag(prev_p, TIF_NEED_FPU_LOAD))</div><div class='del'>-		switch_fpu_prepare(prev_p, cpu);</div><div class='add'>+	switch_fpu(prev_p, cpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Save away %gs. No need to save %fs, as it was saved on the</div><div class='hunk'>@@ -208,10 +207,8 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> </div><div class='ctx'> 	raw_cpu_write(current_task, next_p);</div><div class='ctx'> </div><div class='del'>-	switch_fpu_finish(next_p);</div><div class='del'>-</div><div class='ctx'> 	/* Load the Intel cache allocation PQR MSR. */</div><div class='del'>-	resctrl_sched_in(next_p);</div><div class='add'>+	resctrl_arch_sched_in(next_p);</div><div class='ctx'> </div><div class='ctx'> 	return prev_p;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c<br/>index 7196ca7048be..8d6cf25127aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/process_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/process_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/process_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/process_64.c</a></div><div class='hunk'>@@ -57,6 +57,7 @@</div><div class='ctx'> #include &lt;asm/unistd.h&gt;</div><div class='ctx'> #include &lt;asm/fsgsbase.h&gt;</div><div class='ctx'> #include &lt;asm/fred.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #ifdef CONFIG_IA32_EMULATION</div><div class='ctx'> /* Not included via unistd.h */</div><div class='ctx'> #include &lt;asm/unistd_32_ia32.h&gt;</div><div class='hunk'>@@ -95,8 +96,8 @@ void __show_regs(struct pt_regs *regs, enum show_regs_mode mode,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (mode == SHOW_REGS_USER) {</div><div class='del'>-		rdmsrl(MSR_FS_BASE, fs);</div><div class='del'>-		rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);</div><div class='add'>+		rdmsrq(MSR_FS_BASE, fs);</div><div class='add'>+		rdmsrq(MSR_KERNEL_GS_BASE, shadowgs);</div><div class='ctx'> 		printk("%sFS:  %016lx GS:  %016lx\n",</div><div class='ctx'> 		       log_lvl, fs, shadowgs);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -107,9 +108,9 @@ void __show_regs(struct pt_regs *regs, enum show_regs_mode mode,</div><div class='ctx'> 	asm("movl %%fs,%0" : "=r" (fsindex));</div><div class='ctx'> 	asm("movl %%gs,%0" : "=r" (gsindex));</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_FS_BASE, fs);</div><div class='del'>-	rdmsrl(MSR_GS_BASE, gs);</div><div class='del'>-	rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);</div><div class='add'>+	rdmsrq(MSR_FS_BASE, fs);</div><div class='add'>+	rdmsrq(MSR_GS_BASE, gs);</div><div class='add'>+	rdmsrq(MSR_KERNEL_GS_BASE, shadowgs);</div><div class='ctx'> </div><div class='ctx'> 	cr0 = read_cr0();</div><div class='ctx'> 	cr2 = read_cr2();</div><div class='hunk'>@@ -195,7 +196,7 @@ static noinstr unsigned long __rdgsbase_inactive(void)</div><div class='ctx'> 		native_swapgs();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		instrumentation_begin();</div><div class='del'>-		rdmsrl(MSR_KERNEL_GS_BASE, gsbase);</div><div class='add'>+		rdmsrq(MSR_KERNEL_GS_BASE, gsbase);</div><div class='ctx'> 		instrumentation_end();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -221,7 +222,7 @@ static noinstr void __wrgsbase_inactive(unsigned long gsbase)</div><div class='ctx'> 		native_swapgs();</div><div class='ctx'> 	} else {</div><div class='ctx'> 		instrumentation_begin();</div><div class='del'>-		wrmsrl(MSR_KERNEL_GS_BASE, gsbase);</div><div class='add'>+		wrmsrq(MSR_KERNEL_GS_BASE, gsbase);</div><div class='ctx'> 		instrumentation_end();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -353,7 +354,7 @@ static __always_inline void load_seg_legacy(unsigned short prev_index,</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (prev_index != next_index)</div><div class='ctx'> 				loadseg(which, next_index);</div><div class='del'>-			wrmsrl(which == FS ? MSR_FS_BASE : MSR_KERNEL_GS_BASE,</div><div class='add'>+			wrmsrq(which == FS ? MSR_FS_BASE : MSR_KERNEL_GS_BASE,</div><div class='ctx'> 			       next_base);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -463,7 +464,7 @@ unsigned long x86_gsbase_read_cpu_inactive(void)</div><div class='ctx'> 		gsbase = __rdgsbase_inactive();</div><div class='ctx'> 		local_irq_restore(flags);</div><div class='ctx'> 	} else {</div><div class='del'>-		rdmsrl(MSR_KERNEL_GS_BASE, gsbase);</div><div class='add'>+		rdmsrq(MSR_KERNEL_GS_BASE, gsbase);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return gsbase;</div><div class='hunk'>@@ -478,7 +479,7 @@ void x86_gsbase_write_cpu_inactive(unsigned long gsbase)</div><div class='ctx'> 		__wrgsbase_inactive(gsbase);</div><div class='ctx'> 		local_irq_restore(flags);</div><div class='ctx'> 	} else {</div><div class='del'>-		wrmsrl(MSR_KERNEL_GS_BASE, gsbase);</div><div class='add'>+		wrmsrq(MSR_KERNEL_GS_BASE, gsbase);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -616,8 +617,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	WARN_ON_ONCE(IS_ENABLED(CONFIG_DEBUG_ENTRY) &amp;&amp;</div><div class='ctx'> 		     this_cpu_read(hardirq_stack_inuse));</div><div class='ctx'> </div><div class='del'>-	if (!test_tsk_thread_flag(prev_p, TIF_NEED_FPU_LOAD))</div><div class='del'>-		switch_fpu_prepare(prev_p, cpu);</div><div class='add'>+	switch_fpu(prev_p, cpu);</div><div class='ctx'> </div><div class='ctx'> 	/* We must save %fs and %gs before load_TLS() because</div><div class='ctx'> 	 * %fs and %gs may be cleared by load_TLS().</div><div class='hunk'>@@ -671,8 +671,6 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	raw_cpu_write(current_task, next_p);</div><div class='ctx'> 	raw_cpu_write(cpu_current_top_of_stack, task_top_of_stack(next_p));</div><div class='ctx'> </div><div class='del'>-	switch_fpu_finish(next_p);</div><div class='del'>-</div><div class='ctx'> 	/* Reload sp0. */</div><div class='ctx'> 	update_task_stack(next_p);</div><div class='ctx'> </div><div class='hunk'>@@ -707,7 +705,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Load the Intel cache allocation PQR MSR. */</div><div class='del'>-	resctrl_sched_in(next_p);</div><div class='add'>+	resctrl_arch_sched_in(next_p);</div><div class='ctx'> </div><div class='ctx'> 	return prev_p;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c<br/>index b7c0f142d026..4679ac0a03eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/reboot_fixups_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/reboot_fixups_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/reboot_fixups_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/reboot_fixups_32.c</a></div><div class='hunk'>@@ -27,7 +27,7 @@ static void cs5530a_warm_reset(struct pci_dev *dev)</div><div class='ctx'> static void cs5536_warm_reset(struct pci_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	/* writing 1 to the LSB of this MSR causes a hard reset */</div><div class='del'>-	wrmsrl(MSR_DIVIL_SOFT_RESET, 1ULL);</div><div class='add'>+	wrmsrq(MSR_DIVIL_SOFT_RESET, 1ULL);</div><div class='ctx'> 	udelay(50); /* shouldn't get here but be safe and spin a while */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S<br/>index c7c4b1917336..57276f134d12 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/relocate_kernel_32.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/relocate_kernel_32.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/relocate_kernel_32.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/relocate_kernel_32.S</a></div><div class='hunk'>@@ -263,17 +263,17 @@ SYM_CODE_START_LOCAL_NOALIGN(swap_pages)</div><div class='ctx'> </div><div class='ctx'> 	movl	%edx, %edi</div><div class='ctx'> 	movl    $1024, %ecx</div><div class='del'>-	rep ; movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> </div><div class='ctx'> 	movl	%ebp, %edi</div><div class='ctx'> 	movl	%eax, %esi</div><div class='ctx'> 	movl	$1024, %ecx</div><div class='del'>-	rep ; movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> </div><div class='ctx'> 	movl	%eax, %edi</div><div class='ctx'> 	movl	%edx, %esi</div><div class='ctx'> 	movl	$1024, %ecx</div><div class='del'>-	rep ; movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> </div><div class='ctx'> 	lea	PAGE_SIZE(%ebp), %esi</div><div class='ctx'> 	jmp     0b</div><div class='head'>diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S<br/>index ac058971a382..ea604f4d0b52 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/relocate_kernel_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/relocate_kernel_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/relocate_kernel_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/relocate_kernel_64.S</a></div><div class='hunk'>@@ -39,6 +39,8 @@ SYM_DATA(kexec_va_control_page, .quad 0)</div><div class='ctx'> SYM_DATA(kexec_pa_table_page, .quad 0)</div><div class='ctx'> SYM_DATA(kexec_pa_swap_page, .quad 0)</div><div class='ctx'> SYM_DATA_LOCAL(pa_backup_pages_map, .quad 0)</div><div class='add'>+SYM_DATA(kexec_debug_8250_mmio32, .quad 0)</div><div class='add'>+SYM_DATA(kexec_debug_8250_port, .word 0)</div><div class='ctx'> </div><div class='ctx'> 	.balign 16</div><div class='ctx'> SYM_DATA_START_LOCAL(kexec_debug_gdt)</div><div class='hunk'>@@ -50,6 +52,11 @@ SYM_DATA_START_LOCAL(kexec_debug_gdt)</div><div class='ctx'> 	.quad   0x00cf92000000ffff      /* __KERNEL_DS */</div><div class='ctx'> SYM_DATA_END_LABEL(kexec_debug_gdt, SYM_L_LOCAL, kexec_debug_gdt_end)</div><div class='ctx'> </div><div class='add'>+	.balign 8</div><div class='add'>+SYM_DATA_START(kexec_debug_idt)</div><div class='add'>+	.skip 0x100, 0x00</div><div class='add'>+SYM_DATA_END(kexec_debug_idt)</div><div class='add'>+</div><div class='ctx'> 	.section .text..relocate_kernel,"ax";</div><div class='ctx'> 	.code64</div><div class='ctx'> SYM_CODE_START_NOALIGN(relocate_kernel)</div><div class='hunk'>@@ -72,8 +79,13 @@ SYM_CODE_START_NOALIGN(relocate_kernel)</div><div class='ctx'> 	pushq %r15</div><div class='ctx'> 	pushf</div><div class='ctx'> </div><div class='del'>-	/* zero out flags, and disable interrupts */</div><div class='del'>-	pushq $0</div><div class='add'>+	/* Invalidate GDT/IDT, zero out flags */</div><div class='add'>+	pushq	$0</div><div class='add'>+	pushq	$0</div><div class='add'>+</div><div class='add'>+	lidt	(%rsp)</div><div class='add'>+	lgdt	(%rsp)</div><div class='add'>+	addq	$8, %rsp</div><div class='ctx'> 	popfq</div><div class='ctx'> </div><div class='ctx'> 	/* Switch to the identity mapped page tables */</div><div class='hunk'>@@ -139,6 +151,15 @@ SYM_CODE_START_LOCAL_NOALIGN(identity_mapped)</div><div class='ctx'> 	movq	%ds, %rax</div><div class='ctx'> 	movq	%rax, %ds</div><div class='ctx'> </div><div class='add'>+	/* Now an IDTR on the stack to load the IDT the kernel created */</div><div class='add'>+	leaq	kexec_debug_idt(%rip), %rsi</div><div class='add'>+	pushq	%rsi</div><div class='add'>+	pushw	$0xff</div><div class='add'>+	lidt	(%rsp)</div><div class='add'>+	addq	$10, %rsp</div><div class='add'>+</div><div class='add'>+	//int3</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear X86_CR4_CET (if it was set) such that we can clear CR0_WP</div><div class='ctx'> 	 * below.</div><div class='hunk'>@@ -342,20 +363,20 @@ SYM_CODE_START_LOCAL_NOALIGN(swap_pages)</div><div class='ctx'> 	/* copy source page to swap page */</div><div class='ctx'> 	movq	kexec_pa_swap_page(%rip), %rdi</div><div class='ctx'> 	movl	$512, %ecx</div><div class='del'>-	rep ; movsq</div><div class='add'>+	rep movsq</div><div class='ctx'> </div><div class='ctx'> 	/* copy destination page to source page */</div><div class='ctx'> 	movq	%rax, %rdi</div><div class='ctx'> 	movq	%rdx, %rsi</div><div class='ctx'> 	movl	$512, %ecx</div><div class='del'>-	rep ; movsq</div><div class='add'>+	rep movsq</div><div class='ctx'> </div><div class='ctx'> 	/* copy swap page to destination page */</div><div class='ctx'> 	movq	%rdx, %rdi</div><div class='ctx'> 	movq	kexec_pa_swap_page(%rip), %rsi</div><div class='ctx'> .Lnoswap:</div><div class='ctx'> 	movl	$512, %ecx</div><div class='del'>-	rep ; movsq</div><div class='add'>+	rep movsq</div><div class='ctx'> </div><div class='ctx'> 	lea	PAGE_SIZE(%rax), %rsi</div><div class='ctx'> 	jmp	.Lloop</div><div class='hunk'>@@ -364,3 +385,222 @@ SYM_CODE_START_LOCAL_NOALIGN(swap_pages)</div><div class='ctx'> 	ret</div><div class='ctx'> 	int3</div><div class='ctx'> SYM_CODE_END(swap_pages)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Generic 'print character' routine</div><div class='add'>+ *  - %al: Character to be printed (may clobber %rax)</div><div class='add'>+ *  - %rdx: MMIO address or port.</div><div class='add'>+ */</div><div class='add'>+#define XMTRDY          0x20</div><div class='add'>+</div><div class='add'>+#define TXR             0       /*  Transmit register (WRITE) */</div><div class='add'>+#define LSR             5       /*  Line Status               */</div><div class='add'>+</div><div class='add'>+SYM_CODE_START_LOCAL_NOALIGN(pr_char_8250)</div><div class='add'>+	UNWIND_HINT_FUNC</div><div class='add'>+	ANNOTATE_NOENDBR</div><div class='add'>+	addw	$LSR, %dx</div><div class='add'>+	xchg	%al, %ah</div><div class='add'>+.Lxmtrdy_loop:</div><div class='add'>+	inb	%dx, %al</div><div class='add'>+	testb	$XMTRDY, %al</div><div class='add'>+	jnz	.Lready</div><div class='add'>+	pause</div><div class='add'>+	jmp .Lxmtrdy_loop</div><div class='add'>+</div><div class='add'>+.Lready:</div><div class='add'>+	subw	$LSR, %dx</div><div class='add'>+	xchg	%al, %ah</div><div class='add'>+	outb	%al, %dx</div><div class='add'>+pr_char_null:</div><div class='add'>+	ANNOTATE_NOENDBR</div><div class='add'>+</div><div class='add'>+	ANNOTATE_UNRET_SAFE</div><div class='add'>+	ret</div><div class='add'>+SYM_CODE_END(pr_char_8250)</div><div class='add'>+</div><div class='add'>+SYM_CODE_START_LOCAL_NOALIGN(pr_char_8250_mmio32)</div><div class='add'>+	UNWIND_HINT_FUNC</div><div class='add'>+	ANNOTATE_NOENDBR</div><div class='add'>+.Lxmtrdy_loop_mmio:</div><div class='add'>+	movb	(LSR*4)(%rdx), %ah</div><div class='add'>+	testb	$XMTRDY, %ah</div><div class='add'>+	jnz	.Lready_mmio</div><div class='add'>+	pause</div><div class='add'>+	jmp .Lxmtrdy_loop_mmio</div><div class='add'>+</div><div class='add'>+.Lready_mmio:</div><div class='add'>+	movb	%al, (%rdx)</div><div class='add'>+	ANNOTATE_UNRET_SAFE</div><div class='add'>+	ret</div><div class='add'>+SYM_CODE_END(pr_char_8250_mmio32)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Load pr_char function pointer into %rsi and load %rdx with whatever</div><div class='add'>+ * that function wants to see there (typically port/MMIO address).</div><div class='add'>+ */</div><div class='add'>+.macro pr_setup</div><div class='add'>+	leaq	pr_char_8250(%rip), %rsi</div><div class='add'>+	movw	kexec_debug_8250_port(%rip), %dx</div><div class='add'>+	testw	%dx, %dx</div><div class='add'>+	jnz	1f</div><div class='add'>+</div><div class='add'>+	leaq	pr_char_8250_mmio32(%rip), %rsi</div><div class='add'>+	movq	kexec_debug_8250_mmio32(%rip), %rdx</div><div class='add'>+	testq	%rdx, %rdx</div><div class='add'>+	jnz	1f</div><div class='add'>+</div><div class='add'>+	leaq	pr_char_null(%rip), %rsi</div><div class='add'>+1:</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/* Print the nybble in %bl, clobber %rax */</div><div class='add'>+SYM_CODE_START_LOCAL_NOALIGN(pr_nybble)</div><div class='add'>+	UNWIND_HINT_FUNC</div><div class='add'>+	movb	%bl, %al</div><div class='add'>+	nop</div><div class='add'>+	andb	$0x0f, %al</div><div class='add'>+	addb	$0x30, %al</div><div class='add'>+	cmpb	$0x3a, %al</div><div class='add'>+	jb	1f</div><div class='add'>+	addb	$('a' - '0' - 10), %al</div><div class='add'>+	ANNOTATE_RETPOLINE_SAFE</div><div class='add'>+1:	jmp	*%rsi</div><div class='add'>+SYM_CODE_END(pr_nybble)</div><div class='add'>+</div><div class='add'>+SYM_CODE_START_LOCAL_NOALIGN(pr_qword)</div><div class='add'>+	UNWIND_HINT_FUNC</div><div class='add'>+	movq	$16, %rcx</div><div class='add'>+1:	rolq	$4, %rbx</div><div class='add'>+	call	pr_nybble</div><div class='add'>+	loop	1b</div><div class='add'>+	movb	$'\n', %al</div><div class='add'>+	ANNOTATE_RETPOLINE_SAFE</div><div class='add'>+	jmp	*%rsi</div><div class='add'>+SYM_CODE_END(pr_qword)</div><div class='add'>+</div><div class='add'>+.macro print_reg a, b, c, d, r</div><div class='add'>+	movb	$\a, %al</div><div class='add'>+	ANNOTATE_RETPOLINE_SAFE</div><div class='add'>+	call	*%rsi</div><div class='add'>+	movb	$\b, %al</div><div class='add'>+	ANNOTATE_RETPOLINE_SAFE</div><div class='add'>+	call	*%rsi</div><div class='add'>+	movb	$\c, %al</div><div class='add'>+	ANNOTATE_RETPOLINE_SAFE</div><div class='add'>+	call	*%rsi</div><div class='add'>+	movb	$\d, %al</div><div class='add'>+	ANNOTATE_RETPOLINE_SAFE</div><div class='add'>+	call	*%rsi</div><div class='add'>+	movq	\r, %rbx</div><div class='add'>+	call	pr_qword</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+SYM_CODE_START_NOALIGN(kexec_debug_exc_vectors)</div><div class='add'>+	/* Each of these is 6 bytes. */</div><div class='add'>+.macro vec_err exc</div><div class='add'>+	UNWIND_HINT_ENTRY</div><div class='add'>+	. = kexec_debug_exc_vectors + (\exc * KEXEC_DEBUG_EXC_HANDLER_SIZE)</div><div class='add'>+	nop</div><div class='add'>+	nop</div><div class='add'>+	pushq	$\exc</div><div class='add'>+	jmp	exc_handler</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+.macro vec_noerr exc</div><div class='add'>+	UNWIND_HINT_ENTRY</div><div class='add'>+	. = kexec_debug_exc_vectors + (\exc * KEXEC_DEBUG_EXC_HANDLER_SIZE)</div><div class='add'>+	pushq	$0</div><div class='add'>+	pushq	$\exc</div><div class='add'>+	jmp	exc_handler</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+	ANNOTATE_NOENDBR</div><div class='add'>+	vec_noerr  0 // #DE</div><div class='add'>+	vec_noerr  1 // #DB</div><div class='add'>+	vec_noerr  2 // #NMI</div><div class='add'>+	vec_noerr  3 // #BP</div><div class='add'>+	vec_noerr  4 // #OF</div><div class='add'>+	vec_noerr  5 // #BR</div><div class='add'>+	vec_noerr  6 // #UD</div><div class='add'>+	vec_noerr  7 // #NM</div><div class='add'>+	vec_err    8 // #DF</div><div class='add'>+	vec_noerr  9</div><div class='add'>+	vec_err   10 // #TS</div><div class='add'>+	vec_err   11 // #NP</div><div class='add'>+	vec_err   12 // #SS</div><div class='add'>+	vec_err   13 // #GP</div><div class='add'>+	vec_err   14 // #PF</div><div class='add'>+	vec_noerr 15</div><div class='add'>+SYM_CODE_END(kexec_debug_exc_vectors)</div><div class='add'>+</div><div class='add'>+SYM_CODE_START_LOCAL_NOALIGN(exc_handler)</div><div class='add'>+	/* No need for RET mitigations during kexec */</div><div class='add'>+	VALIDATE_UNRET_END</div><div class='add'>+</div><div class='add'>+	pushq	%rax</div><div class='add'>+	pushq	%rbx</div><div class='add'>+	pushq	%rcx</div><div class='add'>+	pushq	%rdx</div><div class='add'>+	pushq	%rsi</div><div class='add'>+</div><div class='add'>+	/* Stack frame */</div><div class='add'>+#define EXC_SS		0x58 /* Architectural... */</div><div class='add'>+#define EXC_RSP		0x50</div><div class='add'>+#define EXC_EFLAGS	0x48</div><div class='add'>+#define EXC_CS		0x40</div><div class='add'>+#define EXC_RIP		0x38</div><div class='add'>+#define EXC_ERRORCODE	0x30 /* Either architectural or zero pushed by handler */</div><div class='add'>+#define EXC_EXCEPTION	0x28 /* Pushed by handler entry point */</div><div class='add'>+#define EXC_RAX		0x20 /* Pushed just above in exc_handler */</div><div class='add'>+#define EXC_RBX		0x18</div><div class='add'>+#define EXC_RCX		0x10</div><div class='add'>+#define EXC_RDX		0x08</div><div class='add'>+#define EXC_RSI		0x00</div><div class='add'>+</div><div class='add'>+	/* Set up %rdx/%rsi for debug output */</div><div class='add'>+	pr_setup</div><div class='add'>+</div><div class='add'>+	/* rip and exception info */</div><div class='add'>+	print_reg 'E', 'x', 'c', ':', EXC_EXCEPTION(%rsp)</div><div class='add'>+	print_reg 'E', 'r', 'r', ':', EXC_ERRORCODE(%rsp)</div><div class='add'>+	print_reg 'r', 'i', 'p', ':', EXC_RIP(%rsp)</div><div class='add'>+	print_reg 'r', 's', 'p', ':', EXC_RSP(%rsp)</div><div class='add'>+</div><div class='add'>+	/* We spilled these to the stack */</div><div class='add'>+	print_reg 'r', 'a', 'x', ':', EXC_RAX(%rsp)</div><div class='add'>+	print_reg 'r', 'b', 'x', ':', EXC_RBX(%rsp)</div><div class='add'>+	print_reg 'r', 'c', 'x', ':', EXC_RCX(%rsp)</div><div class='add'>+	print_reg 'r', 'd', 'x', ':', EXC_RDX(%rsp)</div><div class='add'>+	print_reg 'r', 's', 'i', ':', EXC_RSI(%rsp)</div><div class='add'>+</div><div class='add'>+	/* Other registers untouched */</div><div class='add'>+	print_reg 'r', 'd', 'i', ':', %rdi</div><div class='add'>+	print_reg 'r', '8', ' ', ':', %r8</div><div class='add'>+	print_reg 'r', '9', ' ', ':', %r9</div><div class='add'>+	print_reg 'r', '1', '0', ':', %r10</div><div class='add'>+	print_reg 'r', '1', '1', ':', %r11</div><div class='add'>+	print_reg 'r', '1', '2', ':', %r12</div><div class='add'>+	print_reg 'r', '1', '3', ':', %r13</div><div class='add'>+	print_reg 'r', '1', '4', ':', %r14</div><div class='add'>+	print_reg 'r', '1', '5', ':', %r15</div><div class='add'>+	print_reg 'c', 'r', '2', ':', %cr2</div><div class='add'>+</div><div class='add'>+	/* Only return from INT3 */</div><div class='add'>+	cmpq	$3, EXC_EXCEPTION(%rsp)</div><div class='add'>+	jne	.Ldie</div><div class='add'>+</div><div class='add'>+	popq	%rsi</div><div class='add'>+	popq	%rdx</div><div class='add'>+	popq	%rcx</div><div class='add'>+	popq	%rbx</div><div class='add'>+	popq	%rax</div><div class='add'>+</div><div class='add'>+	addq	$16, %rsp</div><div class='add'>+	iretq</div><div class='add'>+</div><div class='add'>+.Ldie:</div><div class='add'>+	hlt</div><div class='add'>+	jmp	.Ldie</div><div class='add'>+</div><div class='add'>+SYM_CODE_END(exc_handler)</div><div class='head'>diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c<br/>index 9d2a13b37833..7d9ed79a93c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/setup.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='ctx'> #include &lt;linux/dma-map-ops.h&gt;</div><div class='ctx'> #include &lt;linux/efi.h&gt;</div><div class='add'>+#include &lt;linux/hugetlb.h&gt;</div><div class='ctx'> #include &lt;linux/ima.h&gt;</div><div class='ctx'> #include &lt;linux/init_ohci1394_dma.h&gt;</div><div class='ctx'> #include &lt;linux/initrd.h&gt;</div><div class='hunk'>@@ -18,21 +19,19 @@</div><div class='ctx'> #include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/panic_notifier.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='ctx'> #include &lt;linux/root_dev.h&gt;</div><div class='del'>-#include &lt;linux/hugetlb.h&gt;</div><div class='del'>-#include &lt;linux/tboot.h&gt;</div><div class='del'>-#include &lt;linux/usb/xhci-dbgp.h&gt;</div><div class='ctx'> #include &lt;linux/static_call.h&gt;</div><div class='ctx'> #include &lt;linux/swiotlb.h&gt;</div><div class='del'>-#include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;linux/tboot.h&gt;</div><div class='add'>+#include &lt;linux/usb/xhci-dbgp.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/linux/mount.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;xen/xen.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='del'>-#include &lt;asm/efi.h&gt;</div><div class='del'>-#include &lt;asm/numa.h&gt;</div><div class='ctx'> #include &lt;asm/bios_ebda.h&gt;</div><div class='ctx'> #include &lt;asm/bugs.h&gt;</div><div class='ctx'> #include &lt;asm/cacheinfo.h&gt;</div><div class='hunk'>@@ -47,18 +46,16 @@</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='ctx'> #include &lt;asm/memtype.h&gt;</div><div class='ctx'> #include &lt;asm/mtrr.h&gt;</div><div class='del'>-#include &lt;asm/realmode.h&gt;</div><div class='add'>+#include &lt;asm/nmi.h&gt;</div><div class='add'>+#include &lt;asm/numa.h&gt;</div><div class='ctx'> #include &lt;asm/olpc_ofw.h&gt;</div><div class='ctx'> #include &lt;asm/pci-direct.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='ctx'> #include &lt;asm/proto.h&gt;</div><div class='add'>+#include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/thermal.h&gt;</div><div class='ctx'> #include &lt;asm/unwind.h&gt;</div><div class='ctx'> #include &lt;asm/vsyscall.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#if defined(CONFIG_X86_LOCAL_APIC)</div><div class='del'>-#include &lt;asm/nmi.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * max_low_pfn_mapped: highest directly mapped pfn &lt; 4 GB</div><div class='hunk'>@@ -134,6 +131,7 @@ struct ist_info ist_info;</div><div class='ctx'> </div><div class='ctx'> struct cpuinfo_x86 boot_cpu_data __read_mostly;</div><div class='ctx'> EXPORT_SYMBOL(boot_cpu_data);</div><div class='add'>+SYM_PIC_ALIAS(boot_cpu_data);</div><div class='ctx'> </div><div class='ctx'> #if !defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)</div><div class='ctx'> __visible unsigned long mmu_cr4_features __ro_after_init;</div><div class='hunk'>@@ -151,6 +149,13 @@ int bootloader_type, bootloader_version;</div><div class='ctx'> </div><div class='ctx'> static const struct ctl_table x86_sysctl_table[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.procname       = "unknown_nmi_panic",</div><div class='add'>+		.data           = &amp;unknown_nmi_panic,</div><div class='add'>+		.maxlen         = sizeof(int),</div><div class='add'>+		.mode           = 0644,</div><div class='add'>+		.proc_handler   = proc_dointvec,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.procname	= "panic_on_unrecovered_nmi",</div><div class='ctx'> 		.data		= &amp;panic_on_unrecovered_nmi,</div><div class='ctx'> 		.maxlen		= sizeof(int),</div><div class='hunk'>@@ -185,15 +190,6 @@ static const struct ctl_table x86_sysctl_table[] = {</div><div class='ctx'> 		.mode		= 0644,</div><div class='ctx'> 		.proc_handler	= proc_dointvec,</div><div class='ctx'> 	},</div><div class='del'>-#if defined(CONFIG_X86_LOCAL_APIC)</div><div class='del'>-	{</div><div class='del'>-		.procname       = "unknown_nmi_panic",</div><div class='del'>-		.data           = &amp;unknown_nmi_panic,</div><div class='del'>-		.maxlen         = sizeof(int),</div><div class='del'>-		.mode           = 0644,</div><div class='del'>-		.proc_handler   = proc_dointvec,</div><div class='del'>-	},</div><div class='del'>-#endif</div><div class='ctx'> #if defined(CONFIG_ACPI_SLEEP)</div><div class='ctx'> 	{</div><div class='ctx'> 		.procname	= "acpi_video_flags",</div><div class='head'>diff --git a/arch/x86/kernel/shstk.c b/arch/x86/kernel/shstk.c<br/>index 059685612362..2ddf23387c7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/shstk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/shstk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/shstk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/shstk.c</a></div><div class='hunk'>@@ -173,8 +173,8 @@ static int shstk_setup(void)</div><div class='ctx'> 		return PTR_ERR((void *)addr);</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock_and_load();</div><div class='del'>-	wrmsrl(MSR_IA32_PL3_SSP, addr + size);</div><div class='del'>-	wrmsrl(MSR_IA32_U_CET, CET_SHSTK_EN);</div><div class='add'>+	wrmsrq(MSR_IA32_PL3_SSP, addr + size);</div><div class='add'>+	wrmsrq(MSR_IA32_U_CET, CET_SHSTK_EN);</div><div class='ctx'> 	fpregs_unlock();</div><div class='ctx'> </div><div class='ctx'> 	shstk-&gt;base = addr;</div><div class='hunk'>@@ -239,7 +239,7 @@ static unsigned long get_user_shstk_addr(void)</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock_and_load();</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_PL3_SSP, ssp);</div><div class='add'>+	rdmsrq(MSR_IA32_PL3_SSP, ssp);</div><div class='ctx'> </div><div class='ctx'> 	fpregs_unlock();</div><div class='ctx'> </div><div class='hunk'>@@ -372,7 +372,7 @@ int setup_signal_shadow_stack(struct ksignal *ksig)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock_and_load();</div><div class='del'>-	wrmsrl(MSR_IA32_PL3_SSP, ssp);</div><div class='add'>+	wrmsrq(MSR_IA32_PL3_SSP, ssp);</div><div class='ctx'> 	fpregs_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -396,7 +396,7 @@ int restore_signal_shadow_stack(void)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock_and_load();</div><div class='del'>-	wrmsrl(MSR_IA32_PL3_SSP, ssp);</div><div class='add'>+	wrmsrq(MSR_IA32_PL3_SSP, ssp);</div><div class='ctx'> 	fpregs_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -460,7 +460,7 @@ static int wrss_control(bool enable)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock_and_load();</div><div class='del'>-	rdmsrl(MSR_IA32_U_CET, msrval);</div><div class='add'>+	rdmsrq(MSR_IA32_U_CET, msrval);</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		features_set(ARCH_SHSTK_WRSS);</div><div class='hunk'>@@ -473,7 +473,7 @@ static int wrss_control(bool enable)</div><div class='ctx'> 		msrval &amp;= ~CET_WRSS_EN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_U_CET, msrval);</div><div class='add'>+	wrmsrq(MSR_IA32_U_CET, msrval);</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	fpregs_unlock();</div><div class='hunk'>@@ -492,8 +492,8 @@ static int shstk_disable(void)</div><div class='ctx'> </div><div class='ctx'> 	fpregs_lock_and_load();</div><div class='ctx'> 	/* Disable WRSS too when disabling shadow stack */</div><div class='del'>-	wrmsrl(MSR_IA32_U_CET, 0);</div><div class='del'>-	wrmsrl(MSR_IA32_PL3_SSP, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_U_CET, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_PL3_SSP, 0);</div><div class='ctx'> 	fpregs_unlock();</div><div class='ctx'> </div><div class='ctx'> 	shstk_free(current);</div><div class='head'>diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c<br/>index 5f441039b572..2404233336ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/signal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/signal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/signal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/signal.c</a></div><div class='hunk'>@@ -255,7 +255,7 @@ static void</div><div class='ctx'> handle_signal(struct ksignal *ksig, struct pt_regs *regs)</div><div class='ctx'> {</div><div class='ctx'> 	bool stepping, failed;</div><div class='del'>-	struct fpu *fpu = &amp;current-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(current);</div><div class='ctx'> </div><div class='ctx'> 	if (v8086_mode(regs))</div><div class='ctx'> 		save_v86_state((struct kernel_vm86_regs *) regs, VM86_SIGNAL);</div><div class='hunk'>@@ -423,14 +423,14 @@ bool sigaltstack_size_valid(size_t ss_size)</div><div class='ctx'> 	if (!fpu_state_size_dynamic() &amp;&amp; !strict_sigaltstack_size)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	fsize += current-&gt;group_leader-&gt;thread.fpu.perm.__user_state_size;</div><div class='add'>+	fsize += x86_task_fpu(current-&gt;group_leader)-&gt;perm.__user_state_size;</div><div class='ctx'> 	if (likely(ss_size &gt; fsize))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	if (strict_sigaltstack_size)</div><div class='ctx'> 		return ss_size &gt; fsize;</div><div class='ctx'> </div><div class='del'>-	mask = current-&gt;group_leader-&gt;thread.fpu.perm.__state_perm;</div><div class='add'>+	mask = x86_task_fpu(current-&gt;group_leader)-&gt;perm.__state_perm;</div><div class='ctx'> 	if (mask &amp; XFEATURE_MASK_USER_DYNAMIC)</div><div class='ctx'> 		return ss_size &gt; fsize;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c<br/>index d6cf1e23c2a3..b90d872aa0c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/smpboot.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/smpboot.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/smpboot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/smpboot.c</a></div><div class='hunk'>@@ -64,7 +64,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/acpi.h&gt;</div><div class='ctx'> #include &lt;asm/cacheinfo.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='ctx'> #include &lt;asm/nmi.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='hunk'>@@ -1188,6 +1188,12 @@ void cpu_disable_common(void)</div><div class='ctx'> </div><div class='ctx'> 	remove_siblinginfo(cpu);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Stop allowing kernel-mode FPU. This is needed so that if the CPU is</div><div class='add'>+	 * brought online again, the initial state is not allowed:</div><div class='add'>+	 */</div><div class='add'>+	this_cpu_write(kernel_fpu_allowed, false);</div><div class='add'>+</div><div class='ctx'> 	/* It's now safe to remove this processor from the online map */</div><div class='ctx'> 	lock_vector_lock();</div><div class='ctx'> 	remove_cpu_from_maps(cpu);</div><div class='head'>diff --git a/arch/x86/kernel/static_call.c b/arch/x86/kernel/static_call.c<br/>index a59c72e77645..378c388d1b31 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/static_call.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/static_call.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/static_call.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/static_call.c</a></div><div class='hunk'>@@ -81,7 +81,7 @@ static void __ref __static_call_transform(void *insn, enum insn_type type,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case RET:</div><div class='del'>-		if (cpu_feature_enabled(X86_FEATURE_RETHUNK))</div><div class='add'>+		if (cpu_wants_rethunk_at(insn))</div><div class='ctx'> 			code = text_gen_insn(JMP32_INSN_OPCODE, insn, x86_return_thunk);</div><div class='ctx'> 		else</div><div class='ctx'> 			code = &amp;retinsn;</div><div class='hunk'>@@ -90,7 +90,7 @@ static void __ref __static_call_transform(void *insn, enum insn_type type,</div><div class='ctx'> 	case JCC:</div><div class='ctx'> 		if (!func) {</div><div class='ctx'> 			func = __static_call_return;</div><div class='del'>-			if (cpu_feature_enabled(X86_FEATURE_RETHUNK))</div><div class='add'>+			if (cpu_wants_rethunk())</div><div class='ctx'> 				func = x86_return_thunk;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -108,7 +108,7 @@ static void __ref __static_call_transform(void *insn, enum insn_type type,</div><div class='ctx'> 	if (system_state == SYSTEM_BOOTING || modinit)</div><div class='ctx'> 		return text_poke_early(insn, code, size);</div><div class='ctx'> </div><div class='del'>-	text_poke_bp(insn, code, size, emulate);</div><div class='add'>+	smp_text_poke_single(insn, code, size, emulate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __static_call_validate(u8 *insn, bool tail, bool tramp)</div><div class='head'>diff --git a/arch/x86/kernel/trace_clock.c b/arch/x86/kernel/trace_clock.c<br/>index b8e7abe00b06..708d61743d15 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/trace_clock.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/trace_clock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/trace_clock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/trace_clock.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;asm/trace_clock.h&gt;</div><div class='ctx'> #include &lt;asm/barrier.h&gt;</div><div class='del'>-#include &lt;asm/msr.h&gt;</div><div class='add'>+#include &lt;asm/tsc.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * trace_clock_x86_tsc(): A clock that is just the cycle counter.</div><div class='head'>diff --git a/arch/x86/kernel/tracepoint.c b/arch/x86/kernel/tracepoint.c<br/>deleted file mode 100644<br/>index 03ae1caaa878..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/tracepoint.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/tracepoint.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2013 Seiji Aguchi &lt;seiji.aguchi@hds.com&gt;</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/atomic.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/trace/exceptions.h&gt;</div><div class='del'>-</div><div class='del'>-DEFINE_STATIC_KEY_FALSE(trace_pagefault_key);</div><div class='del'>-</div><div class='del'>-int trace_pagefault_reg(void)</div><div class='del'>-{</div><div class='del'>-	static_branch_inc(&amp;trace_pagefault_key);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void trace_pagefault_unreg(void)</div><div class='del'>-{</div><div class='del'>-	static_branch_dec(&amp;trace_pagefault_key);</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c<br/>index 9f88b8a78e50..c5c897a86418 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/traps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/traps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/traps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/traps.c</a></div><div class='hunk'>@@ -68,6 +68,7 @@</div><div class='ctx'> #include &lt;asm/vdso.h&gt;</div><div class='ctx'> #include &lt;asm/tdx.h&gt;</div><div class='ctx'> #include &lt;asm/cfi.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> #include &lt;asm/x86_init.h&gt;</div><div class='hunk'>@@ -351,7 +352,7 @@ static noinstr bool handle_bug(struct pt_regs *regs)</div><div class='ctx'> 	case BUG_UD1_UBSAN:</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_UBSAN_TRAP)) {</div><div class='ctx'> 			pr_crit("%s at %pS\n",</div><div class='del'>-				report_ubsan_failure(regs, ud_imm),</div><div class='add'>+				report_ubsan_failure(ud_imm),</div><div class='ctx'> 				(void *)regs-&gt;ip);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -749,7 +750,7 @@ static bool try_fixup_enqcmd_gp(void)</div><div class='ctx'> 	if (current-&gt;pasid_activated)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_PASID, pasid | MSR_IA32_PASID_VALID);</div><div class='add'>+	wrmsrq(MSR_IA32_PASID, pasid | MSR_IA32_PASID_VALID);</div><div class='ctx'> 	current-&gt;pasid_activated = 1;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -882,16 +883,16 @@ static void do_int3_user(struct pt_regs *regs)</div><div class='ctx'> DEFINE_IDTENTRY_RAW(exc_int3)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * poke_int3_handler() is completely self contained code; it does (and</div><div class='add'>+	 * smp_text_poke_int3_handler() is completely self contained code; it does (and</div><div class='ctx'> 	 * must) *NOT* call out to anything, lest it hits upon yet another</div><div class='ctx'> 	 * INT3.</div><div class='ctx'> 	 */</div><div class='del'>-	if (poke_int3_handler(regs))</div><div class='add'>+	if (smp_text_poke_int3_handler(regs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * irqentry_enter_from_user_mode() uses static_branch_{,un}likely()</div><div class='del'>-	 * and therefore can trigger INT3, hence poke_int3_handler() must</div><div class='add'>+	 * and therefore can trigger INT3, hence smp_text_poke_int3_handler() must</div><div class='ctx'> 	 * be done before. If the entry came from kernel mode, then use</div><div class='ctx'> 	 * nmi_enter() because the INT3 could have been hit in any context</div><div class='ctx'> 	 * including NMI.</div><div class='hunk'>@@ -1120,9 +1121,9 @@ static noinstr void exc_debug_kernel(struct pt_regs *regs, unsigned long dr6)</div><div class='ctx'> 		 */</div><div class='ctx'> 		unsigned long debugctl;</div><div class='ctx'> </div><div class='del'>-		rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+		rdmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> 		debugctl |= DEBUGCTLMSR_BTF;</div><div class='del'>-		wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='add'>+		wrmsrq(MSR_IA32_DEBUGCTLMSR, debugctl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1295,7 +1296,7 @@ DEFINE_IDTENTRY_RAW(exc_debug)</div><div class='ctx'> static void math_error(struct pt_regs *regs, int trapnr)</div><div class='ctx'> {</div><div class='ctx'> 	struct task_struct *task = current;</div><div class='del'>-	struct fpu *fpu = &amp;task-&gt;thread.fpu;</div><div class='add'>+	struct fpu *fpu = x86_task_fpu(task);</div><div class='ctx'> 	int si_code;</div><div class='ctx'> 	char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :</div><div class='ctx'> 						"simd exception";</div><div class='hunk'>@@ -1386,11 +1387,11 @@ static bool handle_xfd_event(struct pt_regs *regs)</div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_X86_64) || !cpu_feature_enabled(X86_FEATURE_XFD))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_XFD_ERR, xfd_err);</div><div class='add'>+	rdmsrq(MSR_IA32_XFD_ERR, xfd_err);</div><div class='ctx'> 	if (!xfd_err)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_XFD_ERR, 0);</div><div class='add'>+	wrmsrq(MSR_IA32_XFD_ERR, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Die if that happens in kernel space */</div><div class='ctx'> 	if (WARN_ON(!user_mode(regs)))</div><div class='head'>diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c<br/>index 88e5a4ed9db3..87e749106dda 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/tsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/tsc.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;linux/static_key.h&gt;</div><div class='ctx'> #include &lt;linux/static_call.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/hpet.h&gt;</div><div class='ctx'> #include &lt;asm/timer.h&gt;</div><div class='ctx'> #include &lt;asm/vgtod.h&gt;</div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/i8259.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/topology.h&gt;</div><div class='ctx'> #include &lt;asm/uv/uv.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='hunk'>@@ -1098,7 +1099,7 @@ static void __init detect_art(void)</div><div class='ctx'> 	if (art_base_clk.denominator &lt; ART_MIN_DENOMINATOR)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_TSC_ADJUST, art_base_clk.offset);</div><div class='add'>+	rdmsrq(MSR_IA32_TSC_ADJUST, art_base_clk.offset);</div><div class='ctx'> </div><div class='ctx'> 	/* Make this sticky over multiple CPU init calls */</div><div class='ctx'> 	setup_force_cpu_cap(X86_FEATURE_ART);</div><div class='head'>diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c<br/>index 4334033658ed..ec3aa340d351 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc_sync.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/tsc_sync.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/tsc_sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/tsc_sync.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/smp.h&gt;</div><div class='ctx'> #include &lt;linux/nmi.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/tsc.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct tsc_adjust {</div><div class='hunk'>@@ -65,12 +66,12 @@ void tsc_verify_tsc_adjust(bool resume)</div><div class='ctx'> </div><div class='ctx'> 	adj-&gt;nextcheck = jiffies + HZ;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_TSC_ADJUST, curval);</div><div class='add'>+	rdmsrq(MSR_IA32_TSC_ADJUST, curval);</div><div class='ctx'> 	if (adj-&gt;adjusted == curval)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Restore the original value */</div><div class='del'>-	wrmsrl(MSR_IA32_TSC_ADJUST, adj-&gt;adjusted);</div><div class='add'>+	wrmsrq(MSR_IA32_TSC_ADJUST, adj-&gt;adjusted);</div><div class='ctx'> </div><div class='ctx'> 	if (!adj-&gt;warned || resume) {</div><div class='ctx'> 		pr_warn(FW_BUG "TSC ADJUST differs: CPU%u %lld --&gt; %lld. Restoring\n",</div><div class='hunk'>@@ -142,7 +143,7 @@ static void tsc_sanitize_first_cpu(struct tsc_adjust *cur, s64 bootval,</div><div class='ctx'> 		if (likely(!tsc_async_resets)) {</div><div class='ctx'> 			pr_warn(FW_BUG "TSC ADJUST: CPU%u: %lld force to 0\n",</div><div class='ctx'> 				cpu, bootval);</div><div class='del'>-			wrmsrl(MSR_IA32_TSC_ADJUST, 0);</div><div class='add'>+			wrmsrq(MSR_IA32_TSC_ADJUST, 0);</div><div class='ctx'> 			bootval = 0;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			pr_info("TSC ADJUST: CPU%u: %lld NOT forced to 0\n",</div><div class='hunk'>@@ -165,7 +166,7 @@ bool __init tsc_store_and_check_tsc_adjust(bool bootcpu)</div><div class='ctx'> 	if (check_tsc_unstable())</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_TSC_ADJUST, bootval);</div><div class='add'>+	rdmsrq(MSR_IA32_TSC_ADJUST, bootval);</div><div class='ctx'> 	cur-&gt;bootval = bootval;</div><div class='ctx'> 	cur-&gt;nextcheck = jiffies + HZ;</div><div class='ctx'> 	tsc_sanitize_first_cpu(cur, bootval, smp_processor_id(), bootcpu);</div><div class='hunk'>@@ -187,7 +188,7 @@ bool tsc_store_and_check_tsc_adjust(bool bootcpu)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_TSC_ADJUST, bootval);</div><div class='add'>+	rdmsrq(MSR_IA32_TSC_ADJUST, bootval);</div><div class='ctx'> 	cur-&gt;bootval = bootval;</div><div class='ctx'> 	cur-&gt;nextcheck = jiffies + HZ;</div><div class='ctx'> 	cur-&gt;warned = false;</div><div class='hunk'>@@ -229,7 +230,7 @@ bool tsc_store_and_check_tsc_adjust(bool bootcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (bootval != ref-&gt;adjusted) {</div><div class='ctx'> 		cur-&gt;adjusted = ref-&gt;adjusted;</div><div class='del'>-		wrmsrl(MSR_IA32_TSC_ADJUST, ref-&gt;adjusted);</div><div class='add'>+		wrmsrq(MSR_IA32_TSC_ADJUST, ref-&gt;adjusted);</div><div class='ctx'> 	}</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We have the TSCs forced to be in sync on this package. Skip sync</div><div class='hunk'>@@ -518,7 +519,7 @@ retry:</div><div class='ctx'> 	pr_warn("TSC ADJUST compensate: CPU%u observed %lld warp. Adjust: %lld\n",</div><div class='ctx'> 		cpu, cur_max_warp, cur-&gt;adjusted);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_TSC_ADJUST, cur-&gt;adjusted);</div><div class='add'>+	wrmsrq(MSR_IA32_TSC_ADJUST, cur-&gt;adjusted);</div><div class='ctx'> 	goto retry;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c<br/>index 9194695662b2..6d383839e839 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/uprobes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/uprobes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/uprobes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/uprobes.c</a></div><div class='hunk'>@@ -840,6 +840,11 @@ static int branch_setup_xol_ops(struct arch_uprobe *auprobe, struct insn *insn)</div><div class='ctx'> 	insn_byte_t p;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	/* x86_nops[insn-&gt;length]; same as jmp with .offs = 0 */</div><div class='add'>+	if (insn-&gt;length &lt;= ASM_NOP_MAX &amp;&amp;</div><div class='add'>+	    !memcmp(insn-&gt;kaddr, x86_nops[insn-&gt;length], insn-&gt;length))</div><div class='add'>+		goto setup;</div><div class='add'>+</div><div class='ctx'> 	switch (opc1) {</div><div class='ctx'> 	case 0xeb:	/* jmp 8 */</div><div class='ctx'> 	case 0xe9:	/* jmp 32 */</div><div class='head'>diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S<br/>index ccdc45e5b759..4fa0be732af1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kernel/vmlinux.lds.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kernel/vmlinux.lds.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kernel/vmlinux.lds.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kernel/vmlinux.lds.S</a></div><div class='hunk'>@@ -79,11 +79,13 @@ const_cpu_current_top_of_stack = cpu_current_top_of_stack;</div><div class='ctx'> #define BSS_DECRYPTED						\</div><div class='ctx'> 	. = ALIGN(PMD_SIZE);					\</div><div class='ctx'> 	__start_bss_decrypted = .;				\</div><div class='add'>+	__pi___start_bss_decrypted = .;				\</div><div class='ctx'> 	*(.bss..decrypted);					\</div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);					\</div><div class='ctx'> 	__start_bss_decrypted_unused = .;			\</div><div class='ctx'> 	. = ALIGN(PMD_SIZE);					\</div><div class='ctx'> 	__end_bss_decrypted = .;				\</div><div class='add'>+	__pi___end_bss_decrypted = .;				\</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='hunk'>@@ -128,6 +130,7 @@ SECTIONS</div><div class='ctx'> 	/* Text and read-only data */</div><div class='ctx'> 	.text :  AT(ADDR(.text) - LOAD_OFFSET) {</div><div class='ctx'> 		_text = .;</div><div class='add'>+		__pi__text = .;</div><div class='ctx'> 		_stext = .;</div><div class='ctx'> 		ALIGN_ENTRY_TEXT_BEGIN</div><div class='ctx'> 		*(.text..__x86.rethunk_untrain)</div><div class='hunk'>@@ -391,6 +394,7 @@ SECTIONS</div><div class='ctx'> </div><div class='ctx'> 	. = ALIGN(PAGE_SIZE);		/* keep VO_INIT_SIZE page aligned */</div><div class='ctx'> 	_end = .;</div><div class='add'>+	__pi__end = .;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AMD_MEM_ENCRYPT</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -466,10 +470,18 @@ SECTIONS</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:</div><div class='add'>+ * COMPILE_TEST kernels can be large - CONFIG_KASAN, for example, can cause</div><div class='add'>+ * this.  Let's assume that nobody will be running a COMPILE_TEST kernel and</div><div class='add'>+ * let's assert that fuller build coverage is more valuable than being able to</div><div class='add'>+ * run a COMPILE_TEST kernel.</div><div class='add'>+ */</div><div class='add'>+#ifndef CONFIG_COMPILE_TEST</div><div class='add'>+/*</div><div class='add'>+ * The ASSERT() sync to . is intentional, for binutils 2.14 compatibility:</div><div class='ctx'>  */</div><div class='ctx'> . = ASSERT((_end - LOAD_OFFSET &lt;= KERNEL_IMAGE_SIZE),</div><div class='ctx'> 	   "kernel image bigger than KERNEL_IMAGE_SIZE");</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* needed for Clang - see arch/x86/entry/entry.S */</div><div class='ctx'> PROVIDE(__ref_stack_chk_guard = __stack_chk_guard);</div><div class='hunk'>@@ -497,6 +509,16 @@ PROVIDE(__ref_stack_chk_guard = __stack_chk_guard);</div><div class='ctx'> 		"SRSO function pair won't alias");</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_MITIGATION_ITS) &amp;&amp; !defined(CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B)</div><div class='add'>+. = ASSERT(__x86_indirect_its_thunk_rax &amp; 0x20, "__x86_indirect_thunk_rax not in second half of cacheline");</div><div class='add'>+. = ASSERT(((__x86_indirect_its_thunk_rcx - __x86_indirect_its_thunk_rax) % 64) == 0, "Indirect thunks are not cacheline apart");</div><div class='add'>+. = ASSERT(__x86_indirect_its_thunk_array == __x86_indirect_its_thunk_rax, "Gap in ITS thunk array");</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if defined(CONFIG_MITIGATION_ITS) &amp;&amp; !defined(CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B)</div><div class='add'>+. = ASSERT(its_return_thunk &amp; 0x20, "its_return_thunk not in second half of cacheline");</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_X86_64 */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig<br/>index fe8ea8c097de..2eeffcec5382 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/Kconfig</a></div><div class='hunk'>@@ -95,6 +95,8 @@ config KVM_SW_PROTECTED_VM</div><div class='ctx'> config KVM_INTEL</div><div class='ctx'> 	tristate "KVM for Intel (and compatible) processors support"</div><div class='ctx'> 	depends on KVM &amp;&amp; IA32_FEAT_CTL</div><div class='add'>+	select KVM_GENERIC_PRIVATE_MEM if INTEL_TDX_HOST</div><div class='add'>+	select KVM_GENERIC_MEMORY_ATTRIBUTES if INTEL_TDX_HOST</div><div class='ctx'> 	help</div><div class='ctx'> 	  Provides support for KVM on processors equipped with Intel's VT</div><div class='ctx'> 	  extensions, a.k.a. Virtual Machine Extensions (VMX).</div><div class='hunk'>@@ -129,6 +131,16 @@ config X86_SGX_KVM</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config KVM_INTEL_TDX</div><div class='add'>+	bool "Intel Trust Domain Extensions (TDX) support"</div><div class='add'>+	default y</div><div class='add'>+	depends on INTEL_TDX_HOST</div><div class='add'>+	help</div><div class='add'>+	  Provides support for launching Intel Trust Domain Extensions (TDX)</div><div class='add'>+	  confidential VMs on Intel processors.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> config KVM_AMD</div><div class='ctx'> 	tristate "KVM for AMD processors support"</div><div class='ctx'> 	depends on KVM &amp;&amp; (CPU_SUP_AMD || CPU_SUP_HYGON)</div><div class='head'>diff --git a/arch/x86/kvm/Makefile b/arch/x86/kvm/Makefile<br/>index f9dddb8cb466..a5d362c7b504 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/Makefile</a></div><div class='hunk'>@@ -20,6 +20,7 @@ kvm-intel-y		+= vmx/vmx.o vmx/vmenter.o vmx/pmu_intel.o vmx/vmcs12.o \</div><div class='ctx'> </div><div class='ctx'> kvm-intel-$(CONFIG_X86_SGX_KVM)	+= vmx/sgx.o</div><div class='ctx'> kvm-intel-$(CONFIG_KVM_HYPERV)	+= vmx/hyperv.o vmx/hyperv_evmcs.o</div><div class='add'>+kvm-intel-$(CONFIG_KVM_INTEL_TDX)	+= vmx/tdx.o</div><div class='ctx'> </div><div class='ctx'> kvm-amd-y		+= svm/svm.o svm/vmenter.o svm/pmu.o svm/nested.o svm/avic.o</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c<br/>index 5e4d4934c0d3..6569b453546b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/cpuid.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/cpuid.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/cpuid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/cpuid.c</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;asm/user.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/xstate.h&gt;</div><div class='ctx'> #include &lt;asm/sgx.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include "cpuid.h"</div><div class='ctx'> #include "lapic.h"</div><div class='ctx'> #include "mmu.h"</div><div class='hunk'>@@ -81,17 +81,8 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Magic value used by KVM when querying userspace-provided CPUID entries and</div><div class='del'>- * doesn't care about the CPIUD index because the index of the function in</div><div class='del'>- * question is not significant.  Note, this magic value must have at least one</div><div class='del'>- * bit set in bits[63:32] and must be consumed as a u64 by cpuid_entry2_find()</div><div class='del'>- * to avoid false positives when processing guest CPUID input.</div><div class='del'>- */</div><div class='del'>-#define KVM_CPUID_INDEX_NOT_SIGNIFICANT -1ull</div><div class='del'>-</div><div class='del'>-static struct kvm_cpuid_entry2 *cpuid_entry2_find(struct kvm_vcpu *vcpu,</div><div class='del'>-						  u32 function, u64 index)</div><div class='add'>+struct kvm_cpuid_entry2 *kvm_find_cpuid_entry2(</div><div class='add'>+	struct kvm_cpuid_entry2 *entries, int nent, u32 function, u64 index)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_cpuid_entry2 *e;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -108,8 +99,8 @@ static struct kvm_cpuid_entry2 *cpuid_entry2_find(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	 */</div><div class='ctx'> 	lockdep_assert_irqs_enabled();</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vcpu-&gt;arch.cpuid_nent; i++) {</div><div class='del'>-		e = &amp;vcpu-&gt;arch.cpuid_entries[i];</div><div class='add'>+	for (i = 0; i &lt; nent; i++) {</div><div class='add'>+		e = &amp;entries[i];</div><div class='ctx'> </div><div class='ctx'> 		if (e-&gt;function != function)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -140,26 +131,7 @@ static struct kvm_cpuid_entry2 *cpuid_entry2_find(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-struct kvm_cpuid_entry2 *kvm_find_cpuid_entry_index(struct kvm_vcpu *vcpu,</div><div class='del'>-						    u32 function, u32 index)</div><div class='del'>-{</div><div class='del'>-	return cpuid_entry2_find(vcpu, function, index);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry_index);</div><div class='del'>-</div><div class='del'>-struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,</div><div class='del'>-					      u32 function)</div><div class='del'>-{</div><div class='del'>-	return cpuid_entry2_find(vcpu, function, KVM_CPUID_INDEX_NOT_SIGNIFICANT);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * cpuid_entry2_find() and KVM_CPUID_INDEX_NOT_SIGNIFICANT should never be used</div><div class='del'>- * directly outside of kvm_find_cpuid_entry() and kvm_find_cpuid_entry_index().</div><div class='del'>- */</div><div class='del'>-#undef KVM_CPUID_INDEX_NOT_SIGNIFICANT</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry2);</div><div class='ctx'> </div><div class='ctx'> static int kvm_check_cpuid(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -236,7 +208,7 @@ static struct kvm_hypervisor_cpuid kvm_get_hypervisor_cpuid(struct kvm_vcpu *vcp</div><div class='ctx'> 	struct kvm_cpuid_entry2 *entry;</div><div class='ctx'> 	u32 base;</div><div class='ctx'> </div><div class='del'>-	for_each_possible_hypervisor_cpuid_base(base) {</div><div class='add'>+	for_each_possible_cpuid_base_hypervisor(base) {</div><div class='ctx'> 		entry = kvm_find_cpuid_entry(vcpu, base);</div><div class='ctx'> </div><div class='ctx'> 		if (entry) {</div><div class='hunk'>@@ -492,6 +464,20 @@ not_found:</div><div class='ctx'> 	return 36;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int cpuid_query_maxguestphyaddr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_cpuid_entry2 *best;</div><div class='add'>+</div><div class='add'>+	best = kvm_find_cpuid_entry(vcpu, 0x80000000);</div><div class='add'>+	if (!best || best-&gt;eax &lt; 0x80000008)</div><div class='add'>+		goto not_found;</div><div class='add'>+	best = kvm_find_cpuid_entry(vcpu, 0x80000008);</div><div class='add'>+	if (best)</div><div class='add'>+		return (best-&gt;eax &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+not_found:</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This "raw" version returns the reserved GPA bits without any adjustments for</div><div class='ctx'>  * encryption technologies that usurp bits.  The raw mask should be used if and</div><div class='hunk'>@@ -1427,8 +1413,8 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0xa: { /* Architectural Performance Monitoring */</div><div class='del'>-		union cpuid10_eax eax;</div><div class='del'>-		union cpuid10_edx edx;</div><div class='add'>+		union cpuid10_eax eax = { };</div><div class='add'>+		union cpuid10_edx edx = { };</div><div class='ctx'> </div><div class='ctx'> 		if (!enable_pmu || !static_cpu_has(X86_FEATURE_ARCH_PERFMON)) {</div><div class='ctx'> 			entry-&gt;eax = entry-&gt;ebx = entry-&gt;ecx = entry-&gt;edx = 0;</div><div class='hunk'>@@ -1444,8 +1430,6 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)</div><div class='ctx'> </div><div class='ctx'> 		if (kvm_pmu_cap.version)</div><div class='ctx'> 			edx.split.anythread_deprecated = 1;</div><div class='del'>-		edx.split.reserved1 = 0;</div><div class='del'>-		edx.split.reserved2 = 0;</div><div class='ctx'> </div><div class='ctx'> 		entry-&gt;eax = eax.full;</div><div class='ctx'> 		entry-&gt;ebx = kvm_pmu_cap.events_mask;</div><div class='hunk'>@@ -1763,7 +1747,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)</div><div class='ctx'> 		break;</div><div class='ctx'> 	/* AMD Extended Performance Monitoring and Debug */</div><div class='ctx'> 	case 0x80000022: {</div><div class='del'>-		union cpuid_0x80000022_ebx ebx;</div><div class='add'>+		union cpuid_0x80000022_ebx ebx = { };</div><div class='ctx'> </div><div class='ctx'> 		entry-&gt;ecx = entry-&gt;edx = 0;</div><div class='ctx'> 		if (!enable_pmu || !kvm_cpu_cap_has(X86_FEATURE_PERFMON_V2)) {</div><div class='head'>diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h<br/>index d2884162a46a..d3f5ae15a7ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/cpuid.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/cpuid.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/cpuid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/cpuid.h</a></div><div class='hunk'>@@ -11,10 +11,34 @@ extern u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly;</div><div class='ctx'> void kvm_set_cpu_caps(void);</div><div class='ctx'> </div><div class='ctx'> void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu);</div><div class='del'>-struct kvm_cpuid_entry2 *kvm_find_cpuid_entry_index(struct kvm_vcpu *vcpu,</div><div class='del'>-						    u32 function, u32 index);</div><div class='del'>-struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,</div><div class='del'>-					      u32 function);</div><div class='add'>+struct kvm_cpuid_entry2 *kvm_find_cpuid_entry2(struct kvm_cpuid_entry2 *entries,</div><div class='add'>+					       int nent, u32 function, u64 index);</div><div class='add'>+/*</div><div class='add'>+ * Magic value used by KVM when querying userspace-provided CPUID entries and</div><div class='add'>+ * doesn't care about the CPIUD index because the index of the function in</div><div class='add'>+ * question is not significant.  Note, this magic value must have at least one</div><div class='add'>+ * bit set in bits[63:32] and must be consumed as a u64 by kvm_find_cpuid_entry2()</div><div class='add'>+ * to avoid false positives when processing guest CPUID input.</div><div class='add'>+ *</div><div class='add'>+ * KVM_CPUID_INDEX_NOT_SIGNIFICANT should never be used directly outside of</div><div class='add'>+ * kvm_find_cpuid_entry2() and kvm_find_cpuid_entry().</div><div class='add'>+ */</div><div class='add'>+#define KVM_CPUID_INDEX_NOT_SIGNIFICANT -1ull</div><div class='add'>+</div><div class='add'>+static inline struct kvm_cpuid_entry2 *kvm_find_cpuid_entry_index(struct kvm_vcpu *vcpu,</div><div class='add'>+								  u32 function, u32 index)</div><div class='add'>+{</div><div class='add'>+	return kvm_find_cpuid_entry2(vcpu-&gt;arch.cpuid_entries, vcpu-&gt;arch.cpuid_nent,</div><div class='add'>+				     function, index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,</div><div class='add'>+							    u32 function)</div><div class='add'>+{</div><div class='add'>+	return kvm_find_cpuid_entry2(vcpu-&gt;arch.cpuid_entries, vcpu-&gt;arch.cpuid_nent,</div><div class='add'>+				     function, KVM_CPUID_INDEX_NOT_SIGNIFICANT);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,</div><div class='ctx'> 			    struct kvm_cpuid_entry2 __user *entries,</div><div class='ctx'> 			    unsigned int type);</div><div class='hunk'>@@ -34,6 +58,7 @@ void __init kvm_init_xstate_sizes(void);</div><div class='ctx'> u32 xstate_required_size(u64 xstate_bv, bool compacted);</div><div class='ctx'> </div><div class='ctx'> int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu);</div><div class='add'>+int cpuid_query_maxguestphyaddr(struct kvm_vcpu *vcpu);</div><div class='ctx'> u64 kvm_vcpu_reserved_gpa_bits_raw(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='ctx'> static inline int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)</div><div class='head'>diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c<br/>index 63f66c51975a..97d68d837929 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/irq.c</a></div><div class='hunk'>@@ -100,6 +100,9 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *v)</div><div class='ctx'> 	if (kvm_cpu_has_extint(v))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='add'>+	if (lapic_in_kernel(v) &amp;&amp; v-&gt;arch.apic-&gt;guest_apic_protected)</div><div class='add'>+		return kvm_x86_call(protected_apic_has_interrupt)(v);</div><div class='add'>+</div><div class='ctx'> 	return kvm_apic_has_interrupt(v) != -1;	/* LAPIC */</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_cpu_has_interrupt);</div><div class='head'>diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c<br/>index 28e3317124fd..c9de81cc27e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/lapic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/lapic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/lapic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/lapic.c</a></div><div class='hunk'>@@ -1790,8 +1790,17 @@ static void apic_update_lvtt(struct kvm_lapic *apic)</div><div class='ctx'> static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_lapic *apic = vcpu-&gt;arch.apic;</div><div class='del'>-	u32 reg = kvm_lapic_get_reg(apic, APIC_LVTT);</div><div class='add'>+	u32 reg;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Assume a timer IRQ was "injected" if the APIC is protected.  KVM's</div><div class='add'>+	 * copy of the vIRR is bogus, it's the responsibility of the caller to</div><div class='add'>+	 * precisely check whether or not a timer IRQ is pending.</div><div class='add'>+	 */</div><div class='add'>+	if (apic-&gt;guest_apic_protected)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	reg = kvm_lapic_get_reg(apic, APIC_LVTT);</div><div class='ctx'> 	if (kvm_apic_hw_enabled(apic)) {</div><div class='ctx'> 		int vec = reg &amp; APIC_VECTOR_MASK;</div><div class='ctx'> 		void *bitmap = apic-&gt;regs + APIC_ISR;</div><div class='hunk'>@@ -2650,6 +2659,7 @@ int kvm_apic_set_base(struct kvm_vcpu *vcpu, u64 value, bool host_initiated)</div><div class='ctx'> 	kvm_recalculate_apic_map(vcpu-&gt;kvm);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_apic_set_base);</div><div class='ctx'> </div><div class='ctx'> void kvm_apic_update_apicv(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -2958,6 +2968,9 @@ int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!kvm_apic_present(vcpu))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='add'>+	if (apic-&gt;guest_apic_protected)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='ctx'> 	__apic_update_ppr(apic, &amp;ppr);</div><div class='ctx'> 	return apic_has_interrupt_for_ppr(apic, ppr);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h<br/>index 1a8553ebdb42..e33c969439f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/lapic.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/lapic.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/lapic.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/lapic.h</a></div><div class='hunk'>@@ -65,6 +65,8 @@ struct kvm_lapic {</div><div class='ctx'> 	bool sw_enabled;</div><div class='ctx'> 	bool irr_pending;</div><div class='ctx'> 	bool lvt0_in_nmi_mode;</div><div class='add'>+	/* Select registers in the vAPIC cannot be read/written. */</div><div class='add'>+	bool guest_apic_protected;</div><div class='ctx'> 	/* Number of bits set in ISR. */</div><div class='ctx'> 	s16 isr_count;</div><div class='ctx'> 	/* The highest vector set in ISR; if -1 - invalid, must scan ISR. */</div><div class='head'>diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h<br/>index 050a0e229a4d..b4b6860ab971 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/mmu.h</a></div><div class='hunk'>@@ -79,6 +79,7 @@ static inline gfn_t kvm_mmu_max_gfn(void)</div><div class='ctx'> u8 kvm_mmu_get_max_tdp_level(void);</div><div class='ctx'> </div><div class='ctx'> void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask);</div><div class='add'>+void kvm_mmu_set_mmio_spte_value(struct kvm *kvm, u64 mmio_value);</div><div class='ctx'> void kvm_mmu_set_me_spte_mask(u64 me_value, u64 me_mask);</div><div class='ctx'> void kvm_mmu_set_ept_masks(bool has_ad_bits, bool has_exec_only);</div><div class='ctx'> </div><div class='hunk'>@@ -104,6 +105,9 @@ void kvm_mmu_track_write(struct kvm_vcpu *vcpu, gpa_t gpa, const u8 *new,</div><div class='ctx'> </div><div class='ctx'> static inline int kvm_mmu_reload(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))</div><div class='add'>+		kvm_mmu_free_obsolete_roots(vcpu);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Checking root.hpa is sufficient even when KVM has mirror root.</div><div class='ctx'> 	 * We can have either:</div><div class='hunk'>@@ -231,7 +235,7 @@ static inline u8 permission_fault(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,</div><div class='ctx'> 	return -(u32)fault &amp; errcode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool kvm_mmu_may_ignore_guest_pat(void);</div><div class='add'>+bool kvm_mmu_may_ignore_guest_pat(struct kvm *kvm);</div><div class='ctx'> </div><div class='ctx'> int kvm_mmu_post_init_vm(struct kvm *kvm);</div><div class='ctx'> void kvm_mmu_pre_destroy_vm(struct kvm *kvm);</div><div class='hunk'>@@ -253,6 +257,9 @@ extern bool tdp_mmu_enabled;</div><div class='ctx'> #define tdp_mmu_enabled false</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+bool kvm_tdp_mmu_gpa_is_mapped(struct kvm_vcpu *vcpu, u64 gpa);</div><div class='add'>+int kvm_tdp_map_page(struct kvm_vcpu *vcpu, gpa_t gpa, u64 error_code, u8 *level);</div><div class='add'>+</div><div class='ctx'> static inline bool kvm_memslots_have_rmaps(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	return !tdp_mmu_enabled || kvm_shadow_root_allocated(kvm);</div><div class='head'>diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c<br/>index 63bb77ee1bb1..7b3f1783ab3c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/mmu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/mmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/mmu/mmu.c</a></div><div class='hunk'>@@ -110,6 +110,7 @@ static bool __ro_after_init tdp_mmu_allowed;</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> bool __read_mostly tdp_mmu_enabled = true;</div><div class='ctx'> module_param_named(tdp_mmu, tdp_mmu_enabled, bool, 0444);</div><div class='add'>+EXPORT_SYMBOL_GPL(tdp_mmu_enabled);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int max_huge_page_level __read_mostly;</div><div class='hunk'>@@ -1456,15 +1457,15 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,</div><div class='ctx'> 	 * enabled but it chooses between clearing the Dirty bit and Writeable</div><div class='ctx'> 	 * bit based on the context.</div><div class='ctx'> 	 */</div><div class='del'>-	if (kvm_x86_ops.cpu_dirty_log_size)</div><div class='add'>+	if (kvm-&gt;arch.cpu_dirty_log_size)</div><div class='ctx'> 		kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask);</div><div class='ctx'> 	else</div><div class='ctx'> 		kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int kvm_cpu_dirty_log_size(void)</div><div class='add'>+int kvm_cpu_dirty_log_size(struct kvm *kvm)</div><div class='ctx'> {</div><div class='del'>-	return kvm_x86_ops.cpu_dirty_log_size;</div><div class='add'>+	return kvm-&gt;arch.cpu_dirty_log_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,</div><div class='hunk'>@@ -4835,19 +4836,6 @@ out_unlock:</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-bool kvm_mmu_may_ignore_guest_pat(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * When EPT is enabled (shadow_memtype_mask is non-zero), and the VM</div><div class='del'>-	 * has non-coherent DMA (DMA doesn't snoop CPU caches), KVM's ABI is to</div><div class='del'>-	 * honor the memtype from the guest's PAT so that guest accesses to</div><div class='del'>-	 * memory that is DMA'd aren't cached against the guest's wishes.  As a</div><div class='del'>-	 * result, KVM _may_ ignore guest PAT, whereas without non-coherent DMA,</div><div class='del'>-	 * KVM _always_ ignores guest PAT (when EPT is enabled).</div><div class='del'>-	 */</div><div class='del'>-	return shadow_memtype_mask;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='hunk'>@@ -4858,8 +4846,7 @@ int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)</div><div class='ctx'> 	return direct_page_fault(vcpu, fault);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int kvm_tdp_map_page(struct kvm_vcpu *vcpu, gpa_t gpa, u64 error_code,</div><div class='del'>-			    u8 *level)</div><div class='add'>+int kvm_tdp_map_page(struct kvm_vcpu *vcpu, gpa_t gpa, u64 error_code, u8 *level)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='hunk'>@@ -4873,6 +4860,10 @@ static int kvm_tdp_map_page(struct kvm_vcpu *vcpu, gpa_t gpa, u64 error_code,</div><div class='ctx'> 	do {</div><div class='ctx'> 		if (signal_pending(current))</div><div class='ctx'> 			return -EINTR;</div><div class='add'>+</div><div class='add'>+		if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu))</div><div class='add'>+			return -EIO;</div><div class='add'>+</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 		r = kvm_mmu_do_page_fault(vcpu, gpa, error_code, true, NULL, level);</div><div class='ctx'> 	} while (r == RET_PF_RETRY);</div><div class='hunk'>@@ -4897,6 +4888,7 @@ static int kvm_tdp_map_page(struct kvm_vcpu *vcpu, gpa_t gpa, u64 error_code,</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_tdp_map_page);</div><div class='ctx'> </div><div class='ctx'> long kvm_arch_vcpu_pre_fault_memory(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				    struct kvm_pre_fault_memory *range)</div><div class='hunk'>@@ -5589,12 +5581,19 @@ void __kvm_mmu_refresh_passthrough_bits(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	int maxpa;</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;kvm-&gt;arch.vm_type == KVM_X86_TDX_VM)</div><div class='add'>+		maxpa = cpuid_query_maxguestphyaddr(vcpu);</div><div class='add'>+	else</div><div class='add'>+		maxpa = cpuid_maxphyaddr(vcpu);</div><div class='add'>+</div><div class='ctx'> 	/* tdp_root_level is architecture forced level, use it if nonzero */</div><div class='ctx'> 	if (tdp_root_level)</div><div class='ctx'> 		return tdp_root_level;</div><div class='ctx'> </div><div class='ctx'> 	/* Use 5-level TDP if and only if it's useful/necessary. */</div><div class='del'>-	if (max_tdp_level == 5 &amp;&amp; cpuid_maxphyaddr(vcpu) &lt;= 48)</div><div class='add'>+	if (max_tdp_level == 5 &amp;&amp; maxpa &lt;= 48)</div><div class='ctx'> 		return 4;</div><div class='ctx'> </div><div class='ctx'> 	return max_tdp_level;</div><div class='hunk'>@@ -5913,6 +5912,7 @@ int kvm_mmu_load(struct kvm_vcpu *vcpu)</div><div class='ctx'> out:</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_mmu_load);</div><div class='ctx'> </div><div class='ctx'> void kvm_mmu_unload(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -5974,6 +5974,7 @@ void kvm_mmu_free_obsolete_roots(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	__kvm_mmu_free_obsolete_roots(vcpu-&gt;kvm, &amp;vcpu-&gt;arch.root_mmu);</div><div class='ctx'> 	__kvm_mmu_free_obsolete_roots(vcpu-&gt;kvm, &amp;vcpu-&gt;arch.guest_mmu);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_mmu_free_obsolete_roots);</div><div class='ctx'> </div><div class='ctx'> static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,</div><div class='ctx'> 				    int *bytes)</div><div class='hunk'>@@ -7238,6 +7239,7 @@ static void kvm_mmu_zap_memslot(struct kvm *kvm,</div><div class='ctx'> 		.start = slot-&gt;base_gfn,</div><div class='ctx'> 		.end = slot-&gt;base_gfn + slot-&gt;npages,</div><div class='ctx'> 		.may_block = true,</div><div class='add'>+		.attr_filter = KVM_FILTER_PRIVATE | KVM_FILTER_SHARED,</div><div class='ctx'> 	};</div><div class='ctx'> 	bool flush;</div><div class='ctx'> </div><div class='hunk'>@@ -7669,9 +7671,30 @@ void kvm_mmu_pre_destroy_vm(struct kvm *kvm)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES</div><div class='add'>+static bool hugepage_test_mixed(struct kvm_memory_slot *slot, gfn_t gfn,</div><div class='add'>+				int level)</div><div class='add'>+{</div><div class='add'>+	return lpage_info_slot(gfn, slot, level)-&gt;disallow_lpage &amp; KVM_LPAGE_MIXED_FLAG;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hugepage_clear_mixed(struct kvm_memory_slot *slot, gfn_t gfn,</div><div class='add'>+				 int level)</div><div class='add'>+{</div><div class='add'>+	lpage_info_slot(gfn, slot, level)-&gt;disallow_lpage &amp;= ~KVM_LPAGE_MIXED_FLAG;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hugepage_set_mixed(struct kvm_memory_slot *slot, gfn_t gfn,</div><div class='add'>+			       int level)</div><div class='add'>+{</div><div class='add'>+	lpage_info_slot(gfn, slot, level)-&gt;disallow_lpage |= KVM_LPAGE_MIXED_FLAG;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool kvm_arch_pre_set_memory_attributes(struct kvm *kvm,</div><div class='ctx'> 					struct kvm_gfn_range *range)</div><div class='ctx'> {</div><div class='add'>+	struct kvm_memory_slot *slot = range-&gt;slot;</div><div class='add'>+	int level;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Zap SPTEs even if the slot can't be mapped PRIVATE.  KVM x86 only</div><div class='ctx'> 	 * supports KVM_MEMORY_ATTRIBUTE_PRIVATE, and so it *seems* like KVM</div><div class='hunk'>@@ -7686,6 +7709,38 @@ bool kvm_arch_pre_set_memory_attributes(struct kvm *kvm,</div><div class='ctx'> 	if (WARN_ON_ONCE(!kvm_arch_has_private_mem(kvm)))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON_ONCE(range-&gt;end &lt;= range-&gt;start))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the head and tail pages of the range currently allow a hugepage,</div><div class='add'>+	 * i.e. reside fully in the slot and don't have mixed attributes, then</div><div class='add'>+	 * add each corresponding hugepage range to the ongoing invalidation,</div><div class='add'>+	 * e.g. to prevent KVM from creating a hugepage in response to a fault</div><div class='add'>+	 * for a gfn whose attributes aren't changing.  Note, only the range</div><div class='add'>+	 * of gfns whose attributes are being modified needs to be explicitly</div><div class='add'>+	 * unmapped, as that will unmap any existing hugepages.</div><div class='add'>+	 */</div><div class='add'>+	for (level = PG_LEVEL_2M; level &lt;= KVM_MAX_HUGEPAGE_LEVEL; level++) {</div><div class='add'>+		gfn_t start = gfn_round_for_level(range-&gt;start, level);</div><div class='add'>+		gfn_t end = gfn_round_for_level(range-&gt;end - 1, level);</div><div class='add'>+		gfn_t nr_pages = KVM_PAGES_PER_HPAGE(level);</div><div class='add'>+</div><div class='add'>+		if ((start != range-&gt;start || start + nr_pages &gt; range-&gt;end) &amp;&amp;</div><div class='add'>+		    start &gt;= slot-&gt;base_gfn &amp;&amp;</div><div class='add'>+		    start + nr_pages &lt;= slot-&gt;base_gfn + slot-&gt;npages &amp;&amp;</div><div class='add'>+		    !hugepage_test_mixed(slot, start, level))</div><div class='add'>+			kvm_mmu_invalidate_range_add(kvm, start, start + nr_pages);</div><div class='add'>+</div><div class='add'>+		if (end == start)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if ((end + nr_pages) &gt; range-&gt;end &amp;&amp;</div><div class='add'>+		    (end + nr_pages) &lt;= (slot-&gt;base_gfn + slot-&gt;npages) &amp;&amp;</div><div class='add'>+		    !hugepage_test_mixed(slot, end, level))</div><div class='add'>+			kvm_mmu_invalidate_range_add(kvm, end, end + nr_pages);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Unmap the old attribute page. */</div><div class='ctx'> 	if (range-&gt;arg.attributes &amp; KVM_MEMORY_ATTRIBUTE_PRIVATE)</div><div class='ctx'> 		range-&gt;attr_filter = KVM_FILTER_SHARED;</div><div class='hunk'>@@ -7695,23 +7750,7 @@ bool kvm_arch_pre_set_memory_attributes(struct kvm *kvm,</div><div class='ctx'> 	return kvm_unmap_gfn_range(kvm, range);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hugepage_test_mixed(struct kvm_memory_slot *slot, gfn_t gfn,</div><div class='del'>-				int level)</div><div class='del'>-{</div><div class='del'>-	return lpage_info_slot(gfn, slot, level)-&gt;disallow_lpage &amp; KVM_LPAGE_MIXED_FLAG;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hugepage_clear_mixed(struct kvm_memory_slot *slot, gfn_t gfn,</div><div class='del'>-				 int level)</div><div class='del'>-{</div><div class='del'>-	lpage_info_slot(gfn, slot, level)-&gt;disallow_lpage &amp;= ~KVM_LPAGE_MIXED_FLAG;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void hugepage_set_mixed(struct kvm_memory_slot *slot, gfn_t gfn,</div><div class='del'>-			       int level)</div><div class='del'>-{</div><div class='del'>-	lpage_info_slot(gfn, slot, level)-&gt;disallow_lpage |= KVM_LPAGE_MIXED_FLAG;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static bool hugepage_has_attrs(struct kvm *kvm, struct kvm_memory_slot *slot,</div><div class='ctx'> 			       gfn_t gfn, int level, unsigned long attrs)</div><div class='head'>diff --git a/arch/x86/kvm/mmu/mmu_internal.h b/arch/x86/kvm/mmu/mmu_internal.h<br/>index 75f00598289d..db8f33e4de62 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/mmu_internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/mmu_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/mmu_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/mmu/mmu_internal.h</a></div><div class='hunk'>@@ -187,7 +187,8 @@ static inline gfn_t kvm_gfn_root_bits(const struct kvm *kvm, const struct kvm_mm</div><div class='ctx'> 	return kvm_gfn_direct_bits(kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool kvm_mmu_page_ad_need_write_protect(struct kvm_mmu_page *sp)</div><div class='add'>+static inline bool kvm_mmu_page_ad_need_write_protect(struct kvm *kvm,</div><div class='add'>+						      struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When using the EPT page-modification log, the GPAs in the CPU dirty</div><div class='hunk'>@@ -197,7 +198,7 @@ static inline bool kvm_mmu_page_ad_need_write_protect(struct kvm_mmu_page *sp)</div><div class='ctx'> 	 * being enabled is mandatory as the bits used to denote WP-only SPTEs</div><div class='ctx'> 	 * are reserved for PAE paging (32-bit KVM).</div><div class='ctx'> 	 */</div><div class='del'>-	return kvm_x86_ops.cpu_dirty_log_size &amp;&amp; sp-&gt;role.guest_mode;</div><div class='add'>+	return kvm-&gt;arch.cpu_dirty_log_size &amp;&amp; sp-&gt;role.guest_mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline gfn_t gfn_round_for_level(gfn_t gfn, int level)</div><div class='head'>diff --git a/arch/x86/kvm/mmu/page_track.c b/arch/x86/kvm/mmu/page_track.c<br/>index 561c331fd6ec..1b17b12393a8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/page_track.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/page_track.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/page_track.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/mmu/page_track.c</a></div><div class='hunk'>@@ -172,6 +172,9 @@ static int kvm_enable_external_write_tracking(struct kvm *kvm)</div><div class='ctx'> 	struct kvm_memory_slot *slot;</div><div class='ctx'> 	int r = 0, i, bkt;</div><div class='ctx'> </div><div class='add'>+	if (kvm-&gt;arch.vm_type == KVM_X86_TDX_VM)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;kvm-&gt;slots_arch_lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/arch/x86/kvm/mmu/spte.c b/arch/x86/kvm/mmu/spte.c<br/>index 0f9f47b4ab0e..cfce03d8f123 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/spte.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/spte.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/spte.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/mmu/spte.c</a></div><div class='hunk'>@@ -37,7 +37,6 @@ u64 __read_mostly shadow_mmio_value;</div><div class='ctx'> u64 __read_mostly shadow_mmio_mask;</div><div class='ctx'> u64 __read_mostly shadow_mmio_access_mask;</div><div class='ctx'> u64 __read_mostly shadow_present_mask;</div><div class='del'>-u64 __read_mostly shadow_memtype_mask;</div><div class='ctx'> u64 __read_mostly shadow_me_value;</div><div class='ctx'> u64 __read_mostly shadow_me_mask;</div><div class='ctx'> u64 __read_mostly shadow_acc_track_mask;</div><div class='hunk'>@@ -96,8 +95,6 @@ u64 make_mmio_spte(struct kvm_vcpu *vcpu, u64 gfn, unsigned int access)</div><div class='ctx'> 	u64 spte = generation_mmio_spte_mask(gen);</div><div class='ctx'> 	u64 gpa = gfn &lt;&lt; PAGE_SHIFT;</div><div class='ctx'> </div><div class='del'>-	WARN_ON_ONCE(!vcpu-&gt;kvm-&gt;arch.shadow_mmio_value);</div><div class='del'>-</div><div class='ctx'> 	access &amp;= shadow_mmio_access_mask;</div><div class='ctx'> 	spte |= vcpu-&gt;kvm-&gt;arch.shadow_mmio_value | access;</div><div class='ctx'> 	spte |= gpa | shadow_nonpresent_or_rsvd_mask;</div><div class='hunk'>@@ -177,7 +174,7 @@ bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,</div><div class='ctx'> </div><div class='ctx'> 	if (sp-&gt;role.ad_disabled)</div><div class='ctx'> 		spte |= SPTE_TDP_AD_DISABLED;</div><div class='del'>-	else if (kvm_mmu_page_ad_need_write_protect(sp))</div><div class='add'>+	else if (kvm_mmu_page_ad_need_write_protect(vcpu-&gt;kvm, sp))</div><div class='ctx'> 		spte |= SPTE_TDP_AD_WRPROT_ONLY;</div><div class='ctx'> </div><div class='ctx'> 	spte |= shadow_present_mask;</div><div class='hunk'>@@ -212,9 +209,7 @@ bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,</div><div class='ctx'> 	if (level &gt; PG_LEVEL_4K)</div><div class='ctx'> 		spte |= PT_PAGE_SIZE_MASK;</div><div class='ctx'> </div><div class='del'>-	if (shadow_memtype_mask)</div><div class='del'>-		spte |= kvm_x86_call(get_mt_mask)(vcpu, gfn,</div><div class='del'>-						  kvm_is_mmio_pfn(pfn));</div><div class='add'>+	spte |= kvm_x86_call(get_mt_mask)(vcpu, gfn, kvm_is_mmio_pfn(pfn));</div><div class='ctx'> 	if (host_writable)</div><div class='ctx'> 		spte |= shadow_host_writable_mask;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -440,6 +435,12 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 mmio_mask, u64 access_mask)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask);</div><div class='ctx'> </div><div class='add'>+void kvm_mmu_set_mmio_spte_value(struct kvm *kvm, u64 mmio_value)</div><div class='add'>+{</div><div class='add'>+	kvm-&gt;arch.shadow_mmio_value = mmio_value;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_value);</div><div class='add'>+</div><div class='ctx'> void kvm_mmu_set_me_spte_mask(u64 me_value, u64 me_mask)</div><div class='ctx'> {</div><div class='ctx'> 	/* shadow_me_value must be a subset of shadow_me_mask */</div><div class='hunk'>@@ -463,13 +464,7 @@ void kvm_mmu_set_ept_masks(bool has_ad_bits, bool has_exec_only)</div><div class='ctx'> 	/* VMX_EPT_SUPPRESS_VE_BIT is needed for W or X violation. */</div><div class='ctx'> 	shadow_present_mask	=</div><div class='ctx'> 		(has_exec_only ? 0ull : VMX_EPT_READABLE_MASK) | VMX_EPT_SUPPRESS_VE_BIT;</div><div class='del'>-	/*</div><div class='del'>-	 * EPT overrides the host MTRRs, and so KVM must program the desired</div><div class='del'>-	 * memtype directly into the SPTEs.  Note, this mask is just the mask</div><div class='del'>-	 * of all bits that factor into the memtype, the actual memtype must be</div><div class='del'>-	 * dynamically calculated, e.g. to ensure host MMIO is mapped UC.</div><div class='del'>-	 */</div><div class='del'>-	shadow_memtype_mask	= VMX_EPT_MT_MASK | VMX_EPT_IPAT_BIT;</div><div class='add'>+</div><div class='ctx'> 	shadow_acc_track_mask	= VMX_EPT_RWX_MASK;</div><div class='ctx'> 	shadow_host_writable_mask = EPT_SPTE_HOST_WRITABLE;</div><div class='ctx'> 	shadow_mmu_writable_mask  = EPT_SPTE_MMU_WRITABLE;</div><div class='hunk'>@@ -521,12 +516,6 @@ void kvm_mmu_reset_all_pte_masks(void)</div><div class='ctx'> 	shadow_x_mask		= 0;</div><div class='ctx'> 	shadow_present_mask	= PT_PRESENT_MASK;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * For shadow paging and NPT, KVM uses PAT entry '0' to encode WB</div><div class='del'>-	 * memtype in the SPTEs, i.e. relies on host MTRRs to provide the</div><div class='del'>-	 * correct memtype (WB is the "weakest" memtype).</div><div class='del'>-	 */</div><div class='del'>-	shadow_memtype_mask	= 0;</div><div class='ctx'> 	shadow_acc_track_mask	= 0;</div><div class='ctx'> 	shadow_me_mask		= 0;</div><div class='ctx'> 	shadow_me_value		= 0;</div><div class='head'>diff --git a/arch/x86/kvm/mmu/spte.h b/arch/x86/kvm/mmu/spte.h<br/>index 79cdceba9857..1e94f081bdaf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/spte.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/spte.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/spte.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/mmu/spte.h</a></div><div class='hunk'>@@ -187,7 +187,6 @@ extern u64 __read_mostly shadow_mmio_value;</div><div class='ctx'> extern u64 __read_mostly shadow_mmio_mask;</div><div class='ctx'> extern u64 __read_mostly shadow_mmio_access_mask;</div><div class='ctx'> extern u64 __read_mostly shadow_present_mask;</div><div class='del'>-extern u64 __read_mostly shadow_memtype_mask;</div><div class='ctx'> extern u64 __read_mostly shadow_me_value;</div><div class='ctx'> extern u64 __read_mostly shadow_me_mask;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kvm/mmu/tdp_mmu.c b/arch/x86/kvm/mmu/tdp_mmu.c<br/>index 7cc0564f5f97..405874f4d088 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/tdp_mmu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/mmu/tdp_mmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/mmu/tdp_mmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/mmu/tdp_mmu.c</a></div><div class='hunk'>@@ -40,7 +40,9 @@ void kvm_mmu_uninit_tdp_mmu(struct kvm *kvm)</div><div class='ctx'> 	kvm_tdp_mmu_invalidate_roots(kvm, KVM_VALID_ROOTS);</div><div class='ctx'> 	kvm_tdp_mmu_zap_invalidated_roots(kvm, false);</div><div class='ctx'> </div><div class='del'>-	WARN_ON(atomic64_read(&amp;kvm-&gt;arch.tdp_mmu_pages));</div><div class='add'>+#ifdef CONFIG_KVM_PROVE_MMU</div><div class='add'>+	KVM_MMU_WARN_ON(atomic64_read(&amp;kvm-&gt;arch.tdp_mmu_pages));</div><div class='add'>+#endif</div><div class='ctx'> 	WARN_ON(!list_empty(&amp;kvm-&gt;arch.tdp_mmu_roots));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -325,13 +327,17 @@ static void handle_changed_spte(struct kvm *kvm, int as_id, gfn_t gfn,</div><div class='ctx'> static void tdp_account_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_account_pgtable_pages((void *)sp-&gt;spt, +1);</div><div class='add'>+#ifdef CONFIG_KVM_PROVE_MMU</div><div class='ctx'> 	atomic64_inc(&amp;kvm-&gt;arch.tdp_mmu_pages);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tdp_unaccount_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='ctx'> 	kvm_account_pgtable_pages((void *)sp-&gt;spt, -1);</div><div class='add'>+#ifdef CONFIG_KVM_PROVE_MMU</div><div class='ctx'> 	atomic64_dec(&amp;kvm-&gt;arch.tdp_mmu_pages);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1624,21 +1630,21 @@ void kvm_tdp_mmu_try_split_huge_pages(struct kvm *kvm,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool tdp_mmu_need_write_protect(struct kvm_mmu_page *sp)</div><div class='add'>+static bool tdp_mmu_need_write_protect(struct kvm *kvm, struct kvm_mmu_page *sp)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * All TDP MMU shadow pages share the same role as their root, aside</div><div class='ctx'> 	 * from level, so it is valid to key off any shadow page to determine if</div><div class='ctx'> 	 * write protection is needed for an entire tree.</div><div class='ctx'> 	 */</div><div class='del'>-	return kvm_mmu_page_ad_need_write_protect(sp) || !kvm_ad_enabled;</div><div class='add'>+	return kvm_mmu_page_ad_need_write_protect(kvm, sp) || !kvm_ad_enabled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void clear_dirty_gfn_range(struct kvm *kvm, struct kvm_mmu_page *root,</div><div class='ctx'> 				  gfn_t start, gfn_t end)</div><div class='ctx'> {</div><div class='del'>-	const u64 dbit = tdp_mmu_need_write_protect(root) ? PT_WRITABLE_MASK :</div><div class='del'>-							    shadow_dirty_mask;</div><div class='add'>+	const u64 dbit = tdp_mmu_need_write_protect(kvm, root) ?</div><div class='add'>+			 PT_WRITABLE_MASK : shadow_dirty_mask;</div><div class='ctx'> 	struct tdp_iter iter;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='hunk'>@@ -1683,8 +1689,8 @@ void kvm_tdp_mmu_clear_dirty_slot(struct kvm *kvm,</div><div class='ctx'> static void clear_dirty_pt_masked(struct kvm *kvm, struct kvm_mmu_page *root,</div><div class='ctx'> 				  gfn_t gfn, unsigned long mask, bool wrprot)</div><div class='ctx'> {</div><div class='del'>-	const u64 dbit = (wrprot || tdp_mmu_need_write_protect(root)) ? PT_WRITABLE_MASK :</div><div class='del'>-									shadow_dirty_mask;</div><div class='add'>+	const u64 dbit = (wrprot || tdp_mmu_need_write_protect(kvm, root)) ?</div><div class='add'>+			  PT_WRITABLE_MASK : shadow_dirty_mask;</div><div class='ctx'> 	struct tdp_iter iter;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='hunk'>@@ -1905,16 +1911,13 @@ bool kvm_tdp_mmu_write_protect_gfn(struct kvm *kvm,</div><div class='ctx'>  *</div><div class='ctx'>  * Must be called between kvm_tdp_mmu_walk_lockless_{begin,end}.</div><div class='ctx'>  */</div><div class='del'>-int kvm_tdp_mmu_get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes,</div><div class='del'>-			 int *root_level)</div><div class='add'>+static int __kvm_tdp_mmu_get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes,</div><div class='add'>+				  struct kvm_mmu_page *root)</div><div class='ctx'> {</div><div class='del'>-	struct kvm_mmu_page *root = root_to_sp(vcpu-&gt;arch.mmu-&gt;root.hpa);</div><div class='ctx'> 	struct tdp_iter iter;</div><div class='ctx'> 	gfn_t gfn = addr &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	int leaf = -1;</div><div class='ctx'> </div><div class='del'>-	*root_level = vcpu-&gt;arch.mmu-&gt;root_role.level;</div><div class='del'>-</div><div class='ctx'> 	for_each_tdp_pte(iter, vcpu-&gt;kvm, root, gfn, gfn + 1) {</div><div class='ctx'> 		leaf = iter.level;</div><div class='ctx'> 		sptes[leaf] = iter.old_spte;</div><div class='hunk'>@@ -1923,6 +1926,36 @@ int kvm_tdp_mmu_get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes,</div><div class='ctx'> 	return leaf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int kvm_tdp_mmu_get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes,</div><div class='add'>+			 int *root_level)</div><div class='add'>+{</div><div class='add'>+	struct kvm_mmu_page *root = root_to_sp(vcpu-&gt;arch.mmu-&gt;root.hpa);</div><div class='add'>+	*root_level = vcpu-&gt;arch.mmu-&gt;root_role.level;</div><div class='add'>+</div><div class='add'>+	return __kvm_tdp_mmu_get_walk(vcpu, addr, sptes, root);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool kvm_tdp_mmu_gpa_is_mapped(struct kvm_vcpu *vcpu, u64 gpa)</div><div class='add'>+{</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	bool is_direct = kvm_is_addr_direct(kvm, gpa);</div><div class='add'>+	hpa_t root = is_direct ? vcpu-&gt;arch.mmu-&gt;root.hpa :</div><div class='add'>+				 vcpu-&gt;arch.mmu-&gt;mirror_root_hpa;</div><div class='add'>+	u64 sptes[PT64_ROOT_MAX_LEVEL + 1], spte;</div><div class='add'>+	int leaf;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	leaf = __kvm_tdp_mmu_get_walk(vcpu, gpa, sptes, root_to_sp(root));</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (leaf &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	spte = sptes[leaf];</div><div class='add'>+	return is_shadow_present_pte(spte) &amp;&amp; is_last_spte(spte, leaf);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_tdp_mmu_gpa_is_mapped);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Returns the last level spte pointer of the shadow page walk for the given</div><div class='ctx'>  * gpa, and sets *spte to the spte value. This spte may be non-preset. If no</div><div class='head'>diff --git a/arch/x86/kvm/smm.c b/arch/x86/kvm/smm.c<br/>index 699e551ec93b..9864c057187d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/smm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/smm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/smm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/smm.c</a></div><div class='hunk'>@@ -131,6 +131,7 @@ void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)</div><div class='ctx'> </div><div class='ctx'> 	kvm_mmu_reset_context(vcpu);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_smm_changed);</div><div class='ctx'> </div><div class='ctx'> void process_smi(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/kvm/smm.h b/arch/x86/kvm/smm.h<br/>index a1cf2ac5bd78..551703fbe200 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/smm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/smm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/smm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/smm.h</a></div><div class='hunk'>@@ -142,6 +142,9 @@ union kvm_smram {</div><div class='ctx'> </div><div class='ctx'> static inline int kvm_inject_smi(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='add'>+	if (!kvm_x86_call(has_emulated_msr)(vcpu-&gt;kvm, MSR_IA32_SMBASE))</div><div class='add'>+		return -ENOTTY;</div><div class='add'>+</div><div class='ctx'> 	kvm_make_request(KVM_REQ_SMI, vcpu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c<br/>index 65fd245a9953..067f8e3f5a0d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/avic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/avic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/avic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/svm/avic.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/irq_remapping.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "trace.h"</div><div class='ctx'> #include "lapic.h"</div><div class='hunk'>@@ -330,7 +331,7 @@ void avic_ring_doorbell(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	int cpu = READ_ONCE(vcpu-&gt;cpu);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu != get_cpu()) {</div><div class='del'>-		wrmsrl(MSR_AMD64_SVM_AVIC_DOORBELL, kvm_cpu_get_apicid(cpu));</div><div class='add'>+		wrmsrq(MSR_AMD64_SVM_AVIC_DOORBELL, kvm_cpu_get_apicid(cpu));</div><div class='ctx'> 		trace_kvm_avic_doorbell(vcpu-&gt;vcpu_id, kvm_cpu_get_apicid(cpu));</div><div class='ctx'> 	}</div><div class='ctx'> 	put_cpu();</div><div class='hunk'>@@ -796,12 +797,15 @@ static int svm_ir_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)</div><div class='ctx'> 	struct amd_svm_iommu_ir *ir;</div><div class='ctx'> 	u64 entry;</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON_ONCE(!pi-&gt;ir_data))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * In some cases, the existing irte is updated and re-set,</div><div class='ctx'> 	 * so we need to check here if it's already been * added</div><div class='ctx'> 	 * to the ir_list.</div><div class='ctx'> 	 */</div><div class='del'>-	if (pi-&gt;ir_data &amp;&amp; (pi-&gt;prev_ga_tag != 0)) {</div><div class='add'>+	if (pi-&gt;prev_ga_tag) {</div><div class='ctx'> 		struct kvm *kvm = svm-&gt;vcpu.kvm;</div><div class='ctx'> 		u32 vcpu_id = AVIC_GATAG_TO_VCPUID(pi-&gt;prev_ga_tag);</div><div class='ctx'> 		struct kvm_vcpu *prev_vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);</div><div class='hunk'>@@ -820,7 +824,7 @@ static int svm_ir_list_add(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)</div><div class='ctx'> 	 * Allocating new amd_iommu_pi_data, which will get</div><div class='ctx'> 	 * add to the per-vcpu ir_list.</div><div class='ctx'> 	 */</div><div class='del'>-	ir = kzalloc(sizeof(struct amd_svm_iommu_ir), GFP_KERNEL_ACCOUNT);</div><div class='add'>+	ir = kzalloc(sizeof(struct amd_svm_iommu_ir), GFP_ATOMIC | __GFP_ACCOUNT);</div><div class='ctx'> 	if (!ir) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -896,10 +900,10 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_kernel_irq_routing_entry *e;</div><div class='ctx'> 	struct kvm_irq_routing_table *irq_rt;</div><div class='add'>+	bool enable_remapped_mode = true;</div><div class='ctx'> 	int idx, ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_arch_has_assigned_device(kvm) ||</div><div class='del'>-	    !irq_remapping_cap(IRQ_POSTING_CAP))</div><div class='add'>+	if (!kvm_arch_has_assigned_device(kvm) || !kvm_arch_has_irq_bypass())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("SVM: %s: host_irq=%#x, guest_irq=%#x, set=%#x\n",</div><div class='hunk'>@@ -933,6 +937,8 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> 		    kvm_vcpu_apicv_active(&amp;svm-&gt;vcpu)) {</div><div class='ctx'> 			struct amd_iommu_pi_data pi;</div><div class='ctx'> </div><div class='add'>+			enable_remapped_mode = false;</div><div class='add'>+</div><div class='ctx'> 			/* Try to enable guest_mode in IRTE */</div><div class='ctx'> 			pi.base = __sme_set(page_to_phys(svm-&gt;avic_backing_page) &amp;</div><div class='ctx'> 					    AVIC_HPA_MASK);</div><div class='hunk'>@@ -951,33 +957,6 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (!ret &amp;&amp; pi.is_guest_mode)</div><div class='ctx'> 				svm_ir_list_add(svm, &amp;pi);</div><div class='del'>-		} else {</div><div class='del'>-			/* Use legacy mode in IRTE */</div><div class='del'>-			struct amd_iommu_pi_data pi;</div><div class='del'>-</div><div class='del'>-			/**</div><div class='del'>-			 * Here, pi is used to:</div><div class='del'>-			 * - Tell IOMMU to use legacy mode for this interrupt.</div><div class='del'>-			 * - Retrieve ga_tag of prior interrupt remapping data.</div><div class='del'>-			 */</div><div class='del'>-			pi.prev_ga_tag = 0;</div><div class='del'>-			pi.is_guest_mode = false;</div><div class='del'>-			ret = irq_set_vcpu_affinity(host_irq, &amp;pi);</div><div class='del'>-</div><div class='del'>-			/**</div><div class='del'>-			 * Check if the posted interrupt was previously</div><div class='del'>-			 * setup with the guest_mode by checking if the ga_tag</div><div class='del'>-			 * was cached. If so, we need to clean up the per-vcpu</div><div class='del'>-			 * ir_list.</div><div class='del'>-			 */</div><div class='del'>-			if (!ret &amp;&amp; pi.prev_ga_tag) {</div><div class='del'>-				int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag);</div><div class='del'>-				struct kvm_vcpu *vcpu;</div><div class='del'>-</div><div class='del'>-				vcpu = kvm_get_vcpu_by_id(kvm, id);</div><div class='del'>-				if (vcpu)</div><div class='del'>-					svm_ir_list_del(to_svm(vcpu), &amp;pi);</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!ret &amp;&amp; svm) {</div><div class='hunk'>@@ -993,6 +972,34 @@ int avic_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='add'>+	if (enable_remapped_mode) {</div><div class='add'>+		/* Use legacy mode in IRTE */</div><div class='add'>+		struct amd_iommu_pi_data pi;</div><div class='add'>+</div><div class='add'>+		/**</div><div class='add'>+		 * Here, pi is used to:</div><div class='add'>+		 * - Tell IOMMU to use legacy mode for this interrupt.</div><div class='add'>+		 * - Retrieve ga_tag of prior interrupt remapping data.</div><div class='add'>+		 */</div><div class='add'>+		pi.prev_ga_tag = 0;</div><div class='add'>+		pi.is_guest_mode = false;</div><div class='add'>+		ret = irq_set_vcpu_affinity(host_irq, &amp;pi);</div><div class='add'>+</div><div class='add'>+		/**</div><div class='add'>+		 * Check if the posted interrupt was previously</div><div class='add'>+		 * setup with the guest_mode by checking if the ga_tag</div><div class='add'>+		 * was cached. If so, we need to clean up the per-vcpu</div><div class='add'>+		 * ir_list.</div><div class='add'>+		 */</div><div class='add'>+		if (!ret &amp;&amp; pi.prev_ga_tag) {</div><div class='add'>+			int id = AVIC_GATAG_TO_VCPUID(pi.prev_ga_tag);</div><div class='add'>+			struct kvm_vcpu *vcpu;</div><div class='add'>+</div><div class='add'>+			vcpu = kvm_get_vcpu_by_id(kvm, id);</div><div class='add'>+			if (vcpu)</div><div class='add'>+				svm_ir_list_del(to_svm(vcpu), &amp;pi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> out:</div><div class='ctx'> 	srcu_read_unlock(&amp;kvm-&gt;irq_srcu, idx);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c<br/>index 0bc708ee2788..1aa0f07d3a63 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/sev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/sev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/sev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/svm/sev.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;asm/fpu/xcr.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/xstate.h&gt;</div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mmu.h"</div><div class='hunk'>@@ -2933,6 +2934,7 @@ void __init sev_set_cpu_caps(void)</div><div class='ctx'> void __init sev_hardware_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int eax, ebx, ecx, edx, sev_asid_count, sev_es_asid_count;</div><div class='add'>+	struct sev_platform_init_args init_args = {0};</div><div class='ctx'> 	bool sev_snp_supported = false;</div><div class='ctx'> 	bool sev_es_supported = false;</div><div class='ctx'> 	bool sev_supported = false;</div><div class='hunk'>@@ -3059,6 +3061,15 @@ out:</div><div class='ctx'> 	sev_supported_vmsa_features = 0;</div><div class='ctx'> 	if (sev_es_debug_swap_enabled)</div><div class='ctx'> 		sev_supported_vmsa_features |= SVM_SEV_FEAT_DEBUG_SWAP;</div><div class='add'>+</div><div class='add'>+	if (!sev_enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Do both SNP and SEV initialization at KVM module load.</div><div class='add'>+	 */</div><div class='add'>+	init_args.probe = true;</div><div class='add'>+	sev_platform_init(&amp;init_args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void sev_hardware_unsetup(void)</div><div class='hunk'>@@ -3074,6 +3085,8 @@ void sev_hardware_unsetup(void)</div><div class='ctx'> </div><div class='ctx'> 	misc_cg_set_capacity(MISC_CG_RES_SEV, 0);</div><div class='ctx'> 	misc_cg_set_capacity(MISC_CG_RES_SEV_ES, 0);</div><div class='add'>+</div><div class='add'>+	sev_platform_shutdown();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int sev_cpu_init(struct svm_cpu_data *sd)</div><div class='hunk'>@@ -3119,7 +3132,7 @@ static void sev_flush_encrypted_page(struct kvm_vcpu *vcpu, void *va)</div><div class='ctx'> 	 * back to WBINVD if this faults so as not to make any problems worse</div><div class='ctx'> 	 * by leaving stale encrypted data in the cache.</div><div class='ctx'> 	 */</div><div class='del'>-	if (WARN_ON_ONCE(wrmsrl_safe(MSR_AMD64_VM_PAGE_FLUSH, addr | asid)))</div><div class='add'>+	if (WARN_ON_ONCE(wrmsrq_safe(MSR_AMD64_VM_PAGE_FLUSH, addr | asid)))</div><div class='ctx'> 		goto do_wbinvd;</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='hunk'>@@ -3173,9 +3186,14 @@ skip_vmsa_free:</div><div class='ctx'> 		kvfree(svm-&gt;sev_es.ghcb_sa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 kvm_ghcb_get_sw_exit_code(struct vmcb_control_area *control)</div><div class='add'>+{</div><div class='add'>+	return (((u64)control-&gt;exit_code_hi) &lt;&lt; 32) | control-&gt;exit_code;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dump_ghcb(struct vcpu_svm *svm)</div><div class='ctx'> {</div><div class='del'>-	struct ghcb *ghcb = svm-&gt;sev_es.ghcb;</div><div class='add'>+	struct vmcb_control_area *control = &amp;svm-&gt;vmcb-&gt;control;</div><div class='ctx'> 	unsigned int nbits;</div><div class='ctx'> </div><div class='ctx'> 	/* Re-use the dump_invalid_vmcb module parameter */</div><div class='hunk'>@@ -3184,18 +3202,24 @@ static void dump_ghcb(struct vcpu_svm *svm)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	nbits = sizeof(ghcb-&gt;save.valid_bitmap) * 8;</div><div class='add'>+	nbits = sizeof(svm-&gt;sev_es.valid_bitmap) * 8;</div><div class='ctx'> </div><div class='del'>-	pr_err("GHCB (GPA=%016llx):\n", svm-&gt;vmcb-&gt;control.ghcb_gpa);</div><div class='add'>+	/*</div><div class='add'>+	 * Print KVM's snapshot of the GHCB values that were (unsuccessfully)</div><div class='add'>+	 * used to handle the exit.  If the guest has since modified the GHCB</div><div class='add'>+	 * itself, dumping the raw GHCB won't help debug why KVM was unable to</div><div class='add'>+	 * handle the VMGEXIT that KVM observed.</div><div class='add'>+	 */</div><div class='add'>+	pr_err("GHCB (GPA=%016llx) snapshot:\n", svm-&gt;vmcb-&gt;control.ghcb_gpa);</div><div class='ctx'> 	pr_err("%-20s%016llx is_valid: %u\n", "sw_exit_code",</div><div class='del'>-	       ghcb-&gt;save.sw_exit_code, ghcb_sw_exit_code_is_valid(ghcb));</div><div class='add'>+	       kvm_ghcb_get_sw_exit_code(control), kvm_ghcb_sw_exit_code_is_valid(svm));</div><div class='ctx'> 	pr_err("%-20s%016llx is_valid: %u\n", "sw_exit_info_1",</div><div class='del'>-	       ghcb-&gt;save.sw_exit_info_1, ghcb_sw_exit_info_1_is_valid(ghcb));</div><div class='add'>+	       control-&gt;exit_info_1, kvm_ghcb_sw_exit_info_1_is_valid(svm));</div><div class='ctx'> 	pr_err("%-20s%016llx is_valid: %u\n", "sw_exit_info_2",</div><div class='del'>-	       ghcb-&gt;save.sw_exit_info_2, ghcb_sw_exit_info_2_is_valid(ghcb));</div><div class='add'>+	       control-&gt;exit_info_2, kvm_ghcb_sw_exit_info_2_is_valid(svm));</div><div class='ctx'> 	pr_err("%-20s%016llx is_valid: %u\n", "sw_scratch",</div><div class='del'>-	       ghcb-&gt;save.sw_scratch, ghcb_sw_scratch_is_valid(ghcb));</div><div class='del'>-	pr_err("%-20s%*pb\n", "valid_bitmap", nbits, ghcb-&gt;save.valid_bitmap);</div><div class='add'>+	       svm-&gt;sev_es.sw_scratch, kvm_ghcb_sw_scratch_is_valid(svm));</div><div class='add'>+	pr_err("%-20s%*pb\n", "valid_bitmap", nbits, svm-&gt;sev_es.valid_bitmap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sev_es_sync_to_ghcb(struct vcpu_svm *svm)</div><div class='hunk'>@@ -3266,11 +3290,6 @@ static void sev_es_sync_from_ghcb(struct vcpu_svm *svm)</div><div class='ctx'> 	memset(ghcb-&gt;save.valid_bitmap, 0, sizeof(ghcb-&gt;save.valid_bitmap));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 kvm_ghcb_get_sw_exit_code(struct vmcb_control_area *control)</div><div class='del'>-{</div><div class='del'>-	return (((u64)control-&gt;exit_code_hi) &lt;&lt; 32) | control-&gt;exit_code;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sev_es_validate_vmgexit(struct vcpu_svm *svm)</div><div class='ctx'> {</div><div class='ctx'> 	struct vmcb_control_area *control = &amp;svm-&gt;vmcb-&gt;control;</div><div class='head'>diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c<br/>index d5d0c5c3300b..ffb34dadff1c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/svm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/svm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/svm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/svm/svm.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='hunk'>@@ -475,24 +476,18 @@ static void svm_inject_exception(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static void svm_init_erratum_383(void)</div><div class='ctx'> {</div><div class='del'>-	u32 low, high;</div><div class='del'>-	int err;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	if (!static_cpu_has_bug(X86_BUG_AMD_TLB_MMATCH))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Use _safe variants to not break nested virtualization */</div><div class='del'>-	val = native_read_msr_safe(MSR_AMD64_DC_CFG, &amp;err);</div><div class='del'>-	if (err)</div><div class='add'>+	if (native_read_msr_safe(MSR_AMD64_DC_CFG, &amp;val))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	val |= (1ULL &lt;&lt; 47);</div><div class='ctx'> </div><div class='del'>-	low  = lower_32_bits(val);</div><div class='del'>-	high = upper_32_bits(val);</div><div class='del'>-</div><div class='del'>-	native_write_msr_safe(MSR_AMD64_DC_CFG, low, high);</div><div class='add'>+	native_write_msr_safe(MSR_AMD64_DC_CFG, val);</div><div class='ctx'> </div><div class='ctx'> 	erratum_383_found = true;</div><div class='ctx'> }</div><div class='hunk'>@@ -566,7 +561,7 @@ static void __svm_write_tsc_multiplier(u64 multiplier)</div><div class='ctx'> 	if (multiplier == __this_cpu_read(current_tsc_ratio))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_AMD64_TSC_RATIO, multiplier);</div><div class='add'>+	wrmsrq(MSR_AMD64_TSC_RATIO, multiplier);</div><div class='ctx'> 	__this_cpu_write(current_tsc_ratio, multiplier);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -579,15 +574,15 @@ static inline void kvm_cpu_svm_disable(void)</div><div class='ctx'> {</div><div class='ctx'> 	uint64_t efer;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_VM_HSAVE_PA, 0);</div><div class='del'>-	rdmsrl(MSR_EFER, efer);</div><div class='add'>+	wrmsrq(MSR_VM_HSAVE_PA, 0);</div><div class='add'>+	rdmsrq(MSR_EFER, efer);</div><div class='ctx'> 	if (efer &amp; EFER_SVME) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Force GIF=1 prior to disabling SVM, e.g. to ensure INIT and</div><div class='ctx'> 		 * NMI aren't blocked.</div><div class='ctx'> 		 */</div><div class='ctx'> 		stgi();</div><div class='del'>-		wrmsrl(MSR_EFER, efer &amp; ~EFER_SVME);</div><div class='add'>+		wrmsrq(MSR_EFER, efer &amp; ~EFER_SVME);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -607,9 +602,6 @@ static void svm_disable_virtualization_cpu(void)</div><div class='ctx'> 	kvm_cpu_svm_disable();</div><div class='ctx'> </div><div class='ctx'> 	amd_pmu_disable_virt();</div><div class='del'>-</div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_SRSO_BP_SPEC_REDUCE))</div><div class='del'>-		msr_clear_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int svm_enable_virtualization_cpu(void)</div><div class='hunk'>@@ -619,7 +611,7 @@ static int svm_enable_virtualization_cpu(void)</div><div class='ctx'> 	uint64_t efer;</div><div class='ctx'> 	int me = raw_smp_processor_id();</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_EFER, efer);</div><div class='add'>+	rdmsrq(MSR_EFER, efer);</div><div class='ctx'> 	if (efer &amp; EFER_SVME)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='hunk'>@@ -629,9 +621,9 @@ static int svm_enable_virtualization_cpu(void)</div><div class='ctx'> 	sd-&gt;next_asid = sd-&gt;max_asid + 1;</div><div class='ctx'> 	sd-&gt;min_asid = max_sev_asid + 1;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_EFER, efer | EFER_SVME);</div><div class='add'>+	wrmsrq(MSR_EFER, efer | EFER_SVME);</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_VM_HSAVE_PA, sd-&gt;save_area_pa);</div><div class='add'>+	wrmsrq(MSR_VM_HSAVE_PA, sd-&gt;save_area_pa);</div><div class='ctx'> </div><div class='ctx'> 	if (static_cpu_has(X86_FEATURE_TSCRATEMSR)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -652,13 +644,12 @@ static int svm_enable_virtualization_cpu(void)</div><div class='ctx'> 	 * erratum is present everywhere).</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_has(&amp;boot_cpu_data, X86_FEATURE_OSVW)) {</div><div class='del'>-		uint64_t len, status = 0;</div><div class='add'>+		u64 len, status = 0;</div><div class='ctx'> 		int err;</div><div class='ctx'> </div><div class='del'>-		len = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &amp;err);</div><div class='add'>+		err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &amp;len);</div><div class='ctx'> 		if (!err)</div><div class='del'>-			status = native_read_msr_safe(MSR_AMD64_OSVW_STATUS,</div><div class='del'>-						      &amp;err);</div><div class='add'>+			err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &amp;status);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='ctx'> 			osvw_status = osvw_len = 0;</div><div class='hunk'>@@ -687,9 +678,6 @@ static int svm_enable_virtualization_cpu(void)</div><div class='ctx'> 		rdmsr(MSR_TSC_AUX, sev_es_host_save_area(sd)-&gt;tsc_aux, msr_hi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_SRSO_BP_SPEC_REDUCE))</div><div class='del'>-		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1518,6 +1506,63 @@ static void svm_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	__free_pages(virt_to_page(svm-&gt;msrpm), get_order(MSRPM_SIZE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_CPU_MITIGATIONS</div><div class='add'>+static DEFINE_SPINLOCK(srso_lock);</div><div class='add'>+static atomic_t srso_nr_vms;</div><div class='add'>+</div><div class='add'>+static void svm_srso_clear_bp_spec_reduce(void *ign)</div><div class='add'>+{</div><div class='add'>+	struct svm_cpu_data *sd = this_cpu_ptr(&amp;svm_data);</div><div class='add'>+</div><div class='add'>+	if (!sd-&gt;bp_spec_reduce_set)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	msr_clear_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT);</div><div class='add'>+	sd-&gt;bp_spec_reduce_set = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void svm_srso_vm_destroy(void)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_SRSO_BP_SPEC_REDUCE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (atomic_dec_return(&amp;srso_nr_vms))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	guard(spinlock)(&amp;srso_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Verify a new VM didn't come along, acquire the lock, and increment</div><div class='add'>+	 * the count before this task acquired the lock.</div><div class='add'>+	 */</div><div class='add'>+	if (atomic_read(&amp;srso_nr_vms))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	on_each_cpu(svm_srso_clear_bp_spec_reduce, NULL, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void svm_srso_vm_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_SRSO_BP_SPEC_REDUCE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Acquire the lock on 0 =&gt; 1 transitions to ensure a potential 1 =&gt; 0</div><div class='add'>+	 * transition, i.e. destroying the last VM, is fully complete, e.g. so</div><div class='add'>+	 * that a delayed IPI doesn't clear BP_SPEC_REDUCE after a vCPU runs.</div><div class='add'>+	 */</div><div class='add'>+	if (atomic_inc_not_zero(&amp;srso_nr_vms))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	guard(spinlock)(&amp;srso_lock);</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;srso_nr_vms);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void svm_srso_vm_init(void) { }</div><div class='add'>+static void svm_srso_vm_destroy(void) { }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void svm_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_svm *svm = to_svm(vcpu);</div><div class='hunk'>@@ -1550,6 +1595,11 @@ static void svm_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	    (!boot_cpu_has(X86_FEATURE_V_TSC_AUX) || !sev_es_guest(vcpu-&gt;kvm)))</div><div class='ctx'> 		kvm_set_user_return_msr(tsc_aux_uret_slot, svm-&gt;tsc_aux, -1ull);</div><div class='ctx'> </div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_SRSO_BP_SPEC_REDUCE) &amp;&amp;</div><div class='add'>+	    !sd-&gt;bp_spec_reduce_set) {</div><div class='add'>+		sd-&gt;bp_spec_reduce_set = true;</div><div class='add'>+		msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT);</div><div class='add'>+	}</div><div class='ctx'> 	svm-&gt;guest_state_loaded = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2149,14 +2199,13 @@ static int ac_interception(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static bool is_erratum_383(void)</div><div class='ctx'> {</div><div class='del'>-	int err, i;</div><div class='add'>+	int i;</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='ctx'> 	if (!erratum_383_found)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	value = native_read_msr_safe(MSR_IA32_MC0_STATUS, &amp;err);</div><div class='del'>-	if (err)</div><div class='add'>+	if (native_read_msr_safe(MSR_IA32_MC0_STATUS, &amp;value))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Bit 62 may or may not be set for this mce */</div><div class='hunk'>@@ -2167,17 +2216,11 @@ static bool is_erratum_383(void)</div><div class='ctx'> </div><div class='ctx'> 	/* Clear MCi_STATUS registers */</div><div class='ctx'> 	for (i = 0; i &lt; 6; ++i)</div><div class='del'>-		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0);</div><div class='del'>-</div><div class='del'>-	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &amp;err);</div><div class='del'>-	if (!err) {</div><div class='del'>-		u32 low, high;</div><div class='add'>+		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);</div><div class='ctx'> </div><div class='add'>+	if (!native_read_msr_safe(MSR_IA32_MCG_STATUS, &amp;value)) {</div><div class='ctx'> 		value &amp;= ~(1ULL &lt;&lt; 2);</div><div class='del'>-		low    = lower_32_bits(value);</div><div class='del'>-		high   = upper_32_bits(value);</div><div class='del'>-</div><div class='del'>-		native_write_msr_safe(MSR_IA32_MCG_STATUS, low, high);</div><div class='add'>+		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Flush tlb to evict multi-match entries */</div><div class='hunk'>@@ -2231,6 +2274,10 @@ static int shutdown_interception(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!sev_es_guest(vcpu-&gt;kvm)) {</div><div class='ctx'> 		clear_page(svm-&gt;vmcb);</div><div class='add'>+#ifdef CONFIG_KVM_SMM</div><div class='add'>+		if (is_smm(vcpu))</div><div class='add'>+			kvm_smm_changed(vcpu, false);</div><div class='add'>+#endif</div><div class='ctx'> 		kvm_vcpu_reset(vcpu, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5036,6 +5083,8 @@ static void svm_vm_destroy(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	avic_vm_destroy(kvm);</div><div class='ctx'> 	sev_vm_destroy(kvm);</div><div class='add'>+</div><div class='add'>+	svm_srso_vm_destroy();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int svm_vm_init(struct kvm *kvm)</div><div class='hunk'>@@ -5061,6 +5110,7 @@ static int svm_vm_init(struct kvm *kvm)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	svm_srso_vm_init();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5232,7 +5282,7 @@ static __init void svm_adjust_mmio_mask(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* If memory encryption is not enabled, use existing mask */</div><div class='del'>-	rdmsrl(MSR_AMD64_SYSCFG, msr);</div><div class='add'>+	rdmsrq(MSR_AMD64_SYSCFG, msr);</div><div class='ctx'> 	if (!(msr &amp; MSR_AMD64_SYSCFG_MEM_ENCRYPT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -5501,6 +5551,7 @@ static __init int svm_hardware_setup(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	allow_smaller_maxphyaddr = !npt_enabled;</div><div class='ctx'> </div><div class='add'>+	kvm_caps.inapplicable_quirks &amp;= ~KVM_X86_QUIRK_CD_NW_CLEARED;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='head'>diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h<br/>index d4490eaed55d..f16b068c4228 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/svm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/svm/svm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/svm/svm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/svm/svm.h</a></div><div class='hunk'>@@ -335,6 +335,8 @@ struct svm_cpu_data {</div><div class='ctx'> 	u32 next_asid;</div><div class='ctx'> 	u32 min_asid;</div><div class='ctx'> </div><div class='add'>+	bool bp_spec_reduce_set;</div><div class='add'>+</div><div class='ctx'> 	struct vmcb *save_area;</div><div class='ctx'> 	unsigned long save_area_pa;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kvm/trace.h b/arch/x86/kvm/trace.h<br/>index ccda95e53f62..ba736cbb0587 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/trace.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/trace.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/trace.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/trace.h</a></div><div class='hunk'>@@ -11,6 +11,13 @@</div><div class='ctx'> #undef TRACE_SYSTEM</div><div class='ctx'> #define TRACE_SYSTEM kvm</div><div class='ctx'> </div><div class='add'>+#ifdef CREATE_TRACE_POINTS</div><div class='add'>+#define tracing_kvm_rip_read(vcpu) ({					\</div><div class='add'>+	typeof(vcpu) __vcpu = vcpu;					\</div><div class='add'>+	__vcpu-&gt;arch.guest_state_protected ? 0 : kvm_rip_read(__vcpu);	\</div><div class='add'>+	})</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Tracepoint for guest mode entry.</div><div class='ctx'>  */</div><div class='hunk'>@@ -28,7 +35,7 @@ TRACE_EVENT(kvm_entry,</div><div class='ctx'> </div><div class='ctx'> 	TP_fast_assign(</div><div class='ctx'> 		__entry-&gt;vcpu_id        = vcpu-&gt;vcpu_id;</div><div class='del'>-		__entry-&gt;rip		= kvm_rip_read(vcpu);</div><div class='add'>+		__entry-&gt;rip		= tracing_kvm_rip_read(vcpu);</div><div class='ctx'> 		__entry-&gt;immediate_exit	= force_immediate_exit;</div><div class='ctx'> </div><div class='ctx'> 		kvm_x86_call(get_entry_info)(vcpu, &amp;__entry-&gt;intr_info,</div><div class='hunk'>@@ -319,7 +326,7 @@ TRACE_EVENT(name,							     \</div><div class='ctx'> 	),								     \</div><div class='ctx'> 									     \</div><div class='ctx'> 	TP_fast_assign(							     \</div><div class='del'>-		__entry-&gt;guest_rip	= kvm_rip_read(vcpu);		     \</div><div class='add'>+		__entry-&gt;guest_rip	= tracing_kvm_rip_read(vcpu);		     \</div><div class='ctx'> 		__entry-&gt;isa            = isa;				     \</div><div class='ctx'> 		__entry-&gt;vcpu_id        = vcpu-&gt;vcpu_id;		     \</div><div class='ctx'> 		__entry-&gt;requests       = READ_ONCE(vcpu-&gt;requests);	     \</div><div class='hunk'>@@ -423,7 +430,7 @@ TRACE_EVENT(kvm_page_fault,</div><div class='ctx'> </div><div class='ctx'> 	TP_fast_assign(</div><div class='ctx'> 		__entry-&gt;vcpu_id	= vcpu-&gt;vcpu_id;</div><div class='del'>-		__entry-&gt;guest_rip	= kvm_rip_read(vcpu);</div><div class='add'>+		__entry-&gt;guest_rip	= tracing_kvm_rip_read(vcpu);</div><div class='ctx'> 		__entry-&gt;fault_address	= fault_address;</div><div class='ctx'> 		__entry-&gt;error_code	= error_code;</div><div class='ctx'> 	),</div><div class='head'>diff --git a/arch/x86/kvm/vmx/common.h b/arch/x86/kvm/vmx/common.h<br/>new file mode 100644<br/>index 000000000000..8f46a06e2c44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/common.h</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+#ifndef __KVM_X86_VMX_COMMON_H</div><div class='add'>+#define __KVM_X86_VMX_COMMON_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+#include &lt;asm/posted_intr.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mmu.h"</div><div class='add'>+</div><div class='add'>+union vmx_exit_reason {</div><div class='add'>+	struct {</div><div class='add'>+		u32	basic			: 16;</div><div class='add'>+		u32	reserved16		: 1;</div><div class='add'>+		u32	reserved17		: 1;</div><div class='add'>+		u32	reserved18		: 1;</div><div class='add'>+		u32	reserved19		: 1;</div><div class='add'>+		u32	reserved20		: 1;</div><div class='add'>+		u32	reserved21		: 1;</div><div class='add'>+		u32	reserved22		: 1;</div><div class='add'>+		u32	reserved23		: 1;</div><div class='add'>+		u32	reserved24		: 1;</div><div class='add'>+		u32	reserved25		: 1;</div><div class='add'>+		u32	bus_lock_detected	: 1;</div><div class='add'>+		u32	enclave_mode		: 1;</div><div class='add'>+		u32	smi_pending_mtf		: 1;</div><div class='add'>+		u32	smi_from_vmx_root	: 1;</div><div class='add'>+		u32	reserved30		: 1;</div><div class='add'>+		u32	failed_vmentry		: 1;</div><div class='add'>+	};</div><div class='add'>+	u32 full;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vcpu_vt {</div><div class='add'>+	/* Posted interrupt descriptor */</div><div class='add'>+	struct pi_desc pi_desc;</div><div class='add'>+</div><div class='add'>+	/* Used if this vCPU is waiting for PI notification wakeup. */</div><div class='add'>+	struct list_head pi_wakeup_list;</div><div class='add'>+</div><div class='add'>+	union vmx_exit_reason exit_reason;</div><div class='add'>+</div><div class='add'>+	unsigned long	exit_qualification;</div><div class='add'>+	u32		exit_intr_info;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If true, guest state has been loaded into hardware, and host state</div><div class='add'>+	 * saved into vcpu_{vt,vmx,tdx}.  If false, host state is loaded into</div><div class='add'>+	 * hardware.</div><div class='add'>+	 */</div><div class='add'>+	bool		guest_state_loaded;</div><div class='add'>+	bool		emulation_required;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+	u64		msr_host_kernel_gs_base;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	unsigned long	host_debugctlmsr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_INTEL_TDX</div><div class='add'>+</div><div class='add'>+static __always_inline bool is_td(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return kvm-&gt;arch.vm_type == KVM_X86_TDX_VM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline bool is_td_vcpu(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return is_td(vcpu-&gt;kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline bool is_td(struct kvm *kvm) { return false; }</div><div class='add'>+static inline bool is_td_vcpu(struct kvm_vcpu *vcpu) { return false; }</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static inline bool vt_is_tdx_private_gpa(struct kvm *kvm, gpa_t gpa)</div><div class='add'>+{</div><div class='add'>+	/* For TDX the direct mask is the shared mask. */</div><div class='add'>+	return !kvm_is_addr_direct(kvm, gpa);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __vmx_handle_ept_violation(struct kvm_vcpu *vcpu, gpa_t gpa,</div><div class='add'>+					     unsigned long exit_qualification)</div><div class='add'>+{</div><div class='add'>+	u64 error_code;</div><div class='add'>+</div><div class='add'>+	/* Is it a read fault? */</div><div class='add'>+	error_code = (exit_qualification &amp; EPT_VIOLATION_ACC_READ)</div><div class='add'>+		     ? PFERR_USER_MASK : 0;</div><div class='add'>+	/* Is it a write fault? */</div><div class='add'>+	error_code |= (exit_qualification &amp; EPT_VIOLATION_ACC_WRITE)</div><div class='add'>+		      ? PFERR_WRITE_MASK : 0;</div><div class='add'>+	/* Is it a fetch fault? */</div><div class='add'>+	error_code |= (exit_qualification &amp; EPT_VIOLATION_ACC_INSTR)</div><div class='add'>+		      ? PFERR_FETCH_MASK : 0;</div><div class='add'>+	/* ept page table entry is present? */</div><div class='add'>+	error_code |= (exit_qualification &amp; EPT_VIOLATION_PROT_MASK)</div><div class='add'>+		      ? PFERR_PRESENT_MASK : 0;</div><div class='add'>+</div><div class='add'>+	if (error_code &amp; EPT_VIOLATION_GVA_IS_VALID)</div><div class='add'>+		error_code |= (exit_qualification &amp; EPT_VIOLATION_GVA_TRANSLATED) ?</div><div class='add'>+			      PFERR_GUEST_FINAL_MASK : PFERR_GUEST_PAGE_MASK;</div><div class='add'>+</div><div class='add'>+	if (vt_is_tdx_private_gpa(vcpu-&gt;kvm, gpa))</div><div class='add'>+		error_code |= PFERR_PRIVATE_ACCESS;</div><div class='add'>+</div><div class='add'>+	return kvm_mmu_page_fault(vcpu, gpa, error_code, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu,</div><div class='add'>+						     int pi_vec)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_SMP</div><div class='add'>+	if (vcpu-&gt;mode == IN_GUEST_MODE) {</div><div class='add'>+		/*</div><div class='add'>+		 * The vector of the virtual has already been set in the PIR.</div><div class='add'>+		 * Send a notification event to deliver the virtual interrupt</div><div class='add'>+		 * unless the vCPU is the currently running vCPU, i.e. the</div><div class='add'>+		 * event is being sent from a fastpath VM-Exit handler, in</div><div class='add'>+		 * which case the PIR will be synced to the vIRR before</div><div class='add'>+		 * re-entering the guest.</div><div class='add'>+		 *</div><div class='add'>+		 * When the target is not the running vCPU, the following</div><div class='add'>+		 * possibilities emerge:</div><div class='add'>+		 *</div><div class='add'>+		 * Case 1: vCPU stays in non-root mode. Sending a notification</div><div class='add'>+		 * event posts the interrupt to the vCPU.</div><div class='add'>+		 *</div><div class='add'>+		 * Case 2: vCPU exits to root mode and is still runnable. The</div><div class='add'>+		 * PIR will be synced to the vIRR before re-entering the guest.</div><div class='add'>+		 * Sending a notification event is ok as the host IRQ handler</div><div class='add'>+		 * will ignore the spurious event.</div><div class='add'>+		 *</div><div class='add'>+		 * Case 3: vCPU exits to root mode and is blocked. vcpu_block()</div><div class='add'>+		 * has already synced PIR to vIRR and never blocks the vCPU if</div><div class='add'>+		 * the vIRR is not empty. Therefore, a blocked vCPU here does</div><div class='add'>+		 * not wait for any requested interrupts in PIR, and sending a</div><div class='add'>+		 * notification event also results in a benign, spurious event.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		if (vcpu != kvm_get_running_vcpu())</div><div class='add'>+			__apic_send_IPI_mask(get_cpu_mask(vcpu-&gt;cpu), pi_vec);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	/*</div><div class='add'>+	 * The vCPU isn't in the guest; wake the vCPU in case it is blocking,</div><div class='add'>+	 * otherwise do nothing as KVM will grab the highest priority pending</div><div class='add'>+	 * IRQ via -&gt;sync_pir_to_irr() in vcpu_enter_guest().</div><div class='add'>+	 */</div><div class='add'>+	kvm_vcpu_wake_up(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Post an interrupt to a vCPU's PIR and trigger the vCPU to process the</div><div class='add'>+ * interrupt if necessary.</div><div class='add'>+ */</div><div class='add'>+static inline void __vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu,</div><div class='add'>+						  struct pi_desc *pi_desc, int vector)</div><div class='add'>+{</div><div class='add'>+	if (pi_test_and_set_pir(vector, pi_desc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* If a previous notification has sent the IPI, nothing to do.  */</div><div class='add'>+	if (pi_test_and_set_on(pi_desc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The implied barrier in pi_test_and_set_on() pairs with the smp_mb_*()</div><div class='add'>+	 * after setting vcpu-&gt;mode in vcpu_enter_guest(), thus the vCPU is</div><div class='add'>+	 * guaranteed to see PID.ON=1 and sync the PIR to IRR if triggering a</div><div class='add'>+	 * posted interrupt "fails" because vcpu-&gt;mode != IN_GUEST_MODE.</div><div class='add'>+	 */</div><div class='add'>+	kvm_vcpu_trigger_posted_interrupt(vcpu, POSTED_INTR_VECTOR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+noinstr void vmx_handle_nmi(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='add'>+#endif /* __KVM_X86_VMX_COMMON_H */</div><div class='head'>diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c<br/>index 43ee9ed11291..94d5d907d37b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/main.c</a></div><div class='hunk'>@@ -3,9 +3,890 @@</div><div class='ctx'> </div><div class='ctx'> #include "x86_ops.h"</div><div class='ctx'> #include "vmx.h"</div><div class='add'>+#include "mmu.h"</div><div class='ctx'> #include "nested.h"</div><div class='ctx'> #include "pmu.h"</div><div class='ctx'> #include "posted_intr.h"</div><div class='add'>+#include "tdx.h"</div><div class='add'>+#include "tdx_arch.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_INTEL_TDX</div><div class='add'>+static_assert(offsetof(struct vcpu_vmx, vt) == offsetof(struct vcpu_tdx, vt));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void vt_disable_virtualization_cpu(void)</div><div class='add'>+{</div><div class='add'>+	/* Note, TDX *and* VMX need to be disabled if TDX is enabled. */</div><div class='add'>+	if (enable_tdx)</div><div class='add'>+		tdx_disable_virtualization_cpu();</div><div class='add'>+	vmx_disable_virtualization_cpu();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int vt_hardware_setup(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vmx_hardware_setup();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Update vt_x86_ops::vm_size here so it is ready before</div><div class='add'>+	 * kvm_ops_update() is called in kvm_x86_vendor_init().</div><div class='add'>+	 *</div><div class='add'>+	 * Note, the actual bringing up of TDX must be done after</div><div class='add'>+	 * kvm_ops_update() because enabling TDX requires enabling</div><div class='add'>+	 * hardware virtualization first, i.e., all online CPUs must</div><div class='add'>+	 * be in post-VMXON state.  This means the @vm_size here</div><div class='add'>+	 * may be updated to TDX's size but TDX may fail to enable</div><div class='add'>+	 * at later time.</div><div class='add'>+	 *</div><div class='add'>+	 * The VMX/VT code could update kvm_x86_ops::vm_size again</div><div class='add'>+	 * after bringing up TDX, but this would require exporting</div><div class='add'>+	 * either kvm_x86_ops or kvm_ops_update() from the base KVM</div><div class='add'>+	 * module, which looks overkill.  Anyway, the worst case here</div><div class='add'>+	 * is KVM may allocate couple of more bytes than needed for</div><div class='add'>+	 * each VM.</div><div class='add'>+	 */</div><div class='add'>+	if (enable_tdx) {</div><div class='add'>+		vt_x86_ops.vm_size = max_t(unsigned int, vt_x86_ops.vm_size,</div><div class='add'>+				sizeof(struct kvm_tdx));</div><div class='add'>+		/*</div><div class='add'>+		 * Note, TDX may fail to initialize in a later time in</div><div class='add'>+		 * vt_init(), in which case it is not necessary to setup</div><div class='add'>+		 * those callbacks.  But making them valid here even</div><div class='add'>+		 * when TDX fails to init later is fine because those</div><div class='add'>+		 * callbacks won't be called if the VM isn't TDX guest.</div><div class='add'>+		 */</div><div class='add'>+		vt_x86_ops.link_external_spt = tdx_sept_link_private_spt;</div><div class='add'>+		vt_x86_ops.set_external_spte = tdx_sept_set_private_spte;</div><div class='add'>+		vt_x86_ops.free_external_spt = tdx_sept_free_private_spt;</div><div class='add'>+		vt_x86_ops.remove_external_spte = tdx_sept_remove_private_spte;</div><div class='add'>+		vt_x86_ops.protected_apic_has_interrupt = tdx_protected_apic_has_interrupt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_vm_init(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	if (is_td(kvm))</div><div class='add'>+		return tdx_vm_init(kvm);</div><div class='add'>+</div><div class='add'>+	return vmx_vm_init(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_vm_pre_destroy(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	if (is_td(kvm))</div><div class='add'>+		return tdx_mmu_release_hkid(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_vm_destroy(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	if (is_td(kvm))</div><div class='add'>+               return tdx_vm_destroy(kvm);</div><div class='add'>+</div><div class='add'>+       vmx_vm_destroy(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_vcpu_precreate(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	if (is_td(kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_vcpu_precreate(kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return tdx_vcpu_create(vcpu);</div><div class='add'>+</div><div class='add'>+	return vmx_vcpu_create(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_vcpu_free(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_vcpu_free(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_vcpu_reset(vcpu, init_event);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_vcpu_reset(vcpu, init_event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_vcpu_load(vcpu, cpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_vcpu_load(vcpu, cpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_update_cpu_dirty_logging(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Basic TDX does not support feature PML. KVM does not enable PML in</div><div class='add'>+	 * TD's VMCS, nor does it allocate or flush PML buffer for TDX.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON_ONCE(is_td_vcpu(vcpu)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_update_cpu_dirty_logging(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_prepare_switch_to_guest(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_prepare_switch_to_guest(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_vcpu_put(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_vcpu_put(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_vcpu_pre_run(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return tdx_vcpu_pre_run(vcpu);</div><div class='add'>+</div><div class='add'>+	return vmx_vcpu_pre_run(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static fastpath_t vt_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return tdx_vcpu_run(vcpu, force_immediate_exit);</div><div class='add'>+</div><div class='add'>+	return vmx_vcpu_run(vcpu, force_immediate_exit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_handle_exit(struct kvm_vcpu *vcpu,</div><div class='add'>+			  enum exit_fastpath_completion fastpath)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return tdx_handle_exit(vcpu, fastpath);</div><div class='add'>+</div><div class='add'>+	return vmx_handle_exit(vcpu, fastpath);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(is_td_vcpu(vcpu)))</div><div class='add'>+		return tdx_set_msr(vcpu, msr_info);</div><div class='add'>+</div><div class='add'>+	return vmx_set_msr(vcpu, msr_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The kvm parameter can be NULL (module initialization, or invocation before</div><div class='add'>+ * VM creation). Be sure to check the kvm parameter before using it.</div><div class='add'>+ */</div><div class='add'>+static bool vt_has_emulated_msr(struct kvm *kvm, u32 index)</div><div class='add'>+{</div><div class='add'>+	if (kvm &amp;&amp; is_td(kvm))</div><div class='add'>+		return tdx_has_emulated_msr(index);</div><div class='add'>+</div><div class='add'>+	return vmx_has_emulated_msr(kvm, index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(is_td_vcpu(vcpu)))</div><div class='add'>+		return tdx_get_msr(vcpu, msr_info);</div><div class='add'>+</div><div class='add'>+	return vmx_get_msr(vcpu, msr_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_msr_filter_changed(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * TDX doesn't allow VMM to configure interception of MSR accesses.</div><div class='add'>+	 * TDX guest requests MSR accesses by calling TDVMCALL.  The MSR</div><div class='add'>+	 * filters will be applied when handling the TDVMCALL for RDMSR/WRMSR</div><div class='add'>+	 * if the userspace has set any.</div><div class='add'>+	 */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_msr_filter_changed(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_complete_emulated_msr(struct kvm_vcpu *vcpu, int err)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return tdx_complete_emulated_msr(vcpu, err);</div><div class='add'>+</div><div class='add'>+	return kvm_complete_insn_gp(vcpu, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_SMM</div><div class='add'>+static int vt_smi_allowed(struct kvm_vcpu *vcpu, bool for_injection)</div><div class='add'>+{</div><div class='add'>+	if (KVM_BUG_ON(is_td_vcpu(vcpu), vcpu-&gt;kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_smi_allowed(vcpu, for_injection);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_enter_smm(struct kvm_vcpu *vcpu, union kvm_smram *smram)</div><div class='add'>+{</div><div class='add'>+	if (KVM_BUG_ON(is_td_vcpu(vcpu), vcpu-&gt;kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_enter_smm(vcpu, smram);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_leave_smm(struct kvm_vcpu *vcpu, const union kvm_smram *smram)</div><div class='add'>+{</div><div class='add'>+	if (KVM_BUG_ON(is_td_vcpu(vcpu), vcpu-&gt;kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_leave_smm(vcpu, smram);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_enable_smi_window(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (KVM_BUG_ON(is_td_vcpu(vcpu), vcpu-&gt;kvm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* RSM will cause a vmexit anyway.  */</div><div class='add'>+	vmx_enable_smi_window(vcpu);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int vt_check_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type,</div><div class='add'>+					void *insn, int insn_len)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * For TDX, this can only be triggered for MMIO emulation.  Let the</div><div class='add'>+	 * guest retry after installing the SPTE with suppress #VE bit cleared,</div><div class='add'>+	 * so that the guest will receive #VE when retry.  The guest is expected</div><div class='add'>+	 * to call TDG.VP.VMCALL&lt;MMIO&gt; to request VMM to do MMIO emulation on</div><div class='add'>+	 * #VE.</div><div class='add'>+	 */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return X86EMUL_RETRY_INSTR;</div><div class='add'>+</div><div class='add'>+	return vmx_check_emulate_instruction(vcpu, emul_type, insn, insn_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vt_apic_init_signal_blocked(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * INIT and SIPI are always blocked for TDX, i.e., INIT handling and</div><div class='add'>+	 * the OP vcpu_deliver_sipi_vector() won't be called.</div><div class='add'>+	 */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return vmx_apic_init_signal_blocked(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_virtual_apic_mode(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* Only x2APIC mode is supported for TD. */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	return vmx_set_virtual_apic_mode(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_apicv_pre_state_restore(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct pi_desc *pi = vcpu_to_pi_desc(vcpu);</div><div class='add'>+</div><div class='add'>+	pi_clear_on(pi);</div><div class='add'>+	memset(pi-&gt;pir, 0, sizeof(pi-&gt;pir));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	return vmx_hwapic_isr_update(vcpu, max_isr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_sync_pir_to_irr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return vmx_sync_pir_to_irr(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,</div><div class='add'>+			   int trig_mode, int vector)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(apic-&gt;vcpu)) {</div><div class='add'>+		tdx_deliver_interrupt(apic, delivery_mode, trig_mode,</div><div class='add'>+					     vector);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_deliver_interrupt(apic, delivery_mode, trig_mode, vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_vcpu_after_set_cpuid(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_update_exception_bitmap(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_update_exception_bitmap(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 vt_get_segment_base(struct kvm_vcpu *vcpu, int seg)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_get_segment_base(vcpu, seg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var,</div><div class='add'>+			      int seg)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		memset(var, 0, sizeof(*var));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_get_segment(vcpu, var, seg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var,</div><div class='add'>+			      int seg)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_segment(vcpu, var, seg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_get_cpl(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_get_cpl(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_get_cpl_no_cache(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_get_cpl_no_cache(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		*db = 0;</div><div class='add'>+		*l = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_get_cs_db_l_bits(vcpu, db, l);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vt_is_valid_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return vmx_is_valid_cr0(vcpu, cr0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_cr0(vcpu, cr0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vt_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return vmx_is_valid_cr4(vcpu, cr4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_cr4(vcpu, cr4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_set_efer(struct kvm_vcpu *vcpu, u64 efer)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_set_efer(vcpu, efer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_get_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		memset(dt, 0, sizeof(*dt));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_get_idt(vcpu, dt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_idt(vcpu, dt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_get_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		memset(dt, 0, sizeof(*dt));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_get_gdt(vcpu, dt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_gdt(vcpu, dt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_dr6(struct kvm_vcpu *vcpu, unsigned long val)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_dr6(vcpu, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_dr7(struct kvm_vcpu *vcpu, unsigned long val)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_dr7(vcpu, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_sync_dirty_debug_regs(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * MOV-DR exiting is always cleared for TD guest, even in debug mode.</div><div class='add'>+	 * Thus KVM_DEBUGREG_WONT_EXIT can never be set and it should never</div><div class='add'>+	 * reach here for TD vcpu.</div><div class='add'>+	 */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_sync_dirty_debug_regs(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON_ONCE(is_td_vcpu(vcpu)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_cache_reg(vcpu, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long vt_get_rflags(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_get_rflags(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_rflags(vcpu, rflags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vt_get_if_flag(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return vmx_get_if_flag(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_flush_tlb_all(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_flush_tlb_all(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_flush_tlb_all(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_flush_tlb_current(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_flush_tlb_current(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_flush_tlb_current(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_flush_tlb_gva(struct kvm_vcpu *vcpu, gva_t addr)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_flush_tlb_gva(vcpu, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_flush_tlb_guest(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_flush_tlb_guest(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_inject_nmi(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_inject_nmi(vcpu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_inject_nmi(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_nmi_allowed(struct kvm_vcpu *vcpu, bool for_injection)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * The TDX module manages NMI windows and NMI reinjection, and hides NMI</div><div class='add'>+	 * blocking, all KVM can do is throw an NMI over the wall.</div><div class='add'>+	 */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return vmx_nmi_allowed(vcpu, for_injection);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vt_get_nmi_mask(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * KVM can't get NMI blocking status for TDX guest, assume NMIs are</div><div class='add'>+	 * always unmasked.</div><div class='add'>+	 */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return vmx_get_nmi_mask(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_nmi_mask(vcpu, masked);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_enable_nmi_window(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* Refer to the comments in tdx_inject_nmi(). */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_enable_nmi_window(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_load_mmu_pgd(struct kvm_vcpu *vcpu, hpa_t root_hpa,</div><div class='add'>+			    int pgd_level)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_load_mmu_pgd(vcpu, root_hpa, pgd_level);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_load_mmu_pgd(vcpu, root_hpa, pgd_level);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_interrupt_shadow(vcpu, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 vt_get_interrupt_shadow(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_get_interrupt_shadow(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_patch_hypercall(struct kvm_vcpu *vcpu,</div><div class='add'>+				  unsigned char *hypercall)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Because guest memory is protected, guest can't be patched. TD kernel</div><div class='add'>+	 * is modified to use TDG.VP.VMCALL for hypercall.</div><div class='add'>+	 */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_patch_hypercall(vcpu, hypercall);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_inject_irq(struct kvm_vcpu *vcpu, bool reinjected)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_inject_irq(vcpu, reinjected);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_inject_exception(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_inject_exception(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_cancel_injection(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_cancel_injection(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_interrupt_allowed(struct kvm_vcpu *vcpu, bool for_injection)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return tdx_interrupt_allowed(vcpu);</div><div class='add'>+</div><div class='add'>+	return vmx_interrupt_allowed(vcpu, for_injection);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_enable_irq_window(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_enable_irq_window(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_get_entry_info(struct kvm_vcpu *vcpu, u32 *intr_info, u32 *error_code)</div><div class='add'>+{</div><div class='add'>+	*intr_info = 0;</div><div class='add'>+	*error_code = 0;</div><div class='add'>+</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_get_entry_info(vcpu, intr_info, error_code);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason,</div><div class='add'>+			u64 *info1, u64 *info2, u32 *intr_info, u32 *error_code)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		tdx_get_exit_info(vcpu, reason, info1, info2, intr_info,</div><div class='add'>+				  error_code);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_get_exit_info(vcpu, reason, info1, info2, intr_info, error_code);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_update_cr8_intercept(vcpu, tpr, irr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_set_apic_access_page_addr(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_set_apic_access_page_addr(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu)) {</div><div class='add'>+		KVM_BUG_ON(!kvm_vcpu_apicv_active(vcpu), vcpu-&gt;kvm);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmx_refresh_apicv_exec_ctrl(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_load_eoi_exitmap(vcpu, eoi_exit_bitmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_set_tss_addr(struct kvm *kvm, unsigned int addr)</div><div class='add'>+{</div><div class='add'>+	if (is_td(kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_set_tss_addr(kvm, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_set_identity_map_addr(struct kvm *kvm, u64 ident_addr)</div><div class='add'>+{</div><div class='add'>+	if (is_td(kvm))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_set_identity_map_addr(kvm, ident_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 vt_get_l2_tsc_offset(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* TDX doesn't support L2 guest at the moment. */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_get_l2_tsc_offset(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 vt_get_l2_tsc_multiplier(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* TDX doesn't support L2 guest at the moment. */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return vmx_get_l2_tsc_multiplier(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_write_tsc_offset(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* In TDX, tsc offset can't be changed. */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_write_tsc_offset(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_write_tsc_multiplier(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* In TDX, tsc multiplier can't be changed. */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_write_tsc_multiplier(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_X86_64</div><div class='add'>+static int vt_set_hv_timer(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,</div><div class='add'>+			      bool *expired)</div><div class='add'>+{</div><div class='add'>+	/* VMX-preemption timer isn't available for TDX. */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return vmx_set_hv_timer(vcpu, guest_deadline_tsc, expired);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vt_cancel_hv_timer(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/* VMX-preemption timer can't be set.  See vt_set_hv_timer(). */</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_cancel_hv_timer(vcpu);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void vt_setup_mce(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vmx_setup_mce(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_mem_enc_ioctl(struct kvm *kvm, void __user *argp)</div><div class='add'>+{</div><div class='add'>+	if (!is_td(kvm))</div><div class='add'>+		return -ENOTTY;</div><div class='add'>+</div><div class='add'>+	return tdx_vm_ioctl(kvm, argp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_vcpu_mem_enc_ioctl(struct kvm_vcpu *vcpu, void __user *argp)</div><div class='add'>+{</div><div class='add'>+	if (!is_td_vcpu(vcpu))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return tdx_vcpu_ioctl(vcpu, argp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vt_gmem_private_max_mapping_level(struct kvm *kvm, kvm_pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	if (is_td(kvm))</div><div class='add'>+		return tdx_gmem_private_max_mapping_level(kvm, pfn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #define VMX_REQUIRED_APICV_INHIBITS				\</div><div class='ctx'> 	(BIT(APICV_INHIBIT_REASON_DISABLED) |			\</div><div class='hunk'>@@ -24,111 +905,113 @@ struct kvm_x86_ops vt_x86_ops __initdata = {</div><div class='ctx'> 	.hardware_unsetup = vmx_hardware_unsetup,</div><div class='ctx'> </div><div class='ctx'> 	.enable_virtualization_cpu = vmx_enable_virtualization_cpu,</div><div class='del'>-	.disable_virtualization_cpu = vmx_disable_virtualization_cpu,</div><div class='add'>+	.disable_virtualization_cpu = vt_disable_virtualization_cpu,</div><div class='ctx'> 	.emergency_disable_virtualization_cpu = vmx_emergency_disable_virtualization_cpu,</div><div class='ctx'> </div><div class='del'>-	.has_emulated_msr = vmx_has_emulated_msr,</div><div class='add'>+	.has_emulated_msr = vt_has_emulated_msr,</div><div class='ctx'> </div><div class='ctx'> 	.vm_size = sizeof(struct kvm_vmx),</div><div class='del'>-	.vm_init = vmx_vm_init,</div><div class='del'>-	.vm_destroy = vmx_vm_destroy,</div><div class='ctx'> </div><div class='del'>-	.vcpu_precreate = vmx_vcpu_precreate,</div><div class='del'>-	.vcpu_create = vmx_vcpu_create,</div><div class='del'>-	.vcpu_free = vmx_vcpu_free,</div><div class='del'>-	.vcpu_reset = vmx_vcpu_reset,</div><div class='add'>+	.vm_init = vt_vm_init,</div><div class='add'>+	.vm_pre_destroy = vt_vm_pre_destroy,</div><div class='add'>+	.vm_destroy = vt_vm_destroy,</div><div class='add'>+</div><div class='add'>+	.vcpu_precreate = vt_vcpu_precreate,</div><div class='add'>+	.vcpu_create = vt_vcpu_create,</div><div class='add'>+	.vcpu_free = vt_vcpu_free,</div><div class='add'>+	.vcpu_reset = vt_vcpu_reset,</div><div class='ctx'> </div><div class='del'>-	.prepare_switch_to_guest = vmx_prepare_switch_to_guest,</div><div class='del'>-	.vcpu_load = vmx_vcpu_load,</div><div class='del'>-	.vcpu_put = vmx_vcpu_put,</div><div class='add'>+	.prepare_switch_to_guest = vt_prepare_switch_to_guest,</div><div class='add'>+	.vcpu_load = vt_vcpu_load,</div><div class='add'>+	.vcpu_put = vt_vcpu_put,</div><div class='ctx'> </div><div class='del'>-	.update_exception_bitmap = vmx_update_exception_bitmap,</div><div class='add'>+	.update_exception_bitmap = vt_update_exception_bitmap,</div><div class='ctx'> 	.get_feature_msr = vmx_get_feature_msr,</div><div class='del'>-	.get_msr = vmx_get_msr,</div><div class='del'>-	.set_msr = vmx_set_msr,</div><div class='del'>-	.get_segment_base = vmx_get_segment_base,</div><div class='del'>-	.get_segment = vmx_get_segment,</div><div class='del'>-	.set_segment = vmx_set_segment,</div><div class='del'>-	.get_cpl = vmx_get_cpl,</div><div class='del'>-	.get_cpl_no_cache = vmx_get_cpl_no_cache,</div><div class='del'>-	.get_cs_db_l_bits = vmx_get_cs_db_l_bits,</div><div class='del'>-	.is_valid_cr0 = vmx_is_valid_cr0,</div><div class='del'>-	.set_cr0 = vmx_set_cr0,</div><div class='del'>-	.is_valid_cr4 = vmx_is_valid_cr4,</div><div class='del'>-	.set_cr4 = vmx_set_cr4,</div><div class='del'>-	.set_efer = vmx_set_efer,</div><div class='del'>-	.get_idt = vmx_get_idt,</div><div class='del'>-	.set_idt = vmx_set_idt,</div><div class='del'>-	.get_gdt = vmx_get_gdt,</div><div class='del'>-	.set_gdt = vmx_set_gdt,</div><div class='del'>-	.set_dr6 = vmx_set_dr6,</div><div class='del'>-	.set_dr7 = vmx_set_dr7,</div><div class='del'>-	.sync_dirty_debug_regs = vmx_sync_dirty_debug_regs,</div><div class='del'>-	.cache_reg = vmx_cache_reg,</div><div class='del'>-	.get_rflags = vmx_get_rflags,</div><div class='del'>-	.set_rflags = vmx_set_rflags,</div><div class='del'>-	.get_if_flag = vmx_get_if_flag,</div><div class='del'>-</div><div class='del'>-	.flush_tlb_all = vmx_flush_tlb_all,</div><div class='del'>-	.flush_tlb_current = vmx_flush_tlb_current,</div><div class='del'>-	.flush_tlb_gva = vmx_flush_tlb_gva,</div><div class='del'>-	.flush_tlb_guest = vmx_flush_tlb_guest,</div><div class='del'>-</div><div class='del'>-	.vcpu_pre_run = vmx_vcpu_pre_run,</div><div class='del'>-	.vcpu_run = vmx_vcpu_run,</div><div class='del'>-	.handle_exit = vmx_handle_exit,</div><div class='add'>+	.get_msr = vt_get_msr,</div><div class='add'>+	.set_msr = vt_set_msr,</div><div class='add'>+</div><div class='add'>+	.get_segment_base = vt_get_segment_base,</div><div class='add'>+	.get_segment = vt_get_segment,</div><div class='add'>+	.set_segment = vt_set_segment,</div><div class='add'>+	.get_cpl = vt_get_cpl,</div><div class='add'>+	.get_cpl_no_cache = vt_get_cpl_no_cache,</div><div class='add'>+	.get_cs_db_l_bits = vt_get_cs_db_l_bits,</div><div class='add'>+	.is_valid_cr0 = vt_is_valid_cr0,</div><div class='add'>+	.set_cr0 = vt_set_cr0,</div><div class='add'>+	.is_valid_cr4 = vt_is_valid_cr4,</div><div class='add'>+	.set_cr4 = vt_set_cr4,</div><div class='add'>+	.set_efer = vt_set_efer,</div><div class='add'>+	.get_idt = vt_get_idt,</div><div class='add'>+	.set_idt = vt_set_idt,</div><div class='add'>+	.get_gdt = vt_get_gdt,</div><div class='add'>+	.set_gdt = vt_set_gdt,</div><div class='add'>+	.set_dr6 = vt_set_dr6,</div><div class='add'>+	.set_dr7 = vt_set_dr7,</div><div class='add'>+	.sync_dirty_debug_regs = vt_sync_dirty_debug_regs,</div><div class='add'>+	.cache_reg = vt_cache_reg,</div><div class='add'>+	.get_rflags = vt_get_rflags,</div><div class='add'>+	.set_rflags = vt_set_rflags,</div><div class='add'>+	.get_if_flag = vt_get_if_flag,</div><div class='add'>+</div><div class='add'>+	.flush_tlb_all = vt_flush_tlb_all,</div><div class='add'>+	.flush_tlb_current = vt_flush_tlb_current,</div><div class='add'>+	.flush_tlb_gva = vt_flush_tlb_gva,</div><div class='add'>+	.flush_tlb_guest = vt_flush_tlb_guest,</div><div class='add'>+</div><div class='add'>+	.vcpu_pre_run = vt_vcpu_pre_run,</div><div class='add'>+	.vcpu_run = vt_vcpu_run,</div><div class='add'>+	.handle_exit = vt_handle_exit,</div><div class='ctx'> 	.skip_emulated_instruction = vmx_skip_emulated_instruction,</div><div class='ctx'> 	.update_emulated_instruction = vmx_update_emulated_instruction,</div><div class='del'>-	.set_interrupt_shadow = vmx_set_interrupt_shadow,</div><div class='del'>-	.get_interrupt_shadow = vmx_get_interrupt_shadow,</div><div class='del'>-	.patch_hypercall = vmx_patch_hypercall,</div><div class='del'>-	.inject_irq = vmx_inject_irq,</div><div class='del'>-	.inject_nmi = vmx_inject_nmi,</div><div class='del'>-	.inject_exception = vmx_inject_exception,</div><div class='del'>-	.cancel_injection = vmx_cancel_injection,</div><div class='del'>-	.interrupt_allowed = vmx_interrupt_allowed,</div><div class='del'>-	.nmi_allowed = vmx_nmi_allowed,</div><div class='del'>-	.get_nmi_mask = vmx_get_nmi_mask,</div><div class='del'>-	.set_nmi_mask = vmx_set_nmi_mask,</div><div class='del'>-	.enable_nmi_window = vmx_enable_nmi_window,</div><div class='del'>-	.enable_irq_window = vmx_enable_irq_window,</div><div class='del'>-	.update_cr8_intercept = vmx_update_cr8_intercept,</div><div class='add'>+	.set_interrupt_shadow = vt_set_interrupt_shadow,</div><div class='add'>+	.get_interrupt_shadow = vt_get_interrupt_shadow,</div><div class='add'>+	.patch_hypercall = vt_patch_hypercall,</div><div class='add'>+	.inject_irq = vt_inject_irq,</div><div class='add'>+	.inject_nmi = vt_inject_nmi,</div><div class='add'>+	.inject_exception = vt_inject_exception,</div><div class='add'>+	.cancel_injection = vt_cancel_injection,</div><div class='add'>+	.interrupt_allowed = vt_interrupt_allowed,</div><div class='add'>+	.nmi_allowed = vt_nmi_allowed,</div><div class='add'>+	.get_nmi_mask = vt_get_nmi_mask,</div><div class='add'>+	.set_nmi_mask = vt_set_nmi_mask,</div><div class='add'>+	.enable_nmi_window = vt_enable_nmi_window,</div><div class='add'>+	.enable_irq_window = vt_enable_irq_window,</div><div class='add'>+	.update_cr8_intercept = vt_update_cr8_intercept,</div><div class='ctx'> </div><div class='ctx'> 	.x2apic_icr_is_split = false,</div><div class='del'>-	.set_virtual_apic_mode = vmx_set_virtual_apic_mode,</div><div class='del'>-	.set_apic_access_page_addr = vmx_set_apic_access_page_addr,</div><div class='del'>-	.refresh_apicv_exec_ctrl = vmx_refresh_apicv_exec_ctrl,</div><div class='del'>-	.load_eoi_exitmap = vmx_load_eoi_exitmap,</div><div class='del'>-	.apicv_pre_state_restore = vmx_apicv_pre_state_restore,</div><div class='add'>+	.set_virtual_apic_mode = vt_set_virtual_apic_mode,</div><div class='add'>+	.set_apic_access_page_addr = vt_set_apic_access_page_addr,</div><div class='add'>+	.refresh_apicv_exec_ctrl = vt_refresh_apicv_exec_ctrl,</div><div class='add'>+	.load_eoi_exitmap = vt_load_eoi_exitmap,</div><div class='add'>+	.apicv_pre_state_restore = vt_apicv_pre_state_restore,</div><div class='ctx'> 	.required_apicv_inhibits = VMX_REQUIRED_APICV_INHIBITS,</div><div class='del'>-	.hwapic_isr_update = vmx_hwapic_isr_update,</div><div class='del'>-	.sync_pir_to_irr = vmx_sync_pir_to_irr,</div><div class='del'>-	.deliver_interrupt = vmx_deliver_interrupt,</div><div class='add'>+	.hwapic_isr_update = vt_hwapic_isr_update,</div><div class='add'>+	.sync_pir_to_irr = vt_sync_pir_to_irr,</div><div class='add'>+	.deliver_interrupt = vt_deliver_interrupt,</div><div class='ctx'> 	.dy_apicv_has_pending_interrupt = pi_has_pending_interrupt,</div><div class='ctx'> </div><div class='del'>-	.set_tss_addr = vmx_set_tss_addr,</div><div class='del'>-	.set_identity_map_addr = vmx_set_identity_map_addr,</div><div class='add'>+	.set_tss_addr = vt_set_tss_addr,</div><div class='add'>+	.set_identity_map_addr = vt_set_identity_map_addr,</div><div class='ctx'> 	.get_mt_mask = vmx_get_mt_mask,</div><div class='ctx'> </div><div class='del'>-	.get_exit_info = vmx_get_exit_info,</div><div class='del'>-	.get_entry_info = vmx_get_entry_info,</div><div class='add'>+	.get_exit_info = vt_get_exit_info,</div><div class='add'>+	.get_entry_info = vt_get_entry_info,</div><div class='ctx'> </div><div class='del'>-	.vcpu_after_set_cpuid = vmx_vcpu_after_set_cpuid,</div><div class='add'>+	.vcpu_after_set_cpuid = vt_vcpu_after_set_cpuid,</div><div class='ctx'> </div><div class='ctx'> 	.has_wbinvd_exit = cpu_has_vmx_wbinvd_exit,</div><div class='ctx'> </div><div class='del'>-	.get_l2_tsc_offset = vmx_get_l2_tsc_offset,</div><div class='del'>-	.get_l2_tsc_multiplier = vmx_get_l2_tsc_multiplier,</div><div class='del'>-	.write_tsc_offset = vmx_write_tsc_offset,</div><div class='del'>-	.write_tsc_multiplier = vmx_write_tsc_multiplier,</div><div class='add'>+	.get_l2_tsc_offset = vt_get_l2_tsc_offset,</div><div class='add'>+	.get_l2_tsc_multiplier = vt_get_l2_tsc_multiplier,</div><div class='add'>+	.write_tsc_offset = vt_write_tsc_offset,</div><div class='add'>+	.write_tsc_multiplier = vt_write_tsc_multiplier,</div><div class='ctx'> </div><div class='del'>-	.load_mmu_pgd = vmx_load_mmu_pgd,</div><div class='add'>+	.load_mmu_pgd = vt_load_mmu_pgd,</div><div class='ctx'> </div><div class='ctx'> 	.check_intercept = vmx_check_intercept,</div><div class='ctx'> 	.handle_exit_irqoff = vmx_handle_exit_irqoff,</div><div class='ctx'> </div><div class='del'>-	.cpu_dirty_log_size = PML_LOG_NR_ENTRIES,</div><div class='del'>-	.update_cpu_dirty_logging = vmx_update_cpu_dirty_logging,</div><div class='add'>+	.update_cpu_dirty_logging = vt_update_cpu_dirty_logging,</div><div class='ctx'> </div><div class='ctx'> 	.nested_ops = &amp;vmx_nested_ops,</div><div class='ctx'> </div><div class='hunk'>@@ -136,35 +1019,95 @@ struct kvm_x86_ops vt_x86_ops __initdata = {</div><div class='ctx'> 	.pi_start_assignment = vmx_pi_start_assignment,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	.set_hv_timer = vmx_set_hv_timer,</div><div class='del'>-	.cancel_hv_timer = vmx_cancel_hv_timer,</div><div class='add'>+	.set_hv_timer = vt_set_hv_timer,</div><div class='add'>+	.cancel_hv_timer = vt_cancel_hv_timer,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	.setup_mce = vmx_setup_mce,</div><div class='add'>+	.setup_mce = vt_setup_mce,</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_KVM_SMM</div><div class='del'>-	.smi_allowed = vmx_smi_allowed,</div><div class='del'>-	.enter_smm = vmx_enter_smm,</div><div class='del'>-	.leave_smm = vmx_leave_smm,</div><div class='del'>-	.enable_smi_window = vmx_enable_smi_window,</div><div class='add'>+	.smi_allowed = vt_smi_allowed,</div><div class='add'>+	.enter_smm = vt_enter_smm,</div><div class='add'>+	.leave_smm = vt_leave_smm,</div><div class='add'>+	.enable_smi_window = vt_enable_smi_window,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	.check_emulate_instruction = vmx_check_emulate_instruction,</div><div class='del'>-	.apic_init_signal_blocked = vmx_apic_init_signal_blocked,</div><div class='add'>+	.check_emulate_instruction = vt_check_emulate_instruction,</div><div class='add'>+	.apic_init_signal_blocked = vt_apic_init_signal_blocked,</div><div class='ctx'> 	.migrate_timers = vmx_migrate_timers,</div><div class='ctx'> </div><div class='del'>-	.msr_filter_changed = vmx_msr_filter_changed,</div><div class='del'>-	.complete_emulated_msr = kvm_complete_insn_gp,</div><div class='add'>+	.msr_filter_changed = vt_msr_filter_changed,</div><div class='add'>+	.complete_emulated_msr = vt_complete_emulated_msr,</div><div class='ctx'> </div><div class='ctx'> 	.vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector,</div><div class='ctx'> </div><div class='ctx'> 	.get_untagged_addr = vmx_get_untagged_addr,</div><div class='add'>+</div><div class='add'>+	.mem_enc_ioctl = vt_mem_enc_ioctl,</div><div class='add'>+	.vcpu_mem_enc_ioctl = vt_vcpu_mem_enc_ioctl,</div><div class='add'>+</div><div class='add'>+	.private_max_mapping_level = vt_gmem_private_max_mapping_level</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_x86_init_ops vt_init_ops __initdata = {</div><div class='del'>-	.hardware_setup = vmx_hardware_setup,</div><div class='add'>+	.hardware_setup = vt_hardware_setup,</div><div class='ctx'> 	.handle_intel_pt_intr = NULL,</div><div class='ctx'> </div><div class='ctx'> 	.runtime_ops = &amp;vt_x86_ops,</div><div class='ctx'> 	.pmu_ops = &amp;intel_pmu_ops,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+static void __exit vt_exit(void)</div><div class='add'>+{</div><div class='add'>+	kvm_exit();</div><div class='add'>+	tdx_cleanup();</div><div class='add'>+	vmx_exit();</div><div class='add'>+}</div><div class='add'>+module_exit(vt_exit);</div><div class='add'>+</div><div class='add'>+static int __init vt_init(void)</div><div class='add'>+{</div><div class='add'>+	unsigned vcpu_size, vcpu_align;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	r = vmx_init();</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	/* tdx_init() has been taken */</div><div class='add'>+	r = tdx_bringup();</div><div class='add'>+	if (r)</div><div class='add'>+		goto err_tdx_bringup;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX and VMX have different vCPU structures.  Calculate the</div><div class='add'>+	 * maximum size/align so that kvm_init() can use the larger</div><div class='add'>+	 * values to create the kmem_vcpu_cache.</div><div class='add'>+	 */</div><div class='add'>+	vcpu_size = sizeof(struct vcpu_vmx);</div><div class='add'>+	vcpu_align = __alignof__(struct vcpu_vmx);</div><div class='add'>+	if (enable_tdx) {</div><div class='add'>+		vcpu_size = max_t(unsigned, vcpu_size,</div><div class='add'>+				sizeof(struct vcpu_tdx));</div><div class='add'>+		vcpu_align = max_t(unsigned, vcpu_align,</div><div class='add'>+				__alignof__(struct vcpu_tdx));</div><div class='add'>+		kvm_caps.supported_vm_types |= BIT(KVM_X86_TDX_VM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Common KVM initialization _must_ come last, after this, /dev/kvm is</div><div class='add'>+	 * exposed to userspace!</div><div class='add'>+	 */</div><div class='add'>+	r = kvm_init(vcpu_size, vcpu_align, THIS_MODULE);</div><div class='add'>+	if (r)</div><div class='add'>+		goto err_kvm_init;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_kvm_init:</div><div class='add'>+	tdx_cleanup();</div><div class='add'>+err_tdx_bringup:</div><div class='add'>+	vmx_exit();</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+module_init(vt_init);</div><div class='head'>diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c<br/>index 5504d9e9fd32..71701e2414a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/nested.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/nested.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/nested.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/nested.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/debugreg.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "x86.h"</div><div class='ctx'> #include "cpuid.h"</div><div class='hunk'>@@ -275,7 +276,7 @@ static void vmx_sync_vmcs_host_state(struct vcpu_vmx *vmx,</div><div class='ctx'> {</div><div class='ctx'> 	struct vmcs_host_state *dest, *src;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!vmx-&gt;guest_state_loaded))</div><div class='add'>+	if (unlikely(!vmx-&gt;vt.guest_state_loaded))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	src = &amp;prev-&gt;host_state;</div><div class='hunk'>@@ -425,7 +426,7 @@ static void nested_ept_inject_page_fault(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		 * tables also changed, but KVM should not treat EPT Misconfig</div><div class='ctx'> 		 * VM-Exits as writes.</div><div class='ctx'> 		 */</div><div class='del'>-		WARN_ON_ONCE(vmx-&gt;exit_reason.basic != EXIT_REASON_EPT_VIOLATION);</div><div class='add'>+		WARN_ON_ONCE(vmx-&gt;vt.exit_reason.basic != EXIT_REASON_EPT_VIOLATION);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * PML Full and EPT Violation VM-Exits both use bit 12 to report</div><div class='hunk'>@@ -4622,7 +4623,7 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12,</div><div class='ctx'> {</div><div class='ctx'> 	/* update exit information fields: */</div><div class='ctx'> 	vmcs12-&gt;vm_exit_reason = vm_exit_reason;</div><div class='del'>-	if (to_vmx(vcpu)-&gt;exit_reason.enclave_mode)</div><div class='add'>+	if (vmx_get_exit_reason(vcpu).enclave_mode)</div><div class='ctx'> 		vmcs12-&gt;vm_exit_reason |= VMX_EXIT_REASONS_SGX_ENCLAVE_MODE;</div><div class='ctx'> 	vmcs12-&gt;exit_qualification = exit_qualification;</div><div class='ctx'> </div><div class='hunk'>@@ -4794,7 +4795,7 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				vmcs12-&gt;vm_exit_msr_load_count))</div><div class='ctx'> 		nested_vmx_abort(vcpu, VMX_ABORT_LOAD_HOST_MSR_FAIL);</div><div class='ctx'> </div><div class='del'>-	to_vmx(vcpu)-&gt;emulation_required = vmx_emulation_required(vcpu);</div><div class='add'>+	to_vt(vcpu)-&gt;emulation_required = vmx_emulation_required(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u64 nested_vmx_get_vmcs01_guest_efer(struct vcpu_vmx *vmx)</div><div class='hunk'>@@ -6127,7 +6128,7 @@ fail:</div><div class='ctx'> 	 * nested VM-Exit.  Pass the original exit reason, i.e. don't hardcode</div><div class='ctx'> 	 * EXIT_REASON_VMFUNC as the exit reason.</div><div class='ctx'> 	 */</div><div class='del'>-	nested_vmx_vmexit(vcpu, vmx-&gt;exit_reason.full,</div><div class='add'>+	nested_vmx_vmexit(vcpu, vmx-&gt;vt.exit_reason.full,</div><div class='ctx'> 			  vmx_get_intr_info(vcpu),</div><div class='ctx'> 			  vmx_get_exit_qual(vcpu));</div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -6572,7 +6573,7 @@ static bool nested_vmx_l1_wants_exit(struct kvm_vcpu *vcpu,</div><div class='ctx'> bool nested_vmx_reflect_vmexit(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='del'>-	union vmx_exit_reason exit_reason = vmx-&gt;exit_reason;</div><div class='add'>+	union vmx_exit_reason exit_reason = vmx-&gt;vt.exit_reason;</div><div class='ctx'> 	unsigned long exit_qual;</div><div class='ctx'> 	u32 exit_intr_info;</div><div class='ctx'> </div><div class='hunk'>@@ -7202,8 +7203,8 @@ static void nested_vmx_setup_cr_fixed(struct nested_vmx_msrs *msrs)</div><div class='ctx'> 	msrs-&gt;cr4_fixed0 = VMXON_CR4_ALWAYSON;</div><div class='ctx'> </div><div class='ctx'> 	/* These MSRs specify bits which the guest must keep fixed off. */</div><div class='del'>-	rdmsrl(MSR_IA32_VMX_CR0_FIXED1, msrs-&gt;cr0_fixed1);</div><div class='del'>-	rdmsrl(MSR_IA32_VMX_CR4_FIXED1, msrs-&gt;cr4_fixed1);</div><div class='add'>+	rdmsrq(MSR_IA32_VMX_CR0_FIXED1, msrs-&gt;cr0_fixed1);</div><div class='add'>+	rdmsrq(MSR_IA32_VMX_CR4_FIXED1, msrs-&gt;cr4_fixed1);</div><div class='ctx'> </div><div class='ctx'> 	if (vmx_umip_emulated())</div><div class='ctx'> 		msrs-&gt;cr4_fixed1 |= X86_CR4_UMIP;</div><div class='head'>diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c<br/>index 77012b2eca0e..bbf4509f32d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/pmu_intel.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/pmu_intel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/pmu_intel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/pmu_intel.c</a></div><div class='hunk'>@@ -13,12 +13,14 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/kvm_host.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include "x86.h"</div><div class='ctx'> #include "cpuid.h"</div><div class='ctx'> #include "lapic.h"</div><div class='ctx'> #include "nested.h"</div><div class='ctx'> #include "pmu.h"</div><div class='add'>+#include "tdx.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Perf's "BASE" is wildly misleading, architectural PMUs use bits 31:16 of ECX</div><div class='hunk'>@@ -34,6 +36,24 @@</div><div class='ctx'> </div><div class='ctx'> #define MSR_PMC_FULL_WIDTH_BIT      (MSR_IA32_PMC0 - MSR_IA32_PERFCTR0)</div><div class='ctx'> </div><div class='add'>+static struct lbr_desc *vcpu_to_lbr_desc(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return &amp;to_vmx(vcpu)-&gt;lbr_desc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct x86_pmu_lbr *vcpu_to_lbr_records(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return &amp;to_vmx(vcpu)-&gt;lbr_desc.records;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#pragma GCC poison to_vmx</div><div class='add'>+</div><div class='ctx'> static void reprogram_fixed_counters(struct kvm_pmu *pmu, u64 data)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_pmc *pmc;</div><div class='hunk'>@@ -129,6 +149,22 @@ static inline struct kvm_pmc *get_fw_gp_pmc(struct kvm_pmu *pmu, u32 msr)</div><div class='ctx'> 	return get_gp_pmc(pmu, msr, MSR_IA32_PMC0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool intel_pmu_lbr_is_compatible(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return cpuid_model_is_consistent(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (is_td_vcpu(vcpu))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !!vcpu_to_lbr_records(vcpu)-&gt;nr;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool intel_pmu_is_valid_lbr_msr(struct kvm_vcpu *vcpu, u32 index)</div><div class='ctx'> {</div><div class='ctx'> 	struct x86_pmu_lbr *records = vcpu_to_lbr_records(vcpu);</div><div class='hunk'>@@ -194,6 +230,9 @@ static inline void intel_pmu_release_guest_lbr_event(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);</div><div class='ctx'> </div><div class='add'>+	if (!lbr_desc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (lbr_desc-&gt;event) {</div><div class='ctx'> 		perf_event_release_kernel(lbr_desc-&gt;event);</div><div class='ctx'> 		lbr_desc-&gt;event = NULL;</div><div class='hunk'>@@ -235,6 +274,9 @@ int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu)</div><div class='ctx'> 					PERF_SAMPLE_BRANCH_USER,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON_ONCE(!lbr_desc))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(lbr_desc-&gt;event)) {</div><div class='ctx'> 		__set_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu-&gt;pmc_in_use);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -279,9 +321,9 @@ static bool intel_pmu_handle_lbr_msrs_access(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	local_irq_disable();</div><div class='ctx'> 	if (lbr_desc-&gt;event-&gt;state == PERF_EVENT_STATE_ACTIVE) {</div><div class='ctx'> 		if (read)</div><div class='del'>-			rdmsrl(index, msr_info-&gt;data);</div><div class='add'>+			rdmsrq(index, msr_info-&gt;data);</div><div class='ctx'> 		else</div><div class='del'>-			wrmsrl(index, msr_info-&gt;data);</div><div class='add'>+			wrmsrq(index, msr_info-&gt;data);</div><div class='ctx'> 		__set_bit(INTEL_PMC_IDX_FIXED_VLBR, vcpu_to_pmu(vcpu)-&gt;pmc_in_use);</div><div class='ctx'> 		local_irq_enable();</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -466,6 +508,9 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	u64 perf_capabilities;</div><div class='ctx'> 	u64 counter_rsvd;</div><div class='ctx'> </div><div class='add'>+	if (!lbr_desc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	memset(&amp;lbr_desc-&gt;records, 0, sizeof(lbr_desc-&gt;records));</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -542,7 +587,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		INTEL_PMC_MAX_GENERIC, pmu-&gt;nr_arch_fixed_counters);</div><div class='ctx'> </div><div class='ctx'> 	perf_capabilities = vcpu_get_perf_capabilities(vcpu);</div><div class='del'>-	if (cpuid_model_is_consistent(vcpu) &amp;&amp;</div><div class='add'>+	if (intel_pmu_lbr_is_compatible(vcpu) &amp;&amp;</div><div class='ctx'> 	    (perf_capabilities &amp; PMU_CAP_LBR_FMT))</div><div class='ctx'> 		memcpy(&amp;lbr_desc-&gt;records, &amp;vmx_lbr_caps, sizeof(vmx_lbr_caps));</div><div class='ctx'> 	else</div><div class='hunk'>@@ -570,6 +615,9 @@ static void intel_pmu_init(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='ctx'> 	struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);</div><div class='ctx'> </div><div class='add'>+	if (!lbr_desc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; KVM_MAX_NR_INTEL_GP_COUNTERS; i++) {</div><div class='ctx'> 		pmu-&gt;gp_counters[i].type = KVM_PMC_GP;</div><div class='ctx'> 		pmu-&gt;gp_counters[i].vcpu = vcpu;</div><div class='hunk'>@@ -677,6 +725,9 @@ void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);</div><div class='ctx'> 	struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON_ONCE(!lbr_desc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (!lbr_desc-&gt;event) {</div><div class='ctx'> 		vmx_disable_lbr_msrs_passthrough(vcpu);</div><div class='ctx'> 		if (vmcs_read64(GUEST_IA32_DEBUGCTL) &amp; DEBUGCTLMSR_LBR)</div><div class='head'>diff --git a/arch/x86/kvm/vmx/pmu_intel.h b/arch/x86/kvm/vmx/pmu_intel.h<br/>new file mode 100644<br/>index 000000000000..5620d0882cdc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/pmu_intel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/pmu_intel.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __KVM_X86_VMX_PMU_INTEL_H</div><div class='add'>+#define  __KVM_X86_VMX_PMU_INTEL_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kvm_host.h&gt;</div><div class='add'>+</div><div class='add'>+bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu);</div><div class='add'>+int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='add'>+struct lbr_desc {</div><div class='add'>+	/* Basic info about guest LBR records. */</div><div class='add'>+	struct x86_pmu_lbr records;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Emulate LBR feature via passthrough LBR registers when the</div><div class='add'>+	 * per-vcpu guest LBR event is scheduled on the current pcpu.</div><div class='add'>+	 *</div><div class='add'>+	 * The records may be inaccurate if the host reclaims the LBR.</div><div class='add'>+	 */</div><div class='add'>+	struct perf_event *event;</div><div class='add'>+</div><div class='add'>+	/* True if LBRs are marked as not intercepted in the MSR bitmap */</div><div class='add'>+	bool msr_passthrough;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct x86_pmu_lbr vmx_lbr_caps;</div><div class='add'>+</div><div class='add'>+#endif /* __KVM_X86_VMX_PMU_INTEL_H */</div><div class='head'>diff --git a/arch/x86/kvm/vmx/posted_intr.c b/arch/x86/kvm/vmx/posted_intr.c<br/>index ec08fa3caf43..99d1d599ff8c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/posted_intr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/posted_intr.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include "posted_intr.h"</div><div class='ctx'> #include "trace.h"</div><div class='ctx'> #include "vmx.h"</div><div class='add'>+#include "tdx.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler()</div><div class='hunk'>@@ -31,9 +32,11 @@ static DEFINE_PER_CPU(struct list_head, wakeup_vcpus_on_cpu);</div><div class='ctx'>  */</div><div class='ctx'> static DEFINE_PER_CPU(raw_spinlock_t, wakeup_vcpus_on_cpu_lock);</div><div class='ctx'> </div><div class='del'>-static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)</div><div class='add'>+#define PI_LOCK_SCHED_OUT SINGLE_DEPTH_NESTING</div><div class='add'>+</div><div class='add'>+struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return &amp;(to_vmx(vcpu)-&gt;pi_desc);</div><div class='add'>+	return &amp;(to_vt(vcpu)-&gt;pi_desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pi_try_set_control(struct pi_desc *pi_desc, u64 *pold, u64 new)</div><div class='hunk'>@@ -53,7 +56,7 @@ static int pi_try_set_control(struct pi_desc *pi_desc, u64 *pold, u64 new)</div><div class='ctx'> void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='ctx'> 	struct pi_desc old, new;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned int dest;</div><div class='hunk'>@@ -89,9 +92,20 @@ void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='ctx'> 	 * current pCPU if the task was migrated.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pi_desc-&gt;nv == POSTED_INTR_WAKEUP_VECTOR) {</div><div class='del'>-		raw_spin_lock(&amp;per_cpu(wakeup_vcpus_on_cpu_lock, vcpu-&gt;cpu));</div><div class='del'>-		list_del(&amp;vmx-&gt;pi_wakeup_list);</div><div class='del'>-		raw_spin_unlock(&amp;per_cpu(wakeup_vcpus_on_cpu_lock, vcpu-&gt;cpu));</div><div class='add'>+		raw_spinlock_t *spinlock = &amp;per_cpu(wakeup_vcpus_on_cpu_lock, vcpu-&gt;cpu);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * In addition to taking the wakeup lock for the regular/IRQ</div><div class='add'>+		 * context, tell lockdep it is being taken for the "sched out"</div><div class='add'>+		 * context as well.  vCPU loads happens in task context, and</div><div class='add'>+		 * this is taking the lock of the *previous* CPU, i.e. can race</div><div class='add'>+		 * with both the scheduler and the wakeup handler.</div><div class='add'>+		 */</div><div class='add'>+		raw_spin_lock(spinlock);</div><div class='add'>+		spin_acquire(&amp;spinlock-&gt;dep_map, PI_LOCK_SCHED_OUT, 0, _RET_IP_);</div><div class='add'>+		list_del(&amp;vt-&gt;pi_wakeup_list);</div><div class='add'>+		spin_release(&amp;spinlock-&gt;dep_map, _RET_IP_);</div><div class='add'>+		raw_spin_unlock(spinlock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dest = cpu_physical_id(cpu);</div><div class='hunk'>@@ -146,14 +160,26 @@ static bool vmx_can_use_vtd_pi(struct kvm *kvm)</div><div class='ctx'> static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='ctx'> 	struct pi_desc old, new;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	local_irq_save(flags);</div><div class='add'>+	lockdep_assert_irqs_disabled();</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock(&amp;per_cpu(wakeup_vcpus_on_cpu_lock, vcpu-&gt;cpu));</div><div class='del'>-	list_add_tail(&amp;vmx-&gt;pi_wakeup_list,</div><div class='add'>+	/*</div><div class='add'>+	 * Acquire the wakeup lock using the "sched out" context to workaround</div><div class='add'>+	 * a lockdep false positive.  When this is called, schedule() holds</div><div class='add'>+	 * various per-CPU scheduler locks.  When the wakeup handler runs, it</div><div class='add'>+	 * holds this CPU's wakeup lock while calling try_to_wake_up(), which</div><div class='add'>+	 * can eventually take the aforementioned scheduler locks, which causes</div><div class='add'>+	 * lockdep to assume there is deadlock.</div><div class='add'>+	 *</div><div class='add'>+	 * Deadlock can't actually occur because IRQs are disabled for the</div><div class='add'>+	 * entirety of the sched_out critical section, i.e. the wakeup handler</div><div class='add'>+	 * can't run while the scheduler locks are held.</div><div class='add'>+	 */</div><div class='add'>+	raw_spin_lock_nested(&amp;per_cpu(wakeup_vcpus_on_cpu_lock, vcpu-&gt;cpu),</div><div class='add'>+			     PI_LOCK_SCHED_OUT);</div><div class='add'>+	list_add_tail(&amp;vt-&gt;pi_wakeup_list,</div><div class='ctx'> 		      &amp;per_cpu(wakeup_vcpus_on_cpu, vcpu-&gt;cpu));</div><div class='ctx'> 	raw_spin_unlock(&amp;per_cpu(wakeup_vcpus_on_cpu_lock, vcpu-&gt;cpu));</div><div class='ctx'> </div><div class='hunk'>@@ -176,8 +202,6 @@ static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pi_test_on(&amp;new))</div><div class='ctx'> 		__apic_send_IPI_self(POSTED_INTR_WAKEUP_VECTOR);</div><div class='del'>-</div><div class='del'>-	local_irq_restore(flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool vmx_needs_pi_wakeup(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -190,7 +214,8 @@ static bool vmx_needs_pi_wakeup(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * notification vector is switched to the one that calls</div><div class='ctx'> 	 * back to the pi_wakeup_handler() function.</div><div class='ctx'> 	 */</div><div class='del'>-	return vmx_can_use_ipiv(vcpu) || vmx_can_use_vtd_pi(vcpu-&gt;kvm);</div><div class='add'>+	return (vmx_can_use_ipiv(vcpu) &amp;&amp; !is_td_vcpu(vcpu)) ||</div><div class='add'>+		vmx_can_use_vtd_pi(vcpu-&gt;kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -200,7 +225,9 @@ void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (!vmx_needs_pi_wakeup(vcpu))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (kvm_vcpu_is_blocking(vcpu) &amp;&amp; !vmx_interrupt_blocked(vcpu))</div><div class='add'>+	if (kvm_vcpu_is_blocking(vcpu) &amp;&amp;</div><div class='add'>+	    ((is_td_vcpu(vcpu) &amp;&amp; tdx_interrupt_allowed(vcpu)) ||</div><div class='add'>+	     (!is_td_vcpu(vcpu) &amp;&amp; !vmx_interrupt_blocked(vcpu))))</div><div class='ctx'> 		pi_enable_wakeup_handler(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -220,13 +247,13 @@ void pi_wakeup_handler(void)</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> 	struct list_head *wakeup_list = &amp;per_cpu(wakeup_vcpus_on_cpu, cpu);</div><div class='ctx'> 	raw_spinlock_t *spinlock = &amp;per_cpu(wakeup_vcpus_on_cpu_lock, cpu);</div><div class='del'>-	struct vcpu_vmx *vmx;</div><div class='add'>+	struct vcpu_vt *vt;</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock(spinlock);</div><div class='del'>-	list_for_each_entry(vmx, wakeup_list, pi_wakeup_list) {</div><div class='add'>+	list_for_each_entry(vt, wakeup_list, pi_wakeup_list) {</div><div class='ctx'> </div><div class='del'>-		if (pi_test_on(&amp;vmx-&gt;pi_desc))</div><div class='del'>-			kvm_vcpu_wake_up(&amp;vmx-&gt;vcpu);</div><div class='add'>+		if (pi_test_on(&amp;vt-&gt;pi_desc))</div><div class='add'>+			kvm_vcpu_wake_up(vt_to_vcpu(vt));</div><div class='ctx'> 	}</div><div class='ctx'> 	raw_spin_unlock(spinlock);</div><div class='ctx'> }</div><div class='hunk'>@@ -274,6 +301,7 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_kernel_irq_routing_entry *e;</div><div class='ctx'> 	struct kvm_irq_routing_table *irq_rt;</div><div class='add'>+	bool enable_remapped_mode = true;</div><div class='ctx'> 	struct kvm_lapic_irq irq;</div><div class='ctx'> 	struct kvm_vcpu *vcpu;</div><div class='ctx'> 	struct vcpu_data vcpu_info;</div><div class='hunk'>@@ -312,21 +340,8 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> </div><div class='ctx'> 		kvm_set_msi_irq(kvm, e, &amp;irq);</div><div class='ctx'> 		if (!kvm_intr_is_single_vcpu(kvm, &amp;irq, &amp;vcpu) ||</div><div class='del'>-		    !kvm_irq_is_postable(&amp;irq)) {</div><div class='del'>-			/*</div><div class='del'>-			 * Make sure the IRTE is in remapped mode if</div><div class='del'>-			 * we don't handle it in posted mode.</div><div class='del'>-			 */</div><div class='del'>-			ret = irq_set_vcpu_affinity(host_irq, NULL);</div><div class='del'>-			if (ret &lt; 0) {</div><div class='del'>-				printk(KERN_INFO</div><div class='del'>-				   "failed to back to remapped mode, irq: %u\n",</div><div class='del'>-				   host_irq);</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-</div><div class='add'>+		    !kvm_irq_is_postable(&amp;irq))</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));</div><div class='ctx'> 		vcpu_info.vector = irq.vector;</div><div class='hunk'>@@ -334,11 +349,12 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> 		trace_kvm_pi_irte_update(host_irq, vcpu-&gt;vcpu_id, e-&gt;gsi,</div><div class='ctx'> 				vcpu_info.vector, vcpu_info.pi_desc_addr, set);</div><div class='ctx'> </div><div class='del'>-		if (set)</div><div class='del'>-			ret = irq_set_vcpu_affinity(host_irq, &amp;vcpu_info);</div><div class='del'>-		else</div><div class='del'>-			ret = irq_set_vcpu_affinity(host_irq, NULL);</div><div class='add'>+		if (!set)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		enable_remapped_mode = false;</div><div class='ctx'> </div><div class='add'>+		ret = irq_set_vcpu_affinity(host_irq, &amp;vcpu_info);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			printk(KERN_INFO "%s: failed to update PI IRTE\n",</div><div class='ctx'> 					__func__);</div><div class='hunk'>@@ -346,6 +362,9 @@ int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (enable_remapped_mode)</div><div class='add'>+		ret = irq_set_vcpu_affinity(host_irq, NULL);</div><div class='add'>+</div><div class='ctx'> 	ret = 0;</div><div class='ctx'> out:</div><div class='ctx'> 	srcu_read_unlock(&amp;kvm-&gt;irq_srcu, idx);</div><div class='head'>diff --git a/arch/x86/kvm/vmx/posted_intr.h b/arch/x86/kvm/vmx/posted_intr.h<br/>index ad9116a99bcc..68605ca7ef68 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/posted_intr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/posted_intr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/posted_intr.h</a></div><div class='hunk'>@@ -5,6 +5,8 @@</div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;asm/posted_intr.h&gt;</div><div class='ctx'> </div><div class='add'>+struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu);</div><div class='add'>+</div><div class='ctx'> void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu);</div><div class='ctx'> void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu);</div><div class='ctx'> void pi_wakeup_handler(void);</div><div class='head'>diff --git a/arch/x86/kvm/vmx/sgx.c b/arch/x86/kvm/vmx/sgx.c<br/>index 9961e07cf071..df1d0cf76947 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/sgx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/sgx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/sgx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/sgx.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*  Copyright(c) 2021 Intel Corporation. */</div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/sgx.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "x86.h"</div><div class='hunk'>@@ -411,16 +412,16 @@ void setup_default_sgx_lepubkeyhash(void)</div><div class='ctx'> 	 * MSRs exist but are read-only (locked and not writable).</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!enable_sgx || boot_cpu_has(X86_FEATURE_SGX_LC) ||</div><div class='del'>-	    rdmsrl_safe(MSR_IA32_SGXLEPUBKEYHASH0, &amp;sgx_pubkey_hash[0])) {</div><div class='add'>+	    rdmsrq_safe(MSR_IA32_SGXLEPUBKEYHASH0, &amp;sgx_pubkey_hash[0])) {</div><div class='ctx'> 		sgx_pubkey_hash[0] = 0xa6053e051270b7acULL;</div><div class='ctx'> 		sgx_pubkey_hash[1] = 0x6cfbe8ba8b3b413dULL;</div><div class='ctx'> 		sgx_pubkey_hash[2] = 0xc4916d99f2b3735dULL;</div><div class='ctx'> 		sgx_pubkey_hash[3] = 0xd4f8c05909f9bb3bULL;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* MSR_IA32_SGXLEPUBKEYHASH0 is read above */</div><div class='del'>-		rdmsrl(MSR_IA32_SGXLEPUBKEYHASH1, sgx_pubkey_hash[1]);</div><div class='del'>-		rdmsrl(MSR_IA32_SGXLEPUBKEYHASH2, sgx_pubkey_hash[2]);</div><div class='del'>-		rdmsrl(MSR_IA32_SGXLEPUBKEYHASH3, sgx_pubkey_hash[3]);</div><div class='add'>+		rdmsrq(MSR_IA32_SGXLEPUBKEYHASH1, sgx_pubkey_hash[1]);</div><div class='add'>+		rdmsrq(MSR_IA32_SGXLEPUBKEYHASH2, sgx_pubkey_hash[2]);</div><div class='add'>+		rdmsrq(MSR_IA32_SGXLEPUBKEYHASH3, sgx_pubkey_hash[3]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c<br/>new file mode 100644<br/>index 000000000000..b952bc673271<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/tdx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/tdx.c</a></div><div class='hunk'>@@ -0,0 +1,3526 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;linux/cleanup.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='add'>+#include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/fpu/xcr.h&gt;</div><div class='add'>+#include &lt;linux/misc_cgroup.h&gt;</div><div class='add'>+#include &lt;linux/mmu_context.h&gt;</div><div class='add'>+#include &lt;asm/tdx.h&gt;</div><div class='add'>+#include "capabilities.h"</div><div class='add'>+#include "mmu.h"</div><div class='add'>+#include "x86_ops.h"</div><div class='add'>+#include "lapic.h"</div><div class='add'>+#include "tdx.h"</div><div class='add'>+#include "vmx.h"</div><div class='add'>+#include "mmu/spte.h"</div><div class='add'>+#include "common.h"</div><div class='add'>+#include "posted_intr.h"</div><div class='add'>+#include "irq.h"</div><div class='add'>+#include &lt;trace/events/kvm.h&gt;</div><div class='add'>+#include "trace.h"</div><div class='add'>+</div><div class='add'>+#pragma GCC poison to_vmx</div><div class='add'>+</div><div class='add'>+#undef pr_fmt</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#define pr_tdx_error(__fn, __err)	\</div><div class='add'>+	pr_err_ratelimited("SEAMCALL %s failed: 0x%llx\n", #__fn, __err)</div><div class='add'>+</div><div class='add'>+#define __pr_tdx_error_N(__fn_str, __err, __fmt, ...)		\</div><div class='add'>+	pr_err_ratelimited("SEAMCALL " __fn_str " failed: 0x%llx, " __fmt,  __err,  __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+#define pr_tdx_error_1(__fn, __err, __rcx)		\</div><div class='add'>+	__pr_tdx_error_N(#__fn, __err, "rcx 0x%llx\n", __rcx)</div><div class='add'>+</div><div class='add'>+#define pr_tdx_error_2(__fn, __err, __rcx, __rdx)	\</div><div class='add'>+	__pr_tdx_error_N(#__fn, __err, "rcx 0x%llx, rdx 0x%llx\n", __rcx, __rdx)</div><div class='add'>+</div><div class='add'>+#define pr_tdx_error_3(__fn, __err, __rcx, __rdx, __r8)	\</div><div class='add'>+	__pr_tdx_error_N(#__fn, __err, "rcx 0x%llx, rdx 0x%llx, r8 0x%llx\n", __rcx, __rdx, __r8)</div><div class='add'>+</div><div class='add'>+bool enable_tdx __ro_after_init;</div><div class='add'>+module_param_named(tdx, enable_tdx, bool, 0444);</div><div class='add'>+</div><div class='add'>+#define TDX_SHARED_BIT_PWL_5 gpa_to_gfn(BIT_ULL(51))</div><div class='add'>+#define TDX_SHARED_BIT_PWL_4 gpa_to_gfn(BIT_ULL(47))</div><div class='add'>+</div><div class='add'>+static enum cpuhp_state tdx_cpuhp_state;</div><div class='add'>+</div><div class='add'>+static const struct tdx_sys_info *tdx_sysinfo;</div><div class='add'>+</div><div class='add'>+void tdh_vp_rd_failed(struct vcpu_tdx *tdx, char *uclass, u32 field, u64 err)</div><div class='add'>+{</div><div class='add'>+	KVM_BUG_ON(1, tdx-&gt;vcpu.kvm);</div><div class='add'>+	pr_err("TDH_VP_RD[%s.0x%x] failed 0x%llx\n", uclass, field, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdh_vp_wr_failed(struct vcpu_tdx *tdx, char *uclass, char *op, u32 field,</div><div class='add'>+		      u64 val, u64 err)</div><div class='add'>+{</div><div class='add'>+	KVM_BUG_ON(1, tdx-&gt;vcpu.kvm);</div><div class='add'>+	pr_err("TDH_VP_WR[%s.0x%x]%s0x%llx failed: 0x%llx\n", uclass, field, op, val, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define KVM_SUPPORTED_TD_ATTRS (TDX_TD_ATTR_SEPT_VE_DISABLE)</div><div class='add'>+</div><div class='add'>+static __always_inline struct kvm_tdx *to_kvm_tdx(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	return container_of(kvm, struct kvm_tdx, kvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline struct vcpu_tdx *to_tdx(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return container_of(vcpu, struct vcpu_tdx, vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 tdx_get_supported_attrs(const struct tdx_sys_info_td_conf *td_conf)</div><div class='add'>+{</div><div class='add'>+	u64 val = KVM_SUPPORTED_TD_ATTRS;</div><div class='add'>+</div><div class='add'>+	if ((val &amp; td_conf-&gt;attributes_fixed1) != td_conf-&gt;attributes_fixed1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	val &amp;= td_conf-&gt;attributes_fixed0;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 tdx_get_supported_xfam(const struct tdx_sys_info_td_conf *td_conf)</div><div class='add'>+{</div><div class='add'>+	u64 val = kvm_caps.supported_xcr0 | kvm_caps.supported_xss;</div><div class='add'>+</div><div class='add'>+	if ((val &amp; td_conf-&gt;xfam_fixed1) != td_conf-&gt;xfam_fixed1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	val &amp;= td_conf-&gt;xfam_fixed0;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_get_guest_phys_addr_bits(const u32 eax)</div><div class='add'>+{</div><div class='add'>+	return (eax &amp; GENMASK(23, 16)) &gt;&gt; 16;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tdx_set_guest_phys_addr_bits(const u32 eax, int addr_bits)</div><div class='add'>+{</div><div class='add'>+	return (eax &amp; ~GENMASK(23, 16)) | (addr_bits &amp; 0xff) &lt;&lt; 16;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define TDX_FEATURE_TSX (__feature_bit(X86_FEATURE_HLE) | __feature_bit(X86_FEATURE_RTM))</div><div class='add'>+</div><div class='add'>+static bool has_tsx(const struct kvm_cpuid_entry2 *entry)</div><div class='add'>+{</div><div class='add'>+	return entry-&gt;function == 7 &amp;&amp; entry-&gt;index == 0 &amp;&amp;</div><div class='add'>+	       (entry-&gt;ebx &amp; TDX_FEATURE_TSX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clear_tsx(struct kvm_cpuid_entry2 *entry)</div><div class='add'>+{</div><div class='add'>+	entry-&gt;ebx &amp;= ~TDX_FEATURE_TSX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool has_waitpkg(const struct kvm_cpuid_entry2 *entry)</div><div class='add'>+{</div><div class='add'>+	return entry-&gt;function == 7 &amp;&amp; entry-&gt;index == 0 &amp;&amp;</div><div class='add'>+	       (entry-&gt;ecx &amp; __feature_bit(X86_FEATURE_WAITPKG));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clear_waitpkg(struct kvm_cpuid_entry2 *entry)</div><div class='add'>+{</div><div class='add'>+	entry-&gt;ecx &amp;= ~__feature_bit(X86_FEATURE_WAITPKG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_clear_unsupported_cpuid(struct kvm_cpuid_entry2 *entry)</div><div class='add'>+{</div><div class='add'>+	if (has_tsx(entry))</div><div class='add'>+		clear_tsx(entry);</div><div class='add'>+</div><div class='add'>+	if (has_waitpkg(entry))</div><div class='add'>+		clear_waitpkg(entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool tdx_unsupported_cpuid(const struct kvm_cpuid_entry2 *entry)</div><div class='add'>+{</div><div class='add'>+	return has_tsx(entry) || has_waitpkg(entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define KVM_TDX_CPUID_NO_SUBLEAF	((__u32)-1)</div><div class='add'>+</div><div class='add'>+static void td_init_cpuid_entry2(struct kvm_cpuid_entry2 *entry, unsigned char idx)</div><div class='add'>+{</div><div class='add'>+	const struct tdx_sys_info_td_conf *td_conf = &amp;tdx_sysinfo-&gt;td_conf;</div><div class='add'>+</div><div class='add'>+	entry-&gt;function = (u32)td_conf-&gt;cpuid_config_leaves[idx];</div><div class='add'>+	entry-&gt;index = td_conf-&gt;cpuid_config_leaves[idx] &gt;&gt; 32;</div><div class='add'>+	entry-&gt;eax = (u32)td_conf-&gt;cpuid_config_values[idx][0];</div><div class='add'>+	entry-&gt;ebx = td_conf-&gt;cpuid_config_values[idx][0] &gt;&gt; 32;</div><div class='add'>+	entry-&gt;ecx = (u32)td_conf-&gt;cpuid_config_values[idx][1];</div><div class='add'>+	entry-&gt;edx = td_conf-&gt;cpuid_config_values[idx][1] &gt;&gt; 32;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;index == KVM_TDX_CPUID_NO_SUBLEAF)</div><div class='add'>+		entry-&gt;index = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The TDX module doesn't allow configuring the guest phys addr bits</div><div class='add'>+	 * (EAX[23:16]).  However, KVM uses it as an interface to the userspace</div><div class='add'>+	 * to configure the GPAW.  Report these bits as configurable.</div><div class='add'>+	 */</div><div class='add'>+	if (entry-&gt;function == 0x80000008)</div><div class='add'>+		entry-&gt;eax = tdx_set_guest_phys_addr_bits(entry-&gt;eax, 0xff);</div><div class='add'>+</div><div class='add'>+	tdx_clear_unsupported_cpuid(entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_kvm_tdx_caps(const struct tdx_sys_info_td_conf *td_conf,</div><div class='add'>+			     struct kvm_tdx_capabilities *caps)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	caps-&gt;supported_attrs = tdx_get_supported_attrs(td_conf);</div><div class='add'>+	if (!caps-&gt;supported_attrs)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	caps-&gt;supported_xfam = tdx_get_supported_xfam(td_conf);</div><div class='add'>+	if (!caps-&gt;supported_xfam)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	caps-&gt;cpuid.nent = td_conf-&gt;num_cpuid_config;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; td_conf-&gt;num_cpuid_config; i++)</div><div class='add'>+		td_init_cpuid_entry2(&amp;caps-&gt;cpuid.entries[i], i);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Some SEAMCALLs acquire the TDX module globally, and can fail with</div><div class='add'>+ * TDX_OPERAND_BUSY.  Use a global mutex to serialize these SEAMCALLs.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_MUTEX(tdx_lock);</div><div class='add'>+</div><div class='add'>+static atomic_t nr_configured_hkid;</div><div class='add'>+</div><div class='add'>+static bool tdx_operand_busy(u64 err)</div><div class='add'>+{</div><div class='add'>+	return (err &amp; TDX_SEAMCALL_STATUS_MASK) == TDX_OPERAND_BUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * A per-CPU list of TD vCPUs associated with a given CPU.</div><div class='add'>+ * Protected by interrupt mask. Only manipulated by the CPU owning this per-CPU</div><div class='add'>+ * list.</div><div class='add'>+ * - When a vCPU is loaded onto a CPU, it is removed from the per-CPU list of</div><div class='add'>+ *   the old CPU during the IPI callback running on the old CPU, and then added</div><div class='add'>+ *   to the per-CPU list of the new CPU.</div><div class='add'>+ * - When a TD is tearing down, all vCPUs are disassociated from their current</div><div class='add'>+ *   running CPUs and removed from the per-CPU list during the IPI callback</div><div class='add'>+ *   running on those CPUs.</div><div class='add'>+ * - When a CPU is brought down, traverse the per-CPU list to disassociate all</div><div class='add'>+ *   associated TD vCPUs and remove them from the per-CPU list.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_PER_CPU(struct list_head, associated_tdvcpus);</div><div class='add'>+</div><div class='add'>+static __always_inline unsigned long tdvmcall_exit_type(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return to_tdx(vcpu)-&gt;vp_enter_args.r10;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline unsigned long tdvmcall_leaf(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return to_tdx(vcpu)-&gt;vp_enter_args.r11;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void tdvmcall_set_return_code(struct kvm_vcpu *vcpu,</div><div class='add'>+						     long val)</div><div class='add'>+{</div><div class='add'>+	to_tdx(vcpu)-&gt;vp_enter_args.r10 = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void tdvmcall_set_return_val(struct kvm_vcpu *vcpu,</div><div class='add'>+						    unsigned long val)</div><div class='add'>+{</div><div class='add'>+	to_tdx(vcpu)-&gt;vp_enter_args.r11 = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void tdx_hkid_free(struct kvm_tdx *kvm_tdx)</div><div class='add'>+{</div><div class='add'>+	tdx_guest_keyid_free(kvm_tdx-&gt;hkid);</div><div class='add'>+	kvm_tdx-&gt;hkid = -1;</div><div class='add'>+	atomic_dec(&amp;nr_configured_hkid);</div><div class='add'>+	misc_cg_uncharge(MISC_CG_RES_TDX, kvm_tdx-&gt;misc_cg, 1);</div><div class='add'>+	put_misc_cg(kvm_tdx-&gt;misc_cg);</div><div class='add'>+	kvm_tdx-&gt;misc_cg = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_hkid_assigned(struct kvm_tdx *kvm_tdx)</div><div class='add'>+{</div><div class='add'>+	return kvm_tdx-&gt;hkid &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void tdx_disassociate_vp(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_irqs_disabled();</div><div class='add'>+</div><div class='add'>+	list_del(&amp;to_tdx(vcpu)-&gt;cpu_list);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ensure tdx-&gt;cpu_list is updated before setting vcpu-&gt;cpu to -1,</div><div class='add'>+	 * otherwise, a different CPU can see vcpu-&gt;cpu = -1 and add the vCPU</div><div class='add'>+	 * to its list before it's deleted from this CPU's list.</div><div class='add'>+	 */</div><div class='add'>+	smp_wmb();</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;cpu = -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_clear_page(struct page *page)</div><div class='add'>+{</div><div class='add'>+	const void *zero_page = (const void *) page_to_virt(ZERO_PAGE(0));</div><div class='add'>+	void *dest = page_to_virt(page);</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The page could have been poisoned.  MOVDIR64B also clears</div><div class='add'>+	 * the poison bit so the kernel can safely use the page again.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; PAGE_SIZE; i += 64)</div><div class='add'>+		movdir64b(dest + i, zero_page);</div><div class='add'>+	/*</div><div class='add'>+	 * MOVDIR64B store uses WC buffer.  Prevent following memory reads</div><div class='add'>+	 * from seeing potentially poisoned cache.</div><div class='add'>+	 */</div><div class='add'>+	__mb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_no_vcpus_enter_start(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(kvm_tdx-&gt;wait_for_sept_zap, true);</div><div class='add'>+</div><div class='add'>+	kvm_make_all_cpus_request(kvm, KVM_REQ_OUTSIDE_GUEST_MODE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_no_vcpus_enter_stop(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(kvm_tdx-&gt;wait_for_sept_zap, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TDH.PHYMEM.PAGE.RECLAIM is allowed only when destroying the TD. */</div><div class='add'>+static int __tdx_reclaim_page(struct page *page)</div><div class='add'>+{</div><div class='add'>+	u64 err, rcx, rdx, r8;</div><div class='add'>+</div><div class='add'>+	err = tdh_phymem_page_reclaim(page, &amp;rcx, &amp;rdx, &amp;r8);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * No need to check for TDX_OPERAND_BUSY; all TD pages are freed</div><div class='add'>+	 * before the HKID is released and control pages have also been</div><div class='add'>+	 * released at this point, so there is no possibility of contention.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON_ONCE(err)) {</div><div class='add'>+		pr_tdx_error_3(TDH_PHYMEM_PAGE_RECLAIM, err, rcx, rdx, r8);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_reclaim_page(struct page *page)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	r = __tdx_reclaim_page(page);</div><div class='add'>+	if (!r)</div><div class='add'>+		tdx_clear_page(page);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Reclaim the TD control page(s) which are crypto-protected by TDX guest's</div><div class='add'>+ * private KeyID.  Assume the cache associated with the TDX private KeyID has</div><div class='add'>+ * been flushed.</div><div class='add'>+ */</div><div class='add'>+static void tdx_reclaim_control_page(struct page *ctrl_page)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Leak the page if the kernel failed to reclaim the page.</div><div class='add'>+	 * The kernel cannot use it safely anymore.</div><div class='add'>+	 */</div><div class='add'>+	if (tdx_reclaim_page(ctrl_page))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	__free_page(ctrl_page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct tdx_flush_vp_arg {</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	u64 err;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void tdx_flush_vp(void *_arg)</div><div class='add'>+{</div><div class='add'>+	struct tdx_flush_vp_arg *arg = _arg;</div><div class='add'>+	struct kvm_vcpu *vcpu = arg-&gt;vcpu;</div><div class='add'>+	u64 err;</div><div class='add'>+</div><div class='add'>+	arg-&gt;err = 0;</div><div class='add'>+	lockdep_assert_irqs_disabled();</div><div class='add'>+</div><div class='add'>+	/* Task migration can race with CPU offlining. */</div><div class='add'>+	if (unlikely(vcpu-&gt;cpu != raw_smp_processor_id()))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * No need to do TDH_VP_FLUSH if the vCPU hasn't been initialized.  The</div><div class='add'>+	 * list tracking still needs to be updated so that it's correct if/when</div><div class='add'>+	 * the vCPU does get initialized.</div><div class='add'>+	 */</div><div class='add'>+	if (to_tdx(vcpu)-&gt;state != VCPU_TD_STATE_UNINITIALIZED) {</div><div class='add'>+		/*</div><div class='add'>+		 * No need to retry.  TDX Resources needed for TDH.VP.FLUSH are:</div><div class='add'>+		 * TDVPR as exclusive, TDR as shared, and TDCS as shared.  This</div><div class='add'>+		 * vp flush function is called when destructing vCPU/TD or vCPU</div><div class='add'>+		 * migration.  No other thread uses TDVPR in those cases.</div><div class='add'>+		 */</div><div class='add'>+		err = tdh_vp_flush(&amp;to_tdx(vcpu)-&gt;vp);</div><div class='add'>+		if (unlikely(err &amp;&amp; err != TDX_VCPU_NOT_ASSOCIATED)) {</div><div class='add'>+			/*</div><div class='add'>+			 * This function is called in IPI context. Do not use</div><div class='add'>+			 * printk to avoid console semaphore.</div><div class='add'>+			 * The caller prints out the error message, instead.</div><div class='add'>+			 */</div><div class='add'>+			if (err)</div><div class='add'>+				arg-&gt;err = err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tdx_disassociate_vp(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_flush_vp_on_cpu(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct tdx_flush_vp_arg arg = {</div><div class='add'>+		.vcpu = vcpu,</div><div class='add'>+	};</div><div class='add'>+	int cpu = vcpu-&gt;cpu;</div><div class='add'>+</div><div class='add'>+	if (unlikely(cpu == -1))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	smp_call_function_single(cpu, tdx_flush_vp, &amp;arg, 1);</div><div class='add'>+	if (KVM_BUG_ON(arg.err, vcpu-&gt;kvm))</div><div class='add'>+		pr_tdx_error(TDH_VP_FLUSH, arg.err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_disable_virtualization_cpu(void)</div><div class='add'>+{</div><div class='add'>+	int cpu = raw_smp_processor_id();</div><div class='add'>+	struct list_head *tdvcpus = &amp;per_cpu(associated_tdvcpus, cpu);</div><div class='add'>+	struct tdx_flush_vp_arg arg;</div><div class='add'>+	struct vcpu_tdx *tdx, *tmp;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	/* Safe variant needed as tdx_disassociate_vp() deletes the entry. */</div><div class='add'>+	list_for_each_entry_safe(tdx, tmp, tdvcpus, cpu_list) {</div><div class='add'>+		arg.vcpu = &amp;tdx-&gt;vcpu;</div><div class='add'>+		tdx_flush_vp(&amp;arg);</div><div class='add'>+	}</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define TDX_SEAMCALL_RETRIES 10000</div><div class='add'>+</div><div class='add'>+static void smp_func_do_phymem_cache_wb(void *unused)</div><div class='add'>+{</div><div class='add'>+	u64 err = 0;</div><div class='add'>+	bool resume;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDH.PHYMEM.CACHE.WB flushes caches associated with any TDX private</div><div class='add'>+	 * KeyID on the package or core.  The TDX module may not finish the</div><div class='add'>+	 * cache flush but return TDX_INTERRUPTED_RESUMEABLE instead.  The</div><div class='add'>+	 * kernel should retry it until it returns success w/o rescheduling.</div><div class='add'>+	 */</div><div class='add'>+	for (i = TDX_SEAMCALL_RETRIES; i &gt; 0; i--) {</div><div class='add'>+		resume = !!err;</div><div class='add'>+		err = tdh_phymem_cache_wb(resume);</div><div class='add'>+		switch (err) {</div><div class='add'>+		case TDX_INTERRUPTED_RESUMABLE:</div><div class='add'>+			continue;</div><div class='add'>+		case TDX_NO_HKID_READY_TO_WBCACHE:</div><div class='add'>+			err = TDX_SUCCESS; /* Already done by other thread */</div><div class='add'>+			fallthrough;</div><div class='add'>+		default:</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (WARN_ON_ONCE(err))</div><div class='add'>+		pr_tdx_error(TDH_PHYMEM_CACHE_WB, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_mmu_release_hkid(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	bool packages_allocated, targets_allocated;</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	cpumask_var_t packages, targets;</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	unsigned long j;</div><div class='add'>+	int i;</div><div class='add'>+	u64 err;</div><div class='add'>+</div><div class='add'>+	if (!is_hkid_assigned(kvm_tdx))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	packages_allocated = zalloc_cpumask_var(&amp;packages, GFP_KERNEL);</div><div class='add'>+	targets_allocated = zalloc_cpumask_var(&amp;targets, GFP_KERNEL);</div><div class='add'>+	cpus_read_lock();</div><div class='add'>+</div><div class='add'>+	kvm_for_each_vcpu(j, vcpu, kvm)</div><div class='add'>+		tdx_flush_vp_on_cpu(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDH.PHYMEM.CACHE.WB tries to acquire the TDX module global lock</div><div class='add'>+	 * and can fail with TDX_OPERAND_BUSY when it fails to get the lock.</div><div class='add'>+	 * Multiple TDX guests can be destroyed simultaneously. Take the</div><div class='add'>+	 * mutex to prevent it from getting error.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;tdx_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Releasing HKID is in vm_destroy().</div><div class='add'>+	 * After the above flushing vps, there should be no more vCPU</div><div class='add'>+	 * associations, as all vCPU fds have been released at this stage.</div><div class='add'>+	 */</div><div class='add'>+	err = tdh_mng_vpflushdone(&amp;kvm_tdx-&gt;td);</div><div class='add'>+	if (err == TDX_FLUSHVP_NOT_DONE)</div><div class='add'>+		goto out;</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error(TDH_MNG_VPFLUSHDONE, err);</div><div class='add'>+		pr_err("tdh_mng_vpflushdone() failed. HKID %d is leaked.\n",</div><div class='add'>+		       kvm_tdx-&gt;hkid);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_online_cpu(i) {</div><div class='add'>+		if (packages_allocated &amp;&amp;</div><div class='add'>+		    cpumask_test_and_set_cpu(topology_physical_package_id(i),</div><div class='add'>+					     packages))</div><div class='add'>+			continue;</div><div class='add'>+		if (targets_allocated)</div><div class='add'>+			cpumask_set_cpu(i, targets);</div><div class='add'>+	}</div><div class='add'>+	if (targets_allocated)</div><div class='add'>+		on_each_cpu_mask(targets, smp_func_do_phymem_cache_wb, NULL, true);</div><div class='add'>+	else</div><div class='add'>+		on_each_cpu(smp_func_do_phymem_cache_wb, NULL, true);</div><div class='add'>+	/*</div><div class='add'>+	 * In the case of error in smp_func_do_phymem_cache_wb(), the following</div><div class='add'>+	 * tdh_mng_key_freeid() will fail.</div><div class='add'>+	 */</div><div class='add'>+	err = tdh_mng_key_freeid(&amp;kvm_tdx-&gt;td);</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error(TDH_MNG_KEY_FREEID, err);</div><div class='add'>+		pr_err("tdh_mng_key_freeid() failed. HKID %d is leaked.\n",</div><div class='add'>+		       kvm_tdx-&gt;hkid);</div><div class='add'>+	} else {</div><div class='add'>+		tdx_hkid_free(kvm_tdx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;tdx_lock);</div><div class='add'>+	cpus_read_unlock();</div><div class='add'>+	free_cpumask_var(targets);</div><div class='add'>+	free_cpumask_var(packages);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_reclaim_td_control_pages(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	u64 err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * tdx_mmu_release_hkid() failed to reclaim HKID.  Something went wrong</div><div class='add'>+	 * heavily with TDX module.  Give up freeing TD pages.  As the function</div><div class='add'>+	 * already warned, don't warn it again.</div><div class='add'>+	 */</div><div class='add'>+	if (is_hkid_assigned(kvm_tdx))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (kvm_tdx-&gt;td.tdcs_pages) {</div><div class='add'>+		for (i = 0; i &lt; kvm_tdx-&gt;td.tdcs_nr_pages; i++) {</div><div class='add'>+			if (!kvm_tdx-&gt;td.tdcs_pages[i])</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			tdx_reclaim_control_page(kvm_tdx-&gt;td.tdcs_pages[i]);</div><div class='add'>+		}</div><div class='add'>+		kfree(kvm_tdx-&gt;td.tdcs_pages);</div><div class='add'>+		kvm_tdx-&gt;td.tdcs_pages = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!kvm_tdx-&gt;td.tdr_page)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (__tdx_reclaim_page(kvm_tdx-&gt;td.tdr_page))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Use a SEAMCALL to ask the TDX module to flush the cache based on the</div><div class='add'>+	 * KeyID. TDX module may access TDR while operating on TD (Especially</div><div class='add'>+	 * when it is reclaiming TDCS).</div><div class='add'>+	 */</div><div class='add'>+	err = tdh_phymem_page_wbinvd_tdr(&amp;kvm_tdx-&gt;td);</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error(TDH_PHYMEM_PAGE_WBINVD, err);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	tdx_clear_page(kvm_tdx-&gt;td.tdr_page);</div><div class='add'>+</div><div class='add'>+	__free_page(kvm_tdx-&gt;td.tdr_page);</div><div class='add'>+	kvm_tdx-&gt;td.tdr_page = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_vm_destroy(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+</div><div class='add'>+	tdx_reclaim_td_control_pages(kvm);</div><div class='add'>+</div><div class='add'>+	kvm_tdx-&gt;state = TD_STATE_UNINITIALIZED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_do_tdh_mng_key_config(void *param)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = param;</div><div class='add'>+	u64 err;</div><div class='add'>+</div><div class='add'>+	/* TDX_RND_NO_ENTROPY related retries are handled by sc_retry() */</div><div class='add'>+	err = tdh_mng_key_config(&amp;kvm_tdx-&gt;td);</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(err, &amp;kvm_tdx-&gt;kvm)) {</div><div class='add'>+		pr_tdx_error(TDH_MNG_KEY_CONFIG, err);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_vm_init(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+</div><div class='add'>+	kvm-&gt;arch.has_protected_state = true;</div><div class='add'>+	kvm-&gt;arch.has_private_mem = true;</div><div class='add'>+	kvm-&gt;arch.disabled_quirks |= KVM_X86_QUIRK_IGNORE_GUEST_PAT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Because guest TD is protected, VMM can't parse the instruction in TD.</div><div class='add'>+	 * Instead, guest uses MMIO hypercall.  For unmodified device driver,</div><div class='add'>+	 * #VE needs to be injected for MMIO and #VE handler in TD converts MMIO</div><div class='add'>+	 * instruction into MMIO hypercall.</div><div class='add'>+	 *</div><div class='add'>+	 * SPTE value for MMIO needs to be setup so that #VE is injected into</div><div class='add'>+	 * TD instead of triggering EPT MISCONFIG.</div><div class='add'>+	 * - RWX=0 so that EPT violation is triggered.</div><div class='add'>+	 * - suppress #VE bit is cleared to inject #VE.</div><div class='add'>+	 */</div><div class='add'>+	kvm_mmu_set_mmio_spte_value(kvm, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX has its own limit of maximum vCPUs it can support for all</div><div class='add'>+	 * TDX guests in addition to KVM_MAX_VCPUS.  TDX module reports</div><div class='add'>+	 * such limit via the MAX_VCPU_PER_TD global metadata.  In</div><div class='add'>+	 * practice, it reflects the number of logical CPUs that ALL</div><div class='add'>+	 * platforms that the TDX module supports can possibly have.</div><div class='add'>+	 *</div><div class='add'>+	 * Limit TDX guest's maximum vCPUs to the number of logical CPUs</div><div class='add'>+	 * the platform has.  Simply forwarding the MAX_VCPU_PER_TD to</div><div class='add'>+	 * userspace would result in an unpredictable ABI.</div><div class='add'>+	 */</div><div class='add'>+	kvm-&gt;max_vcpus = min_t(int, kvm-&gt;max_vcpus, num_present_cpus());</div><div class='add'>+</div><div class='add'>+	kvm_tdx-&gt;state = TD_STATE_UNINITIALIZED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu-&gt;kvm);</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	if (kvm_tdx-&gt;state != TD_STATE_INITIALIZED)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX module mandates APICv, which requires an in-kernel local APIC.</div><div class='add'>+	 * Disallow an in-kernel I/O APIC, because level-triggered interrupts</div><div class='add'>+	 * and thus the I/O APIC as a whole can't be faithfully emulated in KVM.</div><div class='add'>+	 */</div><div class='add'>+	if (!irqchip_split(vcpu-&gt;kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	fpstate_set_confidential(&amp;vcpu-&gt;arch.guest_fpu);</div><div class='add'>+	vcpu-&gt;arch.apic-&gt;guest_apic_protected = true;</div><div class='add'>+	INIT_LIST_HEAD(&amp;tdx-&gt;vt.pi_wakeup_list);</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.efer = EFER_SCE | EFER_LME | EFER_LMA | EFER_NX;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.switch_db_regs = KVM_DEBUGREG_AUTO_SWITCH;</div><div class='add'>+	vcpu-&gt;arch.cr0_guest_owned_bits = -1ul;</div><div class='add'>+	vcpu-&gt;arch.cr4_guest_owned_bits = -1ul;</div><div class='add'>+</div><div class='add'>+	/* KVM can't change TSC offset/multiplier as TDX module manages them. */</div><div class='add'>+	vcpu-&gt;arch.guest_tsc_protected = true;</div><div class='add'>+	vcpu-&gt;arch.tsc_offset = kvm_tdx-&gt;tsc_offset;</div><div class='add'>+	vcpu-&gt;arch.l1_tsc_offset = vcpu-&gt;arch.tsc_offset;</div><div class='add'>+	vcpu-&gt;arch.tsc_scaling_ratio = kvm_tdx-&gt;tsc_multiplier;</div><div class='add'>+	vcpu-&gt;arch.l1_tsc_scaling_ratio = kvm_tdx-&gt;tsc_multiplier;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.guest_state_protected =</div><div class='add'>+		!(to_kvm_tdx(vcpu-&gt;kvm)-&gt;attributes &amp; TDX_TD_ATTR_DEBUG);</div><div class='add'>+</div><div class='add'>+	if ((kvm_tdx-&gt;xfam &amp; XFEATURE_MASK_XTILE) == XFEATURE_MASK_XTILE)</div><div class='add'>+		vcpu-&gt;arch.xfd_no_write_intercept = true;</div><div class='add'>+</div><div class='add'>+	tdx-&gt;vt.pi_desc.nv = POSTED_INTR_VECTOR;</div><div class='add'>+	__pi_set_sn(&amp;tdx-&gt;vt.pi_desc);</div><div class='add'>+</div><div class='add'>+	tdx-&gt;state = VCPU_TD_STATE_UNINITIALIZED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	vmx_vcpu_pi_load(vcpu, cpu);</div><div class='add'>+	if (vcpu-&gt;cpu == cpu || !is_hkid_assigned(to_kvm_tdx(vcpu-&gt;kvm)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tdx_flush_vp_on_cpu(vcpu);</div><div class='add'>+</div><div class='add'>+	KVM_BUG_ON(cpu != raw_smp_processor_id(), vcpu-&gt;kvm);</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	/*</div><div class='add'>+	 * Pairs with the smp_wmb() in tdx_disassociate_vp() to ensure</div><div class='add'>+	 * vcpu-&gt;cpu is read before tdx-&gt;cpu_list.</div><div class='add'>+	 */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	list_add(&amp;tdx-&gt;cpu_list, &amp;per_cpu(associated_tdvcpus, cpu));</div><div class='add'>+	local_irq_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool tdx_interrupt_allowed(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * KVM can't get the interrupt status of TDX guest and it assumes</div><div class='add'>+	 * interrupt is always allowed unless TDX guest calls TDVMCALL with HLT,</div><div class='add'>+	 * which passes the interrupt blocked flag.</div><div class='add'>+	 */</div><div class='add'>+	return vmx_get_exit_reason(vcpu).basic != EXIT_REASON_HLT ||</div><div class='add'>+	       !to_tdx(vcpu)-&gt;vp_enter_args.r12;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool tdx_protected_apic_has_interrupt(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 vcpu_state_details;</div><div class='add'>+</div><div class='add'>+	if (pi_has_pending_interrupt(vcpu))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Only check RVI pending for HALTED case with IRQ enabled.</div><div class='add'>+	 * For non-HLT cases, KVM doesn't care about STI/SS shadows.  And if the</div><div class='add'>+	 * interrupt was pending before TD exit, then it _must_ be blocked,</div><div class='add'>+	 * otherwise the interrupt would have been serviced at the instruction</div><div class='add'>+	 * boundary.</div><div class='add'>+	 */</div><div class='add'>+	if (vmx_get_exit_reason(vcpu).basic != EXIT_REASON_HLT ||</div><div class='add'>+	    to_tdx(vcpu)-&gt;vp_enter_args.r12)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	vcpu_state_details =</div><div class='add'>+		td_state_non_arch_read64(to_tdx(vcpu), TD_VCPU_STATE_DETAILS_NON_ARCH);</div><div class='add'>+</div><div class='add'>+	return tdx_vcpu_state_details_intr_pending(vcpu_state_details);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Compared to vmx_prepare_switch_to_guest(), there is not much to do</div><div class='add'>+ * as SEAMCALL/SEAMRET calls take care of most of save and restore.</div><div class='add'>+ */</div><div class='add'>+void tdx_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;guest_state_loaded)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (likely(is_64bit_mm(current-&gt;mm)))</div><div class='add'>+		vt-&gt;msr_host_kernel_gs_base = current-&gt;thread.gsbase;</div><div class='add'>+	else</div><div class='add'>+		vt-&gt;msr_host_kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE);</div><div class='add'>+</div><div class='add'>+	vt-&gt;host_debugctlmsr = get_debugctlmsr();</div><div class='add'>+</div><div class='add'>+	vt-&gt;guest_state_loaded = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct tdx_uret_msr {</div><div class='add'>+	u32 msr;</div><div class='add'>+	unsigned int slot;</div><div class='add'>+	u64 defval;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct tdx_uret_msr tdx_uret_msrs[] = {</div><div class='add'>+	{.msr = MSR_SYSCALL_MASK, .defval = 0x20200 },</div><div class='add'>+	{.msr = MSR_STAR,},</div><div class='add'>+	{.msr = MSR_LSTAR,},</div><div class='add'>+	{.msr = MSR_TSC_AUX,},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void tdx_user_return_msr_update_cache(void)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tdx_uret_msrs); i++)</div><div class='add'>+		kvm_user_return_msr_update_cache(tdx_uret_msrs[i].slot,</div><div class='add'>+						 tdx_uret_msrs[i].defval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_prepare_switch_to_host(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	if (!vt-&gt;guest_state_loaded)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	++vcpu-&gt;stat.host_state_reload;</div><div class='add'>+	wrmsrl(MSR_KERNEL_GS_BASE, vt-&gt;msr_host_kernel_gs_base);</div><div class='add'>+</div><div class='add'>+	if (tdx-&gt;guest_entered) {</div><div class='add'>+		tdx_user_return_msr_update_cache();</div><div class='add'>+		tdx-&gt;guest_entered = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vt-&gt;guest_state_loaded = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	vmx_vcpu_pi_put(vcpu);</div><div class='add'>+	tdx_prepare_switch_to_host(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_vcpu_free(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu-&gt;kvm);</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * It is not possible to reclaim pages while hkid is assigned. It might</div><div class='add'>+	 * be assigned if:</div><div class='add'>+	 * 1. the TD VM is being destroyed but freeing hkid failed, in which</div><div class='add'>+	 * case the pages are leaked</div><div class='add'>+	 * 2. TD VCPU creation failed and this on the error path, in which case</div><div class='add'>+	 * there is nothing to do anyway</div><div class='add'>+	 */</div><div class='add'>+	if (is_hkid_assigned(kvm_tdx))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (tdx-&gt;vp.tdcx_pages) {</div><div class='add'>+		for (i = 0; i &lt; kvm_tdx-&gt;td.tdcx_nr_pages; i++) {</div><div class='add'>+			if (tdx-&gt;vp.tdcx_pages[i])</div><div class='add'>+				tdx_reclaim_control_page(tdx-&gt;vp.tdcx_pages[i]);</div><div class='add'>+		}</div><div class='add'>+		kfree(tdx-&gt;vp.tdcx_pages);</div><div class='add'>+		tdx-&gt;vp.tdcx_pages = NULL;</div><div class='add'>+	}</div><div class='add'>+	if (tdx-&gt;vp.tdvpr_page) {</div><div class='add'>+		tdx_reclaim_control_page(tdx-&gt;vp.tdvpr_page);</div><div class='add'>+		tdx-&gt;vp.tdvpr_page = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tdx-&gt;state = VCPU_TD_STATE_UNINITIALIZED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_vcpu_pre_run(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(to_tdx(vcpu)-&gt;state != VCPU_TD_STATE_INITIALIZED ||</div><div class='add'>+		     to_kvm_tdx(vcpu-&gt;kvm)-&gt;state != TD_STATE_RUNNABLE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline u32 tdcall_to_vmx_exit_reason(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	switch (tdvmcall_leaf(vcpu)) {</div><div class='add'>+	case EXIT_REASON_CPUID:</div><div class='add'>+	case EXIT_REASON_HLT:</div><div class='add'>+	case EXIT_REASON_IO_INSTRUCTION:</div><div class='add'>+	case EXIT_REASON_MSR_READ:</div><div class='add'>+	case EXIT_REASON_MSR_WRITE:</div><div class='add'>+		return tdvmcall_leaf(vcpu);</div><div class='add'>+	case EXIT_REASON_EPT_VIOLATION:</div><div class='add'>+		return EXIT_REASON_EPT_MISCONFIG;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return EXIT_REASON_TDCALL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline u32 tdx_to_vmx_exit_reason(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	u32 exit_reason;</div><div class='add'>+</div><div class='add'>+	switch (tdx-&gt;vp_enter_ret &amp; TDX_SEAMCALL_STATUS_MASK) {</div><div class='add'>+	case TDX_SUCCESS:</div><div class='add'>+	case TDX_NON_RECOVERABLE_VCPU:</div><div class='add'>+	case TDX_NON_RECOVERABLE_TD:</div><div class='add'>+	case TDX_NON_RECOVERABLE_TD_NON_ACCESSIBLE:</div><div class='add'>+	case TDX_NON_RECOVERABLE_TD_WRONG_APIC_MODE:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1u;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	exit_reason = tdx-&gt;vp_enter_ret;</div><div class='add'>+</div><div class='add'>+	switch (exit_reason) {</div><div class='add'>+	case EXIT_REASON_TDCALL:</div><div class='add'>+		if (tdvmcall_exit_type(vcpu))</div><div class='add'>+			return EXIT_REASON_VMCALL;</div><div class='add'>+</div><div class='add'>+		return tdcall_to_vmx_exit_reason(vcpu);</div><div class='add'>+	case EXIT_REASON_EPT_MISCONFIG:</div><div class='add'>+		/*</div><div class='add'>+		 * Defer KVM_BUG_ON() until tdx_handle_exit() because this is in</div><div class='add'>+		 * non-instrumentable code with interrupts disabled.</div><div class='add'>+		 */</div><div class='add'>+		return -1u;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return exit_reason;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static noinstr void tdx_vcpu_enter_exit(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='add'>+</div><div class='add'>+	guest_state_enter_irqoff();</div><div class='add'>+</div><div class='add'>+	tdx-&gt;vp_enter_ret = tdh_vp_enter(&amp;tdx-&gt;vp, &amp;tdx-&gt;vp_enter_args);</div><div class='add'>+</div><div class='add'>+	vt-&gt;exit_reason.full = tdx_to_vmx_exit_reason(vcpu);</div><div class='add'>+</div><div class='add'>+	vt-&gt;exit_qualification = tdx-&gt;vp_enter_args.rcx;</div><div class='add'>+	tdx-&gt;ext_exit_qualification = tdx-&gt;vp_enter_args.rdx;</div><div class='add'>+	tdx-&gt;exit_gpa = tdx-&gt;vp_enter_args.r8;</div><div class='add'>+	vt-&gt;exit_intr_info = tdx-&gt;vp_enter_args.r9;</div><div class='add'>+</div><div class='add'>+	vmx_handle_nmi(vcpu);</div><div class='add'>+</div><div class='add'>+	guest_state_exit_irqoff();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool tdx_failed_vmentry(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return vmx_get_exit_reason(vcpu).failed_vmentry &amp;&amp;</div><div class='add'>+	       vmx_get_exit_reason(vcpu).full != -1u;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static fastpath_t tdx_exit_handlers_fastpath(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 vp_enter_ret = to_tdx(vcpu)-&gt;vp_enter_ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX_OPERAND_BUSY could be returned for SEPT due to 0-step mitigation</div><div class='add'>+	 * or for TD EPOCH due to contention with TDH.MEM.TRACK on TDH.VP.ENTER.</div><div class='add'>+	 *</div><div class='add'>+	 * When KVM requests KVM_REQ_OUTSIDE_GUEST_MODE, which has both</div><div class='add'>+	 * KVM_REQUEST_WAIT and KVM_REQUEST_NO_ACTION set, it requires target</div><div class='add'>+	 * vCPUs leaving fastpath so that interrupt can be enabled to ensure the</div><div class='add'>+	 * IPIs can be delivered. Return EXIT_FASTPATH_EXIT_HANDLED instead of</div><div class='add'>+	 * EXIT_FASTPATH_REENTER_GUEST to exit fastpath, otherwise, the</div><div class='add'>+	 * requester may be blocked endlessly.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(tdx_operand_busy(vp_enter_ret)))</div><div class='add'>+		return EXIT_FASTPATH_EXIT_HANDLED;</div><div class='add'>+</div><div class='add'>+	return EXIT_FASTPATH_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define TDX_REGS_AVAIL_SET	(BIT_ULL(VCPU_EXREG_EXIT_INFO_1) | \</div><div class='add'>+				 BIT_ULL(VCPU_EXREG_EXIT_INFO_2) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_RAX) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_RBX) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_RCX) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_RDX) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_RBP) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_RSI) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_RDI) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R8) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R9) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R10) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R11) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R12) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R13) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R14) | \</div><div class='add'>+				 BIT_ULL(VCPU_REGS_R15))</div><div class='add'>+</div><div class='add'>+static void tdx_load_host_xsave_state(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu-&gt;kvm);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * All TDX hosts support PKRU; but even if they didn't,</div><div class='add'>+	 * vcpu-&gt;arch.host_pkru would be 0 and the wrpkru would be</div><div class='add'>+	 * skipped.</div><div class='add'>+	 */</div><div class='add'>+	if (vcpu-&gt;arch.host_pkru != 0)</div><div class='add'>+		wrpkru(vcpu-&gt;arch.host_pkru);</div><div class='add'>+</div><div class='add'>+	if (kvm_host.xcr0 != (kvm_tdx-&gt;xfam &amp; kvm_caps.supported_xcr0))</div><div class='add'>+		xsetbv(XCR_XFEATURE_ENABLED_MASK, kvm_host.xcr0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Likewise, even if a TDX hosts didn't support XSS both arms of</div><div class='add'>+	 * the comparison would be 0 and the wrmsrl would be skipped.</div><div class='add'>+	 */</div><div class='add'>+	if (kvm_host.xss != (kvm_tdx-&gt;xfam &amp; kvm_caps.supported_xss))</div><div class='add'>+		wrmsrl(MSR_IA32_XSS, kvm_host.xss);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define TDX_DEBUGCTL_PRESERVED (DEBUGCTLMSR_BTF | \</div><div class='add'>+				DEBUGCTLMSR_FREEZE_PERFMON_ON_PMI | \</div><div class='add'>+				DEBUGCTLMSR_FREEZE_IN_SMM)</div><div class='add'>+</div><div class='add'>+fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * force_immediate_exit requires vCPU entering for events injection with</div><div class='add'>+	 * an immediately exit followed. But The TDX module doesn't guarantee</div><div class='add'>+	 * entry, it's already possible for KVM to _think_ it completely entry</div><div class='add'>+	 * to the guest without actually having done so.</div><div class='add'>+	 * Since KVM never needs to force an immediate exit for TDX, and can't</div><div class='add'>+	 * do direct injection, just warn on force_immediate_exit.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON_ONCE(force_immediate_exit);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Wait until retry of SEPT-zap-related SEAMCALL completes before</div><div class='add'>+	 * allowing vCPU entry to avoid contention with tdh_vp_enter() and</div><div class='add'>+	 * TDCALLs.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(READ_ONCE(to_kvm_tdx(vcpu-&gt;kvm)-&gt;wait_for_sept_zap)))</div><div class='add'>+		return EXIT_FASTPATH_EXIT_HANDLED;</div><div class='add'>+</div><div class='add'>+	trace_kvm_entry(vcpu, force_immediate_exit);</div><div class='add'>+</div><div class='add'>+	if (pi_test_on(&amp;vt-&gt;pi_desc)) {</div><div class='add'>+		apic-&gt;send_IPI_self(POSTED_INTR_VECTOR);</div><div class='add'>+</div><div class='add'>+		if (pi_test_pir(kvm_lapic_get_reg(vcpu-&gt;arch.apic, APIC_LVTT) &amp;</div><div class='add'>+			       APIC_VECTOR_MASK, &amp;vt-&gt;pi_desc))</div><div class='add'>+			kvm_wait_lapic_expire(vcpu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tdx_vcpu_enter_exit(vcpu);</div><div class='add'>+</div><div class='add'>+	if (vt-&gt;host_debugctlmsr &amp; ~TDX_DEBUGCTL_PRESERVED)</div><div class='add'>+		update_debugctlmsr(vt-&gt;host_debugctlmsr);</div><div class='add'>+</div><div class='add'>+	tdx_load_host_xsave_state(vcpu);</div><div class='add'>+	tdx-&gt;guest_entered = true;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.regs_avail &amp;= TDX_REGS_AVAIL_SET;</div><div class='add'>+</div><div class='add'>+	if (unlikely(tdx-&gt;vp_enter_ret == EXIT_REASON_EPT_MISCONFIG))</div><div class='add'>+		return EXIT_FASTPATH_NONE;</div><div class='add'>+</div><div class='add'>+	if (unlikely((tdx-&gt;vp_enter_ret &amp; TDX_SW_ERROR) == TDX_SW_ERROR))</div><div class='add'>+		return EXIT_FASTPATH_NONE;</div><div class='add'>+</div><div class='add'>+	if (unlikely(vmx_get_exit_reason(vcpu).basic == EXIT_REASON_MCE_DURING_VMENTRY))</div><div class='add'>+		kvm_machine_check();</div><div class='add'>+</div><div class='add'>+	trace_kvm_exit(vcpu, KVM_ISA_VMX);</div><div class='add'>+</div><div class='add'>+	if (unlikely(tdx_failed_vmentry(vcpu)))</div><div class='add'>+		return EXIT_FASTPATH_NONE;</div><div class='add'>+</div><div class='add'>+	return tdx_exit_handlers_fastpath(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_inject_nmi(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	++vcpu-&gt;stat.nmi_injections;</div><div class='add'>+	td_management_write8(to_tdx(vcpu), TD_VCPU_PEND_NMI, 1);</div><div class='add'>+	/*</div><div class='add'>+	 * From KVM's perspective, NMI injection is completed right after</div><div class='add'>+	 * writing to PEND_NMI.  KVM doesn't care whether an NMI is injected by</div><div class='add'>+	 * the TDX module or not.</div><div class='add'>+	 */</div><div class='add'>+	vcpu-&gt;arch.nmi_injected = false;</div><div class='add'>+	/*</div><div class='add'>+	 * TDX doesn't support KVM to request NMI window exit.  If there is</div><div class='add'>+	 * still a pending vNMI, KVM is not able to inject it along with the</div><div class='add'>+	 * one pending in TDX module in a back-to-back way.  Since the previous</div><div class='add'>+	 * vNMI is still pending in TDX module, i.e. it has not been delivered</div><div class='add'>+	 * to TDX guest yet, it's OK to collapse the pending vNMI into the</div><div class='add'>+	 * previous one.  The guest is expected to handle all the NMI sources</div><div class='add'>+	 * when handling the first vNMI.</div><div class='add'>+	 */</div><div class='add'>+	vcpu-&gt;arch.nmi_pending = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_handle_exception_nmi(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u32 intr_info = vmx_get_intr_info(vcpu);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Machine checks are handled by handle_exception_irqoff(), or by</div><div class='add'>+	 * tdx_handle_exit() with TDX_NON_RECOVERABLE set if a #MC occurs on</div><div class='add'>+	 * VM-Entry.  NMIs are handled by tdx_vcpu_enter_exit().</div><div class='add'>+	 */</div><div class='add'>+	if (is_nmi(intr_info) || is_machine_check(intr_info))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_EXCEPTION;</div><div class='add'>+	vcpu-&gt;run-&gt;ex.exception = intr_info &amp; INTR_INFO_VECTOR_MASK;</div><div class='add'>+	vcpu-&gt;run-&gt;ex.error_code = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int complete_hypercall_exit(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	tdvmcall_set_return_code(vcpu, vcpu-&gt;run-&gt;hypercall.ret);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_emulate_vmcall(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	kvm_rax_write(vcpu, to_tdx(vcpu)-&gt;vp_enter_args.r10);</div><div class='add'>+	kvm_rbx_write(vcpu, to_tdx(vcpu)-&gt;vp_enter_args.r11);</div><div class='add'>+	kvm_rcx_write(vcpu, to_tdx(vcpu)-&gt;vp_enter_args.r12);</div><div class='add'>+	kvm_rdx_write(vcpu, to_tdx(vcpu)-&gt;vp_enter_args.r13);</div><div class='add'>+	kvm_rsi_write(vcpu, to_tdx(vcpu)-&gt;vp_enter_args.r14);</div><div class='add'>+</div><div class='add'>+	return __kvm_emulate_hypercall(vcpu, 0, complete_hypercall_exit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Split into chunks and check interrupt pending between chunks.  This allows</div><div class='add'>+ * for timely injection of interrupts to prevent issues with guest lockup</div><div class='add'>+ * detection.</div><div class='add'>+ */</div><div class='add'>+#define TDX_MAP_GPA_MAX_LEN (2 * 1024 * 1024)</div><div class='add'>+static void __tdx_map_gpa(struct vcpu_tdx *tdx);</div><div class='add'>+</div><div class='add'>+static int tdx_complete_vmcall_map_gpa(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	if (vcpu-&gt;run-&gt;hypercall.ret) {</div><div class='add'>+		tdvmcall_set_return_code(vcpu, TDVMCALL_STATUS_INVALID_OPERAND);</div><div class='add'>+		tdx-&gt;vp_enter_args.r11 = tdx-&gt;map_gpa_next;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tdx-&gt;map_gpa_next += TDX_MAP_GPA_MAX_LEN;</div><div class='add'>+	if (tdx-&gt;map_gpa_next &gt;= tdx-&gt;map_gpa_end)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Stop processing the remaining part if there is a pending interrupt,</div><div class='add'>+	 * which could be qualified to deliver.  Skip checking pending RVI for</div><div class='add'>+	 * TDVMCALL_MAP_GPA, see comments in tdx_protected_apic_has_interrupt().</div><div class='add'>+	 */</div><div class='add'>+	if (kvm_vcpu_has_events(vcpu)) {</div><div class='add'>+		tdvmcall_set_return_code(vcpu, TDVMCALL_STATUS_RETRY);</div><div class='add'>+		tdx-&gt;vp_enter_args.r11 = tdx-&gt;map_gpa_next;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__tdx_map_gpa(tdx);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __tdx_map_gpa(struct vcpu_tdx *tdx)</div><div class='add'>+{</div><div class='add'>+	u64 gpa = tdx-&gt;map_gpa_next;</div><div class='add'>+	u64 size = tdx-&gt;map_gpa_end - tdx-&gt;map_gpa_next;</div><div class='add'>+</div><div class='add'>+	if (size &gt; TDX_MAP_GPA_MAX_LEN)</div><div class='add'>+		size = TDX_MAP_GPA_MAX_LEN;</div><div class='add'>+</div><div class='add'>+	tdx-&gt;vcpu.run-&gt;exit_reason       = KVM_EXIT_HYPERCALL;</div><div class='add'>+	tdx-&gt;vcpu.run-&gt;hypercall.nr      = KVM_HC_MAP_GPA_RANGE;</div><div class='add'>+	/*</div><div class='add'>+	 * In principle this should have been -KVM_ENOSYS, but userspace (QEMU &lt;=9.2)</div><div class='add'>+	 * assumed that vcpu-&gt;run-&gt;hypercall.ret is never changed by KVM and thus that</div><div class='add'>+	 * it was always zero on KVM_EXIT_HYPERCALL.  Since KVM is now overwriting</div><div class='add'>+	 * vcpu-&gt;run-&gt;hypercall.ret, ensuring that it is zero to not break QEMU.</div><div class='add'>+	 */</div><div class='add'>+	tdx-&gt;vcpu.run-&gt;hypercall.ret = 0;</div><div class='add'>+	tdx-&gt;vcpu.run-&gt;hypercall.args[0] = gpa &amp; ~gfn_to_gpa(kvm_gfn_direct_bits(tdx-&gt;vcpu.kvm));</div><div class='add'>+	tdx-&gt;vcpu.run-&gt;hypercall.args[1] = size / PAGE_SIZE;</div><div class='add'>+	tdx-&gt;vcpu.run-&gt;hypercall.args[2] = vt_is_tdx_private_gpa(tdx-&gt;vcpu.kvm, gpa) ?</div><div class='add'>+					   KVM_MAP_GPA_RANGE_ENCRYPTED :</div><div class='add'>+					   KVM_MAP_GPA_RANGE_DECRYPTED;</div><div class='add'>+	tdx-&gt;vcpu.run-&gt;hypercall.flags   = KVM_EXIT_HYPERCALL_LONG_MODE;</div><div class='add'>+</div><div class='add'>+	tdx-&gt;vcpu.arch.complete_userspace_io = tdx_complete_vmcall_map_gpa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_map_gpa(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	u64 gpa = tdx-&gt;vp_enter_args.r12;</div><div class='add'>+	u64 size = tdx-&gt;vp_enter_args.r13;</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Converting TDVMCALL_MAP_GPA to KVM_HC_MAP_GPA_RANGE requires</div><div class='add'>+	 * userspace to enable KVM_CAP_EXIT_HYPERCALL with KVM_HC_MAP_GPA_RANGE</div><div class='add'>+	 * bit set.  If not, the error code is not defined in GHCI for TDX, use</div><div class='add'>+	 * TDVMCALL_STATUS_INVALID_OPERAND for this case.</div><div class='add'>+	 */</div><div class='add'>+	if (!user_exit_on_hypercall(vcpu-&gt;kvm, KVM_HC_MAP_GPA_RANGE)) {</div><div class='add'>+		ret = TDVMCALL_STATUS_INVALID_OPERAND;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gpa + size &lt;= gpa || !kvm_vcpu_is_legal_gpa(vcpu, gpa) ||</div><div class='add'>+	    !kvm_vcpu_is_legal_gpa(vcpu, gpa + size - 1) ||</div><div class='add'>+	    (vt_is_tdx_private_gpa(vcpu-&gt;kvm, gpa) !=</div><div class='add'>+	     vt_is_tdx_private_gpa(vcpu-&gt;kvm, gpa + size - 1))) {</div><div class='add'>+		ret = TDVMCALL_STATUS_INVALID_OPERAND;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!PAGE_ALIGNED(gpa) || !PAGE_ALIGNED(size)) {</div><div class='add'>+		ret = TDVMCALL_STATUS_ALIGN_ERROR;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tdx-&gt;map_gpa_end = gpa + size;</div><div class='add'>+	tdx-&gt;map_gpa_next = gpa;</div><div class='add'>+</div><div class='add'>+	__tdx_map_gpa(tdx);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	tdvmcall_set_return_code(vcpu, ret);</div><div class='add'>+	tdx-&gt;vp_enter_args.r11 = gpa;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_report_fatal_error(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	u64 *regs = vcpu-&gt;run-&gt;system_event.data;</div><div class='add'>+	u64 *module_regs = &amp;tdx-&gt;vp_enter_args.r8;</div><div class='add'>+	int index = VCPU_REGS_RAX;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_SYSTEM_EVENT;</div><div class='add'>+	vcpu-&gt;run-&gt;system_event.type = KVM_SYSTEM_EVENT_TDX_FATAL;</div><div class='add'>+	vcpu-&gt;run-&gt;system_event.ndata = 16;</div><div class='add'>+</div><div class='add'>+	/* Dump 16 general-purpose registers to userspace in ascending order. */</div><div class='add'>+	regs[index++] = tdx-&gt;vp_enter_ret;</div><div class='add'>+	regs[index++] = tdx-&gt;vp_enter_args.rcx;</div><div class='add'>+	regs[index++] = tdx-&gt;vp_enter_args.rdx;</div><div class='add'>+	regs[index++] = tdx-&gt;vp_enter_args.rbx;</div><div class='add'>+	regs[index++] = 0;</div><div class='add'>+	regs[index++] = 0;</div><div class='add'>+	regs[index++] = tdx-&gt;vp_enter_args.rsi;</div><div class='add'>+	regs[index] = tdx-&gt;vp_enter_args.rdi;</div><div class='add'>+	for (index = 0; index &lt; 8; index++)</div><div class='add'>+		regs[VCPU_REGS_R8 + index] = module_regs[index];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_emulate_cpuid(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u32 eax, ebx, ecx, edx;</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	/* EAX and ECX for cpuid is stored in R12 and R13. */</div><div class='add'>+	eax = tdx-&gt;vp_enter_args.r12;</div><div class='add'>+	ecx = tdx-&gt;vp_enter_args.r13;</div><div class='add'>+</div><div class='add'>+	kvm_cpuid(vcpu, &amp;eax, &amp;ebx, &amp;ecx, &amp;edx, false);</div><div class='add'>+</div><div class='add'>+	tdx-&gt;vp_enter_args.r12 = eax;</div><div class='add'>+	tdx-&gt;vp_enter_args.r13 = ebx;</div><div class='add'>+	tdx-&gt;vp_enter_args.r14 = ecx;</div><div class='add'>+	tdx-&gt;vp_enter_args.r15 = edx;</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_complete_pio_out(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	vcpu-&gt;arch.pio.count = 0;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_complete_pio_in(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct x86_emulate_ctxt *ctxt = vcpu-&gt;arch.emulate_ctxt;</div><div class='add'>+	unsigned long val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ctxt-&gt;ops-&gt;pio_in_emulated(ctxt, vcpu-&gt;arch.pio.size,</div><div class='add'>+					 vcpu-&gt;arch.pio.port, &amp;val, 1);</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!ret);</div><div class='add'>+</div><div class='add'>+	tdvmcall_set_return_val(vcpu, val);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_emulate_io(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	struct x86_emulate_ctxt *ctxt = vcpu-&gt;arch.emulate_ctxt;</div><div class='add'>+	unsigned long val = 0;</div><div class='add'>+	unsigned int port;</div><div class='add'>+	u64 size, write;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	++vcpu-&gt;stat.io_exits;</div><div class='add'>+</div><div class='add'>+	size = tdx-&gt;vp_enter_args.r12;</div><div class='add'>+	write = tdx-&gt;vp_enter_args.r13;</div><div class='add'>+	port = tdx-&gt;vp_enter_args.r14;</div><div class='add'>+</div><div class='add'>+	if ((write != 0 &amp;&amp; write != 1) || (size != 1 &amp;&amp; size != 2 &amp;&amp; size != 4)) {</div><div class='add'>+		tdvmcall_set_return_code(vcpu, TDVMCALL_STATUS_INVALID_OPERAND);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (write) {</div><div class='add'>+		val = tdx-&gt;vp_enter_args.r15;</div><div class='add'>+		ret = ctxt-&gt;ops-&gt;pio_out_emulated(ctxt, size, port, &amp;val, 1);</div><div class='add'>+	} else {</div><div class='add'>+		ret = ctxt-&gt;ops-&gt;pio_in_emulated(ctxt, size, port, &amp;val, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		vcpu-&gt;arch.complete_userspace_io = write ? tdx_complete_pio_out :</div><div class='add'>+							   tdx_complete_pio_in;</div><div class='add'>+	else if (!write)</div><div class='add'>+		tdvmcall_set_return_val(vcpu, val);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_complete_mmio_read(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long val = 0;</div><div class='add'>+	gpa_t gpa;</div><div class='add'>+	int size;</div><div class='add'>+</div><div class='add'>+	gpa = vcpu-&gt;mmio_fragments[0].gpa;</div><div class='add'>+	size = vcpu-&gt;mmio_fragments[0].len;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;val, vcpu-&gt;run-&gt;mmio.data, size);</div><div class='add'>+	tdvmcall_set_return_val(vcpu, val);</div><div class='add'>+	trace_kvm_mmio(KVM_TRACE_MMIO_READ, size, gpa, &amp;val);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tdx_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, int size,</div><div class='add'>+				 unsigned long val)</div><div class='add'>+{</div><div class='add'>+	if (!kvm_io_bus_write(vcpu, KVM_FAST_MMIO_BUS, gpa, 0, NULL)) {</div><div class='add'>+		trace_kvm_fast_mmio(gpa);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, size, gpa, &amp;val);</div><div class='add'>+	if (kvm_io_bus_write(vcpu, KVM_MMIO_BUS, gpa, size, &amp;val))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tdx_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, int size)</div><div class='add'>+{</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='add'>+	if (kvm_io_bus_read(vcpu, KVM_MMIO_BUS, gpa, size, &amp;val))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	tdvmcall_set_return_val(vcpu, val);</div><div class='add'>+	trace_kvm_mmio(KVM_TRACE_MMIO_READ, size, gpa, &amp;val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_emulate_mmio(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	int size, write, r;</div><div class='add'>+	unsigned long val;</div><div class='add'>+	gpa_t gpa;</div><div class='add'>+</div><div class='add'>+	size = tdx-&gt;vp_enter_args.r12;</div><div class='add'>+	write = tdx-&gt;vp_enter_args.r13;</div><div class='add'>+	gpa = tdx-&gt;vp_enter_args.r14;</div><div class='add'>+	val = write ? tdx-&gt;vp_enter_args.r15 : 0;</div><div class='add'>+</div><div class='add'>+	if (size != 1 &amp;&amp; size != 2 &amp;&amp; size != 4 &amp;&amp; size != 8)</div><div class='add'>+		goto error;</div><div class='add'>+	if (write != 0 &amp;&amp; write != 1)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDG.VP.VMCALL&lt;MMIO&gt; allows only shared GPA, it makes no sense to</div><div class='add'>+	 * do MMIO emulation for private GPA.</div><div class='add'>+	 */</div><div class='add'>+	if (vt_is_tdx_private_gpa(vcpu-&gt;kvm, gpa) ||</div><div class='add'>+	    vt_is_tdx_private_gpa(vcpu-&gt;kvm, gpa + size - 1))</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	gpa = gpa &amp; ~gfn_to_gpa(kvm_gfn_direct_bits(vcpu-&gt;kvm));</div><div class='add'>+</div><div class='add'>+	if (write)</div><div class='add'>+		r = tdx_mmio_write(vcpu, gpa, size, val);</div><div class='add'>+	else</div><div class='add'>+		r = tdx_mmio_read(vcpu, gpa, size);</div><div class='add'>+	if (!r)</div><div class='add'>+		/* Kernel completed device emulation. */</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	/* Request the device emulation to userspace device model. */</div><div class='add'>+	vcpu-&gt;mmio_is_write = write;</div><div class='add'>+	if (!write)</div><div class='add'>+		vcpu-&gt;arch.complete_userspace_io = tdx_complete_mmio_read;</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;run-&gt;mmio.phys_addr = gpa;</div><div class='add'>+	vcpu-&gt;run-&gt;mmio.len = size;</div><div class='add'>+	vcpu-&gt;run-&gt;mmio.is_write = write;</div><div class='add'>+	vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_MMIO;</div><div class='add'>+</div><div class='add'>+	if (write) {</div><div class='add'>+		memcpy(vcpu-&gt;run-&gt;mmio.data, &amp;val, size);</div><div class='add'>+	} else {</div><div class='add'>+		vcpu-&gt;mmio_fragments[0].gpa = gpa;</div><div class='add'>+		vcpu-&gt;mmio_fragments[0].len = size;</div><div class='add'>+		trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, size, gpa, NULL);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	tdvmcall_set_return_code(vcpu, TDVMCALL_STATUS_INVALID_OPERAND);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_get_td_vm_call_info(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	if (tdx-&gt;vp_enter_args.r12)</div><div class='add'>+		tdvmcall_set_return_code(vcpu, TDVMCALL_STATUS_INVALID_OPERAND);</div><div class='add'>+	else {</div><div class='add'>+		tdx-&gt;vp_enter_args.r11 = 0;</div><div class='add'>+		tdx-&gt;vp_enter_args.r13 = 0;</div><div class='add'>+		tdx-&gt;vp_enter_args.r14 = 0;</div><div class='add'>+	}</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int handle_tdvmcall(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	switch (tdvmcall_leaf(vcpu)) {</div><div class='add'>+	case TDVMCALL_MAP_GPA:</div><div class='add'>+		return tdx_map_gpa(vcpu);</div><div class='add'>+	case TDVMCALL_REPORT_FATAL_ERROR:</div><div class='add'>+		return tdx_report_fatal_error(vcpu);</div><div class='add'>+	case TDVMCALL_GET_TD_VM_CALL_INFO:</div><div class='add'>+		return tdx_get_td_vm_call_info(vcpu);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tdvmcall_set_return_code(vcpu, TDVMCALL_STATUS_INVALID_OPERAND);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_load_mmu_pgd(struct kvm_vcpu *vcpu, hpa_t root_hpa, int pgd_level)</div><div class='add'>+{</div><div class='add'>+	u64 shared_bit = (pgd_level == 5) ? TDX_SHARED_BIT_PWL_5 :</div><div class='add'>+			  TDX_SHARED_BIT_PWL_4;</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(shared_bit != kvm_gfn_direct_bits(vcpu-&gt;kvm), vcpu-&gt;kvm))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	td_vmcs_write64(to_tdx(vcpu), SHARED_EPT_POINTER, root_hpa);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tdx_unpin(struct kvm *kvm, struct page *page)</div><div class='add'>+{</div><div class='add'>+	put_page(page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_mem_page_aug(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+			    enum pg_level level, struct page *page)</div><div class='add'>+{</div><div class='add'>+	int tdx_level = pg_level_to_tdx_sept_level(level);</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	gpa_t gpa = gfn_to_gpa(gfn);</div><div class='add'>+	u64 entry, level_state;</div><div class='add'>+	u64 err;</div><div class='add'>+</div><div class='add'>+	err = tdh_mem_page_aug(&amp;kvm_tdx-&gt;td, gpa, tdx_level, page, &amp;entry, &amp;level_state);</div><div class='add'>+	if (unlikely(tdx_operand_busy(err))) {</div><div class='add'>+		tdx_unpin(kvm, page);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error_2(TDH_MEM_PAGE_AUG, err, entry, level_state);</div><div class='add'>+		tdx_unpin(kvm, page);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * KVM_TDX_INIT_MEM_REGION calls kvm_gmem_populate() to map guest pages; the</div><div class='add'>+ * callback tdx_gmem_post_populate() then maps pages into private memory.</div><div class='add'>+ * through the a seamcall TDH.MEM.PAGE.ADD().  The SEAMCALL also requires the</div><div class='add'>+ * private EPT structures for the page to have been built before, which is</div><div class='add'>+ * done via kvm_tdp_map_page(). nr_premapped counts the number of pages that</div><div class='add'>+ * were added to the EPT structures but not added with TDH.MEM.PAGE.ADD().</div><div class='add'>+ * The counter has to be zero on KVM_TDX_FINALIZE_VM, to ensure that there</div><div class='add'>+ * are no half-initialized shared EPT pages.</div><div class='add'>+ */</div><div class='add'>+static int tdx_mem_page_record_premap_cnt(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+					  enum pg_level level, kvm_pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(kvm-&gt;arch.pre_fault_allowed, kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* nr_premapped will be decreased when tdh_mem_page_add() is called. */</div><div class='add'>+	atomic64_inc(&amp;kvm_tdx-&gt;nr_premapped);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_sept_set_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+			      enum pg_level level, kvm_pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	struct page *page = pfn_to_page(pfn);</div><div class='add'>+</div><div class='add'>+	/* TODO: handle large pages. */</div><div class='add'>+	if (KVM_BUG_ON(level != PG_LEVEL_4K, kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Because guest_memfd doesn't support page migration with</div><div class='add'>+	 * a_ops-&gt;migrate_folio (yet), no callback is triggered for KVM on page</div><div class='add'>+	 * migration.  Until guest_memfd supports page migration, prevent page</div><div class='add'>+	 * migration.</div><div class='add'>+	 * TODO: Once guest_memfd introduces callback on page migration,</div><div class='add'>+	 * implement it and remove get_page/put_page().</div><div class='add'>+	 */</div><div class='add'>+	get_page(page);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Read 'pre_fault_allowed' before 'kvm_tdx-&gt;state'; see matching</div><div class='add'>+	 * barrier in tdx_td_finalize().</div><div class='add'>+	 */</div><div class='add'>+	smp_rmb();</div><div class='add'>+	if (likely(kvm_tdx-&gt;state == TD_STATE_RUNNABLE))</div><div class='add'>+		return tdx_mem_page_aug(kvm, gfn, level, page);</div><div class='add'>+</div><div class='add'>+	return tdx_mem_page_record_premap_cnt(kvm, gfn, level, pfn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_sept_drop_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+				      enum pg_level level, struct page *page)</div><div class='add'>+{</div><div class='add'>+	int tdx_level = pg_level_to_tdx_sept_level(level);</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	gpa_t gpa = gfn_to_gpa(gfn);</div><div class='add'>+	u64 err, entry, level_state;</div><div class='add'>+</div><div class='add'>+	/* TODO: handle large pages. */</div><div class='add'>+	if (KVM_BUG_ON(level != PG_LEVEL_4K, kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(!is_hkid_assigned(kvm_tdx), kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When zapping private page, write lock is held. So no race condition</div><div class='add'>+	 * with other vcpu sept operation.</div><div class='add'>+	 * Race with TDH.VP.ENTER due to (0-step mitigation) and Guest TDCALLs.</div><div class='add'>+	 */</div><div class='add'>+	err = tdh_mem_page_remove(&amp;kvm_tdx-&gt;td, gpa, tdx_level, &amp;entry,</div><div class='add'>+				  &amp;level_state);</div><div class='add'>+</div><div class='add'>+	if (unlikely(tdx_operand_busy(err))) {</div><div class='add'>+		/*</div><div class='add'>+		 * The second retry is expected to succeed after kicking off all</div><div class='add'>+		 * other vCPUs and prevent them from invoking TDH.VP.ENTER.</div><div class='add'>+		 */</div><div class='add'>+		tdx_no_vcpus_enter_start(kvm);</div><div class='add'>+		err = tdh_mem_page_remove(&amp;kvm_tdx-&gt;td, gpa, tdx_level, &amp;entry,</div><div class='add'>+					  &amp;level_state);</div><div class='add'>+		tdx_no_vcpus_enter_stop(kvm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error_2(TDH_MEM_PAGE_REMOVE, err, entry, level_state);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = tdh_phymem_page_wbinvd_hkid((u16)kvm_tdx-&gt;hkid, page);</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error(TDH_PHYMEM_PAGE_WBINVD, err);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	tdx_clear_page(page);</div><div class='add'>+	tdx_unpin(kvm, page);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_sept_link_private_spt(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+			      enum pg_level level, void *private_spt)</div><div class='add'>+{</div><div class='add'>+	int tdx_level = pg_level_to_tdx_sept_level(level);</div><div class='add'>+	gpa_t gpa = gfn_to_gpa(gfn);</div><div class='add'>+	struct page *page = virt_to_page(private_spt);</div><div class='add'>+	u64 err, entry, level_state;</div><div class='add'>+</div><div class='add'>+	err = tdh_mem_sept_add(&amp;to_kvm_tdx(kvm)-&gt;td, gpa, tdx_level, page, &amp;entry,</div><div class='add'>+			       &amp;level_state);</div><div class='add'>+	if (unlikely(tdx_operand_busy(err)))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error_2(TDH_MEM_SEPT_ADD, err, entry, level_state);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Check if the error returned from a SEPT zap SEAMCALL is due to that a page is</div><div class='add'>+ * mapped by KVM_TDX_INIT_MEM_REGION without tdh_mem_page_add() being called</div><div class='add'>+ * successfully.</div><div class='add'>+ *</div><div class='add'>+ * Since tdh_mem_sept_add() must have been invoked successfully before a</div><div class='add'>+ * non-leaf entry present in the mirrored page table, the SEPT ZAP related</div><div class='add'>+ * SEAMCALLs should not encounter err TDX_EPT_WALK_FAILED. They should instead</div><div class='add'>+ * find TDX_EPT_ENTRY_STATE_INCORRECT due to an empty leaf entry found in the</div><div class='add'>+ * SEPT.</div><div class='add'>+ *</div><div class='add'>+ * Further check if the returned entry from SEPT walking is with RWX permissions</div><div class='add'>+ * to filter out anything unexpected.</div><div class='add'>+ *</div><div class='add'>+ * Note: @level is pg_level, not the tdx_level. The tdx_level extracted from</div><div class='add'>+ * level_state returned from a SEAMCALL error is the same as that passed into</div><div class='add'>+ * the SEAMCALL.</div><div class='add'>+ */</div><div class='add'>+static int tdx_is_sept_zap_err_due_to_premap(struct kvm_tdx *kvm_tdx, u64 err,</div><div class='add'>+					     u64 entry, int level)</div><div class='add'>+{</div><div class='add'>+	if (!err || kvm_tdx-&gt;state == TD_STATE_RUNNABLE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (err != (TDX_EPT_ENTRY_STATE_INCORRECT | TDX_OPERAND_ID_RCX))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if ((is_last_spte(entry, level) &amp;&amp; (entry &amp; VMX_EPT_RWX_MASK)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_sept_zap_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+				     enum pg_level level, struct page *page)</div><div class='add'>+{</div><div class='add'>+	int tdx_level = pg_level_to_tdx_sept_level(level);</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	gpa_t gpa = gfn_to_gpa(gfn) &amp; KVM_HPAGE_MASK(level);</div><div class='add'>+	u64 err, entry, level_state;</div><div class='add'>+</div><div class='add'>+	/* For now large page isn't supported yet. */</div><div class='add'>+	WARN_ON_ONCE(level != PG_LEVEL_4K);</div><div class='add'>+</div><div class='add'>+	err = tdh_mem_range_block(&amp;kvm_tdx-&gt;td, gpa, tdx_level, &amp;entry, &amp;level_state);</div><div class='add'>+</div><div class='add'>+	if (unlikely(tdx_operand_busy(err))) {</div><div class='add'>+		/* After no vCPUs enter, the second retry is expected to succeed */</div><div class='add'>+		tdx_no_vcpus_enter_start(kvm);</div><div class='add'>+		err = tdh_mem_range_block(&amp;kvm_tdx-&gt;td, gpa, tdx_level, &amp;entry, &amp;level_state);</div><div class='add'>+		tdx_no_vcpus_enter_stop(kvm);</div><div class='add'>+	}</div><div class='add'>+	if (tdx_is_sept_zap_err_due_to_premap(kvm_tdx, err, entry, level) &amp;&amp;</div><div class='add'>+	    !KVM_BUG_ON(!atomic64_read(&amp;kvm_tdx-&gt;nr_premapped), kvm)) {</div><div class='add'>+		atomic64_dec(&amp;kvm_tdx-&gt;nr_premapped);</div><div class='add'>+		tdx_unpin(kvm, page);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(err, kvm)) {</div><div class='add'>+		pr_tdx_error_2(TDH_MEM_RANGE_BLOCK, err, entry, level_state);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Ensure shared and private EPTs to be flushed on all vCPUs.</div><div class='add'>+ * tdh_mem_track() is the only caller that increases TD epoch. An increase in</div><div class='add'>+ * the TD epoch (e.g., to value "N + 1") is successful only if no vCPUs are</div><div class='add'>+ * running in guest mode with the value "N - 1".</div><div class='add'>+ *</div><div class='add'>+ * A successful execution of tdh_mem_track() ensures that vCPUs can only run in</div><div class='add'>+ * guest mode with TD epoch value "N" if no TD exit occurs after the TD epoch</div><div class='add'>+ * being increased to "N + 1".</div><div class='add'>+ *</div><div class='add'>+ * Kicking off all vCPUs after that further results in no vCPUs can run in guest</div><div class='add'>+ * mode with TD epoch value "N", which unblocks the next tdh_mem_track() (e.g.</div><div class='add'>+ * to increase TD epoch to "N + 2").</div><div class='add'>+ *</div><div class='add'>+ * TDX module will flush EPT on the next TD enter and make vCPUs to run in</div><div class='add'>+ * guest mode with TD epoch value "N + 1".</div><div class='add'>+ *</div><div class='add'>+ * kvm_make_all_cpus_request() guarantees all vCPUs are out of guest mode by</div><div class='add'>+ * waiting empty IPI handler ack_kick().</div><div class='add'>+ *</div><div class='add'>+ * No action is required to the vCPUs being kicked off since the kicking off</div><div class='add'>+ * occurs certainly after TD epoch increment and before the next</div><div class='add'>+ * tdh_mem_track().</div><div class='add'>+ */</div><div class='add'>+static void tdx_track(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	u64 err;</div><div class='add'>+</div><div class='add'>+	/* If TD isn't finalized, it's before any vcpu running. */</div><div class='add'>+	if (unlikely(kvm_tdx-&gt;state != TD_STATE_RUNNABLE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held_write(&amp;kvm-&gt;mmu_lock);</div><div class='add'>+</div><div class='add'>+	err = tdh_mem_track(&amp;kvm_tdx-&gt;td);</div><div class='add'>+	if (unlikely(tdx_operand_busy(err))) {</div><div class='add'>+		/* After no vCPUs enter, the second retry is expected to succeed */</div><div class='add'>+		tdx_no_vcpus_enter_start(kvm);</div><div class='add'>+		err = tdh_mem_track(&amp;kvm_tdx-&gt;td);</div><div class='add'>+		tdx_no_vcpus_enter_stop(kvm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (KVM_BUG_ON(err, kvm))</div><div class='add'>+		pr_tdx_error(TDH_MEM_TRACK, err);</div><div class='add'>+</div><div class='add'>+	kvm_make_all_cpus_request(kvm, KVM_REQ_OUTSIDE_GUEST_MODE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_sept_free_private_spt(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+			      enum pg_level level, void *private_spt)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * free_external_spt() is only called after hkid is freed when TD is</div><div class='add'>+	 * tearing down.</div><div class='add'>+	 * KVM doesn't (yet) zap page table pages in mirror page table while</div><div class='add'>+	 * TD is active, though guest pages mapped in mirror page table could be</div><div class='add'>+	 * zapped during TD is active, e.g. for shared &lt;-&gt; private conversion</div><div class='add'>+	 * and slot move/deletion.</div><div class='add'>+	 */</div><div class='add'>+	if (KVM_BUG_ON(is_hkid_assigned(kvm_tdx), kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The HKID assigned to this TD was already freed and cache was</div><div class='add'>+	 * already flushed. We don't have to flush again.</div><div class='add'>+	 */</div><div class='add'>+	return tdx_reclaim_page(virt_to_page(private_spt));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_sept_remove_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+				 enum pg_level level, kvm_pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	struct page *page = pfn_to_page(pfn);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * HKID is released after all private pages have been removed, and set</div><div class='add'>+	 * before any might be populated. Warn if zapping is attempted when</div><div class='add'>+	 * there can't be anything populated in the private EPT.</div><div class='add'>+	 */</div><div class='add'>+	if (KVM_BUG_ON(!is_hkid_assigned(to_kvm_tdx(kvm)), kvm))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = tdx_sept_zap_private_spte(kvm, gfn, level, page);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX requires TLB tracking before dropping private page.  Do</div><div class='add'>+	 * it here, although it is also done later.</div><div class='add'>+	 */</div><div class='add'>+	tdx_track(kvm);</div><div class='add'>+</div><div class='add'>+	return tdx_sept_drop_private_spte(kvm, gfn, level, page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,</div><div class='add'>+			   int trig_mode, int vector)</div><div class='add'>+{</div><div class='add'>+	struct kvm_vcpu *vcpu = apic-&gt;vcpu;</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	/* TDX supports only posted interrupt.  No lapic emulation. */</div><div class='add'>+	__vmx_deliver_posted_interrupt(vcpu, &amp;tdx-&gt;vt.pi_desc, vector);</div><div class='add'>+</div><div class='add'>+	trace_kvm_apicv_accept_irq(vcpu-&gt;vcpu_id, delivery_mode, trig_mode, vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool tdx_is_sept_violation_unexpected_pending(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	u64 eeq_type = to_tdx(vcpu)-&gt;ext_exit_qualification &amp; TDX_EXT_EXIT_QUAL_TYPE_MASK;</div><div class='add'>+	u64 eq = vmx_get_exit_qual(vcpu);</div><div class='add'>+</div><div class='add'>+	if (eeq_type != TDX_EXT_EXIT_QUAL_TYPE_PENDING_EPT_VIOLATION)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !(eq &amp; EPT_VIOLATION_PROT_MASK) &amp;&amp; !(eq &amp; EPT_VIOLATION_EXEC_FOR_RING3_LIN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_handle_ept_violation(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long exit_qual;</div><div class='add'>+	gpa_t gpa = to_tdx(vcpu)-&gt;exit_gpa;</div><div class='add'>+	bool local_retry = false;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (vt_is_tdx_private_gpa(vcpu-&gt;kvm, gpa)) {</div><div class='add'>+		if (tdx_is_sept_violation_unexpected_pending(vcpu)) {</div><div class='add'>+			pr_warn("Guest access before accepting 0x%llx on vCPU %d\n",</div><div class='add'>+				gpa, vcpu-&gt;vcpu_id);</div><div class='add'>+			kvm_vm_dead(vcpu-&gt;kvm);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+		/*</div><div class='add'>+		 * Always treat SEPT violations as write faults.  Ignore the</div><div class='add'>+		 * EXIT_QUALIFICATION reported by TDX-SEAM for SEPT violations.</div><div class='add'>+		 * TD private pages are always RWX in the SEPT tables,</div><div class='add'>+		 * i.e. they're always mapped writable.  Just as importantly,</div><div class='add'>+		 * treating SEPT violations as write faults is necessary to</div><div class='add'>+		 * avoid COW allocations, which will cause TDAUGPAGE failures</div><div class='add'>+		 * due to aliasing a single HPA to multiple GPAs.</div><div class='add'>+		 */</div><div class='add'>+		exit_qual = EPT_VIOLATION_ACC_WRITE;</div><div class='add'>+</div><div class='add'>+		/* Only private GPA triggers zero-step mitigation */</div><div class='add'>+		local_retry = true;</div><div class='add'>+	} else {</div><div class='add'>+		exit_qual = vmx_get_exit_qual(vcpu);</div><div class='add'>+		/*</div><div class='add'>+		 * EPT violation due to instruction fetch should never be</div><div class='add'>+		 * triggered from shared memory in TDX guest.  If such EPT</div><div class='add'>+		 * violation occurs, treat it as broken hardware.</div><div class='add'>+		 */</div><div class='add'>+		if (KVM_BUG_ON(exit_qual &amp; EPT_VIOLATION_ACC_INSTR, vcpu-&gt;kvm))</div><div class='add'>+			return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	trace_kvm_page_fault(vcpu, gpa, exit_qual);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * To minimize TDH.VP.ENTER invocations, retry locally for private GPA</div><div class='add'>+	 * mapping in TDX.</div><div class='add'>+	 *</div><div class='add'>+	 * KVM may return RET_PF_RETRY for private GPA due to</div><div class='add'>+	 * - contentions when atomically updating SPTEs of the mirror page table</div><div class='add'>+	 * - in-progress GFN invalidation or memslot removal.</div><div class='add'>+	 * - TDX_OPERAND_BUSY error from TDH.MEM.PAGE.AUG or TDH.MEM.SEPT.ADD,</div><div class='add'>+	 *   caused by contentions with TDH.VP.ENTER (with zero-step mitigation)</div><div class='add'>+	 *   or certain TDCALLs.</div><div class='add'>+	 *</div><div class='add'>+	 * If TDH.VP.ENTER is invoked more times than the threshold set by the</div><div class='add'>+	 * TDX module before KVM resolves the private GPA mapping, the TDX</div><div class='add'>+	 * module will activate zero-step mitigation during TDH.VP.ENTER. This</div><div class='add'>+	 * process acquires an SEPT tree lock in the TDX module, leading to</div><div class='add'>+	 * further contentions with TDH.MEM.PAGE.AUG or TDH.MEM.SEPT.ADD</div><div class='add'>+	 * operations on other vCPUs.</div><div class='add'>+	 *</div><div class='add'>+	 * Breaking out of local retries for kvm_vcpu_has_events() is for</div><div class='add'>+	 * interrupt injection. kvm_vcpu_has_events() should not see pending</div><div class='add'>+	 * events for TDX. Since KVM can't determine if IRQs (or NMIs) are</div><div class='add'>+	 * blocked by TDs, false positives are inevitable i.e., KVM may re-enter</div><div class='add'>+	 * the guest even if the IRQ/NMI can't be delivered.</div><div class='add'>+	 *</div><div class='add'>+	 * Note: even without breaking out of local retries, zero-step</div><div class='add'>+	 * mitigation may still occur due to</div><div class='add'>+	 * - invoking of TDH.VP.ENTER after KVM_EXIT_MEMORY_FAULT,</div><div class='add'>+	 * - a single RIP causing EPT violations for more GFNs than the</div><div class='add'>+	 *   threshold count.</div><div class='add'>+	 * This is safe, as triggering zero-step mitigation only introduces</div><div class='add'>+	 * contentions to page installation SEAMCALLs on other vCPUs, which will</div><div class='add'>+	 * handle retries locally in their EPT violation handlers.</div><div class='add'>+	 */</div><div class='add'>+	while (1) {</div><div class='add'>+		ret = __vmx_handle_ept_violation(vcpu, gpa, exit_qual);</div><div class='add'>+</div><div class='add'>+		if (ret != RET_PF_RETRY || !local_retry)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (kvm_vcpu_has_events(vcpu) || signal_pending(current))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {</div><div class='add'>+			ret = -EIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cond_resched();</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_complete_emulated_msr(struct kvm_vcpu *vcpu, int err)</div><div class='add'>+{</div><div class='add'>+	if (err) {</div><div class='add'>+		tdvmcall_set_return_code(vcpu, TDVMCALL_STATUS_INVALID_OPERAND);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vmx_get_exit_reason(vcpu).basic == EXIT_REASON_MSR_READ)</div><div class='add'>+		tdvmcall_set_return_val(vcpu, kvm_read_edx_eax(vcpu));</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int tdx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t fastpath)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	u64 vp_enter_ret = tdx-&gt;vp_enter_ret;</div><div class='add'>+	union vmx_exit_reason exit_reason = vmx_get_exit_reason(vcpu);</div><div class='add'>+</div><div class='add'>+	if (fastpath != EXIT_FASTPATH_NONE)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	if (unlikely(vp_enter_ret == EXIT_REASON_EPT_MISCONFIG)) {</div><div class='add'>+		KVM_BUG_ON(1, vcpu-&gt;kvm);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Handle TDX SW errors, including TDX_SEAMCALL_UD, TDX_SEAMCALL_GP and</div><div class='add'>+	 * TDX_SEAMCALL_VMFAILINVALID.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely((vp_enter_ret &amp; TDX_SW_ERROR) == TDX_SW_ERROR)) {</div><div class='add'>+		KVM_BUG_ON(!kvm_rebooting, vcpu-&gt;kvm);</div><div class='add'>+		goto unhandled_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(tdx_failed_vmentry(vcpu))) {</div><div class='add'>+		/*</div><div class='add'>+		 * If the guest state is protected, that means off-TD debug is</div><div class='add'>+		 * not enabled, TDX_NON_RECOVERABLE must be set.</div><div class='add'>+		 */</div><div class='add'>+		WARN_ON_ONCE(vcpu-&gt;arch.guest_state_protected &amp;&amp;</div><div class='add'>+				!(vp_enter_ret &amp; TDX_NON_RECOVERABLE));</div><div class='add'>+		vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_FAIL_ENTRY;</div><div class='add'>+		vcpu-&gt;run-&gt;fail_entry.hardware_entry_failure_reason = exit_reason.full;</div><div class='add'>+		vcpu-&gt;run-&gt;fail_entry.cpu = vcpu-&gt;arch.last_vmentry_cpu;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(vp_enter_ret &amp; (TDX_ERROR | TDX_NON_RECOVERABLE)) &amp;&amp;</div><div class='add'>+		exit_reason.basic != EXIT_REASON_TRIPLE_FAULT) {</div><div class='add'>+		kvm_pr_unimpl("TD vp_enter_ret 0x%llx\n", vp_enter_ret);</div><div class='add'>+		goto unhandled_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(exit_reason.basic != EXIT_REASON_TRIPLE_FAULT &amp;&amp;</div><div class='add'>+		     (vp_enter_ret &amp; TDX_SEAMCALL_STATUS_MASK) != TDX_SUCCESS);</div><div class='add'>+</div><div class='add'>+	switch (exit_reason.basic) {</div><div class='add'>+	case EXIT_REASON_TRIPLE_FAULT:</div><div class='add'>+		vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_SHUTDOWN;</div><div class='add'>+		vcpu-&gt;mmio_needed = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	case EXIT_REASON_EXCEPTION_NMI:</div><div class='add'>+		return tdx_handle_exception_nmi(vcpu);</div><div class='add'>+	case EXIT_REASON_EXTERNAL_INTERRUPT:</div><div class='add'>+		++vcpu-&gt;stat.irq_exits;</div><div class='add'>+		return 1;</div><div class='add'>+	case EXIT_REASON_CPUID:</div><div class='add'>+		return tdx_emulate_cpuid(vcpu);</div><div class='add'>+	case EXIT_REASON_HLT:</div><div class='add'>+		return kvm_emulate_halt_noskip(vcpu);</div><div class='add'>+	case EXIT_REASON_TDCALL:</div><div class='add'>+		return handle_tdvmcall(vcpu);</div><div class='add'>+	case EXIT_REASON_VMCALL:</div><div class='add'>+		return tdx_emulate_vmcall(vcpu);</div><div class='add'>+	case EXIT_REASON_IO_INSTRUCTION:</div><div class='add'>+		return tdx_emulate_io(vcpu);</div><div class='add'>+	case EXIT_REASON_MSR_READ:</div><div class='add'>+		kvm_rcx_write(vcpu, tdx-&gt;vp_enter_args.r12);</div><div class='add'>+		return kvm_emulate_rdmsr(vcpu);</div><div class='add'>+	case EXIT_REASON_MSR_WRITE:</div><div class='add'>+		kvm_rcx_write(vcpu, tdx-&gt;vp_enter_args.r12);</div><div class='add'>+		kvm_rax_write(vcpu, tdx-&gt;vp_enter_args.r13 &amp; -1u);</div><div class='add'>+		kvm_rdx_write(vcpu, tdx-&gt;vp_enter_args.r13 &gt;&gt; 32);</div><div class='add'>+		return kvm_emulate_wrmsr(vcpu);</div><div class='add'>+	case EXIT_REASON_EPT_MISCONFIG:</div><div class='add'>+		return tdx_emulate_mmio(vcpu);</div><div class='add'>+	case EXIT_REASON_EPT_VIOLATION:</div><div class='add'>+		return tdx_handle_ept_violation(vcpu);</div><div class='add'>+	case EXIT_REASON_OTHER_SMI:</div><div class='add'>+		/*</div><div class='add'>+		 * Unlike VMX, SMI in SEAM non-root mode (i.e. when</div><div class='add'>+		 * TD guest vCPU is running) will cause VM exit to TDX module,</div><div class='add'>+		 * then SEAMRET to KVM.  Once it exits to KVM, SMI is delivered</div><div class='add'>+		 * and handled by kernel handler right away.</div><div class='add'>+		 *</div><div class='add'>+		 * The Other SMI exit can also be caused by the SEAM non-root</div><div class='add'>+		 * machine check delivered via Machine Check System Management</div><div class='add'>+		 * Interrupt (MSMI), but it has already been handled by the</div><div class='add'>+		 * kernel machine check handler, i.e., the memory page has been</div><div class='add'>+		 * marked as poisoned and it won't be freed to the free list</div><div class='add'>+		 * when the TDX guest is terminated (the TDX module marks the</div><div class='add'>+		 * guest as dead and prevent it from further running when</div><div class='add'>+		 * machine check happens in SEAM non-root).</div><div class='add'>+		 *</div><div class='add'>+		 * - A MSMI will not reach here, it's handled as non_recoverable</div><div class='add'>+		 *   case above.</div><div class='add'>+		 * - If it's not an MSMI, no need to do anything here.</div><div class='add'>+		 */</div><div class='add'>+		return 1;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unhandled_exit:</div><div class='add'>+	vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_INTERNAL_ERROR;</div><div class='add'>+	vcpu-&gt;run-&gt;internal.suberror = KVM_INTERNAL_ERROR_UNEXPECTED_EXIT_REASON;</div><div class='add'>+	vcpu-&gt;run-&gt;internal.ndata = 2;</div><div class='add'>+	vcpu-&gt;run-&gt;internal.data[0] = vp_enter_ret;</div><div class='add'>+	vcpu-&gt;run-&gt;internal.data[1] = vcpu-&gt;arch.last_vmentry_cpu;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason,</div><div class='add'>+		u64 *info1, u64 *info2, u32 *intr_info, u32 *error_code)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+</div><div class='add'>+	*reason = tdx-&gt;vt.exit_reason.full;</div><div class='add'>+	if (*reason != -1u) {</div><div class='add'>+		*info1 = vmx_get_exit_qual(vcpu);</div><div class='add'>+		*info2 = tdx-&gt;ext_exit_qualification;</div><div class='add'>+		*intr_info = vmx_get_intr_info(vcpu);</div><div class='add'>+	} else {</div><div class='add'>+		*info1 = 0;</div><div class='add'>+		*info2 = 0;</div><div class='add'>+		*intr_info = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*error_code = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool tdx_has_emulated_msr(u32 index)</div><div class='add'>+{</div><div class='add'>+	switch (index) {</div><div class='add'>+	case MSR_IA32_UCODE_REV:</div><div class='add'>+	case MSR_IA32_ARCH_CAPABILITIES:</div><div class='add'>+	case MSR_IA32_POWER_CTL:</div><div class='add'>+	case MSR_IA32_CR_PAT:</div><div class='add'>+	case MSR_MTRRcap:</div><div class='add'>+	case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000:</div><div class='add'>+	case MSR_MTRRdefType:</div><div class='add'>+	case MSR_IA32_TSC_DEADLINE:</div><div class='add'>+	case MSR_IA32_MISC_ENABLE:</div><div class='add'>+	case MSR_PLATFORM_INFO:</div><div class='add'>+	case MSR_MISC_FEATURES_ENABLES:</div><div class='add'>+	case MSR_IA32_APICBASE:</div><div class='add'>+	case MSR_EFER:</div><div class='add'>+	case MSR_IA32_FEAT_CTL:</div><div class='add'>+	case MSR_IA32_MCG_CAP:</div><div class='add'>+	case MSR_IA32_MCG_STATUS:</div><div class='add'>+	case MSR_IA32_MCG_CTL:</div><div class='add'>+	case MSR_IA32_MCG_EXT_CTL:</div><div class='add'>+	case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:</div><div class='add'>+	case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:</div><div class='add'>+		/* MSR_IA32_MCx_{CTL, STATUS, ADDR, MISC, CTL2} */</div><div class='add'>+	case MSR_KVM_POLL_CONTROL:</div><div class='add'>+		return true;</div><div class='add'>+	case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:</div><div class='add'>+		/*</div><div class='add'>+		 * x2APIC registers that are virtualized by the CPU can't be</div><div class='add'>+		 * emulated, KVM doesn't have access to the virtual APIC page.</div><div class='add'>+		 */</div><div class='add'>+		switch (index) {</div><div class='add'>+		case X2APIC_MSR(APIC_TASKPRI):</div><div class='add'>+		case X2APIC_MSR(APIC_PROCPRI):</div><div class='add'>+		case X2APIC_MSR(APIC_EOI):</div><div class='add'>+		case X2APIC_MSR(APIC_ISR) ... X2APIC_MSR(APIC_ISR + APIC_ISR_NR):</div><div class='add'>+		case X2APIC_MSR(APIC_TMR) ... X2APIC_MSR(APIC_TMR + APIC_ISR_NR):</div><div class='add'>+		case X2APIC_MSR(APIC_IRR) ... X2APIC_MSR(APIC_IRR + APIC_ISR_NR):</div><div class='add'>+			return false;</div><div class='add'>+		default:</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool tdx_is_read_only_msr(u32 index)</div><div class='add'>+{</div><div class='add'>+	return  index == MSR_IA32_APICBASE || index == MSR_EFER ||</div><div class='add'>+		index == MSR_IA32_FEAT_CTL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)</div><div class='add'>+{</div><div class='add'>+	switch (msr-&gt;index) {</div><div class='add'>+	case MSR_IA32_FEAT_CTL:</div><div class='add'>+		/*</div><div class='add'>+		 * MCE and MCA are advertised via cpuid. Guest kernel could</div><div class='add'>+		 * check if LMCE is enabled or not.</div><div class='add'>+		 */</div><div class='add'>+		msr-&gt;data = FEAT_CTL_LOCKED;</div><div class='add'>+		if (vcpu-&gt;arch.mcg_cap &amp; MCG_LMCE_P)</div><div class='add'>+			msr-&gt;data |= FEAT_CTL_LMCE_ENABLED;</div><div class='add'>+		return 0;</div><div class='add'>+	case MSR_IA32_MCG_EXT_CTL:</div><div class='add'>+		if (!msr-&gt;host_initiated &amp;&amp; !(vcpu-&gt;arch.mcg_cap &amp; MCG_LMCE_P))</div><div class='add'>+			return 1;</div><div class='add'>+		msr-&gt;data = vcpu-&gt;arch.mcg_ext_ctl;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		if (!tdx_has_emulated_msr(msr-&gt;index))</div><div class='add'>+			return 1;</div><div class='add'>+</div><div class='add'>+		return kvm_get_msr_common(vcpu, msr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)</div><div class='add'>+{</div><div class='add'>+	switch (msr-&gt;index) {</div><div class='add'>+	case MSR_IA32_MCG_EXT_CTL:</div><div class='add'>+		if ((!msr-&gt;host_initiated &amp;&amp; !(vcpu-&gt;arch.mcg_cap &amp; MCG_LMCE_P)) ||</div><div class='add'>+		    (msr-&gt;data &amp; ~MCG_EXT_CTL_LMCE_EN))</div><div class='add'>+			return 1;</div><div class='add'>+		vcpu-&gt;arch.mcg_ext_ctl = msr-&gt;data;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		if (tdx_is_read_only_msr(msr-&gt;index))</div><div class='add'>+			return 1;</div><div class='add'>+</div><div class='add'>+		if (!tdx_has_emulated_msr(msr-&gt;index))</div><div class='add'>+			return 1;</div><div class='add'>+</div><div class='add'>+		return kvm_set_msr_common(vcpu, msr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_get_capabilities(struct kvm_tdx_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	const struct tdx_sys_info_td_conf *td_conf = &amp;tdx_sysinfo-&gt;td_conf;</div><div class='add'>+	struct kvm_tdx_capabilities __user *user_caps;</div><div class='add'>+	struct kvm_tdx_capabilities *caps = NULL;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* flags is reserved for future use */</div><div class='add'>+	if (cmd-&gt;flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	caps = kmalloc(sizeof(*caps) +</div><div class='add'>+		       sizeof(struct kvm_cpuid_entry2) * td_conf-&gt;num_cpuid_config,</div><div class='add'>+		       GFP_KERNEL);</div><div class='add'>+	if (!caps)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	user_caps = u64_to_user_ptr(cmd-&gt;data);</div><div class='add'>+	if (copy_from_user(caps, user_caps, sizeof(*caps))) {</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (caps-&gt;cpuid.nent &lt; td_conf-&gt;num_cpuid_config) {</div><div class='add'>+		ret = -E2BIG;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = init_kvm_tdx_caps(td_conf, caps);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(user_caps, caps, sizeof(*caps))) {</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(user_caps-&gt;cpuid.entries, caps-&gt;cpuid.entries,</div><div class='add'>+			 caps-&gt;cpuid.nent *</div><div class='add'>+			 sizeof(caps-&gt;cpuid.entries[0])))</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	/* kfree() accepts NULL. */</div><div class='add'>+	kfree(caps);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * KVM reports guest physical address in CPUID.0x800000008.EAX[23:16], which is</div><div class='add'>+ * similar to TDX's GPAW. Use this field as the interface for userspace to</div><div class='add'>+ * configure the GPAW and EPT level for TDs.</div><div class='add'>+ *</div><div class='add'>+ * Only values 48 and 52 are supported. Value 52 means GPAW-52 and EPT level</div><div class='add'>+ * 5, Value 48 means GPAW-48 and EPT level 4. For value 48, GPAW-48 is always</div><div class='add'>+ * supported. Value 52 is only supported when the platform supports 5 level</div><div class='add'>+ * EPT.</div><div class='add'>+ */</div><div class='add'>+static int setup_tdparams_eptp_controls(struct kvm_cpuid2 *cpuid,</div><div class='add'>+					struct td_params *td_params)</div><div class='add'>+{</div><div class='add'>+	const struct kvm_cpuid_entry2 *entry;</div><div class='add'>+	int guest_pa;</div><div class='add'>+</div><div class='add'>+	entry = kvm_find_cpuid_entry2(cpuid-&gt;entries, cpuid-&gt;nent, 0x80000008, 0);</div><div class='add'>+	if (!entry)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	guest_pa = tdx_get_guest_phys_addr_bits(entry-&gt;eax);</div><div class='add'>+</div><div class='add'>+	if (guest_pa != 48 &amp;&amp; guest_pa != 52)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (guest_pa == 52 &amp;&amp; !cpu_has_vmx_ept_5levels())</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	td_params-&gt;eptp_controls = VMX_EPTP_MT_WB;</div><div class='add'>+	if (guest_pa == 52) {</div><div class='add'>+		td_params-&gt;eptp_controls |= VMX_EPTP_PWL_5;</div><div class='add'>+		td_params-&gt;config_flags |= TDX_CONFIG_FLAGS_MAX_GPAW;</div><div class='add'>+	} else {</div><div class='add'>+		td_params-&gt;eptp_controls |= VMX_EPTP_PWL_4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int setup_tdparams_cpuids(struct kvm_cpuid2 *cpuid,</div><div class='add'>+				 struct td_params *td_params)</div><div class='add'>+{</div><div class='add'>+	const struct tdx_sys_info_td_conf *td_conf = &amp;tdx_sysinfo-&gt;td_conf;</div><div class='add'>+	const struct kvm_cpuid_entry2 *entry;</div><div class='add'>+	struct tdx_cpuid_value *value;</div><div class='add'>+	int i, copy_cnt = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * td_params.cpuid_values: The number and the order of cpuid_value must</div><div class='add'>+	 * be same to the one of struct tdsysinfo.{num_cpuid_config, cpuid_configs}</div><div class='add'>+	 * It's assumed that td_params was zeroed.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; td_conf-&gt;num_cpuid_config; i++) {</div><div class='add'>+		struct kvm_cpuid_entry2 tmp;</div><div class='add'>+</div><div class='add'>+		td_init_cpuid_entry2(&amp;tmp, i);</div><div class='add'>+</div><div class='add'>+		entry = kvm_find_cpuid_entry2(cpuid-&gt;entries, cpuid-&gt;nent,</div><div class='add'>+					      tmp.function, tmp.index);</div><div class='add'>+		if (!entry)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (tdx_unsupported_cpuid(entry))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		copy_cnt++;</div><div class='add'>+</div><div class='add'>+		value = &amp;td_params-&gt;cpuid_values[i];</div><div class='add'>+		value-&gt;eax = entry-&gt;eax;</div><div class='add'>+		value-&gt;ebx = entry-&gt;ebx;</div><div class='add'>+		value-&gt;ecx = entry-&gt;ecx;</div><div class='add'>+		value-&gt;edx = entry-&gt;edx;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * TDX module does not accept nonzero bits 16..23 for the</div><div class='add'>+		 * CPUID[0x80000008].EAX, see setup_tdparams_eptp_controls().</div><div class='add'>+		 */</div><div class='add'>+		if (tmp.function == 0x80000008)</div><div class='add'>+			value-&gt;eax = tdx_set_guest_phys_addr_bits(value-&gt;eax, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Rely on the TDX module to reject invalid configuration, but it can't</div><div class='add'>+	 * check of leafs that don't have a proper slot in td_params-&gt;cpuid_values</div><div class='add'>+	 * to stick then. So fail if there were entries that didn't get copied to</div><div class='add'>+	 * td_params.</div><div class='add'>+	 */</div><div class='add'>+	if (copy_cnt != cpuid-&gt;nent)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int setup_tdparams(struct kvm *kvm, struct td_params *td_params,</div><div class='add'>+			struct kvm_tdx_init_vm *init_vm)</div><div class='add'>+{</div><div class='add'>+	const struct tdx_sys_info_td_conf *td_conf = &amp;tdx_sysinfo-&gt;td_conf;</div><div class='add'>+	struct kvm_cpuid2 *cpuid = &amp;init_vm-&gt;cpuid;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (kvm-&gt;created_vcpus)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (init_vm-&gt;attributes &amp; ~tdx_get_supported_attrs(td_conf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (init_vm-&gt;xfam &amp; ~tdx_get_supported_xfam(td_conf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	td_params-&gt;max_vcpus = kvm-&gt;max_vcpus;</div><div class='add'>+	td_params-&gt;attributes = init_vm-&gt;attributes | td_conf-&gt;attributes_fixed1;</div><div class='add'>+	td_params-&gt;xfam = init_vm-&gt;xfam | td_conf-&gt;xfam_fixed1;</div><div class='add'>+</div><div class='add'>+	td_params-&gt;config_flags = TDX_CONFIG_FLAGS_NO_RBP_MOD;</div><div class='add'>+	td_params-&gt;tsc_frequency = TDX_TSC_KHZ_TO_25MHZ(kvm-&gt;arch.default_tsc_khz);</div><div class='add'>+</div><div class='add'>+	ret = setup_tdparams_eptp_controls(cpuid, td_params);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = setup_tdparams_cpuids(cpuid, td_params);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+#define MEMCPY_SAME_SIZE(dst, src)				\</div><div class='add'>+	do {							\</div><div class='add'>+		BUILD_BUG_ON(sizeof(dst) != sizeof(src));	\</div><div class='add'>+		memcpy((dst), (src), sizeof(dst));		\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+	MEMCPY_SAME_SIZE(td_params-&gt;mrconfigid, init_vm-&gt;mrconfigid);</div><div class='add'>+	MEMCPY_SAME_SIZE(td_params-&gt;mrowner, init_vm-&gt;mrowner);</div><div class='add'>+	MEMCPY_SAME_SIZE(td_params-&gt;mrownerconfig, init_vm-&gt;mrownerconfig);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __tdx_td_init(struct kvm *kvm, struct td_params *td_params,</div><div class='add'>+			 u64 *seamcall_err)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	cpumask_var_t packages;</div><div class='add'>+	struct page **tdcs_pages = NULL;</div><div class='add'>+	struct page *tdr_page;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u64 err, rcx;</div><div class='add'>+</div><div class='add'>+	*seamcall_err = 0;</div><div class='add'>+	ret = tdx_guest_keyid_alloc();</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	kvm_tdx-&gt;hkid = ret;</div><div class='add'>+	kvm_tdx-&gt;misc_cg = get_current_misc_cg();</div><div class='add'>+	ret = misc_cg_try_charge(MISC_CG_RES_TDX, kvm_tdx-&gt;misc_cg, 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_hkid;</div><div class='add'>+</div><div class='add'>+	ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;nr_configured_hkid);</div><div class='add'>+</div><div class='add'>+	tdr_page = alloc_page(GFP_KERNEL);</div><div class='add'>+	if (!tdr_page)</div><div class='add'>+		goto free_hkid;</div><div class='add'>+</div><div class='add'>+	kvm_tdx-&gt;td.tdcs_nr_pages = tdx_sysinfo-&gt;td_ctrl.tdcs_base_size / PAGE_SIZE;</div><div class='add'>+	/* TDVPS = TDVPR(4K page) + TDCX(multiple 4K pages), -1 for TDVPR. */</div><div class='add'>+	kvm_tdx-&gt;td.tdcx_nr_pages = tdx_sysinfo-&gt;td_ctrl.tdvps_base_size / PAGE_SIZE - 1;</div><div class='add'>+	tdcs_pages = kcalloc(kvm_tdx-&gt;td.tdcs_nr_pages, sizeof(*kvm_tdx-&gt;td.tdcs_pages),</div><div class='add'>+			     GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+	if (!tdcs_pages)</div><div class='add'>+		goto free_tdr;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; kvm_tdx-&gt;td.tdcs_nr_pages; i++) {</div><div class='add'>+		tdcs_pages[i] = alloc_page(GFP_KERNEL);</div><div class='add'>+		if (!tdcs_pages[i])</div><div class='add'>+			goto free_tdcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!zalloc_cpumask_var(&amp;packages, GFP_KERNEL))</div><div class='add'>+		goto free_tdcs;</div><div class='add'>+</div><div class='add'>+	cpus_read_lock();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Need at least one CPU of the package to be online in order to</div><div class='add'>+	 * program all packages for host key id.  Check it.</div><div class='add'>+	 */</div><div class='add'>+	for_each_present_cpu(i)</div><div class='add'>+		cpumask_set_cpu(topology_physical_package_id(i), packages);</div><div class='add'>+	for_each_online_cpu(i)</div><div class='add'>+		cpumask_clear_cpu(topology_physical_package_id(i), packages);</div><div class='add'>+	if (!cpumask_empty(packages)) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		/*</div><div class='add'>+		 * Because it's hard for human operator to figure out the</div><div class='add'>+		 * reason, warn it.</div><div class='add'>+		 */</div><div class='add'>+#define MSG_ALLPKG	"All packages need to have online CPU to create TD. Online CPU and retry.\n"</div><div class='add'>+		pr_warn_ratelimited(MSG_ALLPKG);</div><div class='add'>+		goto free_packages;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDH.MNG.CREATE tries to grab the global TDX module and fails</div><div class='add'>+	 * with TDX_OPERAND_BUSY when it fails to grab.  Take the global</div><div class='add'>+	 * lock to prevent it from failure.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;tdx_lock);</div><div class='add'>+	kvm_tdx-&gt;td.tdr_page = tdr_page;</div><div class='add'>+	err = tdh_mng_create(&amp;kvm_tdx-&gt;td, kvm_tdx-&gt;hkid);</div><div class='add'>+	mutex_unlock(&amp;tdx_lock);</div><div class='add'>+</div><div class='add'>+	if (err == TDX_RND_NO_ENTROPY) {</div><div class='add'>+		ret = -EAGAIN;</div><div class='add'>+		goto free_packages;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(err)) {</div><div class='add'>+		pr_tdx_error(TDH_MNG_CREATE, err);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto free_packages;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_online_cpu(i) {</div><div class='add'>+		int pkg = topology_physical_package_id(i);</div><div class='add'>+</div><div class='add'>+		if (cpumask_test_and_set_cpu(pkg, packages))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Program the memory controller in the package with an</div><div class='add'>+		 * encryption key associated to a TDX private host key id</div><div class='add'>+		 * assigned to this TDR.  Concurrent operations on same memory</div><div class='add'>+		 * controller results in TDX_OPERAND_BUSY. No locking needed</div><div class='add'>+		 * beyond the cpus_read_lock() above as it serializes against</div><div class='add'>+		 * hotplug and the first online CPU of the package is always</div><div class='add'>+		 * used. We never have two CPUs in the same socket trying to</div><div class='add'>+		 * program the key.</div><div class='add'>+		 */</div><div class='add'>+		ret = smp_call_on_cpu(i, tdx_do_tdh_mng_key_config,</div><div class='add'>+				      kvm_tdx, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	cpus_read_unlock();</div><div class='add'>+	free_cpumask_var(packages);</div><div class='add'>+	if (ret) {</div><div class='add'>+		i = 0;</div><div class='add'>+		goto teardown;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_tdx-&gt;td.tdcs_pages = tdcs_pages;</div><div class='add'>+	for (i = 0; i &lt; kvm_tdx-&gt;td.tdcs_nr_pages; i++) {</div><div class='add'>+		err = tdh_mng_addcx(&amp;kvm_tdx-&gt;td, tdcs_pages[i]);</div><div class='add'>+		if (err == TDX_RND_NO_ENTROPY) {</div><div class='add'>+			/* Here it's hard to allow userspace to retry. */</div><div class='add'>+			ret = -EAGAIN;</div><div class='add'>+			goto teardown;</div><div class='add'>+		}</div><div class='add'>+		if (WARN_ON_ONCE(err)) {</div><div class='add'>+			pr_tdx_error(TDH_MNG_ADDCX, err);</div><div class='add'>+			ret = -EIO;</div><div class='add'>+			goto teardown;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = tdh_mng_init(&amp;kvm_tdx-&gt;td, __pa(td_params), &amp;rcx);</div><div class='add'>+	if ((err &amp; TDX_SEAMCALL_STATUS_MASK) == TDX_OPERAND_INVALID) {</div><div class='add'>+		/*</div><div class='add'>+		 * Because a user gives operands, don't warn.</div><div class='add'>+		 * Return a hint to the user because it's sometimes hard for the</div><div class='add'>+		 * user to figure out which operand is invalid.  SEAMCALL status</div><div class='add'>+		 * code includes which operand caused invalid operand error.</div><div class='add'>+		 */</div><div class='add'>+		*seamcall_err = err;</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto teardown;</div><div class='add'>+	} else if (WARN_ON_ONCE(err)) {</div><div class='add'>+		pr_tdx_error_1(TDH_MNG_INIT, err, rcx);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto teardown;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The sequence for freeing resources from a partially initialized TD</div><div class='add'>+	 * varies based on where in the initialization flow failure occurred.</div><div class='add'>+	 * Simply use the full teardown and destroy, which naturally play nice</div><div class='add'>+	 * with partial initialization.</div><div class='add'>+	 */</div><div class='add'>+teardown:</div><div class='add'>+	/* Only free pages not yet added, so start at 'i' */</div><div class='add'>+	for (; i &lt; kvm_tdx-&gt;td.tdcs_nr_pages; i++) {</div><div class='add'>+		if (tdcs_pages[i]) {</div><div class='add'>+			__free_page(tdcs_pages[i]);</div><div class='add'>+			tdcs_pages[i] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (!kvm_tdx-&gt;td.tdcs_pages)</div><div class='add'>+		kfree(tdcs_pages);</div><div class='add'>+</div><div class='add'>+	tdx_mmu_release_hkid(kvm);</div><div class='add'>+	tdx_reclaim_td_control_pages(kvm);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+free_packages:</div><div class='add'>+	cpus_read_unlock();</div><div class='add'>+	free_cpumask_var(packages);</div><div class='add'>+</div><div class='add'>+free_tdcs:</div><div class='add'>+	for (i = 0; i &lt; kvm_tdx-&gt;td.tdcs_nr_pages; i++) {</div><div class='add'>+		if (tdcs_pages[i])</div><div class='add'>+			__free_page(tdcs_pages[i]);</div><div class='add'>+	}</div><div class='add'>+	kfree(tdcs_pages);</div><div class='add'>+	kvm_tdx-&gt;td.tdcs_pages = NULL;</div><div class='add'>+</div><div class='add'>+free_tdr:</div><div class='add'>+	if (tdr_page)</div><div class='add'>+		__free_page(tdr_page);</div><div class='add'>+	kvm_tdx-&gt;td.tdr_page = 0;</div><div class='add'>+</div><div class='add'>+free_hkid:</div><div class='add'>+	tdx_hkid_free(kvm_tdx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 tdx_td_metadata_field_read(struct kvm_tdx *tdx, u64 field_id,</div><div class='add'>+				      u64 *data)</div><div class='add'>+{</div><div class='add'>+	u64 err;</div><div class='add'>+</div><div class='add'>+	err = tdh_mng_rd(&amp;tdx-&gt;td, field_id, data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define TDX_MD_UNREADABLE_LEAF_MASK	GENMASK(30, 7)</div><div class='add'>+#define TDX_MD_UNREADABLE_SUBLEAF_MASK	GENMASK(31, 7)</div><div class='add'>+</div><div class='add'>+static int tdx_read_cpuid(struct kvm_vcpu *vcpu, u32 leaf, u32 sub_leaf,</div><div class='add'>+			  bool sub_leaf_set, int *entry_index,</div><div class='add'>+			  struct kvm_cpuid_entry2 *out)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu-&gt;kvm);</div><div class='add'>+	u64 field_id = TD_MD_FIELD_ID_CPUID_VALUES;</div><div class='add'>+	u64 ebx_eax, edx_ecx;</div><div class='add'>+	u64 err = 0;</div><div class='add'>+</div><div class='add'>+	if (sub_leaf &gt; 0b1111111)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (*entry_index &gt;= KVM_MAX_CPUID_ENTRIES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (leaf &amp; TDX_MD_UNREADABLE_LEAF_MASK ||</div><div class='add'>+	    sub_leaf &amp; TDX_MD_UNREADABLE_SUBLEAF_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * bit 23:17, REVSERVED: reserved, must be 0;</div><div class='add'>+	 * bit 16,    LEAF_31: leaf number bit 31;</div><div class='add'>+	 * bit 15:9,  LEAF_6_0: leaf number bits 6:0, leaf bits 30:7 are</div><div class='add'>+	 *                      implicitly 0;</div><div class='add'>+	 * bit 8,     SUBLEAF_NA: sub-leaf not applicable flag;</div><div class='add'>+	 * bit 7:1,   SUBLEAF_6_0: sub-leaf number bits 6:0. If SUBLEAF_NA is 1,</div><div class='add'>+	 *                         the SUBLEAF_6_0 is all-1.</div><div class='add'>+	 *                         sub-leaf bits 31:7 are implicitly 0;</div><div class='add'>+	 * bit 0,     ELEMENT_I: Element index within field;</div><div class='add'>+	 */</div><div class='add'>+	field_id |= ((leaf &amp; 0x80000000) ? 1 : 0) &lt;&lt; 16;</div><div class='add'>+	field_id |= (leaf &amp; 0x7f) &lt;&lt; 9;</div><div class='add'>+	if (sub_leaf_set)</div><div class='add'>+		field_id |= (sub_leaf &amp; 0x7f) &lt;&lt; 1;</div><div class='add'>+	else</div><div class='add'>+		field_id |= 0x1fe;</div><div class='add'>+</div><div class='add'>+	err = tdx_td_metadata_field_read(kvm_tdx, field_id, &amp;ebx_eax);</div><div class='add'>+	if (err) //TODO check for specific errors</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	out-&gt;eax = (u32) ebx_eax;</div><div class='add'>+	out-&gt;ebx = (u32) (ebx_eax &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	field_id++;</div><div class='add'>+	err = tdx_td_metadata_field_read(kvm_tdx, field_id, &amp;edx_ecx);</div><div class='add'>+	/*</div><div class='add'>+	 * It's weird that reading edx_ecx fails while reading ebx_eax</div><div class='add'>+	 * succeeded.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON_ONCE(err))</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	out-&gt;ecx = (u32) edx_ecx;</div><div class='add'>+	out-&gt;edx = (u32) (edx_ecx &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	out-&gt;function = leaf;</div><div class='add'>+	out-&gt;index = sub_leaf;</div><div class='add'>+	out-&gt;flags |= sub_leaf_set ? KVM_CPUID_FLAG_SIGNIFCANT_INDEX : 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Work around missing support on old TDX modules, fetch</div><div class='add'>+	 * guest maxpa from gfn_direct_bits.</div><div class='add'>+	 */</div><div class='add'>+	if (leaf == 0x80000008) {</div><div class='add'>+		gpa_t gpa_bits = gfn_to_gpa(kvm_gfn_direct_bits(vcpu-&gt;kvm));</div><div class='add'>+		unsigned int g_maxpa = __ffs(gpa_bits) + 1;</div><div class='add'>+</div><div class='add'>+		out-&gt;eax = tdx_set_guest_phys_addr_bits(out-&gt;eax, g_maxpa);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	(*entry_index)++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	out-&gt;eax = 0;</div><div class='add'>+	out-&gt;ebx = 0;</div><div class='add'>+	out-&gt;ecx = 0;</div><div class='add'>+	out-&gt;edx = 0;</div><div class='add'>+</div><div class='add'>+	return -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_td_init(struct kvm *kvm, struct kvm_tdx_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	struct kvm_tdx_init_vm *init_vm;</div><div class='add'>+	struct td_params *td_params = NULL;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(*init_vm) != 256 + sizeof_field(struct kvm_tdx_init_vm, cpuid));</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct td_params) != 1024);</div><div class='add'>+</div><div class='add'>+	if (kvm_tdx-&gt;state != TD_STATE_UNINITIALIZED)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	init_vm = kmalloc(sizeof(*init_vm) +</div><div class='add'>+			  sizeof(init_vm-&gt;cpuid.entries[0]) * KVM_MAX_CPUID_ENTRIES,</div><div class='add'>+			  GFP_KERNEL);</div><div class='add'>+	if (!init_vm)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(init_vm, u64_to_user_ptr(cmd-&gt;data), sizeof(*init_vm))) {</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (init_vm-&gt;cpuid.nent &gt; KVM_MAX_CPUID_ENTRIES) {</div><div class='add'>+		ret = -E2BIG;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(init_vm-&gt;cpuid.entries,</div><div class='add'>+			   u64_to_user_ptr(cmd-&gt;data) + sizeof(*init_vm),</div><div class='add'>+			   flex_array_size(init_vm, cpuid.entries, init_vm-&gt;cpuid.nent))) {</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (memchr_inv(init_vm-&gt;reserved, 0, sizeof(init_vm-&gt;reserved))) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (init_vm-&gt;cpuid.padding) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	td_params = kzalloc(sizeof(struct td_params), GFP_KERNEL);</div><div class='add'>+	if (!td_params) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = setup_tdparams(kvm, td_params, init_vm);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __tdx_td_init(kvm, td_params, &amp;cmd-&gt;hw_error);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	kvm_tdx-&gt;tsc_offset = td_tdcs_exec_read64(kvm_tdx, TD_TDCS_EXEC_TSC_OFFSET);</div><div class='add'>+	kvm_tdx-&gt;tsc_multiplier = td_tdcs_exec_read64(kvm_tdx, TD_TDCS_EXEC_TSC_MULTIPLIER);</div><div class='add'>+	kvm_tdx-&gt;attributes = td_params-&gt;attributes;</div><div class='add'>+	kvm_tdx-&gt;xfam = td_params-&gt;xfam;</div><div class='add'>+</div><div class='add'>+	if (td_params-&gt;config_flags &amp; TDX_CONFIG_FLAGS_MAX_GPAW)</div><div class='add'>+		kvm-&gt;arch.gfn_direct_bits = TDX_SHARED_BIT_PWL_5;</div><div class='add'>+	else</div><div class='add'>+		kvm-&gt;arch.gfn_direct_bits = TDX_SHARED_BIT_PWL_4;</div><div class='add'>+</div><div class='add'>+	kvm_tdx-&gt;state = TD_STATE_INITIALIZED;</div><div class='add'>+out:</div><div class='add'>+	/* kfree() accepts NULL. */</div><div class='add'>+	kfree(init_vm);</div><div class='add'>+	kfree(td_params);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_flush_tlb_current(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * flush_tlb_current() is invoked when the first time for the vcpu to</div><div class='add'>+	 * run or when root of shared EPT is invalidated.</div><div class='add'>+	 * KVM only needs to flush shared EPT because the TDX module handles TLB</div><div class='add'>+	 * invalidation for private EPT in tdh_vp_enter();</div><div class='add'>+	 *</div><div class='add'>+	 * A single context invalidation for shared EPT can be performed here.</div><div class='add'>+	 * However, this single context invalidation requires the private EPTP</div><div class='add'>+	 * rather than the shared EPTP to flush shared EPT, as shared EPT uses</div><div class='add'>+	 * private EPTP as its ASID for TLB invalidation.</div><div class='add'>+	 *</div><div class='add'>+	 * To avoid reading back private EPTP, perform a global invalidation for</div><div class='add'>+	 * shared EPT instead to keep this function simple.</div><div class='add'>+	 */</div><div class='add'>+	ept_sync_global();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_flush_tlb_all(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * TDX has called tdx_track() in tdx_sept_remove_private_spte() to</div><div class='add'>+	 * ensure that private EPT will be flushed on the next TD enter. No need</div><div class='add'>+	 * to call tdx_track() here again even when this callback is a result of</div><div class='add'>+	 * zapping private EPT.</div><div class='add'>+	 *</div><div class='add'>+	 * Due to the lack of the context to determine which EPT has been</div><div class='add'>+	 * affected by zapping, invoke invept() directly here for both shared</div><div class='add'>+	 * EPT and private EPT for simplicity, though it's not necessary for</div><div class='add'>+	 * private EPT.</div><div class='add'>+	 */</div><div class='add'>+	ept_sync_global();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_td_finalize(struct kvm *kvm, struct kvm_tdx_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;kvm-&gt;slots_lock);</div><div class='add'>+</div><div class='add'>+	if (!is_hkid_assigned(kvm_tdx) || kvm_tdx-&gt;state == TD_STATE_RUNNABLE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	/*</div><div class='add'>+	 * Pages are pending for KVM_TDX_INIT_MEM_REGION to issue</div><div class='add'>+	 * TDH.MEM.PAGE.ADD().</div><div class='add'>+	 */</div><div class='add'>+	if (atomic64_read(&amp;kvm_tdx-&gt;nr_premapped))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;hw_error = tdh_mr_finalize(&amp;kvm_tdx-&gt;td);</div><div class='add'>+	if (tdx_operand_busy(cmd-&gt;hw_error))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	if (KVM_BUG_ON(cmd-&gt;hw_error, kvm)) {</div><div class='add'>+		pr_tdx_error(TDH_MR_FINALIZE, cmd-&gt;hw_error);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvm_tdx-&gt;state = TD_STATE_RUNNABLE;</div><div class='add'>+	/* TD_STATE_RUNNABLE must be set before 'pre_fault_allowed' */</div><div class='add'>+	smp_wmb();</div><div class='add'>+	kvm-&gt;arch.pre_fault_allowed = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_vm_ioctl(struct kvm *kvm, void __user *argp)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx_cmd tdx_cmd;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(&amp;tdx_cmd, argp, sizeof(struct kvm_tdx_cmd)))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Userspace should never set hw_error. It is used to fill</div><div class='add'>+	 * hardware-defined error by the kernel.</div><div class='add'>+	 */</div><div class='add'>+	if (tdx_cmd.hw_error)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kvm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	switch (tdx_cmd.id) {</div><div class='add'>+	case KVM_TDX_CAPABILITIES:</div><div class='add'>+		r = tdx_get_capabilities(&amp;tdx_cmd);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_TDX_INIT_VM:</div><div class='add'>+		r = tdx_td_init(kvm, &amp;tdx_cmd);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_TDX_FINALIZE_VM:</div><div class='add'>+		r = tdx_td_finalize(kvm, &amp;tdx_cmd);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(argp, &amp;tdx_cmd, sizeof(struct kvm_tdx_cmd)))</div><div class='add'>+		r = -EFAULT;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;kvm-&gt;lock);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* VMM can pass one 64bit auxiliary data to vcpu via RCX for guest BIOS. */</div><div class='add'>+static int tdx_td_vcpu_init(struct kvm_vcpu *vcpu, u64 vcpu_rcx)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu-&gt;kvm);</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	struct page *page;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u64 err;</div><div class='add'>+</div><div class='add'>+	page = alloc_page(GFP_KERNEL);</div><div class='add'>+	if (!page)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	tdx-&gt;vp.tdvpr_page = page;</div><div class='add'>+</div><div class='add'>+	tdx-&gt;vp.tdcx_pages = kcalloc(kvm_tdx-&gt;td.tdcx_nr_pages, sizeof(*tdx-&gt;vp.tdcx_pages),</div><div class='add'>+			       	     GFP_KERNEL);</div><div class='add'>+	if (!tdx-&gt;vp.tdcx_pages) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto free_tdvpr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; kvm_tdx-&gt;td.tdcx_nr_pages; i++) {</div><div class='add'>+		page = alloc_page(GFP_KERNEL);</div><div class='add'>+		if (!page) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto free_tdcx;</div><div class='add'>+		}</div><div class='add'>+		tdx-&gt;vp.tdcx_pages[i] = page;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = tdh_vp_create(&amp;kvm_tdx-&gt;td, &amp;tdx-&gt;vp);</div><div class='add'>+	if (KVM_BUG_ON(err, vcpu-&gt;kvm)) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		pr_tdx_error(TDH_VP_CREATE, err);</div><div class='add'>+		goto free_tdcx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; kvm_tdx-&gt;td.tdcx_nr_pages; i++) {</div><div class='add'>+		err = tdh_vp_addcx(&amp;tdx-&gt;vp, tdx-&gt;vp.tdcx_pages[i]);</div><div class='add'>+		if (KVM_BUG_ON(err, vcpu-&gt;kvm)) {</div><div class='add'>+			pr_tdx_error(TDH_VP_ADDCX, err);</div><div class='add'>+			/*</div><div class='add'>+			 * Pages already added are reclaimed by the vcpu_free</div><div class='add'>+			 * method, but the rest are freed here.</div><div class='add'>+			 */</div><div class='add'>+			for (; i &lt; kvm_tdx-&gt;td.tdcx_nr_pages; i++) {</div><div class='add'>+				__free_page(tdx-&gt;vp.tdcx_pages[i]);</div><div class='add'>+				tdx-&gt;vp.tdcx_pages[i] = NULL;</div><div class='add'>+			}</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = tdh_vp_init(&amp;tdx-&gt;vp, vcpu_rcx, vcpu-&gt;vcpu_id);</div><div class='add'>+	if (KVM_BUG_ON(err, vcpu-&gt;kvm)) {</div><div class='add'>+		pr_tdx_error(TDH_VP_INIT, err);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vcpu-&gt;arch.mp_state = KVM_MP_STATE_RUNNABLE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_tdcx:</div><div class='add'>+	for (i = 0; i &lt; kvm_tdx-&gt;td.tdcx_nr_pages; i++) {</div><div class='add'>+		if (tdx-&gt;vp.tdcx_pages[i])</div><div class='add'>+			__free_page(tdx-&gt;vp.tdcx_pages[i]);</div><div class='add'>+		tdx-&gt;vp.tdcx_pages[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+	kfree(tdx-&gt;vp.tdcx_pages);</div><div class='add'>+	tdx-&gt;vp.tdcx_pages = NULL;</div><div class='add'>+</div><div class='add'>+free_tdvpr:</div><div class='add'>+	if (tdx-&gt;vp.tdvpr_page)</div><div class='add'>+		__free_page(tdx-&gt;vp.tdvpr_page);</div><div class='add'>+	tdx-&gt;vp.tdvpr_page = 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sometimes reads multipple subleafs. Return how many enties were written. */</div><div class='add'>+static int tdx_vcpu_get_cpuid_leaf(struct kvm_vcpu *vcpu, u32 leaf, int *entry_index,</div><div class='add'>+				   struct kvm_cpuid_entry2 *output_e)</div><div class='add'>+{</div><div class='add'>+	int sub_leaf = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* First try without a subleaf */</div><div class='add'>+	ret = tdx_read_cpuid(vcpu, leaf, 0, false, entry_index, output_e);</div><div class='add'>+</div><div class='add'>+	/* If success, or invalid leaf, just give up */</div><div class='add'>+	if (ret != -EIO)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the try without a subleaf failed, try reading subleafs until</div><div class='add'>+	 * failure. The TDX module only supports 6 bits of subleaf index.</div><div class='add'>+	 */</div><div class='add'>+	while (1) {</div><div class='add'>+		/* Keep reading subleafs until there is a failure. */</div><div class='add'>+		if (tdx_read_cpuid(vcpu, leaf, sub_leaf, true, entry_index, output_e))</div><div class='add'>+			return !sub_leaf;</div><div class='add'>+</div><div class='add'>+		sub_leaf++;</div><div class='add'>+		output_e++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_vcpu_get_cpuid(struct kvm_vcpu *vcpu, struct kvm_tdx_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvm_cpuid2 __user *output, *td_cpuid;</div><div class='add'>+	int r = 0, i = 0, leaf;</div><div class='add'>+	u32 level;</div><div class='add'>+</div><div class='add'>+	output = u64_to_user_ptr(cmd-&gt;data);</div><div class='add'>+	td_cpuid = kzalloc(sizeof(*td_cpuid) +</div><div class='add'>+			sizeof(output-&gt;entries[0]) * KVM_MAX_CPUID_ENTRIES,</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!td_cpuid)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(td_cpuid, output, sizeof(*output))) {</div><div class='add'>+		r = -EFAULT;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read max CPUID for normal range */</div><div class='add'>+	if (tdx_vcpu_get_cpuid_leaf(vcpu, 0, &amp;i, &amp;td_cpuid-&gt;entries[i])) {</div><div class='add'>+		r = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	level = td_cpuid-&gt;entries[0].eax;</div><div class='add'>+</div><div class='add'>+	for (leaf = 1; leaf &lt;= level; leaf++)</div><div class='add'>+		tdx_vcpu_get_cpuid_leaf(vcpu, leaf, &amp;i, &amp;td_cpuid-&gt;entries[i]);</div><div class='add'>+</div><div class='add'>+	/* Read max CPUID for extended range */</div><div class='add'>+	if (tdx_vcpu_get_cpuid_leaf(vcpu, 0x80000000, &amp;i, &amp;td_cpuid-&gt;entries[i])) {</div><div class='add'>+		r = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	level = td_cpuid-&gt;entries[i - 1].eax;</div><div class='add'>+</div><div class='add'>+	for (leaf = 0x80000001; leaf &lt;= level; leaf++)</div><div class='add'>+		tdx_vcpu_get_cpuid_leaf(vcpu, leaf, &amp;i, &amp;td_cpuid-&gt;entries[i]);</div><div class='add'>+</div><div class='add'>+	if (td_cpuid-&gt;nent &lt; i)</div><div class='add'>+		r = -E2BIG;</div><div class='add'>+	td_cpuid-&gt;nent = i;</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(output, td_cpuid, sizeof(*output))) {</div><div class='add'>+		r = -EFAULT;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (r == -E2BIG)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(output-&gt;entries, td_cpuid-&gt;entries,</div><div class='add'>+			 td_cpuid-&gt;nent * sizeof(struct kvm_cpuid_entry2)))</div><div class='add'>+		r = -EFAULT;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(td_cpuid);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_vcpu_init(struct kvm_vcpu *vcpu, struct kvm_tdx_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	u64 apic_base;</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (tdx-&gt;state != VCPU_TD_STATE_UNINITIALIZED)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX requires X2APIC, userspace is responsible for configuring guest</div><div class='add'>+	 * CPUID accordingly.</div><div class='add'>+	 */</div><div class='add'>+	apic_base = APIC_DEFAULT_PHYS_BASE | LAPIC_MODE_X2APIC |</div><div class='add'>+		(kvm_vcpu_is_reset_bsp(vcpu) ? MSR_IA32_APICBASE_BSP : 0);</div><div class='add'>+	if (kvm_apic_set_base(vcpu, apic_base, true))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = tdx_td_vcpu_init(vcpu, (u64)cmd-&gt;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	td_vmcs_write16(tdx, POSTED_INTR_NV, POSTED_INTR_VECTOR);</div><div class='add'>+	td_vmcs_write64(tdx, POSTED_INTR_DESC_ADDR, __pa(&amp;tdx-&gt;vt.pi_desc));</div><div class='add'>+	td_vmcs_setbit32(tdx, PIN_BASED_VM_EXEC_CONTROL, PIN_BASED_POSTED_INTR);</div><div class='add'>+</div><div class='add'>+	tdx-&gt;state = VCPU_TD_STATE_INITIALIZED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Yell on INIT, as TDX doesn't support INIT, i.e. KVM should drop all</div><div class='add'>+	 * INIT events.</div><div class='add'>+	 *</div><div class='add'>+	 * Defer initializing vCPU for RESET state until KVM_TDX_INIT_VCPU, as</div><div class='add'>+	 * userspace needs to define the vCPU model before KVM can initialize</div><div class='add'>+	 * vCPU state, e.g. to enable x2APIC.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON_ONCE(init_event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct tdx_gmem_post_populate_arg {</div><div class='add'>+	struct kvm_vcpu *vcpu;</div><div class='add'>+	__u32 flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tdx_gmem_post_populate(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn,</div><div class='add'>+				  void __user *src, int order, void *_arg)</div><div class='add'>+{</div><div class='add'>+	u64 error_code = PFERR_GUEST_FINAL_MASK | PFERR_PRIVATE_ACCESS;</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	struct tdx_gmem_post_populate_arg *arg = _arg;</div><div class='add'>+	struct kvm_vcpu *vcpu = arg-&gt;vcpu;</div><div class='add'>+	gpa_t gpa = gfn_to_gpa(gfn);</div><div class='add'>+	u8 level = PG_LEVEL_4K;</div><div class='add'>+	struct page *src_page;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u64 err, entry, level_state;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Get the source page if it has been faulted in. Return failure if the</div><div class='add'>+	 * source page has been swapped out or unmapped in primary memory.</div><div class='add'>+	 */</div><div class='add'>+	ret = get_user_pages_fast((unsigned long)src, 1, 0, &amp;src_page);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret != 1)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = kvm_tdp_map_page(vcpu, gpa, error_code, &amp;level);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The private mem cannot be zapped after kvm_tdp_map_page()</div><div class='add'>+	 * because all paths are covered by slots_lock and the</div><div class='add'>+	 * filemap invalidate lock.  Check that they are indeed enough.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ENABLED(CONFIG_KVM_PROVE_MMU)) {</div><div class='add'>+		scoped_guard(read_lock, &amp;kvm-&gt;mmu_lock) {</div><div class='add'>+			if (KVM_BUG_ON(!kvm_tdp_mmu_gpa_is_mapped(vcpu, gpa), kvm)) {</div><div class='add'>+				ret = -EIO;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+	err = tdh_mem_page_add(&amp;kvm_tdx-&gt;td, gpa, pfn_to_page(pfn),</div><div class='add'>+			       src_page, &amp;entry, &amp;level_state);</div><div class='add'>+	if (err) {</div><div class='add'>+		ret = unlikely(tdx_operand_busy(err)) ? -EBUSY : -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!KVM_BUG_ON(!atomic64_read(&amp;kvm_tdx-&gt;nr_premapped), kvm))</div><div class='add'>+		atomic64_dec(&amp;kvm_tdx-&gt;nr_premapped);</div><div class='add'>+</div><div class='add'>+	if (arg-&gt;flags &amp; KVM_TDX_MEASURE_MEMORY_REGION) {</div><div class='add'>+		for (i = 0; i &lt; PAGE_SIZE; i += TDX_EXTENDMR_CHUNKSIZE) {</div><div class='add'>+			err = tdh_mr_extend(&amp;kvm_tdx-&gt;td, gpa + i, &amp;entry,</div><div class='add'>+					    &amp;level_state);</div><div class='add'>+			if (err) {</div><div class='add'>+				ret = -EIO;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	put_page(src_page);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_vcpu_init_mem_region(struct kvm_vcpu *vcpu, struct kvm_tdx_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_tdx *tdx = to_tdx(vcpu);</div><div class='add'>+	struct kvm *kvm = vcpu-&gt;kvm;</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(kvm);</div><div class='add'>+	struct kvm_tdx_init_mem_region region;</div><div class='add'>+	struct tdx_gmem_post_populate_arg arg;</div><div class='add'>+	long gmem_ret;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (tdx-&gt;state != VCPU_TD_STATE_INITIALIZED)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;kvm-&gt;slots_lock);</div><div class='add'>+</div><div class='add'>+	/* Once TD is finalized, the initial guest memory is fixed. */</div><div class='add'>+	if (kvm_tdx-&gt;state == TD_STATE_RUNNABLE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;flags &amp; ~KVM_TDX_MEASURE_MEMORY_REGION)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(&amp;region, u64_to_user_ptr(cmd-&gt;data), sizeof(region)))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (!PAGE_ALIGNED(region.source_addr) || !PAGE_ALIGNED(region.gpa) ||</div><div class='add'>+	    !region.nr_pages ||</div><div class='add'>+	    region.gpa + (region.nr_pages &lt;&lt; PAGE_SHIFT) &lt;= region.gpa ||</div><div class='add'>+	    !vt_is_tdx_private_gpa(kvm, region.gpa) ||</div><div class='add'>+	    !vt_is_tdx_private_gpa(kvm, region.gpa + (region.nr_pages &lt;&lt; PAGE_SHIFT) - 1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	kvm_mmu_reload(vcpu);</div><div class='add'>+	ret = 0;</div><div class='add'>+	while (region.nr_pages) {</div><div class='add'>+		if (signal_pending(current)) {</div><div class='add'>+			ret = -EINTR;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		arg = (struct tdx_gmem_post_populate_arg) {</div><div class='add'>+			.vcpu = vcpu,</div><div class='add'>+			.flags = cmd-&gt;flags,</div><div class='add'>+		};</div><div class='add'>+		gmem_ret = kvm_gmem_populate(kvm, gpa_to_gfn(region.gpa),</div><div class='add'>+					     u64_to_user_ptr(region.source_addr),</div><div class='add'>+					     1, tdx_gmem_post_populate, &amp;arg);</div><div class='add'>+		if (gmem_ret &lt; 0) {</div><div class='add'>+			ret = gmem_ret;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (gmem_ret != 1) {</div><div class='add'>+			ret = -EIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		region.source_addr += PAGE_SIZE;</div><div class='add'>+		region.gpa += PAGE_SIZE;</div><div class='add'>+		region.nr_pages--;</div><div class='add'>+</div><div class='add'>+		cond_resched();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (copy_to_user(u64_to_user_ptr(cmd-&gt;data), &amp;region, sizeof(region)))</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_vcpu_ioctl(struct kvm_vcpu *vcpu, void __user *argp)</div><div class='add'>+{</div><div class='add'>+	struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu-&gt;kvm);</div><div class='add'>+	struct kvm_tdx_cmd cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!is_hkid_assigned(kvm_tdx) || kvm_tdx-&gt;state == TD_STATE_RUNNABLE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (copy_from_user(&amp;cmd, argp, sizeof(cmd)))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (cmd.hw_error)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (cmd.id) {</div><div class='add'>+	case KVM_TDX_INIT_VCPU:</div><div class='add'>+		ret = tdx_vcpu_init(vcpu, &amp;cmd);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_TDX_INIT_MEM_REGION:</div><div class='add'>+		ret = tdx_vcpu_init_mem_region(vcpu, &amp;cmd);</div><div class='add'>+		break;</div><div class='add'>+	case KVM_TDX_GET_CPUID:</div><div class='add'>+		ret = tdx_vcpu_get_cpuid(vcpu, &amp;cmd);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tdx_gmem_private_max_mapping_level(struct kvm *kvm, kvm_pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	return PG_LEVEL_4K;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_online_cpu(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	/* Sanity check CPU is already in post-VMXON */</div><div class='add'>+	WARN_ON_ONCE(!(cr4_read_shadow() &amp; X86_CR4_VMXE));</div><div class='add'>+</div><div class='add'>+	local_irq_save(flags);</div><div class='add'>+	r = tdx_cpu_enable();</div><div class='add'>+	local_irq_restore(flags);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tdx_offline_cpu(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* No TD is running.  Allow any cpu to be offline. */</div><div class='add'>+	if (!atomic_read(&amp;nr_configured_hkid))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * In order to reclaim TDX HKID, (i.e. when deleting guest TD), need to</div><div class='add'>+	 * call TDH.PHYMEM.PAGE.WBINVD on all packages to program all memory</div><div class='add'>+	 * controller with pconfig.  If we have active TDX HKID, refuse to</div><div class='add'>+	 * offline the last online cpu.</div><div class='add'>+	 */</div><div class='add'>+	for_each_online_cpu(i) {</div><div class='add'>+		/*</div><div class='add'>+		 * Found another online cpu on the same package.</div><div class='add'>+		 * Allow to offline.</div><div class='add'>+		 */</div><div class='add'>+		if (i != cpu &amp;&amp; topology_physical_package_id(i) ==</div><div class='add'>+				topology_physical_package_id(cpu))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * This is the last cpu of this package.  Don't offline it.</div><div class='add'>+	 *</div><div class='add'>+	 * Because it's hard for human operator to understand the</div><div class='add'>+	 * reason, warn it.</div><div class='add'>+	 */</div><div class='add'>+#define MSG_ALLPKG_ONLINE \</div><div class='add'>+	"TDX requires all packages to have an online CPU. Delete all TDs in order to offline all CPUs of a package.\n"</div><div class='add'>+	pr_warn_ratelimited(MSG_ALLPKG_ONLINE);</div><div class='add'>+	return -EBUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __do_tdx_cleanup(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Once TDX module is initialized, it cannot be disabled and</div><div class='add'>+	 * re-initialized again w/o runtime update (which isn't</div><div class='add'>+	 * supported by kernel).  Only need to remove the cpuhp here.</div><div class='add'>+	 * The TDX host core code tracks TDX status and can handle</div><div class='add'>+	 * 'multiple enabling' scenario.</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON_ONCE(!tdx_cpuhp_state);</div><div class='add'>+	cpuhp_remove_state_nocalls_cpuslocked(tdx_cpuhp_state);</div><div class='add'>+	tdx_cpuhp_state = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __tdx_cleanup(void)</div><div class='add'>+{</div><div class='add'>+	cpus_read_lock();</div><div class='add'>+	__do_tdx_cleanup();</div><div class='add'>+	cpus_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init __do_tdx_bringup(void)</div><div class='add'>+{</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX-specific cpuhp callback to call tdx_cpu_enable() on all</div><div class='add'>+	 * online CPUs before calling tdx_enable(), and on any new</div><div class='add'>+	 * going-online CPU to make sure it is ready for TDX guest.</div><div class='add'>+	 */</div><div class='add'>+	r = cpuhp_setup_state_cpuslocked(CPUHP_AP_ONLINE_DYN,</div><div class='add'>+					 "kvm/cpu/tdx:online",</div><div class='add'>+					 tdx_online_cpu, tdx_offline_cpu);</div><div class='add'>+	if (r &lt; 0)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	tdx_cpuhp_state = r;</div><div class='add'>+</div><div class='add'>+	r = tdx_enable();</div><div class='add'>+	if (r)</div><div class='add'>+		__do_tdx_cleanup();</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init __tdx_bringup(void)</div><div class='add'>+{</div><div class='add'>+	const struct tdx_sys_info_td_conf *td_conf;</div><div class='add'>+	int r, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tdx_uret_msrs); i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * Check if MSRs (tdx_uret_msrs) can be saved/restored</div><div class='add'>+		 * before returning to user space.</div><div class='add'>+		 *</div><div class='add'>+		 * this_cpu_ptr(user_return_msrs)-&gt;registered isn't checked</div><div class='add'>+		 * because the registration is done at vcpu runtime by</div><div class='add'>+		 * tdx_user_return_msr_update_cache().</div><div class='add'>+		 */</div><div class='add'>+		tdx_uret_msrs[i].slot = kvm_find_user_return_msr(tdx_uret_msrs[i].msr);</div><div class='add'>+		if (tdx_uret_msrs[i].slot == -1) {</div><div class='add'>+			/* If any MSR isn't supported, it is a KVM bug */</div><div class='add'>+			pr_err("MSR %x isn't included by kvm_find_user_return_msr\n",</div><div class='add'>+				tdx_uret_msrs[i].msr);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Enabling TDX requires enabling hardware virtualization first,</div><div class='add'>+	 * as making SEAMCALLs requires CPU being in post-VMXON state.</div><div class='add'>+	 */</div><div class='add'>+	r = kvm_enable_virtualization();</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	cpus_read_lock();</div><div class='add'>+	r = __do_tdx_bringup();</div><div class='add'>+	cpus_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (r)</div><div class='add'>+		goto tdx_bringup_err;</div><div class='add'>+</div><div class='add'>+	/* Get TDX global information for later use */</div><div class='add'>+	tdx_sysinfo = tdx_get_sysinfo();</div><div class='add'>+	if (WARN_ON_ONCE(!tdx_sysinfo)) {</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto get_sysinfo_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check TDX module and KVM capabilities */</div><div class='add'>+	if (!tdx_get_supported_attrs(&amp;tdx_sysinfo-&gt;td_conf) ||</div><div class='add'>+	    !tdx_get_supported_xfam(&amp;tdx_sysinfo-&gt;td_conf))</div><div class='add'>+		goto get_sysinfo_err;</div><div class='add'>+</div><div class='add'>+	if (!(tdx_sysinfo-&gt;features.tdx_features0 &amp; MD_FIELD_ID_FEATURES0_TOPOLOGY_ENUM))</div><div class='add'>+		goto get_sysinfo_err;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * TDX has its own limit of maximum vCPUs it can support for all</div><div class='add'>+	 * TDX guests in addition to KVM_MAX_VCPUS.  Userspace needs to</div><div class='add'>+	 * query TDX guest's maximum vCPUs by checking KVM_CAP_MAX_VCPU</div><div class='add'>+	 * extension on per-VM basis.</div><div class='add'>+	 *</div><div class='add'>+	 * TDX module reports such limit via the MAX_VCPU_PER_TD global</div><div class='add'>+	 * metadata.  Different modules may report different values.</div><div class='add'>+	 * Some old module may also not support this metadata (in which</div><div class='add'>+	 * case this limit is U16_MAX).</div><div class='add'>+	 *</div><div class='add'>+	 * In practice, the reported value reflects the maximum logical</div><div class='add'>+	 * CPUs that ALL the platforms that the module supports can</div><div class='add'>+	 * possibly have.</div><div class='add'>+	 *</div><div class='add'>+	 * Simply forwarding the MAX_VCPU_PER_TD to userspace could</div><div class='add'>+	 * result in an unpredictable ABI.  KVM instead always advertise</div><div class='add'>+	 * the number of logical CPUs the platform has as the maximum</div><div class='add'>+	 * vCPUs for TDX guests.</div><div class='add'>+	 *</div><div class='add'>+	 * Make sure MAX_VCPU_PER_TD reported by TDX module is not</div><div class='add'>+	 * smaller than the number of logical CPUs, otherwise KVM will</div><div class='add'>+	 * report an unsupported value to userspace.</div><div class='add'>+	 *</div><div class='add'>+	 * Note, a platform with TDX enabled in the BIOS cannot support</div><div class='add'>+	 * physical CPU hotplug, and TDX requires the BIOS has marked</div><div class='add'>+	 * all logical CPUs in MADT table as enabled.  Just use</div><div class='add'>+	 * num_present_cpus() for the number of logical CPUs.</div><div class='add'>+	 */</div><div class='add'>+	td_conf = &amp;tdx_sysinfo-&gt;td_conf;</div><div class='add'>+	if (td_conf-&gt;max_vcpus_per_td &lt; num_present_cpus()) {</div><div class='add'>+		pr_err("Disable TDX: MAX_VCPU_PER_TD (%u) smaller than number of logical CPUs (%u).\n",</div><div class='add'>+				td_conf-&gt;max_vcpus_per_td, num_present_cpus());</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto get_sysinfo_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (misc_cg_set_capacity(MISC_CG_RES_TDX, tdx_get_nr_guest_keyids())) {</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto get_sysinfo_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Leave hardware virtualization enabled after TDX is enabled</div><div class='add'>+	 * successfully.  TDX CPU hotplug depends on this.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+get_sysinfo_err:</div><div class='add'>+	__tdx_cleanup();</div><div class='add'>+tdx_bringup_err:</div><div class='add'>+	kvm_disable_virtualization();</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tdx_cleanup(void)</div><div class='add'>+{</div><div class='add'>+	if (enable_tdx) {</div><div class='add'>+		misc_cg_set_capacity(MISC_CG_RES_TDX, 0);</div><div class='add'>+		__tdx_cleanup();</div><div class='add'>+		kvm_disable_virtualization();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __init tdx_bringup(void)</div><div class='add'>+{</div><div class='add'>+	int r, i;</div><div class='add'>+</div><div class='add'>+	/* tdx_disable_virtualization_cpu() uses associated_tdvcpus. */</div><div class='add'>+	for_each_possible_cpu(i)</div><div class='add'>+		INIT_LIST_HEAD(&amp;per_cpu(associated_tdvcpus, i));</div><div class='add'>+</div><div class='add'>+	if (!enable_tdx)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!enable_ept) {</div><div class='add'>+		pr_err("EPT is required for TDX\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!tdp_mmu_enabled || !enable_mmio_caching || !enable_ept_ad_bits) {</div><div class='add'>+		pr_err("TDP MMU and MMIO caching and EPT A/D bit is required for TDX\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!enable_apicv) {</div><div class='add'>+		pr_err("APICv is required for TDX\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_OSXSAVE)) {</div><div class='add'>+		pr_err("tdx: OSXSAVE is required for TDX\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_MOVDIR64B)) {</div><div class='add'>+		pr_err("tdx: MOVDIR64B is required for TDX\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_SELFSNOOP)) {</div><div class='add'>+		pr_err("Self-snoop is required for TDX\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_TDX_HOST_PLATFORM)) {</div><div class='add'>+		pr_err("tdx: no TDX private KeyIDs available\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!enable_virt_at_load) {</div><div class='add'>+		pr_err("tdx: tdx requires kvm.enable_virt_at_load=1\n");</div><div class='add'>+		goto success_disable_tdx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Ideally KVM should probe whether TDX module has been loaded</div><div class='add'>+	 * first and then try to bring it up.  But TDX needs to use SEAMCALL</div><div class='add'>+	 * to probe whether the module is loaded (there is no CPUID or MSR</div><div class='add'>+	 * for that), and making SEAMCALL requires enabling virtualization</div><div class='add'>+	 * first, just like the rest steps of bringing up TDX module.</div><div class='add'>+	 *</div><div class='add'>+	 * So, for simplicity do everything in __tdx_bringup(); the first</div><div class='add'>+	 * SEAMCALL will return -ENODEV when the module is not loaded.  The</div><div class='add'>+	 * only complication is having to make sure that initialization</div><div class='add'>+	 * SEAMCALLs don't return TDX_SEAMCALL_VMFAILINVALID in other</div><div class='add'>+	 * cases.</div><div class='add'>+	 */</div><div class='add'>+	r = __tdx_bringup();</div><div class='add'>+	if (r) {</div><div class='add'>+		/*</div><div class='add'>+		 * Disable TDX only but don't fail to load module if</div><div class='add'>+		 * the TDX module could not be loaded.  No need to print</div><div class='add'>+		 * message saying "module is not loaded" because it was</div><div class='add'>+		 * printed when the first SEAMCALL failed.</div><div class='add'>+		 */</div><div class='add'>+		if (r == -ENODEV)</div><div class='add'>+			goto success_disable_tdx;</div><div class='add'>+</div><div class='add'>+		enable_tdx = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+</div><div class='add'>+success_disable_tdx:</div><div class='add'>+	enable_tdx = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/arch/x86/kvm/vmx/tdx.h b/arch/x86/kvm/vmx/tdx.h<br/>new file mode 100644<br/>index 000000000000..51f98443e8a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/tdx.h</a></div><div class='hunk'>@@ -0,0 +1,204 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __KVM_X86_VMX_TDX_H</div><div class='add'>+#define __KVM_X86_VMX_TDX_H</div><div class='add'>+</div><div class='add'>+#include "tdx_arch.h"</div><div class='add'>+#include "tdx_errno.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_KVM_INTEL_TDX</div><div class='add'>+#include "common.h"</div><div class='add'>+</div><div class='add'>+int tdx_bringup(void);</div><div class='add'>+void tdx_cleanup(void);</div><div class='add'>+</div><div class='add'>+extern bool enable_tdx;</div><div class='add'>+</div><div class='add'>+/* TDX module hardware states. These follow the TDX module OP_STATEs. */</div><div class='add'>+enum kvm_tdx_state {</div><div class='add'>+	TD_STATE_UNINITIALIZED = 0,</div><div class='add'>+	TD_STATE_INITIALIZED,</div><div class='add'>+	TD_STATE_RUNNABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvm_tdx {</div><div class='add'>+	struct kvm kvm;</div><div class='add'>+</div><div class='add'>+	struct misc_cg *misc_cg;</div><div class='add'>+	int hkid;</div><div class='add'>+	enum kvm_tdx_state state;</div><div class='add'>+</div><div class='add'>+	u64 attributes;</div><div class='add'>+	u64 xfam;</div><div class='add'>+</div><div class='add'>+	u64 tsc_offset;</div><div class='add'>+	u64 tsc_multiplier;</div><div class='add'>+</div><div class='add'>+	struct tdx_td td;</div><div class='add'>+</div><div class='add'>+	/* For KVM_TDX_INIT_MEM_REGION. */</div><div class='add'>+	atomic64_t nr_premapped;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Prevent vCPUs from TD entry to ensure SEPT zap related SEAMCALLs do</div><div class='add'>+	 * not contend with tdh_vp_enter() and TDCALLs.</div><div class='add'>+	 * Set/unset is protected with kvm-&gt;mmu_lock.</div><div class='add'>+	 */</div><div class='add'>+	bool wait_for_sept_zap;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TDX module vCPU states */</div><div class='add'>+enum vcpu_tdx_state {</div><div class='add'>+	VCPU_TD_STATE_UNINITIALIZED = 0,</div><div class='add'>+	VCPU_TD_STATE_INITIALIZED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vcpu_tdx {</div><div class='add'>+	struct kvm_vcpu	vcpu;</div><div class='add'>+	struct vcpu_vt vt;</div><div class='add'>+	u64 ext_exit_qualification;</div><div class='add'>+	gpa_t exit_gpa;</div><div class='add'>+	struct tdx_module_args vp_enter_args;</div><div class='add'>+</div><div class='add'>+	struct tdx_vp vp;</div><div class='add'>+</div><div class='add'>+	struct list_head cpu_list;</div><div class='add'>+</div><div class='add'>+	u64 vp_enter_ret;</div><div class='add'>+</div><div class='add'>+	enum vcpu_tdx_state state;</div><div class='add'>+	bool guest_entered;</div><div class='add'>+</div><div class='add'>+	u64 map_gpa_next;</div><div class='add'>+	u64 map_gpa_end;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void tdh_vp_rd_failed(struct vcpu_tdx *tdx, char *uclass, u32 field, u64 err);</div><div class='add'>+void tdh_vp_wr_failed(struct vcpu_tdx *tdx, char *uclass, char *op, u32 field,</div><div class='add'>+		      u64 val, u64 err);</div><div class='add'>+</div><div class='add'>+static __always_inline u64 td_tdcs_exec_read64(struct kvm_tdx *kvm_tdx, u32 field)</div><div class='add'>+{</div><div class='add'>+	u64 err, data;</div><div class='add'>+</div><div class='add'>+	err = tdh_mng_rd(&amp;kvm_tdx-&gt;td, TDCS_EXEC(field), &amp;data);</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		pr_err("TDH_MNG_RD[EXEC.0x%x] failed: 0x%llx\n", field, err);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void tdvps_vmcs_check(u32 field, u8 bits)</div><div class='add'>+{</div><div class='add'>+#define VMCS_ENC_ACCESS_TYPE_MASK	0x1UL</div><div class='add'>+#define VMCS_ENC_ACCESS_TYPE_FULL	0x0UL</div><div class='add'>+#define VMCS_ENC_ACCESS_TYPE_HIGH	0x1UL</div><div class='add'>+#define VMCS_ENC_ACCESS_TYPE(field)	((field) &amp; VMCS_ENC_ACCESS_TYPE_MASK)</div><div class='add'>+</div><div class='add'>+	/* TDX is 64bit only.  HIGH field isn't supported. */</div><div class='add'>+	BUILD_BUG_ON_MSG(__builtin_constant_p(field) &amp;&amp;</div><div class='add'>+			 VMCS_ENC_ACCESS_TYPE(field) == VMCS_ENC_ACCESS_TYPE_HIGH,</div><div class='add'>+			 "Read/Write to TD VMCS *_HIGH fields not supported");</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(bits != 16 &amp;&amp; bits != 32 &amp;&amp; bits != 64);</div><div class='add'>+</div><div class='add'>+#define VMCS_ENC_WIDTH_MASK	GENMASK(14, 13)</div><div class='add'>+#define VMCS_ENC_WIDTH_16BIT	(0UL &lt;&lt; 13)</div><div class='add'>+#define VMCS_ENC_WIDTH_64BIT	(1UL &lt;&lt; 13)</div><div class='add'>+#define VMCS_ENC_WIDTH_32BIT	(2UL &lt;&lt; 13)</div><div class='add'>+#define VMCS_ENC_WIDTH_NATURAL	(3UL &lt;&lt; 13)</div><div class='add'>+#define VMCS_ENC_WIDTH(field)	((field) &amp; VMCS_ENC_WIDTH_MASK)</div><div class='add'>+</div><div class='add'>+	/* TDX is 64bit only.  i.e. natural width = 64bit. */</div><div class='add'>+	BUILD_BUG_ON_MSG(bits != 64 &amp;&amp; __builtin_constant_p(field) &amp;&amp;</div><div class='add'>+			 (VMCS_ENC_WIDTH(field) == VMCS_ENC_WIDTH_64BIT ||</div><div class='add'>+			  VMCS_ENC_WIDTH(field) == VMCS_ENC_WIDTH_NATURAL),</div><div class='add'>+			 "Invalid TD VMCS access for 64-bit field");</div><div class='add'>+	BUILD_BUG_ON_MSG(bits != 32 &amp;&amp; __builtin_constant_p(field) &amp;&amp;</div><div class='add'>+			 VMCS_ENC_WIDTH(field) == VMCS_ENC_WIDTH_32BIT,</div><div class='add'>+			 "Invalid TD VMCS access for 32-bit field");</div><div class='add'>+	BUILD_BUG_ON_MSG(bits != 16 &amp;&amp; __builtin_constant_p(field) &amp;&amp;</div><div class='add'>+			 VMCS_ENC_WIDTH(field) == VMCS_ENC_WIDTH_16BIT,</div><div class='add'>+			 "Invalid TD VMCS access for 16-bit field");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline void tdvps_management_check(u64 field, u8 bits) {}</div><div class='add'>+static __always_inline void tdvps_state_non_arch_check(u64 field, u8 bits) {}</div><div class='add'>+</div><div class='add'>+#define TDX_BUILD_TDVPS_ACCESSORS(bits, uclass, lclass)				\</div><div class='add'>+static __always_inline u##bits td_##lclass##_read##bits(struct vcpu_tdx *tdx,	\</div><div class='add'>+							u32 field)		\</div><div class='add'>+{										\</div><div class='add'>+	u64 err, data;								\</div><div class='add'>+										\</div><div class='add'>+	tdvps_##lclass##_check(field, bits);					\</div><div class='add'>+	err = tdh_vp_rd(&amp;tdx-&gt;vp, TDVPS_##uclass(field), &amp;data);		\</div><div class='add'>+	if (unlikely(err)) {							\</div><div class='add'>+		tdh_vp_rd_failed(tdx, #uclass, field, err);			\</div><div class='add'>+		return 0;							\</div><div class='add'>+	}									\</div><div class='add'>+	return (u##bits)data;							\</div><div class='add'>+}										\</div><div class='add'>+static __always_inline void td_##lclass##_write##bits(struct vcpu_tdx *tdx,	\</div><div class='add'>+						      u32 field, u##bits val)	\</div><div class='add'>+{										\</div><div class='add'>+	u64 err;								\</div><div class='add'>+										\</div><div class='add'>+	tdvps_##lclass##_check(field, bits);					\</div><div class='add'>+	err = tdh_vp_wr(&amp;tdx-&gt;vp, TDVPS_##uclass(field), val,			\</div><div class='add'>+		      GENMASK_ULL(bits - 1, 0));				\</div><div class='add'>+	if (unlikely(err))							\</div><div class='add'>+		tdh_vp_wr_failed(tdx, #uclass, " = ", field, (u64)val, err);	\</div><div class='add'>+}										\</div><div class='add'>+static __always_inline void td_##lclass##_setbit##bits(struct vcpu_tdx *tdx,	\</div><div class='add'>+						       u32 field, u64 bit)	\</div><div class='add'>+{										\</div><div class='add'>+	u64 err;								\</div><div class='add'>+										\</div><div class='add'>+	tdvps_##lclass##_check(field, bits);					\</div><div class='add'>+	err = tdh_vp_wr(&amp;tdx-&gt;vp, TDVPS_##uclass(field), bit, bit);		\</div><div class='add'>+	if (unlikely(err))							\</div><div class='add'>+		tdh_vp_wr_failed(tdx, #uclass, " |= ", field, bit, err);	\</div><div class='add'>+}										\</div><div class='add'>+static __always_inline void td_##lclass##_clearbit##bits(struct vcpu_tdx *tdx,	\</div><div class='add'>+							 u32 field, u64 bit)	\</div><div class='add'>+{										\</div><div class='add'>+	u64 err;								\</div><div class='add'>+										\</div><div class='add'>+	tdvps_##lclass##_check(field, bits);					\</div><div class='add'>+	err = tdh_vp_wr(&amp;tdx-&gt;vp, TDVPS_##uclass(field), 0, bit);		\</div><div class='add'>+	if (unlikely(err))							\</div><div class='add'>+		tdh_vp_wr_failed(tdx, #uclass, " &amp;= ~", field, bit, err);\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+bool tdx_interrupt_allowed(struct kvm_vcpu *vcpu);</div><div class='add'>+int tdx_complete_emulated_msr(struct kvm_vcpu *vcpu, int err);</div><div class='add'>+</div><div class='add'>+TDX_BUILD_TDVPS_ACCESSORS(16, VMCS, vmcs);</div><div class='add'>+TDX_BUILD_TDVPS_ACCESSORS(32, VMCS, vmcs);</div><div class='add'>+TDX_BUILD_TDVPS_ACCESSORS(64, VMCS, vmcs);</div><div class='add'>+</div><div class='add'>+TDX_BUILD_TDVPS_ACCESSORS(8, MANAGEMENT, management);</div><div class='add'>+TDX_BUILD_TDVPS_ACCESSORS(64, STATE_NON_ARCH, state_non_arch);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+static inline int tdx_bringup(void) { return 0; }</div><div class='add'>+static inline void tdx_cleanup(void) {}</div><div class='add'>+</div><div class='add'>+#define enable_tdx	0</div><div class='add'>+</div><div class='add'>+struct kvm_tdx {</div><div class='add'>+	struct kvm kvm;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vcpu_tdx {</div><div class='add'>+	struct kvm_vcpu	vcpu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool tdx_interrupt_allowed(struct kvm_vcpu *vcpu) { return false; }</div><div class='add'>+static inline int tdx_complete_emulated_msr(struct kvm_vcpu *vcpu, int err) { return 0; }</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/arch/x86/kvm/vmx/tdx_arch.h b/arch/x86/kvm/vmx/tdx_arch.h<br/>new file mode 100644<br/>index 000000000000..a30e880849e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/tdx_arch.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/tdx_arch.h</a></div><div class='hunk'>@@ -0,0 +1,167 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* architectural constants/data definitions for TDX SEAMCALLs */</div><div class='add'>+</div><div class='add'>+#ifndef __KVM_X86_TDX_ARCH_H</div><div class='add'>+#define __KVM_X86_TDX_ARCH_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* TDX control structure (TDR/TDCS/TDVPS) field access codes */</div><div class='add'>+#define TDX_NON_ARCH			BIT_ULL(63)</div><div class='add'>+#define TDX_CLASS_SHIFT			56</div><div class='add'>+#define TDX_FIELD_MASK			GENMASK_ULL(31, 0)</div><div class='add'>+</div><div class='add'>+#define __BUILD_TDX_FIELD(non_arch, class, field)	\</div><div class='add'>+	(((non_arch) ? TDX_NON_ARCH : 0) |		\</div><div class='add'>+	 ((u64)(class) &lt;&lt; TDX_CLASS_SHIFT) |		\</div><div class='add'>+	 ((u64)(field) &amp; TDX_FIELD_MASK))</div><div class='add'>+</div><div class='add'>+#define BUILD_TDX_FIELD(class, field)			\</div><div class='add'>+	__BUILD_TDX_FIELD(false, (class), (field))</div><div class='add'>+</div><div class='add'>+#define BUILD_TDX_FIELD_NON_ARCH(class, field)		\</div><div class='add'>+	__BUILD_TDX_FIELD(true, (class), (field))</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Class code for TD */</div><div class='add'>+#define TD_CLASS_EXECUTION_CONTROLS	17ULL</div><div class='add'>+</div><div class='add'>+/* Class code for TDVPS */</div><div class='add'>+#define TDVPS_CLASS_VMCS		0ULL</div><div class='add'>+#define TDVPS_CLASS_GUEST_GPR		16ULL</div><div class='add'>+#define TDVPS_CLASS_OTHER_GUEST		17ULL</div><div class='add'>+#define TDVPS_CLASS_MANAGEMENT		32ULL</div><div class='add'>+</div><div class='add'>+enum tdx_tdcs_execution_control {</div><div class='add'>+	TD_TDCS_EXEC_TSC_OFFSET = 10,</div><div class='add'>+	TD_TDCS_EXEC_TSC_MULTIPLIER = 11,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum tdx_vcpu_guest_other_state {</div><div class='add'>+	TD_VCPU_STATE_DETAILS_NON_ARCH = 0x100,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define TDX_VCPU_STATE_DETAILS_INTR_PENDING	BIT_ULL(0)</div><div class='add'>+</div><div class='add'>+static inline bool tdx_vcpu_state_details_intr_pending(u64 vcpu_state_details)</div><div class='add'>+{</div><div class='add'>+	return !!(vcpu_state_details &amp; TDX_VCPU_STATE_DETAILS_INTR_PENDING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* @field is any of enum tdx_tdcs_execution_control */</div><div class='add'>+#define TDCS_EXEC(field)		BUILD_TDX_FIELD(TD_CLASS_EXECUTION_CONTROLS, (field))</div><div class='add'>+</div><div class='add'>+/* @field is the VMCS field encoding */</div><div class='add'>+#define TDVPS_VMCS(field)		BUILD_TDX_FIELD(TDVPS_CLASS_VMCS, (field))</div><div class='add'>+</div><div class='add'>+/* @field is any of enum tdx_guest_other_state */</div><div class='add'>+#define TDVPS_STATE(field)		BUILD_TDX_FIELD(TDVPS_CLASS_OTHER_GUEST, (field))</div><div class='add'>+#define TDVPS_STATE_NON_ARCH(field)	BUILD_TDX_FIELD_NON_ARCH(TDVPS_CLASS_OTHER_GUEST, (field))</div><div class='add'>+</div><div class='add'>+/* Management class fields */</div><div class='add'>+enum tdx_vcpu_guest_management {</div><div class='add'>+	TD_VCPU_PEND_NMI = 11,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* @field is any of enum tdx_vcpu_guest_management */</div><div class='add'>+#define TDVPS_MANAGEMENT(field)		BUILD_TDX_FIELD(TDVPS_CLASS_MANAGEMENT, (field))</div><div class='add'>+</div><div class='add'>+#define TDX_EXTENDMR_CHUNKSIZE		256</div><div class='add'>+</div><div class='add'>+struct tdx_cpuid_value {</div><div class='add'>+	u32 eax;</div><div class='add'>+	u32 ebx;</div><div class='add'>+	u32 ecx;</div><div class='add'>+	u32 edx;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define TDX_TD_ATTR_DEBUG		BIT_ULL(0)</div><div class='add'>+#define TDX_TD_ATTR_SEPT_VE_DISABLE	BIT_ULL(28)</div><div class='add'>+#define TDX_TD_ATTR_PKS			BIT_ULL(30)</div><div class='add'>+#define TDX_TD_ATTR_KL			BIT_ULL(31)</div><div class='add'>+#define TDX_TD_ATTR_PERFMON		BIT_ULL(63)</div><div class='add'>+</div><div class='add'>+#define TDX_EXT_EXIT_QUAL_TYPE_MASK	GENMASK(3, 0)</div><div class='add'>+#define TDX_EXT_EXIT_QUAL_TYPE_PENDING_EPT_VIOLATION  6</div><div class='add'>+/*</div><div class='add'>+ * TD_PARAMS is provided as an input to TDH_MNG_INIT, the size of which is 1024B.</div><div class='add'>+ */</div><div class='add'>+struct td_params {</div><div class='add'>+	u64 attributes;</div><div class='add'>+	u64 xfam;</div><div class='add'>+	u16 max_vcpus;</div><div class='add'>+	u8 reserved0[6];</div><div class='add'>+</div><div class='add'>+	u64 eptp_controls;</div><div class='add'>+	u64 config_flags;</div><div class='add'>+	u16 tsc_frequency;</div><div class='add'>+	u8  reserved1[38];</div><div class='add'>+</div><div class='add'>+	u64 mrconfigid[6];</div><div class='add'>+	u64 mrowner[6];</div><div class='add'>+	u64 mrownerconfig[6];</div><div class='add'>+	u64 reserved2[4];</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct tdx_cpuid_value, cpuid_values);</div><div class='add'>+		u8 reserved3[768];</div><div class='add'>+	};</div><div class='add'>+} __packed __aligned(1024);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Guest uses MAX_PA for GPAW when set.</div><div class='add'>+ * 0: GPA.SHARED bit is GPA[47]</div><div class='add'>+ * 1: GPA.SHARED bit is GPA[51]</div><div class='add'>+ */</div><div class='add'>+#define TDX_CONFIG_FLAGS_MAX_GPAW      BIT_ULL(0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TDH.VP.ENTER, TDG.VP.VMCALL preserves RBP</div><div class='add'>+ * 0: RBP can be used for TDG.VP.VMCALL input. RBP is clobbered.</div><div class='add'>+ * 1: RBP can't be used for TDG.VP.VMCALL input. RBP is preserved.</div><div class='add'>+ */</div><div class='add'>+#define TDX_CONFIG_FLAGS_NO_RBP_MOD	BIT_ULL(2)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TDX requires the frequency to be defined in units of 25MHz, which is the</div><div class='add'>+ * frequency of the core crystal clock on TDX-capable platforms, i.e. the TDX</div><div class='add'>+ * module can only program frequencies that are multiples of 25MHz.  The</div><div class='add'>+ * frequency must be between 100mhz and 10ghz (inclusive).</div><div class='add'>+ */</div><div class='add'>+#define TDX_TSC_KHZ_TO_25MHZ(tsc_in_khz)	((tsc_in_khz) / (25 * 1000))</div><div class='add'>+#define TDX_TSC_25MHZ_TO_KHZ(tsc_in_25mhz)	((tsc_in_25mhz) * (25 * 1000))</div><div class='add'>+#define TDX_MIN_TSC_FREQUENCY_KHZ		(100 * 1000)</div><div class='add'>+#define TDX_MAX_TSC_FREQUENCY_KHZ		(10 * 1000 * 1000)</div><div class='add'>+</div><div class='add'>+/* Additional Secure EPT entry information */</div><div class='add'>+#define TDX_SEPT_LEVEL_MASK		GENMASK_ULL(2, 0)</div><div class='add'>+#define TDX_SEPT_STATE_MASK		GENMASK_ULL(15, 8)</div><div class='add'>+#define TDX_SEPT_STATE_SHIFT		8</div><div class='add'>+</div><div class='add'>+enum tdx_sept_entry_state {</div><div class='add'>+	TDX_SEPT_FREE = 0,</div><div class='add'>+	TDX_SEPT_BLOCKED = 1,</div><div class='add'>+	TDX_SEPT_PENDING = 2,</div><div class='add'>+	TDX_SEPT_PENDING_BLOCKED = 3,</div><div class='add'>+	TDX_SEPT_PRESENT = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u8 tdx_get_sept_level(u64 sept_entry_info)</div><div class='add'>+{</div><div class='add'>+	return sept_entry_info &amp; TDX_SEPT_LEVEL_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 tdx_get_sept_state(u64 sept_entry_info)</div><div class='add'>+{</div><div class='add'>+	return (sept_entry_info &amp; TDX_SEPT_STATE_MASK) &gt;&gt; TDX_SEPT_STATE_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MD_FIELD_ID_FEATURES0_TOPOLOGY_ENUM	BIT_ULL(20)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TD scope metadata field ID.</div><div class='add'>+ */</div><div class='add'>+#define TD_MD_FIELD_ID_CPUID_VALUES		0x9410000300000000ULL</div><div class='add'>+</div><div class='add'>+#endif /* __KVM_X86_TDX_ARCH_H */</div><div class='head'>diff --git a/arch/x86/kvm/vmx/tdx_errno.h b/arch/x86/kvm/vmx/tdx_errno.h<br/>new file mode 100644<br/>index 000000000000..6ff4672c4181<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/tdx_errno.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/tdx_errno.h</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* architectural status code for SEAMCALL */</div><div class='add'>+</div><div class='add'>+#ifndef __KVM_X86_TDX_ERRNO_H</div><div class='add'>+#define __KVM_X86_TDX_ERRNO_H</div><div class='add'>+</div><div class='add'>+#define TDX_SEAMCALL_STATUS_MASK		0xFFFFFFFF00000000ULL</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TDX SEAMCALL Status Codes (returned in RAX)</div><div class='add'>+ */</div><div class='add'>+#define TDX_NON_RECOVERABLE_VCPU		0x4000000100000000ULL</div><div class='add'>+#define TDX_NON_RECOVERABLE_TD			0x4000000200000000ULL</div><div class='add'>+#define TDX_NON_RECOVERABLE_TD_NON_ACCESSIBLE	0x6000000500000000ULL</div><div class='add'>+#define TDX_NON_RECOVERABLE_TD_WRONG_APIC_MODE	0x6000000700000000ULL</div><div class='add'>+#define TDX_INTERRUPTED_RESUMABLE		0x8000000300000000ULL</div><div class='add'>+#define TDX_OPERAND_INVALID			0xC000010000000000ULL</div><div class='add'>+#define TDX_OPERAND_BUSY			0x8000020000000000ULL</div><div class='add'>+#define TDX_PREVIOUS_TLB_EPOCH_BUSY		0x8000020100000000ULL</div><div class='add'>+#define TDX_PAGE_METADATA_INCORRECT		0xC000030000000000ULL</div><div class='add'>+#define TDX_VCPU_NOT_ASSOCIATED			0x8000070200000000ULL</div><div class='add'>+#define TDX_KEY_GENERATION_FAILED		0x8000080000000000ULL</div><div class='add'>+#define TDX_KEY_STATE_INCORRECT			0xC000081100000000ULL</div><div class='add'>+#define TDX_KEY_CONFIGURED			0x0000081500000000ULL</div><div class='add'>+#define TDX_NO_HKID_READY_TO_WBCACHE		0x0000082100000000ULL</div><div class='add'>+#define TDX_FLUSHVP_NOT_DONE			0x8000082400000000ULL</div><div class='add'>+#define TDX_EPT_WALK_FAILED			0xC0000B0000000000ULL</div><div class='add'>+#define TDX_EPT_ENTRY_STATE_INCORRECT		0xC0000B0D00000000ULL</div><div class='add'>+#define TDX_METADATA_FIELD_NOT_READABLE		0xC0000C0200000000ULL</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TDX module operand ID, appears in 31:0 part of error code as</div><div class='add'>+ * detail information</div><div class='add'>+ */</div><div class='add'>+#define TDX_OPERAND_ID_RCX			0x01</div><div class='add'>+#define TDX_OPERAND_ID_TDR			0x80</div><div class='add'>+#define TDX_OPERAND_ID_SEPT			0x92</div><div class='add'>+#define TDX_OPERAND_ID_TD_EPOCH			0xa9</div><div class='add'>+</div><div class='add'>+#endif /* __KVM_X86_TDX_ERRNO_H */</div><div class='head'>diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c<br/>index 5c5766467a61..b12414108cbf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/vmx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/vmx.c</a></div><div class='hunk'>@@ -46,6 +46,7 @@</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/mshyperv.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='ctx'> #include &lt;asm/spec-ctrl.h&gt;</div><div class='ctx'> #include &lt;asm/vmx.h&gt;</div><div class='hunk'>@@ -53,6 +54,7 @@</div><div class='ctx'> #include &lt;trace/events/ipi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "capabilities.h"</div><div class='add'>+#include "common.h"</div><div class='ctx'> #include "cpuid.h"</div><div class='ctx'> #include "hyperv.h"</div><div class='ctx'> #include "kvm_onhyperv.h"</div><div class='hunk'>@@ -273,6 +275,7 @@ static int vmx_setup_l1d_flush(enum vmx_l1d_flush_state l1tf)</div><div class='ctx'> 		case L1TF_MITIGATION_OFF:</div><div class='ctx'> 			l1tf = VMENTER_L1D_FLUSH_NEVER;</div><div class='ctx'> 			break;</div><div class='add'>+		case L1TF_MITIGATION_AUTO:</div><div class='ctx'> 		case L1TF_MITIGATION_FLUSH_NOWARN:</div><div class='ctx'> 		case L1TF_MITIGATION_FLUSH:</div><div class='ctx'> 		case L1TF_MITIGATION_FLUSH_NOSMT:</div><div class='hunk'>@@ -380,9 +383,9 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)</div><div class='ctx'> 	if (!vmx-&gt;disable_fb_clear)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	msr = __rdmsr(MSR_IA32_MCU_OPT_CTRL);</div><div class='add'>+	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);</div><div class='ctx'> 	msr |= FB_CLEAR_DIS;</div><div class='del'>-	native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, msr);</div><div class='add'>+	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);</div><div class='ctx'> 	/* Cache the MSR value to avoid reading it later */</div><div class='ctx'> 	vmx-&gt;msr_ia32_mcu_opt_ctrl = msr;</div><div class='ctx'> }</div><div class='hunk'>@@ -393,7 +396,7 @@ static __always_inline void vmx_enable_fb_clear(struct vcpu_vmx *vmx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vmx-&gt;msr_ia32_mcu_opt_ctrl &amp;= ~FB_CLEAR_DIS;</div><div class='del'>-	native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, vmx-&gt;msr_ia32_mcu_opt_ctrl);</div><div class='add'>+	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, vmx-&gt;msr_ia32_mcu_opt_ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vmx_update_fb_clear_dis(struct kvm_vcpu *vcpu, struct vcpu_vmx *vmx)</div><div class='hunk'>@@ -1063,7 +1066,7 @@ static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,</div><div class='ctx'> 		 * provide that period, so a CPU could write host's record into</div><div class='ctx'> 		 * guest's memory.</div><div class='ctx'> 		 */</div><div class='del'>-		wrmsrl(MSR_IA32_PEBS_ENABLE, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_PEBS_ENABLE, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	i = vmx_find_loadstore_msr_slot(&amp;m-&gt;guest, msr);</div><div class='hunk'>@@ -1192,13 +1195,13 @@ static inline void pt_load_msr(struct pt_ctx *ctx, u32 addr_range)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_RTIT_STATUS, ctx-&gt;status);</div><div class='del'>-	wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx-&gt;output_base);</div><div class='del'>-	wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx-&gt;output_mask);</div><div class='del'>-	wrmsrl(MSR_IA32_RTIT_CR3_MATCH, ctx-&gt;cr3_match);</div><div class='add'>+	wrmsrq(MSR_IA32_RTIT_STATUS, ctx-&gt;status);</div><div class='add'>+	wrmsrq(MSR_IA32_RTIT_OUTPUT_BASE, ctx-&gt;output_base);</div><div class='add'>+	wrmsrq(MSR_IA32_RTIT_OUTPUT_MASK, ctx-&gt;output_mask);</div><div class='add'>+	wrmsrq(MSR_IA32_RTIT_CR3_MATCH, ctx-&gt;cr3_match);</div><div class='ctx'> 	for (i = 0; i &lt; addr_range; i++) {</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx-&gt;addr_a[i]);</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx-&gt;addr_b[i]);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx-&gt;addr_a[i]);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx-&gt;addr_b[i]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1206,13 +1209,13 @@ static inline void pt_save_msr(struct pt_ctx *ctx, u32 addr_range)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_STATUS, ctx-&gt;status);</div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx-&gt;output_base);</div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx-&gt;output_mask);</div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_CR3_MATCH, ctx-&gt;cr3_match);</div><div class='add'>+	rdmsrq(MSR_IA32_RTIT_STATUS, ctx-&gt;status);</div><div class='add'>+	rdmsrq(MSR_IA32_RTIT_OUTPUT_BASE, ctx-&gt;output_base);</div><div class='add'>+	rdmsrq(MSR_IA32_RTIT_OUTPUT_MASK, ctx-&gt;output_mask);</div><div class='add'>+	rdmsrq(MSR_IA32_RTIT_CR3_MATCH, ctx-&gt;cr3_match);</div><div class='ctx'> 	for (i = 0; i &lt; addr_range; i++) {</div><div class='del'>-		rdmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx-&gt;addr_a[i]);</div><div class='del'>-		rdmsrl(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx-&gt;addr_b[i]);</div><div class='add'>+		rdmsrq(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx-&gt;addr_a[i]);</div><div class='add'>+		rdmsrq(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx-&gt;addr_b[i]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1225,9 +1228,9 @@ static void pt_guest_enter(struct vcpu_vmx *vmx)</div><div class='ctx'> 	 * GUEST_IA32_RTIT_CTL is already set in the VMCS.</div><div class='ctx'> 	 * Save host state before VM entry.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_IA32_RTIT_CTL, vmx-&gt;pt_desc.host.ctl);</div><div class='add'>+	rdmsrq(MSR_IA32_RTIT_CTL, vmx-&gt;pt_desc.host.ctl);</div><div class='ctx'> 	if (vmx-&gt;pt_desc.guest.ctl &amp; RTIT_CTL_TRACEEN) {</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_CTL, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_CTL, 0);</div><div class='ctx'> 		pt_save_msr(&amp;vmx-&gt;pt_desc.host, vmx-&gt;pt_desc.num_address_ranges);</div><div class='ctx'> 		pt_load_msr(&amp;vmx-&gt;pt_desc.guest, vmx-&gt;pt_desc.num_address_ranges);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1248,7 +1251,7 @@ static void pt_guest_exit(struct vcpu_vmx *vmx)</div><div class='ctx'> 	 * i.e. RTIT_CTL is always cleared on VM-Exit.  Restore it if necessary.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (vmx-&gt;pt_desc.host.ctl)</div><div class='del'>-		wrmsrl(MSR_IA32_RTIT_CTL, vmx-&gt;pt_desc.host.ctl);</div><div class='add'>+		wrmsrq(MSR_IA32_RTIT_CTL, vmx-&gt;pt_desc.host.ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vmx_set_host_fs_gs(struct vmcs_host_state *host, u16 fs_sel, u16 gs_sel,</div><div class='hunk'>@@ -1281,6 +1284,7 @@ void vmx_set_host_fs_gs(struct vmcs_host_state *host, u16 fs_sel, u16 gs_sel,</div><div class='ctx'> void vmx_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='ctx'> 	struct vmcs_host_state *host_state;</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> 	int cpu = raw_smp_processor_id();</div><div class='hunk'>@@ -1309,7 +1313,7 @@ void vmx_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (vmx-&gt;nested.need_vmcs12_to_shadow_sync)</div><div class='ctx'> 		nested_sync_vmcs12_to_shadow(vcpu);</div><div class='ctx'> </div><div class='del'>-	if (vmx-&gt;guest_state_loaded)</div><div class='add'>+	if (vt-&gt;guest_state_loaded)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	host_state = &amp;vmx-&gt;loaded_vmcs-&gt;host_state;</div><div class='hunk'>@@ -1330,15 +1334,15 @@ void vmx_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		fs_sel = current-&gt;thread.fsindex;</div><div class='ctx'> 		gs_sel = current-&gt;thread.gsindex;</div><div class='ctx'> 		fs_base = current-&gt;thread.fsbase;</div><div class='del'>-		vmx-&gt;msr_host_kernel_gs_base = current-&gt;thread.gsbase;</div><div class='add'>+		vt-&gt;msr_host_kernel_gs_base = current-&gt;thread.gsbase;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		savesegment(fs, fs_sel);</div><div class='ctx'> 		savesegment(gs, gs_sel);</div><div class='ctx'> 		fs_base = read_msr(MSR_FS_BASE);</div><div class='del'>-		vmx-&gt;msr_host_kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE);</div><div class='add'>+		vt-&gt;msr_host_kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_KERNEL_GS_BASE, vmx-&gt;msr_guest_kernel_gs_base);</div><div class='add'>+	wrmsrq(MSR_KERNEL_GS_BASE, vmx-&gt;msr_guest_kernel_gs_base);</div><div class='ctx'> #else</div><div class='ctx'> 	savesegment(fs, fs_sel);</div><div class='ctx'> 	savesegment(gs, gs_sel);</div><div class='hunk'>@@ -1347,14 +1351,14 @@ void vmx_prepare_switch_to_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	vmx_set_host_fs_gs(host_state, fs_sel, gs_sel, fs_base, gs_base);</div><div class='del'>-	vmx-&gt;guest_state_loaded = true;</div><div class='add'>+	vt-&gt;guest_state_loaded = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vmx_prepare_switch_to_host(struct vcpu_vmx *vmx)</div><div class='ctx'> {</div><div class='ctx'> 	struct vmcs_host_state *host_state;</div><div class='ctx'> </div><div class='del'>-	if (!vmx-&gt;guest_state_loaded)</div><div class='add'>+	if (!vmx-&gt;vt.guest_state_loaded)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	host_state = &amp;vmx-&gt;loaded_vmcs-&gt;host_state;</div><div class='hunk'>@@ -1362,7 +1366,7 @@ static void vmx_prepare_switch_to_host(struct vcpu_vmx *vmx)</div><div class='ctx'> 	++vmx-&gt;vcpu.stat.host_state_reload;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	rdmsrl(MSR_KERNEL_GS_BASE, vmx-&gt;msr_guest_kernel_gs_base);</div><div class='add'>+	rdmsrq(MSR_KERNEL_GS_BASE, vmx-&gt;msr_guest_kernel_gs_base);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (host_state-&gt;ldt_sel || (host_state-&gt;gs_sel &amp; 7)) {</div><div class='ctx'> 		kvm_load_ldt(host_state-&gt;ldt_sel);</div><div class='hunk'>@@ -1382,10 +1386,10 @@ static void vmx_prepare_switch_to_host(struct vcpu_vmx *vmx)</div><div class='ctx'> #endif</div><div class='ctx'> 	invalidate_tss_limit();</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	wrmsrl(MSR_KERNEL_GS_BASE, vmx-&gt;msr_host_kernel_gs_base);</div><div class='add'>+	wrmsrq(MSR_KERNEL_GS_BASE, vmx-&gt;vt.msr_host_kernel_gs_base);</div><div class='ctx'> #endif</div><div class='ctx'> 	load_fixmap_gdt(raw_smp_processor_id());</div><div class='del'>-	vmx-&gt;guest_state_loaded = false;</div><div class='add'>+	vmx-&gt;vt.guest_state_loaded = false;</div><div class='ctx'> 	vmx-&gt;guest_uret_msrs_loaded = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1393,8 +1397,8 @@ static void vmx_prepare_switch_to_host(struct vcpu_vmx *vmx)</div><div class='ctx'> static u64 vmx_read_guest_kernel_gs_base(struct vcpu_vmx *vmx)</div><div class='ctx'> {</div><div class='ctx'> 	preempt_disable();</div><div class='del'>-	if (vmx-&gt;guest_state_loaded)</div><div class='del'>-		rdmsrl(MSR_KERNEL_GS_BASE, vmx-&gt;msr_guest_kernel_gs_base);</div><div class='add'>+	if (vmx-&gt;vt.guest_state_loaded)</div><div class='add'>+		rdmsrq(MSR_KERNEL_GS_BASE, vmx-&gt;msr_guest_kernel_gs_base);</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> 	return vmx-&gt;msr_guest_kernel_gs_base;</div><div class='ctx'> }</div><div class='hunk'>@@ -1402,8 +1406,8 @@ static u64 vmx_read_guest_kernel_gs_base(struct vcpu_vmx *vmx)</div><div class='ctx'> static void vmx_write_guest_kernel_gs_base(struct vcpu_vmx *vmx, u64 data)</div><div class='ctx'> {</div><div class='ctx'> 	preempt_disable();</div><div class='del'>-	if (vmx-&gt;guest_state_loaded)</div><div class='del'>-		wrmsrl(MSR_KERNEL_GS_BASE, data);</div><div class='add'>+	if (vmx-&gt;vt.guest_state_loaded)</div><div class='add'>+		wrmsrq(MSR_KERNEL_GS_BASE, data);</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> 	vmx-&gt;msr_guest_kernel_gs_base = data;</div><div class='ctx'> }</div><div class='hunk'>@@ -1579,7 +1583,7 @@ void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)</div><div class='ctx'> 	vmcs_writel(GUEST_RFLAGS, rflags);</div><div class='ctx'> </div><div class='ctx'> 	if ((old_rflags ^ vmx-&gt;rflags) &amp; X86_EFLAGS_VM)</div><div class='del'>-		vmx-&gt;emulation_required = vmx_emulation_required(vcpu);</div><div class='add'>+		vmx-&gt;vt.emulation_required = vmx_emulation_required(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool vmx_get_if_flag(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -1699,7 +1703,7 @@ int vmx_check_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type,</div><div class='ctx'> 	 * so that guest userspace can't DoS the guest simply by triggering</div><div class='ctx'> 	 * emulation (enclaves are CPL3 only).</div><div class='ctx'> 	 */</div><div class='del'>-	if (to_vmx(vcpu)-&gt;exit_reason.enclave_mode) {</div><div class='add'>+	if (vmx_get_exit_reason(vcpu).enclave_mode) {</div><div class='ctx'> 		kvm_queue_exception(vcpu, UD_VECTOR);</div><div class='ctx'> 		return X86EMUL_PROPAGATE_FAULT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1714,7 +1718,7 @@ int vmx_check_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type,</div><div class='ctx'> </div><div class='ctx'> static int skip_emulated_instruction(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	union vmx_exit_reason exit_reason = to_vmx(vcpu)-&gt;exit_reason;</div><div class='add'>+	union vmx_exit_reason exit_reason = vmx_get_exit_reason(vcpu);</div><div class='ctx'> 	unsigned long rip, orig_rip;</div><div class='ctx'> 	u32 instr_len;</div><div class='ctx'> </div><div class='hunk'>@@ -1861,7 +1865,7 @@ void vmx_inject_exception(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	WARN_ON_ONCE(vmx-&gt;emulation_required);</div><div class='add'>+	WARN_ON_ONCE(vmx-&gt;vt.emulation_required);</div><div class='ctx'> </div><div class='ctx'> 	if (kvm_exception_is_soft(ex-&gt;vector)) {</div><div class='ctx'> 		vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,</div><div class='hunk'>@@ -2574,7 +2578,7 @@ static u64 adjust_vmx_controls64(u64 ctl_opt, u32 msr)</div><div class='ctx'> {</div><div class='ctx'> 	u64 allowed;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(msr, allowed);</div><div class='add'>+	rdmsrq(msr, allowed);</div><div class='ctx'> </div><div class='ctx'> 	return  ctl_opt &amp; allowed;</div><div class='ctx'> }</div><div class='hunk'>@@ -2746,7 +2750,7 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_VMX_BASIC, basic_msr);</div><div class='add'>+	rdmsrq(MSR_IA32_VMX_BASIC, basic_msr);</div><div class='ctx'> </div><div class='ctx'> 	/* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */</div><div class='ctx'> 	if (vmx_basic_vmcs_size(basic_msr) &gt; PAGE_SIZE)</div><div class='hunk'>@@ -2766,7 +2770,7 @@ static int setup_vmcs_config(struct vmcs_config *vmcs_conf,</div><div class='ctx'> 	if (vmx_basic_vmcs_mem_type(basic_msr) != X86_MEMTYPE_WB)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_VMX_MISC, misc_msr);</div><div class='add'>+	rdmsrq(MSR_IA32_VMX_MISC, misc_msr);</div><div class='ctx'> </div><div class='ctx'> 	vmcs_conf-&gt;basic = basic_msr;</div><div class='ctx'> 	vmcs_conf-&gt;pin_based_exec_ctrl = _pin_based_exec_control;</div><div class='hunk'>@@ -2850,7 +2854,7 @@ static int kvm_cpu_vmxon(u64 vmxon_pointer)</div><div class='ctx'> </div><div class='ctx'> fault:</div><div class='ctx'> 	WARN_ONCE(1, "VMXON faulted, MSR_IA32_FEAT_CTL (0x3a) = 0x%llx\n",</div><div class='del'>-		  rdmsrl_safe(MSR_IA32_FEAT_CTL, &amp;msr) ? 0xdeadbeef : msr);</div><div class='add'>+		  rdmsrq_safe(MSR_IA32_FEAT_CTL, &amp;msr) ? 0xdeadbeef : msr);</div><div class='ctx'> 	cr4_clear_bits(X86_CR4_VMXE);</div><div class='ctx'> </div><div class='ctx'> 	return -EFAULT;</div><div class='hunk'>@@ -3404,7 +3408,7 @@ void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* depends on vcpu-&gt;arch.cr0 to be set to a new value */</div><div class='del'>-	vmx-&gt;emulation_required = vmx_emulation_required(vcpu);</div><div class='add'>+	vmx-&gt;vt.emulation_required = vmx_emulation_required(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vmx_get_max_ept_level(void)</div><div class='hunk'>@@ -3667,7 +3671,7 @@ void vmx_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg)</div><div class='ctx'> {</div><div class='ctx'> 	__vmx_set_segment(vcpu, var, seg);</div><div class='ctx'> </div><div class='del'>-	to_vmx(vcpu)-&gt;emulation_required = vmx_emulation_required(vcpu);</div><div class='add'>+	to_vmx(vcpu)-&gt;vt.emulation_required = vmx_emulation_required(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)</div><div class='hunk'>@@ -4195,50 +4199,6 @@ void vmx_msr_filter_changed(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		pt_update_intercept_for_msr(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu,</div><div class='del'>-						     int pi_vec)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_SMP</div><div class='del'>-	if (vcpu-&gt;mode == IN_GUEST_MODE) {</div><div class='del'>-		/*</div><div class='del'>-		 * The vector of the virtual has already been set in the PIR.</div><div class='del'>-		 * Send a notification event to deliver the virtual interrupt</div><div class='del'>-		 * unless the vCPU is the currently running vCPU, i.e. the</div><div class='del'>-		 * event is being sent from a fastpath VM-Exit handler, in</div><div class='del'>-		 * which case the PIR will be synced to the vIRR before</div><div class='del'>-		 * re-entering the guest.</div><div class='del'>-		 *</div><div class='del'>-		 * When the target is not the running vCPU, the following</div><div class='del'>-		 * possibilities emerge:</div><div class='del'>-		 *</div><div class='del'>-		 * Case 1: vCPU stays in non-root mode. Sending a notification</div><div class='del'>-		 * event posts the interrupt to the vCPU.</div><div class='del'>-		 *</div><div class='del'>-		 * Case 2: vCPU exits to root mode and is still runnable. The</div><div class='del'>-		 * PIR will be synced to the vIRR before re-entering the guest.</div><div class='del'>-		 * Sending a notification event is ok as the host IRQ handler</div><div class='del'>-		 * will ignore the spurious event.</div><div class='del'>-		 *</div><div class='del'>-		 * Case 3: vCPU exits to root mode and is blocked. vcpu_block()</div><div class='del'>-		 * has already synced PIR to vIRR and never blocks the vCPU if</div><div class='del'>-		 * the vIRR is not empty. Therefore, a blocked vCPU here does</div><div class='del'>-		 * not wait for any requested interrupts in PIR, and sending a</div><div class='del'>-		 * notification event also results in a benign, spurious event.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		if (vcpu != kvm_get_running_vcpu())</div><div class='del'>-			__apic_send_IPI_mask(get_cpu_mask(vcpu-&gt;cpu), pi_vec);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	/*</div><div class='del'>-	 * The vCPU isn't in the guest; wake the vCPU in case it is blocking,</div><div class='del'>-	 * otherwise do nothing as KVM will grab the highest priority pending</div><div class='del'>-	 * IRQ via -&gt;sync_pir_to_irr() in vcpu_enter_guest().</div><div class='del'>-	 */</div><div class='del'>-	kvm_vcpu_wake_up(vcpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,</div><div class='ctx'> 						int vector)</div><div class='ctx'> {</div><div class='hunk'>@@ -4287,7 +4247,7 @@ static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,</div><div class='ctx'>  */</div><div class='ctx'> static int vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector)</div><div class='ctx'> {</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	r = vmx_deliver_nested_posted_interrupt(vcpu, vector);</div><div class='hunk'>@@ -4298,20 +4258,7 @@ static int vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector)</div><div class='ctx'> 	if (!vcpu-&gt;arch.apic-&gt;apicv_active)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	if (pi_test_and_set_pir(vector, &amp;vmx-&gt;pi_desc))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* If a previous notification has sent the IPI, nothing to do.  */</div><div class='del'>-	if (pi_test_and_set_on(&amp;vmx-&gt;pi_desc))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The implied barrier in pi_test_and_set_on() pairs with the smp_mb_*()</div><div class='del'>-	 * after setting vcpu-&gt;mode in vcpu_enter_guest(), thus the vCPU is</div><div class='del'>-	 * guaranteed to see PID.ON=1 and sync the PIR to IRR if triggering a</div><div class='del'>-	 * posted interrupt "fails" because vcpu-&gt;mode != IN_GUEST_MODE.</div><div class='del'>-	 */</div><div class='del'>-	kvm_vcpu_trigger_posted_interrupt(vcpu, POSTED_INTR_VECTOR);</div><div class='add'>+	__vmx_deliver_posted_interrupt(vcpu, &amp;vt-&gt;pi_desc, vector);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4391,7 +4338,7 @@ void vmx_set_constant_host_state(struct vcpu_vmx *vmx)</div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_IA32_EMULATION) &amp;&amp; !IS_ENABLED(CONFIG_X86_32))</div><div class='ctx'> 		vmcs_writel(HOST_IA32_SYSENTER_ESP, 0);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);</div><div class='add'>+	rdmsrq(MSR_IA32_SYSENTER_EIP, tmpl);</div><div class='ctx'> 	vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl);   /* 22.2.3 */</div><div class='ctx'> </div><div class='ctx'> 	if (vmcs_config.vmexit_ctrl &amp; VM_EXIT_LOAD_IA32_PAT) {</div><div class='hunk'>@@ -4778,7 +4725,7 @@ static void init_vmcs(struct vcpu_vmx *vmx)</div><div class='ctx'> 		vmcs_write16(GUEST_INTR_STATUS, 0);</div><div class='ctx'> </div><div class='ctx'> 		vmcs_write16(POSTED_INTR_NV, POSTED_INTR_VECTOR);</div><div class='del'>-		vmcs_write64(POSTED_INTR_DESC_ADDR, __pa((&amp;vmx-&gt;pi_desc)));</div><div class='add'>+		vmcs_write64(POSTED_INTR_DESC_ADDR, __pa((&amp;vmx-&gt;vt.pi_desc)));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vmx_can_use_ipiv(&amp;vmx-&gt;vcpu)) {</div><div class='hunk'>@@ -4891,8 +4838,8 @@ static void __vmx_vcpu_reset(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * Enforce invariant: pi_desc.nv is always either POSTED_INTR_VECTOR</div><div class='ctx'> 	 * or POSTED_INTR_WAKEUP_VECTOR.</div><div class='ctx'> 	 */</div><div class='del'>-	vmx-&gt;pi_desc.nv = POSTED_INTR_VECTOR;</div><div class='del'>-	__pi_set_sn(&amp;vmx-&gt;pi_desc);</div><div class='add'>+	vmx-&gt;vt.pi_desc.nv = POSTED_INTR_VECTOR;</div><div class='add'>+	__pi_set_sn(&amp;vmx-&gt;vt.pi_desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)</div><div class='hunk'>@@ -5809,11 +5756,8 @@ static int handle_task_switch(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> static int handle_ept_violation(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	unsigned long exit_qualification;</div><div class='add'>+	unsigned long exit_qualification = vmx_get_exit_qual(vcpu);</div><div class='ctx'> 	gpa_t gpa;</div><div class='del'>-	u64 error_code;</div><div class='del'>-</div><div class='del'>-	exit_qualification = vmx_get_exit_qual(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * EPT violation happened while executing iret from NMI,</div><div class='hunk'>@@ -5829,23 +5773,6 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);</div><div class='ctx'> 	trace_kvm_page_fault(vcpu, gpa, exit_qualification);</div><div class='ctx'> </div><div class='del'>-	/* Is it a read fault? */</div><div class='del'>-	error_code = (exit_qualification &amp; EPT_VIOLATION_ACC_READ)</div><div class='del'>-		     ? PFERR_USER_MASK : 0;</div><div class='del'>-	/* Is it a write fault? */</div><div class='del'>-	error_code |= (exit_qualification &amp; EPT_VIOLATION_ACC_WRITE)</div><div class='del'>-		      ? PFERR_WRITE_MASK : 0;</div><div class='del'>-	/* Is it a fetch fault? */</div><div class='del'>-	error_code |= (exit_qualification &amp; EPT_VIOLATION_ACC_INSTR)</div><div class='del'>-		      ? PFERR_FETCH_MASK : 0;</div><div class='del'>-	/* ept page table entry is present? */</div><div class='del'>-	error_code |= (exit_qualification &amp; EPT_VIOLATION_PROT_MASK)</div><div class='del'>-		      ? PFERR_PRESENT_MASK : 0;</div><div class='del'>-</div><div class='del'>-	if (error_code &amp; EPT_VIOLATION_GVA_IS_VALID)</div><div class='del'>-		error_code |= (exit_qualification &amp; EPT_VIOLATION_GVA_TRANSLATED) ?</div><div class='del'>-			      PFERR_GUEST_FINAL_MASK : PFERR_GUEST_PAGE_MASK;</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Check that the GPA doesn't exceed physical memory limits, as that is</div><div class='ctx'> 	 * a guest page fault.  We have to emulate the instruction here, because</div><div class='hunk'>@@ -5857,7 +5784,7 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (unlikely(allow_smaller_maxphyaddr &amp;&amp; !kvm_vcpu_is_legal_gpa(vcpu, gpa)))</div><div class='ctx'> 		return kvm_emulate_instruction(vcpu, 0);</div><div class='ctx'> </div><div class='del'>-	return kvm_mmu_page_fault(vcpu, gpa, error_code, NULL, 0);</div><div class='add'>+	return __vmx_handle_ept_violation(vcpu, gpa, exit_qualification);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int handle_ept_misconfig(struct kvm_vcpu *vcpu)</div><div class='hunk'>@@ -5902,7 +5829,7 @@ static bool vmx_unhandleable_emulation_required(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='ctx'> </div><div class='del'>-	if (!vmx-&gt;emulation_required)</div><div class='add'>+	if (!vmx-&gt;vt.emulation_required)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -5934,7 +5861,7 @@ static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	intr_window_requested = exec_controls_get(vmx) &amp;</div><div class='ctx'> 				CPU_BASED_INTR_WINDOW_EXITING;</div><div class='ctx'> </div><div class='del'>-	while (vmx-&gt;emulation_required &amp;&amp; count-- != 0) {</div><div class='add'>+	while (vmx-&gt;vt.emulation_required &amp;&amp; count-- != 0) {</div><div class='ctx'> 		if (intr_window_requested &amp;&amp; !vmx_interrupt_blocked(vcpu))</div><div class='ctx'> 			return handle_interrupt_window(&amp;vmx-&gt;vcpu);</div><div class='ctx'> </div><div class='hunk'>@@ -6129,7 +6056,7 @@ static int handle_bus_lock_vmexit(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * VM-Exits. Unconditionally set the flag here and leave the handling to</div><div class='ctx'> 	 * vmx_handle_exit().</div><div class='ctx'> 	 */</div><div class='del'>-	to_vmx(vcpu)-&gt;exit_reason.bus_lock_detected = true;</div><div class='add'>+	to_vt(vcpu)-&gt;exit_reason.bus_lock_detected = true;</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6227,9 +6154,9 @@ void vmx_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason,</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='ctx'> </div><div class='del'>-	*reason = vmx-&gt;exit_reason.full;</div><div class='add'>+	*reason = vmx-&gt;vt.exit_reason.full;</div><div class='ctx'> 	*info1 = vmx_get_exit_qual(vcpu);</div><div class='del'>-	if (!(vmx-&gt;exit_reason.failed_vmentry)) {</div><div class='add'>+	if (!(vmx-&gt;vt.exit_reason.failed_vmentry)) {</div><div class='ctx'> 		*info2 = vmx-&gt;idt_vectoring_info;</div><div class='ctx'> 		*intr_info = vmx_get_intr_info(vcpu);</div><div class='ctx'> 		if (is_exception_with_error_code(*intr_info))</div><div class='hunk'>@@ -6525,7 +6452,7 @@ void dump_vmcs(struct kvm_vcpu *vcpu)</div><div class='ctx'> static int __vmx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t exit_fastpath)</div><div class='ctx'> {</div><div class='ctx'> 	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='del'>-	union vmx_exit_reason exit_reason = vmx-&gt;exit_reason;</div><div class='add'>+	union vmx_exit_reason exit_reason = vmx_get_exit_reason(vcpu);</div><div class='ctx'> 	u32 vectoring_info = vmx-&gt;idt_vectoring_info;</div><div class='ctx'> 	u16 exit_handler_index;</div><div class='ctx'> </div><div class='hunk'>@@ -6581,7 +6508,7 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t exit_fastpath)</div><div class='ctx'> 		 * the least awful solution for the userspace case without</div><div class='ctx'> 		 * risking false positives.</div><div class='ctx'> 		 */</div><div class='del'>-		if (vmx-&gt;emulation_required) {</div><div class='add'>+		if (vmx-&gt;vt.emulation_required) {</div><div class='ctx'> 			nested_vmx_vmexit(vcpu, EXIT_REASON_TRIPLE_FAULT, 0, 0);</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -6591,7 +6518,7 @@ static int __vmx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t exit_fastpath)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If guest state is invalid, start emulating.  L2 is handled above. */</div><div class='del'>-	if (vmx-&gt;emulation_required)</div><div class='add'>+	if (vmx-&gt;vt.emulation_required)</div><div class='ctx'> 		return handle_invalid_guest_state(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (exit_reason.failed_vmentry) {</div><div class='hunk'>@@ -6691,7 +6618,7 @@ int vmx_handle_exit(struct kvm_vcpu *vcpu, fastpath_t exit_fastpath)</div><div class='ctx'> 	 * Exit to user space when bus lock detected to inform that there is</div><div class='ctx'> 	 * a bus lock in guest.</div><div class='ctx'> 	 */</div><div class='del'>-	if (to_vmx(vcpu)-&gt;exit_reason.bus_lock_detected) {</div><div class='add'>+	if (vmx_get_exit_reason(vcpu).bus_lock_detected) {</div><div class='ctx'> 		if (ret &gt; 0)</div><div class='ctx'> 			vcpu-&gt;run-&gt;exit_reason = KVM_EXIT_X86_BUS_LOCK;</div><div class='ctx'> </div><div class='hunk'>@@ -6745,7 +6672,7 @@ static noinstr void vmx_l1d_flush(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	vcpu-&gt;stat.l1d_flush++;</div><div class='ctx'> </div><div class='ctx'> 	if (static_cpu_has(X86_FEATURE_FLUSH_L1D)) {</div><div class='del'>-		native_wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH);</div><div class='add'>+		native_wrmsrq(MSR_IA32_FLUSH_CMD, L1D_FLUSH);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6970,22 +6897,22 @@ static void vmx_set_rvi(int vector)</div><div class='ctx'> </div><div class='ctx'> int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='ctx'> 	int max_irr;</div><div class='ctx'> 	bool got_posted_interrupt;</div><div class='ctx'> </div><div class='ctx'> 	if (KVM_BUG_ON(!enable_apicv, vcpu-&gt;kvm))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	if (pi_test_on(&amp;vmx-&gt;pi_desc)) {</div><div class='del'>-		pi_clear_on(&amp;vmx-&gt;pi_desc);</div><div class='add'>+	if (pi_test_on(&amp;vt-&gt;pi_desc)) {</div><div class='add'>+		pi_clear_on(&amp;vt-&gt;pi_desc);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * IOMMU can write to PID.ON, so the barrier matters even on UP.</div><div class='ctx'> 		 * But on x86 this is just a compiler barrier anyway.</div><div class='ctx'> 		 */</div><div class='ctx'> 		smp_mb__after_atomic();</div><div class='ctx'> 		got_posted_interrupt =</div><div class='del'>-			kvm_apic_update_irr(vcpu, vmx-&gt;pi_desc.pir, &amp;max_irr);</div><div class='add'>+			kvm_apic_update_irr(vcpu, vt-&gt;pi_desc.pir, &amp;max_irr);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		max_irr = kvm_lapic_find_highest_irr(vcpu);</div><div class='ctx'> 		got_posted_interrupt = false;</div><div class='hunk'>@@ -7025,14 +6952,6 @@ void vmx_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)</div><div class='ctx'> 	vmcs_write64(EOI_EXIT_BITMAP3, eoi_exit_bitmap[3]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void vmx_apicv_pre_state_restore(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='del'>-</div><div class='del'>-	pi_clear_on(&amp;vmx-&gt;pi_desc);</div><div class='del'>-	memset(vmx-&gt;pi_desc.pir, 0, sizeof(vmx-&gt;pi_desc.pir));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void vmx_do_interrupt_irqoff(unsigned long entry);</div><div class='ctx'> void vmx_do_nmi_irqoff(void);</div><div class='ctx'> </div><div class='hunk'>@@ -7052,7 +6971,7 @@ static void handle_nm_fault_irqoff(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 * the #NM exception.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (is_xfd_nm_fault(vcpu))</div><div class='del'>-		rdmsrl(MSR_IA32_XFD_ERR, vcpu-&gt;arch.guest_fpu.xfd_err);</div><div class='add'>+		rdmsrq(MSR_IA32_XFD_ERR, vcpu-&gt;arch.guest_fpu.xfd_err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void handle_exception_irqoff(struct kvm_vcpu *vcpu, u32 intr_info)</div><div class='hunk'>@@ -7089,14 +7008,12 @@ static void handle_external_interrupt_irqoff(struct kvm_vcpu *vcpu,</div><div class='ctx'> </div><div class='ctx'> void vmx_handle_exit_irqoff(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='del'>-</div><div class='del'>-	if (vmx-&gt;emulation_required)</div><div class='add'>+	if (to_vt(vcpu)-&gt;emulation_required)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (vmx-&gt;exit_reason.basic == EXIT_REASON_EXTERNAL_INTERRUPT)</div><div class='add'>+	if (vmx_get_exit_reason(vcpu).basic == EXIT_REASON_EXTERNAL_INTERRUPT)</div><div class='ctx'> 		handle_external_interrupt_irqoff(vcpu, vmx_get_intr_info(vcpu));</div><div class='del'>-	else if (vmx-&gt;exit_reason.basic == EXIT_REASON_EXCEPTION_NMI)</div><div class='add'>+	else if (vmx_get_exit_reason(vcpu).basic == EXIT_REASON_EXCEPTION_NMI)</div><div class='ctx'> 		handle_exception_irqoff(vcpu, vmx_get_intr_info(vcpu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7307,7 +7224,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; VMX_RUN_SAVE_SPEC_CTRL)</div><div class='del'>-		vmx-&gt;spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);</div><div class='add'>+		vmx-&gt;spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the guest/host SPEC_CTRL values differ, restore the host value.</div><div class='hunk'>@@ -7318,7 +7235,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS) ||</div><div class='ctx'> 	    vmx-&gt;spec_ctrl != hostval)</div><div class='del'>-		native_wrmsrl(MSR_IA32_SPEC_CTRL, hostval);</div><div class='add'>+		native_wrmsrq(MSR_IA32_SPEC_CTRL, hostval);</div><div class='ctx'> </div><div class='ctx'> 	barrier_nospec();</div><div class='ctx'> }</div><div class='hunk'>@@ -7331,10 +7248,10 @@ static fastpath_t vmx_exit_handlers_fastpath(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	 * the fastpath even, all other exits must use the slow path.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (is_guest_mode(vcpu) &amp;&amp;</div><div class='del'>-	    to_vmx(vcpu)-&gt;exit_reason.basic != EXIT_REASON_PREEMPTION_TIMER)</div><div class='add'>+	    vmx_get_exit_reason(vcpu).basic != EXIT_REASON_PREEMPTION_TIMER)</div><div class='ctx'> 		return EXIT_FASTPATH_NONE;</div><div class='ctx'> </div><div class='del'>-	switch (to_vmx(vcpu)-&gt;exit_reason.basic) {</div><div class='add'>+	switch (vmx_get_exit_reason(vcpu).basic) {</div><div class='ctx'> 	case EXIT_REASON_MSR_WRITE:</div><div class='ctx'> 		return handle_fastpath_set_msr_irqoff(vcpu);</div><div class='ctx'> 	case EXIT_REASON_PREEMPTION_TIMER:</div><div class='hunk'>@@ -7346,6 +7263,20 @@ static fastpath_t vmx_exit_handlers_fastpath(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+noinstr void vmx_handle_nmi(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	if ((u16)vmx_get_exit_reason(vcpu).basic != EXIT_REASON_EXCEPTION_NMI ||</div><div class='add'>+	    !is_nmi(vmx_get_intr_info(vcpu)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvm_before_interrupt(vcpu, KVM_HANDLING_NMI);</div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_FRED))</div><div class='add'>+		fred_entry_from_kvm(EVENT_TYPE_NMI, NMI_VECTOR);</div><div class='add'>+	else</div><div class='add'>+		vmx_do_nmi_irqoff();</div><div class='add'>+	kvm_after_interrupt(vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static noinstr void vmx_vcpu_enter_exit(struct kvm_vcpu *vcpu,</div><div class='ctx'> 					unsigned int flags)</div><div class='ctx'> {</div><div class='hunk'>@@ -7358,10 +7289,14 @@ static noinstr void vmx_vcpu_enter_exit(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	 * mitigation for MDS is done late in VMentry and is still</div><div class='ctx'> 	 * executed in spite of L1D Flush. This is because an extra VERW</div><div class='ctx'> 	 * should not matter much after the big hammer L1D Flush.</div><div class='add'>+	 *</div><div class='add'>+	 * cpu_buf_vm_clear is used when system is not vulnerable to MDS/TAA,</div><div class='add'>+	 * and is affected by MMIO Stale Data. In such cases mitigation in only</div><div class='add'>+	 * needed against an MMIO capable guest.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (static_branch_unlikely(&amp;vmx_l1d_should_flush))</div><div class='ctx'> 		vmx_l1d_flush(vcpu);</div><div class='del'>-	else if (static_branch_unlikely(&amp;mmio_stale_data_clear) &amp;&amp;</div><div class='add'>+	else if (static_branch_unlikely(&amp;cpu_buf_vm_clear) &amp;&amp;</div><div class='ctx'> 		 kvm_arch_has_assigned_device(vcpu-&gt;kvm))</div><div class='ctx'> 		mds_clear_cpu_buffers();</div><div class='ctx'> </div><div class='hunk'>@@ -7381,23 +7316,15 @@ static noinstr void vmx_vcpu_enter_exit(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	vmx_enable_fb_clear(vmx);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(vmx-&gt;fail)) {</div><div class='del'>-		vmx-&gt;exit_reason.full = 0xdead;</div><div class='add'>+		vmx-&gt;vt.exit_reason.full = 0xdead;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vmx-&gt;exit_reason.full = vmcs_read32(VM_EXIT_REASON);</div><div class='del'>-	if (likely(!vmx-&gt;exit_reason.failed_vmentry))</div><div class='add'>+	vmx-&gt;vt.exit_reason.full = vmcs_read32(VM_EXIT_REASON);</div><div class='add'>+	if (likely(!vmx_get_exit_reason(vcpu).failed_vmentry))</div><div class='ctx'> 		vmx-&gt;idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);</div><div class='ctx'> </div><div class='del'>-	if ((u16)vmx-&gt;exit_reason.basic == EXIT_REASON_EXCEPTION_NMI &amp;&amp;</div><div class='del'>-	    is_nmi(vmx_get_intr_info(vcpu))) {</div><div class='del'>-		kvm_before_interrupt(vcpu, KVM_HANDLING_NMI);</div><div class='del'>-		if (cpu_feature_enabled(X86_FEATURE_FRED))</div><div class='del'>-			fred_entry_from_kvm(EVENT_TYPE_NMI, NMI_VECTOR);</div><div class='del'>-		else</div><div class='del'>-			vmx_do_nmi_irqoff();</div><div class='del'>-		kvm_after_interrupt(vcpu);</div><div class='del'>-	}</div><div class='add'>+	vmx_handle_nmi(vcpu);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	guest_state_exit_irqoff();</div><div class='hunk'>@@ -7418,15 +7345,15 @@ fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit)</div><div class='ctx'> 	 * start emulation until we arrive back to a valid state.  Synthesize a</div><div class='ctx'> 	 * consistency check VM-Exit due to invalid guest state and bail.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(vmx-&gt;emulation_required)) {</div><div class='add'>+	if (unlikely(vmx-&gt;vt.emulation_required)) {</div><div class='ctx'> 		vmx-&gt;fail = 0;</div><div class='ctx'> </div><div class='del'>-		vmx-&gt;exit_reason.full = EXIT_REASON_INVALID_STATE;</div><div class='del'>-		vmx-&gt;exit_reason.failed_vmentry = 1;</div><div class='add'>+		vmx-&gt;vt.exit_reason.full = EXIT_REASON_INVALID_STATE;</div><div class='add'>+		vmx-&gt;vt.exit_reason.failed_vmentry = 1;</div><div class='ctx'> 		kvm_register_mark_available(vcpu, VCPU_EXREG_EXIT_INFO_1);</div><div class='del'>-		vmx-&gt;exit_qualification = ENTRY_FAIL_DEFAULT;</div><div class='add'>+		vmx-&gt;vt.exit_qualification = ENTRY_FAIL_DEFAULT;</div><div class='ctx'> 		kvm_register_mark_available(vcpu, VCPU_EXREG_EXIT_INFO_2);</div><div class='del'>-		vmx-&gt;exit_intr_info = 0;</div><div class='add'>+		vmx-&gt;vt.exit_intr_info = 0;</div><div class='ctx'> 		return EXIT_FASTPATH_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7529,7 +7456,7 @@ fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit)</div><div class='ctx'> 		 * checking.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (vmx-&gt;nested.nested_run_pending &amp;&amp;</div><div class='del'>-		    !vmx-&gt;exit_reason.failed_vmentry)</div><div class='add'>+		    !vmx_get_exit_reason(vcpu).failed_vmentry)</div><div class='ctx'> 			++vcpu-&gt;stat.nested_run;</div><div class='ctx'> </div><div class='ctx'> 		vmx-&gt;nested.nested_run_pending = 0;</div><div class='hunk'>@@ -7538,12 +7465,12 @@ fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit)</div><div class='ctx'> 	if (unlikely(vmx-&gt;fail))</div><div class='ctx'> 		return EXIT_FASTPATH_NONE;</div><div class='ctx'> </div><div class='del'>-	if (unlikely((u16)vmx-&gt;exit_reason.basic == EXIT_REASON_MCE_DURING_VMENTRY))</div><div class='add'>+	if (unlikely((u16)vmx_get_exit_reason(vcpu).basic == EXIT_REASON_MCE_DURING_VMENTRY))</div><div class='ctx'> 		kvm_machine_check();</div><div class='ctx'> </div><div class='ctx'> 	trace_kvm_exit(vcpu, KVM_ISA_VMX);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(vmx-&gt;exit_reason.failed_vmentry))</div><div class='add'>+	if (unlikely(vmx_get_exit_reason(vcpu).failed_vmentry))</div><div class='ctx'> 		return EXIT_FASTPATH_NONE;</div><div class='ctx'> </div><div class='ctx'> 	vmx-&gt;loaded_vmcs-&gt;launched = 1;</div><div class='hunk'>@@ -7575,7 +7502,7 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	BUILD_BUG_ON(offsetof(struct vcpu_vmx, vcpu) != 0);</div><div class='ctx'> 	vmx = to_vmx(vcpu);</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;vmx-&gt;pi_wakeup_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;vmx-&gt;vt.pi_wakeup_list);</div><div class='ctx'> </div><div class='ctx'> 	err = -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -7673,7 +7600,7 @@ int vmx_vcpu_create(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	if (vmx_can_use_ipiv(vcpu))</div><div class='ctx'> 		WRITE_ONCE(to_kvm_vmx(vcpu-&gt;kvm)-&gt;pid_table[vcpu-&gt;vcpu_id],</div><div class='del'>-			   __pa(&amp;vmx-&gt;pi_desc) | PID_TABLE_ENTRY_VALID);</div><div class='add'>+			   __pa(&amp;vmx-&gt;vt.pi_desc) | PID_TABLE_ENTRY_VALID);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -7700,6 +7627,7 @@ int vmx_vm_init(struct kvm *kvm)</div><div class='ctx'> 		case L1TF_MITIGATION_FLUSH_NOWARN:</div><div class='ctx'> 			/* 'I explicitly don't care' is set */</div><div class='ctx'> 			break;</div><div class='add'>+		case L1TF_MITIGATION_AUTO:</div><div class='ctx'> 		case L1TF_MITIGATION_FLUSH:</div><div class='ctx'> 		case L1TF_MITIGATION_FLUSH_NOSMT:</div><div class='ctx'> 		case L1TF_MITIGATION_FULL:</div><div class='hunk'>@@ -7717,9 +7645,23 @@ int vmx_vm_init(struct kvm *kvm)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (enable_pml)</div><div class='add'>+		kvm-&gt;arch.cpu_dirty_log_size = PML_LOG_NR_ENTRIES;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool vmx_ignore_guest_pat(struct kvm *kvm)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Non-coherent DMA devices need the guest to flush CPU properly.</div><div class='add'>+	 * In that case it is not possible to map all guest RAM as WB, so</div><div class='add'>+	 * always trust guest PAT.</div><div class='add'>+	 */</div><div class='add'>+	return !kvm_arch_has_noncoherent_dma(kvm) &amp;&amp;</div><div class='add'>+	       kvm_check_has_quirk(kvm, KVM_X86_QUIRK_IGNORE_GUEST_PAT);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u8 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -7729,13 +7671,8 @@ u8 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)</div><div class='ctx'> 	if (is_mmio)</div><div class='ctx'> 		return MTRR_TYPE_UNCACHABLE &lt;&lt; VMX_EPT_MT_EPTE_SHIFT;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Force WB and ignore guest PAT if the VM does NOT have a non-coherent</div><div class='del'>-	 * device attached.  Letting the guest control memory types on Intel</div><div class='del'>-	 * CPUs may result in unexpected behavior, and so KVM's ABI is to trust</div><div class='del'>-	 * the guest to behave only as a last resort.</div><div class='del'>-	 */</div><div class='del'>-	if (!kvm_arch_has_noncoherent_dma(vcpu-&gt;kvm))</div><div class='add'>+	/* Force WB if ignoring guest PAT */</div><div class='add'>+	if (vmx_ignore_guest_pat(vcpu-&gt;kvm))</div><div class='ctx'> 		return (MTRR_TYPE_WRBACK &lt;&lt; VMX_EPT_MT_EPTE_SHIFT) | VMX_EPT_IPAT_BIT;</div><div class='ctx'> </div><div class='ctx'> 	return (MTRR_TYPE_WRBACK &lt;&lt; VMX_EPT_MT_EPTE_SHIFT);</div><div class='hunk'>@@ -7959,7 +7896,7 @@ static __init u64 vmx_get_perf_capabilities(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_PDCM))</div><div class='del'>-		rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);</div><div class='add'>+		rdmsrq(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_ARCH_LBR)) {</div><div class='ctx'> 		x86_perf_get_lbr(&amp;vmx_lbr_caps);</div><div class='hunk'>@@ -8508,7 +8445,7 @@ __init int vmx_hardware_setup(void)</div><div class='ctx'> 		kvm_enable_efer_bits(EFER_NX);</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_MPX)) {</div><div class='del'>-		rdmsrl(MSR_IA32_BNDCFGS, host_bndcfgs);</div><div class='add'>+		rdmsrq(MSR_IA32_BNDCFGS, host_bndcfgs);</div><div class='ctx'> 		WARN_ONCE(host_bndcfgs, "BNDCFGS in host will be lost");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -8597,6 +8534,8 @@ __init int vmx_hardware_setup(void)</div><div class='ctx'> 	if (enable_ept)</div><div class='ctx'> 		kvm_mmu_set_ept_masks(enable_ept_ad_bits,</div><div class='ctx'> 				      cpu_has_vmx_ept_execute_only());</div><div class='add'>+	else</div><div class='add'>+		vt_x86_ops.get_mt_mask = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Setup shadow_me_value/shadow_me_mask to include MKTME KeyID</div><div class='hunk'>@@ -8614,9 +8553,6 @@ __init int vmx_hardware_setup(void)</div><div class='ctx'> 	if (!enable_ept || !enable_ept_ad_bits || !cpu_has_vmx_pml())</div><div class='ctx'> 		enable_pml = 0;</div><div class='ctx'> </div><div class='del'>-	if (!enable_pml)</div><div class='del'>-		vt_x86_ops.cpu_dirty_log_size = 0;</div><div class='del'>-</div><div class='ctx'> 	if (!cpu_has_vmx_preemption_timer())</div><div class='ctx'> 		enable_preemption_timer = false;</div><div class='ctx'> </div><div class='hunk'>@@ -8674,6 +8610,27 @@ __init int vmx_hardware_setup(void)</div><div class='ctx'> </div><div class='ctx'> 	kvm_set_posted_intr_wakeup_handler(pi_wakeup_handler);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * On Intel CPUs that lack self-snoop feature, letting the guest control</div><div class='add'>+	 * memory types may result in unexpected behavior. So always ignore guest</div><div class='add'>+	 * PAT on those CPUs and map VM as writeback, not allowing userspace to</div><div class='add'>+	 * disable the quirk.</div><div class='add'>+	 *</div><div class='add'>+	 * On certain Intel CPUs (e.g. SPR, ICX), though self-snoop feature is</div><div class='add'>+	 * supported, UC is slow enough to cause issues with some older guests (e.g.</div><div class='add'>+	 * an old version of bochs driver uses ioremap() instead of ioremap_wc() to</div><div class='add'>+	 * map the video RAM, causing wayland desktop to fail to get started</div><div class='add'>+	 * correctly). To avoid breaking those older guests that rely on KVM to force</div><div class='add'>+	 * memory type to WB, provide KVM_X86_QUIRK_IGNORE_GUEST_PAT to preserve the</div><div class='add'>+	 * safer (for performance) default behavior.</div><div class='add'>+	 *</div><div class='add'>+	 * On top of this, non-coherent DMA devices need the guest to flush CPU</div><div class='add'>+	 * caches properly.  This also requires honoring guest PAT, and is forced</div><div class='add'>+	 * independent of the quirk in vmx_ignore_guest_pat().</div><div class='add'>+	 */</div><div class='add'>+	if (!static_cpu_has(X86_FEATURE_SELFSNOOP))</div><div class='add'>+		kvm_caps.supported_quirks &amp;= ~KVM_X86_QUIRK_IGNORE_GUEST_PAT;</div><div class='add'>+       kvm_caps.inapplicable_quirks &amp;= ~KVM_X86_QUIRK_IGNORE_GUEST_PAT;</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -8687,23 +8644,16 @@ static void vmx_cleanup_l1d_flush(void)</div><div class='ctx'> 	l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_AUTO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __vmx_exit(void)</div><div class='add'>+void vmx_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	allow_smaller_maxphyaddr = false;</div><div class='ctx'> </div><div class='ctx'> 	vmx_cleanup_l1d_flush();</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void __exit vmx_exit(void)</div><div class='del'>-{</div><div class='del'>-	kvm_exit();</div><div class='del'>-	__vmx_exit();</div><div class='ctx'> 	kvm_x86_vendor_exit();</div><div class='del'>-</div><div class='ctx'> }</div><div class='del'>-module_exit(vmx_exit);</div><div class='ctx'> </div><div class='del'>-static int __init vmx_init(void)</div><div class='add'>+int __init vmx_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int r, cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -8747,21 +8697,9 @@ static int __init vmx_init(void)</div><div class='ctx'> 	if (!enable_ept)</div><div class='ctx'> 		allow_smaller_maxphyaddr = true;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Common KVM initialization _must_ come last, after this, /dev/kvm is</div><div class='del'>-	 * exposed to userspace!</div><div class='del'>-	 */</div><div class='del'>-	r = kvm_init(sizeof(struct vcpu_vmx), __alignof__(struct vcpu_vmx),</div><div class='del'>-		     THIS_MODULE);</div><div class='del'>-	if (r)</div><div class='del'>-		goto err_kvm_init;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_kvm_init:</div><div class='del'>-	__vmx_exit();</div><div class='ctx'> err_l1d_flush:</div><div class='ctx'> 	kvm_x86_vendor_exit();</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='del'>-module_init(vmx_init);</div><div class='head'>diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h<br/>index 951e44dc9d0e..6d1e40ecc024 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/vmx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/vmx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/vmx.h</a></div><div class='hunk'>@@ -11,11 +11,13 @@</div><div class='ctx'> </div><div class='ctx'> #include "capabilities.h"</div><div class='ctx'> #include "../kvm_cache_regs.h"</div><div class='add'>+#include "pmu_intel.h"</div><div class='ctx'> #include "vmcs.h"</div><div class='ctx'> #include "vmx_ops.h"</div><div class='ctx'> #include "../cpuid.h"</div><div class='ctx'> #include "run_flags.h"</div><div class='ctx'> #include "../mmu.h"</div><div class='add'>+#include "common.h"</div><div class='ctx'> </div><div class='ctx'> #define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) &gt;&gt; 4))</div><div class='ctx'> </div><div class='hunk'>@@ -67,47 +69,6 @@ struct pt_desc {</div><div class='ctx'> 	struct pt_ctx guest;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-union vmx_exit_reason {</div><div class='del'>-	struct {</div><div class='del'>-		u32	basic			: 16;</div><div class='del'>-		u32	reserved16		: 1;</div><div class='del'>-		u32	reserved17		: 1;</div><div class='del'>-		u32	reserved18		: 1;</div><div class='del'>-		u32	reserved19		: 1;</div><div class='del'>-		u32	reserved20		: 1;</div><div class='del'>-		u32	reserved21		: 1;</div><div class='del'>-		u32	reserved22		: 1;</div><div class='del'>-		u32	reserved23		: 1;</div><div class='del'>-		u32	reserved24		: 1;</div><div class='del'>-		u32	reserved25		: 1;</div><div class='del'>-		u32	bus_lock_detected	: 1;</div><div class='del'>-		u32	enclave_mode		: 1;</div><div class='del'>-		u32	smi_pending_mtf		: 1;</div><div class='del'>-		u32	smi_from_vmx_root	: 1;</div><div class='del'>-		u32	reserved30		: 1;</div><div class='del'>-		u32	failed_vmentry		: 1;</div><div class='del'>-	};</div><div class='del'>-	u32 full;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct lbr_desc {</div><div class='del'>-	/* Basic info about guest LBR records. */</div><div class='del'>-	struct x86_pmu_lbr records;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Emulate LBR feature via passthrough LBR registers when the</div><div class='del'>-	 * per-vcpu guest LBR event is scheduled on the current pcpu.</div><div class='del'>-	 *</div><div class='del'>-	 * The records may be inaccurate if the host reclaims the LBR.</div><div class='del'>-	 */</div><div class='del'>-	struct perf_event *event;</div><div class='del'>-</div><div class='del'>-	/* True if LBRs are marked as not intercepted in the MSR bitmap */</div><div class='del'>-	bool msr_passthrough;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern struct x86_pmu_lbr vmx_lbr_caps;</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The nested_vmx structure is part of vcpu_vmx, and holds information we need</div><div class='ctx'>  * for correct emulation of VMX (i.e., nested VMX) on this vcpu.</div><div class='hunk'>@@ -248,20 +209,10 @@ struct nested_vmx {</div><div class='ctx'> </div><div class='ctx'> struct vcpu_vmx {</div><div class='ctx'> 	struct kvm_vcpu       vcpu;</div><div class='add'>+	struct vcpu_vt	      vt;</div><div class='ctx'> 	u8                    fail;</div><div class='ctx'> 	u8		      x2apic_msr_bitmap_mode;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If true, host state has been stored in vmx-&gt;loaded_vmcs for</div><div class='del'>-	 * the CPU registers that only need to be switched when transitioning</div><div class='del'>-	 * to/from the kernel, and the registers have been loaded with guest</div><div class='del'>-	 * values.  If false, host state is loaded in the CPU registers</div><div class='del'>-	 * and vmx-&gt;loaded_vmcs-&gt;host_state is invalid.</div><div class='del'>-	 */</div><div class='del'>-	bool		      guest_state_loaded;</div><div class='del'>-</div><div class='del'>-	unsigned long         exit_qualification;</div><div class='del'>-	u32                   exit_intr_info;</div><div class='ctx'> 	u32                   idt_vectoring_info;</div><div class='ctx'> 	ulong                 rflags;</div><div class='ctx'> </div><div class='hunk'>@@ -274,7 +225,6 @@ struct vcpu_vmx {</div><div class='ctx'> 	struct vmx_uret_msr   guest_uret_msrs[MAX_NR_USER_RETURN_MSRS];</div><div class='ctx'> 	bool                  guest_uret_msrs_loaded;</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	u64		      msr_host_kernel_gs_base;</div><div class='ctx'> 	u64		      msr_guest_kernel_gs_base;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -313,15 +263,6 @@ struct vcpu_vmx {</div><div class='ctx'> 		} seg[8];</div><div class='ctx'> 	} segment_cache;</div><div class='ctx'> 	int vpid;</div><div class='del'>-	bool emulation_required;</div><div class='del'>-</div><div class='del'>-	union vmx_exit_reason exit_reason;</div><div class='del'>-</div><div class='del'>-	/* Posted interrupt descriptor */</div><div class='del'>-	struct pi_desc pi_desc;</div><div class='del'>-</div><div class='del'>-	/* Used if this vCPU is waiting for PI notification wakeup. */</div><div class='del'>-	struct list_head pi_wakeup_list;</div><div class='ctx'> </div><div class='ctx'> 	/* Support for a guest hypervisor (nested VMX) */</div><div class='ctx'> 	struct nested_vmx nested;</div><div class='hunk'>@@ -376,6 +317,43 @@ struct kvm_vmx {</div><div class='ctx'> 	u64 *pid_table;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static __always_inline struct vcpu_vt *to_vt(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return &amp;(container_of(vcpu, struct vcpu_vmx, vcpu)-&gt;vt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline struct kvm_vcpu *vt_to_vcpu(struct vcpu_vt *vt)</div><div class='add'>+{</div><div class='add'>+	return &amp;(container_of(vt, struct vcpu_vmx, vt)-&gt;vcpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline union vmx_exit_reason vmx_get_exit_reason(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	return to_vt(vcpu)-&gt;exit_reason;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline unsigned long vmx_get_exit_qual(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='add'>+</div><div class='add'>+	if (!kvm_register_test_and_mark_available(vcpu, VCPU_EXREG_EXIT_INFO_1) &amp;&amp;</div><div class='add'>+	    !WARN_ON_ONCE(is_td_vcpu(vcpu)))</div><div class='add'>+		vt-&gt;exit_qualification = vmcs_readl(EXIT_QUALIFICATION);</div><div class='add'>+</div><div class='add'>+	return vt-&gt;exit_qualification;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline u32 vmx_get_intr_info(struct kvm_vcpu *vcpu)</div><div class='add'>+{</div><div class='add'>+	struct vcpu_vt *vt = to_vt(vcpu);</div><div class='add'>+</div><div class='add'>+	if (!kvm_register_test_and_mark_available(vcpu, VCPU_EXREG_EXIT_INFO_2) &amp;&amp;</div><div class='add'>+	    !WARN_ON_ONCE(is_td_vcpu(vcpu)))</div><div class='add'>+		vt-&gt;exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);</div><div class='add'>+</div><div class='add'>+	return vt-&gt;exit_intr_info;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void vmx_vcpu_load_vmcs(struct kvm_vcpu *vcpu, int cpu,</div><div class='ctx'> 			struct loaded_vmcs *buddy);</div><div class='ctx'> int allocate_vpid(void);</div><div class='hunk'>@@ -662,45 +640,10 @@ static __always_inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return container_of(vcpu, struct vcpu_vmx, vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct lbr_desc *vcpu_to_lbr_desc(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return &amp;to_vmx(vcpu)-&gt;lbr_desc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct x86_pmu_lbr *vcpu_to_lbr_records(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return &amp;vcpu_to_lbr_desc(vcpu)-&gt;records;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline bool intel_pmu_lbr_is_enabled(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	return !!vcpu_to_lbr_records(vcpu)-&gt;nr;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu);</div><div class='ctx'> int intel_pmu_create_guest_lbr_event(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vmx_passthrough_lbr_msrs(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='del'>-static __always_inline unsigned long vmx_get_exit_qual(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='del'>-</div><div class='del'>-	if (!kvm_register_test_and_mark_available(vcpu, VCPU_EXREG_EXIT_INFO_1))</div><div class='del'>-		vmx-&gt;exit_qualification = vmcs_readl(EXIT_QUALIFICATION);</div><div class='del'>-</div><div class='del'>-	return vmx-&gt;exit_qualification;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __always_inline u32 vmx_get_intr_info(struct kvm_vcpu *vcpu)</div><div class='del'>-{</div><div class='del'>-	struct vcpu_vmx *vmx = to_vmx(vcpu);</div><div class='del'>-</div><div class='del'>-	if (!kvm_register_test_and_mark_available(vcpu, VCPU_EXREG_EXIT_INFO_2))</div><div class='del'>-		vmx-&gt;exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);</div><div class='del'>-</div><div class='del'>-	return vmx-&gt;exit_intr_info;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct vmcs *alloc_vmcs_cpu(bool shadow, int cpu, gfp_t flags);</div><div class='ctx'> void free_vmcs(struct vmcs *vmcs);</div><div class='ctx'> int alloc_loaded_vmcs(struct loaded_vmcs *loaded_vmcs);</div><div class='hunk'>@@ -758,4 +701,7 @@ static inline void vmx_segment_cache_clear(struct vcpu_vmx *vmx)</div><div class='ctx'> 	vmx-&gt;segment_cache.bitmask = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int vmx_init(void);</div><div class='add'>+void vmx_exit(void);</div><div class='add'>+</div><div class='ctx'> #endif /* __KVM_X86_VMX_H */</div><div class='head'>diff --git a/arch/x86/kvm/vmx/x86_ops.h b/arch/x86/kvm/vmx/x86_ops.h<br/>index 430773a5ef8e..6bf8be570b2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/x86_ops.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/vmx/x86_ops.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/vmx/x86_ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/vmx/x86_ops.h</a></div><div class='hunk'>@@ -46,7 +46,6 @@ int vmx_check_intercept(struct kvm_vcpu *vcpu,</div><div class='ctx'> bool vmx_apic_init_signal_blocked(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vmx_migrate_timers(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu);</div><div class='del'>-void vmx_apicv_pre_state_restore(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr);</div><div class='ctx'> int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu);</div><div class='ctx'> void vmx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,</div><div class='hunk'>@@ -121,4 +120,114 @@ void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu);</div><div class='ctx'> #endif</div><div class='ctx'> void vmx_setup_mce(struct kvm_vcpu *vcpu);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_KVM_INTEL_TDX</div><div class='add'>+void tdx_disable_virtualization_cpu(void);</div><div class='add'>+int tdx_vm_init(struct kvm *kvm);</div><div class='add'>+void tdx_mmu_release_hkid(struct kvm *kvm);</div><div class='add'>+void tdx_vm_destroy(struct kvm *kvm);</div><div class='add'>+int tdx_vm_ioctl(struct kvm *kvm, void __user *argp);</div><div class='add'>+</div><div class='add'>+int tdx_vcpu_create(struct kvm_vcpu *vcpu);</div><div class='add'>+void tdx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);</div><div class='add'>+void tdx_vcpu_free(struct kvm_vcpu *vcpu);</div><div class='add'>+void tdx_vcpu_load(struct kvm_vcpu *vcpu, int cpu);</div><div class='add'>+int tdx_vcpu_pre_run(struct kvm_vcpu *vcpu);</div><div class='add'>+fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit);</div><div class='add'>+void tdx_prepare_switch_to_guest(struct kvm_vcpu *vcpu);</div><div class='add'>+void tdx_vcpu_put(struct kvm_vcpu *vcpu);</div><div class='add'>+bool tdx_protected_apic_has_interrupt(struct kvm_vcpu *vcpu);</div><div class='add'>+int tdx_handle_exit(struct kvm_vcpu *vcpu,</div><div class='add'>+		enum exit_fastpath_completion fastpath);</div><div class='add'>+</div><div class='add'>+void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,</div><div class='add'>+			   int trig_mode, int vector);</div><div class='add'>+void tdx_inject_nmi(struct kvm_vcpu *vcpu);</div><div class='add'>+void tdx_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason,</div><div class='add'>+		u64 *info1, u64 *info2, u32 *intr_info, u32 *error_code);</div><div class='add'>+bool tdx_has_emulated_msr(u32 index);</div><div class='add'>+int tdx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='add'>+int tdx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);</div><div class='add'>+</div><div class='add'>+int tdx_vcpu_ioctl(struct kvm_vcpu *vcpu, void __user *argp);</div><div class='add'>+</div><div class='add'>+int tdx_sept_link_private_spt(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+			      enum pg_level level, void *private_spt);</div><div class='add'>+int tdx_sept_free_private_spt(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+			      enum pg_level level, void *private_spt);</div><div class='add'>+int tdx_sept_set_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+			      enum pg_level level, kvm_pfn_t pfn);</div><div class='add'>+int tdx_sept_remove_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+				 enum pg_level level, kvm_pfn_t pfn);</div><div class='add'>+</div><div class='add'>+void tdx_flush_tlb_current(struct kvm_vcpu *vcpu);</div><div class='add'>+void tdx_flush_tlb_all(struct kvm_vcpu *vcpu);</div><div class='add'>+void tdx_load_mmu_pgd(struct kvm_vcpu *vcpu, hpa_t root_hpa, int root_level);</div><div class='add'>+int tdx_gmem_private_max_mapping_level(struct kvm *kvm, kvm_pfn_t pfn);</div><div class='add'>+#else</div><div class='add'>+static inline void tdx_disable_virtualization_cpu(void) {}</div><div class='add'>+static inline int tdx_vm_init(struct kvm *kvm) { return -EOPNOTSUPP; }</div><div class='add'>+static inline void tdx_mmu_release_hkid(struct kvm *kvm) {}</div><div class='add'>+static inline void tdx_vm_destroy(struct kvm *kvm) {}</div><div class='add'>+static inline int tdx_vm_ioctl(struct kvm *kvm, void __user *argp) { return -EOPNOTSUPP; }</div><div class='add'>+</div><div class='add'>+static inline int tdx_vcpu_create(struct kvm_vcpu *vcpu) { return -EOPNOTSUPP; }</div><div class='add'>+static inline void tdx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) {}</div><div class='add'>+static inline void tdx_vcpu_free(struct kvm_vcpu *vcpu) {}</div><div class='add'>+static inline void tdx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) {}</div><div class='add'>+static inline int tdx_vcpu_pre_run(struct kvm_vcpu *vcpu) { return -EOPNOTSUPP; }</div><div class='add'>+static inline fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu, bool force_immediate_exit)</div><div class='add'>+{</div><div class='add'>+	return EXIT_FASTPATH_NONE;</div><div class='add'>+}</div><div class='add'>+static inline void tdx_prepare_switch_to_guest(struct kvm_vcpu *vcpu) {}</div><div class='add'>+static inline void tdx_vcpu_put(struct kvm_vcpu *vcpu) {}</div><div class='add'>+static inline bool tdx_protected_apic_has_interrupt(struct kvm_vcpu *vcpu) { return false; }</div><div class='add'>+static inline int tdx_handle_exit(struct kvm_vcpu *vcpu,</div><div class='add'>+		enum exit_fastpath_completion fastpath) { return 0; }</div><div class='add'>+</div><div class='add'>+static inline void tdx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,</div><div class='add'>+					 int trig_mode, int vector) {}</div><div class='add'>+static inline void tdx_inject_nmi(struct kvm_vcpu *vcpu) {}</div><div class='add'>+static inline void tdx_get_exit_info(struct kvm_vcpu *vcpu, u32 *reason, u64 *info1,</div><div class='add'>+				     u64 *info2, u32 *intr_info, u32 *error_code) {}</div><div class='add'>+static inline bool tdx_has_emulated_msr(u32 index) { return false; }</div><div class='add'>+static inline int tdx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) { return 1; }</div><div class='add'>+static inline int tdx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) { return 1; }</div><div class='add'>+</div><div class='add'>+static inline int tdx_vcpu_ioctl(struct kvm_vcpu *vcpu, void __user *argp) { return -EOPNOTSUPP; }</div><div class='add'>+</div><div class='add'>+static inline int tdx_sept_link_private_spt(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+					    enum pg_level level,</div><div class='add'>+					    void *private_spt)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tdx_sept_free_private_spt(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+					    enum pg_level level,</div><div class='add'>+					    void *private_spt)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tdx_sept_set_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+					    enum pg_level level,</div><div class='add'>+					    kvm_pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tdx_sept_remove_private_spte(struct kvm *kvm, gfn_t gfn,</div><div class='add'>+					       enum pg_level level,</div><div class='add'>+					       kvm_pfn_t pfn)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void tdx_flush_tlb_current(struct kvm_vcpu *vcpu) {}</div><div class='add'>+static inline void tdx_flush_tlb_all(struct kvm_vcpu *vcpu) {}</div><div class='add'>+static inline void tdx_load_mmu_pgd(struct kvm_vcpu *vcpu, hpa_t root_hpa, int root_level) {}</div><div class='add'>+static inline int tdx_gmem_private_max_mapping_level(struct kvm *kvm, kvm_pfn_t pfn) { return 0; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif /* __KVM_X86_VMX_X86_OPS_H */</div><div class='head'>diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c<br/>index c841817a914a..570e7f8cbf64 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/x86.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/x86.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/x86.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/x86.c</a></div><div class='hunk'>@@ -90,7 +90,6 @@</div><div class='ctx'> #include "trace.h"</div><div class='ctx'> </div><div class='ctx'> #define MAX_IO_MSRS 256</div><div class='del'>-#define KVM_MAX_MCE_BANKS 32</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Note, kvm_caps fields should *never* have default values, all fields must be</div><div class='hunk'>@@ -578,7 +577,7 @@ static void kvm_on_user_return(struct user_return_notifier *urn)</div><div class='ctx'> 	for (slot = 0; slot &lt; kvm_nr_uret_msrs; ++slot) {</div><div class='ctx'> 		values = &amp;msrs-&gt;values[slot];</div><div class='ctx'> 		if (values-&gt;host != values-&gt;curr) {</div><div class='del'>-			wrmsrl(kvm_uret_msrs_list[slot], values-&gt;host);</div><div class='add'>+			wrmsrq(kvm_uret_msrs_list[slot], values-&gt;host);</div><div class='ctx'> 			values-&gt;curr = values-&gt;host;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -590,10 +589,10 @@ static int kvm_probe_user_return_msr(u32 msr)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	preempt_disable();</div><div class='del'>-	ret = rdmsrl_safe(msr, &amp;val);</div><div class='add'>+	ret = rdmsrq_safe(msr, &amp;val);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='del'>-	ret = wrmsrl_safe(msr, val);</div><div class='add'>+	ret = wrmsrq_safe(msr, val);</div><div class='ctx'> out:</div><div class='ctx'> 	preempt_enable();</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -630,12 +629,21 @@ static void kvm_user_return_msr_cpu_online(void)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; kvm_nr_uret_msrs; ++i) {</div><div class='del'>-		rdmsrl_safe(kvm_uret_msrs_list[i], &amp;value);</div><div class='add'>+		rdmsrq_safe(kvm_uret_msrs_list[i], &amp;value);</div><div class='ctx'> 		msrs-&gt;values[i].host = value;</div><div class='ctx'> 		msrs-&gt;values[i].curr = value;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvm_user_return_register_notifier(struct kvm_user_return_msrs *msrs)</div><div class='add'>+{</div><div class='add'>+	if (!msrs-&gt;registered) {</div><div class='add'>+		msrs-&gt;urn.on_user_return = kvm_on_user_return;</div><div class='add'>+		user_return_notifier_register(&amp;msrs-&gt;urn);</div><div class='add'>+		msrs-&gt;registered = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_user_return_msrs *msrs = this_cpu_ptr(user_return_msrs);</div><div class='hunk'>@@ -644,20 +652,25 @@ int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)</div><div class='ctx'> 	value = (value &amp; mask) | (msrs-&gt;values[slot].host &amp; ~mask);</div><div class='ctx'> 	if (value == msrs-&gt;values[slot].curr)</div><div class='ctx'> 		return 0;</div><div class='del'>-	err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);</div><div class='add'>+	err = wrmsrq_safe(kvm_uret_msrs_list[slot], value);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	msrs-&gt;values[slot].curr = value;</div><div class='del'>-	if (!msrs-&gt;registered) {</div><div class='del'>-		msrs-&gt;urn.on_user_return = kvm_on_user_return;</div><div class='del'>-		user_return_notifier_register(&amp;msrs-&gt;urn);</div><div class='del'>-		msrs-&gt;registered = true;</div><div class='del'>-	}</div><div class='add'>+	kvm_user_return_register_notifier(msrs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);</div><div class='ctx'> </div><div class='add'>+void kvm_user_return_msr_update_cache(unsigned int slot, u64 value)</div><div class='add'>+{</div><div class='add'>+	struct kvm_user_return_msrs *msrs = this_cpu_ptr(user_return_msrs);</div><div class='add'>+</div><div class='add'>+	msrs-&gt;values[slot].curr = value;</div><div class='add'>+	kvm_user_return_register_notifier(msrs);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_user_return_msr_update_cache);</div><div class='add'>+</div><div class='ctx'> static void drop_user_return_notifiers(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_user_return_msrs *msrs = this_cpu_ptr(user_return_msrs);</div><div class='hunk'>@@ -1174,7 +1187,7 @@ void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 		if (guest_cpu_cap_has(vcpu, X86_FEATURE_XSAVES) &amp;&amp;</div><div class='ctx'> 		    vcpu-&gt;arch.ia32_xss != kvm_host.xss)</div><div class='del'>-			wrmsrl(MSR_IA32_XSS, vcpu-&gt;arch.ia32_xss);</div><div class='add'>+			wrmsrq(MSR_IA32_XSS, vcpu-&gt;arch.ia32_xss);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_PKU) &amp;&amp;</div><div class='hunk'>@@ -1205,7 +1218,7 @@ void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 		if (guest_cpu_cap_has(vcpu, X86_FEATURE_XSAVES) &amp;&amp;</div><div class='ctx'> 		    vcpu-&gt;arch.ia32_xss != kvm_host.xss)</div><div class='del'>-			wrmsrl(MSR_IA32_XSS, kvm_host.xss);</div><div class='add'>+			wrmsrq(MSR_IA32_XSS, kvm_host.xss);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -1584,7 +1597,7 @@ EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);</div><div class='ctx'> 	 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \</div><div class='ctx'> 	 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \</div><div class='ctx'> 	 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO | ARCH_CAP_GDS_NO | \</div><div class='del'>-	 ARCH_CAP_RFDS_NO | ARCH_CAP_RFDS_CLEAR | ARCH_CAP_BHI_NO)</div><div class='add'>+	 ARCH_CAP_RFDS_NO | ARCH_CAP_RFDS_CLEAR | ARCH_CAP_BHI_NO | ARCH_CAP_ITS_NO)</div><div class='ctx'> </div><div class='ctx'> static u64 kvm_get_arch_capabilities(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1618,6 +1631,8 @@ static u64 kvm_get_arch_capabilities(void)</div><div class='ctx'> 		data |= ARCH_CAP_MDS_NO;</div><div class='ctx'> 	if (!boot_cpu_has_bug(X86_BUG_RFDS))</div><div class='ctx'> 		data |= ARCH_CAP_RFDS_NO;</div><div class='add'>+	if (!boot_cpu_has_bug(X86_BUG_ITS))</div><div class='add'>+		data |= ARCH_CAP_ITS_NO;</div><div class='ctx'> </div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_RTM)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1660,7 +1675,7 @@ static int kvm_get_feature_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,</div><div class='ctx'> 		*data = MSR_PLATFORM_INFO_CPUID_FAULT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_IA32_UCODE_REV:</div><div class='del'>-		rdmsrl_safe(index, data);</div><div class='add'>+		rdmsrq_safe(index, data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return kvm_x86_call(get_feature_msr)(index, data);</div><div class='hunk'>@@ -3827,7 +3842,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> 		if (!data)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		wrmsrl(MSR_IA32_PRED_CMD, data);</div><div class='add'>+		wrmsrq(MSR_IA32_PRED_CMD, data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case MSR_IA32_FLUSH_CMD:</div><div class='hunk'>@@ -3840,7 +3855,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)</div><div class='ctx'> 		if (!data)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH);</div><div class='add'>+		wrmsrq(MSR_IA32_FLUSH_CMD, L1D_FLUSH);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MSR_EFER:</div><div class='ctx'> 		return set_efer(vcpu, msr_info);</div><div class='hunk'>@@ -4597,7 +4612,7 @@ static bool kvm_is_vm_type_supported(unsigned long type)</div><div class='ctx'> 	return type &lt; 32 &amp;&amp; (kvm_caps.supported_vm_types &amp; BIT(type));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 kvm_sync_valid_fields(struct kvm *kvm)</div><div class='add'>+static inline u64 kvm_sync_valid_fields(struct kvm *kvm)</div><div class='ctx'> {</div><div class='ctx'> 	return kvm &amp;&amp; kvm-&gt;arch.has_protected_state ? 0 : KVM_SYNC_X86_VALID_FIELDS;</div><div class='ctx'> }</div><div class='hunk'>@@ -4737,6 +4752,8 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_MAX_VCPUS:</div><div class='ctx'> 		r = KVM_MAX_VCPUS;</div><div class='add'>+		if (kvm)</div><div class='add'>+			r = kvm-&gt;max_vcpus;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_MAX_VCPU_ID:</div><div class='ctx'> 		r = KVM_MAX_VCPU_IDS;</div><div class='hunk'>@@ -4792,7 +4809,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)</div><div class='ctx'> 		r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_DISABLE_QUIRKS2:</div><div class='del'>-		r = KVM_X86_VALID_QUIRKS;</div><div class='add'>+		r = kvm_caps.supported_quirks;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_X86_NOTIFY_VMEXIT:</div><div class='ctx'> 		r = kvm_caps.has_notify_vmexit;</div><div class='hunk'>@@ -5115,6 +5132,9 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)</div><div class='ctx'> static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,</div><div class='ctx'> 				    struct kvm_lapic_state *s)</div><div class='ctx'> {</div><div class='add'>+	if (vcpu-&gt;arch.apic-&gt;guest_apic_protected)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	kvm_x86_call(sync_pir_to_irr)(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	return kvm_apic_get_state(vcpu, s);</div><div class='hunk'>@@ -5125,6 +5145,9 @@ static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='add'>+	if (vcpu-&gt;arch.apic-&gt;guest_apic_protected)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	r = kvm_apic_set_state(vcpu, s);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='hunk'>@@ -6302,6 +6325,12 @@ long kvm_arch_vcpu_ioctl(struct file *filp,</div><div class='ctx'> 	case KVM_SET_DEVICE_ATTR:</div><div class='ctx'> 		r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);</div><div class='ctx'> 		break;</div><div class='add'>+	case KVM_MEMORY_ENCRYPT_OP:</div><div class='add'>+		r = -ENOTTY;</div><div class='add'>+		if (!kvm_x86_ops.vcpu_mem_enc_ioctl)</div><div class='add'>+			goto out;</div><div class='add'>+		r = kvm_x86_ops.vcpu_mem_enc_ioctl(vcpu, argp);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6489,7 +6518,7 @@ void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)</div><div class='ctx'> 	struct kvm_vcpu *vcpu;</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_x86_ops.cpu_dirty_log_size)</div><div class='add'>+	if (!kvm-&gt;arch.cpu_dirty_log_size)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	kvm_for_each_vcpu(i, vcpu, kvm)</div><div class='hunk'>@@ -6519,11 +6548,11 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,</div><div class='ctx'> 	switch (cap-&gt;cap) {</div><div class='ctx'> 	case KVM_CAP_DISABLE_QUIRKS2:</div><div class='ctx'> 		r = -EINVAL;</div><div class='del'>-		if (cap-&gt;args[0] &amp; ~KVM_X86_VALID_QUIRKS)</div><div class='add'>+		if (cap-&gt;args[0] &amp; ~kvm_caps.supported_quirks)</div><div class='ctx'> 			break;</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case KVM_CAP_DISABLE_QUIRKS:</div><div class='del'>-		kvm-&gt;arch.disabled_quirks = cap-&gt;args[0];</div><div class='add'>+		kvm-&gt;arch.disabled_quirks |= cap-&gt;args[0] &amp; kvm_caps.supported_quirks;</div><div class='ctx'> 		r = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVM_CAP_SPLIT_IRQCHIP: {</div><div class='hunk'>@@ -7298,10 +7327,6 @@ set_pit2_out:</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	case KVM_MEMORY_ENCRYPT_OP: {</div><div class='del'>-		r = -ENOTTY;</div><div class='del'>-		if (!kvm_x86_ops.mem_enc_ioctl)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='ctx'> 		r = kvm_x86_call(mem_enc_ioctl)(kvm, argp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9736,7 +9761,7 @@ int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)</div><div class='ctx'> 	 * with an exception.  PAT[0] is set to WB on RESET and also by the</div><div class='ctx'> 	 * kernel, i.e. failure indicates a kernel bug or broken firmware.</div><div class='ctx'> 	 */</div><div class='del'>-	if (rdmsrl_safe(MSR_IA32_CR_PAT, &amp;host_pat) ||</div><div class='add'>+	if (rdmsrq_safe(MSR_IA32_CR_PAT, &amp;host_pat) ||</div><div class='ctx'> 	    (host_pat &amp; GENMASK(2, 0)) != 6) {</div><div class='ctx'> 		pr_err("host PAT[0] is not WB\n");</div><div class='ctx'> 		return -EIO;</div><div class='hunk'>@@ -9769,16 +9794,18 @@ int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)</div><div class='ctx'> 		kvm_host.xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);</div><div class='ctx'> 		kvm_caps.supported_xcr0 = kvm_host.xcr0 &amp; KVM_SUPPORTED_XCR0;</div><div class='ctx'> 	}</div><div class='add'>+	kvm_caps.supported_quirks = KVM_X86_VALID_QUIRKS;</div><div class='add'>+	kvm_caps.inapplicable_quirks = KVM_X86_CONDITIONAL_QUIRKS;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_safe(MSR_EFER, &amp;kvm_host.efer);</div><div class='add'>+	rdmsrq_safe(MSR_EFER, &amp;kvm_host.efer);</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_XSAVES))</div><div class='del'>-		rdmsrl(MSR_IA32_XSS, kvm_host.xss);</div><div class='add'>+		rdmsrq(MSR_IA32_XSS, kvm_host.xss);</div><div class='ctx'> </div><div class='ctx'> 	kvm_init_pmu_capability(ops-&gt;pmu_ops);</div><div class='ctx'> </div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))</div><div class='del'>-		rdmsrl(MSR_IA32_ARCH_CAPABILITIES, kvm_host.arch_capabilities);</div><div class='add'>+		rdmsrq(MSR_IA32_ARCH_CAPABILITIES, kvm_host.arch_capabilities);</div><div class='ctx'> </div><div class='ctx'> 	r = ops-&gt;hardware_setup();</div><div class='ctx'> 	if (r != 0)</div><div class='hunk'>@@ -9813,6 +9840,10 @@ int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_KVM_SW_PROTECTED_VM) &amp;&amp; tdp_mmu_enabled)</div><div class='ctx'> 		kvm_caps.supported_vm_types |= BIT(KVM_X86_SW_PROTECTED_VM);</div><div class='ctx'> </div><div class='add'>+	/* KVM always ignores guest PAT for shadow paging.  */</div><div class='add'>+	if (!tdp_enabled)</div><div class='add'>+		kvm_caps.supported_quirks &amp;= ~KVM_X86_QUIRK_IGNORE_GUEST_PAT;</div><div class='add'>+</div><div class='ctx'> 	if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))</div><div class='ctx'> 		kvm_caps.supported_xss = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -10021,13 +10052,16 @@ static int complete_hypercall_exit(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	return kvm_skip_emulated_instruction(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ____kvm_emulate_hypercall(struct kvm_vcpu *vcpu, unsigned long nr,</div><div class='del'>-			      unsigned long a0, unsigned long a1,</div><div class='del'>-			      unsigned long a2, unsigned long a3,</div><div class='del'>-			      int op_64_bit, int cpl,</div><div class='add'>+int ____kvm_emulate_hypercall(struct kvm_vcpu *vcpu, int cpl,</div><div class='ctx'> 			      int (*complete_hypercall)(struct kvm_vcpu *))</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long ret;</div><div class='add'>+	unsigned long nr = kvm_rax_read(vcpu);</div><div class='add'>+	unsigned long a0 = kvm_rbx_read(vcpu);</div><div class='add'>+	unsigned long a1 = kvm_rcx_read(vcpu);</div><div class='add'>+	unsigned long a2 = kvm_rdx_read(vcpu);</div><div class='add'>+	unsigned long a3 = kvm_rsi_read(vcpu);</div><div class='add'>+	int op_64_bit = is_64_bit_hypercall(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	++vcpu-&gt;stat.hypercalls;</div><div class='ctx'> </div><div class='hunk'>@@ -10130,9 +10164,7 @@ int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	if (kvm_hv_hypercall_enabled(vcpu))</div><div class='ctx'> 		return kvm_hv_hypercall(vcpu);</div><div class='ctx'> </div><div class='del'>-	return __kvm_emulate_hypercall(vcpu, rax, rbx, rcx, rdx, rsi,</div><div class='del'>-				       is_64_bit_hypercall(vcpu),</div><div class='del'>-				       kvm_x86_call(get_cpl)(vcpu),</div><div class='add'>+	return __kvm_emulate_hypercall(vcpu, kvm_x86_call(get_cpl)(vcpu),</div><div class='ctx'> 				       complete_hypercall_exit);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);</div><div class='hunk'>@@ -10974,9 +11006,10 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		switch_fpu_return();</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu-&gt;arch.guest_fpu.xfd_err)</div><div class='del'>-		wrmsrl(MSR_IA32_XFD_ERR, vcpu-&gt;arch.guest_fpu.xfd_err);</div><div class='add'>+		wrmsrq(MSR_IA32_XFD_ERR, vcpu-&gt;arch.guest_fpu.xfd_err);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(vcpu-&gt;arch.switch_db_regs)) {</div><div class='add'>+	if (unlikely(vcpu-&gt;arch.switch_db_regs &amp;&amp;</div><div class='add'>+		     !(vcpu-&gt;arch.switch_db_regs &amp; KVM_DEBUGREG_AUTO_SWITCH))) {</div><div class='ctx'> 		set_debugreg(0, 7);</div><div class='ctx'> 		set_debugreg(vcpu-&gt;arch.eff_db[0], 0);</div><div class='ctx'> 		set_debugreg(vcpu-&gt;arch.eff_db[1], 1);</div><div class='hunk'>@@ -11028,6 +11061,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (unlikely(vcpu-&gt;arch.switch_db_regs &amp; KVM_DEBUGREG_WONT_EXIT)) {</div><div class='ctx'> 		WARN_ON(vcpu-&gt;guest_debug &amp; KVM_GUESTDBG_USE_HW_BP);</div><div class='add'>+		WARN_ON(vcpu-&gt;arch.switch_db_regs &amp; KVM_DEBUGREG_AUTO_SWITCH);</div><div class='ctx'> 		kvm_x86_call(sync_dirty_debug_regs)(vcpu);</div><div class='ctx'> 		kvm_update_dr0123(vcpu);</div><div class='ctx'> 		kvm_update_dr7(vcpu);</div><div class='hunk'>@@ -11060,7 +11094,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	kvm_x86_call(handle_exit_irqoff)(vcpu);</div><div class='ctx'> </div><div class='ctx'> 	if (vcpu-&gt;arch.guest_fpu.xfd_err)</div><div class='del'>-		wrmsrl(MSR_IA32_XFD_ERR, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_XFD_ERR, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Consume any pending interrupts, including the possible source of</div><div class='hunk'>@@ -11098,7 +11132,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Profile KVM exit RIPs:</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(prof_on == KVM_PROFILING)) {</div><div class='add'>+	if (unlikely(prof_on == KVM_PROFILING &amp;&amp;</div><div class='add'>+		     !vcpu-&gt;arch.guest_state_protected)) {</div><div class='ctx'> 		unsigned long rip = kvm_rip_read(vcpu);</div><div class='ctx'> 		profile_hit(KVM_PROFILING, (void *)rip);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -11131,7 +11166,7 @@ static bool kvm_vcpu_running(struct kvm_vcpu *vcpu)</div><div class='ctx'> 		!vcpu-&gt;arch.apf.halted);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)</div><div class='add'>+bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	if (!list_empty_careful(&amp;vcpu-&gt;async_pf.done))</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -11140,9 +11175,6 @@ static bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)</div><div class='ctx'> 	    kvm_apic_init_sipi_allowed(vcpu))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	if (vcpu-&gt;arch.pv.pv_unhalted)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='ctx'> 	if (kvm_is_exception_pending(vcpu))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='hunk'>@@ -11180,10 +11212,12 @@ static bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_vcpu_has_events);</div><div class='ctx'> </div><div class='ctx'> int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='del'>-	return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);</div><div class='add'>+	return kvm_vcpu_running(vcpu) || vcpu-&gt;arch.pv.pv_unhalted ||</div><div class='add'>+	       kvm_vcpu_has_events(vcpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Called within kvm-&gt;srcu read side.  */</div><div class='hunk'>@@ -11317,7 +11351,7 @@ static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)</div><div class='ctx'> 	 */</div><div class='ctx'> 	++vcpu-&gt;stat.halt_exits;</div><div class='ctx'> 	if (lapic_in_kernel(vcpu)) {</div><div class='del'>-		if (kvm_vcpu_has_events(vcpu))</div><div class='add'>+		if (kvm_vcpu_has_events(vcpu) || vcpu-&gt;arch.pv.pv_unhalted)</div><div class='ctx'> 			state = KVM_MP_STATE_RUNNABLE;</div><div class='ctx'> 		kvm_set_mp_state(vcpu, state);</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -11492,7 +11526,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_queued_exception *ex = &amp;vcpu-&gt;arch.exception;</div><div class='ctx'> 	struct kvm_run *kvm_run = vcpu-&gt;run;</div><div class='del'>-	u32 sync_valid_fields;</div><div class='add'>+	u64 sync_valid_fields;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	r = kvm_mmu_post_init_vm(vcpu-&gt;kvm);</div><div class='hunk'>@@ -11786,6 +11820,8 @@ int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,</div><div class='ctx'> 	if (kvm_mpx_supported())</div><div class='ctx'> 		kvm_load_guest_fpu(vcpu);</div><div class='ctx'> </div><div class='add'>+	kvm_vcpu_srcu_read_lock(vcpu);</div><div class='add'>+</div><div class='ctx'> 	r = kvm_apic_accept_events(vcpu);</div><div class='ctx'> 	if (r &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -11799,6 +11835,8 @@ int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,</div><div class='ctx'> 		mp_state-&gt;mp_state = vcpu-&gt;arch.mp_state;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='add'>+	kvm_vcpu_srcu_read_unlock(vcpu);</div><div class='add'>+</div><div class='ctx'> 	if (kvm_mpx_supported())</div><div class='ctx'> 		kvm_put_guest_fpu(vcpu);</div><div class='ctx'> 	vcpu_put(vcpu);</div><div class='hunk'>@@ -12687,6 +12725,7 @@ bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='ctx'> 	return vcpu-&gt;kvm-&gt;arch.bsp_vcpu_id == vcpu-&gt;vcpu_id;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);</div><div class='ctx'> </div><div class='ctx'> bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -12716,6 +12755,7 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)</div><div class='ctx'> 	/* Decided by the vendor code for other VM types.  */</div><div class='ctx'> 	kvm-&gt;arch.pre_fault_allowed =</div><div class='ctx'> 		type == KVM_X86_DEFAULT_VM || type == KVM_X86_SW_PROTECTED_VM;</div><div class='add'>+	kvm-&gt;arch.disabled_quirks = kvm_caps.inapplicable_quirks &amp; kvm_caps.supported_quirks;</div><div class='ctx'> </div><div class='ctx'> 	ret = kvm_page_track_init(kvm);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -12869,6 +12909,7 @@ void kvm_arch_pre_destroy_vm(struct kvm *kvm)</div><div class='ctx'> 	kvm_free_pit(kvm);</div><div class='ctx'> </div><div class='ctx'> 	kvm_mmu_pre_destroy_vm(kvm);</div><div class='add'>+	static_call_cond(kvm_x86_vm_pre_destroy)(kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void kvm_arch_destroy_vm(struct kvm *kvm)</div><div class='hunk'>@@ -13066,7 +13107,7 @@ static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	int nr_slots;</div><div class='ctx'> </div><div class='del'>-	if (!kvm_x86_ops.cpu_dirty_log_size)</div><div class='add'>+	if (!kvm-&gt;arch.cpu_dirty_log_size)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	nr_slots = atomic_read(&amp;kvm-&gt;nr_memslots_dirty_logging);</div><div class='hunk'>@@ -13138,7 +13179,7 @@ static void kvm_mmu_slot_apply_flags(struct kvm *kvm,</div><div class='ctx'> 		if (READ_ONCE(eager_page_split))</div><div class='ctx'> 			kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);</div><div class='ctx'> </div><div class='del'>-		if (kvm_x86_ops.cpu_dirty_log_size) {</div><div class='add'>+		if (kvm-&gt;arch.cpu_dirty_log_size) {</div><div class='ctx'> 			kvm_mmu_slot_leaf_clear_dirty(kvm, new);</div><div class='ctx'> 			kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -13527,8 +13568,10 @@ static void kvm_noncoherent_dma_assignment_start_or_stop(struct kvm *kvm)</div><div class='ctx'> 	 * due to toggling the "ignore PAT" bit.  Zap all SPTEs when the first</div><div class='ctx'> 	 * (or last) non-coherent device is (un)registered to so that new SPTEs</div><div class='ctx'> 	 * with the correct "ignore guest PAT" setting are created.</div><div class='add'>+	 *</div><div class='add'>+	 * If KVM always honors guest PAT, however, there is nothing to do.</div><div class='ctx'> 	 */</div><div class='del'>-	if (kvm_mmu_may_ignore_guest_pat())</div><div class='add'>+	if (kvm_check_has_quirk(kvm, KVM_X86_QUIRK_IGNORE_GUEST_PAT))</div><div class='ctx'> 		kvm_zap_gfn_range(kvm, gpa_to_gfn(0), gpa_to_gfn(~0ULL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -13552,25 +13595,27 @@ bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);</div><div class='ctx'> </div><div class='del'>-bool kvm_arch_has_irq_bypass(void)</div><div class='del'>-{</div><div class='del'>-	return enable_apicv &amp;&amp; irq_remapping_cap(IRQ_POSTING_CAP);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,</div><div class='ctx'> 				      struct irq_bypass_producer *prod)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvm_kernel_irqfd *irqfd =</div><div class='ctx'> 		container_of(cons, struct kvm_kernel_irqfd, consumer);</div><div class='add'>+	struct kvm *kvm = irqfd-&gt;kvm;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	irqfd-&gt;producer = prod;</div><div class='ctx'> 	kvm_arch_start_assignment(irqfd-&gt;kvm);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;kvm-&gt;irqfds.lock);</div><div class='add'>+	irqfd-&gt;producer = prod;</div><div class='add'>+</div><div class='ctx'> 	ret = kvm_x86_call(pi_update_irte)(irqfd-&gt;kvm,</div><div class='ctx'> 					   prod-&gt;irq, irqfd-&gt;gsi, 1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		kvm_arch_end_assignment(irqfd-&gt;kvm);</div><div class='ctx'> </div><div class='add'>+	spin_unlock_irq(&amp;kvm-&gt;irqfds.lock);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -13580,9 +13625,9 @@ void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct kvm_kernel_irqfd *irqfd =</div><div class='ctx'> 		container_of(cons, struct kvm_kernel_irqfd, consumer);</div><div class='add'>+	struct kvm *kvm = irqfd-&gt;kvm;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(irqfd-&gt;producer != prod);</div><div class='del'>-	irqfd-&gt;producer = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * When producer of consumer is unregistered, we change back to</div><div class='hunk'>@@ -13590,12 +13635,18 @@ void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,</div><div class='ctx'> 	 * when the irq is masked/disabled or the consumer side (KVM</div><div class='ctx'> 	 * int this case doesn't want to receive the interrupts.</div><div class='ctx'> 	*/</div><div class='add'>+	spin_lock_irq(&amp;kvm-&gt;irqfds.lock);</div><div class='add'>+	irqfd-&gt;producer = NULL;</div><div class='add'>+</div><div class='ctx'> 	ret = kvm_x86_call(pi_update_irte)(irqfd-&gt;kvm,</div><div class='ctx'> 					   prod-&gt;irq, irqfd-&gt;gsi, 0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		printk(KERN_INFO "irq bypass consumer (token %p) unregistration"</div><div class='ctx'> 		       " fails: %d\n", irqfd-&gt;consumer.token, ret);</div><div class='ctx'> </div><div class='add'>+	spin_unlock_irq(&amp;kvm-&gt;irqfds.lock);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 	kvm_arch_end_assignment(irqfd-&gt;kvm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -13608,7 +13659,8 @@ int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,</div><div class='ctx'> bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,</div><div class='ctx'> 				  struct kvm_kernel_irq_routing_entry *new)</div><div class='ctx'> {</div><div class='del'>-	if (new-&gt;type != KVM_IRQ_ROUTING_MSI)</div><div class='add'>+	if (old-&gt;type != KVM_IRQ_ROUTING_MSI ||</div><div class='add'>+	    new-&gt;type != KVM_IRQ_ROUTING_MSI)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	return !!memcmp(&amp;old-&gt;msi, &amp;new-&gt;msi, sizeof(new-&gt;msi));</div><div class='hunk'>@@ -13652,12 +13704,12 @@ int kvm_spec_ctrl_test_value(u64 value)</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &amp;saved_value))</div><div class='add'>+	if (rdmsrq_safe(MSR_IA32_SPEC_CTRL, &amp;saved_value))</div><div class='ctx'> 		ret = 1;</div><div class='del'>-	else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))</div><div class='add'>+	else if (wrmsrq_safe(MSR_IA32_SPEC_CTRL, value))</div><div class='ctx'> 		ret = 1;</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);</div><div class='add'>+		wrmsrq(MSR_IA32_SPEC_CTRL, saved_value);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> </div><div class='hunk'>@@ -13996,6 +14048,7 @@ EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);</div><div class='ctx'> </div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);</div><div class='add'>+EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_mmio);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);</div><div class='head'>diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h<br/>index 9dc32a409076..88a9475899c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/kvm/x86.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/kvm/x86.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/kvm/x86.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/kvm/x86.h</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include "kvm_emulate.h"</div><div class='ctx'> #include "cpuid.h"</div><div class='ctx'> </div><div class='add'>+#define KVM_MAX_MCE_BANKS 32</div><div class='add'>+</div><div class='ctx'> struct kvm_caps {</div><div class='ctx'> 	/* control of guest tsc rate supported? */</div><div class='ctx'> 	bool has_tsc_control;</div><div class='hunk'>@@ -32,6 +34,9 @@ struct kvm_caps {</div><div class='ctx'> 	u64 supported_xcr0;</div><div class='ctx'> 	u64 supported_xss;</div><div class='ctx'> 	u64 supported_perf_cap;</div><div class='add'>+</div><div class='add'>+	u64 supported_quirks;</div><div class='add'>+	u64 inapplicable_quirks;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct kvm_host_values {</div><div class='hunk'>@@ -629,25 +634,17 @@ static inline bool user_exit_on_hypercall(struct kvm *kvm, unsigned long hc_nr)</div><div class='ctx'> 	return kvm-&gt;arch.hypercall_exit_enabled &amp; BIT(hc_nr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ____kvm_emulate_hypercall(struct kvm_vcpu *vcpu, unsigned long nr,</div><div class='del'>-			      unsigned long a0, unsigned long a1,</div><div class='del'>-			      unsigned long a2, unsigned long a3,</div><div class='del'>-			      int op_64_bit, int cpl,</div><div class='add'>+int ____kvm_emulate_hypercall(struct kvm_vcpu *vcpu, int cpl,</div><div class='ctx'> 			      int (*complete_hypercall)(struct kvm_vcpu *));</div><div class='ctx'> </div><div class='del'>-#define __kvm_emulate_hypercall(_vcpu, nr, a0, a1, a2, a3, op_64_bit, cpl, complete_hypercall)	\</div><div class='del'>-({												\</div><div class='del'>-	int __ret;										\</div><div class='del'>-												\</div><div class='del'>-	__ret = ____kvm_emulate_hypercall(_vcpu,						\</div><div class='del'>-					  kvm_##nr##_read(_vcpu), kvm_##a0##_read(_vcpu),	\</div><div class='del'>-					  kvm_##a1##_read(_vcpu), kvm_##a2##_read(_vcpu),	\</div><div class='del'>-					  kvm_##a3##_read(_vcpu), op_64_bit, cpl,		\</div><div class='del'>-					  complete_hypercall);					\</div><div class='del'>-												\</div><div class='del'>-	if (__ret &gt; 0)										\</div><div class='del'>-		__ret = complete_hypercall(_vcpu);						\</div><div class='del'>-	__ret;											\</div><div class='add'>+#define __kvm_emulate_hypercall(_vcpu, cpl, complete_hypercall)			\</div><div class='add'>+({										\</div><div class='add'>+	int __ret;								\</div><div class='add'>+	__ret = ____kvm_emulate_hypercall(_vcpu, cpl, complete_hypercall);	\</div><div class='add'>+										\</div><div class='add'>+	if (__ret &gt; 0)								\</div><div class='add'>+		__ret = complete_hypercall(_vcpu);				\</div><div class='add'>+	__ret;									\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);</div><div class='head'>diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile<br/>index 1c50352eb49f..4fa5c4e1ba8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/Makefile</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> # Makefile for x86 specific library files.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+obj-y += crypto/</div><div class='add'>+</div><div class='ctx'> # Produces uninteresting flaky coverage.</div><div class='ctx'> KCOV_INSTRUMENT_delay.o	:= n</div><div class='ctx'> </div><div class='hunk'>@@ -39,14 +41,14 @@ lib-$(CONFIG_FUNCTION_ERROR_INJECTION)	+= error-inject.o</div><div class='ctx'> lib-$(CONFIG_MITIGATION_RETPOLINE) += retpoline.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC32_ARCH) += crc32-x86.o</div><div class='del'>-crc32-x86-y := crc32-glue.o crc32-pclmul.o</div><div class='add'>+crc32-x86-y := crc32.o crc32-pclmul.o</div><div class='ctx'> crc32-x86-$(CONFIG_64BIT) += crc32c-3way.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC64_ARCH) += crc64-x86.o</div><div class='del'>-crc64-x86-y := crc64-glue.o crc64-pclmul.o</div><div class='add'>+crc64-x86-y := crc64.o crc64-pclmul.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CRC_T10DIF_ARCH) += crc-t10dif-x86.o</div><div class='del'>-crc-t10dif-x86-y := crc-t10dif-glue.o crc16-msb-pclmul.o</div><div class='add'>+crc-t10dif-x86-y := crc-t10dif.o crc16-msb-pclmul.o</div><div class='ctx'> </div><div class='ctx'> obj-y += msr.o msr-reg.o msr-reg-export.o hweight.o</div><div class='ctx'> obj-y += iomem.o</div><div class='head'>diff --git a/arch/x86/lib/crc-t10dif-glue.c b/arch/x86/lib/crc-t10dif.c<br/>index f89c335cde3c..db7ce59c31ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/crc-t10dif-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crc-t10dif-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crc-t10dif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crc-t10dif.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include "crc-pclmul-template.h"</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_pclmulqdq);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pclmulqdq);</div><div class='ctx'> </div><div class='ctx'> DECLARE_CRC_PCLMUL_FUNCS(crc16_msb, u16);</div><div class='ctx'> </div><div class='hunk'>@@ -29,7 +29,7 @@ static int __init crc_t10dif_x86_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc_t10dif_x86_init);</div><div class='add'>+subsys_initcall(crc_t10dif_x86_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc_t10dif_x86_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/lib/crc32-glue.c b/arch/x86/lib/crc32.c<br/>index e3f93b17ac3f..d09343e2cea9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/crc32-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crc32-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crc32.c</a></div><div class='hunk'>@@ -11,8 +11,8 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include "crc-pclmul-template.h"</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_pclmulqdq);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pclmulqdq);</div><div class='ctx'> </div><div class='ctx'> DECLARE_CRC_PCLMUL_FUNCS(crc32_lsb, u32);</div><div class='ctx'> </div><div class='hunk'>@@ -88,7 +88,7 @@ static int __init crc32_x86_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc32_x86_init);</div><div class='add'>+subsys_initcall(crc32_x86_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc32_x86_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/lib/crc64-glue.c b/arch/x86/lib/crc64.c<br/>index b0e1b719ecbf..351a09f5813e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/crc64-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/crc64-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crc64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crc64.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include "crc-pclmul-template.h"</div><div class='ctx'> </div><div class='del'>-static DEFINE_STATIC_KEY_FALSE(have_pclmulqdq);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_pclmulqdq);</div><div class='ctx'> </div><div class='ctx'> DECLARE_CRC_PCLMUL_FUNCS(crc64_msb, u64);</div><div class='ctx'> DECLARE_CRC_PCLMUL_FUNCS(crc64_lsb, u64);</div><div class='hunk'>@@ -39,7 +39,7 @@ static int __init crc64_x86_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-arch_initcall(crc64_x86_init);</div><div class='add'>+subsys_initcall(crc64_x86_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crc64_x86_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/lib/crypto/.gitignore b/arch/x86/lib/crypto/.gitignore<br/>new file mode 100644<br/>index 000000000000..580c839bb177<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/.gitignore?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/.gitignore</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+poly1305-x86_64-cryptogams.S</div><div class='head'>diff --git a/arch/x86/lib/crypto/Kconfig b/arch/x86/lib/crypto/Kconfig<br/>new file mode 100644<br/>index 000000000000..5e94cdee492c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CRYPTO_BLAKE2S_X86</div><div class='add'>+	bool "Hash functions: BLAKE2s (SSSE3/AVX-512)"</div><div class='add'>+	depends on 64BIT</div><div class='add'>+	select CRYPTO_LIB_BLAKE2S_GENERIC</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_BLAKE2S</div><div class='add'>+	help</div><div class='add'>+	  BLAKE2s cryptographic hash function (RFC 7693)</div><div class='add'>+</div><div class='add'>+	  Architecture: x86_64 using:</div><div class='add'>+	  - SSSE3 (Supplemental SSE3)</div><div class='add'>+	  - AVX-512 (Advanced Vector Extensions-512)</div><div class='add'>+</div><div class='add'>+config CRYPTO_CHACHA20_X86_64</div><div class='add'>+	tristate</div><div class='add'>+	depends on 64BIT</div><div class='add'>+	default CRYPTO_LIB_CHACHA</div><div class='add'>+	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_CHACHA</div><div class='add'>+</div><div class='add'>+config CRYPTO_POLY1305_X86_64</div><div class='add'>+	tristate</div><div class='add'>+	depends on 64BIT</div><div class='add'>+	default CRYPTO_LIB_POLY1305</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_POLY1305</div><div class='add'>+</div><div class='add'>+config CRYPTO_SHA256_X86_64</div><div class='add'>+	tristate</div><div class='add'>+	depends on 64BIT</div><div class='add'>+	default CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256</div><div class='add'>+	select CRYPTO_ARCH_HAVE_LIB_SHA256_SIMD</div><div class='add'>+	select CRYPTO_LIB_SHA256_GENERIC</div><div class='head'>diff --git a/arch/x86/lib/crypto/Makefile b/arch/x86/lib/crypto/Makefile<br/>new file mode 100644<br/>index 000000000000..abceca3d31c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/Makefile</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_BLAKE2S_X86) += libblake2s-x86_64.o</div><div class='add'>+libblake2s-x86_64-y := blake2s-core.o blake2s-glue.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA20_X86_64) += chacha-x86_64.o</div><div class='add'>+chacha-x86_64-y := chacha-avx2-x86_64.o chacha-ssse3-x86_64.o chacha-avx512vl-x86_64.o chacha_glue.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_POLY1305_X86_64) += poly1305-x86_64.o</div><div class='add'>+poly1305-x86_64-y := poly1305-x86_64-cryptogams.o poly1305_glue.o</div><div class='add'>+targets += poly1305-x86_64-cryptogams.S</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256_X86_64) += sha256-x86_64.o</div><div class='add'>+sha256-x86_64-y := sha256.o sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256-ni-asm.o</div><div class='add'>+</div><div class='add'>+quiet_cmd_perlasm = PERLASM $@</div><div class='add'>+      cmd_perlasm = $(PERL) $&lt; &gt; $@</div><div class='add'>+</div><div class='add'>+$(obj)/%.S: $(src)/%.pl FORCE</div><div class='add'>+	$(call if_changed,perlasm)</div><div class='head'>diff --git a/arch/x86/crypto/blake2s-core.S b/arch/x86/lib/crypto/blake2s-core.S<br/>index b50b35ff1fdb..ac1c845445a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/blake2s-core.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/blake2s-core.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/blake2s-core.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/blake2s-core.S</a></div><div class='hunk'>@@ -29,7 +29,6 @@ SIGMA:</div><div class='ctx'> .byte 13,  7, 12,  3, 11, 14,  1,  9,  2,  5, 15,  8, 10,  0,  4,  6</div><div class='ctx'> .byte  6, 14, 11,  0, 15,  9,  3,  8, 10, 12, 13,  1,  5,  2,  7,  4</div><div class='ctx'> .byte 10,  8,  7,  1,  2,  4,  6,  5, 13, 15,  9,  3,  0, 11, 14, 12</div><div class='del'>-#ifdef CONFIG_AS_AVX512</div><div class='ctx'> .section .rodata.cst64.BLAKE2S_SIGMA2, "aM", @progbits, 640</div><div class='ctx'> .align 64</div><div class='ctx'> SIGMA2:</div><div class='hunk'>@@ -43,7 +42,6 @@ SIGMA2:</div><div class='ctx'> .long  6, 13,  0, 14, 12,  2,  1, 11, 15,  4,  5,  8,  7,  9,  3, 10</div><div class='ctx'> .long 15,  5,  4, 13, 10,  7,  3, 11, 12,  2,  0,  6,  9,  8,  1, 14</div><div class='ctx'> .long  8,  7, 14, 11, 13, 15,  0, 12, 10,  4,  5,  6,  3,  2,  1,  9</div><div class='del'>-#endif /* CONFIG_AS_AVX512 */</div><div class='ctx'> </div><div class='ctx'> .text</div><div class='ctx'> SYM_FUNC_START(blake2s_compress_ssse3)</div><div class='hunk'>@@ -174,7 +172,6 @@ SYM_FUNC_START(blake2s_compress_ssse3)</div><div class='ctx'> 	RET</div><div class='ctx'> SYM_FUNC_END(blake2s_compress_ssse3)</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_AS_AVX512</div><div class='ctx'> SYM_FUNC_START(blake2s_compress_avx512)</div><div class='ctx'> 	vmovdqu		(%rdi),%xmm0</div><div class='ctx'> 	vmovdqu		0x10(%rdi),%xmm1</div><div class='hunk'>@@ -253,4 +250,3 @@ SYM_FUNC_START(blake2s_compress_avx512)</div><div class='ctx'> 	vzeroupper</div><div class='ctx'> 	RET</div><div class='ctx'> SYM_FUNC_END(blake2s_compress_avx512)</div><div class='del'>-#endif /* CONFIG_AS_AVX512 */</div><div class='head'>diff --git a/arch/x86/crypto/blake2s-glue.c b/arch/x86/lib/crypto/blake2s-glue.c<br/>index 0313f9673f56..adc296cd17c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/blake2s-glue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/blake2s-glue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/blake2s-glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/blake2s-glue.c</a></div><div class='hunk'>@@ -3,17 +3,15 @@</div><div class='ctx'>  * Copyright (C) 2015-2019 Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;. All Rights Reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/internal/blake2s.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/jump_label.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/sizes.h&gt;</div><div class='del'>-</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='ctx'> #include &lt;asm/fpu/api.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;crypto/internal/blake2s.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='ctx'> </div><div class='ctx'> asmlinkage void blake2s_compress_ssse3(struct blake2s_state *state,</div><div class='ctx'> 				       const u8 *block, const size_t nblocks,</div><div class='hunk'>@@ -41,8 +39,7 @@ void blake2s_compress(struct blake2s_state *state, const u8 *block,</div><div class='ctx'> 					    SZ_4K / BLAKE2S_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 		kernel_fpu_begin();</div><div class='del'>-		if (IS_ENABLED(CONFIG_AS_AVX512) &amp;&amp;</div><div class='del'>-		    static_branch_likely(&amp;blake2s_use_avx512))</div><div class='add'>+		if (static_branch_likely(&amp;blake2s_use_avx512))</div><div class='ctx'> 			blake2s_compress_avx512(state, block, blocks, inc);</div><div class='ctx'> 		else</div><div class='ctx'> 			blake2s_compress_ssse3(state, block, blocks, inc);</div><div class='hunk'>@@ -59,8 +56,7 @@ static int __init blake2s_mod_init(void)</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_SSSE3))</div><div class='ctx'> 		static_branch_enable(&amp;blake2s_use_ssse3);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_AS_AVX512) &amp;&amp;</div><div class='del'>-	    boot_cpu_has(X86_FEATURE_AVX) &amp;&amp;</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp;</div><div class='ctx'> 	    boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='ctx'> 	    boot_cpu_has(X86_FEATURE_AVX512F) &amp;&amp;</div><div class='ctx'> 	    boot_cpu_has(X86_FEATURE_AVX512VL) &amp;&amp;</div><div class='head'>diff --git a/arch/x86/crypto/chacha-avx2-x86_64.S b/arch/x86/lib/crypto/chacha-avx2-x86_64.S<br/>index f3d8fc018249..f3d8fc018249 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/chacha-avx2-x86_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/chacha-avx2-x86_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/chacha-avx2-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/chacha-avx2-x86_64.S</a></div><div class='head'>diff --git a/arch/x86/crypto/chacha-avx512vl-x86_64.S b/arch/x86/lib/crypto/chacha-avx512vl-x86_64.S<br/>index 259383e1ad44..259383e1ad44 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/chacha-avx512vl-x86_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/chacha-avx512vl-x86_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/chacha-avx512vl-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/chacha-avx512vl-x86_64.S</a></div><div class='head'>diff --git a/arch/x86/crypto/chacha-ssse3-x86_64.S b/arch/x86/lib/crypto/chacha-ssse3-x86_64.S<br/>index 7111949cd5b9..7111949cd5b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/chacha-ssse3-x86_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/chacha-ssse3-x86_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/chacha-ssse3-x86_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/chacha-ssse3-x86_64.S</a></div><div class='head'>diff --git a/arch/x86/lib/crypto/chacha_glue.c b/arch/x86/lib/crypto/chacha_glue.c<br/>new file mode 100644<br/>index 000000000000..10b2c945f541<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/chacha_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/chacha_glue.c</a></div><div class='hunk'>@@ -0,0 +1,196 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * ChaCha and HChaCha functions (x86_64 optimized)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Martin Willi</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_block_xor_ssse3(const struct chacha_state *state,</div><div class='add'>+				       u8 *dst, const u8 *src,</div><div class='add'>+				       unsigned int len, int nrounds);</div><div class='add'>+asmlinkage void chacha_4block_xor_ssse3(const struct chacha_state *state,</div><div class='add'>+					u8 *dst, const u8 *src,</div><div class='add'>+					unsigned int len, int nrounds);</div><div class='add'>+asmlinkage void hchacha_block_ssse3(const struct chacha_state *state,</div><div class='add'>+				    u32 out[HCHACHA_OUT_WORDS], int nrounds);</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_2block_xor_avx2(const struct chacha_state *state,</div><div class='add'>+				       u8 *dst, const u8 *src,</div><div class='add'>+				       unsigned int len, int nrounds);</div><div class='add'>+asmlinkage void chacha_4block_xor_avx2(const struct chacha_state *state,</div><div class='add'>+				       u8 *dst, const u8 *src,</div><div class='add'>+				       unsigned int len, int nrounds);</div><div class='add'>+asmlinkage void chacha_8block_xor_avx2(const struct chacha_state *state,</div><div class='add'>+				       u8 *dst, const u8 *src,</div><div class='add'>+				       unsigned int len, int nrounds);</div><div class='add'>+</div><div class='add'>+asmlinkage void chacha_2block_xor_avx512vl(const struct chacha_state *state,</div><div class='add'>+					   u8 *dst, const u8 *src,</div><div class='add'>+					   unsigned int len, int nrounds);</div><div class='add'>+asmlinkage void chacha_4block_xor_avx512vl(const struct chacha_state *state,</div><div class='add'>+					   u8 *dst, const u8 *src,</div><div class='add'>+					   unsigned int len, int nrounds);</div><div class='add'>+asmlinkage void chacha_8block_xor_avx512vl(const struct chacha_state *state,</div><div class='add'>+					   u8 *dst, const u8 *src,</div><div class='add'>+					   unsigned int len, int nrounds);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_simd);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx2);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(chacha_use_avx512vl);</div><div class='add'>+</div><div class='add'>+static unsigned int chacha_advance(unsigned int len, unsigned int maxblocks)</div><div class='add'>+{</div><div class='add'>+	len = min(len, maxblocks * CHACHA_BLOCK_SIZE);</div><div class='add'>+	return round_up(len, CHACHA_BLOCK_SIZE) / CHACHA_BLOCK_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void chacha_dosimd(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+			  unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (static_branch_likely(&amp;chacha_use_avx512vl)) {</div><div class='add'>+		while (bytes &gt;= CHACHA_BLOCK_SIZE * 8) {</div><div class='add'>+			chacha_8block_xor_avx512vl(state, dst, src, bytes,</div><div class='add'>+						   nrounds);</div><div class='add'>+			bytes -= CHACHA_BLOCK_SIZE * 8;</div><div class='add'>+			src += CHACHA_BLOCK_SIZE * 8;</div><div class='add'>+			dst += CHACHA_BLOCK_SIZE * 8;</div><div class='add'>+			state-&gt;x[12] += 8;</div><div class='add'>+		}</div><div class='add'>+		if (bytes &gt; CHACHA_BLOCK_SIZE * 4) {</div><div class='add'>+			chacha_8block_xor_avx512vl(state, dst, src, bytes,</div><div class='add'>+						   nrounds);</div><div class='add'>+			state-&gt;x[12] += chacha_advance(bytes, 8);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		if (bytes &gt; CHACHA_BLOCK_SIZE * 2) {</div><div class='add'>+			chacha_4block_xor_avx512vl(state, dst, src, bytes,</div><div class='add'>+						   nrounds);</div><div class='add'>+			state-&gt;x[12] += chacha_advance(bytes, 4);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		if (bytes) {</div><div class='add'>+			chacha_2block_xor_avx512vl(state, dst, src, bytes,</div><div class='add'>+						   nrounds);</div><div class='add'>+			state-&gt;x[12] += chacha_advance(bytes, 2);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (static_branch_likely(&amp;chacha_use_avx2)) {</div><div class='add'>+		while (bytes &gt;= CHACHA_BLOCK_SIZE * 8) {</div><div class='add'>+			chacha_8block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='add'>+			bytes -= CHACHA_BLOCK_SIZE * 8;</div><div class='add'>+			src += CHACHA_BLOCK_SIZE * 8;</div><div class='add'>+			dst += CHACHA_BLOCK_SIZE * 8;</div><div class='add'>+			state-&gt;x[12] += 8;</div><div class='add'>+		}</div><div class='add'>+		if (bytes &gt; CHACHA_BLOCK_SIZE * 4) {</div><div class='add'>+			chacha_8block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='add'>+			state-&gt;x[12] += chacha_advance(bytes, 8);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		if (bytes &gt; CHACHA_BLOCK_SIZE * 2) {</div><div class='add'>+			chacha_4block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='add'>+			state-&gt;x[12] += chacha_advance(bytes, 4);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		if (bytes &gt; CHACHA_BLOCK_SIZE) {</div><div class='add'>+			chacha_2block_xor_avx2(state, dst, src, bytes, nrounds);</div><div class='add'>+			state-&gt;x[12] += chacha_advance(bytes, 2);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (bytes &gt;= CHACHA_BLOCK_SIZE * 4) {</div><div class='add'>+		chacha_4block_xor_ssse3(state, dst, src, bytes, nrounds);</div><div class='add'>+		bytes -= CHACHA_BLOCK_SIZE * 4;</div><div class='add'>+		src += CHACHA_BLOCK_SIZE * 4;</div><div class='add'>+		dst += CHACHA_BLOCK_SIZE * 4;</div><div class='add'>+		state-&gt;x[12] += 4;</div><div class='add'>+	}</div><div class='add'>+	if (bytes &gt; CHACHA_BLOCK_SIZE) {</div><div class='add'>+		chacha_4block_xor_ssse3(state, dst, src, bytes, nrounds);</div><div class='add'>+		state-&gt;x[12] += chacha_advance(bytes, 4);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (bytes) {</div><div class='add'>+		chacha_block_xor_ssse3(state, dst, src, bytes, nrounds);</div><div class='add'>+		state-&gt;x[12]++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hchacha_block_arch(const struct chacha_state *state,</div><div class='add'>+			u32 out[HCHACHA_OUT_WORDS], int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (!static_branch_likely(&amp;chacha_use_simd)) {</div><div class='add'>+		hchacha_block_generic(state, out, nrounds);</div><div class='add'>+	} else {</div><div class='add'>+		kernel_fpu_begin();</div><div class='add'>+		hchacha_block_ssse3(state, out, nrounds);</div><div class='add'>+		kernel_fpu_end();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hchacha_block_arch);</div><div class='add'>+</div><div class='add'>+void chacha_crypt_arch(struct chacha_state *state, u8 *dst, const u8 *src,</div><div class='add'>+		       unsigned int bytes, int nrounds)</div><div class='add'>+{</div><div class='add'>+	if (!static_branch_likely(&amp;chacha_use_simd) ||</div><div class='add'>+	    bytes &lt;= CHACHA_BLOCK_SIZE)</div><div class='add'>+		return chacha_crypt_generic(state, dst, src, bytes, nrounds);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		unsigned int todo = min_t(unsigned int, bytes, SZ_4K);</div><div class='add'>+</div><div class='add'>+		kernel_fpu_begin();</div><div class='add'>+		chacha_dosimd(state, dst, src, todo, nrounds);</div><div class='add'>+		kernel_fpu_end();</div><div class='add'>+</div><div class='add'>+		bytes -= todo;</div><div class='add'>+		src += todo;</div><div class='add'>+		dst += todo;</div><div class='add'>+	} while (bytes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_crypt_arch);</div><div class='add'>+</div><div class='add'>+bool chacha_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;chacha_use_simd);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(chacha_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init chacha_simd_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (!boot_cpu_has(X86_FEATURE_SSSE3))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	static_branch_enable(&amp;chacha_use_simd);</div><div class='add'>+</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp;</div><div class='add'>+	    boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='add'>+	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {</div><div class='add'>+		static_branch_enable(&amp;chacha_use_avx2);</div><div class='add'>+</div><div class='add'>+		if (boot_cpu_has(X86_FEATURE_AVX512VL) &amp;&amp;</div><div class='add'>+		    boot_cpu_has(X86_FEATURE_AVX512BW)) /* kmovq */</div><div class='add'>+			static_branch_enable(&amp;chacha_use_avx512vl);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(chacha_simd_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit chacha_simd_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(chacha_simd_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("ChaCha and HChaCha functions (x86_64 optimized)");</div><div class='head'>diff --git a/arch/x86/crypto/poly1305-x86_64-cryptogams.pl b/arch/x86/lib/crypto/poly1305-x86_64-cryptogams.pl<br/>index b9abcd79c1f4..501827254fed 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/poly1305-x86_64-cryptogams.pl?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/poly1305-x86_64-cryptogams.pl</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/poly1305-x86_64-cryptogams.pl?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/poly1305-x86_64-cryptogams.pl</a></div><div class='hunk'>@@ -118,6 +118,19 @@ sub declare_function() {</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+sub declare_typed_function() {</div><div class='add'>+	my ($name, $align, $nargs) = @_;</div><div class='add'>+	if($kernel) {</div><div class='add'>+		$code .= "SYM_TYPED_FUNC_START($name)\n";</div><div class='add'>+		$code .= ".L$name:\n";</div><div class='add'>+	} else {</div><div class='add'>+		$code .= ".globl	$name\n";</div><div class='add'>+		$code .= ".type	$name,\@function,$nargs\n";</div><div class='add'>+		$code .= ".align	$align\n";</div><div class='add'>+		$code .= "$name:\n";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> sub end_function() {</div><div class='ctx'> 	my ($name) = @_;</div><div class='ctx'> 	if($kernel) {</div><div class='hunk'>@@ -128,7 +141,7 @@ sub end_function() {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> $code.=&lt;&lt;___ if $kernel;</div><div class='del'>-#include &lt;linux/linkage.h&gt;</div><div class='add'>+#include &lt;linux/cfi_types.h&gt;</div><div class='ctx'> ___</div><div class='ctx'> </div><div class='ctx'> if ($avx) {</div><div class='hunk'>@@ -236,14 +249,14 @@ ___</div><div class='ctx'> $code.=&lt;&lt;___ if (!$kernel);</div><div class='ctx'> .extern	OPENSSL_ia32cap_P</div><div class='ctx'> </div><div class='del'>-.globl	poly1305_init_x86_64</div><div class='del'>-.hidden	poly1305_init_x86_64</div><div class='add'>+.globl	poly1305_block_init_arch</div><div class='add'>+.hidden	poly1305_block_init_arch</div><div class='ctx'> .globl	poly1305_blocks_x86_64</div><div class='ctx'> .hidden	poly1305_blocks_x86_64</div><div class='ctx'> .globl	poly1305_emit_x86_64</div><div class='ctx'> .hidden	poly1305_emit_x86_64</div><div class='ctx'> ___</div><div class='del'>-&amp;declare_function("poly1305_init_x86_64", 32, 3);</div><div class='add'>+&amp;declare_typed_function("poly1305_block_init_arch", 32, 3);</div><div class='ctx'> $code.=&lt;&lt;___;</div><div class='ctx'> 	xor	%eax,%eax</div><div class='ctx'> 	mov	%rax,0($ctx)		# initialize hash value</div><div class='hunk'>@@ -298,7 +311,7 @@ $code.=&lt;&lt;___;</div><div class='ctx'> .Lno_key:</div><div class='ctx'> 	RET</div><div class='ctx'> ___</div><div class='del'>-&amp;end_function("poly1305_init_x86_64");</div><div class='add'>+&amp;end_function("poly1305_block_init_arch");</div><div class='ctx'> </div><div class='ctx'> &amp;declare_function("poly1305_blocks_x86_64", 32, 4);</div><div class='ctx'> $code.=&lt;&lt;___;</div><div class='hunk'>@@ -2811,18 +2824,10 @@ if ($avx&gt;2) {</div><div class='ctx'> # reason stack layout is kept identical to poly1305_blocks_avx2. If not</div><div class='ctx'> # for this tail, we wouldn't have to even allocate stack frame...</div><div class='ctx'> </div><div class='del'>-if($kernel) {</div><div class='del'>-	$code .= "#ifdef CONFIG_AS_AVX512\n";</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> &amp;declare_function("poly1305_blocks_avx512", 32, 4);</div><div class='ctx'> poly1305_blocks_avxN(1);</div><div class='ctx'> &amp;end_function("poly1305_blocks_avx512");</div><div class='ctx'> </div><div class='del'>-if ($kernel) {</div><div class='del'>-	$code .= "#endif\n";</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> if (!$kernel &amp;&amp; $avx&gt;3) {</div><div class='ctx'> ########################################################################</div><div class='ctx'> # VPMADD52 version using 2^44 radix.</div><div class='hunk'>@@ -4113,9 +4118,9 @@ avx_handler:</div><div class='ctx'> </div><div class='ctx'> .section	.pdata</div><div class='ctx'> .align	4</div><div class='del'>-	.rva	.LSEH_begin_poly1305_init_x86_64</div><div class='del'>-	.rva	.LSEH_end_poly1305_init_x86_64</div><div class='del'>-	.rva	.LSEH_info_poly1305_init_x86_64</div><div class='add'>+	.rva	.LSEH_begin_poly1305_block_init_arch</div><div class='add'>+	.rva	.LSEH_end_poly1305_block_init_arch</div><div class='add'>+	.rva	.LSEH_info_poly1305_block_init_arch</div><div class='ctx'> </div><div class='ctx'> 	.rva	.LSEH_begin_poly1305_blocks_x86_64</div><div class='ctx'> 	.rva	.LSEH_end_poly1305_blocks_x86_64</div><div class='hunk'>@@ -4163,10 +4168,10 @@ ___</div><div class='ctx'> $code.=&lt;&lt;___;</div><div class='ctx'> .section	.xdata</div><div class='ctx'> .align	8</div><div class='del'>-.LSEH_info_poly1305_init_x86_64:</div><div class='add'>+.LSEH_info_poly1305_block_init_arch:</div><div class='ctx'> 	.byte	9,0,0,0</div><div class='ctx'> 	.rva	se_handler</div><div class='del'>-	.rva	.LSEH_begin_poly1305_init_x86_64,.LSEH_begin_poly1305_init_x86_64</div><div class='add'>+	.rva	.LSEH_begin_poly1305_block_init_arch,.LSEH_begin_poly1305_block_init_arch</div><div class='ctx'> </div><div class='ctx'> .LSEH_info_poly1305_blocks_x86_64:</div><div class='ctx'> 	.byte	9,0,0,0</div><div class='head'>diff --git a/arch/x86/lib/crypto/poly1305_glue.c b/arch/x86/lib/crypto/poly1305_glue.c<br/>new file mode 100644<br/>index 000000000000..b7e78a583e07<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/poly1305_glue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/poly1305_glue.c</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2015-2019 Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;. All Rights Reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;crypto/internal/poly1305.h&gt;</div><div class='add'>+#include &lt;linux/jump_label.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+struct poly1305_arch_internal {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u32 h[5];</div><div class='add'>+			u32 is_base2_26;</div><div class='add'>+		};</div><div class='add'>+		u64 hs[3];</div><div class='add'>+	};</div><div class='add'>+	u64 r[2];</div><div class='add'>+	u64 pad;</div><div class='add'>+	struct { u32 r2, r1, r4, r3; } rn[9];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+asmlinkage void poly1305_block_init_arch(</div><div class='add'>+	struct poly1305_block_state *state,</div><div class='add'>+	const u8 raw_key[POLY1305_BLOCK_SIZE]);</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_block_init_arch);</div><div class='add'>+asmlinkage void poly1305_blocks_x86_64(struct poly1305_arch_internal *ctx,</div><div class='add'>+				       const u8 *inp,</div><div class='add'>+				       const size_t len, const u32 padbit);</div><div class='add'>+asmlinkage void poly1305_emit_x86_64(const struct poly1305_state *ctx,</div><div class='add'>+				     u8 mac[POLY1305_DIGEST_SIZE],</div><div class='add'>+				     const u32 nonce[4]);</div><div class='add'>+asmlinkage void poly1305_emit_avx(const struct poly1305_state *ctx,</div><div class='add'>+				  u8 mac[POLY1305_DIGEST_SIZE],</div><div class='add'>+				  const u32 nonce[4]);</div><div class='add'>+asmlinkage void poly1305_blocks_avx(struct poly1305_arch_internal *ctx,</div><div class='add'>+				    const u8 *inp, const size_t len,</div><div class='add'>+				    const u32 padbit);</div><div class='add'>+asmlinkage void poly1305_blocks_avx2(struct poly1305_arch_internal *ctx,</div><div class='add'>+				     const u8 *inp, const size_t len,</div><div class='add'>+				     const u32 padbit);</div><div class='add'>+asmlinkage void poly1305_blocks_avx512(struct poly1305_arch_internal *ctx,</div><div class='add'>+				       const u8 *inp,</div><div class='add'>+				       const size_t len, const u32 padbit);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx2);</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(poly1305_use_avx512);</div><div class='add'>+</div><div class='add'>+void poly1305_blocks_arch(struct poly1305_block_state *state, const u8 *inp,</div><div class='add'>+			  unsigned int len, u32 padbit)</div><div class='add'>+{</div><div class='add'>+	struct poly1305_arch_internal *ctx =</div><div class='add'>+		container_of(&amp;state-&gt;h.h, struct poly1305_arch_internal, h);</div><div class='add'>+</div><div class='add'>+	/* SIMD disables preemption, so relax after processing each page. */</div><div class='add'>+	BUILD_BUG_ON(SZ_4K &lt; POLY1305_BLOCK_SIZE ||</div><div class='add'>+		     SZ_4K % POLY1305_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	if (!static_branch_likely(&amp;poly1305_use_avx)) {</div><div class='add'>+		poly1305_blocks_x86_64(ctx, inp, len, padbit);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		const unsigned int bytes = min(len, SZ_4K);</div><div class='add'>+</div><div class='add'>+		kernel_fpu_begin();</div><div class='add'>+		if (static_branch_likely(&amp;poly1305_use_avx512))</div><div class='add'>+			poly1305_blocks_avx512(ctx, inp, bytes, padbit);</div><div class='add'>+		else if (static_branch_likely(&amp;poly1305_use_avx2))</div><div class='add'>+			poly1305_blocks_avx2(ctx, inp, bytes, padbit);</div><div class='add'>+		else</div><div class='add'>+			poly1305_blocks_avx(ctx, inp, bytes, padbit);</div><div class='add'>+		kernel_fpu_end();</div><div class='add'>+</div><div class='add'>+		len -= bytes;</div><div class='add'>+		inp += bytes;</div><div class='add'>+	} while (len);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_blocks_arch);</div><div class='add'>+</div><div class='add'>+void poly1305_emit_arch(const struct poly1305_state *ctx,</div><div class='add'>+			u8 mac[POLY1305_DIGEST_SIZE], const u32 nonce[4])</div><div class='add'>+{</div><div class='add'>+	if (!static_branch_likely(&amp;poly1305_use_avx))</div><div class='add'>+		poly1305_emit_x86_64(ctx, mac, nonce);</div><div class='add'>+	else</div><div class='add'>+		poly1305_emit_avx(ctx, mac, nonce);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(poly1305_emit_arch);</div><div class='add'>+</div><div class='add'>+bool poly1305_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;poly1305_use_avx);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(poly1305_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init poly1305_simd_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp;</div><div class='add'>+	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))</div><div class='add'>+		static_branch_enable(&amp;poly1305_use_avx);</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp; boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='add'>+	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))</div><div class='add'>+		static_branch_enable(&amp;poly1305_use_avx2);</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_AVX) &amp;&amp; boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='add'>+	    boot_cpu_has(X86_FEATURE_AVX512F) &amp;&amp;</div><div class='add'>+	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM | XFEATURE_MASK_AVX512, NULL) &amp;&amp;</div><div class='add'>+	    /* Skylake downclocks unacceptably much when using zmm, but later generations are fast. */</div><div class='add'>+	    boot_cpu_data.x86_vfm != INTEL_SKYLAKE_X)</div><div class='add'>+		static_branch_enable(&amp;poly1305_use_avx512);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(poly1305_simd_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit poly1305_simd_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(poly1305_simd_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Poly1305 authenticator");</div><div class='head'>diff --git a/arch/x86/crypto/sha256-avx-asm.S b/arch/x86/lib/crypto/sha256-avx-asm.S<br/>index 53de72bdd851..0d7b2c3e45d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256-avx-asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha256-avx-asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/sha256-avx-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/sha256-avx-asm.S</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> ########################################################################</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/objtool.h&gt;</div><div class='ctx'> </div><div class='ctx'> ## assume buffers not aligned</div><div class='ctx'> #define    VMOVDQ vmovdqu</div><div class='hunk'>@@ -341,13 +341,13 @@ a = TMP_</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> ########################################################################</div><div class='del'>-## void sha256_transform_avx(state sha256_state *state, const u8 *data, int blocks)</div><div class='del'>-## arg 1 : pointer to state</div><div class='del'>-## arg 2 : pointer to input data</div><div class='del'>-## arg 3 : Num blocks</div><div class='add'>+## void sha256_transform_avx(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+##			     const u8 *data, size_t nblocks);</div><div class='ctx'> ########################################################################</div><div class='ctx'> .text</div><div class='del'>-SYM_TYPED_FUNC_START(sha256_transform_avx)</div><div class='add'>+SYM_FUNC_START(sha256_transform_avx)</div><div class='add'>+	ANNOTATE_NOENDBR	# since this is called only via static_call</div><div class='add'>+</div><div class='ctx'> 	pushq   %rbx</div><div class='ctx'> 	pushq   %r12</div><div class='ctx'> 	pushq   %r13</div><div class='head'>diff --git a/arch/x86/crypto/sha256-avx2-asm.S b/arch/x86/lib/crypto/sha256-avx2-asm.S<br/>index 0bbec1c75cd0..25d3380321ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256-avx2-asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha256-avx2-asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/sha256-avx2-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/sha256-avx2-asm.S</a></div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> ########################################################################</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/objtool.h&gt;</div><div class='ctx'> </div><div class='ctx'> ## assume buffers not aligned</div><div class='ctx'> #define	VMOVDQ vmovdqu</div><div class='hunk'>@@ -518,13 +518,13 @@ STACK_SIZE	= _CTX      + _CTX_SIZE</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> ########################################################################</div><div class='del'>-## void sha256_transform_rorx(struct sha256_state *state, const u8 *data, int blocks)</div><div class='del'>-## arg 1 : pointer to state</div><div class='del'>-## arg 2 : pointer to input data</div><div class='del'>-## arg 3 : Num blocks</div><div class='add'>+## void sha256_transform_rorx(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+##			      const u8 *data, size_t nblocks);</div><div class='ctx'> ########################################################################</div><div class='ctx'> .text</div><div class='del'>-SYM_TYPED_FUNC_START(sha256_transform_rorx)</div><div class='add'>+SYM_FUNC_START(sha256_transform_rorx)</div><div class='add'>+	ANNOTATE_NOENDBR	# since this is called only via static_call</div><div class='add'>+</div><div class='ctx'> 	pushq	%rbx</div><div class='ctx'> 	pushq	%r12</div><div class='ctx'> 	pushq	%r13</div><div class='head'>diff --git a/arch/x86/crypto/sha256_ni_asm.S b/arch/x86/lib/crypto/sha256-ni-asm.S<br/>index d515a55a3bc1..d3548206cf3d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256_ni_asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha256_ni_asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/sha256-ni-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/sha256-ni-asm.S</a></div><div class='hunk'>@@ -54,9 +54,9 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/objtool.h&gt;</div><div class='ctx'> </div><div class='del'>-#define DIGEST_PTR	%rdi	/* 1st arg */</div><div class='add'>+#define STATE_PTR	%rdi	/* 1st arg */</div><div class='ctx'> #define DATA_PTR	%rsi	/* 2nd arg */</div><div class='ctx'> #define NUM_BLKS	%rdx	/* 3rd arg */</div><div class='ctx'> </div><div class='hunk'>@@ -98,24 +98,20 @@</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Intel SHA Extensions optimized implementation of a SHA-256 update function</div><div class='add'>+ * Intel SHA Extensions optimized implementation of a SHA-256 block function</div><div class='ctx'>  *</div><div class='del'>- * The function takes a pointer to the current hash values, a pointer to the</div><div class='del'>- * input data, and a number of 64 byte blocks to process.  Once all blocks have</div><div class='del'>- * been processed, the digest pointer is  updated with the resulting hash value.</div><div class='del'>- * The function only processes complete blocks, there is no functionality to</div><div class='del'>- * store partial blocks.  All message padding and hash value initialization must</div><div class='del'>- * be done outside the update function.</div><div class='add'>+ * This function takes a pointer to the current SHA-256 state, a pointer to the</div><div class='add'>+ * input data, and the number of 64-byte blocks to process.  Once all blocks</div><div class='add'>+ * have been processed, the state is updated with the new state.  This function</div><div class='add'>+ * only processes complete blocks.  State initialization, buffering of partial</div><div class='add'>+ * blocks, and digest finalization is expected to be handled elsewhere.</div><div class='ctx'>  *</div><div class='del'>- * void sha256_ni_transform(uint32_t *digest, const void *data,</div><div class='del'>-		uint32_t numBlocks);</div><div class='del'>- * digest : pointer to digest</div><div class='del'>- * data: pointer to input data</div><div class='del'>- * numBlocks: Number of blocks to process</div><div class='add'>+ * void sha256_ni_transform(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+ *			    const u8 *data, size_t nblocks);</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> .text</div><div class='del'>-SYM_TYPED_FUNC_START(sha256_ni_transform)</div><div class='add'>+SYM_FUNC_START(sha256_ni_transform)</div><div class='add'>+	ANNOTATE_NOENDBR	# since this is called only via static_call</div><div class='ctx'> </div><div class='ctx'> 	shl		$6, NUM_BLKS		/*  convert to bytes */</div><div class='ctx'> 	jz		.Ldone_hash</div><div class='hunk'>@@ -126,8 +122,8 @@ SYM_TYPED_FUNC_START(sha256_ni_transform)</div><div class='ctx'> 	 * Need to reorder these appropriately</div><div class='ctx'> 	 * DCBA, HGFE -&gt; ABEF, CDGH</div><div class='ctx'> 	 */</div><div class='del'>-	movdqu		0*16(DIGEST_PTR), STATE0	/* DCBA */</div><div class='del'>-	movdqu		1*16(DIGEST_PTR), STATE1	/* HGFE */</div><div class='add'>+	movdqu		0*16(STATE_PTR), STATE0		/* DCBA */</div><div class='add'>+	movdqu		1*16(STATE_PTR), STATE1		/* HGFE */</div><div class='ctx'> </div><div class='ctx'> 	movdqa		STATE0, TMP</div><div class='ctx'> 	punpcklqdq	STATE1, STATE0			/* FEBA */</div><div class='hunk'>@@ -166,8 +162,8 @@ SYM_TYPED_FUNC_START(sha256_ni_transform)</div><div class='ctx'> 	pshufd		$0xB1, STATE0, STATE0		/* HGFE */</div><div class='ctx'> 	pshufd		$0x1B, STATE1, STATE1		/* DCBA */</div><div class='ctx'> </div><div class='del'>-	movdqu		STATE1, 0*16(DIGEST_PTR)</div><div class='del'>-	movdqu		STATE0, 1*16(DIGEST_PTR)</div><div class='add'>+	movdqu		STATE1, 0*16(STATE_PTR)</div><div class='add'>+	movdqu		STATE0, 1*16(STATE_PTR)</div><div class='ctx'> </div><div class='ctx'> .Ldone_hash:</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/crypto/sha256-ssse3-asm.S b/arch/x86/lib/crypto/sha256-ssse3-asm.S<br/>index 93264ee44543..7f24a4cdcb25 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/crypto/sha256-ssse3-asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/crypto/sha256-ssse3-asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/sha256-ssse3-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/sha256-ssse3-asm.S</a></div><div class='hunk'>@@ -47,7 +47,7 @@</div><div class='ctx'> ########################################################################</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/linkage.h&gt;</div><div class='del'>-#include &lt;linux/cfi_types.h&gt;</div><div class='add'>+#include &lt;linux/objtool.h&gt;</div><div class='ctx'> </div><div class='ctx'> ## assume buffers not aligned</div><div class='ctx'> #define    MOVDQ movdqu</div><div class='hunk'>@@ -348,15 +348,13 @@ a = TMP_</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> ########################################################################</div><div class='del'>-## void sha256_transform_ssse3(struct sha256_state *state, const u8 *data,</div><div class='del'>-##			       int blocks);</div><div class='del'>-## arg 1 : pointer to state</div><div class='del'>-##	   (struct sha256_state is assumed to begin with u32 state[8])</div><div class='del'>-## arg 2 : pointer to input data</div><div class='del'>-## arg 3 : Num blocks</div><div class='add'>+## void sha256_transform_ssse3(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+##			       const u8 *data, size_t nblocks);</div><div class='ctx'> ########################################################################</div><div class='ctx'> .text</div><div class='del'>-SYM_TYPED_FUNC_START(sha256_transform_ssse3)</div><div class='add'>+SYM_FUNC_START(sha256_transform_ssse3)</div><div class='add'>+	ANNOTATE_NOENDBR	# since this is called only via static_call</div><div class='add'>+</div><div class='ctx'> 	pushq   %rbx</div><div class='ctx'> 	pushq   %r12</div><div class='ctx'> 	pushq   %r13</div><div class='head'>diff --git a/arch/x86/lib/crypto/sha256.c b/arch/x86/lib/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..80380f8fdcee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * SHA-256 optimized for x86_64</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025 Google LLC</div><div class='add'>+ */</div><div class='add'>+#include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/static_call.h&gt;</div><div class='add'>+</div><div class='add'>+asmlinkage void sha256_transform_ssse3(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				       const u8 *data, size_t nblocks);</div><div class='add'>+asmlinkage void sha256_transform_avx(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				     const u8 *data, size_t nblocks);</div><div class='add'>+asmlinkage void sha256_transform_rorx(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				      const u8 *data, size_t nblocks);</div><div class='add'>+asmlinkage void sha256_ni_transform(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+				    const u8 *data, size_t nblocks);</div><div class='add'>+</div><div class='add'>+static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_sha256_x86);</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_CALL(sha256_blocks_x86, sha256_transform_ssse3);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_simd(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	if (static_branch_likely(&amp;have_sha256_x86)) {</div><div class='add'>+		kernel_fpu_begin();</div><div class='add'>+		static_call(sha256_blocks_x86)(state, data, nblocks);</div><div class='add'>+		kernel_fpu_end();</div><div class='add'>+	} else {</div><div class='add'>+		sha256_blocks_generic(state, data, nblocks);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_simd);</div><div class='add'>+</div><div class='add'>+void sha256_blocks_arch(u32 state[SHA256_STATE_WORDS],</div><div class='add'>+			const u8 *data, size_t nblocks)</div><div class='add'>+{</div><div class='add'>+	sha256_blocks_generic(state, data, nblocks);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_blocks_arch);</div><div class='add'>+</div><div class='add'>+bool sha256_is_arch_optimized(void)</div><div class='add'>+{</div><div class='add'>+	return static_key_enabled(&amp;have_sha256_x86);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_is_arch_optimized);</div><div class='add'>+</div><div class='add'>+static int __init sha256_x86_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_SHA_NI)) {</div><div class='add'>+		static_call_update(sha256_blocks_x86, sha256_ni_transform);</div><div class='add'>+	} else if (cpu_has_xfeatures(XFEATURE_MASK_SSE |</div><div class='add'>+				     XFEATURE_MASK_YMM, NULL) &amp;&amp;</div><div class='add'>+		   boot_cpu_has(X86_FEATURE_AVX)) {</div><div class='add'>+		if (boot_cpu_has(X86_FEATURE_AVX2) &amp;&amp;</div><div class='add'>+		    boot_cpu_has(X86_FEATURE_BMI2))</div><div class='add'>+			static_call_update(sha256_blocks_x86,</div><div class='add'>+					   sha256_transform_rorx);</div><div class='add'>+		else</div><div class='add'>+			static_call_update(sha256_blocks_x86,</div><div class='add'>+					   sha256_transform_avx);</div><div class='add'>+	} else if (!boot_cpu_has(X86_FEATURE_SSSE3)) {</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	static_branch_enable(&amp;have_sha256_x86);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(sha256_x86_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit sha256_x86_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+module_exit(sha256_x86_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("SHA-256 optimized for x86_64");</div><div class='head'>diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c<br/>index e86eda2c0b04..eb2d2e1cbddd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/delay.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/delay.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/delay.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/delay.c</a></div><div class='hunk'>@@ -75,7 +75,7 @@ static void delay_tsc(u64 cycles)</div><div class='ctx'> </div><div class='ctx'> 		/* Allow RT tasks to run */</div><div class='ctx'> 		preempt_enable();</div><div class='del'>-		rep_nop();</div><div class='add'>+		native_pause();</div><div class='ctx'> 		preempt_disable();</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='head'>diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c<br/>index 98631c0e7a11..4e385cbfd444 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/insn-eval.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/insn-eval.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/insn-eval.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/insn-eval.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;asm/insn.h&gt;</div><div class='ctx'> #include &lt;asm/insn-eval.h&gt;</div><div class='ctx'> #include &lt;asm/ldt.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/vm86.h&gt;</div><div class='ctx'> </div><div class='ctx'> #undef pr_fmt</div><div class='hunk'>@@ -631,14 +632,21 @@ static bool get_desc(struct desc_struct *out, unsigned short sel)</div><div class='ctx'> 		/* Bits [15:3] contain the index of the desired entry. */</div><div class='ctx'> 		sel &gt;&gt;= 3;</div><div class='ctx'> </div><div class='del'>-		mutex_lock(&amp;current-&gt;active_mm-&gt;context.lock);</div><div class='del'>-		ldt = current-&gt;active_mm-&gt;context.ldt;</div><div class='add'>+		/*</div><div class='add'>+		 * If we're not in a valid context with a real (not just lazy)</div><div class='add'>+		 * user mm, then don't even try.</div><div class='add'>+		 */</div><div class='add'>+		if (!nmi_uaccess_okay())</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;current-&gt;mm-&gt;context.lock);</div><div class='add'>+		ldt = current-&gt;mm-&gt;context.ldt;</div><div class='ctx'> 		if (ldt &amp;&amp; sel &lt; ldt-&gt;nr_entries) {</div><div class='ctx'> 			*out = ldt-&gt;entries[sel];</div><div class='ctx'> 			success = true;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		mutex_unlock(&amp;current-&gt;active_mm-&gt;context.lock);</div><div class='add'>+		mutex_unlock(&amp;current-&gt;mm-&gt;context.lock);</div><div class='ctx'> </div><div class='ctx'> 		return success;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -702,16 +710,16 @@ unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)</div><div class='ctx'> 		unsigned long base;</div><div class='ctx'> </div><div class='ctx'> 		if (seg_reg_idx == INAT_SEG_REG_FS) {</div><div class='del'>-			rdmsrl(MSR_FS_BASE, base);</div><div class='add'>+			rdmsrq(MSR_FS_BASE, base);</div><div class='ctx'> 		} else if (seg_reg_idx == INAT_SEG_REG_GS) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * swapgs was called at the kernel entry point. Thus,</div><div class='ctx'> 			 * MSR_KERNEL_GS_BASE will have the user-space GS base.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (user_mode(regs))</div><div class='del'>-				rdmsrl(MSR_KERNEL_GS_BASE, base);</div><div class='add'>+				rdmsrq(MSR_KERNEL_GS_BASE, base);</div><div class='ctx'> 			else</div><div class='del'>-				rdmsrl(MSR_GS_BASE, base);</div><div class='add'>+				rdmsrq(MSR_GS_BASE, base);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			base = 0;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/arch/x86/lib/insn.c b/arch/x86/lib/insn.c<br/>index 6ffb931b9fb1..149a57e334ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/insn.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/insn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/insn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/insn.c</a></div><div class='hunk'>@@ -324,6 +324,11 @@ int insn_get_opcode(struct insn *insn)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	insn-&gt;attr = inat_get_opcode_attribute(op);</div><div class='add'>+	if (insn-&gt;x86_64 &amp;&amp; inat_is_invalid64(insn-&gt;attr)) {</div><div class='add'>+		/* This instruction is invalid, like UD2. Stop decoding. */</div><div class='add'>+		insn-&gt;attr &amp;= INAT_INV64;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	while (inat_is_escape(insn-&gt;attr)) {</div><div class='ctx'> 		/* Get escaped opcode */</div><div class='ctx'> 		op = get_next(insn_byte_t, insn);</div><div class='hunk'>@@ -337,6 +342,7 @@ int insn_get_opcode(struct insn *insn)</div><div class='ctx'> 		insn-&gt;attr = 0;</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> end:</div><div class='ctx'> 	opcode-&gt;got = 1;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -658,7 +664,6 @@ int insn_get_immediate(struct insn *insn)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!inat_has_immediate(insn-&gt;attr))</div><div class='del'>-		/* no immediates */</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	switch (inat_immediate_size(insn-&gt;attr)) {</div><div class='head'>diff --git a/arch/x86/lib/iomem.c b/arch/x86/lib/iomem.c<br/>index 5eecb45d05d5..c20e04764edc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/iomem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/iomem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/iomem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/iomem.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> static __always_inline void rep_movs(void *to, const void *from, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long d0, d1, d2;</div><div class='del'>-	asm volatile("rep ; movsl\n\t"</div><div class='add'>+	asm volatile("rep movsl\n\t"</div><div class='ctx'> 		     "testb $2,%b4\n\t"</div><div class='ctx'> 		     "je 1f\n\t"</div><div class='ctx'> 		     "movsw\n"</div><div class='head'>diff --git a/arch/x86/lib/kaslr.c b/arch/x86/lib/kaslr.c<br/>index a58f451a7dd3..b5893928d55c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/kaslr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/kaslr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/kaslr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/kaslr.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/kaslr.h&gt;</div><div class='del'>-#include &lt;asm/msr.h&gt;</div><div class='add'>+#include &lt;asm/tsc.h&gt;</div><div class='ctx'> #include &lt;asm/archrandom.h&gt;</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='ctx'> #include &lt;asm/shared/io.h&gt;</div><div class='head'>diff --git a/arch/x86/lib/memcpy_64.S b/arch/x86/lib/memcpy_64.S<br/>index 0ae2e1712e2e..12a23fa7c44c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/memcpy_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/memcpy_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/memcpy_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/memcpy_64.S</a></div><div class='hunk'>@@ -41,6 +41,7 @@ SYM_FUNC_END(__memcpy)</div><div class='ctx'> EXPORT_SYMBOL(__memcpy)</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_ALIAS_MEMFUNC(memcpy, __memcpy)</div><div class='add'>+SYM_PIC_ALIAS(memcpy)</div><div class='ctx'> EXPORT_SYMBOL(memcpy)</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_START_LOCAL(memcpy_orig)</div><div class='head'>diff --git a/arch/x86/lib/memset_64.S b/arch/x86/lib/memset_64.S<br/>index d66b710d628f..fb5a03cf5ab7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/memset_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/memset_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/memset_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/memset_64.S</a></div><div class='hunk'>@@ -42,6 +42,7 @@ SYM_FUNC_END(__memset)</div><div class='ctx'> EXPORT_SYMBOL(__memset)</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_ALIAS_MEMFUNC(memset, __memset)</div><div class='add'>+SYM_PIC_ALIAS(memset)</div><div class='ctx'> EXPORT_SYMBOL(memset)</div><div class='ctx'> </div><div class='ctx'> SYM_FUNC_START_LOCAL(memset_orig)</div><div class='head'>diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c<br/>index acd463d887e1..b8f63419e6ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/msr-smp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/msr-smp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/msr-smp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/msr-smp.c</a></div><div class='hunk'>@@ -47,7 +47,7 @@ int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(rdmsr_on_cpu);</div><div class='ctx'> </div><div class='del'>-int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='add'>+int rdmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct msr_info rv;</div><div class='hunk'>@@ -60,7 +60,7 @@ int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(rdmsrl_on_cpu);</div><div class='add'>+EXPORT_SYMBOL(rdmsrq_on_cpu);</div><div class='ctx'> </div><div class='ctx'> int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)</div><div class='ctx'> {</div><div class='hunk'>@@ -78,7 +78,7 @@ int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wrmsr_on_cpu);</div><div class='ctx'> </div><div class='del'>-int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='add'>+int wrmsrq_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct msr_info rv;</div><div class='hunk'>@@ -92,7 +92,7 @@ int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(wrmsrl_on_cpu);</div><div class='add'>+EXPORT_SYMBOL(wrmsrq_on_cpu);</div><div class='ctx'> </div><div class='ctx'> static void __rwmsr_on_cpus(const struct cpumask *mask, u32 msr_no,</div><div class='ctx'> 			    struct msr __percpu *msrs,</div><div class='hunk'>@@ -204,7 +204,7 @@ int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wrmsr_safe_on_cpu);</div><div class='ctx'> </div><div class='del'>-int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='add'>+int wrmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct msr_info rv;</div><div class='hunk'>@@ -218,9 +218,9 @@ int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)</div><div class='ctx'> </div><div class='ctx'> 	return err ? err : rv.err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(wrmsrl_safe_on_cpu);</div><div class='add'>+EXPORT_SYMBOL(wrmsrq_safe_on_cpu);</div><div class='ctx'> </div><div class='del'>-int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='add'>+int rdmsrq_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='ctx'> {</div><div class='ctx'> 	u32 low, high;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -230,7 +230,7 @@ int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(rdmsrl_safe_on_cpu);</div><div class='add'>+EXPORT_SYMBOL(rdmsrq_safe_on_cpu);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * These variants are significantly slower, but allows control over</div><div class='head'>diff --git a/arch/x86/lib/msr.c b/arch/x86/lib/msr.c<br/>index 5a18ecc04a6c..4ef7c6dcbea6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/msr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/msr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/msr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/msr.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@ static int msr_read(u32 msr, struct msr *m)</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(msr, &amp;val);</div><div class='add'>+	err = rdmsrq_safe(msr, &amp;val);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		m-&gt;q = val;</div><div class='ctx'> </div><div class='hunk'>@@ -58,7 +58,7 @@ static int msr_read(u32 msr, struct msr *m)</div><div class='ctx'>  */</div><div class='ctx'> static int msr_write(u32 msr, struct msr *m)</div><div class='ctx'> {</div><div class='del'>-	return wrmsrl_safe(msr, m-&gt;q);</div><div class='add'>+	return wrmsrq_safe(msr, m-&gt;q);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int __flip_bit(u32 msr, u8 bit, bool set)</div><div class='hunk'>@@ -122,23 +122,23 @@ int msr_clear_bit(u32 msr, u8 bit)</div><div class='ctx'> EXPORT_SYMBOL_GPL(msr_clear_bit);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_TRACEPOINTS</div><div class='del'>-void do_trace_write_msr(unsigned int msr, u64 val, int failed)</div><div class='add'>+void do_trace_write_msr(u32 msr, u64 val, int failed)</div><div class='ctx'> {</div><div class='ctx'> 	trace_write_msr(msr, val, failed);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(do_trace_write_msr);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL(write_msr);</div><div class='ctx'> </div><div class='del'>-void do_trace_read_msr(unsigned int msr, u64 val, int failed)</div><div class='add'>+void do_trace_read_msr(u32 msr, u64 val, int failed)</div><div class='ctx'> {</div><div class='ctx'> 	trace_read_msr(msr, val, failed);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(do_trace_read_msr);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL(read_msr);</div><div class='ctx'> </div><div class='del'>-void do_trace_rdpmc(unsigned counter, u64 val, int failed)</div><div class='add'>+void do_trace_rdpmc(u32 msr, u64 val, int failed)</div><div class='ctx'> {</div><div class='del'>-	trace_rdpmc(counter, val, failed);</div><div class='add'>+	trace_rdpmc(msr, val, failed);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(do_trace_rdpmc);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL(rdpmc);</div><div class='head'>diff --git a/arch/x86/lib/retpoline.S b/arch/x86/lib/retpoline.S<br/>index a26c43abd47d..d78d769a02bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/retpoline.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/retpoline.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/retpoline.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/retpoline.S</a></div><div class='hunk'>@@ -40,6 +40,7 @@ SYM_INNER_LABEL(__x86_indirect_thunk_\reg, SYM_L_GLOBAL)</div><div class='ctx'> 	ALTERNATIVE_2 __stringify(RETPOLINE \reg), \</div><div class='ctx'> 		      __stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *%\reg; int3), X86_FEATURE_RETPOLINE_LFENCE, \</div><div class='ctx'> 		      __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *%\reg), ALT_NOT(X86_FEATURE_RETPOLINE)</div><div class='add'>+SYM_PIC_ALIAS(__x86_indirect_thunk_\reg)</div><div class='ctx'> </div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='hunk'>@@ -367,6 +368,54 @@ SYM_FUNC_END(call_depth_return_thunk)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_MITIGATION_CALL_DEPTH_TRACKING */</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MITIGATION_ITS</div><div class='add'>+</div><div class='add'>+.macro ITS_THUNK reg</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * If CFI paranoid is used then the ITS thunk starts with opcodes (0xea; jne 1b)</div><div class='add'>+ * that complete the fineibt_paranoid caller sequence.</div><div class='add'>+ */</div><div class='add'>+1:	.byte 0xea</div><div class='add'>+SYM_INNER_LABEL(__x86_indirect_paranoid_thunk_\reg, SYM_L_GLOBAL)</div><div class='add'>+	UNWIND_HINT_UNDEFINED</div><div class='add'>+	ANNOTATE_NOENDBR</div><div class='add'>+	jne 1b</div><div class='add'>+SYM_INNER_LABEL(__x86_indirect_its_thunk_\reg, SYM_L_GLOBAL)</div><div class='add'>+	UNWIND_HINT_UNDEFINED</div><div class='add'>+	ANNOTATE_NOENDBR</div><div class='add'>+	ANNOTATE_RETPOLINE_SAFE</div><div class='add'>+	jmp *%\reg</div><div class='add'>+	int3</div><div class='add'>+	.align 32, 0xcc		/* fill to the end of the line */</div><div class='add'>+	.skip  32 - (__x86_indirect_its_thunk_\reg - 1b), 0xcc /* skip to the next upper half */</div><div class='add'>+.endm</div><div class='add'>+</div><div class='add'>+/* ITS mitigation requires thunks be aligned to upper half of cacheline */</div><div class='add'>+.align 64, 0xcc</div><div class='add'>+.skip 29, 0xcc</div><div class='add'>+</div><div class='add'>+#define GEN(reg) ITS_THUNK reg</div><div class='add'>+#include &lt;asm/GEN-for-each-reg.h&gt;</div><div class='add'>+#undef GEN</div><div class='add'>+</div><div class='add'>+	.align 64, 0xcc</div><div class='add'>+SYM_FUNC_ALIAS(__x86_indirect_its_thunk_array, __x86_indirect_its_thunk_rax)</div><div class='add'>+SYM_CODE_END(__x86_indirect_its_thunk_array)</div><div class='add'>+</div><div class='add'>+.align 64, 0xcc</div><div class='add'>+.skip 32, 0xcc</div><div class='add'>+SYM_CODE_START(its_return_thunk)</div><div class='add'>+	UNWIND_HINT_FUNC</div><div class='add'>+	ANNOTATE_NOENDBR</div><div class='add'>+	ANNOTATE_UNRET_SAFE</div><div class='add'>+	ret</div><div class='add'>+	int3</div><div class='add'>+SYM_CODE_END(its_return_thunk)</div><div class='add'>+EXPORT_SYMBOL(its_return_thunk)</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_MITIGATION_ITS */</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This function name is magical and is used by -mfunction-return=thunk-extern</div><div class='ctx'>  * for the compiler to generate JMPs to it.</div><div class='hunk'>@@ -394,6 +443,7 @@ SYM_CODE_START(__x86_return_thunk)</div><div class='ctx'> #endif</div><div class='ctx'> 	int3</div><div class='ctx'> SYM_CODE_END(__x86_return_thunk)</div><div class='add'>+SYM_PIC_ALIAS(__x86_return_thunk)</div><div class='ctx'> EXPORT_SYMBOL(__x86_return_thunk)</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_MITIGATION_RETHUNK */</div><div class='head'>diff --git a/arch/x86/lib/string_32.c b/arch/x86/lib/string_32.c<br/>index 53b3f202267c..f87ec24fa579 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/string_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/string_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/string_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/string_32.c</a></div><div class='hunk'>@@ -40,8 +40,7 @@ char *strncpy(char *dest, const char *src, size_t count)</div><div class='ctx'> 		"stosb\n\t"</div><div class='ctx'> 		"testb %%al,%%al\n\t"</div><div class='ctx'> 		"jne 1b\n\t"</div><div class='del'>-		"rep\n\t"</div><div class='del'>-		"stosb\n"</div><div class='add'>+		"rep stosb\n"</div><div class='ctx'> 		"2:"</div><div class='ctx'> 		: "=&amp;S" (d0), "=&amp;D" (d1), "=&amp;c" (d2), "=&amp;a" (d3)</div><div class='ctx'> 		: "0" (src), "1" (dest), "2" (count) : "memory");</div><div class='hunk'>@@ -54,8 +53,7 @@ EXPORT_SYMBOL(strncpy);</div><div class='ctx'> char *strcat(char *dest, const char *src)</div><div class='ctx'> {</div><div class='ctx'> 	int d0, d1, d2, d3;</div><div class='del'>-	asm volatile("repne\n\t"</div><div class='del'>-		"scasb\n\t"</div><div class='add'>+	asm volatile("repne scasb\n\t"</div><div class='ctx'> 		"decl %1\n"</div><div class='ctx'> 		"1:\tlodsb\n\t"</div><div class='ctx'> 		"stosb\n\t"</div><div class='hunk'>@@ -72,8 +70,7 @@ EXPORT_SYMBOL(strcat);</div><div class='ctx'> char *strncat(char *dest, const char *src, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	int d0, d1, d2, d3;</div><div class='del'>-	asm volatile("repne\n\t"</div><div class='del'>-		"scasb\n\t"</div><div class='add'>+	asm volatile("repne scasb\n\t"</div><div class='ctx'> 		"decl %1\n\t"</div><div class='ctx'> 		"movl %8,%3\n"</div><div class='ctx'> 		"1:\tdecl %3\n\t"</div><div class='hunk'>@@ -167,8 +164,7 @@ size_t strlen(const char *s)</div><div class='ctx'> {</div><div class='ctx'> 	int d0;</div><div class='ctx'> 	size_t res;</div><div class='del'>-	asm volatile("repne\n\t"</div><div class='del'>-		"scasb"</div><div class='add'>+	asm volatile("repne scasb"</div><div class='ctx'> 		: "=c" (res), "=&amp;D" (d0)</div><div class='ctx'> 		: "1" (s), "a" (0), "0" (0xffffffffu)</div><div class='ctx'> 		: "memory");</div><div class='hunk'>@@ -184,8 +180,7 @@ void *memchr(const void *cs, int c, size_t count)</div><div class='ctx'> 	void *res;</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	asm volatile("repne\n\t"</div><div class='del'>-		"scasb\n\t"</div><div class='add'>+	asm volatile("repne scasb\n\t"</div><div class='ctx'> 		"je 1f\n\t"</div><div class='ctx'> 		"movl $1,%0\n"</div><div class='ctx'> 		"1:\tdecl %0"</div><div class='hunk'>@@ -202,7 +197,7 @@ void *memscan(void *addr, int c, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	if (!size)</div><div class='ctx'> 		return addr;</div><div class='del'>-	asm volatile("repnz; scasb\n\t"</div><div class='add'>+	asm volatile("repnz scasb\n\t"</div><div class='ctx'> 	    "jnz 1f\n\t"</div><div class='ctx'> 	    "dec %%edi\n"</div><div class='ctx'> 	    "1:"</div><div class='head'>diff --git a/arch/x86/lib/strstr_32.c b/arch/x86/lib/strstr_32.c<br/>index 38f37df056f7..28267985e85f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/strstr_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/strstr_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/strstr_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/strstr_32.c</a></div><div class='hunk'>@@ -8,16 +8,14 @@ int	d0, d1;</div><div class='ctx'> register char *__res;</div><div class='ctx'> __asm__ __volatile__(</div><div class='ctx'> 	"movl %6,%%edi\n\t"</div><div class='del'>-	"repne\n\t"</div><div class='del'>-	"scasb\n\t"</div><div class='add'>+	"repne scasb\n\t"</div><div class='ctx'> 	"notl %%ecx\n\t"</div><div class='ctx'> 	"decl %%ecx\n\t"	/* NOTE! This also sets Z if searchstring='' */</div><div class='ctx'> 	"movl %%ecx,%%edx\n"</div><div class='ctx'> 	"1:\tmovl %6,%%edi\n\t"</div><div class='ctx'> 	"movl %%esi,%%eax\n\t"</div><div class='ctx'> 	"movl %%edx,%%ecx\n\t"</div><div class='del'>-	"repe\n\t"</div><div class='del'>-	"cmpsb\n\t"</div><div class='add'>+	"repe cmpsb\n\t"</div><div class='ctx'> 	"je 2f\n\t"		/* also works for empty string, see above */</div><div class='ctx'> 	"xchgl %%eax,%%esi\n\t"</div><div class='ctx'> 	"incl %%esi\n\t"</div><div class='head'>diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c<br/>index 422257c350c6..f6f436f1d573 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/usercopy_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/usercopy_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/usercopy_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/usercopy_32.c</a></div><div class='hunk'>@@ -38,9 +38,9 @@ do {									\</div><div class='ctx'> 	might_fault();							\</div><div class='ctx'> 	__asm__ __volatile__(						\</div><div class='ctx'> 		ASM_STAC "\n"						\</div><div class='del'>-		"0:	rep; stosl\n"					\</div><div class='add'>+		"0:	rep stosl\n"					\</div><div class='ctx'> 		"	movl %2,%0\n"					\</div><div class='del'>-		"1:	rep; stosb\n"					\</div><div class='add'>+		"1:	rep stosb\n"					\</div><div class='ctx'> 		"2: " ASM_CLAC "\n"					\</div><div class='ctx'> 		_ASM_EXTABLE_TYPE_REG(0b, 2b, EX_TYPE_UCOPY_LEN4, %2)	\</div><div class='ctx'> 		_ASM_EXTABLE_UA(1b, 2b)					\</div><div class='hunk'>@@ -140,9 +140,9 @@ __copy_user_intel(void __user *to, const void *from, unsigned long size)</div><div class='ctx'> 		       "       shrl  $2, %0\n"</div><div class='ctx'> 		       "       andl  $3, %%eax\n"</div><div class='ctx'> 		       "       cld\n"</div><div class='del'>-		       "99:    rep; movsl\n"</div><div class='add'>+		       "99:    rep movsl\n"</div><div class='ctx'> 		       "36:    movl %%eax, %0\n"</div><div class='del'>-		       "37:    rep; movsb\n"</div><div class='add'>+		       "37:    rep movsb\n"</div><div class='ctx'> 		       "100:\n"</div><div class='ctx'> 		       _ASM_EXTABLE_UA(1b, 100b)</div><div class='ctx'> 		       _ASM_EXTABLE_UA(2b, 100b)</div><div class='hunk'>@@ -242,9 +242,9 @@ static unsigned long __copy_user_intel_nocache(void *to,</div><div class='ctx'> 	       "        shrl  $2, %0\n"</div><div class='ctx'> 	       "        andl $3, %%eax\n"</div><div class='ctx'> 	       "        cld\n"</div><div class='del'>-	       "6:      rep; movsl\n"</div><div class='add'>+	       "6:      rep movsl\n"</div><div class='ctx'> 	       "        movl %%eax,%0\n"</div><div class='del'>-	       "7:      rep; movsb\n"</div><div class='add'>+	       "7:      rep movsb\n"</div><div class='ctx'> 	       "8:\n"</div><div class='ctx'> 	       _ASM_EXTABLE_UA(0b, 8b)</div><div class='ctx'> 	       _ASM_EXTABLE_UA(1b, 8b)</div><div class='hunk'>@@ -293,14 +293,14 @@ do {									\</div><div class='ctx'> 		"	negl %0\n"					\</div><div class='ctx'> 		"	andl $7,%0\n"					\</div><div class='ctx'> 		"	subl %0,%3\n"					\</div><div class='del'>-		"4:	rep; movsb\n"					\</div><div class='add'>+		"4:	rep movsb\n"					\</div><div class='ctx'> 		"	movl %3,%0\n"					\</div><div class='ctx'> 		"	shrl $2,%0\n"					\</div><div class='ctx'> 		"	andl $3,%3\n"					\</div><div class='ctx'> 		"	.align 2,0x90\n"				\</div><div class='del'>-		"0:	rep; movsl\n"					\</div><div class='add'>+		"0:	rep movsl\n"					\</div><div class='ctx'> 		"	movl %3,%0\n"					\</div><div class='del'>-		"1:	rep; movsb\n"					\</div><div class='add'>+		"1:	rep movsb\n"					\</div><div class='ctx'> 		"2:\n"							\</div><div class='ctx'> 		_ASM_EXTABLE_TYPE_REG(4b, 2b, EX_TYPE_UCOPY_LEN1, %3)	\</div><div class='ctx'> 		_ASM_EXTABLE_TYPE_REG(0b, 2b, EX_TYPE_UCOPY_LEN4, %3)	\</div><div class='head'>diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt<br/>index caedb3ef6688..262f7ca1fb95 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/lib/x86-opcode-map.txt?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/lib/x86-opcode-map.txt</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/lib/x86-opcode-map.txt?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/lib/x86-opcode-map.txt</a></div><div class='hunk'>@@ -35,7 +35,7 @@</div><div class='ctx'> #  - (!F3) : the last prefix is not 0xF3 (including non-last prefix case)</div><div class='ctx'> #  - (66&amp;F2): Both 0x66 and 0xF2 prefixes are specified.</div><div class='ctx'> #</div><div class='del'>-# REX2 Prefix</div><div class='add'>+# REX2 Prefix Superscripts</div><div class='ctx'> #  - (!REX2): REX2 is not allowed</div><div class='ctx'> #  - (REX2): REX2 variant e.g. JMPABS</div><div class='ctx'> </div><div class='hunk'>@@ -147,7 +147,7 @@ AVXcode:</div><div class='ctx'> # 0x60 - 0x6f</div><div class='ctx'> 60: PUSHA/PUSHAD (i64)</div><div class='ctx'> 61: POPA/POPAD (i64)</div><div class='del'>-62: BOUND Gv,Ma (i64) | EVEX (Prefix)</div><div class='add'>+62: BOUND Gv,Ma (i64) | EVEX (Prefix),(o64)</div><div class='ctx'> 63: ARPL Ew,Gw (i64) | MOVSXD Gv,Ev (o64)</div><div class='ctx'> 64: SEG=FS (Prefix)</div><div class='ctx'> 65: SEG=GS (Prefix)</div><div class='hunk'>@@ -253,8 +253,8 @@ c0: Grp2 Eb,Ib (1A)</div><div class='ctx'> c1: Grp2 Ev,Ib (1A)</div><div class='ctx'> c2: RETN Iw (f64)</div><div class='ctx'> c3: RETN</div><div class='del'>-c4: LES Gz,Mp (i64) | VEX+2byte (Prefix)</div><div class='del'>-c5: LDS Gz,Mp (i64) | VEX+1byte (Prefix)</div><div class='add'>+c4: LES Gz,Mp (i64) | VEX+2byte (Prefix),(o64)</div><div class='add'>+c5: LDS Gz,Mp (i64) | VEX+1byte (Prefix),(o64)</div><div class='ctx'> c6: Grp11A Eb,Ib (1A)</div><div class='ctx'> c7: Grp11B Ev,Iz (1A)</div><div class='ctx'> c8: ENTER Iw,Ib</div><div class='hunk'>@@ -286,10 +286,10 @@ df: ESC</div><div class='ctx'> # Note: "forced64" is Intel CPU behavior: they ignore 0x66 prefix</div><div class='ctx'> # in 64-bit mode. AMD CPUs accept 0x66 prefix, it causes RIP truncation</div><div class='ctx'> # to 16 bits. In 32-bit mode, 0x66 is accepted by both Intel and AMD.</div><div class='del'>-e0: LOOPNE/LOOPNZ Jb (f64) (!REX2)</div><div class='del'>-e1: LOOPE/LOOPZ Jb (f64) (!REX2)</div><div class='del'>-e2: LOOP Jb (f64) (!REX2)</div><div class='del'>-e3: JrCXZ Jb (f64) (!REX2)</div><div class='add'>+e0: LOOPNE/LOOPNZ Jb (f64),(!REX2)</div><div class='add'>+e1: LOOPE/LOOPZ Jb (f64),(!REX2)</div><div class='add'>+e2: LOOP Jb (f64),(!REX2)</div><div class='add'>+e3: JrCXZ Jb (f64),(!REX2)</div><div class='ctx'> e4: IN AL,Ib (!REX2)</div><div class='ctx'> e5: IN eAX,Ib (!REX2)</div><div class='ctx'> e6: OUT Ib,AL (!REX2)</div><div class='hunk'>@@ -298,10 +298,10 @@ e7: OUT Ib,eAX (!REX2)</div><div class='ctx'> # in "near" jumps and calls is 16-bit. For CALL,</div><div class='ctx'> # push of return address is 16-bit wide, RSP is decremented by 2</div><div class='ctx'> # but is not truncated to 16 bits, unlike RIP.</div><div class='del'>-e8: CALL Jz (f64) (!REX2)</div><div class='del'>-e9: JMP-near Jz (f64) (!REX2)</div><div class='del'>-ea: JMP-far Ap (i64) (!REX2)</div><div class='del'>-eb: JMP-short Jb (f64) (!REX2)</div><div class='add'>+e8: CALL Jz (f64),(!REX2)</div><div class='add'>+e9: JMP-near Jz (f64),(!REX2)</div><div class='add'>+ea: JMP-far Ap (i64),(!REX2)</div><div class='add'>+eb: JMP-short Jb (f64),(!REX2)</div><div class='ctx'> ec: IN AL,DX (!REX2)</div><div class='ctx'> ed: IN eAX,DX (!REX2)</div><div class='ctx'> ee: OUT DX,AL (!REX2)</div><div class='hunk'>@@ -478,22 +478,22 @@ AVXcode: 1</div><div class='ctx'> 7f: movq Qq,Pq | vmovdqa Wx,Vx (66) | vmovdqa32/64 Wx,Vx (66),(evo) | vmovdqu Wx,Vx (F3) | vmovdqu32/64 Wx,Vx (F3),(evo) | vmovdqu8/16 Wx,Vx (F2),(ev)</div><div class='ctx'> # 0x0f 0x80-0x8f</div><div class='ctx'> # Note: "forced64" is Intel CPU behavior (see comment about CALL insn).</div><div class='del'>-80: JO Jz (f64) (!REX2)</div><div class='del'>-81: JNO Jz (f64) (!REX2)</div><div class='del'>-82: JB/JC/JNAE Jz (f64) (!REX2)</div><div class='del'>-83: JAE/JNB/JNC Jz (f64) (!REX2)</div><div class='del'>-84: JE/JZ Jz (f64) (!REX2)</div><div class='del'>-85: JNE/JNZ Jz (f64) (!REX2)</div><div class='del'>-86: JBE/JNA Jz (f64) (!REX2)</div><div class='del'>-87: JA/JNBE Jz (f64) (!REX2)</div><div class='del'>-88: JS Jz (f64) (!REX2)</div><div class='del'>-89: JNS Jz (f64) (!REX2)</div><div class='del'>-8a: JP/JPE Jz (f64) (!REX2)</div><div class='del'>-8b: JNP/JPO Jz (f64) (!REX2)</div><div class='del'>-8c: JL/JNGE Jz (f64) (!REX2)</div><div class='del'>-8d: JNL/JGE Jz (f64) (!REX2)</div><div class='del'>-8e: JLE/JNG Jz (f64) (!REX2)</div><div class='del'>-8f: JNLE/JG Jz (f64) (!REX2)</div><div class='add'>+80: JO Jz (f64),(!REX2)</div><div class='add'>+81: JNO Jz (f64),(!REX2)</div><div class='add'>+82: JB/JC/JNAE Jz (f64),(!REX2)</div><div class='add'>+83: JAE/JNB/JNC Jz (f64),(!REX2)</div><div class='add'>+84: JE/JZ Jz (f64),(!REX2)</div><div class='add'>+85: JNE/JNZ Jz (f64),(!REX2)</div><div class='add'>+86: JBE/JNA Jz (f64),(!REX2)</div><div class='add'>+87: JA/JNBE Jz (f64),(!REX2)</div><div class='add'>+88: JS Jz (f64),(!REX2)</div><div class='add'>+89: JNS Jz (f64),(!REX2)</div><div class='add'>+8a: JP/JPE Jz (f64),(!REX2)</div><div class='add'>+8b: JNP/JPO Jz (f64),(!REX2)</div><div class='add'>+8c: JL/JNGE Jz (f64),(!REX2)</div><div class='add'>+8d: JNL/JGE Jz (f64),(!REX2)</div><div class='add'>+8e: JLE/JNG Jz (f64),(!REX2)</div><div class='add'>+8f: JNLE/JG Jz (f64),(!REX2)</div><div class='ctx'> # 0x0f 0x90-0x9f</div><div class='ctx'> 90: SETO Eb | kmovw/q Vk,Wk | kmovb/d Vk,Wk (66)</div><div class='ctx'> 91: SETNO Eb | kmovw/q Mv,Vk | kmovb/d Mv,Vk (66)</div><div class='hunk'>@@ -996,8 +996,8 @@ AVXcode: 4</div><div class='ctx'> 83: Grp1 Ev,Ib (1A),(es)</div><div class='ctx'> # CTESTSCC instructions are: CTESTB, CTESTBE, CTESTF, CTESTL, CTESTLE, CTESTNB, CTESTNBE, CTESTNL,</div><div class='ctx'> #			     CTESTNLE, CTESTNO, CTESTNS, CTESTNZ, CTESTO, CTESTS, CTESTT, CTESTZ</div><div class='del'>-84: CTESTSCC (ev)</div><div class='del'>-85: CTESTSCC (es) | CTESTSCC (66),(es)</div><div class='add'>+84: CTESTSCC Eb,Gb (ev)</div><div class='add'>+85: CTESTSCC Ev,Gv (es) | CTESTSCC Ev,Gv (66),(es)</div><div class='ctx'> 88: POPCNT Gv,Ev (es) | POPCNT Gv,Ev (66),(es)</div><div class='ctx'> 8f: POP2 Bq,Rq (000),(11B),(ev)</div><div class='ctx'> a5: SHLD Ev,Gv,CL (es) | SHLD Ev,Gv,CL (66),(es)</div><div class='head'>diff --git a/arch/x86/math-emu/fpu_aux.c b/arch/x86/math-emu/fpu_aux.c<br/>index d62662bdd460..5f253ae406b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_aux.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/math-emu/fpu_aux.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_aux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/math-emu/fpu_aux.c</a></div><div class='hunk'>@@ -53,7 +53,7 @@ void fpstate_init_soft(struct swregs_state *soft)</div><div class='ctx'> </div><div class='ctx'> void finit(void)</div><div class='ctx'> {</div><div class='del'>-	fpstate_init_soft(&amp;current-&gt;thread.fpu.fpstate-&gt;regs.soft);</div><div class='add'>+	fpstate_init_soft(&amp;x86_task_fpu(current)-&gt;fpstate-&gt;regs.soft);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/arch/x86/math-emu/fpu_entry.c b/arch/x86/math-emu/fpu_entry.c<br/>index 91c52ead1226..5034df617740 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_entry.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/math-emu/fpu_entry.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_entry.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/math-emu/fpu_entry.c</a></div><div class='hunk'>@@ -641,7 +641,7 @@ int fpregs_soft_set(struct task_struct *target,</div><div class='ctx'> 		    unsigned int pos, unsigned int count,</div><div class='ctx'> 		    const void *kbuf, const void __user *ubuf)</div><div class='ctx'> {</div><div class='del'>-	struct swregs_state *s387 = &amp;target-&gt;thread.fpu.fpstate-&gt;regs.soft;</div><div class='add'>+	struct swregs_state *s387 = &amp;x86_task_fpu(target)-&gt;fpstate-&gt;regs.soft;</div><div class='ctx'> 	void *space = s387-&gt;st_space;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int offset, other, i, tags, regnr, tag, newtop;</div><div class='hunk'>@@ -692,7 +692,7 @@ int fpregs_soft_get(struct task_struct *target,</div><div class='ctx'> 		    const struct user_regset *regset,</div><div class='ctx'> 		    struct membuf to)</div><div class='ctx'> {</div><div class='del'>-	struct swregs_state *s387 = &amp;target-&gt;thread.fpu.fpstate-&gt;regs.soft;</div><div class='add'>+	struct swregs_state *s387 = &amp;x86_task_fpu(target)-&gt;fpstate-&gt;regs.soft;</div><div class='ctx'> 	const void *space = s387-&gt;st_space;</div><div class='ctx'> 	int offset = (S387-&gt;ftop &amp; 7) * 10, other = 80 - offset;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/math-emu/fpu_system.h b/arch/x86/math-emu/fpu_system.h<br/>index eec3e4805c75..5e238e930fe3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_system.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/math-emu/fpu_system.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/math-emu/fpu_system.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/math-emu/fpu_system.h</a></div><div class='hunk'>@@ -73,7 +73,7 @@ static inline bool seg_writable(struct desc_struct *d)</div><div class='ctx'> 	return (d-&gt;type &amp; SEG_TYPE_EXECUTE_MASK) == SEG_TYPE_WRITABLE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define I387			(&amp;current-&gt;thread.fpu.fpstate-&gt;regs)</div><div class='add'>+#define I387			(&amp;x86_task_fpu(current)-&gt;fpstate-&gt;regs)</div><div class='ctx'> #define FPU_info		(I387-&gt;soft.info)</div><div class='ctx'> </div><div class='ctx'> #define FPU_CS			(*(unsigned short *) &amp;(FPU_info-&gt;regs-&gt;cs))</div><div class='head'>diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile<br/>index 32035d5be5a0..5b9908f13dcf 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/Makefile</a></div><div class='hunk'>@@ -3,12 +3,10 @@</div><div class='ctx'> KCOV_INSTRUMENT_tlb.o			:= n</div><div class='ctx'> KCOV_INSTRUMENT_mem_encrypt.o		:= n</div><div class='ctx'> KCOV_INSTRUMENT_mem_encrypt_amd.o	:= n</div><div class='del'>-KCOV_INSTRUMENT_mem_encrypt_identity.o	:= n</div><div class='ctx'> KCOV_INSTRUMENT_pgprot.o		:= n</div><div class='ctx'> </div><div class='ctx'> KASAN_SANITIZE_mem_encrypt.o		:= n</div><div class='ctx'> KASAN_SANITIZE_mem_encrypt_amd.o	:= n</div><div class='del'>-KASAN_SANITIZE_mem_encrypt_identity.o	:= n</div><div class='ctx'> KASAN_SANITIZE_pgprot.o		:= n</div><div class='ctx'> </div><div class='ctx'> # Disable KCSAN entirely, because otherwise we get warnings that some functions</div><div class='hunk'>@@ -16,12 +14,10 @@ KASAN_SANITIZE_pgprot.o		:= n</div><div class='ctx'> KCSAN_SANITIZE := n</div><div class='ctx'> # Avoid recursion by not calling KMSAN hooks for CEA code.</div><div class='ctx'> KMSAN_SANITIZE_cpu_entry_area.o := n</div><div class='del'>-KMSAN_SANITIZE_mem_encrypt_identity.o := n</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_FUNCTION_TRACER</div><div class='ctx'> CFLAGS_REMOVE_mem_encrypt.o		= -pg</div><div class='ctx'> CFLAGS_REMOVE_mem_encrypt_amd.o		= -pg</div><div class='del'>-CFLAGS_REMOVE_mem_encrypt_identity.o	= -pg</div><div class='ctx'> CFLAGS_REMOVE_pgprot.o			= -pg</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='hunk'>@@ -32,9 +28,6 @@ obj-y				+= pat/</div><div class='ctx'> </div><div class='ctx'> # Make sure __phys_addr has no stackprotector</div><div class='ctx'> CFLAGS_physaddr.o		:= -fno-stack-protector</div><div class='del'>-CFLAGS_mem_encrypt_identity.o	:= -fno-stack-protector</div><div class='del'>-</div><div class='del'>-CFLAGS_fault.o := -I $(src)/../include/asm/trace</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_X86_32)		+= pgtable_32.o iomap_32.o</div><div class='ctx'> </div><div class='hunk'>@@ -52,7 +45,7 @@ obj-$(CONFIG_MMIOTRACE)		+= mmiotrace.o</div><div class='ctx'> mmiotrace-y			:= kmmio.o pf_in.o mmio-mod.o</div><div class='ctx'> obj-$(CONFIG_MMIOTRACE_TEST)	+= testmmiotrace.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_NUMA)		+= numa.o numa_$(BITS).o</div><div class='add'>+obj-$(CONFIG_NUMA)		+= numa.o</div><div class='ctx'> obj-$(CONFIG_AMD_NUMA)		+= amdtopology.o</div><div class='ctx'> obj-$(CONFIG_ACPI_NUMA)		+= srat.o</div><div class='ctx'> </div><div class='hunk'>@@ -63,5 +56,4 @@ obj-$(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION)	+= pti.o</div><div class='ctx'> obj-$(CONFIG_X86_MEM_ENCRYPT)	+= mem_encrypt.o</div><div class='ctx'> obj-$(CONFIG_AMD_MEM_ENCRYPT)	+= mem_encrypt_amd.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_AMD_MEM_ENCRYPT)	+= mem_encrypt_identity.o</div><div class='ctx'> obj-$(CONFIG_AMD_MEM_ENCRYPT)	+= mem_encrypt_boot.o</div><div class='head'>diff --git a/arch/x86/mm/amdtopology.c b/arch/x86/mm/amdtopology.c<br/>index 628833afee37..f980b0eb0105 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/amdtopology.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/amdtopology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/amdtopology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/amdtopology.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'> #include &lt;asm/numa.h&gt;</div><div class='ctx'> #include &lt;asm/mpspec.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> </div><div class='ctx'> static unsigned char __initdata nodeids[8];</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c<br/>index 51986e8a9d35..bf8dab18be97 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/extable.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/extable.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/extable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/extable.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ static bool ex_handler_sgx(const struct exception_table_entry *fixup,</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Handler for when we fail to restore a task's FPU state.  We should never get</div><div class='del'>- * here because the FPU state of a task using the FPU (task-&gt;thread.fpu.state)</div><div class='add'>+ * here because the FPU state of a task using the FPU (struct fpu::fpstate)</div><div class='ctx'>  * should always be valid.  However, past bugs have allowed userspace to set</div><div class='ctx'>  * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().</div><div class='ctx'>  * These caused XRSTOR to fail when switching to the task, leaking the FPU</div><div class='head'>diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c<br/>index 296d294142c8..998bd807fc7b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/fault.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/fault.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/fault.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/fault.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #include &lt;linux/mmiotrace.h&gt;		/* kmmio_handler, ...		*/</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;		/* perf_sw_event		*/</div><div class='ctx'> #include &lt;linux/hugetlb.h&gt;		/* hstate_index_to_shift	*/</div><div class='del'>-#include &lt;linux/prefetch.h&gt;		/* prefetchw			*/</div><div class='ctx'> #include &lt;linux/context_tracking.h&gt;	/* exception_enter(), ...	*/</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;		/* faulthandler_disabled()	*/</div><div class='ctx'> #include &lt;linux/efi.h&gt;			/* efi_crash_gracefully_on_page_fault()*/</div><div class='hunk'>@@ -38,7 +37,7 @@</div><div class='ctx'> #include &lt;asm/sev.h&gt;			/* snp_dump_hva_rmpentry()	*/</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='del'>-#include &lt;asm/trace/exceptions.h&gt;</div><div class='add'>+#include &lt;trace/events/exceptions.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Returns 0 if mmiotrace is disabled, or if the fault is not</div><div class='hunk'>@@ -1455,9 +1454,6 @@ static __always_inline void</div><div class='ctx'> trace_page_fault_entries(struct pt_regs *regs, unsigned long error_code,</div><div class='ctx'> 			 unsigned long address)</div><div class='ctx'> {</div><div class='del'>-	if (!trace_pagefault_enabled())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	if (user_mode(regs))</div><div class='ctx'> 		trace_page_fault_user(address, regs, error_code);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1496,8 +1492,6 @@ DEFINE_IDTENTRY_RAW_ERRORCODE(exc_page_fault)</div><div class='ctx'> </div><div class='ctx'> 	address = cpu_feature_enabled(X86_FEATURE_FRED) ? fred_event_data(regs) : read_cr2();</div><div class='ctx'> </div><div class='del'>-	prefetchw(&amp;current-&gt;mm-&gt;mmap_lock);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * KVM uses #PF vector to deliver 'page not present' events to guests</div><div class='ctx'> 	 * (asynchronous page fault mechanism). The event happens when a</div><div class='head'>diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c<br/>index bfa444a7dbb0..7456df985d96 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/init.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;asm/text-patching.h&gt;</div><div class='ctx'> #include &lt;asm/memtype.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='add'>+#include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * We need to define the tracepoints somewhere, and tlb.c</div><div class='hunk'>@@ -173,11 +174,7 @@ __ref void *alloc_low_pages(unsigned int num)</div><div class='ctx'>  * randomization is enabled.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_X86_5LEVEL</div><div class='del'>-#define INIT_PGD_PAGE_TABLES    3</div><div class='del'>-#else</div><div class='ctx'> #define INIT_PGD_PAGE_TABLES    4</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_RANDOMIZE_MEMORY</div><div class='ctx'> #define INIT_PGD_PAGE_COUNT      (2 * INIT_PGD_PAGE_TABLES)</div><div class='hunk'>@@ -824,31 +821,33 @@ void __init poking_init(void)</div><div class='ctx'> 	spinlock_t *ptl;</div><div class='ctx'> 	pte_t *ptep;</div><div class='ctx'> </div><div class='del'>-	poking_mm = mm_alloc();</div><div class='del'>-	BUG_ON(!poking_mm);</div><div class='add'>+	text_poke_mm = mm_alloc();</div><div class='add'>+	BUG_ON(!text_poke_mm);</div><div class='ctx'> </div><div class='ctx'> 	/* Xen PV guests need the PGD to be pinned. */</div><div class='del'>-	paravirt_enter_mmap(poking_mm);</div><div class='add'>+	paravirt_enter_mmap(text_poke_mm);</div><div class='add'>+</div><div class='add'>+	set_notrack_mm(text_poke_mm);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Randomize the poking address, but make sure that the following page</div><div class='ctx'> 	 * will be mapped at the same PMD. We need 2 pages, so find space for 3,</div><div class='ctx'> 	 * and adjust the address if the PMD ends after the first one.</div><div class='ctx'> 	 */</div><div class='del'>-	poking_addr = TASK_UNMAPPED_BASE;</div><div class='add'>+	text_poke_mm_addr = TASK_UNMAPPED_BASE;</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))</div><div class='del'>-		poking_addr += (kaslr_get_random_long("Poking") &amp; PAGE_MASK) %</div><div class='add'>+		text_poke_mm_addr += (kaslr_get_random_long("Poking") &amp; PAGE_MASK) %</div><div class='ctx'> 			(TASK_SIZE - TASK_UNMAPPED_BASE - 3 * PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-	if (((poking_addr + PAGE_SIZE) &amp; ~PMD_MASK) == 0)</div><div class='del'>-		poking_addr += PAGE_SIZE;</div><div class='add'>+	if (((text_poke_mm_addr + PAGE_SIZE) &amp; ~PMD_MASK) == 0)</div><div class='add'>+		text_poke_mm_addr += PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We need to trigger the allocation of the page-tables that will be</div><div class='ctx'> 	 * needed for poking now. Later, poking may be performed in an atomic</div><div class='ctx'> 	 * section, which might cause allocation to fail.</div><div class='ctx'> 	 */</div><div class='del'>-	ptep = get_locked_pte(poking_mm, poking_addr, &amp;ptl);</div><div class='add'>+	ptep = get_locked_pte(text_poke_mm, text_poke_mm_addr, &amp;ptl);</div><div class='ctx'> 	BUG_ON(!ptep);</div><div class='ctx'> 	pte_unmap_unlock(ptep, ptl);</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c<br/>index ad662cc4605c..607d6a2e66e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/init_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/init_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/init_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/init_32.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include &lt;linux/initrd.h&gt;</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/asm.h&gt;</div><div class='ctx'> #include &lt;asm/bios_ebda.h&gt;</div><div class='hunk'>@@ -565,7 +566,7 @@ static void __init lowmem_pfn_init(void)</div><div class='ctx'> 	"only %luMB highmem pages available, ignoring highmem size of %luMB!\n"</div><div class='ctx'> </div><div class='ctx'> #define MSG_HIGHMEM_TRIMMED \</div><div class='del'>-	"Warning: only 4GB will be used. Support for for CONFIG_HIGHMEM64G was removed!\n"</div><div class='add'>+	"Warning: only 4GB will be used. Support for CONFIG_HIGHMEM64G was removed!\n"</div><div class='ctx'> /*</div><div class='ctx'>  * We have more RAM than fits into lowmem - we try to put it into</div><div class='ctx'>  * highmem, also taking the highmem=x boot parameter into account:</div><div class='hunk'>@@ -612,7 +613,6 @@ void __init find_low_pfn_range(void)</div><div class='ctx'> 		highmem_pfn_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifndef CONFIG_NUMA</div><div class='ctx'> void __init initmem_init(void)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_HIGHMEM</div><div class='hunk'>@@ -633,12 +633,6 @@ void __init initmem_init(void)</div><div class='ctx'> 	printk(KERN_NOTICE "%ldMB LOWMEM available.\n",</div><div class='ctx'> 			pages_to_mb(max_low_pfn));</div><div class='ctx'> </div><div class='del'>-	setup_bootmem_allocator();</div><div class='del'>-}</div><div class='del'>-#endif /* !CONFIG_NUMA */</div><div class='del'>-</div><div class='del'>-void __init setup_bootmem_allocator(void)</div><div class='del'>-{</div><div class='ctx'> 	printk(KERN_INFO "  mapped low ram: 0 - %08lx\n",</div><div class='ctx'> 		 max_pfn_mapped&lt;&lt;PAGE_SHIFT);</div><div class='ctx'> 	printk(KERN_INFO "  low ram: 0 - %08lx\n", max_low_pfn&lt;&lt;PAGE_SHIFT);</div><div class='hunk'>@@ -755,6 +749,8 @@ void mark_rodata_ro(void)</div><div class='ctx'> 	pr_info("Write protecting kernel text and read-only data: %luk\n",</div><div class='ctx'> 		size &gt;&gt; 10);</div><div class='ctx'> </div><div class='add'>+	execmem_cache_make_ro();</div><div class='add'>+</div><div class='ctx'> 	kernel_set_to_readonly = 1;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CPA_DEBUG</div><div class='head'>diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c<br/>index 7c4f6f591f2b..66330fe4e18c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/init_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/init_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/init_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/init_64.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/kcore.h&gt;</div><div class='ctx'> #include &lt;linux/bootmem_info.h&gt;</div><div class='add'>+#include &lt;linux/execmem.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/bios_ebda.h&gt;</div><div class='hunk'>@@ -805,12 +806,17 @@ kernel_physical_mapping_change(unsigned long paddr_start,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_NUMA</div><div class='del'>-void __init initmem_init(void)</div><div class='add'>+static inline void x86_numa_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	memblock_set_node(0, PHYS_ADDR_MAX, &amp;memblock.memory, 0);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+void __init initmem_init(void)</div><div class='add'>+{</div><div class='add'>+	x86_numa_init();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void __init paging_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	sparse_init();</div><div class='hunk'>@@ -827,7 +833,6 @@ void __init paging_init(void)</div><div class='ctx'> 	zone_sizes_init();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARSEMEM_VMEMMAP</div><div class='ctx'> #define PAGE_UNUSED 0xFD</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -926,7 +931,6 @@ static void __meminit vmemmap_use_new_sub_pmd(unsigned long start, unsigned long</div><div class='ctx'> 	if (!IS_ALIGNED(end, PMD_SIZE))</div><div class='ctx'> 		unused_pmd_start = end;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Memory hotplug specific functions</div><div class='hunk'>@@ -1146,16 +1150,13 @@ remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,</div><div class='ctx'> 				pmd_clear(pmd);</div><div class='ctx'> 				spin_unlock(&amp;init_mm.page_table_lock);</div><div class='ctx'> 				pages++;</div><div class='del'>-			}</div><div class='del'>-#ifdef CONFIG_SPARSEMEM_VMEMMAP</div><div class='del'>-			else if (vmemmap_pmd_is_unused(addr, next)) {</div><div class='add'>+			} else if (vmemmap_pmd_is_unused(addr, next)) {</div><div class='ctx'> 					free_hugepage_table(pmd_page(*pmd),</div><div class='ctx'> 							    altmap);</div><div class='ctx'> 					spin_lock(&amp;init_mm.page_table_lock);</div><div class='ctx'> 					pmd_clear(pmd);</div><div class='ctx'> 					spin_unlock(&amp;init_mm.page_table_lock);</div><div class='ctx'> 			}</div><div class='del'>-#endif</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1391,6 +1392,8 @@ void mark_rodata_ro(void)</div><div class='ctx'> 	       (end - start) &gt;&gt; 10);</div><div class='ctx'> 	set_memory_ro(start, (end - start) &gt;&gt; PAGE_SHIFT);</div><div class='ctx'> </div><div class='add'>+	execmem_cache_make_ro();</div><div class='add'>+</div><div class='ctx'> 	kernel_set_to_readonly = 1;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1492,7 +1495,6 @@ unsigned long memory_block_size_bytes(void)</div><div class='ctx'> 	return memory_block_size_probed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SPARSEMEM_VMEMMAP</div><div class='ctx'> /*</div><div class='ctx'>  * Initialise the sparsemem vmemmap using huge-pages at the PMD level.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1639,4 +1641,3 @@ void __meminit vmemmap_populate_print_last(void)</div><div class='ctx'> 		node_start = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='head'>diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c<br/>index 7490ff6d83b1..faf3a13fb6ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/mem_encrypt_amd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/mem_encrypt_amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/mem_encrypt_amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/mem_encrypt_amd.c</a></div><div class='hunk'>@@ -40,7 +40,9 @@</div><div class='ctx'>  * section is later cleared.</div><div class='ctx'>  */</div><div class='ctx'> u64 sme_me_mask __section(".data") = 0;</div><div class='add'>+SYM_PIC_ALIAS(sme_me_mask);</div><div class='ctx'> u64 sev_status __section(".data") = 0;</div><div class='add'>+SYM_PIC_ALIAS(sev_status);</div><div class='ctx'> u64 sev_check_data __section(".data") = 0;</div><div class='ctx'> EXPORT_SYMBOL(sme_me_mask);</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/mm_internal.h b/arch/x86/mm/mm_internal.h<br/>index 3f37b5c80bb3..097aadc250f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/mm_internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/mm_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/mm_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/mm_internal.h</a></div><div class='hunk'>@@ -25,4 +25,8 @@ void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache);</div><div class='ctx'> </div><div class='ctx'> extern unsigned long tlb_single_page_flush_ceiling;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_NUMA</div><div class='add'>+void __init x86_numa_init(void);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #endif	/* __X86_MM_INTERNAL_H */</div><div class='head'>diff --git a/arch/x86/mm/numa.c b/arch/x86/mm/numa.c<br/>index 64e5cdb2460a..c24890c40138 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/numa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/numa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/numa.c</a></div><div class='hunk'>@@ -18,9 +18,10 @@</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='ctx'> #include &lt;asm/proto.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/numa.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "numa_internal.h"</div><div class='add'>+#include "mm_internal.h"</div><div class='ctx'> </div><div class='ctx'> int numa_off;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c<br/>deleted file mode 100644<br/>index 65fda406e6f2..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/numa_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa_32.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,61 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Written by: Patricia Gaughen &lt;gone@us.ibm.com&gt;, IBM Corporation</div><div class='del'>- * August 2002: added remote node KVA remap - Martin J. Bligh </div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002, IBM Corp.</div><div class='del'>- *</div><div class='del'>- * All rights reserved.          </div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or</div><div class='del'>- * NON INFRINGEMENT.  See the GNU General Public License for more</div><div class='del'>- * details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, write to the Free Software</div><div class='del'>- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;asm/pgtable_areas.h&gt;</div><div class='del'>-</div><div class='del'>-#include "numa_internal.h"</div><div class='del'>-</div><div class='del'>-extern unsigned long highend_pfn, highstart_pfn;</div><div class='del'>-</div><div class='del'>-void __init initmem_init(void)</div><div class='del'>-{</div><div class='del'>-	x86_numa_init();</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_HIGHMEM</div><div class='del'>-	highstart_pfn = highend_pfn = max_pfn;</div><div class='del'>-	if (max_pfn &gt; max_low_pfn)</div><div class='del'>-		highstart_pfn = max_low_pfn;</div><div class='del'>-	printk(KERN_NOTICE "%ldMB HIGHMEM available.\n",</div><div class='del'>-	       pages_to_mb(highend_pfn - highstart_pfn));</div><div class='del'>-	high_memory = (void *) __va(highstart_pfn * PAGE_SIZE - 1) + 1;</div><div class='del'>-#else</div><div class='del'>-	high_memory = (void *) __va(max_low_pfn * PAGE_SIZE - 1) + 1;</div><div class='del'>-#endif</div><div class='del'>-	printk(KERN_NOTICE "%ldMB LOWMEM available.\n",</div><div class='del'>-			pages_to_mb(max_low_pfn));</div><div class='del'>-	printk(KERN_DEBUG "max_low_pfn = %lx, highstart_pfn = %lx\n",</div><div class='del'>-			max_low_pfn, highstart_pfn);</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "Low memory ends at vaddr %08lx\n",</div><div class='del'>-			(ulong) pfn_to_kaddr(max_low_pfn));</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "High memory starts at vaddr %08lx\n",</div><div class='del'>-			(ulong) pfn_to_kaddr(highstart_pfn));</div><div class='del'>-</div><div class='del'>-	__vmalloc_start_set = true;</div><div class='del'>-	setup_bootmem_allocator();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c<br/>deleted file mode 100644<br/>index 59d80160fa5a..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/numa_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa_64.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Generic VM initialization for x86-64 NUMA setups.</div><div class='del'>- * Copyright 2002,2003 Andi Kleen, SuSE Labs.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/memblock.h&gt;</div><div class='del'>-</div><div class='del'>-#include "numa_internal.h"</div><div class='del'>-</div><div class='del'>-void __init initmem_init(void)</div><div class='del'>-{</div><div class='del'>-	x86_numa_init();</div><div class='del'>-}</div><div class='head'>diff --git a/arch/x86/mm/numa_internal.h b/arch/x86/mm/numa_internal.h<br/>deleted file mode 100644<br/>index 11e1ff370c10..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/numa_internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/numa_internal.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef __X86_MM_NUMA_INTERNAL_H</div><div class='del'>-#define __X86_MM_NUMA_INTERNAL_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/numa.h&gt;</div><div class='del'>-</div><div class='del'>-void __init x86_numa_init(void);</div><div class='del'>-</div><div class='del'>-#endif	/* __X86_MM_NUMA_INTERNAL_H */</div><div class='head'>diff --git a/arch/x86/mm/pat/memtype.c b/arch/x86/mm/pat/memtype.c<br/>index 72d8cbc61158..c97b527c66fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/pat/memtype.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pat/memtype.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/pat/memtype.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/pat/memtype.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/pfn_t.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='hunk'>@@ -232,7 +233,7 @@ void pat_cpu_init(void)</div><div class='ctx'> 		panic("x86/PAT: PAT enabled, but not supported by secondary CPU\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_IA32_CR_PAT, pat_msr_val);</div><div class='add'>+	wrmsrq(MSR_IA32_CR_PAT, pat_msr_val);</div><div class='ctx'> </div><div class='ctx'> 	__flush_tlb_all();</div><div class='ctx'> }</div><div class='hunk'>@@ -256,7 +257,7 @@ void __init pat_bp_init(void)</div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_PAT))</div><div class='ctx'> 		pat_disable("PAT not supported by the CPU.");</div><div class='ctx'> 	else</div><div class='del'>-		rdmsrl(MSR_IA32_CR_PAT, pat_msr_val);</div><div class='add'>+		rdmsrq(MSR_IA32_CR_PAT, pat_msr_val);</div><div class='ctx'> </div><div class='ctx'> 	if (!pat_msr_val) {</div><div class='ctx'> 		pat_disable("PAT support disabled by the firmware.");</div><div class='hunk'>@@ -682,6 +683,7 @@ static enum page_cache_mode lookup_memtype(u64 paddr)</div><div class='ctx'> /**</div><div class='ctx'>  * pat_pfn_immune_to_uc_mtrr - Check whether the PAT memory type</div><div class='ctx'>  * of @pfn cannot be overridden by UC MTRR memory type.</div><div class='add'>+ * @pfn: The page frame number to check.</div><div class='ctx'>  *</div><div class='ctx'>  * Only to be called when PAT is enabled.</div><div class='ctx'>  *</div><div class='hunk'>@@ -773,38 +775,14 @@ pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,</div><div class='ctx'> 	return vma_prot;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_STRICT_DEVMEM</div><div class='del'>-/* This check is done in drivers/char/mem.c in case of STRICT_DEVMEM */</div><div class='del'>-static inline int range_is_allowed(unsigned long pfn, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-/* This check is needed to avoid cache aliasing when PAT is enabled */</div><div class='del'>-static inline int range_is_allowed(unsigned long pfn, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	u64 from = ((u64)pfn) &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	u64 to = from + size;</div><div class='del'>-	u64 cursor = from;</div><div class='del'>-</div><div class='del'>-	if (!pat_enabled())</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	while (cursor &lt; to) {</div><div class='del'>-		if (!devmem_is_allowed(pfn))</div><div class='del'>-			return 0;</div><div class='del'>-		cursor += PAGE_SIZE;</div><div class='del'>-		pfn++;</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_STRICT_DEVMEM */</div><div class='del'>-</div><div class='ctx'> int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,</div><div class='ctx'> 				unsigned long size, pgprot_t *vma_prot)</div><div class='ctx'> {</div><div class='ctx'> 	enum page_cache_mode pcm = _PAGE_CACHE_MODE_WB;</div><div class='ctx'> </div><div class='add'>+	if (!pat_enabled())</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='ctx'> 	if (!range_is_allowed(pfn, size))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c<br/>index def3d9284254..30ab4aced761 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/pat/set_memory.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pat/set_memory.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/pat/set_memory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/pat/set_memory.c</a></div><div class='hunk'>@@ -889,7 +889,7 @@ static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)</div><div class='ctx'> 	/* change init_mm */</div><div class='ctx'> 	set_pte_atomic(kpte, pte);</div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='del'>-	if (!SHARED_KERNEL_PMD) {</div><div class='add'>+	{</div><div class='ctx'> 		struct page *page;</div><div class='ctx'> </div><div class='ctx'> 		list_for_each_entry(page, &amp;pgd_list, lru) {</div><div class='hunk'>@@ -1293,7 +1293,7 @@ static int collapse_pmd_page(pmd_t *pmd, unsigned long addr,</div><div class='ctx'> 	/* Queue the page table to be freed after TLB flush */</div><div class='ctx'> 	list_add(&amp;page_ptdesc(pmd_page(old_pmd))-&gt;pt_list, pgtables);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_X86_32) &amp;&amp; !SHARED_KERNEL_PMD) {</div><div class='add'>+	if (IS_ENABLED(CONFIG_X86_32)) {</div><div class='ctx'> 		struct page *page;</div><div class='ctx'> </div><div class='ctx'> 		/* Update all PGD tables to use the same large page */</div><div class='head'>diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c<br/>index a05fcddfc811..62777ba4de1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/pgtable.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pgtable.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/pgtable.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/pgtable.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #ifdef CONFIG_DYNAMIC_PHYSICAL_MASK</div><div class='ctx'> phys_addr_t physical_mask __ro_after_init = (1ULL &lt;&lt; __PHYSICAL_MASK_SHIFT) - 1;</div><div class='ctx'> EXPORT_SYMBOL(physical_mask);</div><div class='add'>+SYM_PIC_ALIAS(physical_mask);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> pgtable_t pte_alloc_one(struct mm_struct *mm)</div><div class='hunk'>@@ -68,12 +69,6 @@ static inline void pgd_list_del(pgd_t *pgd)</div><div class='ctx'> 	list_del(&amp;ptdesc-&gt;pt_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define UNSHARED_PTRS_PER_PGD				\</div><div class='del'>-	(SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)</div><div class='del'>-#define MAX_UNSHARED_PTRS_PER_PGD			\</div><div class='del'>-	MAX_T(size_t, KERNEL_PGD_BOUNDARY, PTRS_PER_PGD)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	virt_to_ptdesc(pgd)-&gt;pt_mm = mm;</div><div class='hunk'>@@ -86,29 +81,19 @@ struct mm_struct *pgd_page_get_mm(struct page *page)</div><div class='ctx'> </div><div class='ctx'> static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)</div><div class='ctx'> {</div><div class='del'>-	/* If the pgd points to a shared pagetable level (either the</div><div class='del'>-	   ptes in non-PAE, or shared PMD in PAE), then just copy the</div><div class='del'>-	   references from swapper_pg_dir. */</div><div class='del'>-	if (CONFIG_PGTABLE_LEVELS == 2 ||</div><div class='del'>-	    (CONFIG_PGTABLE_LEVELS == 3 &amp;&amp; SHARED_KERNEL_PMD) ||</div><div class='del'>-	    CONFIG_PGTABLE_LEVELS &gt;= 4) {</div><div class='add'>+	/* PAE preallocates all its PMDs.  No cloning needed. */</div><div class='add'>+	if (!IS_ENABLED(CONFIG_X86_PAE))</div><div class='ctx'> 		clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,</div><div class='ctx'> 				swapper_pg_dir + KERNEL_PGD_BOUNDARY,</div><div class='ctx'> 				KERNEL_PGD_PTRS);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* list required to sync kernel mapping updates */</div><div class='del'>-	if (!SHARED_KERNEL_PMD) {</div><div class='del'>-		pgd_set_mm(pgd, mm);</div><div class='del'>-		pgd_list_add(pgd);</div><div class='del'>-	}</div><div class='add'>+	/* List used to sync kernel mapping updates */</div><div class='add'>+	pgd_set_mm(pgd, mm);</div><div class='add'>+	pgd_list_add(pgd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pgd_dtor(pgd_t *pgd)</div><div class='ctx'> {</div><div class='del'>-	if (SHARED_KERNEL_PMD)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	spin_lock(&amp;pgd_lock);</div><div class='ctx'> 	pgd_list_del(pgd);</div><div class='ctx'> 	spin_unlock(&amp;pgd_lock);</div><div class='hunk'>@@ -132,15 +117,15 @@ static void pgd_dtor(pgd_t *pgd)</div><div class='ctx'>  * processor notices the update.  Since this is expensive, and</div><div class='ctx'>  * all 4 top-level entries are used almost immediately in a</div><div class='ctx'>  * new process's life, we just pre-populate them here.</div><div class='del'>- *</div><div class='del'>- * Also, if we're in a paravirt environment where the kernel pmd is</div><div class='del'>- * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate</div><div class='del'>- * and initialize the kernel pmds here.</div><div class='ctx'>  */</div><div class='del'>-#define PREALLOCATED_PMDS	UNSHARED_PTRS_PER_PGD</div><div class='del'>-#define MAX_PREALLOCATED_PMDS	MAX_UNSHARED_PTRS_PER_PGD</div><div class='add'>+#define PREALLOCATED_PMDS	PTRS_PER_PGD</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * "USER_PMDS" are the PMDs for the user copy of the page tables when</div><div class='add'>+ * PTI is enabled. They do not exist when PTI is disabled.  Note that</div><div class='add'>+ * this is distinct from the user _portion_ of the kernel page tables</div><div class='add'>+ * which always exists.</div><div class='add'>+ *</div><div class='ctx'>  * We allocate separate PMDs for the kernel part of the user page-table</div><div class='ctx'>  * when PTI is enabled. We need them to map the per-process LDT into the</div><div class='ctx'>  * user-space page-table.</div><div class='hunk'>@@ -169,7 +154,6 @@ void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)</div><div class='ctx'> </div><div class='ctx'> /* No need to prepopulate any pagetable entries in non-PAE modes. */</div><div class='ctx'> #define PREALLOCATED_PMDS	0</div><div class='del'>-#define MAX_PREALLOCATED_PMDS	0</div><div class='ctx'> #define PREALLOCATED_USER_PMDS	 0</div><div class='ctx'> #define MAX_PREALLOCATED_USER_PMDS 0</div><div class='ctx'> #endif	/* CONFIG_X86_PAE */</div><div class='hunk'>@@ -318,82 +302,28 @@ static void pgd_prepopulate_user_pmd(struct mm_struct *mm,</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='del'>-/*</div><div class='del'>- * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also</div><div class='del'>- * assumes that pgd should be in one page.</div><div class='del'>- *</div><div class='del'>- * But kernel with PAE paging that is not running as a Xen domain</div><div class='del'>- * only needs to allocate 32 bytes for pgd instead of one page.</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_X86_PAE</div><div class='del'>-</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-</div><div class='del'>-#define PGD_SIZE	(PTRS_PER_PGD * sizeof(pgd_t))</div><div class='del'>-#define PGD_ALIGN	32</div><div class='del'>-</div><div class='del'>-static struct kmem_cache *pgd_cache;</div><div class='del'>-</div><div class='del'>-void __init pgtable_cache_init(void)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * When PAE kernel is running as a Xen domain, it does not use</div><div class='del'>-	 * shared kernel pmd. And this requires a whole page for pgd.</div><div class='del'>-	 */</div><div class='del'>-	if (!SHARED_KERNEL_PMD)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * when PAE kernel is not running as a Xen domain, it uses</div><div class='del'>-	 * shared kernel pmd. Shared kernel pmd does not require a whole</div><div class='del'>-	 * page for pgd. We are able to just allocate a 32-byte for pgd.</div><div class='del'>-	 * During boot time, we create a 32-byte slab for pgd table allocation.</div><div class='del'>-	 */</div><div class='del'>-	pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,</div><div class='del'>-				      SLAB_PANIC, NULL);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static inline pgd_t *_pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.</div><div class='del'>-	 * We allocate one page for pgd.</div><div class='del'>-	 */</div><div class='del'>-	if (!SHARED_KERNEL_PMD)</div><div class='del'>-		return __pgd_alloc(mm, PGD_ALLOCATION_ORDER);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Now PAE kernel is not running as a Xen domain. We can allocate</div><div class='del'>-	 * a 32-byte slab for pgd to save memory space.</div><div class='add'>+	 * PTI and Xen need a whole page for the PAE PGD</div><div class='add'>+	 * even though the hardware only needs 32 bytes.</div><div class='add'>+	 *</div><div class='add'>+	 * For simplicity, allocate a page for all users.</div><div class='ctx'> 	 */</div><div class='del'>-	return kmem_cache_alloc(pgd_cache, GFP_PGTABLE_USER);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void _pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='del'>-{</div><div class='del'>-	if (!SHARED_KERNEL_PMD)</div><div class='del'>-		__pgd_free(mm, pgd);</div><div class='del'>-	else</div><div class='del'>-		kmem_cache_free(pgd_cache, pgd);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-static inline pgd_t *_pgd_alloc(struct mm_struct *mm)</div><div class='del'>-{</div><div class='del'>-	return __pgd_alloc(mm, PGD_ALLOCATION_ORDER);</div><div class='add'>+	return __pgd_alloc(mm, pgd_allocation_order());</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void _pgd_free(struct mm_struct *mm, pgd_t *pgd)</div><div class='ctx'> {</div><div class='ctx'> 	__pgd_free(mm, pgd);</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_X86_PAE */</div><div class='ctx'> </div><div class='ctx'> pgd_t *pgd_alloc(struct mm_struct *mm)</div><div class='ctx'> {</div><div class='ctx'> 	pgd_t *pgd;</div><div class='ctx'> 	pmd_t *u_pmds[MAX_PREALLOCATED_USER_PMDS];</div><div class='del'>-	pmd_t *pmds[MAX_PREALLOCATED_PMDS];</div><div class='add'>+	pmd_t *pmds[PREALLOCATED_PMDS];</div><div class='ctx'> </div><div class='ctx'> 	pgd = _pgd_alloc(mm);</div><div class='ctx'> </div><div class='hunk'>@@ -613,11 +543,11 @@ pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * reserve_top_address - reserves a hole in the top of kernel address space</div><div class='del'>- * @reserve - size of hole to reserve</div><div class='add'>+ * reserve_top_address - Reserve a hole in the top of the kernel address space</div><div class='add'>+ * @reserve: Size of hole to reserve</div><div class='ctx'>  *</div><div class='ctx'>  * Can be used to relocate the fixmap area and poke a hole in the top</div><div class='del'>- * of kernel address space to make room for a hypervisor.</div><div class='add'>+ * of the kernel address space to make room for a hypervisor.</div><div class='ctx'>  */</div><div class='ctx'> void __init reserve_top_address(unsigned long reserve)</div><div class='ctx'> {</div><div class='hunk'>@@ -662,9 +592,12 @@ void native_set_fixmap(unsigned /* enum fixed_addresses */ idx,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP</div><div class='del'>-#ifdef CONFIG_X86_5LEVEL</div><div class='add'>+#if CONFIG_PGTABLE_LEVELS &gt; 4</div><div class='ctx'> /**</div><div class='del'>- * p4d_set_huge - setup kernel P4D mapping</div><div class='add'>+ * p4d_set_huge - Set up kernel P4D mapping</div><div class='add'>+ * @p4d: Pointer to the P4D entry</div><div class='add'>+ * @addr: Virtual address associated with the P4D entry</div><div class='add'>+ * @prot: Protection bits to use</div><div class='ctx'>  *</div><div class='ctx'>  * No 512GB pages yet -- always return 0</div><div class='ctx'>  */</div><div class='hunk'>@@ -674,9 +607,10 @@ int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * p4d_clear_huge - clear kernel P4D mapping when it is set</div><div class='add'>+ * p4d_clear_huge - Clear kernel P4D mapping when it is set</div><div class='add'>+ * @p4d: Pointer to the P4D entry to clear</div><div class='ctx'>  *</div><div class='del'>- * No 512GB pages yet -- always return 0</div><div class='add'>+ * No 512GB pages yet -- do nothing</div><div class='ctx'>  */</div><div class='ctx'> void p4d_clear_huge(p4d_t *p4d)</div><div class='ctx'> {</div><div class='hunk'>@@ -684,7 +618,10 @@ void p4d_clear_huge(p4d_t *p4d)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pud_set_huge - setup kernel PUD mapping</div><div class='add'>+ * pud_set_huge - Set up kernel PUD mapping</div><div class='add'>+ * @pud: Pointer to the PUD entry</div><div class='add'>+ * @addr: Virtual address associated with the PUD entry</div><div class='add'>+ * @prot: Protection bits to use</div><div class='ctx'>  *</div><div class='ctx'>  * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this</div><div class='ctx'>  * function sets up a huge page only if the complete range has the same MTRR</div><div class='hunk'>@@ -715,7 +652,10 @@ int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pmd_set_huge - setup kernel PMD mapping</div><div class='add'>+ * pmd_set_huge - Set up kernel PMD mapping</div><div class='add'>+ * @pmd: Pointer to the PMD entry</div><div class='add'>+ * @addr: Virtual address associated with the PMD entry</div><div class='add'>+ * @prot: Protection bits to use</div><div class='ctx'>  *</div><div class='ctx'>  * See text over pud_set_huge() above.</div><div class='ctx'>  *</div><div class='hunk'>@@ -744,7 +684,8 @@ int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pud_clear_huge - clear kernel PUD mapping when it is set</div><div class='add'>+ * pud_clear_huge - Clear kernel PUD mapping when it is set</div><div class='add'>+ * @pud: Pointer to the PUD entry to clear.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns 1 on success and 0 on failure (no PUD map is found).</div><div class='ctx'>  */</div><div class='hunk'>@@ -759,7 +700,8 @@ int pud_clear_huge(pud_t *pud)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pmd_clear_huge - clear kernel PMD mapping when it is set</div><div class='add'>+ * pmd_clear_huge - Clear kernel PMD mapping when it is set</div><div class='add'>+ * @pmd: Pointer to the PMD entry to clear.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns 1 on success and 0 on failure (no PMD map is found).</div><div class='ctx'>  */</div><div class='hunk'>@@ -775,11 +717,11 @@ int pmd_clear_huge(pmd_t *pmd)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='ctx'> /**</div><div class='del'>- * pud_free_pmd_page - Clear pud entry and free pmd page.</div><div class='del'>- * @pud: Pointer to a PUD.</div><div class='del'>- * @addr: Virtual address associated with pud.</div><div class='add'>+ * pud_free_pmd_page - Clear PUD entry and free PMD page</div><div class='add'>+ * @pud: Pointer to a PUD</div><div class='add'>+ * @addr: Virtual address associated with PUD</div><div class='ctx'>  *</div><div class='del'>- * Context: The pud range has been unmapped and TLB purged.</div><div class='add'>+ * Context: The PUD range has been unmapped and TLB purged.</div><div class='ctx'>  * Return: 1 if clearing the entry succeeded. 0 otherwise.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: Callers must allow a single page allocation.</div><div class='hunk'>@@ -822,11 +764,11 @@ int pud_free_pmd_page(pud_t *pud, unsigned long addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * pmd_free_pte_page - Clear pmd entry and free pte page.</div><div class='del'>- * @pmd: Pointer to a PMD.</div><div class='del'>- * @addr: Virtual address associated with pmd.</div><div class='add'>+ * pmd_free_pte_page - Clear PMD entry and free PTE page.</div><div class='add'>+ * @pmd: Pointer to the PMD</div><div class='add'>+ * @addr: Virtual address associated with PMD</div><div class='ctx'>  *</div><div class='del'>- * Context: The pmd range has been unmapped and TLB purged.</div><div class='add'>+ * Context: The PMD range has been unmapped and TLB purged.</div><div class='ctx'>  * Return: 1 if clearing the entry succeeded. 0 otherwise.</div><div class='ctx'>  */</div><div class='ctx'> int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)</div><div class='hunk'>@@ -848,7 +790,7 @@ int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Disable free page handling on x86-PAE. This assures that ioremap()</div><div class='del'>- * does not update sync'd pmd entries. See vmalloc_sync_one().</div><div class='add'>+ * does not update sync'd PMD entries. See vmalloc_sync_one().</div><div class='ctx'>  */</div><div class='ctx'> int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/mm/pti.c b/arch/x86/mm/pti.c<br/>index 5f0d579932c6..190299834011 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/pti.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/pti.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/pti.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/pti.c</a></div><div class='hunk'>@@ -185,7 +185,7 @@ static p4d_t *pti_user_pagetable_walk_p4d(unsigned long address)</div><div class='ctx'> </div><div class='ctx'> 		set_pgd(pgd, __pgd(_KERNPG_TABLE | __pa(new_p4d_page)));</div><div class='ctx'> 	}</div><div class='del'>-	BUILD_BUG_ON(pgd_leaf(*pgd) != 0);</div><div class='add'>+	BUILD_BUG_ON(pgd_leaf(*pgd));</div><div class='ctx'> </div><div class='ctx'> 	return p4d_offset(pgd, address);</div><div class='ctx'> }</div><div class='hunk'>@@ -206,7 +206,7 @@ static pmd_t *pti_user_pagetable_walk_pmd(unsigned long address)</div><div class='ctx'> 	if (!p4d)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	BUILD_BUG_ON(p4d_leaf(*p4d) != 0);</div><div class='add'>+	BUILD_BUG_ON(p4d_leaf(*p4d));</div><div class='ctx'> 	if (p4d_none(*p4d)) {</div><div class='ctx'> 		unsigned long new_pud_page = __get_free_page(gfp);</div><div class='ctx'> 		if (WARN_ON_ONCE(!new_pud_page))</div><div class='head'>diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c<br/>index e459d97ef397..39f80111e6f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/mm/tlb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/mm/tlb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/mm/tlb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/mm/tlb.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;asm/cache.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/perf_event.h&gt;</div><div class='ctx'> #include &lt;asm/tlb.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -215,16 +216,20 @@ static void clear_asid_other(void)</div><div class='ctx'> </div><div class='ctx'> atomic64_t last_mm_ctx_id = ATOMIC64_INIT(1);</div><div class='ctx'> </div><div class='add'>+struct new_asid {</div><div class='add'>+	unsigned int asid	: 16;</div><div class='add'>+	unsigned int need_flush : 1;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,</div><div class='del'>-			    u16 *new_asid, bool *need_flush)</div><div class='add'>+static struct new_asid choose_new_asid(struct mm_struct *next, u64 next_tlb_gen)</div><div class='ctx'> {</div><div class='add'>+	struct new_asid ns;</div><div class='ctx'> 	u16 asid;</div><div class='ctx'> </div><div class='ctx'> 	if (!static_cpu_has(X86_FEATURE_PCID)) {</div><div class='del'>-		*new_asid = 0;</div><div class='del'>-		*need_flush = true;</div><div class='del'>-		return;</div><div class='add'>+		ns.asid = 0;</div><div class='add'>+		ns.need_flush = 1;</div><div class='add'>+		return ns;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -235,9 +240,9 @@ static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,</div><div class='ctx'> 		u16 global_asid = mm_global_asid(next);</div><div class='ctx'> </div><div class='ctx'> 		if (global_asid) {</div><div class='del'>-			*new_asid = global_asid;</div><div class='del'>-			*need_flush = false;</div><div class='del'>-			return;</div><div class='add'>+			ns.asid = global_asid;</div><div class='add'>+			ns.need_flush = 0;</div><div class='add'>+			return ns;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -249,22 +254,23 @@ static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,</div><div class='ctx'> 		    next-&gt;context.ctx_id)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		*new_asid = asid;</div><div class='del'>-		*need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) &lt;</div><div class='del'>-			       next_tlb_gen);</div><div class='del'>-		return;</div><div class='add'>+		ns.asid = asid;</div><div class='add'>+		ns.need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) &lt; next_tlb_gen);</div><div class='add'>+		return ns;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * We don't currently own an ASID slot on this CPU.</div><div class='ctx'> 	 * Allocate a slot.</div><div class='ctx'> 	 */</div><div class='del'>-	*new_asid = this_cpu_add_return(cpu_tlbstate.next_asid, 1) - 1;</div><div class='del'>-	if (*new_asid &gt;= TLB_NR_DYN_ASIDS) {</div><div class='del'>-		*new_asid = 0;</div><div class='add'>+	ns.asid = this_cpu_add_return(cpu_tlbstate.next_asid, 1) - 1;</div><div class='add'>+	if (ns.asid &gt;= TLB_NR_DYN_ASIDS) {</div><div class='add'>+		ns.asid = 0;</div><div class='ctx'> 		this_cpu_write(cpu_tlbstate.next_asid, 1);</div><div class='ctx'> 	}</div><div class='del'>-	*need_flush = true;</div><div class='add'>+	ns.need_flush = true;</div><div class='add'>+</div><div class='add'>+	return ns;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -623,7 +629,7 @@ static void l1d_flush_evaluate(unsigned long prev_mm, unsigned long next_mm,</div><div class='ctx'> {</div><div class='ctx'> 	/* Flush L1D if the outgoing task requests it */</div><div class='ctx'> 	if (prev_mm &amp; LAST_USER_MM_L1D_FLUSH)</div><div class='del'>-		wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH);</div><div class='add'>+		wrmsrq(MSR_IA32_FLUSH_CMD, L1D_FLUSH);</div><div class='ctx'> </div><div class='ctx'> 	/* Check whether the incoming task opted in for L1D flush */</div><div class='ctx'> 	if (likely(!(next_mm &amp; LAST_USER_MM_L1D_FLUSH)))</div><div class='hunk'>@@ -667,9 +673,9 @@ static void cond_mitigation(struct task_struct *next)</div><div class='ctx'> 	prev_mm = this_cpu_read(cpu_tlbstate.last_user_mm_spec);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Avoid user/user BTB poisoning by flushing the branch predictor</div><div class='del'>-	 * when switching between processes. This stops one process from</div><div class='del'>-	 * doing Spectre-v2 attacks on another.</div><div class='add'>+	 * Avoid user-&gt;user BTB/RSB poisoning by flushing them when switching</div><div class='add'>+	 * between processes. This stops one process from doing Spectre-v2</div><div class='add'>+	 * attacks on another.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Both, the conditional and the always IBPB mode use the mm</div><div class='ctx'> 	 * pointer to avoid the IBPB when switching between tasks of the</div><div class='hunk'>@@ -781,9 +787,9 @@ void switch_mm_irqs_off(struct mm_struct *unused, struct mm_struct *next,</div><div class='ctx'> 	bool was_lazy = this_cpu_read(cpu_tlbstate_shared.is_lazy);</div><div class='ctx'> 	unsigned cpu = smp_processor_id();</div><div class='ctx'> 	unsigned long new_lam;</div><div class='add'>+	struct new_asid ns;</div><div class='ctx'> 	u64 next_tlb_gen;</div><div class='del'>-	bool need_flush;</div><div class='del'>-	u16 new_asid;</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	/* We don't want flush_tlb_func() to run concurrently with us. */</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_PROVE_LOCKING))</div><div class='hunk'>@@ -847,14 +853,15 @@ void switch_mm_irqs_off(struct mm_struct *unused, struct mm_struct *next,</div><div class='ctx'> 		 * mm_cpumask. The TLB shootdown code can figure out from</div><div class='ctx'> 		 * cpu_tlbstate_shared.is_lazy whether or not to send an IPI.</div><div class='ctx'> 		 */</div><div class='del'>-		if (IS_ENABLED(CONFIG_DEBUG_VM) &amp;&amp; WARN_ON_ONCE(prev != &amp;init_mm &amp;&amp;</div><div class='add'>+		if (IS_ENABLED(CONFIG_DEBUG_VM) &amp;&amp;</div><div class='add'>+		    WARN_ON_ONCE(prev != &amp;init_mm &amp;&amp; !is_notrack_mm(prev) &amp;&amp;</div><div class='ctx'> 				 !cpumask_test_cpu(cpu, mm_cpumask(next))))</div><div class='ctx'> 			cpumask_set_cpu(cpu, mm_cpumask(next));</div><div class='ctx'> </div><div class='ctx'> 		/* Check if the current mm is transitioning to a global ASID */</div><div class='ctx'> 		if (mm_needs_global_asid(next, prev_asid)) {</div><div class='ctx'> 			next_tlb_gen = atomic64_read(&amp;next-&gt;context.tlb_gen);</div><div class='del'>-			choose_new_asid(next, next_tlb_gen, &amp;new_asid, &amp;need_flush);</div><div class='add'>+			ns = choose_new_asid(next, next_tlb_gen);</div><div class='ctx'> 			goto reload_tlb;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -889,8 +896,8 @@ void switch_mm_irqs_off(struct mm_struct *unused, struct mm_struct *next,</div><div class='ctx'> 		 * TLB contents went out of date while we were in lazy</div><div class='ctx'> 		 * mode. Fall through to the TLB switching code below.</div><div class='ctx'> 		 */</div><div class='del'>-		new_asid = prev_asid;</div><div class='del'>-		need_flush = true;</div><div class='add'>+		ns.asid = prev_asid;</div><div class='add'>+		ns.need_flush = true;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Apply process to process speculation vulnerability</div><div class='hunk'>@@ -899,40 +906,33 @@ void switch_mm_irqs_off(struct mm_struct *unused, struct mm_struct *next,</div><div class='ctx'> 		cond_mitigation(tsk);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Let nmi_uaccess_okay() and finish_asid_transition()</div><div class='del'>-		 * know that CR3 is changing.</div><div class='add'>+		 * Indicate that CR3 is about to change. nmi_uaccess_okay()</div><div class='add'>+		 * and others are sensitive to the window where mm_cpumask(),</div><div class='add'>+		 * CR3 and cpu_tlbstate.loaded_mm are not all in sync.</div><div class='ctx'> 		 */</div><div class='ctx'> 		this_cpu_write(cpu_tlbstate.loaded_mm, LOADED_MM_SWITCHING);</div><div class='ctx'> 		barrier();</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * Leave this CPU in prev's mm_cpumask. Atomic writes to</div><div class='del'>-		 * mm_cpumask can be expensive under contention. The CPU</div><div class='del'>-		 * will be removed lazily at TLB flush time.</div><div class='del'>-		 */</div><div class='del'>-		VM_WARN_ON_ONCE(prev != &amp;init_mm &amp;&amp; !cpumask_test_cpu(cpu,</div><div class='del'>-				mm_cpumask(prev)));</div><div class='del'>-</div><div class='ctx'> 		/* Start receiving IPIs and then read tlb_gen (and LAM below) */</div><div class='ctx'> 		if (next != &amp;init_mm &amp;&amp; !cpumask_test_cpu(cpu, mm_cpumask(next)))</div><div class='ctx'> 			cpumask_set_cpu(cpu, mm_cpumask(next));</div><div class='ctx'> 		next_tlb_gen = atomic64_read(&amp;next-&gt;context.tlb_gen);</div><div class='ctx'> </div><div class='del'>-		choose_new_asid(next, next_tlb_gen, &amp;new_asid, &amp;need_flush);</div><div class='add'>+		ns = choose_new_asid(next, next_tlb_gen);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> reload_tlb:</div><div class='ctx'> 	new_lam = mm_lam_cr3_mask(next);</div><div class='del'>-	if (need_flush) {</div><div class='del'>-		VM_WARN_ON_ONCE(is_global_asid(new_asid));</div><div class='del'>-		this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next-&gt;context.ctx_id);</div><div class='del'>-		this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);</div><div class='del'>-		load_new_mm_cr3(next-&gt;pgd, new_asid, new_lam, true);</div><div class='add'>+	if (ns.need_flush) {</div><div class='add'>+		VM_WARN_ON_ONCE(is_global_asid(ns.asid));</div><div class='add'>+		this_cpu_write(cpu_tlbstate.ctxs[ns.asid].ctx_id, next-&gt;context.ctx_id);</div><div class='add'>+		this_cpu_write(cpu_tlbstate.ctxs[ns.asid].tlb_gen, next_tlb_gen);</div><div class='add'>+		load_new_mm_cr3(next-&gt;pgd, ns.asid, new_lam, true);</div><div class='ctx'> </div><div class='ctx'> 		trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* The new ASID is already up to date. */</div><div class='del'>-		load_new_mm_cr3(next-&gt;pgd, new_asid, new_lam, false);</div><div class='add'>+		load_new_mm_cr3(next-&gt;pgd, ns.asid, new_lam, false);</div><div class='ctx'> </div><div class='ctx'> 		trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -941,7 +941,7 @@ reload_tlb:</div><div class='ctx'> 	barrier();</div><div class='ctx'> </div><div class='ctx'> 	this_cpu_write(cpu_tlbstate.loaded_mm, next);</div><div class='del'>-	this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid);</div><div class='add'>+	this_cpu_write(cpu_tlbstate.loaded_mm_asid, ns.asid);</div><div class='ctx'> 	cpu_tlbstate_update_lam(new_lam, mm_untag_mask(next));</div><div class='ctx'> </div><div class='ctx'> 	if (next != prev) {</div><div class='hunk'>@@ -972,6 +972,77 @@ void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='add'>+ * Using a temporary mm allows to set temporary mappings that are not accessible</div><div class='add'>+ * by other CPUs. Such mappings are needed to perform sensitive memory writes</div><div class='add'>+ * that override the kernel memory protections (e.g., W^X), without exposing the</div><div class='add'>+ * temporary page-table mappings that are required for these write operations to</div><div class='add'>+ * other CPUs. Using a temporary mm also allows to avoid TLB shootdowns when the</div><div class='add'>+ * mapping is torn down.  Temporary mms can also be used for EFI runtime service</div><div class='add'>+ * calls or similar functionality.</div><div class='add'>+ *</div><div class='add'>+ * It is illegal to schedule while using a temporary mm -- the context switch</div><div class='add'>+ * code is unaware of the temporary mm and does not know how to context switch.</div><div class='add'>+ * Use a real (non-temporary) mm in a kernel thread if you need to sleep.</div><div class='add'>+ *</div><div class='add'>+ * Note: For sensitive memory writes, the temporary mm needs to be used</div><div class='add'>+ *       exclusively by a single core, and IRQs should be disabled while the</div><div class='add'>+ *       temporary mm is loaded, thereby preventing interrupt handler bugs from</div><div class='add'>+ *       overriding the kernel memory protection.</div><div class='add'>+ */</div><div class='add'>+struct mm_struct *use_temporary_mm(struct mm_struct *temp_mm)</div><div class='add'>+{</div><div class='add'>+	struct mm_struct *prev_mm;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_preemption_disabled();</div><div class='add'>+	guard(irqsave)();</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure not to be in TLB lazy mode, as otherwise we'll end up</div><div class='add'>+	 * with a stale address space WITHOUT being in lazy mode after</div><div class='add'>+	 * restoring the previous mm.</div><div class='add'>+	 */</div><div class='add'>+	if (this_cpu_read(cpu_tlbstate_shared.is_lazy))</div><div class='add'>+		leave_mm();</div><div class='add'>+</div><div class='add'>+	prev_mm = this_cpu_read(cpu_tlbstate.loaded_mm);</div><div class='add'>+	switch_mm_irqs_off(NULL, temp_mm, current);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If breakpoints are enabled, disable them while the temporary mm is</div><div class='add'>+	 * used. Userspace might set up watchpoints on addresses that are used</div><div class='add'>+	 * in the temporary mm, which would lead to wrong signals being sent or</div><div class='add'>+	 * crashes.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that breakpoints are not disabled selectively, which also causes</div><div class='add'>+	 * kernel breakpoints (e.g., perf's) to be disabled. This might be</div><div class='add'>+	 * undesirable, but still seems reasonable as the code that runs in the</div><div class='add'>+	 * temporary mm should be short.</div><div class='add'>+	 */</div><div class='add'>+	if (hw_breakpoint_active())</div><div class='add'>+		hw_breakpoint_disable();</div><div class='add'>+</div><div class='add'>+	return prev_mm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void unuse_temporary_mm(struct mm_struct *prev_mm)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_preemption_disabled();</div><div class='add'>+	guard(irqsave)();</div><div class='add'>+</div><div class='add'>+	/* Clear the cpumask, to indicate no TLB flushing is needed anywhere */</div><div class='add'>+	cpumask_clear_cpu(smp_processor_id(), mm_cpumask(this_cpu_read(cpu_tlbstate.loaded_mm)));</div><div class='add'>+</div><div class='add'>+	switch_mm_irqs_off(NULL, prev_mm, current);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Restore the breakpoints if they were disabled before the temporary mm</div><div class='add'>+	 * was loaded.</div><div class='add'>+	 */</div><div class='add'>+	if (hw_breakpoint_active())</div><div class='add'>+		hw_breakpoint_restore();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='ctx'>  * Call this when reinitializing a CPU.  It fixes the following potential</div><div class='ctx'>  * problems:</div><div class='ctx'>  *</div><div class='hunk'>@@ -1204,8 +1275,16 @@ done:</div><div class='ctx'> </div><div class='ctx'> static bool should_flush_tlb(int cpu, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct mm_struct *loaded_mm = per_cpu(cpu_tlbstate.loaded_mm, cpu);</div><div class='ctx'> 	struct flush_tlb_info *info = data;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Order the 'loaded_mm' and 'is_lazy' against their</div><div class='add'>+	 * write ordering in switch_mm_irqs_off(). Ensure</div><div class='add'>+	 * 'is_lazy' is at least as new as 'loaded_mm'.</div><div class='add'>+	 */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='ctx'> 	/* Lazy TLB will get flushed at the next context switch. */</div><div class='ctx'> 	if (per_cpu(cpu_tlbstate_shared.is_lazy, cpu))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1214,8 +1293,15 @@ static bool should_flush_tlb(int cpu, void *data)</div><div class='ctx'> 	if (!info-&gt;mm)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * While switching, the remote CPU could have state from</div><div class='add'>+	 * either the prev or next mm. Assume the worst and flush.</div><div class='add'>+	 */</div><div class='add'>+	if (loaded_mm == LOADED_MM_SWITCHING)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	/* The target mm is loaded, and the CPU is not lazy. */</div><div class='del'>-	if (per_cpu(cpu_tlbstate.loaded_mm, cpu) == info-&gt;mm)</div><div class='add'>+	if (loaded_mm == info-&gt;mm)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	/* In cpumask, but not the loaded mm? Periodically remove by flushing. */</div><div class='head'>diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c<br/>index 9e5fe2ba858f..15672cb926fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/net/bpf_jit_comp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/net/bpf_jit_comp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/net/bpf_jit_comp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/net/bpf_jit_comp.c</a></div><div class='hunk'>@@ -41,6 +41,8 @@ static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)</div><div class='ctx'> #define EMIT2(b1, b2)		EMIT((b1) + ((b2) &lt;&lt; 8), 2)</div><div class='ctx'> #define EMIT3(b1, b2, b3)	EMIT((b1) + ((b2) &lt;&lt; 8) + ((b3) &lt;&lt; 16), 3)</div><div class='ctx'> #define EMIT4(b1, b2, b3, b4)   EMIT((b1) + ((b2) &lt;&lt; 8) + ((b3) &lt;&lt; 16) + ((b4) &lt;&lt; 24), 4)</div><div class='add'>+#define EMIT5(b1, b2, b3, b4, b5) \</div><div class='add'>+	do { EMIT1(b1); EMIT4(b2, b3, b4, b5); } while (0)</div><div class='ctx'> </div><div class='ctx'> #define EMIT1_off32(b1, off) \</div><div class='ctx'> 	do { EMIT1(b1); EMIT(off, 4); } while (0)</div><div class='hunk'>@@ -629,7 +631,7 @@ static int __bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	ret = 1;</div><div class='ctx'> 	if (memcmp(ip, new_insn, X86_PATCH_SIZE)) {</div><div class='del'>-		text_poke_bp(ip, new_insn, X86_PATCH_SIZE, NULL);</div><div class='add'>+		smp_text_poke_single(ip, new_insn, X86_PATCH_SIZE, NULL);</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='hunk'>@@ -661,7 +663,10 @@ static void emit_indirect_jump(u8 **pprog, int reg, u8 *ip)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *prog = *pprog;</div><div class='ctx'> </div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_RETPOLINE_LFENCE)) {</div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_INDIRECT_THUNK_ITS)) {</div><div class='add'>+		OPTIMIZER_HIDE_VAR(reg);</div><div class='add'>+		emit_jump(&amp;prog, its_static_thunk(reg), ip);</div><div class='add'>+	} else if (cpu_feature_enabled(X86_FEATURE_RETPOLINE_LFENCE)) {</div><div class='ctx'> 		EMIT_LFENCE();</div><div class='ctx'> 		EMIT2(0xFF, 0xE0 + reg);</div><div class='ctx'> 	} else if (cpu_feature_enabled(X86_FEATURE_RETPOLINE)) {</div><div class='hunk'>@@ -683,7 +688,7 @@ static void emit_return(u8 **pprog, u8 *ip)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *prog = *pprog;</div><div class='ctx'> </div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_RETHUNK)) {</div><div class='add'>+	if (cpu_wants_rethunk()) {</div><div class='ctx'> 		emit_jump(&amp;prog, x86_return_thunk, ip);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		EMIT1(0xC3);		/* ret */</div><div class='hunk'>@@ -1502,6 +1507,48 @@ static void emit_priv_frame_ptr(u8 **pprog, void __percpu *priv_frame_ptr)</div><div class='ctx'> #define PRIV_STACK_GUARD_SZ    8</div><div class='ctx'> #define PRIV_STACK_GUARD_VAL   0xEB9F12345678eb9fULL</div><div class='ctx'> </div><div class='add'>+static int emit_spectre_bhb_barrier(u8 **pprog, u8 *ip,</div><div class='add'>+				    struct bpf_prog *bpf_prog)</div><div class='add'>+{</div><div class='add'>+	u8 *prog = *pprog;</div><div class='add'>+	u8 *func;</div><div class='add'>+</div><div class='add'>+	if (cpu_feature_enabled(X86_FEATURE_CLEAR_BHB_LOOP)) {</div><div class='add'>+		/* The clearing sequence clobbers eax and ecx. */</div><div class='add'>+		EMIT1(0x50); /* push rax */</div><div class='add'>+		EMIT1(0x51); /* push rcx */</div><div class='add'>+		ip += 2;</div><div class='add'>+</div><div class='add'>+		func = (u8 *)clear_bhb_loop;</div><div class='add'>+		ip += x86_call_depth_emit_accounting(&amp;prog, func, ip);</div><div class='add'>+</div><div class='add'>+		if (emit_call(&amp;prog, func, ip))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		EMIT1(0x59); /* pop rcx */</div><div class='add'>+		EMIT1(0x58); /* pop rax */</div><div class='add'>+	}</div><div class='add'>+	/* Insert IBHF instruction */</div><div class='add'>+	if ((cpu_feature_enabled(X86_FEATURE_CLEAR_BHB_LOOP) &amp;&amp;</div><div class='add'>+	     cpu_feature_enabled(X86_FEATURE_HYPERVISOR)) ||</div><div class='add'>+	    cpu_feature_enabled(X86_FEATURE_CLEAR_BHB_HW)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Add an Indirect Branch History Fence (IBHF). IBHF acts as a</div><div class='add'>+		 * fence preventing branch history from before the fence from</div><div class='add'>+		 * affecting indirect branches after the fence. This is</div><div class='add'>+		 * specifically used in cBPF jitted code to prevent Intra-mode</div><div class='add'>+		 * BHI attacks. The IBHF instruction is designed to be a NOP on</div><div class='add'>+		 * hardware that doesn't need or support it.  The REP and REX.W</div><div class='add'>+		 * prefixes are required by the microcode, and they also ensure</div><div class='add'>+		 * that the NOP is unlikely to be used in existing code.</div><div class='add'>+		 *</div><div class='add'>+		 * IBHF is not a valid instruction in 32-bit mode.</div><div class='add'>+		 */</div><div class='add'>+		EMIT5(0xF3, 0x48, 0x0F, 0x1E, 0xF8); /* ibhf */</div><div class='add'>+	}</div><div class='add'>+	*pprog = prog;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, u8 *rw_image,</div><div class='ctx'> 		  int oldproglen, struct jit_context *ctx, bool jmp_padding)</div><div class='ctx'> {</div><div class='hunk'>@@ -2544,6 +2591,13 @@ emit_jmp:</div><div class='ctx'> 			seen_exit = true;</div><div class='ctx'> 			/* Update cleanup_addr */</div><div class='ctx'> 			ctx-&gt;cleanup_addr = proglen;</div><div class='add'>+			if (bpf_prog_was_classic(bpf_prog) &amp;&amp;</div><div class='add'>+			    !capable(CAP_SYS_ADMIN)) {</div><div class='add'>+				u8 *ip = image + addrs[i - 1];</div><div class='add'>+</div><div class='add'>+				if (emit_spectre_bhb_barrier(&amp;prog, ip, bpf_prog))</div><div class='add'>+					return -EINVAL;</div><div class='add'>+			}</div><div class='ctx'> 			if (bpf_prog-&gt;aux-&gt;exception_boundary) {</div><div class='ctx'> 				pop_callee_regs(&amp;prog, all_callee_regs_used);</div><div class='ctx'> 				pop_r12(&amp;prog);</div><div class='head'>diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c<br/>index 631512f7ec85..99b1727136c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/pci/amd_bus.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/pci/amd_bus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/pci/amd_bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/pci/amd_bus.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include &lt;linux/cpu.h&gt;</div><div class='ctx'> #include &lt;linux/range.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/pci-direct.h&gt;</div><div class='hunk'>@@ -202,7 +202,7 @@ static int __init early_root_info_init(void)</div><div class='ctx'> </div><div class='ctx'> 	/* need to take out [0, TOM) for RAM*/</div><div class='ctx'> 	address = MSR_K8_TOP_MEM1;</div><div class='del'>-	rdmsrl(address, val);</div><div class='add'>+	rdmsrq(address, val);</div><div class='ctx'> 	end = (val &amp; 0xffffff800000ULL);</div><div class='ctx'> 	printk(KERN_INFO "TOM: %016llx aka %lldM\n", end, end&gt;&gt;20);</div><div class='ctx'> 	if (end &lt; (1ULL&lt;&lt;32))</div><div class='hunk'>@@ -293,12 +293,12 @@ static int __init early_root_info_init(void)</div><div class='ctx'> 	/* need to take out [4G, TOM2) for RAM*/</div><div class='ctx'> 	/* SYS_CFG */</div><div class='ctx'> 	address = MSR_AMD64_SYSCFG;</div><div class='del'>-	rdmsrl(address, val);</div><div class='add'>+	rdmsrq(address, val);</div><div class='ctx'> 	/* TOP_MEM2 is enabled? */</div><div class='ctx'> 	if (val &amp; (1&lt;&lt;21)) {</div><div class='ctx'> 		/* TOP_MEM2 */</div><div class='ctx'> 		address = MSR_K8_TOP_MEM2;</div><div class='del'>-		rdmsrl(address, val);</div><div class='add'>+		rdmsrq(address, val);</div><div class='ctx'> 		end = (val &amp; 0xffffff800000ULL);</div><div class='ctx'> 		printk(KERN_INFO "TOM2: %016llx aka %lldM\n", end, end&gt;&gt;20);</div><div class='ctx'> 		subtract_range(range, RANGE_NUM, 1ULL&lt;&lt;32, end);</div><div class='hunk'>@@ -341,10 +341,10 @@ static int amd_bus_cpu_online(unsigned int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 reg;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_NB_CFG, reg);</div><div class='add'>+	rdmsrq(MSR_AMD64_NB_CFG, reg);</div><div class='ctx'> 	if (!(reg &amp; ENABLE_CF8_EXT_CFG)) {</div><div class='ctx'> 		reg |= ENABLE_CF8_EXT_CFG;</div><div class='del'>-		wrmsrl(MSR_AMD64_NB_CFG, reg);</div><div class='add'>+		wrmsrq(MSR_AMD64_NB_CFG, reg);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c<br/>index efefeb82ab61..e7e71490bd25 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/pci/fixup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/pci/fixup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/pci/fixup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/pci/fixup.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='ctx'> #include &lt;linux/vgaarb.h&gt;</div><div class='del'>-#include &lt;asm/amd_node.h&gt;</div><div class='add'>+#include &lt;asm/amd/node.h&gt;</div><div class='ctx'> #include &lt;asm/hpet.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -970,13 +970,13 @@ static void amd_rp_pme_suspend(struct pci_dev *dev)</div><div class='ctx'> 	struct pci_dev *rp;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * PM_SUSPEND_ON means we're doing runtime suspend, which means</div><div class='add'>+	 * If system suspend is not in progress, we're doing runtime suspend, so</div><div class='ctx'> 	 * amd-pmc will not be involved so PMEs during D3 work as advertised.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * The PMEs *do* work if amd-pmc doesn't put the SoC in the hardware</div><div class='ctx'> 	 * sleep state, but we assume amd-pmc is always present.</div><div class='ctx'> 	 */</div><div class='del'>-	if (pm_suspend_target_state == PM_SUSPEND_ON)</div><div class='add'>+	if (!pm_suspend_in_progress())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	rp = pcie_find_root_port(dev);</div><div class='head'>diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c<br/>index 39255f0eb14d..1f4522325920 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/pci/mmconfig-shared.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/pci/mmconfig-shared.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/pci/mmconfig-shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/pci/mmconfig-shared.c</a></div><div class='hunk'>@@ -22,9 +22,10 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/rculist.h&gt;</div><div class='add'>+#include &lt;asm/acpi.h&gt;</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/pci_x86.h&gt;</div><div class='del'>-#include &lt;asm/acpi.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Indicate if the ECAM resources have been placed into the resource table */</div><div class='ctx'> static bool pci_mmcfg_running_state;</div><div class='head'>diff --git a/arch/x86/platform/efi/efi_64.c b/arch/x86/platform/efi/efi_64.c<br/>index ac57259a432b..e7e8f77f77f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/efi/efi_64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/efi/efi_64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/efi/efi_64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/platform/efi/efi_64.c</a></div><div class='hunk'>@@ -73,7 +73,7 @@ int __init efi_alloc_page_tables(void)</div><div class='ctx'> 	gfp_t gfp_mask;</div><div class='ctx'> </div><div class='ctx'> 	gfp_mask = GFP_KERNEL | __GFP_ZERO;</div><div class='del'>-	efi_pgd = (pgd_t *)__get_free_pages(gfp_mask, PGD_ALLOCATION_ORDER);</div><div class='add'>+	efi_pgd = (pgd_t *)__get_free_pages(gfp_mask, pgd_allocation_order());</div><div class='ctx'> 	if (!efi_pgd)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -89,6 +89,7 @@ int __init efi_alloc_page_tables(void)</div><div class='ctx'> 	efi_mm.pgd = efi_pgd;</div><div class='ctx'> 	mm_init_cpumask(&amp;efi_mm);</div><div class='ctx'> 	init_new_context(NULL, &amp;efi_mm);</div><div class='add'>+	set_notrack_mm(&amp;efi_mm);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +97,7 @@ free_p4d:</div><div class='ctx'> 	if (pgtable_l5_enabled())</div><div class='ctx'> 		free_page((unsigned long)pgd_page_vaddr(*pgd));</div><div class='ctx'> free_pgd:</div><div class='del'>-	free_pages((unsigned long)efi_pgd, PGD_ALLOCATION_ORDER);</div><div class='add'>+	free_pages((unsigned long)efi_pgd, pgd_allocation_order());</div><div class='ctx'> fail:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='hunk'>@@ -434,15 +435,12 @@ void __init efi_dump_pagetable(void)</div><div class='ctx'>  */</div><div class='ctx'> static void efi_enter_mm(void)</div><div class='ctx'> {</div><div class='del'>-	efi_prev_mm = current-&gt;active_mm;</div><div class='del'>-	current-&gt;active_mm = &amp;efi_mm;</div><div class='del'>-	switch_mm(efi_prev_mm, &amp;efi_mm, NULL);</div><div class='add'>+	efi_prev_mm = use_temporary_mm(&amp;efi_mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void efi_leave_mm(void)</div><div class='ctx'> {</div><div class='del'>-	current-&gt;active_mm = efi_prev_mm;</div><div class='del'>-	switch_mm(&amp;efi_mm, efi_prev_mm, NULL);</div><div class='add'>+	unuse_temporary_mm(efi_prev_mm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void arch_efi_call_virt_setup(void)</div><div class='head'>diff --git a/arch/x86/platform/olpc/olpc-xo1-rtc.c b/arch/x86/platform/olpc/olpc-xo1-rtc.c<br/>index 57f210cda761..ee77d57bcab7 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-rtc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/olpc/olpc-xo1-rtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-rtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/platform/olpc/olpc-xo1-rtc.c</a></div><div class='hunk'>@@ -64,9 +64,9 @@ static int __init xo1_rtc_init(void)</div><div class='ctx'> 	of_node_put(node);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("olpc-xo1-rtc: Initializing OLPC XO-1 RTC\n");</div><div class='del'>-	rdmsrl(MSR_RTC_DOMA_OFFSET, rtc_info.rtc_day_alarm);</div><div class='del'>-	rdmsrl(MSR_RTC_MONA_OFFSET, rtc_info.rtc_mon_alarm);</div><div class='del'>-	rdmsrl(MSR_RTC_CEN_OFFSET, rtc_info.rtc_century);</div><div class='add'>+	rdmsrq(MSR_RTC_DOMA_OFFSET, rtc_info.rtc_day_alarm);</div><div class='add'>+	rdmsrq(MSR_RTC_MONA_OFFSET, rtc_info.rtc_mon_alarm);</div><div class='add'>+	rdmsrq(MSR_RTC_CEN_OFFSET, rtc_info.rtc_century);</div><div class='ctx'> </div><div class='ctx'> 	r = platform_device_register(&amp;xo1_rtc_device);</div><div class='ctx'> 	if (r)</div><div class='head'>diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c<br/>index 63066e7c8517..30751b42d54e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-sci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/olpc/olpc-xo1-sci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/olpc/olpc-xo1-sci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/platform/olpc/olpc-xo1-sci.c</a></div><div class='hunk'>@@ -325,7 +325,7 @@ static int setup_sci_interrupt(struct platform_device *pdev)</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "SCI unmapped. Mapping to IRQ 3\n");</div><div class='ctx'> 		sci_irq = 3;</div><div class='ctx'> 		lo |= 0x00300000;</div><div class='del'>-		wrmsrl(0x51400020, lo);</div><div class='add'>+		wrmsrq(0x51400020, lo);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Select level triggered in PIC */</div><div class='head'>diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S<br/>index cfa18ec7d55f..1d78e5631bb8 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/platform/pvh/head.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/platform/pvh/head.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/platform/pvh/head.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/platform/pvh/head.S</a></div><div class='hunk'>@@ -87,8 +87,7 @@ SYM_CODE_START(pvh_start_xen)</div><div class='ctx'> 	mov %ebx, %esi</div><div class='ctx'> 	movl rva(pvh_start_info_sz)(%ebp), %ecx</div><div class='ctx'> 	shr $2,%ecx</div><div class='del'>-	rep</div><div class='del'>-	movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> </div><div class='ctx'> 	leal rva(early_stack_end)(%ebp), %esp</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c<br/>index 08e76a5ca155..916441f5e85c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/power/cpu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/cpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/power/cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/power/cpu.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;asm/mmu_context.h&gt;</div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;asm/microcode.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/fred.h&gt;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_X86_32</div><div class='hunk'>@@ -44,7 +45,7 @@ static void msr_save_context(struct saved_context *ctxt)</div><div class='ctx'> </div><div class='ctx'> 	while (msr &lt; end) {</div><div class='ctx'> 		if (msr-&gt;valid)</div><div class='del'>-			rdmsrl(msr-&gt;info.msr_no, msr-&gt;info.reg.q);</div><div class='add'>+			rdmsrq(msr-&gt;info.msr_no, msr-&gt;info.reg.q);</div><div class='ctx'> 		msr++;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -56,7 +57,7 @@ static void msr_restore_context(struct saved_context *ctxt)</div><div class='ctx'> </div><div class='ctx'> 	while (msr &lt; end) {</div><div class='ctx'> 		if (msr-&gt;valid)</div><div class='del'>-			wrmsrl(msr-&gt;info.msr_no, msr-&gt;info.reg.q);</div><div class='add'>+			wrmsrq(msr-&gt;info.msr_no, msr-&gt;info.reg.q);</div><div class='ctx'> 		msr++;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -110,12 +111,12 @@ static void __save_processor_state(struct saved_context *ctxt)</div><div class='ctx'> 	savesegment(ds, ctxt-&gt;ds);</div><div class='ctx'> 	savesegment(es, ctxt-&gt;es);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_FS_BASE, ctxt-&gt;fs_base);</div><div class='del'>-	rdmsrl(MSR_GS_BASE, ctxt-&gt;kernelmode_gs_base);</div><div class='del'>-	rdmsrl(MSR_KERNEL_GS_BASE, ctxt-&gt;usermode_gs_base);</div><div class='add'>+	rdmsrq(MSR_FS_BASE, ctxt-&gt;fs_base);</div><div class='add'>+	rdmsrq(MSR_GS_BASE, ctxt-&gt;kernelmode_gs_base);</div><div class='add'>+	rdmsrq(MSR_KERNEL_GS_BASE, ctxt-&gt;usermode_gs_base);</div><div class='ctx'> 	mtrr_save_fixed_ranges(NULL);</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_EFER, ctxt-&gt;efer);</div><div class='add'>+	rdmsrq(MSR_EFER, ctxt-&gt;efer);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -125,7 +126,7 @@ static void __save_processor_state(struct saved_context *ctxt)</div><div class='ctx'> 	ctxt-&gt;cr2 = read_cr2();</div><div class='ctx'> 	ctxt-&gt;cr3 = __read_cr3();</div><div class='ctx'> 	ctxt-&gt;cr4 = __read_cr4();</div><div class='del'>-	ctxt-&gt;misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE,</div><div class='add'>+	ctxt-&gt;misc_enable_saved = !rdmsrq_safe(MSR_IA32_MISC_ENABLE,</div><div class='ctx'> 					       &amp;ctxt-&gt;misc_enable);</div><div class='ctx'> 	msr_save_context(ctxt);</div><div class='ctx'> }</div><div class='hunk'>@@ -198,7 +199,7 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)</div><div class='ctx'> 	struct cpuinfo_x86 *c;</div><div class='ctx'> </div><div class='ctx'> 	if (ctxt-&gt;misc_enable_saved)</div><div class='del'>-		wrmsrl(MSR_IA32_MISC_ENABLE, ctxt-&gt;misc_enable);</div><div class='add'>+		wrmsrq(MSR_IA32_MISC_ENABLE, ctxt-&gt;misc_enable);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * control registers</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -208,7 +209,7 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)</div><div class='ctx'> 		__write_cr4(ctxt-&gt;cr4);</div><div class='ctx'> #else</div><div class='ctx'> /* CONFIG X86_64 */</div><div class='del'>-	wrmsrl(MSR_EFER, ctxt-&gt;efer);</div><div class='add'>+	wrmsrq(MSR_EFER, ctxt-&gt;efer);</div><div class='ctx'> 	__write_cr4(ctxt-&gt;cr4);</div><div class='ctx'> #endif</div><div class='ctx'> 	write_cr3(ctxt-&gt;cr3);</div><div class='hunk'>@@ -231,7 +232,7 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)</div><div class='ctx'> 	 * handlers or in complicated helpers like load_gs_index().</div><div class='ctx'> 	 */</div><div class='ctx'> #ifdef CONFIG_X86_64</div><div class='del'>-	wrmsrl(MSR_GS_BASE, ctxt-&gt;kernelmode_gs_base);</div><div class='add'>+	wrmsrq(MSR_GS_BASE, ctxt-&gt;kernelmode_gs_base);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Reinitialize FRED to ensure the FRED MSRs contain the same values</div><div class='hunk'>@@ -267,8 +268,8 @@ static void notrace __restore_processor_state(struct saved_context *ctxt)</div><div class='ctx'> 	 * restoring the selectors clobbers the bases.  Keep in mind</div><div class='ctx'> 	 * that MSR_KERNEL_GS_BASE is horribly misnamed.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl(MSR_FS_BASE, ctxt-&gt;fs_base);</div><div class='del'>-	wrmsrl(MSR_KERNEL_GS_BASE, ctxt-&gt;usermode_gs_base);</div><div class='add'>+	wrmsrq(MSR_FS_BASE, ctxt-&gt;fs_base);</div><div class='add'>+	wrmsrq(MSR_KERNEL_GS_BASE, ctxt-&gt;usermode_gs_base);</div><div class='ctx'> #else</div><div class='ctx'> 	loadsegment(gs, ctxt-&gt;gs);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -414,7 +415,7 @@ static int msr_build_context(const u32 *msr_id, const int num)</div><div class='ctx'> 		u64 dummy;</div><div class='ctx'> </div><div class='ctx'> 		msr_array[i].info.msr_no	= msr_id[j];</div><div class='del'>-		msr_array[i].valid		= !rdmsrl_safe(msr_id[j], &amp;dummy);</div><div class='add'>+		msr_array[i].valid		= !rdmsrq_safe(msr_id[j], &amp;dummy);</div><div class='ctx'> 		msr_array[i].info.reg.q		= 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	saved_msrs-&gt;num   = total_num;</div><div class='head'>diff --git a/arch/x86/power/hibernate.c b/arch/x86/power/hibernate.c<br/>index 5b81d19cd114..a7c23f2a58c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/power/hibernate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/hibernate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/power/hibernate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/power/hibernate.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@ unsigned long relocated_restore_code __visible;</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	pfn_is_nosave - check if given pfn is in the 'nosave' section</div><div class='add'>+ *	@pfn: the page frame number to check.</div><div class='ctx'>  */</div><div class='ctx'> int pfn_is_nosave(unsigned long pfn)</div><div class='ctx'> {</div><div class='hunk'>@@ -86,7 +87,10 @@ static inline u32 compute_e820_crc32(struct e820_table *table)</div><div class='ctx'> /**</div><div class='ctx'>  *	arch_hibernation_header_save - populate the architecture specific part</div><div class='ctx'>  *		of a hibernation image header</div><div class='del'>- *	@addr: address to save the data at</div><div class='add'>+ *	@addr: address where architecture specific header data will be saved.</div><div class='add'>+ *	@max_size: maximum size of architecture specific data in hibernation header.</div><div class='add'>+ *</div><div class='add'>+ *	Return: 0 on success, -EOVERFLOW if max_size is insufficient.</div><div class='ctx'>  */</div><div class='ctx'> int arch_hibernation_header_save(void *addr, unsigned int max_size)</div><div class='ctx'> {</div><div class='head'>diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S<br/>index 5606a15cf9a1..fb910d9f8471 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/power/hibernate_asm_32.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/hibernate_asm_32.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/power/hibernate_asm_32.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/power/hibernate_asm_32.S</a></div><div class='hunk'>@@ -69,8 +69,7 @@ copy_loop:</div><div class='ctx'> 	movl	pbe_orig_address(%edx), %edi</div><div class='ctx'> </div><div class='ctx'> 	movl	$(PAGE_SIZE &gt;&gt; 2), %ecx</div><div class='del'>-	rep</div><div class='del'>-	movsl</div><div class='add'>+	rep movsl</div><div class='ctx'> </div><div class='ctx'> 	movl	pbe_next(%edx), %edx</div><div class='ctx'> 	jmp	copy_loop</div><div class='head'>diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S<br/>index 8c534c36adfa..c73be0a02a6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/power/hibernate_asm_64.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/power/hibernate_asm_64.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/power/hibernate_asm_64.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/power/hibernate_asm_64.S</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> 	 /* code below belongs to the image kernel */</div><div class='ctx'> 	.align PAGE_SIZE</div><div class='ctx'> SYM_FUNC_START(restore_registers)</div><div class='del'>-	ANNOTATE_NOENDBR</div><div class='add'>+	ENDBR</div><div class='ctx'> 	/* go back to the original page tables */</div><div class='ctx'> 	movq    %r9, %cr3</div><div class='ctx'> </div><div class='hunk'>@@ -120,7 +120,7 @@ SYM_FUNC_END(restore_image)</div><div class='ctx'> </div><div class='ctx'> 	/* code below has been relocated to a safe page */</div><div class='ctx'> SYM_FUNC_START(core_restore_code)</div><div class='del'>-	ANNOTATE_NOENDBR</div><div class='add'>+	ENDBR</div><div class='ctx'> 	/* switch to temporary page tables */</div><div class='ctx'> 	movq	%rax, %cr3</div><div class='ctx'> 	/* flush TLB */</div><div class='hunk'>@@ -138,8 +138,7 @@ SYM_FUNC_START(core_restore_code)</div><div class='ctx'> 	movq	pbe_address(%rdx), %rsi</div><div class='ctx'> 	movq	pbe_orig_address(%rdx), %rdi</div><div class='ctx'> 	movq	$(PAGE_SIZE &gt;&gt; 3), %rcx</div><div class='del'>-	rep</div><div class='del'>-	movsq</div><div class='add'>+	rep movsq</div><div class='ctx'> </div><div class='ctx'> 	/* progress to the next pbe */</div><div class='ctx'> 	movq	pbe_next(%rdx), %rdx</div><div class='head'>diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c<br/>index f9bc444a3064..ed5c63c0b4e5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/realmode/init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/realmode/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/realmode/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/realmode/init.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;asm/realmode.h&gt;</div><div class='ctx'> #include &lt;asm/tlbflush.h&gt;</div><div class='ctx'> #include &lt;asm/crash.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct real_mode_header *real_mode_header;</div><div class='hunk'>@@ -145,7 +146,7 @@ static void __init setup_real_mode(void)</div><div class='ctx'> 	 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR</div><div class='ctx'> 	 * so we need to mask it out.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_EFER, efer);</div><div class='add'>+	rdmsrq(MSR_EFER, efer);</div><div class='ctx'> 	trampoline_header-&gt;efer = efer &amp; ~EFER_LMA;</div><div class='ctx'> </div><div class='ctx'> 	trampoline_header-&gt;start = (u64) secondary_startup_64;</div><div class='head'>diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk<br/>index 5770c8097f32..2c19d7fc8a85 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/tools/gen-insn-attr-x86.awk?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/tools/gen-insn-attr-x86.awk</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/tools/gen-insn-attr-x86.awk?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/tools/gen-insn-attr-x86.awk</a></div><div class='hunk'>@@ -64,6 +64,8 @@ BEGIN {</div><div class='ctx'> </div><div class='ctx'> 	modrm_expr = "^([CDEGMNPQRSUVW/][a-z]+|NTA|T[012])"</div><div class='ctx'> 	force64_expr = "\\([df]64\\)"</div><div class='add'>+	invalid64_expr = "\\(i64\\)"</div><div class='add'>+	only64_expr = "\\(o64\\)"</div><div class='ctx'> 	rex_expr = "^((REX(\\.[XRWB]+)+)|(REX$))"</div><div class='ctx'> 	rex2_expr = "\\(REX2\\)"</div><div class='ctx'> 	no_rex2_expr = "\\(!REX2\\)"</div><div class='hunk'>@@ -319,6 +321,11 @@ function convert_operands(count,opnd,       i,j,imm,mod)</div><div class='ctx'> 		if (match(ext, force64_expr))</div><div class='ctx'> 			flags = add_flags(flags, "INAT_FORCE64")</div><div class='ctx'> </div><div class='add'>+		# check invalid in 64-bit (and no only64)</div><div class='add'>+		if (match(ext, invalid64_expr) &amp;&amp;</div><div class='add'>+		    !match($0, only64_expr))</div><div class='add'>+			flags = add_flags(flags, "INAT_INV64")</div><div class='add'>+</div><div class='ctx'> 		# check REX2 not allowed</div><div class='ctx'> 		if (match(ext, no_rex2_expr))</div><div class='ctx'> 			flags = add_flags(flags, "INAT_NO_REX2")</div><div class='head'>diff --git a/arch/x86/um/shared/sysdep/faultinfo_32.h b/arch/x86/um/shared/sysdep/faultinfo_32.h<br/>index ab5c8e47049c..9193a7790a71 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/um/shared/sysdep/faultinfo_32.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/um/shared/sysdep/faultinfo_32.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/um/shared/sysdep/faultinfo_32.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/um/shared/sysdep/faultinfo_32.h</a></div><div class='hunk'>@@ -31,8 +31,8 @@ struct faultinfo {</div><div class='ctx'> </div><div class='ctx'> #define ___backtrack_faulted(_faulted)					\</div><div class='ctx'> 	asm volatile (							\</div><div class='del'>-		"mov $0, %0\n"						\</div><div class='ctx'> 		"movl $__get_kernel_nofault_faulted_%=,%1\n"		\</div><div class='add'>+		"mov $0, %0\n"						\</div><div class='ctx'> 		"jmp _end_%=\n"						\</div><div class='ctx'> 		"__get_kernel_nofault_faulted_%=:\n"			\</div><div class='ctx'> 		"mov $1, %0;"						\</div><div class='head'>diff --git a/arch/x86/um/shared/sysdep/faultinfo_64.h b/arch/x86/um/shared/sysdep/faultinfo_64.h<br/>index 26fb4835d3e9..61e4ca1e0ab5 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/um/shared/sysdep/faultinfo_64.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/um/shared/sysdep/faultinfo_64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/um/shared/sysdep/faultinfo_64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/um/shared/sysdep/faultinfo_64.h</a></div><div class='hunk'>@@ -31,8 +31,8 @@ struct faultinfo {</div><div class='ctx'> </div><div class='ctx'> #define ___backtrack_faulted(_faulted)					\</div><div class='ctx'> 	asm volatile (							\</div><div class='del'>-		"mov $0, %0\n"						\</div><div class='ctx'> 		"movq $__get_kernel_nofault_faulted_%=,%1\n"		\</div><div class='add'>+		"mov $0, %0\n"						\</div><div class='ctx'> 		"jmp _end_%=\n"						\</div><div class='ctx'> 		"__get_kernel_nofault_faulted_%=:\n"			\</div><div class='ctx'> 		"mov $1, %0;"						\</div><div class='head'>diff --git a/arch/x86/virt/svm/sev.c b/arch/x86/virt/svm/sev.c<br/>index fc473ca12c44..942372e69b4d 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/svm/sev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/svm/sev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/virt/svm/sev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/virt/svm/sev.c</a></div><div class='hunk'>@@ -27,9 +27,10 @@</div><div class='ctx'> #include &lt;asm/smp.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/cmdline.h&gt;</div><div class='ctx'> #include &lt;asm/iommu.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The RMP entry information as returned by the RMPREAD instruction.</div><div class='hunk'>@@ -136,11 +137,11 @@ static int __mfd_enable(unsigned int cpu)</div><div class='ctx'> 	if (!cc_platform_has(CC_ATTR_HOST_SEV_SNP))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_SYSCFG, val);</div><div class='add'>+	rdmsrq(MSR_AMD64_SYSCFG, val);</div><div class='ctx'> </div><div class='ctx'> 	val |= MSR_AMD64_SYSCFG_MFDM;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_AMD64_SYSCFG, val);</div><div class='add'>+	wrmsrq(MSR_AMD64_SYSCFG, val);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -157,12 +158,12 @@ static int __snp_enable(unsigned int cpu)</div><div class='ctx'> 	if (!cc_platform_has(CC_ATTR_HOST_SEV_SNP))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_SYSCFG, val);</div><div class='add'>+	rdmsrq(MSR_AMD64_SYSCFG, val);</div><div class='ctx'> </div><div class='ctx'> 	val |= MSR_AMD64_SYSCFG_SNP_EN;</div><div class='ctx'> 	val |= MSR_AMD64_SYSCFG_SNP_VMPL_EN;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(MSR_AMD64_SYSCFG, val);</div><div class='add'>+	wrmsrq(MSR_AMD64_SYSCFG, val);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -522,7 +523,7 @@ int __init snp_rmptable_init(void)</div><div class='ctx'> 	 * Check if SEV-SNP is already enabled, this can happen in case of</div><div class='ctx'> 	 * kexec boot.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_AMD64_SYSCFG, val);</div><div class='add'>+	rdmsrq(MSR_AMD64_SYSCFG, val);</div><div class='ctx'> 	if (val &amp; MSR_AMD64_SYSCFG_SNP_EN)</div><div class='ctx'> 		goto skip_enable;</div><div class='ctx'> </div><div class='hunk'>@@ -576,8 +577,8 @@ static bool probe_contiguous_rmptable_info(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 rmp_sz, rmp_base, rmp_end;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_RMP_BASE, rmp_base);</div><div class='del'>-	rdmsrl(MSR_AMD64_RMP_END, rmp_end);</div><div class='add'>+	rdmsrq(MSR_AMD64_RMP_BASE, rmp_base);</div><div class='add'>+	rdmsrq(MSR_AMD64_RMP_END, rmp_end);</div><div class='ctx'> </div><div class='ctx'> 	if (!(rmp_base &amp; RMP_ADDR_MASK) || !(rmp_end &amp; RMP_ADDR_MASK)) {</div><div class='ctx'> 		pr_err("Memory for the RMP table has not been reserved by BIOS\n");</div><div class='hunk'>@@ -610,13 +611,13 @@ static bool probe_segmented_rmptable_info(void)</div><div class='ctx'> 	unsigned int eax, ebx, segment_shift, segment_shift_min, segment_shift_max;</div><div class='ctx'> 	u64 rmp_base, rmp_end;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_RMP_BASE, rmp_base);</div><div class='add'>+	rdmsrq(MSR_AMD64_RMP_BASE, rmp_base);</div><div class='ctx'> 	if (!(rmp_base &amp; RMP_ADDR_MASK)) {</div><div class='ctx'> 		pr_err("Memory for the RMP table has not been reserved by BIOS\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_AMD64_RMP_END, rmp_end);</div><div class='add'>+	rdmsrq(MSR_AMD64_RMP_END, rmp_end);</div><div class='ctx'> 	WARN_ONCE(rmp_end &amp; RMP_ADDR_MASK,</div><div class='ctx'> 		  "Segmented RMP enabled but RMP_END MSR is non-zero\n");</div><div class='ctx'> </div><div class='hunk'>@@ -652,7 +653,7 @@ static bool probe_segmented_rmptable_info(void)</div><div class='ctx'> bool snp_probe_rmptable_info(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_SEGMENTED_RMP))</div><div class='del'>-		rdmsrl(MSR_AMD64_RMP_CFG, rmp_cfg);</div><div class='add'>+		rdmsrq(MSR_AMD64_RMP_CFG, rmp_cfg);</div><div class='ctx'> </div><div class='ctx'> 	if (rmp_cfg &amp; MSR_AMD64_SEG_RMP_ENABLED)</div><div class='ctx'> 		return probe_segmented_rmptable_info();</div><div class='head'>diff --git a/arch/x86/virt/vmx/tdx/seamcall.S b/arch/x86/virt/vmx/tdx/seamcall.S<br/>index 5b1f2286aea9..6854c52c374b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/seamcall.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/seamcall.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/seamcall.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/virt/vmx/tdx/seamcall.S</a></div><div class='hunk'>@@ -41,6 +41,9 @@ SYM_FUNC_START(__seamcall_ret)</div><div class='ctx'> 	TDX_MODULE_CALL host=1 ret=1</div><div class='ctx'> SYM_FUNC_END(__seamcall_ret)</div><div class='ctx'> </div><div class='add'>+/* KVM requires non-instrumentable __seamcall_saved_ret() for TDH.VP.ENTER */</div><div class='add'>+.section .noinstr.text, "ax"</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * __seamcall_saved_ret() - Host-side interface functions to SEAM software</div><div class='ctx'>  * (the P-SEAMLDR or the TDX module), with saving output registers to the</div><div class='head'>diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c<br/>index 7fdb37387886..2457d13c3f9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/tdx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/virt/vmx/tdx/tdx.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  * Intel Trusted Domain Extensions (TDX) support</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "asm/page_types.h"</div><div class='ctx'> #define pr_fmt(fmt)	"virt/tdx: " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -27,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/idr.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='ctx'> #include &lt;asm/special_insns.h&gt;</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='hunk'>@@ -42,6 +44,8 @@ static u32 tdx_global_keyid __ro_after_init;</div><div class='ctx'> static u32 tdx_guest_keyid_start __ro_after_init;</div><div class='ctx'> static u32 tdx_nr_guest_keyids __ro_after_init;</div><div class='ctx'> </div><div class='add'>+static DEFINE_IDA(tdx_guest_keyid_pool);</div><div class='add'>+</div><div class='ctx'> static DEFINE_PER_CPU(bool, tdx_lp_initialized);</div><div class='ctx'> </div><div class='ctx'> static struct tdmr_info_list tdx_tdmr_list;</div><div class='hunk'>@@ -52,6 +56,8 @@ static DEFINE_MUTEX(tdx_module_lock);</div><div class='ctx'> /* All TDX-usable memory regions.  Protected by mem_hotplug_lock. */</div><div class='ctx'> static LIST_HEAD(tdx_memlist);</div><div class='ctx'> </div><div class='add'>+static struct tdx_sys_info tdx_sysinfo;</div><div class='add'>+</div><div class='ctx'> typedef void (*sc_err_func_t)(u64 fn, u64 err, struct tdx_module_args *args);</div><div class='ctx'> </div><div class='ctx'> static inline void seamcall_err(u64 fn, u64 err, struct tdx_module_args *args)</div><div class='hunk'>@@ -1060,15 +1066,14 @@ static int init_tdmrs(struct tdmr_info_list *tdmr_list)</div><div class='ctx'> </div><div class='ctx'> static int init_tdx_module(void)</div><div class='ctx'> {</div><div class='del'>-	struct tdx_sys_info sysinfo;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = get_tdx_sys_info(&amp;sysinfo);</div><div class='add'>+	ret = get_tdx_sys_info(&amp;tdx_sysinfo);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Check whether the kernel can support this module */</div><div class='del'>-	ret = check_features(&amp;sysinfo);</div><div class='add'>+	ret = check_features(&amp;tdx_sysinfo);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1089,12 +1094,12 @@ static int init_tdx_module(void)</div><div class='ctx'> 		goto out_put_tdxmem;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate enough space for constructing TDMRs */</div><div class='del'>-	ret = alloc_tdmr_list(&amp;tdx_tdmr_list, &amp;sysinfo.tdmr);</div><div class='add'>+	ret = alloc_tdmr_list(&amp;tdx_tdmr_list, &amp;tdx_sysinfo.tdmr);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_free_tdxmem;</div><div class='ctx'> </div><div class='ctx'> 	/* Cover all TDX-usable memory regions in TDMRs */</div><div class='del'>-	ret = construct_tdmrs(&amp;tdx_memlist, &amp;tdx_tdmr_list, &amp;sysinfo.tdmr);</div><div class='add'>+	ret = construct_tdmrs(&amp;tdx_memlist, &amp;tdx_tdmr_list, &amp;tdx_sysinfo.tdmr);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_free_tdmrs;</div><div class='ctx'> </div><div class='hunk'>@@ -1456,3 +1461,411 @@ void __init tdx_init(void)</div><div class='ctx'> </div><div class='ctx'> 	check_tdx_erratum();</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+const struct tdx_sys_info *tdx_get_sysinfo(void)</div><div class='add'>+{</div><div class='add'>+	const struct tdx_sys_info *p = NULL;</div><div class='add'>+</div><div class='add'>+	/* Make sure all fields in @tdx_sysinfo have been populated */</div><div class='add'>+	mutex_lock(&amp;tdx_module_lock);</div><div class='add'>+	if (tdx_module_status == TDX_MODULE_INITIALIZED)</div><div class='add'>+		p = (const struct tdx_sys_info *)&amp;tdx_sysinfo;</div><div class='add'>+	mutex_unlock(&amp;tdx_module_lock);</div><div class='add'>+</div><div class='add'>+	return p;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdx_get_sysinfo);</div><div class='add'>+</div><div class='add'>+u32 tdx_get_nr_guest_keyids(void)</div><div class='add'>+{</div><div class='add'>+	return tdx_nr_guest_keyids;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdx_get_nr_guest_keyids);</div><div class='add'>+</div><div class='add'>+int tdx_guest_keyid_alloc(void)</div><div class='add'>+{</div><div class='add'>+	return ida_alloc_range(&amp;tdx_guest_keyid_pool, tdx_guest_keyid_start,</div><div class='add'>+			       tdx_guest_keyid_start + tdx_nr_guest_keyids - 1,</div><div class='add'>+			       GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdx_guest_keyid_alloc);</div><div class='add'>+</div><div class='add'>+void tdx_guest_keyid_free(unsigned int keyid)</div><div class='add'>+{</div><div class='add'>+	ida_free(&amp;tdx_guest_keyid_pool, keyid);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdx_guest_keyid_free);</div><div class='add'>+</div><div class='add'>+static inline u64 tdx_tdr_pa(struct tdx_td *td)</div><div class='add'>+{</div><div class='add'>+	return page_to_phys(td-&gt;tdr_page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 tdx_tdvpr_pa(struct tdx_vp *td)</div><div class='add'>+{</div><div class='add'>+	return page_to_phys(td-&gt;tdvpr_page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The TDX module exposes a CLFLUSH_BEFORE_ALLOC bit to specify whether</div><div class='add'>+ * a CLFLUSH of pages is required before handing them to the TDX module.</div><div class='add'>+ * Be conservative and make the code simpler by doing the CLFLUSH</div><div class='add'>+ * unconditionally.</div><div class='add'>+ */</div><div class='add'>+static void tdx_clflush_page(struct page *page)</div><div class='add'>+{</div><div class='add'>+	clflush_cache_range(page_to_virt(page), PAGE_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+noinstr __flatten u64 tdh_vp_enter(struct tdx_vp *td, struct tdx_module_args *args)</div><div class='add'>+{</div><div class='add'>+	args-&gt;rcx = tdx_tdvpr_pa(td);</div><div class='add'>+</div><div class='add'>+	return __seamcall_saved_ret(TDH_VP_ENTER, args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_vp_enter);</div><div class='add'>+</div><div class='add'>+u64 tdh_mng_addcx(struct tdx_td *td, struct page *tdcs_page)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = page_to_phys(tdcs_page),</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tdx_clflush_page(tdcs_page);</div><div class='add'>+	return seamcall(TDH_MNG_ADDCX, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mng_addcx);</div><div class='add'>+</div><div class='add'>+u64 tdh_mem_page_add(struct tdx_td *td, u64 gpa, struct page *page, struct page *source, u64 *ext_err1, u64 *ext_err2)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = gpa,</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+		.r8 = page_to_phys(page),</div><div class='add'>+		.r9 = page_to_phys(source),</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	tdx_clflush_page(page);</div><div class='add'>+	ret = seamcall_ret(TDH_MEM_PAGE_ADD, &amp;args);</div><div class='add'>+</div><div class='add'>+	*ext_err1 = args.rcx;</div><div class='add'>+	*ext_err2 = args.rdx;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mem_page_add);</div><div class='add'>+</div><div class='add'>+u64 tdh_mem_sept_add(struct tdx_td *td, u64 gpa, int level, struct page *page, u64 *ext_err1, u64 *ext_err2)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = gpa | level,</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+		.r8 = page_to_phys(page),</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	tdx_clflush_page(page);</div><div class='add'>+	ret = seamcall_ret(TDH_MEM_SEPT_ADD, &amp;args);</div><div class='add'>+</div><div class='add'>+	*ext_err1 = args.rcx;</div><div class='add'>+	*ext_err2 = args.rdx;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mem_sept_add);</div><div class='add'>+</div><div class='add'>+u64 tdh_vp_addcx(struct tdx_vp *vp, struct page *tdcx_page)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = page_to_phys(tdcx_page),</div><div class='add'>+		.rdx = tdx_tdvpr_pa(vp),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tdx_clflush_page(tdcx_page);</div><div class='add'>+	return seamcall(TDH_VP_ADDCX, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_vp_addcx);</div><div class='add'>+</div><div class='add'>+u64 tdh_mem_page_aug(struct tdx_td *td, u64 gpa, int level, struct page *page, u64 *ext_err1, u64 *ext_err2)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = gpa | level,</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+		.r8 = page_to_phys(page),</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	tdx_clflush_page(page);</div><div class='add'>+	ret = seamcall_ret(TDH_MEM_PAGE_AUG, &amp;args);</div><div class='add'>+</div><div class='add'>+	*ext_err1 = args.rcx;</div><div class='add'>+	*ext_err2 = args.rdx;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mem_page_aug);</div><div class='add'>+</div><div class='add'>+u64 tdh_mem_range_block(struct tdx_td *td, u64 gpa, int level, u64 *ext_err1, u64 *ext_err2)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = gpa | level,</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = seamcall_ret(TDH_MEM_RANGE_BLOCK, &amp;args);</div><div class='add'>+</div><div class='add'>+	*ext_err1 = args.rcx;</div><div class='add'>+	*ext_err2 = args.rdx;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mem_range_block);</div><div class='add'>+</div><div class='add'>+u64 tdh_mng_key_config(struct tdx_td *td)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_MNG_KEY_CONFIG, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mng_key_config);</div><div class='add'>+</div><div class='add'>+u64 tdh_mng_create(struct tdx_td *td, u16 hkid)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+		.rdx = hkid,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tdx_clflush_page(td-&gt;tdr_page);</div><div class='add'>+	return seamcall(TDH_MNG_CREATE, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mng_create);</div><div class='add'>+</div><div class='add'>+u64 tdh_vp_create(struct tdx_td *td, struct tdx_vp *vp)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdvpr_pa(vp),</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	tdx_clflush_page(vp-&gt;tdvpr_page);</div><div class='add'>+	return seamcall(TDH_VP_CREATE, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_vp_create);</div><div class='add'>+</div><div class='add'>+u64 tdh_mng_rd(struct tdx_td *td, u64 field, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+		.rdx = field,</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = seamcall_ret(TDH_MNG_RD, &amp;args);</div><div class='add'>+</div><div class='add'>+	/* R8: Content of the field, or 0 in case of error. */</div><div class='add'>+	*data = args.r8;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mng_rd);</div><div class='add'>+</div><div class='add'>+u64 tdh_mr_extend(struct tdx_td *td, u64 gpa, u64 *ext_err1, u64 *ext_err2)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = gpa,</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = seamcall_ret(TDH_MR_EXTEND, &amp;args);</div><div class='add'>+</div><div class='add'>+	*ext_err1 = args.rcx;</div><div class='add'>+	*ext_err2 = args.rdx;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mr_extend);</div><div class='add'>+</div><div class='add'>+u64 tdh_mr_finalize(struct tdx_td *td)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_MR_FINALIZE, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mr_finalize);</div><div class='add'>+</div><div class='add'>+u64 tdh_vp_flush(struct tdx_vp *vp)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdvpr_pa(vp),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_VP_FLUSH, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_vp_flush);</div><div class='add'>+</div><div class='add'>+u64 tdh_mng_vpflushdone(struct tdx_td *td)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_MNG_VPFLUSHDONE, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mng_vpflushdone);</div><div class='add'>+</div><div class='add'>+u64 tdh_mng_key_freeid(struct tdx_td *td)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_MNG_KEY_FREEID, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mng_key_freeid);</div><div class='add'>+</div><div class='add'>+u64 tdh_mng_init(struct tdx_td *td, u64 td_params, u64 *extended_err)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+		.rdx = td_params,</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = seamcall_ret(TDH_MNG_INIT, &amp;args);</div><div class='add'>+</div><div class='add'>+	*extended_err = args.rcx;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mng_init);</div><div class='add'>+</div><div class='add'>+u64 tdh_vp_rd(struct tdx_vp *vp, u64 field, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdvpr_pa(vp),</div><div class='add'>+		.rdx = field,</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = seamcall_ret(TDH_VP_RD, &amp;args);</div><div class='add'>+</div><div class='add'>+	/* R8: Content of the field, or 0 in case of error. */</div><div class='add'>+	*data = args.r8;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_vp_rd);</div><div class='add'>+</div><div class='add'>+u64 tdh_vp_wr(struct tdx_vp *vp, u64 field, u64 data, u64 mask)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdvpr_pa(vp),</div><div class='add'>+		.rdx = field,</div><div class='add'>+		.r8 = data,</div><div class='add'>+		.r9 = mask,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_VP_WR, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_vp_wr);</div><div class='add'>+</div><div class='add'>+u64 tdh_vp_init(struct tdx_vp *vp, u64 initial_rcx, u32 x2apicid)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdvpr_pa(vp),</div><div class='add'>+		.rdx = initial_rcx,</div><div class='add'>+		.r8 = x2apicid,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* apicid requires version == 1. */</div><div class='add'>+	return seamcall(TDH_VP_INIT | (1ULL &lt;&lt; TDX_VERSION_SHIFT), &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_vp_init);</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TDX ABI defines output operands as PT, OWNER and SIZE. These are TDX defined fomats.</div><div class='add'>+ * So despite the names, they must be interpted specially as described by the spec. Return</div><div class='add'>+ * them only for error reporting purposes.</div><div class='add'>+ */</div><div class='add'>+u64 tdh_phymem_page_reclaim(struct page *page, u64 *tdx_pt, u64 *tdx_owner, u64 *tdx_size)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = page_to_phys(page),</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = seamcall_ret(TDH_PHYMEM_PAGE_RECLAIM, &amp;args);</div><div class='add'>+</div><div class='add'>+	*tdx_pt = args.rcx;</div><div class='add'>+	*tdx_owner = args.rdx;</div><div class='add'>+	*tdx_size = args.r8;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_phymem_page_reclaim);</div><div class='add'>+</div><div class='add'>+u64 tdh_mem_track(struct tdx_td *td)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_MEM_TRACK, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mem_track);</div><div class='add'>+</div><div class='add'>+u64 tdh_mem_page_remove(struct tdx_td *td, u64 gpa, u64 level, u64 *ext_err1, u64 *ext_err2)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = gpa | level,</div><div class='add'>+		.rdx = tdx_tdr_pa(td),</div><div class='add'>+	};</div><div class='add'>+	u64 ret;</div><div class='add'>+</div><div class='add'>+	ret = seamcall_ret(TDH_MEM_PAGE_REMOVE, &amp;args);</div><div class='add'>+</div><div class='add'>+	*ext_err1 = args.rcx;</div><div class='add'>+	*ext_err2 = args.rdx;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_mem_page_remove);</div><div class='add'>+</div><div class='add'>+u64 tdh_phymem_cache_wb(bool resume)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {</div><div class='add'>+		.rcx = resume ? 1 : 0,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_PHYMEM_CACHE_WB, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_phymem_cache_wb);</div><div class='add'>+</div><div class='add'>+u64 tdh_phymem_page_wbinvd_tdr(struct tdx_td *td)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {};</div><div class='add'>+</div><div class='add'>+	args.rcx = mk_keyed_paddr(tdx_global_keyid, td-&gt;tdr_page);</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_PHYMEM_PAGE_WBINVD, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_phymem_page_wbinvd_tdr);</div><div class='add'>+</div><div class='add'>+u64 tdh_phymem_page_wbinvd_hkid(u64 hkid, struct page *page)</div><div class='add'>+{</div><div class='add'>+	struct tdx_module_args args = {};</div><div class='add'>+</div><div class='add'>+	args.rcx = mk_keyed_paddr(hkid, page);</div><div class='add'>+</div><div class='add'>+	return seamcall(TDH_PHYMEM_PAGE_WBINVD, &amp;args);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(tdh_phymem_page_wbinvd_hkid);</div><div class='head'>diff --git a/arch/x86/virt/vmx/tdx/tdx.h b/arch/x86/virt/vmx/tdx/tdx.h<br/>index 4e3d533cdd61..82bb82be8567 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/tdx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/virt/vmx/tdx/tdx.h</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'> #define _X86_VIRT_TDX_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='del'>-#include "tdx_global_metadata.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * This file contains both macros and data structures defined by the TDX</div><div class='hunk'>@@ -15,13 +14,46 @@</div><div class='ctx'> /*</div><div class='ctx'>  * TDX module SEAMCALL leaf functions</div><div class='ctx'>  */</div><div class='del'>-#define TDH_PHYMEM_PAGE_RDMD	24</div><div class='del'>-#define TDH_SYS_KEY_CONFIG	31</div><div class='del'>-#define TDH_SYS_INIT		33</div><div class='del'>-#define TDH_SYS_RD		34</div><div class='del'>-#define TDH_SYS_LP_INIT		35</div><div class='del'>-#define TDH_SYS_TDMR_INIT	36</div><div class='del'>-#define TDH_SYS_CONFIG		45</div><div class='add'>+#define TDH_VP_ENTER			0</div><div class='add'>+#define TDH_MNG_ADDCX			1</div><div class='add'>+#define TDH_MEM_PAGE_ADD		2</div><div class='add'>+#define TDH_MEM_SEPT_ADD		3</div><div class='add'>+#define TDH_VP_ADDCX			4</div><div class='add'>+#define TDH_MEM_PAGE_AUG		6</div><div class='add'>+#define TDH_MEM_RANGE_BLOCK		7</div><div class='add'>+#define TDH_MNG_KEY_CONFIG		8</div><div class='add'>+#define TDH_MNG_CREATE			9</div><div class='add'>+#define TDH_MNG_RD			11</div><div class='add'>+#define TDH_MR_EXTEND			16</div><div class='add'>+#define TDH_MR_FINALIZE			17</div><div class='add'>+#define TDH_VP_FLUSH			18</div><div class='add'>+#define TDH_MNG_VPFLUSHDONE		19</div><div class='add'>+#define TDH_VP_CREATE			10</div><div class='add'>+#define TDH_MNG_KEY_FREEID		20</div><div class='add'>+#define TDH_MNG_INIT			21</div><div class='add'>+#define TDH_VP_INIT			22</div><div class='add'>+#define TDH_PHYMEM_PAGE_RDMD		24</div><div class='add'>+#define TDH_VP_RD			26</div><div class='add'>+#define TDH_PHYMEM_PAGE_RECLAIM		28</div><div class='add'>+#define TDH_MEM_PAGE_REMOVE		29</div><div class='add'>+#define TDH_SYS_KEY_CONFIG		31</div><div class='add'>+#define TDH_SYS_INIT			33</div><div class='add'>+#define TDH_SYS_RD			34</div><div class='add'>+#define TDH_SYS_LP_INIT			35</div><div class='add'>+#define TDH_SYS_TDMR_INIT		36</div><div class='add'>+#define TDH_MEM_TRACK			38</div><div class='add'>+#define TDH_PHYMEM_CACHE_WB		40</div><div class='add'>+#define TDH_PHYMEM_PAGE_WBINVD		41</div><div class='add'>+#define TDH_VP_WR			43</div><div class='add'>+#define TDH_SYS_CONFIG			45</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SEAMCALL leaf:</div><div class='add'>+ *</div><div class='add'>+ * Bit 15:0	Leaf number</div><div class='add'>+ * Bit 23:16	Version number</div><div class='add'>+ */</div><div class='add'>+#define TDX_VERSION_SHIFT		16</div><div class='ctx'> </div><div class='ctx'> /* TDX page types */</div><div class='ctx'> #define	PT_NDA		0x0</div><div class='head'>diff --git a/arch/x86/virt/vmx/tdx/tdx_global_metadata.c b/arch/x86/virt/vmx/tdx/tdx_global_metadata.c<br/>index 8027a24d1c6e..13ad2663488b 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx_global_metadata.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/virt/vmx/tdx/tdx_global_metadata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/virt/vmx/tdx/tdx_global_metadata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/virt/vmx/tdx/tdx_global_metadata.c</a></div><div class='hunk'>@@ -37,12 +37,62 @@ static int get_tdx_sys_info_tdmr(struct tdx_sys_info_tdmr *sysinfo_tdmr)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int get_tdx_sys_info_td_ctrl(struct tdx_sys_info_td_ctrl *sysinfo_td_ctrl)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x9800000100000000, &amp;val)))</div><div class='add'>+		sysinfo_td_ctrl-&gt;tdr_base_size = val;</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x9800000100000100, &amp;val)))</div><div class='add'>+		sysinfo_td_ctrl-&gt;tdcs_base_size = val;</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x9800000100000200, &amp;val)))</div><div class='add'>+		sysinfo_td_ctrl-&gt;tdvps_base_size = val;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_tdx_sys_info_td_conf(struct tdx_sys_info_td_conf *sysinfo_td_conf)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u64 val;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x1900000300000000, &amp;val)))</div><div class='add'>+		sysinfo_td_conf-&gt;attributes_fixed0 = val;</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x1900000300000001, &amp;val)))</div><div class='add'>+		sysinfo_td_conf-&gt;attributes_fixed1 = val;</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x1900000300000002, &amp;val)))</div><div class='add'>+		sysinfo_td_conf-&gt;xfam_fixed0 = val;</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x1900000300000003, &amp;val)))</div><div class='add'>+		sysinfo_td_conf-&gt;xfam_fixed1 = val;</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x9900000100000004, &amp;val)))</div><div class='add'>+		sysinfo_td_conf-&gt;num_cpuid_config = val;</div><div class='add'>+	if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x9900000100000008, &amp;val)))</div><div class='add'>+		sysinfo_td_conf-&gt;max_vcpus_per_td = val;</div><div class='add'>+	if (sysinfo_td_conf-&gt;num_cpuid_config &gt; ARRAY_SIZE(sysinfo_td_conf-&gt;cpuid_config_leaves))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	for (i = 0; i &lt; sysinfo_td_conf-&gt;num_cpuid_config; i++)</div><div class='add'>+		if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x9900000300000400 + i, &amp;val)))</div><div class='add'>+			sysinfo_td_conf-&gt;cpuid_config_leaves[i] = val;</div><div class='add'>+	if (sysinfo_td_conf-&gt;num_cpuid_config &gt; ARRAY_SIZE(sysinfo_td_conf-&gt;cpuid_config_values))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	for (i = 0; i &lt; sysinfo_td_conf-&gt;num_cpuid_config; i++)</div><div class='add'>+		for (j = 0; j &lt; 2; j++)</div><div class='add'>+			if (!ret &amp;&amp; !(ret = read_sys_metadata_field(0x9900000300000500 + i * 2 + j, &amp;val)))</div><div class='add'>+				sysinfo_td_conf-&gt;cpuid_config_values[i][j] = val;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int get_tdx_sys_info(struct tdx_sys_info *sysinfo)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = ret ?: get_tdx_sys_info_features(&amp;sysinfo-&gt;features);</div><div class='ctx'> 	ret = ret ?: get_tdx_sys_info_tdmr(&amp;sysinfo-&gt;tdmr);</div><div class='add'>+	ret = ret ?: get_tdx_sys_info_td_ctrl(&amp;sysinfo-&gt;td_ctrl);</div><div class='add'>+	ret = ret ?: get_tdx_sys_info_td_conf(&amp;sysinfo-&gt;td_conf);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c<br/>index 43dcd8c7badc..53282dc7d5ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/enlighten.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/enlighten.c</a></div><div class='hunk'>@@ -70,6 +70,9 @@ EXPORT_SYMBOL(xen_start_flags);</div><div class='ctx'>  */</div><div class='ctx'> struct shared_info *HYPERVISOR_shared_info = &amp;xen_dummy_shared_info;</div><div class='ctx'> </div><div class='add'>+/* Number of pages released from the initial allocation. */</div><div class='add'>+unsigned long xen_released_pages;</div><div class='add'>+</div><div class='ctx'> static __ref void xen_get_vendor(void)</div><div class='ctx'> {</div><div class='ctx'> 	init_cpu_devs();</div><div class='hunk'>@@ -100,10 +103,6 @@ noinstr void *__xen_hypercall_setfunc(void)</div><div class='ctx'> 	void (*func)(void);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Xen is supported only on CPUs with CPUID, so testing for</div><div class='del'>-	 * X86_FEATURE_CPUID is a test for early_cpu_init() having been</div><div class='del'>-	 * run.</div><div class='del'>-	 *</div><div class='ctx'> 	 * Note that __xen_hypercall_setfunc() is noinstr only due to a nasty</div><div class='ctx'> 	 * dependency chain: it is being called via the xen_hypercall static</div><div class='ctx'> 	 * call when running as a PVH or HVM guest. Hypercalls need to be</div><div class='hunk'>@@ -115,8 +114,7 @@ noinstr void *__xen_hypercall_setfunc(void)</div><div class='ctx'> 	 */</div><div class='ctx'> 	instrumentation_begin();</div><div class='ctx'> </div><div class='del'>-	if (!boot_cpu_has(X86_FEATURE_CPUID))</div><div class='del'>-		xen_get_vendor();</div><div class='add'>+	xen_get_vendor();</div><div class='ctx'> </div><div class='ctx'> 	if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||</div><div class='ctx'> 	     boot_cpu_data.x86_vendor == X86_VENDOR_HYGON))</div><div class='hunk'>@@ -466,6 +464,13 @@ int __init arch_xen_unpopulated_init(struct resource **res)</div><div class='ctx'> 			xen_free_unpopulated_pages(1, &amp;pg);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * Account for the region being in the physmap but unpopulated.</div><div class='add'>+		 * The value in xen_released_pages is used by the balloon</div><div class='add'>+		 * driver to know how much of the physmap is unpopulated and</div><div class='add'>+		 * set an accurate initial memory target.</div><div class='add'>+		 */</div><div class='add'>+		xen_released_pages += xen_extra_mem[i].n_pfns;</div><div class='ctx'> 		/* Zero so region is not also added to the balloon driver. */</div><div class='ctx'> 		xen_extra_mem[i].n_pfns = 0;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c<br/>index 846b5737d320..26bbaf4b7330 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten_pv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/enlighten_pv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten_pv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/enlighten_pv.c</a></div><div class='hunk'>@@ -49,7 +49,7 @@</div><div class='ctx'> #include &lt;xen/hvc-console.h&gt;</div><div class='ctx'> #include &lt;xen/acpi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/paravirt.h&gt;</div><div class='ctx'> #include &lt;asm/apic.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='hunk'>@@ -61,6 +61,7 @@</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/proto.h&gt;</div><div class='ctx'> #include &lt;asm/msr-index.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/traps.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/desc.h&gt;</div><div class='hunk'>@@ -1086,15 +1087,15 @@ static void xen_write_cr4(unsigned long cr4)</div><div class='ctx'> 	native_write_cr4(cr4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 xen_do_read_msr(unsigned int msr, int *err)</div><div class='add'>+static u64 xen_do_read_msr(u32 msr, int *err)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */</div><div class='ctx'> </div><div class='del'>-	if (pmu_msr_read(msr, &amp;val, err))</div><div class='add'>+	if (pmu_msr_chk_emulated(msr, &amp;val, true))</div><div class='ctx'> 		return val;</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		val = native_read_msr_safe(msr, err);</div><div class='add'>+		*err = native_read_msr_safe(msr, &amp;val);</div><div class='ctx'> 	else</div><div class='ctx'> 		val = native_read_msr(msr);</div><div class='ctx'> </div><div class='hunk'>@@ -1110,17 +1111,9 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void set_seg(unsigned int which, unsigned int low, unsigned int high,</div><div class='del'>-		    int *err)</div><div class='add'>+static void set_seg(u32 which, u64 base)</div><div class='ctx'> {</div><div class='del'>-	u64 base = ((u64)high &lt;&lt; 32) | low;</div><div class='del'>-</div><div class='del'>-	if (HYPERVISOR_set_segment_base(which, base) == 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		*err = -EIO;</div><div class='del'>-	else</div><div class='add'>+	if (HYPERVISOR_set_segment_base(which, base))</div><div class='ctx'> 		WARN(1, "Xen set_segment_base(%u, %llx) failed\n", which, base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1129,20 +1122,19 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,</div><div class='ctx'>  * With err == NULL write_msr() semantics are selected.</div><div class='ctx'>  * Supplying an err pointer requires err to be pre-initialized with 0.</div><div class='ctx'>  */</div><div class='del'>-static void xen_do_write_msr(unsigned int msr, unsigned int low,</div><div class='del'>-			     unsigned int high, int *err)</div><div class='add'>+static void xen_do_write_msr(u32 msr, u64 val, int *err)</div><div class='ctx'> {</div><div class='ctx'> 	switch (msr) {</div><div class='ctx'> 	case MSR_FS_BASE:</div><div class='del'>-		set_seg(SEGBASE_FS, low, high, err);</div><div class='add'>+		set_seg(SEGBASE_FS, val);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MSR_KERNEL_GS_BASE:</div><div class='del'>-		set_seg(SEGBASE_GS_USER, low, high, err);</div><div class='add'>+		set_seg(SEGBASE_GS_USER, val);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MSR_GS_BASE:</div><div class='del'>-		set_seg(SEGBASE_GS_KERNEL, low, high, err);</div><div class='add'>+		set_seg(SEGBASE_GS_KERNEL, val);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MSR_STAR:</div><div class='hunk'>@@ -1158,42 +1150,45 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		if (!pmu_msr_write(msr, low, high, err)) {</div><div class='del'>-			if (err)</div><div class='del'>-				*err = native_write_msr_safe(msr, low, high);</div><div class='del'>-			else</div><div class='del'>-				native_write_msr(msr, low, high);</div><div class='del'>-		}</div><div class='add'>+		if (pmu_msr_chk_emulated(msr, &amp;val, false))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			*err = native_write_msr_safe(msr, val);</div><div class='add'>+		else</div><div class='add'>+			native_write_msr(msr, val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 xen_read_msr_safe(unsigned int msr, int *err)</div><div class='add'>+static int xen_read_msr_safe(u32 msr, u64 *val)</div><div class='ctx'> {</div><div class='del'>-	return xen_do_read_msr(msr, err);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	*val = xen_do_read_msr(msr, &amp;err);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xen_write_msr_safe(unsigned int msr, unsigned int low,</div><div class='del'>-			      unsigned int high)</div><div class='add'>+static int xen_write_msr_safe(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	xen_do_write_msr(msr, low, high, &amp;err);</div><div class='add'>+	xen_do_write_msr(msr, val, &amp;err);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 xen_read_msr(unsigned int msr)</div><div class='add'>+static u64 xen_read_msr(u32 msr)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	return xen_do_read_msr(msr, xen_msr_safe ? &amp;err : NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)</div><div class='add'>+static void xen_write_msr(u32 msr, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	xen_do_write_msr(msr, low, high, xen_msr_safe ? &amp;err : NULL);</div><div class='add'>+	xen_do_write_msr(msr, val, xen_msr_safe ? &amp;err : NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* This is called once we have the cpu_possible_mask */</div><div class='head'>diff --git a/arch/x86/xen/enlighten_pvh.c b/arch/x86/xen/enlighten_pvh.c<br/>index 0e3d930bcb89..9d25d9373945 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten_pvh.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/enlighten_pvh.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/enlighten_pvh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/enlighten_pvh.c</a></div><div class='hunk'>@@ -1,5 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/cpufreq.h&gt;</div><div class='add'>+#include &lt;linux/cpuidle.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -123,8 +125,23 @@ static void __init pvh_arch_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	pvh_reserve_extra_memory();</div><div class='ctx'> </div><div class='del'>-	if (xen_initial_domain())</div><div class='add'>+	if (xen_initial_domain()) {</div><div class='ctx'> 		xen_add_preferred_consoles();</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Disable usage of CPU idle and frequency drivers: when</div><div class='add'>+		 * running as hardware domain the exposed native ACPI tables</div><div class='add'>+		 * causes idle and/or frequency drivers to attach and</div><div class='add'>+		 * malfunction.  It's Xen the entity that controls the idle and</div><div class='add'>+		 * frequency states.</div><div class='add'>+		 *</div><div class='add'>+		 * For unprivileged domains the exposed ACPI tables are</div><div class='add'>+		 * fabricated and don't contain such data.</div><div class='add'>+		 */</div><div class='add'>+		disable_cpuidle();</div><div class='add'>+		disable_cpufreq();</div><div class='add'>+		WARN_ON(xen_set_default_idle());</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void __init xen_pvh_init(struct boot_params *boot_params)</div><div class='head'>diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c<br/>index 38971c6dcd4b..2a4a8deaf612 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/mmu_pv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/mmu_pv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/mmu_pv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/mmu_pv.c</a></div><div class='hunk'>@@ -578,7 +578,6 @@ static void xen_set_p4d(p4d_t *ptr, p4d_t val)</div><div class='ctx'> 	xen_mc_issue(XEN_LAZY_MMU);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if CONFIG_PGTABLE_LEVELS &gt;= 5</div><div class='ctx'> __visible p4dval_t xen_p4d_val(p4d_t p4d)</div><div class='ctx'> {</div><div class='ctx'> 	return pte_mfn_to_pfn(p4d.p4d);</div><div class='hunk'>@@ -592,7 +591,6 @@ __visible p4d_t xen_make_p4d(p4dval_t p4d)</div><div class='ctx'> 	return native_make_p4d(p4d);</div><div class='ctx'> }</div><div class='ctx'> PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);</div><div class='del'>-#endif  /* CONFIG_PGTABLE_LEVELS &gt;= 5 */</div><div class='ctx'> </div><div class='ctx'> static void xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,</div><div class='ctx'> 			 void (*func)(struct mm_struct *mm, struct page *,</div><div class='hunk'>@@ -2222,10 +2220,8 @@ static const typeof(pv_ops) xen_mmu_ops __initconst = {</div><div class='ctx'> 		.alloc_pud = xen_alloc_pmd_init,</div><div class='ctx'> 		.release_pud = xen_release_pmd_init,</div><div class='ctx'> </div><div class='del'>-#if CONFIG_PGTABLE_LEVELS &gt;= 5</div><div class='ctx'> 		.p4d_val = PV_CALLEE_SAVE(xen_p4d_val),</div><div class='ctx'> 		.make_p4d = PV_CALLEE_SAVE(xen_make_p4d),</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 		.enter_mmap = xen_enter_mmap,</div><div class='ctx'> 		.exit_mmap = xen_exit_mmap,</div><div class='head'>diff --git a/arch/x86/xen/multicalls.c b/arch/x86/xen/multicalls.c<br/>index 10c660fae8b3..7237d56a9d3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/multicalls.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/multicalls.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/multicalls.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/multicalls.c</a></div><div class='hunk'>@@ -54,14 +54,20 @@ struct mc_debug_data {</div><div class='ctx'> </div><div class='ctx'> static DEFINE_PER_CPU(struct mc_buffer, mc_buffer);</div><div class='ctx'> static struct mc_debug_data mc_debug_data_early __initdata;</div><div class='del'>-static DEFINE_PER_CPU(struct mc_debug_data *, mc_debug_data) =</div><div class='del'>-	&amp;mc_debug_data_early;</div><div class='ctx'> static struct mc_debug_data __percpu *mc_debug_data_ptr;</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, xen_mc_irq_flags);</div><div class='ctx'> </div><div class='ctx'> static struct static_key mc_debug __ro_after_init;</div><div class='ctx'> static bool mc_debug_enabled __initdata;</div><div class='ctx'> </div><div class='add'>+static struct mc_debug_data * __ref get_mc_debug(void)</div><div class='add'>+{</div><div class='add'>+	if (!mc_debug_data_ptr)</div><div class='add'>+		return &amp;mc_debug_data_early;</div><div class='add'>+</div><div class='add'>+	return this_cpu_ptr(mc_debug_data_ptr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init xen_parse_mc_debug(char *arg)</div><div class='ctx'> {</div><div class='ctx'> 	mc_debug_enabled = true;</div><div class='hunk'>@@ -71,20 +77,16 @@ static int __init xen_parse_mc_debug(char *arg)</div><div class='ctx'> }</div><div class='ctx'> early_param("xen_mc_debug", xen_parse_mc_debug);</div><div class='ctx'> </div><div class='del'>-void mc_percpu_init(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	per_cpu(mc_debug_data, cpu) = per_cpu_ptr(mc_debug_data_ptr, cpu);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int __init mc_debug_enable(void)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	struct mc_debug_data __percpu *mcdb;</div><div class='ctx'> </div><div class='ctx'> 	if (!mc_debug_enabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	mc_debug_data_ptr = alloc_percpu(struct mc_debug_data);</div><div class='del'>-	if (!mc_debug_data_ptr) {</div><div class='add'>+	mcdb = alloc_percpu(struct mc_debug_data);</div><div class='add'>+	if (!mcdb) {</div><div class='ctx'> 		pr_err("xen_mc_debug inactive\n");</div><div class='ctx'> 		static_key_slow_dec(&amp;mc_debug);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -93,7 +95,7 @@ static int __init mc_debug_enable(void)</div><div class='ctx'> 	/* Be careful when switching to percpu debug data. */</div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	xen_mc_flush();</div><div class='del'>-	mc_percpu_init(0);</div><div class='add'>+	mc_debug_data_ptr = mcdb;</div><div class='ctx'> 	local_irq_restore(flags);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("xen_mc_debug active\n");</div><div class='hunk'>@@ -155,7 +157,7 @@ void xen_mc_flush(void)</div><div class='ctx'> 	trace_xen_mc_flush(b-&gt;mcidx, b-&gt;argidx, b-&gt;cbidx);</div><div class='ctx'> </div><div class='ctx'> 	if (static_key_false(&amp;mc_debug)) {</div><div class='del'>-		mcdb = __this_cpu_read(mc_debug_data);</div><div class='add'>+		mcdb = get_mc_debug();</div><div class='ctx'> 		memcpy(mcdb-&gt;entries, b-&gt;entries,</div><div class='ctx'> 		       b-&gt;mcidx * sizeof(struct multicall_entry));</div><div class='ctx'> 	}</div><div class='hunk'>@@ -235,7 +237,7 @@ struct multicall_space __xen_mc_entry(size_t args)</div><div class='ctx'> </div><div class='ctx'> 	ret.mc = &amp;b-&gt;entries[b-&gt;mcidx];</div><div class='ctx'> 	if (static_key_false(&amp;mc_debug)) {</div><div class='del'>-		struct mc_debug_data *mcdb = __this_cpu_read(mc_debug_data);</div><div class='add'>+		struct mc_debug_data *mcdb = get_mc_debug();</div><div class='ctx'> </div><div class='ctx'> 		mcdb-&gt;caller[b-&gt;mcidx] = __builtin_return_address(0);</div><div class='ctx'> 		mcdb-&gt;argsz[b-&gt;mcidx] = args;</div><div class='head'>diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c<br/>index f06987b0efc3..8f89ce0b67e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/pmu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/pmu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/pmu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/pmu.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;asm/xen/hypercall.h&gt;</div><div class='ctx'> #include &lt;xen/xen.h&gt;</div><div class='ctx'> #include &lt;xen/page.h&gt;</div><div class='hunk'>@@ -128,7 +129,7 @@ static inline uint32_t get_fam15h_addr(u32 addr)</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool is_amd_pmu_msr(unsigned int msr)</div><div class='add'>+static bool is_amd_pmu_msr(u32 msr)</div><div class='ctx'> {</div><div class='ctx'> 	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &amp;&amp;</div><div class='ctx'> 	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)</div><div class='hunk'>@@ -194,8 +195,7 @@ static bool is_intel_pmu_msr(u32 msr_index, int *type, int *index)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,</div><div class='del'>-				  int index, bool is_read)</div><div class='add'>+static bool xen_intel_pmu_emulate(u32 msr, u64 *val, int type, int index, bool is_read)</div><div class='ctx'> {</div><div class='ctx'> 	uint64_t *reg = NULL;</div><div class='ctx'> 	struct xen_pmu_intel_ctxt *ctxt;</div><div class='hunk'>@@ -257,7 +257,7 @@ static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)</div><div class='add'>+static bool xen_amd_pmu_emulate(u32 msr, u64 *val, bool is_read)</div><div class='ctx'> {</div><div class='ctx'> 	uint64_t *reg = NULL;</div><div class='ctx'> 	int i, off = 0;</div><div class='hunk'>@@ -298,55 +298,20 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,</div><div class='del'>-				 bool *emul)</div><div class='add'>+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read)</div><div class='ctx'> {</div><div class='ctx'> 	int type, index = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (is_amd_pmu_msr(msr))</div><div class='del'>-		*emul = xen_amd_pmu_emulate(msr, val, is_read);</div><div class='del'>-	else if (is_intel_pmu_msr(msr, &amp;type, &amp;index))</div><div class='del'>-		*emul = xen_intel_pmu_emulate(msr, val, type, index, is_read);</div><div class='del'>-	else</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)</div><div class='del'>-{</div><div class='del'>-	bool emulated;</div><div class='add'>+		return xen_amd_pmu_emulate(msr, val, is_read);</div><div class='ctx'> </div><div class='del'>-	if (!pmu_msr_chk_emulated(msr, val, true, &amp;emulated))</div><div class='del'>-		return false;</div><div class='add'>+	if (is_intel_pmu_msr(msr, &amp;type, &amp;index))</div><div class='add'>+		return xen_intel_pmu_emulate(msr, val, type, index, is_read);</div><div class='ctx'> </div><div class='del'>-	if (!emulated) {</div><div class='del'>-		*val = err ? native_read_msr_safe(msr, err)</div><div class='del'>-			   : native_read_msr(msr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)</div><div class='del'>-{</div><div class='del'>-	uint64_t val = ((uint64_t)high &lt;&lt; 32) | low;</div><div class='del'>-	bool emulated;</div><div class='del'>-</div><div class='del'>-	if (!pmu_msr_chk_emulated(msr, &amp;val, false, &amp;emulated))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (!emulated) {</div><div class='del'>-		if (err)</div><div class='del'>-			*err = native_write_msr_safe(msr, low, high);</div><div class='del'>-		else</div><div class='del'>-			native_write_msr(msr, low, high);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long long xen_amd_read_pmc(int counter)</div><div class='add'>+static u64 xen_amd_read_pmc(int counter)</div><div class='ctx'> {</div><div class='ctx'> 	struct xen_pmu_amd_ctxt *ctxt;</div><div class='ctx'> 	uint64_t *counter_regs;</div><div class='hunk'>@@ -354,11 +319,12 @@ static unsigned long long xen_amd_read_pmc(int counter)</div><div class='ctx'> 	uint8_t xenpmu_flags = get_xenpmu_flags();</div><div class='ctx'> </div><div class='ctx'> 	if (!xenpmu_data || !(xenpmu_flags &amp; XENPMU_IRQ_PROCESSING)) {</div><div class='del'>-		uint32_t msr;</div><div class='del'>-		int err;</div><div class='add'>+		u32 msr;</div><div class='add'>+		u64 val;</div><div class='ctx'> </div><div class='ctx'> 		msr = amd_counters_base + (counter * amd_msr_step);</div><div class='del'>-		return native_read_msr_safe(msr, &amp;err);</div><div class='add'>+		native_read_msr_safe(msr, &amp;val);</div><div class='add'>+		return val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ctxt = &amp;xenpmu_data-&gt;pmu.c.amd;</div><div class='hunk'>@@ -366,7 +332,7 @@ static unsigned long long xen_amd_read_pmc(int counter)</div><div class='ctx'> 	return counter_regs[counter];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long long xen_intel_read_pmc(int counter)</div><div class='add'>+static u64 xen_intel_read_pmc(int counter)</div><div class='ctx'> {</div><div class='ctx'> 	struct xen_pmu_intel_ctxt *ctxt;</div><div class='ctx'> 	uint64_t *fixed_counters;</div><div class='hunk'>@@ -375,15 +341,16 @@ static unsigned long long xen_intel_read_pmc(int counter)</div><div class='ctx'> 	uint8_t xenpmu_flags = get_xenpmu_flags();</div><div class='ctx'> </div><div class='ctx'> 	if (!xenpmu_data || !(xenpmu_flags &amp; XENPMU_IRQ_PROCESSING)) {</div><div class='del'>-		uint32_t msr;</div><div class='del'>-		int err;</div><div class='add'>+		u32 msr;</div><div class='add'>+		u64 val;</div><div class='ctx'> </div><div class='ctx'> 		if (counter &amp; (1 &lt;&lt; INTEL_PMC_TYPE_SHIFT))</div><div class='ctx'> 			msr = MSR_CORE_PERF_FIXED_CTR0 + (counter &amp; 0xffff);</div><div class='ctx'> 		else</div><div class='ctx'> 			msr = MSR_IA32_PERFCTR0 + counter;</div><div class='ctx'> </div><div class='del'>-		return native_read_msr_safe(msr, &amp;err);</div><div class='add'>+		native_read_msr_safe(msr, &amp;val);</div><div class='add'>+		return val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ctxt = &amp;xenpmu_data-&gt;pmu.c.intel;</div><div class='hunk'>@@ -396,7 +363,7 @@ static unsigned long long xen_intel_read_pmc(int counter)</div><div class='ctx'> 	return arch_cntr_pair[counter].counter;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned long long xen_read_pmc(int counter)</div><div class='add'>+u64 xen_read_pmc(int counter)</div><div class='ctx'> {</div><div class='ctx'> 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)</div><div class='ctx'> 		return xen_amd_read_pmc(counter);</div><div class='head'>diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c<br/>index c3db71d96c43..3823e52aef52 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/setup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/setup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/setup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/setup.c</a></div><div class='hunk'>@@ -37,9 +37,6 @@</div><div class='ctx'> </div><div class='ctx'> #define GB(x) ((uint64_t)(x) * 1024 * 1024 * 1024)</div><div class='ctx'> </div><div class='del'>-/* Number of pages released from the initial allocation. */</div><div class='del'>-unsigned long xen_released_pages;</div><div class='del'>-</div><div class='ctx'> /* Memory map would allow PCI passthrough. */</div><div class='ctx'> bool xen_pv_pci_possible;</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/xen/smp_pv.c b/arch/x86/xen/smp_pv.c<br/>index 688ff59318ae..9bb8ff8bff30 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/smp_pv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/smp_pv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/smp_pv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/smp_pv.c</a></div><div class='hunk'>@@ -305,7 +305,6 @@ static int xen_pv_kick_ap(unsigned int cpu, struct task_struct *idle)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='ctx'> 	xen_pmu_init(cpu);</div><div class='del'>-	mc_percpu_init(cpu);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Why is this a BUG? If the hypercall fails then everything can be</div><div class='head'>diff --git a/arch/x86/xen/suspend.c b/arch/x86/xen/suspend.c<br/>index 77a6ea1c60e4..ba2f17e64321 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/suspend.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/suspend.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/suspend.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/suspend.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;asm/xen/hypercall.h&gt;</div><div class='ctx'> #include &lt;asm/xen/page.h&gt;</div><div class='ctx'> #include &lt;asm/fixmap.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "xen-ops.h"</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +40,7 @@ void xen_arch_post_suspend(int cancelled)</div><div class='ctx'> static void xen_vcpu_notify_restore(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	if (xen_pv_domain() &amp;&amp; boot_cpu_has(X86_FEATURE_SPEC_CTRL))</div><div class='del'>-		wrmsrl(MSR_IA32_SPEC_CTRL, this_cpu_read(spec_ctrl));</div><div class='add'>+		wrmsrq(MSR_IA32_SPEC_CTRL, this_cpu_read(spec_ctrl));</div><div class='ctx'> </div><div class='ctx'> 	/* Boot processor notified via generic timekeeping_resume() */</div><div class='ctx'> 	if (smp_processor_id() == 0)</div><div class='hunk'>@@ -55,9 +56,9 @@ static void xen_vcpu_notify_suspend(void *data)</div><div class='ctx'> 	tick_suspend_local();</div><div class='ctx'> </div><div class='ctx'> 	if (xen_pv_domain() &amp;&amp; boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {</div><div class='del'>-		rdmsrl(MSR_IA32_SPEC_CTRL, tmp);</div><div class='add'>+		rdmsrq(MSR_IA32_SPEC_CTRL, tmp);</div><div class='ctx'> 		this_cpu_write(spec_ctrl, tmp);</div><div class='del'>-		wrmsrl(MSR_IA32_SPEC_CTRL, 0);</div><div class='add'>+		wrmsrq(MSR_IA32_SPEC_CTRL, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S<br/>index 109af12f7647..461bb1526502 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/xen-asm.S?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/xen-asm.S</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/xen-asm.S?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/xen-asm.S</a></div><div class='hunk'>@@ -226,9 +226,7 @@ SYM_CODE_END(xen_early_idt_handler_array)</div><div class='ctx'> 	push %rax</div><div class='ctx'> 	mov  $__HYPERVISOR_iret, %eax</div><div class='ctx'> 	syscall		/* Do the IRET. */</div><div class='del'>-#ifdef CONFIG_MITIGATION_SLS</div><div class='del'>-	int3</div><div class='del'>-#endif</div><div class='add'>+	ud2		/* The SYSCALL should never return. */</div><div class='ctx'> .endm</div><div class='ctx'> </div><div class='ctx'> SYM_CODE_START(xen_iret)</div><div class='head'>diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h<br/>index 63c13a2ccf55..090349baec09 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/x86/xen/xen-ops.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/x86/xen/xen-ops.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/x86/xen/xen-ops.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/x86/xen/xen-ops.h</a></div><div class='hunk'>@@ -261,9 +261,6 @@ void xen_mc_callback(void (*fn)(void *), void *data);</div><div class='ctx'>  */</div><div class='ctx'> struct multicall_space xen_mc_extend_args(unsigned long op, size_t arg_size);</div><div class='ctx'> </div><div class='del'>-/* Do percpu data initialization for multicalls. */</div><div class='del'>-void mc_percpu_init(unsigned int cpu);</div><div class='del'>-</div><div class='ctx'> extern bool is_xen_pmu;</div><div class='ctx'> </div><div class='ctx'> irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id);</div><div class='hunk'>@@ -274,10 +271,9 @@ void xen_pmu_finish(int cpu);</div><div class='ctx'> static inline void xen_pmu_init(int cpu) {}</div><div class='ctx'> static inline void xen_pmu_finish(int cpu) {}</div><div class='ctx'> #endif</div><div class='del'>-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);</div><div class='del'>-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);</div><div class='add'>+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read);</div><div class='ctx'> int pmu_apic_update(uint32_t reg);</div><div class='del'>-unsigned long long xen_read_pmc(int counter);</div><div class='add'>+u64 xen_read_pmc(int counter);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SMP</div><div class='ctx'> </div><div class='head'>diff --git a/arch/xtensa/configs/cadence_csp_defconfig b/arch/xtensa/configs/cadence_csp_defconfig<br/>index 91c4c4cae8a7..49f50d1bd724 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/configs/cadence_csp_defconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/xtensa/configs/cadence_csp_defconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/configs/cadence_csp_defconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/xtensa/configs/cadence_csp_defconfig</a></div><div class='hunk'>@@ -1,6 +1,5 @@</div><div class='ctx'> CONFIG_SYSVIPC=y</div><div class='ctx'> CONFIG_POSIX_MQUEUE=y</div><div class='del'>-CONFIG_USELIB=y</div><div class='ctx'> CONFIG_NO_HZ_IDLE=y</div><div class='ctx'> CONFIG_HIGH_RES_TIMERS=y</div><div class='ctx'> CONFIG_IRQ_TIME_ACCOUNTING=y</div><div class='head'>diff --git a/arch/xtensa/kernel/perf_event.c b/arch/xtensa/kernel/perf_event.c<br/>index 183618090d05..223f1d452310 100644<br/>--- a/<a href='/cgit/linux.git/tree/arch/xtensa/kernel/perf_event.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>arch/xtensa/kernel/perf_event.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/arch/xtensa/kernel/perf_event.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>arch/xtensa/kernel/perf_event.c</a></div><div class='hunk'>@@ -388,8 +388,7 @@ irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id)</div><div class='ctx'> 			struct pt_regs *regs = get_irq_regs();</div><div class='ctx'> </div><div class='ctx'> 			perf_sample_data_init(&amp;data, 0, last_period);</div><div class='del'>-			if (perf_event_overflow(event, &amp;data, regs))</div><div class='del'>-				xtensa_pmu_stop(event, 0);</div><div class='add'>+			perf_event_overflow(event, &amp;data, regs);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		rc = IRQ_HANDLED;</div><div class='head'>diff --git a/block/Kconfig b/block/Kconfig<br/>index df8973bc0539..15027963472d 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/Kconfig</a></div><div class='hunk'>@@ -211,14 +211,6 @@ config BLK_INLINE_ENCRYPTION_FALLBACK</div><div class='ctx'> </div><div class='ctx'> source "block/partitions/Kconfig"</div><div class='ctx'> </div><div class='del'>-config BLK_MQ_PCI</div><div class='del'>-	def_bool PCI</div><div class='del'>-</div><div class='del'>-config BLK_MQ_VIRTIO</div><div class='del'>-	bool</div><div class='del'>-	depends on VIRTIO</div><div class='del'>-	default y</div><div class='del'>-</div><div class='ctx'> config BLK_PM</div><div class='ctx'> 	def_bool PM</div><div class='ctx'> </div><div class='head'>diff --git a/block/Makefile b/block/Makefile<br/>index 3a941dc0d27f..c65f4da93702 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/Makefile</a></div><div class='hunk'>@@ -5,13 +5,12 @@</div><div class='ctx'> </div><div class='ctx'> obj-y		:= bdev.o fops.o bio.o elevator.o blk-core.o blk-sysfs.o \</div><div class='ctx'> 			blk-flush.o blk-settings.o blk-ioc.o blk-map.o \</div><div class='del'>-			blk-merge.o blk-timeout.o \</div><div class='del'>-			blk-lib.o blk-mq.o blk-mq-tag.o blk-stat.o \</div><div class='add'>+			blk-merge.o blk-timeout.o blk-lib.o blk-mq.o \</div><div class='add'>+			blk-mq-tag.o blk-mq-dma.o blk-stat.o \</div><div class='ctx'> 			blk-mq-sysfs.o blk-mq-cpumap.o blk-mq-sched.o ioctl.o \</div><div class='ctx'> 			genhd.o ioprio.o badblocks.o partitions/ blk-rq-qos.o \</div><div class='ctx'> 			disk-events.o blk-ia-ranges.o early-lookup.o</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_BOUNCE)		+= bounce.o</div><div class='ctx'> obj-$(CONFIG_BLK_DEV_BSG_COMMON) += bsg.o</div><div class='ctx'> obj-$(CONFIG_BLK_DEV_BSGLIB)	+= bsg-lib.o</div><div class='ctx'> obj-$(CONFIG_BLK_CGROUP)	+= blk-cgroup.o</div><div class='head'>diff --git a/block/bdev.c b/block/bdev.c<br/>index 4844d1e27b6f..b77ddd12dc06 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bdev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/bdev.c</a></div><div class='hunk'>@@ -152,27 +152,65 @@ static void set_init_blocksize(struct block_device *bdev)</div><div class='ctx'> 				    get_order(bsize));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int set_blocksize(struct file *file, int size)</div><div class='add'>+/**</div><div class='add'>+ * bdev_validate_blocksize - check that this block size is acceptable</div><div class='add'>+ * @bdev:	blockdevice to check</div><div class='add'>+ * @block_size:	block size to check</div><div class='add'>+ *</div><div class='add'>+ * For block device users that do not use buffer heads or the block device</div><div class='add'>+ * page cache, make sure that this block size can be used with the device.</div><div class='add'>+ *</div><div class='add'>+ * Return: On success zero is returned, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int bdev_validate_blocksize(struct block_device *bdev, int block_size)</div><div class='ctx'> {</div><div class='del'>-	struct inode *inode = file-&gt;f_mapping-&gt;host;</div><div class='del'>-	struct block_device *bdev = I_BDEV(inode);</div><div class='del'>-</div><div class='del'>-	if (blk_validate_block_size(size))</div><div class='add'>+	if (blk_validate_block_size(block_size))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Size cannot be smaller than the size supported by the device */</div><div class='del'>-	if (size &lt; bdev_logical_block_size(bdev))</div><div class='add'>+	if (block_size &lt; bdev_logical_block_size(bdev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bdev_validate_blocksize);</div><div class='add'>+</div><div class='add'>+int set_blocksize(struct file *file, int size)</div><div class='add'>+{</div><div class='add'>+	struct inode *inode = file-&gt;f_mapping-&gt;host;</div><div class='add'>+	struct block_device *bdev = I_BDEV(inode);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = bdev_validate_blocksize(bdev, size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	if (!file-&gt;private_data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Don't change the size if it is same as current */</div><div class='ctx'> 	if (inode-&gt;i_blkbits != blksize_bits(size)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Flush and truncate the pagecache before we reconfigure the</div><div class='add'>+		 * mapping geometry because folio sizes are variable now.  If a</div><div class='add'>+		 * reader has already allocated a folio whose size is smaller</div><div class='add'>+		 * than the new min_order but invokes readahead after the new</div><div class='add'>+		 * min_order becomes visible, readahead will think there are</div><div class='add'>+		 * "zero" blocks per folio and crash.  Take the inode and</div><div class='add'>+		 * invalidation locks to avoid racing with</div><div class='add'>+		 * read/write/fallocate.</div><div class='add'>+		 */</div><div class='add'>+		inode_lock(inode);</div><div class='add'>+		filemap_invalidate_lock(inode-&gt;i_mapping);</div><div class='add'>+</div><div class='ctx'> 		sync_blockdev(bdev);</div><div class='add'>+		kill_bdev(bdev);</div><div class='add'>+</div><div class='ctx'> 		inode-&gt;i_blkbits = blksize_bits(size);</div><div class='ctx'> 		mapping_set_folio_min_order(inode-&gt;i_mapping, get_order(size));</div><div class='ctx'> 		kill_bdev(bdev);</div><div class='add'>+		filemap_invalidate_unlock(inode-&gt;i_mapping);</div><div class='add'>+		inode_unlock(inode);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -777,13 +815,13 @@ static void blkdev_put_part(struct block_device *part)</div><div class='ctx'> 	blkdev_put_whole(whole);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct block_device *blkdev_get_no_open(dev_t dev)</div><div class='add'>+struct block_device *blkdev_get_no_open(dev_t dev, bool autoload)</div><div class='ctx'> {</div><div class='ctx'> 	struct block_device *bdev;</div><div class='ctx'> 	struct inode *inode;</div><div class='ctx'> </div><div class='ctx'> 	inode = ilookup(blockdev_superblock, dev);</div><div class='del'>-	if (!inode &amp;&amp; IS_ENABLED(CONFIG_BLOCK_LEGACY_AUTOLOAD)) {</div><div class='add'>+	if (!inode &amp;&amp; autoload &amp;&amp; IS_ENABLED(CONFIG_BLOCK_LEGACY_AUTOLOAD)) {</div><div class='ctx'> 		blk_request_module(dev);</div><div class='ctx'> 		inode = ilookup(blockdev_superblock, dev);</div><div class='ctx'> 		if (inode)</div><div class='hunk'>@@ -1005,7 +1043,7 @@ struct file *bdev_file_open_by_dev(dev_t dev, blk_mode_t mode, void *holder,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='del'>-	bdev = blkdev_get_no_open(dev);</div><div class='add'>+	bdev = blkdev_get_no_open(dev, true);</div><div class='ctx'> 	if (!bdev)</div><div class='ctx'> 		return ERR_PTR(-ENXIO);</div><div class='ctx'> </div><div class='hunk'>@@ -1272,21 +1310,17 @@ void sync_bdevs(bool wait)</div><div class='ctx'> /*</div><div class='ctx'>  * Handle STATX_{DIOALIGN, WRITE_ATOMIC} for block devices.</div><div class='ctx'>  */</div><div class='del'>-void bdev_statx(struct path *path, struct kstat *stat,</div><div class='del'>-		u32 request_mask)</div><div class='add'>+void bdev_statx(const struct path *path, struct kstat *stat, u32 request_mask)</div><div class='ctx'> {</div><div class='del'>-	struct inode *backing_inode;</div><div class='ctx'> 	struct block_device *bdev;</div><div class='ctx'> </div><div class='del'>-	backing_inode = d_backing_inode(path-&gt;dentry);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * Note that backing_inode is the inode of a block device node file,</div><div class='del'>-	 * not the block device's internal inode.  Therefore it is *not* valid</div><div class='del'>-	 * to use I_BDEV() here; the block device has to be looked up by i_rdev</div><div class='add'>+	 * Note that d_backing_inode() returns the block device node inode, not</div><div class='add'>+	 * the block device's internal inode.  Therefore it is *not* valid to</div><div class='add'>+	 * use I_BDEV() here; the block device has to be looked up by i_rdev</div><div class='ctx'> 	 * instead.</div><div class='ctx'> 	 */</div><div class='del'>-	bdev = blkdev_get_no_open(backing_inode-&gt;i_rdev);</div><div class='add'>+	bdev = blkdev_get_no_open(d_backing_inode(path-&gt;dentry)-&gt;i_rdev, false);</div><div class='ctx'> 	if (!bdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1301,7 +1335,8 @@ void bdev_statx(struct path *path, struct kstat *stat,</div><div class='ctx'> </div><div class='ctx'> 		generic_fill_statx_atomic_writes(stat,</div><div class='ctx'> 			queue_atomic_write_unit_min_bytes(bd_queue),</div><div class='del'>-			queue_atomic_write_unit_max_bytes(bd_queue));</div><div class='add'>+			queue_atomic_write_unit_max_bytes(bd_queue),</div><div class='add'>+			0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	stat-&gt;blksize = bdev_io_min(bdev);</div><div class='head'>diff --git a/block/bfq-iosched.c b/block/bfq-iosched.c<br/>index abd80dc13562..0cb1e9873aab 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bfq-iosched.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bfq-iosched.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bfq-iosched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/bfq-iosched.c</a></div><div class='hunk'>@@ -7210,8 +7210,8 @@ static void bfq_exit_queue(struct elevator_queue *e)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	blk_stat_disable_accounting(bfqd-&gt;queue);</div><div class='del'>-	clear_bit(ELEVATOR_FLAG_DISABLE_WBT, &amp;e-&gt;flags);</div><div class='del'>-	wbt_enable_default(bfqd-&gt;queue-&gt;disk);</div><div class='add'>+	blk_queue_flag_clear(QUEUE_FLAG_DISABLE_WBT_DEF, bfqd-&gt;queue);</div><div class='add'>+	set_bit(ELEVATOR_FLAG_ENABLE_WBT_ON_EXIT, &amp;e-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	kfree(bfqd);</div><div class='ctx'> }</div><div class='hunk'>@@ -7397,7 +7397,7 @@ static int bfq_init_queue(struct request_queue *q, struct elevator_type *e)</div><div class='ctx'> 	/* We dispatch from request queue wide instead of hw queue */</div><div class='ctx'> 	blk_queue_flag_set(QUEUE_FLAG_SQ_SCHED, q);</div><div class='ctx'> </div><div class='del'>-	set_bit(ELEVATOR_FLAG_DISABLE_WBT, &amp;eq-&gt;flags);</div><div class='add'>+	blk_queue_flag_set(QUEUE_FLAG_DISABLE_WBT_DEF, q);</div><div class='ctx'> 	wbt_disable_default(q-&gt;disk);</div><div class='ctx'> 	blk_stat_enable_accounting(q);</div><div class='ctx'> </div><div class='head'>diff --git a/block/bio-integrity-auto.c b/block/bio-integrity-auto.c<br/>index e524c609be50..9c6657664792 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bio-integrity-auto.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bio-integrity-auto.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bio-integrity-auto.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/bio-integrity-auto.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'>  * not aware of PI.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/blk-integrity.h&gt;</div><div class='add'>+#include &lt;linux/t10-pi.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include "blk.h"</div><div class='ctx'> </div><div class='hunk'>@@ -43,6 +44,29 @@ static void bio_integrity_verify_fn(struct work_struct *work)</div><div class='ctx'> 	bio_endio(bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define BIP_CHECK_FLAGS (BIP_CHECK_GUARD | BIP_CHECK_REFTAG | BIP_CHECK_APPTAG)</div><div class='add'>+static bool bip_should_check(struct bio_integrity_payload *bip)</div><div class='add'>+{</div><div class='add'>+	return bip-&gt;bip_flags &amp; BIP_CHECK_FLAGS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bi_offload_capable(struct blk_integrity *bi)</div><div class='add'>+{</div><div class='add'>+	switch (bi-&gt;csum_type) {</div><div class='add'>+	case BLK_INTEGRITY_CSUM_CRC64:</div><div class='add'>+		return bi-&gt;tuple_size == sizeof(struct crc64_pi_tuple);</div><div class='add'>+	case BLK_INTEGRITY_CSUM_CRC:</div><div class='add'>+	case BLK_INTEGRITY_CSUM_IP:</div><div class='add'>+		return bi-&gt;tuple_size == sizeof(struct t10_pi_tuple);</div><div class='add'>+	default:</div><div class='add'>+		pr_warn_once("%s: unknown integrity checksum type:%d\n",</div><div class='add'>+			__func__, bi-&gt;csum_type);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case BLK_INTEGRITY_CSUM_NONE:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * __bio_integrity_endio - Integrity I/O completion function</div><div class='ctx'>  * @bio:	Protected bio</div><div class='hunk'>@@ -54,12 +78,12 @@ static void bio_integrity_verify_fn(struct work_struct *work)</div><div class='ctx'>  */</div><div class='ctx'> bool __bio_integrity_endio(struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	struct blk_integrity *bi = blk_get_integrity(bio-&gt;bi_bdev-&gt;bd_disk);</div><div class='ctx'> 	struct bio_integrity_payload *bip = bio_integrity(bio);</div><div class='ctx'> 	struct bio_integrity_data *bid =</div><div class='ctx'> 		container_of(bip, struct bio_integrity_data, bip);</div><div class='ctx'> </div><div class='del'>-	if (bio_op(bio) == REQ_OP_READ &amp;&amp; !bio-&gt;bi_status &amp;&amp; bi-&gt;csum_type) {</div><div class='add'>+	if (bio_op(bio) == REQ_OP_READ &amp;&amp; !bio-&gt;bi_status &amp;&amp;</div><div class='add'>+	    bip_should_check(bip)) {</div><div class='ctx'> 		INIT_WORK(&amp;bid-&gt;work, bio_integrity_verify_fn);</div><div class='ctx'> 		queue_work(kintegrityd_wq, &amp;bid-&gt;work);</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -84,6 +108,7 @@ bool bio_integrity_prep(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct blk_integrity *bi = blk_get_integrity(bio-&gt;bi_bdev-&gt;bd_disk);</div><div class='ctx'> 	struct bio_integrity_data *bid;</div><div class='add'>+	bool set_flags = true;</div><div class='ctx'> 	gfp_t gfp = GFP_NOIO;</div><div class='ctx'> 	unsigned int len;</div><div class='ctx'> 	void *buf;</div><div class='hunk'>@@ -100,19 +125,24 @@ bool bio_integrity_prep(struct bio *bio)</div><div class='ctx'> </div><div class='ctx'> 	switch (bio_op(bio)) {</div><div class='ctx'> 	case REQ_OP_READ:</div><div class='del'>-		if (bi-&gt;flags &amp; BLK_INTEGRITY_NOVERIFY)</div><div class='del'>-			return true;</div><div class='add'>+		if (bi-&gt;flags &amp; BLK_INTEGRITY_NOVERIFY) {</div><div class='add'>+			if (bi_offload_capable(bi))</div><div class='add'>+				return true;</div><div class='add'>+			set_flags = false;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case REQ_OP_WRITE:</div><div class='del'>-		if (bi-&gt;flags &amp; BLK_INTEGRITY_NOGENERATE)</div><div class='del'>-			return true;</div><div class='del'>-</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Zero the memory allocated to not leak uninitialized kernel</div><div class='ctx'> 		 * memory to disk for non-integrity metadata where nothing else</div><div class='ctx'> 		 * initializes the memory.</div><div class='ctx'> 		 */</div><div class='del'>-		if (bi-&gt;csum_type == BLK_INTEGRITY_CSUM_NONE)</div><div class='add'>+		if (bi-&gt;flags &amp; BLK_INTEGRITY_NOGENERATE) {</div><div class='add'>+			if (bi_offload_capable(bi))</div><div class='add'>+				return true;</div><div class='add'>+			set_flags = false;</div><div class='add'>+			gfp |= __GFP_ZERO;</div><div class='add'>+		} else if (bi-&gt;csum_type == BLK_INTEGRITY_CSUM_NONE)</div><div class='ctx'> 			gfp |= __GFP_ZERO;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -137,19 +167,21 @@ bool bio_integrity_prep(struct bio *bio)</div><div class='ctx'> 	bid-&gt;bip.bip_flags |= BIP_BLOCK_INTEGRITY;</div><div class='ctx'> 	bip_set_seed(&amp;bid-&gt;bip, bio-&gt;bi_iter.bi_sector);</div><div class='ctx'> </div><div class='del'>-	if (bi-&gt;csum_type == BLK_INTEGRITY_CSUM_IP)</div><div class='del'>-		bid-&gt;bip.bip_flags |= BIP_IP_CHECKSUM;</div><div class='del'>-	if (bi-&gt;csum_type)</div><div class='del'>-		bid-&gt;bip.bip_flags |= BIP_CHECK_GUARD;</div><div class='del'>-	if (bi-&gt;flags &amp; BLK_INTEGRITY_REF_TAG)</div><div class='del'>-		bid-&gt;bip.bip_flags |= BIP_CHECK_REFTAG;</div><div class='add'>+	if (set_flags) {</div><div class='add'>+		if (bi-&gt;csum_type == BLK_INTEGRITY_CSUM_IP)</div><div class='add'>+			bid-&gt;bip.bip_flags |= BIP_IP_CHECKSUM;</div><div class='add'>+		if (bi-&gt;csum_type)</div><div class='add'>+			bid-&gt;bip.bip_flags |= BIP_CHECK_GUARD;</div><div class='add'>+		if (bi-&gt;flags &amp; BLK_INTEGRITY_REF_TAG)</div><div class='add'>+			bid-&gt;bip.bip_flags |= BIP_CHECK_REFTAG;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (bio_integrity_add_page(bio, virt_to_page(buf), len,</div><div class='ctx'> 			offset_in_page(buf)) &lt; len)</div><div class='ctx'> 		goto err_end_io;</div><div class='ctx'> </div><div class='ctx'> 	/* Auto-generate integrity metadata if this is a write */</div><div class='del'>-	if (bio_data_dir(bio) == WRITE)</div><div class='add'>+	if (bio_data_dir(bio) == WRITE &amp;&amp; bip_should_check(&amp;bid-&gt;bip))</div><div class='ctx'> 		blk_integrity_generate(bio);</div><div class='ctx'> 	else</div><div class='ctx'> 		bid-&gt;saved_bio_iter = bio-&gt;bi_iter;</div><div class='head'>diff --git a/block/bio-integrity.c b/block/bio-integrity.c<br/>index 608594a154a5..cb94e9be26dc 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bio-integrity.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bio-integrity.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bio-integrity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/bio-integrity.c</a></div><div class='hunk'>@@ -66,16 +66,12 @@ struct bio_integrity_payload *bio_integrity_alloc(struct bio *bio,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bio_integrity_alloc);</div><div class='ctx'> </div><div class='del'>-static void bio_integrity_unpin_bvec(struct bio_vec *bv, int nr_vecs,</div><div class='del'>-				     bool dirty)</div><div class='add'>+static void bio_integrity_unpin_bvec(struct bio_vec *bv, int nr_vecs)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; nr_vecs; i++) {</div><div class='del'>-		if (dirty &amp;&amp; !PageCompound(bv[i].bv_page))</div><div class='del'>-			set_page_dirty_lock(bv[i].bv_page);</div><div class='add'>+	for (i = 0; i &lt; nr_vecs; i++)</div><div class='ctx'> 		unpin_user_page(bv[i].bv_page);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bio_integrity_uncopy_user(struct bio_integrity_payload *bip)</div><div class='hunk'>@@ -91,7 +87,7 @@ static void bio_integrity_uncopy_user(struct bio_integrity_payload *bip)</div><div class='ctx'> 	ret = copy_to_iter(bvec_virt(bounce_bvec), bytes, &amp;orig_iter);</div><div class='ctx'> 	WARN_ON_ONCE(ret != bytes);</div><div class='ctx'> </div><div class='del'>-	bio_integrity_unpin_bvec(orig_bvecs, orig_nr_vecs, true);</div><div class='add'>+	bio_integrity_unpin_bvec(orig_bvecs, orig_nr_vecs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -111,8 +107,7 @@ void bio_integrity_unmap_user(struct bio *bio)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bio_integrity_unpin_bvec(bip-&gt;bip_vec, bip-&gt;bip_max_vcnt,</div><div class='del'>-			bio_data_dir(bio) == READ);</div><div class='add'>+	bio_integrity_unpin_bvec(bip-&gt;bip_vec, bip-&gt;bip_max_vcnt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -132,10 +127,8 @@ int bio_integrity_add_page(struct bio *bio, struct page *page,</div><div class='ctx'> </div><div class='ctx'> 	if (bip-&gt;bip_vcnt &gt; 0) {</div><div class='ctx'> 		struct bio_vec *bv = &amp;bip-&gt;bip_vec[bip-&gt;bip_vcnt - 1];</div><div class='del'>-		bool same_page = false;</div><div class='ctx'> </div><div class='del'>-		if (bvec_try_merge_hw_page(q, bv, page, len, offset,</div><div class='del'>-					   &amp;same_page)) {</div><div class='add'>+		if (bvec_try_merge_hw_page(q, bv, page, len, offset)) {</div><div class='ctx'> 			bip-&gt;bip_iter.bi_size += len;</div><div class='ctx'> 			return len;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -198,7 +191,7 @@ static int bio_integrity_copy_user(struct bio *bio, struct bio_vec *bvec,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (write)</div><div class='del'>-		bio_integrity_unpin_bvec(bvec, nr_vecs, false);</div><div class='add'>+		bio_integrity_unpin_bvec(bvec, nr_vecs);</div><div class='ctx'> 	else</div><div class='ctx'> 		memcpy(&amp;bip-&gt;bip_vec[1], bvec, nr_vecs * sizeof(*bvec));</div><div class='ctx'> </div><div class='hunk'>@@ -319,7 +312,7 @@ int bio_integrity_map_user(struct bio *bio, struct iov_iter *iter)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> release_pages:</div><div class='del'>-	bio_integrity_unpin_bvec(bvec, nr_bvecs, false);</div><div class='add'>+	bio_integrity_unpin_bvec(bvec, nr_bvecs);</div><div class='ctx'> free_bvec:</div><div class='ctx'> 	if (bvec != stack_vec)</div><div class='ctx'> 		kfree(bvec);</div><div class='head'>diff --git a/block/bio.c b/block/bio.c<br/>index 4e6c85a33d74..3c0a558c90f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/bio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/bio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/bio.c</a></div><div class='hunk'>@@ -251,6 +251,7 @@ void bio_init(struct bio *bio, struct block_device *bdev, struct bio_vec *table,</div><div class='ctx'> 	bio-&gt;bi_flags = 0;</div><div class='ctx'> 	bio-&gt;bi_ioprio = 0;</div><div class='ctx'> 	bio-&gt;bi_write_hint = 0;</div><div class='add'>+	bio-&gt;bi_write_stream = 0;</div><div class='ctx'> 	bio-&gt;bi_status = 0;</div><div class='ctx'> 	bio-&gt;bi_iter.bi_sector = 0;</div><div class='ctx'> 	bio-&gt;bi_iter.bi_size = 0;</div><div class='hunk'>@@ -611,7 +612,7 @@ struct bio *bio_kmalloc(unsigned short nr_vecs, gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct bio *bio;</div><div class='ctx'> </div><div class='del'>-	if (nr_vecs &gt; UIO_MAXIOV)</div><div class='add'>+	if (nr_vecs &gt; BIO_MAX_INLINE_VECS)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	return kmalloc(struct_size(bio, bi_inline_vecs, nr_vecs), gfp_mask);</div><div class='ctx'> }</div><div class='hunk'>@@ -827,6 +828,7 @@ static int __bio_clone(struct bio *bio, struct bio *bio_src, gfp_t gfp)</div><div class='ctx'> 	bio_set_flag(bio, BIO_CLONED);</div><div class='ctx'> 	bio-&gt;bi_ioprio = bio_src-&gt;bi_ioprio;</div><div class='ctx'> 	bio-&gt;bi_write_hint = bio_src-&gt;bi_write_hint;</div><div class='add'>+	bio-&gt;bi_write_stream = bio_src-&gt;bi_write_stream;</div><div class='ctx'> 	bio-&gt;bi_iter = bio_src-&gt;bi_iter;</div><div class='ctx'> </div><div class='ctx'> 	if (bio-&gt;bi_bdev) {</div><div class='hunk'>@@ -918,7 +920,7 @@ static inline bool bio_full(struct bio *bio, unsigned len)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool bvec_try_merge_page(struct bio_vec *bv, struct page *page,</div><div class='del'>-		unsigned int len, unsigned int off, bool *same_page)</div><div class='add'>+		unsigned int len, unsigned int off)</div><div class='ctx'> {</div><div class='ctx'> 	size_t bv_end = bv-&gt;bv_offset + bv-&gt;bv_len;</div><div class='ctx'> 	phys_addr_t vec_end_addr = page_to_phys(bv-&gt;bv_page) + bv_end - 1;</div><div class='hunk'>@@ -931,9 +933,7 @@ static bool bvec_try_merge_page(struct bio_vec *bv, struct page *page,</div><div class='ctx'> 	if (!zone_device_pages_have_same_pgmap(bv-&gt;bv_page, page))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	*same_page = ((vec_end_addr &amp; PAGE_MASK) == ((page_addr + off) &amp;</div><div class='del'>-		     PAGE_MASK));</div><div class='del'>-	if (!*same_page) {</div><div class='add'>+	if ((vec_end_addr &amp; PAGE_MASK) != ((page_addr + off) &amp; PAGE_MASK)) {</div><div class='ctx'> 		if (IS_ENABLED(CONFIG_KMSAN))</div><div class='ctx'> 			return false;</div><div class='ctx'> 		if (bv-&gt;bv_page + bv_end / PAGE_SIZE != page + off / PAGE_SIZE)</div><div class='hunk'>@@ -953,8 +953,7 @@ static bool bvec_try_merge_page(struct bio_vec *bv, struct page *page,</div><div class='ctx'>  * helpers to split.  Hopefully this will go away soon.</div><div class='ctx'>  */</div><div class='ctx'> bool bvec_try_merge_hw_page(struct request_queue *q, struct bio_vec *bv,</div><div class='del'>-		struct page *page, unsigned len, unsigned offset,</div><div class='del'>-		bool *same_page)</div><div class='add'>+		struct page *page, unsigned len, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long mask = queue_segment_boundary(q);</div><div class='ctx'> 	phys_addr_t addr1 = bvec_phys(bv);</div><div class='hunk'>@@ -964,7 +963,7 @@ bool bvec_try_merge_hw_page(struct request_queue *q, struct bio_vec *bv,</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (len &gt; queue_max_segment_size(q) - bv-&gt;bv_len)</div><div class='ctx'> 		return false;</div><div class='del'>-	return bvec_try_merge_page(bv, page, len, offset, same_page);</div><div class='add'>+	return bvec_try_merge_page(bv, page, len, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -990,6 +989,22 @@ void __bio_add_page(struct bio *bio, struct page *page,</div><div class='ctx'> EXPORT_SYMBOL_GPL(__bio_add_page);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * bio_add_virt_nofail - add data in the direct kernel mapping to a bio</div><div class='add'>+ * @bio: destination bio</div><div class='add'>+ * @vaddr: data to add</div><div class='add'>+ * @len: length of the data to add, may cross pages</div><div class='add'>+ *</div><div class='add'>+ * Add the data at @vaddr to @bio.  The caller must have ensure a segment</div><div class='add'>+ * is available for the added data.  No merging into an existing segment</div><div class='add'>+ * will be performed.</div><div class='add'>+ */</div><div class='add'>+void bio_add_virt_nofail(struct bio *bio, void *vaddr, unsigned len)</div><div class='add'>+{</div><div class='add'>+	__bio_add_page(bio, virt_to_page(vaddr), len, offset_in_page(vaddr));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bio_add_virt_nofail);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *	bio_add_page	-	attempt to add page(s) to bio</div><div class='ctx'>  *	@bio: destination bio</div><div class='ctx'>  *	@page: start page to add</div><div class='hunk'>@@ -1002,8 +1017,6 @@ EXPORT_SYMBOL_GPL(__bio_add_page);</div><div class='ctx'> int bio_add_page(struct bio *bio, struct page *page,</div><div class='ctx'> 		 unsigned int len, unsigned int offset)</div><div class='ctx'> {</div><div class='del'>-	bool same_page = false;</div><div class='del'>-</div><div class='ctx'> 	if (WARN_ON_ONCE(bio_flagged(bio, BIO_CLONED)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (bio-&gt;bi_iter.bi_size &gt; UINT_MAX - len)</div><div class='hunk'>@@ -1011,7 +1024,7 @@ int bio_add_page(struct bio *bio, struct page *page,</div><div class='ctx'> </div><div class='ctx'> 	if (bio-&gt;bi_vcnt &gt; 0 &amp;&amp;</div><div class='ctx'> 	    bvec_try_merge_page(&amp;bio-&gt;bi_io_vec[bio-&gt;bi_vcnt - 1],</div><div class='del'>-				page, len, offset, &amp;same_page)) {</div><div class='add'>+				page, len, offset)) {</div><div class='ctx'> 		bio-&gt;bi_iter.bi_size += len;</div><div class='ctx'> 		return len;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1058,6 +1071,61 @@ bool bio_add_folio(struct bio *bio, struct folio *folio, size_t len,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bio_add_folio);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * bio_add_vmalloc_chunk - add a vmalloc chunk to a bio</div><div class='add'>+ * @bio: destination bio</div><div class='add'>+ * @vaddr: vmalloc address to add</div><div class='add'>+ * @len: total length in bytes of the data to add</div><div class='add'>+ *</div><div class='add'>+ * Add data starting at @vaddr to @bio and return how many bytes were added.</div><div class='add'>+ * This may be less than the amount originally asked.  Returns 0 if no data</div><div class='add'>+ * could be added to @bio.</div><div class='add'>+ *</div><div class='add'>+ * This helper calls flush_kernel_vmap_range() for the range added.  For reads</div><div class='add'>+ * the caller still needs to manually call invalidate_kernel_vmap_range() in</div><div class='add'>+ * the completion handler.</div><div class='add'>+ */</div><div class='add'>+unsigned int bio_add_vmalloc_chunk(struct bio *bio, void *vaddr, unsigned len)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = offset_in_page(vaddr);</div><div class='add'>+</div><div class='add'>+	len = min(len, PAGE_SIZE - offset);</div><div class='add'>+	if (bio_add_page(bio, vmalloc_to_page(vaddr), len, offset) &lt; len)</div><div class='add'>+		return 0;</div><div class='add'>+	if (op_is_write(bio_op(bio)))</div><div class='add'>+		flush_kernel_vmap_range(vaddr, len);</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bio_add_vmalloc_chunk);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bio_add_vmalloc - add a vmalloc region to a bio</div><div class='add'>+ * @bio: destination bio</div><div class='add'>+ * @vaddr: vmalloc address to add</div><div class='add'>+ * @len: total length in bytes of the data to add</div><div class='add'>+ *</div><div class='add'>+ * Add data starting at @vaddr to @bio.  Return %true on success or %false if</div><div class='add'>+ * @bio does not have enough space for the payload.</div><div class='add'>+ *</div><div class='add'>+ * This helper calls flush_kernel_vmap_range() for the range added.  For reads</div><div class='add'>+ * the caller still needs to manually call invalidate_kernel_vmap_range() in</div><div class='add'>+ * the completion handler.</div><div class='add'>+ */</div><div class='add'>+bool bio_add_vmalloc(struct bio *bio, void *vaddr, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	do {</div><div class='add'>+		unsigned int added = bio_add_vmalloc_chunk(bio, vaddr, len);</div><div class='add'>+</div><div class='add'>+		if (!added)</div><div class='add'>+			return false;</div><div class='add'>+		vaddr += added;</div><div class='add'>+		len -= added;</div><div class='add'>+	} while (len);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bio_add_vmalloc);</div><div class='add'>+</div><div class='ctx'> void __bio_release_pages(struct bio *bio, bool mark_dirty)</div><div class='ctx'> {</div><div class='ctx'> 	struct folio_iter fi;</div><div class='hunk'>@@ -1088,27 +1156,6 @@ void bio_iov_bvec_set(struct bio *bio, const struct iov_iter *iter)</div><div class='ctx'> 	bio_set_flag(bio, BIO_CLONED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bio_iov_add_folio(struct bio *bio, struct folio *folio, size_t len,</div><div class='del'>-			     size_t offset)</div><div class='del'>-{</div><div class='del'>-	bool same_page = false;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON_ONCE(bio-&gt;bi_iter.bi_size &gt; UINT_MAX - len))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	if (bio-&gt;bi_vcnt &gt; 0 &amp;&amp;</div><div class='del'>-	    bvec_try_merge_page(&amp;bio-&gt;bi_io_vec[bio-&gt;bi_vcnt - 1],</div><div class='del'>-				folio_page(folio, 0), len, offset,</div><div class='del'>-				&amp;same_page)) {</div><div class='del'>-		bio-&gt;bi_iter.bi_size += len;</div><div class='del'>-		if (same_page &amp;&amp; bio_flagged(bio, BIO_PAGE_PINNED))</div><div class='del'>-			unpin_user_folio(folio, 1);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	bio_add_folio_nofail(bio, folio, len, offset);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static unsigned int get_contig_folio_len(unsigned int *num_pages,</div><div class='ctx'> 					 struct page **pages, unsigned int i,</div><div class='ctx'> 					 struct folio *folio, size_t left,</div><div class='hunk'>@@ -1203,6 +1250,7 @@ static int __bio_iov_iter_get_pages(struct bio *bio, struct iov_iter *iter)</div><div class='ctx'> 	for (left = size, i = 0; left &gt; 0; left -= len, i += num_pages) {</div><div class='ctx'> 		struct page *page = pages[i];</div><div class='ctx'> 		struct folio *folio = page_folio(page);</div><div class='add'>+		unsigned int old_vcnt = bio-&gt;bi_vcnt;</div><div class='ctx'> </div><div class='ctx'> 		folio_offset = ((size_t)folio_page_idx(folio, page) &lt;&lt;</div><div class='ctx'> 			       PAGE_SHIFT) + offset;</div><div class='hunk'>@@ -1215,7 +1263,23 @@ static int __bio_iov_iter_get_pages(struct bio *bio, struct iov_iter *iter)</div><div class='ctx'> 			len = get_contig_folio_len(&amp;num_pages, pages, i,</div><div class='ctx'> 						   folio, left, offset);</div><div class='ctx'> </div><div class='del'>-		bio_iov_add_folio(bio, folio, len, folio_offset);</div><div class='add'>+		if (!bio_add_folio(bio, folio, len, folio_offset)) {</div><div class='add'>+			WARN_ON_ONCE(1);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (bio_flagged(bio, BIO_PAGE_PINNED)) {</div><div class='add'>+			/*</div><div class='add'>+			 * We're adding another fragment of a page that already</div><div class='add'>+			 * was part of the last segment.  Undo our pin as the</div><div class='add'>+			 * page was pinned when an earlier fragment of it was</div><div class='add'>+			 * added to the bio and __bio_release_pages expects a</div><div class='add'>+			 * single pin per page.</div><div class='add'>+			 */</div><div class='add'>+			if (offset &amp;&amp; bio-&gt;bi_vcnt == old_vcnt)</div><div class='add'>+				unpin_user_folio(folio, 1);</div><div class='add'>+		}</div><div class='ctx'> 		offset = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1301,6 +1365,36 @@ int submit_bio_wait(struct bio *bio)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(submit_bio_wait);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * bdev_rw_virt - synchronously read into / write from kernel mapping</div><div class='add'>+ * @bdev:	block device to access</div><div class='add'>+ * @sector:	sector to access</div><div class='add'>+ * @data:	data to read/write</div><div class='add'>+ * @len:	length in byte to read/write</div><div class='add'>+ * @op:		operation (e.g. REQ_OP_READ/REQ_OP_WRITE)</div><div class='add'>+ *</div><div class='add'>+ * Performs synchronous I/O to @bdev for @data/@len.  @data must be in</div><div class='add'>+ * the kernel direct mapping and not a vmalloc address.</div><div class='add'>+ */</div><div class='add'>+int bdev_rw_virt(struct block_device *bdev, sector_t sector, void *data,</div><div class='add'>+		size_t len, enum req_op op)</div><div class='add'>+{</div><div class='add'>+	struct bio_vec bv;</div><div class='add'>+	struct bio bio;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(is_vmalloc_addr(data)))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	bio_init(&amp;bio, bdev, &amp;bv, 1, op);</div><div class='add'>+	bio.bi_iter.bi_sector = sector;</div><div class='add'>+	bio_add_virt_nofail(&amp;bio, data, len);</div><div class='add'>+	error = submit_bio_wait(&amp;bio);</div><div class='add'>+	bio_uninit(&amp;bio);</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(bdev_rw_virt);</div><div class='add'>+</div><div class='ctx'> static void bio_wait_end_io(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	complete(bio-&gt;bi_private);</div><div class='head'>diff --git a/block/blk-cgroup.c b/block/blk-cgroup.c<br/>index 5905f277057b..5936db7f8475 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-cgroup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-cgroup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-cgroup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-cgroup.c</a></div><div class='hunk'>@@ -797,7 +797,7 @@ int blkg_conf_open_bdev(struct blkg_conf_ctx *ctx)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	input = skip_spaces(input);</div><div class='ctx'> </div><div class='del'>-	bdev = blkdev_get_no_open(MKDEV(major, minor));</div><div class='add'>+	bdev = blkdev_get_no_open(MKDEV(major, minor), false);</div><div class='ctx'> 	if (!bdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	if (bdev_is_partition(bdev)) {</div><div class='hunk'>@@ -1074,8 +1074,8 @@ static void __blkcg_rstat_flush(struct blkcg *blkcg, int cpu)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For covering concurrent parent blkg update from blkg_release().</div><div class='ctx'> 	 *</div><div class='del'>-	 * When flushing from cgroup, cgroup_rstat_lock is always held, so</div><div class='del'>-	 * this lock won't cause contention most of time.</div><div class='add'>+	 * When flushing from cgroup, the subsystem rstat lock is always held,</div><div class='add'>+	 * so this lock won't cause contention most of time.</div><div class='ctx'> 	 */</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;blkg_stat_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1144,7 +1144,7 @@ static void blkcg_rstat_flush(struct cgroup_subsys_state *css, int cpu)</div><div class='ctx'> /*</div><div class='ctx'>  * We source root cgroup stats from the system-wide stats to avoid</div><div class='ctx'>  * tracking the same information twice and incurring overhead when no</div><div class='del'>- * cgroups are defined. For that reason, cgroup_rstat_flush in</div><div class='add'>+ * cgroups are defined. For that reason, css_rstat_flush in</div><div class='ctx'>  * blkcg_print_stat does not actually fill out the iostat in the root</div><div class='ctx'>  * cgroup's blkcg_gq.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1253,7 +1253,7 @@ static int blkcg_print_stat(struct seq_file *sf, void *v)</div><div class='ctx'> 	if (!seq_css(sf)-&gt;parent)</div><div class='ctx'> 		blkcg_fill_root_iostats();</div><div class='ctx'> 	else</div><div class='del'>-		cgroup_rstat_flush(blkcg-&gt;css.cgroup);</div><div class='add'>+		css_rstat_flush(&amp;blkcg-&gt;css);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	hlist_for_each_entry_rcu(blkg, &amp;blkcg-&gt;blkg_list, blkcg_node) {</div><div class='hunk'>@@ -2243,7 +2243,7 @@ void blk_cgroup_bio_start(struct bio *bio)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	u64_stats_update_end_irqrestore(&amp;bis-&gt;sync, flags);</div><div class='del'>-	cgroup_rstat_updated(blkcg-&gt;css.cgroup, cpu);</div><div class='add'>+	css_rstat_updated(&amp;blkcg-&gt;css, cpu);</div><div class='ctx'> 	put_cpu();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-core.c b/block/blk-core.c<br/>index e8cc270a453f..b862c66018f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-core.c</a></div><div class='hunk'>@@ -1018,7 +1018,7 @@ again:</div><div class='ctx'> 	stamp = READ_ONCE(part-&gt;bd_stamp);</div><div class='ctx'> 	if (unlikely(time_after(now, stamp)) &amp;&amp;</div><div class='ctx'> 	    likely(try_cmpxchg(&amp;part-&gt;bd_stamp, &amp;stamp, now)) &amp;&amp;</div><div class='del'>-	    (end || part_in_flight(part)))</div><div class='add'>+	    (end || bdev_count_inflight(part)))</div><div class='ctx'> 		__part_stat_add(part, io_ticks, now - stamp);</div><div class='ctx'> </div><div class='ctx'> 	if (bdev_is_partition(part)) {</div><div class='head'>diff --git a/block/blk-crypto-fallback.c b/block/blk-crypto-fallback.c<br/>index f154be0b575a..005c9157ffb3 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-crypto-fallback.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-crypto-fallback.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-crypto-fallback.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-crypto-fallback.c</a></div><div class='hunk'>@@ -173,6 +173,7 @@ static struct bio *blk_crypto_fallback_clone_bio(struct bio *bio_src)</div><div class='ctx'> 		bio_set_flag(bio, BIO_REMAPPED);</div><div class='ctx'> 	bio-&gt;bi_ioprio		= bio_src-&gt;bi_ioprio;</div><div class='ctx'> 	bio-&gt;bi_write_hint	= bio_src-&gt;bi_write_hint;</div><div class='add'>+	bio-&gt;bi_write_stream	= bio_src-&gt;bi_write_stream;</div><div class='ctx'> 	bio-&gt;bi_iter.bi_sector	= bio_src-&gt;bi_iter.bi_sector;</div><div class='ctx'> 	bio-&gt;bi_iter.bi_size	= bio_src-&gt;bi_iter.bi_size;</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-map.c b/block/blk-map.c<br/>index d2f22744b3d1..23e5d5ebe59e 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-map.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-map.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-map.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-map.c</a></div><div class='hunk'>@@ -317,64 +317,26 @@ static void bio_map_kern_endio(struct bio *bio)</div><div class='ctx'> 	kfree(bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- *	bio_map_kern	-	map kernel address into bio</div><div class='del'>- *	@q: the struct request_queue for the bio</div><div class='del'>- *	@data: pointer to buffer to map</div><div class='del'>- *	@len: length in bytes</div><div class='del'>- *	@gfp_mask: allocation flags for bio allocation</div><div class='del'>- *</div><div class='del'>- *	Map the kernel address into a bio suitable for io to a block</div><div class='del'>- *	device. Returns an error pointer in case of error.</div><div class='del'>- */</div><div class='del'>-static struct bio *bio_map_kern(struct request_queue *q, void *data,</div><div class='del'>-		unsigned int len, gfp_t gfp_mask)</div><div class='add'>+static struct bio *bio_map_kern(void *data, unsigned int len, enum req_op op,</div><div class='add'>+		gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='del'>-	unsigned long kaddr = (unsigned long)data;</div><div class='del'>-	unsigned long end = (kaddr + len + PAGE_SIZE - 1) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	unsigned long start = kaddr &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	const int nr_pages = end - start;</div><div class='del'>-	bool is_vmalloc = is_vmalloc_addr(data);</div><div class='del'>-	struct page *page;</div><div class='del'>-	int offset, i;</div><div class='add'>+	unsigned int nr_vecs = bio_add_max_vecs(data, len);</div><div class='ctx'> 	struct bio *bio;</div><div class='ctx'> </div><div class='del'>-	bio = bio_kmalloc(nr_pages, gfp_mask);</div><div class='add'>+	bio = bio_kmalloc(nr_vecs, gfp_mask);</div><div class='ctx'> 	if (!bio)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='del'>-	bio_init(bio, NULL, bio-&gt;bi_inline_vecs, nr_pages, 0);</div><div class='del'>-</div><div class='del'>-	if (is_vmalloc) {</div><div class='del'>-		flush_kernel_vmap_range(data, len);</div><div class='add'>+	bio_init(bio, NULL, bio-&gt;bi_inline_vecs, nr_vecs, op);</div><div class='add'>+	if (is_vmalloc_addr(data)) {</div><div class='ctx'> 		bio-&gt;bi_private = data;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	offset = offset_in_page(kaddr);</div><div class='del'>-	for (i = 0; i &lt; nr_pages; i++) {</div><div class='del'>-		unsigned int bytes = PAGE_SIZE - offset;</div><div class='del'>-</div><div class='del'>-		if (len &lt;= 0)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (bytes &gt; len)</div><div class='del'>-			bytes = len;</div><div class='del'>-</div><div class='del'>-		if (!is_vmalloc)</div><div class='del'>-			page = virt_to_page(data);</div><div class='del'>-		else</div><div class='del'>-			page = vmalloc_to_page(data);</div><div class='del'>-		if (bio_add_page(bio, page, bytes, offset) &lt; bytes) {</div><div class='del'>-			/* we don't support partial mappings */</div><div class='add'>+		if (!bio_add_vmalloc(bio, data, len)) {</div><div class='ctx'> 			bio_uninit(bio);</div><div class='ctx'> 			kfree(bio);</div><div class='ctx'> 			return ERR_PTR(-EINVAL);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		data += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-		offset = 0;</div><div class='add'>+	} else {</div><div class='add'>+		bio_add_virt_nofail(bio, data, len);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	bio-&gt;bi_end_io = bio_map_kern_endio;</div><div class='ctx'> 	return bio;</div><div class='ctx'> }</div><div class='hunk'>@@ -402,17 +364,16 @@ static void bio_copy_kern_endio_read(struct bio *bio)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *	bio_copy_kern	-	copy kernel address into bio</div><div class='del'>- *	@q: the struct request_queue for the bio</div><div class='ctx'>  *	@data: pointer to buffer to copy</div><div class='ctx'>  *	@len: length in bytes</div><div class='add'>+ *	@op: bio/request operation</div><div class='ctx'>  *	@gfp_mask: allocation flags for bio and page allocation</div><div class='del'>- *	@reading: data direction is READ</div><div class='ctx'>  *</div><div class='ctx'>  *	copy the kernel address into a bio suitable for io to a block</div><div class='ctx'>  *	device. Returns an error pointer in case of error.</div><div class='ctx'>  */</div><div class='del'>-static struct bio *bio_copy_kern(struct request_queue *q, void *data,</div><div class='del'>-		unsigned int len, gfp_t gfp_mask, int reading)</div><div class='add'>+static struct bio *bio_copy_kern(void *data, unsigned int len, enum req_op op,</div><div class='add'>+		gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long kaddr = (unsigned long)data;</div><div class='ctx'> 	unsigned long end = (kaddr + len + PAGE_SIZE - 1) &gt;&gt; PAGE_SHIFT;</div><div class='hunk'>@@ -431,7 +392,7 @@ static struct bio *bio_copy_kern(struct request_queue *q, void *data,</div><div class='ctx'> 	bio = bio_kmalloc(nr_pages, gfp_mask);</div><div class='ctx'> 	if (!bio)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='del'>-	bio_init(bio, NULL, bio-&gt;bi_inline_vecs, nr_pages, 0);</div><div class='add'>+	bio_init(bio, NULL, bio-&gt;bi_inline_vecs, nr_pages, op);</div><div class='ctx'> </div><div class='ctx'> 	while (len) {</div><div class='ctx'> 		struct page *page;</div><div class='hunk'>@@ -444,7 +405,7 @@ static struct bio *bio_copy_kern(struct request_queue *q, void *data,</div><div class='ctx'> 		if (!page)</div><div class='ctx'> 			goto cleanup;</div><div class='ctx'> </div><div class='del'>-		if (!reading)</div><div class='add'>+		if (op_is_write(op))</div><div class='ctx'> 			memcpy(page_address(page), p, bytes);</div><div class='ctx'> </div><div class='ctx'> 		if (bio_add_page(bio, page, bytes, 0) &lt; bytes)</div><div class='hunk'>@@ -454,11 +415,11 @@ static struct bio *bio_copy_kern(struct request_queue *q, void *data,</div><div class='ctx'> 		p += bytes;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (reading) {</div><div class='add'>+	if (op_is_write(op)) {</div><div class='add'>+		bio-&gt;bi_end_io = bio_copy_kern_endio;</div><div class='add'>+	} else {</div><div class='ctx'> 		bio-&gt;bi_end_io = bio_copy_kern_endio_read;</div><div class='ctx'> 		bio-&gt;bi_private = data;</div><div class='del'>-	} else {</div><div class='del'>-		bio-&gt;bi_end_io = bio_copy_kern_endio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return bio;</div><div class='hunk'>@@ -556,8 +517,6 @@ int blk_rq_map_user_iov(struct request_queue *q, struct request *rq,</div><div class='ctx'> </div><div class='ctx'> 	if (map_data)</div><div class='ctx'> 		copy = true;</div><div class='del'>-	else if (blk_queue_may_bounce(q))</div><div class='del'>-		copy = true;</div><div class='ctx'> 	else if (iov_iter_alignment(iter) &amp; align)</div><div class='ctx'> 		copy = true;</div><div class='ctx'> 	else if (iov_iter_is_bvec(iter))</div><div class='hunk'>@@ -689,7 +648,6 @@ EXPORT_SYMBOL(blk_rq_unmap_user);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * blk_rq_map_kern - map kernel data to a request, for passthrough requests</div><div class='del'>- * @q:		request queue where request should be inserted</div><div class='ctx'>  * @rq:		request to fill</div><div class='ctx'>  * @kbuf:	the kernel buffer</div><div class='ctx'>  * @len:	length of user data</div><div class='hunk'>@@ -700,31 +658,26 @@ EXPORT_SYMBOL(blk_rq_unmap_user);</div><div class='ctx'>  *    buffer is used. Can be called multiple times to append multiple</div><div class='ctx'>  *    buffers.</div><div class='ctx'>  */</div><div class='del'>-int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf,</div><div class='del'>-		    unsigned int len, gfp_t gfp_mask)</div><div class='add'>+int blk_rq_map_kern(struct request *rq, void *kbuf, unsigned int len,</div><div class='add'>+		gfp_t gfp_mask)</div><div class='ctx'> {</div><div class='del'>-	int reading = rq_data_dir(rq) == READ;</div><div class='ctx'> 	unsigned long addr = (unsigned long) kbuf;</div><div class='ctx'> 	struct bio *bio;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (len &gt; (queue_max_hw_sectors(q) &lt;&lt; 9))</div><div class='add'>+	if (len &gt; (queue_max_hw_sectors(rq-&gt;q) &lt;&lt; SECTOR_SHIFT))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (!len || !kbuf)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!blk_rq_aligned(q, addr, len) || object_is_on_stack(kbuf) ||</div><div class='del'>-	    blk_queue_may_bounce(q))</div><div class='del'>-		bio = bio_copy_kern(q, kbuf, len, gfp_mask, reading);</div><div class='add'>+	if (!blk_rq_aligned(rq-&gt;q, addr, len) || object_is_on_stack(kbuf))</div><div class='add'>+		bio = bio_copy_kern(kbuf, len, req_op(rq), gfp_mask);</div><div class='ctx'> 	else</div><div class='del'>-		bio = bio_map_kern(q, kbuf, len, gfp_mask);</div><div class='add'>+		bio = bio_map_kern(kbuf, len, req_op(rq), gfp_mask);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(bio))</div><div class='ctx'> 		return PTR_ERR(bio);</div><div class='ctx'> </div><div class='del'>-	bio-&gt;bi_opf &amp;= ~REQ_OP_MASK;</div><div class='del'>-	bio-&gt;bi_opf |= req_op(rq);</div><div class='del'>-</div><div class='ctx'> 	ret = blk_rq_append_bio(rq, bio);</div><div class='ctx'> 	if (unlikely(ret)) {</div><div class='ctx'> 		bio_uninit(bio);</div><div class='head'>diff --git a/block/blk-merge.c b/block/blk-merge.c<br/>index fdd4efb54c6c..3af1d284add5 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-merge.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-merge.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-merge.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-merge.c</a></div><div class='hunk'>@@ -7,7 +7,6 @@</div><div class='ctx'> #include &lt;linux/bio.h&gt;</div><div class='ctx'> #include &lt;linux/blkdev.h&gt;</div><div class='ctx'> #include &lt;linux/blk-integrity.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/part_stat.h&gt;</div><div class='ctx'> #include &lt;linux/blk-cgroup.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -226,27 +225,6 @@ static inline unsigned get_max_io_size(struct bio *bio,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * get_max_segment_size() - maximum number of bytes to add as a single segment</div><div class='del'>- * @lim: Request queue limits.</div><div class='del'>- * @paddr: address of the range to add</div><div class='del'>- * @len: maximum length available to add at @paddr</div><div class='del'>- *</div><div class='del'>- * Returns the maximum number of bytes of the range starting at @paddr that can</div><div class='del'>- * be added to a single segment.</div><div class='del'>- */</div><div class='del'>-static inline unsigned get_max_segment_size(const struct queue_limits *lim,</div><div class='del'>-		phys_addr_t paddr, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	/*</div><div class='del'>-	 * Prevent an overflow if mask = ULONG_MAX and offset = 0 by adding 1</div><div class='del'>-	 * after having calculated the minimum.</div><div class='del'>-	 */</div><div class='del'>-	return min_t(unsigned long, len,</div><div class='del'>-		min(lim-&gt;seg_boundary_mask - (lim-&gt;seg_boundary_mask &amp; paddr),</div><div class='del'>-		    (unsigned long)lim-&gt;max_segment_size - 1) + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * bvec_split_segs - verify whether or not a bvec should be split in the middle</div><div class='ctx'>  * @lim:      [in] queue limits to split based on</div><div class='ctx'>  * @bv:       [in] bvec to examine</div><div class='hunk'>@@ -473,117 +451,6 @@ unsigned int blk_recalc_rq_segments(struct request *rq)</div><div class='ctx'> 	return nr_phys_segs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct phys_vec {</div><div class='del'>-	phys_addr_t	paddr;</div><div class='del'>-	u32		len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool blk_map_iter_next(struct request *req,</div><div class='del'>-		struct req_iterator *iter, struct phys_vec *vec)</div><div class='del'>-{</div><div class='del'>-	unsigned int max_size;</div><div class='del'>-	struct bio_vec bv;</div><div class='del'>-</div><div class='del'>-	if (req-&gt;rq_flags &amp; RQF_SPECIAL_PAYLOAD) {</div><div class='del'>-		if (!iter-&gt;bio)</div><div class='del'>-			return false;</div><div class='del'>-		vec-&gt;paddr = bvec_phys(&amp;req-&gt;special_vec);</div><div class='del'>-		vec-&gt;len = req-&gt;special_vec.bv_len;</div><div class='del'>-		iter-&gt;bio = NULL;</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!iter-&gt;iter.bi_size)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	bv = mp_bvec_iter_bvec(iter-&gt;bio-&gt;bi_io_vec, iter-&gt;iter);</div><div class='del'>-	vec-&gt;paddr = bvec_phys(&amp;bv);</div><div class='del'>-	max_size = get_max_segment_size(&amp;req-&gt;q-&gt;limits, vec-&gt;paddr, UINT_MAX);</div><div class='del'>-	bv.bv_len = min(bv.bv_len, max_size);</div><div class='del'>-	bio_advance_iter_single(iter-&gt;bio, &amp;iter-&gt;iter, bv.bv_len);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we are entirely done with this bi_io_vec entry, check if the next</div><div class='del'>-	 * one could be merged into it.  This typically happens when moving to</div><div class='del'>-	 * the next bio, but some callers also don't pack bvecs tight.</div><div class='del'>-	 */</div><div class='del'>-	while (!iter-&gt;iter.bi_size || !iter-&gt;iter.bi_bvec_done) {</div><div class='del'>-		struct bio_vec next;</div><div class='del'>-</div><div class='del'>-		if (!iter-&gt;iter.bi_size) {</div><div class='del'>-			if (!iter-&gt;bio-&gt;bi_next)</div><div class='del'>-				break;</div><div class='del'>-			iter-&gt;bio = iter-&gt;bio-&gt;bi_next;</div><div class='del'>-			iter-&gt;iter = iter-&gt;bio-&gt;bi_iter;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		next = mp_bvec_iter_bvec(iter-&gt;bio-&gt;bi_io_vec, iter-&gt;iter);</div><div class='del'>-		if (bv.bv_len + next.bv_len &gt; max_size ||</div><div class='del'>-		    !biovec_phys_mergeable(req-&gt;q, &amp;bv, &amp;next))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		bv.bv_len += next.bv_len;</div><div class='del'>-		bio_advance_iter_single(iter-&gt;bio, &amp;iter-&gt;iter, next.bv_len);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vec-&gt;len = bv.bv_len;</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct scatterlist *blk_next_sg(struct scatterlist **sg,</div><div class='del'>-		struct scatterlist *sglist)</div><div class='del'>-{</div><div class='del'>-	if (!*sg)</div><div class='del'>-		return sglist;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the driver previously mapped a shorter list, we could see a</div><div class='del'>-	 * termination bit prematurely unless it fully inits the sg table</div><div class='del'>-	 * on each mapping. We KNOW that there must be more entries here</div><div class='del'>-	 * or the driver would be buggy, so force clear the termination bit</div><div class='del'>-	 * to avoid doing a full sg_init_table() in drivers for each command.</div><div class='del'>-	 */</div><div class='del'>-	sg_unmark_end(*sg);</div><div class='del'>-	return sg_next(*sg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Map a request to scatterlist, return number of sg entries setup. Caller</div><div class='del'>- * must make sure sg can hold rq-&gt;nr_phys_segments entries.</div><div class='del'>- */</div><div class='del'>-int __blk_rq_map_sg(struct request *rq, struct scatterlist *sglist,</div><div class='del'>-		    struct scatterlist **last_sg)</div><div class='del'>-{</div><div class='del'>-	struct req_iterator iter = {</div><div class='del'>-		.bio	= rq-&gt;bio,</div><div class='del'>-	};</div><div class='del'>-	struct phys_vec vec;</div><div class='del'>-	int nsegs = 0;</div><div class='del'>-</div><div class='del'>-	/* the internal flush request may not have bio attached */</div><div class='del'>-	if (iter.bio)</div><div class='del'>-		iter.iter = iter.bio-&gt;bi_iter;</div><div class='del'>-</div><div class='del'>-	while (blk_map_iter_next(rq, &amp;iter, &amp;vec)) {</div><div class='del'>-		*last_sg = blk_next_sg(last_sg, sglist);</div><div class='del'>-		sg_set_page(*last_sg, phys_to_page(vec.paddr), vec.len,</div><div class='del'>-				offset_in_page(vec.paddr));</div><div class='del'>-		nsegs++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (*last_sg)</div><div class='del'>-		sg_mark_end(*last_sg);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Something must have been wrong if the figured number of</div><div class='del'>-	 * segment is bigger than number of req's physical segments</div><div class='del'>-	 */</div><div class='del'>-	WARN_ON(nsegs &gt; blk_rq_nr_phys_segments(rq));</div><div class='del'>-</div><div class='del'>-	return nsegs;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__blk_rq_map_sg);</div><div class='del'>-</div><div class='ctx'> static inline unsigned int blk_rq_get_max_sectors(struct request *rq,</div><div class='ctx'> 						  sector_t offset)</div><div class='ctx'> {</div><div class='hunk'>@@ -832,6 +699,8 @@ static struct request *attempt_merge(struct request_queue *q,</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;bio-&gt;bi_write_hint != next-&gt;bio-&gt;bi_write_hint)</div><div class='ctx'> 		return NULL;</div><div class='add'>+	if (req-&gt;bio-&gt;bi_write_stream != next-&gt;bio-&gt;bi_write_stream)</div><div class='add'>+		return NULL;</div><div class='ctx'> 	if (req-&gt;bio-&gt;bi_ioprio != next-&gt;bio-&gt;bi_ioprio)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	if (!blk_atomic_write_mergeable_rqs(req, next))</div><div class='hunk'>@@ -953,6 +822,8 @@ bool blk_rq_merge_ok(struct request *rq, struct bio *bio)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (rq-&gt;bio-&gt;bi_write_hint != bio-&gt;bi_write_hint)</div><div class='ctx'> 		return false;</div><div class='add'>+	if (rq-&gt;bio-&gt;bi_write_stream != bio-&gt;bi_write_stream)</div><div class='add'>+		return false;</div><div class='ctx'> 	if (rq-&gt;bio-&gt;bi_ioprio != bio-&gt;bi_ioprio)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (blk_atomic_write_mergeable_rq_bio(rq, bio) == false)</div><div class='head'>diff --git a/block/blk-mq-debugfs.c b/block/blk-mq-debugfs.c<br/>index 3421b5521fe2..29b3540dd180 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq-debugfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq-debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq-debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-mq-debugfs.c</a></div><div class='hunk'>@@ -93,6 +93,8 @@ static const char *const blk_queue_flag_name[] = {</div><div class='ctx'> 	QUEUE_FLAG_NAME(RQ_ALLOC_TIME),</div><div class='ctx'> 	QUEUE_FLAG_NAME(HCTX_ACTIVE),</div><div class='ctx'> 	QUEUE_FLAG_NAME(SQ_SCHED),</div><div class='add'>+	QUEUE_FLAG_NAME(DISABLE_WBT_DEF),</div><div class='add'>+	QUEUE_FLAG_NAME(NO_ELV_SWITCH),</div><div class='ctx'> };</div><div class='ctx'> #undef QUEUE_FLAG_NAME</div><div class='ctx'> </div><div class='hunk'>@@ -624,20 +626,9 @@ void blk_mq_debugfs_register(struct request_queue *q)</div><div class='ctx'> </div><div class='ctx'> 	debugfs_create_files(q-&gt;debugfs_dir, q, blk_mq_debugfs_queue_attrs);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * blk_mq_init_sched() attempted to do this already, but q-&gt;debugfs_dir</div><div class='del'>-	 * didn't exist yet (because we don't know what to name the directory</div><div class='del'>-	 * until the queue is registered to a gendisk).</div><div class='del'>-	 */</div><div class='del'>-	if (q-&gt;elevator &amp;&amp; !q-&gt;sched_debugfs_dir)</div><div class='del'>-		blk_mq_debugfs_register_sched(q);</div><div class='del'>-</div><div class='del'>-	/* Similarly, blk_mq_init_hctx() couldn't do this previously. */</div><div class='ctx'> 	queue_for_each_hw_ctx(q, hctx, i) {</div><div class='ctx'> 		if (!hctx-&gt;debugfs_dir)</div><div class='ctx'> 			blk_mq_debugfs_register_hctx(q, hctx);</div><div class='del'>-		if (q-&gt;elevator &amp;&amp; !hctx-&gt;sched_debugfs_dir)</div><div class='del'>-			blk_mq_debugfs_register_sched_hctx(q, hctx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;rq_qos) {</div><div class='head'>diff --git a/block/blk-mq-dma.c b/block/blk-mq-dma.c<br/>new file mode 100644<br/>index 000000000000..82bae475dfa4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq-dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-mq-dma.c</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Christoph Hellwig</div><div class='add'>+ */</div><div class='add'>+#include "blk.h"</div><div class='add'>+</div><div class='add'>+struct phys_vec {</div><div class='add'>+	phys_addr_t	paddr;</div><div class='add'>+	u32		len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool blk_map_iter_next(struct request *req, struct req_iterator *iter,</div><div class='add'>+			      struct phys_vec *vec)</div><div class='add'>+{</div><div class='add'>+	unsigned int max_size;</div><div class='add'>+	struct bio_vec bv;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;rq_flags &amp; RQF_SPECIAL_PAYLOAD) {</div><div class='add'>+		if (!iter-&gt;bio)</div><div class='add'>+			return false;</div><div class='add'>+		vec-&gt;paddr = bvec_phys(&amp;req-&gt;special_vec);</div><div class='add'>+		vec-&gt;len = req-&gt;special_vec.bv_len;</div><div class='add'>+		iter-&gt;bio = NULL;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!iter-&gt;iter.bi_size)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	bv = mp_bvec_iter_bvec(iter-&gt;bio-&gt;bi_io_vec, iter-&gt;iter);</div><div class='add'>+	vec-&gt;paddr = bvec_phys(&amp;bv);</div><div class='add'>+	max_size = get_max_segment_size(&amp;req-&gt;q-&gt;limits, vec-&gt;paddr, UINT_MAX);</div><div class='add'>+	bv.bv_len = min(bv.bv_len, max_size);</div><div class='add'>+	bio_advance_iter_single(iter-&gt;bio, &amp;iter-&gt;iter, bv.bv_len);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we are entirely done with this bi_io_vec entry, check if the next</div><div class='add'>+	 * one could be merged into it.  This typically happens when moving to</div><div class='add'>+	 * the next bio, but some callers also don't pack bvecs tight.</div><div class='add'>+	 */</div><div class='add'>+	while (!iter-&gt;iter.bi_size || !iter-&gt;iter.bi_bvec_done) {</div><div class='add'>+		struct bio_vec next;</div><div class='add'>+</div><div class='add'>+		if (!iter-&gt;iter.bi_size) {</div><div class='add'>+			if (!iter-&gt;bio-&gt;bi_next)</div><div class='add'>+				break;</div><div class='add'>+			iter-&gt;bio = iter-&gt;bio-&gt;bi_next;</div><div class='add'>+			iter-&gt;iter = iter-&gt;bio-&gt;bi_iter;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		next = mp_bvec_iter_bvec(iter-&gt;bio-&gt;bi_io_vec, iter-&gt;iter);</div><div class='add'>+		if (bv.bv_len + next.bv_len &gt; max_size ||</div><div class='add'>+		    !biovec_phys_mergeable(req-&gt;q, &amp;bv, &amp;next))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		bv.bv_len += next.bv_len;</div><div class='add'>+		bio_advance_iter_single(iter-&gt;bio, &amp;iter-&gt;iter, next.bv_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vec-&gt;len = bv.bv_len;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct scatterlist *</div><div class='add'>+blk_next_sg(struct scatterlist **sg, struct scatterlist *sglist)</div><div class='add'>+{</div><div class='add'>+	if (!*sg)</div><div class='add'>+		return sglist;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the driver previously mapped a shorter list, we could see a</div><div class='add'>+	 * termination bit prematurely unless it fully inits the sg table</div><div class='add'>+	 * on each mapping. We KNOW that there must be more entries here</div><div class='add'>+	 * or the driver would be buggy, so force clear the termination bit</div><div class='add'>+	 * to avoid doing a full sg_init_table() in drivers for each command.</div><div class='add'>+	 */</div><div class='add'>+	sg_unmark_end(*sg);</div><div class='add'>+	return sg_next(*sg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Map a request to scatterlist, return number of sg entries setup. Caller</div><div class='add'>+ * must make sure sg can hold rq-&gt;nr_phys_segments entries.</div><div class='add'>+ */</div><div class='add'>+int __blk_rq_map_sg(struct request *rq, struct scatterlist *sglist,</div><div class='add'>+		    struct scatterlist **last_sg)</div><div class='add'>+{</div><div class='add'>+	struct req_iterator iter = {</div><div class='add'>+		.bio	= rq-&gt;bio,</div><div class='add'>+	};</div><div class='add'>+	struct phys_vec vec;</div><div class='add'>+	int nsegs = 0;</div><div class='add'>+</div><div class='add'>+	/* the internal flush request may not have bio attached */</div><div class='add'>+	if (iter.bio)</div><div class='add'>+		iter.iter = iter.bio-&gt;bi_iter;</div><div class='add'>+</div><div class='add'>+	while (blk_map_iter_next(rq, &amp;iter, &amp;vec)) {</div><div class='add'>+		*last_sg = blk_next_sg(last_sg, sglist);</div><div class='add'>+		sg_set_page(*last_sg, phys_to_page(vec.paddr), vec.len,</div><div class='add'>+				offset_in_page(vec.paddr));</div><div class='add'>+		nsegs++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*last_sg)</div><div class='add'>+		sg_mark_end(*last_sg);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Something must have been wrong if the figured number of</div><div class='add'>+	 * segment is bigger than number of req's physical segments</div><div class='add'>+	 */</div><div class='add'>+	WARN_ON(nsegs &gt; blk_rq_nr_phys_segments(rq));</div><div class='add'>+</div><div class='add'>+	return nsegs;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__blk_rq_map_sg);</div><div class='head'>diff --git a/block/blk-mq-sched.c b/block/blk-mq-sched.c<br/>index 109611445d40..55a0fd105147 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq-sched.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq-sched.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq-sched.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-mq-sched.c</a></div><div class='hunk'>@@ -59,19 +59,17 @@ static bool blk_mq_dispatch_hctx_list(struct list_head *rq_list)</div><div class='ctx'> 		list_first_entry(rq_list, struct request, queuelist)-&gt;mq_hctx;</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> 	LIST_HEAD(hctx_list);</div><div class='del'>-	unsigned int count = 0;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(rq, rq_list, queuelist) {</div><div class='ctx'> 		if (rq-&gt;mq_hctx != hctx) {</div><div class='ctx'> 			list_cut_before(&amp;hctx_list, rq_list, &amp;rq-&gt;queuelist);</div><div class='ctx'> 			goto dispatch;</div><div class='ctx'> 		}</div><div class='del'>-		count++;</div><div class='ctx'> 	}</div><div class='ctx'> 	list_splice_tail_init(rq_list, &amp;hctx_list);</div><div class='ctx'> </div><div class='ctx'> dispatch:</div><div class='del'>-	return blk_mq_dispatch_rq_list(hctx, &amp;hctx_list, count);</div><div class='add'>+	return blk_mq_dispatch_rq_list(hctx, &amp;hctx_list, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define BLK_MQ_BUDGET_DELAY	3		/* ms units */</div><div class='hunk'>@@ -167,7 +165,7 @@ static int __blk_mq_do_dispatch_sched(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> 			dispatched |= blk_mq_dispatch_hctx_list(&amp;rq_list);</div><div class='ctx'> 		} while (!list_empty(&amp;rq_list));</div><div class='ctx'> 	} else {</div><div class='del'>-		dispatched = blk_mq_dispatch_rq_list(hctx, &amp;rq_list, count);</div><div class='add'>+		dispatched = blk_mq_dispatch_rq_list(hctx, &amp;rq_list, false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (busy)</div><div class='hunk'>@@ -261,7 +259,7 @@ static int blk_mq_do_dispatch_ctx(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> 		/* round robin for fair dispatch */</div><div class='ctx'> 		ctx = blk_mq_next_ctx(hctx, rq-&gt;mq_ctx);</div><div class='ctx'> </div><div class='del'>-	} while (blk_mq_dispatch_rq_list(rq-&gt;mq_hctx, &amp;rq_list, 1));</div><div class='add'>+	} while (blk_mq_dispatch_rq_list(rq-&gt;mq_hctx, &amp;rq_list, false));</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(hctx-&gt;dispatch_from, ctx);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -298,7 +296,7 @@ static int __blk_mq_sched_dispatch_requests(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!list_empty(&amp;rq_list)) {</div><div class='ctx'> 		blk_mq_sched_mark_restart_hctx(hctx);</div><div class='del'>-		if (!blk_mq_dispatch_rq_list(hctx, &amp;rq_list, 0))</div><div class='add'>+		if (!blk_mq_dispatch_rq_list(hctx, &amp;rq_list, true))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		need_dispatch = true;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -312,7 +310,7 @@ static int __blk_mq_sched_dispatch_requests(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> 	if (need_dispatch)</div><div class='ctx'> 		return blk_mq_do_dispatch_ctx(hctx);</div><div class='ctx'> 	blk_mq_flush_busy_ctxs(hctx, &amp;rq_list);</div><div class='del'>-	blk_mq_dispatch_rq_list(hctx, &amp;rq_list, 0);</div><div class='add'>+	blk_mq_dispatch_rq_list(hctx, &amp;rq_list, true);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -436,6 +434,30 @@ static int blk_mq_init_sched_shared_tags(struct request_queue *queue)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void blk_mq_sched_reg_debugfs(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct blk_mq_hw_ctx *hctx;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;q-&gt;debugfs_mutex);</div><div class='add'>+	blk_mq_debugfs_register_sched(q);</div><div class='add'>+	queue_for_each_hw_ctx(q, hctx, i)</div><div class='add'>+		blk_mq_debugfs_register_sched_hctx(q, hctx);</div><div class='add'>+	mutex_unlock(&amp;q-&gt;debugfs_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void blk_mq_sched_unreg_debugfs(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct blk_mq_hw_ctx *hctx;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;q-&gt;debugfs_mutex);</div><div class='add'>+	queue_for_each_hw_ctx(q, hctx, i)</div><div class='add'>+		blk_mq_debugfs_unregister_sched_hctx(hctx);</div><div class='add'>+	blk_mq_debugfs_unregister_sched(q);</div><div class='add'>+	mutex_unlock(&amp;q-&gt;debugfs_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* caller must have a reference to @e, will grab another one if successful */</div><div class='ctx'> int blk_mq_init_sched(struct request_queue *q, struct elevator_type *e)</div><div class='ctx'> {</div><div class='hunk'>@@ -469,10 +491,6 @@ int blk_mq_init_sched(struct request_queue *q, struct elevator_type *e)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_free_map_and_rqs;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;q-&gt;debugfs_mutex);</div><div class='del'>-	blk_mq_debugfs_register_sched(q);</div><div class='del'>-	mutex_unlock(&amp;q-&gt;debugfs_mutex);</div><div class='del'>-</div><div class='ctx'> 	queue_for_each_hw_ctx(q, hctx, i) {</div><div class='ctx'> 		if (e-&gt;ops.init_hctx) {</div><div class='ctx'> 			ret = e-&gt;ops.init_hctx(hctx, i);</div><div class='hunk'>@@ -484,11 +502,7 @@ int blk_mq_init_sched(struct request_queue *q, struct elevator_type *e)</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		mutex_lock(&amp;q-&gt;debugfs_mutex);</div><div class='del'>-		blk_mq_debugfs_register_sched_hctx(q, hctx);</div><div class='del'>-		mutex_unlock(&amp;q-&gt;debugfs_mutex);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_map_and_rqs:</div><div class='hunk'>@@ -527,10 +541,6 @@ void blk_mq_exit_sched(struct request_queue *q, struct elevator_queue *e)</div><div class='ctx'> 	unsigned int flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	queue_for_each_hw_ctx(q, hctx, i) {</div><div class='del'>-		mutex_lock(&amp;q-&gt;debugfs_mutex);</div><div class='del'>-		blk_mq_debugfs_unregister_sched_hctx(hctx);</div><div class='del'>-		mutex_unlock(&amp;q-&gt;debugfs_mutex);</div><div class='del'>-</div><div class='ctx'> 		if (e-&gt;type-&gt;ops.exit_hctx &amp;&amp; hctx-&gt;sched_data) {</div><div class='ctx'> 			e-&gt;type-&gt;ops.exit_hctx(hctx, i);</div><div class='ctx'> 			hctx-&gt;sched_data = NULL;</div><div class='hunk'>@@ -538,12 +548,9 @@ void blk_mq_exit_sched(struct request_queue *q, struct elevator_queue *e)</div><div class='ctx'> 		flags = hctx-&gt;flags;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;q-&gt;debugfs_mutex);</div><div class='del'>-	blk_mq_debugfs_unregister_sched(q);</div><div class='del'>-	mutex_unlock(&amp;q-&gt;debugfs_mutex);</div><div class='del'>-</div><div class='ctx'> 	if (e-&gt;type-&gt;ops.exit_sched)</div><div class='ctx'> 		e-&gt;type-&gt;ops.exit_sched(e);</div><div class='ctx'> 	blk_mq_sched_tags_teardown(q, flags);</div><div class='add'>+	set_bit(ELEVATOR_FLAG_DYING, &amp;q-&gt;elevator-&gt;flags);</div><div class='ctx'> 	q-&gt;elevator = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/block/blk-mq.c b/block/blk-mq.c<br/>index c2697db59109..4806b867e37d 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-mq.c</a></div><div class='hunk'>@@ -89,7 +89,7 @@ struct mq_inflight {</div><div class='ctx'> 	unsigned int inflight[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static bool blk_mq_check_inflight(struct request *rq, void *priv)</div><div class='add'>+static bool blk_mq_check_in_driver(struct request *rq, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mq_inflight *mi = priv;</div><div class='ctx'> </div><div class='hunk'>@@ -101,24 +101,14 @@ static bool blk_mq_check_inflight(struct request *rq, void *priv)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int blk_mq_in_flight(struct request_queue *q,</div><div class='del'>-		struct block_device *part)</div><div class='add'>+void blk_mq_in_driver_rw(struct block_device *part, unsigned int inflight[2])</div><div class='ctx'> {</div><div class='ctx'> 	struct mq_inflight mi = { .part = part };</div><div class='ctx'> </div><div class='del'>-	blk_mq_queue_tag_busy_iter(q, blk_mq_check_inflight, &amp;mi);</div><div class='del'>-</div><div class='del'>-	return mi.inflight[0] + mi.inflight[1];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void blk_mq_in_flight_rw(struct request_queue *q, struct block_device *part,</div><div class='del'>-		unsigned int inflight[2])</div><div class='del'>-{</div><div class='del'>-	struct mq_inflight mi = { .part = part };</div><div class='del'>-</div><div class='del'>-	blk_mq_queue_tag_busy_iter(q, blk_mq_check_inflight, &amp;mi);</div><div class='del'>-	inflight[0] = mi.inflight[0];</div><div class='del'>-	inflight[1] = mi.inflight[1];</div><div class='add'>+	blk_mq_queue_tag_busy_iter(bdev_get_queue(part), blk_mq_check_in_driver,</div><div class='add'>+				   &amp;mi);</div><div class='add'>+	inflight[READ] = mi.inflight[READ];</div><div class='add'>+	inflight[WRITE] = mi.inflight[WRITE];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_LOCKDEP</div><div class='hunk'>@@ -584,9 +574,13 @@ static struct request *blk_mq_rq_cache_fill(struct request_queue *q,</div><div class='ctx'> 	struct blk_mq_alloc_data data = {</div><div class='ctx'> 		.q		= q,</div><div class='ctx'> 		.flags		= flags,</div><div class='add'>+		.shallow_depth	= 0,</div><div class='ctx'> 		.cmd_flags	= opf,</div><div class='add'>+		.rq_flags	= 0,</div><div class='ctx'> 		.nr_tags	= plug-&gt;nr_ios,</div><div class='ctx'> 		.cached_rqs	= &amp;plug-&gt;cached_rqs,</div><div class='add'>+		.ctx		= NULL,</div><div class='add'>+		.hctx		= NULL</div><div class='ctx'> 	};</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> </div><div class='hunk'>@@ -646,8 +640,13 @@ struct request *blk_mq_alloc_request(struct request_queue *q, blk_opf_t opf,</div><div class='ctx'> 		struct blk_mq_alloc_data data = {</div><div class='ctx'> 			.q		= q,</div><div class='ctx'> 			.flags		= flags,</div><div class='add'>+			.shallow_depth	= 0,</div><div class='ctx'> 			.cmd_flags	= opf,</div><div class='add'>+			.rq_flags	= 0,</div><div class='ctx'> 			.nr_tags	= 1,</div><div class='add'>+			.cached_rqs	= NULL,</div><div class='add'>+			.ctx		= NULL,</div><div class='add'>+			.hctx		= NULL</div><div class='ctx'> 		};</div><div class='ctx'> 		int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -675,8 +674,13 @@ struct request *blk_mq_alloc_request_hctx(struct request_queue *q,</div><div class='ctx'> 	struct blk_mq_alloc_data data = {</div><div class='ctx'> 		.q		= q,</div><div class='ctx'> 		.flags		= flags,</div><div class='add'>+		.shallow_depth	= 0,</div><div class='ctx'> 		.cmd_flags	= opf,</div><div class='add'>+		.rq_flags	= 0,</div><div class='ctx'> 		.nr_tags	= 1,</div><div class='add'>+		.cached_rqs	= NULL,</div><div class='add'>+		.ctx		= NULL,</div><div class='add'>+		.hctx		= NULL</div><div class='ctx'> 	};</div><div class='ctx'> 	u64 alloc_time_ns = 0;</div><div class='ctx'> 	struct request *rq;</div><div class='hunk'>@@ -2080,7 +2084,7 @@ static void blk_mq_commit_rqs(struct blk_mq_hw_ctx *hctx, int queued,</div><div class='ctx'>  * Returns true if we did some work AND can potentially do more.</div><div class='ctx'>  */</div><div class='ctx'> bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list,</div><div class='del'>-			     unsigned int nr_budgets)</div><div class='add'>+			     bool get_budget)</div><div class='ctx'> {</div><div class='ctx'> 	enum prep_dispatch prep;</div><div class='ctx'> 	struct request_queue *q = hctx-&gt;queue;</div><div class='hunk'>@@ -2102,7 +2106,7 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list,</div><div class='ctx'> 		rq = list_first_entry(list, struct request, queuelist);</div><div class='ctx'> </div><div class='ctx'> 		WARN_ON_ONCE(hctx != rq-&gt;mq_hctx);</div><div class='del'>-		prep = blk_mq_prep_dispatch_rq(rq, !nr_budgets);</div><div class='add'>+		prep = blk_mq_prep_dispatch_rq(rq, get_budget);</div><div class='ctx'> 		if (prep != PREP_DISPATCH_OK)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -2111,12 +2115,6 @@ bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *list,</div><div class='ctx'> 		bd.rq = rq;</div><div class='ctx'> 		bd.last = list_empty(list);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * once the request is queued to lld, no need to cover the</div><div class='del'>-		 * budget any more</div><div class='del'>-		 */</div><div class='del'>-		if (nr_budgets)</div><div class='del'>-			nr_budgets--;</div><div class='ctx'> 		ret = q-&gt;mq_ops-&gt;queue_rq(hctx, &amp;bd);</div><div class='ctx'> 		switch (ret) {</div><div class='ctx'> 		case BLK_STS_OK:</div><div class='hunk'>@@ -2150,7 +2148,11 @@ out:</div><div class='ctx'> 			((hctx-&gt;flags &amp; BLK_MQ_F_TAG_QUEUE_SHARED) ||</div><div class='ctx'> 			blk_mq_is_shared_tags(hctx-&gt;flags));</div><div class='ctx'> </div><div class='del'>-		if (nr_budgets)</div><div class='add'>+		/*</div><div class='add'>+		 * If the caller allocated budgets, free the budgets of the</div><div class='add'>+		 * requests that have not yet been passed to the block driver.</div><div class='add'>+		 */</div><div class='add'>+		if (!get_budget)</div><div class='ctx'> 			blk_mq_release_budgets(q, list);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock(&amp;hctx-&gt;lock);</div><div class='hunk'>@@ -2778,15 +2780,15 @@ static blk_status_t blk_mq_request_issue_directly(struct request *rq, bool last)</div><div class='ctx'> 	return __blk_mq_issue_directly(hctx, rq, last);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void blk_mq_plug_issue_direct(struct blk_plug *plug)</div><div class='add'>+static void blk_mq_issue_direct(struct rq_list *rqs)</div><div class='ctx'> {</div><div class='ctx'> 	struct blk_mq_hw_ctx *hctx = NULL;</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> 	int queued = 0;</div><div class='ctx'> 	blk_status_t ret = BLK_STS_OK;</div><div class='ctx'> </div><div class='del'>-	while ((rq = rq_list_pop(&amp;plug-&gt;mq_list))) {</div><div class='del'>-		bool last = rq_list_empty(&amp;plug-&gt;mq_list);</div><div class='add'>+	while ((rq = rq_list_pop(rqs))) {</div><div class='add'>+		bool last = rq_list_empty(rqs);</div><div class='ctx'> </div><div class='ctx'> 		if (hctx != rq-&gt;mq_hctx) {</div><div class='ctx'> 			if (hctx) {</div><div class='hunk'>@@ -2817,15 +2819,64 @@ out:</div><div class='ctx'> 		blk_mq_commit_rqs(hctx, queued, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __blk_mq_flush_plug_list(struct request_queue *q,</div><div class='del'>-				     struct blk_plug *plug)</div><div class='add'>+static void __blk_mq_flush_list(struct request_queue *q, struct rq_list *rqs)</div><div class='ctx'> {</div><div class='ctx'> 	if (blk_queue_quiesced(q))</div><div class='ctx'> 		return;</div><div class='del'>-	q-&gt;mq_ops-&gt;queue_rqs(&amp;plug-&gt;mq_list);</div><div class='add'>+	q-&gt;mq_ops-&gt;queue_rqs(rqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned blk_mq_extract_queue_requests(struct rq_list *rqs,</div><div class='add'>+					      struct rq_list *queue_rqs)</div><div class='add'>+{</div><div class='add'>+	struct request *rq = rq_list_pop(rqs);</div><div class='add'>+	struct request_queue *this_q = rq-&gt;q;</div><div class='add'>+	struct request **prev = &amp;rqs-&gt;head;</div><div class='add'>+	struct rq_list matched_rqs = {};</div><div class='add'>+	struct request *last = NULL;</div><div class='add'>+	unsigned depth = 1;</div><div class='add'>+</div><div class='add'>+	rq_list_add_tail(&amp;matched_rqs, rq);</div><div class='add'>+	while ((rq = *prev)) {</div><div class='add'>+		if (rq-&gt;q == this_q) {</div><div class='add'>+			/* move rq from rqs to matched_rqs */</div><div class='add'>+			*prev = rq-&gt;rq_next;</div><div class='add'>+			rq_list_add_tail(&amp;matched_rqs, rq);</div><div class='add'>+			depth++;</div><div class='add'>+		} else {</div><div class='add'>+			/* leave rq in rqs */</div><div class='add'>+			prev = &amp;rq-&gt;rq_next;</div><div class='add'>+			last = rq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rqs-&gt;tail = last;</div><div class='add'>+	*queue_rqs = matched_rqs;</div><div class='add'>+	return depth;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blk_mq_dispatch_queue_requests(struct rq_list *rqs, unsigned depth)</div><div class='add'>+{</div><div class='add'>+	struct request_queue *q = rq_list_peek(rqs)-&gt;q;</div><div class='add'>+</div><div class='add'>+	trace_block_unplug(q, depth, true);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Peek first request and see if we have a -&gt;queue_rqs() hook.</div><div class='add'>+	 * If we do, we can dispatch the whole list in one go.</div><div class='add'>+	 * We already know at this point that all requests belong to the</div><div class='add'>+	 * same queue, caller must ensure that's the case.</div><div class='add'>+	 */</div><div class='add'>+	if (q-&gt;mq_ops-&gt;queue_rqs) {</div><div class='add'>+		blk_mq_run_dispatch_ops(q, __blk_mq_flush_list(q, rqs));</div><div class='add'>+		if (rq_list_empty(rqs))</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	blk_mq_run_dispatch_ops(q, blk_mq_issue_direct(rqs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void blk_mq_dispatch_plug_list(struct blk_plug *plug, bool from_sched)</div><div class='add'>+static void blk_mq_dispatch_list(struct rq_list *rqs, bool from_sched)</div><div class='ctx'> {</div><div class='ctx'> 	struct blk_mq_hw_ctx *this_hctx = NULL;</div><div class='ctx'> 	struct blk_mq_ctx *this_ctx = NULL;</div><div class='hunk'>@@ -2835,7 +2886,7 @@ static void blk_mq_dispatch_plug_list(struct blk_plug *plug, bool from_sched)</div><div class='ctx'> 	LIST_HEAD(list);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		struct request *rq = rq_list_pop(&amp;plug-&gt;mq_list);</div><div class='add'>+		struct request *rq = rq_list_pop(rqs);</div><div class='ctx'> </div><div class='ctx'> 		if (!this_hctx) {</div><div class='ctx'> 			this_hctx = rq-&gt;mq_hctx;</div><div class='hunk'>@@ -2848,9 +2899,9 @@ static void blk_mq_dispatch_plug_list(struct blk_plug *plug, bool from_sched)</div><div class='ctx'> 		}</div><div class='ctx'> 		list_add_tail(&amp;rq-&gt;queuelist, &amp;list);</div><div class='ctx'> 		depth++;</div><div class='del'>-	} while (!rq_list_empty(&amp;plug-&gt;mq_list));</div><div class='add'>+	} while (!rq_list_empty(rqs));</div><div class='ctx'> </div><div class='del'>-	plug-&gt;mq_list = requeue_list;</div><div class='add'>+	*rqs = requeue_list;</div><div class='ctx'> 	trace_block_unplug(this_hctx-&gt;queue, depth, !from_sched);</div><div class='ctx'> </div><div class='ctx'> 	percpu_ref_get(&amp;this_hctx-&gt;queue-&gt;q_usage_counter);</div><div class='hunk'>@@ -2870,9 +2921,21 @@ static void blk_mq_dispatch_plug_list(struct blk_plug *plug, bool from_sched)</div><div class='ctx'> 	percpu_ref_put(&amp;this_hctx-&gt;queue-&gt;q_usage_counter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void blk_mq_dispatch_multiple_queue_requests(struct rq_list *rqs)</div><div class='add'>+{</div><div class='add'>+	do {</div><div class='add'>+		struct rq_list queue_rqs;</div><div class='add'>+		unsigned depth;</div><div class='add'>+</div><div class='add'>+		depth = blk_mq_extract_queue_requests(rqs, &amp;queue_rqs);</div><div class='add'>+		blk_mq_dispatch_queue_requests(&amp;queue_rqs, depth);</div><div class='add'>+		while (!rq_list_empty(&amp;queue_rqs))</div><div class='add'>+			blk_mq_dispatch_list(&amp;queue_rqs, false);</div><div class='add'>+	} while (!rq_list_empty(rqs));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule)</div><div class='ctx'> {</div><div class='del'>-	struct request *rq;</div><div class='ctx'> 	unsigned int depth;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2887,34 +2950,19 @@ void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule)</div><div class='ctx'> 	depth = plug-&gt;rq_count;</div><div class='ctx'> 	plug-&gt;rq_count = 0;</div><div class='ctx'> </div><div class='del'>-	if (!plug-&gt;multiple_queues &amp;&amp; !plug-&gt;has_elevator &amp;&amp; !from_schedule) {</div><div class='del'>-		struct request_queue *q;</div><div class='del'>-</div><div class='del'>-		rq = rq_list_peek(&amp;plug-&gt;mq_list);</div><div class='del'>-		q = rq-&gt;q;</div><div class='del'>-		trace_block_unplug(q, depth, true);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Peek first request and see if we have a -&gt;queue_rqs() hook.</div><div class='del'>-		 * If we do, we can dispatch the whole plug list in one go. We</div><div class='del'>-		 * already know at this point that all requests belong to the</div><div class='del'>-		 * same queue, caller must ensure that's the case.</div><div class='del'>-		 */</div><div class='del'>-		if (q-&gt;mq_ops-&gt;queue_rqs) {</div><div class='del'>-			blk_mq_run_dispatch_ops(q,</div><div class='del'>-				__blk_mq_flush_plug_list(q, plug));</div><div class='del'>-			if (rq_list_empty(&amp;plug-&gt;mq_list))</div><div class='del'>-				return;</div><div class='add'>+	if (!plug-&gt;has_elevator &amp;&amp; !from_schedule) {</div><div class='add'>+		if (plug-&gt;multiple_queues) {</div><div class='add'>+			blk_mq_dispatch_multiple_queue_requests(&amp;plug-&gt;mq_list);</div><div class='add'>+			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		blk_mq_run_dispatch_ops(q,</div><div class='del'>-				blk_mq_plug_issue_direct(plug));</div><div class='add'>+		blk_mq_dispatch_queue_requests(&amp;plug-&gt;mq_list, depth);</div><div class='ctx'> 		if (rq_list_empty(&amp;plug-&gt;mq_list))</div><div class='ctx'> 			return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		blk_mq_dispatch_plug_list(plug, from_schedule);</div><div class='add'>+		blk_mq_dispatch_list(&amp;plug-&gt;mq_list, from_schedule);</div><div class='ctx'> 	} while (!rq_list_empty(&amp;plug-&gt;mq_list));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2969,8 +3017,14 @@ static struct request *blk_mq_get_new_requests(struct request_queue *q,</div><div class='ctx'> {</div><div class='ctx'> 	struct blk_mq_alloc_data data = {</div><div class='ctx'> 		.q		= q,</div><div class='del'>-		.nr_tags	= 1,</div><div class='add'>+		.flags		= 0,</div><div class='add'>+		.shallow_depth	= 0,</div><div class='ctx'> 		.cmd_flags	= bio-&gt;bi_opf,</div><div class='add'>+		.rq_flags	= 0,</div><div class='add'>+		.nr_tags	= 1,</div><div class='add'>+		.cached_rqs	= NULL,</div><div class='add'>+		.ctx		= NULL,</div><div class='add'>+		.hctx		= NULL</div><div class='ctx'> 	};</div><div class='ctx'> 	struct request *rq;</div><div class='ctx'> </div><div class='hunk'>@@ -3080,8 +3134,6 @@ void blk_mq_submit_bio(struct bio *bio)</div><div class='ctx'> 		goto new_request;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bio = blk_queue_bounce(bio, q);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The cached request already holds a q_usage_counter reference and we</div><div class='ctx'> 	 * don't have to acquire a new one if we use it.</div><div class='hunk'>@@ -4094,8 +4146,6 @@ static void blk_mq_map_swqueue(struct request_queue *q)</div><div class='ctx'> 	struct blk_mq_ctx *ctx;</div><div class='ctx'> 	struct blk_mq_tag_set *set = q-&gt;tag_set;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-</div><div class='ctx'> 	queue_for_each_hw_ctx(q, hctx, i) {</div><div class='ctx'> 		cpumask_clear(hctx-&gt;cpumask);</div><div class='ctx'> 		hctx-&gt;nr_ctx = 0;</div><div class='hunk'>@@ -4200,8 +4250,6 @@ static void blk_mq_map_swqueue(struct request_queue *q)</div><div class='ctx'> 		hctx-&gt;next_cpu = blk_mq_first_mapped_cpu(hctx);</div><div class='ctx'> 		hctx-&gt;next_cpu_batch = BLK_MQ_CPU_WORK_BATCH;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -4505,16 +4553,9 @@ static void __blk_mq_realloc_hw_ctxs(struct blk_mq_tag_set *set,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void blk_mq_realloc_hw_ctxs(struct blk_mq_tag_set *set,</div><div class='del'>-				   struct request_queue *q, bool lock)</div><div class='add'>+				   struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	if (lock) {</div><div class='del'>-		/* protect against switching io scheduler  */</div><div class='del'>-		mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-		__blk_mq_realloc_hw_ctxs(set, q);</div><div class='del'>-		mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='del'>-	} else {</div><div class='del'>-		__blk_mq_realloc_hw_ctxs(set, q);</div><div class='del'>-	}</div><div class='add'>+	__blk_mq_realloc_hw_ctxs(set, q);</div><div class='ctx'> </div><div class='ctx'> 	/* unregister cpuhp callbacks for exited hctxs */</div><div class='ctx'> 	blk_mq_remove_hw_queues_cpuhp(q);</div><div class='hunk'>@@ -4546,7 +4587,7 @@ int blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,</div><div class='ctx'> </div><div class='ctx'> 	xa_init(&amp;q-&gt;hctx_table);</div><div class='ctx'> </div><div class='del'>-	blk_mq_realloc_hw_ctxs(set, q, false);</div><div class='add'>+	blk_mq_realloc_hw_ctxs(set, q);</div><div class='ctx'> 	if (!q-&gt;nr_hw_queues)</div><div class='ctx'> 		goto err_hctxs;</div><div class='ctx'> </div><div class='hunk'>@@ -4563,8 +4604,8 @@ int blk_mq_init_allocated_queue(struct blk_mq_tag_set *set,</div><div class='ctx'> 	q-&gt;nr_requests = set-&gt;queue_depth;</div><div class='ctx'> </div><div class='ctx'> 	blk_mq_init_cpu_queues(q, set-&gt;nr_hw_queues);</div><div class='del'>-	blk_mq_add_queue_tag_set(set, q);</div><div class='ctx'> 	blk_mq_map_swqueue(q);</div><div class='add'>+	blk_mq_add_queue_tag_set(set, q);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_hctxs:</div><div class='hunk'>@@ -4784,6 +4825,8 @@ int blk_mq_alloc_tag_set(struct blk_mq_tag_set *set)</div><div class='ctx'> 			goto out_free_srcu;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	init_rwsem(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+</div><div class='ctx'> 	ret = -ENOMEM;</div><div class='ctx'> 	set-&gt;tags = kcalloc_node(set-&gt;nr_hw_queues,</div><div class='ctx'> 				 sizeof(struct blk_mq_tags *), GFP_KERNEL,</div><div class='hunk'>@@ -4923,88 +4966,10 @@ int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * request_queue and elevator_type pair.</div><div class='del'>- * It is just used by __blk_mq_update_nr_hw_queues to cache</div><div class='del'>- * the elevator_type associated with a request_queue.</div><div class='del'>- */</div><div class='del'>-struct blk_mq_qe_pair {</div><div class='del'>-	struct list_head node;</div><div class='del'>-	struct request_queue *q;</div><div class='del'>-	struct elevator_type *type;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Cache the elevator_type in qe pair list and switch the</div><div class='del'>- * io scheduler to 'none'</div><div class='del'>- */</div><div class='del'>-static bool blk_mq_elv_switch_none(struct list_head *head,</div><div class='del'>-		struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	struct blk_mq_qe_pair *qe;</div><div class='del'>-</div><div class='del'>-	qe = kmalloc(sizeof(*qe), GFP_NOIO | __GFP_NOWARN | __GFP_NORETRY);</div><div class='del'>-	if (!qe)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* Accessing q-&gt;elevator needs protection from -&gt;elevator_lock. */</div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-</div><div class='del'>-	if (!q-&gt;elevator) {</div><div class='del'>-		kfree(qe);</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;qe-&gt;node);</div><div class='del'>-	qe-&gt;q = q;</div><div class='del'>-	qe-&gt;type = q-&gt;elevator-&gt;type;</div><div class='del'>-	/* keep a reference to the elevator module as we'll switch back */</div><div class='del'>-	__elevator_get(qe-&gt;type);</div><div class='del'>-	list_add(&amp;qe-&gt;node, head);</div><div class='del'>-	elevator_disable(q);</div><div class='del'>-unlock:</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct blk_mq_qe_pair *blk_lookup_qe_pair(struct list_head *head,</div><div class='del'>-						struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	struct blk_mq_qe_pair *qe;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(qe, head, node)</div><div class='del'>-		if (qe-&gt;q == q)</div><div class='del'>-			return qe;</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void blk_mq_elv_switch_back(struct list_head *head,</div><div class='del'>-				  struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	struct blk_mq_qe_pair *qe;</div><div class='del'>-	struct elevator_type *t;</div><div class='del'>-</div><div class='del'>-	qe = blk_lookup_qe_pair(head, q);</div><div class='del'>-	if (!qe)</div><div class='del'>-		return;</div><div class='del'>-	t = qe-&gt;type;</div><div class='del'>-	list_del(&amp;qe-&gt;node);</div><div class='del'>-	kfree(qe);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-	elevator_switch(q, t);</div><div class='del'>-	/* drop the reference acquired in blk_mq_elv_switch_none */</div><div class='del'>-	elevator_put(t);</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set,</div><div class='ctx'> 							int nr_hw_queues)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q;</div><div class='del'>-	LIST_HEAD(head);</div><div class='ctx'> 	int prev_nr_hw_queues = set-&gt;nr_hw_queues;</div><div class='ctx'> 	unsigned int memflags;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -5019,30 +4984,24 @@ static void __blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	memflags = memalloc_noio_save();</div><div class='del'>-	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list)</div><div class='del'>-		blk_mq_freeze_queue_nomemsave(q);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Switch IO scheduler to 'none', cleaning up the data associated</div><div class='del'>-	 * with the previous scheduler. We will switch back once we are done</div><div class='del'>-	 * updating the new sw to hw queue mappings.</div><div class='del'>-	 */</div><div class='del'>-	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list)</div><div class='del'>-		if (!blk_mq_elv_switch_none(&amp;head, q))</div><div class='del'>-			goto switch_back;</div><div class='del'>-</div><div class='ctx'> 	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list) {</div><div class='ctx'> 		blk_mq_debugfs_unregister_hctxs(q);</div><div class='ctx'> 		blk_mq_sysfs_unregister_hctxs(q);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (blk_mq_realloc_tag_set_tags(set, nr_hw_queues) &lt; 0)</div><div class='add'>+	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list)</div><div class='add'>+		blk_mq_freeze_queue_nomemsave(q);</div><div class='add'>+</div><div class='add'>+	if (blk_mq_realloc_tag_set_tags(set, nr_hw_queues) &lt; 0) {</div><div class='add'>+		list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list)</div><div class='add'>+			blk_mq_unfreeze_queue_nomemrestore(q);</div><div class='ctx'> 		goto reregister;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> fallback:</div><div class='ctx'> 	blk_mq_update_queue_map(set);</div><div class='ctx'> 	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list) {</div><div class='del'>-		blk_mq_realloc_hw_ctxs(set, q, true);</div><div class='add'>+		__blk_mq_realloc_hw_ctxs(set, q);</div><div class='ctx'> </div><div class='ctx'> 		if (q-&gt;nr_hw_queues != set-&gt;nr_hw_queues) {</div><div class='ctx'> 			int i = prev_nr_hw_queues;</div><div class='hunk'>@@ -5058,18 +5017,18 @@ fallback:</div><div class='ctx'> 		blk_mq_map_swqueue(q);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* elv_update_nr_hw_queues() unfreeze queue for us */</div><div class='add'>+	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list)</div><div class='add'>+		elv_update_nr_hw_queues(q);</div><div class='add'>+</div><div class='ctx'> reregister:</div><div class='ctx'> 	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list) {</div><div class='ctx'> 		blk_mq_sysfs_register_hctxs(q);</div><div class='ctx'> 		blk_mq_debugfs_register_hctxs(q);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-switch_back:</div><div class='del'>-	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list)</div><div class='del'>-		blk_mq_elv_switch_back(&amp;head, q);</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(q, &amp;set-&gt;tag_list, tag_set_list)</div><div class='del'>-		blk_mq_unfreeze_queue_nomemrestore(q);</div><div class='add'>+		blk_mq_remove_hw_queues_cpuhp(q);</div><div class='add'>+		blk_mq_add_hw_queues_cpuhp(q);</div><div class='add'>+	}</div><div class='ctx'> 	memalloc_noio_restore(memflags);</div><div class='ctx'> </div><div class='ctx'> 	/* Free the excess tags when nr_hw_queues shrink. */</div><div class='hunk'>@@ -5079,9 +5038,11 @@ switch_back:</div><div class='ctx'> </div><div class='ctx'> void blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set, int nr_hw_queues)</div><div class='ctx'> {</div><div class='add'>+	down_write(&amp;set-&gt;update_nr_hwq_lock);</div><div class='ctx'> 	mutex_lock(&amp;set-&gt;tag_list_lock);</div><div class='ctx'> 	__blk_mq_update_nr_hw_queues(set, nr_hw_queues);</div><div class='ctx'> 	mutex_unlock(&amp;set-&gt;tag_list_lock);</div><div class='add'>+	up_write(&amp;set-&gt;update_nr_hwq_lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_mq_update_nr_hw_queues);</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-mq.h b/block/blk-mq.h<br/>index 3011a78cf16a..affb2e14b56e 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-mq.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-mq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-mq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-mq.h</a></div><div class='hunk'>@@ -48,7 +48,7 @@ void blk_mq_exit_queue(struct request_queue *q);</div><div class='ctx'> int blk_mq_update_nr_requests(struct request_queue *q, unsigned int nr);</div><div class='ctx'> void blk_mq_wake_waiters(struct request_queue *q);</div><div class='ctx'> bool blk_mq_dispatch_rq_list(struct blk_mq_hw_ctx *hctx, struct list_head *,</div><div class='del'>-			     unsigned int);</div><div class='add'>+			     bool);</div><div class='ctx'> void blk_mq_flush_busy_ctxs(struct blk_mq_hw_ctx *hctx, struct list_head *list);</div><div class='ctx'> struct request *blk_mq_dequeue_from_ctx(struct blk_mq_hw_ctx *hctx,</div><div class='ctx'> 					struct blk_mq_ctx *start);</div><div class='hunk'>@@ -246,10 +246,7 @@ static inline bool blk_mq_hw_queue_mapped(struct blk_mq_hw_ctx *hctx)</div><div class='ctx'> 	return hctx-&gt;nr_ctx &amp;&amp; hctx-&gt;tags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int blk_mq_in_flight(struct request_queue *q,</div><div class='del'>-		struct block_device *part);</div><div class='del'>-void blk_mq_in_flight_rw(struct request_queue *q, struct block_device *part,</div><div class='del'>-		unsigned int inflight[2]);</div><div class='add'>+void blk_mq_in_driver_rw(struct block_device *part, unsigned int inflight[2]);</div><div class='ctx'> </div><div class='ctx'> static inline void blk_mq_put_dispatch_budget(struct request_queue *q,</div><div class='ctx'> 					      int budget_token)</div><div class='head'>diff --git a/block/blk-rq-qos.c b/block/blk-rq-qos.c<br/>index 95982bc46ba1..848591fb3c57 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-rq-qos.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-rq-qos.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-rq-qos.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-rq-qos.c</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "blk-rq-qos.h"</div><div class='ctx'> </div><div class='add'>+__read_mostly DEFINE_STATIC_KEY_FALSE(block_rq_qos);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Increment 'v', if 'v' is below 'below'. Returns true if we succeeded,</div><div class='ctx'>  * false if 'v' + 1 would be bigger than 'below'.</div><div class='hunk'>@@ -317,6 +319,7 @@ void rq_qos_exit(struct request_queue *q)</div><div class='ctx'> 		struct rq_qos *rqos = q-&gt;rq_qos;</div><div class='ctx'> 		q-&gt;rq_qos = rqos-&gt;next;</div><div class='ctx'> 		rqos-&gt;ops-&gt;exit(rqos);</div><div class='add'>+		static_branch_dec(&amp;block_rq_qos);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;q-&gt;rq_qos_mutex);</div><div class='ctx'> }</div><div class='hunk'>@@ -343,6 +346,7 @@ int rq_qos_add(struct rq_qos *rqos, struct gendisk *disk, enum rq_qos_id id,</div><div class='ctx'> 		goto ebusy;</div><div class='ctx'> 	rqos-&gt;next = q-&gt;rq_qos;</div><div class='ctx'> 	q-&gt;rq_qos = rqos;</div><div class='add'>+	static_branch_inc(&amp;block_rq_qos);</div><div class='ctx'> </div><div class='ctx'> 	blk_mq_unfreeze_queue(q, memflags);</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-rq-qos.h b/block/blk-rq-qos.h<br/>index 37245c97ee61..39749f4066fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-rq-qos.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-rq-qos.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-rq-qos.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-rq-qos.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include "blk-mq-debugfs.h"</div><div class='ctx'> </div><div class='ctx'> struct blk_mq_debugfs_attr;</div><div class='add'>+extern struct static_key_false block_rq_qos;</div><div class='ctx'> </div><div class='ctx'> enum rq_qos_id {</div><div class='ctx'> 	RQ_QOS_WBT,</div><div class='hunk'>@@ -112,31 +113,33 @@ void __rq_qos_queue_depth_changed(struct rq_qos *rqos);</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_cleanup(struct request_queue *q, struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos)</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos)</div><div class='ctx'> 		__rq_qos_cleanup(q-&gt;rq_qos, bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_done(struct request_queue *q, struct request *rq)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos &amp;&amp; !blk_rq_is_passthrough(rq))</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos &amp;&amp;</div><div class='add'>+	    !blk_rq_is_passthrough(rq))</div><div class='ctx'> 		__rq_qos_done(q-&gt;rq_qos, rq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_issue(struct request_queue *q, struct request *rq)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos)</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos)</div><div class='ctx'> 		__rq_qos_issue(q-&gt;rq_qos, rq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_requeue(struct request_queue *q, struct request *rq)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos)</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos)</div><div class='ctx'> 		__rq_qos_requeue(q-&gt;rq_qos, rq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_done_bio(struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	if (bio-&gt;bi_bdev &amp;&amp; (bio_flagged(bio, BIO_QOS_THROTTLED) ||</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp;</div><div class='add'>+	    bio-&gt;bi_bdev &amp;&amp; (bio_flagged(bio, BIO_QOS_THROTTLED) ||</div><div class='ctx'> 			     bio_flagged(bio, BIO_QOS_MERGED))) {</div><div class='ctx'> 		struct request_queue *q = bdev_get_queue(bio-&gt;bi_bdev);</div><div class='ctx'> 		if (q-&gt;rq_qos)</div><div class='hunk'>@@ -146,7 +149,7 @@ static inline void rq_qos_done_bio(struct bio *bio)</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_throttle(struct request_queue *q, struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos) {</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos) {</div><div class='ctx'> 		bio_set_flag(bio, BIO_QOS_THROTTLED);</div><div class='ctx'> 		__rq_qos_throttle(q-&gt;rq_qos, bio);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -155,14 +158,14 @@ static inline void rq_qos_throttle(struct request_queue *q, struct bio *bio)</div><div class='ctx'> static inline void rq_qos_track(struct request_queue *q, struct request *rq,</div><div class='ctx'> 				struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos)</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos)</div><div class='ctx'> 		__rq_qos_track(q-&gt;rq_qos, rq, bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_merge(struct request_queue *q, struct request *rq,</div><div class='ctx'> 				struct bio *bio)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos) {</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos) {</div><div class='ctx'> 		bio_set_flag(bio, BIO_QOS_MERGED);</div><div class='ctx'> 		__rq_qos_merge(q-&gt;rq_qos, rq, bio);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -170,7 +173,7 @@ static inline void rq_qos_merge(struct request_queue *q, struct request *rq,</div><div class='ctx'> </div><div class='ctx'> static inline void rq_qos_queue_depth_changed(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	if (q-&gt;rq_qos)</div><div class='add'>+	if (static_branch_unlikely(&amp;block_rq_qos) &amp;&amp; q-&gt;rq_qos)</div><div class='ctx'> 		__rq_qos_queue_depth_changed(q-&gt;rq_qos);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-settings.c b/block/blk-settings.c<br/>index 6b2dbe645d23..a000daafbfb4 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-settings.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-settings.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-settings.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-settings.c</a></div><div class='hunk'>@@ -61,8 +61,14 @@ void blk_apply_bdi_limits(struct backing_dev_info *bdi,</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * For read-ahead of large files to be effective, we need to read ahead</div><div class='ctx'> 	 * at least twice the optimal I/O size.</div><div class='add'>+	 *</div><div class='add'>+	 * There is no hardware limitation for the read-ahead size and the user</div><div class='add'>+	 * might have increased the read-ahead size through sysfs, so don't ever</div><div class='add'>+	 * decrease it.</div><div class='ctx'> 	 */</div><div class='del'>-	bdi-&gt;ra_pages = max(lim-&gt;io_opt * 2 / PAGE_SIZE, VM_READAHEAD_PAGES);</div><div class='add'>+	bdi-&gt;ra_pages = max3(bdi-&gt;ra_pages,</div><div class='add'>+				lim-&gt;io_opt * 2 / PAGE_SIZE,</div><div class='add'>+				VM_READAHEAD_PAGES);</div><div class='ctx'> 	bdi-&gt;io_pages = lim-&gt;max_sectors &gt;&gt; PAGE_SECTORS_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -118,11 +124,6 @@ static int blk_validate_integrity_limits(struct queue_limits *lim)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (lim-&gt;features &amp; BLK_FEAT_BOUNCE_HIGH) {</div><div class='del'>-		pr_warn("no bounce buffer support for integrity metadata\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY)) {</div><div class='ctx'> 		pr_warn("integrity support disabled.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/block/blk-sysfs.c b/block/blk-sysfs.c<br/>index a2882751f0d2..b2b9b89d6967 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-sysfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-sysfs.c</a></div><div class='hunk'>@@ -134,6 +134,8 @@ QUEUE_SYSFS_LIMIT_SHOW(max_segments)</div><div class='ctx'> QUEUE_SYSFS_LIMIT_SHOW(max_discard_segments)</div><div class='ctx'> QUEUE_SYSFS_LIMIT_SHOW(max_integrity_segments)</div><div class='ctx'> QUEUE_SYSFS_LIMIT_SHOW(max_segment_size)</div><div class='add'>+QUEUE_SYSFS_LIMIT_SHOW(max_write_streams)</div><div class='add'>+QUEUE_SYSFS_LIMIT_SHOW(write_stream_granularity)</div><div class='ctx'> QUEUE_SYSFS_LIMIT_SHOW(logical_block_size)</div><div class='ctx'> QUEUE_SYSFS_LIMIT_SHOW(physical_block_size)</div><div class='ctx'> QUEUE_SYSFS_LIMIT_SHOW(chunk_sectors)</div><div class='hunk'>@@ -488,6 +490,8 @@ QUEUE_LIM_RO_ENTRY(queue_max_hw_sectors, "max_hw_sectors_kb");</div><div class='ctx'> QUEUE_LIM_RO_ENTRY(queue_max_segments, "max_segments");</div><div class='ctx'> QUEUE_LIM_RO_ENTRY(queue_max_integrity_segments, "max_integrity_segments");</div><div class='ctx'> QUEUE_LIM_RO_ENTRY(queue_max_segment_size, "max_segment_size");</div><div class='add'>+QUEUE_LIM_RO_ENTRY(queue_max_write_streams, "max_write_streams");</div><div class='add'>+QUEUE_LIM_RO_ENTRY(queue_write_stream_granularity, "write_stream_granularity");</div><div class='ctx'> QUEUE_RW_ENTRY(elv_iosched, "scheduler");</div><div class='ctx'> </div><div class='ctx'> QUEUE_LIM_RO_ENTRY(queue_logical_block_size, "logical_block_size");</div><div class='hunk'>@@ -560,7 +564,7 @@ static ssize_t queue_wb_lat_show(struct gendisk *disk, char *page)</div><div class='ctx'> 	ssize_t ret;</div><div class='ctx'> 	struct request_queue *q = disk-&gt;queue;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='add'>+	mutex_lock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> 	if (!wbt_rq_qos(q)) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -573,7 +577,7 @@ static ssize_t queue_wb_lat_show(struct gendisk *disk, char *page)</div><div class='ctx'> </div><div class='ctx'> 	ret = sysfs_emit(page, "%llu\n", div_u64(wbt_get_min_lat(q), 1000));</div><div class='ctx'> out:</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='add'>+	mutex_unlock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -593,7 +597,6 @@ static ssize_t queue_wb_lat_store(struct gendisk *disk, const char *page,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	memflags = blk_mq_freeze_queue(q);</div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='ctx'> </div><div class='ctx'> 	rqos = wbt_rq_qos(q);</div><div class='ctx'> 	if (!rqos) {</div><div class='hunk'>@@ -618,11 +621,12 @@ static ssize_t queue_wb_lat_store(struct gendisk *disk, const char *page,</div><div class='ctx'> 	 */</div><div class='ctx'> 	blk_mq_quiesce_queue(q);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> 	wbt_set_min_lat(q, val);</div><div class='add'>+	mutex_unlock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> </div><div class='ctx'> 	blk_mq_unquiesce_queue(q);</div><div class='ctx'> out:</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='ctx'> 	blk_mq_unfreeze_queue(q, memflags);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -642,6 +646,8 @@ static struct attribute *queue_attrs[] = {</div><div class='ctx'> 	&amp;queue_max_discard_segments_entry.attr,</div><div class='ctx'> 	&amp;queue_max_integrity_segments_entry.attr,</div><div class='ctx'> 	&amp;queue_max_segment_size_entry.attr,</div><div class='add'>+	&amp;queue_max_write_streams_entry.attr,</div><div class='add'>+	&amp;queue_write_stream_granularity_entry.attr,</div><div class='ctx'> 	&amp;queue_hw_sector_size_entry.attr,</div><div class='ctx'> 	&amp;queue_logical_block_size_entry.attr,</div><div class='ctx'> 	&amp;queue_physical_block_size_entry.attr,</div><div class='hunk'>@@ -869,16 +875,9 @@ int blk_register_queue(struct gendisk *disk)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_unregister_ia_ranges;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-	if (q-&gt;elevator) {</div><div class='del'>-		ret = elv_register_queue(q, false);</div><div class='del'>-		if (ret) {</div><div class='del'>-			mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='del'>-			goto out_crypto_sysfs_unregister;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (queue_is_mq(q))</div><div class='add'>+		elevator_set_default(q);</div><div class='ctx'> 	wbt_enable_default(disk);</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='ctx'> </div><div class='ctx'> 	blk_queue_flag_set(QUEUE_FLAG_REGISTERED, q);</div><div class='ctx'> </div><div class='hunk'>@@ -902,13 +901,13 @@ int blk_register_queue(struct gendisk *disk)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='del'>-out_crypto_sysfs_unregister:</div><div class='del'>-	blk_crypto_sysfs_unregister(disk);</div><div class='ctx'> out_unregister_ia_ranges:</div><div class='ctx'> 	disk_unregister_independent_access_ranges(disk);</div><div class='ctx'> out_debugfs_remove:</div><div class='ctx'> 	blk_debugfs_remove(disk);</div><div class='ctx'> 	mutex_unlock(&amp;q-&gt;sysfs_lock);</div><div class='add'>+	if (queue_is_mq(q))</div><div class='add'>+		blk_mq_sysfs_unregister(disk);</div><div class='ctx'> out_put_queue_kobj:</div><div class='ctx'> 	kobject_put(&amp;disk-&gt;queue_kobj);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -949,10 +948,6 @@ void blk_unregister_queue(struct gendisk *disk)</div><div class='ctx'> 		blk_mq_sysfs_unregister(disk);</div><div class='ctx'> 	blk_crypto_sysfs_unregister(disk);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-	elv_unregister_queue(q);</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;q-&gt;sysfs_lock);</div><div class='ctx'> 	disk_unregister_independent_access_ranges(disk);</div><div class='ctx'> 	mutex_unlock(&amp;q-&gt;sysfs_lock);</div><div class='hunk'>@@ -961,5 +956,8 @@ void blk_unregister_queue(struct gendisk *disk)</div><div class='ctx'> 	kobject_uevent(&amp;disk-&gt;queue_kobj, KOBJ_REMOVE);</div><div class='ctx'> 	kobject_del(&amp;disk-&gt;queue_kobj);</div><div class='ctx'> </div><div class='add'>+	if (queue_is_mq(q))</div><div class='add'>+		elevator_set_none(q);</div><div class='add'>+</div><div class='ctx'> 	blk_debugfs_remove(disk);</div><div class='ctx'> }</div><div class='head'>diff --git a/block/blk-throttle.c b/block/blk-throttle.c<br/>index d6dd2e047874..bd15357f23bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-throttle.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-throttle.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-throttle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-throttle.c</a></div><div class='hunk'>@@ -143,7 +143,8 @@ static inline unsigned int throtl_bio_data_size(struct bio *bio)</div><div class='ctx'> static void throtl_qnode_init(struct throtl_qnode *qn, struct throtl_grp *tg)</div><div class='ctx'> {</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;qn-&gt;node);</div><div class='del'>-	bio_list_init(&amp;qn-&gt;bios);</div><div class='add'>+	bio_list_init(&amp;qn-&gt;bios_bps);</div><div class='add'>+	bio_list_init(&amp;qn-&gt;bios_iops);</div><div class='ctx'> 	qn-&gt;tg = tg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -151,18 +152,32 @@ static void throtl_qnode_init(struct throtl_qnode *qn, struct throtl_grp *tg)</div><div class='ctx'>  * throtl_qnode_add_bio - add a bio to a throtl_qnode and activate it</div><div class='ctx'>  * @bio: bio being added</div><div class='ctx'>  * @qn: qnode to add bio to</div><div class='del'>- * @queued: the service_queue-&gt;queued[] list @qn belongs to</div><div class='add'>+ * @sq: the service_queue @qn belongs to</div><div class='ctx'>  *</div><div class='del'>- * Add @bio to @qn and put @qn on @queued if it's not already on.</div><div class='add'>+ * Add @bio to @qn and put @qn on @sq-&gt;queued if it's not already on.</div><div class='ctx'>  * @qn-&gt;tg's reference count is bumped when @qn is activated.  See the</div><div class='ctx'>  * comment on top of throtl_qnode definition for details.</div><div class='ctx'>  */</div><div class='ctx'> static void throtl_qnode_add_bio(struct bio *bio, struct throtl_qnode *qn,</div><div class='del'>-				 struct list_head *queued)</div><div class='add'>+				 struct throtl_service_queue *sq)</div><div class='ctx'> {</div><div class='del'>-	bio_list_add(&amp;qn-&gt;bios, bio);</div><div class='add'>+	bool rw = bio_data_dir(bio);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Split bios have already been throttled by bps, so they are</div><div class='add'>+	 * directly queued into the iops path.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_flagged(bio, BIO_TG_BPS_THROTTLED) ||</div><div class='add'>+	    bio_flagged(bio, BIO_BPS_THROTTLED)) {</div><div class='add'>+		bio_list_add(&amp;qn-&gt;bios_iops, bio);</div><div class='add'>+		sq-&gt;nr_queued_iops[rw]++;</div><div class='add'>+	} else {</div><div class='add'>+		bio_list_add(&amp;qn-&gt;bios_bps, bio);</div><div class='add'>+		sq-&gt;nr_queued_bps[rw]++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (list_empty(&amp;qn-&gt;node)) {</div><div class='del'>-		list_add_tail(&amp;qn-&gt;node, queued);</div><div class='add'>+		list_add_tail(&amp;qn-&gt;node, &amp;sq-&gt;queued[rw]);</div><div class='ctx'> 		blkg_get(tg_to_blkg(qn-&gt;tg));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -170,6 +185,10 @@ static void throtl_qnode_add_bio(struct bio *bio, struct throtl_qnode *qn,</div><div class='ctx'> /**</div><div class='ctx'>  * throtl_peek_queued - peek the first bio on a qnode list</div><div class='ctx'>  * @queued: the qnode list to peek</div><div class='add'>+ *</div><div class='add'>+ * Always take a bio from the head of the iops queue first. If the queue is</div><div class='add'>+ * empty, we then take it from the bps queue to maintain the overall idea of</div><div class='add'>+ * fetching bios from the head.</div><div class='ctx'>  */</div><div class='ctx'> static struct bio *throtl_peek_queued(struct list_head *queued)</div><div class='ctx'> {</div><div class='hunk'>@@ -180,28 +199,33 @@ static struct bio *throtl_peek_queued(struct list_head *queued)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	qn = list_first_entry(queued, struct throtl_qnode, node);</div><div class='del'>-	bio = bio_list_peek(&amp;qn-&gt;bios);</div><div class='add'>+	bio = bio_list_peek(&amp;qn-&gt;bios_iops);</div><div class='add'>+	if (!bio)</div><div class='add'>+		bio = bio_list_peek(&amp;qn-&gt;bios_bps);</div><div class='ctx'> 	WARN_ON_ONCE(!bio);</div><div class='ctx'> 	return bio;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * throtl_pop_queued - pop the first bio form a qnode list</div><div class='del'>- * @queued: the qnode list to pop a bio from</div><div class='add'>+ * @sq: the service_queue to pop a bio from</div><div class='ctx'>  * @tg_to_put: optional out argument for throtl_grp to put</div><div class='add'>+ * @rw: read/write</div><div class='ctx'>  *</div><div class='del'>- * Pop the first bio from the qnode list @queued.  After popping, the first</div><div class='del'>- * qnode is removed from @queued if empty or moved to the end of @queued so</div><div class='del'>- * that the popping order is round-robin.</div><div class='add'>+ * Pop the first bio from the qnode list @sq-&gt;queued. Note that we firstly</div><div class='add'>+ * focus on the iops list because bios are ultimately dispatched from it.</div><div class='add'>+ * After popping, the first qnode is removed from @sq-&gt;queued if empty or moved</div><div class='add'>+ * to the end of @sq-&gt;queued so that the popping order is round-robin.</div><div class='ctx'>  *</div><div class='ctx'>  * When the first qnode is removed, its associated throtl_grp should be put</div><div class='ctx'>  * too.  If @tg_to_put is NULL, this function automatically puts it;</div><div class='ctx'>  * otherwise, *@tg_to_put is set to the throtl_grp to put and the caller is</div><div class='ctx'>  * responsible for putting it.</div><div class='ctx'>  */</div><div class='del'>-static struct bio *throtl_pop_queued(struct list_head *queued,</div><div class='del'>-				     struct throtl_grp **tg_to_put)</div><div class='add'>+static struct bio *throtl_pop_queued(struct throtl_service_queue *sq,</div><div class='add'>+				     struct throtl_grp **tg_to_put, bool rw)</div><div class='ctx'> {</div><div class='add'>+	struct list_head *queued = &amp;sq-&gt;queued[rw];</div><div class='ctx'> 	struct throtl_qnode *qn;</div><div class='ctx'> 	struct bio *bio;</div><div class='ctx'> </div><div class='hunk'>@@ -209,10 +233,17 @@ static struct bio *throtl_pop_queued(struct list_head *queued,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	qn = list_first_entry(queued, struct throtl_qnode, node);</div><div class='del'>-	bio = bio_list_pop(&amp;qn-&gt;bios);</div><div class='add'>+	bio = bio_list_pop(&amp;qn-&gt;bios_iops);</div><div class='add'>+	if (bio) {</div><div class='add'>+		sq-&gt;nr_queued_iops[rw]--;</div><div class='add'>+	} else {</div><div class='add'>+		bio = bio_list_pop(&amp;qn-&gt;bios_bps);</div><div class='add'>+		if (bio)</div><div class='add'>+			sq-&gt;nr_queued_bps[rw]--;</div><div class='add'>+	}</div><div class='ctx'> 	WARN_ON_ONCE(!bio);</div><div class='ctx'> </div><div class='del'>-	if (bio_list_empty(&amp;qn-&gt;bios)) {</div><div class='add'>+	if (bio_list_empty(&amp;qn-&gt;bios_bps) &amp;&amp; bio_list_empty(&amp;qn-&gt;bios_iops)) {</div><div class='ctx'> 		list_del_init(&amp;qn-&gt;node);</div><div class='ctx'> 		if (tg_to_put)</div><div class='ctx'> 			*tg_to_put = qn-&gt;tg;</div><div class='hunk'>@@ -520,6 +551,9 @@ static inline void throtl_set_slice_end(struct throtl_grp *tg, bool rw,</div><div class='ctx'> static inline void throtl_extend_slice(struct throtl_grp *tg, bool rw,</div><div class='ctx'> 				       unsigned long jiffy_end)</div><div class='ctx'> {</div><div class='add'>+	if (!time_before(tg-&gt;slice_end[rw], jiffy_end))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	throtl_set_slice_end(tg, rw, jiffy_end);</div><div class='ctx'> 	throtl_log(&amp;tg-&gt;service_queue,</div><div class='ctx'> 		   "[%c] extend slice start=%lu end=%lu jiffies=%lu",</div><div class='hunk'>@@ -536,6 +570,11 @@ static bool throtl_slice_used(struct throtl_grp *tg, bool rw)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int sq_queued(struct throtl_service_queue *sq, int type)</div><div class='add'>+{</div><div class='add'>+	return sq-&gt;nr_queued_bps[type] + sq-&gt;nr_queued_iops[type];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned int calculate_io_allowed(u32 iops_limit,</div><div class='ctx'> 					 unsigned long jiffy_elapsed)</div><div class='ctx'> {</div><div class='hunk'>@@ -571,6 +610,48 @@ static u64 calculate_bytes_allowed(u64 bps_limit, unsigned long jiffy_elapsed)</div><div class='ctx'> 	return mul_u64_u64_div_u64(bps_limit, (u64)jiffy_elapsed, (u64)HZ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static long long throtl_trim_bps(struct throtl_grp *tg, bool rw,</div><div class='add'>+				 unsigned long time_elapsed)</div><div class='add'>+{</div><div class='add'>+	u64 bps_limit = tg_bps_limit(tg, rw);</div><div class='add'>+	long long bytes_trim;</div><div class='add'>+</div><div class='add'>+	if (bps_limit == U64_MAX)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Need to consider the case of bytes_allowed overflow. */</div><div class='add'>+	bytes_trim = calculate_bytes_allowed(bps_limit, time_elapsed);</div><div class='add'>+	if (bytes_trim &lt;= 0 || tg-&gt;bytes_disp[rw] &lt; bytes_trim) {</div><div class='add'>+		bytes_trim = tg-&gt;bytes_disp[rw];</div><div class='add'>+		tg-&gt;bytes_disp[rw] = 0;</div><div class='add'>+	} else {</div><div class='add'>+		tg-&gt;bytes_disp[rw] -= bytes_trim;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bytes_trim;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int throtl_trim_iops(struct throtl_grp *tg, bool rw,</div><div class='add'>+			    unsigned long time_elapsed)</div><div class='add'>+{</div><div class='add'>+	u32 iops_limit = tg_iops_limit(tg, rw);</div><div class='add'>+	int io_trim;</div><div class='add'>+</div><div class='add'>+	if (iops_limit == UINT_MAX)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Need to consider the case of io_allowed overflow. */</div><div class='add'>+	io_trim = calculate_io_allowed(iops_limit, time_elapsed);</div><div class='add'>+	if (io_trim &lt;= 0 || tg-&gt;io_disp[rw] &lt; io_trim) {</div><div class='add'>+		io_trim = tg-&gt;io_disp[rw];</div><div class='add'>+		tg-&gt;io_disp[rw] = 0;</div><div class='add'>+	} else {</div><div class='add'>+		tg-&gt;io_disp[rw] -= io_trim;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return io_trim;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Trim the used slices and adjust slice start accordingly */</div><div class='ctx'> static inline void throtl_trim_slice(struct throtl_grp *tg, bool rw)</div><div class='ctx'> {</div><div class='hunk'>@@ -612,22 +693,11 @@ static inline void throtl_trim_slice(struct throtl_grp *tg, bool rw)</div><div class='ctx'> 	 * one extra slice is preserved for deviation.</div><div class='ctx'> 	 */</div><div class='ctx'> 	time_elapsed -= tg-&gt;td-&gt;throtl_slice;</div><div class='del'>-	bytes_trim = calculate_bytes_allowed(tg_bps_limit(tg, rw),</div><div class='del'>-					     time_elapsed);</div><div class='del'>-	io_trim = calculate_io_allowed(tg_iops_limit(tg, rw), time_elapsed);</div><div class='del'>-	if (bytes_trim &lt;= 0 &amp;&amp; io_trim &lt;= 0)</div><div class='add'>+	bytes_trim = throtl_trim_bps(tg, rw, time_elapsed);</div><div class='add'>+	io_trim = throtl_trim_iops(tg, rw, time_elapsed);</div><div class='add'>+	if (!bytes_trim &amp;&amp; !io_trim)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if ((long long)tg-&gt;bytes_disp[rw] &gt;= bytes_trim)</div><div class='del'>-		tg-&gt;bytes_disp[rw] -= bytes_trim;</div><div class='del'>-	else</div><div class='del'>-		tg-&gt;bytes_disp[rw] = 0;</div><div class='del'>-</div><div class='del'>-	if ((int)tg-&gt;io_disp[rw] &gt;= io_trim)</div><div class='del'>-		tg-&gt;io_disp[rw] -= io_trim;</div><div class='del'>-	else</div><div class='del'>-		tg-&gt;io_disp[rw] = 0;</div><div class='del'>-</div><div class='ctx'> 	tg-&gt;slice_start[rw] += time_elapsed;</div><div class='ctx'> </div><div class='ctx'> 	throtl_log(&amp;tg-&gt;service_queue,</div><div class='hunk'>@@ -643,21 +713,41 @@ static void __tg_update_carryover(struct throtl_grp *tg, bool rw,</div><div class='ctx'> 	unsigned long jiffy_elapsed = jiffies - tg-&gt;slice_start[rw];</div><div class='ctx'> 	u64 bps_limit = tg_bps_limit(tg, rw);</div><div class='ctx'> 	u32 iops_limit = tg_iops_limit(tg, rw);</div><div class='add'>+	long long bytes_allowed;</div><div class='add'>+	int io_allowed;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the queue is empty, carryover handling is not needed. In such cases,</div><div class='add'>+	 * tg-&gt;[bytes/io]_disp should be reset to 0 to avoid impacting the dispatch</div><div class='add'>+	 * of subsequent bios. The same handling applies when the previous BPS/IOPS</div><div class='add'>+	 * limit was set to max.</div><div class='add'>+	 */</div><div class='add'>+	if (sq_queued(&amp;tg-&gt;service_queue, rw) == 0) {</div><div class='add'>+		tg-&gt;bytes_disp[rw] = 0;</div><div class='add'>+		tg-&gt;io_disp[rw] = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If config is updated while bios are still throttled, calculate and</div><div class='del'>-	 * accumulate how many bytes/ios are waited across changes. And</div><div class='del'>-	 * carryover_bytes/ios will be used to calculate new wait time under new</div><div class='del'>-	 * configuration.</div><div class='add'>+	 * accumulate how many bytes/ios are waited across changes. And use the</div><div class='add'>+	 * calculated carryover (@bytes/@ios) to update [bytes/io]_disp, which</div><div class='add'>+	 * will be used to calculate new wait time under new configuration.</div><div class='add'>+	 * And we need to consider the case of bytes/io_allowed overflow.</div><div class='ctx'> 	 */</div><div class='del'>-	if (bps_limit != U64_MAX)</div><div class='del'>-		*bytes = calculate_bytes_allowed(bps_limit, jiffy_elapsed) -</div><div class='del'>-			tg-&gt;bytes_disp[rw];</div><div class='del'>-	if (iops_limit != UINT_MAX)</div><div class='del'>-		*ios = calculate_io_allowed(iops_limit, jiffy_elapsed) -</div><div class='del'>-			tg-&gt;io_disp[rw];</div><div class='del'>-	tg-&gt;bytes_disp[rw] -= *bytes;</div><div class='del'>-	tg-&gt;io_disp[rw] -= *ios;</div><div class='add'>+	if (bps_limit != U64_MAX) {</div><div class='add'>+		bytes_allowed = calculate_bytes_allowed(bps_limit, jiffy_elapsed);</div><div class='add'>+		if (bytes_allowed &gt; 0)</div><div class='add'>+			*bytes = bytes_allowed - tg-&gt;bytes_disp[rw];</div><div class='add'>+	}</div><div class='add'>+	if (iops_limit != UINT_MAX) {</div><div class='add'>+		io_allowed = calculate_io_allowed(iops_limit, jiffy_elapsed);</div><div class='add'>+		if (io_allowed &gt; 0)</div><div class='add'>+			*ios = io_allowed - tg-&gt;io_disp[rw];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tg-&gt;bytes_disp[rw] = -*bytes;</div><div class='add'>+	tg-&gt;io_disp[rw] = -*ios;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tg_update_carryover(struct throtl_grp *tg)</div><div class='hunk'>@@ -665,12 +755,10 @@ static void tg_update_carryover(struct throtl_grp *tg)</div><div class='ctx'> 	long long bytes[2] = {0};</div><div class='ctx'> 	int ios[2] = {0};</div><div class='ctx'> </div><div class='del'>-	if (tg-&gt;service_queue.nr_queued[READ])</div><div class='del'>-		__tg_update_carryover(tg, READ, &amp;bytes[READ], &amp;ios[READ]);</div><div class='del'>-	if (tg-&gt;service_queue.nr_queued[WRITE])</div><div class='del'>-		__tg_update_carryover(tg, WRITE, &amp;bytes[WRITE], &amp;ios[WRITE]);</div><div class='add'>+	__tg_update_carryover(tg, READ, &amp;bytes[READ], &amp;ios[READ]);</div><div class='add'>+	__tg_update_carryover(tg, WRITE, &amp;bytes[WRITE], &amp;ios[WRITE]);</div><div class='ctx'> </div><div class='del'>-	/* see comments in struct throtl_grp for meaning of these fields. */</div><div class='add'>+	/* see comments in struct throtl_grp for meaning of carryover. */</div><div class='ctx'> 	throtl_log(&amp;tg-&gt;service_queue, "%s: %lld %lld %d %d\n", __func__,</div><div class='ctx'> 		   bytes[READ], bytes[WRITE], ios[READ], ios[WRITE]);</div><div class='ctx'> }</div><div class='hunk'>@@ -682,10 +770,6 @@ static unsigned long tg_within_iops_limit(struct throtl_grp *tg, struct bio *bio</div><div class='ctx'> 	int io_allowed;</div><div class='ctx'> 	unsigned long jiffy_elapsed, jiffy_wait, jiffy_elapsed_rnd;</div><div class='ctx'> </div><div class='del'>-	if (iops_limit == UINT_MAX) {</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	jiffy_elapsed = jiffies - tg-&gt;slice_start[rw];</div><div class='ctx'> </div><div class='ctx'> 	/* Round up to the next throttle slice, wait time must be nonzero */</div><div class='hunk'>@@ -711,11 +795,6 @@ static unsigned long tg_within_bps_limit(struct throtl_grp *tg, struct bio *bio,</div><div class='ctx'> 	unsigned long jiffy_elapsed, jiffy_wait, jiffy_elapsed_rnd;</div><div class='ctx'> 	unsigned int bio_size = throtl_bio_data_size(bio);</div><div class='ctx'> </div><div class='del'>-	/* no need to throttle if this bio's bytes have been accounted */</div><div class='del'>-	if (bps_limit == U64_MAX || bio_flagged(bio, BIO_BPS_THROTTLED)) {</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	jiffy_elapsed = jiffy_elapsed_rnd = jiffies - tg-&gt;slice_start[rw];</div><div class='ctx'> </div><div class='ctx'> 	/* Slice has just started. Consider one slice interval */</div><div class='hunk'>@@ -724,7 +803,9 @@ static unsigned long tg_within_bps_limit(struct throtl_grp *tg, struct bio *bio,</div><div class='ctx'> </div><div class='ctx'> 	jiffy_elapsed_rnd = roundup(jiffy_elapsed_rnd, tg-&gt;td-&gt;throtl_slice);</div><div class='ctx'> 	bytes_allowed = calculate_bytes_allowed(bps_limit, jiffy_elapsed_rnd);</div><div class='del'>-	if (bytes_allowed &gt; 0 &amp;&amp; tg-&gt;bytes_disp[rw] + bio_size &lt;= bytes_allowed)</div><div class='add'>+	/* Need to consider the case of bytes_allowed overflow. */</div><div class='add'>+	if ((bytes_allowed &gt; 0 &amp;&amp; tg-&gt;bytes_disp[rw] + bio_size &lt;= bytes_allowed)</div><div class='add'>+	    || bytes_allowed &lt; 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Calc approx time to dispatch */</div><div class='hunk'>@@ -742,17 +823,82 @@ static unsigned long tg_within_bps_limit(struct throtl_grp *tg, struct bio *bio,</div><div class='ctx'> 	return jiffy_wait;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void throtl_charge_bps_bio(struct throtl_grp *tg, struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	unsigned int bio_size = throtl_bio_data_size(bio);</div><div class='add'>+</div><div class='add'>+	/* Charge the bio to the group */</div><div class='add'>+	if (!bio_flagged(bio, BIO_BPS_THROTTLED) &amp;&amp;</div><div class='add'>+	    !bio_flagged(bio, BIO_TG_BPS_THROTTLED)) {</div><div class='add'>+		bio_set_flag(bio, BIO_TG_BPS_THROTTLED);</div><div class='add'>+		tg-&gt;bytes_disp[bio_data_dir(bio)] += bio_size;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void throtl_charge_iops_bio(struct throtl_grp *tg, struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	bio_clear_flag(bio, BIO_TG_BPS_THROTTLED);</div><div class='add'>+	tg-&gt;io_disp[bio_data_dir(bio)]++;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='del'>- * Returns whether one can dispatch a bio or not. Also returns approx number</div><div class='del'>- * of jiffies to wait before this bio is with-in IO rate and can be dispatched</div><div class='add'>+ * If previous slice expired, start a new one otherwise renew/extend existing</div><div class='add'>+ * slice to make sure it is at least throtl_slice interval long since now. New</div><div class='add'>+ * slice is started only for empty throttle group. If there is queued bio, that</div><div class='add'>+ * means there should be an active slice and it should be extended instead.</div><div class='ctx'>  */</div><div class='del'>-static bool tg_may_dispatch(struct throtl_grp *tg, struct bio *bio,</div><div class='del'>-			    unsigned long *wait)</div><div class='add'>+static void tg_update_slice(struct throtl_grp *tg, bool rw)</div><div class='add'>+{</div><div class='add'>+	if (throtl_slice_used(tg, rw) &amp;&amp;</div><div class='add'>+	    sq_queued(&amp;tg-&gt;service_queue, rw) == 0)</div><div class='add'>+		throtl_start_new_slice(tg, rw, true);</div><div class='add'>+	else</div><div class='add'>+		throtl_extend_slice(tg, rw, jiffies + tg-&gt;td-&gt;throtl_slice);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long tg_dispatch_bps_time(struct throtl_grp *tg, struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	bool rw = bio_data_dir(bio);</div><div class='del'>-	unsigned long bps_wait = 0, iops_wait = 0, max_wait = 0;</div><div class='ctx'> 	u64 bps_limit = tg_bps_limit(tg, rw);</div><div class='add'>+	unsigned long bps_wait;</div><div class='add'>+</div><div class='add'>+	/* no need to throttle if this bio's bytes have been accounted */</div><div class='add'>+	if (bps_limit == U64_MAX || tg-&gt;flags &amp; THROTL_TG_CANCELING ||</div><div class='add'>+	    bio_flagged(bio, BIO_BPS_THROTTLED) ||</div><div class='add'>+	    bio_flagged(bio, BIO_TG_BPS_THROTTLED))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	tg_update_slice(tg, rw);</div><div class='add'>+	bps_wait = tg_within_bps_limit(tg, bio, bps_limit);</div><div class='add'>+	throtl_extend_slice(tg, rw, jiffies + bps_wait);</div><div class='add'>+</div><div class='add'>+	return bps_wait;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long tg_dispatch_iops_time(struct throtl_grp *tg, struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	bool rw = bio_data_dir(bio);</div><div class='ctx'> 	u32 iops_limit = tg_iops_limit(tg, rw);</div><div class='add'>+	unsigned long iops_wait;</div><div class='add'>+</div><div class='add'>+	if (iops_limit == UINT_MAX || tg-&gt;flags &amp; THROTL_TG_CANCELING)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	tg_update_slice(tg, rw);</div><div class='add'>+	iops_wait = tg_within_iops_limit(tg, bio, iops_limit);</div><div class='add'>+	throtl_extend_slice(tg, rw, jiffies + iops_wait);</div><div class='add'>+</div><div class='add'>+	return iops_wait;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Returns approx number of jiffies to wait before this bio is with-in IO rate</div><div class='add'>+ * and can be moved to other queue or dispatched.</div><div class='add'>+ */</div><div class='add'>+static unsigned long tg_dispatch_time(struct throtl_grp *tg, struct bio *bio)</div><div class='add'>+{</div><div class='add'>+	bool rw = bio_data_dir(bio);</div><div class='add'>+	unsigned long wait;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'>  	 * Currently whole state machine of group depends on first bio</div><div class='hunk'>@@ -760,62 +906,20 @@ static bool tg_may_dispatch(struct throtl_grp *tg, struct bio *bio,</div><div class='ctx'> 	 * this function with a different bio if there are other bios</div><div class='ctx'> 	 * queued.</div><div class='ctx'> 	 */</div><div class='del'>-	BUG_ON(tg-&gt;service_queue.nr_queued[rw] &amp;&amp;</div><div class='add'>+	BUG_ON(sq_queued(&amp;tg-&gt;service_queue, rw) &amp;&amp;</div><div class='ctx'> 	       bio != throtl_peek_queued(&amp;tg-&gt;service_queue.queued[rw]));</div><div class='ctx'> </div><div class='del'>-	/* If tg-&gt;bps = -1, then BW is unlimited */</div><div class='del'>-	if ((bps_limit == U64_MAX &amp;&amp; iops_limit == UINT_MAX) ||</div><div class='del'>-	    tg-&gt;flags &amp; THROTL_TG_CANCELING) {</div><div class='del'>-		if (wait)</div><div class='del'>-			*wait = 0;</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='add'>+	wait = tg_dispatch_bps_time(tg, bio);</div><div class='add'>+	if (wait != 0)</div><div class='add'>+		return wait;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * If previous slice expired, start a new one otherwise renew/extend</div><div class='del'>-	 * existing slice to make sure it is at least throtl_slice interval</div><div class='del'>-	 * long since now. New slice is started only for empty throttle group.</div><div class='del'>-	 * If there is queued bio, that means there should be an active</div><div class='del'>-	 * slice and it should be extended instead.</div><div class='add'>+	 * Charge bps here because @bio will be directly placed into the</div><div class='add'>+	 * iops queue afterward.</div><div class='ctx'> 	 */</div><div class='del'>-	if (throtl_slice_used(tg, rw) &amp;&amp; !(tg-&gt;service_queue.nr_queued[rw]))</div><div class='del'>-		throtl_start_new_slice(tg, rw, true);</div><div class='del'>-	else {</div><div class='del'>-		if (time_before(tg-&gt;slice_end[rw],</div><div class='del'>-		    jiffies + tg-&gt;td-&gt;throtl_slice))</div><div class='del'>-			throtl_extend_slice(tg, rw,</div><div class='del'>-				jiffies + tg-&gt;td-&gt;throtl_slice);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bps_wait = tg_within_bps_limit(tg, bio, bps_limit);</div><div class='del'>-	iops_wait = tg_within_iops_limit(tg, bio, iops_limit);</div><div class='del'>-	if (bps_wait + iops_wait == 0) {</div><div class='del'>-		if (wait)</div><div class='del'>-			*wait = 0;</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	max_wait = max(bps_wait, iops_wait);</div><div class='del'>-</div><div class='del'>-	if (wait)</div><div class='del'>-		*wait = max_wait;</div><div class='del'>-</div><div class='del'>-	if (time_before(tg-&gt;slice_end[rw], jiffies + max_wait))</div><div class='del'>-		throtl_extend_slice(tg, rw, jiffies + max_wait);</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void throtl_charge_bio(struct throtl_grp *tg, struct bio *bio)</div><div class='del'>-{</div><div class='del'>-	bool rw = bio_data_dir(bio);</div><div class='del'>-	unsigned int bio_size = throtl_bio_data_size(bio);</div><div class='add'>+	throtl_charge_bps_bio(tg, bio);</div><div class='ctx'> </div><div class='del'>-	/* Charge the bio to the group */</div><div class='del'>-	if (!bio_flagged(bio, BIO_BPS_THROTTLED))</div><div class='del'>-		tg-&gt;bytes_disp[rw] += bio_size;</div><div class='del'>-</div><div class='del'>-	tg-&gt;io_disp[rw]++;</div><div class='add'>+	return tg_dispatch_iops_time(tg, bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -842,28 +946,36 @@ static void throtl_add_bio_tg(struct bio *bio, struct throtl_qnode *qn,</div><div class='ctx'> 	 * dispatched.  Mark that @tg was empty.  This is automatically</div><div class='ctx'> 	 * cleared on the next tg_update_disptime().</div><div class='ctx'> 	 */</div><div class='del'>-	if (!sq-&gt;nr_queued[rw])</div><div class='add'>+	if (sq_queued(sq, rw) == 0)</div><div class='ctx'> 		tg-&gt;flags |= THROTL_TG_WAS_EMPTY;</div><div class='ctx'> </div><div class='del'>-	throtl_qnode_add_bio(bio, qn, &amp;sq-&gt;queued[rw]);</div><div class='add'>+	throtl_qnode_add_bio(bio, qn, sq);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Since we have split the queues, when the iops queue is</div><div class='add'>+	 * previously empty and a new @bio is added into the first @qn,</div><div class='add'>+	 * we also need to update the @tg-&gt;disptime.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_flagged(bio, BIO_BPS_THROTTLED) &amp;&amp;</div><div class='add'>+	    bio == throtl_peek_queued(&amp;sq-&gt;queued[rw]))</div><div class='add'>+		tg-&gt;flags |= THROTL_TG_IOPS_WAS_EMPTY;</div><div class='ctx'> </div><div class='del'>-	sq-&gt;nr_queued[rw]++;</div><div class='ctx'> 	throtl_enqueue_tg(tg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tg_update_disptime(struct throtl_grp *tg)</div><div class='ctx'> {</div><div class='ctx'> 	struct throtl_service_queue *sq = &amp;tg-&gt;service_queue;</div><div class='del'>-	unsigned long read_wait = -1, write_wait = -1, min_wait = -1, disptime;</div><div class='add'>+	unsigned long read_wait = -1, write_wait = -1, min_wait, disptime;</div><div class='ctx'> 	struct bio *bio;</div><div class='ctx'> </div><div class='ctx'> 	bio = throtl_peek_queued(&amp;sq-&gt;queued[READ]);</div><div class='ctx'> 	if (bio)</div><div class='del'>-		tg_may_dispatch(tg, bio, &amp;read_wait);</div><div class='add'>+		read_wait = tg_dispatch_time(tg, bio);</div><div class='ctx'> </div><div class='ctx'> 	bio = throtl_peek_queued(&amp;sq-&gt;queued[WRITE]);</div><div class='ctx'> 	if (bio)</div><div class='del'>-		tg_may_dispatch(tg, bio, &amp;write_wait);</div><div class='add'>+		write_wait = tg_dispatch_time(tg, bio);</div><div class='ctx'> </div><div class='ctx'> 	min_wait = min(read_wait, write_wait);</div><div class='ctx'> 	disptime = jiffies + min_wait;</div><div class='hunk'>@@ -875,6 +987,7 @@ static void tg_update_disptime(struct throtl_grp *tg)</div><div class='ctx'> </div><div class='ctx'> 	/* see throtl_add_bio_tg() */</div><div class='ctx'> 	tg-&gt;flags &amp;= ~THROTL_TG_WAS_EMPTY;</div><div class='add'>+	tg-&gt;flags &amp;= ~THROTL_TG_IOPS_WAS_EMPTY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void start_parent_slice_with_credit(struct throtl_grp *child_tg,</div><div class='hunk'>@@ -901,10 +1014,9 @@ static void tg_dispatch_one_bio(struct throtl_grp *tg, bool rw)</div><div class='ctx'> 	 * getting released prematurely.  Remember the tg to put and put it</div><div class='ctx'> 	 * after @bio is transferred to @parent_sq.</div><div class='ctx'> 	 */</div><div class='del'>-	bio = throtl_pop_queued(&amp;sq-&gt;queued[rw], &amp;tg_to_put);</div><div class='del'>-	sq-&gt;nr_queued[rw]--;</div><div class='add'>+	bio = throtl_pop_queued(sq, &amp;tg_to_put, rw);</div><div class='ctx'> </div><div class='del'>-	throtl_charge_bio(tg, bio);</div><div class='add'>+	throtl_charge_iops_bio(tg, bio);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If our parent is another tg, we just need to transfer @bio to</div><div class='hunk'>@@ -919,7 +1031,7 @@ static void tg_dispatch_one_bio(struct throtl_grp *tg, bool rw)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		bio_set_flag(bio, BIO_BPS_THROTTLED);</div><div class='ctx'> 		throtl_qnode_add_bio(bio, &amp;tg-&gt;qnode_on_parent[rw],</div><div class='del'>-				     &amp;parent_sq-&gt;queued[rw]);</div><div class='add'>+				     parent_sq);</div><div class='ctx'> 		BUG_ON(tg-&gt;td-&gt;nr_queued[rw] &lt;= 0);</div><div class='ctx'> 		tg-&gt;td-&gt;nr_queued[rw]--;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -941,7 +1053,7 @@ static int throtl_dispatch_tg(struct throtl_grp *tg)</div><div class='ctx'> 	/* Try to dispatch 75% READS and 25% WRITES */</div><div class='ctx'> </div><div class='ctx'> 	while ((bio = throtl_peek_queued(&amp;sq-&gt;queued[READ])) &amp;&amp;</div><div class='del'>-	       tg_may_dispatch(tg, bio, NULL)) {</div><div class='add'>+	       tg_dispatch_time(tg, bio) == 0) {</div><div class='ctx'> </div><div class='ctx'> 		tg_dispatch_one_bio(tg, READ);</div><div class='ctx'> 		nr_reads++;</div><div class='hunk'>@@ -951,7 +1063,7 @@ static int throtl_dispatch_tg(struct throtl_grp *tg)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	while ((bio = throtl_peek_queued(&amp;sq-&gt;queued[WRITE])) &amp;&amp;</div><div class='del'>-	       tg_may_dispatch(tg, bio, NULL)) {</div><div class='add'>+	       tg_dispatch_time(tg, bio) == 0) {</div><div class='ctx'> </div><div class='ctx'> 		tg_dispatch_one_bio(tg, WRITE);</div><div class='ctx'> 		nr_writes++;</div><div class='hunk'>@@ -984,7 +1096,7 @@ static int throtl_select_dispatch(struct throtl_service_queue *parent_sq)</div><div class='ctx'> 		nr_disp += throtl_dispatch_tg(tg);</div><div class='ctx'> </div><div class='ctx'> 		sq = &amp;tg-&gt;service_queue;</div><div class='del'>-		if (sq-&gt;nr_queued[READ] || sq-&gt;nr_queued[WRITE])</div><div class='add'>+		if (sq_queued(sq, READ) || sq_queued(sq, WRITE))</div><div class='ctx'> 			tg_update_disptime(tg);</div><div class='ctx'> 		else</div><div class='ctx'> 			throtl_dequeue_tg(tg);</div><div class='hunk'>@@ -1037,9 +1149,11 @@ again:</div><div class='ctx'> 	dispatched = false;</div><div class='ctx'> </div><div class='ctx'> 	while (true) {</div><div class='add'>+		unsigned int __maybe_unused bio_cnt_r = sq_queued(sq, READ);</div><div class='add'>+		unsigned int __maybe_unused bio_cnt_w = sq_queued(sq, WRITE);</div><div class='add'>+</div><div class='ctx'> 		throtl_log(sq, "dispatch nr_queued=%u read=%u write=%u",</div><div class='del'>-			   sq-&gt;nr_queued[READ] + sq-&gt;nr_queued[WRITE],</div><div class='del'>-			   sq-&gt;nr_queued[READ], sq-&gt;nr_queued[WRITE]);</div><div class='add'>+			   bio_cnt_r + bio_cnt_w, bio_cnt_r, bio_cnt_w);</div><div class='ctx'> </div><div class='ctx'> 		ret = throtl_select_dispatch(sq);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -1061,7 +1175,8 @@ again:</div><div class='ctx'> </div><div class='ctx'> 	if (parent_sq) {</div><div class='ctx'> 		/* @parent_sq is another throl_grp, propagate dispatch */</div><div class='del'>-		if (tg-&gt;flags &amp; THROTL_TG_WAS_EMPTY) {</div><div class='add'>+		if (tg-&gt;flags &amp; THROTL_TG_WAS_EMPTY ||</div><div class='add'>+		    tg-&gt;flags &amp; THROTL_TG_IOPS_WAS_EMPTY) {</div><div class='ctx'> 			tg_update_disptime(tg);</div><div class='ctx'> 			if (!throtl_schedule_next_dispatch(parent_sq, false)) {</div><div class='ctx'> 				/* window is already open, repeat dispatching */</div><div class='hunk'>@@ -1101,7 +1216,7 @@ static void blk_throtl_dispatch_work_fn(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;q-&gt;queue_lock);</div><div class='ctx'> 	for (rw = READ; rw &lt;= WRITE; rw++)</div><div class='del'>-		while ((bio = throtl_pop_queued(&amp;td_sq-&gt;queued[rw], NULL)))</div><div class='add'>+		while ((bio = throtl_pop_queued(td_sq, NULL, rw)))</div><div class='ctx'> 			bio_list_add(&amp;bio_list_on_stack, bio);</div><div class='ctx'> 	spin_unlock_irq(&amp;q-&gt;queue_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1606,11 +1721,30 @@ void blk_throtl_cancel_bios(struct gendisk *disk)</div><div class='ctx'> </div><div class='ctx'> static bool tg_within_limit(struct throtl_grp *tg, struct bio *bio, bool rw)</div><div class='ctx'> {</div><div class='del'>-	/* throtl is FIFO - if bios are already queued, should queue */</div><div class='del'>-	if (tg-&gt;service_queue.nr_queued[rw])</div><div class='add'>+	struct throtl_service_queue *sq = &amp;tg-&gt;service_queue;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For a split bio, we need to specifically distinguish whether the</div><div class='add'>+	 * iops queue is empty.</div><div class='add'>+	 */</div><div class='add'>+	if (bio_flagged(bio, BIO_BPS_THROTTLED))</div><div class='add'>+		return sq-&gt;nr_queued_iops[rw] == 0 &amp;&amp;</div><div class='add'>+				tg_dispatch_iops_time(tg, bio) == 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Throtl is FIFO - if bios are already queued, should queue.</div><div class='add'>+	 * If the bps queue is empty and @bio is within the bps limit, charge</div><div class='add'>+	 * bps here for direct placement into the iops queue.</div><div class='add'>+	 */</div><div class='add'>+	if (sq_queued(&amp;tg-&gt;service_queue, rw)) {</div><div class='add'>+		if (sq-&gt;nr_queued_bps[rw] == 0 &amp;&amp;</div><div class='add'>+		    tg_dispatch_bps_time(tg, bio) == 0)</div><div class='add'>+			throtl_charge_bps_bio(tg, bio);</div><div class='add'>+</div><div class='ctx'> 		return false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return tg_may_dispatch(tg, bio, NULL);</div><div class='add'>+	return tg_dispatch_time(tg, bio) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool __blk_throtl_bio(struct bio *bio)</div><div class='hunk'>@@ -1631,7 +1765,7 @@ bool __blk_throtl_bio(struct bio *bio)</div><div class='ctx'> 	while (true) {</div><div class='ctx'> 		if (tg_within_limit(tg, bio, rw)) {</div><div class='ctx'> 			/* within limits, let's charge and dispatch directly */</div><div class='del'>-			throtl_charge_bio(tg, bio);</div><div class='add'>+			throtl_charge_iops_bio(tg, bio);</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * We need to trim slice even when bios are not being</div><div class='hunk'>@@ -1654,7 +1788,8 @@ bool __blk_throtl_bio(struct bio *bio)</div><div class='ctx'> 			 * control algorithm is adaptive, and extra IO bytes</div><div class='ctx'> 			 * will be throttled for paying the debt</div><div class='ctx'> 			 */</div><div class='del'>-			throtl_charge_bio(tg, bio);</div><div class='add'>+			throtl_charge_bps_bio(tg, bio);</div><div class='add'>+			throtl_charge_iops_bio(tg, bio);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* if above limits, break to queue */</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1680,7 +1815,7 @@ bool __blk_throtl_bio(struct bio *bio)</div><div class='ctx'> 		   tg-&gt;bytes_disp[rw], bio-&gt;bi_iter.bi_size,</div><div class='ctx'> 		   tg_bps_limit(tg, rw),</div><div class='ctx'> 		   tg-&gt;io_disp[rw], tg_iops_limit(tg, rw),</div><div class='del'>-		   sq-&gt;nr_queued[READ], sq-&gt;nr_queued[WRITE]);</div><div class='add'>+		   sq_queued(sq, READ), sq_queued(sq, WRITE));</div><div class='ctx'> </div><div class='ctx'> 	td-&gt;nr_queued[rw]++;</div><div class='ctx'> 	throtl_add_bio_tg(bio, qn, tg);</div><div class='hunk'>@@ -1688,11 +1823,13 @@ bool __blk_throtl_bio(struct bio *bio)</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Update @tg's dispatch time and force schedule dispatch if @tg</div><div class='del'>-	 * was empty before @bio.  The forced scheduling isn't likely to</div><div class='del'>-	 * cause undue delay as @bio is likely to be dispatched directly if</div><div class='del'>-	 * its @tg's disptime is not in the future.</div><div class='add'>+	 * was empty before @bio, or the iops queue is empty and @bio will</div><div class='add'>+	 * add to.  The forced scheduling isn't likely to cause undue</div><div class='add'>+	 * delay as @bio is likely to be dispatched directly if its @tg's</div><div class='add'>+	 * disptime is not in the future.</div><div class='ctx'> 	 */</div><div class='del'>-	if (tg-&gt;flags &amp; THROTL_TG_WAS_EMPTY) {</div><div class='add'>+	if (tg-&gt;flags &amp; THROTL_TG_WAS_EMPTY ||</div><div class='add'>+	    tg-&gt;flags &amp; THROTL_TG_IOPS_WAS_EMPTY) {</div><div class='ctx'> 		tg_update_disptime(tg);</div><div class='ctx'> 		throtl_schedule_next_dispatch(tg-&gt;service_queue.parent_sq, true);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/block/blk-throttle.h b/block/blk-throttle.h<br/>index 7964cc041e06..3b27755bfbff 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-throttle.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-throttle.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-throttle.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-throttle.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #ifndef BLK_THROTTLE_H</div><div class='ctx'> #define BLK_THROTTLE_H</div><div class='ctx'> </div><div class='hunk'>@@ -28,7 +29,8 @@</div><div class='ctx'>  */</div><div class='ctx'> struct throtl_qnode {</div><div class='ctx'> 	struct list_head	node;		/* service_queue-&gt;queued[] */</div><div class='del'>-	struct bio_list		bios;		/* queued bios */</div><div class='add'>+	struct bio_list		bios_bps;	/* queued bios for bps limit */</div><div class='add'>+	struct bio_list		bios_iops;	/* queued bios for iops limit */</div><div class='ctx'> 	struct throtl_grp	*tg;		/* tg this qnode belongs to */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -40,7 +42,8 @@ struct throtl_service_queue {</div><div class='ctx'> 	 * children throtl_grp's.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct list_head	queued[2];	/* throtl_qnode [READ/WRITE] */</div><div class='del'>-	unsigned int		nr_queued[2];	/* number of queued bios */</div><div class='add'>+	unsigned int		nr_queued_bps[2];	/* number of queued bps bios */</div><div class='add'>+	unsigned int		nr_queued_iops[2];	/* number of queued iops bios */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * RB tree of active children throtl_grp's, which are sorted by</div><div class='hunk'>@@ -53,9 +56,14 @@ struct throtl_service_queue {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum tg_state_flags {</div><div class='del'>-	THROTL_TG_PENDING	= 1 &lt;&lt; 0,	/* on parent's pending tree */</div><div class='del'>-	THROTL_TG_WAS_EMPTY	= 1 &lt;&lt; 1,	/* bio_lists[] became non-empty */</div><div class='del'>-	THROTL_TG_CANCELING	= 1 &lt;&lt; 2,	/* starts to cancel bio */</div><div class='add'>+	THROTL_TG_PENDING		= 1 &lt;&lt; 0,	/* on parent's pending tree */</div><div class='add'>+	THROTL_TG_WAS_EMPTY		= 1 &lt;&lt; 1,	/* bio_lists[] became non-empty */</div><div class='add'>+	/*</div><div class='add'>+	 * The sq's iops queue is empty, and a bio is about to be enqueued</div><div class='add'>+	 * to the first qnode's bios_iops list.</div><div class='add'>+	 */</div><div class='add'>+	THROTL_TG_IOPS_WAS_EMPTY	= 1 &lt;&lt; 2,</div><div class='add'>+	THROTL_TG_CANCELING		= 1 &lt;&lt; 3,	/* starts to cancel bio */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct throtl_grp {</div><div class='hunk'>@@ -101,19 +109,16 @@ struct throtl_grp {</div><div class='ctx'> 	/* IOPS limits */</div><div class='ctx'> 	unsigned int iops[2];</div><div class='ctx'> </div><div class='del'>-	/* Number of bytes dispatched in current slice */</div><div class='del'>-	int64_t bytes_disp[2];</div><div class='del'>-	/* Number of bio's dispatched in current slice */</div><div class='del'>-	int io_disp[2];</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='del'>-	 * The following two fields are updated when new configuration is</div><div class='del'>-	 * submitted while some bios are still throttled, they record how many</div><div class='del'>-	 * bytes/ios are waited already in previous configuration, and they will</div><div class='del'>-	 * be used to calculate wait time under new configuration.</div><div class='add'>+	 * Number of bytes/bio's dispatched in current slice.</div><div class='add'>+	 * When new configuration is submitted while some bios are still throttled,</div><div class='add'>+	 * first calculate the carryover: the amount of bytes/IOs already waited</div><div class='add'>+	 * under the previous configuration. Then, [bytes/io]_disp are represented</div><div class='add'>+	 * as the negative of the carryover, and they will be used to calculate the</div><div class='add'>+	 * wait time under the new configuration.</div><div class='ctx'> 	 */</div><div class='del'>-	long long carryover_bytes[2];</div><div class='del'>-	int carryover_ios[2];</div><div class='add'>+	int64_t bytes_disp[2];</div><div class='add'>+	int io_disp[2];</div><div class='ctx'> </div><div class='ctx'> 	unsigned long last_check_time;</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-wbt.c b/block/blk-wbt.c<br/>index f1754d07f7e0..a50d4cd55f41 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-wbt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-wbt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-wbt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-wbt.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> enum wbt_flags {</div><div class='ctx'> 	WBT_TRACKED		= 1,	/* write, tracked for throttling */</div><div class='ctx'> 	WBT_READ		= 2,	/* read */</div><div class='del'>-	WBT_SWAP		= 4,	/* write, from swap_writepage() */</div><div class='add'>+	WBT_SWAP		= 4,	/* write, from swap_writeout() */</div><div class='ctx'> 	WBT_DISCARD		= 8,	/* discard */</div><div class='ctx'> </div><div class='ctx'> 	WBT_NR_BITS		= 4,	/* number of bits */</div><div class='hunk'>@@ -704,8 +704,9 @@ void wbt_enable_default(struct gendisk *disk)</div><div class='ctx'> 	struct rq_qos *rqos;</div><div class='ctx'> 	bool enable = IS_ENABLED(CONFIG_BLK_WBT_MQ);</div><div class='ctx'> </div><div class='del'>-	if (q-&gt;elevator &amp;&amp;</div><div class='del'>-	    test_bit(ELEVATOR_FLAG_DISABLE_WBT, &amp;q-&gt;elevator-&gt;flags))</div><div class='add'>+	mutex_lock(&amp;disk-&gt;rqos_state_mutex);</div><div class='add'>+</div><div class='add'>+	if (blk_queue_disable_wbt(q))</div><div class='ctx'> 		enable = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Throttling already enabled? */</div><div class='hunk'>@@ -713,8 +714,10 @@ void wbt_enable_default(struct gendisk *disk)</div><div class='ctx'> 	if (rqos) {</div><div class='ctx'> 		if (enable &amp;&amp; RQWB(rqos)-&gt;enable_state == WBT_STATE_OFF_DEFAULT)</div><div class='ctx'> 			RQWB(rqos)-&gt;enable_state = WBT_STATE_ON_DEFAULT;</div><div class='add'>+		mutex_unlock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	mutex_unlock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Queue not registered? Maybe shutting down... */</div><div class='ctx'> 	if (!blk_queue_registered(q))</div><div class='hunk'>@@ -774,11 +777,13 @@ void wbt_disable_default(struct gendisk *disk)</div><div class='ctx'> 	struct rq_wb *rwb;</div><div class='ctx'> 	if (!rqos)</div><div class='ctx'> 		return;</div><div class='add'>+	mutex_lock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> 	rwb = RQWB(rqos);</div><div class='ctx'> 	if (rwb-&gt;enable_state == WBT_STATE_ON_DEFAULT) {</div><div class='ctx'> 		blk_stat_deactivate(rwb-&gt;cb);</div><div class='ctx'> 		rwb-&gt;enable_state = WBT_STATE_OFF_DEFAULT;</div><div class='ctx'> 	}</div><div class='add'>+	mutex_unlock(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(wbt_disable_default);</div><div class='ctx'> </div><div class='head'>diff --git a/block/blk-zoned.c b/block/blk-zoned.c<br/>index 0c77244a35c9..8f15d1aa6eb8 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk-zoned.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk-zoned.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk-zoned.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk-zoned.c</a></div><div class='hunk'>@@ -343,6 +343,7 @@ int blkdev_zone_mgmt_ioctl(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 		op = REQ_OP_ZONE_RESET;</div><div class='ctx'> </div><div class='ctx'> 		/* Invalidate the page cache, including dirty pages. */</div><div class='add'>+		inode_lock(bdev-&gt;bd_mapping-&gt;host);</div><div class='ctx'> 		filemap_invalidate_lock(bdev-&gt;bd_mapping);</div><div class='ctx'> 		ret = blkdev_truncate_zone_range(bdev, mode, &amp;zrange);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -364,8 +365,10 @@ int blkdev_zone_mgmt_ioctl(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 	ret = blkdev_zone_mgmt(bdev, op, zrange.sector, zrange.nr_sectors);</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	if (cmd == BLKRESETZONE)</div><div class='add'>+	if (cmd == BLKRESETZONE) {</div><div class='ctx'> 		filemap_invalidate_unlock(bdev-&gt;bd_mapping);</div><div class='add'>+		inode_unlock(bdev-&gt;bd_mapping-&gt;host);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/block/blk.h b/block/blk.h<br/>index 006e3be433d2..37ec459fe656 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/blk.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/blk.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/blk.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/blk.h</a></div><div class='hunk'>@@ -94,14 +94,16 @@ static inline void blk_wait_io(struct completion *done)</div><div class='ctx'> 		wait_for_completion_io(done);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct block_device *blkdev_get_no_open(dev_t dev, bool autoload);</div><div class='add'>+void blkdev_put_no_open(struct block_device *bdev);</div><div class='add'>+</div><div class='ctx'> #define BIO_INLINE_VECS 4</div><div class='ctx'> struct bio_vec *bvec_alloc(mempool_t *pool, unsigned short *nr_vecs,</div><div class='ctx'> 		gfp_t gfp_mask);</div><div class='ctx'> void bvec_free(mempool_t *pool, struct bio_vec *bv, unsigned short nr_vecs);</div><div class='ctx'> </div><div class='ctx'> bool bvec_try_merge_hw_page(struct request_queue *q, struct bio_vec *bv,</div><div class='del'>-		struct page *page, unsigned len, unsigned offset,</div><div class='del'>-		bool *same_page);</div><div class='add'>+		struct page *page, unsigned len, unsigned offset);</div><div class='ctx'> </div><div class='ctx'> static inline bool biovec_phys_mergeable(struct request_queue *q,</div><div class='ctx'> 		struct bio_vec *vec1, struct bio_vec *vec2)</div><div class='hunk'>@@ -319,11 +321,9 @@ bool blk_bio_list_merge(struct request_queue *q, struct list_head *list,</div><div class='ctx'> </div><div class='ctx'> bool blk_insert_flush(struct request *rq);</div><div class='ctx'> </div><div class='del'>-int elevator_switch(struct request_queue *q, struct elevator_type *new_e);</div><div class='del'>-void elevator_disable(struct request_queue *q);</div><div class='del'>-void elevator_exit(struct request_queue *q);</div><div class='del'>-int elv_register_queue(struct request_queue *q, bool uevent);</div><div class='del'>-void elv_unregister_queue(struct request_queue *q);</div><div class='add'>+void elv_update_nr_hw_queues(struct request_queue *q);</div><div class='add'>+void elevator_set_default(struct request_queue *q);</div><div class='add'>+void elevator_set_none(struct request_queue *q);</div><div class='ctx'> </div><div class='ctx'> ssize_t part_size_show(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 		char *buf);</div><div class='hunk'>@@ -404,6 +404,27 @@ static inline struct bio *__bio_split_to_limits(struct bio *bio,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * get_max_segment_size() - maximum number of bytes to add as a single segment</div><div class='add'>+ * @lim: Request queue limits.</div><div class='add'>+ * @paddr: address of the range to add</div><div class='add'>+ * @len: maximum length available to add at @paddr</div><div class='add'>+ *</div><div class='add'>+ * Returns the maximum number of bytes of the range starting at @paddr that can</div><div class='add'>+ * be added to a single segment.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned get_max_segment_size(const struct queue_limits *lim,</div><div class='add'>+		phys_addr_t paddr, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Prevent an overflow if mask = ULONG_MAX and offset = 0 by adding 1</div><div class='add'>+	 * after having calculated the minimum.</div><div class='add'>+	 */</div><div class='add'>+	return min_t(unsigned long, len,</div><div class='add'>+		min(lim-&gt;seg_boundary_mask - (lim-&gt;seg_boundary_mask &amp; paddr),</div><div class='add'>+		    (unsigned long)lim-&gt;max_segment_size - 1) + 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ll_back_merge_fn(struct request *req, struct bio *bio,</div><div class='ctx'> 		unsigned int nr_segs);</div><div class='ctx'> bool blk_attempt_req_merge(struct request_queue *q, struct request *rq,</div><div class='hunk'>@@ -418,7 +439,6 @@ void blk_apply_bdi_limits(struct backing_dev_info *bdi,</div><div class='ctx'> int blk_dev_init(void);</div><div class='ctx'> </div><div class='ctx'> void update_io_ticks(struct block_device *part, unsigned long now, bool end);</div><div class='del'>-unsigned int part_in_flight(struct block_device *part);</div><div class='ctx'> </div><div class='ctx'> static inline void req_set_nomerge(struct request_queue *q, struct request *req)</div><div class='ctx'> {</div><div class='hunk'>@@ -440,23 +460,6 @@ static inline void ioc_clear_queue(struct request_queue *q)</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_BLK_ICQ */</div><div class='ctx'> </div><div class='del'>-struct bio *__blk_queue_bounce(struct bio *bio, struct request_queue *q);</div><div class='del'>-</div><div class='del'>-static inline bool blk_queue_may_bounce(struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	return IS_ENABLED(CONFIG_BOUNCE) &amp;&amp;</div><div class='del'>-		(q-&gt;limits.features &amp; BLK_FEAT_BOUNCE_HIGH) &amp;&amp;</div><div class='del'>-		max_low_pfn &gt;= max_pfn;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline struct bio *blk_queue_bounce(struct bio *bio,</div><div class='del'>-		struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(blk_queue_may_bounce(q) &amp;&amp; bio_has_data(bio)))</div><div class='del'>-		return __blk_queue_bounce(bio, q);</div><div class='del'>-	return bio;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_BLK_DEV_ZONED</div><div class='ctx'> void disk_init_zone_resources(struct gendisk *disk);</div><div class='ctx'> void disk_free_zone_resources(struct gendisk *disk);</div><div class='hunk'>@@ -477,7 +480,8 @@ static inline void blk_zone_update_request_bio(struct request *rq,</div><div class='ctx'> 	 * the original BIO sector so that blk_zone_write_plug_bio_endio() can</div><div class='ctx'> 	 * lookup the zone write plug.</div><div class='ctx'> 	 */</div><div class='del'>-	if (req_op(rq) == REQ_OP_ZONE_APPEND || bio_zone_write_plugging(bio))</div><div class='add'>+	if (req_op(rq) == REQ_OP_ZONE_APPEND ||</div><div class='add'>+	    bio_flagged(bio, BIO_EMULATES_ZONE_APPEND))</div><div class='ctx'> 		bio-&gt;bi_iter.bi_sector = rq-&gt;__sector;</div><div class='ctx'> }</div><div class='ctx'> void blk_zone_write_plug_bio_endio(struct bio *bio);</div><div class='head'>diff --git a/block/bounce.c b/block/bounce.c<br/>deleted file mode 100644<br/>index 09a9616cf209..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/block/bounce.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/bounce.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,267 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* bounce buffer handling for block devices</div><div class='del'>- *</div><div class='del'>- * - Split from highmem.c</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/swap.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-#include &lt;linux/bio-integrity.h&gt;</div><div class='del'>-#include &lt;linux/pagemap.h&gt;</div><div class='del'>-#include &lt;linux/mempool.h&gt;</div><div class='del'>-#include &lt;linux/blkdev.h&gt;</div><div class='del'>-#include &lt;linux/backing-dev.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/hash.h&gt;</div><div class='del'>-#include &lt;linux/highmem.h&gt;</div><div class='del'>-#include &lt;linux/printk.h&gt;</div><div class='del'>-#include &lt;asm/tlbflush.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;trace/events/block.h&gt;</div><div class='del'>-#include "blk.h"</div><div class='del'>-#include "blk-cgroup.h"</div><div class='del'>-</div><div class='del'>-#define POOL_SIZE	64</div><div class='del'>-#define ISA_POOL_SIZE	16</div><div class='del'>-</div><div class='del'>-static struct bio_set bounce_bio_set, bounce_bio_split;</div><div class='del'>-static mempool_t page_pool;</div><div class='del'>-</div><div class='del'>-static void init_bounce_bioset(void)</div><div class='del'>-{</div><div class='del'>-	static bool bounce_bs_setup;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (bounce_bs_setup)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ret = bioset_init(&amp;bounce_bio_set, BIO_POOL_SIZE, 0, BIOSET_NEED_BVECS);</div><div class='del'>-	BUG_ON(ret);</div><div class='del'>-</div><div class='del'>-	ret = bioset_init(&amp;bounce_bio_split, BIO_POOL_SIZE, 0, 0);</div><div class='del'>-	BUG_ON(ret);</div><div class='del'>-	bounce_bs_setup = true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static __init int init_emergency_pool(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_MEMORY_HOTPLUG</div><div class='del'>-	if (max_pfn &lt;= max_low_pfn)</div><div class='del'>-		return 0;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	ret = mempool_init_page_pool(&amp;page_pool, POOL_SIZE, 0);</div><div class='del'>-	BUG_ON(ret);</div><div class='del'>-	pr_info("pool size: %d pages\n", POOL_SIZE);</div><div class='del'>-</div><div class='del'>-	init_bounce_bioset();</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__initcall(init_emergency_pool);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Simple bounce buffer support for highmem pages. Depending on the</div><div class='del'>- * queue gfp mask set, *to may or may not be a highmem page. kmap it</div><div class='del'>- * always, it will do the Right Thing</div><div class='del'>- */</div><div class='del'>-static void copy_to_high_bio_irq(struct bio *to, struct bio *from)</div><div class='del'>-{</div><div class='del'>-	struct bio_vec tovec, fromvec;</div><div class='del'>-	struct bvec_iter iter;</div><div class='del'>-	/*</div><div class='del'>-	 * The bio of @from is created by bounce, so we can iterate</div><div class='del'>-	 * its bvec from start to end, but the @from-&gt;bi_iter can't be</div><div class='del'>-	 * trusted because it might be changed by splitting.</div><div class='del'>-	 */</div><div class='del'>-	struct bvec_iter from_iter = BVEC_ITER_ALL_INIT;</div><div class='del'>-</div><div class='del'>-	bio_for_each_segment(tovec, to, iter) {</div><div class='del'>-		fromvec = bio_iter_iovec(from, from_iter);</div><div class='del'>-		if (tovec.bv_page != fromvec.bv_page) {</div><div class='del'>-			/*</div><div class='del'>-			 * fromvec-&gt;bv_offset and fromvec-&gt;bv_len might have</div><div class='del'>-			 * been modified by the block layer, so use the original</div><div class='del'>-			 * copy, bounce_copy_vec already uses tovec-&gt;bv_len</div><div class='del'>-			 */</div><div class='del'>-			memcpy_to_bvec(&amp;tovec, page_address(fromvec.bv_page) +</div><div class='del'>-				       tovec.bv_offset);</div><div class='del'>-		}</div><div class='del'>-		bio_advance_iter(from, &amp;from_iter, tovec.bv_len);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bounce_end_io(struct bio *bio)</div><div class='del'>-{</div><div class='del'>-	struct bio *bio_orig = bio-&gt;bi_private;</div><div class='del'>-	struct bio_vec *bvec, orig_vec;</div><div class='del'>-	struct bvec_iter orig_iter = bio_orig-&gt;bi_iter;</div><div class='del'>-	struct bvec_iter_all iter_all;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * free up bounce indirect pages used</div><div class='del'>-	 */</div><div class='del'>-	bio_for_each_segment_all(bvec, bio, iter_all) {</div><div class='del'>-		orig_vec = bio_iter_iovec(bio_orig, orig_iter);</div><div class='del'>-		if (bvec-&gt;bv_page != orig_vec.bv_page) {</div><div class='del'>-			dec_zone_page_state(bvec-&gt;bv_page, NR_BOUNCE);</div><div class='del'>-			mempool_free(bvec-&gt;bv_page, &amp;page_pool);</div><div class='del'>-		}</div><div class='del'>-		bio_advance_iter(bio_orig, &amp;orig_iter, orig_vec.bv_len);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bio_orig-&gt;bi_status = bio-&gt;bi_status;</div><div class='del'>-	bio_endio(bio_orig);</div><div class='del'>-	bio_put(bio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bounce_end_io_write(struct bio *bio)</div><div class='del'>-{</div><div class='del'>-	bounce_end_io(bio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bounce_end_io_read(struct bio *bio)</div><div class='del'>-{</div><div class='del'>-	struct bio *bio_orig = bio-&gt;bi_private;</div><div class='del'>-</div><div class='del'>-	if (!bio-&gt;bi_status)</div><div class='del'>-		copy_to_high_bio_irq(bio_orig, bio);</div><div class='del'>-</div><div class='del'>-	bounce_end_io(bio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct bio *bounce_clone_bio(struct bio *bio_src)</div><div class='del'>-{</div><div class='del'>-	struct bvec_iter iter;</div><div class='del'>-	struct bio_vec bv;</div><div class='del'>-	struct bio *bio;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Pre immutable biovecs, __bio_clone() used to just do a memcpy from</div><div class='del'>-	 * bio_src-&gt;bi_io_vec to bio-&gt;bi_io_vec.</div><div class='del'>-	 *</div><div class='del'>-	 * We can't do that anymore, because:</div><div class='del'>-	 *</div><div class='del'>-	 *  - The point of cloning the biovec is to produce a bio with a biovec</div><div class='del'>-	 *    the caller can modify: bi_idx and bi_bvec_done should be 0.</div><div class='del'>-	 *</div><div class='del'>-	 *  - The original bio could've had more than BIO_MAX_VECS biovecs; if</div><div class='del'>-	 *    we tried to clone the whole thing bio_alloc_bioset() would fail.</div><div class='del'>-	 *    But the clone should succeed as long as the number of biovecs we</div><div class='del'>-	 *    actually need to allocate is fewer than BIO_MAX_VECS.</div><div class='del'>-	 *</div><div class='del'>-	 *  - Lastly, bi_vcnt should not be looked at or relied upon by code</div><div class='del'>-	 *    that does not own the bio - reason being drivers don't use it for</div><div class='del'>-	 *    iterating over the biovec anymore, so expecting it to be kept up</div><div class='del'>-	 *    to date (i.e. for clones that share the parent biovec) is just</div><div class='del'>-	 *    asking for trouble and would force extra work.</div><div class='del'>-	 */</div><div class='del'>-	bio = bio_alloc_bioset(bio_src-&gt;bi_bdev, bio_segments(bio_src),</div><div class='del'>-			       bio_src-&gt;bi_opf, GFP_NOIO, &amp;bounce_bio_set);</div><div class='del'>-	if (bio_flagged(bio_src, BIO_REMAPPED))</div><div class='del'>-		bio_set_flag(bio, BIO_REMAPPED);</div><div class='del'>-	bio-&gt;bi_ioprio		= bio_src-&gt;bi_ioprio;</div><div class='del'>-	bio-&gt;bi_write_hint	= bio_src-&gt;bi_write_hint;</div><div class='del'>-	bio-&gt;bi_iter.bi_sector	= bio_src-&gt;bi_iter.bi_sector;</div><div class='del'>-	bio-&gt;bi_iter.bi_size	= bio_src-&gt;bi_iter.bi_size;</div><div class='del'>-</div><div class='del'>-	switch (bio_op(bio)) {</div><div class='del'>-	case REQ_OP_DISCARD:</div><div class='del'>-	case REQ_OP_SECURE_ERASE:</div><div class='del'>-	case REQ_OP_WRITE_ZEROES:</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		bio_for_each_segment(bv, bio_src, iter)</div><div class='del'>-			bio-&gt;bi_io_vec[bio-&gt;bi_vcnt++] = bv;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bio_crypt_clone(bio, bio_src, GFP_NOIO) &lt; 0)</div><div class='del'>-		goto err_put;</div><div class='del'>-</div><div class='del'>-	if (bio_integrity(bio_src) &amp;&amp;</div><div class='del'>-	    bio_integrity_clone(bio, bio_src, GFP_NOIO) &lt; 0)</div><div class='del'>-		goto err_put;</div><div class='del'>-</div><div class='del'>-	bio_clone_blkg_association(bio, bio_src);</div><div class='del'>-</div><div class='del'>-	return bio;</div><div class='del'>-</div><div class='del'>-err_put:</div><div class='del'>-	bio_put(bio);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct bio *__blk_queue_bounce(struct bio *bio_orig, struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	struct bio *bio;</div><div class='del'>-	int rw = bio_data_dir(bio_orig);</div><div class='del'>-	struct bio_vec *to, from;</div><div class='del'>-	struct bvec_iter iter;</div><div class='del'>-	unsigned i = 0, bytes = 0;</div><div class='del'>-	bool bounce = false;</div><div class='del'>-	int sectors;</div><div class='del'>-</div><div class='del'>-	bio_for_each_segment(from, bio_orig, iter) {</div><div class='del'>-		if (i++ &lt; BIO_MAX_VECS)</div><div class='del'>-			bytes += from.bv_len;</div><div class='del'>-		if (PageHighMem(from.bv_page))</div><div class='del'>-			bounce = true;</div><div class='del'>-	}</div><div class='del'>-	if (!bounce)</div><div class='del'>-		return bio_orig;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Individual bvecs might not be logical block aligned. Round down</div><div class='del'>-	 * the split size so that each bio is properly block size aligned,</div><div class='del'>-	 * even if we do not use the full hardware limits.</div><div class='del'>-	 */</div><div class='del'>-	sectors = ALIGN_DOWN(bytes, queue_logical_block_size(q)) &gt;&gt;</div><div class='del'>-			SECTOR_SHIFT;</div><div class='del'>-	if (sectors &lt; bio_sectors(bio_orig)) {</div><div class='del'>-		bio = bio_split(bio_orig, sectors, GFP_NOIO, &amp;bounce_bio_split);</div><div class='del'>-		bio_chain(bio, bio_orig);</div><div class='del'>-		submit_bio_noacct(bio_orig);</div><div class='del'>-		bio_orig = bio;</div><div class='del'>-	}</div><div class='del'>-	bio = bounce_clone_bio(bio_orig);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Bvec table can't be updated by bio_for_each_segment_all(),</div><div class='del'>-	 * so retrieve bvec from the table directly. This way is safe</div><div class='del'>-	 * because the 'bio' is single-page bvec.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0, to = bio-&gt;bi_io_vec; i &lt; bio-&gt;bi_vcnt; to++, i++) {</div><div class='del'>-		struct page *bounce_page;</div><div class='del'>-</div><div class='del'>-		if (!PageHighMem(to-&gt;bv_page))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		bounce_page = mempool_alloc(&amp;page_pool, GFP_NOIO);</div><div class='del'>-		inc_zone_page_state(bounce_page, NR_BOUNCE);</div><div class='del'>-</div><div class='del'>-		if (rw == WRITE) {</div><div class='del'>-			flush_dcache_page(to-&gt;bv_page);</div><div class='del'>-			memcpy_from_bvec(page_address(bounce_page), to);</div><div class='del'>-		}</div><div class='del'>-		to-&gt;bv_page = bounce_page;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	trace_block_bio_bounce(bio_orig);</div><div class='del'>-</div><div class='del'>-	bio-&gt;bi_flags |= (1 &lt;&lt; BIO_BOUNCED);</div><div class='del'>-</div><div class='del'>-	if (rw == READ)</div><div class='del'>-		bio-&gt;bi_end_io = bounce_end_io_read;</div><div class='del'>-	else</div><div class='del'>-		bio-&gt;bi_end_io = bounce_end_io_write;</div><div class='del'>-</div><div class='del'>-	bio-&gt;bi_private = bio_orig;</div><div class='del'>-	return bio;</div><div class='del'>-}</div><div class='head'>diff --git a/block/elevator.c b/block/elevator.c<br/>index b4d08026b02c..ab22542e6cf0 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/elevator.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/elevator.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/elevator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/elevator.c</a></div><div class='hunk'>@@ -45,6 +45,17 @@</div><div class='ctx'> #include "blk-wbt.h"</div><div class='ctx'> #include "blk-cgroup.h"</div><div class='ctx'> </div><div class='add'>+/* Holding context data for changing elevator */</div><div class='add'>+struct elv_change_ctx {</div><div class='add'>+	const char *name;</div><div class='add'>+	bool no_uevent;</div><div class='add'>+</div><div class='add'>+	/* for unregistering old elevator */</div><div class='add'>+	struct elevator_queue *old;</div><div class='add'>+	/* for registering new elevator */</div><div class='add'>+	struct elevator_queue *new;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static DEFINE_SPINLOCK(elv_list_lock);</div><div class='ctx'> static LIST_HEAD(elv_list);</div><div class='ctx'> </div><div class='hunk'>@@ -148,18 +159,18 @@ static void elevator_release(struct kobject *kobj)</div><div class='ctx'> 	kfree(e);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void elevator_exit(struct request_queue *q)</div><div class='add'>+static void elevator_exit(struct request_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct elevator_queue *e = q-&gt;elevator;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;q-&gt;elevator_lock);</div><div class='add'>+</div><div class='ctx'> 	ioc_clear_queue(q);</div><div class='ctx'> 	blk_mq_sched_free_rqs(q);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;e-&gt;sysfs_lock);</div><div class='ctx'> 	blk_mq_exit_sched(q, e);</div><div class='ctx'> 	mutex_unlock(&amp;e-&gt;sysfs_lock);</div><div class='del'>-</div><div class='del'>-	kobject_put(&amp;e-&gt;kobj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void __elv_rqhash_del(struct request *rq)</div><div class='hunk'>@@ -412,14 +423,15 @@ elv_attr_show(struct kobject *kobj, struct attribute *attr, char *page)</div><div class='ctx'> {</div><div class='ctx'> 	const struct elv_fs_entry *entry = to_elv(attr);</div><div class='ctx'> 	struct elevator_queue *e;</div><div class='del'>-	ssize_t error;</div><div class='add'>+	ssize_t error = -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (!entry-&gt;show)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	e = container_of(kobj, struct elevator_queue, kobj);</div><div class='ctx'> 	mutex_lock(&amp;e-&gt;sysfs_lock);</div><div class='del'>-	error = e-&gt;type ? entry-&gt;show(e, page) : -ENOENT;</div><div class='add'>+	if (!test_bit(ELEVATOR_FLAG_DYING, &amp;e-&gt;flags))</div><div class='add'>+		error = entry-&gt;show(e, page);</div><div class='ctx'> 	mutex_unlock(&amp;e-&gt;sysfs_lock);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='hunk'>@@ -430,14 +442,15 @@ elv_attr_store(struct kobject *kobj, struct attribute *attr,</div><div class='ctx'> {</div><div class='ctx'> 	const struct elv_fs_entry *entry = to_elv(attr);</div><div class='ctx'> 	struct elevator_queue *e;</div><div class='del'>-	ssize_t error;</div><div class='add'>+	ssize_t error = -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (!entry-&gt;store)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	e = container_of(kobj, struct elevator_queue, kobj);</div><div class='ctx'> 	mutex_lock(&amp;e-&gt;sysfs_lock);</div><div class='del'>-	error = e-&gt;type ? entry-&gt;store(e, page, length) : -ENOENT;</div><div class='add'>+	if (!test_bit(ELEVATOR_FLAG_DYING, &amp;e-&gt;flags))</div><div class='add'>+		error = entry-&gt;store(e, page, length);</div><div class='ctx'> 	mutex_unlock(&amp;e-&gt;sysfs_lock);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='hunk'>@@ -452,13 +465,12 @@ static const struct kobj_type elv_ktype = {</div><div class='ctx'> 	.release	= elevator_release,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int elv_register_queue(struct request_queue *q, bool uevent)</div><div class='add'>+static int elv_register_queue(struct request_queue *q,</div><div class='add'>+			      struct elevator_queue *e,</div><div class='add'>+			      bool uevent)</div><div class='ctx'> {</div><div class='del'>-	struct elevator_queue *e = q-&gt;elevator;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='del'>-	lockdep_assert_held(&amp;q-&gt;elevator_lock);</div><div class='del'>-</div><div class='ctx'> 	error = kobject_add(&amp;e-&gt;kobj, &amp;q-&gt;disk-&gt;queue_kobj, "iosched");</div><div class='ctx'> 	if (!error) {</div><div class='ctx'> 		const struct elv_fs_entry *attr = e-&gt;type-&gt;elevator_attrs;</div><div class='hunk'>@@ -472,20 +484,25 @@ int elv_register_queue(struct request_queue *q, bool uevent)</div><div class='ctx'> 		if (uevent)</div><div class='ctx'> 			kobject_uevent(&amp;e-&gt;kobj, KOBJ_ADD);</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * Sched is initialized, it is ready to export it via</div><div class='add'>+		 * debugfs</div><div class='add'>+		 */</div><div class='add'>+		blk_mq_sched_reg_debugfs(q);</div><div class='ctx'> 		set_bit(ELEVATOR_FLAG_REGISTERED, &amp;e-&gt;flags);</div><div class='ctx'> 	}</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void elv_unregister_queue(struct request_queue *q)</div><div class='add'>+static void elv_unregister_queue(struct request_queue *q,</div><div class='add'>+				 struct elevator_queue *e)</div><div class='ctx'> {</div><div class='del'>-	struct elevator_queue *e = q-&gt;elevator;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;q-&gt;elevator_lock);</div><div class='del'>-</div><div class='ctx'> 	if (e &amp;&amp; test_and_clear_bit(ELEVATOR_FLAG_REGISTERED, &amp;e-&gt;flags)) {</div><div class='ctx'> 		kobject_uevent(&amp;e-&gt;kobj, KOBJ_REMOVE);</div><div class='ctx'> 		kobject_del(&amp;e-&gt;kobj);</div><div class='add'>+</div><div class='add'>+		/* unexport via debugfs before exiting sched */</div><div class='add'>+		blk_mq_sched_unreg_debugfs(q);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -548,159 +565,194 @@ void elv_unregister(struct elevator_type *e)</div><div class='ctx'> EXPORT_SYMBOL_GPL(elv_unregister);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * For single queue devices, default to using mq-deadline. If we have multiple</div><div class='del'>- * queues or mq-deadline is not available, default to "none".</div><div class='del'>- */</div><div class='del'>-static struct elevator_type *elevator_get_default(struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	if (q-&gt;tag_set-&gt;flags &amp; BLK_MQ_F_NO_SCHED_BY_DEFAULT)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	if (q-&gt;nr_hw_queues != 1 &amp;&amp;</div><div class='del'>-	    !blk_mq_is_shared_tags(q-&gt;tag_set-&gt;flags))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return elevator_find_get("mq-deadline");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Use the default elevator settings. If the chosen elevator initialization</div><div class='del'>- * fails, fall back to the "none" elevator (no elevator).</div><div class='del'>- */</div><div class='del'>-void elevator_init_mq(struct request_queue *q)</div><div class='del'>-{</div><div class='del'>-	struct elevator_type *e;</div><div class='del'>-	unsigned int memflags;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(blk_queue_registered(q));</div><div class='del'>-</div><div class='del'>-	if (unlikely(q-&gt;elevator))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	e = elevator_get_default(q);</div><div class='del'>-	if (!e)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We are called before adding disk, when there isn't any FS I/O,</div><div class='del'>-	 * so freezing queue plus canceling dispatch work is enough to</div><div class='del'>-	 * drain any dispatch activities originated from passthrough</div><div class='del'>-	 * requests, then no need to quiesce queue which may add long boot</div><div class='del'>-	 * latency, especially when lots of disks are involved.</div><div class='del'>-	 *</div><div class='del'>-	 * Disk isn't added yet, so verifying queue lock only manually.</div><div class='del'>-	 */</div><div class='del'>-	memflags = blk_mq_freeze_queue(q);</div><div class='del'>-</div><div class='del'>-	blk_mq_cancel_work_sync(q);</div><div class='del'>-</div><div class='del'>-	err = blk_mq_init_sched(q, e);</div><div class='del'>-</div><div class='del'>-	blk_mq_unfreeze_queue(q, memflags);</div><div class='del'>-</div><div class='del'>-	if (err) {</div><div class='del'>-		pr_warn("\"%s\" elevator initialization failed, "</div><div class='del'>-			"falling back to \"none\"\n", e-&gt;elevator_name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	elevator_put(e);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Switch to new_e io scheduler.</div><div class='ctx'>  *</div><div class='ctx'>  * If switching fails, we are most likely running out of memory and not able</div><div class='ctx'>  * to restore the old io scheduler, so leaving the io scheduler being none.</div><div class='ctx'>  */</div><div class='del'>-int elevator_switch(struct request_queue *q, struct elevator_type *new_e)</div><div class='add'>+static int elevator_switch(struct request_queue *q, struct elv_change_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	unsigned int memflags;</div><div class='del'>-	int ret;</div><div class='add'>+	struct elevator_type *new_e = NULL;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	WARN_ON_ONCE(q-&gt;mq_freeze_depth == 0);</div><div class='ctx'> 	lockdep_assert_held(&amp;q-&gt;elevator_lock);</div><div class='ctx'> </div><div class='del'>-	memflags = blk_mq_freeze_queue(q);</div><div class='add'>+	if (strncmp(ctx-&gt;name, "none", 4)) {</div><div class='add'>+		new_e = elevator_find_get(ctx-&gt;name);</div><div class='add'>+		if (!new_e)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	blk_mq_quiesce_queue(q);</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;elevator) {</div><div class='del'>-		elv_unregister_queue(q);</div><div class='add'>+		ctx-&gt;old = q-&gt;elevator;</div><div class='ctx'> 		elevator_exit(q);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = blk_mq_init_sched(q, new_e);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_unfreeze;</div><div class='del'>-</div><div class='del'>-	ret = elv_register_queue(q, true);</div><div class='del'>-	if (ret) {</div><div class='del'>-		elevator_exit(q);</div><div class='del'>-		goto out_unfreeze;</div><div class='add'>+	if (new_e) {</div><div class='add'>+		ret = blk_mq_init_sched(q, new_e);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_unfreeze;</div><div class='add'>+		ctx-&gt;new = q-&gt;elevator;</div><div class='add'>+	} else {</div><div class='add'>+		blk_queue_flag_clear(QUEUE_FLAG_SQ_SCHED, q);</div><div class='add'>+		q-&gt;elevator = NULL;</div><div class='add'>+		q-&gt;nr_requests = q-&gt;tag_set-&gt;queue_depth;</div><div class='ctx'> 	}</div><div class='del'>-	blk_add_trace_msg(q, "elv switch: %s", new_e-&gt;elevator_name);</div><div class='add'>+	blk_add_trace_msg(q, "elv switch: %s", ctx-&gt;name);</div><div class='ctx'> </div><div class='ctx'> out_unfreeze:</div><div class='ctx'> 	blk_mq_unquiesce_queue(q);</div><div class='del'>-	blk_mq_unfreeze_queue(q, memflags);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_warn("elv: switch to \"%s\" failed, falling back to \"none\"\n",</div><div class='ctx'> 			new_e-&gt;elevator_name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (new_e)</div><div class='add'>+		elevator_put(new_e);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void elevator_disable(struct request_queue *q)</div><div class='add'>+static void elv_exit_and_release(struct request_queue *q)</div><div class='ctx'> {</div><div class='del'>-	unsigned int memflags;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;q-&gt;elevator_lock);</div><div class='add'>+	struct elevator_queue *e;</div><div class='add'>+	unsigned memflags;</div><div class='ctx'> </div><div class='ctx'> 	memflags = blk_mq_freeze_queue(q);</div><div class='del'>-	blk_mq_quiesce_queue(q);</div><div class='del'>-</div><div class='del'>-	elv_unregister_queue(q);</div><div class='add'>+	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='add'>+	e = q-&gt;elevator;</div><div class='ctx'> 	elevator_exit(q);</div><div class='del'>-	blk_queue_flag_clear(QUEUE_FLAG_SQ_SCHED, q);</div><div class='del'>-	q-&gt;elevator = NULL;</div><div class='del'>-	q-&gt;nr_requests = q-&gt;tag_set-&gt;queue_depth;</div><div class='del'>-	blk_add_trace_msg(q, "elv switch: none");</div><div class='del'>-</div><div class='del'>-	blk_mq_unquiesce_queue(q);</div><div class='add'>+	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='ctx'> 	blk_mq_unfreeze_queue(q, memflags);</div><div class='add'>+	if (e)</div><div class='add'>+		kobject_put(&amp;e-&gt;kobj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int elevator_change_done(struct request_queue *q,</div><div class='add'>+				struct elv_change_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;old) {</div><div class='add'>+		bool enable_wbt = test_bit(ELEVATOR_FLAG_ENABLE_WBT_ON_EXIT,</div><div class='add'>+				&amp;ctx-&gt;old-&gt;flags);</div><div class='add'>+</div><div class='add'>+		elv_unregister_queue(q, ctx-&gt;old);</div><div class='add'>+		kobject_put(&amp;ctx-&gt;old-&gt;kobj);</div><div class='add'>+		if (enable_wbt)</div><div class='add'>+			wbt_enable_default(q-&gt;disk);</div><div class='add'>+	}</div><div class='add'>+	if (ctx-&gt;new) {</div><div class='add'>+		ret = elv_register_queue(q, ctx-&gt;new, !ctx-&gt;no_uevent);</div><div class='add'>+		if (ret)</div><div class='add'>+			elv_exit_and_release(q);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Switch this queue to the given IO scheduler.</div><div class='ctx'>  */</div><div class='del'>-static int elevator_change(struct request_queue *q, const char *elevator_name)</div><div class='add'>+static int elevator_change(struct request_queue *q, struct elv_change_ctx *ctx)</div><div class='ctx'> {</div><div class='del'>-	struct elevator_type *e;</div><div class='del'>-	int ret;</div><div class='add'>+	unsigned int memflags;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	/* Make sure queue is not in the middle of being removed */</div><div class='del'>-	if (!blk_queue_registered(q))</div><div class='del'>-		return -ENOENT;</div><div class='add'>+	lockdep_assert_held(&amp;q-&gt;tag_set-&gt;update_nr_hwq_lock);</div><div class='add'>+</div><div class='add'>+	memflags = blk_mq_freeze_queue(q);</div><div class='add'>+	/*</div><div class='add'>+	 * May be called before adding disk, when there isn't any FS I/O,</div><div class='add'>+	 * so freezing queue plus canceling dispatch work is enough to</div><div class='add'>+	 * drain any dispatch activities originated from passthrough</div><div class='add'>+	 * requests, then no need to quiesce queue which may add long boot</div><div class='add'>+	 * latency, especially when lots of disks are involved.</div><div class='add'>+	 *</div><div class='add'>+	 * Disk isn't added yet, so verifying queue lock only manually.</div><div class='add'>+	 */</div><div class='add'>+	blk_mq_cancel_work_sync(q);</div><div class='add'>+	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='add'>+	if (!(q-&gt;elevator &amp;&amp; elevator_match(q-&gt;elevator-&gt;type, ctx-&gt;name)))</div><div class='add'>+		ret = elevator_switch(q, ctx);</div><div class='add'>+	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='add'>+	blk_mq_unfreeze_queue(q, memflags);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = elevator_change_done(q, ctx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The I/O scheduler depends on the number of hardware queues, this forces a</div><div class='add'>+ * reattachment when nr_hw_queues changes.</div><div class='add'>+ */</div><div class='add'>+void elv_update_nr_hw_queues(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct elv_change_ctx ctx = {};</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(q-&gt;mq_freeze_depth == 0);</div><div class='ctx'> </div><div class='del'>-	if (!strncmp(elevator_name, "none", 4)) {</div><div class='del'>-		if (q-&gt;elevator)</div><div class='del'>-			elevator_disable(q);</div><div class='del'>-		return 0;</div><div class='add'>+	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='add'>+	if (q-&gt;elevator &amp;&amp; !blk_queue_dying(q) &amp;&amp; blk_queue_registered(q)) {</div><div class='add'>+		ctx.name = q-&gt;elevator-&gt;type-&gt;elevator_name;</div><div class='add'>+</div><div class='add'>+		/* force to reattach elevator after nr_hw_queue is updated */</div><div class='add'>+		ret = elevator_switch(q, &amp;ctx);</div><div class='ctx'> 	}</div><div class='add'>+	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='add'>+	blk_mq_unfreeze_queue_nomemrestore(q);</div><div class='add'>+	if (!ret)</div><div class='add'>+		WARN_ON_ONCE(elevator_change_done(q, &amp;ctx));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (q-&gt;elevator &amp;&amp; elevator_match(q-&gt;elevator-&gt;type, elevator_name))</div><div class='del'>-		return 0;</div><div class='add'>+/*</div><div class='add'>+ * Use the default elevator settings. If the chosen elevator initialization</div><div class='add'>+ * fails, fall back to the "none" elevator (no elevator).</div><div class='add'>+ */</div><div class='add'>+void elevator_set_default(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct elv_change_ctx ctx = {</div><div class='add'>+		.name = "mq-deadline",</div><div class='add'>+		.no_uevent = true,</div><div class='add'>+	};</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='del'>-	e = elevator_find_get(elevator_name);</div><div class='del'>-	if (!e)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	ret = elevator_switch(q, e);</div><div class='del'>-	elevator_put(e);</div><div class='del'>-	return ret;</div><div class='add'>+	/* now we allow to switch elevator */</div><div class='add'>+	blk_queue_flag_clear(QUEUE_FLAG_NO_ELV_SWITCH, q);</div><div class='add'>+</div><div class='add'>+	if (q-&gt;tag_set-&gt;flags &amp; BLK_MQ_F_NO_SCHED_BY_DEFAULT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * For single queue devices, default to using mq-deadline. If we</div><div class='add'>+	 * have multiple queues or mq-deadline is not available, default</div><div class='add'>+	 * to "none".</div><div class='add'>+	 */</div><div class='add'>+	if (elevator_find_get(ctx.name) &amp;&amp; (q-&gt;nr_hw_queues == 1 ||</div><div class='add'>+			 blk_mq_is_shared_tags(q-&gt;tag_set-&gt;flags)))</div><div class='add'>+		err = elevator_change(q, &amp;ctx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		pr_warn("\"%s\" elevator initialization, failed %d, "</div><div class='add'>+			"falling back to \"none\"\n", ctx.name, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void elv_iosched_load_module(char *elevator_name)</div><div class='add'>+void elevator_set_none(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct elv_change_ctx ctx = {</div><div class='add'>+		.name	= "none",</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = elevator_change(q, &amp;ctx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		pr_warn("%s: set none elevator failed %d\n", __func__, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void elv_iosched_load_module(const char *elevator_name)</div><div class='ctx'> {</div><div class='ctx'> 	struct elevator_type *found;</div><div class='ctx'> </div><div class='hunk'>@@ -716,10 +768,14 @@ ssize_t elv_iosched_store(struct gendisk *disk, const char *buf,</div><div class='ctx'> 			  size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	char elevator_name[ELV_NAME_MAX];</div><div class='del'>-	char *name;</div><div class='add'>+	struct elv_change_ctx ctx = {};</div><div class='ctx'> 	int ret;</div><div class='del'>-	unsigned int memflags;</div><div class='ctx'> 	struct request_queue *q = disk-&gt;queue;</div><div class='add'>+	struct blk_mq_tag_set *set = q-&gt;tag_set;</div><div class='add'>+</div><div class='add'>+	/* Make sure queue is not in the middle of being removed */</div><div class='add'>+	if (!blk_queue_registered(q))</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the attribute needs to load a module, do it before freezing the</div><div class='hunk'>@@ -727,24 +783,25 @@ ssize_t elv_iosched_store(struct gendisk *disk, const char *buf,</div><div class='ctx'> 	 * queue is the one for the device storing the module file.</div><div class='ctx'> 	 */</div><div class='ctx'> 	strscpy(elevator_name, buf, sizeof(elevator_name));</div><div class='del'>-	name = strstrip(elevator_name);</div><div class='add'>+	ctx.name = strstrip(elevator_name);</div><div class='ctx'> </div><div class='del'>-	elv_iosched_load_module(name);</div><div class='add'>+	elv_iosched_load_module(ctx.name);</div><div class='ctx'> </div><div class='del'>-	memflags = blk_mq_freeze_queue(q);</div><div class='del'>-	mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-	ret = elevator_change(q, name);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = count;</div><div class='del'>-	mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='del'>-	blk_mq_unfreeze_queue(q, memflags);</div><div class='add'>+	down_read(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+	if (!blk_queue_no_elv_switch(q)) {</div><div class='add'>+		ret = elevator_change(q, &amp;ctx);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = count;</div><div class='add'>+	} else {</div><div class='add'>+		ret = -ENOENT;</div><div class='add'>+	}</div><div class='add'>+	up_read(&amp;set-&gt;update_nr_hwq_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> ssize_t elv_iosched_show(struct gendisk *disk, char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = disk-&gt;queue;</div><div class='del'>-	struct elevator_queue *eq = q-&gt;elevator;</div><div class='ctx'> 	struct elevator_type *cur = NULL, *e;</div><div class='ctx'> 	int len = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -753,7 +810,7 @@ ssize_t elv_iosched_show(struct gendisk *disk, char *name)</div><div class='ctx'> 		len += sprintf(name+len, "[none] ");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		len += sprintf(name+len, "none ");</div><div class='del'>-		cur = eq-&gt;type;</div><div class='add'>+		cur = q-&gt;elevator-&gt;type;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;elv_list_lock);</div><div class='head'>diff --git a/block/elevator.h b/block/elevator.h<br/>index e4e44dfac503..a07ce773a38f 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/elevator.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/elevator.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/elevator.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/elevator.h</a></div><div class='hunk'>@@ -121,7 +121,8 @@ struct elevator_queue</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ELEVATOR_FLAG_REGISTERED	0</div><div class='del'>-#define ELEVATOR_FLAG_DISABLE_WBT	1</div><div class='add'>+#define ELEVATOR_FLAG_DYING		1</div><div class='add'>+#define ELEVATOR_FLAG_ENABLE_WBT_ON_EXIT	2</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * block elevator interface</div><div class='hunk'>@@ -182,4 +183,7 @@ extern struct request *elv_rb_find(struct rb_root *, sector_t);</div><div class='ctx'> #define rq_entry_fifo(ptr)	list_entry((ptr), struct request, queuelist)</div><div class='ctx'> #define rq_fifo_clear(rq)	list_del_init(&amp;(rq)-&gt;queuelist)</div><div class='ctx'> </div><div class='add'>+void blk_mq_sched_reg_debugfs(struct request_queue *q);</div><div class='add'>+void blk_mq_sched_unreg_debugfs(struct request_queue *q);</div><div class='add'>+</div><div class='ctx'> #endif /* _ELEVATOR_H */</div><div class='head'>diff --git a/block/fops.c b/block/fops.c<br/>index be9f1dbea9ce..1309861d4c2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/fops.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/fops.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/fops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/fops.c</a></div><div class='hunk'>@@ -73,6 +73,7 @@ static ssize_t __blkdev_direct_IO_simple(struct kiocb *iocb,</div><div class='ctx'> 	}</div><div class='ctx'> 	bio.bi_iter.bi_sector = pos &gt;&gt; SECTOR_SHIFT;</div><div class='ctx'> 	bio.bi_write_hint = file_inode(iocb-&gt;ki_filp)-&gt;i_write_hint;</div><div class='add'>+	bio.bi_write_stream = iocb-&gt;ki_write_stream;</div><div class='ctx'> 	bio.bi_ioprio = iocb-&gt;ki_ioprio;</div><div class='ctx'> 	if (iocb-&gt;ki_flags &amp; IOCB_ATOMIC)</div><div class='ctx'> 		bio.bi_opf |= REQ_ATOMIC;</div><div class='hunk'>@@ -206,6 +207,7 @@ static ssize_t __blkdev_direct_IO(struct kiocb *iocb, struct iov_iter *iter,</div><div class='ctx'> 	for (;;) {</div><div class='ctx'> 		bio-&gt;bi_iter.bi_sector = pos &gt;&gt; SECTOR_SHIFT;</div><div class='ctx'> 		bio-&gt;bi_write_hint = file_inode(iocb-&gt;ki_filp)-&gt;i_write_hint;</div><div class='add'>+		bio-&gt;bi_write_stream = iocb-&gt;ki_write_stream;</div><div class='ctx'> 		bio-&gt;bi_private = dio;</div><div class='ctx'> 		bio-&gt;bi_end_io = blkdev_bio_end_io;</div><div class='ctx'> 		bio-&gt;bi_ioprio = iocb-&gt;ki_ioprio;</div><div class='hunk'>@@ -333,6 +335,7 @@ static ssize_t __blkdev_direct_IO_async(struct kiocb *iocb,</div><div class='ctx'> 	dio-&gt;iocb = iocb;</div><div class='ctx'> 	bio-&gt;bi_iter.bi_sector = pos &gt;&gt; SECTOR_SHIFT;</div><div class='ctx'> 	bio-&gt;bi_write_hint = file_inode(iocb-&gt;ki_filp)-&gt;i_write_hint;</div><div class='add'>+	bio-&gt;bi_write_stream = iocb-&gt;ki_write_stream;</div><div class='ctx'> 	bio-&gt;bi_end_io = blkdev_bio_end_io_async;</div><div class='ctx'> 	bio-&gt;bi_ioprio = iocb-&gt;ki_ioprio;</div><div class='ctx'> </div><div class='hunk'>@@ -398,6 +401,26 @@ static ssize_t blkdev_direct_IO(struct kiocb *iocb, struct iov_iter *iter)</div><div class='ctx'> 	if (blkdev_dio_invalid(bdev, iocb, iter))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (iov_iter_rw(iter) == WRITE) {</div><div class='add'>+		u16 max_write_streams = bdev_max_write_streams(bdev);</div><div class='add'>+</div><div class='add'>+		if (iocb-&gt;ki_write_stream) {</div><div class='add'>+			if (iocb-&gt;ki_write_stream &gt; max_write_streams)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+		} else if (max_write_streams) {</div><div class='add'>+			enum rw_hint write_hint =</div><div class='add'>+				file_inode(iocb-&gt;ki_filp)-&gt;i_write_hint;</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Just use the write hint as write stream for block</div><div class='add'>+			 * device writes.  This assumes no file system is</div><div class='add'>+			 * mounted that would use the streams differently.</div><div class='add'>+			 */</div><div class='add'>+			if (write_hint &lt;= max_write_streams)</div><div class='add'>+				iocb-&gt;ki_write_stream = write_hint;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	nr_pages = bio_iov_vecs_to_alloc(iter, BIO_MAX_VECS + 1);</div><div class='ctx'> 	if (likely(nr_pages &lt;= BIO_MAX_VECS)) {</div><div class='ctx'> 		if (is_sync_kiocb(iocb))</div><div class='hunk'>@@ -451,12 +474,13 @@ static int blkdev_get_block(struct inode *inode, sector_t iblock,</div><div class='ctx'> static int blkdev_writepages(struct address_space *mapping,</div><div class='ctx'> 		struct writeback_control *wbc)</div><div class='ctx'> {</div><div class='add'>+	struct folio *folio = NULL;</div><div class='ctx'> 	struct blk_plug plug;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	blk_start_plug(&amp;plug);</div><div class='del'>-	err = write_cache_pages(mapping, wbc, block_write_full_folio,</div><div class='del'>-			blkdev_get_block);</div><div class='add'>+	while ((folio = writeback_iter(mapping, wbc, folio, &amp;err)))</div><div class='add'>+		err = block_write_full_folio(folio, wbc, blkdev_get_block);</div><div class='ctx'> 	blk_finish_plug(&amp;plug);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -642,7 +666,7 @@ static int blkdev_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	bdev = blkdev_get_no_open(inode-&gt;i_rdev);</div><div class='add'>+	bdev = blkdev_get_no_open(inode-&gt;i_rdev, true);</div><div class='ctx'> 	if (!bdev)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='hunk'>@@ -746,7 +770,14 @@ static ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from)</div><div class='ctx'> 			ret = direct_write_fallback(iocb, from, ret,</div><div class='ctx'> 					blkdev_buffered_write(iocb, from));</div><div class='ctx'> 	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Take i_rwsem and invalidate_lock to avoid racing with</div><div class='add'>+		 * set_blocksize changing i_blkbits/folio order and punching</div><div class='add'>+		 * out the pagecache.</div><div class='add'>+		 */</div><div class='add'>+		inode_lock_shared(bd_inode);</div><div class='ctx'> 		ret = blkdev_buffered_write(iocb, from);</div><div class='add'>+		inode_unlock_shared(bd_inode);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret &gt; 0)</div><div class='hunk'>@@ -757,6 +788,7 @@ static ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from)</div><div class='ctx'> </div><div class='ctx'> static ssize_t blkdev_read_iter(struct kiocb *iocb, struct iov_iter *to)</div><div class='ctx'> {</div><div class='add'>+	struct inode *bd_inode = bdev_file_inode(iocb-&gt;ki_filp);</div><div class='ctx'> 	struct block_device *bdev = I_BDEV(iocb-&gt;ki_filp-&gt;f_mapping-&gt;host);</div><div class='ctx'> 	loff_t size = bdev_nr_bytes(bdev);</div><div class='ctx'> 	loff_t pos = iocb-&gt;ki_pos;</div><div class='hunk'>@@ -793,7 +825,13 @@ static ssize_t blkdev_read_iter(struct kiocb *iocb, struct iov_iter *to)</div><div class='ctx'> 			goto reexpand;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Take i_rwsem and invalidate_lock to avoid racing with set_blocksize</div><div class='add'>+	 * changing i_blkbits/folio order and punching out the pagecache.</div><div class='add'>+	 */</div><div class='add'>+	inode_lock_shared(bd_inode);</div><div class='ctx'> 	ret = filemap_read(iocb, to, ret);</div><div class='add'>+	inode_unlock_shared(bd_inode);</div><div class='ctx'> </div><div class='ctx'> reexpand:</div><div class='ctx'> 	if (unlikely(shorted))</div><div class='hunk'>@@ -836,6 +874,7 @@ static long blkdev_fallocate(struct file *file, int mode, loff_t start,</div><div class='ctx'> 	if ((start | len) &amp; (bdev_logical_block_size(bdev) - 1))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	inode_lock(inode);</div><div class='ctx'> 	filemap_invalidate_lock(inode-&gt;i_mapping);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -868,6 +907,7 @@ static long blkdev_fallocate(struct file *file, int mode, loff_t start,</div><div class='ctx'> </div><div class='ctx'>  fail:</div><div class='ctx'> 	filemap_invalidate_unlock(inode-&gt;i_mapping);</div><div class='add'>+	inode_unlock(inode);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/block/genhd.c b/block/genhd.c<br/>index c2bd86cd09de..8171a6bc3210 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/genhd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/genhd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/genhd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/genhd.c</a></div><div class='hunk'>@@ -125,37 +125,46 @@ static void part_stat_read_all(struct block_device *part,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int part_in_flight(struct block_device *part)</div><div class='add'>+static void bdev_count_inflight_rw(struct block_device *part,</div><div class='add'>+		unsigned int inflight[2], bool mq_driver)</div><div class='ctx'> {</div><div class='del'>-	unsigned int inflight = 0;</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	for_each_possible_cpu(cpu) {</div><div class='del'>-		inflight += part_stat_local_read_cpu(part, in_flight[0], cpu) +</div><div class='del'>-			    part_stat_local_read_cpu(part, in_flight[1], cpu);</div><div class='add'>+	if (mq_driver) {</div><div class='add'>+		blk_mq_in_driver_rw(part, inflight);</div><div class='add'>+	} else {</div><div class='add'>+		for_each_possible_cpu(cpu) {</div><div class='add'>+			inflight[READ] += part_stat_local_read_cpu(</div><div class='add'>+						part, in_flight[READ], cpu);</div><div class='add'>+			inflight[WRITE] += part_stat_local_read_cpu(</div><div class='add'>+						part, in_flight[WRITE], cpu);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	if ((int)inflight &lt; 0)</div><div class='del'>-		inflight = 0;</div><div class='ctx'> </div><div class='del'>-	return inflight;</div><div class='add'>+	if (WARN_ON_ONCE((int)inflight[READ] &lt; 0))</div><div class='add'>+		inflight[READ] = 0;</div><div class='add'>+	if (WARN_ON_ONCE((int)inflight[WRITE] &lt; 0))</div><div class='add'>+		inflight[WRITE] = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void part_in_flight_rw(struct block_device *part,</div><div class='del'>-		unsigned int inflight[2])</div><div class='add'>+/**</div><div class='add'>+ * bdev_count_inflight - get the number of inflight IOs for a block device.</div><div class='add'>+ *</div><div class='add'>+ * @part: the block device.</div><div class='add'>+ *</div><div class='add'>+ * Inflight here means started IO accounting, from bdev_start_io_acct() for</div><div class='add'>+ * bio-based block device, and from blk_account_io_start() for rq-based block</div><div class='add'>+ * device.</div><div class='add'>+ */</div><div class='add'>+unsigned int bdev_count_inflight(struct block_device *part)</div><div class='ctx'> {</div><div class='del'>-	int cpu;</div><div class='add'>+	unsigned int inflight[2] = {0};</div><div class='ctx'> </div><div class='del'>-	inflight[0] = 0;</div><div class='del'>-	inflight[1] = 0;</div><div class='del'>-	for_each_possible_cpu(cpu) {</div><div class='del'>-		inflight[0] += part_stat_local_read_cpu(part, in_flight[0], cpu);</div><div class='del'>-		inflight[1] += part_stat_local_read_cpu(part, in_flight[1], cpu);</div><div class='del'>-	}</div><div class='del'>-	if ((int)inflight[0] &lt; 0)</div><div class='del'>-		inflight[0] = 0;</div><div class='del'>-	if ((int)inflight[1] &lt; 0)</div><div class='del'>-		inflight[1] = 0;</div><div class='add'>+	bdev_count_inflight_rw(part, inflight, false);</div><div class='add'>+</div><div class='add'>+	return inflight[READ] + inflight[WRITE];</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(bdev_count_inflight);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Can be deleted altogether. Later.</div><div class='hunk'>@@ -389,19 +398,35 @@ int disk_scan_partitions(struct gendisk *disk, blk_mode_t mode)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * add_disk_fwnode - add disk information to kernel list with fwnode</div><div class='del'>- * @parent: parent device for the disk</div><div class='del'>- * @disk: per-device partitioning information</div><div class='del'>- * @groups: Additional per-device sysfs groups</div><div class='del'>- * @fwnode: attached disk fwnode</div><div class='del'>- *</div><div class='del'>- * This function registers the partitioning information in @disk</div><div class='del'>- * with the kernel. Also attach a fwnode to the disk device.</div><div class='del'>- */</div><div class='del'>-int __must_check add_disk_fwnode(struct device *parent, struct gendisk *disk,</div><div class='del'>-				 const struct attribute_group **groups,</div><div class='del'>-				 struct fwnode_handle *fwnode)</div><div class='add'>+static void add_disk_final(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	struct device *ddev = disk_to_dev(disk);</div><div class='add'>+</div><div class='add'>+	if (!(disk-&gt;flags &amp; GENHD_FL_HIDDEN)) {</div><div class='add'>+		/* Make sure the first partition scan will be proceed */</div><div class='add'>+		if (get_capacity(disk) &amp;&amp; disk_has_partscan(disk))</div><div class='add'>+			set_bit(GD_NEED_PART_SCAN, &amp;disk-&gt;state);</div><div class='add'>+</div><div class='add'>+		bdev_add(disk-&gt;part0, ddev-&gt;devt);</div><div class='add'>+		if (get_capacity(disk))</div><div class='add'>+			disk_scan_partitions(disk, BLK_OPEN_READ);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Announce the disk and partitions after all partitions are</div><div class='add'>+		 * created. (for hidden disks uevents remain suppressed forever)</div><div class='add'>+		 */</div><div class='add'>+		dev_set_uevent_suppress(ddev, 0);</div><div class='add'>+		disk_uevent(disk, KOBJ_ADD);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	blk_apply_bdi_limits(disk-&gt;bdi, &amp;disk-&gt;queue-&gt;limits);</div><div class='add'>+	disk_add_events(disk);</div><div class='add'>+	set_bit(GD_ADDED, &amp;disk-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __add_disk(struct device *parent, struct gendisk *disk,</div><div class='add'>+		      const struct attribute_group **groups,</div><div class='add'>+		      struct fwnode_handle *fwnode)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='ctx'> 	struct device *ddev = disk_to_dev(disk);</div><div class='hunk'>@@ -416,12 +441,6 @@ int __must_check add_disk_fwnode(struct device *parent, struct gendisk *disk,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (disk-&gt;fops-&gt;submit_bio || disk-&gt;fops-&gt;poll_bio)</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Initialize the I/O scheduler code and pick a default one if</div><div class='del'>-		 * needed.</div><div class='del'>-		 */</div><div class='del'>-		elevator_init_mq(disk-&gt;queue);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (!disk-&gt;fops-&gt;submit_bio)</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -438,7 +457,7 @@ int __must_check add_disk_fwnode(struct device *parent, struct gendisk *disk,</div><div class='ctx'> 	ret = -EINVAL;</div><div class='ctx'> 	if (disk-&gt;major) {</div><div class='ctx'> 		if (WARN_ON(!disk-&gt;minors))</div><div class='del'>-			goto out_exit_elevator;</div><div class='add'>+			goto out;</div><div class='ctx'> </div><div class='ctx'> 		if (disk-&gt;minors &gt; DISK_MAX_PARTS) {</div><div class='ctx'> 			pr_err("block: can't allocate more than %d partitions\n",</div><div class='hunk'>@@ -448,14 +467,14 @@ int __must_check add_disk_fwnode(struct device *parent, struct gendisk *disk,</div><div class='ctx'> 		if (disk-&gt;first_minor &gt; MINORMASK ||</div><div class='ctx'> 		    disk-&gt;minors &gt; MINORMASK + 1 ||</div><div class='ctx'> 		    disk-&gt;first_minor + disk-&gt;minors &gt; MINORMASK + 1)</div><div class='del'>-			goto out_exit_elevator;</div><div class='add'>+			goto out;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (WARN_ON(disk-&gt;minors))</div><div class='del'>-			goto out_exit_elevator;</div><div class='add'>+			goto out;</div><div class='ctx'> </div><div class='ctx'> 		ret = blk_alloc_ext_minor();</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto out_exit_elevator;</div><div class='add'>+			goto out;</div><div class='ctx'> 		disk-&gt;major = BLOCK_EXT_MAJOR;</div><div class='ctx'> 		disk-&gt;first_minor = ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -516,21 +535,6 @@ int __must_check add_disk_fwnode(struct device *parent, struct gendisk *disk,</div><div class='ctx'> 					&amp;disk-&gt;bdi-&gt;dev-&gt;kobj, "bdi");</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out_unregister_bdi;</div><div class='del'>-</div><div class='del'>-		/* Make sure the first partition scan will be proceed */</div><div class='del'>-		if (get_capacity(disk) &amp;&amp; disk_has_partscan(disk))</div><div class='del'>-			set_bit(GD_NEED_PART_SCAN, &amp;disk-&gt;state);</div><div class='del'>-</div><div class='del'>-		bdev_add(disk-&gt;part0, ddev-&gt;devt);</div><div class='del'>-		if (get_capacity(disk))</div><div class='del'>-			disk_scan_partitions(disk, BLK_OPEN_READ);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Announce the disk and partitions after all partitions are</div><div class='del'>-		 * created. (for hidden disks uevents remain suppressed forever)</div><div class='del'>-		 */</div><div class='del'>-		dev_set_uevent_suppress(ddev, 0);</div><div class='del'>-		disk_uevent(disk, KOBJ_ADD);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Even if the block_device for a hidden gendisk is not</div><div class='hunk'>@@ -539,10 +543,6 @@ int __must_check add_disk_fwnode(struct device *parent, struct gendisk *disk,</div><div class='ctx'> 		 */</div><div class='ctx'> 		disk-&gt;part0-&gt;bd_dev = MKDEV(disk-&gt;major, disk-&gt;first_minor);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	blk_apply_bdi_limits(disk-&gt;bdi, &amp;disk-&gt;queue-&gt;limits);</div><div class='del'>-	disk_add_events(disk);</div><div class='del'>-	set_bit(GD_ADDED, &amp;disk-&gt;state);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_unregister_bdi:</div><div class='hunk'>@@ -564,12 +564,46 @@ out_device_del:</div><div class='ctx'> out_free_ext_minor:</div><div class='ctx'> 	if (disk-&gt;major == BLOCK_EXT_MAJOR)</div><div class='ctx'> 		blk_free_ext_minor(disk-&gt;first_minor);</div><div class='del'>-out_exit_elevator:</div><div class='del'>-	if (disk-&gt;queue-&gt;elevator) {</div><div class='del'>-		mutex_lock(&amp;disk-&gt;queue-&gt;elevator_lock);</div><div class='del'>-		elevator_exit(disk-&gt;queue);</div><div class='del'>-		mutex_unlock(&amp;disk-&gt;queue-&gt;elevator_lock);</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * add_disk_fwnode - add disk information to kernel list with fwnode</div><div class='add'>+ * @parent: parent device for the disk</div><div class='add'>+ * @disk: per-device partitioning information</div><div class='add'>+ * @groups: Additional per-device sysfs groups</div><div class='add'>+ * @fwnode: attached disk fwnode</div><div class='add'>+ *</div><div class='add'>+ * This function registers the partitioning information in @disk</div><div class='add'>+ * with the kernel. Also attach a fwnode to the disk device.</div><div class='add'>+ */</div><div class='add'>+int __must_check add_disk_fwnode(struct device *parent, struct gendisk *disk,</div><div class='add'>+				 const struct attribute_group **groups,</div><div class='add'>+				 struct fwnode_handle *fwnode)</div><div class='add'>+{</div><div class='add'>+	struct blk_mq_tag_set *set;</div><div class='add'>+	unsigned int memflags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (queue_is_mq(disk-&gt;queue)) {</div><div class='add'>+		set = disk-&gt;queue-&gt;tag_set;</div><div class='add'>+		memflags = memalloc_noio_save();</div><div class='add'>+		down_read(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+		ret = __add_disk(parent, disk, groups, fwnode);</div><div class='add'>+		up_read(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+		memalloc_noio_restore(memflags);</div><div class='add'>+	} else {</div><div class='add'>+		ret = __add_disk(parent, disk, groups, fwnode);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * add_disk_final() needn't to read `nr_hw_queues`, so move it out</div><div class='add'>+	 * of read lock `set-&gt;update_nr_hwq_lock` for avoiding unnecessary</div><div class='add'>+	 * lock dependency on `disk-&gt;open_mutex` from scanning partition.</div><div class='add'>+	 */</div><div class='add'>+	if (!ret)</div><div class='add'>+		add_disk_final(disk);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(add_disk_fwnode);</div><div class='hunk'>@@ -652,26 +686,7 @@ void blk_mark_disk_dead(struct gendisk *disk)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(blk_mark_disk_dead);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * del_gendisk - remove the gendisk</div><div class='del'>- * @disk: the struct gendisk to remove</div><div class='del'>- *</div><div class='del'>- * Removes the gendisk and all its associated resources. This deletes the</div><div class='del'>- * partitions associated with the gendisk, and unregisters the associated</div><div class='del'>- * request_queue.</div><div class='del'>- *</div><div class='del'>- * This is the counter to the respective __device_add_disk() call.</div><div class='del'>- *</div><div class='del'>- * The final removal of the struct gendisk happens when its refcount reaches 0</div><div class='del'>- * with put_disk(), which should be called after del_gendisk(), if</div><div class='del'>- * __device_add_disk() was used.</div><div class='del'>- *</div><div class='del'>- * Drivers exist which depend on the release of the gendisk to be synchronous,</div><div class='del'>- * it should not be deferred.</div><div class='del'>- *</div><div class='del'>- * Context: can sleep</div><div class='del'>- */</div><div class='del'>-void del_gendisk(struct gendisk *disk)</div><div class='add'>+static void __del_gendisk(struct gendisk *disk)</div><div class='ctx'> {</div><div class='ctx'> 	struct request_queue *q = disk-&gt;queue;</div><div class='ctx'> 	struct block_device *part;</div><div class='hunk'>@@ -743,14 +758,7 @@ void del_gendisk(struct gendisk *disk)</div><div class='ctx'> 	if (queue_is_mq(q))</div><div class='ctx'> 		blk_mq_cancel_work_sync(q);</div><div class='ctx'> </div><div class='del'>-	blk_mq_quiesce_queue(q);</div><div class='del'>-	if (q-&gt;elevator) {</div><div class='del'>-		mutex_lock(&amp;q-&gt;elevator_lock);</div><div class='del'>-		elevator_exit(q);</div><div class='del'>-		mutex_unlock(&amp;q-&gt;elevator_lock);</div><div class='del'>-	}</div><div class='ctx'> 	rq_qos_exit(q);</div><div class='del'>-	blk_mq_unquiesce_queue(q);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the disk does not own the queue, allow using passthrough requests</div><div class='hunk'>@@ -764,6 +772,55 @@ void del_gendisk(struct gendisk *disk)</div><div class='ctx'> 	if (start_drain)</div><div class='ctx'> 		blk_unfreeze_release_lock(q);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void disable_elv_switch(struct request_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct blk_mq_tag_set *set = q-&gt;tag_set;</div><div class='add'>+	WARN_ON_ONCE(!queue_is_mq(q));</div><div class='add'>+</div><div class='add'>+	down_write(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+	blk_queue_flag_set(QUEUE_FLAG_NO_ELV_SWITCH, q);</div><div class='add'>+	up_write(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * del_gendisk - remove the gendisk</div><div class='add'>+ * @disk: the struct gendisk to remove</div><div class='add'>+ *</div><div class='add'>+ * Removes the gendisk and all its associated resources. This deletes the</div><div class='add'>+ * partitions associated with the gendisk, and unregisters the associated</div><div class='add'>+ * request_queue.</div><div class='add'>+ *</div><div class='add'>+ * This is the counter to the respective __device_add_disk() call.</div><div class='add'>+ *</div><div class='add'>+ * The final removal of the struct gendisk happens when its refcount reaches 0</div><div class='add'>+ * with put_disk(), which should be called after del_gendisk(), if</div><div class='add'>+ * __device_add_disk() was used.</div><div class='add'>+ *</div><div class='add'>+ * Drivers exist which depend on the release of the gendisk to be synchronous,</div><div class='add'>+ * it should not be deferred.</div><div class='add'>+ *</div><div class='add'>+ * Context: can sleep</div><div class='add'>+ */</div><div class='add'>+void del_gendisk(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	struct blk_mq_tag_set *set;</div><div class='add'>+	unsigned int memflags;</div><div class='add'>+</div><div class='add'>+	if (!queue_is_mq(disk-&gt;queue)) {</div><div class='add'>+		__del_gendisk(disk);</div><div class='add'>+	} else {</div><div class='add'>+		set = disk-&gt;queue-&gt;tag_set;</div><div class='add'>+</div><div class='add'>+		disable_elv_switch(disk-&gt;queue);</div><div class='add'>+</div><div class='add'>+		memflags = memalloc_noio_save();</div><div class='add'>+		down_read(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+		__del_gendisk(disk);</div><div class='add'>+		up_read(&amp;set-&gt;update_nr_hwq_lock);</div><div class='add'>+		memalloc_noio_restore(memflags);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(del_gendisk);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1005,7 +1062,7 @@ ssize_t part_stat_show(struct device *dev,</div><div class='ctx'> 	struct disk_stats stat;</div><div class='ctx'> 	unsigned int inflight;</div><div class='ctx'> </div><div class='del'>-	inflight = part_in_flight(bdev);</div><div class='add'>+	inflight = bdev_count_inflight(bdev);</div><div class='ctx'> 	if (inflight) {</div><div class='ctx'> 		part_stat_lock();</div><div class='ctx'> 		update_io_ticks(bdev, jiffies, true);</div><div class='hunk'>@@ -1042,19 +1099,21 @@ ssize_t part_stat_show(struct device *dev,</div><div class='ctx'> 		(unsigned int)div_u64(stat.nsecs[STAT_FLUSH], NSEC_PER_MSEC));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Show the number of IOs issued to driver.</div><div class='add'>+ * For bio-based device, started from bdev_start_io_acct();</div><div class='add'>+ * For rq-based device, started from blk_mq_start_request();</div><div class='add'>+ */</div><div class='ctx'> ssize_t part_inflight_show(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 			   char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct block_device *bdev = dev_to_bdev(dev);</div><div class='ctx'> 	struct request_queue *q = bdev_get_queue(bdev);</div><div class='del'>-	unsigned int inflight[2];</div><div class='add'>+	unsigned int inflight[2] = {0};</div><div class='ctx'> </div><div class='del'>-	if (queue_is_mq(q))</div><div class='del'>-		blk_mq_in_flight_rw(q, bdev, inflight);</div><div class='del'>-	else</div><div class='del'>-		part_in_flight_rw(bdev, inflight);</div><div class='add'>+	bdev_count_inflight_rw(bdev, inflight, queue_is_mq(q));</div><div class='ctx'> </div><div class='del'>-	return sysfs_emit(buf, "%8u %8u\n", inflight[0], inflight[1]);</div><div class='add'>+	return sysfs_emit(buf, "%8u %8u\n", inflight[READ], inflight[WRITE]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t disk_capability_show(struct device *dev,</div><div class='hunk'>@@ -1307,7 +1366,7 @@ static int diskstats_show(struct seq_file *seqf, void *v)</div><div class='ctx'> 		if (bdev_is_partition(hd) &amp;&amp; !bdev_nr_sectors(hd))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		inflight = part_in_flight(hd);</div><div class='add'>+		inflight = bdev_count_inflight(hd);</div><div class='ctx'> 		if (inflight) {</div><div class='ctx'> 			part_stat_lock();</div><div class='ctx'> 			update_io_ticks(hd, jiffies, true);</div><div class='hunk'>@@ -1422,6 +1481,7 @@ struct gendisk *__alloc_disk_node(struct request_queue *q, int node_id,</div><div class='ctx'> #ifdef CONFIG_BLOCK_HOLDER_DEPRECATED</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;disk-&gt;slave_bdevs);</div><div class='ctx'> #endif</div><div class='add'>+	mutex_init(&amp;disk-&gt;rqos_state_mutex);</div><div class='ctx'> 	return disk;</div><div class='ctx'> </div><div class='ctx'> out_erase_part0:</div><div class='head'>diff --git a/block/ioctl.c b/block/ioctl.c<br/>index faa40f383e27..e472cc1030c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/ioctl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/ioctl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/ioctl.c</a></div><div class='hunk'>@@ -142,6 +142,7 @@ static int blk_ioctl_discard(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	inode_lock(bdev-&gt;bd_mapping-&gt;host);</div><div class='ctx'> 	filemap_invalidate_lock(bdev-&gt;bd_mapping);</div><div class='ctx'> 	err = truncate_bdev_range(bdev, mode, start, start + len - 1);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -174,6 +175,7 @@ out_unplug:</div><div class='ctx'> 	blk_finish_plug(&amp;plug);</div><div class='ctx'> fail:</div><div class='ctx'> 	filemap_invalidate_unlock(bdev-&gt;bd_mapping);</div><div class='add'>+	inode_unlock(bdev-&gt;bd_mapping-&gt;host);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -199,12 +201,14 @@ static int blk_ioctl_secure_erase(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 	    end &gt; bdev_nr_bytes(bdev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	inode_lock(bdev-&gt;bd_mapping-&gt;host);</div><div class='ctx'> 	filemap_invalidate_lock(bdev-&gt;bd_mapping);</div><div class='ctx'> 	err = truncate_bdev_range(bdev, mode, start, end - 1);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		err = blkdev_issue_secure_erase(bdev, start &gt;&gt; 9, len &gt;&gt; 9,</div><div class='ctx'> 						GFP_KERNEL);</div><div class='ctx'> 	filemap_invalidate_unlock(bdev-&gt;bd_mapping);</div><div class='add'>+	inode_unlock(bdev-&gt;bd_mapping-&gt;host);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -236,6 +240,7 @@ static int blk_ioctl_zeroout(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Invalidate the page cache, including dirty pages */</div><div class='add'>+	inode_lock(bdev-&gt;bd_mapping-&gt;host);</div><div class='ctx'> 	filemap_invalidate_lock(bdev-&gt;bd_mapping);</div><div class='ctx'> 	err = truncate_bdev_range(bdev, mode, start, end);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -246,6 +251,7 @@ static int blk_ioctl_zeroout(struct block_device *bdev, blk_mode_t mode,</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='ctx'> 	filemap_invalidate_unlock(bdev-&gt;bd_mapping);</div><div class='add'>+	inode_unlock(bdev-&gt;bd_mapping-&gt;host);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/block/ioprio.c b/block/ioprio.c<br/>index 73301a261429..f0ee2798539c 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/ioprio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/ioprio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/ioprio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/ioprio.c</a></div><div class='hunk'>@@ -46,12 +46,8 @@ int ioprio_check_cap(int ioprio)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (!capable(CAP_SYS_ADMIN) &amp;&amp; !capable(CAP_SYS_NICE))</div><div class='ctx'> 				return -EPERM;</div><div class='del'>-			fallthrough;</div><div class='del'>-			/* rt has prio field too */</div><div class='del'>-		case IOPRIO_CLASS_BE:</div><div class='del'>-			if (level &gt;= IOPRIO_NR_LEVELS)</div><div class='del'>-				return -EINVAL;</div><div class='ctx'> 			break;</div><div class='add'>+		case IOPRIO_CLASS_BE:</div><div class='ctx'> 		case IOPRIO_CLASS_IDLE:</div><div class='ctx'> 			break;</div><div class='ctx'> 		case IOPRIO_CLASS_NONE:</div><div class='head'>diff --git a/block/mq-deadline.c b/block/mq-deadline.c<br/>index 754f6b7415cd..2edf1cac06d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/block/mq-deadline.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>block/mq-deadline.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/block/mq-deadline.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>block/mq-deadline.c</a></div><div class='hunk'>@@ -715,7 +715,7 @@ static void dd_insert_request(struct blk_mq_hw_ctx *hctx, struct request *rq,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Called from blk_mq_insert_request() or blk_mq_dispatch_plug_list().</div><div class='add'>+ * Called from blk_mq_insert_request() or blk_mq_dispatch_list().</div><div class='ctx'>  */</div><div class='ctx'> static void dd_insert_requests(struct blk_mq_hw_ctx *hctx,</div><div class='ctx'> 			       struct list_head *list,</div><div class='head'>diff --git a/crypto/842.c b/crypto/842.c<br/>index 5fb37a925989..8c257c40e2b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/842.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/842.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/842.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/842.c</a></div><div class='hunk'>@@ -23,10 +23,6 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/sw842.h&gt;</div><div class='ctx'> </div><div class='del'>-struct crypto842_ctx {</div><div class='del'>-	void *wmem;	/* working memory for compress */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void *crypto842_alloc_ctx(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *ctx;</div><div class='hunk'>@@ -74,7 +70,7 @@ static int __init crypto842_mod_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	return crypto_register_scomp(&amp;scomp);</div><div class='ctx'> }</div><div class='del'>-subsys_initcall(crypto842_mod_init);</div><div class='add'>+module_init(crypto842_mod_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit crypto842_mod_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/crypto/Kconfig b/crypto/Kconfig<br/>index dbf97c4e7c59..e9fee7818e27 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/Kconfig</a></div><div class='hunk'>@@ -25,7 +25,7 @@ menu "Crypto core or helper"</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_FIPS</div><div class='ctx'> 	bool "FIPS 200 compliance"</div><div class='del'>-	depends on (CRYPTO_ANSI_CPRNG || CRYPTO_DRBG) &amp;&amp; !CRYPTO_MANAGER_DISABLE_TESTS</div><div class='add'>+	depends on (CRYPTO_ANSI_CPRNG || CRYPTO_DRBG) &amp;&amp; CRYPTO_SELFTESTS</div><div class='ctx'> 	depends on (MODULE_SIG || !MODULES)</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option enables the fips boot option which is</div><div class='hunk'>@@ -143,16 +143,17 @@ config CRYPTO_ACOMP</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_HKDF</div><div class='ctx'> 	tristate</div><div class='del'>-	select CRYPTO_SHA256 if !CONFIG_CRYPTO_MANAGER_DISABLE_TESTS</div><div class='del'>-	select CRYPTO_SHA512 if !CONFIG_CRYPTO_MANAGER_DISABLE_TESTS</div><div class='add'>+	select CRYPTO_SHA256 if CRYPTO_SELFTESTS</div><div class='add'>+	select CRYPTO_SHA512 if CRYPTO_SELFTESTS</div><div class='ctx'> 	select CRYPTO_HASH2</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_MANAGER</div><div class='del'>-	tristate "Cryptographic algorithm manager"</div><div class='add'>+	tristate</div><div class='add'>+	default CRYPTO_ALGAPI if CRYPTO_SELFTESTS</div><div class='ctx'> 	select CRYPTO_MANAGER2</div><div class='ctx'> 	help</div><div class='del'>-	  Create default cryptographic template instantiations such as</div><div class='del'>-	  cbc(aes).</div><div class='add'>+	  This provides the support for instantiating templates such as</div><div class='add'>+	  cbc(aes), and the support for the crypto self-tests.</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_MANAGER2</div><div class='ctx'> 	def_tristate CRYPTO_MANAGER || (CRYPTO_MANAGER!=n &amp;&amp; CRYPTO_ALGAPI=y)</div><div class='hunk'>@@ -173,35 +174,27 @@ config CRYPTO_USER</div><div class='ctx'> 	  Userspace configuration for cryptographic instantiations such as</div><div class='ctx'> 	  cbc(aes).</div><div class='ctx'> </div><div class='del'>-config CRYPTO_MANAGER_DISABLE_TESTS</div><div class='del'>-	bool "Disable run-time self tests"</div><div class='del'>-	default y</div><div class='add'>+config CRYPTO_SELFTESTS</div><div class='add'>+	bool "Enable cryptographic self-tests"</div><div class='add'>+	depends on DEBUG_KERNEL</div><div class='ctx'> 	help</div><div class='del'>-	  Disable run-time self tests that normally take place at</div><div class='del'>-	  algorithm registration.</div><div class='add'>+	  Enable the cryptographic self-tests.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-	bool "Enable extra run-time crypto self tests"</div><div class='del'>-	depends on DEBUG_KERNEL &amp;&amp; !CRYPTO_MANAGER_DISABLE_TESTS &amp;&amp; CRYPTO_MANAGER</div><div class='del'>-	help</div><div class='del'>-	  Enable extra run-time self tests of registered crypto algorithms,</div><div class='del'>-	  including randomized fuzz tests.</div><div class='add'>+	  The cryptographic self-tests run at boot time, or at algorithm</div><div class='add'>+	  registration time if algorithms are dynamically loaded later.</div><div class='ctx'> </div><div class='del'>-	  This is intended for developer use only, as these tests take much</div><div class='del'>-	  longer to run than the normal self tests.</div><div class='add'>+	  This is primarily intended for developer use.  It should not be</div><div class='add'>+	  enabled in production kernels, unless you are trying to use these</div><div class='add'>+	  tests to fulfill a FIPS testing requirement.</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_NULL</div><div class='ctx'> 	tristate "Null algorithms"</div><div class='del'>-	select CRYPTO_NULL2</div><div class='add'>+	select CRYPTO_ALGAPI</div><div class='add'>+	select CRYPTO_SKCIPHER</div><div class='add'>+	select CRYPTO_HASH</div><div class='ctx'> 	help</div><div class='ctx'> 	  These are 'Null' algorithms, used by IPsec, which do nothing.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_NULL2</div><div class='del'>-	tristate</div><div class='del'>-	select CRYPTO_ALGAPI2</div><div class='del'>-	select CRYPTO_SKCIPHER2</div><div class='del'>-	select CRYPTO_HASH2</div><div class='del'>-</div><div class='ctx'> config CRYPTO_PCRYPT</div><div class='ctx'> 	tristate "Parallel crypto engine"</div><div class='ctx'> 	depends on SMP</div><div class='hunk'>@@ -228,7 +221,6 @@ config CRYPTO_AUTHENC</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_MANAGER</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_NULL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Authenc: Combined mode wrapper for IPsec.</div><div class='ctx'> </div><div class='hunk'>@@ -240,18 +232,21 @@ config CRYPTO_KRB5ENC</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	select CRYPTO_MANAGER</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_NULL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Combined hash and cipher support for Kerberos 5 RFC3961 simplified</div><div class='ctx'> 	  profile.  This is required for Kerberos 5-style encryption, used by</div><div class='ctx'> 	  sunrpc/NFS and rxrpc/AFS.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_TEST</div><div class='del'>-	tristate "Testing module"</div><div class='add'>+config CRYPTO_BENCHMARK</div><div class='add'>+	tristate "Crypto benchmarking module"</div><div class='ctx'> 	depends on m || EXPERT</div><div class='ctx'> 	select CRYPTO_MANAGER</div><div class='ctx'> 	help</div><div class='del'>-	  Quick &amp; dirty crypto test module.</div><div class='add'>+	  Quick &amp; dirty crypto benchmarking module.</div><div class='add'>+</div><div class='add'>+	  This is mainly intended for use by people developing cryptographic</div><div class='add'>+	  algorithms in the kernel.  It should not be enabled in production</div><div class='add'>+	  kernels.</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_SIMD</div><div class='ctx'> 	tristate</div><div class='hunk'>@@ -634,8 +629,8 @@ config CRYPTO_ARC4</div><div class='ctx'> </div><div class='ctx'> config CRYPTO_CHACHA20</div><div class='ctx'> 	tristate "ChaCha"</div><div class='add'>+	select CRYPTO_LIB_CHACHA</div><div class='ctx'> 	select CRYPTO_LIB_CHACHA_GENERIC</div><div class='del'>-	select CRYPTO_LIB_CHACHA_INTERNAL</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='ctx'> 	help</div><div class='ctx'> 	  The ChaCha20, XChaCha20, and XChaCha12 stream cipher algorithms</div><div class='hunk'>@@ -784,8 +779,8 @@ config CRYPTO_AEGIS128_SIMD</div><div class='ctx'> config CRYPTO_CHACHA20POLY1305</div><div class='ctx'> 	tristate "ChaCha20-Poly1305"</div><div class='ctx'> 	select CRYPTO_CHACHA20</div><div class='del'>-	select CRYPTO_POLY1305</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='add'>+	select CRYPTO_LIB_POLY1305</div><div class='ctx'> 	select CRYPTO_MANAGER</div><div class='ctx'> 	help</div><div class='ctx'> 	  ChaCha20 stream cipher and Poly1305 authenticator combined</div><div class='hunk'>@@ -806,7 +801,6 @@ config CRYPTO_GCM</div><div class='ctx'> 	select CRYPTO_CTR</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='ctx'> 	select CRYPTO_GHASH</div><div class='del'>-	select CRYPTO_NULL</div><div class='ctx'> 	select CRYPTO_MANAGER</div><div class='ctx'> 	help</div><div class='ctx'> 	  GCM (Galois/Counter Mode) authenticated encryption mode and GMAC</div><div class='hunk'>@@ -817,7 +811,6 @@ config CRYPTO_GCM</div><div class='ctx'> config CRYPTO_GENIV</div><div class='ctx'> 	tristate</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='del'>-	select CRYPTO_NULL</div><div class='ctx'> 	select CRYPTO_MANAGER</div><div class='ctx'> 	select CRYPTO_RNG_DEFAULT</div><div class='ctx'> </div><div class='hunk'>@@ -953,18 +946,6 @@ config CRYPTO_POLYVAL</div><div class='ctx'> 	  This is used in HCTR2.  It is not a general-purpose</div><div class='ctx'> 	  cryptographic hash function.</div><div class='ctx'> </div><div class='del'>-config CRYPTO_POLY1305</div><div class='del'>-	tristate "Poly1305"</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_LIB_POLY1305_GENERIC</div><div class='del'>-	select CRYPTO_LIB_POLY1305_INTERNAL</div><div class='del'>-	help</div><div class='del'>-	  Poly1305 authenticator algorithm (RFC7539)</div><div class='del'>-</div><div class='del'>-	  Poly1305 is an authenticator algorithm designed by Daniel J. Bernstein.</div><div class='del'>-	  It is used for the ChaCha20-Poly1305 AEAD, specified in RFC7539 for use</div><div class='del'>-	  in IETF protocols. This is the portable C implementation of Poly1305.</div><div class='del'>-</div><div class='ctx'> config CRYPTO_RMD160</div><div class='ctx'> 	tristate "RIPEMD-160"</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='hunk'>@@ -994,6 +975,7 @@ config CRYPTO_SHA256</div><div class='ctx'> 	tristate "SHA-224 and SHA-256"</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='ctx'> 	select CRYPTO_LIB_SHA256</div><div class='add'>+	select CRYPTO_LIB_SHA256_GENERIC</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA-224 and SHA-256 secure hash algorithms (FIPS 180, ISO/IEC 10118-3)</div><div class='ctx'> </div><div class='hunk'>@@ -1012,13 +994,10 @@ config CRYPTO_SHA3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SHA-3 secure hash algorithms (FIPS 202, ISO/IEC 10118-3)</div><div class='ctx'> </div><div class='del'>-config CRYPTO_SM3</div><div class='del'>-	tristate</div><div class='del'>-</div><div class='ctx'> config CRYPTO_SM3_GENERIC</div><div class='ctx'> 	tristate "SM3 (ShangMi 3)"</div><div class='ctx'> 	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SM3</div><div class='add'>+	select CRYPTO_LIB_SM3</div><div class='ctx'> 	help</div><div class='ctx'> 	  SM3 (ShangMi 3) secure hash function (OSCCA GM/T 0004-2012, ISO/IEC 10118-3)</div><div class='ctx'> </div><div class='hunk'>@@ -1406,7 +1385,6 @@ config CRYPTO_USER_API_AEAD</div><div class='ctx'> 	depends on NET</div><div class='ctx'> 	select CRYPTO_AEAD</div><div class='ctx'> 	select CRYPTO_SKCIPHER</div><div class='del'>-	select CRYPTO_NULL</div><div class='ctx'> 	select CRYPTO_USER_API</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable the userspace interface for AEAD cipher algorithms.</div><div class='head'>diff --git a/crypto/Makefile b/crypto/Makefile<br/>index 0e6ab5ffd3f7..017df3a2e4bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/Makefile</a></div><div class='hunk'>@@ -71,15 +71,15 @@ obj-$(CONFIG_CRYPTO_USER) += crypto_user.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_CMAC) += cmac.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_HMAC) += hmac.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_XCBC) += xcbc.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_NULL2) += crypto_null.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_NULL) += crypto_null.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_MD4) += md4.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_MD5) += md5.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_RMD160) += rmd160.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA1) += sha1_generic.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SHA256) += sha256_generic.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_SHA256) += sha256.o</div><div class='add'>+CFLAGS_sha256.o += -DARCH=$(ARCH)</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA512) += sha512_generic.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SHA3) += sha3_generic.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_SM3) += sm3.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SM3_GENERIC) += sm3_generic.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_STREEBOG) += streebog_generic.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_WP512) += wp512.o</div><div class='hunk'>@@ -148,14 +148,16 @@ obj-$(CONFIG_CRYPTO_KHAZAD) += khazad.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_ANUBIS) += anubis.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_SEED) += seed.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_ARIA) += aria_generic.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CHACHA20) += chacha_generic.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_POLY1305) += poly1305_generic.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_CHACHA20) += chacha.o</div><div class='add'>+CFLAGS_chacha.o += -DARCH=$(ARCH)</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEFLATE) += deflate.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_MICHAEL_MIC) += michael_mic.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CRC32C) += crc32c_generic.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_CRC32) += crc32_generic.o</div><div class='del'>-CFLAGS_crc32c_generic.o += -DARCH=$(ARCH)</div><div class='del'>-CFLAGS_crc32_generic.o += -DARCH=$(ARCH)</div><div class='add'>+obj-$(CONFIG_CRYPTO_CRC32C) += crc32c-cryptoapi.o</div><div class='add'>+crc32c-cryptoapi-y := crc32c.o</div><div class='add'>+CFLAGS_crc32c.o += -DARCH=$(ARCH)</div><div class='add'>+obj-$(CONFIG_CRYPTO_CRC32) += crc32-cryptoapi.o</div><div class='add'>+crc32-cryptoapi-y := crc32.o</div><div class='add'>+CFLAGS_crc32.o += -DARCH=$(ARCH)</div><div class='ctx'> obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.o authencesn.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_KRB5ENC) += krb5enc.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_LZO) += lzo.o lzo-rle.o</div><div class='hunk'>@@ -172,7 +174,7 @@ KASAN_SANITIZE_jitterentropy.o = n</div><div class='ctx'> UBSAN_SANITIZE_jitterentropy.o = n</div><div class='ctx'> jitterentropy_rng-y := jitterentropy.o jitterentropy-kcapi.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE) += jitterentropy-testing.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o</div><div class='add'>+obj-$(CONFIG_CRYPTO_BENCHMARK) += tcrypt.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_GHASH) += ghash-generic.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_POLYVAL) += polyval-generic.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_USER_API) += af_alg.o</div><div class='head'>diff --git a/crypto/acompress.c b/crypto/acompress.c<br/>index f7a3fbe5447e..be28cbfd22e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/acompress.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/acompress.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/acompress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/acompress.c</a></div><div class='hunk'>@@ -8,20 +8,32 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/acompress.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/cryptouser.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/cpumask.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/page-flags.h&gt;</div><div class='add'>+#include &lt;linux/percpu.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/smp.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "compress.h"</div><div class='ctx'> </div><div class='ctx'> struct crypto_scomp;</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	ACOMP_WALK_SLEEP = 1 &lt;&lt; 0,</div><div class='add'>+	ACOMP_WALK_SRC_LINEAR = 1 &lt;&lt; 1,</div><div class='add'>+	ACOMP_WALK_DST_LINEAR = 1 &lt;&lt; 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct crypto_type crypto_acomp_type;</div><div class='ctx'> </div><div class='ctx'> static void acomp_reqchain_done(void *data, int err);</div><div class='hunk'>@@ -65,7 +77,7 @@ static void crypto_acomp_exit_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 		alg-&gt;exit(acomp);</div><div class='ctx'> </div><div class='ctx'> 	if (acomp_is_async(acomp))</div><div class='del'>-		crypto_free_acomp(acomp-&gt;fb);</div><div class='add'>+		crypto_free_acomp(crypto_acomp_fb(acomp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_acomp_init_tfm(struct crypto_tfm *tfm)</div><div class='hunk'>@@ -75,8 +87,6 @@ static int crypto_acomp_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	struct crypto_acomp *fb = NULL;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	acomp-&gt;fb = acomp;</div><div class='del'>-</div><div class='ctx'> 	if (tfm-&gt;__crt_alg-&gt;cra_type != &amp;crypto_acomp_type)</div><div class='ctx'> 		return crypto_init_scomp_ops_async(tfm);</div><div class='ctx'> </div><div class='hunk'>@@ -90,12 +100,12 @@ static int crypto_acomp_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 		if (crypto_acomp_reqsize(fb) &gt; MAX_SYNC_COMP_REQSIZE)</div><div class='ctx'> 			goto out_free_fb;</div><div class='ctx'> </div><div class='del'>-		acomp-&gt;fb = fb;</div><div class='add'>+		tfm-&gt;fb = crypto_acomp_tfm(fb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	acomp-&gt;compress = alg-&gt;compress;</div><div class='ctx'> 	acomp-&gt;decompress = alg-&gt;decompress;</div><div class='del'>-	acomp-&gt;reqsize = alg-&gt;reqsize;</div><div class='add'>+	acomp-&gt;reqsize = alg-&gt;base.cra_reqsize;</div><div class='ctx'> </div><div class='ctx'> 	acomp-&gt;base.exit = crypto_acomp_exit_tfm;</div><div class='ctx'> </div><div class='hunk'>@@ -136,6 +146,7 @@ static const struct crypto_type crypto_acomp_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_ACOMPRESS_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_ACOMPRESS,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_acomp, base),</div><div class='add'>+	.algsize = offsetof(struct acomp_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_acomp *crypto_alloc_acomp(const char *alg_name, u32 type,</div><div class='hunk'>@@ -161,7 +172,6 @@ static void acomp_save_req(struct acomp_req *req, crypto_completion_t cplt)</div><div class='ctx'> 	state-&gt;data = req-&gt;base.data;</div><div class='ctx'> 	req-&gt;base.complete = cplt;</div><div class='ctx'> 	req-&gt;base.data = state;</div><div class='del'>-	state-&gt;req0 = req;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void acomp_restore_req(struct acomp_req *req)</div><div class='hunk'>@@ -172,23 +182,16 @@ static void acomp_restore_req(struct acomp_req *req)</div><div class='ctx'> 	req-&gt;base.data = state-&gt;data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void acomp_reqchain_virt(struct acomp_req_chain *state, int err)</div><div class='add'>+static void acomp_reqchain_virt(struct acomp_req *req)</div><div class='ctx'> {</div><div class='del'>-	struct acomp_req *req = state-&gt;cur;</div><div class='add'>+	struct acomp_req_chain *state = &amp;req-&gt;chain;</div><div class='ctx'> 	unsigned int slen = req-&gt;slen;</div><div class='ctx'> 	unsigned int dlen = req-&gt;dlen;</div><div class='ctx'> </div><div class='del'>-	req-&gt;base.err = err;</div><div class='del'>-	state = &amp;req-&gt;chain;</div><div class='del'>-</div><div class='ctx'> 	if (state-&gt;flags &amp; CRYPTO_ACOMP_REQ_SRC_VIRT)</div><div class='ctx'> 		acomp_request_set_src_dma(req, state-&gt;src, slen);</div><div class='del'>-	else if (state-&gt;flags &amp; CRYPTO_ACOMP_REQ_SRC_FOLIO)</div><div class='del'>-		acomp_request_set_src_folio(req, state-&gt;sfolio, state-&gt;soff, slen);</div><div class='ctx'> 	if (state-&gt;flags &amp; CRYPTO_ACOMP_REQ_DST_VIRT)</div><div class='ctx'> 		acomp_request_set_dst_dma(req, state-&gt;dst, dlen);</div><div class='del'>-	else if (state-&gt;flags &amp; CRYPTO_ACOMP_REQ_DST_FOLIO)</div><div class='del'>-		acomp_request_set_dst_folio(req, state-&gt;dfolio, state-&gt;doff, dlen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void acomp_virt_to_sg(struct acomp_req *req)</div><div class='hunk'>@@ -196,9 +199,7 @@ static void acomp_virt_to_sg(struct acomp_req *req)</div><div class='ctx'> 	struct acomp_req_chain *state = &amp;req-&gt;chain;</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;flags = req-&gt;base.flags &amp; (CRYPTO_ACOMP_REQ_SRC_VIRT |</div><div class='del'>-					  CRYPTO_ACOMP_REQ_DST_VIRT |</div><div class='del'>-					  CRYPTO_ACOMP_REQ_SRC_FOLIO |</div><div class='del'>-					  CRYPTO_ACOMP_REQ_DST_FOLIO);</div><div class='add'>+					  CRYPTO_ACOMP_REQ_DST_VIRT);</div><div class='ctx'> </div><div class='ctx'> 	if (acomp_request_src_isvirt(req)) {</div><div class='ctx'> 		unsigned int slen = req-&gt;slen;</div><div class='hunk'>@@ -207,17 +208,6 @@ static void acomp_virt_to_sg(struct acomp_req *req)</div><div class='ctx'> 		state-&gt;src = svirt;</div><div class='ctx'> 		sg_init_one(&amp;state-&gt;ssg, svirt, slen);</div><div class='ctx'> 		acomp_request_set_src_sg(req, &amp;state-&gt;ssg, slen);</div><div class='del'>-	} else if (acomp_request_src_isfolio(req)) {</div><div class='del'>-		struct folio *folio = req-&gt;sfolio;</div><div class='del'>-		unsigned int slen = req-&gt;slen;</div><div class='del'>-		size_t off = req-&gt;soff;</div><div class='del'>-</div><div class='del'>-		state-&gt;sfolio = folio;</div><div class='del'>-		state-&gt;soff = off;</div><div class='del'>-		sg_init_table(&amp;state-&gt;ssg, 1);</div><div class='del'>-		sg_set_page(&amp;state-&gt;ssg, folio_page(folio, off / PAGE_SIZE),</div><div class='del'>-			    slen, off % PAGE_SIZE);</div><div class='del'>-		acomp_request_set_src_sg(req, &amp;state-&gt;ssg, slen);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (acomp_request_dst_isvirt(req)) {</div><div class='hunk'>@@ -227,39 +217,15 @@ static void acomp_virt_to_sg(struct acomp_req *req)</div><div class='ctx'> 		state-&gt;dst = dvirt;</div><div class='ctx'> 		sg_init_one(&amp;state-&gt;dsg, dvirt, dlen);</div><div class='ctx'> 		acomp_request_set_dst_sg(req, &amp;state-&gt;dsg, dlen);</div><div class='del'>-	} else if (acomp_request_dst_isfolio(req)) {</div><div class='del'>-		struct folio *folio = req-&gt;dfolio;</div><div class='del'>-		unsigned int dlen = req-&gt;dlen;</div><div class='del'>-		size_t off = req-&gt;doff;</div><div class='del'>-</div><div class='del'>-		state-&gt;dfolio = folio;</div><div class='del'>-		state-&gt;doff = off;</div><div class='del'>-		sg_init_table(&amp;state-&gt;dsg, 1);</div><div class='del'>-		sg_set_page(&amp;state-&gt;dsg, folio_page(folio, off / PAGE_SIZE),</div><div class='del'>-			    dlen, off % PAGE_SIZE);</div><div class='del'>-		acomp_request_set_src_sg(req, &amp;state-&gt;dsg, dlen);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int acomp_do_nondma(struct acomp_req_chain *state,</div><div class='del'>-			   struct acomp_req *req)</div><div class='add'>+static int acomp_do_nondma(struct acomp_req *req, bool comp)</div><div class='ctx'> {</div><div class='del'>-	u32 keep = CRYPTO_ACOMP_REQ_SRC_VIRT |</div><div class='del'>-		   CRYPTO_ACOMP_REQ_SRC_NONDMA |</div><div class='del'>-		   CRYPTO_ACOMP_REQ_DST_VIRT |</div><div class='del'>-		   CRYPTO_ACOMP_REQ_DST_NONDMA;</div><div class='del'>-	ACOMP_REQUEST_ON_STACK(fbreq, crypto_acomp_reqtfm(req));</div><div class='add'>+	ACOMP_FBREQ_ON_STACK(fbreq, req);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	acomp_request_set_callback(fbreq, req-&gt;base.flags, NULL, NULL);</div><div class='del'>-	fbreq-&gt;base.flags &amp;= ~keep;</div><div class='del'>-	fbreq-&gt;base.flags |= req-&gt;base.flags &amp; keep;</div><div class='del'>-	fbreq-&gt;src = req-&gt;src;</div><div class='del'>-	fbreq-&gt;dst = req-&gt;dst;</div><div class='del'>-	fbreq-&gt;slen = req-&gt;slen;</div><div class='del'>-	fbreq-&gt;dlen = req-&gt;dlen;</div><div class='del'>-</div><div class='del'>-	if (state-&gt;op == crypto_acomp_reqtfm(req)-&gt;compress)</div><div class='add'>+	if (comp)</div><div class='ctx'> 		err = crypto_acomp_compress(fbreq);</div><div class='ctx'> 	else</div><div class='ctx'> 		err = crypto_acomp_decompress(fbreq);</div><div class='hunk'>@@ -268,114 +234,74 @@ static int acomp_do_nondma(struct acomp_req_chain *state,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int acomp_do_one_req(struct acomp_req_chain *state,</div><div class='del'>-			    struct acomp_req *req)</div><div class='add'>+static int acomp_do_one_req(struct acomp_req *req, bool comp)</div><div class='ctx'> {</div><div class='del'>-	state-&gt;cur = req;</div><div class='del'>-</div><div class='ctx'> 	if (acomp_request_isnondma(req))</div><div class='del'>-		return acomp_do_nondma(state, req);</div><div class='add'>+		return acomp_do_nondma(req, comp);</div><div class='ctx'> </div><div class='ctx'> 	acomp_virt_to_sg(req);</div><div class='del'>-	return state-&gt;op(req);</div><div class='add'>+	return comp ? crypto_acomp_reqtfm(req)-&gt;compress(req) :</div><div class='add'>+		      crypto_acomp_reqtfm(req)-&gt;decompress(req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int acomp_reqchain_finish(struct acomp_req *req0, int err, u32 mask)</div><div class='add'>+static int acomp_reqchain_finish(struct acomp_req *req, int err)</div><div class='ctx'> {</div><div class='del'>-	struct acomp_req_chain *state = req0-&gt;base.data;</div><div class='del'>-	struct acomp_req *req = state-&gt;cur;</div><div class='del'>-	struct acomp_req *n;</div><div class='del'>-</div><div class='del'>-	acomp_reqchain_virt(state, err);</div><div class='del'>-</div><div class='del'>-	if (req != req0)</div><div class='del'>-		list_add_tail(&amp;req-&gt;base.list, &amp;req0-&gt;base.list);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(req, n, &amp;state-&gt;head, base.list) {</div><div class='del'>-		list_del_init(&amp;req-&gt;base.list);</div><div class='del'>-</div><div class='del'>-		req-&gt;base.flags &amp;= mask;</div><div class='del'>-		req-&gt;base.complete = acomp_reqchain_done;</div><div class='del'>-		req-&gt;base.data = state;</div><div class='del'>-</div><div class='del'>-		err = acomp_do_one_req(state, req);</div><div class='del'>-</div><div class='del'>-		if (err == -EINPROGRESS) {</div><div class='del'>-			if (!list_empty(&amp;state-&gt;head))</div><div class='del'>-				err = -EBUSY;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (err == -EBUSY)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		acomp_reqchain_virt(state, err);</div><div class='del'>-		list_add_tail(&amp;req-&gt;base.list, &amp;req0-&gt;base.list);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	acomp_restore_req(req0);</div><div class='del'>-</div><div class='del'>-out:</div><div class='add'>+	acomp_reqchain_virt(req);</div><div class='add'>+	acomp_restore_req(req);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void acomp_reqchain_done(void *data, int err)</div><div class='ctx'> {</div><div class='del'>-	struct acomp_req_chain *state = data;</div><div class='del'>-	crypto_completion_t compl = state-&gt;compl;</div><div class='add'>+	struct acomp_req *req = data;</div><div class='add'>+	crypto_completion_t compl;</div><div class='ctx'> </div><div class='del'>-	data = state-&gt;data;</div><div class='add'>+	compl = req-&gt;chain.compl;</div><div class='add'>+	data = req-&gt;chain.data;</div><div class='ctx'> </div><div class='del'>-	if (err == -EINPROGRESS) {</div><div class='del'>-		if (!list_empty(&amp;state-&gt;head))</div><div class='del'>-			return;</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='ctx'> 		goto notify;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	err = acomp_reqchain_finish(state-&gt;req0, err,</div><div class='del'>-				    CRYPTO_TFM_REQ_MAY_BACKLOG);</div><div class='del'>-	if (err == -EBUSY)</div><div class='del'>-		return;</div><div class='add'>+	err = acomp_reqchain_finish(req, err);</div><div class='ctx'> </div><div class='ctx'> notify:</div><div class='ctx'> 	compl(data, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int acomp_do_req_chain(struct acomp_req *req,</div><div class='del'>-			      int (*op)(struct acomp_req *req))</div><div class='add'>+static int acomp_do_req_chain(struct acomp_req *req, bool comp)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_acomp *tfm = crypto_acomp_reqtfm(req);</div><div class='del'>-	struct acomp_req_chain *state;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (crypto_acomp_req_chain(tfm) ||</div><div class='del'>-	    (!acomp_request_chained(req) &amp;&amp; acomp_request_issg(req)))</div><div class='del'>-		return op(req);</div><div class='del'>-</div><div class='ctx'> 	acomp_save_req(req, acomp_reqchain_done);</div><div class='del'>-	state = req-&gt;base.data;</div><div class='del'>-</div><div class='del'>-	state-&gt;op = op;</div><div class='del'>-	state-&gt;src = NULL;</div><div class='del'>-	INIT_LIST_HEAD(&amp;state-&gt;head);</div><div class='del'>-	list_splice_init(&amp;req-&gt;base.list, &amp;state-&gt;head);</div><div class='ctx'> </div><div class='del'>-	err = acomp_do_one_req(state, req);</div><div class='add'>+	err = acomp_do_one_req(req, comp);</div><div class='ctx'> 	if (err == -EBUSY || err == -EINPROGRESS)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	return acomp_reqchain_finish(req, err, ~0);</div><div class='add'>+	return acomp_reqchain_finish(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int crypto_acomp_compress(struct acomp_req *req)</div><div class='ctx'> {</div><div class='del'>-	return acomp_do_req_chain(req, crypto_acomp_reqtfm(req)-&gt;compress);</div><div class='add'>+	struct crypto_acomp *tfm = crypto_acomp_reqtfm(req);</div><div class='add'>+</div><div class='add'>+	if (acomp_req_on_stack(req) &amp;&amp; acomp_is_async(tfm))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	if (crypto_acomp_req_virt(tfm) || acomp_request_issg(req))</div><div class='add'>+		return crypto_acomp_reqtfm(req)-&gt;compress(req);</div><div class='add'>+	return acomp_do_req_chain(req, true);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_acomp_compress);</div><div class='ctx'> </div><div class='ctx'> int crypto_acomp_decompress(struct acomp_req *req)</div><div class='ctx'> {</div><div class='del'>-	return acomp_do_req_chain(req, crypto_acomp_reqtfm(req)-&gt;decompress);</div><div class='add'>+	struct crypto_acomp *tfm = crypto_acomp_reqtfm(req);</div><div class='add'>+</div><div class='add'>+	if (acomp_req_on_stack(req) &amp;&amp; acomp_is_async(tfm))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	if (crypto_acomp_req_virt(tfm) || acomp_request_issg(req))</div><div class='add'>+		return crypto_acomp_reqtfm(req)-&gt;decompress(req);</div><div class='add'>+	return acomp_do_req_chain(req, false);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_acomp_decompress);</div><div class='ctx'> </div><div class='hunk'>@@ -434,5 +360,229 @@ void crypto_unregister_acomps(struct acomp_alg *algs, int count)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_unregister_acomps);</div><div class='ctx'> </div><div class='add'>+static void acomp_stream_workfn(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct crypto_acomp_streams *s =</div><div class='add'>+		container_of(work, struct crypto_acomp_streams, stream_work);</div><div class='add'>+	struct crypto_acomp_stream __percpu *streams = s-&gt;streams;</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	for_each_cpu(cpu, &amp;s-&gt;stream_want) {</div><div class='add'>+		struct crypto_acomp_stream *ps;</div><div class='add'>+		void *ctx;</div><div class='add'>+</div><div class='add'>+		ps = per_cpu_ptr(streams, cpu);</div><div class='add'>+		if (ps-&gt;ctx)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ctx = s-&gt;alloc_ctx();</div><div class='add'>+		if (IS_ERR(ctx))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;ps-&gt;lock);</div><div class='add'>+		ps-&gt;ctx = ctx;</div><div class='add'>+		spin_unlock_bh(&amp;ps-&gt;lock);</div><div class='add'>+</div><div class='add'>+		cpumask_clear_cpu(cpu, &amp;s-&gt;stream_want);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void crypto_acomp_free_streams(struct crypto_acomp_streams *s)</div><div class='add'>+{</div><div class='add'>+	struct crypto_acomp_stream __percpu *streams = s-&gt;streams;</div><div class='add'>+	void (*free_ctx)(void *);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	s-&gt;streams = NULL;</div><div class='add'>+	if (!streams)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;s-&gt;stream_work);</div><div class='add'>+	free_ctx = s-&gt;free_ctx;</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(i) {</div><div class='add'>+		struct crypto_acomp_stream *ps = per_cpu_ptr(streams, i);</div><div class='add'>+</div><div class='add'>+		if (!ps-&gt;ctx)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		free_ctx(ps-&gt;ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free_percpu(streams);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_acomp_free_streams);</div><div class='add'>+</div><div class='add'>+int crypto_acomp_alloc_streams(struct crypto_acomp_streams *s)</div><div class='add'>+{</div><div class='add'>+	struct crypto_acomp_stream __percpu *streams;</div><div class='add'>+	struct crypto_acomp_stream *ps;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	void *ctx;</div><div class='add'>+</div><div class='add'>+	if (s-&gt;streams)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	streams = alloc_percpu(struct crypto_acomp_stream);</div><div class='add'>+	if (!streams)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ctx = s-&gt;alloc_ctx();</div><div class='add'>+	if (IS_ERR(ctx)) {</div><div class='add'>+		free_percpu(streams);</div><div class='add'>+		return PTR_ERR(ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i = cpumask_first(cpu_possible_mask);</div><div class='add'>+	ps = per_cpu_ptr(streams, i);</div><div class='add'>+	ps-&gt;ctx = ctx;</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(i) {</div><div class='add'>+		ps = per_cpu_ptr(streams, i);</div><div class='add'>+		spin_lock_init(&amp;ps-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	s-&gt;streams = streams;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;s-&gt;stream_work, acomp_stream_workfn);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_acomp_alloc_streams);</div><div class='add'>+</div><div class='add'>+struct crypto_acomp_stream *crypto_acomp_lock_stream_bh(</div><div class='add'>+	struct crypto_acomp_streams *s) __acquires(stream)</div><div class='add'>+{</div><div class='add'>+	struct crypto_acomp_stream __percpu *streams = s-&gt;streams;</div><div class='add'>+	int cpu = raw_smp_processor_id();</div><div class='add'>+	struct crypto_acomp_stream *ps;</div><div class='add'>+</div><div class='add'>+	ps = per_cpu_ptr(streams, cpu);</div><div class='add'>+	spin_lock_bh(&amp;ps-&gt;lock);</div><div class='add'>+	if (likely(ps-&gt;ctx))</div><div class='add'>+		return ps;</div><div class='add'>+	spin_unlock(&amp;ps-&gt;lock);</div><div class='add'>+</div><div class='add'>+	cpumask_set_cpu(cpu, &amp;s-&gt;stream_want);</div><div class='add'>+	schedule_work(&amp;s-&gt;stream_work);</div><div class='add'>+</div><div class='add'>+	ps = per_cpu_ptr(streams, cpumask_first(cpu_possible_mask));</div><div class='add'>+	spin_lock(&amp;ps-&gt;lock);</div><div class='add'>+	return ps;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_acomp_lock_stream_bh);</div><div class='add'>+</div><div class='add'>+void acomp_walk_done_src(struct acomp_walk *walk, int used)</div><div class='add'>+{</div><div class='add'>+	walk-&gt;slen -= used;</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_SRC_LINEAR))</div><div class='add'>+		scatterwalk_advance(&amp;walk-&gt;in, used);</div><div class='add'>+	else</div><div class='add'>+		scatterwalk_done_src(&amp;walk-&gt;in, used);</div><div class='add'>+</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_SLEEP))</div><div class='add'>+		cond_resched();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acomp_walk_done_src);</div><div class='add'>+</div><div class='add'>+void acomp_walk_done_dst(struct acomp_walk *walk, int used)</div><div class='add'>+{</div><div class='add'>+	walk-&gt;dlen -= used;</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_DST_LINEAR))</div><div class='add'>+		scatterwalk_advance(&amp;walk-&gt;out, used);</div><div class='add'>+	else</div><div class='add'>+		scatterwalk_done_dst(&amp;walk-&gt;out, used);</div><div class='add'>+</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_SLEEP))</div><div class='add'>+		cond_resched();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acomp_walk_done_dst);</div><div class='add'>+</div><div class='add'>+int acomp_walk_next_src(struct acomp_walk *walk)</div><div class='add'>+{</div><div class='add'>+	unsigned int slen = walk-&gt;slen;</div><div class='add'>+	unsigned int max = UINT_MAX;</div><div class='add'>+</div><div class='add'>+	if (!preempt_model_preemptible() &amp;&amp; (walk-&gt;flags &amp; ACOMP_WALK_SLEEP))</div><div class='add'>+		max = PAGE_SIZE;</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_SRC_LINEAR)) {</div><div class='add'>+		walk-&gt;in.__addr = (void *)(((u8 *)walk-&gt;in.sg) +</div><div class='add'>+					   walk-&gt;in.offset);</div><div class='add'>+		return min(slen, max);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return slen ? scatterwalk_next(&amp;walk-&gt;in, slen) : 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acomp_walk_next_src);</div><div class='add'>+</div><div class='add'>+int acomp_walk_next_dst(struct acomp_walk *walk)</div><div class='add'>+{</div><div class='add'>+	unsigned int dlen = walk-&gt;dlen;</div><div class='add'>+	unsigned int max = UINT_MAX;</div><div class='add'>+</div><div class='add'>+	if (!preempt_model_preemptible() &amp;&amp; (walk-&gt;flags &amp; ACOMP_WALK_SLEEP))</div><div class='add'>+		max = PAGE_SIZE;</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_DST_LINEAR)) {</div><div class='add'>+		walk-&gt;out.__addr = (void *)(((u8 *)walk-&gt;out.sg) +</div><div class='add'>+					    walk-&gt;out.offset);</div><div class='add'>+		return min(dlen, max);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dlen ? scatterwalk_next(&amp;walk-&gt;out, dlen) : 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acomp_walk_next_dst);</div><div class='add'>+</div><div class='add'>+int acomp_walk_virt(struct acomp_walk *__restrict walk,</div><div class='add'>+		    struct acomp_req *__restrict req, bool atomic)</div><div class='add'>+{</div><div class='add'>+	struct scatterlist *src = req-&gt;src;</div><div class='add'>+	struct scatterlist *dst = req-&gt;dst;</div><div class='add'>+</div><div class='add'>+	walk-&gt;slen = req-&gt;slen;</div><div class='add'>+	walk-&gt;dlen = req-&gt;dlen;</div><div class='add'>+</div><div class='add'>+	if (!walk-&gt;slen || !walk-&gt;dlen)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	walk-&gt;flags = 0;</div><div class='add'>+	if ((req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP) &amp;&amp; !atomic)</div><div class='add'>+		walk-&gt;flags |= ACOMP_WALK_SLEEP;</div><div class='add'>+	if ((req-&gt;base.flags &amp; CRYPTO_ACOMP_REQ_SRC_VIRT))</div><div class='add'>+		walk-&gt;flags |= ACOMP_WALK_SRC_LINEAR;</div><div class='add'>+	if ((req-&gt;base.flags &amp; CRYPTO_ACOMP_REQ_DST_VIRT))</div><div class='add'>+		walk-&gt;flags |= ACOMP_WALK_DST_LINEAR;</div><div class='add'>+</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_SRC_LINEAR)) {</div><div class='add'>+		walk-&gt;in.sg = (void *)req-&gt;svirt;</div><div class='add'>+		walk-&gt;in.offset = 0;</div><div class='add'>+	} else</div><div class='add'>+		scatterwalk_start(&amp;walk-&gt;in, src);</div><div class='add'>+	if ((walk-&gt;flags &amp; ACOMP_WALK_DST_LINEAR)) {</div><div class='add'>+		walk-&gt;out.sg = (void *)req-&gt;dvirt;</div><div class='add'>+		walk-&gt;out.offset = 0;</div><div class='add'>+	} else</div><div class='add'>+		scatterwalk_start(&amp;walk-&gt;out, dst);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acomp_walk_virt);</div><div class='add'>+</div><div class='add'>+struct acomp_req *acomp_request_clone(struct acomp_req *req,</div><div class='add'>+				      size_t total, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct acomp_req *nreq;</div><div class='add'>+</div><div class='add'>+	nreq = container_of(crypto_request_clone(&amp;req-&gt;base, total, gfp),</div><div class='add'>+			    struct acomp_req, base);</div><div class='add'>+	if (nreq == req)</div><div class='add'>+		return req;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;src == &amp;req-&gt;chain.ssg)</div><div class='add'>+		nreq-&gt;src = &amp;nreq-&gt;chain.ssg;</div><div class='add'>+	if (req-&gt;dst == &amp;req-&gt;chain.dsg)</div><div class='add'>+		nreq-&gt;dst = &amp;nreq-&gt;chain.dsg;</div><div class='add'>+	return nreq;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(acomp_request_clone);</div><div class='add'>+</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Asynchronous compression type");</div><div class='head'>diff --git a/crypto/adiantum.c b/crypto/adiantum.c<br/>index c3ef583598b4..a6bca877c3c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/adiantum.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/adiantum.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/adiantum.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/adiantum.c</a></div><div class='hunk'>@@ -639,7 +639,7 @@ static void __exit adiantum_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;adiantum_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(adiantum_module_init);</div><div class='add'>+module_init(adiantum_module_init);</div><div class='ctx'> module_exit(adiantum_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Adiantum length-preserving encryption mode");</div><div class='head'>diff --git a/crypto/aead.c b/crypto/aead.c<br/>index 12f5b42171af..5d14b775036e 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/aead.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aead.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/aead.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/aead.c</a></div><div class='hunk'>@@ -186,6 +186,7 @@ static const struct crypto_type crypto_aead_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_AEAD,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_aead, base),</div><div class='add'>+	.algsize = offsetof(struct aead_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int crypto_grab_aead(struct crypto_aead_spawn *spawn,</div><div class='head'>diff --git a/crypto/aegis128-core.c b/crypto/aegis128-core.c<br/>index 72f6ee1345ef..ca80d861345d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/aegis128-core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aegis128-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/aegis128-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/aegis128-core.c</a></div><div class='hunk'>@@ -566,7 +566,7 @@ static void __exit crypto_aegis128_module_exit(void)</div><div class='ctx'> 	crypto_unregister_aead(&amp;crypto_aegis128_alg_generic);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_aegis128_module_init);</div><div class='add'>+module_init(crypto_aegis128_module_init);</div><div class='ctx'> module_exit(crypto_aegis128_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/aes_generic.c b/crypto/aes_generic.c<br/>index 3c66d425c97b..85d2e78c8ef2 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/aes_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aes_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/aes_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/aes_generic.c</a></div><div class='hunk'>@@ -1311,7 +1311,7 @@ static void __exit aes_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;aes_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(aes_init);</div><div class='add'>+module_init(aes_init);</div><div class='ctx'> module_exit(aes_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm");</div><div class='head'>diff --git a/crypto/ahash.c b/crypto/ahash.c<br/>index 9f57b925b116..e10bc2659ae4 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ahash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ahash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ahash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ahash.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='hunk'>@@ -42,26 +42,46 @@ struct crypto_hash_walk {</div><div class='ctx'> 	struct scatterlist *sg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ahash_save_req_state {</div><div class='del'>-	struct list_head head;</div><div class='del'>-	struct ahash_request *req0;</div><div class='del'>-	struct ahash_request *cur;</div><div class='del'>-	int (*op)(struct ahash_request *req);</div><div class='add'>+static int ahash_def_finup(struct ahash_request *req);</div><div class='add'>+</div><div class='add'>+static inline bool crypto_ahash_block_only(struct crypto_ahash *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;halg.base.cra_flags &amp;</div><div class='add'>+	       CRYPTO_AHASH_ALG_BLOCK_ONLY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool crypto_ahash_final_nonzero(struct crypto_ahash *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;halg.base.cra_flags &amp;</div><div class='add'>+	       CRYPTO_AHASH_ALG_FINAL_NONZERO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool crypto_ahash_need_fallback(struct crypto_ahash *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;halg.base.cra_flags &amp;</div><div class='add'>+	       CRYPTO_ALG_NEED_FALLBACK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ahash_op_done(void *data, int err,</div><div class='add'>+				 int (*finish)(struct ahash_request *, int))</div><div class='add'>+{</div><div class='add'>+	struct ahash_request *areq = data;</div><div class='ctx'> 	crypto_completion_t compl;</div><div class='del'>-	void *data;</div><div class='del'>-	struct scatterlist sg;</div><div class='del'>-	const u8 *src;</div><div class='del'>-	u8 *page;</div><div class='del'>-	unsigned int offset;</div><div class='del'>-	unsigned int nbytes;</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-static void ahash_reqchain_done(void *data, int err);</div><div class='del'>-static int ahash_save_req(struct ahash_request *req, crypto_completion_t cplt);</div><div class='del'>-static void ahash_restore_req(struct ahash_request *req);</div><div class='del'>-static void ahash_def_finup_done1(void *data, int err);</div><div class='del'>-static int ahash_def_finup_finish1(struct ahash_request *req, int err);</div><div class='del'>-static int ahash_def_finup(struct ahash_request *req);</div><div class='add'>+	compl = areq-&gt;saved_complete;</div><div class='add'>+	data = areq-&gt;saved_data;</div><div class='add'>+	if (err == -EINPROGRESS)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	areq-&gt;base.flags &amp;= ~CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+</div><div class='add'>+	err = finish(areq, err);</div><div class='add'>+	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	compl(data, err);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int hash_walk_next(struct crypto_hash_walk *walk)</div><div class='ctx'> {</div><div class='hunk'>@@ -266,7 +286,6 @@ static int crypto_init_ahash_using_shash(struct crypto_tfm *tfm)</div><div class='ctx'> </div><div class='ctx'> 	crypto_ahash_set_flags(crt, crypto_shash_get_flags(shash) &amp;</div><div class='ctx'> 				    CRYPTO_TFM_NEED_KEY);</div><div class='del'>-	crt-&gt;reqsize = sizeof(struct shash_desc) + crypto_shash_descsize(shash);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -303,6 +322,9 @@ int crypto_ahash_setkey(struct crypto_ahash *tfm, const u8 *key,</div><div class='ctx'> 		int err;</div><div class='ctx'> </div><div class='ctx'> 		err = alg-&gt;setkey(tfm, key, keylen);</div><div class='add'>+		if (!err &amp;&amp; crypto_ahash_need_fallback(tfm))</div><div class='add'>+			err = crypto_ahash_setkey(crypto_ahash_fb(tfm),</div><div class='add'>+						  key, keylen);</div><div class='ctx'> 		if (unlikely(err)) {</div><div class='ctx'> 			ahash_set_needkey(tfm, alg);</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -313,480 +335,261 @@ int crypto_ahash_setkey(struct crypto_ahash *tfm, const u8 *key,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_setkey);</div><div class='ctx'> </div><div class='del'>-static bool ahash_request_hasvirt(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *r2;</div><div class='del'>-</div><div class='del'>-	if (ahash_request_isvirt(req))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(r2, &amp;req-&gt;base.list, base.list)</div><div class='del'>-		if (ahash_request_isvirt(r2))</div><div class='del'>-			return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ahash_reqchain_virt(struct ahash_save_req_state *state,</div><div class='del'>-			       int err, u32 mask)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *req = state-&gt;cur;</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		unsigned len = state-&gt;nbytes;</div><div class='del'>-</div><div class='del'>-		req-&gt;base.err = err;</div><div class='del'>-</div><div class='del'>-		if (!state-&gt;offset)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (state-&gt;offset == len || err) {</div><div class='del'>-			u8 *result = req-&gt;result;</div><div class='del'>-</div><div class='del'>-			ahash_request_set_virt(req, state-&gt;src, result, len);</div><div class='del'>-			state-&gt;offset = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		len -= state-&gt;offset;</div><div class='del'>-</div><div class='del'>-		len = min(PAGE_SIZE, len);</div><div class='del'>-		memcpy(state-&gt;page, state-&gt;src + state-&gt;offset, len);</div><div class='del'>-		state-&gt;offset += len;</div><div class='del'>-		req-&gt;nbytes = len;</div><div class='del'>-</div><div class='del'>-		err = state-&gt;op(req);</div><div class='del'>-		if (err == -EINPROGRESS) {</div><div class='del'>-			if (!list_empty(&amp;state-&gt;head) ||</div><div class='del'>-			    state-&gt;offset &lt; state-&gt;nbytes)</div><div class='del'>-				err = -EBUSY;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (err == -EBUSY)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ahash_reqchain_finish(struct ahash_request *req0,</div><div class='del'>-				 struct ahash_save_req_state *state,</div><div class='del'>-				 int err, u32 mask)</div><div class='del'>-{</div><div class='del'>-	struct ahash_request *req = state-&gt;cur;</div><div class='del'>-	struct crypto_ahash *tfm;</div><div class='del'>-	struct ahash_request *n;</div><div class='del'>-	bool update;</div><div class='del'>-	u8 *page;</div><div class='del'>-</div><div class='del'>-	err = ahash_reqchain_virt(state, err, mask);</div><div class='del'>-	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (req != req0)</div><div class='del'>-		list_add_tail(&amp;req-&gt;base.list, &amp;req0-&gt;base.list);</div><div class='del'>-</div><div class='del'>-	tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	update = state-&gt;op == crypto_ahash_alg(tfm)-&gt;update;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(req, n, &amp;state-&gt;head, base.list) {</div><div class='del'>-		list_del_init(&amp;req-&gt;base.list);</div><div class='del'>-</div><div class='del'>-		req-&gt;base.flags &amp;= mask;</div><div class='del'>-		req-&gt;base.complete = ahash_reqchain_done;</div><div class='del'>-		req-&gt;base.data = state;</div><div class='del'>-		state-&gt;cur = req;</div><div class='del'>-</div><div class='del'>-		if (update &amp;&amp; ahash_request_isvirt(req) &amp;&amp; req-&gt;nbytes) {</div><div class='del'>-			unsigned len = req-&gt;nbytes;</div><div class='del'>-			u8 *result = req-&gt;result;</div><div class='del'>-</div><div class='del'>-			state-&gt;src = req-&gt;svirt;</div><div class='del'>-			state-&gt;nbytes = len;</div><div class='del'>-</div><div class='del'>-			len = min(PAGE_SIZE, len);</div><div class='del'>-</div><div class='del'>-			memcpy(state-&gt;page, req-&gt;svirt, len);</div><div class='del'>-			state-&gt;offset = len;</div><div class='del'>-</div><div class='del'>-			ahash_request_set_crypt(req, &amp;state-&gt;sg, result, len);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		err = state-&gt;op(req);</div><div class='del'>-</div><div class='del'>-		if (err == -EINPROGRESS) {</div><div class='del'>-			if (!list_empty(&amp;state-&gt;head) ||</div><div class='del'>-			    state-&gt;offset &lt; state-&gt;nbytes)</div><div class='del'>-				err = -EBUSY;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (err == -EBUSY)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		err = ahash_reqchain_virt(state, err, mask);</div><div class='del'>-		if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		list_add_tail(&amp;req-&gt;base.list, &amp;req0-&gt;base.list);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	page = state-&gt;page;</div><div class='del'>-	if (page) {</div><div class='del'>-		memset(page, 0, PAGE_SIZE);</div><div class='del'>-		free_page((unsigned long)page);</div><div class='del'>-	}</div><div class='del'>-	ahash_restore_req(req0);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ahash_reqchain_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	struct ahash_save_req_state *state = data;</div><div class='del'>-	crypto_completion_t compl = state-&gt;compl;</div><div class='del'>-</div><div class='del'>-	data = state-&gt;data;</div><div class='del'>-</div><div class='del'>-	if (err == -EINPROGRESS) {</div><div class='del'>-		if (!list_empty(&amp;state-&gt;head) || state-&gt;offset &lt; state-&gt;nbytes)</div><div class='del'>-			return;</div><div class='del'>-		goto notify;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = ahash_reqchain_finish(state-&gt;req0, state, err,</div><div class='del'>-				    CRYPTO_TFM_REQ_MAY_BACKLOG);</div><div class='del'>-	if (err == -EBUSY)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-notify:</div><div class='del'>-	compl(data, err);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ahash_do_req_chain(struct ahash_request *req,</div><div class='del'>-			      int (*op)(struct ahash_request *req))</div><div class='add'>+			      int (*const *op)(struct ahash_request *req))</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	bool update = op == crypto_ahash_alg(tfm)-&gt;update;</div><div class='del'>-	struct ahash_save_req_state *state;</div><div class='del'>-	struct ahash_save_req_state state0;</div><div class='del'>-	struct ahash_request *r2;</div><div class='del'>-	u8 *page = NULL;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (crypto_ahash_req_chain(tfm) ||</div><div class='del'>-	    (!ahash_request_chained(req) &amp;&amp;</div><div class='del'>-	     (!update || !ahash_request_isvirt(req))))</div><div class='del'>-		return op(req);</div><div class='del'>-</div><div class='del'>-	if (update &amp;&amp; ahash_request_hasvirt(req)) {</div><div class='del'>-		gfp_t gfp;</div><div class='del'>-		u32 flags;</div><div class='del'>-</div><div class='del'>-		flags = ahash_request_flags(req);</div><div class='del'>-		gfp = (flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP) ?</div><div class='del'>-		      GFP_KERNEL : GFP_ATOMIC;</div><div class='del'>-		page = (void *)__get_free_page(gfp);</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		if (!page)</div><div class='del'>-			goto out_set_chain;</div><div class='del'>-	}</div><div class='add'>+	if (crypto_ahash_req_virt(tfm) || !ahash_request_isvirt(req))</div><div class='add'>+		return (*op)(req);</div><div class='ctx'> </div><div class='del'>-	state = &amp;state0;</div><div class='del'>-	if (ahash_is_async(tfm)) {</div><div class='del'>-		err = ahash_save_req(req, ahash_reqchain_done);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out_free_page;</div><div class='add'>+	if (crypto_ahash_statesize(tfm) &gt; HASH_MAX_STATESIZE)</div><div class='add'>+		return -ENOSYS;</div><div class='ctx'> </div><div class='del'>-		state = req-&gt;base.data;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	state-&gt;op = op;</div><div class='del'>-	state-&gt;cur = req;</div><div class='del'>-	state-&gt;page = page;</div><div class='del'>-	state-&gt;offset = 0;</div><div class='del'>-	state-&gt;nbytes = 0;</div><div class='del'>-	INIT_LIST_HEAD(&amp;state-&gt;head);</div><div class='del'>-	list_splice_init(&amp;req-&gt;base.list, &amp;state-&gt;head);</div><div class='add'>+	{</div><div class='add'>+		u8 state[HASH_MAX_STATESIZE];</div><div class='ctx'> </div><div class='del'>-	if (page)</div><div class='del'>-		sg_init_one(&amp;state-&gt;sg, page, PAGE_SIZE);</div><div class='add'>+		if (op == &amp;crypto_ahash_alg(tfm)-&gt;digest) {</div><div class='add'>+			ahash_request_set_tfm(req, crypto_ahash_fb(tfm));</div><div class='add'>+			err = crypto_ahash_digest(req);</div><div class='add'>+			goto out_no_state;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (update &amp;&amp; ahash_request_isvirt(req) &amp;&amp; req-&gt;nbytes) {</div><div class='del'>-		unsigned len = req-&gt;nbytes;</div><div class='del'>-		u8 *result = req-&gt;result;</div><div class='add'>+		err = crypto_ahash_export(req, state);</div><div class='add'>+		ahash_request_set_tfm(req, crypto_ahash_fb(tfm));</div><div class='add'>+		err = err ?: crypto_ahash_import(req, state);</div><div class='ctx'> </div><div class='del'>-		state-&gt;src = req-&gt;svirt;</div><div class='del'>-		state-&gt;nbytes = len;</div><div class='add'>+		if (op == &amp;crypto_ahash_alg(tfm)-&gt;finup) {</div><div class='add'>+			err = err ?: crypto_ahash_finup(req);</div><div class='add'>+			goto out_no_state;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		len = min(PAGE_SIZE, len);</div><div class='add'>+		err = err ?:</div><div class='add'>+		      crypto_ahash_update(req) ?:</div><div class='add'>+		      crypto_ahash_export(req, state);</div><div class='ctx'> </div><div class='del'>-		memcpy(page, req-&gt;svirt, len);</div><div class='del'>-		state-&gt;offset = len;</div><div class='add'>+		ahash_request_set_tfm(req, tfm);</div><div class='add'>+		return err ?: crypto_ahash_import(req, state);</div><div class='ctx'> </div><div class='del'>-		ahash_request_set_crypt(req, &amp;state-&gt;sg, result, len);</div><div class='add'>+out_no_state:</div><div class='add'>+		ahash_request_set_tfm(req, tfm);</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	err = op(req);</div><div class='del'>-	if (err == -EBUSY || err == -EINPROGRESS)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	return ahash_reqchain_finish(req, state, err, ~0);</div><div class='del'>-</div><div class='del'>-out_free_page:</div><div class='del'>-	free_page((unsigned long)page);</div><div class='del'>-</div><div class='del'>-out_set_chain:</div><div class='del'>-	req-&gt;base.err = err;</div><div class='del'>-	list_for_each_entry(r2, &amp;req-&gt;base.list, base.list)</div><div class='del'>-		r2-&gt;base.err = err;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int crypto_ahash_init(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='ctx'> </div><div class='del'>-	if (likely(tfm-&gt;using_shash)) {</div><div class='del'>-		struct ahash_request *r2;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		err = crypto_shash_init(prepare_shash_desc(req, tfm));</div><div class='del'>-		req-&gt;base.err = err;</div><div class='del'>-</div><div class='del'>-		list_for_each_entry(r2, &amp;req-&gt;base.list, base.list) {</div><div class='del'>-			struct shash_desc *desc;</div><div class='del'>-</div><div class='del'>-			desc = prepare_shash_desc(r2, tfm);</div><div class='del'>-			r2-&gt;base.err = crypto_shash_init(desc);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	if (likely(tfm-&gt;using_shash))</div><div class='add'>+		return crypto_shash_init(prepare_shash_desc(req, tfm));</div><div class='ctx'> 	if (crypto_ahash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='ctx'> 		return -ENOKEY;</div><div class='add'>+	if (ahash_req_on_stack(req) &amp;&amp; ahash_is_async(tfm))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	if (crypto_ahash_block_only(tfm)) {</div><div class='add'>+		u8 *buf = ahash_request_ctx(req);</div><div class='ctx'> </div><div class='del'>-	return ahash_do_req_chain(req, crypto_ahash_alg(tfm)-&gt;init);</div><div class='add'>+		buf += crypto_ahash_reqsize(tfm) - 1;</div><div class='add'>+		*buf = 0;</div><div class='add'>+	}</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;init(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_init);</div><div class='ctx'> </div><div class='del'>-static int ahash_save_req(struct ahash_request *req, crypto_completion_t cplt)</div><div class='add'>+static void ahash_save_req(struct ahash_request *req, crypto_completion_t cplt)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct ahash_save_req_state *state;</div><div class='del'>-	gfp_t gfp;</div><div class='del'>-	u32 flags;</div><div class='del'>-</div><div class='del'>-	if (!ahash_is_async(tfm))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	flags = ahash_request_flags(req);</div><div class='del'>-	gfp = (flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP) ?  GFP_KERNEL : GFP_ATOMIC;</div><div class='del'>-	state = kmalloc(sizeof(*state), gfp);</div><div class='del'>-	if (!state)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	state-&gt;compl = req-&gt;base.complete;</div><div class='del'>-	state-&gt;data = req-&gt;base.data;</div><div class='add'>+	req-&gt;saved_complete = req-&gt;base.complete;</div><div class='add'>+	req-&gt;saved_data = req-&gt;base.data;</div><div class='ctx'> 	req-&gt;base.complete = cplt;</div><div class='del'>-	req-&gt;base.data = state;</div><div class='del'>-	state-&gt;req0 = req;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	req-&gt;base.data = req;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ahash_restore_req(struct ahash_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct ahash_save_req_state *state;</div><div class='del'>-	struct crypto_ahash *tfm;</div><div class='del'>-</div><div class='del'>-	tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	if (!ahash_is_async(tfm))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	state = req-&gt;base.data;</div><div class='del'>-</div><div class='del'>-	req-&gt;base.complete = state-&gt;compl;</div><div class='del'>-	req-&gt;base.data = state-&gt;data;</div><div class='del'>-	kfree(state);</div><div class='add'>+	req-&gt;base.complete = req-&gt;saved_complete;</div><div class='add'>+	req-&gt;base.data = req-&gt;saved_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int crypto_ahash_update(struct ahash_request *req)</div><div class='add'>+static int ahash_update_finish(struct ahash_request *req, int err)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	bool nonzero = crypto_ahash_final_nonzero(tfm);</div><div class='add'>+	int bs = crypto_ahash_blocksize(tfm);</div><div class='add'>+	u8 *blenp = ahash_request_ctx(req);</div><div class='add'>+	int blen;</div><div class='add'>+	u8 *buf;</div><div class='add'>+</div><div class='add'>+	blenp += crypto_ahash_reqsize(tfm) - 1;</div><div class='add'>+	blen = *blenp;</div><div class='add'>+	buf = blenp - bs;</div><div class='add'>+</div><div class='add'>+	if (blen) {</div><div class='add'>+		req-&gt;src = req-&gt;sg_head + 1;</div><div class='add'>+		if (sg_is_chain(req-&gt;src))</div><div class='add'>+			req-&gt;src = sg_chain_ptr(req-&gt;src);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (likely(tfm-&gt;using_shash)) {</div><div class='del'>-		struct ahash_request *r2;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		err = shash_ahash_update(req, ahash_request_ctx(req));</div><div class='del'>-		req-&gt;base.err = err;</div><div class='del'>-</div><div class='del'>-		list_for_each_entry(r2, &amp;req-&gt;base.list, base.list) {</div><div class='del'>-			struct shash_desc *desc;</div><div class='add'>+	req-&gt;nbytes += nonzero - blen;</div><div class='ctx'> </div><div class='del'>-			desc = ahash_request_ctx(r2);</div><div class='del'>-			r2-&gt;base.err = shash_ahash_update(r2, desc);</div><div class='del'>-		}</div><div class='add'>+	blen = err &lt; 0 ? 0 : err + nonzero;</div><div class='add'>+	if (ahash_request_isvirt(req))</div><div class='add'>+		memcpy(buf, req-&gt;svirt + req-&gt;nbytes - blen, blen);</div><div class='add'>+	else</div><div class='add'>+		memcpy_from_sglist(buf, req-&gt;src, req-&gt;nbytes - blen, blen);</div><div class='add'>+	*blenp = blen;</div><div class='ctx'> </div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='add'>+	ahash_restore_req(req);</div><div class='ctx'> </div><div class='del'>-	return ahash_do_req_chain(req, crypto_ahash_alg(tfm)-&gt;update);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_ahash_update);</div><div class='ctx'> </div><div class='del'>-int crypto_ahash_final(struct ahash_request *req)</div><div class='add'>+static void ahash_update_done(void *data, int err)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-</div><div class='del'>-	if (likely(tfm-&gt;using_shash)) {</div><div class='del'>-		struct ahash_request *r2;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		err = crypto_shash_final(ahash_request_ctx(req), req-&gt;result);</div><div class='del'>-		req-&gt;base.err = err;</div><div class='del'>-</div><div class='del'>-		list_for_each_entry(r2, &amp;req-&gt;base.list, base.list) {</div><div class='del'>-			struct shash_desc *desc;</div><div class='del'>-</div><div class='del'>-			desc = ahash_request_ctx(r2);</div><div class='del'>-			r2-&gt;base.err = crypto_shash_final(desc, r2-&gt;result);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ahash_do_req_chain(req, crypto_ahash_alg(tfm)-&gt;final);</div><div class='add'>+	ahash_op_done(data, err, ahash_update_finish);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_ahash_final);</div><div class='ctx'> </div><div class='del'>-int crypto_ahash_finup(struct ahash_request *req)</div><div class='add'>+int crypto_ahash_update(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	bool nonzero = crypto_ahash_final_nonzero(tfm);</div><div class='add'>+	int bs = crypto_ahash_blocksize(tfm);</div><div class='add'>+	u8 *blenp = ahash_request_ctx(req);</div><div class='add'>+	int blen, err;</div><div class='add'>+	u8 *buf;</div><div class='ctx'> </div><div class='del'>-	if (likely(tfm-&gt;using_shash)) {</div><div class='del'>-		struct ahash_request *r2;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		err = shash_ahash_finup(req, ahash_request_ctx(req));</div><div class='del'>-		req-&gt;base.err = err;</div><div class='add'>+	if (likely(tfm-&gt;using_shash))</div><div class='add'>+		return shash_ahash_update(req, ahash_request_ctx(req));</div><div class='add'>+	if (ahash_req_on_stack(req) &amp;&amp; ahash_is_async(tfm))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	if (!crypto_ahash_block_only(tfm))</div><div class='add'>+		return ahash_do_req_chain(req, &amp;crypto_ahash_alg(tfm)-&gt;update);</div><div class='ctx'> </div><div class='del'>-		list_for_each_entry(r2, &amp;req-&gt;base.list, base.list) {</div><div class='del'>-			struct shash_desc *desc;</div><div class='add'>+	blenp += crypto_ahash_reqsize(tfm) - 1;</div><div class='add'>+	blen = *blenp;</div><div class='add'>+	buf = blenp - bs;</div><div class='ctx'> </div><div class='del'>-			desc = ahash_request_ctx(r2);</div><div class='del'>-			r2-&gt;base.err = shash_ahash_finup(r2, desc);</div><div class='del'>-		}</div><div class='add'>+	if (blen + req-&gt;nbytes &lt; bs + nonzero) {</div><div class='add'>+		if (ahash_request_isvirt(req))</div><div class='add'>+			memcpy(buf + blen, req-&gt;svirt, req-&gt;nbytes);</div><div class='add'>+		else</div><div class='add'>+			memcpy_from_sglist(buf + blen, req-&gt;src, 0,</div><div class='add'>+					   req-&gt;nbytes);</div><div class='ctx'> </div><div class='del'>-		return err;</div><div class='add'>+		*blenp += req-&gt;nbytes;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!crypto_ahash_alg(tfm)-&gt;finup ||</div><div class='del'>-	    (!crypto_ahash_req_chain(tfm) &amp;&amp; ahash_request_hasvirt(req)))</div><div class='del'>-		return ahash_def_finup(req);</div><div class='del'>-</div><div class='del'>-	return ahash_do_req_chain(req, crypto_ahash_alg(tfm)-&gt;finup);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_ahash_finup);</div><div class='del'>-</div><div class='del'>-static int ahash_def_digest_finish(struct ahash_request *req, int err)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ahash *tfm;</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='add'>+	if (blen) {</div><div class='add'>+		memset(req-&gt;sg_head, 0, sizeof(req-&gt;sg_head[0]));</div><div class='add'>+		sg_set_buf(req-&gt;sg_head, buf, blen);</div><div class='add'>+		if (req-&gt;src != req-&gt;sg_head + 1)</div><div class='add'>+			sg_chain(req-&gt;sg_head, 2, req-&gt;src);</div><div class='add'>+		req-&gt;src = req-&gt;sg_head;</div><div class='add'>+		req-&gt;nbytes += blen;</div><div class='add'>+	}</div><div class='add'>+	req-&gt;nbytes -= nonzero;</div><div class='ctx'> </div><div class='del'>-	tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	if (ahash_is_async(tfm))</div><div class='del'>-		req-&gt;base.complete = ahash_def_finup_done1;</div><div class='add'>+	ahash_save_req(req, ahash_update_done);</div><div class='ctx'> </div><div class='del'>-	err = crypto_ahash_update(req);</div><div class='add'>+	err = ahash_do_req_chain(req, &amp;crypto_ahash_alg(tfm)-&gt;update);</div><div class='ctx'> 	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return ahash_def_finup_finish1(req, err);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	ahash_restore_req(req);</div><div class='del'>-	return err;</div><div class='add'>+	return ahash_update_finish(req, err);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_ahash_update);</div><div class='ctx'> </div><div class='del'>-static void ahash_def_digest_done(void *data, int err)</div><div class='add'>+static int ahash_finup_finish(struct ahash_request *req, int err)</div><div class='ctx'> {</div><div class='del'>-	struct ahash_save_req_state *state0 = data;</div><div class='del'>-	struct ahash_save_req_state state;</div><div class='del'>-	struct ahash_request *areq;</div><div class='del'>-</div><div class='del'>-	state = *state0;</div><div class='del'>-	areq = state.req0;</div><div class='del'>-	if (err == -EINPROGRESS)</div><div class='del'>-		goto out;</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	u8 *blenp = ahash_request_ctx(req);</div><div class='add'>+	int blen;</div><div class='add'>+</div><div class='add'>+	blenp += crypto_ahash_reqsize(tfm) - 1;</div><div class='add'>+	blen = *blenp;</div><div class='add'>+</div><div class='add'>+	if (blen) {</div><div class='add'>+		if (sg_is_last(req-&gt;src))</div><div class='add'>+			req-&gt;src = NULL;</div><div class='add'>+		else {</div><div class='add'>+			req-&gt;src = req-&gt;sg_head + 1;</div><div class='add'>+			if (sg_is_chain(req-&gt;src))</div><div class='add'>+				req-&gt;src = sg_chain_ptr(req-&gt;src);</div><div class='add'>+		}</div><div class='add'>+		req-&gt;nbytes -= blen;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	areq-&gt;base.flags &amp;= ~CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_restore_req(req);</div><div class='ctx'> </div><div class='del'>-	err = ahash_def_digest_finish(areq, err);</div><div class='del'>-	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-		return;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	state.compl(state.data, err);</div><div class='add'>+static void ahash_finup_done(void *data, int err)</div><div class='add'>+{</div><div class='add'>+	ahash_op_done(data, err, ahash_finup_finish);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ahash_def_digest(struct ahash_request *req)</div><div class='add'>+int crypto_ahash_finup(struct ahash_request *req)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+	int bs = crypto_ahash_blocksize(tfm);</div><div class='add'>+	u8 *blenp = ahash_request_ctx(req);</div><div class='add'>+	int blen, err;</div><div class='add'>+	u8 *buf;</div><div class='ctx'> </div><div class='del'>-	err = ahash_save_req(req, ahash_def_digest_done);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	if (likely(tfm-&gt;using_shash))</div><div class='add'>+		return shash_ahash_finup(req, ahash_request_ctx(req));</div><div class='add'>+	if (ahash_req_on_stack(req) &amp;&amp; ahash_is_async(tfm))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	if (!crypto_ahash_alg(tfm)-&gt;finup)</div><div class='add'>+		return ahash_def_finup(req);</div><div class='add'>+	if (!crypto_ahash_block_only(tfm))</div><div class='add'>+		return ahash_do_req_chain(req, &amp;crypto_ahash_alg(tfm)-&gt;finup);</div><div class='add'>+</div><div class='add'>+	blenp += crypto_ahash_reqsize(tfm) - 1;</div><div class='add'>+	blen = *blenp;</div><div class='add'>+	buf = blenp - bs;</div><div class='add'>+</div><div class='add'>+	if (blen) {</div><div class='add'>+		memset(req-&gt;sg_head, 0, sizeof(req-&gt;sg_head[0]));</div><div class='add'>+		sg_set_buf(req-&gt;sg_head, buf, blen);</div><div class='add'>+		if (!req-&gt;src)</div><div class='add'>+			sg_mark_end(req-&gt;sg_head);</div><div class='add'>+		else if (req-&gt;src != req-&gt;sg_head + 1)</div><div class='add'>+			sg_chain(req-&gt;sg_head, 2, req-&gt;src);</div><div class='add'>+		req-&gt;src = req-&gt;sg_head;</div><div class='add'>+		req-&gt;nbytes += blen;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ahash_save_req(req, ahash_finup_done);</div><div class='ctx'> </div><div class='del'>-	err = crypto_ahash_init(req);</div><div class='add'>+	err = ahash_do_req_chain(req, &amp;crypto_ahash_alg(tfm)-&gt;finup);</div><div class='ctx'> 	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return ahash_def_digest_finish(req, err);</div><div class='add'>+	return ahash_finup_finish(req, err);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_ahash_finup);</div><div class='ctx'> </div><div class='ctx'> int crypto_ahash_digest(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='ctx'> </div><div class='del'>-	if (likely(tfm-&gt;using_shash)) {</div><div class='del'>-		struct ahash_request *r2;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		err = shash_ahash_digest(req, prepare_shash_desc(req, tfm));</div><div class='del'>-		req-&gt;base.err = err;</div><div class='del'>-</div><div class='del'>-		list_for_each_entry(r2, &amp;req-&gt;base.list, base.list) {</div><div class='del'>-			struct shash_desc *desc;</div><div class='del'>-</div><div class='del'>-			desc = prepare_shash_desc(r2, tfm);</div><div class='del'>-			r2-&gt;base.err = shash_ahash_digest(r2, desc);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!crypto_ahash_req_chain(tfm) &amp;&amp; ahash_request_hasvirt(req))</div><div class='del'>-		return ahash_def_digest(req);</div><div class='del'>-</div><div class='add'>+	if (likely(tfm-&gt;using_shash))</div><div class='add'>+		return shash_ahash_digest(req, prepare_shash_desc(req, tfm));</div><div class='add'>+	if (ahash_req_on_stack(req) &amp;&amp; ahash_is_async(tfm))</div><div class='add'>+		return -EAGAIN;</div><div class='ctx'> 	if (crypto_ahash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='ctx'> 		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	return ahash_do_req_chain(req, crypto_ahash_alg(tfm)-&gt;digest);</div><div class='add'>+	return ahash_do_req_chain(req, &amp;crypto_ahash_alg(tfm)-&gt;digest);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_digest);</div><div class='ctx'> </div><div class='ctx'> static void ahash_def_finup_done2(void *data, int err)</div><div class='ctx'> {</div><div class='del'>-	struct ahash_save_req_state *state = data;</div><div class='del'>-	struct ahash_request *areq = state-&gt;req0;</div><div class='add'>+	struct ahash_request *areq = data;</div><div class='ctx'> </div><div class='ctx'> 	if (err == -EINPROGRESS)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -797,14 +600,10 @@ static void ahash_def_finup_done2(void *data, int err)</div><div class='ctx'> </div><div class='ctx'> static int ahash_def_finup_finish1(struct ahash_request *req, int err)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ahash *tfm;</div><div class='del'>-</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	if (ahash_is_async(tfm))</div><div class='del'>-		req-&gt;base.complete = ahash_def_finup_done2;</div><div class='add'>+	req-&gt;base.complete = ahash_def_finup_done2;</div><div class='ctx'> </div><div class='ctx'> 	err = crypto_ahash_final(req);</div><div class='ctx'> 	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='hunk'>@@ -817,32 +616,14 @@ out:</div><div class='ctx'> </div><div class='ctx'> static void ahash_def_finup_done1(void *data, int err)</div><div class='ctx'> {</div><div class='del'>-	struct ahash_save_req_state *state0 = data;</div><div class='del'>-	struct ahash_save_req_state state;</div><div class='del'>-	struct ahash_request *areq;</div><div class='del'>-</div><div class='del'>-	state = *state0;</div><div class='del'>-	areq = state.req0;</div><div class='del'>-	if (err == -EINPROGRESS)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	areq-&gt;base.flags &amp;= ~CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	err = ahash_def_finup_finish1(areq, err);</div><div class='del'>-	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	state.compl(state.data, err);</div><div class='add'>+	ahash_op_done(data, err, ahash_def_finup_finish1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ahash_def_finup(struct ahash_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = ahash_save_req(req, ahash_def_finup_done1);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	ahash_save_req(req, ahash_def_finup_done1);</div><div class='ctx'> </div><div class='ctx'> 	err = crypto_ahash_update(req);</div><div class='ctx'> 	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='hunk'>@@ -851,16 +632,47 @@ static int ahash_def_finup(struct ahash_request *req)</div><div class='ctx'> 	return ahash_def_finup_finish1(req, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int crypto_ahash_export_core(struct ahash_request *req, void *out)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+</div><div class='add'>+	if (likely(tfm-&gt;using_shash))</div><div class='add'>+		return crypto_shash_export_core(ahash_request_ctx(req), out);</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;export_core(req, out);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_ahash_export_core);</div><div class='add'>+</div><div class='ctx'> int crypto_ahash_export(struct ahash_request *req, void *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='ctx'> </div><div class='ctx'> 	if (likely(tfm-&gt;using_shash))</div><div class='ctx'> 		return crypto_shash_export(ahash_request_ctx(req), out);</div><div class='add'>+	if (crypto_ahash_block_only(tfm)) {</div><div class='add'>+		unsigned int plen = crypto_ahash_blocksize(tfm) + 1;</div><div class='add'>+		unsigned int reqsize = crypto_ahash_reqsize(tfm);</div><div class='add'>+		unsigned int ss = crypto_ahash_statesize(tfm);</div><div class='add'>+		u8 *buf = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+		memcpy(out + ss - plen, buf + reqsize - plen, plen);</div><div class='add'>+	}</div><div class='ctx'> 	return crypto_ahash_alg(tfm)-&gt;export(req, out);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_export);</div><div class='ctx'> </div><div class='add'>+int crypto_ahash_import_core(struct ahash_request *req, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='add'>+</div><div class='add'>+	if (likely(tfm-&gt;using_shash))</div><div class='add'>+		return crypto_shash_import_core(prepare_shash_desc(req, tfm),</div><div class='add'>+						in);</div><div class='add'>+	if (crypto_ahash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='add'>+		return -ENOKEY;</div><div class='add'>+	return crypto_ahash_alg(tfm)-&gt;import_core(req, in);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_ahash_import_core);</div><div class='add'>+</div><div class='ctx'> int crypto_ahash_import(struct ahash_request *req, const void *in)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='hunk'>@@ -869,6 +681,12 @@ int crypto_ahash_import(struct ahash_request *req, const void *in)</div><div class='ctx'> 		return crypto_shash_import(prepare_shash_desc(req, tfm), in);</div><div class='ctx'> 	if (crypto_ahash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='ctx'> 		return -ENOKEY;</div><div class='add'>+	if (crypto_ahash_block_only(tfm)) {</div><div class='add'>+		unsigned int reqsize = crypto_ahash_reqsize(tfm);</div><div class='add'>+		u8 *buf = ahash_request_ctx(req);</div><div class='add'>+</div><div class='add'>+		buf[reqsize - 1] = 0;</div><div class='add'>+	}</div><div class='ctx'> 	return crypto_ahash_alg(tfm)-&gt;import(req, in);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_ahash_import);</div><div class='hunk'>@@ -878,26 +696,73 @@ static void crypto_ahash_exit_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	struct crypto_ahash *hash = __crypto_ahash_cast(tfm);</div><div class='ctx'> 	struct ahash_alg *alg = crypto_ahash_alg(hash);</div><div class='ctx'> </div><div class='del'>-	alg-&gt;exit_tfm(hash);</div><div class='add'>+	if (alg-&gt;exit_tfm)</div><div class='add'>+		alg-&gt;exit_tfm(hash);</div><div class='add'>+	else if (tfm-&gt;__crt_alg-&gt;cra_exit)</div><div class='add'>+		tfm-&gt;__crt_alg-&gt;cra_exit(tfm);</div><div class='add'>+</div><div class='add'>+	if (crypto_ahash_need_fallback(hash))</div><div class='add'>+		crypto_free_ahash(crypto_ahash_fb(hash));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_ahash_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_ahash *hash = __crypto_ahash_cast(tfm);</div><div class='ctx'> 	struct ahash_alg *alg = crypto_ahash_alg(hash);</div><div class='add'>+	struct crypto_ahash *fb = NULL;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	crypto_ahash_set_statesize(hash, alg-&gt;halg.statesize);</div><div class='del'>-	crypto_ahash_set_reqsize(hash, alg-&gt;reqsize);</div><div class='add'>+	crypto_ahash_set_reqsize(hash, crypto_tfm_alg_reqsize(tfm));</div><div class='ctx'> </div><div class='ctx'> 	if (tfm-&gt;__crt_alg-&gt;cra_type == &amp;crypto_shash_type)</div><div class='ctx'> 		return crypto_init_ahash_using_shash(tfm);</div><div class='ctx'> </div><div class='add'>+	if (crypto_ahash_need_fallback(hash)) {</div><div class='add'>+		fb = crypto_alloc_ahash(crypto_ahash_alg_name(hash),</div><div class='add'>+					CRYPTO_ALG_REQ_VIRT,</div><div class='add'>+					CRYPTO_ALG_ASYNC |</div><div class='add'>+					CRYPTO_ALG_REQ_VIRT |</div><div class='add'>+					CRYPTO_AHASH_ALG_NO_EXPORT_CORE);</div><div class='add'>+		if (IS_ERR(fb))</div><div class='add'>+			return PTR_ERR(fb);</div><div class='add'>+</div><div class='add'>+		tfm-&gt;fb = crypto_ahash_tfm(fb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ahash_set_needkey(hash, alg);</div><div class='ctx'> </div><div class='del'>-	if (alg-&gt;exit_tfm)</div><div class='del'>-		tfm-&gt;exit = crypto_ahash_exit_tfm;</div><div class='add'>+	tfm-&gt;exit = crypto_ahash_exit_tfm;</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;init_tfm)</div><div class='add'>+		err = alg-&gt;init_tfm(hash);</div><div class='add'>+	else if (tfm-&gt;__crt_alg-&gt;cra_init)</div><div class='add'>+		err = tfm-&gt;__crt_alg-&gt;cra_init(tfm);</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_sync_hash;</div><div class='add'>+</div><div class='add'>+	if (!ahash_is_async(hash) &amp;&amp; crypto_ahash_reqsize(hash) &gt;</div><div class='add'>+				     MAX_SYNC_HASH_REQSIZE)</div><div class='add'>+		goto out_exit_tfm;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(HASH_MAX_DESCSIZE &gt; MAX_SYNC_HASH_REQSIZE);</div><div class='add'>+	if (crypto_ahash_reqsize(hash) &lt; HASH_MAX_DESCSIZE)</div><div class='add'>+		crypto_ahash_set_reqsize(hash, HASH_MAX_DESCSIZE);</div><div class='ctx'> </div><div class='del'>-	return alg-&gt;init_tfm ? alg-&gt;init_tfm(hash) : 0;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_exit_tfm:</div><div class='add'>+	if (alg-&gt;exit_tfm)</div><div class='add'>+		alg-&gt;exit_tfm(hash);</div><div class='add'>+	else if (tfm-&gt;__crt_alg-&gt;cra_exit)</div><div class='add'>+		tfm-&gt;__crt_alg-&gt;cra_exit(tfm);</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+out_free_sync_hash:</div><div class='add'>+	crypto_free_ahash(fb);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int crypto_ahash_extsize(struct crypto_alg *alg)</div><div class='hunk'>@@ -956,6 +821,7 @@ static const struct crypto_type crypto_ahash_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_AHASH_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_AHASH,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_ahash, base),</div><div class='add'>+	.algsize = offsetof(struct ahash_alg, halg.base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int crypto_grab_ahash(struct crypto_ahash_spawn *spawn,</div><div class='hunk'>@@ -980,7 +846,7 @@ int crypto_has_ahash(const char *alg_name, u32 type, u32 mask)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_has_ahash);</div><div class='ctx'> </div><div class='del'>-static bool crypto_hash_alg_has_setkey(struct hash_alg_common *halg)</div><div class='add'>+bool crypto_hash_alg_has_setkey(struct hash_alg_common *halg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_alg *alg = &amp;halg-&gt;base;</div><div class='ctx'> </div><div class='hunk'>@@ -989,11 +855,13 @@ static bool crypto_hash_alg_has_setkey(struct hash_alg_common *halg)</div><div class='ctx'> </div><div class='ctx'> 	return __crypto_ahash_alg(alg)-&gt;setkey != ahash_nosetkey;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_hash_alg_has_setkey);</div><div class='ctx'> </div><div class='ctx'> struct crypto_ahash *crypto_clone_ahash(struct crypto_ahash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	struct hash_alg_common *halg = crypto_hash_alg_common(hash);</div><div class='ctx'> 	struct crypto_tfm *tfm = crypto_ahash_tfm(hash);</div><div class='add'>+	struct crypto_ahash *fb = NULL;</div><div class='ctx'> 	struct crypto_ahash *nhash;</div><div class='ctx'> 	struct ahash_alg *alg;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1023,28 +891,52 @@ struct crypto_ahash *crypto_clone_ahash(struct crypto_ahash *hash)</div><div class='ctx'> 			err = PTR_ERR(shash);</div><div class='ctx'> 			goto out_free_nhash;</div><div class='ctx'> 		}</div><div class='add'>+		crypto_ahash_tfm(nhash)-&gt;exit = crypto_exit_ahash_using_shash;</div><div class='ctx'> 		nhash-&gt;using_shash = true;</div><div class='ctx'> 		*nctx = shash;</div><div class='ctx'> 		return nhash;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (crypto_ahash_need_fallback(hash)) {</div><div class='add'>+		fb = crypto_clone_ahash(crypto_ahash_fb(hash));</div><div class='add'>+		err = PTR_ERR(fb);</div><div class='add'>+		if (IS_ERR(fb))</div><div class='add'>+			goto out_free_nhash;</div><div class='add'>+</div><div class='add'>+		crypto_ahash_tfm(nhash)-&gt;fb = crypto_ahash_tfm(fb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = -ENOSYS;</div><div class='ctx'> 	alg = crypto_ahash_alg(hash);</div><div class='ctx'> 	if (!alg-&gt;clone_tfm)</div><div class='del'>-		goto out_free_nhash;</div><div class='add'>+		goto out_free_fb;</div><div class='ctx'> </div><div class='ctx'> 	err = alg-&gt;clone_tfm(nhash, hash);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out_free_nhash;</div><div class='add'>+		goto out_free_fb;</div><div class='add'>+</div><div class='add'>+	crypto_ahash_tfm(nhash)-&gt;exit = crypto_ahash_exit_tfm;</div><div class='ctx'> </div><div class='ctx'> 	return nhash;</div><div class='ctx'> </div><div class='add'>+out_free_fb:</div><div class='add'>+	crypto_free_ahash(fb);</div><div class='ctx'> out_free_nhash:</div><div class='ctx'> 	crypto_free_ahash(nhash);</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_clone_ahash);</div><div class='ctx'> </div><div class='add'>+static int ahash_default_export_core(struct ahash_request *req, void *out)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ahash_default_import_core(struct ahash_request *req, const void *in)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ahash_prepare_alg(struct ahash_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;halg.base;</div><div class='hunk'>@@ -1053,7 +945,11 @@ static int ahash_prepare_alg(struct ahash_alg *alg)</div><div class='ctx'> 	if (alg-&gt;halg.statesize == 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (alg-&gt;reqsize &amp;&amp; alg-&gt;reqsize &lt; alg-&gt;halg.statesize)</div><div class='add'>+	if (base-&gt;cra_reqsize &amp;&amp; base-&gt;cra_reqsize &lt; alg-&gt;halg.statesize)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!(base-&gt;cra_flags &amp; CRYPTO_ALG_ASYNC) &amp;&amp;</div><div class='add'>+	    base-&gt;cra_reqsize &gt; MAX_SYNC_HASH_REQSIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	err = hash_prepare_alg(&amp;alg-&gt;halg);</div><div class='hunk'>@@ -1063,9 +959,28 @@ static int ahash_prepare_alg(struct ahash_alg *alg)</div><div class='ctx'> 	base-&gt;cra_type = &amp;crypto_ahash_type;</div><div class='ctx'> 	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_AHASH;</div><div class='ctx'> </div><div class='add'>+	if ((base-&gt;cra_flags ^ CRYPTO_ALG_REQ_VIRT) &amp;</div><div class='add'>+	    (CRYPTO_ALG_ASYNC | CRYPTO_ALG_REQ_VIRT))</div><div class='add'>+		base-&gt;cra_flags |= CRYPTO_ALG_NEED_FALLBACK;</div><div class='add'>+</div><div class='ctx'> 	if (!alg-&gt;setkey)</div><div class='ctx'> 		alg-&gt;setkey = ahash_nosetkey;</div><div class='ctx'> </div><div class='add'>+	if (base-&gt;cra_flags &amp; CRYPTO_AHASH_ALG_BLOCK_ONLY) {</div><div class='add'>+		BUILD_BUG_ON(MAX_ALGAPI_BLOCKSIZE &gt;= 256);</div><div class='add'>+		if (!alg-&gt;finup)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		base-&gt;cra_reqsize += base-&gt;cra_blocksize + 1;</div><div class='add'>+		alg-&gt;halg.statesize += base-&gt;cra_blocksize + 1;</div><div class='add'>+		alg-&gt;export_core = alg-&gt;export;</div><div class='add'>+		alg-&gt;import_core = alg-&gt;import;</div><div class='add'>+	} else if (!alg-&gt;export_core || !alg-&gt;import_core) {</div><div class='add'>+		alg-&gt;export_core = ahash_default_export_core;</div><div class='add'>+		alg-&gt;import_core = ahash_default_import_core;</div><div class='add'>+		base-&gt;cra_flags |= CRYPTO_AHASH_ALG_NO_EXPORT_CORE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1135,18 +1050,40 @@ EXPORT_SYMBOL_GPL(ahash_register_instance);</div><div class='ctx'> </div><div class='ctx'> void ahash_request_free(struct ahash_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct ahash_request *tmp;</div><div class='del'>-	struct ahash_request *r2;</div><div class='del'>-</div><div class='ctx'> 	if (unlikely(!req))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_safe(r2, tmp, &amp;req-&gt;base.list, base.list)</div><div class='del'>-		kfree_sensitive(r2);</div><div class='add'>+	if (!ahash_req_on_stack(req)) {</div><div class='add'>+		kfree(req);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	kfree_sensitive(req);</div><div class='add'>+	ahash_request_zero(req);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ahash_request_free);</div><div class='ctx'> </div><div class='add'>+int crypto_hash_digest(struct crypto_ahash *tfm, const u8 *data,</div><div class='add'>+		       unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	HASH_REQUEST_ON_STACK(req, crypto_ahash_fb(tfm));</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(req, 0, NULL, NULL);</div><div class='add'>+	ahash_request_set_virt(req, data, out, len);</div><div class='add'>+	err = crypto_ahash_digest(req);</div><div class='add'>+</div><div class='add'>+	ahash_request_zero(req);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_hash_digest);</div><div class='add'>+</div><div class='add'>+void ahash_free_singlespawn_instance(struct ahash_instance *inst)</div><div class='add'>+{</div><div class='add'>+	crypto_drop_spawn(ahash_instance_ctx(inst));</div><div class='add'>+	kfree(inst);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ahash_free_singlespawn_instance);</div><div class='add'>+</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Asynchronous cryptographic hash type");</div><div class='head'>diff --git a/crypto/akcipher.c b/crypto/akcipher.c<br/>index 72c82d9aa077..a36f50c83827 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/akcipher.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/akcipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/akcipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/akcipher.c</a></div><div class='hunk'>@@ -97,6 +97,7 @@ static const struct crypto_type crypto_akcipher_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_AHASH_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_AKCIPHER,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_akcipher, base),</div><div class='add'>+	.algsize = offsetof(struct akcipher_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int crypto_grab_akcipher(struct crypto_akcipher_spawn *spawn,</div><div class='head'>diff --git a/crypto/algapi.c b/crypto/algapi.c<br/>index ea9ed9580aa8..e604d0d8b7b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/algapi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algapi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/algapi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/algapi.c</a></div><div class='hunk'>@@ -71,12 +71,23 @@ static void crypto_free_instance(struct crypto_instance *inst)</div><div class='ctx'> </div><div class='ctx'> static void crypto_destroy_instance_workfn(struct work_struct *w)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_instance *inst = container_of(w, struct crypto_instance,</div><div class='add'>+	struct crypto_template *tmpl = container_of(w, struct crypto_template,</div><div class='ctx'> 						    free_work);</div><div class='del'>-	struct crypto_template *tmpl = inst-&gt;tmpl;</div><div class='add'>+	struct crypto_instance *inst;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+	HLIST_HEAD(list);</div><div class='add'>+</div><div class='add'>+	down_write(&amp;crypto_alg_sem);</div><div class='add'>+	hlist_for_each_entry_safe(inst, n, &amp;tmpl-&gt;dead, list) {</div><div class='add'>+		if (refcount_read(&amp;inst-&gt;alg.cra_refcnt) != -1)</div><div class='add'>+			continue;</div><div class='add'>+		hlist_del(&amp;inst-&gt;list);</div><div class='add'>+		hlist_add_head(&amp;inst-&gt;list, &amp;list);</div><div class='add'>+	}</div><div class='add'>+	up_write(&amp;crypto_alg_sem);</div><div class='ctx'> </div><div class='del'>-	crypto_free_instance(inst);</div><div class='del'>-	crypto_tmpl_put(tmpl);</div><div class='add'>+	hlist_for_each_entry_safe(inst, n, &amp;list, list)</div><div class='add'>+		crypto_free_instance(inst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_destroy_instance(struct crypto_alg *alg)</div><div class='hunk'>@@ -84,9 +95,10 @@ static void crypto_destroy_instance(struct crypto_alg *alg)</div><div class='ctx'> 	struct crypto_instance *inst = container_of(alg,</div><div class='ctx'> 						    struct crypto_instance,</div><div class='ctx'> 						    alg);</div><div class='add'>+	struct crypto_template *tmpl = inst-&gt;tmpl;</div><div class='ctx'> </div><div class='del'>-	INIT_WORK(&amp;inst-&gt;free_work, crypto_destroy_instance_workfn);</div><div class='del'>-	schedule_work(&amp;inst-&gt;free_work);</div><div class='add'>+	refcount_set(&amp;alg-&gt;cra_refcnt, -1);</div><div class='add'>+	schedule_work(&amp;tmpl-&gt;free_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -132,14 +144,16 @@ static void crypto_remove_instance(struct crypto_instance *inst,</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.cra_flags |= CRYPTO_ALG_DEAD;</div><div class='ctx'> </div><div class='del'>-	if (!tmpl || !crypto_tmpl_get(tmpl))</div><div class='add'>+	if (!tmpl)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	list_move(&amp;inst-&gt;alg.cra_list, list);</div><div class='add'>+	list_del_init(&amp;inst-&gt;alg.cra_list);</div><div class='ctx'> 	hlist_del(&amp;inst-&gt;list);</div><div class='del'>-	inst-&gt;alg.cra_destroy = crypto_destroy_instance;</div><div class='add'>+	hlist_add_head(&amp;inst-&gt;list, &amp;tmpl-&gt;dead);</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!list_empty(&amp;inst-&gt;alg.cra_users));</div><div class='add'>+</div><div class='add'>+	crypto_alg_put(&amp;inst-&gt;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -260,8 +274,7 @@ static struct crypto_larval *crypto_alloc_test_larval(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_larval *larval;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_CRYPTO_MANAGER) ||</div><div class='del'>-	    IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS) ||</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CRYPTO_SELFTESTS) ||</div><div class='ctx'> 	    (alg-&gt;cra_flags &amp; CRYPTO_ALG_INTERNAL))</div><div class='ctx'> 		return NULL; /* No self-test needed */</div><div class='ctx'> </div><div class='hunk'>@@ -404,6 +417,15 @@ void crypto_remove_final(struct list_head *list)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_remove_final);</div><div class='ctx'> </div><div class='add'>+static void crypto_free_alg(struct crypto_alg *alg)</div><div class='add'>+{</div><div class='add'>+	unsigned int algsize = alg-&gt;cra_type-&gt;algsize;</div><div class='add'>+	u8 *p = (u8 *)alg - algsize;</div><div class='add'>+</div><div class='add'>+	crypto_destroy_alg(alg);</div><div class='add'>+	kfree(p);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int crypto_register_alg(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_larval *larval;</div><div class='hunk'>@@ -416,6 +438,19 @@ int crypto_register_alg(struct crypto_alg *alg)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	if (alg-&gt;cra_flags &amp; CRYPTO_ALG_DUP_FIRST &amp;&amp;</div><div class='add'>+	    !WARN_ON_ONCE(alg-&gt;cra_destroy)) {</div><div class='add'>+		unsigned int algsize = alg-&gt;cra_type-&gt;algsize;</div><div class='add'>+		u8 *p = (u8 *)alg - algsize;</div><div class='add'>+</div><div class='add'>+		p = kmemdup(p, algsize + sizeof(*alg), GFP_KERNEL);</div><div class='add'>+		if (!p)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		alg = (void *)(p + algsize);</div><div class='add'>+		alg-&gt;cra_destroy = crypto_free_alg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	down_write(&amp;crypto_alg_sem);</div><div class='ctx'> 	larval = __crypto_register_alg(alg, &amp;algs_to_put);</div><div class='ctx'> 	if (!IS_ERR_OR_NULL(larval)) {</div><div class='hunk'>@@ -424,8 +459,10 @@ int crypto_register_alg(struct crypto_alg *alg)</div><div class='ctx'> 	}</div><div class='ctx'> 	up_write(&amp;crypto_alg_sem);</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(larval))</div><div class='add'>+	if (IS_ERR(larval)) {</div><div class='add'>+		crypto_alg_put(alg);</div><div class='ctx'> 		return PTR_ERR(larval);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (test_started)</div><div class='ctx'> 		crypto_schedule_test(larval);</div><div class='hunk'>@@ -461,11 +498,9 @@ void crypto_unregister_alg(struct crypto_alg *alg)</div><div class='ctx'> 	if (WARN(ret, "Algorithm %s is not registered", alg-&gt;cra_driver_name))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(refcount_read(&amp;alg-&gt;cra_refcnt) != 1))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	crypto_alg_put(alg);</div><div class='add'>+	WARN_ON(!alg-&gt;cra_destroy &amp;&amp; refcount_read(&amp;alg-&gt;cra_refcnt) != 1);</div><div class='ctx'> </div><div class='add'>+	list_add(&amp;alg-&gt;cra_list, &amp;list);</div><div class='ctx'> 	crypto_remove_final(&amp;list);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_unregister_alg);</div><div class='hunk'>@@ -504,6 +539,8 @@ int crypto_register_template(struct crypto_template *tmpl)</div><div class='ctx'> 	struct crypto_template *q;</div><div class='ctx'> 	int err = -EEXIST;</div><div class='ctx'> </div><div class='add'>+	INIT_WORK(&amp;tmpl-&gt;free_work, crypto_destroy_instance_workfn);</div><div class='add'>+</div><div class='ctx'> 	down_write(&amp;crypto_alg_sem);</div><div class='ctx'> </div><div class='ctx'> 	crypto_check_module_sig(tmpl-&gt;module);</div><div class='hunk'>@@ -565,6 +602,8 @@ void crypto_unregister_template(struct crypto_template *tmpl)</div><div class='ctx'> 		crypto_free_instance(inst);</div><div class='ctx'> 	}</div><div class='ctx'> 	crypto_remove_final(&amp;users);</div><div class='add'>+</div><div class='add'>+	flush_work(&amp;tmpl-&gt;free_work);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_unregister_template);</div><div class='ctx'> </div><div class='hunk'>@@ -618,6 +657,7 @@ int crypto_register_instance(struct crypto_template *tmpl,</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.cra_module = tmpl-&gt;module;</div><div class='ctx'> 	inst-&gt;alg.cra_flags |= CRYPTO_ALG_INSTANCE;</div><div class='add'>+	inst-&gt;alg.cra_destroy = crypto_destroy_instance;</div><div class='ctx'> </div><div class='ctx'> 	down_write(&amp;crypto_alg_sem);</div><div class='ctx'> </div><div class='hunk'>@@ -883,20 +923,20 @@ const char *crypto_attr_alg_name(struct rtattr *rta)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_attr_alg_name);</div><div class='ctx'> </div><div class='del'>-int crypto_inst_setname(struct crypto_instance *inst, const char *name,</div><div class='del'>-			struct crypto_alg *alg)</div><div class='add'>+int __crypto_inst_setname(struct crypto_instance *inst, const char *name,</div><div class='add'>+			  const char *driver, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (snprintf(inst-&gt;alg.cra_name, CRYPTO_MAX_ALG_NAME, "%s(%s)", name,</div><div class='ctx'> 		     alg-&gt;cra_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='ctx'> 		return -ENAMETOOLONG;</div><div class='ctx'> </div><div class='ctx'> 	if (snprintf(inst-&gt;alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s(%s)",</div><div class='del'>-		     name, alg-&gt;cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		     driver, alg-&gt;cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='ctx'> 		return -ENAMETOOLONG;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_inst_setname);</div><div class='add'>+EXPORT_SYMBOL_GPL(__crypto_inst_setname);</div><div class='ctx'> </div><div class='ctx'> void crypto_init_queue(struct crypto_queue *queue, unsigned int max_qlen)</div><div class='ctx'> {</div><div class='hunk'>@@ -1018,7 +1058,7 @@ static void __init crypto_start_tests(void)</div><div class='ctx'> 	if (!IS_BUILTIN(CONFIG_CRYPTO_ALGAPI))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CRYPTO_SELFTESTS))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	set_crypto_boot_test_finished();</div><div class='head'>diff --git a/crypto/algboss.c b/crypto/algboss.c<br/>index a20926bfd34e..846f586889ee 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/algboss.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algboss.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/algboss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/algboss.c</a></div><div class='hunk'>@@ -189,7 +189,7 @@ static int cryptomgr_schedule_test(struct crypto_alg *alg)</div><div class='ctx'> 	struct task_struct *thread;</div><div class='ctx'> 	struct crypto_test_param *param;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CRYPTO_SELFTESTS))</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> </div><div class='ctx'> 	if (!try_module_get(THIS_MODULE))</div><div class='hunk'>@@ -247,13 +247,7 @@ static void __exit cryptomgr_exit(void)</div><div class='ctx'> 	BUG_ON(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This is arch_initcall() so that the crypto self-tests are run on algorithms</div><div class='del'>- * registered early by subsys_initcall().  subsys_initcall() is needed for</div><div class='del'>- * generic implementations so that they're available for comparison tests when</div><div class='del'>- * other implementations are registered later by module_init().</div><div class='del'>- */</div><div class='del'>-arch_initcall(cryptomgr_init);</div><div class='add'>+module_init(cryptomgr_init);</div><div class='ctx'> module_exit(cryptomgr_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/algif_aead.c b/crypto/algif_aead.c<br/>index 7d58cbbce4af..79b016a899a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/algif_aead.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algif_aead.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/algif_aead.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/algif_aead.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/if_alg.h&gt;</div><div class='ctx'> #include &lt;crypto/skcipher.h&gt;</div><div class='del'>-#include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -36,19 +35,13 @@</div><div class='ctx'> #include &lt;linux/net.h&gt;</div><div class='ctx'> #include &lt;net/sock.h&gt;</div><div class='ctx'> </div><div class='del'>-struct aead_tfm {</div><div class='del'>-	struct crypto_aead *aead;</div><div class='del'>-	struct crypto_sync_skcipher *null_tfm;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static inline bool aead_sufficient_data(struct sock *sk)</div><div class='ctx'> {</div><div class='ctx'> 	struct alg_sock *ask = alg_sk(sk);</div><div class='ctx'> 	struct sock *psk = ask-&gt;parent;</div><div class='ctx'> 	struct alg_sock *pask = alg_sk(psk);</div><div class='ctx'> 	struct af_alg_ctx *ctx = ask-&gt;private;</div><div class='del'>-	struct aead_tfm *aeadc = pask-&gt;private;</div><div class='del'>-	struct crypto_aead *tfm = aeadc-&gt;aead;</div><div class='add'>+	struct crypto_aead *tfm = pask-&gt;private;</div><div class='ctx'> 	unsigned int as = crypto_aead_authsize(tfm);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -64,27 +57,12 @@ static int aead_sendmsg(struct socket *sock, struct msghdr *msg, size_t size)</div><div class='ctx'> 	struct alg_sock *ask = alg_sk(sk);</div><div class='ctx'> 	struct sock *psk = ask-&gt;parent;</div><div class='ctx'> 	struct alg_sock *pask = alg_sk(psk);</div><div class='del'>-	struct aead_tfm *aeadc = pask-&gt;private;</div><div class='del'>-	struct crypto_aead *tfm = aeadc-&gt;aead;</div><div class='add'>+	struct crypto_aead *tfm = pask-&gt;private;</div><div class='ctx'> 	unsigned int ivsize = crypto_aead_ivsize(tfm);</div><div class='ctx'> </div><div class='ctx'> 	return af_alg_sendmsg(sock, msg, size, ivsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_aead_copy_sgl(struct crypto_sync_skcipher *null_tfm,</div><div class='del'>-				struct scatterlist *src,</div><div class='del'>-				struct scatterlist *dst, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	SYNC_SKCIPHER_REQUEST_ON_STACK(skreq, null_tfm);</div><div class='del'>-</div><div class='del'>-	skcipher_request_set_sync_tfm(skreq, null_tfm);</div><div class='del'>-	skcipher_request_set_callback(skreq, CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='del'>-				      NULL, NULL);</div><div class='del'>-	skcipher_request_set_crypt(skreq, src, dst, len, NULL);</div><div class='del'>-</div><div class='del'>-	return crypto_skcipher_encrypt(skreq);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int _aead_recvmsg(struct socket *sock, struct msghdr *msg,</div><div class='ctx'> 			 size_t ignored, int flags)</div><div class='ctx'> {</div><div class='hunk'>@@ -93,9 +71,7 @@ static int _aead_recvmsg(struct socket *sock, struct msghdr *msg,</div><div class='ctx'> 	struct sock *psk = ask-&gt;parent;</div><div class='ctx'> 	struct alg_sock *pask = alg_sk(psk);</div><div class='ctx'> 	struct af_alg_ctx *ctx = ask-&gt;private;</div><div class='del'>-	struct aead_tfm *aeadc = pask-&gt;private;</div><div class='del'>-	struct crypto_aead *tfm = aeadc-&gt;aead;</div><div class='del'>-	struct crypto_sync_skcipher *null_tfm = aeadc-&gt;null_tfm;</div><div class='add'>+	struct crypto_aead *tfm = pask-&gt;private;</div><div class='ctx'> 	unsigned int i, as = crypto_aead_authsize(tfm);</div><div class='ctx'> 	struct af_alg_async_req *areq;</div><div class='ctx'> 	struct af_alg_tsgl *tsgl, *tmp;</div><div class='hunk'>@@ -223,11 +199,8 @@ static int _aead_recvmsg(struct socket *sock, struct msghdr *msg,</div><div class='ctx'> 		 *	    v	   v</div><div class='ctx'> 		 * RX SGL: AAD || PT || Tag</div><div class='ctx'> 		 */</div><div class='del'>-		err = crypto_aead_copy_sgl(null_tfm, tsgl_src,</div><div class='del'>-					   areq-&gt;first_rsgl.sgl.sgt.sgl,</div><div class='del'>-					   processed);</div><div class='del'>-		if (err)</div><div class='del'>-			goto free;</div><div class='add'>+		memcpy_sglist(areq-&gt;first_rsgl.sgl.sgt.sgl, tsgl_src,</div><div class='add'>+			      processed);</div><div class='ctx'> 		af_alg_pull_tsgl(sk, processed, NULL, 0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -241,12 +214,8 @@ static int _aead_recvmsg(struct socket *sock, struct msghdr *msg,</div><div class='ctx'> 		 * RX SGL: AAD || CT ----+</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='del'>-		 /* Copy AAD || CT to RX SGL buffer for in-place operation. */</div><div class='del'>-		err = crypto_aead_copy_sgl(null_tfm, tsgl_src,</div><div class='del'>-					   areq-&gt;first_rsgl.sgl.sgt.sgl,</div><div class='del'>-					   outlen);</div><div class='del'>-		if (err)</div><div class='del'>-			goto free;</div><div class='add'>+		/* Copy AAD || CT to RX SGL buffer for in-place operation. */</div><div class='add'>+		memcpy_sglist(areq-&gt;first_rsgl.sgl.sgt.sgl, tsgl_src, outlen);</div><div class='ctx'> </div><div class='ctx'> 		/* Create TX SGL for tag and chain it to RX SGL. */</div><div class='ctx'> 		areq-&gt;tsgl_entries = af_alg_count_tsgl(sk, processed,</div><div class='hunk'>@@ -379,7 +348,7 @@ static int aead_check_key(struct socket *sock)</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	struct sock *psk;</div><div class='ctx'> 	struct alg_sock *pask;</div><div class='del'>-	struct aead_tfm *tfm;</div><div class='add'>+	struct crypto_aead *tfm;</div><div class='ctx'> 	struct sock *sk = sock-&gt;sk;</div><div class='ctx'> 	struct alg_sock *ask = alg_sk(sk);</div><div class='ctx'> </div><div class='hunk'>@@ -393,7 +362,7 @@ static int aead_check_key(struct socket *sock)</div><div class='ctx'> </div><div class='ctx'> 	err = -ENOKEY;</div><div class='ctx'> 	lock_sock_nested(psk, SINGLE_DEPTH_NESTING);</div><div class='del'>-	if (crypto_aead_get_flags(tfm-&gt;aead) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='add'>+	if (crypto_aead_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='ctx'> 	atomic_dec(&amp;pask-&gt;nokey_refcnt);</div><div class='hunk'>@@ -454,54 +423,22 @@ static struct proto_ops algif_aead_ops_nokey = {</div><div class='ctx'> </div><div class='ctx'> static void *aead_bind(const char *name, u32 type, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	struct aead_tfm *tfm;</div><div class='del'>-	struct crypto_aead *aead;</div><div class='del'>-	struct crypto_sync_skcipher *null_tfm;</div><div class='del'>-</div><div class='del'>-	tfm = kzalloc(sizeof(*tfm), GFP_KERNEL);</div><div class='del'>-	if (!tfm)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	aead = crypto_alloc_aead(name, type, mask);</div><div class='del'>-	if (IS_ERR(aead)) {</div><div class='del'>-		kfree(tfm);</div><div class='del'>-		return ERR_CAST(aead);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	null_tfm = crypto_get_default_null_skcipher();</div><div class='del'>-	if (IS_ERR(null_tfm)) {</div><div class='del'>-		crypto_free_aead(aead);</div><div class='del'>-		kfree(tfm);</div><div class='del'>-		return ERR_CAST(null_tfm);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tfm-&gt;aead = aead;</div><div class='del'>-	tfm-&gt;null_tfm = null_tfm;</div><div class='del'>-</div><div class='del'>-	return tfm;</div><div class='add'>+	return crypto_alloc_aead(name, type, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void aead_release(void *private)</div><div class='ctx'> {</div><div class='del'>-	struct aead_tfm *tfm = private;</div><div class='del'>-</div><div class='del'>-	crypto_free_aead(tfm-&gt;aead);</div><div class='del'>-	crypto_put_default_null_skcipher();</div><div class='del'>-	kfree(tfm);</div><div class='add'>+	crypto_free_aead(private);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aead_setauthsize(void *private, unsigned int authsize)</div><div class='ctx'> {</div><div class='del'>-	struct aead_tfm *tfm = private;</div><div class='del'>-</div><div class='del'>-	return crypto_aead_setauthsize(tfm-&gt;aead, authsize);</div><div class='add'>+	return crypto_aead_setauthsize(private, authsize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aead_setkey(void *private, const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='del'>-	struct aead_tfm *tfm = private;</div><div class='del'>-</div><div class='del'>-	return crypto_aead_setkey(tfm-&gt;aead, key, keylen);</div><div class='add'>+	return crypto_aead_setkey(private, key, keylen);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void aead_sock_destruct(struct sock *sk)</div><div class='hunk'>@@ -510,8 +447,7 @@ static void aead_sock_destruct(struct sock *sk)</div><div class='ctx'> 	struct af_alg_ctx *ctx = ask-&gt;private;</div><div class='ctx'> 	struct sock *psk = ask-&gt;parent;</div><div class='ctx'> 	struct alg_sock *pask = alg_sk(psk);</div><div class='del'>-	struct aead_tfm *aeadc = pask-&gt;private;</div><div class='del'>-	struct crypto_aead *tfm = aeadc-&gt;aead;</div><div class='add'>+	struct crypto_aead *tfm = pask-&gt;private;</div><div class='ctx'> 	unsigned int ivlen = crypto_aead_ivsize(tfm);</div><div class='ctx'> </div><div class='ctx'> 	af_alg_pull_tsgl(sk, ctx-&gt;used, NULL, 0);</div><div class='hunk'>@@ -524,10 +460,9 @@ static int aead_accept_parent_nokey(void *private, struct sock *sk)</div><div class='ctx'> {</div><div class='ctx'> 	struct af_alg_ctx *ctx;</div><div class='ctx'> 	struct alg_sock *ask = alg_sk(sk);</div><div class='del'>-	struct aead_tfm *tfm = private;</div><div class='del'>-	struct crypto_aead *aead = tfm-&gt;aead;</div><div class='add'>+	struct crypto_aead *tfm = private;</div><div class='ctx'> 	unsigned int len = sizeof(*ctx);</div><div class='del'>-	unsigned int ivlen = crypto_aead_ivsize(aead);</div><div class='add'>+	unsigned int ivlen = crypto_aead_ivsize(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ctx = sock_kmalloc(sk, len, GFP_KERNEL);</div><div class='ctx'> 	if (!ctx)</div><div class='hunk'>@@ -554,9 +489,9 @@ static int aead_accept_parent_nokey(void *private, struct sock *sk)</div><div class='ctx'> </div><div class='ctx'> static int aead_accept_parent(void *private, struct sock *sk)</div><div class='ctx'> {</div><div class='del'>-	struct aead_tfm *tfm = private;</div><div class='add'>+	struct crypto_aead *tfm = private;</div><div class='ctx'> </div><div class='del'>-	if (crypto_aead_get_flags(tfm-&gt;aead) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='add'>+	if (crypto_aead_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='ctx'> 		return -ENOKEY;</div><div class='ctx'> </div><div class='ctx'> 	return aead_accept_parent_nokey(private, sk);</div><div class='head'>diff --git a/crypto/algif_hash.c b/crypto/algif_hash.c<br/>index 5498a87249d3..e3f1a4852737 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/algif_hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/algif_hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/algif_hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/algif_hash.c</a></div><div class='hunk'>@@ -265,10 +265,6 @@ static int hash_accept(struct socket *sock, struct socket *newsock,</div><div class='ctx'> 		goto out_free_state;</div><div class='ctx'> </div><div class='ctx'> 	err = crypto_ahash_import(&amp;ctx2-&gt;req, state);</div><div class='del'>-	if (err) {</div><div class='del'>-		sock_orphan(sk2);</div><div class='del'>-		sock_put(sk2);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> out_free_state:</div><div class='ctx'> 	kfree_sensitive(state);</div><div class='head'>diff --git a/crypto/ansi_cprng.c b/crypto/ansi_cprng.c<br/>index 64f57c4c4b06..153523ce6076 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ansi_cprng.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ansi_cprng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ansi_cprng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ansi_cprng.c</a></div><div class='hunk'>@@ -467,7 +467,7 @@ MODULE_DESCRIPTION("Software Pseudo Random Number Generator");</div><div class='ctx'> MODULE_AUTHOR("Neil Horman &lt;nhorman@tuxdriver.com&gt;");</div><div class='ctx'> module_param(dbg, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(dbg, "Boolean to enable debugging (0/1 == off/on)");</div><div class='del'>-subsys_initcall(prng_mod_init);</div><div class='add'>+module_init(prng_mod_init);</div><div class='ctx'> module_exit(prng_mod_fini);</div><div class='ctx'> MODULE_ALIAS_CRYPTO("stdrng");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("ansi_cprng");</div><div class='head'>diff --git a/crypto/anubis.c b/crypto/anubis.c<br/>index 886e7c913688..4268c3833baa 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/anubis.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/anubis.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/anubis.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/anubis.c</a></div><div class='hunk'>@@ -694,7 +694,7 @@ static void __exit anubis_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;anubis_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(anubis_mod_init);</div><div class='add'>+module_init(anubis_mod_init);</div><div class='ctx'> module_exit(anubis_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/api.c b/crypto/api.c<br/>index 3416e98128a0..5724d62e9d07 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/api.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/api.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/api.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/api.c</a></div><div class='hunk'>@@ -31,8 +31,7 @@ EXPORT_SYMBOL_GPL(crypto_alg_sem);</div><div class='ctx'> BLOCKING_NOTIFIER_HEAD(crypto_chain);</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_chain);</div><div class='ctx'> </div><div class='del'>-#if IS_BUILTIN(CONFIG_CRYPTO_ALGAPI) &amp;&amp; \</div><div class='del'>-    !IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS)</div><div class='add'>+#if IS_BUILTIN(CONFIG_CRYPTO_ALGAPI) &amp;&amp; IS_ENABLED(CONFIG_CRYPTO_SELFTESTS)</div><div class='ctx'> DEFINE_STATIC_KEY_FALSE(__crypto_boot_test_finished);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -220,10 +219,19 @@ again:</div><div class='ctx'> 		if (crypto_is_test_larval(larval))</div><div class='ctx'> 			crypto_larval_kill(larval);</div><div class='ctx'> 		alg = ERR_PTR(-ETIMEDOUT);</div><div class='del'>-	} else if (!alg) {</div><div class='add'>+	} else if (!alg || PTR_ERR(alg) == -EEXIST) {</div><div class='add'>+		int err = alg ? -EEXIST : -EAGAIN;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * EEXIST is expected because two probes can be scheduled</div><div class='add'>+		 * at the same time with one using alg_name and the other</div><div class='add'>+		 * using driver_name.  Do a re-lookup but do not retry in</div><div class='add'>+		 * case we hit a quirk like gcm_base(ctr(aes),...) which</div><div class='add'>+		 * will never match.</div><div class='add'>+		 */</div><div class='ctx'> 		alg = &amp;larval-&gt;alg;</div><div class='ctx'> 		alg = crypto_alg_lookup(alg-&gt;cra_name, type, mask) ?:</div><div class='del'>-		      ERR_PTR(-EAGAIN);</div><div class='add'>+		      ERR_PTR(err);</div><div class='ctx'> 	} else if (IS_ERR(alg))</div><div class='ctx'> 		;</div><div class='ctx'> 	else if (crypto_is_test_larval(larval) &amp;&amp;</div><div class='hunk'>@@ -528,6 +536,7 @@ void *crypto_create_tfm_node(struct crypto_alg *alg,</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	tfm = (struct crypto_tfm *)(mem + frontend-&gt;tfmsize);</div><div class='add'>+	tfm-&gt;fb = tfm;</div><div class='ctx'> </div><div class='ctx'> 	err = frontend-&gt;init_tfm(tfm);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -569,7 +578,7 @@ void *crypto_clone_tfm(const struct crypto_type *frontend,</div><div class='ctx'> </div><div class='ctx'> 	tfm = (struct crypto_tfm *)(mem + frontend-&gt;tfmsize);</div><div class='ctx'> 	tfm-&gt;crt_flags = otfm-&gt;crt_flags;</div><div class='del'>-	tfm-&gt;exit = otfm-&gt;exit;</div><div class='add'>+	tfm-&gt;fb = tfm;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return mem;</div><div class='hunk'>@@ -707,11 +716,27 @@ void crypto_destroy_alg(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (alg-&gt;cra_type &amp;&amp; alg-&gt;cra_type-&gt;destroy)</div><div class='ctx'> 		alg-&gt;cra_type-&gt;destroy(alg);</div><div class='del'>-</div><div class='ctx'> 	if (alg-&gt;cra_destroy)</div><div class='ctx'> 		alg-&gt;cra_destroy(alg);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_destroy_alg);</div><div class='ctx'> </div><div class='add'>+struct crypto_async_request *crypto_request_clone(</div><div class='add'>+	struct crypto_async_request *req, size_t total, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct crypto_tfm *tfm = req-&gt;tfm;</div><div class='add'>+	struct crypto_async_request *nreq;</div><div class='add'>+</div><div class='add'>+	nreq = kmemdup(req, total, gfp);</div><div class='add'>+	if (!nreq) {</div><div class='add'>+		req-&gt;tfm = tfm-&gt;fb;</div><div class='add'>+		return req;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nreq-&gt;flags &amp;= ~CRYPTO_TFM_REQ_ON_STACK;</div><div class='add'>+	return nreq;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_request_clone);</div><div class='add'>+</div><div class='ctx'> MODULE_DESCRIPTION("Cryptographic core API");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/arc4.c b/crypto/arc4.c<br/>index 1a4825c97c5a..1608018111d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/arc4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/arc4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/arc4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/arc4.c</a></div><div class='hunk'>@@ -73,7 +73,7 @@ static void __exit arc4_exit(void)</div><div class='ctx'> 	crypto_unregister_lskcipher(&amp;arc4_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(arc4_init);</div><div class='add'>+module_init(arc4_init);</div><div class='ctx'> module_exit(arc4_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/aria_generic.c b/crypto/aria_generic.c<br/>index bd359d3313c2..faa7900383f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/aria_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/aria_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/aria_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/aria_generic.c</a></div><div class='hunk'>@@ -304,7 +304,7 @@ static void __exit aria_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;aria_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(aria_init);</div><div class='add'>+module_init(aria_init);</div><div class='ctx'> module_exit(aria_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("ARIA Cipher Algorithm");</div><div class='head'>diff --git a/crypto/asymmetric_keys/public_key.c b/crypto/asymmetric_keys/public_key.c<br/>index bf165d321440..e5b177c8e842 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/public_key.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/asymmetric_keys/public_key.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/public_key.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/asymmetric_keys/public_key.c</a></div><div class='hunk'>@@ -163,10 +163,8 @@ static u8 *pkey_pack_u32(u8 *dst, u32 val)</div><div class='ctx'> static int software_key_query(const struct kernel_pkey_params *params,</div><div class='ctx'> 			      struct kernel_pkey_query *info)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_akcipher *tfm;</div><div class='ctx'> 	struct public_key *pkey = params-&gt;key-&gt;payload.data[asym_crypto];</div><div class='ctx'> 	char alg_name[CRYPTO_MAX_ALG_NAME];</div><div class='del'>-	struct crypto_sig *sig;</div><div class='ctx'> 	u8 *key, *ptr;</div><div class='ctx'> 	int ret, len;</div><div class='ctx'> 	bool issig;</div><div class='hunk'>@@ -188,7 +186,11 @@ static int software_key_query(const struct kernel_pkey_params *params,</div><div class='ctx'> 	ptr = pkey_pack_u32(ptr, pkey-&gt;paramlen);</div><div class='ctx'> 	memcpy(ptr, pkey-&gt;params, pkey-&gt;paramlen);</div><div class='ctx'> </div><div class='add'>+	memset(info, 0, sizeof(*info));</div><div class='add'>+</div><div class='ctx'> 	if (issig) {</div><div class='add'>+		struct crypto_sig *sig;</div><div class='add'>+</div><div class='ctx'> 		sig = crypto_alloc_sig(alg_name, 0, 0);</div><div class='ctx'> 		if (IS_ERR(sig)) {</div><div class='ctx'> 			ret = PTR_ERR(sig);</div><div class='hunk'>@@ -200,9 +202,10 @@ static int software_key_query(const struct kernel_pkey_params *params,</div><div class='ctx'> 		else</div><div class='ctx'> 			ret = crypto_sig_set_pubkey(sig, key, pkey-&gt;keylen);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto error_free_tfm;</div><div class='add'>+			goto error_free_sig;</div><div class='ctx'> </div><div class='ctx'> 		len = crypto_sig_keysize(sig);</div><div class='add'>+		info-&gt;key_size = len;</div><div class='ctx'> 		info-&gt;max_sig_size = crypto_sig_maxsize(sig);</div><div class='ctx'> 		info-&gt;max_data_size = crypto_sig_digestsize(sig);</div><div class='ctx'> </div><div class='hunk'>@@ -211,11 +214,19 @@ static int software_key_query(const struct kernel_pkey_params *params,</div><div class='ctx'> 			info-&gt;supported_ops |= KEYCTL_SUPPORTS_SIGN;</div><div class='ctx'> </div><div class='ctx'> 		if (strcmp(params-&gt;encoding, "pkcs1") == 0) {</div><div class='add'>+			info-&gt;max_enc_size = len / BITS_PER_BYTE;</div><div class='add'>+			info-&gt;max_dec_size = len / BITS_PER_BYTE;</div><div class='add'>+</div><div class='ctx'> 			info-&gt;supported_ops |= KEYCTL_SUPPORTS_ENCRYPT;</div><div class='ctx'> 			if (pkey-&gt;key_is_private)</div><div class='ctx'> 				info-&gt;supported_ops |= KEYCTL_SUPPORTS_DECRYPT;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+error_free_sig:</div><div class='add'>+		crypto_free_sig(sig);</div><div class='ctx'> 	} else {</div><div class='add'>+		struct crypto_akcipher *tfm;</div><div class='add'>+</div><div class='ctx'> 		tfm = crypto_alloc_akcipher(alg_name, 0, 0);</div><div class='ctx'> 		if (IS_ERR(tfm)) {</div><div class='ctx'> 			ret = PTR_ERR(tfm);</div><div class='hunk'>@@ -227,28 +238,23 @@ static int software_key_query(const struct kernel_pkey_params *params,</div><div class='ctx'> 		else</div><div class='ctx'> 			ret = crypto_akcipher_set_pub_key(tfm, key, pkey-&gt;keylen);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto error_free_tfm;</div><div class='add'>+			goto error_free_akcipher;</div><div class='ctx'> </div><div class='ctx'> 		len = crypto_akcipher_maxsize(tfm);</div><div class='add'>+		info-&gt;key_size = len * BITS_PER_BYTE;</div><div class='ctx'> 		info-&gt;max_sig_size = len;</div><div class='ctx'> 		info-&gt;max_data_size = len;</div><div class='add'>+		info-&gt;max_enc_size = len;</div><div class='add'>+		info-&gt;max_dec_size = len;</div><div class='ctx'> </div><div class='ctx'> 		info-&gt;supported_ops = KEYCTL_SUPPORTS_ENCRYPT;</div><div class='ctx'> 		if (pkey-&gt;key_is_private)</div><div class='ctx'> 			info-&gt;supported_ops |= KEYCTL_SUPPORTS_DECRYPT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	info-&gt;key_size = len * 8;</div><div class='del'>-	info-&gt;max_enc_size = len;</div><div class='del'>-	info-&gt;max_dec_size = len;</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='ctx'> </div><div class='del'>-error_free_tfm:</div><div class='del'>-	if (issig)</div><div class='del'>-		crypto_free_sig(sig);</div><div class='del'>-	else</div><div class='add'>+error_free_akcipher:</div><div class='ctx'> 		crypto_free_akcipher(tfm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> error_free_key:</div><div class='ctx'> 	kfree_sensitive(key);</div><div class='ctx'> 	pr_devel("&lt;==%s() = %d\n", __func__, ret);</div><div class='head'>diff --git a/crypto/asymmetric_keys/x509_cert_parser.c b/crypto/asymmetric_keys/x509_cert_parser.c<br/>index ee2fdab42334..2ffe4ae90bea 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_cert_parser.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/asymmetric_keys/x509_cert_parser.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/asymmetric_keys/x509_cert_parser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/asymmetric_keys/x509_cert_parser.c</a></div><div class='hunk'>@@ -372,10 +372,9 @@ static int x509_fabricate_name(struct x509_parse_context *ctx, size_t hdrlen,</div><div class='ctx'> </div><div class='ctx'> 	/* Empty name string if no material */</div><div class='ctx'> 	if (!ctx-&gt;cn_size &amp;&amp; !ctx-&gt;o_size &amp;&amp; !ctx-&gt;email_size) {</div><div class='del'>-		buffer = kmalloc(1, GFP_KERNEL);</div><div class='add'>+		buffer = kzalloc(1, GFP_KERNEL);</div><div class='ctx'> 		if (!buffer)</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		buffer[0] = 0;</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/authenc.c b/crypto/authenc.c<br/>index 3aaf3ab4e360..a723769c8777 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/authenc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/authenc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/authenc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/authenc.c</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/authenc.h&gt;</div><div class='del'>-#include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -28,7 +27,6 @@ struct authenc_instance_ctx {</div><div class='ctx'> struct crypto_authenc_ctx {</div><div class='ctx'> 	struct crypto_ahash *auth;</div><div class='ctx'> 	struct crypto_skcipher *enc;</div><div class='del'>-	struct crypto_sync_skcipher *null;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct authenc_request_ctx {</div><div class='hunk'>@@ -170,21 +168,6 @@ out:</div><div class='ctx'> 	authenc_request_complete(areq, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_authenc_copy_assoc(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aead *authenc = crypto_aead_reqtfm(req);</div><div class='del'>-	struct crypto_authenc_ctx *ctx = crypto_aead_ctx(authenc);</div><div class='del'>-	SYNC_SKCIPHER_REQUEST_ON_STACK(skreq, ctx-&gt;null);</div><div class='del'>-</div><div class='del'>-	skcipher_request_set_sync_tfm(skreq, ctx-&gt;null);</div><div class='del'>-	skcipher_request_set_callback(skreq, aead_request_flags(req),</div><div class='del'>-				      NULL, NULL);</div><div class='del'>-	skcipher_request_set_crypt(skreq, req-&gt;src, req-&gt;dst, req-&gt;assoclen,</div><div class='del'>-				   NULL);</div><div class='del'>-</div><div class='del'>-	return crypto_skcipher_encrypt(skreq);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int crypto_authenc_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *authenc = crypto_aead_reqtfm(req);</div><div class='hunk'>@@ -203,10 +186,7 @@ static int crypto_authenc_encrypt(struct aead_request *req)</div><div class='ctx'> 	dst = src;</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		err = crypto_authenc_copy_assoc(req);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='add'>+		memcpy_sglist(req-&gt;dst, req-&gt;src, req-&gt;assoclen);</div><div class='ctx'> 		dst = scatterwalk_ffwd(areq_ctx-&gt;dst, req-&gt;dst, req-&gt;assoclen);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -303,7 +283,6 @@ static int crypto_authenc_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 	struct crypto_authenc_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_ahash *auth;</div><div class='ctx'> 	struct crypto_skcipher *enc;</div><div class='del'>-	struct crypto_sync_skcipher *null;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	auth = crypto_spawn_ahash(&amp;ictx-&gt;auth);</div><div class='hunk'>@@ -315,14 +294,8 @@ static int crypto_authenc_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 	if (IS_ERR(enc))</div><div class='ctx'> 		goto err_free_ahash;</div><div class='ctx'> </div><div class='del'>-	null = crypto_get_default_null_skcipher();</div><div class='del'>-	err = PTR_ERR(null);</div><div class='del'>-	if (IS_ERR(null))</div><div class='del'>-		goto err_free_skcipher;</div><div class='del'>-</div><div class='ctx'> 	ctx-&gt;auth = auth;</div><div class='ctx'> 	ctx-&gt;enc = enc;</div><div class='del'>-	ctx-&gt;null = null;</div><div class='ctx'> </div><div class='ctx'> 	crypto_aead_set_reqsize(</div><div class='ctx'> 		tfm,</div><div class='hunk'>@@ -336,8 +309,6 @@ static int crypto_authenc_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_free_skcipher:</div><div class='del'>-	crypto_free_skcipher(enc);</div><div class='ctx'> err_free_ahash:</div><div class='ctx'> 	crypto_free_ahash(auth);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -349,7 +320,6 @@ static void crypto_authenc_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_ahash(ctx-&gt;auth);</div><div class='ctx'> 	crypto_free_skcipher(ctx-&gt;enc);</div><div class='del'>-	crypto_put_default_null_skcipher();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_authenc_free(struct aead_instance *inst)</div><div class='hunk'>@@ -451,7 +421,7 @@ static void __exit crypto_authenc_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_authenc_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_authenc_module_init);</div><div class='add'>+module_init(crypto_authenc_module_init);</div><div class='ctx'> module_exit(crypto_authenc_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/authencesn.c b/crypto/authencesn.c<br/>index 2cc933e2f790..d1bf0fda3f2e 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/authencesn.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/authencesn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/authencesn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/authencesn.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/authenc.h&gt;</div><div class='del'>-#include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -31,7 +30,6 @@ struct crypto_authenc_esn_ctx {</div><div class='ctx'> 	unsigned int reqoff;</div><div class='ctx'> 	struct crypto_ahash *auth;</div><div class='ctx'> 	struct crypto_skcipher *enc;</div><div class='del'>-	struct crypto_sync_skcipher *null;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct authenc_esn_request_ctx {</div><div class='hunk'>@@ -158,20 +156,6 @@ static void crypto_authenc_esn_encrypt_done(void *data, int err)</div><div class='ctx'> 	authenc_esn_request_complete(areq, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_authenc_esn_copy(struct aead_request *req, unsigned int len)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aead *authenc_esn = crypto_aead_reqtfm(req);</div><div class='del'>-	struct crypto_authenc_esn_ctx *ctx = crypto_aead_ctx(authenc_esn);</div><div class='del'>-	SYNC_SKCIPHER_REQUEST_ON_STACK(skreq, ctx-&gt;null);</div><div class='del'>-</div><div class='del'>-	skcipher_request_set_sync_tfm(skreq, ctx-&gt;null);</div><div class='del'>-	skcipher_request_set_callback(skreq, aead_request_flags(req),</div><div class='del'>-				      NULL, NULL);</div><div class='del'>-	skcipher_request_set_crypt(skreq, req-&gt;src, req-&gt;dst, len, NULL);</div><div class='del'>-</div><div class='del'>-	return crypto_skcipher_encrypt(skreq);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int crypto_authenc_esn_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *authenc_esn = crypto_aead_reqtfm(req);</div><div class='hunk'>@@ -190,10 +174,7 @@ static int crypto_authenc_esn_encrypt(struct aead_request *req)</div><div class='ctx'> 	dst = src;</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		err = crypto_authenc_esn_copy(req, assoclen);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='add'>+		memcpy_sglist(req-&gt;dst, req-&gt;src, assoclen);</div><div class='ctx'> 		sg_init_table(areq_ctx-&gt;dst, 2);</div><div class='ctx'> 		dst = scatterwalk_ffwd(areq_ctx-&gt;dst, req-&gt;dst, assoclen);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -277,11 +258,8 @@ static int crypto_authenc_esn_decrypt(struct aead_request *req)</div><div class='ctx'> </div><div class='ctx'> 	cryptlen -= authsize;</div><div class='ctx'> </div><div class='del'>-	if (req-&gt;src != dst) {</div><div class='del'>-		err = crypto_authenc_esn_copy(req, assoclen + cryptlen);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='add'>+	if (req-&gt;src != dst)</div><div class='add'>+		memcpy_sglist(dst, req-&gt;src, assoclen + cryptlen);</div><div class='ctx'> </div><div class='ctx'> 	scatterwalk_map_and_copy(ihash, req-&gt;src, assoclen + cryptlen,</div><div class='ctx'> 				 authsize, 0);</div><div class='hunk'>@@ -317,7 +295,6 @@ static int crypto_authenc_esn_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 	struct crypto_authenc_esn_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_ahash *auth;</div><div class='ctx'> 	struct crypto_skcipher *enc;</div><div class='del'>-	struct crypto_sync_skcipher *null;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	auth = crypto_spawn_ahash(&amp;ictx-&gt;auth);</div><div class='hunk'>@@ -329,14 +306,8 @@ static int crypto_authenc_esn_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 	if (IS_ERR(enc))</div><div class='ctx'> 		goto err_free_ahash;</div><div class='ctx'> </div><div class='del'>-	null = crypto_get_default_null_skcipher();</div><div class='del'>-	err = PTR_ERR(null);</div><div class='del'>-	if (IS_ERR(null))</div><div class='del'>-		goto err_free_skcipher;</div><div class='del'>-</div><div class='ctx'> 	ctx-&gt;auth = auth;</div><div class='ctx'> 	ctx-&gt;enc = enc;</div><div class='del'>-	ctx-&gt;null = null;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;reqoff = 2 * crypto_ahash_digestsize(auth);</div><div class='ctx'> </div><div class='hunk'>@@ -352,8 +323,6 @@ static int crypto_authenc_esn_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_free_skcipher:</div><div class='del'>-	crypto_free_skcipher(enc);</div><div class='ctx'> err_free_ahash:</div><div class='ctx'> 	crypto_free_ahash(auth);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -365,7 +334,6 @@ static void crypto_authenc_esn_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_ahash(ctx-&gt;auth);</div><div class='ctx'> 	crypto_free_skcipher(ctx-&gt;enc);</div><div class='del'>-	crypto_put_default_null_skcipher();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_authenc_esn_free(struct aead_instance *inst)</div><div class='hunk'>@@ -465,7 +433,7 @@ static void __exit crypto_authenc_esn_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_authenc_esn_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_authenc_esn_module_init);</div><div class='add'>+module_init(crypto_authenc_esn_module_init);</div><div class='ctx'> module_exit(crypto_authenc_esn_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/blake2b_generic.c b/crypto/blake2b_generic.c<br/>index 04a712ddfb43..60f056217510 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/blake2b_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/blake2b_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/blake2b_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/blake2b_generic.c</a></div><div class='hunk'>@@ -15,12 +15,12 @@</div><div class='ctx'>  * More information about BLAKE2 can be found at https://blake2.net.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/blake2b.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const u8 blake2b_sigma[12][16] = {</div><div class='ctx'> 	{  0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15 },</div><div class='hunk'>@@ -111,8 +111,8 @@ static void blake2b_compress_one_generic(struct blake2b_state *S,</div><div class='ctx'> #undef G</div><div class='ctx'> #undef ROUND</div><div class='ctx'> </div><div class='del'>-void blake2b_compress_generic(struct blake2b_state *state,</div><div class='del'>-			      const u8 *block, size_t nblocks, u32 inc)</div><div class='add'>+static void blake2b_compress_generic(struct blake2b_state *state,</div><div class='add'>+				     const u8 *block, size_t nblocks, u32 inc)</div><div class='ctx'> {</div><div class='ctx'> 	do {</div><div class='ctx'> 		blake2b_increment_counter(state, inc);</div><div class='hunk'>@@ -120,17 +120,19 @@ void blake2b_compress_generic(struct blake2b_state *state,</div><div class='ctx'> 		block += BLAKE2B_BLOCK_SIZE;</div><div class='ctx'> 	} while (--nblocks);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(blake2b_compress_generic);</div><div class='ctx'> </div><div class='ctx'> static int crypto_blake2b_update_generic(struct shash_desc *desc,</div><div class='ctx'> 					 const u8 *in, unsigned int inlen)</div><div class='ctx'> {</div><div class='del'>-	return crypto_blake2b_update(desc, in, inlen, blake2b_compress_generic);</div><div class='add'>+	return crypto_blake2b_update_bo(desc, in, inlen,</div><div class='add'>+					blake2b_compress_generic);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_blake2b_final_generic(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int crypto_blake2b_finup_generic(struct shash_desc *desc, const u8 *in,</div><div class='add'>+					unsigned int inlen, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	return crypto_blake2b_final(desc, out, blake2b_compress_generic);</div><div class='add'>+	return crypto_blake2b_finup(desc, in, inlen, out,</div><div class='add'>+				    blake2b_compress_generic);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define BLAKE2B_ALG(name, driver_name, digest_size)			\</div><div class='hunk'>@@ -138,7 +140,9 @@ static int crypto_blake2b_final_generic(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 		.base.cra_name		= name,				\</div><div class='ctx'> 		.base.cra_driver_name	= driver_name,			\</div><div class='ctx'> 		.base.cra_priority	= 100,				\</div><div class='del'>-		.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY,	\</div><div class='add'>+		.base.cra_flags		= CRYPTO_ALG_OPTIONAL_KEY |	\</div><div class='add'>+					  CRYPTO_AHASH_ALG_BLOCK_ONLY |	\</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINAL_NONZERO, \</div><div class='ctx'> 		.base.cra_blocksize	= BLAKE2B_BLOCK_SIZE,		\</div><div class='ctx'> 		.base.cra_ctxsize	= sizeof(struct blake2b_tfm_ctx), \</div><div class='ctx'> 		.base.cra_module	= THIS_MODULE,			\</div><div class='hunk'>@@ -146,8 +150,9 @@ static int crypto_blake2b_final_generic(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 		.setkey			= crypto_blake2b_setkey,	\</div><div class='ctx'> 		.init			= crypto_blake2b_init,		\</div><div class='ctx'> 		.update			= crypto_blake2b_update_generic, \</div><div class='del'>-		.final			= crypto_blake2b_final_generic,	\</div><div class='del'>-		.descsize		= sizeof(struct blake2b_state),	\</div><div class='add'>+		.finup			= crypto_blake2b_finup_generic,	\</div><div class='add'>+		.descsize		= BLAKE2B_DESC_SIZE,		\</div><div class='add'>+		.statesize		= BLAKE2B_STATE_SIZE,		\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg blake2b_algs[] = {</div><div class='hunk'>@@ -171,7 +176,7 @@ static void __exit blake2b_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shashes(blake2b_algs, ARRAY_SIZE(blake2b_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(blake2b_mod_init);</div><div class='add'>+module_init(blake2b_mod_init);</div><div class='ctx'> module_exit(blake2b_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("David Sterba &lt;kdave@kernel.org&gt;");</div><div class='head'>diff --git a/crypto/blowfish_generic.c b/crypto/blowfish_generic.c<br/>index 0146bc762c09..f3c5f9b09850 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/blowfish_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/blowfish_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/blowfish_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/blowfish_generic.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ static void __exit blowfish_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(blowfish_mod_init);</div><div class='add'>+module_init(blowfish_mod_init);</div><div class='ctx'> module_exit(blowfish_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/camellia_generic.c b/crypto/camellia_generic.c<br/>index 197fcf3abc89..ee4336a04b93 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/camellia_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/camellia_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/camellia_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/camellia_generic.c</a></div><div class='hunk'>@@ -1064,7 +1064,7 @@ static void __exit camellia_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;camellia_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(camellia_init);</div><div class='add'>+module_init(camellia_init);</div><div class='ctx'> module_exit(camellia_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Camellia Cipher Algorithm");</div><div class='head'>diff --git a/crypto/cast5_generic.c b/crypto/cast5_generic.c<br/>index f3e57775fa02..f68330793e0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/cast5_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cast5_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/cast5_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/cast5_generic.c</a></div><div class='hunk'>@@ -531,7 +531,7 @@ static void __exit cast5_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(cast5_mod_init);</div><div class='add'>+module_init(cast5_mod_init);</div><div class='ctx'> module_exit(cast5_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/cast6_generic.c b/crypto/cast6_generic.c<br/>index 11b725b12f27..4c08c42646f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/cast6_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cast6_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/cast6_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/cast6_generic.c</a></div><div class='hunk'>@@ -271,7 +271,7 @@ static void __exit cast6_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(cast6_mod_init);</div><div class='add'>+module_init(cast6_mod_init);</div><div class='ctx'> module_exit(cast6_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/cbc.c b/crypto/cbc.c<br/>index e81918ca68b7..ed3df6246765 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/cbc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cbc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/cbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/cbc.c</a></div><div class='hunk'>@@ -179,7 +179,7 @@ static void __exit crypto_cbc_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_cbc_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_cbc_module_init);</div><div class='add'>+module_init(crypto_cbc_module_init);</div><div class='ctx'> module_exit(crypto_cbc_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/ccm.c b/crypto/ccm.c<br/>index 06476b53b491..2ae929ffdef8 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ccm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ccm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ccm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ccm.c</a></div><div class='hunk'>@@ -10,11 +10,12 @@</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct ccm_instance_ctx {</div><div class='ctx'> 	struct crypto_skcipher_spawn ctr;</div><div class='hunk'>@@ -54,11 +55,6 @@ struct cbcmac_tfm_ctx {</div><div class='ctx'> 	struct crypto_cipher *child;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct cbcmac_desc_ctx {</div><div class='del'>-	unsigned int len;</div><div class='del'>-	u8 dg[];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static inline struct crypto_ccm_req_priv_ctx *crypto_ccm_reqctx(</div><div class='ctx'> 	struct aead_request *req)</div><div class='ctx'> {</div><div class='hunk'>@@ -783,12 +779,10 @@ static int crypto_cbcmac_digest_setkey(struct crypto_shash *parent,</div><div class='ctx'> </div><div class='ctx'> static int crypto_cbcmac_digest_init(struct shash_desc *pdesc)</div><div class='ctx'> {</div><div class='del'>-	struct cbcmac_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	int bs = crypto_shash_digestsize(pdesc-&gt;tfm);</div><div class='add'>+	u8 *dg = shash_desc_ctx(pdesc);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;len = 0;</div><div class='del'>-	memset(ctx-&gt;dg, 0, bs);</div><div class='del'>-</div><div class='add'>+	memset(dg, 0, bs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -797,39 +791,34 @@ static int crypto_cbcmac_digest_update(struct shash_desc *pdesc, const u8 *p,</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *parent = pdesc-&gt;tfm;</div><div class='ctx'> 	struct cbcmac_tfm_ctx *tctx = crypto_shash_ctx(parent);</div><div class='del'>-	struct cbcmac_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	struct crypto_cipher *tfm = tctx-&gt;child;</div><div class='ctx'> 	int bs = crypto_shash_digestsize(parent);</div><div class='del'>-</div><div class='del'>-	while (len &gt; 0) {</div><div class='del'>-		unsigned int l = min(len, bs - ctx-&gt;len);</div><div class='del'>-</div><div class='del'>-		crypto_xor(&amp;ctx-&gt;dg[ctx-&gt;len], p, l);</div><div class='del'>-		ctx-&gt;len +=l;</div><div class='del'>-		len -= l;</div><div class='del'>-		p += l;</div><div class='del'>-</div><div class='del'>-		if (ctx-&gt;len == bs) {</div><div class='del'>-			crypto_cipher_encrypt_one(tfm, ctx-&gt;dg, ctx-&gt;dg);</div><div class='del'>-			ctx-&gt;len = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	u8 *dg = shash_desc_ctx(pdesc);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		crypto_xor(dg, p, bs);</div><div class='add'>+		crypto_cipher_encrypt_one(tfm, dg, dg);</div><div class='add'>+		p += bs;</div><div class='add'>+		len -= bs;</div><div class='add'>+	} while (len &gt;= bs);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_cbcmac_digest_final(struct shash_desc *pdesc, u8 *out)</div><div class='add'>+static int crypto_cbcmac_digest_finup(struct shash_desc *pdesc, const u8 *src,</div><div class='add'>+				      unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *parent = pdesc-&gt;tfm;</div><div class='ctx'> 	struct cbcmac_tfm_ctx *tctx = crypto_shash_ctx(parent);</div><div class='del'>-	struct cbcmac_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	struct crypto_cipher *tfm = tctx-&gt;child;</div><div class='ctx'> 	int bs = crypto_shash_digestsize(parent);</div><div class='add'>+	u8 *dg = shash_desc_ctx(pdesc);</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len)</div><div class='del'>-		crypto_cipher_encrypt_one(tfm, ctx-&gt;dg, ctx-&gt;dg);</div><div class='del'>-</div><div class='del'>-	memcpy(out, ctx-&gt;dg, bs);</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(dg, src, len);</div><div class='add'>+		crypto_cipher_encrypt_one(tfm, out, dg);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	memcpy(out, dg, bs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -883,19 +872,19 @@ static int cbcmac_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.base.cra_priority = alg-&gt;cra_priority;</div><div class='del'>-	inst-&gt;alg.base.cra_blocksize = 1;</div><div class='add'>+	inst-&gt;alg.base.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.digestsize = alg-&gt;cra_blocksize;</div><div class='del'>-	inst-&gt;alg.descsize = sizeof(struct cbcmac_desc_ctx) +</div><div class='del'>-			     alg-&gt;cra_blocksize;</div><div class='add'>+	inst-&gt;alg.descsize = alg-&gt;cra_blocksize;</div><div class='ctx'> </div><div class='add'>+	inst-&gt;alg.base.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY;</div><div class='ctx'> 	inst-&gt;alg.base.cra_ctxsize = sizeof(struct cbcmac_tfm_ctx);</div><div class='ctx'> 	inst-&gt;alg.base.cra_init = cbcmac_init_tfm;</div><div class='ctx'> 	inst-&gt;alg.base.cra_exit = cbcmac_exit_tfm;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.init = crypto_cbcmac_digest_init;</div><div class='ctx'> 	inst-&gt;alg.update = crypto_cbcmac_digest_update;</div><div class='del'>-	inst-&gt;alg.final = crypto_cbcmac_digest_final;</div><div class='add'>+	inst-&gt;alg.finup = crypto_cbcmac_digest_finup;</div><div class='ctx'> 	inst-&gt;alg.setkey = crypto_cbcmac_digest_setkey;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;free = shash_free_singlespawn_instance;</div><div class='hunk'>@@ -940,7 +929,7 @@ static void __exit crypto_ccm_module_exit(void)</div><div class='ctx'> 				    ARRAY_SIZE(crypto_ccm_tmpls));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_ccm_module_init);</div><div class='add'>+module_init(crypto_ccm_module_init);</div><div class='ctx'> module_exit(crypto_ccm_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/chacha.c b/crypto/chacha.c<br/>new file mode 100644<br/>index 000000000000..c3a11f4e2d13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/crypto/chacha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/chacha.c</a></div><div class='hunk'>@@ -0,0 +1,260 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Crypto API wrappers for the ChaCha20, XChaCha20, and XChaCha12 stream ciphers</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Martin Willi</div><div class='add'>+ * Copyright (C) 2018 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/chacha.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+struct chacha_ctx {</div><div class='add'>+	u32 key[8];</div><div class='add'>+	int nrounds;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int chacha_setkey(struct crypto_skcipher *tfm,</div><div class='add'>+			 const u8 *key, unsigned int keysize, int nrounds)</div><div class='add'>+{</div><div class='add'>+	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (keysize != CHACHA_KEY_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ctx-&gt;key); i++)</div><div class='add'>+		ctx-&gt;key[i] = get_unaligned_le32(key + i * sizeof(u32));</div><div class='add'>+</div><div class='add'>+	ctx-&gt;nrounds = nrounds;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chacha20_setkey(struct crypto_skcipher *tfm,</div><div class='add'>+			   const u8 *key, unsigned int keysize)</div><div class='add'>+{</div><div class='add'>+	return chacha_setkey(tfm, key, keysize, 20);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chacha12_setkey(struct crypto_skcipher *tfm,</div><div class='add'>+			   const u8 *key, unsigned int keysize)</div><div class='add'>+{</div><div class='add'>+	return chacha_setkey(tfm, key, keysize, 12);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int chacha_stream_xor(struct skcipher_request *req,</div><div class='add'>+			     const struct chacha_ctx *ctx,</div><div class='add'>+			     const u8 iv[CHACHA_IV_SIZE], bool arch)</div><div class='add'>+{</div><div class='add'>+	struct skcipher_walk walk;</div><div class='add'>+	struct chacha_state state;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='add'>+</div><div class='add'>+	chacha_init(&amp;state, ctx-&gt;key, iv);</div><div class='add'>+</div><div class='add'>+	while (walk.nbytes &gt; 0) {</div><div class='add'>+		unsigned int nbytes = walk.nbytes;</div><div class='add'>+</div><div class='add'>+		if (nbytes &lt; walk.total)</div><div class='add'>+			nbytes = round_down(nbytes, CHACHA_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+		if (arch)</div><div class='add'>+			chacha_crypt(&amp;state, walk.dst.virt.addr,</div><div class='add'>+				     walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='add'>+		else</div><div class='add'>+			chacha_crypt_generic(&amp;state, walk.dst.virt.addr,</div><div class='add'>+					     walk.src.virt.addr, nbytes,</div><div class='add'>+					     ctx-&gt;nrounds);</div><div class='add'>+		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_chacha_crypt_generic(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	const struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	return chacha_stream_xor(req, ctx, req-&gt;iv, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_chacha_crypt_arch(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	const struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	return chacha_stream_xor(req, ctx, req-&gt;iv, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_xchacha_crypt(struct skcipher_request *req, bool arch)</div><div class='add'>+{</div><div class='add'>+	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='add'>+	const struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='add'>+	struct chacha_ctx subctx;</div><div class='add'>+	struct chacha_state state;</div><div class='add'>+	u8 real_iv[16];</div><div class='add'>+</div><div class='add'>+	/* Compute the subkey given the original key and first 128 nonce bits */</div><div class='add'>+	chacha_init(&amp;state, ctx-&gt;key, req-&gt;iv);</div><div class='add'>+	if (arch)</div><div class='add'>+		hchacha_block(&amp;state, subctx.key, ctx-&gt;nrounds);</div><div class='add'>+	else</div><div class='add'>+		hchacha_block_generic(&amp;state, subctx.key, ctx-&gt;nrounds);</div><div class='add'>+	subctx.nrounds = ctx-&gt;nrounds;</div><div class='add'>+</div><div class='add'>+	/* Build the real IV */</div><div class='add'>+	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8); /* stream position */</div><div class='add'>+	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8); /* remaining 64 nonce bits */</div><div class='add'>+</div><div class='add'>+	/* Generate the stream and XOR it with the data */</div><div class='add'>+	return chacha_stream_xor(req, &amp;subctx, real_iv, arch);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_xchacha_crypt_generic(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	return crypto_xchacha_crypt(req, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_xchacha_crypt_arch(struct skcipher_request *req)</div><div class='add'>+{</div><div class='add'>+	return crypto_xchacha_crypt(req, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct skcipher_alg algs[] = {</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "chacha20",</div><div class='add'>+		.base.cra_driver_name	= "chacha20-generic",</div><div class='add'>+		.base.cra_priority	= 100,</div><div class='add'>+		.base.cra_blocksize	= 1,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.ivsize			= CHACHA_IV_SIZE,</div><div class='add'>+		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='add'>+		.setkey			= chacha20_setkey,</div><div class='add'>+		.encrypt		= crypto_chacha_crypt_generic,</div><div class='add'>+		.decrypt		= crypto_chacha_crypt_generic,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "xchacha20",</div><div class='add'>+		.base.cra_driver_name	= "xchacha20-generic",</div><div class='add'>+		.base.cra_priority	= 100,</div><div class='add'>+		.base.cra_blocksize	= 1,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.ivsize			= XCHACHA_IV_SIZE,</div><div class='add'>+		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='add'>+		.setkey			= chacha20_setkey,</div><div class='add'>+		.encrypt		= crypto_xchacha_crypt_generic,</div><div class='add'>+		.decrypt		= crypto_xchacha_crypt_generic,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "xchacha12",</div><div class='add'>+		.base.cra_driver_name	= "xchacha12-generic",</div><div class='add'>+		.base.cra_priority	= 100,</div><div class='add'>+		.base.cra_blocksize	= 1,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.ivsize			= XCHACHA_IV_SIZE,</div><div class='add'>+		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='add'>+		.setkey			= chacha12_setkey,</div><div class='add'>+		.encrypt		= crypto_xchacha_crypt_generic,</div><div class='add'>+		.decrypt		= crypto_xchacha_crypt_generic,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "chacha20",</div><div class='add'>+		.base.cra_driver_name	= "chacha20-" __stringify(ARCH),</div><div class='add'>+		.base.cra_priority	= 300,</div><div class='add'>+		.base.cra_blocksize	= 1,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.ivsize			= CHACHA_IV_SIZE,</div><div class='add'>+		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='add'>+		.setkey			= chacha20_setkey,</div><div class='add'>+		.encrypt		= crypto_chacha_crypt_arch,</div><div class='add'>+		.decrypt		= crypto_chacha_crypt_arch,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "xchacha20",</div><div class='add'>+		.base.cra_driver_name	= "xchacha20-" __stringify(ARCH),</div><div class='add'>+		.base.cra_priority	= 300,</div><div class='add'>+		.base.cra_blocksize	= 1,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.ivsize			= XCHACHA_IV_SIZE,</div><div class='add'>+		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='add'>+		.setkey			= chacha20_setkey,</div><div class='add'>+		.encrypt		= crypto_xchacha_crypt_arch,</div><div class='add'>+		.decrypt		= crypto_xchacha_crypt_arch,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "xchacha12",</div><div class='add'>+		.base.cra_driver_name	= "xchacha12-" __stringify(ARCH),</div><div class='add'>+		.base.cra_priority	= 300,</div><div class='add'>+		.base.cra_blocksize	= 1,</div><div class='add'>+		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+</div><div class='add'>+		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='add'>+		.ivsize			= XCHACHA_IV_SIZE,</div><div class='add'>+		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='add'>+		.setkey			= chacha12_setkey,</div><div class='add'>+		.encrypt		= crypto_xchacha_crypt_arch,</div><div class='add'>+		.decrypt		= crypto_xchacha_crypt_arch,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned int num_algs;</div><div class='add'>+</div><div class='add'>+static int __init crypto_chacha_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	/* register the arch flavours only if they differ from generic */</div><div class='add'>+	num_algs = ARRAY_SIZE(algs);</div><div class='add'>+	BUILD_BUG_ON(ARRAY_SIZE(algs) % 2 != 0);</div><div class='add'>+	if (!chacha_is_arch_optimized())</div><div class='add'>+		num_algs /= 2;</div><div class='add'>+</div><div class='add'>+	return crypto_register_skciphers(algs, num_algs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit crypto_chacha_mod_fini(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_skciphers(algs, num_algs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(crypto_chacha_mod_init);</div><div class='add'>+module_exit(crypto_chacha_mod_fini);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Crypto API wrappers for the ChaCha20, XChaCha20, and XChaCha12 stream ciphers");</div><div class='add'>+MODULE_ALIAS_CRYPTO("chacha20");</div><div class='add'>+MODULE_ALIAS_CRYPTO("chacha20-generic");</div><div class='add'>+MODULE_ALIAS_CRYPTO("chacha20-"  __stringify(ARCH));</div><div class='add'>+MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='add'>+MODULE_ALIAS_CRYPTO("xchacha20-generic");</div><div class='add'>+MODULE_ALIAS_CRYPTO("xchacha20-"  __stringify(ARCH));</div><div class='add'>+MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='add'>+MODULE_ALIAS_CRYPTO("xchacha12-generic");</div><div class='add'>+MODULE_ALIAS_CRYPTO("xchacha12-"  __stringify(ARCH));</div><div class='head'>diff --git a/crypto/chacha20poly1305.c b/crypto/chacha20poly1305.c<br/>index d740849f1c19..b4b5a7198d84 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/chacha20poly1305.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/chacha20poly1305.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/chacha20poly1305.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/chacha20poly1305.c</a></div><div class='hunk'>@@ -12,36 +12,23 @@</div><div class='ctx'> #include &lt;crypto/chacha.h&gt;</div><div class='ctx'> #include &lt;crypto/poly1305.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct chachapoly_instance_ctx {</div><div class='ctx'> 	struct crypto_skcipher_spawn chacha;</div><div class='del'>-	struct crypto_ahash_spawn poly;</div><div class='ctx'> 	unsigned int saltlen;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct chachapoly_ctx {</div><div class='ctx'> 	struct crypto_skcipher *chacha;</div><div class='del'>-	struct crypto_ahash *poly;</div><div class='ctx'> 	/* key bytes we use for the ChaCha20 IV */</div><div class='ctx'> 	unsigned int saltlen;</div><div class='ctx'> 	u8 salt[] __counted_by(saltlen);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct poly_req {</div><div class='del'>-	/* zero byte padding for AD/ciphertext, as needed */</div><div class='del'>-	u8 pad[POLY1305_BLOCK_SIZE];</div><div class='del'>-	/* tail data with AD/ciphertext lengths */</div><div class='del'>-	struct {</div><div class='del'>-		__le64 assoclen;</div><div class='del'>-		__le64 cryptlen;</div><div class='del'>-	} tail;</div><div class='del'>-	struct scatterlist src[1];</div><div class='del'>-	struct ahash_request req; /* must be last member */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct chacha_req {</div><div class='ctx'> 	u8 iv[CHACHA_IV_SIZE];</div><div class='ctx'> 	struct scatterlist src[1];</div><div class='hunk'>@@ -62,7 +49,6 @@ struct chachapoly_req_ctx {</div><div class='ctx'> 	/* request flags, with MAY_SLEEP cleared if needed */</div><div class='ctx'> 	u32 flags;</div><div class='ctx'> 	union {</div><div class='del'>-		struct poly_req poly;</div><div class='ctx'> 		struct chacha_req chacha;</div><div class='ctx'> 	} u;</div><div class='ctx'> };</div><div class='hunk'>@@ -105,16 +91,6 @@ static int poly_verify_tag(struct aead_request *req)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int poly_copy_tag(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-</div><div class='del'>-	scatterwalk_map_and_copy(rctx-&gt;tag, req-&gt;dst,</div><div class='del'>-				 req-&gt;assoclen + rctx-&gt;cryptlen,</div><div class='del'>-				 sizeof(rctx-&gt;tag), 1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void chacha_decrypt_done(void *data, int err)</div><div class='ctx'> {</div><div class='ctx'> 	async_done_continue(data, err, poly_verify_tag);</div><div class='hunk'>@@ -151,210 +127,76 @@ skip:</div><div class='ctx'> 	return poly_verify_tag(req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int poly_tail_continue(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-</div><div class='del'>-	if (rctx-&gt;cryptlen == req-&gt;cryptlen) /* encrypting */</div><div class='del'>-		return poly_copy_tag(req);</div><div class='del'>-</div><div class='del'>-	return chacha_decrypt(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly_tail_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	async_done_continue(data, err, poly_tail_continue);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int poly_tail(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aead *tfm = crypto_aead_reqtfm(req);</div><div class='del'>-	struct chachapoly_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	preq-&gt;tail.assoclen = cpu_to_le64(rctx-&gt;assoclen);</div><div class='del'>-	preq-&gt;tail.cryptlen = cpu_to_le64(rctx-&gt;cryptlen);</div><div class='del'>-	sg_init_one(preq-&gt;src, &amp;preq-&gt;tail, sizeof(preq-&gt;tail));</div><div class='del'>-</div><div class='del'>-	ahash_request_set_callback(&amp;preq-&gt;req, rctx-&gt;flags,</div><div class='del'>-				   poly_tail_done, req);</div><div class='del'>-	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='del'>-	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src,</div><div class='del'>-				rctx-&gt;tag, sizeof(preq-&gt;tail));</div><div class='del'>-</div><div class='del'>-	err = crypto_ahash_finup(&amp;preq-&gt;req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return poly_tail_continue(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly_cipherpad_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	async_done_continue(data, err, poly_tail);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int poly_cipherpad(struct aead_request *req)</div><div class='add'>+static int poly_hash(struct aead_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='ctx'> 	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='add'>+	const void *zp = page_address(ZERO_PAGE(0));</div><div class='add'>+	struct scatterlist *sg = req-&gt;src;</div><div class='add'>+	struct poly1305_desc_ctx desc;</div><div class='add'>+	struct scatter_walk walk;</div><div class='add'>+	struct {</div><div class='add'>+		union {</div><div class='add'>+			struct {</div><div class='add'>+				__le64 assoclen;</div><div class='add'>+				__le64 cryptlen;</div><div class='add'>+			};</div><div class='add'>+			u8 u8[16];</div><div class='add'>+		};</div><div class='add'>+	} tail;</div><div class='ctx'> 	unsigned int padlen;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	padlen = -rctx-&gt;cryptlen % POLY1305_BLOCK_SIZE;</div><div class='del'>-	memset(preq-&gt;pad, 0, sizeof(preq-&gt;pad));</div><div class='del'>-	sg_init_one(preq-&gt;src, preq-&gt;pad, padlen);</div><div class='del'>-</div><div class='del'>-	ahash_request_set_callback(&amp;preq-&gt;req, rctx-&gt;flags,</div><div class='del'>-				   poly_cipherpad_done, req);</div><div class='del'>-	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='del'>-	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src, NULL, padlen);</div><div class='add'>+	unsigned int total;</div><div class='ctx'> </div><div class='del'>-	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return poly_tail(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly_cipher_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	async_done_continue(data, err, poly_cipherpad);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int poly_cipher(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='del'>-	struct scatterlist *crypt = req-&gt;src;</div><div class='del'>-	int err;</div><div class='add'>+	if (sg != req-&gt;dst)</div><div class='add'>+		memcpy_sglist(req-&gt;dst, sg, req-&gt;assoclen);</div><div class='ctx'> </div><div class='ctx'> 	if (rctx-&gt;cryptlen == req-&gt;cryptlen) /* encrypting */</div><div class='del'>-		crypt = req-&gt;dst;</div><div class='del'>-</div><div class='del'>-	crypt = scatterwalk_ffwd(rctx-&gt;src, crypt, req-&gt;assoclen);</div><div class='del'>-</div><div class='del'>-	ahash_request_set_callback(&amp;preq-&gt;req, rctx-&gt;flags,</div><div class='del'>-				   poly_cipher_done, req);</div><div class='del'>-	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='del'>-	ahash_request_set_crypt(&amp;preq-&gt;req, crypt, NULL, rctx-&gt;cryptlen);</div><div class='del'>-</div><div class='del'>-	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+		sg = req-&gt;dst;</div><div class='ctx'> </div><div class='del'>-	return poly_cipherpad(req);</div><div class='del'>-}</div><div class='add'>+	poly1305_init(&amp;desc, rctx-&gt;key);</div><div class='add'>+	scatterwalk_start(&amp;walk, sg);</div><div class='ctx'> </div><div class='del'>-static void poly_adpad_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	async_done_continue(data, err, poly_cipher);</div><div class='del'>-}</div><div class='add'>+	total = rctx-&gt;assoclen;</div><div class='add'>+	while (total) {</div><div class='add'>+		unsigned int n = scatterwalk_next(&amp;walk, total);</div><div class='ctx'> </div><div class='del'>-static int poly_adpad(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='del'>-	unsigned int padlen;</div><div class='del'>-	int err;</div><div class='add'>+		poly1305_update(&amp;desc, walk.addr, n);</div><div class='add'>+		scatterwalk_done_src(&amp;walk, n);</div><div class='add'>+		total -= n;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	padlen = -rctx-&gt;assoclen % POLY1305_BLOCK_SIZE;</div><div class='del'>-	memset(preq-&gt;pad, 0, sizeof(preq-&gt;pad));</div><div class='del'>-	sg_init_one(preq-&gt;src, preq-&gt;pad, padlen);</div><div class='del'>-</div><div class='del'>-	ahash_request_set_callback(&amp;preq-&gt;req, rctx-&gt;flags,</div><div class='del'>-				   poly_adpad_done, req);</div><div class='del'>-	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='del'>-	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src, NULL, padlen);</div><div class='del'>-</div><div class='del'>-	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return poly_cipher(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly_ad_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	async_done_continue(data, err, poly_adpad);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int poly_ad(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	ahash_request_set_callback(&amp;preq-&gt;req, rctx-&gt;flags,</div><div class='del'>-				   poly_ad_done, req);</div><div class='del'>-	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='del'>-	ahash_request_set_crypt(&amp;preq-&gt;req, req-&gt;src, NULL, rctx-&gt;assoclen);</div><div class='del'>-</div><div class='del'>-	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return poly_adpad(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly_setkey_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	async_done_continue(data, err, poly_ad);</div><div class='del'>-}</div><div class='add'>+	poly1305_update(&amp;desc, zp, padlen);</div><div class='ctx'> </div><div class='del'>-static int poly_setkey(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='del'>-	int err;</div><div class='add'>+	scatterwalk_skip(&amp;walk, req-&gt;assoclen - rctx-&gt;assoclen);</div><div class='ctx'> </div><div class='del'>-	sg_init_one(preq-&gt;src, rctx-&gt;key, sizeof(rctx-&gt;key));</div><div class='add'>+	total = rctx-&gt;cryptlen;</div><div class='add'>+	while (total) {</div><div class='add'>+		unsigned int n = scatterwalk_next(&amp;walk, total);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_callback(&amp;preq-&gt;req, rctx-&gt;flags,</div><div class='del'>-				   poly_setkey_done, req);</div><div class='del'>-	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='del'>-	ahash_request_set_crypt(&amp;preq-&gt;req, preq-&gt;src, NULL, sizeof(rctx-&gt;key));</div><div class='del'>-</div><div class='del'>-	err = crypto_ahash_update(&amp;preq-&gt;req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return poly_ad(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly_init_done(void *data, int err)</div><div class='del'>-{</div><div class='del'>-	async_done_continue(data, err, poly_setkey);</div><div class='del'>-}</div><div class='add'>+		poly1305_update(&amp;desc, walk.addr, n);</div><div class='add'>+		scatterwalk_done_src(&amp;walk, n);</div><div class='add'>+		total -= n;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static int poly_init(struct aead_request *req)</div><div class='del'>-{</div><div class='del'>-	struct chachapoly_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req));</div><div class='del'>-	struct chachapoly_req_ctx *rctx = aead_request_ctx(req);</div><div class='del'>-	struct poly_req *preq = &amp;rctx-&gt;u.poly;</div><div class='del'>-	int err;</div><div class='add'>+	padlen = -rctx-&gt;cryptlen % POLY1305_BLOCK_SIZE;</div><div class='add'>+	poly1305_update(&amp;desc, zp, padlen);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_callback(&amp;preq-&gt;req, rctx-&gt;flags,</div><div class='del'>-				   poly_init_done, req);</div><div class='del'>-	ahash_request_set_tfm(&amp;preq-&gt;req, ctx-&gt;poly);</div><div class='add'>+	tail.assoclen = cpu_to_le64(rctx-&gt;assoclen);</div><div class='add'>+	tail.cryptlen = cpu_to_le64(rctx-&gt;cryptlen);</div><div class='add'>+	poly1305_update(&amp;desc, tail.u8, sizeof(tail));</div><div class='add'>+	memzero_explicit(&amp;tail, sizeof(tail));</div><div class='add'>+	poly1305_final(&amp;desc, rctx-&gt;tag);</div><div class='ctx'> </div><div class='del'>-	err = crypto_ahash_init(&amp;preq-&gt;req);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	if (rctx-&gt;cryptlen != req-&gt;cryptlen)</div><div class='add'>+		return chacha_decrypt(req);</div><div class='ctx'> </div><div class='del'>-	return poly_setkey(req);</div><div class='add'>+	memcpy_to_scatterwalk(&amp;walk, rctx-&gt;tag, sizeof(rctx-&gt;tag));</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void poly_genkey_done(void *data, int err)</div><div class='ctx'> {</div><div class='del'>-	async_done_continue(data, err, poly_init);</div><div class='add'>+	async_done_continue(data, err, poly_hash);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int poly_genkey(struct aead_request *req)</div><div class='hunk'>@@ -388,7 +230,7 @@ static int poly_genkey(struct aead_request *req)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return poly_init(req);</div><div class='add'>+	return poly_hash(req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void chacha_encrypt_done(void *data, int err)</div><div class='hunk'>@@ -437,14 +279,7 @@ static int chachapoly_encrypt(struct aead_request *req)</div><div class='ctx'> 	/* encrypt call chain:</div><div class='ctx'> 	 * - chacha_encrypt/done()</div><div class='ctx'> 	 * - poly_genkey/done()</div><div class='del'>-	 * - poly_init/done()</div><div class='del'>-	 * - poly_setkey/done()</div><div class='del'>-	 * - poly_ad/done()</div><div class='del'>-	 * - poly_adpad/done()</div><div class='del'>-	 * - poly_cipher/done()</div><div class='del'>-	 * - poly_cipherpad/done()</div><div class='del'>-	 * - poly_tail/done/continue()</div><div class='del'>-	 * - poly_copy_tag()</div><div class='add'>+	 * - poly_hash()</div><div class='ctx'> 	 */</div><div class='ctx'> 	return chacha_encrypt(req);</div><div class='ctx'> }</div><div class='hunk'>@@ -458,13 +293,7 @@ static int chachapoly_decrypt(struct aead_request *req)</div><div class='ctx'> </div><div class='ctx'> 	/* decrypt call chain:</div><div class='ctx'> 	 * - poly_genkey/done()</div><div class='del'>-	 * - poly_init/done()</div><div class='del'>-	 * - poly_setkey/done()</div><div class='del'>-	 * - poly_ad/done()</div><div class='del'>-	 * - poly_adpad/done()</div><div class='del'>-	 * - poly_cipher/done()</div><div class='del'>-	 * - poly_cipherpad/done()</div><div class='del'>-	 * - poly_tail/done/continue()</div><div class='add'>+	 * - poly_hash()</div><div class='ctx'> 	 * - chacha_decrypt/done()</div><div class='ctx'> 	 * - poly_verify_tag()</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -503,21 +332,13 @@ static int chachapoly_init(struct crypto_aead *tfm)</div><div class='ctx'> 	struct chachapoly_instance_ctx *ictx = aead_instance_ctx(inst);</div><div class='ctx'> 	struct chachapoly_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_skcipher *chacha;</div><div class='del'>-	struct crypto_ahash *poly;</div><div class='ctx'> 	unsigned long align;</div><div class='ctx'> </div><div class='del'>-	poly = crypto_spawn_ahash(&amp;ictx-&gt;poly);</div><div class='del'>-	if (IS_ERR(poly))</div><div class='del'>-		return PTR_ERR(poly);</div><div class='del'>-</div><div class='ctx'> 	chacha = crypto_spawn_skcipher(&amp;ictx-&gt;chacha);</div><div class='del'>-	if (IS_ERR(chacha)) {</div><div class='del'>-		crypto_free_ahash(poly);</div><div class='add'>+	if (IS_ERR(chacha))</div><div class='ctx'> 		return PTR_ERR(chacha);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;chacha = chacha;</div><div class='del'>-	ctx-&gt;poly = poly;</div><div class='ctx'> 	ctx-&gt;saltlen = ictx-&gt;saltlen;</div><div class='ctx'> </div><div class='ctx'> 	align = crypto_aead_alignmask(tfm);</div><div class='hunk'>@@ -525,12 +346,9 @@ static int chachapoly_init(struct crypto_aead *tfm)</div><div class='ctx'> 	crypto_aead_set_reqsize(</div><div class='ctx'> 		tfm,</div><div class='ctx'> 		align + offsetof(struct chachapoly_req_ctx, u) +</div><div class='del'>-		max(offsetof(struct chacha_req, req) +</div><div class='del'>-		    sizeof(struct skcipher_request) +</div><div class='del'>-		    crypto_skcipher_reqsize(chacha),</div><div class='del'>-		    offsetof(struct poly_req, req) +</div><div class='del'>-		    sizeof(struct ahash_request) +</div><div class='del'>-		    crypto_ahash_reqsize(poly)));</div><div class='add'>+		offsetof(struct chacha_req, req) +</div><div class='add'>+		sizeof(struct skcipher_request) +</div><div class='add'>+		crypto_skcipher_reqsize(chacha));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -539,7 +357,6 @@ static void chachapoly_exit(struct crypto_aead *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct chachapoly_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	crypto_free_ahash(ctx-&gt;poly);</div><div class='ctx'> 	crypto_free_skcipher(ctx-&gt;chacha);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -548,7 +365,6 @@ static void chachapoly_free(struct aead_instance *inst)</div><div class='ctx'> 	struct chachapoly_instance_ctx *ctx = aead_instance_ctx(inst);</div><div class='ctx'> </div><div class='ctx'> 	crypto_drop_skcipher(&amp;ctx-&gt;chacha);</div><div class='del'>-	crypto_drop_ahash(&amp;ctx-&gt;poly);</div><div class='ctx'> 	kfree(inst);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -559,7 +375,6 @@ static int chachapoly_create(struct crypto_template *tmpl, struct rtattr **tb,</div><div class='ctx'> 	struct aead_instance *inst;</div><div class='ctx'> 	struct chachapoly_instance_ctx *ctx;</div><div class='ctx'> 	struct skcipher_alg_common *chacha;</div><div class='del'>-	struct hash_alg_common *poly;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (ivsize &gt; CHACHAPOLY_IV_SIZE)</div><div class='hunk'>@@ -581,14 +396,9 @@ static int chachapoly_create(struct crypto_template *tmpl, struct rtattr **tb,</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> 	chacha = crypto_spawn_skcipher_alg_common(&amp;ctx-&gt;chacha);</div><div class='ctx'> </div><div class='del'>-	err = crypto_grab_ahash(&amp;ctx-&gt;poly, aead_crypto_instance(inst),</div><div class='del'>-				crypto_attr_alg_name(tb[2]), 0, mask);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_free_inst;</div><div class='del'>-	poly = crypto_spawn_ahash_alg(&amp;ctx-&gt;poly);</div><div class='del'>-</div><div class='ctx'> 	err = -EINVAL;</div><div class='del'>-	if (poly-&gt;digestsize != POLY1305_DIGEST_SIZE)</div><div class='add'>+	if (strcmp(crypto_attr_alg_name(tb[2]), "poly1305") &amp;&amp;</div><div class='add'>+	    strcmp(crypto_attr_alg_name(tb[2]), "poly1305-generic"))</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> 	/* Need 16-byte IV size, including Initial Block Counter value */</div><div class='ctx'> 	if (chacha-&gt;ivsize != CHACHA_IV_SIZE)</div><div class='hunk'>@@ -599,16 +409,15 @@ static int chachapoly_create(struct crypto_template *tmpl, struct rtattr **tb,</div><div class='ctx'> </div><div class='ctx'> 	err = -ENAMETOOLONG;</div><div class='ctx'> 	if (snprintf(inst-&gt;alg.base.cra_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-		     "%s(%s,%s)", name, chacha-&gt;base.cra_name,</div><div class='del'>-		     poly-&gt;base.cra_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		     "%s(%s,poly1305)", name,</div><div class='add'>+		     chacha-&gt;base.cra_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> 	if (snprintf(inst-&gt;alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME,</div><div class='del'>-		     "%s(%s,%s)", name, chacha-&gt;base.cra_driver_name,</div><div class='del'>-		     poly-&gt;base.cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='add'>+		     "%s(%s,poly1305-generic)", name,</div><div class='add'>+		     chacha-&gt;base.cra_driver_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> </div><div class='del'>-	inst-&gt;alg.base.cra_priority = (chacha-&gt;base.cra_priority +</div><div class='del'>-				       poly-&gt;base.cra_priority) / 2;</div><div class='add'>+	inst-&gt;alg.base.cra_priority = chacha-&gt;base.cra_priority;</div><div class='ctx'> 	inst-&gt;alg.base.cra_blocksize = 1;</div><div class='ctx'> 	inst-&gt;alg.base.cra_alignmask = chacha-&gt;base.cra_alignmask;</div><div class='ctx'> 	inst-&gt;alg.base.cra_ctxsize = sizeof(struct chachapoly_ctx) +</div><div class='hunk'>@@ -667,7 +476,7 @@ static void __exit chacha20poly1305_module_exit(void)</div><div class='ctx'> 				    ARRAY_SIZE(rfc7539_tmpls));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(chacha20poly1305_module_init);</div><div class='add'>+module_init(chacha20poly1305_module_init);</div><div class='ctx'> module_exit(chacha20poly1305_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/chacha_generic.c b/crypto/chacha_generic.c<br/>deleted file mode 100644<br/>index 1fb9fbd302c6..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/crypto/chacha_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/chacha_generic.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,139 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * ChaCha and XChaCha stream ciphers, including ChaCha20 (RFC7539)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- * Copyright (C) 2018 Google LLC</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/chacha.h&gt;</div><div class='del'>-#include &lt;crypto/internal/skcipher.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-static int chacha_stream_xor(struct skcipher_request *req,</div><div class='del'>-			     const struct chacha_ctx *ctx, const u8 *iv)</div><div class='del'>-{</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	chacha_init(state, ctx-&gt;key, iv);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes &gt; 0) {</div><div class='del'>-		unsigned int nbytes = walk.nbytes;</div><div class='del'>-</div><div class='del'>-		if (nbytes &lt; walk.total)</div><div class='del'>-			nbytes = round_down(nbytes, CHACHA_BLOCK_SIZE);</div><div class='del'>-</div><div class='del'>-		chacha_crypt_generic(state, walk.dst.virt.addr,</div><div class='del'>-				     walk.src.virt.addr, nbytes, ctx-&gt;nrounds);</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, walk.nbytes - nbytes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_chacha_crypt(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-</div><div class='del'>-	return chacha_stream_xor(req, ctx, req-&gt;iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_xchacha_crypt(struct skcipher_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);</div><div class='del'>-	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);</div><div class='del'>-	struct chacha_ctx subctx;</div><div class='del'>-	u32 state[16];</div><div class='del'>-	u8 real_iv[16];</div><div class='del'>-</div><div class='del'>-	/* Compute the subkey given the original key and first 128 nonce bits */</div><div class='del'>-	chacha_init(state, ctx-&gt;key, req-&gt;iv);</div><div class='del'>-	hchacha_block_generic(state, subctx.key, ctx-&gt;nrounds);</div><div class='del'>-	subctx.nrounds = ctx-&gt;nrounds;</div><div class='del'>-</div><div class='del'>-	/* Build the real IV */</div><div class='del'>-	memcpy(&amp;real_iv[0], req-&gt;iv + 24, 8); /* stream position */</div><div class='del'>-	memcpy(&amp;real_iv[8], req-&gt;iv + 16, 8); /* remaining 64 nonce bits */</div><div class='del'>-</div><div class='del'>-	/* Generate the stream and XOR it with the data */</div><div class='del'>-	return chacha_stream_xor(req, &amp;subctx, real_iv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct skcipher_alg algs[] = {</div><div class='del'>-	{</div><div class='del'>-		.base.cra_name		= "chacha20",</div><div class='del'>-		.base.cra_driver_name	= "chacha20-generic",</div><div class='del'>-		.base.cra_priority	= 100,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= CHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= crypto_chacha_crypt,</div><div class='del'>-		.decrypt		= crypto_chacha_crypt,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha20",</div><div class='del'>-		.base.cra_driver_name	= "xchacha20-generic",</div><div class='del'>-		.base.cra_priority	= 100,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha20_setkey,</div><div class='del'>-		.encrypt		= crypto_xchacha_crypt,</div><div class='del'>-		.decrypt		= crypto_xchacha_crypt,</div><div class='del'>-	}, {</div><div class='del'>-		.base.cra_name		= "xchacha12",</div><div class='del'>-		.base.cra_driver_name	= "xchacha12-generic",</div><div class='del'>-		.base.cra_priority	= 100,</div><div class='del'>-		.base.cra_blocksize	= 1,</div><div class='del'>-		.base.cra_ctxsize	= sizeof(struct chacha_ctx),</div><div class='del'>-		.base.cra_module	= THIS_MODULE,</div><div class='del'>-</div><div class='del'>-		.min_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.max_keysize		= CHACHA_KEY_SIZE,</div><div class='del'>-		.ivsize			= XCHACHA_IV_SIZE,</div><div class='del'>-		.chunksize		= CHACHA_BLOCK_SIZE,</div><div class='del'>-		.setkey			= chacha12_setkey,</div><div class='del'>-		.encrypt		= crypto_xchacha_crypt,</div><div class='del'>-		.decrypt		= crypto_xchacha_crypt,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init chacha_generic_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit chacha_generic_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(chacha_generic_mod_init);</div><div class='del'>-module_exit(chacha_generic_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (generic)");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("chacha20-generic");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha20-generic");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12");</div><div class='del'>-MODULE_ALIAS_CRYPTO("xchacha12-generic");</div><div class='head'>diff --git a/crypto/cmac.c b/crypto/cmac.c<br/>index c66a0f4d8808..1b03964abe00 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/cmac.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cmac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/cmac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/cmac.c</a></div><div class='hunk'>@@ -13,9 +13,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/cipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * +------------------------</div><div class='hunk'>@@ -31,22 +34,6 @@ struct cmac_tfm_ctx {</div><div class='ctx'> 	__be64 consts[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * +------------------------</div><div class='del'>- * | &lt;shash desc&gt;</div><div class='del'>- * +------------------------</div><div class='del'>- * | cmac_desc_ctx</div><div class='del'>- * +------------------------</div><div class='del'>- * | odds (block size)</div><div class='del'>- * +------------------------</div><div class='del'>- * | prev (block size)</div><div class='del'>- * +------------------------</div><div class='del'>- */</div><div class='del'>-struct cmac_desc_ctx {</div><div class='del'>-	unsigned int len;</div><div class='del'>-	u8 odds[];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int crypto_cmac_digest_setkey(struct crypto_shash *parent,</div><div class='ctx'> 				     const u8 *inkey, unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -102,13 +89,10 @@ static int crypto_cmac_digest_setkey(struct crypto_shash *parent,</div><div class='ctx'> </div><div class='ctx'> static int crypto_cmac_digest_init(struct shash_desc *pdesc)</div><div class='ctx'> {</div><div class='del'>-	struct cmac_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	int bs = crypto_shash_blocksize(pdesc-&gt;tfm);</div><div class='del'>-	u8 *prev = &amp;ctx-&gt;odds[bs];</div><div class='add'>+	u8 *prev = shash_desc_ctx(pdesc);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;len = 0;</div><div class='ctx'> 	memset(prev, 0, bs);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -117,77 +101,36 @@ static int crypto_cmac_digest_update(struct shash_desc *pdesc, const u8 *p,</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *parent = pdesc-&gt;tfm;</div><div class='ctx'> 	struct cmac_tfm_ctx *tctx = crypto_shash_ctx(parent);</div><div class='del'>-	struct cmac_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	struct crypto_cipher *tfm = tctx-&gt;child;</div><div class='ctx'> 	int bs = crypto_shash_blocksize(parent);</div><div class='del'>-	u8 *odds = ctx-&gt;odds;</div><div class='del'>-	u8 *prev = odds + bs;</div><div class='del'>-</div><div class='del'>-	/* checking the data can fill the block */</div><div class='del'>-	if ((ctx-&gt;len + len) &lt;= bs) {</div><div class='del'>-		memcpy(odds + ctx-&gt;len, p, len);</div><div class='del'>-		ctx-&gt;len += len;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* filling odds with new data and encrypting it */</div><div class='del'>-	memcpy(odds + ctx-&gt;len, p, bs - ctx-&gt;len);</div><div class='del'>-	len -= bs - ctx-&gt;len;</div><div class='del'>-	p += bs - ctx-&gt;len;</div><div class='del'>-</div><div class='del'>-	crypto_xor(prev, odds, bs);</div><div class='del'>-	crypto_cipher_encrypt_one(tfm, prev, prev);</div><div class='add'>+	u8 *prev = shash_desc_ctx(pdesc);</div><div class='ctx'> </div><div class='del'>-	/* clearing the length */</div><div class='del'>-	ctx-&gt;len = 0;</div><div class='del'>-</div><div class='del'>-	/* encrypting the rest of data */</div><div class='del'>-	while (len &gt; bs) {</div><div class='add'>+	do {</div><div class='ctx'> 		crypto_xor(prev, p, bs);</div><div class='ctx'> 		crypto_cipher_encrypt_one(tfm, prev, prev);</div><div class='ctx'> 		p += bs;</div><div class='ctx'> 		len -= bs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* keeping the surplus of blocksize */</div><div class='del'>-	if (len) {</div><div class='del'>-		memcpy(odds, p, len);</div><div class='del'>-		ctx-&gt;len = len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	} while (len &gt;= bs);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_cmac_digest_final(struct shash_desc *pdesc, u8 *out)</div><div class='add'>+static int crypto_cmac_digest_finup(struct shash_desc *pdesc, const u8 *src,</div><div class='add'>+				    unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *parent = pdesc-&gt;tfm;</div><div class='ctx'> 	struct cmac_tfm_ctx *tctx = crypto_shash_ctx(parent);</div><div class='del'>-	struct cmac_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	struct crypto_cipher *tfm = tctx-&gt;child;</div><div class='ctx'> 	int bs = crypto_shash_blocksize(parent);</div><div class='del'>-	u8 *odds = ctx-&gt;odds;</div><div class='del'>-	u8 *prev = odds + bs;</div><div class='add'>+	u8 *prev = shash_desc_ctx(pdesc);</div><div class='ctx'> 	unsigned int offset = 0;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len != bs) {</div><div class='del'>-		unsigned int rlen;</div><div class='del'>-		u8 *p = odds + ctx-&gt;len;</div><div class='del'>-</div><div class='del'>-		*p = 0x80;</div><div class='del'>-		p++;</div><div class='del'>-</div><div class='del'>-		rlen = bs - ctx-&gt;len - 1;</div><div class='del'>-		if (rlen)</div><div class='del'>-			memset(p, 0, rlen);</div><div class='del'>-</div><div class='add'>+	crypto_xor(prev, src, len);</div><div class='add'>+	if (len != bs) {</div><div class='add'>+		prev[len] ^= 0x80;</div><div class='ctx'> 		offset += bs;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	crypto_xor(prev, odds, bs);</div><div class='ctx'> 	crypto_xor(prev, (const u8 *)tctx-&gt;consts + offset, bs);</div><div class='del'>-</div><div class='ctx'> 	crypto_cipher_encrypt_one(tfm, out, prev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -269,13 +212,14 @@ static int cmac_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> 	inst-&gt;alg.base.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='ctx'> 	inst-&gt;alg.base.cra_ctxsize = sizeof(struct cmac_tfm_ctx) +</div><div class='ctx'> 				     alg-&gt;cra_blocksize * 2;</div><div class='add'>+	inst-&gt;alg.base.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				   CRYPTO_AHASH_ALG_FINAL_NONZERO;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.digestsize = alg-&gt;cra_blocksize;</div><div class='del'>-	inst-&gt;alg.descsize = sizeof(struct cmac_desc_ctx) +</div><div class='del'>-			     alg-&gt;cra_blocksize * 2;</div><div class='add'>+	inst-&gt;alg.descsize = alg-&gt;cra_blocksize;</div><div class='ctx'> 	inst-&gt;alg.init = crypto_cmac_digest_init;</div><div class='ctx'> 	inst-&gt;alg.update = crypto_cmac_digest_update;</div><div class='del'>-	inst-&gt;alg.final = crypto_cmac_digest_final;</div><div class='add'>+	inst-&gt;alg.finup = crypto_cmac_digest_finup;</div><div class='ctx'> 	inst-&gt;alg.setkey = crypto_cmac_digest_setkey;</div><div class='ctx'> 	inst-&gt;alg.init_tfm = cmac_init_tfm;</div><div class='ctx'> 	inst-&gt;alg.clone_tfm = cmac_clone_tfm;</div><div class='hunk'>@@ -307,7 +251,7 @@ static void __exit crypto_cmac_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_cmac_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_cmac_module_init);</div><div class='add'>+module_init(crypto_cmac_module_init);</div><div class='ctx'> module_exit(crypto_cmac_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/crc32_generic.c b/crypto/crc32.c<br/>index 783a30b27398..cc371d42601f 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/crc32_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crc32_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/crc32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/crc32.c</a></div><div class='hunk'>@@ -172,7 +172,7 @@ static void __exit crc32_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shashes(algs, num_algs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crc32_mod_init);</div><div class='add'>+module_init(crc32_mod_init);</div><div class='ctx'> module_exit(crc32_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Alexander Boyko &lt;alexander_boyko@xyratex.com&gt;");</div><div class='head'>diff --git a/crypto/crc32c_generic.c b/crypto/crc32c.c<br/>index b1a36d32dc50..e5377898414a 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/crc32c_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crc32c_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/crc32c.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/crc32c.c</a></div><div class='hunk'>@@ -212,7 +212,7 @@ static void __exit crc32c_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shashes(algs, num_algs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crc32c_mod_init);</div><div class='add'>+module_init(crc32c_mod_init);</div><div class='ctx'> module_exit(crc32c_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Clay Haapala &lt;chaapala@cisco.com&gt;");</div><div class='head'>diff --git a/crypto/cryptd.c b/crypto/cryptd.c<br/>index 31d022d47f7a..5bb6f8d88cc2 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/cryptd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cryptd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/cryptd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/cryptd.c</a></div><div class='hunk'>@@ -1138,7 +1138,7 @@ static void __exit cryptd_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;cryptd_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(cryptd_init);</div><div class='add'>+module_init(cryptd_init);</div><div class='ctx'> module_exit(cryptd_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/crypto_engine.c b/crypto/crypto_engine.c<br/>index c7c16da5e649..445d3c113ee1 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/crypto_engine.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crypto_engine.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/crypto_engine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/crypto_engine.c</a></div><div class='hunk'>@@ -23,9 +23,6 @@</div><div class='ctx'> </div><div class='ctx'> #define CRYPTO_ENGINE_MAX_QLEN 10</div><div class='ctx'> </div><div class='del'>-/* Temporary algorithm flag used to indicate an updated driver. */</div><div class='del'>-#define CRYPTO_ALG_ENGINE 0x200</div><div class='del'>-</div><div class='ctx'> struct crypto_engine_alg {</div><div class='ctx'> 	struct crypto_alg base;</div><div class='ctx'> 	struct crypto_engine_op op;</div><div class='hunk'>@@ -148,16 +145,9 @@ start_request:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (async_req-&gt;tfm-&gt;__crt_alg-&gt;cra_flags &amp; CRYPTO_ALG_ENGINE) {</div><div class='del'>-		alg = container_of(async_req-&gt;tfm-&gt;__crt_alg,</div><div class='del'>-				   struct crypto_engine_alg, base);</div><div class='del'>-		op = &amp;alg-&gt;op;</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(engine-&gt;dev, "failed to do request\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto req_err_1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	alg = container_of(async_req-&gt;tfm-&gt;__crt_alg,</div><div class='add'>+			   struct crypto_engine_alg, base);</div><div class='add'>+	op = &amp;alg-&gt;op;</div><div class='ctx'> 	ret = op-&gt;do_one_request(engine, async_req);</div><div class='ctx'> </div><div class='ctx'> 	/* Request unsuccessfully executed by hardware */</div><div class='hunk'>@@ -569,9 +559,6 @@ int crypto_engine_register_aead(struct aead_engine_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (!alg-&gt;op.do_one_request)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	alg-&gt;base.base.cra_flags |= CRYPTO_ALG_ENGINE;</div><div class='del'>-</div><div class='ctx'> 	return crypto_register_aead(&amp;alg-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_engine_register_aead);</div><div class='hunk'>@@ -614,9 +601,6 @@ int crypto_engine_register_ahash(struct ahash_engine_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (!alg-&gt;op.do_one_request)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	alg-&gt;base.halg.base.cra_flags |= CRYPTO_ALG_ENGINE;</div><div class='del'>-</div><div class='ctx'> 	return crypto_register_ahash(&amp;alg-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_engine_register_ahash);</div><div class='hunk'>@@ -660,9 +644,6 @@ int crypto_engine_register_akcipher(struct akcipher_engine_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (!alg-&gt;op.do_one_request)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	alg-&gt;base.base.cra_flags |= CRYPTO_ALG_ENGINE;</div><div class='del'>-</div><div class='ctx'> 	return crypto_register_akcipher(&amp;alg-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_engine_register_akcipher);</div><div class='hunk'>@@ -677,9 +658,6 @@ int crypto_engine_register_kpp(struct kpp_engine_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (!alg-&gt;op.do_one_request)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	alg-&gt;base.base.cra_flags |= CRYPTO_ALG_ENGINE;</div><div class='del'>-</div><div class='ctx'> 	return crypto_register_kpp(&amp;alg-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_engine_register_kpp);</div><div class='hunk'>@@ -694,9 +672,6 @@ int crypto_engine_register_skcipher(struct skcipher_engine_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (!alg-&gt;op.do_one_request)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	alg-&gt;base.base.cra_flags |= CRYPTO_ALG_ENGINE;</div><div class='del'>-</div><div class='ctx'> 	return crypto_register_skcipher(&amp;alg-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_engine_register_skcipher);</div><div class='head'>diff --git a/crypto/crypto_null.c b/crypto/crypto_null.c<br/>index ced90f88ee07..34588f39fdfc 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/crypto_null.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/crypto_null.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/crypto_null.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/crypto_null.c</a></div><div class='hunk'>@@ -15,15 +15,11 @@</div><div class='ctx'> #include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='del'>-static DEFINE_SPINLOCK(crypto_default_null_skcipher_lock);</div><div class='del'>-static struct crypto_sync_skcipher *crypto_default_null_skcipher;</div><div class='del'>-static int crypto_default_null_skcipher_refcnt;</div><div class='del'>-</div><div class='ctx'> static int null_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -65,19 +61,9 @@ static void null_crypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)</div><div class='ctx'> </div><div class='ctx'> static int null_skcipher_crypt(struct skcipher_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct skcipher_walk walk;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = skcipher_walk_virt(&amp;walk, req, false);</div><div class='del'>-</div><div class='del'>-	while (walk.nbytes) {</div><div class='del'>-		if (walk.src.virt.addr != walk.dst.virt.addr)</div><div class='del'>-			memcpy(walk.dst.virt.addr, walk.src.virt.addr,</div><div class='del'>-			       walk.nbytes);</div><div class='del'>-		err = skcipher_walk_done(&amp;walk, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	if (req-&gt;src != req-&gt;dst)</div><div class='add'>+		memcpy_sglist(req-&gt;dst, req-&gt;src, req-&gt;cryptlen);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg digest_null = {</div><div class='hunk'>@@ -129,54 +115,6 @@ static struct crypto_alg cipher_null = {</div><div class='ctx'> MODULE_ALIAS_CRYPTO("digest_null");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("cipher_null");</div><div class='ctx'> </div><div class='del'>-struct crypto_sync_skcipher *crypto_get_default_null_skcipher(void)</div><div class='del'>-{</div><div class='del'>-	struct crypto_sync_skcipher *ntfm = NULL;</div><div class='del'>-	struct crypto_sync_skcipher *tfm;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;crypto_default_null_skcipher_lock);</div><div class='del'>-	tfm = crypto_default_null_skcipher;</div><div class='del'>-</div><div class='del'>-	if (!tfm) {</div><div class='del'>-		spin_unlock_bh(&amp;crypto_default_null_skcipher_lock);</div><div class='del'>-</div><div class='del'>-		ntfm = crypto_alloc_sync_skcipher("ecb(cipher_null)", 0, 0);</div><div class='del'>-		if (IS_ERR(ntfm))</div><div class='del'>-			return ntfm;</div><div class='del'>-</div><div class='del'>-		spin_lock_bh(&amp;crypto_default_null_skcipher_lock);</div><div class='del'>-		tfm = crypto_default_null_skcipher;</div><div class='del'>-		if (!tfm) {</div><div class='del'>-			tfm = ntfm;</div><div class='del'>-			ntfm = NULL;</div><div class='del'>-			crypto_default_null_skcipher = tfm;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crypto_default_null_skcipher_refcnt++;</div><div class='del'>-	spin_unlock_bh(&amp;crypto_default_null_skcipher_lock);</div><div class='del'>-</div><div class='del'>-	crypto_free_sync_skcipher(ntfm);</div><div class='del'>-</div><div class='del'>-	return tfm;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_get_default_null_skcipher);</div><div class='del'>-</div><div class='del'>-void crypto_put_default_null_skcipher(void)</div><div class='del'>-{</div><div class='del'>-	struct crypto_sync_skcipher *tfm = NULL;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;crypto_default_null_skcipher_lock);</div><div class='del'>-	if (!--crypto_default_null_skcipher_refcnt) {</div><div class='del'>-		tfm = crypto_default_null_skcipher;</div><div class='del'>-		crypto_default_null_skcipher = NULL;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_bh(&amp;crypto_default_null_skcipher_lock);</div><div class='del'>-</div><div class='del'>-	crypto_free_sync_skcipher(tfm);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_put_default_null_skcipher);</div><div class='del'>-</div><div class='ctx'> static int __init crypto_null_mod_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -210,7 +148,7 @@ static void __exit crypto_null_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_skcipher(&amp;skcipher_null);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_null_mod_init);</div><div class='add'>+module_init(crypto_null_mod_init);</div><div class='ctx'> module_exit(crypto_null_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/ctr.c b/crypto/ctr.c<br/>index 97a947b0a876..a388f0ceb3a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ctr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ctr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ctr.c</a></div><div class='hunk'>@@ -350,7 +350,7 @@ static void __exit crypto_ctr_module_exit(void)</div><div class='ctx'> 				    ARRAY_SIZE(crypto_ctr_tmpls));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_ctr_module_init);</div><div class='add'>+module_init(crypto_ctr_module_init);</div><div class='ctx'> module_exit(crypto_ctr_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/cts.c b/crypto/cts.c<br/>index f5b42156b6c7..48898d5e24ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/cts.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/cts.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/cts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/cts.c</a></div><div class='hunk'>@@ -402,7 +402,7 @@ static void __exit crypto_cts_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_cts_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_cts_module_init);</div><div class='add'>+module_init(crypto_cts_module_init);</div><div class='ctx'> module_exit(crypto_cts_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/crypto/curve25519-generic.c b/crypto/curve25519-generic.c<br/>index 68a673262e04..f3e56e73c66c 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/curve25519-generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/curve25519-generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/curve25519-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/curve25519-generic.c</a></div><div class='hunk'>@@ -82,7 +82,7 @@ static void __exit curve25519_exit(void)</div><div class='ctx'> 	crypto_unregister_kpp(&amp;curve25519_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(curve25519_init);</div><div class='add'>+module_init(curve25519_init);</div><div class='ctx'> module_exit(curve25519_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_ALIAS_CRYPTO("curve25519");</div><div class='head'>diff --git a/crypto/deflate.c b/crypto/deflate.c<br/>index 5c346c544093..fe8e4ad0fee1 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/deflate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/deflate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/deflate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/deflate.c</a></div><div class='hunk'>@@ -6,253 +6,250 @@</div><div class='ctx'>  * by IPCOMP (RFC 3173 &amp; RFC 2394).</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2003 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='del'>- *</div><div class='del'>- * FIXME: deflate transforms will require up to a total of about 436k of kernel</div><div class='del'>- * memory on i386 (390k for compression, the rest for decompression), as the</div><div class='del'>- * current zlib kernel code uses a worst case pre-allocation system by default.</div><div class='del'>- * This needs to be fixed so that the amount of memory required is properly</div><div class='del'>- * related to the  winbits and memlevel parameters.</div><div class='del'>- *</div><div class='del'>- * The default winbits of 11 should suit most packets, and it may be something</div><div class='del'>- * to configure on a per-tfm basis in the future.</div><div class='del'>- *</div><div class='del'>- * Currently, compression history is not maintained between tfm calls, as</div><div class='del'>- * it is not needed for IPCOMP and keeps the code simpler.  It can be</div><div class='del'>- * implemented if someone wants it.</div><div class='add'>+ * Copyright (c) 2023 Google, LLC. &lt;ardb@kernel.org&gt;</div><div class='add'>+ * Copyright (c) 2025 Herbert Xu &lt;herbert@gondor.apana.org.au&gt;</div><div class='ctx'>  */</div><div class='add'>+#include &lt;crypto/internal/acompress.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/percpu.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/zlib.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/net.h&gt;</div><div class='del'>-#include &lt;crypto/internal/scompress.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DEFLATE_DEF_LEVEL		Z_DEFAULT_COMPRESSION</div><div class='ctx'> #define DEFLATE_DEF_WINBITS		11</div><div class='ctx'> #define DEFLATE_DEF_MEMLEVEL		MAX_MEM_LEVEL</div><div class='ctx'> </div><div class='del'>-struct deflate_ctx {</div><div class='del'>-	struct z_stream_s comp_stream;</div><div class='del'>-	struct z_stream_s decomp_stream;</div><div class='add'>+struct deflate_stream {</div><div class='add'>+	struct z_stream_s stream;</div><div class='add'>+	u8 workspace[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int deflate_comp_init(struct deflate_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct z_stream_s *stream = &amp;ctx-&gt;comp_stream;</div><div class='del'>-</div><div class='del'>-	stream-&gt;workspace = vzalloc(zlib_deflate_workspacesize(</div><div class='del'>-				    -DEFLATE_DEF_WINBITS, MAX_MEM_LEVEL));</div><div class='del'>-	if (!stream-&gt;workspace) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	ret = zlib_deflateInit2(stream, DEFLATE_DEF_LEVEL, Z_DEFLATED,</div><div class='del'>-				-DEFLATE_DEF_WINBITS, DEFLATE_DEF_MEMLEVEL,</div><div class='del'>-				Z_DEFAULT_STRATEGY);</div><div class='del'>-	if (ret != Z_OK) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out_free;</div><div class='del'>-	}</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-out_free:</div><div class='del'>-	vfree(stream-&gt;workspace);</div><div class='del'>-	goto out;</div><div class='del'>-}</div><div class='add'>+static DEFINE_MUTEX(deflate_stream_lock);</div><div class='ctx'> </div><div class='del'>-static int deflate_decomp_init(struct deflate_ctx *ctx)</div><div class='add'>+static void *deflate_alloc_stream(void)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct z_stream_s *stream = &amp;ctx-&gt;decomp_stream;</div><div class='add'>+	size_t size = max(zlib_inflate_workspacesize(),</div><div class='add'>+			  zlib_deflate_workspacesize(-DEFLATE_DEF_WINBITS,</div><div class='add'>+						     DEFLATE_DEF_MEMLEVEL));</div><div class='add'>+	struct deflate_stream *ctx;</div><div class='ctx'> </div><div class='del'>-	stream-&gt;workspace = vzalloc(zlib_inflate_workspacesize());</div><div class='del'>-	if (!stream-&gt;workspace) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	ret = zlib_inflateInit2(stream, -DEFLATE_DEF_WINBITS);</div><div class='del'>-	if (ret != Z_OK) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out_free;</div><div class='del'>-	}</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-out_free:</div><div class='del'>-	vfree(stream-&gt;workspace);</div><div class='del'>-	goto out;</div><div class='del'>-}</div><div class='add'>+	ctx = kvmalloc(sizeof(*ctx) + size, GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-static void deflate_comp_exit(struct deflate_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	zlib_deflateEnd(&amp;ctx-&gt;comp_stream);</div><div class='del'>-	vfree(ctx-&gt;comp_stream.workspace);</div><div class='del'>-}</div><div class='add'>+	ctx-&gt;stream.workspace = ctx-&gt;workspace;</div><div class='ctx'> </div><div class='del'>-static void deflate_decomp_exit(struct deflate_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	zlib_inflateEnd(&amp;ctx-&gt;decomp_stream);</div><div class='del'>-	vfree(ctx-&gt;decomp_stream.workspace);</div><div class='add'>+	return ctx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __deflate_init(void *ctx)</div><div class='add'>+static struct crypto_acomp_streams deflate_streams = {</div><div class='add'>+	.alloc_ctx = deflate_alloc_stream,</div><div class='add'>+	.cfree_ctx = kvfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int deflate_compress_one(struct acomp_req *req,</div><div class='add'>+				struct deflate_stream *ds)</div><div class='ctx'> {</div><div class='add'>+	struct z_stream_s *stream = &amp;ds-&gt;stream;</div><div class='add'>+	struct acomp_walk walk;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = deflate_comp_init(ctx);</div><div class='add'>+	ret = acomp_walk_virt(&amp;walk, req, true);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-	ret = deflate_decomp_init(ctx);</div><div class='del'>-	if (ret)</div><div class='del'>-		deflate_comp_exit(ctx);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-static void *deflate_alloc_ctx(void)</div><div class='del'>-{</div><div class='del'>-	struct deflate_ctx *ctx;</div><div class='del'>-	int ret;</div><div class='add'>+	do {</div><div class='add'>+		unsigned int dcur;</div><div class='ctx'> </div><div class='del'>-	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='del'>-	if (!ctx)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		dcur = acomp_walk_next_dst(&amp;walk);</div><div class='add'>+		if (!dcur)</div><div class='add'>+			return -ENOSPC;</div><div class='ctx'> </div><div class='del'>-	ret = __deflate_init(ctx);</div><div class='del'>-	if (ret) {</div><div class='del'>-		kfree(ctx);</div><div class='del'>-		return ERR_PTR(ret);</div><div class='del'>-	}</div><div class='add'>+		stream-&gt;avail_out = dcur;</div><div class='add'>+		stream-&gt;next_out = walk.dst.virt.addr;</div><div class='ctx'> </div><div class='del'>-	return ctx;</div><div class='del'>-}</div><div class='add'>+		do {</div><div class='add'>+			int flush = Z_FINISH;</div><div class='add'>+			unsigned int scur;</div><div class='ctx'> </div><div class='del'>-static void __deflate_exit(void *ctx)</div><div class='del'>-{</div><div class='del'>-	deflate_comp_exit(ctx);</div><div class='del'>-	deflate_decomp_exit(ctx);</div><div class='del'>-}</div><div class='add'>+			stream-&gt;avail_in = 0;</div><div class='add'>+			stream-&gt;next_in = NULL;</div><div class='ctx'> </div><div class='del'>-static void deflate_free_ctx(void *ctx)</div><div class='del'>-{</div><div class='del'>-	__deflate_exit(ctx);</div><div class='del'>-	kfree_sensitive(ctx);</div><div class='add'>+			scur = acomp_walk_next_src(&amp;walk);</div><div class='add'>+			if (scur) {</div><div class='add'>+				if (acomp_walk_more_src(&amp;walk, scur))</div><div class='add'>+					flush = Z_NO_FLUSH;</div><div class='add'>+				stream-&gt;avail_in = scur;</div><div class='add'>+				stream-&gt;next_in = walk.src.virt.addr;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ret = zlib_deflate(stream, flush);</div><div class='add'>+</div><div class='add'>+			if (scur) {</div><div class='add'>+				scur -= stream-&gt;avail_in;</div><div class='add'>+				acomp_walk_done_src(&amp;walk, scur);</div><div class='add'>+			}</div><div class='add'>+		} while (ret == Z_OK &amp;&amp; stream-&gt;avail_out);</div><div class='add'>+</div><div class='add'>+		acomp_walk_done_dst(&amp;walk, dcur);</div><div class='add'>+	} while (ret == Z_OK);</div><div class='add'>+</div><div class='add'>+	if (ret != Z_STREAM_END)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	req-&gt;dlen = stream-&gt;total_out;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __deflate_compress(const u8 *src, unsigned int slen,</div><div class='del'>-			      u8 *dst, unsigned int *dlen, void *ctx)</div><div class='add'>+static int deflate_compress(struct acomp_req *req)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct deflate_ctx *dctx = ctx;</div><div class='del'>-	struct z_stream_s *stream = &amp;dctx-&gt;comp_stream;</div><div class='add'>+	struct crypto_acomp_stream *s;</div><div class='add'>+	struct deflate_stream *ds;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	s = crypto_acomp_lock_stream_bh(&amp;deflate_streams);</div><div class='add'>+	ds = s-&gt;ctx;</div><div class='ctx'> </div><div class='del'>-	ret = zlib_deflateReset(stream);</div><div class='del'>-	if (ret != Z_OK) {</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+	err = zlib_deflateInit2(&amp;ds-&gt;stream, DEFLATE_DEF_LEVEL, Z_DEFLATED,</div><div class='add'>+				-DEFLATE_DEF_WINBITS, DEFLATE_DEF_MEMLEVEL,</div><div class='add'>+				Z_DEFAULT_STRATEGY);</div><div class='add'>+	if (err != Z_OK) {</div><div class='add'>+		err = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stream-&gt;next_in = (u8 *)src;</div><div class='del'>-	stream-&gt;avail_in = slen;</div><div class='del'>-	stream-&gt;next_out = (u8 *)dst;</div><div class='del'>-	stream-&gt;avail_out = *dlen;</div><div class='add'>+	err = deflate_compress_one(req, ds);</div><div class='ctx'> </div><div class='del'>-	ret = zlib_deflate(stream, Z_FINISH);</div><div class='del'>-	if (ret != Z_STREAM_END) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	ret = 0;</div><div class='del'>-	*dlen = stream-&gt;total_out;</div><div class='ctx'> out:</div><div class='del'>-	return ret;</div><div class='add'>+	crypto_acomp_unlock_stream_bh(s);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int deflate_scompress(struct crypto_scomp *tfm, const u8 *src,</div><div class='del'>-			     unsigned int slen, u8 *dst, unsigned int *dlen,</div><div class='del'>-			     void *ctx)</div><div class='add'>+static int deflate_decompress_one(struct acomp_req *req,</div><div class='add'>+				  struct deflate_stream *ds)</div><div class='ctx'> {</div><div class='del'>-	return __deflate_compress(src, slen, dst, dlen, ctx);</div><div class='add'>+	struct z_stream_s *stream = &amp;ds-&gt;stream;</div><div class='add'>+	bool out_of_space = false;</div><div class='add'>+	struct acomp_walk walk;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = acomp_walk_virt(&amp;walk, req, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		unsigned int scur;</div><div class='add'>+</div><div class='add'>+		stream-&gt;avail_in = 0;</div><div class='add'>+		stream-&gt;next_in = NULL;</div><div class='add'>+</div><div class='add'>+		scur = acomp_walk_next_src(&amp;walk);</div><div class='add'>+		if (scur) {</div><div class='add'>+			stream-&gt;avail_in = scur;</div><div class='add'>+			stream-&gt;next_in = walk.src.virt.addr;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			unsigned int dcur;</div><div class='add'>+</div><div class='add'>+			dcur = acomp_walk_next_dst(&amp;walk);</div><div class='add'>+			if (!dcur) {</div><div class='add'>+				out_of_space = true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			stream-&gt;avail_out = dcur;</div><div class='add'>+			stream-&gt;next_out = walk.dst.virt.addr;</div><div class='add'>+</div><div class='add'>+			ret = zlib_inflate(stream, Z_NO_FLUSH);</div><div class='add'>+</div><div class='add'>+			dcur -= stream-&gt;avail_out;</div><div class='add'>+			acomp_walk_done_dst(&amp;walk, dcur);</div><div class='add'>+		} while (ret == Z_OK &amp;&amp; stream-&gt;avail_in);</div><div class='add'>+</div><div class='add'>+		if (scur)</div><div class='add'>+			acomp_walk_done_src(&amp;walk, scur);</div><div class='add'>+</div><div class='add'>+		if (out_of_space)</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+	} while (ret == Z_OK);</div><div class='add'>+</div><div class='add'>+	if (ret != Z_STREAM_END)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	req-&gt;dlen = stream-&gt;total_out;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __deflate_decompress(const u8 *src, unsigned int slen,</div><div class='del'>-				u8 *dst, unsigned int *dlen, void *ctx)</div><div class='add'>+static int deflate_decompress(struct acomp_req *req)</div><div class='ctx'> {</div><div class='add'>+	struct crypto_acomp_stream *s;</div><div class='add'>+	struct deflate_stream *ds;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	int ret = 0;</div><div class='del'>-	struct deflate_ctx *dctx = ctx;</div><div class='del'>-	struct z_stream_s *stream = &amp;dctx-&gt;decomp_stream;</div><div class='add'>+	s = crypto_acomp_lock_stream_bh(&amp;deflate_streams);</div><div class='add'>+	ds = s-&gt;ctx;</div><div class='ctx'> </div><div class='del'>-	ret = zlib_inflateReset(stream);</div><div class='del'>-	if (ret != Z_OK) {</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+	err = zlib_inflateInit2(&amp;ds-&gt;stream, -DEFLATE_DEF_WINBITS);</div><div class='add'>+	if (err != Z_OK) {</div><div class='add'>+		err = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stream-&gt;next_in = (u8 *)src;</div><div class='del'>-	stream-&gt;avail_in = slen;</div><div class='del'>-	stream-&gt;next_out = (u8 *)dst;</div><div class='del'>-	stream-&gt;avail_out = *dlen;</div><div class='del'>-</div><div class='del'>-	ret = zlib_inflate(stream, Z_SYNC_FLUSH);</div><div class='del'>-	/*</div><div class='del'>-	 * Work around a bug in zlib, which sometimes wants to taste an extra</div><div class='del'>-	 * byte when being used in the (undocumented) raw deflate mode.</div><div class='del'>-	 * (From USAGI).</div><div class='del'>-	 */</div><div class='del'>-	if (ret == Z_OK &amp;&amp; !stream-&gt;avail_in &amp;&amp; stream-&gt;avail_out) {</div><div class='del'>-		u8 zerostuff = 0;</div><div class='del'>-		stream-&gt;next_in = &amp;zerostuff;</div><div class='del'>-		stream-&gt;avail_in = 1;</div><div class='del'>-		ret = zlib_inflate(stream, Z_FINISH);</div><div class='del'>-	}</div><div class='del'>-	if (ret != Z_STREAM_END) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	ret = 0;</div><div class='del'>-	*dlen = stream-&gt;total_out;</div><div class='add'>+	err = deflate_decompress_one(req, ds);</div><div class='add'>+</div><div class='ctx'> out:</div><div class='del'>-	return ret;</div><div class='add'>+	crypto_acomp_unlock_stream_bh(s);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int deflate_sdecompress(struct crypto_scomp *tfm, const u8 *src,</div><div class='del'>-			       unsigned int slen, u8 *dst, unsigned int *dlen,</div><div class='del'>-			       void *ctx)</div><div class='add'>+static int deflate_init(struct crypto_acomp *tfm)</div><div class='ctx'> {</div><div class='del'>-	return __deflate_decompress(src, slen, dst, dlen, ctx);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;deflate_stream_lock);</div><div class='add'>+	ret = crypto_acomp_alloc_streams(&amp;deflate_streams);</div><div class='add'>+	mutex_unlock(&amp;deflate_stream_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct scomp_alg scomp = {</div><div class='del'>-	.alloc_ctx		= deflate_alloc_ctx,</div><div class='del'>-	.free_ctx		= deflate_free_ctx,</div><div class='del'>-	.compress		= deflate_scompress,</div><div class='del'>-	.decompress		= deflate_sdecompress,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name	= "deflate",</div><div class='del'>-		.cra_driver_name = "deflate-scomp",</div><div class='del'>-		.cra_module	 = THIS_MODULE,</div><div class='del'>-	}</div><div class='add'>+static struct acomp_alg acomp = {</div><div class='add'>+	.compress		= deflate_compress,</div><div class='add'>+	.decompress		= deflate_decompress,</div><div class='add'>+	.init			= deflate_init,</div><div class='add'>+	.base.cra_name		= "deflate",</div><div class='add'>+	.base.cra_driver_name	= "deflate-generic",</div><div class='add'>+	.base.cra_flags		= CRYPTO_ALG_REQ_VIRT,</div><div class='add'>+	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init deflate_mod_init(void)</div><div class='ctx'> {</div><div class='del'>-	return crypto_register_scomp(&amp;scomp);</div><div class='add'>+	return crypto_register_acomp(&amp;acomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit deflate_mod_fini(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_scomp(&amp;scomp);</div><div class='add'>+	crypto_unregister_acomp(&amp;acomp);</div><div class='add'>+	crypto_acomp_free_streams(&amp;deflate_streams);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(deflate_mod_init);</div><div class='add'>+module_init(deflate_mod_init);</div><div class='ctx'> module_exit(deflate_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Deflate Compression Algorithm for IPCOMP");</div><div class='ctx'> MODULE_AUTHOR("James Morris &lt;jmorris@intercode.com.au&gt;");</div><div class='add'>+MODULE_AUTHOR("Ard Biesheuvel &lt;ardb@kernel.org&gt;");</div><div class='add'>+MODULE_AUTHOR("Herbert Xu &lt;herbert@gondor.apana.org.au&gt;");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("deflate");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("deflate-generic");</div><div class='head'>diff --git a/crypto/des_generic.c b/crypto/des_generic.c<br/>index 1274e18d3eb9..fce341400914 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/des_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/des_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/des_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/des_generic.c</a></div><div class='hunk'>@@ -122,7 +122,7 @@ static void __exit des_generic_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_algs(des_algs, ARRAY_SIZE(des_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(des_generic_mod_init);</div><div class='add'>+module_init(des_generic_mod_init);</div><div class='ctx'> module_exit(des_generic_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/dh.c b/crypto/dh.c<br/>index afc0fd847761..8250eeeebd0f 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/dh.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/dh.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/dh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/dh.c</a></div><div class='hunk'>@@ -920,7 +920,7 @@ static void __exit dh_exit(void)</div><div class='ctx'> 	crypto_unregister_kpp(&amp;dh);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(dh_init);</div><div class='add'>+module_init(dh_init);</div><div class='ctx'> module_exit(dh_exit);</div><div class='ctx'> MODULE_ALIAS_CRYPTO("dh");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/drbg.c b/crypto/drbg.c<br/>index f28dfc2511a2..dbe4c8bb5ceb 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/drbg.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/drbg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/drbg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/drbg.c</a></div><div class='hunk'>@@ -2132,7 +2132,7 @@ static void __exit drbg_exit(void)</div><div class='ctx'> 	crypto_unregister_rngs(drbg_algs, (ARRAY_SIZE(drbg_cores) * 2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(drbg_init);</div><div class='add'>+module_init(drbg_init);</div><div class='ctx'> module_exit(drbg_exit);</div><div class='ctx'> #ifndef CRYPTO_DRBG_HASH_STRING</div><div class='ctx'> #define CRYPTO_DRBG_HASH_STRING ""</div><div class='head'>diff --git a/crypto/ecb.c b/crypto/ecb.c<br/>index 95d7e972865a..cd1b20456dad 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ecb.c</a></div><div class='hunk'>@@ -219,7 +219,7 @@ static void __exit crypto_ecb_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_ecb_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_ecb_module_init);</div><div class='add'>+module_init(crypto_ecb_module_init);</div><div class='ctx'> module_exit(crypto_ecb_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/ecdh.c b/crypto/ecdh.c<br/>index 72cfd1590156..9f0b93b3166d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecdh.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdh.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecdh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ecdh.c</a></div><div class='hunk'>@@ -240,7 +240,7 @@ static void __exit ecdh_exit(void)</div><div class='ctx'> 	crypto_unregister_kpp(&amp;ecdh_nist_p384);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(ecdh_init);</div><div class='add'>+module_init(ecdh_init);</div><div class='ctx'> module_exit(ecdh_exit);</div><div class='ctx'> MODULE_ALIAS_CRYPTO("ecdh");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/ecdsa-p1363.c b/crypto/ecdsa-p1363.c<br/>index 4454f1f8f33f..e0c55c64711c 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecdsa-p1363.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdsa-p1363.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecdsa-p1363.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ecdsa-p1363.c</a></div><div class='hunk'>@@ -21,7 +21,8 @@ static int ecdsa_p1363_verify(struct crypto_sig *tfm,</div><div class='ctx'> 			      const void *digest, unsigned int dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct ecdsa_p1363_ctx *ctx = crypto_sig_ctx(tfm);</div><div class='del'>-	unsigned int keylen = crypto_sig_keysize(ctx-&gt;child);</div><div class='add'>+	unsigned int keylen = DIV_ROUND_UP_POW2(crypto_sig_keysize(ctx-&gt;child),</div><div class='add'>+						BITS_PER_BYTE);</div><div class='ctx'> 	unsigned int ndigits = DIV_ROUND_UP_POW2(keylen, sizeof(u64));</div><div class='ctx'> 	struct ecdsa_raw_sig sig;</div><div class='ctx'> </div><div class='hunk'>@@ -45,7 +46,8 @@ static unsigned int ecdsa_p1363_max_size(struct crypto_sig *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct ecdsa_p1363_ctx *ctx = crypto_sig_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	return 2 * crypto_sig_keysize(ctx-&gt;child);</div><div class='add'>+	return 2 * DIV_ROUND_UP_POW2(crypto_sig_keysize(ctx-&gt;child),</div><div class='add'>+				     BITS_PER_BYTE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int ecdsa_p1363_digest_size(struct crypto_sig *tfm)</div><div class='head'>diff --git a/crypto/ecdsa-x962.c b/crypto/ecdsa-x962.c<br/>index 90a04f4b9a2f..ee71594d10a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecdsa-x962.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdsa-x962.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecdsa-x962.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ecdsa-x962.c</a></div><div class='hunk'>@@ -82,7 +82,7 @@ static int ecdsa_x962_verify(struct crypto_sig *tfm,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	sig_ctx.ndigits = DIV_ROUND_UP_POW2(crypto_sig_keysize(ctx-&gt;child),</div><div class='del'>-					    sizeof(u64));</div><div class='add'>+					    sizeof(u64) * BITS_PER_BYTE);</div><div class='ctx'> </div><div class='ctx'> 	err = asn1_ber_decoder(&amp;ecdsasignature_decoder, &amp;sig_ctx, src, slen);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='hunk'>@@ -103,7 +103,8 @@ static unsigned int ecdsa_x962_max_size(struct crypto_sig *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct ecdsa_x962_ctx *ctx = crypto_sig_ctx(tfm);</div><div class='ctx'> 	struct sig_alg *alg = crypto_sig_alg(ctx-&gt;child);</div><div class='del'>-	int slen = crypto_sig_keysize(ctx-&gt;child);</div><div class='add'>+	int slen = DIV_ROUND_UP_POW2(crypto_sig_keysize(ctx-&gt;child),</div><div class='add'>+				     BITS_PER_BYTE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Verify takes ECDSA-Sig-Value (described in RFC 5480) as input,</div><div class='head'>diff --git a/crypto/ecdsa.c b/crypto/ecdsa.c<br/>index 117526d15dde..ce8e4364842f 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecdsa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecdsa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecdsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ecdsa.c</a></div><div class='hunk'>@@ -167,7 +167,7 @@ static unsigned int ecdsa_key_size(struct crypto_sig *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct ecc_ctx *ctx = crypto_sig_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	return DIV_ROUND_UP(ctx-&gt;curve-&gt;nbits, 8);</div><div class='add'>+	return ctx-&gt;curve-&gt;nbits;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int ecdsa_digest_size(struct crypto_sig *tfm)</div><div class='hunk'>@@ -334,7 +334,7 @@ static void __exit ecdsa_exit(void)</div><div class='ctx'> 	crypto_unregister_sig(&amp;ecdsa_nist_p521);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(ecdsa_init);</div><div class='add'>+module_init(ecdsa_init);</div><div class='ctx'> module_exit(ecdsa_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/echainiv.c b/crypto/echainiv.c<br/>index 69686668625e..e0a2d3209938 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/echainiv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/echainiv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/echainiv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/echainiv.c</a></div><div class='hunk'>@@ -32,7 +32,6 @@ static int echainiv_encrypt(struct aead_request *req)</div><div class='ctx'> 	u64 seqno;</div><div class='ctx'> 	u8 *info;</div><div class='ctx'> 	unsigned int ivsize = crypto_aead_ivsize(geniv);</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;cryptlen &lt; ivsize)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -41,20 +40,9 @@ static int echainiv_encrypt(struct aead_request *req)</div><div class='ctx'> </div><div class='ctx'> 	info = req-&gt;iv;</div><div class='ctx'> </div><div class='del'>-	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		SYNC_SKCIPHER_REQUEST_ON_STACK(nreq, ctx-&gt;sknull);</div><div class='del'>-</div><div class='del'>-		skcipher_request_set_sync_tfm(nreq, ctx-&gt;sknull);</div><div class='del'>-		skcipher_request_set_callback(nreq, req-&gt;base.flags,</div><div class='del'>-					      NULL, NULL);</div><div class='del'>-		skcipher_request_set_crypt(nreq, req-&gt;src, req-&gt;dst,</div><div class='del'>-					   req-&gt;assoclen + req-&gt;cryptlen,</div><div class='del'>-					   NULL);</div><div class='del'>-</div><div class='del'>-		err = crypto_skcipher_encrypt(nreq);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='add'>+	if (req-&gt;src != req-&gt;dst)</div><div class='add'>+		memcpy_sglist(req-&gt;dst, req-&gt;src,</div><div class='add'>+			      req-&gt;assoclen + req-&gt;cryptlen);</div><div class='ctx'> </div><div class='ctx'> 	aead_request_set_callback(subreq, req-&gt;base.flags,</div><div class='ctx'> 				  req-&gt;base.complete, req-&gt;base.data);</div><div class='hunk'>@@ -157,7 +145,7 @@ static void __exit echainiv_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;echainiv_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(echainiv_module_init);</div><div class='add'>+module_init(echainiv_module_init);</div><div class='ctx'> module_exit(echainiv_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/ecrdsa.c b/crypto/ecrdsa.c<br/>index b3dd8a3ddeb7..2c0602f0cd40 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ecrdsa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ecrdsa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ecrdsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ecrdsa.c</a></div><div class='hunk'>@@ -249,7 +249,7 @@ static unsigned int ecrdsa_key_size(struct crypto_sig *tfm)</div><div class='ctx'> 	 * Verify doesn't need any output, so it's just informational</div><div class='ctx'> 	 * for keyctl to determine the key bit size.</div><div class='ctx'> 	 */</div><div class='del'>-	return ctx-&gt;pub_key.ndigits * sizeof(u64);</div><div class='add'>+	return ctx-&gt;pub_key.ndigits * sizeof(u64) * BITS_PER_BYTE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int ecrdsa_max_size(struct crypto_sig *tfm)</div><div class='head'>diff --git a/crypto/essiv.c b/crypto/essiv.c<br/>index ec0ec8992c2d..d003b78fcd85 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/essiv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/essiv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/essiv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/essiv.c</a></div><div class='hunk'>@@ -548,8 +548,7 @@ static int essiv_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* record the driver name so we can instantiate this exact algo later */</div><div class='del'>-	strscpy(ictx-&gt;shash_driver_name, hash_alg-&gt;base.cra_driver_name,</div><div class='del'>-		CRYPTO_MAX_ALG_NAME);</div><div class='add'>+	strscpy(ictx-&gt;shash_driver_name, hash_alg-&gt;base.cra_driver_name);</div><div class='ctx'> </div><div class='ctx'> 	/* Instance fields */</div><div class='ctx'> </div><div class='hunk'>@@ -642,7 +641,7 @@ static void __exit essiv_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;essiv_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(essiv_module_init);</div><div class='add'>+module_init(essiv_module_init);</div><div class='ctx'> module_exit(essiv_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("ESSIV skcipher/aead wrapper for block encryption");</div><div class='head'>diff --git a/crypto/fcrypt.c b/crypto/fcrypt.c<br/>index 95a16e88899b..80036835cec5 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/fcrypt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/fcrypt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/fcrypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/fcrypt.c</a></div><div class='hunk'>@@ -411,7 +411,7 @@ static void __exit fcrypt_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;fcrypt_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(fcrypt_mod_init);</div><div class='add'>+module_init(fcrypt_mod_init);</div><div class='ctx'> module_exit(fcrypt_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/crypto/fips.c b/crypto/fips.c<br/>index 2fa3a9ee61a1..e88a604cb42b 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/fips.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/fips.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/fips.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/fips.c</a></div><div class='hunk'>@@ -95,5 +95,5 @@ static void __exit fips_exit(void)</div><div class='ctx'> 	crypto_proc_fips_exit();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(fips_init);</div><div class='add'>+module_init(fips_init);</div><div class='ctx'> module_exit(fips_exit);</div><div class='head'>diff --git a/crypto/gcm.c b/crypto/gcm.c<br/>index 84f7c23d14e4..97716482bed0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/gcm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/gcm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/gcm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/gcm.c</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/gcm.h&gt;</div><div class='ctx'> #include &lt;crypto/hash.h&gt;</div><div class='hunk'>@@ -46,7 +45,6 @@ struct crypto_rfc4543_instance_ctx {</div><div class='ctx'> </div><div class='ctx'> struct crypto_rfc4543_ctx {</div><div class='ctx'> 	struct crypto_aead *child;</div><div class='del'>-	struct crypto_sync_skcipher *null;</div><div class='ctx'> 	u8 nonce[4];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -79,8 +77,6 @@ static struct {</div><div class='ctx'> 	struct scatterlist sg;</div><div class='ctx'> } *gcm_zeroes;</div><div class='ctx'> </div><div class='del'>-static int crypto_rfc4543_copy_src_to_dst(struct aead_request *req, bool enc);</div><div class='del'>-</div><div class='ctx'> static inline struct crypto_gcm_req_priv_ctx *crypto_gcm_reqctx(</div><div class='ctx'> 	struct aead_request *req)</div><div class='ctx'> {</div><div class='hunk'>@@ -930,12 +926,12 @@ static int crypto_rfc4543_crypt(struct aead_request *req, bool enc)</div><div class='ctx'> 	unsigned int authsize = crypto_aead_authsize(aead);</div><div class='ctx'> 	u8 *iv = PTR_ALIGN((u8 *)(rctx + 1) + crypto_aead_reqsize(ctx-&gt;child),</div><div class='ctx'> 			   crypto_aead_alignmask(ctx-&gt;child) + 1);</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		err = crypto_rfc4543_copy_src_to_dst(req, enc);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+		unsigned int nbytes = req-&gt;assoclen + req-&gt;cryptlen -</div><div class='add'>+				      (enc ? 0 : authsize);</div><div class='add'>+</div><div class='add'>+		memcpy_sglist(req-&gt;dst, req-&gt;src, nbytes);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(iv, ctx-&gt;nonce, 4);</div><div class='hunk'>@@ -952,22 +948,6 @@ static int crypto_rfc4543_crypt(struct aead_request *req, bool enc)</div><div class='ctx'> 	return enc ? crypto_aead_encrypt(subreq) : crypto_aead_decrypt(subreq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_rfc4543_copy_src_to_dst(struct aead_request *req, bool enc)</div><div class='del'>-{</div><div class='del'>-	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='del'>-	struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(aead);</div><div class='del'>-	unsigned int authsize = crypto_aead_authsize(aead);</div><div class='del'>-	unsigned int nbytes = req-&gt;assoclen + req-&gt;cryptlen -</div><div class='del'>-			      (enc ? 0 : authsize);</div><div class='del'>-	SYNC_SKCIPHER_REQUEST_ON_STACK(nreq, ctx-&gt;null);</div><div class='del'>-</div><div class='del'>-	skcipher_request_set_sync_tfm(nreq, ctx-&gt;null);</div><div class='del'>-	skcipher_request_set_callback(nreq, req-&gt;base.flags, NULL, NULL);</div><div class='del'>-	skcipher_request_set_crypt(nreq, req-&gt;src, req-&gt;dst, nbytes, NULL);</div><div class='del'>-</div><div class='del'>-	return crypto_skcipher_encrypt(nreq);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int crypto_rfc4543_encrypt(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	return crypto_ipsec_check_assoclen(req-&gt;assoclen) ?:</div><div class='hunk'>@@ -987,21 +967,13 @@ static int crypto_rfc4543_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 	struct crypto_aead_spawn *spawn = &amp;ictx-&gt;aead;</div><div class='ctx'> 	struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> 	struct crypto_aead *aead;</div><div class='del'>-	struct crypto_sync_skcipher *null;</div><div class='ctx'> 	unsigned long align;</div><div class='del'>-	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	aead = crypto_spawn_aead(spawn);</div><div class='ctx'> 	if (IS_ERR(aead))</div><div class='ctx'> 		return PTR_ERR(aead);</div><div class='ctx'> </div><div class='del'>-	null = crypto_get_default_null_skcipher();</div><div class='del'>-	err = PTR_ERR(null);</div><div class='del'>-	if (IS_ERR(null))</div><div class='del'>-		goto err_free_aead;</div><div class='del'>-</div><div class='ctx'> 	ctx-&gt;child = aead;</div><div class='del'>-	ctx-&gt;null = null;</div><div class='ctx'> </div><div class='ctx'> 	align = crypto_aead_alignmask(aead);</div><div class='ctx'> 	align &amp;= ~(crypto_tfm_ctx_alignment() - 1);</div><div class='hunk'>@@ -1012,10 +984,6 @@ static int crypto_rfc4543_init_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 		align + GCM_AES_IV_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_free_aead:</div><div class='del'>-	crypto_free_aead(aead);</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_rfc4543_exit_tfm(struct crypto_aead *tfm)</div><div class='hunk'>@@ -1023,7 +991,6 @@ static void crypto_rfc4543_exit_tfm(struct crypto_aead *tfm)</div><div class='ctx'> 	struct crypto_rfc4543_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_aead(ctx-&gt;child);</div><div class='del'>-	crypto_put_default_null_skcipher();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_rfc4543_free(struct aead_instance *inst)</div><div class='hunk'>@@ -1152,7 +1119,7 @@ static void __exit crypto_gcm_module_exit(void)</div><div class='ctx'> 				    ARRAY_SIZE(crypto_gcm_tmpls));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_gcm_module_init);</div><div class='add'>+module_init(crypto_gcm_module_init);</div><div class='ctx'> module_exit(crypto_gcm_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/geniv.c b/crypto/geniv.c<br/>index bee4621b4f12..42eff6a7387c 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/geniv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/geniv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/geniv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/geniv.c</a></div><div class='hunk'>@@ -9,7 +9,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/geniv.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/rng.h&gt;</div><div class='del'>-#include &lt;crypto/null.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -125,15 +124,10 @@ int aead_init_geniv(struct crypto_aead *aead)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;sknull = crypto_get_default_null_skcipher();</div><div class='del'>-	err = PTR_ERR(ctx-&gt;sknull);</div><div class='del'>-	if (IS_ERR(ctx-&gt;sknull))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	child = crypto_spawn_aead(aead_instance_ctx(inst));</div><div class='ctx'> 	err = PTR_ERR(child);</div><div class='ctx'> 	if (IS_ERR(child))</div><div class='del'>-		goto drop_null;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;child = child;</div><div class='ctx'> 	crypto_aead_set_reqsize(aead, crypto_aead_reqsize(child) +</div><div class='hunk'>@@ -143,10 +137,6 @@ int aead_init_geniv(struct crypto_aead *aead)</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='del'>-</div><div class='del'>-drop_null:</div><div class='del'>-	crypto_put_default_null_skcipher();</div><div class='del'>-	goto out;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(aead_init_geniv);</div><div class='ctx'> </div><div class='hunk'>@@ -155,7 +145,6 @@ void aead_exit_geniv(struct crypto_aead *tfm)</div><div class='ctx'> 	struct aead_geniv_ctx *ctx = crypto_aead_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_aead(ctx-&gt;child);</div><div class='del'>-	crypto_put_default_null_skcipher();</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(aead_exit_geniv);</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/ghash-generic.c b/crypto/ghash-generic.c<br/>index c70d163c1ac9..e5803c249c12 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/ghash-generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/ghash-generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/ghash-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/ghash-generic.c</a></div><div class='hunk'>@@ -34,14 +34,14 @@</div><div class='ctx'>  *     (https://csrc.nist.gov/publications/detail/sp/800-38d/final)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/gf128mul.h&gt;</div><div class='ctx'> #include &lt;crypto/ghash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int ghash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='hunk'>@@ -82,59 +82,36 @@ static int ghash_update(struct shash_desc *desc,</div><div class='ctx'> 	struct ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	u8 *dst = dctx-&gt;buffer;</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		int n = min(srclen, dctx-&gt;bytes);</div><div class='del'>-		u8 *pos = dst + (GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='del'>-</div><div class='del'>-		dctx-&gt;bytes -= n;</div><div class='del'>-		srclen -= n;</div><div class='del'>-</div><div class='del'>-		while (n--)</div><div class='del'>-			*pos++ ^= *src++;</div><div class='del'>-</div><div class='del'>-		if (!dctx-&gt;bytes)</div><div class='del'>-			gf128mul_4k_lle((be128 *)dst, ctx-&gt;gf128);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (srclen &gt;= GHASH_BLOCK_SIZE) {</div><div class='add'>+	do {</div><div class='ctx'> 		crypto_xor(dst, src, GHASH_BLOCK_SIZE);</div><div class='ctx'> 		gf128mul_4k_lle((be128 *)dst, ctx-&gt;gf128);</div><div class='ctx'> 		src += GHASH_BLOCK_SIZE;</div><div class='ctx'> 		srclen -= GHASH_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (srclen) {</div><div class='del'>-		dctx-&gt;bytes = GHASH_BLOCK_SIZE - srclen;</div><div class='del'>-		while (srclen--)</div><div class='del'>-			*dst++ ^= *src++;</div><div class='del'>-	}</div><div class='add'>+	} while (srclen &gt;= GHASH_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return srclen;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ghash_flush(struct ghash_ctx *ctx, struct ghash_desc_ctx *dctx)</div><div class='add'>+static void ghash_flush(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			unsigned int len)</div><div class='ctx'> {</div><div class='add'>+	struct ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	u8 *dst = dctx-&gt;buffer;</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		u8 *tmp = dst + (GHASH_BLOCK_SIZE - dctx-&gt;bytes);</div><div class='del'>-</div><div class='del'>-		while (dctx-&gt;bytes--)</div><div class='del'>-			*tmp++ ^= 0;</div><div class='del'>-</div><div class='add'>+	if (len) {</div><div class='add'>+		crypto_xor(dst, src, len);</div><div class='ctx'> 		gf128mul_4k_lle((be128 *)dst, ctx-&gt;gf128);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	dctx-&gt;bytes = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ghash_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int ghash_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+		       unsigned int len, u8 *dst)</div><div class='ctx'> {</div><div class='ctx'> 	struct ghash_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct ghash_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	u8 *buf = dctx-&gt;buffer;</div><div class='ctx'> </div><div class='del'>-	ghash_flush(ctx, dctx);</div><div class='add'>+	ghash_flush(desc, src, len);</div><div class='ctx'> 	memcpy(dst, buf, GHASH_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -151,13 +128,14 @@ static struct shash_alg ghash_alg = {</div><div class='ctx'> 	.digestsize	= GHASH_DIGEST_SIZE,</div><div class='ctx'> 	.init		= ghash_init,</div><div class='ctx'> 	.update		= ghash_update,</div><div class='del'>-	.final		= ghash_final,</div><div class='add'>+	.finup		= ghash_finup,</div><div class='ctx'> 	.setkey		= ghash_setkey,</div><div class='ctx'> 	.descsize	= sizeof(struct ghash_desc_ctx),</div><div class='ctx'> 	.base		= {</div><div class='ctx'> 		.cra_name		= "ghash",</div><div class='ctx'> 		.cra_driver_name	= "ghash-generic",</div><div class='ctx'> 		.cra_priority		= 100,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= GHASH_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct ghash_ctx),</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='hunk'>@@ -175,7 +153,7 @@ static void __exit ghash_mod_exit(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;ghash_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(ghash_mod_init);</div><div class='add'>+module_init(ghash_mod_init);</div><div class='ctx'> module_exit(ghash_mod_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/hctr2.c b/crypto/hctr2.c<br/>index cbcd673be481..c8932777bba8 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/hctr2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/hctr2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/hctr2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/hctr2.c</a></div><div class='hunk'>@@ -570,7 +570,7 @@ static void __exit hctr2_module_exit(void)</div><div class='ctx'> 					   ARRAY_SIZE(hctr2_tmpls));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(hctr2_module_init);</div><div class='add'>+module_init(hctr2_module_init);</div><div class='ctx'> module_exit(hctr2_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("HCTR2 length-preserving encryption mode");</div><div class='head'>diff --git a/crypto/hkdf.c b/crypto/hkdf.c<br/>index 2434c5c42545..f24c2a8d4df9 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/hkdf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/hkdf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/hkdf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/hkdf.c</a></div><div class='hunk'>@@ -543,7 +543,7 @@ static int __init crypto_hkdf_module_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0, i;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CRYPTO_SELFTESTS))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hkdf_sha256_tv); i++) {</div><div class='head'>diff --git a/crypto/hmac.c b/crypto/hmac.c<br/>index 7cec25ff9889..148af460ae97 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/hmac.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/hmac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/hmac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/hmac.c</a></div><div class='hunk'>@@ -13,13 +13,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/hmac.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/fips.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct hmac_ctx {</div><div class='hunk'>@@ -28,6 +26,12 @@ struct hmac_ctx {</div><div class='ctx'> 	u8 pads[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ahash_hmac_ctx {</div><div class='add'>+	struct crypto_ahash *hash;</div><div class='add'>+	/* Contains 'u8 ipad[statesize];', then 'u8 opad[statesize];' */</div><div class='add'>+	u8 pads[];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int hmac_setkey(struct crypto_shash *parent,</div><div class='ctx'> 		       const u8 *inkey, unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -39,7 +43,7 @@ static int hmac_setkey(struct crypto_shash *parent,</div><div class='ctx'> 	u8 *ipad = &amp;tctx-&gt;pads[0];</div><div class='ctx'> 	u8 *opad = &amp;tctx-&gt;pads[ss];</div><div class='ctx'> 	SHASH_DESC_ON_STACK(shash, hash);</div><div class='del'>-	unsigned int i;</div><div class='add'>+	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	if (fips_enabled &amp;&amp; (keylen &lt; 112 / 8))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -65,12 +69,14 @@ static int hmac_setkey(struct crypto_shash *parent,</div><div class='ctx'> 		opad[i] ^= HMAC_OPAD_VALUE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return crypto_shash_init(shash) ?:</div><div class='del'>-	       crypto_shash_update(shash, ipad, bs) ?:</div><div class='del'>-	       crypto_shash_export(shash, ipad) ?:</div><div class='del'>-	       crypto_shash_init(shash) ?:</div><div class='del'>-	       crypto_shash_update(shash, opad, bs) ?:</div><div class='del'>-	       crypto_shash_export(shash, opad);</div><div class='add'>+	err = crypto_shash_init(shash) ?:</div><div class='add'>+	      crypto_shash_update(shash, ipad, bs) ?:</div><div class='add'>+	      crypto_shash_export(shash, ipad) ?:</div><div class='add'>+	      crypto_shash_init(shash) ?:</div><div class='add'>+	      crypto_shash_update(shash, opad, bs) ?:</div><div class='add'>+	      crypto_shash_export(shash, opad);</div><div class='add'>+	shash_desc_zero(shash);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hmac_export(struct shash_desc *pdesc, void *out)</div><div class='hunk'>@@ -90,6 +96,22 @@ static int hmac_import(struct shash_desc *pdesc, const void *in)</div><div class='ctx'> 	return crypto_shash_import(desc, in);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hmac_export_core(struct shash_desc *pdesc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct shash_desc *desc = shash_desc_ctx(pdesc);</div><div class='add'>+</div><div class='add'>+	return crypto_shash_export_core(desc, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_import_core(struct shash_desc *pdesc, const void *in)</div><div class='add'>+{</div><div class='add'>+	const struct hmac_ctx *tctx = crypto_shash_ctx(pdesc-&gt;tfm);</div><div class='add'>+	struct shash_desc *desc = shash_desc_ctx(pdesc);</div><div class='add'>+</div><div class='add'>+	desc-&gt;tfm = tctx-&gt;hash;</div><div class='add'>+	return crypto_shash_import_core(desc, in);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hmac_init(struct shash_desc *pdesc)</div><div class='ctx'> {</div><div class='ctx'> 	const struct hmac_ctx *tctx = crypto_shash_ctx(pdesc-&gt;tfm);</div><div class='hunk'>@@ -105,20 +127,6 @@ static int hmac_update(struct shash_desc *pdesc,</div><div class='ctx'> 	return crypto_shash_update(desc, data, nbytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hmac_final(struct shash_desc *pdesc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct crypto_shash *parent = pdesc-&gt;tfm;</div><div class='del'>-	int ds = crypto_shash_digestsize(parent);</div><div class='del'>-	int ss = crypto_shash_statesize(parent);</div><div class='del'>-	const struct hmac_ctx *tctx = crypto_shash_ctx(parent);</div><div class='del'>-	const u8 *opad = &amp;tctx-&gt;pads[ss];</div><div class='del'>-	struct shash_desc *desc = shash_desc_ctx(pdesc);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_final(desc, out) ?:</div><div class='del'>-	       crypto_shash_import(desc, opad) ?:</div><div class='del'>-	       crypto_shash_finup(desc, out, ds, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hmac_finup(struct shash_desc *pdesc, const u8 *data,</div><div class='ctx'> 		      unsigned int nbytes, u8 *out)</div><div class='ctx'> {</div><div class='hunk'>@@ -146,9 +154,6 @@ static int hmac_init_tfm(struct crypto_shash *parent)</div><div class='ctx'> 	if (IS_ERR(hash))</div><div class='ctx'> 		return PTR_ERR(hash);</div><div class='ctx'> </div><div class='del'>-	parent-&gt;descsize = sizeof(struct shash_desc) +</div><div class='del'>-			   crypto_shash_descsize(hash);</div><div class='del'>-</div><div class='ctx'> 	tctx-&gt;hash = hash;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -174,26 +179,23 @@ static void hmac_exit_tfm(struct crypto_shash *parent)</div><div class='ctx'> 	crypto_free_shash(tctx-&gt;hash);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hmac_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='add'>+static int __hmac_create_shash(struct crypto_template *tmpl,</div><div class='add'>+			       struct rtattr **tb, u32 mask)</div><div class='ctx'> {</div><div class='ctx'> 	struct shash_instance *inst;</div><div class='ctx'> 	struct crypto_shash_spawn *spawn;</div><div class='ctx'> 	struct crypto_alg *alg;</div><div class='ctx'> 	struct shash_alg *salg;</div><div class='del'>-	u32 mask;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int ds;</div><div class='ctx'> 	int ss;</div><div class='ctx'> </div><div class='del'>-	err = crypto_check_attr_type(tb, CRYPTO_ALG_TYPE_SHASH, &amp;mask);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='ctx'> 	inst = kzalloc(sizeof(*inst) + sizeof(*spawn), GFP_KERNEL);</div><div class='ctx'> 	if (!inst)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	spawn = shash_instance_ctx(inst);</div><div class='ctx'> </div><div class='add'>+	mask |= CRYPTO_AHASH_ALG_NO_EXPORT_CORE;</div><div class='ctx'> 	err = crypto_grab_shash(spawn, shash_crypto_instance(inst),</div><div class='ctx'> 				crypto_attr_alg_name(tb[1]), 0, mask);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -212,7 +214,8 @@ static int hmac_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> 	    ss &lt; alg-&gt;cra_blocksize)</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> </div><div class='del'>-	err = crypto_inst_setname(shash_crypto_instance(inst), tmpl-&gt;name, alg);</div><div class='add'>+	err = crypto_inst_setname(shash_crypto_instance(inst), "hmac",</div><div class='add'>+				  "hmac-shash", alg);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_inst;</div><div class='ctx'> </div><div class='hunk'>@@ -222,12 +225,14 @@ static int hmac_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.digestsize = ds;</div><div class='ctx'> 	inst-&gt;alg.statesize = ss;</div><div class='add'>+	inst-&gt;alg.descsize = sizeof(struct shash_desc) + salg-&gt;descsize;</div><div class='ctx'> 	inst-&gt;alg.init = hmac_init;</div><div class='ctx'> 	inst-&gt;alg.update = hmac_update;</div><div class='del'>-	inst-&gt;alg.final = hmac_final;</div><div class='ctx'> 	inst-&gt;alg.finup = hmac_finup;</div><div class='ctx'> 	inst-&gt;alg.export = hmac_export;</div><div class='ctx'> 	inst-&gt;alg.import = hmac_import;</div><div class='add'>+	inst-&gt;alg.export_core = hmac_export_core;</div><div class='add'>+	inst-&gt;alg.import_core = hmac_import_core;</div><div class='ctx'> 	inst-&gt;alg.setkey = hmac_setkey;</div><div class='ctx'> 	inst-&gt;alg.init_tfm = hmac_init_tfm;</div><div class='ctx'> 	inst-&gt;alg.clone_tfm = hmac_clone_tfm;</div><div class='hunk'>@@ -243,23 +248,332 @@ err_free_inst:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct crypto_template hmac_tmpl = {</div><div class='del'>-	.name = "hmac",</div><div class='del'>-	.create = hmac_create,</div><div class='del'>-	.module = THIS_MODULE,</div><div class='add'>+static int hmac_setkey_ahash(struct crypto_ahash *parent,</div><div class='add'>+			     const u8 *inkey, unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct ahash_hmac_ctx *tctx = crypto_ahash_ctx(parent);</div><div class='add'>+	struct crypto_ahash *fb = crypto_ahash_fb(tctx-&gt;hash);</div><div class='add'>+	int ds = crypto_ahash_digestsize(parent);</div><div class='add'>+	int bs = crypto_ahash_blocksize(parent);</div><div class='add'>+	int ss = crypto_ahash_statesize(parent);</div><div class='add'>+	HASH_REQUEST_ON_STACK(req, fb);</div><div class='add'>+	u8 *opad = &amp;tctx-&gt;pads[ss];</div><div class='add'>+	u8 *ipad = &amp;tctx-&gt;pads[0];</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	if (fips_enabled &amp;&amp; (keylen &lt; 112 / 8))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(req, 0, NULL, NULL);</div><div class='add'>+</div><div class='add'>+	if (keylen &gt; bs) {</div><div class='add'>+		ahash_request_set_virt(req, inkey, ipad, keylen);</div><div class='add'>+		err = crypto_ahash_digest(req);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_zero_req;</div><div class='add'>+</div><div class='add'>+		keylen = ds;</div><div class='add'>+	} else</div><div class='add'>+		memcpy(ipad, inkey, keylen);</div><div class='add'>+</div><div class='add'>+	memset(ipad + keylen, 0, bs - keylen);</div><div class='add'>+	memcpy(opad, ipad, bs);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bs; i++) {</div><div class='add'>+		ipad[i] ^= HMAC_IPAD_VALUE;</div><div class='add'>+		opad[i] ^= HMAC_OPAD_VALUE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ahash_request_set_virt(req, ipad, NULL, bs);</div><div class='add'>+	err = crypto_ahash_init(req) ?:</div><div class='add'>+	      crypto_ahash_update(req) ?:</div><div class='add'>+	      crypto_ahash_export(req, ipad);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_virt(req, opad, NULL, bs);</div><div class='add'>+	err = err ?:</div><div class='add'>+	      crypto_ahash_init(req) ?:</div><div class='add'>+	      crypto_ahash_update(req) ?:</div><div class='add'>+	      crypto_ahash_export(req, opad);</div><div class='add'>+</div><div class='add'>+out_zero_req:</div><div class='add'>+	HASH_REQUEST_ZERO(req);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_export_ahash(struct ahash_request *preq, void *out)</div><div class='add'>+{</div><div class='add'>+	return crypto_ahash_export(ahash_request_ctx(preq), out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_import_ahash(struct ahash_request *preq, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(preq);</div><div class='add'>+	struct ahash_hmac_ctx *tctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct ahash_request *req = ahash_request_ctx(preq);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(req, tctx-&gt;hash);</div><div class='add'>+	return crypto_ahash_import(req, in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_export_core_ahash(struct ahash_request *preq, void *out)</div><div class='add'>+{</div><div class='add'>+	return crypto_ahash_export_core(ahash_request_ctx(preq), out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_import_core_ahash(struct ahash_request *preq, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(preq);</div><div class='add'>+	struct ahash_hmac_ctx *tctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	struct ahash_request *req = ahash_request_ctx(preq);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_tfm(req, tctx-&gt;hash);</div><div class='add'>+	return crypto_ahash_import_core(req, in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_init_ahash(struct ahash_request *preq)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(preq);</div><div class='add'>+	struct ahash_hmac_ctx *tctx = crypto_ahash_ctx(tfm);</div><div class='add'>+</div><div class='add'>+	return hmac_import_ahash(preq, &amp;tctx-&gt;pads[0]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_update_ahash(struct ahash_request *preq)</div><div class='add'>+{</div><div class='add'>+	struct ahash_request *req = ahash_request_ctx(preq);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(req, ahash_request_flags(preq),</div><div class='add'>+				   preq-&gt;base.complete, preq-&gt;base.data);</div><div class='add'>+	if (ahash_request_isvirt(preq))</div><div class='add'>+		ahash_request_set_virt(req, preq-&gt;svirt, NULL, preq-&gt;nbytes);</div><div class='add'>+	else</div><div class='add'>+		ahash_request_set_crypt(req, preq-&gt;src, NULL, preq-&gt;nbytes);</div><div class='add'>+	return crypto_ahash_update(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_finup_finish(struct ahash_request *preq, unsigned int mask)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash *tfm = crypto_ahash_reqtfm(preq);</div><div class='add'>+	struct ahash_request *req = ahash_request_ctx(preq);</div><div class='add'>+	struct ahash_hmac_ctx *tctx = crypto_ahash_ctx(tfm);</div><div class='add'>+	int ds = crypto_ahash_digestsize(tfm);</div><div class='add'>+	int ss = crypto_ahash_statesize(tfm);</div><div class='add'>+	const u8 *opad = &amp;tctx-&gt;pads[ss];</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(req, ahash_request_flags(preq) &amp; ~mask,</div><div class='add'>+				   preq-&gt;base.complete, preq-&gt;base.data);</div><div class='add'>+	ahash_request_set_virt(req, preq-&gt;result, preq-&gt;result, ds);</div><div class='add'>+	return crypto_ahash_import(req, opad) ?:</div><div class='add'>+	       crypto_ahash_finup(req);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hmac_finup_done(void *data, int err)</div><div class='add'>+{</div><div class='add'>+	struct ahash_request *preq = data;</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = hmac_finup_finish(preq, CRYPTO_TFM_REQ_MAY_SLEEP);</div><div class='add'>+	if (err == -EINPROGRESS || err == -EBUSY)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	ahash_request_complete(preq, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_finup_ahash(struct ahash_request *preq)</div><div class='add'>+{</div><div class='add'>+	struct ahash_request *req = ahash_request_ctx(preq);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(req, ahash_request_flags(preq),</div><div class='add'>+				   hmac_finup_done, preq);</div><div class='add'>+	if (ahash_request_isvirt(preq))</div><div class='add'>+		ahash_request_set_virt(req, preq-&gt;svirt, preq-&gt;result,</div><div class='add'>+				       preq-&gt;nbytes);</div><div class='add'>+	else</div><div class='add'>+		ahash_request_set_crypt(req, preq-&gt;src, preq-&gt;result,</div><div class='add'>+					preq-&gt;nbytes);</div><div class='add'>+	return crypto_ahash_finup(req) ?:</div><div class='add'>+	       hmac_finup_finish(preq, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_digest_ahash(struct ahash_request *preq)</div><div class='add'>+{</div><div class='add'>+	return hmac_init_ahash(preq) ?:</div><div class='add'>+	       hmac_finup_ahash(preq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_init_ahash_tfm(struct crypto_ahash *parent)</div><div class='add'>+{</div><div class='add'>+	struct ahash_instance *inst = ahash_alg_instance(parent);</div><div class='add'>+	struct ahash_hmac_ctx *tctx = crypto_ahash_ctx(parent);</div><div class='add'>+	struct crypto_ahash *hash;</div><div class='add'>+</div><div class='add'>+	hash = crypto_spawn_ahash(ahash_instance_ctx(inst));</div><div class='add'>+	if (IS_ERR(hash))</div><div class='add'>+		return PTR_ERR(hash);</div><div class='add'>+</div><div class='add'>+	if (crypto_ahash_reqsize(parent) &lt; sizeof(struct ahash_request) +</div><div class='add'>+					   crypto_ahash_reqsize(hash))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tctx-&gt;hash = hash;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_clone_ahash_tfm(struct crypto_ahash *dst,</div><div class='add'>+				struct crypto_ahash *src)</div><div class='add'>+{</div><div class='add'>+	struct ahash_hmac_ctx *sctx = crypto_ahash_ctx(src);</div><div class='add'>+	struct ahash_hmac_ctx *dctx = crypto_ahash_ctx(dst);</div><div class='add'>+	struct crypto_ahash *hash;</div><div class='add'>+</div><div class='add'>+	hash = crypto_clone_ahash(sctx-&gt;hash);</div><div class='add'>+	if (IS_ERR(hash))</div><div class='add'>+		return PTR_ERR(hash);</div><div class='add'>+</div><div class='add'>+	dctx-&gt;hash = hash;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hmac_exit_ahash_tfm(struct crypto_ahash *parent)</div><div class='add'>+{</div><div class='add'>+	struct ahash_hmac_ctx *tctx = crypto_ahash_ctx(parent);</div><div class='add'>+</div><div class='add'>+	crypto_free_ahash(tctx-&gt;hash);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_create_ahash(struct crypto_template *tmpl, struct rtattr **tb,</div><div class='add'>+			     u32 mask)</div><div class='add'>+{</div><div class='add'>+	struct crypto_ahash_spawn *spawn;</div><div class='add'>+	struct ahash_instance *inst;</div><div class='add'>+	struct crypto_alg *alg;</div><div class='add'>+	struct hash_alg_common *halg;</div><div class='add'>+	int ds, ss, err;</div><div class='add'>+</div><div class='add'>+	inst = kzalloc(sizeof(*inst) + sizeof(*spawn), GFP_KERNEL);</div><div class='add'>+	if (!inst)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	spawn = ahash_instance_ctx(inst);</div><div class='add'>+</div><div class='add'>+	mask |= CRYPTO_AHASH_ALG_NO_EXPORT_CORE;</div><div class='add'>+	err = crypto_grab_ahash(spawn, ahash_crypto_instance(inst),</div><div class='add'>+				crypto_attr_alg_name(tb[1]), 0, mask);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_inst;</div><div class='add'>+	halg = crypto_spawn_ahash_alg(spawn);</div><div class='add'>+	alg = &amp;halg-&gt;base;</div><div class='add'>+</div><div class='add'>+	/* The underlying hash algorithm must not require a key */</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+	if (crypto_hash_alg_needs_key(halg))</div><div class='add'>+		goto err_free_inst;</div><div class='add'>+</div><div class='add'>+	ds = halg-&gt;digestsize;</div><div class='add'>+	ss = halg-&gt;statesize;</div><div class='add'>+	if (ds &gt; alg-&gt;cra_blocksize || ss &lt; alg-&gt;cra_blocksize)</div><div class='add'>+		goto err_free_inst;</div><div class='add'>+</div><div class='add'>+	err = crypto_inst_setname(ahash_crypto_instance(inst), tmpl-&gt;name, alg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_inst;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.halg.base.cra_flags = alg-&gt;cra_flags &amp;</div><div class='add'>+					CRYPTO_ALG_INHERITED_FLAGS;</div><div class='add'>+	inst-&gt;alg.halg.base.cra_flags |= CRYPTO_ALG_REQ_VIRT;</div><div class='add'>+	inst-&gt;alg.halg.base.cra_priority = alg-&gt;cra_priority + 100;</div><div class='add'>+	inst-&gt;alg.halg.base.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='add'>+	inst-&gt;alg.halg.base.cra_ctxsize = sizeof(struct ahash_hmac_ctx) +</div><div class='add'>+					  (ss * 2);</div><div class='add'>+	inst-&gt;alg.halg.base.cra_reqsize = sizeof(struct ahash_request) +</div><div class='add'>+					  alg-&gt;cra_reqsize;</div><div class='add'>+</div><div class='add'>+	inst-&gt;alg.halg.digestsize = ds;</div><div class='add'>+	inst-&gt;alg.halg.statesize = ss;</div><div class='add'>+	inst-&gt;alg.init = hmac_init_ahash;</div><div class='add'>+	inst-&gt;alg.update = hmac_update_ahash;</div><div class='add'>+	inst-&gt;alg.finup = hmac_finup_ahash;</div><div class='add'>+	inst-&gt;alg.digest = hmac_digest_ahash;</div><div class='add'>+	inst-&gt;alg.export = hmac_export_ahash;</div><div class='add'>+	inst-&gt;alg.import = hmac_import_ahash;</div><div class='add'>+	inst-&gt;alg.export_core = hmac_export_core_ahash;</div><div class='add'>+	inst-&gt;alg.import_core = hmac_import_core_ahash;</div><div class='add'>+	inst-&gt;alg.setkey = hmac_setkey_ahash;</div><div class='add'>+	inst-&gt;alg.init_tfm = hmac_init_ahash_tfm;</div><div class='add'>+	inst-&gt;alg.clone_tfm = hmac_clone_ahash_tfm;</div><div class='add'>+	inst-&gt;alg.exit_tfm = hmac_exit_ahash_tfm;</div><div class='add'>+</div><div class='add'>+	inst-&gt;free = ahash_free_singlespawn_instance;</div><div class='add'>+</div><div class='add'>+	err = ahash_register_instance(tmpl, inst);</div><div class='add'>+	if (err) {</div><div class='add'>+err_free_inst:</div><div class='add'>+		ahash_free_singlespawn_instance(inst);</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='add'>+{</div><div class='add'>+	struct crypto_attr_type *algt;</div><div class='add'>+	u32 mask;</div><div class='add'>+</div><div class='add'>+	algt = crypto_get_attr_type(tb);</div><div class='add'>+	if (IS_ERR(algt))</div><div class='add'>+		return PTR_ERR(algt);</div><div class='add'>+</div><div class='add'>+	mask = crypto_algt_inherited_mask(algt);</div><div class='add'>+</div><div class='add'>+	if (!((algt-&gt;type ^ CRYPTO_ALG_TYPE_AHASH) &amp;</div><div class='add'>+	      algt-&gt;mask &amp; CRYPTO_ALG_TYPE_MASK))</div><div class='add'>+		return hmac_create_ahash(tmpl, tb, mask);</div><div class='add'>+</div><div class='add'>+	if ((algt-&gt;type ^ CRYPTO_ALG_TYPE_SHASH) &amp;</div><div class='add'>+	    algt-&gt;mask &amp; CRYPTO_ALG_TYPE_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return __hmac_create_shash(tmpl, tb, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hmac_create_shash(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = crypto_check_attr_type(tb, CRYPTO_ALG_TYPE_SHASH, &amp;mask);</div><div class='add'>+	if (err)</div><div class='add'>+		return err == -EINVAL ? -ENOENT : err;</div><div class='add'>+</div><div class='add'>+	return __hmac_create_shash(tmpl, tb, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct crypto_template hmac_tmpls[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "hmac",</div><div class='add'>+		.create = hmac_create,</div><div class='add'>+		.module = THIS_MODULE,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "hmac-shash",</div><div class='add'>+		.create = hmac_create_shash,</div><div class='add'>+		.module = THIS_MODULE,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init hmac_module_init(void)</div><div class='ctx'> {</div><div class='del'>-	return crypto_register_template(&amp;hmac_tmpl);</div><div class='add'>+	return crypto_register_templates(hmac_tmpls, ARRAY_SIZE(hmac_tmpls));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit hmac_module_exit(void)</div><div class='ctx'> {</div><div class='del'>-	crypto_unregister_template(&amp;hmac_tmpl);</div><div class='add'>+	crypto_unregister_templates(hmac_tmpls, ARRAY_SIZE(hmac_tmpls));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(hmac_module_init);</div><div class='add'>+module_init(hmac_module_init);</div><div class='ctx'> module_exit(hmac_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/internal.h b/crypto/internal.h<br/>index 11567ea24fc3..b9afd68767c1 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/internal.h</a></div><div class='hunk'>@@ -46,6 +46,7 @@ struct crypto_type {</div><div class='ctx'> 	unsigned int maskclear;</div><div class='ctx'> 	unsigned int maskset;</div><div class='ctx'> 	unsigned int tfmsize;</div><div class='add'>+	unsigned int algsize;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -66,8 +67,7 @@ extern struct blocking_notifier_head crypto_chain;</div><div class='ctx'> </div><div class='ctx'> int alg_test(const char *driver, const char *alg, u32 type, u32 mask);</div><div class='ctx'> </div><div class='del'>-#if !IS_BUILTIN(CONFIG_CRYPTO_ALGAPI) || \</div><div class='del'>-    IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS)</div><div class='add'>+#if !IS_BUILTIN(CONFIG_CRYPTO_ALGAPI) || !IS_ENABLED(CONFIG_CRYPTO_SELFTESTS)</div><div class='ctx'> static inline bool crypto_boot_test_finished(void)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -86,7 +86,7 @@ static inline void set_crypto_boot_test_finished(void)</div><div class='ctx'> 	static_branch_enable(&amp;__crypto_boot_test_finished);</div><div class='ctx'> }</div><div class='ctx'> #endif /* !IS_BUILTIN(CONFIG_CRYPTO_ALGAPI) ||</div><div class='del'>-	* IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS)</div><div class='add'>+	* !IS_ENABLED(CONFIG_CRYPTO_SELFTESTS)</div><div class='ctx'> 	*/</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PROC_FS</div><div class='hunk'>@@ -128,7 +128,6 @@ void *crypto_create_tfm_node(struct crypto_alg *alg,</div><div class='ctx'> 			const struct crypto_type *frontend, int node);</div><div class='ctx'> void *crypto_clone_tfm(const struct crypto_type *frontend,</div><div class='ctx'> 		       struct crypto_tfm *otfm);</div><div class='del'>-void crypto_destroy_alg(struct crypto_alg *alg);</div><div class='ctx'> </div><div class='ctx'> static inline void *crypto_create_tfm(struct crypto_alg *alg,</div><div class='ctx'> 			const struct crypto_type *frontend)</div><div class='hunk'>@@ -163,6 +162,8 @@ static inline struct crypto_alg *crypto_alg_get(struct crypto_alg *alg)</div><div class='ctx'> 	return alg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void crypto_destroy_alg(struct crypto_alg *alg);</div><div class='add'>+</div><div class='ctx'> static inline void crypto_alg_put(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	if (refcount_dec_and_test(&amp;alg-&gt;cra_refcnt))</div><div class='head'>diff --git a/crypto/kdf_sp800108.c b/crypto/kdf_sp800108.c<br/>index c3f9938e1ad2..b7a6bf9da773 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/kdf_sp800108.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/kdf_sp800108.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/kdf_sp800108.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/kdf_sp800108.c</a></div><div class='hunk'>@@ -127,7 +127,7 @@ static int __init crypto_kdf108_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_MANAGER_DISABLE_TESTS))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CRYPTO_SELFTESTS))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = kdf_test(&amp;kdf_ctr_hmac_sha256_tv_template[0], "hmac(sha256)",</div><div class='head'>diff --git a/crypto/khazad.c b/crypto/khazad.c<br/>index 7ad338ca2c18..024264ee9cd1 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/khazad.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/khazad.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/khazad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/khazad.c</a></div><div class='hunk'>@@ -871,7 +871,7 @@ static void __exit khazad_mod_fini(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-subsys_initcall(khazad_mod_init);</div><div class='add'>+module_init(khazad_mod_init);</div><div class='ctx'> module_exit(khazad_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/kpp.c b/crypto/kpp.c<br/>index ecc63a1a948d..2e0cefe7a25f 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/kpp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/kpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/kpp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/kpp.c</a></div><div class='hunk'>@@ -80,6 +80,7 @@ static const struct crypto_type crypto_kpp_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_KPP,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_kpp, base),</div><div class='add'>+	.algsize = offsetof(struct kpp_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_kpp *crypto_alloc_kpp(const char *alg_name, u32 type, u32 mask)</div><div class='head'>diff --git a/crypto/krb5/rfc3961_simplified.c b/crypto/krb5/rfc3961_simplified.c<br/>index 79180d28baa9..e49cbdec7c40 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/krb5/rfc3961_simplified.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/krb5/rfc3961_simplified.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/krb5/rfc3961_simplified.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/krb5/rfc3961_simplified.c</a></div><div class='hunk'>@@ -89,6 +89,7 @@ int crypto_shash_update_sg(struct shash_desc *desc, struct scatterlist *sg,</div><div class='ctx'> </div><div class='ctx'> 	sg_miter_start(&amp;miter, sg, sg_nents(sg),</div><div class='ctx'> 		       SG_MITER_FROM_SG | SG_MITER_LOCAL);</div><div class='add'>+	sg_miter_skip(&amp;miter, offset);</div><div class='ctx'> 	for (i = 0; i &lt; len; i += n) {</div><div class='ctx'> 		sg_miter_next(&amp;miter);</div><div class='ctx'> 		n = min(miter.length, len - i);</div><div class='head'>diff --git a/crypto/krb5enc.c b/crypto/krb5enc.c<br/>index d07769bf149e..a1de55994d92 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/krb5enc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/krb5enc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/krb5enc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/krb5enc.c</a></div><div class='hunk'>@@ -496,7 +496,7 @@ static void __exit crypto_krb5enc_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_krb5enc_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_krb5enc_module_init);</div><div class='add'>+module_init(crypto_krb5enc_module_init);</div><div class='ctx'> module_exit(crypto_krb5enc_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/lrw.c b/crypto/lrw.c<br/>index 391ae0f7641f..dd403b800513 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/lrw.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lrw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/lrw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/lrw.c</a></div><div class='hunk'>@@ -322,7 +322,7 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> </div><div class='ctx'> 	err = crypto_grab_skcipher(spawn, skcipher_crypto_instance(inst),</div><div class='ctx'> 				   cipher_name, 0, mask);</div><div class='del'>-	if (err == -ENOENT) {</div><div class='add'>+	if (err == -ENOENT &amp;&amp; memcmp(cipher_name, "ecb(", 4)) {</div><div class='ctx'> 		err = -ENAMETOOLONG;</div><div class='ctx'> 		if (snprintf(ecb_name, CRYPTO_MAX_ALG_NAME, "ecb(%s)",</div><div class='ctx'> 			     cipher_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='hunk'>@@ -356,7 +356,7 @@ static int lrw_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> 	/* Alas we screwed up the naming so we have to mangle the</div><div class='ctx'> 	 * cipher name.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!strncmp(cipher_name, "ecb(", 4)) {</div><div class='add'>+	if (!memcmp(cipher_name, "ecb(", 4)) {</div><div class='ctx'> 		int len;</div><div class='ctx'> </div><div class='ctx'> 		len = strscpy(ecb_name, cipher_name + 4, sizeof(ecb_name));</div><div class='hunk'>@@ -420,7 +420,7 @@ static void __exit lrw_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;lrw_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(lrw_module_init);</div><div class='add'>+module_init(lrw_module_init);</div><div class='ctx'> module_exit(lrw_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/lskcipher.c b/crypto/lskcipher.c<br/>index cdb4897c63e6..c2e2c38b5aa8 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/lskcipher.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lskcipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/lskcipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/lskcipher.c</a></div><div class='hunk'>@@ -294,6 +294,7 @@ static const struct crypto_type crypto_lskcipher_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_LSKCIPHER,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_lskcipher, base),</div><div class='add'>+	.algsize = offsetof(struct lskcipher_alg, co.base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void crypto_lskcipher_exit_tfm_sg(struct crypto_tfm *tfm)</div><div class='head'>diff --git a/crypto/lz4.c b/crypto/lz4.c<br/>index 82588607fb2e..7a984ae5ae52 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/lz4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lz4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/lz4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/lz4.c</a></div><div class='hunk'>@@ -12,10 +12,6 @@</div><div class='ctx'> #include &lt;linux/lz4.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/scompress.h&gt;</div><div class='ctx'> </div><div class='del'>-struct lz4_ctx {</div><div class='del'>-	void *lz4_comp_mem;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void *lz4_alloc_ctx(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *ctx;</div><div class='hunk'>@@ -93,7 +89,7 @@ static void __exit lz4_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_scomp(&amp;scomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(lz4_mod_init);</div><div class='add'>+module_init(lz4_mod_init);</div><div class='ctx'> module_exit(lz4_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/lz4hc.c b/crypto/lz4hc.c<br/>index 997e76c0183a..9c61d05b6214 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/lz4hc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lz4hc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/lz4hc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/lz4hc.c</a></div><div class='hunk'>@@ -10,10 +10,6 @@</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/lz4.h&gt;</div><div class='ctx'> </div><div class='del'>-struct lz4hc_ctx {</div><div class='del'>-	void *lz4hc_comp_mem;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void *lz4hc_alloc_ctx(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *ctx;</div><div class='hunk'>@@ -91,7 +87,7 @@ static void __exit lz4hc_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_scomp(&amp;scomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(lz4hc_mod_init);</div><div class='add'>+module_init(lz4hc_mod_init);</div><div class='ctx'> module_exit(lz4hc_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/lzo-rle.c b/crypto/lzo-rle.c<br/>index b1350ae278b8..ba013f2d5090 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/lzo-rle.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lzo-rle.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/lzo-rle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/lzo-rle.c</a></div><div class='hunk'>@@ -9,10 +9,6 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-struct lzorle_ctx {</div><div class='del'>-	void *lzorle_comp_mem;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void *lzorle_alloc_ctx(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *ctx;</div><div class='hunk'>@@ -95,7 +91,7 @@ static void __exit lzorle_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_scomp(&amp;scomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(lzorle_mod_init);</div><div class='add'>+module_init(lzorle_mod_init);</div><div class='ctx'> module_exit(lzorle_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/lzo.c b/crypto/lzo.c<br/>index dfe5a07ca35f..7867e2c67c4e 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/lzo.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/lzo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/lzo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/lzo.c</a></div><div class='hunk'>@@ -9,10 +9,6 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='del'>-struct lzo_ctx {</div><div class='del'>-	void *lzo_comp_mem;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void *lzo_alloc_ctx(void)</div><div class='ctx'> {</div><div class='ctx'> 	void *ctx;</div><div class='hunk'>@@ -95,7 +91,7 @@ static void __exit lzo_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_scomp(&amp;scomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(lzo_mod_init);</div><div class='add'>+module_init(lzo_mod_init);</div><div class='ctx'> module_exit(lzo_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/md4.c b/crypto/md4.c<br/>index 2e7f2f319f95..55bf47e23c13 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/md4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/md4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/md4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/md4.c</a></div><div class='hunk'>@@ -233,7 +233,7 @@ static void __exit md4_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(md4_mod_init);</div><div class='add'>+module_init(md4_mod_init);</div><div class='ctx'> module_exit(md4_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/md5.c b/crypto/md5.c<br/>index 72c0c46fb5ee..32c0819f5118 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/md5.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/md5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/md5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/md5.c</a></div><div class='hunk'>@@ -17,11 +17,9 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/md5.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='ctx'> </div><div class='ctx'> const u8 md5_zero_message_hash[MD5_DIGEST_SIZE] = {</div><div class='ctx'> 	0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,</div><div class='hunk'>@@ -120,10 +118,11 @@ static void md5_transform(__u32 *hash, __u32 const *in)</div><div class='ctx'> 	hash[3] += d;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void md5_transform_helper(struct md5_state *ctx)</div><div class='add'>+static inline void md5_transform_helper(struct md5_state *ctx,</div><div class='add'>+					u32 block[MD5_BLOCK_WORDS])</div><div class='ctx'> {</div><div class='del'>-	le32_to_cpu_array(ctx-&gt;block, sizeof(ctx-&gt;block) / sizeof(u32));</div><div class='del'>-	md5_transform(ctx-&gt;hash, ctx-&gt;block);</div><div class='add'>+	le32_to_cpu_array(block, MD5_BLOCK_WORDS);</div><div class='add'>+	md5_transform(ctx-&gt;hash, block);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int md5_init(struct shash_desc *desc)</div><div class='hunk'>@@ -142,76 +141,53 @@ static int md5_init(struct shash_desc *desc)</div><div class='ctx'> static int md5_update(struct shash_desc *desc, const u8 *data, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='del'>-	const u32 avail = sizeof(mctx-&gt;block) - (mctx-&gt;byte_count &amp; 0x3f);</div><div class='add'>+	u32 block[MD5_BLOCK_WORDS];</div><div class='ctx'> </div><div class='ctx'> 	mctx-&gt;byte_count += len;</div><div class='del'>-</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		memcpy((char *)mctx-&gt;block + (sizeof(mctx-&gt;block) - avail),</div><div class='del'>-		       data, len);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)mctx-&gt;block + (sizeof(mctx-&gt;block) - avail),</div><div class='del'>-	       data, avail);</div><div class='del'>-</div><div class='del'>-	md5_transform_helper(mctx);</div><div class='del'>-	data += avail;</div><div class='del'>-	len -= avail;</div><div class='del'>-</div><div class='del'>-	while (len &gt;= sizeof(mctx-&gt;block)) {</div><div class='del'>-		memcpy(mctx-&gt;block, data, sizeof(mctx-&gt;block));</div><div class='del'>-		md5_transform_helper(mctx);</div><div class='del'>-		data += sizeof(mctx-&gt;block);</div><div class='del'>-		len -= sizeof(mctx-&gt;block);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(mctx-&gt;block, data, len);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	do {</div><div class='add'>+		memcpy(block, data, sizeof(block));</div><div class='add'>+		md5_transform_helper(mctx, block);</div><div class='add'>+		data += sizeof(block);</div><div class='add'>+		len -= sizeof(block);</div><div class='add'>+	} while (len &gt;= sizeof(block));</div><div class='add'>+	memzero_explicit(block, sizeof(block));</div><div class='add'>+	mctx-&gt;byte_count -= len;</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int md5_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int md5_finup(struct shash_desc *desc, const u8 *data, unsigned int len,</div><div class='add'>+		     u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct md5_state *mctx = shash_desc_ctx(desc);</div><div class='del'>-	const unsigned int offset = mctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	char *p = (char *)mctx-&gt;block + offset;</div><div class='del'>-	int padding = 56 - (offset + 1);</div><div class='add'>+	u32 block[MD5_BLOCK_WORDS];</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	int padding;</div><div class='add'>+	char *p;</div><div class='add'>+</div><div class='add'>+	memcpy(block, data, len);</div><div class='add'>+</div><div class='add'>+	offset = len;</div><div class='add'>+	p = (char *)block + offset;</div><div class='add'>+	padding = 56 - (offset + 1);</div><div class='ctx'> </div><div class='ctx'> 	*p++ = 0x80;</div><div class='ctx'> 	if (padding &lt; 0) {</div><div class='ctx'> 		memset(p, 0x00, padding + sizeof (u64));</div><div class='del'>-		md5_transform_helper(mctx);</div><div class='del'>-		p = (char *)mctx-&gt;block;</div><div class='add'>+		md5_transform_helper(mctx, block);</div><div class='add'>+		p = (char *)block;</div><div class='ctx'> 		padding = 56;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memset(p, 0, padding);</div><div class='del'>-	mctx-&gt;block[14] = mctx-&gt;byte_count &lt;&lt; 3;</div><div class='del'>-	mctx-&gt;block[15] = mctx-&gt;byte_count &gt;&gt; 29;</div><div class='del'>-	le32_to_cpu_array(mctx-&gt;block, (sizeof(mctx-&gt;block) -</div><div class='del'>-	                  sizeof(u64)) / sizeof(u32));</div><div class='del'>-	md5_transform(mctx-&gt;hash, mctx-&gt;block);</div><div class='add'>+	mctx-&gt;byte_count += len;</div><div class='add'>+	block[14] = mctx-&gt;byte_count &lt;&lt; 3;</div><div class='add'>+	block[15] = mctx-&gt;byte_count &gt;&gt; 29;</div><div class='add'>+	le32_to_cpu_array(block, (sizeof(block) - sizeof(u64)) / sizeof(u32));</div><div class='add'>+	md5_transform(mctx-&gt;hash, block);</div><div class='add'>+	memzero_explicit(block, sizeof(block));</div><div class='ctx'> 	cpu_to_le32_array(mctx-&gt;hash, sizeof(mctx-&gt;hash) / sizeof(u32));</div><div class='ctx'> 	memcpy(out, mctx-&gt;hash, sizeof(mctx-&gt;hash));</div><div class='del'>-	memset(mctx, 0, sizeof(*mctx));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int md5_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *ctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, ctx, sizeof(*ctx));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int md5_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct md5_state *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	memcpy(ctx, in, sizeof(*ctx));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -219,14 +195,12 @@ static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	MD5_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	md5_init,</div><div class='ctx'> 	.update		=	md5_update,</div><div class='del'>-	.final		=	md5_final,</div><div class='del'>-	.export		=	md5_export,</div><div class='del'>-	.import		=	md5_import,</div><div class='del'>-	.descsize	=	sizeof(struct md5_state),</div><div class='del'>-	.statesize	=	sizeof(struct md5_state),</div><div class='add'>+	.finup		=	md5_finup,</div><div class='add'>+	.descsize	=	MD5_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"md5",</div><div class='ctx'> 		.cra_driver_name =	"md5-generic",</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	MD5_HMAC_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -242,7 +216,7 @@ static void __exit md5_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(md5_mod_init);</div><div class='add'>+module_init(md5_mod_init);</div><div class='ctx'> module_exit(md5_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/michael_mic.c b/crypto/michael_mic.c<br/>index 0d14e980d4d6..69ad35f524d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/michael_mic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/michael_mic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/michael_mic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/michael_mic.c</a></div><div class='hunk'>@@ -167,7 +167,7 @@ static void __exit michael_mic_exit(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-subsys_initcall(michael_mic_init);</div><div class='add'>+module_init(michael_mic_init);</div><div class='ctx'> module_exit(michael_mic_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/crypto/nhpoly1305.c b/crypto/nhpoly1305.c<br/>index a661d4f667cd..2b648615b5ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/nhpoly1305.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/nhpoly1305.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/nhpoly1305.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/nhpoly1305.c</a></div><div class='hunk'>@@ -245,7 +245,7 @@ static void __exit nhpoly1305_mod_exit(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;nhpoly1305_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(nhpoly1305_mod_init);</div><div class='add'>+module_init(nhpoly1305_mod_init);</div><div class='ctx'> module_exit(nhpoly1305_mod_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("NHPoly1305 ε-almost-∆-universal hash function");</div><div class='head'>diff --git a/crypto/pcbc.c b/crypto/pcbc.c<br/>index 9d2e56d6744a..d092717ea4fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/pcbc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/pcbc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/pcbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/pcbc.c</a></div><div class='hunk'>@@ -186,7 +186,7 @@ static void __exit crypto_pcbc_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_pcbc_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_pcbc_module_init);</div><div class='add'>+module_init(crypto_pcbc_module_init);</div><div class='ctx'> module_exit(crypto_pcbc_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/pcrypt.c b/crypto/pcrypt.c<br/>index 7fc79e7dce44..c33d29a523e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/pcrypt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/pcrypt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/pcrypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/pcrypt.c</a></div><div class='hunk'>@@ -381,7 +381,7 @@ static void __exit pcrypt_exit(void)</div><div class='ctx'> 	kset_unregister(pcrypt_kset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(pcrypt_init);</div><div class='add'>+module_init(pcrypt_init);</div><div class='ctx'> module_exit(pcrypt_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/poly1305_generic.c b/crypto/poly1305_generic.c<br/>deleted file mode 100644<br/>index e6f29a98725a..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/crypto/poly1305_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/poly1305_generic.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,149 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Poly1305 authenticator algorithm, RFC7539</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2015 Martin Willi</div><div class='del'>- *</div><div class='del'>- * Based on public domain code by Andrew Moon and Daniel J. Bernstein.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/poly1305.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_init(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	poly1305_core_init(&amp;dctx-&gt;h);</div><div class='del'>-	dctx-&gt;buflen = 0;</div><div class='del'>-	dctx-&gt;rset = 0;</div><div class='del'>-	dctx-&gt;sset = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int crypto_poly1305_setdesckey(struct poly1305_desc_ctx *dctx,</div><div class='del'>-					       const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	if (!dctx-&gt;sset) {</div><div class='del'>-		if (!dctx-&gt;rset &amp;&amp; srclen &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_core_setkey(&amp;dctx-&gt;core_r, src);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			srclen -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;rset = 2;</div><div class='del'>-		}</div><div class='del'>-		if (srclen &gt;= POLY1305_BLOCK_SIZE) {</div><div class='del'>-			dctx-&gt;s[0] = get_unaligned_le32(src +  0);</div><div class='del'>-			dctx-&gt;s[1] = get_unaligned_le32(src +  4);</div><div class='del'>-			dctx-&gt;s[2] = get_unaligned_le32(src +  8);</div><div class='del'>-			dctx-&gt;s[3] = get_unaligned_le32(src + 12);</div><div class='del'>-			src += POLY1305_BLOCK_SIZE;</div><div class='del'>-			srclen -= POLY1305_BLOCK_SIZE;</div><div class='del'>-			dctx-&gt;sset = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return srclen;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void poly1305_blocks(struct poly1305_desc_ctx *dctx, const u8 *src,</div><div class='del'>-			    unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	unsigned int datalen;</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset)) {</div><div class='del'>-		datalen = crypto_poly1305_setdesckey(dctx, src, srclen);</div><div class='del'>-		src += srclen - datalen;</div><div class='del'>-		srclen = datalen;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	poly1305_core_blocks(&amp;dctx-&gt;h, &amp;dctx-&gt;core_r, src,</div><div class='del'>-			     srclen / POLY1305_BLOCK_SIZE, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_update(struct shash_desc *desc,</div><div class='del'>-				  const u8 *src, unsigned int srclen)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int bytes;</div><div class='del'>-</div><div class='del'>-	if (unlikely(dctx-&gt;buflen)) {</div><div class='del'>-		bytes = min(srclen, POLY1305_BLOCK_SIZE - dctx-&gt;buflen);</div><div class='del'>-		memcpy(dctx-&gt;buf + dctx-&gt;buflen, src, bytes);</div><div class='del'>-		src += bytes;</div><div class='del'>-		srclen -= bytes;</div><div class='del'>-		dctx-&gt;buflen += bytes;</div><div class='del'>-</div><div class='del'>-		if (dctx-&gt;buflen == POLY1305_BLOCK_SIZE) {</div><div class='del'>-			poly1305_blocks(dctx, dctx-&gt;buf,</div><div class='del'>-					POLY1305_BLOCK_SIZE);</div><div class='del'>-			dctx-&gt;buflen = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(srclen &gt;= POLY1305_BLOCK_SIZE)) {</div><div class='del'>-		poly1305_blocks(dctx, src, srclen);</div><div class='del'>-		src += srclen - (srclen % POLY1305_BLOCK_SIZE);</div><div class='del'>-		srclen %= POLY1305_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(srclen)) {</div><div class='del'>-		dctx-&gt;buflen = srclen;</div><div class='del'>-		memcpy(dctx-&gt;buf, src, srclen);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_poly1305_final(struct shash_desc *desc, u8 *dst)</div><div class='del'>-{</div><div class='del'>-	struct poly1305_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (unlikely(!dctx-&gt;sset))</div><div class='del'>-		return -ENOKEY;</div><div class='del'>-</div><div class='del'>-	poly1305_final_generic(dctx, dst);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct shash_alg poly1305_alg = {</div><div class='del'>-	.digestsize	= POLY1305_DIGEST_SIZE,</div><div class='del'>-	.init		= crypto_poly1305_init,</div><div class='del'>-	.update		= crypto_poly1305_update,</div><div class='del'>-	.final		= crypto_poly1305_final,</div><div class='del'>-	.descsize	= sizeof(struct poly1305_desc_ctx),</div><div class='del'>-	.base		= {</div><div class='del'>-		.cra_name		= "poly1305",</div><div class='del'>-		.cra_driver_name	= "poly1305-generic",</div><div class='del'>-		.cra_priority		= 100,</div><div class='del'>-		.cra_blocksize		= POLY1305_BLOCK_SIZE,</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init poly1305_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shash(&amp;poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit poly1305_mod_exit(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shash(&amp;poly1305_alg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(poly1305_mod_init);</div><div class='del'>-module_exit(poly1305_mod_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Martin Willi &lt;martin@strongswan.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Poly1305 authenticator");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305");</div><div class='del'>-MODULE_ALIAS_CRYPTO("poly1305-generic");</div><div class='head'>diff --git a/crypto/polyval-generic.c b/crypto/polyval-generic.c<br/>index 4f98910bcdb5..db8adb56e4ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/polyval-generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/polyval-generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/polyval-generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/polyval-generic.c</a></div><div class='hunk'>@@ -44,15 +44,15 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/gf128mul.h&gt;</div><div class='del'>-#include &lt;crypto/polyval.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;crypto/polyval.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct polyval_tfm_ctx {</div><div class='ctx'> 	struct gf128mul_4k *gf128;</div><div class='hunk'>@@ -63,7 +63,6 @@ struct polyval_desc_ctx {</div><div class='ctx'> 		u8 buffer[POLYVAL_BLOCK_SIZE];</div><div class='ctx'> 		be128 buffer128;</div><div class='ctx'> 	};</div><div class='del'>-	u32 bytes;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void copy_and_reverse(u8 dst[POLYVAL_BLOCK_SIZE],</div><div class='hunk'>@@ -76,46 +75,6 @@ static void copy_and_reverse(u8 dst[POLYVAL_BLOCK_SIZE],</div><div class='ctx'> 	put_unaligned(swab64(b), (u64 *)&amp;dst[0]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Performs multiplication in the POLYVAL field using the GHASH field as a</div><div class='del'>- * subroutine.  This function is used as a fallback for hardware accelerated</div><div class='del'>- * implementations when simd registers are unavailable.</div><div class='del'>- *</div><div class='del'>- * Note: This function is not used for polyval-generic, instead we use the 4k</div><div class='del'>- * lookup table implementation for finite field multiplication.</div><div class='del'>- */</div><div class='del'>-void polyval_mul_non4k(u8 *op1, const u8 *op2)</div><div class='del'>-{</div><div class='del'>-	be128 a, b;</div><div class='del'>-</div><div class='del'>-	// Assume one argument is in Montgomery form and one is not.</div><div class='del'>-	copy_and_reverse((u8 *)&amp;a, op1);</div><div class='del'>-	copy_and_reverse((u8 *)&amp;b, op2);</div><div class='del'>-	gf128mul_x_lle(&amp;a, &amp;a);</div><div class='del'>-	gf128mul_lle(&amp;a, &amp;b);</div><div class='del'>-	copy_and_reverse(op1, (u8 *)&amp;a);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(polyval_mul_non4k);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Perform a POLYVAL update using non4k multiplication.  This function is used</div><div class='del'>- * as a fallback for hardware accelerated implementations when simd registers</div><div class='del'>- * are unavailable.</div><div class='del'>- *</div><div class='del'>- * Note: This function is not used for polyval-generic, instead we use the 4k</div><div class='del'>- * lookup table implementation of finite field multiplication.</div><div class='del'>- */</div><div class='del'>-void polyval_update_non4k(const u8 *key, const u8 *in,</div><div class='del'>-			  size_t nblocks, u8 *accumulator)</div><div class='del'>-{</div><div class='del'>-	while (nblocks--) {</div><div class='del'>-		crypto_xor(accumulator, in, POLYVAL_BLOCK_SIZE);</div><div class='del'>-		polyval_mul_non4k(accumulator, key);</div><div class='del'>-		in += POLYVAL_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(polyval_update_non4k);</div><div class='del'>-</div><div class='ctx'> static int polyval_setkey(struct crypto_shash *tfm,</div><div class='ctx'> 			  const u8 *key, unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -154,56 +113,53 @@ static int polyval_update(struct shash_desc *desc,</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	const struct polyval_tfm_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='del'>-	u8 *pos;</div><div class='ctx'> 	u8 tmp[POLYVAL_BLOCK_SIZE];</div><div class='del'>-	int n;</div><div class='del'>-</div><div class='del'>-	if (dctx-&gt;bytes) {</div><div class='del'>-		n = min(srclen, dctx-&gt;bytes);</div><div class='del'>-		pos = dctx-&gt;buffer + dctx-&gt;bytes - 1;</div><div class='del'>-</div><div class='del'>-		dctx-&gt;bytes -= n;</div><div class='del'>-		srclen -= n;</div><div class='del'>-</div><div class='del'>-		while (n--)</div><div class='del'>-			*pos-- ^= *src++;</div><div class='ctx'> </div><div class='del'>-		if (!dctx-&gt;bytes)</div><div class='del'>-			gf128mul_4k_lle(&amp;dctx-&gt;buffer128, ctx-&gt;gf128);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (srclen &gt;= POLYVAL_BLOCK_SIZE) {</div><div class='add'>+	do {</div><div class='ctx'> 		copy_and_reverse(tmp, src);</div><div class='ctx'> 		crypto_xor(dctx-&gt;buffer, tmp, POLYVAL_BLOCK_SIZE);</div><div class='ctx'> 		gf128mul_4k_lle(&amp;dctx-&gt;buffer128, ctx-&gt;gf128);</div><div class='ctx'> 		src += POLYVAL_BLOCK_SIZE;</div><div class='ctx'> 		srclen -= POLYVAL_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='add'>+	} while (srclen &gt;= POLYVAL_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	return srclen;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (srclen) {</div><div class='del'>-		dctx-&gt;bytes = POLYVAL_BLOCK_SIZE - srclen;</div><div class='del'>-		pos = dctx-&gt;buffer + POLYVAL_BLOCK_SIZE - 1;</div><div class='del'>-		while (srclen--)</div><div class='del'>-			*pos-- ^= *src++;</div><div class='add'>+static int polyval_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			 unsigned int len, u8 *dst)</div><div class='add'>+{</div><div class='add'>+	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='add'>+</div><div class='add'>+	if (len) {</div><div class='add'>+		u8 tmp[POLYVAL_BLOCK_SIZE] = {};</div><div class='add'>+</div><div class='add'>+		memcpy(tmp, src, len);</div><div class='add'>+		polyval_update(desc, tmp, POLYVAL_BLOCK_SIZE);</div><div class='ctx'> 	}</div><div class='add'>+	copy_and_reverse(dst, dctx-&gt;buffer);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int polyval_export(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='add'>+	copy_and_reverse(out, dctx-&gt;buffer);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int polyval_final(struct shash_desc *desc, u8 *dst)</div><div class='add'>+static int polyval_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='ctx'> 	struct polyval_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-	const struct polyval_tfm_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> </div><div class='del'>-	if (dctx-&gt;bytes)</div><div class='del'>-		gf128mul_4k_lle(&amp;dctx-&gt;buffer128, ctx-&gt;gf128);</div><div class='del'>-	copy_and_reverse(dst, dctx-&gt;buffer);</div><div class='add'>+	copy_and_reverse(dctx-&gt;buffer, in);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void polyval_exit_tfm(struct crypto_tfm *tfm)</div><div class='add'>+static void polyval_exit_tfm(struct crypto_shash *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct polyval_tfm_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct polyval_tfm_ctx *ctx = crypto_shash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	gf128mul_free_4k(ctx-&gt;gf128);</div><div class='ctx'> }</div><div class='hunk'>@@ -212,17 +168,21 @@ static struct shash_alg polyval_alg = {</div><div class='ctx'> 	.digestsize	= POLYVAL_DIGEST_SIZE,</div><div class='ctx'> 	.init		= polyval_init,</div><div class='ctx'> 	.update		= polyval_update,</div><div class='del'>-	.final		= polyval_final,</div><div class='add'>+	.finup		= polyval_finup,</div><div class='ctx'> 	.setkey		= polyval_setkey,</div><div class='add'>+	.export		= polyval_export,</div><div class='add'>+	.import		= polyval_import,</div><div class='add'>+	.exit_tfm	= polyval_exit_tfm,</div><div class='add'>+	.statesize	= sizeof(struct polyval_desc_ctx),</div><div class='ctx'> 	.descsize	= sizeof(struct polyval_desc_ctx),</div><div class='ctx'> 	.base		= {</div><div class='ctx'> 		.cra_name		= "polyval",</div><div class='ctx'> 		.cra_driver_name	= "polyval-generic",</div><div class='ctx'> 		.cra_priority		= 100,</div><div class='add'>+		.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize		= POLYVAL_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct polyval_tfm_ctx),</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='del'>-		.cra_exit		= polyval_exit_tfm,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -236,7 +196,7 @@ static void __exit polyval_mod_exit(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;polyval_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(polyval_mod_init);</div><div class='add'>+module_init(polyval_mod_init);</div><div class='ctx'> module_exit(polyval_mod_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/rmd160.c b/crypto/rmd160.c<br/>index c5fe4034b153..9860b60c9be4 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/rmd160.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rmd160.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/rmd160.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/rmd160.c</a></div><div class='hunk'>@@ -9,18 +9,14 @@</div><div class='ctx'>  * Copyright (c) 2008 Adrian-Ken Rueegsegger &lt;ken@codelabs.ch&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include "ripemd.h"</div><div class='ctx'> </div><div class='ctx'> struct rmd160_ctx {</div><div class='ctx'> 	u64 byte_count;</div><div class='ctx'> 	u32 state[5];</div><div class='del'>-	__le32 buffer[16];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define K1  RMD_K1</div><div class='hunk'>@@ -265,72 +261,59 @@ static int rmd160_init(struct shash_desc *desc)</div><div class='ctx'> 	rctx-&gt;state[3] = RMD_H3;</div><div class='ctx'> 	rctx-&gt;state[4] = RMD_H4;</div><div class='ctx'> </div><div class='del'>-	memset(rctx-&gt;buffer, 0, sizeof(rctx-&gt;buffer));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rmd160_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			 unsigned int len)</div><div class='ctx'> {</div><div class='add'>+	int remain = len - round_down(len, RMD160_BLOCK_SIZE);</div><div class='ctx'> 	struct rmd160_ctx *rctx = shash_desc_ctx(desc);</div><div class='del'>-	const u32 avail = sizeof(rctx-&gt;buffer) - (rctx-&gt;byte_count &amp; 0x3f);</div><div class='del'>-</div><div class='del'>-	rctx-&gt;byte_count += len;</div><div class='add'>+	__le32 buffer[RMD160_BLOCK_SIZE / 4];</div><div class='ctx'> </div><div class='del'>-	/* Enough space in buffer? If so copy and we're done */</div><div class='del'>-	if (avail &gt; len) {</div><div class='del'>-		memcpy((char *)rctx-&gt;buffer + (sizeof(rctx-&gt;buffer) - avail),</div><div class='del'>-		       data, len);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy((char *)rctx-&gt;buffer + (sizeof(rctx-&gt;buffer) - avail),</div><div class='del'>-	       data, avail);</div><div class='add'>+	rctx-&gt;byte_count += len - remain;</div><div class='ctx'> </div><div class='del'>-	rmd160_transform(rctx-&gt;state, rctx-&gt;buffer);</div><div class='del'>-	data += avail;</div><div class='del'>-	len -= avail;</div><div class='del'>-</div><div class='del'>-	while (len &gt;= sizeof(rctx-&gt;buffer)) {</div><div class='del'>-		memcpy(rctx-&gt;buffer, data, sizeof(rctx-&gt;buffer));</div><div class='del'>-		rmd160_transform(rctx-&gt;state, rctx-&gt;buffer);</div><div class='del'>-		data += sizeof(rctx-&gt;buffer);</div><div class='del'>-		len -= sizeof(rctx-&gt;buffer);</div><div class='del'>-	}</div><div class='add'>+	do {</div><div class='add'>+		memcpy(buffer, data, sizeof(buffer));</div><div class='add'>+		rmd160_transform(rctx-&gt;state, buffer);</div><div class='add'>+		data += sizeof(buffer);</div><div class='add'>+		len -= sizeof(buffer);</div><div class='add'>+	} while (len &gt;= sizeof(buffer));</div><div class='ctx'> </div><div class='del'>-	memcpy(rctx-&gt;buffer, data, len);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return 0;</div><div class='add'>+	memzero_explicit(buffer, sizeof(buffer));</div><div class='add'>+	return remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Add padding and return the message digest. */</div><div class='del'>-static int rmd160_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int rmd160_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='add'>+	unsigned int bit_offset = RMD160_BLOCK_SIZE / 8 - 1;</div><div class='ctx'> 	struct rmd160_ctx *rctx = shash_desc_ctx(desc);</div><div class='del'>-	u32 i, index, padlen;</div><div class='del'>-	__le64 bits;</div><div class='add'>+	union {</div><div class='add'>+		__le64 l64[RMD160_BLOCK_SIZE / 4];</div><div class='add'>+		__le32 l32[RMD160_BLOCK_SIZE / 2];</div><div class='add'>+		u8 u8[RMD160_BLOCK_SIZE * 2];</div><div class='add'>+	} block = {};</div><div class='ctx'> 	__le32 *dst = (__le32 *)out;</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_le64(rctx-&gt;byte_count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 */</div><div class='del'>-	index = rctx-&gt;byte_count &amp; 0x3f;</div><div class='del'>-	padlen = (index &lt; 56) ? (56 - index) : ((64+56) - index);</div><div class='del'>-	rmd160_update(desc, padding, padlen);</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='del'>-	/* Append length */</div><div class='del'>-	rmd160_update(desc, (const u8 *)&amp;bits, sizeof(bits));</div><div class='add'>+	rctx-&gt;byte_count += len;</div><div class='add'>+	if (len &gt;= bit_offset * 8)</div><div class='add'>+		bit_offset += RMD160_BLOCK_SIZE / 8;</div><div class='add'>+	memcpy(&amp;block, src, len);</div><div class='add'>+	block.u8[len] = 0x80;</div><div class='add'>+	block.l64[bit_offset] = cpu_to_le64(rctx-&gt;byte_count &lt;&lt; 3);</div><div class='add'>+</div><div class='add'>+	rmd160_transform(rctx-&gt;state, block.l32);</div><div class='add'>+	if (bit_offset &gt; RMD160_BLOCK_SIZE / 8)</div><div class='add'>+		rmd160_transform(rctx-&gt;state,</div><div class='add'>+				 block.l32 + RMD160_BLOCK_SIZE / 4);</div><div class='add'>+	memzero_explicit(&amp;block, sizeof(block));</div><div class='ctx'> </div><div class='ctx'> 	/* Store state in digest */</div><div class='ctx'> 	for (i = 0; i &lt; 5; i++)</div><div class='ctx'> 		dst[i] = cpu_to_le32p(&amp;rctx-&gt;state[i]);</div><div class='del'>-</div><div class='del'>-	/* Wipe context */</div><div class='del'>-	memset(rctx, 0, sizeof(*rctx));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -338,11 +321,12 @@ static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	RMD160_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	rmd160_init,</div><div class='ctx'> 	.update		=	rmd160_update,</div><div class='del'>-	.final		=	rmd160_final,</div><div class='add'>+	.finup		=	rmd160_finup,</div><div class='ctx'> 	.descsize	=	sizeof(struct rmd160_ctx),</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"rmd160",</div><div class='ctx'> 		.cra_driver_name =	"rmd160-generic",</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	RMD160_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -358,7 +342,7 @@ static void __exit rmd160_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(rmd160_mod_init);</div><div class='add'>+module_init(rmd160_mod_init);</div><div class='ctx'> module_exit(rmd160_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/rng.c b/crypto/rng.c<br/>index 9d8804e46422..b8ae6ebc091d 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/rng.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/rng.c</a></div><div class='hunk'>@@ -98,6 +98,7 @@ static const struct crypto_type crypto_rng_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_RNG,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_rng, base),</div><div class='add'>+	.algsize = offsetof(struct rng_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_rng *crypto_alloc_rng(const char *alg_name, u32 type, u32 mask)</div><div class='head'>diff --git a/crypto/rsa.c b/crypto/rsa.c<br/>index b7d21529c552..6c7734083c98 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/rsa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rsa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/rsa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/rsa.c</a></div><div class='hunk'>@@ -430,7 +430,7 @@ static void __exit rsa_exit(void)</div><div class='ctx'> 	crypto_unregister_akcipher(&amp;rsa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(rsa_init);</div><div class='add'>+module_init(rsa_init);</div><div class='ctx'> module_exit(rsa_exit);</div><div class='ctx'> MODULE_ALIAS_CRYPTO("rsa");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/rsassa-pkcs1.c b/crypto/rsassa-pkcs1.c<br/>index d01ac75635e0..94fa5e9600e7 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/rsassa-pkcs1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/rsassa-pkcs1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/rsassa-pkcs1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/rsassa-pkcs1.c</a></div><div class='hunk'>@@ -301,7 +301,7 @@ static unsigned int rsassa_pkcs1_key_size(struct crypto_sig *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct rsassa_pkcs1_ctx *ctx = crypto_sig_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	return ctx-&gt;key_size;</div><div class='add'>+	return ctx-&gt;key_size * BITS_PER_BYTE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rsassa_pkcs1_set_pub_key(struct crypto_sig *tfm,</div><div class='head'>diff --git a/crypto/scatterwalk.c b/crypto/scatterwalk.c<br/>index 8225801488d5..1d010e2a1b1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/scatterwalk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/scatterwalk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/scatterwalk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/scatterwalk.c</a></div><div class='hunk'>@@ -10,10 +10,25 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	SKCIPHER_WALK_SLOW = 1 &lt;&lt; 0,</div><div class='add'>+	SKCIPHER_WALK_COPY = 1 &lt;&lt; 1,</div><div class='add'>+	SKCIPHER_WALK_DIFF = 1 &lt;&lt; 2,</div><div class='add'>+	SKCIPHER_WALK_SLEEP = 1 &lt;&lt; 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline gfp_t skcipher_walk_gfp(struct skcipher_walk *walk)</div><div class='add'>+{</div><div class='add'>+	return walk-&gt;flags &amp; SKCIPHER_WALK_SLEEP ? GFP_KERNEL : GFP_ATOMIC;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> void scatterwalk_skip(struct scatter_walk *walk, unsigned int nbytes)</div><div class='ctx'> {</div><div class='hunk'>@@ -89,27 +104,23 @@ EXPORT_SYMBOL_GPL(memcpy_to_sglist);</div><div class='ctx'> void memcpy_sglist(struct scatterlist *dst, struct scatterlist *src,</div><div class='ctx'> 		   unsigned int nbytes)</div><div class='ctx'> {</div><div class='del'>-	struct scatter_walk swalk;</div><div class='del'>-	struct scatter_walk dwalk;</div><div class='add'>+	struct skcipher_walk walk = {};</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(nbytes == 0)) /* in case sg == NULL */</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	scatterwalk_start(&amp;swalk, src);</div><div class='del'>-	scatterwalk_start(&amp;dwalk, dst);</div><div class='add'>+	walk.total = nbytes;</div><div class='add'>+</div><div class='add'>+	scatterwalk_start(&amp;walk.in, src);</div><div class='add'>+	scatterwalk_start(&amp;walk.out, dst);</div><div class='ctx'> </div><div class='add'>+	skcipher_walk_first(&amp;walk, true);</div><div class='ctx'> 	do {</div><div class='del'>-		unsigned int slen, dlen;</div><div class='del'>-		unsigned int len;</div><div class='del'>-</div><div class='del'>-		slen = scatterwalk_next(&amp;swalk, nbytes);</div><div class='del'>-		dlen = scatterwalk_next(&amp;dwalk, nbytes);</div><div class='del'>-		len = min(slen, dlen);</div><div class='del'>-		memcpy(dwalk.addr, swalk.addr, len);</div><div class='del'>-		scatterwalk_done_dst(&amp;dwalk, len);</div><div class='del'>-		scatterwalk_done_src(&amp;swalk, len);</div><div class='del'>-		nbytes -= len;</div><div class='del'>-	} while (nbytes);</div><div class='add'>+		if (walk.src.virt.addr != walk.dst.virt.addr)</div><div class='add'>+			memcpy(walk.dst.virt.addr, walk.src.virt.addr,</div><div class='add'>+			       walk.nbytes);</div><div class='add'>+		skcipher_walk_done(&amp;walk, 0);</div><div class='add'>+	} while (walk.nbytes);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(memcpy_sglist);</div><div class='ctx'> </div><div class='hunk'>@@ -135,3 +146,236 @@ struct scatterlist *scatterwalk_ffwd(struct scatterlist dst[2],</div><div class='ctx'> 	return dst;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(scatterwalk_ffwd);</div><div class='add'>+</div><div class='add'>+static int skcipher_next_slow(struct skcipher_walk *walk, unsigned int bsize)</div><div class='add'>+{</div><div class='add'>+	unsigned alignmask = walk-&gt;alignmask;</div><div class='add'>+	unsigned n;</div><div class='add'>+	void *buffer;</div><div class='add'>+</div><div class='add'>+	if (!walk-&gt;buffer)</div><div class='add'>+		walk-&gt;buffer = walk-&gt;page;</div><div class='add'>+	buffer = walk-&gt;buffer;</div><div class='add'>+	if (!buffer) {</div><div class='add'>+		/* Min size for a buffer of bsize bytes aligned to alignmask */</div><div class='add'>+		n = bsize + (alignmask &amp; ~(crypto_tfm_ctx_alignment() - 1));</div><div class='add'>+</div><div class='add'>+		buffer = kzalloc(n, skcipher_walk_gfp(walk));</div><div class='add'>+		if (!buffer)</div><div class='add'>+			return skcipher_walk_done(walk, -ENOMEM);</div><div class='add'>+		walk-&gt;buffer = buffer;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buffer = PTR_ALIGN(buffer, alignmask + 1);</div><div class='add'>+	memcpy_from_scatterwalk(buffer, &amp;walk-&gt;in, bsize);</div><div class='add'>+	walk-&gt;out.__addr = buffer;</div><div class='add'>+	walk-&gt;in.__addr = walk-&gt;out.addr;</div><div class='add'>+</div><div class='add'>+	walk-&gt;nbytes = bsize;</div><div class='add'>+	walk-&gt;flags |= SKCIPHER_WALK_SLOW;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int skcipher_next_copy(struct skcipher_walk *walk)</div><div class='add'>+{</div><div class='add'>+	void *tmp = walk-&gt;page;</div><div class='add'>+</div><div class='add'>+	scatterwalk_map(&amp;walk-&gt;in);</div><div class='add'>+	memcpy(tmp, walk-&gt;in.addr, walk-&gt;nbytes);</div><div class='add'>+	scatterwalk_unmap(&amp;walk-&gt;in);</div><div class='add'>+	/*</div><div class='add'>+	 * walk-&gt;in is advanced later when the number of bytes actually</div><div class='add'>+	 * processed (which might be less than walk-&gt;nbytes) is known.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	walk-&gt;in.__addr = tmp;</div><div class='add'>+	walk-&gt;out.__addr = tmp;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int skcipher_next_fast(struct skcipher_walk *walk)</div><div class='add'>+{</div><div class='add'>+	unsigned long diff;</div><div class='add'>+</div><div class='add'>+	diff = offset_in_page(walk-&gt;in.offset) -</div><div class='add'>+	       offset_in_page(walk-&gt;out.offset);</div><div class='add'>+	diff |= (u8 *)(sg_page(walk-&gt;in.sg) + (walk-&gt;in.offset &gt;&gt; PAGE_SHIFT)) -</div><div class='add'>+		(u8 *)(sg_page(walk-&gt;out.sg) + (walk-&gt;out.offset &gt;&gt; PAGE_SHIFT));</div><div class='add'>+</div><div class='add'>+	scatterwalk_map(&amp;walk-&gt;out);</div><div class='add'>+	walk-&gt;in.__addr = walk-&gt;out.__addr;</div><div class='add'>+</div><div class='add'>+	if (diff) {</div><div class='add'>+		walk-&gt;flags |= SKCIPHER_WALK_DIFF;</div><div class='add'>+		scatterwalk_map(&amp;walk-&gt;in);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int skcipher_walk_next(struct skcipher_walk *walk)</div><div class='add'>+{</div><div class='add'>+	unsigned int bsize;</div><div class='add'>+	unsigned int n;</div><div class='add'>+</div><div class='add'>+	n = walk-&gt;total;</div><div class='add'>+	bsize = min(walk-&gt;stride, max(n, walk-&gt;blocksize));</div><div class='add'>+	n = scatterwalk_clamp(&amp;walk-&gt;in, n);</div><div class='add'>+	n = scatterwalk_clamp(&amp;walk-&gt;out, n);</div><div class='add'>+</div><div class='add'>+	if (unlikely(n &lt; bsize)) {</div><div class='add'>+		if (unlikely(walk-&gt;total &lt; walk-&gt;blocksize))</div><div class='add'>+			return skcipher_walk_done(walk, -EINVAL);</div><div class='add'>+</div><div class='add'>+slow_path:</div><div class='add'>+		return skcipher_next_slow(walk, bsize);</div><div class='add'>+	}</div><div class='add'>+	walk-&gt;nbytes = n;</div><div class='add'>+</div><div class='add'>+	if (unlikely((walk-&gt;in.offset | walk-&gt;out.offset) &amp; walk-&gt;alignmask)) {</div><div class='add'>+		if (!walk-&gt;page) {</div><div class='add'>+			gfp_t gfp = skcipher_walk_gfp(walk);</div><div class='add'>+</div><div class='add'>+			walk-&gt;page = (void *)__get_free_page(gfp);</div><div class='add'>+			if (!walk-&gt;page)</div><div class='add'>+				goto slow_path;</div><div class='add'>+		}</div><div class='add'>+		walk-&gt;flags |= SKCIPHER_WALK_COPY;</div><div class='add'>+		return skcipher_next_copy(walk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return skcipher_next_fast(walk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int skcipher_copy_iv(struct skcipher_walk *walk)</div><div class='add'>+{</div><div class='add'>+	unsigned alignmask = walk-&gt;alignmask;</div><div class='add'>+	unsigned ivsize = walk-&gt;ivsize;</div><div class='add'>+	unsigned aligned_stride = ALIGN(walk-&gt;stride, alignmask + 1);</div><div class='add'>+	unsigned size;</div><div class='add'>+	u8 *iv;</div><div class='add'>+</div><div class='add'>+	/* Min size for a buffer of stride + ivsize, aligned to alignmask */</div><div class='add'>+	size = aligned_stride + ivsize +</div><div class='add'>+	       (alignmask &amp; ~(crypto_tfm_ctx_alignment() - 1));</div><div class='add'>+</div><div class='add'>+	walk-&gt;buffer = kmalloc(size, skcipher_walk_gfp(walk));</div><div class='add'>+	if (!walk-&gt;buffer)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	iv = PTR_ALIGN(walk-&gt;buffer, alignmask + 1) + aligned_stride;</div><div class='add'>+</div><div class='add'>+	walk-&gt;iv = memcpy(iv, walk-&gt;iv, walk-&gt;ivsize);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int skcipher_walk_first(struct skcipher_walk *walk, bool atomic)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON_ONCE(in_hardirq()))</div><div class='add'>+		return -EDEADLK;</div><div class='add'>+</div><div class='add'>+	walk-&gt;flags = atomic ? 0 : SKCIPHER_WALK_SLEEP;</div><div class='add'>+</div><div class='add'>+	walk-&gt;buffer = NULL;</div><div class='add'>+	if (unlikely(((unsigned long)walk-&gt;iv &amp; walk-&gt;alignmask))) {</div><div class='add'>+		int err = skcipher_copy_iv(walk);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	walk-&gt;page = NULL;</div><div class='add'>+</div><div class='add'>+	return skcipher_walk_next(walk);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(skcipher_walk_first);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * skcipher_walk_done() - finish one step of a skcipher_walk</div><div class='add'>+ * @walk: the skcipher_walk</div><div class='add'>+ * @res: number of bytes *not* processed (&gt;= 0) from walk-&gt;nbytes,</div><div class='add'>+ *	 or a -errno value to terminate the walk due to an error</div><div class='add'>+ *</div><div class='add'>+ * This function cleans up after one step of walking through the source and</div><div class='add'>+ * destination scatterlists, and advances to the next step if applicable.</div><div class='add'>+ * walk-&gt;nbytes is set to the number of bytes available in the next step,</div><div class='add'>+ * walk-&gt;total is set to the new total number of bytes remaining, and</div><div class='add'>+ * walk-&gt;{src,dst}.virt.addr is set to the next pair of data pointers.  If there</div><div class='add'>+ * is no more data, or if an error occurred (i.e. -errno return), then</div><div class='add'>+ * walk-&gt;nbytes and walk-&gt;total are set to 0 and all resources owned by the</div><div class='add'>+ * skcipher_walk are freed.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or a -errno value.  If @res was a -errno value then it will be</div><div class='add'>+ *	   returned, but other errors may occur too.</div><div class='add'>+ */</div><div class='add'>+int skcipher_walk_done(struct skcipher_walk *walk, int res)</div><div class='add'>+{</div><div class='add'>+	unsigned int n = walk-&gt;nbytes; /* num bytes processed this step */</div><div class='add'>+	unsigned int total = 0; /* new total remaining */</div><div class='add'>+</div><div class='add'>+	if (!n)</div><div class='add'>+		goto finish;</div><div class='add'>+</div><div class='add'>+	if (likely(res &gt;= 0)) {</div><div class='add'>+		n -= res; /* subtract num bytes *not* processed */</div><div class='add'>+		total = walk-&gt;total - n;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(!(walk-&gt;flags &amp; (SKCIPHER_WALK_SLOW |</div><div class='add'>+				    SKCIPHER_WALK_COPY |</div><div class='add'>+				    SKCIPHER_WALK_DIFF)))) {</div><div class='add'>+		scatterwalk_advance(&amp;walk-&gt;in, n);</div><div class='add'>+	} else if (walk-&gt;flags &amp; SKCIPHER_WALK_DIFF) {</div><div class='add'>+		scatterwalk_done_src(&amp;walk-&gt;in, n);</div><div class='add'>+	} else if (walk-&gt;flags &amp; SKCIPHER_WALK_COPY) {</div><div class='add'>+		scatterwalk_advance(&amp;walk-&gt;in, n);</div><div class='add'>+		scatterwalk_map(&amp;walk-&gt;out);</div><div class='add'>+		memcpy(walk-&gt;out.addr, walk-&gt;page, n);</div><div class='add'>+	} else { /* SKCIPHER_WALK_SLOW */</div><div class='add'>+		if (res &gt; 0) {</div><div class='add'>+			/*</div><div class='add'>+			 * Didn't process all bytes.  Either the algorithm is</div><div class='add'>+			 * broken, or this was the last step and it turned out</div><div class='add'>+			 * the message wasn't evenly divisible into blocks but</div><div class='add'>+			 * the algorithm requires it.</div><div class='add'>+			 */</div><div class='add'>+			res = -EINVAL;</div><div class='add'>+			total = 0;</div><div class='add'>+		} else</div><div class='add'>+			memcpy_to_scatterwalk(&amp;walk-&gt;out, walk-&gt;out.addr, n);</div><div class='add'>+		goto dst_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scatterwalk_done_dst(&amp;walk-&gt;out, n);</div><div class='add'>+dst_done:</div><div class='add'>+</div><div class='add'>+	if (res &gt; 0)</div><div class='add'>+		res = 0;</div><div class='add'>+</div><div class='add'>+	walk-&gt;total = total;</div><div class='add'>+	walk-&gt;nbytes = 0;</div><div class='add'>+</div><div class='add'>+	if (total) {</div><div class='add'>+		if (walk-&gt;flags &amp; SKCIPHER_WALK_SLEEP)</div><div class='add'>+			cond_resched();</div><div class='add'>+		walk-&gt;flags &amp;= ~(SKCIPHER_WALK_SLOW | SKCIPHER_WALK_COPY |</div><div class='add'>+				 SKCIPHER_WALK_DIFF);</div><div class='add'>+		return skcipher_walk_next(walk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+finish:</div><div class='add'>+	/* Short-circuit for the common/fast path. */</div><div class='add'>+	if (!((unsigned long)walk-&gt;buffer | (unsigned long)walk-&gt;page))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (walk-&gt;iv != walk-&gt;oiv)</div><div class='add'>+		memcpy(walk-&gt;oiv, walk-&gt;iv, walk-&gt;ivsize);</div><div class='add'>+	if (walk-&gt;buffer != walk-&gt;page)</div><div class='add'>+		kfree(walk-&gt;buffer);</div><div class='add'>+	if (walk-&gt;page)</div><div class='add'>+		free_page((unsigned long)walk-&gt;page);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(skcipher_walk_done);</div><div class='head'>diff --git a/crypto/scompress.c b/crypto/scompress.c<br/>index d435d4b24469..c651e7f2197a 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/scompress.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/scompress.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/scompress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/scompress.c</a></div><div class='hunk'>@@ -7,9 +7,9 @@</div><div class='ctx'>  * Author: Giovanni Cabiddu &lt;giovanni.cabiddu@intel.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/internal/acompress.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/scompress.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;linux/cryptouser.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/highmem.h&gt;</div><div class='hunk'>@@ -20,20 +20,17 @@</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "compress.h"</div><div class='ctx'> </div><div class='del'>-#define SCOMP_SCRATCH_SIZE 65400</div><div class='del'>-</div><div class='ctx'> struct scomp_scratch {</div><div class='ctx'> 	spinlock_t	lock;</div><div class='ctx'> 	union {</div><div class='ctx'> 		void	*src;</div><div class='ctx'> 		unsigned long saddr;</div><div class='ctx'> 	};</div><div class='del'>-	void		*dst;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static DEFINE_PER_CPU(struct scomp_scratch, scomp_scratch) = {</div><div class='hunk'>@@ -44,6 +41,10 @@ static const struct crypto_type crypto_scomp_type;</div><div class='ctx'> static int scomp_scratch_users;</div><div class='ctx'> static DEFINE_MUTEX(scomp_lock);</div><div class='ctx'> </div><div class='add'>+static cpumask_t scomp_scratch_want;</div><div class='add'>+static void scomp_scratch_workfn(struct work_struct *work);</div><div class='add'>+static DECLARE_WORK(scomp_scratch_work, scomp_scratch_workfn);</div><div class='add'>+</div><div class='ctx'> static int __maybe_unused crypto_scomp_report(</div><div class='ctx'> 	struct sk_buff *skb, struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='hunk'>@@ -74,78 +75,48 @@ static void crypto_scomp_free_scratches(void)</div><div class='ctx'> 		scratch = per_cpu_ptr(&amp;scomp_scratch, i);</div><div class='ctx'> </div><div class='ctx'> 		free_page(scratch-&gt;saddr);</div><div class='del'>-		vfree(scratch-&gt;dst);</div><div class='ctx'> 		scratch-&gt;src = NULL;</div><div class='del'>-		scratch-&gt;dst = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_scomp_alloc_scratches(void)</div><div class='add'>+static int scomp_alloc_scratch(struct scomp_scratch *scratch, int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct scomp_scratch *scratch;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		struct page *page;</div><div class='del'>-		void *mem;</div><div class='del'>-</div><div class='del'>-		scratch = per_cpu_ptr(&amp;scomp_scratch, i);</div><div class='add'>+	int node = cpu_to_node(cpu);</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='del'>-		page = alloc_pages_node(cpu_to_node(i), GFP_KERNEL, 0);</div><div class='del'>-		if (!page)</div><div class='del'>-			goto error;</div><div class='del'>-		scratch-&gt;src = page_address(page);</div><div class='del'>-		mem = vmalloc_node(SCOMP_SCRATCH_SIZE, cpu_to_node(i));</div><div class='del'>-		if (!mem)</div><div class='del'>-			goto error;</div><div class='del'>-		scratch-&gt;dst = mem;</div><div class='del'>-	}</div><div class='add'>+	page = alloc_pages_node(node, GFP_KERNEL, 0);</div><div class='add'>+	if (!page)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	spin_lock_bh(&amp;scratch-&gt;lock);</div><div class='add'>+	scratch-&gt;src = page_address(page);</div><div class='add'>+	spin_unlock_bh(&amp;scratch-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='del'>-error:</div><div class='del'>-	crypto_scomp_free_scratches();</div><div class='del'>-	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void scomp_free_streams(struct scomp_alg *alg)</div><div class='add'>+static void scomp_scratch_workfn(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_acomp_stream __percpu *stream = alg-&gt;stream;</div><div class='del'>-	int i;</div><div class='add'>+	int cpu;</div><div class='ctx'> </div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		struct crypto_acomp_stream *ps = per_cpu_ptr(stream, i);</div><div class='add'>+	for_each_cpu(cpu, &amp;scomp_scratch_want) {</div><div class='add'>+		struct scomp_scratch *scratch;</div><div class='ctx'> </div><div class='del'>-		if (!ps-&gt;ctx)</div><div class='add'>+		scratch = per_cpu_ptr(&amp;scomp_scratch, cpu);</div><div class='add'>+		if (scratch-&gt;src)</div><div class='add'>+			continue;</div><div class='add'>+		if (scomp_alloc_scratch(scratch, cpu))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		alg-&gt;free_ctx(ps-&gt;ctx);</div><div class='add'>+		cpumask_clear_cpu(cpu, &amp;scomp_scratch_want);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	free_percpu(stream);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int scomp_alloc_streams(struct scomp_alg *alg)</div><div class='add'>+static int crypto_scomp_alloc_scratches(void)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_acomp_stream __percpu *stream;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	stream = alloc_percpu(struct crypto_acomp_stream);</div><div class='del'>-	if (!stream)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		struct crypto_acomp_stream *ps = per_cpu_ptr(stream, i);</div><div class='del'>-</div><div class='del'>-		ps-&gt;ctx = alg-&gt;alloc_ctx();</div><div class='del'>-		if (IS_ERR(ps-&gt;ctx)) {</div><div class='del'>-			scomp_free_streams(alg);</div><div class='del'>-			return PTR_ERR(ps-&gt;ctx);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		spin_lock_init(&amp;ps-&gt;lock);</div><div class='del'>-	}</div><div class='add'>+	unsigned int i = cpumask_first(cpu_possible_mask);</div><div class='add'>+	struct scomp_scratch *scratch;</div><div class='ctx'> </div><div class='del'>-	alg-&gt;stream = stream;</div><div class='del'>-	return 0;</div><div class='add'>+	scratch = per_cpu_ptr(&amp;scomp_scratch, i);</div><div class='add'>+	return scomp_alloc_scratch(scratch, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_scomp_init_tfm(struct crypto_tfm *tfm)</div><div class='hunk'>@@ -154,16 +125,13 @@ static int crypto_scomp_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;scomp_lock);</div><div class='del'>-	if (!alg-&gt;stream) {</div><div class='del'>-		ret = scomp_alloc_streams(alg);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto unlock;</div><div class='del'>-	}</div><div class='del'>-	if (!scomp_scratch_users) {</div><div class='add'>+	ret = crypto_acomp_alloc_streams(&amp;alg-&gt;streams);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+	if (!scomp_scratch_users++) {</div><div class='ctx'> 		ret = crypto_scomp_alloc_scratches();</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto unlock;</div><div class='del'>-		scomp_scratch_users++;</div><div class='add'>+			scomp_scratch_users--;</div><div class='ctx'> 	}</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;scomp_lock);</div><div class='hunk'>@@ -171,13 +139,40 @@ unlock:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct scomp_scratch *scomp_lock_scratch(void) __acquires(scratch)</div><div class='add'>+{</div><div class='add'>+	int cpu = raw_smp_processor_id();</div><div class='add'>+	struct scomp_scratch *scratch;</div><div class='add'>+</div><div class='add'>+	scratch = per_cpu_ptr(&amp;scomp_scratch, cpu);</div><div class='add'>+	spin_lock(&amp;scratch-&gt;lock);</div><div class='add'>+	if (likely(scratch-&gt;src))</div><div class='add'>+		return scratch;</div><div class='add'>+	spin_unlock(&amp;scratch-&gt;lock);</div><div class='add'>+</div><div class='add'>+	cpumask_set_cpu(cpu, &amp;scomp_scratch_want);</div><div class='add'>+	schedule_work(&amp;scomp_scratch_work);</div><div class='add'>+</div><div class='add'>+	scratch = per_cpu_ptr(&amp;scomp_scratch, cpumask_first(cpu_possible_mask));</div><div class='add'>+	spin_lock(&amp;scratch-&gt;lock);</div><div class='add'>+	return scratch;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void scomp_unlock_scratch(struct scomp_scratch *scratch)</div><div class='add'>+	__releases(scratch)</div><div class='add'>+{</div><div class='add'>+	spin_unlock(&amp;scratch-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int scomp_acomp_comp_decomp(struct acomp_req *req, int dir)</div><div class='ctx'> {</div><div class='del'>-	struct scomp_scratch *scratch = raw_cpu_ptr(&amp;scomp_scratch);</div><div class='ctx'> 	struct crypto_acomp *tfm = crypto_acomp_reqtfm(req);</div><div class='ctx'> 	struct crypto_scomp **tfm_ctx = acomp_tfm_ctx(tfm);</div><div class='add'>+	bool src_isvirt = acomp_request_src_isvirt(req);</div><div class='add'>+	bool dst_isvirt = acomp_request_dst_isvirt(req);</div><div class='ctx'> 	struct crypto_scomp *scomp = *tfm_ctx;</div><div class='ctx'> 	struct crypto_acomp_stream *stream;</div><div class='add'>+	struct scomp_scratch *scratch;</div><div class='ctx'> 	unsigned int slen = req-&gt;slen;</div><div class='ctx'> 	unsigned int dlen = req-&gt;dlen;</div><div class='ctx'> 	struct page *spage, *dpage;</div><div class='hunk'>@@ -194,15 +189,32 @@ static int scomp_acomp_comp_decomp(struct acomp_req *req, int dir)</div><div class='ctx'> 	if (!req-&gt;dst || !dlen)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (acomp_request_src_isvirt(req))</div><div class='add'>+	if (dst_isvirt)</div><div class='add'>+		dst = req-&gt;dvirt;</div><div class='add'>+	else {</div><div class='add'>+		if (dlen &lt;= req-&gt;dst-&gt;length) {</div><div class='add'>+			dpage = sg_page(req-&gt;dst);</div><div class='add'>+			doff = req-&gt;dst-&gt;offset;</div><div class='add'>+		} else</div><div class='add'>+			return -ENOSYS;</div><div class='add'>+</div><div class='add'>+		dpage = nth_page(dpage, doff / PAGE_SIZE);</div><div class='add'>+		doff = offset_in_page(doff);</div><div class='add'>+</div><div class='add'>+		n = (dlen - 1) / PAGE_SIZE;</div><div class='add'>+		n += (offset_in_page(dlen - 1) + doff) / PAGE_SIZE;</div><div class='add'>+		if (PageHighMem(dpage + n) &amp;&amp;</div><div class='add'>+		    size_add(doff, dlen) &gt; PAGE_SIZE)</div><div class='add'>+			return -ENOSYS;</div><div class='add'>+		dst = kmap_local_page(dpage) + doff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (src_isvirt)</div><div class='ctx'> 		src = req-&gt;svirt;</div><div class='ctx'> 	else {</div><div class='del'>-		src = scratch-&gt;src;</div><div class='add'>+		src = NULL;</div><div class='ctx'> 		do {</div><div class='del'>-			if (acomp_request_src_isfolio(req)) {</div><div class='del'>-				spage = folio_page(req-&gt;sfolio, 0);</div><div class='del'>-				soff = req-&gt;soff;</div><div class='del'>-			} else if (slen &lt;= req-&gt;src-&gt;length) {</div><div class='add'>+			if (slen &lt;= req-&gt;src-&gt;length) {</div><div class='ctx'> 				spage = sg_page(req-&gt;src);</div><div class='ctx'> 				soff = req-&gt;src-&gt;offset;</div><div class='ctx'> 			} else</div><div class='hunk'>@@ -211,8 +223,8 @@ static int scomp_acomp_comp_decomp(struct acomp_req *req, int dir)</div><div class='ctx'> 			spage = nth_page(spage, soff / PAGE_SIZE);</div><div class='ctx'> 			soff = offset_in_page(soff);</div><div class='ctx'> </div><div class='del'>-			n = slen / PAGE_SIZE;</div><div class='del'>-			n += (offset_in_page(slen) + soff - 1) / PAGE_SIZE;</div><div class='add'>+			n = (slen - 1) / PAGE_SIZE;</div><div class='add'>+			n += (offset_in_page(slen - 1) + soff) / PAGE_SIZE;</div><div class='ctx'> 			if (PageHighMem(nth_page(spage, n)) &amp;&amp;</div><div class='ctx'> 			    size_add(soff, slen) &gt; PAGE_SIZE)</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -220,59 +232,37 @@ static int scomp_acomp_comp_decomp(struct acomp_req *req, int dir)</div><div class='ctx'> 		} while (0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (acomp_request_dst_isvirt(req))</div><div class='del'>-		dst = req-&gt;dvirt;</div><div class='del'>-	else {</div><div class='del'>-		unsigned int max = SCOMP_SCRATCH_SIZE;</div><div class='add'>+	stream = crypto_acomp_lock_stream_bh(&amp;crypto_scomp_alg(scomp)-&gt;streams);</div><div class='ctx'> </div><div class='del'>-		dst = scratch-&gt;dst;</div><div class='del'>-		do {</div><div class='del'>-			if (acomp_request_dst_isfolio(req)) {</div><div class='del'>-				dpage = folio_page(req-&gt;dfolio, 0);</div><div class='del'>-				doff = req-&gt;doff;</div><div class='del'>-			} else if (dlen &lt;= req-&gt;dst-&gt;length) {</div><div class='del'>-				dpage = sg_page(req-&gt;dst);</div><div class='del'>-				doff = req-&gt;dst-&gt;offset;</div><div class='del'>-			} else</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			dpage = nth_page(dpage, doff / PAGE_SIZE);</div><div class='del'>-			doff = offset_in_page(doff);</div><div class='add'>+	if (!src_isvirt &amp;&amp; !src) {</div><div class='add'>+		const u8 *src;</div><div class='ctx'> </div><div class='del'>-			n = dlen / PAGE_SIZE;</div><div class='del'>-			n += (offset_in_page(dlen) + doff - 1) / PAGE_SIZE;</div><div class='del'>-			if (PageHighMem(dpage + n) &amp;&amp;</div><div class='del'>-			    size_add(doff, dlen) &gt; PAGE_SIZE)</div><div class='del'>-				break;</div><div class='del'>-			dst = kmap_local_page(dpage) + doff;</div><div class='del'>-			max = dlen;</div><div class='del'>-		} while (0);</div><div class='del'>-		dlen = min(dlen, max);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;scratch-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (src == scratch-&gt;src)</div><div class='add'>+		scratch = scomp_lock_scratch();</div><div class='add'>+		src = scratch-&gt;src;</div><div class='ctx'> 		memcpy_from_sglist(scratch-&gt;src, req-&gt;src, 0, slen);</div><div class='ctx'> </div><div class='del'>-	stream = raw_cpu_ptr(crypto_scomp_alg(scomp)-&gt;stream);</div><div class='del'>-	spin_lock(&amp;stream-&gt;lock);</div><div class='del'>-	if (dir)</div><div class='add'>+		if (dir)</div><div class='add'>+			ret = crypto_scomp_compress(scomp, src, slen,</div><div class='add'>+						    dst, &amp;dlen, stream-&gt;ctx);</div><div class='add'>+		else</div><div class='add'>+			ret = crypto_scomp_decompress(scomp, src, slen,</div><div class='add'>+						      dst, &amp;dlen, stream-&gt;ctx);</div><div class='add'>+</div><div class='add'>+		scomp_unlock_scratch(scratch);</div><div class='add'>+	} else if (dir)</div><div class='ctx'> 		ret = crypto_scomp_compress(scomp, src, slen,</div><div class='ctx'> 					    dst, &amp;dlen, stream-&gt;ctx);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = crypto_scomp_decompress(scomp, src, slen,</div><div class='ctx'> 					      dst, &amp;dlen, stream-&gt;ctx);</div><div class='ctx'> </div><div class='del'>-	if (dst == scratch-&gt;dst)</div><div class='del'>-		memcpy_to_sglist(req-&gt;dst, 0, dst, dlen);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;stream-&gt;lock);</div><div class='del'>-	spin_unlock_bh(&amp;scratch-&gt;lock);</div><div class='add'>+	crypto_acomp_unlock_stream_bh(stream);</div><div class='ctx'> </div><div class='ctx'> 	req-&gt;dlen = dlen;</div><div class='ctx'> </div><div class='del'>-	if (!acomp_request_dst_isvirt(req) &amp;&amp; dst != scratch-&gt;dst) {</div><div class='add'>+	if (!src_isvirt &amp;&amp; src)</div><div class='add'>+		kunmap_local(src);</div><div class='add'>+	if (!dst_isvirt) {</div><div class='ctx'> 		kunmap_local(dst);</div><div class='ctx'> 		dlen += doff;</div><div class='ctx'> 		for (;;) {</div><div class='hunk'>@@ -283,34 +273,18 @@ static int scomp_acomp_comp_decomp(struct acomp_req *req, int dir)</div><div class='ctx'> 			dpage = nth_page(dpage, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (!acomp_request_src_isvirt(req) &amp;&amp; src != scratch-&gt;src)</div><div class='del'>-		kunmap_local(src);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int scomp_acomp_chain(struct acomp_req *req, int dir)</div><div class='del'>-{</div><div class='del'>-	struct acomp_req *r2;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = scomp_acomp_comp_decomp(req, dir);</div><div class='del'>-	req-&gt;base.err = err;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(r2, &amp;req-&gt;base.list, base.list)</div><div class='del'>-		r2-&gt;base.err = scomp_acomp_comp_decomp(r2, dir);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int scomp_acomp_compress(struct acomp_req *req)</div><div class='ctx'> {</div><div class='del'>-	return scomp_acomp_chain(req, 1);</div><div class='add'>+	return scomp_acomp_comp_decomp(req, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int scomp_acomp_decompress(struct acomp_req *req)</div><div class='ctx'> {</div><div class='del'>-	return scomp_acomp_chain(req, 0);</div><div class='add'>+	return scomp_acomp_comp_decomp(req, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_exit_scomp_ops_async(struct crypto_tfm *tfm)</div><div class='hunk'>@@ -319,6 +293,7 @@ static void crypto_exit_scomp_ops_async(struct crypto_tfm *tfm)</div><div class='ctx'> </div><div class='ctx'> 	crypto_free_scomp(*ctx);</div><div class='ctx'> </div><div class='add'>+	flush_work(&amp;scomp_scratch_work);</div><div class='ctx'> 	mutex_lock(&amp;scomp_lock);</div><div class='ctx'> 	if (!--scomp_scratch_users)</div><div class='ctx'> 		crypto_scomp_free_scratches();</div><div class='hunk'>@@ -352,7 +327,9 @@ int crypto_init_scomp_ops_async(struct crypto_tfm *tfm)</div><div class='ctx'> </div><div class='ctx'> static void crypto_scomp_destroy(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	scomp_free_streams(__crypto_scomp_alg(alg));</div><div class='add'>+	struct scomp_alg *scomp = __crypto_scomp_alg(alg);</div><div class='add'>+</div><div class='add'>+	crypto_acomp_free_streams(&amp;scomp-&gt;streams);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct crypto_type crypto_scomp_type = {</div><div class='hunk'>@@ -369,6 +346,7 @@ static const struct crypto_type crypto_scomp_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SCOMPRESS,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_scomp, base),</div><div class='add'>+	.algsize = offsetof(struct scomp_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void scomp_prepare_alg(struct scomp_alg *alg)</div><div class='hunk'>@@ -377,7 +355,7 @@ static void scomp_prepare_alg(struct scomp_alg *alg)</div><div class='ctx'> </div><div class='ctx'> 	comp_prepare_alg(&amp;alg-&gt;calg);</div><div class='ctx'> </div><div class='del'>-	base-&gt;cra_flags |= CRYPTO_ALG_REQ_CHAIN;</div><div class='add'>+	base-&gt;cra_flags |= CRYPTO_ALG_REQ_VIRT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int crypto_register_scomp(struct scomp_alg *alg)</div><div class='head'>diff --git a/crypto/seed.c b/crypto/seed.c<br/>index d05d8ed909fa..815391f213de 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/seed.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/seed.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/seed.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/seed.c</a></div><div class='hunk'>@@ -460,7 +460,7 @@ static void __exit seed_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;seed_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(seed_init);</div><div class='add'>+module_init(seed_init);</div><div class='ctx'> module_exit(seed_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SEED Cipher Algorithm");</div><div class='head'>diff --git a/crypto/seqiv.c b/crypto/seqiv.c<br/>index 17e11d51ddc3..2bae99e33526 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/seqiv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/seqiv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/seqiv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/seqiv.c</a></div><div class='hunk'>@@ -64,20 +64,9 @@ static int seqiv_aead_encrypt(struct aead_request *req)</div><div class='ctx'> 	data = req-&gt;base.data;</div><div class='ctx'> 	info = req-&gt;iv;</div><div class='ctx'> </div><div class='del'>-	if (req-&gt;src != req-&gt;dst) {</div><div class='del'>-		SYNC_SKCIPHER_REQUEST_ON_STACK(nreq, ctx-&gt;sknull);</div><div class='del'>-</div><div class='del'>-		skcipher_request_set_sync_tfm(nreq, ctx-&gt;sknull);</div><div class='del'>-		skcipher_request_set_callback(nreq, req-&gt;base.flags,</div><div class='del'>-					      NULL, NULL);</div><div class='del'>-		skcipher_request_set_crypt(nreq, req-&gt;src, req-&gt;dst,</div><div class='del'>-					   req-&gt;assoclen + req-&gt;cryptlen,</div><div class='del'>-					   NULL);</div><div class='del'>-</div><div class='del'>-		err = crypto_skcipher_encrypt(nreq);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='add'>+	if (req-&gt;src != req-&gt;dst)</div><div class='add'>+		memcpy_sglist(req-&gt;dst, req-&gt;src,</div><div class='add'>+			      req-&gt;assoclen + req-&gt;cryptlen);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!IS_ALIGNED((unsigned long)info,</div><div class='ctx'> 				 crypto_aead_alignmask(geniv) + 1))) {</div><div class='hunk'>@@ -179,7 +168,7 @@ static void __exit seqiv_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;seqiv_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(seqiv_module_init);</div><div class='add'>+module_init(seqiv_module_init);</div><div class='ctx'> module_exit(seqiv_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/serpent_generic.c b/crypto/serpent_generic.c<br/>index f6ef187be6fe..b21e7606c652 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/serpent_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/serpent_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/serpent_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/serpent_generic.c</a></div><div class='hunk'>@@ -599,7 +599,7 @@ static void __exit serpent_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;srp_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(serpent_mod_init);</div><div class='add'>+module_init(serpent_mod_init);</div><div class='ctx'> module_exit(serpent_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/sha1_generic.c b/crypto/sha1_generic.c<br/>index 325b57fe28dc..024e8043bab0 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sha1_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha1_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sha1_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/sha1_generic.c</a></div><div class='hunk'>@@ -12,13 +12,11 @@</div><div class='ctx'>  * Copyright (c) Jean-Francois Dive &lt;jef@linuxbe.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> const u8 sha1_zero_message_hash[SHA1_DIGEST_SIZE] = {</div><div class='ctx'> 	0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d,</div><div class='hunk'>@@ -39,38 +37,31 @@ static void sha1_generic_block_fn(struct sha1_state *sst, u8 const *src,</div><div class='ctx'> 	memzero_explicit(temp, sizeof(temp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int crypto_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		       unsigned int len)</div><div class='add'>+static int crypto_sha1_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			      unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	return sha1_base_do_update(desc, data, len, sha1_generic_block_fn);</div><div class='add'>+	return sha1_base_do_update_blocks(desc, data, len,</div><div class='add'>+					  sha1_generic_block_fn);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(crypto_sha1_update);</div><div class='ctx'> </div><div class='del'>-static int sha1_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int crypto_sha1_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			     unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	sha1_base_do_finalize(desc, sha1_generic_block_fn);</div><div class='add'>+	sha1_base_do_finup(desc, data, len, sha1_generic_block_fn);</div><div class='ctx'> 	return sha1_base_finish(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int crypto_sha1_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		      unsigned int len, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sha1_base_do_update(desc, data, len, sha1_generic_block_fn);</div><div class='del'>-	return sha1_final(desc, out);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha1_finup);</div><div class='del'>-</div><div class='ctx'> static struct shash_alg alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha1_base_init,</div><div class='ctx'> 	.update		=	crypto_sha1_update,</div><div class='del'>-	.final		=	sha1_final,</div><div class='ctx'> 	.finup		=	crypto_sha1_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha1",</div><div class='ctx'> 		.cra_driver_name=	"sha1-generic",</div><div class='ctx'> 		.cra_priority	=	100,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -86,7 +77,7 @@ static void __exit sha1_generic_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(sha1_generic_mod_init);</div><div class='add'>+module_init(sha1_generic_mod_init);</div><div class='ctx'> module_exit(sha1_generic_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/sha256.c b/crypto/sha256.c<br/>new file mode 100644<br/>index 000000000000..4aeb213bab11<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/sha256.c</a></div><div class='hunk'>@@ -0,0 +1,283 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Crypto API wrapper for the SHA-256 and SHA-224 library functions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) Jean-Luc Cooke &lt;jlcooke@certainkey.com&gt;</div><div class='add'>+ * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='add'>+ * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='add'>+ * SHA224 Support Copyright 2007 Intel Corporation &lt;jonathan.lynch@intel.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/sha2.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+const u8 sha224_zero_message_hash[SHA224_DIGEST_SIZE] = {</div><div class='add'>+	0xd1, 0x4a, 0x02, 0x8c, 0x2a, 0x3a, 0x2b, 0xc9, 0x47,</div><div class='add'>+	0x61, 0x02, 0xbb, 0x28, 0x82, 0x34, 0xc4, 0x15, 0xa2,</div><div class='add'>+	0xb0, 0x1f, 0x82, 0x8e, 0xa6, 0x2a, 0xc5, 0xb3, 0xe4,</div><div class='add'>+	0x2f</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(sha224_zero_message_hash);</div><div class='add'>+</div><div class='add'>+const u8 sha256_zero_message_hash[SHA256_DIGEST_SIZE] = {</div><div class='add'>+	0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,</div><div class='add'>+	0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,</div><div class='add'>+	0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,</div><div class='add'>+	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(sha256_zero_message_hash);</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	sha256_block_init(shash_desc_ctx(desc));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int crypto_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				       unsigned int len, bool force_generic)</div><div class='add'>+{</div><div class='add'>+	struct crypto_sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	int remain = len % SHA256_BLOCK_SIZE;</div><div class='add'>+</div><div class='add'>+	sctx-&gt;count += len - remain;</div><div class='add'>+	sha256_choose_blocks(sctx-&gt;state, data, len / SHA256_BLOCK_SIZE,</div><div class='add'>+			     force_generic, !force_generic);</div><div class='add'>+	return remain;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_update_generic(struct shash_desc *desc, const u8 *data,</div><div class='add'>+					unsigned int len)</div><div class='add'>+{</div><div class='add'>+	return crypto_sha256_update(desc, data, len, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_update_lib(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				    unsigned int len)</div><div class='add'>+{</div><div class='add'>+	sha256_update(shash_desc_ctx(desc), data, len);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_update_arch(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				     unsigned int len)</div><div class='add'>+{</div><div class='add'>+	return crypto_sha256_update(desc, data, len, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_final_lib(struct shash_desc *desc, u8 *out)</div><div class='add'>+{</div><div class='add'>+	sha256_final(shash_desc_ctx(desc), out);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline int crypto_sha256_finup(struct shash_desc *desc,</div><div class='add'>+					       const u8 *data,</div><div class='add'>+					       unsigned int len, u8 *out,</div><div class='add'>+					       bool force_generic)</div><div class='add'>+{</div><div class='add'>+	struct crypto_sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	unsigned int remain = len;</div><div class='add'>+	u8 *buf;</div><div class='add'>+</div><div class='add'>+	if (len &gt;= SHA256_BLOCK_SIZE)</div><div class='add'>+		remain = crypto_sha256_update(desc, data, len, force_generic);</div><div class='add'>+	sctx-&gt;count += remain;</div><div class='add'>+	buf = memcpy(sctx + 1, data + len - remain, remain);</div><div class='add'>+	sha256_finup(sctx, buf, remain, out,</div><div class='add'>+		     crypto_shash_digestsize(desc-&gt;tfm), force_generic,</div><div class='add'>+		     !force_generic);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_finup_generic(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				       unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	return crypto_sha256_finup(desc, data, len, out, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_finup_arch(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				    unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	return crypto_sha256_finup(desc, data, len, out, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_digest_generic(struct shash_desc *desc, const u8 *data,</div><div class='add'>+					unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	crypto_sha256_init(desc);</div><div class='add'>+	return crypto_sha256_finup_generic(desc, data, len, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_digest_lib(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				    unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	sha256(data, len, out);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_digest_arch(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				     unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	crypto_sha256_init(desc);</div><div class='add'>+	return crypto_sha256_finup_arch(desc, data, len, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha224_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	sha224_block_init(shash_desc_ctx(desc));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha224_final_lib(struct shash_desc *desc, u8 *out)</div><div class='add'>+{</div><div class='add'>+	sha224_final(shash_desc_ctx(desc), out);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_import_lib(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	const u8 *p = in;</div><div class='add'>+</div><div class='add'>+	memcpy(sctx, p, sizeof(*sctx));</div><div class='add'>+	p += sizeof(*sctx);</div><div class='add'>+	sctx-&gt;count += *p;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int crypto_sha256_export_lib(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	struct sha256_state *sctx0 = shash_desc_ctx(desc);</div><div class='add'>+	struct sha256_state sctx = *sctx0;</div><div class='add'>+	unsigned int partial;</div><div class='add'>+	u8 *p = out;</div><div class='add'>+</div><div class='add'>+	partial = sctx.count % SHA256_BLOCK_SIZE;</div><div class='add'>+	sctx.count -= partial;</div><div class='add'>+	memcpy(p, &amp;sctx, sizeof(sctx));</div><div class='add'>+	p += sizeof(sctx);</div><div class='add'>+	*p = partial;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct shash_alg algs[] = {</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "sha256",</div><div class='add'>+		.base.cra_driver_name	= "sha256-generic",</div><div class='add'>+		.base.cra_priority	= 100,</div><div class='add'>+		.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='add'>+		.base.cra_blocksize	= SHA256_BLOCK_SIZE,</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+		.digestsize		= SHA256_DIGEST_SIZE,</div><div class='add'>+		.init			= crypto_sha256_init,</div><div class='add'>+		.update			= crypto_sha256_update_generic,</div><div class='add'>+		.finup			= crypto_sha256_finup_generic,</div><div class='add'>+		.digest			= crypto_sha256_digest_generic,</div><div class='add'>+		.descsize		= sizeof(struct crypto_sha256_state),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "sha224",</div><div class='add'>+		.base.cra_driver_name	= "sha224-generic",</div><div class='add'>+		.base.cra_priority	= 100,</div><div class='add'>+		.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='add'>+		.base.cra_blocksize	= SHA224_BLOCK_SIZE,</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+		.digestsize		= SHA224_DIGEST_SIZE,</div><div class='add'>+		.init			= crypto_sha224_init,</div><div class='add'>+		.update			= crypto_sha256_update_generic,</div><div class='add'>+		.finup			= crypto_sha256_finup_generic,</div><div class='add'>+		.descsize		= sizeof(struct crypto_sha256_state),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "sha256",</div><div class='add'>+		.base.cra_driver_name	= "sha256-lib",</div><div class='add'>+		.base.cra_blocksize	= SHA256_BLOCK_SIZE,</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+		.digestsize		= SHA256_DIGEST_SIZE,</div><div class='add'>+		.init			= crypto_sha256_init,</div><div class='add'>+		.update			= crypto_sha256_update_lib,</div><div class='add'>+		.final			= crypto_sha256_final_lib,</div><div class='add'>+		.digest			= crypto_sha256_digest_lib,</div><div class='add'>+		.descsize		= sizeof(struct sha256_state),</div><div class='add'>+		.statesize		= sizeof(struct crypto_sha256_state) +</div><div class='add'>+					  SHA256_BLOCK_SIZE + 1,</div><div class='add'>+		.import			= crypto_sha256_import_lib,</div><div class='add'>+		.export			= crypto_sha256_export_lib,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "sha224",</div><div class='add'>+		.base.cra_driver_name	= "sha224-lib",</div><div class='add'>+		.base.cra_blocksize	= SHA224_BLOCK_SIZE,</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+		.digestsize		= SHA224_DIGEST_SIZE,</div><div class='add'>+		.init			= crypto_sha224_init,</div><div class='add'>+		.update			= crypto_sha256_update_lib,</div><div class='add'>+		.final			= crypto_sha224_final_lib,</div><div class='add'>+		.descsize		= sizeof(struct sha256_state),</div><div class='add'>+		.statesize		= sizeof(struct crypto_sha256_state) +</div><div class='add'>+					  SHA256_BLOCK_SIZE + 1,</div><div class='add'>+		.import			= crypto_sha256_import_lib,</div><div class='add'>+		.export			= crypto_sha256_export_lib,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "sha256",</div><div class='add'>+		.base.cra_driver_name	= "sha256-" __stringify(ARCH),</div><div class='add'>+		.base.cra_priority	= 300,</div><div class='add'>+		.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='add'>+		.base.cra_blocksize	= SHA256_BLOCK_SIZE,</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+		.digestsize		= SHA256_DIGEST_SIZE,</div><div class='add'>+		.init			= crypto_sha256_init,</div><div class='add'>+		.update			= crypto_sha256_update_arch,</div><div class='add'>+		.finup			= crypto_sha256_finup_arch,</div><div class='add'>+		.digest			= crypto_sha256_digest_arch,</div><div class='add'>+		.descsize		= sizeof(struct crypto_sha256_state),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.base.cra_name		= "sha224",</div><div class='add'>+		.base.cra_driver_name	= "sha224-" __stringify(ARCH),</div><div class='add'>+		.base.cra_priority	= 300,</div><div class='add'>+		.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					  CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='add'>+		.base.cra_blocksize	= SHA224_BLOCK_SIZE,</div><div class='add'>+		.base.cra_module	= THIS_MODULE,</div><div class='add'>+		.digestsize		= SHA224_DIGEST_SIZE,</div><div class='add'>+		.init			= crypto_sha224_init,</div><div class='add'>+		.update			= crypto_sha256_update_arch,</div><div class='add'>+		.finup			= crypto_sha256_finup_arch,</div><div class='add'>+		.descsize		= sizeof(struct crypto_sha256_state),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static unsigned int num_algs;</div><div class='add'>+</div><div class='add'>+static int __init crypto_sha256_mod_init(void)</div><div class='add'>+{</div><div class='add'>+	/* register the arch flavours only if they differ from generic */</div><div class='add'>+	num_algs = ARRAY_SIZE(algs);</div><div class='add'>+	BUILD_BUG_ON(ARRAY_SIZE(algs) &lt;= 2);</div><div class='add'>+	if (!sha256_is_arch_optimized())</div><div class='add'>+		num_algs -= 2;</div><div class='add'>+	return crypto_register_shashes(algs, ARRAY_SIZE(algs));</div><div class='add'>+}</div><div class='add'>+module_init(crypto_sha256_mod_init);</div><div class='add'>+</div><div class='add'>+static void __exit crypto_sha256_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+	crypto_unregister_shashes(algs, num_algs);</div><div class='add'>+}</div><div class='add'>+module_exit(crypto_sha256_mod_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Crypto API wrapper for the SHA-256 and SHA-224 library functions");</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha256");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha256-generic");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha256-" __stringify(ARCH));</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha224");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha224-generic");</div><div class='add'>+MODULE_ALIAS_CRYPTO("sha224-" __stringify(ARCH));</div><div class='head'>diff --git a/crypto/sha256_generic.c b/crypto/sha256_generic.c<br/>deleted file mode 100644<br/>index b00521f1a6d4..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sha256_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha256_generic.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,110 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Crypto API wrapper for the generic SHA256 code from lib/crypto/sha256.c</div><div class='del'>- *</div><div class='del'>- * Copyright (c) Jean-Luc Cooke &lt;jlcooke@certainkey.com&gt;</div><div class='del'>- * Copyright (c) Andrew McDonald &lt;andrew@mcdonald.org.uk&gt;</div><div class='del'>- * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='del'>- * SHA224 Support Copyright 2007 Intel Corporation &lt;jonathan.lynch@intel.com&gt;</div><div class='del'>- */</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/sha256_base.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='del'>-</div><div class='del'>-const u8 sha224_zero_message_hash[SHA224_DIGEST_SIZE] = {</div><div class='del'>-	0xd1, 0x4a, 0x02, 0x8c, 0x2a, 0x3a, 0x2b, 0xc9, 0x47,</div><div class='del'>-	0x61, 0x02, 0xbb, 0x28, 0x82, 0x34, 0xc4, 0x15, 0xa2,</div><div class='del'>-	0xb0, 0x1f, 0x82, 0x8e, 0xa6, 0x2a, 0xc5, 0xb3, 0xe4,</div><div class='del'>-	0x2f</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL_GPL(sha224_zero_message_hash);</div><div class='del'>-</div><div class='del'>-const u8 sha256_zero_message_hash[SHA256_DIGEST_SIZE] = {</div><div class='del'>-	0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14,</div><div class='del'>-	0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24,</div><div class='del'>-	0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c,</div><div class='del'>-	0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL_GPL(sha256_zero_message_hash);</div><div class='del'>-</div><div class='del'>-int crypto_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			  unsigned int len)</div><div class='del'>-{</div><div class='del'>-	sha256_update(shash_desc_ctx(desc), data, len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha256_update);</div><div class='del'>-</div><div class='del'>-static int crypto_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	if (crypto_shash_digestsize(desc-&gt;tfm) == SHA224_DIGEST_SIZE)</div><div class='del'>-		sha224_final(shash_desc_ctx(desc), out);</div><div class='del'>-	else</div><div class='del'>-		sha256_final(shash_desc_ctx(desc), out);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto_sha256_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	sha256_update(shash_desc_ctx(desc), data, len);</div><div class='del'>-	return crypto_sha256_final(desc, hash);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha256_finup);</div><div class='del'>-</div><div class='del'>-static struct shash_alg sha256_algs[2] = { {</div><div class='del'>-	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha256_base_init,</div><div class='del'>-	.update		=	crypto_sha256_update,</div><div class='del'>-	.final		=	crypto_sha256_final,</div><div class='del'>-	.finup		=	crypto_sha256_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha256",</div><div class='del'>-		.cra_driver_name=	"sha256-generic",</div><div class='del'>-		.cra_priority	=	100,</div><div class='del'>-		.cra_blocksize	=	SHA256_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-}, {</div><div class='del'>-	.digestsize	=	SHA224_DIGEST_SIZE,</div><div class='del'>-	.init		=	sha224_base_init,</div><div class='del'>-	.update		=	crypto_sha256_update,</div><div class='del'>-	.final		=	crypto_sha256_final,</div><div class='del'>-	.finup		=	crypto_sha256_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.base		=	{</div><div class='del'>-		.cra_name	=	"sha224",</div><div class='del'>-		.cra_driver_name=	"sha224-generic",</div><div class='del'>-		.cra_priority	=	100,</div><div class='del'>-		.cra_blocksize	=	SHA224_BLOCK_SIZE,</div><div class='del'>-		.cra_module	=	THIS_MODULE,</div><div class='del'>-	}</div><div class='del'>-} };</div><div class='del'>-</div><div class='del'>-static int __init sha256_generic_mod_init(void)</div><div class='del'>-{</div><div class='del'>-	return crypto_register_shashes(sha256_algs, ARRAY_SIZE(sha256_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit sha256_generic_mod_fini(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_shashes(sha256_algs, ARRAY_SIZE(sha256_algs));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-subsys_initcall(sha256_generic_mod_init);</div><div class='del'>-module_exit(sha256_generic_mod_fini);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm");</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha224-generic");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256");</div><div class='del'>-MODULE_ALIAS_CRYPTO("sha256-generic");</div><div class='head'>diff --git a/crypto/sha3_generic.c b/crypto/sha3_generic.c<br/>index b103642b56ea..41d1e506e6de 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sha3_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha3_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sha3_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/sha3_generic.c</a></div><div class='hunk'>@@ -9,10 +9,10 @@</div><div class='ctx'>  *               Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha3.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -161,68 +161,51 @@ static void keccakf(u64 st[25])</div><div class='ctx'> int crypto_sha3_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int digest_size = crypto_shash_digestsize(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;rsiz = 200 - 2 * digest_size;</div><div class='del'>-	sctx-&gt;rsizw = sctx-&gt;rsiz / 8;</div><div class='del'>-	sctx-&gt;partial = 0;</div><div class='ctx'> </div><div class='ctx'> 	memset(sctx-&gt;st, 0, sizeof(sctx-&gt;st));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(crypto_sha3_init);</div><div class='ctx'> </div><div class='del'>-int crypto_sha3_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		       unsigned int len)</div><div class='add'>+static int crypto_sha3_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			      unsigned int len)</div><div class='ctx'> {</div><div class='add'>+	unsigned int rsiz = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='ctx'> 	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int done;</div><div class='del'>-	const u8 *src;</div><div class='del'>-</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-</div><div class='del'>-	if ((sctx-&gt;partial + len) &gt; (sctx-&gt;rsiz - 1)) {</div><div class='del'>-		if (sctx-&gt;partial) {</div><div class='del'>-			done = -sctx-&gt;partial;</div><div class='del'>-			memcpy(sctx-&gt;buf + sctx-&gt;partial, data,</div><div class='del'>-			       done + sctx-&gt;rsiz);</div><div class='del'>-			src = sctx-&gt;buf;</div><div class='del'>-		}</div><div class='add'>+	unsigned int rsizw = rsiz / 8;</div><div class='ctx'> </div><div class='del'>-		do {</div><div class='del'>-			unsigned int i;</div><div class='add'>+	do {</div><div class='add'>+		int i;</div><div class='ctx'> </div><div class='del'>-			for (i = 0; i &lt; sctx-&gt;rsizw; i++)</div><div class='del'>-				sctx-&gt;st[i] ^= get_unaligned_le64(src + 8 * i);</div><div class='del'>-			keccakf(sctx-&gt;st);</div><div class='add'>+		for (i = 0; i &lt; rsizw; i++)</div><div class='add'>+			sctx-&gt;st[i] ^= get_unaligned_le64(data + 8 * i);</div><div class='add'>+		keccakf(sctx-&gt;st);</div><div class='ctx'> </div><div class='del'>-			done += sctx-&gt;rsiz;</div><div class='del'>-			src = data + done;</div><div class='del'>-		} while (done + (sctx-&gt;rsiz - 1) &lt; len);</div><div class='del'>-</div><div class='del'>-		sctx-&gt;partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy(sctx-&gt;buf + sctx-&gt;partial, src, len - done);</div><div class='del'>-	sctx-&gt;partial += (len - done);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+		data += rsiz;</div><div class='add'>+		len -= rsiz;</div><div class='add'>+	} while (len &gt;= rsiz);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(crypto_sha3_update);</div><div class='ctx'> </div><div class='del'>-int crypto_sha3_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int crypto_sha3_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			     unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int i, inlen = sctx-&gt;partial;</div><div class='ctx'> 	unsigned int digest_size = crypto_shash_digestsize(desc-&gt;tfm);</div><div class='add'>+	unsigned int rsiz = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='add'>+	struct sha3_state *sctx = shash_desc_ctx(desc);</div><div class='add'>+	__le64 block[SHA3_224_BLOCK_SIZE / 8] = {};</div><div class='ctx'> 	__le64 *digest = (__le64 *)out;</div><div class='add'>+	unsigned int rsizw = rsiz / 8;</div><div class='add'>+	u8 *p;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	sctx-&gt;buf[inlen++] = 0x06;</div><div class='del'>-	memset(sctx-&gt;buf + inlen, 0, sctx-&gt;rsiz - inlen);</div><div class='del'>-	sctx-&gt;buf[sctx-&gt;rsiz - 1] |= 0x80;</div><div class='add'>+	p = memcpy(block, src, len);</div><div class='add'>+	p[len++] = 0x06;</div><div class='add'>+	p[rsiz - 1] |= 0x80;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; sctx-&gt;rsizw; i++)</div><div class='del'>-		sctx-&gt;st[i] ^= get_unaligned_le64(sctx-&gt;buf + 8 * i);</div><div class='add'>+	for (i = 0; i &lt; rsizw; i++)</div><div class='add'>+		sctx-&gt;st[i] ^= le64_to_cpu(block[i]);</div><div class='add'>+	memzero_explicit(block, sizeof(block));</div><div class='ctx'> </div><div class='ctx'> 	keccakf(sctx-&gt;st);</div><div class='ctx'> </div><div class='hunk'>@@ -232,49 +215,51 @@ int crypto_sha3_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 	if (digest_size &amp; 4)</div><div class='ctx'> 		put_unaligned_le32(sctx-&gt;st[i], (__le32 *)digest);</div><div class='ctx'> </div><div class='del'>-	memset(sctx, 0, sizeof(*sctx));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(crypto_sha3_final);</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg algs[] = { {</div><div class='ctx'> 	.digestsize		= SHA3_224_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= crypto_sha3_update,</div><div class='del'>-	.final			= crypto_sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= crypto_sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-224",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-224-generic",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_224_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> }, {</div><div class='ctx'> 	.digestsize		= SHA3_256_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= crypto_sha3_update,</div><div class='del'>-	.final			= crypto_sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= crypto_sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-256",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-256-generic",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_256_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> }, {</div><div class='ctx'> 	.digestsize		= SHA3_384_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= crypto_sha3_update,</div><div class='del'>-	.final			= crypto_sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= crypto_sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-384",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-384-generic",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_384_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> }, {</div><div class='ctx'> 	.digestsize		= SHA3_512_DIGEST_SIZE,</div><div class='ctx'> 	.init			= crypto_sha3_init,</div><div class='ctx'> 	.update			= crypto_sha3_update,</div><div class='del'>-	.final			= crypto_sha3_final,</div><div class='del'>-	.descsize		= sizeof(struct sha3_state),</div><div class='add'>+	.finup			= crypto_sha3_finup,</div><div class='add'>+	.descsize		= SHA3_STATE_SIZE,</div><div class='ctx'> 	.base.cra_name		= "sha3-512",</div><div class='ctx'> 	.base.cra_driver_name	= "sha3-512-generic",</div><div class='add'>+	.base.cra_flags		= CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 	.base.cra_blocksize	= SHA3_512_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_module	= THIS_MODULE,</div><div class='ctx'> } };</div><div class='hunk'>@@ -289,7 +274,7 @@ static void __exit sha3_generic_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(sha3_generic_mod_init);</div><div class='add'>+module_init(sha3_generic_mod_init);</div><div class='ctx'> module_exit(sha3_generic_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/sha512_generic.c b/crypto/sha512_generic.c<br/>index ed81813bd420..7368173f545e 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sha512_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sha512_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sha512_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/sha512_generic.c</a></div><div class='hunk'>@@ -6,16 +6,10 @@</div><div class='ctx'>  * Copyright (c) 2003 Kyle McMartin &lt;kyle@debian.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;crypto/sha512_base.h&gt;</div><div class='del'>-#include &lt;linux/percpu.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> const u8 sha384_zero_message_hash[SHA384_DIGEST_SIZE] = {</div><div class='hunk'>@@ -145,47 +139,42 @@ sha512_transform(u64 *state, const u8 *input)</div><div class='ctx'> 	state[4] += e; state[5] += f; state[6] += g; state[7] += h;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sha512_generic_block_fn(struct sha512_state *sst, u8 const *src,</div><div class='del'>-				    int blocks)</div><div class='add'>+void sha512_generic_block_fn(struct sha512_state *sst, u8 const *src,</div><div class='add'>+			     int blocks)</div><div class='ctx'> {</div><div class='del'>-	while (blocks--) {</div><div class='add'>+	do {</div><div class='ctx'> 		sha512_transform(sst-&gt;state, src);</div><div class='ctx'> 		src += SHA512_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='add'>+	} while (--blocks);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(sha512_generic_block_fn);</div><div class='ctx'> </div><div class='del'>-int crypto_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='add'>+static int crypto_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='add'>+				unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	return sha512_base_do_update(desc, data, len, sha512_generic_block_fn);</div><div class='add'>+	return sha512_base_do_update_blocks(desc, data, len,</div><div class='add'>+					    sha512_generic_block_fn);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(crypto_sha512_update);</div><div class='ctx'> </div><div class='del'>-static int sha512_final(struct shash_desc *desc, u8 *hash)</div><div class='add'>+static int crypto_sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			       unsigned int len, u8 *hash)</div><div class='ctx'> {</div><div class='del'>-	sha512_base_do_finalize(desc, sha512_generic_block_fn);</div><div class='add'>+	sha512_base_do_finup(desc, data, len, sha512_generic_block_fn);</div><div class='ctx'> 	return sha512_base_finish(desc, hash);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int crypto_sha512_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len, u8 *hash)</div><div class='del'>-{</div><div class='del'>-	sha512_base_do_update(desc, data, len, sha512_generic_block_fn);</div><div class='del'>-	return sha512_final(desc, hash);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(crypto_sha512_finup);</div><div class='del'>-</div><div class='ctx'> static struct shash_alg sha512_algs[2] = { {</div><div class='ctx'> 	.digestsize	=	SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha512_base_init,</div><div class='ctx'> 	.update		=	crypto_sha512_update,</div><div class='del'>-	.final		=	sha512_final,</div><div class='ctx'> 	.finup		=	crypto_sha512_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha512",</div><div class='ctx'> 		.cra_driver_name =	"sha512-generic",</div><div class='ctx'> 		.cra_priority	=	100,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -193,13 +182,14 @@ static struct shash_alg sha512_algs[2] = { {</div><div class='ctx'> 	.digestsize	=	SHA384_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sha384_base_init,</div><div class='ctx'> 	.update		=	crypto_sha512_update,</div><div class='del'>-	.final		=	sha512_final,</div><div class='ctx'> 	.finup		=	crypto_sha512_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sha512_state),</div><div class='add'>+	.descsize	=	SHA512_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	=	"sha384",</div><div class='ctx'> 		.cra_driver_name =	"sha384-generic",</div><div class='ctx'> 		.cra_priority	=	100,</div><div class='add'>+		.cra_flags	=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	=	SHA384_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -215,7 +205,7 @@ static void __exit sha512_generic_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shashes(sha512_algs, ARRAY_SIZE(sha512_algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(sha512_generic_mod_init);</div><div class='add'>+module_init(sha512_generic_mod_init);</div><div class='ctx'> module_exit(sha512_generic_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/shash.c b/crypto/shash.c<br/>index 301ab42bf849..4721f5f134f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/shash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/shash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/shash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/shash.c</a></div><div class='hunk'>@@ -16,6 +16,24 @@</div><div class='ctx'> </div><div class='ctx'> #include "hash.h"</div><div class='ctx'> </div><div class='add'>+static inline bool crypto_shash_block_only(struct crypto_shash *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_shash_alg(tfm)-&gt;base.cra_flags &amp;</div><div class='add'>+	       CRYPTO_AHASH_ALG_BLOCK_ONLY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool crypto_shash_final_nonzero(struct crypto_shash *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_shash_alg(tfm)-&gt;base.cra_flags &amp;</div><div class='add'>+	       CRYPTO_AHASH_ALG_FINAL_NONZERO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool crypto_shash_finup_max(struct crypto_shash *tfm)</div><div class='add'>+{</div><div class='add'>+	return crypto_shash_alg(tfm)-&gt;base.cra_flags &amp;</div><div class='add'>+	       CRYPTO_AHASH_ALG_FINUP_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int shash_no_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='ctx'> 		    unsigned int keylen)</div><div class='ctx'> {</div><div class='hunk'>@@ -46,18 +64,27 @@ int crypto_shash_setkey(struct crypto_shash *tfm, const u8 *key,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_setkey);</div><div class='ctx'> </div><div class='del'>-int crypto_shash_update(struct shash_desc *desc, const u8 *data,</div><div class='del'>-			unsigned int len)</div><div class='add'>+static int __crypto_shash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	return crypto_shash_alg(desc-&gt;tfm)-&gt;update(desc, data, len);</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+</div><div class='add'>+	if (crypto_shash_block_only(tfm)) {</div><div class='add'>+		u8 *buf = shash_desc_ctx(desc);</div><div class='add'>+</div><div class='add'>+		buf += crypto_shash_descsize(tfm) - 1;</div><div class='add'>+		*buf = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return crypto_shash_alg(tfm)-&gt;init(desc);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_shash_update);</div><div class='ctx'> </div><div class='del'>-int crypto_shash_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+int crypto_shash_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	return crypto_shash_alg(desc-&gt;tfm)-&gt;final(desc, out);</div><div class='add'>+	if (crypto_shash_get_flags(desc-&gt;tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='add'>+		return -ENOKEY;</div><div class='add'>+	return __crypto_shash_init(desc);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_shash_final);</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_shash_init);</div><div class='ctx'> </div><div class='ctx'> static int shash_default_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			       unsigned int len, u8 *out)</div><div class='hunk'>@@ -68,20 +95,89 @@ static int shash_default_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	       shash-&gt;final(desc, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int crypto_shash_finup(struct shash_desc *desc, const u8 *data,</div><div class='del'>-		       unsigned int len, u8 *out)</div><div class='add'>+static int crypto_shash_op_and_zero(</div><div class='add'>+	int (*op)(struct shash_desc *desc, const u8 *data,</div><div class='add'>+		  unsigned int len, u8 *out),</div><div class='add'>+	struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	return crypto_shash_alg(desc-&gt;tfm)-&gt;finup(desc, data, len, out);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = op(desc, data, len, out);</div><div class='add'>+	memset(shash_desc_ctx(desc), 0, crypto_shash_descsize(desc-&gt;tfm));</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int crypto_shash_finup(struct shash_desc *restrict desc, const u8 *data,</div><div class='add'>+		       unsigned int len, u8 *restrict out)</div><div class='add'>+{</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+	u8 *blenp = shash_desc_ctx(desc);</div><div class='add'>+	bool finup_max, nonzero;</div><div class='add'>+	unsigned int bs;</div><div class='add'>+	int err;</div><div class='add'>+	u8 *buf;</div><div class='add'>+</div><div class='add'>+	if (!crypto_shash_block_only(tfm)) {</div><div class='add'>+		if (out)</div><div class='add'>+			goto finup;</div><div class='add'>+		return crypto_shash_alg(tfm)-&gt;update(desc, data, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	finup_max = out &amp;&amp; crypto_shash_finup_max(tfm);</div><div class='add'>+</div><div class='add'>+	/* Retain extra block for final nonzero algorithms. */</div><div class='add'>+	nonzero = crypto_shash_final_nonzero(tfm);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The partial block buffer follows the algorithm desc context.</div><div class='add'>+	 * The byte following that contains the length.</div><div class='add'>+	 */</div><div class='add'>+	blenp += crypto_shash_descsize(tfm) - 1;</div><div class='add'>+	bs = crypto_shash_blocksize(tfm);</div><div class='add'>+	buf = blenp - bs;</div><div class='add'>+</div><div class='add'>+	if (likely(!*blenp &amp;&amp; finup_max))</div><div class='add'>+		goto finup;</div><div class='add'>+</div><div class='add'>+	while ((*blenp + len) &gt;= bs + nonzero) {</div><div class='add'>+		unsigned int nbytes = len - nonzero;</div><div class='add'>+		const u8 *src = data;</div><div class='add'>+</div><div class='add'>+		if (*blenp) {</div><div class='add'>+			memcpy(buf + *blenp, data, bs - *blenp);</div><div class='add'>+			nbytes = bs;</div><div class='add'>+			src = buf;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = crypto_shash_alg(tfm)-&gt;update(desc, src, nbytes);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		data += nbytes - err - *blenp;</div><div class='add'>+		len -= nbytes - err - *blenp;</div><div class='add'>+		*blenp = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*blenp || !out) {</div><div class='add'>+		memcpy(buf + *blenp, data, len);</div><div class='add'>+		*blenp += len;</div><div class='add'>+		if (!out)</div><div class='add'>+			return 0;</div><div class='add'>+		data = buf;</div><div class='add'>+		len = *blenp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+finup:</div><div class='add'>+	return crypto_shash_op_and_zero(crypto_shash_alg(tfm)-&gt;finup, desc,</div><div class='add'>+					data, len, out);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_finup);</div><div class='ctx'> </div><div class='ctx'> static int shash_default_digest(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 				unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct shash_alg *shash = crypto_shash_alg(desc-&gt;tfm);</div><div class='del'>-</div><div class='del'>-	return shash-&gt;init(desc) ?:</div><div class='del'>-	       shash-&gt;finup(desc, data, len, out);</div><div class='add'>+	return __crypto_shash_init(desc) ?:</div><div class='add'>+	       crypto_shash_finup(desc, data, len, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int crypto_shash_digest(struct shash_desc *desc, const u8 *data,</div><div class='hunk'>@@ -92,7 +188,8 @@ int crypto_shash_digest(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	if (crypto_shash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='ctx'> 		return -ENOKEY;</div><div class='ctx'> </div><div class='del'>-	return crypto_shash_alg(tfm)-&gt;digest(desc, data, len, out);</div><div class='add'>+	return crypto_shash_op_and_zero(crypto_shash_alg(tfm)-&gt;digest, desc,</div><div class='add'>+					data, len, out);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_digest);</div><div class='ctx'> </div><div class='hunk'>@@ -100,44 +197,105 @@ int crypto_shash_tfm_digest(struct crypto_shash *tfm, const u8 *data,</div><div class='ctx'> 			    unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	SHASH_DESC_ON_STACK(desc, tfm);</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	desc-&gt;tfm = tfm;</div><div class='add'>+	return crypto_shash_digest(desc, data, len, out);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_shash_tfm_digest);</div><div class='ctx'> </div><div class='del'>-	err = crypto_shash_digest(desc, data, len, out);</div><div class='add'>+static int __crypto_shash_export(struct shash_desc *desc, void *out,</div><div class='add'>+				 int (*export)(struct shash_desc *desc,</div><div class='add'>+					       void *out))</div><div class='add'>+{</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+	u8 *buf = shash_desc_ctx(desc);</div><div class='add'>+	unsigned int plen, ss;</div><div class='add'>+</div><div class='add'>+	plen = crypto_shash_blocksize(tfm) + 1;</div><div class='add'>+	ss = crypto_shash_statesize(tfm);</div><div class='add'>+	if (crypto_shash_block_only(tfm))</div><div class='add'>+		ss -= plen;</div><div class='add'>+	if (!export) {</div><div class='add'>+		memcpy(out, buf, ss);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	shash_desc_zero(desc);</div><div class='add'>+	return export(desc, out);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+int crypto_shash_export_core(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	return __crypto_shash_export(desc, out,</div><div class='add'>+				     crypto_shash_alg(desc-&gt;tfm)-&gt;export_core);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(crypto_shash_tfm_digest);</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_shash_export_core);</div><div class='ctx'> </div><div class='ctx'> int crypto_shash_export(struct shash_desc *desc, void *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='del'>-	struct shash_alg *shash = crypto_shash_alg(tfm);</div><div class='ctx'> </div><div class='del'>-	if (shash-&gt;export)</div><div class='del'>-		return shash-&gt;export(desc, out);</div><div class='add'>+	if (crypto_shash_block_only(tfm)) {</div><div class='add'>+		unsigned int plen = crypto_shash_blocksize(tfm) + 1;</div><div class='add'>+		unsigned int descsize = crypto_shash_descsize(tfm);</div><div class='add'>+		unsigned int ss = crypto_shash_statesize(tfm);</div><div class='add'>+		u8 *buf = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	memcpy(out, shash_desc_ctx(desc), crypto_shash_descsize(tfm));</div><div class='del'>-	return 0;</div><div class='add'>+		memcpy(out + ss - plen, buf + descsize - plen, plen);</div><div class='add'>+	}</div><div class='add'>+	return __crypto_shash_export(desc, out, crypto_shash_alg(tfm)-&gt;export);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_export);</div><div class='ctx'> </div><div class='del'>-int crypto_shash_import(struct shash_desc *desc, const void *in)</div><div class='add'>+static int __crypto_shash_import(struct shash_desc *desc, const void *in,</div><div class='add'>+				 int (*import)(struct shash_desc *desc,</div><div class='add'>+					       const void *in))</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='del'>-	struct shash_alg *shash = crypto_shash_alg(tfm);</div><div class='add'>+	unsigned int descsize, plen, ss;</div><div class='add'>+	u8 *buf = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='ctx'> 	if (crypto_shash_get_flags(tfm) &amp; CRYPTO_TFM_NEED_KEY)</div><div class='ctx'> 		return -ENOKEY;</div><div class='ctx'> </div><div class='del'>-	if (shash-&gt;import)</div><div class='del'>-		return shash-&gt;import(desc, in);</div><div class='add'>+	ss = crypto_shash_statesize(tfm);</div><div class='add'>+	if (crypto_shash_block_only(tfm)) {</div><div class='add'>+		plen = crypto_shash_blocksize(tfm) + 1;</div><div class='add'>+		ss -= plen;</div><div class='add'>+		descsize = crypto_shash_descsize(tfm);</div><div class='add'>+		buf[descsize - 1] = 0;</div><div class='add'>+	}</div><div class='add'>+	if (!import) {</div><div class='add'>+		memcpy(buf, in, ss);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	memcpy(shash_desc_ctx(desc), in, crypto_shash_descsize(tfm));</div><div class='del'>-	return 0;</div><div class='add'>+	return import(desc, in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int crypto_shash_import_core(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	return __crypto_shash_import(desc, in,</div><div class='add'>+				     crypto_shash_alg(desc-&gt;tfm)-&gt;import_core);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(crypto_shash_import_core);</div><div class='add'>+</div><div class='add'>+int crypto_shash_import(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = __crypto_shash_import(desc, in, crypto_shash_alg(tfm)-&gt;import);</div><div class='add'>+	if (crypto_shash_block_only(tfm)) {</div><div class='add'>+		unsigned int plen = crypto_shash_blocksize(tfm) + 1;</div><div class='add'>+		unsigned int descsize = crypto_shash_descsize(tfm);</div><div class='add'>+		unsigned int ss = crypto_shash_statesize(tfm);</div><div class='add'>+		u8 *buf = shash_desc_ctx(desc);</div><div class='add'>+</div><div class='add'>+		memcpy(buf + descsize - plen, in + ss - plen, plen);</div><div class='add'>+		if (buf[descsize - 1] &gt;= plen)</div><div class='add'>+			err = -EOVERFLOW;</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_shash_import);</div><div class='ctx'> </div><div class='hunk'>@@ -153,9 +311,6 @@ static int crypto_shash_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *hash = __crypto_shash_cast(tfm);</div><div class='ctx'> 	struct shash_alg *alg = crypto_shash_alg(hash);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	hash-&gt;descsize = alg-&gt;descsize;</div><div class='ctx'> </div><div class='ctx'> 	shash_set_needkey(hash, alg);</div><div class='ctx'> </div><div class='hunk'>@@ -165,18 +320,7 @@ static int crypto_shash_init_tfm(struct crypto_tfm *tfm)</div><div class='ctx'> 	if (!alg-&gt;init_tfm)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	err = alg-&gt;init_tfm(hash);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* -&gt;init_tfm() may have increased the descsize. */</div><div class='del'>-	if (WARN_ON_ONCE(hash-&gt;descsize &gt; HASH_MAX_DESCSIZE)) {</div><div class='del'>-		if (alg-&gt;exit_tfm)</div><div class='del'>-			alg-&gt;exit_tfm(hash);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return alg-&gt;init_tfm(hash);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void crypto_shash_free_instance(struct crypto_instance *inst)</div><div class='hunk'>@@ -227,6 +371,7 @@ const struct crypto_type crypto_shash_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SHASH,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_shash, base),</div><div class='add'>+	.algsize = offsetof(struct shash_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int crypto_grab_shash(struct crypto_shash_spawn *spawn,</div><div class='hunk'>@@ -273,8 +418,6 @@ struct crypto_shash *crypto_clone_shash(struct crypto_shash *hash)</div><div class='ctx'> 	if (IS_ERR(nhash))</div><div class='ctx'> 		return nhash;</div><div class='ctx'> </div><div class='del'>-	nhash-&gt;descsize = hash-&gt;descsize;</div><div class='del'>-</div><div class='ctx'> 	if (alg-&gt;clone_tfm) {</div><div class='ctx'> 		err = alg-&gt;clone_tfm(nhash, hash);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -283,6 +426,9 @@ struct crypto_shash *crypto_clone_shash(struct crypto_shash *hash)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (alg-&gt;exit_tfm)</div><div class='add'>+		crypto_shash_tfm(nhash)-&gt;exit = crypto_shash_exit_tfm;</div><div class='add'>+</div><div class='ctx'> 	return nhash;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(crypto_clone_shash);</div><div class='hunk'>@@ -303,14 +449,21 @@ int hash_prepare_alg(struct hash_alg_common *alg)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int shash_default_export_core(struct shash_desc *desc, void *out)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int shash_default_import_core(struct shash_desc *desc, const void *in)</div><div class='add'>+{</div><div class='add'>+	return -ENOSYS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int shash_prepare_alg(struct shash_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;halg.base;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (alg-&gt;descsize &gt; HASH_MAX_DESCSIZE)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if ((alg-&gt;export &amp;&amp; !alg-&gt;import) || (alg-&gt;import &amp;&amp; !alg-&gt;export))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -320,6 +473,7 @@ static int shash_prepare_alg(struct shash_alg *alg)</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;cra_type = &amp;crypto_shash_type;</div><div class='ctx'> 	base-&gt;cra_flags |= CRYPTO_ALG_TYPE_SHASH;</div><div class='add'>+	base-&gt;cra_flags |= CRYPTO_ALG_REQ_VIRT;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Handle missing optional functions.  For each one we can either</div><div class='hunk'>@@ -336,11 +490,30 @@ static int shash_prepare_alg(struct shash_alg *alg)</div><div class='ctx'> 		alg-&gt;finup = shash_default_finup;</div><div class='ctx'> 	if (!alg-&gt;digest)</div><div class='ctx'> 		alg-&gt;digest = shash_default_digest;</div><div class='del'>-	if (!alg-&gt;export)</div><div class='add'>+	if (!alg-&gt;export &amp;&amp; !alg-&gt;halg.statesize)</div><div class='ctx'> 		alg-&gt;halg.statesize = alg-&gt;descsize;</div><div class='ctx'> 	if (!alg-&gt;setkey)</div><div class='ctx'> 		alg-&gt;setkey = shash_no_setkey;</div><div class='ctx'> </div><div class='add'>+	if (base-&gt;cra_flags &amp; CRYPTO_AHASH_ALG_BLOCK_ONLY) {</div><div class='add'>+		BUILD_BUG_ON(MAX_ALGAPI_BLOCKSIZE &gt;= 256);</div><div class='add'>+		alg-&gt;descsize += base-&gt;cra_blocksize + 1;</div><div class='add'>+		alg-&gt;statesize += base-&gt;cra_blocksize + 1;</div><div class='add'>+		alg-&gt;export_core = alg-&gt;export;</div><div class='add'>+		alg-&gt;import_core = alg-&gt;import;</div><div class='add'>+	} else if (!alg-&gt;export_core || !alg-&gt;import_core) {</div><div class='add'>+		alg-&gt;export_core = shash_default_export_core;</div><div class='add'>+		alg-&gt;import_core = shash_default_import_core;</div><div class='add'>+		base-&gt;cra_flags |= CRYPTO_AHASH_ALG_NO_EXPORT_CORE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (alg-&gt;descsize &gt; HASH_MAX_DESCSIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (alg-&gt;statesize &gt; HASH_MAX_STATESIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	base-&gt;cra_reqsize = sizeof(struct shash_desc) + alg-&gt;descsize;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/crypto/sig.c b/crypto/sig.c<br/>index dfc7cae90802..beba745b6405 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sig.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sig.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sig.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/sig.c</a></div><div class='hunk'>@@ -74,6 +74,7 @@ static const struct crypto_type crypto_sig_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SIG,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_sig, base),</div><div class='add'>+	.algsize = offsetof(struct sig_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct crypto_sig *crypto_alloc_sig(const char *alg_name, u32 type, u32 mask)</div><div class='hunk'>@@ -102,6 +103,11 @@ static int sig_default_set_key(struct crypto_sig *tfm,</div><div class='ctx'> 	return -ENOSYS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int sig_default_size(struct crypto_sig *tfm)</div><div class='add'>+{</div><div class='add'>+	return DIV_ROUND_UP_POW2(crypto_sig_keysize(tfm), BITS_PER_BYTE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int sig_prepare_alg(struct sig_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_alg *base = &amp;alg-&gt;base;</div><div class='hunk'>@@ -117,9 +123,9 @@ static int sig_prepare_alg(struct sig_alg *alg)</div><div class='ctx'> 	if (!alg-&gt;key_size)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (!alg-&gt;max_size)</div><div class='del'>-		alg-&gt;max_size = alg-&gt;key_size;</div><div class='add'>+		alg-&gt;max_size = sig_default_size;</div><div class='ctx'> 	if (!alg-&gt;digest_size)</div><div class='del'>-		alg-&gt;digest_size = alg-&gt;key_size;</div><div class='add'>+		alg-&gt;digest_size = sig_default_size;</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;cra_type = &amp;crypto_sig_type;</div><div class='ctx'> 	base-&gt;cra_flags &amp;= ~CRYPTO_ALG_TYPE_MASK;</div><div class='head'>diff --git a/crypto/skcipher.c b/crypto/skcipher.c<br/>index 132075a905d9..de5fc91bba26 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/skcipher.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/skcipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/skcipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/skcipher.c</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> #include &lt;linux/cryptouser.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -28,258 +27,14 @@</div><div class='ctx'> </div><div class='ctx'> #define CRYPTO_ALG_TYPE_SKCIPHER_MASK	0x0000000e</div><div class='ctx'> </div><div class='del'>-enum {</div><div class='del'>-	SKCIPHER_WALK_SLOW = 1 &lt;&lt; 0,</div><div class='del'>-	SKCIPHER_WALK_COPY = 1 &lt;&lt; 1,</div><div class='del'>-	SKCIPHER_WALK_DIFF = 1 &lt;&lt; 2,</div><div class='del'>-	SKCIPHER_WALK_SLEEP = 1 &lt;&lt; 3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct crypto_type crypto_skcipher_type;</div><div class='ctx'> </div><div class='del'>-static int skcipher_walk_next(struct skcipher_walk *walk);</div><div class='del'>-</div><div class='del'>-static inline gfp_t skcipher_walk_gfp(struct skcipher_walk *walk)</div><div class='del'>-{</div><div class='del'>-	return walk-&gt;flags &amp; SKCIPHER_WALK_SLEEP ? GFP_KERNEL : GFP_ATOMIC;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline struct skcipher_alg *__crypto_skcipher_alg(</div><div class='ctx'> 	struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	return container_of(alg, struct skcipher_alg, base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * skcipher_walk_done() - finish one step of a skcipher_walk</div><div class='del'>- * @walk: the skcipher_walk</div><div class='del'>- * @res: number of bytes *not* processed (&gt;= 0) from walk-&gt;nbytes,</div><div class='del'>- *	 or a -errno value to terminate the walk due to an error</div><div class='del'>- *</div><div class='del'>- * This function cleans up after one step of walking through the source and</div><div class='del'>- * destination scatterlists, and advances to the next step if applicable.</div><div class='del'>- * walk-&gt;nbytes is set to the number of bytes available in the next step,</div><div class='del'>- * walk-&gt;total is set to the new total number of bytes remaining, and</div><div class='del'>- * walk-&gt;{src,dst}.virt.addr is set to the next pair of data pointers.  If there</div><div class='del'>- * is no more data, or if an error occurred (i.e. -errno return), then</div><div class='del'>- * walk-&gt;nbytes and walk-&gt;total are set to 0 and all resources owned by the</div><div class='del'>- * skcipher_walk are freed.</div><div class='del'>- *</div><div class='del'>- * Return: 0 or a -errno value.  If @res was a -errno value then it will be</div><div class='del'>- *	   returned, but other errors may occur too.</div><div class='del'>- */</div><div class='del'>-int skcipher_walk_done(struct skcipher_walk *walk, int res)</div><div class='del'>-{</div><div class='del'>-	unsigned int n = walk-&gt;nbytes; /* num bytes processed this step */</div><div class='del'>-	unsigned int total = 0; /* new total remaining */</div><div class='del'>-</div><div class='del'>-	if (!n)</div><div class='del'>-		goto finish;</div><div class='del'>-</div><div class='del'>-	if (likely(res &gt;= 0)) {</div><div class='del'>-		n -= res; /* subtract num bytes *not* processed */</div><div class='del'>-		total = walk-&gt;total - n;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(!(walk-&gt;flags &amp; (SKCIPHER_WALK_SLOW |</div><div class='del'>-				    SKCIPHER_WALK_COPY |</div><div class='del'>-				    SKCIPHER_WALK_DIFF)))) {</div><div class='del'>-		scatterwalk_advance(&amp;walk-&gt;in, n);</div><div class='del'>-	} else if (walk-&gt;flags &amp; SKCIPHER_WALK_DIFF) {</div><div class='del'>-		scatterwalk_done_src(&amp;walk-&gt;in, n);</div><div class='del'>-	} else if (walk-&gt;flags &amp; SKCIPHER_WALK_COPY) {</div><div class='del'>-		scatterwalk_advance(&amp;walk-&gt;in, n);</div><div class='del'>-		scatterwalk_map(&amp;walk-&gt;out);</div><div class='del'>-		memcpy(walk-&gt;out.addr, walk-&gt;page, n);</div><div class='del'>-	} else { /* SKCIPHER_WALK_SLOW */</div><div class='del'>-		if (res &gt; 0) {</div><div class='del'>-			/*</div><div class='del'>-			 * Didn't process all bytes.  Either the algorithm is</div><div class='del'>-			 * broken, or this was the last step and it turned out</div><div class='del'>-			 * the message wasn't evenly divisible into blocks but</div><div class='del'>-			 * the algorithm requires it.</div><div class='del'>-			 */</div><div class='del'>-			res = -EINVAL;</div><div class='del'>-			total = 0;</div><div class='del'>-		} else</div><div class='del'>-			memcpy_to_scatterwalk(&amp;walk-&gt;out, walk-&gt;out.addr, n);</div><div class='del'>-		goto dst_done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	scatterwalk_done_dst(&amp;walk-&gt;out, n);</div><div class='del'>-dst_done:</div><div class='del'>-</div><div class='del'>-	if (res &gt; 0)</div><div class='del'>-		res = 0;</div><div class='del'>-</div><div class='del'>-	walk-&gt;total = total;</div><div class='del'>-	walk-&gt;nbytes = 0;</div><div class='del'>-</div><div class='del'>-	if (total) {</div><div class='del'>-		if (walk-&gt;flags &amp; SKCIPHER_WALK_SLEEP)</div><div class='del'>-			cond_resched();</div><div class='del'>-		walk-&gt;flags &amp;= ~(SKCIPHER_WALK_SLOW | SKCIPHER_WALK_COPY |</div><div class='del'>-				 SKCIPHER_WALK_DIFF);</div><div class='del'>-		return skcipher_walk_next(walk);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-finish:</div><div class='del'>-	/* Short-circuit for the common/fast path. */</div><div class='del'>-	if (!((unsigned long)walk-&gt;buffer | (unsigned long)walk-&gt;page))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (walk-&gt;iv != walk-&gt;oiv)</div><div class='del'>-		memcpy(walk-&gt;oiv, walk-&gt;iv, walk-&gt;ivsize);</div><div class='del'>-	if (walk-&gt;buffer != walk-&gt;page)</div><div class='del'>-		kfree(walk-&gt;buffer);</div><div class='del'>-	if (walk-&gt;page)</div><div class='del'>-		free_page((unsigned long)walk-&gt;page);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(skcipher_walk_done);</div><div class='del'>-</div><div class='del'>-static int skcipher_next_slow(struct skcipher_walk *walk, unsigned int bsize)</div><div class='del'>-{</div><div class='del'>-	unsigned alignmask = walk-&gt;alignmask;</div><div class='del'>-	unsigned n;</div><div class='del'>-	void *buffer;</div><div class='del'>-</div><div class='del'>-	if (!walk-&gt;buffer)</div><div class='del'>-		walk-&gt;buffer = walk-&gt;page;</div><div class='del'>-	buffer = walk-&gt;buffer;</div><div class='del'>-	if (!buffer) {</div><div class='del'>-		/* Min size for a buffer of bsize bytes aligned to alignmask */</div><div class='del'>-		n = bsize + (alignmask &amp; ~(crypto_tfm_ctx_alignment() - 1));</div><div class='del'>-</div><div class='del'>-		buffer = kzalloc(n, skcipher_walk_gfp(walk));</div><div class='del'>-		if (!buffer)</div><div class='del'>-			return skcipher_walk_done(walk, -ENOMEM);</div><div class='del'>-		walk-&gt;buffer = buffer;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buffer = PTR_ALIGN(buffer, alignmask + 1);</div><div class='del'>-	memcpy_from_scatterwalk(buffer, &amp;walk-&gt;in, bsize);</div><div class='del'>-	walk-&gt;out.__addr = buffer;</div><div class='del'>-	walk-&gt;in.__addr = walk-&gt;out.addr;</div><div class='del'>-</div><div class='del'>-	walk-&gt;nbytes = bsize;</div><div class='del'>-	walk-&gt;flags |= SKCIPHER_WALK_SLOW;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int skcipher_next_copy(struct skcipher_walk *walk)</div><div class='del'>-{</div><div class='del'>-	void *tmp = walk-&gt;page;</div><div class='del'>-</div><div class='del'>-	scatterwalk_map(&amp;walk-&gt;in);</div><div class='del'>-	memcpy(tmp, walk-&gt;in.addr, walk-&gt;nbytes);</div><div class='del'>-	scatterwalk_unmap(&amp;walk-&gt;in);</div><div class='del'>-	/*</div><div class='del'>-	 * walk-&gt;in is advanced later when the number of bytes actually</div><div class='del'>-	 * processed (which might be less than walk-&gt;nbytes) is known.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	walk-&gt;in.__addr = tmp;</div><div class='del'>-	walk-&gt;out.__addr = tmp;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int skcipher_next_fast(struct skcipher_walk *walk)</div><div class='del'>-{</div><div class='del'>-	unsigned long diff;</div><div class='del'>-</div><div class='del'>-	diff = offset_in_page(walk-&gt;in.offset) -</div><div class='del'>-	       offset_in_page(walk-&gt;out.offset);</div><div class='del'>-	diff |= (u8 *)(sg_page(walk-&gt;in.sg) + (walk-&gt;in.offset &gt;&gt; PAGE_SHIFT)) -</div><div class='del'>-		(u8 *)(sg_page(walk-&gt;out.sg) + (walk-&gt;out.offset &gt;&gt; PAGE_SHIFT));</div><div class='del'>-</div><div class='del'>-	scatterwalk_map(&amp;walk-&gt;out);</div><div class='del'>-	walk-&gt;in.__addr = walk-&gt;out.__addr;</div><div class='del'>-</div><div class='del'>-	if (diff) {</div><div class='del'>-		walk-&gt;flags |= SKCIPHER_WALK_DIFF;</div><div class='del'>-		scatterwalk_map(&amp;walk-&gt;in);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int skcipher_walk_next(struct skcipher_walk *walk)</div><div class='del'>-{</div><div class='del'>-	unsigned int bsize;</div><div class='del'>-	unsigned int n;</div><div class='del'>-</div><div class='del'>-	n = walk-&gt;total;</div><div class='del'>-	bsize = min(walk-&gt;stride, max(n, walk-&gt;blocksize));</div><div class='del'>-	n = scatterwalk_clamp(&amp;walk-&gt;in, n);</div><div class='del'>-	n = scatterwalk_clamp(&amp;walk-&gt;out, n);</div><div class='del'>-</div><div class='del'>-	if (unlikely(n &lt; bsize)) {</div><div class='del'>-		if (unlikely(walk-&gt;total &lt; walk-&gt;blocksize))</div><div class='del'>-			return skcipher_walk_done(walk, -EINVAL);</div><div class='del'>-</div><div class='del'>-slow_path:</div><div class='del'>-		return skcipher_next_slow(walk, bsize);</div><div class='del'>-	}</div><div class='del'>-	walk-&gt;nbytes = n;</div><div class='del'>-</div><div class='del'>-	if (unlikely((walk-&gt;in.offset | walk-&gt;out.offset) &amp; walk-&gt;alignmask)) {</div><div class='del'>-		if (!walk-&gt;page) {</div><div class='del'>-			gfp_t gfp = skcipher_walk_gfp(walk);</div><div class='del'>-</div><div class='del'>-			walk-&gt;page = (void *)__get_free_page(gfp);</div><div class='del'>-			if (!walk-&gt;page)</div><div class='del'>-				goto slow_path;</div><div class='del'>-		}</div><div class='del'>-		walk-&gt;flags |= SKCIPHER_WALK_COPY;</div><div class='del'>-		return skcipher_next_copy(walk);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return skcipher_next_fast(walk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int skcipher_copy_iv(struct skcipher_walk *walk)</div><div class='del'>-{</div><div class='del'>-	unsigned alignmask = walk-&gt;alignmask;</div><div class='del'>-	unsigned ivsize = walk-&gt;ivsize;</div><div class='del'>-	unsigned aligned_stride = ALIGN(walk-&gt;stride, alignmask + 1);</div><div class='del'>-	unsigned size;</div><div class='del'>-	u8 *iv;</div><div class='del'>-</div><div class='del'>-	/* Min size for a buffer of stride + ivsize, aligned to alignmask */</div><div class='del'>-	size = aligned_stride + ivsize +</div><div class='del'>-	       (alignmask &amp; ~(crypto_tfm_ctx_alignment() - 1));</div><div class='del'>-</div><div class='del'>-	walk-&gt;buffer = kmalloc(size, skcipher_walk_gfp(walk));</div><div class='del'>-	if (!walk-&gt;buffer)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	iv = PTR_ALIGN(walk-&gt;buffer, alignmask + 1) + aligned_stride;</div><div class='del'>-</div><div class='del'>-	walk-&gt;iv = memcpy(iv, walk-&gt;iv, walk-&gt;ivsize);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int skcipher_walk_first(struct skcipher_walk *walk)</div><div class='del'>-{</div><div class='del'>-	if (WARN_ON_ONCE(in_hardirq()))</div><div class='del'>-		return -EDEADLK;</div><div class='del'>-</div><div class='del'>-	walk-&gt;buffer = NULL;</div><div class='del'>-	if (unlikely(((unsigned long)walk-&gt;iv &amp; walk-&gt;alignmask))) {</div><div class='del'>-		int err = skcipher_copy_iv(walk);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	walk-&gt;page = NULL;</div><div class='del'>-</div><div class='del'>-	return skcipher_walk_next(walk);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int skcipher_walk_virt(struct skcipher_walk *__restrict walk,</div><div class='ctx'> 		       struct skcipher_request *__restrict req, bool atomic)</div><div class='ctx'> {</div><div class='hunk'>@@ -294,10 +49,8 @@ int skcipher_walk_virt(struct skcipher_walk *__restrict walk,</div><div class='ctx'> 	walk-&gt;nbytes = 0;</div><div class='ctx'> 	walk-&gt;iv = req-&gt;iv;</div><div class='ctx'> 	walk-&gt;oiv = req-&gt;iv;</div><div class='del'>-	if ((req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP) &amp;&amp; !atomic)</div><div class='del'>-		walk-&gt;flags = SKCIPHER_WALK_SLEEP;</div><div class='del'>-	else</div><div class='del'>-		walk-&gt;flags = 0;</div><div class='add'>+	if (!(req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP))</div><div class='add'>+		atomic = true;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!walk-&gt;total))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -314,7 +67,7 @@ int skcipher_walk_virt(struct skcipher_walk *__restrict walk,</div><div class='ctx'> 	else</div><div class='ctx'> 		walk-&gt;stride = alg-&gt;walksize;</div><div class='ctx'> </div><div class='del'>-	return skcipher_walk_first(walk);</div><div class='add'>+	return skcipher_walk_first(walk, atomic);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(skcipher_walk_virt);</div><div class='ctx'> </div><div class='hunk'>@@ -327,10 +80,8 @@ static int skcipher_walk_aead_common(struct skcipher_walk *__restrict walk,</div><div class='ctx'> 	walk-&gt;nbytes = 0;</div><div class='ctx'> 	walk-&gt;iv = req-&gt;iv;</div><div class='ctx'> 	walk-&gt;oiv = req-&gt;iv;</div><div class='del'>-	if ((req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP) &amp;&amp; !atomic)</div><div class='del'>-		walk-&gt;flags = SKCIPHER_WALK_SLEEP;</div><div class='del'>-	else</div><div class='del'>-		walk-&gt;flags = 0;</div><div class='add'>+	if (!(req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP))</div><div class='add'>+		atomic = true;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!walk-&gt;total))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -343,7 +94,7 @@ static int skcipher_walk_aead_common(struct skcipher_walk *__restrict walk,</div><div class='ctx'> 	walk-&gt;ivsize = crypto_aead_ivsize(tfm);</div><div class='ctx'> 	walk-&gt;alignmask = crypto_aead_alignmask(tfm);</div><div class='ctx'> </div><div class='del'>-	return skcipher_walk_first(walk);</div><div class='add'>+	return skcipher_walk_first(walk, atomic);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int skcipher_walk_aead_encrypt(struct skcipher_walk *__restrict walk,</div><div class='hunk'>@@ -620,6 +371,7 @@ static const struct crypto_type crypto_skcipher_type = {</div><div class='ctx'> 	.maskset = CRYPTO_ALG_TYPE_SKCIPHER_MASK,</div><div class='ctx'> 	.type = CRYPTO_ALG_TYPE_SKCIPHER,</div><div class='ctx'> 	.tfmsize = offsetof(struct crypto_skcipher, base),</div><div class='add'>+	.algsize = offsetof(struct skcipher_alg, base),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int crypto_grab_skcipher(struct crypto_skcipher_spawn *spawn,</div><div class='head'>diff --git a/crypto/sm3_generic.c b/crypto/sm3_generic.c<br/>index a2d23a46924e..7529139fcc96 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sm3_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sm3_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sm3_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/sm3_generic.c</a></div><div class='hunk'>@@ -9,15 +9,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3.h&gt;</div><div class='ctx'> #include &lt;crypto/sm3_base.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> const u8 sm3_zero_message_hash[SM3_DIGEST_SIZE] = {</div><div class='ctx'> 	0x1A, 0xB2, 0x1D, 0x83, 0x55, 0xCF, 0xA1, 0x7F,</div><div class='hunk'>@@ -30,38 +25,28 @@ EXPORT_SYMBOL_GPL(sm3_zero_message_hash);</div><div class='ctx'> static int crypto_sm3_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			  unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	sm3_update(shash_desc_ctx(desc), data, len);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int crypto_sm3_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	sm3_final(shash_desc_ctx(desc), out);</div><div class='del'>-	return 0;</div><div class='add'>+	return sm3_base_do_update_blocks(desc, data, len, sm3_block_generic);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int crypto_sm3_finup(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			unsigned int len, u8 *hash)</div><div class='ctx'> {</div><div class='del'>-	struct sm3_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	if (len)</div><div class='del'>-		sm3_update(sctx, data, len);</div><div class='del'>-	sm3_final(sctx, hash);</div><div class='del'>-	return 0;</div><div class='add'>+	sm3_base_do_finup(desc, data, len, sm3_block_generic);</div><div class='add'>+	return sm3_base_finish(desc, hash);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sm3_alg = {</div><div class='ctx'> 	.digestsize	=	SM3_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	sm3_base_init,</div><div class='ctx'> 	.update		=	crypto_sm3_update,</div><div class='del'>-	.final		=	crypto_sm3_final,</div><div class='ctx'> 	.finup		=	crypto_sm3_finup,</div><div class='del'>-	.descsize	=	sizeof(struct sm3_state),</div><div class='add'>+	.descsize	=	SM3_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"sm3",</div><div class='ctx'> 		.cra_driver_name =	"sm3-generic",</div><div class='ctx'> 		.cra_priority	=	100,</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+					CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize	 =	SM3_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -77,7 +62,7 @@ static void __exit sm3_generic_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;sm3_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(sm3_generic_mod_init);</div><div class='add'>+module_init(sm3_generic_mod_init);</div><div class='ctx'> module_exit(sm3_generic_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/crypto/sm4_generic.c b/crypto/sm4_generic.c<br/>index 7df86369ac00..d57444e8428c 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/sm4_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/sm4_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/sm4_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/sm4_generic.c</a></div><div class='hunk'>@@ -83,7 +83,7 @@ static void __exit sm4_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;sm4_alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(sm4_init);</div><div class='add'>+module_init(sm4_init);</div><div class='ctx'> module_exit(sm4_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("SM4 Cipher Algorithm");</div><div class='head'>diff --git a/crypto/streebog_generic.c b/crypto/streebog_generic.c<br/>index dc625ffc54ad..57bbf70f4c22 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/streebog_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/streebog_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/streebog_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/streebog_generic.c</a></div><div class='hunk'>@@ -13,9 +13,10 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;crypto/streebog.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const struct streebog_uint512 buffer0 = { {</div><div class='ctx'> 	0, 0, 0, 0, 0, 0, 0, 0</div><div class='hunk'>@@ -919,17 +920,6 @@ static int streebog_init(struct shash_desc *desc)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void streebog_pad(struct streebog_state *ctx)</div><div class='del'>-{</div><div class='del'>-	if (ctx-&gt;fillsize &gt;= STREEBOG_BLOCK_SIZE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	memset(ctx-&gt;buffer + ctx-&gt;fillsize, 0,</div><div class='del'>-	       sizeof(ctx-&gt;buffer) - ctx-&gt;fillsize);</div><div class='del'>-</div><div class='del'>-	ctx-&gt;buffer[ctx-&gt;fillsize] = 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void streebog_add512(const struct streebog_uint512 *x,</div><div class='ctx'> 			    const struct streebog_uint512 *y,</div><div class='ctx'> 			    struct streebog_uint512 *r)</div><div class='hunk'>@@ -984,16 +974,23 @@ static void streebog_stage2(struct streebog_state *ctx, const u8 *data)</div><div class='ctx'> 	streebog_add512(&amp;ctx-&gt;Sigma, &amp;m, &amp;ctx-&gt;Sigma);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void streebog_stage3(struct streebog_state *ctx)</div><div class='add'>+static void streebog_stage3(struct streebog_state *ctx, const u8 *src,</div><div class='add'>+			    unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct streebog_uint512 buf = { { 0 } };</div><div class='add'>+	union {</div><div class='add'>+		u8 buffer[STREEBOG_BLOCK_SIZE];</div><div class='add'>+		struct streebog_uint512 m;</div><div class='add'>+	} u = {};</div><div class='ctx'> </div><div class='del'>-	buf.qword[0] = cpu_to_le64(ctx-&gt;fillsize &lt;&lt; 3);</div><div class='del'>-	streebog_pad(ctx);</div><div class='add'>+	buf.qword[0] = cpu_to_le64(len &lt;&lt; 3);</div><div class='add'>+	memcpy(u.buffer, src, len);</div><div class='add'>+	u.buffer[len] = 1;</div><div class='ctx'> </div><div class='del'>-	streebog_g(&amp;ctx-&gt;h, &amp;ctx-&gt;N, &amp;ctx-&gt;m);</div><div class='add'>+	streebog_g(&amp;ctx-&gt;h, &amp;ctx-&gt;N, &amp;u.m);</div><div class='ctx'> 	streebog_add512(&amp;ctx-&gt;N, &amp;buf, &amp;ctx-&gt;N);</div><div class='del'>-	streebog_add512(&amp;ctx-&gt;Sigma, &amp;ctx-&gt;m, &amp;ctx-&gt;Sigma);</div><div class='add'>+	streebog_add512(&amp;ctx-&gt;Sigma, &amp;u.m, &amp;ctx-&gt;Sigma);</div><div class='add'>+	memzero_explicit(&amp;u, sizeof(u));</div><div class='ctx'> 	streebog_g(&amp;ctx-&gt;h, &amp;buffer0, &amp;ctx-&gt;N);</div><div class='ctx'> 	streebog_g(&amp;ctx-&gt;h, &amp;buffer0, &amp;ctx-&gt;Sigma);</div><div class='ctx'> 	memcpy(&amp;ctx-&gt;hash, &amp;ctx-&gt;h, sizeof(struct streebog_uint512));</div><div class='hunk'>@@ -1003,42 +1000,22 @@ static int streebog_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			   unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct streebog_state *ctx = shash_desc_ctx(desc);</div><div class='del'>-	size_t chunksize;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;fillsize) {</div><div class='del'>-		chunksize = STREEBOG_BLOCK_SIZE - ctx-&gt;fillsize;</div><div class='del'>-		if (chunksize &gt; len)</div><div class='del'>-			chunksize = len;</div><div class='del'>-		memcpy(&amp;ctx-&gt;buffer[ctx-&gt;fillsize], data, chunksize);</div><div class='del'>-		ctx-&gt;fillsize += chunksize;</div><div class='del'>-		len  -= chunksize;</div><div class='del'>-		data += chunksize;</div><div class='del'>-</div><div class='del'>-		if (ctx-&gt;fillsize == STREEBOG_BLOCK_SIZE) {</div><div class='del'>-			streebog_stage2(ctx, ctx-&gt;buffer);</div><div class='del'>-			ctx-&gt;fillsize = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (len &gt;= STREEBOG_BLOCK_SIZE) {</div><div class='add'>+	do {</div><div class='ctx'> 		streebog_stage2(ctx, data);</div><div class='ctx'> 		data += STREEBOG_BLOCK_SIZE;</div><div class='ctx'> 		len  -= STREEBOG_BLOCK_SIZE;</div><div class='del'>-	}</div><div class='add'>+	} while (len &gt;= STREEBOG_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	if (len) {</div><div class='del'>-		memcpy(&amp;ctx-&gt;buffer, data, len);</div><div class='del'>-		ctx-&gt;fillsize = len;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int streebog_final(struct shash_desc *desc, u8 *digest)</div><div class='add'>+static int streebog_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			  unsigned int len, u8 *digest)</div><div class='ctx'> {</div><div class='ctx'> 	struct streebog_state *ctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	streebog_stage3(ctx);</div><div class='del'>-	ctx-&gt;fillsize = 0;</div><div class='add'>+	streebog_stage3(ctx, src, len);</div><div class='ctx'> 	if (crypto_shash_digestsize(desc-&gt;tfm) == STREEBOG256_DIGEST_SIZE)</div><div class='ctx'> 		memcpy(digest, &amp;ctx-&gt;hash.qword[4], STREEBOG256_DIGEST_SIZE);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1050,11 +1027,12 @@ static struct shash_alg algs[2] = { {</div><div class='ctx'> 	.digestsize	=	STREEBOG256_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	streebog_init,</div><div class='ctx'> 	.update		=	streebog_update,</div><div class='del'>-	.final		=	streebog_final,</div><div class='add'>+	.finup		=	streebog_finup,</div><div class='ctx'> 	.descsize	=	sizeof(struct streebog_state),</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"streebog256",</div><div class='ctx'> 		.cra_driver_name =	"streebog256-generic",</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	STREEBOG_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1062,11 +1040,12 @@ static struct shash_alg algs[2] = { {</div><div class='ctx'> 	.digestsize	=	STREEBOG512_DIGEST_SIZE,</div><div class='ctx'> 	.init		=	streebog_init,</div><div class='ctx'> 	.update		=	streebog_update,</div><div class='del'>-	.final		=	streebog_final,</div><div class='add'>+	.finup		=	streebog_finup,</div><div class='ctx'> 	.descsize	=	sizeof(struct streebog_state),</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name	 =	"streebog512",</div><div class='ctx'> 		.cra_driver_name =	"streebog512-generic",</div><div class='add'>+		.cra_flags	 =	CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize	 =	STREEBOG_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module	 =	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1082,7 +1061,7 @@ static void __exit streebog_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shashes(algs, ARRAY_SIZE(algs));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(streebog_mod_init);</div><div class='add'>+module_init(streebog_mod_init);</div><div class='ctx'> module_exit(streebog_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c<br/>index 96f4a66be14c..d1d88debbd71 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/tcrypt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/tcrypt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/tcrypt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/tcrypt.c</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='del'>- * Quick &amp; dirty crypto testing module.</div><div class='add'>+ * Quick &amp; dirty crypto benchmarking module.</div><div class='ctx'>  *</div><div class='del'>- * This will only exist until we have a better testing mechanism</div><div class='add'>+ * This will only exist until we have a better benchmarking mechanism</div><div class='ctx'>  * (e.g. a char device).</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='hunk'>@@ -39,7 +39,7 @@</div><div class='ctx'> #include "tcrypt.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Need slab memory for testing (size in number of pages).</div><div class='add'>+ * Need slab memory for benchmarking (size in number of pages).</div><div class='ctx'>  */</div><div class='ctx'> #define TVMEMSIZE	4</div><div class='ctx'> </div><div class='hunk'>@@ -716,207 +716,6 @@ static inline int do_one_ahash_op(struct ahash_request *req, int ret)</div><div class='ctx'> 	return crypto_wait_req(ret, wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct test_mb_ahash_data {</div><div class='del'>-	struct scatterlist sg[XBUFSIZE];</div><div class='del'>-	char result[64];</div><div class='del'>-	struct ahash_request *req;</div><div class='del'>-	struct crypto_wait wait;</div><div class='del'>-	char *xbuf[XBUFSIZE];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline int do_mult_ahash_op(struct test_mb_ahash_data *data, u32 num_mb,</div><div class='del'>-				   int *rc)</div><div class='del'>-{</div><div class='del'>-	int i, err;</div><div class='del'>-</div><div class='del'>-	/* Fire up a bunch of concurrent requests */</div><div class='del'>-	err = crypto_ahash_digest(data[0].req);</div><div class='del'>-</div><div class='del'>-	/* Wait for all requests to finish */</div><div class='del'>-	err = crypto_wait_req(err, &amp;data[0].wait);</div><div class='del'>-	if (num_mb &lt; 2)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_mb; i++) {</div><div class='del'>-		rc[i] = ahash_request_err(data[i].req);</div><div class='del'>-		if (rc[i]) {</div><div class='del'>-			pr_info("concurrent request %d error %d\n", i, rc[i]);</div><div class='del'>-			err = rc[i];</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int test_mb_ahash_jiffies(struct test_mb_ahash_data *data, int blen,</div><div class='del'>-				 int secs, u32 num_mb)</div><div class='del'>-{</div><div class='del'>-	unsigned long start, end;</div><div class='del'>-	int bcount;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	int *rc;</div><div class='del'>-</div><div class='del'>-	rc = kcalloc(num_mb, sizeof(*rc), GFP_KERNEL);</div><div class='del'>-	if (!rc)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (start = jiffies, end = start + secs * HZ, bcount = 0;</div><div class='del'>-	     time_before(jiffies, end); bcount++) {</div><div class='del'>-		ret = do_mult_ahash_op(data, num_mb, rc);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_cont("%d operations in %d seconds (%llu bytes)\n",</div><div class='del'>-		bcount * num_mb, secs, (u64)bcount * blen * num_mb);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	kfree(rc);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int test_mb_ahash_cycles(struct test_mb_ahash_data *data, int blen,</div><div class='del'>-				u32 num_mb)</div><div class='del'>-{</div><div class='del'>-	unsigned long cycles = 0;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	int i;</div><div class='del'>-	int *rc;</div><div class='del'>-</div><div class='del'>-	rc = kcalloc(num_mb, sizeof(*rc), GFP_KERNEL);</div><div class='del'>-	if (!rc)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* Warm-up run. */</div><div class='del'>-	for (i = 0; i &lt; 4; i++) {</div><div class='del'>-		ret = do_mult_ahash_op(data, num_mb, rc);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* The real thing. */</div><div class='del'>-	for (i = 0; i &lt; 8; i++) {</div><div class='del'>-		cycles_t start, end;</div><div class='del'>-</div><div class='del'>-		start = get_cycles();</div><div class='del'>-		ret = do_mult_ahash_op(data, num_mb, rc);</div><div class='del'>-		end = get_cycles();</div><div class='del'>-</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		cycles += end - start;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_cont("1 operation in %lu cycles (%d bytes)\n",</div><div class='del'>-		(cycles + 4) / (8 * num_mb), blen);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	kfree(rc);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void test_mb_ahash_speed(const char *algo, unsigned int secs,</div><div class='del'>-				struct hash_speed *speed, u32 num_mb)</div><div class='del'>-{</div><div class='del'>-	struct test_mb_ahash_data *data;</div><div class='del'>-	struct crypto_ahash *tfm;</div><div class='del'>-	unsigned int i, j, k;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	data = kcalloc(num_mb, sizeof(*data), GFP_KERNEL);</div><div class='del'>-	if (!data)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	tfm = crypto_alloc_ahash(algo, 0, 0);</div><div class='del'>-	if (IS_ERR(tfm)) {</div><div class='del'>-		pr_err("failed to load transform for %s: %ld\n",</div><div class='del'>-			algo, PTR_ERR(tfm));</div><div class='del'>-		goto free_data;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_mb; ++i) {</div><div class='del'>-		if (testmgr_alloc_buf(data[i].xbuf))</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		crypto_init_wait(&amp;data[i].wait);</div><div class='del'>-</div><div class='del'>-		data[i].req = ahash_request_alloc(tfm, GFP_KERNEL);</div><div class='del'>-		if (!data[i].req) {</div><div class='del'>-			pr_err("alg: hash: Failed to allocate request for %s\n",</div><div class='del'>-			       algo);</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		if (i) {</div><div class='del'>-			ahash_request_set_callback(data[i].req, 0, NULL, NULL);</div><div class='del'>-			ahash_request_chain(data[i].req, data[0].req);</div><div class='del'>-		} else</div><div class='del'>-			ahash_request_set_callback(data[0].req, 0,</div><div class='del'>-						   crypto_req_done,</div><div class='del'>-						   &amp;data[0].wait);</div><div class='del'>-</div><div class='del'>-		sg_init_table(data[i].sg, XBUFSIZE);</div><div class='del'>-		for (j = 0; j &lt; XBUFSIZE; j++) {</div><div class='del'>-			sg_set_buf(data[i].sg + j, data[i].xbuf[j], PAGE_SIZE);</div><div class='del'>-			memset(data[i].xbuf[j], 0xff, PAGE_SIZE);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_info("\ntesting speed of multibuffer %s (%s)\n", algo,</div><div class='del'>-		get_driver_name(crypto_ahash, tfm));</div><div class='del'>-</div><div class='del'>-	for (i = 0; speed[i].blen != 0; i++) {</div><div class='del'>-		/* For some reason this only tests digests. */</div><div class='del'>-		if (speed[i].blen != speed[i].plen)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (speed[i].blen &gt; XBUFSIZE * PAGE_SIZE) {</div><div class='del'>-			pr_err("template (%u) too big for tvmem (%lu)\n",</div><div class='del'>-			       speed[i].blen, XBUFSIZE * PAGE_SIZE);</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (klen)</div><div class='del'>-			crypto_ahash_setkey(tfm, tvmem[0], klen);</div><div class='del'>-</div><div class='del'>-		for (k = 0; k &lt; num_mb; k++)</div><div class='del'>-			ahash_request_set_crypt(data[k].req, data[k].sg,</div><div class='del'>-						data[k].result, speed[i].blen);</div><div class='del'>-</div><div class='del'>-		pr_info("test%3u "</div><div class='del'>-			"(%5u byte blocks,%5u bytes per update,%4u updates): ",</div><div class='del'>-			i, speed[i].blen, speed[i].plen,</div><div class='del'>-			speed[i].blen / speed[i].plen);</div><div class='del'>-</div><div class='del'>-		if (secs) {</div><div class='del'>-			ret = test_mb_ahash_jiffies(data, speed[i].blen, secs,</div><div class='del'>-						    num_mb);</div><div class='del'>-			cond_resched();</div><div class='del'>-		} else {</div><div class='del'>-			ret = test_mb_ahash_cycles(data, speed[i].blen, num_mb);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		if (ret) {</div><div class='del'>-			pr_err("At least one hashing failed ret=%d\n", ret);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	ahash_request_free(data[0].req);</div><div class='del'>-</div><div class='del'>-	for (k = 0; k &lt; num_mb; ++k)</div><div class='del'>-		testmgr_free_buf(data[k].xbuf);</div><div class='del'>-</div><div class='del'>-	crypto_free_ahash(tfm);</div><div class='del'>-</div><div class='del'>-free_data:</div><div class='del'>-	kfree(data);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int test_ahash_jiffies_digest(struct ahash_request *req, int blen,</div><div class='ctx'> 				     char *out, int secs)</div><div class='ctx'> {</div><div class='hunk'>@@ -2584,36 +2383,6 @@ static int do_test(const char *alg, u32 type, u32 mask, int m, u32 num_mb)</div><div class='ctx'> 		test_ahash_speed("sm3", sec, generic_hash_speed_template);</div><div class='ctx'> 		if (mode &gt; 400 &amp;&amp; mode &lt; 500) break;</div><div class='ctx'> 		fallthrough;</div><div class='del'>-	case 450:</div><div class='del'>-		test_mb_ahash_speed("sha1", sec, generic_hash_speed_template,</div><div class='del'>-				    num_mb);</div><div class='del'>-		if (mode &gt; 400 &amp;&amp; mode &lt; 500) break;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case 451:</div><div class='del'>-		test_mb_ahash_speed("sha256", sec, generic_hash_speed_template,</div><div class='del'>-				    num_mb);</div><div class='del'>-		if (mode &gt; 400 &amp;&amp; mode &lt; 500) break;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case 452:</div><div class='del'>-		test_mb_ahash_speed("sha512", sec, generic_hash_speed_template,</div><div class='del'>-				    num_mb);</div><div class='del'>-		if (mode &gt; 400 &amp;&amp; mode &lt; 500) break;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case 453:</div><div class='del'>-		test_mb_ahash_speed("sm3", sec, generic_hash_speed_template,</div><div class='del'>-				    num_mb);</div><div class='del'>-		if (mode &gt; 400 &amp;&amp; mode &lt; 500) break;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case 454:</div><div class='del'>-		test_mb_ahash_speed("streebog256", sec,</div><div class='del'>-				    generic_hash_speed_template, num_mb);</div><div class='del'>-		if (mode &gt; 400 &amp;&amp; mode &lt; 500) break;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case 455:</div><div class='del'>-		test_mb_ahash_speed("streebog512", sec,</div><div class='del'>-				    generic_hash_speed_template, num_mb);</div><div class='del'>-		if (mode &gt; 400 &amp;&amp; mode &lt; 500) break;</div><div class='del'>-		fallthrough;</div><div class='ctx'> 	case 499:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -3099,5 +2868,5 @@ module_param(klen, uint, 0);</div><div class='ctx'> MODULE_PARM_DESC(klen, "Key length (defaults to 0)");</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("Quick &amp; dirty crypto testing module");</div><div class='add'>+MODULE_DESCRIPTION("Quick &amp; dirty crypto benchmarking module");</div><div class='ctx'> MODULE_AUTHOR("James Morris &lt;jmorris@intercode.com.au&gt;");</div><div class='head'>diff --git a/crypto/tcrypt.h b/crypto/tcrypt.h<br/>index 96c843a24607..7f938ac93e58 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/tcrypt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/tcrypt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/tcrypt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/tcrypt.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /*</div><div class='del'>- * Quick &amp; dirty crypto testing module.</div><div class='add'>+ * Quick &amp; dirty crypto benchmarking module.</div><div class='ctx'>  *</div><div class='del'>- * This will only exist until we have a better testing mechanism</div><div class='add'>+ * This will only exist until we have a better benchmarking mechanism</div><div class='ctx'>  * (e.g. a char device).</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2002 James Morris &lt;jmorris@intercode.com.au&gt;</div><div class='head'>diff --git a/crypto/tea.c b/crypto/tea.c<br/>index b315da8c89eb..cb05140e3470 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/tea.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/tea.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/tea.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/tea.c</a></div><div class='hunk'>@@ -255,7 +255,7 @@ MODULE_ALIAS_CRYPTO("tea");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("xtea");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("xeta");</div><div class='ctx'> </div><div class='del'>-subsys_initcall(tea_mod_init);</div><div class='add'>+module_init(tea_mod_init);</div><div class='ctx'> module_exit(tea_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/testmgr.c b/crypto/testmgr.c<br/>index abd609d4c8ef..72005074a5c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/testmgr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/testmgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/testmgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/testmgr.c</a></div><div class='hunk'>@@ -43,25 +43,17 @@ MODULE_IMPORT_NS("CRYPTO_INTERNAL");</div><div class='ctx'> </div><div class='ctx'> static bool notests;</div><div class='ctx'> module_param(notests, bool, 0644);</div><div class='del'>-MODULE_PARM_DESC(notests, "disable crypto self-tests");</div><div class='add'>+MODULE_PARM_DESC(notests, "disable all crypto self-tests");</div><div class='ctx'> </div><div class='del'>-static bool panic_on_fail;</div><div class='del'>-module_param(panic_on_fail, bool, 0444);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-static bool noextratests;</div><div class='del'>-module_param(noextratests, bool, 0644);</div><div class='del'>-MODULE_PARM_DESC(noextratests, "disable expensive crypto self-tests");</div><div class='add'>+static bool noslowtests;</div><div class='add'>+module_param(noslowtests, bool, 0644);</div><div class='add'>+MODULE_PARM_DESC(noslowtests, "disable slow crypto self-tests");</div><div class='ctx'> </div><div class='ctx'> static unsigned int fuzz_iterations = 100;</div><div class='ctx'> module_param(fuzz_iterations, uint, 0644);</div><div class='ctx'> MODULE_PARM_DESC(fuzz_iterations, "number of fuzz test iterations");</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* Multibuffer is unlimited.  Set arbitrary limit for testing. */</div><div class='del'>-#define MAX_MB_MSGS	16</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_DISABLE_TESTS</div><div class='add'>+#ifndef CONFIG_CRYPTO_SELFTESTS</div><div class='ctx'> </div><div class='ctx'> /* a perfect nop */</div><div class='ctx'> int alg_test(const char *driver, const char *alg, u32 type, u32 mask)</div><div class='hunk'>@@ -327,10 +319,9 @@ struct testvec_config {</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The following are the lists of testvec_configs to test for each algorithm</div><div class='del'>- * type when the basic crypto self-tests are enabled, i.e. when</div><div class='del'>- * CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is unset.  They aim to provide good test</div><div class='del'>- * coverage, while keeping the test time much shorter than the full fuzz tests</div><div class='del'>- * so that the basic tests can be enabled in a wider range of circumstances.</div><div class='add'>+ * type when the fast crypto self-tests are enabled.  They aim to provide good</div><div class='add'>+ * test coverage, while keeping the test time much shorter than the full tests</div><div class='add'>+ * so that the fast tests can be used to fulfill FIPS 140 testing requirements.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* Configs for skciphers and aeads */</div><div class='hunk'>@@ -879,8 +870,6 @@ static int prepare_keybuf(const u8 *key, unsigned int ksize,</div><div class='ctx'> 	err;								\</div><div class='ctx'> })</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * The fuzz tests use prandom instead of the normal Linux RNG since they don't</div><div class='ctx'>  * need cryptographically secure random numbers.  This greatly improves the</div><div class='hunk'>@@ -1245,15 +1234,6 @@ too_long:</div><div class='ctx'> 	       algname);</div><div class='ctx'> 	return -ENAMETOOLONG;</div><div class='ctx'> }</div><div class='del'>-#else /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='del'>-static void crypto_disable_simd_for_test(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void crypto_reenable_simd_for_test(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='ctx'> </div><div class='ctx'> static int build_hash_sglist(struct test_sglist *tsgl,</div><div class='ctx'> 			     const struct hash_testvec *vec,</div><div class='hunk'>@@ -1694,8 +1674,7 @@ static int test_hash_vec(const struct hash_testvec *vec, unsigned int vec_num,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-	if (!noextratests) {</div><div class='add'>+	if (!noslowtests) {</div><div class='ctx'> 		struct rnd_state rng;</div><div class='ctx'> 		struct testvec_config cfg;</div><div class='ctx'> 		char cfgname[TESTVEC_CONFIG_NAMELEN];</div><div class='hunk'>@@ -1712,17 +1691,15 @@ static int test_hash_vec(const struct hash_testvec *vec, unsigned int vec_num,</div><div class='ctx'> 			cond_resched();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='ctx'> /*</div><div class='ctx'>  * Generate a hash test vector from the given implementation.</div><div class='ctx'>  * Assumes the buffers in 'vec' were already allocated.</div><div class='ctx'>  */</div><div class='ctx'> static void generate_random_hash_testvec(struct rnd_state *rng,</div><div class='del'>-					 struct shash_desc *desc,</div><div class='add'>+					 struct ahash_request *req,</div><div class='ctx'> 					 struct hash_testvec *vec,</div><div class='ctx'> 					 unsigned int maxkeysize,</div><div class='ctx'> 					 unsigned int maxdatasize,</div><div class='hunk'>@@ -1744,16 +1721,17 @@ static void generate_random_hash_testvec(struct rnd_state *rng,</div><div class='ctx'> 			vec-&gt;ksize = prandom_u32_inclusive(rng, 1, maxkeysize);</div><div class='ctx'> 		generate_random_bytes(rng, (u8 *)vec-&gt;key, vec-&gt;ksize);</div><div class='ctx'> </div><div class='del'>-		vec-&gt;setkey_error = crypto_shash_setkey(desc-&gt;tfm, vec-&gt;key,</div><div class='del'>-							vec-&gt;ksize);</div><div class='add'>+		vec-&gt;setkey_error = crypto_ahash_setkey(</div><div class='add'>+			crypto_ahash_reqtfm(req), vec-&gt;key, vec-&gt;ksize);</div><div class='ctx'> 		/* If the key couldn't be set, no need to continue to digest. */</div><div class='ctx'> 		if (vec-&gt;setkey_error)</div><div class='ctx'> 			goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Digest */</div><div class='del'>-	vec-&gt;digest_error = crypto_shash_digest(desc, vec-&gt;plaintext,</div><div class='del'>-						vec-&gt;psize, (u8 *)vec-&gt;digest);</div><div class='add'>+	vec-&gt;digest_error = crypto_hash_digest(</div><div class='add'>+		crypto_ahash_reqtfm(req), vec-&gt;plaintext,</div><div class='add'>+		vec-&gt;psize, (u8 *)vec-&gt;digest);</div><div class='ctx'> done:</div><div class='ctx'> 	snprintf(name, max_namelen, "\"random: psize=%u ksize=%u\"",</div><div class='ctx'> 		 vec-&gt;psize, vec-&gt;ksize);</div><div class='hunk'>@@ -1778,8 +1756,8 @@ static int test_hash_vs_generic_impl(const char *generic_driver,</div><div class='ctx'> 	const char *driver = crypto_ahash_driver_name(tfm);</div><div class='ctx'> 	struct rnd_state rng;</div><div class='ctx'> 	char _generic_driver[CRYPTO_MAX_ALG_NAME];</div><div class='del'>-	struct crypto_shash *generic_tfm = NULL;</div><div class='del'>-	struct shash_desc *generic_desc = NULL;</div><div class='add'>+	struct ahash_request *generic_req = NULL;</div><div class='add'>+	struct crypto_ahash *generic_tfm = NULL;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct hash_testvec vec = { 0 };</div><div class='ctx'> 	char vec_name[64];</div><div class='hunk'>@@ -1787,7 +1765,7 @@ static int test_hash_vs_generic_impl(const char *generic_driver,</div><div class='ctx'> 	char cfgname[TESTVEC_CONFIG_NAMELEN];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (noextratests)</div><div class='add'>+	if (noslowtests)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	init_rnd_state(&amp;rng);</div><div class='hunk'>@@ -1802,7 +1780,7 @@ static int test_hash_vs_generic_impl(const char *generic_driver,</div><div class='ctx'> 	if (strcmp(generic_driver, driver) == 0) /* Already the generic impl? */</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	generic_tfm = crypto_alloc_shash(generic_driver, 0, 0);</div><div class='add'>+	generic_tfm = crypto_alloc_ahash(generic_driver, 0, 0);</div><div class='ctx'> 	if (IS_ERR(generic_tfm)) {</div><div class='ctx'> 		err = PTR_ERR(generic_tfm);</div><div class='ctx'> 		if (err == -ENOENT) {</div><div class='hunk'>@@ -1821,27 +1799,25 @@ static int test_hash_vs_generic_impl(const char *generic_driver,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	generic_desc = kzalloc(sizeof(*desc) +</div><div class='del'>-			       crypto_shash_descsize(generic_tfm), GFP_KERNEL);</div><div class='del'>-	if (!generic_desc) {</div><div class='add'>+	generic_req = ahash_request_alloc(generic_tfm, GFP_KERNEL);</div><div class='add'>+	if (!generic_req) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='del'>-	generic_desc-&gt;tfm = generic_tfm;</div><div class='ctx'> </div><div class='ctx'> 	/* Check the algorithm properties for consistency. */</div><div class='ctx'> </div><div class='del'>-	if (digestsize != crypto_shash_digestsize(generic_tfm)) {</div><div class='add'>+	if (digestsize != crypto_ahash_digestsize(generic_tfm)) {</div><div class='ctx'> 		pr_err("alg: hash: digestsize for %s (%u) doesn't match generic impl (%u)\n",</div><div class='ctx'> 		       driver, digestsize,</div><div class='del'>-		       crypto_shash_digestsize(generic_tfm));</div><div class='add'>+		       crypto_ahash_digestsize(generic_tfm));</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (blocksize != crypto_shash_blocksize(generic_tfm)) {</div><div class='add'>+	if (blocksize != crypto_ahash_blocksize(generic_tfm)) {</div><div class='ctx'> 		pr_err("alg: hash: blocksize for %s (%u) doesn't match generic impl (%u)\n",</div><div class='del'>-		       driver, blocksize, crypto_shash_blocksize(generic_tfm));</div><div class='add'>+		       driver, blocksize, crypto_ahash_blocksize(generic_tfm));</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1860,7 +1836,7 @@ static int test_hash_vs_generic_impl(const char *generic_driver,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fuzz_iterations * 8; i++) {</div><div class='del'>-		generate_random_hash_testvec(&amp;rng, generic_desc, &amp;vec,</div><div class='add'>+		generate_random_hash_testvec(&amp;rng, generic_req, &amp;vec,</div><div class='ctx'> 					     maxkeysize, maxdatasize,</div><div class='ctx'> 					     vec_name, sizeof(vec_name));</div><div class='ctx'> 		generate_random_testvec_config(&amp;rng, cfg, cfgname,</div><div class='hunk'>@@ -1878,21 +1854,10 @@ out:</div><div class='ctx'> 	kfree(vec.key);</div><div class='ctx'> 	kfree(vec.plaintext);</div><div class='ctx'> 	kfree(vec.digest);</div><div class='del'>-	crypto_free_shash(generic_tfm);</div><div class='del'>-	kfree_sensitive(generic_desc);</div><div class='add'>+	ahash_request_free(generic_req);</div><div class='add'>+	crypto_free_ahash(generic_tfm);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-#else /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='del'>-static int test_hash_vs_generic_impl(const char *generic_driver,</div><div class='del'>-				     unsigned int maxkeysize,</div><div class='del'>-				     struct ahash_request *req,</div><div class='del'>-				     struct shash_desc *desc,</div><div class='del'>-				     struct test_sglist *tsgl,</div><div class='del'>-				     u8 *hashstate)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='ctx'> </div><div class='ctx'> static int alloc_shash(const char *driver, u32 type, u32 mask,</div><div class='ctx'> 		       struct crypto_shash **tfm_ret,</div><div class='hunk'>@@ -1903,7 +1868,7 @@ static int alloc_shash(const char *driver, u32 type, u32 mask,</div><div class='ctx'> </div><div class='ctx'> 	tfm = crypto_alloc_shash(driver, type, mask);</div><div class='ctx'> 	if (IS_ERR(tfm)) {</div><div class='del'>-		if (PTR_ERR(tfm) == -ENOENT) {</div><div class='add'>+		if (PTR_ERR(tfm) == -ENOENT || PTR_ERR(tfm) == -EEXIST) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * This algorithm is only available through the ahash</div><div class='ctx'> 			 * API, not the shash API, so skip the shash tests.</div><div class='hunk'>@@ -2266,8 +2231,7 @@ static int test_aead_vec(int enc, const struct aead_testvec *vec,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-	if (!noextratests) {</div><div class='add'>+	if (!noslowtests) {</div><div class='ctx'> 		struct rnd_state rng;</div><div class='ctx'> 		struct testvec_config cfg;</div><div class='ctx'> 		char cfgname[TESTVEC_CONFIG_NAMELEN];</div><div class='hunk'>@@ -2284,13 +2248,10 @@ static int test_aead_vec(int enc, const struct aead_testvec *vec,</div><div class='ctx'> 			cond_resched();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-</div><div class='del'>-struct aead_extra_tests_ctx {</div><div class='add'>+struct aead_slow_tests_ctx {</div><div class='ctx'> 	struct rnd_state rng;</div><div class='ctx'> 	struct aead_request *req;</div><div class='ctx'> 	struct crypto_aead *tfm;</div><div class='hunk'>@@ -2465,8 +2426,7 @@ static void generate_random_aead_testvec(struct rnd_state *rng,</div><div class='ctx'> 		 vec-&gt;alen, vec-&gt;plen, authsize, vec-&gt;klen, vec-&gt;novrfy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void try_to_generate_inauthentic_testvec(</div><div class='del'>-					struct aead_extra_tests_ctx *ctx)</div><div class='add'>+static void try_to_generate_inauthentic_testvec(struct aead_slow_tests_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -2485,7 +2445,7 @@ static void try_to_generate_inauthentic_testvec(</div><div class='ctx'>  * Generate inauthentic test vectors (i.e. ciphertext, AAD pairs that aren't the</div><div class='ctx'>  * result of an encryption with the key) and verify that decryption fails.</div><div class='ctx'>  */</div><div class='del'>-static int test_aead_inauthentic_inputs(struct aead_extra_tests_ctx *ctx)</div><div class='add'>+static int test_aead_inauthentic_inputs(struct aead_slow_tests_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -2520,7 +2480,7 @@ static int test_aead_inauthentic_inputs(struct aead_extra_tests_ctx *ctx)</div><div class='ctx'>  * Test the AEAD algorithm against the corresponding generic implementation, if</div><div class='ctx'>  * one is available.</div><div class='ctx'>  */</div><div class='del'>-static int test_aead_vs_generic_impl(struct aead_extra_tests_ctx *ctx)</div><div class='add'>+static int test_aead_vs_generic_impl(struct aead_slow_tests_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_aead *tfm = ctx-&gt;tfm;</div><div class='ctx'> 	const char *algname = crypto_aead_alg(tfm)-&gt;base.cra_name;</div><div class='hunk'>@@ -2624,15 +2584,15 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int test_aead_extra(const struct alg_test_desc *test_desc,</div><div class='del'>-			   struct aead_request *req,</div><div class='del'>-			   struct cipher_test_sglists *tsgls)</div><div class='add'>+static int test_aead_slow(const struct alg_test_desc *test_desc,</div><div class='add'>+			  struct aead_request *req,</div><div class='add'>+			  struct cipher_test_sglists *tsgls)</div><div class='ctx'> {</div><div class='del'>-	struct aead_extra_tests_ctx *ctx;</div><div class='add'>+	struct aead_slow_tests_ctx *ctx;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (noextratests)</div><div class='add'>+	if (noslowtests)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='hunk'>@@ -2674,14 +2634,6 @@ out:</div><div class='ctx'> 	kfree(ctx);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-#else /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='del'>-static int test_aead_extra(const struct alg_test_desc *test_desc,</div><div class='del'>-			   struct aead_request *req,</div><div class='del'>-			   struct cipher_test_sglists *tsgls)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='ctx'> </div><div class='ctx'> static int test_aead(int enc, const struct aead_test_suite *suite,</div><div class='ctx'> 		     struct aead_request *req,</div><div class='hunk'>@@ -2747,7 +2699,7 @@ static int alg_test_aead(const struct alg_test_desc *desc, const char *driver,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	err = test_aead_extra(desc, req, tsgls);</div><div class='add'>+	err = test_aead_slow(desc, req, tsgls);</div><div class='ctx'> out:</div><div class='ctx'> 	free_cipher_test_sglists(tsgls);</div><div class='ctx'> 	aead_request_free(req);</div><div class='hunk'>@@ -3021,8 +2973,7 @@ static int test_skcipher_vec(int enc, const struct cipher_testvec *vec,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-	if (!noextratests) {</div><div class='add'>+	if (!noslowtests) {</div><div class='ctx'> 		struct rnd_state rng;</div><div class='ctx'> 		struct testvec_config cfg;</div><div class='ctx'> 		char cfgname[TESTVEC_CONFIG_NAMELEN];</div><div class='hunk'>@@ -3039,11 +2990,9 @@ static int test_skcipher_vec(int enc, const struct cipher_testvec *vec,</div><div class='ctx'> 			cond_resched();</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='ctx'> /*</div><div class='ctx'>  * Generate a symmetric cipher test vector from the given implementation.</div><div class='ctx'>  * Assumes the buffers in 'vec' were already allocated.</div><div class='hunk'>@@ -3126,7 +3075,7 @@ static int test_skcipher_vs_generic_impl(const char *generic_driver,</div><div class='ctx'> 	char cfgname[TESTVEC_CONFIG_NAMELEN];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (noextratests)</div><div class='add'>+	if (noslowtests)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	init_rnd_state(&amp;rng);</div><div class='hunk'>@@ -3242,14 +3191,6 @@ out:</div><div class='ctx'> 	skcipher_request_free(generic_req);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-#else /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='del'>-static int test_skcipher_vs_generic_impl(const char *generic_driver,</div><div class='del'>-					 struct skcipher_request *req,</div><div class='del'>-					 struct cipher_test_sglists *tsgls)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* !CONFIG_CRYPTO_MANAGER_EXTRA_TESTS */</div><div class='ctx'> </div><div class='ctx'> static int test_skcipher(int enc, const struct cipher_test_suite *suite,</div><div class='ctx'> 			 struct skcipher_request *req,</div><div class='hunk'>@@ -3329,48 +3270,27 @@ static int test_acomp(struct crypto_acomp *tfm,</div><div class='ctx'> 		      int ctcount, int dtcount)</div><div class='ctx'> {</div><div class='ctx'> 	const char *algo = crypto_tfm_alg_driver_name(crypto_acomp_tfm(tfm));</div><div class='del'>-	struct scatterlist *src = NULL, *dst = NULL;</div><div class='del'>-	struct acomp_req *reqs[MAX_MB_MSGS] = {};</div><div class='del'>-	char *decomp_out[MAX_MB_MSGS] = {};</div><div class='del'>-	char *output[MAX_MB_MSGS] = {};</div><div class='del'>-	struct crypto_wait wait;</div><div class='del'>-	struct acomp_req *req;</div><div class='del'>-	int ret = -ENOMEM;</div><div class='ctx'> 	unsigned int i;</div><div class='add'>+	char *output, *decomp_out;</div><div class='add'>+	int ret;</div><div class='add'>+	struct scatterlist src, dst;</div><div class='add'>+	struct acomp_req *req;</div><div class='add'>+	struct crypto_wait wait;</div><div class='ctx'> </div><div class='del'>-	src = kmalloc_array(MAX_MB_MSGS, sizeof(*src), GFP_KERNEL);</div><div class='del'>-	if (!src)</div><div class='del'>-		goto out;</div><div class='del'>-	dst = kmalloc_array(MAX_MB_MSGS, sizeof(*dst), GFP_KERNEL);</div><div class='del'>-	if (!dst)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_MB_MSGS; i++) {</div><div class='del'>-		reqs[i] = acomp_request_alloc(tfm);</div><div class='del'>-		if (!reqs[i])</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		acomp_request_set_callback(reqs[i],</div><div class='del'>-					   CRYPTO_TFM_REQ_MAY_SLEEP |</div><div class='del'>-					   CRYPTO_TFM_REQ_MAY_BACKLOG,</div><div class='del'>-					   crypto_req_done, &amp;wait);</div><div class='del'>-		if (i)</div><div class='del'>-			acomp_request_chain(reqs[i], reqs[0]);</div><div class='del'>-</div><div class='del'>-		output[i] = kmalloc(COMP_BUF_SIZE, GFP_KERNEL);</div><div class='del'>-		if (!output[i])</div><div class='del'>-			goto out;</div><div class='add'>+	output = kmalloc(COMP_BUF_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!output)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		decomp_out[i] = kmalloc(COMP_BUF_SIZE, GFP_KERNEL);</div><div class='del'>-		if (!decomp_out[i])</div><div class='del'>-			goto out;</div><div class='add'>+	decomp_out = kmalloc(COMP_BUF_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!decomp_out) {</div><div class='add'>+		kfree(output);</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ctcount; i++) {</div><div class='ctx'> 		unsigned int dlen = COMP_BUF_SIZE;</div><div class='ctx'> 		int ilen = ctemplate[i].inlen;</div><div class='ctx'> 		void *input_vec;</div><div class='del'>-		int j;</div><div class='ctx'> </div><div class='ctx'> 		input_vec = kmemdup(ctemplate[i].input, ilen, GFP_KERNEL);</div><div class='ctx'> 		if (!input_vec) {</div><div class='hunk'>@@ -3378,61 +3298,70 @@ static int test_acomp(struct crypto_acomp *tfm,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		memset(output, 0, dlen);</div><div class='ctx'> 		crypto_init_wait(&amp;wait);</div><div class='del'>-		sg_init_one(src, input_vec, ilen);</div><div class='add'>+		sg_init_one(&amp;src, input_vec, ilen);</div><div class='add'>+		sg_init_one(&amp;dst, output, dlen);</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; MAX_MB_MSGS; j++) {</div><div class='del'>-			sg_init_one(dst + j, output[j], dlen);</div><div class='del'>-			acomp_request_set_params(reqs[j], src, dst + j, ilen, dlen);</div><div class='add'>+		req = acomp_request_alloc(tfm);</div><div class='add'>+		if (!req) {</div><div class='add'>+			pr_err("alg: acomp: request alloc failed for %s\n",</div><div class='add'>+			       algo);</div><div class='add'>+			kfree(input_vec);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		req = reqs[0];</div><div class='add'>+		acomp_request_set_params(req, &amp;src, &amp;dst, ilen, dlen);</div><div class='add'>+		acomp_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,</div><div class='add'>+					   crypto_req_done, &amp;wait);</div><div class='add'>+</div><div class='ctx'> 		ret = crypto_wait_req(crypto_acomp_compress(req), &amp;wait);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			pr_err("alg: acomp: compression failed on test %d for %s: ret=%d\n",</div><div class='ctx'> 			       i + 1, algo, -ret);</div><div class='ctx'> 			kfree(input_vec);</div><div class='add'>+			acomp_request_free(req);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ilen = req-&gt;dlen;</div><div class='ctx'> 		dlen = COMP_BUF_SIZE;</div><div class='add'>+		sg_init_one(&amp;src, output, ilen);</div><div class='add'>+		sg_init_one(&amp;dst, decomp_out, dlen);</div><div class='ctx'> 		crypto_init_wait(&amp;wait);</div><div class='del'>-		for (j = 0; j &lt; MAX_MB_MSGS; j++) {</div><div class='del'>-			sg_init_one(src + j, output[j], ilen);</div><div class='del'>-			sg_init_one(dst + j, decomp_out[j], dlen);</div><div class='del'>-			acomp_request_set_params(reqs[j], src + j, dst + j, ilen, dlen);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		crypto_wait_req(crypto_acomp_decompress(req), &amp;wait);</div><div class='del'>-		for (j = 0; j &lt; MAX_MB_MSGS; j++) {</div><div class='del'>-			ret = reqs[j]-&gt;base.err;</div><div class='del'>-			if (ret) {</div><div class='del'>-				pr_err("alg: acomp: compression failed on test %d (%d) for %s: ret=%d\n",</div><div class='del'>-				       i + 1, j, algo, -ret);</div><div class='del'>-				kfree(input_vec);</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='add'>+		acomp_request_set_params(req, &amp;src, &amp;dst, ilen, dlen);</div><div class='ctx'> </div><div class='del'>-			if (reqs[j]-&gt;dlen != ctemplate[i].inlen) {</div><div class='del'>-				pr_err("alg: acomp: Compression test %d (%d) failed for %s: output len = %d\n",</div><div class='del'>-				       i + 1, j, algo, reqs[j]-&gt;dlen);</div><div class='del'>-				ret = -EINVAL;</div><div class='del'>-				kfree(input_vec);</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='add'>+		ret = crypto_wait_req(crypto_acomp_decompress(req), &amp;wait);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_err("alg: acomp: compression failed on test %d for %s: ret=%d\n",</div><div class='add'>+			       i + 1, algo, -ret);</div><div class='add'>+			kfree(input_vec);</div><div class='add'>+			acomp_request_free(req);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			if (memcmp(input_vec, decomp_out[j], reqs[j]-&gt;dlen)) {</div><div class='del'>-				pr_err("alg: acomp: Compression test %d (%d) failed for %s\n",</div><div class='del'>-				       i + 1, j, algo);</div><div class='del'>-				hexdump(output[j], reqs[j]-&gt;dlen);</div><div class='del'>-				ret = -EINVAL;</div><div class='del'>-				kfree(input_vec);</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='add'>+		if (req-&gt;dlen != ctemplate[i].inlen) {</div><div class='add'>+			pr_err("alg: acomp: Compression test %d failed for %s: output len = %d\n",</div><div class='add'>+			       i + 1, algo, req-&gt;dlen);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			kfree(input_vec);</div><div class='add'>+			acomp_request_free(req);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (memcmp(input_vec, decomp_out, req-&gt;dlen)) {</div><div class='add'>+			pr_err("alg: acomp: Compression test %d failed for %s\n",</div><div class='add'>+			       i + 1, algo);</div><div class='add'>+			hexdump(output, req-&gt;dlen);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			kfree(input_vec);</div><div class='add'>+			acomp_request_free(req);</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		kfree(input_vec);</div><div class='add'>+		acomp_request_free(req);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dtcount; i++) {</div><div class='hunk'>@@ -3446,9 +3375,10 @@ static int test_acomp(struct crypto_acomp *tfm,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		memset(output, 0, dlen);</div><div class='ctx'> 		crypto_init_wait(&amp;wait);</div><div class='del'>-		sg_init_one(src, input_vec, ilen);</div><div class='del'>-		sg_init_one(dst, output[0], dlen);</div><div class='add'>+		sg_init_one(&amp;src, input_vec, ilen);</div><div class='add'>+		sg_init_one(&amp;dst, output, dlen);</div><div class='ctx'> </div><div class='ctx'> 		req = acomp_request_alloc(tfm);</div><div class='ctx'> 		if (!req) {</div><div class='hunk'>@@ -3459,7 +3389,7 @@ static int test_acomp(struct crypto_acomp *tfm,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		acomp_request_set_params(req, src, dst, ilen, dlen);</div><div class='add'>+		acomp_request_set_params(req, &amp;src, &amp;dst, ilen, dlen);</div><div class='ctx'> 		acomp_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,</div><div class='ctx'> 					   crypto_req_done, &amp;wait);</div><div class='ctx'> </div><div class='hunk'>@@ -3481,10 +3411,10 @@ static int test_acomp(struct crypto_acomp *tfm,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (memcmp(output[0], dtemplate[i].output, req-&gt;dlen)) {</div><div class='add'>+		if (memcmp(output, dtemplate[i].output, req-&gt;dlen)) {</div><div class='ctx'> 			pr_err("alg: acomp: Decompression test %d failed for %s\n",</div><div class='ctx'> 			       i + 1, algo);</div><div class='del'>-			hexdump(output[0], req-&gt;dlen);</div><div class='add'>+			hexdump(output, req-&gt;dlen);</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 			kfree(input_vec);</div><div class='ctx'> 			acomp_request_free(req);</div><div class='hunk'>@@ -3498,13 +3428,8 @@ static int test_acomp(struct crypto_acomp *tfm,</div><div class='ctx'> 	ret = 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	acomp_request_free(reqs[0]);</div><div class='del'>-	for (i = 0; i &lt; MAX_MB_MSGS; i++) {</div><div class='del'>-		kfree(output[i]);</div><div class='del'>-		kfree(decomp_out[i]);</div><div class='del'>-	}</div><div class='del'>-	kfree(dst);</div><div class='del'>-	kfree(src);</div><div class='add'>+	kfree(decomp_out);</div><div class='add'>+	kfree(output);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5426,12 +5351,6 @@ static const struct alg_test_desc alg_test_descs[] = {</div><div class='ctx'> 		.test = alg_test_null,</div><div class='ctx'> 		.fips_allowed = 1,</div><div class='ctx'> 	}, {</div><div class='del'>-		.alg = "poly1305",</div><div class='del'>-		.test = alg_test_hash,</div><div class='del'>-		.suite = {</div><div class='del'>-			.hash = __VECS(poly1305_tv_template)</div><div class='del'>-		}</div><div class='del'>-	}, {</div><div class='ctx'> 		.alg = "polyval",</div><div class='ctx'> 		.test = alg_test_hash,</div><div class='ctx'> 		.suite = {</div><div class='hunk'>@@ -5788,9 +5707,8 @@ static void testmgr_onetime_init(void)</div><div class='ctx'> 	alg_check_test_descs_order();</div><div class='ctx'> 	alg_check_testvec_configs();</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_MANAGER_EXTRA_TESTS</div><div class='del'>-	pr_warn("alg: extra crypto tests enabled.  This is intended for developer use only.\n");</div><div class='del'>-#endif</div><div class='add'>+	if (!noslowtests)</div><div class='add'>+		pr_warn("alg: full crypto tests enabled.  This is intended for developer use only.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int alg_find_test(const char *alg)</div><div class='hunk'>@@ -5879,11 +5797,10 @@ int alg_test(const char *driver, const char *alg, u32 type, u32 mask)</div><div class='ctx'> </div><div class='ctx'> test_done:</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		if (fips_enabled || panic_on_fail) {</div><div class='add'>+		if (fips_enabled) {</div><div class='ctx'> 			fips_fail_notify();</div><div class='del'>-			panic("alg: self-tests for %s (%s) failed in %s mode!\n",</div><div class='del'>-			      driver, alg,</div><div class='del'>-			      fips_enabled ? "fips" : "panic_on_fail");</div><div class='add'>+			panic("alg: self-tests for %s (%s) failed in fips mode!\n",</div><div class='add'>+			      driver, alg);</div><div class='ctx'> 		}</div><div class='ctx'> 		pr_warn("alg: self-tests for %s using %s failed (rc=%d)",</div><div class='ctx'> 			alg, driver, rc);</div><div class='hunk'>@@ -5928,6 +5845,6 @@ non_fips_alg:</div><div class='ctx'> 	return alg_fips_disabled(driver, alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_CRYPTO_MANAGER_DISABLE_TESTS */</div><div class='add'>+#endif /* CONFIG_CRYPTO_SELFTESTS */</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL_GPL(alg_test);</div><div class='head'>diff --git a/crypto/testmgr.h b/crypto/testmgr.h<br/>index afc10af59b0a..32d099ac9e73 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/testmgr.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/testmgr.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/testmgr.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/testmgr.h</a></div><div class='hunk'>@@ -8836,294 +8836,6 @@ static const struct hash_testvec hmac_sha3_512_tv_template[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Poly1305 test vectors from RFC7539 A.3.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const struct hash_testvec poly1305_tv_template[] = {</div><div class='del'>-	{ /* Test Vector #1 */</div><div class='del'>-		.plaintext	= "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-		.psize		= 96,</div><div class='del'>-		.digest		= "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-	}, { /* Test Vector #2 */</div><div class='del'>-		.plaintext	= "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x36\xe5\xf6\xb5\xc5\xe0\x60\x70"</div><div class='del'>-				  "\xf0\xef\xca\x96\x22\x7a\x86\x3e"</div><div class='del'>-				  "\x41\x6e\x79\x20\x73\x75\x62\x6d"</div><div class='del'>-				  "\x69\x73\x73\x69\x6f\x6e\x20\x74"</div><div class='del'>-				  "\x6f\x20\x74\x68\x65\x20\x49\x45"</div><div class='del'>-				  "\x54\x46\x20\x69\x6e\x74\x65\x6e"</div><div class='del'>-				  "\x64\x65\x64\x20\x62\x79\x20\x74"</div><div class='del'>-				  "\x68\x65\x20\x43\x6f\x6e\x74\x72"</div><div class='del'>-				  "\x69\x62\x75\x74\x6f\x72\x20\x66"</div><div class='del'>-				  "\x6f\x72\x20\x70\x75\x62\x6c\x69"</div><div class='del'>-				  "\x63\x61\x74\x69\x6f\x6e\x20\x61"</div><div class='del'>-				  "\x73\x20\x61\x6c\x6c\x20\x6f\x72"</div><div class='del'>-				  "\x20\x70\x61\x72\x74\x20\x6f\x66"</div><div class='del'>-				  "\x20\x61\x6e\x20\x49\x45\x54\x46"</div><div class='del'>-				  "\x20\x49\x6e\x74\x65\x72\x6e\x65"</div><div class='del'>-				  "\x74\x2d\x44\x72\x61\x66\x74\x20"</div><div class='del'>-				  "\x6f\x72\x20\x52\x46\x43\x20\x61"</div><div class='del'>-				  "\x6e\x64\x20\x61\x6e\x79\x20\x73"</div><div class='del'>-				  "\x74\x61\x74\x65\x6d\x65\x6e\x74"</div><div class='del'>-				  "\x20\x6d\x61\x64\x65\x20\x77\x69"</div><div class='del'>-				  "\x74\x68\x69\x6e\x20\x74\x68\x65"</div><div class='del'>-				  "\x20\x63\x6f\x6e\x74\x65\x78\x74"</div><div class='del'>-				  "\x20\x6f\x66\x20\x61\x6e\x20\x49"</div><div class='del'>-				  "\x45\x54\x46\x20\x61\x63\x74\x69"</div><div class='del'>-				  "\x76\x69\x74\x79\x20\x69\x73\x20"</div><div class='del'>-				  "\x63\x6f\x6e\x73\x69\x64\x65\x72"</div><div class='del'>-				  "\x65\x64\x20\x61\x6e\x20\x22\x49"</div><div class='del'>-				  "\x45\x54\x46\x20\x43\x6f\x6e\x74"</div><div class='del'>-				  "\x72\x69\x62\x75\x74\x69\x6f\x6e"</div><div class='del'>-				  "\x22\x2e\x20\x53\x75\x63\x68\x20"</div><div class='del'>-				  "\x73\x74\x61\x74\x65\x6d\x65\x6e"</div><div class='del'>-				  "\x74\x73\x20\x69\x6e\x63\x6c\x75"</div><div class='del'>-				  "\x64\x65\x20\x6f\x72\x61\x6c\x20"</div><div class='del'>-				  "\x73\x74\x61\x74\x65\x6d\x65\x6e"</div><div class='del'>-				  "\x74\x73\x20\x69\x6e\x20\x49\x45"</div><div class='del'>-				  "\x54\x46\x20\x73\x65\x73\x73\x69"</div><div class='del'>-				  "\x6f\x6e\x73\x2c\x20\x61\x73\x20"</div><div class='del'>-				  "\x77\x65\x6c\x6c\x20\x61\x73\x20"</div><div class='del'>-				  "\x77\x72\x69\x74\x74\x65\x6e\x20"</div><div class='del'>-				  "\x61\x6e\x64\x20\x65\x6c\x65\x63"</div><div class='del'>-				  "\x74\x72\x6f\x6e\x69\x63\x20\x63"</div><div class='del'>-				  "\x6f\x6d\x6d\x75\x6e\x69\x63\x61"</div><div class='del'>-				  "\x74\x69\x6f\x6e\x73\x20\x6d\x61"</div><div class='del'>-				  "\x64\x65\x20\x61\x74\x20\x61\x6e"</div><div class='del'>-				  "\x79\x20\x74\x69\x6d\x65\x20\x6f"</div><div class='del'>-				  "\x72\x20\x70\x6c\x61\x63\x65\x2c"</div><div class='del'>-				  "\x20\x77\x68\x69\x63\x68\x20\x61"</div><div class='del'>-				  "\x72\x65\x20\x61\x64\x64\x72\x65"</div><div class='del'>-				  "\x73\x73\x65\x64\x20\x74\x6f",</div><div class='del'>-		.psize		= 407,</div><div class='del'>-		.digest		= "\x36\xe5\xf6\xb5\xc5\xe0\x60\x70"</div><div class='del'>-				  "\xf0\xef\xca\x96\x22\x7a\x86\x3e",</div><div class='del'>-	}, { /* Test Vector #3 */</div><div class='del'>-		.plaintext	= "\x36\xe5\xf6\xb5\xc5\xe0\x60\x70"</div><div class='del'>-				  "\xf0\xef\xca\x96\x22\x7a\x86\x3e"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x41\x6e\x79\x20\x73\x75\x62\x6d"</div><div class='del'>-				  "\x69\x73\x73\x69\x6f\x6e\x20\x74"</div><div class='del'>-				  "\x6f\x20\x74\x68\x65\x20\x49\x45"</div><div class='del'>-				  "\x54\x46\x20\x69\x6e\x74\x65\x6e"</div><div class='del'>-				  "\x64\x65\x64\x20\x62\x79\x20\x74"</div><div class='del'>-				  "\x68\x65\x20\x43\x6f\x6e\x74\x72"</div><div class='del'>-				  "\x69\x62\x75\x74\x6f\x72\x20\x66"</div><div class='del'>-				  "\x6f\x72\x20\x70\x75\x62\x6c\x69"</div><div class='del'>-				  "\x63\x61\x74\x69\x6f\x6e\x20\x61"</div><div class='del'>-				  "\x73\x20\x61\x6c\x6c\x20\x6f\x72"</div><div class='del'>-				  "\x20\x70\x61\x72\x74\x20\x6f\x66"</div><div class='del'>-				  "\x20\x61\x6e\x20\x49\x45\x54\x46"</div><div class='del'>-				  "\x20\x49\x6e\x74\x65\x72\x6e\x65"</div><div class='del'>-				  "\x74\x2d\x44\x72\x61\x66\x74\x20"</div><div class='del'>-				  "\x6f\x72\x20\x52\x46\x43\x20\x61"</div><div class='del'>-				  "\x6e\x64\x20\x61\x6e\x79\x20\x73"</div><div class='del'>-				  "\x74\x61\x74\x65\x6d\x65\x6e\x74"</div><div class='del'>-				  "\x20\x6d\x61\x64\x65\x20\x77\x69"</div><div class='del'>-				  "\x74\x68\x69\x6e\x20\x74\x68\x65"</div><div class='del'>-				  "\x20\x63\x6f\x6e\x74\x65\x78\x74"</div><div class='del'>-				  "\x20\x6f\x66\x20\x61\x6e\x20\x49"</div><div class='del'>-				  "\x45\x54\x46\x20\x61\x63\x74\x69"</div><div class='del'>-				  "\x76\x69\x74\x79\x20\x69\x73\x20"</div><div class='del'>-				  "\x63\x6f\x6e\x73\x69\x64\x65\x72"</div><div class='del'>-				  "\x65\x64\x20\x61\x6e\x20\x22\x49"</div><div class='del'>-				  "\x45\x54\x46\x20\x43\x6f\x6e\x74"</div><div class='del'>-				  "\x72\x69\x62\x75\x74\x69\x6f\x6e"</div><div class='del'>-				  "\x22\x2e\x20\x53\x75\x63\x68\x20"</div><div class='del'>-				  "\x73\x74\x61\x74\x65\x6d\x65\x6e"</div><div class='del'>-				  "\x74\x73\x20\x69\x6e\x63\x6c\x75"</div><div class='del'>-				  "\x64\x65\x20\x6f\x72\x61\x6c\x20"</div><div class='del'>-				  "\x73\x74\x61\x74\x65\x6d\x65\x6e"</div><div class='del'>-				  "\x74\x73\x20\x69\x6e\x20\x49\x45"</div><div class='del'>-				  "\x54\x46\x20\x73\x65\x73\x73\x69"</div><div class='del'>-				  "\x6f\x6e\x73\x2c\x20\x61\x73\x20"</div><div class='del'>-				  "\x77\x65\x6c\x6c\x20\x61\x73\x20"</div><div class='del'>-				  "\x77\x72\x69\x74\x74\x65\x6e\x20"</div><div class='del'>-				  "\x61\x6e\x64\x20\x65\x6c\x65\x63"</div><div class='del'>-				  "\x74\x72\x6f\x6e\x69\x63\x20\x63"</div><div class='del'>-				  "\x6f\x6d\x6d\x75\x6e\x69\x63\x61"</div><div class='del'>-				  "\x74\x69\x6f\x6e\x73\x20\x6d\x61"</div><div class='del'>-				  "\x64\x65\x20\x61\x74\x20\x61\x6e"</div><div class='del'>-				  "\x79\x20\x74\x69\x6d\x65\x20\x6f"</div><div class='del'>-				  "\x72\x20\x70\x6c\x61\x63\x65\x2c"</div><div class='del'>-				  "\x20\x77\x68\x69\x63\x68\x20\x61"</div><div class='del'>-				  "\x72\x65\x20\x61\x64\x64\x72\x65"</div><div class='del'>-				  "\x73\x73\x65\x64\x20\x74\x6f",</div><div class='del'>-		.psize		= 407,</div><div class='del'>-		.digest		= "\xf3\x47\x7e\x7c\xd9\x54\x17\xaf"</div><div class='del'>-				  "\x89\xa6\xb8\x79\x4c\x31\x0c\xf0",</div><div class='del'>-	}, { /* Test Vector #4 */</div><div class='del'>-		.plaintext	= "\x1c\x92\x40\xa5\xeb\x55\xd3\x8a"</div><div class='del'>-				  "\xf3\x33\x88\x86\x04\xf6\xb5\xf0"</div><div class='del'>-				  "\x47\x39\x17\xc1\x40\x2b\x80\x09"</div><div class='del'>-				  "\x9d\xca\x5c\xbc\x20\x70\x75\xc0"</div><div class='del'>-				  "\x27\x54\x77\x61\x73\x20\x62\x72"</div><div class='del'>-				  "\x69\x6c\x6c\x69\x67\x2c\x20\x61"</div><div class='del'>-				  "\x6e\x64\x20\x74\x68\x65\x20\x73"</div><div class='del'>-				  "\x6c\x69\x74\x68\x79\x20\x74\x6f"</div><div class='del'>-				  "\x76\x65\x73\x0a\x44\x69\x64\x20"</div><div class='del'>-				  "\x67\x79\x72\x65\x20\x61\x6e\x64"</div><div class='del'>-				  "\x20\x67\x69\x6d\x62\x6c\x65\x20"</div><div class='del'>-				  "\x69\x6e\x20\x74\x68\x65\x20\x77"</div><div class='del'>-				  "\x61\x62\x65\x3a\x0a\x41\x6c\x6c"</div><div class='del'>-				  "\x20\x6d\x69\x6d\x73\x79\x20\x77"</div><div class='del'>-				  "\x65\x72\x65\x20\x74\x68\x65\x20"</div><div class='del'>-				  "\x62\x6f\x72\x6f\x67\x6f\x76\x65"</div><div class='del'>-				  "\x73\x2c\x0a\x41\x6e\x64\x20\x74"</div><div class='del'>-				  "\x68\x65\x20\x6d\x6f\x6d\x65\x20"</div><div class='del'>-				  "\x72\x61\x74\x68\x73\x20\x6f\x75"</div><div class='del'>-				  "\x74\x67\x72\x61\x62\x65\x2e",</div><div class='del'>-		.psize		= 159,</div><div class='del'>-		.digest		= "\x45\x41\x66\x9a\x7e\xaa\xee\x61"</div><div class='del'>-				  "\xe7\x08\xdc\x7c\xbc\xc5\xeb\x62",</div><div class='del'>-	}, { /* Test Vector #5 */</div><div class='del'>-		.plaintext	= "\x02\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff",</div><div class='del'>-		.psize		= 48,</div><div class='del'>-		.digest		= "\x03\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-	}, { /* Test Vector #6 */</div><div class='del'>-		.plaintext	= "\x02\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\x02\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-		.psize		= 48,</div><div class='del'>-		.digest		= "\x03\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-	}, { /* Test Vector #7 */</div><div class='del'>-		.plaintext	= "\x01\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xf0\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\x11\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-		.psize		= 80,</div><div class='del'>-		.digest		= "\x05\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-	}, { /* Test Vector #8 */</div><div class='del'>-		.plaintext	= "\x01\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xfb\xfe\xfe\xfe\xfe\xfe\xfe\xfe"</div><div class='del'>-				  "\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe"</div><div class='del'>-				  "\x01\x01\x01\x01\x01\x01\x01\x01"</div><div class='del'>-				  "\x01\x01\x01\x01\x01\x01\x01\x01",</div><div class='del'>-		.psize		= 80,</div><div class='del'>-		.digest		= "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-	}, { /* Test Vector #9 */</div><div class='del'>-		.plaintext	= "\x02\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\xfd\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff",</div><div class='del'>-		.psize		= 48,</div><div class='del'>-		.digest		= "\xfa\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff",</div><div class='del'>-	}, { /* Test Vector #10 */</div><div class='del'>-		.plaintext	= "\x01\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x04\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\xe3\x35\x94\xd7\x50\x5e\x43\xb9"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x33\x94\xd7\x50\x5e\x43\x79\xcd"</div><div class='del'>-				  "\x01\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x01\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-		.psize		= 96,</div><div class='del'>-		.digest		= "\x14\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x55\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-	}, { /* Test Vector #11 */</div><div class='del'>-		.plaintext	= "\x01\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x04\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\xe3\x35\x94\xd7\x50\x5e\x43\xb9"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x33\x94\xd7\x50\x5e\x43\x79\xcd"</div><div class='del'>-				  "\x01\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-		.psize		= 80,</div><div class='del'>-		.digest		= "\x13\x00\x00\x00\x00\x00\x00\x00"</div><div class='del'>-				  "\x00\x00\x00\x00\x00\x00\x00\x00",</div><div class='del'>-	}, { /* Regression test for overflow in AVX2 implementation */</div><div class='del'>-		.plaintext	= "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff\xff\xff\xff\xff"</div><div class='del'>-				  "\xff\xff\xff\xff",</div><div class='del'>-		.psize		= 300,</div><div class='del'>-		.digest		= "\xfb\x5e\x96\xd8\x61\xd5\xc7\xc8"</div><div class='del'>-				  "\x78\xe5\x87\xcc\x2d\x5a\x22\xe1",</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* NHPoly1305 test vectors from https://github.com/google/adiantum */</div><div class='ctx'> static const struct hash_testvec nhpoly1305_tv_template[] = {</div><div class='ctx'> 	{</div><div class='head'>diff --git a/crypto/twofish_generic.c b/crypto/twofish_generic.c<br/>index 19f2b365e140..368018cfa9bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/twofish_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/twofish_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/twofish_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/twofish_generic.c</a></div><div class='hunk'>@@ -187,7 +187,7 @@ static void __exit twofish_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_alg(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(twofish_mod_init);</div><div class='add'>+module_init(twofish_mod_init);</div><div class='ctx'> module_exit(twofish_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/wp512.c b/crypto/wp512.c<br/>index 07994e5ebf4e..41f13d490333 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/wp512.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/wp512.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/wp512.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/wp512.c</a></div><div class='hunk'>@@ -1169,7 +1169,7 @@ MODULE_ALIAS_CRYPTO("wp512");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("wp384");</div><div class='ctx'> MODULE_ALIAS_CRYPTO("wp256");</div><div class='ctx'> </div><div class='del'>-subsys_initcall(wp512_mod_init);</div><div class='add'>+module_init(wp512_mod_init);</div><div class='ctx'> module_exit(wp512_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/xcbc.c b/crypto/xcbc.c<br/>index fc785667b134..6c5f6766fdd6 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/xcbc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xcbc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/xcbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/xcbc.c</a></div><div class='hunk'>@@ -8,9 +8,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/cipher.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> static u_int32_t ks[12] = {0x01010101, 0x01010101, 0x01010101, 0x01010101,</div><div class='ctx'> 			   0x02020202, 0x02020202, 0x02020202, 0x02020202,</div><div class='hunk'>@@ -30,22 +33,6 @@ struct xcbc_tfm_ctx {</div><div class='ctx'> 	u8 consts[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * +------------------------</div><div class='del'>- * | &lt;shash desc&gt;</div><div class='del'>- * +------------------------</div><div class='del'>- * | xcbc_desc_ctx</div><div class='del'>- * +------------------------</div><div class='del'>- * | odds (block size)</div><div class='del'>- * +------------------------</div><div class='del'>- * | prev (block size)</div><div class='del'>- * +------------------------</div><div class='del'>- */</div><div class='del'>-struct xcbc_desc_ctx {</div><div class='del'>-	unsigned int len;</div><div class='del'>-	u8 odds[];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define XCBC_BLOCKSIZE	16</div><div class='ctx'> </div><div class='ctx'> static int crypto_xcbc_digest_setkey(struct crypto_shash *parent,</div><div class='hunk'>@@ -70,13 +57,10 @@ static int crypto_xcbc_digest_setkey(struct crypto_shash *parent,</div><div class='ctx'> </div><div class='ctx'> static int crypto_xcbc_digest_init(struct shash_desc *pdesc)</div><div class='ctx'> {</div><div class='del'>-	struct xcbc_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	int bs = crypto_shash_blocksize(pdesc-&gt;tfm);</div><div class='del'>-	u8 *prev = &amp;ctx-&gt;odds[bs];</div><div class='add'>+	u8 *prev = shash_desc_ctx(pdesc);</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;len = 0;</div><div class='ctx'> 	memset(prev, 0, bs);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -85,77 +69,36 @@ static int crypto_xcbc_digest_update(struct shash_desc *pdesc, const u8 *p,</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *parent = pdesc-&gt;tfm;</div><div class='ctx'> 	struct xcbc_tfm_ctx *tctx = crypto_shash_ctx(parent);</div><div class='del'>-	struct xcbc_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	struct crypto_cipher *tfm = tctx-&gt;child;</div><div class='ctx'> 	int bs = crypto_shash_blocksize(parent);</div><div class='del'>-	u8 *odds = ctx-&gt;odds;</div><div class='del'>-	u8 *prev = odds + bs;</div><div class='del'>-</div><div class='del'>-	/* checking the data can fill the block */</div><div class='del'>-	if ((ctx-&gt;len + len) &lt;= bs) {</div><div class='del'>-		memcpy(odds + ctx-&gt;len, p, len);</div><div class='del'>-		ctx-&gt;len += len;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* filling odds with new data and encrypting it */</div><div class='del'>-	memcpy(odds + ctx-&gt;len, p, bs - ctx-&gt;len);</div><div class='del'>-	len -= bs - ctx-&gt;len;</div><div class='del'>-	p += bs - ctx-&gt;len;</div><div class='del'>-</div><div class='del'>-	crypto_xor(prev, odds, bs);</div><div class='del'>-	crypto_cipher_encrypt_one(tfm, prev, prev);</div><div class='add'>+	u8 *prev = shash_desc_ctx(pdesc);</div><div class='ctx'> </div><div class='del'>-	/* clearing the length */</div><div class='del'>-	ctx-&gt;len = 0;</div><div class='del'>-</div><div class='del'>-	/* encrypting the rest of data */</div><div class='del'>-	while (len &gt; bs) {</div><div class='add'>+	do {</div><div class='ctx'> 		crypto_xor(prev, p, bs);</div><div class='ctx'> 		crypto_cipher_encrypt_one(tfm, prev, prev);</div><div class='ctx'> 		p += bs;</div><div class='ctx'> 		len -= bs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* keeping the surplus of blocksize */</div><div class='del'>-	if (len) {</div><div class='del'>-		memcpy(odds, p, len);</div><div class='del'>-		ctx-&gt;len = len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	} while (len &gt;= bs);</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int crypto_xcbc_digest_final(struct shash_desc *pdesc, u8 *out)</div><div class='add'>+static int crypto_xcbc_digest_finup(struct shash_desc *pdesc, const u8 *src,</div><div class='add'>+				    unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_shash *parent = pdesc-&gt;tfm;</div><div class='ctx'> 	struct xcbc_tfm_ctx *tctx = crypto_shash_ctx(parent);</div><div class='del'>-	struct xcbc_desc_ctx *ctx = shash_desc_ctx(pdesc);</div><div class='ctx'> 	struct crypto_cipher *tfm = tctx-&gt;child;</div><div class='ctx'> 	int bs = crypto_shash_blocksize(parent);</div><div class='del'>-	u8 *odds = ctx-&gt;odds;</div><div class='del'>-	u8 *prev = odds + bs;</div><div class='add'>+	u8 *prev = shash_desc_ctx(pdesc);</div><div class='ctx'> 	unsigned int offset = 0;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;len != bs) {</div><div class='del'>-		unsigned int rlen;</div><div class='del'>-		u8 *p = odds + ctx-&gt;len;</div><div class='del'>-</div><div class='del'>-		*p = 0x80;</div><div class='del'>-		p++;</div><div class='del'>-</div><div class='del'>-		rlen = bs - ctx-&gt;len -1;</div><div class='del'>-		if (rlen)</div><div class='del'>-			memset(p, 0, rlen);</div><div class='del'>-</div><div class='add'>+	crypto_xor(prev, src, len);</div><div class='add'>+	if (len != bs) {</div><div class='add'>+		prev[len] ^= 0x80;</div><div class='ctx'> 		offset += bs;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	crypto_xor(prev, odds, bs);</div><div class='ctx'> 	crypto_xor(prev, &amp;tctx-&gt;consts[offset], bs);</div><div class='del'>-</div><div class='ctx'> 	crypto_cipher_encrypt_one(tfm, out, prev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -216,17 +159,18 @@ static int xcbc_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> 	inst-&gt;alg.base.cra_blocksize = alg-&gt;cra_blocksize;</div><div class='ctx'> 	inst-&gt;alg.base.cra_ctxsize = sizeof(struct xcbc_tfm_ctx) +</div><div class='ctx'> 				     alg-&gt;cra_blocksize * 2;</div><div class='add'>+	inst-&gt;alg.base.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				   CRYPTO_AHASH_ALG_FINAL_NONZERO;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.digestsize = alg-&gt;cra_blocksize;</div><div class='del'>-	inst-&gt;alg.descsize = sizeof(struct xcbc_desc_ctx) +</div><div class='del'>-			     alg-&gt;cra_blocksize * 2;</div><div class='add'>+	inst-&gt;alg.descsize = alg-&gt;cra_blocksize;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.base.cra_init = xcbc_init_tfm;</div><div class='ctx'> 	inst-&gt;alg.base.cra_exit = xcbc_exit_tfm;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;alg.init = crypto_xcbc_digest_init;</div><div class='ctx'> 	inst-&gt;alg.update = crypto_xcbc_digest_update;</div><div class='del'>-	inst-&gt;alg.final = crypto_xcbc_digest_final;</div><div class='add'>+	inst-&gt;alg.finup = crypto_xcbc_digest_finup;</div><div class='ctx'> 	inst-&gt;alg.setkey = crypto_xcbc_digest_setkey;</div><div class='ctx'> </div><div class='ctx'> 	inst-&gt;free = shash_free_singlespawn_instance;</div><div class='hunk'>@@ -255,7 +199,7 @@ static void __exit crypto_xcbc_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_xcbc_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_xcbc_module_init);</div><div class='add'>+module_init(crypto_xcbc_module_init);</div><div class='ctx'> module_exit(crypto_xcbc_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/xctr.c b/crypto/xctr.c<br/>index 9c536ab6d2e5..607ab82cb19b 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/xctr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xctr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/xctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/xctr.c</a></div><div class='hunk'>@@ -182,7 +182,7 @@ static void __exit crypto_xctr_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;crypto_xctr_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(crypto_xctr_module_init);</div><div class='add'>+module_init(crypto_xctr_module_init);</div><div class='ctx'> module_exit(crypto_xctr_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/xts.c b/crypto/xts.c<br/>index 31529c9ef08f..3da8f5e053d6 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/xts.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xts.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/xts.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/xts.c</a></div><div class='hunk'>@@ -363,7 +363,7 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> </div><div class='ctx'> 	err = crypto_grab_skcipher(&amp;ctx-&gt;spawn, skcipher_crypto_instance(inst),</div><div class='ctx'> 				   cipher_name, 0, mask);</div><div class='del'>-	if (err == -ENOENT) {</div><div class='add'>+	if (err == -ENOENT &amp;&amp; memcmp(cipher_name, "ecb(", 4)) {</div><div class='ctx'> 		err = -ENAMETOOLONG;</div><div class='ctx'> 		if (snprintf(name, CRYPTO_MAX_ALG_NAME, "ecb(%s)",</div><div class='ctx'> 			     cipher_name) &gt;= CRYPTO_MAX_ALG_NAME)</div><div class='hunk'>@@ -397,7 +397,7 @@ static int xts_create(struct crypto_template *tmpl, struct rtattr **tb)</div><div class='ctx'> 	/* Alas we screwed up the naming so we have to mangle the</div><div class='ctx'> 	 * cipher name.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!strncmp(cipher_name, "ecb(", 4)) {</div><div class='add'>+	if (!memcmp(cipher_name, "ecb(", 4)) {</div><div class='ctx'> 		int len;</div><div class='ctx'> </div><div class='ctx'> 		len = strscpy(name, cipher_name + 4, sizeof(name));</div><div class='hunk'>@@ -466,7 +466,7 @@ static void __exit xts_module_exit(void)</div><div class='ctx'> 	crypto_unregister_template(&amp;xts_tmpl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(xts_module_init);</div><div class='add'>+module_init(xts_module_init);</div><div class='ctx'> module_exit(xts_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/crypto/xxhash_generic.c b/crypto/xxhash_generic.c<br/>index ac206ad4184d..175bb7ae0fcd 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/xxhash_generic.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/xxhash_generic.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/xxhash_generic.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/xxhash_generic.c</a></div><div class='hunk'>@@ -96,7 +96,7 @@ static void __exit xxhash_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_shash(&amp;alg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(xxhash_mod_init);</div><div class='add'>+module_init(xxhash_mod_init);</div><div class='ctx'> module_exit(xxhash_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Nikolay Borisov &lt;nborisov@suse.com&gt;");</div><div class='head'>diff --git a/crypto/zstd.c b/crypto/zstd.c<br/>index 90bb4f36f846..7570e11b4ee6 100644<br/>--- a/<a href='/cgit/linux.git/tree/crypto/zstd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>crypto/zstd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/crypto/zstd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>crypto/zstd.c</a></div><div class='hunk'>@@ -196,7 +196,7 @@ static void __exit zstd_mod_fini(void)</div><div class='ctx'> 	crypto_unregister_scomp(&amp;scomp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-subsys_initcall(zstd_mod_init);</div><div class='add'>+module_init(zstd_mod_init);</div><div class='ctx'> module_exit(zstd_mod_fini);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/accel/amdxdna/TODO b/drivers/accel/amdxdna/TODO<br/>index 5119bccd1917..ad8ac6e315b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/TODO?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/TODO</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/TODO?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/TODO</a></div><div class='hunk'>@@ -1,3 +1,2 @@</div><div class='del'>-- Add import and export BO support</div><div class='ctx'> - Add debugfs support</div><div class='ctx'> - Add debug BO support</div><div class='head'>diff --git a/drivers/accel/amdxdna/aie2_ctx.c b/drivers/accel/amdxdna/aie2_ctx.c<br/>index 00d215ac866e..e04549f64d69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/aie2_ctx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/aie2_ctx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/aie2_ctx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/aie2_ctx.c</a></div><div class='hunk'>@@ -758,27 +758,42 @@ int aie2_hwctx_config(struct amdxdna_hwctx *hwctx, u32 type, u64 value, void *bu</div><div class='ctx'> static int aie2_populate_range(struct amdxdna_gem_obj *abo)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdxdna_dev *xdna = to_xdna_dev(to_gobj(abo)-&gt;dev);</div><div class='del'>-	struct mm_struct *mm = abo-&gt;mem.notifier.mm;</div><div class='del'>-	struct hmm_range range = { 0 };</div><div class='add'>+	struct amdxdna_umap *mapp;</div><div class='ctx'> 	unsigned long timeout;</div><div class='add'>+	struct mm_struct *mm;</div><div class='add'>+	bool found;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	XDNA_INFO_ONCE(xdna, "populate memory range %llx size %lx",</div><div class='del'>-		       abo-&gt;mem.userptr, abo-&gt;mem.size);</div><div class='del'>-	range.notifier = &amp;abo-&gt;mem.notifier;</div><div class='del'>-	range.start = abo-&gt;mem.userptr;</div><div class='del'>-	range.end = abo-&gt;mem.userptr + abo-&gt;mem.size;</div><div class='del'>-	range.hmm_pfns = abo-&gt;mem.pfns;</div><div class='del'>-	range.default_flags = HMM_PFN_REQ_FAULT;</div><div class='add'>+	timeout = jiffies + msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT);</div><div class='add'>+again:</div><div class='add'>+	found = false;</div><div class='add'>+	down_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	list_for_each_entry(mapp, &amp;abo-&gt;mem.umap_list, node) {</div><div class='add'>+		if (mapp-&gt;invalid) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!mmget_not_zero(mm))</div><div class='add'>+	if (!found) {</div><div class='add'>+		abo-&gt;mem.map_invalid = false;</div><div class='add'>+		up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	kref_get(&amp;mapp-&gt;refcnt);</div><div class='add'>+	up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+</div><div class='add'>+	XDNA_DBG(xdna, "populate memory range %lx %lx",</div><div class='add'>+		 mapp-&gt;vma-&gt;vm_start, mapp-&gt;vma-&gt;vm_end);</div><div class='add'>+	mm = mapp-&gt;notifier.mm;</div><div class='add'>+	if (!mmget_not_zero(mm)) {</div><div class='add'>+		amdxdna_umap_put(mapp);</div><div class='ctx'> 		return -EFAULT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	timeout = jiffies + msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT);</div><div class='del'>-again:</div><div class='del'>-	range.notifier_seq = mmu_interval_read_begin(&amp;abo-&gt;mem.notifier);</div><div class='add'>+	mapp-&gt;range.notifier_seq = mmu_interval_read_begin(&amp;mapp-&gt;notifier);</div><div class='ctx'> 	mmap_read_lock(mm);</div><div class='del'>-	ret = hmm_range_fault(&amp;range);</div><div class='add'>+	ret = hmm_range_fault(&amp;mapp-&gt;range);</div><div class='ctx'> 	mmap_read_unlock(mm);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		if (time_after(jiffies, timeout)) {</div><div class='hunk'>@@ -786,21 +801,27 @@ again:</div><div class='ctx'> 			goto put_mm;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (ret == -EBUSY)</div><div class='add'>+		if (ret == -EBUSY) {</div><div class='add'>+			amdxdna_umap_put(mapp);</div><div class='ctx'> 			goto again;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		goto put_mm;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	down_read(&amp;xdna-&gt;notifier_lock);</div><div class='del'>-	if (mmu_interval_read_retry(&amp;abo-&gt;mem.notifier, range.notifier_seq)) {</div><div class='del'>-		up_read(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	down_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	if (mmu_interval_read_retry(&amp;mapp-&gt;notifier, mapp-&gt;range.notifier_seq)) {</div><div class='add'>+		up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+		amdxdna_umap_put(mapp);</div><div class='ctx'> 		goto again;</div><div class='ctx'> 	}</div><div class='del'>-	abo-&gt;mem.map_invalid = false;</div><div class='del'>-	up_read(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	mapp-&gt;invalid = false;</div><div class='add'>+	up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	amdxdna_umap_put(mapp);</div><div class='add'>+	goto again;</div><div class='ctx'> </div><div class='ctx'> put_mm:</div><div class='add'>+	amdxdna_umap_put(mapp);</div><div class='ctx'> 	mmput(mm);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -908,10 +929,6 @@ void aie2_hmm_invalidate(struct amdxdna_gem_obj *abo,</div><div class='ctx'> 	struct drm_gem_object *gobj = to_gobj(abo);</div><div class='ctx'> 	long ret;</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;xdna-&gt;notifier_lock);</div><div class='del'>-	abo-&gt;mem.map_invalid = true;</div><div class='del'>-	mmu_interval_set_seq(&amp;abo-&gt;mem.notifier, cur_seq);</div><div class='del'>-	up_write(&amp;xdna-&gt;notifier_lock);</div><div class='ctx'> 	ret = dma_resv_wait_timeout(gobj-&gt;resv, DMA_RESV_USAGE_BOOKKEEP,</div><div class='ctx'> 				    true, MAX_SCHEDULE_TIMEOUT);</div><div class='ctx'> 	if (!ret || ret == -ERESTARTSYS)</div><div class='head'>diff --git a/drivers/accel/amdxdna/aie2_message.c b/drivers/accel/amdxdna/aie2_message.c<br/>index bf4219e32cc1..82412eec9a4b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/aie2_message.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/aie2_message.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/aie2_message.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/aie2_message.c</a></div><div class='hunk'>@@ -525,7 +525,7 @@ aie2_cmdlist_fill_one_slot_cf(void *cmd_buf, u32 offset,</div><div class='ctx'> 	if (!payload)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!slot_cf_has_space(offset, payload_len))</div><div class='add'>+	if (!slot_has_space(*buf, offset, payload_len))</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> </div><div class='ctx'> 	buf-&gt;cu_idx = cu_idx;</div><div class='hunk'>@@ -558,7 +558,7 @@ aie2_cmdlist_fill_one_slot_dpu(void *cmd_buf, u32 offset,</div><div class='ctx'> 	if (payload_len &lt; sizeof(*sn) || arg_sz &gt; MAX_DPU_ARGS_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!slot_dpu_has_space(offset, arg_sz))</div><div class='add'>+	if (!slot_has_space(*buf, offset, arg_sz))</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> </div><div class='ctx'> 	buf-&gt;inst_buf_addr = sn-&gt;buffer;</div><div class='hunk'>@@ -569,7 +569,7 @@ aie2_cmdlist_fill_one_slot_dpu(void *cmd_buf, u32 offset,</div><div class='ctx'> 	memcpy(buf-&gt;args, sn-&gt;prop_args, arg_sz);</div><div class='ctx'> </div><div class='ctx'> 	/* Accurate buf size to hint firmware to do necessary copy */</div><div class='del'>-	*size += sizeof(*buf) + arg_sz;</div><div class='add'>+	*size = sizeof(*buf) + arg_sz;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/amdxdna/aie2_msg_priv.h b/drivers/accel/amdxdna/aie2_msg_priv.h<br/>index 4e02e744b470..6df9065b13f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/aie2_msg_priv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/aie2_msg_priv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/aie2_msg_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/aie2_msg_priv.h</a></div><div class='hunk'>@@ -319,18 +319,16 @@ struct async_event_msg_resp {</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> #define MAX_CHAIN_CMDBUF_SIZE SZ_4K</div><div class='del'>-#define slot_cf_has_space(offset, payload_size) \</div><div class='del'>-	(MAX_CHAIN_CMDBUF_SIZE - ((offset) + (payload_size)) &gt; \</div><div class='del'>-	 offsetof(struct cmd_chain_slot_execbuf_cf, args[0]))</div><div class='add'>+#define slot_has_space(slot, offset, payload_size)		\</div><div class='add'>+	(MAX_CHAIN_CMDBUF_SIZE &gt;= (offset) + (payload_size) +	\</div><div class='add'>+	 sizeof(typeof(slot)))</div><div class='add'>+</div><div class='ctx'> struct cmd_chain_slot_execbuf_cf {</div><div class='ctx'> 	__u32 cu_idx;</div><div class='ctx'> 	__u32 arg_cnt;</div><div class='ctx'> 	__u32 args[] __counted_by(arg_cnt);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define slot_dpu_has_space(offset, payload_size) \</div><div class='del'>-	(MAX_CHAIN_CMDBUF_SIZE - ((offset) + (payload_size)) &gt; \</div><div class='del'>-	 offsetof(struct cmd_chain_slot_dpu, args[0]))</div><div class='ctx'> struct cmd_chain_slot_dpu {</div><div class='ctx'> 	__u64 inst_buf_addr;</div><div class='ctx'> 	__u32 inst_size;</div><div class='head'>diff --git a/drivers/accel/amdxdna/amdxdna_ctx.c b/drivers/accel/amdxdna/amdxdna_ctx.c<br/>index 43442b9e273b..be073224bd69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_ctx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_ctx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_ctx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/amdxdna_ctx.c</a></div><div class='hunk'>@@ -496,11 +496,11 @@ static int amdxdna_drm_submit_execbuf(struct amdxdna_client *client,</div><div class='ctx'> 				      struct amdxdna_drm_exec_cmd *args)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdxdna_dev *xdna = client-&gt;xdna;</div><div class='del'>-	u32 *arg_bo_hdls;</div><div class='add'>+	u32 *arg_bo_hdls = NULL;</div><div class='ctx'> 	u32 cmd_bo_hdl;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!args-&gt;arg_count || args-&gt;arg_count &gt; MAX_ARG_COUNT) {</div><div class='add'>+	if (args-&gt;arg_count &gt; MAX_ARG_COUNT) {</div><div class='ctx'> 		XDNA_ERR(xdna, "Invalid arg bo count %d", args-&gt;arg_count);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -512,14 +512,16 @@ static int amdxdna_drm_submit_execbuf(struct amdxdna_client *client,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cmd_bo_hdl = (u32)args-&gt;cmd_handles;</div><div class='del'>-	arg_bo_hdls = kcalloc(args-&gt;arg_count, sizeof(u32), GFP_KERNEL);</div><div class='del'>-	if (!arg_bo_hdls)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	ret = copy_from_user(arg_bo_hdls, u64_to_user_ptr(args-&gt;args),</div><div class='del'>-			     args-&gt;arg_count * sizeof(u32));</div><div class='del'>-	if (ret) {</div><div class='del'>-		ret = -EFAULT;</div><div class='del'>-		goto free_cmd_bo_hdls;</div><div class='add'>+	if (args-&gt;arg_count) {</div><div class='add'>+		arg_bo_hdls = kcalloc(args-&gt;arg_count, sizeof(u32), GFP_KERNEL);</div><div class='add'>+		if (!arg_bo_hdls)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		ret = copy_from_user(arg_bo_hdls, u64_to_user_ptr(args-&gt;args),</div><div class='add'>+				     args-&gt;arg_count * sizeof(u32));</div><div class='add'>+		if (ret) {</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+			goto free_cmd_bo_hdls;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = amdxdna_cmd_submit(client, cmd_bo_hdl, arg_bo_hdls,</div><div class='head'>diff --git a/drivers/accel/amdxdna/amdxdna_gem.c b/drivers/accel/amdxdna/amdxdna_gem.c<br/>index 606433d73236..26831ec69f89 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_gem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_gem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/amdxdna_gem.c</a></div><div class='hunk'>@@ -9,7 +9,10 @@</div><div class='ctx'> #include &lt;drm/drm_gem.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_shmem_helper.h&gt;</div><div class='ctx'> #include &lt;drm/gpu_scheduler.h&gt;</div><div class='add'>+#include &lt;linux/dma-buf.h&gt;</div><div class='add'>+#include &lt;linux/dma-direct.h&gt;</div><div class='ctx'> #include &lt;linux/iosys-map.h&gt;</div><div class='add'>+#include &lt;linux/pagemap.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "amdxdna_ctx.h"</div><div class='hunk'>@@ -18,6 +21,8 @@</div><div class='ctx'> </div><div class='ctx'> #define XDNA_MAX_CMD_BO_SIZE	SZ_32K</div><div class='ctx'> </div><div class='add'>+MODULE_IMPORT_NS("DMA_BUF");</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> amdxdna_gem_insert_node_locked(struct amdxdna_gem_obj *abo, bool use_vmap)</div><div class='ctx'> {</div><div class='hunk'>@@ -55,57 +60,38 @@ amdxdna_gem_insert_node_locked(struct amdxdna_gem_obj *abo, bool use_vmap)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdxdna_gem_obj_free(struct drm_gem_object *gobj)</div><div class='del'>-{</div><div class='del'>-	struct amdxdna_dev *xdna = to_xdna_dev(gobj-&gt;dev);</div><div class='del'>-	struct amdxdna_gem_obj *abo = to_xdna_obj(gobj);</div><div class='del'>-	struct iosys_map map = IOSYS_MAP_INIT_VADDR(abo-&gt;mem.kva);</div><div class='del'>-</div><div class='del'>-	XDNA_DBG(xdna, "BO type %d xdna_addr 0x%llx", abo-&gt;type, abo-&gt;mem.dev_addr);</div><div class='del'>-	if (abo-&gt;pinned)</div><div class='del'>-		amdxdna_gem_unpin(abo);</div><div class='del'>-</div><div class='del'>-	if (abo-&gt;type == AMDXDNA_BO_DEV) {</div><div class='del'>-		mutex_lock(&amp;abo-&gt;client-&gt;mm_lock);</div><div class='del'>-		drm_mm_remove_node(&amp;abo-&gt;mm_node);</div><div class='del'>-		mutex_unlock(&amp;abo-&gt;client-&gt;mm_lock);</div><div class='del'>-</div><div class='del'>-		vunmap(abo-&gt;mem.kva);</div><div class='del'>-		drm_gem_object_put(to_gobj(abo-&gt;dev_heap));</div><div class='del'>-		drm_gem_object_release(gobj);</div><div class='del'>-		mutex_destroy(&amp;abo-&gt;lock);</div><div class='del'>-		kfree(abo);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (abo-&gt;type == AMDXDNA_BO_DEV_HEAP)</div><div class='del'>-		drm_mm_takedown(&amp;abo-&gt;mm);</div><div class='del'>-</div><div class='del'>-	drm_gem_vunmap_unlocked(gobj, &amp;map);</div><div class='del'>-	mutex_destroy(&amp;abo-&gt;lock);</div><div class='del'>-	drm_gem_shmem_free(&amp;abo-&gt;base);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct drm_gem_object_funcs amdxdna_gem_dev_obj_funcs = {</div><div class='del'>-	.free = amdxdna_gem_obj_free,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static bool amdxdna_hmm_invalidate(struct mmu_interval_notifier *mni,</div><div class='ctx'> 				   const struct mmu_notifier_range *range,</div><div class='ctx'> 				   unsigned long cur_seq)</div><div class='ctx'> {</div><div class='del'>-	struct amdxdna_gem_obj *abo = container_of(mni, struct amdxdna_gem_obj,</div><div class='del'>-						   mem.notifier);</div><div class='del'>-	struct amdxdna_dev *xdna = to_xdna_dev(to_gobj(abo)-&gt;dev);</div><div class='add'>+	struct amdxdna_umap *mapp = container_of(mni, struct amdxdna_umap, notifier);</div><div class='add'>+	struct amdxdna_gem_obj *abo = mapp-&gt;abo;</div><div class='add'>+	struct amdxdna_dev *xdna;</div><div class='ctx'> </div><div class='del'>-	XDNA_DBG(xdna, "Invalid range 0x%llx, 0x%lx, type %d",</div><div class='del'>-		 abo-&gt;mem.userptr, abo-&gt;mem.size, abo-&gt;type);</div><div class='add'>+	xdna = to_xdna_dev(to_gobj(abo)-&gt;dev);</div><div class='add'>+	XDNA_DBG(xdna, "Invalidating range 0x%lx, 0x%lx, type %d",</div><div class='add'>+		 mapp-&gt;vma-&gt;vm_start, mapp-&gt;vma-&gt;vm_end, abo-&gt;type);</div><div class='ctx'> </div><div class='ctx'> 	if (!mmu_notifier_range_blockable(range))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	down_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	abo-&gt;mem.map_invalid = true;</div><div class='add'>+	mapp-&gt;invalid = true;</div><div class='add'>+	mmu_interval_set_seq(&amp;mapp-&gt;notifier, cur_seq);</div><div class='add'>+	up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+</div><div class='ctx'> 	xdna-&gt;dev_info-&gt;ops-&gt;hmm_invalidate(abo, cur_seq);</div><div class='ctx'> </div><div class='add'>+	if (range-&gt;event == MMU_NOTIFY_UNMAP) {</div><div class='add'>+		down_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+		if (!mapp-&gt;unmapped) {</div><div class='add'>+			queue_work(xdna-&gt;notifier_wq, &amp;mapp-&gt;hmm_unreg_work);</div><div class='add'>+			mapp-&gt;unmapped = true;</div><div class='add'>+		}</div><div class='add'>+		up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -113,102 +99,310 @@ static const struct mmu_interval_notifier_ops amdxdna_hmm_ops = {</div><div class='ctx'> 	.invalidate = amdxdna_hmm_invalidate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void amdxdna_hmm_unregister(struct amdxdna_gem_obj *abo)</div><div class='add'>+static void amdxdna_hmm_unregister(struct amdxdna_gem_obj *abo,</div><div class='add'>+				   struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdxdna_dev *xdna = to_xdna_dev(to_gobj(abo)-&gt;dev);</div><div class='add'>+	struct amdxdna_umap *mapp;</div><div class='add'>+</div><div class='add'>+	down_read(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	list_for_each_entry(mapp, &amp;abo-&gt;mem.umap_list, node) {</div><div class='add'>+		if (!vma || mapp-&gt;vma == vma) {</div><div class='add'>+			if (!mapp-&gt;unmapped) {</div><div class='add'>+				queue_work(xdna-&gt;notifier_wq, &amp;mapp-&gt;hmm_unreg_work);</div><div class='add'>+				mapp-&gt;unmapped = true;</div><div class='add'>+			}</div><div class='add'>+			if (vma)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	up_read(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (!xdna-&gt;dev_info-&gt;ops-&gt;hmm_invalidate)</div><div class='del'>-		return;</div><div class='add'>+static void amdxdna_umap_release(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct amdxdna_umap *mapp = container_of(ref, struct amdxdna_umap, refcnt);</div><div class='add'>+	struct vm_area_struct *vma = mapp-&gt;vma;</div><div class='add'>+	struct amdxdna_dev *xdna;</div><div class='add'>+</div><div class='add'>+	mmu_interval_notifier_remove(&amp;mapp-&gt;notifier);</div><div class='add'>+	if (is_import_bo(mapp-&gt;abo) &amp;&amp; vma-&gt;vm_file &amp;&amp; vma-&gt;vm_file-&gt;f_mapping)</div><div class='add'>+		mapping_clear_unevictable(vma-&gt;vm_file-&gt;f_mapping);</div><div class='add'>+</div><div class='add'>+	xdna = to_xdna_dev(to_gobj(mapp-&gt;abo)-&gt;dev);</div><div class='add'>+	down_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	list_del(&amp;mapp-&gt;node);</div><div class='add'>+	up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+</div><div class='add'>+	kvfree(mapp-&gt;range.hmm_pfns);</div><div class='add'>+	kfree(mapp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdxdna_umap_put(struct amdxdna_umap *mapp)</div><div class='add'>+{</div><div class='add'>+	kref_put(&amp;mapp-&gt;refcnt, amdxdna_umap_release);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdxdna_hmm_unreg_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amdxdna_umap *mapp = container_of(work, struct amdxdna_umap,</div><div class='add'>+						 hmm_unreg_work);</div><div class='ctx'> </div><div class='del'>-	mmu_interval_notifier_remove(&amp;abo-&gt;mem.notifier);</div><div class='del'>-	kvfree(abo-&gt;mem.pfns);</div><div class='del'>-	abo-&gt;mem.pfns = NULL;</div><div class='add'>+	amdxdna_umap_put(mapp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amdxdna_hmm_register(struct amdxdna_gem_obj *abo, unsigned long addr,</div><div class='del'>-				size_t len)</div><div class='add'>+static int amdxdna_hmm_register(struct amdxdna_gem_obj *abo,</div><div class='add'>+				struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdxdna_dev *xdna = to_xdna_dev(to_gobj(abo)-&gt;dev);</div><div class='add'>+	unsigned long len = vma-&gt;vm_end - vma-&gt;vm_start;</div><div class='add'>+	unsigned long addr = vma-&gt;vm_start;</div><div class='add'>+	struct amdxdna_umap *mapp;</div><div class='ctx'> 	u32 nr_pages;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!xdna-&gt;dev_info-&gt;ops-&gt;hmm_invalidate)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (abo-&gt;mem.pfns)</div><div class='del'>-		return -EEXIST;</div><div class='add'>+	mapp = kzalloc(sizeof(*mapp), GFP_KERNEL);</div><div class='add'>+	if (!mapp)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	nr_pages = (PAGE_ALIGN(addr + len) - (addr &amp; PAGE_MASK)) &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	abo-&gt;mem.pfns = kvcalloc(nr_pages, sizeof(*abo-&gt;mem.pfns),</div><div class='del'>-				 GFP_KERNEL);</div><div class='del'>-	if (!abo-&gt;mem.pfns)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	mapp-&gt;range.hmm_pfns = kvcalloc(nr_pages, sizeof(*mapp-&gt;range.hmm_pfns),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!mapp-&gt;range.hmm_pfns) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto free_map;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = mmu_interval_notifier_insert_locked(&amp;abo-&gt;mem.notifier,</div><div class='add'>+	ret = mmu_interval_notifier_insert_locked(&amp;mapp-&gt;notifier,</div><div class='ctx'> 						  current-&gt;mm,</div><div class='ctx'> 						  addr,</div><div class='ctx'> 						  len,</div><div class='ctx'> 						  &amp;amdxdna_hmm_ops);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		XDNA_ERR(xdna, "Insert mmu notifier failed, ret %d", ret);</div><div class='del'>-		kvfree(abo-&gt;mem.pfns);</div><div class='add'>+		goto free_pfns;</div><div class='ctx'> 	}</div><div class='del'>-	abo-&gt;mem.userptr = addr;</div><div class='ctx'> </div><div class='add'>+	mapp-&gt;range.notifier = &amp;mapp-&gt;notifier;</div><div class='add'>+	mapp-&gt;range.start = vma-&gt;vm_start;</div><div class='add'>+	mapp-&gt;range.end = vma-&gt;vm_end;</div><div class='add'>+	mapp-&gt;range.default_flags = HMM_PFN_REQ_FAULT;</div><div class='add'>+	mapp-&gt;vma = vma;</div><div class='add'>+	mapp-&gt;abo = abo;</div><div class='add'>+	kref_init(&amp;mapp-&gt;refcnt);</div><div class='add'>+</div><div class='add'>+	if (abo-&gt;mem.userptr == AMDXDNA_INVALID_ADDR)</div><div class='add'>+		abo-&gt;mem.userptr = addr;</div><div class='add'>+	INIT_WORK(&amp;mapp-&gt;hmm_unreg_work, amdxdna_hmm_unreg_work);</div><div class='add'>+	if (is_import_bo(abo) &amp;&amp; vma-&gt;vm_file &amp;&amp; vma-&gt;vm_file-&gt;f_mapping)</div><div class='add'>+		mapping_set_unevictable(vma-&gt;vm_file-&gt;f_mapping);</div><div class='add'>+</div><div class='add'>+	down_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+	list_add_tail(&amp;mapp-&gt;node, &amp;abo-&gt;mem.umap_list);</div><div class='add'>+	up_write(&amp;xdna-&gt;notifier_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_pfns:</div><div class='add'>+	kvfree(mapp-&gt;range.hmm_pfns);</div><div class='add'>+free_map:</div><div class='add'>+	kfree(mapp);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int amdxdna_insert_pages(struct amdxdna_gem_obj *abo,</div><div class='add'>+				struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct amdxdna_dev *xdna = to_xdna_dev(to_gobj(abo)-&gt;dev);</div><div class='add'>+	unsigned long num_pages = vma_pages(vma);</div><div class='add'>+	unsigned long offset = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!is_import_bo(abo)) {</div><div class='add'>+		ret = drm_gem_shmem_mmap(&amp;abo-&gt;base, vma);</div><div class='add'>+		if (ret) {</div><div class='add'>+			XDNA_ERR(xdna, "Failed shmem mmap %d", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The buffer is based on memory pages. Fix the flag. */</div><div class='add'>+		vm_flags_mod(vma, VM_MIXEDMAP, VM_PFNMAP);</div><div class='add'>+		ret = vm_insert_pages(vma, vma-&gt;vm_start, abo-&gt;base.pages,</div><div class='add'>+				      &amp;num_pages);</div><div class='add'>+		if (ret) {</div><div class='add'>+			XDNA_ERR(xdna, "Failed insert pages %d", ret);</div><div class='add'>+			vma-&gt;vm_ops-&gt;close(vma);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vma-&gt;vm_private_data = NULL;</div><div class='add'>+	vma-&gt;vm_ops = NULL;</div><div class='add'>+	ret = dma_buf_mmap(to_gobj(abo)-&gt;dma_buf, vma, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		XDNA_ERR(xdna, "Failed to mmap dma buf %d", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		vm_fault_t fault_ret;</div><div class='add'>+</div><div class='add'>+		fault_ret = handle_mm_fault(vma, vma-&gt;vm_start + offset,</div><div class='add'>+					    FAULT_FLAG_WRITE, NULL);</div><div class='add'>+		if (fault_ret &amp; VM_FAULT_ERROR) {</div><div class='add'>+			vma-&gt;vm_ops-&gt;close(vma);</div><div class='add'>+			XDNA_ERR(xdna, "Fault in page failed");</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		offset += PAGE_SIZE;</div><div class='add'>+	} while (--num_pages);</div><div class='add'>+</div><div class='add'>+	/* Drop the reference drm_gem_mmap_obj() acquired.*/</div><div class='add'>+	drm_gem_object_put(to_gobj(abo));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int amdxdna_gem_obj_mmap(struct drm_gem_object *gobj,</div><div class='ctx'> 				struct vm_area_struct *vma)</div><div class='ctx'> {</div><div class='add'>+	struct amdxdna_dev *xdna = to_xdna_dev(gobj-&gt;dev);</div><div class='ctx'> 	struct amdxdna_gem_obj *abo = to_xdna_obj(gobj);</div><div class='del'>-	unsigned long num_pages;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = amdxdna_hmm_register(abo, vma-&gt;vm_start, gobj-&gt;size);</div><div class='add'>+	ret = amdxdna_hmm_register(abo, vma);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	ret = amdxdna_insert_pages(abo, vma);</div><div class='add'>+	if (ret) {</div><div class='add'>+		XDNA_ERR(xdna, "Failed insert pages, ret %d", ret);</div><div class='add'>+		goto hmm_unreg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	XDNA_DBG(xdna, "BO map_offset 0x%llx type %d userptr 0x%lx size 0x%lx",</div><div class='add'>+		 drm_vma_node_offset_addr(&amp;gobj-&gt;vma_node), abo-&gt;type,</div><div class='add'>+		 vma-&gt;vm_start, gobj-&gt;size);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+hmm_unreg:</div><div class='add'>+	amdxdna_hmm_unregister(abo, vma);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdxdna_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)</div><div class='add'>+{</div><div class='add'>+	struct drm_gem_object *gobj = dma_buf-&gt;priv;</div><div class='add'>+	struct amdxdna_gem_obj *abo = to_xdna_obj(gobj);</div><div class='add'>+	unsigned long num_pages = vma_pages(vma);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vma-&gt;vm_ops = &amp;drm_gem_shmem_vm_ops;</div><div class='add'>+	vma-&gt;vm_private_data = gobj;</div><div class='add'>+</div><div class='add'>+	drm_gem_object_get(gobj);</div><div class='ctx'> 	ret = drm_gem_shmem_mmap(&amp;abo-&gt;base, vma);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto hmm_unreg;</div><div class='add'>+		goto put_obj;</div><div class='ctx'> </div><div class='del'>-	num_pages = gobj-&gt;size &gt;&gt; PAGE_SHIFT;</div><div class='del'>-	/* Try to insert the pages */</div><div class='add'>+	/* The buffer is based on memory pages. Fix the flag. */</div><div class='ctx'> 	vm_flags_mod(vma, VM_MIXEDMAP, VM_PFNMAP);</div><div class='del'>-	ret = vm_insert_pages(vma, vma-&gt;vm_start, abo-&gt;base.pages, &amp;num_pages);</div><div class='add'>+	ret = vm_insert_pages(vma, vma-&gt;vm_start, abo-&gt;base.pages,</div><div class='add'>+			      &amp;num_pages);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		XDNA_ERR(abo-&gt;client-&gt;xdna, "Failed insert pages, ret %d", ret);</div><div class='add'>+		goto close_vma;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-hmm_unreg:</div><div class='del'>-	amdxdna_hmm_unregister(abo);</div><div class='add'>+close_vma:</div><div class='add'>+	vma-&gt;vm_ops-&gt;close(vma);</div><div class='add'>+put_obj:</div><div class='add'>+	drm_gem_object_put(gobj);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static vm_fault_t amdxdna_gem_vm_fault(struct vm_fault *vmf)</div><div class='add'>+static const struct dma_buf_ops amdxdna_dmabuf_ops = {</div><div class='add'>+	.attach = drm_gem_map_attach,</div><div class='add'>+	.detach = drm_gem_map_detach,</div><div class='add'>+	.map_dma_buf = drm_gem_map_dma_buf,</div><div class='add'>+	.unmap_dma_buf = drm_gem_unmap_dma_buf,</div><div class='add'>+	.release = drm_gem_dmabuf_release,</div><div class='add'>+	.mmap = amdxdna_gem_dmabuf_mmap,</div><div class='add'>+	.vmap = drm_gem_dmabuf_vmap,</div><div class='add'>+	.vunmap = drm_gem_dmabuf_vunmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dma_buf *amdxdna_gem_prime_export(struct drm_gem_object *gobj, int flags)</div><div class='ctx'> {</div><div class='del'>-	return drm_gem_shmem_vm_ops.fault(vmf);</div><div class='add'>+	DEFINE_DMA_BUF_EXPORT_INFO(exp_info);</div><div class='add'>+</div><div class='add'>+	exp_info.ops = &amp;amdxdna_dmabuf_ops;</div><div class='add'>+	exp_info.size = gobj-&gt;size;</div><div class='add'>+	exp_info.flags = flags;</div><div class='add'>+	exp_info.priv = gobj;</div><div class='add'>+	exp_info.resv = gobj-&gt;resv;</div><div class='add'>+</div><div class='add'>+	return drm_gem_dmabuf_export(gobj-&gt;dev, &amp;exp_info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdxdna_gem_vm_open(struct vm_area_struct *vma)</div><div class='add'>+static void amdxdna_imported_obj_free(struct amdxdna_gem_obj *abo)</div><div class='ctx'> {</div><div class='del'>-	drm_gem_shmem_vm_ops.open(vma);</div><div class='add'>+	dma_buf_unmap_attachment_unlocked(abo-&gt;attach, abo-&gt;base.sgt, DMA_BIDIRECTIONAL);</div><div class='add'>+	dma_buf_detach(abo-&gt;dma_buf, abo-&gt;attach);</div><div class='add'>+	dma_buf_put(abo-&gt;dma_buf);</div><div class='add'>+	drm_gem_object_release(to_gobj(abo));</div><div class='add'>+	kfree(abo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdxdna_gem_vm_close(struct vm_area_struct *vma)</div><div class='add'>+static void amdxdna_gem_obj_free(struct drm_gem_object *gobj)</div><div class='ctx'> {</div><div class='del'>-	struct drm_gem_object *gobj = vma-&gt;vm_private_data;</div><div class='add'>+	struct amdxdna_dev *xdna = to_xdna_dev(gobj-&gt;dev);</div><div class='add'>+	struct amdxdna_gem_obj *abo = to_xdna_obj(gobj);</div><div class='add'>+	struct iosys_map map = IOSYS_MAP_INIT_VADDR(abo-&gt;mem.kva);</div><div class='add'>+</div><div class='add'>+	XDNA_DBG(xdna, "BO type %d xdna_addr 0x%llx", abo-&gt;type, abo-&gt;mem.dev_addr);</div><div class='add'>+</div><div class='add'>+	amdxdna_hmm_unregister(abo, NULL);</div><div class='add'>+	flush_workqueue(xdna-&gt;notifier_wq);</div><div class='add'>+</div><div class='add'>+	if (abo-&gt;pinned)</div><div class='add'>+		amdxdna_gem_unpin(abo);</div><div class='ctx'> </div><div class='del'>-	amdxdna_hmm_unregister(to_xdna_obj(gobj));</div><div class='del'>-	drm_gem_shmem_vm_ops.close(vma);</div><div class='add'>+	if (abo-&gt;type == AMDXDNA_BO_DEV) {</div><div class='add'>+		mutex_lock(&amp;abo-&gt;client-&gt;mm_lock);</div><div class='add'>+		drm_mm_remove_node(&amp;abo-&gt;mm_node);</div><div class='add'>+		mutex_unlock(&amp;abo-&gt;client-&gt;mm_lock);</div><div class='add'>+</div><div class='add'>+		vunmap(abo-&gt;mem.kva);</div><div class='add'>+		drm_gem_object_put(to_gobj(abo-&gt;dev_heap));</div><div class='add'>+		drm_gem_object_release(gobj);</div><div class='add'>+		mutex_destroy(&amp;abo-&gt;lock);</div><div class='add'>+		kfree(abo);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (abo-&gt;type == AMDXDNA_BO_DEV_HEAP)</div><div class='add'>+		drm_mm_takedown(&amp;abo-&gt;mm);</div><div class='add'>+</div><div class='add'>+	drm_gem_vunmap(gobj, &amp;map);</div><div class='add'>+	mutex_destroy(&amp;abo-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (is_import_bo(abo)) {</div><div class='add'>+		amdxdna_imported_obj_free(abo);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_gem_shmem_free(&amp;abo-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct vm_operations_struct amdxdna_gem_vm_ops = {</div><div class='del'>-	.fault = amdxdna_gem_vm_fault,</div><div class='del'>-	.open = amdxdna_gem_vm_open,</div><div class='del'>-	.close = amdxdna_gem_vm_close,</div><div class='add'>+static const struct drm_gem_object_funcs amdxdna_gem_dev_obj_funcs = {</div><div class='add'>+	.free = amdxdna_gem_obj_free,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct drm_gem_object_funcs amdxdna_gem_shmem_funcs = {</div><div class='hunk'>@@ -220,7 +414,8 @@ static const struct drm_gem_object_funcs amdxdna_gem_shmem_funcs = {</div><div class='ctx'> 	.vmap = drm_gem_shmem_object_vmap,</div><div class='ctx'> 	.vunmap = drm_gem_shmem_object_vunmap,</div><div class='ctx'> 	.mmap = amdxdna_gem_obj_mmap,</div><div class='del'>-	.vm_ops = &amp;amdxdna_gem_vm_ops,</div><div class='add'>+	.vm_ops = &amp;drm_gem_shmem_vm_ops,</div><div class='add'>+	.export = amdxdna_gem_prime_export,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct amdxdna_gem_obj *</div><div class='hunk'>@@ -239,6 +434,7 @@ amdxdna_gem_create_obj(struct drm_device *dev, size_t size)</div><div class='ctx'> 	abo-&gt;mem.userptr = AMDXDNA_INVALID_ADDR;</div><div class='ctx'> 	abo-&gt;mem.dev_addr = AMDXDNA_INVALID_ADDR;</div><div class='ctx'> 	abo-&gt;mem.size = size;</div><div class='add'>+	INIT_LIST_HEAD(&amp;abo-&gt;mem.umap_list);</div><div class='ctx'> </div><div class='ctx'> 	return abo;</div><div class='ctx'> }</div><div class='hunk'>@@ -258,6 +454,51 @@ amdxdna_gem_create_object_cb(struct drm_device *dev, size_t size)</div><div class='ctx'> 	return to_gobj(abo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct drm_gem_object *</div><div class='add'>+amdxdna_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf)</div><div class='add'>+{</div><div class='add'>+	struct dma_buf_attachment *attach;</div><div class='add'>+	struct amdxdna_gem_obj *abo;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+	struct sg_table *sgt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	get_dma_buf(dma_buf);</div><div class='add'>+</div><div class='add'>+	attach = dma_buf_attach(dma_buf, dev-&gt;dev);</div><div class='add'>+	if (IS_ERR(attach)) {</div><div class='add'>+		ret = PTR_ERR(attach);</div><div class='add'>+		goto put_buf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sgt = dma_buf_map_attachment_unlocked(attach, DMA_BIDIRECTIONAL);</div><div class='add'>+	if (IS_ERR(sgt)) {</div><div class='add'>+		ret = PTR_ERR(sgt);</div><div class='add'>+		goto fail_detach;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gobj = drm_gem_shmem_prime_import_sg_table(dev, attach, sgt);</div><div class='add'>+	if (IS_ERR(gobj)) {</div><div class='add'>+		ret = PTR_ERR(gobj);</div><div class='add'>+		goto fail_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	abo = to_xdna_obj(gobj);</div><div class='add'>+	abo-&gt;attach = attach;</div><div class='add'>+	abo-&gt;dma_buf = dma_buf;</div><div class='add'>+</div><div class='add'>+	return gobj;</div><div class='add'>+</div><div class='add'>+fail_unmap:</div><div class='add'>+	dma_buf_unmap_attachment_unlocked(attach, sgt, DMA_BIDIRECTIONAL);</div><div class='add'>+fail_detach:</div><div class='add'>+	dma_buf_detach(dma_buf, attach);</div><div class='add'>+put_buf:</div><div class='add'>+	dma_buf_put(dma_buf);</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct amdxdna_gem_obj *</div><div class='ctx'> amdxdna_drm_alloc_shmem(struct drm_device *dev,</div><div class='ctx'> 			struct amdxdna_drm_create_bo *args,</div><div class='hunk'>@@ -417,7 +658,7 @@ amdxdna_drm_create_cmd_bo(struct drm_device *dev,</div><div class='ctx'> 	abo-&gt;type = AMDXDNA_BO_CMD;</div><div class='ctx'> 	abo-&gt;client = filp-&gt;driver_priv;</div><div class='ctx'> </div><div class='del'>-	ret = drm_gem_vmap_unlocked(to_gobj(abo), &amp;map);</div><div class='add'>+	ret = drm_gem_vmap(to_gobj(abo), &amp;map);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		XDNA_ERR(xdna, "Vmap cmd bo failed, ret %d", ret);</div><div class='ctx'> 		goto release_obj;</div><div class='hunk'>@@ -483,6 +724,9 @@ int amdxdna_gem_pin_nolock(struct amdxdna_gem_obj *abo)</div><div class='ctx'> 	struct amdxdna_dev *xdna = to_xdna_dev(to_gobj(abo)-&gt;dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (is_import_bo(abo))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	switch (abo-&gt;type) {</div><div class='ctx'> 	case AMDXDNA_BO_SHMEM:</div><div class='ctx'> 	case AMDXDNA_BO_DEV_HEAP:</div><div class='hunk'>@@ -515,6 +759,9 @@ int amdxdna_gem_pin(struct amdxdna_gem_obj *abo)</div><div class='ctx'> </div><div class='ctx'> void amdxdna_gem_unpin(struct amdxdna_gem_obj *abo)</div><div class='ctx'> {</div><div class='add'>+	if (is_import_bo(abo))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (abo-&gt;type == AMDXDNA_BO_DEV)</div><div class='ctx'> 		abo = abo-&gt;dev_heap;</div><div class='ctx'> </div><div class='hunk'>@@ -606,7 +853,9 @@ int amdxdna_drm_sync_bo_ioctl(struct drm_device *dev,</div><div class='ctx'> 		goto put_obj;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (abo-&gt;type == AMDXDNA_BO_DEV)</div><div class='add'>+	if (is_import_bo(abo))</div><div class='add'>+		drm_clflush_sg(abo-&gt;base.sgt);</div><div class='add'>+	else if (abo-&gt;type == AMDXDNA_BO_DEV)</div><div class='ctx'> 		drm_clflush_pages(abo-&gt;mem.pages, abo-&gt;mem.nr_pages);</div><div class='ctx'> 	else</div><div class='ctx'> 		drm_clflush_pages(abo-&gt;base.pages, gobj-&gt;size &gt;&gt; PAGE_SHIFT);</div><div class='head'>diff --git a/drivers/accel/amdxdna/amdxdna_gem.h b/drivers/accel/amdxdna/amdxdna_gem.h<br/>index 8ccc0375dd9d..aee97e971d6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_gem.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_gem.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_gem.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/amdxdna_gem.h</a></div><div class='hunk'>@@ -6,6 +6,20 @@</div><div class='ctx'> #ifndef _AMDXDNA_GEM_H_</div><div class='ctx'> #define _AMDXDNA_GEM_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/hmm.h&gt;</div><div class='add'>+</div><div class='add'>+struct amdxdna_umap {</div><div class='add'>+	struct vm_area_struct		*vma;</div><div class='add'>+	struct mmu_interval_notifier	notifier;</div><div class='add'>+	struct hmm_range		range;</div><div class='add'>+	struct work_struct		hmm_unreg_work;</div><div class='add'>+	struct amdxdna_gem_obj		*abo;</div><div class='add'>+	struct list_head		node;</div><div class='add'>+	struct kref			refcnt;</div><div class='add'>+	bool				invalid;</div><div class='add'>+	bool				unmapped;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct amdxdna_mem {</div><div class='ctx'> 	u64				userptr;</div><div class='ctx'> 	void				*kva;</div><div class='hunk'>@@ -13,8 +27,7 @@ struct amdxdna_mem {</div><div class='ctx'> 	size_t				size;</div><div class='ctx'> 	struct page			**pages;</div><div class='ctx'> 	u32				nr_pages;</div><div class='del'>-	struct mmu_interval_notifier	notifier;</div><div class='del'>-	unsigned long			*pfns;</div><div class='add'>+	struct list_head		umap_list;</div><div class='ctx'> 	bool				map_invalid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -31,9 +44,12 @@ struct amdxdna_gem_obj {</div><div class='ctx'> 	struct amdxdna_gem_obj		*dev_heap; /* For AMDXDNA_BO_DEV */</div><div class='ctx'> 	struct drm_mm_node		mm_node; /* For AMDXDNA_BO_DEV */</div><div class='ctx'> 	u32				assigned_hwctx;</div><div class='add'>+	struct dma_buf			*dma_buf;</div><div class='add'>+	struct dma_buf_attachment	*attach;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define to_gobj(obj)    (&amp;(obj)-&gt;base.base)</div><div class='add'>+#define is_import_bo(obj) ((obj)-&gt;attach)</div><div class='ctx'> </div><div class='ctx'> static inline struct amdxdna_gem_obj *to_xdna_obj(struct drm_gem_object *gobj)</div><div class='ctx'> {</div><div class='hunk'>@@ -47,8 +63,12 @@ static inline void amdxdna_gem_put_obj(struct amdxdna_gem_obj *abo)</div><div class='ctx'> 	drm_gem_object_put(to_gobj(abo));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void amdxdna_umap_put(struct amdxdna_umap *mapp);</div><div class='add'>+</div><div class='ctx'> struct drm_gem_object *</div><div class='ctx'> amdxdna_gem_create_object_cb(struct drm_device *dev, size_t size);</div><div class='add'>+struct drm_gem_object *</div><div class='add'>+amdxdna_gem_prime_import(struct drm_device *dev, struct dma_buf *dma_buf);</div><div class='ctx'> struct amdxdna_gem_obj *</div><div class='ctx'> amdxdna_drm_alloc_dev_bo(struct drm_device *dev,</div><div class='ctx'> 			 struct amdxdna_drm_create_bo *args,</div><div class='head'>diff --git a/drivers/accel/amdxdna/amdxdna_pci_drv.c b/drivers/accel/amdxdna/amdxdna_pci_drv.c<br/>index f5b8497cf5ad..f2bf1d374cc7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_pci_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_pci_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_pci_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/amdxdna_pci_drv.c</a></div><div class='hunk'>@@ -226,6 +226,7 @@ const struct drm_driver amdxdna_drm_drv = {</div><div class='ctx'> 	.num_ioctls = ARRAY_SIZE(amdxdna_drm_ioctls),</div><div class='ctx'> </div><div class='ctx'> 	.gem_create_object = amdxdna_gem_create_object_cb,</div><div class='add'>+	.gem_prime_import = amdxdna_gem_prime_import,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdxdna_dev_info *</div><div class='hunk'>@@ -266,12 +267,16 @@ static int amdxdna_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		fs_reclaim_release(GFP_KERNEL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	xdna-&gt;notifier_wq = alloc_ordered_workqueue("notifier_wq", 0);</div><div class='add'>+	if (!xdna-&gt;notifier_wq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;xdna-&gt;dev_lock);</div><div class='ctx'> 	ret = xdna-&gt;dev_info-&gt;ops-&gt;init(xdna);</div><div class='ctx'> 	mutex_unlock(&amp;xdna-&gt;dev_lock);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		XDNA_ERR(xdna, "Hardware init failed, ret %d", ret);</div><div class='del'>-		return ret;</div><div class='add'>+		goto destroy_notifier_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = amdxdna_sysfs_init(xdna);</div><div class='hunk'>@@ -301,6 +306,8 @@ failed_dev_fini:</div><div class='ctx'> 	mutex_lock(&amp;xdna-&gt;dev_lock);</div><div class='ctx'> 	xdna-&gt;dev_info-&gt;ops-&gt;fini(xdna);</div><div class='ctx'> 	mutex_unlock(&amp;xdna-&gt;dev_lock);</div><div class='add'>+destroy_notifier_wq:</div><div class='add'>+	destroy_workqueue(xdna-&gt;notifier_wq);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -310,6 +317,8 @@ static void amdxdna_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct amdxdna_client *client;</div><div class='ctx'> </div><div class='add'>+	destroy_workqueue(xdna-&gt;notifier_wq);</div><div class='add'>+</div><div class='ctx'> 	pm_runtime_get_noresume(dev);</div><div class='ctx'> 	pm_runtime_forbid(dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/amdxdna/amdxdna_pci_drv.h b/drivers/accel/amdxdna/amdxdna_pci_drv.h<br/>index 37848a8d8031..ab79600911aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_pci_drv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/amdxdna/amdxdna_pci_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/amdxdna/amdxdna_pci_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/amdxdna/amdxdna_pci_drv.h</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #ifndef _AMDXDNA_PCI_DRV_H_</div><div class='ctx'> #define _AMDXDNA_PCI_DRV_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/xarray.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define XDNA_INFO(xdna, fmt, args...)	drm_info(&amp;(xdna)-&gt;ddev, fmt, ##args)</div><div class='hunk'>@@ -98,6 +99,7 @@ struct amdxdna_dev {</div><div class='ctx'> 	struct list_head		client_list;</div><div class='ctx'> 	struct amdxdna_fw_ver		fw_ver;</div><div class='ctx'> 	struct rw_semaphore		notifier_lock; /* for mmu notifier*/</div><div class='add'>+	struct workqueue_struct		*notifier_wq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/accel/habanalabs/Kconfig b/drivers/accel/habanalabs/Kconfig<br/>index be85336107f9..1919fbb169c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/habanalabs/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/habanalabs/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/habanalabs/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/habanalabs/Kconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> config DRM_ACCEL_HABANALABS</div><div class='ctx'> 	tristate "HabanaLabs AI accelerators"</div><div class='ctx'> 	depends on DRM_ACCEL</div><div class='del'>-	depends on X86_64</div><div class='add'>+	depends on X86 &amp;&amp; X86_64</div><div class='ctx'> 	depends on PCI &amp;&amp; HAS_IOMEM</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='ctx'> 	select HWMON</div><div class='head'>diff --git a/drivers/accel/habanalabs/common/habanalabs_ioctl.c b/drivers/accel/habanalabs/common/habanalabs_ioctl.c<br/>index 8729a0c57d78..dc80ca921d90 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/habanalabs/common/habanalabs_ioctl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/habanalabs/common/habanalabs_ioctl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/habanalabs/common/habanalabs_ioctl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/habanalabs/common/habanalabs_ioctl.c</a></div><div class='hunk'>@@ -17,8 +17,6 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/msr.h&gt;</div><div class='del'>-</div><div class='ctx'> /* make sure there is space for all the signed info */</div><div class='ctx'> static_assert(sizeof(struct cpucp_info) &lt;= SEC_DEV_INFO_BUF_SZ);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_debugfs.c b/drivers/accel/ivpu/ivpu_debugfs.c<br/>index 0825851656a2..cd24ccd20ba6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_debugfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_debugfs.c</a></div><div class='hunk'>@@ -332,7 +332,7 @@ ivpu_force_recovery_fn(struct file *file, const char __user *user_buf, size_t si</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ret = ivpu_rpm_get(vdev);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ivpu_pm_trigger_recovery(vdev, "debugfs");</div><div class='hunk'>@@ -383,7 +383,7 @@ static int dct_active_set(void *data, u64 active_percent)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ret = ivpu_rpm_get(vdev);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (active_percent)</div><div class='hunk'>@@ -455,7 +455,7 @@ priority_bands_fops_write(struct file *file, const char __user *user_buf, size_t</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	buf[size] = '\0';</div><div class='add'>+	buf[ret] = '\0';</div><div class='ctx'> 	ret = sscanf(buf, "%u %u %u %u", &amp;band, &amp;grace_period, &amp;process_grace_period,</div><div class='ctx'> 		     &amp;process_quantum);</div><div class='ctx'> 	if (ret != 4)</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c<br/>index 4fa73189502e..0e7748c5e117 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_drv.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2020-2024 Intel Corporation</div><div class='add'>+ * Copyright (C) 2020-2025 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='hunk'>@@ -164,7 +164,7 @@ static int ivpu_get_param_ioctl(struct drm_device *dev, void *data, struct drm_f</div><div class='ctx'> 		args-&gt;value = vdev-&gt;platform;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_IVPU_PARAM_CORE_CLOCK_RATE:</div><div class='del'>-		args-&gt;value = ivpu_hw_ratio_to_freq(vdev, vdev-&gt;hw-&gt;pll.max_ratio);</div><div class='add'>+		args-&gt;value = ivpu_hw_dpu_max_freq_get(vdev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_IVPU_PARAM_NUM_CONTEXTS:</div><div class='ctx'> 		args-&gt;value = ivpu_get_context_count(vdev);</div><div class='hunk'>@@ -374,6 +374,9 @@ int ivpu_boot(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	drm_WARN_ON(&amp;vdev-&gt;drm, atomic_read(&amp;vdev-&gt;job_timeout_counter));</div><div class='add'>+	drm_WARN_ON(&amp;vdev-&gt;drm, !xa_empty(&amp;vdev-&gt;submitted_jobs_xa));</div><div class='add'>+</div><div class='ctx'> 	/* Update boot params located at first 4KB of FW memory */</div><div class='ctx'> 	ivpu_fw_boot_params_setup(vdev, ivpu_bo_vaddr(vdev-&gt;fw-&gt;mem));</div><div class='ctx'> </div><div class='hunk'>@@ -421,9 +424,9 @@ void ivpu_prepare_for_reset(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	ivpu_hw_irq_disable(vdev);</div><div class='ctx'> 	disable_irq(vdev-&gt;irq);</div><div class='del'>-	cancel_work_sync(&amp;vdev-&gt;irq_ipc_work);</div><div class='del'>-	cancel_work_sync(&amp;vdev-&gt;irq_dct_work);</div><div class='del'>-	cancel_work_sync(&amp;vdev-&gt;context_abort_work);</div><div class='add'>+	flush_work(&amp;vdev-&gt;irq_ipc_work);</div><div class='add'>+	flush_work(&amp;vdev-&gt;irq_dct_work);</div><div class='add'>+	flush_work(&amp;vdev-&gt;context_abort_work);</div><div class='ctx'> 	ivpu_ipc_disable(vdev);</div><div class='ctx'> 	ivpu_mmu_disable(vdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -573,6 +576,7 @@ static int ivpu_dev_init(struct ivpu_device *vdev)</div><div class='ctx'> 	vdev-&gt;context_xa_limit.min = IVPU_USER_CONTEXT_MIN_SSID;</div><div class='ctx'> 	vdev-&gt;context_xa_limit.max = IVPU_USER_CONTEXT_MAX_SSID;</div><div class='ctx'> 	atomic64_set(&amp;vdev-&gt;unique_id_counter, 0);</div><div class='add'>+	atomic_set(&amp;vdev-&gt;job_timeout_counter, 0);</div><div class='ctx'> 	xa_init_flags(&amp;vdev-&gt;context_xa, XA_FLAGS_ALLOC | XA_FLAGS_LOCK_IRQ);</div><div class='ctx'> 	xa_init_flags(&amp;vdev-&gt;submitted_jobs_xa, XA_FLAGS_ALLOC1);</div><div class='ctx'> 	xa_init_flags(&amp;vdev-&gt;db_xa, XA_FLAGS_ALLOC1);</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h<br/>index 92753effb1c9..5497e7030e91 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_drv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_drv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_drv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_drv.h</a></div><div class='hunk'>@@ -154,6 +154,7 @@ struct ivpu_device {</div><div class='ctx'> 	struct mutex submitted_jobs_lock; /* Protects submitted_jobs */</div><div class='ctx'> 	struct xarray submitted_jobs_xa;</div><div class='ctx'> 	struct ivpu_ipc_consumer job_done_consumer;</div><div class='add'>+	atomic_t job_timeout_counter;</div><div class='ctx'> </div><div class='ctx'> 	atomic64_t unique_id_counter;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_fw.c b/drivers/accel/ivpu/ivpu_fw.c<br/>index 7a1bb92d8c81..ccaaf6c100c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_fw.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_fw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_fw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_fw.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2020-2024 Intel Corporation</div><div class='add'>+ * Copyright (C) 2020-2025 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='hunk'>@@ -233,10 +233,20 @@ static int ivpu_fw_parse(struct ivpu_device *vdev)</div><div class='ctx'> 	fw-&gt;dvfs_mode = 0;</div><div class='ctx'> </div><div class='ctx'> 	fw-&gt;sched_mode = ivpu_fw_sched_mode_select(vdev, fw_hdr);</div><div class='del'>-	fw-&gt;primary_preempt_buf_size = fw_hdr-&gt;preemption_buffer_1_size;</div><div class='del'>-	fw-&gt;secondary_preempt_buf_size = fw_hdr-&gt;preemption_buffer_2_size;</div><div class='ctx'> 	ivpu_info(vdev, "Scheduler mode: %s\n", fw-&gt;sched_mode ? "HW" : "OS");</div><div class='ctx'> </div><div class='add'>+	if (fw_hdr-&gt;preemption_buffer_1_max_size)</div><div class='add'>+		fw-&gt;primary_preempt_buf_size = fw_hdr-&gt;preemption_buffer_1_max_size;</div><div class='add'>+	else</div><div class='add'>+		fw-&gt;primary_preempt_buf_size = fw_hdr-&gt;preemption_buffer_1_size;</div><div class='add'>+</div><div class='add'>+	if (fw_hdr-&gt;preemption_buffer_2_max_size)</div><div class='add'>+		fw-&gt;secondary_preempt_buf_size = fw_hdr-&gt;preemption_buffer_2_max_size;</div><div class='add'>+	else</div><div class='add'>+		fw-&gt;secondary_preempt_buf_size = fw_hdr-&gt;preemption_buffer_2_size;</div><div class='add'>+	ivpu_dbg(vdev, FW_BOOT, "Preemption buffer sizes: primary %u, secondary %u\n",</div><div class='add'>+		 fw-&gt;primary_preempt_buf_size, fw-&gt;secondary_preempt_buf_size);</div><div class='add'>+</div><div class='ctx'> 	if (fw_hdr-&gt;ro_section_start_address &amp;&amp; !is_within_range(fw_hdr-&gt;ro_section_start_address,</div><div class='ctx'> 								 fw_hdr-&gt;ro_section_size,</div><div class='ctx'> 								 fw_hdr-&gt;image_load_address,</div><div class='hunk'>@@ -534,7 +544,7 @@ static void ivpu_fw_boot_params_print(struct ivpu_device *vdev, struct vpu_boot_</div><div class='ctx'> 		 boot_params-&gt;d0i3_entry_vpu_ts);</div><div class='ctx'> 	ivpu_dbg(vdev, FW_BOOT, "boot_params.system_time_us = %llu\n",</div><div class='ctx'> 		 boot_params-&gt;system_time_us);</div><div class='del'>-	ivpu_dbg(vdev, FW_BOOT, "boot_params.power_profile = %u\n",</div><div class='add'>+	ivpu_dbg(vdev, FW_BOOT, "boot_params.power_profile = 0x%x\n",</div><div class='ctx'> 		 boot_params-&gt;power_profile);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -566,7 +576,6 @@ void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params</div><div class='ctx'> </div><div class='ctx'> 	boot_params-&gt;magic = VPU_BOOT_PARAMS_MAGIC;</div><div class='ctx'> 	boot_params-&gt;vpu_id = to_pci_dev(vdev-&gt;drm.dev)-&gt;bus-&gt;number;</div><div class='del'>-	boot_params-&gt;frequency = ivpu_hw_pll_freq_get(vdev);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This param is a debug firmware feature.  It switches default clock</div><div class='hunk'>@@ -637,7 +646,7 @@ void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params</div><div class='ctx'> 	boot_params-&gt;d0i3_residency_time_us = 0;</div><div class='ctx'> 	boot_params-&gt;d0i3_entry_vpu_ts = 0;</div><div class='ctx'> 	if (IVPU_WA(disable_d0i2))</div><div class='del'>-		boot_params-&gt;power_profile = 1;</div><div class='add'>+		boot_params-&gt;power_profile |= BIT(1);</div><div class='ctx'> </div><div class='ctx'> 	boot_params-&gt;system_time_us = ktime_to_us(ktime_get_real());</div><div class='ctx'> 	wmb(); /* Flush WC buffers after writing bootparams */</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_fw.h b/drivers/accel/ivpu/ivpu_fw.h<br/>index 1d0b2bd9d65c..9a3935be1c05 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_fw.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_fw.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_fw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_fw.h</a></div><div class='hunk'>@@ -39,6 +39,7 @@ struct ivpu_fw_info {</div><div class='ctx'> 	u64 read_only_addr;</div><div class='ctx'> 	u32 read_only_size;</div><div class='ctx'> 	u32 sched_mode;</div><div class='add'>+	u64 last_heartbeat;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int ivpu_fw_init(struct ivpu_device *vdev);</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_gem.c b/drivers/accel/ivpu/ivpu_gem.c<br/>index 8741c73b92ce..e0d242d9f3e5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_gem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_gem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_gem.c</a></div><div class='hunk'>@@ -30,7 +30,7 @@ static inline void ivpu_dbg_bo(struct ivpu_device *vdev, struct ivpu_bo *bo, con</div><div class='ctx'> 		 "%6s: bo %8p vpu_addr %9llx size %8zu ctx %d has_pages %d dma_mapped %d mmu_mapped %d wc %d imported %d\n",</div><div class='ctx'> 		 action, bo, bo-&gt;vpu_addr, ivpu_bo_size(bo), bo-&gt;ctx ? bo-&gt;ctx-&gt;id : 0,</div><div class='ctx'> 		 (bool)bo-&gt;base.pages, (bool)bo-&gt;base.sgt, bo-&gt;mmu_mapped, bo-&gt;base.map_wc,</div><div class='del'>-		 (bool)bo-&gt;base.base.import_attach);</div><div class='add'>+		 (bool)drm_gem_is_imported(&amp;bo-&gt;base.base));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -122,7 +122,7 @@ static void ivpu_bo_unbind_locked(struct ivpu_bo *bo)</div><div class='ctx'> 		bo-&gt;ctx = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bo-&gt;base.base.import_attach)</div><div class='add'>+	if (drm_gem_is_imported(&amp;bo-&gt;base.base))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	dma_resv_lock(bo-&gt;base.base.resv, NULL);</div><div class='hunk'>@@ -282,7 +282,7 @@ static void ivpu_gem_bo_free(struct drm_gem_object *obj)</div><div class='ctx'> 	ivpu_bo_unbind_locked(bo);</div><div class='ctx'> 	mutex_destroy(&amp;bo-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	drm_WARN_ON(obj-&gt;dev, bo-&gt;base.pages_use_count &gt; 1);</div><div class='add'>+	drm_WARN_ON(obj-&gt;dev, refcount_read(&amp;bo-&gt;base.pages_use_count) &gt; 1);</div><div class='ctx'> 	drm_gem_shmem_free(&amp;bo-&gt;base);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -362,7 +362,7 @@ ivpu_bo_create(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; DRM_IVPU_BO_MAPPABLE) {</div><div class='ctx'> 		dma_resv_lock(bo-&gt;base.base.resv, NULL);</div><div class='del'>-		ret = drm_gem_shmem_vmap(&amp;bo-&gt;base, &amp;map);</div><div class='add'>+		ret = drm_gem_shmem_vmap_locked(&amp;bo-&gt;base, &amp;map);</div><div class='ctx'> 		dma_resv_unlock(bo-&gt;base.base.resv);</div><div class='ctx'> </div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -387,7 +387,7 @@ void ivpu_bo_free(struct ivpu_bo *bo)</div><div class='ctx'> </div><div class='ctx'> 	if (bo-&gt;flags &amp; DRM_IVPU_BO_MAPPABLE) {</div><div class='ctx'> 		dma_resv_lock(bo-&gt;base.base.resv, NULL);</div><div class='del'>-		drm_gem_shmem_vunmap(&amp;bo-&gt;base, &amp;map);</div><div class='add'>+		drm_gem_shmem_vunmap_locked(&amp;bo-&gt;base, &amp;map);</div><div class='ctx'> 		dma_resv_unlock(bo-&gt;base.base.resv);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -461,7 +461,7 @@ static void ivpu_bo_print_info(struct ivpu_bo *bo, struct drm_printer *p)</div><div class='ctx'> 	if (bo-&gt;mmu_mapped)</div><div class='ctx'> 		drm_printf(p, " mmu_mapped");</div><div class='ctx'> </div><div class='del'>-	if (bo-&gt;base.base.import_attach)</div><div class='add'>+	if (drm_gem_is_imported(&amp;bo-&gt;base.base))</div><div class='ctx'> 		drm_printf(p, " imported");</div><div class='ctx'> </div><div class='ctx'> 	drm_printf(p, "\n");</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_hw.c b/drivers/accel/ivpu/ivpu_hw.c<br/>index ec9a3629da3a..633160470c93 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_hw.c</a></div><div class='hunk'>@@ -119,7 +119,7 @@ static void timeouts_init(struct ivpu_device *vdev)</div><div class='ctx'> 		else</div><div class='ctx'> 			vdev-&gt;timeout.autosuspend = 100;</div><div class='ctx'> 		vdev-&gt;timeout.d0i3_entry_msg = 5;</div><div class='del'>-		vdev-&gt;timeout.state_dump_msg = 10;</div><div class='add'>+		vdev-&gt;timeout.state_dump_msg = 100;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_hw.h b/drivers/accel/ivpu/ivpu_hw.h<br/>index 16435f2756d0..d79668fe1609 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_hw.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2020-2024 Intel Corporation</div><div class='add'>+ * Copyright (C) 2020-2025 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __IVPU_HW_H__</div><div class='hunk'>@@ -82,19 +82,19 @@ static inline u64 ivpu_hw_range_size(const struct ivpu_addr_range *range)</div><div class='ctx'> 	return range-&gt;end - range-&gt;start;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 ivpu_hw_ratio_to_freq(struct ivpu_device *vdev, u32 ratio)</div><div class='add'>+static inline u32 ivpu_hw_dpu_max_freq_get(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='del'>-	return ivpu_hw_btrs_ratio_to_freq(vdev, ratio);</div><div class='add'>+	return ivpu_hw_btrs_dpu_max_freq_get(vdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev)</div><div class='add'>+static inline u32 ivpu_hw_dpu_freq_get(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='del'>-	ivpu_hw_ip_irq_clear(vdev);</div><div class='add'>+	return ivpu_hw_btrs_dpu_freq_get(vdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 ivpu_hw_pll_freq_get(struct ivpu_device *vdev)</div><div class='add'>+static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='del'>-	return ivpu_hw_btrs_pll_freq_get(vdev);</div><div class='add'>+	ivpu_hw_ip_irq_clear(vdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 ivpu_hw_profiling_freq_get(struct ivpu_device *vdev)</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_hw_btrs.c b/drivers/accel/ivpu/ivpu_hw_btrs.c<br/>index 56c56012b980..b236c7234daa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw_btrs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw_btrs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw_btrs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_hw_btrs.c</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2020-2024 Intel Corporation</div><div class='add'>+ * Copyright (C) 2020-2025 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "ivpu_drv.h"</div><div class='ctx'> #include "ivpu_hw.h"</div><div class='ctx'> #include "ivpu_hw_btrs.h"</div><div class='hunk'>@@ -28,17 +30,13 @@</div><div class='ctx'> </div><div class='ctx'> #define BTRS_LNL_ALL_IRQ_MASK ((u32)-1)</div><div class='ctx'> </div><div class='del'>-#define BTRS_MTL_WP_CONFIG_1_TILE_5_3_RATIO WP_CONFIG(MTL_CONFIG_1_TILE, MTL_PLL_RATIO_5_3)</div><div class='del'>-#define BTRS_MTL_WP_CONFIG_1_TILE_4_3_RATIO WP_CONFIG(MTL_CONFIG_1_TILE, MTL_PLL_RATIO_4_3)</div><div class='del'>-#define BTRS_MTL_WP_CONFIG_2_TILE_5_3_RATIO WP_CONFIG(MTL_CONFIG_2_TILE, MTL_PLL_RATIO_5_3)</div><div class='del'>-#define BTRS_MTL_WP_CONFIG_2_TILE_4_3_RATIO WP_CONFIG(MTL_CONFIG_2_TILE, MTL_PLL_RATIO_4_3)</div><div class='del'>-#define BTRS_MTL_WP_CONFIG_0_TILE_PLL_OFF   WP_CONFIG(0, 0)</div><div class='ctx'> </div><div class='ctx'> #define PLL_CDYN_DEFAULT               0x80</div><div class='ctx'> #define PLL_EPP_DEFAULT                0x80</div><div class='ctx'> #define PLL_CONFIG_DEFAULT             0x0</div><div class='del'>-#define PLL_SIMULATION_FREQ            10000000</div><div class='del'>-#define PLL_REF_CLK_FREQ               50000000</div><div class='add'>+#define PLL_REF_CLK_FREQ               50000000ull</div><div class='add'>+#define PLL_RATIO_TO_FREQ(x)           ((x) * PLL_REF_CLK_FREQ)</div><div class='add'>+</div><div class='ctx'> #define PLL_TIMEOUT_US		       (1500 * USEC_PER_MSEC)</div><div class='ctx'> #define IDLE_TIMEOUT_US		       (5 * USEC_PER_MSEC)</div><div class='ctx'> #define TIMEOUT_US                     (150 * USEC_PER_MSEC)</div><div class='hunk'>@@ -62,6 +60,8 @@</div><div class='ctx'> #define DCT_ENABLE                     0x1</div><div class='ctx'> #define DCT_DISABLE                    0x0</div><div class='ctx'> </div><div class='add'>+static u32 pll_ratio_to_dpu_freq(struct ivpu_device *vdev, u32 ratio);</div><div class='add'>+</div><div class='ctx'> int ivpu_hw_btrs_irqs_clear_with_0_mtl(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	REGB_WR32(VPU_HW_BTRS_MTL_INTERRUPT_STAT, BTRS_MTL_ALL_IRQ_MASK);</div><div class='hunk'>@@ -156,7 +156,7 @@ static int info_init_mtl(struct ivpu_device *vdev)</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;tile_fuse = BTRS_MTL_TILE_FUSE_ENABLE_BOTH;</div><div class='ctx'> 	hw-&gt;sku = BTRS_MTL_TILE_SKU_BOTH;</div><div class='del'>-	hw-&gt;config = BTRS_MTL_WP_CONFIG_2_TILE_4_3_RATIO;</div><div class='add'>+	hw-&gt;config = WP_CONFIG(MTL_CONFIG_2_TILE, MTL_PLL_RATIO_4_3);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -334,8 +334,8 @@ int ivpu_hw_btrs_wp_drive(struct ivpu_device *vdev, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	prepare_wp_request(vdev, &amp;wp, enable);</div><div class='ctx'> </div><div class='del'>-	ivpu_dbg(vdev, PM, "PLL workpoint request: %u Hz, config: 0x%x, epp: 0x%x, cdyn: 0x%x\n",</div><div class='del'>-		 PLL_RATIO_TO_FREQ(wp.target), wp.cfg, wp.epp, wp.cdyn);</div><div class='add'>+	ivpu_dbg(vdev, PM, "PLL workpoint request: %lu MHz, config: 0x%x, epp: 0x%x, cdyn: 0x%x\n",</div><div class='add'>+		 pll_ratio_to_dpu_freq(vdev, wp.target) / HZ_PER_MHZ, wp.cfg, wp.epp, wp.cdyn);</div><div class='ctx'> </div><div class='ctx'> 	ret = wp_request_send(vdev, &amp;wp);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -573,6 +573,47 @@ int ivpu_hw_btrs_wait_for_idle(struct ivpu_device *vdev)</div><div class='ctx'> 		return REGB_POLL_FLD(VPU_HW_BTRS_LNL_VPU_STATUS, IDLE, 0x1, IDLE_TIMEOUT_US);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 pll_config_get_mtl(struct ivpu_device *vdev)</div><div class='add'>+{</div><div class='add'>+	return REGB_RD32(VPU_HW_BTRS_MTL_CURRENT_PLL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 pll_config_get_lnl(struct ivpu_device *vdev)</div><div class='add'>+{</div><div class='add'>+	return REGB_RD32(VPU_HW_BTRS_LNL_PLL_FREQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 pll_ratio_to_dpu_freq_mtl(u16 ratio)</div><div class='add'>+{</div><div class='add'>+	return (PLL_RATIO_TO_FREQ(ratio) * 2) / 3;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 pll_ratio_to_dpu_freq_lnl(u16 ratio)</div><div class='add'>+{</div><div class='add'>+	return PLL_RATIO_TO_FREQ(ratio) / 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 pll_ratio_to_dpu_freq(struct ivpu_device *vdev, u32 ratio)</div><div class='add'>+{</div><div class='add'>+	if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL)</div><div class='add'>+		return pll_ratio_to_dpu_freq_mtl(ratio);</div><div class='add'>+	else</div><div class='add'>+		return pll_ratio_to_dpu_freq_lnl(ratio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 ivpu_hw_btrs_dpu_max_freq_get(struct ivpu_device *vdev)</div><div class='add'>+{</div><div class='add'>+	return pll_ratio_to_dpu_freq(vdev, vdev-&gt;hw-&gt;pll.max_ratio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 ivpu_hw_btrs_dpu_freq_get(struct ivpu_device *vdev)</div><div class='add'>+{</div><div class='add'>+	if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL)</div><div class='add'>+		return pll_ratio_to_dpu_freq_mtl(pll_config_get_mtl(vdev));</div><div class='add'>+	else</div><div class='add'>+		return pll_ratio_to_dpu_freq_lnl(pll_config_get_lnl(vdev));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Handler for IRQs from Buttress core (irqB) */</div><div class='ctx'> bool ivpu_hw_btrs_irq_handler_mtl(struct ivpu_device *vdev, int irq)</div><div class='ctx'> {</div><div class='hunk'>@@ -582,9 +623,12 @@ bool ivpu_hw_btrs_irq_handler_mtl(struct ivpu_device *vdev, int irq)</div><div class='ctx'> 	if (!status)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (REG_TEST_FLD(VPU_HW_BTRS_MTL_INTERRUPT_STAT, FREQ_CHANGE, status))</div><div class='del'>-		ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq: %08x",</div><div class='del'>-			 REGB_RD32(VPU_HW_BTRS_MTL_CURRENT_PLL));</div><div class='add'>+	if (REG_TEST_FLD(VPU_HW_BTRS_MTL_INTERRUPT_STAT, FREQ_CHANGE, status)) {</div><div class='add'>+		u32 pll = pll_config_get_mtl(vdev);</div><div class='add'>+</div><div class='add'>+		ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq, wp %08x, %lu MHz",</div><div class='add'>+			 pll, pll_ratio_to_dpu_freq_mtl(pll) / HZ_PER_MHZ);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (REG_TEST_FLD(VPU_HW_BTRS_MTL_INTERRUPT_STAT, ATS_ERR, status)) {</div><div class='ctx'> 		ivpu_err(vdev, "ATS_ERR irq 0x%016llx", REGB_RD64(VPU_HW_BTRS_MTL_ATS_ERR_LOG_0));</div><div class='hunk'>@@ -633,8 +677,12 @@ bool ivpu_hw_btrs_irq_handler_lnl(struct ivpu_device *vdev, int irq)</div><div class='ctx'> 		queue_work(system_wq, &amp;vdev-&gt;irq_dct_work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (REG_TEST_FLD(VPU_HW_BTRS_LNL_INTERRUPT_STAT, FREQ_CHANGE, status))</div><div class='del'>-		ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq: %08x", REGB_RD32(VPU_HW_BTRS_LNL_PLL_FREQ));</div><div class='add'>+	if (REG_TEST_FLD(VPU_HW_BTRS_LNL_INTERRUPT_STAT, FREQ_CHANGE, status)) {</div><div class='add'>+		u32 pll = pll_config_get_lnl(vdev);</div><div class='add'>+</div><div class='add'>+		ivpu_dbg(vdev, IRQ, "FREQ_CHANGE irq, wp %08x, %lu MHz",</div><div class='add'>+			 pll, pll_ratio_to_dpu_freq_lnl(pll) / HZ_PER_MHZ);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (REG_TEST_FLD(VPU_HW_BTRS_LNL_INTERRUPT_STAT, ATS_ERR, status)) {</div><div class='ctx'> 		ivpu_err(vdev, "ATS_ERR LOG1 0x%08x ATS_ERR_LOG2 0x%08x\n",</div><div class='hunk'>@@ -717,60 +765,6 @@ void ivpu_hw_btrs_dct_set_status(struct ivpu_device *vdev, bool enable, u32 acti</div><div class='ctx'> 	REGB_WR32(VPU_HW_BTRS_LNL_PCODE_MAILBOX_STATUS, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 pll_ratio_to_freq_mtl(u32 ratio, u32 config)</div><div class='del'>-{</div><div class='del'>-	u32 pll_clock = PLL_REF_CLK_FREQ * ratio;</div><div class='del'>-	u32 cpu_clock;</div><div class='del'>-</div><div class='del'>-	if ((config &amp; 0xff) == MTL_PLL_RATIO_4_3)</div><div class='del'>-		cpu_clock = pll_clock * 2 / 4;</div><div class='del'>-	else</div><div class='del'>-		cpu_clock = pll_clock * 2 / 5;</div><div class='del'>-</div><div class='del'>-	return cpu_clock;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u32 ivpu_hw_btrs_ratio_to_freq(struct ivpu_device *vdev, u32 ratio)</div><div class='del'>-{</div><div class='del'>-	struct ivpu_hw_info *hw = vdev-&gt;hw;</div><div class='del'>-</div><div class='del'>-	if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL)</div><div class='del'>-		return pll_ratio_to_freq_mtl(ratio, hw-&gt;config);</div><div class='del'>-	else</div><div class='del'>-		return PLL_RATIO_TO_FREQ(ratio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 pll_freq_get_mtl(struct ivpu_device *vdev)</div><div class='del'>-{</div><div class='del'>-	u32 pll_curr_ratio;</div><div class='del'>-</div><div class='del'>-	pll_curr_ratio = REGB_RD32(VPU_HW_BTRS_MTL_CURRENT_PLL);</div><div class='del'>-	pll_curr_ratio &amp;= VPU_HW_BTRS_MTL_CURRENT_PLL_RATIO_MASK;</div><div class='del'>-</div><div class='del'>-	if (!ivpu_is_silicon(vdev))</div><div class='del'>-		return PLL_SIMULATION_FREQ;</div><div class='del'>-</div><div class='del'>-	return pll_ratio_to_freq_mtl(pll_curr_ratio, vdev-&gt;hw-&gt;config);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 pll_freq_get_lnl(struct ivpu_device *vdev)</div><div class='del'>-{</div><div class='del'>-	u32 pll_curr_ratio;</div><div class='del'>-</div><div class='del'>-	pll_curr_ratio = REGB_RD32(VPU_HW_BTRS_LNL_PLL_FREQ);</div><div class='del'>-	pll_curr_ratio &amp;= VPU_HW_BTRS_LNL_PLL_FREQ_RATIO_MASK;</div><div class='del'>-</div><div class='del'>-	return PLL_RATIO_TO_FREQ(pll_curr_ratio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u32 ivpu_hw_btrs_pll_freq_get(struct ivpu_device *vdev)</div><div class='del'>-{</div><div class='del'>-	if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL)</div><div class='del'>-		return pll_freq_get_mtl(vdev);</div><div class='del'>-	else</div><div class='del'>-		return pll_freq_get_lnl(vdev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> u32 ivpu_hw_btrs_telemetry_offset_get(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	if (ivpu_hw_btrs_gen(vdev) == IVPU_HW_BTRS_MTL)</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_hw_btrs.h b/drivers/accel/ivpu/ivpu_hw_btrs.h<br/>index 1fd71b4d4ab0..d2d82651976d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw_btrs.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_hw_btrs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_hw_btrs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_hw_btrs.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2020-2024 Intel Corporation</div><div class='add'>+ * Copyright (C) 2020-2025 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __IVPU_HW_BTRS_H__</div><div class='hunk'>@@ -13,9 +13,8 @@</div><div class='ctx'> </div><div class='ctx'> #define PLL_PROFILING_FREQ_DEFAULT   38400000</div><div class='ctx'> #define PLL_PROFILING_FREQ_HIGH      400000000</div><div class='del'>-#define PLL_RATIO_TO_FREQ(x)         ((x) * PLL_REF_CLK_FREQ)</div><div class='ctx'> </div><div class='del'>-#define DCT_DEFAULT_ACTIVE_PERCENT 15u</div><div class='add'>+#define DCT_DEFAULT_ACTIVE_PERCENT 30u</div><div class='ctx'> #define DCT_PERIOD_US		   35300u</div><div class='ctx'> </div><div class='ctx'> int ivpu_hw_btrs_info_init(struct ivpu_device *vdev);</div><div class='hunk'>@@ -32,12 +31,12 @@ int ivpu_hw_btrs_ip_reset(struct ivpu_device *vdev);</div><div class='ctx'> void ivpu_hw_btrs_profiling_freq_reg_set_lnl(struct ivpu_device *vdev);</div><div class='ctx'> void ivpu_hw_btrs_ats_print_lnl(struct ivpu_device *vdev);</div><div class='ctx'> void ivpu_hw_btrs_clock_relinquish_disable_lnl(struct ivpu_device *vdev);</div><div class='add'>+u32 ivpu_hw_btrs_dpu_max_freq_get(struct ivpu_device *vdev);</div><div class='add'>+u32 ivpu_hw_btrs_dpu_freq_get(struct ivpu_device *vdev);</div><div class='ctx'> bool ivpu_hw_btrs_irq_handler_mtl(struct ivpu_device *vdev, int irq);</div><div class='ctx'> bool ivpu_hw_btrs_irq_handler_lnl(struct ivpu_device *vdev, int irq);</div><div class='ctx'> int ivpu_hw_btrs_dct_get_request(struct ivpu_device *vdev, bool *enable);</div><div class='ctx'> void ivpu_hw_btrs_dct_set_status(struct ivpu_device *vdev, bool enable, u32 dct_percent);</div><div class='del'>-u32 ivpu_hw_btrs_pll_freq_get(struct ivpu_device *vdev);</div><div class='del'>-u32 ivpu_hw_btrs_ratio_to_freq(struct ivpu_device *vdev, u32 ratio);</div><div class='ctx'> u32 ivpu_hw_btrs_telemetry_offset_get(struct ivpu_device *vdev);</div><div class='ctx'> u32 ivpu_hw_btrs_telemetry_size_get(struct ivpu_device *vdev);</div><div class='ctx'> u32 ivpu_hw_btrs_telemetry_enable_get(struct ivpu_device *vdev);</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_ipc.c b/drivers/accel/ivpu/ivpu_ipc.c<br/>index 0e096fd9b95d..39f83225c181 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_ipc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_ipc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_ipc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_ipc.c</a></div><div class='hunk'>@@ -302,7 +302,8 @@ ivpu_ipc_send_receive_internal(struct ivpu_device *vdev, struct vpu_jsm_msg *req</div><div class='ctx'> 	struct ivpu_ipc_consumer cons;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	drm_WARN_ON(&amp;vdev-&gt;drm, pm_runtime_status_suspended(vdev-&gt;drm.dev));</div><div class='add'>+	drm_WARN_ON(&amp;vdev-&gt;drm, pm_runtime_status_suspended(vdev-&gt;drm.dev) &amp;&amp;</div><div class='add'>+		    pm_runtime_enabled(vdev-&gt;drm.dev));</div><div class='ctx'> </div><div class='ctx'> 	ivpu_ipc_consumer_add(vdev, &amp;cons, channel, NULL);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_job.c b/drivers/accel/ivpu/ivpu_job.c<br/>index 004059e4f1e8..b28da35c30b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_job.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_job.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_job.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_job.c</a></div><div class='hunk'>@@ -470,8 +470,8 @@ static void ivpu_job_destroy(struct ivpu_job *job)</div><div class='ctx'> 	struct ivpu_device *vdev = job-&gt;vdev;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	ivpu_dbg(vdev, JOB, "Job destroyed: id %3u ctx %2d engine %d",</div><div class='del'>-		 job-&gt;job_id, job-&gt;file_priv-&gt;ctx.id, job-&gt;engine_idx);</div><div class='add'>+	ivpu_dbg(vdev, JOB, "Job destroyed: id %3u ctx %2d cmdq_id %u engine %d",</div><div class='add'>+		 job-&gt;job_id, job-&gt;file_priv-&gt;ctx.id, job-&gt;cmdq_id, job-&gt;engine_idx);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; job-&gt;bo_count; i++)</div><div class='ctx'> 		if (job-&gt;bos[i])</div><div class='hunk'>@@ -564,8 +564,8 @@ static int ivpu_job_signal_and_destroy(struct ivpu_device *vdev, u32 job_id, u32</div><div class='ctx'> 	dma_fence_signal(job-&gt;done_fence);</div><div class='ctx'> </div><div class='ctx'> 	trace_job("done", job);</div><div class='del'>-	ivpu_dbg(vdev, JOB, "Job complete:  id %3u ctx %2d engine %d status 0x%x\n",</div><div class='del'>-		 job-&gt;job_id, job-&gt;file_priv-&gt;ctx.id, job-&gt;engine_idx, job_status);</div><div class='add'>+	ivpu_dbg(vdev, JOB, "Job complete:  id %3u ctx %2d cmdq_id %u engine %d status 0x%x\n",</div><div class='add'>+		 job-&gt;job_id, job-&gt;file_priv-&gt;ctx.id, job-&gt;cmdq_id, job-&gt;engine_idx, job_status);</div><div class='ctx'> </div><div class='ctx'> 	ivpu_job_destroy(job);</div><div class='ctx'> 	ivpu_stop_job_timeout_detection(vdev);</div><div class='hunk'>@@ -664,8 +664,8 @@ static int ivpu_job_submit(struct ivpu_job *job, u8 priority, u32 cmdq_id)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	trace_job("submit", job);</div><div class='del'>-	ivpu_dbg(vdev, JOB, "Job submitted: id %3u ctx %2d engine %d prio %d addr 0x%llx next %d\n",</div><div class='del'>-		 job-&gt;job_id, file_priv-&gt;ctx.id, job-&gt;engine_idx, cmdq-&gt;priority,</div><div class='add'>+	ivpu_dbg(vdev, JOB, "Job submitted: id %3u ctx %2d cmdq_id %u engine %d prio %d addr 0x%llx next %d\n",</div><div class='add'>+		 job-&gt;job_id, file_priv-&gt;ctx.id, cmdq-&gt;id, job-&gt;engine_idx, cmdq-&gt;priority,</div><div class='ctx'> 		 job-&gt;cmd_buf_vpu_addr, cmdq-&gt;jobq-&gt;header.tail);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;lock);</div><div class='hunk'>@@ -681,8 +681,8 @@ static int ivpu_job_submit(struct ivpu_job *job, u8 priority, u32 cmdq_id)</div><div class='ctx'> err_erase_xa:</div><div class='ctx'> 	xa_erase(&amp;vdev-&gt;submitted_jobs_xa, job-&gt;job_id);</div><div class='ctx'> err_unlock:</div><div class='del'>-	mutex_unlock(&amp;vdev-&gt;submitted_jobs_lock);</div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;vdev-&gt;submitted_jobs_lock);</div><div class='ctx'> 	ivpu_rpm_put(vdev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -777,7 +777,8 @@ static int ivpu_submit(struct drm_file *file, struct ivpu_file_priv *file_priv,</div><div class='ctx'> 		goto err_free_handles;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ivpu_dbg(vdev, JOB, "Submit ioctl: ctx %u buf_count %u\n", file_priv-&gt;ctx.id, buffer_count);</div><div class='add'>+	ivpu_dbg(vdev, JOB, "Submit ioctl: ctx %u cmdq_id %u buf_count %u\n",</div><div class='add'>+		 file_priv-&gt;ctx.id, cmdq_id, buffer_count);</div><div class='ctx'> </div><div class='ctx'> 	job = ivpu_job_create(file_priv, engine, buffer_count);</div><div class='ctx'> 	if (!job) {</div><div class='hunk'>@@ -873,15 +874,21 @@ int ivpu_cmdq_submit_ioctl(struct drm_device *dev, void *data, struct drm_file *</div><div class='ctx'> int ivpu_cmdq_create_ioctl(struct drm_device *dev, void *data, struct drm_file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct ivpu_file_priv *file_priv = file-&gt;driver_priv;</div><div class='add'>+	struct ivpu_device *vdev = file_priv-&gt;vdev;</div><div class='ctx'> 	struct drm_ivpu_cmdq_create *args = data;</div><div class='ctx'> 	struct ivpu_cmdq *cmdq;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!ivpu_is_capable(file_priv-&gt;vdev, DRM_IVPU_CAP_MANAGE_CMDQ))</div><div class='add'>+	if (!ivpu_is_capable(vdev, DRM_IVPU_CAP_MANAGE_CMDQ))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (args-&gt;priority &gt; DRM_IVPU_JOB_PRIORITY_REALTIME)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	ret = ivpu_rpm_get(vdev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;file_priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	cmdq = ivpu_cmdq_create(file_priv, ivpu_job_to_jsm_priority(args-&gt;priority), false);</div><div class='hunk'>@@ -890,6 +897,8 @@ int ivpu_cmdq_create_ioctl(struct drm_device *dev, void *data, struct drm_file *</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;lock);</div><div class='ctx'> </div><div class='add'>+	ivpu_rpm_put(vdev);</div><div class='add'>+</div><div class='ctx'> 	return cmdq ? 0 : -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -899,28 +908,35 @@ int ivpu_cmdq_destroy_ioctl(struct drm_device *dev, void *data, struct drm_file</div><div class='ctx'> 	struct ivpu_device *vdev = file_priv-&gt;vdev;</div><div class='ctx'> 	struct drm_ivpu_cmdq_destroy *args = data;</div><div class='ctx'> 	struct ivpu_cmdq *cmdq;</div><div class='del'>-	u32 cmdq_id;</div><div class='add'>+	u32 cmdq_id = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!ivpu_is_capable(vdev, DRM_IVPU_CAP_MANAGE_CMDQ))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	ret = ivpu_rpm_get(vdev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;file_priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	cmdq = xa_load(&amp;file_priv-&gt;cmdq_xa, args-&gt;cmdq_id);</div><div class='ctx'> 	if (!cmdq || cmdq-&gt;is_legacy) {</div><div class='ctx'> 		ret = -ENOENT;</div><div class='del'>-		goto err_unlock;</div><div class='add'>+	} else {</div><div class='add'>+		cmdq_id = cmdq-&gt;id;</div><div class='add'>+		ivpu_cmdq_destroy(file_priv, cmdq);</div><div class='add'>+		ret = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cmdq_id = cmdq-&gt;id;</div><div class='del'>-	ivpu_cmdq_destroy(file_priv, cmdq);</div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;lock);</div><div class='del'>-	ivpu_cmdq_abort_all_jobs(vdev, file_priv-&gt;ctx.id, cmdq_id);</div><div class='del'>-	return 0;</div><div class='ctx'> </div><div class='del'>-err_unlock:</div><div class='del'>-	mutex_unlock(&amp;file_priv-&gt;lock);</div><div class='add'>+	/* Abort any pending jobs only if cmdq was destroyed */</div><div class='add'>+	if (!ret)</div><div class='add'>+		ivpu_cmdq_abort_all_jobs(vdev, file_priv-&gt;ctx.id, cmdq_id);</div><div class='add'>+</div><div class='add'>+	ivpu_rpm_put(vdev);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_ms.c b/drivers/accel/ivpu/ivpu_ms.c<br/>index ffe7b10f8a76..2a043baf10ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_ms.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_ms.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_ms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_ms.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_file.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ivpu_drv.h"</div><div class='ctx'> #include "ivpu_gem.h"</div><div class='hunk'>@@ -44,6 +45,10 @@ int ivpu_ms_start_ioctl(struct drm_device *dev, void *data, struct drm_file *fil</div><div class='ctx'> 	    args-&gt;sampling_period_ns &lt; MS_MIN_SAMPLE_PERIOD_NS)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	ret = ivpu_rpm_get(vdev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;file_priv-&gt;ms_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (get_instance_by_mask(file_priv, args-&gt;metric_group_mask)) {</div><div class='hunk'>@@ -96,6 +101,8 @@ err_free_ms:</div><div class='ctx'> 	kfree(ms);</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;ms_lock);</div><div class='add'>+</div><div class='add'>+	ivpu_rpm_put(vdev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -160,6 +167,10 @@ int ivpu_ms_get_data_ioctl(struct drm_device *dev, void *data, struct drm_file *</div><div class='ctx'> 	if (!args-&gt;metric_group_mask)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	ret = ivpu_rpm_get(vdev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;file_priv-&gt;ms_lock);</div><div class='ctx'> </div><div class='ctx'> 	ms = get_instance_by_mask(file_priv, args-&gt;metric_group_mask);</div><div class='hunk'>@@ -187,6 +198,7 @@ int ivpu_ms_get_data_ioctl(struct drm_device *dev, void *data, struct drm_file *</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;ms_lock);</div><div class='ctx'> </div><div class='add'>+	ivpu_rpm_put(vdev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -204,11 +216,17 @@ int ivpu_ms_stop_ioctl(struct drm_device *dev, void *data, struct drm_file *file</div><div class='ctx'> {</div><div class='ctx'> 	struct ivpu_file_priv *file_priv = file-&gt;driver_priv;</div><div class='ctx'> 	struct drm_ivpu_metric_streamer_stop *args = data;</div><div class='add'>+	struct ivpu_device *vdev = file_priv-&gt;vdev;</div><div class='ctx'> 	struct ivpu_ms_instance *ms;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!args-&gt;metric_group_mask)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	ret = ivpu_rpm_get(vdev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;file_priv-&gt;ms_lock);</div><div class='ctx'> </div><div class='ctx'> 	ms = get_instance_by_mask(file_priv, args-&gt;metric_group_mask);</div><div class='hunk'>@@ -217,6 +235,7 @@ int ivpu_ms_stop_ioctl(struct drm_device *dev, void *data, struct drm_file *file</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;ms_lock);</div><div class='ctx'> </div><div class='add'>+	ivpu_rpm_put(vdev);</div><div class='ctx'> 	return ms ? 0 : -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -281,6 +300,9 @@ unlock:</div><div class='ctx'> void ivpu_ms_cleanup(struct ivpu_file_priv *file_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct ivpu_ms_instance *ms, *tmp;</div><div class='add'>+	struct ivpu_device *vdev = file_priv-&gt;vdev;</div><div class='add'>+</div><div class='add'>+	pm_runtime_get_sync(vdev-&gt;drm.dev);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;file_priv-&gt;ms_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -293,6 +315,8 @@ void ivpu_ms_cleanup(struct ivpu_file_priv *file_priv)</div><div class='ctx'> 		free_instance(file_priv, ms);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;file_priv-&gt;ms_lock);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put_autosuspend(vdev-&gt;drm.dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ivpu_ms_cleanup_all(struct ivpu_device *vdev)</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_pm.c b/drivers/accel/ivpu/ivpu_pm.c<br/>index b5891e91f7ab..ea30db181cd7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_pm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_pm.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@ module_param_named(tdr_timeout_ms, ivpu_tdr_timeout_ms, ulong, 0644);</div><div class='ctx'> MODULE_PARM_DESC(tdr_timeout_ms, "Timeout for device hang detection, in milliseconds, 0 - default");</div><div class='ctx'> </div><div class='ctx'> #define PM_RESCHEDULE_LIMIT     5</div><div class='add'>+#define PM_TDR_HEARTBEAT_LIMIT  30</div><div class='ctx'> </div><div class='ctx'> static void ivpu_pm_prepare_cold_boot(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -44,6 +45,7 @@ static void ivpu_pm_prepare_cold_boot(struct ivpu_device *vdev)</div><div class='ctx'> 	ivpu_fw_log_reset(vdev);</div><div class='ctx'> 	ivpu_fw_load(vdev);</div><div class='ctx'> 	fw-&gt;entry_point = fw-&gt;cold_boot_entry_point;</div><div class='add'>+	fw-&gt;last_heartbeat = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ivpu_pm_prepare_warm_boot(struct ivpu_device *vdev)</div><div class='hunk'>@@ -189,7 +191,24 @@ static void ivpu_job_timeout_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct ivpu_pm_info *pm = container_of(work, struct ivpu_pm_info, job_timeout_work.work);</div><div class='ctx'> 	struct ivpu_device *vdev = pm-&gt;vdev;</div><div class='add'>+	u64 heartbeat;</div><div class='ctx'> </div><div class='add'>+	if (ivpu_jsm_get_heartbeat(vdev, 0, &amp;heartbeat) || heartbeat &lt;= vdev-&gt;fw-&gt;last_heartbeat) {</div><div class='add'>+		ivpu_err(vdev, "Job timeout detected, heartbeat not progressed\n");</div><div class='add'>+		goto recovery;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (atomic_fetch_inc(&amp;vdev-&gt;job_timeout_counter) &gt; PM_TDR_HEARTBEAT_LIMIT) {</div><div class='add'>+		ivpu_err(vdev, "Job timeout detected, heartbeat limit exceeded\n");</div><div class='add'>+		goto recovery;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vdev-&gt;fw-&gt;last_heartbeat = heartbeat;</div><div class='add'>+	ivpu_start_job_timeout_detection(vdev);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+recovery:</div><div class='add'>+	atomic_set(&amp;vdev-&gt;job_timeout_counter, 0);</div><div class='ctx'> 	ivpu_pm_trigger_recovery(vdev, "TDR");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -204,6 +223,7 @@ void ivpu_start_job_timeout_detection(struct ivpu_device *vdev)</div><div class='ctx'> void ivpu_stop_job_timeout_detection(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;vdev-&gt;pm-&gt;job_timeout_work);</div><div class='add'>+	atomic_set(&amp;vdev-&gt;job_timeout_counter, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ivpu_pm_suspend_cb(struct device *dev)</div><div class='hunk'>@@ -428,16 +448,17 @@ int ivpu_pm_dct_enable(struct ivpu_device *vdev, u8 active_percent)</div><div class='ctx'> 	active_us = (DCT_PERIOD_US * active_percent) / 100;</div><div class='ctx'> 	inactive_us = DCT_PERIOD_US - active_us;</div><div class='ctx'> </div><div class='add'>+	vdev-&gt;pm-&gt;dct_active_percent = active_percent;</div><div class='add'>+</div><div class='add'>+	ivpu_dbg(vdev, PM, "DCT requested %u%% (D0: %uus, D0i2: %uus)\n",</div><div class='add'>+		 active_percent, active_us, inactive_us);</div><div class='add'>+</div><div class='ctx'> 	ret = ivpu_jsm_dct_enable(vdev, active_us, inactive_us);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ivpu_err_ratelimited(vdev, "Failed to enable DCT: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vdev-&gt;pm-&gt;dct_active_percent = active_percent;</div><div class='del'>-</div><div class='del'>-	ivpu_dbg(vdev, PM, "DCT set to %u%% (D0: %uus, D0i2: %uus)\n",</div><div class='del'>-		 active_percent, active_us, inactive_us);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -445,15 +466,16 @@ int ivpu_pm_dct_disable(struct ivpu_device *vdev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	vdev-&gt;pm-&gt;dct_active_percent = 0;</div><div class='add'>+</div><div class='add'>+	ivpu_dbg(vdev, PM, "DCT requested to be disabled\n");</div><div class='add'>+</div><div class='ctx'> 	ret = ivpu_jsm_dct_disable(vdev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ivpu_err_ratelimited(vdev, "Failed to disable DCT: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vdev-&gt;pm-&gt;dct_active_percent = 0;</div><div class='del'>-</div><div class='del'>-	ivpu_dbg(vdev, PM, "DCT disabled\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -466,7 +488,7 @@ void ivpu_pm_irq_dct_work_fn(struct work_struct *work)</div><div class='ctx'> 	if (ivpu_hw_btrs_dct_get_request(vdev, &amp;enable))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (vdev-&gt;pm-&gt;dct_active_percent)</div><div class='add'>+	if (enable)</div><div class='ctx'> 		ret = ivpu_pm_dct_enable(vdev, DCT_DEFAULT_ACTIVE_PERCENT);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = ivpu_pm_dct_disable(vdev);</div><div class='head'>diff --git a/drivers/accel/ivpu/ivpu_sysfs.c b/drivers/accel/ivpu/ivpu_sysfs.c<br/>index 97102feaf8dd..268ab7744a8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_sysfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/ivpu_sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/ivpu_sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/ivpu_sysfs.c</a></div><div class='hunk'>@@ -1,10 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2024 Intel Corporation</div><div class='add'>+ * Copyright (C) 2024-2025 Intel Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ivpu_drv.h"</div><div class='ctx'> #include "ivpu_gem.h"</div><div class='hunk'>@@ -90,10 +92,55 @@ sched_mode_show(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR_RO(sched_mode);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * DOC: npu_max_frequency</div><div class='add'>+ *</div><div class='add'>+ * The npu_max_frequency shows maximum frequency in MHz of the NPU's data</div><div class='add'>+ * processing unit</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+npu_max_frequency_mhz_show(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *drm = dev_get_drvdata(dev);</div><div class='add'>+	struct ivpu_device *vdev = to_ivpu_device(drm);</div><div class='add'>+	u32 freq = ivpu_hw_dpu_max_freq_get(vdev);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%lu\n", freq / HZ_PER_MHZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR_RO(npu_max_frequency_mhz);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: npu_current_frequency_mhz</div><div class='add'>+ *</div><div class='add'>+ * The npu_current_frequency_mhz shows current frequency in MHz of the NPU's</div><div class='add'>+ * data processing unit</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+npu_current_frequency_mhz_show(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *drm = dev_get_drvdata(dev);</div><div class='add'>+	struct ivpu_device *vdev = to_ivpu_device(drm);</div><div class='add'>+	u32 freq = 0;</div><div class='add'>+</div><div class='add'>+	/* Read frequency only if device is active, otherwise frequency is 0 */</div><div class='add'>+	if (pm_runtime_get_if_active(vdev-&gt;drm.dev) &gt; 0) {</div><div class='add'>+		freq = ivpu_hw_dpu_freq_get(vdev);</div><div class='add'>+</div><div class='add'>+		pm_runtime_put_autosuspend(vdev-&gt;drm.dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%lu\n", freq / HZ_PER_MHZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR_RO(npu_current_frequency_mhz);</div><div class='add'>+</div><div class='ctx'> static struct attribute *ivpu_dev_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_npu_busy_time_us.attr,</div><div class='ctx'> 	&amp;dev_attr_npu_memory_utilization.attr,</div><div class='ctx'> 	&amp;dev_attr_sched_mode.attr,</div><div class='add'>+	&amp;dev_attr_npu_max_frequency_mhz.attr,</div><div class='add'>+	&amp;dev_attr_npu_current_frequency_mhz.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/accel/ivpu/vpu_boot_api.h b/drivers/accel/ivpu/vpu_boot_api.h<br/>index 908e68ea1c39..218468bbbcad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/vpu_boot_api.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/vpu_boot_api.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/vpu_boot_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/vpu_boot_api.h</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'>  * Minor version changes when API backward compatibility is preserved.</div><div class='ctx'>  * Resets to 0 if Major version is incremented.</div><div class='ctx'>  */</div><div class='del'>-#define VPU_BOOT_API_VER_MINOR 26</div><div class='add'>+#define VPU_BOOT_API_VER_MINOR 28</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * API header changed (field names, documentation, formatting) but API itself has not been changed</div><div class='hunk'>@@ -76,8 +76,15 @@ struct vpu_firmware_header {</div><div class='ctx'> 	 * submission queue size and device capabilities.</div><div class='ctx'> 	 */</div><div class='ctx'> 	u32 preemption_buffer_2_size;</div><div class='add'>+	/*</div><div class='add'>+	 * Maximum preemption buffer size that the FW can use: no need for the host</div><div class='add'>+	 * driver to allocate more space than that specified by these fields.</div><div class='add'>+	 * A value of 0 means no declared limit.</div><div class='add'>+	 */</div><div class='add'>+	u32 preemption_buffer_1_max_size;</div><div class='add'>+	u32 preemption_buffer_2_max_size;</div><div class='ctx'> 	/* Space reserved for future preemption-related fields. */</div><div class='del'>-	u32 preemption_reserved[6];</div><div class='add'>+	u32 preemption_reserved[4];</div><div class='ctx'> 	/* FW image read only section start address, 4KB aligned */</div><div class='ctx'> 	u64 ro_section_start_address;</div><div class='ctx'> 	/* FW image read only section size, 4KB aligned */</div><div class='hunk'>@@ -134,7 +141,7 @@ enum vpu_trace_destination {</div><div class='ctx'> /*</div><div class='ctx'>  * Processor bit shifts (for loggable HW components).</div><div class='ctx'>  */</div><div class='del'>-#define VPU_TRACE_PROC_BIT_ARM	     0</div><div class='add'>+#define VPU_TRACE_PROC_BIT_RESERVED  0</div><div class='ctx'> #define VPU_TRACE_PROC_BIT_LRT	     1</div><div class='ctx'> #define VPU_TRACE_PROC_BIT_LNN	     2</div><div class='ctx'> #define VPU_TRACE_PROC_BIT_SHV_0     3</div><div class='head'>diff --git a/drivers/accel/ivpu/vpu_jsm_api.h b/drivers/accel/ivpu/vpu_jsm_api.h<br/>index 7215c144158c..4b6b2b3d2583 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/vpu_jsm_api.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/ivpu/vpu_jsm_api.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/ivpu/vpu_jsm_api.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/ivpu/vpu_jsm_api.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Minor version changes when API backward compatibility is preserved.</div><div class='ctx'>  */</div><div class='del'>-#define VPU_JSM_API_VER_MINOR 25</div><div class='add'>+#define VPU_JSM_API_VER_MINOR 29</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * API header changed (field names, documentation, formatting) but API itself has not been changed</div><div class='hunk'>@@ -53,8 +53,7 @@</div><div class='ctx'>  * Engine indexes.</div><div class='ctx'>  */</div><div class='ctx'> #define VPU_ENGINE_COMPUTE 0</div><div class='del'>-#define VPU_ENGINE_COPY	   1</div><div class='del'>-#define VPU_ENGINE_NB	   2</div><div class='add'>+#define VPU_ENGINE_NB	   1</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * VPU status values.</div><div class='hunk'>@@ -126,11 +125,13 @@ enum {</div><div class='ctx'> 	 * When set, indicates that job queue uses native fences (as inline commands</div><div class='ctx'> 	 * in job queue). Such queues may also use legacy fences (as commands in batch buffers).</div><div class='ctx'> 	 * When cleared, indicates the job queue only uses legacy fences.</div><div class='del'>-	 * NOTE: For queues using native fences, VPU expects that all jobs in the queue</div><div class='del'>-	 * are immediately followed by an inline command object. This object is expected</div><div class='del'>-	 * to be a fence signal command in most cases, but can also be a NOP in case the host</div><div class='del'>-	 * does not need per-job fence signalling. Other inline commands objects can be</div><div class='del'>-	 * inserted between "job and inline command" pairs.</div><div class='add'>+	 * NOTES:</div><div class='add'>+	 *   1. For queues using native fences, VPU expects that all jobs in the queue</div><div class='add'>+	 *      are immediately followed by an inline command object. This object is expected</div><div class='add'>+	 *      to be a fence signal command in most cases, but can also be a NOP in case the host</div><div class='add'>+	 *      does not need per-job fence signalling. Other inline commands objects can be</div><div class='add'>+	 *      inserted between "job and inline command" pairs.</div><div class='add'>+	 *  2. Native fence queues are only supported on VPU 40xx onwards.</div><div class='ctx'> 	 */</div><div class='ctx'> 	VPU_JOB_QUEUE_FLAGS_USE_NATIVE_FENCE_MASK = (1 &lt;&lt; 1U),</div><div class='ctx'> </div><div class='hunk'>@@ -275,6 +276,8 @@ struct vpu_inline_cmd {</div><div class='ctx'> 			u64 value;</div><div class='ctx'> 			/* User VA of the log buffer in which to add log entry on completion. */</div><div class='ctx'> 			u64 log_buffer_va;</div><div class='add'>+			/* NPU private data. */</div><div class='add'>+			u64 npu_private_data;</div><div class='ctx'> 		} fence;</div><div class='ctx'> 		/* Other commands do not have a payload. */</div><div class='ctx'> 		/* Payload definition for future inline commands can be inserted here. */</div><div class='hunk'>@@ -791,12 +794,22 @@ struct vpu_jsm_metric_streamer_update {</div><div class='ctx'> 	/** Metric group mask that identifies metric streamer instance. */</div><div class='ctx'> 	u64 metric_group_mask;</div><div class='ctx'> 	/**</div><div class='del'>-	 * Address and size of the buffer where the VPU will write metric data. If</div><div class='del'>-	 * the buffer address is 0 or same as the currently used buffer the VPU will</div><div class='del'>-	 * continue writing metric data to the current buffer. In this case the</div><div class='del'>-	 * buffer size is ignored and the size of the current buffer is unchanged.</div><div class='del'>-	 * If the address is non-zero and differs from the current buffer address the</div><div class='del'>-	 * VPU will immediately switch data collection to the new buffer.</div><div class='add'>+	 * Address and size of the buffer where the VPU will write metric data.</div><div class='add'>+	 * This member dictates how the update operation should perform:</div><div class='add'>+	 * 1. client needs information about the number of collected samples and the</div><div class='add'>+	 *   amount of data written to the current buffer</div><div class='add'>+	 * 2. client wants to switch to a new buffer</div><div class='add'>+	 *</div><div class='add'>+	 * Case 1. is identified by the buffer address being 0 or the same as the</div><div class='add'>+	 * currently used buffer address. In this case the buffer size is ignored and</div><div class='add'>+	 * the size of the current buffer is unchanged. The VPU will return an update</div><div class='add'>+	 * in the vpu_jsm_metric_streamer_done structure. The internal writing position</div><div class='add'>+	 * into the buffer is not changed.</div><div class='add'>+	 *</div><div class='add'>+	 * Case 2. is identified by the address being non-zero and differs from the</div><div class='add'>+	 * current buffer address. The VPU will immediately switch data collection to</div><div class='add'>+	 * the new buffer. Then the VPU will return an update in the</div><div class='add'>+	 * vpu_jsm_metric_streamer_done structure.</div><div class='ctx'> 	 */</div><div class='ctx'> 	u64 buffer_addr;</div><div class='ctx'> 	u64 buffer_size;</div><div class='hunk'>@@ -934,6 +947,7 @@ struct vpu_ipc_msg_payload_hws_priority_band_setup {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Default quantum in 100ns units for scheduling across processes</div><div class='ctx'> 	 * within a priority band</div><div class='add'>+	 * Minimum value supported by NPU is 1ms (10000 in 100ns units).</div><div class='ctx'> 	 */</div><div class='ctx'> 	u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS];</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -946,8 +960,10 @@ struct vpu_ipc_msg_payload_hws_priority_band_setup {</div><div class='ctx'> 	 * in situations when it's starved by the focus band.</div><div class='ctx'> 	 */</div><div class='ctx'> 	u32 normal_band_percentage;</div><div class='del'>-	/* Reserved */</div><div class='del'>-	u32 reserved_0;</div><div class='add'>+	/*</div><div class='add'>+	 * TDR timeout value in milliseconds. Default value of 0 meaning no timeout.</div><div class='add'>+	 */</div><div class='add'>+	u32 tdr_timeout;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1024,7 +1040,10 @@ struct vpu_ipc_msg_payload_hws_set_context_sched_properties {</div><div class='ctx'> 	s32 in_process_priority;</div><div class='ctx'> 	/* Zero padding / Reserved */</div><div class='ctx'> 	u32 reserved_1;</div><div class='del'>-	/* Context quantum relative to other contexts of same priority in the same process */</div><div class='add'>+	/*</div><div class='add'>+	 * Context quantum relative to other contexts of same priority in the same process</div><div class='add'>+	 * Minimum value supported by NPU is 1ms (10000 in 100ns units).</div><div class='add'>+	 */</div><div class='ctx'> 	u64 context_quantum;</div><div class='ctx'> 	/* Grace period when preempting context of the same priority within the same process */</div><div class='ctx'> 	u64 grace_period_same_priority;</div><div class='head'>diff --git a/drivers/accel/qaic/qaic_data.c b/drivers/accel/qaic/qaic_data.c<br/>index 43aba57b48f0..1bce1af7c72c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/qaic/qaic_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/qaic/qaic_data.c</a></div><div class='hunk'>@@ -609,7 +609,7 @@ static int qaic_gem_object_mmap(struct drm_gem_object *obj, struct vm_area_struc</div><div class='ctx'> 	struct scatterlist *sg;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;import_attach)</div><div class='add'>+	if (drm_gem_is_imported(obj))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	for (sg = bo-&gt;sgt-&gt;sgl; sg; sg = sg_next(sg)) {</div><div class='hunk'>@@ -630,7 +630,7 @@ static void qaic_free_object(struct drm_gem_object *obj)</div><div class='ctx'> {</div><div class='ctx'> 	struct qaic_bo *bo = to_qaic_bo(obj);</div><div class='ctx'> </div><div class='del'>-	if (obj-&gt;import_attach) {</div><div class='add'>+	if (drm_gem_is_imported(obj)) {</div><div class='ctx'> 		/* DMABUF/PRIME Path */</div><div class='ctx'> 		drm_prime_gem_destroy(obj, NULL);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -870,7 +870,7 @@ static int qaic_prepare_bo(struct qaic_device *qdev, struct qaic_bo *bo,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (bo-&gt;base.import_attach)</div><div class='add'>+	if (drm_gem_is_imported(&amp;bo-&gt;base))</div><div class='ctx'> 		ret = qaic_prepare_import_bo(bo, hdr);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = qaic_prepare_export_bo(qdev, bo, hdr);</div><div class='hunk'>@@ -894,7 +894,7 @@ static void qaic_unprepare_export_bo(struct qaic_device *qdev, struct qaic_bo *b</div><div class='ctx'> </div><div class='ctx'> static void qaic_unprepare_bo(struct qaic_device *qdev, struct qaic_bo *bo)</div><div class='ctx'> {</div><div class='del'>-	if (bo-&gt;base.import_attach)</div><div class='add'>+	if (drm_gem_is_imported(&amp;bo-&gt;base))</div><div class='ctx'> 		qaic_unprepare_import_bo(bo);</div><div class='ctx'> 	else</div><div class='ctx'> 		qaic_unprepare_export_bo(qdev, bo);</div><div class='head'>diff --git a/drivers/accel/qaic/qaic_debugfs.c b/drivers/accel/qaic/qaic_debugfs.c<br/>index ba0cf2f94732..a991b8198dc4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_debugfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/accel/qaic/qaic_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/accel/qaic/qaic_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/accel/qaic/qaic_debugfs.c</a></div><div class='hunk'>@@ -240,7 +240,6 @@ static int qaic_bootlog_mhi_probe(struct mhi_device *mhi_dev, const struct mhi_d</div><div class='ctx'> mhi_unprepare:</div><div class='ctx'> 	mhi_unprepare_from_transfer(mhi_dev);</div><div class='ctx'> destroy_workqueue:</div><div class='del'>-	flush_workqueue(qdev-&gt;bootlog_wq);</div><div class='ctx'> 	destroy_workqueue(qdev-&gt;bootlog_wq);</div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -253,7 +252,6 @@ static void qaic_bootlog_mhi_remove(struct mhi_device *mhi_dev)</div><div class='ctx'> 	qdev = dev_get_drvdata(&amp;mhi_dev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	mhi_unprepare_from_transfer(qdev-&gt;bootlog_ch);</div><div class='del'>-	flush_workqueue(qdev-&gt;bootlog_wq);</div><div class='ctx'> 	destroy_workqueue(qdev-&gt;bootlog_wq);</div><div class='ctx'> 	qdev-&gt;bootlog_ch = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig<br/>index 7f10aa38269d..7bc40c2735ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/Kconfig</a></div><div class='hunk'>@@ -576,6 +576,9 @@ config ACPI_FFH</div><div class='ctx'> 	  Enable this feature if you want to set up and install the FFH Address</div><div class='ctx'> 	  Space handler to handle FFH OpRegion in the firmware.</div><div class='ctx'> </div><div class='add'>+config ACPI_MRRM</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> source "drivers/acpi/pmic/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config ACPI_VIOT</div><div class='head'>diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile<br/>index 797070fc9a3f..d1b0affb844f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/Makefile</a></div><div class='hunk'>@@ -66,6 +66,7 @@ acpi-$(CONFIG_ACPI_WATCHDOG)	+= acpi_watchdog.o</div><div class='ctx'> acpi-$(CONFIG_ACPI_PRMT)	+= prmt.o</div><div class='ctx'> acpi-$(CONFIG_ACPI_PCC)		+= acpi_pcc.o</div><div class='ctx'> acpi-$(CONFIG_ACPI_FFH)		+= acpi_ffh.o</div><div class='add'>+acpi-$(CONFIG_ACPI_MRRM)	+= acpi_mrrm.o</div><div class='ctx'> </div><div class='ctx'> # Address translation</div><div class='ctx'> acpi-$(CONFIG_ACPI_ADXL)	+= acpi_adxl.o</div><div class='head'>diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c<br/>index f7fb7205028d..f6b9562779de 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_extlog.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_extlog.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_extlog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpi_extlog.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;acpi/ghes.h&gt;</div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "apei/apei-internal.h"</div><div class='ctx'> #include &lt;ras/ras_event.h&gt;</div><div class='hunk'>@@ -234,7 +235,7 @@ static int __init extlog_init(void)</div><div class='ctx'> 	u64 cap;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_IA32_MCG_CAP, &amp;cap) ||</div><div class='add'>+	if (rdmsrq_safe(MSR_IA32_MCG_CAP, &amp;cap) ||</div><div class='ctx'> 	    !(cap &amp; MCG_ELOG_P) ||</div><div class='ctx'> 	    !extlog_get_l1addr())</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/drivers/acpi/acpi_lpit.c b/drivers/acpi/acpi_lpit.c<br/>index 794962c5c88e..b8d98b1b48ae 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_lpit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_lpit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_lpit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpi_lpit.c</a></div><div class='hunk'>@@ -39,7 +39,7 @@ static int lpit_read_residency_counter_us(u64 *counter, bool io_mem)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe(residency_info_ffh.gaddr.address, counter);</div><div class='add'>+	err = rdmsrq_safe(residency_info_ffh.gaddr.address, counter);</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		u64 mask = GENMASK_ULL(residency_info_ffh.gaddr.bit_offset +</div><div class='ctx'> 				       residency_info_ffh.gaddr. bit_width - 1,</div><div class='head'>diff --git a/drivers/acpi/acpi_mrrm.c b/drivers/acpi/acpi_mrrm.c<br/>new file mode 100644<br/>index 000000000000..26c1a4e6b6ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_mrrm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpi_mrrm.c</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Intel Corporation.</div><div class='add'>+ *</div><div class='add'>+ * Memory Range and Region Mapping (MRRM) structure</div><div class='add'>+ *</div><div class='add'>+ * Parse and report the platform's MRRM table in /sys.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "acpi/mrrm: " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/sysfs.h&gt;</div><div class='add'>+</div><div class='add'>+/* Default assume one memory region covering all system memory, per the spec */</div><div class='add'>+static int max_mem_region = 1;</div><div class='add'>+</div><div class='add'>+/* Access for use by resctrl file system */</div><div class='add'>+int acpi_mrrm_max_mem_region(void)</div><div class='add'>+{</div><div class='add'>+	return max_mem_region;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mrrm_mem_range_entry {</div><div class='add'>+	u64 base;</div><div class='add'>+	u64 length;</div><div class='add'>+	int node;</div><div class='add'>+	u8  local_region_id;</div><div class='add'>+	u8  remote_region_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mrrm_mem_range_entry *mrrm_mem_range_entry;</div><div class='add'>+static u32 mrrm_mem_entry_num;</div><div class='add'>+</div><div class='add'>+static int get_node_num(struct mrrm_mem_range_entry *e)</div><div class='add'>+{</div><div class='add'>+	unsigned int nid;</div><div class='add'>+</div><div class='add'>+	for_each_online_node(nid) {</div><div class='add'>+		for (int z = 0; z &lt; MAX_NR_ZONES; z++) {</div><div class='add'>+			struct zone *zone = NODE_DATA(nid)-&gt;node_zones + z;</div><div class='add'>+</div><div class='add'>+			if (!populated_zone(zone))</div><div class='add'>+				continue;</div><div class='add'>+			if (zone_intersects(zone, PHYS_PFN(e-&gt;base), PHYS_PFN(e-&gt;length)))</div><div class='add'>+				return zone_to_nid(zone);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int acpi_parse_mrrm(struct acpi_table_header *table)</div><div class='add'>+{</div><div class='add'>+	struct acpi_mrrm_mem_range_entry *mre_entry;</div><div class='add'>+	struct acpi_table_mrrm *mrrm;</div><div class='add'>+	void *mre, *mrrm_end;</div><div class='add'>+	int mre_count = 0;</div><div class='add'>+</div><div class='add'>+	mrrm = (struct acpi_table_mrrm *)table;</div><div class='add'>+	if (!mrrm)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (mrrm-&gt;flags &amp; ACPI_MRRM_FLAGS_REGION_ASSIGNMENT_OS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mrrm_end = (void *)mrrm + mrrm-&gt;header.length - 1;</div><div class='add'>+	mre = (void *)mrrm + sizeof(struct acpi_table_mrrm);</div><div class='add'>+	while (mre &lt; mrrm_end) {</div><div class='add'>+		mre_entry = mre;</div><div class='add'>+		mre_count++;</div><div class='add'>+		mre += mre_entry-&gt;header.length;</div><div class='add'>+	}</div><div class='add'>+	if (!mre_count) {</div><div class='add'>+		pr_info(FW_BUG "No ranges listed in MRRM table\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mrrm_mem_range_entry = kmalloc_array(mre_count, sizeof(*mrrm_mem_range_entry),</div><div class='add'>+					     GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+	if (!mrrm_mem_range_entry)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mre = (void *)mrrm + sizeof(struct acpi_table_mrrm);</div><div class='add'>+	while (mre &lt; mrrm_end) {</div><div class='add'>+		struct mrrm_mem_range_entry *e;</div><div class='add'>+</div><div class='add'>+		mre_entry = mre;</div><div class='add'>+		e = mrrm_mem_range_entry + mrrm_mem_entry_num;</div><div class='add'>+</div><div class='add'>+		e-&gt;base = mre_entry-&gt;addr_base;</div><div class='add'>+		e-&gt;length = mre_entry-&gt;addr_len;</div><div class='add'>+		e-&gt;node = get_node_num(e);</div><div class='add'>+</div><div class='add'>+		if (mre_entry-&gt;region_id_flags &amp; ACPI_MRRM_VALID_REGION_ID_FLAGS_LOCAL)</div><div class='add'>+			e-&gt;local_region_id = mre_entry-&gt;local_region_id;</div><div class='add'>+		else</div><div class='add'>+			e-&gt;local_region_id = -1;</div><div class='add'>+		if (mre_entry-&gt;region_id_flags &amp; ACPI_MRRM_VALID_REGION_ID_FLAGS_REMOTE)</div><div class='add'>+			e-&gt;remote_region_id = mre_entry-&gt;remote_region_id;</div><div class='add'>+		else</div><div class='add'>+			e-&gt;remote_region_id = -1;</div><div class='add'>+</div><div class='add'>+		mrrm_mem_entry_num++;</div><div class='add'>+		mre += mre_entry-&gt;header.length;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	max_mem_region = mrrm-&gt;max_mem_region;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RANGE_ATTR(name, fmt)						\</div><div class='add'>+static ssize_t name##_show(struct kobject *kobj,			\</div><div class='add'>+			  struct kobj_attribute *attr, char *buf)	\</div><div class='add'>+{									\</div><div class='add'>+	struct mrrm_mem_range_entry *mre;				\</div><div class='add'>+	const char *kname = kobject_name(kobj);				\</div><div class='add'>+	int n, ret;							\</div><div class='add'>+									\</div><div class='add'>+	ret = kstrtoint(kname + 5, 10, &amp;n);				\</div><div class='add'>+	if (ret)							\</div><div class='add'>+		return ret;						\</div><div class='add'>+									\</div><div class='add'>+	mre = mrrm_mem_range_entry + n;					\</div><div class='add'>+									\</div><div class='add'>+	return sysfs_emit(buf, fmt, mre-&gt;name);				\</div><div class='add'>+}									\</div><div class='add'>+static struct kobj_attribute name##_attr = __ATTR_RO(name)</div><div class='add'>+</div><div class='add'>+RANGE_ATTR(base, "0x%llx\n");</div><div class='add'>+RANGE_ATTR(length, "0x%llx\n");</div><div class='add'>+RANGE_ATTR(node, "%d\n");</div><div class='add'>+RANGE_ATTR(local_region_id, "%d\n");</div><div class='add'>+RANGE_ATTR(remote_region_id, "%d\n");</div><div class='add'>+</div><div class='add'>+static struct attribute *memory_range_attrs[] = {</div><div class='add'>+	&amp;base_attr.attr,</div><div class='add'>+	&amp;length_attr.attr,</div><div class='add'>+	&amp;node_attr.attr,</div><div class='add'>+	&amp;local_region_id_attr.attr,</div><div class='add'>+	&amp;remote_region_id_attr.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+ATTRIBUTE_GROUPS(memory_range);</div><div class='add'>+</div><div class='add'>+static __init int add_boot_memory_ranges(void)</div><div class='add'>+{</div><div class='add'>+	struct kobject *pkobj, *kobj;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	char *name;</div><div class='add'>+</div><div class='add'>+	pkobj = kobject_create_and_add("memory_ranges", acpi_kobj);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; mrrm_mem_entry_num; i++) {</div><div class='add'>+		name = kasprintf(GFP_KERNEL, "range%d", i);</div><div class='add'>+		if (!name)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		kobj = kobject_create_and_add(name, pkobj);</div><div class='add'>+</div><div class='add'>+		ret = sysfs_create_groups(kobj, memory_range_groups);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __init int mrrm_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = acpi_table_parse(ACPI_SIG_MRRM, acpi_parse_mrrm);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return add_boot_memory_ranges();</div><div class='add'>+}</div><div class='add'>+device_initcall(mrrm_init);</div><div class='head'>diff --git a/drivers/acpi/acpi_pad.c b/drivers/acpi/acpi_pad.c<br/>index 3fde4496f8a2..6f8bbe1247a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_pad.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_pad.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_pad.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpi_pad.c</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/perf_event.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> #include &lt;asm/mwait.h&gt;</div><div class='ctx'> #include &lt;xen/xen.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpi_pcc.c b/drivers/acpi/acpi_pcc.c<br/>index 07a034a53aca..97064e943768 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_pcc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpi_pcc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpi_pcc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpi_pcc.c</a></div><div class='hunk'>@@ -31,7 +31,6 @@</div><div class='ctx'> </div><div class='ctx'> struct pcc_data {</div><div class='ctx'> 	struct pcc_mbox_chan *pcc_chan;</div><div class='del'>-	void __iomem *pcc_comm_addr;</div><div class='ctx'> 	struct completion done;</div><div class='ctx'> 	struct mbox_client cl;</div><div class='ctx'> 	struct acpi_pcc_info ctx;</div><div class='hunk'>@@ -81,14 +80,6 @@ acpi_pcc_address_space_setup(acpi_handle region_handle, u32 function,</div><div class='ctx'> 		ret = AE_SUPPORT;</div><div class='ctx'> 		goto err_free_channel;</div><div class='ctx'> 	}</div><div class='del'>-	data-&gt;pcc_comm_addr = acpi_os_ioremap(pcc_chan-&gt;shmem_base_addr,</div><div class='del'>-					      pcc_chan-&gt;shmem_size);</div><div class='del'>-	if (!data-&gt;pcc_comm_addr) {</div><div class='del'>-		pr_err("Failed to ioremap PCC comm region mem for %d\n",</div><div class='del'>-		       ctx-&gt;subspace_id);</div><div class='del'>-		ret = AE_NO_MEMORY;</div><div class='del'>-		goto err_free_channel;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	*region_context = data;</div><div class='ctx'> 	return AE_OK;</div><div class='hunk'>@@ -113,7 +104,7 @@ acpi_pcc_address_space_handler(u32 function, acpi_physical_address addr,</div><div class='ctx'> 	reinit_completion(&amp;data-&gt;done);</div><div class='ctx'> </div><div class='ctx'> 	/* Write to Shared Memory */</div><div class='del'>-	memcpy_toio(data-&gt;pcc_comm_addr, (void *)value, data-&gt;ctx.length);</div><div class='add'>+	memcpy_toio(data-&gt;pcc_chan-&gt;shmem, (void *)value, data-&gt;ctx.length);</div><div class='ctx'> </div><div class='ctx'> 	ret = mbox_send_message(data-&gt;pcc_chan-&gt;mchan, NULL);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -134,7 +125,7 @@ acpi_pcc_address_space_handler(u32 function, acpi_physical_address addr,</div><div class='ctx'> </div><div class='ctx'> 	mbox_chan_txdone(data-&gt;pcc_chan-&gt;mchan, ret);</div><div class='ctx'> </div><div class='del'>-	memcpy_fromio(value, data-&gt;pcc_comm_addr, data-&gt;ctx.length);</div><div class='add'>+	memcpy_fromio(value, data-&gt;pcc_chan-&gt;shmem, data-&gt;ctx.length);</div><div class='ctx'> </div><div class='ctx'> 	return AE_OK;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/acpi/acpica/acapps.h b/drivers/acpi/acpica/acapps.h<br/>index 9d4cbd956627..d7d4649ce66f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acapps.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acapps.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acapps.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acapps.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: acapps - common include for ACPI applications/tools</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -17,7 +17,7 @@</div><div class='ctx'> /* Common info for tool signons */</div><div class='ctx'> </div><div class='ctx'> #define ACPICA_NAME                 "Intel ACPI Component Architecture"</div><div class='del'>-#define ACPICA_COPYRIGHT            "Copyright (c) 2000 - 2022 Intel Corporation"</div><div class='add'>+#define ACPICA_COPYRIGHT            "Copyright (c) 2000 - 2025 Intel Corporation"</div><div class='ctx'> </div><div class='ctx'> #if ACPI_MACHINE_WIDTH == 64</div><div class='ctx'> #define ACPI_WIDTH          " (64-bit version)"</div><div class='head'>diff --git a/drivers/acpi/acpica/accommon.h b/drivers/acpi/acpica/accommon.h<br/>index 4536dc9d3979..662231f4f881 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/accommon.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/accommon.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/accommon.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/accommon.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: accommon.h - Common include files for generation of ACPICA source</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acconvert.h b/drivers/acpi/acpica/acconvert.h<br/>index c6ba6a36cfb5..24998f2d7539 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acconvert.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acconvert.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acconvert.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acconvert.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: acapps - common include for ACPI applications/tools</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acdebug.h b/drivers/acpi/acpica/acdebug.h<br/>index 911875c5a5f1..fe6d38b43c9a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acdebug.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acdebug.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acdebug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acdebug.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acdebug.h - ACPI/AML debugger</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +37,7 @@ struct acpi_db_argument_info {</div><div class='ctx'> struct acpi_db_execute_walk {</div><div class='ctx'> 	u32 count;</div><div class='ctx'> 	u32 max_count;</div><div class='del'>-	char name_seg[ACPI_NAMESEG_SIZE + 1];</div><div class='add'>+	char name_seg[ACPI_NAMESEG_SIZE + 1] ACPI_NONSTRING;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define PARAM_LIST(pl)                  pl</div><div class='head'>diff --git a/drivers/acpi/acpica/acdispat.h b/drivers/acpi/acpica/acdispat.h<br/>index 73eecbf62f06..5d48a344b35f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acdispat.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acdispat.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acdispat.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acdispat.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acdispat.h - dispatcher (parser to interpreter interface)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acevents.h b/drivers/acpi/acpica/acevents.h<br/>index 1c5218b79fc2..b40fb3a5ac8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acevents.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acevents.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acevents.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acevents.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acevents.h - Event subcomponent prototypes and defines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acglobal.h b/drivers/acpi/acpica/acglobal.h<br/>index 309ce8efb4f6..c8a750d2674c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acglobal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acglobal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acglobal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acglobal.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acglobal.h - Declarations for global variables</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/achware.h b/drivers/acpi/acpica/achware.h<br/>index b8543a34caea..6aec56c65fa0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/achware.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/achware.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/achware.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/achware.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: achware.h -- hardware specific interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acinterp.h b/drivers/acpi/acpica/acinterp.h<br/>index 955114c926bd..1ee6ac9b2baf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acinterp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acinterp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acinterp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acinterp.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acinterp.h - Interpreter subcomponent prototypes and defines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -120,6 +120,9 @@ void</div><div class='ctx'> acpi_ex_trace_point(acpi_trace_event_type type,</div><div class='ctx'> 		    u8 begin, u8 *aml, char *pathname);</div><div class='ctx'> </div><div class='add'>+void</div><div class='add'>+acpi_ex_trace_args(union acpi_operand_object **params, u32 count);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * exfield - ACPI AML (p-code) execution - field manipulation</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h<br/>index 6f4fe47c955b..0c41f0097e8d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/aclocal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/aclocal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/aclocal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/aclocal.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: aclocal.h - Internal data types used across the ACPI subsystem</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -293,7 +293,7 @@ acpi_status (*acpi_internal_method) (struct acpi_walk_state * walk_state);</div><div class='ctx'>  * expected_return_btypes - Allowed type(s) for the return value</div><div class='ctx'>  */</div><div class='ctx'> struct acpi_name_info {</div><div class='del'>-	char name[ACPI_NAMESEG_SIZE];</div><div class='add'>+	char name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;</div><div class='ctx'> 	u16 argument_list;</div><div class='ctx'> 	u8 expected_btypes;</div><div class='ctx'> };</div><div class='hunk'>@@ -370,7 +370,7 @@ typedef acpi_status (*acpi_object_converter) (struct acpi_namespace_node *</div><div class='ctx'> 					      converted_object);</div><div class='ctx'> </div><div class='ctx'> struct acpi_simple_repair_info {</div><div class='del'>-	char name[ACPI_NAMESEG_SIZE];</div><div class='add'>+	char name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;</div><div class='ctx'> 	u32 unexpected_btypes;</div><div class='ctx'> 	u32 package_index;</div><div class='ctx'> 	acpi_object_converter object_converter;</div><div class='head'>diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h<br/>index de83dd22292b..4e9402c02410 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acmacros.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acmacros.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acmacros.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acmacros.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acmacros.h - C macros for the entire subsystem.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acnamesp.h b/drivers/acpi/acpica/acnamesp.h<br/>index 9448bc026b9b..13f050fecb49 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acnamesp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acnamesp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acnamesp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acnamesp.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acnamesp.h - Namespace subcomponent prototypes and defines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h<br/>index 8fc02946d3cd..6ffcc7a0a0c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acobject.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acobject.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acobject.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acobject.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acobject.h - Definition of union acpi_operand_object  (Internal object only)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acopcode.h b/drivers/acpi/acpica/acopcode.h<br/>index da96d80e6b3a..a2a9e51d7ac6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acopcode.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acopcode.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acopcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acopcode.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acopcode.h - AML opcode information for the AML parser and interpreter</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acparser.h b/drivers/acpi/acpica/acparser.h<br/>index 6dad786a382c..65a15dee092b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acparser.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acparser.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acparser.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acparser.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: acparser.h - AML Parser subcomponent prototypes and defines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acpredef.h b/drivers/acpi/acpica/acpredef.h<br/>index ef068f4c864a..76c5ed02e916 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acpredef.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acpredef.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acpredef.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acpredef.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acpredef - Information table for ACPI predefined methods and objects</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acresrc.h b/drivers/acpi/acpica/acresrc.h<br/>index d772ff9ca07d..e8a92be5adae 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acresrc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acresrc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acresrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acresrc.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acresrc.h - Resource Manager function prototypes</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acstruct.h b/drivers/acpi/acpica/acstruct.h<br/>index f8fee94ba708..e690f604cfa0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acstruct.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acstruct.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acstruct.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acstruct.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acstruct.h - Internal structs</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/actables.h b/drivers/acpi/acpica/actables.h<br/>index b6ae979b01b6..ebef72bf58d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/actables.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/actables.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/actables.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/actables.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: actables.h - ACPI table management</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h<br/>index edfdbbef81c1..3990d509bbab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acutils.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/acutils.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/acutils.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/acutils.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: acutils.h -- prototypes for the common (subsystem-wide) procedures</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/amlcode.h b/drivers/acpi/acpica/amlcode.h<br/>index effe52b40dce..c5b544a006c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/amlcode.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/amlcode.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/amlcode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/amlcode.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'>  *                   Declarations and definitions contained herein are derived</div><div class='ctx'>  *                   directly from the ACPI specification.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/amlresrc.h b/drivers/acpi/acpica/amlresrc.h<br/>index 4e88f9fc2a28..54d6e51e0b9a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/amlresrc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/amlresrc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/amlresrc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/amlresrc.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: amlresrc.h - AML resource descriptors</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -504,10 +504,6 @@ struct aml_resource_pin_group_config {</div><div class='ctx'> </div><div class='ctx'> #define AML_RESOURCE_PIN_GROUP_CONFIG_REVISION    1	/* ACPI 6.2 */</div><div class='ctx'> </div><div class='del'>-/* restore default alignment */</div><div class='del'>-</div><div class='del'>-#pragma pack()</div><div class='del'>-</div><div class='ctx'> /* Union of all resource descriptors, so we can allocate the worst case */</div><div class='ctx'> </div><div class='ctx'> union aml_resource {</div><div class='hunk'>@@ -562,6 +558,10 @@ union aml_resource {</div><div class='ctx'> 	u8 byte_item;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* restore default alignment */</div><div class='add'>+</div><div class='add'>+#pragma pack()</div><div class='add'>+</div><div class='ctx'> /* Interfaces used by both the disassembler and compiler */</div><div class='ctx'> </div><div class='ctx'> void</div><div class='head'>diff --git a/drivers/acpi/acpica/dbhistry.c b/drivers/acpi/acpica/dbhistry.c<br/>index e874c1dddefa..554ae35108bd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dbhistry.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dbhistry.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dbhistry.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dbhistry.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dbhistry - debugger HISTORY command</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsargs.c b/drivers/acpi/acpica/dsargs.c<br/>index 4354c175e12e..e2f00c54cb36 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsargs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsargs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsargs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsargs.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: dsargs - Support for execution of dynamic arguments for static</div><div class='ctx'>  *                       objects (regions, fields, buffer fields, etc.)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dscontrol.c b/drivers/acpi/acpica/dscontrol.c<br/>index 80c69af06948..c1f79d7a2026 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dscontrol.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dscontrol.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dscontrol.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dscontrol.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: dscontrol - Support for execution control opcodes -</div><div class='ctx'>  *                          if/else/while/return</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsdebug.c b/drivers/acpi/acpica/dsdebug.c<br/>index c5c8380a3114..274b74255551 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsdebug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsdebug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsdebug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsdebug.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dsdebug - Parser/Interpreter interface - debugging</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsfield.c b/drivers/acpi/acpica/dsfield.c<br/>index 532401ecdab0..df132c9089c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsfield.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsfield.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsfield.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsfield.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dsfield - Dispatcher field routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsinit.c b/drivers/acpi/acpica/dsinit.c<br/>index 6e0e362e461f..57cd9e2d1109 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsinit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsinit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsinit.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dsinit - Object initialization namespace walk</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsmethod.c b/drivers/acpi/acpica/dsmethod.c<br/>index e809c2aed78a..c8f37f4e6626 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsmethod.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsmethod.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsmethod.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsmethod.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dsmethod - Parser/Interpreter interface - control method parsing</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsmthdat.c b/drivers/acpi/acpica/dsmthdat.c<br/>index eca50517ad82..5393de4dbc4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsmthdat.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsmthdat.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsmthdat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsmthdat.c</a></div><div class='hunk'>@@ -188,6 +188,7 @@ acpi_ds_method_data_init_args(union acpi_operand_object **params,</div><div class='ctx'> </div><div class='ctx'> 		index++;</div><div class='ctx'> 	}</div><div class='add'>+	acpi_ex_trace_args(params, index);</div><div class='ctx'> </div><div class='ctx'> 	ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "%u args passed to method\n", index));</div><div class='ctx'> 	return_ACPI_STATUS(AE_OK);</div><div class='head'>diff --git a/drivers/acpi/acpica/dsobject.c b/drivers/acpi/acpica/dsobject.c<br/>index 555f148d666b..1bf7eec49899 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsobject.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsobject.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsobject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsobject.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dsobject - Dispatcher object management routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c<br/>index dd3059000885..5699b0872848 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsopcode.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsopcode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsopcode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsopcode.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dsopcode - Dispatcher support for regions and fields</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dspkginit.c b/drivers/acpi/acpica/dspkginit.c<br/>index ecf793fe9919..1ed2386fab82 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dspkginit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dspkginit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dspkginit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dspkginit.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dspkginit - Completion of deferred package initialization</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dsutils.c b/drivers/acpi/acpica/dsutils.c<br/>index fb9ed5e1da89..baf6a1f27605 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsutils.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dsutils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dsutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dsutils.c</a></div><div class='hunk'>@@ -668,6 +668,8 @@ acpi_ds_create_operands(struct acpi_walk_state *walk_state,</div><div class='ctx'> 	union acpi_parse_object *arguments[ACPI_OBJ_NUM_OPERANDS];</div><div class='ctx'> 	u32 arg_count = 0;</div><div class='ctx'> 	u32 index = walk_state-&gt;num_operands;</div><div class='add'>+	u32 prev_num_operands = walk_state-&gt;num_operands;</div><div class='add'>+	u32 new_num_operands;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	ACPI_FUNCTION_TRACE_PTR(ds_create_operands, first_arg);</div><div class='hunk'>@@ -696,6 +698,7 @@ acpi_ds_create_operands(struct acpi_walk_state *walk_state,</div><div class='ctx'> </div><div class='ctx'> 	/* Create the interpreter arguments, in reverse order */</div><div class='ctx'> </div><div class='add'>+	new_num_operands = index;</div><div class='ctx'> 	index--;</div><div class='ctx'> 	for (i = 0; i &lt; arg_count; i++) {</div><div class='ctx'> 		arg = arguments[index];</div><div class='hunk'>@@ -720,7 +723,11 @@ cleanup:</div><div class='ctx'> 	 * pop everything off of the operand stack and delete those</div><div class='ctx'> 	 * objects</div><div class='ctx'> 	 */</div><div class='del'>-	acpi_ds_obj_stack_pop_and_delete(arg_count, walk_state);</div><div class='add'>+	walk_state-&gt;num_operands = (u8)(i);</div><div class='add'>+	acpi_ds_obj_stack_pop_and_delete(new_num_operands, walk_state);</div><div class='add'>+</div><div class='add'>+	/* Restore operand count */</div><div class='add'>+	walk_state-&gt;num_operands = (u8)(prev_num_operands);</div><div class='ctx'> </div><div class='ctx'> 	ACPI_EXCEPTION((AE_INFO, status, "While creating Arg %u", index));</div><div class='ctx'> 	return_ACPI_STATUS(status);</div><div class='head'>diff --git a/drivers/acpi/acpica/dswexec.c b/drivers/acpi/acpica/dswexec.c<br/>index a43336f05206..5c5c6d8a4e48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswexec.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswexec.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswexec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dswexec.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: dswexec - Dispatcher method execution callbacks;</div><div class='ctx'>  *                        dispatch to interpreter.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dswload.c b/drivers/acpi/acpica/dswload.c<br/>index f7b8496c8bdd..666419b6a5c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswload.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswload.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dswload.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dswload - Dispatcher first pass namespace load callbacks</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dswload2.c b/drivers/acpi/acpica/dswload2.c<br/>index 541235f498c2..bfc54c914757 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswload2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswload2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswload2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dswload2.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dswload2 - Dispatcher second pass namespace load callbacks</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dswscope.c b/drivers/acpi/acpica/dswscope.c<br/>index 1fdd07ae862c..375a8fa43d9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswscope.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswscope.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswscope.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dswscope.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dswscope - Scope stack manipulation</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/dswstate.c b/drivers/acpi/acpica/dswstate.c<br/>index 75338a13c802..02aaddb89df9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswstate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/dswstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/dswstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/dswstate.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: dswstate - Dispatcher parse tree walk management routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evevent.c b/drivers/acpi/acpica/evevent.c<br/>index 9e78c5b9ad52..6cdd39c987b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evevent.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evevent.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evevent.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evevent.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evevent - Fixed Event handling and dispatch</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evglock.c b/drivers/acpi/acpica/evglock.c<br/>index 989dc01af03f..fa3e0d00d1ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evglock.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evglock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evglock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evglock.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evglock - Global Lock support</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c<br/>index 934b201d3820..ba65b2ea49b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpe.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpe.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evgpe.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evgpe - General Purpose Event handling and dispatch</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evgpeblk.c b/drivers/acpi/acpica/evgpeblk.c<br/>index 58e1890ab25b..fadd93caf1d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeblk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpeblk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeblk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evgpeblk.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evgpeblk - GPE block creation and initialization.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evgpeinit.c b/drivers/acpi/acpica/evgpeinit.c<br/>index 38f408cf13ce..eb769739420e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeinit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpeinit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evgpeinit.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evgpeinit - System GPE initialization and update</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evgpeutil.c b/drivers/acpi/acpica/evgpeutil.c<br/>index ee3b1ea656d4..d15b1d75c8ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeutil.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evgpeutil.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evgpeutil.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evgpeutil.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evgpeutil - GPE utilities</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evhandler.c b/drivers/acpi/acpica/evhandler.c<br/>index 1c8cb6d924df..5a35dae945e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evhandler.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evhandler.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evhandler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evhandler.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evhandler - Support for Address Space handlers</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evmisc.c b/drivers/acpi/acpica/evmisc.c<br/>index e68e876d3b84..04a23a6c3bb1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evmisc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evmisc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evmisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evmisc.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evmisc - Miscellaneous event manager support functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evregion.c b/drivers/acpi/acpica/evregion.c<br/>index cf53b9535f18..fa3475da7ea9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evregion.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evregion.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evregion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evregion.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evregion - Operation Region support</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evrgnini.c b/drivers/acpi/acpica/evrgnini.c<br/>index 46d1b3f5582d..b03952798af5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evrgnini.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evrgnini.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evrgnini.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evrgnini.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evrgnini- ACPI address_space (op_region) init</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evxface.c b/drivers/acpi/acpica/evxface.c<br/>index 24fa6433d562..86a8d41c079c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxface.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evxface.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evxface - External interfaces for ACPI events</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c<br/>index 48bf845191d2..4b052908d2e7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxfevnt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxfevnt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxfevnt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evxfevnt.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evxfevnt - External Interfaces, ACPI event disable/enable</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evxfgpe.c b/drivers/acpi/acpica/evxfgpe.c<br/>index 4eeeb3b7ab7e..60dacec1b121 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxfgpe.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxfgpe.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxfgpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evxfgpe.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: evxfgpe - External Interfaces for General Purpose Events (GPEs)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/evxfregn.c b/drivers/acpi/acpica/evxfregn.c<br/>index bff2d099f469..bccc672c934c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxfregn.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/evxfregn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/evxfregn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/evxfregn.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: evxfregn - External Interfaces, ACPI Operation Regions and</div><div class='ctx'>  *                         Address Spaces.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exconcat.c b/drivers/acpi/acpica/exconcat.c<br/>index 2fb78b35565b..c248c9b162fa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exconcat.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exconcat.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exconcat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exconcat.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exconcat - Concatenate-type AML operators</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exconfig.c b/drivers/acpi/acpica/exconfig.c<br/>index 473115309860..4d7dd0fc6b07 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exconfig.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exconfig.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exconfig.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exconfig.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exconfig - Namespace reconfiguration (Load/Unload opcodes)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exconvrt.c b/drivers/acpi/acpica/exconvrt.c<br/>index bb1be42daee1..fded9bfc2436 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exconvrt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exconvrt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exconvrt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exconvrt.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exconvrt - Object conversion routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -226,8 +226,8 @@ acpi_ex_convert_to_buffer(union acpi_operand_object *obj_desc,</div><div class='ctx'> 		/* Copy the string to the buffer */</div><div class='ctx'> </div><div class='ctx'> 		new_buf = return_desc-&gt;buffer.pointer;</div><div class='del'>-		strncpy((char *)new_buf, (char *)obj_desc-&gt;string.pointer,</div><div class='del'>-			obj_desc-&gt;string.length);</div><div class='add'>+		memcpy((char *)new_buf, (char *)obj_desc-&gt;string.pointer,</div><div class='add'>+		       obj_desc-&gt;string.length);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='head'>diff --git a/drivers/acpi/acpica/excreate.c b/drivers/acpi/acpica/excreate.c<br/>index 1bea9d97652c..052c69567997 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/excreate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/excreate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/excreate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/excreate.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: excreate - Named object creation</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exdebug.c b/drivers/acpi/acpica/exdebug.c<br/>index 3f86bfada510..81a07a52b73c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exdebug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exdebug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exdebug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exdebug.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exdebug - Support for stores to the AML Debug Object</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exdump.c b/drivers/acpi/acpica/exdump.c<br/>index 2e2da8790224..d8aeebaab70a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exdump.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exdump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exdump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exdump.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exdump - Interpreter debug output routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c<br/>index 61ff36189ace..ced3ff9d0a86 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exfield.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exfield.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exfield.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exfield.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exfield - AML execution - field_unit read/write</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c<br/>index cf6c812a8b6d..0771934c0455 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exfldio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exfldio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exfldio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exfldio.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exfldio - Aml Field I/O</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exmisc.c b/drivers/acpi/acpica/exmisc.c<br/>index c6f2a9166ac0..07cbac58ed21 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exmisc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exmisc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exmisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exmisc.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exmisc - ACPI AML (p-code) execution - specific opcodes</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exmutex.c b/drivers/acpi/acpica/exmutex.c<br/>index 65c487facdda..1fa013197fcf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exmutex.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exmutex.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exmutex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exmutex.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exmutex - ASL Mutex Acquire/Release functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exnames.c b/drivers/acpi/acpica/exnames.c<br/>index 9a448165bfeb..76ab73c37e90 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exnames.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exnames.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exnames.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exnames.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exnames - interpreter/scanner name load/execute</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exoparg1.c b/drivers/acpi/acpica/exoparg1.c<br/>index 20fb34b68bee..6ac7e0ca5c9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exoparg1.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exoparg1 - AML execution - opcodes with 1 argument</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exoparg2.c b/drivers/acpi/acpica/exoparg2.c<br/>index 743c258bf2e8..a94fa4d70e99 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exoparg2.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exoparg2 - AML execution - opcodes with 2 arguments</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exoparg3.c b/drivers/acpi/acpica/exoparg3.c<br/>index d3091f619909..bf08110ed6d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg3.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exoparg3.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exoparg3 - AML execution - opcodes with 3 arguments</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exoparg6.c b/drivers/acpi/acpica/exoparg6.c<br/>index 1af35e143ba9..cb078e39abf7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg6.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exoparg6.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exoparg6.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exoparg6.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exoparg6 - AML execution - opcodes with 6 arguments</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exprep.c b/drivers/acpi/acpica/exprep.c<br/>index 82b1fa2d201f..1b1a006e82de 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exprep.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exprep.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exprep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exprep.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exprep - ACPI AML field prep utilities</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c<br/>index c49b9f8de723..a390a1c2b0ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exregion.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exregion.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exregion.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exregion.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exregion - ACPI default op_region (address space) handlers</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exresnte.c b/drivers/acpi/acpica/exresnte.c<br/>index 873de01b8ad2..dd83631090fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exresnte.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exresnte.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exresnte.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exresnte.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exresnte - AML Interpreter object resolution</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exresolv.c b/drivers/acpi/acpica/exresolv.c<br/>index 24a78b5e266c..4589de3f3012 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exresolv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exresolv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exresolv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exresolv.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exresolv - AML Interpreter object resolution</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exresop.c b/drivers/acpi/acpica/exresop.c<br/>index 3a437e6ace5c..782ee353a709 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exresop.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exresop.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exresop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exresop.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exresop - AML Interpreter operand/object resolution</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exserial.c b/drivers/acpi/acpica/exserial.c<br/>index 5241f4c01c76..6d2581ec22ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exserial.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exserial.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exserial.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exserial.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exserial - field_unit support for serial address spaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -201,6 +201,12 @@ acpi_ex_read_serial_bus(union acpi_operand_object *obj_desc,</div><div class='ctx'> 		function = ACPI_READ;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case ACPI_ADR_SPACE_FIXED_HARDWARE:</div><div class='add'>+</div><div class='add'>+		buffer_length = ACPI_FFH_INPUT_BUFFER_SIZE;</div><div class='add'>+		function = ACPI_READ;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		return_ACPI_STATUS(AE_AML_INVALID_SPACE_ID);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/acpi/acpica/exstore.c b/drivers/acpi/acpica/exstore.c<br/>index 575c7a39f1aa..cbc42207496d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exstore.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exstore.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exstore.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exstore.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exstore - AML Interpreter object store support</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exstoren.c b/drivers/acpi/acpica/exstoren.c<br/>index b01ae015e1b5..0470b2639831 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exstoren.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exstoren.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exstoren.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exstoren.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: exstoren - AML Interpreter object store support,</div><div class='ctx'>  *                        Store to Node (namespace object)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exstorob.c b/drivers/acpi/acpica/exstorob.c<br/>index 37c3131a82fa..5b168fbc03e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exstorob.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exstorob.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exstorob.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exstorob.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exstorob - AML object store support, store to object</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/exsystem.c b/drivers/acpi/acpica/exsystem.c<br/>index 2c384bd52b9c..7f843c9d8a06 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exsystem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exsystem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exsystem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exsystem.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exsystem - Interface to OS services</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/extrace.c b/drivers/acpi/acpica/extrace.c<br/>index f1730221ff13..d34497f3576a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/extrace.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/extrace.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/extrace.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/extrace.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: extrace - Support for interpreter execution tracing</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -149,6 +149,57 @@ acpi_ex_trace_point(acpi_trace_event_type type,</div><div class='ctx'> </div><div class='ctx'> /*******************************************************************************</div><div class='ctx'>  *</div><div class='add'>+ * FUNCTION:    acpi_ex_trace_args</div><div class='add'>+ *</div><div class='add'>+ * PARAMETERS:  params            - AML method arguments</div><div class='add'>+ *              count             - numer of method arguments</div><div class='add'>+ *</div><div class='add'>+ * RETURN:      None</div><div class='add'>+ *</div><div class='add'>+ * DESCRIPTION: Trace any arguments</div><div class='add'>+ *</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+acpi_ex_trace_args(union acpi_operand_object **params, u32 count)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	ACPI_FUNCTION_NAME(ex_trace_args);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		union acpi_operand_object *obj_desc = params[i];</div><div class='add'>+</div><div class='add'>+		if (!i) {</div><div class='add'>+			ACPI_DEBUG_PRINT((ACPI_DB_TRACE_POINT, " "));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (obj_desc-&gt;common.type) {</div><div class='add'>+		case ACPI_TYPE_INTEGER:</div><div class='add'>+			ACPI_DEBUG_PRINT_RAW((ACPI_DB_TRACE_POINT, "%llx", obj_desc-&gt;integer.value));</div><div class='add'>+			break;</div><div class='add'>+		case ACPI_TYPE_STRING:</div><div class='add'>+			if (!obj_desc-&gt;string.length) {</div><div class='add'>+				ACPI_DEBUG_PRINT_RAW((ACPI_DB_TRACE_POINT, "NULL"));</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+			if (ACPI_IS_DEBUG_ENABLED(ACPI_LV_TRACE_POINT, _COMPONENT))</div><div class='add'>+				acpi_ut_print_string(obj_desc-&gt;string.pointer, ACPI_UINT8_MAX);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ACPI_DEBUG_PRINT_RAW((ACPI_DB_TRACE_POINT, "Unknown"));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (i+1 == count) {</div><div class='add'>+			ACPI_DEBUG_PRINT_RAW((ACPI_DB_TRACE_POINT, "\n"));</div><div class='add'>+		} else {</div><div class='add'>+			ACPI_DEBUG_PRINT_RAW((ACPI_DB_TRACE_POINT, ", "));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ *</div><div class='ctx'>  * FUNCTION:    acpi_ex_start_trace_method</div><div class='ctx'>  *</div><div class='ctx'>  * PARAMETERS:  method_node         - Node of the method</div><div class='head'>diff --git a/drivers/acpi/acpica/exutils.c b/drivers/acpi/acpica/exutils.c<br/>index f4d4a033f166..cc10c0732218 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exutils.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/exutils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/exutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/exutils.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: exutils - interpreter/scanner utilities</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwacpi.c b/drivers/acpi/acpica/hwacpi.c<br/>index 790f342dcd25..a1e1fa787566 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwacpi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwacpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwacpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwacpi.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: hwacpi - ACPI Hardware Initialization/Mode Interface</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwesleep.c b/drivers/acpi/acpica/hwesleep.c<br/>index a9ba9190408b..631fd8e2b774 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwesleep.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwesleep.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwesleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwesleep.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Name: hwesleep.c - ACPI Hardware Sleep/Wake Support functions for the</div><div class='ctx'>  *                    extended FADT-V5 sleep registers.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwgpe.c b/drivers/acpi/acpica/hwgpe.c<br/>index e0c847ab8324..386f4759c317 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwgpe.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwgpe.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwgpe.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwgpe.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: hwgpe - Low level GPE enable/disable/clear functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c<br/>index e0921f08b71a..87d78bef6323 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwsleep.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwsleep.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwsleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwsleep.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Name: hwsleep.c - ACPI Hardware Sleep/Wake Support functions for the</div><div class='ctx'>  *                   original/legacy sleep/PM registers.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwtimer.c b/drivers/acpi/acpica/hwtimer.c<br/>index 192c04b5a599..a5e0bccae6a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwtimer.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwtimer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwtimer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwtimer.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: hwtimer.c - ACPI Power Management Timer Interface</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwvalid.c b/drivers/acpi/acpica/hwvalid.c<br/>index b8de458f0368..496fd9e49f0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwvalid.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwvalid.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwvalid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwvalid.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: hwvalid - I/O request validation</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c<br/>index c31f803995c6..847cd1b2493d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwxface.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwxface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwxface.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: hwxface - Public ACPICA hardware interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/hwxfsleep.c b/drivers/acpi/acpica/hwxfsleep.c<br/>index 8dbf83aeb455..9aabe30416da 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwxfsleep.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/hwxfsleep.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/hwxfsleep.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/hwxfsleep.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Name: hwxfsleep.c - ACPI Hardware Sleep/Wake External Interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsarguments.c b/drivers/acpi/acpica/nsarguments.c<br/>index 3efb46f0dc54..366d54a1d157 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsarguments.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsarguments.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsarguments.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsarguments.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsarguments - Validation of args for ACPI predefined methods</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsconvert.c b/drivers/acpi/acpica/nsconvert.c<br/>index 7e5a683ae957..f05a92b88642 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsconvert.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsconvert.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsconvert.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsconvert.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: nsconvert - Object conversions for objects returned by</div><div class='ctx'>  *                          predefined methods</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsdump.c b/drivers/acpi/acpica/nsdump.c<br/>index 90a26cb0c472..6dc20486ad51 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsdump.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsdump.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsdump.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsdump.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsdump - table dumping routines for debug</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsdumpdv.c b/drivers/acpi/acpica/nsdumpdv.c<br/>index fa116ebe49a3..d5b16aaec233 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsdumpdv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsdumpdv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsdumpdv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsdumpdv.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsdump - table dumping routines for debug</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsinit.c b/drivers/acpi/acpica/nsinit.c<br/>index 86d126fdb27d..03373e7f7978 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsinit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsinit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsinit.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsinit - namespace initialization</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsload.c b/drivers/acpi/acpica/nsload.c<br/>index fcb9de0f77a2..6ec4c646fff7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsload.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsload.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsload.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsload - namespace loading/expanding/contracting procedures</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsnames.c b/drivers/acpi/acpica/nsnames.c<br/>index d91153f65700..22aeeeb56cff 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsnames.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsnames.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsnames.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsnames.c</a></div><div class='hunk'>@@ -194,7 +194,7 @@ acpi_ns_build_normalized_path(struct acpi_namespace_node *node,</div><div class='ctx'> 			      char *full_path, u32 path_size, u8 no_trailing)</div><div class='ctx'> {</div><div class='ctx'> 	u32 length = 0, i;</div><div class='del'>-	char name[ACPI_NAMESEG_SIZE];</div><div class='add'>+	char name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;</div><div class='ctx'> 	u8 do_no_trailing;</div><div class='ctx'> 	char c, *left, *right;</div><div class='ctx'> 	struct acpi_namespace_node *next_node;</div><div class='head'>diff --git a/drivers/acpi/acpica/nsparse.c b/drivers/acpi/acpica/nsparse.c<br/>index 31e551cf4ea6..959e6379bc4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsparse.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsparse.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsparse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsparse.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsparse - namespace interface to AML parser</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nspredef.c b/drivers/acpi/acpica/nspredef.c<br/>index cf57bd69616d..81995ee48c49 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nspredef.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nspredef.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nspredef.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nspredef.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nspredef - Validation of ACPI predefined methods and objects</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsprepkg.c b/drivers/acpi/acpica/nsprepkg.c<br/>index dd37fc108fce..ca137ce5674f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsprepkg.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsprepkg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsprepkg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsprepkg.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsprepkg - Validation of package objects for predefined names</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsrepair.c b/drivers/acpi/acpica/nsrepair.c<br/>index b8657004190d..accfdcfb7e62 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsrepair.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsrepair.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsrepair.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsrepair.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nsrepair - Repair for objects returned by predefined methods</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsrepair2.c b/drivers/acpi/acpica/nsrepair2.c<br/>index 1bb7b71f07f1..8dbb870f40d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsrepair2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsrepair2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsrepair2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsrepair2.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: nsrepair2 - Repair for objects returned by specific</div><div class='ctx'>  *                          predefined methods</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -25,7 +25,7 @@ acpi_status (*acpi_repair_function) (struct acpi_evaluate_info * info,</div><div class='ctx'> 				     return_object_ptr);</div><div class='ctx'> </div><div class='ctx'> typedef struct acpi_repair_info {</div><div class='del'>-	char name[ACPI_NAMESEG_SIZE];</div><div class='add'>+	char name[ACPI_NAMESEG_SIZE] ACPI_NONSTRING;</div><div class='ctx'> 	acpi_repair_function repair_function;</div><div class='ctx'> </div><div class='ctx'> } acpi_repair_info;</div><div class='head'>diff --git a/drivers/acpi/acpica/nsutils.c b/drivers/acpi/acpica/nsutils.c<br/>index 06ffdb6808f5..49cc07e2ac5a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsutils.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsutils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsutils.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: nsutils - Utilities for accessing ACPI namespace, accessing</div><div class='ctx'>  *                        parents and siblings and Scope manipulation</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nswalk.c b/drivers/acpi/acpica/nswalk.c<br/>index eee396a77bae..a2ac06a26e92 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nswalk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nswalk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nswalk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nswalk.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: nswalk - Functions for walking the ACPI namespace</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/nsxfname.c b/drivers/acpi/acpica/nsxfname.c<br/>index 5d5bcf165298..1db831545ec8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsxfname.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/nsxfname.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/nsxfname.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/nsxfname.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'>  * Module Name: nsxfname - Public interfaces to the ACPI subsystem</div><div class='ctx'>  *                         ACPI Namespace oriented interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psargs.c b/drivers/acpi/acpica/psargs.c<br/>index 28582adfc0ac..6f6ae38ec044 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psargs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psargs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psargs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psargs.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psargs - Parse AML opcode arguments</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psloop.c b/drivers/acpi/acpica/psloop.c<br/>index d0fd55636129..c989cadf271c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psloop.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psloop.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psloop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psloop.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psloop - Main AML parse loop</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psobject.c b/drivers/acpi/acpica/psobject.c<br/>index 54471083ba54..496a1c1d5b0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psobject.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psobject.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psobject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psobject.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psobject - Support for parse objects</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -636,7 +636,8 @@ acpi_status</div><div class='ctx'> acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,</div><div class='ctx'> 			  union acpi_parse_object *op, acpi_status status)</div><div class='ctx'> {</div><div class='del'>-	acpi_status status2;</div><div class='add'>+	acpi_status return_status = status;</div><div class='add'>+	u8 ascending = TRUE;</div><div class='ctx'> </div><div class='ctx'> 	ACPI_FUNCTION_TRACE_PTR(ps_complete_final_op, walk_state);</div><div class='ctx'> </div><div class='hunk'>@@ -650,7 +651,7 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,</div><div class='ctx'> 			  op));</div><div class='ctx'> 	do {</div><div class='ctx'> 		if (op) {</div><div class='del'>-			if (walk_state-&gt;ascending_callback != NULL) {</div><div class='add'>+			if (ascending &amp;&amp; walk_state-&gt;ascending_callback != NULL) {</div><div class='ctx'> 				walk_state-&gt;op = op;</div><div class='ctx'> 				walk_state-&gt;op_info =</div><div class='ctx'> 				    acpi_ps_get_opcode_info(op-&gt;common.</div><div class='hunk'>@@ -672,49 +673,26 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				if (status == AE_CTRL_TERMINATE) {</div><div class='del'>-					status = AE_OK;</div><div class='del'>-</div><div class='del'>-					/* Clean up */</div><div class='del'>-					do {</div><div class='del'>-						if (op) {</div><div class='del'>-							status2 =</div><div class='del'>-							    acpi_ps_complete_this_op</div><div class='del'>-							    (walk_state, op);</div><div class='del'>-							if (ACPI_FAILURE</div><div class='del'>-							    (status2)) {</div><div class='del'>-								return_ACPI_STATUS</div><div class='del'>-								    (status2);</div><div class='del'>-							}</div><div class='del'>-						}</div><div class='del'>-</div><div class='del'>-						acpi_ps_pop_scope(&amp;</div><div class='del'>-								  (walk_state-&gt;</div><div class='del'>-								   parser_state),</div><div class='del'>-								  &amp;op,</div><div class='del'>-								  &amp;walk_state-&gt;</div><div class='del'>-								  arg_types,</div><div class='del'>-								  &amp;walk_state-&gt;</div><div class='del'>-								  arg_count);</div><div class='del'>-</div><div class='del'>-					} while (op);</div><div class='del'>-</div><div class='del'>-					return_ACPI_STATUS(status);</div><div class='add'>+					ascending = FALSE;</div><div class='add'>+					return_status = AE_CTRL_TERMINATE;</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				else if (ACPI_FAILURE(status)) {</div><div class='ctx'> </div><div class='ctx'> 					/* First error is most important */</div><div class='ctx'> </div><div class='del'>-					(void)</div><div class='del'>-					    acpi_ps_complete_this_op(walk_state,</div><div class='del'>-								     op);</div><div class='del'>-					return_ACPI_STATUS(status);</div><div class='add'>+					ascending = FALSE;</div><div class='add'>+					return_status = status;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			status2 = acpi_ps_complete_this_op(walk_state, op);</div><div class='del'>-			if (ACPI_FAILURE(status2)) {</div><div class='del'>-				return_ACPI_STATUS(status2);</div><div class='add'>+			status = acpi_ps_complete_this_op(walk_state, op);</div><div class='add'>+			if (ACPI_FAILURE(status)) {</div><div class='add'>+				ascending = FALSE;</div><div class='add'>+				if (ACPI_SUCCESS(return_status) ||</div><div class='add'>+				    return_status == AE_CTRL_TERMINATE) {</div><div class='add'>+					return_status = status;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -724,5 +702,5 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state,</div><div class='ctx'> </div><div class='ctx'> 	} while (op);</div><div class='ctx'> </div><div class='del'>-	return_ACPI_STATUS(status);</div><div class='add'>+	return_ACPI_STATUS(return_status);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/acpi/acpica/psopcode.c b/drivers/acpi/acpica/psopcode.c<br/>index 39e31030e5f4..bf6103986f48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psopcode.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psopcode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psopcode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psopcode.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psopcode - Parser/Interpreter opcode information table</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psopinfo.c b/drivers/acpi/acpica/psopinfo.c<br/>index bccf606e08b4..1c8044ffcb97 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psopinfo.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psopinfo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psopinfo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psopinfo.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psopinfo - AML opcode information functions and dispatch tables</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psparse.c b/drivers/acpi/acpica/psparse.c<br/>index 10a072953d78..55a416e56fd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psparse.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psparse.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psparse.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psparse.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psparse - Parser top level AML parse routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psscope.c b/drivers/acpi/acpica/psscope.c<br/>index a0035bde7556..c4e4483f0a0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psscope.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psscope.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psscope.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psscope.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psscope - Parser scope stack management routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/pstree.c b/drivers/acpi/acpica/pstree.c<br/>index 7f7f5ecd4011..5a285d3f2cdb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/pstree.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/pstree.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/pstree.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/pstree.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: pstree - Parser op tree manipulation/traversal/search</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psutils.c b/drivers/acpi/acpica/psutils.c<br/>index d550c4af4702..ada1dc304d25 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psutils.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psutils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psutils.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psutils - Parser miscellaneous utilities (Parser only)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/pswalk.c b/drivers/acpi/acpica/pswalk.c<br/>index d92817c72b8d..2f3ebcd8aebe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/pswalk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/pswalk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/pswalk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/pswalk.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: pswalk - Parser routines to walk parsed op tree(s)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/psxface.c b/drivers/acpi/acpica/psxface.c<br/>index 6f4eace0ba69..d480de075a90 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psxface.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/psxface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/psxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/psxface.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: psxface - Parser external interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/rsaddr.c b/drivers/acpi/acpica/rsaddr.c<br/>index 27384ee245f0..f92010e667cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/rsaddr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/rsaddr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/rsaddr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/rsaddr.c</a></div><div class='hunk'>@@ -272,18 +272,13 @@ u8</div><div class='ctx'> acpi_rs_get_address_common(struct acpi_resource *resource,</div><div class='ctx'> 			   union aml_resource *aml)</div><div class='ctx'> {</div><div class='del'>-	struct aml_resource_address address;</div><div class='del'>-</div><div class='ctx'> 	ACPI_FUNCTION_ENTRY();</div><div class='ctx'> </div><div class='del'>-	/* Avoid undefined behavior: member access within misaligned address */</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;address, aml, sizeof(address));</div><div class='del'>-</div><div class='ctx'> 	/* Validate the Resource Type */</div><div class='ctx'> </div><div class='del'>-	if ((address.resource_type &gt; 2) &amp;&amp;</div><div class='del'>-	    (address.resource_type &lt; 0xC0) &amp;&amp; (address.resource_type != 0x0A)) {</div><div class='add'>+	if ((aml-&gt;address.resource_type &gt; 2) &amp;&amp;</div><div class='add'>+	    (aml-&gt;address.resource_type &lt; 0xC0) &amp;&amp;</div><div class='add'>+	    (aml-&gt;address.resource_type != 0x0A)) {</div><div class='ctx'> 		return (FALSE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -304,7 +299,7 @@ acpi_rs_get_address_common(struct acpi_resource *resource,</div><div class='ctx'> 		/* Generic resource type, just grab the type_specific byte */</div><div class='ctx'> </div><div class='ctx'> 		resource-&gt;data.address.info.type_specific =</div><div class='del'>-		    address.specific_flags;</div><div class='add'>+		    aml-&gt;address.specific_flags;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return (TRUE);</div><div class='head'>diff --git a/drivers/acpi/acpica/rscalc.c b/drivers/acpi/acpica/rscalc.c<br/>index 6e7a152d6459..242daf45e20e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/rscalc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/rscalc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/rscalc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/rscalc.c</a></div><div class='hunk'>@@ -608,18 +608,12 @@ acpi_rs_get_list_length(u8 *aml_buffer,</div><div class='ctx'> </div><div class='ctx'> 		case ACPI_RESOURCE_NAME_SERIAL_BUS:{</div><div class='ctx'> </div><div class='del'>-				/* Avoid undefined behavior: member access within misaligned address */</div><div class='del'>-</div><div class='del'>-				struct aml_resource_common_serialbus</div><div class='del'>-				    common_serial_bus;</div><div class='del'>-				memcpy(&amp;common_serial_bus, aml_resource,</div><div class='del'>-				       sizeof(common_serial_bus));</div><div class='del'>-</div><div class='ctx'> 				minimum_aml_resource_length =</div><div class='ctx'> 				    acpi_gbl_resource_aml_serial_bus_sizes</div><div class='del'>-				    [common_serial_bus.type];</div><div class='add'>+				    [aml_resource-&gt;common_serial_bus.type];</div><div class='ctx'> 				extra_struct_bytes +=</div><div class='del'>-				    common_serial_bus.resource_length -</div><div class='add'>+				    aml_resource-&gt;common_serial_bus.</div><div class='add'>+				    resource_length -</div><div class='ctx'> 				    minimum_aml_resource_length;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -688,16 +682,10 @@ acpi_rs_get_list_length(u8 *aml_buffer,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (acpi_ut_get_resource_type(aml_buffer) ==</div><div class='ctx'> 		    ACPI_RESOURCE_NAME_SERIAL_BUS) {</div><div class='del'>-</div><div class='del'>-			/* Avoid undefined behavior: member access within misaligned address */</div><div class='del'>-</div><div class='del'>-			struct aml_resource_common_serialbus common_serial_bus;</div><div class='del'>-			memcpy(&amp;common_serial_bus, aml_resource,</div><div class='del'>-			       sizeof(common_serial_bus));</div><div class='del'>-</div><div class='ctx'> 			buffer_size =</div><div class='ctx'> 			    acpi_gbl_resource_struct_serial_bus_sizes</div><div class='del'>-			    [common_serial_bus.type] + extra_struct_bytes;</div><div class='add'>+			    [aml_resource-&gt;common_serial_bus.type] +</div><div class='add'>+			    extra_struct_bytes;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			buffer_size =</div><div class='ctx'> 			    acpi_gbl_resource_struct_sizes[resource_index] +</div><div class='head'>diff --git a/drivers/acpi/acpica/rslist.c b/drivers/acpi/acpica/rslist.c<br/>index 164c96e063c6..e46efaa889cd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/rslist.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/rslist.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/rslist.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/rslist.c</a></div><div class='hunk'>@@ -55,21 +55,15 @@ acpi_rs_convert_aml_to_resources(u8 * aml,</div><div class='ctx'> 	aml_resource = ACPI_CAST_PTR(union aml_resource, aml);</div><div class='ctx'> </div><div class='ctx'> 	if (acpi_ut_get_resource_type(aml) == ACPI_RESOURCE_NAME_SERIAL_BUS) {</div><div class='del'>-</div><div class='del'>-		/* Avoid undefined behavior: member access within misaligned address */</div><div class='del'>-</div><div class='del'>-		struct aml_resource_common_serialbus common_serial_bus;</div><div class='del'>-		memcpy(&amp;common_serial_bus, aml_resource,</div><div class='del'>-		       sizeof(common_serial_bus));</div><div class='del'>-</div><div class='del'>-		if (common_serial_bus.type &gt; AML_RESOURCE_MAX_SERIALBUSTYPE) {</div><div class='add'>+		if (aml_resource-&gt;common_serial_bus.type &gt;</div><div class='add'>+		    AML_RESOURCE_MAX_SERIALBUSTYPE) {</div><div class='ctx'> 			conversion_table = NULL;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* This is an I2C, SPI, UART, or CSI2 serial_bus descriptor */</div><div class='ctx'> </div><div class='ctx'> 			conversion_table =</div><div class='ctx'> 			    acpi_gbl_convert_resource_serial_bus_dispatch</div><div class='del'>-			    [common_serial_bus.type];</div><div class='add'>+			    [aml_resource-&gt;common_serial_bus.type];</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		conversion_table =</div><div class='head'>diff --git a/drivers/acpi/acpica/tbdata.c b/drivers/acpi/acpica/tbdata.c<br/>index a1f10e4409a3..5b98e09fff76 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbdata.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbdata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbdata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbdata.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbdata - Table manager data structure functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbfadt.c b/drivers/acpi/acpica/tbfadt.c<br/>index 3c126c6d306b..c6658b2f3027 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbfadt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbfadt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbfadt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbfadt.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbfadt   - FADT table utilities</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbfind.c b/drivers/acpi/acpica/tbfind.c<br/>index 1c1b2e284bd9..d71a73216380 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbfind.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbfind.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbfind.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbfind.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbfind   - find table</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -57,8 +57,8 @@ acpi_tb_find_table(char *signature,</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;header, 0, sizeof(struct acpi_table_header));</div><div class='ctx'> 	ACPI_COPY_NAMESEG(header.signature, signature);</div><div class='del'>-	strncpy(header.oem_id, oem_id, ACPI_OEM_ID_SIZE);</div><div class='del'>-	strncpy(header.oem_table_id, oem_table_id, ACPI_OEM_TABLE_ID_SIZE);</div><div class='add'>+	memcpy(header.oem_id, oem_id, ACPI_OEM_ID_SIZE);</div><div class='add'>+	memcpy(header.oem_table_id, oem_table_id, ACPI_OEM_TABLE_ID_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* Search for the table */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbinstal.c b/drivers/acpi/acpica/tbinstal.c<br/>index 0dc003c20e4d..ee9b85bc238b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbinstal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbinstal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbinstal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbinstal.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbinstal - ACPI table installation and removal</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbprint.c b/drivers/acpi/acpica/tbprint.c<br/>index 58b02e4b254b..fd64460a2e26 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbprint.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbprint.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbprint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbprint.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbprint - Table output utilities</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbutils.c b/drivers/acpi/acpica/tbutils.c<br/>index dad7425fce3f..fa64851c7b62 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbutils.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbutils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbutils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbutils.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbutils - ACPI Table utilities</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbxface.c b/drivers/acpi/acpica/tbxface.c<br/>index 275b52dc42e9..a8f07d2641b6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbxface.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbxface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbxface.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbxface - ACPI table-oriented external interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbxfload.c b/drivers/acpi/acpica/tbxfload.c<br/>index 0f2a7343de3a..2a17c60a9a39 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbxfload.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbxfload.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbxfload.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbxfload.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbxfload - Table load/unload external interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/tbxfroot.c b/drivers/acpi/acpica/tbxfroot.c<br/>index 5b413bbab338..961577ba9486 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbxfroot.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/tbxfroot.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/tbxfroot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/tbxfroot.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: tbxfroot - Find the root ACPI table (RSDT)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utaddress.c b/drivers/acpi/acpica/utaddress.c<br/>index be94d2fd99a7..c673d6c95e0a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utaddress.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utaddress.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utaddress.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utaddress.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utaddress - op_region address range check</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utalloc.c b/drivers/acpi/acpica/utalloc.c<br/>index c1fb70457e20..2418a312733a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utalloc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utalloc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utalloc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utalloc.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utalloc - local memory allocation routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utascii.c b/drivers/acpi/acpica/utascii.c<br/>index 2be37676edd7..259c28d3fecd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utascii.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utascii.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utascii.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utascii.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utascii - Utility ascii functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utbuffer.c b/drivers/acpi/acpica/utbuffer.c<br/>index b054bb5eeaf0..f6e6e98e9523 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utbuffer.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utbuffer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utbuffer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utbuffer.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utbuffer - Buffer dump routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utcache.c b/drivers/acpi/acpica/utcache.c<br/>index 85a85f7cf750..cabec193febb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utcache.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utcache.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utcache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utcache.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utcache - local cache allocation routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -251,9 +251,9 @@ void *acpi_os_acquire_object(struct acpi_memory_list *cache)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* The cache is empty, create a new object */</div><div class='ctx'> </div><div class='add'>+#ifdef ACPI_DBG_TRACK_ALLOCATIONS</div><div class='ctx'> 		ACPI_MEM_TRACKING(cache-&gt;total_allocated++);</div><div class='ctx'> </div><div class='del'>-#ifdef ACPI_DBG_TRACK_ALLOCATIONS</div><div class='ctx'> 		if ((cache-&gt;total_allocated - cache-&gt;total_freed) &gt;</div><div class='ctx'> 		    cache-&gt;max_occupied) {</div><div class='ctx'> 			cache-&gt;max_occupied =</div><div class='head'>diff --git a/drivers/acpi/acpica/utcksum.c b/drivers/acpi/acpica/utcksum.c<br/>index b483894c3629..e6f6030b3a3f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utcksum.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utcksum.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utcksum.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utcksum.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utcksum - Support generating table checksums</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utcopy.c b/drivers/acpi/acpica/utcopy.c<br/>index 2e17e657dfa4..80458e70ac2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utcopy.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utcopy.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utcopy.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utcopy.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utcopy - Internal to external object translation utilities</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utdebug.c b/drivers/acpi/acpica/utdebug.c<br/>index 3d71bd9245c7..9f197e293c7e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdebug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utdebug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdebug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utdebug.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utdebug - Debug print/trace routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utdecode.c b/drivers/acpi/acpica/utdecode.c<br/>index 95a4b7509e01..b82130d1a8bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdecode.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utdecode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdecode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utdecode.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utdecode - Utility decoding routines (value-to-string)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utdelete.c b/drivers/acpi/acpica/utdelete.c<br/>index c85bfa13ac1e..e8180099d01f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdelete.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utdelete.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utdelete.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utdelete.c</a></div><div class='hunk'>@@ -404,7 +404,7 @@ acpi_ut_update_ref_count(union acpi_operand_object *object, u32 action)</div><div class='ctx'> 				  object, object-&gt;common.type,</div><div class='ctx'> 				  acpi_ut_get_object_type_name(object),</div><div class='ctx'> 				  new_count));</div><div class='del'>-		message = "Incremement";</div><div class='add'>+		message = "Increment";</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case REF_DECREMENT:</div><div class='head'>diff --git a/drivers/acpi/acpica/uteval.c b/drivers/acpi/acpica/uteval.c<br/>index 3e5173d03953..abc6583ed369 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/uteval.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/uteval.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/uteval.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/uteval.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: uteval - Object evaluation</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utglobal.c b/drivers/acpi/acpica/utglobal.c<br/>index 820820ea8119..97c55a113bae 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utglobal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utglobal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utglobal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utglobal.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utglobal - Global variables for the ACPI subsystem</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/uthex.c b/drivers/acpi/acpica/uthex.c<br/>index e62802791dcf..8cd050e9cad5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/uthex.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/uthex.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/uthex.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/uthex.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: uthex -- Hex/ASCII support functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utids.c b/drivers/acpi/acpica/utids.c<br/>index 15c2ce91d403..eb88335dea2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utids.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utids.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utids.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utids.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utids - support for device Ids - HID, UID, CID, SUB, CLS</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utinit.c b/drivers/acpi/acpica/utinit.c<br/>index 6d78504e9fbc..4bef97e8223a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utinit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utinit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utinit.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utinit - Common ACPI subsystem initialization</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utlock.c b/drivers/acpi/acpica/utlock.c<br/>index ee6d72385c5c..123dbcbc60bc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utlock.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utlock.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utlock.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utlock.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utlock - Reader/Writer lock interfaces</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utnonansi.c b/drivers/acpi/acpica/utnonansi.c<br/>index ff0802ace19b..803e3e893825 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utnonansi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utnonansi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utnonansi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utnonansi.c</a></div><div class='hunk'>@@ -168,7 +168,7 @@ void acpi_ut_safe_strncpy(char *dest, char *source, acpi_size dest_size)</div><div class='ctx'> {</div><div class='ctx'> 	/* Always terminate destination string */</div><div class='ctx'> </div><div class='del'>-	strncpy(dest, source, dest_size);</div><div class='add'>+	memcpy(dest, source, dest_size);</div><div class='ctx'> 	dest[dest_size - 1] = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utobject.c b/drivers/acpi/acpica/utobject.c<br/>index f4aae8f0d3a8..272e46208263 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utobject.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utobject.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utobject.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utobject.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utobject - ACPI object create/delete/size/cache routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utosi.c b/drivers/acpi/acpica/utosi.c<br/>index 99b85fd6eccf..f6ac16729e42 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utosi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utosi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utosi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utosi.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utosi - Support for the _OSI predefined control method</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utpredef.c b/drivers/acpi/acpica/utpredef.c<br/>index 29d2977d0746..d9bd80e2d32a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utpredef.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utpredef.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utpredef.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utpredef.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utpredef - support functions for predefined names</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utprint.c b/drivers/acpi/acpica/utprint.c<br/>index 42b30b9f9312..423d10569736 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utprint.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utprint.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utprint.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utprint.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utprint - Formatted printing routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='hunk'>@@ -333,11 +333,8 @@ int vsnprintf(char *string, acpi_size size, const char *format, va_list args)</div><div class='ctx'> </div><div class='ctx'> 	pos = string;</div><div class='ctx'> </div><div class='del'>-	if (size != ACPI_UINT32_MAX) {</div><div class='del'>-		end = string + size;</div><div class='del'>-	} else {</div><div class='del'>-		end = ACPI_CAST_PTR(char, ACPI_UINT32_MAX);</div><div class='del'>-	}</div><div class='add'>+	size = ACPI_MIN(size, ACPI_PTR_DIFF(ACPI_MAX_PTR, string));</div><div class='add'>+	end = string + size;</div><div class='ctx'> </div><div class='ctx'> 	for (; *format; ++format) {</div><div class='ctx'> 		if (*format != '%') {</div><div class='head'>diff --git a/drivers/acpi/acpica/utresrc.c b/drivers/acpi/acpica/utresrc.c<br/>index cff7901f7866..e1cc3d348750 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utresrc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utresrc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utresrc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utresrc.c</a></div><div class='hunk'>@@ -361,20 +361,16 @@ acpi_ut_validate_resource(struct acpi_walk_state *walk_state,</div><div class='ctx'> 	aml_resource = ACPI_CAST_PTR(union aml_resource, aml);</div><div class='ctx'> 	if (resource_type == ACPI_RESOURCE_NAME_SERIAL_BUS) {</div><div class='ctx'> </div><div class='del'>-		/* Avoid undefined behavior: member access within misaligned address */</div><div class='del'>-</div><div class='del'>-		struct aml_resource_common_serialbus common_serial_bus;</div><div class='del'>-		memcpy(&amp;common_serial_bus, aml_resource,</div><div class='del'>-		       sizeof(common_serial_bus));</div><div class='del'>-</div><div class='ctx'> 		/* Validate the bus_type field */</div><div class='ctx'> </div><div class='del'>-		if ((common_serial_bus.type == 0) ||</div><div class='del'>-		    (common_serial_bus.type &gt; AML_RESOURCE_MAX_SERIALBUSTYPE)) {</div><div class='add'>+		if ((aml_resource-&gt;common_serial_bus.type == 0) ||</div><div class='add'>+		    (aml_resource-&gt;common_serial_bus.type &gt;</div><div class='add'>+		     AML_RESOURCE_MAX_SERIALBUSTYPE)) {</div><div class='ctx'> 			if (walk_state) {</div><div class='ctx'> 				ACPI_ERROR((AE_INFO,</div><div class='ctx'> 					    "Invalid/unsupported SerialBus resource descriptor: BusType 0x%2.2X",</div><div class='del'>-					    common_serial_bus.type));</div><div class='add'>+					    aml_resource-&gt;common_serial_bus.</div><div class='add'>+					    type));</div><div class='ctx'> 			}</div><div class='ctx'> 			return (AE_AML_INVALID_RESOURCE_TYPE);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/acpi/acpica/uttrack.c b/drivers/acpi/acpica/uttrack.c<br/>index f5f5da441458..a99c4c9e3d39 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/uttrack.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/uttrack.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/uttrack.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/uttrack.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: uttrack - Memory allocation tracking routines (debug only)</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utuuid.c b/drivers/acpi/acpica/utuuid.c<br/>index 8f10b413e928..0682554934ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utuuid.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utuuid.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utuuid.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utuuid.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utuuid -- UUID support functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utxface.c b/drivers/acpi/acpica/utxface.c<br/>index aa2e923462b7..56942b5f026b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utxface.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utxface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utxface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utxface.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utxface - External interfaces, miscellaneous utility functions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/acpica/utxfinit.c b/drivers/acpi/acpica/utxfinit.c<br/>index 70ae0afa7939..c1702f8fba67 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utxfinit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/acpica/utxfinit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/acpica/utxfinit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/acpica/utxfinit.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Module Name: utxfinit - External interfaces for ACPICA initialization</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2000 - 2023, Intel Corp.</div><div class='add'>+ * Copyright (C) 2000 - 2025, Intel Corp.</div><div class='ctx'>  *</div><div class='ctx'>  *****************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/apei/Kconfig b/drivers/acpi/apei/Kconfig<br/>index 3cfe7e7475f2..070c07d68dfb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/apei/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/apei/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/apei/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/apei/Kconfig</a></div><div class='hunk'>@@ -23,6 +23,7 @@ config ACPI_APEI_GHES</div><div class='ctx'> 	select ACPI_HED</div><div class='ctx'> 	select IRQ_WORK</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='add'>+	select ARM_SDE_INTERFACE if ARM64</div><div class='ctx'> 	help</div><div class='ctx'> 	  Generic Hardware Error Source provides a way to report</div><div class='ctx'> 	  platform hardware errors (such as that from chipset). It</div><div class='head'>diff --git a/drivers/acpi/apei/einj-core.c b/drivers/acpi/apei/einj-core.c<br/>index 04731a5b01fa..ca3484dac5c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/apei/einj-core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/apei/einj-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/apei/einj-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/apei/einj-core.c</a></div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'> #include &lt;linux/nmi.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/device/faux.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "apei-internal.h"</div><div class='hunk'>@@ -83,6 +83,8 @@ static struct debugfs_blob_wrapper vendor_blob;</div><div class='ctx'> static struct debugfs_blob_wrapper vendor_errors;</div><div class='ctx'> static char vendor_dev[64];</div><div class='ctx'> </div><div class='add'>+static u32 available_error_type;</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Some BIOSes allow parameters to the SET_ERROR_TYPE entries in the</div><div class='ctx'>  * EINJ table through an unpublished extension. Use with caution as</div><div class='hunk'>@@ -648,14 +650,9 @@ static struct { u32 mask; const char *str; } const einj_error_type_string[] = {</div><div class='ctx'> </div><div class='ctx'> static int available_error_type_show(struct seq_file *m, void *v)</div><div class='ctx'> {</div><div class='del'>-	int rc;</div><div class='del'>-	u32 error_type = 0;</div><div class='ctx'> </div><div class='del'>-	rc = einj_get_available_error_type(&amp;error_type);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='ctx'> 	for (int pos = 0; pos &lt; ARRAY_SIZE(einj_error_type_string); pos++)</div><div class='del'>-		if (error_type &amp; einj_error_type_string[pos].mask)</div><div class='add'>+		if (available_error_type &amp; einj_error_type_string[pos].mask)</div><div class='ctx'> 			seq_printf(m, "0x%08x\t%s\n", einj_error_type_string[pos].mask,</div><div class='ctx'> 				   einj_error_type_string[pos].str);</div><div class='ctx'> </div><div class='hunk'>@@ -678,8 +675,7 @@ bool einj_is_cxl_error_type(u64 type)</div><div class='ctx'> </div><div class='ctx'> int einj_validate_error_type(u64 type)</div><div class='ctx'> {</div><div class='del'>-	u32 tval, vendor, available_error_type = 0;</div><div class='del'>-	int rc;</div><div class='add'>+	u32 tval, vendor;</div><div class='ctx'> </div><div class='ctx'> 	/* Only low 32 bits for error type are valid */</div><div class='ctx'> 	if (type &amp; GENMASK_ULL(63, 32))</div><div class='hunk'>@@ -695,13 +691,9 @@ int einj_validate_error_type(u64 type)</div><div class='ctx'> 	/* Only one error type can be specified */</div><div class='ctx'> 	if (tval &amp; (tval - 1))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (!vendor) {</div><div class='del'>-		rc = einj_get_available_error_type(&amp;available_error_type);</div><div class='del'>-		if (rc)</div><div class='del'>-			return rc;</div><div class='add'>+	if (!vendor)</div><div class='ctx'> 		if (!(type &amp; available_error_type))</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -749,17 +741,12 @@ static int einj_check_table(struct acpi_table_einj *einj_tab)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init einj_probe(struct platform_device *pdev)</div><div class='add'>+static int __init einj_probe(struct faux_device *fdev)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	acpi_status status;</div><div class='ctx'> 	struct apei_exec_context ctx;</div><div class='ctx'> </div><div class='del'>-	if (acpi_disabled) {</div><div class='del'>-		pr_debug("ACPI disabled.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	status = acpi_get_table(ACPI_SIG_EINJ, 0,</div><div class='ctx'> 				(struct acpi_table_header **)&amp;einj_tab);</div><div class='ctx'> 	if (status == AE_NOT_FOUND) {</div><div class='hunk'>@@ -777,6 +764,10 @@ static int __init einj_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_put_table;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rc = einj_get_available_error_type(&amp;available_error_type);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='ctx'> 	rc = -ENOMEM;</div><div class='ctx'> 	einj_debug_dir = debugfs_create_dir("einj", apei_get_debugfs_dir());</div><div class='ctx'> </div><div class='hunk'>@@ -851,7 +842,7 @@ err_put_table:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __exit einj_remove(struct platform_device *pdev)</div><div class='add'>+static void __exit einj_remove(struct faux_device *fdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct apei_exec_context ctx;</div><div class='ctx'> </div><div class='hunk'>@@ -872,34 +863,30 @@ static void __exit einj_remove(struct platform_device *pdev)</div><div class='ctx'> 	acpi_put_table((struct acpi_table_header *)einj_tab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct platform_device *einj_dev;</div><div class='add'>+static struct faux_device *einj_dev;</div><div class='ctx'> /*</div><div class='ctx'>  * einj_remove() lives in .exit.text. For drivers registered via</div><div class='ctx'>  * platform_driver_probe() this is ok because they cannot get unbound at</div><div class='ctx'>  * runtime. So mark the driver struct with __refdata to prevent modpost</div><div class='ctx'>  * triggering a section mismatch warning.</div><div class='ctx'>  */</div><div class='del'>-static struct platform_driver einj_driver __refdata = {</div><div class='add'>+static struct faux_device_ops einj_device_ops __refdata = {</div><div class='add'>+	.probe = einj_probe,</div><div class='ctx'> 	.remove = __exit_p(einj_remove),</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "acpi-einj",</div><div class='del'>-	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init einj_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct platform_device_info einj_dev_info = {</div><div class='del'>-		.name = "acpi-einj",</div><div class='del'>-		.id = -1,</div><div class='del'>-	};</div><div class='del'>-	int rc;</div><div class='add'>+	if (acpi_disabled) {</div><div class='add'>+		pr_debug("ACPI disabled.\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	einj_dev = platform_device_register_full(&amp;einj_dev_info);</div><div class='del'>-	if (IS_ERR(einj_dev))</div><div class='del'>-		return PTR_ERR(einj_dev);</div><div class='add'>+	einj_dev = faux_device_create("acpi-einj", NULL, &amp;einj_device_ops);</div><div class='add'>+	if (!einj_dev)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	rc = platform_driver_probe(&amp;einj_driver, einj_probe);</div><div class='del'>-	einj_initialized = rc == 0;</div><div class='add'>+	einj_initialized = true;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -907,9 +894,8 @@ static int __init einj_init(void)</div><div class='ctx'> static void __exit einj_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (einj_initialized)</div><div class='del'>-		platform_driver_unregister(&amp;einj_driver);</div><div class='add'>+		faux_device_destroy(einj_dev);</div><div class='ctx'> </div><div class='del'>-	platform_device_unregister(einj_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(einj_init);</div><div class='head'>diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c<br/>index 289e365f84b2..0f3c663c1b0a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/apei/ghes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/apei/ghes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/apei/ghes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/apei/ghes.c</a></div><div class='hunk'>@@ -1715,7 +1715,7 @@ void __init acpi_ghes_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	sdei_init();</div><div class='add'>+	acpi_sdei_init();</div><div class='ctx'> </div><div class='ctx'> 	if (acpi_disabled)</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c<br/>index 6760330a8af5..45593612a4db 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/battery.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/battery.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/battery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/battery.c</a></div><div class='hunk'>@@ -243,10 +243,23 @@ static int acpi_battery_get_property(struct power_supply *psy,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case POWER_SUPPLY_PROP_CURRENT_NOW:</div><div class='ctx'> 	case POWER_SUPPLY_PROP_POWER_NOW:</div><div class='del'>-		if (battery-&gt;rate_now == ACPI_BATTERY_VALUE_UNKNOWN)</div><div class='add'>+		if (battery-&gt;rate_now == ACPI_BATTERY_VALUE_UNKNOWN) {</div><div class='ctx'> 			ret = -ENODEV;</div><div class='del'>-		else</div><div class='del'>-			val-&gt;intval = battery-&gt;rate_now * 1000;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		val-&gt;intval = battery-&gt;rate_now * 1000;</div><div class='add'>+		/*</div><div class='add'>+		 * When discharging, the current should be reported as a</div><div class='add'>+		 * negative number as per the power supply class interface</div><div class='add'>+		 * definition.</div><div class='add'>+		 */</div><div class='add'>+		if (psp == POWER_SUPPLY_PROP_CURRENT_NOW &amp;&amp;</div><div class='add'>+		    (battery-&gt;state &amp; ACPI_BATTERY_STATE_DISCHARGING) &amp;&amp;</div><div class='add'>+		    acpi_battery_handle_discharging(battery)</div><div class='add'>+				== POWER_SUPPLY_STATUS_DISCHARGING)</div><div class='add'>+			val-&gt;intval = -val-&gt;intval;</div><div class='add'>+</div><div class='ctx'> 		break;</div><div class='ctx'> 	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:</div><div class='ctx'> 	case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:</div><div class='hunk'>@@ -279,8 +292,8 @@ static int acpi_battery_get_property(struct power_supply *psy,</div><div class='ctx'> 		    full_capacity == ACPI_BATTERY_VALUE_UNKNOWN)</div><div class='ctx'> 			ret = -ENODEV;</div><div class='ctx'> 		else</div><div class='del'>-			val-&gt;intval = battery-&gt;capacity_now * 100/</div><div class='del'>-					full_capacity;</div><div class='add'>+			val-&gt;intval = DIV_ROUND_CLOSEST_ULL(battery-&gt;capacity_now * 100ULL,</div><div class='add'>+					full_capacity);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case POWER_SUPPLY_PROP_CAPACITY_LEVEL:</div><div class='ctx'> 		if (battery-&gt;state &amp; ACPI_BATTERY_STATE_CRITICAL)</div><div class='head'>diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c<br/>index 058910af82bc..c2ab2783303f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/bus.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/bus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/bus.c</a></div><div class='hunk'>@@ -1446,8 +1446,10 @@ static int __init acpi_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	acpi_kobj = kobject_create_and_add("acpi", firmware_kobj);</div><div class='del'>-	if (!acpi_kobj)</div><div class='del'>-		pr_debug("%s: kset create error\n", __func__);</div><div class='add'>+	if (!acpi_kobj) {</div><div class='add'>+		pr_err("Failed to register kobject\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	init_prmt();</div><div class='ctx'> 	acpi_init_pcc();</div><div class='head'>diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c<br/>index 90b09840536d..0a7026040188 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/button.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/button.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/button.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/button.c</a></div><div class='hunk'>@@ -458,7 +458,7 @@ static void acpi_button_notify(acpi_handle handle, u32 event, void *data)</div><div class='ctx'> 	acpi_pm_wakeup_event(&amp;device-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	button = acpi_driver_data(device);</div><div class='del'>-	if (button-&gt;suspended)</div><div class='add'>+	if (button-&gt;suspended || event == ACPI_BUTTON_NOTIFY_WAKE)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	input = button-&gt;input;</div><div class='head'>diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c<br/>index f193e713825a..a9ae2fd62863 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/cppc_acpi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/cppc_acpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/cppc_acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/cppc_acpi.c</a></div><div class='hunk'>@@ -47,7 +47,6 @@</div><div class='ctx'> </div><div class='ctx'> struct cppc_pcc_data {</div><div class='ctx'> 	struct pcc_mbox_chan *pcc_channel;</div><div class='del'>-	void __iomem *pcc_comm_addr;</div><div class='ctx'> 	bool pcc_channel_acquired;</div><div class='ctx'> 	unsigned int deadline_us;</div><div class='ctx'> 	unsigned int pcc_mpar, pcc_mrtt, pcc_nominal;</div><div class='hunk'>@@ -95,7 +94,7 @@ static DEFINE_PER_CPU(int, cpu_pcc_subspace_idx);</div><div class='ctx'> static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr);</div><div class='ctx'> </div><div class='ctx'> /* pcc mapped address + header size + offset within PCC subspace */</div><div class='del'>-#define GET_PCC_VADDR(offs, pcc_ss_id) (pcc_data[pcc_ss_id]-&gt;pcc_comm_addr + \</div><div class='add'>+#define GET_PCC_VADDR(offs, pcc_ss_id) (pcc_data[pcc_ss_id]-&gt;pcc_channel-&gt;shmem + \</div><div class='ctx'> 						0x8 + (offs))</div><div class='ctx'> </div><div class='ctx'> /* Check if a CPC register is in PCC */</div><div class='hunk'>@@ -129,6 +128,20 @@ static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr);</div><div class='ctx'> #define CPC_SUPPORTED(cpc) ((cpc)-&gt;type == ACPI_TYPE_INTEGER ?		\</div><div class='ctx'> 				!!(cpc)-&gt;cpc_entry.int_value :		\</div><div class='ctx'> 				!IS_NULL_REG(&amp;(cpc)-&gt;cpc_entry.reg))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Each bit indicates the optionality of the register in per-cpu</div><div class='add'>+ * cpc_regs[] with the corresponding index. 0 means mandatory and 1</div><div class='add'>+ * means optional.</div><div class='add'>+ */</div><div class='add'>+#define REG_OPTIONAL (0x1FC7D0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Use the index of the register in per-cpu cpc_regs[] to check if</div><div class='add'>+ * it's an optional one.</div><div class='add'>+ */</div><div class='add'>+#define IS_OPTIONAL_CPC_REG(reg_idx) (REG_OPTIONAL &amp; (1U &lt;&lt; (reg_idx)))</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Arbitrary Retries in case the remote processor is slow to respond</div><div class='ctx'>  * to PCC commands. Keeping it high enough to cover emulators where</div><div class='hunk'>@@ -223,7 +236,7 @@ static int check_pcc_chan(int pcc_ss_id, bool chk_err_bit)</div><div class='ctx'> 	int ret, status;</div><div class='ctx'> 	struct cppc_pcc_data *pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='ctx'> 	struct acpi_pcct_shared_memory __iomem *generic_comm_base =</div><div class='del'>-		pcc_ss_data-&gt;pcc_comm_addr;</div><div class='add'>+					pcc_ss_data-&gt;pcc_channel-&gt;shmem;</div><div class='ctx'> </div><div class='ctx'> 	if (!pcc_ss_data-&gt;platform_owns_pcc)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -258,7 +271,7 @@ static int send_pcc_cmd(int pcc_ss_id, u16 cmd)</div><div class='ctx'> 	int ret = -EIO, i;</div><div class='ctx'> 	struct cppc_pcc_data *pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='ctx'> 	struct acpi_pcct_shared_memory __iomem *generic_comm_base =</div><div class='del'>-		pcc_ss_data-&gt;pcc_comm_addr;</div><div class='add'>+					pcc_ss_data-&gt;pcc_channel-&gt;shmem;</div><div class='ctx'> 	unsigned int time_delta;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -571,15 +584,6 @@ static int register_pcc_channel(int pcc_ss_idx)</div><div class='ctx'> 		pcc_data[pcc_ss_idx]-&gt;pcc_mpar = pcc_chan-&gt;max_access_rate;</div><div class='ctx'> 		pcc_data[pcc_ss_idx]-&gt;pcc_nominal = pcc_chan-&gt;latency;</div><div class='ctx'> </div><div class='del'>-		pcc_data[pcc_ss_idx]-&gt;pcc_comm_addr =</div><div class='del'>-			acpi_os_ioremap(pcc_chan-&gt;shmem_base_addr,</div><div class='del'>-					pcc_chan-&gt;shmem_size);</div><div class='del'>-		if (!pcc_data[pcc_ss_idx]-&gt;pcc_comm_addr) {</div><div class='del'>-			pr_err("Failed to ioremap PCC comm region mem for %d\n",</div><div class='del'>-			       pcc_ss_idx);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		/* Set flag so that we don't come here for each CPU. */</div><div class='ctx'> 		pcc_data[pcc_ss_idx]-&gt;pcc_channel_acquired = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1175,43 +1179,106 @@ static int cpc_write(int cpu, struct cpc_register_resource *reg_res, u64 val)</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cppc_get_perf(int cpunum, enum cppc_regs reg_idx, u64 *perf)</div><div class='add'>+static int cppc_get_reg_val_in_pcc(int cpu, struct cpc_register_resource *reg, u64 *val)</div><div class='ctx'> {</div><div class='del'>-	struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);</div><div class='add'>+	int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);</div><div class='add'>+	struct cppc_pcc_data *pcc_ss_data = NULL;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pcc_ss_id &lt; 0) {</div><div class='add'>+		pr_debug("Invalid pcc_ss_id\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='add'>+</div><div class='add'>+	down_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+</div><div class='add'>+	if (send_pcc_cmd(pcc_ss_id, CMD_READ) &gt;= 0)</div><div class='add'>+		ret = cpc_read(cpu, reg, val);</div><div class='add'>+	else</div><div class='add'>+		ret = -EIO;</div><div class='add'>+</div><div class='add'>+	up_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cppc_get_reg_val(int cpu, enum cppc_regs reg_idx, u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);</div><div class='ctx'> 	struct cpc_register_resource *reg;</div><div class='ctx'> </div><div class='add'>+	if (val == NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (!cpc_desc) {</div><div class='del'>-		pr_debug("No CPC descriptor for CPU:%d\n", cpunum);</div><div class='add'>+		pr_debug("No CPC descriptor for CPU:%d\n", cpu);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	reg = &amp;cpc_desc-&gt;cpc_regs[reg_idx];</div><div class='ctx'> </div><div class='del'>-	if (CPC_IN_PCC(reg)) {</div><div class='del'>-		int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpunum);</div><div class='del'>-		struct cppc_pcc_data *pcc_ss_data = NULL;</div><div class='del'>-		int ret = 0;</div><div class='add'>+	if ((reg-&gt;type == ACPI_TYPE_INTEGER &amp;&amp; IS_OPTIONAL_CPC_REG(reg_idx) &amp;&amp;</div><div class='add'>+	     !reg-&gt;cpc_entry.int_value) || (reg-&gt;type != ACPI_TYPE_INTEGER &amp;&amp;</div><div class='add'>+	     IS_NULL_REG(&amp;reg-&gt;cpc_entry.reg))) {</div><div class='add'>+		pr_debug("CPC register is not supported\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (pcc_ss_id &lt; 0)</div><div class='del'>-			return -EIO;</div><div class='add'>+	if (CPC_IN_PCC(reg))</div><div class='add'>+		return cppc_get_reg_val_in_pcc(cpu, reg, val);</div><div class='ctx'> </div><div class='del'>-		pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='del'>-</div><div class='del'>-		down_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+	return cpc_read(cpu, reg, val);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (send_pcc_cmd(pcc_ss_id, CMD_READ) &gt;= 0)</div><div class='del'>-			cpc_read(cpunum, reg, perf);</div><div class='del'>-		else</div><div class='del'>-			ret = -EIO;</div><div class='add'>+static int cppc_set_reg_val_in_pcc(int cpu, struct cpc_register_resource *reg, u64 val)</div><div class='add'>+{</div><div class='add'>+	int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);</div><div class='add'>+	struct cppc_pcc_data *pcc_ss_data = NULL;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-		up_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+	if (pcc_ss_id &lt; 0) {</div><div class='add'>+		pr_debug("Invalid pcc_ss_id\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	ret = cpc_write(cpu, reg, val);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+</div><div class='add'>+	pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='add'>+</div><div class='add'>+	down_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+	/* after writing CPC, transfer the ownership of PCC to platform */</div><div class='add'>+	ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);</div><div class='add'>+	up_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cppc_set_reg_val(int cpu, enum cppc_regs reg_idx, u64 val)</div><div class='add'>+{</div><div class='add'>+	struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);</div><div class='add'>+	struct cpc_register_resource *reg;</div><div class='add'>+</div><div class='add'>+	if (!cpc_desc) {</div><div class='add'>+		pr_debug("No CPC descriptor for CPU:%d\n", cpu);</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cpc_read(cpunum, reg, perf);</div><div class='add'>+	reg = &amp;cpc_desc-&gt;cpc_regs[reg_idx];</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* if a register is writeable, it must be a buffer and not null */</div><div class='add'>+	if ((reg-&gt;type != ACPI_TYPE_BUFFER) || IS_NULL_REG(&amp;reg-&gt;cpc_entry.reg)) {</div><div class='add'>+		pr_debug("CPC register is not supported\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (CPC_IN_PCC(reg))</div><div class='add'>+		return cppc_set_reg_val_in_pcc(cpu, reg, val);</div><div class='add'>+</div><div class='add'>+	return cpc_write(cpu, reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1223,7 +1290,7 @@ static int cppc_get_perf(int cpunum, enum cppc_regs reg_idx, u64 *perf)</div><div class='ctx'>  */</div><div class='ctx'> int cppc_get_desired_perf(int cpunum, u64 *desired_perf)</div><div class='ctx'> {</div><div class='del'>-	return cppc_get_perf(cpunum, DESIRED_PERF, desired_perf);</div><div class='add'>+	return cppc_get_reg_val(cpunum, DESIRED_PERF, desired_perf);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cppc_get_desired_perf);</div><div class='ctx'> </div><div class='hunk'>@@ -1236,7 +1303,7 @@ EXPORT_SYMBOL_GPL(cppc_get_desired_perf);</div><div class='ctx'>  */</div><div class='ctx'> int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)</div><div class='ctx'> {</div><div class='del'>-	return cppc_get_perf(cpunum, NOMINAL_PERF, nominal_perf);</div><div class='add'>+	return cppc_get_reg_val(cpunum, NOMINAL_PERF, nominal_perf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1248,7 +1315,7 @@ int cppc_get_nominal_perf(int cpunum, u64 *nominal_perf)</div><div class='ctx'>  */</div><div class='ctx'> int cppc_get_highest_perf(int cpunum, u64 *highest_perf)</div><div class='ctx'> {</div><div class='del'>-	return cppc_get_perf(cpunum, HIGHEST_PERF, highest_perf);</div><div class='add'>+	return cppc_get_reg_val(cpunum, HIGHEST_PERF, highest_perf);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cppc_get_highest_perf);</div><div class='ctx'> </div><div class='hunk'>@@ -1261,7 +1328,7 @@ EXPORT_SYMBOL_GPL(cppc_get_highest_perf);</div><div class='ctx'>  */</div><div class='ctx'> int cppc_get_epp_perf(int cpunum, u64 *epp_perf)</div><div class='ctx'> {</div><div class='del'>-	return cppc_get_perf(cpunum, ENERGY_PERF, epp_perf);</div><div class='add'>+	return cppc_get_reg_val(cpunum, ENERGY_PERF, epp_perf);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cppc_get_epp_perf);</div><div class='ctx'> </div><div class='hunk'>@@ -1535,53 +1602,110 @@ int cppc_set_epp_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls, bool enable)</div><div class='ctx'> EXPORT_SYMBOL_GPL(cppc_set_epp_perf);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * cppc_get_auto_sel_caps - Read autonomous selection register.</div><div class='del'>- * @cpunum : CPU from which to read register.</div><div class='del'>- * @perf_caps : struct where autonomous selection register value is updated.</div><div class='add'>+ * cppc_set_epp() - Write the EPP register.</div><div class='add'>+ * @cpu: CPU on which to write register.</div><div class='add'>+ * @epp_val: Value to write to the EPP register.</div><div class='ctx'>  */</div><div class='del'>-int cppc_get_auto_sel_caps(int cpunum, struct cppc_perf_caps *perf_caps)</div><div class='add'>+int cppc_set_epp(int cpu, u64 epp_val)</div><div class='ctx'> {</div><div class='del'>-	struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);</div><div class='del'>-	struct cpc_register_resource *auto_sel_reg;</div><div class='del'>-	u64  auto_sel;</div><div class='add'>+	if (epp_val &gt; CPPC_ENERGY_PERF_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!cpc_desc) {</div><div class='del'>-		pr_debug("No CPC descriptor for CPU:%d\n", cpunum);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+	return cppc_set_reg_val(cpu, ENERGY_PERF, epp_val);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cppc_set_epp);</div><div class='ctx'> </div><div class='del'>-	auto_sel_reg = &amp;cpc_desc-&gt;cpc_regs[AUTO_SEL_ENABLE];</div><div class='add'>+/**</div><div class='add'>+ * cppc_get_auto_act_window() - Read autonomous activity window register.</div><div class='add'>+ * @cpu: CPU from which to read register.</div><div class='add'>+ * @auto_act_window: Return address.</div><div class='add'>+ *</div><div class='add'>+ * According to ACPI 6.5, s8.4.6.1.6, the value read from the autonomous</div><div class='add'>+ * activity window register consists of two parts: a 7 bits value indicate</div><div class='add'>+ * significand and a 3 bits value indicate exponent.</div><div class='add'>+ */</div><div class='add'>+int cppc_get_auto_act_window(int cpu, u64 *auto_act_window)</div><div class='add'>+{</div><div class='add'>+	unsigned int exp;</div><div class='add'>+	u64 val, sig;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!CPC_SUPPORTED(auto_sel_reg))</div><div class='del'>-		pr_warn_once("Autonomous mode is not unsupported!\n");</div><div class='add'>+	if (auto_act_window == NULL)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (CPC_IN_PCC(auto_sel_reg)) {</div><div class='del'>-		int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpunum);</div><div class='del'>-		struct cppc_pcc_data *pcc_ss_data = NULL;</div><div class='del'>-		int ret = 0;</div><div class='add'>+	ret = cppc_get_reg_val(cpu, AUTO_ACT_WINDOW, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-		if (pcc_ss_id &lt; 0)</div><div class='del'>-			return -ENODEV;</div><div class='add'>+	sig = val &amp; CPPC_AUTO_ACT_WINDOW_MAX_SIG;</div><div class='add'>+	exp = (val &gt;&gt; CPPC_AUTO_ACT_WINDOW_SIG_BIT_SIZE) &amp; CPPC_AUTO_ACT_WINDOW_MAX_EXP;</div><div class='add'>+	*auto_act_window = sig * int_pow(10, exp);</div><div class='ctx'> </div><div class='del'>-		pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cppc_get_auto_act_window);</div><div class='ctx'> </div><div class='del'>-		down_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+/**</div><div class='add'>+ * cppc_set_auto_act_window() - Write autonomous activity window register.</div><div class='add'>+ * @cpu: CPU on which to write register.</div><div class='add'>+ * @auto_act_window: usec value to write to the autonomous activity window register.</div><div class='add'>+ *</div><div class='add'>+ * According to ACPI 6.5, s8.4.6.1.6, the value to write to the autonomous</div><div class='add'>+ * activity window register consists of two parts: a 7 bits value indicate</div><div class='add'>+ * significand and a 3 bits value indicate exponent.</div><div class='add'>+ */</div><div class='add'>+int cppc_set_auto_act_window(int cpu, u64 auto_act_window)</div><div class='add'>+{</div><div class='add'>+	/* The max value to store is 1270000000 */</div><div class='add'>+	u64 max_val = CPPC_AUTO_ACT_WINDOW_MAX_SIG * int_pow(10, CPPC_AUTO_ACT_WINDOW_MAX_EXP);</div><div class='add'>+	int exp = 0;</div><div class='add'>+	u64 val;</div><div class='ctx'> </div><div class='del'>-		if (send_pcc_cmd(pcc_ss_id, CMD_READ) &gt;= 0) {</div><div class='del'>-			cpc_read(cpunum, auto_sel_reg, &amp;auto_sel);</div><div class='del'>-			perf_caps-&gt;auto_sel = (bool)auto_sel;</div><div class='del'>-		} else {</div><div class='del'>-			ret = -EIO;</div><div class='del'>-		}</div><div class='add'>+	if (auto_act_window &gt; max_val)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		up_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='add'>+	/*</div><div class='add'>+	 * The max significand is 127, when auto_act_window is larger than</div><div class='add'>+	 * 129, discard the precision of the last digit and increase the</div><div class='add'>+	 * exponent by 1.</div><div class='add'>+	 */</div><div class='add'>+	while (auto_act_window &gt; CPPC_AUTO_ACT_WINDOW_SIG_CARRY_THRESH) {</div><div class='add'>+		auto_act_window /= 10;</div><div class='add'>+		exp += 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For 128 and 129, cut it to 127. */</div><div class='add'>+	if (auto_act_window &gt; CPPC_AUTO_ACT_WINDOW_MAX_SIG)</div><div class='add'>+		auto_act_window = CPPC_AUTO_ACT_WINDOW_MAX_SIG;</div><div class='add'>+</div><div class='add'>+	val = (exp &lt;&lt; CPPC_AUTO_ACT_WINDOW_SIG_BIT_SIZE) + auto_act_window;</div><div class='ctx'> </div><div class='add'>+	return cppc_set_reg_val(cpu, AUTO_ACT_WINDOW, val);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(cppc_set_auto_act_window);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * cppc_get_auto_sel() - Read autonomous selection register.</div><div class='add'>+ * @cpu: CPU from which to read register.</div><div class='add'>+ * @enable: Return address.</div><div class='add'>+ */</div><div class='add'>+int cppc_get_auto_sel(int cpu, bool *enable)</div><div class='add'>+{</div><div class='add'>+	u64 auto_sel;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (enable == NULL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = cppc_get_reg_val(cpu, AUTO_SEL_ENABLE, &amp;auto_sel);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	*enable = (bool)auto_sel;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(cppc_get_auto_sel_caps);</div><div class='add'>+EXPORT_SYMBOL_GPL(cppc_get_auto_sel);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * cppc_set_auto_sel - Write autonomous selection register.</div><div class='hunk'>@@ -1590,43 +1714,7 @@ EXPORT_SYMBOL_GPL(cppc_get_auto_sel_caps);</div><div class='ctx'>  */</div><div class='ctx'> int cppc_set_auto_sel(int cpu, bool enable)</div><div class='ctx'> {</div><div class='del'>-	int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);</div><div class='del'>-	struct cpc_register_resource *auto_sel_reg;</div><div class='del'>-	struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);</div><div class='del'>-	struct cppc_pcc_data *pcc_ss_data = NULL;</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!cpc_desc) {</div><div class='del'>-		pr_debug("No CPC descriptor for CPU:%d\n", cpu);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	auto_sel_reg = &amp;cpc_desc-&gt;cpc_regs[AUTO_SEL_ENABLE];</div><div class='del'>-</div><div class='del'>-	if (CPC_IN_PCC(auto_sel_reg)) {</div><div class='del'>-		if (pcc_ss_id &lt; 0) {</div><div class='del'>-			pr_debug("Invalid pcc_ss_id\n");</div><div class='del'>-			return -ENODEV;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (CPC_SUPPORTED(auto_sel_reg)) {</div><div class='del'>-			ret = cpc_write(cpu, auto_sel_reg, enable);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='del'>-</div><div class='del'>-		down_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='del'>-		/* after writing CPC, transfer the ownership of PCC to platform */</div><div class='del'>-		ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);</div><div class='del'>-		up_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='del'>-	} else {</div><div class='del'>-		ret = -ENOTSUPP;</div><div class='del'>-		pr_debug("_CPC in PCC is not supported\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return cppc_set_reg_val(cpu, AUTO_SEL_ENABLE, enable);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cppc_set_auto_sel);</div><div class='ctx'> </div><div class='hunk'>@@ -1640,38 +1728,7 @@ EXPORT_SYMBOL_GPL(cppc_set_auto_sel);</div><div class='ctx'>  */</div><div class='ctx'> int cppc_set_enable(int cpu, bool enable)</div><div class='ctx'> {</div><div class='del'>-	int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu);</div><div class='del'>-	struct cpc_register_resource *enable_reg;</div><div class='del'>-	struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);</div><div class='del'>-	struct cppc_pcc_data *pcc_ss_data = NULL;</div><div class='del'>-	int ret = -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!cpc_desc) {</div><div class='del'>-		pr_debug("No CPC descriptor for CPU:%d\n", cpu);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	enable_reg = &amp;cpc_desc-&gt;cpc_regs[ENABLE];</div><div class='del'>-</div><div class='del'>-	if (CPC_IN_PCC(enable_reg)) {</div><div class='del'>-</div><div class='del'>-		if (pcc_ss_id &lt; 0)</div><div class='del'>-			return -EIO;</div><div class='del'>-</div><div class='del'>-		ret = cpc_write(cpu, enable_reg, enable);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		pcc_ss_data = pcc_data[pcc_ss_id];</div><div class='del'>-</div><div class='del'>-		down_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='del'>-		/* after writing CPC, transfer the ownership of PCC to platfrom */</div><div class='del'>-		ret = send_pcc_cmd(pcc_ss_id, CMD_WRITE);</div><div class='del'>-		up_write(&amp;pcc_ss_data-&gt;pcc_lock);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return cpc_write(cpu, enable_reg, enable);</div><div class='add'>+	return cppc_set_reg_val(cpu, ENABLE, enable);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cppc_set_enable);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c<br/>index 8db09d81918f..6f4203716b53 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/ec.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/ec.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/ec.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/ec.c</a></div><div class='hunk'>@@ -2301,6 +2301,40 @@ static const struct dmi_system_id acpi_ec_no_wakeup[] = {</div><div class='ctx'> 			DMI_MATCH(DMI_PRODUCT_FAMILY, "103C_5336AN HP ZHAN 66 Pro"),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	/*</div><div class='add'>+	 * Lenovo Legion Go S; touchscreen blocks HW sleep when woken up from EC</div><div class='add'>+	 * https://gitlab.freedesktop.org/drm/amd/-/issues/3929</div><div class='add'>+	 */</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "83L3"),</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "83N6"),</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "83Q2"),</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "83Q3"),</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		// TUXEDO InfinityBook Pro AMD Gen9</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "GXxHRXx"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/osi.c b/drivers/acpi/osi.c<br/>index df9328c850bd..f2c943b934be 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/osi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/osi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/osi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/osi.c</a></div><div class='hunk'>@@ -42,7 +42,6 @@ static struct acpi_osi_entry</div><div class='ctx'> osi_setup_entries[OSI_STRING_ENTRIES_MAX] __initdata = {</div><div class='ctx'> 	{"Module Device", true},</div><div class='ctx'> 	{"Processor Device", true},</div><div class='del'>-	{"3.0 _SCP Extensions", true},</div><div class='ctx'> 	{"Processor Aggregator Device", true},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c<br/>index d0b6a024daae..74ade4160314 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/pci_root.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/pci_root.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/pci_root.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/pci_root.c</a></div><div class='hunk'>@@ -858,7 +858,7 @@ next:</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,</div><div class='add'>+static void acpi_pci_root_remap_iospace(const struct fwnode_handle *fwnode,</div><div class='ctx'> 			struct resource_entry *entry)</div><div class='ctx'> {</div><div class='ctx'> #ifdef PCI_IOBASE</div><div class='head'>diff --git a/drivers/acpi/platform_profile.c b/drivers/acpi/platform_profile.c<br/>index ffbfd32f4cf1..b43f4459a4f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/platform_profile.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/platform_profile.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/platform_profile.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/platform_profile.c</a></div><div class='hunk'>@@ -688,6 +688,9 @@ static int __init platform_profile_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (acpi_disabled)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	err = class_register(&amp;platform_profile_class);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='head'>diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c<br/>index a35dd0e41c27..54676e3d82dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/pptt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/pptt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/pptt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/pptt.c</a></div><div class='hunk'>@@ -229,18 +229,20 @@ static int acpi_pptt_leaf_node(struct acpi_table_header *table_hdr,</div><div class='ctx'> 	node_entry = ACPI_PTR_DIFF(node, table_hdr);</div><div class='ctx'> 	entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,</div><div class='ctx'> 			     sizeof(struct acpi_table_pptt));</div><div class='del'>-	proc_sz = sizeof(struct acpi_pptt_processor *);</div><div class='add'>+	proc_sz = sizeof(struct acpi_pptt_processor);</div><div class='ctx'> </div><div class='del'>-	while ((unsigned long)entry + proc_sz &lt; table_end) {</div><div class='add'>+	/* ignore subtable types that are smaller than a processor node */</div><div class='add'>+	while ((unsigned long)entry + proc_sz &lt;= table_end) {</div><div class='ctx'> 		cpu_node = (struct acpi_pptt_processor *)entry;</div><div class='add'>+</div><div class='ctx'> 		if (entry-&gt;type == ACPI_PPTT_TYPE_PROCESSOR &amp;&amp;</div><div class='ctx'> 		    cpu_node-&gt;parent == node_entry)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		if (entry-&gt;length == 0)</div><div class='ctx'> 			return 0;</div><div class='add'>+</div><div class='ctx'> 		entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry,</div><div class='ctx'> 				     entry-&gt;length);</div><div class='del'>-</div><div class='ctx'> 	}</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -270,18 +272,21 @@ static struct acpi_pptt_processor *acpi_find_processor_node(struct acpi_table_he</div><div class='ctx'> 	table_end = (unsigned long)table_hdr + table_hdr-&gt;length;</div><div class='ctx'> 	entry = ACPI_ADD_PTR(struct acpi_subtable_header, table_hdr,</div><div class='ctx'> 			     sizeof(struct acpi_table_pptt));</div><div class='del'>-	proc_sz = sizeof(struct acpi_pptt_processor *);</div><div class='add'>+	proc_sz = sizeof(struct acpi_pptt_processor);</div><div class='ctx'> </div><div class='ctx'> 	/* find the processor structure associated with this cpuid */</div><div class='del'>-	while ((unsigned long)entry + proc_sz &lt; table_end) {</div><div class='add'>+	while ((unsigned long)entry + proc_sz &lt;= table_end) {</div><div class='ctx'> 		cpu_node = (struct acpi_pptt_processor *)entry;</div><div class='ctx'> </div><div class='ctx'> 		if (entry-&gt;length == 0) {</div><div class='ctx'> 			pr_warn("Invalid zero length subtable\n");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+		/* entry-&gt;length may not equal proc_sz, revalidate the processor structure length */</div><div class='ctx'> 		if (entry-&gt;type == ACPI_PPTT_TYPE_PROCESSOR &amp;&amp;</div><div class='ctx'> 		    acpi_cpu_id == cpu_node-&gt;acpi_processor_id &amp;&amp;</div><div class='add'>+		    (unsigned long)entry + entry-&gt;length &lt;= table_end &amp;&amp;</div><div class='add'>+		    entry-&gt;length == proc_sz + cpu_node-&gt;number_of_priv_resources * sizeof(u32) &amp;&amp;</div><div class='ctx'> 		     acpi_pptt_leaf_node(table_hdr, cpu_node)) {</div><div class='ctx'> 			return (struct acpi_pptt_processor *)entry;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c<br/>index b181f7fc2090..e2febca2ec13 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/processor_idle.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/processor_idle.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/processor_idle.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/processor_idle.c</a></div><div class='hunk'>@@ -461,10 +461,8 @@ static int acpi_processor_power_verify(struct acpi_processor *pr)</div><div class='ctx'> </div><div class='ctx'> static int acpi_processor_get_cstate_info(struct acpi_processor *pr)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='ctx'> 	int result;</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	/* NOTE: the idle thread may not be running while calling</div><div class='ctx'> 	 * this function */</div><div class='ctx'> </div><div class='hunk'>@@ -481,17 +479,7 @@ static int acpi_processor_get_cstate_info(struct acpi_processor *pr)</div><div class='ctx'> 	acpi_processor_get_power_info_default(pr);</div><div class='ctx'> </div><div class='ctx'> 	pr-&gt;power.count = acpi_processor_power_verify(pr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * if one state of type C2 or C3 is available, mark this</div><div class='del'>-	 * CPU as being "idle manageable"</div><div class='del'>-	 */</div><div class='del'>-	for (i = 1; i &lt; ACPI_PROCESSOR_MAX_POWER; i++) {</div><div class='del'>-		if (pr-&gt;power.states[i].valid) {</div><div class='del'>-			pr-&gt;power.count = i;</div><div class='del'>-			pr-&gt;flags.power = 1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	pr-&gt;flags.power = 1;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c<br/>index 53996f1a2d80..64b8d1e19594 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/processor_perflib.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/processor_perflib.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/processor_perflib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/processor_perflib.c</a></div><div class='hunk'>@@ -20,6 +20,7 @@</div><div class='ctx'> #include &lt;acpi/processor.h&gt;</div><div class='ctx'> #ifdef CONFIG_X86</div><div class='ctx'> #include &lt;asm/cpufeature.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #define ACPI_PROCESSOR_FILE_PERFORMANCE	"performance"</div><div class='head'>diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c<br/>index 00d045e5f524..d1541a386fbc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/processor_throttling.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/processor_throttling.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/processor_throttling.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/processor_throttling.c</a></div><div class='hunk'>@@ -18,9 +18,12 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> #include &lt;linux/cpufreq.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;acpi/processor.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#ifdef CONFIG_X86</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> /* ignore_tpc:</div><div class='ctx'>  *  0 -&gt; acpi processor driver doesn't ignore _TPC values</div><div class='head'>diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c<br/>index 14c7bac4100b..7d59c6c9185f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/resource.c</a></div><div class='hunk'>@@ -534,7 +534,7 @@ static const struct dmi_system_id irq1_level_low_skip_override[] = {</div><div class='ctx'>  */</div><div class='ctx'> static const struct dmi_system_id irq1_edge_low_force_override[] = {</div><div class='ctx'> 	{</div><div class='del'>-		/* MECHREV Jiaolong17KS Series GM7XG0M */</div><div class='add'>+		/* MECHREVO Jiaolong17KS Series GM7XG0M */</div><div class='ctx'> 		.matches = {</div><div class='ctx'> 			DMI_MATCH(DMI_BOARD_NAME, "GM7XG0M"),</div><div class='ctx'> 		},</div><div class='head'>diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c<br/>index 2295abbecd14..fa9bb8c8ce95 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/tables.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/tables.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/tables.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/tables.c</a></div><div class='hunk'>@@ -396,7 +396,7 @@ static u8 __init acpi_table_checksum(u8 *buffer, u32 length)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* All but ACPI_SIG_RSDP and ACPI_SIG_FACS: */</div><div class='del'>-static const char table_sigs[][ACPI_NAMESEG_SIZE] __initconst = {</div><div class='add'>+static const char table_sigs[][ACPI_NAMESEG_SIZE] __nonstring_array __initconst = {</div><div class='ctx'> 	ACPI_SIG_BERT, ACPI_SIG_BGRT, ACPI_SIG_CPEP, ACPI_SIG_ECDT,</div><div class='ctx'> 	ACPI_SIG_EINJ, ACPI_SIG_ERST, ACPI_SIG_HEST, ACPI_SIG_MADT,</div><div class='ctx'> 	ACPI_SIG_MSCT, ACPI_SIG_SBST, ACPI_SIG_SLIT, ACPI_SIG_SRAT,</div><div class='hunk'>@@ -719,8 +719,12 @@ int __init acpi_locate_initial_tables(void)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	status = acpi_initialize_tables(initial_tables, ACPI_MAX_TABLES, 0);</div><div class='del'>-	if (ACPI_FAILURE(status))</div><div class='add'>+	if (ACPI_FAILURE(status)) {</div><div class='add'>+		const char *msg = acpi_format_exception(status);</div><div class='add'>+</div><div class='add'>+		pr_warn("Failed to initialize tables, status=0x%x (%s)", status, msg);</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c<br/>index 0c874186f8ae..5c2defe55898 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/thermal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/thermal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/thermal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/thermal.c</a></div><div class='hunk'>@@ -803,6 +803,12 @@ static int acpi_thermal_add(struct acpi_device *device)</div><div class='ctx'> </div><div class='ctx'> 	acpi_thermal_aml_dependency_fix(tz);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Set the cooling mode [_SCP] to active cooling. This needs to happen before</div><div class='add'>+	 * we retrieve the trip point values.</div><div class='add'>+	 */</div><div class='add'>+	acpi_execute_simple_method(tz-&gt;device-&gt;handle, "_SCP", ACPI_THERMAL_MODE_ACTIVE);</div><div class='add'>+</div><div class='ctx'> 	/* Get trip points [_ACi, _PSV, etc.] (required). */</div><div class='ctx'> 	acpi_thermal_get_trip_points(tz);</div><div class='ctx'> </div><div class='hunk'>@@ -814,10 +820,6 @@ static int acpi_thermal_add(struct acpi_device *device)</div><div class='ctx'> 	if (result)</div><div class='ctx'> 		goto free_memory;</div><div class='ctx'> </div><div class='del'>-	/* Set the cooling mode [_SCP] to active cooling. */</div><div class='del'>-	acpi_execute_simple_method(tz-&gt;device-&gt;handle, "_SCP",</div><div class='del'>-				   ACPI_THERMAL_MODE_ACTIVE);</div><div class='del'>-</div><div class='ctx'> 	/* Determine the default polling frequency [_TZP]. */</div><div class='ctx'> 	if (tzp)</div><div class='ctx'> 		tz-&gt;polling_frequency = tzp;</div><div class='head'>diff --git a/drivers/acpi/viot.c b/drivers/acpi/viot.c<br/>index 2aa69a2fba73..c13a20365c2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/acpi/viot.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/acpi/viot.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/acpi/viot.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/acpi/viot.c</a></div><div class='hunk'>@@ -19,11 +19,11 @@</div><div class='ctx'> #define pr_fmt(fmt) "ACPI: VIOT: " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/acpi_viot.h&gt;</div><div class='del'>-#include &lt;linux/fwnode.h&gt;</div><div class='ctx'> #include &lt;linux/iommu.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct viot_iommu {</div><div class='ctx'> 	/* Node offset within the table */</div><div class='head'>diff --git a/drivers/android/binder.c b/drivers/android/binder.c<br/>index 76052006bd87..5fc2c8ee61b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/android/binder.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/android/binder.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/android/binder.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/android/binder.c</a></div><div class='hunk'>@@ -6373,7 +6373,7 @@ static void print_binder_transaction_ilocked(struct seq_file *m,</div><div class='ctx'> 		seq_printf(m, " node %d", buffer-&gt;target_node-&gt;debug_id);</div><div class='ctx'> 	seq_printf(m, " size %zd:%zd offset %lx\n",</div><div class='ctx'> 		   buffer-&gt;data_size, buffer-&gt;offsets_size,</div><div class='del'>-		   proc-&gt;alloc.vm_start - buffer-&gt;user_data);</div><div class='add'>+		   buffer-&gt;user_data - proc-&gt;alloc.vm_start);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void print_binder_work_ilocked(struct seq_file *m,</div><div class='head'>diff --git a/drivers/android/binderfs.c b/drivers/android/binderfs.c<br/>index 94c6446604fc..98da8c4eea59 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/android/binderfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/android/binderfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/android/binderfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/android/binderfs.c</a></div><div class='hunk'>@@ -187,7 +187,7 @@ static int binderfs_binder_device_create(struct inode *ref_inode,</div><div class='ctx'> 	inode_lock(d_inode(root));</div><div class='ctx'> </div><div class='ctx'> 	/* look it up */</div><div class='del'>-	dentry = lookup_one_len(name, root, name_len);</div><div class='add'>+	dentry = lookup_noperm(&amp;QSTR(name), root);</div><div class='ctx'> 	if (IS_ERR(dentry)) {</div><div class='ctx'> 		inode_unlock(d_inode(root));</div><div class='ctx'> 		ret = PTR_ERR(dentry);</div><div class='hunk'>@@ -487,7 +487,7 @@ static struct dentry *binderfs_create_dentry(struct dentry *parent,</div><div class='ctx'> {</div><div class='ctx'> 	struct dentry *dentry;</div><div class='ctx'> </div><div class='del'>-	dentry = lookup_one_len(name, parent, strlen(name));</div><div class='add'>+	dentry = lookup_noperm(&amp;QSTR(name), parent);</div><div class='ctx'> 	if (IS_ERR(dentry))</div><div class='ctx'> 		return dentry;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/ata/libata-sata.c b/drivers/ata/libata-sata.c<br/>index ba300cc0a3a3..2e4463d3a356 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/libata-sata.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/libata-sata.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/libata-sata.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/ata/libata-sata.c</a></div><div class='hunk'>@@ -1510,6 +1510,8 @@ int ata_eh_get_ncq_success_sense(struct ata_link *link)</div><div class='ctx'> 	unsigned int err_mask, tag;</div><div class='ctx'> 	u8 *sense, sk = 0, asc = 0, ascq = 0;</div><div class='ctx'> 	u64 sense_valid, val;</div><div class='add'>+	u16 extended_sense;</div><div class='add'>+	bool aux_icc_valid;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	err_mask = ata_read_log_page(dev, ATA_LOG_SENSE_NCQ, 0, buf, 2);</div><div class='hunk'>@@ -1529,6 +1531,8 @@ int ata_eh_get_ncq_success_sense(struct ata_link *link)</div><div class='ctx'> </div><div class='ctx'> 	sense_valid = (u64)buf[8] | ((u64)buf[9] &lt;&lt; 8) |</div><div class='ctx'> 		((u64)buf[10] &lt;&lt; 16) | ((u64)buf[11] &lt;&lt; 24);</div><div class='add'>+	extended_sense = get_unaligned_le16(&amp;buf[14]);</div><div class='add'>+	aux_icc_valid = extended_sense &amp; BIT(15);</div><div class='ctx'> </div><div class='ctx'> 	ata_qc_for_each_raw(ap, qc, tag) {</div><div class='ctx'> 		if (!(qc-&gt;flags &amp; ATA_QCFLAG_EH) ||</div><div class='hunk'>@@ -1556,6 +1560,17 @@ int ata_eh_get_ncq_success_sense(struct ata_link *link)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		qc-&gt;result_tf.nsect = sense[6];</div><div class='add'>+		qc-&gt;result_tf.hob_nsect = sense[7];</div><div class='add'>+		qc-&gt;result_tf.lbal = sense[8];</div><div class='add'>+		qc-&gt;result_tf.lbam = sense[9];</div><div class='add'>+		qc-&gt;result_tf.lbah = sense[10];</div><div class='add'>+		qc-&gt;result_tf.hob_lbal = sense[11];</div><div class='add'>+		qc-&gt;result_tf.hob_lbam = sense[12];</div><div class='add'>+		qc-&gt;result_tf.hob_lbah = sense[13];</div><div class='add'>+		if (aux_icc_valid)</div><div class='add'>+			qc-&gt;result_tf.auxiliary = get_unaligned_le32(&amp;sense[16]);</div><div class='add'>+</div><div class='ctx'> 		/* Set sense without also setting scsicmd-&gt;result */</div><div class='ctx'> 		scsi_build_sense_buffer(dev-&gt;flags &amp; ATA_DFLAG_D_SENSE,</div><div class='ctx'> 					qc-&gt;scsicmd-&gt;sense_buffer, sk,</div><div class='head'>diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c<br/>index 2796c0da8257..c0eb8c67a9ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/libata-scsi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/libata-scsi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/libata-scsi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/ata/libata-scsi.c</a></div><div class='hunk'>@@ -2453,8 +2453,8 @@ static unsigned int ata_msense_control_ata_feature(struct ata_device *dev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	put_unaligned_be16(ATA_FEATURE_SUB_MPAGE_LEN - 4, &amp;buf[2]);</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;flags &amp; ATA_DFLAG_CDL)</div><div class='del'>-		buf[4] = 0x02; /* Support T2A and T2B pages */</div><div class='add'>+	if (dev-&gt;flags &amp; ATA_DFLAG_CDL_ENABLED)</div><div class='add'>+		buf[4] = 0x02; /* T2A and T2B pages enabled */</div><div class='ctx'> 	else</div><div class='ctx'> 		buf[4] = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3886,12 +3886,11 @@ static int ata_mselect_control_spg0(struct ata_queued_cmd *qc,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Translate MODE SELECT control mode page, sub-pages f2h (ATA feature mode</div><div class='add'>+ * Translate MODE SELECT control mode page, sub-page f2h (ATA feature mode</div><div class='ctx'>  * page) into a SET FEATURES command.</div><div class='ctx'>  */</div><div class='del'>-static unsigned int ata_mselect_control_ata_feature(struct ata_queued_cmd *qc,</div><div class='del'>-						    const u8 *buf, int len,</div><div class='del'>-						    u16 *fp)</div><div class='add'>+static int ata_mselect_control_ata_feature(struct ata_queued_cmd *qc,</div><div class='add'>+					   const u8 *buf, int len, u16 *fp)</div><div class='ctx'> {</div><div class='ctx'> 	struct ata_device *dev = qc-&gt;dev;</div><div class='ctx'> 	struct ata_taskfile *tf = &amp;qc-&gt;tf;</div><div class='hunk'>@@ -3909,17 +3908,27 @@ static unsigned int ata_mselect_control_ata_feature(struct ata_queued_cmd *qc,</div><div class='ctx'> 	/* Check cdl_ctrl */</div><div class='ctx'> 	switch (buf[0] &amp; 0x03) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		/* Disable CDL */</div><div class='add'>+		/* Disable CDL if it is enabled */</div><div class='add'>+		if (!(dev-&gt;flags &amp; ATA_DFLAG_CDL_ENABLED))</div><div class='add'>+			return 0;</div><div class='add'>+		ata_dev_dbg(dev, "Disabling CDL\n");</div><div class='ctx'> 		cdl_action = 0;</div><div class='ctx'> 		dev-&gt;flags &amp;= ~ATA_DFLAG_CDL_ENABLED;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x02:</div><div class='del'>-		/* Enable CDL T2A/T2B: NCQ priority must be disabled */</div><div class='add'>+		/*</div><div class='add'>+		 * Enable CDL if not already enabled. Since this is mutually</div><div class='add'>+		 * exclusive with NCQ priority, allow this only if NCQ priority</div><div class='add'>+		 * is disabled.</div><div class='add'>+		 */</div><div class='add'>+		if (dev-&gt;flags &amp; ATA_DFLAG_CDL_ENABLED)</div><div class='add'>+			return 0;</div><div class='ctx'> 		if (dev-&gt;flags &amp; ATA_DFLAG_NCQ_PRIO_ENABLED) {</div><div class='ctx'> 			ata_dev_err(dev,</div><div class='ctx'> 				"NCQ priority must be disabled to enable CDL\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='add'>+		ata_dev_dbg(dev, "Enabling CDL\n");</div><div class='ctx'> 		cdl_action = 1;</div><div class='ctx'> 		dev-&gt;flags |= ATA_DFLAG_CDL_ENABLED;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/ata/pata_pxa.c b/drivers/ata/pata_pxa.c<br/>index 434f380114af..03dbaf4a13a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/pata_pxa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/pata_pxa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/pata_pxa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/ata/pata_pxa.c</a></div><div class='hunk'>@@ -223,10 +223,16 @@ static int pxa_ata_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ap-&gt;ioaddr.cmd_addr	= devm_ioremap(&amp;pdev-&gt;dev, cmd_res-&gt;start,</div><div class='ctx'> 						resource_size(cmd_res));</div><div class='add'>+	if (!ap-&gt;ioaddr.cmd_addr)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	ap-&gt;ioaddr.ctl_addr	= devm_ioremap(&amp;pdev-&gt;dev, ctl_res-&gt;start,</div><div class='ctx'> 						resource_size(ctl_res));</div><div class='add'>+	if (!ap-&gt;ioaddr.ctl_addr)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	ap-&gt;ioaddr.bmdma_addr	= devm_ioremap(&amp;pdev-&gt;dev, dma_res-&gt;start,</div><div class='ctx'> 						resource_size(dma_res));</div><div class='add'>+	if (!ap-&gt;ioaddr.bmdma_addr)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Adjust register offsets</div><div class='head'>diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c<br/>index a482741eb181..c3042eca6332 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/ata/sata_sx4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/ata/sata_sx4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/ata/sata_sx4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/ata/sata_sx4.c</a></div><div class='hunk'>@@ -1117,9 +1117,14 @@ static int pdc20621_prog_dimm0(struct ata_host *host)</div><div class='ctx'> 	mmio += PDC_CHIP0_OFS;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pdc_i2c_read_data); i++)</div><div class='del'>-		pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,</div><div class='del'>-				  pdc_i2c_read_data[i].reg,</div><div class='del'>-				  &amp;spd0[pdc_i2c_read_data[i].ofs]);</div><div class='add'>+		if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,</div><div class='add'>+				       pdc_i2c_read_data[i].reg,</div><div class='add'>+				       &amp;spd0[pdc_i2c_read_data[i].ofs])) {</div><div class='add'>+			dev_err(host-&gt;dev,</div><div class='add'>+				"Failed in i2c read at index %d: device=%#x, reg=%#x\n",</div><div class='add'>+				i, PDC_DIMM0_SPD_DEV_ADDRESS, pdc_i2c_read_data[i].reg);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 	data |= (spd0[4] - 8) | ((spd0[21] != 0) &lt;&lt; 3) | ((spd0[3]-11) &lt;&lt; 4);</div><div class='ctx'> 	data |= ((spd0[17] / 4) &lt;&lt; 6) | ((spd0[5] / 2) &lt;&lt; 7) |</div><div class='hunk'>@@ -1284,6 +1289,8 @@ static unsigned int pdc20621_dimm_init(struct ata_host *host)</div><div class='ctx'> </div><div class='ctx'> 	/* Programming DIMM0 Module Control Register (index_CID0:80h) */</div><div class='ctx'> 	size = pdc20621_prog_dimm0(host);</div><div class='add'>+	if (size &lt; 0)</div><div class='add'>+		return size;</div><div class='ctx'> 	dev_dbg(host-&gt;dev, "Local DIMM Size = %dMB\n", size);</div><div class='ctx'> </div><div class='ctx'> 	/* Programming DIMM Module Global Control Register (index_CID0:88h) */</div><div class='head'>diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c<br/>index af0029d30dbe..1037169abb45 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/arch_topology.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/arch_topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/arch_topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/arch_topology.c</a></div><div class='hunk'>@@ -154,14 +154,6 @@ void topology_set_freq_scale(const struct cpumask *cpus, unsigned long cur_freq,</div><div class='ctx'> 		per_cpu(arch_freq_scale, i) = scale;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-DEFINE_PER_CPU(unsigned long, cpu_scale) = SCHED_CAPACITY_SCALE;</div><div class='del'>-EXPORT_PER_CPU_SYMBOL_GPL(cpu_scale);</div><div class='del'>-</div><div class='del'>-void topology_set_cpu_scale(unsigned int cpu, unsigned long capacity)</div><div class='del'>-{</div><div class='del'>-	per_cpu(cpu_scale, cpu) = capacity;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, hw_pressure);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -207,53 +199,9 @@ void topology_update_hw_pressure(const struct cpumask *cpus,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(topology_update_hw_pressure);</div><div class='ctx'> </div><div class='del'>-static ssize_t cpu_capacity_show(struct device *dev,</div><div class='del'>-				 struct device_attribute *attr,</div><div class='del'>-				 char *buf)</div><div class='del'>-{</div><div class='del'>-	struct cpu *cpu = container_of(dev, struct cpu, dev);</div><div class='del'>-</div><div class='del'>-	return sysfs_emit(buf, "%lu\n", topology_get_cpu_scale(cpu-&gt;dev.id));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void update_topology_flags_workfn(struct work_struct *work);</div><div class='ctx'> static DECLARE_WORK(update_topology_flags_work, update_topology_flags_workfn);</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR_RO(cpu_capacity);</div><div class='del'>-</div><div class='del'>-static int cpu_capacity_sysctl_add(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	struct device *cpu_dev = get_cpu_device(cpu);</div><div class='del'>-</div><div class='del'>-	if (!cpu_dev)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	device_create_file(cpu_dev, &amp;dev_attr_cpu_capacity);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cpu_capacity_sysctl_remove(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	struct device *cpu_dev = get_cpu_device(cpu);</div><div class='del'>-</div><div class='del'>-	if (!cpu_dev)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	device_remove_file(cpu_dev, &amp;dev_attr_cpu_capacity);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int register_cpu_capacity_sysctl(void)</div><div class='del'>-{</div><div class='del'>-	cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "topology/cpu-capacity",</div><div class='del'>-			  cpu_capacity_sysctl_add, cpu_capacity_sysctl_remove);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-subsys_initcall(register_cpu_capacity_sysctl);</div><div class='del'>-</div><div class='ctx'> static int update_topology;</div><div class='ctx'> </div><div class='ctx'> int topology_update_cpu_topology(void)</div><div class='head'>diff --git a/drivers/base/auxiliary.c b/drivers/base/auxiliary.c<br/>index afa4df4c5a3f..dba7c8e13a53 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/auxiliary.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/auxiliary.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/auxiliary.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/auxiliary.c</a></div><div class='hunk'>@@ -156,6 +156,16 @@</div><div class='ctx'>  *		},</div><div class='ctx'>  *		.ops = my_custom_ops,</div><div class='ctx'>  *	};</div><div class='add'>+ *</div><div class='add'>+ * Please note that such custom ops approach is valid, but it is hard to implement</div><div class='add'>+ * it right without global locks per-device to protect from auxiliary_drv removal</div><div class='add'>+ * during call to that ops. In addition, this implementation lacks proper module</div><div class='add'>+ * dependency, which causes to load/unload races between auxiliary parent and devices</div><div class='add'>+ * modules.</div><div class='add'>+ *</div><div class='add'>+ * The most easiest way to provide these ops reliably without needing to</div><div class='add'>+ * have a lock is to EXPORT_SYMBOL*() them and rely on already existing</div><div class='add'>+ * modules infrastructure for validity and correct dependencies chains.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static const struct auxiliary_device_id *auxiliary_match_id(const struct auxiliary_device_id *id,</div><div class='hunk'>@@ -385,6 +395,114 @@ void auxiliary_driver_unregister(struct auxiliary_driver *auxdrv)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(auxiliary_driver_unregister);</div><div class='ctx'> </div><div class='add'>+static void auxiliary_device_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct auxiliary_device *auxdev = to_auxiliary_dev(dev);</div><div class='add'>+</div><div class='add'>+	kfree(auxdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * auxiliary_device_create - create a device on the auxiliary bus</div><div class='add'>+ * @dev: parent device</div><div class='add'>+ * @modname: module name used to create the auxiliary driver name.</div><div class='add'>+ * @devname: auxiliary bus device name</div><div class='add'>+ * @platform_data: auxiliary bus device platform data</div><div class='add'>+ * @id: auxiliary bus device id</div><div class='add'>+ *</div><div class='add'>+ * Helper to create an auxiliary bus device.</div><div class='add'>+ * The device created matches driver 'modname.devname' on the auxiliary bus.</div><div class='add'>+ */</div><div class='add'>+struct auxiliary_device *auxiliary_device_create(struct device *dev,</div><div class='add'>+						 const char *modname,</div><div class='add'>+						 const char *devname,</div><div class='add'>+						 void *platform_data,</div><div class='add'>+						 int id)</div><div class='add'>+{</div><div class='add'>+	struct auxiliary_device *auxdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	auxdev = kzalloc(sizeof(*auxdev), GFP_KERNEL);</div><div class='add'>+	if (!auxdev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	auxdev-&gt;id = id;</div><div class='add'>+	auxdev-&gt;name = devname;</div><div class='add'>+	auxdev-&gt;dev.parent = dev;</div><div class='add'>+	auxdev-&gt;dev.platform_data = platform_data;</div><div class='add'>+	auxdev-&gt;dev.release = auxiliary_device_release;</div><div class='add'>+	device_set_of_node_from_dev(&amp;auxdev-&gt;dev, dev);</div><div class='add'>+</div><div class='add'>+	ret = auxiliary_device_init(auxdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(auxdev);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = __auxiliary_device_add(auxdev, modname);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/*</div><div class='add'>+		 * It may look odd but auxdev should not be freed here.</div><div class='add'>+		 * auxiliary_device_uninit() calls device_put() which call</div><div class='add'>+		 * the device release function, freeing auxdev.</div><div class='add'>+		 */</div><div class='add'>+		auxiliary_device_uninit(auxdev);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return auxdev;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(auxiliary_device_create);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * auxiliary_device_destroy - remove an auxiliary device</div><div class='add'>+ * @auxdev: pointer to the auxdev to be removed</div><div class='add'>+ *</div><div class='add'>+ * Helper to remove an auxiliary device created with</div><div class='add'>+ * auxiliary_device_create()</div><div class='add'>+ */</div><div class='add'>+void auxiliary_device_destroy(void *auxdev)</div><div class='add'>+{</div><div class='add'>+	struct auxiliary_device *_auxdev = auxdev;</div><div class='add'>+</div><div class='add'>+	auxiliary_device_delete(_auxdev);</div><div class='add'>+	auxiliary_device_uninit(_auxdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(auxiliary_device_destroy);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __devm_auxiliary_device_create - create a managed device on the auxiliary bus</div><div class='add'>+ * @dev: parent device</div><div class='add'>+ * @modname: module name used to create the auxiliary driver name.</div><div class='add'>+ * @devname: auxiliary bus device name</div><div class='add'>+ * @platform_data: auxiliary bus device platform data</div><div class='add'>+ * @id: auxiliary bus device id</div><div class='add'>+ *</div><div class='add'>+ * Device managed helper to create an auxiliary bus device.</div><div class='add'>+ * The device created matches driver 'modname.devname' on the auxiliary bus.</div><div class='add'>+ */</div><div class='add'>+struct auxiliary_device *__devm_auxiliary_device_create(struct device *dev,</div><div class='add'>+							const char *modname,</div><div class='add'>+							const char *devname,</div><div class='add'>+							void *platform_data,</div><div class='add'>+							int id)</div><div class='add'>+{</div><div class='add'>+	struct auxiliary_device *auxdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	auxdev = auxiliary_device_create(dev, modname, devname, platform_data, id);</div><div class='add'>+	if (!auxdev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, auxiliary_device_destroy,</div><div class='add'>+				       auxdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return auxdev;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__devm_auxiliary_device_create);</div><div class='add'>+</div><div class='ctx'> void __init auxiliary_bus_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ON(bus_register(&amp;auxiliary_bus_type));</div><div class='head'>diff --git a/drivers/base/base.h b/drivers/base/base.h<br/>index 0042e4774b0c..123031a757d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/base.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/base.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/base.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/base.h</a></div><div class='hunk'>@@ -73,6 +73,7 @@ static inline void subsys_put(struct subsys_private *sp)</div><div class='ctx'> 		kset_put(&amp;sp-&gt;subsys);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct subsys_private *bus_to_subsys(const struct bus_type *bus);</div><div class='ctx'> struct subsys_private *class_to_subsys(const struct class *class);</div><div class='ctx'> </div><div class='ctx'> struct driver_private {</div><div class='hunk'>@@ -180,6 +181,22 @@ int driver_add_groups(const struct device_driver *drv, const struct attribute_gr</div><div class='ctx'> void driver_remove_groups(const struct device_driver *drv, const struct attribute_group **groups);</div><div class='ctx'> void device_driver_detach(struct device *dev);</div><div class='ctx'> </div><div class='add'>+static inline void device_set_driver(struct device *dev, const struct device_driver *drv)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Majority (all?) read accesses to dev-&gt;driver happens either</div><div class='add'>+	 * while holding device lock or in bus/driver code that is only</div><div class='add'>+	 * invoked when the device is bound to a driver and there is no</div><div class='add'>+	 * concern of the pointer being changed while it is being read.</div><div class='add'>+	 * However when reading device's uevent file we read driver pointer</div><div class='add'>+	 * without taking device lock (so we do not block there for</div><div class='add'>+	 * arbitrary amount of time). We use WRITE_ONCE() here to prevent</div><div class='add'>+	 * tearing so that READ_ONCE() can safely be used in uevent code.</div><div class='add'>+	 */</div><div class='add'>+	// FIXME - this cast should not be needed "soon"</div><div class='add'>+	WRITE_ONCE(dev-&gt;driver, (struct device_driver *)drv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int devres_release_all(struct device *dev);</div><div class='ctx'> void device_block_probing(void);</div><div class='ctx'> void device_unblock_probing(void);</div><div class='head'>diff --git a/drivers/base/bus.c b/drivers/base/bus.c<br/>index 5ea3b03af9ba..5e75e1bce551 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/bus.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/bus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/bus.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ static int __must_check bus_rescan_devices_helper(struct device *dev,</div><div class='ctx'>  * NULL.  A call to subsys_put() must be done when finished with the pointer in</div><div class='ctx'>  * order for it to be properly freed.</div><div class='ctx'>  */</div><div class='del'>-static struct subsys_private *bus_to_subsys(const struct bus_type *bus)</div><div class='add'>+struct subsys_private *bus_to_subsys(const struct bus_type *bus)</div><div class='ctx'> {</div><div class='ctx'> 	struct subsys_private *sp = NULL;</div><div class='ctx'> 	struct kobject *kobj;</div><div class='head'>diff --git a/drivers/base/component.c b/drivers/base/component.c<br/>index abe60eb45c55..024ad9471b8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/component.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/component.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/component.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/component.c</a></div><div class='hunk'>@@ -586,7 +586,8 @@ EXPORT_SYMBOL_GPL(component_master_is_bound);</div><div class='ctx'> static void component_unbind(struct component *component,</div><div class='ctx'> 	struct aggregate_device *adev, void *data)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON(!component-&gt;bound);</div><div class='add'>+	if (WARN_ON(!component-&gt;bound))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(adev-&gt;parent, "unbinding %s component %p (ops %ps)\n",</div><div class='ctx'> 		dev_name(component-&gt;dev), component, component-&gt;ops);</div><div class='head'>diff --git a/drivers/base/core.c b/drivers/base/core.c<br/>index d2f9d3a59d6b..cbc0099d8ef2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/core.c</a></div><div class='hunk'>@@ -2624,6 +2624,35 @@ static const char *dev_uevent_name(const struct kobject *kobj)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Try filling "DRIVER=&lt;name&gt;" uevent variable for a device. Because this</div><div class='add'>+ * function may race with binding and unbinding the device from a driver,</div><div class='add'>+ * we need to be careful. Binding is generally safe, at worst we miss the</div><div class='add'>+ * fact that the device is already bound to a driver (but the driver</div><div class='add'>+ * information that is delivered through uevents is best-effort, it may</div><div class='add'>+ * become obsolete as soon as it is generated anyways). Unbinding is more</div><div class='add'>+ * risky as driver pointer is transitioning to NULL, so READ_ONCE() should</div><div class='add'>+ * be used to make sure we are dealing with the same pointer, and to</div><div class='add'>+ * ensure that driver structure is not going to disappear from under us</div><div class='add'>+ * we take bus' drivers klist lock. The assumption that only registered</div><div class='add'>+ * driver can be bound to a device, and to unregister a driver bus code</div><div class='add'>+ * will take the same lock.</div><div class='add'>+ */</div><div class='add'>+static void dev_driver_uevent(const struct device *dev, struct kobj_uevent_env *env)</div><div class='add'>+{</div><div class='add'>+	struct subsys_private *sp = bus_to_subsys(dev-&gt;bus);</div><div class='add'>+</div><div class='add'>+	if (sp) {</div><div class='add'>+		scoped_guard(spinlock, &amp;sp-&gt;klist_drivers.k_lock) {</div><div class='add'>+			struct device_driver *drv = READ_ONCE(dev-&gt;driver);</div><div class='add'>+			if (drv)</div><div class='add'>+				add_uevent_var(env, "DRIVER=%s", drv-&gt;name);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		subsys_put(sp);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dev_uevent(const struct kobject *kobj, struct kobj_uevent_env *env)</div><div class='ctx'> {</div><div class='ctx'> 	const struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -2655,8 +2684,8 @@ static int dev_uevent(const struct kobject *kobj, struct kobj_uevent_env *env)</div><div class='ctx'> 	if (dev-&gt;type &amp;&amp; dev-&gt;type-&gt;name)</div><div class='ctx'> 		add_uevent_var(env, "DEVTYPE=%s", dev-&gt;type-&gt;name);</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;driver)</div><div class='del'>-		add_uevent_var(env, "DRIVER=%s", dev-&gt;driver-&gt;name);</div><div class='add'>+	/* Add "DRIVER=%s" variable if the device is bound to a driver */</div><div class='add'>+	dev_driver_uevent(dev, env);</div><div class='ctx'> </div><div class='ctx'> 	/* Add common DT information about the device */</div><div class='ctx'> 	of_device_uevent(dev, env);</div><div class='hunk'>@@ -2726,11 +2755,8 @@ static ssize_t uevent_show(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	if (!env)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* Synchronize with really_probe() */</div><div class='del'>-	device_lock(dev);</div><div class='ctx'> 	/* let the kset specific function add its keys */</div><div class='ctx'> 	retval = kset-&gt;uevent_ops-&gt;uevent(&amp;dev-&gt;kobj, env);</div><div class='del'>-	device_unlock(dev);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -3700,7 +3726,7 @@ done:</div><div class='ctx'> 	device_pm_remove(dev);</div><div class='ctx'> 	dpm_sysfs_remove(dev);</div><div class='ctx'>  DPMError:</div><div class='del'>-	dev-&gt;driver = NULL;</div><div class='add'>+	device_set_driver(dev, NULL);</div><div class='ctx'> 	bus_remove_device(dev);</div><div class='ctx'>  BusError:</div><div class='ctx'> 	device_remove_attrs(dev);</div><div class='head'>diff --git a/drivers/base/cpu.c b/drivers/base/cpu.c<br/>index a7e511849875..7779ab0ca7ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/cpu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/cpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/cpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/cpu.c</a></div><div class='hunk'>@@ -600,6 +600,8 @@ CPU_SHOW_VULN_FALLBACK(spec_rstack_overflow);</div><div class='ctx'> CPU_SHOW_VULN_FALLBACK(gds);</div><div class='ctx'> CPU_SHOW_VULN_FALLBACK(reg_file_data_sampling);</div><div class='ctx'> CPU_SHOW_VULN_FALLBACK(ghostwrite);</div><div class='add'>+CPU_SHOW_VULN_FALLBACK(old_microcode);</div><div class='add'>+CPU_SHOW_VULN_FALLBACK(indirect_target_selection);</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);</div><div class='ctx'> static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);</div><div class='hunk'>@@ -616,6 +618,8 @@ static DEVICE_ATTR(spec_rstack_overflow, 0444, cpu_show_spec_rstack_overflow, NU</div><div class='ctx'> static DEVICE_ATTR(gather_data_sampling, 0444, cpu_show_gds, NULL);</div><div class='ctx'> static DEVICE_ATTR(reg_file_data_sampling, 0444, cpu_show_reg_file_data_sampling, NULL);</div><div class='ctx'> static DEVICE_ATTR(ghostwrite, 0444, cpu_show_ghostwrite, NULL);</div><div class='add'>+static DEVICE_ATTR(old_microcode, 0444, cpu_show_old_microcode, NULL);</div><div class='add'>+static DEVICE_ATTR(indirect_target_selection, 0444, cpu_show_indirect_target_selection, NULL);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *cpu_root_vulnerabilities_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_meltdown.attr,</div><div class='hunk'>@@ -633,6 +637,8 @@ static struct attribute *cpu_root_vulnerabilities_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_gather_data_sampling.attr,</div><div class='ctx'> 	&amp;dev_attr_reg_file_data_sampling.attr,</div><div class='ctx'> 	&amp;dev_attr_ghostwrite.attr,</div><div class='add'>+	&amp;dev_attr_old_microcode.attr,</div><div class='add'>+	&amp;dev_attr_indirect_target_selection.attr,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/dd.c b/drivers/base/dd.c<br/>index f0e4b4aba885..b526e0e0f52d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/dd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/dd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/dd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/dd.c</a></div><div class='hunk'>@@ -550,7 +550,7 @@ static void device_unbind_cleanup(struct device *dev)</div><div class='ctx'> 	arch_teardown_dma_ops(dev);</div><div class='ctx'> 	kfree(dev-&gt;dma_range_map);</div><div class='ctx'> 	dev-&gt;dma_range_map = NULL;</div><div class='del'>-	dev-&gt;driver = NULL;</div><div class='add'>+	device_set_driver(dev, NULL);</div><div class='ctx'> 	dev_set_drvdata(dev, NULL);</div><div class='ctx'> 	if (dev-&gt;pm_domain &amp;&amp; dev-&gt;pm_domain-&gt;dismiss)</div><div class='ctx'> 		dev-&gt;pm_domain-&gt;dismiss(dev);</div><div class='hunk'>@@ -629,8 +629,7 @@ static int really_probe(struct device *dev, const struct device_driver *drv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> re_probe:</div><div class='del'>-	// FIXME - this cast should not be needed "soon"</div><div class='del'>-	dev-&gt;driver = (struct device_driver *)drv;</div><div class='add'>+	device_set_driver(dev, drv);</div><div class='ctx'> </div><div class='ctx'> 	/* If using pinctrl, bind pins now before probing */</div><div class='ctx'> 	ret = pinctrl_bind_pins(dev);</div><div class='hunk'>@@ -1014,7 +1013,7 @@ static int __device_attach(struct device *dev, bool allow_async)</div><div class='ctx'> 		if (ret == 0)</div><div class='ctx'> 			ret = 1;</div><div class='ctx'> 		else {</div><div class='del'>-			dev-&gt;driver = NULL;</div><div class='add'>+			device_set_driver(dev, NULL);</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='head'>diff --git a/drivers/base/devres.c b/drivers/base/devres.c<br/>index d8a733ea5e1a..ff55e1bcfa30 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/devres.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/devres.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/devres.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/devres.c</a></div><div class='hunk'>@@ -759,6 +759,17 @@ int __devm_add_action(struct device *dev, void (*action)(void *), void *data, co</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(__devm_add_action);</div><div class='ctx'> </div><div class='add'>+bool devm_is_action_added(struct device *dev, void (*action)(void *), void *data)</div><div class='add'>+{</div><div class='add'>+	struct action_devres devres = {</div><div class='add'>+		.data = data,</div><div class='add'>+		.action = action,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return devres_find(dev, devm_action_release, devm_action_match, &amp;devres);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_is_action_added);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * devm_remove_action_nowarn() - removes previously added custom action</div><div class='ctx'>  * @dev: Device that owns the action</div><div class='hunk'>@@ -976,17 +987,10 @@ EXPORT_SYMBOL_GPL(devm_krealloc);</div><div class='ctx'>  */</div><div class='ctx'> char *devm_kstrdup(struct device *dev, const char *s, gfp_t gfp)</div><div class='ctx'> {</div><div class='del'>-	size_t size;</div><div class='del'>-	char *buf;</div><div class='del'>-</div><div class='ctx'> 	if (!s)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	size = strlen(s) + 1;</div><div class='del'>-	buf = devm_kmalloc(dev, size, gfp);</div><div class='del'>-	if (buf)</div><div class='del'>-		memcpy(buf, s, size);</div><div class='del'>-	return buf;</div><div class='add'>+	return devm_kmemdup(dev, s, strlen(s) + 1, gfp);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_kstrdup);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c<br/>index 6dd1a8860f1c..31bfb3194b4c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/devtmpfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/devtmpfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/devtmpfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/devtmpfs.c</a></div><div class='hunk'>@@ -296,7 +296,7 @@ static int delete_path(const char *nodepath)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dev_mynode(struct device *dev, struct inode *inode, struct kstat *stat)</div><div class='add'>+static int dev_mynode(struct device *dev, struct inode *inode)</div><div class='ctx'> {</div><div class='ctx'> 	/* did we create it */</div><div class='ctx'> 	if (inode-&gt;i_private != &amp;thread)</div><div class='hunk'>@@ -304,13 +304,13 @@ static int dev_mynode(struct device *dev, struct inode *inode, struct kstat *sta</div><div class='ctx'> </div><div class='ctx'> 	/* does the dev_t match */</div><div class='ctx'> 	if (is_blockdev(dev)) {</div><div class='del'>-		if (!S_ISBLK(stat-&gt;mode))</div><div class='add'>+		if (!S_ISBLK(inode-&gt;i_mode))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	} else {</div><div class='del'>-		if (!S_ISCHR(stat-&gt;mode))</div><div class='add'>+		if (!S_ISCHR(inode-&gt;i_mode))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (stat-&gt;rdev != dev-&gt;devt)</div><div class='add'>+	if (inode-&gt;i_rdev != dev-&gt;devt)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* ours */</div><div class='hunk'>@@ -321,20 +321,16 @@ static int handle_remove(const char *nodename, struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct path parent;</div><div class='ctx'> 	struct dentry *dentry;</div><div class='del'>-	struct kstat stat;</div><div class='del'>-	struct path p;</div><div class='add'>+	struct inode *inode;</div><div class='ctx'> 	int deleted = 0;</div><div class='del'>-	int err;</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	dentry = kern_path_locked(nodename, &amp;parent);</div><div class='ctx'> 	if (IS_ERR(dentry))</div><div class='ctx'> 		return PTR_ERR(dentry);</div><div class='ctx'> </div><div class='del'>-	p.mnt = parent.mnt;</div><div class='del'>-	p.dentry = dentry;</div><div class='del'>-	err = vfs_getattr(&amp;p, &amp;stat, STATX_TYPE | STATX_MODE,</div><div class='del'>-			  AT_STATX_SYNC_AS_STAT);</div><div class='del'>-	if (!err &amp;&amp; dev_mynode(dev, d_inode(dentry), &amp;stat)) {</div><div class='add'>+	inode = d_inode(dentry);</div><div class='add'>+	if (dev_mynode(dev, inode)) {</div><div class='ctx'> 		struct iattr newattrs;</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * before unlinking this node, reset permissions</div><div class='hunk'>@@ -342,7 +338,7 @@ static int handle_remove(const char *nodename, struct device *dev)</div><div class='ctx'> 		 */</div><div class='ctx'> 		newattrs.ia_uid = GLOBAL_ROOT_UID;</div><div class='ctx'> 		newattrs.ia_gid = GLOBAL_ROOT_GID;</div><div class='del'>-		newattrs.ia_mode = stat.mode &amp; ~0777;</div><div class='add'>+		newattrs.ia_mode = inode-&gt;i_mode &amp; ~0777;</div><div class='ctx'> 		newattrs.ia_valid =</div><div class='ctx'> 			ATTR_UID|ATTR_GID|ATTR_MODE;</div><div class='ctx'> 		inode_lock(d_inode(dentry));</div><div class='head'>diff --git a/drivers/base/faux.c b/drivers/base/faux.c<br/>index 407c1d1aad50..9054d346bd7f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/faux.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/faux.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/faux.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/faux.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> struct faux_object {</div><div class='ctx'> 	struct faux_device faux_dev;</div><div class='ctx'> 	const struct faux_device_ops *faux_ops;</div><div class='add'>+	const struct attribute_group **groups;</div><div class='ctx'> };</div><div class='ctx'> #define to_faux_object(dev) container_of_const(dev, struct faux_object, faux_dev.dev)</div><div class='ctx'> </div><div class='hunk'>@@ -43,10 +44,21 @@ static int faux_probe(struct device *dev)</div><div class='ctx'> 	struct faux_object *faux_obj = to_faux_object(dev);</div><div class='ctx'> 	struct faux_device *faux_dev = &amp;faux_obj-&gt;faux_dev;</div><div class='ctx'> 	const struct faux_device_ops *faux_ops = faux_obj-&gt;faux_ops;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (faux_ops &amp;&amp; faux_ops-&gt;probe)</div><div class='add'>+	if (faux_ops &amp;&amp; faux_ops-&gt;probe) {</div><div class='ctx'> 		ret = faux_ops-&gt;probe(faux_dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Add groups after the probe succeeds to ensure resources are</div><div class='add'>+	 * initialized correctly</div><div class='add'>+	 */</div><div class='add'>+	ret = device_add_groups(dev, faux_obj-&gt;groups);</div><div class='add'>+	if (ret &amp;&amp; faux_ops &amp;&amp; faux_ops-&gt;remove)</div><div class='add'>+		faux_ops-&gt;remove(faux_dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -57,6 +69,8 @@ static void faux_remove(struct device *dev)</div><div class='ctx'> 	struct faux_device *faux_dev = &amp;faux_obj-&gt;faux_dev;</div><div class='ctx'> 	const struct faux_device_ops *faux_ops = faux_obj-&gt;faux_ops;</div><div class='ctx'> </div><div class='add'>+	device_remove_groups(dev, faux_obj-&gt;groups);</div><div class='add'>+</div><div class='ctx'> 	if (faux_ops &amp;&amp; faux_ops-&gt;remove)</div><div class='ctx'> 		faux_ops-&gt;remove(faux_dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -124,8 +138,9 @@ struct faux_device *faux_device_create_with_groups(const char *name,</div><div class='ctx'> 	if (!faux_obj)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	/* Save off the callbacks so we can use them in the future */</div><div class='add'>+	/* Save off the callbacks and groups so we can use them in the future */</div><div class='ctx'> 	faux_obj-&gt;faux_ops = faux_ops;</div><div class='add'>+	faux_obj-&gt;groups = groups;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the device portion and register it with the driver core */</div><div class='ctx'> 	faux_dev = &amp;faux_obj-&gt;faux_dev;</div><div class='hunk'>@@ -138,7 +153,6 @@ struct faux_device *faux_device_create_with_groups(const char *name,</div><div class='ctx'> 	else</div><div class='ctx'> 		dev-&gt;parent = &amp;faux_bus_root;</div><div class='ctx'> 	dev-&gt;bus = &amp;faux_bus_type;</div><div class='del'>-	dev-&gt;groups = groups;</div><div class='ctx'> 	dev_set_name(dev, "%s", name);</div><div class='ctx'> </div><div class='ctx'> 	ret = device_add(dev);</div><div class='head'>diff --git a/drivers/base/firmware_loader/Kconfig b/drivers/base/firmware_loader/Kconfig<br/>index a03701674265..752b9a9bea03 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/firmware_loader/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/firmware_loader/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/firmware_loader/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/firmware_loader/Kconfig</a></div><div class='hunk'>@@ -3,8 +3,7 @@ menu "Firmware loader"</div><div class='ctx'> </div><div class='ctx'> config FW_LOADER</div><div class='ctx'> 	tristate "Firmware loading facility" if EXPERT</div><div class='del'>-	select CRYPTO_HASH if FW_LOADER_DEBUG</div><div class='del'>-	select CRYPTO_SHA256 if FW_LOADER_DEBUG</div><div class='add'>+	select CRYPTO_LIB_SHA256 if FW_LOADER_DEBUG</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables the firmware loading facility in the kernel. The kernel</div><div class='hunk'>@@ -28,7 +27,6 @@ config FW_LOADER</div><div class='ctx'> </div><div class='ctx'> config FW_LOADER_DEBUG</div><div class='ctx'> 	bool "Log filenames and checksums for loaded firmware"</div><div class='del'>-	depends on CRYPTO = FW_LOADER || CRYPTO=y</div><div class='ctx'> 	depends on DYNAMIC_DEBUG</div><div class='ctx'> 	depends on FW_LOADER</div><div class='ctx'> 	default FW_LOADER</div><div class='head'>diff --git a/drivers/base/firmware_loader/main.c b/drivers/base/firmware_loader/main.c<br/>index cb0912ea3e62..44486b2c7172 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/firmware_loader/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/firmware_loader/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/firmware_loader/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/firmware_loader/main.c</a></div><div class='hunk'>@@ -806,41 +806,15 @@ static void fw_abort_batch_reqs(struct firmware *fw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_FW_LOADER_DEBUG)</div><div class='del'>-#include &lt;crypto/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void fw_log_firmware_info(const struct firmware *fw, const char *name, struct device *device)</div><div class='ctx'> {</div><div class='del'>-	struct shash_desc *shash;</div><div class='del'>-	struct crypto_shash *alg;</div><div class='del'>-	u8 *sha256buf;</div><div class='del'>-	char *outbuf;</div><div class='add'>+	u8 digest[SHA256_DIGEST_SIZE];</div><div class='ctx'> </div><div class='del'>-	alg = crypto_alloc_shash("sha256", 0, 0);</div><div class='del'>-	if (IS_ERR(alg))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	sha256buf = kmalloc(SHA256_DIGEST_SIZE, GFP_KERNEL);</div><div class='del'>-	outbuf = kmalloc(SHA256_BLOCK_SIZE + 1, GFP_KERNEL);</div><div class='del'>-	shash = kmalloc(sizeof(*shash) + crypto_shash_descsize(alg), GFP_KERNEL);</div><div class='del'>-	if (!sha256buf || !outbuf || !shash)</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	shash-&gt;tfm = alg;</div><div class='del'>-</div><div class='del'>-	if (crypto_shash_digest(shash, fw-&gt;data, fw-&gt;size, sha256buf) &lt; 0)</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; SHA256_DIGEST_SIZE; i++)</div><div class='del'>-		sprintf(&amp;outbuf[i * 2], "%02x", sha256buf[i]);</div><div class='del'>-	outbuf[SHA256_BLOCK_SIZE] = 0;</div><div class='del'>-	dev_dbg(device, "Loaded FW: %s, sha256: %s\n", name, outbuf);</div><div class='del'>-</div><div class='del'>-out_free:</div><div class='del'>-	kfree(shash);</div><div class='del'>-	kfree(outbuf);</div><div class='del'>-	kfree(sha256buf);</div><div class='del'>-	crypto_free_shash(alg);</div><div class='add'>+	sha256(fw-&gt;data, fw-&gt;size, digest);</div><div class='add'>+	dev_dbg(device, "Loaded FW: %s, sha256: %*phN\n",</div><div class='add'>+		name, SHA256_DIGEST_SIZE, digest);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> static void fw_log_firmware_info(const struct firmware *fw, const char *name,</div><div class='head'>diff --git a/drivers/base/memory.c b/drivers/base/memory.c<br/>index 8f3a41d9bfaa..19469e7f88c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/memory.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/memory.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/memory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/memory.c</a></div><div class='hunk'>@@ -816,21 +816,6 @@ static int add_memory_block(unsigned long block_id, unsigned long state,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init add_boot_memory_block(unsigned long base_section_nr)</div><div class='del'>-{</div><div class='del'>-	unsigned long nr;</div><div class='del'>-</div><div class='del'>-	for_each_present_section_nr(base_section_nr, nr) {</div><div class='del'>-		if (nr &gt;= (base_section_nr + sections_per_block))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		return add_memory_block(memory_block_id(base_section_nr),</div><div class='del'>-					MEM_ONLINE, NULL, NULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int add_hotplug_memory_block(unsigned long block_id,</div><div class='ctx'> 				    struct vmem_altmap *altmap,</div><div class='ctx'> 				    struct memory_group *group)</div><div class='hunk'>@@ -957,7 +942,7 @@ static const struct attribute_group *memory_root_attr_groups[] = {</div><div class='ctx'> void __init memory_dev_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	unsigned long block_sz, nr;</div><div class='add'>+	unsigned long block_sz, block_id, nr;</div><div class='ctx'> </div><div class='ctx'> 	/* Validate the configured memory block size */</div><div class='ctx'> 	block_sz = memory_block_size_bytes();</div><div class='hunk'>@@ -970,15 +955,23 @@ void __init memory_dev_init(void)</div><div class='ctx'> 		panic("%s() failed to register subsystem: %d\n", __func__, ret);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Create entries for memory sections that were found</div><div class='del'>-	 * during boot and have been initialized</div><div class='add'>+	 * Create entries for memory sections that were found during boot</div><div class='add'>+	 * and have been initialized. Use @block_id to track the last</div><div class='add'>+	 * handled block and initialize it to an invalid value (ULONG_MAX)</div><div class='add'>+	 * to bypass the block ID matching check for the first present</div><div class='add'>+	 * block so that it can be covered.</div><div class='ctx'> 	 */</div><div class='del'>-	for (nr = 0; nr &lt;= __highest_present_section_nr;</div><div class='del'>-	     nr += sections_per_block) {</div><div class='del'>-		ret = add_boot_memory_block(nr);</div><div class='del'>-		if (ret)</div><div class='del'>-			panic("%s() failed to add memory block: %d\n", __func__,</div><div class='del'>-			      ret);</div><div class='add'>+	block_id = ULONG_MAX;</div><div class='add'>+	for_each_present_section_nr(0, nr) {</div><div class='add'>+		if (block_id != ULONG_MAX &amp;&amp; memory_block_id(nr) == block_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		block_id = memory_block_id(nr);</div><div class='add'>+		ret = add_memory_block(block_id, MEM_ONLINE, NULL, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			panic("%s() failed to add memory block: %d\n",</div><div class='add'>+			      __func__, ret);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/module.c b/drivers/base/module.c<br/>index 5bc71bea883a..218aaa096455 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/module.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/module.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/module.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/module.c</a></div><div class='hunk'>@@ -42,16 +42,13 @@ int module_add_driver(struct module *mod, const struct device_driver *drv)</div><div class='ctx'> 	if (mod)</div><div class='ctx'> 		mk = &amp;mod-&gt;mkobj;</div><div class='ctx'> 	else if (drv-&gt;mod_name) {</div><div class='del'>-		struct kobject *mkobj;</div><div class='del'>-</div><div class='del'>-		/* Lookup built-in module entry in /sys/modules */</div><div class='del'>-		mkobj = kset_find_obj(module_kset, drv-&gt;mod_name);</div><div class='del'>-		if (mkobj) {</div><div class='del'>-			mk = container_of(mkobj, struct module_kobject, kobj);</div><div class='add'>+		/* Lookup or create built-in module entry in /sys/modules */</div><div class='add'>+		mk = lookup_or_create_module_kobject(drv-&gt;mod_name);</div><div class='add'>+		if (mk) {</div><div class='ctx'> 			/* remember our module structure */</div><div class='ctx'> 			drv-&gt;p-&gt;mkobj = mk;</div><div class='del'>-			/* kset_find_obj took a reference */</div><div class='del'>-			kobject_put(mkobj);</div><div class='add'>+			/* lookup_or_create_module_kobject took a reference */</div><div class='add'>+			kobject_put(&amp;mk-&gt;kobj);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/node.c b/drivers/base/node.c<br/>index cd13ef287011..618712071a1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/node.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/node.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/node.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/node.c</a></div><div class='hunk'>@@ -468,7 +468,7 @@ static ssize_t node_read_meminfo(struct device *dev,</div><div class='ctx'> 			     nid, K(node_page_state(pgdat, NR_PAGETABLE)),</div><div class='ctx'> 			     nid, K(node_page_state(pgdat, NR_SECONDARY_PAGETABLE)),</div><div class='ctx'> 			     nid, 0UL,</div><div class='del'>-			     nid, K(sum_zone_node_page_state(nid, NR_BOUNCE)),</div><div class='add'>+			     nid, 0UL,</div><div class='ctx'> 			     nid, K(node_page_state(pgdat, NR_WRITEBACK_TEMP)),</div><div class='ctx'> 			     nid, K(sreclaimable +</div><div class='ctx'> 				    node_page_state(pgdat, NR_KERNEL_MISC_RECLAIMABLE)),</div><div class='head'>diff --git a/drivers/base/platform-msi.c b/drivers/base/platform-msi.c<br/>index 0e60dd650b5e..70db08f3ac6f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/platform-msi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/platform-msi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/platform-msi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/platform-msi.c</a></div><div class='hunk'>@@ -95,5 +95,6 @@ EXPORT_SYMBOL_GPL(platform_device_msi_init_and_alloc_irqs);</div><div class='ctx'> void platform_device_msi_free_irqs_all(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	msi_domain_free_irqs_all(dev, MSI_DEFAULT_DOMAIN);</div><div class='add'>+	msi_remove_device_irq_domain(dev, MSI_DEFAULT_DOMAIN);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(platform_device_msi_free_irqs_all);</div><div class='head'>diff --git a/drivers/base/platform.c b/drivers/base/platform.c<br/>index 1813cfd0c4bd..075ec1d1b73a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/platform.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/platform.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/platform.c</a></div><div class='hunk'>@@ -982,7 +982,7 @@ struct platform_device * __init_or_module __platform_create_bundle(</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='del'>-	pdev = platform_device_alloc(driver-&gt;driver.name, -1);</div><div class='add'>+	pdev = platform_device_alloc(driver-&gt;driver.name, PLATFORM_DEVID_NONE);</div><div class='ctx'> 	if (!pdev) {</div><div class='ctx'> 		error = -ENOMEM;</div><div class='ctx'> 		goto err_out;</div><div class='hunk'>@@ -1440,7 +1440,7 @@ static void platform_shutdown(struct device *_dev)</div><div class='ctx'> </div><div class='ctx'> static int platform_dma_configure(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct platform_driver *drv = to_platform_driver(dev-&gt;driver);</div><div class='add'>+	struct device_driver *drv = READ_ONCE(dev-&gt;driver);</div><div class='ctx'> 	struct fwnode_handle *fwnode = dev_fwnode(dev);</div><div class='ctx'> 	enum dev_dma_attr attr;</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -1451,8 +1451,8 @@ static int platform_dma_configure(struct device *dev)</div><div class='ctx'> 		attr = acpi_get_dma_attr(to_acpi_device_node(fwnode));</div><div class='ctx'> 		ret = acpi_dma_configure(dev, attr);</div><div class='ctx'> 	}</div><div class='del'>-	/* @drv may not be valid when we're called from the IOMMU layer */</div><div class='del'>-	if (ret || !dev-&gt;driver || drv-&gt;driver_managed_dma)</div><div class='add'>+	/* @dev-&gt;driver may not be valid when we're called from the IOMMU layer */</div><div class='add'>+	if (ret || !drv || to_platform_driver(drv)-&gt;driver_managed_dma)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = iommu_device_use_default_domain(dev);</div><div class='head'>diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c<br/>index c8b0a9e29ed8..19fd55b8ac77 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/power/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/power/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/power/main.c</a></div><div class='hunk'>@@ -63,6 +63,7 @@ static LIST_HEAD(dpm_noirq_list);</div><div class='ctx'> static DEFINE_MUTEX(dpm_list_mtx);</div><div class='ctx'> static pm_message_t pm_transition;</div><div class='ctx'> </div><div class='add'>+static DEFINE_MUTEX(async_wip_mtx);</div><div class='ctx'> static int async_error;</div><div class='ctx'> </div><div class='ctx'> static const char *pm_verb(int event)</div><div class='hunk'>@@ -560,7 +561,7 @@ static void dpm_watchdog_clear(struct dpm_watchdog *wd)</div><div class='ctx'> 	struct timer_list *timer = &amp;wd-&gt;timer;</div><div class='ctx'> </div><div class='ctx'> 	timer_delete_sync(timer);</div><div class='del'>-	destroy_timer_on_stack(timer);</div><div class='add'>+	timer_destroy_on_stack(timer);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> #define DECLARE_DPM_WATCHDOG_ON_STACK(wd)</div><div class='hunk'>@@ -597,8 +598,11 @@ static bool is_async(struct device *dev)</div><div class='ctx'> 		&amp;&amp; !pm_trace_is_enabled();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dpm_async_fn(struct device *dev, async_func_t func)</div><div class='add'>+static bool __dpm_async(struct device *dev, async_func_t func)</div><div class='ctx'> {</div><div class='add'>+	if (dev-&gt;power.work_in_progress)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	if (!is_async(dev))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -611,14 +615,37 @@ static bool dpm_async_fn(struct device *dev, async_func_t func)</div><div class='ctx'> </div><div class='ctx'> 	put_device(dev);</div><div class='ctx'> </div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool dpm_async_fn(struct device *dev, async_func_t func)</div><div class='add'>+{</div><div class='add'>+	guard(mutex)(&amp;async_wip_mtx);</div><div class='add'>+</div><div class='add'>+	return __dpm_async(dev, func);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dpm_async_with_cleanup(struct device *dev, void *fn)</div><div class='add'>+{</div><div class='add'>+	guard(mutex)(&amp;async_wip_mtx);</div><div class='add'>+</div><div class='add'>+	if (!__dpm_async(dev, fn))</div><div class='add'>+		dev-&gt;power.work_in_progress = false;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dpm_async_resume_children(struct device *dev, async_func_t func)</div><div class='add'>+{</div><div class='ctx'> 	/*</div><div class='del'>-	 * async_schedule_dev_nocall() above has returned false, so func() is</div><div class='del'>-	 * not running and it is safe to update power.work_in_progress without</div><div class='del'>-	 * extra synchronization.</div><div class='add'>+	 * Start processing "async" children of the device unless it's been</div><div class='add'>+	 * started already for them.</div><div class='add'>+	 *</div><div class='add'>+	 * This could have been done for the device's "async" consumers too, but</div><div class='add'>+	 * they either need to wait for their parents or the processing has</div><div class='add'>+	 * already started for them after their parents were processed.</div><div class='ctx'> 	 */</div><div class='del'>-	dev-&gt;power.work_in_progress = false;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	device_for_each_child(dev, func, dpm_async_with_cleanup);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dpm_clear_async_state(struct device *dev)</div><div class='hunk'>@@ -627,6 +654,13 @@ static void dpm_clear_async_state(struct device *dev)</div><div class='ctx'> 	dev-&gt;power.work_in_progress = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool dpm_root_device(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return !dev-&gt;parent;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void async_resume_noirq(void *data, async_cookie_t cookie);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * device_resume_noirq - Execute a "noirq resume" callback for given device.</div><div class='ctx'>  * @dev: Device to handle.</div><div class='hunk'>@@ -710,6 +744,8 @@ Out:</div><div class='ctx'> 		dpm_save_failed_dev(dev_name(dev));</div><div class='ctx'> 		pm_dev_err(dev, state, async ? " async noirq" : " noirq", error);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	dpm_async_resume_children(dev, async_resume_noirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void async_resume_noirq(void *data, async_cookie_t cookie)</div><div class='hunk'>@@ -733,19 +769,20 @@ static void dpm_noirq_resume_devices(pm_message_t state)</div><div class='ctx'> 	mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Trigger the resume of "async" devices upfront so they don't have to</div><div class='del'>-	 * wait for the "non-async" ones they don't depend on.</div><div class='add'>+	 * Start processing "async" root devices upfront so they don't wait for</div><div class='add'>+	 * the "sync" devices they don't depend on.</div><div class='ctx'> 	 */</div><div class='ctx'> 	list_for_each_entry(dev, &amp;dpm_noirq_list, power.entry) {</div><div class='ctx'> 		dpm_clear_async_state(dev);</div><div class='del'>-		dpm_async_fn(dev, async_resume_noirq);</div><div class='add'>+		if (dpm_root_device(dev))</div><div class='add'>+			dpm_async_with_cleanup(dev, async_resume_noirq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	while (!list_empty(&amp;dpm_noirq_list)) {</div><div class='ctx'> 		dev = to_device(dpm_noirq_list.next);</div><div class='ctx'> 		list_move_tail(&amp;dev-&gt;power.entry, &amp;dpm_late_early_list);</div><div class='ctx'> </div><div class='del'>-		if (!dev-&gt;power.work_in_progress) {</div><div class='add'>+		if (!dpm_async_fn(dev, async_resume_noirq)) {</div><div class='ctx'> 			get_device(dev);</div><div class='ctx'> </div><div class='ctx'> 			mutex_unlock(&amp;dpm_list_mtx);</div><div class='hunk'>@@ -781,6 +818,8 @@ void dpm_resume_noirq(pm_message_t state)</div><div class='ctx'> 	device_wakeup_disarm_wake_irqs();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void async_resume_early(void *data, async_cookie_t cookie);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * device_resume_early - Execute an "early resume" callback for given device.</div><div class='ctx'>  * @dev: Device to handle.</div><div class='hunk'>@@ -848,6 +887,8 @@ Out:</div><div class='ctx'> 		dpm_save_failed_dev(dev_name(dev));</div><div class='ctx'> 		pm_dev_err(dev, state, async ? " async early" : " early", error);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	dpm_async_resume_children(dev, async_resume_early);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void async_resume_early(void *data, async_cookie_t cookie)</div><div class='hunk'>@@ -875,19 +916,20 @@ void dpm_resume_early(pm_message_t state)</div><div class='ctx'> 	mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Trigger the resume of "async" devices upfront so they don't have to</div><div class='del'>-	 * wait for the "non-async" ones they don't depend on.</div><div class='add'>+	 * Start processing "async" root devices upfront so they don't wait for</div><div class='add'>+	 * the "sync" devices they don't depend on.</div><div class='ctx'> 	 */</div><div class='ctx'> 	list_for_each_entry(dev, &amp;dpm_late_early_list, power.entry) {</div><div class='ctx'> 		dpm_clear_async_state(dev);</div><div class='del'>-		dpm_async_fn(dev, async_resume_early);</div><div class='add'>+		if (dpm_root_device(dev))</div><div class='add'>+			dpm_async_with_cleanup(dev, async_resume_early);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	while (!list_empty(&amp;dpm_late_early_list)) {</div><div class='ctx'> 		dev = to_device(dpm_late_early_list.next);</div><div class='ctx'> 		list_move_tail(&amp;dev-&gt;power.entry, &amp;dpm_suspended_list);</div><div class='ctx'> </div><div class='del'>-		if (!dev-&gt;power.work_in_progress) {</div><div class='add'>+		if (!dpm_async_fn(dev, async_resume_early)) {</div><div class='ctx'> 			get_device(dev);</div><div class='ctx'> </div><div class='ctx'> 			mutex_unlock(&amp;dpm_list_mtx);</div><div class='hunk'>@@ -919,6 +961,8 @@ void dpm_resume_start(pm_message_t state)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(dpm_resume_start);</div><div class='ctx'> </div><div class='add'>+static void async_resume(void *data, async_cookie_t cookie);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * device_resume - Execute "resume" callbacks for given device.</div><div class='ctx'>  * @dev: Device to handle.</div><div class='hunk'>@@ -1018,6 +1062,8 @@ static void device_resume(struct device *dev, pm_message_t state, bool async)</div><div class='ctx'> 		dpm_save_failed_dev(dev_name(dev));</div><div class='ctx'> 		pm_dev_err(dev, state, async ? " async" : "", error);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	dpm_async_resume_children(dev, async_resume);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void async_resume(void *data, async_cookie_t cookie)</div><div class='hunk'>@@ -1049,19 +1095,20 @@ void dpm_resume(pm_message_t state)</div><div class='ctx'> 	mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Trigger the resume of "async" devices upfront so they don't have to</div><div class='del'>-	 * wait for the "non-async" ones they don't depend on.</div><div class='add'>+	 * Start processing "async" root devices upfront so they don't wait for</div><div class='add'>+	 * the "sync" devices they don't depend on.</div><div class='ctx'> 	 */</div><div class='ctx'> 	list_for_each_entry(dev, &amp;dpm_suspended_list, power.entry) {</div><div class='ctx'> 		dpm_clear_async_state(dev);</div><div class='del'>-		dpm_async_fn(dev, async_resume);</div><div class='add'>+		if (dpm_root_device(dev))</div><div class='add'>+			dpm_async_with_cleanup(dev, async_resume);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	while (!list_empty(&amp;dpm_suspended_list)) {</div><div class='ctx'> 		dev = to_device(dpm_suspended_list.next);</div><div class='ctx'> 		list_move_tail(&amp;dev-&gt;power.entry, &amp;dpm_prepared_list);</div><div class='ctx'> </div><div class='del'>-		if (!dev-&gt;power.work_in_progress) {</div><div class='add'>+		if (!dpm_async_fn(dev, async_resume)) {</div><div class='ctx'> 			get_device(dev);</div><div class='ctx'> </div><div class='ctx'> 			mutex_unlock(&amp;dpm_list_mtx);</div><div class='hunk'>@@ -1189,6 +1236,41 @@ EXPORT_SYMBOL_GPL(dpm_resume_end);</div><div class='ctx'> </div><div class='ctx'> /*------------------------- Suspend routines -------------------------*/</div><div class='ctx'> </div><div class='add'>+static bool dpm_leaf_device(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct device *child;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;dpm_list_mtx);</div><div class='add'>+</div><div class='add'>+	child = device_find_any_child(dev);</div><div class='add'>+	if (child) {</div><div class='add'>+		put_device(child);</div><div class='add'>+</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dpm_async_suspend_parent(struct device *dev, async_func_t func)</div><div class='add'>+{</div><div class='add'>+	guard(mutex)(&amp;dpm_list_mtx);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the device is suspended asynchronously and the parent's callback</div><div class='add'>+	 * deletes both the device and the parent itself, the parent object may</div><div class='add'>+	 * be freed while this function is running, so avoid that by checking</div><div class='add'>+	 * if the device has been deleted already as the parent cannot be</div><div class='add'>+	 * deleted before it.</div><div class='add'>+	 */</div><div class='add'>+	if (!device_pm_initialized(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Start processing the device's parent if it is "async". */</div><div class='add'>+	if (dev-&gt;parent)</div><div class='add'>+		dpm_async_with_cleanup(dev-&gt;parent, func);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * resume_event - Return a "resume" message for given "suspend" sleep state.</div><div class='ctx'>  * @sleep_state: PM message representing a sleep state.</div><div class='hunk'>@@ -1226,6 +1308,8 @@ static void dpm_superior_set_must_resume(struct device *dev)</div><div class='ctx'> 	device_links_read_unlock(idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void async_suspend_noirq(void *data, async_cookie_t cookie);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * device_suspend_noirq - Execute a "noirq suspend" callback for given device.</div><div class='ctx'>  * @dev: Device to handle.</div><div class='hunk'>@@ -1304,7 +1388,13 @@ Skip:</div><div class='ctx'> Complete:</div><div class='ctx'> 	complete_all(&amp;dev-&gt;power.completion);</div><div class='ctx'> 	TRACE_SUSPEND(error);</div><div class='del'>-	return error;</div><div class='add'>+</div><div class='add'>+	if (error || async_error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	dpm_async_suspend_parent(dev, async_suspend_noirq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void async_suspend_noirq(void *data, async_cookie_t cookie)</div><div class='hunk'>@@ -1318,6 +1408,7 @@ static void async_suspend_noirq(void *data, async_cookie_t cookie)</div><div class='ctx'> static int dpm_noirq_suspend_devices(pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	ktime_t starttime = ktime_get();</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	int error = 0;</div><div class='ctx'> </div><div class='ctx'> 	trace_suspend_resume(TPS("dpm_suspend_noirq"), state.event, true);</div><div class='hunk'>@@ -1327,12 +1418,21 @@ static int dpm_noirq_suspend_devices(pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Start processing "async" leaf devices upfront so they don't need to</div><div class='add'>+	 * wait for the "sync" devices they don't depend on.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry_reverse(dev, &amp;dpm_late_early_list, power.entry) {</div><div class='add'>+		dpm_clear_async_state(dev);</div><div class='add'>+		if (dpm_leaf_device(dev))</div><div class='add'>+			dpm_async_with_cleanup(dev, async_suspend_noirq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	while (!list_empty(&amp;dpm_late_early_list)) {</div><div class='del'>-		struct device *dev = to_device(dpm_late_early_list.prev);</div><div class='add'>+		dev = to_device(dpm_late_early_list.prev);</div><div class='ctx'> </div><div class='ctx'> 		list_move(&amp;dev-&gt;power.entry, &amp;dpm_noirq_list);</div><div class='ctx'> </div><div class='del'>-		dpm_clear_async_state(dev);</div><div class='ctx'> 		if (dpm_async_fn(dev, async_suspend_noirq))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1346,8 +1446,14 @@ static int dpm_noirq_suspend_devices(pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='del'>-		if (error || async_error)</div><div class='add'>+		if (error || async_error) {</div><div class='add'>+			/*</div><div class='add'>+			 * Move all devices to the target list to resume them</div><div class='add'>+			 * properly.</div><div class='add'>+			 */</div><div class='add'>+			list_splice(&amp;dpm_late_early_list, &amp;dpm_noirq_list);</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dpm_list_mtx);</div><div class='hunk'>@@ -1400,6 +1506,8 @@ static void dpm_propagate_wakeup_to_parent(struct device *dev)</div><div class='ctx'> 	spin_unlock_irq(&amp;parent-&gt;power.lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void async_suspend_late(void *data, async_cookie_t cookie);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * device_suspend_late - Execute a "late suspend" callback for given device.</div><div class='ctx'>  * @dev: Device to handle.</div><div class='hunk'>@@ -1476,7 +1584,13 @@ Skip:</div><div class='ctx'> Complete:</div><div class='ctx'> 	TRACE_SUSPEND(error);</div><div class='ctx'> 	complete_all(&amp;dev-&gt;power.completion);</div><div class='del'>-	return error;</div><div class='add'>+</div><div class='add'>+	if (error || async_error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	dpm_async_suspend_parent(dev, async_suspend_late);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void async_suspend_late(void *data, async_cookie_t cookie)</div><div class='hunk'>@@ -1494,6 +1608,7 @@ static void async_suspend_late(void *data, async_cookie_t cookie)</div><div class='ctx'> int dpm_suspend_late(pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	ktime_t starttime = ktime_get();</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	int error = 0;</div><div class='ctx'> </div><div class='ctx'> 	trace_suspend_resume(TPS("dpm_suspend_late"), state.event, true);</div><div class='hunk'>@@ -1505,12 +1620,21 @@ int dpm_suspend_late(pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Start processing "async" leaf devices upfront so they don't need to</div><div class='add'>+	 * wait for the "sync" devices they don't depend on.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry_reverse(dev, &amp;dpm_suspended_list, power.entry) {</div><div class='add'>+		dpm_clear_async_state(dev);</div><div class='add'>+		if (dpm_leaf_device(dev))</div><div class='add'>+			dpm_async_with_cleanup(dev, async_suspend_late);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	while (!list_empty(&amp;dpm_suspended_list)) {</div><div class='del'>-		struct device *dev = to_device(dpm_suspended_list.prev);</div><div class='add'>+		dev = to_device(dpm_suspended_list.prev);</div><div class='ctx'> </div><div class='ctx'> 		list_move(&amp;dev-&gt;power.entry, &amp;dpm_late_early_list);</div><div class='ctx'> </div><div class='del'>-		dpm_clear_async_state(dev);</div><div class='ctx'> 		if (dpm_async_fn(dev, async_suspend_late))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1524,8 +1648,14 @@ int dpm_suspend_late(pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='del'>-		if (error || async_error)</div><div class='add'>+		if (error || async_error) {</div><div class='add'>+			/*</div><div class='add'>+			 * Move all devices to the target list to resume them</div><div class='add'>+			 * properly.</div><div class='add'>+			 */</div><div class='add'>+			list_splice(&amp;dpm_suspended_list, &amp;dpm_late_early_list);</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dpm_list_mtx);</div><div class='hunk'>@@ -1614,6 +1744,8 @@ static void dpm_clear_superiors_direct_complete(struct device *dev)</div><div class='ctx'> 	device_links_read_unlock(idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void async_suspend(void *data, async_cookie_t cookie);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * device_suspend - Execute "suspend" callbacks for given device.</div><div class='ctx'>  * @dev: Device to handle.</div><div class='hunk'>@@ -1743,7 +1875,13 @@ static int device_suspend(struct device *dev, pm_message_t state, bool async)</div><div class='ctx'> </div><div class='ctx'> 	complete_all(&amp;dev-&gt;power.completion);</div><div class='ctx'> 	TRACE_SUSPEND(error);</div><div class='del'>-	return error;</div><div class='add'>+</div><div class='add'>+	if (error || async_error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	dpm_async_suspend_parent(dev, async_suspend);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void async_suspend(void *data, async_cookie_t cookie)</div><div class='hunk'>@@ -1761,6 +1899,7 @@ static void async_suspend(void *data, async_cookie_t cookie)</div><div class='ctx'> int dpm_suspend(pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	ktime_t starttime = ktime_get();</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	int error = 0;</div><div class='ctx'> </div><div class='ctx'> 	trace_suspend_resume(TPS("dpm_suspend"), state.event, true);</div><div class='hunk'>@@ -1774,12 +1913,21 @@ int dpm_suspend(pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Start processing "async" leaf devices upfront so they don't need to</div><div class='add'>+	 * wait for the "sync" devices they don't depend on.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry_reverse(dev, &amp;dpm_prepared_list, power.entry) {</div><div class='add'>+		dpm_clear_async_state(dev);</div><div class='add'>+		if (dpm_leaf_device(dev))</div><div class='add'>+			dpm_async_with_cleanup(dev, async_suspend);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	while (!list_empty(&amp;dpm_prepared_list)) {</div><div class='del'>-		struct device *dev = to_device(dpm_prepared_list.prev);</div><div class='add'>+		dev = to_device(dpm_prepared_list.prev);</div><div class='ctx'> </div><div class='ctx'> 		list_move(&amp;dev-&gt;power.entry, &amp;dpm_suspended_list);</div><div class='ctx'> </div><div class='del'>-		dpm_clear_async_state(dev);</div><div class='ctx'> 		if (dpm_async_fn(dev, async_suspend))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1793,8 +1941,14 @@ int dpm_suspend(pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;dpm_list_mtx);</div><div class='ctx'> </div><div class='del'>-		if (error || async_error)</div><div class='add'>+		if (error || async_error) {</div><div class='add'>+			/*</div><div class='add'>+			 * Move all devices to the target list to resume them</div><div class='add'>+			 * properly.</div><div class='add'>+			 */</div><div class='add'>+			list_splice(&amp;dpm_prepared_list, &amp;dpm_suspended_list);</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dpm_list_mtx);</div><div class='head'>diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c<br/>index 0e127b0329c0..c55a7c70bc1a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/power/runtime.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/runtime.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/power/runtime.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/power/runtime.c</a></div><div class='hunk'>@@ -1011,7 +1011,7 @@ static enum hrtimer_restart  pm_suspend_timer_fn(struct hrtimer *timer)</div><div class='ctx'> 	 * If 'expires' is after the current time, we've been called</div><div class='ctx'> 	 * too early.</div><div class='ctx'> 	 */</div><div class='del'>-	if (expires &gt; 0 &amp;&amp; expires &lt; ktime_get_mono_fast_ns()) {</div><div class='add'>+	if (expires &gt; 0 &amp;&amp; expires &lt;= ktime_get_mono_fast_ns()) {</div><div class='ctx'> 		dev-&gt;power.timer_expires = 0;</div><div class='ctx'> 		rpm_suspend(dev, dev-&gt;power.timer_autosuspends ?</div><div class='ctx'> 		    (RPM_ASYNC | RPM_AUTO) : RPM_ASYNC);</div><div class='hunk'>@@ -1568,6 +1568,32 @@ out:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pm_runtime_enable);</div><div class='ctx'> </div><div class='add'>+static void pm_runtime_set_suspended_action(void *data)</div><div class='add'>+{</div><div class='add'>+	pm_runtime_set_suspended(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_pm_runtime_set_active_enabled - set_active version of devm_pm_runtime_enable.</div><div class='add'>+ *</div><div class='add'>+ * @dev: Device to handle.</div><div class='add'>+ */</div><div class='add'>+int devm_pm_runtime_set_active_enabled(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_set_active(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = devm_add_action_or_reset(dev, pm_runtime_set_suspended_action, dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return devm_pm_runtime_enable(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_pm_runtime_set_active_enabled);</div><div class='add'>+</div><div class='ctx'> static void pm_runtime_disable_action(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	pm_runtime_dont_use_autosuspend(data);</div><div class='hunk'>@@ -1590,6 +1616,24 @@ int devm_pm_runtime_enable(struct device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_pm_runtime_enable);</div><div class='ctx'> </div><div class='add'>+static void pm_runtime_put_noidle_action(void *data)</div><div class='add'>+{</div><div class='add'>+	pm_runtime_put_noidle(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_pm_runtime_get_noresume - devres-enabled version of pm_runtime_get_noresume.</div><div class='add'>+ *</div><div class='add'>+ * @dev: Device to handle.</div><div class='add'>+ */</div><div class='add'>+int devm_pm_runtime_get_noresume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	pm_runtime_get_noresume(dev);</div><div class='add'>+</div><div class='add'>+	return devm_add_action_or_reset(dev, pm_runtime_put_noidle_action, dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_pm_runtime_get_noresume);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * pm_runtime_forbid - Block runtime PM of a device.</div><div class='ctx'>  * @dev: Device to handle.</div><div class='head'>diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c<br/>index f84018125b46..13b31a3adc77 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/power/sysfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/power/sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/power/sysfs.c</a></div><div class='hunk'>@@ -611,15 +611,9 @@ static DEVICE_ATTR_RW(async);</div><div class='ctx'> #endif /* CONFIG_PM_ADVANCED_DEBUG */</div><div class='ctx'> </div><div class='ctx'> static struct attribute *power_attrs[] = {</div><div class='del'>-#ifdef CONFIG_PM_ADVANCED_DEBUG</div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='add'>+#if defined(CONFIG_PM_ADVANCED_DEBUG) &amp;&amp; defined(CONFIG_PM_SLEEP)</div><div class='ctx'> 	&amp;dev_attr_async.attr,</div><div class='ctx'> #endif</div><div class='del'>-	&amp;dev_attr_runtime_status.attr,</div><div class='del'>-	&amp;dev_attr_runtime_usage.attr,</div><div class='del'>-	&amp;dev_attr_runtime_active_kids.attr,</div><div class='del'>-	&amp;dev_attr_runtime_enabled.attr,</div><div class='del'>-#endif /* CONFIG_PM_ADVANCED_DEBUG */</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> static const struct attribute_group pm_attr_group = {</div><div class='hunk'>@@ -650,13 +644,16 @@ static const struct attribute_group pm_wakeup_attr_group = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct attribute *runtime_attrs[] = {</div><div class='del'>-#ifndef CONFIG_PM_ADVANCED_DEBUG</div><div class='ctx'> 	&amp;dev_attr_runtime_status.attr,</div><div class='del'>-#endif</div><div class='ctx'> 	&amp;dev_attr_control.attr,</div><div class='ctx'> 	&amp;dev_attr_runtime_suspended_time.attr,</div><div class='ctx'> 	&amp;dev_attr_runtime_active_time.attr,</div><div class='ctx'> 	&amp;dev_attr_autosuspend_delay_ms.attr,</div><div class='add'>+#ifdef CONFIG_PM_ADVANCED_DEBUG</div><div class='add'>+	&amp;dev_attr_runtime_usage.attr,</div><div class='add'>+	&amp;dev_attr_runtime_active_kids.attr,</div><div class='add'>+	&amp;dev_attr_runtime_enabled.attr,</div><div class='add'>+#endif</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> static const struct attribute_group pm_runtime_attr_group = {</div><div class='head'>diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c<br/>index 63bf914a4d44..f7c96a3bf719 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/power/wakeup.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/wakeup.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/power/wakeup.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/power/wakeup.c</a></div><div class='hunk'>@@ -77,7 +77,7 @@ static DEFINE_IDA(wakeup_ida);</div><div class='ctx'>  * wakeup_source_create - Create a struct wakeup_source object.</div><div class='ctx'>  * @name: Name of the new wakeup source.</div><div class='ctx'>  */</div><div class='del'>-struct wakeup_source *wakeup_source_create(const char *name)</div><div class='add'>+static struct wakeup_source *wakeup_source_create(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct wakeup_source *ws;</div><div class='ctx'> 	const char *ws_name;</div><div class='hunk'>@@ -106,7 +106,6 @@ err_name:</div><div class='ctx'> err_ws:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(wakeup_source_create);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Record wakeup_source statistics being deleted into a dummy wakeup_source.</div><div class='hunk'>@@ -149,7 +148,7 @@ static void wakeup_source_free(struct wakeup_source *ws)</div><div class='ctx'>  *</div><div class='ctx'>  * Use only for wakeup source objects created with wakeup_source_create().</div><div class='ctx'>  */</div><div class='del'>-void wakeup_source_destroy(struct wakeup_source *ws)</div><div class='add'>+static void wakeup_source_destroy(struct wakeup_source *ws)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ws)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -158,13 +157,12 @@ void wakeup_source_destroy(struct wakeup_source *ws)</div><div class='ctx'> 	wakeup_source_record(ws);</div><div class='ctx'> 	wakeup_source_free(ws);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(wakeup_source_destroy);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * wakeup_source_add - Add given object to the list of wakeup sources.</div><div class='ctx'>  * @ws: Wakeup source object to add to the list.</div><div class='ctx'>  */</div><div class='del'>-void wakeup_source_add(struct wakeup_source *ws)</div><div class='add'>+static void wakeup_source_add(struct wakeup_source *ws)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -179,13 +177,12 @@ void wakeup_source_add(struct wakeup_source *ws)</div><div class='ctx'> 	list_add_rcu(&amp;ws-&gt;entry, &amp;wakeup_sources);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;events_lock, flags);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(wakeup_source_add);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * wakeup_source_remove - Remove given object from the wakeup sources list.</div><div class='ctx'>  * @ws: Wakeup source object to remove from the list.</div><div class='ctx'>  */</div><div class='del'>-void wakeup_source_remove(struct wakeup_source *ws)</div><div class='add'>+static void wakeup_source_remove(struct wakeup_source *ws)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -204,7 +201,6 @@ void wakeup_source_remove(struct wakeup_source *ws)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ws-&gt;timer.function = NULL;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(wakeup_source_remove);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * wakeup_source_register - Create wakeup source and add it to the list.</div><div class='hunk'>@@ -337,7 +333,7 @@ int device_wakeup_enable(struct device *dev)</div><div class='ctx'> 	if (!dev || !dev-&gt;power.can_wakeup)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (pm_suspend_target_state != PM_SUSPEND_ON)</div><div class='add'>+	if (pm_sleep_transition_in_progress())</div><div class='ctx'> 		dev_dbg(dev, "Suspicious %s() during system transition!\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	ws = wakeup_source_register(dev, dev_name(dev));</div><div class='head'>diff --git a/drivers/base/power/wakeup_stats.c b/drivers/base/power/wakeup_stats.c<br/>index 6732ed2869f9..3ffd427248e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/power/wakeup_stats.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/power/wakeup_stats.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/power/wakeup_stats.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/power/wakeup_stats.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@ wakeup_attr(active_count);</div><div class='ctx'> wakeup_attr(event_count);</div><div class='ctx'> wakeup_attr(wakeup_count);</div><div class='ctx'> wakeup_attr(expire_count);</div><div class='add'>+wakeup_attr(relax_count);</div><div class='ctx'> </div><div class='ctx'> static ssize_t active_time_ms_show(struct device *dev,</div><div class='ctx'> 				   struct device_attribute *attr, char *buf)</div><div class='hunk'>@@ -119,6 +120,7 @@ static struct attribute *wakeup_source_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_event_count.attr,</div><div class='ctx'> 	&amp;dev_attr_wakeup_count.attr,</div><div class='ctx'> 	&amp;dev_attr_expire_count.attr,</div><div class='add'>+	&amp;dev_attr_relax_count.attr,</div><div class='ctx'> 	&amp;dev_attr_active_time_ms.attr,</div><div class='ctx'> 	&amp;dev_attr_total_time_ms.attr,</div><div class='ctx'> 	&amp;dev_attr_max_time_ms.attr,</div><div class='head'>diff --git a/drivers/base/regmap/Kconfig b/drivers/base/regmap/Kconfig<br/>index b1affac70d5d..ffb2ef488298 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/regmap/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/regmap/Kconfig</a></div><div class='hunk'>@@ -6,8 +6,6 @@</div><div class='ctx'> config REGMAP</div><div class='ctx'> 	bool</div><div class='ctx'> 	default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SOUNDWIRE || REGMAP_SOUNDWIRE_MBQ || REGMAP_SCCB || REGMAP_I3C || REGMAP_SPI_AVMM || REGMAP_MDIO || REGMAP_FSI)</div><div class='del'>-	select IRQ_DOMAIN if REGMAP_IRQ</div><div class='del'>-	select MDIO_BUS if REGMAP_MDIO</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable support for the Register Map (regmap) access API.</div><div class='ctx'> </div><div class='hunk'>@@ -58,12 +56,14 @@ config REGMAP_W1</div><div class='ctx'> </div><div class='ctx'> config REGMAP_MDIO</div><div class='ctx'> 	tristate</div><div class='add'>+	select MDIO_BUS</div><div class='ctx'> </div><div class='ctx'> config REGMAP_MMIO</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='ctx'> config REGMAP_IRQ</div><div class='ctx'> 	bool</div><div class='add'>+	select IRQ_DOMAIN</div><div class='ctx'> </div><div class='ctx'> config REGMAP_RAM</div><div class='ctx'> 	tristate</div><div class='head'>diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c<br/>index f7fcf2de1301..c7650fa434ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regcache.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/regmap/regcache.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regcache.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/regmap/regcache.c</a></div><div class='hunk'>@@ -34,21 +34,10 @@ static int regcache_defaults_cmp(const void *a, const void *b)</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void regcache_defaults_swap(void *a, void *b, int size)</div><div class='del'>-{</div><div class='del'>-	struct reg_default *x = a;</div><div class='del'>-	struct reg_default *y = b;</div><div class='del'>-	struct reg_default tmp;</div><div class='del'>-</div><div class='del'>-	tmp = *x;</div><div class='del'>-	*x = *y;</div><div class='del'>-	*y = tmp;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void regcache_sort_defaults(struct reg_default *defaults, unsigned int ndefaults)</div><div class='ctx'> {</div><div class='ctx'> 	sort(defaults, ndefaults, sizeof(*defaults),</div><div class='del'>-	     regcache_defaults_cmp, regcache_defaults_swap);</div><div class='add'>+	     regcache_defaults_cmp, NULL);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(regcache_sort_defaults);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c<br/>index 6c6869188c31..d1585f073776 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/regmap/regmap-irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/regmap/regmap-irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/regmap/regmap-irq.c</a></div><div class='hunk'>@@ -6,11 +6,13 @@</div><div class='ctx'> //</div><div class='ctx'> // Author: Mark Brown &lt;broonie@opensource.wolfsonmicro.com&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/overflow.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -33,6 +35,7 @@ struct regmap_irq_chip_data {</div><div class='ctx'> 	void *status_reg_buf;</div><div class='ctx'> 	unsigned int *main_status_buf;</div><div class='ctx'> 	unsigned int *status_buf;</div><div class='add'>+	unsigned int *prev_status_buf;</div><div class='ctx'> 	unsigned int *mask_buf;</div><div class='ctx'> 	unsigned int *mask_buf_def;</div><div class='ctx'> 	unsigned int *wake_buf;</div><div class='hunk'>@@ -193,10 +196,10 @@ static void regmap_irq_sync_unlock(struct irq_data *data)</div><div class='ctx'> 	/* If we've changed our wakeup count propagate it to the parent */</div><div class='ctx'> 	if (d-&gt;wake_count &lt; 0)</div><div class='ctx'> 		for (i = d-&gt;wake_count; i &lt; 0; i++)</div><div class='del'>-			irq_set_irq_wake(d-&gt;irq, 0);</div><div class='add'>+			disable_irq_wake(d-&gt;irq);</div><div class='ctx'> 	else if (d-&gt;wake_count &gt; 0)</div><div class='ctx'> 		for (i = 0; i &lt; d-&gt;wake_count; i++)</div><div class='del'>-			irq_set_irq_wake(d-&gt;irq, 1);</div><div class='add'>+			enable_irq_wake(d-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	d-&gt;wake_count = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -332,27 +335,13 @@ static inline int read_sub_irq_data(struct regmap_irq_chip_data *data,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='add'>+static int read_irq_data(struct regmap_irq_chip_data *data)</div><div class='ctx'> {</div><div class='del'>-	struct regmap_irq_chip_data *data = d;</div><div class='ctx'> 	const struct regmap_irq_chip *chip = data-&gt;chip;</div><div class='ctx'> 	struct regmap *map = data-&gt;map;</div><div class='ctx'> 	int ret, i;</div><div class='del'>-	bool handled = false;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	if (chip-&gt;handle_pre_irq)</div><div class='del'>-		chip-&gt;handle_pre_irq(chip-&gt;irq_drv_data);</div><div class='del'>-</div><div class='del'>-	if (chip-&gt;runtime_pm) {</div><div class='del'>-		ret = pm_runtime_get_sync(map-&gt;dev);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			dev_err(map-&gt;dev, "IRQ thread failed to resume: %d\n",</div><div class='del'>-				ret);</div><div class='del'>-			goto exit;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Read only registers with active IRQs if the chip has 'main status</div><div class='ctx'> 	 * register'. Else read in the statuses, using a single bulk read if</div><div class='hunk'>@@ -379,10 +368,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 			reg = data-&gt;get_irq_reg(data, chip-&gt;main_status, i);</div><div class='ctx'> 			ret = regmap_read(map, reg, &amp;data-&gt;main_status_buf[i]);</div><div class='ctx'> 			if (ret) {</div><div class='del'>-				dev_err(map-&gt;dev,</div><div class='del'>-					"Failed to read IRQ status %d\n",</div><div class='del'>-					ret);</div><div class='del'>-				goto exit;</div><div class='add'>+				dev_err(map-&gt;dev, "Failed to read IRQ status %d\n", ret);</div><div class='add'>+				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -398,10 +385,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 				ret = read_sub_irq_data(data, b);</div><div class='ctx'> </div><div class='ctx'> 				if (ret != 0) {</div><div class='del'>-					dev_err(map-&gt;dev,</div><div class='del'>-						"Failed to read IRQ status %d\n",</div><div class='del'>-						ret);</div><div class='del'>-					goto exit;</div><div class='add'>+					dev_err(map-&gt;dev, "Failed to read IRQ status %d\n", ret);</div><div class='add'>+					return ret;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -418,9 +403,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 				       data-&gt;status_reg_buf,</div><div class='ctx'> 				       chip-&gt;num_regs);</div><div class='ctx'> 		if (ret != 0) {</div><div class='del'>-			dev_err(map-&gt;dev, "Failed to read IRQ status: %d\n",</div><div class='del'>-				ret);</div><div class='del'>-			goto exit;</div><div class='add'>+			dev_err(map-&gt;dev, "Failed to read IRQ status: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; data-&gt;chip-&gt;num_regs; i++) {</div><div class='hunk'>@@ -436,7 +420,7 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='ctx'> 				BUG();</div><div class='del'>-				goto exit;</div><div class='add'>+				return -EIO;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -447,10 +431,8 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 			ret = regmap_read(map, reg, &amp;data-&gt;status_buf[i]);</div><div class='ctx'> </div><div class='ctx'> 			if (ret != 0) {</div><div class='del'>-				dev_err(map-&gt;dev,</div><div class='del'>-					"Failed to read IRQ status: %d\n",</div><div class='del'>-					ret);</div><div class='del'>-				goto exit;</div><div class='add'>+				dev_err(map-&gt;dev, "Failed to read IRQ status: %d\n", ret);</div><div class='add'>+				return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -459,6 +441,42 @@ static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='ctx'> 		for (i = 0; i &lt; data-&gt;chip-&gt;num_regs; i++)</div><div class='ctx'> 			data-&gt;status_buf[i] = ~data-&gt;status_buf[i];</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t regmap_irq_thread(int irq, void *d)</div><div class='add'>+{</div><div class='add'>+	struct regmap_irq_chip_data *data = d;</div><div class='add'>+	const struct regmap_irq_chip *chip = data-&gt;chip;</div><div class='add'>+	struct regmap *map = data-&gt;map;</div><div class='add'>+	int ret, i;</div><div class='add'>+	bool handled = false;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;handle_pre_irq)</div><div class='add'>+		chip-&gt;handle_pre_irq(chip-&gt;irq_drv_data);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;runtime_pm) {</div><div class='add'>+		ret = pm_runtime_get_sync(map-&gt;dev);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(map-&gt;dev, "IRQ thread failed to resume: %d\n", ret);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = read_irq_data(data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;status_is_level) {</div><div class='add'>+		for (i = 0; i &lt; data-&gt;chip-&gt;num_regs; i++) {</div><div class='add'>+			unsigned int val = data-&gt;status_buf[i];</div><div class='add'>+</div><div class='add'>+			data-&gt;status_buf[i] ^= data-&gt;prev_status_buf[i];</div><div class='add'>+			data-&gt;prev_status_buf[i] = val;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Ignore masked IRQs and ack if we need to; we ack early so</div><div class='ctx'> 	 * there is no race between handling and acknowledging the</div><div class='hunk'>@@ -705,6 +723,13 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,</div><div class='ctx'> 	if (!d-&gt;status_buf)</div><div class='ctx'> 		goto err_alloc;</div><div class='ctx'> </div><div class='add'>+	if (chip-&gt;status_is_level) {</div><div class='add'>+		d-&gt;prev_status_buf = kcalloc(chip-&gt;num_regs, sizeof(*d-&gt;prev_status_buf),</div><div class='add'>+					     GFP_KERNEL);</div><div class='add'>+		if (!d-&gt;prev_status_buf)</div><div class='add'>+			goto err_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	d-&gt;mask_buf = kcalloc(chip-&gt;num_regs, sizeof(*d-&gt;mask_buf),</div><div class='ctx'> 			      GFP_KERNEL);</div><div class='ctx'> 	if (!d-&gt;mask_buf)</div><div class='hunk'>@@ -881,6 +906,16 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Store current levels */</div><div class='add'>+	if (chip-&gt;status_is_level) {</div><div class='add'>+		ret = read_irq_data(d);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err_alloc;</div><div class='add'>+</div><div class='add'>+		memcpy(d-&gt;prev_status_buf, d-&gt;status_buf,</div><div class='add'>+		       array_size(d-&gt;chip-&gt;num_regs, sizeof(d-&gt;prev_status_buf[0])));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = regmap_irq_create_domain(fwnode, irq_base, chip, d);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_alloc;</div><div class='hunk'>@@ -908,6 +943,7 @@ err_alloc:</div><div class='ctx'> 	kfree(d-&gt;mask_buf);</div><div class='ctx'> 	kfree(d-&gt;main_status_buf);</div><div class='ctx'> 	kfree(d-&gt;status_buf);</div><div class='add'>+	kfree(d-&gt;prev_status_buf);</div><div class='ctx'> 	kfree(d-&gt;status_reg_buf);</div><div class='ctx'> 	if (d-&gt;config_buf) {</div><div class='ctx'> 		for (i = 0; i &lt; chip-&gt;num_config_bases; i++)</div><div class='hunk'>@@ -985,6 +1021,7 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)</div><div class='ctx'> 	kfree(d-&gt;main_status_buf);</div><div class='ctx'> 	kfree(d-&gt;status_reg_buf);</div><div class='ctx'> 	kfree(d-&gt;status_buf);</div><div class='add'>+	kfree(d-&gt;prev_status_buf);</div><div class='ctx'> 	if (d-&gt;config_buf) {</div><div class='ctx'> 		for (i = 0; i &lt; d-&gt;chip-&gt;num_config_bases; i++)</div><div class='ctx'> 			kfree(d-&gt;config_buf[i]);</div><div class='head'>diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c<br/>index b1726a3515f6..deda7f35a059 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/swnode.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/swnode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/swnode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/swnode.c</a></div><div class='hunk'>@@ -529,7 +529,7 @@ software_node_get_reference_args(const struct fwnode_handle *fwnode,</div><div class='ctx'> 	if (prop-&gt;is_inline)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (index * sizeof(*ref) &gt;= prop-&gt;length)</div><div class='add'>+	if ((index + 1) * sizeof(*ref) &gt; prop-&gt;length)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	ref_array = prop-&gt;pointer;</div><div class='hunk'>@@ -1080,6 +1080,7 @@ void software_node_notify(struct device *dev)</div><div class='ctx'> 	if (!swnode)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	kobject_get(&amp;swnode-&gt;kobj);</div><div class='ctx'> 	ret = sysfs_create_link(&amp;dev-&gt;kobj, &amp;swnode-&gt;kobj, "software_node");</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1089,8 +1090,6 @@ void software_node_notify(struct device *dev)</div><div class='ctx'> 		sysfs_remove_link(&amp;dev-&gt;kobj, "software_node");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	kobject_get(&amp;swnode-&gt;kobj);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void software_node_notify_remove(struct device *dev)</div><div class='head'>diff --git a/drivers/base/topology.c b/drivers/base/topology.c<br/>index b962da263eee..8b42df05feff 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/base/topology.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/base/topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/base/topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/base/topology.c</a></div><div class='hunk'>@@ -208,3 +208,55 @@ static int __init topology_sysfs_init(void)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> device_initcall(topology_sysfs_init);</div><div class='add'>+</div><div class='add'>+DEFINE_PER_CPU(unsigned long, cpu_scale) = SCHED_CAPACITY_SCALE;</div><div class='add'>+EXPORT_PER_CPU_SYMBOL_GPL(cpu_scale);</div><div class='add'>+</div><div class='add'>+void topology_set_cpu_scale(unsigned int cpu, unsigned long capacity)</div><div class='add'>+{</div><div class='add'>+	per_cpu(cpu_scale, cpu) = capacity;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t cpu_capacity_show(struct device *dev,</div><div class='add'>+				 struct device_attribute *attr,</div><div class='add'>+				 char *buf)</div><div class='add'>+{</div><div class='add'>+	struct cpu *cpu = container_of(dev, struct cpu, dev);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%lu\n", topology_get_cpu_scale(cpu-&gt;dev.id));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR_RO(cpu_capacity);</div><div class='add'>+</div><div class='add'>+static int cpu_capacity_sysctl_add(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct device *cpu_dev = get_cpu_device(cpu);</div><div class='add'>+</div><div class='add'>+	if (!cpu_dev)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	device_create_file(cpu_dev, &amp;dev_attr_cpu_capacity);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cpu_capacity_sysctl_remove(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct device *cpu_dev = get_cpu_device(cpu);</div><div class='add'>+</div><div class='add'>+	if (!cpu_dev)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	device_remove_file(cpu_dev, &amp;dev_attr_cpu_capacity);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int register_cpu_capacity_sysctl(void)</div><div class='add'>+{</div><div class='add'>+	cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "topology/cpu-capacity",</div><div class='add'>+			  cpu_capacity_sysctl_add, cpu_capacity_sysctl_remove);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+subsys_initcall(register_cpu_capacity_sysctl);</div><div class='head'>diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c<br/>index 5f90bac6bb09..f021e27644e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bcma/driver_gpio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bcma/driver_gpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bcma/driver_gpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bcma/driver_gpio.c</a></div><div class='hunk'>@@ -26,12 +26,14 @@ static int bcma_gpio_get_value(struct gpio_chip *chip, unsigned gpio)</div><div class='ctx'> 	return !!bcma_chipco_gpio_in(cc, 1 &lt;&lt; gpio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcma_gpio_set_value(struct gpio_chip *chip, unsigned gpio,</div><div class='del'>-				int value)</div><div class='add'>+static int bcma_gpio_set_value(struct gpio_chip *chip, unsigned int gpio,</div><div class='add'>+			       int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcma_drv_cc *cc = gpiochip_get_data(chip);</div><div class='ctx'> </div><div class='ctx'> 	bcma_chipco_gpio_out(cc, 1 &lt;&lt; gpio, value ? 1 &lt;&lt; gpio : 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcma_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)</div><div class='hunk'>@@ -184,7 +186,7 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)</div><div class='ctx'> 	chip-&gt;request		= bcma_gpio_request;</div><div class='ctx'> 	chip-&gt;free		= bcma_gpio_free;</div><div class='ctx'> 	chip-&gt;get		= bcma_gpio_get_value;</div><div class='del'>-	chip-&gt;set		= bcma_gpio_set_value;</div><div class='add'>+	chip-&gt;set_rv		= bcma_gpio_set_value;</div><div class='ctx'> 	chip-&gt;direction_input	= bcma_gpio_direction_input;</div><div class='ctx'> 	chip-&gt;direction_output	= bcma_gpio_direction_output;</div><div class='ctx'> 	chip-&gt;parent		= bus-&gt;dev;</div><div class='head'>diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig<br/>index a97f2c40c640..0f70e2374e7f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/Kconfig</a></div><div class='hunk'>@@ -367,7 +367,7 @@ config BLK_DEV_RBD</div><div class='ctx'> 	tristate "Rados block device (RBD)"</div><div class='ctx'> 	depends on INET &amp;&amp; BLOCK</div><div class='ctx'> 	select CEPH_LIB</div><div class='del'>-	select LIBCRC32C</div><div class='add'>+	select CRC32</div><div class='ctx'> 	select CRYPTO_AES</div><div class='ctx'> 	select CRYPTO</div><div class='ctx'> 	help</div><div class='hunk'>@@ -388,12 +388,6 @@ config BLK_DEV_UBLK</div><div class='ctx'> 	  definition isn't finalized yet, and might change according to future</div><div class='ctx'> 	  requirement, so mark is as experimental now.</div><div class='ctx'> </div><div class='del'>-	  Say Y if you want to get better performance because task_work_add()</div><div class='del'>-	  can be used in IO path for replacing io_uring cmd, which will become</div><div class='del'>-	  shared between IO tasks and ubq daemon, meantime task_work_add() can</div><div class='del'>-	  can handle batch more effectively, but task_work_add() isn't exported</div><div class='del'>-	  for module, so ublk has to be built to kernel.</div><div class='del'>-</div><div class='ctx'> config BLKDEV_UBLK_LEGACY_OPCODES</div><div class='ctx'> 	bool "Support legacy command opcode"</div><div class='ctx'> 	depends on BLK_DEV_UBLK</div><div class='hunk'>@@ -413,4 +407,23 @@ config BLKDEV_UBLK_LEGACY_OPCODES</div><div class='ctx'> </div><div class='ctx'> source "drivers/block/rnbd/Kconfig"</div><div class='ctx'> </div><div class='add'>+config BLK_DEV_ZONED_LOOP</div><div class='add'>+	tristate "Zoned loopback device support"</div><div class='add'>+	depends on BLK_DEV_ZONED</div><div class='add'>+	help</div><div class='add'>+	  Saying Y here will allow you to use create a zoned block device using</div><div class='add'>+	  regular files for zones (one file per zones). This is useful to test</div><div class='add'>+	  file systems, device mapper and applications that support zoned block</div><div class='add'>+	  devices. To create a zoned loop device, no user utility is needed, a</div><div class='add'>+	  zoned loop device can be created (or re-started) using a command</div><div class='add'>+	  like:</div><div class='add'>+</div><div class='add'>+	  echo "add id=0,zone_size_mb=256,capacity_mb=16384,conv_zones=11" &gt; \</div><div class='add'>+		/dev/zloop-control</div><div class='add'>+</div><div class='add'>+	  See Documentation/admin-guide/blockdev/zoned_loop.rst for usage</div><div class='add'>+	  details.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> endif # BLK_DEV</div><div class='head'>diff --git a/drivers/block/Makefile b/drivers/block/Makefile<br/>index 1105a2d4fdcb..097707aca725 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/Makefile</a></div><div class='hunk'>@@ -41,5 +41,6 @@ obj-$(CONFIG_BLK_DEV_RNBD)	+= rnbd/</div><div class='ctx'> obj-$(CONFIG_BLK_DEV_NULL_BLK)	+= null_blk/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_BLK_DEV_UBLK)			+= ublk_drv.o</div><div class='add'>+obj-$(CONFIG_BLK_DEV_ZONED_LOOP) += zloop.o</div><div class='ctx'> </div><div class='ctx'> swim_mod-y	:= swim.o swim_asm.o</div><div class='head'>diff --git a/drivers/block/brd.c b/drivers/block/brd.c<br/>index 292f127cae0a..b1be6c510372 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/brd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/brd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/brd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/brd.c</a></div><div class='hunk'>@@ -54,32 +54,33 @@ static struct page *brd_lookup_page(struct brd_device *brd, sector_t sector)</div><div class='ctx'> /*</div><div class='ctx'>  * Insert a new page for a given sector, if one does not already exist.</div><div class='ctx'>  */</div><div class='del'>-static int brd_insert_page(struct brd_device *brd, sector_t sector, gfp_t gfp)</div><div class='add'>+static struct page *brd_insert_page(struct brd_device *brd, sector_t sector,</div><div class='add'>+		blk_opf_t opf)</div><div class='add'>+	__releases(rcu)</div><div class='add'>+	__acquires(rcu)</div><div class='ctx'> {</div><div class='del'>-	pgoff_t idx = sector &gt;&gt; PAGE_SECTORS_SHIFT;</div><div class='del'>-	struct page *page;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	page = brd_lookup_page(brd, sector);</div><div class='del'>-	if (page)</div><div class='del'>-		return 0;</div><div class='add'>+	gfp_t gfp = (opf &amp; REQ_NOWAIT) ? GFP_NOWAIT : GFP_NOIO;</div><div class='add'>+	struct page *page, *ret;</div><div class='ctx'> </div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> 	page = alloc_page(gfp | __GFP_ZERO | __GFP_HIGHMEM);</div><div class='add'>+	rcu_read_lock();</div><div class='ctx'> 	if (!page)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='ctx'> 	xa_lock(&amp;brd-&gt;brd_pages);</div><div class='del'>-	ret = __xa_insert(&amp;brd-&gt;brd_pages, idx, page, gfp);</div><div class='del'>-	if (!ret)</div><div class='del'>-		brd-&gt;brd_nr_pages++;</div><div class='del'>-	xa_unlock(&amp;brd-&gt;brd_pages);</div><div class='del'>-</div><div class='del'>-	if (ret &lt; 0) {</div><div class='add'>+	ret = __xa_cmpxchg(&amp;brd-&gt;brd_pages, sector &gt;&gt; PAGE_SECTORS_SHIFT, NULL,</div><div class='add'>+			page, gfp);</div><div class='add'>+	if (ret) {</div><div class='add'>+		xa_unlock(&amp;brd-&gt;brd_pages);</div><div class='ctx'> 		__free_page(page);</div><div class='del'>-		if (ret == -EBUSY)</div><div class='del'>-			ret = 0;</div><div class='add'>+		if (xa_is_err(ret))</div><div class='add'>+			return ERR_PTR(xa_err(ret));</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='del'>-	return ret;</div><div class='add'>+	brd-&gt;brd_nr_pages++;</div><div class='add'>+	xa_unlock(&amp;brd-&gt;brd_pages);</div><div class='add'>+	return page;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -100,143 +101,77 @@ static void brd_free_pages(struct brd_device *brd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * copy_to_brd_setup must be called before copy_to_brd. It may sleep.</div><div class='add'>+ * Process a single segment.  The segment is capped to not cross page boundaries</div><div class='add'>+ * in both the bio and the brd backing memory.</div><div class='ctx'>  */</div><div class='del'>-static int copy_to_brd_setup(struct brd_device *brd, sector_t sector, size_t n,</div><div class='del'>-			     gfp_t gfp)</div><div class='del'>-{</div><div class='del'>-	unsigned int offset = (sector &amp; (PAGE_SECTORS-1)) &lt;&lt; SECTOR_SHIFT;</div><div class='del'>-	size_t copy;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	copy = min_t(size_t, n, PAGE_SIZE - offset);</div><div class='del'>-	ret = brd_insert_page(brd, sector, gfp);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	if (copy &lt; n) {</div><div class='del'>-		sector += copy &gt;&gt; SECTOR_SHIFT;</div><div class='del'>-		ret = brd_insert_page(brd, sector, gfp);</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Copy n bytes from src to the brd starting at sector. Does not sleep.</div><div class='del'>- */</div><div class='del'>-static void copy_to_brd(struct brd_device *brd, const void *src,</div><div class='del'>-			sector_t sector, size_t n)</div><div class='add'>+static bool brd_rw_bvec(struct brd_device *brd, struct bio *bio)</div><div class='ctx'> {</div><div class='add'>+	struct bio_vec bv = bio_iter_iovec(bio, bio-&gt;bi_iter);</div><div class='add'>+	sector_t sector = bio-&gt;bi_iter.bi_sector;</div><div class='add'>+	u32 offset = (sector &amp; (PAGE_SECTORS - 1)) &lt;&lt; SECTOR_SHIFT;</div><div class='add'>+	blk_opf_t opf = bio-&gt;bi_opf;</div><div class='ctx'> 	struct page *page;</div><div class='del'>-	void *dst;</div><div class='del'>-	unsigned int offset = (sector &amp; (PAGE_SECTORS-1)) &lt;&lt; SECTOR_SHIFT;</div><div class='del'>-	size_t copy;</div><div class='add'>+	void *kaddr;</div><div class='ctx'> </div><div class='del'>-	copy = min_t(size_t, n, PAGE_SIZE - offset);</div><div class='del'>-	page = brd_lookup_page(brd, sector);</div><div class='del'>-	BUG_ON(!page);</div><div class='del'>-</div><div class='del'>-	dst = kmap_atomic(page);</div><div class='del'>-	memcpy(dst + offset, src, copy);</div><div class='del'>-	kunmap_atomic(dst);</div><div class='del'>-</div><div class='del'>-	if (copy &lt; n) {</div><div class='del'>-		src += copy;</div><div class='del'>-		sector += copy &gt;&gt; SECTOR_SHIFT;</div><div class='del'>-		copy = n - copy;</div><div class='del'>-		page = brd_lookup_page(brd, sector);</div><div class='del'>-		BUG_ON(!page);</div><div class='del'>-</div><div class='del'>-		dst = kmap_atomic(page);</div><div class='del'>-		memcpy(dst, src, copy);</div><div class='del'>-		kunmap_atomic(dst);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+	bv.bv_len = min_t(u32, bv.bv_len, PAGE_SIZE - offset);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Copy n bytes to dst from the brd starting at sector. Does not sleep.</div><div class='del'>- */</div><div class='del'>-static void copy_from_brd(void *dst, struct brd_device *brd,</div><div class='del'>-			sector_t sector, size_t n)</div><div class='del'>-{</div><div class='del'>-	struct page *page;</div><div class='del'>-	void *src;</div><div class='del'>-	unsigned int offset = (sector &amp; (PAGE_SECTORS-1)) &lt;&lt; SECTOR_SHIFT;</div><div class='del'>-	size_t copy;</div><div class='del'>-</div><div class='del'>-	copy = min_t(size_t, n, PAGE_SIZE - offset);</div><div class='add'>+	rcu_read_lock();</div><div class='ctx'> 	page = brd_lookup_page(brd, sector);</div><div class='del'>-	if (page) {</div><div class='del'>-		src = kmap_atomic(page);</div><div class='del'>-		memcpy(dst, src + offset, copy);</div><div class='del'>-		kunmap_atomic(src);</div><div class='del'>-	} else</div><div class='del'>-		memset(dst, 0, copy);</div><div class='del'>-</div><div class='del'>-	if (copy &lt; n) {</div><div class='del'>-		dst += copy;</div><div class='del'>-		sector += copy &gt;&gt; SECTOR_SHIFT;</div><div class='del'>-		copy = n - copy;</div><div class='del'>-		page = brd_lookup_page(brd, sector);</div><div class='del'>-		if (page) {</div><div class='del'>-			src = kmap_atomic(page);</div><div class='del'>-			memcpy(dst, src, copy);</div><div class='del'>-			kunmap_atomic(src);</div><div class='del'>-		} else</div><div class='del'>-			memset(dst, 0, copy);</div><div class='add'>+	if (!page &amp;&amp; op_is_write(opf)) {</div><div class='add'>+		page = brd_insert_page(brd, sector, opf);</div><div class='add'>+		if (IS_ERR(page))</div><div class='add'>+			goto out_error;</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Process a single bvec of a bio.</div><div class='del'>- */</div><div class='del'>-static int brd_do_bvec(struct brd_device *brd, struct page *page,</div><div class='del'>-			unsigned int len, unsigned int off, blk_opf_t opf,</div><div class='del'>-			sector_t sector)</div><div class='del'>-{</div><div class='del'>-	void *mem;</div><div class='del'>-	int err = 0;</div><div class='ctx'> </div><div class='add'>+	kaddr = bvec_kmap_local(&amp;bv);</div><div class='ctx'> 	if (op_is_write(opf)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Must use NOIO because we don't want to recurse back into the</div><div class='del'>-		 * block or filesystem layers from page reclaim.</div><div class='del'>-		 */</div><div class='del'>-		gfp_t gfp = opf &amp; REQ_NOWAIT ? GFP_NOWAIT : GFP_NOIO;</div><div class='del'>-</div><div class='del'>-		err = copy_to_brd_setup(brd, sector, len, gfp);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mem = kmap_atomic(page);</div><div class='del'>-	if (!op_is_write(opf)) {</div><div class='del'>-		copy_from_brd(mem + off, brd, sector, len);</div><div class='del'>-		flush_dcache_page(page);</div><div class='add'>+		memcpy_to_page(page, offset, kaddr, bv.bv_len);</div><div class='ctx'> 	} else {</div><div class='del'>-		flush_dcache_page(page);</div><div class='del'>-		copy_to_brd(brd, mem + off, sector, len);</div><div class='add'>+		if (page)</div><div class='add'>+			memcpy_from_page(kaddr, page, offset, bv.bv_len);</div><div class='add'>+		else</div><div class='add'>+			memset(kaddr, 0, bv.bv_len);</div><div class='ctx'> 	}</div><div class='del'>-	kunmap_atomic(mem);</div><div class='add'>+	kunmap_local(kaddr);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	bio_advance_iter_single(bio, &amp;bio-&gt;bi_iter, bv.bv_len);</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+out_error:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (PTR_ERR(page) == -ENOMEM &amp;&amp; (opf &amp; REQ_NOWAIT))</div><div class='add'>+		bio_wouldblock_error(bio);</div><div class='add'>+	else</div><div class='add'>+		bio_io_error(bio);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='add'>+static void brd_free_one_page(struct rcu_head *head)</div><div class='add'>+{</div><div class='add'>+	struct page *page = container_of(head, struct page, rcu_head);</div><div class='add'>+</div><div class='add'>+	__free_page(page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void brd_do_discard(struct brd_device *brd, sector_t sector, u32 size)</div><div class='ctx'> {</div><div class='del'>-	sector_t aligned_sector = (sector + PAGE_SECTORS) &amp; ~PAGE_SECTORS;</div><div class='add'>+	sector_t aligned_sector = round_up(sector, PAGE_SECTORS);</div><div class='add'>+	sector_t aligned_end = round_down(</div><div class='add'>+			sector + (size &gt;&gt; SECTOR_SHIFT), PAGE_SECTORS);</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> </div><div class='del'>-	size -= (aligned_sector - sector) * SECTOR_SIZE;</div><div class='add'>+	if (aligned_end &lt;= aligned_sector)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	xa_lock(&amp;brd-&gt;brd_pages);</div><div class='del'>-	while (size &gt;= PAGE_SIZE &amp;&amp; aligned_sector &lt; rd_size * 2) {</div><div class='add'>+	while (aligned_sector &lt; aligned_end &amp;&amp; aligned_sector &lt; rd_size * 2) {</div><div class='ctx'> 		page = __xa_erase(&amp;brd-&gt;brd_pages, aligned_sector &gt;&gt; PAGE_SECTORS_SHIFT);</div><div class='ctx'> 		if (page) {</div><div class='del'>-			__free_page(page);</div><div class='add'>+			call_rcu(&amp;page-&gt;rcu_head, brd_free_one_page);</div><div class='ctx'> 			brd-&gt;brd_nr_pages--;</div><div class='ctx'> 		}</div><div class='ctx'> 		aligned_sector += PAGE_SECTORS;</div><div class='del'>-		size -= PAGE_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> 	xa_unlock(&amp;brd-&gt;brd_pages);</div><div class='ctx'> }</div><div class='hunk'>@@ -244,36 +179,18 @@ static void brd_do_discard(struct brd_device *brd, sector_t sector, u32 size)</div><div class='ctx'> static void brd_submit_bio(struct bio *bio)</div><div class='ctx'> {</div><div class='ctx'> 	struct brd_device *brd = bio-&gt;bi_bdev-&gt;bd_disk-&gt;private_data;</div><div class='del'>-	sector_t sector = bio-&gt;bi_iter.bi_sector;</div><div class='del'>-	struct bio_vec bvec;</div><div class='del'>-	struct bvec_iter iter;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(op_is_discard(bio-&gt;bi_opf))) {</div><div class='del'>-		brd_do_discard(brd, sector, bio-&gt;bi_iter.bi_size);</div><div class='add'>+		brd_do_discard(brd, bio-&gt;bi_iter.bi_sector,</div><div class='add'>+				bio-&gt;bi_iter.bi_size);</div><div class='ctx'> 		bio_endio(bio);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bio_for_each_segment(bvec, bio, iter) {</div><div class='del'>-		unsigned int len = bvec.bv_len;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		/* Don't support un-aligned buffer */</div><div class='del'>-		WARN_ON_ONCE((bvec.bv_offset &amp; (SECTOR_SIZE - 1)) ||</div><div class='del'>-				(len &amp; (SECTOR_SIZE - 1)));</div><div class='del'>-</div><div class='del'>-		err = brd_do_bvec(brd, bvec.bv_page, len, bvec.bv_offset,</div><div class='del'>-				  bio-&gt;bi_opf, sector);</div><div class='del'>-		if (err) {</div><div class='del'>-			if (err == -ENOMEM &amp;&amp; bio-&gt;bi_opf &amp; REQ_NOWAIT) {</div><div class='del'>-				bio_wouldblock_error(bio);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-			bio_io_error(bio);</div><div class='add'>+	do {</div><div class='add'>+		if (!brd_rw_bvec(brd, bio))</div><div class='ctx'> 			return;</div><div class='del'>-		}</div><div class='del'>-		sector += len &gt;&gt; SECTOR_SHIFT;</div><div class='del'>-	}</div><div class='add'>+	} while (bio-&gt;bi_iter.bi_size);</div><div class='ctx'> </div><div class='ctx'> 	bio_endio(bio);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/block/drbd/Kconfig b/drivers/block/drbd/Kconfig<br/>index 6fb4e38fca88..495a72da04c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/drbd/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/drbd/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/drbd/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/drbd/Kconfig</a></div><div class='hunk'>@@ -10,7 +10,7 @@ config BLK_DEV_DRBD</div><div class='ctx'> 	tristate "DRBD Distributed Replicated Block Device support"</div><div class='ctx'> 	depends on PROC_FS &amp;&amp; INET</div><div class='ctx'> 	select LRU_CACHE</div><div class='del'>-	select LIBCRC32C</div><div class='add'>+	select CRC32</div><div class='ctx'> 	help</div><div class='ctx'> </div><div class='ctx'> 	  NOTE: In order to authenticate connections you have to select</div><div class='head'>diff --git a/drivers/block/loop.c b/drivers/block/loop.c<br/>index 674527d770dc..e2b1f377f585 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/loop.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/loop.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/loop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/loop.c</a></div><div class='hunk'>@@ -211,72 +211,6 @@ static void loop_set_size(struct loop_device *lo, loff_t size)</div><div class='ctx'> 		kobject_uevent(&amp;disk_to_dev(lo-&gt;lo_disk)-&gt;kobj, KOBJ_CHANGE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lo_write_bvec(struct file *file, struct bio_vec *bvec, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct iov_iter i;</div><div class='del'>-	ssize_t bw;</div><div class='del'>-</div><div class='del'>-	iov_iter_bvec(&amp;i, ITER_SOURCE, bvec, 1, bvec-&gt;bv_len);</div><div class='del'>-</div><div class='del'>-	bw = vfs_iter_write(file, &amp;i, ppos, 0);</div><div class='del'>-</div><div class='del'>-	if (likely(bw ==  bvec-&gt;bv_len))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	printk_ratelimited(KERN_ERR</div><div class='del'>-		"loop: Write error at byte offset %llu, length %i.\n",</div><div class='del'>-		(unsigned long long)*ppos, bvec-&gt;bv_len);</div><div class='del'>-	if (bw &gt;= 0)</div><div class='del'>-		bw = -EIO;</div><div class='del'>-	return bw;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lo_write_simple(struct loop_device *lo, struct request *rq,</div><div class='del'>-		loff_t pos)</div><div class='del'>-{</div><div class='del'>-	struct bio_vec bvec;</div><div class='del'>-	struct req_iterator iter;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	rq_for_each_segment(bvec, rq, iter) {</div><div class='del'>-		ret = lo_write_bvec(lo-&gt;lo_backing_file, &amp;bvec, &amp;pos);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			break;</div><div class='del'>-		cond_resched();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lo_read_simple(struct loop_device *lo, struct request *rq,</div><div class='del'>-		loff_t pos)</div><div class='del'>-{</div><div class='del'>-	struct bio_vec bvec;</div><div class='del'>-	struct req_iterator iter;</div><div class='del'>-	struct iov_iter i;</div><div class='del'>-	ssize_t len;</div><div class='del'>-</div><div class='del'>-	rq_for_each_segment(bvec, rq, iter) {</div><div class='del'>-		iov_iter_bvec(&amp;i, ITER_DEST, &amp;bvec, 1, bvec.bv_len);</div><div class='del'>-		len = vfs_iter_read(lo-&gt;lo_backing_file, &amp;i, &amp;pos, 0);</div><div class='del'>-		if (len &lt; 0)</div><div class='del'>-			return len;</div><div class='del'>-</div><div class='del'>-		flush_dcache_page(bvec.bv_page);</div><div class='del'>-</div><div class='del'>-		if (len != bvec.bv_len) {</div><div class='del'>-			struct bio *bio;</div><div class='del'>-</div><div class='del'>-			__rq_for_each_bio(bio, rq)</div><div class='del'>-				zero_fill_bio(bio);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		cond_resched();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void loop_clear_limits(struct loop_device *lo, int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct queue_limits lim = queue_limits_start_update(lo-&gt;lo_queue);</div><div class='hunk'>@@ -342,7 +276,7 @@ static void lo_complete_rq(struct request *rq)</div><div class='ctx'> 	struct loop_cmd *cmd = blk_mq_rq_to_pdu(rq);</div><div class='ctx'> 	blk_status_t ret = BLK_STS_OK;</div><div class='ctx'> </div><div class='del'>-	if (!cmd-&gt;use_aio || cmd-&gt;ret &lt; 0 || cmd-&gt;ret == blk_rq_bytes(rq) ||</div><div class='add'>+	if (cmd-&gt;ret &lt; 0 || cmd-&gt;ret == blk_rq_bytes(rq) ||</div><div class='ctx'> 	    req_op(rq) != REQ_OP_READ) {</div><div class='ctx'> 		if (cmd-&gt;ret &lt; 0)</div><div class='ctx'> 			ret = errno_to_blk_status(cmd-&gt;ret);</div><div class='hunk'>@@ -358,14 +292,13 @@ static void lo_complete_rq(struct request *rq)</div><div class='ctx'> 		cmd-&gt;ret = 0;</div><div class='ctx'> 		blk_mq_requeue_request(rq, true);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (cmd-&gt;use_aio) {</div><div class='del'>-			struct bio *bio = rq-&gt;bio;</div><div class='add'>+		struct bio *bio = rq-&gt;bio;</div><div class='ctx'> </div><div class='del'>-			while (bio) {</div><div class='del'>-				zero_fill_bio(bio);</div><div class='del'>-				bio = bio-&gt;bi_next;</div><div class='del'>-			}</div><div class='add'>+		while (bio) {</div><div class='add'>+			zero_fill_bio(bio);</div><div class='add'>+			bio = bio-&gt;bi_next;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		ret = BLK_STS_IOERR;</div><div class='ctx'> end_io:</div><div class='ctx'> 		blk_mq_end_request(rq, ret);</div><div class='hunk'>@@ -445,9 +378,14 @@ static int lo_rw_aio(struct loop_device *lo, struct loop_cmd *cmd,</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;iocb.ki_pos = pos;</div><div class='ctx'> 	cmd-&gt;iocb.ki_filp = file;</div><div class='del'>-	cmd-&gt;iocb.ki_complete = lo_rw_aio_complete;</div><div class='del'>-	cmd-&gt;iocb.ki_flags = IOCB_DIRECT;</div><div class='del'>-	cmd-&gt;iocb.ki_ioprio = IOPRIO_PRIO_VALUE(IOPRIO_CLASS_NONE, 0);</div><div class='add'>+	cmd-&gt;iocb.ki_ioprio = req_get_ioprio(rq);</div><div class='add'>+	if (cmd-&gt;use_aio) {</div><div class='add'>+		cmd-&gt;iocb.ki_complete = lo_rw_aio_complete;</div><div class='add'>+		cmd-&gt;iocb.ki_flags = IOCB_DIRECT;</div><div class='add'>+	} else {</div><div class='add'>+		cmd-&gt;iocb.ki_complete = NULL;</div><div class='add'>+		cmd-&gt;iocb.ki_flags = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (rw == ITER_SOURCE)</div><div class='ctx'> 		ret = file-&gt;f_op-&gt;write_iter(&amp;cmd-&gt;iocb, &amp;iter);</div><div class='hunk'>@@ -458,7 +396,7 @@ static int lo_rw_aio(struct loop_device *lo, struct loop_cmd *cmd,</div><div class='ctx'> </div><div class='ctx'> 	if (ret != -EIOCBQUEUED)</div><div class='ctx'> 		lo_rw_aio_complete(&amp;cmd-&gt;iocb, ret);</div><div class='del'>-	return 0;</div><div class='add'>+	return -EIOCBQUEUED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int do_req_filebacked(struct loop_device *lo, struct request *rq)</div><div class='hunk'>@@ -466,15 +404,6 @@ static int do_req_filebacked(struct loop_device *lo, struct request *rq)</div><div class='ctx'> 	struct loop_cmd *cmd = blk_mq_rq_to_pdu(rq);</div><div class='ctx'> 	loff_t pos = ((loff_t) blk_rq_pos(rq) &lt;&lt; 9) + lo-&gt;lo_offset;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * lo_write_simple and lo_read_simple should have been covered</div><div class='del'>-	 * by io submit style function like lo_rw_aio(), one blocker</div><div class='del'>-	 * is that lo_read_simple() need to call flush_dcache_page after</div><div class='del'>-	 * the page is written from kernel, and it isn't easy to handle</div><div class='del'>-	 * this in io submit style function which submits all segments</div><div class='del'>-	 * of the req at one time. And direct read IO doesn't need to</div><div class='del'>-	 * run flush_dcache_page().</div><div class='del'>-	 */</div><div class='ctx'> 	switch (req_op(rq)) {</div><div class='ctx'> 	case REQ_OP_FLUSH:</div><div class='ctx'> 		return lo_req_flush(lo, rq);</div><div class='hunk'>@@ -490,15 +419,9 @@ static int do_req_filebacked(struct loop_device *lo, struct request *rq)</div><div class='ctx'> 	case REQ_OP_DISCARD:</div><div class='ctx'> 		return lo_fallocate(lo, rq, pos, FALLOC_FL_PUNCH_HOLE);</div><div class='ctx'> 	case REQ_OP_WRITE:</div><div class='del'>-		if (cmd-&gt;use_aio)</div><div class='del'>-			return lo_rw_aio(lo, cmd, pos, ITER_SOURCE);</div><div class='del'>-		else</div><div class='del'>-			return lo_write_simple(lo, rq, pos);</div><div class='add'>+		return lo_rw_aio(lo, cmd, pos, ITER_SOURCE);</div><div class='ctx'> 	case REQ_OP_READ:</div><div class='del'>-		if (cmd-&gt;use_aio)</div><div class='del'>-			return lo_rw_aio(lo, cmd, pos, ITER_DEST);</div><div class='del'>-		else</div><div class='del'>-			return lo_read_simple(lo, rq, pos);</div><div class='add'>+		return lo_rw_aio(lo, cmd, pos, ITER_DEST);</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='ctx'> 		return -EIO;</div><div class='hunk'>@@ -582,6 +505,17 @@ static void loop_assign_backing_file(struct loop_device *lo, struct file *file)</div><div class='ctx'> 	lo-&gt;lo_min_dio_size = loop_query_min_dio_size(lo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int loop_check_backing_file(struct file *file)</div><div class='add'>+{</div><div class='add'>+	if (!file-&gt;f_op-&gt;read_iter)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if ((file-&gt;f_mode &amp; FMODE_WRITE) &amp;&amp; !file-&gt;f_op-&gt;write_iter)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * loop_change_fd switched the backing store of a loopback device to</div><div class='ctx'>  * a new file. This is useful for operating system installers to free up</div><div class='hunk'>@@ -603,6 +537,10 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev,</div><div class='ctx'> 	if (!file)</div><div class='ctx'> 		return -EBADF;</div><div class='ctx'> </div><div class='add'>+	error = loop_check_backing_file(file);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='ctx'> 	/* suppress uevents while reconfiguring the device */</div><div class='ctx'> 	dev_set_uevent_suppress(disk_to_dev(lo-&gt;lo_disk), 1);</div><div class='ctx'> </div><div class='hunk'>@@ -662,19 +600,20 @@ static int loop_change_fd(struct loop_device *lo, struct block_device *bdev,</div><div class='ctx'> 	 * dependency.</div><div class='ctx'> 	 */</div><div class='ctx'> 	fput(old_file);</div><div class='add'>+	dev_set_uevent_suppress(disk_to_dev(lo-&gt;lo_disk), 0);</div><div class='ctx'> 	if (partscan)</div><div class='ctx'> 		loop_reread_partitions(lo);</div><div class='ctx'> </div><div class='ctx'> 	error = 0;</div><div class='ctx'> done:</div><div class='del'>-	/* enable and uncork uevent now that we are done */</div><div class='del'>-	dev_set_uevent_suppress(disk_to_dev(lo-&gt;lo_disk), 0);</div><div class='add'>+	kobject_uevent(&amp;disk_to_dev(lo-&gt;lo_disk)-&gt;kobj, KOBJ_CHANGE);</div><div class='ctx'> 	return error;</div><div class='ctx'> </div><div class='ctx'> out_err:</div><div class='ctx'> 	loop_global_unlock(lo, is_loop);</div><div class='ctx'> out_putf:</div><div class='ctx'> 	fput(file);</div><div class='add'>+	dev_set_uevent_suppress(disk_to_dev(lo-&gt;lo_disk), 0);</div><div class='ctx'> 	goto done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1039,6 +978,11 @@ static int loop_configure(struct loop_device *lo, blk_mode_t mode,</div><div class='ctx'> </div><div class='ctx'> 	if (!file)</div><div class='ctx'> 		return -EBADF;</div><div class='add'>+</div><div class='add'>+	error = loop_check_backing_file(file);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='ctx'> 	is_loop = is_loop_device(file);</div><div class='ctx'> </div><div class='ctx'> 	/* This is safe, since we have a reference from open(). */</div><div class='hunk'>@@ -1129,8 +1073,8 @@ static int loop_configure(struct loop_device *lo, blk_mode_t mode,</div><div class='ctx'> 	if (partscan)</div><div class='ctx'> 		clear_bit(GD_SUPPRESS_PART_SCAN, &amp;lo-&gt;lo_disk-&gt;state);</div><div class='ctx'> </div><div class='del'>-	/* enable and uncork uevent now that we are done */</div><div class='ctx'> 	dev_set_uevent_suppress(disk_to_dev(lo-&gt;lo_disk), 0);</div><div class='add'>+	kobject_uevent(&amp;disk_to_dev(lo-&gt;lo_disk)-&gt;kobj, KOBJ_CHANGE);</div><div class='ctx'> </div><div class='ctx'> 	loop_global_unlock(lo, is_loop);</div><div class='ctx'> 	if (partscan)</div><div class='hunk'>@@ -1921,7 +1865,6 @@ static void loop_handle_cmd(struct loop_cmd *cmd)</div><div class='ctx'> 	struct loop_device *lo = rq-&gt;q-&gt;queuedata;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	struct mem_cgroup *old_memcg = NULL;</div><div class='del'>-	const bool use_aio = cmd-&gt;use_aio;</div><div class='ctx'> </div><div class='ctx'> 	if (write &amp;&amp; (lo-&gt;lo_flags &amp; LO_FLAGS_READ_ONLY)) {</div><div class='ctx'> 		ret = -EIO;</div><div class='hunk'>@@ -1951,7 +1894,7 @@ static void loop_handle_cmd(struct loop_cmd *cmd)</div><div class='ctx'> 	}</div><div class='ctx'>  failed:</div><div class='ctx'> 	/* complete non-aio request */</div><div class='del'>-	if (!use_aio || ret) {</div><div class='add'>+	if (ret != -EIOCBQUEUED) {</div><div class='ctx'> 		if (ret == -EOPNOTSUPP)</div><div class='ctx'> 			cmd-&gt;ret = ret;</div><div class='ctx'> 		else</div><div class='head'>diff --git a/drivers/block/null_blk/main.c b/drivers/block/null_blk/main.c<br/>index 3bb9cee0a9b5..aa163ae9b2aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/null_blk/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/null_blk/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/null_blk/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/null_blk/main.c</a></div><div class='hunk'>@@ -2031,7 +2031,7 @@ static int null_add_dev(struct nullb_device *dev)</div><div class='ctx'> 	nullb-&gt;disk-&gt;minors = 1;</div><div class='ctx'> 	nullb-&gt;disk-&gt;fops = &amp;null_ops;</div><div class='ctx'> 	nullb-&gt;disk-&gt;private_data = nullb;</div><div class='del'>-	strscpy_pad(nullb-&gt;disk-&gt;disk_name, nullb-&gt;disk_name, DISK_NAME_LEN);</div><div class='add'>+	strscpy(nullb-&gt;disk-&gt;disk_name, nullb-&gt;disk_name);</div><div class='ctx'> </div><div class='ctx'> 	if (nullb-&gt;dev-&gt;zoned) {</div><div class='ctx'> 		rv = null_register_zoned_dev(nullb);</div><div class='head'>diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c<br/>index 65b96c083b3c..d5cc7bd2875c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/pktcdvd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/pktcdvd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/pktcdvd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/pktcdvd.c</a></div><div class='hunk'>@@ -725,7 +725,7 @@ static int pkt_generic_packet(struct pktcdvd_device *pd, struct packet_command *</div><div class='ctx'> 	scmd = blk_mq_rq_to_pdu(rq);</div><div class='ctx'> </div><div class='ctx'> 	if (cgc-&gt;buflen) {</div><div class='del'>-		ret = blk_rq_map_kern(q, rq, cgc-&gt;buffer, cgc-&gt;buflen,</div><div class='add'>+		ret = blk_rq_map_kern(rq, cgc-&gt;buffer, cgc-&gt;buflen,</div><div class='ctx'> 				      GFP_NOIO);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='head'>diff --git a/drivers/block/rnbd/rnbd-srv.c b/drivers/block/rnbd/rnbd-srv.c<br/>index 2ee6e9bd4e28..2df8941a6b14 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/rnbd/rnbd-srv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/rnbd/rnbd-srv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/rnbd/rnbd-srv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/rnbd/rnbd-srv.c</a></div><div class='hunk'>@@ -147,12 +147,7 @@ static int process_rdma(struct rnbd_srv_session *srv_sess,</div><div class='ctx'> </div><div class='ctx'> 	bio = bio_alloc(file_bdev(sess_dev-&gt;bdev_file), 1,</div><div class='ctx'> 			rnbd_to_bio_flags(le32_to_cpu(msg-&gt;rw)), GFP_KERNEL);</div><div class='del'>-	if (bio_add_page(bio, virt_to_page(data), datalen,</div><div class='del'>-			offset_in_page(data)) != datalen) {</div><div class='del'>-		rnbd_srv_err_rl(sess_dev, "Failed to map data to bio\n");</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		goto bio_put;</div><div class='del'>-	}</div><div class='add'>+	bio_add_virt_nofail(bio, data, datalen);</div><div class='ctx'> </div><div class='ctx'> 	bio-&gt;bi_opf = rnbd_to_bio_flags(le32_to_cpu(msg-&gt;rw));</div><div class='ctx'> 	if (bio_has_data(bio) &amp;&amp;</div><div class='head'>diff --git a/drivers/block/ublk_drv.c b/drivers/block/ublk_drv.c<br/>index 2fd05c1bd30b..6f51072776f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/ublk_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/ublk_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/ublk_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/ublk_drv.c</a></div><div class='hunk'>@@ -50,6 +50,8 @@</div><div class='ctx'> </div><div class='ctx'> /* private ioctl command mirror */</div><div class='ctx'> #define UBLK_CMD_DEL_DEV_ASYNC	_IOC_NR(UBLK_U_CMD_DEL_DEV_ASYNC)</div><div class='add'>+#define UBLK_CMD_UPDATE_SIZE	_IOC_NR(UBLK_U_CMD_UPDATE_SIZE)</div><div class='add'>+#define UBLK_CMD_QUIESCE_DEV	_IOC_NR(UBLK_U_CMD_QUIESCE_DEV)</div><div class='ctx'> </div><div class='ctx'> #define UBLK_IO_REGISTER_IO_BUF		_IOC_NR(UBLK_U_IO_REGISTER_IO_BUF)</div><div class='ctx'> #define UBLK_IO_UNREGISTER_IO_BUF	_IOC_NR(UBLK_U_IO_UNREGISTER_IO_BUF)</div><div class='hunk'>@@ -64,7 +66,10 @@</div><div class='ctx'> 		| UBLK_F_CMD_IOCTL_ENCODE \</div><div class='ctx'> 		| UBLK_F_USER_COPY \</div><div class='ctx'> 		| UBLK_F_ZONED \</div><div class='del'>-		| UBLK_F_USER_RECOVERY_FAIL_IO)</div><div class='add'>+		| UBLK_F_USER_RECOVERY_FAIL_IO \</div><div class='add'>+		| UBLK_F_UPDATE_SIZE \</div><div class='add'>+		| UBLK_F_AUTO_BUF_REG \</div><div class='add'>+		| UBLK_F_QUIESCE)</div><div class='ctx'> </div><div class='ctx'> #define UBLK_F_ALL_RECOVERY_FLAGS (UBLK_F_USER_RECOVERY \</div><div class='ctx'> 		| UBLK_F_USER_RECOVERY_REISSUE \</div><div class='hunk'>@@ -77,7 +82,11 @@</div><div class='ctx'> 	 UBLK_PARAM_TYPE_DMA_ALIGN | UBLK_PARAM_TYPE_SEGMENT)</div><div class='ctx'> </div><div class='ctx'> struct ublk_rq_data {</div><div class='del'>-	struct kref ref;</div><div class='add'>+	refcount_t ref;</div><div class='add'>+</div><div class='add'>+	/* for auto-unregister buffer in case of UBLK_F_AUTO_BUF_REG */</div><div class='add'>+	u16 buf_index;</div><div class='add'>+	void *buf_ctx_handle;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ublk_uring_cmd_pdu {</div><div class='hunk'>@@ -99,6 +108,9 @@ struct ublk_uring_cmd_pdu {</div><div class='ctx'> 	 * setup in ublk uring_cmd handler</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct ublk_queue *ubq;</div><div class='add'>+</div><div class='add'>+	struct ublk_auto_buf_reg buf;</div><div class='add'>+</div><div class='ctx'> 	u16 tag;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -123,15 +135,6 @@ struct ublk_uring_cmd_pdu {</div><div class='ctx'> #define UBLK_IO_FLAG_OWNED_BY_SRV 0x02</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * IO command is aborted, so this flag is set in case of</div><div class='del'>- * !UBLK_IO_FLAG_ACTIVE.</div><div class='del'>- *</div><div class='del'>- * After this flag is observed, any pending or new incoming request</div><div class='del'>- * associated with this io command will be failed immediately</div><div class='del'>- */</div><div class='del'>-#define UBLK_IO_FLAG_ABORTED 0x04</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * UBLK_IO_FLAG_NEED_GET_DATA is set because IO command requires</div><div class='ctx'>  * get data buffer address from ublksrv.</div><div class='ctx'>  *</div><div class='hunk'>@@ -140,6 +143,14 @@ struct ublk_uring_cmd_pdu {</div><div class='ctx'>  */</div><div class='ctx'> #define UBLK_IO_FLAG_NEED_GET_DATA 0x08</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * request buffer is registered automatically, so we have to unregister it</div><div class='add'>+ * before completing this request.</div><div class='add'>+ *</div><div class='add'>+ * io_uring will unregister buffer automatically for us during exiting.</div><div class='add'>+ */</div><div class='add'>+#define UBLK_IO_FLAG_AUTO_BUF_REG 	0x10</div><div class='add'>+</div><div class='ctx'> /* atomic RW with ubq-&gt;cancel_lock */</div><div class='ctx'> #define UBLK_IO_FLAG_CANCELED	0x80000000</div><div class='ctx'> </div><div class='hunk'>@@ -149,7 +160,12 @@ struct ublk_io {</div><div class='ctx'> 	unsigned int flags;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='del'>-	struct io_uring_cmd *cmd;</div><div class='add'>+	union {</div><div class='add'>+		/* valid if UBLK_IO_FLAG_ACTIVE is set */</div><div class='add'>+		struct io_uring_cmd *cmd;</div><div class='add'>+		/* valid if UBLK_IO_FLAG_OWNED_BY_SRV is set */</div><div class='add'>+		struct request *req;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ublk_queue {</div><div class='hunk'>@@ -199,8 +215,6 @@ struct ublk_device {</div><div class='ctx'> 	struct completion	completion;</div><div class='ctx'> 	unsigned int		nr_queues_ready;</div><div class='ctx'> 	unsigned int		nr_privileged_daemon;</div><div class='del'>-</div><div class='del'>-	struct work_struct	nosrv_work;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* header of ublk_params */</div><div class='hunk'>@@ -209,16 +223,17 @@ struct ublk_params_header {</div><div class='ctx'> 	__u32	types;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static bool ublk_abort_requests(struct ublk_device *ub, struct ublk_queue *ubq);</div><div class='del'>-</div><div class='add'>+static void ublk_io_release(void *priv);</div><div class='add'>+static void ublk_stop_dev_unlocked(struct ublk_device *ub);</div><div class='add'>+static void ublk_abort_queue(struct ublk_device *ub, struct ublk_queue *ubq);</div><div class='ctx'> static inline struct request *__ublk_check_and_get_req(struct ublk_device *ub,</div><div class='del'>-		struct ublk_queue *ubq, int tag, size_t offset);</div><div class='add'>+		const struct ublk_queue *ubq, int tag, size_t offset);</div><div class='ctx'> static inline unsigned int ublk_req_build_flags(struct request *req);</div><div class='del'>-static inline struct ublksrv_io_desc *ublk_get_iod(struct ublk_queue *ubq,</div><div class='del'>-						   int tag);</div><div class='del'>-static inline bool ublk_dev_is_user_copy(const struct ublk_device *ub)</div><div class='add'>+</div><div class='add'>+static inline struct ublksrv_io_desc *</div><div class='add'>+ublk_get_iod(const struct ublk_queue *ubq, unsigned tag)</div><div class='ctx'> {</div><div class='del'>-	return ub-&gt;dev_info.flags &amp; (UBLK_F_USER_COPY | UBLK_F_SUPPORT_ZERO_COPY);</div><div class='add'>+	return &amp;ubq-&gt;io_cmd_buf[tag];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool ublk_dev_is_zoned(const struct ublk_device *ub)</div><div class='hunk'>@@ -372,8 +387,7 @@ static int ublk_report_zones(struct gendisk *disk, sector_t sector,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto free_req;</div><div class='ctx'> </div><div class='del'>-		ret = blk_rq_map_kern(disk-&gt;queue, req, buffer, buffer_length,</div><div class='del'>-					GFP_KERNEL);</div><div class='add'>+		ret = blk_rq_map_kern(req, buffer, buffer_length, GFP_KERNEL);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto erase_desc;</div><div class='ctx'> </div><div class='hunk'>@@ -493,7 +507,6 @@ static blk_status_t ublk_setup_iod_zoned(struct ublk_queue *ubq,</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static inline void __ublk_complete_rq(struct request *req);</div><div class='del'>-static void ublk_complete_rq(struct kref *ref);</div><div class='ctx'> </div><div class='ctx'> static dev_t ublk_chr_devt;</div><div class='ctx'> static const struct class ublk_chr_class = {</div><div class='hunk'>@@ -620,14 +633,25 @@ static void ublk_apply_params(struct ublk_device *ub)</div><div class='ctx'> 		ublk_dev_param_zoned_apply(ub);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool ublk_support_zero_copy(const struct ublk_queue *ubq)</div><div class='add'>+{</div><div class='add'>+	return ubq-&gt;flags &amp; UBLK_F_SUPPORT_ZERO_COPY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ublk_support_auto_buf_reg(const struct ublk_queue *ubq)</div><div class='add'>+{</div><div class='add'>+	return ubq-&gt;flags &amp; UBLK_F_AUTO_BUF_REG;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool ublk_support_user_copy(const struct ublk_queue *ubq)</div><div class='ctx'> {</div><div class='del'>-	return ubq-&gt;flags &amp; (UBLK_F_USER_COPY | UBLK_F_SUPPORT_ZERO_COPY);</div><div class='add'>+	return ubq-&gt;flags &amp; UBLK_F_USER_COPY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool ublk_need_map_io(const struct ublk_queue *ubq)</div><div class='ctx'> {</div><div class='del'>-	return !ublk_support_user_copy(ubq);</div><div class='add'>+	return !ublk_support_user_copy(ubq) &amp;&amp; !ublk_support_zero_copy(ubq) &amp;&amp;</div><div class='add'>+		!ublk_support_auto_buf_reg(ubq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool ublk_need_req_ref(const struct ublk_queue *ubq)</div><div class='hunk'>@@ -635,8 +659,16 @@ static inline bool ublk_need_req_ref(const struct ublk_queue *ubq)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * read()/write() is involved in user copy, so request reference</div><div class='ctx'> 	 * has to be grabbed</div><div class='add'>+	 *</div><div class='add'>+	 * for zero copy, request buffer need to be registered to io_uring</div><div class='add'>+	 * buffer table, so reference is needed</div><div class='add'>+	 *</div><div class='add'>+	 * For auto buffer register, ublk server still may issue</div><div class='add'>+	 * UBLK_IO_COMMIT_AND_FETCH_REQ before one registered buffer is used up,</div><div class='add'>+	 * so reference is required too.</div><div class='ctx'> 	 */</div><div class='del'>-	return ublk_support_user_copy(ubq);</div><div class='add'>+	return ublk_support_user_copy(ubq) || ublk_support_zero_copy(ubq) ||</div><div class='add'>+		ublk_support_auto_buf_reg(ubq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void ublk_init_req_ref(const struct ublk_queue *ubq,</div><div class='hunk'>@@ -645,7 +677,7 @@ static inline void ublk_init_req_ref(const struct ublk_queue *ubq,</div><div class='ctx'> 	if (ublk_need_req_ref(ubq)) {</div><div class='ctx'> 		struct ublk_rq_data *data = blk_mq_rq_to_pdu(req);</div><div class='ctx'> </div><div class='del'>-		kref_init(&amp;data-&gt;ref);</div><div class='add'>+		refcount_set(&amp;data-&gt;ref, 1);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -655,7 +687,7 @@ static inline bool ublk_get_req_ref(const struct ublk_queue *ubq,</div><div class='ctx'> 	if (ublk_need_req_ref(ubq)) {</div><div class='ctx'> 		struct ublk_rq_data *data = blk_mq_rq_to_pdu(req);</div><div class='ctx'> </div><div class='del'>-		return kref_get_unless_zero(&amp;data-&gt;ref);</div><div class='add'>+		return refcount_inc_not_zero(&amp;data-&gt;ref);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -667,7 +699,8 @@ static inline void ublk_put_req_ref(const struct ublk_queue *ubq,</div><div class='ctx'> 	if (ublk_need_req_ref(ubq)) {</div><div class='ctx'> 		struct ublk_rq_data *data = blk_mq_rq_to_pdu(req);</div><div class='ctx'> </div><div class='del'>-		kref_put(&amp;data-&gt;ref, ublk_complete_rq);</div><div class='add'>+		if (refcount_dec_and_test(&amp;data-&gt;ref))</div><div class='add'>+			__ublk_complete_rq(req);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		__ublk_complete_rq(req);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -703,12 +736,6 @@ static inline bool ublk_rq_has_data(const struct request *rq)</div><div class='ctx'> 	return bio_has_data(rq-&gt;bio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct ublksrv_io_desc *ublk_get_iod(struct ublk_queue *ubq,</div><div class='del'>-		int tag)</div><div class='del'>-{</div><div class='del'>-	return &amp;ubq-&gt;io_cmd_buf[tag];</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline struct ublksrv_io_desc *</div><div class='ctx'> ublk_queue_cmd_buf(struct ublk_device *ub, int q_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -1074,7 +1101,7 @@ static inline struct ublk_uring_cmd_pdu *ublk_get_uring_cmd_pdu(</div><div class='ctx'> </div><div class='ctx'> static inline bool ubq_daemon_is_dying(struct ublk_queue *ubq)</div><div class='ctx'> {</div><div class='del'>-	return ubq-&gt;ubq_daemon-&gt;flags &amp; PF_EXITING;</div><div class='add'>+	return !ubq-&gt;ubq_daemon || ubq-&gt;ubq_daemon-&gt;flags &amp; PF_EXITING;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* todo: handle partial completion */</div><div class='hunk'>@@ -1085,12 +1112,6 @@ static inline void __ublk_complete_rq(struct request *req)</div><div class='ctx'> 	unsigned int unmapped_bytes;</div><div class='ctx'> 	blk_status_t res = BLK_STS_OK;</div><div class='ctx'> </div><div class='del'>-	/* called from ublk_abort_queue() code path */</div><div class='del'>-	if (io-&gt;flags &amp; UBLK_IO_FLAG_ABORTED) {</div><div class='del'>-		res = BLK_STS_IOERR;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* failed read IO if nothing is read */</div><div class='ctx'> 	if (!io-&gt;res &amp;&amp; req_op(req) == REQ_OP_READ)</div><div class='ctx'> 		io-&gt;res = -EIO;</div><div class='hunk'>@@ -1131,37 +1152,12 @@ exit:</div><div class='ctx'> 	blk_mq_end_request(req, res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ublk_complete_rq(struct kref *ref)</div><div class='del'>-{</div><div class='del'>-	struct ublk_rq_data *data = container_of(ref, struct ublk_rq_data,</div><div class='del'>-			ref);</div><div class='del'>-	struct request *req = blk_mq_rq_from_pdu(data);</div><div class='del'>-</div><div class='del'>-	__ublk_complete_rq(req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Since ublk_rq_task_work_cb always fails requests immediately during</div><div class='del'>- * exiting, __ublk_fail_req() is only called from abort context during</div><div class='del'>- * exiting. So lock is unnecessary.</div><div class='del'>- *</div><div class='del'>- * Also aborting may not be started yet, keep in mind that one failed</div><div class='del'>- * request may be issued by block layer again.</div><div class='del'>- */</div><div class='del'>-static void __ublk_fail_req(struct ublk_queue *ubq, struct ublk_io *io,</div><div class='del'>-		struct request *req)</div><div class='add'>+static void ublk_complete_io_cmd(struct ublk_io *io, struct request *req,</div><div class='add'>+				 int res, unsigned issue_flags)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON_ONCE(io-&gt;flags &amp; UBLK_IO_FLAG_ACTIVE);</div><div class='add'>+	/* read cmd first because req will overwrite it */</div><div class='add'>+	struct io_uring_cmd *cmd = io-&gt;cmd;</div><div class='ctx'> </div><div class='del'>-	if (ublk_nosrv_should_reissue_outstanding(ubq-&gt;dev))</div><div class='del'>-		blk_mq_requeue_request(req, false);</div><div class='del'>-	else</div><div class='del'>-		ublk_put_req_ref(ubq, req);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ubq_complete_io_cmd(struct ublk_io *io, int res,</div><div class='del'>-				unsigned issue_flags)</div><div class='del'>-{</div><div class='ctx'> 	/* mark this cmd owned by ublksrv */</div><div class='ctx'> 	io-&gt;flags |= UBLK_IO_FLAG_OWNED_BY_SRV;</div><div class='ctx'> </div><div class='hunk'>@@ -1171,8 +1167,10 @@ static void ubq_complete_io_cmd(struct ublk_io *io, int res,</div><div class='ctx'> 	 */</div><div class='ctx'> 	io-&gt;flags &amp;= ~UBLK_IO_FLAG_ACTIVE;</div><div class='ctx'> </div><div class='add'>+	io-&gt;req = req;</div><div class='add'>+</div><div class='ctx'> 	/* tell ublksrv one io request is coming */</div><div class='del'>-	io_uring_cmd_done(io-&gt;cmd, res, 0, issue_flags);</div><div class='add'>+	io_uring_cmd_done(cmd, res, 0, issue_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define UBLK_REQUEUE_DELAY_MS	3</div><div class='hunk'>@@ -1187,16 +1185,91 @@ static inline void __ublk_abort_rq(struct ublk_queue *ubq,</div><div class='ctx'> 		blk_mq_end_request(rq, BLK_STS_IOERR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ublk_auto_buf_reg_fallback(struct request *req)</div><div class='add'>+{</div><div class='add'>+	const struct ublk_queue *ubq = req-&gt;mq_hctx-&gt;driver_data;</div><div class='add'>+	struct ublksrv_io_desc *iod = ublk_get_iod(ubq, req-&gt;tag);</div><div class='add'>+	struct ublk_rq_data *data = blk_mq_rq_to_pdu(req);</div><div class='add'>+</div><div class='add'>+	iod-&gt;op_flags |= UBLK_IO_F_NEED_REG_BUF;</div><div class='add'>+	refcount_set(&amp;data-&gt;ref, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ublk_auto_buf_reg(struct request *req, struct ublk_io *io,</div><div class='add'>+			      unsigned int issue_flags)</div><div class='add'>+{</div><div class='add'>+	struct ublk_uring_cmd_pdu *pdu = ublk_get_uring_cmd_pdu(io-&gt;cmd);</div><div class='add'>+	struct ublk_rq_data *data = blk_mq_rq_to_pdu(req);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = io_buffer_register_bvec(io-&gt;cmd, req, ublk_io_release,</div><div class='add'>+				      pdu-&gt;buf.index, issue_flags);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (pdu-&gt;buf.flags &amp; UBLK_AUTO_BUF_REG_FALLBACK) {</div><div class='add'>+			ublk_auto_buf_reg_fallback(req);</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+		blk_mq_end_request(req, BLK_STS_IOERR);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+	/* one extra reference is dropped by ublk_io_release */</div><div class='add'>+	refcount_set(&amp;data-&gt;ref, 2);</div><div class='add'>+</div><div class='add'>+	data-&gt;buf_ctx_handle = io_uring_cmd_ctx_handle(io-&gt;cmd);</div><div class='add'>+	/* store buffer index in request payload */</div><div class='add'>+	data-&gt;buf_index = pdu-&gt;buf.index;</div><div class='add'>+	io-&gt;flags |= UBLK_IO_FLAG_AUTO_BUF_REG;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ublk_prep_auto_buf_reg(struct ublk_queue *ubq,</div><div class='add'>+				   struct request *req, struct ublk_io *io,</div><div class='add'>+				   unsigned int issue_flags)</div><div class='add'>+{</div><div class='add'>+	if (ublk_support_auto_buf_reg(ubq) &amp;&amp; ublk_rq_has_data(req))</div><div class='add'>+		return ublk_auto_buf_reg(req, io, issue_flags);</div><div class='add'>+</div><div class='add'>+	ublk_init_req_ref(ubq, req);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ublk_start_io(const struct ublk_queue *ubq, struct request *req,</div><div class='add'>+			  struct ublk_io *io)</div><div class='add'>+{</div><div class='add'>+	unsigned mapped_bytes = ublk_map_io(ubq, req, io);</div><div class='add'>+</div><div class='add'>+	/* partially mapped, update io descriptor */</div><div class='add'>+	if (unlikely(mapped_bytes != blk_rq_bytes(req))) {</div><div class='add'>+		/*</div><div class='add'>+		 * Nothing mapped, retry until we succeed.</div><div class='add'>+		 *</div><div class='add'>+		 * We may never succeed in mapping any bytes here because</div><div class='add'>+		 * of OOM. TODO: reserve one buffer with single page pinned</div><div class='add'>+		 * for providing forward progress guarantee.</div><div class='add'>+		 */</div><div class='add'>+		if (unlikely(!mapped_bytes)) {</div><div class='add'>+			blk_mq_requeue_request(req, false);</div><div class='add'>+			blk_mq_delay_kick_requeue_list(req-&gt;q,</div><div class='add'>+					UBLK_REQUEUE_DELAY_MS);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ublk_get_iod(ubq, req-&gt;tag)-&gt;nr_sectors =</div><div class='add'>+			mapped_bytes &gt;&gt; 9;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ublk_dispatch_req(struct ublk_queue *ubq,</div><div class='ctx'> 			      struct request *req,</div><div class='ctx'> 			      unsigned int issue_flags)</div><div class='ctx'> {</div><div class='ctx'> 	int tag = req-&gt;tag;</div><div class='ctx'> 	struct ublk_io *io = &amp;ubq-&gt;ios[tag];</div><div class='del'>-	unsigned int mapped_bytes;</div><div class='ctx'> </div><div class='del'>-	pr_devel("%s: complete: op %d, qid %d tag %d io_flags %x addr %llx\n",</div><div class='del'>-			__func__, io-&gt;cmd-&gt;cmd_op, ubq-&gt;q_id, req-&gt;tag, io-&gt;flags,</div><div class='add'>+	pr_devel("%s: complete: qid %d tag %d io_flags %x addr %llx\n",</div><div class='add'>+			__func__, ubq-&gt;q_id, req-&gt;tag, io-&gt;flags,</div><div class='ctx'> 			ublk_get_iod(ubq, req-&gt;tag)-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1216,54 +1289,22 @@ static void ublk_dispatch_req(struct ublk_queue *ubq,</div><div class='ctx'> 	if (ublk_need_get_data(ubq) &amp;&amp; ublk_need_map_req(req)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * We have not handled UBLK_IO_NEED_GET_DATA command yet,</div><div class='del'>-		 * so immepdately pass UBLK_IO_RES_NEED_GET_DATA to ublksrv</div><div class='add'>+		 * so immediately pass UBLK_IO_RES_NEED_GET_DATA to ublksrv</div><div class='ctx'> 		 * and notify it.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!(io-&gt;flags &amp; UBLK_IO_FLAG_NEED_GET_DATA)) {</div><div class='del'>-			io-&gt;flags |= UBLK_IO_FLAG_NEED_GET_DATA;</div><div class='del'>-			pr_devel("%s: need get data. op %d, qid %d tag %d io_flags %x\n",</div><div class='del'>-					__func__, io-&gt;cmd-&gt;cmd_op, ubq-&gt;q_id,</div><div class='del'>-					req-&gt;tag, io-&gt;flags);</div><div class='del'>-			ubq_complete_io_cmd(io, UBLK_IO_RES_NEED_GET_DATA, issue_flags);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		/*</div><div class='del'>-		 * We have handled UBLK_IO_NEED_GET_DATA command,</div><div class='del'>-		 * so clear UBLK_IO_FLAG_NEED_GET_DATA now and just</div><div class='del'>-		 * do the copy work.</div><div class='del'>-		 */</div><div class='del'>-		io-&gt;flags &amp;= ~UBLK_IO_FLAG_NEED_GET_DATA;</div><div class='del'>-		/* update iod-&gt;addr because ublksrv may have passed a new io buffer */</div><div class='del'>-		ublk_get_iod(ubq, req-&gt;tag)-&gt;addr = io-&gt;addr;</div><div class='del'>-		pr_devel("%s: update iod-&gt;addr: op %d, qid %d tag %d io_flags %x addr %llx\n",</div><div class='del'>-				__func__, io-&gt;cmd-&gt;cmd_op, ubq-&gt;q_id, req-&gt;tag, io-&gt;flags,</div><div class='del'>-				ublk_get_iod(ubq, req-&gt;tag)-&gt;addr);</div><div class='add'>+		io-&gt;flags |= UBLK_IO_FLAG_NEED_GET_DATA;</div><div class='add'>+		pr_devel("%s: need get data. qid %d tag %d io_flags %x\n",</div><div class='add'>+				__func__, ubq-&gt;q_id, req-&gt;tag, io-&gt;flags);</div><div class='add'>+		ublk_complete_io_cmd(io, req, UBLK_IO_RES_NEED_GET_DATA,</div><div class='add'>+				     issue_flags);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mapped_bytes = ublk_map_io(ubq, req, io);</div><div class='del'>-</div><div class='del'>-	/* partially mapped, update io descriptor */</div><div class='del'>-	if (unlikely(mapped_bytes != blk_rq_bytes(req))) {</div><div class='del'>-		/*</div><div class='del'>-		 * Nothing mapped, retry until we succeed.</div><div class='del'>-		 *</div><div class='del'>-		 * We may never succeed in mapping any bytes here because</div><div class='del'>-		 * of OOM. TODO: reserve one buffer with single page pinned</div><div class='del'>-		 * for providing forward progress guarantee.</div><div class='del'>-		 */</div><div class='del'>-		if (unlikely(!mapped_bytes)) {</div><div class='del'>-			blk_mq_requeue_request(req, false);</div><div class='del'>-			blk_mq_delay_kick_requeue_list(req-&gt;q,</div><div class='del'>-					UBLK_REQUEUE_DELAY_MS);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ublk_get_iod(ubq, req-&gt;tag)-&gt;nr_sectors =</div><div class='del'>-			mapped_bytes &gt;&gt; 9;</div><div class='del'>-	}</div><div class='add'>+	if (!ublk_start_io(ubq, req, io))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	ublk_init_req_ref(ubq, req);</div><div class='del'>-	ubq_complete_io_cmd(io, UBLK_IO_RES_OK, issue_flags);</div><div class='add'>+	if (ublk_prep_auto_buf_reg(ubq, req, io, issue_flags))</div><div class='add'>+		ublk_complete_io_cmd(io, req, UBLK_IO_RES_OK, issue_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ublk_cmd_tw_cb(struct io_uring_cmd *cmd,</div><div class='hunk'>@@ -1314,8 +1355,6 @@ static void ublk_queue_cmd_list(struct ublk_queue *ubq, struct rq_list *l)</div><div class='ctx'> static enum blk_eh_timer_return ublk_timeout(struct request *rq)</div><div class='ctx'> {</div><div class='ctx'> 	struct ublk_queue *ubq = rq-&gt;mq_hctx-&gt;driver_data;</div><div class='del'>-	unsigned int nr_inflight = 0;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (ubq-&gt;flags &amp; UBLK_F_UNPRIVILEGED_DEV) {</div><div class='ctx'> 		if (!ubq-&gt;timeout) {</div><div class='hunk'>@@ -1326,30 +1365,11 @@ static enum blk_eh_timer_return ublk_timeout(struct request *rq)</div><div class='ctx'> 		return BLK_EH_DONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!ubq_daemon_is_dying(ubq))</div><div class='del'>-		return BLK_EH_RESET_TIMER;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ubq-&gt;q_depth; i++) {</div><div class='del'>-		struct ublk_io *io = &amp;ubq-&gt;ios[i];</div><div class='del'>-</div><div class='del'>-		if (!(io-&gt;flags &amp; UBLK_IO_FLAG_ACTIVE))</div><div class='del'>-			nr_inflight++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* cancelable uring_cmd can't help us if all commands are in-flight */</div><div class='del'>-	if (nr_inflight == ubq-&gt;q_depth) {</div><div class='del'>-		struct ublk_device *ub = ubq-&gt;dev;</div><div class='del'>-</div><div class='del'>-		if (ublk_abort_requests(ub, ubq)) {</div><div class='del'>-			schedule_work(&amp;ub-&gt;nosrv_work);</div><div class='del'>-		}</div><div class='del'>-		return BLK_EH_DONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return BLK_EH_RESET_TIMER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static blk_status_t ublk_prep_req(struct ublk_queue *ubq, struct request *rq)</div><div class='add'>+static blk_status_t ublk_prep_req(struct ublk_queue *ubq, struct request *rq,</div><div class='add'>+				  bool check_cancel)</div><div class='ctx'> {</div><div class='ctx'> 	blk_status_t res;</div><div class='ctx'> </div><div class='hunk'>@@ -1368,7 +1388,7 @@ static blk_status_t ublk_prep_req(struct ublk_queue *ubq, struct request *rq)</div><div class='ctx'> 	if (ublk_nosrv_should_queue_io(ubq) &amp;&amp; unlikely(ubq-&gt;force_abort))</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(ubq-&gt;canceling))</div><div class='add'>+	if (check_cancel &amp;&amp; unlikely(ubq-&gt;canceling))</div><div class='ctx'> 		return BLK_STS_IOERR;</div><div class='ctx'> </div><div class='ctx'> 	/* fill iod to slot in io cmd buffer */</div><div class='hunk'>@@ -1387,7 +1407,7 @@ static blk_status_t ublk_queue_rq(struct blk_mq_hw_ctx *hctx,</div><div class='ctx'> 	struct request *rq = bd-&gt;rq;</div><div class='ctx'> 	blk_status_t res;</div><div class='ctx'> </div><div class='del'>-	res = ublk_prep_req(ubq, rq);</div><div class='add'>+	res = ublk_prep_req(ubq, rq, false);</div><div class='ctx'> 	if (res != BLK_STS_OK)</div><div class='ctx'> 		return res;</div><div class='ctx'> </div><div class='hunk'>@@ -1419,7 +1439,7 @@ static void ublk_queue_rqs(struct rq_list *rqlist)</div><div class='ctx'> 			ublk_queue_cmd_list(ubq, &amp;submit_list);</div><div class='ctx'> 		ubq = this_q;</div><div class='ctx'> </div><div class='del'>-		if (ublk_prep_req(ubq, req) == BLK_STS_OK)</div><div class='add'>+		if (ublk_prep_req(ubq, req, true) == BLK_STS_OK)</div><div class='ctx'> 			rq_list_add_tail(&amp;submit_list, req);</div><div class='ctx'> 		else</div><div class='ctx'> 			rq_list_add_tail(&amp;requeue_list, req);</div><div class='hunk'>@@ -1447,6 +1467,37 @@ static const struct blk_mq_ops ublk_mq_ops = {</div><div class='ctx'> 	.timeout	= ublk_timeout,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void ublk_queue_reinit(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* All old ioucmds have to be completed */</div><div class='add'>+	ubq-&gt;nr_io_ready = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * old daemon is PF_EXITING, put it now</div><div class='add'>+	 *</div><div class='add'>+	 * It could be NULL in case of closing one quisced device.</div><div class='add'>+	 */</div><div class='add'>+	if (ubq-&gt;ubq_daemon)</div><div class='add'>+		put_task_struct(ubq-&gt;ubq_daemon);</div><div class='add'>+	/* We have to reset it to NULL, otherwise ub won't accept new FETCH_REQ */</div><div class='add'>+	ubq-&gt;ubq_daemon = NULL;</div><div class='add'>+	ubq-&gt;timeout = false;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ubq-&gt;q_depth; i++) {</div><div class='add'>+		struct ublk_io *io = &amp;ubq-&gt;ios[i];</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * UBLK_IO_FLAG_CANCELED is kept for avoiding to touch</div><div class='add'>+		 * io-&gt;cmd</div><div class='add'>+		 */</div><div class='add'>+		io-&gt;flags &amp;= UBLK_IO_FLAG_CANCELED;</div><div class='add'>+		io-&gt;cmd = NULL;</div><div class='add'>+		io-&gt;addr = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ublk_ch_open(struct inode *inode, struct file *filp)</div><div class='ctx'> {</div><div class='ctx'> 	struct ublk_device *ub = container_of(inode-&gt;i_cdev,</div><div class='hunk'>@@ -1458,10 +1509,119 @@ static int ublk_ch_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ublk_reset_ch_dev(struct ublk_device *ub)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++)</div><div class='add'>+		ublk_queue_reinit(ub, ublk_get_queue(ub, i));</div><div class='add'>+</div><div class='add'>+	/* set to NULL, otherwise new ubq_daemon cannot mmap the io_cmd_buf */</div><div class='add'>+	ub-&gt;mm = NULL;</div><div class='add'>+	ub-&gt;nr_queues_ready = 0;</div><div class='add'>+	ub-&gt;nr_privileged_daemon = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct gendisk *ublk_get_disk(struct ublk_device *ub)</div><div class='add'>+{</div><div class='add'>+	struct gendisk *disk;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ub-&gt;lock);</div><div class='add'>+	disk = ub-&gt;ub_disk;</div><div class='add'>+	if (disk)</div><div class='add'>+		get_device(disk_to_dev(disk));</div><div class='add'>+	spin_unlock(&amp;ub-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return disk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ublk_put_disk(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	if (disk)</div><div class='add'>+		put_device(disk_to_dev(disk));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ublk_ch_release(struct inode *inode, struct file *filp)</div><div class='ctx'> {</div><div class='ctx'> 	struct ublk_device *ub = filp-&gt;private_data;</div><div class='add'>+	struct gendisk *disk;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * disk isn't attached yet, either device isn't live, or it has</div><div class='add'>+	 * been removed already, so we needn't to do anything</div><div class='add'>+	 */</div><div class='add'>+	disk = ublk_get_disk(ub);</div><div class='add'>+	if (!disk)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * All uring_cmd are done now, so abort any request outstanding to</div><div class='add'>+	 * the ublk server</div><div class='add'>+	 *</div><div class='add'>+	 * This can be done in lockless way because ublk server has been</div><div class='add'>+	 * gone</div><div class='add'>+	 *</div><div class='add'>+	 * More importantly, we have to provide forward progress guarantee</div><div class='add'>+	 * without holding ub-&gt;mutex, otherwise control task grabbing</div><div class='add'>+	 * ub-&gt;mutex triggers deadlock</div><div class='add'>+	 *</div><div class='add'>+	 * All requests may be inflight, so -&gt;canceling may not be set, set</div><div class='add'>+	 * it now.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++) {</div><div class='add'>+		struct ublk_queue *ubq = ublk_get_queue(ub, i);</div><div class='add'>+</div><div class='add'>+		ubq-&gt;canceling = true;</div><div class='add'>+		ublk_abort_queue(ub, ubq);</div><div class='add'>+	}</div><div class='add'>+	blk_mq_kick_requeue_list(disk-&gt;queue);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * All infligh requests have been completed or requeued and any new</div><div class='add'>+	 * request will be failed or requeued via `-&gt;canceling` now, so it is</div><div class='add'>+	 * fine to grab ub-&gt;mutex now.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;ub-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	/* double check after grabbing lock */</div><div class='add'>+	if (!ub-&gt;ub_disk)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Transition the device to the nosrv state. What exactly this</div><div class='add'>+	 * means depends on the recovery flags</div><div class='add'>+	 */</div><div class='add'>+	blk_mq_quiesce_queue(disk-&gt;queue);</div><div class='add'>+	if (ublk_nosrv_should_stop_dev(ub)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Allow any pending/future I/O to pass through quickly</div><div class='add'>+		 * with an error. This is needed because del_gendisk</div><div class='add'>+		 * waits for all pending I/O to complete</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++)</div><div class='add'>+			ublk_get_queue(ub, i)-&gt;force_abort = true;</div><div class='add'>+		blk_mq_unquiesce_queue(disk-&gt;queue);</div><div class='add'>+</div><div class='add'>+		ublk_stop_dev_unlocked(ub);</div><div class='add'>+	} else {</div><div class='add'>+		if (ublk_nosrv_dev_should_queue_io(ub)) {</div><div class='add'>+			/* -&gt;canceling is set and all requests are aborted */</div><div class='add'>+			ub-&gt;dev_info.state = UBLK_S_DEV_QUIESCED;</div><div class='add'>+		} else {</div><div class='add'>+			ub-&gt;dev_info.state = UBLK_S_DEV_FAIL_IO;</div><div class='add'>+			for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++)</div><div class='add'>+				ublk_get_queue(ub, i)-&gt;fail_io = true;</div><div class='add'>+		}</div><div class='add'>+		blk_mq_unquiesce_queue(disk-&gt;queue);</div><div class='add'>+	}</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='add'>+	ublk_put_disk(disk);</div><div class='add'>+</div><div class='add'>+	/* all uring_cmd has been done now, reset device &amp; ubq */</div><div class='add'>+	ublk_reset_ch_dev(ub);</div><div class='add'>+out:</div><div class='ctx'> 	clear_bit(UB_STATE_OPEN, &amp;ub-&gt;state);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1504,34 +1664,26 @@ static int ublk_ch_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 	return remap_pfn_range(vma, vma-&gt;vm_start, pfn, sz, vma-&gt;vm_page_prot);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ublk_commit_completion(struct ublk_device *ub,</div><div class='del'>-		const struct ublksrv_io_cmd *ub_cmd)</div><div class='add'>+static void __ublk_fail_req(struct ublk_queue *ubq, struct ublk_io *io,</div><div class='add'>+		struct request *req)</div><div class='ctx'> {</div><div class='del'>-	u32 qid = ub_cmd-&gt;q_id, tag = ub_cmd-&gt;tag;</div><div class='del'>-	struct ublk_queue *ubq = ublk_get_queue(ub, qid);</div><div class='del'>-	struct ublk_io *io = &amp;ubq-&gt;ios[tag];</div><div class='del'>-	struct request *req;</div><div class='del'>-</div><div class='del'>-	/* now this cmd slot is owned by nbd driver */</div><div class='del'>-	io-&gt;flags &amp;= ~UBLK_IO_FLAG_OWNED_BY_SRV;</div><div class='del'>-	io-&gt;res = ub_cmd-&gt;result;</div><div class='del'>-</div><div class='del'>-	/* find the io request and complete */</div><div class='del'>-	req = blk_mq_tag_to_rq(ub-&gt;tag_set.tags[qid], tag);</div><div class='del'>-	if (WARN_ON_ONCE(unlikely(!req)))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (req_op(req) == REQ_OP_ZONE_APPEND)</div><div class='del'>-		req-&gt;__sector = ub_cmd-&gt;zone_append_lba;</div><div class='add'>+	WARN_ON_ONCE(io-&gt;flags &amp; UBLK_IO_FLAG_ACTIVE);</div><div class='ctx'> </div><div class='del'>-	if (likely(!blk_should_fake_timeout(req-&gt;q)))</div><div class='del'>-		ublk_put_req_ref(ubq, req);</div><div class='add'>+	if (ublk_nosrv_should_reissue_outstanding(ubq-&gt;dev))</div><div class='add'>+		blk_mq_requeue_request(req, false);</div><div class='add'>+	else {</div><div class='add'>+		io-&gt;res = -EIO;</div><div class='add'>+		__ublk_complete_rq(req);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Called from ubq_daemon context via cancel fn, meantime quiesce ublk</div><div class='del'>- * blk-mq queue, so we are called exclusively with blk-mq and ubq_daemon</div><div class='del'>- * context, so everything is serialized.</div><div class='add'>+ * Called from ublk char device release handler, when any uring_cmd is</div><div class='add'>+ * done, meantime request queue is "quiesced" since all inflight requests</div><div class='add'>+ * can't be completed because ublk server is dead.</div><div class='add'>+ *</div><div class='add'>+ * So no one can hold our request IO reference any more, simply ignore the</div><div class='add'>+ * reference, and complete the request immediately</div><div class='ctx'>  */</div><div class='ctx'> static void ublk_abort_queue(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='ctx'> {</div><div class='hunk'>@@ -1540,54 +1692,28 @@ static void ublk_abort_queue(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='ctx'> 	for (i = 0; i &lt; ubq-&gt;q_depth; i++) {</div><div class='ctx'> 		struct ublk_io *io = &amp;ubq-&gt;ios[i];</div><div class='ctx'> </div><div class='del'>-		if (!(io-&gt;flags &amp; UBLK_IO_FLAG_ACTIVE)) {</div><div class='del'>-			struct request *rq;</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Either we fail the request or ublk_rq_task_work_cb</div><div class='del'>-			 * will do it</div><div class='del'>-			 */</div><div class='del'>-			rq = blk_mq_tag_to_rq(ub-&gt;tag_set.tags[ubq-&gt;q_id], i);</div><div class='del'>-			if (rq &amp;&amp; blk_mq_request_started(rq)) {</div><div class='del'>-				io-&gt;flags |= UBLK_IO_FLAG_ABORTED;</div><div class='del'>-				__ublk_fail_req(ubq, io, rq);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		if (io-&gt;flags &amp; UBLK_IO_FLAG_OWNED_BY_SRV)</div><div class='add'>+			__ublk_fail_req(ubq, io, io-&gt;req);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Must be called when queue is frozen */</div><div class='del'>-static bool ublk_mark_queue_canceling(struct ublk_queue *ubq)</div><div class='add'>+static void ublk_mark_queue_canceling(struct ublk_queue *ubq)</div><div class='ctx'> {</div><div class='del'>-	bool canceled;</div><div class='del'>-</div><div class='ctx'> 	spin_lock(&amp;ubq-&gt;cancel_lock);</div><div class='del'>-	canceled = ubq-&gt;canceling;</div><div class='del'>-	if (!canceled)</div><div class='add'>+	if (!ubq-&gt;canceling)</div><div class='ctx'> 		ubq-&gt;canceling = true;</div><div class='ctx'> 	spin_unlock(&amp;ubq-&gt;cancel_lock);</div><div class='del'>-</div><div class='del'>-	return canceled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ublk_abort_requests(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='add'>+static void ublk_start_cancel(struct ublk_queue *ubq)</div><div class='ctx'> {</div><div class='del'>-	bool was_canceled = ubq-&gt;canceling;</div><div class='del'>-	struct gendisk *disk;</div><div class='del'>-</div><div class='del'>-	if (was_canceled)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;ub-&gt;lock);</div><div class='del'>-	disk = ub-&gt;ub_disk;</div><div class='del'>-	if (disk)</div><div class='del'>-		get_device(disk_to_dev(disk));</div><div class='del'>-	spin_unlock(&amp;ub-&gt;lock);</div><div class='add'>+	struct ublk_device *ub = ubq-&gt;dev;</div><div class='add'>+	struct gendisk *disk = ublk_get_disk(ub);</div><div class='ctx'> </div><div class='ctx'> 	/* Our disk has been dead */</div><div class='ctx'> 	if (!disk)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='add'>+		return;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Now we are serialized with ublk_queue_rq()</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -1596,25 +1722,36 @@ static bool ublk_abort_requests(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='ctx'> 	 * touch completed uring_cmd</div><div class='ctx'> 	 */</div><div class='ctx'> 	blk_mq_quiesce_queue(disk-&gt;queue);</div><div class='del'>-	was_canceled = ublk_mark_queue_canceling(ubq);</div><div class='del'>-	if (!was_canceled) {</div><div class='del'>-		/* abort queue is for making forward progress */</div><div class='del'>-		ublk_abort_queue(ub, ubq);</div><div class='del'>-	}</div><div class='add'>+	ublk_mark_queue_canceling(ubq);</div><div class='ctx'> 	blk_mq_unquiesce_queue(disk-&gt;queue);</div><div class='del'>-	put_device(disk_to_dev(disk));</div><div class='del'>-</div><div class='del'>-	return !was_canceled;</div><div class='add'>+	ublk_put_disk(disk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ublk_cancel_cmd(struct ublk_queue *ubq, struct ublk_io *io,</div><div class='add'>+static void ublk_cancel_cmd(struct ublk_queue *ubq, unsigned tag,</div><div class='ctx'> 		unsigned int issue_flags)</div><div class='ctx'> {</div><div class='add'>+	struct ublk_io *io = &amp;ubq-&gt;ios[tag];</div><div class='add'>+	struct ublk_device *ub = ubq-&gt;dev;</div><div class='add'>+	struct request *req;</div><div class='ctx'> 	bool done;</div><div class='ctx'> </div><div class='ctx'> 	if (!(io-&gt;flags &amp; UBLK_IO_FLAG_ACTIVE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Don't try to cancel this command if the request is started for</div><div class='add'>+	 * avoiding race between io_uring_cmd_done() and</div><div class='add'>+	 * io_uring_cmd_complete_in_task().</div><div class='add'>+	 *</div><div class='add'>+	 * Either the started request will be aborted via __ublk_abort_rq(),</div><div class='add'>+	 * then this uring_cmd is canceled next time, or it will be done in</div><div class='add'>+	 * task work function ublk_dispatch_req() because io_uring guarantees</div><div class='add'>+	 * that ublk_dispatch_req() is always called</div><div class='add'>+	 */</div><div class='add'>+	req = blk_mq_tag_to_rq(ub-&gt;tag_set.tags[ubq-&gt;q_id], tag);</div><div class='add'>+	if (req &amp;&amp; blk_mq_request_started(req) &amp;&amp; req-&gt;tag == tag)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	spin_lock(&amp;ubq-&gt;cancel_lock);</div><div class='ctx'> 	done = !!(io-&gt;flags &amp; UBLK_IO_FLAG_CANCELED);</div><div class='ctx'> 	if (!done)</div><div class='hunk'>@@ -1628,6 +1765,17 @@ static void ublk_cancel_cmd(struct ublk_queue *ubq, struct ublk_io *io,</div><div class='ctx'> /*</div><div class='ctx'>  * The ublk char device won't be closed when calling cancel fn, so both</div><div class='ctx'>  * ublk device and queue are guaranteed to be live</div><div class='add'>+ *</div><div class='add'>+ * Two-stage cancel:</div><div class='add'>+ *</div><div class='add'>+ * - make every active uring_cmd done in -&gt;cancel_fn()</div><div class='add'>+ *</div><div class='add'>+ * - aborting inflight ublk IO requests in ublk char device release handler,</div><div class='add'>+ *   which depends on 1st stage because device can only be closed iff all</div><div class='add'>+ *   uring_cmd are done</div><div class='add'>+ *</div><div class='add'>+ * Do _not_ try to acquire ub-&gt;mutex before all inflight requests are</div><div class='add'>+ * aborted, otherwise deadlock may be caused.</div><div class='ctx'>  */</div><div class='ctx'> static void ublk_uring_cmd_cancel_fn(struct io_uring_cmd *cmd,</div><div class='ctx'> 		unsigned int issue_flags)</div><div class='hunk'>@@ -1635,9 +1783,6 @@ static void ublk_uring_cmd_cancel_fn(struct io_uring_cmd *cmd,</div><div class='ctx'> 	struct ublk_uring_cmd_pdu *pdu = ublk_get_uring_cmd_pdu(cmd);</div><div class='ctx'> 	struct ublk_queue *ubq = pdu-&gt;ubq;</div><div class='ctx'> 	struct task_struct *task;</div><div class='del'>-	struct ublk_device *ub;</div><div class='del'>-	bool need_schedule;</div><div class='del'>-	struct ublk_io *io;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON_ONCE(!ubq))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1649,16 +1794,11 @@ static void ublk_uring_cmd_cancel_fn(struct io_uring_cmd *cmd,</div><div class='ctx'> 	if (WARN_ON_ONCE(task &amp;&amp; task != ubq-&gt;ubq_daemon))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ub = ubq-&gt;dev;</div><div class='del'>-	need_schedule = ublk_abort_requests(ub, ubq);</div><div class='del'>-</div><div class='del'>-	io = &amp;ubq-&gt;ios[pdu-&gt;tag];</div><div class='del'>-	WARN_ON_ONCE(io-&gt;cmd != cmd);</div><div class='del'>-	ublk_cancel_cmd(ubq, io, issue_flags);</div><div class='add'>+	if (!ubq-&gt;canceling)</div><div class='add'>+		ublk_start_cancel(ubq);</div><div class='ctx'> </div><div class='del'>-	if (need_schedule) {</div><div class='del'>-		schedule_work(&amp;ub-&gt;nosrv_work);</div><div class='del'>-	}</div><div class='add'>+	WARN_ON_ONCE(ubq-&gt;ios[pdu-&gt;tag].cmd != cmd);</div><div class='add'>+	ublk_cancel_cmd(ubq, pdu-&gt;tag, issue_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool ublk_queue_ready(struct ublk_queue *ubq)</div><div class='hunk'>@@ -1671,7 +1811,7 @@ static void ublk_cancel_queue(struct ublk_queue *ubq)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ubq-&gt;q_depth; i++)</div><div class='del'>-		ublk_cancel_cmd(ubq, &amp;ubq-&gt;ios[i], IO_URING_F_UNLOCKED);</div><div class='add'>+		ublk_cancel_cmd(ubq, i, IO_URING_F_UNLOCKED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Cancel all pending commands, must be called after del_gendisk() returns */</div><div class='hunk'>@@ -1709,33 +1849,20 @@ static void ublk_wait_tagset_rqs_idle(struct ublk_device *ub)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __ublk_quiesce_dev(struct ublk_device *ub)</div><div class='del'>-{</div><div class='del'>-	pr_devel("%s: quiesce ub: dev_id %d state %s\n",</div><div class='del'>-			__func__, ub-&gt;dev_info.dev_id,</div><div class='del'>-			ub-&gt;dev_info.state == UBLK_S_DEV_LIVE ?</div><div class='del'>-			"LIVE" : "QUIESCED");</div><div class='del'>-	blk_mq_quiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='del'>-	ublk_wait_tagset_rqs_idle(ub);</div><div class='del'>-	ub-&gt;dev_info.state = UBLK_S_DEV_QUIESCED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ublk_unquiesce_dev(struct ublk_device *ub)</div><div class='add'>+static void ublk_force_abort_dev(struct ublk_device *ub)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	pr_devel("%s: unquiesce ub: dev_id %d state %s\n",</div><div class='add'>+	pr_devel("%s: force abort ub: dev_id %d state %s\n",</div><div class='ctx'> 			__func__, ub-&gt;dev_info.dev_id,</div><div class='ctx'> 			ub-&gt;dev_info.state == UBLK_S_DEV_LIVE ?</div><div class='ctx'> 			"LIVE" : "QUIESCED");</div><div class='del'>-	/* quiesce_work has run. We let requeued rqs be aborted</div><div class='del'>-	 * before running fallback_wq. "force_abort" must be seen</div><div class='del'>-	 * after request queue is unqiuesced. Then del_gendisk()</div><div class='del'>-	 * can move on.</div><div class='del'>-	 */</div><div class='add'>+	blk_mq_quiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='add'>+	if (ub-&gt;dev_info.state == UBLK_S_DEV_LIVE)</div><div class='add'>+		ublk_wait_tagset_rqs_idle(ub);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++)</div><div class='ctx'> 		ublk_get_queue(ub, i)-&gt;force_abort = true;</div><div class='del'>-</div><div class='ctx'> 	blk_mq_unquiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='ctx'> 	/* We may have requeued some rqs in ublk_quiesce_queue() */</div><div class='ctx'> 	blk_mq_kick_requeue_list(ub-&gt;ub_disk-&gt;queue);</div><div class='hunk'>@@ -1756,61 +1883,51 @@ static struct gendisk *ublk_detach_disk(struct ublk_device *ub)</div><div class='ctx'> 	return disk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ublk_stop_dev(struct ublk_device *ub)</div><div class='add'>+static void ublk_stop_dev_unlocked(struct ublk_device *ub)</div><div class='add'>+	__must_hold(&amp;ub-&gt;mutex)</div><div class='ctx'> {</div><div class='ctx'> 	struct gendisk *disk;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;ub-&gt;mutex);</div><div class='ctx'> 	if (ub-&gt;dev_info.state == UBLK_S_DEV_DEAD)</div><div class='del'>-		goto unlock;</div><div class='del'>-	if (ublk_nosrv_dev_should_queue_io(ub)) {</div><div class='del'>-		if (ub-&gt;dev_info.state == UBLK_S_DEV_LIVE)</div><div class='del'>-			__ublk_quiesce_dev(ub);</div><div class='del'>-		ublk_unquiesce_dev(ub);</div><div class='del'>-	}</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ublk_nosrv_dev_should_queue_io(ub))</div><div class='add'>+		ublk_force_abort_dev(ub);</div><div class='ctx'> 	del_gendisk(ub-&gt;ub_disk);</div><div class='ctx'> 	disk = ublk_detach_disk(ub);</div><div class='ctx'> 	put_disk(disk);</div><div class='del'>- unlock:</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ublk_stop_dev(struct ublk_device *ub)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;ub-&gt;mutex);</div><div class='add'>+	ublk_stop_dev_unlocked(ub);</div><div class='ctx'> 	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='ctx'> 	ublk_cancel_dev(ub);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ublk_nosrv_work(struct work_struct *work)</div><div class='add'>+/* reset ublk io_uring queue &amp; io flags */</div><div class='add'>+static void ublk_reset_io_flags(struct ublk_device *ub)</div><div class='ctx'> {</div><div class='del'>-	struct ublk_device *ub =</div><div class='del'>-		container_of(work, struct ublk_device, nosrv_work);</div><div class='del'>-	int i;</div><div class='add'>+	int i, j;</div><div class='ctx'> </div><div class='del'>-	if (ublk_nosrv_should_stop_dev(ub)) {</div><div class='del'>-		ublk_stop_dev(ub);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ub-&gt;mutex);</div><div class='del'>-	if (ub-&gt;dev_info.state != UBLK_S_DEV_LIVE)</div><div class='del'>-		goto unlock;</div><div class='add'>+	for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++) {</div><div class='add'>+		struct ublk_queue *ubq = ublk_get_queue(ub, i);</div><div class='ctx'> </div><div class='del'>-	if (ublk_nosrv_dev_should_queue_io(ub)) {</div><div class='del'>-		__ublk_quiesce_dev(ub);</div><div class='del'>-	} else {</div><div class='del'>-		blk_mq_quiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='del'>-		ub-&gt;dev_info.state = UBLK_S_DEV_FAIL_IO;</div><div class='del'>-		for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++) {</div><div class='del'>-			ublk_get_queue(ub, i)-&gt;fail_io = true;</div><div class='del'>-		}</div><div class='del'>-		blk_mq_unquiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='add'>+		/* UBLK_IO_FLAG_CANCELED can be cleared now */</div><div class='add'>+		spin_lock(&amp;ubq-&gt;cancel_lock);</div><div class='add'>+		for (j = 0; j &lt; ubq-&gt;q_depth; j++)</div><div class='add'>+			ubq-&gt;ios[j].flags &amp;= ~UBLK_IO_FLAG_CANCELED;</div><div class='add'>+		spin_unlock(&amp;ubq-&gt;cancel_lock);</div><div class='add'>+		ubq-&gt;canceling = false;</div><div class='add'>+		ubq-&gt;fail_io = false;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>- unlock:</div><div class='del'>-	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='del'>-	ublk_cancel_dev(ub);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* device can only be started after all IOs are ready */</div><div class='ctx'> static void ublk_mark_io_ready(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='add'>+	__must_hold(&amp;ub-&gt;mutex)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;ub-&gt;mutex);</div><div class='ctx'> 	ubq-&gt;nr_io_ready++;</div><div class='ctx'> 	if (ublk_queue_ready(ubq)) {</div><div class='ctx'> 		ubq-&gt;ubq_daemon = current;</div><div class='hunk'>@@ -1820,18 +1937,12 @@ static void ublk_mark_io_ready(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='ctx'> 		if (capable(CAP_SYS_ADMIN))</div><div class='ctx'> 			ub-&gt;nr_privileged_daemon++;</div><div class='ctx'> 	}</div><div class='del'>-	if (ub-&gt;nr_queues_ready == ub-&gt;dev_info.nr_hw_queues)</div><div class='del'>-		complete_all(&amp;ub-&gt;completion);</div><div class='del'>-	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void ublk_handle_need_get_data(struct ublk_device *ub, int q_id,</div><div class='del'>-		int tag)</div><div class='del'>-{</div><div class='del'>-	struct ublk_queue *ubq = ublk_get_queue(ub, q_id);</div><div class='del'>-	struct request *req = blk_mq_tag_to_rq(ub-&gt;tag_set.tags[q_id], tag);</div><div class='del'>-</div><div class='del'>-	ublk_queue_cmd(ubq, req);</div><div class='add'>+	if (ub-&gt;nr_queues_ready == ub-&gt;dev_info.nr_hw_queues) {</div><div class='add'>+		/* now we are ready for handling ublk io request */</div><div class='add'>+		ublk_reset_io_flags(ub);</div><div class='add'>+		complete_all(&amp;ub-&gt;completion);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int ublk_check_cmd_op(u32 cmd_op)</div><div class='hunk'>@@ -1870,6 +1981,20 @@ static inline void ublk_prep_cancel(struct io_uring_cmd *cmd,</div><div class='ctx'> 	io_uring_cmd_mark_cancelable(cmd, issue_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int ublk_set_auto_buf_reg(struct io_uring_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct ublk_uring_cmd_pdu *pdu = ublk_get_uring_cmd_pdu(cmd);</div><div class='add'>+</div><div class='add'>+	pdu-&gt;buf = ublk_sqe_addr_to_auto_buf_reg(READ_ONCE(cmd-&gt;sqe-&gt;addr));</div><div class='add'>+</div><div class='add'>+	if (pdu-&gt;buf.reserved0 || pdu-&gt;buf.reserved1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (pdu-&gt;buf.flags &amp; ~UBLK_AUTO_BUF_REG_F_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ublk_io_release(void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct request *rq = priv;</div><div class='hunk'>@@ -1879,13 +2004,16 @@ static void ublk_io_release(void *priv)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_register_io_buf(struct io_uring_cmd *cmd,</div><div class='del'>-				struct ublk_queue *ubq, unsigned int tag,</div><div class='add'>+				const struct ublk_queue *ubq, unsigned int tag,</div><div class='ctx'> 				unsigned int index, unsigned int issue_flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct ublk_device *ub = cmd-&gt;file-&gt;private_data;</div><div class='ctx'> 	struct request *req;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!ublk_support_zero_copy(ubq))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	req = __ublk_check_and_get_req(ub, ubq, tag, 0);</div><div class='ctx'> 	if (!req)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1901,11 +2029,151 @@ static int ublk_register_io_buf(struct io_uring_cmd *cmd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_unregister_io_buf(struct io_uring_cmd *cmd,</div><div class='add'>+				  const struct ublk_queue *ubq,</div><div class='ctx'> 				  unsigned int index, unsigned int issue_flags)</div><div class='ctx'> {</div><div class='add'>+	if (!ublk_support_zero_copy(ubq))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return io_buffer_unregister_bvec(cmd, index, issue_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ublk_fetch(struct io_uring_cmd *cmd, struct ublk_queue *ubq,</div><div class='add'>+		      struct ublk_io *io, __u64 buf_addr)</div><div class='add'>+{</div><div class='add'>+	struct ublk_device *ub = ubq-&gt;dev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When handling FETCH command for setting up ublk uring queue,</div><div class='add'>+	 * ub-&gt;mutex is the innermost lock, and we won't block for handling</div><div class='add'>+	 * FETCH, so it is fine even for IO_URING_F_NONBLOCK.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;ub-&gt;mutex);</div><div class='add'>+	/* UBLK_IO_FETCH_REQ is only allowed before queue is setup */</div><div class='add'>+	if (ublk_queue_ready(ubq)) {</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* allow each command to be FETCHed at most once */</div><div class='add'>+	if (io-&gt;flags &amp; UBLK_IO_FLAG_ACTIVE) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(io-&gt;flags &amp; UBLK_IO_FLAG_OWNED_BY_SRV);</div><div class='add'>+</div><div class='add'>+	if (ublk_need_map_io(ubq)) {</div><div class='add'>+		/*</div><div class='add'>+		 * FETCH_RQ has to provide IO buffer if NEED GET</div><div class='add'>+		 * DATA is not enabled</div><div class='add'>+		 */</div><div class='add'>+		if (!buf_addr &amp;&amp; !ublk_need_get_data(ubq))</div><div class='add'>+			goto out;</div><div class='add'>+	} else if (buf_addr) {</div><div class='add'>+		/* User copy requires addr to be unset */</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ublk_support_auto_buf_reg(ubq)) {</div><div class='add'>+		ret = ublk_set_auto_buf_reg(cmd);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ublk_fill_io_cmd(io, cmd, buf_addr);</div><div class='add'>+	ublk_mark_io_ready(ub, ubq);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ublk_commit_and_fetch(const struct ublk_queue *ubq,</div><div class='add'>+				 struct ublk_io *io, struct io_uring_cmd *cmd,</div><div class='add'>+				 const struct ublksrv_io_cmd *ub_cmd,</div><div class='add'>+				 unsigned int issue_flags)</div><div class='add'>+{</div><div class='add'>+	struct request *req = io-&gt;req;</div><div class='add'>+</div><div class='add'>+	if (ublk_need_map_io(ubq)) {</div><div class='add'>+		/*</div><div class='add'>+		 * COMMIT_AND_FETCH_REQ has to provide IO buffer if</div><div class='add'>+		 * NEED GET DATA is not enabled or it is Read IO.</div><div class='add'>+		 */</div><div class='add'>+		if (!ub_cmd-&gt;addr &amp;&amp; (!ublk_need_get_data(ubq) ||</div><div class='add'>+					req_op(req) == REQ_OP_READ))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	} else if (req_op(req) != REQ_OP_ZONE_APPEND &amp;&amp; ub_cmd-&gt;addr) {</div><div class='add'>+		/*</div><div class='add'>+		 * User copy requires addr to be unset when command is</div><div class='add'>+		 * not zone append</div><div class='add'>+		 */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ublk_support_auto_buf_reg(ubq)) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * `UBLK_F_AUTO_BUF_REG` only works iff `UBLK_IO_FETCH_REQ`</div><div class='add'>+		 * and `UBLK_IO_COMMIT_AND_FETCH_REQ` are issued from same</div><div class='add'>+		 * `io_ring_ctx`.</div><div class='add'>+		 *</div><div class='add'>+		 * If this uring_cmd's io_ring_ctx isn't same with the</div><div class='add'>+		 * one for registering the buffer, it is ublk server's</div><div class='add'>+		 * responsibility for unregistering the buffer, otherwise</div><div class='add'>+		 * this ublk request gets stuck.</div><div class='add'>+		 */</div><div class='add'>+		if (io-&gt;flags &amp; UBLK_IO_FLAG_AUTO_BUF_REG) {</div><div class='add'>+			struct ublk_rq_data *data = blk_mq_rq_to_pdu(req);</div><div class='add'>+</div><div class='add'>+			if (data-&gt;buf_ctx_handle == io_uring_cmd_ctx_handle(cmd))</div><div class='add'>+				io_buffer_unregister_bvec(cmd, data-&gt;buf_index,</div><div class='add'>+						issue_flags);</div><div class='add'>+			io-&gt;flags &amp;= ~UBLK_IO_FLAG_AUTO_BUF_REG;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = ublk_set_auto_buf_reg(cmd);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ublk_fill_io_cmd(io, cmd, ub_cmd-&gt;addr);</div><div class='add'>+</div><div class='add'>+	/* now this cmd slot is owned by ublk driver */</div><div class='add'>+	io-&gt;flags &amp;= ~UBLK_IO_FLAG_OWNED_BY_SRV;</div><div class='add'>+	io-&gt;res = ub_cmd-&gt;result;</div><div class='add'>+</div><div class='add'>+	if (req_op(req) == REQ_OP_ZONE_APPEND)</div><div class='add'>+		req-&gt;__sector = ub_cmd-&gt;zone_append_lba;</div><div class='add'>+</div><div class='add'>+	if (likely(!blk_should_fake_timeout(req-&gt;q)))</div><div class='add'>+		ublk_put_req_ref(ubq, req);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ublk_get_data(const struct ublk_queue *ubq, struct ublk_io *io)</div><div class='add'>+{</div><div class='add'>+	struct request *req = io-&gt;req;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We have handled UBLK_IO_NEED_GET_DATA command,</div><div class='add'>+	 * so clear UBLK_IO_FLAG_NEED_GET_DATA now and just</div><div class='add'>+	 * do the copy work.</div><div class='add'>+	 */</div><div class='add'>+	io-&gt;flags &amp;= ~UBLK_IO_FLAG_NEED_GET_DATA;</div><div class='add'>+	/* update iod-&gt;addr because ublksrv may have passed a new io buffer */</div><div class='add'>+	ublk_get_iod(ubq, req-&gt;tag)-&gt;addr = io-&gt;addr;</div><div class='add'>+	pr_devel("%s: update iod-&gt;addr: qid %d tag %d io_flags %x addr %llx\n",</div><div class='add'>+			__func__, ubq-&gt;q_id, req-&gt;tag, io-&gt;flags,</div><div class='add'>+			ublk_get_iod(ubq, req-&gt;tag)-&gt;addr);</div><div class='add'>+</div><div class='add'>+	return ublk_start_io(ubq, req, io);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __ublk_ch_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> 			       unsigned int issue_flags,</div><div class='ctx'> 			       const struct ublksrv_io_cmd *ub_cmd)</div><div class='hunk'>@@ -1916,7 +2184,6 @@ static int __ublk_ch_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> 	u32 cmd_op = cmd-&gt;cmd_op;</div><div class='ctx'> 	unsigned tag = ub_cmd-&gt;tag;</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='del'>-	struct request *req;</div><div class='ctx'> </div><div class='ctx'> 	pr_devel("%s: received: cmd op %d queue %d tag %d result %d\n",</div><div class='ctx'> 			__func__, cmd-&gt;cmd_op, ub_cmd-&gt;q_id, tag,</div><div class='hunk'>@@ -1926,9 +2193,6 @@ static int __ublk_ch_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ubq = ublk_get_queue(ub, ub_cmd-&gt;q_id);</div><div class='del'>-	if (!ubq || ub_cmd-&gt;q_id != ubq-&gt;q_id)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	if (ubq-&gt;ubq_daemon &amp;&amp; ubq-&gt;ubq_daemon != current)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -1943,6 +2207,11 @@ static int __ublk_ch_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* only UBLK_IO_FETCH_REQ is allowed if io is not OWNED_BY_SRV */</div><div class='add'>+	if (!(io-&gt;flags &amp; UBLK_IO_FLAG_OWNED_BY_SRV) &amp;&amp;</div><div class='add'>+	    _IOC_NR(cmd_op) != UBLK_IO_FETCH_REQ)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * ensure that the user issues UBLK_IO_NEED_GET_DATA</div><div class='ctx'> 	 * iff the driver have set the UBLK_IO_FLAG_NEED_GET_DATA.</div><div class='hunk'>@@ -1960,68 +2229,23 @@ static int __ublk_ch_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> 	case UBLK_IO_REGISTER_IO_BUF:</div><div class='ctx'> 		return ublk_register_io_buf(cmd, ubq, tag, ub_cmd-&gt;addr, issue_flags);</div><div class='ctx'> 	case UBLK_IO_UNREGISTER_IO_BUF:</div><div class='del'>-		return ublk_unregister_io_buf(cmd, ub_cmd-&gt;addr, issue_flags);</div><div class='add'>+		return ublk_unregister_io_buf(cmd, ubq, ub_cmd-&gt;addr, issue_flags);</div><div class='ctx'> 	case UBLK_IO_FETCH_REQ:</div><div class='del'>-		/* UBLK_IO_FETCH_REQ is only allowed before queue is setup */</div><div class='del'>-		if (ublk_queue_ready(ubq)) {</div><div class='del'>-			ret = -EBUSY;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		/*</div><div class='del'>-		 * The io is being handled by server, so COMMIT_RQ is expected</div><div class='del'>-		 * instead of FETCH_REQ</div><div class='del'>-		 */</div><div class='del'>-		if (io-&gt;flags &amp; UBLK_IO_FLAG_OWNED_BY_SRV)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		if (ublk_need_map_io(ubq)) {</div><div class='del'>-			/*</div><div class='del'>-			 * FETCH_RQ has to provide IO buffer if NEED GET</div><div class='del'>-			 * DATA is not enabled</div><div class='del'>-			 */</div><div class='del'>-			if (!ub_cmd-&gt;addr &amp;&amp; !ublk_need_get_data(ubq))</div><div class='del'>-				goto out;</div><div class='del'>-		} else if (ub_cmd-&gt;addr) {</div><div class='del'>-			/* User copy requires addr to be unset */</div><div class='del'>-			ret = -EINVAL;</div><div class='add'>+		ret = ublk_fetch(cmd, ubq, io, ub_cmd-&gt;addr);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ublk_fill_io_cmd(io, cmd, ub_cmd-&gt;addr);</div><div class='del'>-		ublk_mark_io_ready(ub, ubq);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_IO_COMMIT_AND_FETCH_REQ:</div><div class='del'>-		req = blk_mq_tag_to_rq(ub-&gt;tag_set.tags[ub_cmd-&gt;q_id], tag);</div><div class='del'>-</div><div class='del'>-		if (!(io-&gt;flags &amp; UBLK_IO_FLAG_OWNED_BY_SRV))</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		if (ublk_need_map_io(ubq)) {</div><div class='del'>-			/*</div><div class='del'>-			 * COMMIT_AND_FETCH_REQ has to provide IO buffer if</div><div class='del'>-			 * NEED GET DATA is not enabled or it is Read IO.</div><div class='del'>-			 */</div><div class='del'>-			if (!ub_cmd-&gt;addr &amp;&amp; (!ublk_need_get_data(ubq) ||</div><div class='del'>-						req_op(req) == REQ_OP_READ))</div><div class='del'>-				goto out;</div><div class='del'>-		} else if (req_op(req) != REQ_OP_ZONE_APPEND &amp;&amp; ub_cmd-&gt;addr) {</div><div class='del'>-			/*</div><div class='del'>-			 * User copy requires addr to be unset when command is</div><div class='del'>-			 * not zone append</div><div class='del'>-			 */</div><div class='del'>-			ret = -EINVAL;</div><div class='add'>+		ret = ublk_commit_and_fetch(ubq, io, cmd, ub_cmd, issue_flags);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ublk_fill_io_cmd(io, cmd, ub_cmd-&gt;addr);</div><div class='del'>-		ublk_commit_completion(ub, ub_cmd);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_IO_NEED_GET_DATA:</div><div class='del'>-		if (!(io-&gt;flags &amp; UBLK_IO_FLAG_OWNED_BY_SRV))</div><div class='del'>-			goto out;</div><div class='del'>-		ublk_fill_io_cmd(io, cmd, ub_cmd-&gt;addr);</div><div class='del'>-		ublk_handle_need_get_data(ub, ub_cmd-&gt;q_id, ub_cmd-&gt;tag);</div><div class='del'>-		break;</div><div class='add'>+		io-&gt;addr = ub_cmd-&gt;addr;</div><div class='add'>+		if (!ublk_get_data(ubq, io))</div><div class='add'>+			return -EIOCBQUEUED;</div><div class='add'>+</div><div class='add'>+		return UBLK_IO_RES_OK;</div><div class='ctx'> 	default:</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2035,13 +2259,10 @@ static int __ublk_ch_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct request *__ublk_check_and_get_req(struct ublk_device *ub,</div><div class='del'>-		struct ublk_queue *ubq, int tag, size_t offset)</div><div class='add'>+		const struct ublk_queue *ubq, int tag, size_t offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct request *req;</div><div class='ctx'> </div><div class='del'>-	if (!ublk_need_req_ref(ubq))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	req = blk_mq_tag_to_rq(ub-&gt;tag_set.tags[ubq-&gt;q_id], tag);</div><div class='ctx'> 	if (!req)</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -2155,6 +2376,9 @@ static struct request *ublk_check_and_get_req(struct kiocb *iocb,</div><div class='ctx'> 	if (!ubq)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='add'>+	if (!ublk_support_user_copy(ubq))</div><div class='add'>+		return ERR_PTR(-EACCES);</div><div class='add'>+</div><div class='ctx'> 	if (tag &gt;= ubq-&gt;q_depth)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='hunk'>@@ -2388,7 +2612,6 @@ static void ublk_remove(struct ublk_device *ub)</div><div class='ctx'> 	bool unprivileged;</div><div class='ctx'> </div><div class='ctx'> 	ublk_stop_dev(ub);</div><div class='del'>-	cancel_work_sync(&amp;ub-&gt;nosrv_work);</div><div class='ctx'> 	cdev_device_del(&amp;ub-&gt;cdev, &amp;ub-&gt;cdev_dev);</div><div class='ctx'> 	unprivileged = ub-&gt;dev_info.flags &amp; UBLK_F_UNPRIVILEGED_DEV;</div><div class='ctx'> 	ublk_put_device(ub);</div><div class='hunk'>@@ -2413,9 +2636,9 @@ static struct ublk_device *ublk_get_device_from_id(int idx)</div><div class='ctx'> 	return ub;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ublk_ctrl_start_dev(struct ublk_device *ub, struct io_uring_cmd *cmd)</div><div class='add'>+static int ublk_ctrl_start_dev(struct ublk_device *ub,</div><div class='add'>+		const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	const struct ublk_param_basic *p = &amp;ub-&gt;params.basic;</div><div class='ctx'> 	int ublksrv_pid = (int)header-&gt;data[0];</div><div class='ctx'> 	struct queue_limits lim = {</div><div class='hunk'>@@ -2534,9 +2757,8 @@ out_unlock:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_ctrl_get_queue_affinity(struct ublk_device *ub,</div><div class='del'>-		struct io_uring_cmd *cmd)</div><div class='add'>+		const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	void __user *argp = (void __user *)(unsigned long)header-&gt;addr;</div><div class='ctx'> 	cpumask_var_t cpumask;</div><div class='ctx'> 	unsigned long queue;</div><div class='hunk'>@@ -2585,9 +2807,8 @@ static inline void ublk_dump_dev_info(struct ublksrv_ctrl_dev_info *info)</div><div class='ctx'> 			info-&gt;nr_hw_queues, info-&gt;queue_depth);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ublk_ctrl_add_dev(struct io_uring_cmd *cmd)</div><div class='add'>+static int ublk_ctrl_add_dev(const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	void __user *argp = (void __user *)(unsigned long)header-&gt;addr;</div><div class='ctx'> 	struct ublksrv_ctrl_dev_info info;</div><div class='ctx'> 	struct ublk_device *ub;</div><div class='hunk'>@@ -2622,6 +2843,11 @@ static int ublk_ctrl_add_dev(struct io_uring_cmd *cmd)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if ((info.flags &amp; UBLK_F_QUIESCE) &amp;&amp; !(info.flags &amp; UBLK_F_USER_RECOVERY)) {</div><div class='add'>+		pr_warn("UBLK_F_QUIESCE requires UBLK_F_USER_RECOVERY\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * unprivileged device can't be trusted, but RECOVERY and</div><div class='ctx'> 	 * RECOVERY_REISSUE still may hang error handling, so can't</div><div class='hunk'>@@ -2638,8 +2864,11 @@ static int ublk_ctrl_add_dev(struct io_uring_cmd *cmd)</div><div class='ctx'> 		 * For USER_COPY, we depends on userspace to fill request</div><div class='ctx'> 		 * buffer by pwrite() to ublk char device, which can't be</div><div class='ctx'> 		 * used for unprivileged device</div><div class='add'>+		 *</div><div class='add'>+		 * Same with zero copy or auto buffer register.</div><div class='ctx'> 		 */</div><div class='del'>-		if (info.flags &amp; (UBLK_F_USER_COPY | UBLK_F_SUPPORT_ZERO_COPY))</div><div class='add'>+		if (info.flags &amp; (UBLK_F_USER_COPY | UBLK_F_SUPPORT_ZERO_COPY |</div><div class='add'>+					UBLK_F_AUTO_BUF_REG))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2675,7 +2904,6 @@ static int ublk_ctrl_add_dev(struct io_uring_cmd *cmd)</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	mutex_init(&amp;ub-&gt;mutex);</div><div class='ctx'> 	spin_lock_init(&amp;ub-&gt;lock);</div><div class='del'>-	INIT_WORK(&amp;ub-&gt;nosrv_work, ublk_nosrv_work);</div><div class='ctx'> </div><div class='ctx'> 	ret = ublk_alloc_dev_number(ub, header-&gt;dev_id);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -2697,13 +2925,19 @@ static int ublk_ctrl_add_dev(struct io_uring_cmd *cmd)</div><div class='ctx'> 	ub-&gt;dev_info.flags |= UBLK_F_CMD_IOCTL_ENCODE |</div><div class='ctx'> 		UBLK_F_URING_CMD_COMP_IN_TASK;</div><div class='ctx'> </div><div class='del'>-	/* GET_DATA isn't needed any more with USER_COPY */</div><div class='del'>-	if (ublk_dev_is_user_copy(ub))</div><div class='add'>+	/* GET_DATA isn't needed any more with USER_COPY or ZERO COPY */</div><div class='add'>+	if (ub-&gt;dev_info.flags &amp; (UBLK_F_USER_COPY | UBLK_F_SUPPORT_ZERO_COPY |</div><div class='add'>+				UBLK_F_AUTO_BUF_REG))</div><div class='ctx'> 		ub-&gt;dev_info.flags &amp;= ~UBLK_F_NEED_GET_DATA;</div><div class='ctx'> </div><div class='del'>-	/* Zoned storage support requires user copy feature */</div><div class='add'>+	/*</div><div class='add'>+	 * Zoned storage support requires reuse `ublksrv_io_cmd-&gt;addr` for</div><div class='add'>+	 * returning write_append_lba, which is only allowed in case of</div><div class='add'>+	 * user copy or zero copy</div><div class='add'>+	 */</div><div class='ctx'> 	if (ublk_dev_is_zoned(ub) &amp;&amp;</div><div class='del'>-	    (!IS_ENABLED(CONFIG_BLK_DEV_ZONED) || !ublk_dev_is_user_copy(ub))) {</div><div class='add'>+	    (!IS_ENABLED(CONFIG_BLK_DEV_ZONED) || !(ub-&gt;dev_info.flags &amp;</div><div class='add'>+	     (UBLK_F_USER_COPY | UBLK_F_SUPPORT_ZERO_COPY)))) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out_free_dev_number;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2807,14 +3041,12 @@ static inline void ublk_ctrl_cmd_dump(struct io_uring_cmd *cmd)</div><div class='ctx'> static int ublk_ctrl_stop_dev(struct ublk_device *ub)</div><div class='ctx'> {</div><div class='ctx'> 	ublk_stop_dev(ub);</div><div class='del'>-	cancel_work_sync(&amp;ub-&gt;nosrv_work);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_ctrl_get_dev_info(struct ublk_device *ub,</div><div class='del'>-		struct io_uring_cmd *cmd)</div><div class='add'>+		const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	void __user *argp = (void __user *)(unsigned long)header-&gt;addr;</div><div class='ctx'> </div><div class='ctx'> 	if (header-&gt;len &lt; sizeof(struct ublksrv_ctrl_dev_info) || !header-&gt;addr)</div><div class='hunk'>@@ -2843,9 +3075,8 @@ static void ublk_ctrl_fill_params_devt(struct ublk_device *ub)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_ctrl_get_params(struct ublk_device *ub,</div><div class='del'>-		struct io_uring_cmd *cmd)</div><div class='add'>+		const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	void __user *argp = (void __user *)(unsigned long)header-&gt;addr;</div><div class='ctx'> 	struct ublk_params_header ph;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -2874,9 +3105,8 @@ static int ublk_ctrl_get_params(struct ublk_device *ub,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_ctrl_set_params(struct ublk_device *ub,</div><div class='del'>-		struct io_uring_cmd *cmd)</div><div class='add'>+		const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	void __user *argp = (void __user *)(unsigned long)header-&gt;addr;</div><div class='ctx'> 	struct ublk_params_header ph;</div><div class='ctx'> 	int ret = -EFAULT;</div><div class='hunk'>@@ -2914,43 +3144,14 @@ static int ublk_ctrl_set_params(struct ublk_device *ub,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ublk_queue_reinit(struct ublk_device *ub, struct ublk_queue *ubq)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	WARN_ON_ONCE(!(ubq-&gt;ubq_daemon &amp;&amp; ubq_daemon_is_dying(ubq)));</div><div class='del'>-</div><div class='del'>-	/* All old ioucmds have to be completed */</div><div class='del'>-	ubq-&gt;nr_io_ready = 0;</div><div class='del'>-	/* old daemon is PF_EXITING, put it now */</div><div class='del'>-	put_task_struct(ubq-&gt;ubq_daemon);</div><div class='del'>-	/* We have to reset it to NULL, otherwise ub won't accept new FETCH_REQ */</div><div class='del'>-	ubq-&gt;ubq_daemon = NULL;</div><div class='del'>-	ubq-&gt;timeout = false;</div><div class='del'>-	ubq-&gt;canceling = false;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ubq-&gt;q_depth; i++) {</div><div class='del'>-		struct ublk_io *io = &amp;ubq-&gt;ios[i];</div><div class='del'>-</div><div class='del'>-		/* forget everything now and be ready for new FETCH_REQ */</div><div class='del'>-		io-&gt;flags = 0;</div><div class='del'>-		io-&gt;cmd = NULL;</div><div class='del'>-		io-&gt;addr = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ublk_ctrl_start_recovery(struct ublk_device *ub,</div><div class='del'>-		struct io_uring_cmd *cmd)</div><div class='add'>+		const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ub-&gt;mutex);</div><div class='ctx'> 	if (ublk_nosrv_should_stop_dev(ub))</div><div class='ctx'> 		goto out_unlock;</div><div class='del'>-	if (!ub-&gt;nr_queues_ready)</div><div class='del'>-		goto out_unlock;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * START_RECOVERY is only allowd after:</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -2974,12 +3175,6 @@ static int ublk_ctrl_start_recovery(struct ublk_device *ub,</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> 	pr_devel("%s: start recovery for dev id %d.\n", __func__, header-&gt;dev_id);</div><div class='del'>-	for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++)</div><div class='del'>-		ublk_queue_reinit(ub, ublk_get_queue(ub, i));</div><div class='del'>-	/* set to NULL, otherwise new ubq_daemon cannot mmap the io_cmd_buf */</div><div class='del'>-	ub-&gt;mm = NULL;</div><div class='del'>-	ub-&gt;nr_queues_ready = 0;</div><div class='del'>-	ub-&gt;nr_privileged_daemon = 0;</div><div class='ctx'> 	init_completion(&amp;ub-&gt;completion);</div><div class='ctx'> 	ret = 0;</div><div class='ctx'>  out_unlock:</div><div class='hunk'>@@ -2988,12 +3183,10 @@ static int ublk_ctrl_start_recovery(struct ublk_device *ub,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ublk_ctrl_end_recovery(struct ublk_device *ub,</div><div class='del'>-		struct io_uring_cmd *cmd)</div><div class='add'>+		const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	int ublksrv_pid = (int)header-&gt;data[0];</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	pr_devel("%s: Waiting for new ubq_daemons(nr: %d) are ready, dev id %d...\n",</div><div class='ctx'> 			__func__, ub-&gt;dev_info.nr_hw_queues, header-&gt;dev_id);</div><div class='hunk'>@@ -3013,33 +3206,18 @@ static int ublk_ctrl_end_recovery(struct ublk_device *ub,</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> 	ub-&gt;dev_info.ublksrv_pid = ublksrv_pid;</div><div class='add'>+	ub-&gt;dev_info.state = UBLK_S_DEV_LIVE;</div><div class='ctx'> 	pr_devel("%s: new ublksrv_pid %d, dev id %d\n",</div><div class='ctx'> 			__func__, ublksrv_pid, header-&gt;dev_id);</div><div class='del'>-</div><div class='del'>-	if (ublk_nosrv_dev_should_queue_io(ub)) {</div><div class='del'>-		ub-&gt;dev_info.state = UBLK_S_DEV_LIVE;</div><div class='del'>-		blk_mq_unquiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='del'>-		pr_devel("%s: queue unquiesced, dev id %d.\n",</div><div class='del'>-				__func__, header-&gt;dev_id);</div><div class='del'>-		blk_mq_kick_requeue_list(ub-&gt;ub_disk-&gt;queue);</div><div class='del'>-	} else {</div><div class='del'>-		blk_mq_quiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='del'>-		ub-&gt;dev_info.state = UBLK_S_DEV_LIVE;</div><div class='del'>-		for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++) {</div><div class='del'>-			ublk_get_queue(ub, i)-&gt;fail_io = false;</div><div class='del'>-		}</div><div class='del'>-		blk_mq_unquiesce_queue(ub-&gt;ub_disk-&gt;queue);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	blk_mq_kick_requeue_list(ub-&gt;ub_disk-&gt;queue);</div><div class='ctx'> 	ret = 0;</div><div class='ctx'>  out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ublk_ctrl_get_features(struct io_uring_cmd *cmd)</div><div class='add'>+static int ublk_ctrl_get_features(const struct ublksrv_ctrl_cmd *header)</div><div class='ctx'> {</div><div class='del'>-	const struct ublksrv_ctrl_cmd *header = io_uring_sqe_cmd(cmd-&gt;sqe);</div><div class='ctx'> 	void __user *argp = (void __user *)(unsigned long)header-&gt;addr;</div><div class='ctx'> 	u64 features = UBLK_F_ALL;</div><div class='ctx'> </div><div class='hunk'>@@ -3052,6 +3230,127 @@ static int ublk_ctrl_get_features(struct io_uring_cmd *cmd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ublk_ctrl_set_size(struct ublk_device *ub, const struct ublksrv_ctrl_cmd *header)</div><div class='add'>+{</div><div class='add'>+	struct ublk_param_basic *p = &amp;ub-&gt;params.basic;</div><div class='add'>+	u64 new_size = header-&gt;data[0];</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ub-&gt;mutex);</div><div class='add'>+	p-&gt;dev_sectors = new_size;</div><div class='add'>+	set_capacity_and_notify(ub-&gt;ub_disk, p-&gt;dev_sectors);</div><div class='add'>+	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct count_busy {</div><div class='add'>+	const struct ublk_queue *ubq;</div><div class='add'>+	unsigned int nr_busy;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool ublk_count_busy_req(struct request *rq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct count_busy *idle = data;</div><div class='add'>+</div><div class='add'>+	if (!blk_mq_request_started(rq) &amp;&amp; rq-&gt;mq_hctx-&gt;driver_data == idle-&gt;ubq)</div><div class='add'>+		idle-&gt;nr_busy += 1;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* uring_cmd is guaranteed to be active if the associated request is idle */</div><div class='add'>+static bool ubq_has_idle_io(const struct ublk_queue *ubq)</div><div class='add'>+{</div><div class='add'>+	struct count_busy data = {</div><div class='add'>+		.ubq = ubq,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	blk_mq_tagset_busy_iter(&amp;ubq-&gt;dev-&gt;tag_set, ublk_count_busy_req, &amp;data);</div><div class='add'>+	return data.nr_busy &lt; ubq-&gt;q_depth;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Wait until each hw queue has at least one idle IO */</div><div class='add'>+static int ublk_wait_for_idle_io(struct ublk_device *ub,</div><div class='add'>+				 unsigned int timeout_ms)</div><div class='add'>+{</div><div class='add'>+	unsigned int elapsed = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	while (elapsed &lt; timeout_ms &amp;&amp; !signal_pending(current)) {</div><div class='add'>+		unsigned int queues_cancelable = 0;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++) {</div><div class='add'>+			struct ublk_queue *ubq = ublk_get_queue(ub, i);</div><div class='add'>+</div><div class='add'>+			queues_cancelable += !!ubq_has_idle_io(ubq);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Each queue needs at least one active command for</div><div class='add'>+		 * notifying ublk server</div><div class='add'>+		 */</div><div class='add'>+		if (queues_cancelable == ub-&gt;dev_info.nr_hw_queues)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		msleep(UBLK_REQUEUE_DELAY_MS);</div><div class='add'>+		elapsed += UBLK_REQUEUE_DELAY_MS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (signal_pending(current))</div><div class='add'>+		ret = -EINTR;</div><div class='add'>+	else if (elapsed &gt;= timeout_ms)</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+	else</div><div class='add'>+		ret = 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ublk_ctrl_quiesce_dev(struct ublk_device *ub,</div><div class='add'>+				 const struct ublksrv_ctrl_cmd *header)</div><div class='add'>+{</div><div class='add'>+	/* zero means wait forever */</div><div class='add'>+	u64 timeout_ms = header-&gt;data[0];</div><div class='add'>+	struct gendisk *disk;</div><div class='add'>+	int i, ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!(ub-&gt;dev_info.flags &amp; UBLK_F_QUIESCE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ub-&gt;mutex);</div><div class='add'>+	disk = ublk_get_disk(ub);</div><div class='add'>+	if (!disk)</div><div class='add'>+		goto unlock;</div><div class='add'>+	if (ub-&gt;dev_info.state == UBLK_S_DEV_DEAD)</div><div class='add'>+		goto put_disk;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+	/* already in expected state */</div><div class='add'>+	if (ub-&gt;dev_info.state != UBLK_S_DEV_LIVE)</div><div class='add'>+		goto put_disk;</div><div class='add'>+</div><div class='add'>+	/* Mark all queues as canceling */</div><div class='add'>+	blk_mq_quiesce_queue(disk-&gt;queue);</div><div class='add'>+	for (i = 0; i &lt; ub-&gt;dev_info.nr_hw_queues; i++) {</div><div class='add'>+		struct ublk_queue *ubq = ublk_get_queue(ub, i);</div><div class='add'>+</div><div class='add'>+		ubq-&gt;canceling = true;</div><div class='add'>+	}</div><div class='add'>+	blk_mq_unquiesce_queue(disk-&gt;queue);</div><div class='add'>+</div><div class='add'>+	if (!timeout_ms)</div><div class='add'>+		timeout_ms = UINT_MAX;</div><div class='add'>+	ret = ublk_wait_for_idle_io(ub, timeout_ms);</div><div class='add'>+</div><div class='add'>+put_disk:</div><div class='add'>+	ublk_put_disk(disk);</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;ub-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	/* Cancel pending uring_cmd */</div><div class='add'>+	if (!ret)</div><div class='add'>+		ublk_cancel_dev(ub);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * All control commands are sent via /dev/ublk-control, so we have to check</div><div class='ctx'>  * the destination device's permission</div><div class='hunk'>@@ -3137,6 +3436,8 @@ static int ublk_ctrl_uring_cmd_permission(struct ublk_device *ub,</div><div class='ctx'> 	case UBLK_CMD_SET_PARAMS:</div><div class='ctx'> 	case UBLK_CMD_START_USER_RECOVERY:</div><div class='ctx'> 	case UBLK_CMD_END_USER_RECOVERY:</div><div class='add'>+	case UBLK_CMD_UPDATE_SIZE:</div><div class='add'>+	case UBLK_CMD_QUIESCE_DEV:</div><div class='ctx'> 		mask = MAY_READ | MAY_WRITE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3178,7 +3479,7 @@ static int ublk_ctrl_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (cmd_op == UBLK_U_CMD_GET_FEATURES) {</div><div class='del'>-		ret = ublk_ctrl_get_features(cmd);</div><div class='add'>+		ret = ublk_ctrl_get_features(header);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3195,17 +3496,17 @@ static int ublk_ctrl_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> </div><div class='ctx'> 	switch (_IOC_NR(cmd_op)) {</div><div class='ctx'> 	case UBLK_CMD_START_DEV:</div><div class='del'>-		ret = ublk_ctrl_start_dev(ub, cmd);</div><div class='add'>+		ret = ublk_ctrl_start_dev(ub, header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_STOP_DEV:</div><div class='ctx'> 		ret = ublk_ctrl_stop_dev(ub);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_GET_DEV_INFO:</div><div class='ctx'> 	case UBLK_CMD_GET_DEV_INFO2:</div><div class='del'>-		ret = ublk_ctrl_get_dev_info(ub, cmd);</div><div class='add'>+		ret = ublk_ctrl_get_dev_info(ub, header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_ADD_DEV:</div><div class='del'>-		ret = ublk_ctrl_add_dev(cmd);</div><div class='add'>+		ret = ublk_ctrl_add_dev(header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_DEL_DEV:</div><div class='ctx'> 		ret = ublk_ctrl_del_dev(&amp;ub, true);</div><div class='hunk'>@@ -3214,19 +3515,26 @@ static int ublk_ctrl_uring_cmd(struct io_uring_cmd *cmd,</div><div class='ctx'> 		ret = ublk_ctrl_del_dev(&amp;ub, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_GET_QUEUE_AFFINITY:</div><div class='del'>-		ret = ublk_ctrl_get_queue_affinity(ub, cmd);</div><div class='add'>+		ret = ublk_ctrl_get_queue_affinity(ub, header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_GET_PARAMS:</div><div class='del'>-		ret = ublk_ctrl_get_params(ub, cmd);</div><div class='add'>+		ret = ublk_ctrl_get_params(ub, header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_SET_PARAMS:</div><div class='del'>-		ret = ublk_ctrl_set_params(ub, cmd);</div><div class='add'>+		ret = ublk_ctrl_set_params(ub, header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_START_USER_RECOVERY:</div><div class='del'>-		ret = ublk_ctrl_start_recovery(ub, cmd);</div><div class='add'>+		ret = ublk_ctrl_start_recovery(ub, header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UBLK_CMD_END_USER_RECOVERY:</div><div class='del'>-		ret = ublk_ctrl_end_recovery(ub, cmd);</div><div class='add'>+		ret = ublk_ctrl_end_recovery(ub, header);</div><div class='add'>+		break;</div><div class='add'>+	case UBLK_CMD_UPDATE_SIZE:</div><div class='add'>+		ublk_ctrl_set_size(ub, header);</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case UBLK_CMD_QUIESCE_DEV:</div><div class='add'>+		ret = ublk_ctrl_quiesce_dev(ub, header);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EOPNOTSUPP;</div><div class='hunk'>@@ -3261,6 +3569,7 @@ static int __init ublk_init(void)</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON((u64)UBLKSRV_IO_BUF_OFFSET +</div><div class='ctx'> 			UBLKSRV_IO_BUF_TOTAL_SIZE &lt; UBLKSRV_IO_BUF_OFFSET);</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct ublk_auto_buf_reg) != 8);</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;ublk_idr_wq);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c<br/>index 7cffea01d868..30bca8cb7106 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/block/virtio_blk.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/block/virtio_blk.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/virtio_blk.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/virtio_blk.c</a></div><div class='hunk'>@@ -571,7 +571,7 @@ static int virtblk_submit_zone_report(struct virtio_blk *vblk,</div><div class='ctx'> 	vbr-&gt;out_hdr.type = cpu_to_virtio32(vblk-&gt;vdev, VIRTIO_BLK_T_ZONE_REPORT);</div><div class='ctx'> 	vbr-&gt;out_hdr.sector = cpu_to_virtio64(vblk-&gt;vdev, sector);</div><div class='ctx'> </div><div class='del'>-	err = blk_rq_map_kern(q, req, report_buf, report_len, GFP_KERNEL);</div><div class='add'>+	err = blk_rq_map_kern(req, report_buf, report_len, GFP_KERNEL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -817,7 +817,7 @@ static int virtblk_get_id(struct gendisk *disk, char *id_str)</div><div class='ctx'> 	vbr-&gt;out_hdr.type = cpu_to_virtio32(vblk-&gt;vdev, VIRTIO_BLK_T_GET_ID);</div><div class='ctx'> 	vbr-&gt;out_hdr.sector = 0;</div><div class='ctx'> </div><div class='del'>-	err = blk_rq_map_kern(q, req, id_str, VIRTIO_BLK_ID_BYTES, GFP_KERNEL);</div><div class='add'>+	err = blk_rq_map_kern(req, id_str, VIRTIO_BLK_ID_BYTES, GFP_KERNEL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/block/zloop.c b/drivers/block/zloop.c<br/>new file mode 100644<br/>index 000000000000..553b1a713ab9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/block/zloop.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/block/zloop.c</a></div><div class='hunk'>@@ -0,0 +1,1385 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, Christoph Hellwig.</div><div class='add'>+ * Copyright (c) 2025, Western Digital Corporation or its affiliates.</div><div class='add'>+ *</div><div class='add'>+ * Zoned Loop Device driver - exports a zoned block device using one file per</div><div class='add'>+ * zone as backing storage.</div><div class='add'>+ */</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/blk-mq.h&gt;</div><div class='add'>+#include &lt;linux/blkzoned.h&gt;</div><div class='add'>+#include &lt;linux/pagemap.h&gt;</div><div class='add'>+#include &lt;linux/miscdevice.h&gt;</div><div class='add'>+#include &lt;linux/falloc.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/parser.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Options for adding (and removing) a device.</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	ZLOOP_OPT_ERR			= 0,</div><div class='add'>+	ZLOOP_OPT_ID			= (1 &lt;&lt; 0),</div><div class='add'>+	ZLOOP_OPT_CAPACITY		= (1 &lt;&lt; 1),</div><div class='add'>+	ZLOOP_OPT_ZONE_SIZE		= (1 &lt;&lt; 2),</div><div class='add'>+	ZLOOP_OPT_ZONE_CAPACITY		= (1 &lt;&lt; 3),</div><div class='add'>+	ZLOOP_OPT_NR_CONV_ZONES		= (1 &lt;&lt; 4),</div><div class='add'>+	ZLOOP_OPT_BASE_DIR		= (1 &lt;&lt; 5),</div><div class='add'>+	ZLOOP_OPT_NR_QUEUES		= (1 &lt;&lt; 6),</div><div class='add'>+	ZLOOP_OPT_QUEUE_DEPTH		= (1 &lt;&lt; 7),</div><div class='add'>+	ZLOOP_OPT_BUFFERED_IO		= (1 &lt;&lt; 8),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const match_table_t zloop_opt_tokens = {</div><div class='add'>+	{ ZLOOP_OPT_ID,			"id=%d"	},</div><div class='add'>+	{ ZLOOP_OPT_CAPACITY,		"capacity_mb=%u"	},</div><div class='add'>+	{ ZLOOP_OPT_ZONE_SIZE,		"zone_size_mb=%u"	},</div><div class='add'>+	{ ZLOOP_OPT_ZONE_CAPACITY,	"zone_capacity_mb=%u"	},</div><div class='add'>+	{ ZLOOP_OPT_NR_CONV_ZONES,	"conv_zones=%u"		},</div><div class='add'>+	{ ZLOOP_OPT_BASE_DIR,		"base_dir=%s"		},</div><div class='add'>+	{ ZLOOP_OPT_NR_QUEUES,		"nr_queues=%u"		},</div><div class='add'>+	{ ZLOOP_OPT_QUEUE_DEPTH,	"queue_depth=%u"	},</div><div class='add'>+	{ ZLOOP_OPT_BUFFERED_IO,	"buffered_io"		},</div><div class='add'>+	{ ZLOOP_OPT_ERR,		NULL			}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Default values for the "add" operation. */</div><div class='add'>+#define ZLOOP_DEF_ID			-1</div><div class='add'>+#define ZLOOP_DEF_ZONE_SIZE		((256ULL * SZ_1M) &gt;&gt; SECTOR_SHIFT)</div><div class='add'>+#define ZLOOP_DEF_NR_ZONES		64</div><div class='add'>+#define ZLOOP_DEF_NR_CONV_ZONES		8</div><div class='add'>+#define ZLOOP_DEF_BASE_DIR		"/var/local/zloop"</div><div class='add'>+#define ZLOOP_DEF_NR_QUEUES		1</div><div class='add'>+#define ZLOOP_DEF_QUEUE_DEPTH		128</div><div class='add'>+#define ZLOOP_DEF_BUFFERED_IO		false</div><div class='add'>+</div><div class='add'>+/* Arbitrary limit on the zone size (16GB). */</div><div class='add'>+#define ZLOOP_MAX_ZONE_SIZE_MB		16384</div><div class='add'>+</div><div class='add'>+struct zloop_options {</div><div class='add'>+	unsigned int		mask;</div><div class='add'>+	int			id;</div><div class='add'>+	sector_t		capacity;</div><div class='add'>+	sector_t		zone_size;</div><div class='add'>+	sector_t		zone_capacity;</div><div class='add'>+	unsigned int		nr_conv_zones;</div><div class='add'>+	char			*base_dir;</div><div class='add'>+	unsigned int		nr_queues;</div><div class='add'>+	unsigned int		queue_depth;</div><div class='add'>+	bool			buffered_io;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Device states.</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	Zlo_creating = 0,</div><div class='add'>+	Zlo_live,</div><div class='add'>+	Zlo_deleting,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum zloop_zone_flags {</div><div class='add'>+	ZLOOP_ZONE_CONV = 0,</div><div class='add'>+	ZLOOP_ZONE_SEQ_ERROR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct zloop_zone {</div><div class='add'>+	struct file		*file;</div><div class='add'>+</div><div class='add'>+	unsigned long		flags;</div><div class='add'>+	struct mutex		lock;</div><div class='add'>+	enum blk_zone_cond	cond;</div><div class='add'>+	sector_t		start;</div><div class='add'>+	sector_t		wp;</div><div class='add'>+</div><div class='add'>+	gfp_t			old_gfp_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct zloop_device {</div><div class='add'>+	unsigned int		id;</div><div class='add'>+	unsigned int		state;</div><div class='add'>+</div><div class='add'>+	struct blk_mq_tag_set	tag_set;</div><div class='add'>+	struct gendisk		*disk;</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct *workqueue;</div><div class='add'>+	bool			buffered_io;</div><div class='add'>+</div><div class='add'>+	const char		*base_dir;</div><div class='add'>+	struct file		*data_dir;</div><div class='add'>+</div><div class='add'>+	unsigned int		zone_shift;</div><div class='add'>+	sector_t		zone_size;</div><div class='add'>+	sector_t		zone_capacity;</div><div class='add'>+	unsigned int		nr_zones;</div><div class='add'>+	unsigned int		nr_conv_zones;</div><div class='add'>+	unsigned int		block_size;</div><div class='add'>+</div><div class='add'>+	struct zloop_zone	zones[] __counted_by(nr_zones);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct zloop_cmd {</div><div class='add'>+	struct work_struct	work;</div><div class='add'>+	atomic_t		ref;</div><div class='add'>+	sector_t		sector;</div><div class='add'>+	sector_t		nr_sectors;</div><div class='add'>+	long			ret;</div><div class='add'>+	struct kiocb		iocb;</div><div class='add'>+	struct bio_vec		*bvec;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_IDR(zloop_index_idr);</div><div class='add'>+static DEFINE_MUTEX(zloop_ctl_mutex);</div><div class='add'>+</div><div class='add'>+static unsigned int rq_zone_no(struct request *rq)</div><div class='add'>+{</div><div class='add'>+	struct zloop_device *zlo = rq-&gt;q-&gt;queuedata;</div><div class='add'>+</div><div class='add'>+	return blk_rq_pos(rq) &gt;&gt; zlo-&gt;zone_shift;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_update_seq_zone(struct zloop_device *zlo, unsigned int zone_no)</div><div class='add'>+{</div><div class='add'>+	struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	struct kstat stat;</div><div class='add'>+	sector_t file_sectors;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ret = vfs_getattr(&amp;zone-&gt;file-&gt;f_path, &amp;stat, STATX_SIZE, 0);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("Failed to get zone %u file stat (err=%d)\n",</div><div class='add'>+		       zone_no, ret);</div><div class='add'>+		set_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	file_sectors = stat.size &gt;&gt; SECTOR_SHIFT;</div><div class='add'>+	if (file_sectors &gt; zlo-&gt;zone_capacity) {</div><div class='add'>+		pr_err("Zone %u file too large (%llu sectors &gt; %llu)\n",</div><div class='add'>+		       zone_no, file_sectors, zlo-&gt;zone_capacity);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (file_sectors &amp; ((zlo-&gt;block_size &gt;&gt; SECTOR_SHIFT) - 1)) {</div><div class='add'>+		pr_err("Zone %u file size not aligned to block size %u\n",</div><div class='add'>+		       zone_no, zlo-&gt;block_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!file_sectors) {</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_EMPTY;</div><div class='add'>+		zone-&gt;wp = zone-&gt;start;</div><div class='add'>+	} else if (file_sectors == zlo-&gt;zone_capacity) {</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_FULL;</div><div class='add'>+		zone-&gt;wp = zone-&gt;start + zlo-&gt;zone_size;</div><div class='add'>+	} else {</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_CLOSED;</div><div class='add'>+		zone-&gt;wp = zone-&gt;start + file_sectors;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_open_zone(struct zloop_device *zlo, unsigned int zone_no)</div><div class='add'>+{</div><div class='add'>+	struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags)) {</div><div class='add'>+		ret = zloop_update_seq_zone(zlo, zone_no);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (zone-&gt;cond) {</div><div class='add'>+	case BLK_ZONE_COND_EXP_OPEN:</div><div class='add'>+		break;</div><div class='add'>+	case BLK_ZONE_COND_EMPTY:</div><div class='add'>+	case BLK_ZONE_COND_CLOSED:</div><div class='add'>+	case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_EXP_OPEN;</div><div class='add'>+		break;</div><div class='add'>+	case BLK_ZONE_COND_FULL:</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_close_zone(struct zloop_device *zlo, unsigned int zone_no)</div><div class='add'>+{</div><div class='add'>+	struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags)) {</div><div class='add'>+		ret = zloop_update_seq_zone(zlo, zone_no);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (zone-&gt;cond) {</div><div class='add'>+	case BLK_ZONE_COND_CLOSED:</div><div class='add'>+		break;</div><div class='add'>+	case BLK_ZONE_COND_IMP_OPEN:</div><div class='add'>+	case BLK_ZONE_COND_EXP_OPEN:</div><div class='add'>+		if (zone-&gt;wp == zone-&gt;start)</div><div class='add'>+			zone-&gt;cond = BLK_ZONE_COND_EMPTY;</div><div class='add'>+		else</div><div class='add'>+			zone-&gt;cond = BLK_ZONE_COND_CLOSED;</div><div class='add'>+		break;</div><div class='add'>+	case BLK_ZONE_COND_EMPTY:</div><div class='add'>+	case BLK_ZONE_COND_FULL:</div><div class='add'>+	default:</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_reset_zone(struct zloop_device *zlo, unsigned int zone_no)</div><div class='add'>+{</div><div class='add'>+	struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags) &amp;&amp;</div><div class='add'>+	    zone-&gt;cond == BLK_ZONE_COND_EMPTY)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (vfs_truncate(&amp;zone-&gt;file-&gt;f_path, 0)) {</div><div class='add'>+		set_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zone-&gt;cond = BLK_ZONE_COND_EMPTY;</div><div class='add'>+	zone-&gt;wp = zone-&gt;start;</div><div class='add'>+	clear_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_reset_all_zones(struct zloop_device *zlo)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (i = zlo-&gt;nr_conv_zones; i &lt; zlo-&gt;nr_zones; i++) {</div><div class='add'>+		ret = zloop_reset_zone(zlo, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_finish_zone(struct zloop_device *zlo, unsigned int zone_no)</div><div class='add'>+{</div><div class='add'>+	struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags) &amp;&amp;</div><div class='add'>+	    zone-&gt;cond == BLK_ZONE_COND_FULL)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (vfs_truncate(&amp;zone-&gt;file-&gt;f_path, zlo-&gt;zone_size &lt;&lt; SECTOR_SHIFT)) {</div><div class='add'>+		set_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zone-&gt;cond = BLK_ZONE_COND_FULL;</div><div class='add'>+	zone-&gt;wp = zone-&gt;start + zlo-&gt;zone_size;</div><div class='add'>+	clear_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags);</div><div class='add'>+</div><div class='add'>+ unlock:</div><div class='add'>+	mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zloop_put_cmd(struct zloop_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct request *rq = blk_mq_rq_from_pdu(cmd);</div><div class='add'>+</div><div class='add'>+	if (!atomic_dec_and_test(&amp;cmd-&gt;ref))</div><div class='add'>+		return;</div><div class='add'>+	kfree(cmd-&gt;bvec);</div><div class='add'>+	cmd-&gt;bvec = NULL;</div><div class='add'>+	if (likely(!blk_should_fake_timeout(rq-&gt;q)))</div><div class='add'>+		blk_mq_complete_request(rq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zloop_rw_complete(struct kiocb *iocb, long ret)</div><div class='add'>+{</div><div class='add'>+	struct zloop_cmd *cmd = container_of(iocb, struct zloop_cmd, iocb);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;ret = ret;</div><div class='add'>+	zloop_put_cmd(cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zloop_rw(struct zloop_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct request *rq = blk_mq_rq_from_pdu(cmd);</div><div class='add'>+	struct zloop_device *zlo = rq-&gt;q-&gt;queuedata;</div><div class='add'>+	unsigned int zone_no = rq_zone_no(rq);</div><div class='add'>+	sector_t sector = blk_rq_pos(rq);</div><div class='add'>+	sector_t nr_sectors = blk_rq_sectors(rq);</div><div class='add'>+	bool is_append = req_op(rq) == REQ_OP_ZONE_APPEND;</div><div class='add'>+	bool is_write = req_op(rq) == REQ_OP_WRITE || is_append;</div><div class='add'>+	int rw = is_write ? ITER_SOURCE : ITER_DEST;</div><div class='add'>+	struct req_iterator rq_iter;</div><div class='add'>+	struct zloop_zone *zone;</div><div class='add'>+	struct iov_iter iter;</div><div class='add'>+	struct bio_vec tmp;</div><div class='add'>+	sector_t zone_end;</div><div class='add'>+	int nr_bvec = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;cmd-&gt;ref, 2);</div><div class='add'>+	cmd-&gt;sector = sector;</div><div class='add'>+	cmd-&gt;nr_sectors = nr_sectors;</div><div class='add'>+	cmd-&gt;ret = 0;</div><div class='add'>+</div><div class='add'>+	/* We should never get an I/O beyond the device capacity. */</div><div class='add'>+	if (WARN_ON_ONCE(zone_no &gt;= zlo-&gt;nr_zones)) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	zone_end = zone-&gt;start + zlo-&gt;zone_capacity;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The block layer should never send requests that are not fully</div><div class='add'>+	 * contained within the zone.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON_ONCE(sector + nr_sectors &gt; zone-&gt;start + zlo-&gt;zone_size)) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags)) {</div><div class='add'>+		mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+		ret = zloop_update_seq_zone(zlo, zone_no);</div><div class='add'>+		mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags) &amp;&amp; is_write) {</div><div class='add'>+		mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+		if (is_append) {</div><div class='add'>+			sector = zone-&gt;wp;</div><div class='add'>+			cmd-&gt;sector = sector;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Write operations must be aligned to the write pointer and</div><div class='add'>+		 * fully contained within the zone capacity.</div><div class='add'>+		 */</div><div class='add'>+		if (sector != zone-&gt;wp || zone-&gt;wp + nr_sectors &gt; zone_end) {</div><div class='add'>+			pr_err("Zone %u: unaligned write: sect %llu, wp %llu\n",</div><div class='add'>+			       zone_no, sector, zone-&gt;wp);</div><div class='add'>+			ret = -EIO;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Implicitly open the target zone. */</div><div class='add'>+		if (zone-&gt;cond == BLK_ZONE_COND_CLOSED ||</div><div class='add'>+		    zone-&gt;cond == BLK_ZONE_COND_EMPTY)</div><div class='add'>+			zone-&gt;cond = BLK_ZONE_COND_IMP_OPEN;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Advance the write pointer of sequential zones. If the write</div><div class='add'>+		 * fails, the wp position will be corrected when the next I/O</div><div class='add'>+		 * copmpletes.</div><div class='add'>+		 */</div><div class='add'>+		zone-&gt;wp += nr_sectors;</div><div class='add'>+		if (zone-&gt;wp == zone_end)</div><div class='add'>+			zone-&gt;cond = BLK_ZONE_COND_FULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rq_for_each_bvec(tmp, rq, rq_iter)</div><div class='add'>+		nr_bvec++;</div><div class='add'>+</div><div class='add'>+	if (rq-&gt;bio != rq-&gt;biotail) {</div><div class='add'>+		struct bio_vec *bvec;</div><div class='add'>+</div><div class='add'>+		cmd-&gt;bvec = kmalloc_array(nr_bvec, sizeof(*cmd-&gt;bvec), GFP_NOIO);</div><div class='add'>+		if (!cmd-&gt;bvec) {</div><div class='add'>+			ret = -EIO;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * The bios of the request may be started from the middle of</div><div class='add'>+		 * the 'bvec' because of bio splitting, so we can't directly</div><div class='add'>+		 * copy bio-&gt;bi_iov_vec to new bvec. The rq_for_each_bvec</div><div class='add'>+		 * API will take care of all details for us.</div><div class='add'>+		 */</div><div class='add'>+		bvec = cmd-&gt;bvec;</div><div class='add'>+		rq_for_each_bvec(tmp, rq, rq_iter) {</div><div class='add'>+			*bvec = tmp;</div><div class='add'>+			bvec++;</div><div class='add'>+		}</div><div class='add'>+		iov_iter_bvec(&amp;iter, rw, cmd-&gt;bvec, nr_bvec, blk_rq_bytes(rq));</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * Same here, this bio may be started from the middle of the</div><div class='add'>+		 * 'bvec' because of bio splitting, so offset from the bvec</div><div class='add'>+		 * must be passed to iov iterator</div><div class='add'>+		 */</div><div class='add'>+		iov_iter_bvec(&amp;iter, rw,</div><div class='add'>+			__bvec_iter_bvec(rq-&gt;bio-&gt;bi_io_vec, rq-&gt;bio-&gt;bi_iter),</div><div class='add'>+					nr_bvec, blk_rq_bytes(rq));</div><div class='add'>+		iter.iov_offset = rq-&gt;bio-&gt;bi_iter.bi_bvec_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;iocb.ki_pos = (sector - zone-&gt;start) &lt;&lt; SECTOR_SHIFT;</div><div class='add'>+	cmd-&gt;iocb.ki_filp = zone-&gt;file;</div><div class='add'>+	cmd-&gt;iocb.ki_complete = zloop_rw_complete;</div><div class='add'>+	if (!zlo-&gt;buffered_io)</div><div class='add'>+		cmd-&gt;iocb.ki_flags = IOCB_DIRECT;</div><div class='add'>+	cmd-&gt;iocb.ki_ioprio = IOPRIO_PRIO_VALUE(IOPRIO_CLASS_NONE, 0);</div><div class='add'>+</div><div class='add'>+	if (rw == ITER_SOURCE)</div><div class='add'>+		ret = zone-&gt;file-&gt;f_op-&gt;write_iter(&amp;cmd-&gt;iocb, &amp;iter);</div><div class='add'>+	else</div><div class='add'>+		ret = zone-&gt;file-&gt;f_op-&gt;read_iter(&amp;cmd-&gt;iocb, &amp;iter);</div><div class='add'>+unlock:</div><div class='add'>+	if (!test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags) &amp;&amp; is_write)</div><div class='add'>+		mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+out:</div><div class='add'>+	if (ret != -EIOCBQUEUED)</div><div class='add'>+		zloop_rw_complete(&amp;cmd-&gt;iocb, ret);</div><div class='add'>+	zloop_put_cmd(cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zloop_handle_cmd(struct zloop_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct request *rq = blk_mq_rq_from_pdu(cmd);</div><div class='add'>+	struct zloop_device *zlo = rq-&gt;q-&gt;queuedata;</div><div class='add'>+</div><div class='add'>+	switch (req_op(rq)) {</div><div class='add'>+	case REQ_OP_READ:</div><div class='add'>+	case REQ_OP_WRITE:</div><div class='add'>+	case REQ_OP_ZONE_APPEND:</div><div class='add'>+		/*</div><div class='add'>+		 * zloop_rw() always executes asynchronously or completes</div><div class='add'>+		 * directly.</div><div class='add'>+		 */</div><div class='add'>+		zloop_rw(cmd);</div><div class='add'>+		return;</div><div class='add'>+	case REQ_OP_FLUSH:</div><div class='add'>+		/*</div><div class='add'>+		 * Sync the entire FS containing the zone files instead of</div><div class='add'>+		 * walking all files</div><div class='add'>+		 */</div><div class='add'>+		cmd-&gt;ret = sync_filesystem(file_inode(zlo-&gt;data_dir)-&gt;i_sb);</div><div class='add'>+		break;</div><div class='add'>+	case REQ_OP_ZONE_RESET:</div><div class='add'>+		cmd-&gt;ret = zloop_reset_zone(zlo, rq_zone_no(rq));</div><div class='add'>+		break;</div><div class='add'>+	case REQ_OP_ZONE_RESET_ALL:</div><div class='add'>+		cmd-&gt;ret = zloop_reset_all_zones(zlo);</div><div class='add'>+		break;</div><div class='add'>+	case REQ_OP_ZONE_FINISH:</div><div class='add'>+		cmd-&gt;ret = zloop_finish_zone(zlo, rq_zone_no(rq));</div><div class='add'>+		break;</div><div class='add'>+	case REQ_OP_ZONE_OPEN:</div><div class='add'>+		cmd-&gt;ret = zloop_open_zone(zlo, rq_zone_no(rq));</div><div class='add'>+		break;</div><div class='add'>+	case REQ_OP_ZONE_CLOSE:</div><div class='add'>+		cmd-&gt;ret = zloop_close_zone(zlo, rq_zone_no(rq));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		pr_err("Unsupported operation %d\n", req_op(rq));</div><div class='add'>+		cmd-&gt;ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	blk_mq_complete_request(rq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zloop_cmd_workfn(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct zloop_cmd *cmd = container_of(work, struct zloop_cmd, work);</div><div class='add'>+	int orig_flags = current-&gt;flags;</div><div class='add'>+</div><div class='add'>+	current-&gt;flags |= PF_LOCAL_THROTTLE | PF_MEMALLOC_NOIO;</div><div class='add'>+	zloop_handle_cmd(cmd);</div><div class='add'>+	current-&gt;flags = orig_flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zloop_complete_rq(struct request *rq)</div><div class='add'>+{</div><div class='add'>+	struct zloop_cmd *cmd = blk_mq_rq_to_pdu(rq);</div><div class='add'>+	struct zloop_device *zlo = rq-&gt;q-&gt;queuedata;</div><div class='add'>+	unsigned int zone_no = cmd-&gt;sector &gt;&gt; zlo-&gt;zone_shift;</div><div class='add'>+	struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	blk_status_t sts = BLK_STS_OK;</div><div class='add'>+</div><div class='add'>+	switch (req_op(rq)) {</div><div class='add'>+	case REQ_OP_READ:</div><div class='add'>+		if (cmd-&gt;ret &lt; 0)</div><div class='add'>+			pr_err("Zone %u: failed read sector %llu, %llu sectors\n",</div><div class='add'>+			       zone_no, cmd-&gt;sector, cmd-&gt;nr_sectors);</div><div class='add'>+</div><div class='add'>+		if (cmd-&gt;ret &gt;= 0 &amp;&amp; cmd-&gt;ret != blk_rq_bytes(rq)) {</div><div class='add'>+			/* short read */</div><div class='add'>+			struct bio *bio;</div><div class='add'>+</div><div class='add'>+			__rq_for_each_bio(bio, rq)</div><div class='add'>+				zero_fill_bio(bio);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case REQ_OP_WRITE:</div><div class='add'>+	case REQ_OP_ZONE_APPEND:</div><div class='add'>+		if (cmd-&gt;ret &lt; 0)</div><div class='add'>+			pr_err("Zone %u: failed %swrite sector %llu, %llu sectors\n",</div><div class='add'>+			       zone_no,</div><div class='add'>+			       req_op(rq) == REQ_OP_WRITE ? "" : "append ",</div><div class='add'>+			       cmd-&gt;sector, cmd-&gt;nr_sectors);</div><div class='add'>+</div><div class='add'>+		if (cmd-&gt;ret &gt;= 0 &amp;&amp; cmd-&gt;ret != blk_rq_bytes(rq)) {</div><div class='add'>+			pr_err("Zone %u: partial write %ld/%u B\n",</div><div class='add'>+			       zone_no, cmd-&gt;ret, blk_rq_bytes(rq));</div><div class='add'>+			cmd-&gt;ret = -EIO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cmd-&gt;ret &lt; 0 &amp;&amp; !test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags)) {</div><div class='add'>+			/*</div><div class='add'>+			 * A write to a sequential zone file failed: mark the</div><div class='add'>+			 * zone as having an error. This will be corrected and</div><div class='add'>+			 * cleared when the next IO is submitted.</div><div class='add'>+			 */</div><div class='add'>+			set_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (req_op(rq) == REQ_OP_ZONE_APPEND)</div><div class='add'>+			rq-&gt;__sector = cmd-&gt;sector;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;ret &lt; 0)</div><div class='add'>+		sts = errno_to_blk_status(cmd-&gt;ret);</div><div class='add'>+	blk_mq_end_request(rq, sts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static blk_status_t zloop_queue_rq(struct blk_mq_hw_ctx *hctx,</div><div class='add'>+				   const struct blk_mq_queue_data *bd)</div><div class='add'>+{</div><div class='add'>+	struct request *rq = bd-&gt;rq;</div><div class='add'>+	struct zloop_cmd *cmd = blk_mq_rq_to_pdu(rq);</div><div class='add'>+	struct zloop_device *zlo = rq-&gt;q-&gt;queuedata;</div><div class='add'>+</div><div class='add'>+	if (zlo-&gt;state == Zlo_deleting)</div><div class='add'>+		return BLK_STS_IOERR;</div><div class='add'>+</div><div class='add'>+	blk_mq_start_request(rq);</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;cmd-&gt;work, zloop_cmd_workfn);</div><div class='add'>+	queue_work(zlo-&gt;workqueue, &amp;cmd-&gt;work);</div><div class='add'>+</div><div class='add'>+	return BLK_STS_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct blk_mq_ops zloop_mq_ops = {</div><div class='add'>+	.queue_rq       = zloop_queue_rq,</div><div class='add'>+	.complete	= zloop_complete_rq,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int zloop_open(struct gendisk *disk, blk_mode_t mode)</div><div class='add'>+{</div><div class='add'>+	struct zloop_device *zlo = disk-&gt;private_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mutex_lock_killable(&amp;zloop_ctl_mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (zlo-&gt;state != Zlo_live)</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+	mutex_unlock(&amp;zloop_ctl_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_report_zones(struct gendisk *disk, sector_t sector,</div><div class='add'>+		unsigned int nr_zones, report_zones_cb cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct zloop_device *zlo = disk-&gt;private_data;</div><div class='add'>+	struct blk_zone blkz = {};</div><div class='add'>+	unsigned int first, i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	first = disk_zone_no(disk, sector);</div><div class='add'>+	if (first &gt;= zlo-&gt;nr_zones)</div><div class='add'>+		return 0;</div><div class='add'>+	nr_zones = min(nr_zones, zlo-&gt;nr_zones - first);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_zones; i++) {</div><div class='add'>+		unsigned int zone_no = first + i;</div><div class='add'>+		struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+		if (test_and_clear_bit(ZLOOP_ZONE_SEQ_ERROR, &amp;zone-&gt;flags)) {</div><div class='add'>+			ret = zloop_update_seq_zone(zlo, zone_no);</div><div class='add'>+			if (ret) {</div><div class='add'>+				mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		blkz.start = zone-&gt;start;</div><div class='add'>+		blkz.len = zlo-&gt;zone_size;</div><div class='add'>+		blkz.wp = zone-&gt;wp;</div><div class='add'>+		blkz.cond = zone-&gt;cond;</div><div class='add'>+		if (test_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags)) {</div><div class='add'>+			blkz.type = BLK_ZONE_TYPE_CONVENTIONAL;</div><div class='add'>+			blkz.capacity = zlo-&gt;zone_size;</div><div class='add'>+		} else {</div><div class='add'>+			blkz.type = BLK_ZONE_TYPE_SEQWRITE_REQ;</div><div class='add'>+			blkz.capacity = zlo-&gt;zone_capacity;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+		ret = cb(&amp;blkz, i, data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return nr_zones;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void zloop_free_disk(struct gendisk *disk)</div><div class='add'>+{</div><div class='add'>+	struct zloop_device *zlo = disk-&gt;private_data;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; zlo-&gt;nr_zones; i++) {</div><div class='add'>+		struct zloop_zone *zone = &amp;zlo-&gt;zones[i];</div><div class='add'>+</div><div class='add'>+		mapping_set_gfp_mask(zone-&gt;file-&gt;f_mapping,</div><div class='add'>+				zone-&gt;old_gfp_mask);</div><div class='add'>+		fput(zone-&gt;file);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fput(zlo-&gt;data_dir);</div><div class='add'>+	destroy_workqueue(zlo-&gt;workqueue);</div><div class='add'>+	kfree(zlo-&gt;base_dir);</div><div class='add'>+	kvfree(zlo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct block_device_operations zloop_fops = {</div><div class='add'>+	.owner			= THIS_MODULE,</div><div class='add'>+	.open			= zloop_open,</div><div class='add'>+	.report_zones		= zloop_report_zones,</div><div class='add'>+	.free_disk		= zloop_free_disk,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+__printf(3, 4)</div><div class='add'>+static struct file *zloop_filp_open_fmt(int oflags, umode_t mode,</div><div class='add'>+		const char *fmt, ...)</div><div class='add'>+{</div><div class='add'>+	struct file *file;</div><div class='add'>+	va_list ap;</div><div class='add'>+	char *p;</div><div class='add'>+</div><div class='add'>+	va_start(ap, fmt);</div><div class='add'>+	p = kvasprintf(GFP_KERNEL, fmt, ap);</div><div class='add'>+	va_end(ap);</div><div class='add'>+</div><div class='add'>+	if (!p)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	file = filp_open(p, oflags, mode);</div><div class='add'>+	kfree(p);</div><div class='add'>+	return file;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_get_block_size(struct zloop_device *zlo,</div><div class='add'>+				struct zloop_zone *zone)</div><div class='add'>+{</div><div class='add'>+	struct block_device *sb_bdev = zone-&gt;file-&gt;f_mapping-&gt;host-&gt;i_sb-&gt;s_bdev;</div><div class='add'>+	struct kstat st;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the FS block size is lower than or equal to 4K, use that as the</div><div class='add'>+	 * device block size. Otherwise, fallback to the FS direct IO alignment</div><div class='add'>+	 * constraint if that is provided, and to the FS underlying device</div><div class='add'>+	 * physical block size if the direct IO alignment is unknown.</div><div class='add'>+	 */</div><div class='add'>+	if (file_inode(zone-&gt;file)-&gt;i_sb-&gt;s_blocksize &lt;= SZ_4K)</div><div class='add'>+		zlo-&gt;block_size = file_inode(zone-&gt;file)-&gt;i_sb-&gt;s_blocksize;</div><div class='add'>+	else if (!vfs_getattr(&amp;zone-&gt;file-&gt;f_path, &amp;st, STATX_DIOALIGN, 0) &amp;&amp;</div><div class='add'>+		 (st.result_mask &amp; STATX_DIOALIGN))</div><div class='add'>+		zlo-&gt;block_size = st.dio_offset_align;</div><div class='add'>+	else if (sb_bdev)</div><div class='add'>+		zlo-&gt;block_size = bdev_physical_block_size(sb_bdev);</div><div class='add'>+	else</div><div class='add'>+		zlo-&gt;block_size = SECTOR_SIZE;</div><div class='add'>+</div><div class='add'>+	if (zlo-&gt;zone_capacity &amp; ((zlo-&gt;block_size &gt;&gt; SECTOR_SHIFT) - 1)) {</div><div class='add'>+		pr_err("Zone capacity is not aligned to block size %u\n",</div><div class='add'>+		       zlo-&gt;block_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_init_zone(struct zloop_device *zlo, struct zloop_options *opts,</div><div class='add'>+			   unsigned int zone_no, bool restore)</div><div class='add'>+{</div><div class='add'>+	struct zloop_zone *zone = &amp;zlo-&gt;zones[zone_no];</div><div class='add'>+	int oflags = O_RDWR;</div><div class='add'>+	struct kstat stat;</div><div class='add'>+	sector_t file_sectors;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;zone-&gt;lock);</div><div class='add'>+	zone-&gt;start = (sector_t)zone_no &lt;&lt; zlo-&gt;zone_shift;</div><div class='add'>+</div><div class='add'>+	if (!restore)</div><div class='add'>+		oflags |= O_CREAT;</div><div class='add'>+</div><div class='add'>+	if (!opts-&gt;buffered_io)</div><div class='add'>+		oflags |= O_DIRECT;</div><div class='add'>+</div><div class='add'>+	if (zone_no &lt; zlo-&gt;nr_conv_zones) {</div><div class='add'>+		/* Conventional zone file. */</div><div class='add'>+		set_bit(ZLOOP_ZONE_CONV, &amp;zone-&gt;flags);</div><div class='add'>+		zone-&gt;cond = BLK_ZONE_COND_NOT_WP;</div><div class='add'>+		zone-&gt;wp = U64_MAX;</div><div class='add'>+</div><div class='add'>+		zone-&gt;file = zloop_filp_open_fmt(oflags, 0600, "%s/%u/cnv-%06u",</div><div class='add'>+					zlo-&gt;base_dir, zlo-&gt;id, zone_no);</div><div class='add'>+		if (IS_ERR(zone-&gt;file)) {</div><div class='add'>+			pr_err("Failed to open zone %u file %s/%u/cnv-%06u (err=%ld)",</div><div class='add'>+			       zone_no, zlo-&gt;base_dir, zlo-&gt;id, zone_no,</div><div class='add'>+			       PTR_ERR(zone-&gt;file));</div><div class='add'>+			return PTR_ERR(zone-&gt;file);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!zlo-&gt;block_size) {</div><div class='add'>+			ret = zloop_get_block_size(zlo, zone);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = vfs_getattr(&amp;zone-&gt;file-&gt;f_path, &amp;stat, STATX_SIZE, 0);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("Failed to get zone %u file stat\n", zone_no);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		file_sectors = stat.size &gt;&gt; SECTOR_SHIFT;</div><div class='add'>+</div><div class='add'>+		if (restore &amp;&amp; file_sectors != zlo-&gt;zone_size) {</div><div class='add'>+			pr_err("Invalid conventional zone %u file size (%llu sectors != %llu)\n",</div><div class='add'>+			       zone_no, file_sectors, zlo-&gt;zone_capacity);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = vfs_truncate(&amp;zone-&gt;file-&gt;f_path,</div><div class='add'>+				   zlo-&gt;zone_size &lt;&lt; SECTOR_SHIFT);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			pr_err("Failed to truncate zone %u file (err=%d)\n",</div><div class='add'>+			       zone_no, ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sequential zone file. */</div><div class='add'>+	zone-&gt;file = zloop_filp_open_fmt(oflags, 0600, "%s/%u/seq-%06u",</div><div class='add'>+					 zlo-&gt;base_dir, zlo-&gt;id, zone_no);</div><div class='add'>+	if (IS_ERR(zone-&gt;file)) {</div><div class='add'>+		pr_err("Failed to open zone %u file %s/%u/seq-%06u (err=%ld)",</div><div class='add'>+		       zone_no, zlo-&gt;base_dir, zlo-&gt;id, zone_no,</div><div class='add'>+		       PTR_ERR(zone-&gt;file));</div><div class='add'>+		return PTR_ERR(zone-&gt;file);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!zlo-&gt;block_size) {</div><div class='add'>+		ret = zloop_get_block_size(zlo, zone);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zloop_get_block_size(zlo, zone);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;zone-&gt;lock);</div><div class='add'>+	ret = zloop_update_seq_zone(zlo, zone_no);</div><div class='add'>+	mutex_unlock(&amp;zone-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool zloop_dev_exists(struct zloop_device *zlo)</div><div class='add'>+{</div><div class='add'>+	struct file *cnv, *seq;</div><div class='add'>+	bool exists;</div><div class='add'>+</div><div class='add'>+	cnv = zloop_filp_open_fmt(O_RDONLY, 0600, "%s/%u/cnv-%06u",</div><div class='add'>+				  zlo-&gt;base_dir, zlo-&gt;id, 0);</div><div class='add'>+	seq = zloop_filp_open_fmt(O_RDONLY, 0600, "%s/%u/seq-%06u",</div><div class='add'>+				  zlo-&gt;base_dir, zlo-&gt;id, 0);</div><div class='add'>+	exists = !IS_ERR(cnv) || !IS_ERR(seq);</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR(cnv))</div><div class='add'>+		fput(cnv);</div><div class='add'>+	if (!IS_ERR(seq))</div><div class='add'>+		fput(seq);</div><div class='add'>+</div><div class='add'>+	return exists;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_ctl_add(struct zloop_options *opts)</div><div class='add'>+{</div><div class='add'>+	struct queue_limits lim = {</div><div class='add'>+		.max_hw_sectors		= SZ_1M &gt;&gt; SECTOR_SHIFT,</div><div class='add'>+		.max_hw_zone_append_sectors = SZ_1M &gt;&gt; SECTOR_SHIFT,</div><div class='add'>+		.chunk_sectors		= opts-&gt;zone_size,</div><div class='add'>+		.features		= BLK_FEAT_ZONED,</div><div class='add'>+	};</div><div class='add'>+	unsigned int nr_zones, i, j;</div><div class='add'>+	struct zloop_device *zlo;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+	bool restore;</div><div class='add'>+</div><div class='add'>+	__module_get(THIS_MODULE);</div><div class='add'>+</div><div class='add'>+	nr_zones = opts-&gt;capacity &gt;&gt; ilog2(opts-&gt;zone_size);</div><div class='add'>+	if (opts-&gt;nr_conv_zones &gt;= nr_zones) {</div><div class='add'>+		pr_err("Invalid number of conventional zones %u\n",</div><div class='add'>+		       opts-&gt;nr_conv_zones);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zlo = kvzalloc(struct_size(zlo, zones, nr_zones), GFP_KERNEL);</div><div class='add'>+	if (!zlo) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	zlo-&gt;state = Zlo_creating;</div><div class='add'>+</div><div class='add'>+	ret = mutex_lock_killable(&amp;zloop_ctl_mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_dev;</div><div class='add'>+</div><div class='add'>+	/* Allocate id, if @opts-&gt;id &gt;= 0, we're requesting that specific id */</div><div class='add'>+	if (opts-&gt;id &gt;= 0) {</div><div class='add'>+		ret = idr_alloc(&amp;zloop_index_idr, zlo,</div><div class='add'>+				  opts-&gt;id, opts-&gt;id + 1, GFP_KERNEL);</div><div class='add'>+		if (ret == -ENOSPC)</div><div class='add'>+			ret = -EEXIST;</div><div class='add'>+	} else {</div><div class='add'>+		ret = idr_alloc(&amp;zloop_index_idr, zlo, 0, 0, GFP_KERNEL);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;zloop_ctl_mutex);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out_free_dev;</div><div class='add'>+</div><div class='add'>+	zlo-&gt;id = ret;</div><div class='add'>+	zlo-&gt;zone_shift = ilog2(opts-&gt;zone_size);</div><div class='add'>+	zlo-&gt;zone_size = opts-&gt;zone_size;</div><div class='add'>+	if (opts-&gt;zone_capacity)</div><div class='add'>+		zlo-&gt;zone_capacity = opts-&gt;zone_capacity;</div><div class='add'>+	else</div><div class='add'>+		zlo-&gt;zone_capacity = zlo-&gt;zone_size;</div><div class='add'>+	zlo-&gt;nr_zones = nr_zones;</div><div class='add'>+	zlo-&gt;nr_conv_zones = opts-&gt;nr_conv_zones;</div><div class='add'>+	zlo-&gt;buffered_io = opts-&gt;buffered_io;</div><div class='add'>+</div><div class='add'>+	zlo-&gt;workqueue = alloc_workqueue("zloop%d", WQ_UNBOUND | WQ_FREEZABLE,</div><div class='add'>+				opts-&gt;nr_queues * opts-&gt;queue_depth, zlo-&gt;id);</div><div class='add'>+	if (!zlo-&gt;workqueue) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_free_idr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opts-&gt;base_dir)</div><div class='add'>+		zlo-&gt;base_dir = kstrdup(opts-&gt;base_dir, GFP_KERNEL);</div><div class='add'>+	else</div><div class='add'>+		zlo-&gt;base_dir = kstrdup(ZLOOP_DEF_BASE_DIR, GFP_KERNEL);</div><div class='add'>+	if (!zlo-&gt;base_dir) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_destroy_workqueue;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zlo-&gt;data_dir = zloop_filp_open_fmt(O_RDONLY | O_DIRECTORY, 0, "%s/%u",</div><div class='add'>+					    zlo-&gt;base_dir, zlo-&gt;id);</div><div class='add'>+	if (IS_ERR(zlo-&gt;data_dir)) {</div><div class='add'>+		ret = PTR_ERR(zlo-&gt;data_dir);</div><div class='add'>+		pr_warn("Failed to open directory %s/%u (err=%d)\n",</div><div class='add'>+			zlo-&gt;base_dir, zlo-&gt;id, ret);</div><div class='add'>+		goto out_free_base_dir;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we already have zone files, we are restoring a device created by a</div><div class='add'>+	 * previous add operation. In this case, zloop_init_zone() will check</div><div class='add'>+	 * that the zone files are consistent with the zone configuration given.</div><div class='add'>+	 */</div><div class='add'>+	restore = zloop_dev_exists(zlo);</div><div class='add'>+	for (i = 0; i &lt; nr_zones; i++) {</div><div class='add'>+		ret = zloop_init_zone(zlo, opts, i, restore);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_close_files;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lim.physical_block_size = zlo-&gt;block_size;</div><div class='add'>+	lim.logical_block_size = zlo-&gt;block_size;</div><div class='add'>+</div><div class='add'>+	zlo-&gt;tag_set.ops = &amp;zloop_mq_ops;</div><div class='add'>+	zlo-&gt;tag_set.nr_hw_queues = opts-&gt;nr_queues;</div><div class='add'>+	zlo-&gt;tag_set.queue_depth = opts-&gt;queue_depth;</div><div class='add'>+	zlo-&gt;tag_set.numa_node = NUMA_NO_NODE;</div><div class='add'>+	zlo-&gt;tag_set.cmd_size = sizeof(struct zloop_cmd);</div><div class='add'>+	zlo-&gt;tag_set.driver_data = zlo;</div><div class='add'>+</div><div class='add'>+	ret = blk_mq_alloc_tag_set(&amp;zlo-&gt;tag_set);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("blk_mq_alloc_tag_set failed (err=%d)\n", ret);</div><div class='add'>+		goto out_close_files;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zlo-&gt;disk = blk_mq_alloc_disk(&amp;zlo-&gt;tag_set, &amp;lim, zlo);</div><div class='add'>+	if (IS_ERR(zlo-&gt;disk)) {</div><div class='add'>+		pr_err("blk_mq_alloc_disk failed (err=%d)\n", ret);</div><div class='add'>+		ret = PTR_ERR(zlo-&gt;disk);</div><div class='add'>+		goto out_cleanup_tags;</div><div class='add'>+	}</div><div class='add'>+	zlo-&gt;disk-&gt;flags = GENHD_FL_NO_PART;</div><div class='add'>+	zlo-&gt;disk-&gt;fops = &amp;zloop_fops;</div><div class='add'>+	zlo-&gt;disk-&gt;private_data = zlo;</div><div class='add'>+	sprintf(zlo-&gt;disk-&gt;disk_name, "zloop%d", zlo-&gt;id);</div><div class='add'>+	set_capacity(zlo-&gt;disk, (u64)lim.chunk_sectors * zlo-&gt;nr_zones);</div><div class='add'>+</div><div class='add'>+	ret = blk_revalidate_disk_zones(zlo-&gt;disk);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_cleanup_disk;</div><div class='add'>+</div><div class='add'>+	ret = add_disk(zlo-&gt;disk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("add_disk failed (err=%d)\n", ret);</div><div class='add'>+		goto out_cleanup_disk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;zloop_ctl_mutex);</div><div class='add'>+	zlo-&gt;state = Zlo_live;</div><div class='add'>+	mutex_unlock(&amp;zloop_ctl_mutex);</div><div class='add'>+</div><div class='add'>+	pr_info("Added device %d: %u zones of %llu MB, %u B block size\n",</div><div class='add'>+		zlo-&gt;id, zlo-&gt;nr_zones,</div><div class='add'>+		((sector_t)zlo-&gt;zone_size &lt;&lt; SECTOR_SHIFT) &gt;&gt; 20,</div><div class='add'>+		zlo-&gt;block_size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_cleanup_disk:</div><div class='add'>+	put_disk(zlo-&gt;disk);</div><div class='add'>+out_cleanup_tags:</div><div class='add'>+	blk_mq_free_tag_set(&amp;zlo-&gt;tag_set);</div><div class='add'>+out_close_files:</div><div class='add'>+	for (j = 0; j &lt; i; j++) {</div><div class='add'>+		struct zloop_zone *zone = &amp;zlo-&gt;zones[j];</div><div class='add'>+</div><div class='add'>+		if (!IS_ERR_OR_NULL(zone-&gt;file))</div><div class='add'>+			fput(zone-&gt;file);</div><div class='add'>+	}</div><div class='add'>+	fput(zlo-&gt;data_dir);</div><div class='add'>+out_free_base_dir:</div><div class='add'>+	kfree(zlo-&gt;base_dir);</div><div class='add'>+out_destroy_workqueue:</div><div class='add'>+	destroy_workqueue(zlo-&gt;workqueue);</div><div class='add'>+out_free_idr:</div><div class='add'>+	mutex_lock(&amp;zloop_ctl_mutex);</div><div class='add'>+	idr_remove(&amp;zloop_index_idr, zlo-&gt;id);</div><div class='add'>+	mutex_unlock(&amp;zloop_ctl_mutex);</div><div class='add'>+out_free_dev:</div><div class='add'>+	kvfree(zlo);</div><div class='add'>+out:</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	if (ret == -ENOENT)</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_ctl_remove(struct zloop_options *opts)</div><div class='add'>+{</div><div class='add'>+	struct zloop_device *zlo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!(opts-&gt;mask &amp; ZLOOP_OPT_ID)) {</div><div class='add'>+		pr_err("No ID specified\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mutex_lock_killable(&amp;zloop_ctl_mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	zlo = idr_find(&amp;zloop_index_idr, opts-&gt;id);</div><div class='add'>+	if (!zlo || zlo-&gt;state == Zlo_creating) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+	} else if (zlo-&gt;state == Zlo_deleting) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	} else {</div><div class='add'>+		idr_remove(&amp;zloop_index_idr, zlo-&gt;id);</div><div class='add'>+		zlo-&gt;state = Zlo_deleting;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;zloop_ctl_mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	del_gendisk(zlo-&gt;disk);</div><div class='add'>+	put_disk(zlo-&gt;disk);</div><div class='add'>+	blk_mq_free_tag_set(&amp;zlo-&gt;tag_set);</div><div class='add'>+</div><div class='add'>+	pr_info("Removed device %d\n", opts-&gt;id);</div><div class='add'>+</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_parse_options(struct zloop_options *opts, const char *buf)</div><div class='add'>+{</div><div class='add'>+	substring_t args[MAX_OPT_ARGS];</div><div class='add'>+	char *options, *o, *p;</div><div class='add'>+	unsigned int token;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Set defaults. */</div><div class='add'>+	opts-&gt;mask = 0;</div><div class='add'>+	opts-&gt;id = ZLOOP_DEF_ID;</div><div class='add'>+	opts-&gt;capacity = ZLOOP_DEF_ZONE_SIZE * ZLOOP_DEF_NR_ZONES;</div><div class='add'>+	opts-&gt;zone_size = ZLOOP_DEF_ZONE_SIZE;</div><div class='add'>+	opts-&gt;nr_conv_zones = ZLOOP_DEF_NR_CONV_ZONES;</div><div class='add'>+	opts-&gt;nr_queues = ZLOOP_DEF_NR_QUEUES;</div><div class='add'>+	opts-&gt;queue_depth = ZLOOP_DEF_QUEUE_DEPTH;</div><div class='add'>+	opts-&gt;buffered_io = ZLOOP_DEF_BUFFERED_IO;</div><div class='add'>+</div><div class='add'>+	if (!buf)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Skip leading spaces before the options. */</div><div class='add'>+	while (isspace(*buf))</div><div class='add'>+		buf++;</div><div class='add'>+</div><div class='add'>+	options = o = kstrdup(buf, GFP_KERNEL);</div><div class='add'>+	if (!options)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Parse the options, doing only some light invalid value checks. */</div><div class='add'>+	while ((p = strsep(&amp;o, ",\n")) != NULL) {</div><div class='add'>+		if (!*p)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		token = match_token(p, zloop_opt_tokens, args);</div><div class='add'>+		opts-&gt;mask |= token;</div><div class='add'>+		switch (token) {</div><div class='add'>+		case ZLOOP_OPT_ID:</div><div class='add'>+			if (match_int(args, &amp;opts-&gt;id)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_CAPACITY:</div><div class='add'>+			if (match_uint(args, &amp;token)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			if (!token) {</div><div class='add'>+				pr_err("Invalid capacity\n");</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			opts-&gt;capacity =</div><div class='add'>+				((sector_t)token * SZ_1M) &gt;&gt; SECTOR_SHIFT;</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_ZONE_SIZE:</div><div class='add'>+			if (match_uint(args, &amp;token)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			if (!token || token &gt; ZLOOP_MAX_ZONE_SIZE_MB ||</div><div class='add'>+			    !is_power_of_2(token)) {</div><div class='add'>+				pr_err("Invalid zone size %u\n", token);</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			opts-&gt;zone_size =</div><div class='add'>+				((sector_t)token * SZ_1M) &gt;&gt; SECTOR_SHIFT;</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_ZONE_CAPACITY:</div><div class='add'>+			if (match_uint(args, &amp;token)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			if (!token) {</div><div class='add'>+				pr_err("Invalid zone capacity\n");</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			opts-&gt;zone_capacity =</div><div class='add'>+				((sector_t)token * SZ_1M) &gt;&gt; SECTOR_SHIFT;</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_NR_CONV_ZONES:</div><div class='add'>+			if (match_uint(args, &amp;token)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			opts-&gt;nr_conv_zones = token;</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_BASE_DIR:</div><div class='add'>+			p = match_strdup(args);</div><div class='add'>+			if (!p) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			kfree(opts-&gt;base_dir);</div><div class='add'>+			opts-&gt;base_dir = p;</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_NR_QUEUES:</div><div class='add'>+			if (match_uint(args, &amp;token)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			if (!token) {</div><div class='add'>+				pr_err("Invalid number of queues\n");</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			opts-&gt;nr_queues = min(token, num_online_cpus());</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_QUEUE_DEPTH:</div><div class='add'>+			if (match_uint(args, &amp;token)) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			if (!token) {</div><div class='add'>+				pr_err("Invalid queue depth\n");</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			opts-&gt;queue_depth = token;</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_BUFFERED_IO:</div><div class='add'>+			opts-&gt;buffered_io = true;</div><div class='add'>+			break;</div><div class='add'>+		case ZLOOP_OPT_ERR:</div><div class='add'>+		default:</div><div class='add'>+			pr_warn("unknown parameter or missing value '%s'\n", p);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = -EINVAL;</div><div class='add'>+	if (opts-&gt;capacity &lt;= opts-&gt;zone_size) {</div><div class='add'>+		pr_err("Invalid capacity\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opts-&gt;zone_capacity &gt; opts-&gt;zone_size) {</div><div class='add'>+		pr_err("Invalid zone capacity\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+out:</div><div class='add'>+	kfree(options);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	ZLOOP_CTL_ADD,</div><div class='add'>+	ZLOOP_CTL_REMOVE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct zloop_ctl_op {</div><div class='add'>+	int		code;</div><div class='add'>+	const char	*name;</div><div class='add'>+} zloop_ctl_ops[] = {</div><div class='add'>+	{ ZLOOP_CTL_ADD,	"add" },</div><div class='add'>+	{ ZLOOP_CTL_REMOVE,	"remove" },</div><div class='add'>+	{ -1,	NULL },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t zloop_ctl_write(struct file *file, const char __user *ubuf,</div><div class='add'>+			       size_t count, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct zloop_options opts = { };</div><div class='add'>+	struct zloop_ctl_op *op;</div><div class='add'>+	const char *buf, *opts_buf;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (count &gt; PAGE_SIZE)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	buf = memdup_user_nul(ubuf, count);</div><div class='add'>+	if (IS_ERR(buf))</div><div class='add'>+		return PTR_ERR(buf);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(zloop_ctl_ops); i++) {</div><div class='add'>+		op = &amp;zloop_ctl_ops[i];</div><div class='add'>+		if (!op-&gt;name) {</div><div class='add'>+			pr_err("Invalid operation\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		if (!strncmp(buf, op-&gt;name, strlen(op-&gt;name)))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (count &lt;= strlen(op-&gt;name))</div><div class='add'>+		opts_buf = NULL;</div><div class='add'>+	else</div><div class='add'>+		opts_buf = buf + strlen(op-&gt;name);</div><div class='add'>+</div><div class='add'>+	ret = zloop_parse_options(&amp;opts, opts_buf);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Failed to parse options\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (op-&gt;code) {</div><div class='add'>+	case ZLOOP_CTL_ADD:</div><div class='add'>+		ret = zloop_ctl_add(&amp;opts);</div><div class='add'>+		break;</div><div class='add'>+	case ZLOOP_CTL_REMOVE:</div><div class='add'>+		ret = zloop_ctl_remove(&amp;opts);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("Invalid operation\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(opts.base_dir);</div><div class='add'>+	kfree(buf);</div><div class='add'>+	return ret ? ret : count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_ctl_show(struct seq_file *seq_file, void *private)</div><div class='add'>+{</div><div class='add'>+	const struct match_token *tok;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Add operation */</div><div class='add'>+	seq_printf(seq_file, "%s ", zloop_ctl_ops[0].name);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(zloop_opt_tokens); i++) {</div><div class='add'>+		tok = &amp;zloop_opt_tokens[i];</div><div class='add'>+		if (!tok-&gt;pattern)</div><div class='add'>+			break;</div><div class='add'>+		if (i)</div><div class='add'>+			seq_putc(seq_file, ',');</div><div class='add'>+		seq_puts(seq_file, tok-&gt;pattern);</div><div class='add'>+	}</div><div class='add'>+	seq_putc(seq_file, '\n');</div><div class='add'>+</div><div class='add'>+	/* Remove operation */</div><div class='add'>+	seq_puts(seq_file, zloop_ctl_ops[1].name);</div><div class='add'>+	seq_puts(seq_file, " id=%d\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_ctl_open(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	file-&gt;private_data = NULL;</div><div class='add'>+	return single_open(file, zloop_ctl_show, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int zloop_ctl_release(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	return single_release(inode, file);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations zloop_ctl_fops = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.open		= zloop_ctl_open,</div><div class='add'>+	.release	= zloop_ctl_release,</div><div class='add'>+	.write		= zloop_ctl_write,</div><div class='add'>+	.read		= seq_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miscdevice zloop_misc = {</div><div class='add'>+	.minor		= MISC_DYNAMIC_MINOR,</div><div class='add'>+	.name		= "zloop-control",</div><div class='add'>+	.fops		= &amp;zloop_ctl_fops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init zloop_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = misc_register(&amp;zloop_misc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Failed to register misc device: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	pr_info("Module loaded\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit zloop_exit(void)</div><div class='add'>+{</div><div class='add'>+	misc_deregister(&amp;zloop_misc);</div><div class='add'>+	idr_destroy(&amp;zloop_index_idr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(zloop_init);</div><div class='add'>+module_exit(zloop_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Zoned loopback device");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig<br/>index 7771edf54fb3..4ab32abf0f48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/Kconfig</a></div><div class='hunk'>@@ -56,18 +56,6 @@ config BT_HCIBTUSB_POLL_SYNC</div><div class='ctx'> 	  Say Y here to enable USB poll_sync for Bluetooth USB devices by</div><div class='ctx'> 	  default.</div><div class='ctx'> </div><div class='del'>-config BT_HCIBTUSB_AUTO_ISOC_ALT</div><div class='del'>-	bool "Automatically adjust alternate setting for Isoc endpoints"</div><div class='del'>-	depends on BT_HCIBTUSB</div><div class='del'>-	default y if CHROME_PLATFORMS</div><div class='del'>-	help</div><div class='del'>-	  Say Y here to automatically adjusting the alternate setting for</div><div class='del'>-	  HCI_USER_CHANNEL whenever a SCO link is established.</div><div class='del'>-</div><div class='del'>-	  When enabled, btusb intercepts the HCI_EV_SYNC_CONN_COMPLETE packets</div><div class='del'>-	  and configures isoc endpoint alternate setting automatically when</div><div class='del'>-	  HCI_USER_CHANNEL is in use.</div><div class='del'>-</div><div class='ctx'> config BT_HCIBTUSB_BCM</div><div class='ctx'> 	bool "Broadcom protocol support"</div><div class='ctx'> 	depends on BT_HCIBTUSB</div><div class='head'>diff --git a/drivers/bluetooth/btintel.c b/drivers/bluetooth/btintel.c<br/>index 48e2f400957b..55cc1652bfe4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btintel.c</a></div><div class='hunk'>@@ -2719,7 +2719,7 @@ static int btintel_uefi_get_dsbr(u32 *dsbr_var)</div><div class='ctx'> 	} __packed data;</div><div class='ctx'> </div><div class='ctx'> 	efi_status_t status;</div><div class='del'>-	unsigned long data_size = 0;</div><div class='add'>+	unsigned long data_size = sizeof(data);</div><div class='ctx'> 	efi_guid_t guid = EFI_GUID(0xe65d8884, 0xd4af, 0x4b20, 0x8d, 0x03,</div><div class='ctx'> 				   0x77, 0x2e, 0xcc, 0x3d, 0xa5, 0x31);</div><div class='ctx'> </div><div class='hunk'>@@ -2730,15 +2730,9 @@ static int btintel_uefi_get_dsbr(u32 *dsbr_var)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	status = efi.get_variable(BTINTEL_EFI_DSBR, &amp;guid, NULL, &amp;data_size,</div><div class='del'>-				  NULL);</div><div class='del'>-</div><div class='del'>-	if (status != EFI_BUFFER_TOO_SMALL || !data_size)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	status = efi.get_variable(BTINTEL_EFI_DSBR, &amp;guid, NULL, &amp;data_size,</div><div class='ctx'> 				  &amp;data);</div><div class='ctx'> </div><div class='del'>-	if (status != EFI_SUCCESS)</div><div class='add'>+	if (status != EFI_SUCCESS || data_size != sizeof(data))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='ctx'> 	*dsbr_var = data.dsbr;</div><div class='hunk'>@@ -3688,7 +3682,7 @@ int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(btintel_configure_setup);</div><div class='ctx'> </div><div class='del'>-int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='add'>+static int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct intel_tlv *tlv = (void *)&amp;skb-&gt;data[5];</div><div class='ctx'> </div><div class='hunk'>@@ -3716,7 +3710,6 @@ int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> recv_frame:</div><div class='ctx'> 	return hci_recv_frame(hdev, skb);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(btintel_diagnostics);</div><div class='ctx'> </div><div class='ctx'> int btintel_recv_event(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/bluetooth/btintel.h b/drivers/bluetooth/btintel.h<br/>index 2aece3effa4e..1d12c4113c66 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btintel.h</a></div><div class='hunk'>@@ -277,7 +277,6 @@ int btintel_bootloader_setup_tlv(struct hci_dev *hdev,</div><div class='ctx'> int btintel_shutdown_combined(struct hci_dev *hdev);</div><div class='ctx'> void btintel_hw_error(struct hci_dev *hdev, u8 code);</div><div class='ctx'> void btintel_print_fseq_info(struct hci_dev *hdev);</div><div class='del'>-int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb);</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> static inline int btintel_check_bdaddr(struct hci_dev *hdev)</div><div class='hunk'>@@ -411,9 +410,4 @@ static inline void btintel_hw_error(struct hci_dev *hdev, u8 code)</div><div class='ctx'> static inline void btintel_print_fseq_info(struct hci_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline int btintel_diagnostics(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/bluetooth/btintel_pcie.c b/drivers/bluetooth/btintel_pcie.c<br/>index c1e69fcc9c4f..50fe17f1e1d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel_pcie.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel_pcie.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel_pcie.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btintel_pcie.c</a></div><div class='hunk'>@@ -208,6 +208,96 @@ static void btintel_pcie_prepare_tx(struct txq *txq, u16 tfd_index,</div><div class='ctx'> 	memcpy(buf-&gt;data, skb-&gt;data, tfd-&gt;size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void btintel_pcie_dump_debug_registers(struct hci_dev *hdev)</div><div class='add'>+{</div><div class='add'>+	struct btintel_pcie_data *data = hci_get_drvdata(hdev);</div><div class='add'>+	u16 cr_hia, cr_tia;</div><div class='add'>+	u32 reg, mbox_reg;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u8 buf[80];</div><div class='add'>+</div><div class='add'>+	skb = alloc_skb(1024, GFP_ATOMIC);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	snprintf(buf, sizeof(buf), "%s", "---- Dump of debug registers ---");</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+</div><div class='add'>+	reg = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_BOOT_STAGE_REG);</div><div class='add'>+	snprintf(buf, sizeof(buf), "boot stage: 0x%8.8x", reg);</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+	data-&gt;boot_stage_cache = reg;</div><div class='add'>+</div><div class='add'>+	reg = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_IPC_STATUS_REG);</div><div class='add'>+	snprintf(buf, sizeof(buf), "ipc status: 0x%8.8x", reg);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+</div><div class='add'>+	reg = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_IPC_CONTROL_REG);</div><div class='add'>+	snprintf(buf, sizeof(buf), "ipc control: 0x%8.8x", reg);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+</div><div class='add'>+	reg = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_IPC_SLEEP_CTL_REG);</div><div class='add'>+	snprintf(buf, sizeof(buf), "ipc sleep control: 0x%8.8x", reg);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+</div><div class='add'>+	/*Read the Mail box status and registers*/</div><div class='add'>+	reg = btintel_pcie_rd_reg32(data, BTINTEL_PCIE_CSR_MBOX_STATUS_REG);</div><div class='add'>+	snprintf(buf, sizeof(buf), "mbox status: 0x%8.8x", reg);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+	if (reg &amp; BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX1) {</div><div class='add'>+		mbox_reg = btintel_pcie_rd_reg32(data,</div><div class='add'>+						 BTINTEL_PCIE_CSR_MBOX_1_REG);</div><div class='add'>+		snprintf(buf, sizeof(buf), "mbox_1: 0x%8.8x", mbox_reg);</div><div class='add'>+		skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+		bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX2) {</div><div class='add'>+		mbox_reg = btintel_pcie_rd_reg32(data,</div><div class='add'>+						 BTINTEL_PCIE_CSR_MBOX_2_REG);</div><div class='add'>+		snprintf(buf, sizeof(buf), "mbox_2: 0x%8.8x", mbox_reg);</div><div class='add'>+		skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+		bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX3) {</div><div class='add'>+		mbox_reg = btintel_pcie_rd_reg32(data,</div><div class='add'>+						 BTINTEL_PCIE_CSR_MBOX_3_REG);</div><div class='add'>+		snprintf(buf, sizeof(buf), "mbox_3: 0x%8.8x", mbox_reg);</div><div class='add'>+		skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+		bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX4) {</div><div class='add'>+		mbox_reg = btintel_pcie_rd_reg32(data,</div><div class='add'>+						 BTINTEL_PCIE_CSR_MBOX_4_REG);</div><div class='add'>+		snprintf(buf, sizeof(buf), "mbox_4: 0x%8.8x", mbox_reg);</div><div class='add'>+		skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+		bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cr_hia = data-&gt;ia.cr_hia[BTINTEL_PCIE_RXQ_NUM];</div><div class='add'>+	cr_tia = data-&gt;ia.cr_tia[BTINTEL_PCIE_RXQ_NUM];</div><div class='add'>+	snprintf(buf, sizeof(buf), "rxq: cr_tia: %u cr_hia: %u", cr_tia, cr_hia);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+</div><div class='add'>+	cr_hia = data-&gt;ia.cr_hia[BTINTEL_PCIE_TXQ_NUM];</div><div class='add'>+	cr_tia = data-&gt;ia.cr_tia[BTINTEL_PCIE_TXQ_NUM];</div><div class='add'>+	snprintf(buf, sizeof(buf), "txq: cr_tia: %u cr_hia: %u", cr_tia, cr_hia);</div><div class='add'>+	skb_put_data(skb, buf, strlen(buf));</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+	snprintf(buf, sizeof(buf), "--------------------------------");</div><div class='add'>+	bt_dev_dbg(hdev, "%s", buf);</div><div class='add'>+</div><div class='add'>+	hci_recv_diag(hdev, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int btintel_pcie_send_sync(struct btintel_pcie_data *data,</div><div class='ctx'> 				  struct sk_buff *skb)</div><div class='ctx'> {</div><div class='hunk'>@@ -237,8 +327,11 @@ static int btintel_pcie_send_sync(struct btintel_pcie_data *data,</div><div class='ctx'> 	/* Wait for the complete interrupt - URBD0 */</div><div class='ctx'> 	ret = wait_event_timeout(data-&gt;tx_wait_q, data-&gt;tx_wait_done,</div><div class='ctx'> 				 msecs_to_jiffies(BTINTEL_PCIE_TX_WAIT_TIMEOUT_MS));</div><div class='del'>-	if (!ret)</div><div class='add'>+	if (!ret) {</div><div class='add'>+		bt_dev_err(data-&gt;hdev, "tx completion timeout");</div><div class='add'>+		btintel_pcie_dump_debug_registers(data-&gt;hdev);</div><div class='ctx'> 		return -ETIME;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -756,6 +849,26 @@ static int btintel_pcie_read_device_mem(struct btintel_pcie_data *data,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool btintel_pcie_in_lockdown(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	return (data-&gt;boot_stage_cache &amp;</div><div class='add'>+		BTINTEL_PCIE_CSR_BOOT_STAGE_ROM_LOCKDOWN) ||</div><div class='add'>+		(data-&gt;boot_stage_cache &amp;</div><div class='add'>+		 BTINTEL_PCIE_CSR_BOOT_STAGE_IML_LOCKDOWN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool btintel_pcie_in_error(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	return (data-&gt;boot_stage_cache &amp; BTINTEL_PCIE_CSR_BOOT_STAGE_DEVICE_ERR) ||</div><div class='add'>+		(data-&gt;boot_stage_cache &amp; BTINTEL_PCIE_CSR_BOOT_STAGE_ABORT_HANDLER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void btintel_pcie_msix_gp1_handler(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	bt_dev_err(data-&gt;hdev, "Received gp1 mailbox interrupt");</div><div class='add'>+	btintel_pcie_dump_debug_registers(data-&gt;hdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* This function handles the MSI-X interrupt for gp0 cause (bit 0 in</div><div class='ctx'>  * BTINTEL_PCIE_CSR_MSIX_HW_INT_CAUSES) which is sent for boot stage and image response.</div><div class='ctx'>  */</div><div class='hunk'>@@ -779,6 +892,18 @@ static void btintel_pcie_msix_gp0_handler(struct btintel_pcie_data *data)</div><div class='ctx'> 	if (reg != data-&gt;img_resp_cache)</div><div class='ctx'> 		data-&gt;img_resp_cache = reg;</div><div class='ctx'> </div><div class='add'>+	if (btintel_pcie_in_error(data)) {</div><div class='add'>+		bt_dev_err(data-&gt;hdev, "Controller in error state");</div><div class='add'>+		btintel_pcie_dump_debug_registers(data-&gt;hdev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (btintel_pcie_in_lockdown(data)) {</div><div class='add'>+		bt_dev_err(data-&gt;hdev, "Controller in lockdown state");</div><div class='add'>+		btintel_pcie_dump_debug_registers(data-&gt;hdev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	data-&gt;gp0_received = true;</div><div class='ctx'> </div><div class='ctx'> 	old_ctxt = data-&gt;alive_intr_ctxt;</div><div class='hunk'>@@ -889,7 +1014,6 @@ static void btintel_pcie_msix_tx_handle(struct btintel_pcie_data *data)</div><div class='ctx'> static int btintel_pcie_recv_event(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct hci_event_hdr *hdr = (void *)skb-&gt;data;</div><div class='del'>-	const char diagnostics_hdr[] = { 0x87, 0x80, 0x03 };</div><div class='ctx'> 	struct btintel_pcie_data *data = hci_get_drvdata(hdev);</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;len &gt; HCI_EVENT_HDR_SIZE &amp;&amp; hdr-&gt;evt == 0xff &amp;&amp;</div><div class='hunk'>@@ -945,20 +1069,13 @@ static int btintel_pcie_recv_event(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* Handle all diagnostics events separately. May still call</div><div class='del'>-		 * hci_recv_frame.</div><div class='del'>-		 */</div><div class='del'>-		if (len &gt;= sizeof(diagnostics_hdr) &amp;&amp;</div><div class='del'>-		    memcmp(&amp;skb-&gt;data[2], diagnostics_hdr,</div><div class='del'>-			   sizeof(diagnostics_hdr)) == 0) {</div><div class='del'>-			return btintel_diagnostics(hdev, skb);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		/* This is a debug event that comes from IML and OP image when it</div><div class='ctx'> 		 * starts execution. There is no need pass this event to stack.</div><div class='ctx'> 		 */</div><div class='del'>-		if (skb-&gt;data[2] == 0x97)</div><div class='add'>+		if (skb-&gt;data[2] == 0x97) {</div><div class='add'>+			hci_recv_diag(hdev, skb);</div><div class='ctx'> 			return 0;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return hci_recv_frame(hdev, skb);</div><div class='hunk'>@@ -974,7 +1091,6 @@ static int btintel_pcie_recv_frame(struct btintel_pcie_data *data,</div><div class='ctx'> 	u8 pkt_type;</div><div class='ctx'> 	u16 plen;</div><div class='ctx'> 	u32 pcie_pkt_type;</div><div class='del'>-	struct sk_buff *new_skb;</div><div class='ctx'> 	void *pdata;</div><div class='ctx'> 	struct hci_dev *hdev = data-&gt;hdev;</div><div class='ctx'> </div><div class='hunk'>@@ -1051,24 +1167,20 @@ static int btintel_pcie_recv_frame(struct btintel_pcie_data *data,</div><div class='ctx'> </div><div class='ctx'> 	bt_dev_dbg(hdev, "pkt_type: 0x%2.2x len: %u", pkt_type, plen);</div><div class='ctx'> </div><div class='del'>-	new_skb = bt_skb_alloc(plen, GFP_ATOMIC);</div><div class='del'>-	if (!new_skb) {</div><div class='del'>-		bt_dev_err(hdev, "Failed to allocate memory for skb of len: %u",</div><div class='del'>-			   skb-&gt;len);</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto exit_error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hci_skb_pkt_type(new_skb) = pkt_type;</div><div class='del'>-	skb_put_data(new_skb, skb-&gt;data, plen);</div><div class='add'>+	hci_skb_pkt_type(skb) = pkt_type;</div><div class='ctx'> 	hdev-&gt;stat.byte_rx += plen;</div><div class='add'>+	skb_trim(skb, plen);</div><div class='ctx'> </div><div class='ctx'> 	if (pcie_pkt_type == BTINTEL_PCIE_HCI_EVT_PKT)</div><div class='del'>-		ret = btintel_pcie_recv_event(hdev, new_skb);</div><div class='add'>+		ret = btintel_pcie_recv_event(hdev, skb);</div><div class='ctx'> 	else</div><div class='del'>-		ret = hci_recv_frame(hdev, new_skb);</div><div class='add'>+		ret = hci_recv_frame(hdev, skb);</div><div class='add'>+	skb = NULL; /* skb is freed in the callee  */</div><div class='ctx'> </div><div class='ctx'> exit_error:</div><div class='add'>+	if (skb)</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		hdev-&gt;stat.err_rx++;</div><div class='ctx'> </div><div class='hunk'>@@ -1202,8 +1314,6 @@ static void btintel_pcie_rx_work(struct work_struct *work)</div><div class='ctx'> 	struct btintel_pcie_data *data = container_of(work,</div><div class='ctx'> 					struct btintel_pcie_data, rx_work);</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	int err;</div><div class='del'>-	struct hci_dev *hdev = data-&gt;hdev;</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(BTINTEL_PCIE_HWEXP_INPROGRESS, &amp;data-&gt;flags)) {</div><div class='ctx'> 		/* Unlike usb products, controller will not send hardware</div><div class='hunk'>@@ -1224,11 +1334,7 @@ static void btintel_pcie_rx_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	/* Process the sk_buf in queue and send to the HCI layer */</div><div class='ctx'> 	while ((skb = skb_dequeue(&amp;data-&gt;rx_skb_q))) {</div><div class='del'>-		err = btintel_pcie_recv_frame(data, skb);</div><div class='del'>-		if (err)</div><div class='del'>-			bt_dev_err(hdev, "Failed to send received frame: %d",</div><div class='del'>-				   err);</div><div class='del'>-		kfree_skb(skb);</div><div class='add'>+		btintel_pcie_recv_frame(data, skb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1281,10 +1387,8 @@ static void btintel_pcie_msix_rx_handle(struct btintel_pcie_data *data)</div><div class='ctx'> 	bt_dev_dbg(hdev, "RXQ: cr_hia: %u  cr_tia: %u", cr_hia, cr_tia);</div><div class='ctx'> </div><div class='ctx'> 	/* Check CR_TIA and CR_HIA for change */</div><div class='del'>-	if (cr_tia == cr_hia) {</div><div class='del'>-		bt_dev_warn(hdev, "RXQ: no new CD found");</div><div class='add'>+	if (cr_tia == cr_hia)</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	rxq = &amp;data-&gt;rxq;</div><div class='ctx'> </div><div class='hunk'>@@ -1320,6 +1424,16 @@ static irqreturn_t btintel_pcie_msix_isr(int irq, void *data)</div><div class='ctx'> 	return IRQ_WAKE_THREAD;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool btintel_pcie_is_rxq_empty(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	return data-&gt;ia.cr_hia[BTINTEL_PCIE_RXQ_NUM] == data-&gt;ia.cr_tia[BTINTEL_PCIE_RXQ_NUM];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool btintel_pcie_is_txackq_empty(struct btintel_pcie_data *data)</div><div class='add'>+{</div><div class='add'>+	return data-&gt;ia.cr_tia[BTINTEL_PCIE_TXQ_NUM] == data-&gt;ia.cr_hia[BTINTEL_PCIE_TXQ_NUM];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t btintel_pcie_irq_msix_handler(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct msix_entry *entry = dev_id;</div><div class='hunk'>@@ -1344,6 +1458,9 @@ static irqreturn_t btintel_pcie_irq_msix_handler(int irq, void *dev_id)</div><div class='ctx'> 	if (intr_hw &amp; BTINTEL_PCIE_MSIX_HW_INT_CAUSES_HWEXP)</div><div class='ctx'> 		btintel_pcie_msix_hw_exp_handler(data);</div><div class='ctx'> </div><div class='add'>+	if (intr_hw &amp; BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP1)</div><div class='add'>+		btintel_pcie_msix_gp1_handler(data);</div><div class='add'>+</div><div class='ctx'> 	/* This interrupt is triggered by the firmware after updating</div><div class='ctx'> 	 * boot_stage register and image_response register</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1351,12 +1468,18 @@ static irqreturn_t btintel_pcie_irq_msix_handler(int irq, void *dev_id)</div><div class='ctx'> 		btintel_pcie_msix_gp0_handler(data);</div><div class='ctx'> </div><div class='ctx'> 	/* For TX */</div><div class='del'>-	if (intr_fh &amp; BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0)</div><div class='add'>+	if (intr_fh &amp; BTINTEL_PCIE_MSIX_FH_INT_CAUSES_0) {</div><div class='ctx'> 		btintel_pcie_msix_tx_handle(data);</div><div class='add'>+		if (!btintel_pcie_is_rxq_empty(data))</div><div class='add'>+			btintel_pcie_msix_rx_handle(data);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* For RX */</div><div class='del'>-	if (intr_fh &amp; BTINTEL_PCIE_MSIX_FH_INT_CAUSES_1)</div><div class='add'>+	if (intr_fh &amp; BTINTEL_PCIE_MSIX_FH_INT_CAUSES_1) {</div><div class='ctx'> 		btintel_pcie_msix_rx_handle(data);</div><div class='add'>+		if (!btintel_pcie_is_txackq_empty(data))</div><div class='add'>+			btintel_pcie_msix_tx_handle(data);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Before sending the interrupt the HW disables it to prevent a nested</div><div class='hunk'>@@ -2023,6 +2146,7 @@ static int btintel_pcie_setup(struct hci_dev *hdev)</div><div class='ctx'> 	while ((err = btintel_pcie_setup_internal(hdev)) &amp;&amp; fw_dl_retry++ &lt; 1) {</div><div class='ctx'> 		bt_dev_err(hdev, "Firmware download retry count: %d",</div><div class='ctx'> 			   fw_dl_retry);</div><div class='add'>+		btintel_pcie_dump_debug_registers(hdev);</div><div class='ctx'> 		err = btintel_pcie_reset_bt(data);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			bt_dev_err(hdev, "Failed to do shr reset: %d", err);</div><div class='head'>diff --git a/drivers/bluetooth/btintel_pcie.h b/drivers/bluetooth/btintel_pcie.h<br/>index 873178019cad..21b964b15c1c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel_pcie.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btintel_pcie.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btintel_pcie.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btintel_pcie.h</a></div><div class='hunk'>@@ -12,10 +12,17 @@</div><div class='ctx'> #define BTINTEL_PCIE_CSR_HW_REV_REG		(BTINTEL_PCIE_CSR_BASE + 0x028)</div><div class='ctx'> #define BTINTEL_PCIE_CSR_RF_ID_REG		(BTINTEL_PCIE_CSR_BASE + 0x09C)</div><div class='ctx'> #define BTINTEL_PCIE_CSR_BOOT_STAGE_REG		(BTINTEL_PCIE_CSR_BASE + 0x108)</div><div class='add'>+#define BTINTEL_PCIE_CSR_IPC_CONTROL_REG	(BTINTEL_PCIE_CSR_BASE + 0x10C)</div><div class='add'>+#define BTINTEL_PCIE_CSR_IPC_STATUS_REG		(BTINTEL_PCIE_CSR_BASE + 0x110)</div><div class='ctx'> #define BTINTEL_PCIE_CSR_IPC_SLEEP_CTL_REG	(BTINTEL_PCIE_CSR_BASE + 0x114)</div><div class='ctx'> #define BTINTEL_PCIE_CSR_CI_ADDR_LSB_REG	(BTINTEL_PCIE_CSR_BASE + 0x118)</div><div class='ctx'> #define BTINTEL_PCIE_CSR_CI_ADDR_MSB_REG	(BTINTEL_PCIE_CSR_BASE + 0x11C)</div><div class='ctx'> #define BTINTEL_PCIE_CSR_IMG_RESPONSE_REG	(BTINTEL_PCIE_CSR_BASE + 0x12C)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MBOX_1_REG		(BTINTEL_PCIE_CSR_BASE + 0x170)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MBOX_2_REG		(BTINTEL_PCIE_CSR_BASE + 0x174)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MBOX_3_REG		(BTINTEL_PCIE_CSR_BASE + 0x178)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MBOX_4_REG		(BTINTEL_PCIE_CSR_BASE + 0x17C)</div><div class='add'>+#define BTINTEL_PCIE_CSR_MBOX_STATUS_REG	(BTINTEL_PCIE_CSR_BASE + 0x180)</div><div class='ctx'> #define BTINTEL_PCIE_PRPH_DEV_ADDR_REG		(BTINTEL_PCIE_CSR_BASE + 0x440)</div><div class='ctx'> #define BTINTEL_PCIE_PRPH_DEV_RD_REG		(BTINTEL_PCIE_CSR_BASE + 0x458)</div><div class='ctx'> #define BTINTEL_PCIE_CSR_HBUS_TARG_WRPTR	(BTINTEL_PCIE_CSR_BASE + 0x460)</div><div class='hunk'>@@ -41,6 +48,9 @@</div><div class='ctx'> #define BTINTEL_PCIE_CSR_BOOT_STAGE_OPFW		(BIT(2))</div><div class='ctx'> #define BTINTEL_PCIE_CSR_BOOT_STAGE_ROM_LOCKDOWN	(BIT(10))</div><div class='ctx'> #define BTINTEL_PCIE_CSR_BOOT_STAGE_IML_LOCKDOWN	(BIT(11))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_DEVICE_ERR		(BIT(12))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_ABORT_HANDLER	(BIT(13))</div><div class='add'>+#define BTINTEL_PCIE_CSR_BOOT_STAGE_DEVICE_HALTED	(BIT(14))</div><div class='ctx'> #define BTINTEL_PCIE_CSR_BOOT_STAGE_MAC_ACCESS_ON	(BIT(16))</div><div class='ctx'> #define BTINTEL_PCIE_CSR_BOOT_STAGE_ALIVE		(BIT(23))</div><div class='ctx'> #define BTINTEL_PCIE_CSR_BOOT_STAGE_D3_STATE_READY	(BIT(24))</div><div class='hunk'>@@ -89,6 +99,7 @@ enum msix_fh_int_causes {</div><div class='ctx'> /* Causes for the HW register interrupts */</div><div class='ctx'> enum msix_hw_int_causes {</div><div class='ctx'> 	BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP0	= BIT(0),	/* cause 32 */</div><div class='add'>+	BTINTEL_PCIE_MSIX_HW_INT_CAUSES_GP1	= BIT(1),	/* cause 33 */</div><div class='ctx'> 	BTINTEL_PCIE_MSIX_HW_INT_CAUSES_HWEXP	= BIT(3),	/* cause 35 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -121,6 +132,14 @@ enum btintel_pcie_tlv_type {</div><div class='ctx'> 	BTINTEL_FW_BUILD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* causes for the MBOX interrupts */</div><div class='add'>+enum msix_mbox_int_causes {</div><div class='add'>+	BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX1 = BIT(0), /* cause MBOX1 */</div><div class='add'>+	BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX2 = BIT(1), /* cause MBOX2 */</div><div class='add'>+	BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX3 = BIT(2), /* cause MBOX3 */</div><div class='add'>+	BTINTEL_PCIE_CSR_MBOX_STATUS_MBOX4 = BIT(3), /* cause MBOX4 */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define BTINTEL_PCIE_MSIX_NON_AUTO_CLEAR_CAUSE	BIT(7)</div><div class='ctx'> </div><div class='ctx'> /* Minimum and Maximum number of MSI-X Vector</div><div class='head'>diff --git a/drivers/bluetooth/btmrvl_sdio.c b/drivers/bluetooth/btmrvl_sdio.c<br/>index 07cd308f7abf..93932a0d8625 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmrvl_sdio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btmrvl_sdio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmrvl_sdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btmrvl_sdio.c</a></div><div class='hunk'>@@ -100,7 +100,9 @@ static int btmrvl_sdio_probe_of(struct device *dev,</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Configure wakeup (enabled by default) */</div><div class='del'>-			device_init_wakeup(dev, true);</div><div class='add'>+			ret = devm_device_init_wakeup(dev);</div><div class='add'>+			if (ret)</div><div class='add'>+				return dev_err_probe(dev, ret, "Failed to init wakeup\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/bluetooth/btmtksdio.c b/drivers/bluetooth/btmtksdio.c<br/>index edd5eead1e93..c16a3518b8ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmtksdio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btmtksdio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btmtksdio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btmtksdio.c</a></div><div class='hunk'>@@ -723,6 +723,10 @@ static int btmtksdio_close(struct hci_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct btmtksdio_dev *bdev = hci_get_drvdata(hdev);</div><div class='ctx'> </div><div class='add'>+	/* Skip btmtksdio_close if BTMTKSDIO_FUNC_ENABLED isn't set */</div><div class='add'>+	if (!test_bit(BTMTKSDIO_FUNC_ENABLED, &amp;bdev-&gt;tx_state))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	sdio_claim_host(bdev-&gt;func);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupt */</div><div class='hunk'>@@ -1410,7 +1414,7 @@ static int btmtksdio_probe(struct sdio_func *func,</div><div class='ctx'> 	 */</div><div class='ctx'> 	pm_runtime_put_noidle(bdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	err = device_init_wakeup(bdev-&gt;dev, true);</div><div class='add'>+	err = devm_device_init_wakeup(bdev-&gt;dev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		bt_dev_err(hdev, "failed to initialize device wakeup");</div><div class='ctx'> </div><div class='hunk'>@@ -1443,11 +1447,15 @@ static void btmtksdio_remove(struct sdio_func *func)</div><div class='ctx'> 	if (!bdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	hdev = bdev-&gt;hdev;</div><div class='add'>+</div><div class='add'>+	/* Make sure to call btmtksdio_close before removing sdio card */</div><div class='add'>+	if (test_bit(BTMTKSDIO_FUNC_ENABLED, &amp;bdev-&gt;tx_state))</div><div class='add'>+		btmtksdio_close(hdev);</div><div class='add'>+</div><div class='ctx'> 	/* Be consistent the state in btmtksdio_probe */</div><div class='ctx'> 	pm_runtime_get_noresume(bdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	hdev = bdev-&gt;hdev;</div><div class='del'>-</div><div class='ctx'> 	sdio_set_drvdata(func, NULL);</div><div class='ctx'> 	hci_unregister_dev(hdev);</div><div class='ctx'> 	hci_free_dev(hdev);</div><div class='head'>diff --git a/drivers/bluetooth/btnxpuart.c b/drivers/bluetooth/btnxpuart.c<br/>index 5091dea762a0..b34623a69b8a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btnxpuart.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btnxpuart.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btnxpuart.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btnxpuart.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/string_helpers.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/bluetooth/bluetooth.h&gt;</div><div class='ctx'> #include &lt;net/bluetooth/hci_core.h&gt;</div><div class='hunk'>@@ -143,7 +144,9 @@ struct ps_data {</div><div class='ctx'> 	bool  driver_sent_cmd;</div><div class='ctx'> 	u16   h2c_ps_interval;</div><div class='ctx'> 	u16   c2h_ps_interval;</div><div class='add'>+	bool  wakeup_source;</div><div class='ctx'> 	struct gpio_desc *h2c_ps_gpio;</div><div class='add'>+	s32 irq_handler;</div><div class='ctx'> 	struct hci_dev *hdev;</div><div class='ctx'> 	struct work_struct work;</div><div class='ctx'> 	struct timer_list ps_timer;</div><div class='hunk'>@@ -476,12 +479,21 @@ static void ps_timeout_func(struct timer_list *t)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static irqreturn_t ps_host_wakeup_irq_handler(int irq, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct btnxpuart_dev *nxpdev = (struct btnxpuart_dev *)priv;</div><div class='add'>+</div><div class='add'>+	bt_dev_dbg(nxpdev-&gt;hdev, "Host wakeup interrupt");</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='ctx'> static int ps_setup(struct hci_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev);</div><div class='ctx'> 	struct serdev_device *serdev = nxpdev-&gt;serdev;</div><div class='ctx'> 	struct ps_data *psdata = &amp;nxpdev-&gt;psdata;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='add'>+	/* Out-Of-Band Device Wakeup */</div><div class='ctx'> 	psdata-&gt;h2c_ps_gpio = devm_gpiod_get_optional(&amp;serdev-&gt;dev, "device-wakeup",</div><div class='ctx'> 						      GPIOD_OUT_LOW);</div><div class='ctx'> 	if (IS_ERR(psdata-&gt;h2c_ps_gpio)) {</div><div class='hunk'>@@ -493,11 +505,37 @@ static int ps_setup(struct hci_dev *hdev)</div><div class='ctx'> 	if (device_property_read_u8(&amp;serdev-&gt;dev, "nxp,wakein-pin", &amp;psdata-&gt;h2c_wakeup_gpio)) {</div><div class='ctx'> 		psdata-&gt;h2c_wakeup_gpio = 0xff; /* 0xff: use default pin/gpio */</div><div class='ctx'> 	} else if (!psdata-&gt;h2c_ps_gpio) {</div><div class='del'>-		bt_dev_warn(hdev, "nxp,wakein-pin property without device-wakeup GPIO");</div><div class='add'>+		bt_dev_warn(hdev, "nxp,wakein-pin property without device-wakeup-gpios");</div><div class='ctx'> 		psdata-&gt;h2c_wakeup_gpio = 0xff;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	device_property_read_u8(&amp;serdev-&gt;dev, "nxp,wakeout-pin", &amp;psdata-&gt;c2h_wakeup_gpio);</div><div class='add'>+	/* Out-Of-Band Host Wakeup */</div><div class='add'>+	if (of_property_read_bool(serdev-&gt;dev.of_node, "wakeup-source")) {</div><div class='add'>+		psdata-&gt;irq_handler = of_irq_get_byname(serdev-&gt;dev.of_node, "wakeup");</div><div class='add'>+		bt_dev_info(nxpdev-&gt;hdev, "irq_handler: %d", psdata-&gt;irq_handler);</div><div class='add'>+		if (psdata-&gt;irq_handler &gt; 0)</div><div class='add'>+			psdata-&gt;wakeup_source = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_property_read_u8(&amp;serdev-&gt;dev, "nxp,wakeout-pin", &amp;psdata-&gt;c2h_wakeup_gpio)) {</div><div class='add'>+		psdata-&gt;c2h_wakeup_gpio = 0xff;</div><div class='add'>+		if (psdata-&gt;wakeup_source) {</div><div class='add'>+			bt_dev_warn(hdev, "host wakeup interrupt without nxp,wakeout-pin");</div><div class='add'>+			psdata-&gt;wakeup_source = false;</div><div class='add'>+		}</div><div class='add'>+	} else if (!psdata-&gt;wakeup_source) {</div><div class='add'>+		bt_dev_warn(hdev, "nxp,wakeout-pin property without host wakeup interrupt");</div><div class='add'>+		psdata-&gt;c2h_wakeup_gpio = 0xff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (psdata-&gt;wakeup_source) {</div><div class='add'>+		ret = devm_request_irq(&amp;serdev-&gt;dev, psdata-&gt;irq_handler,</div><div class='add'>+					ps_host_wakeup_irq_handler,</div><div class='add'>+					IRQF_ONESHOT | IRQF_TRIGGER_FALLING,</div><div class='add'>+					dev_name(&amp;serdev-&gt;dev), nxpdev);</div><div class='add'>+		disable_irq(psdata-&gt;irq_handler);</div><div class='add'>+		device_init_wakeup(&amp;serdev-&gt;dev, true);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	psdata-&gt;hdev = hdev;</div><div class='ctx'> 	INIT_WORK(&amp;psdata-&gt;work, ps_work_func);</div><div class='hunk'>@@ -637,12 +675,10 @@ static void ps_init(struct hci_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 	psdata-&gt;ps_state = PS_STATE_AWAKE;</div><div class='ctx'> </div><div class='del'>-	if (psdata-&gt;c2h_wakeup_gpio) {</div><div class='add'>+	if (psdata-&gt;c2h_wakeup_gpio != 0xff)</div><div class='ctx'> 		psdata-&gt;c2h_wakeupmode = BT_HOST_WAKEUP_METHOD_GPIO;</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		psdata-&gt;c2h_wakeupmode = BT_HOST_WAKEUP_METHOD_NONE;</div><div class='del'>-		psdata-&gt;c2h_wakeup_gpio = 0xff;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	psdata-&gt;cur_h2c_wakeupmode = WAKEUP_METHOD_INVALID;</div><div class='ctx'> 	if (psdata-&gt;h2c_ps_gpio)</div><div class='hunk'>@@ -1286,7 +1322,9 @@ static void nxp_coredump(struct hci_dev *hdev)</div><div class='ctx'> 	u8 pcmd = 2;</div><div class='ctx'> </div><div class='ctx'> 	skb = nxp_drv_send_cmd(hdev, HCI_NXP_TRIGGER_DUMP, 1, &amp;pcmd);</div><div class='del'>-	if (!IS_ERR(skb))</div><div class='add'>+	if (IS_ERR(skb))</div><div class='add'>+		bt_dev_err(hdev, "Failed to trigger FW Dump. (%ld)", PTR_ERR(skb));</div><div class='add'>+	else</div><div class='ctx'> 		kfree_skb(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1445,9 +1483,6 @@ static int nxp_shutdown(struct hci_dev *hdev)</div><div class='ctx'> 		/* HCI_NXP_IND_RESET command may not returns any response */</div><div class='ctx'> 		if (!IS_ERR(skb))</div><div class='ctx'> 			kfree_skb(skb);</div><div class='del'>-	} else if (nxpdev-&gt;current_baudrate != nxpdev-&gt;fw_init_baudrate) {</div><div class='del'>-		nxpdev-&gt;new_baudrate = nxpdev-&gt;fw_init_baudrate;</div><div class='del'>-		nxp_set_baudrate_cmd(hdev, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1799,13 +1834,15 @@ static void nxp_serdev_remove(struct serdev_device *serdev)</div><div class='ctx'> 		clear_bit(BTNXPUART_FW_DOWNLOADING, &amp;nxpdev-&gt;tx_state);</div><div class='ctx'> 		wake_up_interruptible(&amp;nxpdev-&gt;check_boot_sign_wait_q);</div><div class='ctx'> 		wake_up_interruptible(&amp;nxpdev-&gt;fw_dnld_done_wait_q);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (test_bit(HCI_RUNNING, &amp;hdev-&gt;flags)) {</div><div class='del'>-		/* Ensure shutdown callback is executed before unregistering, so</div><div class='del'>-		 * that baudrate is reset to initial value.</div><div class='add'>+	} else {</div><div class='add'>+		/* Restore FW baudrate to fw_init_baudrate if changed.</div><div class='add'>+		 * This will ensure FW baudrate is in sync with</div><div class='add'>+		 * driver baudrate in case this driver is re-inserted.</div><div class='ctx'> 		 */</div><div class='del'>-		nxp_shutdown(hdev);</div><div class='add'>+		if (nxpdev-&gt;current_baudrate != nxpdev-&gt;fw_init_baudrate) {</div><div class='add'>+			nxpdev-&gt;new_baudrate = nxpdev-&gt;fw_init_baudrate;</div><div class='add'>+			nxp_set_baudrate_cmd(hdev, NULL);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ps_cleanup(nxpdev);</div><div class='hunk'>@@ -1820,6 +1857,11 @@ static int nxp_serdev_suspend(struct device *dev)</div><div class='ctx'> 	struct ps_data *psdata = &amp;nxpdev-&gt;psdata;</div><div class='ctx'> </div><div class='ctx'> 	ps_control(psdata-&gt;hdev, PS_STATE_SLEEP);</div><div class='add'>+</div><div class='add'>+	if (psdata-&gt;wakeup_source) {</div><div class='add'>+		enable_irq_wake(psdata-&gt;irq_handler);</div><div class='add'>+		enable_irq(psdata-&gt;irq_handler);</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1828,6 +1870,11 @@ static int nxp_serdev_resume(struct device *dev)</div><div class='ctx'> 	struct btnxpuart_dev *nxpdev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct ps_data *psdata = &amp;nxpdev-&gt;psdata;</div><div class='ctx'> </div><div class='add'>+	if (psdata-&gt;wakeup_source) {</div><div class='add'>+		disable_irq(psdata-&gt;irq_handler);</div><div class='add'>+		disable_irq_wake(psdata-&gt;irq_handler);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ps_control(psdata-&gt;hdev, PS_STATE_AWAKE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/bluetooth/btqca.c b/drivers/bluetooth/btqca.c<br/>index 3d6778b95e00..edefb9dc76aa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqca.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btqca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btqca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btqca.c</a></div><div class='hunk'>@@ -889,7 +889,7 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,</div><div class='ctx'> 			if (le32_to_cpu(ver.soc_id) == QCA_WCN3950_SOC_ID_T)</div><div class='ctx'> 				variant = "t";</div><div class='ctx'> 			else if (le32_to_cpu(ver.soc_id) == QCA_WCN3950_SOC_ID_S)</div><div class='del'>-				variant = "u";</div><div class='add'>+				variant = "s";</div><div class='ctx'> </div><div class='ctx'> 			snprintf(config.fwname, sizeof(config.fwname),</div><div class='ctx'> 				 "qca/cmnv%02x%s.bin", rom_ver, variant);</div><div class='head'>diff --git a/drivers/bluetooth/btrtl.c b/drivers/bluetooth/btrtl.c<br/>index d3eba0d4a57d..7838c89e529e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btrtl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btrtl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btrtl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btrtl.c</a></div><div class='hunk'>@@ -1215,6 +1215,8 @@ next:</div><div class='ctx'> 			rtl_dev_err(hdev, "mandatory config file %s not found",</div><div class='ctx'> 				    btrtl_dev-&gt;ic_info-&gt;cfg_name);</div><div class='ctx'> 			ret = btrtl_dev-&gt;cfg_len;</div><div class='add'>+			if (!ret)</div><div class='add'>+				ret = -EINVAL;</div><div class='ctx'> 			goto err_free;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c<br/>index 5012b5ff92c8..9ab661d2d1e6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/btusb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/btusb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/btusb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/btusb.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/bluetooth/bluetooth.h&gt;</div><div class='ctx'> #include &lt;net/bluetooth/hci_core.h&gt;</div><div class='add'>+#include &lt;net/bluetooth/hci_drv.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "btintel.h"</div><div class='ctx'> #include "btbcm.h"</div><div class='hunk'>@@ -34,7 +35,6 @@ static bool force_scofix;</div><div class='ctx'> static bool enable_autosuspend = IS_ENABLED(CONFIG_BT_HCIBTUSB_AUTOSUSPEND);</div><div class='ctx'> static bool enable_poll_sync = IS_ENABLED(CONFIG_BT_HCIBTUSB_POLL_SYNC);</div><div class='ctx'> static bool reset = true;</div><div class='del'>-static bool auto_isoc_alt = IS_ENABLED(CONFIG_BT_HCIBTUSB_AUTO_ISOC_ALT);</div><div class='ctx'> </div><div class='ctx'> static struct usb_driver btusb_driver;</div><div class='ctx'> </div><div class='hunk'>@@ -513,6 +513,7 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> </div><div class='ctx'> 	/* Realtek 8851BE Bluetooth devices */</div><div class='add'>+	{ USB_DEVICE(0x0bda, 0xb850), .driver_info = BTUSB_REALTEK },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3600), .driver_info = BTUSB_REALTEK },</div><div class='ctx'> </div><div class='ctx'> 	/* Realtek 8852AE Bluetooth devices */</div><div class='hunk'>@@ -678,6 +679,8 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3568), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3584), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3605), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3607), .driver_info = BTUSB_MEDIATEK |</div><div class='hunk'>@@ -716,8 +719,12 @@ static const struct usb_device_id quirks_table[] = {</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3608), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3613), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> 	{ USB_DEVICE(0x13d3, 0x3628), .driver_info = BTUSB_MEDIATEK |</div><div class='ctx'> 						     BTUSB_WIDEBAND_SPEECH },</div><div class='add'>+	{ USB_DEVICE(0x13d3, 0x3630), .driver_info = BTUSB_MEDIATEK |</div><div class='add'>+						     BTUSB_WIDEBAND_SPEECH },</div><div class='ctx'> </div><div class='ctx'> 	/* Additional Realtek 8723AE Bluetooth devices */</div><div class='ctx'> 	{ USB_DEVICE(0x0930, 0x021d), .driver_info = BTUSB_REALTEK },</div><div class='hunk'>@@ -1118,42 +1125,6 @@ static inline void btusb_free_frags(struct btusb_data *data)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;data-&gt;rxlock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void btusb_sco_connected(struct btusb_data *data, struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	struct hci_event_hdr *hdr = (void *) skb-&gt;data;</div><div class='del'>-	struct hci_ev_sync_conn_complete *ev =</div><div class='del'>-		(void *) skb-&gt;data + sizeof(*hdr);</div><div class='del'>-	struct hci_dev *hdev = data-&gt;hdev;</div><div class='del'>-	unsigned int notify_air_mode;</div><div class='del'>-</div><div class='del'>-	if (hci_skb_pkt_type(skb) != HCI_EVENT_PKT)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (skb-&gt;len &lt; sizeof(*hdr) || hdr-&gt;evt != HCI_EV_SYNC_CONN_COMPLETE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (skb-&gt;len != sizeof(*hdr) + sizeof(*ev) || ev-&gt;status)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	switch (ev-&gt;air_mode) {</div><div class='del'>-	case BT_CODEC_CVSD:</div><div class='del'>-		notify_air_mode = HCI_NOTIFY_ENABLE_SCO_CVSD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case BT_CODEC_TRANSPARENT:</div><div class='del'>-		notify_air_mode = HCI_NOTIFY_ENABLE_SCO_TRANSP;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bt_dev_info(hdev, "enabling SCO with air mode %u", ev-&gt;air_mode);</div><div class='del'>-	data-&gt;sco_num = 1;</div><div class='del'>-	data-&gt;air_mode = notify_air_mode;</div><div class='del'>-	schedule_work(&amp;data-&gt;work);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int btusb_recv_event(struct btusb_data *data, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	if (data-&gt;intr_interval) {</div><div class='hunk'>@@ -1161,10 +1132,6 @@ static int btusb_recv_event(struct btusb_data *data, struct sk_buff *skb)</div><div class='ctx'> 		schedule_delayed_work(&amp;data-&gt;rx_work, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Configure altsetting for HCI_USER_CHANNEL on SCO connected */</div><div class='del'>-	if (auto_isoc_alt &amp;&amp; hci_dev_test_flag(data-&gt;hdev, HCI_USER_CHANNEL))</div><div class='del'>-		btusb_sco_connected(data, skb);</div><div class='del'>-</div><div class='ctx'> 	return data-&gt;recv_event(data-&gt;hdev, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3010,55 +2977,27 @@ static void btusb_coredump_qca(struct hci_dev *hdev)</div><div class='ctx'> 		bt_dev_err(hdev, "%s: triggle crash failed (%d)", __func__, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * ==0: not a dump pkt.</div><div class='del'>- * &lt; 0: fails to handle a dump pkt</div><div class='del'>- * &gt; 0: otherwise.</div><div class='del'>- */</div><div class='add'>+/* Return: 0 on success, negative errno on failure. */</div><div class='ctx'> static int handle_dump_pkt_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	int ret = 1;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	unsigned int skip = 0;</div><div class='ctx'> 	u8 pkt_type;</div><div class='del'>-	u8 *sk_ptr;</div><div class='del'>-	unsigned int sk_len;</div><div class='ctx'> 	u16 seqno;</div><div class='ctx'> 	u32 dump_size;</div><div class='ctx'> </div><div class='del'>-	struct hci_event_hdr *event_hdr;</div><div class='del'>-	struct hci_acl_hdr *acl_hdr;</div><div class='ctx'> 	struct qca_dump_hdr *dump_hdr;</div><div class='ctx'> 	struct btusb_data *btdata = hci_get_drvdata(hdev);</div><div class='ctx'> 	struct usb_device *udev = btdata-&gt;udev;</div><div class='ctx'> </div><div class='ctx'> 	pkt_type = hci_skb_pkt_type(skb);</div><div class='del'>-	sk_ptr = skb-&gt;data;</div><div class='del'>-	sk_len = skb-&gt;len;</div><div class='add'>+	skip = sizeof(struct hci_event_hdr);</div><div class='add'>+	if (pkt_type == HCI_ACLDATA_PKT)</div><div class='add'>+		skip += sizeof(struct hci_acl_hdr);</div><div class='ctx'> </div><div class='del'>-	if (pkt_type == HCI_ACLDATA_PKT) {</div><div class='del'>-		acl_hdr = hci_acl_hdr(skb);</div><div class='del'>-		if (le16_to_cpu(acl_hdr-&gt;handle) != QCA_MEMDUMP_ACL_HANDLE)</div><div class='del'>-			return 0;</div><div class='del'>-		sk_ptr += HCI_ACL_HDR_SIZE;</div><div class='del'>-		sk_len -= HCI_ACL_HDR_SIZE;</div><div class='del'>-		event_hdr = (struct hci_event_hdr *)sk_ptr;</div><div class='del'>-	} else {</div><div class='del'>-		event_hdr = hci_event_hdr(skb);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((event_hdr-&gt;evt != HCI_VENDOR_PKT)</div><div class='del'>-		|| (event_hdr-&gt;plen != (sk_len - HCI_EVENT_HDR_SIZE)))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	sk_ptr += HCI_EVENT_HDR_SIZE;</div><div class='del'>-	sk_len -= HCI_EVENT_HDR_SIZE;</div><div class='del'>-</div><div class='del'>-	dump_hdr = (struct qca_dump_hdr *)sk_ptr;</div><div class='del'>-	if ((sk_len &lt; offsetof(struct qca_dump_hdr, data))</div><div class='del'>-		|| (dump_hdr-&gt;vse_class != QCA_MEMDUMP_VSE_CLASS)</div><div class='del'>-	    || (dump_hdr-&gt;msg_type != QCA_MEMDUMP_MSG_TYPE))</div><div class='del'>-		return 0;</div><div class='add'>+	skb_pull(skb, skip);</div><div class='add'>+	dump_hdr = (struct qca_dump_hdr *)skb-&gt;data;</div><div class='ctx'> </div><div class='del'>-	/*it is dump pkt now*/</div><div class='ctx'> 	seqno = le16_to_cpu(dump_hdr-&gt;seqno);</div><div class='ctx'> 	if (seqno == 0) {</div><div class='ctx'> 		set_bit(BTUSB_HW_SSR_ACTIVE, &amp;btdata-&gt;flags);</div><div class='hunk'>@@ -3078,16 +3017,15 @@ static int handle_dump_pkt_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 		btdata-&gt;qca_dump.ram_dump_size = dump_size;</div><div class='ctx'> 		btdata-&gt;qca_dump.ram_dump_seqno = 0;</div><div class='del'>-		sk_ptr += offsetof(struct qca_dump_hdr, data0);</div><div class='del'>-		sk_len -= offsetof(struct qca_dump_hdr, data0);</div><div class='add'>+</div><div class='add'>+		skb_pull(skb, offsetof(struct qca_dump_hdr, data0));</div><div class='ctx'> </div><div class='ctx'> 		usb_disable_autosuspend(udev);</div><div class='ctx'> 		bt_dev_info(hdev, "%s memdump size(%u)\n",</div><div class='ctx'> 			    (pkt_type == HCI_ACLDATA_PKT) ? "ACL" : "event",</div><div class='ctx'> 			    dump_size);</div><div class='ctx'> 	} else {</div><div class='del'>-		sk_ptr += offsetof(struct qca_dump_hdr, data);</div><div class='del'>-		sk_len -= offsetof(struct qca_dump_hdr, data);</div><div class='add'>+		skb_pull(skb, offsetof(struct qca_dump_hdr, data));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!btdata-&gt;qca_dump.ram_dump_size) {</div><div class='hunk'>@@ -3107,7 +3045,6 @@ static int handle_dump_pkt_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	skb_pull(skb, skb-&gt;len - sk_len);</div><div class='ctx'> 	hci_devcd_append(hdev, skb);</div><div class='ctx'> 	btdata-&gt;qca_dump.ram_dump_seqno++;</div><div class='ctx'> 	if (seqno == QCA_LAST_SEQUENCE_NUM) {</div><div class='hunk'>@@ -3132,17 +3069,74 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Return: true if the ACL packet is a dump packet, false otherwise. */</div><div class='add'>+static bool acl_pkt_is_dump_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct hci_event_hdr *event_hdr;</div><div class='add'>+	struct hci_acl_hdr *acl_hdr;</div><div class='add'>+	struct qca_dump_hdr *dump_hdr;</div><div class='add'>+	struct sk_buff *clone = skb_clone(skb, GFP_ATOMIC);</div><div class='add'>+	bool is_dump = false;</div><div class='add'>+</div><div class='add'>+	if (!clone)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	acl_hdr = skb_pull_data(clone, sizeof(*acl_hdr));</div><div class='add'>+	if (!acl_hdr || (le16_to_cpu(acl_hdr-&gt;handle) != QCA_MEMDUMP_ACL_HANDLE))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	event_hdr = skb_pull_data(clone, sizeof(*event_hdr));</div><div class='add'>+	if (!event_hdr || (event_hdr-&gt;evt != HCI_VENDOR_PKT))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dump_hdr = skb_pull_data(clone, sizeof(*dump_hdr));</div><div class='add'>+	if (!dump_hdr || (dump_hdr-&gt;vse_class != QCA_MEMDUMP_VSE_CLASS) ||</div><div class='add'>+	   (dump_hdr-&gt;msg_type != QCA_MEMDUMP_MSG_TYPE))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	is_dump = true;</div><div class='add'>+out:</div><div class='add'>+	consume_skb(clone);</div><div class='add'>+	return is_dump;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return: true if the event packet is a dump packet, false otherwise. */</div><div class='add'>+static bool evt_pkt_is_dump_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct hci_event_hdr *event_hdr;</div><div class='add'>+	struct qca_dump_hdr *dump_hdr;</div><div class='add'>+	struct sk_buff *clone = skb_clone(skb, GFP_ATOMIC);</div><div class='add'>+	bool is_dump = false;</div><div class='add'>+</div><div class='add'>+	if (!clone)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	event_hdr = skb_pull_data(clone, sizeof(*event_hdr));</div><div class='add'>+	if (!event_hdr || (event_hdr-&gt;evt != HCI_VENDOR_PKT))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dump_hdr = skb_pull_data(clone, sizeof(*dump_hdr));</div><div class='add'>+	if (!dump_hdr || (dump_hdr-&gt;vse_class != QCA_MEMDUMP_VSE_CLASS) ||</div><div class='add'>+	   (dump_hdr-&gt;msg_type != QCA_MEMDUMP_MSG_TYPE))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	is_dump = true;</div><div class='add'>+out:</div><div class='add'>+	consume_skb(clone);</div><div class='add'>+	return is_dump;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int btusb_recv_acl_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	if (handle_dump_pkt_qca(hdev, skb))</div><div class='del'>-		return 0;</div><div class='add'>+	if (acl_pkt_is_dump_qca(hdev, skb))</div><div class='add'>+		return handle_dump_pkt_qca(hdev, skb);</div><div class='ctx'> 	return hci_recv_frame(hdev, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int btusb_recv_evt_qca(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	if (handle_dump_pkt_qca(hdev, skb))</div><div class='del'>-		return 0;</div><div class='add'>+	if (evt_pkt_is_dump_qca(hdev, skb))</div><div class='add'>+		return handle_dump_pkt_qca(hdev, skb);</div><div class='ctx'> 	return hci_recv_frame(hdev, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3726,31 +3720,133 @@ static const struct file_operations force_poll_sync_fops = {</div><div class='ctx'> 	.llseek		= default_llseek,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t isoc_alt_show(struct device *dev,</div><div class='del'>-			     struct device_attribute *attr,</div><div class='del'>-			     char *buf)</div><div class='add'>+#define BTUSB_HCI_DRV_OP_SUPPORTED_ALTSETTINGS \</div><div class='add'>+		hci_opcode_pack(HCI_DRV_OGF_DRIVER_SPECIFIC, 0x0000)</div><div class='add'>+#define BTUSB_HCI_DRV_SUPPORTED_ALTSETTINGS_SIZE	0</div><div class='add'>+struct btusb_hci_drv_rp_supported_altsettings {</div><div class='add'>+	__u8	num;</div><div class='add'>+	__u8	altsettings[];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define BTUSB_HCI_DRV_OP_SWITCH_ALTSETTING \</div><div class='add'>+		hci_opcode_pack(HCI_DRV_OGF_DRIVER_SPECIFIC, 0x0001)</div><div class='add'>+#define BTUSB_HCI_DRV_SWITCH_ALTSETTING_SIZE		1</div><div class='add'>+struct btusb_hci_drv_cmd_switch_altsetting {</div><div class='add'>+	__u8	altsetting;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+static const struct {</div><div class='add'>+	u16 opcode;</div><div class='add'>+	const char *desc;</div><div class='add'>+} btusb_hci_drv_supported_commands[] = {</div><div class='add'>+	/* Common commands */</div><div class='add'>+	{ HCI_DRV_OP_READ_INFO, "Read Info" },</div><div class='add'>+</div><div class='add'>+	/* Driver specific commands */</div><div class='add'>+	{ BTUSB_HCI_DRV_OP_SUPPORTED_ALTSETTINGS, "Supported Altsettings" },</div><div class='add'>+	{ BTUSB_HCI_DRV_OP_SWITCH_ALTSETTING,     "Switch Altsetting" },</div><div class='add'>+};</div><div class='add'>+static int btusb_hci_drv_read_info(struct hci_dev *hdev, void *data,</div><div class='add'>+				   u16 data_len)</div><div class='ctx'> {</div><div class='del'>-	struct btusb_data *data = dev_get_drvdata(dev);</div><div class='add'>+	struct hci_drv_rp_read_info *rp;</div><div class='add'>+	size_t rp_size;</div><div class='add'>+	int err, i;</div><div class='add'>+	u16 opcode, num_supported_commands =</div><div class='add'>+		ARRAY_SIZE(btusb_hci_drv_supported_commands);</div><div class='add'>+</div><div class='add'>+	rp_size = sizeof(*rp) + num_supported_commands * 2;</div><div class='add'>+</div><div class='add'>+	rp = kmalloc(rp_size, GFP_KERNEL);</div><div class='add'>+	if (!rp)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	return sysfs_emit(buf, "%d\n", data-&gt;isoc_altsetting);</div><div class='add'>+	strscpy_pad(rp-&gt;driver_name, btusb_driver.name);</div><div class='add'>+</div><div class='add'>+	rp-&gt;num_supported_commands = cpu_to_le16(num_supported_commands);</div><div class='add'>+	for (i = 0; i &lt; num_supported_commands; i++) {</div><div class='add'>+		opcode = btusb_hci_drv_supported_commands[i].opcode;</div><div class='add'>+		bt_dev_info(hdev,</div><div class='add'>+			    "Supported HCI Drv command (0x%02x|0x%04x): %s",</div><div class='add'>+			    hci_opcode_ogf(opcode),</div><div class='add'>+			    hci_opcode_ocf(opcode),</div><div class='add'>+			    btusb_hci_drv_supported_commands[i].desc);</div><div class='add'>+		rp-&gt;supported_commands[i] = cpu_to_le16(opcode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hci_drv_cmd_complete(hdev, HCI_DRV_OP_READ_INFO,</div><div class='add'>+				   HCI_DRV_STATUS_SUCCESS, rp, rp_size);</div><div class='add'>+</div><div class='add'>+	kfree(rp);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t isoc_alt_store(struct device *dev,</div><div class='del'>-			      struct device_attribute *attr,</div><div class='del'>-			      const char *buf, size_t count)</div><div class='add'>+static int btusb_hci_drv_supported_altsettings(struct hci_dev *hdev, void *data,</div><div class='add'>+					       u16 data_len)</div><div class='ctx'> {</div><div class='del'>-	struct btusb_data *data = dev_get_drvdata(dev);</div><div class='del'>-	int alt;</div><div class='del'>-	int ret;</div><div class='add'>+	struct btusb_data *drvdata = hci_get_drvdata(hdev);</div><div class='add'>+	struct btusb_hci_drv_rp_supported_altsettings *rp;</div><div class='add'>+	size_t rp_size;</div><div class='add'>+	int err;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	/* There are at most 7 alt (0 - 6) */</div><div class='add'>+	rp = kmalloc(sizeof(*rp) + 7, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	rp-&gt;num = 0;</div><div class='add'>+	if (!drvdata-&gt;isoc)</div><div class='add'>+		goto done;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= 6; i++) {</div><div class='add'>+		if (btusb_find_altsetting(drvdata, i))</div><div class='add'>+			rp-&gt;altsettings[rp-&gt;num++] = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	rp_size = sizeof(*rp) + rp-&gt;num;</div><div class='add'>+</div><div class='add'>+	err = hci_drv_cmd_complete(hdev, BTUSB_HCI_DRV_OP_SUPPORTED_ALTSETTINGS,</div><div class='add'>+				   HCI_DRV_STATUS_SUCCESS, rp, rp_size);</div><div class='add'>+	kfree(rp);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int btusb_hci_drv_switch_altsetting(struct hci_dev *hdev, void *data,</div><div class='add'>+					   u16 data_len)</div><div class='add'>+{</div><div class='add'>+	struct btusb_hci_drv_cmd_switch_altsetting *cmd = data;</div><div class='add'>+	u8 status;</div><div class='ctx'> </div><div class='del'>-	if (kstrtoint(buf, 10, &amp;alt))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (cmd-&gt;altsetting &gt; 6) {</div><div class='add'>+		status = HCI_DRV_STATUS_INVALID_PARAMETERS;</div><div class='add'>+	} else {</div><div class='add'>+		if (btusb_switch_alt_setting(hdev, cmd-&gt;altsetting))</div><div class='add'>+			status = HCI_DRV_STATUS_UNSPECIFIED_ERROR;</div><div class='add'>+		else</div><div class='add'>+			status = HCI_DRV_STATUS_SUCCESS;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = btusb_switch_alt_setting(data-&gt;hdev, alt);</div><div class='del'>-	return ret &lt; 0 ? ret : count;</div><div class='add'>+	return hci_drv_cmd_status(hdev, BTUSB_HCI_DRV_OP_SWITCH_ALTSETTING,</div><div class='add'>+				  status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR_RW(isoc_alt);</div><div class='add'>+static const struct hci_drv_handler btusb_hci_drv_common_handlers[] = {</div><div class='add'>+	{ btusb_hci_drv_read_info,	HCI_DRV_READ_INFO_SIZE },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hci_drv_handler btusb_hci_drv_specific_handlers[] = {</div><div class='add'>+	{ btusb_hci_drv_supported_altsettings,</div><div class='add'>+				BTUSB_HCI_DRV_SUPPORTED_ALTSETTINGS_SIZE },</div><div class='add'>+	{ btusb_hci_drv_switch_altsetting,</div><div class='add'>+				BTUSB_HCI_DRV_SWITCH_ALTSETTING_SIZE },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct hci_drv btusb_hci_drv = {</div><div class='add'>+	.common_handler_count	= ARRAY_SIZE(btusb_hci_drv_common_handlers),</div><div class='add'>+	.common_handlers	= btusb_hci_drv_common_handlers,</div><div class='add'>+	.specific_handler_count	= ARRAY_SIZE(btusb_hci_drv_specific_handlers),</div><div class='add'>+	.specific_handlers	= btusb_hci_drv_specific_handlers,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static int btusb_probe(struct usb_interface *intf,</div><div class='ctx'> 		       const struct usb_device_id *id)</div><div class='hunk'>@@ -3891,12 +3987,13 @@ static int btusb_probe(struct usb_interface *intf,</div><div class='ctx'> 		data-&gt;reset_gpio = reset_gpio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hdev-&gt;open   = btusb_open;</div><div class='del'>-	hdev-&gt;close  = btusb_close;</div><div class='del'>-	hdev-&gt;flush  = btusb_flush;</div><div class='del'>-	hdev-&gt;send   = btusb_send_frame;</div><div class='del'>-	hdev-&gt;notify = btusb_notify;</div><div class='del'>-	hdev-&gt;wakeup = btusb_wakeup;</div><div class='add'>+	hdev-&gt;open    = btusb_open;</div><div class='add'>+	hdev-&gt;close   = btusb_close;</div><div class='add'>+	hdev-&gt;flush   = btusb_flush;</div><div class='add'>+	hdev-&gt;send    = btusb_send_frame;</div><div class='add'>+	hdev-&gt;notify  = btusb_notify;</div><div class='add'>+	hdev-&gt;wakeup  = btusb_wakeup;</div><div class='add'>+	hdev-&gt;hci_drv = &amp;btusb_hci_drv;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> 	err = btusb_config_oob_wake(hdev);</div><div class='hunk'>@@ -4115,10 +4212,6 @@ static int btusb_probe(struct usb_interface *intf,</div><div class='ctx'> 						 data-&gt;isoc, data);</div><div class='ctx'> 		if (err &lt; 0)</div><div class='ctx'> 			goto out_free_dev;</div><div class='del'>-</div><div class='del'>-		err = device_create_file(&amp;intf-&gt;dev, &amp;dev_attr_isoc_alt);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out_free_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_BT_HCIBTUSB_BCM) &amp;&amp; data-&gt;diag) {</div><div class='hunk'>@@ -4165,10 +4258,8 @@ static void btusb_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	hdev = data-&gt;hdev;</div><div class='ctx'> 	usb_set_intfdata(data-&gt;intf, NULL);</div><div class='ctx'> </div><div class='del'>-	if (data-&gt;isoc) {</div><div class='del'>-		device_remove_file(&amp;intf-&gt;dev, &amp;dev_attr_isoc_alt);</div><div class='add'>+	if (data-&gt;isoc)</div><div class='ctx'> 		usb_set_intfdata(data-&gt;isoc, NULL);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (data-&gt;diag)</div><div class='ctx'> 		usb_set_intfdata(data-&gt;diag, NULL);</div><div class='head'>diff --git a/drivers/bluetooth/hci_aml.c b/drivers/bluetooth/hci_aml.c<br/>index dc9541e76d81..1394c575aa6d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_aml.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/hci_aml.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_aml.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/hci_aml.c</a></div><div class='hunk'>@@ -313,8 +313,7 @@ static int aml_download_firmware(struct hci_dev *hdev, const char *fw_name)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='del'>-	if (firmware)</div><div class='del'>-		release_firmware(firmware);</div><div class='add'>+	release_firmware(firmware);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c<br/>index a51935d37e5d..59f4d7bdffdc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_vhci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bluetooth/hci_vhci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bluetooth/hci_vhci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bluetooth/hci_vhci.c</a></div><div class='hunk'>@@ -289,18 +289,18 @@ static void vhci_coredump(struct hci_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> static void vhci_coredump_hdr(struct hci_dev *hdev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	char buf[80];</div><div class='add'>+	const char *buf;</div><div class='ctx'> </div><div class='del'>-	snprintf(buf, sizeof(buf), "Controller Name: vhci_ctrl\n");</div><div class='add'>+	buf = "Controller Name: vhci_ctrl\n";</div><div class='ctx'> 	skb_put_data(skb, buf, strlen(buf));</div><div class='ctx'> </div><div class='del'>-	snprintf(buf, sizeof(buf), "Firmware Version: vhci_fw\n");</div><div class='add'>+	buf = "Firmware Version: vhci_fw\n";</div><div class='ctx'> 	skb_put_data(skb, buf, strlen(buf));</div><div class='ctx'> </div><div class='del'>-	snprintf(buf, sizeof(buf), "Driver: vhci_drv\n");</div><div class='add'>+	buf = "Driver: vhci_drv\n";</div><div class='ctx'> 	skb_put_data(skb, buf, strlen(buf));</div><div class='ctx'> </div><div class='del'>-	snprintf(buf, sizeof(buf), "Vendor: vhci\n");</div><div class='add'>+	buf = "Vendor: vhci\n";</div><div class='ctx'> 	skb_put_data(skb, buf, strlen(buf));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/bus/moxtet.c b/drivers/bus/moxtet.c<br/>index 1e57ebfb7622..6c3e5c5dae10 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/bus/moxtet.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/bus/moxtet.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/bus/moxtet.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/bus/moxtet.c</a></div><div class='hunk'>@@ -737,9 +737,9 @@ static int moxtet_irq_setup(struct moxtet *moxtet)</div><div class='ctx'> {</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='del'>-	moxtet-&gt;irq.domain = irq_domain_add_simple(moxtet-&gt;dev-&gt;of_node,</div><div class='del'>-						   MOXTET_NIRQS, 0,</div><div class='del'>-						   &amp;moxtet_irq_domain, moxtet);</div><div class='add'>+	moxtet-&gt;irq.domain = irq_domain_create_simple(of_fwnode_handle(moxtet-&gt;dev-&gt;of_node),</div><div class='add'>+						      MOXTET_NIRQS, 0,</div><div class='add'>+						      &amp;moxtet_irq_domain, moxtet);</div><div class='ctx'> 	if (moxtet-&gt;irq.domain == NULL) {</div><div class='ctx'> 		dev_err(moxtet-&gt;dev, "Could not add IRQ domain\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c<br/>index b163e043c687..21a10552da61 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cdrom/cdrom.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cdrom/cdrom.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cdrom/cdrom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cdrom/cdrom.c</a></div><div class='hunk'>@@ -3677,8 +3677,7 @@ static void cdrom_sysctl_register(void)</div><div class='ctx'> </div><div class='ctx'> static void cdrom_sysctl_unregister(void)</div><div class='ctx'> {</div><div class='del'>-	if (cdrom_sysctl_header)</div><div class='del'>-		unregister_sysctl_table(cdrom_sysctl_header);</div><div class='add'>+	unregister_sysctl_table(cdrom_sysctl_header);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_SYSCTL */</div><div class='head'>diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c<br/>index 8e41731d3642..bf490967241a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/agp/amd64-agp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/agp/amd64-agp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/agp/amd64-agp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/agp/amd64-agp.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;linux/mmzone.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;		/* PAGE_SIZE */</div><div class='ctx'> #include &lt;asm/e820/api.h&gt;</div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='ctx'> #include &lt;asm/gart.h&gt;</div><div class='ctx'> #include "agp.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c<br/>index ef30445527a2..bcc26785175d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/agp/intel-gtt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/agp/intel-gtt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/agp/intel-gtt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/agp/intel-gtt.c</a></div><div class='hunk'>@@ -53,6 +53,7 @@ struct intel_gtt_driver {</div><div class='ctx'> 	 * of the mmio register file, that's done in the generic code. */</div><div class='ctx'> 	void (*cleanup)(void);</div><div class='ctx'> 	void (*write_entry)(dma_addr_t addr, unsigned int entry, unsigned int flags);</div><div class='add'>+	dma_addr_t (*read_entry)(unsigned int entry, bool *is_present, bool *is_local);</div><div class='ctx'> 	/* Flags is a more or less chipset specific opaque value.</div><div class='ctx'> 	 * For chipsets that need to support old ums (non-gem) code, this</div><div class='ctx'> 	 * needs to be identical to the various supported agp memory types! */</div><div class='hunk'>@@ -336,6 +337,19 @@ static void i810_write_entry(dma_addr_t addr, unsigned int entry,</div><div class='ctx'> 	writel_relaxed(addr | pte_flags, intel_private.gtt + entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static dma_addr_t i810_read_entry(unsigned int entry,</div><div class='add'>+				  bool *is_present, bool *is_local)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = readl(intel_private.gtt + entry);</div><div class='add'>+</div><div class='add'>+	*is_present = val &amp; I810_PTE_VALID;</div><div class='add'>+	*is_local = val &amp; I810_PTE_LOCAL;</div><div class='add'>+</div><div class='add'>+	return val &amp; ~0xfff;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static resource_size_t intel_gtt_stolen_size(void)</div><div class='ctx'> {</div><div class='ctx'> 	u16 gmch_ctrl;</div><div class='hunk'>@@ -741,6 +755,19 @@ static void i830_write_entry(dma_addr_t addr, unsigned int entry,</div><div class='ctx'> 	writel_relaxed(addr | pte_flags, intel_private.gtt + entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static dma_addr_t i830_read_entry(unsigned int entry,</div><div class='add'>+				  bool *is_present, bool *is_local)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = readl(intel_private.gtt + entry);</div><div class='add'>+</div><div class='add'>+	*is_present = val &amp; I810_PTE_VALID;</div><div class='add'>+	*is_local = false;</div><div class='add'>+</div><div class='add'>+	return val &amp; ~0xfff;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool intel_gmch_enable_gtt(void)</div><div class='ctx'> {</div><div class='ctx'> 	u8 __iomem *reg;</div><div class='hunk'>@@ -878,6 +905,13 @@ void intel_gmch_gtt_insert_sg_entries(struct sg_table *st,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(intel_gmch_gtt_insert_sg_entries);</div><div class='ctx'> </div><div class='add'>+dma_addr_t intel_gmch_gtt_read_entry(unsigned int pg,</div><div class='add'>+				     bool *is_present, bool *is_local)</div><div class='add'>+{</div><div class='add'>+	return intel_private.driver-&gt;read_entry(pg, is_present, is_local);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(intel_gmch_gtt_read_entry);</div><div class='add'>+</div><div class='ctx'> #if IS_ENABLED(CONFIG_AGP_INTEL)</div><div class='ctx'> static void intel_gmch_gtt_insert_pages(unsigned int first_entry,</div><div class='ctx'> 					unsigned int num_entries,</div><div class='hunk'>@@ -1126,6 +1160,19 @@ static void i965_write_entry(dma_addr_t addr,</div><div class='ctx'> 	writel_relaxed(addr | pte_flags, intel_private.gtt + entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static dma_addr_t i965_read_entry(unsigned int entry,</div><div class='add'>+				  bool *is_present, bool *is_local)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	val = readl(intel_private.gtt + entry);</div><div class='add'>+</div><div class='add'>+	*is_present = val &amp; I810_PTE_VALID;</div><div class='add'>+	*is_local = false;</div><div class='add'>+</div><div class='add'>+	return ((val &amp; 0xf0) &lt;&lt; 28) | (val &amp; ~0xfff);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int i9xx_setup(void)</div><div class='ctx'> {</div><div class='ctx'> 	phys_addr_t reg_addr;</div><div class='hunk'>@@ -1187,6 +1234,7 @@ static const struct intel_gtt_driver i81x_gtt_driver = {</div><div class='ctx'> 	.cleanup = i810_cleanup,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.write_entry = i810_write_entry,</div><div class='add'>+	.read_entry = i810_read_entry,</div><div class='ctx'> };</div><div class='ctx'> static const struct intel_gtt_driver i8xx_gtt_driver = {</div><div class='ctx'> 	.gen = 2,</div><div class='hunk'>@@ -1194,6 +1242,7 @@ static const struct intel_gtt_driver i8xx_gtt_driver = {</div><div class='ctx'> 	.setup = i830_setup,</div><div class='ctx'> 	.cleanup = i830_cleanup,</div><div class='ctx'> 	.write_entry = i830_write_entry,</div><div class='add'>+	.read_entry = i830_read_entry,</div><div class='ctx'> 	.dma_mask_size = 32,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.chipset_flush = i830_chipset_flush,</div><div class='hunk'>@@ -1205,6 +1254,7 @@ static const struct intel_gtt_driver i915_gtt_driver = {</div><div class='ctx'> 	.cleanup = i9xx_cleanup,</div><div class='ctx'> 	/* i945 is the last gpu to need phys mem (for overlay and cursors). */</div><div class='ctx'> 	.write_entry = i830_write_entry,</div><div class='add'>+	.read_entry = i830_read_entry,</div><div class='ctx'> 	.dma_mask_size = 32,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.chipset_flush = i9xx_chipset_flush,</div><div class='hunk'>@@ -1215,6 +1265,7 @@ static const struct intel_gtt_driver g33_gtt_driver = {</div><div class='ctx'> 	.setup = i9xx_setup,</div><div class='ctx'> 	.cleanup = i9xx_cleanup,</div><div class='ctx'> 	.write_entry = i965_write_entry,</div><div class='add'>+	.read_entry = i965_read_entry,</div><div class='ctx'> 	.dma_mask_size = 36,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.chipset_flush = i9xx_chipset_flush,</div><div class='hunk'>@@ -1225,6 +1276,7 @@ static const struct intel_gtt_driver pineview_gtt_driver = {</div><div class='ctx'> 	.setup = i9xx_setup,</div><div class='ctx'> 	.cleanup = i9xx_cleanup,</div><div class='ctx'> 	.write_entry = i965_write_entry,</div><div class='add'>+	.read_entry = i965_read_entry,</div><div class='ctx'> 	.dma_mask_size = 36,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.chipset_flush = i9xx_chipset_flush,</div><div class='hunk'>@@ -1235,6 +1287,7 @@ static const struct intel_gtt_driver i965_gtt_driver = {</div><div class='ctx'> 	.setup = i9xx_setup,</div><div class='ctx'> 	.cleanup = i9xx_cleanup,</div><div class='ctx'> 	.write_entry = i965_write_entry,</div><div class='add'>+	.read_entry = i965_read_entry,</div><div class='ctx'> 	.dma_mask_size = 36,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.chipset_flush = i9xx_chipset_flush,</div><div class='hunk'>@@ -1244,6 +1297,7 @@ static const struct intel_gtt_driver g4x_gtt_driver = {</div><div class='ctx'> 	.setup = i9xx_setup,</div><div class='ctx'> 	.cleanup = i9xx_cleanup,</div><div class='ctx'> 	.write_entry = i965_write_entry,</div><div class='add'>+	.read_entry = i965_read_entry,</div><div class='ctx'> 	.dma_mask_size = 36,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.chipset_flush = i9xx_chipset_flush,</div><div class='hunk'>@@ -1254,6 +1308,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {</div><div class='ctx'> 	.setup = i9xx_setup,</div><div class='ctx'> 	.cleanup = i9xx_cleanup,</div><div class='ctx'> 	.write_entry = i965_write_entry,</div><div class='add'>+	.read_entry = i965_read_entry,</div><div class='ctx'> 	.dma_mask_size = 36,</div><div class='ctx'> 	.check_flags = i830_check_flags,</div><div class='ctx'> 	.chipset_flush = i9xx_chipset_flush,</div><div class='head'>diff --git a/drivers/char/agp/nvidia-agp.c b/drivers/char/agp/nvidia-agp.c<br/>index e424360fb4a1..4787391bb6b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/agp/nvidia-agp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/agp/nvidia-agp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/agp/nvidia-agp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/agp/nvidia-agp.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/page-flags.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "agp.h"</div><div class='ctx'> </div><div class='ctx'> /* NVIDIA registers */</div><div class='head'>diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c<br/>index 143406bc6939..d2b00458761e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/hw_random/atmel-rng.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/atmel-rng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/hw_random/atmel-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/hw_random/atmel-rng.c</a></div><div class='hunk'>@@ -37,6 +37,7 @@ struct atmel_trng {</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	struct hwrng rng;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	bool has_half_rate;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -59,9 +60,9 @@ static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max,</div><div class='ctx'> 	u32 *data = buf;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = pm_runtime_get_sync((struct device *)trng-&gt;rng.priv);</div><div class='add'>+	ret = pm_runtime_get_sync(trng-&gt;dev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		pm_runtime_put_sync((struct device *)trng-&gt;rng.priv);</div><div class='add'>+		pm_runtime_put_sync(trng-&gt;dev);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -79,8 +80,8 @@ static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max,</div><div class='ctx'> 	ret = 4;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	pm_runtime_mark_last_busy((struct device *)trng-&gt;rng.priv);</div><div class='del'>-	pm_runtime_put_sync_autosuspend((struct device *)trng-&gt;rng.priv);</div><div class='add'>+	pm_runtime_mark_last_busy(trng-&gt;dev);</div><div class='add'>+	pm_runtime_put_sync_autosuspend(trng-&gt;dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -134,9 +135,9 @@ static int atmel_trng_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	trng-&gt;has_half_rate = data-&gt;has_half_rate;</div><div class='add'>+	trng-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	trng-&gt;rng.name = pdev-&gt;name;</div><div class='ctx'> 	trng-&gt;rng.read = atmel_trng_read;</div><div class='del'>-	trng-&gt;rng.priv = (unsigned long)&amp;pdev-&gt;dev;</div><div class='ctx'> 	platform_set_drvdata(pdev, trng);</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_PM</div><div class='head'>diff --git a/drivers/char/hw_random/mtk-rng.c b/drivers/char/hw_random/mtk-rng.c<br/>index 1e3048f2bb38..b7fa1bc1122b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/hw_random/mtk-rng.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/mtk-rng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/hw_random/mtk-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/hw_random/mtk-rng.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@ struct mtk_rng {</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	struct hwrng rng;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mtk_rng_init(struct hwrng *rng)</div><div class='hunk'>@@ -85,7 +86,7 @@ static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)</div><div class='ctx'> 	struct mtk_rng *priv = to_mtk_rng(rng);</div><div class='ctx'> 	int retval = 0;</div><div class='ctx'> </div><div class='del'>-	pm_runtime_get_sync((struct device *)priv-&gt;rng.priv);</div><div class='add'>+	pm_runtime_get_sync(priv-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	while (max &gt;= sizeof(u32)) {</div><div class='ctx'> 		if (!mtk_rng_wait_ready(rng, wait))</div><div class='hunk'>@@ -97,8 +98,8 @@ static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)</div><div class='ctx'> 		max -= sizeof(u32);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy((struct device *)priv-&gt;rng.priv);</div><div class='del'>-	pm_runtime_put_sync_autosuspend((struct device *)priv-&gt;rng.priv);</div><div class='add'>+	pm_runtime_mark_last_busy(priv-&gt;dev);</div><div class='add'>+	pm_runtime_put_sync_autosuspend(priv-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return retval || !wait ? retval : -EIO;</div><div class='ctx'> }</div><div class='hunk'>@@ -112,13 +113,13 @@ static int mtk_rng_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!priv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	priv-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	priv-&gt;rng.name = pdev-&gt;name;</div><div class='ctx'> #ifndef CONFIG_PM</div><div class='ctx'> 	priv-&gt;rng.init = mtk_rng_init;</div><div class='ctx'> 	priv-&gt;rng.cleanup = mtk_rng_cleanup;</div><div class='ctx'> #endif</div><div class='ctx'> 	priv-&gt;rng.read = mtk_rng_read;</div><div class='del'>-	priv-&gt;rng.priv = (unsigned long)&amp;pdev-&gt;dev;</div><div class='ctx'> 	priv-&gt;rng.quality = 900;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;clk = devm_clk_get(&amp;pdev-&gt;dev, "rng");</div><div class='head'>diff --git a/drivers/char/hw_random/npcm-rng.c b/drivers/char/hw_random/npcm-rng.c<br/>index 9ff00f096f38..3e308c890bd2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/hw_random/npcm-rng.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/npcm-rng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/hw_random/npcm-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/hw_random/npcm-rng.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> struct npcm_rng {</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	struct hwrng rng;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	u32 clkp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -57,7 +58,7 @@ static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)</div><div class='ctx'> 	int retval = 0;</div><div class='ctx'> 	int ready;</div><div class='ctx'> </div><div class='del'>-	pm_runtime_get_sync((struct device *)priv-&gt;rng.priv);</div><div class='add'>+	pm_runtime_get_sync(priv-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	while (max) {</div><div class='ctx'> 		if (wait) {</div><div class='hunk'>@@ -79,8 +80,8 @@ static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)</div><div class='ctx'> 		max--;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy((struct device *)priv-&gt;rng.priv);</div><div class='del'>-	pm_runtime_put_sync_autosuspend((struct device *)priv-&gt;rng.priv);</div><div class='add'>+	pm_runtime_mark_last_busy(priv-&gt;dev);</div><div class='add'>+	pm_runtime_put_sync_autosuspend(priv-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return retval || !wait ? retval : -EIO;</div><div class='ctx'> }</div><div class='hunk'>@@ -109,7 +110,7 @@ static int npcm_rng_probe(struct platform_device *pdev)</div><div class='ctx'> #endif</div><div class='ctx'> 	priv-&gt;rng.name = pdev-&gt;name;</div><div class='ctx'> 	priv-&gt;rng.read = npcm_rng_read;</div><div class='del'>-	priv-&gt;rng.priv = (unsigned long)&amp;pdev-&gt;dev;</div><div class='add'>+	priv-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	priv-&gt;clkp = (u32)(uintptr_t)of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	writel(NPCM_RNG_M1ROSEL, priv-&gt;base + NPCM_RNGMODE_REG);</div><div class='head'>diff --git a/drivers/char/hw_random/rockchip-rng.c b/drivers/char/hw_random/rockchip-rng.c<br/>index 161050591663..fb4a30b95507 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/hw_random/rockchip-rng.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/hw_random/rockchip-rng.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/hw_random/rockchip-rng.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/hw_random/rockchip-rng.c</a></div><div class='hunk'>@@ -93,6 +93,30 @@</div><div class='ctx'> #define TRNG_v1_VERSION_CODE			0x46bc</div><div class='ctx'> /* end of TRNG_V1 register definitions */</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * RKRNG register definitions</div><div class='add'>+ * The RKRNG IP is a stand-alone TRNG implementation (not part of a crypto IP)</div><div class='add'>+ * and can be found in the Rockchip RK3576, Rockchip RK3562 and Rockchip RK3528</div><div class='add'>+ * SoCs. It can either output true randomness (TRNG) or "deterministic"</div><div class='add'>+ * randomness derived from hashing the true entropy (DRNG). This driver</div><div class='add'>+ * implementation uses just the true entropy, and leaves stretching the entropy</div><div class='add'>+ * up to Linux.</div><div class='add'>+ */</div><div class='add'>+#define RKRNG_CFG				0x0000</div><div class='add'>+#define RKRNG_CTRL				0x0010</div><div class='add'>+#define RKRNG_CTRL_REQ_TRNG			BIT(4)</div><div class='add'>+#define RKRNG_STATE				0x0014</div><div class='add'>+#define RKRNG_STATE_TRNG_RDY			BIT(4)</div><div class='add'>+#define RKRNG_TRNG_DATA0			0x0050</div><div class='add'>+#define RKRNG_TRNG_DATA1			0x0054</div><div class='add'>+#define RKRNG_TRNG_DATA2			0x0058</div><div class='add'>+#define RKRNG_TRNG_DATA3			0x005C</div><div class='add'>+#define RKRNG_TRNG_DATA4			0x0060</div><div class='add'>+#define RKRNG_TRNG_DATA5			0x0064</div><div class='add'>+#define RKRNG_TRNG_DATA6			0x0068</div><div class='add'>+#define RKRNG_TRNG_DATA7			0x006C</div><div class='add'>+#define RKRNG_READ_LEN				32</div><div class='add'>+</div><div class='ctx'> /* Before removing this assert, give rk3588_rng_read an upper bound of 32 */</div><div class='ctx'> static_assert(RK_RNG_MAX_BYTE &lt;= (TRNG_V1_RAND7 + 4 - TRNG_V1_RAND0),</div><div class='ctx'> 	      "You raised RK_RNG_MAX_BYTE and broke rk3588-rng, congrats.");</div><div class='hunk'>@@ -205,6 +229,46 @@ out:</div><div class='ctx'> 	return (ret &lt; 0) ? ret : to_read;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rk3576_rng_init(struct hwrng *rng)</div><div class='add'>+{</div><div class='add'>+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);</div><div class='add'>+</div><div class='add'>+	return rk_rng_enable_clks(rk_rng);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rk3576_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)</div><div class='add'>+{</div><div class='add'>+	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);</div><div class='add'>+	size_t to_read = min_t(size_t, max, RKRNG_READ_LEN);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_resume_and_get(rk_rng-&gt;dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	rk_rng_writel(rk_rng, RKRNG_CTRL_REQ_TRNG | (RKRNG_CTRL_REQ_TRNG &lt;&lt; 16),</div><div class='add'>+		      RKRNG_CTRL);</div><div class='add'>+</div><div class='add'>+	if (readl_poll_timeout(rk_rng-&gt;base + RKRNG_STATE, val,</div><div class='add'>+			       (val &amp; RKRNG_STATE_TRNG_RDY), RK_RNG_POLL_PERIOD_US,</div><div class='add'>+			       RK_RNG_POLL_TIMEOUT_US)) {</div><div class='add'>+		dev_err(rk_rng-&gt;dev, "timed out waiting for data\n");</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rk_rng_writel(rk_rng, RKRNG_STATE_TRNG_RDY, RKRNG_STATE);</div><div class='add'>+</div><div class='add'>+	memcpy_fromio(buf, rk_rng-&gt;base + RKRNG_TRNG_DATA0, to_read);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pm_runtime_mark_last_busy(rk_rng-&gt;dev);</div><div class='add'>+	pm_runtime_put_sync_autosuspend(rk_rng-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return (ret &lt; 0) ? ret : to_read;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rk3588_rng_init(struct hwrng *rng)</div><div class='ctx'> {</div><div class='ctx'> 	struct rk_rng *rk_rng = container_of(rng, struct rk_rng, rng);</div><div class='hunk'>@@ -305,6 +369,14 @@ static const struct rk_rng_soc_data rk3568_soc_data = {</div><div class='ctx'> 	.reset_optional = false,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct rk_rng_soc_data rk3576_soc_data = {</div><div class='add'>+	.rk_rng_init = rk3576_rng_init,</div><div class='add'>+	.rk_rng_read = rk3576_rng_read,</div><div class='add'>+	.rk_rng_cleanup = rk3588_rng_cleanup,</div><div class='add'>+	.quality = 999,		/* as determined by actual testing */</div><div class='add'>+	.reset_optional = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct rk_rng_soc_data rk3588_soc_data = {</div><div class='ctx'> 	.rk_rng_init = rk3588_rng_init,</div><div class='ctx'> 	.rk_rng_read = rk3588_rng_read,</div><div class='hunk'>@@ -397,6 +469,7 @@ static const struct dev_pm_ops rk_rng_pm_ops = {</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id rk_rng_dt_match[] = {</div><div class='ctx'> 	{ .compatible = "rockchip,rk3568-rng", .data = (void *)&amp;rk3568_soc_data },</div><div class='add'>+	{ .compatible = "rockchip,rk3576-rng", .data = (void *)&amp;rk3576_soc_data },</div><div class='ctx'> 	{ .compatible = "rockchip,rk3588-rng", .data = (void *)&amp;rk3588_soc_data },</div><div class='ctx'> 	{ /* sentinel */ },</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_msghandler.c b/drivers/char/ipmi/ipmi_msghandler.c<br/>index 3ba9d7e9a6c7..064944ae9fdc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_msghandler.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_msghandler.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_msghandler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_msghandler.c</a></div><div class='hunk'>@@ -27,7 +27,6 @@</div><div class='ctx'> #include &lt;linux/ipmi_smi.h&gt;</div><div class='ctx'> #include &lt;linux/notifier.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> #include &lt;linux/rcupdate.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='hunk'>@@ -41,11 +40,12 @@</div><div class='ctx'> </div><div class='ctx'> static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void);</div><div class='ctx'> static int ipmi_init_msghandler(void);</div><div class='del'>-static void smi_recv_work(struct work_struct *t);</div><div class='add'>+static void smi_work(struct work_struct *t);</div><div class='ctx'> static void handle_new_recv_msgs(struct ipmi_smi *intf);</div><div class='ctx'> static void need_waiter(struct ipmi_smi *intf);</div><div class='ctx'> static int handle_one_recv_msg(struct ipmi_smi *intf,</div><div class='ctx'> 			       struct ipmi_smi_msg *msg);</div><div class='add'>+static void intf_free(struct kref *ref);</div><div class='ctx'> </div><div class='ctx'> static bool initialized;</div><div class='ctx'> static bool drvregistered;</div><div class='hunk'>@@ -180,14 +180,8 @@ MODULE_PARM_DESC(max_msgs_per_user,</div><div class='ctx'> struct ipmi_user {</div><div class='ctx'> 	struct list_head link;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set to NULL when the user is destroyed, a pointer to myself</div><div class='del'>-	 * so srcu_dereference can be used on it.</div><div class='del'>-	 */</div><div class='del'>-	struct ipmi_user *self;</div><div class='del'>-	struct srcu_struct release_barrier;</div><div class='del'>-</div><div class='ctx'> 	struct kref refcount;</div><div class='add'>+	refcount_t destroyed;</div><div class='ctx'> </div><div class='ctx'> 	/* The upper layer that handles receive messages. */</div><div class='ctx'> 	const struct ipmi_user_hndl *handler;</div><div class='hunk'>@@ -200,30 +194,8 @@ struct ipmi_user {</div><div class='ctx'> 	bool gets_events;</div><div class='ctx'> </div><div class='ctx'> 	atomic_t nr_msgs;</div><div class='del'>-</div><div class='del'>-	/* Free must run in process context for RCU cleanup. */</div><div class='del'>-	struct work_struct remove_work;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct workqueue_struct *remove_work_wq;</div><div class='del'>-</div><div class='del'>-static struct ipmi_user *acquire_ipmi_user(struct ipmi_user *user, int *index)</div><div class='del'>-	__acquires(user-&gt;release_barrier)</div><div class='del'>-{</div><div class='del'>-	struct ipmi_user *ruser;</div><div class='del'>-</div><div class='del'>-	*index = srcu_read_lock(&amp;user-&gt;release_barrier);</div><div class='del'>-	ruser = srcu_dereference(user-&gt;self, &amp;user-&gt;release_barrier);</div><div class='del'>-	if (!ruser)</div><div class='del'>-		srcu_read_unlock(&amp;user-&gt;release_barrier, *index);</div><div class='del'>-	return ruser;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void release_ipmi_user(struct ipmi_user *user, int index)</div><div class='del'>-{</div><div class='del'>-	srcu_read_unlock(&amp;user-&gt;release_barrier, index);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct cmd_rcvr {</div><div class='ctx'> 	struct list_head link;</div><div class='ctx'> </div><div class='hunk'>@@ -327,6 +299,8 @@ struct bmc_device {</div><div class='ctx'> };</div><div class='ctx'> #define to_bmc_device(x) container_of((x), struct bmc_device, pdev.dev)</div><div class='ctx'> </div><div class='add'>+static struct workqueue_struct *bmc_remove_work_wq;</div><div class='add'>+</div><div class='ctx'> static int bmc_get_device_id(struct ipmi_smi *intf, struct bmc_device *bmc,</div><div class='ctx'> 			     struct ipmi_device_id *id,</div><div class='ctx'> 			     bool *guid_set, guid_t *guid);</div><div class='hunk'>@@ -451,11 +425,10 @@ struct ipmi_smi {</div><div class='ctx'> 	struct list_head link;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * The list of upper layers that are using me.  seq_lock write</div><div class='del'>-	 * protects this.  Read protection is with srcu.</div><div class='add'>+	 * The list of upper layers that are using me.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct list_head users;</div><div class='del'>-	struct srcu_struct users_srcu;</div><div class='add'>+	struct mutex users_mutex;</div><div class='ctx'> 	atomic_t nr_users;</div><div class='ctx'> 	struct device_attribute nr_users_devattr;</div><div class='ctx'> 	struct device_attribute nr_msgs_devattr;</div><div class='hunk'>@@ -496,15 +469,22 @@ struct ipmi_smi {</div><div class='ctx'> 	int curr_seq;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * Messages queued for delivery.  If delivery fails (out of memory</div><div class='del'>-	 * for instance), They will stay in here to be processed later in a</div><div class='del'>-	 * periodic timer interrupt.  The workqueue is for handling received</div><div class='del'>-	 * messages directly from the handler.</div><div class='add'>+	 * Messages queued for deliver to the user.</div><div class='add'>+	 */</div><div class='add'>+	struct mutex user_msgs_mutex;</div><div class='add'>+	struct list_head user_msgs;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Messages queued for processing.  If processing fails (out</div><div class='add'>+	 * of memory for instance), They will stay in here to be</div><div class='add'>+	 * processed later in a periodic timer interrupt.  The</div><div class='add'>+	 * workqueue is for handling received messages directly from</div><div class='add'>+	 * the handler.</div><div class='ctx'> 	 */</div><div class='ctx'> 	spinlock_t       waiting_rcv_msgs_lock;</div><div class='ctx'> 	struct list_head waiting_rcv_msgs;</div><div class='ctx'> 	atomic_t	 watchdog_pretimeouts_to_deliver;</div><div class='del'>-	struct work_struct recv_work;</div><div class='add'>+	struct work_struct smi_work;</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t             xmit_msgs_lock;</div><div class='ctx'> 	struct list_head       xmit_msgs;</div><div class='hunk'>@@ -522,10 +502,9 @@ struct ipmi_smi {</div><div class='ctx'> 	 * Events that were queues because no one was there to receive</div><div class='ctx'> 	 * them.</div><div class='ctx'> 	 */</div><div class='del'>-	spinlock_t       events_lock; /* For dealing with event stuff. */</div><div class='add'>+	struct mutex     events_mutex; /* For dealing with event stuff. */</div><div class='ctx'> 	struct list_head waiting_events;</div><div class='ctx'> 	unsigned int     waiting_events_count; /* How many events in queue? */</div><div class='del'>-	char             delivering_events;</div><div class='ctx'> 	char             event_msg_printed;</div><div class='ctx'> </div><div class='ctx'> 	/* How many users are waiting for events? */</div><div class='hunk'>@@ -613,6 +592,28 @@ static int __ipmi_bmc_register(struct ipmi_smi *intf,</div><div class='ctx'> 			       bool guid_set, guid_t *guid, int intf_num);</div><div class='ctx'> static int __scan_channels(struct ipmi_smi *intf, struct ipmi_device_id *id);</div><div class='ctx'> </div><div class='add'>+static void free_ipmi_user(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct ipmi_user *user = container_of(ref, struct ipmi_user, refcount);</div><div class='add'>+	struct module *owner;</div><div class='add'>+</div><div class='add'>+	owner = user-&gt;intf-&gt;owner;</div><div class='add'>+	kref_put(&amp;user-&gt;intf-&gt;refcount, intf_free);</div><div class='add'>+	module_put(owner);</div><div class='add'>+	vfree(user);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void release_ipmi_user(struct ipmi_user *user)</div><div class='add'>+{</div><div class='add'>+	kref_put(&amp;user-&gt;refcount, free_ipmi_user);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ipmi_user *acquire_ipmi_user(struct ipmi_user *user)</div><div class='add'>+{</div><div class='add'>+	if (!kref_get_unless_zero(&amp;user-&gt;refcount))</div><div class='add'>+		return NULL;</div><div class='add'>+	return user;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The driver model view of the IPMI messaging driver.</div><div class='hunk'>@@ -630,9 +631,6 @@ static DEFINE_MUTEX(ipmidriver_mutex);</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(ipmi_interfaces);</div><div class='ctx'> static DEFINE_MUTEX(ipmi_interfaces_mutex);</div><div class='del'>-#define ipmi_interfaces_mutex_held() \</div><div class='del'>-	lockdep_is_held(&amp;ipmi_interfaces_mutex)</div><div class='del'>-static struct srcu_struct ipmi_interfaces_srcu;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * List of watchers that want to know when smi's are added and deleted.</div><div class='hunk'>@@ -698,27 +696,20 @@ static void free_smi_msg_list(struct list_head *q)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void clean_up_interface_data(struct ipmi_smi *intf)</div><div class='add'>+static void intf_free(struct kref *ref)</div><div class='ctx'> {</div><div class='add'>+	struct ipmi_smi *intf = container_of(ref, struct ipmi_smi, refcount);</div><div class='ctx'> 	int              i;</div><div class='ctx'> 	struct cmd_rcvr  *rcvr, *rcvr2;</div><div class='del'>-	struct list_head list;</div><div class='del'>-</div><div class='del'>-	cancel_work_sync(&amp;intf-&gt;recv_work);</div><div class='ctx'> </div><div class='ctx'> 	free_smi_msg_list(&amp;intf-&gt;waiting_rcv_msgs);</div><div class='ctx'> 	free_recv_msg_list(&amp;intf-&gt;waiting_events);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Wholesale remove all the entries from the list in the</div><div class='del'>-	 * interface and wait for RCU to know that none are in use.</div><div class='add'>+	 * interface.  No need for locks, this is single-threaded.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;intf-&gt;cmd_rcvrs_mutex);</div><div class='del'>-	INIT_LIST_HEAD(&amp;list);</div><div class='del'>-	list_splice_init_rcu(&amp;intf-&gt;cmd_rcvrs, &amp;list, synchronize_rcu);</div><div class='del'>-	mutex_unlock(&amp;intf-&gt;cmd_rcvrs_mutex);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(rcvr, rcvr2, &amp;list, link)</div><div class='add'>+	list_for_each_entry_safe(rcvr, rcvr2, &amp;intf-&gt;cmd_rcvrs, link)</div><div class='ctx'> 		kfree(rcvr);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; IPMI_IPMB_NUM_SEQ; i++) {</div><div class='hunk'>@@ -726,20 +717,17 @@ static void clean_up_interface_data(struct ipmi_smi *intf)</div><div class='ctx'> 					&amp;&amp; (intf-&gt;seq_table[i].recv_msg))</div><div class='ctx'> 			ipmi_free_recv_msg(intf-&gt;seq_table[i].recv_msg);</div><div class='ctx'> 	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void intf_free(struct kref *ref)</div><div class='del'>-{</div><div class='del'>-	struct ipmi_smi *intf = container_of(ref, struct ipmi_smi, refcount);</div><div class='ctx'> </div><div class='del'>-	clean_up_interface_data(intf);</div><div class='ctx'> 	kfree(intf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ipmi_smi_watcher_register(struct ipmi_smi_watcher *watcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi *intf;</div><div class='del'>-	int index, rv;</div><div class='add'>+	unsigned int count = 0, i;</div><div class='add'>+	int *interfaces = NULL;</div><div class='add'>+	struct device **devices = NULL;</div><div class='add'>+	int rv = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure the driver is actually initialized, this handles</div><div class='hunk'>@@ -753,20 +741,53 @@ int ipmi_smi_watcher_register(struct ipmi_smi_watcher *watcher)</div><div class='ctx'> </div><div class='ctx'> 	list_add(&amp;watcher-&gt;link, &amp;smi_watchers);</div><div class='ctx'> </div><div class='del'>-	index = srcu_read_lock(&amp;ipmi_interfaces_srcu);</div><div class='del'>-	list_for_each_entry_rcu(intf, &amp;ipmi_interfaces, link,</div><div class='del'>-			lockdep_is_held(&amp;smi_watchers_mutex)) {</div><div class='del'>-		int intf_num = READ_ONCE(intf-&gt;intf_num);</div><div class='add'>+	/*</div><div class='add'>+	 * Build an array of ipmi interfaces and fill it in, and</div><div class='add'>+	 * another array of the devices.  We can't call the callback</div><div class='add'>+	 * with ipmi_interfaces_mutex held.  smi_watchers_mutex will</div><div class='add'>+	 * keep things in order for the user.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;ipmi_interfaces_mutex);</div><div class='add'>+	list_for_each_entry(intf, &amp;ipmi_interfaces, link)</div><div class='add'>+		count++;</div><div class='add'>+	if (count &gt; 0) {</div><div class='add'>+		interfaces = kmalloc_array(count, sizeof(*interfaces),</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+		if (!interfaces) {</div><div class='add'>+			rv = -ENOMEM;</div><div class='add'>+		} else {</div><div class='add'>+			devices = kmalloc_array(count, sizeof(*devices),</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+			if (!devices) {</div><div class='add'>+				kfree(interfaces);</div><div class='add'>+				interfaces = NULL;</div><div class='add'>+				rv = -ENOMEM;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		count = 0;</div><div class='add'>+	}</div><div class='add'>+	if (interfaces) {</div><div class='add'>+		list_for_each_entry(intf, &amp;ipmi_interfaces, link) {</div><div class='add'>+			int intf_num = READ_ONCE(intf-&gt;intf_num);</div><div class='ctx'> </div><div class='del'>-		if (intf_num == -1)</div><div class='del'>-			continue;</div><div class='del'>-		watcher-&gt;new_smi(intf_num, intf-&gt;si_dev);</div><div class='add'>+			if (intf_num == -1)</div><div class='add'>+				continue;</div><div class='add'>+			devices[count] = intf-&gt;si_dev;</div><div class='add'>+			interfaces[count++] = intf_num;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='add'>+</div><div class='add'>+	if (interfaces) {</div><div class='add'>+		for (i = 0; i &lt; count; i++)</div><div class='add'>+			watcher-&gt;new_smi(interfaces[i], devices[i]);</div><div class='add'>+		kfree(interfaces);</div><div class='add'>+		kfree(devices);</div><div class='ctx'> 	}</div><div class='del'>-	srcu_read_unlock(&amp;ipmi_interfaces_srcu, index);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;smi_watchers_mutex);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return rv;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_smi_watcher_register);</div><div class='ctx'> </div><div class='hunk'>@@ -779,22 +800,17 @@ int ipmi_smi_watcher_unregister(struct ipmi_smi_watcher *watcher)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_smi_watcher_unregister);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Must be called with smi_watchers_mutex held.</div><div class='del'>- */</div><div class='ctx'> static void</div><div class='ctx'> call_smi_watchers(int i, struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi_watcher *w;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;smi_watchers_mutex);</div><div class='ctx'> 	list_for_each_entry(w, &amp;smi_watchers, link) {</div><div class='ctx'> 		if (try_module_get(w-&gt;owner)) {</div><div class='ctx'> 			w-&gt;new_smi(i, dev);</div><div class='ctx'> 			module_put(w-&gt;owner);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;smi_watchers_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -941,18 +957,14 @@ static int deliver_response(struct ipmi_smi *intf, struct ipmi_recv_msg *msg)</div><div class='ctx'> 		ipmi_free_recv_msg(msg);</div><div class='ctx'> 		atomic_dec(&amp;msg-&gt;user-&gt;nr_msgs);</div><div class='ctx'> 	} else {</div><div class='del'>-		int index;</div><div class='del'>-		struct ipmi_user *user = acquire_ipmi_user(msg-&gt;user, &amp;index);</div><div class='del'>-</div><div class='del'>-		if (user) {</div><div class='del'>-			atomic_dec(&amp;user-&gt;nr_msgs);</div><div class='del'>-			user-&gt;handler-&gt;ipmi_recv_hndl(msg, user-&gt;handler_data);</div><div class='del'>-			release_ipmi_user(user, index);</div><div class='del'>-		} else {</div><div class='del'>-			/* User went away, give up. */</div><div class='del'>-			ipmi_free_recv_msg(msg);</div><div class='del'>-			rv = -EINVAL;</div><div class='del'>-		}</div><div class='add'>+		/*</div><div class='add'>+		 * Deliver it in smi_work.  The message will hold a</div><div class='add'>+		 * refcount to the user.</div><div class='add'>+		 */</div><div class='add'>+		mutex_lock(&amp;intf-&gt;user_msgs_mutex);</div><div class='add'>+		list_add_tail(&amp;msg-&gt;link, &amp;intf-&gt;user_msgs);</div><div class='add'>+		mutex_unlock(&amp;intf-&gt;user_msgs_mutex);</div><div class='add'>+		queue_work(system_wq, &amp;intf-&gt;smi_work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='hunk'>@@ -1192,23 +1204,14 @@ static int intf_err_seq(struct ipmi_smi *intf,</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void free_user_work(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct ipmi_user *user = container_of(work, struct ipmi_user,</div><div class='del'>-					      remove_work);</div><div class='del'>-</div><div class='del'>-	cleanup_srcu_struct(&amp;user-&gt;release_barrier);</div><div class='del'>-	vfree(user);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int ipmi_create_user(unsigned int          if_num,</div><div class='ctx'> 		     const struct ipmi_user_hndl *handler,</div><div class='ctx'> 		     void                  *handler_data,</div><div class='ctx'> 		     struct ipmi_user      **user)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	struct ipmi_user *new_user;</div><div class='del'>-	int           rv, index;</div><div class='add'>+	struct ipmi_user *new_user = NULL;</div><div class='add'>+	int           rv = 0;</div><div class='ctx'> 	struct ipmi_smi *intf;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1230,30 +1233,31 @@ int ipmi_create_user(unsigned int          if_num,</div><div class='ctx'> 	if (rv)</div><div class='ctx'> 		return rv;</div><div class='ctx'> </div><div class='del'>-	new_user = vzalloc(sizeof(*new_user));</div><div class='del'>-	if (!new_user)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	index = srcu_read_lock(&amp;ipmi_interfaces_srcu);</div><div class='del'>-	list_for_each_entry_rcu(intf, &amp;ipmi_interfaces, link) {</div><div class='add'>+	mutex_lock(&amp;ipmi_interfaces_mutex);</div><div class='add'>+	list_for_each_entry(intf, &amp;ipmi_interfaces, link) {</div><div class='ctx'> 		if (intf-&gt;intf_num == if_num)</div><div class='ctx'> 			goto found;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Not found, return an error */</div><div class='ctx'> 	rv = -EINVAL;</div><div class='del'>-	goto out_kfree;</div><div class='add'>+	goto out_unlock;</div><div class='ctx'> </div><div class='ctx'>  found:</div><div class='add'>+	if (intf-&gt;in_shutdown) {</div><div class='add'>+		rv = -ENODEV;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (atomic_add_return(1, &amp;intf-&gt;nr_users) &gt; max_users) {</div><div class='ctx'> 		rv = -EBUSY;</div><div class='ctx'> 		goto out_kfree;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	INIT_WORK(&amp;new_user-&gt;remove_work, free_user_work);</div><div class='del'>-</div><div class='del'>-	rv = init_srcu_struct(&amp;new_user-&gt;release_barrier);</div><div class='del'>-	if (rv)</div><div class='add'>+	new_user = vzalloc(sizeof(*new_user));</div><div class='add'>+	if (!new_user) {</div><div class='add'>+		rv = -ENOMEM;</div><div class='ctx'> 		goto out_kfree;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!try_module_get(intf-&gt;owner)) {</div><div class='ctx'> 		rv = -ENODEV;</div><div class='hunk'>@@ -1265,64 +1269,58 @@ int ipmi_create_user(unsigned int          if_num,</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;new_user-&gt;nr_msgs, 0);</div><div class='ctx'> 	kref_init(&amp;new_user-&gt;refcount);</div><div class='add'>+	refcount_set(&amp;new_user-&gt;destroyed, 1);</div><div class='add'>+	kref_get(&amp;new_user-&gt;refcount); /* Destroy owns a refcount. */</div><div class='ctx'> 	new_user-&gt;handler = handler;</div><div class='ctx'> 	new_user-&gt;handler_data = handler_data;</div><div class='ctx'> 	new_user-&gt;intf = intf;</div><div class='ctx'> 	new_user-&gt;gets_events = false;</div><div class='ctx'> </div><div class='del'>-	rcu_assign_pointer(new_user-&gt;self, new_user);</div><div class='add'>+	mutex_lock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> 	spin_lock_irqsave(&amp;intf-&gt;seq_lock, flags);</div><div class='del'>-	list_add_rcu(&amp;new_user-&gt;link, &amp;intf-&gt;users);</div><div class='add'>+	list_add(&amp;new_user-&gt;link, &amp;intf-&gt;users);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;intf-&gt;seq_lock, flags);</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='add'>+</div><div class='ctx'> 	if (handler-&gt;ipmi_watchdog_pretimeout)</div><div class='ctx'> 		/* User wants pretimeouts, so make sure to watch for them. */</div><div class='ctx'> 		smi_add_watch(intf, IPMI_WATCH_MASK_CHECK_WATCHDOG);</div><div class='del'>-	srcu_read_unlock(&amp;ipmi_interfaces_srcu, index);</div><div class='del'>-	*user = new_user;</div><div class='del'>-	return 0;</div><div class='ctx'> </div><div class='ctx'> out_kfree:</div><div class='del'>-	atomic_dec(&amp;intf-&gt;nr_users);</div><div class='del'>-	srcu_read_unlock(&amp;ipmi_interfaces_srcu, index);</div><div class='del'>-	vfree(new_user);</div><div class='add'>+	if (rv) {</div><div class='add'>+		atomic_dec(&amp;intf-&gt;nr_users);</div><div class='add'>+		vfree(new_user);</div><div class='add'>+	} else {</div><div class='add'>+		*user = new_user;</div><div class='add'>+	}</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_create_user);</div><div class='ctx'> </div><div class='ctx'> int ipmi_get_smi_info(int if_num, struct ipmi_smi_info *data)</div><div class='ctx'> {</div><div class='del'>-	int rv, index;</div><div class='add'>+	int rv = -EINVAL;</div><div class='ctx'> 	struct ipmi_smi *intf;</div><div class='ctx'> </div><div class='del'>-	index = srcu_read_lock(&amp;ipmi_interfaces_srcu);</div><div class='del'>-	list_for_each_entry_rcu(intf, &amp;ipmi_interfaces, link) {</div><div class='del'>-		if (intf-&gt;intf_num == if_num)</div><div class='del'>-			goto found;</div><div class='add'>+	mutex_lock(&amp;ipmi_interfaces_mutex);</div><div class='add'>+	list_for_each_entry(intf, &amp;ipmi_interfaces, link) {</div><div class='add'>+		if (intf-&gt;intf_num == if_num) {</div><div class='add'>+			if (!intf-&gt;handlers-&gt;get_smi_info)</div><div class='add'>+				rv = -ENOTTY;</div><div class='add'>+			else</div><div class='add'>+				rv = intf-&gt;handlers-&gt;get_smi_info(intf-&gt;send_info, data);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	srcu_read_unlock(&amp;ipmi_interfaces_srcu, index);</div><div class='del'>-</div><div class='del'>-	/* Not found, return an error */</div><div class='del'>-	return -EINVAL;</div><div class='del'>-</div><div class='del'>-found:</div><div class='del'>-	if (!intf-&gt;handlers-&gt;get_smi_info)</div><div class='del'>-		rv = -ENOTTY;</div><div class='del'>-	else</div><div class='del'>-		rv = intf-&gt;handlers-&gt;get_smi_info(intf-&gt;send_info, data);</div><div class='del'>-	srcu_read_unlock(&amp;ipmi_interfaces_srcu, index);</div><div class='add'>+	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_get_smi_info);</div><div class='ctx'> </div><div class='del'>-static void free_user(struct kref *ref)</div><div class='del'>-{</div><div class='del'>-	struct ipmi_user *user = container_of(ref, struct ipmi_user, refcount);</div><div class='del'>-</div><div class='del'>-	/* SRCU cleanup must happen in workqueue context. */</div><div class='del'>-	queue_work(remove_work_wq, &amp;user-&gt;remove_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+/* Must be called with intf-&gt;users_mutex held. */</div><div class='ctx'> static void _ipmi_destroy_user(struct ipmi_user *user)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi  *intf = user-&gt;intf;</div><div class='hunk'>@@ -1330,21 +1328,10 @@ static void _ipmi_destroy_user(struct ipmi_user *user)</div><div class='ctx'> 	unsigned long    flags;</div><div class='ctx'> 	struct cmd_rcvr  *rcvr;</div><div class='ctx'> 	struct cmd_rcvr  *rcvrs = NULL;</div><div class='del'>-	struct module    *owner;</div><div class='add'>+	struct ipmi_recv_msg *msg, *msg2;</div><div class='ctx'> </div><div class='del'>-	if (!acquire_ipmi_user(user, &amp;i)) {</div><div class='del'>-		/*</div><div class='del'>-		 * The user has already been cleaned up, just make sure</div><div class='del'>-		 * nothing is using it and return.</div><div class='del'>-		 */</div><div class='del'>-		synchronize_srcu(&amp;user-&gt;release_barrier);</div><div class='add'>+	if (!refcount_dec_if_one(&amp;user-&gt;destroyed))</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rcu_assign_pointer(user-&gt;self, NULL);</div><div class='del'>-	release_ipmi_user(user, i);</div><div class='del'>-</div><div class='del'>-	synchronize_srcu(&amp;user-&gt;release_barrier);</div><div class='ctx'> </div><div class='ctx'> 	if (user-&gt;handler-&gt;shutdown)</div><div class='ctx'> 		user-&gt;handler-&gt;shutdown(user-&gt;handler_data);</div><div class='hunk'>@@ -1355,11 +1342,11 @@ static void _ipmi_destroy_user(struct ipmi_user *user)</div><div class='ctx'> 	if (user-&gt;gets_events)</div><div class='ctx'> 		atomic_dec(&amp;intf-&gt;event_waiters);</div><div class='ctx'> </div><div class='del'>-	/* Remove the user from the interface's sequence table. */</div><div class='del'>-	spin_lock_irqsave(&amp;intf-&gt;seq_lock, flags);</div><div class='del'>-	list_del_rcu(&amp;user-&gt;link);</div><div class='add'>+	/* Remove the user from the interface's list and sequence table. */</div><div class='add'>+	list_del(&amp;user-&gt;link);</div><div class='ctx'> 	atomic_dec(&amp;intf-&gt;nr_users);</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;intf-&gt;seq_lock, flags);</div><div class='ctx'> 	for (i = 0; i &lt; IPMI_IPMB_NUM_SEQ; i++) {</div><div class='ctx'> 		if (intf-&gt;seq_table[i].inuse</div><div class='ctx'> 		    &amp;&amp; (intf-&gt;seq_table[i].recv_msg-&gt;user == user)) {</div><div class='hunk'>@@ -1374,7 +1361,7 @@ static void _ipmi_destroy_user(struct ipmi_user *user)</div><div class='ctx'> 	 * Remove the user from the command receiver's table.  First</div><div class='ctx'> 	 * we build a list of everything (not using the standard link,</div><div class='ctx'> 	 * since other things may be using it till we do</div><div class='del'>-	 * synchronize_srcu()) then free everything in that list.</div><div class='add'>+	 * synchronize_rcu()) then free everything in that list.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mutex_lock(&amp;intf-&gt;cmd_rcvrs_mutex);</div><div class='ctx'> 	list_for_each_entry_rcu(rcvr, &amp;intf-&gt;cmd_rcvrs, link,</div><div class='hunk'>@@ -1386,23 +1373,33 @@ static void _ipmi_destroy_user(struct ipmi_user *user)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;intf-&gt;cmd_rcvrs_mutex);</div><div class='del'>-	synchronize_rcu();</div><div class='ctx'> 	while (rcvrs) {</div><div class='ctx'> 		rcvr = rcvrs;</div><div class='ctx'> 		rcvrs = rcvr-&gt;next;</div><div class='ctx'> 		kfree(rcvr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	owner = intf-&gt;owner;</div><div class='del'>-	kref_put(&amp;intf-&gt;refcount, intf_free);</div><div class='del'>-	module_put(owner);</div><div class='add'>+	mutex_lock(&amp;intf-&gt;user_msgs_mutex);</div><div class='add'>+	list_for_each_entry_safe(msg, msg2, &amp;intf-&gt;user_msgs, link) {</div><div class='add'>+		if (msg-&gt;user != user)</div><div class='add'>+			continue;</div><div class='add'>+		list_del(&amp;msg-&gt;link);</div><div class='add'>+		ipmi_free_recv_msg(msg);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;user_msgs_mutex);</div><div class='add'>+</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ipmi_destroy_user(struct ipmi_user *user)</div><div class='ctx'> {</div><div class='add'>+	struct ipmi_smi *intf = user-&gt;intf;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> 	_ipmi_destroy_user(user);</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> </div><div class='del'>-	kref_put(&amp;user-&gt;refcount, free_user);</div><div class='add'>+	kref_put(&amp;user-&gt;refcount, free_ipmi_user);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_destroy_user);</div><div class='ctx'> </div><div class='hunk'>@@ -1411,9 +1408,9 @@ int ipmi_get_version(struct ipmi_user *user,</div><div class='ctx'> 		     unsigned char *minor)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_device_id id;</div><div class='del'>-	int rv, index;</div><div class='add'>+	int rv;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1422,7 +1419,7 @@ int ipmi_get_version(struct ipmi_user *user,</div><div class='ctx'> 		*major = ipmi_version_major(&amp;id);</div><div class='ctx'> 		*minor = ipmi_version_minor(&amp;id);</div><div class='ctx'> 	}</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1432,9 +1429,9 @@ int ipmi_set_my_address(struct ipmi_user *user,</div><div class='ctx'> 			unsigned int  channel,</div><div class='ctx'> 			unsigned char address)</div><div class='ctx'> {</div><div class='del'>-	int index, rv = 0;</div><div class='add'>+	int rv = 0;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1444,7 +1441,7 @@ int ipmi_set_my_address(struct ipmi_user *user,</div><div class='ctx'> 		channel = array_index_nospec(channel, IPMI_MAX_CHANNELS);</div><div class='ctx'> 		user-&gt;intf-&gt;addrinfo[channel].address = address;</div><div class='ctx'> 	}</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1454,9 +1451,9 @@ int ipmi_get_my_address(struct ipmi_user *user,</div><div class='ctx'> 			unsigned int  channel,</div><div class='ctx'> 			unsigned char *address)</div><div class='ctx'> {</div><div class='del'>-	int index, rv = 0;</div><div class='add'>+	int rv = 0;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1466,7 +1463,7 @@ int ipmi_get_my_address(struct ipmi_user *user,</div><div class='ctx'> 		channel = array_index_nospec(channel, IPMI_MAX_CHANNELS);</div><div class='ctx'> 		*address = user-&gt;intf-&gt;addrinfo[channel].address;</div><div class='ctx'> 	}</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1476,9 +1473,9 @@ int ipmi_set_my_LUN(struct ipmi_user *user,</div><div class='ctx'> 		    unsigned int  channel,</div><div class='ctx'> 		    unsigned char LUN)</div><div class='ctx'> {</div><div class='del'>-	int index, rv = 0;</div><div class='add'>+	int rv = 0;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1488,7 +1485,7 @@ int ipmi_set_my_LUN(struct ipmi_user *user,</div><div class='ctx'> 		channel = array_index_nospec(channel, IPMI_MAX_CHANNELS);</div><div class='ctx'> 		user-&gt;intf-&gt;addrinfo[channel].lun = LUN &amp; 0x3;</div><div class='ctx'> 	}</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1498,9 +1495,9 @@ int ipmi_get_my_LUN(struct ipmi_user *user,</div><div class='ctx'> 		    unsigned int  channel,</div><div class='ctx'> 		    unsigned char *address)</div><div class='ctx'> {</div><div class='del'>-	int index, rv = 0;</div><div class='add'>+	int rv = 0;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1510,7 +1507,7 @@ int ipmi_get_my_LUN(struct ipmi_user *user,</div><div class='ctx'> 		channel = array_index_nospec(channel, IPMI_MAX_CHANNELS);</div><div class='ctx'> 		*address = user-&gt;intf-&gt;addrinfo[channel].lun;</div><div class='ctx'> 	}</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1518,17 +1515,17 @@ EXPORT_SYMBOL(ipmi_get_my_LUN);</div><div class='ctx'> </div><div class='ctx'> int ipmi_get_maintenance_mode(struct ipmi_user *user)</div><div class='ctx'> {</div><div class='del'>-	int mode, index;</div><div class='add'>+	int mode;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;user-&gt;intf-&gt;maintenance_mode_lock, flags);</div><div class='ctx'> 	mode = user-&gt;intf-&gt;maintenance_mode;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;user-&gt;intf-&gt;maintenance_mode_lock, flags);</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return mode;</div><div class='ctx'> }</div><div class='hunk'>@@ -1543,11 +1540,11 @@ static void maintenance_mode_update(struct ipmi_smi *intf)</div><div class='ctx'> </div><div class='ctx'> int ipmi_set_maintenance_mode(struct ipmi_user *user, int mode)</div><div class='ctx'> {</div><div class='del'>-	int rv = 0, index;</div><div class='add'>+	int rv = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct ipmi_smi *intf = user-&gt;intf;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1577,7 +1574,7 @@ int ipmi_set_maintenance_mode(struct ipmi_user *user, int mode)</div><div class='ctx'> 	}</div><div class='ctx'>  out_unlock:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;intf-&gt;maintenance_mode_lock, flags);</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1585,19 +1582,17 @@ EXPORT_SYMBOL(ipmi_set_maintenance_mode);</div><div class='ctx'> </div><div class='ctx'> int ipmi_set_gets_events(struct ipmi_user *user, bool val)</div><div class='ctx'> {</div><div class='del'>-	unsigned long        flags;</div><div class='ctx'> 	struct ipmi_smi      *intf = user-&gt;intf;</div><div class='ctx'> 	struct ipmi_recv_msg *msg, *msg2;</div><div class='ctx'> 	struct list_head     msgs;</div><div class='del'>-	int index;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;msgs);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;intf-&gt;events_lock, flags);</div><div class='add'>+	mutex_lock(&amp;intf-&gt;events_mutex);</div><div class='ctx'> 	if (user-&gt;gets_events == val)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -1610,13 +1605,6 @@ int ipmi_set_gets_events(struct ipmi_user *user, bool val)</div><div class='ctx'> 		atomic_dec(&amp;intf-&gt;event_waiters);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intf-&gt;delivering_events)</div><div class='del'>-		/*</div><div class='del'>-		 * Another thread is delivering events for this, so</div><div class='del'>-		 * let it handle any new events.</div><div class='del'>-		 */</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	/* Deliver any queued events. */</div><div class='ctx'> 	while (user-&gt;gets_events &amp;&amp; !list_empty(&amp;intf-&gt;waiting_events)) {</div><div class='ctx'> 		list_for_each_entry_safe(msg, msg2, &amp;intf-&gt;waiting_events, link)</div><div class='hunk'>@@ -1627,22 +1615,16 @@ int ipmi_set_gets_events(struct ipmi_user *user, bool val)</div><div class='ctx'> 			intf-&gt;event_msg_printed = 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		intf-&gt;delivering_events = 1;</div><div class='del'>-		spin_unlock_irqrestore(&amp;intf-&gt;events_lock, flags);</div><div class='del'>-</div><div class='ctx'> 		list_for_each_entry_safe(msg, msg2, &amp;msgs, link) {</div><div class='ctx'> 			msg-&gt;user = user;</div><div class='ctx'> 			kref_get(&amp;user-&gt;refcount);</div><div class='ctx'> 			deliver_local_response(intf, msg);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		spin_lock_irqsave(&amp;intf-&gt;events_lock, flags);</div><div class='del'>-		intf-&gt;delivering_events = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='del'>-	spin_unlock_irqrestore(&amp;intf-&gt;events_lock, flags);</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;events_mutex);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1687,9 +1669,9 @@ int ipmi_register_for_cmd(struct ipmi_user *user,</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi *intf = user-&gt;intf;</div><div class='ctx'> 	struct cmd_rcvr *rcvr;</div><div class='del'>-	int rv = 0, index;</div><div class='add'>+	int rv = 0;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1719,7 +1701,7 @@ out_unlock:</div><div class='ctx'> 	if (rv)</div><div class='ctx'> 		kfree(rcvr);</div><div class='ctx'> out_release:</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1733,9 +1715,9 @@ int ipmi_unregister_for_cmd(struct ipmi_user *user,</div><div class='ctx'> 	struct ipmi_smi *intf = user-&gt;intf;</div><div class='ctx'> 	struct cmd_rcvr *rcvr;</div><div class='ctx'> 	struct cmd_rcvr *rcvrs = NULL;</div><div class='del'>-	int i, rv = -ENOENT, index;</div><div class='add'>+	int i, rv = -ENOENT;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1758,7 +1740,7 @@ int ipmi_unregister_for_cmd(struct ipmi_user *user,</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;intf-&gt;cmd_rcvrs_mutex);</div><div class='ctx'> 	synchronize_rcu();</div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> 	while (rcvrs) {</div><div class='ctx'> 		smi_remove_watch(intf, IPMI_WATCH_MASK_CHECK_COMMANDS);</div><div class='ctx'> 		rcvr = rcvrs;</div><div class='hunk'>@@ -1882,13 +1864,12 @@ static void smi_send(struct ipmi_smi *intf,</div><div class='ctx'> 		     const struct ipmi_smi_handlers *handlers,</div><div class='ctx'> 		     struct ipmi_smi_msg *smi_msg, int priority)</div><div class='ctx'> {</div><div class='del'>-	int run_to_completion = intf-&gt;run_to_completion;</div><div class='add'>+	int run_to_completion = READ_ONCE(intf-&gt;run_to_completion);</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!run_to_completion)</div><div class='ctx'> 		spin_lock_irqsave(&amp;intf-&gt;xmit_msgs_lock, flags);</div><div class='ctx'> 	smi_msg = smi_add_send_msg(intf, smi_msg, priority);</div><div class='del'>-</div><div class='ctx'> 	if (!run_to_completion)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;intf-&gt;xmit_msgs_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -2304,6 +2285,7 @@ static int i_ipmi_request(struct ipmi_user     *user,</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi_msg *smi_msg;</div><div class='ctx'> 	struct ipmi_recv_msg *recv_msg;</div><div class='add'>+	int run_to_completion = READ_ONCE(intf-&gt;run_to_completion);</div><div class='ctx'> 	int rv = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (user) {</div><div class='hunk'>@@ -2337,7 +2319,8 @@ static int i_ipmi_request(struct ipmi_user     *user,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='add'>+	if (!run_to_completion)</div><div class='add'>+		mutex_lock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> 	if (intf-&gt;in_shutdown) {</div><div class='ctx'> 		rv = -ENODEV;</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -2383,7 +2366,8 @@ out_err:</div><div class='ctx'> </div><div class='ctx'> 		smi_send(intf, intf-&gt;handlers, smi_msg, priority);</div><div class='ctx'> 	}</div><div class='del'>-	rcu_read_unlock();</div><div class='add'>+	if (!run_to_completion)</div><div class='add'>+		mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	if (rv &amp;&amp; user)</div><div class='hunk'>@@ -2414,12 +2398,12 @@ int ipmi_request_settime(struct ipmi_user *user,</div><div class='ctx'> 			 unsigned int     retry_time_ms)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char saddr = 0, lun = 0;</div><div class='del'>-	int rv, index;</div><div class='add'>+	int rv;</div><div class='ctx'> </div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -2438,7 +2422,7 @@ int ipmi_request_settime(struct ipmi_user *user,</div><div class='ctx'> 				    retries,</div><div class='ctx'> 				    retry_time_ms);</div><div class='ctx'> </div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_request_settime);</div><div class='hunk'>@@ -2453,12 +2437,12 @@ int ipmi_request_supply_msgs(struct ipmi_user     *user,</div><div class='ctx'> 			     int                  priority)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char saddr = 0, lun = 0;</div><div class='del'>-	int rv, index;</div><div class='add'>+	int rv;</div><div class='ctx'> </div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	user = acquire_ipmi_user(user, &amp;index);</div><div class='add'>+	user = acquire_ipmi_user(user);</div><div class='ctx'> 	if (!user)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -2477,7 +2461,7 @@ int ipmi_request_supply_msgs(struct ipmi_user     *user,</div><div class='ctx'> 				    lun,</div><div class='ctx'> 				    -1, 0);</div><div class='ctx'> </div><div class='del'>-	release_ipmi_user(user, index);</div><div class='add'>+	release_ipmi_user(user);</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_request_supply_msgs);</div><div class='hunk'>@@ -3064,7 +3048,7 @@ cleanup_bmc_device(struct kref *ref)</div><div class='ctx'> 	 * with removing the device attributes while reading a device</div><div class='ctx'> 	 * attribute.</div><div class='ctx'> 	 */</div><div class='del'>-	queue_work(remove_work_wq, &amp;bmc-&gt;remove_work);</div><div class='add'>+	queue_work(bmc_remove_work_wq, &amp;bmc-&gt;remove_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -3520,15 +3504,14 @@ static ssize_t nr_msgs_show(struct device *dev,</div><div class='ctx'> 			    char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi *intf = container_of(attr,</div><div class='del'>-			 struct ipmi_smi, nr_msgs_devattr);</div><div class='add'>+					     struct ipmi_smi, nr_msgs_devattr);</div><div class='ctx'> 	struct ipmi_user *user;</div><div class='del'>-	int index;</div><div class='ctx'> 	unsigned int count = 0;</div><div class='ctx'> </div><div class='del'>-	index = srcu_read_lock(&amp;intf-&gt;users_srcu);</div><div class='del'>-	list_for_each_entry_rcu(user, &amp;intf-&gt;users, link)</div><div class='add'>+	mutex_lock(&amp;intf-&gt;users_mutex);</div><div class='add'>+	list_for_each_entry(user, &amp;intf-&gt;users, link)</div><div class='ctx'> 		count += atomic_read(&amp;user-&gt;nr_msgs);</div><div class='del'>-	srcu_read_unlock(&amp;intf-&gt;users_srcu, index);</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return sysfs_emit(buf, "%u\n", count);</div><div class='ctx'> }</div><div class='hunk'>@@ -3569,12 +3552,6 @@ int ipmi_add_smi(struct module         *owner,</div><div class='ctx'> 	if (!intf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	rv = init_srcu_struct(&amp;intf-&gt;users_srcu);</div><div class='del'>-	if (rv) {</div><div class='del'>-		kfree(intf);</div><div class='del'>-		return rv;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	intf-&gt;owner = owner;</div><div class='ctx'> 	intf-&gt;bmc = &amp;intf-&gt;tmp_bmc;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;intf-&gt;bmc-&gt;intfs);</div><div class='hunk'>@@ -3591,7 +3568,10 @@ int ipmi_add_smi(struct module         *owner,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (slave_addr != 0)</div><div class='ctx'> 		intf-&gt;addrinfo[0].address = slave_addr;</div><div class='add'>+	INIT_LIST_HEAD(&amp;intf-&gt;user_msgs);</div><div class='add'>+	mutex_init(&amp;intf-&gt;user_msgs_mutex);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;intf-&gt;users);</div><div class='add'>+	mutex_init(&amp;intf-&gt;users_mutex);</div><div class='ctx'> 	atomic_set(&amp;intf-&gt;nr_users, 0);</div><div class='ctx'> 	intf-&gt;handlers = handlers;</div><div class='ctx'> 	intf-&gt;send_info = send_info;</div><div class='hunk'>@@ -3603,12 +3583,12 @@ int ipmi_add_smi(struct module         *owner,</div><div class='ctx'> 	intf-&gt;curr_seq = 0;</div><div class='ctx'> 	spin_lock_init(&amp;intf-&gt;waiting_rcv_msgs_lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;intf-&gt;waiting_rcv_msgs);</div><div class='del'>-	INIT_WORK(&amp;intf-&gt;recv_work, smi_recv_work);</div><div class='add'>+	INIT_WORK(&amp;intf-&gt;smi_work, smi_work);</div><div class='ctx'> 	atomic_set(&amp;intf-&gt;watchdog_pretimeouts_to_deliver, 0);</div><div class='ctx'> 	spin_lock_init(&amp;intf-&gt;xmit_msgs_lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;intf-&gt;xmit_msgs);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;intf-&gt;hp_xmit_msgs);</div><div class='del'>-	spin_lock_init(&amp;intf-&gt;events_lock);</div><div class='add'>+	mutex_init(&amp;intf-&gt;events_mutex);</div><div class='ctx'> 	spin_lock_init(&amp;intf-&gt;watch_lock);</div><div class='ctx'> 	atomic_set(&amp;intf-&gt;event_waiters, 0);</div><div class='ctx'> 	intf-&gt;ticks_to_req_ev = IPMI_REQUEST_EV_TIME;</div><div class='hunk'>@@ -3621,12 +3601,16 @@ int ipmi_add_smi(struct module         *owner,</div><div class='ctx'> 	for (i = 0; i &lt; IPMI_NUM_STATS; i++)</div><div class='ctx'> 		atomic_set(&amp;intf-&gt;stats[i], 0);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Grab the watchers mutex so we can deliver the new interface</div><div class='add'>+	 * without races.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;smi_watchers_mutex);</div><div class='ctx'> 	mutex_lock(&amp;ipmi_interfaces_mutex);</div><div class='ctx'> 	/* Look for a hole in the numbers. */</div><div class='ctx'> 	i = 0;</div><div class='ctx'> 	link = &amp;ipmi_interfaces;</div><div class='del'>-	list_for_each_entry_rcu(tintf, &amp;ipmi_interfaces, link,</div><div class='del'>-				ipmi_interfaces_mutex_held()) {</div><div class='add'>+	list_for_each_entry(tintf, &amp;ipmi_interfaces, link) {</div><div class='ctx'> 		if (tintf-&gt;intf_num != i) {</div><div class='ctx'> 			link = &amp;tintf-&gt;link;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -3635,9 +3619,9 @@ int ipmi_add_smi(struct module         *owner,</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Add the new interface in numeric order. */</div><div class='ctx'> 	if (i == 0)</div><div class='del'>-		list_add_rcu(&amp;intf-&gt;link, &amp;ipmi_interfaces);</div><div class='add'>+		list_add(&amp;intf-&gt;link, &amp;ipmi_interfaces);</div><div class='ctx'> 	else</div><div class='del'>-		list_add_tail_rcu(&amp;intf-&gt;link, link);</div><div class='add'>+		list_add_tail(&amp;intf-&gt;link, link);</div><div class='ctx'> </div><div class='ctx'> 	rv = handlers-&gt;start_processing(send_info, intf);</div><div class='ctx'> 	if (rv)</div><div class='hunk'>@@ -3669,18 +3653,14 @@ int ipmi_add_smi(struct module         *owner,</div><div class='ctx'> 		goto out_err_bmc_reg;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Keep memory order straight for RCU readers.  Make</div><div class='del'>-	 * sure everything else is committed to memory before</div><div class='del'>-	 * setting intf_num to mark the interface valid.</div><div class='del'>-	 */</div><div class='del'>-	smp_wmb();</div><div class='ctx'> 	intf-&gt;intf_num = i;</div><div class='ctx'> 	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* After this point the interface is legal to use. */</div><div class='ctx'> 	call_smi_watchers(i, intf-&gt;si_dev);</div><div class='ctx'> </div><div class='add'>+	mutex_unlock(&amp;smi_watchers_mutex);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  out_err_bmc_reg:</div><div class='hunk'>@@ -3689,10 +3669,9 @@ int ipmi_add_smi(struct module         *owner,</div><div class='ctx'> 	if (intf-&gt;handlers-&gt;shutdown)</div><div class='ctx'> 		intf-&gt;handlers-&gt;shutdown(intf-&gt;send_info);</div><div class='ctx'>  out_err:</div><div class='del'>-	list_del_rcu(&amp;intf-&gt;link);</div><div class='add'>+	list_del(&amp;intf-&gt;link);</div><div class='ctx'> 	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='del'>-	synchronize_srcu(&amp;ipmi_interfaces_srcu);</div><div class='del'>-	cleanup_srcu_struct(&amp;intf-&gt;users_srcu);</div><div class='add'>+	mutex_unlock(&amp;smi_watchers_mutex);</div><div class='ctx'> 	kref_put(&amp;intf-&gt;refcount, intf_free);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='hunk'>@@ -3758,19 +3737,28 @@ static void cleanup_smi_msgs(struct ipmi_smi *intf)</div><div class='ctx'> void ipmi_unregister_smi(struct ipmi_smi *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi_watcher *w;</div><div class='del'>-	int intf_num, index;</div><div class='add'>+	int intf_num;</div><div class='ctx'> </div><div class='ctx'> 	if (!intf)</div><div class='ctx'> 		return;</div><div class='add'>+</div><div class='ctx'> 	intf_num = intf-&gt;intf_num;</div><div class='ctx'> 	mutex_lock(&amp;ipmi_interfaces_mutex);</div><div class='add'>+	cancel_work_sync(&amp;intf-&gt;smi_work);</div><div class='add'>+	/* smi_work() can no longer be in progress after this. */</div><div class='add'>+</div><div class='ctx'> 	intf-&gt;intf_num = -1;</div><div class='ctx'> 	intf-&gt;in_shutdown = true;</div><div class='del'>-	list_del_rcu(&amp;intf-&gt;link);</div><div class='add'>+	list_del(&amp;intf-&gt;link);</div><div class='ctx'> 	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='del'>-	synchronize_srcu(&amp;ipmi_interfaces_srcu);</div><div class='ctx'> </div><div class='del'>-	/* At this point no users can be added to the interface. */</div><div class='add'>+	/*</div><div class='add'>+	 * At this point no users can be added to the interface and no</div><div class='add'>+	 * new messages can be sent.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (intf-&gt;handlers-&gt;shutdown)</div><div class='add'>+		intf-&gt;handlers-&gt;shutdown(intf-&gt;send_info);</div><div class='ctx'> </div><div class='ctx'> 	device_remove_file(intf-&gt;si_dev, &amp;intf-&gt;nr_msgs_devattr);</div><div class='ctx'> 	device_remove_file(intf-&gt;si_dev, &amp;intf-&gt;nr_users_devattr);</div><div class='hunk'>@@ -3784,24 +3772,19 @@ void ipmi_unregister_smi(struct ipmi_smi *intf)</div><div class='ctx'> 		w-&gt;smi_gone(intf_num);</div><div class='ctx'> 	mutex_unlock(&amp;smi_watchers_mutex);</div><div class='ctx'> </div><div class='del'>-	index = srcu_read_lock(&amp;intf-&gt;users_srcu);</div><div class='add'>+	mutex_lock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> 	while (!list_empty(&amp;intf-&gt;users)) {</div><div class='del'>-		struct ipmi_user *user =</div><div class='del'>-			container_of(list_next_rcu(&amp;intf-&gt;users),</div><div class='del'>-				     struct ipmi_user, link);</div><div class='add'>+		struct ipmi_user *user = list_first_entry(&amp;intf-&gt;users,</div><div class='add'>+						    struct ipmi_user, link);</div><div class='ctx'> </div><div class='ctx'> 		_ipmi_destroy_user(user);</div><div class='ctx'> 	}</div><div class='del'>-	srcu_read_unlock(&amp;intf-&gt;users_srcu, index);</div><div class='del'>-</div><div class='del'>-	if (intf-&gt;handlers-&gt;shutdown)</div><div class='del'>-		intf-&gt;handlers-&gt;shutdown(intf-&gt;send_info);</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> </div><div class='ctx'> 	cleanup_smi_msgs(intf);</div><div class='ctx'> </div><div class='ctx'> 	ipmi_bmc_unregister(intf);</div><div class='ctx'> </div><div class='del'>-	cleanup_srcu_struct(&amp;intf-&gt;users_srcu);</div><div class='ctx'> 	kref_put(&amp;intf-&gt;refcount, intf_free);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_unregister_smi);</div><div class='hunk'>@@ -3926,17 +3909,12 @@ static int handle_ipmb_get_msg_cmd(struct ipmi_smi *intf,</div><div class='ctx'> 		dev_dbg(intf-&gt;si_dev, "Invalid command: %*ph\n",</div><div class='ctx'> 			msg-&gt;data_size, msg-&gt;data);</div><div class='ctx'> </div><div class='del'>-		rcu_read_lock();</div><div class='del'>-		if (!intf-&gt;in_shutdown) {</div><div class='del'>-			smi_send(intf, intf-&gt;handlers, msg, 0);</div><div class='del'>-			/*</div><div class='del'>-			 * We used the message, so return the value</div><div class='del'>-			 * that causes it to not be freed or</div><div class='del'>-			 * queued.</div><div class='del'>-			 */</div><div class='del'>-			rv = -1;</div><div class='del'>-		}</div><div class='del'>-		rcu_read_unlock();</div><div class='add'>+		smi_send(intf, intf-&gt;handlers, msg, 0);</div><div class='add'>+		/*</div><div class='add'>+		 * We used the message, so return the value that</div><div class='add'>+		 * causes it to not be freed or queued.</div><div class='add'>+		 */</div><div class='add'>+		rv = -1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		recv_msg = ipmi_alloc_recv_msg();</div><div class='ctx'> 		if (!recv_msg) {</div><div class='hunk'>@@ -3946,7 +3924,7 @@ static int handle_ipmb_get_msg_cmd(struct ipmi_smi *intf,</div><div class='ctx'> 			 * later.</div><div class='ctx'> 			 */</div><div class='ctx'> 			rv = 1;</div><div class='del'>-			kref_put(&amp;user-&gt;refcount, free_user);</div><div class='add'>+			kref_put(&amp;user-&gt;refcount, free_ipmi_user);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Extract the source address from the data. */</div><div class='ctx'> 			ipmb_addr = (struct ipmi_ipmb_addr *) &amp;recv_msg-&gt;addr;</div><div class='hunk'>@@ -4017,17 +3995,12 @@ static int handle_ipmb_direct_rcv_cmd(struct ipmi_smi *intf,</div><div class='ctx'> 		msg-&gt;data[4] = IPMI_INVALID_CMD_COMPLETION_CODE;</div><div class='ctx'> 		msg-&gt;data_size = 5;</div><div class='ctx'> </div><div class='del'>-		rcu_read_lock();</div><div class='del'>-		if (!intf-&gt;in_shutdown) {</div><div class='del'>-			smi_send(intf, intf-&gt;handlers, msg, 0);</div><div class='del'>-			/*</div><div class='del'>-			 * We used the message, so return the value</div><div class='del'>-			 * that causes it to not be freed or</div><div class='del'>-			 * queued.</div><div class='del'>-			 */</div><div class='del'>-			rv = -1;</div><div class='del'>-		}</div><div class='del'>-		rcu_read_unlock();</div><div class='add'>+		smi_send(intf, intf-&gt;handlers, msg, 0);</div><div class='add'>+		/*</div><div class='add'>+		 * We used the message, so return the value that</div><div class='add'>+		 * causes it to not be freed or queued.</div><div class='add'>+		 */</div><div class='add'>+		rv = -1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		recv_msg = ipmi_alloc_recv_msg();</div><div class='ctx'> 		if (!recv_msg) {</div><div class='hunk'>@@ -4037,7 +4010,7 @@ static int handle_ipmb_direct_rcv_cmd(struct ipmi_smi *intf,</div><div class='ctx'> 			 * later.</div><div class='ctx'> 			 */</div><div class='ctx'> 			rv = 1;</div><div class='del'>-			kref_put(&amp;user-&gt;refcount, free_user);</div><div class='add'>+			kref_put(&amp;user-&gt;refcount, free_ipmi_user);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Extract the source address from the data. */</div><div class='ctx'> 			daddr = (struct ipmi_ipmb_direct_addr *)&amp;recv_msg-&gt;addr;</div><div class='hunk'>@@ -4206,14 +4179,33 @@ static int handle_lan_get_msg_cmd(struct ipmi_smi *intf,</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (user == NULL) {</div><div class='del'>-		/* We didn't find a user, just give up. */</div><div class='add'>+		/* We didn't find a user, just give up and return an error. */</div><div class='ctx'> 		ipmi_inc_stat(intf, unhandled_commands);</div><div class='ctx'> </div><div class='add'>+		msg-&gt;data[0] = (IPMI_NETFN_APP_REQUEST &lt;&lt; 2);</div><div class='add'>+		msg-&gt;data[1] = IPMI_SEND_MSG_CMD;</div><div class='add'>+		msg-&gt;data[2] = chan;</div><div class='add'>+		msg-&gt;data[3] = msg-&gt;rsp[4]; /* handle */</div><div class='add'>+		msg-&gt;data[4] = msg-&gt;rsp[8]; /* rsSWID */</div><div class='add'>+		msg-&gt;data[5] = ((netfn + 1) &lt;&lt; 2) | (msg-&gt;rsp[9] &amp; 0x3);</div><div class='add'>+		msg-&gt;data[6] = ipmb_checksum(&amp;msg-&gt;data[3], 3);</div><div class='add'>+		msg-&gt;data[7] = msg-&gt;rsp[5]; /* rqSWID */</div><div class='add'>+		/* rqseq/lun */</div><div class='add'>+		msg-&gt;data[8] = (msg-&gt;rsp[9] &amp; 0xfc) | (msg-&gt;rsp[6] &amp; 0x3);</div><div class='add'>+		msg-&gt;data[9] = cmd;</div><div class='add'>+		msg-&gt;data[10] = IPMI_INVALID_CMD_COMPLETION_CODE;</div><div class='add'>+		msg-&gt;data[11] = ipmb_checksum(&amp;msg-&gt;data[7], 4);</div><div class='add'>+		msg-&gt;data_size = 12;</div><div class='add'>+</div><div class='add'>+		dev_dbg(intf-&gt;si_dev, "Invalid command: %*ph\n",</div><div class='add'>+			msg-&gt;data_size, msg-&gt;data);</div><div class='add'>+</div><div class='add'>+		smi_send(intf, intf-&gt;handlers, msg, 0);</div><div class='ctx'> 		/*</div><div class='del'>-		 * Don't do anything with these messages, just allow</div><div class='del'>-		 * them to be freed.</div><div class='add'>+		 * We used the message, so return the value that</div><div class='add'>+		 * causes it to not be freed or queued.</div><div class='ctx'> 		 */</div><div class='del'>-		rv = 0;</div><div class='add'>+		rv = -1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		recv_msg = ipmi_alloc_recv_msg();</div><div class='ctx'> 		if (!recv_msg) {</div><div class='hunk'>@@ -4222,7 +4214,7 @@ static int handle_lan_get_msg_cmd(struct ipmi_smi *intf,</div><div class='ctx'> 			 * message, so requeue it for handling later.</div><div class='ctx'> 			 */</div><div class='ctx'> 			rv = 1;</div><div class='del'>-			kref_put(&amp;user-&gt;refcount, free_user);</div><div class='add'>+			kref_put(&amp;user-&gt;refcount, free_ipmi_user);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Extract the source address from the data. */</div><div class='ctx'> 			lan_addr = (struct ipmi_lan_addr *) &amp;recv_msg-&gt;addr;</div><div class='hunk'>@@ -4331,7 +4323,7 @@ static int handle_oem_get_msg_cmd(struct ipmi_smi *intf,</div><div class='ctx'> 			 * later.</div><div class='ctx'> 			 */</div><div class='ctx'> 			rv = 1;</div><div class='del'>-			kref_put(&amp;user-&gt;refcount, free_user);</div><div class='add'>+			kref_put(&amp;user-&gt;refcount, free_ipmi_user);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * OEM Messages are expected to be delivered via</div><div class='hunk'>@@ -4393,8 +4385,7 @@ static int handle_read_event_rsp(struct ipmi_smi *intf,</div><div class='ctx'> 	struct ipmi_recv_msg *recv_msg, *recv_msg2;</div><div class='ctx'> 	struct list_head     msgs;</div><div class='ctx'> 	struct ipmi_user     *user;</div><div class='del'>-	int rv = 0, deliver_count = 0, index;</div><div class='del'>-	unsigned long        flags;</div><div class='add'>+	int rv = 0, deliver_count = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (msg-&gt;rsp_size &lt; 19) {</div><div class='ctx'> 		/* Message is too small to be an IPMB event. */</div><div class='hunk'>@@ -4409,7 +4400,7 @@ static int handle_read_event_rsp(struct ipmi_smi *intf,</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;msgs);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;intf-&gt;events_lock, flags);</div><div class='add'>+	mutex_lock(&amp;intf-&gt;events_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ipmi_inc_stat(intf, events);</div><div class='ctx'> </div><div class='hunk'>@@ -4417,18 +4408,20 @@ static int handle_read_event_rsp(struct ipmi_smi *intf,</div><div class='ctx'> 	 * Allocate and fill in one message for every user that is</div><div class='ctx'> 	 * getting events.</div><div class='ctx'> 	 */</div><div class='del'>-	index = srcu_read_lock(&amp;intf-&gt;users_srcu);</div><div class='del'>-	list_for_each_entry_rcu(user, &amp;intf-&gt;users, link) {</div><div class='add'>+	mutex_lock(&amp;intf-&gt;users_mutex);</div><div class='add'>+	list_for_each_entry(user, &amp;intf-&gt;users, link) {</div><div class='ctx'> 		if (!user-&gt;gets_events)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		recv_msg = ipmi_alloc_recv_msg();</div><div class='ctx'> 		if (!recv_msg) {</div><div class='del'>-			rcu_read_unlock();</div><div class='add'>+			mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> 			list_for_each_entry_safe(recv_msg, recv_msg2, &amp;msgs,</div><div class='ctx'> 						 link) {</div><div class='add'>+				user = recv_msg-&gt;user;</div><div class='ctx'> 				list_del(&amp;recv_msg-&gt;link);</div><div class='ctx'> 				ipmi_free_recv_msg(recv_msg);</div><div class='add'>+				kref_put(&amp;user-&gt;refcount, free_ipmi_user);</div><div class='ctx'> 			}</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * We couldn't allocate memory for the</div><div class='hunk'>@@ -4446,7 +4439,7 @@ static int handle_read_event_rsp(struct ipmi_smi *intf,</div><div class='ctx'> 		kref_get(&amp;user-&gt;refcount);</div><div class='ctx'> 		list_add_tail(&amp;recv_msg-&gt;link, &amp;msgs);</div><div class='ctx'> 	}</div><div class='del'>-	srcu_read_unlock(&amp;intf-&gt;users_srcu, index);</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (deliver_count) {</div><div class='ctx'> 		/* Now deliver all the messages. */</div><div class='hunk'>@@ -4484,7 +4477,7 @@ static int handle_read_event_rsp(struct ipmi_smi *intf,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='del'>-	spin_unlock_irqrestore(&amp;intf-&gt;events_lock, flags);</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;events_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='hunk'>@@ -4570,7 +4563,7 @@ return_unspecified:</div><div class='ctx'> 	    &amp;&amp; (msg-&gt;data[1] == IPMI_SEND_MSG_CMD)</div><div class='ctx'> 	    &amp;&amp; (msg-&gt;user_data == NULL)) {</div><div class='ctx'> </div><div class='del'>-		if (intf-&gt;in_shutdown)</div><div class='add'>+		if (intf-&gt;in_shutdown || intf-&gt;run_to_completion)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -4642,6 +4635,9 @@ return_unspecified:</div><div class='ctx'> 		 */</div><div class='ctx'> 		struct ipmi_recv_msg *recv_msg;</div><div class='ctx'> </div><div class='add'>+		if (intf-&gt;run_to_completion)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='ctx'> 		chan = msg-&gt;data[2] &amp; 0x0f;</div><div class='ctx'> 		if (chan &gt;= IPMI_MAX_CHANNELS)</div><div class='ctx'> 			/* Invalid channel number */</div><div class='hunk'>@@ -4664,6 +4660,9 @@ process_response_response:</div><div class='ctx'> 		   &amp;&amp; (msg-&gt;rsp[1] == IPMI_GET_MSG_CMD)) {</div><div class='ctx'> 		struct ipmi_channel   *chans;</div><div class='ctx'> </div><div class='add'>+		if (intf-&gt;run_to_completion)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='ctx'> 		/* It's from the receive queue. */</div><div class='ctx'> 		chan = msg-&gt;rsp[3] &amp; 0xf;</div><div class='ctx'> 		if (chan &gt;= IPMI_MAX_CHANNELS) {</div><div class='hunk'>@@ -4738,6 +4737,9 @@ process_response_response:</div><div class='ctx'> 	} else if ((msg-&gt;rsp[0] == ((IPMI_NETFN_APP_REQUEST|1) &lt;&lt; 2))</div><div class='ctx'> 		   &amp;&amp; (msg-&gt;rsp[1] == IPMI_READ_EVENT_MSG_BUFFER_CMD)) {</div><div class='ctx'> 		/* It's an asynchronous event. */</div><div class='add'>+		if (intf-&gt;run_to_completion)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='ctx'> 		requeue = handle_read_event_rsp(intf, msg);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* It's a response from the local BMC. */</div><div class='hunk'>@@ -4753,10 +4755,10 @@ process_response_response:</div><div class='ctx'>  */</div><div class='ctx'> static void handle_new_recv_msgs(struct ipmi_smi *intf)</div><div class='ctx'> {</div><div class='del'>-	struct ipmi_smi_msg  *smi_msg;</div><div class='del'>-	unsigned long        flags = 0;</div><div class='del'>-	int                  rv;</div><div class='del'>-	int                  run_to_completion = intf-&gt;run_to_completion;</div><div class='add'>+	struct ipmi_smi_msg *smi_msg;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	int rv;</div><div class='add'>+	int run_to_completion = READ_ONCE(intf-&gt;run_to_completion);</div><div class='ctx'> </div><div class='ctx'> 	/* See if any waiting messages need to be processed. */</div><div class='ctx'> 	if (!run_to_completion)</div><div class='hunk'>@@ -4790,31 +4792,15 @@ static void handle_new_recv_msgs(struct ipmi_smi *intf)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!run_to_completion)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;intf-&gt;waiting_rcv_msgs_lock, flags);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the pretimout count is non-zero, decrement one from it and</div><div class='del'>-	 * deliver pretimeouts to all the users.</div><div class='del'>-	 */</div><div class='del'>-	if (atomic_add_unless(&amp;intf-&gt;watchdog_pretimeouts_to_deliver, -1, 0)) {</div><div class='del'>-		struct ipmi_user *user;</div><div class='del'>-		int index;</div><div class='del'>-</div><div class='del'>-		index = srcu_read_lock(&amp;intf-&gt;users_srcu);</div><div class='del'>-		list_for_each_entry_rcu(user, &amp;intf-&gt;users, link) {</div><div class='del'>-			if (user-&gt;handler-&gt;ipmi_watchdog_pretimeout)</div><div class='del'>-				user-&gt;handler-&gt;ipmi_watchdog_pretimeout(</div><div class='del'>-					user-&gt;handler_data);</div><div class='del'>-		}</div><div class='del'>-		srcu_read_unlock(&amp;intf-&gt;users_srcu, index);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void smi_recv_work(struct work_struct *t)</div><div class='add'>+static void smi_work(struct work_struct *t)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = 0; /* keep us warning-free. */</div><div class='del'>-	struct ipmi_smi *intf = from_work(intf, t, recv_work);</div><div class='del'>-	int run_to_completion = intf-&gt;run_to_completion;</div><div class='add'>+	struct ipmi_smi *intf = from_work(intf, t, smi_work);</div><div class='add'>+	int run_to_completion = READ_ONCE(intf-&gt;run_to_completion);</div><div class='ctx'> 	struct ipmi_smi_msg *newmsg = NULL;</div><div class='add'>+	struct ipmi_recv_msg *msg, *msg2;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Start the next message if available.</div><div class='hunk'>@@ -4824,8 +4810,6 @@ static void smi_recv_work(struct work_struct *t)</div><div class='ctx'> 	 * message delivery.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-</div><div class='ctx'> 	if (!run_to_completion)</div><div class='ctx'> 		spin_lock_irqsave(&amp;intf-&gt;xmit_msgs_lock, flags);</div><div class='ctx'> 	if (intf-&gt;curr_msg == NULL &amp;&amp; !intf-&gt;in_shutdown) {</div><div class='hunk'>@@ -4843,15 +4827,57 @@ static void smi_recv_work(struct work_struct *t)</div><div class='ctx'> 			intf-&gt;curr_msg = newmsg;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	if (!run_to_completion)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;intf-&gt;xmit_msgs_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	if (newmsg)</div><div class='ctx'> 		intf-&gt;handlers-&gt;sender(intf-&gt;send_info, newmsg);</div><div class='ctx'> </div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='ctx'> 	handle_new_recv_msgs(intf);</div><div class='add'>+</div><div class='add'>+	/* Nothing below applies during panic time. */</div><div class='add'>+	if (run_to_completion)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If the pretimout count is non-zero, decrement one from it and</div><div class='add'>+	 * deliver pretimeouts to all the users.</div><div class='add'>+	 */</div><div class='add'>+	if (atomic_add_unless(&amp;intf-&gt;watchdog_pretimeouts_to_deliver, -1, 0)) {</div><div class='add'>+		struct ipmi_user *user;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;intf-&gt;users_mutex);</div><div class='add'>+		list_for_each_entry(user, &amp;intf-&gt;users, link) {</div><div class='add'>+			if (user-&gt;handler-&gt;ipmi_watchdog_pretimeout)</div><div class='add'>+				user-&gt;handler-&gt;ipmi_watchdog_pretimeout(</div><div class='add'>+					user-&gt;handler_data);</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;intf-&gt;users_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Freeing the message can cause a user to be released, which</div><div class='add'>+	 * can then cause the interface to be freed.  Make sure that</div><div class='add'>+	 * doesn't happen until we are ready.</div><div class='add'>+	 */</div><div class='add'>+	kref_get(&amp;intf-&gt;refcount);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;intf-&gt;user_msgs_mutex);</div><div class='add'>+	list_for_each_entry_safe(msg, msg2, &amp;intf-&gt;user_msgs, link) {</div><div class='add'>+		struct ipmi_user *user = msg-&gt;user;</div><div class='add'>+</div><div class='add'>+		list_del(&amp;msg-&gt;link);</div><div class='add'>+</div><div class='add'>+		if (refcount_read(&amp;user-&gt;destroyed) == 0) {</div><div class='add'>+			ipmi_free_recv_msg(msg);</div><div class='add'>+		} else {</div><div class='add'>+			atomic_dec(&amp;user-&gt;nr_msgs);</div><div class='add'>+			user-&gt;handler-&gt;ipmi_recv_hndl(msg, user-&gt;handler_data);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;intf-&gt;user_msgs_mutex);</div><div class='add'>+</div><div class='add'>+	kref_put(&amp;intf-&gt;refcount, intf_free);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Handle a new message from the lower layer. */</div><div class='hunk'>@@ -4859,7 +4885,7 @@ void ipmi_smi_msg_received(struct ipmi_smi *intf,</div><div class='ctx'> 			   struct ipmi_smi_msg *msg)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = 0; /* keep us warning-free. */</div><div class='del'>-	int run_to_completion = intf-&gt;run_to_completion;</div><div class='add'>+	int run_to_completion = READ_ONCE(intf-&gt;run_to_completion);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * To preserve message order, we keep a queue and deliver from</div><div class='hunk'>@@ -4884,9 +4910,9 @@ void ipmi_smi_msg_received(struct ipmi_smi *intf,</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;intf-&gt;xmit_msgs_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (run_to_completion)</div><div class='del'>-		smi_recv_work(&amp;intf-&gt;recv_work);</div><div class='add'>+		smi_work(&amp;intf-&gt;smi_work);</div><div class='ctx'> 	else</div><div class='del'>-		queue_work(system_bh_wq, &amp;intf-&gt;recv_work);</div><div class='add'>+		queue_work(system_wq, &amp;intf-&gt;smi_work);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_smi_msg_received);</div><div class='ctx'> </div><div class='hunk'>@@ -4896,7 +4922,7 @@ void ipmi_smi_watchdog_pretimeout(struct ipmi_smi *intf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;intf-&gt;watchdog_pretimeouts_to_deliver, 1);</div><div class='del'>-	queue_work(system_bh_wq, &amp;intf-&gt;recv_work);</div><div class='add'>+	queue_work(system_wq, &amp;intf-&gt;smi_work);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_smi_watchdog_pretimeout);</div><div class='ctx'> </div><div class='hunk'>@@ -5065,7 +5091,7 @@ static bool ipmi_timeout_handler(struct ipmi_smi *intf,</div><div class='ctx'> 				       flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	queue_work(system_bh_wq, &amp;intf-&gt;recv_work);</div><div class='add'>+	queue_work(system_wq, &amp;intf-&gt;smi_work);</div><div class='ctx'> </div><div class='ctx'> 	return need_timer;</div><div class='ctx'> }</div><div class='hunk'>@@ -5084,17 +5110,19 @@ static struct timer_list ipmi_timer;</div><div class='ctx'> </div><div class='ctx'> static atomic_t stop_operation;</div><div class='ctx'> </div><div class='del'>-static void ipmi_timeout(struct timer_list *unused)</div><div class='add'>+static void ipmi_timeout_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='add'>+	if (atomic_read(&amp;stop_operation))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	struct ipmi_smi *intf;</div><div class='ctx'> 	bool need_timer = false;</div><div class='del'>-	int index;</div><div class='ctx'> </div><div class='ctx'> 	if (atomic_read(&amp;stop_operation))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	index = srcu_read_lock(&amp;ipmi_interfaces_srcu);</div><div class='del'>-	list_for_each_entry_rcu(intf, &amp;ipmi_interfaces, link) {</div><div class='add'>+	mutex_lock(&amp;ipmi_interfaces_mutex);</div><div class='add'>+	list_for_each_entry(intf, &amp;ipmi_interfaces, link) {</div><div class='ctx'> 		if (atomic_read(&amp;intf-&gt;event_waiters)) {</div><div class='ctx'> 			intf-&gt;ticks_to_req_ev--;</div><div class='ctx'> 			if (intf-&gt;ticks_to_req_ev == 0) {</div><div class='hunk'>@@ -5106,12 +5134,22 @@ static void ipmi_timeout(struct timer_list *unused)</div><div class='ctx'> </div><div class='ctx'> 		need_timer |= ipmi_timeout_handler(intf, IPMI_TIMEOUT_TIME);</div><div class='ctx'> 	}</div><div class='del'>-	srcu_read_unlock(&amp;ipmi_interfaces_srcu, index);</div><div class='add'>+	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (need_timer)</div><div class='ctx'> 		mod_timer(&amp;ipmi_timer, jiffies + IPMI_TIMEOUT_JIFFIES);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static DECLARE_WORK(ipmi_timer_work, ipmi_timeout_work);</div><div class='add'>+</div><div class='add'>+static void ipmi_timeout(struct timer_list *unused)</div><div class='add'>+{</div><div class='add'>+	if (atomic_read(&amp;stop_operation))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	queue_work(system_wq, &amp;ipmi_timer_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void need_waiter(struct ipmi_smi *intf)</div><div class='ctx'> {</div><div class='ctx'> 	/* Racy, but worst case we start the timer twice. */</div><div class='hunk'>@@ -5168,7 +5206,7 @@ static struct ipmi_recv_msg *ipmi_alloc_recv_msg(void)</div><div class='ctx'> void ipmi_free_recv_msg(struct ipmi_recv_msg *msg)</div><div class='ctx'> {</div><div class='ctx'> 	if (msg-&gt;user &amp;&amp; !oops_in_progress)</div><div class='del'>-		kref_put(&amp;msg-&gt;user-&gt;refcount, free_user);</div><div class='add'>+		kref_put(&amp;msg-&gt;user-&gt;refcount, free_ipmi_user);</div><div class='ctx'> 	msg-&gt;done(msg);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ipmi_free_recv_msg);</div><div class='hunk'>@@ -5188,9 +5226,9 @@ static void dummy_recv_done_handler(struct ipmi_recv_msg *msg)</div><div class='ctx'> /*</div><div class='ctx'>  * Inside a panic, send a message and wait for a response.</div><div class='ctx'>  */</div><div class='del'>-static void ipmi_panic_request_and_wait(struct ipmi_smi *intf,</div><div class='del'>-					struct ipmi_addr *addr,</div><div class='del'>-					struct kernel_ipmi_msg *msg)</div><div class='add'>+static void _ipmi_panic_request_and_wait(struct ipmi_smi *intf,</div><div class='add'>+					 struct ipmi_addr *addr,</div><div class='add'>+					 struct kernel_ipmi_msg *msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_smi_msg  smi_msg;</div><div class='ctx'> 	struct ipmi_recv_msg recv_msg;</div><div class='hunk'>@@ -5220,6 +5258,15 @@ static void ipmi_panic_request_and_wait(struct ipmi_smi *intf,</div><div class='ctx'> 		ipmi_poll(intf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ipmi_panic_request_and_wait(struct ipmi_user *user,</div><div class='add'>+				 struct ipmi_addr *addr,</div><div class='add'>+				 struct kernel_ipmi_msg *msg)</div><div class='add'>+{</div><div class='add'>+	user-&gt;intf-&gt;run_to_completion = 1;</div><div class='add'>+	_ipmi_panic_request_and_wait(user-&gt;intf, addr, msg);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ipmi_panic_request_and_wait);</div><div class='add'>+</div><div class='ctx'> static void event_receiver_fetcher(struct ipmi_smi *intf,</div><div class='ctx'> 				   struct ipmi_recv_msg *msg)</div><div class='ctx'> {</div><div class='hunk'>@@ -5288,7 +5335,7 @@ static void send_panic_events(struct ipmi_smi *intf, char *str)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Send the event announcing the panic. */</div><div class='del'>-	ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='add'>+	_ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * On every interface, dump a bunch of OEM event holding the</div><div class='hunk'>@@ -5324,7 +5371,7 @@ static void send_panic_events(struct ipmi_smi *intf, char *str)</div><div class='ctx'> 	msg.data = NULL;</div><div class='ctx'> 	msg.data_len = 0;</div><div class='ctx'> 	intf-&gt;null_user_handler = device_id_fetcher;</div><div class='del'>-	ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='add'>+	_ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='ctx'> </div><div class='ctx'> 	if (intf-&gt;local_event_generator) {</div><div class='ctx'> 		/* Request the event receiver from the local MC. */</div><div class='hunk'>@@ -5333,7 +5380,7 @@ static void send_panic_events(struct ipmi_smi *intf, char *str)</div><div class='ctx'> 		msg.data = NULL;</div><div class='ctx'> 		msg.data_len = 0;</div><div class='ctx'> 		intf-&gt;null_user_handler = event_receiver_fetcher;</div><div class='del'>-		ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='add'>+		_ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='ctx'> 	}</div><div class='ctx'> 	intf-&gt;null_user_handler = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -5385,7 +5432,7 @@ static void send_panic_events(struct ipmi_smi *intf, char *str)</div><div class='ctx'> 		memcpy_and_pad(data+5, 11, p, size, '\0');</div><div class='ctx'> 		p += size;</div><div class='ctx'> </div><div class='del'>-		ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='add'>+		_ipmi_panic_request_and_wait(intf, &amp;addr, &amp;msg);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5403,7 +5450,7 @@ static int panic_event(struct notifier_block *this,</div><div class='ctx'> 	has_panicked = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* For every registered interface, set it to run to completion. */</div><div class='del'>-	list_for_each_entry_rcu(intf, &amp;ipmi_interfaces, link) {</div><div class='add'>+	list_for_each_entry(intf, &amp;ipmi_interfaces, link) {</div><div class='ctx'> 		if (!intf-&gt;handlers || intf-&gt;intf_num == -1)</div><div class='ctx'> 			/* Interface is not ready. */</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -5433,7 +5480,7 @@ static int panic_event(struct notifier_block *this,</div><div class='ctx'> 			intf-&gt;handlers-&gt;set_run_to_completion(intf-&gt;send_info,</div><div class='ctx'> 							      1);</div><div class='ctx'> </div><div class='del'>-		list_for_each_entry_rcu(user, &amp;intf-&gt;users, link) {</div><div class='add'>+		list_for_each_entry(user, &amp;intf-&gt;users, link) {</div><div class='ctx'> 			if (user-&gt;handler-&gt;ipmi_panic_handler)</div><div class='ctx'> 				user-&gt;handler-&gt;ipmi_panic_handler(</div><div class='ctx'> 					user-&gt;handler_data);</div><div class='hunk'>@@ -5478,15 +5525,11 @@ static int ipmi_init_msghandler(void)</div><div class='ctx'> 	if (initialized)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	rv = init_srcu_struct(&amp;ipmi_interfaces_srcu);</div><div class='del'>-	if (rv)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	remove_work_wq = create_singlethread_workqueue("ipmi-msghandler-remove-wq");</div><div class='del'>-	if (!remove_work_wq) {</div><div class='add'>+	bmc_remove_work_wq = create_singlethread_workqueue("ipmi-msghandler-remove-wq");</div><div class='add'>+	if (!bmc_remove_work_wq) {</div><div class='ctx'> 		pr_err("unable to create ipmi-msghandler-remove-wq workqueue");</div><div class='ctx'> 		rv = -ENOMEM;</div><div class='del'>-		goto out_wq;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	timer_setup(&amp;ipmi_timer, ipmi_timeout, 0);</div><div class='hunk'>@@ -5496,9 +5539,6 @@ static int ipmi_init_msghandler(void)</div><div class='ctx'> </div><div class='ctx'> 	initialized = true;</div><div class='ctx'> </div><div class='del'>-out_wq:</div><div class='del'>-	if (rv)</div><div class='del'>-		cleanup_srcu_struct(&amp;ipmi_interfaces_srcu);</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;ipmi_interfaces_mutex);</div><div class='ctx'> 	return rv;</div><div class='hunk'>@@ -5522,7 +5562,7 @@ static void __exit cleanup_ipmi(void)</div><div class='ctx'> 	int count;</div><div class='ctx'> </div><div class='ctx'> 	if (initialized) {</div><div class='del'>-		destroy_workqueue(remove_work_wq);</div><div class='add'>+		destroy_workqueue(bmc_remove_work_wq);</div><div class='ctx'> </div><div class='ctx'> 		atomic_notifier_chain_unregister(&amp;panic_notifier_list,</div><div class='ctx'> 						 &amp;panic_block);</div><div class='hunk'>@@ -5539,6 +5579,7 @@ static void __exit cleanup_ipmi(void)</div><div class='ctx'> 		 */</div><div class='ctx'> 		atomic_set(&amp;stop_operation, 1);</div><div class='ctx'> 		timer_delete_sync(&amp;ipmi_timer);</div><div class='add'>+		cancel_work_sync(&amp;ipmi_timer_work);</div><div class='ctx'> </div><div class='ctx'> 		initialized = false;</div><div class='ctx'> </div><div class='hunk'>@@ -5549,8 +5590,6 @@ static void __exit cleanup_ipmi(void)</div><div class='ctx'> 		count = atomic_read(&amp;recv_msg_inuse_count);</div><div class='ctx'> 		if (count != 0)</div><div class='ctx'> 			pr_warn("recv message count %d at exit\n", count);</div><div class='del'>-</div><div class='del'>-		cleanup_srcu_struct(&amp;ipmi_interfaces_srcu);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (drvregistered)</div><div class='ctx'> 		driver_unregister(&amp;ipmidriver.driver);</div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_si.h b/drivers/char/ipmi/ipmi_si.h<br/>index a7ead2a4c753..508c3fd45877 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_si.h</a></div><div class='hunk'>@@ -26,6 +26,14 @@ enum si_type {</div><div class='ctx'> /* Array is defined in the ipmi_si_intf.c */</div><div class='ctx'> extern const char *const si_to_str[];</div><div class='ctx'> </div><div class='add'>+struct ipmi_match_info {</div><div class='add'>+	enum si_type type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct ipmi_match_info ipmi_kcs_si_info;</div><div class='add'>+extern const struct ipmi_match_info ipmi_smic_si_info;</div><div class='add'>+extern const struct ipmi_match_info ipmi_bt_si_info;</div><div class='add'>+</div><div class='ctx'> enum ipmi_addr_space {</div><div class='ctx'> 	IPMI_IO_ADDR_SPACE, IPMI_MEM_ADDR_SPACE</div><div class='ctx'> };</div><div class='hunk'>@@ -64,7 +72,7 @@ struct si_sm_io {</div><div class='ctx'> 	void (*irq_cleanup)(struct si_sm_io *io);</div><div class='ctx'> </div><div class='ctx'> 	u8 slave_addr;</div><div class='del'>-	enum si_type si_type;</div><div class='add'>+	const struct ipmi_match_info *si_info;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c<br/>index 12b0b77eb1cc..7fe891783a37 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_intf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_intf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_intf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_si_intf.c</a></div><div class='hunk'>@@ -73,6 +73,10 @@ enum si_intf_state {</div><div class='ctx'> /* 'invalid' to allow a firmware-specified interface to be disabled */</div><div class='ctx'> const char *const si_to_str[] = { "invalid", "kcs", "smic", "bt", NULL };</div><div class='ctx'> </div><div class='add'>+const struct ipmi_match_info ipmi_kcs_si_info = { .type = SI_KCS };</div><div class='add'>+const struct ipmi_match_info ipmi_smic_si_info = { .type = SI_SMIC };</div><div class='add'>+const struct ipmi_match_info ipmi_bt_si_info = { .type = SI_BT };</div><div class='add'>+</div><div class='ctx'> static bool initialized;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -692,7 +696,7 @@ static void handle_transaction_done(struct smi_info *smi_info)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		enables = current_global_enables(smi_info, 0, &amp;irq_on);</div><div class='del'>-		if (smi_info-&gt;io.si_type == SI_BT)</div><div class='add'>+		if (smi_info-&gt;io.si_info-&gt;type == SI_BT)</div><div class='ctx'> 			/* BT has its own interrupt enable bit. */</div><div class='ctx'> 			check_bt_irq(smi_info, irq_on);</div><div class='ctx'> 		if (enables != (msg[3] &amp; GLOBAL_ENABLES_MASK)) {</div><div class='hunk'>@@ -1119,7 +1123,7 @@ irqreturn_t ipmi_si_irq_handler(int irq, void *data)</div><div class='ctx'> 	struct smi_info *smi_info = data;</div><div class='ctx'> 	unsigned long   flags;</div><div class='ctx'> </div><div class='del'>-	if (smi_info-&gt;io.si_type == SI_BT)</div><div class='add'>+	if (smi_info-&gt;io.si_info-&gt;type == SI_BT)</div><div class='ctx'> 		/* We need to clear the IRQ flag for the BT interface. */</div><div class='ctx'> 		smi_info-&gt;io.outputb(&amp;smi_info-&gt;io, IPMI_BT_INTMASK_REG,</div><div class='ctx'> 				     IPMI_BT_INTMASK_CLEAR_IRQ_BIT</div><div class='hunk'>@@ -1164,7 +1168,7 @@ static int smi_start_processing(void            *send_info,</div><div class='ctx'> 	 * The BT interface is efficient enough to not need a thread,</div><div class='ctx'> 	 * and there is no need for a thread if we have interrupts.</div><div class='ctx'> 	 */</div><div class='del'>-	else if ((new_smi-&gt;io.si_type != SI_BT) &amp;&amp; (!new_smi-&gt;io.irq))</div><div class='add'>+	else if (new_smi-&gt;io.si_info-&gt;type != SI_BT &amp;&amp; !new_smi-&gt;io.irq)</div><div class='ctx'> 		enable = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='hunk'>@@ -1235,7 +1239,7 @@ MODULE_PARM_DESC(kipmid_max_busy_us,</div><div class='ctx'> </div><div class='ctx'> void ipmi_irq_finish_setup(struct si_sm_io *io)</div><div class='ctx'> {</div><div class='del'>-	if (io-&gt;si_type == SI_BT)</div><div class='add'>+	if (io-&gt;si_info-&gt;type == SI_BT)</div><div class='ctx'> 		/* Enable the interrupt in the BT interface. */</div><div class='ctx'> 		io-&gt;outputb(io, IPMI_BT_INTMASK_REG,</div><div class='ctx'> 			    IPMI_BT_INTMASK_ENABLE_IRQ_BIT);</div><div class='hunk'>@@ -1243,7 +1247,7 @@ void ipmi_irq_finish_setup(struct si_sm_io *io)</div><div class='ctx'> </div><div class='ctx'> void ipmi_irq_start_cleanup(struct si_sm_io *io)</div><div class='ctx'> {</div><div class='del'>-	if (io-&gt;si_type == SI_BT)</div><div class='add'>+	if (io-&gt;si_info-&gt;type == SI_BT)</div><div class='ctx'> 		/* Disable the interrupt in the BT interface. */</div><div class='ctx'> 		io-&gt;outputb(io, IPMI_BT_INTMASK_REG, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -1614,7 +1618,7 @@ static ssize_t type_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct smi_info *smi_info = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='del'>-	return sysfs_emit(buf, "%s\n", si_to_str[smi_info-&gt;io.si_type]);</div><div class='add'>+	return sysfs_emit(buf, "%s\n", si_to_str[smi_info-&gt;io.si_info-&gt;type]);</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_RO(type);</div><div class='ctx'> </div><div class='hunk'>@@ -1649,7 +1653,7 @@ static ssize_t params_show(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 	return sysfs_emit(buf,</div><div class='ctx'> 			"%s,%s,0x%lx,rsp=%d,rsi=%d,rsh=%d,irq=%d,ipmb=%d\n",</div><div class='del'>-			si_to_str[smi_info-&gt;io.si_type],</div><div class='add'>+			si_to_str[smi_info-&gt;io.si_info-&gt;type],</div><div class='ctx'> 			addr_space_to_str[smi_info-&gt;io.addr_space],</div><div class='ctx'> 			smi_info-&gt;io.addr_data,</div><div class='ctx'> 			smi_info-&gt;io.regspacing,</div><div class='hunk'>@@ -1803,7 +1807,7 @@ setup_dell_poweredge_bt_xaction_handler(struct smi_info *smi_info)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipmi_device_id *id = &amp;smi_info-&gt;device_id;</div><div class='ctx'> 	if (id-&gt;manufacturer_id == DELL_IANA_MFR_ID &amp;&amp;</div><div class='del'>-	    smi_info-&gt;io.si_type == SI_BT)</div><div class='add'>+	    smi_info-&gt;io.si_info-&gt;type == SI_BT)</div><div class='ctx'> 		register_xaction_notifier(&amp;dell_poweredge_bt_xaction_notifier);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1907,13 +1911,13 @@ int ipmi_si_add_smi(struct si_sm_io *io)</div><div class='ctx'> 			/* We prefer ACPI over SMBIOS. */</div><div class='ctx'> 			dev_info(dup-&gt;io.dev,</div><div class='ctx'> 				 "Removing SMBIOS-specified %s state machine in favor of ACPI\n",</div><div class='del'>-				 si_to_str[new_smi-&gt;io.si_type]);</div><div class='add'>+				 si_to_str[new_smi-&gt;io.si_info-&gt;type]);</div><div class='ctx'> 			cleanup_one_si(dup);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_info(new_smi-&gt;io.dev,</div><div class='ctx'> 				 "%s-specified %s state machine: duplicate\n",</div><div class='ctx'> 				 ipmi_addr_src_to_str(new_smi-&gt;io.addr_source),</div><div class='del'>-				 si_to_str[new_smi-&gt;io.si_type]);</div><div class='add'>+				 si_to_str[new_smi-&gt;io.si_info-&gt;type]);</div><div class='ctx'> 			rv = -EBUSY;</div><div class='ctx'> 			kfree(new_smi);</div><div class='ctx'> 			goto out_err;</div><div class='hunk'>@@ -1922,7 +1926,7 @@ int ipmi_si_add_smi(struct si_sm_io *io)</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Adding %s-specified %s state machine\n",</div><div class='ctx'> 		ipmi_addr_src_to_str(new_smi-&gt;io.addr_source),</div><div class='del'>-		si_to_str[new_smi-&gt;io.si_type]);</div><div class='add'>+		si_to_str[new_smi-&gt;io.si_info-&gt;type]);</div><div class='ctx'> </div><div class='ctx'> 	list_add_tail(&amp;new_smi-&gt;link, &amp;smi_infos);</div><div class='ctx'> </div><div class='hunk'>@@ -1945,12 +1949,12 @@ static int try_smi_init(struct smi_info *new_smi)</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Trying %s-specified %s state machine at %s address 0x%lx, slave address 0x%x, irq %d\n",</div><div class='ctx'> 		ipmi_addr_src_to_str(new_smi-&gt;io.addr_source),</div><div class='del'>-		si_to_str[new_smi-&gt;io.si_type],</div><div class='add'>+		si_to_str[new_smi-&gt;io.si_info-&gt;type],</div><div class='ctx'> 		addr_space_to_str[new_smi-&gt;io.addr_space],</div><div class='ctx'> 		new_smi-&gt;io.addr_data,</div><div class='ctx'> 		new_smi-&gt;io.slave_addr, new_smi-&gt;io.irq);</div><div class='ctx'> </div><div class='del'>-	switch (new_smi-&gt;io.si_type) {</div><div class='add'>+	switch (new_smi-&gt;io.si_info-&gt;type) {</div><div class='ctx'> 	case SI_KCS:</div><div class='ctx'> 		new_smi-&gt;handlers = &amp;kcs_smi_handlers;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2073,7 +2077,7 @@ static int try_smi_init(struct smi_info *new_smi)</div><div class='ctx'> 	smi_num++;</div><div class='ctx'> </div><div class='ctx'> 	dev_info(new_smi-&gt;io.dev, "IPMI %s interface initialized\n",</div><div class='del'>-		 si_to_str[new_smi-&gt;io.si_type]);</div><div class='add'>+		 si_to_str[new_smi-&gt;io.si_info-&gt;type]);</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(new_smi-&gt;io.dev-&gt;init_name != NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -2091,9 +2095,18 @@ static int try_smi_init(struct smi_info *new_smi)</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Devices in the same address space at the same address are the same.</div><div class='add'>+ */</div><div class='add'>+static bool __init ipmi_smi_info_same(struct smi_info *e1, struct smi_info *e2)</div><div class='add'>+{</div><div class='add'>+	return (e1-&gt;io.addr_space == e2-&gt;io.addr_space &amp;&amp;</div><div class='add'>+		e1-&gt;io.addr_data == e2-&gt;io.addr_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init init_ipmi_si(void)</div><div class='ctx'> {</div><div class='del'>-	struct smi_info *e;</div><div class='add'>+	struct smi_info *e, *e2;</div><div class='ctx'> 	enum ipmi_addr_src type = SI_INVALID;</div><div class='ctx'> </div><div class='ctx'> 	if (initialized)</div><div class='hunk'>@@ -2109,37 +2122,70 @@ static int __init init_ipmi_si(void)</div><div class='ctx'> </div><div class='ctx'> 	ipmi_si_parisc_init();</div><div class='ctx'> </div><div class='del'>-	/* We prefer devices with interrupts, but in the case of a machine</div><div class='del'>-	   with multiple BMCs we assume that there will be several instances</div><div class='del'>-	   of a given type so if we succeed in registering a type then also</div><div class='del'>-	   try to register everything else of the same type */</div><div class='ctx'> 	mutex_lock(&amp;smi_infos_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Scan through all the devices.  We prefer devices with</div><div class='add'>+	 * interrupts, so go through those first in case there are any</div><div class='add'>+	 * duplicates that don't have the interrupt set.</div><div class='add'>+	 */</div><div class='ctx'> 	list_for_each_entry(e, &amp;smi_infos, link) {</div><div class='del'>-		/* Try to register a device if it has an IRQ and we either</div><div class='del'>-		   haven't successfully registered a device yet or this</div><div class='del'>-		   device has the same type as one we successfully registered */</div><div class='del'>-		if (e-&gt;io.irq &amp;&amp; (!type || e-&gt;io.addr_source == type)) {</div><div class='del'>-			if (!try_smi_init(e)) {</div><div class='del'>-				type = e-&gt;io.addr_source;</div><div class='add'>+		bool dup = false;</div><div class='add'>+</div><div class='add'>+		/* Register ones with interrupts first. */</div><div class='add'>+		if (!e-&gt;io.irq)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Go through the ones we have already seen to see if this</div><div class='add'>+		 * is a dup.</div><div class='add'>+		 */</div><div class='add'>+		list_for_each_entry(e2, &amp;smi_infos, link) {</div><div class='add'>+			if (e2 == e)</div><div class='add'>+				break;</div><div class='add'>+			if (e2-&gt;io.irq &amp;&amp; ipmi_smi_info_same(e, e2)) {</div><div class='add'>+				dup = true;</div><div class='add'>+				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+		if (!dup)</div><div class='add'>+			try_smi_init(e);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* type will only have been set if we successfully registered an si */</div><div class='del'>-	if (type)</div><div class='del'>-		goto skip_fallback_noirq;</div><div class='add'>+	/*</div><div class='add'>+	 * Now try devices without interrupts.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(e, &amp;smi_infos, link) {</div><div class='add'>+		bool dup = false;</div><div class='ctx'> </div><div class='del'>-	/* Fall back to the preferred device */</div><div class='add'>+		if (e-&gt;io.irq)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(e, &amp;smi_infos, link) {</div><div class='del'>-		if (!e-&gt;io.irq &amp;&amp; (!type || e-&gt;io.addr_source == type)) {</div><div class='del'>-			if (!try_smi_init(e)) {</div><div class='del'>-				type = e-&gt;io.addr_source;</div><div class='add'>+		/*</div><div class='add'>+		 * Go through the ones we have already seen to see if</div><div class='add'>+		 * this is a dup.  We have already looked at the ones</div><div class='add'>+		 * with interrupts.</div><div class='add'>+		 */</div><div class='add'>+		list_for_each_entry(e2, &amp;smi_infos, link) {</div><div class='add'>+			if (!e2-&gt;io.irq)</div><div class='add'>+				continue;</div><div class='add'>+			if (ipmi_smi_info_same(e, e2)) {</div><div class='add'>+				dup = true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		list_for_each_entry(e2, &amp;smi_infos, link) {</div><div class='add'>+			if (e2 == e)</div><div class='add'>+				break;</div><div class='add'>+			if (ipmi_smi_info_same(e, e2)) {</div><div class='add'>+				dup = true;</div><div class='add'>+				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+		if (!dup)</div><div class='add'>+			try_smi_init(e);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-skip_fallback_noirq:</div><div class='ctx'> 	initialized = true;</div><div class='ctx'> 	mutex_unlock(&amp;smi_infos_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -2267,7 +2313,7 @@ struct device *ipmi_si_remove_by_data(int addr_space, enum si_type si_type,</div><div class='ctx'> 	list_for_each_entry_safe(e, tmp_e, &amp;smi_infos, link) {</div><div class='ctx'> 		if (e-&gt;io.addr_space != addr_space)</div><div class='ctx'> 			continue;</div><div class='del'>-		if (e-&gt;io.si_type != si_type)</div><div class='add'>+		if (e-&gt;io.si_info-&gt;type != si_type)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (e-&gt;io.addr_data == addr) {</div><div class='ctx'> 			dev = get_device(e-&gt;io.dev);</div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_si_parisc.c b/drivers/char/ipmi/ipmi_si_parisc.c<br/>index 2be2967f6b5f..3b0a70d9adbb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_parisc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_parisc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_parisc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_si_parisc.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@ static int __init ipmi_parisc_probe(struct parisc_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;io, 0, sizeof(io));</div><div class='ctx'> </div><div class='del'>-	io.si_type	= SI_KCS;</div><div class='add'>+	io.si_info	= &amp;ipmi_kcs_si_info;</div><div class='ctx'> 	io.addr_source	= SI_DEVICETREE;</div><div class='ctx'> 	io.addr_space	= IPMI_MEM_ADDR_SPACE;</div><div class='ctx'> 	io.addr_data	= dev-&gt;hpa.start;</div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_si_pci.c b/drivers/char/ipmi/ipmi_si_pci.c<br/>index 8c0ea637aba0..17f72763322d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_pci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_si_pci.c</a></div><div class='hunk'>@@ -23,30 +23,32 @@ MODULE_PARM_DESC(trypci,</div><div class='ctx'> </div><div class='ctx'> static int ipmi_pci_probe_regspacing(struct si_sm_io *io)</div><div class='ctx'> {</div><div class='del'>-	if (io-&gt;si_type == SI_KCS) {</div><div class='del'>-		unsigned char	status;</div><div class='del'>-		int		regspacing;</div><div class='del'>-</div><div class='del'>-		io-&gt;regsize = DEFAULT_REGSIZE;</div><div class='del'>-		io-&gt;regshift = 0;</div><div class='del'>-</div><div class='del'>-		/* detect 1, 4, 16byte spacing */</div><div class='del'>-		for (regspacing = DEFAULT_REGSPACING; regspacing &lt;= 16;) {</div><div class='del'>-			io-&gt;regspacing = regspacing;</div><div class='del'>-			if (io-&gt;io_setup(io)) {</div><div class='del'>-				dev_err(io-&gt;dev, "Could not setup I/O space\n");</div><div class='del'>-				return DEFAULT_REGSPACING;</div><div class='del'>-			}</div><div class='del'>-			/* write invalid cmd */</div><div class='del'>-			io-&gt;outputb(io, 1, 0x10);</div><div class='del'>-			/* read status back */</div><div class='del'>-			status = io-&gt;inputb(io, 1);</div><div class='del'>-			io-&gt;io_cleanup(io);</div><div class='del'>-			if (status)</div><div class='del'>-				return regspacing;</div><div class='del'>-			regspacing *= 4;</div><div class='add'>+	unsigned char status;</div><div class='add'>+	int regspacing;</div><div class='add'>+</div><div class='add'>+	if (io-&gt;si_info-&gt;type != SI_KCS)</div><div class='add'>+		return DEFAULT_REGSPACING;</div><div class='add'>+</div><div class='add'>+	io-&gt;regsize = DEFAULT_REGSIZE;</div><div class='add'>+	io-&gt;regshift = 0;</div><div class='add'>+</div><div class='add'>+	/* detect 1, 4, 16byte spacing */</div><div class='add'>+	for (regspacing = DEFAULT_REGSPACING; regspacing &lt;= 16;) {</div><div class='add'>+		io-&gt;regspacing = regspacing;</div><div class='add'>+		if (io-&gt;io_setup(io)) {</div><div class='add'>+			dev_err(io-&gt;dev, "Could not setup I/O space\n");</div><div class='add'>+			return DEFAULT_REGSPACING;</div><div class='ctx'> 		}</div><div class='add'>+		/* write invalid cmd */</div><div class='add'>+		io-&gt;outputb(io, 1, 0x10);</div><div class='add'>+		/* read status back */</div><div class='add'>+		status = io-&gt;inputb(io, 1);</div><div class='add'>+		io-&gt;io_cleanup(io);</div><div class='add'>+		if (status)</div><div class='add'>+			return regspacing;</div><div class='add'>+		regspacing *= 4;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return DEFAULT_REGSPACING;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -74,15 +76,15 @@ static int ipmi_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	switch (pdev-&gt;class) {</div><div class='ctx'> 	case PCI_CLASS_SERIAL_IPMI_SMIC:</div><div class='del'>-		io.si_type = SI_SMIC;</div><div class='add'>+		io.si_info = &amp;ipmi_smic_si_info;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case PCI_CLASS_SERIAL_IPMI_KCS:</div><div class='del'>-		io.si_type = SI_KCS;</div><div class='add'>+		io.si_info = &amp;ipmi_kcs_si_info;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case PCI_CLASS_SERIAL_IPMI_BT:</div><div class='del'>-		io.si_type = SI_BT;</div><div class='add'>+		io.si_info = &amp;ipmi_bt_si_info;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_si_platform.c b/drivers/char/ipmi/ipmi_si_platform.c<br/>index 550cabd43ae6..fb6e359ae494 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_platform.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_si_platform.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_si_platform.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_si_platform.c</a></div><div class='hunk'>@@ -163,9 +163,13 @@ static int platform_ipmi_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case SI_KCS:</div><div class='add'>+		io.si_info = &amp;ipmi_kcs_si_info;</div><div class='add'>+		break;</div><div class='ctx'> 	case SI_SMIC:</div><div class='add'>+		io.si_info = &amp;ipmi_smic_si_info;</div><div class='add'>+		break;</div><div class='ctx'> 	case SI_BT:</div><div class='del'>-		io.si_type = type;</div><div class='add'>+		io.si_info = &amp;ipmi_bt_si_info;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SI_TYPE_INVALID: /* User disabled this in hardcode. */</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -213,13 +217,10 @@ static int platform_ipmi_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OF</div><div class='ctx'> static const struct of_device_id of_ipmi_match[] = {</div><div class='del'>-	{ .type = "ipmi", .compatible = "ipmi-kcs",</div><div class='del'>-	  .data = (void *)(unsigned long) SI_KCS },</div><div class='del'>-	{ .type = "ipmi", .compatible = "ipmi-smic",</div><div class='del'>-	  .data = (void *)(unsigned long) SI_SMIC },</div><div class='del'>-	{ .type = "ipmi", .compatible = "ipmi-bt",</div><div class='del'>-	  .data = (void *)(unsigned long) SI_BT },</div><div class='del'>-	{},</div><div class='add'>+	{ .type = "ipmi", .compatible = "ipmi-kcs", .data = &amp;ipmi_kcs_si_info },</div><div class='add'>+	{ .type = "ipmi", .compatible = "ipmi-smic", .data = &amp;ipmi_smic_si_info },</div><div class='add'>+	{ .type = "ipmi", .compatible = "ipmi-bt", .data = &amp;ipmi_bt_si_info },</div><div class='add'>+	{}</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, of_ipmi_match);</div><div class='ctx'> </div><div class='hunk'>@@ -265,7 +266,7 @@ static int of_ipmi_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;io, 0, sizeof(io));</div><div class='del'>-	io.si_type	= (enum si_type)device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	io.si_info	= device_get_match_data(&amp;pdev-&gt;dev);</div><div class='ctx'> 	io.addr_source	= SI_DEVICETREE;</div><div class='ctx'> 	io.irq_setup	= ipmi_std_irq_setup;</div><div class='ctx'> </div><div class='hunk'>@@ -296,7 +297,7 @@ static int find_slave_address(struct si_sm_io *io, int slave_addr)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_IPMI_DMI_DECODE</div><div class='ctx'> 	if (!slave_addr)</div><div class='del'>-		slave_addr = ipmi_dmi_get_slave_addr(io-&gt;si_type,</div><div class='add'>+		slave_addr = ipmi_dmi_get_slave_addr(io-&gt;si_info-&gt;type,</div><div class='ctx'> 						     io-&gt;addr_space,</div><div class='ctx'> 						     io-&gt;addr_data);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -335,13 +336,13 @@ static int acpi_ipmi_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	switch (tmp) {</div><div class='ctx'> 	case 1:</div><div class='del'>-		io.si_type = SI_KCS;</div><div class='add'>+		io.si_info = &amp;ipmi_kcs_si_info;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='del'>-		io.si_type = SI_SMIC;</div><div class='add'>+		io.si_info = &amp;ipmi_smic_si_info;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='del'>-		io.si_type = SI_BT;</div><div class='add'>+		io.si_info = &amp;ipmi_bt_si_info;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4: /* SSIF, just ignore */</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_ssif.c b/drivers/char/ipmi/ipmi_ssif.c<br/>index 0b45b07dec22..5bf038e620c7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_ssif.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_ssif.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_ssif.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_ssif.c</a></div><div class='hunk'>@@ -481,8 +481,6 @@ static int ipmi_ssif_thread(void *data)</div><div class='ctx'> 		/* Wait for something to do */</div><div class='ctx'> 		result = wait_for_completion_interruptible(</div><div class='ctx'> 						&amp;ssif_info-&gt;wake_thread);</div><div class='del'>-		if (ssif_info-&gt;stopping)</div><div class='del'>-			break;</div><div class='ctx'> 		if (result == -ERESTARTSYS)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		init_completion(&amp;ssif_info-&gt;wake_thread);</div><div class='hunk'>@@ -1270,10 +1268,8 @@ static void shutdown_ssif(void *send_info)</div><div class='ctx'> 	ssif_info-&gt;stopping = true;</div><div class='ctx'> 	timer_delete_sync(&amp;ssif_info-&gt;watch_timer);</div><div class='ctx'> 	timer_delete_sync(&amp;ssif_info-&gt;retry_timer);</div><div class='del'>-	if (ssif_info-&gt;thread) {</div><div class='del'>-		complete(&amp;ssif_info-&gt;wake_thread);</div><div class='add'>+	if (ssif_info-&gt;thread)</div><div class='ctx'> 		kthread_stop(ssif_info-&gt;thread);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ssif_remove(struct i2c_client *client)</div><div class='head'>diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c<br/>index f1875b2bebbc..ab759b492fdd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_watchdog.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/ipmi/ipmi_watchdog.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/ipmi/ipmi_watchdog.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/ipmi/ipmi_watchdog.c</a></div><div class='hunk'>@@ -150,7 +150,7 @@ static char preaction[16] = "pre_none";</div><div class='ctx'> static unsigned char preop_val = WDOG_PREOP_NONE;</div><div class='ctx'> </div><div class='ctx'> static char preop[16] = "preop_none";</div><div class='del'>-static DEFINE_SPINLOCK(ipmi_read_lock);</div><div class='add'>+static DEFINE_MUTEX(ipmi_read_mutex);</div><div class='ctx'> static char data_to_read;</div><div class='ctx'> static DECLARE_WAIT_QUEUE_HEAD(read_q);</div><div class='ctx'> static struct fasync_struct *fasync_q;</div><div class='hunk'>@@ -363,7 +363,7 @@ static int __ipmi_set_timeout(struct ipmi_smi_msg  *smi_msg,</div><div class='ctx'> {</div><div class='ctx'> 	struct kernel_ipmi_msg            msg;</div><div class='ctx'> 	unsigned char                     data[6];</div><div class='del'>-	int                               rv;</div><div class='add'>+	int                               rv = 0;</div><div class='ctx'> 	struct ipmi_system_interface_addr addr;</div><div class='ctx'> 	int                               hbnow = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -405,14 +405,18 @@ static int __ipmi_set_timeout(struct ipmi_smi_msg  *smi_msg,</div><div class='ctx'> 	msg.cmd = IPMI_WDOG_SET_TIMER;</div><div class='ctx'> 	msg.data = data;</div><div class='ctx'> 	msg.data_len = sizeof(data);</div><div class='del'>-	rv = ipmi_request_supply_msgs(watchdog_user,</div><div class='del'>-				      (struct ipmi_addr *) &amp;addr,</div><div class='del'>-				      0,</div><div class='del'>-				      &amp;msg,</div><div class='del'>-				      NULL,</div><div class='del'>-				      smi_msg,</div><div class='del'>-				      recv_msg,</div><div class='del'>-				      1);</div><div class='add'>+	if (smi_msg)</div><div class='add'>+		rv = ipmi_request_supply_msgs(watchdog_user,</div><div class='add'>+					      (struct ipmi_addr *) &amp;addr,</div><div class='add'>+					      0,</div><div class='add'>+					      &amp;msg,</div><div class='add'>+					      NULL,</div><div class='add'>+					      smi_msg,</div><div class='add'>+					      recv_msg,</div><div class='add'>+					      1);</div><div class='add'>+	else</div><div class='add'>+		ipmi_panic_request_and_wait(watchdog_user,</div><div class='add'>+					    (struct ipmi_addr *) &amp;addr, &amp;msg);</div><div class='ctx'> 	if (rv)</div><div class='ctx'> 		pr_warn("set timeout error: %d\n", rv);</div><div class='ctx'> 	else if (send_heartbeat_now)</div><div class='hunk'>@@ -431,9 +435,7 @@ static int _ipmi_set_timeout(int do_heartbeat)</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;msg_tofree, 2);</div><div class='ctx'> </div><div class='del'>-	rv = __ipmi_set_timeout(&amp;smi_msg,</div><div class='del'>-				&amp;recv_msg,</div><div class='del'>-				&amp;send_heartbeat_now);</div><div class='add'>+	rv = __ipmi_set_timeout(&amp;smi_msg, &amp;recv_msg, &amp;send_heartbeat_now);</div><div class='ctx'> 	if (rv) {</div><div class='ctx'> 		atomic_set(&amp;msg_tofree, 0);</div><div class='ctx'> 		return rv;</div><div class='hunk'>@@ -460,27 +462,10 @@ static int ipmi_set_timeout(int do_heartbeat)</div><div class='ctx'> 	return rv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static atomic_t panic_done_count = ATOMIC_INIT(0);</div><div class='del'>-</div><div class='del'>-static void panic_smi_free(struct ipmi_smi_msg *msg)</div><div class='del'>-{</div><div class='del'>-	atomic_dec(&amp;panic_done_count);</div><div class='del'>-}</div><div class='del'>-static void panic_recv_free(struct ipmi_recv_msg *msg)</div><div class='del'>-{</div><div class='del'>-	atomic_dec(&amp;panic_done_count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct ipmi_smi_msg panic_halt_heartbeat_smi_msg =</div><div class='del'>-	INIT_IPMI_SMI_MSG(panic_smi_free);</div><div class='del'>-static struct ipmi_recv_msg panic_halt_heartbeat_recv_msg =</div><div class='del'>-	INIT_IPMI_RECV_MSG(panic_recv_free);</div><div class='del'>-</div><div class='ctx'> static void panic_halt_ipmi_heartbeat(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct kernel_ipmi_msg             msg;</div><div class='ctx'> 	struct ipmi_system_interface_addr addr;</div><div class='del'>-	int rv;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Don't reset the timer if we have the timer turned off, that</div><div class='hunk'>@@ -497,24 +482,10 @@ static void panic_halt_ipmi_heartbeat(void)</div><div class='ctx'> 	msg.cmd = IPMI_WDOG_RESET_TIMER;</div><div class='ctx'> 	msg.data = NULL;</div><div class='ctx'> 	msg.data_len = 0;</div><div class='del'>-	atomic_add(2, &amp;panic_done_count);</div><div class='del'>-	rv = ipmi_request_supply_msgs(watchdog_user,</div><div class='del'>-				      (struct ipmi_addr *) &amp;addr,</div><div class='del'>-				      0,</div><div class='del'>-				      &amp;msg,</div><div class='del'>-				      NULL,</div><div class='del'>-				      &amp;panic_halt_heartbeat_smi_msg,</div><div class='del'>-				      &amp;panic_halt_heartbeat_recv_msg,</div><div class='del'>-				      1);</div><div class='del'>-	if (rv)</div><div class='del'>-		atomic_sub(2, &amp;panic_done_count);</div><div class='add'>+	ipmi_panic_request_and_wait(watchdog_user, (struct ipmi_addr *) &amp;addr,</div><div class='add'>+				    &amp;msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ipmi_smi_msg panic_halt_smi_msg =</div><div class='del'>-	INIT_IPMI_SMI_MSG(panic_smi_free);</div><div class='del'>-static struct ipmi_recv_msg panic_halt_recv_msg =</div><div class='del'>-	INIT_IPMI_RECV_MSG(panic_recv_free);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Special call, doesn't claim any locks.  This is only to be called</div><div class='ctx'>  * at panic or halt time, in run-to-completion mode, when the caller</div><div class='hunk'>@@ -526,22 +497,13 @@ static void panic_halt_ipmi_set_timeout(void)</div><div class='ctx'> 	int send_heartbeat_now;</div><div class='ctx'> 	int rv;</div><div class='ctx'> </div><div class='del'>-	/* Wait for the messages to be free. */</div><div class='del'>-	while (atomic_read(&amp;panic_done_count) != 0)</div><div class='del'>-		ipmi_poll_interface(watchdog_user);</div><div class='del'>-	atomic_add(2, &amp;panic_done_count);</div><div class='del'>-	rv = __ipmi_set_timeout(&amp;panic_halt_smi_msg,</div><div class='del'>-				&amp;panic_halt_recv_msg,</div><div class='del'>-				&amp;send_heartbeat_now);</div><div class='add'>+	rv = __ipmi_set_timeout(NULL, NULL, &amp;send_heartbeat_now);</div><div class='ctx'> 	if (rv) {</div><div class='del'>-		atomic_sub(2, &amp;panic_done_count);</div><div class='ctx'> 		pr_warn("Unable to extend the watchdog timeout\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (send_heartbeat_now)</div><div class='ctx'> 			panic_halt_ipmi_heartbeat();</div><div class='ctx'> 	}</div><div class='del'>-	while (atomic_read(&amp;panic_done_count) != 0)</div><div class='del'>-		ipmi_poll_interface(watchdog_user);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __ipmi_heartbeat(void)</div><div class='hunk'>@@ -793,7 +755,7 @@ static ssize_t ipmi_read(struct file *file,</div><div class='ctx'> 	 * Reading returns if the pretimeout has gone off, and it only does</div><div class='ctx'> 	 * it once per pretimeout.</div><div class='ctx'> 	 */</div><div class='del'>-	spin_lock_irq(&amp;ipmi_read_lock);</div><div class='add'>+	mutex_lock(&amp;ipmi_read_mutex);</div><div class='ctx'> 	if (!data_to_read) {</div><div class='ctx'> 		if (file-&gt;f_flags &amp; O_NONBLOCK) {</div><div class='ctx'> 			rv = -EAGAIN;</div><div class='hunk'>@@ -804,9 +766,9 @@ static ssize_t ipmi_read(struct file *file,</div><div class='ctx'> 		add_wait_queue(&amp;read_q, &amp;wait);</div><div class='ctx'> 		while (!data_to_read &amp;&amp; !signal_pending(current)) {</div><div class='ctx'> 			set_current_state(TASK_INTERRUPTIBLE);</div><div class='del'>-			spin_unlock_irq(&amp;ipmi_read_lock);</div><div class='add'>+			mutex_unlock(&amp;ipmi_read_mutex);</div><div class='ctx'> 			schedule();</div><div class='del'>-			spin_lock_irq(&amp;ipmi_read_lock);</div><div class='add'>+			mutex_lock(&amp;ipmi_read_mutex);</div><div class='ctx'> 		}</div><div class='ctx'> 		remove_wait_queue(&amp;read_q, &amp;wait);</div><div class='ctx'> </div><div class='hunk'>@@ -818,7 +780,7 @@ static ssize_t ipmi_read(struct file *file,</div><div class='ctx'> 	data_to_read = 0;</div><div class='ctx'> </div><div class='ctx'>  out:</div><div class='del'>-	spin_unlock_irq(&amp;ipmi_read_lock);</div><div class='add'>+	mutex_unlock(&amp;ipmi_read_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (rv == 0) {</div><div class='ctx'> 		if (copy_to_user(buf, &amp;data_to_read, 1))</div><div class='hunk'>@@ -856,10 +818,10 @@ static __poll_t ipmi_poll(struct file *file, poll_table *wait)</div><div class='ctx'> </div><div class='ctx'> 	poll_wait(file, &amp;read_q, wait);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;ipmi_read_lock);</div><div class='add'>+	mutex_lock(&amp;ipmi_read_mutex);</div><div class='ctx'> 	if (data_to_read)</div><div class='ctx'> 		mask |= (EPOLLIN | EPOLLRDNORM);</div><div class='del'>-	spin_unlock_irq(&amp;ipmi_read_lock);</div><div class='add'>+	mutex_unlock(&amp;ipmi_read_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return mask;</div><div class='ctx'> }</div><div class='hunk'>@@ -932,13 +894,11 @@ static void ipmi_wdog_pretimeout_handler(void *handler_data)</div><div class='ctx'> 			if (atomic_inc_and_test(&amp;preop_panic_excl))</div><div class='ctx'> 				panic("Watchdog pre-timeout");</div><div class='ctx'> 		} else if (preop_val == WDOG_PREOP_GIVE_DATA) {</div><div class='del'>-			unsigned long flags;</div><div class='del'>-</div><div class='del'>-			spin_lock_irqsave(&amp;ipmi_read_lock, flags);</div><div class='add'>+			mutex_lock(&amp;ipmi_read_mutex);</div><div class='ctx'> 			data_to_read = 1;</div><div class='ctx'> 			wake_up_interruptible(&amp;read_q);</div><div class='ctx'> 			kill_fasync(&amp;fasync_q, SIGIO, POLL_IN);</div><div class='del'>-			spin_unlock_irqrestore(&amp;ipmi_read_lock, flags);</div><div class='add'>+			mutex_unlock(&amp;ipmi_read_mutex);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/mem.c b/drivers/char/mem.c<br/>index 169eed162a7f..48839958b0b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/mem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/mem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/mem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/mem.c</a></div><div class='hunk'>@@ -61,29 +61,11 @@ static inline int page_is_allowed(unsigned long pfn)</div><div class='ctx'> {</div><div class='ctx'> 	return devmem_is_allowed(pfn);</div><div class='ctx'> }</div><div class='del'>-static inline int range_is_allowed(unsigned long pfn, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	u64 from = ((u64)pfn) &lt;&lt; PAGE_SHIFT;</div><div class='del'>-	u64 to = from + size;</div><div class='del'>-	u64 cursor = from;</div><div class='del'>-</div><div class='del'>-	while (cursor &lt; to) {</div><div class='del'>-		if (!devmem_is_allowed(pfn))</div><div class='del'>-			return 0;</div><div class='del'>-		cursor += PAGE_SIZE;</div><div class='del'>-		pfn++;</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='ctx'> #else</div><div class='ctx'> static inline int page_is_allowed(unsigned long pfn)</div><div class='ctx'> {</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='del'>-static inline int range_is_allowed(unsigned long pfn, unsigned long size)</div><div class='del'>-{</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static inline bool should_stop_iteration(void)</div><div class='head'>diff --git a/drivers/char/misc.c b/drivers/char/misc.c<br/>index f7dd455dd0dd..dda466f9181a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/misc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/misc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/misc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/misc.c</a></div><div class='hunk'>@@ -315,7 +315,7 @@ static int __init misc_init(void)</div><div class='ctx'> 		goto fail_remove;</div><div class='ctx'> </div><div class='ctx'> 	err = -EIO;</div><div class='del'>-	if (register_chrdev(MISC_MAJOR, "misc", &amp;misc_fops))</div><div class='add'>+	if (__register_chrdev(MISC_MAJOR, 0, MINORMASK + 1, "misc", &amp;misc_fops))</div><div class='ctx'> 		goto fail_printk;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/random.c b/drivers/char/random.c<br/>index 38f2fab29c56..b8b24b6ed3fe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/random.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/random.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/random.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/random.c</a></div><div class='hunk'>@@ -309,11 +309,11 @@ static void crng_reseed(struct work_struct *work)</div><div class='ctx'>  * key value, at index 4, so the state should always be zeroed out</div><div class='ctx'>  * immediately after using in order to maintain forward secrecy.</div><div class='ctx'>  * If the state cannot be erased in a timely manner, then it is</div><div class='del'>- * safer to set the random_data parameter to &amp;chacha_state[4] so</div><div class='del'>- * that this function overwrites it before returning.</div><div class='add'>+ * safer to set the random_data parameter to &amp;chacha_state-&gt;x[4]</div><div class='add'>+ * so that this function overwrites it before returning.</div><div class='ctx'>  */</div><div class='ctx'> static void crng_fast_key_erasure(u8 key[CHACHA_KEY_SIZE],</div><div class='del'>-				  u32 chacha_state[CHACHA_STATE_WORDS],</div><div class='add'>+				  struct chacha_state *chacha_state,</div><div class='ctx'> 				  u8 *random_data, size_t random_data_len)</div><div class='ctx'> {</div><div class='ctx'> 	u8 first_block[CHACHA_BLOCK_SIZE];</div><div class='hunk'>@@ -321,8 +321,8 @@ static void crng_fast_key_erasure(u8 key[CHACHA_KEY_SIZE],</div><div class='ctx'> 	BUG_ON(random_data_len &gt; 32);</div><div class='ctx'> </div><div class='ctx'> 	chacha_init_consts(chacha_state);</div><div class='del'>-	memcpy(&amp;chacha_state[4], key, CHACHA_KEY_SIZE);</div><div class='del'>-	memset(&amp;chacha_state[12], 0, sizeof(u32) * 4);</div><div class='add'>+	memcpy(&amp;chacha_state-&gt;x[4], key, CHACHA_KEY_SIZE);</div><div class='add'>+	memset(&amp;chacha_state-&gt;x[12], 0, sizeof(u32) * 4);</div><div class='ctx'> 	chacha20_block(chacha_state, first_block);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(key, first_block, CHACHA_KEY_SIZE);</div><div class='hunk'>@@ -335,7 +335,7 @@ static void crng_fast_key_erasure(u8 key[CHACHA_KEY_SIZE],</div><div class='ctx'>  * random data. It also returns up to 32 bytes on its own of random data</div><div class='ctx'>  * that may be used; random_data_len may not be greater than 32.</div><div class='ctx'>  */</div><div class='del'>-static void crng_make_state(u32 chacha_state[CHACHA_STATE_WORDS],</div><div class='add'>+static void crng_make_state(struct chacha_state *chacha_state,</div><div class='ctx'> 			    u8 *random_data, size_t random_data_len)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -395,7 +395,7 @@ static void crng_make_state(u32 chacha_state[CHACHA_STATE_WORDS],</div><div class='ctx'> </div><div class='ctx'> static void _get_random_bytes(void *buf, size_t len)</div><div class='ctx'> {</div><div class='del'>-	u32 chacha_state[CHACHA_STATE_WORDS];</div><div class='add'>+	struct chacha_state chacha_state;</div><div class='ctx'> 	u8 tmp[CHACHA_BLOCK_SIZE];</div><div class='ctx'> 	size_t first_block_len;</div><div class='ctx'> </div><div class='hunk'>@@ -403,26 +403,26 @@ static void _get_random_bytes(void *buf, size_t len)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	first_block_len = min_t(size_t, 32, len);</div><div class='del'>-	crng_make_state(chacha_state, buf, first_block_len);</div><div class='add'>+	crng_make_state(&amp;chacha_state, buf, first_block_len);</div><div class='ctx'> 	len -= first_block_len;</div><div class='ctx'> 	buf += first_block_len;</div><div class='ctx'> </div><div class='ctx'> 	while (len) {</div><div class='ctx'> 		if (len &lt; CHACHA_BLOCK_SIZE) {</div><div class='del'>-			chacha20_block(chacha_state, tmp);</div><div class='add'>+			chacha20_block(&amp;chacha_state, tmp);</div><div class='ctx'> 			memcpy(buf, tmp, len);</div><div class='ctx'> 			memzero_explicit(tmp, sizeof(tmp));</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		chacha20_block(chacha_state, buf);</div><div class='del'>-		if (unlikely(chacha_state[12] == 0))</div><div class='del'>-			++chacha_state[13];</div><div class='add'>+		chacha20_block(&amp;chacha_state, buf);</div><div class='add'>+		if (unlikely(chacha_state.x[12] == 0))</div><div class='add'>+			++chacha_state.x[13];</div><div class='ctx'> 		len -= CHACHA_BLOCK_SIZE;</div><div class='ctx'> 		buf += CHACHA_BLOCK_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memzero_explicit(chacha_state, sizeof(chacha_state));</div><div class='add'>+	chacha_zeroize_state(&amp;chacha_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -441,7 +441,7 @@ EXPORT_SYMBOL(get_random_bytes);</div><div class='ctx'> </div><div class='ctx'> static ssize_t get_random_bytes_user(struct iov_iter *iter)</div><div class='ctx'> {</div><div class='del'>-	u32 chacha_state[CHACHA_STATE_WORDS];</div><div class='add'>+	struct chacha_state chacha_state;</div><div class='ctx'> 	u8 block[CHACHA_BLOCK_SIZE];</div><div class='ctx'> 	size_t ret = 0, copied;</div><div class='ctx'> </div><div class='hunk'>@@ -453,21 +453,22 @@ static ssize_t get_random_bytes_user(struct iov_iter *iter)</div><div class='ctx'> 	 * bytes, in case userspace causes copy_to_iter() below to sleep</div><div class='ctx'> 	 * forever, so that we still retain forward secrecy in that case.</div><div class='ctx'> 	 */</div><div class='del'>-	crng_make_state(chacha_state, (u8 *)&amp;chacha_state[4], CHACHA_KEY_SIZE);</div><div class='add'>+	crng_make_state(&amp;chacha_state, (u8 *)&amp;chacha_state.x[4],</div><div class='add'>+			CHACHA_KEY_SIZE);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * However, if we're doing a read of len &lt;= 32, we don't need to</div><div class='ctx'> 	 * use chacha_state after, so we can simply return those bytes to</div><div class='ctx'> 	 * the user directly.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (iov_iter_count(iter) &lt;= CHACHA_KEY_SIZE) {</div><div class='del'>-		ret = copy_to_iter(&amp;chacha_state[4], CHACHA_KEY_SIZE, iter);</div><div class='add'>+		ret = copy_to_iter(&amp;chacha_state.x[4], CHACHA_KEY_SIZE, iter);</div><div class='ctx'> 		goto out_zero_chacha;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (;;) {</div><div class='del'>-		chacha20_block(chacha_state, block);</div><div class='del'>-		if (unlikely(chacha_state[12] == 0))</div><div class='del'>-			++chacha_state[13];</div><div class='add'>+		chacha20_block(&amp;chacha_state, block);</div><div class='add'>+		if (unlikely(chacha_state.x[12] == 0))</div><div class='add'>+			++chacha_state.x[13];</div><div class='ctx'> </div><div class='ctx'> 		copied = copy_to_iter(block, sizeof(block), iter);</div><div class='ctx'> 		ret += copied;</div><div class='hunk'>@@ -484,7 +485,7 @@ static ssize_t get_random_bytes_user(struct iov_iter *iter)</div><div class='ctx'> </div><div class='ctx'> 	memzero_explicit(block, sizeof(block));</div><div class='ctx'> out_zero_chacha:</div><div class='del'>-	memzero_explicit(chacha_state, sizeof(chacha_state));</div><div class='add'>+	chacha_zeroize_state(&amp;chacha_state);</div><div class='ctx'> 	return ret ? ret : -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -726,6 +727,7 @@ static void __cold _credit_init_bits(size_t bits)</div><div class='ctx'> 	static DECLARE_WORK(set_ready, crng_set_ready);</div><div class='ctx'> 	unsigned int new, orig, add;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int m;</div><div class='ctx'> </div><div class='ctx'> 	if (!bits)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -748,9 +750,9 @@ static void __cold _credit_init_bits(size_t bits)</div><div class='ctx'> 		wake_up_interruptible(&amp;crng_init_wait);</div><div class='ctx'> 		kill_fasync(&amp;fasync, SIGIO, POLL_IN);</div><div class='ctx'> 		pr_notice("crng init done\n");</div><div class='del'>-		if (urandom_warning.missed)</div><div class='del'>-			pr_notice("%d urandom warning(s) missed due to ratelimiting\n",</div><div class='del'>-				  urandom_warning.missed);</div><div class='add'>+		m = ratelimit_state_get_miss(&amp;urandom_warning);</div><div class='add'>+		if (m)</div><div class='add'>+			pr_notice("%d urandom warning(s) missed due to ratelimiting\n", m);</div><div class='ctx'> 	} else if (orig &lt; POOL_EARLY_BITS &amp;&amp; new &gt;= POOL_EARLY_BITS) {</div><div class='ctx'> 		spin_lock_irqsave(&amp;base_crng.lock, flags);</div><div class='ctx'> 		/* Check if crng_init is CRNG_EMPTY, to avoid race with crng_reseed(). */</div><div class='hunk'>@@ -1311,9 +1313,9 @@ static void __cold try_to_generate_entropy(void)</div><div class='ctx'> 	while (!crng_ready() &amp;&amp; !signal_pending(current)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Check !timer_pending() and then ensure that any previous callback has finished</div><div class='del'>-		 * executing by checking try_to_del_timer_sync(), before queueing the next one.</div><div class='add'>+		 * executing by checking timer_delete_sync_try(), before queueing the next one.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!timer_pending(&amp;stack-&gt;timer) &amp;&amp; try_to_del_timer_sync(&amp;stack-&gt;timer) &gt;= 0) {</div><div class='add'>+		if (!timer_pending(&amp;stack-&gt;timer) &amp;&amp; timer_delete_sync_try(&amp;stack-&gt;timer) &gt;= 0) {</div><div class='ctx'> 			struct cpumask timer_cpus;</div><div class='ctx'> 			unsigned int num_cpus;</div><div class='ctx'> </div><div class='hunk'>@@ -1353,7 +1355,7 @@ static void __cold try_to_generate_entropy(void)</div><div class='ctx'> 	mix_pool_bytes(&amp;stack-&gt;entropy, sizeof(stack-&gt;entropy));</div><div class='ctx'> </div><div class='ctx'> 	timer_delete_sync(&amp;stack-&gt;timer);</div><div class='del'>-	destroy_timer_on_stack(&amp;stack-&gt;timer);</div><div class='add'>+	timer_destroy_on_stack(&amp;stack-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1466,7 +1468,7 @@ static ssize_t urandom_read_iter(struct kiocb *kiocb, struct iov_iter *iter)</div><div class='ctx'> </div><div class='ctx'> 	if (!crng_ready()) {</div><div class='ctx'> 		if (!ratelimit_disable &amp;&amp; maxwarn &lt;= 0)</div><div class='del'>-			++urandom_warning.missed;</div><div class='add'>+			ratelimit_state_inc_miss(&amp;urandom_warning);</div><div class='ctx'> 		else if (ratelimit_disable || __ratelimit(&amp;urandom_warning)) {</div><div class='ctx'> 			--maxwarn;</div><div class='ctx'> 			pr_notice("%s: uninitialized urandom read (%zu bytes read)\n",</div><div class='head'>diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig<br/>index fe4f3a609934..dddd702b2454 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/Kconfig</a></div><div class='hunk'>@@ -234,5 +234,15 @@ config TCG_FTPM_TEE</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver proxies for firmware TPM running in TEE.</div><div class='ctx'> </div><div class='add'>+config TCG_SVSM</div><div class='add'>+	tristate "SNP SVSM vTPM interface"</div><div class='add'>+	depends on AMD_MEM_ENCRYPT</div><div class='add'>+	help</div><div class='add'>+	  This is a driver for the AMD SVSM vTPM protocol that a SEV-SNP guest</div><div class='add'>+	  OS can use to discover and talk to a vTPM emulated by the Secure VM</div><div class='add'>+	  Service Module (SVSM) in the guest context, but at a more privileged</div><div class='add'>+	  level (usually VMPL0).  To compile this driver as a module, choose M</div><div class='add'>+	  here; the module will be called tpm_svsm.</div><div class='add'>+</div><div class='ctx'> source "drivers/char/tpm/st33zp24/Kconfig"</div><div class='ctx'> endif # TCG_TPM</div><div class='head'>diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile<br/>index 2b004df8c04b..9de1b3ea34a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/Makefile</a></div><div class='hunk'>@@ -45,3 +45,4 @@ obj-$(CONFIG_TCG_CRB) += tpm_crb.o</div><div class='ctx'> obj-$(CONFIG_TCG_ARM_CRB_FFA) += tpm_crb_ffa.o</div><div class='ctx'> obj-$(CONFIG_TCG_VTPM_PROXY) += tpm_vtpm_proxy.o</div><div class='ctx'> obj-$(CONFIG_TCG_FTPM_TEE) += tpm_ftpm_tee.o</div><div class='add'>+obj-$(CONFIG_TCG_SVSM) += tpm_svsm.o</div><div class='head'>diff --git a/drivers/char/tpm/eventlog/tpm1.c b/drivers/char/tpm/eventlog/tpm1.c<br/>index 12ee42a31c71..e7913b2853d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/eventlog/tpm1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/eventlog/tpm1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/eventlog/tpm1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/eventlog/tpm1.c</a></div><div class='hunk'>@@ -257,11 +257,8 @@ static int tpm1_ascii_bios_measurements_show(struct seq_file *m, void *v)</div><div class='ctx'> 	    (unsigned char *)(v + sizeof(struct tcpa_event));</div><div class='ctx'> </div><div class='ctx'> 	eventname = kmalloc(MAX_TEXT_EVENT, GFP_KERNEL);</div><div class='del'>-	if (!eventname) {</div><div class='del'>-		printk(KERN_ERR "%s: ERROR - No Memory for event name\n ",</div><div class='del'>-		       __func__);</div><div class='del'>-		return -EFAULT;</div><div class='del'>-	}</div><div class='add'>+	if (!eventname)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* 1st: PCR */</div><div class='ctx'> 	seq_printf(m, "%2d ", do_endian_conversion(event-&gt;pcr_index));</div><div class='head'>diff --git a/drivers/char/tpm/tpm-buf.c b/drivers/char/tpm/tpm-buf.c<br/>index e49a19fea3bd..dc882fc9fa9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-buf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm-buf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm-buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/tpm-buf.c</a></div><div class='hunk'>@@ -201,7 +201,7 @@ static void tpm_buf_read(struct tpm_buf *buf, off_t *offset, size_t count, void</div><div class='ctx'>  */</div><div class='ctx'> u8 tpm_buf_read_u8(struct tpm_buf *buf, off_t *offset)</div><div class='ctx'> {</div><div class='del'>-	u8 value;</div><div class='add'>+	u8 value = 0;</div><div class='ctx'> </div><div class='ctx'> 	tpm_buf_read(buf, offset, sizeof(value), &amp;value);</div><div class='ctx'> </div><div class='hunk'>@@ -218,7 +218,7 @@ EXPORT_SYMBOL_GPL(tpm_buf_read_u8);</div><div class='ctx'>  */</div><div class='ctx'> u16 tpm_buf_read_u16(struct tpm_buf *buf, off_t *offset)</div><div class='ctx'> {</div><div class='del'>-	u16 value;</div><div class='add'>+	u16 value = 0;</div><div class='ctx'> </div><div class='ctx'> 	tpm_buf_read(buf, offset, sizeof(value), &amp;value);</div><div class='ctx'> </div><div class='hunk'>@@ -235,7 +235,7 @@ EXPORT_SYMBOL_GPL(tpm_buf_read_u16);</div><div class='ctx'>  */</div><div class='ctx'> u32 tpm_buf_read_u32(struct tpm_buf *buf, off_t *offset)</div><div class='ctx'> {</div><div class='del'>-	u32 value;</div><div class='add'>+	u32 value = 0;</div><div class='ctx'> </div><div class='ctx'> 	tpm_buf_read(buf, offset, sizeof(value), &amp;value);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/tpm/tpm2-sessions.c b/drivers/char/tpm/tpm2-sessions.c<br/>index 3f89635ba5e8..7b5049b3d476 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm2-sessions.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm2-sessions.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm2-sessions.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/tpm2-sessions.c</a></div><div class='hunk'>@@ -40,11 +40,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * These are the usage functions:</div><div class='ctx'>  *</div><div class='del'>- * tpm2_start_auth_session() which allocates the opaque auth structure</div><div class='del'>- *	and gets a session from the TPM.  This must be called before</div><div class='del'>- *	any of the following functions.  The session is protected by a</div><div class='del'>- *	session_key which is derived from a random salt value</div><div class='del'>- *	encrypted to the NULL seed.</div><div class='ctx'>  * tpm2_end_auth_session() kills the session and frees the resources.</div><div class='ctx'>  *	Under normal operation this function is done by</div><div class='ctx'>  *	tpm_buf_check_hmac_response(), so this is only to be used on</div><div class='hunk'>@@ -963,16 +958,13 @@ err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * tpm2_start_auth_session() - create a HMAC authentication session with the TPM</div><div class='del'>- * @chip: the TPM chip structure to create the session with</div><div class='add'>+ * tpm2_start_auth_session() - Create an a HMAC authentication session</div><div class='add'>+ * @chip:	A TPM chip</div><div class='ctx'>  *</div><div class='del'>- * This function loads the NULL seed from its saved context and starts</div><div class='del'>- * an authentication session on the null seed, fills in the</div><div class='del'>- * @chip-&gt;auth structure to contain all the session details necessary</div><div class='del'>- * for performing the HMAC, encrypt and decrypt operations and</div><div class='del'>- * returns.  The NULL seed is flushed before this function returns.</div><div class='add'>+ * Loads the ephemeral key (null seed), and starts an HMAC authenticated</div><div class='add'>+ * session. The null seed is flushed before the return.</div><div class='ctx'>  *</div><div class='del'>- * Return: zero on success or actual error encountered.</div><div class='add'>+ * Returns zero on success, or a POSIX error code.</div><div class='ctx'>  */</div><div class='ctx'> int tpm2_start_auth_session(struct tpm_chip *chip)</div><div class='ctx'> {</div><div class='hunk'>@@ -1024,7 +1016,7 @@ int tpm2_start_auth_session(struct tpm_chip *chip)</div><div class='ctx'> 	/* hash algorithm for session */</div><div class='ctx'> 	tpm_buf_append_u16(&amp;buf, TPM_ALG_SHA256);</div><div class='ctx'> </div><div class='del'>-	rc = tpm_transmit_cmd(chip, &amp;buf, 0, "start auth session");</div><div class='add'>+	rc = tpm_ret_to_err(tpm_transmit_cmd(chip, &amp;buf, 0, "StartAuthSession"));</div><div class='ctx'> 	tpm2_flush_context(chip, null_key);</div><div class='ctx'> </div><div class='ctx'> 	if (rc == TPM2_RC_SUCCESS)</div><div class='head'>diff --git a/drivers/char/tpm/tpm_crb_ffa.c b/drivers/char/tpm/tpm_crb_ffa.c<br/>index 3169a87a56b6..4ead61f01299 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_crb_ffa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm_crb_ffa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_crb_ffa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/tpm_crb_ffa.c</a></div><div class='hunk'>@@ -38,9 +38,11 @@</div><div class='ctx'>  * messages.</div><div class='ctx'>  *</div><div class='ctx'>  * All requests with FFA_MSG_SEND_DIRECT_REQ and FFA_MSG_SEND_DIRECT_RESP</div><div class='del'>- * are using the AArch32 SMC calling convention with register usage as</div><div class='del'>- * defined in FF-A specification:</div><div class='del'>- * w0:    Function ID (0x8400006F or 0x84000070)</div><div class='add'>+ * are using the AArch32 or AArch64 SMC calling convention with register usage</div><div class='add'>+ * as defined in FF-A specification:</div><div class='add'>+ * w0:    Function ID</div><div class='add'>+ *          -for 32-bit: 0x8400006F or 0x84000070</div><div class='add'>+ *          -for 64-bit: 0xC400006F or 0xC4000070</div><div class='ctx'>  * w1:    Source/Destination IDs</div><div class='ctx'>  * w2:    Reserved (MBZ)</div><div class='ctx'>  * w3-w7: Implementation defined, free to be used below</div><div class='hunk'>@@ -68,7 +70,8 @@</div><div class='ctx'> #define CRB_FFA_GET_INTERFACE_VERSION 0x0f000001</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Return information on a given feature of the TPM service</div><div class='add'>+ * Notifies the TPM service that a TPM command or TPM locality request is</div><div class='add'>+ * ready to be processed, and allows the TPM service to process it.</div><div class='ctx'>  * Call register usage:</div><div class='ctx'>  * w3:    Not used (MBZ)</div><div class='ctx'>  * w4:    TPM service function ID, CRB_FFA_START</div><div class='hunk'>@@ -105,7 +108,10 @@ struct tpm_crb_ffa {</div><div class='ctx'> 	u16 minor_version;</div><div class='ctx'> 	/* lock to protect sending of FF-A messages: */</div><div class='ctx'> 	struct mutex msg_data_lock;</div><div class='del'>-	struct ffa_send_direct_data direct_msg_data;</div><div class='add'>+	union {</div><div class='add'>+		struct ffa_send_direct_data direct_msg_data;</div><div class='add'>+		struct ffa_send_direct_data2 direct_msg_data2;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tpm_crb_ffa *tpm_crb_ffa;</div><div class='hunk'>@@ -185,18 +191,34 @@ static int __tpm_crb_ffa_send_recieve(unsigned long func_id,</div><div class='ctx'> </div><div class='ctx'> 	msg_ops = tpm_crb_ffa-&gt;ffa_dev-&gt;ops-&gt;msg_ops;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;tpm_crb_ffa-&gt;direct_msg_data, 0x00,</div><div class='del'>-	       sizeof(struct ffa_send_direct_data));</div><div class='del'>-</div><div class='del'>-	tpm_crb_ffa-&gt;direct_msg_data.data1 = func_id;</div><div class='del'>-	tpm_crb_ffa-&gt;direct_msg_data.data2 = a0;</div><div class='del'>-	tpm_crb_ffa-&gt;direct_msg_data.data3 = a1;</div><div class='del'>-	tpm_crb_ffa-&gt;direct_msg_data.data4 = a2;</div><div class='add'>+	if (ffa_partition_supports_direct_req2_recv(tpm_crb_ffa-&gt;ffa_dev)) {</div><div class='add'>+		memset(&amp;tpm_crb_ffa-&gt;direct_msg_data2, 0x00,</div><div class='add'>+		       sizeof(struct ffa_send_direct_data2));</div><div class='add'>+</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data2.data[0] = func_id;</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data2.data[1] = a0;</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data2.data[2] = a1;</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data2.data[3] = a2;</div><div class='add'>+</div><div class='add'>+		ret = msg_ops-&gt;sync_send_receive2(tpm_crb_ffa-&gt;ffa_dev,</div><div class='add'>+				&amp;tpm_crb_ffa-&gt;direct_msg_data2);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = tpm_crb_ffa_to_linux_errno(tpm_crb_ffa-&gt;direct_msg_data2.data[0]);</div><div class='add'>+	} else {</div><div class='add'>+		memset(&amp;tpm_crb_ffa-&gt;direct_msg_data, 0x00,</div><div class='add'>+		       sizeof(struct ffa_send_direct_data));</div><div class='add'>+</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data.data1 = func_id;</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data.data2 = a0;</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data.data3 = a1;</div><div class='add'>+		tpm_crb_ffa-&gt;direct_msg_data.data4 = a2;</div><div class='add'>+</div><div class='add'>+		ret = msg_ops-&gt;sync_send_receive(tpm_crb_ffa-&gt;ffa_dev,</div><div class='add'>+				&amp;tpm_crb_ffa-&gt;direct_msg_data);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = tpm_crb_ffa_to_linux_errno(tpm_crb_ffa-&gt;direct_msg_data.data1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = msg_ops-&gt;sync_send_receive(tpm_crb_ffa-&gt;ffa_dev,</div><div class='del'>-			&amp;tpm_crb_ffa-&gt;direct_msg_data);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = tpm_crb_ffa_to_linux_errno(tpm_crb_ffa-&gt;direct_msg_data.data1);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -231,8 +253,13 @@ int tpm_crb_ffa_get_interface_version(u16 *major, u16 *minor)</div><div class='ctx'> </div><div class='ctx'> 	rc = __tpm_crb_ffa_send_recieve(CRB_FFA_GET_INTERFACE_VERSION, 0x00, 0x00, 0x00);</div><div class='ctx'> 	if (!rc) {</div><div class='del'>-		*major = CRB_FFA_MAJOR_VERSION(tpm_crb_ffa-&gt;direct_msg_data.data2);</div><div class='del'>-		*minor = CRB_FFA_MINOR_VERSION(tpm_crb_ffa-&gt;direct_msg_data.data2);</div><div class='add'>+		if (ffa_partition_supports_direct_req2_recv(tpm_crb_ffa-&gt;ffa_dev)) {</div><div class='add'>+			*major = CRB_FFA_MAJOR_VERSION(tpm_crb_ffa-&gt;direct_msg_data2.data[1]);</div><div class='add'>+			*minor = CRB_FFA_MINOR_VERSION(tpm_crb_ffa-&gt;direct_msg_data2.data[1]);</div><div class='add'>+		} else {</div><div class='add'>+			*major = CRB_FFA_MAJOR_VERSION(tpm_crb_ffa-&gt;direct_msg_data.data2);</div><div class='add'>+			*minor = CRB_FFA_MINOR_VERSION(tpm_crb_ffa-&gt;direct_msg_data.data2);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -277,8 +304,9 @@ static int tpm_crb_ffa_probe(struct ffa_device *ffa_dev)</div><div class='ctx'> </div><div class='ctx'> 	tpm_crb_ffa = ERR_PTR(-ENODEV); // set tpm_crb_ffa so we can detect probe failure</div><div class='ctx'> </div><div class='del'>-	if (!ffa_partition_supports_direct_recv(ffa_dev)) {</div><div class='del'>-		pr_err("TPM partition doesn't support direct message receive.\n");</div><div class='add'>+	if (!ffa_partition_supports_direct_recv(ffa_dev) &amp;&amp;</div><div class='add'>+	    !ffa_partition_supports_direct_req2_recv(ffa_dev)) {</div><div class='add'>+		dev_warn(&amp;ffa_dev-&gt;dev, "partition doesn't support direct message receive.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -299,17 +327,17 @@ static int tpm_crb_ffa_probe(struct ffa_device *ffa_dev)</div><div class='ctx'> 	rc = tpm_crb_ffa_get_interface_version(&amp;tpm_crb_ffa-&gt;major_version,</div><div class='ctx'> 					       &amp;tpm_crb_ffa-&gt;minor_version);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		pr_err("failed to get crb interface version. rc:%d", rc);</div><div class='add'>+		dev_err(&amp;ffa_dev-&gt;dev, "failed to get crb interface version. rc:%d\n", rc);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pr_info("ABI version %u.%u", tpm_crb_ffa-&gt;major_version,</div><div class='add'>+	dev_info(&amp;ffa_dev-&gt;dev, "ABI version %u.%u\n", tpm_crb_ffa-&gt;major_version,</div><div class='ctx'> 		tpm_crb_ffa-&gt;minor_version);</div><div class='ctx'> </div><div class='ctx'> 	if (tpm_crb_ffa-&gt;major_version != CRB_FFA_VERSION_MAJOR ||</div><div class='ctx'> 	    (tpm_crb_ffa-&gt;minor_version &gt; 0 &amp;&amp;</div><div class='ctx'> 	    tpm_crb_ffa-&gt;minor_version &lt; CRB_FFA_VERSION_MINOR)) {</div><div class='del'>-		pr_err("Incompatible ABI version");</div><div class='add'>+		dev_warn(&amp;ffa_dev-&gt;dev, "Incompatible ABI version\n");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/char/tpm/tpm_svsm.c b/drivers/char/tpm/tpm_svsm.c<br/>new file mode 100644<br/>index 000000000000..4280edf427d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_svsm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/tpm_svsm.c</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Red Hat, Inc. All Rights Reserved.</div><div class='add'>+ *</div><div class='add'>+ * Driver for the vTPM defined by the AMD SVSM spec [1].</div><div class='add'>+ *</div><div class='add'>+ * The specification defines a protocol that a SEV-SNP guest OS can use to</div><div class='add'>+ * discover and talk to a vTPM emulated by the Secure VM Service Module (SVSM)</div><div class='add'>+ * in the guest context, but at a more privileged level (usually VMPL0).</div><div class='add'>+ *</div><div class='add'>+ * [1] "Secure VM Service Module for SEV-SNP Guests"</div><div class='add'>+ *     Publication # 58019 Revision: 1.00</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/tpm_svsm.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;asm/sev.h&gt;</div><div class='add'>+</div><div class='add'>+#include "tpm.h"</div><div class='add'>+</div><div class='add'>+struct tpm_svsm_priv {</div><div class='add'>+	void *buffer;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tpm_svsm_send(struct tpm_chip *chip, u8 *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct tpm_svsm_priv *priv = dev_get_drvdata(&amp;chip-&gt;dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = svsm_vtpm_cmd_request_fill(priv-&gt;buffer, 0, buf, len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The SVSM call uses the same buffer for the command and for the</div><div class='add'>+	 * response, so after this call, the buffer will contain the response</div><div class='add'>+	 * that can be used by .recv() op.</div><div class='add'>+	 */</div><div class='add'>+	return snp_svsm_vtpm_send_command(priv-&gt;buffer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tpm_svsm_recv(struct tpm_chip *chip, u8 *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct tpm_svsm_priv *priv = dev_get_drvdata(&amp;chip-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The internal buffer contains the response after we send the command</div><div class='add'>+	 * to SVSM.</div><div class='add'>+	 */</div><div class='add'>+	return svsm_vtpm_cmd_response_parse(priv-&gt;buffer, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tpm_class_ops tpm_chip_ops = {</div><div class='add'>+	.flags = TPM_OPS_AUTO_STARTUP,</div><div class='add'>+	.recv = tpm_svsm_recv,</div><div class='add'>+	.send = tpm_svsm_send,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init tpm_svsm_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct tpm_svsm_priv *priv;</div><div class='add'>+	struct tpm_chip *chip;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = devm_kmalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The maximum buffer supported is one page (see SVSM_VTPM_MAX_BUFFER</div><div class='add'>+	 * in tpm_svsm.h).</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;buffer = (void *)devm_get_free_pages(dev, GFP_KERNEL, 0);</div><div class='add'>+	if (!priv-&gt;buffer)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip = tpmm_chip_alloc(dev, &amp;tpm_chip_ops);</div><div class='add'>+	if (IS_ERR(chip))</div><div class='add'>+		return PTR_ERR(chip);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;chip-&gt;dev, priv);</div><div class='add'>+</div><div class='add'>+	err = tpm2_probe(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = tpm_chip_register(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "SNP SVSM vTPM %s device\n",</div><div class='add'>+		 (chip-&gt;flags &amp; TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit tpm_svsm_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct tpm_chip *chip = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	tpm_chip_unregister(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * tpm_svsm_remove() lives in .exit.text. For drivers registered via</div><div class='add'>+ * module_platform_driver_probe() this is ok because they cannot get unbound</div><div class='add'>+ * at runtime. So mark the driver struct with __refdata to prevent modpost</div><div class='add'>+ * triggering a section mismatch warning.</div><div class='add'>+ */</div><div class='add'>+static struct platform_driver tpm_svsm_driver __refdata = {</div><div class='add'>+	.remove = __exit_p(tpm_svsm_remove),</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "tpm-svsm",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver_probe(tpm_svsm_driver, tpm_svsm_probe);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("SNP SVSM vTPM Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_ALIAS("platform:tpm-svsm");</div><div class='head'>diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h<br/>index 970d02c337c7..6c3aa480396b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_tis_core.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/tpm/tpm_tis_core.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/tpm/tpm_tis_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/tpm/tpm_tis_core.h</a></div><div class='hunk'>@@ -54,7 +54,7 @@ enum tis_int_flags {</div><div class='ctx'> enum tis_defaults {</div><div class='ctx'> 	TIS_MEM_LEN = 0x5000,</div><div class='ctx'> 	TIS_SHORT_TIMEOUT = 750,	/* ms */</div><div class='del'>-	TIS_LONG_TIMEOUT = 2000,	/* 2 sec */</div><div class='add'>+	TIS_LONG_TIMEOUT = 4000,	/* 4 secs */</div><div class='ctx'> 	TIS_TIMEOUT_MIN_ATML = 14700,	/* usecs */</div><div class='ctx'> 	TIS_TIMEOUT_MAX_ATML = 15000,	/* usecs */</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c<br/>index 5f04951d0dd4..088182e54deb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/char/virtio_console.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/char/virtio_console.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/char/virtio_console.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/char/virtio_console.c</a></div><div class='hunk'>@@ -1576,8 +1576,8 @@ static void handle_control_message(struct virtio_device *vdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case VIRTIO_CONSOLE_RESIZE: {</div><div class='ctx'> 		struct {</div><div class='del'>-			__u16 rows;</div><div class='del'>-			__u16 cols;</div><div class='add'>+			__virtio16 cols;</div><div class='add'>+			__virtio16 rows;</div><div class='ctx'> 		} size;</div><div class='ctx'> </div><div class='ctx'> 		if (!is_console_port(port))</div><div class='hunk'>@@ -1585,7 +1585,8 @@ static void handle_control_message(struct virtio_device *vdev,</div><div class='ctx'> </div><div class='ctx'> 		memcpy(&amp;size, buf-&gt;buf + buf-&gt;offset + sizeof(*cpkt),</div><div class='ctx'> 		       sizeof(size));</div><div class='del'>-		set_console_size(port, size.rows, size.cols);</div><div class='add'>+		set_console_size(port, virtio16_to_cpu(vdev, size.rows),</div><div class='add'>+				 virtio16_to_cpu(vdev, size.cols));</div><div class='ctx'> </div><div class='ctx'> 		port-&gt;cons.hvc-&gt;irq_requested = 1;</div><div class='ctx'> 		resize_console(port);</div><div class='head'>diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c<br/>index 014db6386624..8ddf3a9a53df 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/clk-s2mps11.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/clk-s2mps11.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/clk-s2mps11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clk/clk-s2mps11.c</a></div><div class='hunk'>@@ -137,6 +137,8 @@ static int s2mps11_clk_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!clk_data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	clk_data-&gt;num = S2MPS11_CLKS_NUM;</div><div class='add'>+</div><div class='ctx'> 	switch (hwid) {</div><div class='ctx'> 	case S2MPS11X:</div><div class='ctx'> 		s2mps11_reg = S2MPS11_REG_RTC_CTRL;</div><div class='hunk'>@@ -186,7 +188,6 @@ static int s2mps11_clk_probe(struct platform_device *pdev)</div><div class='ctx'> 		clk_data-&gt;hws[i] = &amp;s2mps11_clks[i].hw;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_data-&gt;num = S2MPS11_CLKS_NUM;</div><div class='ctx'> 	of_clk_add_hw_provider(s2mps11_clks-&gt;clk_np, of_clk_hw_onecell_get,</div><div class='ctx'> 			       clk_data);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/clk/rockchip/clk-rk3576.c b/drivers/clk/rockchip/clk-rk3576.c<br/>index 1f4547af5acf..9bc0ef51ef68 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/rockchip/clk-rk3576.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/rockchip/clk-rk3576.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/rockchip/clk-rk3576.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clk/rockchip/clk-rk3576.c</a></div><div class='hunk'>@@ -543,6 +543,8 @@ static struct rockchip_clk_branch rk3576_clk_branches[] __initdata = {</div><div class='ctx'> 			RK3576_CLKGATE_CON(5), 14, GFLAGS),</div><div class='ctx'> 	GATE(CLK_OTPC_AUTO_RD_G, "clk_otpc_auto_rd_g", "xin24m", 0,</div><div class='ctx'> 			RK3576_CLKGATE_CON(5), 15, GFLAGS),</div><div class='add'>+	GATE(CLK_OTP_PHY_G, "clk_otp_phy_g", "xin24m", 0,</div><div class='add'>+			RK3576_CLKGATE_CON(6), 0, GFLAGS),</div><div class='ctx'> 	COMPOSITE(CLK_MIPI_CAMERAOUT_M0, "clk_mipi_cameraout_m0", mux_24m_spll_gpll_cpll_p, 0,</div><div class='ctx'> 			RK3576_CLKSEL_CON(38), 8, 2, MFLAGS, 0, 8, DFLAGS,</div><div class='ctx'> 			RK3576_CLKGATE_CON(6), 3, GFLAGS),</div><div class='head'>diff --git a/drivers/clk/sunxi-ng/ccu-sun20i-d1.c b/drivers/clk/sunxi-ng/ccu-sun20i-d1.c<br/>index bb66c906ebbb..e83d4fd40240 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu-sun20i-d1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/sunxi-ng/ccu-sun20i-d1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu-sun20i-d1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clk/sunxi-ng/ccu-sun20i-d1.c</a></div><div class='hunk'>@@ -412,19 +412,23 @@ static const struct clk_parent_data mmc0_mmc1_parents[] = {</div><div class='ctx'> 	{ .hw = &amp;pll_periph0_2x_clk.common.hw },</div><div class='ctx'> 	{ .hw = &amp;pll_audio1_div2_clk.common.hw },</div><div class='ctx'> };</div><div class='del'>-static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(mmc0_clk, "mmc0", mmc0_mmc1_parents, 0x830,</div><div class='del'>-				       0, 4,	/* M */</div><div class='del'>-				       8, 2,	/* P */</div><div class='del'>-				       24, 3,	/* mux */</div><div class='del'>-				       BIT(31),	/* gate */</div><div class='del'>-				       0);</div><div class='del'>-</div><div class='del'>-static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(mmc1_clk, "mmc1", mmc0_mmc1_parents, 0x834,</div><div class='del'>-				       0, 4,	/* M */</div><div class='del'>-				       8, 2,	/* P */</div><div class='del'>-				       24, 3,	/* mux */</div><div class='del'>-				       BIT(31),	/* gate */</div><div class='del'>-				       0);</div><div class='add'>+static SUNXI_CCU_MP_DATA_WITH_MUX_GATE_POSTDIV(mmc0_clk, "mmc0",</div><div class='add'>+					       mmc0_mmc1_parents, 0x830,</div><div class='add'>+					       0, 4,		/* M */</div><div class='add'>+					       8, 2,		/* P */</div><div class='add'>+					       24, 3,		/* mux */</div><div class='add'>+					       BIT(31),		/* gate */</div><div class='add'>+					       2,		/* post-div */</div><div class='add'>+					       0);</div><div class='add'>+</div><div class='add'>+static SUNXI_CCU_MP_DATA_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1",</div><div class='add'>+					       mmc0_mmc1_parents, 0x834,</div><div class='add'>+					       0, 4,		/* M */</div><div class='add'>+					       8, 2,		/* P */</div><div class='add'>+					       24, 3,		/* mux */</div><div class='add'>+					       BIT(31),		/* gate */</div><div class='add'>+					       2,		/* post-div */</div><div class='add'>+					       0);</div><div class='ctx'> </div><div class='ctx'> static const struct clk_parent_data mmc2_parents[] = {</div><div class='ctx'> 	{ .fw_name = "hosc" },</div><div class='hunk'>@@ -433,12 +437,14 @@ static const struct clk_parent_data mmc2_parents[] = {</div><div class='ctx'> 	{ .hw = &amp;pll_periph0_800M_clk.common.hw },</div><div class='ctx'> 	{ .hw = &amp;pll_audio1_div2_clk.common.hw },</div><div class='ctx'> };</div><div class='del'>-static SUNXI_CCU_MP_DATA_WITH_MUX_GATE(mmc2_clk, "mmc2", mmc2_parents, 0x838,</div><div class='del'>-				       0, 4,	/* M */</div><div class='del'>-				       8, 2,	/* P */</div><div class='del'>-				       24, 3,	/* mux */</div><div class='del'>-				       BIT(31),	/* gate */</div><div class='del'>-				       0);</div><div class='add'>+static SUNXI_CCU_MP_DATA_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc2_parents,</div><div class='add'>+					       0x838,</div><div class='add'>+					       0, 4,		/* M */</div><div class='add'>+					       8, 2,		/* P */</div><div class='add'>+					       24, 3,		/* mux */</div><div class='add'>+					       BIT(31),		/* gate */</div><div class='add'>+					       2,		/* post-div */</div><div class='add'>+					       0);</div><div class='ctx'> </div><div class='ctx'> static SUNXI_CCU_GATE_HWS(bus_mmc0_clk, "bus-mmc0", psi_ahb_hws,</div><div class='ctx'> 			  0x84c, BIT(0), 0);</div><div class='head'>diff --git a/drivers/clk/sunxi-ng/ccu_mp.h b/drivers/clk/sunxi-ng/ccu_mp.h<br/>index b35aeec70484..bb09c649bfa3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu_mp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clk/sunxi-ng/ccu_mp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clk/sunxi-ng/ccu_mp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clk/sunxi-ng/ccu_mp.h</a></div><div class='hunk'>@@ -52,6 +52,28 @@ struct ccu_mp {</div><div class='ctx'> 		}							\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define SUNXI_CCU_MP_DATA_WITH_MUX_GATE_POSTDIV(_struct, _name, _parents, \</div><div class='add'>+						_reg,			\</div><div class='add'>+						_mshift, _mwidth,	\</div><div class='add'>+						_pshift, _pwidth,	\</div><div class='add'>+						_muxshift, _muxwidth,	\</div><div class='add'>+						_gate, _postdiv, _flags)\</div><div class='add'>+	struct ccu_mp _struct = {					\</div><div class='add'>+		.enable	= _gate,					\</div><div class='add'>+		.m	= _SUNXI_CCU_DIV(_mshift, _mwidth),		\</div><div class='add'>+		.p	= _SUNXI_CCU_DIV(_pshift, _pwidth),		\</div><div class='add'>+		.mux	= _SUNXI_CCU_MUX(_muxshift, _muxwidth),		\</div><div class='add'>+		.fixed_post_div	= _postdiv,				\</div><div class='add'>+		.common	= {						\</div><div class='add'>+			.reg		= _reg,				\</div><div class='add'>+			.features	= CCU_FEATURE_FIXED_POSTDIV,	\</div><div class='add'>+			.hw.init	= CLK_HW_INIT_PARENTS_DATA(_name, \</div><div class='add'>+							_parents,	\</div><div class='add'>+							&amp;ccu_mp_ops,	\</div><div class='add'>+							_flags),	\</div><div class='add'>+		}							\</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #define SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\</div><div class='ctx'> 				   _mshift, _mwidth,			\</div><div class='ctx'> 				   _pshift, _pwidth,			\</div><div class='hunk'>@@ -109,8 +131,7 @@ struct ccu_mp {</div><div class='ctx'> 					     _mshift, _mwidth,		\</div><div class='ctx'> 					     _pshift, _pwidth,		\</div><div class='ctx'> 					     _muxshift, _muxwidth,	\</div><div class='del'>-					     _gate, _features,		\</div><div class='del'>-					     _flags)			\</div><div class='add'>+					     _gate, _flags, _features)	\</div><div class='ctx'> 	struct ccu_mp _struct = {					\</div><div class='ctx'> 		.enable	= _gate,					\</div><div class='ctx'> 		.m	= _SUNXI_CCU_DIV(_mshift, _mwidth),		\</div><div class='head'>diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig<br/>index 487c85259967..645f517a1ac2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clocksource/Kconfig</a></div><div class='hunk'>@@ -73,6 +73,14 @@ config DW_APB_TIMER_OF</div><div class='ctx'> 	select DW_APB_TIMER</div><div class='ctx'> 	select TIMER_OF</div><div class='ctx'> </div><div class='add'>+config ECONET_EN751221_TIMER</div><div class='add'>+	bool "EcoNet EN751221 High Precision Timer" if COMPILE_TEST</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	select CLKSRC_MMIO</div><div class='add'>+	select TIMER_OF</div><div class='add'>+	help</div><div class='add'>+	  Support for CPU timer found on EcoNet MIPS based SoCs.</div><div class='add'>+</div><div class='ctx'> config FTTMR010_TIMER</div><div class='ctx'> 	bool "Faraday Technology timer driver" if COMPILE_TEST</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='hunk'>@@ -437,8 +445,8 @@ config ATMEL_ST</div><div class='ctx'> </div><div class='ctx'> config ATMEL_TCB_CLKSRC</div><div class='ctx'> 	bool "Atmel TC Block timer driver" if COMPILE_TEST</div><div class='del'>-	depends on ARM &amp;&amp; HAS_IOMEM</div><div class='del'>-	select TIMER_OF if OF</div><div class='add'>+	depends on ARM &amp;&amp; OF &amp;&amp; HAS_IOMEM</div><div class='add'>+	select TIMER_OF</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for Timer Counter Blocks on Atmel SoCs.</div><div class='ctx'> </div><div class='hunk'>@@ -763,4 +771,12 @@ config RALINK_TIMER</div><div class='ctx'> 	  Enables support for system tick counter present on</div><div class='ctx'> 	  Ralink SoCs RT3352 and MT7620.</div><div class='ctx'> </div><div class='add'>+config NXP_STM_TIMER</div><div class='add'>+	bool "NXP System Timer Module driver"</div><div class='add'>+	depends on ARCH_S32 || COMPILE_TEST</div><div class='add'>+	select CLKSRC_MMIO</div><div class='add'>+	help</div><div class='add'>+          Enables the support for NXP System Timer Module found in the</div><div class='add'>+          s32g NXP platform series.</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile<br/>index 43ef16a4efa6..205bf3b0a8f3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clocksource/Makefile</a></div><div class='hunk'>@@ -17,6 +17,7 @@ obj-$(CONFIG_CLKBLD_I8253)	+= i8253.o</div><div class='ctx'> obj-$(CONFIG_CLKSRC_MMIO)	+= mmio.o</div><div class='ctx'> obj-$(CONFIG_DAVINCI_TIMER)	+= timer-davinci.o</div><div class='ctx'> obj-$(CONFIG_DIGICOLOR_TIMER)	+= timer-digicolor.o</div><div class='add'>+obj-$(CONFIG_ECONET_EN751221_TIMER)	+= timer-econet-en751221.o</div><div class='ctx'> obj-$(CONFIG_OMAP_DM_TIMER)	+= timer-ti-dm.o</div><div class='ctx'> obj-$(CONFIG_OMAP_DM_SYSTIMER)	+= timer-ti-dm-systimer.o</div><div class='ctx'> obj-$(CONFIG_DW_APB_TIMER)	+= dw_apb_timer.o</div><div class='hunk'>@@ -92,3 +93,4 @@ obj-$(CONFIG_GXP_TIMER)			+= timer-gxp.o</div><div class='ctx'> obj-$(CONFIG_CLKSRC_LOONGSON1_PWM)	+= timer-loongson1-pwm.o</div><div class='ctx'> obj-$(CONFIG_EP93XX_TIMER)		+= timer-ep93xx.o</div><div class='ctx'> obj-$(CONFIG_RALINK_TIMER)		+= timer-ralink.o</div><div class='add'>+obj-$(CONFIG_NXP_STM_TIMER)		+= timer-nxp-stm.o</div><div class='head'>diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c<br/>index 39f7c2d736d1..b603c25f3dfa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/i8253.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/i8253.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/i8253.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clocksource/i8253.c</a></div><div class='hunk'>@@ -103,7 +103,7 @@ int __init clocksource_i8253_init(void)</div><div class='ctx'> #ifdef CONFIG_CLKEVT_I8253</div><div class='ctx'> void clockevent_i8253_disable(void)</div><div class='ctx'> {</div><div class='del'>-	raw_spin_lock(&amp;i8253_lock);</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;i8253_lock);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Writing the MODE register should stop the counter, according to</div><div class='hunk'>@@ -132,8 +132,6 @@ void clockevent_i8253_disable(void)</div><div class='ctx'> 	outb_p(0, PIT_CH0);</div><div class='ctx'> </div><div class='ctx'> 	outb_p(0x30, PIT_MODE);</div><div class='del'>-</div><div class='del'>-	raw_spin_unlock(&amp;i8253_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pit_shutdown(struct clock_event_device *evt)</div><div class='head'>diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c<br/>index 3fcbd02b2483..2089aeaae225 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/renesas-ostm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/renesas-ostm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/renesas-ostm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clocksource/renesas-ostm.c</a></div><div class='hunk'>@@ -225,7 +225,6 @@ err_free:</div><div class='ctx'> </div><div class='ctx'> TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ARCH_RZG2L) || defined(CONFIG_ARCH_R9A09G057)</div><div class='ctx'> static int __init ostm_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -233,7 +232,7 @@ static int __init ostm_probe(struct platform_device *pdev)</div><div class='ctx'> 	return ostm_init(dev-&gt;of_node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id ostm_of_table[] = {</div><div class='add'>+static const struct of_device_id __maybe_unused ostm_of_table[] = {</div><div class='ctx'> 	{ .compatible = "renesas,ostm", },</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='hunk'>@@ -246,4 +245,3 @@ static struct platform_driver ostm_device_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> builtin_platform_driver_probe(ostm_device_driver, ostm_probe);</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/clocksource/timer-econet-en751221.c b/drivers/clocksource/timer-econet-en751221.c<br/>new file mode 100644<br/>index 000000000000..3b449fdaafee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/timer-econet-en751221.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clocksource/timer-econet-en751221.c</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Timer present on EcoNet EN75xx MIPS based SoCs.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 by Caleb James DeLisle &lt;cjd@cjdns.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/cpumask.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='add'>+#include &lt;linux/sched_clock.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/cpuhotplug.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+</div><div class='add'>+#define ECONET_BITS			32</div><div class='add'>+#define ECONET_MIN_DELTA		0x00001000</div><div class='add'>+#define ECONET_MAX_DELTA		GENMASK(ECONET_BITS - 2, 0)</div><div class='add'>+/* 34Kc hardware has 1 block and 1004Kc has 2. */</div><div class='add'>+#define ECONET_NUM_BLOCKS		DIV_ROUND_UP(NR_CPUS, 2)</div><div class='add'>+</div><div class='add'>+static struct {</div><div class='add'>+	void __iomem	*membase[ECONET_NUM_BLOCKS];</div><div class='add'>+	u32		freq_hz;</div><div class='add'>+} econet_timer __ro_after_init;</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU(struct clock_event_device, econet_timer_pcpu);</div><div class='add'>+</div><div class='add'>+/* Each memory block has 2 timers, the order of registers is:</div><div class='add'>+ * CTL, CMR0, CNT0, CMR1, CNT1</div><div class='add'>+ */</div><div class='add'>+static inline void __iomem *reg_ctl(u32 timer_n)</div><div class='add'>+{</div><div class='add'>+	return econet_timer.membase[timer_n &gt;&gt; 1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __iomem *reg_compare(u32 timer_n)</div><div class='add'>+{</div><div class='add'>+	return econet_timer.membase[timer_n &gt;&gt; 1] + (timer_n &amp; 1) * 0x08 + 0x04;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void __iomem *reg_count(u32 timer_n)</div><div class='add'>+{</div><div class='add'>+	return econet_timer.membase[timer_n &gt;&gt; 1] + (timer_n &amp; 1) * 0x08 + 0x08;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 ctl_bit_enabled(u32 timer_n)</div><div class='add'>+{</div><div class='add'>+	return 1U &lt;&lt; (timer_n &amp; 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 ctl_bit_pending(u32 timer_n)</div><div class='add'>+{</div><div class='add'>+	return 1U &lt;&lt; ((timer_n &amp; 1) + 16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool cevt_is_pending(int cpu_id)</div><div class='add'>+{</div><div class='add'>+	return ioread32(reg_ctl(cpu_id)) &amp; ctl_bit_pending(cpu_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t cevt_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct clock_event_device *dev = this_cpu_ptr(&amp;econet_timer_pcpu);</div><div class='add'>+	int cpu = cpumask_first(dev-&gt;cpumask);</div><div class='add'>+</div><div class='add'>+	/* Each VPE has its own events,</div><div class='add'>+	 * so this will only happen on spurious interrupt.</div><div class='add'>+	 */</div><div class='add'>+	if (!cevt_is_pending(cpu))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	iowrite32(ioread32(reg_count(cpu)), reg_compare(cpu));</div><div class='add'>+	dev-&gt;event_handler(dev);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cevt_set_next_event(ulong delta, struct clock_event_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 next;</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	cpu = cpumask_first(dev-&gt;cpumask);</div><div class='add'>+	next = ioread32(reg_count(cpu)) + delta;</div><div class='add'>+	iowrite32(next, reg_compare(cpu));</div><div class='add'>+</div><div class='add'>+	if ((s32)(next - ioread32(reg_count(cpu))) &lt; ECONET_MIN_DELTA / 2)</div><div class='add'>+		return -ETIME;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cevt_init_cpu(uint cpu)</div><div class='add'>+{</div><div class='add'>+	struct clock_event_device *cd = &amp;per_cpu(econet_timer_pcpu, cpu);</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: Setting up clockevent for CPU %d\n", cd-&gt;name, cpu);</div><div class='add'>+</div><div class='add'>+	reg = ioread32(reg_ctl(cpu)) | ctl_bit_enabled(cpu);</div><div class='add'>+	iowrite32(reg, reg_ctl(cpu));</div><div class='add'>+</div><div class='add'>+	enable_percpu_irq(cd-&gt;irq, IRQ_TYPE_NONE);</div><div class='add'>+</div><div class='add'>+	/* Do this last because it synchronously configures the timer */</div><div class='add'>+	clockevents_config_and_register(cd, econet_timer.freq_hz,</div><div class='add'>+					ECONET_MIN_DELTA, ECONET_MAX_DELTA);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 notrace sched_clock_read(void)</div><div class='add'>+{</div><div class='add'>+	/* Always read from clock zero no matter the CPU */</div><div class='add'>+	return (u64)ioread32(reg_count(0));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Init */</div><div class='add'>+</div><div class='add'>+static void __init cevt_dev_init(uint cpu)</div><div class='add'>+{</div><div class='add'>+	iowrite32(0, reg_count(cpu));</div><div class='add'>+	iowrite32(U32_MAX, reg_compare(cpu));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init cevt_init(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int i, irq, ret;</div><div class='add'>+</div><div class='add'>+	irq = irq_of_parse_and_map(np, 0);</div><div class='add'>+	if (irq &lt;= 0) {</div><div class='add'>+		pr_err("%pOFn: irq_of_parse_and_map failed", np);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_percpu_irq(irq, cevt_interrupt, np-&gt;name, &amp;econet_timer_pcpu);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("%pOFn: IRQ %d setup failed (%d)\n", np, irq, ret);</div><div class='add'>+		goto err_unmap_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(i) {</div><div class='add'>+		struct clock_event_device *cd = &amp;per_cpu(econet_timer_pcpu, i);</div><div class='add'>+</div><div class='add'>+		cd-&gt;rating		= 310,</div><div class='add'>+		cd-&gt;features		= CLOCK_EVT_FEAT_ONESHOT |</div><div class='add'>+					  CLOCK_EVT_FEAT_C3STOP |</div><div class='add'>+					  CLOCK_EVT_FEAT_PERCPU;</div><div class='add'>+		cd-&gt;set_next_event	= cevt_set_next_event;</div><div class='add'>+		cd-&gt;irq			= irq;</div><div class='add'>+		cd-&gt;cpumask		= cpumask_of(i);</div><div class='add'>+		cd-&gt;name		= np-&gt;name;</div><div class='add'>+</div><div class='add'>+		cevt_dev_init(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,</div><div class='add'>+			  "clockevents/econet/timer:starting",</div><div class='add'>+			  cevt_init_cpu, NULL);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unmap_irq:</div><div class='add'>+	irq_dispose_mapping(irq);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init timer_init(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int num_blocks = DIV_ROUND_UP(num_possible_cpus(), 2);</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	clk = of_clk_get(np, 0);</div><div class='add'>+	if (IS_ERR(clk)) {</div><div class='add'>+		pr_err("%pOFn: Failed to get CPU clock from DT %ld\n", np, PTR_ERR(clk));</div><div class='add'>+		return PTR_ERR(clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	econet_timer.freq_hz = clk_get_rate(clk);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; num_blocks; i++) {</div><div class='add'>+		econet_timer.membase[i] = of_iomap(np, i);</div><div class='add'>+		if (!econet_timer.membase[i]) {</div><div class='add'>+			pr_err("%pOFn: failed to map register [%d]\n", np, i);</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For clocksource purposes always read clock zero, whatever the CPU */</div><div class='add'>+	ret = clocksource_mmio_init(reg_count(0), np-&gt;name,</div><div class='add'>+				    econet_timer.freq_hz, 301, ECONET_BITS,</div><div class='add'>+				    clocksource_mmio_readl_up);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("%pOFn: clocksource_mmio_init failed: %d", np, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = cevt_init(np);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	sched_clock_register(sched_clock_read, ECONET_BITS,</div><div class='add'>+			     econet_timer.freq_hz);</div><div class='add'>+</div><div class='add'>+	pr_info("%pOFn: using %u.%03u MHz high precision timer\n", np,</div><div class='add'>+		econet_timer.freq_hz / 1000000,</div><div class='add'>+		(econet_timer.freq_hz / 1000) % 1000);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+TIMER_OF_DECLARE(econet_timer_hpt, "econet,en751221-timer", timer_init);</div><div class='head'>diff --git a/drivers/clocksource/timer-nxp-stm.c b/drivers/clocksource/timer-nxp-stm.c<br/>new file mode 100644<br/>index 000000000000..d7ccf9001729<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/timer-nxp-stm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clocksource/timer-nxp-stm.c</a></div><div class='hunk'>@@ -0,0 +1,495 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2016 Freescale Semiconductor, Inc.</div><div class='add'>+ * Copyright 2018,2021-2025 NXP</div><div class='add'>+ *</div><div class='add'>+ * NXP System Timer Module:</div><div class='add'>+ *</div><div class='add'>+ *  STM supports commonly required system and application software</div><div class='add'>+ *  timing functions. STM includes a 32-bit count-up timer and four</div><div class='add'>+ *  32-bit compare channels with a separate interrupt source for each</div><div class='add'>+ *  channel. The timer is driven by the STM module clock divided by an</div><div class='add'>+ *  8-bit prescale value (1 to 256). It has ability to stop the timer</div><div class='add'>+ *  in Debug mode</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clockchips.h&gt;</div><div class='add'>+#include &lt;linux/cpuhotplug.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/sched_clock.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='add'>+#define STM_CR(__base)		(__base)</div><div class='add'>+</div><div class='add'>+#define STM_CR_TEN		BIT(0)</div><div class='add'>+#define STM_CR_FRZ		BIT(1)</div><div class='add'>+#define STM_CR_CPS_OFFSET	8u</div><div class='add'>+#define STM_CR_CPS_MASK		GENMASK(15, STM_CR_CPS_OFFSET)</div><div class='add'>+</div><div class='add'>+#define STM_CNT(__base)		((__base) + 0x04)</div><div class='add'>+</div><div class='add'>+#define STM_CCR0(__base)	((__base) + 0x10)</div><div class='add'>+#define STM_CCR1(__base)	((__base) + 0x20)</div><div class='add'>+#define STM_CCR2(__base)	((__base) + 0x30)</div><div class='add'>+#define STM_CCR3(__base)	((__base) + 0x40)</div><div class='add'>+</div><div class='add'>+#define STM_CCR_CEN		BIT(0)</div><div class='add'>+</div><div class='add'>+#define STM_CIR0(__base)	((__base) + 0x14)</div><div class='add'>+#define STM_CIR1(__base)	((__base) + 0x24)</div><div class='add'>+#define STM_CIR2(__base)	((__base) + 0x34)</div><div class='add'>+#define STM_CIR3(__base)	((__base) + 0x44)</div><div class='add'>+</div><div class='add'>+#define STM_CIR_CIF		BIT(0)</div><div class='add'>+</div><div class='add'>+#define STM_CMP0(__base)	((__base) + 0x18)</div><div class='add'>+#define STM_CMP1(__base)	((__base) + 0x28)</div><div class='add'>+#define STM_CMP2(__base)	((__base) + 0x38)</div><div class='add'>+#define STM_CMP3(__base)	((__base) + 0x48)</div><div class='add'>+</div><div class='add'>+#define STM_ENABLE_MASK	(STM_CR_FRZ | STM_CR_TEN)</div><div class='add'>+</div><div class='add'>+struct stm_timer {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	unsigned long rate;</div><div class='add'>+	unsigned long delta;</div><div class='add'>+	unsigned long counter;</div><div class='add'>+	struct clock_event_device ced;</div><div class='add'>+	struct clocksource cs;</div><div class='add'>+	atomic_t refcnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_PER_CPU(struct stm_timer *, stm_timers);</div><div class='add'>+</div><div class='add'>+static struct stm_timer *stm_sched_clock;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Global structure for multiple STMs initialization</div><div class='add'>+ */</div><div class='add'>+static int stm_instances;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This global lock is used to prevent race conditions with the</div><div class='add'>+ * stm_instances in case the driver is using the ASYNC option</div><div class='add'>+ */</div><div class='add'>+static DEFINE_MUTEX(stm_instances_lock);</div><div class='add'>+</div><div class='add'>+DEFINE_GUARD(stm_instances, struct mutex *, mutex_lock(_T), mutex_unlock(_T))</div><div class='add'>+</div><div class='add'>+static struct stm_timer *cs_to_stm(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	return container_of(cs, struct stm_timer, cs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct stm_timer *ced_to_stm(struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	return container_of(ced, struct stm_timer, ced);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 notrace nxp_stm_read_sched_clock(void)</div><div class='add'>+{</div><div class='add'>+	return readl(STM_CNT(stm_sched_clock-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 nxp_stm_clocksource_getcnt(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	return readl(STM_CNT(stm_timer-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clocksource_setcnt(struct stm_timer *stm_timer, u32 cnt)</div><div class='add'>+{</div><div class='add'>+	writel(cnt, STM_CNT(stm_timer-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 nxp_stm_clocksource_read(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = cs_to_stm(cs);</div><div class='add'>+</div><div class='add'>+	return (u64)nxp_stm_clocksource_getcnt(stm_timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_module_enable(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = readl(STM_CR(stm_timer-&gt;base));</div><div class='add'>+</div><div class='add'>+	reg |= STM_ENABLE_MASK;</div><div class='add'>+</div><div class='add'>+	writel(reg, STM_CR(stm_timer-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_module_disable(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = readl(STM_CR(stm_timer-&gt;base));</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~STM_ENABLE_MASK;</div><div class='add'>+</div><div class='add'>+	writel(reg, STM_CR(stm_timer-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_module_put(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	if (atomic_dec_and_test(&amp;stm_timer-&gt;refcnt))</div><div class='add'>+		nxp_stm_module_disable(stm_timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_module_get(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	if (atomic_inc_return(&amp;stm_timer-&gt;refcnt) == 1)</div><div class='add'>+		nxp_stm_module_enable(stm_timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nxp_stm_clocksource_enable(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = cs_to_stm(cs);</div><div class='add'>+</div><div class='add'>+	nxp_stm_module_get(stm_timer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clocksource_disable(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = cs_to_stm(cs);</div><div class='add'>+</div><div class='add'>+	nxp_stm_module_put(stm_timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clocksource_suspend(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = cs_to_stm(cs);</div><div class='add'>+</div><div class='add'>+	nxp_stm_clocksource_disable(cs);</div><div class='add'>+	stm_timer-&gt;counter = nxp_stm_clocksource_getcnt(stm_timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clocksource_resume(struct clocksource *cs)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = cs_to_stm(cs);</div><div class='add'>+</div><div class='add'>+	nxp_stm_clocksource_setcnt(stm_timer, stm_timer-&gt;counter);</div><div class='add'>+	nxp_stm_clocksource_enable(cs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __init devm_clocksource_unregister(void *data)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = data;</div><div class='add'>+</div><div class='add'>+	clocksource_unregister(&amp;stm_timer-&gt;cs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init nxp_stm_clocksource_init(struct device *dev, struct stm_timer *stm_timer,</div><div class='add'>+					   const char *name, void __iomem *base, struct clk *clk)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	stm_timer-&gt;base = base;</div><div class='add'>+	stm_timer-&gt;rate = clk_get_rate(clk);</div><div class='add'>+</div><div class='add'>+	stm_timer-&gt;cs.name = name;</div><div class='add'>+	stm_timer-&gt;cs.rating = 460;</div><div class='add'>+	stm_timer-&gt;cs.read = nxp_stm_clocksource_read;</div><div class='add'>+	stm_timer-&gt;cs.enable = nxp_stm_clocksource_enable;</div><div class='add'>+	stm_timer-&gt;cs.disable = nxp_stm_clocksource_disable;</div><div class='add'>+	stm_timer-&gt;cs.suspend = nxp_stm_clocksource_suspend;</div><div class='add'>+	stm_timer-&gt;cs.resume = nxp_stm_clocksource_resume;</div><div class='add'>+	stm_timer-&gt;cs.mask = CLOCKSOURCE_MASK(32);</div><div class='add'>+	stm_timer-&gt;cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;</div><div class='add'>+</div><div class='add'>+	ret = clocksource_register_hz(&amp;stm_timer-&gt;cs, stm_timer-&gt;rate);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, devm_clocksource_unregister, stm_timer);</div><div class='add'>+	if (ret) {</div><div class='add'>+		clocksource_unregister(&amp;stm_timer-&gt;cs);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stm_sched_clock = stm_timer;</div><div class='add'>+</div><div class='add'>+	sched_clock_register(nxp_stm_read_sched_clock, 32, stm_timer-&gt;rate);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "Registered clocksource %s\n", name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nxp_stm_clockevent_read_counter(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	return readl(STM_CNT(stm_timer-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clockevent_disable(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	writel(0, STM_CCR0(stm_timer-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clockevent_enable(struct stm_timer *stm_timer)</div><div class='add'>+{</div><div class='add'>+	writel(STM_CCR_CEN, STM_CCR0(stm_timer-&gt;base));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nxp_stm_clockevent_shutdown(struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = ced_to_stm(ced);</div><div class='add'>+</div><div class='add'>+	nxp_stm_clockevent_disable(stm_timer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nxp_stm_clockevent_set_next_event(unsigned long delta, struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = ced_to_stm(ced);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	nxp_stm_clockevent_disable(stm_timer);</div><div class='add'>+</div><div class='add'>+	stm_timer-&gt;delta = delta;</div><div class='add'>+</div><div class='add'>+	val = nxp_stm_clockevent_read_counter(stm_timer) + delta;</div><div class='add'>+</div><div class='add'>+	writel(val, STM_CMP0(stm_timer-&gt;base));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The counter is shared across the channels and can not be</div><div class='add'>+	 * stopped while we are setting the next event. If the delta</div><div class='add'>+	 * is very small it is possible the counter increases above</div><div class='add'>+	 * the computed 'val'. The min_delta value specified when</div><div class='add'>+	 * registering the clockevent will prevent that. The second</div><div class='add'>+	 * case is if the counter wraps while we compute the 'val' and</div><div class='add'>+	 * before writing the comparator register. We read the counter,</div><div class='add'>+	 * check if we are back in time and abort the timer with -ETIME.</div><div class='add'>+	 */</div><div class='add'>+	if (val &gt; nxp_stm_clockevent_read_counter(stm_timer) + delta)</div><div class='add'>+		return -ETIME;</div><div class='add'>+</div><div class='add'>+	nxp_stm_clockevent_enable(stm_timer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nxp_stm_clockevent_set_periodic(struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = ced_to_stm(ced);</div><div class='add'>+</div><div class='add'>+	return nxp_stm_clockevent_set_next_event(stm_timer-&gt;rate, ced);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clockevent_suspend(struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = ced_to_stm(ced);</div><div class='add'>+</div><div class='add'>+	nxp_stm_module_put(stm_timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nxp_stm_clockevent_resume(struct clock_event_device *ced)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = ced_to_stm(ced);</div><div class='add'>+</div><div class='add'>+	nxp_stm_module_get(stm_timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init nxp_stm_clockevent_per_cpu_init(struct device *dev, struct stm_timer *stm_timer,</div><div class='add'>+						  const char *name, void __iomem *base, int irq,</div><div class='add'>+						  struct clk *clk, int cpu)</div><div class='add'>+{</div><div class='add'>+	stm_timer-&gt;base = base;</div><div class='add'>+	stm_timer-&gt;rate = clk_get_rate(clk);</div><div class='add'>+</div><div class='add'>+	stm_timer-&gt;ced.name = name;</div><div class='add'>+	stm_timer-&gt;ced.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;</div><div class='add'>+	stm_timer-&gt;ced.set_state_shutdown = nxp_stm_clockevent_shutdown;</div><div class='add'>+	stm_timer-&gt;ced.set_state_periodic = nxp_stm_clockevent_set_periodic;</div><div class='add'>+	stm_timer-&gt;ced.set_next_event = nxp_stm_clockevent_set_next_event;</div><div class='add'>+	stm_timer-&gt;ced.suspend = nxp_stm_clockevent_suspend;</div><div class='add'>+	stm_timer-&gt;ced.resume = nxp_stm_clockevent_resume;</div><div class='add'>+	stm_timer-&gt;ced.cpumask = cpumask_of(cpu);</div><div class='add'>+	stm_timer-&gt;ced.rating = 460;</div><div class='add'>+	stm_timer-&gt;ced.irq = irq;</div><div class='add'>+</div><div class='add'>+	per_cpu(stm_timers, cpu) = stm_timer;</div><div class='add'>+</div><div class='add'>+	nxp_stm_module_get(stm_timer);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "Initialized per cpu clockevent name=%s, irq=%d, cpu=%d\n", name, irq, cpu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nxp_stm_clockevent_starting_cpu(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = per_cpu(stm_timers, cpu);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!stm_timer))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	ret = irq_force_affinity(stm_timer-&gt;ced.irq, cpumask_of(cpu));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The timings measurement show reading the counter register</div><div class='add'>+	 * and writing to the comparator register takes as a maximum</div><div class='add'>+	 * value 1100 ns at 133MHz rate frequency. The timer must be</div><div class='add'>+	 * set above this value and to be secure we set the minimum</div><div class='add'>+	 * value equal to 2000ns, so 2us.</div><div class='add'>+	 *</div><div class='add'>+	 * minimum ticks = (rate / MICRO) * 2</div><div class='add'>+	 */</div><div class='add'>+	clockevents_config_and_register(&amp;stm_timer-&gt;ced, stm_timer-&gt;rate,</div><div class='add'>+					(stm_timer-&gt;rate / MICRO) * 2, ULONG_MAX);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t nxp_stm_module_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer = dev_id;</div><div class='add'>+	struct clock_event_device *ced = &amp;stm_timer-&gt;ced;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The interrupt is shared across the channels in the</div><div class='add'>+	 * module. But this one is configured to run only one channel,</div><div class='add'>+	 * consequently it is pointless to test the interrupt flags</div><div class='add'>+	 * before and we can directly reset the channel 0 irq flag</div><div class='add'>+	 * register.</div><div class='add'>+	 */</div><div class='add'>+	writel(STM_CIR_CIF, STM_CIR0(stm_timer-&gt;base));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Update STM_CMP value using the counter value</div><div class='add'>+	 */</div><div class='add'>+	val = nxp_stm_clockevent_read_counter(stm_timer) + stm_timer-&gt;delta;</div><div class='add'>+</div><div class='add'>+	writel(val, STM_CMP0(stm_timer-&gt;base));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * stm hardware doesn't support oneshot, it will generate an</div><div class='add'>+	 * interrupt and start the counter again so software needs to</div><div class='add'>+	 * disable the timer to stop the counter loop in ONESHOT mode.</div><div class='add'>+	 */</div><div class='add'>+	if (likely(clockevent_state_oneshot(ced)))</div><div class='add'>+		nxp_stm_clockevent_disable(stm_timer);</div><div class='add'>+</div><div class='add'>+	ced-&gt;event_handler(ced);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init nxp_stm_timer_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct stm_timer *stm_timer;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	const char *name = of_node_full_name(np);</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	int irq, ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The device tree can have multiple STM nodes described, so</div><div class='add'>+	 * it makes this driver a good candidate for the async probe.</div><div class='add'>+	 * It is still unclear if the time framework correctly handles</div><div class='add'>+	 * parallel loading of the timers but at least this driver is</div><div class='add'>+	 * ready to support the option.</div><div class='add'>+	 */</div><div class='add'>+	guard(stm_instances)(&amp;stm_instances_lock);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The S32Gx are SoCs featuring a diverse set of cores. Linux</div><div class='add'>+	 * is expected to run on Cortex-A53 cores, while other</div><div class='add'>+	 * software stacks will operate on Cortex-M cores. The number</div><div class='add'>+	 * of STM instances has been sized to include at most one</div><div class='add'>+	 * instance per core.</div><div class='add'>+	 *</div><div class='add'>+	 * As we need a clocksource and a clockevent per cpu, we</div><div class='add'>+	 * simply initialize a clocksource per cpu along with the</div><div class='add'>+	 * clockevent which makes the resulting code simpler.</div><div class='add'>+	 *</div><div class='add'>+	 * However if the device tree is describing more STM instances</div><div class='add'>+	 * than the number of cores, then we ignore them.</div><div class='add'>+	 */</div><div class='add'>+	if (stm_instances &gt;= num_possible_cpus())</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	base = devm_of_iomap(dev, np, 0, NULL);</div><div class='add'>+	if (IS_ERR(base))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(base), "Failed to iomap %pOFn\n", np);</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return dev_err_probe(dev, irq, "Failed to get IRQ\n");</div><div class='add'>+</div><div class='add'>+	clk = devm_clk_get_enabled(dev, NULL);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(clk), "Clock not found\n");</div><div class='add'>+</div><div class='add'>+	stm_timer = devm_kzalloc(dev, sizeof(*stm_timer), GFP_KERNEL);</div><div class='add'>+	if (!stm_timer)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = devm_request_irq(dev, irq, nxp_stm_module_interrupt,</div><div class='add'>+			       IRQF_TIMER | IRQF_NOBALANCING, name, stm_timer);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "Unable to allocate interrupt line\n");</div><div class='add'>+</div><div class='add'>+	ret = nxp_stm_clocksource_init(dev, stm_timer, name, base, clk);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Next probed STM will be a per CPU clockevent, until we</div><div class='add'>+	 * probe as many as we have CPUs available on the system, we</div><div class='add'>+	 * do a partial initialization</div><div class='add'>+	 */</div><div class='add'>+	ret = nxp_stm_clockevent_per_cpu_init(dev, stm_timer, name,</div><div class='add'>+					      base, irq, clk,</div><div class='add'>+					      stm_instances);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	stm_instances++;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The number of probed STMs for per CPU clockevent is</div><div class='add'>+	 * equal to the number of available CPUs on the</div><div class='add'>+	 * system. We install the cpu hotplug to finish the</div><div class='add'>+	 * initialization by registering the clockevents</div><div class='add'>+	 */</div><div class='add'>+	if (stm_instances == num_possible_cpus()) {</div><div class='add'>+		ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "STM timer:starting",</div><div class='add'>+					nxp_stm_clockevent_starting_cpu, NULL);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id nxp_stm_of_match[] = {</div><div class='add'>+	{ .compatible = "nxp,s32g2-stm" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, nxp_stm_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver nxp_stm_probe = {</div><div class='add'>+	.probe	= nxp_stm_timer_probe,</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name		= "nxp-stm",</div><div class='add'>+		.of_match_table	= nxp_stm_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(nxp_stm_probe);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("NXP System Timer Module driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/clocksource/timer-tegra186.c b/drivers/clocksource/timer-tegra186.c<br/>index 5d4cf5237a11..e5394f98a02e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/clocksource/timer-tegra186.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/clocksource/timer-tegra186.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/clocksource/timer-tegra186.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/clocksource/timer-tegra186.c</a></div><div class='hunk'>@@ -1,8 +1,9 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2019-2020 NVIDIA Corporation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2019-2025 NVIDIA Corporation. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='hunk'>@@ -29,6 +30,7 @@</div><div class='ctx'> </div><div class='ctx'> #define TMRSR 0x004</div><div class='ctx'> #define  TMRSR_INTR_CLR BIT(30)</div><div class='add'>+#define  TMRSR_PCV GENMASK(28, 0)</div><div class='ctx'> </div><div class='ctx'> #define TMRCSSR 0x008</div><div class='ctx'> #define  TMRCSSR_SRC_USEC (0 &lt;&lt; 0)</div><div class='hunk'>@@ -45,6 +47,9 @@</div><div class='ctx'> #define  WDTCR_TIMER_SOURCE_MASK 0xf</div><div class='ctx'> #define  WDTCR_TIMER_SOURCE(x) ((x) &amp; 0xf)</div><div class='ctx'> </div><div class='add'>+#define WDTSR 0x004</div><div class='add'>+#define  WDTSR_CURRENT_EXPIRATION_COUNT GENMASK(14, 12)</div><div class='add'>+</div><div class='ctx'> #define WDTCMDR 0x008</div><div class='ctx'> #define  WDTCMDR_DISABLE_COUNTER BIT(1)</div><div class='ctx'> #define  WDTCMDR_START_COUNTER BIT(0)</div><div class='hunk'>@@ -169,18 +174,6 @@ static void tegra186_wdt_enable(struct tegra186_wdt *wdt)</div><div class='ctx'> 		value &amp;= ~WDTCR_PERIOD_MASK;</div><div class='ctx'> 		value |= WDTCR_PERIOD(1);</div><div class='ctx'> </div><div class='del'>-		/* enable local interrupt for WDT petting */</div><div class='del'>-		value |= WDTCR_LOCAL_INT_ENABLE;</div><div class='del'>-</div><div class='del'>-		/* enable local FIQ and remote interrupt for debug dump */</div><div class='del'>-		if (0)</div><div class='del'>-			value |= WDTCR_REMOTE_INT_ENABLE |</div><div class='del'>-				 WDTCR_LOCAL_FIQ_ENABLE;</div><div class='del'>-</div><div class='del'>-		/* enable system debug reset (doesn't properly reboot) */</div><div class='del'>-		if (0)</div><div class='del'>-			value |= WDTCR_SYSTEM_DEBUG_RESET_ENABLE;</div><div class='del'>-</div><div class='ctx'> 		/* enable system POR reset */</div><div class='ctx'> 		value |= WDTCR_SYSTEM_POR_RESET_ENABLE;</div><div class='ctx'> </div><div class='hunk'>@@ -234,12 +227,69 @@ static int tegra186_wdt_set_timeout(struct watchdog_device *wdd,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int tegra186_wdt_get_timeleft(struct watchdog_device *wdd)</div><div class='add'>+{</div><div class='add'>+	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);</div><div class='add'>+	u32 expiration, val;</div><div class='add'>+	u64 timeleft;</div><div class='add'>+</div><div class='add'>+	if (!watchdog_active(&amp;wdt-&gt;base)) {</div><div class='add'>+		/* return zero if the watchdog timer is not activated. */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reset occurs on the fifth expiration of the</div><div class='add'>+	 * watchdog timer and so when the watchdog timer is configured,</div><div class='add'>+	 * the actual value programmed into the counter is 1/5 of the</div><div class='add'>+	 * timeout value. Once the counter reaches 0, expiration count</div><div class='add'>+	 * will be increased by 1 and the down counter restarts.</div><div class='add'>+	 * Hence to get the time left before system reset we must</div><div class='add'>+	 * combine 2 parts:</div><div class='add'>+	 * 1. value of the current down counter</div><div class='add'>+	 * 2. (number of counter expirations remaining) * (timeout/5)</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Get the current number of counter expirations. Should be a</div><div class='add'>+	 * value between 0 and 4</div><div class='add'>+	 */</div><div class='add'>+	val = readl_relaxed(wdt-&gt;regs + WDTSR);</div><div class='add'>+	expiration = FIELD_GET(WDTSR_CURRENT_EXPIRATION_COUNT, val);</div><div class='add'>+	if (WARN_ON_ONCE(expiration &gt; 4))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Get the current counter value in microsecond. */</div><div class='add'>+	val = readl_relaxed(wdt-&gt;tmr-&gt;regs + TMRSR);</div><div class='add'>+	timeleft = FIELD_GET(TMRSR_PCV, val);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Calculate the time remaining by adding the time for the</div><div class='add'>+	 * counter value to the time of the counter expirations that</div><div class='add'>+	 * remain.</div><div class='add'>+	 */</div><div class='add'>+	timeleft += (((u64)wdt-&gt;base.timeout * USEC_PER_SEC) / 5) * (4 - expiration);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Convert the current counter value to seconds,</div><div class='add'>+	 * rounding up to the nearest second. Cast u64 to</div><div class='add'>+	 * u32 under the assumption that no overflow happens</div><div class='add'>+	 * when coverting to seconds.</div><div class='add'>+	 */</div><div class='add'>+	timeleft = DIV_ROUND_CLOSEST_ULL(timeleft, USEC_PER_SEC);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(timeleft &gt; U32_MAX))</div><div class='add'>+		return U32_MAX;</div><div class='add'>+</div><div class='add'>+	return lower_32_bits(timeleft);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct watchdog_ops tegra186_wdt_ops = {</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> 	.start = tegra186_wdt_start,</div><div class='ctx'> 	.stop = tegra186_wdt_stop,</div><div class='ctx'> 	.ping = tegra186_wdt_ping,</div><div class='ctx'> 	.set_timeout = tegra186_wdt_set_timeout,</div><div class='add'>+	.get_timeleft = tegra186_wdt_get_timeleft,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct tegra186_wdt *tegra186_wdt_create(struct tegra186_timer *tegra,</div><div class='hunk'>@@ -365,23 +415,10 @@ static int tegra186_timer_usec_init(struct tegra186_timer *tegra)</div><div class='ctx'> 	return clocksource_register_hz(&amp;tegra-&gt;usec, USEC_PER_SEC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t tegra186_timer_irq(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	struct tegra186_timer *tegra = data;</div><div class='del'>-</div><div class='del'>-	if (watchdog_active(&amp;tegra-&gt;wdt-&gt;base)) {</div><div class='del'>-		tegra186_wdt_disable(tegra-&gt;wdt);</div><div class='del'>-		tegra186_wdt_enable(tegra-&gt;wdt);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int tegra186_timer_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct tegra186_timer *tegra;</div><div class='del'>-	unsigned int irq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	tegra = devm_kzalloc(dev, sizeof(*tegra), GFP_KERNEL);</div><div class='hunk'>@@ -400,8 +437,6 @@ static int tegra186_timer_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	irq = err;</div><div class='del'>-</div><div class='ctx'> 	/* create a watchdog using a preconfigured timer */</div><div class='ctx'> 	tegra-&gt;wdt = tegra186_wdt_create(tegra, 0);</div><div class='ctx'> 	if (IS_ERR(tegra-&gt;wdt)) {</div><div class='hunk'>@@ -428,17 +463,8 @@ static int tegra186_timer_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto unregister_osc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = devm_request_irq(dev, irq, tegra186_timer_irq, 0,</div><div class='del'>-			       "tegra186-timer", tegra);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		dev_err(dev, "failed to request IRQ#%u: %d\n", irq, err);</div><div class='del'>-		goto unregister_usec;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-unregister_usec:</div><div class='del'>-	clocksource_unregister(&amp;tegra-&gt;usec);</div><div class='ctx'> unregister_osc:</div><div class='ctx'> 	clocksource_unregister(&amp;tegra-&gt;osc);</div><div class='ctx'> unregister_tsc:</div><div class='head'>diff --git a/drivers/comedi/drivers/jr3_pci.c b/drivers/comedi/drivers/jr3_pci.c<br/>index cdc842b32bab..75dce1ff2419 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/comedi/drivers/jr3_pci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/comedi/drivers/jr3_pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/comedi/drivers/jr3_pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/comedi/drivers/jr3_pci.c</a></div><div class='hunk'>@@ -758,7 +758,7 @@ static void jr3_pci_detach(struct comedi_device *dev)</div><div class='ctx'> 	struct jr3_pci_dev_private *devpriv = dev-&gt;private;</div><div class='ctx'> </div><div class='ctx'> 	if (devpriv)</div><div class='del'>-		timer_delete_sync(&amp;devpriv-&gt;timer);</div><div class='add'>+		timer_shutdown_sync(&amp;devpriv-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	comedi_pci_detach(dev);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm<br/>index 4f9cb943d945..0d46402e3094 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/Kconfig.arm?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/Kconfig.arm</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/Kconfig.arm?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/Kconfig.arm</a></div><div class='hunk'>@@ -76,7 +76,7 @@ config ARM_VEXPRESS_SPC_CPUFREQ</div><div class='ctx'> config ARM_BRCMSTB_AVS_CPUFREQ</div><div class='ctx'> 	tristate "Broadcom STB AVS CPUfreq driver"</div><div class='ctx'> 	depends on (ARCH_BRCMSTB &amp;&amp; !ARM_SCMI_CPUFREQ) || COMPILE_TEST</div><div class='del'>-	default y</div><div class='add'>+	default y if ARCH_BRCMSTB &amp;&amp; !ARM_SCMI_CPUFREQ</div><div class='ctx'> 	help</div><div class='ctx'> 	  Some Broadcom STB SoCs use a co-processor running proprietary firmware</div><div class='ctx'> 	  ("AVS") to handle voltage and frequency scaling. This driver provides</div><div class='hunk'>@@ -88,7 +88,7 @@ config ARM_HIGHBANK_CPUFREQ</div><div class='ctx'> 	tristate "Calxeda Highbank-based"</div><div class='ctx'> 	depends on ARCH_HIGHBANK || COMPILE_TEST</div><div class='ctx'> 	depends on CPUFREQ_DT &amp;&amp; REGULATOR &amp;&amp; PL320_MBOX</div><div class='del'>-	default m</div><div class='add'>+	default m if ARCH_HIGHBANK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds the CPUFreq driver for Calxeda Highbank SoC</div><div class='ctx'> 	  based boards.</div><div class='hunk'>@@ -133,7 +133,7 @@ config ARM_MEDIATEK_CPUFREQ</div><div class='ctx'> config ARM_MEDIATEK_CPUFREQ_HW</div><div class='ctx'> 	tristate "MediaTek CPUFreq HW driver"</div><div class='ctx'> 	depends on ARCH_MEDIATEK || COMPILE_TEST</div><div class='del'>-	default m</div><div class='add'>+	default m if ARCH_MEDIATEK</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the CPUFreq HW driver.</div><div class='ctx'> 	  Some MediaTek chipsets have a HW engine to offload the steps</div><div class='hunk'>@@ -181,7 +181,7 @@ config ARM_RASPBERRYPI_CPUFREQ</div><div class='ctx'> config ARM_S3C64XX_CPUFREQ</div><div class='ctx'> 	bool "Samsung S3C64XX"</div><div class='ctx'> 	depends on CPU_S3C6410 || COMPILE_TEST</div><div class='del'>-	default y</div><div class='add'>+	default CPU_S3C6410</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds the CPUFreq driver for Samsung S3C6410 SoC.</div><div class='ctx'> </div><div class='hunk'>@@ -190,7 +190,7 @@ config ARM_S3C64XX_CPUFREQ</div><div class='ctx'> config ARM_S5PV210_CPUFREQ</div><div class='ctx'> 	bool "Samsung S5PV210 and S5PC110"</div><div class='ctx'> 	depends on CPU_S5PV210 || COMPILE_TEST</div><div class='del'>-	default y</div><div class='add'>+	default CPU_S5PV210</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds the CPUFreq driver for Samsung S5PV210 and</div><div class='ctx'> 	  S5PC110 SoCs.</div><div class='hunk'>@@ -214,7 +214,7 @@ config ARM_SCMI_CPUFREQ</div><div class='ctx'> config ARM_SPEAR_CPUFREQ</div><div class='ctx'> 	bool "SPEAr CPUFreq support"</div><div class='ctx'> 	depends on PLAT_SPEAR || COMPILE_TEST</div><div class='del'>-	default y</div><div class='add'>+	default PLAT_SPEAR</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds the CPUFreq driver support for SPEAr SOCs.</div><div class='ctx'> </div><div class='hunk'>@@ -233,7 +233,7 @@ config ARM_TEGRA20_CPUFREQ</div><div class='ctx'> 	tristate "Tegra20/30 CPUFreq support"</div><div class='ctx'> 	depends on ARCH_TEGRA || COMPILE_TEST</div><div class='ctx'> 	depends on CPUFREQ_DT</div><div class='del'>-	default y</div><div class='add'>+	default ARCH_TEGRA</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds the CPUFreq driver support for Tegra20/30 SOCs.</div><div class='ctx'> </div><div class='hunk'>@@ -241,7 +241,7 @@ config ARM_TEGRA124_CPUFREQ</div><div class='ctx'> 	bool "Tegra124 CPUFreq support"</div><div class='ctx'> 	depends on ARCH_TEGRA || COMPILE_TEST</div><div class='ctx'> 	depends on CPUFREQ_DT</div><div class='del'>-	default y</div><div class='add'>+	default ARCH_TEGRA</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds the CPUFreq driver support for Tegra124 SOCs.</div><div class='ctx'> </div><div class='hunk'>@@ -256,14 +256,14 @@ config ARM_TEGRA194_CPUFREQ</div><div class='ctx'> 	tristate "Tegra194 CPUFreq support"</div><div class='ctx'> 	depends on ARCH_TEGRA_194_SOC || ARCH_TEGRA_234_SOC || (64BIT &amp;&amp; COMPILE_TEST)</div><div class='ctx'> 	depends on TEGRA_BPMP</div><div class='del'>-	default y</div><div class='add'>+	default ARCH_TEGRA_194_SOC || ARCH_TEGRA_234_SOC</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds CPU frequency driver support for Tegra194 SOCs.</div><div class='ctx'> </div><div class='ctx'> config ARM_TI_CPUFREQ</div><div class='ctx'> 	bool "Texas Instruments CPUFreq support"</div><div class='ctx'> 	depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST</div><div class='del'>-	default y</div><div class='add'>+	default ARCH_OMAP2PLUS || ARCH_K3</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver enables valid OPPs on the running platform based on</div><div class='ctx'> 	  values contained within the SoC in use. Enable this in order to</div><div class='head'>diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c<br/>index 924314cdeebc..ea4b8f220a05 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/acpi-cpufreq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/acpi-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/acpi-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/acpi-cpufreq.c</a></div><div class='hunk'>@@ -79,11 +79,11 @@ static bool boost_state(unsigned int cpu)</div><div class='ctx'> 	case X86_VENDOR_INTEL:</div><div class='ctx'> 	case X86_VENDOR_CENTAUR:</div><div class='ctx'> 	case X86_VENDOR_ZHAOXIN:</div><div class='del'>-		rdmsrl_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &amp;msr);</div><div class='add'>+		rdmsrq_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &amp;msr);</div><div class='ctx'> 		return !(msr &amp; MSR_IA32_MISC_ENABLE_TURBO_DISABLE);</div><div class='ctx'> 	case X86_VENDOR_HYGON:</div><div class='ctx'> 	case X86_VENDOR_AMD:</div><div class='del'>-		rdmsrl_on_cpu(cpu, MSR_K7_HWCR, &amp;msr);</div><div class='add'>+		rdmsrq_on_cpu(cpu, MSR_K7_HWCR, &amp;msr);</div><div class='ctx'> 		return !(msr &amp; MSR_K7_HWCR_CPB_DIS);</div><div class='ctx'> 	}</div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -110,14 +110,14 @@ static int boost_set_msr(bool enable)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdmsrl(msr_addr, val);</div><div class='add'>+	rdmsrq(msr_addr, val);</div><div class='ctx'> </div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		val &amp;= ~msr_mask;</div><div class='ctx'> 	else</div><div class='ctx'> 		val |= msr_mask;</div><div class='ctx'> </div><div class='del'>-	wrmsrl(msr_addr, val);</div><div class='add'>+	wrmsrq(msr_addr, val);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -909,8 +909,19 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 	if (perf-&gt;states[0].core_frequency * 1000 != freq_table[0].frequency)</div><div class='ctx'> 		pr_warn(FW_WARN "P-state 0 is not max freq\n");</div><div class='ctx'> </div><div class='del'>-	if (acpi_cpufreq_driver.set_boost)</div><div class='del'>-		policy-&gt;boost_supported = true;</div><div class='add'>+	if (acpi_cpufreq_driver.set_boost) {</div><div class='add'>+		if (policy-&gt;boost_supported) {</div><div class='add'>+			/*</div><div class='add'>+			 * The firmware may have altered boost state while the</div><div class='add'>+			 * CPU was offline (for example during a suspend-resume</div><div class='add'>+			 * cycle).</div><div class='add'>+			 */</div><div class='add'>+			if (policy-&gt;boost_enabled != boost_state(cpu))</div><div class='add'>+				set_boost(policy, policy-&gt;boost_enabled);</div><div class='add'>+		} else {</div><div class='add'>+			policy-&gt;boost_supported = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c<br/>index e671bc7d1550..447b9aa5ce40 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate-ut.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd-pstate-ut.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate-ut.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/amd-pstate-ut.c</a></div><div class='hunk'>@@ -31,6 +31,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;acpi/cppc_acpi.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "amd-pstate.h"</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -90,9 +92,9 @@ static int amd_pstate_ut_check_enabled(u32 index)</div><div class='ctx'> 	if (get_shared_mem())</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = rdmsrl_safe(MSR_AMD_CPPC_ENABLE, &amp;cppc_enable);</div><div class='add'>+	ret = rdmsrq_safe(MSR_AMD_CPPC_ENABLE, &amp;cppc_enable);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("%s rdmsrl_safe MSR_AMD_CPPC_ENABLE ret=%d error!\n", __func__, ret);</div><div class='add'>+		pr_err("%s rdmsrq_safe MSR_AMD_CPPC_ENABLE ret=%d error!\n", __func__, ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -137,7 +139,7 @@ static int amd_pstate_ut_check_perf(u32 index)</div><div class='ctx'> 			lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf;</div><div class='ctx'> 			lowest_perf = cppc_perf.lowest_perf;</div><div class='ctx'> 		} else {</div><div class='del'>-			ret = rdmsrl_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &amp;cap1);</div><div class='add'>+			ret = rdmsrq_safe_on_cpu(cpu, MSR_AMD_CPPC_CAP1, &amp;cap1);</div><div class='ctx'> 			if (ret) {</div><div class='ctx'> 				pr_err("%s read CPPC_CAP1 ret=%d error!\n", __func__, ret);</div><div class='ctx'> 				return ret;</div><div class='hunk'>@@ -242,25 +244,30 @@ static int amd_pstate_set_mode(enum amd_pstate_mode mode)</div><div class='ctx'> static int amd_pstate_ut_check_driver(u32 index)</div><div class='ctx'> {</div><div class='ctx'> 	enum amd_pstate_mode mode1, mode2 = AMD_PSTATE_DISABLE;</div><div class='add'>+	enum amd_pstate_mode orig_mode = amd_pstate_get_status();</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	for (mode1 = AMD_PSTATE_DISABLE; mode1 &lt; AMD_PSTATE_MAX; mode1++) {</div><div class='del'>-		int ret = amd_pstate_set_mode(mode1);</div><div class='add'>+		ret = amd_pstate_set_mode(mode1);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		for (mode2 = AMD_PSTATE_DISABLE; mode2 &lt; AMD_PSTATE_MAX; mode2++) {</div><div class='ctx'> 			if (mode1 == mode2)</div><div class='ctx'> 				continue;</div><div class='ctx'> 			ret = amd_pstate_set_mode(mode2);</div><div class='del'>-			if (ret) {</div><div class='del'>-				pr_err("%s: failed to update status for %s-&gt;%s\n", __func__,</div><div class='del'>-					amd_pstate_get_mode_string(mode1),</div><div class='del'>-					amd_pstate_get_mode_string(mode2));</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='add'>+			if (ret)</div><div class='add'>+				goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+out:</div><div class='add'>+	if (ret)</div><div class='add'>+		pr_warn("%s: failed to update status for %s-&gt;%s: %d\n", __func__,</div><div class='add'>+			amd_pstate_get_mode_string(mode1),</div><div class='add'>+			amd_pstate_get_mode_string(mode2), ret);</div><div class='add'>+</div><div class='add'>+	amd_pstate_set_mode(orig_mode);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __init amd_pstate_ut_init(void)</div><div class='head'>diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c<br/>index 6789eed1bb5b..f3477ab37742 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd-pstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/amd-pstate.c</a></div><div class='hunk'>@@ -197,7 +197,7 @@ static u8 msr_get_epp(struct amd_cpudata *cpudata)</div><div class='ctx'> 	u64 value;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = rdmsrl_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, &amp;value);</div><div class='add'>+	ret = rdmsrq_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, &amp;value);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		pr_debug("Could not retrieve energy perf value (%d)\n", ret);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -258,10 +258,10 @@ static int msr_update_perf(struct cpufreq_policy *policy, u8 min_perf,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (fast_switch) {</div><div class='del'>-		wrmsrl(MSR_AMD_CPPC_REQ, value);</div><div class='add'>+		wrmsrq(MSR_AMD_CPPC_REQ, value);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	} else {</div><div class='del'>-		int ret = wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, value);</div><div class='add'>+		int ret = wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, value);</div><div class='ctx'> </div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -309,7 +309,7 @@ static int msr_set_epp(struct cpufreq_policy *policy, u8 epp)</div><div class='ctx'> 	if (value == prev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, value);</div><div class='add'>+	ret = wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, value);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_err("failed to set energy perf value (%d)\n", ret);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -371,7 +371,7 @@ static int shmem_set_epp(struct cpufreq_policy *policy, u8 epp)</div><div class='ctx'> </div><div class='ctx'> static inline int msr_cppc_enable(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='del'>-	return wrmsrl_safe_on_cpu(policy-&gt;cpu, MSR_AMD_CPPC_ENABLE, 1);</div><div class='add'>+	return wrmsrq_safe_on_cpu(policy-&gt;cpu, MSR_AMD_CPPC_ENABLE, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int shmem_cppc_enable(struct cpufreq_policy *policy)</div><div class='hunk'>@@ -389,9 +389,10 @@ static inline int amd_pstate_cppc_enable(struct cpufreq_policy *policy)</div><div class='ctx'> static int msr_init_perf(struct amd_cpudata *cpudata)</div><div class='ctx'> {</div><div class='ctx'> 	union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='del'>-	u64 cap1, numerator;</div><div class='add'>+	u64 cap1, numerator, cppc_req;</div><div class='add'>+	u8 min_perf;</div><div class='ctx'> </div><div class='del'>-	int ret = rdmsrl_safe_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_CAP1,</div><div class='add'>+	int ret = rdmsrq_safe_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_CAP1,</div><div class='ctx'> 				     &amp;cap1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -400,6 +401,22 @@ static int msr_init_perf(struct amd_cpudata *cpudata)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	ret = rdmsrl_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, &amp;cppc_req);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(cpudata-&gt;cppc_req_cached, cppc_req);</div><div class='add'>+	min_perf = FIELD_GET(AMD_CPPC_MIN_PERF_MASK, cppc_req);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Clear out the min_perf part to check if the rest of the MSR is 0, if yes, this is an</div><div class='add'>+	 * indication that the min_perf value is the one specified through the BIOS option</div><div class='add'>+	 */</div><div class='add'>+	cppc_req &amp;= ~(AMD_CPPC_MIN_PERF_MASK);</div><div class='add'>+</div><div class='add'>+	if (!cppc_req)</div><div class='add'>+		perf.bios_min_perf = min_perf;</div><div class='add'>+</div><div class='ctx'> 	perf.highest_perf = numerator;</div><div class='ctx'> 	perf.max_limit_perf = numerator;</div><div class='ctx'> 	perf.min_limit_perf = FIELD_GET(AMD_CPPC_LOWEST_PERF_MASK, cap1);</div><div class='hunk'>@@ -417,6 +434,7 @@ static int shmem_init_perf(struct amd_cpudata *cpudata)</div><div class='ctx'> 	struct cppc_perf_caps cppc_perf;</div><div class='ctx'> 	union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='ctx'> 	u64 numerator;</div><div class='add'>+	bool auto_sel;</div><div class='ctx'> </div><div class='ctx'> 	int ret = cppc_get_perf_caps(cpudata-&gt;cpu, &amp;cppc_perf);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -438,7 +456,7 @@ static int shmem_init_perf(struct amd_cpudata *cpudata)</div><div class='ctx'> 	if (cppc_state == AMD_PSTATE_ACTIVE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = cppc_get_auto_sel_caps(cpudata-&gt;cpu, &amp;cppc_perf);</div><div class='add'>+	ret = cppc_get_auto_sel(cpudata-&gt;cpu, &amp;auto_sel);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_warn("failed to get auto_sel, ret: %d\n", ret);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -518,8 +536,8 @@ static inline bool amd_pstate_sample(struct amd_cpudata *cpudata)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='del'>-	rdmsrl(MSR_IA32_APERF, aperf);</div><div class='del'>-	rdmsrl(MSR_IA32_MPERF, mperf);</div><div class='add'>+	rdmsrq(MSR_IA32_APERF, aperf);</div><div class='add'>+	rdmsrq(MSR_IA32_MPERF, mperf);</div><div class='ctx'> 	tsc = rdtsc();</div><div class='ctx'> </div><div class='ctx'> 	if (cpudata-&gt;prev.mperf == mperf || cpudata-&gt;prev.tsc == tsc) {</div><div class='hunk'>@@ -554,6 +572,10 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u8 min_perf,</div><div class='ctx'> 	if (!policy)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* limit the max perf when core performance boost feature is disabled */</div><div class='add'>+	if (!cpudata-&gt;boost_supported)</div><div class='add'>+		max_perf = min_t(u8, perf.nominal_perf, max_perf);</div><div class='add'>+</div><div class='ctx'> 	des_perf = clamp_t(u8, des_perf, min_perf, max_perf);</div><div class='ctx'> </div><div class='ctx'> 	policy-&gt;cur = perf_to_freq(perf, cpudata-&gt;nominal_freq, des_perf);</div><div class='hunk'>@@ -563,10 +585,6 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u8 min_perf,</div><div class='ctx'> 		des_perf = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* limit the max perf when core performance boost feature is disabled */</div><div class='del'>-	if (!cpudata-&gt;boost_supported)</div><div class='del'>-		max_perf = min_t(u8, perf.nominal_perf, max_perf);</div><div class='del'>-</div><div class='ctx'> 	if (trace_amd_pstate_perf_enabled() &amp;&amp; amd_pstate_sample(cpudata)) {</div><div class='ctx'> 		trace_amd_pstate_perf(min_perf, des_perf, max_perf, cpudata-&gt;freq,</div><div class='ctx'> 			cpudata-&gt;cur.mperf, cpudata-&gt;cur.aperf, cpudata-&gt;cur.tsc,</div><div class='hunk'>@@ -580,20 +598,26 @@ static int amd_pstate_verify(struct cpufreq_policy_data *policy_data)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize lower frequency limit (i.e.policy-&gt;min) with</div><div class='del'>-	 * lowest_nonlinear_frequency which is the most energy efficient</div><div class='del'>-	 * frequency. Override the initial value set by cpufreq core and</div><div class='del'>-	 * amd-pstate qos_requests.</div><div class='add'>+	 * lowest_nonlinear_frequency or the min frequency (if) specified in BIOS,</div><div class='add'>+	 * Override the initial value set by cpufreq core and amd-pstate qos_requests.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (policy_data-&gt;min == FREQ_QOS_MIN_DEFAULT_VALUE) {</div><div class='ctx'> 		struct cpufreq_policy *policy __free(put_cpufreq_policy) =</div><div class='ctx'> 					      cpufreq_cpu_get(policy_data-&gt;cpu);</div><div class='ctx'> 		struct amd_cpudata *cpudata;</div><div class='add'>+		union perf_cached perf;</div><div class='ctx'> </div><div class='ctx'> 		if (!policy)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		cpudata = policy-&gt;driver_data;</div><div class='del'>-		policy_data-&gt;min = cpudata-&gt;lowest_nonlinear_freq;</div><div class='add'>+		perf = READ_ONCE(cpudata-&gt;perf);</div><div class='add'>+</div><div class='add'>+		if (perf.bios_min_perf)</div><div class='add'>+			policy_data-&gt;min = perf_to_freq(perf, cpudata-&gt;nominal_freq,</div><div class='add'>+							perf.bios_min_perf);</div><div class='add'>+		else</div><div class='add'>+			policy_data-&gt;min = cpudata-&gt;lowest_nonlinear_freq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cpufreq_verify_within_cpu_limits(policy_data);</div><div class='hunk'>@@ -607,13 +631,16 @@ static void amd_pstate_update_min_max_limit(struct cpufreq_policy *policy)</div><div class='ctx'> 	union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='ctx'> </div><div class='ctx'> 	perf.max_limit_perf = freq_to_perf(perf, cpudata-&gt;nominal_freq, policy-&gt;max);</div><div class='del'>-	perf.min_limit_perf = freq_to_perf(perf, cpudata-&gt;nominal_freq, policy-&gt;min);</div><div class='add'>+	WRITE_ONCE(cpudata-&gt;max_limit_freq, policy-&gt;max);</div><div class='ctx'> </div><div class='del'>-	if (cpudata-&gt;policy == CPUFREQ_POLICY_PERFORMANCE)</div><div class='add'>+	if (cpudata-&gt;policy == CPUFREQ_POLICY_PERFORMANCE) {</div><div class='ctx'> 		perf.min_limit_perf = min(perf.nominal_perf, perf.max_limit_perf);</div><div class='add'>+		WRITE_ONCE(cpudata-&gt;min_limit_freq, min(cpudata-&gt;nominal_freq, cpudata-&gt;max_limit_freq));</div><div class='add'>+	} else {</div><div class='add'>+		perf.min_limit_perf = freq_to_perf(perf, cpudata-&gt;nominal_freq, policy-&gt;min);</div><div class='add'>+		WRITE_ONCE(cpudata-&gt;min_limit_freq, policy-&gt;min);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	WRITE_ONCE(cpudata-&gt;max_limit_freq, policy-&gt;max);</div><div class='del'>-	WRITE_ONCE(cpudata-&gt;min_limit_freq, policy-&gt;min);</div><div class='ctx'> 	WRITE_ONCE(cpudata-&gt;perf, perf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -769,7 +796,7 @@ static int amd_pstate_init_boost_support(struct amd_cpudata *cpudata)</div><div class='ctx'> 		goto exit_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = rdmsrl_on_cpu(cpudata-&gt;cpu, MSR_K7_HWCR, &amp;boost_val);</div><div class='add'>+	ret = rdmsrq_on_cpu(cpudata-&gt;cpu, MSR_K7_HWCR, &amp;boost_val);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_err_once("failed to read initial CPU boost state!\n");</div><div class='ctx'> 		ret = -EIO;</div><div class='hunk'>@@ -788,18 +815,8 @@ exit_err:</div><div class='ctx'> </div><div class='ctx'> static void amd_perf_ctl_reset(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set amd-pstate preferred core enable can't be done directly from cpufreq callbacks</div><div class='del'>- * due to locking, so queue the work for later.</div><div class='del'>- */</div><div class='del'>-static void amd_pstste_sched_prefcore_workfn(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	sched_set_itmt_support();</div><div class='add'>+	wrmsrq_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);</div><div class='ctx'> }</div><div class='del'>-static DECLARE_WORK(sched_prefcore_work, amd_pstste_sched_prefcore_workfn);</div><div class='ctx'> </div><div class='ctx'> #define CPPC_MAX_PERF	U8_MAX</div><div class='ctx'> </div><div class='hunk'>@@ -811,29 +828,20 @@ static void amd_pstate_init_prefcore(struct amd_cpudata *cpudata)</div><div class='ctx'> </div><div class='ctx'> 	cpudata-&gt;hw_prefcore = true;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The priorities can be set regardless of whether or not</div><div class='del'>-	 * sched_set_itmt_support(true) has been called and it is valid to</div><div class='del'>-	 * update them at any time after it has been called.</div><div class='del'>-	 */</div><div class='add'>+	/* Priorities must be initialized before ITMT support can be toggled on. */</div><div class='ctx'> 	sched_set_itmt_core_prio((int)READ_ONCE(cpudata-&gt;prefcore_ranking), cpudata-&gt;cpu);</div><div class='del'>-</div><div class='del'>-	schedule_work(&amp;sched_prefcore_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amd_pstate_update_limits(unsigned int cpu)</div><div class='add'>+static void amd_pstate_update_limits(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy __free(put_cpufreq_policy) = cpufreq_cpu_get(cpu);</div><div class='ctx'> 	struct amd_cpudata *cpudata;</div><div class='ctx'> 	u32 prev_high = 0, cur_high = 0;</div><div class='ctx'> 	bool highest_perf_changed = false;</div><div class='add'>+	unsigned int cpu = policy-&gt;cpu;</div><div class='ctx'> </div><div class='ctx'> 	if (!amd_pstate_prefcore)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!policy)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	if (amd_get_highest_perf(cpu, &amp;cur_high))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -844,8 +852,10 @@ static void amd_pstate_update_limits(unsigned int cpu)</div><div class='ctx'> 	if (highest_perf_changed) {</div><div class='ctx'> 		WRITE_ONCE(cpudata-&gt;prefcore_ranking, cur_high);</div><div class='ctx'> </div><div class='del'>-		if (cur_high &lt; CPPC_MAX_PERF)</div><div class='add'>+		if (cur_high &lt; CPPC_MAX_PERF) {</div><div class='ctx'> 			sched_set_itmt_core_prio((int)cur_high, cpu);</div><div class='add'>+			sched_update_asym_prefer_cpu(cpu, prev_high, cur_high);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1037,6 +1047,10 @@ free_cpudata1:</div><div class='ctx'> static void amd_pstate_cpu_exit(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='add'>+	union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='add'>+</div><div class='add'>+	/* Reset CPPC_REQ MSR to the BIOS value */</div><div class='add'>+	amd_pstate_update_perf(policy, perf.bios_min_perf, 0U, 0U, 0U, false);</div><div class='ctx'> </div><div class='ctx'> 	freq_qos_remove_request(&amp;cpudata-&gt;req[1]);</div><div class='ctx'> 	freq_qos_remove_request(&amp;cpudata-&gt;req[0]);</div><div class='hunk'>@@ -1193,6 +1207,9 @@ static ssize_t show_energy_performance_preference(</div><div class='ctx'> </div><div class='ctx'> static void amd_pstate_driver_cleanup(void)</div><div class='ctx'> {</div><div class='add'>+	if (amd_pstate_prefcore)</div><div class='add'>+		sched_clear_itmt_support();</div><div class='add'>+</div><div class='ctx'> 	cppc_state = AMD_PSTATE_DISABLE;</div><div class='ctx'> 	current_pstate_driver = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -1235,6 +1252,10 @@ static int amd_pstate_register_driver(int mode)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Enable ITMT support once all CPUs have initialized their asym priorities. */</div><div class='add'>+	if (amd_pstate_prefcore)</div><div class='add'>+		sched_set_itmt_support();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1311,6 +1332,12 @@ static ssize_t amd_pstate_show_status(char *buf)</div><div class='ctx'> 	return sysfs_emit(buf, "%s\n", amd_pstate_mode_string[cppc_state]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int amd_pstate_get_status(void)</div><div class='add'>+{</div><div class='add'>+	return cppc_state;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(amd_pstate_get_status);</div><div class='add'>+</div><div class='ctx'> int amd_pstate_update_status(const char *buf, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	int mode_idx;</div><div class='hunk'>@@ -1425,7 +1452,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 	struct amd_cpudata *cpudata;</div><div class='ctx'> 	union perf_cached perf;</div><div class='ctx'> 	struct device *dev;</div><div class='del'>-	u64 value;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1490,12 +1516,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 		cpudata-&gt;epp_default = AMD_CPPC_EPP_BALANCE_PERFORMANCE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cpu_feature_enabled(X86_FEATURE_CPPC)) {</div><div class='del'>-		ret = rdmsrl_on_cpu(cpudata-&gt;cpu, MSR_AMD_CPPC_REQ, &amp;value);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-		WRITE_ONCE(cpudata-&gt;cppc_req_cached, value);</div><div class='del'>-	}</div><div class='ctx'> 	ret = amd_pstate_set_epp(policy, cpudata-&gt;epp_default);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1515,6 +1535,11 @@ static void amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy)</div><div class='ctx'> 	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='ctx'> </div><div class='ctx'> 	if (cpudata) {</div><div class='add'>+		union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='add'>+</div><div class='add'>+		/* Reset CPPC_REQ MSR to the BIOS value */</div><div class='add'>+		amd_pstate_update_perf(policy, perf.bios_min_perf, 0U, 0U, 0U, false);</div><div class='add'>+</div><div class='ctx'> 		kfree(cpudata);</div><div class='ctx'> 		policy-&gt;driver_data = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1565,21 +1590,38 @@ static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amd_pstate_epp_cpu_online(struct cpufreq_policy *policy)</div><div class='add'>+static int amd_pstate_cpu_online(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='del'>-	pr_debug("AMD CPU Core %d going online\n", policy-&gt;cpu);</div><div class='del'>-</div><div class='ctx'> 	return amd_pstate_cppc_enable(policy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amd_pstate_epp_cpu_offline(struct cpufreq_policy *policy)</div><div class='add'>+static int amd_pstate_cpu_offline(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='del'>-	return 0;</div><div class='add'>+	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='add'>+	union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reset CPPC_REQ MSR to the BIOS value, this will allow us to retain the BIOS specified</div><div class='add'>+	 * min_perf value across kexec reboots. If this CPU is just onlined normally after this, the</div><div class='add'>+	 * limits, epp and desired perf will get reset to the cached values in cpudata struct</div><div class='add'>+	 */</div><div class='add'>+	return amd_pstate_update_perf(policy, perf.bios_min_perf, 0U, 0U, 0U, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amd_pstate_epp_suspend(struct cpufreq_policy *policy)</div><div class='add'>+static int amd_pstate_suspend(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='add'>+	union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Reset CPPC_REQ MSR to the BIOS value, this will allow us to retain the BIOS specified</div><div class='add'>+	 * min_perf value across kexec reboots. If this CPU is just resumed back without kexec,</div><div class='add'>+	 * the limits, epp and desired perf will get reset to the cached values in cpudata struct</div><div class='add'>+	 */</div><div class='add'>+	ret = amd_pstate_update_perf(policy, perf.bios_min_perf, 0U, 0U, 0U, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* invalidate to ensure it's rewritten during resume */</div><div class='ctx'> 	cpudata-&gt;cppc_req_cached = 0;</div><div class='hunk'>@@ -1590,6 +1632,17 @@ static int amd_pstate_epp_suspend(struct cpufreq_policy *policy)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int amd_pstate_resume(struct cpufreq_policy *policy)</div><div class='add'>+{</div><div class='add'>+	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='add'>+	union perf_cached perf = READ_ONCE(cpudata-&gt;perf);</div><div class='add'>+	int cur_perf = freq_to_perf(perf, cpudata-&gt;nominal_freq, policy-&gt;cur);</div><div class='add'>+</div><div class='add'>+	/* Set CPPC_REQ to last sane value until the governor updates it */</div><div class='add'>+	return amd_pstate_update_perf(policy, perf.min_limit_perf, cur_perf, perf.max_limit_perf,</div><div class='add'>+				      0U, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int amd_pstate_epp_resume(struct cpufreq_policy *policy)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd_cpudata *cpudata = policy-&gt;driver_data;</div><div class='hunk'>@@ -1615,6 +1668,10 @@ static struct cpufreq_driver amd_pstate_driver = {</div><div class='ctx'> 	.fast_switch    = amd_pstate_fast_switch,</div><div class='ctx'> 	.init		= amd_pstate_cpu_init,</div><div class='ctx'> 	.exit		= amd_pstate_cpu_exit,</div><div class='add'>+	.online		= amd_pstate_cpu_online,</div><div class='add'>+	.offline	= amd_pstate_cpu_offline,</div><div class='add'>+	.suspend	= amd_pstate_suspend,</div><div class='add'>+	.resume		= amd_pstate_resume,</div><div class='ctx'> 	.set_boost	= amd_pstate_set_boost,</div><div class='ctx'> 	.update_limits	= amd_pstate_update_limits,</div><div class='ctx'> 	.name		= "amd-pstate",</div><div class='hunk'>@@ -1627,9 +1684,9 @@ static struct cpufreq_driver amd_pstate_epp_driver = {</div><div class='ctx'> 	.setpolicy	= amd_pstate_epp_set_policy,</div><div class='ctx'> 	.init		= amd_pstate_epp_cpu_init,</div><div class='ctx'> 	.exit		= amd_pstate_epp_cpu_exit,</div><div class='del'>-	.offline	= amd_pstate_epp_cpu_offline,</div><div class='del'>-	.online		= amd_pstate_epp_cpu_online,</div><div class='del'>-	.suspend	= amd_pstate_epp_suspend,</div><div class='add'>+	.offline	= amd_pstate_cpu_offline,</div><div class='add'>+	.online		= amd_pstate_cpu_online,</div><div class='add'>+	.suspend	= amd_pstate_suspend,</div><div class='ctx'> 	.resume		= amd_pstate_epp_resume,</div><div class='ctx'> 	.update_limits	= amd_pstate_update_limits,</div><div class='ctx'> 	.set_boost	= amd_pstate_set_boost,</div><div class='head'>diff --git a/drivers/cpufreq/amd-pstate.h b/drivers/cpufreq/amd-pstate.h<br/>index fbe1c08d3f06..cb45fdca27a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd-pstate.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd-pstate.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/amd-pstate.h</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'>  * @lowest_perf: the absolute lowest performance level of the processor</div><div class='ctx'>  * @min_limit_perf: Cached value of the performance corresponding to policy-&gt;min</div><div class='ctx'>  * @max_limit_perf: Cached value of the performance corresponding to policy-&gt;max</div><div class='add'>+ * @bios_min_perf: Cached perf value corresponding to the "Requested CPU Min Frequency" BIOS option</div><div class='ctx'>  */</div><div class='ctx'> union perf_cached {</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -39,6 +40,7 @@ union perf_cached {</div><div class='ctx'> 		u8	lowest_perf;</div><div class='ctx'> 		u8	min_limit_perf;</div><div class='ctx'> 		u8	max_limit_perf;</div><div class='add'>+		u8	bios_min_perf;</div><div class='ctx'> 	};</div><div class='ctx'> 	u64	val;</div><div class='ctx'> };</div><div class='hunk'>@@ -119,6 +121,7 @@ enum amd_pstate_mode {</div><div class='ctx'> 	AMD_PSTATE_MAX,</div><div class='ctx'> };</div><div class='ctx'> const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode);</div><div class='add'>+int amd_pstate_get_status(void);</div><div class='ctx'> int amd_pstate_update_status(const char *buf, size_t size);</div><div class='ctx'> </div><div class='ctx'> #endif /* _LINUX_AMD_PSTATE_H */</div><div class='head'>diff --git a/drivers/cpufreq/amd_freq_sensitivity.c b/drivers/cpufreq/amd_freq_sensitivity.c<br/>index 59b19b9975e8..13fed4b9e02b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd_freq_sensitivity.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/amd_freq_sensitivity.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/amd_freq_sensitivity.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/amd_freq_sensitivity.c</a></div><div class='hunk'>@@ -129,7 +129,7 @@ static int __init amd_freq_sensitivity_init(void)</div><div class='ctx'> 		pci_dev_put(pcidev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (rdmsrl_safe(MSR_AMD64_FREQ_SENSITIVITY_ACTUAL, &amp;val))</div><div class='add'>+	if (rdmsrq_safe(MSR_AMD64_FREQ_SENSITIVITY_ACTUAL, &amp;val))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (!(val &gt;&gt; CLASS_CODE_SHIFT))</div><div class='head'>diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c<br/>index 4994c86feb57..b1d29b7af232 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/apple-soc-cpufreq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/apple-soc-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/apple-soc-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/apple-soc-cpufreq.c</a></div><div class='hunk'>@@ -134,11 +134,17 @@ static const struct of_device_id apple_soc_cpufreq_of_match[] __maybe_unused = {</div><div class='ctx'> </div><div class='ctx'> static unsigned int apple_soc_cpufreq_get_rate(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_get_raw(cpu);</div><div class='del'>-	struct apple_cpu_priv *priv = policy-&gt;driver_data;</div><div class='add'>+	struct cpufreq_policy *policy;</div><div class='add'>+	struct apple_cpu_priv *priv;</div><div class='ctx'> 	struct cpufreq_frequency_table *p;</div><div class='ctx'> 	unsigned int pstate;</div><div class='ctx'> </div><div class='add'>+	policy = cpufreq_cpu_get_raw(cpu);</div><div class='add'>+	if (unlikely(!policy))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	priv = policy-&gt;driver_data;</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;info-&gt;cur_pstate_mask) {</div><div class='ctx'> 		u32 reg = readl_relaxed(priv-&gt;reg_base + APPLE_DVFS_STATUS);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c<br/>index b3d74f9adcf0..b7c688a5659c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cppc_cpufreq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cppc_cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cppc_cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/cppc_cpufreq.c</a></div><div class='hunk'>@@ -747,7 +747,7 @@ static unsigned int cppc_cpufreq_get_rate(unsigned int cpu)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!policy)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	cpu_data = policy-&gt;driver_data;</div><div class='ctx'> </div><div class='hunk'>@@ -808,10 +808,119 @@ static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)</div><div class='ctx'> </div><div class='ctx'> 	return cpufreq_show_cpus(cpu_data-&gt;shared_cpu_map, buf);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static ssize_t show_auto_select(struct cpufreq_policy *policy, char *buf)</div><div class='add'>+{</div><div class='add'>+	bool val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = cppc_get_auto_sel(policy-&gt;cpu, &amp;val);</div><div class='add'>+</div><div class='add'>+	/* show "&lt;unsupported&gt;" when this register is not supported by cpc */</div><div class='add'>+	if (ret == -EOPNOTSUPP)</div><div class='add'>+		return sysfs_emit(buf, "&lt;unsupported&gt;\n");</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_auto_select(struct cpufreq_policy *policy,</div><div class='add'>+				 const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	bool val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtobool(buf, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = cppc_set_auto_sel(policy-&gt;cpu, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_auto_act_window(struct cpufreq_policy *policy, char *buf)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = cppc_get_auto_act_window(policy-&gt;cpu, &amp;val);</div><div class='add'>+</div><div class='add'>+	/* show "&lt;unsupported&gt;" when this register is not supported by cpc */</div><div class='add'>+	if (ret == -EOPNOTSUPP)</div><div class='add'>+		return sysfs_emit(buf, "&lt;unsupported&gt;\n");</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%llu\n", val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_auto_act_window(struct cpufreq_policy *policy,</div><div class='add'>+				     const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	u64 usec;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtou64(buf, 0, &amp;usec);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = cppc_set_auto_act_window(policy-&gt;cpu, usec);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t show_energy_performance_preference_val(struct cpufreq_policy *policy, char *buf)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = cppc_get_epp_perf(policy-&gt;cpu, &amp;val);</div><div class='add'>+</div><div class='add'>+	/* show "&lt;unsupported&gt;" when this register is not supported by cpc */</div><div class='add'>+	if (ret == -EOPNOTSUPP)</div><div class='add'>+		return sysfs_emit(buf, "&lt;unsupported&gt;\n");</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%llu\n", val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t store_energy_performance_preference_val(struct cpufreq_policy *policy,</div><div class='add'>+						       const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtou64(buf, 0, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = cppc_set_epp(policy-&gt;cpu, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> cpufreq_freq_attr_ro(freqdomain_cpus);</div><div class='add'>+cpufreq_freq_attr_rw(auto_select);</div><div class='add'>+cpufreq_freq_attr_rw(auto_act_window);</div><div class='add'>+cpufreq_freq_attr_rw(energy_performance_preference_val);</div><div class='ctx'> </div><div class='ctx'> static struct freq_attr *cppc_cpufreq_attr[] = {</div><div class='ctx'> 	&amp;freqdomain_cpus,</div><div class='add'>+	&amp;auto_select,</div><div class='add'>+	&amp;auto_act_window,</div><div class='add'>+	&amp;energy_performance_preference_val,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c<br/>index 2aa00769cf09..a010da0f6337 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq-dt-platdev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cpufreq-dt-platdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq-dt-platdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/cpufreq-dt-platdev.c</a></div><div class='hunk'>@@ -175,6 +175,7 @@ static const struct of_device_id blocklist[] __initconst = {</div><div class='ctx'> 	{ .compatible = "qcom,sm8350", },</div><div class='ctx'> 	{ .compatible = "qcom,sm8450", },</div><div class='ctx'> 	{ .compatible = "qcom,sm8550", },</div><div class='add'>+	{ .compatible = "qcom,sm8650", },</div><div class='ctx'> </div><div class='ctx'> 	{ .compatible = "st,stih407", },</div><div class='ctx'> 	{ .compatible = "st,stih410", },</div><div class='head'>diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c<br/>index 3841c9da6cac..d7426e1d8bdd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/cpufreq.c</a></div><div class='hunk'>@@ -255,51 +255,6 @@ void cpufreq_cpu_put(struct cpufreq_policy *policy)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cpufreq_cpu_put);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * cpufreq_cpu_release - Unlock a policy and decrement its usage counter.</div><div class='del'>- * @policy: cpufreq policy returned by cpufreq_cpu_acquire().</div><div class='del'>- */</div><div class='del'>-void cpufreq_cpu_release(struct cpufreq_policy *policy)</div><div class='del'>-{</div><div class='del'>-	if (WARN_ON(!policy))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;policy-&gt;rwsem);</div><div class='del'>-</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='del'>-</div><div class='del'>-	cpufreq_cpu_put(policy);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * cpufreq_cpu_acquire - Find policy for a CPU, mark it as busy and lock it.</div><div class='del'>- * @cpu: CPU to find the policy for.</div><div class='del'>- *</div><div class='del'>- * Call cpufreq_cpu_get() to get a reference on the cpufreq policy for @cpu and</div><div class='del'>- * if the policy returned by it is not NULL, acquire its rwsem for writing.</div><div class='del'>- * Return the policy if it is active or release it and return NULL otherwise.</div><div class='del'>- *</div><div class='del'>- * The policy returned by this function has to be released with the help of</div><div class='del'>- * cpufreq_cpu_release() in order to release its rwsem and balance its usage</div><div class='del'>- * counter properly.</div><div class='del'>- */</div><div class='del'>-struct cpufreq_policy *cpufreq_cpu_acquire(unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='del'>-</div><div class='del'>-	if (!policy)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='del'>-</div><div class='del'>-	if (policy_is_inactive(policy)) {</div><div class='del'>-		cpufreq_cpu_release(policy);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return policy;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*********************************************************************</div><div class='ctx'>  *            EXTERNALLY AFFECTING FREQUENCY CHANGES                 *</div><div class='ctx'>  *********************************************************************/</div><div class='hunk'>@@ -536,16 +491,18 @@ void cpufreq_disable_fast_switch(struct cpufreq_policy *policy)</div><div class='ctx'> EXPORT_SYMBOL_GPL(cpufreq_disable_fast_switch);</div><div class='ctx'> </div><div class='ctx'> static unsigned int __resolve_freq(struct cpufreq_policy *policy,</div><div class='del'>-		unsigned int target_freq, unsigned int relation)</div><div class='add'>+				   unsigned int target_freq,</div><div class='add'>+				   unsigned int min, unsigned int max,</div><div class='add'>+				   unsigned int relation)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int idx;</div><div class='ctx'> </div><div class='del'>-	target_freq = clamp_val(target_freq, policy-&gt;min, policy-&gt;max);</div><div class='add'>+	target_freq = clamp_val(target_freq, min, max);</div><div class='ctx'> </div><div class='ctx'> 	if (!policy-&gt;freq_table)</div><div class='ctx'> 		return target_freq;</div><div class='ctx'> </div><div class='del'>-	idx = cpufreq_frequency_table_target(policy, target_freq, relation);</div><div class='add'>+	idx = cpufreq_frequency_table_target(policy, target_freq, min, max, relation);</div><div class='ctx'> 	policy-&gt;cached_resolved_idx = idx;</div><div class='ctx'> 	policy-&gt;cached_target_freq = target_freq;</div><div class='ctx'> 	return policy-&gt;freq_table[idx].frequency;</div><div class='hunk'>@@ -565,7 +522,21 @@ static unsigned int __resolve_freq(struct cpufreq_policy *policy,</div><div class='ctx'> unsigned int cpufreq_driver_resolve_freq(struct cpufreq_policy *policy,</div><div class='ctx'> 					 unsigned int target_freq)</div><div class='ctx'> {</div><div class='del'>-	return __resolve_freq(policy, target_freq, CPUFREQ_RELATION_LE);</div><div class='add'>+	unsigned int min = READ_ONCE(policy-&gt;min);</div><div class='add'>+	unsigned int max = READ_ONCE(policy-&gt;max);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If this function runs in parallel with cpufreq_set_policy(), it may</div><div class='add'>+	 * read policy-&gt;min before the update and policy-&gt;max after the update</div><div class='add'>+	 * or the other way around, so there is no ordering guarantee.</div><div class='add'>+	 *</div><div class='add'>+	 * Resolve this by always honoring the max (in case it comes from</div><div class='add'>+	 * thermal throttling or similar).</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(min &gt; max))</div><div class='add'>+		min = max;</div><div class='add'>+</div><div class='add'>+	return __resolve_freq(policy, target_freq, min, max, CPUFREQ_RELATION_LE);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cpufreq_driver_resolve_freq);</div><div class='ctx'> </div><div class='hunk'>@@ -620,6 +591,22 @@ static ssize_t show_local_boost(struct cpufreq_policy *policy, char *buf)</div><div class='ctx'> 	return sysfs_emit(buf, "%d\n", policy-&gt;boost_enabled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int policy_set_boost(struct cpufreq_policy *policy, bool enable)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (policy-&gt;boost_enabled == enable)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	policy-&gt;boost_enabled = enable;</div><div class='add'>+</div><div class='add'>+	ret = cpufreq_driver-&gt;set_boost(policy, enable);</div><div class='add'>+	if (ret)</div><div class='add'>+		policy-&gt;boost_enabled = !policy-&gt;boost_enabled;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t store_local_boost(struct cpufreq_policy *policy,</div><div class='ctx'> 				 const char *buf, size_t count)</div><div class='ctx'> {</div><div class='hunk'>@@ -635,21 +622,11 @@ static ssize_t store_local_boost(struct cpufreq_policy *policy,</div><div class='ctx'> 	if (!policy-&gt;boost_supported)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (policy-&gt;boost_enabled == enable)</div><div class='add'>+	ret = policy_set_boost(policy, enable);</div><div class='add'>+	if (!ret)</div><div class='ctx'> 		return count;</div><div class='ctx'> </div><div class='del'>-	policy-&gt;boost_enabled = enable;</div><div class='del'>-</div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	ret = cpufreq_driver-&gt;set_boost(policy, enable);</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		policy-&gt;boost_enabled = !policy-&gt;boost_enabled;</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct freq_attr local_boost = __ATTR(boost, 0644, show_local_boost, store_local_boost);</div><div class='hunk'>@@ -829,7 +806,7 @@ static ssize_t show_scaling_governor(struct cpufreq_policy *policy, char *buf)</div><div class='ctx'> static ssize_t store_scaling_governor(struct cpufreq_policy *policy,</div><div class='ctx'> 					const char *buf, size_t count)</div><div class='ctx'> {</div><div class='del'>-	char str_governor[16];</div><div class='add'>+	char str_governor[CPUFREQ_NAME_LEN];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = sscanf(buf, "%15s", str_governor);</div><div class='hunk'>@@ -940,9 +917,9 @@ static ssize_t store_scaling_setspeed(struct cpufreq_policy *policy,</div><div class='ctx'> 	if (!policy-&gt;governor || !policy-&gt;governor-&gt;store_setspeed)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = sscanf(buf, "%u", &amp;freq);</div><div class='del'>-	if (ret != 1)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	ret = kstrtouint(buf, 0, &amp;freq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	policy-&gt;governor-&gt;store_setspeed(policy, freq);</div><div class='ctx'> </div><div class='hunk'>@@ -1009,17 +986,16 @@ static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpufreq_policy *policy = to_policy(kobj);</div><div class='ctx'> 	struct freq_attr *fattr = to_attr(attr);</div><div class='del'>-	ssize_t ret = -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	if (!fattr-&gt;show)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	down_read(&amp;policy-&gt;rwsem);</div><div class='add'>+	guard(cpufreq_policy_read)(policy);</div><div class='add'>+</div><div class='ctx'> 	if (likely(!policy_is_inactive(policy)))</div><div class='del'>-		ret = fattr-&gt;show(policy, buf);</div><div class='del'>-	up_read(&amp;policy-&gt;rwsem);</div><div class='add'>+		return fattr-&gt;show(policy, buf);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return -EBUSY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t store(struct kobject *kobj, struct attribute *attr,</div><div class='hunk'>@@ -1027,17 +1003,16 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,</div><div class='ctx'> {</div><div class='ctx'> 	struct cpufreq_policy *policy = to_policy(kobj);</div><div class='ctx'> 	struct freq_attr *fattr = to_attr(attr);</div><div class='del'>-	ssize_t ret = -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	if (!fattr-&gt;store)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='add'>+</div><div class='ctx'> 	if (likely(!policy_is_inactive(policy)))</div><div class='del'>-		ret = fattr-&gt;store(policy, buf, count);</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='add'>+		return fattr-&gt;store(policy, buf, count);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return -EBUSY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cpufreq_sysfs_release(struct kobject *kobj)</div><div class='hunk'>@@ -1195,7 +1170,8 @@ static int cpufreq_add_policy_cpu(struct cpufreq_policy *policy, unsigned int cp</div><div class='ctx'> 	if (cpumask_test_cpu(cpu, policy-&gt;cpus))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='add'>+</div><div class='ctx'> 	if (has_target())</div><div class='ctx'> 		cpufreq_stop_governor(policy);</div><div class='ctx'> </div><div class='hunk'>@@ -1206,7 +1182,7 @@ static int cpufreq_add_policy_cpu(struct cpufreq_policy *policy, unsigned int cp</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			pr_err("%s: Failed to start governor\n", __func__);</div><div class='ctx'> 	}</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1226,9 +1202,10 @@ static void handle_update(struct work_struct *work)</div><div class='ctx'> 		container_of(work, struct cpufreq_policy, update);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("handle_update for cpu %u called\n", policy-&gt;cpu);</div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='add'>+</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='add'>+</div><div class='ctx'> 	refresh_frequency_limits(policy);</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpufreq_notifier_min(struct notifier_block *nb, unsigned long freq,</div><div class='hunk'>@@ -1254,11 +1231,11 @@ static void cpufreq_policy_put_kobj(struct cpufreq_policy *policy)</div><div class='ctx'> 	struct kobject *kobj;</div><div class='ctx'> 	struct completion *cmp;</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='del'>-	cpufreq_stats_free_table(policy);</div><div class='del'>-	kobj = &amp;policy-&gt;kobj;</div><div class='del'>-	cmp = &amp;policy-&gt;kobj_unregister;</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='add'>+	scoped_guard(cpufreq_policy_write, policy) {</div><div class='add'>+		cpufreq_stats_free_table(policy);</div><div class='add'>+		kobj = &amp;policy-&gt;kobj;</div><div class='add'>+		cmp = &amp;policy-&gt;kobj_unregister;</div><div class='add'>+	}</div><div class='ctx'> 	kobject_put(kobj);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1334,7 +1311,6 @@ static struct cpufreq_policy *cpufreq_policy_alloc(unsigned int cpu)</div><div class='ctx'> 	init_waitqueue_head(&amp;policy-&gt;transition_wait);</div><div class='ctx'> 	INIT_WORK(&amp;policy-&gt;update, handle_update);</div><div class='ctx'> </div><div class='del'>-	policy-&gt;cpu = cpu;</div><div class='ctx'> 	return policy;</div><div class='ctx'> </div><div class='ctx'> err_min_qos_notifier:</div><div class='hunk'>@@ -1403,35 +1379,17 @@ static void cpufreq_policy_free(struct cpufreq_policy *policy)</div><div class='ctx'> 	kfree(policy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cpufreq_online(unsigned int cpu)</div><div class='add'>+static int cpufreq_policy_online(struct cpufreq_policy *policy,</div><div class='add'>+				 unsigned int cpu, bool new_policy)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy;</div><div class='del'>-	bool new_policy;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned int j;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pr_debug("%s: bringing CPU%u online\n", __func__, cpu);</div><div class='del'>-</div><div class='del'>-	/* Check if this CPU already has a policy to manage it */</div><div class='del'>-	policy = per_cpu(cpufreq_cpu_data, cpu);</div><div class='del'>-	if (policy) {</div><div class='del'>-		WARN_ON(!cpumask_test_cpu(cpu, policy-&gt;related_cpus));</div><div class='del'>-		if (!policy_is_inactive(policy))</div><div class='del'>-			return cpufreq_add_policy_cpu(policy, cpu);</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='ctx'> </div><div class='del'>-		/* This is the only online CPU for the policy.  Start over. */</div><div class='del'>-		new_policy = false;</div><div class='del'>-		down_write(&amp;policy-&gt;rwsem);</div><div class='del'>-		policy-&gt;cpu = cpu;</div><div class='del'>-		policy-&gt;governor = NULL;</div><div class='del'>-	} else {</div><div class='del'>-		new_policy = true;</div><div class='del'>-		policy = cpufreq_policy_alloc(cpu);</div><div class='del'>-		if (!policy)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		down_write(&amp;policy-&gt;rwsem);</div><div class='del'>-	}</div><div class='add'>+	policy-&gt;cpu = cpu;</div><div class='add'>+	policy-&gt;governor = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!new_policy &amp;&amp; cpufreq_driver-&gt;online) {</div><div class='ctx'> 		/* Recover policy-&gt;cpus using related_cpus */</div><div class='hunk'>@@ -1454,7 +1412,7 @@ static int cpufreq_online(unsigned int cpu)</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			pr_debug("%s: %d: initialization failed\n", __func__,</div><div class='ctx'> 				 __LINE__);</div><div class='del'>-			goto out_free_policy;</div><div class='add'>+			goto out_clear_policy;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -1605,7 +1563,55 @@ static int cpufreq_online(unsigned int cpu)</div><div class='ctx'> 		goto out_destroy_policy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_destroy_policy:</div><div class='add'>+	for_each_cpu(j, policy-&gt;real_cpus)</div><div class='add'>+		remove_cpu_dev_symlink(policy, j, get_cpu_device(j));</div><div class='add'>+</div><div class='add'>+out_offline_policy:</div><div class='add'>+	if (cpufreq_driver-&gt;offline)</div><div class='add'>+		cpufreq_driver-&gt;offline(policy);</div><div class='add'>+</div><div class='add'>+out_exit_policy:</div><div class='add'>+	if (cpufreq_driver-&gt;exit)</div><div class='add'>+		cpufreq_driver-&gt;exit(policy);</div><div class='add'>+</div><div class='add'>+out_clear_policy:</div><div class='add'>+	cpumask_clear(policy-&gt;cpus);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cpufreq_online(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct cpufreq_policy *policy;</div><div class='add'>+	bool new_policy;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pr_debug("%s: bringing CPU%u online\n", __func__, cpu);</div><div class='add'>+</div><div class='add'>+	/* Check if this CPU already has a policy to manage it */</div><div class='add'>+	policy = per_cpu(cpufreq_cpu_data, cpu);</div><div class='add'>+	if (policy) {</div><div class='add'>+		WARN_ON(!cpumask_test_cpu(cpu, policy-&gt;related_cpus));</div><div class='add'>+		if (!policy_is_inactive(policy))</div><div class='add'>+			return cpufreq_add_policy_cpu(policy, cpu);</div><div class='add'>+</div><div class='add'>+		/* This is the only online CPU for the policy.  Start over. */</div><div class='add'>+		new_policy = false;</div><div class='add'>+	} else {</div><div class='add'>+		new_policy = true;</div><div class='add'>+		policy = cpufreq_policy_alloc(cpu);</div><div class='add'>+		if (!policy)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = cpufreq_policy_online(policy, cpu, new_policy);</div><div class='add'>+	if (ret) {</div><div class='add'>+		cpufreq_policy_free(policy);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	kobject_uevent(&amp;policy-&gt;kobj, KOBJ_ADD);</div><div class='ctx'> </div><div class='hunk'>@@ -1617,41 +1623,24 @@ static int cpufreq_online(unsigned int cpu)</div><div class='ctx'> 	if (new_policy &amp;&amp; cpufreq_thermal_control_enabled(cpufreq_driver))</div><div class='ctx'> 		policy-&gt;cdev = of_cpufreq_cooling_register(policy);</div><div class='ctx'> </div><div class='del'>-	/* Let the per-policy boost flag mirror the cpufreq_driver boost during init */</div><div class='add'>+	/*</div><div class='add'>+	 * Let the per-policy boost flag mirror the cpufreq_driver boost during</div><div class='add'>+	 * initialization for a new policy. For an existing policy, maintain the</div><div class='add'>+	 * previous boost value unless global boost is disabled.</div><div class='add'>+	 */</div><div class='ctx'> 	if (cpufreq_driver-&gt;set_boost &amp;&amp; policy-&gt;boost_supported &amp;&amp;</div><div class='del'>-	    policy-&gt;boost_enabled != cpufreq_boost_enabled()) {</div><div class='del'>-		policy-&gt;boost_enabled = cpufreq_boost_enabled();</div><div class='del'>-		ret = cpufreq_driver-&gt;set_boost(policy, policy-&gt;boost_enabled);</div><div class='add'>+	    (new_policy || !cpufreq_boost_enabled())) {</div><div class='add'>+		ret = policy_set_boost(policy, cpufreq_boost_enabled());</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			/* If the set_boost fails, the online operation is not affected */</div><div class='ctx'> 			pr_info("%s: CPU%d: Cannot %s BOOST\n", __func__, policy-&gt;cpu,</div><div class='del'>-				str_enable_disable(policy-&gt;boost_enabled));</div><div class='del'>-			policy-&gt;boost_enabled = !policy-&gt;boost_enabled;</div><div class='add'>+				str_enable_disable(cpufreq_boost_enabled()));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("initialization complete\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-out_destroy_policy:</div><div class='del'>-	for_each_cpu(j, policy-&gt;real_cpus)</div><div class='del'>-		remove_cpu_dev_symlink(policy, j, get_cpu_device(j));</div><div class='del'>-</div><div class='del'>-out_offline_policy:</div><div class='del'>-	if (cpufreq_driver-&gt;offline)</div><div class='del'>-		cpufreq_driver-&gt;offline(policy);</div><div class='del'>-</div><div class='del'>-out_exit_policy:</div><div class='del'>-	if (cpufreq_driver-&gt;exit)</div><div class='del'>-		cpufreq_driver-&gt;exit(policy);</div><div class='del'>-</div><div class='del'>-out_free_policy:</div><div class='del'>-	cpumask_clear(policy-&gt;cpus);</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='del'>-</div><div class='del'>-	cpufreq_policy_free(policy);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1741,11 +1730,10 @@ static int cpufreq_offline(unsigned int cpu)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='ctx'> </div><div class='ctx'> 	__cpufreq_offline(cpu, policy);</div><div class='ctx'> </div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1762,33 +1750,29 @@ static void cpufreq_remove_dev(struct device *dev, struct subsys_interface *sif)</div><div class='ctx'> 	if (!policy)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='add'>+	scoped_guard(cpufreq_policy_write, policy) {</div><div class='add'>+		if (cpu_online(cpu))</div><div class='add'>+			__cpufreq_offline(cpu, policy);</div><div class='ctx'> </div><div class='del'>-	if (cpu_online(cpu))</div><div class='del'>-		__cpufreq_offline(cpu, policy);</div><div class='add'>+		remove_cpu_dev_symlink(policy, cpu, dev);</div><div class='ctx'> </div><div class='del'>-	remove_cpu_dev_symlink(policy, cpu, dev);</div><div class='add'>+		if (!cpumask_empty(policy-&gt;real_cpus))</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='del'>-	if (!cpumask_empty(policy-&gt;real_cpus)) {</div><div class='del'>-		up_write(&amp;policy-&gt;rwsem);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+		/*</div><div class='add'>+		 * Unregister cpufreq cooling once all the CPUs of the policy</div><div class='add'>+		 * are removed.</div><div class='add'>+		 */</div><div class='add'>+		if (cpufreq_thermal_control_enabled(cpufreq_driver)) {</div><div class='add'>+			cpufreq_cooling_unregister(policy-&gt;cdev);</div><div class='add'>+			policy-&gt;cdev = NULL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Unregister cpufreq cooling once all the CPUs of the policy are</div><div class='del'>-	 * removed.</div><div class='del'>-	 */</div><div class='del'>-	if (cpufreq_thermal_control_enabled(cpufreq_driver)) {</div><div class='del'>-		cpufreq_cooling_unregister(policy-&gt;cdev);</div><div class='del'>-		policy-&gt;cdev = NULL;</div><div class='add'>+		/* We did light-weight exit earlier, do full tear down now */</div><div class='add'>+		if (cpufreq_driver-&gt;offline &amp;&amp; cpufreq_driver-&gt;exit)</div><div class='add'>+			cpufreq_driver-&gt;exit(policy);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* We did light-weight exit earlier, do full tear down now */</div><div class='del'>-	if (cpufreq_driver-&gt;offline &amp;&amp; cpufreq_driver-&gt;exit)</div><div class='del'>-		cpufreq_driver-&gt;exit(policy);</div><div class='del'>-</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='del'>-</div><div class='ctx'> 	cpufreq_policy_free(policy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1858,27 +1842,26 @@ static unsigned int cpufreq_verify_current_freq(struct cpufreq_policy *policy, b</div><div class='ctx'>  */</div><div class='ctx'> unsigned int cpufreq_quick_get(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy;</div><div class='del'>-	unsigned int ret_freq = 0;</div><div class='add'>+	struct cpufreq_policy *policy __free(put_cpufreq_policy) = NULL;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	read_lock_irqsave(&amp;cpufreq_driver_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (cpufreq_driver &amp;&amp; cpufreq_driver-&gt;setpolicy &amp;&amp; cpufreq_driver-&gt;get) {</div><div class='del'>-		ret_freq = cpufreq_driver-&gt;get(cpu);</div><div class='add'>+		unsigned int ret_freq = cpufreq_driver-&gt;get(cpu);</div><div class='add'>+</div><div class='ctx'> 		read_unlock_irqrestore(&amp;cpufreq_driver_lock, flags);</div><div class='add'>+</div><div class='ctx'> 		return ret_freq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	read_unlock_irqrestore(&amp;cpufreq_driver_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	policy = cpufreq_cpu_get(cpu);</div><div class='del'>-	if (policy) {</div><div class='del'>-		ret_freq = policy-&gt;cur;</div><div class='del'>-		cpufreq_cpu_put(policy);</div><div class='del'>-	}</div><div class='add'>+	if (policy)</div><div class='add'>+		return policy-&gt;cur;</div><div class='ctx'> </div><div class='del'>-	return ret_freq;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cpufreq_quick_get);</div><div class='ctx'> </div><div class='hunk'>@@ -1890,15 +1873,13 @@ EXPORT_SYMBOL(cpufreq_quick_get);</div><div class='ctx'>  */</div><div class='ctx'> unsigned int cpufreq_quick_get_max(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='del'>-	unsigned int ret_freq = 0;</div><div class='add'>+	struct cpufreq_policy *policy __free(put_cpufreq_policy);</div><div class='ctx'> </div><div class='del'>-	if (policy) {</div><div class='del'>-		ret_freq = policy-&gt;max;</div><div class='del'>-		cpufreq_cpu_put(policy);</div><div class='del'>-	}</div><div class='add'>+	policy = cpufreq_cpu_get(cpu);</div><div class='add'>+	if (policy)</div><div class='add'>+		return policy-&gt;max;</div><div class='ctx'> </div><div class='del'>-	return ret_freq;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cpufreq_quick_get_max);</div><div class='ctx'> </div><div class='hunk'>@@ -1910,15 +1891,13 @@ EXPORT_SYMBOL(cpufreq_quick_get_max);</div><div class='ctx'>  */</div><div class='ctx'> __weak unsigned int cpufreq_get_hw_max_freq(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='del'>-	unsigned int ret_freq = 0;</div><div class='add'>+	struct cpufreq_policy *policy __free(put_cpufreq_policy);</div><div class='ctx'> </div><div class='del'>-	if (policy) {</div><div class='del'>-		ret_freq = policy-&gt;cpuinfo.max_freq;</div><div class='del'>-		cpufreq_cpu_put(policy);</div><div class='del'>-	}</div><div class='add'>+	policy = cpufreq_cpu_get(cpu);</div><div class='add'>+	if (policy)</div><div class='add'>+		return policy-&gt;cpuinfo.max_freq;</div><div class='ctx'> </div><div class='del'>-	return ret_freq;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cpufreq_get_hw_max_freq);</div><div class='ctx'> </div><div class='hunk'>@@ -1938,19 +1917,18 @@ static unsigned int __cpufreq_get(struct cpufreq_policy *policy)</div><div class='ctx'>  */</div><div class='ctx'> unsigned int cpufreq_get(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);</div><div class='del'>-	unsigned int ret_freq = 0;</div><div class='add'>+	struct cpufreq_policy *policy __free(put_cpufreq_policy);</div><div class='ctx'> </div><div class='del'>-	if (policy) {</div><div class='del'>-		down_read(&amp;policy-&gt;rwsem);</div><div class='del'>-		if (cpufreq_driver-&gt;get)</div><div class='del'>-			ret_freq = __cpufreq_get(policy);</div><div class='del'>-		up_read(&amp;policy-&gt;rwsem);</div><div class='add'>+	policy = cpufreq_cpu_get(cpu);</div><div class='add'>+	if (!policy)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-		cpufreq_cpu_put(policy);</div><div class='del'>-	}</div><div class='add'>+	guard(cpufreq_policy_read)(policy);</div><div class='add'>+</div><div class='add'>+	if (cpufreq_driver-&gt;get)</div><div class='add'>+		return __cpufreq_get(policy);</div><div class='ctx'> </div><div class='del'>-	return ret_freq;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cpufreq_get);</div><div class='ctx'> </div><div class='hunk'>@@ -2009,9 +1987,9 @@ void cpufreq_suspend(void)</div><div class='ctx'> </div><div class='ctx'> 	for_each_active_policy(policy) {</div><div class='ctx'> 		if (has_target()) {</div><div class='del'>-			down_write(&amp;policy-&gt;rwsem);</div><div class='del'>-			cpufreq_stop_governor(policy);</div><div class='del'>-			up_write(&amp;policy-&gt;rwsem);</div><div class='add'>+			scoped_guard(cpufreq_policy_write, policy) {</div><div class='add'>+				cpufreq_stop_governor(policy);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (cpufreq_driver-&gt;suspend &amp;&amp; cpufreq_driver-&gt;suspend(policy))</div><div class='hunk'>@@ -2052,9 +2030,9 @@ void cpufreq_resume(void)</div><div class='ctx'> 			pr_err("%s: Failed to resume driver: %s\n", __func__,</div><div class='ctx'> 				cpufreq_driver-&gt;name);</div><div class='ctx'> 		} else if (has_target()) {</div><div class='del'>-			down_write(&amp;policy-&gt;rwsem);</div><div class='del'>-			ret = cpufreq_start_governor(policy);</div><div class='del'>-			up_write(&amp;policy-&gt;rwsem);</div><div class='add'>+			scoped_guard(cpufreq_policy_write, policy) {</div><div class='add'>+				ret = cpufreq_start_governor(policy);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				pr_err("%s: Failed to start governor for CPU%u's policy\n",</div><div class='hunk'>@@ -2384,7 +2362,8 @@ int __cpufreq_driver_target(struct cpufreq_policy *policy,</div><div class='ctx'> 	if (cpufreq_disabled())</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	target_freq = __resolve_freq(policy, target_freq, relation);</div><div class='add'>+	target_freq = __resolve_freq(policy, target_freq, policy-&gt;min,</div><div class='add'>+				     policy-&gt;max, relation);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("target for CPU %u: %u kHz, relation %u, requested %u kHz\n",</div><div class='ctx'> 		 policy-&gt;cpu, target_freq, relation, old_target_freq);</div><div class='hunk'>@@ -2421,15 +2400,9 @@ int cpufreq_driver_target(struct cpufreq_policy *policy,</div><div class='ctx'> 			  unsigned int target_freq,</div><div class='ctx'> 			  unsigned int relation)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	down_write(&amp;policy-&gt;rwsem);</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='ctx'> </div><div class='del'>-	ret = __cpufreq_driver_target(policy, target_freq, relation);</div><div class='del'>-</div><div class='del'>-	up_write(&amp;policy-&gt;rwsem);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return __cpufreq_driver_target(policy, target_freq, relation);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cpufreq_driver_target);</div><div class='ctx'> </div><div class='hunk'>@@ -2601,31 +2574,6 @@ EXPORT_SYMBOL_GPL(cpufreq_unregister_governor);</div><div class='ctx'>  *                          POLICY INTERFACE                         *</div><div class='ctx'>  *********************************************************************/</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * cpufreq_get_policy - get the current cpufreq_policy</div><div class='del'>- * @policy: struct cpufreq_policy into which the current cpufreq_policy</div><div class='del'>- *	is written</div><div class='del'>- * @cpu: CPU to find the policy for</div><div class='del'>- *</div><div class='del'>- * Reads the current cpufreq policy.</div><div class='del'>- */</div><div class='del'>-int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu)</div><div class='del'>-{</div><div class='del'>-	struct cpufreq_policy *cpu_policy;</div><div class='del'>-	if (!policy)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cpu_policy = cpufreq_cpu_get(cpu);</div><div class='del'>-	if (!cpu_policy)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	memcpy(policy, cpu_policy, sizeof(*policy));</div><div class='del'>-</div><div class='del'>-	cpufreq_cpu_put(cpu_policy);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(cpufreq_get_policy);</div><div class='del'>-</div><div class='ctx'> DEFINE_PER_CPU(unsigned long, cpufreq_pressure);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2708,11 +2656,18 @@ static int cpufreq_set_policy(struct cpufreq_policy *policy,</div><div class='ctx'> 	 * Resolve policy min/max to available frequencies. It ensures</div><div class='ctx'> 	 * no frequency resolution will neither overshoot the requested maximum</div><div class='ctx'> 	 * nor undershoot the requested minimum.</div><div class='add'>+	 *</div><div class='add'>+	 * Avoid storing intermediate values in policy-&gt;max or policy-&gt;min and</div><div class='add'>+	 * compiler optimizations around them because they may be accessed</div><div class='add'>+	 * concurrently by cpufreq_driver_resolve_freq() during the update.</div><div class='ctx'> 	 */</div><div class='del'>-	policy-&gt;min = new_data.min;</div><div class='del'>-	policy-&gt;max = new_data.max;</div><div class='del'>-	policy-&gt;min = __resolve_freq(policy, policy-&gt;min, CPUFREQ_RELATION_L);</div><div class='del'>-	policy-&gt;max = __resolve_freq(policy, policy-&gt;max, CPUFREQ_RELATION_H);</div><div class='add'>+	WRITE_ONCE(policy-&gt;max, __resolve_freq(policy, new_data.max,</div><div class='add'>+					       new_data.min, new_data.max,</div><div class='add'>+					       CPUFREQ_RELATION_H));</div><div class='add'>+	new_data.min = __resolve_freq(policy, new_data.min, new_data.min,</div><div class='add'>+				      new_data.max, CPUFREQ_RELATION_L);</div><div class='add'>+	WRITE_ONCE(policy-&gt;min, new_data.min &gt; policy-&gt;max ? policy-&gt;max : new_data.min);</div><div class='add'>+</div><div class='ctx'> 	trace_cpu_frequency_limits(policy);</div><div class='ctx'> </div><div class='ctx'> 	cpufreq_update_pressure(policy);</div><div class='hunk'>@@ -2769,6 +2724,21 @@ static int cpufreq_set_policy(struct cpufreq_policy *policy,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cpufreq_policy_refresh(struct cpufreq_policy *policy)</div><div class='add'>+{</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * BIOS might change freq behind our back</div><div class='add'>+	 * -&gt; ask driver for current freq and notify governors about a change</div><div class='add'>+	 */</div><div class='add'>+	if (cpufreq_driver-&gt;get &amp;&amp; has_target() &amp;&amp;</div><div class='add'>+	    (cpufreq_suspended || WARN_ON(!cpufreq_verify_current_freq(policy, false))))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	refresh_frequency_limits(policy);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * cpufreq_update_policy - Re-evaluate an existing cpufreq policy.</div><div class='ctx'>  * @cpu: CPU to re-evaluate the policy for.</div><div class='hunk'>@@ -2780,23 +2750,13 @@ static int cpufreq_set_policy(struct cpufreq_policy *policy,</div><div class='ctx'>  */</div><div class='ctx'> void cpufreq_update_policy(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpu);</div><div class='add'>+	struct cpufreq_policy *policy __free(put_cpufreq_policy);</div><div class='ctx'> </div><div class='add'>+	policy = cpufreq_cpu_get(cpu);</div><div class='ctx'> 	if (!policy)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * BIOS might change freq behind our back</div><div class='del'>-	 * -&gt; ask driver for current freq and notify governors about a change</div><div class='del'>-	 */</div><div class='del'>-	if (cpufreq_driver-&gt;get &amp;&amp; has_target() &amp;&amp;</div><div class='del'>-	    (cpufreq_suspended || WARN_ON(!cpufreq_verify_current_freq(policy, false))))</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	refresh_frequency_limits(policy);</div><div class='del'>-</div><div class='del'>-unlock:</div><div class='del'>-	cpufreq_cpu_release(policy);</div><div class='add'>+	cpufreq_policy_refresh(policy);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cpufreq_update_policy);</div><div class='ctx'> </div><div class='hunk'>@@ -2805,7 +2765,7 @@ EXPORT_SYMBOL(cpufreq_update_policy);</div><div class='ctx'>  * @cpu: CPU to update the policy limits for.</div><div class='ctx'>  *</div><div class='ctx'>  * Invoke the driver's -&gt;update_limits callback if present or call</div><div class='del'>- * cpufreq_update_policy() for @cpu.</div><div class='add'>+ * cpufreq_policy_refresh() for @cpu.</div><div class='ctx'>  */</div><div class='ctx'> void cpufreq_update_limits(unsigned int cpu)</div><div class='ctx'> {</div><div class='hunk'>@@ -2816,9 +2776,9 @@ void cpufreq_update_limits(unsigned int cpu)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (cpufreq_driver-&gt;update_limits)</div><div class='del'>-		cpufreq_driver-&gt;update_limits(cpu);</div><div class='add'>+		cpufreq_driver-&gt;update_limits(policy);</div><div class='ctx'> 	else</div><div class='del'>-		cpufreq_update_policy(cpu);</div><div class='add'>+		cpufreq_policy_refresh(policy);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cpufreq_update_limits);</div><div class='ctx'> </div><div class='hunk'>@@ -2852,8 +2812,10 @@ static int cpufreq_boost_trigger_state(int state)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (cpufreq_driver-&gt;boost_enabled == state)</div><div class='del'>-		return 0;</div><div class='add'>+	/*</div><div class='add'>+	 * Don't compare 'cpufreq_driver-&gt;boost_enabled' with 'state' here to</div><div class='add'>+	 * make sure all policies are in sync with global boost flag.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	write_lock_irqsave(&amp;cpufreq_driver_lock, flags);</div><div class='ctx'> 	cpufreq_driver-&gt;boost_enabled = state;</div><div class='hunk'>@@ -2864,12 +2826,9 @@ static int cpufreq_boost_trigger_state(int state)</div><div class='ctx'> 		if (!policy-&gt;boost_supported)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		policy-&gt;boost_enabled = state;</div><div class='del'>-		ret = cpufreq_driver-&gt;set_boost(policy, state);</div><div class='del'>-		if (ret) {</div><div class='del'>-			policy-&gt;boost_enabled = !policy-&gt;boost_enabled;</div><div class='add'>+		ret = policy_set_boost(policy, state);</div><div class='add'>+		if (ret)</div><div class='ctx'> 			goto err_reset_state;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> 	cpus_read_unlock();</div><div class='ctx'> </div><div class='hunk'>@@ -3094,6 +3053,36 @@ static int __init cpufreq_core_init(void)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static bool cpufreq_policy_is_good_for_eas(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	struct cpufreq_policy *policy __free(put_cpufreq_policy);</div><div class='add'>+</div><div class='add'>+	policy = cpufreq_cpu_get(cpu);</div><div class='add'>+	if (!policy) {</div><div class='add'>+		pr_debug("cpufreq policy not set for CPU: %d\n", cpu);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sugov_is_governor(policy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool cpufreq_ready_for_eas(const struct cpumask *cpu_mask)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+</div><div class='add'>+	/* Do not attempt EAS if schedutil is not being used. */</div><div class='add'>+	for_each_cpu(cpu, cpu_mask) {</div><div class='add'>+		if (!cpufreq_policy_is_good_for_eas(cpu)) {</div><div class='add'>+			pr_debug("rd %*pbl: schedutil is mandatory for EAS\n",</div><div class='add'>+				 cpumask_pr_args(cpu_mask));</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> module_param(off, int, 0444);</div><div class='ctx'> module_param_string(default_governor, default_governor, CPUFREQ_NAME_LEN, 0444);</div><div class='ctx'> core_initcall(cpufreq_core_init);</div><div class='head'>diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c<br/>index a7c38b8b3e78..0e65d37c9231 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq_ondemand.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/cpufreq_ondemand.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/cpufreq_ondemand.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/cpufreq_ondemand.c</a></div><div class='hunk'>@@ -76,7 +76,8 @@ static unsigned int generic_powersave_bias_target(struct cpufreq_policy *policy,</div><div class='ctx'> 		return freq_next;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	index = cpufreq_frequency_table_target(policy, freq_next, relation);</div><div class='add'>+	index = cpufreq_frequency_table_target(policy, freq_next, policy-&gt;min,</div><div class='add'>+					       policy-&gt;max, relation);</div><div class='ctx'> 	freq_req = freq_table[index].frequency;</div><div class='ctx'> 	freq_reduc = freq_req * od_tuners-&gt;powersave_bias / 1000;</div><div class='ctx'> 	freq_avg = freq_req - freq_reduc;</div><div class='head'>diff --git a/drivers/cpufreq/e_powersaver.c b/drivers/cpufreq/e_powersaver.c<br/>index d23a97ba6478..320a0af2266a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/e_powersaver.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/e_powersaver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/e_powersaver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/e_powersaver.c</a></div><div class='hunk'>@@ -225,12 +225,12 @@ static int eps_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Enable Enhanced PowerSaver */</div><div class='del'>-	rdmsrl(MSR_IA32_MISC_ENABLE, val);</div><div class='add'>+	rdmsrq(MSR_IA32_MISC_ENABLE, val);</div><div class='ctx'> 	if (!(val &amp; MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {</div><div class='ctx'> 		val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;</div><div class='del'>-		wrmsrl(MSR_IA32_MISC_ENABLE, val);</div><div class='add'>+		wrmsrq(MSR_IA32_MISC_ENABLE, val);</div><div class='ctx'> 		/* Can be locked at 0 */</div><div class='del'>-		rdmsrl(MSR_IA32_MISC_ENABLE, val);</div><div class='add'>+		rdmsrq(MSR_IA32_MISC_ENABLE, val);</div><div class='ctx'> 		if (!(val &amp; MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {</div><div class='ctx'> 			pr_info("Can't enable Enhanced PowerSaver\n");</div><div class='ctx'> 			return -ENODEV;</div><div class='head'>diff --git a/drivers/cpufreq/elanfreq.c b/drivers/cpufreq/elanfreq.c<br/>index 36494b855e41..fc5a58088b35 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/elanfreq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/elanfreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/elanfreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/elanfreq.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;linux/cpufreq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include &lt;linux/timex.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c<br/>index c03a91502f84..35de513af6c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/freq_table.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/freq_table.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/freq_table.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/freq_table.c</a></div><div class='hunk'>@@ -115,8 +115,8 @@ int cpufreq_generic_frequency_table_verify(struct cpufreq_policy_data *policy)</div><div class='ctx'> EXPORT_SYMBOL_GPL(cpufreq_generic_frequency_table_verify);</div><div class='ctx'> </div><div class='ctx'> int cpufreq_table_index_unsorted(struct cpufreq_policy *policy,</div><div class='del'>-				 unsigned int target_freq,</div><div class='del'>-				 unsigned int relation)</div><div class='add'>+				 unsigned int target_freq, unsigned int min,</div><div class='add'>+				 unsigned int max, unsigned int relation)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpufreq_frequency_table optimal = {</div><div class='ctx'> 		.driver_data = ~0,</div><div class='hunk'>@@ -147,7 +147,7 @@ int cpufreq_table_index_unsorted(struct cpufreq_policy *policy,</div><div class='ctx'> 	cpufreq_for_each_valid_entry_idx(pos, table, i) {</div><div class='ctx'> 		freq = pos-&gt;frequency;</div><div class='ctx'> </div><div class='del'>-		if ((freq &lt; policy-&gt;min) || (freq &gt; policy-&gt;max))</div><div class='add'>+		if (freq &lt; min || freq &gt; max)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (freq == target_freq) {</div><div class='ctx'> 			optimal.driver_data = i;</div><div class='head'>diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c<br/>index 4aad79d26c64..64587d318267 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/intel_pstate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/intel_pstate.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/intel_pstate.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/intel_pstate.c</a></div><div class='hunk'>@@ -221,6 +221,7 @@ struct global_params {</div><div class='ctx'>  * @sched_flags:	Store scheduler flags for possible cross CPU update</div><div class='ctx'>  * @hwp_boost_min:	Last HWP boosted min performance</div><div class='ctx'>  * @suspended:		Whether or not the driver has been suspended.</div><div class='add'>+ * @pd_registered:	Set when a perf domain is registered for this CPU.</div><div class='ctx'>  * @hwp_notify_work:	workqueue for HWP notifications.</div><div class='ctx'>  *</div><div class='ctx'>  * This structure stores per CPU instance data for all CPUs.</div><div class='hunk'>@@ -260,6 +261,9 @@ struct cpudata {</div><div class='ctx'> 	unsigned int sched_flags;</div><div class='ctx'> 	u32 hwp_boost_min;</div><div class='ctx'> 	bool suspended;</div><div class='add'>+#ifdef CONFIG_ENERGY_MODEL</div><div class='add'>+	bool pd_registered;</div><div class='add'>+#endif</div><div class='ctx'> 	struct delayed_work hwp_notify_work;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -303,6 +307,7 @@ static bool hwp_is_hybrid;</div><div class='ctx'> </div><div class='ctx'> static struct cpufreq_driver *intel_pstate_driver __read_mostly;</div><div class='ctx'> </div><div class='add'>+#define INTEL_PSTATE_CORE_SCALING	100000</div><div class='ctx'> #define HYBRID_SCALING_FACTOR_ADL	78741</div><div class='ctx'> #define HYBRID_SCALING_FACTOR_MTL	80000</div><div class='ctx'> #define HYBRID_SCALING_FACTOR_LNL	86957</div><div class='hunk'>@@ -311,7 +316,7 @@ static int hybrid_scaling_factor;</div><div class='ctx'> </div><div class='ctx'> static inline int core_get_scaling(void)</div><div class='ctx'> {</div><div class='del'>-	return 100000;</div><div class='add'>+	return INTEL_PSTATE_CORE_SCALING;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='hunk'>@@ -598,7 +603,10 @@ static bool turbo_is_disabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 misc_en;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_MISC_ENABLE, misc_en);</div><div class='add'>+	if (!cpu_feature_enabled(X86_FEATURE_IDA))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	rdmsrq(MSR_IA32_MISC_ENABLE, misc_en);</div><div class='ctx'> </div><div class='ctx'> 	return !!(misc_en &amp; MSR_IA32_MISC_ENABLE_TURBO_DISABLE);</div><div class='ctx'> }</div><div class='hunk'>@@ -620,7 +628,7 @@ static s16 intel_pstate_get_epb(struct cpudata *cpu_data)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_EPB))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	ret = rdmsrl_on_cpu(cpu_data-&gt;cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='add'>+	ret = rdmsrq_on_cpu(cpu_data-&gt;cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return (s16)ret;</div><div class='ctx'> </div><div class='hunk'>@@ -637,7 +645,7 @@ static s16 intel_pstate_get_epp(struct cpudata *cpu_data, u64 hwp_req_data)</div><div class='ctx'> 		 * MSR_HWP_REQUEST, so need to read and get EPP.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!hwp_req_data) {</div><div class='del'>-			epp = rdmsrl_on_cpu(cpu_data-&gt;cpu, MSR_HWP_REQUEST,</div><div class='add'>+			epp = rdmsrq_on_cpu(cpu_data-&gt;cpu, MSR_HWP_REQUEST,</div><div class='ctx'> 					    &amp;hwp_req_data);</div><div class='ctx'> 			if (epp)</div><div class='ctx'> 				return epp;</div><div class='hunk'>@@ -659,12 +667,12 @@ static int intel_pstate_set_epb(int cpu, s16 pref)</div><div class='ctx'> 	if (!boot_cpu_has(X86_FEATURE_EPB))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	ret = rdmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='add'>+	ret = rdmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &amp;epb);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	epb = (epb &amp; ~0x0f) | pref;</div><div class='del'>-	wrmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, epb);</div><div class='add'>+	wrmsrq_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, epb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -762,7 +770,7 @@ static int intel_pstate_set_epp(struct cpudata *cpu, u32 epp)</div><div class='ctx'> 	 * function, so it cannot run in parallel with the update below.</div><div class='ctx'> 	 */</div><div class='ctx'> 	WRITE_ONCE(cpu-&gt;hwp_req_cached, value);</div><div class='del'>-	ret = wrmsrl_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='add'>+	ret = wrmsrq_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		cpu-&gt;epp_cached = epp;</div><div class='ctx'> </div><div class='hunk'>@@ -916,7 +924,7 @@ static ssize_t show_base_frequency(struct cpufreq_policy *policy, char *buf)</div><div class='ctx'> 	if (ratio &lt;= 0) {</div><div class='ctx'> 		u64 cap;</div><div class='ctx'> </div><div class='del'>-		rdmsrl_on_cpu(policy-&gt;cpu, MSR_HWP_CAPABILITIES, &amp;cap);</div><div class='add'>+		rdmsrq_on_cpu(policy-&gt;cpu, MSR_HWP_CAPABILITIES, &amp;cap);</div><div class='ctx'> 		ratio = HWP_GUARANTEED_PERF(cap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -945,12 +953,124 @@ static struct cpudata *hybrid_max_perf_cpu __read_mostly;</div><div class='ctx'>  */</div><div class='ctx'> static DEFINE_MUTEX(hybrid_capacity_lock);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_ENERGY_MODEL</div><div class='add'>+#define HYBRID_EM_STATE_COUNT	4</div><div class='add'>+</div><div class='add'>+static int hybrid_active_power(struct device *dev, unsigned long *power,</div><div class='add'>+			       unsigned long *freq)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Create "utilization bins" of 0-40%, 40%-60%, 60%-80%, and 80%-100%</div><div class='add'>+	 * of the maximum capacity such that two CPUs of the same type will be</div><div class='add'>+	 * regarded as equally attractive if the utilization of each of them</div><div class='add'>+	 * falls into the same bin, which should prevent tasks from being</div><div class='add'>+	 * migrated between them too often.</div><div class='add'>+	 *</div><div class='add'>+	 * For this purpose, return the "frequency" of 2 for the first</div><div class='add'>+	 * performance level and otherwise leave the value set by the caller.</div><div class='add'>+	 */</div><div class='add'>+	if (!*freq)</div><div class='add'>+		*freq = 2;</div><div class='add'>+</div><div class='add'>+	/* No power information. */</div><div class='add'>+	*power = EM_MAX_POWER;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hybrid_get_cost(struct device *dev, unsigned long freq,</div><div class='add'>+			   unsigned long *cost)</div><div class='add'>+{</div><div class='add'>+	struct pstate_data *pstate = &amp;all_cpu_data[dev-&gt;id]-&gt;pstate;</div><div class='add'>+	struct cpu_cacheinfo *cacheinfo = get_cpu_cacheinfo(dev-&gt;id);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The smaller the perf-to-frequency scaling factor, the larger the IPC</div><div class='add'>+	 * ratio between the given CPU and the least capable CPU in the system.</div><div class='add'>+	 * Regard that IPC ratio as the primary cost component and assume that</div><div class='add'>+	 * the scaling factors for different CPU types will differ by at least</div><div class='add'>+	 * 5% and they will not be above INTEL_PSTATE_CORE_SCALING.</div><div class='add'>+	 *</div><div class='add'>+	 * Add the freq value to the cost, so that the cost of running on CPUs</div><div class='add'>+	 * of the same type in different "utilization bins" is different.</div><div class='add'>+	 */</div><div class='add'>+	*cost = div_u64(100ULL * INTEL_PSTATE_CORE_SCALING, pstate-&gt;scaling) + freq;</div><div class='add'>+	/*</div><div class='add'>+	 * Increase the cost slightly for CPUs able to access L3 to avoid</div><div class='add'>+	 * touching it in case some other CPUs of the same type can do the work</div><div class='add'>+	 * without it.</div><div class='add'>+	 */</div><div class='add'>+	if (cacheinfo) {</div><div class='add'>+		unsigned int i;</div><div class='add'>+</div><div class='add'>+		/* Check if L3 cache is there. */</div><div class='add'>+		for (i = 0; i &lt; cacheinfo-&gt;num_leaves; i++) {</div><div class='add'>+			if (cacheinfo-&gt;info_list[i].level == 3) {</div><div class='add'>+				*cost += 2;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hybrid_register_perf_domain(unsigned int cpu)</div><div class='add'>+{</div><div class='add'>+	static const struct em_data_callback cb</div><div class='add'>+			= EM_ADV_DATA_CB(hybrid_active_power, hybrid_get_cost);</div><div class='add'>+	struct cpudata *cpudata = all_cpu_data[cpu];</div><div class='add'>+	struct device *cpu_dev;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Registering EM perf domains without enabling asymmetric CPU capacity</div><div class='add'>+	 * support is not really useful and one domain should not be registered</div><div class='add'>+	 * more than once.</div><div class='add'>+	 */</div><div class='add'>+	if (!hybrid_max_perf_cpu || cpudata-&gt;pd_registered)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	cpu_dev = get_cpu_device(cpu);</div><div class='add'>+	if (!cpu_dev)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (em_dev_register_perf_domain(cpu_dev, HYBRID_EM_STATE_COUNT, &amp;cb,</div><div class='add'>+					cpumask_of(cpu), false))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	cpudata-&gt;pd_registered = true;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hybrid_register_all_perf_domains(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+</div><div class='add'>+	for_each_online_cpu(cpu)</div><div class='add'>+		hybrid_register_perf_domain(cpu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hybrid_update_perf_domain(struct cpudata *cpu)</div><div class='add'>+{</div><div class='add'>+	if (cpu-&gt;pd_registered)</div><div class='add'>+		em_adjust_cpu_capacity(cpu-&gt;cpu);</div><div class='add'>+}</div><div class='add'>+#else /* !CONFIG_ENERGY_MODEL */</div><div class='add'>+static inline bool hybrid_register_perf_domain(unsigned int cpu) { return false; }</div><div class='add'>+static inline void hybrid_register_all_perf_domains(void) {}</div><div class='add'>+static inline void hybrid_update_perf_domain(struct cpudata *cpu) {}</div><div class='add'>+#endif /* CONFIG_ENERGY_MODEL */</div><div class='add'>+</div><div class='ctx'> static void hybrid_set_cpu_capacity(struct cpudata *cpu)</div><div class='ctx'> {</div><div class='ctx'> 	arch_set_cpu_capacity(cpu-&gt;cpu, cpu-&gt;capacity_perf,</div><div class='ctx'> 			      hybrid_max_perf_cpu-&gt;capacity_perf,</div><div class='ctx'> 			      cpu-&gt;capacity_perf,</div><div class='ctx'> 			      cpu-&gt;pstate.max_pstate_physical);</div><div class='add'>+	hybrid_update_perf_domain(cpu);</div><div class='add'>+</div><div class='add'>+	topology_set_cpu_scale(cpu-&gt;cpu, arch_scale_cpu_capacity(cpu-&gt;cpu));</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("CPU%d: perf = %u, max. perf = %u, base perf = %d\n", cpu-&gt;cpu,</div><div class='ctx'> 		 cpu-&gt;capacity_perf, hybrid_max_perf_cpu-&gt;capacity_perf,</div><div class='hunk'>@@ -1039,6 +1159,11 @@ static void hybrid_refresh_cpu_capacity_scaling(void)</div><div class='ctx'> 	guard(mutex)(&amp;hybrid_capacity_lock);</div><div class='ctx'> </div><div class='ctx'> 	__hybrid_refresh_cpu_capacity_scaling();</div><div class='add'>+	/*</div><div class='add'>+	 * Perf domains are not registered before setting hybrid_max_perf_cpu,</div><div class='add'>+	 * so register them all after setting up CPU capacity scaling.</div><div class='add'>+	 */</div><div class='add'>+	hybrid_register_all_perf_domains();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hybrid_init_cpu_capacity_scaling(bool refresh)</div><div class='hunk'>@@ -1066,7 +1191,7 @@ static void hybrid_init_cpu_capacity_scaling(bool refresh)</div><div class='ctx'> 		hybrid_refresh_cpu_capacity_scaling();</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Disabling ITMT causes sched domains to be rebuilt to disable asym</div><div class='del'>-		 * packing and enable asym capacity.</div><div class='add'>+		 * packing and enable asym capacity and EAS.</div><div class='ctx'> 		 */</div><div class='ctx'> 		sched_clear_itmt_support();</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1088,7 +1213,7 @@ static void __intel_pstate_get_hwp_cap(struct cpudata *cpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cap;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_on_cpu(cpu-&gt;cpu, MSR_HWP_CAPABILITIES, &amp;cap);</div><div class='add'>+	rdmsrq_on_cpu(cpu-&gt;cpu, MSR_HWP_CAPABILITIES, &amp;cap);</div><div class='ctx'> 	WRITE_ONCE(cpu-&gt;hwp_cap_cached, cap);</div><div class='ctx'> 	cpu-&gt;pstate.max_pstate = HWP_GUARANTEED_PERF(cap);</div><div class='ctx'> 	cpu-&gt;pstate.turbo_pstate = HWP_HIGHEST_PERF(cap);</div><div class='hunk'>@@ -1144,6 +1269,14 @@ static void hybrid_update_capacity(struct cpudata *cpu)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hybrid_set_cpu_capacity(cpu);</div><div class='add'>+	/*</div><div class='add'>+	 * If the CPU was offline to start with and it is going online for the</div><div class='add'>+	 * first time, a perf domain needs to be registered for it if hybrid</div><div class='add'>+	 * capacity scaling has been enabled already.  In that case, sched</div><div class='add'>+	 * domains need to be rebuilt to take the new perf domain into account.</div><div class='add'>+	 */</div><div class='add'>+	if (hybrid_register_perf_domain(cpu-&gt;cpu))</div><div class='add'>+		em_rebuild_sched_domains();</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;hybrid_capacity_lock);</div><div class='hunk'>@@ -1162,7 +1295,7 @@ static void intel_pstate_hwp_set(unsigned int cpu)</div><div class='ctx'> 	if (cpu_data-&gt;policy == CPUFREQ_POLICY_PERFORMANCE)</div><div class='ctx'> 		min = max;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_on_cpu(cpu, MSR_HWP_REQUEST, &amp;value);</div><div class='add'>+	rdmsrq_on_cpu(cpu, MSR_HWP_REQUEST, &amp;value);</div><div class='ctx'> </div><div class='ctx'> 	value &amp;= ~HWP_MIN_PERF(~0L);</div><div class='ctx'> 	value |= HWP_MIN_PERF(min);</div><div class='hunk'>@@ -1209,7 +1342,7 @@ static void intel_pstate_hwp_set(unsigned int cpu)</div><div class='ctx'> 	}</div><div class='ctx'> skip_epp:</div><div class='ctx'> 	WRITE_ONCE(cpu_data-&gt;hwp_req_cached, value);</div><div class='del'>-	wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);</div><div class='add'>+	wrmsrq_on_cpu(cpu, MSR_HWP_REQUEST, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata);</div><div class='hunk'>@@ -1256,7 +1389,7 @@ static void intel_pstate_hwp_offline(struct cpudata *cpu)</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_HWP_EPP))</div><div class='ctx'> 		value |= HWP_ENERGY_PERF_PREFERENCE(HWP_EPP_POWERSAVE);</div><div class='ctx'> </div><div class='del'>-	wrmsrl_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='add'>+	wrmsrq_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;hybrid_capacity_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1285,7 +1418,7 @@ static void set_power_ctl_ee_state(bool input)</div><div class='ctx'> 	u64 power_ctl;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;intel_pstate_driver_lock);</div><div class='del'>-	rdmsrl(MSR_IA32_POWER_CTL, power_ctl);</div><div class='add'>+	rdmsrq(MSR_IA32_POWER_CTL, power_ctl);</div><div class='ctx'> 	if (input) {</div><div class='ctx'> 		power_ctl &amp;= ~BIT(MSR_IA32_POWER_CTL_BIT_EE);</div><div class='ctx'> 		power_ctl_ee_state = POWER_CTL_EE_ENABLE;</div><div class='hunk'>@@ -1293,7 +1426,7 @@ static void set_power_ctl_ee_state(bool input)</div><div class='ctx'> 		power_ctl |= BIT(MSR_IA32_POWER_CTL_BIT_EE);</div><div class='ctx'> 		power_ctl_ee_state = POWER_CTL_EE_DISABLE;</div><div class='ctx'> 	}</div><div class='del'>-	wrmsrl(MSR_IA32_POWER_CTL, power_ctl);</div><div class='add'>+	wrmsrq(MSR_IA32_POWER_CTL, power_ctl);</div><div class='ctx'> 	mutex_unlock(&amp;intel_pstate_driver_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1302,7 +1435,7 @@ static void intel_pstate_hwp_enable(struct cpudata *cpudata);</div><div class='ctx'> static void intel_pstate_hwp_reenable(struct cpudata *cpu)</div><div class='ctx'> {</div><div class='ctx'> 	intel_pstate_hwp_enable(cpu);</div><div class='del'>-	wrmsrl_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, READ_ONCE(cpu-&gt;hwp_req_cached));</div><div class='add'>+	wrmsrq_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, READ_ONCE(cpu-&gt;hwp_req_cached));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int intel_pstate_suspend(struct cpufreq_policy *policy)</div><div class='hunk'>@@ -1353,9 +1486,11 @@ static void intel_pstate_update_policies(void)</div><div class='ctx'> 		cpufreq_update_policy(cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __intel_pstate_update_max_freq(struct cpudata *cpudata,</div><div class='del'>-					   struct cpufreq_policy *policy)</div><div class='add'>+static void __intel_pstate_update_max_freq(struct cpufreq_policy *policy,</div><div class='add'>+					   struct cpudata *cpudata)</div><div class='ctx'> {</div><div class='add'>+	guard(cpufreq_policy_write)(policy);</div><div class='add'>+</div><div class='ctx'> 	if (hwp_active)</div><div class='ctx'> 		intel_pstate_get_hwp_cap(cpudata);</div><div class='ctx'> </div><div class='hunk'>@@ -1365,42 +1500,34 @@ static void __intel_pstate_update_max_freq(struct cpudata *cpudata,</div><div class='ctx'> 	refresh_frequency_limits(policy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_pstate_update_limits(unsigned int cpu)</div><div class='add'>+static bool intel_pstate_update_max_freq(struct cpudata *cpudata)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpu);</div><div class='del'>-	struct cpudata *cpudata;</div><div class='add'>+	struct cpufreq_policy *policy __free(put_cpufreq_policy);</div><div class='ctx'> </div><div class='add'>+	policy = cpufreq_cpu_get(cpudata-&gt;cpu);</div><div class='ctx'> 	if (!policy)</div><div class='del'>-		return;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	cpudata = all_cpu_data[cpu];</div><div class='add'>+	__intel_pstate_update_max_freq(policy, cpudata);</div><div class='ctx'> </div><div class='del'>-	__intel_pstate_update_max_freq(cpudata, policy);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Prevent the driver from being unregistered now. */</div><div class='del'>-	mutex_lock(&amp;intel_pstate_driver_lock);</div><div class='add'>+static void intel_pstate_update_limits(struct cpufreq_policy *policy)</div><div class='add'>+{</div><div class='add'>+	struct cpudata *cpudata = all_cpu_data[policy-&gt;cpu];</div><div class='ctx'> </div><div class='del'>-	cpufreq_cpu_release(policy);</div><div class='add'>+	__intel_pstate_update_max_freq(policy, cpudata);</div><div class='ctx'> </div><div class='ctx'> 	hybrid_update_capacity(cpudata);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;intel_pstate_driver_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pstate_update_limits_for_all(void)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='del'>-	for_each_possible_cpu(cpu) {</div><div class='del'>-		struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpu);</div><div class='del'>-</div><div class='del'>-		if (!policy)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		__intel_pstate_update_max_freq(all_cpu_data[cpu], policy);</div><div class='del'>-</div><div class='del'>-		cpufreq_cpu_release(policy);</div><div class='del'>-	}</div><div class='add'>+	for_each_possible_cpu(cpu)</div><div class='add'>+		intel_pstate_update_max_freq(all_cpu_data[cpu]);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;hybrid_capacity_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1703,7 +1830,7 @@ static ssize_t show_energy_efficiency(struct kobject *kobj, struct kobj_attribut</div><div class='ctx'> 	u64 power_ctl;</div><div class='ctx'> 	int enable;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_IA32_POWER_CTL, power_ctl);</div><div class='add'>+	rdmsrq(MSR_IA32_POWER_CTL, power_ctl);</div><div class='ctx'> 	enable = !!(power_ctl &amp; BIT(MSR_IA32_POWER_CTL_BIT_EE));</div><div class='ctx'> 	return sprintf(buf, "%d\n", !enable);</div><div class='ctx'> }</div><div class='hunk'>@@ -1840,13 +1967,8 @@ static void intel_pstate_notify_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpudata *cpudata =</div><div class='ctx'> 		container_of(to_delayed_work(work), struct cpudata, hwp_notify_work);</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_acquire(cpudata-&gt;cpu);</div><div class='del'>-</div><div class='del'>-	if (policy) {</div><div class='del'>-		__intel_pstate_update_max_freq(cpudata, policy);</div><div class='del'>-</div><div class='del'>-		cpufreq_cpu_release(policy);</div><div class='ctx'> </div><div class='add'>+	if (intel_pstate_update_max_freq(cpudata)) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The driver will not be unregistered while this function is</div><div class='ctx'> 		 * running, so update the capacity without acquiring the driver</div><div class='hunk'>@@ -1855,7 +1977,7 @@ static void intel_pstate_notify_work(struct work_struct *work)</div><div class='ctx'> 		hybrid_update_capacity(cpudata);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_HWP_STATUS, 0);</div><div class='add'>+	wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_HWP_STATUS, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static DEFINE_RAW_SPINLOCK(hwp_notify_lock);</div><div class='hunk'>@@ -1877,7 +1999,7 @@ void notify_hwp_interrupt(void)</div><div class='ctx'> 	if (cpu_feature_enabled(X86_FEATURE_HWP_HIGHEST_PERF_CHANGE))</div><div class='ctx'> 		status_mask |= HWP_HIGHEST_PERF_CHANGE_STATUS;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_safe(MSR_HWP_STATUS, &amp;value);</div><div class='add'>+	rdmsrq_safe(MSR_HWP_STATUS, &amp;value);</div><div class='ctx'> 	if (!(value &amp; status_mask))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1894,7 +2016,7 @@ void notify_hwp_interrupt(void)</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> ack_intr:</div><div class='del'>-	wrmsrl_safe(MSR_HWP_STATUS, 0);</div><div class='add'>+	wrmsrq_safe(MSR_HWP_STATUS, 0);</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;hwp_notify_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1905,8 +2027,8 @@ static void intel_pstate_disable_hwp_interrupt(struct cpudata *cpudata)</div><div class='ctx'> 	if (!cpu_feature_enabled(X86_FEATURE_HWP_NOTIFY))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */</div><div class='del'>-	wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, 0x00);</div><div class='add'>+	/* wrmsrq_on_cpu has to be outside spinlock as this can result in IPC */</div><div class='add'>+	wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, 0x00);</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_irq(&amp;hwp_notify_lock);</div><div class='ctx'> 	cancel_work = cpumask_test_and_clear_cpu(cpudata-&gt;cpu, &amp;hwp_intr_enable_mask);</div><div class='hunk'>@@ -1933,9 +2055,9 @@ static void intel_pstate_enable_hwp_interrupt(struct cpudata *cpudata)</div><div class='ctx'> 		if (cpu_feature_enabled(X86_FEATURE_HWP_HIGHEST_PERF_CHANGE))</div><div class='ctx'> 			interrupt_mask |= HWP_HIGHEST_PERF_CHANGE_REQ;</div><div class='ctx'> </div><div class='del'>-		/* wrmsrl_on_cpu has to be outside spinlock as this can result in IPC */</div><div class='del'>-		wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, interrupt_mask);</div><div class='del'>-		wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_HWP_STATUS, 0);</div><div class='add'>+		/* wrmsrq_on_cpu has to be outside spinlock as this can result in IPC */</div><div class='add'>+		wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, interrupt_mask);</div><div class='add'>+		wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_HWP_STATUS, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1974,9 +2096,9 @@ static void intel_pstate_hwp_enable(struct cpudata *cpudata)</div><div class='ctx'> {</div><div class='ctx'> 	/* First disable HWP notification interrupt till we activate again */</div><div class='ctx'> 	if (boot_cpu_has(X86_FEATURE_HWP_NOTIFY))</div><div class='del'>-		wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, 0x00);</div><div class='add'>+		wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_HWP_INTERRUPT, 0x00);</div><div class='ctx'> </div><div class='del'>-	wrmsrl_on_cpu(cpudata-&gt;cpu, MSR_PM_ENABLE, 0x1);</div><div class='add'>+	wrmsrq_on_cpu(cpudata-&gt;cpu, MSR_PM_ENABLE, 0x1);</div><div class='ctx'> </div><div class='ctx'> 	intel_pstate_enable_hwp_interrupt(cpudata);</div><div class='ctx'> </div><div class='hunk'>@@ -1990,7 +2112,7 @@ static int atom_get_min_pstate(int not_used)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_ATOM_CORE_RATIOS, value);</div><div class='add'>+	rdmsrq(MSR_ATOM_CORE_RATIOS, value);</div><div class='ctx'> 	return (value &gt;&gt; 8) &amp; 0x7F;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1998,7 +2120,7 @@ static int atom_get_max_pstate(int not_used)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_ATOM_CORE_RATIOS, value);</div><div class='add'>+	rdmsrq(MSR_ATOM_CORE_RATIOS, value);</div><div class='ctx'> 	return (value &gt;&gt; 16) &amp; 0x7F;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2006,7 +2128,7 @@ static int atom_get_turbo_pstate(int not_used)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_ATOM_CORE_TURBO_RATIOS, value);</div><div class='add'>+	rdmsrq(MSR_ATOM_CORE_TURBO_RATIOS, value);</div><div class='ctx'> 	return value &amp; 0x7F;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2041,7 +2163,7 @@ static int silvermont_get_scaling(void)</div><div class='ctx'> 	static int silvermont_freq_table[] = {</div><div class='ctx'> 		83300, 100000, 133300, 116700, 80000};</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_FSB_FREQ, value);</div><div class='add'>+	rdmsrq(MSR_FSB_FREQ, value);</div><div class='ctx'> 	i = value &amp; 0x7;</div><div class='ctx'> 	WARN_ON(i &gt; 4);</div><div class='ctx'> </div><div class='hunk'>@@ -2057,7 +2179,7 @@ static int airmont_get_scaling(void)</div><div class='ctx'> 		83300, 100000, 133300, 116700, 80000,</div><div class='ctx'> 		93300, 90000, 88900, 87500};</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_FSB_FREQ, value);</div><div class='add'>+	rdmsrq(MSR_FSB_FREQ, value);</div><div class='ctx'> 	i = value &amp; 0xF;</div><div class='ctx'> 	WARN_ON(i &gt; 8);</div><div class='ctx'> </div><div class='hunk'>@@ -2068,7 +2190,7 @@ static void atom_get_vid(struct cpudata *cpudata)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_ATOM_CORE_VIDS, value);</div><div class='add'>+	rdmsrq(MSR_ATOM_CORE_VIDS, value);</div><div class='ctx'> 	cpudata-&gt;vid.min = int_tofp((value &gt;&gt; 8) &amp; 0x7f);</div><div class='ctx'> 	cpudata-&gt;vid.max = int_tofp((value &gt;&gt; 16) &amp; 0x7f);</div><div class='ctx'> 	cpudata-&gt;vid.ratio = div_fp(</div><div class='hunk'>@@ -2076,7 +2198,7 @@ static void atom_get_vid(struct cpudata *cpudata)</div><div class='ctx'> 		int_tofp(cpudata-&gt;pstate.max_pstate -</div><div class='ctx'> 			cpudata-&gt;pstate.min_pstate));</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_ATOM_CORE_TURBO_VIDS, value);</div><div class='add'>+	rdmsrq(MSR_ATOM_CORE_TURBO_VIDS, value);</div><div class='ctx'> 	cpudata-&gt;vid.turbo = value &amp; 0x7f;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2084,7 +2206,7 @@ static int core_get_min_pstate(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_on_cpu(cpu, MSR_PLATFORM_INFO, &amp;value);</div><div class='add'>+	rdmsrq_on_cpu(cpu, MSR_PLATFORM_INFO, &amp;value);</div><div class='ctx'> 	return (value &gt;&gt; 40) &amp; 0xFF;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2092,7 +2214,7 @@ static int core_get_max_pstate_physical(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_on_cpu(cpu, MSR_PLATFORM_INFO, &amp;value);</div><div class='add'>+	rdmsrq_on_cpu(cpu, MSR_PLATFORM_INFO, &amp;value);</div><div class='ctx'> 	return (value &gt;&gt; 8) &amp; 0xFF;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2106,13 +2228,13 @@ static int core_get_tdp_ratio(int cpu, u64 plat_info)</div><div class='ctx'> 		int err;</div><div class='ctx'> </div><div class='ctx'> 		/* Get the TDP level (0, 1, 2) to get ratios */</div><div class='del'>-		err = rdmsrl_safe_on_cpu(cpu, MSR_CONFIG_TDP_CONTROL, &amp;tdp_ctrl);</div><div class='add'>+		err = rdmsrq_safe_on_cpu(cpu, MSR_CONFIG_TDP_CONTROL, &amp;tdp_ctrl);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='ctx'> 		/* TDP MSR are continuous starting at 0x648 */</div><div class='ctx'> 		tdp_msr = MSR_CONFIG_TDP_NOMINAL + (tdp_ctrl &amp; 0x03);</div><div class='del'>-		err = rdmsrl_safe_on_cpu(cpu, tdp_msr, &amp;tdp_ratio);</div><div class='add'>+		err = rdmsrq_safe_on_cpu(cpu, tdp_msr, &amp;tdp_ratio);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='hunk'>@@ -2137,7 +2259,7 @@ static int core_get_max_pstate(int cpu)</div><div class='ctx'> 	int tdp_ratio;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_on_cpu(cpu, MSR_PLATFORM_INFO, &amp;plat_info);</div><div class='add'>+	rdmsrq_on_cpu(cpu, MSR_PLATFORM_INFO, &amp;plat_info);</div><div class='ctx'> 	max_pstate = (plat_info &gt;&gt; 8) &amp; 0xFF;</div><div class='ctx'> </div><div class='ctx'> 	tdp_ratio = core_get_tdp_ratio(cpu, plat_info);</div><div class='hunk'>@@ -2149,7 +2271,7 @@ static int core_get_max_pstate(int cpu)</div><div class='ctx'> 		return tdp_ratio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = rdmsrl_safe_on_cpu(cpu, MSR_TURBO_ACTIVATION_RATIO, &amp;tar);</div><div class='add'>+	err = rdmsrq_safe_on_cpu(cpu, MSR_TURBO_ACTIVATION_RATIO, &amp;tar);</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		int tar_levels;</div><div class='ctx'> </div><div class='hunk'>@@ -2169,7 +2291,7 @@ static int core_get_turbo_pstate(int cpu)</div><div class='ctx'> 	u64 value;</div><div class='ctx'> 	int nont, ret;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_on_cpu(cpu, MSR_TURBO_RATIO_LIMIT, &amp;value);</div><div class='add'>+	rdmsrq_on_cpu(cpu, MSR_TURBO_RATIO_LIMIT, &amp;value);</div><div class='ctx'> 	nont = core_get_max_pstate(cpu);</div><div class='ctx'> 	ret = (value) &amp; 255;</div><div class='ctx'> 	if (ret &lt;= nont)</div><div class='hunk'>@@ -2198,7 +2320,7 @@ static int knl_get_turbo_pstate(int cpu)</div><div class='ctx'> 	u64 value;</div><div class='ctx'> 	int nont, ret;</div><div class='ctx'> </div><div class='del'>-	rdmsrl_on_cpu(cpu, MSR_TURBO_RATIO_LIMIT, &amp;value);</div><div class='add'>+	rdmsrq_on_cpu(cpu, MSR_TURBO_RATIO_LIMIT, &amp;value);</div><div class='ctx'> 	nont = core_get_max_pstate(cpu);</div><div class='ctx'> 	ret = (((value) &gt;&gt; 8) &amp; 0xFF);</div><div class='ctx'> 	if (ret &lt;= nont)</div><div class='hunk'>@@ -2209,7 +2331,7 @@ static int knl_get_turbo_pstate(int cpu)</div><div class='ctx'> static int hwp_get_cpu_scaling(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	if (hybrid_scaling_factor) {</div><div class='del'>-		struct cpuinfo_x86 *c = &amp;cpu_data(smp_processor_id());</div><div class='add'>+		struct cpuinfo_x86 *c = &amp;cpu_data(cpu);</div><div class='ctx'> 		u8 cpu_type = c-&gt;topo.intel_type;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -2244,7 +2366,7 @@ static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)</div><div class='ctx'> 	 * the CPU being updated, so force the register update to run on the</div><div class='ctx'> 	 * right CPU.</div><div class='ctx'> 	 */</div><div class='del'>-	wrmsrl_on_cpu(cpu-&gt;cpu, MSR_IA32_PERF_CTL,</div><div class='add'>+	wrmsrq_on_cpu(cpu-&gt;cpu, MSR_IA32_PERF_CTL,</div><div class='ctx'> 		      pstate_funcs.get_val(cpu, pstate));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2351,7 +2473,7 @@ static inline void intel_pstate_hwp_boost_up(struct cpudata *cpu)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	hwp_req = (hwp_req &amp; ~GENMASK_ULL(7, 0)) | cpu-&gt;hwp_boost_min;</div><div class='del'>-	wrmsrl(MSR_HWP_REQUEST, hwp_req);</div><div class='add'>+	wrmsrq(MSR_HWP_REQUEST, hwp_req);</div><div class='ctx'> 	cpu-&gt;last_update = cpu-&gt;sample.time;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2364,7 +2486,7 @@ static inline void intel_pstate_hwp_boost_down(struct cpudata *cpu)</div><div class='ctx'> 		expired = time_after64(cpu-&gt;sample.time, cpu-&gt;last_update +</div><div class='ctx'> 				       hwp_boost_hold_time_ns);</div><div class='ctx'> 		if (expired) {</div><div class='del'>-			wrmsrl(MSR_HWP_REQUEST, cpu-&gt;hwp_req_cached);</div><div class='add'>+			wrmsrq(MSR_HWP_REQUEST, cpu-&gt;hwp_req_cached);</div><div class='ctx'> 			cpu-&gt;hwp_boost_min = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2425,8 +2547,8 @@ static inline bool intel_pstate_sample(struct cpudata *cpu, u64 time)</div><div class='ctx'> 	u64 tsc;</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='del'>-	rdmsrl(MSR_IA32_APERF, aperf);</div><div class='del'>-	rdmsrl(MSR_IA32_MPERF, mperf);</div><div class='add'>+	rdmsrq(MSR_IA32_APERF, aperf);</div><div class='add'>+	rdmsrq(MSR_IA32_MPERF, mperf);</div><div class='ctx'> 	tsc = rdtsc();</div><div class='ctx'> 	if (cpu-&gt;prev_mperf == mperf || cpu-&gt;prev_tsc == tsc) {</div><div class='ctx'> 		local_irq_restore(flags);</div><div class='hunk'>@@ -2520,7 +2642,7 @@ static void intel_pstate_update_pstate(struct cpudata *cpu, int pstate)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cpu-&gt;pstate.current_pstate = pstate;</div><div class='del'>-	wrmsrl(MSR_IA32_PERF_CTL, pstate_funcs.get_val(cpu, pstate));</div><div class='add'>+	wrmsrq(MSR_IA32_PERF_CTL, pstate_funcs.get_val(cpu, pstate));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_pstate_adjust_pstate(struct cpudata *cpu)</div><div class='hunk'>@@ -3100,19 +3222,19 @@ static void intel_cpufreq_hwp_update(struct cpudata *cpu, u32 min, u32 max,</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(cpu-&gt;hwp_req_cached, value);</div><div class='ctx'> 	if (fast_switch)</div><div class='del'>-		wrmsrl(MSR_HWP_REQUEST, value);</div><div class='add'>+		wrmsrq(MSR_HWP_REQUEST, value);</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='add'>+		wrmsrq_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_cpufreq_perf_ctl_update(struct cpudata *cpu,</div><div class='ctx'> 					  u32 target_pstate, bool fast_switch)</div><div class='ctx'> {</div><div class='ctx'> 	if (fast_switch)</div><div class='del'>-		wrmsrl(MSR_IA32_PERF_CTL,</div><div class='add'>+		wrmsrq(MSR_IA32_PERF_CTL,</div><div class='ctx'> 		       pstate_funcs.get_val(cpu, target_pstate));</div><div class='ctx'> 	else</div><div class='del'>-		wrmsrl_on_cpu(cpu-&gt;cpu, MSR_IA32_PERF_CTL,</div><div class='add'>+		wrmsrq_on_cpu(cpu-&gt;cpu, MSR_IA32_PERF_CTL,</div><div class='ctx'> 			      pstate_funcs.get_val(cpu, target_pstate));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3256,7 +3378,7 @@ static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> </div><div class='ctx'> 		intel_pstate_get_hwp_cap(cpu);</div><div class='ctx'> </div><div class='del'>-		rdmsrl_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, &amp;value);</div><div class='add'>+		rdmsrq_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, &amp;value);</div><div class='ctx'> 		WRITE_ONCE(cpu-&gt;hwp_req_cached, value);</div><div class='ctx'> </div><div class='ctx'> 		cpu-&gt;epp_cached = intel_pstate_get_epp(cpu, value);</div><div class='hunk'>@@ -3323,7 +3445,7 @@ static int intel_cpufreq_suspend(struct cpufreq_policy *policy)</div><div class='ctx'> 		 * written by it may not be suitable.</div><div class='ctx'> 		 */</div><div class='ctx'> 		value &amp;= ~HWP_DESIRED_PERF(~0L);</div><div class='del'>-		wrmsrl_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='add'>+		wrmsrq_on_cpu(cpu-&gt;cpu, MSR_HWP_REQUEST, value);</div><div class='ctx'> 		WRITE_ONCE(cpu-&gt;hwp_req_cached, value);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3573,7 +3695,7 @@ static bool __init intel_pstate_platform_pwr_mgmt_exists(void)</div><div class='ctx'> </div><div class='ctx'> 	id = x86_match_cpu(intel_pstate_cpu_oob_ids);</div><div class='ctx'> 	if (id) {</div><div class='del'>-		rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr);</div><div class='add'>+		rdmsrq(MSR_MISC_PWR_MGMT, misc_pwr);</div><div class='ctx'> 		if (misc_pwr &amp; BITMASK_OOB) {</div><div class='ctx'> 			pr_debug("Bit 8 or 18 in the MISC_PWR_MGMT MSR set\n");</div><div class='ctx'> 			pr_debug("P states are controlled in Out of Band mode by the firmware/hardware\n");</div><div class='hunk'>@@ -3629,7 +3751,7 @@ static bool intel_pstate_hwp_is_enabled(void)</div><div class='ctx'> {</div><div class='ctx'> 	u64 value;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_PM_ENABLE, value);</div><div class='add'>+	rdmsrq(MSR_PM_ENABLE, value);</div><div class='ctx'> 	return !!(value &amp; 0x1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/longhaul.c b/drivers/cpufreq/longhaul.c<br/>index 68ccd73c8129..ba0e08c8486a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/longhaul.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/longhaul.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/longhaul.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/longhaul.c</a></div><div class='hunk'>@@ -136,7 +136,7 @@ static void do_longhaul1(unsigned int mults_index)</div><div class='ctx'> {</div><div class='ctx'> 	union msr_bcr2 bcr2;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_VIA_BCR2, bcr2.val);</div><div class='add'>+	rdmsrq(MSR_VIA_BCR2, bcr2.val);</div><div class='ctx'> 	/* Enable software clock multiplier */</div><div class='ctx'> 	bcr2.bits.ESOFTBF = 1;</div><div class='ctx'> 	bcr2.bits.CLOCKMUL = mults_index &amp; 0xff;</div><div class='hunk'>@@ -144,16 +144,16 @@ static void do_longhaul1(unsigned int mults_index)</div><div class='ctx'> 	/* Sync to timer tick */</div><div class='ctx'> 	safe_halt();</div><div class='ctx'> 	/* Change frequency on next halt or sleep */</div><div class='del'>-	wrmsrl(MSR_VIA_BCR2, bcr2.val);</div><div class='add'>+	wrmsrq(MSR_VIA_BCR2, bcr2.val);</div><div class='ctx'> 	/* Invoke transition */</div><div class='ctx'> 	ACPI_FLUSH_CPU_CACHE();</div><div class='ctx'> 	halt();</div><div class='ctx'> </div><div class='ctx'> 	/* Disable software clock multiplier */</div><div class='ctx'> 	local_irq_disable();</div><div class='del'>-	rdmsrl(MSR_VIA_BCR2, bcr2.val);</div><div class='add'>+	rdmsrq(MSR_VIA_BCR2, bcr2.val);</div><div class='ctx'> 	bcr2.bits.ESOFTBF = 0;</div><div class='del'>-	wrmsrl(MSR_VIA_BCR2, bcr2.val);</div><div class='add'>+	wrmsrq(MSR_VIA_BCR2, bcr2.val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* For processor with Longhaul MSR */</div><div class='hunk'>@@ -164,7 +164,7 @@ static void do_powersaver(int cx_address, unsigned int mults_index,</div><div class='ctx'> 	union msr_longhaul longhaul;</div><div class='ctx'> 	u32 t;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+	rdmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> 	/* Setup new frequency */</div><div class='ctx'> 	if (!revid_errata)</div><div class='ctx'> 		longhaul.bits.RevisionKey = longhaul.bits.RevisionID;</div><div class='hunk'>@@ -180,7 +180,7 @@ static void do_powersaver(int cx_address, unsigned int mults_index,</div><div class='ctx'> 	/* Raise voltage if necessary */</div><div class='ctx'> 	if (can_scale_voltage &amp;&amp; dir) {</div><div class='ctx'> 		longhaul.bits.EnableSoftVID = 1;</div><div class='del'>-		wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+		wrmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> 		/* Change voltage */</div><div class='ctx'> 		if (!cx_address) {</div><div class='ctx'> 			ACPI_FLUSH_CPU_CACHE();</div><div class='hunk'>@@ -194,12 +194,12 @@ static void do_powersaver(int cx_address, unsigned int mults_index,</div><div class='ctx'> 			t = inl(acpi_gbl_FADT.xpm_timer_block.address);</div><div class='ctx'> 		}</div><div class='ctx'> 		longhaul.bits.EnableSoftVID = 0;</div><div class='del'>-		wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+		wrmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Change frequency on next halt or sleep */</div><div class='ctx'> 	longhaul.bits.EnableSoftBusRatio = 1;</div><div class='del'>-	wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+	wrmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> 	if (!cx_address) {</div><div class='ctx'> 		ACPI_FLUSH_CPU_CACHE();</div><div class='ctx'> 		halt();</div><div class='hunk'>@@ -212,12 +212,12 @@ static void do_powersaver(int cx_address, unsigned int mults_index,</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Disable bus ratio bit */</div><div class='ctx'> 	longhaul.bits.EnableSoftBusRatio = 0;</div><div class='del'>-	wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+	wrmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> </div><div class='ctx'> 	/* Reduce voltage if necessary */</div><div class='ctx'> 	if (can_scale_voltage &amp;&amp; !dir) {</div><div class='ctx'> 		longhaul.bits.EnableSoftVID = 1;</div><div class='del'>-		wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+		wrmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> 		/* Change voltage */</div><div class='ctx'> 		if (!cx_address) {</div><div class='ctx'> 			ACPI_FLUSH_CPU_CACHE();</div><div class='hunk'>@@ -231,7 +231,7 @@ static void do_powersaver(int cx_address, unsigned int mults_index,</div><div class='ctx'> 			t = inl(acpi_gbl_FADT.xpm_timer_block.address);</div><div class='ctx'> 		}</div><div class='ctx'> 		longhaul.bits.EnableSoftVID = 0;</div><div class='del'>-		wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+		wrmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -534,7 +534,7 @@ static void longhaul_setup_voltagescaling(void)</div><div class='ctx'> 	unsigned int j, speed, pos, kHz_step, numvscales;</div><div class='ctx'> 	int min_vid_speed;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='add'>+	rdmsrq(MSR_VIA_LONGHAUL, longhaul.val);</div><div class='ctx'> 	if (!(longhaul.bits.RevisionID &amp; 1)) {</div><div class='ctx'> 		pr_info("Voltage scaling not supported by CPU\n");</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/cpufreq/powernow-k7.c b/drivers/cpufreq/powernow-k7.c<br/>index fb2197dc170f..31039330a3ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/powernow-k7.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/powernow-k7.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/powernow-k7.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/powernow-k7.c</a></div><div class='hunk'>@@ -219,13 +219,13 @@ static void change_FID(int fid)</div><div class='ctx'> {</div><div class='ctx'> 	union msr_fidvidctl fidvidctl;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='add'>+	rdmsrq(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='ctx'> 	if (fidvidctl.bits.FID != fid) {</div><div class='ctx'> 		fidvidctl.bits.SGTC = latency;</div><div class='ctx'> 		fidvidctl.bits.FID = fid;</div><div class='ctx'> 		fidvidctl.bits.VIDC = 0;</div><div class='ctx'> 		fidvidctl.bits.FIDC = 1;</div><div class='del'>-		wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='add'>+		wrmsrq(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -234,13 +234,13 @@ static void change_VID(int vid)</div><div class='ctx'> {</div><div class='ctx'> 	union msr_fidvidctl fidvidctl;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='add'>+	rdmsrq(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='ctx'> 	if (fidvidctl.bits.VID != vid) {</div><div class='ctx'> 		fidvidctl.bits.SGTC = latency;</div><div class='ctx'> 		fidvidctl.bits.VID = vid;</div><div class='ctx'> 		fidvidctl.bits.FIDC = 0;</div><div class='ctx'> 		fidvidctl.bits.VIDC = 1;</div><div class='del'>-		wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='add'>+		wrmsrq(MSR_K7_FID_VID_CTL, fidvidctl.val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -260,7 +260,7 @@ static int powernow_target(struct cpufreq_policy *policy, unsigned int index)</div><div class='ctx'> 	fid = powernow_table[index].driver_data &amp; 0xFF;</div><div class='ctx'> 	vid = (powernow_table[index].driver_data &amp; 0xFF00) &gt;&gt; 8;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);</div><div class='add'>+	rdmsrq(MSR_K7_FID_VID_STATUS, fidvidstatus.val);</div><div class='ctx'> 	cfid = fidvidstatus.bits.CFID;</div><div class='ctx'> 	freqs.old = fsb * fid_codes[cfid] / 10;</div><div class='ctx'> </div><div class='hunk'>@@ -557,7 +557,7 @@ static unsigned int powernow_get(unsigned int cpu)</div><div class='ctx'> </div><div class='ctx'> 	if (cpu)</div><div class='ctx'> 		return 0;</div><div class='del'>-	rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);</div><div class='add'>+	rdmsrq(MSR_K7_FID_VID_STATUS, fidvidstatus.val);</div><div class='ctx'> 	cfid = fidvidstatus.bits.CFID;</div><div class='ctx'> </div><div class='ctx'> 	return fsb * fid_codes[cfid] / 10;</div><div class='hunk'>@@ -598,7 +598,7 @@ static int powernow_cpu_init(struct cpufreq_policy *policy)</div><div class='ctx'> 	if (policy-&gt;cpu != 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);</div><div class='add'>+	rdmsrq(MSR_K7_FID_VID_STATUS, fidvidstatus.val);</div><div class='ctx'> </div><div class='ctx'> 	recalibrate_cpu_khz();</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cpufreq/sc520_freq.c b/drivers/cpufreq/sc520_freq.c<br/>index 103d2519dff7..b360f03a116f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/sc520_freq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/sc520_freq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/sc520_freq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/sc520_freq.c</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MMCR_BASE	0xfffef000	/* The default base address */</div><div class='ctx'> #define OFFS_CPUCTL	0x2   /* CPU Control Register */</div><div class='head'>diff --git a/drivers/cpufreq/scmi-cpufreq.c b/drivers/cpufreq/scmi-cpufreq.c<br/>index c310aeebc8f3..944e899eb1be 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/scmi-cpufreq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/scmi-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/scmi-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/scmi-cpufreq.c</a></div><div class='hunk'>@@ -37,11 +37,17 @@ static struct cpufreq_driver scmi_cpufreq_driver;</div><div class='ctx'> </div><div class='ctx'> static unsigned int scmi_cpufreq_get_rate(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_get_raw(cpu);</div><div class='del'>-	struct scmi_data *priv = policy-&gt;driver_data;</div><div class='add'>+	struct cpufreq_policy *policy;</div><div class='add'>+	struct scmi_data *priv;</div><div class='ctx'> 	unsigned long rate;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	policy = cpufreq_cpu_get_raw(cpu);</div><div class='add'>+	if (unlikely(!policy))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	priv = policy-&gt;driver_data;</div><div class='add'>+</div><div class='ctx'> 	ret = perf_ops-&gt;freq_get(ph, priv-&gt;domain_id, &amp;rate, false);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/cpufreq/scpi-cpufreq.c b/drivers/cpufreq/scpi-cpufreq.c<br/>index 17cda84f00df..dcbb0ae7dd47 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/scpi-cpufreq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/scpi-cpufreq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/scpi-cpufreq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/scpi-cpufreq.c</a></div><div class='hunk'>@@ -29,9 +29,16 @@ static struct scpi_ops *scpi_ops;</div><div class='ctx'> </div><div class='ctx'> static unsigned int scpi_cpufreq_get_rate(unsigned int cpu)</div><div class='ctx'> {</div><div class='del'>-	struct cpufreq_policy *policy = cpufreq_cpu_get_raw(cpu);</div><div class='del'>-	struct scpi_data *priv = policy-&gt;driver_data;</div><div class='del'>-	unsigned long rate = clk_get_rate(priv-&gt;clk);</div><div class='add'>+	struct cpufreq_policy *policy;</div><div class='add'>+	struct scpi_data *priv;</div><div class='add'>+	unsigned long rate;</div><div class='add'>+</div><div class='add'>+	policy = cpufreq_cpu_get_raw(cpu);</div><div class='add'>+	if (unlikely(!policy))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	priv = policy-&gt;driver_data;</div><div class='add'>+	rate = clk_get_rate(priv-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return rate / 1000;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c<br/>index 47d6840b3489..744312a44279 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpufreq/sun50i-cpufreq-nvmem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpufreq/sun50i-cpufreq-nvmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpufreq/sun50i-cpufreq-nvmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpufreq/sun50i-cpufreq-nvmem.c</a></div><div class='hunk'>@@ -194,7 +194,9 @@ static int sun50i_cpufreq_get_efuse(void)</div><div class='ctx'> 	struct nvmem_cell *speedbin_nvmem;</div><div class='ctx'> 	const struct of_device_id *match;</div><div class='ctx'> 	struct device *cpu_dev;</div><div class='del'>-	u32 *speedbin;</div><div class='add'>+	void *speedbin_ptr;</div><div class='add'>+	u32 speedbin = 0;</div><div class='add'>+	size_t len;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	cpu_dev = get_cpu_device(0);</div><div class='hunk'>@@ -217,14 +219,18 @@ static int sun50i_cpufreq_get_efuse(void)</div><div class='ctx'> 		return dev_err_probe(cpu_dev, PTR_ERR(speedbin_nvmem),</div><div class='ctx'> 				     "Could not get nvmem cell\n");</div><div class='ctx'> </div><div class='del'>-	speedbin = nvmem_cell_read(speedbin_nvmem, NULL);</div><div class='add'>+	speedbin_ptr = nvmem_cell_read(speedbin_nvmem, &amp;len);</div><div class='ctx'> 	nvmem_cell_put(speedbin_nvmem);</div><div class='del'>-	if (IS_ERR(speedbin))</div><div class='del'>-		return PTR_ERR(speedbin);</div><div class='add'>+	if (IS_ERR(speedbin_ptr))</div><div class='add'>+		return PTR_ERR(speedbin_ptr);</div><div class='ctx'> </div><div class='del'>-	ret = opp_data-&gt;efuse_xlate(*speedbin);</div><div class='add'>+	if (len &lt;= 4)</div><div class='add'>+		memcpy(&amp;speedbin, speedbin_ptr, len);</div><div class='add'>+	speedbin = le32_to_cpu(speedbin);</div><div class='ctx'> </div><div class='del'>-	kfree(speedbin);</div><div class='add'>+	ret = opp_data-&gt;efuse_xlate(speedbin);</div><div class='add'>+</div><div class='add'>+	kfree(speedbin_ptr);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidle-psci-domain.c<br/>index 5fb5228f6bf1..2041f59116ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-psci-domain.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/cpuidle-psci-domain.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-psci-domain.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpuidle/cpuidle-psci-domain.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@ static int psci_pd_power_off(struct generic_pm_domain *pd)</div><div class='ctx'> </div><div class='ctx'> 	/* OSI mode is enabled, set the corresponding domain state. */</div><div class='ctx'> 	pd_state = state-&gt;data;</div><div class='del'>-	psci_set_domain_state(*pd_state);</div><div class='add'>+	psci_set_domain_state(pd, pd-&gt;state_idx, *pd_state);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c<br/>index b46a83f5ffe4..3c2756a539c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-psci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/cpuidle-psci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-psci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpuidle/cpuidle-psci.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/device/faux.h&gt;</div><div class='ctx'> #include &lt;linux/psci.h&gt;</div><div class='ctx'> #include &lt;linux/pm_domain.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='hunk'>@@ -36,19 +36,30 @@ struct psci_cpuidle_data {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct psci_cpuidle_domain_state {</div><div class='add'>+	struct generic_pm_domain *pd;</div><div class='add'>+	unsigned int state_idx;</div><div class='add'>+	u32 state;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static DEFINE_PER_CPU_READ_MOSTLY(struct psci_cpuidle_data, psci_cpuidle_data);</div><div class='del'>-static DEFINE_PER_CPU(u32, domain_state);</div><div class='add'>+static DEFINE_PER_CPU(struct psci_cpuidle_domain_state, psci_domain_state);</div><div class='ctx'> static bool psci_cpuidle_use_syscore;</div><div class='ctx'> static bool psci_cpuidle_use_cpuhp;</div><div class='ctx'> </div><div class='del'>-void psci_set_domain_state(u32 state)</div><div class='add'>+void psci_set_domain_state(struct generic_pm_domain *pd, unsigned int state_idx,</div><div class='add'>+			   u32 state)</div><div class='ctx'> {</div><div class='del'>-	__this_cpu_write(domain_state, state);</div><div class='add'>+	struct psci_cpuidle_domain_state *ds = this_cpu_ptr(&amp;psci_domain_state);</div><div class='add'>+</div><div class='add'>+	ds-&gt;pd = pd;</div><div class='add'>+	ds-&gt;state_idx = state_idx;</div><div class='add'>+	ds-&gt;state = state;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 psci_get_domain_state(void)</div><div class='add'>+static inline void psci_clear_domain_state(void)</div><div class='ctx'> {</div><div class='del'>-	return __this_cpu_read(domain_state);</div><div class='add'>+	__this_cpu_write(psci_domain_state.state, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __cpuidle int __psci_enter_domain_idle_state(struct cpuidle_device *dev,</div><div class='hunk'>@@ -58,7 +69,8 @@ static __cpuidle int __psci_enter_domain_idle_state(struct cpuidle_device *dev,</div><div class='ctx'> 	struct psci_cpuidle_data *data = this_cpu_ptr(&amp;psci_cpuidle_data);</div><div class='ctx'> 	u32 *states = data-&gt;psci_states;</div><div class='ctx'> 	struct device *pd_dev = data-&gt;dev;</div><div class='del'>-	u32 state;</div><div class='add'>+	struct psci_cpuidle_domain_state *ds;</div><div class='add'>+	u32 state = states[idx];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = cpu_pm_enter();</div><div class='hunk'>@@ -71,9 +83,9 @@ static __cpuidle int __psci_enter_domain_idle_state(struct cpuidle_device *dev,</div><div class='ctx'> 	else</div><div class='ctx'> 		pm_runtime_put_sync_suspend(pd_dev);</div><div class='ctx'> </div><div class='del'>-	state = psci_get_domain_state();</div><div class='del'>-	if (!state)</div><div class='del'>-		state = states[idx];</div><div class='add'>+	ds = this_cpu_ptr(&amp;psci_domain_state);</div><div class='add'>+	if (ds-&gt;state)</div><div class='add'>+		state = ds-&gt;state;</div><div class='ctx'> </div><div class='ctx'> 	trace_psci_domain_idle_enter(dev-&gt;cpu, state, s2idle);</div><div class='ctx'> 	ret = psci_cpu_suspend_enter(state) ? -1 : idx;</div><div class='hunk'>@@ -86,8 +98,12 @@ static __cpuidle int __psci_enter_domain_idle_state(struct cpuidle_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	cpu_pm_exit();</div><div class='ctx'> </div><div class='add'>+	/* Correct domain-idlestate statistics if we failed to enter. */</div><div class='add'>+	if (ret == -1 &amp;&amp; ds-&gt;state)</div><div class='add'>+		pm_genpd_inc_rejected(ds-&gt;pd, ds-&gt;state_idx);</div><div class='add'>+</div><div class='ctx'> 	/* Clear the domain state to start fresh when back from idle. */</div><div class='del'>-	psci_set_domain_state(0);</div><div class='add'>+	psci_clear_domain_state();</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -121,7 +137,7 @@ static int psci_idle_cpuhp_down(unsigned int cpu)</div><div class='ctx'> 	if (pd_dev) {</div><div class='ctx'> 		pm_runtime_put_sync(pd_dev);</div><div class='ctx'> 		/* Clear domain state to start fresh at next online. */</div><div class='del'>-		psci_set_domain_state(0);</div><div class='add'>+		psci_clear_domain_state();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -147,7 +163,7 @@ static void psci_idle_syscore_switch(bool suspend)</div><div class='ctx'> </div><div class='ctx'> 			/* Clear domain state to re-start fresh. */</div><div class='ctx'> 			if (!cleared) {</div><div class='del'>-				psci_set_domain_state(0);</div><div class='add'>+				psci_clear_domain_state();</div><div class='ctx'> 				cleared = true;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -407,14 +423,14 @@ deinit:</div><div class='ctx'>  * to register cpuidle driver then rollback to cancel all CPUs</div><div class='ctx'>  * registration.</div><div class='ctx'>  */</div><div class='del'>-static int psci_cpuidle_probe(struct platform_device *pdev)</div><div class='add'>+static int psci_cpuidle_probe(struct faux_device *fdev)</div><div class='ctx'> {</div><div class='ctx'> 	int cpu, ret;</div><div class='ctx'> 	struct cpuidle_driver *drv;</div><div class='ctx'> 	struct cpuidle_device *dev;</div><div class='ctx'> </div><div class='ctx'> 	for_each_present_cpu(cpu) {</div><div class='del'>-		ret = psci_idle_init_cpu(&amp;pdev-&gt;dev, cpu);</div><div class='add'>+		ret = psci_idle_init_cpu(&amp;fdev-&gt;dev, cpu);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out_fail;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -434,26 +450,37 @@ out_fail:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct platform_driver psci_cpuidle_driver = {</div><div class='add'>+static struct faux_device_ops psci_cpuidle_ops = {</div><div class='ctx'> 	.probe = psci_cpuidle_probe,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "psci-cpuidle",</div><div class='del'>-	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool __init dt_idle_state_present(void)</div><div class='add'>+{</div><div class='add'>+	struct device_node *cpu_node __free(device_node);</div><div class='add'>+	struct device_node *state_node __free(device_node);</div><div class='add'>+</div><div class='add'>+	cpu_node = of_cpu_device_node_get(cpumask_first(cpu_possible_mask));</div><div class='add'>+	if (!cpu_node)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	state_node = of_get_cpu_state_node(cpu_node, 0);</div><div class='add'>+	if (!state_node)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !!of_match_node(psci_idle_state_match, state_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init psci_idle_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	int ret;</div><div class='add'>+	struct faux_device *fdev;</div><div class='ctx'> </div><div class='del'>-	ret = platform_driver_register(&amp;psci_cpuidle_driver);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (!dt_idle_state_present())</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	pdev = platform_device_register_simple("psci-cpuidle", -1, NULL, 0);</div><div class='del'>-	if (IS_ERR(pdev)) {</div><div class='del'>-		platform_driver_unregister(&amp;psci_cpuidle_driver);</div><div class='del'>-		return PTR_ERR(pdev);</div><div class='add'>+	fdev = faux_device_create("psci-cpuidle", NULL, &amp;psci_cpuidle_ops);</div><div class='add'>+	if (!fdev) {</div><div class='add'>+		pr_err("Failed to create psci-cpuidle device\n");</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/cpuidle/cpuidle-psci.h b/drivers/cpuidle/cpuidle-psci.h<br/>index ef004ec7a7c5..d29cbd796cd5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-psci.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/cpuidle-psci.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/cpuidle-psci.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpuidle/cpuidle-psci.h</a></div><div class='hunk'>@@ -4,8 +4,10 @@</div><div class='ctx'> #define __CPUIDLE_PSCI_H</div><div class='ctx'> </div><div class='ctx'> struct device_node;</div><div class='add'>+struct generic_pm_domain;</div><div class='ctx'> </div><div class='del'>-void psci_set_domain_state(u32 state);</div><div class='add'>+void psci_set_domain_state(struct generic_pm_domain *pd, unsigned int state_idx,</div><div class='add'>+			   u32 state);</div><div class='ctx'> int psci_dt_parse_state_node(struct device_node *np, u32 *state);</div><div class='ctx'> </div><div class='ctx'> #endif /* __CPUIDLE_PSCI_H */</div><div class='head'>diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c<br/>index 39aa0aea61c6..52d5d26fc7c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/governors/menu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/governors/menu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/governors/menu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpuidle/governors/menu.c</a></div><div class='hunk'>@@ -255,7 +255,7 @@ static int menu_select(struct cpuidle_driver *drv, struct cpuidle_device *dev,</div><div class='ctx'> 		 */</div><div class='ctx'> 		data-&gt;next_timer_ns = KTIME_MAX;</div><div class='ctx'> 		delta_tick = TICK_NSEC / 2;</div><div class='del'>-		data-&gt;bucket = which_bucket(KTIME_MAX);</div><div class='add'>+		data-&gt;bucket = BUCKETS - 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(drv-&gt;state_count &lt;= 1 || latency_req == 0) ||</div><div class='head'>diff --git a/drivers/cpuidle/governors/teo.c b/drivers/cpuidle/governors/teo.c<br/>index 8fe5e1b47ef9..bfa55c1eab5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cpuidle/governors/teo.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cpuidle/governors/teo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cpuidle/governors/teo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cpuidle/governors/teo.c</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Of course, non-timer wakeup sources are more important in some use cases,</div><div class='ctx'>  * but even then it is generally unnecessary to consider idle duration values</div><div class='del'>- * greater than the time time till the next timer event, referred as the sleep</div><div class='add'>+ * greater than the time till the next timer event, referred as the sleep</div><div class='ctx'>  * length in what follows, because the closest timer will ultimately wake up the</div><div class='ctx'>  * CPU anyway unless it is woken up earlier.</div><div class='ctx'>  *</div><div class='hunk'>@@ -311,7 +311,7 @@ static int teo_select(struct cpuidle_driver *drv, struct cpuidle_device *dev,</div><div class='ctx'> 		struct cpuidle_state *s = &amp;drv-&gt;states[i];</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Update the sums of idle state mertics for all of the states</div><div class='add'>+		 * Update the sums of idle state metrics for all of the states</div><div class='ctx'> 		 * shallower than the current one.</div><div class='ctx'> 		 */</div><div class='ctx'> 		intercept_sum += prev_bin-&gt;intercepts;</div><div class='head'>diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig<br/>index 47082782008a..5686369779be 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/Kconfig</a></div><div class='hunk'>@@ -530,13 +530,6 @@ source "drivers/crypto/cavium/nitrox/Kconfig"</div><div class='ctx'> source "drivers/crypto/marvell/Kconfig"</div><div class='ctx'> source "drivers/crypto/intel/Kconfig"</div><div class='ctx'> </div><div class='del'>-config CRYPTO_DEV_CAVIUM_ZIP</div><div class='del'>-	tristate "Cavium ZIP driver"</div><div class='del'>-	depends on PCI &amp;&amp; 64BIT &amp;&amp; (ARM64 || COMPILE_TEST)</div><div class='del'>-	help</div><div class='del'>-	  Select this option if you want to enable compression/decompression</div><div class='del'>-	  acceleration on Cavium's ARM based SoCs</div><div class='del'>-</div><div class='ctx'> config CRYPTO_DEV_QCE</div><div class='ctx'> 	tristate "Qualcomm crypto engine accelerator"</div><div class='ctx'> 	depends on ARCH_QCOM || COMPILE_TEST</div><div class='head'>diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile<br/>index c97f0ebc55ec..22eadcc8f4a2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/Makefile</a></div><div class='hunk'>@@ -8,12 +8,9 @@ obj-$(CONFIG_CRYPTO_DEV_ATMEL_TDES) += atmel-tdes.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_ATMEL_I2C) += atmel-i2c.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_ATMEL_ECC) += atmel-ecc.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA204A) += atmel-sha204a.o</div><div class='del'>-obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += cavium/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_CCP) += ccp/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_CCREE) += ccree/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_CHELSIO) += chelsio/</div><div class='del'>-obj-$(CONFIG_CRYPTO_DEV_CPT) += cavium/cpt/</div><div class='del'>-obj-$(CONFIG_CRYPTO_DEV_NITROX) += cavium/nitrox/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_EXYNOS_RNG) += exynos-rng.o</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON) += caam/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o</div><div class='hunk'>@@ -50,3 +47,4 @@ obj-y += hisilicon/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/</div><div class='ctx'> obj-y += intel/</div><div class='ctx'> obj-y += starfive/</div><div class='add'>+obj-y += cavium/</div><div class='head'>diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c<br/>index 19b7fb4a93e8..f9cf00d690e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c</a></div><div class='hunk'>@@ -33,22 +33,30 @@ static int sun8i_ce_cipher_need_fallback(struct skcipher_request *areq)</div><div class='ctx'> </div><div class='ctx'> 	if (sg_nents_for_len(areq-&gt;src, areq-&gt;cryptlen) &gt; MAX_SG ||</div><div class='ctx'> 	    sg_nents_for_len(areq-&gt;dst, areq-&gt;cryptlen) &gt; MAX_SG) {</div><div class='del'>-		algt-&gt;stat_fb_maxsg++;</div><div class='add'>+		if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+			algt-&gt;stat_fb_maxsg++;</div><div class='add'>+</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (areq-&gt;cryptlen &lt; crypto_skcipher_ivsize(tfm)) {</div><div class='del'>-		algt-&gt;stat_fb_leniv++;</div><div class='add'>+		if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+			algt-&gt;stat_fb_leniv++;</div><div class='add'>+</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (areq-&gt;cryptlen == 0) {</div><div class='del'>-		algt-&gt;stat_fb_len0++;</div><div class='add'>+		if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+			algt-&gt;stat_fb_len0++;</div><div class='add'>+</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (areq-&gt;cryptlen % 16) {</div><div class='del'>-		algt-&gt;stat_fb_mod16++;</div><div class='add'>+		if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+			algt-&gt;stat_fb_mod16++;</div><div class='add'>+</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -56,12 +64,16 @@ static int sun8i_ce_cipher_need_fallback(struct skcipher_request *areq)</div><div class='ctx'> 	sg = areq-&gt;src;</div><div class='ctx'> 	while (sg) {</div><div class='ctx'> 		if (!IS_ALIGNED(sg-&gt;offset, sizeof(u32))) {</div><div class='del'>-			algt-&gt;stat_fb_srcali++;</div><div class='add'>+			if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+				algt-&gt;stat_fb_srcali++;</div><div class='add'>+</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='ctx'> 		todo = min(len, sg-&gt;length);</div><div class='ctx'> 		if (todo % 4) {</div><div class='del'>-			algt-&gt;stat_fb_srclen++;</div><div class='add'>+			if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+				algt-&gt;stat_fb_srclen++;</div><div class='add'>+</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='ctx'> 		len -= todo;</div><div class='hunk'>@@ -72,12 +84,16 @@ static int sun8i_ce_cipher_need_fallback(struct skcipher_request *areq)</div><div class='ctx'> 	sg = areq-&gt;dst;</div><div class='ctx'> 	while (sg) {</div><div class='ctx'> 		if (!IS_ALIGNED(sg-&gt;offset, sizeof(u32))) {</div><div class='del'>-			algt-&gt;stat_fb_dstali++;</div><div class='add'>+			if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+				algt-&gt;stat_fb_dstali++;</div><div class='add'>+</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='ctx'> 		todo = min(len, sg-&gt;length);</div><div class='ctx'> 		if (todo % 4) {</div><div class='del'>-			algt-&gt;stat_fb_dstlen++;</div><div class='add'>+			if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+				algt-&gt;stat_fb_dstlen++;</div><div class='add'>+</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='ctx'> 		len -= todo;</div><div class='hunk'>@@ -100,9 +116,7 @@ static int sun8i_ce_cipher_fallback(struct skcipher_request *areq)</div><div class='ctx'> 		algt = container_of(alg, struct sun8i_ce_alg_template,</div><div class='ctx'> 				    alg.skcipher.base);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG</div><div class='ctx'> 		algt-&gt;stat_fb++;</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	skcipher_request_set_tfm(&amp;rctx-&gt;fallback_req, op-&gt;fallback_tfm);</div><div class='hunk'>@@ -146,9 +160,8 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine *engine, void *async_req</div><div class='ctx'> 		rctx-&gt;op_dir, areq-&gt;iv, crypto_skcipher_ivsize(tfm),</div><div class='ctx'> 		op-&gt;keylen);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG</div><div class='del'>-	algt-&gt;stat_req++;</div><div class='del'>-#endif</div><div class='add'>+	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+		algt-&gt;stat_req++;</div><div class='ctx'> </div><div class='ctx'> 	flow = rctx-&gt;flow;</div><div class='ctx'> </div><div class='hunk'>@@ -275,13 +288,16 @@ theend_sgs:</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (nr_sgs &gt; 0)</div><div class='ctx'> 			dma_unmap_sg(ce-&gt;dev, areq-&gt;src, ns, DMA_TO_DEVICE);</div><div class='del'>-		dma_unmap_sg(ce-&gt;dev, areq-&gt;dst, nd, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		if (nr_sgd &gt; 0)</div><div class='add'>+			dma_unmap_sg(ce-&gt;dev, areq-&gt;dst, nd, DMA_FROM_DEVICE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> theend_iv:</div><div class='ctx'> 	if (areq-&gt;iv &amp;&amp; ivsize &gt; 0) {</div><div class='del'>-		if (rctx-&gt;addr_iv)</div><div class='add'>+		if (!dma_mapping_error(ce-&gt;dev, rctx-&gt;addr_iv))</div><div class='ctx'> 			dma_unmap_single(ce-&gt;dev, rctx-&gt;addr_iv, rctx-&gt;ivlen, DMA_TO_DEVICE);</div><div class='add'>+</div><div class='ctx'> 		offset = areq-&gt;cryptlen - ivsize;</div><div class='ctx'> 		if (rctx-&gt;op_dir &amp; CE_DECRYPTION) {</div><div class='ctx'> 			memcpy(areq-&gt;iv, chan-&gt;backup_iv, ivsize);</div><div class='hunk'>@@ -434,17 +450,17 @@ int sun8i_ce_cipher_init(struct crypto_tfm *tfm)</div><div class='ctx'> 	crypto_skcipher_set_reqsize(sktfm, sizeof(struct sun8i_cipher_req_ctx) +</div><div class='ctx'> 				    crypto_skcipher_reqsize(op-&gt;fallback_tfm));</div><div class='ctx'> </div><div class='del'>-	memcpy(algt-&gt;fbname,</div><div class='del'>-	       crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op-&gt;fallback_tfm)),</div><div class='del'>-	       CRYPTO_MAX_ALG_NAME);</div><div class='add'>+	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+		memcpy(algt-&gt;fbname,</div><div class='add'>+		       crypto_skcipher_driver_name(op-&gt;fallback_tfm),</div><div class='add'>+		       CRYPTO_MAX_ALG_NAME);</div><div class='ctx'> </div><div class='del'>-	err = pm_runtime_get_sync(op-&gt;ce-&gt;dev);</div><div class='add'>+	err = pm_runtime_resume_and_get(op-&gt;ce-&gt;dev);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto error_pm;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> error_pm:</div><div class='del'>-	pm_runtime_put_noidle(op-&gt;ce-&gt;dev);</div><div class='ctx'> 	crypto_free_skcipher(op-&gt;fallback_tfm);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c<br/>index ec1ffda9ea32..658f520cee0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c</a></div><div class='hunk'>@@ -832,13 +832,12 @@ static int sun8i_ce_pm_init(struct sun8i_ce_dev *ce)</div><div class='ctx'> 	err = pm_runtime_set_suspended(ce-&gt;dev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='del'>-	pm_runtime_enable(ce-&gt;dev);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static void sun8i_ce_pm_exit(struct sun8i_ce_dev *ce)</div><div class='del'>-{</div><div class='del'>-	pm_runtime_disable(ce-&gt;dev);</div><div class='add'>+	err = devm_pm_runtime_enable(ce-&gt;dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sun8i_ce_get_clks(struct sun8i_ce_dev *ce)</div><div class='hunk'>@@ -1041,7 +1040,7 @@ static int sun8i_ce_probe(struct platform_device *pdev)</div><div class='ctx'> 			       "sun8i-ce-ns", ce);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(ce-&gt;dev, "Cannot request CryptoEngine Non-secure IRQ (err=%d)\n", err);</div><div class='del'>-		goto error_irq;</div><div class='add'>+		goto error_pm;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = sun8i_ce_register_algs(ce);</div><div class='hunk'>@@ -1082,8 +1081,6 @@ static int sun8i_ce_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> error_alg:</div><div class='ctx'> 	sun8i_ce_unregister_algs(ce);</div><div class='del'>-error_irq:</div><div class='del'>-	sun8i_ce_pm_exit(ce);</div><div class='ctx'> error_pm:</div><div class='ctx'> 	sun8i_ce_free_chanlist(ce, MAXFLOW - 1);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1104,8 +1101,6 @@ static void sun8i_ce_remove(struct platform_device *pdev)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	sun8i_ce_free_chanlist(ce, MAXFLOW - 1);</div><div class='del'>-</div><div class='del'>-	sun8i_ce_pm_exit(ce);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id sun8i_ce_crypto_of_match_table[] = {</div><div class='head'>diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c<br/>index 6072dd9f390b..bef44f350167 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c</a></div><div class='hunk'>@@ -23,6 +23,18 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include "sun8i-ce.h"</div><div class='ctx'> </div><div class='add'>+static void sun8i_ce_hash_stat_fb_inc(struct crypto_ahash *tfm)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) {</div><div class='add'>+		struct sun8i_ce_alg_template *algt __maybe_unused;</div><div class='add'>+		struct ahash_alg *alg = crypto_ahash_alg(tfm);</div><div class='add'>+</div><div class='add'>+		algt = container_of(alg, struct sun8i_ce_alg_template,</div><div class='add'>+				    alg.hash.base);</div><div class='add'>+		algt-&gt;stat_fb++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int sun8i_ce_hash_init_tfm(struct crypto_ahash *tfm)</div><div class='ctx'> {</div><div class='ctx'> 	struct sun8i_ce_hash_tfm_ctx *op = crypto_ahash_ctx(tfm);</div><div class='hunk'>@@ -48,15 +60,16 @@ int sun8i_ce_hash_init_tfm(struct crypto_ahash *tfm)</div><div class='ctx'> 				 sizeof(struct sun8i_ce_hash_reqctx) +</div><div class='ctx'> 				 crypto_ahash_reqsize(op-&gt;fallback_tfm));</div><div class='ctx'> </div><div class='del'>-	memcpy(algt-&gt;fbname, crypto_ahash_driver_name(op-&gt;fallback_tfm),</div><div class='del'>-	       CRYPTO_MAX_ALG_NAME);</div><div class='add'>+	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+		memcpy(algt-&gt;fbname,</div><div class='add'>+		       crypto_ahash_driver_name(op-&gt;fallback_tfm),</div><div class='add'>+		       CRYPTO_MAX_ALG_NAME);</div><div class='ctx'> </div><div class='del'>-	err = pm_runtime_get_sync(op-&gt;ce-&gt;dev);</div><div class='add'>+	err = pm_runtime_resume_and_get(op-&gt;ce-&gt;dev);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto error_pm;</div><div class='ctx'> 	return 0;</div><div class='ctx'> error_pm:</div><div class='del'>-	pm_runtime_put_noidle(op-&gt;ce-&gt;dev);</div><div class='ctx'> 	crypto_free_ahash(op-&gt;fallback_tfm);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -78,7 +91,9 @@ int sun8i_ce_hash_init(struct ahash_request *areq)</div><div class='ctx'> 	memset(rctx, 0, sizeof(struct sun8i_ce_hash_reqctx));</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_init(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -90,7 +105,9 @@ int sun8i_ce_hash_export(struct ahash_request *areq, void *out)</div><div class='ctx'> 	struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_export(&amp;rctx-&gt;fallback_req, out);</div><div class='ctx'> }</div><div class='hunk'>@@ -102,7 +119,9 @@ int sun8i_ce_hash_import(struct ahash_request *areq, const void *in)</div><div class='ctx'> 	struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_import(&amp;rctx-&gt;fallback_req, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -113,21 +132,13 @@ int sun8i_ce_hash_final(struct ahash_request *areq)</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);</div><div class='ctx'> 	struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.result = areq-&gt;result;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) {</div><div class='del'>-		struct sun8i_ce_alg_template *algt __maybe_unused;</div><div class='del'>-		struct ahash_alg *alg = crypto_ahash_alg(tfm);</div><div class='add'>+	sun8i_ce_hash_stat_fb_inc(tfm);</div><div class='ctx'> </div><div class='del'>-		algt = container_of(alg, struct sun8i_ce_alg_template,</div><div class='del'>-				    alg.hash.base);</div><div class='del'>-#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG</div><div class='del'>-		algt-&gt;stat_fb++;</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, NULL, areq-&gt;result, 0);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_final(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -139,10 +150,10 @@ int sun8i_ce_hash_update(struct ahash_request *areq)</div><div class='ctx'> 	struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = areq-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = areq-&gt;src;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, areq-&gt;src, NULL, areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_update(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -153,24 +164,14 @@ int sun8i_ce_hash_finup(struct ahash_request *areq)</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);</div><div class='ctx'> 	struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = areq-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = areq-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = areq-&gt;result;</div><div class='add'>+	sun8i_ce_hash_stat_fb_inc(tfm);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) {</div><div class='del'>-		struct sun8i_ce_alg_template *algt __maybe_unused;</div><div class='del'>-		struct ahash_alg *alg = crypto_ahash_alg(tfm);</div><div class='del'>-</div><div class='del'>-		algt = container_of(alg, struct sun8i_ce_alg_template,</div><div class='del'>-				    alg.hash.base);</div><div class='del'>-#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG</div><div class='del'>-		algt-&gt;stat_fb++;</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, areq-&gt;src, areq-&gt;result,</div><div class='add'>+				areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_finup(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -181,24 +182,14 @@ static int sun8i_ce_hash_digest_fb(struct ahash_request *areq)</div><div class='ctx'> 	struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);</div><div class='ctx'> 	struct sun8i_ce_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = areq-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = areq-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = areq-&gt;result;</div><div class='del'>-</div><div class='del'>-	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG)) {</div><div class='del'>-		struct sun8i_ce_alg_template *algt __maybe_unused;</div><div class='del'>-		struct ahash_alg *alg = crypto_ahash_alg(tfm);</div><div class='add'>+	sun8i_ce_hash_stat_fb_inc(tfm);</div><div class='ctx'> </div><div class='del'>-		algt = container_of(alg, struct sun8i_ce_alg_template,</div><div class='del'>-				    alg.hash.base);</div><div class='del'>-#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG</div><div class='del'>-		algt-&gt;stat_fb++;</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='add'>+	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, areq-&gt;src, areq-&gt;result,</div><div class='add'>+				areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_digest(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -213,22 +204,30 @@ static bool sun8i_ce_hash_need_fallback(struct ahash_request *areq)</div><div class='ctx'> 	algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash.base);</div><div class='ctx'> </div><div class='ctx'> 	if (areq-&gt;nbytes == 0) {</div><div class='del'>-		algt-&gt;stat_fb_len0++;</div><div class='add'>+		if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+			algt-&gt;stat_fb_len0++;</div><div class='add'>+</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* we need to reserve one SG for padding one */</div><div class='ctx'> 	if (sg_nents_for_len(areq-&gt;src, areq-&gt;nbytes) &gt; MAX_SG - 1) {</div><div class='del'>-		algt-&gt;stat_fb_maxsg++;</div><div class='add'>+		if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+			algt-&gt;stat_fb_maxsg++;</div><div class='add'>+</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> 	sg = areq-&gt;src;</div><div class='ctx'> 	while (sg) {</div><div class='ctx'> 		if (sg-&gt;length % 4) {</div><div class='del'>-			algt-&gt;stat_fb_srclen++;</div><div class='add'>+			if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+				algt-&gt;stat_fb_srclen++;</div><div class='add'>+</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!IS_ALIGNED(sg-&gt;offset, sizeof(u32))) {</div><div class='del'>-			algt-&gt;stat_fb_srcali++;</div><div class='add'>+			if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+				algt-&gt;stat_fb_srcali++;</div><div class='add'>+</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='ctx'> 		sg = sg_next(sg);</div><div class='hunk'>@@ -244,21 +243,11 @@ int sun8i_ce_hash_digest(struct ahash_request *areq)</div><div class='ctx'> 	struct sun8i_ce_alg_template *algt;</div><div class='ctx'> 	struct sun8i_ce_dev *ce;</div><div class='ctx'> 	struct crypto_engine *engine;</div><div class='del'>-	struct scatterlist *sg;</div><div class='del'>-	int nr_sgs, e, i;</div><div class='add'>+	int e;</div><div class='ctx'> </div><div class='ctx'> 	if (sun8i_ce_hash_need_fallback(areq))</div><div class='ctx'> 		return sun8i_ce_hash_digest_fb(areq);</div><div class='ctx'> </div><div class='del'>-	nr_sgs = sg_nents_for_len(areq-&gt;src, areq-&gt;nbytes);</div><div class='del'>-	if (nr_sgs &gt; MAX_SG - 1)</div><div class='del'>-		return sun8i_ce_hash_digest_fb(areq);</div><div class='del'>-</div><div class='del'>-	for_each_sg(areq-&gt;src, sg, nr_sgs, i) {</div><div class='del'>-		if (sg-&gt;length % 4 || !IS_ALIGNED(sg-&gt;offset, sizeof(u32)))</div><div class='del'>-			return sun8i_ce_hash_digest_fb(areq);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	algt = container_of(alg, struct sun8i_ce_alg_template, alg.hash.base);</div><div class='ctx'> 	ce = algt-&gt;ce;</div><div class='ctx'> </div><div class='hunk'>@@ -343,9 +332,8 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	u32 common;</div><div class='ctx'> 	u64 byte_count;</div><div class='ctx'> 	__le32 *bf;</div><div class='del'>-	void *buf = NULL;</div><div class='add'>+	void *buf, *result;</div><div class='ctx'> 	int j, i, todo;</div><div class='del'>-	void *result = NULL;</div><div class='ctx'> 	u64 bs;</div><div class='ctx'> 	int digestsize;</div><div class='ctx'> 	dma_addr_t addr_res, addr_pad;</div><div class='hunk'>@@ -365,22 +353,22 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	buf = kcalloc(2, bs, GFP_KERNEL | GFP_DMA);</div><div class='ctx'> 	if (!buf) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto theend;</div><div class='add'>+		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> 	bf = (__le32 *)buf;</div><div class='ctx'> </div><div class='ctx'> 	result = kzalloc(digestsize, GFP_KERNEL | GFP_DMA);</div><div class='ctx'> 	if (!result) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto theend;</div><div class='add'>+		goto err_free_buf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	flow = rctx-&gt;flow;</div><div class='ctx'> 	chan = &amp;ce-&gt;chanlist[flow];</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG</div><div class='del'>-	algt-&gt;stat_req++;</div><div class='del'>-#endif</div><div class='add'>+	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG))</div><div class='add'>+		algt-&gt;stat_req++;</div><div class='add'>+</div><div class='ctx'> 	dev_dbg(ce-&gt;dev, "%s %s len=%d\n", __func__, crypto_tfm_alg_name(areq-&gt;base.tfm), areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	cet = chan-&gt;tl;</div><div class='hunk'>@@ -398,7 +386,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	if (nr_sgs &lt;= 0 || nr_sgs &gt; MAX_SG) {</div><div class='ctx'> 		dev_err(ce-&gt;dev, "Invalid sg number %d\n", nr_sgs);</div><div class='ctx'> 		err = -EINVAL;</div><div class='del'>-		goto theend;</div><div class='add'>+		goto err_free_result;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	len = areq-&gt;nbytes;</div><div class='hunk'>@@ -411,7 +399,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	if (len &gt; 0) {</div><div class='ctx'> 		dev_err(ce-&gt;dev, "remaining len %d\n", len);</div><div class='ctx'> 		err = -EINVAL;</div><div class='del'>-		goto theend;</div><div class='add'>+		goto err_unmap_src;</div><div class='ctx'> 	}</div><div class='ctx'> 	addr_res = dma_map_single(ce-&gt;dev, result, digestsize, DMA_FROM_DEVICE);</div><div class='ctx'> 	cet-&gt;t_dst[0].addr = desc_addr_val_le32(ce, addr_res);</div><div class='hunk'>@@ -419,7 +407,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	if (dma_mapping_error(ce-&gt;dev, addr_res)) {</div><div class='ctx'> 		dev_err(ce-&gt;dev, "DMA map dest\n");</div><div class='ctx'> 		err = -EINVAL;</div><div class='del'>-		goto theend;</div><div class='add'>+		goto err_unmap_src;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	byte_count = areq-&gt;nbytes;</div><div class='hunk'>@@ -441,7 +429,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!j) {</div><div class='ctx'> 		err = -EINVAL;</div><div class='del'>-		goto theend;</div><div class='add'>+		goto err_unmap_result;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	addr_pad = dma_map_single(ce-&gt;dev, buf, j * 4, DMA_TO_DEVICE);</div><div class='hunk'>@@ -450,7 +438,7 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	if (dma_mapping_error(ce-&gt;dev, addr_pad)) {</div><div class='ctx'> 		dev_err(ce-&gt;dev, "DMA error on padding SG\n");</div><div class='ctx'> 		err = -EINVAL;</div><div class='del'>-		goto theend;</div><div class='add'>+		goto err_unmap_result;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ce-&gt;variant-&gt;hash_t_dlen_in_bits)</div><div class='hunk'>@@ -463,16 +451,25 @@ int sun8i_ce_hash_run(struct crypto_engine *engine, void *breq)</div><div class='ctx'> 	err = sun8i_ce_run_task(ce, flow, crypto_ahash_alg_name(tfm));</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_single(ce-&gt;dev, addr_pad, j * 4, DMA_TO_DEVICE);</div><div class='del'>-	dma_unmap_sg(ce-&gt;dev, areq-&gt;src, ns, DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+err_unmap_result:</div><div class='ctx'> 	dma_unmap_single(ce-&gt;dev, addr_res, digestsize, DMA_FROM_DEVICE);</div><div class='add'>+	if (!err)</div><div class='add'>+		memcpy(areq-&gt;result, result, algt-&gt;alg.hash.base.halg.digestsize);</div><div class='ctx'> </div><div class='add'>+err_unmap_src:</div><div class='add'>+	dma_unmap_sg(ce-&gt;dev, areq-&gt;src, ns, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-	memcpy(areq-&gt;result, result, algt-&gt;alg.hash.base.halg.digestsize);</div><div class='del'>-theend:</div><div class='del'>-	kfree(buf);</div><div class='add'>+err_free_result:</div><div class='ctx'> 	kfree(result);</div><div class='add'>+</div><div class='add'>+err_free_buf:</div><div class='add'>+	kfree(buf);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='ctx'> 	local_bh_disable();</div><div class='ctx'> 	crypto_finalize_hash_request(engine, breq, err);</div><div class='ctx'> 	local_bh_enable();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h<br/>index 3b5c2af013d0..83df4d719053 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h</a></div><div class='hunk'>@@ -308,8 +308,8 @@ struct sun8i_ce_hash_tfm_ctx {</div><div class='ctx'>  * @flow:	the flow to use for this request</div><div class='ctx'>  */</div><div class='ctx'> struct sun8i_ce_hash_reqctx {</div><div class='del'>-	struct ahash_request fallback_req;</div><div class='ctx'> 	int flow;</div><div class='add'>+	struct ahash_request fallback_req; // keep at the end</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c<br/>index 9b9605ce8ee6..8831bcb230c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c</a></div><div class='hunk'>@@ -141,7 +141,7 @@ static int sun8i_ss_setup_ivs(struct skcipher_request *areq)</div><div class='ctx'> </div><div class='ctx'> 	/* we need to copy all IVs from source in case DMA is bi-directionnal */</div><div class='ctx'> 	while (sg &amp;&amp; len) {</div><div class='del'>-		if (sg_dma_len(sg) == 0) {</div><div class='add'>+		if (sg-&gt;length == 0) {</div><div class='ctx'> 			sg = sg_next(sg);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c<br/>index 753f67a36dc5..8bc08089f044 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c</a></div><div class='hunk'>@@ -150,7 +150,9 @@ int sun8i_ss_hash_init(struct ahash_request *areq)</div><div class='ctx'> 	memset(rctx, 0, sizeof(struct sun8i_ss_hash_reqctx));</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_init(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -162,7 +164,9 @@ int sun8i_ss_hash_export(struct ahash_request *areq, void *out)</div><div class='ctx'> 	struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_export(&amp;rctx-&gt;fallback_req, out);</div><div class='ctx'> }</div><div class='hunk'>@@ -174,7 +178,9 @@ int sun8i_ss_hash_import(struct ahash_request *areq, const void *in)</div><div class='ctx'> 	struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_import(&amp;rctx-&gt;fallback_req, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -186,9 +192,10 @@ int sun8i_ss_hash_final(struct ahash_request *areq)</div><div class='ctx'> 	struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.result = areq-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, NULL, areq-&gt;result, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) {</div><div class='ctx'> 		struct ahash_alg *alg = crypto_ahash_alg(tfm);</div><div class='hunk'>@@ -212,10 +219,10 @@ int sun8i_ss_hash_update(struct ahash_request *areq)</div><div class='ctx'> 	struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = areq-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = areq-&gt;src;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, areq-&gt;src, NULL, areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_update(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -227,12 +234,11 @@ int sun8i_ss_hash_finup(struct ahash_request *areq)</div><div class='ctx'> 	struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = areq-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = areq-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = areq-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, areq-&gt;src, areq-&gt;result,</div><div class='add'>+				areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) {</div><div class='ctx'> 		struct ahash_alg *alg = crypto_ahash_alg(tfm);</div><div class='hunk'>@@ -256,12 +262,11 @@ static int sun8i_ss_hash_digest_fb(struct ahash_request *areq)</div><div class='ctx'> 	struct sun8i_ss_hash_tfm_ctx *tfmctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = areq-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = areq-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = areq-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, areq-&gt;src, areq-&gt;result,</div><div class='add'>+				areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG)) {</div><div class='ctx'> 		struct ahash_alg *alg = crypto_ahash_alg(tfm);</div><div class='head'>diff --git a/drivers/crypto/amcc/crypto4xx_alg.c b/drivers/crypto/amcc/crypto4xx_alg.c<br/>index e0af611a95d8..38e8a61e9166 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/amcc/crypto4xx_alg.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/amcc/crypto4xx_alg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/amcc/crypto4xx_alg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/amcc/crypto4xx_alg.c</a></div><div class='hunk'>@@ -12,9 +12,6 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock_types.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;linux/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/aead.h&gt;</div><div class='hunk'>@@ -72,7 +69,7 @@ static inline int crypto4xx_crypt(struct skcipher_request *req,</div><div class='ctx'> {</div><div class='ctx'> 	struct crypto_skcipher *cipher = crypto_skcipher_reqtfm(req);</div><div class='ctx'> 	struct crypto4xx_ctx *ctx = crypto_skcipher_ctx(cipher);</div><div class='del'>-	__le32 iv[AES_IV_SIZE];</div><div class='add'>+	__le32 iv[AES_IV_SIZE / 4];</div><div class='ctx'> </div><div class='ctx'> 	if (check_blocksize &amp;&amp; !IS_ALIGNED(req-&gt;cryptlen, AES_BLOCK_SIZE))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -429,7 +426,7 @@ static int crypto4xx_crypt_aes_ccm(struct aead_request *req, bool decrypt)</div><div class='ctx'> 	struct crypto4xx_ctx *ctx  = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='ctx'> 	struct crypto4xx_aead_reqctx *rctx = aead_request_ctx(req);</div><div class='ctx'> 	struct crypto_aead *aead = crypto_aead_reqtfm(req);</div><div class='del'>-	__le32 iv[16];</div><div class='add'>+	__le32 iv[4];</div><div class='ctx'> 	u32 tmp_sa[SA_AES128_CCM_LEN + 4];</div><div class='ctx'> 	struct dynamic_sa_ctl *sa = (struct dynamic_sa_ctl *)tmp_sa;</div><div class='ctx'> 	unsigned int len = req-&gt;cryptlen;</div><div class='hunk'>@@ -602,106 +599,3 @@ int crypto4xx_decrypt_aes_gcm(struct aead_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	return crypto4xx_crypt_aes_gcm(req, true);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * HASH SHA1 Functions</div><div class='del'>- */</div><div class='del'>-static int crypto4xx_hash_alg_init(struct crypto_tfm *tfm,</div><div class='del'>-				   unsigned int sa_len,</div><div class='del'>-				   unsigned char ha,</div><div class='del'>-				   unsigned char hm)</div><div class='del'>-{</div><div class='del'>-	struct crypto_alg *alg = tfm-&gt;__crt_alg;</div><div class='del'>-	struct crypto4xx_alg *my_alg;</div><div class='del'>-	struct crypto4xx_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='del'>-	struct dynamic_sa_hash160 *sa;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	my_alg = container_of(__crypto_ahash_alg(alg), struct crypto4xx_alg,</div><div class='del'>-			      alg.u.hash);</div><div class='del'>-	ctx-&gt;dev   = my_alg-&gt;dev;</div><div class='del'>-</div><div class='del'>-	/* Create SA */</div><div class='del'>-	if (ctx-&gt;sa_in || ctx-&gt;sa_out)</div><div class='del'>-		crypto4xx_free_sa(ctx);</div><div class='del'>-</div><div class='del'>-	rc = crypto4xx_alloc_sa(ctx, sa_len);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),</div><div class='del'>-				 sizeof(struct crypto4xx_ctx));</div><div class='del'>-	sa = (struct dynamic_sa_hash160 *)ctx-&gt;sa_in;</div><div class='del'>-	set_dynamic_sa_command_0(&amp;sa-&gt;ctrl, SA_SAVE_HASH, SA_NOT_SAVE_IV,</div><div class='del'>-				 SA_NOT_LOAD_HASH, SA_LOAD_IV_FROM_SA,</div><div class='del'>-				 SA_NO_HEADER_PROC, ha, SA_CIPHER_ALG_NULL,</div><div class='del'>-				 SA_PAD_TYPE_ZERO, SA_OP_GROUP_BASIC,</div><div class='del'>-				 SA_OPCODE_HASH, DIR_INBOUND);</div><div class='del'>-	set_dynamic_sa_command_1(&amp;sa-&gt;ctrl, 0, SA_HASH_MODE_HASH,</div><div class='del'>-				 CRYPTO_FEEDBACK_MODE_NO_FB, SA_EXTENDED_SN_OFF,</div><div class='del'>-				 SA_SEQ_MASK_OFF, SA_MC_ENABLE,</div><div class='del'>-				 SA_NOT_COPY_PAD, SA_NOT_COPY_PAYLOAD,</div><div class='del'>-				 SA_NOT_COPY_HDR);</div><div class='del'>-	/* Need to zero hash digest in SA */</div><div class='del'>-	memset(sa-&gt;inner_digest, 0, sizeof(sa-&gt;inner_digest));</div><div class='del'>-	memset(sa-&gt;outer_digest, 0, sizeof(sa-&gt;outer_digest));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto4xx_hash_init(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='del'>-	int ds;</div><div class='del'>-	struct dynamic_sa_ctl *sa;</div><div class='del'>-</div><div class='del'>-	sa = ctx-&gt;sa_in;</div><div class='del'>-	ds = crypto_ahash_digestsize(</div><div class='del'>-			__crypto_ahash_cast(req-&gt;base.tfm));</div><div class='del'>-	sa-&gt;sa_command_0.bf.digest_len = ds &gt;&gt; 2;</div><div class='del'>-	sa-&gt;sa_command_0.bf.load_hash_state = SA_LOAD_HASH_FROM_SA;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto4xx_hash_update(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='del'>-	struct scatterlist dst;</div><div class='del'>-	unsigned int ds = crypto_ahash_digestsize(ahash);</div><div class='del'>-</div><div class='del'>-	sg_init_one(&amp;dst, req-&gt;result, ds);</div><div class='del'>-</div><div class='del'>-	return crypto4xx_build_pd(&amp;req-&gt;base, ctx, req-&gt;src, &amp;dst,</div><div class='del'>-				  req-&gt;nbytes, NULL, 0, ctx-&gt;sa_in,</div><div class='del'>-				  ctx-&gt;sa_len, 0, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto4xx_hash_final(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int crypto4xx_hash_digest(struct ahash_request *req)</div><div class='del'>-{</div><div class='del'>-	struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req-&gt;base.tfm);</div><div class='del'>-	struct scatterlist dst;</div><div class='del'>-	unsigned int ds = crypto_ahash_digestsize(ahash);</div><div class='del'>-</div><div class='del'>-	sg_init_one(&amp;dst, req-&gt;result, ds);</div><div class='del'>-</div><div class='del'>-	return crypto4xx_build_pd(&amp;req-&gt;base, ctx, req-&gt;src, &amp;dst,</div><div class='del'>-				  req-&gt;nbytes, NULL, 0, ctx-&gt;sa_in,</div><div class='del'>-				  ctx-&gt;sa_len, 0, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SHA1 Algorithm</div><div class='del'>- */</div><div class='del'>-int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm)</div><div class='del'>-{</div><div class='del'>-	return crypto4xx_hash_alg_init(tfm, SA_HASH160_LEN, SA_HASH_ALG_SHA1,</div><div class='del'>-				       SA_HASH_MODE_HASH);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c<br/>index ec3ccfa60445..8cdc66d520c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/amcc/crypto4xx_core.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/amcc/crypto4xx_core.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/amcc/crypto4xx_core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/amcc/crypto4xx_core.c</a></div><div class='hunk'>@@ -485,18 +485,6 @@ static void crypto4xx_copy_pkt_to_dst(struct crypto4xx_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void crypto4xx_copy_digest_to_dst(void *dst,</div><div class='del'>-					struct pd_uinfo *pd_uinfo,</div><div class='del'>-					struct crypto4xx_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	struct dynamic_sa_ctl *sa = (struct dynamic_sa_ctl *) ctx-&gt;sa_in;</div><div class='del'>-</div><div class='del'>-	if (sa-&gt;sa_command_0.bf.hash_alg == SA_HASH_ALG_SHA1) {</div><div class='del'>-		memcpy(dst, pd_uinfo-&gt;sr_va-&gt;save_digest,</div><div class='del'>-		       SA_HASH_ALG_SHA1_DIGEST_SIZE);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void crypto4xx_ret_sg_desc(struct crypto4xx_device *dev,</div><div class='ctx'> 				  struct pd_uinfo *pd_uinfo)</div><div class='ctx'> {</div><div class='hunk'>@@ -549,23 +537,6 @@ static void crypto4xx_cipher_done(struct crypto4xx_device *dev,</div><div class='ctx'> 	skcipher_request_complete(req, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void crypto4xx_ahash_done(struct crypto4xx_device *dev,</div><div class='del'>-				struct pd_uinfo *pd_uinfo)</div><div class='del'>-{</div><div class='del'>-	struct crypto4xx_ctx *ctx;</div><div class='del'>-	struct ahash_request *ahash_req;</div><div class='del'>-</div><div class='del'>-	ahash_req = ahash_request_cast(pd_uinfo-&gt;async_req);</div><div class='del'>-	ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(ahash_req));</div><div class='del'>-</div><div class='del'>-	crypto4xx_copy_digest_to_dst(ahash_req-&gt;result, pd_uinfo, ctx);</div><div class='del'>-	crypto4xx_ret_sg_desc(dev, pd_uinfo);</div><div class='del'>-</div><div class='del'>-	if (pd_uinfo-&gt;state &amp; PD_ENTRY_BUSY)</div><div class='del'>-		ahash_request_complete(ahash_req, -EINPROGRESS);</div><div class='del'>-	ahash_request_complete(ahash_req, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void crypto4xx_aead_done(struct crypto4xx_device *dev,</div><div class='ctx'> 				struct pd_uinfo *pd_uinfo,</div><div class='ctx'> 				struct ce_pd *pd)</div><div class='hunk'>@@ -642,9 +613,6 @@ static void crypto4xx_pd_done(struct crypto4xx_device *dev, u32 idx)</div><div class='ctx'> 	case CRYPTO_ALG_TYPE_AEAD:</div><div class='ctx'> 		crypto4xx_aead_done(dev, pd_uinfo, pd);</div><div class='ctx'> 		break;</div><div class='del'>-	case CRYPTO_ALG_TYPE_AHASH:</div><div class='del'>-		crypto4xx_ahash_done(dev, pd_uinfo);</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -676,7 +644,7 @@ int crypto4xx_build_pd(struct crypto_async_request *req,</div><div class='ctx'> 		       struct scatterlist *src,</div><div class='ctx'> 		       struct scatterlist *dst,</div><div class='ctx'> 		       const unsigned int datalen,</div><div class='del'>-		       const __le32 *iv, const u32 iv_len,</div><div class='add'>+		       const void *iv, const u32 iv_len,</div><div class='ctx'> 		       const struct dynamic_sa_ctl *req_sa,</div><div class='ctx'> 		       const unsigned int sa_len,</div><div class='ctx'> 		       const unsigned int assoclen,</div><div class='hunk'>@@ -912,8 +880,7 @@ int crypto4xx_build_pd(struct crypto_async_request *req,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pd-&gt;pd_ctl.w = PD_CTL_HOST_READY |</div><div class='del'>-		((crypto_tfm_alg_type(req-&gt;tfm) == CRYPTO_ALG_TYPE_AHASH) ||</div><div class='del'>-		 (crypto_tfm_alg_type(req-&gt;tfm) == CRYPTO_ALG_TYPE_AEAD) ?</div><div class='add'>+		((crypto_tfm_alg_type(req-&gt;tfm) == CRYPTO_ALG_TYPE_AEAD) ?</div><div class='ctx'> 			PD_CTL_HASH_FINAL : 0);</div><div class='ctx'> 	pd-&gt;pd_ctl_len.w = 0x00400000 | (assoclen + datalen);</div><div class='ctx'> 	pd_uinfo-&gt;state = PD_ENTRY_INUSE | (is_busy ? PD_ENTRY_BUSY : 0);</div><div class='hunk'>@@ -1019,10 +986,6 @@ static int crypto4xx_register_alg(struct crypto4xx_device *sec_dev,</div><div class='ctx'> 			rc = crypto_register_aead(&amp;alg-&gt;alg.u.aead);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		case CRYPTO_ALG_TYPE_AHASH:</div><div class='del'>-			rc = crypto_register_ahash(&amp;alg-&gt;alg.u.hash);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		case CRYPTO_ALG_TYPE_RNG:</div><div class='ctx'> 			rc = crypto_register_rng(&amp;alg-&gt;alg.u.rng);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1048,10 +1011,6 @@ static void crypto4xx_unregister_alg(struct crypto4xx_device *sec_dev)</div><div class='ctx'> 	list_for_each_entry_safe(alg, tmp, &amp;sec_dev-&gt;alg_list, entry) {</div><div class='ctx'> 		list_del(&amp;alg-&gt;entry);</div><div class='ctx'> 		switch (alg-&gt;alg.type) {</div><div class='del'>-		case CRYPTO_ALG_TYPE_AHASH:</div><div class='del'>-			crypto_unregister_ahash(&amp;alg-&gt;alg.u.hash);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		case CRYPTO_ALG_TYPE_AEAD:</div><div class='ctx'> 			crypto_unregister_aead(&amp;alg-&gt;alg.u.aead);</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/drivers/crypto/amcc/crypto4xx_core.h b/drivers/crypto/amcc/crypto4xx_core.h<br/>index 3adcc5e65694..ee36630c670f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/amcc/crypto4xx_core.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/amcc/crypto4xx_core.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/amcc/crypto4xx_core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/amcc/crypto4xx_core.h</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> #include &lt;linux/ratelimit.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/rng.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/skcipher.h&gt;</div><div class='hunk'>@@ -135,7 +134,6 @@ struct crypto4xx_alg_common {</div><div class='ctx'> 	u32 type;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct skcipher_alg cipher;</div><div class='del'>-		struct ahash_alg hash;</div><div class='ctx'> 		struct aead_alg aead;</div><div class='ctx'> 		struct rng_alg rng;</div><div class='ctx'> 	} u;</div><div class='hunk'>@@ -147,6 +145,12 @@ struct crypto4xx_alg {</div><div class='ctx'> 	struct crypto4xx_device *dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_CC_IS_GCC) &amp;&amp; CONFIG_GCC_VERSION &gt;= 120000</div><div class='add'>+#define BUILD_PD_ACCESS __attribute__((access(read_only, 6, 7)))</div><div class='add'>+#else</div><div class='add'>+#define BUILD_PD_ACCESS</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);</div><div class='ctx'> void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);</div><div class='ctx'> int crypto4xx_build_pd(struct crypto_async_request *req,</div><div class='hunk'>@@ -154,11 +158,11 @@ int crypto4xx_build_pd(struct crypto_async_request *req,</div><div class='ctx'> 		       struct scatterlist *src,</div><div class='ctx'> 		       struct scatterlist *dst,</div><div class='ctx'> 		       const unsigned int datalen,</div><div class='del'>-		       const __le32 *iv, const u32 iv_len,</div><div class='add'>+		       const void *iv, const u32 iv_len,</div><div class='ctx'> 		       const struct dynamic_sa_ctl *sa,</div><div class='ctx'> 		       const unsigned int sa_len,</div><div class='ctx'> 		       const unsigned int assoclen,</div><div class='del'>-		       struct scatterlist *dst_tmp);</div><div class='add'>+		       struct scatterlist *dst_tmp) BUILD_PD_ACCESS;</div><div class='ctx'> int crypto4xx_setkey_aes_cbc(struct crypto_skcipher *cipher,</div><div class='ctx'> 			     const u8 *key, unsigned int keylen);</div><div class='ctx'> int crypto4xx_setkey_aes_ctr(struct crypto_skcipher *cipher,</div><div class='hunk'>@@ -177,11 +181,6 @@ int crypto4xx_encrypt_noiv_block(struct skcipher_request *req);</div><div class='ctx'> int crypto4xx_decrypt_noiv_block(struct skcipher_request *req);</div><div class='ctx'> int crypto4xx_rfc3686_encrypt(struct skcipher_request *req);</div><div class='ctx'> int crypto4xx_rfc3686_decrypt(struct skcipher_request *req);</div><div class='del'>-int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);</div><div class='del'>-int crypto4xx_hash_digest(struct ahash_request *req);</div><div class='del'>-int crypto4xx_hash_final(struct ahash_request *req);</div><div class='del'>-int crypto4xx_hash_update(struct ahash_request *req);</div><div class='del'>-int crypto4xx_hash_init(struct ahash_request *req);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Note: Only use this function to copy items that is word aligned.</div><div class='head'>diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c<br/>index 14bf86957d31..27c5d000b4b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-aes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-aes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/atmel-aes.c</a></div><div class='hunk'>@@ -1743,7 +1743,8 @@ static struct skcipher_alg aes_xts_alg = {</div><div class='ctx'> 	.base.cra_driver_name	= "atmel-xts-aes",</div><div class='ctx'> 	.base.cra_blocksize	= AES_BLOCK_SIZE,</div><div class='ctx'> 	.base.cra_ctxsize	= sizeof(struct atmel_aes_xts_ctx),</div><div class='del'>-	.base.cra_flags		= CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+	.base.cra_flags		= CRYPTO_ALG_NEED_FALLBACK |</div><div class='add'>+				  CRYPTO_ALG_KERN_DRIVER_ONLY,</div><div class='ctx'> </div><div class='ctx'> 	.min_keysize		= 2 * AES_MIN_KEY_SIZE,</div><div class='ctx'> 	.max_keysize		= 2 * AES_MAX_KEY_SIZE,</div><div class='hunk'>@@ -2220,7 +2221,7 @@ static void atmel_aes_unregister_algs(struct atmel_aes_dev *dd)</div><div class='ctx'> </div><div class='ctx'> static void atmel_aes_crypto_alg_init(struct crypto_alg *alg)</div><div class='ctx'> {</div><div class='del'>-	alg-&gt;cra_flags |= CRYPTO_ALG_ASYNC;</div><div class='add'>+	alg-&gt;cra_flags |= CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;</div><div class='ctx'> 	alg-&gt;cra_alignmask = 0xf;</div><div class='ctx'> 	alg-&gt;cra_priority = ATMEL_AES_PRIORITY;</div><div class='ctx'> 	alg-&gt;cra_module = THIS_MODULE;</div><div class='head'>diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c<br/>index 67a170608566..2cc36da163e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-sha.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-sha.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-sha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/atmel-sha.c</a></div><div class='hunk'>@@ -1254,7 +1254,8 @@ static int atmel_sha_cra_init(struct crypto_tfm *tfm)</div><div class='ctx'> static void atmel_sha_alg_init(struct ahash_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	alg-&gt;halg.base.cra_priority = ATMEL_SHA_PRIORITY;</div><div class='del'>-	alg-&gt;halg.base.cra_flags = CRYPTO_ALG_ASYNC;</div><div class='add'>+	alg-&gt;halg.base.cra_flags = CRYPTO_ALG_ASYNC |</div><div class='add'>+				   CRYPTO_ALG_KERN_DRIVER_ONLY;</div><div class='ctx'> 	alg-&gt;halg.base.cra_ctxsize = sizeof(struct atmel_sha_ctx);</div><div class='ctx'> 	alg-&gt;halg.base.cra_module = THIS_MODULE;</div><div class='ctx'> 	alg-&gt;halg.base.cra_init = atmel_sha_cra_init;</div><div class='hunk'>@@ -2041,7 +2042,8 @@ static void atmel_sha_hmac_cra_exit(struct crypto_tfm *tfm)</div><div class='ctx'> static void atmel_sha_hmac_alg_init(struct ahash_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	alg-&gt;halg.base.cra_priority = ATMEL_SHA_PRIORITY;</div><div class='del'>-	alg-&gt;halg.base.cra_flags = CRYPTO_ALG_ASYNC;</div><div class='add'>+	alg-&gt;halg.base.cra_flags = CRYPTO_ALG_ASYNC |</div><div class='add'>+				   CRYPTO_ALG_KERN_DRIVER_ONLY;</div><div class='ctx'> 	alg-&gt;halg.base.cra_ctxsize = sizeof(struct atmel_sha_hmac_ctx);</div><div class='ctx'> 	alg-&gt;halg.base.cra_module = THIS_MODULE;</div><div class='ctx'> 	alg-&gt;halg.base.cra_init	= atmel_sha_hmac_cra_init;</div><div class='head'>diff --git a/drivers/crypto/atmel-sha204a.c b/drivers/crypto/atmel-sha204a.c<br/>index 75bebec2c757..0fcf4a39de27 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-sha204a.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-sha204a.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-sha204a.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/atmel-sha204a.c</a></div><div class='hunk'>@@ -163,6 +163,12 @@ static int atmel_sha204a_probe(struct i2c_client *client)</div><div class='ctx'> 	i2c_priv-&gt;hwrng.name = dev_name(&amp;client-&gt;dev);</div><div class='ctx'> 	i2c_priv-&gt;hwrng.read = atmel_sha204a_rng_read;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * According to review by Bill Cox [1], this HWRNG has very low entropy.</div><div class='add'>+	 * [1] https://www.metzdowd.com/pipermail/cryptography/2014-December/023858.html</div><div class='add'>+	 */</div><div class='add'>+	i2c_priv-&gt;hwrng.quality = 1;</div><div class='add'>+</div><div class='ctx'> 	ret = devm_hwrng_register(&amp;client-&gt;dev, &amp;i2c_priv-&gt;hwrng);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_warn(&amp;client-&gt;dev, "failed to register RNG (%d)\n", ret);</div><div class='head'>diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c<br/>index de9717e221e4..098f5532f389 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-tdes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/atmel-tdes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/atmel-tdes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/atmel-tdes.c</a></div><div class='hunk'>@@ -785,7 +785,7 @@ static int atmel_tdes_init_tfm(struct crypto_skcipher *tfm)</div><div class='ctx'> static void atmel_tdes_skcipher_alg_init(struct skcipher_alg *alg)</div><div class='ctx'> {</div><div class='ctx'> 	alg-&gt;base.cra_priority = ATMEL_TDES_PRIORITY;</div><div class='del'>-	alg-&gt;base.cra_flags = CRYPTO_ALG_ASYNC;</div><div class='add'>+	alg-&gt;base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;</div><div class='ctx'> 	alg-&gt;base.cra_ctxsize = sizeof(struct atmel_tdes_ctx);</div><div class='ctx'> 	alg-&gt;base.cra_module = THIS_MODULE;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c<br/>index d4b39184dbdb..38ff931059b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/caam/ctrl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/caam/ctrl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/caam/ctrl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/caam/ctrl.c</a></div><div class='hunk'>@@ -573,6 +573,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {</div><div class='ctx'> 	{ .soc_id = "i.MX7*",  .data = &amp;caam_imx7_data },</div><div class='ctx'> 	{ .soc_id = "i.MX8M*", .data = &amp;caam_imx7_data },</div><div class='ctx'> 	{ .soc_id = "i.MX8ULP", .data = &amp;caam_imx8ulp_data },</div><div class='add'>+	{ .soc_id = "i.MX8QM", .data = &amp;caam_imx8ulp_data },</div><div class='ctx'> 	{ .soc_id = "VF*",     .data = &amp;caam_vf610_data },</div><div class='ctx'> 	{ .family = "Freescale i.MX" },</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='head'>diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c<br/>index 7701d00bcb3a..b6e7c0b29d4e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/caam/qi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/caam/qi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/caam/qi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/caam/qi.c</a></div><div class='hunk'>@@ -122,12 +122,12 @@ int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req)</div><div class='ctx'> 	qm_fd_addr_set64(&amp;fd, addr);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='add'>+		refcount_inc(&amp;req-&gt;drv_ctx-&gt;refcnt);</div><div class='ctx'> 		ret = qman_enqueue(req-&gt;drv_ctx-&gt;req_fq, &amp;fd);</div><div class='del'>-		if (likely(!ret)) {</div><div class='del'>-			refcount_inc(&amp;req-&gt;drv_ctx-&gt;refcnt);</div><div class='add'>+		if (likely(!ret))</div><div class='ctx'> 			return 0;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='add'>+		refcount_dec(&amp;req-&gt;drv_ctx-&gt;refcnt);</div><div class='ctx'> 		if (ret != -EBUSY)</div><div class='ctx'> 			break;</div><div class='ctx'> 		num_retries++;</div><div class='head'>diff --git a/drivers/crypto/cavium/Makefile b/drivers/crypto/cavium/Makefile<br/>index 4679c06b611f..75227c587ed0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/cavium/Makefile</a></div><div class='hunk'>@@ -2,4 +2,5 @@</div><div class='ctx'> #</div><div class='ctx'> # Makefile for Cavium crypto device drivers</div><div class='ctx'> #</div><div class='del'>-obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += zip/</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_CPT) += cpt/</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_NITROX) += nitrox/</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/Makefile b/drivers/crypto/cavium/zip/Makefile<br/>deleted file mode 100644<br/>index 020d189d793d..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-#</div><div class='del'>-# Makefile for Cavium's ZIP Driver.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CRYPTO_DEV_CAVIUM_ZIP) += thunderx_zip.o</div><div class='del'>-thunderx_zip-y := zip_main.o    \</div><div class='del'>-                  zip_device.o  \</div><div class='del'>-                  zip_crypto.o  \</div><div class='del'>-                  zip_mem.o     \</div><div class='del'>-                  zip_deflate.o \</div><div class='del'>-                  zip_inflate.o</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/common.h b/drivers/crypto/cavium/zip/common.h<br/>deleted file mode 100644<br/>index 54f6fb054119..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/common.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/common.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,222 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __COMMON_H__</div><div class='del'>-#define __COMMON_H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-</div><div class='del'>-/* Device specific zlib function definitions */</div><div class='del'>-#include "zip_device.h"</div><div class='del'>-</div><div class='del'>-/* ZIP device definitions */</div><div class='del'>-#include "zip_main.h"</div><div class='del'>-</div><div class='del'>-/* ZIP memory allocation/deallocation related definitions */</div><div class='del'>-#include "zip_mem.h"</div><div class='del'>-</div><div class='del'>-/* Device specific structure definitions */</div><div class='del'>-#include "zip_regs.h"</div><div class='del'>-</div><div class='del'>-#define ZIP_ERROR    -1</div><div class='del'>-</div><div class='del'>-#define ZIP_FLUSH_FINISH  4</div><div class='del'>-</div><div class='del'>-#define RAW_FORMAT		0  /* for rawpipe */</div><div class='del'>-#define ZLIB_FORMAT		1  /* for zpipe */</div><div class='del'>-#define GZIP_FORMAT		2  /* for gzpipe */</div><div class='del'>-#define LZS_FORMAT		3  /* for lzspipe */</div><div class='del'>-</div><div class='del'>-/* Max number of ZIP devices supported */</div><div class='del'>-#define MAX_ZIP_DEVICES		2</div><div class='del'>-</div><div class='del'>-/* Configures the number of zip queues to be used */</div><div class='del'>-#define ZIP_NUM_QUEUES		2</div><div class='del'>-</div><div class='del'>-#define DYNAMIC_STOP_EXCESS	1024</div><div class='del'>-</div><div class='del'>-/* Maximum buffer sizes in direct mode */</div><div class='del'>-#define MAX_INPUT_BUFFER_SIZE   (64 * 1024)</div><div class='del'>-#define MAX_OUTPUT_BUFFER_SIZE  (64 * 1024)</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct zip_operation - common data structure for comp and decomp operations</div><div class='del'>- * @input:               Next input byte is read from here</div><div class='del'>- * @output:              Next output byte written here</div><div class='del'>- * @ctx_addr:            Inflate context buffer address</div><div class='del'>- * @history:             Pointer to the history buffer</div><div class='del'>- * @input_len:           Number of bytes available at next_in</div><div class='del'>- * @input_total_len:     Total number of input bytes read</div><div class='del'>- * @output_len:          Remaining free space at next_out</div><div class='del'>- * @output_total_len:    Total number of bytes output so far</div><div class='del'>- * @csum:                Checksum value of the uncompressed data</div><div class='del'>- * @flush:               Flush flag</div><div class='del'>- * @format:              Format (depends on stream's wrap)</div><div class='del'>- * @speed:               Speed depends on stream's level</div><div class='del'>- * @ccode:               Compression code ( stream's strategy)</div><div class='del'>- * @lzs_flag:            Flag for LZS support</div><div class='del'>- * @begin_file:          Beginning of file indication for inflate</div><div class='del'>- * @history_len:         Size of the history data</div><div class='del'>- * @end_file:            Ending of the file indication for inflate</div><div class='del'>- * @compcode:            Completion status of the ZIP invocation</div><div class='del'>- * @bytes_read:          Input bytes read in current instruction</div><div class='del'>- * @bits_processed:      Total bits processed for entire file</div><div class='del'>- * @sizeofptr:           To distinguish between ILP32 and LP64</div><div class='del'>- * @sizeofzops:          Optional just for padding</div><div class='del'>- *</div><div class='del'>- * This structure is used to maintain the required meta data for the</div><div class='del'>- * comp and decomp operations.</div><div class='del'>- */</div><div class='del'>-struct zip_operation {</div><div class='del'>-	u8    *input;</div><div class='del'>-	u8    *output;</div><div class='del'>-	u64   ctx_addr;</div><div class='del'>-	u64   history;</div><div class='del'>-</div><div class='del'>-	u32   input_len;</div><div class='del'>-	u32   input_total_len;</div><div class='del'>-</div><div class='del'>-	u32   output_len;</div><div class='del'>-	u32   output_total_len;</div><div class='del'>-</div><div class='del'>-	u32   csum;</div><div class='del'>-	u32   flush;</div><div class='del'>-</div><div class='del'>-	u32   format;</div><div class='del'>-	u32   speed;</div><div class='del'>-	u32   ccode;</div><div class='del'>-	u32   lzs_flag;</div><div class='del'>-</div><div class='del'>-	u32   begin_file;</div><div class='del'>-	u32   history_len;</div><div class='del'>-</div><div class='del'>-	u32   end_file;</div><div class='del'>-	u32   compcode;</div><div class='del'>-	u32   bytes_read;</div><div class='del'>-	u32   bits_processed;</div><div class='del'>-</div><div class='del'>-	u32   sizeofptr;</div><div class='del'>-	u32   sizeofzops;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline int zip_poll_result(union zip_zres_s *result)</div><div class='del'>-{</div><div class='del'>-	int retries = 1000;</div><div class='del'>-</div><div class='del'>-	while (!result-&gt;s.compcode) {</div><div class='del'>-		if (!--retries) {</div><div class='del'>-			pr_err("ZIP ERR: request timed out");</div><div class='del'>-			return -ETIMEDOUT;</div><div class='del'>-		}</div><div class='del'>-		udelay(10);</div><div class='del'>-		/*</div><div class='del'>-		 * Force re-reading of compcode which is updated</div><div class='del'>-		 * by the ZIP coprocessor.</div><div class='del'>-		 */</div><div class='del'>-		rmb();</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* error messages */</div><div class='del'>-#define zip_err(fmt, args...) pr_err("ZIP ERR:%s():%d: " \</div><div class='del'>-			      fmt "\n", __func__, __LINE__, ## args)</div><div class='del'>-</div><div class='del'>-#ifdef MSG_ENABLE</div><div class='del'>-/* Enable all messages */</div><div class='del'>-#define zip_msg(fmt, args...) pr_info("ZIP_MSG:" fmt "\n", ## args)</div><div class='del'>-#else</div><div class='del'>-#define zip_msg(fmt, args...)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if defined(ZIP_DEBUG_ENABLE) &amp;&amp; defined(MSG_ENABLE)</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG_LEVEL</div><div class='del'>-</div><div class='del'>-#define FILE_NAME (strrchr(__FILE__, '/') ? strrchr(__FILE__, '/') + 1 : \</div><div class='del'>-	strrchr(__FILE__, '\\') ? strrchr(__FILE__, '\\') + 1 : __FILE__)</div><div class='del'>-</div><div class='del'>-#if DEBUG_LEVEL &gt;= 4</div><div class='del'>-</div><div class='del'>-#define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s: %s() : %d: " \</div><div class='del'>-			      fmt "\n", FILE_NAME, __func__, __LINE__, ## args)</div><div class='del'>-</div><div class='del'>-#elif DEBUG_LEVEL &gt;= 3</div><div class='del'>-</div><div class='del'>-#define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s: %s() : %d: " \</div><div class='del'>-			      fmt "\n", FILE_NAME, __func__, __LINE__, ## args)</div><div class='del'>-</div><div class='del'>-#elif DEBUG_LEVEL &gt;= 2</div><div class='del'>-</div><div class='del'>-#define zip_dbg(fmt, args...) pr_info("ZIP DBG: %s() : %d: " \</div><div class='del'>-			      fmt "\n", __func__, __LINE__, ## args)</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define zip_dbg(fmt, args...) pr_info("ZIP DBG:" fmt "\n", ## args)</div><div class='del'>-</div><div class='del'>-#endif /* DEBUG LEVEL &gt;=4 */</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define zip_dbg(fmt, args...) pr_info("ZIP DBG:" fmt "\n", ## args)</div><div class='del'>-</div><div class='del'>-#endif /* DEBUG_LEVEL */</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-#define zip_dbg(fmt, args...)</div><div class='del'>-</div><div class='del'>-#endif /* ZIP_DEBUG_ENABLE &amp;&amp; MSG_ENABLE*/</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_crypto.c b/drivers/crypto/cavium/zip/zip_crypto.c<br/>deleted file mode 100644<br/>index 02e87f2d50db..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_crypto.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_crypto.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,261 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#include "zip_crypto.h"</div><div class='del'>-</div><div class='del'>-static void zip_static_init_zip_ops(struct zip_operation *zip_ops,</div><div class='del'>-				    int lzs_flag)</div><div class='del'>-{</div><div class='del'>-	zip_ops-&gt;flush        = ZIP_FLUSH_FINISH;</div><div class='del'>-</div><div class='del'>-	/* equivalent to level 6 of opensource zlib */</div><div class='del'>-	zip_ops-&gt;speed          = 1;</div><div class='del'>-</div><div class='del'>-	if (!lzs_flag) {</div><div class='del'>-		zip_ops-&gt;ccode		= 0; /* Auto Huffman */</div><div class='del'>-		zip_ops-&gt;lzs_flag	= 0;</div><div class='del'>-		zip_ops-&gt;format		= ZLIB_FORMAT;</div><div class='del'>-	} else {</div><div class='del'>-		zip_ops-&gt;ccode		= 3; /* LZS Encoding */</div><div class='del'>-		zip_ops-&gt;lzs_flag	= 1;</div><div class='del'>-		zip_ops-&gt;format		= LZS_FORMAT;</div><div class='del'>-	}</div><div class='del'>-	zip_ops-&gt;begin_file   = 1;</div><div class='del'>-	zip_ops-&gt;history_len  = 0;</div><div class='del'>-	zip_ops-&gt;end_file     = 1;</div><div class='del'>-	zip_ops-&gt;compcode     = 0;</div><div class='del'>-	zip_ops-&gt;csum	      = 1; /* Adler checksum desired */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int zip_ctx_init(struct zip_kernel_ctx *zip_ctx, int lzs_flag)</div><div class='del'>-{</div><div class='del'>-	struct zip_operation  *comp_ctx   = &amp;zip_ctx-&gt;zip_comp;</div><div class='del'>-	struct zip_operation  *decomp_ctx = &amp;zip_ctx-&gt;zip_decomp;</div><div class='del'>-</div><div class='del'>-	zip_static_init_zip_ops(comp_ctx, lzs_flag);</div><div class='del'>-	zip_static_init_zip_ops(decomp_ctx, lzs_flag);</div><div class='del'>-</div><div class='del'>-	comp_ctx-&gt;input  = zip_data_buf_alloc(MAX_INPUT_BUFFER_SIZE);</div><div class='del'>-	if (!comp_ctx-&gt;input)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	comp_ctx-&gt;output = zip_data_buf_alloc(MAX_OUTPUT_BUFFER_SIZE);</div><div class='del'>-	if (!comp_ctx-&gt;output)</div><div class='del'>-		goto err_comp_input;</div><div class='del'>-</div><div class='del'>-	decomp_ctx-&gt;input  = zip_data_buf_alloc(MAX_INPUT_BUFFER_SIZE);</div><div class='del'>-	if (!decomp_ctx-&gt;input)</div><div class='del'>-		goto err_comp_output;</div><div class='del'>-</div><div class='del'>-	decomp_ctx-&gt;output = zip_data_buf_alloc(MAX_OUTPUT_BUFFER_SIZE);</div><div class='del'>-	if (!decomp_ctx-&gt;output)</div><div class='del'>-		goto err_decomp_input;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_decomp_input:</div><div class='del'>-	zip_data_buf_free(decomp_ctx-&gt;input, MAX_INPUT_BUFFER_SIZE);</div><div class='del'>-</div><div class='del'>-err_comp_output:</div><div class='del'>-	zip_data_buf_free(comp_ctx-&gt;output, MAX_OUTPUT_BUFFER_SIZE);</div><div class='del'>-</div><div class='del'>-err_comp_input:</div><div class='del'>-	zip_data_buf_free(comp_ctx-&gt;input, MAX_INPUT_BUFFER_SIZE);</div><div class='del'>-</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void zip_ctx_exit(struct zip_kernel_ctx *zip_ctx)</div><div class='del'>-{</div><div class='del'>-	struct zip_operation  *comp_ctx   = &amp;zip_ctx-&gt;zip_comp;</div><div class='del'>-	struct zip_operation  *dec_ctx = &amp;zip_ctx-&gt;zip_decomp;</div><div class='del'>-</div><div class='del'>-	zip_data_buf_free(comp_ctx-&gt;input, MAX_INPUT_BUFFER_SIZE);</div><div class='del'>-	zip_data_buf_free(comp_ctx-&gt;output, MAX_OUTPUT_BUFFER_SIZE);</div><div class='del'>-</div><div class='del'>-	zip_data_buf_free(dec_ctx-&gt;input, MAX_INPUT_BUFFER_SIZE);</div><div class='del'>-	zip_data_buf_free(dec_ctx-&gt;output, MAX_OUTPUT_BUFFER_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int zip_compress(const u8 *src, unsigned int slen,</div><div class='del'>-		 u8 *dst, unsigned int *dlen,</div><div class='del'>-		 struct zip_kernel_ctx *zip_ctx)</div><div class='del'>-{</div><div class='del'>-	struct zip_operation  *zip_ops   = NULL;</div><div class='del'>-	struct zip_state      *zip_state;</div><div class='del'>-	struct zip_device     *zip = NULL;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!zip_ctx || !src || !dst || !dlen)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	zip = zip_get_device(zip_get_node_id());</div><div class='del'>-	if (!zip)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	zip_state = kzalloc(sizeof(*zip_state), GFP_ATOMIC);</div><div class='del'>-	if (!zip_state)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	zip_ops = &amp;zip_ctx-&gt;zip_comp;</div><div class='del'>-</div><div class='del'>-	zip_ops-&gt;input_len  = slen;</div><div class='del'>-	zip_ops-&gt;output_len = *dlen;</div><div class='del'>-	memcpy(zip_ops-&gt;input, src, slen);</div><div class='del'>-</div><div class='del'>-	ret = zip_deflate(zip_ops, zip_state, zip);</div><div class='del'>-</div><div class='del'>-	if (!ret) {</div><div class='del'>-		*dlen = zip_ops-&gt;output_len;</div><div class='del'>-		memcpy(dst, zip_ops-&gt;output, *dlen);</div><div class='del'>-	}</div><div class='del'>-	kfree(zip_state);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int zip_decompress(const u8 *src, unsigned int slen,</div><div class='del'>-		   u8 *dst, unsigned int *dlen,</div><div class='del'>-		   struct zip_kernel_ctx *zip_ctx)</div><div class='del'>-{</div><div class='del'>-	struct zip_operation  *zip_ops   = NULL;</div><div class='del'>-	struct zip_state      *zip_state;</div><div class='del'>-	struct zip_device     *zip = NULL;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!zip_ctx || !src || !dst || !dlen)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	zip = zip_get_device(zip_get_node_id());</div><div class='del'>-	if (!zip)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	zip_state = kzalloc(sizeof(*zip_state), GFP_ATOMIC);</div><div class='del'>-	if (!zip_state)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	zip_ops = &amp;zip_ctx-&gt;zip_decomp;</div><div class='del'>-	memcpy(zip_ops-&gt;input, src, slen);</div><div class='del'>-</div><div class='del'>-	/* Work around for a bug in zlib which needs an extra bytes sometimes */</div><div class='del'>-	if (zip_ops-&gt;ccode != 3) /* Not LZS Encoding */</div><div class='del'>-		zip_ops-&gt;input[slen++] = 0;</div><div class='del'>-</div><div class='del'>-	zip_ops-&gt;input_len  = slen;</div><div class='del'>-	zip_ops-&gt;output_len = *dlen;</div><div class='del'>-</div><div class='del'>-	ret = zip_inflate(zip_ops, zip_state, zip);</div><div class='del'>-</div><div class='del'>-	if (!ret) {</div><div class='del'>-		*dlen = zip_ops-&gt;output_len;</div><div class='del'>-		memcpy(dst, zip_ops-&gt;output, *dlen);</div><div class='del'>-	}</div><div class='del'>-	kfree(zip_state);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* SCOMP framework start */</div><div class='del'>-void *zip_alloc_scomp_ctx_deflate(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	struct zip_kernel_ctx *zip_ctx;</div><div class='del'>-</div><div class='del'>-	zip_ctx = kzalloc(sizeof(*zip_ctx), GFP_KERNEL);</div><div class='del'>-	if (!zip_ctx)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	ret = zip_ctx_init(zip_ctx, 0);</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		kfree_sensitive(zip_ctx);</div><div class='del'>-		return ERR_PTR(ret);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return zip_ctx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void *zip_alloc_scomp_ctx_lzs(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	struct zip_kernel_ctx *zip_ctx;</div><div class='del'>-</div><div class='del'>-	zip_ctx = kzalloc(sizeof(*zip_ctx), GFP_KERNEL);</div><div class='del'>-	if (!zip_ctx)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	ret = zip_ctx_init(zip_ctx, 1);</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		kfree_sensitive(zip_ctx);</div><div class='del'>-		return ERR_PTR(ret);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return zip_ctx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void zip_free_scomp_ctx(void *ctx)</div><div class='del'>-{</div><div class='del'>-	struct zip_kernel_ctx *zip_ctx = ctx;</div><div class='del'>-</div><div class='del'>-	zip_ctx_exit(zip_ctx);</div><div class='del'>-	kfree_sensitive(zip_ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int zip_scomp_compress(struct crypto_scomp *tfm,</div><div class='del'>-		       const u8 *src, unsigned int slen,</div><div class='del'>-		       u8 *dst, unsigned int *dlen, void *ctx)</div><div class='del'>-{</div><div class='del'>-	struct zip_kernel_ctx *zip_ctx  = ctx;</div><div class='del'>-</div><div class='del'>-	return zip_compress(src, slen, dst, dlen, zip_ctx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int zip_scomp_decompress(struct crypto_scomp *tfm,</div><div class='del'>-			 const u8 *src, unsigned int slen,</div><div class='del'>-			 u8 *dst, unsigned int *dlen, void *ctx)</div><div class='del'>-{</div><div class='del'>-	struct zip_kernel_ctx *zip_ctx = ctx;</div><div class='del'>-</div><div class='del'>-	return zip_decompress(src, slen, dst, dlen, zip_ctx);</div><div class='del'>-} /* SCOMP framework end */</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_crypto.h b/drivers/crypto/cavium/zip/zip_crypto.h<br/>deleted file mode 100644<br/>index 10899ece2d1f..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_crypto.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_crypto.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,68 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __ZIP_CRYPTO_H__</div><div class='del'>-#define __ZIP_CRYPTO_H__</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/internal/scompress.h&gt;</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "zip_deflate.h"</div><div class='del'>-#include "zip_inflate.h"</div><div class='del'>-</div><div class='del'>-struct zip_kernel_ctx {</div><div class='del'>-	struct zip_operation zip_comp;</div><div class='del'>-	struct zip_operation zip_decomp;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void *zip_alloc_scomp_ctx_deflate(void);</div><div class='del'>-void *zip_alloc_scomp_ctx_lzs(void);</div><div class='del'>-void  zip_free_scomp_ctx(void *zip_ctx);</div><div class='del'>-int   zip_scomp_compress(struct crypto_scomp *tfm,</div><div class='del'>-			 const u8 *src, unsigned int slen,</div><div class='del'>-			 u8 *dst, unsigned int *dlen, void *ctx);</div><div class='del'>-int   zip_scomp_decompress(struct crypto_scomp *tfm,</div><div class='del'>-			   const u8 *src, unsigned int slen,</div><div class='del'>-			   u8 *dst, unsigned int *dlen, void *ctx);</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_deflate.c b/drivers/crypto/cavium/zip/zip_deflate.c<br/>deleted file mode 100644<br/>index d7133f857d67..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_deflate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_deflate.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,200 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "zip_deflate.h"</div><div class='del'>-</div><div class='del'>-/* Prepares the deflate zip command */</div><div class='del'>-static int prepare_zip_command(struct zip_operation *zip_ops,</div><div class='del'>-			       struct zip_state *s, union zip_inst_s *zip_cmd)</div><div class='del'>-{</div><div class='del'>-	union zip_zres_s *result_ptr = &amp;s-&gt;result;</div><div class='del'>-</div><div class='del'>-	memset(zip_cmd, 0, sizeof(s-&gt;zip_cmd));</div><div class='del'>-	memset(result_ptr, 0, sizeof(s-&gt;result));</div><div class='del'>-</div><div class='del'>-	/* IWORD #0 */</div><div class='del'>-	/* History gather */</div><div class='del'>-	zip_cmd-&gt;s.hg = 0;</div><div class='del'>-	/* compression enable = 1 for deflate */</div><div class='del'>-	zip_cmd-&gt;s.ce = 1;</div><div class='del'>-	/* sf (sync flush) */</div><div class='del'>-	zip_cmd-&gt;s.sf = 1;</div><div class='del'>-	/* ef (end of file) */</div><div class='del'>-	if (zip_ops-&gt;flush == ZIP_FLUSH_FINISH) {</div><div class='del'>-		zip_cmd-&gt;s.ef = 1;</div><div class='del'>-		zip_cmd-&gt;s.sf = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	zip_cmd-&gt;s.cc = zip_ops-&gt;ccode;</div><div class='del'>-	/* ss (compression speed/storage) */</div><div class='del'>-	zip_cmd-&gt;s.ss = zip_ops-&gt;speed;</div><div class='del'>-</div><div class='del'>-	/* IWORD #1 */</div><div class='del'>-	/* adler checksum */</div><div class='del'>-	zip_cmd-&gt;s.adlercrc32 = zip_ops-&gt;csum;</div><div class='del'>-	zip_cmd-&gt;s.historylength = zip_ops-&gt;history_len;</div><div class='del'>-	zip_cmd-&gt;s.dg = 0;</div><div class='del'>-</div><div class='del'>-	/* IWORD # 6 and 7 - compression input/history pointer */</div><div class='del'>-	zip_cmd-&gt;s.inp_ptr_addr.s.addr  = __pa(zip_ops-&gt;input);</div><div class='del'>-	zip_cmd-&gt;s.inp_ptr_ctl.s.length = (zip_ops-&gt;input_len +</div><div class='del'>-					   zip_ops-&gt;history_len);</div><div class='del'>-	zip_cmd-&gt;s.ds = 0;</div><div class='del'>-</div><div class='del'>-	/* IWORD # 8 and 9 - Output pointer */</div><div class='del'>-	zip_cmd-&gt;s.out_ptr_addr.s.addr  = __pa(zip_ops-&gt;output);</div><div class='del'>-	zip_cmd-&gt;s.out_ptr_ctl.s.length = zip_ops-&gt;output_len;</div><div class='del'>-	/* maximum number of output-stream bytes that can be written */</div><div class='del'>-	zip_cmd-&gt;s.totaloutputlength    = zip_ops-&gt;output_len;</div><div class='del'>-</div><div class='del'>-	/* IWORD # 10 and 11 - Result pointer */</div><div class='del'>-	zip_cmd-&gt;s.res_ptr_addr.s.addr = __pa(result_ptr);</div><div class='del'>-	/* Clearing completion code */</div><div class='del'>-	result_ptr-&gt;s.compcode = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_deflate - API to offload deflate operation to hardware</div><div class='del'>- * @zip_ops: Pointer to zip operation structure</div><div class='del'>- * @s:       Pointer to the structure representing zip state</div><div class='del'>- * @zip_dev: Pointer to zip device structure</div><div class='del'>- *</div><div class='del'>- * This function prepares the zip deflate command and submits it to the zip</div><div class='del'>- * engine for processing.</div><div class='del'>- *</div><div class='del'>- * Return: 0 if successful or error code</div><div class='del'>- */</div><div class='del'>-int zip_deflate(struct zip_operation *zip_ops, struct zip_state *s,</div><div class='del'>-		struct zip_device *zip_dev)</div><div class='del'>-{</div><div class='del'>-	union zip_inst_s *zip_cmd = &amp;s-&gt;zip_cmd;</div><div class='del'>-	union zip_zres_s *result_ptr = &amp;s-&gt;result;</div><div class='del'>-	u32 queue;</div><div class='del'>-</div><div class='del'>-	/* Prepares zip command based on the input parameters */</div><div class='del'>-	prepare_zip_command(zip_ops, s, zip_cmd);</div><div class='del'>-</div><div class='del'>-	atomic64_add(zip_ops-&gt;input_len, &amp;zip_dev-&gt;stats.comp_in_bytes);</div><div class='del'>-	/* Loads zip command into command queues and rings door bell */</div><div class='del'>-	queue = zip_load_instr(zip_cmd, zip_dev);</div><div class='del'>-</div><div class='del'>-	/* Stats update for compression requests submitted */</div><div class='del'>-	atomic64_inc(&amp;zip_dev-&gt;stats.comp_req_submit);</div><div class='del'>-</div><div class='del'>-	/* Wait for completion or error */</div><div class='del'>-	zip_poll_result(result_ptr);</div><div class='del'>-</div><div class='del'>-	/* Stats update for compression requests completed */</div><div class='del'>-	atomic64_inc(&amp;zip_dev-&gt;stats.comp_req_complete);</div><div class='del'>-</div><div class='del'>-	zip_ops-&gt;compcode = result_ptr-&gt;s.compcode;</div><div class='del'>-	switch (zip_ops-&gt;compcode) {</div><div class='del'>-	case ZIP_CMD_NOTDONE:</div><div class='del'>-		zip_dbg("Zip instruction not yet completed");</div><div class='del'>-		return ZIP_ERROR;</div><div class='del'>-</div><div class='del'>-	case ZIP_CMD_SUCCESS:</div><div class='del'>-		zip_dbg("Zip instruction completed successfully");</div><div class='del'>-		zip_update_cmd_bufs(zip_dev, queue);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ZIP_CMD_DTRUNC:</div><div class='del'>-		zip_dbg("Output Truncate error");</div><div class='del'>-		/* Returning ZIP_ERROR to avoid copy to user */</div><div class='del'>-		return ZIP_ERROR;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		zip_err("Zip instruction failed. Code:%d", zip_ops-&gt;compcode);</div><div class='del'>-		return ZIP_ERROR;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Update the CRC depending on the format */</div><div class='del'>-	switch (zip_ops-&gt;format) {</div><div class='del'>-	case RAW_FORMAT:</div><div class='del'>-		zip_dbg("RAW Format: %d ", zip_ops-&gt;format);</div><div class='del'>-		/* Get checksum from engine, need to feed it again */</div><div class='del'>-		zip_ops-&gt;csum = result_ptr-&gt;s.adler32;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ZLIB_FORMAT:</div><div class='del'>-		zip_dbg("ZLIB Format: %d ", zip_ops-&gt;format);</div><div class='del'>-		zip_ops-&gt;csum = result_ptr-&gt;s.adler32;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case GZIP_FORMAT:</div><div class='del'>-		zip_dbg("GZIP Format: %d ", zip_ops-&gt;format);</div><div class='del'>-		zip_ops-&gt;csum = result_ptr-&gt;s.crc32;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case LZS_FORMAT:</div><div class='del'>-		zip_dbg("LZS Format: %d ", zip_ops-&gt;format);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		zip_err("Unknown Format:%d\n", zip_ops-&gt;format);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	atomic64_add(result_ptr-&gt;s.totalbyteswritten,</div><div class='del'>-		     &amp;zip_dev-&gt;stats.comp_out_bytes);</div><div class='del'>-</div><div class='del'>-	/* Update output_len */</div><div class='del'>-	if (zip_ops-&gt;output_len &lt; result_ptr-&gt;s.totalbyteswritten) {</div><div class='del'>-		/* Dynamic stop &amp;&amp; strm-&gt;output_len &lt; zipconstants[onfsize] */</div><div class='del'>-		zip_err("output_len (%d) &lt; total bytes written(%d)\n",</div><div class='del'>-			zip_ops-&gt;output_len, result_ptr-&gt;s.totalbyteswritten);</div><div class='del'>-		zip_ops-&gt;output_len = 0;</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		zip_ops-&gt;output_len = result_ptr-&gt;s.totalbyteswritten;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_deflate.h b/drivers/crypto/cavium/zip/zip_deflate.h<br/>deleted file mode 100644<br/>index 1d32e76edc4d..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_deflate.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_deflate.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __ZIP_DEFLATE_H__</div><div class='del'>-#define __ZIP_DEFLATE_H__</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_deflate - API to offload deflate operation to hardware</div><div class='del'>- * @zip_ops: Pointer to zip operation structure</div><div class='del'>- * @s:       Pointer to the structure representing zip state</div><div class='del'>- * @zip_dev: Pointer to the structure representing zip device</div><div class='del'>- *</div><div class='del'>- * This function prepares the zip deflate command and submits it to the zip</div><div class='del'>- * engine by ringing the doorbell.</div><div class='del'>- *</div><div class='del'>- * Return: 0 if successful or error code</div><div class='del'>- */</div><div class='del'>-int zip_deflate(struct zip_operation *zip_ops, struct zip_state *s,</div><div class='del'>-		struct zip_device *zip_dev);</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_device.c b/drivers/crypto/cavium/zip/zip_device.c<br/>deleted file mode 100644<br/>index f174ec29ed69..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_device.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_device.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,202 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "zip_deflate.h"</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_cmd_queue_consumed - Calculates the space consumed in the command queue.</div><div class='del'>- *</div><div class='del'>- * @zip_dev: Pointer to zip device structure</div><div class='del'>- * @queue:   Queue number</div><div class='del'>- *</div><div class='del'>- * Return: Bytes consumed in the command queue buffer.</div><div class='del'>- */</div><div class='del'>-static inline u32 zip_cmd_queue_consumed(struct zip_device *zip_dev, int queue)</div><div class='del'>-{</div><div class='del'>-	return ((zip_dev-&gt;iq[queue].sw_head - zip_dev-&gt;iq[queue].sw_tail) *</div><div class='del'>-		sizeof(u64 *));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_load_instr - Submits the instruction into the ZIP command queue</div><div class='del'>- * @instr:      Pointer to the instruction to be submitted</div><div class='del'>- * @zip_dev:    Pointer to ZIP device structure to which the instruction is to</div><div class='del'>- *              be submitted</div><div class='del'>- *</div><div class='del'>- * This function copies the ZIP instruction to the command queue and rings the</div><div class='del'>- * doorbell to notify the engine of the instruction submission. The command</div><div class='del'>- * queue is maintained in a circular fashion. When there is space for exactly</div><div class='del'>- * one instruction in the queue, next chunk pointer of the queue is made to</div><div class='del'>- * point to the head of the queue, thus maintaining a circular queue.</div><div class='del'>- *</div><div class='del'>- * Return: Queue number to which the instruction was submitted</div><div class='del'>- */</div><div class='del'>-u32 zip_load_instr(union zip_inst_s *instr,</div><div class='del'>-		   struct zip_device *zip_dev)</div><div class='del'>-{</div><div class='del'>-	union zip_quex_doorbell dbell;</div><div class='del'>-	u32 queue = 0;</div><div class='del'>-	u32 consumed = 0;</div><div class='del'>-	u64 *ncb_ptr = NULL;</div><div class='del'>-	union zip_nptr_s ncp;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Distribute the instructions between the enabled queues based on</div><div class='del'>-	 * the CPU id.</div><div class='del'>-	 */</div><div class='del'>-	if (raw_smp_processor_id() % 2 == 0)</div><div class='del'>-		queue = 0;</div><div class='del'>-	else</div><div class='del'>-		queue = 1;</div><div class='del'>-</div><div class='del'>-	zip_dbg("CPU Core: %d Queue number:%d", raw_smp_processor_id(), queue);</div><div class='del'>-</div><div class='del'>-	/* Take cmd buffer lock */</div><div class='del'>-	spin_lock(&amp;zip_dev-&gt;iq[queue].lock);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Command Queue implementation</div><div class='del'>-	 * 1. If there is place for new instructions, push the cmd at sw_head.</div><div class='del'>-	 * 2. If there is place for exactly one instruction, push the new cmd</div><div class='del'>-	 *    at the sw_head. Make sw_head point to the sw_tail to make it</div><div class='del'>-	 *    circular. Write sw_head's physical address to the "Next-Chunk</div><div class='del'>-	 *    Buffer Ptr" to make it cmd_hw_tail.</div><div class='del'>-	 * 3. Ring the door bell.</div><div class='del'>-	 */</div><div class='del'>-	zip_dbg("sw_head : %lx", zip_dev-&gt;iq[queue].sw_head);</div><div class='del'>-	zip_dbg("sw_tail : %lx", zip_dev-&gt;iq[queue].sw_tail);</div><div class='del'>-</div><div class='del'>-	consumed = zip_cmd_queue_consumed(zip_dev, queue);</div><div class='del'>-	/* Check if there is space to push just one cmd */</div><div class='del'>-	if ((consumed + 128) == (ZIP_CMD_QBUF_SIZE - 8)) {</div><div class='del'>-		zip_dbg("Cmd queue space available for single command");</div><div class='del'>-		/* Space for one cmd, pust it and make it circular queue */</div><div class='del'>-		memcpy((u8 *)zip_dev-&gt;iq[queue].sw_head, (u8 *)instr,</div><div class='del'>-		       sizeof(union zip_inst_s));</div><div class='del'>-		zip_dev-&gt;iq[queue].sw_head += 16; /* 16 64_bit words = 128B */</div><div class='del'>-</div><div class='del'>-		/* Now, point the "Next-Chunk Buffer Ptr" to sw_head */</div><div class='del'>-		ncb_ptr = zip_dev-&gt;iq[queue].sw_head;</div><div class='del'>-</div><div class='del'>-		zip_dbg("ncb addr :0x%lx sw_head addr :0x%lx",</div><div class='del'>-			ncb_ptr, zip_dev-&gt;iq[queue].sw_head - 16);</div><div class='del'>-</div><div class='del'>-		/* Using Circular command queue */</div><div class='del'>-		zip_dev-&gt;iq[queue].sw_head = zip_dev-&gt;iq[queue].sw_tail;</div><div class='del'>-		/* Mark this buffer for free */</div><div class='del'>-		zip_dev-&gt;iq[queue].free_flag = 1;</div><div class='del'>-</div><div class='del'>-		/* Write new chunk buffer address at "Next-Chunk Buffer Ptr" */</div><div class='del'>-		ncp.u_reg64 = 0ull;</div><div class='del'>-		ncp.s.addr = __pa(zip_dev-&gt;iq[queue].sw_head);</div><div class='del'>-		*ncb_ptr = ncp.u_reg64;</div><div class='del'>-		zip_dbg("*ncb_ptr :0x%lx sw_head[phys] :0x%lx",</div><div class='del'>-			*ncb_ptr, __pa(zip_dev-&gt;iq[queue].sw_head));</div><div class='del'>-</div><div class='del'>-		zip_dev-&gt;iq[queue].pend_cnt++;</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		zip_dbg("Enough space is available for commands");</div><div class='del'>-		/* Push this cmd to cmd queue buffer */</div><div class='del'>-		memcpy((u8 *)zip_dev-&gt;iq[queue].sw_head, (u8 *)instr,</div><div class='del'>-		       sizeof(union zip_inst_s));</div><div class='del'>-		zip_dev-&gt;iq[queue].sw_head += 16; /* 16 64_bit words = 128B */</div><div class='del'>-</div><div class='del'>-		zip_dev-&gt;iq[queue].pend_cnt++;</div><div class='del'>-	}</div><div class='del'>-	zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx",</div><div class='del'>-		zip_dev-&gt;iq[queue].sw_head, zip_dev-&gt;iq[queue].sw_tail,</div><div class='del'>-		zip_dev-&gt;iq[queue].hw_tail);</div><div class='del'>-</div><div class='del'>-	zip_dbg(" Pushed the new cmd : pend_cnt : %d",</div><div class='del'>-		zip_dev-&gt;iq[queue].pend_cnt);</div><div class='del'>-</div><div class='del'>-	/* Ring the doorbell */</div><div class='del'>-	dbell.u_reg64     = 0ull;</div><div class='del'>-	dbell.s.dbell_cnt = 1;</div><div class='del'>-	zip_reg_write(dbell.u_reg64,</div><div class='del'>-		      (zip_dev-&gt;reg_base + ZIP_QUEX_DOORBELL(queue)));</div><div class='del'>-</div><div class='del'>-	/* Unlock cmd buffer lock */</div><div class='del'>-	spin_unlock(&amp;zip_dev-&gt;iq[queue].lock);</div><div class='del'>-</div><div class='del'>-	return queue;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_update_cmd_bufs - Updates the queue statistics after posting the</div><div class='del'>- *                       instruction</div><div class='del'>- * @zip_dev: Pointer to zip device structure</div><div class='del'>- * @queue:   Queue number</div><div class='del'>- */</div><div class='del'>-void zip_update_cmd_bufs(struct zip_device *zip_dev, u32 queue)</div><div class='del'>-{</div><div class='del'>-	/* Take cmd buffer lock */</div><div class='del'>-	spin_lock(&amp;zip_dev-&gt;iq[queue].lock);</div><div class='del'>-</div><div class='del'>-	/* Check if the previous buffer can be freed */</div><div class='del'>-	if (zip_dev-&gt;iq[queue].free_flag == 1) {</div><div class='del'>-		zip_dbg("Free flag. Free cmd buffer, adjust sw head and tail");</div><div class='del'>-		/* Reset the free flag */</div><div class='del'>-		zip_dev-&gt;iq[queue].free_flag = 0;</div><div class='del'>-</div><div class='del'>-		/* Point the hw_tail to start of the new chunk buffer */</div><div class='del'>-		zip_dev-&gt;iq[queue].hw_tail = zip_dev-&gt;iq[queue].sw_head;</div><div class='del'>-	} else {</div><div class='del'>-		zip_dbg("Free flag not set. increment hw tail");</div><div class='del'>-		zip_dev-&gt;iq[queue].hw_tail += 16; /* 16 64_bit words = 128B */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	zip_dev-&gt;iq[queue].done_cnt++;</div><div class='del'>-	zip_dev-&gt;iq[queue].pend_cnt--;</div><div class='del'>-</div><div class='del'>-	zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx",</div><div class='del'>-		zip_dev-&gt;iq[queue].sw_head, zip_dev-&gt;iq[queue].sw_tail,</div><div class='del'>-		zip_dev-&gt;iq[queue].hw_tail);</div><div class='del'>-	zip_dbg(" Got CC : pend_cnt : %d\n", zip_dev-&gt;iq[queue].pend_cnt);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;zip_dev-&gt;iq[queue].lock);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_device.h b/drivers/crypto/cavium/zip/zip_device.h<br/>deleted file mode 100644<br/>index 9e18b3b93d38..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_device.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_device.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,108 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __ZIP_DEVICE_H__</div><div class='del'>-#define __ZIP_DEVICE_H__</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include "zip_main.h"</div><div class='del'>-</div><div class='del'>-struct sg_info {</div><div class='del'>-	/*</div><div class='del'>-	 * Pointer to the input data when scatter_gather == 0 and</div><div class='del'>-	 * pointer to the input gather list buffer when scatter_gather == 1</div><div class='del'>-	 */</div><div class='del'>-	union zip_zptr_s *gather;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Pointer to the output data when scatter_gather == 0 and</div><div class='del'>-	 * pointer to the output scatter list buffer when scatter_gather == 1</div><div class='del'>-	 */</div><div class='del'>-	union zip_zptr_s *scatter;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Holds size of the output buffer pointed by scatter list</div><div class='del'>-	 * when scatter_gather == 1</div><div class='del'>-	 */</div><div class='del'>-	u64 scatter_buf_size;</div><div class='del'>-</div><div class='del'>-	/* for gather data */</div><div class='del'>-	u64 gather_enable;</div><div class='del'>-</div><div class='del'>-	/* for scatter data */</div><div class='del'>-	u64 scatter_enable;</div><div class='del'>-</div><div class='del'>-	/* Number of gather list pointers for gather data */</div><div class='del'>-	u32 gbuf_cnt;</div><div class='del'>-</div><div class='del'>-	/* Number of scatter list pointers for scatter data */</div><div class='del'>-	u32 sbuf_cnt;</div><div class='del'>-</div><div class='del'>-	/* Buffers allocation state */</div><div class='del'>-	u8 alloc_state;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct zip_state - Structure representing the required information related</div><div class='del'>- *                    to a command</div><div class='del'>- * @zip_cmd: Pointer to zip instruction structure</div><div class='del'>- * @result:  Pointer to zip result structure</div><div class='del'>- * @ctx:     Context pointer for inflate</div><div class='del'>- * @history: Decompression history pointer</div><div class='del'>- * @sginfo:  Scatter-gather info structure</div><div class='del'>- */</div><div class='del'>-struct zip_state {</div><div class='del'>-	union zip_inst_s zip_cmd;</div><div class='del'>-	union zip_zres_s result;</div><div class='del'>-	union zip_zptr_s *ctx;</div><div class='del'>-	union zip_zptr_s *history;</div><div class='del'>-	struct sg_info   sginfo;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_CONTEXT_SIZE          2048</div><div class='del'>-#define ZIP_INFLATE_HISTORY_SIZE  32768</div><div class='del'>-#define ZIP_DEFLATE_HISTORY_SIZE  32768</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_inflate.c b/drivers/crypto/cavium/zip/zip_inflate.c<br/>deleted file mode 100644<br/>index 7e0d73e2f89e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_inflate.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_inflate.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,223 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "zip_inflate.h"</div><div class='del'>-</div><div class='del'>-static int prepare_inflate_zcmd(struct zip_operation *zip_ops,</div><div class='del'>-				struct zip_state *s, union zip_inst_s *zip_cmd)</div><div class='del'>-{</div><div class='del'>-	union zip_zres_s *result_ptr = &amp;s-&gt;result;</div><div class='del'>-</div><div class='del'>-	memset(zip_cmd, 0, sizeof(s-&gt;zip_cmd));</div><div class='del'>-	memset(result_ptr, 0, sizeof(s-&gt;result));</div><div class='del'>-</div><div class='del'>-	/* IWORD#0 */</div><div class='del'>-</div><div class='del'>-	/* Decompression History Gather list - no gather list */</div><div class='del'>-	zip_cmd-&gt;s.hg = 0;</div><div class='del'>-	/* For decompression, CE must be 0x0. */</div><div class='del'>-	zip_cmd-&gt;s.ce = 0;</div><div class='del'>-	/* For decompression, SS must be 0x0. */</div><div class='del'>-	zip_cmd-&gt;s.ss = 0;</div><div class='del'>-	/* For decompression, SF should always be set. */</div><div class='del'>-	zip_cmd-&gt;s.sf = 1;</div><div class='del'>-</div><div class='del'>-	/* Begin File */</div><div class='del'>-	if (zip_ops-&gt;begin_file == 0)</div><div class='del'>-		zip_cmd-&gt;s.bf = 0;</div><div class='del'>-	else</div><div class='del'>-		zip_cmd-&gt;s.bf = 1;</div><div class='del'>-</div><div class='del'>-	zip_cmd-&gt;s.ef = 1;</div><div class='del'>-	/* 0: for Deflate decompression, 3: for LZS decompression */</div><div class='del'>-	zip_cmd-&gt;s.cc = zip_ops-&gt;ccode;</div><div class='del'>-</div><div class='del'>-	/* IWORD #1*/</div><div class='del'>-</div><div class='del'>-	/* adler checksum */</div><div class='del'>-	zip_cmd-&gt;s.adlercrc32 = zip_ops-&gt;csum;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * HISTORYLENGTH must be 0x0 for any ZIP decompress operation.</div><div class='del'>-	 * History data is added to a decompression operation via IWORD3.</div><div class='del'>-	 */</div><div class='del'>-	zip_cmd-&gt;s.historylength = 0;</div><div class='del'>-	zip_cmd-&gt;s.ds = 0;</div><div class='del'>-</div><div class='del'>-	/* IWORD # 8 and 9 - Output pointer */</div><div class='del'>-	zip_cmd-&gt;s.out_ptr_addr.s.addr  = __pa(zip_ops-&gt;output);</div><div class='del'>-	zip_cmd-&gt;s.out_ptr_ctl.s.length = zip_ops-&gt;output_len;</div><div class='del'>-</div><div class='del'>-	/* Maximum number of output-stream bytes that can be written */</div><div class='del'>-	zip_cmd-&gt;s.totaloutputlength    = zip_ops-&gt;output_len;</div><div class='del'>-</div><div class='del'>-	zip_dbg("Data Direct Input case ");</div><div class='del'>-</div><div class='del'>-	/* IWORD # 6 and 7 - input pointer */</div><div class='del'>-	zip_cmd-&gt;s.dg = 0;</div><div class='del'>-	zip_cmd-&gt;s.inp_ptr_addr.s.addr  = __pa((u8 *)zip_ops-&gt;input);</div><div class='del'>-	zip_cmd-&gt;s.inp_ptr_ctl.s.length = zip_ops-&gt;input_len;</div><div class='del'>-</div><div class='del'>-	/* IWORD # 10 and 11 - Result pointer */</div><div class='del'>-	zip_cmd-&gt;s.res_ptr_addr.s.addr = __pa(result_ptr);</div><div class='del'>-</div><div class='del'>-	/* Clearing completion code */</div><div class='del'>-	result_ptr-&gt;s.compcode = 0;</div><div class='del'>-</div><div class='del'>-	/* Returning 0 for time being.*/</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_inflate - API to offload inflate operation to hardware</div><div class='del'>- * @zip_ops: Pointer to zip operation structure</div><div class='del'>- * @s:       Pointer to the structure representing zip state</div><div class='del'>- * @zip_dev: Pointer to zip device structure</div><div class='del'>- *</div><div class='del'>- * This function prepares the zip inflate command and submits it to the zip</div><div class='del'>- * engine for processing.</div><div class='del'>- *</div><div class='del'>- * Return: 0 if successful or error code</div><div class='del'>- */</div><div class='del'>-int zip_inflate(struct zip_operation *zip_ops, struct zip_state *s,</div><div class='del'>-		struct zip_device *zip_dev)</div><div class='del'>-{</div><div class='del'>-	union zip_inst_s *zip_cmd    = &amp;s-&gt;zip_cmd;</div><div class='del'>-	union zip_zres_s  *result_ptr = &amp;s-&gt;result;</div><div class='del'>-	u32 queue;</div><div class='del'>-</div><div class='del'>-	/* Prepare inflate zip command */</div><div class='del'>-	prepare_inflate_zcmd(zip_ops, s, zip_cmd);</div><div class='del'>-</div><div class='del'>-	atomic64_add(zip_ops-&gt;input_len, &amp;zip_dev-&gt;stats.decomp_in_bytes);</div><div class='del'>-</div><div class='del'>-	/* Load inflate command to zip queue and ring the doorbell */</div><div class='del'>-	queue = zip_load_instr(zip_cmd, zip_dev);</div><div class='del'>-</div><div class='del'>-	/* Decompression requests submitted stats update */</div><div class='del'>-	atomic64_inc(&amp;zip_dev-&gt;stats.decomp_req_submit);</div><div class='del'>-</div><div class='del'>-	/* Wait for completion or error */</div><div class='del'>-	zip_poll_result(result_ptr);</div><div class='del'>-</div><div class='del'>-	/* Decompression requests completed stats update */</div><div class='del'>-	atomic64_inc(&amp;zip_dev-&gt;stats.decomp_req_complete);</div><div class='del'>-</div><div class='del'>-	zip_ops-&gt;compcode = result_ptr-&gt;s.compcode;</div><div class='del'>-	switch (zip_ops-&gt;compcode) {</div><div class='del'>-	case ZIP_CMD_NOTDONE:</div><div class='del'>-		zip_dbg("Zip Instruction not yet completed\n");</div><div class='del'>-		return ZIP_ERROR;</div><div class='del'>-</div><div class='del'>-	case ZIP_CMD_SUCCESS:</div><div class='del'>-		zip_dbg("Zip Instruction completed successfully\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ZIP_CMD_DYNAMIC_STOP:</div><div class='del'>-		zip_dbg(" Dynamic stop Initiated\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		zip_dbg("Instruction failed. Code = %d\n", zip_ops-&gt;compcode);</div><div class='del'>-		atomic64_inc(&amp;zip_dev-&gt;stats.decomp_bad_reqs);</div><div class='del'>-		zip_update_cmd_bufs(zip_dev, queue);</div><div class='del'>-		return ZIP_ERROR;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	zip_update_cmd_bufs(zip_dev, queue);</div><div class='del'>-</div><div class='del'>-	if ((zip_ops-&gt;ccode == 3) &amp;&amp; (zip_ops-&gt;flush == 4) &amp;&amp;</div><div class='del'>-	    (zip_ops-&gt;compcode != ZIP_CMD_DYNAMIC_STOP))</div><div class='del'>-		result_ptr-&gt;s.ef = 1;</div><div class='del'>-</div><div class='del'>-	zip_ops-&gt;csum = result_ptr-&gt;s.adler32;</div><div class='del'>-</div><div class='del'>-	atomic64_add(result_ptr-&gt;s.totalbyteswritten,</div><div class='del'>-		     &amp;zip_dev-&gt;stats.decomp_out_bytes);</div><div class='del'>-</div><div class='del'>-	if (zip_ops-&gt;output_len &lt; result_ptr-&gt;s.totalbyteswritten) {</div><div class='del'>-		zip_err("output_len (%d) &lt; total bytes written (%d)\n",</div><div class='del'>-			zip_ops-&gt;output_len, result_ptr-&gt;s.totalbyteswritten);</div><div class='del'>-		zip_ops-&gt;output_len = 0;</div><div class='del'>-	} else {</div><div class='del'>-		zip_ops-&gt;output_len = result_ptr-&gt;s.totalbyteswritten;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	zip_ops-&gt;bytes_read = result_ptr-&gt;s.totalbytesread;</div><div class='del'>-	zip_ops-&gt;bits_processed = result_ptr-&gt;s.totalbitsprocessed;</div><div class='del'>-	zip_ops-&gt;end_file = result_ptr-&gt;s.ef;</div><div class='del'>-	if (zip_ops-&gt;end_file) {</div><div class='del'>-		switch (zip_ops-&gt;format) {</div><div class='del'>-		case RAW_FORMAT:</div><div class='del'>-			zip_dbg("RAW Format: %d ", zip_ops-&gt;format);</div><div class='del'>-			/* Get checksum from engine */</div><div class='del'>-			zip_ops-&gt;csum = result_ptr-&gt;s.adler32;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case ZLIB_FORMAT:</div><div class='del'>-			zip_dbg("ZLIB Format: %d ", zip_ops-&gt;format);</div><div class='del'>-			zip_ops-&gt;csum = result_ptr-&gt;s.adler32;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case GZIP_FORMAT:</div><div class='del'>-			zip_dbg("GZIP Format: %d ", zip_ops-&gt;format);</div><div class='del'>-			zip_ops-&gt;csum = result_ptr-&gt;s.crc32;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case LZS_FORMAT:</div><div class='del'>-			zip_dbg("LZS Format: %d ", zip_ops-&gt;format);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			zip_err("Format error:%d\n", zip_ops-&gt;format);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_inflate.h b/drivers/crypto/cavium/zip/zip_inflate.h<br/>deleted file mode 100644<br/>index 6b20f179978e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_inflate.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_inflate.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __ZIP_INFLATE_H__</div><div class='del'>-#define __ZIP_INFLATE_H__</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_inflate - API to offload inflate operation to hardware</div><div class='del'>- * @zip_ops: Pointer to zip operation structure</div><div class='del'>- * @s:       Pointer to the structure representing zip state</div><div class='del'>- * @zip_dev: Pointer to the structure representing zip device</div><div class='del'>- *</div><div class='del'>- * This function prepares the zip inflate command and submits it to the zip</div><div class='del'>- * engine for processing.</div><div class='del'>- *</div><div class='del'>- * Return: 0 if successful or error code</div><div class='del'>- */</div><div class='del'>-int zip_inflate(struct zip_operation *zip_ops, struct zip_state *s,</div><div class='del'>-		struct zip_device *zip_dev);</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_main.c b/drivers/crypto/cavium/zip/zip_main.c<br/>deleted file mode 100644<br/>index abd58de4343d..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_main.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,603 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-#include "zip_crypto.h"</div><div class='del'>-</div><div class='del'>-#define DRV_NAME		"ThunderX-ZIP"</div><div class='del'>-</div><div class='del'>-static struct zip_device *zip_dev[MAX_ZIP_DEVICES];</div><div class='del'>-</div><div class='del'>-static const struct pci_device_id zip_id_table[] = {</div><div class='del'>-	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVICE_ID_THUNDERX_ZIP) },</div><div class='del'>-	{ 0, }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void zip_debugfs_init(void);</div><div class='del'>-static void zip_debugfs_exit(void);</div><div class='del'>-static int zip_register_compression_device(void);</div><div class='del'>-static void zip_unregister_compression_device(void);</div><div class='del'>-</div><div class='del'>-void zip_reg_write(u64 val, u64 __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	writeq(val, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u64 zip_reg_read(u64 __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return readq(addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allocates new ZIP device structure</div><div class='del'>- * Returns zip_device pointer or NULL if cannot allocate memory for zip_device</div><div class='del'>- */</div><div class='del'>-static struct zip_device *zip_alloc_device(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct zip_device *zip = NULL;</div><div class='del'>-	int idx;</div><div class='del'>-</div><div class='del'>-	for (idx = 0; idx &lt; MAX_ZIP_DEVICES; idx++) {</div><div class='del'>-		if (!zip_dev[idx])</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* To ensure that the index is within the limit */</div><div class='del'>-	if (idx &lt; MAX_ZIP_DEVICES)</div><div class='del'>-		zip = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*zip), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	if (!zip)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	zip_dev[idx] = zip;</div><div class='del'>-	zip-&gt;index = idx;</div><div class='del'>-	return zip;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_get_device - Get ZIP device based on node id of cpu</div><div class='del'>- *</div><div class='del'>- * @node: Node id of the current cpu</div><div class='del'>- * Return: Pointer to Zip device structure</div><div class='del'>- */</div><div class='del'>-struct zip_device *zip_get_device(int node)</div><div class='del'>-{</div><div class='del'>-	if ((node &lt; MAX_ZIP_DEVICES) &amp;&amp; (node &gt;= 0))</div><div class='del'>-		return zip_dev[node];</div><div class='del'>-</div><div class='del'>-	zip_err("ZIP device not found for node id %d\n", node);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_get_node_id - Get the node id of the current cpu</div><div class='del'>- *</div><div class='del'>- * Return: Node id of the current cpu</div><div class='del'>- */</div><div class='del'>-int zip_get_node_id(void)</div><div class='del'>-{</div><div class='del'>-	return cpu_to_node(raw_smp_processor_id());</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Initializes the ZIP h/w sub-system */</div><div class='del'>-static int zip_init_hw(struct zip_device *zip)</div><div class='del'>-{</div><div class='del'>-	union zip_cmd_ctl    cmd_ctl;</div><div class='del'>-	union zip_constants  constants;</div><div class='del'>-	union zip_que_ena    que_ena;</div><div class='del'>-	union zip_quex_map   que_map;</div><div class='del'>-	union zip_que_pri    que_pri;</div><div class='del'>-</div><div class='del'>-	union zip_quex_sbuf_addr que_sbuf_addr;</div><div class='del'>-	union zip_quex_sbuf_ctl  que_sbuf_ctl;</div><div class='del'>-</div><div class='del'>-	int q = 0;</div><div class='del'>-</div><div class='del'>-	/* Enable the ZIP Engine(Core) Clock */</div><div class='del'>-	cmd_ctl.u_reg64 = zip_reg_read(zip-&gt;reg_base + ZIP_CMD_CTL);</div><div class='del'>-	cmd_ctl.s.forceclk = 1;</div><div class='del'>-	zip_reg_write(cmd_ctl.u_reg64 &amp; 0xFF, (zip-&gt;reg_base + ZIP_CMD_CTL));</div><div class='del'>-</div><div class='del'>-	zip_msg("ZIP_CMD_CTL  : 0x%016llx",</div><div class='del'>-		zip_reg_read(zip-&gt;reg_base + ZIP_CMD_CTL));</div><div class='del'>-</div><div class='del'>-	constants.u_reg64 = zip_reg_read(zip-&gt;reg_base + ZIP_CONSTANTS);</div><div class='del'>-	zip-&gt;depth    = constants.s.depth;</div><div class='del'>-	zip-&gt;onfsize  = constants.s.onfsize;</div><div class='del'>-	zip-&gt;ctxsize  = constants.s.ctxsize;</div><div class='del'>-</div><div class='del'>-	zip_msg("depth: 0x%016llx , onfsize : 0x%016llx , ctxsize : 0x%016llx",</div><div class='del'>-		zip-&gt;depth, zip-&gt;onfsize, zip-&gt;ctxsize);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Program ZIP_QUE(0..7)_SBUF_ADDR and ZIP_QUE(0..7)_SBUF_CTL to</div><div class='del'>-	 * have the correct buffer pointer and size configured for each</div><div class='del'>-	 * instruction queue.</div><div class='del'>-	 */</div><div class='del'>-	for (q = 0; q &lt; ZIP_NUM_QUEUES; q++) {</div><div class='del'>-		que_sbuf_ctl.u_reg64 = 0ull;</div><div class='del'>-		que_sbuf_ctl.s.size = (ZIP_CMD_QBUF_SIZE / sizeof(u64));</div><div class='del'>-		que_sbuf_ctl.s.inst_be   = 0;</div><div class='del'>-		que_sbuf_ctl.s.stream_id = 0;</div><div class='del'>-		zip_reg_write(que_sbuf_ctl.u_reg64,</div><div class='del'>-			      (zip-&gt;reg_base + ZIP_QUEX_SBUF_CTL(q)));</div><div class='del'>-</div><div class='del'>-		zip_msg("QUEX_SBUF_CTL[%d]: 0x%016llx", q,</div><div class='del'>-			zip_reg_read(zip-&gt;reg_base + ZIP_QUEX_SBUF_CTL(q)));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (q = 0; q &lt; ZIP_NUM_QUEUES; q++) {</div><div class='del'>-		memset(&amp;zip-&gt;iq[q], 0x0, sizeof(struct zip_iq));</div><div class='del'>-</div><div class='del'>-		spin_lock_init(&amp;zip-&gt;iq[q].lock);</div><div class='del'>-</div><div class='del'>-		if (zip_cmd_qbuf_alloc(zip, q)) {</div><div class='del'>-			while (q != 0) {</div><div class='del'>-				q--;</div><div class='del'>-				zip_cmd_qbuf_free(zip, q);</div><div class='del'>-			}</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Initialize tail ptr to head */</div><div class='del'>-		zip-&gt;iq[q].sw_tail = zip-&gt;iq[q].sw_head;</div><div class='del'>-		zip-&gt;iq[q].hw_tail = zip-&gt;iq[q].sw_head;</div><div class='del'>-</div><div class='del'>-		/* Write the physical addr to register */</div><div class='del'>-		que_sbuf_addr.u_reg64   = 0ull;</div><div class='del'>-		que_sbuf_addr.s.ptr = (__pa(zip-&gt;iq[q].sw_head) &gt;&gt;</div><div class='del'>-				       ZIP_128B_ALIGN);</div><div class='del'>-</div><div class='del'>-		zip_msg("QUE[%d]_PTR(PHYS): 0x%016llx", q,</div><div class='del'>-			(u64)que_sbuf_addr.s.ptr);</div><div class='del'>-</div><div class='del'>-		zip_reg_write(que_sbuf_addr.u_reg64,</div><div class='del'>-			      (zip-&gt;reg_base + ZIP_QUEX_SBUF_ADDR(q)));</div><div class='del'>-</div><div class='del'>-		zip_msg("QUEX_SBUF_ADDR[%d]: 0x%016llx", q,</div><div class='del'>-			zip_reg_read(zip-&gt;reg_base + ZIP_QUEX_SBUF_ADDR(q)));</div><div class='del'>-</div><div class='del'>-		zip_dbg("sw_head :0x%lx sw_tail :0x%lx hw_tail :0x%lx",</div><div class='del'>-			zip-&gt;iq[q].sw_head, zip-&gt;iq[q].sw_tail,</div><div class='del'>-			zip-&gt;iq[q].hw_tail);</div><div class='del'>-		zip_dbg("sw_head phy addr : 0x%lx", que_sbuf_addr.s.ptr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Queue-to-ZIP core mapping</div><div class='del'>-	 * If a queue is not mapped to a particular core, it is equivalent to</div><div class='del'>-	 * the ZIP core being disabled.</div><div class='del'>-	 */</div><div class='del'>-	que_ena.u_reg64 = 0x0ull;</div><div class='del'>-	/* Enabling queues based on ZIP_NUM_QUEUES */</div><div class='del'>-	for (q = 0; q &lt; ZIP_NUM_QUEUES; q++)</div><div class='del'>-		que_ena.s.ena |= (0x1 &lt;&lt; q);</div><div class='del'>-	zip_reg_write(que_ena.u_reg64, (zip-&gt;reg_base + ZIP_QUE_ENA));</div><div class='del'>-</div><div class='del'>-	zip_msg("QUE_ENA      : 0x%016llx",</div><div class='del'>-		zip_reg_read(zip-&gt;reg_base + ZIP_QUE_ENA));</div><div class='del'>-</div><div class='del'>-	for (q = 0; q &lt; ZIP_NUM_QUEUES; q++) {</div><div class='del'>-		que_map.u_reg64 = 0ull;</div><div class='del'>-		/* Mapping each queue to two ZIP cores */</div><div class='del'>-		que_map.s.zce = 0x3;</div><div class='del'>-		zip_reg_write(que_map.u_reg64,</div><div class='del'>-			      (zip-&gt;reg_base + ZIP_QUEX_MAP(q)));</div><div class='del'>-</div><div class='del'>-		zip_msg("QUE_MAP(%d)   : 0x%016llx", q,</div><div class='del'>-			zip_reg_read(zip-&gt;reg_base + ZIP_QUEX_MAP(q)));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	que_pri.u_reg64 = 0ull;</div><div class='del'>-	for (q = 0; q &lt; ZIP_NUM_QUEUES; q++)</div><div class='del'>-		que_pri.s.pri |= (0x1 &lt;&lt; q); /* Higher Priority RR */</div><div class='del'>-	zip_reg_write(que_pri.u_reg64, (zip-&gt;reg_base + ZIP_QUE_PRI));</div><div class='del'>-</div><div class='del'>-	zip_msg("QUE_PRI %016llx", zip_reg_read(zip-&gt;reg_base + ZIP_QUE_PRI));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void zip_reset(struct zip_device *zip)</div><div class='del'>-{</div><div class='del'>-	union zip_cmd_ctl cmd_ctl;</div><div class='del'>-</div><div class='del'>-	cmd_ctl.u_reg64 = 0x0ull;</div><div class='del'>-	cmd_ctl.s.reset = 1;  /* Forces ZIP cores to do reset */</div><div class='del'>-	zip_reg_write(cmd_ctl.u_reg64, (zip-&gt;reg_base + ZIP_CMD_CTL));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int zip_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;pdev-&gt;dev;</div><div class='del'>-	struct zip_device *zip = NULL;</div><div class='del'>-	int    err;</div><div class='del'>-</div><div class='del'>-	zip = zip_alloc_device(pdev);</div><div class='del'>-	if (!zip)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	dev_info(dev, "Found ZIP device %d %x:%x on Node %d\n", zip-&gt;index,</div><div class='del'>-		 pdev-&gt;vendor, pdev-&gt;device, dev_to_node(dev));</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev, zip);</div><div class='del'>-	zip-&gt;pdev = pdev;</div><div class='del'>-</div><div class='del'>-	err = pci_enable_device(pdev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "Failed to enable PCI device");</div><div class='del'>-		goto err_free_device;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = pci_request_regions(pdev, DRV_NAME);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "PCI request regions failed 0x%x", err);</div><div class='del'>-		goto err_disable_device;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(48));</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "Unable to get usable 48-bit DMA configuration\n");</div><div class='del'>-		goto err_release_regions;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* MAP configuration registers */</div><div class='del'>-	zip-&gt;reg_base = pci_ioremap_bar(pdev, PCI_CFG_ZIP_PF_BAR0);</div><div class='del'>-	if (!zip-&gt;reg_base) {</div><div class='del'>-		dev_err(dev, "ZIP: Cannot map BAR0 CSR memory space, aborting");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_release_regions;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize ZIP Hardware */</div><div class='del'>-	err = zip_init_hw(zip);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_release_regions;</div><div class='del'>-</div><div class='del'>-	/* Register with the Kernel Crypto Interface */</div><div class='del'>-	err = zip_register_compression_device();</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		zip_err("ZIP: Kernel Crypto Registration failed\n");</div><div class='del'>-		goto err_register;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* comp-decomp statistics are handled with debugfs interface */</div><div class='del'>-	zip_debugfs_init();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_register:</div><div class='del'>-	zip_reset(zip);</div><div class='del'>-</div><div class='del'>-err_release_regions:</div><div class='del'>-	if (zip-&gt;reg_base)</div><div class='del'>-		iounmap(zip-&gt;reg_base);</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-</div><div class='del'>-err_disable_device:</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-</div><div class='del'>-err_free_device:</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='del'>-</div><div class='del'>-	/* Remove zip_dev from zip_device list, free the zip_device memory */</div><div class='del'>-	zip_dev[zip-&gt;index] = NULL;</div><div class='del'>-	devm_kfree(dev, zip);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void zip_remove(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct zip_device *zip = pci_get_drvdata(pdev);</div><div class='del'>-	int q = 0;</div><div class='del'>-</div><div class='del'>-	if (!zip)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	zip_debugfs_exit();</div><div class='del'>-</div><div class='del'>-	zip_unregister_compression_device();</div><div class='del'>-</div><div class='del'>-	if (zip-&gt;reg_base) {</div><div class='del'>-		zip_reset(zip);</div><div class='del'>-		iounmap(zip-&gt;reg_base);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Free Command Queue buffers. This free should be called for all</div><div class='del'>-	 * the enabled Queues.</div><div class='del'>-	 */</div><div class='del'>-	for (q = 0; q &lt; ZIP_NUM_QUEUES; q++)</div><div class='del'>-		zip_cmd_qbuf_free(zip, q);</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev, NULL);</div><div class='del'>-	/* remove zip device from zip device list */</div><div class='del'>-	zip_dev[zip-&gt;index] = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* PCI Sub-System Interface */</div><div class='del'>-static struct pci_driver zip_driver = {</div><div class='del'>-	.name	    =  DRV_NAME,</div><div class='del'>-	.id_table   =  zip_id_table,</div><div class='del'>-	.probe	    =  zip_probe,</div><div class='del'>-	.remove     =  zip_remove,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Kernel Crypto Subsystem Interface */</div><div class='del'>-</div><div class='del'>-static struct scomp_alg zip_scomp_deflate = {</div><div class='del'>-	.alloc_ctx		= zip_alloc_scomp_ctx_deflate,</div><div class='del'>-	.free_ctx		= zip_free_scomp_ctx,</div><div class='del'>-	.compress		= zip_scomp_compress,</div><div class='del'>-	.decompress		= zip_scomp_decompress,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "deflate",</div><div class='del'>-		.cra_driver_name	= "deflate-scomp-cavium",</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-		.cra_priority           = 300,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct scomp_alg zip_scomp_lzs = {</div><div class='del'>-	.alloc_ctx		= zip_alloc_scomp_ctx_lzs,</div><div class='del'>-	.free_ctx		= zip_free_scomp_ctx,</div><div class='del'>-	.compress		= zip_scomp_compress,</div><div class='del'>-	.decompress		= zip_scomp_decompress,</div><div class='del'>-	.base			= {</div><div class='del'>-		.cra_name		= "lzs",</div><div class='del'>-		.cra_driver_name	= "lzs-scomp-cavium",</div><div class='del'>-		.cra_module		= THIS_MODULE,</div><div class='del'>-		.cra_priority           = 300,</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int zip_register_compression_device(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = crypto_register_scomp(&amp;zip_scomp_deflate);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		zip_err("Deflate scomp algorithm registration failed\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = crypto_register_scomp(&amp;zip_scomp_lzs);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		zip_err("LZS scomp algorithm registration failed\n");</div><div class='del'>-		goto err_unregister_scomp_deflate;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-</div><div class='del'>-err_unregister_scomp_deflate:</div><div class='del'>-	crypto_unregister_scomp(&amp;zip_scomp_deflate);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void zip_unregister_compression_device(void)</div><div class='del'>-{</div><div class='del'>-	crypto_unregister_scomp(&amp;zip_scomp_deflate);</div><div class='del'>-	crypto_unregister_scomp(&amp;zip_scomp_lzs);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * debugfs functions</div><div class='del'>- */</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-</div><div class='del'>-/* Displays ZIP device statistics */</div><div class='del'>-static int zip_stats_show(struct seq_file *s, void *unused)</div><div class='del'>-{</div><div class='del'>-	u64 val = 0ull;</div><div class='del'>-	u64 avg_chunk = 0ull, avg_cr = 0ull;</div><div class='del'>-	u32 q = 0;</div><div class='del'>-</div><div class='del'>-	int index  = 0;</div><div class='del'>-	struct zip_device *zip;</div><div class='del'>-	struct zip_stats  *st;</div><div class='del'>-</div><div class='del'>-	for (index = 0; index &lt; MAX_ZIP_DEVICES; index++) {</div><div class='del'>-		u64 pending = 0;</div><div class='del'>-</div><div class='del'>-		if (zip_dev[index]) {</div><div class='del'>-			zip = zip_dev[index];</div><div class='del'>-			st  = &amp;zip-&gt;stats;</div><div class='del'>-</div><div class='del'>-			/* Get all the pending requests */</div><div class='del'>-			for (q = 0; q &lt; ZIP_NUM_QUEUES; q++) {</div><div class='del'>-				val = zip_reg_read((zip-&gt;reg_base +</div><div class='del'>-						    ZIP_DBG_QUEX_STA(q)));</div><div class='del'>-				pending += val &gt;&gt; 32 &amp; 0xffffff;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			val = atomic64_read(&amp;st-&gt;comp_req_complete);</div><div class='del'>-			avg_chunk = (val) ? atomic64_read(&amp;st-&gt;comp_in_bytes) / val : 0;</div><div class='del'>-</div><div class='del'>-			val = atomic64_read(&amp;st-&gt;comp_out_bytes);</div><div class='del'>-			avg_cr = (val) ? atomic64_read(&amp;st-&gt;comp_in_bytes) / val : 0;</div><div class='del'>-			seq_printf(s, "        ZIP Device %d Stats\n"</div><div class='del'>-				      "-----------------------------------\n"</div><div class='del'>-				      "Comp Req Submitted        : \t%lld\n"</div><div class='del'>-				      "Comp Req Completed        : \t%lld\n"</div><div class='del'>-				      "Compress In Bytes         : \t%lld\n"</div><div class='del'>-				      "Compressed Out Bytes      : \t%lld\n"</div><div class='del'>-				      "Average Chunk size        : \t%llu\n"</div><div class='del'>-				      "Average Compression ratio : \t%llu\n"</div><div class='del'>-				      "Decomp Req Submitted      : \t%lld\n"</div><div class='del'>-				      "Decomp Req Completed      : \t%lld\n"</div><div class='del'>-				      "Decompress In Bytes       : \t%lld\n"</div><div class='del'>-				      "Decompressed Out Bytes    : \t%lld\n"</div><div class='del'>-				      "Decompress Bad requests   : \t%lld\n"</div><div class='del'>-				      "Pending Req               : \t%lld\n"</div><div class='del'>-					"---------------------------------\n",</div><div class='del'>-				       index,</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;comp_req_submit),</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;comp_req_complete),</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;comp_in_bytes),</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;comp_out_bytes),</div><div class='del'>-				       avg_chunk,</div><div class='del'>-				       avg_cr,</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;decomp_req_submit),</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;decomp_req_complete),</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;decomp_in_bytes),</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;decomp_out_bytes),</div><div class='del'>-				       (u64)atomic64_read(&amp;st-&gt;decomp_bad_reqs),</div><div class='del'>-				       pending);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Clears stats data */</div><div class='del'>-static int zip_clear_show(struct seq_file *s, void *unused)</div><div class='del'>-{</div><div class='del'>-	int index = 0;</div><div class='del'>-</div><div class='del'>-	for (index = 0; index &lt; MAX_ZIP_DEVICES; index++) {</div><div class='del'>-		if (zip_dev[index]) {</div><div class='del'>-			memset(&amp;zip_dev[index]-&gt;stats, 0,</div><div class='del'>-			       sizeof(struct zip_stats));</div><div class='del'>-			seq_printf(s, "Cleared stats for zip %d\n", index);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct zip_registers zipregs[64] = {</div><div class='del'>-	{"ZIP_CMD_CTL        ",  0x0000ull},</div><div class='del'>-	{"ZIP_THROTTLE       ",  0x0010ull},</div><div class='del'>-	{"ZIP_CONSTANTS      ",  0x00A0ull},</div><div class='del'>-	{"ZIP_QUE0_MAP       ",  0x1400ull},</div><div class='del'>-	{"ZIP_QUE1_MAP       ",  0x1408ull},</div><div class='del'>-	{"ZIP_QUE_ENA        ",  0x0500ull},</div><div class='del'>-	{"ZIP_QUE_PRI        ",  0x0508ull},</div><div class='del'>-	{"ZIP_QUE0_DONE      ",  0x2000ull},</div><div class='del'>-	{"ZIP_QUE1_DONE      ",  0x2008ull},</div><div class='del'>-	{"ZIP_QUE0_DOORBELL  ",  0x4000ull},</div><div class='del'>-	{"ZIP_QUE1_DOORBELL  ",  0x4008ull},</div><div class='del'>-	{"ZIP_QUE0_SBUF_ADDR ",  0x1000ull},</div><div class='del'>-	{"ZIP_QUE1_SBUF_ADDR ",  0x1008ull},</div><div class='del'>-	{"ZIP_QUE0_SBUF_CTL  ",  0x1200ull},</div><div class='del'>-	{"ZIP_QUE1_SBUF_CTL  ",  0x1208ull},</div><div class='del'>-	{ NULL, 0}</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Prints registers' contents */</div><div class='del'>-static int zip_regs_show(struct seq_file *s, void *unused)</div><div class='del'>-{</div><div class='del'>-	u64 val = 0;</div><div class='del'>-	int i = 0, index = 0;</div><div class='del'>-</div><div class='del'>-	for (index = 0; index &lt; MAX_ZIP_DEVICES; index++) {</div><div class='del'>-		if (zip_dev[index]) {</div><div class='del'>-			seq_printf(s, "--------------------------------\n"</div><div class='del'>-				      "     ZIP Device %d Registers\n"</div><div class='del'>-				      "--------------------------------\n",</div><div class='del'>-				      index);</div><div class='del'>-</div><div class='del'>-			i = 0;</div><div class='del'>-</div><div class='del'>-			while (zipregs[i].reg_name) {</div><div class='del'>-				val = zip_reg_read((zip_dev[index]-&gt;reg_base +</div><div class='del'>-						    zipregs[i].reg_offset));</div><div class='del'>-				seq_printf(s, "%s: 0x%016llx\n",</div><div class='del'>-					   zipregs[i].reg_name, val);</div><div class='del'>-				i++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-DEFINE_SHOW_ATTRIBUTE(zip_stats);</div><div class='del'>-DEFINE_SHOW_ATTRIBUTE(zip_clear);</div><div class='del'>-DEFINE_SHOW_ATTRIBUTE(zip_regs);</div><div class='del'>-</div><div class='del'>-/* Root directory for thunderx_zip debugfs entry */</div><div class='del'>-static struct dentry *zip_debugfs_root;</div><div class='del'>-</div><div class='del'>-static void zip_debugfs_init(void)</div><div class='del'>-{</div><div class='del'>-	if (!debugfs_initialized())</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	zip_debugfs_root = debugfs_create_dir("thunderx_zip", NULL);</div><div class='del'>-</div><div class='del'>-	/* Creating files for entries inside thunderx_zip directory */</div><div class='del'>-	debugfs_create_file("zip_stats", 0444, zip_debugfs_root, NULL,</div><div class='del'>-			    &amp;zip_stats_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("zip_clear", 0444, zip_debugfs_root, NULL,</div><div class='del'>-			    &amp;zip_clear_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("zip_regs", 0444, zip_debugfs_root, NULL,</div><div class='del'>-			    &amp;zip_regs_fops);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void zip_debugfs_exit(void)</div><div class='del'>-{</div><div class='del'>-	debugfs_remove_recursive(zip_debugfs_root);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-static void __init zip_debugfs_init(void) { }</div><div class='del'>-static void __exit zip_debugfs_exit(void) { }</div><div class='del'>-#endif</div><div class='del'>-/* debugfs - end */</div><div class='del'>-</div><div class='del'>-module_pci_driver(zip_driver);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Cavium Inc");</div><div class='del'>-MODULE_DESCRIPTION("Cavium Inc ThunderX ZIP Driver");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_DEVICE_TABLE(pci, zip_id_table);</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_main.h b/drivers/crypto/cavium/zip/zip_main.h<br/>deleted file mode 100644<br/>index e1e4fa92ce80..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_main.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_main.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,120 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __ZIP_MAIN_H__</div><div class='del'>-#define __ZIP_MAIN_H__</div><div class='del'>-</div><div class='del'>-#include "zip_device.h"</div><div class='del'>-#include "zip_regs.h"</div><div class='del'>-</div><div class='del'>-/* PCI device IDs */</div><div class='del'>-#define PCI_DEVICE_ID_THUNDERX_ZIP   0xA01A</div><div class='del'>-</div><div class='del'>-/* ZIP device BARs */</div><div class='del'>-#define PCI_CFG_ZIP_PF_BAR0   0  /* Base addr for normal regs */</div><div class='del'>-</div><div class='del'>-/* Maximum available zip queues */</div><div class='del'>-#define ZIP_MAX_NUM_QUEUES    8</div><div class='del'>-</div><div class='del'>-#define ZIP_128B_ALIGN        7</div><div class='del'>-</div><div class='del'>-/* Command queue buffer size */</div><div class='del'>-#define ZIP_CMD_QBUF_SIZE     (8064 + 8)</div><div class='del'>-</div><div class='del'>-struct zip_registers {</div><div class='del'>-	char  *reg_name;</div><div class='del'>-	u64   reg_offset;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ZIP Compression - Decompression stats */</div><div class='del'>-struct zip_stats {</div><div class='del'>-	atomic64_t    comp_req_submit;</div><div class='del'>-	atomic64_t    comp_req_complete;</div><div class='del'>-	atomic64_t    decomp_req_submit;</div><div class='del'>-	atomic64_t    decomp_req_complete;</div><div class='del'>-	atomic64_t    comp_in_bytes;</div><div class='del'>-	atomic64_t    comp_out_bytes;</div><div class='del'>-	atomic64_t    decomp_in_bytes;</div><div class='del'>-	atomic64_t    decomp_out_bytes;</div><div class='del'>-	atomic64_t    decomp_bad_reqs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ZIP Instruction Queue */</div><div class='del'>-struct zip_iq {</div><div class='del'>-	u64        *sw_head;</div><div class='del'>-	u64        *sw_tail;</div><div class='del'>-	u64        *hw_tail;</div><div class='del'>-	u64        done_cnt;</div><div class='del'>-	u64        pend_cnt;</div><div class='del'>-	u64        free_flag;</div><div class='del'>-</div><div class='del'>-	/* ZIP IQ lock */</div><div class='del'>-	spinlock_t  lock;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ZIP Device */</div><div class='del'>-struct zip_device {</div><div class='del'>-	u32               index;</div><div class='del'>-	void __iomem      *reg_base;</div><div class='del'>-	struct pci_dev    *pdev;</div><div class='del'>-</div><div class='del'>-	/* Different ZIP Constants */</div><div class='del'>-	u64               depth;</div><div class='del'>-	u64               onfsize;</div><div class='del'>-	u64               ctxsize;</div><div class='del'>-</div><div class='del'>-	struct zip_iq     iq[ZIP_MAX_NUM_QUEUES];</div><div class='del'>-	struct zip_stats  stats;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Prototypes */</div><div class='del'>-struct zip_device *zip_get_device(int node_id);</div><div class='del'>-int zip_get_node_id(void);</div><div class='del'>-void zip_reg_write(u64 val, u64 __iomem *addr);</div><div class='del'>-u64 zip_reg_read(u64 __iomem *addr);</div><div class='del'>-void zip_update_cmd_bufs(struct zip_device *zip_dev, u32 queue);</div><div class='del'>-u32 zip_load_instr(union zip_inst_s *instr, struct zip_device *zip_dev);</div><div class='del'>-</div><div class='del'>-#endif /* ZIP_MAIN_H */</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_mem.c b/drivers/crypto/cavium/zip/zip_mem.c<br/>deleted file mode 100644<br/>index b3e0843a9169..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_mem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_mem.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,114 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-</div><div class='del'>-#include "common.h"</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_cmd_qbuf_alloc - Allocates a cmd buffer for ZIP Instruction Queue</div><div class='del'>- * @zip: Pointer to zip device structure</div><div class='del'>- * @q:   Queue number to allocate bufffer to</div><div class='del'>- * Return: 0 if successful, -ENOMEM otherwise</div><div class='del'>- */</div><div class='del'>-int zip_cmd_qbuf_alloc(struct zip_device *zip, int q)</div><div class='del'>-{</div><div class='del'>-	zip-&gt;iq[q].sw_head = (u64 *)__get_free_pages((GFP_KERNEL | GFP_DMA),</div><div class='del'>-						get_order(ZIP_CMD_QBUF_SIZE));</div><div class='del'>-</div><div class='del'>-	if (!zip-&gt;iq[q].sw_head)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	memset(zip-&gt;iq[q].sw_head, 0, ZIP_CMD_QBUF_SIZE);</div><div class='del'>-</div><div class='del'>-	zip_dbg("cmd_qbuf_alloc[%d] Success : %p\n", q, zip-&gt;iq[q].sw_head);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_cmd_qbuf_free - Frees the cmd Queue buffer</div><div class='del'>- * @zip: Pointer to zip device structure</div><div class='del'>- * @q:   Queue number to free buffer of</div><div class='del'>- */</div><div class='del'>-void zip_cmd_qbuf_free(struct zip_device *zip, int q)</div><div class='del'>-{</div><div class='del'>-	zip_dbg("Freeing cmd_qbuf 0x%lx\n", zip-&gt;iq[q].sw_tail);</div><div class='del'>-</div><div class='del'>-	free_pages((u64)zip-&gt;iq[q].sw_tail, get_order(ZIP_CMD_QBUF_SIZE));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_data_buf_alloc - Allocates memory for a data bufffer</div><div class='del'>- * @size:   Size of the buffer to allocate</div><div class='del'>- * Returns: Pointer to the buffer allocated</div><div class='del'>- */</div><div class='del'>-u8 *zip_data_buf_alloc(u64 size)</div><div class='del'>-{</div><div class='del'>-	u8 *ptr;</div><div class='del'>-</div><div class='del'>-	ptr = (u8 *)__get_free_pages((GFP_KERNEL | GFP_DMA),</div><div class='del'>-					get_order(size));</div><div class='del'>-</div><div class='del'>-	if (!ptr)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	memset(ptr, 0, size);</div><div class='del'>-</div><div class='del'>-	zip_dbg("Data buffer allocation success\n");</div><div class='del'>-	return ptr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_data_buf_free - Frees the memory of a data buffer</div><div class='del'>- * @ptr:  Pointer to the buffer</div><div class='del'>- * @size: Buffer size</div><div class='del'>- */</div><div class='del'>-void zip_data_buf_free(u8 *ptr, u64 size)</div><div class='del'>-{</div><div class='del'>-	zip_dbg("Freeing data buffer 0x%lx\n", ptr);</div><div class='del'>-</div><div class='del'>-	free_pages((u64)ptr, get_order(size));</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_mem.h b/drivers/crypto/cavium/zip/zip_mem.h<br/>deleted file mode 100644<br/>index f8f2f08c4a5c..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_mem.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_mem.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,78 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __ZIP_MEM_H__</div><div class='del'>-#define __ZIP_MEM_H__</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_cmd_qbuf_free - Frees the cmd Queue buffer</div><div class='del'>- * @zip: Pointer to zip device structure</div><div class='del'>- * @q:   Queue nmber to free buffer of</div><div class='del'>- */</div><div class='del'>-void zip_cmd_qbuf_free(struct zip_device *zip, int q);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_cmd_qbuf_alloc - Allocates a Chunk/cmd buffer for ZIP Inst(cmd) Queue</div><div class='del'>- * @zip: Pointer to zip device structure</div><div class='del'>- * @q:   Queue number to allocate bufffer to</div><div class='del'>- * Return: 0 if successful, 1 otherwise</div><div class='del'>- */</div><div class='del'>-int zip_cmd_qbuf_alloc(struct zip_device *zip, int q);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_data_buf_alloc - Allocates memory for a data bufffer</div><div class='del'>- * @size:   Size of the buffer to allocate</div><div class='del'>- * Returns: Pointer to the buffer allocated</div><div class='del'>- */</div><div class='del'>-u8 *zip_data_buf_alloc(u64 size);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * zip_data_buf_free - Frees the memory of a data buffer</div><div class='del'>- * @ptr:  Pointer to the buffer</div><div class='del'>- * @size: Buffer size</div><div class='del'>- */</div><div class='del'>-void zip_data_buf_free(u8 *ptr, u64 size);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/crypto/cavium/zip/zip_regs.h b/drivers/crypto/cavium/zip/zip_regs.h<br/>deleted file mode 100644<br/>index 874e0236c87e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/cavium/zip/zip_regs.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/cavium/zip/zip_regs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1347 +0,0 @@</div><div class='del'>-/***********************license start************************************</div><div class='del'>- * Copyright (c) 2003-2017 Cavium, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * License: one of 'Cavium License' or 'GNU General Public License Version 2'</div><div class='del'>- *</div><div class='del'>- * This file is provided under the terms of the Cavium License (see below)</div><div class='del'>- * or under the terms of GNU General Public License, Version 2, as</div><div class='del'>- * published by the Free Software Foundation. When using or redistributing</div><div class='del'>- * this file, you may do so under either license.</div><div class='del'>- *</div><div class='del'>- * Cavium License:  Redistribution and use in source and binary forms, with</div><div class='del'>- * or without modification, are permitted provided that the following</div><div class='del'>- * conditions are met:</div><div class='del'>- *</div><div class='del'>- *  * Redistributions of source code must retain the above copyright</div><div class='del'>- *    notice, this list of conditions and the following disclaimer.</div><div class='del'>- *</div><div class='del'>- *  * Redistributions in binary form must reproduce the above</div><div class='del'>- *    copyright notice, this list of conditions and the following</div><div class='del'>- *    disclaimer in the documentation and/or other materials provided</div><div class='del'>- *    with the distribution.</div><div class='del'>- *</div><div class='del'>- *  * Neither the name of Cavium Inc. nor the names of its contributors may be</div><div class='del'>- *    used to endorse or promote products derived from this software without</div><div class='del'>- *    specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * This Software, including technical data, may be subject to U.S. export</div><div class='del'>- * control laws, including the U.S. Export Administration Act and its</div><div class='del'>- * associated regulations, and may be subject to export or import</div><div class='del'>- * regulations in other countries.</div><div class='del'>- *</div><div class='del'>- * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"</div><div class='del'>- * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS</div><div class='del'>- * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH</div><div class='del'>- * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY</div><div class='del'>- * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT</div><div class='del'>- * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY)</div><div class='del'>- * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A</div><div class='del'>- * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET</div><div class='del'>- * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE</div><div class='del'>- * ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES</div><div class='del'>- * WITH YOU.</div><div class='del'>- ***********************license end**************************************/</div><div class='del'>-</div><div class='del'>-#ifndef __ZIP_REGS_H__</div><div class='del'>-#define __ZIP_REGS_H__</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Configuration and status register (CSR) address and type definitions for</div><div class='del'>- * Cavium ZIP.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kern_levels.h&gt;</div><div class='del'>-</div><div class='del'>-/* ZIP invocation result completion status codes */</div><div class='del'>-#define ZIP_CMD_NOTDONE        0x0</div><div class='del'>-</div><div class='del'>-/* Successful completion. */</div><div class='del'>-#define ZIP_CMD_SUCCESS        0x1</div><div class='del'>-</div><div class='del'>-/* Output truncated */</div><div class='del'>-#define ZIP_CMD_DTRUNC         0x2</div><div class='del'>-</div><div class='del'>-/* Dynamic Stop */</div><div class='del'>-#define ZIP_CMD_DYNAMIC_STOP   0x3</div><div class='del'>-</div><div class='del'>-/* Uncompress ran out of input data when IWORD0[EF] was set */</div><div class='del'>-#define ZIP_CMD_ITRUNC         0x4</div><div class='del'>-</div><div class='del'>-/* Uncompress found the reserved block type 3 */</div><div class='del'>-#define ZIP_CMD_RBLOCK         0x5</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Uncompress found LEN != ZIP_CMD_NLEN in an uncompressed block in the input.</div><div class='del'>- */</div><div class='del'>-#define ZIP_CMD_NLEN           0x6</div><div class='del'>-</div><div class='del'>-/* Uncompress found a bad code in the main Huffman codes. */</div><div class='del'>-#define ZIP_CMD_BADCODE        0x7</div><div class='del'>-</div><div class='del'>-/* Uncompress found a bad code in the 19 Huffman codes encoding lengths. */</div><div class='del'>-#define ZIP_CMD_BADCODE2       0x8</div><div class='del'>-</div><div class='del'>-/* Compress found a zero-length input. */</div><div class='del'>-#define ZIP_CMD_ZERO_LEN       0x9</div><div class='del'>-</div><div class='del'>-/* The compress or decompress encountered an internal parity error. */</div><div class='del'>-#define ZIP_CMD_PARITY         0xA</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Uncompress found a string identifier that precedes the uncompressed data and</div><div class='del'>- * decompression history.</div><div class='del'>- */</div><div class='del'>-#define ZIP_CMD_FATAL          0xB</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * enum zip_int_vec_e - ZIP MSI-X Vector Enumeration, enumerates the MSI-X</div><div class='del'>- * interrupt vectors.</div><div class='del'>- */</div><div class='del'>-enum zip_int_vec_e {</div><div class='del'>-	ZIP_INT_VEC_E_ECCE = 0x10,</div><div class='del'>-	ZIP_INT_VEC_E_FIFE = 0x11,</div><div class='del'>-	ZIP_INT_VEC_E_QUE0_DONE = 0x0,</div><div class='del'>-	ZIP_INT_VEC_E_QUE0_ERR = 0x8,</div><div class='del'>-	ZIP_INT_VEC_E_QUE1_DONE = 0x1,</div><div class='del'>-	ZIP_INT_VEC_E_QUE1_ERR = 0x9,</div><div class='del'>-	ZIP_INT_VEC_E_QUE2_DONE = 0x2,</div><div class='del'>-	ZIP_INT_VEC_E_QUE2_ERR = 0xa,</div><div class='del'>-	ZIP_INT_VEC_E_QUE3_DONE = 0x3,</div><div class='del'>-	ZIP_INT_VEC_E_QUE3_ERR = 0xb,</div><div class='del'>-	ZIP_INT_VEC_E_QUE4_DONE = 0x4,</div><div class='del'>-	ZIP_INT_VEC_E_QUE4_ERR = 0xc,</div><div class='del'>-	ZIP_INT_VEC_E_QUE5_DONE = 0x5,</div><div class='del'>-	ZIP_INT_VEC_E_QUE5_ERR = 0xd,</div><div class='del'>-	ZIP_INT_VEC_E_QUE6_DONE = 0x6,</div><div class='del'>-	ZIP_INT_VEC_E_QUE6_ERR = 0xe,</div><div class='del'>-	ZIP_INT_VEC_E_QUE7_DONE = 0x7,</div><div class='del'>-	ZIP_INT_VEC_E_QUE7_ERR = 0xf,</div><div class='del'>-	ZIP_INT_VEC_E_ENUM_LAST = 0x12,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_zptr_addr_s - ZIP Generic Pointer Structure for ADDR.</div><div class='del'>- *</div><div class='del'>- * It is the generic format of pointers in ZIP_INST_S.</div><div class='del'>- */</div><div class='del'>-union zip_zptr_addr_s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-		u64 addr                        : 49;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 addr                        : 49;</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_zptr_ctl_s - ZIP Generic Pointer Structure for CTL.</div><div class='del'>- *</div><div class='del'>- * It is the generic format of pointers in ZIP_INST_S.</div><div class='del'>- */</div><div class='del'>-union zip_zptr_ctl_s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_112_127            : 16;</div><div class='del'>-		u64 length                      : 16;</div><div class='del'>-		u64 reserved_67_95              : 29;</div><div class='del'>-		u64 fw                          : 1;</div><div class='del'>-		u64 nc                          : 1;</div><div class='del'>-		u64 data_be                     : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 data_be                     : 1;</div><div class='del'>-		u64 nc                          : 1;</div><div class='del'>-		u64 fw                          : 1;</div><div class='del'>-		u64 reserved_67_95              : 29;</div><div class='del'>-		u64 length                      : 16;</div><div class='del'>-		u64 reserved_112_127            : 16;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_inst_s - ZIP Instruction Structure.</div><div class='del'>- * Each ZIP instruction has 16 words (they are called IWORD0 to IWORD15 within</div><div class='del'>- * the structure).</div><div class='del'>- */</div><div class='del'>-union zip_inst_s {</div><div class='del'>-	u64 u_reg64[16];</div><div class='del'>-	struct {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 doneint                     : 1;</div><div class='del'>-		u64 reserved_56_62              : 7;</div><div class='del'>-		u64 totaloutputlength           : 24;</div><div class='del'>-		u64 reserved_27_31              : 5;</div><div class='del'>-		u64 exn                         : 3;</div><div class='del'>-		u64 reserved_23_23              : 1;</div><div class='del'>-		u64 exbits                      : 7;</div><div class='del'>-		u64 reserved_12_15              : 4;</div><div class='del'>-		u64 sf                          : 1;</div><div class='del'>-		u64 ss                          : 2;</div><div class='del'>-		u64 cc                          : 2;</div><div class='del'>-		u64 ef                          : 1;</div><div class='del'>-		u64 bf                          : 1;</div><div class='del'>-		u64 ce                          : 1;</div><div class='del'>-		u64 reserved_3_3                : 1;</div><div class='del'>-		u64 ds                          : 1;</div><div class='del'>-		u64 dg                          : 1;</div><div class='del'>-		u64 hg                          : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 hg                          : 1;</div><div class='del'>-		u64 dg                          : 1;</div><div class='del'>-		u64 ds                          : 1;</div><div class='del'>-		u64 reserved_3_3                : 1;</div><div class='del'>-		u64 ce                          : 1;</div><div class='del'>-		u64 bf                          : 1;</div><div class='del'>-		u64 ef                          : 1;</div><div class='del'>-		u64 cc                          : 2;</div><div class='del'>-		u64 ss                          : 2;</div><div class='del'>-		u64 sf                          : 1;</div><div class='del'>-		u64 reserved_12_15              : 4;</div><div class='del'>-		u64 exbits                      : 7;</div><div class='del'>-		u64 reserved_23_23              : 1;</div><div class='del'>-		u64 exn                         : 3;</div><div class='del'>-		u64 reserved_27_31              : 5;</div><div class='del'>-		u64 totaloutputlength           : 24;</div><div class='del'>-		u64 reserved_56_62              : 7;</div><div class='del'>-		u64 doneint                     : 1;</div><div class='del'>-#endif</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 historylength               : 16;</div><div class='del'>-		u64 reserved_96_111             : 16;</div><div class='del'>-		u64 adlercrc32                  : 32;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 adlercrc32                  : 32;</div><div class='del'>-		u64 reserved_96_111             : 16;</div><div class='del'>-		u64 historylength               : 16;</div><div class='del'>-#endif</div><div class='del'>-		union zip_zptr_addr_s ctx_ptr_addr;</div><div class='del'>-		union zip_zptr_ctl_s ctx_ptr_ctl;</div><div class='del'>-		union zip_zptr_addr_s his_ptr_addr;</div><div class='del'>-		union zip_zptr_ctl_s his_ptr_ctl;</div><div class='del'>-		union zip_zptr_addr_s inp_ptr_addr;</div><div class='del'>-		union zip_zptr_ctl_s inp_ptr_ctl;</div><div class='del'>-		union zip_zptr_addr_s out_ptr_addr;</div><div class='del'>-		union zip_zptr_ctl_s out_ptr_ctl;</div><div class='del'>-		union zip_zptr_addr_s res_ptr_addr;</div><div class='del'>-		union zip_zptr_ctl_s res_ptr_ctl;</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_817_831            : 15;</div><div class='del'>-		u64 wq_ptr                      : 49;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 wq_ptr                      : 49;</div><div class='del'>-		u64 reserved_817_831            : 15;</div><div class='del'>-#endif</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_882_895            : 14;</div><div class='del'>-		u64 tt                          : 2;</div><div class='del'>-		u64 reserved_874_879            : 6;</div><div class='del'>-		u64 grp                         : 10;</div><div class='del'>-		u64 tag                         : 32;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 tag                         : 32;</div><div class='del'>-		u64 grp                         : 10;</div><div class='del'>-		u64 reserved_874_879            : 6;</div><div class='del'>-		u64 tt                          : 2;</div><div class='del'>-		u64 reserved_882_895            : 14;</div><div class='del'>-#endif</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_896_959            : 64;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_896_959            : 64;</div><div class='del'>-#endif</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_960_1023           : 64;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_960_1023           : 64;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_nptr_s - ZIP Instruction Next-Chunk-Buffer Pointer (NPTR)</div><div class='del'>- * Structure</div><div class='del'>- *</div><div class='del'>- * ZIP_NPTR structure is used to chain all the zip instruction buffers</div><div class='del'>- * together. ZIP instruction buffers are managed (allocated and released) by</div><div class='del'>- * the software.</div><div class='del'>- */</div><div class='del'>-union zip_nptr_s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-		u64 addr                        : 49;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 addr                        : 49;</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_zptr_s - ZIP Generic Pointer Structure.</div><div class='del'>- *</div><div class='del'>- * It is the generic format of pointers in ZIP_INST_S.</div><div class='del'>- */</div><div class='del'>-union zip_zptr_s {</div><div class='del'>-	u64 u_reg64[2];</div><div class='del'>-	struct {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-		u64 addr                        : 49;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 addr                        : 49;</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-#endif</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_112_127            : 16;</div><div class='del'>-		u64 length                      : 16;</div><div class='del'>-		u64 reserved_67_95              : 29;</div><div class='del'>-		u64 fw                          : 1;</div><div class='del'>-		u64 nc                          : 1;</div><div class='del'>-		u64 data_be                     : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 data_be                     : 1;</div><div class='del'>-		u64 nc                          : 1;</div><div class='del'>-		u64 fw                          : 1;</div><div class='del'>-		u64 reserved_67_95              : 29;</div><div class='del'>-		u64 length                      : 16;</div><div class='del'>-		u64 reserved_112_127            : 16;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_zres_s - ZIP Result Structure</div><div class='del'>- *</div><div class='del'>- * The ZIP coprocessor writes the result structure after it completes the</div><div class='del'>- * invocation. The result structure is exactly 24 bytes, and each invocation of</div><div class='del'>- * the ZIP coprocessor produces exactly one result structure.</div><div class='del'>- */</div><div class='del'>-union zip_zres_s {</div><div class='del'>-	u64 u_reg64[3];</div><div class='del'>-	struct {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 crc32                       : 32;</div><div class='del'>-		u64 adler32                     : 32;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 adler32                     : 32;</div><div class='del'>-		u64 crc32                       : 32;</div><div class='del'>-#endif</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 totalbyteswritten           : 32;</div><div class='del'>-		u64 totalbytesread              : 32;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 totalbytesread              : 32;</div><div class='del'>-		u64 totalbyteswritten           : 32;</div><div class='del'>-#endif</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 totalbitsprocessed          : 32;</div><div class='del'>-		u64 doneint                     : 1;</div><div class='del'>-		u64 reserved_155_158            : 4;</div><div class='del'>-		u64 exn                         : 3;</div><div class='del'>-		u64 reserved_151_151            : 1;</div><div class='del'>-		u64 exbits                      : 7;</div><div class='del'>-		u64 reserved_137_143            : 7;</div><div class='del'>-		u64 ef                          : 1;</div><div class='del'>-</div><div class='del'>-		volatile u64 compcode           : 8;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-</div><div class='del'>-		volatile u64 compcode           : 8;</div><div class='del'>-		u64 ef                          : 1;</div><div class='del'>-		u64 reserved_137_143            : 7;</div><div class='del'>-		u64 exbits                      : 7;</div><div class='del'>-		u64 reserved_151_151            : 1;</div><div class='del'>-		u64 exn                         : 3;</div><div class='del'>-		u64 reserved_155_158            : 4;</div><div class='del'>-		u64 doneint                     : 1;</div><div class='del'>-		u64 totalbitsprocessed          : 32;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_cmd_ctl - Structure representing the register that controls</div><div class='del'>- * clock and reset.</div><div class='del'>- */</div><div class='del'>-union zip_cmd_ctl {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_cmd_ctl_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_2_63               : 62;</div><div class='del'>-		u64 forceclk                    : 1;</div><div class='del'>-		u64 reset                       : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reset                       : 1;</div><div class='del'>-		u64 forceclk                    : 1;</div><div class='del'>-		u64 reserved_2_63               : 62;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_CMD_CTL 0x0ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_constants - Data structure representing the register that contains</div><div class='del'>- * all of the current implementation-related parameters of the zip core in this</div><div class='del'>- * chip.</div><div class='del'>- */</div><div class='del'>-union zip_constants {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_constants_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 nexec                       : 8;</div><div class='del'>-		u64 reserved_49_55              : 7;</div><div class='del'>-		u64 syncflush_capable           : 1;</div><div class='del'>-		u64 depth                       : 16;</div><div class='del'>-		u64 onfsize                     : 12;</div><div class='del'>-		u64 ctxsize                     : 12;</div><div class='del'>-		u64 reserved_1_7                : 7;</div><div class='del'>-		u64 disabled                    : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 disabled                    : 1;</div><div class='del'>-		u64 reserved_1_7                : 7;</div><div class='del'>-		u64 ctxsize                     : 12;</div><div class='del'>-		u64 onfsize                     : 12;</div><div class='del'>-		u64 depth                       : 16;</div><div class='del'>-		u64 syncflush_capable           : 1;</div><div class='del'>-		u64 reserved_49_55              : 7;</div><div class='del'>-		u64 nexec                       : 8;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_CONSTANTS 0x00A0ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_corex_bist_status - Represents registers which have the BIST</div><div class='del'>- * status of memories in zip cores.</div><div class='del'>- *</div><div class='del'>- * Each bit is the BIST result of an individual memory</div><div class='del'>- * (per bit, 0 = pass and 1 = fail).</div><div class='del'>- */</div><div class='del'>-union zip_corex_bist_status {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_corex_bist_status_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_53_63              : 11;</div><div class='del'>-		u64 bstatus                     : 53;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 bstatus                     : 53;</div><div class='del'>-		u64 reserved_53_63              : 11;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_COREX_BIST_STATUS(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 1)</div><div class='del'>-		return 0x0520ull + (param1 &amp; 1) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_COREX_BIST_STATUS: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_ctl_bist_status - Represents register that has the BIST status of</div><div class='del'>- * memories in ZIP_CTL (instruction buffer, G/S pointer FIFO, input data</div><div class='del'>- * buffer, output data buffers).</div><div class='del'>- *</div><div class='del'>- * Each bit is the BIST result of an individual memory</div><div class='del'>- * (per bit, 0 = pass and 1 = fail).</div><div class='del'>- */</div><div class='del'>-union zip_ctl_bist_status {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_ctl_bist_status_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_9_63               : 55;</div><div class='del'>-		u64 bstatus                     : 9;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 bstatus                     : 9;</div><div class='del'>-		u64 reserved_9_63               : 55;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_CTL_BIST_STATUS 0x0510ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_ctl_cfg - Represents the register that controls the behavior of</div><div class='del'>- * the ZIP DMA engines.</div><div class='del'>- *</div><div class='del'>- * It is recommended to keep default values for normal operation. Changing the</div><div class='del'>- * values of the fields may be useful for diagnostics.</div><div class='del'>- */</div><div class='del'>-union zip_ctl_cfg {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_ctl_cfg_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_52_63              : 12;</div><div class='del'>-		u64 ildf                        : 4;</div><div class='del'>-		u64 reserved_36_47              : 12;</div><div class='del'>-		u64 drtf                        : 4;</div><div class='del'>-		u64 reserved_27_31              : 5;</div><div class='del'>-		u64 stcf                        : 3;</div><div class='del'>-		u64 reserved_19_23              : 5;</div><div class='del'>-		u64 ldf                         : 3;</div><div class='del'>-		u64 reserved_2_15               : 14;</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-		u64 reserved_0_0                : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_0_0                : 1;</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-		u64 reserved_2_15               : 14;</div><div class='del'>-		u64 ldf                         : 3;</div><div class='del'>-		u64 reserved_19_23              : 5;</div><div class='del'>-		u64 stcf                        : 3;</div><div class='del'>-		u64 reserved_27_31              : 5;</div><div class='del'>-		u64 drtf                        : 4;</div><div class='del'>-		u64 reserved_36_47              : 12;</div><div class='del'>-		u64 ildf                        : 4;</div><div class='del'>-		u64 reserved_52_63              : 12;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_CTL_CFG 0x0560ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_dbg_corex_inst - Represents the registers that reflect the status</div><div class='del'>- * of the current instruction that the ZIP core is executing or has executed.</div><div class='del'>- *</div><div class='del'>- * These registers are only for debug use.</div><div class='del'>- */</div><div class='del'>-union zip_dbg_corex_inst {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_dbg_corex_inst_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-		u64 reserved_35_62              : 28;</div><div class='del'>-		u64 qid                         : 3;</div><div class='del'>-		u64 iid                         : 32;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 iid                         : 32;</div><div class='del'>-		u64 qid                         : 3;</div><div class='del'>-		u64 reserved_35_62              : 28;</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_DBG_COREX_INST(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 1)</div><div class='del'>-		return 0x0640ull + (param1 &amp; 1) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_DBG_COREX_INST: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_dbg_corex_sta - Represents registers that reflect the status of</div><div class='del'>- * the zip cores.</div><div class='del'>- *</div><div class='del'>- * They are for debug use only.</div><div class='del'>- */</div><div class='del'>-union zip_dbg_corex_sta {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_dbg_corex_sta_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-		u64 reserved_37_62              : 26;</div><div class='del'>-		u64 ist                         : 5;</div><div class='del'>-		u64 nie                         : 32;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 nie                         : 32;</div><div class='del'>-		u64 ist                         : 5;</div><div class='del'>-		u64 reserved_37_62              : 26;</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_DBG_COREX_STA(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 1)</div><div class='del'>-		return 0x0680ull + (param1 &amp; 1) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_DBG_COREX_STA: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_dbg_quex_sta - Represets registers that reflect status of the zip</div><div class='del'>- * instruction queues.</div><div class='del'>- *</div><div class='del'>- * They are for debug use only.</div><div class='del'>- */</div><div class='del'>-union zip_dbg_quex_sta {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_dbg_quex_sta_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-		u64 reserved_56_62              : 7;</div><div class='del'>-		u64 rqwc                        : 24;</div><div class='del'>-		u64 nii                         : 32;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 nii                         : 32;</div><div class='del'>-		u64 rqwc                        : 24;</div><div class='del'>-		u64 reserved_56_62              : 7;</div><div class='del'>-		u64 busy                        : 1;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_DBG_QUEX_STA(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x1800ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_DBG_QUEX_STA: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_ecc_ctl - Represents the register that enables ECC for each</div><div class='del'>- * individual internal memory that requires ECC.</div><div class='del'>- *</div><div class='del'>- * For debug purpose, it can also flip one or two bits in the ECC data.</div><div class='del'>- */</div><div class='del'>-union zip_ecc_ctl {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_ecc_ctl_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_19_63              : 45;</div><div class='del'>-		u64 vmem_cdis                   : 1;</div><div class='del'>-		u64 vmem_fs                     : 2;</div><div class='del'>-		u64 reserved_15_15              : 1;</div><div class='del'>-		u64 idf1_cdis                   : 1;</div><div class='del'>-		u64 idf1_fs                     : 2;</div><div class='del'>-		u64 reserved_11_11              : 1;</div><div class='del'>-		u64 idf0_cdis                   : 1;</div><div class='del'>-		u64 idf0_fs                     : 2;</div><div class='del'>-		u64 reserved_7_7                : 1;</div><div class='del'>-		u64 gspf_cdis                   : 1;</div><div class='del'>-		u64 gspf_fs                     : 2;</div><div class='del'>-		u64 reserved_3_3                : 1;</div><div class='del'>-		u64 iqf_cdis                    : 1;</div><div class='del'>-		u64 iqf_fs                      : 2;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 iqf_fs                      : 2;</div><div class='del'>-		u64 iqf_cdis                    : 1;</div><div class='del'>-		u64 reserved_3_3                : 1;</div><div class='del'>-		u64 gspf_fs                     : 2;</div><div class='del'>-		u64 gspf_cdis                   : 1;</div><div class='del'>-		u64 reserved_7_7                : 1;</div><div class='del'>-		u64 idf0_fs                     : 2;</div><div class='del'>-		u64 idf0_cdis                   : 1;</div><div class='del'>-		u64 reserved_11_11              : 1;</div><div class='del'>-		u64 idf1_fs                     : 2;</div><div class='del'>-		u64 idf1_cdis                   : 1;</div><div class='del'>-		u64 reserved_15_15              : 1;</div><div class='del'>-		u64 vmem_fs                     : 2;</div><div class='del'>-		u64 vmem_cdis                   : 1;</div><div class='del'>-		u64 reserved_19_63              : 45;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_ECC_CTL 0x0568ull</div><div class='del'>-</div><div class='del'>-/* NCB - zip_ecce_ena_w1c */</div><div class='del'>-union zip_ecce_ena_w1c {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_ecce_ena_w1c_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_ECCE_ENA_W1C 0x0598ull</div><div class='del'>-</div><div class='del'>-/* NCB - zip_ecce_ena_w1s */</div><div class='del'>-union zip_ecce_ena_w1s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_ecce_ena_w1s_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_ECCE_ENA_W1S 0x0590ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_ecce_int - Represents the register that contains the status of the</div><div class='del'>- * ECC interrupt sources.</div><div class='del'>- */</div><div class='del'>-union zip_ecce_int {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_ecce_int_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_ECCE_INT 0x0580ull</div><div class='del'>-</div><div class='del'>-/* NCB - zip_ecce_int_w1s */</div><div class='del'>-union zip_ecce_int_w1s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_ecce_int_w1s_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 sbe                         : 5;</div><div class='del'>-		u64 reserved_5_31               : 27;</div><div class='del'>-		u64 dbe                         : 5;</div><div class='del'>-		u64 reserved_37_63              : 27;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_ECCE_INT_W1S 0x0588ull</div><div class='del'>-</div><div class='del'>-/* NCB - zip_fife_ena_w1c */</div><div class='del'>-union zip_fife_ena_w1c {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_fife_ena_w1c_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_FIFE_ENA_W1C 0x0090ull</div><div class='del'>-</div><div class='del'>-/* NCB - zip_fife_ena_w1s */</div><div class='del'>-union zip_fife_ena_w1s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_fife_ena_w1s_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_FIFE_ENA_W1S 0x0088ull</div><div class='del'>-</div><div class='del'>-/* NCB - zip_fife_int */</div><div class='del'>-union zip_fife_int {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_fife_int_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_FIFE_INT 0x0078ull</div><div class='del'>-</div><div class='del'>-/* NCB - zip_fife_int_w1s */</div><div class='del'>-union zip_fife_int_w1s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_fife_int_w1s_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 asserts                     : 42;</div><div class='del'>-		u64 reserved_42_63              : 22;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_FIFE_INT_W1S 0x0080ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_msix_pbax - Represents the register that is the MSI-X PBA table</div><div class='del'>- *</div><div class='del'>- * The bit number is indexed by the ZIP_INT_VEC_E enumeration.</div><div class='del'>- */</div><div class='del'>-union zip_msix_pbax {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_msix_pbax_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 pend                        : 64;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 pend                        : 64;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_MSIX_PBAX(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 == 0)</div><div class='del'>-		return 0x0000838000FF0000ull;</div><div class='del'>-	pr_err("ZIP_MSIX_PBAX: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_msix_vecx_addr - Represents the register that is the MSI-X vector</div><div class='del'>- * table, indexed by the ZIP_INT_VEC_E enumeration.</div><div class='del'>- */</div><div class='del'>-union zip_msix_vecx_addr {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_msix_vecx_addr_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-		u64 addr                        : 47;</div><div class='del'>-		u64 reserved_1_1                : 1;</div><div class='del'>-		u64 secvec                      : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 secvec                      : 1;</div><div class='del'>-		u64 reserved_1_1                : 1;</div><div class='del'>-		u64 addr                        : 47;</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_MSIX_VECX_ADDR(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 17)</div><div class='del'>-		return 0x0000838000F00000ull + (param1 &amp; 31) * 0x10ull;</div><div class='del'>-	pr_err("ZIP_MSIX_VECX_ADDR: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_msix_vecx_ctl - Represents the register that is the MSI-X vector</div><div class='del'>- * table, indexed by the ZIP_INT_VEC_E enumeration.</div><div class='del'>- */</div><div class='del'>-union zip_msix_vecx_ctl {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_msix_vecx_ctl_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_33_63              : 31;</div><div class='del'>-		u64 mask                        : 1;</div><div class='del'>-		u64 reserved_20_31              : 12;</div><div class='del'>-		u64 data                        : 20;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 data                        : 20;</div><div class='del'>-		u64 reserved_20_31              : 12;</div><div class='del'>-		u64 mask                        : 1;</div><div class='del'>-		u64 reserved_33_63              : 31;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_MSIX_VECX_CTL(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 17)</div><div class='del'>-		return 0x0000838000F00008ull + (param1 &amp; 31) * 0x10ull;</div><div class='del'>-	pr_err("ZIP_MSIX_VECX_CTL: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_done - Represents the registers that contain the per-queue</div><div class='del'>- * instruction done count.</div><div class='del'>- */</div><div class='del'>-union zip_quex_done {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_done_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_20_63              : 44;</div><div class='del'>-		u64 done                        : 20;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 done                        : 20;</div><div class='del'>-		u64 reserved_20_63              : 44;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_DONE(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x2000ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_DONE: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_done_ack - Represents the registers on write to which will</div><div class='del'>- * decrement the per-queue instructiona done count.</div><div class='del'>- */</div><div class='del'>-union zip_quex_done_ack {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_done_ack_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_20_63              : 44;</div><div class='del'>-		u64 done_ack                    : 20;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 done_ack                    : 20;</div><div class='del'>-		u64 reserved_20_63              : 44;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_DONE_ACK(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x2200ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_DONE_ACK: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_done_ena_w1c - Represents the register which when written</div><div class='del'>- * 1 to will disable the DONEINT interrupt for the queue.</div><div class='del'>- */</div><div class='del'>-union zip_quex_done_ena_w1c {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_done_ena_w1c_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_1_63               : 63;</div><div class='del'>-		u64 done_ena                    : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 done_ena                    : 1;</div><div class='del'>-		u64 reserved_1_63               : 63;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_DONE_ENA_W1C(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x2600ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_DONE_ENA_W1C: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_done_ena_w1s - Represents the register that when written 1 to</div><div class='del'>- * will enable the DONEINT interrupt for the queue.</div><div class='del'>- */</div><div class='del'>-union zip_quex_done_ena_w1s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_done_ena_w1s_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_1_63               : 63;</div><div class='del'>-		u64 done_ena                    : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 done_ena                    : 1;</div><div class='del'>-		u64 reserved_1_63               : 63;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_DONE_ENA_W1S(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x2400ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_DONE_ENA_W1S: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_done_wait - Represents the register that specifies the per</div><div class='del'>- * queue interrupt coalescing settings.</div><div class='del'>- */</div><div class='del'>-union zip_quex_done_wait {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_done_wait_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_48_63              : 16;</div><div class='del'>-		u64 time_wait                   : 16;</div><div class='del'>-		u64 reserved_20_31              : 12;</div><div class='del'>-		u64 num_wait                    : 20;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 num_wait                    : 20;</div><div class='del'>-		u64 reserved_20_31              : 12;</div><div class='del'>-		u64 time_wait                   : 16;</div><div class='del'>-		u64 reserved_48_63              : 16;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_DONE_WAIT(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x2800ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_DONE_WAIT: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_doorbell - Represents doorbell registers for the ZIP</div><div class='del'>- * instruction queues.</div><div class='del'>- */</div><div class='del'>-union zip_quex_doorbell {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_doorbell_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_20_63              : 44;</div><div class='del'>-		u64 dbell_cnt                   : 20;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 dbell_cnt                   : 20;</div><div class='del'>-		u64 reserved_20_63              : 44;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_DOORBELL(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x4000ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_DOORBELL: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-union zip_quex_err_ena_w1c {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_err_ena_w1c_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_ERR_ENA_W1C(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x3600ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_ERR_ENA_W1C: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-union zip_quex_err_ena_w1s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_err_ena_w1s_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_ERR_ENA_W1S(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x3400ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_ERR_ENA_W1S: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_err_int - Represents registers that contain the per-queue</div><div class='del'>- * error interrupts.</div><div class='del'>- */</div><div class='del'>-union zip_quex_err_int {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_err_int_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_ERR_INT(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x3000ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_ERR_INT: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* NCB - zip_que#_err_int_w1s */</div><div class='del'>-union zip_quex_err_int_w1s {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_err_int_w1s_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 dovf                        : 1;</div><div class='del'>-		u64 irde                        : 1;</div><div class='del'>-		u64 nrrp                        : 1;</div><div class='del'>-		u64 nwrp                        : 1;</div><div class='del'>-		u64 mdbe                        : 1;</div><div class='del'>-		u64 reserved_5_63               : 59;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_ERR_INT_W1S(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x3200ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_ERR_INT_W1S: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_gcfg - Represents the registers that reflect status of the</div><div class='del'>- * zip instruction queues,debug use only.</div><div class='del'>- */</div><div class='del'>-union zip_quex_gcfg {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_gcfg_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_4_63               : 60;</div><div class='del'>-		u64 iqb_ldwb                    : 1;</div><div class='del'>-		u64 cbw_sty                     : 1;</div><div class='del'>-		u64 l2ld_cmd                    : 2;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 l2ld_cmd                    : 2;</div><div class='del'>-		u64 cbw_sty                     : 1;</div><div class='del'>-		u64 iqb_ldwb                    : 1;</div><div class='del'>-		u64 reserved_4_63               : 60;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_GCFG(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x1A00ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_GCFG: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_map - Represents the registers that control how each</div><div class='del'>- * instruction queue maps to zip cores.</div><div class='del'>- */</div><div class='del'>-union zip_quex_map {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_map_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_2_63               : 62;</div><div class='del'>-		u64 zce                         : 2;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 zce                         : 2;</div><div class='del'>-		u64 reserved_2_63               : 62;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_MAP(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x1400ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_MAP: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_sbuf_addr - Represents the registers that set the buffer</div><div class='del'>- * parameters for the instruction queues.</div><div class='del'>- *</div><div class='del'>- * When quiescent (i.e. outstanding doorbell count is 0), it is safe to rewrite</div><div class='del'>- * this register to effectively reset the command buffer state machine.</div><div class='del'>- * These registers must be programmed after SW programs the corresponding</div><div class='del'>- * ZIP_QUE(0..7)_SBUF_CTL.</div><div class='del'>- */</div><div class='del'>-union zip_quex_sbuf_addr {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_sbuf_addr_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-		u64 ptr                         : 42;</div><div class='del'>-		u64 off                         : 7;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 off                         : 7;</div><div class='del'>-		u64 ptr                         : 42;</div><div class='del'>-		u64 reserved_49_63              : 15;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_SBUF_ADDR(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x1000ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_SBUF_ADDR: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_quex_sbuf_ctl - Represents the registers that set the buffer</div><div class='del'>- * parameters for the instruction queues.</div><div class='del'>- *</div><div class='del'>- * When quiescent (i.e. outstanding doorbell count is 0), it is safe to rewrite</div><div class='del'>- * this register to effectively reset the command buffer state machine.</div><div class='del'>- * These registers must be programmed before SW programs the corresponding</div><div class='del'>- * ZIP_QUE(0..7)_SBUF_ADDR.</div><div class='del'>- */</div><div class='del'>-union zip_quex_sbuf_ctl {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_quex_sbuf_ctl_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_45_63              : 19;</div><div class='del'>-		u64 size                        : 13;</div><div class='del'>-		u64 inst_be                     : 1;</div><div class='del'>-		u64 reserved_24_30              : 7;</div><div class='del'>-		u64 stream_id                   : 8;</div><div class='del'>-		u64 reserved_12_15              : 4;</div><div class='del'>-		u64 aura                        : 12;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 aura                        : 12;</div><div class='del'>-		u64 reserved_12_15              : 4;</div><div class='del'>-		u64 stream_id                   : 8;</div><div class='del'>-		u64 reserved_24_30              : 7;</div><div class='del'>-		u64 inst_be                     : 1;</div><div class='del'>-		u64 size                        : 13;</div><div class='del'>-		u64 reserved_45_63              : 19;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline u64 ZIP_QUEX_SBUF_CTL(u64 param1)</div><div class='del'>-{</div><div class='del'>-	if (param1 &lt;= 7)</div><div class='del'>-		return 0x1200ull + (param1 &amp; 7) * 0x8ull;</div><div class='del'>-	pr_err("ZIP_QUEX_SBUF_CTL: %llu\n", param1);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_que_ena - Represents queue enable register</div><div class='del'>- *</div><div class='del'>- * If a queue is disabled, ZIP_CTL stops fetching instructions from the queue.</div><div class='del'>- */</div><div class='del'>-union zip_que_ena {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_que_ena_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_8_63               : 56;</div><div class='del'>-		u64 ena                         : 8;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 ena                         : 8;</div><div class='del'>-		u64 reserved_8_63               : 56;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_QUE_ENA 0x0500ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_que_pri - Represents the register that defines the priority</div><div class='del'>- * between instruction queues.</div><div class='del'>- */</div><div class='del'>-union zip_que_pri {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_que_pri_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_8_63               : 56;</div><div class='del'>-		u64 pri                         : 8;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 pri                         : 8;</div><div class='del'>-		u64 reserved_8_63               : 56;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_QUE_PRI 0x0508ull</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * union zip_throttle - Represents the register that controls the maximum</div><div class='del'>- * number of in-flight X2I data fetch transactions.</div><div class='del'>- *</div><div class='del'>- * Writing 0 to this register causes the ZIP module to temporarily suspend NCB</div><div class='del'>- * accesses; it is not recommended for normal operation, but may be useful for</div><div class='del'>- * diagnostics.</div><div class='del'>- */</div><div class='del'>-union zip_throttle {</div><div class='del'>-	u64 u_reg64;</div><div class='del'>-	struct zip_throttle_s {</div><div class='del'>-#if defined(__BIG_ENDIAN_BITFIELD)</div><div class='del'>-		u64 reserved_6_63               : 58;</div><div class='del'>-		u64 ld_infl                     : 6;</div><div class='del'>-#elif defined(__LITTLE_ENDIAN_BITFIELD)</div><div class='del'>-		u64 ld_infl                     : 6;</div><div class='del'>-		u64 reserved_6_63               : 58;</div><div class='del'>-#endif</div><div class='del'>-	} s;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ZIP_THROTTLE 0x0010ull</div><div class='del'>-</div><div class='del'>-#endif /* _CSRS_ZIP__ */</div><div class='head'>diff --git a/drivers/crypto/ccp/ccp-crypto-aes.c b/drivers/crypto/ccp/ccp-crypto-aes.c<br/>index d11daaf47f06..685d42ec7ade 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-crypto-aes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-crypto-aes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-crypto-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/ccp/ccp-crypto-aes.c</a></div><div class='hunk'>@@ -7,15 +7,16 @@</div><div class='ctx'>  * Author: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/scatterlist.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ccp-crypto.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/ccp/ccp-crypto-des3.c b/drivers/crypto/ccp/ccp-crypto-des3.c<br/>index afae30adb703..91b1189c47de 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-crypto-des3.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-crypto-des3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-crypto-des3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/ccp/ccp-crypto-des3.c</a></div><div class='hunk'>@@ -7,14 +7,15 @@</div><div class='ctx'>  * Author: Gary R Hook &lt;ghook@amd.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;crypto/internal/des.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/scatterwalk.h&gt;</div><div class='del'>-#include &lt;crypto/internal/des.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ccp-crypto.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/ccp/ccp-crypto-main.c b/drivers/crypto/ccp/ccp-crypto-main.c<br/>index ecd58b38c46e..bc90aba5162a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-crypto-main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-crypto-main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-crypto-main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/ccp/ccp-crypto-main.c</a></div><div class='hunk'>@@ -7,14 +7,17 @@</div><div class='ctx'>  * Author: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;crypto/internal/akcipher.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/ccp.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/ccp.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/internal/akcipher.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ccp-crypto.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/ccp/ccp-ops.c b/drivers/crypto/ccp/ccp-ops.c<br/>index cb8e99936abb..109b5aef4034 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-ops.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/ccp-ops.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/ccp-ops.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/ccp/ccp-ops.c</a></div><div class='hunk'>@@ -8,13 +8,14 @@</div><div class='ctx'>  * Author: Gary R Hook &lt;gary.hook@amd.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;crypto/des.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;crypto/utils.h&gt;</div><div class='ctx'> #include &lt;linux/ccp.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ccp-dev.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c<br/>index 2e87ca0e292a..3451bada884e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/sev-dev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/sev-dev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/sev-dev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/ccp/sev-dev.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/e820/types.h&gt;</div><div class='ctx'> #include &lt;asm/sev.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "psp-dev.h"</div><div class='ctx'> #include "sev-dev.h"</div><div class='hunk'>@@ -109,6 +110,15 @@ static void *sev_init_ex_buffer;</div><div class='ctx'>  */</div><div class='ctx'> static struct sev_data_range_list *snp_range_list;</div><div class='ctx'> </div><div class='add'>+static void __sev_firmware_shutdown(struct sev_device *sev, bool panic);</div><div class='add'>+</div><div class='add'>+static int snp_shutdown_on_panic(struct notifier_block *nb,</div><div class='add'>+				 unsigned long reason, void *arg);</div><div class='add'>+</div><div class='add'>+static struct notifier_block snp_panic_notifier = {</div><div class='add'>+	.notifier_call = snp_shutdown_on_panic,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline bool sev_version_greater_or_equal(u8 maj, u8 min)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='hunk'>@@ -1060,7 +1070,7 @@ static inline int __sev_do_init_locked(int *psp_ret)</div><div class='ctx'> </div><div class='ctx'> static void snp_set_hsave_pa(void *arg)</div><div class='ctx'> {</div><div class='del'>-	wrmsrl(MSR_VM_HSAVE_PA, 0);</div><div class='add'>+	wrmsrq(MSR_VM_HSAVE_PA, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int snp_filter_reserved_mem_regions(struct resource *rs, void *arg)</div><div class='hunk'>@@ -1112,7 +1122,7 @@ static int __sev_snp_init_locked(int *error)</div><div class='ctx'> 	if (!sev_version_greater_or_equal(SNP_MIN_API_MAJOR, SNP_MIN_API_MINOR)) {</div><div class='ctx'> 		dev_dbg(sev-&gt;dev, "SEV-SNP support requires firmware version &gt;= %d:%d\n",</div><div class='ctx'> 			SNP_MIN_API_MAJOR, SNP_MIN_API_MINOR);</div><div class='del'>-		return 0;</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* SNP_INIT requires MSR_VM_HSAVE_PA to be cleared on all CPUs. */</div><div class='hunk'>@@ -1176,21 +1186,34 @@ static int __sev_snp_init_locked(int *error)</div><div class='ctx'> 	wbinvd_on_all_cpus();</div><div class='ctx'> </div><div class='ctx'> 	rc = __sev_do_cmd_locked(cmd, arg, error);</div><div class='del'>-	if (rc)</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(sev-&gt;dev, "SEV-SNP: %s failed rc %d, error %#x\n",</div><div class='add'>+			cmd == SEV_CMD_SNP_INIT_EX ? "SNP_INIT_EX" : "SNP_INIT",</div><div class='add'>+			rc, *error);</div><div class='ctx'> 		return rc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Prepare for first SNP guest launch after INIT. */</div><div class='ctx'> 	wbinvd_on_all_cpus();</div><div class='ctx'> 	rc = __sev_do_cmd_locked(SEV_CMD_SNP_DF_FLUSH, NULL, error);</div><div class='del'>-	if (rc)</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(sev-&gt;dev, "SEV-SNP: SNP_DF_FLUSH failed rc %d, error %#x\n",</div><div class='add'>+			rc, *error);</div><div class='ctx'> 		return rc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	sev-&gt;snp_initialized = true;</div><div class='ctx'> 	dev_dbg(sev-&gt;dev, "SEV-SNP firmware initialized\n");</div><div class='ctx'> </div><div class='add'>+	dev_info(sev-&gt;dev, "SEV-SNP API:%d.%d build:%d\n", sev-&gt;api_major,</div><div class='add'>+		 sev-&gt;api_minor, sev-&gt;build);</div><div class='add'>+</div><div class='add'>+	atomic_notifier_chain_register(&amp;panic_notifier_list,</div><div class='add'>+				       &amp;snp_panic_notifier);</div><div class='add'>+</div><div class='ctx'> 	sev_es_tmr_size = SNP_TMR_SIZE;</div><div class='ctx'> </div><div class='del'>-	return rc;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __sev_platform_init_handle_tmr(struct sev_device *sev)</div><div class='hunk'>@@ -1287,16 +1310,22 @@ static int __sev_platform_init_locked(int *error)</div><div class='ctx'> 	if (error)</div><div class='ctx'> 		*error = psp_ret;</div><div class='ctx'> </div><div class='del'>-	if (rc)</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(sev-&gt;dev, "SEV: %s failed %#x, rc %d\n",</div><div class='add'>+			sev_init_ex_buffer ? "INIT_EX" : "INIT", psp_ret, rc);</div><div class='ctx'> 		return rc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	sev-&gt;state = SEV_STATE_INIT;</div><div class='ctx'> </div><div class='ctx'> 	/* Prepare for first SEV guest launch after INIT */</div><div class='ctx'> 	wbinvd_on_all_cpus();</div><div class='ctx'> 	rc = __sev_do_cmd_locked(SEV_CMD_DF_FLUSH, NULL, error);</div><div class='del'>-	if (rc)</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(sev-&gt;dev, "SEV: DF_FLUSH failed %#x, rc %d\n",</div><div class='add'>+			*error, rc);</div><div class='ctx'> 		return rc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(sev-&gt;dev, "SEV firmware initialized\n");</div><div class='ctx'> </div><div class='hunk'>@@ -1319,19 +1348,9 @@ static int _sev_platform_init_locked(struct sev_platform_init_args *args)</div><div class='ctx'> 	if (sev-&gt;state == SEV_STATE_INIT)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Legacy guests cannot be running while SNP_INIT(_EX) is executing,</div><div class='del'>-	 * so perform SEV-SNP initialization at probe time.</div><div class='del'>-	 */</div><div class='ctx'> 	rc = __sev_snp_init_locked(&amp;args-&gt;error);</div><div class='del'>-	if (rc &amp;&amp; rc != -ENODEV) {</div><div class='del'>-		/*</div><div class='del'>-		 * Don't abort the probe if SNP INIT failed,</div><div class='del'>-		 * continue to initialize the legacy SEV firmware.</div><div class='del'>-		 */</div><div class='del'>-		dev_err(sev-&gt;dev, "SEV-SNP: failed to INIT rc %d, error %#x\n",</div><div class='del'>-			rc, args-&gt;error);</div><div class='del'>-	}</div><div class='add'>+	if (rc &amp;&amp; rc != -ENODEV)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='ctx'> 	/* Defer legacy SEV/SEV-ES support if allowed by caller/module. */</div><div class='ctx'> 	if (args-&gt;probe &amp;&amp; !psp_init_on_probe)</div><div class='hunk'>@@ -1367,8 +1386,11 @@ static int __sev_platform_shutdown_locked(int *error)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = __sev_do_cmd_locked(SEV_CMD_SHUTDOWN, NULL, error);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(sev-&gt;dev, "SEV: failed to SHUTDOWN error %#x, rc %d\n",</div><div class='add'>+			*error, ret);</div><div class='ctx'> 		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	sev-&gt;state = SEV_STATE_UNINIT;</div><div class='ctx'> 	dev_dbg(sev-&gt;dev, "SEV firmware shutdown\n");</div><div class='hunk'>@@ -1389,6 +1411,37 @@ static int sev_get_platform_state(int *state, int *error)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sev_move_to_init_state(struct sev_issue_cmd *argp, bool *shutdown_required)</div><div class='add'>+{</div><div class='add'>+	struct sev_platform_init_args init_args = {0};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = _sev_platform_init_locked(&amp;init_args);</div><div class='add'>+	if (rc) {</div><div class='add'>+		argp-&gt;error = SEV_RET_INVALID_PLATFORM_STATE;</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*shutdown_required = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int snp_move_to_init_state(struct sev_issue_cmd *argp, bool *shutdown_required)</div><div class='add'>+{</div><div class='add'>+	int error, rc;</div><div class='add'>+</div><div class='add'>+	rc = __sev_snp_init_locked(&amp;error);</div><div class='add'>+	if (rc) {</div><div class='add'>+		argp-&gt;error = SEV_RET_INVALID_PLATFORM_STATE;</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*shutdown_required = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int sev_ioctl_do_reset(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> {</div><div class='ctx'> 	int state, rc;</div><div class='hunk'>@@ -1441,24 +1494,31 @@ static int sev_ioctl_do_platform_status(struct sev_issue_cmd *argp)</div><div class='ctx'> static int sev_ioctl_do_pek_pdh_gen(int cmd, struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='add'>+	bool shutdown_required = false;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if (!writable)</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	if (sev-&gt;state == SEV_STATE_UNINIT) {</div><div class='del'>-		rc = __sev_platform_init_locked(&amp;argp-&gt;error);</div><div class='add'>+		rc = sev_move_to_init_state(argp, &amp;shutdown_required);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return __sev_do_cmd_locked(cmd, NULL, &amp;argp-&gt;error);</div><div class='add'>+	rc = __sev_do_cmd_locked(cmd, NULL, &amp;argp-&gt;error);</div><div class='add'>+</div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_firmware_shutdown(sev, false);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sev_ioctl_do_pek_csr(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='ctx'> 	struct sev_user_data_pek_csr input;</div><div class='add'>+	bool shutdown_required = false;</div><div class='ctx'> 	struct sev_data_pek_csr data;</div><div class='ctx'> 	void __user *input_address;</div><div class='ctx'> 	void *blob = NULL;</div><div class='hunk'>@@ -1490,7 +1550,7 @@ static int sev_ioctl_do_pek_csr(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> </div><div class='ctx'> cmd:</div><div class='ctx'> 	if (sev-&gt;state == SEV_STATE_UNINIT) {</div><div class='del'>-		ret = __sev_platform_init_locked(&amp;argp-&gt;error);</div><div class='add'>+		ret = sev_move_to_init_state(argp, &amp;shutdown_required);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto e_free_blob;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1511,6 +1571,9 @@ cmd:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> e_free_blob:</div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_firmware_shutdown(sev, false);</div><div class='add'>+</div><div class='ctx'> 	kfree(blob);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1682,9 +1745,12 @@ static int __sev_snp_shutdown_locked(int *error, bool panic)</div><div class='ctx'> 	ret = __sev_do_cmd_locked(SEV_CMD_SNP_SHUTDOWN_EX, &amp;data, error);</div><div class='ctx'> 	/* SHUTDOWN may require DF_FLUSH */</div><div class='ctx'> 	if (*error == SEV_RET_DFFLUSH_REQUIRED) {</div><div class='del'>-		ret = __sev_do_cmd_locked(SEV_CMD_SNP_DF_FLUSH, NULL, NULL);</div><div class='add'>+		int dfflush_error = SEV_RET_NO_FW_CALL;</div><div class='add'>+</div><div class='add'>+		ret = __sev_do_cmd_locked(SEV_CMD_SNP_DF_FLUSH, NULL, &amp;dfflush_error);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			dev_err(sev-&gt;dev, "SEV-SNP DF_FLUSH failed\n");</div><div class='add'>+			dev_err(sev-&gt;dev, "SEV-SNP DF_FLUSH failed, ret = %d, error = %#x\n",</div><div class='add'>+				ret, dfflush_error);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* reissue the shutdown command */</div><div class='hunk'>@@ -1692,7 +1758,8 @@ static int __sev_snp_shutdown_locked(int *error, bool panic)</div><div class='ctx'> 					  error);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(sev-&gt;dev, "SEV-SNP firmware shutdown failed\n");</div><div class='add'>+		dev_err(sev-&gt;dev, "SEV-SNP firmware shutdown failed, rc %d, error %#x\n",</div><div class='add'>+			ret, *error);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1718,6 +1785,12 @@ static int __sev_snp_shutdown_locked(int *error, bool panic)</div><div class='ctx'> 	sev-&gt;snp_initialized = false;</div><div class='ctx'> 	dev_dbg(sev-&gt;dev, "SEV-SNP firmware shutdown\n");</div><div class='ctx'> </div><div class='add'>+	atomic_notifier_chain_unregister(&amp;panic_notifier_list,</div><div class='add'>+					 &amp;snp_panic_notifier);</div><div class='add'>+</div><div class='add'>+	/* Reset TMR size back to default */</div><div class='add'>+	sev_es_tmr_size = SEV_TMR_SIZE;</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1726,6 +1799,7 @@ static int sev_ioctl_do_pek_import(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='ctx'> 	struct sev_user_data_pek_cert_import input;</div><div class='ctx'> 	struct sev_data_pek_cert_import data;</div><div class='add'>+	bool shutdown_required = false;</div><div class='ctx'> 	void *pek_blob, *oca_blob;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1756,7 +1830,7 @@ static int sev_ioctl_do_pek_import(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> </div><div class='ctx'> 	/* If platform is not in INIT state then transition it to INIT */</div><div class='ctx'> 	if (sev-&gt;state != SEV_STATE_INIT) {</div><div class='del'>-		ret = __sev_platform_init_locked(&amp;argp-&gt;error);</div><div class='add'>+		ret = sev_move_to_init_state(argp, &amp;shutdown_required);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto e_free_oca;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1764,6 +1838,9 @@ static int sev_ioctl_do_pek_import(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> 	ret = __sev_do_cmd_locked(SEV_CMD_PEK_CERT_IMPORT, &amp;data, &amp;argp-&gt;error);</div><div class='ctx'> </div><div class='ctx'> e_free_oca:</div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_firmware_shutdown(sev, false);</div><div class='add'>+</div><div class='ctx'> 	kfree(oca_blob);</div><div class='ctx'> e_free_pek:</div><div class='ctx'> 	kfree(pek_blob);</div><div class='hunk'>@@ -1880,32 +1957,23 @@ static int sev_ioctl_do_pdh_export(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> 	struct sev_data_pdh_cert_export data;</div><div class='ctx'> 	void __user *input_cert_chain_address;</div><div class='ctx'> 	void __user *input_pdh_cert_address;</div><div class='add'>+	bool shutdown_required = false;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* If platform is not in INIT state then transition it to INIT. */</div><div class='del'>-	if (sev-&gt;state != SEV_STATE_INIT) {</div><div class='del'>-		if (!writable)</div><div class='del'>-			return -EPERM;</div><div class='del'>-</div><div class='del'>-		ret = __sev_platform_init_locked(&amp;argp-&gt;error);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (copy_from_user(&amp;input, (void __user *)argp-&gt;data, sizeof(input)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;data, 0, sizeof(data));</div><div class='ctx'> </div><div class='add'>+	input_pdh_cert_address = (void __user *)input.pdh_cert_address;</div><div class='add'>+	input_cert_chain_address = (void __user *)input.cert_chain_address;</div><div class='add'>+</div><div class='ctx'> 	/* Userspace wants to query the certificate length. */</div><div class='ctx'> 	if (!input.pdh_cert_address ||</div><div class='ctx'> 	    !input.pdh_cert_len ||</div><div class='ctx'> 	    !input.cert_chain_address)</div><div class='ctx'> 		goto cmd;</div><div class='ctx'> </div><div class='del'>-	input_pdh_cert_address = (void __user *)input.pdh_cert_address;</div><div class='del'>-	input_cert_chain_address = (void __user *)input.cert_chain_address;</div><div class='del'>-</div><div class='ctx'> 	/* Allocate a physically contiguous buffer to store the PDH blob. */</div><div class='ctx'> 	if (input.pdh_cert_len &gt; SEV_FW_BLOB_MAX_SIZE)</div><div class='ctx'> 		return -EFAULT;</div><div class='hunk'>@@ -1931,6 +1999,17 @@ static int sev_ioctl_do_pdh_export(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> 	data.cert_chain_len = input.cert_chain_len;</div><div class='ctx'> </div><div class='ctx'> cmd:</div><div class='add'>+	/* If platform is not in INIT state then transition it to INIT. */</div><div class='add'>+	if (sev-&gt;state != SEV_STATE_INIT) {</div><div class='add'>+		if (!writable) {</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+			goto e_free_cert;</div><div class='add'>+		}</div><div class='add'>+		ret = sev_move_to_init_state(argp, &amp;shutdown_required);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto e_free_cert;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = __sev_do_cmd_locked(SEV_CMD_PDH_CERT_EXPORT, &amp;data, &amp;argp-&gt;error);</div><div class='ctx'> </div><div class='ctx'> 	/* If we query the length, FW responded with expected data. */</div><div class='hunk'>@@ -1957,6 +2036,9 @@ cmd:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> e_free_cert:</div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_firmware_shutdown(sev, false);</div><div class='add'>+</div><div class='ctx'> 	kfree(cert_blob);</div><div class='ctx'> e_free_pdh:</div><div class='ctx'> 	kfree(pdh_blob);</div><div class='hunk'>@@ -1966,12 +2048,13 @@ e_free_pdh:</div><div class='ctx'> static int sev_ioctl_do_snp_platform_status(struct sev_issue_cmd *argp)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='add'>+	bool shutdown_required = false;</div><div class='ctx'> 	struct sev_data_snp_addr buf;</div><div class='ctx'> 	struct page *status_page;</div><div class='add'>+	int ret, error;</div><div class='ctx'> 	void *data;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!sev-&gt;snp_initialized || !argp-&gt;data)</div><div class='add'>+	if (!argp-&gt;data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	status_page = alloc_page(GFP_KERNEL_ACCOUNT);</div><div class='hunk'>@@ -1980,6 +2063,12 @@ static int sev_ioctl_do_snp_platform_status(struct sev_issue_cmd *argp)</div><div class='ctx'> </div><div class='ctx'> 	data = page_address(status_page);</div><div class='ctx'> </div><div class='add'>+	if (!sev-&gt;snp_initialized) {</div><div class='add'>+		ret = snp_move_to_init_state(argp, &amp;shutdown_required);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Firmware expects status page to be in firmware-owned state, otherwise</div><div class='ctx'> 	 * it will report firmware error code INVALID_PAGE_STATE (0x1A).</div><div class='hunk'>@@ -2008,6 +2097,9 @@ static int sev_ioctl_do_snp_platform_status(struct sev_issue_cmd *argp)</div><div class='ctx'> 		ret = -EFAULT;</div><div class='ctx'> </div><div class='ctx'> cleanup:</div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_snp_shutdown_locked(&amp;error, false);</div><div class='add'>+</div><div class='ctx'> 	__free_pages(status_page, 0);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2016,21 +2108,33 @@ static int sev_ioctl_do_snp_commit(struct sev_issue_cmd *argp)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='ctx'> 	struct sev_data_snp_commit buf;</div><div class='add'>+	bool shutdown_required = false;</div><div class='add'>+	int ret, error;</div><div class='ctx'> </div><div class='del'>-	if (!sev-&gt;snp_initialized)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!sev-&gt;snp_initialized) {</div><div class='add'>+		ret = snp_move_to_init_state(argp, &amp;shutdown_required);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	buf.len = sizeof(buf);</div><div class='ctx'> </div><div class='del'>-	return __sev_do_cmd_locked(SEV_CMD_SNP_COMMIT, &amp;buf, &amp;argp-&gt;error);</div><div class='add'>+	ret = __sev_do_cmd_locked(SEV_CMD_SNP_COMMIT, &amp;buf, &amp;argp-&gt;error);</div><div class='add'>+</div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_snp_shutdown_locked(&amp;error, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sev_ioctl_do_snp_set_config(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='ctx'> 	struct sev_user_data_snp_config config;</div><div class='add'>+	bool shutdown_required = false;</div><div class='add'>+	int ret, error;</div><div class='ctx'> </div><div class='del'>-	if (!sev-&gt;snp_initialized || !argp-&gt;data)</div><div class='add'>+	if (!argp-&gt;data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!writable)</div><div class='hunk'>@@ -2039,17 +2143,29 @@ static int sev_ioctl_do_snp_set_config(struct sev_issue_cmd *argp, bool writable</div><div class='ctx'> 	if (copy_from_user(&amp;config, (void __user *)argp-&gt;data, sizeof(config)))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	return __sev_do_cmd_locked(SEV_CMD_SNP_CONFIG, &amp;config, &amp;argp-&gt;error);</div><div class='add'>+	if (!sev-&gt;snp_initialized) {</div><div class='add'>+		ret = snp_move_to_init_state(argp, &amp;shutdown_required);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = __sev_do_cmd_locked(SEV_CMD_SNP_CONFIG, &amp;config, &amp;argp-&gt;error);</div><div class='add'>+</div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_snp_shutdown_locked(&amp;error, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sev_ioctl_do_snp_vlek_load(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='ctx'> 	struct sev_user_data_snp_vlek_load input;</div><div class='add'>+	bool shutdown_required = false;</div><div class='add'>+	int ret, error;</div><div class='ctx'> 	void *blob;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!sev-&gt;snp_initialized || !argp-&gt;data)</div><div class='add'>+	if (!argp-&gt;data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!writable)</div><div class='hunk'>@@ -2068,8 +2184,18 @@ static int sev_ioctl_do_snp_vlek_load(struct sev_issue_cmd *argp, bool writable)</div><div class='ctx'> </div><div class='ctx'> 	input.vlek_wrapped_address = __psp_pa(blob);</div><div class='ctx'> </div><div class='add'>+	if (!sev-&gt;snp_initialized) {</div><div class='add'>+		ret = snp_move_to_init_state(argp, &amp;shutdown_required);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = __sev_do_cmd_locked(SEV_CMD_SNP_VLEK_LOAD, &amp;input, &amp;argp-&gt;error);</div><div class='ctx'> </div><div class='add'>+	if (shutdown_required)</div><div class='add'>+		__sev_snp_shutdown_locked(&amp;error, false);</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='ctx'> 	kfree(blob);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2339,6 +2465,15 @@ static void sev_firmware_shutdown(struct sev_device *sev)</div><div class='ctx'> 	mutex_unlock(&amp;sev_cmd_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void sev_platform_shutdown(void)</div><div class='add'>+{</div><div class='add'>+	if (!psp_master || !psp_master-&gt;sev_data)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sev_firmware_shutdown(psp_master-&gt;sev_data);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sev_platform_shutdown);</div><div class='add'>+</div><div class='ctx'> void sev_dev_destroy(struct psp_device *psp)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp-&gt;sev_data;</div><div class='hunk'>@@ -2373,10 +2508,6 @@ static int snp_shutdown_on_panic(struct notifier_block *nb,</div><div class='ctx'> 	return NOTIFY_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct notifier_block snp_panic_notifier = {</div><div class='del'>-	.notifier_call = snp_shutdown_on_panic,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int sev_issue_cmd_external_user(struct file *filep, unsigned int cmd,</div><div class='ctx'> 				void *data, int *error)</div><div class='ctx'> {</div><div class='hunk'>@@ -2390,9 +2521,7 @@ EXPORT_SYMBOL_GPL(sev_issue_cmd_external_user);</div><div class='ctx'> void sev_pci_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct sev_device *sev = psp_master-&gt;sev_data;</div><div class='del'>-	struct sev_platform_init_args args = {0};</div><div class='ctx'> 	u8 api_major, api_minor, build;</div><div class='del'>-	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if (!sev)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2415,18 +2544,6 @@ void sev_pci_init(void)</div><div class='ctx'> 			 api_major, api_minor, build,</div><div class='ctx'> 			 sev-&gt;api_major, sev-&gt;api_minor, sev-&gt;build);</div><div class='ctx'> </div><div class='del'>-	/* Initialize the platform */</div><div class='del'>-	args.probe = true;</div><div class='del'>-	rc = sev_platform_init(&amp;args);</div><div class='del'>-	if (rc)</div><div class='del'>-		dev_err(sev-&gt;dev, "SEV: failed to INIT error %#x, rc %d\n",</div><div class='del'>-			args.error, rc);</div><div class='del'>-</div><div class='del'>-	dev_info(sev-&gt;dev, "SEV%s API:%d.%d build:%d\n", sev-&gt;snp_initialized ?</div><div class='del'>-		"-SNP" : "", sev-&gt;api_major, sev-&gt;api_minor, sev-&gt;build);</div><div class='del'>-</div><div class='del'>-	atomic_notifier_chain_register(&amp;panic_notifier_list,</div><div class='del'>-				       &amp;snp_panic_notifier);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -2443,7 +2560,4 @@ void sev_pci_exit(void)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	sev_firmware_shutdown(sev);</div><div class='del'>-</div><div class='del'>-	atomic_notifier_chain_unregister(&amp;panic_notifier_list,</div><div class='del'>-					 &amp;snp_panic_notifier);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c<br/>index 2ebc878da160..e1be2072d680 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/sp-pci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/ccp/sp-pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/ccp/sp-pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/ccp/sp-pci.c</a></div><div class='hunk'>@@ -375,6 +375,7 @@ static const struct tee_vdata teev1 = {</div><div class='ctx'> static const struct tee_vdata teev2 = {</div><div class='ctx'> 	.ring_wptr_reg		= 0x10950,	/* C2PMSG_20 */</div><div class='ctx'> 	.ring_rptr_reg		= 0x10954,	/* C2PMSG_21 */</div><div class='add'>+	.info_reg		= 0x109e8,	/* C2PMSG_58 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct platform_access_vdata pa_v1 = {</div><div class='hunk'>@@ -440,6 +441,7 @@ static const struct psp_vdata pspv5 = {</div><div class='ctx'> 	.cmdresp_reg		= 0x10944,	/* C2PMSG_17 */</div><div class='ctx'> 	.cmdbuff_addr_lo_reg	= 0x10948,	/* C2PMSG_18 */</div><div class='ctx'> 	.cmdbuff_addr_hi_reg	= 0x1094c,	/* C2PMSG_19 */</div><div class='add'>+	.bootloader_info_reg	= 0x109ec,	/* C2PMSG_59 */</div><div class='ctx'> 	.feature_reg		= 0x109fc,	/* C2PMSG_63 */</div><div class='ctx'> 	.inten_reg		= 0x10510,	/* P2CMSG_INTEN */</div><div class='ctx'> 	.intsts_reg		= 0x10514,	/* P2CMSG_INTSTS */</div><div class='hunk'>@@ -535,6 +537,7 @@ static const struct pci_device_id sp_pci_table[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(AMD, 0x1134), (kernel_ulong_t)&amp;dev_vdata[7] },</div><div class='ctx'> 	{ PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&amp;dev_vdata[7] },</div><div class='ctx'> 	{ PCI_VDEVICE(AMD, 0x156E), (kernel_ulong_t)&amp;dev_vdata[8] },</div><div class='add'>+	{ PCI_VDEVICE(AMD, 0x17D8), (kernel_ulong_t)&amp;dev_vdata[8] },</div><div class='ctx'> 	/* Last entry must be zero */</div><div class='ctx'> 	{ 0, }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c<br/>index d3f5d108b898..7c41f9593d03 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/qm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/hisilicon/qm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/hisilicon/qm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/hisilicon/qm.c</a></div><div class='hunk'>@@ -862,7 +862,7 @@ int hisi_qm_set_algs(struct hisi_qm *qm, u64 alg_msk, const struct qm_dev_alg *d</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	algs = devm_kzalloc(dev, QM_DEV_ALG_MAX_LEN * sizeof(char), GFP_KERNEL);</div><div class='add'>+	algs = devm_kzalloc(dev, QM_DEV_ALG_MAX_LEN, GFP_KERNEL);</div><div class='ctx'> 	if (!algs)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -5224,7 +5224,7 @@ static int qm_pre_store_caps(struct hisi_qm *qm)</div><div class='ctx'> 	size_t i, size;</div><div class='ctx'> </div><div class='ctx'> 	size = ARRAY_SIZE(qm_cap_query_info);</div><div class='del'>-	qm_cap = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*qm_cap) * size, GFP_KERNEL);</div><div class='add'>+	qm_cap = devm_kcalloc(&amp;pdev-&gt;dev, sizeof(*qm_cap), size, GFP_KERNEL);</div><div class='ctx'> 	if (!qm_cap)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/img-hash.c b/drivers/crypto/img-hash.c<br/>index 1dc2378aa88b..e050f5ff5efb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/img-hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/img-hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/img-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/img-hash.c</a></div><div class='hunk'>@@ -491,8 +491,9 @@ static int img_hash_init(struct ahash_request *req)</div><div class='ctx'> 	struct img_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags =	req-&gt;base.flags</div><div class='del'>-		&amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_init(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -555,10 +556,10 @@ static int img_hash_update(struct ahash_request *req)</div><div class='ctx'> 	struct img_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags</div><div class='del'>-		&amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, NULL, req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_update(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -570,9 +571,10 @@ static int img_hash_final(struct ahash_request *req)</div><div class='ctx'> 	struct img_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags</div><div class='del'>-		&amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, NULL, req-&gt;result, 0);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_final(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -584,11 +586,12 @@ static int img_hash_finup(struct ahash_request *req)</div><div class='ctx'> 	struct img_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags</div><div class='del'>-		&amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, req-&gt;result,</div><div class='add'>+				req-&gt;nbytes);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_finup(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -600,8 +603,9 @@ static int img_hash_import(struct ahash_request *req, const void *in)</div><div class='ctx'> 	struct img_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags</div><div class='del'>-		&amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_import(&amp;rctx-&gt;fallback_req, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -613,8 +617,9 @@ static int img_hash_export(struct ahash_request *req, void *out)</div><div class='ctx'> 	struct img_hash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags</div><div class='del'>-		&amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_export(&amp;rctx-&gt;fallback_req, out);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/crypto/inside-secure/eip93/eip93-hash.c b/drivers/crypto/inside-secure/eip93/eip93-hash.c<br/>index df1b05ac5a57..ac13d90a2b7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/inside-secure/eip93/eip93-hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/inside-secure/eip93/eip93-hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/inside-secure/eip93/eip93-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/inside-secure/eip93/eip93-hash.c</a></div><div class='hunk'>@@ -97,12 +97,20 @@ void eip93_hash_handle_result(struct crypto_async_request *async, int err)</div><div class='ctx'> </div><div class='ctx'> static void eip93_hash_init_sa_state_digest(u32 hash, u8 *digest)</div><div class='ctx'> {</div><div class='del'>-	u32 sha256_init[] = { SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3,</div><div class='del'>-			      SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7 };</div><div class='del'>-	u32 sha224_init[] = { SHA224_H0, SHA224_H1, SHA224_H2, SHA224_H3,</div><div class='del'>-			      SHA224_H4, SHA224_H5, SHA224_H6, SHA224_H7 };</div><div class='del'>-	u32 sha1_init[] = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 };</div><div class='del'>-	u32 md5_init[] = { MD5_H0, MD5_H1, MD5_H2, MD5_H3 };</div><div class='add'>+	static const u32 sha256_init[] = {</div><div class='add'>+		SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3,</div><div class='add'>+		SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7</div><div class='add'>+	};</div><div class='add'>+	static const u32 sha224_init[] = {</div><div class='add'>+		SHA224_H0, SHA224_H1, SHA224_H2, SHA224_H3,</div><div class='add'>+		SHA224_H4, SHA224_H5, SHA224_H6, SHA224_H7</div><div class='add'>+	};</div><div class='add'>+	static const u32 sha1_init[] = {</div><div class='add'>+		SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4</div><div class='add'>+	};</div><div class='add'>+	static const u32 md5_init[] = {</div><div class='add'>+		MD5_H0, MD5_H1, MD5_H2, MD5_H3</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	/* Init HASH constant */</div><div class='ctx'> 	switch (hash) {</div><div class='head'>diff --git a/drivers/crypto/inside-secure/safexcel_hash.c b/drivers/crypto/inside-secure/safexcel_hash.c<br/>index f44c08f5f5ec..d2b632193beb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/inside-secure/safexcel_hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/inside-secure/safexcel_hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/inside-secure/safexcel_hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/inside-secure/safexcel_hash.c</a></div><div class='hunk'>@@ -2043,7 +2043,7 @@ struct safexcel_alg_template safexcel_alg_cbcmac = {</div><div class='ctx'> 				.cra_flags = CRYPTO_ALG_ASYNC |</div><div class='ctx'> 					     CRYPTO_ALG_ALLOCATES_MEMORY |</div><div class='ctx'> 					     CRYPTO_ALG_KERN_DRIVER_ONLY,</div><div class='del'>-				.cra_blocksize = 1,</div><div class='add'>+				.cra_blocksize = AES_BLOCK_SIZE,</div><div class='ctx'> 				.cra_ctxsize = sizeof(struct safexcel_ahash_ctx),</div><div class='ctx'> 				.cra_init = safexcel_ahash_cra_init,</div><div class='ctx'> 				.cra_exit = safexcel_ahash_cra_exit,</div><div class='head'>diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/intel/iaa/iaa_crypto_main.c<br/>index 09d9589f2d68..23f585219fb4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/iaa/iaa_crypto_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/iaa/iaa_crypto_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/iaa/iaa_crypto_main.c</a></div><div class='hunk'>@@ -725,7 +725,7 @@ static int alloc_wq_table(int max_wqs)</div><div class='ctx'> </div><div class='ctx'> 	for (cpu = 0; cpu &lt; nr_cpus; cpu++) {</div><div class='ctx'> 		entry = per_cpu_ptr(wq_table, cpu);</div><div class='del'>-		entry-&gt;wqs = kcalloc(max_wqs, sizeof(struct wq *), GFP_KERNEL);</div><div class='add'>+		entry-&gt;wqs = kcalloc(max_wqs, sizeof(*entry-&gt;wqs), GFP_KERNEL);</div><div class='ctx'> 		if (!entry-&gt;wqs) {</div><div class='ctx'> 			free_wq_table();</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -894,7 +894,7 @@ out:</div><div class='ctx'> static void rebalance_wq_table(void)</div><div class='ctx'> {</div><div class='ctx'> 	const struct cpumask *node_cpus;</div><div class='del'>-	int node, cpu, iaa = -1;</div><div class='add'>+	int node_cpu, node, cpu, iaa = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (nr_iaa == 0)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -905,36 +905,29 @@ static void rebalance_wq_table(void)</div><div class='ctx'> 	clear_wq_table();</div><div class='ctx'> </div><div class='ctx'> 	if (nr_iaa == 1) {</div><div class='del'>-		for (cpu = 0; cpu &lt; nr_cpus; cpu++) {</div><div class='del'>-			if (WARN_ON(wq_table_add_wqs(0, cpu))) {</div><div class='del'>-				pr_debug("could not add any wqs for iaa 0 to cpu %d!\n", cpu);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='add'>+		for_each_possible_cpu(cpu) {</div><div class='add'>+			if (WARN_ON(wq_table_add_wqs(0, cpu)))</div><div class='add'>+				goto err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_node_with_cpus(node) {</div><div class='add'>+		cpu = 0;</div><div class='ctx'> 		node_cpus = cpumask_of_node(node);</div><div class='ctx'> </div><div class='del'>-		for (cpu = 0; cpu &lt;  cpumask_weight(node_cpus); cpu++) {</div><div class='del'>-			int node_cpu = cpumask_nth(cpu, node_cpus);</div><div class='del'>-</div><div class='del'>-			if (WARN_ON(node_cpu &gt;= nr_cpu_ids)) {</div><div class='del'>-				pr_debug("node_cpu %d doesn't exist!\n", node_cpu);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if ((cpu % cpus_per_iaa) == 0)</div><div class='del'>-				iaa++;</div><div class='del'>-</div><div class='del'>-			if (WARN_ON(wq_table_add_wqs(iaa, node_cpu))) {</div><div class='del'>-				pr_debug("could not add any wqs for iaa %d to cpu %d!\n", iaa, cpu);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='add'>+		for_each_cpu(node_cpu, node_cpus) {</div><div class='add'>+			iaa = cpu / cpus_per_iaa;</div><div class='add'>+			if (WARN_ON(wq_table_add_wqs(iaa, node_cpu)))</div><div class='add'>+				goto err;</div><div class='add'>+			cpu++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	pr_debug("could not add any wqs for iaa %d to cpu %d!\n", iaa, cpu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int check_completion(struct device *dev,</div><div class='hunk'>@@ -999,12 +992,9 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int deflate_generic_decompress(struct acomp_req *req)</div><div class='ctx'> {</div><div class='del'>-	ACOMP_REQUEST_ON_STACK(fbreq, crypto_acomp_reqtfm(req));</div><div class='add'>+	ACOMP_FBREQ_ON_STACK(fbreq, req);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	acomp_request_set_callback(fbreq, 0, NULL, NULL);</div><div class='del'>-	acomp_request_set_params(fbreq, req-&gt;src, req-&gt;dst, req-&gt;slen,</div><div class='del'>-				 req-&gt;dlen);</div><div class='ctx'> 	ret = crypto_acomp_decompress(fbreq);</div><div class='ctx'> 	req-&gt;dlen = fbreq-&gt;dlen;</div><div class='ctx'> </div><div class='hunk'>@@ -1020,8 +1010,7 @@ static int iaa_remap_for_verify(struct device *dev, struct iaa_wq *iaa_wq,</div><div class='ctx'> static int iaa_compress_verify(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> 			       struct idxd_wq *wq,</div><div class='ctx'> 			       dma_addr_t src_addr, unsigned int slen,</div><div class='del'>-			       dma_addr_t dst_addr, unsigned int *dlen,</div><div class='del'>-			       u32 compression_crc);</div><div class='add'>+			       dma_addr_t dst_addr, unsigned int *dlen);</div><div class='ctx'> </div><div class='ctx'> static void iaa_desc_complete(struct idxd_desc *idxd_desc,</div><div class='ctx'> 			      enum idxd_complete_type comp_type,</div><div class='hunk'>@@ -1087,10 +1076,10 @@ static void iaa_desc_complete(struct idxd_desc *idxd_desc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;compress &amp;&amp; compression_ctx-&gt;verify_compress) {</div><div class='add'>+		u32 *compression_crc = acomp_request_ctx(ctx-&gt;req);</div><div class='ctx'> 		dma_addr_t src_addr, dst_addr;</div><div class='del'>-		u32 compression_crc;</div><div class='ctx'> </div><div class='del'>-		compression_crc = idxd_desc-&gt;iax_completion-&gt;crc;</div><div class='add'>+		*compression_crc = idxd_desc-&gt;iax_completion-&gt;crc;</div><div class='ctx'> </div><div class='ctx'> 		ret = iaa_remap_for_verify(dev, iaa_wq, ctx-&gt;req, &amp;src_addr, &amp;dst_addr);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -1100,8 +1089,7 @@ static void iaa_desc_complete(struct idxd_desc *idxd_desc,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ret = iaa_compress_verify(ctx-&gt;tfm, ctx-&gt;req, iaa_wq-&gt;wq, src_addr,</div><div class='del'>-					  ctx-&gt;req-&gt;slen, dst_addr, &amp;ctx-&gt;req-&gt;dlen,</div><div class='del'>-					  compression_crc);</div><div class='add'>+					  ctx-&gt;req-&gt;slen, dst_addr, &amp;ctx-&gt;req-&gt;dlen);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_dbg(dev, "%s: compress verify failed ret=%d\n", __func__, ret);</div><div class='ctx'> 			err = -EIO;</div><div class='hunk'>@@ -1130,11 +1118,11 @@ out:</div><div class='ctx'> static int iaa_compress(struct crypto_tfm *tfm,	struct acomp_req *req,</div><div class='ctx'> 			struct idxd_wq *wq,</div><div class='ctx'> 			dma_addr_t src_addr, unsigned int slen,</div><div class='del'>-			dma_addr_t dst_addr, unsigned int *dlen,</div><div class='del'>-			u32 *compression_crc)</div><div class='add'>+			dma_addr_t dst_addr, unsigned int *dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_device_compression_mode *active_compression_mode;</div><div class='ctx'> 	struct iaa_compression_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	u32 *compression_crc = acomp_request_ctx(req);</div><div class='ctx'> 	struct iaa_device *iaa_device;</div><div class='ctx'> 	struct idxd_desc *idxd_desc;</div><div class='ctx'> 	struct iax_hw_desc *desc;</div><div class='hunk'>@@ -1187,8 +1175,7 @@ static int iaa_compress(struct crypto_tfm *tfm,	struct acomp_req *req,</div><div class='ctx'> 			" src_addr %llx, dst_addr %llx\n", __func__,</div><div class='ctx'> 			active_compression_mode-&gt;name,</div><div class='ctx'> 			src_addr, dst_addr);</div><div class='del'>-	} else if (ctx-&gt;async_mode)</div><div class='del'>-		req-&gt;base.data = idxd_desc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s: compression mode %s,"</div><div class='ctx'> 		" desc-&gt;src1_addr %llx, desc-&gt;src1_size %d,"</div><div class='hunk'>@@ -1282,11 +1269,11 @@ out:</div><div class='ctx'> static int iaa_compress_verify(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> 			       struct idxd_wq *wq,</div><div class='ctx'> 			       dma_addr_t src_addr, unsigned int slen,</div><div class='del'>-			       dma_addr_t dst_addr, unsigned int *dlen,</div><div class='del'>-			       u32 compression_crc)</div><div class='add'>+			       dma_addr_t dst_addr, unsigned int *dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_device_compression_mode *active_compression_mode;</div><div class='ctx'> 	struct iaa_compression_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	u32 *compression_crc = acomp_request_ctx(req);</div><div class='ctx'> 	struct iaa_device *iaa_device;</div><div class='ctx'> 	struct idxd_desc *idxd_desc;</div><div class='ctx'> 	struct iax_hw_desc *desc;</div><div class='hunk'>@@ -1346,10 +1333,10 @@ static int iaa_compress_verify(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (compression_crc != idxd_desc-&gt;iax_completion-&gt;crc) {</div><div class='add'>+	if (*compression_crc != idxd_desc-&gt;iax_completion-&gt;crc) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		dev_dbg(dev, "(verify) iaa comp/decomp crc mismatch:"</div><div class='del'>-			" comp=0x%x, decomp=0x%x\n", compression_crc,</div><div class='add'>+			" comp=0x%x, decomp=0x%x\n", *compression_crc,</div><div class='ctx'> 			idxd_desc-&gt;iax_completion-&gt;crc);</div><div class='ctx'> 		print_hex_dump(KERN_INFO, "cmp-rec: ", DUMP_PREFIX_OFFSET,</div><div class='ctx'> 			       8, 1, idxd_desc-&gt;iax_completion, 64, 0);</div><div class='hunk'>@@ -1369,8 +1356,7 @@ err:</div><div class='ctx'> static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> 			  struct idxd_wq *wq,</div><div class='ctx'> 			  dma_addr_t src_addr, unsigned int slen,</div><div class='del'>-			  dma_addr_t dst_addr, unsigned int *dlen,</div><div class='del'>-			  bool disable_async)</div><div class='add'>+			  dma_addr_t dst_addr, unsigned int *dlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct iaa_device_compression_mode *active_compression_mode;</div><div class='ctx'> 	struct iaa_compression_ctx *ctx = crypto_tfm_ctx(tfm);</div><div class='hunk'>@@ -1412,7 +1398,7 @@ static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> 	desc-&gt;src1_size = slen;</div><div class='ctx'> 	desc-&gt;completion_addr = idxd_desc-&gt;compl_dma;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;use_irq &amp;&amp; !disable_async) {</div><div class='add'>+	if (ctx-&gt;use_irq) {</div><div class='ctx'> 		desc-&gt;flags |= IDXD_OP_FLAG_RCI;</div><div class='ctx'> </div><div class='ctx'> 		idxd_desc-&gt;crypto.req = req;</div><div class='hunk'>@@ -1425,8 +1411,7 @@ static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> 			" src_addr %llx, dst_addr %llx\n", __func__,</div><div class='ctx'> 			active_compression_mode-&gt;name,</div><div class='ctx'> 			src_addr, dst_addr);</div><div class='del'>-	} else if (ctx-&gt;async_mode &amp;&amp; !disable_async)</div><div class='del'>-		req-&gt;base.data = idxd_desc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "%s: decompression mode %s,"</div><div class='ctx'> 		" desc-&gt;src1_addr %llx, desc-&gt;src1_size %d,"</div><div class='hunk'>@@ -1446,7 +1431,7 @@ static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> 	update_total_decomp_calls();</div><div class='ctx'> 	update_wq_decomp_calls(wq);</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;async_mode &amp;&amp; !disable_async) {</div><div class='add'>+	if (ctx-&gt;async_mode) {</div><div class='ctx'> 		ret = -EINPROGRESS;</div><div class='ctx'> 		dev_dbg(dev, "%s: returning -EINPROGRESS\n", __func__);</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -1474,7 +1459,7 @@ static int iaa_decompress(struct crypto_tfm *tfm, struct acomp_req *req,</div><div class='ctx'> </div><div class='ctx'> 	*dlen = req-&gt;dlen;</div><div class='ctx'> </div><div class='del'>-	if (!ctx-&gt;async_mode || disable_async)</div><div class='add'>+	if (!ctx-&gt;async_mode)</div><div class='ctx'> 		idxd_free_desc(wq, idxd_desc);</div><div class='ctx'> </div><div class='ctx'> 	/* Update stats */</div><div class='hunk'>@@ -1496,7 +1481,6 @@ static int iaa_comp_acompress(struct acomp_req *req)</div><div class='ctx'> 	dma_addr_t src_addr, dst_addr;</div><div class='ctx'> 	int nr_sgs, cpu, ret = 0;</div><div class='ctx'> 	struct iaa_wq *iaa_wq;</div><div class='del'>-	u32 compression_crc;</div><div class='ctx'> 	struct idxd_wq *wq;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> </div><div class='hunk'>@@ -1557,7 +1541,7 @@ static int iaa_comp_acompress(struct acomp_req *req)</div><div class='ctx'> 		req-&gt;dst, req-&gt;dlen, sg_dma_len(req-&gt;dst));</div><div class='ctx'> </div><div class='ctx'> 	ret = iaa_compress(tfm, req, wq, src_addr, req-&gt;slen, dst_addr,</div><div class='del'>-			   &amp;req-&gt;dlen, &amp;compression_crc);</div><div class='add'>+			   &amp;req-&gt;dlen);</div><div class='ctx'> 	if (ret == -EINPROGRESS)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1569,7 +1553,7 @@ static int iaa_comp_acompress(struct acomp_req *req)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ret = iaa_compress_verify(tfm, req, wq, src_addr, req-&gt;slen,</div><div class='del'>-					  dst_addr, &amp;req-&gt;dlen, compression_crc);</div><div class='add'>+					  dst_addr, &amp;req-&gt;dlen);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			dev_dbg(dev, "asynchronous compress verification failed ret=%d\n", ret);</div><div class='ctx'> </div><div class='hunk'>@@ -1655,7 +1639,7 @@ static int iaa_comp_adecompress(struct acomp_req *req)</div><div class='ctx'> 		req-&gt;dst, req-&gt;dlen, sg_dma_len(req-&gt;dst));</div><div class='ctx'> </div><div class='ctx'> 	ret = iaa_decompress(tfm, req, wq, src_addr, req-&gt;slen,</div><div class='del'>-			     dst_addr, &amp;req-&gt;dlen, false);</div><div class='add'>+			     dst_addr, &amp;req-&gt;dlen);</div><div class='ctx'> 	if (ret == -EINPROGRESS)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1699,6 +1683,7 @@ static struct acomp_alg iaa_acomp_fixed_deflate = {</div><div class='ctx'> 		.cra_driver_name	= "deflate-iaa",</div><div class='ctx'> 		.cra_flags		= CRYPTO_ALG_ASYNC,</div><div class='ctx'> 		.cra_ctxsize		= sizeof(struct iaa_compression_ctx),</div><div class='add'>+		.cra_reqsize		= sizeof(u32),</div><div class='ctx'> 		.cra_module		= THIS_MODULE,</div><div class='ctx'> 		.cra_priority		= IAA_ALG_PRIORITY,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/crypto/intel/qat/Kconfig b/drivers/crypto/intel/qat/Kconfig<br/>index 02fb8abe4e6e..359c61f0c8a1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/Kconfig</a></div><div class='hunk'>@@ -70,6 +70,18 @@ config CRYPTO_DEV_QAT_420XX</div><div class='ctx'> 	  To compile this as a module, choose M here: the module</div><div class='ctx'> 	  will be called qat_420xx.</div><div class='ctx'> </div><div class='add'>+config CRYPTO_DEV_QAT_6XXX</div><div class='add'>+	tristate "Support for Intel(R) QuickAssist Technology QAT_6XXX"</div><div class='add'>+	depends on (X86 || COMPILE_TEST)</div><div class='add'>+	depends on PCI</div><div class='add'>+	select CRYPTO_DEV_QAT</div><div class='add'>+	help</div><div class='add'>+	  Support for Intel(R) QuickAssist Technology QAT_6xxx</div><div class='add'>+	  for accelerating crypto and compression workloads.</div><div class='add'>+</div><div class='add'>+	  To compile this as a module, choose M here: the module</div><div class='add'>+	  will be called qat_6xxx.</div><div class='add'>+</div><div class='ctx'> config CRYPTO_DEV_QAT_DH895xCCVF</div><div class='ctx'> 	tristate "Support for Intel(R) DH895xCC Virtual Function"</div><div class='ctx'> 	depends on PCI &amp;&amp; (!CPU_BIG_ENDIAN || COMPILE_TEST)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/Makefile b/drivers/crypto/intel/qat/Makefile<br/>index 235b69f4f3f7..abef14207afa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/Makefile</a></div><div class='hunk'>@@ -1,10 +1,12 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='add'>+subdir-ccflags-y := -I$(src)/qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT) += qat_common/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_DH895xCC) += qat_dh895xcc/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C3XXX) += qat_c3xxx/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C62X) += qat_c62x/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_4XXX) += qat_4xxx/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_420XX) += qat_420xx/</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_QAT_6XXX) += qat_6xxx/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_DH895xCCVF) += qat_dh895xccvf/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C3XXXVF) += qat_c3xxxvf/</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C62XVF) += qat_c62xvf/</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_420xx/Makefile b/drivers/crypto/intel/qat/qat_420xx/Makefile<br/>index 72b24b1804cf..f6df54d2993e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_420xx/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_420xx/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_420XX) += qat_420xx.o</div><div class='ctx'> qat_420xx-y := adf_drv.o adf_420xx_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c b/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c<br/>index 4feeef83f7a3..7c3c0f561c95 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c</a></div><div class='hunk'>@@ -9,15 +9,14 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_fw_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_config.h&gt;</div><div class='del'>-#include &lt;adf_gen4_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pfvf.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pm.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_ras.h&gt;</div><div class='del'>-#include &lt;adf_gen4_timer.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_tl.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_vf_mig.h&gt;</div><div class='add'>+#include &lt;adf_timer.h&gt;</div><div class='ctx'> #include "adf_420xx_hw_data.h"</div><div class='ctx'> #include "icp_qat_hw.h"</div><div class='ctx'> </div><div class='hunk'>@@ -93,7 +92,6 @@ static const struct adf_fw_config adf_fw_dcc_config[] = {</div><div class='ctx'> static struct adf_hw_device_class adf_420xx_class = {</div><div class='ctx'> 	.name = ADF_420XX_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_420XX,</div><div class='del'>-	.instances = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_ae_mask(struct adf_hw_device_data *self)</div><div class='hunk'>@@ -469,8 +467,8 @@ void adf_init_hw_data_420xx(struct adf_hw_device_data *hw_data, u32 dev_id)</div><div class='ctx'> 	hw_data-&gt;enable_pm = adf_gen4_enable_pm;</div><div class='ctx'> 	hw_data-&gt;handle_pm_interrupt = adf_gen4_handle_pm_interrupt;</div><div class='ctx'> 	hw_data-&gt;dev_config = adf_gen4_dev_config;</div><div class='del'>-	hw_data-&gt;start_timer = adf_gen4_timer_start;</div><div class='del'>-	hw_data-&gt;stop_timer = adf_gen4_timer_stop;</div><div class='add'>+	hw_data-&gt;start_timer = adf_timer_start;</div><div class='add'>+	hw_data-&gt;stop_timer = adf_timer_stop;</div><div class='ctx'> 	hw_data-&gt;get_hb_clock = adf_gen4_get_heartbeat_clock;</div><div class='ctx'> 	hw_data-&gt;num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE;</div><div class='ctx'> 	hw_data-&gt;clock_frequency = ADF_420XX_AE_FREQ;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_420xx/adf_drv.c b/drivers/crypto/intel/qat/qat_420xx/adf_drv.c<br/>index 8084aa0f7f41..cfa00daeb4fb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/adf_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_420xx/adf_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_420xx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_420xx/adf_drv.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include "adf_420xx_hw_data.h"</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id adf_pci_tbl[] = {</div><div class='del'>-	{ PCI_VDEVICE(INTEL, ADF_420XX_PCI_DEVICE_ID), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_420XX) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='hunk'>@@ -186,11 +186,19 @@ static void adf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	adf_cleanup_accel(accel_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void adf_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);</div><div class='add'>+</div><div class='add'>+	adf_dev_down(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct pci_driver adf_driver = {</div><div class='ctx'> 	.id_table = adf_pci_tbl,</div><div class='ctx'> 	.name = ADF_420XX_DEVICE_NAME,</div><div class='ctx'> 	.probe = adf_probe,</div><div class='ctx'> 	.remove = adf_remove,</div><div class='add'>+	.shutdown = adf_shutdown,</div><div class='ctx'> 	.sriov_configure = adf_sriov_configure,</div><div class='ctx'> 	.err_handler = &amp;adf_err_handler,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_4xxx/Makefile b/drivers/crypto/intel/qat/qat_4xxx/Makefile<br/>index e8480bb80dee..188b611445e6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_4xxx/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_4xxx/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_4XXX) += qat_4xxx.o</div><div class='ctx'> qat_4xxx-y := adf_drv.o adf_4xxx_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c<br/>index 4eb6ef99efdd..bd0b1b1015c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c</a></div><div class='hunk'>@@ -9,15 +9,14 @@</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_fw_config.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_config.h&gt;</div><div class='del'>-#include &lt;adf_gen4_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pfvf.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_pm.h&gt;</div><div class='ctx'> #include "adf_gen4_ras.h"</div><div class='del'>-#include &lt;adf_gen4_timer.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_tl.h&gt;</div><div class='ctx'> #include &lt;adf_gen4_vf_mig.h&gt;</div><div class='add'>+#include &lt;adf_timer.h&gt;</div><div class='ctx'> #include "adf_4xxx_hw_data.h"</div><div class='ctx'> #include "icp_qat_hw.h"</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +95,6 @@ static_assert(ARRAY_SIZE(adf_fw_cy_config) == ARRAY_SIZE(adf_fw_dcc_config));</div><div class='ctx'> static struct adf_hw_device_class adf_4xxx_class = {</div><div class='ctx'> 	.name = ADF_4XXX_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_4XXX,</div><div class='del'>-	.instances = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_ae_mask(struct adf_hw_device_data *self)</div><div class='hunk'>@@ -422,13 +420,13 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id)</div><div class='ctx'> 	hw_data-&gt;admin_ae_mask = ADF_4XXX_ADMIN_AE_MASK;</div><div class='ctx'> 	hw_data-&gt;num_rps = ADF_GEN4_MAX_RPS;</div><div class='ctx'> 	switch (dev_id) {</div><div class='del'>-	case ADF_402XX_PCI_DEVICE_ID:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_402XX:</div><div class='ctx'> 		hw_data-&gt;fw_name = ADF_402XX_FW;</div><div class='ctx'> 		hw_data-&gt;fw_mmp_name = ADF_402XX_MMP;</div><div class='ctx'> 		hw_data-&gt;uof_get_name = uof_get_name_402xx;</div><div class='ctx'> 		hw_data-&gt;get_ena_thd_mask = get_ena_thd_mask;</div><div class='ctx'> 		break;</div><div class='del'>-	case ADF_401XX_PCI_DEVICE_ID:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_401XX:</div><div class='ctx'> 		hw_data-&gt;fw_name = ADF_4XXX_FW;</div><div class='ctx'> 		hw_data-&gt;fw_mmp_name = ADF_4XXX_MMP;</div><div class='ctx'> 		hw_data-&gt;uof_get_name = uof_get_name_4xxx;</div><div class='hunk'>@@ -455,8 +453,8 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id)</div><div class='ctx'> 	hw_data-&gt;enable_pm = adf_gen4_enable_pm;</div><div class='ctx'> 	hw_data-&gt;handle_pm_interrupt = adf_gen4_handle_pm_interrupt;</div><div class='ctx'> 	hw_data-&gt;dev_config = adf_gen4_dev_config;</div><div class='del'>-	hw_data-&gt;start_timer = adf_gen4_timer_start;</div><div class='del'>-	hw_data-&gt;stop_timer = adf_gen4_timer_stop;</div><div class='add'>+	hw_data-&gt;start_timer = adf_timer_start;</div><div class='add'>+	hw_data-&gt;stop_timer = adf_timer_stop;</div><div class='ctx'> 	hw_data-&gt;get_hb_clock = adf_gen4_get_heartbeat_clock;</div><div class='ctx'> 	hw_data-&gt;num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE;</div><div class='ctx'> 	hw_data-&gt;clock_frequency = ADF_4XXX_AE_FREQ;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c b/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c<br/>index 5537a9991e4e..c9be5dcddb27 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_4xxx/adf_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_4xxx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_4xxx/adf_drv.c</a></div><div class='hunk'>@@ -14,9 +14,9 @@</div><div class='ctx'> #include "adf_4xxx_hw_data.h"</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id adf_pci_tbl[] = {</div><div class='del'>-	{ PCI_VDEVICE(INTEL, ADF_4XXX_PCI_DEVICE_ID), },</div><div class='del'>-	{ PCI_VDEVICE(INTEL, ADF_401XX_PCI_DEVICE_ID), },</div><div class='del'>-	{ PCI_VDEVICE(INTEL, ADF_402XX_PCI_DEVICE_ID), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_4XXX) },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_401XX) },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_402XX) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='hunk'>@@ -188,11 +188,19 @@ static void adf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	adf_cleanup_accel(accel_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void adf_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);</div><div class='add'>+</div><div class='add'>+	adf_dev_down(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct pci_driver adf_driver = {</div><div class='ctx'> 	.id_table = adf_pci_tbl,</div><div class='ctx'> 	.name = ADF_4XXX_DEVICE_NAME,</div><div class='ctx'> 	.probe = adf_probe,</div><div class='ctx'> 	.remove = adf_remove,</div><div class='add'>+	.shutdown = adf_shutdown,</div><div class='ctx'> 	.sriov_configure = adf_sriov_configure,</div><div class='ctx'> 	.err_handler = &amp;adf_err_handler,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_6xxx/Makefile b/drivers/crypto/intel/qat/qat_6xxx/Makefile<br/>new file mode 100644<br/>index 000000000000..4b4de67cb0c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_6xxx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_6xxx/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-$(CONFIG_CRYPTO_DEV_QAT_6XXX) += qat_6xxx.o</div><div class='add'>+qat_6xxx-y := adf_drv.o adf_6xxx_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c b/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c<br/>new file mode 100644<br/>index 000000000000..359a6447ccb8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c</a></div><div class='hunk'>@@ -0,0 +1,845 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;adf_accel_devices.h&gt;</div><div class='add'>+#include &lt;adf_admin.h&gt;</div><div class='add'>+#include &lt;adf_cfg.h&gt;</div><div class='add'>+#include &lt;adf_cfg_services.h&gt;</div><div class='add'>+#include &lt;adf_clock.h&gt;</div><div class='add'>+#include &lt;adf_common_drv.h&gt;</div><div class='add'>+#include &lt;adf_fw_config.h&gt;</div><div class='add'>+#include &lt;adf_gen6_pm.h&gt;</div><div class='add'>+#include &lt;adf_gen6_ras.h&gt;</div><div class='add'>+#include &lt;adf_gen6_shared.h&gt;</div><div class='add'>+#include &lt;adf_timer.h&gt;</div><div class='add'>+#include "adf_6xxx_hw_data.h"</div><div class='add'>+#include "icp_qat_fw_comp.h"</div><div class='add'>+#include "icp_qat_hw_51_comp.h"</div><div class='add'>+</div><div class='add'>+#define RP_GROUP_0_MASK		(BIT(0) | BIT(2))</div><div class='add'>+#define RP_GROUP_1_MASK		(BIT(1) | BIT(3))</div><div class='add'>+#define RP_GROUP_ALL_MASK	(RP_GROUP_0_MASK | RP_GROUP_1_MASK)</div><div class='add'>+</div><div class='add'>+#define ADF_AE_GROUP_0		GENMASK(3, 0)</div><div class='add'>+#define ADF_AE_GROUP_1		GENMASK(7, 4)</div><div class='add'>+#define ADF_AE_GROUP_2		BIT(8)</div><div class='add'>+</div><div class='add'>+struct adf_ring_config {</div><div class='add'>+	u32 ring_mask;</div><div class='add'>+	enum adf_cfg_service_type ring_type;</div><div class='add'>+	const unsigned long *thrd_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 rmask_two_services[] = {</div><div class='add'>+	RP_GROUP_0_MASK,</div><div class='add'>+	RP_GROUP_1_MASK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum adf_gen6_rps {</div><div class='add'>+	RP0 = 0,</div><div class='add'>+	RP1 = 1,</div><div class='add'>+	RP2 = 2,</div><div class='add'>+	RP3 = 3,</div><div class='add'>+	RP_MAX = RP3</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * thrd_mask_[sym|asym|cpr|dcc]: these static arrays define the thread</div><div class='add'>+ * configuration for handling requests of specific services across the</div><div class='add'>+ * accelerator engines. Each element in an array corresponds to an</div><div class='add'>+ * accelerator engine, with the value being a bitmask that specifies which</div><div class='add'>+ * threads within that engine are capable of processing the particular service.</div><div class='add'>+ *</div><div class='add'>+ * For example, a value of 0x0C means that threads 2 and 3 are enabled for the</div><div class='add'>+ * service in the respective accelerator engine.</div><div class='add'>+ */</div><div class='add'>+static const unsigned long thrd_mask_sym[ADF_6XXX_MAX_ACCELENGINES] = {</div><div class='add'>+	0x0C, 0x0C, 0x0C, 0x0C, 0x1C, 0x1C, 0x1C, 0x1C, 0x00</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned long thrd_mask_asym[ADF_6XXX_MAX_ACCELENGINES] = {</div><div class='add'>+	0x70, 0x70, 0x70, 0x70, 0x60, 0x60, 0x60, 0x60, 0x00</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned long thrd_mask_cpr[ADF_6XXX_MAX_ACCELENGINES] = {</div><div class='add'>+	0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const unsigned long thrd_mask_dcc[ADF_6XXX_MAX_ACCELENGINES] = {</div><div class='add'>+	0x00, 0x00, 0x00, 0x00, 0x07, 0x07, 0x03, 0x03, 0x00</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const adf_6xxx_fw_objs[] = {</div><div class='add'>+	[ADF_FW_CY_OBJ] = ADF_6XXX_CY_OBJ,</div><div class='add'>+	[ADF_FW_DC_OBJ] = ADF_6XXX_DC_OBJ,</div><div class='add'>+	[ADF_FW_ADMIN_OBJ] = ADF_6XXX_ADMIN_OBJ,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct adf_fw_config adf_default_fw_config[] = {</div><div class='add'>+	{ ADF_AE_GROUP_1, ADF_FW_DC_OBJ },</div><div class='add'>+	{ ADF_AE_GROUP_0, ADF_FW_CY_OBJ },</div><div class='add'>+	{ ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct adf_hw_device_class adf_6xxx_class = {</div><div class='add'>+	.name = ADF_6XXX_DEVICE_NAME,</div><div class='add'>+	.type = DEV_6XXX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool services_supported(unsigned long mask)</div><div class='add'>+{</div><div class='add'>+	int num_svc;</div><div class='add'>+</div><div class='add'>+	if (mask &gt;= BIT(SVC_BASE_COUNT))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	num_svc = hweight_long(mask);</div><div class='add'>+	switch (num_svc) {</div><div class='add'>+	case ADF_ONE_SERVICE:</div><div class='add'>+		return true;</div><div class='add'>+	case ADF_TWO_SERVICES:</div><div class='add'>+	case ADF_THREE_SERVICES:</div><div class='add'>+		return !test_bit(SVC_DCC, &amp;mask);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_service(unsigned long *mask)</div><div class='add'>+{</div><div class='add'>+	if (test_and_clear_bit(SVC_ASYM, mask))</div><div class='add'>+		return SVC_ASYM;</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(SVC_SYM, mask))</div><div class='add'>+		return SVC_SYM;</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(SVC_DC, mask))</div><div class='add'>+		return SVC_DC;</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(SVC_DCC, mask))</div><div class='add'>+		return SVC_DCC;</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum adf_cfg_service_type get_ring_type(enum adf_services service)</div><div class='add'>+{</div><div class='add'>+	switch (service) {</div><div class='add'>+	case SVC_SYM:</div><div class='add'>+		return SYM;</div><div class='add'>+	case SVC_ASYM:</div><div class='add'>+		return ASYM;</div><div class='add'>+	case SVC_DC:</div><div class='add'>+	case SVC_DCC:</div><div class='add'>+		return COMP;</div><div class='add'>+	default:</div><div class='add'>+		return UNUSED;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const unsigned long *get_thrd_mask(enum adf_services service)</div><div class='add'>+{</div><div class='add'>+	switch (service) {</div><div class='add'>+	case SVC_SYM:</div><div class='add'>+		return thrd_mask_sym;</div><div class='add'>+	case SVC_ASYM:</div><div class='add'>+		return thrd_mask_asym;</div><div class='add'>+	case SVC_DC:</div><div class='add'>+		return thrd_mask_cpr;</div><div class='add'>+	case SVC_DCC:</div><div class='add'>+		return thrd_mask_dcc;</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_rp_config(struct adf_accel_dev *accel_dev, struct adf_ring_config *rp_config,</div><div class='add'>+			 unsigned int *num_services)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, nservices;</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	int ret, service;</div><div class='add'>+</div><div class='add'>+	ret = adf_get_service_mask(accel_dev, &amp;mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	nservices = hweight_long(mask);</div><div class='add'>+	if (nservices &gt; MAX_NUM_CONCURR_SVC)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nservices; i++) {</div><div class='add'>+		service = get_service(&amp;mask);</div><div class='add'>+		if (service &lt; 0)</div><div class='add'>+			return service;</div><div class='add'>+</div><div class='add'>+		rp_config[i].ring_type = get_ring_type(service);</div><div class='add'>+		rp_config[i].thrd_mask = get_thrd_mask(service);</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If there is only one service enabled, use all ring pairs for</div><div class='add'>+		 * that service.</div><div class='add'>+		 * If there are two services enabled, use ring pairs 0 and 2 for</div><div class='add'>+		 * one service and ring pairs 1 and 3 for the other service.</div><div class='add'>+		 */</div><div class='add'>+		switch (nservices) {</div><div class='add'>+		case ADF_ONE_SERVICE:</div><div class='add'>+			rp_config[i].ring_mask = RP_GROUP_ALL_MASK;</div><div class='add'>+			break;</div><div class='add'>+		case ADF_TWO_SERVICES:</div><div class='add'>+			rp_config[i].ring_mask = rmask_two_services[i];</div><div class='add'>+			break;</div><div class='add'>+		case ADF_THREE_SERVICES:</div><div class='add'>+			rp_config[i].ring_mask = BIT(i);</div><div class='add'>+</div><div class='add'>+			/* If ASYM is enabled, use additional ring pair */</div><div class='add'>+			if (service == SVC_ASYM)</div><div class='add'>+				rp_config[i].ring_mask |= BIT(RP3);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*num_services = nservices;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 adf_gen6_get_arb_mask(struct adf_accel_dev *accel_dev, unsigned int ae)</div><div class='add'>+{</div><div class='add'>+	struct adf_ring_config rp_config[MAX_NUM_CONCURR_SVC];</div><div class='add'>+	unsigned int num_services, i, thrd;</div><div class='add'>+	u32 ring_mask, thd2arb_mask = 0;</div><div class='add'>+	const unsigned long *p_mask;</div><div class='add'>+</div><div class='add'>+	if (get_rp_config(accel_dev, rp_config, &amp;num_services))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The thd2arb_mask maps ring pairs to threads within an accelerator engine.</div><div class='add'>+	 * It ensures that jobs submitted to ring pairs are scheduled on threads capable</div><div class='add'>+	 * of handling the specified service type.</div><div class='add'>+	 *</div><div class='add'>+	 * Each group of 4 bits in the mask corresponds to a thread, with each bit</div><div class='add'>+	 * indicating whether a job from a ring pair can be scheduled on that thread.</div><div class='add'>+	 * The use of 4 bits is due to the organization of ring pairs into groups of</div><div class='add'>+	 * four, where each group shares the same configuration.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; num_services; i++) {</div><div class='add'>+		p_mask = &amp;rp_config[i].thrd_mask[ae];</div><div class='add'>+		ring_mask = rp_config[i].ring_mask;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(thrd, p_mask, ADF_NUM_THREADS_PER_AE)</div><div class='add'>+			thd2arb_mask |= ring_mask &lt;&lt; (thrd * 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return thd2arb_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 get_ring_to_svc_map(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	enum adf_cfg_service_type rps[ADF_GEN6_NUM_BANKS_PER_VF] = { };</div><div class='add'>+	struct adf_ring_config rp_config[MAX_NUM_CONCURR_SVC];</div><div class='add'>+	unsigned int num_services, rp_num, i;</div><div class='add'>+	unsigned long cfg_mask;</div><div class='add'>+	u16 ring_to_svc_map;</div><div class='add'>+</div><div class='add'>+	if (get_rp_config(accel_dev, rp_config, &amp;num_services))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Loop through the configured services and populate the `rps` array that</div><div class='add'>+	 * contains what service that particular ring pair can handle (i.e. symmetric</div><div class='add'>+	 * crypto, asymmetric crypto, data compression or compression chaining).</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; num_services; i++) {</div><div class='add'>+		cfg_mask = rp_config[i].ring_mask;</div><div class='add'>+		for_each_set_bit(rp_num, &amp;cfg_mask, ADF_GEN6_NUM_BANKS_PER_VF)</div><div class='add'>+			rps[rp_num] = rp_config[i].ring_type;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The ring_mask is structured into segments of 3 bits, with each</div><div class='add'>+	 * segment representing the service configuration for a specific ring pair.</div><div class='add'>+	 * Since ring pairs are organized into groups of 4, the ring_mask contains 4</div><div class='add'>+	 * such 3-bit segments, each corresponding to one ring pair.</div><div class='add'>+	 *</div><div class='add'>+	 * The device has 64 ring pairs, which are organized in groups of 4, namely</div><div class='add'>+	 * 16 groups. Each group has the same configuration, represented here by</div><div class='add'>+	 * `ring_to_svc_map`.</div><div class='add'>+	 */</div><div class='add'>+	ring_to_svc_map = rps[RP0] &lt;&lt; ADF_CFG_SERV_RING_PAIR_0_SHIFT |</div><div class='add'>+			  rps[RP1] &lt;&lt; ADF_CFG_SERV_RING_PAIR_1_SHIFT |</div><div class='add'>+			  rps[RP2] &lt;&lt; ADF_CFG_SERV_RING_PAIR_2_SHIFT |</div><div class='add'>+			  rps[RP3] &lt;&lt; ADF_CFG_SERV_RING_PAIR_3_SHIFT;</div><div class='add'>+</div><div class='add'>+	return ring_to_svc_map;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_accel_mask(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return ADF_GEN6_ACCELERATORS_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_num_accels(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return ADF_GEN6_MAX_ACCELERATORS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_num_aes(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return self ? hweight32(self-&gt;ae_mask) : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_misc_bar_id(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return ADF_GEN6_PMISC_BAR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_etr_bar_id(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return ADF_GEN6_ETR_BAR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_sram_bar_id(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return ADF_GEN6_SRAM_BAR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dev_sku_info get_sku(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return DEV_SKU_1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_arb_info(struct arb_info *arb_info)</div><div class='add'>+{</div><div class='add'>+	arb_info-&gt;arb_cfg = ADF_GEN6_ARB_CONFIG;</div><div class='add'>+	arb_info-&gt;arb_offset = ADF_GEN6_ARB_OFFSET;</div><div class='add'>+	arb_info-&gt;wt2sam_offset = ADF_GEN6_ARB_WRK_2_SER_MAP_OFFSET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_admin_info(struct admin_info *admin_csrs_info)</div><div class='add'>+{</div><div class='add'>+	admin_csrs_info-&gt;mailbox_offset = ADF_GEN6_MAILBOX_BASE_OFFSET;</div><div class='add'>+	admin_csrs_info-&gt;admin_msg_ur = ADF_GEN6_ADMINMSGUR_OFFSET;</div><div class='add'>+	admin_csrs_info-&gt;admin_msg_lr = ADF_GEN6_ADMINMSGLR_OFFSET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_heartbeat_clock(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	return ADF_GEN6_COUNTER_FREQ;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_error_correction(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *csr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Enable all error notification bits in errsou3 except VFLR</div><div class='add'>+	 * notification on host.</div><div class='add'>+	 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK3, ADF_GEN6_VFLNOTIFY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_ints(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+</div><div class='add'>+	/* Enable bundle interrupts */</div><div class='add'>+	ADF_CSR_WR(addr, ADF_GEN6_SMIAPF_RP_X0_MASK_OFFSET, 0);</div><div class='add'>+	ADF_CSR_WR(addr, ADF_GEN6_SMIAPF_RP_X1_MASK_OFFSET, 0);</div><div class='add'>+</div><div class='add'>+	/* Enable misc interrupts */</div><div class='add'>+	ADF_CSR_WR(addr, ADF_GEN6_SMIAPF_MASK_OFFSET, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_ssm_wdtimer(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+	u64 val_pke = ADF_SSM_WDT_PKE_DEFAULT_VALUE;</div><div class='add'>+	u64 val = ADF_SSM_WDT_DEFAULT_VALUE;</div><div class='add'>+</div><div class='add'>+	/* Enable watchdog timer for sym and dc */</div><div class='add'>+	ADF_CSR_WR64_LO_HI(addr, ADF_SSMWDTATHL_OFFSET, ADF_SSMWDTATHH_OFFSET, val);</div><div class='add'>+	ADF_CSR_WR64_LO_HI(addr, ADF_SSMWDTCNVL_OFFSET, ADF_SSMWDTCNVH_OFFSET, val);</div><div class='add'>+	ADF_CSR_WR64_LO_HI(addr, ADF_SSMWDTUCSL_OFFSET, ADF_SSMWDTUCSH_OFFSET, val);</div><div class='add'>+	ADF_CSR_WR64_LO_HI(addr, ADF_SSMWDTDCPRL_OFFSET, ADF_SSMWDTDCPRH_OFFSET, val);</div><div class='add'>+</div><div class='add'>+	/* Enable watchdog timer for pke */</div><div class='add'>+	ADF_CSR_WR64_LO_HI(addr, ADF_SSMWDTPKEL_OFFSET, ADF_SSMWDTPKEH_OFFSET, val_pke);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The vector routing table is used to select the MSI-X entry to use for each</div><div class='add'>+ * interrupt source.</div><div class='add'>+ * The first ADF_GEN6_ETR_MAX_BANKS entries correspond to ring interrupts.</div><div class='add'>+ * The final entry corresponds to VF2PF or error interrupts.</div><div class='add'>+ * This vector table could be used to configure one MSI-X entry to be shared</div><div class='add'>+ * between multiple interrupt sources.</div><div class='add'>+ *</div><div class='add'>+ * The default routing is set to have a one to one correspondence between the</div><div class='add'>+ * interrupt source and the MSI-X entry used.</div><div class='add'>+ */</div><div class='add'>+static void set_msix_default_rttable(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *csr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= ADF_GEN6_ETR_MAX_BANKS; i++)</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_MSIX_RTTABLE_OFFSET(i), i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int reset_ring_pair(void __iomem *csr, u32 bank_number)</div><div class='add'>+{</div><div class='add'>+	u32 status;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Write rpresetctl register BIT(0) as 1.</div><div class='add'>+	 * Since rpresetctl registers have no RW fields, no need to preserve</div><div class='add'>+	 * values for other bits. Just write directly.</div><div class='add'>+	 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_WQM_CSR_RPRESETCTL(bank_number),</div><div class='add'>+		   ADF_WQM_CSR_RPRESETCTL_RESET);</div><div class='add'>+</div><div class='add'>+	/* Read rpresetsts register and wait for rp reset to complete */</div><div class='add'>+	ret = read_poll_timeout(ADF_CSR_RD, status,</div><div class='add'>+				status &amp; ADF_WQM_CSR_RPRESETSTS_STATUS,</div><div class='add'>+				ADF_RPRESET_POLL_DELAY_US,</div><div class='add'>+				ADF_RPRESET_POLL_TIMEOUT_US, true,</div><div class='add'>+				csr, ADF_WQM_CSR_RPRESETSTS(bank_number));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* When ring pair reset is done, clear rpresetsts */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_WQM_CSR_RPRESETSTS(bank_number), ADF_WQM_CSR_RPRESETSTS_STATUS);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = accel_dev-&gt;hw_device;</div><div class='add'>+	void __iomem *csr = adf_get_etr_base(accel_dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (bank_number &gt;= hw_data-&gt;num_banks)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;GET_DEV(accel_dev), "ring pair reset for bank:%d\n", bank_number);</div><div class='add'>+</div><div class='add'>+	ret = reset_ring_pair(csr, bank_number);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "ring pair reset failed (timeout)\n");</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(&amp;GET_DEV(accel_dev), "ring pair reset successful\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int build_comp_block(void *ctx, enum adf_dc_algo algo)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_fw_comp_req *req_tmpl = ctx;</div><div class='add'>+	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='add'>+	struct icp_qat_hw_comp_51_config_csr_lower hw_comp_lower_csr = { };</div><div class='add'>+	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='add'>+	u32 lower_val;</div><div class='add'>+</div><div class='add'>+	switch (algo) {</div><div class='add'>+	case QAT_DEFLATE:</div><div class='add'>+		header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_DYNAMIC;</div><div class='add'>+	break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_comp_lower_csr.lllbd = ICP_QAT_HW_COMP_51_LLLBD_CTRL_LLLBD_DISABLED;</div><div class='add'>+	hw_comp_lower_csr.sd = ICP_QAT_HW_COMP_51_SEARCH_DEPTH_LEVEL_1;</div><div class='add'>+	lower_val = ICP_QAT_FW_COMP_51_BUILD_CONFIG_LOWER(hw_comp_lower_csr);</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] = lower_val;</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[1] = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int build_decomp_block(void *ctx, enum adf_dc_algo algo)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_fw_comp_req *req_tmpl = ctx;</div><div class='add'>+	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='add'>+	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='add'>+</div><div class='add'>+	switch (algo) {</div><div class='add'>+	case QAT_DEFLATE:</div><div class='add'>+		header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_DECOMPRESS;</div><div class='add'>+	break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] = 0;</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[1] = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_init_dc_ops(struct adf_dc_ops *dc_ops)</div><div class='add'>+{</div><div class='add'>+	dc_ops-&gt;build_comp_block = build_comp_block;</div><div class='add'>+	dc_ops-&gt;build_decomp_block = build_decomp_block;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen6_init_thd2arb_map(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);</div><div class='add'>+	u32 *thd2arb_map = hw_data-&gt;thd_to_arb_map;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; hw_data-&gt;num_engines; i++) {</div><div class='add'>+		thd2arb_map[i] = adf_gen6_get_arb_mask(accel_dev, i);</div><div class='add'>+		dev_dbg(&amp;GET_DEV(accel_dev), "ME:%d arb_mask:%#x\n", i, thd2arb_map[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_vc_csr_for_bank(void __iomem *csr, u32 bank_number)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * After each PF FLR, for each of the 64 ring pairs in the PF, the</div><div class='add'>+	 * driver must program the ringmodectl CSRs.</div><div class='add'>+	 */</div><div class='add'>+	value = ADF_CSR_RD(csr, ADF_GEN6_CSR_RINGMODECTL(bank_number));</div><div class='add'>+	value |= FIELD_PREP(ADF_GEN6_RINGMODECTL_TC_MASK, ADF_GEN6_RINGMODECTL_TC_DEFAULT);</div><div class='add'>+	value |= FIELD_PREP(ADF_GEN6_RINGMODECTL_TC_EN_MASK, ADF_GEN6_RINGMODECTL_TC_EN_OP1);</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_CSR_RINGMODECTL(bank_number), value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_vc_config(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = accel_to_pci_dev(accel_dev);</div><div class='add'>+	u32 value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * After each PF FLR, the driver must program the Port Virtual Channel (VC)</div><div class='add'>+	 * Control Registers.</div><div class='add'>+	 * Read PVC0CTL then write the masked values.</div><div class='add'>+	 */</div><div class='add'>+	pci_read_config_dword(pdev, ADF_GEN6_PVC0CTL_OFFSET, &amp;value);</div><div class='add'>+	value |= FIELD_PREP(ADF_GEN6_PVC0CTL_TCVCMAP_MASK, ADF_GEN6_PVC0CTL_TCVCMAP_DEFAULT);</div><div class='add'>+	err = pci_write_config_dword(pdev, ADF_GEN6_PVC0CTL_OFFSET, value);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "pci write to PVC0CTL failed\n");</div><div class='add'>+		return pcibios_err_to_errno(err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read PVC1CTL then write masked values */</div><div class='add'>+	pci_read_config_dword(pdev, ADF_GEN6_PVC1CTL_OFFSET, &amp;value);</div><div class='add'>+	value |= FIELD_PREP(ADF_GEN6_PVC1CTL_TCVCMAP_MASK, ADF_GEN6_PVC1CTL_TCVCMAP_DEFAULT);</div><div class='add'>+	value |= FIELD_PREP(ADF_GEN6_PVC1CTL_VCEN_MASK, ADF_GEN6_PVC1CTL_VCEN_ON);</div><div class='add'>+	err = pci_write_config_dword(pdev, ADF_GEN6_PVC1CTL_OFFSET, value);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "pci write to PVC1CTL failed\n");</div><div class='add'>+</div><div class='add'>+	return pcibios_err_to_errno(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen6_set_vc(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);</div><div class='add'>+	void __iomem *csr = adf_get_etr_base(accel_dev);</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; hw_data-&gt;num_banks; i++) {</div><div class='add'>+		dev_dbg(&amp;GET_DEV(accel_dev), "set virtual channels for bank:%d\n", i);</div><div class='add'>+		set_vc_csr_for_bank(csr, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return set_vc_config(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_ae_mask(struct adf_hw_device_data *self)</div><div class='add'>+{</div><div class='add'>+	unsigned long fuses = self-&gt;fuses[ADF_FUSECTL4];</div><div class='add'>+	u32 mask = ADF_6XXX_ACCELENGINES_MASK;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If bit 0 is set in the fuses, the first 4 engines are disabled.</div><div class='add'>+	 * If bit 4 is set, the second group of 4 engines are disabled.</div><div class='add'>+	 * If bit 8 is set, the admin engine (bit 8) is disabled.</div><div class='add'>+	 */</div><div class='add'>+	if (test_bit(0, &amp;fuses))</div><div class='add'>+		mask &amp;= ~ADF_AE_GROUP_0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(4, &amp;fuses))</div><div class='add'>+		mask &amp;= ~ADF_AE_GROUP_1;</div><div class='add'>+</div><div class='add'>+	if (test_bit(8, &amp;fuses))</div><div class='add'>+		mask &amp;= ~ADF_AE_GROUP_2;</div><div class='add'>+</div><div class='add'>+	return mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_accel_cap(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	u32 capabilities_sym, capabilities_asym;</div><div class='add'>+	u32 capabilities_dc;</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	u32 caps = 0;</div><div class='add'>+	u32 fusectl1;</div><div class='add'>+</div><div class='add'>+	fusectl1 = GET_HW_DATA(accel_dev)-&gt;fuses[ADF_FUSECTL1];</div><div class='add'>+</div><div class='add'>+	/* Read accelerator capabilities mask */</div><div class='add'>+	capabilities_sym = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_CIPHER |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_AUTHENTICATION |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_SHA3 |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_SHA3_EXT |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_CHACHA_POLY |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_AESGCM_SPC |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_AES_V2;</div><div class='add'>+</div><div class='add'>+	/* A set bit in fusectl1 means the corresponding feature is OFF in this SKU */</div><div class='add'>+	if (fusectl1 &amp; ICP_ACCEL_GEN6_MASK_UCS_SLICE) {</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_CIPHER;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_CHACHA_POLY;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_AESGCM_SPC;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_AES_V2;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_CIPHER;</div><div class='add'>+	}</div><div class='add'>+	if (fusectl1 &amp; ICP_ACCEL_GEN6_MASK_AUTH_SLICE) {</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_SHA3;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_SHA3_EXT;</div><div class='add'>+		capabilities_sym &amp;= ~ICP_ACCEL_CAPABILITIES_CIPHER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	capabilities_asym = 0;</div><div class='add'>+</div><div class='add'>+	capabilities_dc = ICP_ACCEL_CAPABILITIES_COMPRESSION |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION |</div><div class='add'>+			  ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64;</div><div class='add'>+</div><div class='add'>+	if (fusectl1 &amp; ICP_ACCEL_GEN6_MASK_CPR_SLICE) {</div><div class='add'>+		capabilities_dc &amp;= ~ICP_ACCEL_CAPABILITIES_COMPRESSION;</div><div class='add'>+		capabilities_dc &amp;= ~ICP_ACCEL_CAPABILITIES_LZ4_COMPRESSION;</div><div class='add'>+		capabilities_dc &amp;= ~ICP_ACCEL_CAPABILITIES_LZ4S_COMPRESSION;</div><div class='add'>+		capabilities_dc &amp;= ~ICP_ACCEL_CAPABILITIES_CNV_INTEGRITY64;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adf_get_service_mask(accel_dev, &amp;mask))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(SVC_ASYM, &amp;mask))</div><div class='add'>+		caps |= capabilities_asym;</div><div class='add'>+	if (test_bit(SVC_SYM, &amp;mask))</div><div class='add'>+		caps |= capabilities_sym;</div><div class='add'>+	if (test_bit(SVC_DC, &amp;mask))</div><div class='add'>+		caps |= capabilities_dc;</div><div class='add'>+	if (test_bit(SVC_DCC, &amp;mask)) {</div><div class='add'>+		/*</div><div class='add'>+		 * Sym capabilities are available for chaining operations,</div><div class='add'>+		 * but sym crypto instances cannot be supported</div><div class='add'>+		 */</div><div class='add'>+		caps = capabilities_dc | capabilities_sym;</div><div class='add'>+		caps &amp;= ~ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return caps;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 uof_get_num_objs(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	return ARRAY_SIZE(adf_default_fw_config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *uof_get_name(struct adf_accel_dev *accel_dev, u32 obj_num)</div><div class='add'>+{</div><div class='add'>+	int num_fw_objs = ARRAY_SIZE(adf_6xxx_fw_objs);</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	id = adf_default_fw_config[obj_num].obj;</div><div class='add'>+	if (id &gt;= num_fw_objs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return adf_6xxx_fw_objs[id];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *uof_get_name_6xxx(struct adf_accel_dev *accel_dev, u32 obj_num)</div><div class='add'>+{</div><div class='add'>+	return uof_get_name(accel_dev, obj_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int uof_get_obj_type(struct adf_accel_dev *accel_dev, u32 obj_num)</div><div class='add'>+{</div><div class='add'>+	if (obj_num &gt;= uof_get_num_objs(accel_dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return adf_default_fw_config[obj_num].obj;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 uof_get_ae_mask(struct adf_accel_dev *accel_dev, u32 obj_num)</div><div class='add'>+{</div><div class='add'>+	return adf_default_fw_config[obj_num].ae_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	if (adf_gen6_init_thd2arb_map(accel_dev))</div><div class='add'>+		dev_warn(&amp;GET_DEV(accel_dev),</div><div class='add'>+			 "Failed to generate thread to arbiter mapping");</div><div class='add'>+</div><div class='add'>+	return GET_HW_DATA(accel_dev)-&gt;thd_to_arb_map;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_init_device(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 csr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Temporarily mask PM interrupt */</div><div class='add'>+	csr = ADF_CSR_RD(addr, ADF_GEN6_ERRMSK2);</div><div class='add'>+	csr |= ADF_GEN6_PM_SOU;</div><div class='add'>+	ADF_CSR_WR(addr, ADF_GEN6_ERRMSK2, csr);</div><div class='add'>+</div><div class='add'>+	/* Set DRV_ACTIVE bit to power up the device */</div><div class='add'>+	ADF_CSR_WR(addr, ADF_GEN6_PM_INTERRUPT, ADF_GEN6_PM_DRV_ACTIVE);</div><div class='add'>+</div><div class='add'>+	/* Poll status register to make sure the device is powered up */</div><div class='add'>+	ret = read_poll_timeout(ADF_CSR_RD, status,</div><div class='add'>+				status &amp; ADF_GEN6_PM_INIT_STATE,</div><div class='add'>+				ADF_GEN6_PM_POLL_DELAY_US,</div><div class='add'>+				ADF_GEN6_PM_POLL_TIMEOUT_US, true, addr,</div><div class='add'>+				ADF_GEN6_PM_STATUS);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to power up the device\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;GET_DEV(accel_dev), "Setting virtual channels for device qat_dev%d\n",</div><div class='add'>+		accel_dev-&gt;accel_id);</div><div class='add'>+</div><div class='add'>+	ret = adf_gen6_set_vc(accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to set virtual channels\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enable_pm(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	return adf_init_admin_pm(accel_dev, ADF_GEN6_PM_DEFAULT_IDLE_FILTER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dev_config(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = adf_cfg_section_add(accel_dev, "Accelerator0");</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (adf_get_service_enabled(accel_dev)) {</div><div class='add'>+	case SVC_DC:</div><div class='add'>+	case SVC_DCC:</div><div class='add'>+		ret = adf_gen6_comp_dev_config(accel_dev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = adf_gen6_no_dev_config(accel_dev);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	__set_bit(ADF_STATUS_CONFIGURED, &amp;accel_dev-&gt;status);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_init_hw_data_6xxx(struct adf_hw_device_data *hw_data)</div><div class='add'>+{</div><div class='add'>+	hw_data-&gt;dev_class = &amp;adf_6xxx_class;</div><div class='add'>+	hw_data-&gt;instance_id = adf_6xxx_class.instances++;</div><div class='add'>+	hw_data-&gt;num_banks = ADF_GEN6_ETR_MAX_BANKS;</div><div class='add'>+	hw_data-&gt;num_banks_per_vf = ADF_GEN6_NUM_BANKS_PER_VF;</div><div class='add'>+	hw_data-&gt;num_rings_per_bank = ADF_GEN6_NUM_RINGS_PER_BANK;</div><div class='add'>+	hw_data-&gt;num_accel = ADF_GEN6_MAX_ACCELERATORS;</div><div class='add'>+	hw_data-&gt;num_engines = ADF_6XXX_MAX_ACCELENGINES;</div><div class='add'>+	hw_data-&gt;num_logical_accel = 1;</div><div class='add'>+	hw_data-&gt;tx_rx_gap = ADF_GEN6_RX_RINGS_OFFSET;</div><div class='add'>+	hw_data-&gt;tx_rings_mask = ADF_GEN6_TX_RINGS_MASK;</div><div class='add'>+	hw_data-&gt;ring_to_svc_map = 0;</div><div class='add'>+	hw_data-&gt;alloc_irq = adf_isr_resource_alloc;</div><div class='add'>+	hw_data-&gt;free_irq = adf_isr_resource_free;</div><div class='add'>+	hw_data-&gt;enable_error_correction = enable_error_correction;</div><div class='add'>+	hw_data-&gt;get_accel_mask = get_accel_mask;</div><div class='add'>+	hw_data-&gt;get_ae_mask = get_ae_mask;</div><div class='add'>+	hw_data-&gt;get_num_accels = get_num_accels;</div><div class='add'>+	hw_data-&gt;get_num_aes = get_num_aes;</div><div class='add'>+	hw_data-&gt;get_sram_bar_id = get_sram_bar_id;</div><div class='add'>+	hw_data-&gt;get_etr_bar_id = get_etr_bar_id;</div><div class='add'>+	hw_data-&gt;get_misc_bar_id = get_misc_bar_id;</div><div class='add'>+	hw_data-&gt;get_arb_info = get_arb_info;</div><div class='add'>+	hw_data-&gt;get_admin_info = get_admin_info;</div><div class='add'>+	hw_data-&gt;get_accel_cap = get_accel_cap;</div><div class='add'>+	hw_data-&gt;get_sku = get_sku;</div><div class='add'>+	hw_data-&gt;init_admin_comms = adf_init_admin_comms;</div><div class='add'>+	hw_data-&gt;exit_admin_comms = adf_exit_admin_comms;</div><div class='add'>+	hw_data-&gt;send_admin_init = adf_send_admin_init;</div><div class='add'>+	hw_data-&gt;init_arb = adf_init_arb;</div><div class='add'>+	hw_data-&gt;exit_arb = adf_exit_arb;</div><div class='add'>+	hw_data-&gt;get_arb_mapping = adf_get_arbiter_mapping;</div><div class='add'>+	hw_data-&gt;enable_ints = enable_ints;</div><div class='add'>+	hw_data-&gt;reset_device = adf_reset_flr;</div><div class='add'>+	hw_data-&gt;admin_ae_mask = ADF_6XXX_ADMIN_AE_MASK;</div><div class='add'>+	hw_data-&gt;fw_name = ADF_6XXX_FW;</div><div class='add'>+	hw_data-&gt;fw_mmp_name = ADF_6XXX_MMP;</div><div class='add'>+	hw_data-&gt;uof_get_name = uof_get_name_6xxx;</div><div class='add'>+	hw_data-&gt;uof_get_num_objs = uof_get_num_objs;</div><div class='add'>+	hw_data-&gt;uof_get_obj_type = uof_get_obj_type;</div><div class='add'>+	hw_data-&gt;uof_get_ae_mask = uof_get_ae_mask;</div><div class='add'>+	hw_data-&gt;set_msix_rttable = set_msix_default_rttable;</div><div class='add'>+	hw_data-&gt;set_ssm_wdtimer = set_ssm_wdtimer;</div><div class='add'>+	hw_data-&gt;get_ring_to_svc_map = get_ring_to_svc_map;</div><div class='add'>+	hw_data-&gt;disable_iov = adf_disable_sriov;</div><div class='add'>+	hw_data-&gt;ring_pair_reset = ring_pair_reset;</div><div class='add'>+	hw_data-&gt;dev_config = dev_config;</div><div class='add'>+	hw_data-&gt;get_hb_clock = get_heartbeat_clock;</div><div class='add'>+	hw_data-&gt;num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE;</div><div class='add'>+	hw_data-&gt;start_timer = adf_timer_start;</div><div class='add'>+	hw_data-&gt;stop_timer = adf_timer_stop;</div><div class='add'>+	hw_data-&gt;init_device = adf_init_device;</div><div class='add'>+	hw_data-&gt;enable_pm = enable_pm;</div><div class='add'>+	hw_data-&gt;services_supported = services_supported;</div><div class='add'>+</div><div class='add'>+	adf_gen6_init_hw_csr_ops(&amp;hw_data-&gt;csr_ops);</div><div class='add'>+	adf_gen6_init_pf_pfvf_ops(&amp;hw_data-&gt;pfvf_ops);</div><div class='add'>+	adf_gen6_init_dc_ops(&amp;hw_data-&gt;dc_ops);</div><div class='add'>+	adf_gen6_init_ras_ops(&amp;hw_data-&gt;ras_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_clean_hw_data_6xxx(struct adf_hw_device_data *hw_data)</div><div class='add'>+{</div><div class='add'>+	if (hw_data-&gt;dev_class-&gt;instances)</div><div class='add'>+		hw_data-&gt;dev_class-&gt;instances--;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.h b/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.h<br/>new file mode 100644<br/>index 000000000000..78e2e2c5816e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.h</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef ADF_6XXX_HW_DATA_H_</div><div class='add'>+#define ADF_6XXX_HW_DATA_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='add'>+#include "adf_accel_devices.h"</div><div class='add'>+#include "adf_cfg_common.h"</div><div class='add'>+#include "adf_dc.h"</div><div class='add'>+</div><div class='add'>+/* PCIe configuration space */</div><div class='add'>+#define ADF_GEN6_BAR_MASK		(BIT(0) | BIT(2) | BIT(4))</div><div class='add'>+#define ADF_GEN6_SRAM_BAR		0</div><div class='add'>+#define ADF_GEN6_PMISC_BAR		1</div><div class='add'>+#define ADF_GEN6_ETR_BAR		2</div><div class='add'>+#define ADF_6XXX_MAX_ACCELENGINES	9</div><div class='add'>+</div><div class='add'>+/* Clocks frequency */</div><div class='add'>+#define ADF_GEN6_COUNTER_FREQ		(100 * HZ_PER_MHZ)</div><div class='add'>+</div><div class='add'>+/* Physical function fuses */</div><div class='add'>+#define ADF_GEN6_FUSECTL0_OFFSET	0x2C8</div><div class='add'>+#define ADF_GEN6_FUSECTL1_OFFSET	0x2CC</div><div class='add'>+#define ADF_GEN6_FUSECTL4_OFFSET	0x2D8</div><div class='add'>+</div><div class='add'>+/* Accelerators */</div><div class='add'>+#define ADF_GEN6_ACCELERATORS_MASK	0x1</div><div class='add'>+#define ADF_GEN6_MAX_ACCELERATORS	1</div><div class='add'>+</div><div class='add'>+/* MSI-X interrupt */</div><div class='add'>+#define ADF_GEN6_SMIAPF_RP_X0_MASK_OFFSET	0x41A040</div><div class='add'>+#define ADF_GEN6_SMIAPF_RP_X1_MASK_OFFSET	0x41A044</div><div class='add'>+#define ADF_GEN6_SMIAPF_MASK_OFFSET		0x41A084</div><div class='add'>+#define ADF_GEN6_MSIX_RTTABLE_OFFSET(i)		(0x409000 + ((i) * 4))</div><div class='add'>+</div><div class='add'>+/* Bank and ring configuration */</div><div class='add'>+#define ADF_GEN6_NUM_RINGS_PER_BANK	2</div><div class='add'>+#define ADF_GEN6_NUM_BANKS_PER_VF	4</div><div class='add'>+#define ADF_GEN6_ETR_MAX_BANKS		64</div><div class='add'>+#define ADF_GEN6_RX_RINGS_OFFSET	1</div><div class='add'>+#define ADF_GEN6_TX_RINGS_MASK		0x1</div><div class='add'>+</div><div class='add'>+/* Arbiter configuration */</div><div class='add'>+#define ADF_GEN6_ARB_CONFIG			(BIT(31) | BIT(6) | BIT(0))</div><div class='add'>+#define ADF_GEN6_ARB_OFFSET			0x000</div><div class='add'>+#define ADF_GEN6_ARB_WRK_2_SER_MAP_OFFSET	0x400</div><div class='add'>+</div><div class='add'>+/* Admin interface configuration */</div><div class='add'>+#define ADF_GEN6_ADMINMSGUR_OFFSET	0x500574</div><div class='add'>+#define ADF_GEN6_ADMINMSGLR_OFFSET	0x500578</div><div class='add'>+#define ADF_GEN6_MAILBOX_BASE_OFFSET	0x600970</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Watchdog timers</div><div class='add'>+ * Timeout is in cycles. Clock speed may vary across products but this</div><div class='add'>+ * value should be a few milli-seconds.</div><div class='add'>+ */</div><div class='add'>+#define ADF_SSM_WDT_DEFAULT_VALUE	0x7000000ULL</div><div class='add'>+#define ADF_SSM_WDT_PKE_DEFAULT_VALUE	0x8000000ULL</div><div class='add'>+#define ADF_SSMWDTATHL_OFFSET		0x5208</div><div class='add'>+#define ADF_SSMWDTATHH_OFFSET		0x520C</div><div class='add'>+#define ADF_SSMWDTCNVL_OFFSET		0x5408</div><div class='add'>+#define ADF_SSMWDTCNVH_OFFSET		0x540C</div><div class='add'>+#define ADF_SSMWDTUCSL_OFFSET		0x5808</div><div class='add'>+#define ADF_SSMWDTUCSH_OFFSET		0x580C</div><div class='add'>+#define ADF_SSMWDTDCPRL_OFFSET		0x5A08</div><div class='add'>+#define ADF_SSMWDTDCPRH_OFFSET		0x5A0C</div><div class='add'>+#define ADF_SSMWDTPKEL_OFFSET		0x5E08</div><div class='add'>+#define ADF_SSMWDTPKEH_OFFSET		0x5E0C</div><div class='add'>+</div><div class='add'>+/* Ring reset */</div><div class='add'>+#define ADF_RPRESET_POLL_TIMEOUT_US	(5 * USEC_PER_SEC)</div><div class='add'>+#define ADF_RPRESET_POLL_DELAY_US	20</div><div class='add'>+#define ADF_WQM_CSR_RPRESETCTL_RESET	BIT(0)</div><div class='add'>+#define ADF_WQM_CSR_RPRESETCTL(bank)	(0x6000 + (bank) * 8)</div><div class='add'>+#define ADF_WQM_CSR_RPRESETSTS_STATUS	BIT(0)</div><div class='add'>+#define ADF_WQM_CSR_RPRESETSTS(bank)	(ADF_WQM_CSR_RPRESETCTL(bank) + 4)</div><div class='add'>+</div><div class='add'>+/* Controls and sets up the corresponding ring mode of operation */</div><div class='add'>+#define ADF_GEN6_CSR_RINGMODECTL(bank)		(0x9000 + (bank) * 4)</div><div class='add'>+</div><div class='add'>+/* Specifies the traffic class to use for the transactions to/from the ring */</div><div class='add'>+#define ADF_GEN6_RINGMODECTL_TC_MASK		GENMASK(18, 16)</div><div class='add'>+#define ADF_GEN6_RINGMODECTL_TC_DEFAULT		0x7</div><div class='add'>+</div><div class='add'>+/* Specifies usage of tc for the transactions to/from this ring */</div><div class='add'>+#define ADF_GEN6_RINGMODECTL_TC_EN_MASK		GENMASK(20, 19)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Use the value programmed in the tc field for request descriptor</div><div class='add'>+ * and metadata read transactions</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_RINGMODECTL_TC_EN_OP1		0x1</div><div class='add'>+</div><div class='add'>+/* VC0 Resource Control Register */</div><div class='add'>+#define ADF_GEN6_PVC0CTL_OFFSET			0x204</div><div class='add'>+#define ADF_GEN6_PVC0CTL_TCVCMAP_OFFSET		1</div><div class='add'>+#define ADF_GEN6_PVC0CTL_TCVCMAP_MASK		GENMASK(7, 1)</div><div class='add'>+#define ADF_GEN6_PVC0CTL_TCVCMAP_DEFAULT	0x7F</div><div class='add'>+</div><div class='add'>+/* VC1 Resource Control Register */</div><div class='add'>+#define ADF_GEN6_PVC1CTL_OFFSET			0x210</div><div class='add'>+#define ADF_GEN6_PVC1CTL_TCVCMAP_OFFSET		1</div><div class='add'>+#define ADF_GEN6_PVC1CTL_TCVCMAP_MASK		GENMASK(7, 1)</div><div class='add'>+#define ADF_GEN6_PVC1CTL_TCVCMAP_DEFAULT	0x40</div><div class='add'>+#define ADF_GEN6_PVC1CTL_VCEN_OFFSET		31</div><div class='add'>+#define ADF_GEN6_PVC1CTL_VCEN_MASK		BIT(31)</div><div class='add'>+/* RW bit: 0x1 - enables a Virtual Channel, 0x0 - disables */</div><div class='add'>+#define ADF_GEN6_PVC1CTL_VCEN_ON		0x1</div><div class='add'>+</div><div class='add'>+/* Error source mask registers */</div><div class='add'>+#define ADF_GEN6_ERRMSK0	0x41A210</div><div class='add'>+#define ADF_GEN6_ERRMSK1	0x41A214</div><div class='add'>+#define ADF_GEN6_ERRMSK2	0x41A218</div><div class='add'>+#define ADF_GEN6_ERRMSK3	0x41A21C</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_VFLNOTIFY	BIT(7)</div><div class='add'>+</div><div class='add'>+/* Number of heartbeat counter pairs */</div><div class='add'>+#define ADF_NUM_HB_CNT_PER_AE ADF_NUM_THREADS_PER_AE</div><div class='add'>+</div><div class='add'>+/* Physical function fuses */</div><div class='add'>+#define ADF_6XXX_ACCELENGINES_MASK	GENMASK(8, 0)</div><div class='add'>+#define ADF_6XXX_ADMIN_AE_MASK		GENMASK(8, 8)</div><div class='add'>+</div><div class='add'>+/* Firmware binaries */</div><div class='add'>+#define ADF_6XXX_FW		"qat_6xxx.bin"</div><div class='add'>+#define ADF_6XXX_MMP		"qat_6xxx_mmp.bin"</div><div class='add'>+#define ADF_6XXX_CY_OBJ		"qat_6xxx_cy.bin"</div><div class='add'>+#define ADF_6XXX_DC_OBJ		"qat_6xxx_dc.bin"</div><div class='add'>+#define ADF_6XXX_ADMIN_OBJ	"qat_6xxx_admin.bin"</div><div class='add'>+</div><div class='add'>+enum icp_qat_gen6_slice_mask {</div><div class='add'>+	ICP_ACCEL_GEN6_MASK_UCS_SLICE = BIT(0),</div><div class='add'>+	ICP_ACCEL_GEN6_MASK_AUTH_SLICE = BIT(1),</div><div class='add'>+	ICP_ACCEL_GEN6_MASK_PKE_SLICE = BIT(2),</div><div class='add'>+	ICP_ACCEL_GEN6_MASK_CPR_SLICE = BIT(3),</div><div class='add'>+	ICP_ACCEL_GEN6_MASK_DCPRZ_SLICE = BIT(4),</div><div class='add'>+	ICP_ACCEL_GEN6_MASK_WCP_WAT_SLICE = BIT(6),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void adf_init_hw_data_6xxx(struct adf_hw_device_data *hw_data);</div><div class='add'>+void adf_clean_hw_data_6xxx(struct adf_hw_device_data *hw_data);</div><div class='add'>+</div><div class='add'>+#endif /* ADF_6XXX_HW_DATA_H_ */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_6xxx/adf_drv.c b/drivers/crypto/intel/qat/qat_6xxx/adf_drv.c<br/>new file mode 100644<br/>index 000000000000..c1dc9c56fdf5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_6xxx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_6xxx/adf_drv.c</a></div><div class='hunk'>@@ -0,0 +1,226 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;adf_accel_devices.h&gt;</div><div class='add'>+#include &lt;adf_cfg.h&gt;</div><div class='add'>+#include &lt;adf_common_drv.h&gt;</div><div class='add'>+#include &lt;adf_dbgfs.h&gt;</div><div class='add'>+</div><div class='add'>+#include "adf_gen6_shared.h"</div><div class='add'>+#include "adf_6xxx_hw_data.h"</div><div class='add'>+</div><div class='add'>+static int bar_map[] = {</div><div class='add'>+	0,	/* SRAM */</div><div class='add'>+	2,	/* PMISC */</div><div class='add'>+	4,	/* ETR */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void adf_device_down(void *accel_dev)</div><div class='add'>+{</div><div class='add'>+	adf_dev_down(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_dbgfs_cleanup(void *accel_dev)</div><div class='add'>+{</div><div class='add'>+	adf_dbgfs_exit(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_cfg_device_remove(void *accel_dev)</div><div class='add'>+{</div><div class='add'>+	adf_cfg_dev_remove(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_cleanup_hw_data(void *accel_dev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_device = accel_dev;</div><div class='add'>+</div><div class='add'>+	if (accel_device-&gt;hw_device) {</div><div class='add'>+		adf_clean_hw_data_6xxx(accel_device-&gt;hw_device);</div><div class='add'>+		accel_device-&gt;hw_device = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_devmgr_remove(void *accel_dev)</div><div class='add'>+{</div><div class='add'>+	adf_devmgr_rm_dev(accel_dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_pci *accel_pci_dev;</div><div class='add'>+	struct adf_hw_device_data *hw_data;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct adf_accel_dev *accel_dev;</div><div class='add'>+	struct adf_bar *bar;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (num_possible_nodes() &gt; 1 &amp;&amp; dev_to_node(dev) &lt; 0) {</div><div class='add'>+		/*</div><div class='add'>+		 * If the accelerator is connected to a node with no memory</div><div class='add'>+		 * there is no point in using the accelerator since the remote</div><div class='add'>+		 * memory transaction will be very slow.</div><div class='add'>+		 */</div><div class='add'>+		return dev_err_probe(dev, -EINVAL, "Invalid NUMA configuration.\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	accel_dev = devm_kzalloc(dev, sizeof(*accel_dev), GFP_KERNEL);</div><div class='add'>+	if (!accel_dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;accel_dev-&gt;crypto_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;accel_dev-&gt;list);</div><div class='add'>+	accel_pci_dev = &amp;accel_dev-&gt;accel_pci_dev;</div><div class='add'>+	accel_pci_dev-&gt;pci_dev = pdev;</div><div class='add'>+	accel_dev-&gt;owner = THIS_MODULE;</div><div class='add'>+</div><div class='add'>+	hw_data = devm_kzalloc(dev, sizeof(*hw_data), GFP_KERNEL);</div><div class='add'>+	if (!hw_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pci_read_config_byte(pdev, PCI_REVISION_ID, &amp;accel_pci_dev-&gt;revid);</div><div class='add'>+	pci_read_config_dword(pdev, ADF_GEN6_FUSECTL4_OFFSET, &amp;hw_data-&gt;fuses[ADF_FUSECTL4]);</div><div class='add'>+	pci_read_config_dword(pdev, ADF_GEN6_FUSECTL0_OFFSET, &amp;hw_data-&gt;fuses[ADF_FUSECTL0]);</div><div class='add'>+	pci_read_config_dword(pdev, ADF_GEN6_FUSECTL1_OFFSET, &amp;hw_data-&gt;fuses[ADF_FUSECTL1]);</div><div class='add'>+</div><div class='add'>+	if (!(hw_data-&gt;fuses[ADF_FUSECTL1] &amp; ICP_ACCEL_GEN6_MASK_WCP_WAT_SLICE))</div><div class='add'>+		return dev_err_probe(dev, -EFAULT, "Wireless mode is not supported.\n");</div><div class='add'>+</div><div class='add'>+	/* Enable PCI device */</div><div class='add'>+	ret = pcim_enable_device(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "Cannot enable PCI device.\n");</div><div class='add'>+</div><div class='add'>+	ret = adf_devmgr_add_dev(accel_dev, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to add new accelerator device.\n");</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, adf_devmgr_remove, accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	accel_dev-&gt;hw_device = hw_data;</div><div class='add'>+	adf_init_hw_data_6xxx(accel_dev-&gt;hw_device);</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, adf_cleanup_hw_data, accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Get Accelerators and Accelerator Engine masks */</div><div class='add'>+	hw_data-&gt;accel_mask = hw_data-&gt;get_accel_mask(hw_data);</div><div class='add'>+	hw_data-&gt;ae_mask = hw_data-&gt;get_ae_mask(hw_data);</div><div class='add'>+	accel_pci_dev-&gt;sku = hw_data-&gt;get_sku(hw_data);</div><div class='add'>+</div><div class='add'>+	/* If the device has no acceleration engines then ignore it */</div><div class='add'>+	if (!hw_data-&gt;accel_mask || !hw_data-&gt;ae_mask ||</div><div class='add'>+	    (~hw_data-&gt;ae_mask &amp; ADF_GEN6_ACCELERATORS_MASK)) {</div><div class='add'>+		ret = -EFAULT;</div><div class='add'>+		return dev_err_probe(dev, ret, "No acceleration units were found.\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create device configuration table */</div><div class='add'>+	ret = adf_cfg_dev_add(accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, adf_cfg_device_remove, accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set DMA identifier */</div><div class='add'>+	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "No usable DMA configuration.\n");</div><div class='add'>+</div><div class='add'>+	ret = adf_gen6_cfg_dev_init(accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to initialize configuration.\n");</div><div class='add'>+</div><div class='add'>+	/* Get accelerator capability mask */</div><div class='add'>+	hw_data-&gt;accel_capabilities_mask = hw_data-&gt;get_accel_cap(accel_dev);</div><div class='add'>+	if (!hw_data-&gt;accel_capabilities_mask) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to get capabilities mask.\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(bar_map); i++) {</div><div class='add'>+		bar = &amp;accel_pci_dev-&gt;pci_bars[i];</div><div class='add'>+</div><div class='add'>+		/* Map 64-bit PCIe BAR */</div><div class='add'>+		bar-&gt;virt_addr = pcim_iomap_region(pdev, bar_map[i], pci_name(pdev));</div><div class='add'>+		if (IS_ERR(bar-&gt;virt_addr)) {</div><div class='add'>+			ret = PTR_ERR(bar-&gt;virt_addr);</div><div class='add'>+			return dev_err_probe(dev, ret, "Failed to ioremap PCI region.\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The PCI config space is saved at this point and will be restored</div><div class='add'>+	 * after a Function Level Reset (FLR) as the FLR does not completely</div><div class='add'>+	 * restore it.</div><div class='add'>+	 */</div><div class='add'>+	ret = pci_save_state(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to save pci state.\n");</div><div class='add'>+</div><div class='add'>+	accel_dev-&gt;ras_errors.enabled = true;</div><div class='add'>+</div><div class='add'>+	adf_dbgfs_init(accel_dev);</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, adf_dbgfs_cleanup, accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = adf_dev_up(accel_dev, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, adf_device_down, accel_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = adf_sysfs_init(accel_dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);</div><div class='add'>+</div><div class='add'>+	adf_dev_down(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id adf_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_6XXX) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='add'>+</div><div class='add'>+static struct pci_driver adf_driver = {</div><div class='add'>+	.id_table = adf_pci_tbl,</div><div class='add'>+	.name = ADF_6XXX_DEVICE_NAME,</div><div class='add'>+	.probe = adf_probe,</div><div class='add'>+	.shutdown = adf_shutdown,</div><div class='add'>+	.sriov_configure = adf_sriov_configure,</div><div class='add'>+	.err_handler = &amp;adf_err_handler,</div><div class='add'>+};</div><div class='add'>+module_pci_driver(adf_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Intel");</div><div class='add'>+MODULE_FIRMWARE(ADF_6XXX_FW);</div><div class='add'>+MODULE_FIRMWARE(ADF_6XXX_MMP);</div><div class='add'>+MODULE_DESCRIPTION("Intel(R) QuickAssist Technology for GEN6 Devices");</div><div class='add'>+MODULE_SOFTDEP("pre: crypto-intel_qat");</div><div class='add'>+MODULE_IMPORT_NS("CRYPTO_QAT");</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c3xxx/Makefile b/drivers/crypto/intel/qat/qat_c3xxx/Makefile<br/>index d9e568572da8..43604c025f0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxx/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c3xxx/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C3XXX) += qat_c3xxx.o</div><div class='ctx'> qat_c3xxx-y := adf_drv.o adf_c3xxx_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c<br/>index e78f7bfd30b8..07f2c42a68f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'> #include &lt;adf_clock.h&gt;</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='del'>-#include &lt;adf_gen2_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='hunk'>@@ -22,7 +21,6 @@ static const u32 thrd_to_arb_map[ADF_C3XXX_MAX_ACCELENGINES] = {</div><div class='ctx'> static struct adf_hw_device_class c3xxx_class = {</div><div class='ctx'> 	.name = ADF_C3XXX_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_C3XXX,</div><div class='del'>-	.instances = 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_accel_mask(struct adf_hw_device_data *self)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c b/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c<br/>index b825b35ab4bf..bceb5dd8b148 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c3xxx/adf_drv.c</a></div><div class='hunk'>@@ -19,24 +19,6 @@</div><div class='ctx'> #include &lt;adf_dbgfs.h&gt;</div><div class='ctx'> #include "adf_c3xxx_hw_data.h"</div><div class='ctx'> </div><div class='del'>-static const struct pci_device_id adf_pci_tbl[] = {</div><div class='del'>-	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_C3XXX), },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='del'>-</div><div class='del'>-static int adf_probe(struct pci_dev *dev, const struct pci_device_id *ent);</div><div class='del'>-static void adf_remove(struct pci_dev *dev);</div><div class='del'>-</div><div class='del'>-static struct pci_driver adf_driver = {</div><div class='del'>-	.id_table = adf_pci_tbl,</div><div class='del'>-	.name = ADF_C3XXX_DEVICE_NAME,</div><div class='del'>-	.probe = adf_probe,</div><div class='del'>-	.remove = adf_remove,</div><div class='del'>-	.sriov_configure = adf_sriov_configure,</div><div class='del'>-	.err_handler = &amp;adf_err_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	pci_release_regions(accel_dev-&gt;accel_pci_dev.pci_dev);</div><div class='hunk'>@@ -227,6 +209,29 @@ static void adf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	kfree(accel_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void adf_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);</div><div class='add'>+</div><div class='add'>+	adf_dev_down(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id adf_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_C3XXX) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='add'>+</div><div class='add'>+static struct pci_driver adf_driver = {</div><div class='add'>+	.id_table = adf_pci_tbl,</div><div class='add'>+	.name = ADF_C3XXX_DEVICE_NAME,</div><div class='add'>+	.probe = adf_probe,</div><div class='add'>+	.remove = adf_remove,</div><div class='add'>+	.shutdown = adf_shutdown,</div><div class='add'>+	.sriov_configure = adf_sriov_configure,</div><div class='add'>+	.err_handler = &amp;adf_err_handler,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init adfdrv_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	request_module("intel_qat");</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c3xxxvf/Makefile b/drivers/crypto/intel/qat/qat_c3xxxvf/Makefile<br/>index 31a908a211ac..03f6745b4aa2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxxvf/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxxvf/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxxvf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c3xxxvf/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C3XXXVF) += qat_c3xxxvf.o</div><div class='ctx'> qat_c3xxxvf-y := adf_drv.o adf_c3xxxvf_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c b/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c<br/>index a512ca4efd3f..db3c33fa1881 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'> #include &lt;adf_accel_devices.h&gt;</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='del'>-#include &lt;adf_gen2_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='hunk'>@@ -13,7 +12,6 @@</div><div class='ctx'> static struct adf_hw_device_class c3xxxiov_class = {</div><div class='ctx'> 	.name = ADF_C3XXXVF_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_C3XXXVF,</div><div class='del'>-	.instances = 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_accel_mask(struct adf_hw_device_data *self)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c62x/Makefile b/drivers/crypto/intel/qat/qat_c62x/Makefile<br/>index cbdaaa135e84..f3d722bef088 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62x/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c62x/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C62X) += qat_c62x.o</div><div class='ctx'> qat_c62x-y := adf_drv.o adf_c62x_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c<br/>index 32ebe09477a8..0b410b41474d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c62x/adf_c62x_hw_data.c</a></div><div class='hunk'>@@ -5,7 +5,6 @@</div><div class='ctx'> #include &lt;adf_clock.h&gt;</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='del'>-#include &lt;adf_gen2_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='hunk'>@@ -22,7 +21,6 @@ static const u32 thrd_to_arb_map[ADF_C62X_MAX_ACCELENGINES] = {</div><div class='ctx'> static struct adf_hw_device_class c62x_class = {</div><div class='ctx'> 	.name = ADF_C62X_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_C62X,</div><div class='del'>-	.instances = 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_accel_mask(struct adf_hw_device_data *self)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c62x/adf_drv.c b/drivers/crypto/intel/qat/qat_c62x/adf_drv.c<br/>index 8a7bdec358d6..23ccb72b6ea2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/adf_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62x/adf_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62x/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c62x/adf_drv.c</a></div><div class='hunk'>@@ -19,24 +19,6 @@</div><div class='ctx'> #include &lt;adf_dbgfs.h&gt;</div><div class='ctx'> #include "adf_c62x_hw_data.h"</div><div class='ctx'> </div><div class='del'>-static const struct pci_device_id adf_pci_tbl[] = {</div><div class='del'>-	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_C62X), },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='del'>-</div><div class='del'>-static int adf_probe(struct pci_dev *dev, const struct pci_device_id *ent);</div><div class='del'>-static void adf_remove(struct pci_dev *dev);</div><div class='del'>-</div><div class='del'>-static struct pci_driver adf_driver = {</div><div class='del'>-	.id_table = adf_pci_tbl,</div><div class='del'>-	.name = ADF_C62X_DEVICE_NAME,</div><div class='del'>-	.probe = adf_probe,</div><div class='del'>-	.remove = adf_remove,</div><div class='del'>-	.sriov_configure = adf_sriov_configure,</div><div class='del'>-	.err_handler = &amp;adf_err_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	pci_release_regions(accel_dev-&gt;accel_pci_dev.pci_dev);</div><div class='hunk'>@@ -227,6 +209,29 @@ static void adf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	kfree(accel_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void adf_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);</div><div class='add'>+</div><div class='add'>+	adf_dev_down(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id adf_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_C62X) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='add'>+</div><div class='add'>+static struct pci_driver adf_driver = {</div><div class='add'>+	.id_table = adf_pci_tbl,</div><div class='add'>+	.name = ADF_C62X_DEVICE_NAME,</div><div class='add'>+	.probe = adf_probe,</div><div class='add'>+	.remove = adf_remove,</div><div class='add'>+	.shutdown = adf_shutdown,</div><div class='add'>+	.sriov_configure = adf_sriov_configure,</div><div class='add'>+	.err_handler = &amp;adf_err_handler,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init adfdrv_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	request_module("intel_qat");</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c62xvf/Makefile b/drivers/crypto/intel/qat/qat_c62xvf/Makefile<br/>index 60e499b041ec..ed7f3f722d99 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62xvf/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62xvf/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62xvf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c62xvf/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_C62XVF) += qat_c62xvf.o</div><div class='ctx'> qat_c62xvf-y := adf_drv.o adf_c62xvf_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c b/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c<br/>index 4aaaaf921734..7f00035d3661 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_c62xvf/adf_c62xvf_hw_data.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'> #include &lt;adf_accel_devices.h&gt;</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='del'>-#include &lt;adf_gen2_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='hunk'>@@ -13,7 +12,6 @@</div><div class='ctx'> static struct adf_hw_device_class c62xiov_class = {</div><div class='ctx'> 	.name = ADF_C62XVF_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_C62XVF,</div><div class='del'>-	.instances = 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_accel_mask(struct adf_hw_device_data *self)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/Makefile b/drivers/crypto/intel/qat/qat_common/Makefile<br/>index af5df29fd2e3..66bb295ace28 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/Makefile</a></div><div class='hunk'>@@ -8,19 +8,19 @@ intel_qat-y := adf_accel_engine.o \</div><div class='ctx'> 	adf_cfg_services.o \</div><div class='ctx'> 	adf_clock.o \</div><div class='ctx'> 	adf_ctl_drv.o \</div><div class='add'>+	adf_dc.o \</div><div class='ctx'> 	adf_dev_mgr.o \</div><div class='ctx'> 	adf_gen2_config.o \</div><div class='del'>-	adf_gen2_dc.o \</div><div class='ctx'> 	adf_gen2_hw_csr_data.o \</div><div class='ctx'> 	adf_gen2_hw_data.o \</div><div class='ctx'> 	adf_gen4_config.o \</div><div class='del'>-	adf_gen4_dc.o \</div><div class='ctx'> 	adf_gen4_hw_csr_data.o \</div><div class='ctx'> 	adf_gen4_hw_data.o \</div><div class='ctx'> 	adf_gen4_pm.o \</div><div class='ctx'> 	adf_gen4_ras.o \</div><div class='del'>-	adf_gen4_timer.o \</div><div class='ctx'> 	adf_gen4_vf_mig.o \</div><div class='add'>+	adf_gen6_ras.o \</div><div class='add'>+	adf_gen6_shared.o \</div><div class='ctx'> 	adf_hw_arbiter.o \</div><div class='ctx'> 	adf_init.o \</div><div class='ctx'> 	adf_isr.o \</div><div class='hunk'>@@ -30,6 +30,7 @@ intel_qat-y := adf_accel_engine.o \</div><div class='ctx'> 	adf_sysfs.o \</div><div class='ctx'> 	adf_sysfs_ras_counters.o \</div><div class='ctx'> 	adf_sysfs_rl.o \</div><div class='add'>+	adf_timer.o \</div><div class='ctx'> 	adf_transport.o \</div><div class='ctx'> 	qat_algs.o \</div><div class='ctx'> 	qat_algs_send.o \</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h<br/>index dc21551153cb..2ee526063213 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_accel_devices.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_accel_devices.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/qat/qat_mig_dev.h&gt;</div><div class='ctx'> #include &lt;linux/wordpart.h&gt;</div><div class='ctx'> #include "adf_cfg_common.h"</div><div class='add'>+#include "adf_dc.h"</div><div class='ctx'> #include "adf_rl.h"</div><div class='ctx'> #include "adf_telemetry.h"</div><div class='ctx'> #include "adf_pfvf_msg.h"</div><div class='hunk'>@@ -25,14 +26,18 @@</div><div class='ctx'> #define ADF_C3XXXVF_DEVICE_NAME "c3xxxvf"</div><div class='ctx'> #define ADF_4XXX_DEVICE_NAME "4xxx"</div><div class='ctx'> #define ADF_420XX_DEVICE_NAME "420xx"</div><div class='del'>-#define ADF_4XXX_PCI_DEVICE_ID 0x4940</div><div class='del'>-#define ADF_4XXXIOV_PCI_DEVICE_ID 0x4941</div><div class='del'>-#define ADF_401XX_PCI_DEVICE_ID 0x4942</div><div class='del'>-#define ADF_401XXIOV_PCI_DEVICE_ID 0x4943</div><div class='del'>-#define ADF_402XX_PCI_DEVICE_ID 0x4944</div><div class='del'>-#define ADF_402XXIOV_PCI_DEVICE_ID 0x4945</div><div class='del'>-#define ADF_420XX_PCI_DEVICE_ID 0x4946</div><div class='del'>-#define ADF_420XXIOV_PCI_DEVICE_ID 0x4947</div><div class='add'>+#define ADF_6XXX_DEVICE_NAME "6xxx"</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_4XXX 0x4940</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_4XXXIOV 0x4941</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_401XX 0x4942</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_401XXIOV 0x4943</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_402XX 0x4944</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_402XXIOV 0x4945</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_420XX 0x4946</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_420XXIOV 0x4947</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_6XXX 0x4948</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_QAT_6XXX_IOV 0x4949</div><div class='add'>+</div><div class='ctx'> #define ADF_DEVICE_FUSECTL_OFFSET 0x40</div><div class='ctx'> #define ADF_DEVICE_LEGFUSE_OFFSET 0x4C</div><div class='ctx'> #define ADF_DEVICE_FUSECTL_MASK 0x80000000</div><div class='hunk'>@@ -267,7 +272,8 @@ struct adf_pfvf_ops {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct adf_dc_ops {</div><div class='del'>-	void (*build_deflate_ctx)(void *ctx);</div><div class='add'>+	int (*build_comp_block)(void *ctx, enum adf_dc_algo algo);</div><div class='add'>+	int (*build_decomp_block)(void *ctx, enum adf_dc_algo algo);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct qat_migdev_ops {</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_admin.c b/drivers/crypto/intel/qat/qat_common/adf_admin.c<br/>index acad526eb741..573388c37100 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_admin.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_admin.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_admin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_admin.c</a></div><div class='hunk'>@@ -449,6 +449,7 @@ int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay)</div><div class='ctx'> </div><div class='ctx'> 	return adf_send_admin(accel_dev, &amp;req, &amp;resp, ae_mask);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_init_admin_pm);</div><div class='ctx'> </div><div class='ctx'> int adf_get_pm_info(struct adf_accel_dev *accel_dev, dma_addr_t p_state_addr,</div><div class='ctx'> 		    size_t buff_size)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_cfg_common.h b/drivers/crypto/intel/qat/qat_common/adf_cfg_common.h<br/>index 89df3888d7ea..15fdf9854b81 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_cfg_common.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_cfg_common.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_cfg_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_cfg_common.h</a></div><div class='hunk'>@@ -48,6 +48,7 @@ enum adf_device_type {</div><div class='ctx'> 	DEV_C3XXXVF,</div><div class='ctx'> 	DEV_4XXX,</div><div class='ctx'> 	DEV_420XX,</div><div class='add'>+	DEV_6XXX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct adf_dev_status_info {</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_cfg_services.c b/drivers/crypto/intel/qat/qat_common/adf_cfg_services.c<br/>index 30abcd9e1283..c39871291da7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_cfg_services.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_cfg_services.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_cfg_services.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_cfg_services.c</a></div><div class='hunk'>@@ -116,7 +116,7 @@ int adf_parse_service_string(struct adf_accel_dev *accel_dev, const char *in,</div><div class='ctx'> 	return adf_service_mask_to_string(mask, out, out_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int adf_get_service_mask(struct adf_accel_dev *accel_dev, unsigned long *mask)</div><div class='add'>+int adf_get_service_mask(struct adf_accel_dev *accel_dev, unsigned long *mask)</div><div class='ctx'> {</div><div class='ctx'> 	char services[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = { };</div><div class='ctx'> 	size_t len;</div><div class='hunk'>@@ -138,6 +138,7 @@ static int adf_get_service_mask(struct adf_accel_dev *accel_dev, unsigned long *</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_get_service_mask);</div><div class='ctx'> </div><div class='ctx'> int adf_get_service_enabled(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_cfg_services.h b/drivers/crypto/intel/qat/qat_common/adf_cfg_services.h<br/>index f6bafc15cbc6..3742c450878f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_cfg_services.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_cfg_services.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_cfg_services.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_cfg_services.h</a></div><div class='hunk'>@@ -32,5 +32,6 @@ enum {</div><div class='ctx'> int adf_parse_service_string(struct adf_accel_dev *accel_dev, const char *in,</div><div class='ctx'> 			     size_t in_len, char *out, size_t out_len);</div><div class='ctx'> int adf_get_service_enabled(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_get_service_mask(struct adf_accel_dev *accel_dev, unsigned long *mask);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_dc.c b/drivers/crypto/intel/qat/qat_common/adf_dc.c<br/>index 47261b1c1da6..3e8fb4e3ed97 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_dc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_dc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_dc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_dc.c</a></div><div class='hunk'>@@ -1,22 +1,21 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Copyright(c) 2022 Intel Corporation */</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='del'>-#include "adf_gen2_dc.h"</div><div class='add'>+#include "adf_dc.h"</div><div class='ctx'> #include "icp_qat_fw_comp.h"</div><div class='ctx'> </div><div class='del'>-static void qat_comp_build_deflate_ctx(void *ctx)</div><div class='add'>+int qat_comp_build_ctx(struct adf_accel_dev *accel_dev, void *ctx, enum adf_dc_algo algo)</div><div class='ctx'> {</div><div class='del'>-	struct icp_qat_fw_comp_req *req_tmpl = (struct icp_qat_fw_comp_req *)ctx;</div><div class='del'>-	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='del'>-	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='del'>-	struct icp_qat_fw_comp_req_params *req_pars = &amp;req_tmpl-&gt;comp_pars;</div><div class='add'>+	struct icp_qat_fw_comp_req *req_tmpl = ctx;</div><div class='ctx'> 	struct icp_qat_fw_comp_cd_hdr *comp_cd_ctrl = &amp;req_tmpl-&gt;comp_cd_ctrl;</div><div class='add'>+	struct icp_qat_fw_comp_req_params *req_pars = &amp;req_tmpl-&gt;comp_pars;</div><div class='add'>+	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	memset(req_tmpl, 0, sizeof(*req_tmpl));</div><div class='ctx'> 	header-&gt;hdr_flags =</div><div class='ctx'> 		ICP_QAT_FW_COMN_HDR_FLAGS_BUILD(ICP_QAT_FW_COMN_REQ_FLAG_SET);</div><div class='ctx'> 	header-&gt;service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_COMP;</div><div class='del'>-	header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_STATIC;</div><div class='ctx'> 	header-&gt;comn_req_flags =</div><div class='ctx'> 		ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_16BYTE_DATA,</div><div class='ctx'> 					    QAT_COMN_PTR_TYPE_SGL);</div><div class='hunk'>@@ -26,12 +25,14 @@ static void qat_comp_build_deflate_ctx(void *ctx)</div><div class='ctx'> 					    ICP_QAT_FW_COMP_NOT_ENH_AUTO_SELECT_BEST,</div><div class='ctx'> 					    ICP_QAT_FW_COMP_NOT_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST,</div><div class='ctx'> 					    ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF);</div><div class='del'>-	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] =</div><div class='del'>-		ICP_QAT_HW_COMPRESSION_CONFIG_BUILD(ICP_QAT_HW_COMPRESSION_DIR_COMPRESS,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_DEPTH_1,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_FILE_TYPE_0);</div><div class='add'>+</div><div class='add'>+	/* Build HW config block for compression */</div><div class='add'>+	ret = GET_DC_OPS(accel_dev)-&gt;build_comp_block(ctx, algo);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to build compression block\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	req_pars-&gt;crc.legacy.initial_adler = COMP_CPR_INITIAL_ADLER;</div><div class='ctx'> 	req_pars-&gt;crc.legacy.initial_crc32 = COMP_CPR_INITIAL_CRC;</div><div class='ctx'> 	req_pars-&gt;req_par_flags =</div><div class='hunk'>@@ -45,26 +46,19 @@ static void qat_comp_build_deflate_ctx(void *ctx)</div><div class='ctx'> 						      ICP_QAT_FW_COMP_NO_XXHASH_ACC,</div><div class='ctx'> 						      ICP_QAT_FW_COMP_CNV_ERROR_NONE,</div><div class='ctx'> 						      ICP_QAT_FW_COMP_NO_APPEND_CRC,</div><div class='del'>-						      ICP_QAT_FW_COMP_NO_DROP_DATA);</div><div class='add'>+						      ICP_QAT_FW_COMP_NO_DROP_DATA,</div><div class='add'>+						      ICP_QAT_FW_COMP_NO_PARTIAL_DECOMPRESS);</div><div class='ctx'> 	ICP_QAT_FW_COMN_NEXT_ID_SET(comp_cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);</div><div class='ctx'> 	ICP_QAT_FW_COMN_CURR_ID_SET(comp_cd_ctrl, ICP_QAT_FW_SLICE_COMP);</div><div class='ctx'> </div><div class='ctx'> 	/* Fill second half of the template for decompression */</div><div class='ctx'> 	memcpy(req_tmpl + 1, req_tmpl, sizeof(*req_tmpl));</div><div class='ctx'> 	req_tmpl++;</div><div class='del'>-	header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='del'>-	header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_DECOMPRESS;</div><div class='del'>-	cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='del'>-	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] =</div><div class='del'>-		ICP_QAT_HW_COMPRESSION_CONFIG_BUILD(ICP_QAT_HW_COMPRESSION_DIR_DECOMPRESS,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_DEPTH_1,</div><div class='del'>-						    ICP_QAT_HW_COMPRESSION_FILE_TYPE_0);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-void adf_gen2_init_dc_ops(struct adf_dc_ops *dc_ops)</div><div class='del'>-{</div><div class='del'>-	dc_ops-&gt;build_deflate_ctx = qat_comp_build_deflate_ctx;</div><div class='add'>+	/* Build HW config block for decompression */</div><div class='add'>+	ret = GET_DC_OPS(accel_dev)-&gt;build_decomp_block(req_tmpl, algo);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Failed to build decompression block\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(adf_gen2_init_dc_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_dc.h b/drivers/crypto/intel/qat/qat_common/adf_dc.h<br/>new file mode 100644<br/>index 000000000000..6cb5e09054a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_dc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_dc.h</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef ADF_DC_H</div><div class='add'>+#define ADF_DC_H</div><div class='add'>+</div><div class='add'>+struct adf_accel_dev;</div><div class='add'>+</div><div class='add'>+enum adf_dc_algo {</div><div class='add'>+	QAT_DEFLATE,</div><div class='add'>+	QAT_LZ4,</div><div class='add'>+	QAT_LZ4S,</div><div class='add'>+	QAT_ZSTD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int qat_comp_build_ctx(struct adf_accel_dev *accel_dev, void *ctx, enum adf_dc_algo algo);</div><div class='add'>+</div><div class='add'>+#endif /* ADF_DC_H */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_fw_config.h b/drivers/crypto/intel/qat/qat_common/adf_fw_config.h<br/>index 4f86696800c9..78957fa900b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_fw_config.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_fw_config.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_fw_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_fw_config.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@ enum adf_fw_objs {</div><div class='ctx'> 	ADF_FW_ASYM_OBJ,</div><div class='ctx'> 	ADF_FW_DC_OBJ,</div><div class='ctx'> 	ADF_FW_ADMIN_OBJ,</div><div class='add'>+	ADF_FW_CY_OBJ,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct adf_fw_config {</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_dc.h b/drivers/crypto/intel/qat/qat_common/adf_gen2_dc.h<br/>deleted file mode 100644<br/>index 6eae023354d7..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_dc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_dc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/* Copyright(c) 2022 Intel Corporation */</div><div class='del'>-#ifndef ADF_GEN2_DC_H</div><div class='del'>-#define ADF_GEN2_DC_H</div><div class='del'>-</div><div class='del'>-#include "adf_accel_devices.h"</div><div class='del'>-</div><div class='del'>-void adf_gen2_init_dc_ops(struct adf_dc_ops *dc_ops);</div><div class='del'>-</div><div class='del'>-#endif /* ADF_GEN2_DC_H */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c<br/>index 2b263442c856..6a505e9a5cf9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.c</a></div><div class='hunk'>@@ -1,7 +1,9 @@</div><div class='ctx'> // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)</div><div class='ctx'> /* Copyright(c) 2020 Intel Corporation */</div><div class='ctx'> #include "adf_common_drv.h"</div><div class='add'>+#include "adf_dc.h"</div><div class='ctx'> #include "adf_gen2_hw_data.h"</div><div class='add'>+#include "icp_qat_fw_comp.h"</div><div class='ctx'> #include "icp_qat_hw.h"</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -169,3 +171,58 @@ void adf_gen2_set_ssm_wdtimer(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(adf_gen2_set_ssm_wdtimer);</div><div class='add'>+</div><div class='add'>+static int adf_gen2_build_comp_block(void *ctx, enum adf_dc_algo algo)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_fw_comp_req *req_tmpl = ctx;</div><div class='add'>+	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='add'>+	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='add'>+</div><div class='add'>+	switch (algo) {</div><div class='add'>+	case QAT_DEFLATE:</div><div class='add'>+		header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_STATIC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] =</div><div class='add'>+		ICP_QAT_HW_COMPRESSION_CONFIG_BUILD(ICP_QAT_HW_COMPRESSION_DIR_COMPRESS,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_DEPTH_1,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_FILE_TYPE_0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen2_build_decomp_block(void *ctx, enum adf_dc_algo algo)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_fw_comp_req *req_tmpl = ctx;</div><div class='add'>+	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='add'>+	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='add'>+</div><div class='add'>+	switch (algo) {</div><div class='add'>+	case QAT_DEFLATE:</div><div class='add'>+		header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_DECOMPRESS;</div><div class='add'>+	break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] =</div><div class='add'>+		ICP_QAT_HW_COMPRESSION_CONFIG_BUILD(ICP_QAT_HW_COMPRESSION_DIR_DECOMPRESS,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_DELAYED_MATCH_DISABLED,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_ALGO_DEFLATE,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_DEPTH_1,</div><div class='add'>+						    ICP_QAT_HW_COMPRESSION_FILE_TYPE_0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_gen2_init_dc_ops(struct adf_dc_ops *dc_ops)</div><div class='add'>+{</div><div class='add'>+	dc_ops-&gt;build_comp_block = adf_gen2_build_comp_block;</div><div class='add'>+	dc_ops-&gt;build_decomp_block = adf_gen2_build_decomp_block;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen2_init_dc_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h<br/>index 708e9186127b..59bad368a921 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen2_hw_data.h</a></div><div class='hunk'>@@ -88,5 +88,6 @@ void adf_gen2_get_arb_info(struct arb_info *arb_info);</div><div class='ctx'> void adf_gen2_enable_ints(struct adf_accel_dev *accel_dev);</div><div class='ctx'> u32 adf_gen2_get_accel_cap(struct adf_accel_dev *accel_dev);</div><div class='ctx'> void adf_gen2_set_ssm_wdtimer(struct adf_accel_dev *accel_dev);</div><div class='add'>+void adf_gen2_init_dc_ops(struct adf_dc_ops *dc_ops);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h b/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h<br/>index a716545a764c..34a63cf40db2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.h</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='add'>+#include "adf_common_drv.h"</div><div class='ctx'> </div><div class='ctx'> #define ADF_GEN2_ERRSOU3 (0x3A000 + 0x0C)</div><div class='ctx'> #define ADF_GEN2_ERRSOU5 (0x3A000 + 0xD8)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_config.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_config.c<br/>index f97e7a880f3a..afcdfdd0a37a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_config.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_config.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_config.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen4_config.c</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> #include "qat_compression.h"</div><div class='ctx'> #include "qat_crypto.h"</div><div class='ctx'> </div><div class='del'>-static int adf_crypto_dev_config(struct adf_accel_dev *accel_dev)</div><div class='add'>+int adf_crypto_dev_config(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];</div><div class='ctx'> 	int banks = GET_MAX_BANKS(accel_dev);</div><div class='hunk'>@@ -117,7 +117,7 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int adf_comp_dev_config(struct adf_accel_dev *accel_dev)</div><div class='add'>+int adf_comp_dev_config(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];</div><div class='ctx'> 	int banks = GET_MAX_BANKS(accel_dev);</div><div class='hunk'>@@ -187,7 +187,7 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int adf_no_dev_config(struct adf_accel_dev *accel_dev)</div><div class='add'>+int adf_no_dev_config(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long val;</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_config.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_config.h<br/>index bb87655f69a8..38a674c27e40 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_config.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_config.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_config.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen4_config.h</a></div><div class='hunk'>@@ -7,5 +7,8 @@</div><div class='ctx'> </div><div class='ctx'> int adf_gen4_dev_config(struct adf_accel_dev *accel_dev);</div><div class='ctx'> int adf_gen4_cfg_dev_init(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_crypto_dev_config(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_comp_dev_config(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_no_dev_config(struct adf_accel_dev *accel_dev);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.c<br/>deleted file mode 100644<br/>index 5859238e37de..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_dc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,83 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/* Copyright(c) 2022 Intel Corporation */</div><div class='del'>-#include "adf_accel_devices.h"</div><div class='del'>-#include "icp_qat_fw_comp.h"</div><div class='del'>-#include "icp_qat_hw_20_comp.h"</div><div class='del'>-#include "adf_gen4_dc.h"</div><div class='del'>-</div><div class='del'>-static void qat_comp_build_deflate(void *ctx)</div><div class='del'>-{</div><div class='del'>-	struct icp_qat_fw_comp_req *req_tmpl =</div><div class='del'>-				(struct icp_qat_fw_comp_req *)ctx;</div><div class='del'>-	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='del'>-	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='del'>-	struct icp_qat_fw_comp_req_params *req_pars = &amp;req_tmpl-&gt;comp_pars;</div><div class='del'>-	struct icp_qat_hw_comp_20_config_csr_upper hw_comp_upper_csr = {0};</div><div class='del'>-	struct icp_qat_hw_comp_20_config_csr_lower hw_comp_lower_csr = {0};</div><div class='del'>-	struct icp_qat_hw_decomp_20_config_csr_lower hw_decomp_lower_csr = {0};</div><div class='del'>-	u32 upper_val;</div><div class='del'>-	u32 lower_val;</div><div class='del'>-</div><div class='del'>-	memset(req_tmpl, 0, sizeof(*req_tmpl));</div><div class='del'>-	header-&gt;hdr_flags =</div><div class='del'>-		ICP_QAT_FW_COMN_HDR_FLAGS_BUILD(ICP_QAT_FW_COMN_REQ_FLAG_SET);</div><div class='del'>-	header-&gt;service_type = ICP_QAT_FW_COMN_REQ_CPM_FW_COMP;</div><div class='del'>-	header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_STATIC;</div><div class='del'>-	header-&gt;comn_req_flags =</div><div class='del'>-		ICP_QAT_FW_COMN_FLAGS_BUILD(QAT_COMN_CD_FLD_TYPE_16BYTE_DATA,</div><div class='del'>-					    QAT_COMN_PTR_TYPE_SGL);</div><div class='del'>-	header-&gt;serv_specif_flags =</div><div class='del'>-		ICP_QAT_FW_COMP_FLAGS_BUILD(ICP_QAT_FW_COMP_STATELESS_SESSION,</div><div class='del'>-					    ICP_QAT_FW_COMP_AUTO_SELECT_BEST,</div><div class='del'>-					    ICP_QAT_FW_COMP_NOT_ENH_AUTO_SELECT_BEST,</div><div class='del'>-					    ICP_QAT_FW_COMP_NOT_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST,</div><div class='del'>-					    ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF);</div><div class='del'>-	hw_comp_lower_csr.skip_ctrl = ICP_QAT_HW_COMP_20_BYTE_SKIP_3BYTE_LITERAL;</div><div class='del'>-	hw_comp_lower_csr.algo = ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_ILZ77;</div><div class='del'>-	hw_comp_lower_csr.lllbd = ICP_QAT_HW_COMP_20_LLLBD_CTRL_LLLBD_ENABLED;</div><div class='del'>-	hw_comp_lower_csr.sd = ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_1;</div><div class='del'>-	hw_comp_lower_csr.hash_update = ICP_QAT_HW_COMP_20_SKIP_HASH_UPDATE_DONT_ALLOW;</div><div class='del'>-	hw_comp_lower_csr.edmm = ICP_QAT_HW_COMP_20_EXTENDED_DELAY_MATCH_MODE_EDMM_ENABLED;</div><div class='del'>-	hw_comp_upper_csr.nice = ICP_QAT_HW_COMP_20_CONFIG_CSR_NICE_PARAM_DEFAULT_VAL;</div><div class='del'>-	hw_comp_upper_csr.lazy = ICP_QAT_HW_COMP_20_CONFIG_CSR_LAZY_PARAM_DEFAULT_VAL;</div><div class='del'>-</div><div class='del'>-	upper_val = ICP_QAT_FW_COMP_20_BUILD_CONFIG_UPPER(hw_comp_upper_csr);</div><div class='del'>-	lower_val = ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER(hw_comp_lower_csr);</div><div class='del'>-</div><div class='del'>-	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] = lower_val;</div><div class='del'>-	cd_pars-&gt;u.sl.comp_slice_cfg_word[1] = upper_val;</div><div class='del'>-</div><div class='del'>-	req_pars-&gt;crc.legacy.initial_adler = COMP_CPR_INITIAL_ADLER;</div><div class='del'>-	req_pars-&gt;crc.legacy.initial_crc32 = COMP_CPR_INITIAL_CRC;</div><div class='del'>-	req_pars-&gt;req_par_flags =</div><div class='del'>-		ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD(ICP_QAT_FW_COMP_SOP,</div><div class='del'>-						      ICP_QAT_FW_COMP_EOP,</div><div class='del'>-						      ICP_QAT_FW_COMP_BFINAL,</div><div class='del'>-						      ICP_QAT_FW_COMP_CNV,</div><div class='del'>-						      ICP_QAT_FW_COMP_CNV_RECOVERY,</div><div class='del'>-						      ICP_QAT_FW_COMP_NO_CNV_DFX,</div><div class='del'>-						      ICP_QAT_FW_COMP_CRC_MODE_LEGACY,</div><div class='del'>-						      ICP_QAT_FW_COMP_NO_XXHASH_ACC,</div><div class='del'>-						      ICP_QAT_FW_COMP_CNV_ERROR_NONE,</div><div class='del'>-						      ICP_QAT_FW_COMP_NO_APPEND_CRC,</div><div class='del'>-						      ICP_QAT_FW_COMP_NO_DROP_DATA);</div><div class='del'>-</div><div class='del'>-	/* Fill second half of the template for decompression */</div><div class='del'>-	memcpy(req_tmpl + 1, req_tmpl, sizeof(*req_tmpl));</div><div class='del'>-	req_tmpl++;</div><div class='del'>-	header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='del'>-	header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_DECOMPRESS;</div><div class='del'>-	cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='del'>-</div><div class='del'>-	hw_decomp_lower_csr.algo = ICP_QAT_HW_DECOMP_20_HW_DECOMP_FORMAT_DEFLATE;</div><div class='del'>-	lower_val = ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_LOWER(hw_decomp_lower_csr);</div><div class='del'>-</div><div class='del'>-	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] = lower_val;</div><div class='del'>-	cd_pars-&gt;u.sl.comp_slice_cfg_word[1] = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void adf_gen4_init_dc_ops(struct adf_dc_ops *dc_ops)</div><div class='del'>-{</div><div class='del'>-	dc_ops-&gt;build_deflate_ctx = qat_comp_build_deflate;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(adf_gen4_init_dc_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.h<br/>deleted file mode 100644<br/>index 0b1a6774412e..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_dc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_dc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='del'>-/* Copyright(c) 2022 Intel Corporation */</div><div class='del'>-#ifndef ADF_GEN4_DC_H</div><div class='del'>-#define ADF_GEN4_DC_H</div><div class='del'>-</div><div class='del'>-#include "adf_accel_devices.h"</div><div class='del'>-</div><div class='del'>-void adf_gen4_init_dc_ops(struct adf_dc_ops *dc_ops);</div><div class='del'>-</div><div class='del'>-#endif /* ADF_GEN4_DC_H */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c<br/>index 099949a2421c..0406cb09c5bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c</a></div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> #include "adf_fw_config.h"</div><div class='ctx'> #include "adf_gen4_hw_data.h"</div><div class='ctx'> #include "adf_gen4_pm.h"</div><div class='add'>+#include "icp_qat_fw_comp.h"</div><div class='add'>+#include "icp_qat_hw_20_comp.h"</div><div class='ctx'> </div><div class='ctx'> u32 adf_gen4_get_accel_mask(struct adf_hw_device_data *self)</div><div class='ctx'> {</div><div class='hunk'>@@ -663,3 +665,71 @@ int adf_gen4_bank_state_restore(struct adf_accel_dev *accel_dev, u32 bank_number</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(adf_gen4_bank_state_restore);</div><div class='add'>+</div><div class='add'>+static int adf_gen4_build_comp_block(void *ctx, enum adf_dc_algo algo)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_fw_comp_req *req_tmpl = ctx;</div><div class='add'>+	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='add'>+	struct icp_qat_hw_comp_20_config_csr_upper hw_comp_upper_csr = { };</div><div class='add'>+	struct icp_qat_hw_comp_20_config_csr_lower hw_comp_lower_csr = { };</div><div class='add'>+	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='add'>+	u32 upper_val;</div><div class='add'>+	u32 lower_val;</div><div class='add'>+</div><div class='add'>+	switch (algo) {</div><div class='add'>+	case QAT_DEFLATE:</div><div class='add'>+		header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_DYNAMIC;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_comp_lower_csr.skip_ctrl = ICP_QAT_HW_COMP_20_BYTE_SKIP_3BYTE_LITERAL;</div><div class='add'>+	hw_comp_lower_csr.algo = ICP_QAT_HW_COMP_20_HW_COMP_FORMAT_ILZ77;</div><div class='add'>+	hw_comp_lower_csr.lllbd = ICP_QAT_HW_COMP_20_LLLBD_CTRL_LLLBD_ENABLED;</div><div class='add'>+	hw_comp_lower_csr.sd = ICP_QAT_HW_COMP_20_SEARCH_DEPTH_LEVEL_1;</div><div class='add'>+	hw_comp_lower_csr.hash_update = ICP_QAT_HW_COMP_20_SKIP_HASH_UPDATE_DONT_ALLOW;</div><div class='add'>+	hw_comp_lower_csr.edmm = ICP_QAT_HW_COMP_20_EXTENDED_DELAY_MATCH_MODE_EDMM_ENABLED;</div><div class='add'>+	hw_comp_upper_csr.nice = ICP_QAT_HW_COMP_20_CONFIG_CSR_NICE_PARAM_DEFAULT_VAL;</div><div class='add'>+	hw_comp_upper_csr.lazy = ICP_QAT_HW_COMP_20_CONFIG_CSR_LAZY_PARAM_DEFAULT_VAL;</div><div class='add'>+</div><div class='add'>+	upper_val = ICP_QAT_FW_COMP_20_BUILD_CONFIG_UPPER(hw_comp_upper_csr);</div><div class='add'>+	lower_val = ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER(hw_comp_lower_csr);</div><div class='add'>+</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] = lower_val;</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[1] = upper_val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adf_gen4_build_decomp_block(void *ctx, enum adf_dc_algo algo)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_fw_comp_req *req_tmpl = ctx;</div><div class='add'>+	struct icp_qat_hw_decomp_20_config_csr_lower hw_decomp_lower_csr = { };</div><div class='add'>+	struct icp_qat_fw_comp_req_hdr_cd_pars *cd_pars = &amp;req_tmpl-&gt;cd_pars;</div><div class='add'>+	struct icp_qat_fw_comn_req_hdr *header = &amp;req_tmpl-&gt;comn_hdr;</div><div class='add'>+	u32 lower_val;</div><div class='add'>+</div><div class='add'>+	switch (algo) {</div><div class='add'>+	case QAT_DEFLATE:</div><div class='add'>+		header-&gt;service_cmd_id = ICP_QAT_FW_COMP_CMD_DECOMPRESS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_decomp_lower_csr.algo = ICP_QAT_HW_DECOMP_20_HW_DECOMP_FORMAT_DEFLATE;</div><div class='add'>+	lower_val = ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_LOWER(hw_decomp_lower_csr);</div><div class='add'>+</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[0] = lower_val;</div><div class='add'>+	cd_pars-&gt;u.sl.comp_slice_cfg_word[1] = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_gen4_init_dc_ops(struct adf_dc_ops *dc_ops)</div><div class='add'>+{</div><div class='add'>+	dc_ops-&gt;build_comp_block = adf_gen4_build_comp_block;</div><div class='add'>+	dc_ops-&gt;build_decomp_block = adf_gen4_build_decomp_block;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen4_init_dc_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h<br/>index 51fc2eaa263e..e4f4d5fa616d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='ctx'> #include "adf_cfg_common.h"</div><div class='add'>+#include "adf_dc.h"</div><div class='ctx'> </div><div class='ctx'> /* PCIe configuration space */</div><div class='ctx'> #define ADF_GEN4_BAR_MASK	(BIT(0) | BIT(2) | BIT(4))</div><div class='hunk'>@@ -180,5 +181,6 @@ int adf_gen4_bank_state_save(struct adf_accel_dev *accel_dev, u32 bank_number,</div><div class='ctx'> int adf_gen4_bank_state_restore(struct adf_accel_dev *accel_dev,</div><div class='ctx'> 				u32 bank_number, struct bank_state *state);</div><div class='ctx'> bool adf_gen4_services_supported(unsigned long service_mask);</div><div class='add'>+void adf_gen4_init_dc_ops(struct adf_dc_ops *dc_ops);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h<br/>index 17d1b774d4a8..2c8708117f70 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #define ADF_GEN4_PFVF_H</div><div class='ctx'> </div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='add'>+#include "adf_common_drv.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> void adf_gen4_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen6_pm.h b/drivers/crypto/intel/qat/qat_common/adf_gen6_pm.h<br/>new file mode 100644<br/>index 000000000000..9a5b995f7ada<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen6_pm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen6_pm.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef ADF_GEN6_PM_H</div><div class='add'>+#define ADF_GEN6_PM_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+</div><div class='add'>+struct adf_accel_dev;</div><div class='add'>+</div><div class='add'>+/* Power management */</div><div class='add'>+#define ADF_GEN6_PM_POLL_DELAY_US	20</div><div class='add'>+#define ADF_GEN6_PM_POLL_TIMEOUT_US	USEC_PER_SEC</div><div class='add'>+#define ADF_GEN6_PM_STATUS		0x50A00C</div><div class='add'>+#define ADF_GEN6_PM_INTERRUPT		0x50A028</div><div class='add'>+</div><div class='add'>+/* Power management source in ERRSOU2 and ERRMSK2 */</div><div class='add'>+#define ADF_GEN6_PM_SOU			BIT(18)</div><div class='add'>+</div><div class='add'>+/* cpm_pm_interrupt bitfields */</div><div class='add'>+#define ADF_GEN6_PM_DRV_ACTIVE		BIT(20)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_PM_DEFAULT_IDLE_FILTER	0x6</div><div class='add'>+</div><div class='add'>+/* cpm_pm_status bitfields */</div><div class='add'>+#define ADF_GEN6_PM_INIT_STATE			BIT(21)</div><div class='add'>+</div><div class='add'>+#endif /* ADF_GEN6_PM_H */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c b/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c<br/>new file mode 100644<br/>index 000000000000..967253082a98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c</a></div><div class='hunk'>@@ -0,0 +1,818 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "adf_common_drv.h"</div><div class='add'>+#include "adf_gen6_ras.h"</div><div class='add'>+#include "adf_sysfs_ras_counters.h"</div><div class='add'>+</div><div class='add'>+static void enable_errsou_reporting(void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	/* Enable correctable error reporting in ERRSOU0 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK0, 0);</div><div class='add'>+</div><div class='add'>+	/* Enable uncorrectable error reporting in ERRSOU1 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK1, 0);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Enable uncorrectable error reporting in ERRSOU2</div><div class='add'>+	 * but disable PM interrupt by default</div><div class='add'>+	 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK2, ADF_GEN6_ERRSOU2_PM_INT_BIT);</div><div class='add'>+</div><div class='add'>+	/* Enable uncorrectable error reporting in ERRSOU3 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK3, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_ae_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 ae_mask = GET_HW_DATA(accel_dev)-&gt;ae_mask;</div><div class='add'>+</div><div class='add'>+	/* Enable acceleration engine correctable error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_HIAECORERRLOGENABLE_CPP0, ae_mask);</div><div class='add'>+</div><div class='add'>+	/* Enable acceleration engine uncorrectable error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_HIAEUNCERRLOGENABLE_CPP0, ae_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_cpp_error_reporting(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	/* Enable HI CPP agents command parity error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_HICPPAGENTCMDPARERRLOGENABLE,</div><div class='add'>+		   ADF_6XXX_HICPPAGENTCMDPARERRLOG_MASK);</div><div class='add'>+</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_CPP_CFC_ERR_CTRL, ADF_GEN6_CPP_CFC_ERR_CTRL_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_ti_ri_error_reporting(void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 reg, mask;</div><div class='add'>+</div><div class='add'>+	/* Enable RI memory error reporting */</div><div class='add'>+	mask = ADF_GEN6_RIMEM_PARERR_FATAL_MASK | ADF_GEN6_RIMEM_PARERR_CERR_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_RI_MEM_PAR_ERR_EN0, mask);</div><div class='add'>+</div><div class='add'>+	/* Enable IOSF primary command parity error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_RIMISCCTL, ADF_GEN6_RIMISCSTS_BIT);</div><div class='add'>+</div><div class='add'>+	/* Enable TI internal memory parity error reporting */</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TI_CI_PAR_ERR_MASK);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_TI_CI_PAR_STS_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_CI_PAR_ERR_MASK, reg);</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TI_PULL0FUB_PAR_ERR_MASK);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_TI_PULL0FUB_PAR_STS_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_PULL0FUB_PAR_ERR_MASK, reg);</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TI_PUSHFUB_PAR_ERR_MASK);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_TI_PUSHFUB_PAR_STS_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_PUSHFUB_PAR_ERR_MASK, reg);</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TI_CD_PAR_ERR_MASK);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_TI_CD_PAR_STS_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_CD_PAR_ERR_MASK, reg);</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TI_TRNSB_PAR_ERR_MASK);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_TI_TRNSB_PAR_STS_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_TRNSB_PAR_ERR_MASK, reg);</div><div class='add'>+</div><div class='add'>+	/* Enable error handling in RI, TI CPP interface control registers */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_RICPPINTCTL, ADF_GEN6_RICPPINTCTL_MASK);</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TICPPINTCTL, ADF_GEN6_TICPPINTCTL_MASK);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Enable error detection and reporting in TIMISCSTS</div><div class='add'>+	 * with bits 1, 2 and 30 value preserved</div><div class='add'>+	 */</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TIMISCCTL);</div><div class='add'>+	reg &amp;= ADF_GEN6_TIMSCCTL_RELAY_MASK;</div><div class='add'>+	reg |= ADF_GEN6_TIMISCCTL_BIT;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TIMISCCTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_ssm_error_reporting(struct adf_accel_dev *accel_dev,</div><div class='add'>+				       void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	/* Enable SSM interrupts */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_INTMASKSSM, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_enable_ras(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *csr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+</div><div class='add'>+	enable_errsou_reporting(csr);</div><div class='add'>+	enable_ae_error_reporting(accel_dev, csr);</div><div class='add'>+	enable_cpp_error_reporting(accel_dev, csr);</div><div class='add'>+	enable_ti_ri_error_reporting(csr);</div><div class='add'>+	enable_ssm_error_reporting(accel_dev, csr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_errsou_reporting(void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Disable correctable error reporting in ERRSOU0 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK0, ADF_GEN6_ERRSOU0_MASK);</div><div class='add'>+</div><div class='add'>+	/* Disable uncorrectable error reporting in ERRSOU1 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK1, ADF_GEN6_ERRMSK1_MASK);</div><div class='add'>+</div><div class='add'>+	/* Disable uncorrectable error reporting in ERRSOU2 */</div><div class='add'>+	val = ADF_CSR_RD(csr, ADF_GEN6_ERRMSK2);</div><div class='add'>+	val |= ADF_GEN6_ERRSOU2_DIS_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK2, val);</div><div class='add'>+</div><div class='add'>+	/* Disable uncorrectable error reporting in ERRSOU3 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_ERRMSK3, ADF_GEN6_ERRSOU3_DIS_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_ae_error_reporting(void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	/* Disable acceleration engine correctable error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_HIAECORERRLOGENABLE_CPP0, 0);</div><div class='add'>+</div><div class='add'>+	/* Disable acceleration engine uncorrectable error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_HIAEUNCERRLOGENABLE_CPP0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_cpp_error_reporting(void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	/* Disable HI CPP agents command parity error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_HICPPAGENTCMDPARERRLOGENABLE, 0);</div><div class='add'>+</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_CPP_CFC_ERR_CTRL, ADF_GEN6_CPP_CFC_ERR_CTRL_DIS_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_ti_ri_error_reporting(void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* Disable RI memory error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_RI_MEM_PAR_ERR_EN0, 0);</div><div class='add'>+</div><div class='add'>+	/* Disable IOSF primary command parity error reporting */</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_RIMISCCTL);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_RIMISCSTS_BIT;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_RIMISCCTL, reg);</div><div class='add'>+</div><div class='add'>+	/* Disable TI internal memory parity error reporting */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_CI_PAR_ERR_MASK, ADF_GEN6_TI_CI_PAR_STS_MASK);</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_PULL0FUB_PAR_ERR_MASK, ADF_GEN6_TI_PULL0FUB_PAR_STS_MASK);</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_PUSHFUB_PAR_ERR_MASK, ADF_GEN6_TI_PUSHFUB_PAR_STS_MASK);</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_CD_PAR_ERR_MASK, ADF_GEN6_TI_CD_PAR_STS_MASK);</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TI_TRNSB_PAR_ERR_MASK, ADF_GEN6_TI_TRNSB_PAR_STS_MASK);</div><div class='add'>+</div><div class='add'>+	/* Disable error handling in RI, TI CPP interface control registers */</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_RICPPINTCTL);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_RICPPINTCTL_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_RICPPINTCTL, reg);</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TICPPINTCTL);</div><div class='add'>+	reg &amp;= ~ADF_GEN6_TICPPINTCTL_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TICPPINTCTL, reg);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Disable error detection and reporting in TIMISCSTS</div><div class='add'>+	 * with bits 1, 2 and 30 value preserved</div><div class='add'>+	 */</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_TIMISCCTL);</div><div class='add'>+	reg &amp;= ADF_GEN6_TIMSCCTL_RELAY_MASK;</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_TIMISCCTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_ssm_error_reporting(void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	/* Disable SSM interrupts */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_INTMASKSSM, ADF_GEN6_INTMASKSSM_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_disable_ras(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *csr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+</div><div class='add'>+	disable_errsou_reporting(csr);</div><div class='add'>+	disable_ae_error_reporting(csr);</div><div class='add'>+	disable_cpp_error_reporting(csr);</div><div class='add'>+	disable_ti_ri_error_reporting(csr);</div><div class='add'>+	disable_ssm_error_reporting(csr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_process_errsou0(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 ae, errsou;</div><div class='add'>+</div><div class='add'>+	ae = ADF_CSR_RD(csr, ADF_GEN6_HIAECORERRLOG_CPP0);</div><div class='add'>+	ae &amp;= GET_HW_DATA(accel_dev)-&gt;ae_mask;</div><div class='add'>+</div><div class='add'>+	dev_warn(&amp;GET_DEV(accel_dev), "Correctable error detected: %#x\n", ae);</div><div class='add'>+</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_CORR);</div><div class='add'>+</div><div class='add'>+	/* Clear interrupt from ERRSOU0 */</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_HIAECORERRLOG_CPP0, ae);</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU0);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU0_MASK)</div><div class='add'>+		dev_warn(&amp;GET_DEV(accel_dev), "errsou0 still set: %#x\n", errsou);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_cpp_ae_unc(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				  u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 ae;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU1_CPP0_MEUNC_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ae = ADF_CSR_RD(csr, ADF_GEN6_HIAEUNCERRLOG_CPP0);</div><div class='add'>+	ae &amp;= GET_HW_DATA(accel_dev)-&gt;ae_mask;</div><div class='add'>+	if (ae) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Uncorrectable error detected: %#x\n", ae);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_HIAEUNCERRLOG_CPP0, ae);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_cpp_cmd_par_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				       u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 cmd_par_err;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU1_CPP_CMDPARERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmd_par_err = ADF_CSR_RD(csr, ADF_GEN6_HICPPAGENTCMDPARERRLOG);</div><div class='add'>+	cmd_par_err &amp;= ADF_6XXX_HICPPAGENTCMDPARERRLOG_MASK;</div><div class='add'>+	if (cmd_par_err) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "HI CPP agent command parity error: %#x\n",</div><div class='add'>+			cmd_par_err);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_HICPPAGENTCMDPARERRLOG, cmd_par_err);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ri_mem_par_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				      u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 rimem_parerr_sts;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU1_RIMEM_PARERR_STS_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rimem_parerr_sts = ADF_CSR_RD(csr, ADF_GEN6_RIMEM_PARERR_STS);</div><div class='add'>+	rimem_parerr_sts &amp;= ADF_GEN6_RIMEM_PARERR_CERR_MASK |</div><div class='add'>+			    ADF_GEN6_RIMEM_PARERR_FATAL_MASK;</div><div class='add'>+	if (rimem_parerr_sts &amp; ADF_GEN6_RIMEM_PARERR_CERR_MASK) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "RI memory parity correctable error: %#x\n",</div><div class='add'>+			rimem_parerr_sts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_CORR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rimem_parerr_sts &amp; ADF_GEN6_RIMEM_PARERR_FATAL_MASK) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "RI memory parity fatal error: %#x\n",</div><div class='add'>+			rimem_parerr_sts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_RIMEM_PARERR_STS, rimem_parerr_sts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ti_ci_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 ti_ci_par_sts;</div><div class='add'>+</div><div class='add'>+	ti_ci_par_sts = ADF_CSR_RD(csr, ADF_GEN6_TI_CI_PAR_STS);</div><div class='add'>+	ti_ci_par_sts &amp;= ADF_GEN6_TI_CI_PAR_STS_MASK;</div><div class='add'>+	if (ti_ci_par_sts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "TI memory parity error: %#x\n", ti_ci_par_sts);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_TI_CI_PAR_STS, ti_ci_par_sts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ti_pullfub_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 ti_pullfub_par_sts;</div><div class='add'>+</div><div class='add'>+	ti_pullfub_par_sts = ADF_CSR_RD(csr, ADF_GEN6_TI_PULL0FUB_PAR_STS);</div><div class='add'>+	ti_pullfub_par_sts &amp;= ADF_GEN6_TI_PULL0FUB_PAR_STS_MASK;</div><div class='add'>+	if (ti_pullfub_par_sts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "TI pull parity error: %#x\n", ti_pullfub_par_sts);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_TI_PULL0FUB_PAR_STS, ti_pullfub_par_sts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ti_pushfub_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 ti_pushfub_par_sts;</div><div class='add'>+</div><div class='add'>+	ti_pushfub_par_sts = ADF_CSR_RD(csr, ADF_GEN6_TI_PUSHFUB_PAR_STS);</div><div class='add'>+	ti_pushfub_par_sts &amp;= ADF_GEN6_TI_PUSHFUB_PAR_STS_MASK;</div><div class='add'>+	if (ti_pushfub_par_sts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "TI push parity error: %#x\n", ti_pushfub_par_sts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_TI_PUSHFUB_PAR_STS, ti_pushfub_par_sts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ti_cd_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 ti_cd_par_sts;</div><div class='add'>+</div><div class='add'>+	ti_cd_par_sts = ADF_CSR_RD(csr, ADF_GEN6_TI_CD_PAR_STS);</div><div class='add'>+	ti_cd_par_sts &amp;= ADF_GEN6_TI_CD_PAR_STS_MASK;</div><div class='add'>+	if (ti_cd_par_sts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "TI CD parity error: %#x\n", ti_cd_par_sts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_TI_CD_PAR_STS, ti_cd_par_sts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ti_trnsb_par_sts(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 ti_trnsb_par_sts;</div><div class='add'>+</div><div class='add'>+	ti_trnsb_par_sts = ADF_CSR_RD(csr, ADF_GEN6_TI_TRNSB_PAR_STS);</div><div class='add'>+	ti_trnsb_par_sts &amp;= ADF_GEN6_TI_TRNSB_PAR_STS_MASK;</div><div class='add'>+	if (ti_trnsb_par_sts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "TI TRNSB parity error: %#x\n", ti_trnsb_par_sts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_TI_TRNSB_PAR_STS, ti_trnsb_par_sts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_iosfp_cmd_parerr(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 rimiscsts;</div><div class='add'>+</div><div class='add'>+	rimiscsts = ADF_CSR_RD(csr, ADF_GEN6_RIMISCSTS);</div><div class='add'>+	rimiscsts &amp;= ADF_GEN6_RIMISCSTS_BIT;</div><div class='add'>+	if (rimiscsts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Command parity error detected on IOSFP: %#x\n",</div><div class='add'>+			rimiscsts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_RIMISCSTS, rimiscsts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ti_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+			      u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU1_TIMEM_PARERR_STS_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	adf_handle_ti_ci_par_sts(accel_dev, csr);</div><div class='add'>+	adf_handle_ti_pullfub_par_sts(accel_dev, csr);</div><div class='add'>+	adf_handle_ti_pushfub_par_sts(accel_dev, csr);</div><div class='add'>+	adf_handle_ti_cd_par_sts(accel_dev, csr);</div><div class='add'>+	adf_handle_ti_trnsb_par_sts(accel_dev, csr);</div><div class='add'>+	adf_handle_iosfp_cmd_parerr(accel_dev, csr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_sfi_cmd_parerr(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				      u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU1_SFICMD_PARERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+		"Command parity error detected on streaming fabric interface\n");</div><div class='add'>+</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_process_errsou1(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				     u32 errsou)</div><div class='add'>+{</div><div class='add'>+	adf_handle_cpp_ae_unc(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_cpp_cmd_par_err(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_ri_mem_par_err(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_ti_err(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_sfi_cmd_parerr(accel_dev, csr, errsou);</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU1);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU1_MASK)</div><div class='add'>+		dev_warn(&amp;GET_DEV(accel_dev), "errsou1 still set: %#x\n", errsou);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_cerrssmsh(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_CERRSSMSH);</div><div class='add'>+	reg &amp;= ADF_GEN6_CERRSSMSH_ERROR_BIT;</div><div class='add'>+	if (reg) {</div><div class='add'>+		dev_warn(&amp;GET_DEV(accel_dev),</div><div class='add'>+			 "Correctable error on ssm shared memory: %#x\n", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_CORR);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_CERRSSMSH, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_uerrssmsh(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				 u32 iastatssm)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(iastatssm &amp; ADF_GEN6_IAINTSTATSSM_SH_ERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_UERRSSMSH);</div><div class='add'>+	reg &amp;= ADF_GEN6_UERRSSMSH_MASK;</div><div class='add'>+	if (reg) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Fatal error on ssm shared memory: %#x\n", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_UERRSSMSH, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_pperr_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				 u32 iastatssm)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(iastatssm &amp; ADF_GEN6_IAINTSTATSSM_PPERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_PPERR);</div><div class='add'>+	reg &amp;= ADF_GEN6_PPERR_MASK;</div><div class='add'>+	if (reg) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Fatal push or pull data error: %#x\n", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_PPERR, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_scmpar_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				  u32 iastatssm)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(iastatssm &amp; ADF_GEN6_IAINTSTATSSM_SCMPAR_ERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_SSM_FERR_STATUS);</div><div class='add'>+	reg &amp;= ADF_GEN6_SCM_PAR_ERR_MASK;</div><div class='add'>+	if (reg) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Fatal error on SCM: %#x\n", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_SSM_FERR_STATUS, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_cpppar_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				  u32 iastatssm)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(iastatssm &amp; ADF_GEN6_IAINTSTATSSM_CPPPAR_ERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_SSM_FERR_STATUS);</div><div class='add'>+	reg &amp;= ADF_GEN6_CPP_PAR_ERR_MASK;</div><div class='add'>+	if (reg) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Fatal error on CPP: %#x\n", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_SSM_FERR_STATUS, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_rfpar_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				 u32 iastatssm)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(iastatssm &amp; ADF_GEN6_IAINTSTATSSM_RFPAR_ERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_SSM_FERR_STATUS);</div><div class='add'>+	reg &amp;= ADF_GEN6_RF_PAR_ERR_MASK;</div><div class='add'>+	if (reg) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Fatal error on RF Parity: %#x\n", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_SSM_FERR_STATUS, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_unexp_cpl_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				     u32 iastatssm)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(iastatssm &amp; ADF_GEN6_IAINTSTATSSM_UNEXP_CPL_ERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_SSM_FERR_STATUS);</div><div class='add'>+	reg &amp;= ADF_GEN6_UNEXP_CPL_ERR_MASK;</div><div class='add'>+	if (reg) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+			"Fatal error for AXI unexpected tag/length: %#x\n", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_SSM_FERR_STATUS, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_iaintstatssm(struct adf_accel_dev *accel_dev, void __iomem *csr)</div><div class='add'>+{</div><div class='add'>+	u32 iastatssm = ADF_CSR_RD(csr, ADF_GEN6_IAINTSTATSSM);</div><div class='add'>+</div><div class='add'>+	iastatssm &amp;= ADF_GEN6_IAINTSTATSSM_MASK;</div><div class='add'>+	if (!iastatssm)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	adf_handle_uerrssmsh(accel_dev, csr, iastatssm);</div><div class='add'>+	adf_handle_pperr_err(accel_dev, csr, iastatssm);</div><div class='add'>+	adf_handle_scmpar_err(accel_dev, csr, iastatssm);</div><div class='add'>+	adf_handle_cpppar_err(accel_dev, csr, iastatssm);</div><div class='add'>+	adf_handle_rfpar_err(accel_dev, csr, iastatssm);</div><div class='add'>+	adf_handle_unexp_cpl_err(accel_dev, csr, iastatssm);</div><div class='add'>+</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_IAINTSTATSSM, iastatssm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ssm(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU2_SSM_ERR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	adf_handle_cerrssmsh(accel_dev, csr);</div><div class='add'>+	adf_handle_iaintstatssm(accel_dev, csr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_cpp_cfc_err(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				   u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU2_CPP_CFC_ERR_STATUS_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = ADF_CSR_RD(csr, ADF_GEN6_CPP_CFC_ERR_STATUS);</div><div class='add'>+	if (reg &amp; ADF_GEN6_CPP_CFC_ERR_STATUS_DATAPAR_BIT) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "CPP_CFC_ERR: data parity: %#x", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; ADF_GEN6_CPP_CFC_ERR_STATUS_CMDPAR_BIT) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "CPP_CFC_ERR: command parity: %#x", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; ADF_GEN6_CPP_CFC_FATAL_ERR_BIT) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "CPP_CFC_ERR: errors: %#x", reg);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ADF_CSR_WR(csr, ADF_GEN6_CPP_CFC_ERR_STATUS_CLR,</div><div class='add'>+		   ADF_GEN6_CPP_CFC_ERR_STATUS_CLR_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_process_errsou2(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				     u32 errsou)</div><div class='add'>+{</div><div class='add'>+	adf_handle_ssm(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_cpp_cfc_err(accel_dev, csr, errsou);</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU2);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU2_MASK)</div><div class='add'>+		dev_warn(&amp;GET_DEV(accel_dev), "errsou2 still set: %#x\n", errsou);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_timiscsts(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				 u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 timiscsts;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_TIMISCSTS_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	timiscsts = ADF_CSR_RD(csr, ADF_GEN6_TIMISCSTS);</div><div class='add'>+	if (timiscsts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Fatal error in transmit interface: %#x\n",</div><div class='add'>+			timiscsts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ricppintsts(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				   u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 ricppintsts;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_RICPPINTSTS_MASK))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ricppintsts = ADF_CSR_RD(csr, ADF_GEN6_RICPPINTSTS);</div><div class='add'>+	ricppintsts &amp;= ADF_GEN6_RICPPINTSTS_MASK;</div><div class='add'>+	if (ricppintsts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "RI push pull error: %#x\n", ricppintsts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_RICPPINTSTS, ricppintsts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ticppintsts(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				   u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 ticppintsts;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_TICPPINTSTS_MASK))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ticppintsts = ADF_CSR_RD(csr, ADF_GEN6_TICPPINTSTS);</div><div class='add'>+	ticppintsts &amp;= ADF_GEN6_TICPPINTSTS_MASK;</div><div class='add'>+	if (ticppintsts) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "TI push pull error: %#x\n", ticppintsts);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_TICPPINTSTS, ticppintsts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_atufaultstatus(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				      u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 max_rp_num = GET_HW_DATA(accel_dev)-&gt;num_banks;</div><div class='add'>+	u32 atufaultstatus;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_ATUFAULTSTATUS_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_rp_num; i++) {</div><div class='add'>+		atufaultstatus = ADF_CSR_RD(csr, ADF_GEN6_ATUFAULTSTATUS(i));</div><div class='add'>+</div><div class='add'>+		atufaultstatus &amp;= ADF_GEN6_ATUFAULTSTATUS_BIT;</div><div class='add'>+		if (atufaultstatus) {</div><div class='add'>+			dev_err(&amp;GET_DEV(accel_dev), "Ring pair (%u) ATU detected fault: %#x\n", i,</div><div class='add'>+				atufaultstatus);</div><div class='add'>+			ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+			ADF_CSR_WR(csr, ADF_GEN6_ATUFAULTSTATUS(i), atufaultstatus);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_rlterror(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				u32 errsou)</div><div class='add'>+{</div><div class='add'>+	u32 rlterror;</div><div class='add'>+</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_RLTERROR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rlterror = ADF_CSR_RD(csr, ADF_GEN6_RLT_ERRLOG);</div><div class='add'>+	rlterror &amp;= ADF_GEN6_RLT_ERRLOG_MASK;</div><div class='add'>+	if (rlterror) {</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Error in rate limiting block: %#x\n", rlterror);</div><div class='add'>+		ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+		ADF_CSR_WR(csr, ADF_GEN6_RLT_ERRLOG, rlterror);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_vflr(struct adf_accel_dev *accel_dev, void __iomem *csr, u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_VFLRNOTIFY_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;GET_DEV(accel_dev), "Uncorrectable error in VF\n");</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_UNCORR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_tc_vc_map_error(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				       u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_TC_VC_MAP_ERROR_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;GET_DEV(accel_dev), "Violation of PCIe TC VC mapping\n");</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_pcie_devhalt(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				    u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_PCIE_DEVHALT_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+		"DEVHALT due to an error in an incoming transaction\n");</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_pg_req_devhalt(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				      u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_PG_REQ_DEVHALT_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;GET_DEV(accel_dev),</div><div class='add'>+		"Error due to response failure in response to a page request\n");</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_xlt_cpl_devhalt(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				       u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_XLT_CPL_DEVHALT_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;GET_DEV(accel_dev), "Error status for a address translation request\n");</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_handle_ti_int_err_devhalt(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+					  u32 errsou)</div><div class='add'>+{</div><div class='add'>+	if (!(errsou &amp; ADF_GEN6_ERRSOU3_TI_INT_ERR_DEVHALT_BIT))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_err(&amp;GET_DEV(accel_dev), "DEVHALT due to a TI internal memory error\n");</div><div class='add'>+	ADF_RAS_ERR_CTR_INC(accel_dev-&gt;ras_errors, ADF_RAS_FATAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_process_errsou3(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				     u32 errsou)</div><div class='add'>+{</div><div class='add'>+	adf_handle_timiscsts(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_ricppintsts(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_ticppintsts(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_atufaultstatus(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_rlterror(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_vflr(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_tc_vc_map_error(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_pcie_devhalt(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_pg_req_devhalt(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_xlt_cpl_devhalt(accel_dev, csr, errsou);</div><div class='add'>+	adf_handle_ti_int_err_devhalt(accel_dev, csr, errsou);</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU3);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU3_MASK)</div><div class='add'>+		dev_warn(&amp;GET_DEV(accel_dev), "errsou3 still set: %#x\n", errsou);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adf_gen6_is_reset_required(struct adf_accel_dev *accel_dev, void __iomem *csr,</div><div class='add'>+				       bool *reset_required)</div><div class='add'>+{</div><div class='add'>+	u8 reset, dev_state;</div><div class='add'>+	u32 gensts;</div><div class='add'>+</div><div class='add'>+	gensts = ADF_CSR_RD(csr, ADF_GEN6_GENSTS);</div><div class='add'>+	dev_state = FIELD_GET(ADF_GEN6_GENSTS_DEVICE_STATE_MASK, gensts);</div><div class='add'>+	reset = FIELD_GET(ADF_GEN6_GENSTS_RESET_TYPE_MASK, gensts);</div><div class='add'>+	if (dev_state == ADF_GEN6_GENSTS_DEVHALT &amp;&amp; reset == ADF_GEN6_GENSTS_PFLR) {</div><div class='add'>+		*reset_required = true;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reset == ADF_GEN6_GENSTS_COLD_RESET)</div><div class='add'>+		dev_err(&amp;GET_DEV(accel_dev), "Fatal error, cold reset required\n");</div><div class='add'>+</div><div class='add'>+	*reset_required = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool adf_gen6_handle_interrupt(struct adf_accel_dev *accel_dev, bool *reset_required)</div><div class='add'>+{</div><div class='add'>+	void __iomem *csr = adf_get_pmisc_base(accel_dev);</div><div class='add'>+	bool handled = false;</div><div class='add'>+	u32 errsou;</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU0);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU0_MASK) {</div><div class='add'>+		adf_gen6_process_errsou0(accel_dev, csr);</div><div class='add'>+		handled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU1);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU1_MASK) {</div><div class='add'>+		adf_gen6_process_errsou1(accel_dev, csr, errsou);</div><div class='add'>+		handled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU2);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU2_MASK) {</div><div class='add'>+		adf_gen6_process_errsou2(accel_dev, csr, errsou);</div><div class='add'>+		handled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	errsou = ADF_CSR_RD(csr, ADF_GEN6_ERRSOU3);</div><div class='add'>+	if (errsou &amp; ADF_GEN6_ERRSOU3_MASK) {</div><div class='add'>+		adf_gen6_process_errsou3(accel_dev, csr, errsou);</div><div class='add'>+		handled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adf_gen6_is_reset_required(accel_dev, csr, reset_required);</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void adf_gen6_init_ras_ops(struct adf_ras_ops *ras_ops)</div><div class='add'>+{</div><div class='add'>+	ras_ops-&gt;enable_ras_errors = adf_gen6_enable_ras;</div><div class='add'>+	ras_ops-&gt;disable_ras_errors = adf_gen6_disable_ras;</div><div class='add'>+	ras_ops-&gt;handle_interrupt = adf_gen6_handle_interrupt;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen6_init_ras_ops);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.h b/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.h<br/>new file mode 100644<br/>index 000000000000..66ced271d173<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen6_ras.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen6_ras.h</a></div><div class='hunk'>@@ -0,0 +1,504 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef ADF_GEN6_RAS_H_</div><div class='add'>+#define ADF_GEN6_RAS_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+</div><div class='add'>+struct adf_ras_ops;</div><div class='add'>+</div><div class='add'>+/* Error source registers */</div><div class='add'>+#define ADF_GEN6_ERRSOU0	0x41A200</div><div class='add'>+#define ADF_GEN6_ERRSOU1	0x41A204</div><div class='add'>+#define ADF_GEN6_ERRSOU2	0x41A208</div><div class='add'>+#define ADF_GEN6_ERRSOU3	0x41A20C</div><div class='add'>+</div><div class='add'>+/* Error source mask registers */</div><div class='add'>+#define ADF_GEN6_ERRMSK0	0x41A210</div><div class='add'>+#define ADF_GEN6_ERRMSK1	0x41A214</div><div class='add'>+#define ADF_GEN6_ERRMSK2	0x41A218</div><div class='add'>+#define ADF_GEN6_ERRMSK3	0x41A21C</div><div class='add'>+</div><div class='add'>+/* ERRSOU0 Correctable error mask */</div><div class='add'>+#define ADF_GEN6_ERRSOU0_MASK				BIT(0)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRSOU1_CPP0_MEUNC_BIT			BIT(0)</div><div class='add'>+#define ADF_GEN6_ERRSOU1_CPP_CMDPARERR_BIT		BIT(1)</div><div class='add'>+#define ADF_GEN6_ERRSOU1_RIMEM_PARERR_STS_BIT		BIT(2)</div><div class='add'>+#define ADF_GEN6_ERRSOU1_TIMEM_PARERR_STS_BIT		BIT(3)</div><div class='add'>+#define ADF_GEN6_ERRSOU1_SFICMD_PARERR_BIT	        BIT(4)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRSOU1_MASK ( \</div><div class='add'>+	(ADF_GEN6_ERRSOU1_CPP0_MEUNC_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRSOU1_CPP_CMDPARERR_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRSOU1_RIMEM_PARERR_STS_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRSOU1_TIMEM_PARERR_STS_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRSOU1_SFICMD_PARERR_BIT))</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRMSK1_CPP0_MEUNC_BIT			BIT(0)</div><div class='add'>+#define ADF_GEN6_ERRMSK1_CPP_CMDPARERR_BIT		BIT(1)</div><div class='add'>+#define ADF_GEN6_ERRMSK1_RIMEM_PARERR_STS_BIT		BIT(2)</div><div class='add'>+#define ADF_GEN6_ERRMSK1_TIMEM_PARERR_STS_BIT		BIT(3)</div><div class='add'>+#define ADF_GEN6_ERRMSK1_IOSFCMD_PARERR_BIT	        BIT(4)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRMSK1_MASK ( \</div><div class='add'>+	(ADF_GEN6_ERRMSK1_CPP0_MEUNC_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRMSK1_CPP_CMDPARERR_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRMSK1_RIMEM_PARERR_STS_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRMSK1_TIMEM_PARERR_STS_BIT)	| \</div><div class='add'>+	(ADF_GEN6_ERRMSK1_IOSFCMD_PARERR_BIT))</div><div class='add'>+</div><div class='add'>+/* HI AE Uncorrectable error log */</div><div class='add'>+#define ADF_GEN6_HIAEUNCERRLOG_CPP0			0x41A300</div><div class='add'>+</div><div class='add'>+/* HI AE Uncorrectable error log enable */</div><div class='add'>+#define ADF_GEN6_HIAEUNCERRLOGENABLE_CPP0		0x41A320</div><div class='add'>+</div><div class='add'>+/* HI AE Correctable error log */</div><div class='add'>+#define ADF_GEN6_HIAECORERRLOG_CPP0			0x41A308</div><div class='add'>+</div><div class='add'>+/* HI AE Correctable error log enable */</div><div class='add'>+#define ADF_GEN6_HIAECORERRLOGENABLE_CPP0		0x41A318</div><div class='add'>+</div><div class='add'>+/* HI CPP Agent Command parity error log */</div><div class='add'>+#define ADF_GEN6_HICPPAGENTCMDPARERRLOG			0x41A310</div><div class='add'>+</div><div class='add'>+/* HI CPP Agent command parity error logging enable */</div><div class='add'>+#define ADF_GEN6_HICPPAGENTCMDPARERRLOGENABLE		0x41A314</div><div class='add'>+</div><div class='add'>+#define ADF_6XXX_HICPPAGENTCMDPARERRLOG_MASK		0x1B</div><div class='add'>+</div><div class='add'>+/* RI Memory parity error status register */</div><div class='add'>+#define ADF_GEN6_RIMEM_PARERR_STS			0x41B128</div><div class='add'>+</div><div class='add'>+/* RI Memory parity error reporting enable */</div><div class='add'>+#define ADF_GEN6_RI_MEM_PAR_ERR_EN0			0x41B12C</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RI Memory parity error mask</div><div class='add'>+ * BIT(4) - ri_tlq_phdr parity error</div><div class='add'>+ * BIT(5) - ri_tlq_pdata parity error</div><div class='add'>+ * BIT(6) - ri_tlq_nphdr parity error</div><div class='add'>+ * BIT(7) - ri_tlq_npdata parity error</div><div class='add'>+ * BIT(8) - ri_tlq_cplhdr parity error</div><div class='add'>+ * BIT(10) - BIT(13) - ri_tlq_cpldata[0:3] parity error</div><div class='add'>+ * BIT(19) - ri_cds_cmd_fifo parity error</div><div class='add'>+ * BIT(20) - ri_obc_ricpl_fifo parity error</div><div class='add'>+ * BIT(21) - ri_obc_tiricpl_fifo parity error</div><div class='add'>+ * BIT(22) - ri_obc_cppcpl_fifo parity error</div><div class='add'>+ * BIT(23) - ri_obc_pendcpl_fifo parity error</div><div class='add'>+ * BIT(24) - ri_cpp_cmd_fifo parity error</div><div class='add'>+ * BIT(25) - ri_cds_ticmd_fifo parity error</div><div class='add'>+ * BIT(26) - riti_cmd_fifo parity error</div><div class='add'>+ * BIT(27) - ri_int_msixtbl parity error</div><div class='add'>+ * BIT(28) - ri_int_imstbl parity error</div><div class='add'>+ * BIT(30) - ri_kpt_fuses parity error</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_RIMEM_PARERR_FATAL_MASK \</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(2) | BIT(4) | BIT(5) | BIT(6) | \</div><div class='add'>+	 BIT(7) | BIT(8) | BIT(18) | BIT(19) | BIT(20) | BIT(21) | \</div><div class='add'>+	 BIT(22) | BIT(23) | BIT(24) | BIT(25) | BIT(26) | BIT(27) | \</div><div class='add'>+	 BIT(28) | BIT(30))</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_RIMEM_PARERR_CERR_MASK \</div><div class='add'>+	(BIT(10) | BIT(11) | BIT(12) | BIT(13))</div><div class='add'>+</div><div class='add'>+/* TI CI parity status */</div><div class='add'>+#define ADF_GEN6_TI_CI_PAR_STS				0x50060C</div><div class='add'>+</div><div class='add'>+/* TI CI parity reporting mask */</div><div class='add'>+#define ADF_GEN6_TI_CI_PAR_ERR_MASK			0x500608</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TI CI parity status mask</div><div class='add'>+ * BIT(0) - CdCmdQ_sts patiry error status</div><div class='add'>+ * BIT(1) - CdDataQ_sts parity error status</div><div class='add'>+ * BIT(3) - CPP_SkidQ_sts parity error status</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TI_CI_PAR_STS_MASK \</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(3))</div><div class='add'>+</div><div class='add'>+/* TI PULLFUB parity status */</div><div class='add'>+#define ADF_GEN6_TI_PULL0FUB_PAR_STS			0x500618</div><div class='add'>+</div><div class='add'>+/* TI PULLFUB parity error reporting mask */</div><div class='add'>+#define ADF_GEN6_TI_PULL0FUB_PAR_ERR_MASK		0x500614</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TI PULLFUB parity status mask</div><div class='add'>+ * BIT(0) - TrnPullReqQ_sts parity status</div><div class='add'>+ * BIT(1) - TrnSharedDataQ_sts parity status</div><div class='add'>+ * BIT(2) - TrnPullReqDataQ_sts parity status</div><div class='add'>+ * BIT(4) - CPP_CiPullReqQ_sts parity status</div><div class='add'>+ * BIT(5) - CPP_TrnPullReqQ_sts parity status</div><div class='add'>+ * BIT(6) - CPP_PullidQ_sts parity status</div><div class='add'>+ * BIT(7) - CPP_WaitDataQ_sts parity status</div><div class='add'>+ * BIT(8) - CPP_CdDataQ_sts parity status</div><div class='add'>+ * BIT(9) - CPP_TrnDataQP0_sts parity status</div><div class='add'>+ * BIT(10) - BIT(11) - CPP_TrnDataQRF[00:01]_sts parity status</div><div class='add'>+ * BIT(12) - CPP_TrnDataQP1_sts parity status</div><div class='add'>+ * BIT(13) - BIT(14) - CPP_TrnDataQRF[10:11]_sts parity status</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TI_PULL0FUB_PAR_STS_MASK \</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(2) | BIT(4) | BIT(5) | BIT(6) | BIT(7) | \</div><div class='add'>+	 BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(12) | BIT(13) | BIT(14))</div><div class='add'>+</div><div class='add'>+/* TI PUSHUB parity status */</div><div class='add'>+#define ADF_GEN6_TI_PUSHFUB_PAR_STS			0x500630</div><div class='add'>+</div><div class='add'>+/* TI PUSHFUB parity error reporting mask */</div><div class='add'>+#define ADF_GEN6_TI_PUSHFUB_PAR_ERR_MASK		0x50062C</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TI PUSHUB parity status mask</div><div class='add'>+ * BIT(0) - SbPushReqQ_sts parity status</div><div class='add'>+ * BIT(1) - BIT(2) - SbPushDataQ[0:1]_sts parity status</div><div class='add'>+ * BIT(4) - CPP_CdPushReqQ_sts parity status</div><div class='add'>+ * BIT(5) - BIT(6) - CPP_CdPushDataQ[0:1]_sts parity status</div><div class='add'>+ * BIT(7) - CPP_SbPushReqQ_sts parity status</div><div class='add'>+ * BIT(8) - CPP_SbPushDataQP_sts parity status</div><div class='add'>+ * BIT(9) - BIT(10) - CPP_SbPushDataQRF[0:1]_sts parity status</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TI_PUSHFUB_PAR_STS_MASK \</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(2) | BIT(4) | BIT(5) | \</div><div class='add'>+	 BIT(6) | BIT(7) | BIT(8) | BIT(9) | BIT(10))</div><div class='add'>+</div><div class='add'>+/* TI CD parity status */</div><div class='add'>+#define ADF_GEN6_TI_CD_PAR_STS				0x50063C</div><div class='add'>+</div><div class='add'>+/* TI CD parity error mask */</div><div class='add'>+#define ADF_GEN6_TI_CD_PAR_ERR_MASK			0x500638</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TI CD parity status mask</div><div class='add'>+ * BIT(0) - BIT(15) - CtxMdRam[0:15]_sts parity status</div><div class='add'>+ * BIT(16) - Leaf2ClusterRam_sts parity status</div><div class='add'>+ * BIT(17) - BIT(18) - Ring2LeafRam[0:1]_sts parity status</div><div class='add'>+ * BIT(19) - VirtualQ_sts parity status</div><div class='add'>+ * BIT(20) - DtRdQ_sts parity status</div><div class='add'>+ * BIT(21) - DtWrQ_sts parity status</div><div class='add'>+ * BIT(22) - RiCmdQ_sts parity status</div><div class='add'>+ * BIT(23) - BypassQ_sts parity status</div><div class='add'>+ * BIT(24) - DtRdQ_sc_sts parity status</div><div class='add'>+ * BIT(25) - DtWrQ_sc_sts parity status</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TI_CD_PAR_STS_MASK \</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | \</div><div class='add'>+	 BIT(7) | BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(12) | BIT(13) | \</div><div class='add'>+	 BIT(14) | BIT(15) | BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) | \</div><div class='add'>+	 BIT(21) | BIT(22) | BIT(23) | BIT(24) | BIT(25))</div><div class='add'>+</div><div class='add'>+/* TI TRNSB parity status */</div><div class='add'>+#define ADF_GEN6_TI_TRNSB_PAR_STS			0x500648</div><div class='add'>+</div><div class='add'>+/* TI TRNSB parity error reporting mask */</div><div class='add'>+#define ADF_GEN6_TI_TRNSB_PAR_ERR_MASK			0x500644</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TI TRNSB parity status mask</div><div class='add'>+ * BIT(0) - TrnPHdrQP_sts parity status</div><div class='add'>+ * BIT(1) - TrnPHdrQRF_sts parity status</div><div class='add'>+ * BIT(2) - TrnPDataQP_sts parity status</div><div class='add'>+ * BIT(3) - BIT(6) - TrnPDataQRF[0:3]_sts parity status</div><div class='add'>+ * BIT(7) - TrnNpHdrQP_sts parity status</div><div class='add'>+ * BIT(8) - BIT(9) - TrnNpHdrQRF[0:1]_sts parity status</div><div class='add'>+ * BIT(10) - TrnCplHdrQ_sts parity status</div><div class='add'>+ * BIT(11) - TrnPutObsReqQ_sts parity status</div><div class='add'>+ * BIT(12) - TrnPushReqQ_sts parity status</div><div class='add'>+ * BIT(13) - SbSplitIdRam_sts parity status</div><div class='add'>+ * BIT(14) - SbReqCountQ_sts parity status</div><div class='add'>+ * BIT(15) - SbCplTrkRam_sts parity status</div><div class='add'>+ * BIT(16) - SbGetObsReqQ_sts parity status</div><div class='add'>+ * BIT(17) - SbEpochIdQ_sts parity status</div><div class='add'>+ * BIT(18) - SbAtCplHdrQ_sts parity status</div><div class='add'>+ * BIT(19) - SbAtCplDataQ_sts parity status</div><div class='add'>+ * BIT(20) - SbReqCountRam_sts parity status</div><div class='add'>+ * BIT(21) - SbAtCplHdrQ_sc_sts parity status</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TI_TRNSB_PAR_STS_MASK \</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | \</div><div class='add'>+	 BIT(7) | BIT(8) | BIT(9) | BIT(10) | BIT(11) | BIT(12) | \</div><div class='add'>+	 BIT(13) | BIT(14) | BIT(15) | BIT(16) | BIT(17) | BIT(18) | \</div><div class='add'>+	 BIT(19) | BIT(20) | BIT(21))</div><div class='add'>+</div><div class='add'>+/* Status register to log misc error on RI */</div><div class='add'>+#define ADF_GEN6_RIMISCSTS				0x41B1B8</div><div class='add'>+</div><div class='add'>+/* Status control register to log misc RI error */</div><div class='add'>+#define ADF_GEN6_RIMISCCTL				0x41B1BC</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ERRSOU2 bit mask</div><div class='add'>+ * BIT(0) - SSM Interrupt Mask</div><div class='add'>+ * BIT(1) - CFC on CPP. ORed of CFC Push error and Pull error</div><div class='add'>+ * BIT(2) - BIT(4) - CPP attention interrupts</div><div class='add'>+ * BIT(18) - PM interrupt</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_ERRSOU2_SSM_ERR_BIT			BIT(0)</div><div class='add'>+#define ADF_GEN6_ERRSOU2_CPP_CFC_ERR_STATUS_BIT	BIT(1)</div><div class='add'>+#define ADF_GEN6_ERRSOU2_CPP_CFC_ATT_INT_MASK \</div><div class='add'>+	(BIT(2) | BIT(3) | BIT(4))</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRSOU2_PM_INT_BIT			BIT(18)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRSOU2_MASK \</div><div class='add'>+	(ADF_GEN6_ERRSOU2_SSM_ERR_BIT | \</div><div class='add'>+	 ADF_GEN6_ERRSOU2_CPP_CFC_ERR_STATUS_BIT)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRSOU2_DIS_MASK \</div><div class='add'>+	(ADF_GEN6_ERRSOU2_SSM_ERR_BIT | \</div><div class='add'>+	 ADF_GEN6_ERRSOU2_CPP_CFC_ERR_STATUS_BIT | \</div><div class='add'>+	 ADF_GEN6_ERRSOU2_CPP_CFC_ATT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM				0x28</div><div class='add'>+</div><div class='add'>+/* IAINTSTATSSM error bit mask definitions */</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM_SH_ERR_BIT		BIT(0)</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM_PPERR_BIT			BIT(2)</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM_SCMPAR_ERR_BIT		BIT(4)</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM_CPPPAR_ERR_BIT		BIT(5)</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM_RFPAR_ERR_BIT		BIT(6)</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM_UNEXP_CPL_ERR_BIT		BIT(7)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_IAINTSTATSSM_MASK \</div><div class='add'>+	(ADF_GEN6_IAINTSTATSSM_SH_ERR_BIT | \</div><div class='add'>+	 ADF_GEN6_IAINTSTATSSM_PPERR_BIT | \</div><div class='add'>+	 ADF_GEN6_IAINTSTATSSM_SCMPAR_ERR_BIT | \</div><div class='add'>+	 ADF_GEN6_IAINTSTATSSM_CPPPAR_ERR_BIT | \</div><div class='add'>+	 ADF_GEN6_IAINTSTATSSM_RFPAR_ERR_BIT | \</div><div class='add'>+	 ADF_GEN6_IAINTSTATSSM_UNEXP_CPL_ERR_BIT)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_UERRSSMSH				0x18</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * UERRSSMSH error bit mask definitions</div><div class='add'>+ *</div><div class='add'>+ * BIT(0) - Indicates one uncorrectable error</div><div class='add'>+ * BIT(15) - Indicates multiple uncorrectable errors</div><div class='add'>+ *	     in device shared memory</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_UERRSSMSH_MASK			(BIT(0) | BIT(15))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CERRSSMSH error bit</div><div class='add'>+ * BIT(0) - Indicates one correctable error</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_CERRSSMSH_ERROR_BIT			(BIT(0) | BIT(15) | BIT(24))</div><div class='add'>+#define ADF_GEN6_CERRSSMSH				0x10</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_INTMASKSSM				0x0</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Error reporting mask in INTMASKSSM</div><div class='add'>+ * BIT(0) - Shared memory uncorrectable interrupt mask</div><div class='add'>+ * BIT(2) - PPERR interrupt mask</div><div class='add'>+ * BIT(4) - SCM parity error interrupt mask</div><div class='add'>+ * BIT(5) - CPP parity error interrupt mask</div><div class='add'>+ * BIT(6) - SHRAM RF parity error interrupt mask</div><div class='add'>+ * BIT(7) - AXI unexpected completion error mask</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_INTMASKSSM_MASK	\</div><div class='add'>+	(BIT(0) | BIT(2) | BIT(4) | BIT(5) | BIT(6) | BIT(7))</div><div class='add'>+</div><div class='add'>+/* CPP push or pull error */</div><div class='add'>+#define ADF_GEN6_PPERR					0x8</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_PPERR_MASK				(BIT(0) | BIT(1))</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * SSM_FERR_STATUS error bit mask definitions</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_SCM_PAR_ERR_MASK			BIT(5)</div><div class='add'>+#define ADF_GEN6_CPP_PAR_ERR_MASK			(BIT(0) | BIT(1) | BIT(2))</div><div class='add'>+#define ADF_GEN6_UNEXP_CPL_ERR_MASK			(BIT(3) | BIT(4) | BIT(10) | BIT(11))</div><div class='add'>+#define ADF_GEN6_RF_PAR_ERR_MASK			BIT(16)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_SSM_FERR_STATUS			0x9C</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_STATUS			0x640C04</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * BIT(0) - Indicates one or more CPP CFC errors</div><div class='add'>+ * BIT(1) - Indicates multiple CPP CFC errors</div><div class='add'>+ * BIT(7) - Indicates CPP CFC command parity error type</div><div class='add'>+ * BIT(8) - Indicates CPP CFC data parity error type</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_STATUS_ERR_BIT		BIT(0)</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_STATUS_MERR_BIT		BIT(1)</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_STATUS_CMDPAR_BIT		BIT(7)</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_STATUS_DATAPAR_BIT		BIT(8)</div><div class='add'>+#define ADF_GEN6_CPP_CFC_FATAL_ERR_BIT		\</div><div class='add'>+	(ADF_GEN6_CPP_CFC_ERR_STATUS_ERR_BIT |	\</div><div class='add'>+	 ADF_GEN6_CPP_CFC_ERR_STATUS_MERR_BIT)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * BIT(0) - Enables CFC to detect and log a push/pull data error</div><div class='add'>+ * BIT(1) - Enables CFC to generate interrupt to PCIEP for a CPP error</div><div class='add'>+ * BIT(4) - When 1 parity detection is disabled</div><div class='add'>+ * BIT(5) - When 1 parity detection is disabled on CPP command bus</div><div class='add'>+ * BIT(6) - When 1 parity detection is disabled on CPP push/pull bus</div><div class='add'>+ * BIT(9) - When 1 RF parity error detection is disabled</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_CTRL_MASK		(BIT(0) | BIT(1))</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_CTRL_DIS_MASK \</div><div class='add'>+	(BIT(4) | BIT(5) | BIT(6) | BIT(9) | BIT(10))</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_CTRL			0x640C00</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * BIT(0) - Clears bit(0) of ADF_GEN6_CPP_CFC_ERR_STATUS</div><div class='add'>+ *	    when an error is reported on CPP</div><div class='add'>+ * BIT(1) - Clears bit(1) of ADF_GEN6_CPP_CFC_ERR_STATUS</div><div class='add'>+ *	    when multiple errors are reported on CPP</div><div class='add'>+ * BIT(2) - Clears bit(2) of ADF_GEN6_CPP_CFC_ERR_STATUS</div><div class='add'>+ *	    when attention interrupt is reported</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_STATUS_CLR_MASK		(BIT(0) | BIT(1) | BIT(2))</div><div class='add'>+#define ADF_GEN6_CPP_CFC_ERR_STATUS_CLR			0x640C08</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ERRSOU3 bit masks</div><div class='add'>+ * BIT(0) - indicates error response order overflow and/or BME error</div><div class='add'>+ * BIT(1) - indicates RI push/pull error</div><div class='add'>+ * BIT(2) - indicates TI push/pull error</div><div class='add'>+ * BIT(5) - indicates TI pull parity error</div><div class='add'>+ * BIT(6) - indicates RI push parity error</div><div class='add'>+ * BIT(7) - indicates VFLR interrupt</div><div class='add'>+ * BIT(8) - indicates ring pair interrupts for ATU detected fault</div><div class='add'>+ * BIT(9) - indicates rate limiting error</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_ERRSOU3_TIMISCSTS_BIT			BIT(0)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_RICPPINTSTS_MASK		(BIT(1) | BIT(6))</div><div class='add'>+#define ADF_GEN6_ERRSOU3_TICPPINTSTS_MASK		(BIT(2) | BIT(5))</div><div class='add'>+#define ADF_GEN6_ERRSOU3_VFLRNOTIFY_BIT			BIT(7)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_ATUFAULTSTATUS_BIT		BIT(8)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_RLTERROR_BIT			BIT(9)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_TC_VC_MAP_ERROR_BIT		BIT(16)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_PCIE_DEVHALT_BIT		BIT(17)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_PG_REQ_DEVHALT_BIT		BIT(18)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_XLT_CPL_DEVHALT_BIT		BIT(19)</div><div class='add'>+#define ADF_GEN6_ERRSOU3_TI_INT_ERR_DEVHALT_BIT		BIT(20)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRSOU3_MASK ( \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_TIMISCSTS_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_RICPPINTSTS_MASK) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_TICPPINTSTS_MASK) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_VFLRNOTIFY_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_ATUFAULTSTATUS_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_RLTERROR_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_TC_VC_MAP_ERROR_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_PCIE_DEVHALT_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_PG_REQ_DEVHALT_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_XLT_CPL_DEVHALT_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_TI_INT_ERR_DEVHALT_BIT))</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ERRSOU3_DIS_MASK ( \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_TIMISCSTS_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_RICPPINTSTS_MASK) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_TICPPINTSTS_MASK) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_VFLRNOTIFY_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_ATUFAULTSTATUS_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_RLTERROR_BIT) | \</div><div class='add'>+	(ADF_GEN6_ERRSOU3_TC_VC_MAP_ERROR_BIT))</div><div class='add'>+</div><div class='add'>+/* Rate limiting error log register */</div><div class='add'>+#define ADF_GEN6_RLT_ERRLOG				0x508814</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_RLT_ERRLOG_MASK	(BIT(0) | BIT(1) | BIT(2) | BIT(3))</div><div class='add'>+</div><div class='add'>+/* TI misc status register */</div><div class='add'>+#define ADF_GEN6_TIMISCSTS				0x50054C</div><div class='add'>+</div><div class='add'>+/* TI misc error reporting mask */</div><div class='add'>+#define ADF_GEN6_TIMISCCTL				0x500548</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TI Misc error reporting control mask</div><div class='add'>+ * BIT(0) - Enables error detection and logging in TIMISCSTS register</div><div class='add'>+ * BIT(1) - It has effect only when SRIOV enabled, this bit is 0 by default</div><div class='add'>+ * BIT(2) - Enables the D-F-x counter within the dispatch arbiter</div><div class='add'>+ *	    to start based on the command triggered from</div><div class='add'>+ * BIT(30) - Disables VFLR functionality</div><div class='add'>+ * bits 1, 2 and 30 value should be preserved and not meant to be changed</div><div class='add'>+ * within RAS.</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TIMISCCTL_BIT				BIT(0)</div><div class='add'>+#define ADF_GEN6_TIMSCCTL_RELAY_MASK			(BIT(1) | BIT(2) | BIT(30))</div><div class='add'>+</div><div class='add'>+/* RI CPP interface status register */</div><div class='add'>+#define ADF_GEN6_RICPPINTSTS				0x41A330</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Uncorrectable error mask in RICPPINTSTS register</div><div class='add'>+ * BIT(0) - RI asserted the CPP error signal during a push</div><div class='add'>+ * BIT(1) - RI detected the CPP error signal asserted during a pull</div><div class='add'>+ * BIT(2) - RI detected a push data parity error</div><div class='add'>+ * BIT(3) - RI detected a push valid parity error</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_RICPPINTSTS_MASK			(BIT(0) | BIT(1) | BIT(2) | BIT(3))</div><div class='add'>+</div><div class='add'>+/* RI CPP interface register control */</div><div class='add'>+#define ADF_GEN6_RICPPINTCTL				0x41A32C</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Control bit mask for RICPPINTCTL register</div><div class='add'>+ * BIT(0) - value of 1 enables error detection and reporting</div><div class='add'>+ *	    on the RI CPP Push interface</div><div class='add'>+ * BIT(1) - value of 1 enables error detection and reporting</div><div class='add'>+ *	    on the RI CPP Pull interface</div><div class='add'>+ * BIT(2) - value of 1 enables error detection and reporting</div><div class='add'>+ *	    on the RI Parity</div><div class='add'>+ * BIT(3) - value of 1 enable checking parity on CPP</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_RICPPINTCTL_MASK \</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))</div><div class='add'>+</div><div class='add'>+/* TI CPP interface status register */</div><div class='add'>+#define ADF_GEN6_TICPPINTSTS				0x50053C</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Uncorrectable error mask in TICPPINTSTS register</div><div class='add'>+ * BIT(0) - value of 1 indicates that the TI asserted</div><div class='add'>+ *	    the CPP error signal during a push</div><div class='add'>+ * BIT(1) - value of 1 indicates that the TI detected</div><div class='add'>+ *	    the CPP error signal asserted during a pull</div><div class='add'>+ * BIT(2) - value of 1 indicates that the TI detected</div><div class='add'>+ *	    a pull data parity error</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TICPPINTSTS_MASK			(BIT(0) | BIT(1) | BIT(2))</div><div class='add'>+</div><div class='add'>+/* TI CPP interface status register control */</div><div class='add'>+#define ADF_GEN6_TICPPINTCTL				0x500538</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Control bit mask for TICPPINTCTL register</div><div class='add'>+ * BIT(0) - value of 1 enables error detection and reporting on</div><div class='add'>+ *	    the TI CPP Push interface</div><div class='add'>+ * BIT(1) - value of 1 enables error detection and reporting on</div><div class='add'>+ *	    the TI CPP Push interface</div><div class='add'>+ * BIT(2) - value of 1 enables parity error detection and logging on</div><div class='add'>+ *	    the TI CPP Pull interface</div><div class='add'>+ * BIT(3) - value of 1 enables CPP CMD and Pull Data parity checking</div><div class='add'>+ */</div><div class='add'>+#define ADF_GEN6_TICPPINTCTL_MASK	\</div><div class='add'>+	(BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))</div><div class='add'>+</div><div class='add'>+/* ATU fault status register */</div><div class='add'>+#define ADF_GEN6_ATUFAULTSTATUS(i)			(0x506000 + ((i) * 0x4))</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_ATUFAULTSTATUS_BIT			BIT(0)</div><div class='add'>+</div><div class='add'>+/* Command parity error detected on IOSFP command to QAT */</div><div class='add'>+#define ADF_GEN6_RIMISCSTS_BIT				BIT(0)</div><div class='add'>+</div><div class='add'>+#define ADF_GEN6_GENSTS					0x41A220</div><div class='add'>+#define ADF_GEN6_GENSTS_DEVICE_STATE_MASK		GENMASK(1, 0)</div><div class='add'>+#define ADF_GEN6_GENSTS_RESET_TYPE_MASK			GENMASK(3, 2)</div><div class='add'>+#define ADF_GEN6_GENSTS_PFLR				0x1</div><div class='add'>+#define ADF_GEN6_GENSTS_COLD_RESET			0x3</div><div class='add'>+#define ADF_GEN6_GENSTS_DEVHALT				0x1</div><div class='add'>+</div><div class='add'>+void adf_gen6_init_ras_ops(struct adf_ras_ops *ras_ops);</div><div class='add'>+</div><div class='add'>+#endif /* ADF_GEN6_RAS_H_ */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.c b/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.c<br/>new file mode 100644<br/>index 000000000000..58a072e2f936<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen6_shared.c</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include "adf_gen4_config.h"</div><div class='add'>+#include "adf_gen4_hw_csr_data.h"</div><div class='add'>+#include "adf_gen4_pfvf.h"</div><div class='add'>+#include "adf_gen6_shared.h"</div><div class='add'>+</div><div class='add'>+struct adf_accel_dev;</div><div class='add'>+struct adf_pfvf_ops;</div><div class='add'>+struct adf_hw_csr_ops;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * QAT GEN4 and GEN6 devices often differ in terms of supported features,</div><div class='add'>+ * options and internal logic. However, some of the mechanisms and register</div><div class='add'>+ * layout are shared between those two GENs. This file serves as an abstraction</div><div class='add'>+ * layer that allows to use existing GEN4 implementation that is also</div><div class='add'>+ * applicable to GEN6 without additional overhead and complexity.</div><div class='add'>+ */</div><div class='add'>+void adf_gen6_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)</div><div class='add'>+{</div><div class='add'>+	adf_gen4_init_pf_pfvf_ops(pfvf_ops);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen6_init_pf_pfvf_ops);</div><div class='add'>+</div><div class='add'>+void adf_gen6_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops)</div><div class='add'>+{</div><div class='add'>+	return adf_gen4_init_hw_csr_ops(csr_ops);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen6_init_hw_csr_ops);</div><div class='add'>+</div><div class='add'>+int adf_gen6_cfg_dev_init(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	return adf_gen4_cfg_dev_init(accel_dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen6_cfg_dev_init);</div><div class='add'>+</div><div class='add'>+int adf_gen6_comp_dev_config(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	return adf_comp_dev_config(accel_dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen6_comp_dev_config);</div><div class='add'>+</div><div class='add'>+int adf_gen6_no_dev_config(struct adf_accel_dev *accel_dev)</div><div class='add'>+{</div><div class='add'>+	return adf_no_dev_config(accel_dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_gen6_no_dev_config);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.h b/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.h<br/>new file mode 100644<br/>index 000000000000..bc8e71e984fc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen6_shared.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_gen6_shared.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef ADF_GEN6_SHARED_H_</div><div class='add'>+#define ADF_GEN6_SHARED_H_</div><div class='add'>+</div><div class='add'>+struct adf_hw_csr_ops;</div><div class='add'>+struct adf_accel_dev;</div><div class='add'>+struct adf_pfvf_ops;</div><div class='add'>+</div><div class='add'>+void adf_gen6_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops);</div><div class='add'>+void adf_gen6_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);</div><div class='add'>+int adf_gen6_cfg_dev_init(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_gen6_comp_dev_config(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_gen6_no_dev_config(struct adf_accel_dev *accel_dev);</div><div class='add'>+#endif/* ADF_GEN6_SHARED_H_ */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c b/drivers/crypto/intel/qat/qat_common/adf_timer.c<br/>index 35ccb91d6ec1..8962a49f145a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_timer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_timer.c</a></div><div class='hunk'>@@ -12,9 +12,9 @@</div><div class='ctx'> #include "adf_admin.h"</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='ctx'> #include "adf_common_drv.h"</div><div class='del'>-#include "adf_gen4_timer.h"</div><div class='add'>+#include "adf_timer.h"</div><div class='ctx'> </div><div class='del'>-#define ADF_GEN4_TIMER_PERIOD_MS 200</div><div class='add'>+#define ADF_DEFAULT_TIMER_PERIOD_MS 200</div><div class='ctx'> </div><div class='ctx'> /* This periodic update is used to trigger HB, RL &amp; TL fw events */</div><div class='ctx'> static void work_handler(struct work_struct *work)</div><div class='hunk'>@@ -27,16 +27,16 @@ static void work_handler(struct work_struct *work)</div><div class='ctx'> 	accel_dev = timer_ctx-&gt;accel_dev;</div><div class='ctx'> </div><div class='ctx'> 	adf_misc_wq_queue_delayed_work(&amp;timer_ctx-&gt;work_ctx,</div><div class='del'>-				       msecs_to_jiffies(ADF_GEN4_TIMER_PERIOD_MS));</div><div class='add'>+				       msecs_to_jiffies(ADF_DEFAULT_TIMER_PERIOD_MS));</div><div class='ctx'> </div><div class='ctx'> 	time_periods = div_u64(ktime_ms_delta(ktime_get_real(), timer_ctx-&gt;initial_ktime),</div><div class='del'>-			       ADF_GEN4_TIMER_PERIOD_MS);</div><div class='add'>+			       ADF_DEFAULT_TIMER_PERIOD_MS);</div><div class='ctx'> </div><div class='ctx'> 	if (adf_send_admin_tim_sync(accel_dev, time_periods))</div><div class='ctx'> 		dev_err(&amp;GET_DEV(accel_dev), "Failed to synchronize qat timer\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int adf_gen4_timer_start(struct adf_accel_dev *accel_dev)</div><div class='add'>+int adf_timer_start(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct adf_timer *timer_ctx;</div><div class='ctx'> </div><div class='hunk'>@@ -50,13 +50,13 @@ int adf_gen4_timer_start(struct adf_accel_dev *accel_dev)</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;timer_ctx-&gt;work_ctx, work_handler);</div><div class='ctx'> 	adf_misc_wq_queue_delayed_work(&amp;timer_ctx-&gt;work_ctx,</div><div class='del'>-				       msecs_to_jiffies(ADF_GEN4_TIMER_PERIOD_MS));</div><div class='add'>+				       msecs_to_jiffies(ADF_DEFAULT_TIMER_PERIOD_MS));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(adf_gen4_timer_start);</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_timer_start);</div><div class='ctx'> </div><div class='del'>-void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev)</div><div class='add'>+void adf_timer_stop(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct adf_timer *timer_ctx = accel_dev-&gt;timer;</div><div class='ctx'> </div><div class='hunk'>@@ -68,4 +68,4 @@ void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 	kfree(timer_ctx);</div><div class='ctx'> 	accel_dev-&gt;timer = NULL;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(adf_gen4_timer_stop);</div><div class='add'>+EXPORT_SYMBOL_GPL(adf_timer_stop);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h b/drivers/crypto/intel/qat/qat_common/adf_timer.h<br/>index 66a709e7b358..68e5136d6ba1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/adf_timer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/adf_timer.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* Copyright(c) 2023 Intel Corporation */</div><div class='ctx'> </div><div class='del'>-#ifndef ADF_GEN4_TIMER_H_</div><div class='del'>-#define ADF_GEN4_TIMER_H_</div><div class='add'>+#ifndef ADF_TIMER_H_</div><div class='add'>+#define ADF_TIMER_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ktime.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='hunk'>@@ -15,7 +15,7 @@ struct adf_timer {</div><div class='ctx'> 	ktime_t initial_ktime;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int adf_gen4_timer_start(struct adf_accel_dev *accel_dev);</div><div class='del'>-void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev);</div><div class='add'>+int adf_timer_start(struct adf_accel_dev *accel_dev);</div><div class='add'>+void adf_timer_stop(struct adf_accel_dev *accel_dev);</div><div class='ctx'> </div><div class='del'>-#endif /* ADF_GEN4_TIMER_H_ */</div><div class='add'>+#endif /* ADF_TIMER_H_ */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h<br/>index 04f645957e28..81969c515a17 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/icp_qat_fw_comp.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@ enum icp_qat_fw_comp_20_cmd_id {</div><div class='ctx'> #define ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK 0x1</div><div class='ctx'> #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS 7</div><div class='ctx'> #define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK 0x1</div><div class='add'>+#define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MAX_VALUE 0xFFFFFFFF</div><div class='ctx'> </div><div class='ctx'> #define ICP_QAT_FW_COMP_FLAGS_BUILD(sesstype, autoselect, enhanced_asb, \</div><div class='ctx'> 	ret_uncomp, secure_ram) \</div><div class='hunk'>@@ -117,7 +118,7 @@ struct icp_qat_fw_comp_req_params {</div><div class='ctx'> #define ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD(sop, eop, bfinal, cnv, cnvnr, \</div><div class='ctx'> 					      cnvdfx, crc, xxhash_acc, \</div><div class='ctx'> 					      cnv_error_type, append_crc, \</div><div class='del'>-					      drop_data) \</div><div class='add'>+					      drop_data, partial_decomp) \</div><div class='ctx'> 	((((sop) &amp; ICP_QAT_FW_COMP_SOP_MASK) &lt;&lt; \</div><div class='ctx'> 	ICP_QAT_FW_COMP_SOP_BITPOS) | \</div><div class='ctx'> 	(((eop) &amp; ICP_QAT_FW_COMP_EOP_MASK) &lt;&lt; \</div><div class='hunk'>@@ -139,7 +140,9 @@ struct icp_qat_fw_comp_req_params {</div><div class='ctx'> 	(((append_crc) &amp; ICP_QAT_FW_COMP_APPEND_CRC_MASK) \</div><div class='ctx'> 	&lt;&lt; ICP_QAT_FW_COMP_APPEND_CRC_BITPOS) | \</div><div class='ctx'> 	(((drop_data) &amp; ICP_QAT_FW_COMP_DROP_DATA_MASK) \</div><div class='del'>-	&lt;&lt; ICP_QAT_FW_COMP_DROP_DATA_BITPOS))</div><div class='add'>+	&lt;&lt; ICP_QAT_FW_COMP_DROP_DATA_BITPOS) | \</div><div class='add'>+	(((partial_decomp) &amp; ICP_QAT_FW_COMP_PARTIAL_DECOMP_MASK) \</div><div class='add'>+	&lt;&lt; ICP_QAT_FW_COMP_PARTIAL_DECOMP_BITPOS))</div><div class='ctx'> </div><div class='ctx'> #define ICP_QAT_FW_COMP_NOT_SOP 0</div><div class='ctx'> #define ICP_QAT_FW_COMP_SOP 1</div><div class='hunk'>@@ -161,6 +164,8 @@ struct icp_qat_fw_comp_req_params {</div><div class='ctx'> #define ICP_QAT_FW_COMP_NO_APPEND_CRC 0</div><div class='ctx'> #define ICP_QAT_FW_COMP_DROP_DATA 1</div><div class='ctx'> #define ICP_QAT_FW_COMP_NO_DROP_DATA 0</div><div class='add'>+#define ICP_QAT_FW_COMP_PARTIAL_DECOMPRESS 1</div><div class='add'>+#define ICP_QAT_FW_COMP_NO_PARTIAL_DECOMPRESS 0</div><div class='ctx'> #define ICP_QAT_FW_COMP_SOP_BITPOS 0</div><div class='ctx'> #define ICP_QAT_FW_COMP_SOP_MASK 0x1</div><div class='ctx'> #define ICP_QAT_FW_COMP_EOP_BITPOS 1</div><div class='hunk'>@@ -189,6 +194,8 @@ struct icp_qat_fw_comp_req_params {</div><div class='ctx'> #define ICP_QAT_FW_COMP_APPEND_CRC_MASK 0x1</div><div class='ctx'> #define ICP_QAT_FW_COMP_DROP_DATA_BITPOS 25</div><div class='ctx'> #define ICP_QAT_FW_COMP_DROP_DATA_MASK 0x1</div><div class='add'>+#define ICP_QAT_FW_COMP_PARTIAL_DECOMP_BITPOS 27</div><div class='add'>+#define ICP_QAT_FW_COMP_PARTIAL_DECOMP_MASK 0x1</div><div class='ctx'> </div><div class='ctx'> #define ICP_QAT_FW_COMP_SOP_GET(flags) \</div><div class='ctx'> 	QAT_FIELD_GET(flags, ICP_QAT_FW_COMP_SOP_BITPOS, \</div><div class='hunk'>@@ -281,8 +288,18 @@ struct icp_qat_fw_comp_req {</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct icp_qat_fw_xlt_req_params xlt_pars;</div><div class='ctx'> 		__u32 resrvd1[ICP_QAT_FW_NUM_LONGWORDS_2];</div><div class='add'>+		struct {</div><div class='add'>+			__u32 partial_decompress_length;</div><div class='add'>+			__u32 partial_decompress_offset;</div><div class='add'>+		} partial_decompress;</div><div class='ctx'> 	} u1;</div><div class='del'>-	__u32 resrvd2[ICP_QAT_FW_NUM_LONGWORDS_2];</div><div class='add'>+	union {</div><div class='add'>+		__u32 resrvd2[ICP_QAT_FW_NUM_LONGWORDS_2];</div><div class='add'>+		struct {</div><div class='add'>+			__u32 asb_value;</div><div class='add'>+			__u32 reserved;</div><div class='add'>+		} asb_threshold;</div><div class='add'>+	} u3;</div><div class='ctx'> 	struct icp_qat_fw_comp_cd_hdr comp_cd_ctrl;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct icp_qat_fw_xlt_cd_hdr xlt_cd_ctrl;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h b/drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h<br/>index 7eb5daef4f88..6887930c7995 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/icp_qat_fw_loader_handle.h</a></div><div class='hunk'>@@ -35,6 +35,7 @@ struct icp_qat_fw_loader_chip_info {</div><div class='ctx'> 	u32 wakeup_event_val;</div><div class='ctx'> 	bool fw_auth;</div><div class='ctx'> 	bool css_3k;</div><div class='add'>+	bool dual_sign;</div><div class='ctx'> 	bool tgroup_share_ustore;</div><div class='ctx'> 	u32 fcu_ctl_csr;</div><div class='ctx'> 	u32 fcu_sts_csr;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp.h b/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp.h<br/>new file mode 100644<br/>index 000000000000..dce639152345<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp.h</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef ICP_QAT_HW_51_COMP_H_</div><div class='add'>+#define ICP_QAT_HW_51_COMP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "icp_qat_fw.h"</div><div class='add'>+#include "icp_qat_hw_51_comp_defs.h"</div><div class='add'>+</div><div class='add'>+struct icp_qat_hw_comp_51_config_csr_lower {</div><div class='add'>+	enum icp_qat_hw_comp_51_abd abd;</div><div class='add'>+	enum icp_qat_hw_comp_51_lllbd_ctrl lllbd;</div><div class='add'>+	enum icp_qat_hw_comp_51_search_depth sd;</div><div class='add'>+	enum icp_qat_hw_comp_51_min_match_control mmctrl;</div><div class='add'>+	enum icp_qat_hw_comp_51_lz4_block_checksum lbc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+ICP_QAT_FW_COMP_51_BUILD_CONFIG_LOWER(struct icp_qat_hw_comp_51_config_csr_lower csr)</div><div class='add'>+{</div><div class='add'>+	u32 val32 = 0;</div><div class='add'>+</div><div class='add'>+	QAT_FIELD_SET(val32, csr.abd,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_ABD_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_ABD_MASK);</div><div class='add'>+	QAT_FIELD_SET(val32, csr.lllbd,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_LLLBD_CTRL_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_LLLBD_CTRL_MASK);</div><div class='add'>+	QAT_FIELD_SET(val32, csr.sd,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_SEARCH_DEPTH_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_SEARCH_DEPTH_MASK);</div><div class='add'>+	QAT_FIELD_SET(val32, csr.mmctrl,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_MIN_MATCH_CONTROL_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_MIN_MATCH_CONTROL_MASK);</div><div class='add'>+	QAT_FIELD_SET(val32, csr.lbc,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_MASK);</div><div class='add'>+</div><div class='add'>+	return val32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct icp_qat_hw_comp_51_config_csr_upper {</div><div class='add'>+	enum icp_qat_hw_comp_51_dmm_algorithm edmm;</div><div class='add'>+	enum icp_qat_hw_comp_51_bms bms;</div><div class='add'>+	enum icp_qat_hw_comp_51_scb_mode_reset_mask scb_mode_reset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+ICP_QAT_FW_COMP_51_BUILD_CONFIG_UPPER(struct icp_qat_hw_comp_51_config_csr_upper csr)</div><div class='add'>+{</div><div class='add'>+	u32 val32 = 0;</div><div class='add'>+</div><div class='add'>+	QAT_FIELD_SET(val32, csr.edmm,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_DMM_ALGORITHM_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_DMM_ALGORITHM_MASK);</div><div class='add'>+	QAT_FIELD_SET(val32, csr.bms,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_BMS_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_BMS_MASK);</div><div class='add'>+	QAT_FIELD_SET(val32, csr.scb_mode_reset,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_SCB_MODE_RESET_MASK_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_COMP_51_CONFIG_CSR_SCB_MODE_RESET_MASK_MASK);</div><div class='add'>+</div><div class='add'>+	return val32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct icp_qat_hw_decomp_51_config_csr_lower {</div><div class='add'>+	enum icp_qat_hw_decomp_51_lz4_block_checksum lbc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+ICP_QAT_FW_DECOMP_51_BUILD_CONFIG_LOWER(struct icp_qat_hw_decomp_51_config_csr_lower csr)</div><div class='add'>+{</div><div class='add'>+	u32 val32 = 0;</div><div class='add'>+</div><div class='add'>+	QAT_FIELD_SET(val32, csr.lbc,</div><div class='add'>+		      ICP_QAT_HW_DECOMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_DECOMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_MASK);</div><div class='add'>+</div><div class='add'>+	return val32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct icp_qat_hw_decomp_51_config_csr_upper {</div><div class='add'>+	enum icp_qat_hw_decomp_51_bms bms;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+ICP_QAT_FW_DECOMP_51_BUILD_CONFIG_UPPER(struct icp_qat_hw_decomp_51_config_csr_upper csr)</div><div class='add'>+{</div><div class='add'>+	u32 val32 = 0;</div><div class='add'>+</div><div class='add'>+	QAT_FIELD_SET(val32, csr.bms,</div><div class='add'>+		      ICP_QAT_HW_DECOMP_51_CONFIG_CSR_BMS_BITPOS,</div><div class='add'>+		      ICP_QAT_HW_DECOMP_51_CONFIG_CSR_BMS_MASK);</div><div class='add'>+</div><div class='add'>+	return val32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* ICP_QAT_HW_51_COMP_H_ */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp_defs.h b/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp_defs.h<br/>new file mode 100644<br/>index 000000000000..e745688c5da4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp_defs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/icp_qat_hw_51_comp_defs.h</a></div><div class='hunk'>@@ -0,0 +1,318 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation */</div><div class='add'>+#ifndef ICP_QAT_HW_51_COMP_DEFS_H_</div><div class='add'>+#define ICP_QAT_HW_51_COMP_DEFS_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SOM_CONTROL_BITPOS	28</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SOM_CONTROL_MASK		GENMASK(1, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_som_control {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SOM_CONTROL_NORMAL_MODE = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SOM_CONTROL_DICTIONARY_MODE = 0x1,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SOM_CONTROL_INPUT_CRC = 0x2,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SOM_CONTROL_RESERVED_MODE = 0x3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SOM_CONTROL_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SOM_CONTROL_NORMAL_MODE</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_RD_CONTROL_BITPOS	27</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_RD_CONTROL_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_skip_hash_rd_control {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_RD_CONTROL_NO_SKIP = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_RD_CONTROL_SKIP_HASH_READS = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_RD_CONTROL_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_RD_CONTROL_NO_SKIP</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BYPASS_COMPRESSION_BITPOS	25</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BYPASS_COMPRESSION_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_bypass_compression {</div><div class='add'>+	ICP_QAT_HW_COMP_51_BYPASS_COMPRESSION_DISABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_BYPASS_COMPRESSION_ENABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BYPASS_COMPRESSION_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_BYPASS_COMPRESSION_DISABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_DMM_ALGORITHM_BITPOS	22</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_DMM_ALGORITHM_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_dmm_algorithm {</div><div class='add'>+	ICP_QAT_HW_COMP_51_DMM_ALGORITHM_EDMM_ENABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_DMM_ALGORITHM_ZSTD_DMM_LITE = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_DMM_ALGORITHM_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_DMM_ALGORITHM_EDMM_ENABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_TOKEN_FUSION_INTERNAL_ONLY_BITPOS	21</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_TOKEN_FUSION_INTERNAL_ONLY_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_token_fusion_internal_only {</div><div class='add'>+	ICP_QAT_HW_COMP_51_TOKEN_FUSION_INTERNAL_ONLY_ENABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_TOKEN_FUSION_INTERNAL_ONLY_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_TOKEN_FUSION_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_TOKEN_FUSION_INTERNAL_ONLY_ENABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BMS_BITPOS	19</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BMS_MASK		GENMASK(1, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_bms {</div><div class='add'>+	ICP_QAT_HW_COMP_51_BMS_BMS_64KB = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_BMS_BMS_256KB = 0x1,</div><div class='add'>+	ICP_QAT_HW_COMP_51_BMS_BMS_1MB = 0x2,</div><div class='add'>+	ICP_QAT_HW_COMP_51_BMS_BMS_4MB = 0x3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BMS_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_BMS_BMS_64KB</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SCB_MODE_RESET_MASK_BITPOS	18</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SCB_MODE_RESET_MASK_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_scb_mode_reset_mask {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SCB_MODE_RESET_MASK_DO_NOT_RESET_HB_HT = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SCB_MODE_RESET_MASK_RESET_HB_HT = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SCB_MODE_RESET_MASK_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SCB_MODE_RESET_MASK_DO_NOT_RESET_HB_HT</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ZSTD_FRAME_GEN_DEC_EN_BITPOS	2</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ZSTD_FRAME_GEN_DEC_EN_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_zstd_frame_gen_dec_en {</div><div class='add'>+	ICP_QAT_HW_COMP_51_ZSTD_FRAME_GEN_DEC_EN_ZSTD_FRAME_HDR_DISABLE = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_ZSTD_FRAME_GEN_DEC_EN_ZSTD_FRAME_HDR_ENABLE = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ZSTD_FRAME_GEN_DEC_EN_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_ZSTD_FRAME_GEN_DEC_EN_ZSTD_FRAME_HDR_ENABLE</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_CNV_DISABLE_BITPOS	1</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_CNV_DISABLE_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_cnv_disable {</div><div class='add'>+	ICP_QAT_HW_COMP_51_CNV_DISABLE_CNV_ENABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_CNV_DISABLE_CNV_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_CNV_DISABLE_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_CNV_DISABLE_CNV_ENABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ASB_DISABLE_BITPOS	0</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ASB_DISABLE_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_asb_disable {</div><div class='add'>+	ICP_QAT_HW_COMP_51_ASB_DISABLE_ASB_ENABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_ASB_DISABLE_ASB_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ASB_DISABLE_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_ASB_DISABLE_ASB_ENABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SPEC_DECODER_INTERNAL_ONLY_BITPOS	21</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SPEC_DECODER_INTERNAL_ONLY_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_spec_decoder_internal_only {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SPEC_DECODER_INTERNAL_ONLY_NORMAL = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SPEC_DECODER_INTERNAL_ONLY_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SPEC_DECODER_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SPEC_DECODER_INTERNAL_ONLY_NORMAL</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_MINI_XCAM_INTERNAL_ONLY_BITPOS	20</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_MINI_XCAM_INTERNAL_ONLY_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_mini_xcam_internal_only {</div><div class='add'>+	ICP_QAT_HW_COMP_51_MINI_XCAM_INTERNAL_ONLY_NORMAL = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_MINI_XCAM_INTERNAL_ONLY_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_MINI_XCAM_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_MINI_XCAM_INTERNAL_ONLY_NORMAL</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_REP_OFF_ENC_INTERNAL_ONLY_BITPOS	19</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_REP_OFF_ENC_INTERNAL_ONLY_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_rep_off_enc_internal_only {</div><div class='add'>+	ICP_QAT_HW_COMP_51_REP_OFF_ENC_INTERNAL_ONLY_ENABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_REP_OFF_ENC_INTERNAL_ONLY_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_REP_OFF_ENC_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_REP_OFF_ENC_INTERNAL_ONLY_ENABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_PROG_BLOCK_DROP_INTERNAL_ONLY_BITPOS	18</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_PROG_BLOCK_DROP_INTERNAL_ONLY_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_prog_block_drop_internal_only {</div><div class='add'>+	ICP_QAT_HW_COMP_51_PROG_BLOCK_DROP_INTERNAL_ONLY_DISABLE = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_PROG_BLOCK_DROP_INTERNAL_ONLY_ENABLE = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_PROG_BLOCK_DROP_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_PROG_BLOCK_DROP_INTERNAL_ONLY_DISABLE</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_OVERRIDE_INTERNAL_ONLY_BITPOS	17</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_OVERRIDE_INTERNAL_ONLY_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_skip_hash_override_internal_only {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_OVERRIDE_INTERNAL_ONLY_DETERMINE_HASH_PARAMS = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_OVERRIDE_INTERNAL_ONLY_OVERRIDE_HASH_PARAMS = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_OVERRIDE_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_OVERRIDE_INTERNAL_ONLY_DETERMINE_HASH_PARAMS</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_HBS_BITPOS	14</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_HBS_MASK		GENMASK(2, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_hbs {</div><div class='add'>+	ICP_QAT_HW_COMP_51_HBS_32KB = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_HBS_64KB = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_HBS_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_HBS_32KB</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ABD_BITPOS	13</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ABD_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_abd {</div><div class='add'>+	ICP_QAT_HW_COMP_51_ABD_ABD_ENABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_ABD_ABD_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_ABD_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_ABD_ABD_ENABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_LLLBD_CTRL_BITPOS	12</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_LLLBD_CTRL_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_lllbd_ctrl {</div><div class='add'>+	ICP_QAT_HW_COMP_51_LLLBD_CTRL_LLLBD_ENABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_LLLBD_CTRL_LLLBD_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_LLLBD_CTRL_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_LLLBD_CTRL_LLLBD_ENABLED</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SEARCH_DEPTH_BITPOS	8</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SEARCH_DEPTH_MASK		GENMASK(3, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_search_depth {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SEARCH_DEPTH_LEVEL_1 = 0x1,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SEARCH_DEPTH_LEVEL_6 = 0x3,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SEARCH_DEPTH_LEVEL_9 = 0x4,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SEARCH_DEPTH_LEVEL_10 = 0x4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SEARCH_DEPTH_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SEARCH_DEPTH_LEVEL_1</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_FORMAT_BITPOS	5</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_FORMAT_MASK	GENMASK(2, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_format {</div><div class='add'>+	ICP_QAT_HW_COMP_51_FORMAT_ILZ77 = 0x1,</div><div class='add'>+	ICP_QAT_HW_COMP_51_FORMAT_LZ4 = 0x2,</div><div class='add'>+	ICP_QAT_HW_COMP_51_FORMAT_LZ4s = 0x3,</div><div class='add'>+	ICP_QAT_HW_COMP_51_FORMAT_ZSTD = 0x4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_FORMAT_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_FORMAT_ILZ77</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_MIN_MATCH_CONTROL_BITPOS	4</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_MIN_MATCH_CONTROL_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_min_match_control {</div><div class='add'>+	ICP_QAT_HW_COMP_51_MIN_MATCH_CONTROL_MATCH_3B = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_MIN_MATCH_CONTROL_MATCH_4B = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_MIN_MATCH_CONTROL_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_MIN_MATCH_CONTROL_MATCH_3B</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_COLLISION_BITPOS	3</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_COLLISION_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_skip_hash_collision {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_COLLISION_ALLOW = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_COLLISION_DONT_ALLOW = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_COLLISION_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_COLLISION_ALLOW</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_UPDATE_BITPOS	2</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_UPDATE_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_skip_hash_update {</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_UPDATE_ALLOW = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_UPDATE_DONT_ALLOW = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_SKIP_HASH_UPDATE_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_SKIP_HASH_UPDATE_ALLOW</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BYTE_SKIP_BITPOS	1</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BYTE_SKIP_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_byte_skip {</div><div class='add'>+	ICP_QAT_HW_COMP_51_BYTE_SKIP_3BYTE_TOKEN = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_BYTE_SKIP_3BYTE_LITERAL = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_BYTE_SKIP_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_BYTE_SKIP_3BYTE_TOKEN</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_BITPOS	0</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_comp_51_lz4_block_checksum {</div><div class='add'>+	ICP_QAT_HW_COMP_51_LZ4_BLOCK_CHECKSUM_ABSENT = 0x0,</div><div class='add'>+	ICP_QAT_HW_COMP_51_LZ4_BLOCK_CHECKSUM_PRESENT = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_COMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_COMP_51_LZ4_BLOCK_CHECKSUM_ABSENT</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_DISCARD_DATA_BITPOS	26</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_DISCARD_DATA_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_discard_data {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_DISCARD_DATA_DISABLED = 0x0,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_DISCARD_DATA_ENABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_DISCARD_DATA_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_DISCARD_DATA_DISABLED</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_BMS_BITPOS	19</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_BMS_MASK	GENMASK(1, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_bms {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_BMS_BMS_64KB = 0x0,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_BMS_BMS_256KB = 0x1,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_BMS_BMS_1MB = 0x2,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_BMS_BMS_4MB = 0x3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_BMS_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_BMS_BMS_64KB</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_ZSTD_FRAME_GEN_DEC_EN_BITPOS	2</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_ZSTD_FRAME_GEN_DEC_EN_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_zstd_frame_gen_dec_en {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_ZSTD_FRAME_GEN_DEC_EN_ZSTD_FRAME_HDR_DISABLE = 0x0,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_ZSTD_FRAME_GEN_DEC_EN_ZSTD_FRAME_HDR_ENABLE = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_ZSTD_FRAME_GEN_DEC_EN_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_ZSTD_FRAME_GEN_DEC_EN_ZSTD_FRAME_HDR_ENABLE</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_SPEC_DECODER_INTERNAL_ONLY_BITPOS	21</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_SPEC_DECODER_INTERNAL_ONLY_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_spec_decoder_internal_only {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_SPEC_DECODER_INTERNAL_ONLY_NORMAL = 0x0,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_SPEC_DECODER_INTERNAL_ONLY_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_SPEC_DECODER_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_SPEC_DECODER_INTERNAL_ONLY_NORMAL</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_MINI_XCAM_INTERNAL_ONLY_BITPOS	20</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_MINI_XCAM_INTERNAL_ONLY_MASK	GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_mini_xcam_internal_only {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_MINI_XCAM_INTERNAL_ONLY_NORMAL = 0x0,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_MINI_XCAM_INTERNAL_ONLY_DISABLED = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_MINI_XCAM_INTERNAL_ONLY_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_MINI_XCAM_INTERNAL_ONLY_NORMAL</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_HBS_BITPOS	14</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_HBS_MASK	GENMASK(2, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_hbs {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_HBS_32KB = 0x0,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_HBS_64KB = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_HBS_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_HBS_32KB</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_FORMAT_BITPOS	5</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_FORMAT_MASK	GENMASK(2, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_format {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_FORMAT_ILZ77 = 0x1,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_FORMAT_LZ4 = 0x2,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_FORMAT_RESERVED = 0x3,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_FORMAT_ZSTD = 0x4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_FORMAT_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_FORMAT_ILZ77</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_BITPOS	0</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_MASK		GENMASK(0, 0)</div><div class='add'>+enum icp_qat_hw_decomp_51_lz4_block_checksum {</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_LZ4_BLOCK_CHECKSUM_ABSENT = 0x0,</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_LZ4_BLOCK_CHECKSUM_PRESENT = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICP_QAT_HW_DECOMP_51_CONFIG_CSR_LZ4_BLOCK_CHECKSUM_DEFAULT_VAL \</div><div class='add'>+	ICP_QAT_HW_DECOMP_51_LZ4_BLOCK_CHECKSUM_ABSENT</div><div class='add'>+</div><div class='add'>+#endif /* ICP_QAT_HW_51_COMP_DEFS_H_ */</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h b/drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h<br/>index 1c7bcd8e4055..6313c35eff0c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/icp_qat_uclo.h</a></div><div class='hunk'>@@ -7,6 +7,7 @@</div><div class='ctx'> #define ICP_QAT_AC_C62X_DEV_TYPE   0x01000000</div><div class='ctx'> #define ICP_QAT_AC_C3XXX_DEV_TYPE  0x02000000</div><div class='ctx'> #define ICP_QAT_AC_4XXX_A_DEV_TYPE 0x08000000</div><div class='add'>+#define ICP_QAT_AC_6XXX_DEV_TYPE   0x80000000</div><div class='ctx'> #define ICP_QAT_UCLO_MAX_AE       17</div><div class='ctx'> #define ICP_QAT_UCLO_MAX_CTX      8</div><div class='ctx'> #define ICP_QAT_UCLO_MAX_UIMAGE   (ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX)</div><div class='hunk'>@@ -81,6 +82,21 @@</div><div class='ctx'> #define ICP_QAT_CSS_RSA4K_MAX_IMAGE_LEN    0x40000</div><div class='ctx'> #define ICP_QAT_CSS_RSA3K_MAX_IMAGE_LEN    0x30000</div><div class='ctx'> </div><div class='add'>+/* All lengths below are in bytes */</div><div class='add'>+#define ICP_QAT_DUALSIGN_OPAQUE_HDR_LEN		12</div><div class='add'>+#define ICP_QAT_DUALSIGN_OPAQUE_HDR_ALIGN_LEN	16</div><div class='add'>+#define ICP_QAT_DUALSIGN_OPAQUE_DATA_LEN	3540</div><div class='add'>+#define ICP_QAT_DUALSIGN_XMSS_PUBKEY_LEN	64</div><div class='add'>+#define ICP_QAT_DUALSIGN_XMSS_SIG_LEN		2692</div><div class='add'>+#define ICP_QAT_DUALSIGN_XMSS_SIG_ALIGN_LEN	2696</div><div class='add'>+#define ICP_QAT_DUALSIGN_MISC_INFO_LEN		16</div><div class='add'>+#define ICP_QAT_DUALSIGN_FW_TYPE_LEN		7</div><div class='add'>+#define ICP_QAT_DUALSIGN_MODULE_TYPE		0x14</div><div class='add'>+#define ICP_QAT_DUALSIGN_HDR_LEN		0x375</div><div class='add'>+#define ICP_QAT_DUALSIGN_HDR_VER		0x40001</div><div class='add'>+#define ICP_QAT_DUALSIGN_HDR_LEN_OFFSET		4</div><div class='add'>+#define ICP_QAT_DUALSIGN_HDR_VER_OFFSET		8</div><div class='add'>+</div><div class='ctx'> #define ICP_QAT_CTX_MODE(ae_mode) ((ae_mode) &amp; 0xf)</div><div class='ctx'> #define ICP_QAT_NN_MODE(ae_mode) (((ae_mode) &gt;&gt; 0x4) &amp; 0xf)</div><div class='ctx'> #define ICP_QAT_SHARED_USTORE_MODE(ae_mode) (((ae_mode) &gt;&gt; 0xb) &amp; 0x1)</div><div class='hunk'>@@ -440,6 +456,13 @@ struct icp_qat_fw_auth_desc {</div><div class='ctx'> 	unsigned int   img_ae_init_data_low;</div><div class='ctx'> 	unsigned int   img_ae_insts_high;</div><div class='ctx'> 	unsigned int   img_ae_insts_low;</div><div class='add'>+	unsigned int   cpp_mask;</div><div class='add'>+	unsigned int   reserved;</div><div class='add'>+	unsigned int   xmss_pubkey_high;</div><div class='add'>+	unsigned int   xmss_pubkey_low;</div><div class='add'>+	unsigned int   xmss_sig_high;</div><div class='add'>+	unsigned int   xmss_sig_low;</div><div class='add'>+	unsigned int   reserved2[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct icp_qat_auth_chunk {</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_comp_algs.c b/drivers/crypto/intel/qat/qat_common/qat_comp_algs.c<br/>index a6e02405d402..8b123472b71c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_comp_algs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_comp_algs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_comp_algs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/qat_comp_algs.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='ctx'> #include "adf_common_drv.h"</div><div class='add'>+#include "adf_dc.h"</div><div class='ctx'> #include "qat_bl.h"</div><div class='ctx'> #include "qat_comp_req.h"</div><div class='ctx'> #include "qat_compression.h"</div><div class='hunk'>@@ -145,9 +146,7 @@ static int qat_comp_alg_init_tfm(struct crypto_acomp *acomp_tfm)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	ctx-&gt;inst = inst;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;inst-&gt;build_deflate_ctx(ctx-&gt;comp_ctx);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return qat_comp_build_ctx(inst-&gt;accel_dev, ctx-&gt;comp_ctx, QAT_DEFLATE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void qat_comp_alg_exit_tfm(struct crypto_acomp *acomp_tfm)</div><div class='hunk'>@@ -241,13 +240,13 @@ static struct acomp_alg qat_acomp[] = { {</div><div class='ctx'> 		.cra_priority = 4001,</div><div class='ctx'> 		.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY,</div><div class='ctx'> 		.cra_ctxsize = sizeof(struct qat_compression_ctx),</div><div class='add'>+		.cra_reqsize = sizeof(struct qat_compression_req),</div><div class='ctx'> 		.cra_module = THIS_MODULE,</div><div class='ctx'> 	},</div><div class='ctx'> 	.init = qat_comp_alg_init_tfm,</div><div class='ctx'> 	.exit = qat_comp_alg_exit_tfm,</div><div class='ctx'> 	.compress = qat_comp_alg_compress,</div><div class='ctx'> 	.decompress = qat_comp_alg_decompress,</div><div class='del'>-	.reqsize = sizeof(struct qat_compression_req),</div><div class='ctx'> }};</div><div class='ctx'> </div><div class='ctx'> int qat_comp_algs_register(void)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_compression.c b/drivers/crypto/intel/qat/qat_common/qat_compression.c<br/>index 7842a9f22178..c285b45b8679 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_compression.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_compression.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_compression.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/qat_compression.c</a></div><div class='hunk'>@@ -144,7 +144,6 @@ static int qat_compression_create_instances(struct adf_accel_dev *accel_dev)</div><div class='ctx'> 		inst-&gt;id = i;</div><div class='ctx'> 		atomic_set(&amp;inst-&gt;refctr, 0);</div><div class='ctx'> 		inst-&gt;accel_dev = accel_dev;</div><div class='del'>-		inst-&gt;build_deflate_ctx = GET_DC_OPS(accel_dev)-&gt;build_deflate_ctx;</div><div class='ctx'> </div><div class='ctx'> 		snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_BANK_NUM, i);</div><div class='ctx'> 		ret = adf_cfg_get_param_value(accel_dev, SEC, key, val);</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_compression.h b/drivers/crypto/intel/qat/qat_common/qat_compression.h<br/>index aebac2302dcf..5ced3ed0e5ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_compression.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_compression.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_compression.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/qat_compression.h</a></div><div class='hunk'>@@ -20,7 +20,6 @@ struct qat_compression_instance {</div><div class='ctx'> 	atomic_t refctr;</div><div class='ctx'> 	struct qat_instance_backlog backlog;</div><div class='ctx'> 	struct adf_dc_data *dc_data;</div><div class='del'>-	void (*build_deflate_ctx)(void *ctx);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline bool adf_hw_dev_has_compression(struct adf_accel_dev *accel_dev)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_hal.c b/drivers/crypto/intel/qat/qat_common/qat_hal.c<br/>index ef8a9cf74f0c..da4eca6e1633 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_hal.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_hal.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_hal.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/qat_hal.c</a></div><div class='hunk'>@@ -694,16 +694,17 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> </div><div class='ctx'> 	handle-&gt;pci_dev = pci_info-&gt;pci_dev;</div><div class='ctx'> 	switch (handle-&gt;pci_dev-&gt;device) {</div><div class='del'>-	case ADF_4XXX_PCI_DEVICE_ID:</div><div class='del'>-	case ADF_401XX_PCI_DEVICE_ID:</div><div class='del'>-	case ADF_402XX_PCI_DEVICE_ID:</div><div class='del'>-	case ADF_420XX_PCI_DEVICE_ID:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_4XXX:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_401XX:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_402XX:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_420XX:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_6XXX:</div><div class='ctx'> 		handle-&gt;chip_info-&gt;mmp_sram_size = 0;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;nn = false;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;lm2lm3 = true;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;lm_size = ICP_QAT_UCLO_MAX_LMEM_REG_2X;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;icp_rst_csr = ICP_RESET_CPP0;</div><div class='del'>-		if (handle-&gt;pci_dev-&gt;device == ADF_420XX_PCI_DEVICE_ID)</div><div class='add'>+		if (handle-&gt;pci_dev-&gt;device == PCI_DEVICE_ID_INTEL_QAT_420XX)</div><div class='ctx'> 			handle-&gt;chip_info-&gt;icp_rst_mask = 0x100155;</div><div class='ctx'> 		else</div><div class='ctx'> 			handle-&gt;chip_info-&gt;icp_rst_mask = 0x100015;</div><div class='hunk'>@@ -712,6 +713,8 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 		handle-&gt;chip_info-&gt;wakeup_event_val = 0x80000000;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;fw_auth = true;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;css_3k = true;</div><div class='add'>+		if (handle-&gt;pci_dev-&gt;device == PCI_DEVICE_ID_INTEL_QAT_6XXX)</div><div class='add'>+			handle-&gt;chip_info-&gt;dual_sign = true;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;tgroup_share_ustore = true;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;fcu_ctl_csr = FCU_CONTROL_4XXX;</div><div class='ctx'> 		handle-&gt;chip_info-&gt;fcu_sts_csr = FCU_STATUS_4XXX;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_common/qat_uclo.c b/drivers/crypto/intel/qat/qat_common/qat_uclo.c<br/>index 7678a93c6853..21d652a1c8ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_uclo.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_common/qat_uclo.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_common/qat_uclo.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_common/qat_uclo.c</a></div><div class='hunk'>@@ -1,11 +1,16 @@</div><div class='ctx'> // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)</div><div class='ctx'> /* Copyright(c) 2014 - 2020 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt)	"QAT: " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/align.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/pci_ids.h&gt;</div><div class='add'>+#include &lt;linux/wordpart.h&gt;</div><div class='ctx'> #include "adf_accel_devices.h"</div><div class='ctx'> #include "adf_common_drv.h"</div><div class='ctx'> #include "icp_qat_uclo.h"</div><div class='hunk'>@@ -59,7 +64,7 @@ static int qat_uclo_free_ae_data(struct icp_qat_uclo_aedata *ae_data)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!ae_data) {</div><div class='del'>-		pr_err("QAT: bad argument, ae_data is NULL\n");</div><div class='add'>+		pr_err("bad argument, ae_data is NULL\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -86,12 +91,11 @@ static int qat_uclo_check_uof_format(struct icp_qat_uof_filehdr *hdr)</div><div class='ctx'> 	int min = hdr-&gt;min_ver &amp; 0xff;</div><div class='ctx'> </div><div class='ctx'> 	if (hdr-&gt;file_id != ICP_QAT_UOF_FID) {</div><div class='del'>-		pr_err("QAT: Invalid header 0x%x\n", hdr-&gt;file_id);</div><div class='add'>+		pr_err("Invalid header 0x%x\n", hdr-&gt;file_id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (min != ICP_QAT_UOF_MINVER || maj != ICP_QAT_UOF_MAJVER) {</div><div class='del'>-		pr_err("QAT: bad UOF version, major 0x%x, minor 0x%x\n",</div><div class='del'>-		       maj, min);</div><div class='add'>+		pr_err("bad UOF version, major 0x%x, minor 0x%x\n", maj, min);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -103,20 +107,19 @@ static int qat_uclo_check_suof_format(struct icp_qat_suof_filehdr *suof_hdr)</div><div class='ctx'> 	int min = suof_hdr-&gt;min_ver &amp; 0xff;</div><div class='ctx'> </div><div class='ctx'> 	if (suof_hdr-&gt;file_id != ICP_QAT_SUOF_FID) {</div><div class='del'>-		pr_err("QAT: invalid header 0x%x\n", suof_hdr-&gt;file_id);</div><div class='add'>+		pr_err("invalid header 0x%x\n", suof_hdr-&gt;file_id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (suof_hdr-&gt;fw_type != 0) {</div><div class='del'>-		pr_err("QAT: unsupported firmware type\n");</div><div class='add'>+		pr_err("unsupported firmware type\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (suof_hdr-&gt;num_chunks &lt;= 0x1) {</div><div class='del'>-		pr_err("QAT: SUOF chunk amount is incorrect\n");</div><div class='add'>+		pr_err("SUOF chunk amount is incorrect\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (maj != ICP_QAT_SUOF_MAJVER || min != ICP_QAT_SUOF_MINVER) {</div><div class='del'>-		pr_err("QAT: bad SUOF version, major 0x%x, minor 0x%x\n",</div><div class='del'>-		       maj, min);</div><div class='add'>+		pr_err("bad SUOF version, major 0x%x, minor 0x%x\n", maj, min);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -223,24 +226,24 @@ static int qat_uclo_fetch_initmem_ae(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	char *str;</div><div class='ctx'> </div><div class='ctx'> 	if ((init_mem-&gt;addr + init_mem-&gt;num_in_bytes) &gt; (size_range &lt;&lt; 0x2)) {</div><div class='del'>-		pr_err("QAT: initmem is out of range");</div><div class='add'>+		pr_err("initmem is out of range");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (init_mem-&gt;scope != ICP_QAT_UOF_LOCAL_SCOPE) {</div><div class='del'>-		pr_err("QAT: Memory scope for init_mem error\n");</div><div class='add'>+		pr_err("Memory scope for init_mem error\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	str = qat_uclo_get_string(&amp;obj_handle-&gt;str_table, init_mem-&gt;sym_name);</div><div class='ctx'> 	if (!str) {</div><div class='del'>-		pr_err("QAT: AE name assigned in UOF init table is NULL\n");</div><div class='add'>+		pr_err("AE name assigned in UOF init table is NULL\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (qat_uclo_parse_num(str, ae)) {</div><div class='del'>-		pr_err("QAT: Parse num for AE number failed\n");</div><div class='add'>+		pr_err("Parse num for AE number failed\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (*ae &gt;= ICP_QAT_UCLO_MAX_AE) {</div><div class='del'>-		pr_err("QAT: ae %d out of range\n", *ae);</div><div class='add'>+		pr_err("ae %d out of range\n", *ae);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -356,8 +359,7 @@ static int qat_uclo_init_ae_memory(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("QAT: initmem region error. region type=0x%x\n",</div><div class='del'>-		       init_mem-&gt;region);</div><div class='add'>+		pr_err("initmem region error. region type=0x%x\n", init_mem-&gt;region);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -431,7 +433,7 @@ static int qat_uclo_init_memory(struct icp_qat_fw_loader_handle *handle)</div><div class='ctx'> 	for_each_set_bit(ae, &amp;ae_mask, handle-&gt;hal_handle-&gt;ae_max_num) {</div><div class='ctx'> 		if (qat_hal_batch_wr_lm(handle, ae,</div><div class='ctx'> 					obj_handle-&gt;lm_init_tab[ae])) {</div><div class='del'>-			pr_err("QAT: fail to batch init lmem for AE %d\n", ae);</div><div class='add'>+			pr_err("fail to batch init lmem for AE %d\n", ae);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		qat_uclo_cleanup_batch_init_list(handle,</div><div class='hunk'>@@ -539,26 +541,26 @@ qat_uclo_check_image_compat(struct icp_qat_uof_encap_obj *encap_uof_obj,</div><div class='ctx'> 		       code_page-&gt;imp_expr_tab_offset);</div><div class='ctx'> 	if (uc_var_tab-&gt;entry_num || imp_var_tab-&gt;entry_num ||</div><div class='ctx'> 	    imp_expr_tab-&gt;entry_num) {</div><div class='del'>-		pr_err("QAT: UOF can't contain imported variable to be parsed\n");</div><div class='add'>+		pr_err("UOF can't contain imported variable to be parsed\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	neigh_reg_tab = (struct icp_qat_uof_objtable *)</div><div class='ctx'> 			(encap_uof_obj-&gt;beg_uof +</div><div class='ctx'> 			code_page-&gt;neigh_reg_tab_offset);</div><div class='ctx'> 	if (neigh_reg_tab-&gt;entry_num) {</div><div class='del'>-		pr_err("QAT: UOF can't contain neighbor register table\n");</div><div class='add'>+		pr_err("UOF can't contain neighbor register table\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (image-&gt;numpages &gt; 1) {</div><div class='del'>-		pr_err("QAT: UOF can't contain multiple pages\n");</div><div class='add'>+		pr_err("UOF can't contain multiple pages\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ICP_QAT_SHARED_USTORE_MODE(image-&gt;ae_mode)) {</div><div class='del'>-		pr_err("QAT: UOF can't use shared control store feature\n");</div><div class='add'>+		pr_err("UOF can't use shared control store feature\n");</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (RELOADABLE_CTX_SHARED_MODE(image-&gt;ae_mode)) {</div><div class='del'>-		pr_err("QAT: UOF can't use reloadable feature\n");</div><div class='add'>+		pr_err("UOF can't use reloadable feature\n");</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -677,7 +679,7 @@ static int qat_uclo_map_ae(struct icp_qat_fw_loader_handle *handle, int max_ae)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!mflag) {</div><div class='del'>-		pr_err("QAT: uimage uses AE not set\n");</div><div class='add'>+		pr_err("uimage uses AE not set\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -731,14 +733,15 @@ qat_uclo_get_dev_type(struct icp_qat_fw_loader_handle *handle)</div><div class='ctx'> 		return ICP_QAT_AC_C62X_DEV_TYPE;</div><div class='ctx'> 	case PCI_DEVICE_ID_INTEL_QAT_C3XXX:</div><div class='ctx'> 		return ICP_QAT_AC_C3XXX_DEV_TYPE;</div><div class='del'>-	case ADF_4XXX_PCI_DEVICE_ID:</div><div class='del'>-	case ADF_401XX_PCI_DEVICE_ID:</div><div class='del'>-	case ADF_402XX_PCI_DEVICE_ID:</div><div class='del'>-	case ADF_420XX_PCI_DEVICE_ID:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_4XXX:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_401XX:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_402XX:</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_420XX:</div><div class='ctx'> 		return ICP_QAT_AC_4XXX_A_DEV_TYPE;</div><div class='add'>+	case PCI_DEVICE_ID_INTEL_QAT_6XXX:</div><div class='add'>+		return ICP_QAT_AC_6XXX_DEV_TYPE;</div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("QAT: unsupported device 0x%x\n",</div><div class='del'>-		       handle-&gt;pci_dev-&gt;device);</div><div class='add'>+		pr_err("unsupported device 0x%x\n", handle-&gt;pci_dev-&gt;device);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -748,7 +751,7 @@ static int qat_uclo_check_uof_compat(struct icp_qat_uclo_objhandle *obj_handle)</div><div class='ctx'> 	unsigned int maj_ver, prod_type = obj_handle-&gt;prod_type;</div><div class='ctx'> </div><div class='ctx'> 	if (!(prod_type &amp; obj_handle-&gt;encap_uof_obj.obj_hdr-&gt;ac_dev_type)) {</div><div class='del'>-		pr_err("QAT: UOF type 0x%x doesn't match with platform 0x%x\n",</div><div class='add'>+		pr_err("UOF type 0x%x doesn't match with platform 0x%x\n",</div><div class='ctx'> 		       obj_handle-&gt;encap_uof_obj.obj_hdr-&gt;ac_dev_type,</div><div class='ctx'> 		       prod_type);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -756,7 +759,7 @@ static int qat_uclo_check_uof_compat(struct icp_qat_uclo_objhandle *obj_handle)</div><div class='ctx'> 	maj_ver = obj_handle-&gt;prod_rev &amp; 0xff;</div><div class='ctx'> 	if (obj_handle-&gt;encap_uof_obj.obj_hdr-&gt;max_cpu_ver &lt; maj_ver ||</div><div class='ctx'> 	    obj_handle-&gt;encap_uof_obj.obj_hdr-&gt;min_cpu_ver &gt; maj_ver) {</div><div class='del'>-		pr_err("QAT: UOF majVer 0x%x out of range\n", maj_ver);</div><div class='add'>+		pr_err("UOF majVer 0x%x out of range\n", maj_ver);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -799,7 +802,7 @@ static int qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	case ICP_NEIGH_REL:</div><div class='ctx'> 		return qat_hal_init_nn(handle, ae, ctx_mask, reg_addr, value);</div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("QAT: UOF uses not supported reg type 0x%x\n", reg_type);</div><div class='add'>+		pr_err("UOF uses not supported reg type 0x%x\n", reg_type);</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -835,8 +838,7 @@ static int qat_uclo_init_reg_sym(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 		case ICP_QAT_UOF_INIT_REG_CTX:</div><div class='ctx'> 			/* check if ctx is appropriate for the ctxMode */</div><div class='ctx'> 			if (!((1 &lt;&lt; init_regsym-&gt;ctx) &amp; ctx_mask)) {</div><div class='del'>-				pr_err("QAT: invalid ctx num = 0x%x\n",</div><div class='del'>-				       init_regsym-&gt;ctx);</div><div class='add'>+				pr_err("invalid ctx num = 0x%x\n", init_regsym-&gt;ctx);</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='ctx'> 			qat_uclo_init_reg(handle, ae,</div><div class='hunk'>@@ -848,10 +850,10 @@ static int qat_uclo_init_reg_sym(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 					  exp_res);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ICP_QAT_UOF_INIT_EXPR:</div><div class='del'>-			pr_err("QAT: INIT_EXPR feature not supported\n");</div><div class='add'>+			pr_err("INIT_EXPR feature not supported\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		case ICP_QAT_UOF_INIT_EXPR_ENDIAN_SWAP:</div><div class='del'>-			pr_err("QAT: INIT_EXPR_ENDIAN_SWAP feature not supported\n");</div><div class='add'>+			pr_err("INIT_EXPR_ENDIAN_SWAP feature not supported\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -871,7 +873,7 @@ static int qat_uclo_init_globals(struct icp_qat_fw_loader_handle *handle)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (obj_handle-&gt;init_mem_tab.entry_num) {</div><div class='ctx'> 		if (qat_uclo_init_memory(handle)) {</div><div class='del'>-			pr_err("QAT: initialize memory failed\n");</div><div class='add'>+			pr_err("initialize memory failed\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -900,40 +902,40 @@ static int qat_hal_set_modes(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	mode = ICP_QAT_CTX_MODE(uof_image-&gt;ae_mode);</div><div class='ctx'> 	ret = qat_hal_set_ae_ctx_mode(handle, ae, mode);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("QAT: qat_hal_set_ae_ctx_mode error\n");</div><div class='add'>+		pr_err("qat_hal_set_ae_ctx_mode error\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (handle-&gt;chip_info-&gt;nn) {</div><div class='ctx'> 		mode = ICP_QAT_NN_MODE(uof_image-&gt;ae_mode);</div><div class='ctx'> 		ret = qat_hal_set_ae_nn_mode(handle, ae, mode);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			pr_err("QAT: qat_hal_set_ae_nn_mode error\n");</div><div class='add'>+			pr_err("qat_hal_set_ae_nn_mode error\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	mode = ICP_QAT_LOC_MEM0_MODE(uof_image-&gt;ae_mode);</div><div class='ctx'> 	ret = qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM0, mode);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("QAT: qat_hal_set_ae_lm_mode LMEM0 error\n");</div><div class='add'>+		pr_err("qat_hal_set_ae_lm_mode LMEM0 error\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	mode = ICP_QAT_LOC_MEM1_MODE(uof_image-&gt;ae_mode);</div><div class='ctx'> 	ret = qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM1, mode);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pr_err("QAT: qat_hal_set_ae_lm_mode LMEM1 error\n");</div><div class='add'>+		pr_err("qat_hal_set_ae_lm_mode LMEM1 error\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (handle-&gt;chip_info-&gt;lm2lm3) {</div><div class='ctx'> 		mode = ICP_QAT_LOC_MEM2_MODE(uof_image-&gt;ae_mode);</div><div class='ctx'> 		ret = qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM2, mode);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			pr_err("QAT: qat_hal_set_ae_lm_mode LMEM2 error\n");</div><div class='add'>+			pr_err("qat_hal_set_ae_lm_mode LMEM2 error\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 		mode = ICP_QAT_LOC_MEM3_MODE(uof_image-&gt;ae_mode);</div><div class='ctx'> 		ret = qat_hal_set_ae_lm_mode(handle, ae, ICP_LMEM3, mode);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			pr_err("QAT: qat_hal_set_ae_lm_mode LMEM3 error\n");</div><div class='add'>+			pr_err("qat_hal_set_ae_lm_mode LMEM3 error\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 		mode = ICP_QAT_LOC_TINDEX_MODE(uof_image-&gt;ae_mode);</div><div class='hunk'>@@ -997,7 +999,7 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle)</div><div class='ctx'> 	obj_handle-&gt;prod_rev = PID_MAJOR_REV |</div><div class='ctx'> 			(PID_MINOR_REV &amp; handle-&gt;hal_handle-&gt;revision_id);</div><div class='ctx'> 	if (qat_uclo_check_uof_compat(obj_handle)) {</div><div class='del'>-		pr_err("QAT: UOF incompatible\n");</div><div class='add'>+		pr_err("UOF incompatible\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	obj_handle-&gt;uword_buf = kcalloc(UWORD_CPYBUF_SIZE, sizeof(u64),</div><div class='hunk'>@@ -1008,7 +1010,7 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle)</div><div class='ctx'> 	if (!obj_handle-&gt;obj_hdr-&gt;file_buff ||</div><div class='ctx'> 	    !qat_uclo_map_str_table(obj_handle-&gt;obj_hdr, ICP_QAT_UOF_STRT,</div><div class='ctx'> 				    &amp;obj_handle-&gt;str_table)) {</div><div class='del'>-		pr_err("QAT: UOF doesn't have effective images\n");</div><div class='add'>+		pr_err("UOF doesn't have effective images\n");</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> 	}</div><div class='ctx'> 	obj_handle-&gt;uimage_num =</div><div class='hunk'>@@ -1017,7 +1019,7 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle)</div><div class='ctx'> 	if (!obj_handle-&gt;uimage_num)</div><div class='ctx'> 		goto out_err;</div><div class='ctx'> 	if (qat_uclo_map_ae(handle, handle-&gt;hal_handle-&gt;ae_max_num)) {</div><div class='del'>-		pr_err("QAT: Bad object\n");</div><div class='add'>+		pr_err("Bad object\n");</div><div class='ctx'> 		goto out_check_uof_aemask_err;</div><div class='ctx'> 	}</div><div class='ctx'> 	qat_uclo_init_uword_num(handle);</div><div class='hunk'>@@ -1034,6 +1036,36 @@ out_err:</div><div class='ctx'> 	return -EFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int qat_uclo_simg_hdr2sign_len(struct icp_qat_fw_loader_handle *handle)</div><div class='add'>+{</div><div class='add'>+	if (handle-&gt;chip_info-&gt;dual_sign)</div><div class='add'>+		return ICP_QAT_DUALSIGN_OPAQUE_DATA_LEN;</div><div class='add'>+</div><div class='add'>+	return ICP_QAT_AE_IMG_OFFSET(handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int qat_uclo_simg_hdr2cont_len(struct icp_qat_fw_loader_handle *handle)</div><div class='add'>+{</div><div class='add'>+	if (handle-&gt;chip_info-&gt;dual_sign)</div><div class='add'>+		return ICP_QAT_DUALSIGN_OPAQUE_DATA_LEN + ICP_QAT_DUALSIGN_MISC_INFO_LEN;</div><div class='add'>+</div><div class='add'>+	return ICP_QAT_AE_IMG_OFFSET(handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int qat_uclo_simg_fw_type(struct icp_qat_fw_loader_handle *handle, void *img_ptr)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_css_hdr *hdr = img_ptr;</div><div class='add'>+	char *fw_hdr = img_ptr;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+</div><div class='add'>+	if (handle-&gt;chip_info-&gt;dual_sign) {</div><div class='add'>+		offset = qat_uclo_simg_hdr2sign_len(handle) + ICP_QAT_DUALSIGN_FW_TYPE_LEN;</div><div class='add'>+		return *(fw_hdr + offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return hdr-&gt;fw_type;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int qat_uclo_map_suof_file_hdr(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 				      struct icp_qat_suof_filehdr *suof_ptr,</div><div class='ctx'> 				      int suof_size)</div><div class='hunk'>@@ -1050,7 +1082,7 @@ static int qat_uclo_map_suof_file_hdr(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	check_sum = qat_uclo_calc_str_checksum((char *)&amp;suof_ptr-&gt;min_ver,</div><div class='ctx'> 					       min_ver_offset);</div><div class='ctx'> 	if (check_sum != suof_ptr-&gt;check_sum) {</div><div class='del'>-		pr_err("QAT: incorrect SUOF checksum\n");</div><div class='add'>+		pr_err("incorrect SUOF checksum\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	suof_handle-&gt;check_sum = suof_ptr-&gt;check_sum;</div><div class='hunk'>@@ -1065,9 +1097,9 @@ static void qat_uclo_map_simg(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 			      struct icp_qat_suof_chunk_hdr *suof_chunk_hdr)</div><div class='ctx'> {</div><div class='ctx'> 	struct icp_qat_suof_handle *suof_handle = handle-&gt;sobj_handle;</div><div class='del'>-	unsigned int offset = ICP_QAT_AE_IMG_OFFSET(handle);</div><div class='del'>-	struct icp_qat_simg_ae_mode *ae_mode;</div><div class='add'>+	unsigned int offset = qat_uclo_simg_hdr2cont_len(handle);</div><div class='ctx'> 	struct icp_qat_suof_objhdr *suof_objhdr;</div><div class='add'>+	struct icp_qat_simg_ae_mode *ae_mode;</div><div class='ctx'> </div><div class='ctx'> 	suof_img_hdr-&gt;simg_buf  = (suof_handle-&gt;suof_buf +</div><div class='ctx'> 				   suof_chunk_hdr-&gt;offset +</div><div class='hunk'>@@ -1112,14 +1144,13 @@ static int qat_uclo_check_simg_compat(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	prod_rev = PID_MAJOR_REV |</div><div class='ctx'> 			 (PID_MINOR_REV &amp; handle-&gt;hal_handle-&gt;revision_id);</div><div class='ctx'> 	if (img_ae_mode-&gt;dev_type != prod_type) {</div><div class='del'>-		pr_err("QAT: incompatible product type %x\n",</div><div class='del'>-		       img_ae_mode-&gt;dev_type);</div><div class='add'>+		pr_err("incompatible product type %x\n", img_ae_mode-&gt;dev_type);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	maj_ver = prod_rev &amp; 0xff;</div><div class='ctx'> 	if (maj_ver &gt; img_ae_mode-&gt;devmax_ver ||</div><div class='ctx'> 	    maj_ver &lt; img_ae_mode-&gt;devmin_ver) {</div><div class='del'>-		pr_err("QAT: incompatible device majver 0x%x\n", maj_ver);</div><div class='add'>+		pr_err("incompatible device majver 0x%x\n", maj_ver);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1162,7 +1193,7 @@ static int qat_uclo_map_suof(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	struct icp_qat_suof_img_hdr img_header;</div><div class='ctx'> </div><div class='ctx'> 	if (!suof_ptr || suof_size == 0) {</div><div class='del'>-		pr_err("QAT: input parameter SUOF pointer/size is NULL\n");</div><div class='add'>+		pr_err("input parameter SUOF pointer/size is NULL\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (qat_uclo_check_suof_format(suof_ptr))</div><div class='hunk'>@@ -1205,7 +1236,6 @@ static int qat_uclo_map_suof(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define ADD_ADDR(high, low)  ((((u64)high) &lt;&lt; 32) + low)</div><div class='del'>-#define BITS_IN_DWORD 32</div><div class='ctx'> </div><div class='ctx'> static int qat_uclo_auth_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 			    struct icp_qat_fw_auth_desc *desc)</div><div class='hunk'>@@ -1223,7 +1253,7 @@ static int qat_uclo_auth_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	fcu_dram_hi_csr = handle-&gt;chip_info-&gt;fcu_dram_addr_hi;</div><div class='ctx'> 	fcu_dram_lo_csr = handle-&gt;chip_info-&gt;fcu_dram_addr_lo;</div><div class='ctx'> </div><div class='del'>-	SET_CAP_CSR(handle, fcu_dram_hi_csr, (bus_addr &gt;&gt; BITS_IN_DWORD));</div><div class='add'>+	SET_CAP_CSR(handle, fcu_dram_hi_csr, bus_addr &gt;&gt; BITS_PER_TYPE(u32));</div><div class='ctx'> 	SET_CAP_CSR(handle, fcu_dram_lo_csr, bus_addr);</div><div class='ctx'> 	SET_CAP_CSR(handle, fcu_ctl_csr, FCU_CTRL_CMD_AUTH);</div><div class='ctx'> </div><div class='hunk'>@@ -1237,7 +1267,7 @@ static int qat_uclo_auth_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 				return 0;</div><div class='ctx'> 	} while (retry++ &lt; FW_AUTH_MAX_RETRY);</div><div class='ctx'> auth_fail:</div><div class='del'>-	pr_err("QAT: authentication error (FCU_STATUS = 0x%x),retry = %d\n",</div><div class='add'>+	pr_err("authentication error (FCU_STATUS = 0x%x),retry = %d\n",</div><div class='ctx'> 	       fcu_sts &amp; FCU_AUTH_STS_MASK, retry);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='hunk'>@@ -1273,14 +1303,13 @@ static int qat_uclo_broadcast_load_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 		fcu_sts_csr = handle-&gt;chip_info-&gt;fcu_sts_csr;</div><div class='ctx'> 		fcu_loaded_csr = handle-&gt;chip_info-&gt;fcu_loaded_ae_csr;</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_err("Chip 0x%x doesn't support broadcast load\n",</div><div class='del'>-		       handle-&gt;pci_dev-&gt;device);</div><div class='add'>+		pr_err("Chip 0x%x doesn't support broadcast load\n", handle-&gt;pci_dev-&gt;device);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(ae, &amp;ae_mask, handle-&gt;hal_handle-&gt;ae_max_num) {</div><div class='ctx'> 		if (qat_hal_check_ae_active(handle, (unsigned char)ae)) {</div><div class='del'>-			pr_err("QAT: Broadcast load failed. AE is not enabled or active.\n");</div><div class='add'>+			pr_err("Broadcast load failed. AE is not enabled or active.\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1312,7 +1341,7 @@ static int qat_uclo_broadcast_load_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 		} while (retry++ &lt; FW_AUTH_MAX_RETRY);</div><div class='ctx'> </div><div class='ctx'> 		if (retry &gt; FW_AUTH_MAX_RETRY) {</div><div class='del'>-			pr_err("QAT: broadcast load failed timeout %d\n", retry);</div><div class='add'>+			pr_err("broadcast load failed timeout %d\n", retry);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1366,24 +1395,38 @@ static void qat_uclo_ummap_auth_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qat_uclo_check_image(struct icp_qat_fw_loader_handle *handle,</div><div class='del'>-				char *image, unsigned int size,</div><div class='add'>+				void *image, unsigned int size,</div><div class='ctx'> 				unsigned int fw_type)</div><div class='ctx'> {</div><div class='ctx'> 	char *fw_type_name = fw_type ? "MMP" : "AE";</div><div class='ctx'> 	unsigned int css_dword_size = sizeof(u32);</div><div class='add'>+	unsigned int header_len, simg_type;</div><div class='add'>+	struct icp_qat_css_hdr *css_hdr;</div><div class='ctx'> </div><div class='ctx'> 	if (handle-&gt;chip_info-&gt;fw_auth) {</div><div class='del'>-		struct icp_qat_css_hdr *css_hdr = (struct icp_qat_css_hdr *)image;</div><div class='del'>-		unsigned int header_len = ICP_QAT_AE_IMG_OFFSET(handle);</div><div class='add'>+		header_len = qat_uclo_simg_hdr2sign_len(handle);</div><div class='add'>+		simg_type = qat_uclo_simg_fw_type(handle, image);</div><div class='add'>+		css_hdr = image;</div><div class='add'>+</div><div class='add'>+		if (handle-&gt;chip_info-&gt;dual_sign) {</div><div class='add'>+			if (css_hdr-&gt;module_type != ICP_QAT_DUALSIGN_MODULE_TYPE)</div><div class='add'>+				goto err;</div><div class='add'>+			if (css_hdr-&gt;header_len != ICP_QAT_DUALSIGN_HDR_LEN)</div><div class='add'>+				goto err;</div><div class='add'>+			if (css_hdr-&gt;header_ver != ICP_QAT_DUALSIGN_HDR_VER)</div><div class='add'>+				goto err;</div><div class='add'>+		} else {</div><div class='add'>+			if (css_hdr-&gt;header_len * css_dword_size != header_len)</div><div class='add'>+				goto err;</div><div class='add'>+			if (css_hdr-&gt;size * css_dword_size != size)</div><div class='add'>+				goto err;</div><div class='add'>+			if (size &lt;= header_len)</div><div class='add'>+				goto err;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if ((css_hdr-&gt;header_len * css_dword_size) != header_len)</div><div class='del'>-			goto err;</div><div class='del'>-		if ((css_hdr-&gt;size * css_dword_size) != size)</div><div class='del'>-			goto err;</div><div class='del'>-		if (fw_type != css_hdr-&gt;fw_type)</div><div class='del'>-			goto err;</div><div class='del'>-		if (size &lt;= header_len)</div><div class='add'>+		if (fw_type != simg_type)</div><div class='ctx'> 			goto err;</div><div class='add'>+</div><div class='ctx'> 		size -= header_len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1397,123 +1440,95 @@ static int qat_uclo_check_image(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 		if (size &gt; ICP_QAT_CSS_RSA3K_MAX_IMAGE_LEN)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_err("QAT: Unsupported firmware type\n");</div><div class='add'>+		pr_err("Unsupported firmware type\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	pr_err("QAT: Invalid %s firmware image\n", fw_type_name);</div><div class='add'>+	pr_err("Invalid %s firmware image\n", fw_type_name);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qat_uclo_map_auth_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='del'>-				char *image, unsigned int size,</div><div class='del'>-				struct icp_qat_fw_auth_desc **desc)</div><div class='add'>+static int qat_uclo_build_auth_desc_RSA(struct icp_qat_fw_loader_handle *handle,</div><div class='add'>+					char *image, unsigned int size,</div><div class='add'>+					struct icp_firml_dram_desc *dram_desc,</div><div class='add'>+					unsigned int fw_type, struct icp_qat_fw_auth_desc **desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct icp_qat_css_hdr *css_hdr = (struct icp_qat_css_hdr *)image;</div><div class='del'>-	struct icp_qat_fw_auth_desc *auth_desc;</div><div class='del'>-	struct icp_qat_auth_chunk *auth_chunk;</div><div class='del'>-	u64 virt_addr,  bus_addr, virt_base;</div><div class='del'>-	unsigned int simg_offset = sizeof(*auth_chunk);</div><div class='ctx'> 	struct icp_qat_simg_ae_mode *simg_ae_mode;</div><div class='del'>-	struct icp_firml_dram_desc img_desc;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = qat_uclo_simg_alloc(handle, &amp;img_desc, ICP_QAT_CSS_RSA4K_MAX_IMAGE_LEN);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("QAT: error, allocate continuous dram fail\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!IS_ALIGNED(img_desc.dram_size, 8) || !img_desc.dram_bus_addr) {</div><div class='del'>-		pr_debug("QAT: invalid address\n");</div><div class='del'>-		qat_uclo_simg_free(handle, &amp;img_desc);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	struct icp_qat_fw_auth_desc *auth_desc;</div><div class='add'>+	char *virt_addr, *virt_base;</div><div class='add'>+	u64 bus_addr;</div><div class='ctx'> </div><div class='del'>-	auth_chunk = img_desc.dram_base_addr_v;</div><div class='del'>-	auth_chunk-&gt;chunk_size = img_desc.dram_size;</div><div class='del'>-	auth_chunk-&gt;chunk_bus_addr = img_desc.dram_bus_addr;</div><div class='del'>-	virt_base = (uintptr_t)img_desc.dram_base_addr_v + simg_offset;</div><div class='del'>-	bus_addr  = img_desc.dram_bus_addr + simg_offset;</div><div class='del'>-	auth_desc = img_desc.dram_base_addr_v;</div><div class='del'>-	auth_desc-&gt;css_hdr_high = (unsigned int)(bus_addr &gt;&gt; BITS_IN_DWORD);</div><div class='del'>-	auth_desc-&gt;css_hdr_low = (unsigned int)bus_addr;</div><div class='add'>+	virt_base = dram_desc-&gt;dram_base_addr_v;</div><div class='add'>+	virt_base += sizeof(struct icp_qat_auth_chunk);</div><div class='add'>+	bus_addr  = dram_desc-&gt;dram_bus_addr + sizeof(struct icp_qat_auth_chunk);</div><div class='add'>+	auth_desc = dram_desc-&gt;dram_base_addr_v;</div><div class='add'>+	auth_desc-&gt;css_hdr_high = upper_32_bits(bus_addr);</div><div class='add'>+	auth_desc-&gt;css_hdr_low = lower_32_bits(bus_addr);</div><div class='ctx'> 	virt_addr = virt_base;</div><div class='ctx'> </div><div class='del'>-	memcpy((void *)(uintptr_t)virt_addr, image, sizeof(*css_hdr));</div><div class='add'>+	memcpy(virt_addr, image, sizeof(*css_hdr));</div><div class='ctx'> 	/* pub key */</div><div class='ctx'> 	bus_addr = ADD_ADDR(auth_desc-&gt;css_hdr_high, auth_desc-&gt;css_hdr_low) +</div><div class='ctx'> 			   sizeof(*css_hdr);</div><div class='ctx'> 	virt_addr = virt_addr + sizeof(*css_hdr);</div><div class='ctx'> </div><div class='del'>-	auth_desc-&gt;fwsk_pub_high = (unsigned int)(bus_addr &gt;&gt; BITS_IN_DWORD);</div><div class='del'>-	auth_desc-&gt;fwsk_pub_low = (unsigned int)bus_addr;</div><div class='add'>+	auth_desc-&gt;fwsk_pub_high = upper_32_bits(bus_addr);</div><div class='add'>+	auth_desc-&gt;fwsk_pub_low = lower_32_bits(bus_addr);</div><div class='ctx'> </div><div class='del'>-	memcpy((void *)(uintptr_t)virt_addr,</div><div class='del'>-	       (void *)(image + sizeof(*css_hdr)),</div><div class='del'>-	       ICP_QAT_CSS_FWSK_MODULUS_LEN(handle));</div><div class='add'>+	memcpy(virt_addr, image + sizeof(*css_hdr), ICP_QAT_CSS_FWSK_MODULUS_LEN(handle));</div><div class='ctx'> 	/* padding */</div><div class='ctx'> 	memset((void *)(uintptr_t)(virt_addr + ICP_QAT_CSS_FWSK_MODULUS_LEN(handle)),</div><div class='ctx'> 	       0, ICP_QAT_CSS_FWSK_PAD_LEN(handle));</div><div class='ctx'> </div><div class='ctx'> 	/* exponent */</div><div class='del'>-	memcpy((void *)(uintptr_t)(virt_addr + ICP_QAT_CSS_FWSK_MODULUS_LEN(handle) +</div><div class='del'>-	       ICP_QAT_CSS_FWSK_PAD_LEN(handle)),</div><div class='del'>-	       (void *)(image + sizeof(*css_hdr) +</div><div class='del'>-			ICP_QAT_CSS_FWSK_MODULUS_LEN(handle)),</div><div class='del'>-	       sizeof(unsigned int));</div><div class='add'>+	memcpy(virt_addr + ICP_QAT_CSS_FWSK_MODULUS_LEN(handle) +</div><div class='add'>+	       ICP_QAT_CSS_FWSK_PAD_LEN(handle), image + sizeof(*css_hdr) +</div><div class='add'>+	       ICP_QAT_CSS_FWSK_MODULUS_LEN(handle), sizeof(unsigned int));</div><div class='ctx'> </div><div class='ctx'> 	/* signature */</div><div class='ctx'> 	bus_addr = ADD_ADDR(auth_desc-&gt;fwsk_pub_high,</div><div class='ctx'> 			    auth_desc-&gt;fwsk_pub_low) +</div><div class='ctx'> 		   ICP_QAT_CSS_FWSK_PUB_LEN(handle);</div><div class='ctx'> 	virt_addr = virt_addr + ICP_QAT_CSS_FWSK_PUB_LEN(handle);</div><div class='del'>-	auth_desc-&gt;signature_high = (unsigned int)(bus_addr &gt;&gt; BITS_IN_DWORD);</div><div class='del'>-	auth_desc-&gt;signature_low = (unsigned int)bus_addr;</div><div class='add'>+	auth_desc-&gt;signature_high = upper_32_bits(bus_addr);</div><div class='add'>+	auth_desc-&gt;signature_low = lower_32_bits(bus_addr);</div><div class='ctx'> </div><div class='del'>-	memcpy((void *)(uintptr_t)virt_addr,</div><div class='del'>-	       (void *)(image + sizeof(*css_hdr) +</div><div class='del'>-	       ICP_QAT_CSS_FWSK_MODULUS_LEN(handle) +</div><div class='del'>-	       ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle)),</div><div class='del'>-	       ICP_QAT_CSS_SIGNATURE_LEN(handle));</div><div class='add'>+	memcpy(virt_addr, image + sizeof(*css_hdr) + ICP_QAT_CSS_FWSK_MODULUS_LEN(handle) +</div><div class='add'>+	       ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle), ICP_QAT_CSS_SIGNATURE_LEN(handle));</div><div class='ctx'> </div><div class='ctx'> 	bus_addr = ADD_ADDR(auth_desc-&gt;signature_high,</div><div class='ctx'> 			    auth_desc-&gt;signature_low) +</div><div class='ctx'> 		   ICP_QAT_CSS_SIGNATURE_LEN(handle);</div><div class='ctx'> 	virt_addr += ICP_QAT_CSS_SIGNATURE_LEN(handle);</div><div class='ctx'> </div><div class='del'>-	auth_desc-&gt;img_high = (unsigned int)(bus_addr &gt;&gt; BITS_IN_DWORD);</div><div class='del'>-	auth_desc-&gt;img_low = (unsigned int)bus_addr;</div><div class='del'>-	auth_desc-&gt;img_len = size - ICP_QAT_AE_IMG_OFFSET(handle);</div><div class='del'>-	if (bus_addr + auth_desc-&gt;img_len &gt; img_desc.dram_bus_addr +</div><div class='del'>-					    ICP_QAT_CSS_RSA4K_MAX_IMAGE_LEN) {</div><div class='del'>-		pr_err("QAT: insufficient memory size for authentication data\n");</div><div class='del'>-		qat_uclo_simg_free(handle, &amp;img_desc);</div><div class='add'>+	auth_desc-&gt;img_high = upper_32_bits(bus_addr);</div><div class='add'>+	auth_desc-&gt;img_low = lower_32_bits(bus_addr);</div><div class='add'>+	auth_desc-&gt;img_len = size - qat_uclo_simg_hdr2sign_len(handle);</div><div class='add'>+	if (bus_addr + auth_desc-&gt;img_len &gt;</div><div class='add'>+	    dram_desc-&gt;dram_bus_addr + ICP_QAT_CSS_RSA4K_MAX_IMAGE_LEN) {</div><div class='add'>+		pr_err("insufficient memory size for authentication data\n");</div><div class='add'>+		qat_uclo_simg_free(handle, dram_desc);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memcpy((void *)(uintptr_t)virt_addr,</div><div class='del'>-	       (void *)(image + ICP_QAT_AE_IMG_OFFSET(handle)),</div><div class='del'>-	       auth_desc-&gt;img_len);</div><div class='add'>+	memcpy(virt_addr, image + qat_uclo_simg_hdr2sign_len(handle), auth_desc-&gt;img_len);</div><div class='ctx'> 	virt_addr = virt_base;</div><div class='ctx'> 	/* AE firmware */</div><div class='del'>-	if (((struct icp_qat_css_hdr *)(uintptr_t)virt_addr)-&gt;fw_type ==</div><div class='del'>-	    CSS_AE_FIRMWARE) {</div><div class='add'>+	if (fw_type == CSS_AE_FIRMWARE) {</div><div class='ctx'> 		auth_desc-&gt;img_ae_mode_data_high = auth_desc-&gt;img_high;</div><div class='ctx'> 		auth_desc-&gt;img_ae_mode_data_low = auth_desc-&gt;img_low;</div><div class='ctx'> 		bus_addr = ADD_ADDR(auth_desc-&gt;img_ae_mode_data_high,</div><div class='ctx'> 				    auth_desc-&gt;img_ae_mode_data_low) +</div><div class='ctx'> 			   sizeof(struct icp_qat_simg_ae_mode);</div><div class='ctx'> </div><div class='del'>-		auth_desc-&gt;img_ae_init_data_high = (unsigned int)</div><div class='del'>-						 (bus_addr &gt;&gt; BITS_IN_DWORD);</div><div class='del'>-		auth_desc-&gt;img_ae_init_data_low = (unsigned int)bus_addr;</div><div class='add'>+		auth_desc-&gt;img_ae_init_data_high = upper_32_bits(bus_addr);</div><div class='add'>+		auth_desc-&gt;img_ae_init_data_low = lower_32_bits(bus_addr);</div><div class='ctx'> 		bus_addr += ICP_QAT_SIMG_AE_INIT_SEQ_LEN;</div><div class='del'>-		auth_desc-&gt;img_ae_insts_high = (unsigned int)</div><div class='del'>-					     (bus_addr &gt;&gt; BITS_IN_DWORD);</div><div class='del'>-		auth_desc-&gt;img_ae_insts_low = (unsigned int)bus_addr;</div><div class='add'>+		auth_desc-&gt;img_ae_insts_high = upper_32_bits(bus_addr);</div><div class='add'>+		auth_desc-&gt;img_ae_insts_low = lower_32_bits(bus_addr);</div><div class='ctx'> 		virt_addr += sizeof(struct icp_qat_css_hdr);</div><div class='ctx'> 		virt_addr += ICP_QAT_CSS_FWSK_PUB_LEN(handle);</div><div class='ctx'> 		virt_addr += ICP_QAT_CSS_SIGNATURE_LEN(handle);</div><div class='hunk'>@@ -1527,6 +1542,141 @@ static int qat_uclo_map_auth_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qat_uclo_build_auth_desc_dualsign(struct icp_qat_fw_loader_handle *handle,</div><div class='add'>+					     char *image, unsigned int size,</div><div class='add'>+					     struct icp_firml_dram_desc *dram_desc,</div><div class='add'>+					     unsigned int fw_type,</div><div class='add'>+					     struct icp_qat_fw_auth_desc **desc)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_simg_ae_mode *simg_ae_mode;</div><div class='add'>+	struct icp_qat_fw_auth_desc *auth_desc;</div><div class='add'>+	unsigned int chunk_offset, img_offset;</div><div class='add'>+	u64 bus_addr, addr;</div><div class='add'>+	char *virt_addr;</div><div class='add'>+</div><div class='add'>+	virt_addr = dram_desc-&gt;dram_base_addr_v;</div><div class='add'>+	virt_addr += sizeof(struct icp_qat_auth_chunk);</div><div class='add'>+	bus_addr  = dram_desc-&gt;dram_bus_addr + sizeof(struct icp_qat_auth_chunk);</div><div class='add'>+</div><div class='add'>+	auth_desc = dram_desc-&gt;dram_base_addr_v;</div><div class='add'>+	auth_desc-&gt;img_len = size - qat_uclo_simg_hdr2sign_len(handle);</div><div class='add'>+	auth_desc-&gt;css_hdr_high = upper_32_bits(bus_addr);</div><div class='add'>+	auth_desc-&gt;css_hdr_low = lower_32_bits(bus_addr);</div><div class='add'>+	memcpy(virt_addr, image, ICP_QAT_DUALSIGN_OPAQUE_HDR_LEN);</div><div class='add'>+</div><div class='add'>+	img_offset = ICP_QAT_DUALSIGN_OPAQUE_HDR_LEN;</div><div class='add'>+	chunk_offset = ICP_QAT_DUALSIGN_OPAQUE_HDR_ALIGN_LEN;</div><div class='add'>+</div><div class='add'>+	/* RSA pub key */</div><div class='add'>+	addr = bus_addr + chunk_offset;</div><div class='add'>+	auth_desc-&gt;fwsk_pub_high = upper_32_bits(addr);</div><div class='add'>+	auth_desc-&gt;fwsk_pub_low = lower_32_bits(addr);</div><div class='add'>+	memcpy(virt_addr + chunk_offset, image + img_offset, ICP_QAT_CSS_FWSK_MODULUS_LEN(handle));</div><div class='add'>+</div><div class='add'>+	img_offset += ICP_QAT_CSS_FWSK_MODULUS_LEN(handle);</div><div class='add'>+	chunk_offset += ICP_QAT_CSS_FWSK_MODULUS_LEN(handle);</div><div class='add'>+	/* RSA padding */</div><div class='add'>+	memset(virt_addr + chunk_offset, 0, ICP_QAT_CSS_FWSK_PAD_LEN(handle));</div><div class='add'>+</div><div class='add'>+	chunk_offset += ICP_QAT_CSS_FWSK_PAD_LEN(handle);</div><div class='add'>+	/* RSA exponent */</div><div class='add'>+	memcpy(virt_addr + chunk_offset, image + img_offset, ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle));</div><div class='add'>+</div><div class='add'>+	img_offset += ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle);</div><div class='add'>+	chunk_offset += ICP_QAT_CSS_FWSK_EXPONENT_LEN(handle);</div><div class='add'>+	/* RSA signature */</div><div class='add'>+	addr = bus_addr + chunk_offset;</div><div class='add'>+	auth_desc-&gt;signature_high = upper_32_bits(addr);</div><div class='add'>+	auth_desc-&gt;signature_low = lower_32_bits(addr);</div><div class='add'>+	memcpy(virt_addr + chunk_offset, image + img_offset, ICP_QAT_CSS_SIGNATURE_LEN(handle));</div><div class='add'>+</div><div class='add'>+	img_offset += ICP_QAT_CSS_SIGNATURE_LEN(handle);</div><div class='add'>+	chunk_offset += ICP_QAT_CSS_SIGNATURE_LEN(handle);</div><div class='add'>+	/* XMSS pubkey */</div><div class='add'>+	addr = bus_addr + chunk_offset;</div><div class='add'>+	auth_desc-&gt;xmss_pubkey_high = upper_32_bits(addr);</div><div class='add'>+	auth_desc-&gt;xmss_pubkey_low = lower_32_bits(addr);</div><div class='add'>+	memcpy(virt_addr + chunk_offset, image + img_offset, ICP_QAT_DUALSIGN_XMSS_PUBKEY_LEN);</div><div class='add'>+</div><div class='add'>+	img_offset += ICP_QAT_DUALSIGN_XMSS_PUBKEY_LEN;</div><div class='add'>+	chunk_offset += ICP_QAT_DUALSIGN_XMSS_PUBKEY_LEN;</div><div class='add'>+	/* XMSS signature */</div><div class='add'>+	addr = bus_addr + chunk_offset;</div><div class='add'>+	auth_desc-&gt;xmss_sig_high = upper_32_bits(addr);</div><div class='add'>+	auth_desc-&gt;xmss_sig_low = lower_32_bits(addr);</div><div class='add'>+	memcpy(virt_addr + chunk_offset, image + img_offset, ICP_QAT_DUALSIGN_XMSS_SIG_LEN);</div><div class='add'>+</div><div class='add'>+	img_offset += ICP_QAT_DUALSIGN_XMSS_SIG_LEN;</div><div class='add'>+	chunk_offset += ICP_QAT_DUALSIGN_XMSS_SIG_ALIGN_LEN;</div><div class='add'>+</div><div class='add'>+	if (dram_desc-&gt;dram_size &lt; (chunk_offset + auth_desc-&gt;img_len)) {</div><div class='add'>+		pr_err("auth chunk memory size is not enough to store data\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Signed data */</div><div class='add'>+	addr = bus_addr + chunk_offset;</div><div class='add'>+	auth_desc-&gt;img_high = upper_32_bits(addr);</div><div class='add'>+	auth_desc-&gt;img_low = lower_32_bits(addr);</div><div class='add'>+	memcpy(virt_addr + chunk_offset, image + img_offset, auth_desc-&gt;img_len);</div><div class='add'>+</div><div class='add'>+	chunk_offset += ICP_QAT_DUALSIGN_MISC_INFO_LEN;</div><div class='add'>+	/* AE firmware */</div><div class='add'>+	if (fw_type == CSS_AE_FIRMWARE) {</div><div class='add'>+		/* AE mode data */</div><div class='add'>+		addr = bus_addr + chunk_offset;</div><div class='add'>+		auth_desc-&gt;img_ae_mode_data_high = upper_32_bits(addr);</div><div class='add'>+		auth_desc-&gt;img_ae_mode_data_low = lower_32_bits(addr);</div><div class='add'>+		simg_ae_mode =</div><div class='add'>+			(struct icp_qat_simg_ae_mode *)(virt_addr + chunk_offset);</div><div class='add'>+		auth_desc-&gt;ae_mask = simg_ae_mode-&gt;ae_mask &amp; handle-&gt;cfg_ae_mask;</div><div class='add'>+</div><div class='add'>+		chunk_offset += sizeof(struct icp_qat_simg_ae_mode);</div><div class='add'>+		/* AE init seq */</div><div class='add'>+		addr = bus_addr + chunk_offset;</div><div class='add'>+		auth_desc-&gt;img_ae_init_data_high = upper_32_bits(addr);</div><div class='add'>+		auth_desc-&gt;img_ae_init_data_low = lower_32_bits(addr);</div><div class='add'>+</div><div class='add'>+		chunk_offset += ICP_QAT_SIMG_AE_INIT_SEQ_LEN;</div><div class='add'>+		/* AE instructions */</div><div class='add'>+		addr = bus_addr + chunk_offset;</div><div class='add'>+		auth_desc-&gt;img_ae_insts_high = upper_32_bits(addr);</div><div class='add'>+		auth_desc-&gt;img_ae_insts_low = lower_32_bits(addr);</div><div class='add'>+	} else {</div><div class='add'>+		addr = bus_addr + chunk_offset;</div><div class='add'>+		auth_desc-&gt;img_ae_insts_high = upper_32_bits(addr);</div><div class='add'>+		auth_desc-&gt;img_ae_insts_low = lower_32_bits(addr);</div><div class='add'>+	}</div><div class='add'>+	*desc = auth_desc;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qat_uclo_map_auth_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='add'>+				char *image, unsigned int size,</div><div class='add'>+				struct icp_qat_fw_auth_desc **desc)</div><div class='add'>+{</div><div class='add'>+	struct icp_qat_auth_chunk *auth_chunk;</div><div class='add'>+	struct icp_firml_dram_desc img_desc;</div><div class='add'>+	unsigned int simg_fw_type;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = qat_uclo_simg_alloc(handle, &amp;img_desc, ICP_QAT_CSS_RSA4K_MAX_IMAGE_LEN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	simg_fw_type = qat_uclo_simg_fw_type(handle, image);</div><div class='add'>+	auth_chunk = img_desc.dram_base_addr_v;</div><div class='add'>+	auth_chunk-&gt;chunk_size = img_desc.dram_size;</div><div class='add'>+	auth_chunk-&gt;chunk_bus_addr = img_desc.dram_bus_addr;</div><div class='add'>+</div><div class='add'>+	if (handle-&gt;chip_info-&gt;dual_sign)</div><div class='add'>+		return qat_uclo_build_auth_desc_dualsign(handle, image, size, &amp;img_desc,</div><div class='add'>+							 simg_fw_type, desc);</div><div class='add'>+</div><div class='add'>+	return qat_uclo_build_auth_desc_RSA(handle, image, size, &amp;img_desc,</div><div class='add'>+					    simg_fw_type, desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int qat_uclo_load_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 			    struct icp_qat_fw_auth_desc *desc)</div><div class='ctx'> {</div><div class='hunk'>@@ -1546,7 +1696,7 @@ static int qat_uclo_load_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 		if (!((desc-&gt;ae_mask &gt;&gt; i) &amp; 0x1))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (qat_hal_check_ae_active(handle, i)) {</div><div class='del'>-			pr_err("QAT: AE %d is active\n", i);</div><div class='add'>+			pr_err("AE %d is active\n", i);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		SET_CAP_CSR(handle, fcu_ctl_csr,</div><div class='hunk'>@@ -1566,7 +1716,7 @@ static int qat_uclo_load_fw(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 			}</div><div class='ctx'> 		} while (retry++ &lt; FW_AUTH_MAX_RETRY);</div><div class='ctx'> 		if (retry &gt; FW_AUTH_MAX_RETRY) {</div><div class='del'>-			pr_err("QAT: firmware load failed timeout %x\n", retry);</div><div class='add'>+			pr_err("firmware load failed timeout %x\n", retry);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1584,7 +1734,7 @@ static int qat_uclo_map_suof_obj(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	handle-&gt;sobj_handle = suof_handle;</div><div class='ctx'> 	if (qat_uclo_map_suof(handle, addr_ptr, mem_size)) {</div><div class='ctx'> 		qat_uclo_del_suof(handle);</div><div class='del'>-		pr_err("QAT: map SUOF failed\n");</div><div class='add'>+		pr_err("map SUOF failed\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1608,7 +1758,7 @@ int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 		qat_uclo_ummap_auth_fw(handle, &amp;desc);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (handle-&gt;chip_info-&gt;mmp_sram_size &lt; mem_size) {</div><div class='del'>-			pr_err("QAT: MMP size is too large: 0x%x\n", mem_size);</div><div class='add'>+			pr_err("MMP size is too large: 0x%x\n", mem_size);</div><div class='ctx'> 			return -EFBIG;</div><div class='ctx'> 		}</div><div class='ctx'> 		qat_uclo_wr_sram_by_words(handle, 0, addr_ptr, mem_size);</div><div class='hunk'>@@ -1634,7 +1784,7 @@ static int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	objhdl-&gt;obj_hdr = qat_uclo_map_chunk((char *)objhdl-&gt;obj_buf, filehdr,</div><div class='ctx'> 					     ICP_QAT_UOF_OBJS);</div><div class='ctx'> 	if (!objhdl-&gt;obj_hdr) {</div><div class='del'>-		pr_err("QAT: object file chunk is null\n");</div><div class='add'>+		pr_err("object file chunk is null\n");</div><div class='ctx'> 		goto out_objhdr_err;</div><div class='ctx'> 	}</div><div class='ctx'> 	handle-&gt;obj_handle = objhdl;</div><div class='hunk'>@@ -1669,7 +1819,7 @@ static int qat_uclo_map_mof_file_hdr(struct icp_qat_fw_loader_handle *handle,</div><div class='ctx'> 	checksum = qat_uclo_calc_str_checksum(&amp;mof_ptr-&gt;min_ver,</div><div class='ctx'> 					      min_ver_offset);</div><div class='ctx'> 	if (checksum != mof_ptr-&gt;checksum) {</div><div class='del'>-		pr_err("QAT: incorrect MOF checksum\n");</div><div class='add'>+		pr_err("incorrect MOF checksum\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1705,7 +1855,7 @@ static int qat_uclo_seek_obj_inside_mof(struct icp_qat_mof_handle *mobj_handle,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pr_err("QAT: object %s is not found inside MOF\n", obj_name);</div><div class='add'>+	pr_err("object %s is not found inside MOF\n", obj_name);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1722,7 +1872,7 @@ static int qat_uclo_map_obj_from_mof(struct icp_qat_mof_handle *mobj_handle,</div><div class='ctx'> 			    ICP_QAT_MOF_OBJ_CHUNKID_LEN)) {</div><div class='ctx'> 		obj = mobj_handle-&gt;sobjs_hdr + obj_chunkhdr-&gt;offset;</div><div class='ctx'> 	} else {</div><div class='del'>-		pr_err("QAT: unsupported chunk id\n");</div><div class='add'>+		pr_err("unsupported chunk id\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	mobj_hdr-&gt;obj_buf = obj;</div><div class='hunk'>@@ -1783,7 +1933,7 @@ static int qat_uclo_map_objs_from_mof(struct icp_qat_mof_handle *mobj_handle)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((uobj_chunk_num + sobj_chunk_num) != *valid_chunk) {</div><div class='del'>-		pr_err("QAT: inconsistent UOF/SUOF chunk amount\n");</div><div class='add'>+		pr_err("inconsistent UOF/SUOF chunk amount\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1824,17 +1974,16 @@ static int qat_uclo_check_mof_format(struct icp_qat_mof_file_hdr *mof_hdr)</div><div class='ctx'> 	int min = mof_hdr-&gt;min_ver &amp; 0xff;</div><div class='ctx'> </div><div class='ctx'> 	if (mof_hdr-&gt;file_id != ICP_QAT_MOF_FID) {</div><div class='del'>-		pr_err("QAT: invalid header 0x%x\n", mof_hdr-&gt;file_id);</div><div class='add'>+		pr_err("invalid header 0x%x\n", mof_hdr-&gt;file_id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mof_hdr-&gt;num_chunks &lt;= 0x1) {</div><div class='del'>-		pr_err("QAT: MOF chunk amount is incorrect\n");</div><div class='add'>+		pr_err("MOF chunk amount is incorrect\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (maj != ICP_QAT_MOF_MAJVER || min != ICP_QAT_MOF_MINVER) {</div><div class='del'>-		pr_err("QAT: bad MOF version, major 0x%x, minor 0x%x\n",</div><div class='del'>-		       maj, min);</div><div class='add'>+		pr_err("bad MOF version, major 0x%x, minor 0x%x\n", maj, min);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/Makefile b/drivers/crypto/intel/qat/qat_dh895xcc/Makefile<br/>index 5bf5c890c362..1427fe76f171 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xcc/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_dh895xcc/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_DH895xCC) += qat_dh895xcc.o</div><div class='ctx'> qat_dh895xcc-y := adf_drv.o adf_dh895xcc_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c<br/>index e48bcf1818cd..5b4bd0ba1ccb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> #include &lt;adf_admin.h&gt;</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='del'>-#include &lt;adf_gen2_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='hunk'>@@ -24,7 +23,6 @@ static const u32 thrd_to_arb_map[ADF_DH895XCC_MAX_ACCELENGINES] = {</div><div class='ctx'> static struct adf_hw_device_class dh895xcc_class = {</div><div class='ctx'> 	.name = ADF_DH895XCC_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_DH895XCC,</div><div class='del'>-	.instances = 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_accel_mask(struct adf_hw_device_data *self)</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c<br/>index 07e9d7e52861..b59e0cc49e52 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_dh895xcc/adf_drv.c</a></div><div class='hunk'>@@ -19,24 +19,6 @@</div><div class='ctx'> #include &lt;adf_dbgfs.h&gt;</div><div class='ctx'> #include "adf_dh895xcc_hw_data.h"</div><div class='ctx'> </div><div class='del'>-static const struct pci_device_id adf_pci_tbl[] = {</div><div class='del'>-	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_DH895XCC), },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='del'>-</div><div class='del'>-static int adf_probe(struct pci_dev *dev, const struct pci_device_id *ent);</div><div class='del'>-static void adf_remove(struct pci_dev *dev);</div><div class='del'>-</div><div class='del'>-static struct pci_driver adf_driver = {</div><div class='del'>-	.id_table = adf_pci_tbl,</div><div class='del'>-	.name = ADF_DH895XCC_DEVICE_NAME,</div><div class='del'>-	.probe = adf_probe,</div><div class='del'>-	.remove = adf_remove,</div><div class='del'>-	.sriov_configure = adf_sriov_configure,</div><div class='del'>-	.err_handler = &amp;adf_err_handler,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)</div><div class='ctx'> {</div><div class='ctx'> 	pci_release_regions(accel_dev-&gt;accel_pci_dev.pci_dev);</div><div class='hunk'>@@ -227,6 +209,29 @@ static void adf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	kfree(accel_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void adf_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);</div><div class='add'>+</div><div class='add'>+	adf_dev_down(accel_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id adf_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_DH895XCC) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, adf_pci_tbl);</div><div class='add'>+</div><div class='add'>+static struct pci_driver adf_driver = {</div><div class='add'>+	.id_table = adf_pci_tbl,</div><div class='add'>+	.name = ADF_DH895XCC_DEVICE_NAME,</div><div class='add'>+	.probe = adf_probe,</div><div class='add'>+	.remove = adf_remove,</div><div class='add'>+	.shutdown = adf_shutdown,</div><div class='add'>+	.sriov_configure = adf_sriov_configure,</div><div class='add'>+	.err_handler = &amp;adf_err_handler,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int __init adfdrv_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	request_module("intel_qat");</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_dh895xccvf/Makefile b/drivers/crypto/intel/qat/qat_dh895xccvf/Makefile<br/>index 93f9c81edf09..c2fdb6e0f68f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xccvf/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xccvf/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xccvf/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_dh895xccvf/Makefile</a></div><div class='hunk'>@@ -1,4 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-ccflags-y := -I $(src)/../qat_common</div><div class='ctx'> obj-$(CONFIG_CRYPTO_DEV_QAT_DH895xCCVF) += qat_dh895xccvf.o</div><div class='ctx'> qat_dh895xccvf-y := adf_drv.o adf_dh895xccvf_hw_data.o</div><div class='head'>diff --git a/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c<br/>index f4ee4c2e00da..828456c43b76 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c</a></div><div class='hunk'>@@ -3,7 +3,6 @@</div><div class='ctx'> #include &lt;adf_accel_devices.h&gt;</div><div class='ctx'> #include &lt;adf_common_drv.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_config.h&gt;</div><div class='del'>-#include &lt;adf_gen2_dc.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_csr_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_hw_data.h&gt;</div><div class='ctx'> #include &lt;adf_gen2_pfvf.h&gt;</div><div class='hunk'>@@ -13,7 +12,6 @@</div><div class='ctx'> static struct adf_hw_device_class dh895xcciov_class = {</div><div class='ctx'> 	.name = ADF_DH895XCCVF_DEVICE_NAME,</div><div class='ctx'> 	.type = DEV_DH895XCCVF,</div><div class='del'>-	.instances = 0</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 get_accel_mask(struct adf_hw_device_data *self)</div><div class='head'>diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c<br/>index fa08f10e6f3f..9c21f5d835d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/cesa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/cesa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/cesa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/cesa/cesa.c</a></div><div class='hunk'>@@ -94,7 +94,7 @@ static int mv_cesa_std_process(struct mv_cesa_engine *engine, u32 status)</div><div class='ctx'> </div><div class='ctx'> static int mv_cesa_int_process(struct mv_cesa_engine *engine, u32 status)</div><div class='ctx'> {</div><div class='del'>-	if (engine-&gt;chain.first &amp;&amp; engine-&gt;chain.last)</div><div class='add'>+	if (engine-&gt;chain_hw.first &amp;&amp; engine-&gt;chain_hw.last)</div><div class='ctx'> 		return mv_cesa_tdma_process(engine, status);</div><div class='ctx'> </div><div class='ctx'> 	return mv_cesa_std_process(engine, status);</div><div class='head'>diff --git a/drivers/crypto/marvell/cesa/cesa.h b/drivers/crypto/marvell/cesa/cesa.h<br/>index d215a6bed6bc..50ca1039fdaa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/cesa.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/cesa.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/cesa.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/cesa/cesa.h</a></div><div class='hunk'>@@ -440,8 +440,10 @@ struct mv_cesa_dev {</div><div class='ctx'>  *			SRAM</div><div class='ctx'>  * @queue:		fifo of the pending crypto requests</div><div class='ctx'>  * @load:		engine load counter, useful for load balancing</div><div class='del'>- * @chain:		list of the current tdma descriptors being processed</div><div class='del'>- *			by this engine.</div><div class='add'>+ * @chain_hw:		list of the current tdma descriptors being processed</div><div class='add'>+ *			by the hardware.</div><div class='add'>+ * @chain_sw:		list of the current tdma descriptors that will be</div><div class='add'>+ *			submitted to the hardware.</div><div class='ctx'>  * @complete_queue:	fifo of the processed requests by the engine</div><div class='ctx'>  *</div><div class='ctx'>  * Structure storing CESA engine information.</div><div class='hunk'>@@ -463,7 +465,8 @@ struct mv_cesa_engine {</div><div class='ctx'> 	struct gen_pool *pool;</div><div class='ctx'> 	struct crypto_queue queue;</div><div class='ctx'> 	atomic_t load;</div><div class='del'>-	struct mv_cesa_tdma_chain chain;</div><div class='add'>+	struct mv_cesa_tdma_chain chain_hw;</div><div class='add'>+	struct mv_cesa_tdma_chain chain_sw;</div><div class='ctx'> 	struct list_head complete_queue;</div><div class='ctx'> 	int irq;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/marvell/cesa/cipher.c b/drivers/crypto/marvell/cesa/cipher.c<br/>index cf62db50f958..48c5c8ea8c43 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/cipher.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/cipher.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/cipher.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/cesa/cipher.c</a></div><div class='hunk'>@@ -459,6 +459,9 @@ static int mv_cesa_skcipher_queue_req(struct skcipher_request *req,</div><div class='ctx'> 	struct mv_cesa_skcipher_req *creq = skcipher_request_ctx(req);</div><div class='ctx'> 	struct mv_cesa_engine *engine;</div><div class='ctx'> </div><div class='add'>+	if (!req-&gt;cryptlen)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	ret = mv_cesa_skcipher_req_init(req, tmpl);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='head'>diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c<br/>index f150861ceaf6..6815eddc9068 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/cesa/hash.c</a></div><div class='hunk'>@@ -663,7 +663,7 @@ static int mv_cesa_ahash_dma_req_init(struct ahash_request *req)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_free_tdma;</div><div class='ctx'> </div><div class='del'>-	if (iter.src.sg) {</div><div class='add'>+	if (iter.base.len &gt; iter.src.op_offset) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Add all the new data, inserting an operation block and</div><div class='ctx'> 		 * launch command between each full SRAM block-worth of</div><div class='head'>diff --git a/drivers/crypto/marvell/cesa/tdma.c b/drivers/crypto/marvell/cesa/tdma.c<br/>index 388a06e180d6..243305354420 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/tdma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/cesa/tdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/cesa/tdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/cesa/tdma.c</a></div><div class='hunk'>@@ -38,6 +38,15 @@ void mv_cesa_dma_step(struct mv_cesa_req *dreq)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv_cesa_engine *engine = dreq-&gt;engine;</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;engine-&gt;lock);</div><div class='add'>+	if (engine-&gt;chain_sw.first == dreq-&gt;chain.first) {</div><div class='add'>+		engine-&gt;chain_sw.first = NULL;</div><div class='add'>+		engine-&gt;chain_sw.last = NULL;</div><div class='add'>+	}</div><div class='add'>+	engine-&gt;chain_hw.first = dreq-&gt;chain.first;</div><div class='add'>+	engine-&gt;chain_hw.last = dreq-&gt;chain.last;</div><div class='add'>+	spin_unlock_bh(&amp;engine-&gt;lock);</div><div class='add'>+</div><div class='ctx'> 	writel_relaxed(0, engine-&gt;regs + CESA_SA_CFG);</div><div class='ctx'> </div><div class='ctx'> 	mv_cesa_set_int_mask(engine, CESA_SA_INT_ACC0_IDMA_DONE);</div><div class='hunk'>@@ -96,25 +105,27 @@ void mv_cesa_dma_prepare(struct mv_cesa_req *dreq,</div><div class='ctx'> void mv_cesa_tdma_chain(struct mv_cesa_engine *engine,</div><div class='ctx'> 			struct mv_cesa_req *dreq)</div><div class='ctx'> {</div><div class='del'>-	if (engine-&gt;chain.first == NULL &amp;&amp; engine-&gt;chain.last == NULL) {</div><div class='del'>-		engine-&gt;chain.first = dreq-&gt;chain.first;</div><div class='del'>-		engine-&gt;chain.last  = dreq-&gt;chain.last;</div><div class='del'>-	} else {</div><div class='del'>-		struct mv_cesa_tdma_desc *last;</div><div class='add'>+	struct mv_cesa_tdma_desc *last = engine-&gt;chain_sw.last;</div><div class='ctx'> </div><div class='del'>-		last = engine-&gt;chain.last;</div><div class='add'>+	/*</div><div class='add'>+	 * Break the DMA chain if the request being queued needs the IV</div><div class='add'>+	 * regs to be set before lauching the request.</div><div class='add'>+	 */</div><div class='add'>+	if (!last || dreq-&gt;chain.first-&gt;flags &amp; CESA_TDMA_SET_STATE)</div><div class='add'>+		engine-&gt;chain_sw.first = dreq-&gt;chain.first;</div><div class='add'>+	else {</div><div class='ctx'> 		last-&gt;next = dreq-&gt;chain.first;</div><div class='del'>-		engine-&gt;chain.last = dreq-&gt;chain.last;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on</div><div class='del'>-		 * the last element of the current chain, or if the request</div><div class='del'>-		 * being queued needs the IV regs to be set before lauching</div><div class='del'>-		 * the request.</div><div class='del'>-		 */</div><div class='del'>-		if (!(last-&gt;flags &amp; CESA_TDMA_BREAK_CHAIN) &amp;&amp;</div><div class='del'>-		    !(dreq-&gt;chain.first-&gt;flags &amp; CESA_TDMA_SET_STATE))</div><div class='del'>-			last-&gt;next_dma = cpu_to_le32(dreq-&gt;chain.first-&gt;cur_dma);</div><div class='add'>+		last-&gt;next_dma = cpu_to_le32(dreq-&gt;chain.first-&gt;cur_dma);</div><div class='add'>+	}</div><div class='add'>+	last = dreq-&gt;chain.last;</div><div class='add'>+	engine-&gt;chain_sw.last = last;</div><div class='add'>+	/*</div><div class='add'>+	 * Break the DMA chain if the CESA_TDMA_BREAK_CHAIN is set on</div><div class='add'>+	 * the last element of the current chain.</div><div class='add'>+	 */</div><div class='add'>+	if (last-&gt;flags &amp; CESA_TDMA_BREAK_CHAIN) {</div><div class='add'>+		engine-&gt;chain_sw.first = NULL;</div><div class='add'>+		engine-&gt;chain_sw.last = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -127,7 +138,7 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)</div><div class='ctx'> </div><div class='ctx'> 	tdma_cur = readl(engine-&gt;regs + CESA_TDMA_CUR);</div><div class='ctx'> </div><div class='del'>-	for (tdma = engine-&gt;chain.first; tdma; tdma = next) {</div><div class='add'>+	for (tdma = engine-&gt;chain_hw.first; tdma; tdma = next) {</div><div class='ctx'> 		spin_lock_bh(&amp;engine-&gt;lock);</div><div class='ctx'> 		next = tdma-&gt;next;</div><div class='ctx'> 		spin_unlock_bh(&amp;engine-&gt;lock);</div><div class='hunk'>@@ -149,12 +160,12 @@ int mv_cesa_tdma_process(struct mv_cesa_engine *engine, u32 status)</div><div class='ctx'> 								 &amp;backlog);</div><div class='ctx'> </div><div class='ctx'> 			/* Re-chaining to the next request */</div><div class='del'>-			engine-&gt;chain.first = tdma-&gt;next;</div><div class='add'>+			engine-&gt;chain_hw.first = tdma-&gt;next;</div><div class='ctx'> 			tdma-&gt;next = NULL;</div><div class='ctx'> </div><div class='ctx'> 			/* If this is the last request, clear the chain */</div><div class='del'>-			if (engine-&gt;chain.first == NULL)</div><div class='del'>-				engine-&gt;chain.last  = NULL;</div><div class='add'>+			if (engine-&gt;chain_hw.first == NULL)</div><div class='add'>+				engine-&gt;chain_hw.last  = NULL;</div><div class='ctx'> 			spin_unlock_bh(&amp;engine-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 			ctx = crypto_tfm_ctx(req-&gt;tfm);</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/cn10k_cpt.c b/drivers/crypto/marvell/octeontx2/cn10k_cpt.c<br/>index 5cae8fafa151..d4aab9e20f2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/cn10k_cpt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/cn10k_cpt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/cn10k_cpt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/cn10k_cpt.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include "otx2_cptvf.h"</div><div class='ctx'> #include "otx2_cptlf.h"</div><div class='ctx'> #include "cn10k_cpt.h"</div><div class='add'>+#include "otx2_cpt_common.h"</div><div class='ctx'> </div><div class='ctx'> static void cn10k_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num,</div><div class='ctx'> 			       struct otx2_cptlf_info *lf);</div><div class='hunk'>@@ -27,7 +28,7 @@ static struct cpt_hw_ops cn10k_hw_ops = {</div><div class='ctx'> static void cn10k_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num,</div><div class='ctx'> 			       struct otx2_cptlf_info *lf)</div><div class='ctx'> {</div><div class='del'>-	void __iomem *lmtline = lf-&gt;lmtline;</div><div class='add'>+	void *lmtline = lf-&gt;lfs-&gt;lmt_info.base + (lf-&gt;slot * LMTLINE_SIZE);</div><div class='ctx'> 	u64 val = (lf-&gt;slot &amp; 0x7FF);</div><div class='ctx'> 	u64 tar_addr = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -41,15 +42,49 @@ static void cn10k_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num,</div><div class='ctx'> 	dma_wmb();</div><div class='ctx'> </div><div class='ctx'> 	/* Copy CPT command to LMTLINE */</div><div class='del'>-	memcpy_toio(lmtline, cptinst, insts_num * OTX2_CPT_INST_SIZE);</div><div class='add'>+	memcpy(lmtline, cptinst, insts_num * OTX2_CPT_INST_SIZE);</div><div class='ctx'> 	cn10k_lmt_flush(val, tar_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void cn10k_cpt_lmtst_free(struct pci_dev *pdev, struct otx2_cptlfs_info *lfs)</div><div class='add'>+{</div><div class='add'>+	struct otx2_lmt_info *lmt_info = &amp;lfs-&gt;lmt_info;</div><div class='add'>+</div><div class='add'>+	if (!lmt_info-&gt;base)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dma_free_attrs(&amp;pdev-&gt;dev, lmt_info-&gt;size,</div><div class='add'>+		       lmt_info-&gt;base - lmt_info-&gt;align,</div><div class='add'>+		       lmt_info-&gt;iova - lmt_info-&gt;align,</div><div class='add'>+		       DMA_ATTR_FORCE_CONTIGUOUS);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(cn10k_cpt_lmtst_free, "CRYPTO_DEV_OCTEONTX2_CPT");</div><div class='add'>+</div><div class='add'>+static int cn10k_cpt_lmtst_alloc(struct pci_dev *pdev,</div><div class='add'>+				 struct otx2_cptlfs_info *lfs, u32 size)</div><div class='add'>+{</div><div class='add'>+	struct otx2_lmt_info *lmt_info = &amp;lfs-&gt;lmt_info;</div><div class='add'>+	dma_addr_t align_iova;</div><div class='add'>+	dma_addr_t iova;</div><div class='add'>+</div><div class='add'>+	lmt_info-&gt;base = dma_alloc_attrs(&amp;pdev-&gt;dev, size, &amp;iova, GFP_KERNEL,</div><div class='add'>+					 DMA_ATTR_FORCE_CONTIGUOUS);</div><div class='add'>+	if (!lmt_info-&gt;base)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	align_iova = ALIGN((u64)iova, LMTLINE_ALIGN);</div><div class='add'>+	lmt_info-&gt;iova = align_iova;</div><div class='add'>+	lmt_info-&gt;align = align_iova - iova;</div><div class='add'>+	lmt_info-&gt;size = size;</div><div class='add'>+	lmt_info-&gt;base += lmt_info-&gt;align;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = cptpf-&gt;pdev;</div><div class='del'>-	resource_size_t size;</div><div class='del'>-	u64 lmt_base;</div><div class='add'>+	u32 size;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(CN10K_LMTST, &amp;cptpf-&gt;cap_flag)) {</div><div class='ctx'> 		cptpf-&gt;lfs.ops = &amp;otx2_hw_ops;</div><div class='hunk'>@@ -57,18 +92,19 @@ int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cptpf-&gt;lfs.ops = &amp;cn10k_hw_ops;</div><div class='del'>-	lmt_base = readq(cptpf-&gt;reg_base + RVU_PF_LMTLINE_ADDR);</div><div class='del'>-	if (!lmt_base) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "PF LMTLINE address not configured\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	size = OTX2_CPT_MAX_VFS_NUM * LMTLINE_SIZE + LMTLINE_ALIGN;</div><div class='add'>+	ret = cn10k_cpt_lmtst_alloc(pdev, &amp;cptpf-&gt;lfs, size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "PF-%d LMTLINE memory allocation failed\n",</div><div class='add'>+			cptpf-&gt;pf_id);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='del'>-	size = pci_resource_len(pdev, PCI_MBOX_BAR_NUM);</div><div class='del'>-	size -= ((1 + cptpf-&gt;max_vfs) * MBOX_SIZE);</div><div class='del'>-	cptpf-&gt;lfs.lmt_base = devm_ioremap_wc(&amp;pdev-&gt;dev, lmt_base, size);</div><div class='del'>-	if (!cptpf-&gt;lfs.lmt_base) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			"Mapping of PF LMTLINE address failed\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = otx2_cpt_lmtst_tbl_setup_msg(&amp;cptpf-&gt;lfs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "PF-%d: LMTST Table setup failed\n",</div><div class='add'>+		cptpf-&gt;pf_id);</div><div class='add'>+		cn10k_cpt_lmtst_free(pdev, &amp;cptpf-&gt;lfs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -78,18 +114,25 @@ EXPORT_SYMBOL_NS_GPL(cn10k_cptpf_lmtst_init, "CRYPTO_DEV_OCTEONTX2_CPT");</div><div class='ctx'> int cn10k_cptvf_lmtst_init(struct otx2_cptvf_dev *cptvf)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = cptvf-&gt;pdev;</div><div class='del'>-	resource_size_t offset, size;</div><div class='add'>+	u32 size;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(CN10K_LMTST, &amp;cptvf-&gt;cap_flag))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	offset = pci_resource_start(pdev, PCI_MBOX_BAR_NUM);</div><div class='del'>-	size = pci_resource_len(pdev, PCI_MBOX_BAR_NUM);</div><div class='del'>-	/* Map VF LMILINE region */</div><div class='del'>-	cptvf-&gt;lfs.lmt_base = devm_ioremap_wc(&amp;pdev-&gt;dev, offset, size);</div><div class='del'>-	if (!cptvf-&gt;lfs.lmt_base) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Unable to map BAR4\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	size = cptvf-&gt;lfs.lfs_num * LMTLINE_SIZE + LMTLINE_ALIGN;</div><div class='add'>+	ret = cn10k_cpt_lmtst_alloc(pdev, &amp;cptvf-&gt;lfs, size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "VF-%d LMTLINE memory allocation failed\n",</div><div class='add'>+			cptvf-&gt;vf_id);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = otx2_cpt_lmtst_tbl_setup_msg(&amp;cptvf-&gt;lfs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "VF-%d: LMTST Table setup failed\n",</div><div class='add'>+			cptvf-&gt;vf_id);</div><div class='add'>+		cn10k_cpt_lmtst_free(pdev, &amp;cptvf-&gt;lfs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/cn10k_cpt.h b/drivers/crypto/marvell/octeontx2/cn10k_cpt.h<br/>index 92be3ecf570f..ea5990048c21 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/cn10k_cpt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/cn10k_cpt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/cn10k_cpt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/cn10k_cpt.h</a></div><div class='hunk'>@@ -50,6 +50,7 @@ static inline u8 otx2_cpt_get_uc_compcode(union otx2_cpt_res_s *result)</div><div class='ctx'> </div><div class='ctx'> int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf);</div><div class='ctx'> int cn10k_cptvf_lmtst_init(struct otx2_cptvf_dev *cptvf);</div><div class='add'>+void cn10k_cpt_lmtst_free(struct pci_dev *pdev, struct otx2_cptlfs_info *lfs);</div><div class='ctx'> void cn10k_cpt_ctx_flush(struct pci_dev *pdev, u64 cptr, bool inval);</div><div class='ctx'> int cn10k_cpt_hw_ctx_init(struct pci_dev *pdev,</div><div class='ctx'> 			  struct cn10k_cpt_errata_ctx *er_ctx);</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h b/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h<br/>index c5b7c57574ef..d529bcb03775 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cpt_common.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cpt_common.h</a></div><div class='hunk'>@@ -145,11 +145,8 @@ static inline u64 otx2_cpt_read64(void __iomem *reg_base, u64 blk, u64 slot,</div><div class='ctx'> </div><div class='ctx'> static inline bool is_dev_otx2(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	if (pdev-&gt;device == OTX2_CPT_PCI_PF_DEVICE_ID ||</div><div class='del'>-	    pdev-&gt;device == OTX2_CPT_PCI_VF_DEVICE_ID)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	return pdev-&gt;device == OTX2_CPT_PCI_PF_DEVICE_ID ||</div><div class='add'>+	       pdev-&gt;device == OTX2_CPT_PCI_VF_DEVICE_ID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_dev_cn10ka(struct pci_dev *pdev)</div><div class='hunk'>@@ -159,12 +156,10 @@ static inline bool is_dev_cn10ka(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> static inline bool is_dev_cn10ka_ax(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	if (pdev-&gt;subsystem_device == CPT_PCI_SUBSYS_DEVID_CN10K_A &amp;&amp;</div><div class='del'>-	    ((pdev-&gt;revision &amp; 0xFF) == 4 || (pdev-&gt;revision &amp; 0xFF) == 0x50 ||</div><div class='del'>-	     (pdev-&gt;revision &amp; 0xff) == 0x51))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	return pdev-&gt;subsystem_device == CPT_PCI_SUBSYS_DEVID_CN10K_A &amp;&amp;</div><div class='add'>+	       ((pdev-&gt;revision &amp; 0xFF) == 4 ||</div><div class='add'>+		(pdev-&gt;revision &amp; 0xFF) == 0x50 ||</div><div class='add'>+		(pdev-&gt;revision &amp; 0xFF) == 0x51);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_dev_cn10kb(struct pci_dev *pdev)</div><div class='hunk'>@@ -174,11 +169,8 @@ static inline bool is_dev_cn10kb(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> static inline bool is_dev_cn10ka_b0(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	if (pdev-&gt;subsystem_device == CPT_PCI_SUBSYS_DEVID_CN10K_A &amp;&amp;</div><div class='del'>-	    (pdev-&gt;revision &amp; 0xFF) == 0x54)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	return pdev-&gt;subsystem_device == CPT_PCI_SUBSYS_DEVID_CN10K_A &amp;&amp;</div><div class='add'>+	       (pdev-&gt;revision &amp; 0xFF) == 0x54;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void otx2_cpt_set_hw_caps(struct pci_dev *pdev,</div><div class='hunk'>@@ -192,18 +184,12 @@ static inline void otx2_cpt_set_hw_caps(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> static inline bool cpt_is_errata_38550_exists(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	if (is_dev_otx2(pdev) || is_dev_cn10ka_ax(pdev))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	return is_dev_otx2(pdev) || is_dev_cn10ka_ax(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool cpt_feature_sgv2(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	if (!is_dev_otx2(pdev) &amp;&amp; !is_dev_cn10ka_ax(pdev))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	return !is_dev_otx2(pdev) &amp;&amp; !is_dev_cn10ka_ax(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int otx2_cpt_send_ready_msg(struct otx2_mbox *mbox, struct pci_dev *pdev);</div><div class='hunk'>@@ -223,5 +209,6 @@ int otx2_cpt_detach_rsrcs_msg(struct otx2_cptlfs_info *lfs);</div><div class='ctx'> int otx2_cpt_msix_offset_msg(struct otx2_cptlfs_info *lfs);</div><div class='ctx'> int otx2_cpt_sync_mbox_msg(struct otx2_mbox *mbox);</div><div class='ctx'> int otx2_cpt_lf_reset_msg(struct otx2_cptlfs_info *lfs, int slot);</div><div class='add'>+int otx2_cpt_lmtst_tbl_setup_msg(struct otx2_cptlfs_info *lfs);</div><div class='ctx'> </div><div class='ctx'> #endif /* __OTX2_CPT_COMMON_H */</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c b/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c<br/>index b8b7c8a3c0ca..95f3de3a34eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c</a></div><div class='hunk'>@@ -255,3 +255,28 @@ int otx2_cpt_lf_reset_msg(struct otx2_cptlfs_info *lfs, int slot)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(otx2_cpt_lf_reset_msg, "CRYPTO_DEV_OCTEONTX2_CPT");</div><div class='add'>+</div><div class='add'>+int otx2_cpt_lmtst_tbl_setup_msg(struct otx2_cptlfs_info *lfs)</div><div class='add'>+{</div><div class='add'>+	struct otx2_mbox *mbox = lfs-&gt;mbox;</div><div class='add'>+	struct pci_dev *pdev = lfs-&gt;pdev;</div><div class='add'>+	struct lmtst_tbl_setup_req *req;</div><div class='add'>+</div><div class='add'>+	req = (struct lmtst_tbl_setup_req *)</div><div class='add'>+	       otx2_mbox_alloc_msg_rsp(mbox, 0, sizeof(*req),</div><div class='add'>+				       sizeof(struct msg_rsp));</div><div class='add'>+	if (!req) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "RVU MBOX failed to alloc message.\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req-&gt;hdr.id = MBOX_MSG_LMTST_TBL_SETUP;</div><div class='add'>+	req-&gt;hdr.sig = OTX2_MBOX_REQ_SIG;</div><div class='add'>+	req-&gt;hdr.pcifunc = 0;</div><div class='add'>+</div><div class='add'>+	req-&gt;use_local_lmt_region = true;</div><div class='add'>+	req-&gt;lmt_iova = lfs-&gt;lmt_info.iova;</div><div class='add'>+</div><div class='add'>+	return otx2_cpt_send_mbox_msg(mbox, pdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(otx2_cpt_lmtst_tbl_setup_msg, "CRYPTO_DEV_OCTEONTX2_CPT");</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptlf.c b/drivers/crypto/marvell/octeontx2/otx2_cptlf.c<br/>index b5d66afcc030..dc7c7a2650a5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptlf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptlf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptlf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cptlf.c</a></div><div class='hunk'>@@ -433,10 +433,7 @@ int otx2_cptlf_init(struct otx2_cptlfs_info *lfs, u8 eng_grp_mask, int pri,</div><div class='ctx'> 	for (slot = 0; slot &lt; lfs-&gt;lfs_num; slot++) {</div><div class='ctx'> 		lfs-&gt;lf[slot].lfs = lfs;</div><div class='ctx'> 		lfs-&gt;lf[slot].slot = slot;</div><div class='del'>-		if (lfs-&gt;lmt_base)</div><div class='del'>-			lfs-&gt;lf[slot].lmtline = lfs-&gt;lmt_base +</div><div class='del'>-						(slot * LMTLINE_SIZE);</div><div class='del'>-		else</div><div class='add'>+		if (!lfs-&gt;lmt_info.base)</div><div class='ctx'> 			lfs-&gt;lf[slot].lmtline = lfs-&gt;reg_base +</div><div class='ctx'> 				OTX2_CPT_RVU_FUNC_ADDR_S(BLKADDR_LMT, slot,</div><div class='ctx'> 						 OTX2_CPT_LMT_LF_LMTLINEX(0));</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptlf.h b/drivers/crypto/marvell/octeontx2/otx2_cptlf.h<br/>index bd8604be2952..6e004a5568d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptlf.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptlf.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptlf.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cptlf.h</a></div><div class='hunk'>@@ -105,11 +105,19 @@ struct cpt_hw_ops {</div><div class='ctx'> 			      gfp_t gfp);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define LMTLINE_SIZE  128</div><div class='add'>+#define LMTLINE_ALIGN 128</div><div class='add'>+struct otx2_lmt_info {</div><div class='add'>+	void *base;</div><div class='add'>+	dma_addr_t iova;</div><div class='add'>+	u32 size;</div><div class='add'>+	u8 align;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct otx2_cptlfs_info {</div><div class='ctx'> 	/* Registers start address of VF/PF LFs are attached to */</div><div class='ctx'> 	void __iomem *reg_base;</div><div class='del'>-#define LMTLINE_SIZE  128</div><div class='del'>-	void __iomem *lmt_base;</div><div class='add'>+	struct otx2_lmt_info lmt_info;</div><div class='ctx'> 	struct pci_dev *pdev;   /* Device LFs are attached to */</div><div class='ctx'> 	struct otx2_cptlf_info lf[OTX2_CPT_MAX_LFS_NUM];</div><div class='ctx'> 	struct otx2_mbox *mbox;</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c<br/>index 12971300296d..1c5c262af48d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cptpf_main.c</a></div><div class='hunk'>@@ -639,6 +639,12 @@ static int cptpf_device_init(struct otx2_cptpf_dev *cptpf)</div><div class='ctx'> 	/* Disable all cores */</div><div class='ctx'> 	ret = otx2_cpt_disable_all_cores(cptpf);</div><div class='ctx'> </div><div class='add'>+	otx2_cptlf_set_dev_info(&amp;cptpf-&gt;lfs, cptpf-&gt;pdev, cptpf-&gt;reg_base,</div><div class='add'>+				&amp;cptpf-&gt;afpf_mbox, BLKADDR_CPT0);</div><div class='add'>+	if (cptpf-&gt;has_cpt1)</div><div class='add'>+		otx2_cptlf_set_dev_info(&amp;cptpf-&gt;cpt1_lfs, cptpf-&gt;pdev,</div><div class='add'>+					cptpf-&gt;reg_base, &amp;cptpf-&gt;afpf_mbox,</div><div class='add'>+					BLKADDR_CPT1);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -786,19 +792,19 @@ static int otx2_cptpf_probe(struct pci_dev *pdev,</div><div class='ctx'> 	cptpf-&gt;max_vfs = pci_sriov_get_totalvfs(pdev);</div><div class='ctx'> 	cptpf-&gt;kvf_limits = 1;</div><div class='ctx'> </div><div class='del'>-	err = cn10k_cptpf_lmtst_init(cptpf);</div><div class='add'>+	/* Initialize CPT PF device */</div><div class='add'>+	err = cptpf_device_init(cptpf);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto unregister_intr;</div><div class='ctx'> </div><div class='del'>-	/* Initialize CPT PF device */</div><div class='del'>-	err = cptpf_device_init(cptpf);</div><div class='add'>+	err = cn10k_cptpf_lmtst_init(cptpf);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto unregister_intr;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize engine groups */</div><div class='ctx'> 	err = otx2_cpt_init_eng_grps(pdev, &amp;cptpf-&gt;eng_grps);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto unregister_intr;</div><div class='add'>+		goto free_lmtst;</div><div class='ctx'> </div><div class='ctx'> 	err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;cptpf_sysfs_group);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -814,6 +820,8 @@ sysfs_grp_del:</div><div class='ctx'> 	sysfs_remove_group(&amp;dev-&gt;kobj, &amp;cptpf_sysfs_group);</div><div class='ctx'> cleanup_eng_grps:</div><div class='ctx'> 	otx2_cpt_cleanup_eng_grps(pdev, &amp;cptpf-&gt;eng_grps);</div><div class='add'>+free_lmtst:</div><div class='add'>+	cn10k_cpt_lmtst_free(pdev, &amp;cptpf-&gt;lfs);</div><div class='ctx'> unregister_intr:</div><div class='ctx'> 	cptpf_disable_afpf_mbox_intr(cptpf);</div><div class='ctx'> destroy_afpf_mbox:</div><div class='hunk'>@@ -848,6 +856,8 @@ static void otx2_cptpf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	cptpf_disable_afpf_mbox_intr(cptpf);</div><div class='ctx'> 	/* Destroy AF-PF mbox */</div><div class='ctx'> 	cptpf_afpf_mbox_destroy(cptpf);</div><div class='add'>+	/* Free LMTST memory */</div><div class='add'>+	cn10k_cpt_lmtst_free(pdev, &amp;cptpf-&gt;lfs);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c<br/>index ec1ac7e836a3..12c0e966fa65 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c</a></div><div class='hunk'>@@ -264,8 +264,6 @@ static int handle_msg_rx_inline_ipsec_lf_cfg(struct otx2_cptpf_dev *cptpf,</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	otx2_cptlf_set_dev_info(&amp;cptpf-&gt;lfs, cptpf-&gt;pdev, cptpf-&gt;reg_base,</div><div class='del'>-				&amp;cptpf-&gt;afpf_mbox, BLKADDR_CPT0);</div><div class='ctx'> 	cptpf-&gt;lfs.global_slot = 0;</div><div class='ctx'> 	cptpf-&gt;lfs.ctx_ilen_ovrd = cfg_req-&gt;ctx_ilen_valid;</div><div class='ctx'> 	cptpf-&gt;lfs.ctx_ilen = cfg_req-&gt;ctx_ilen;</div><div class='hunk'>@@ -278,9 +276,6 @@ static int handle_msg_rx_inline_ipsec_lf_cfg(struct otx2_cptpf_dev *cptpf,</div><div class='ctx'> </div><div class='ctx'> 	if (cptpf-&gt;has_cpt1) {</div><div class='ctx'> 		cptpf-&gt;rsrc_req_blkaddr = BLKADDR_CPT1;</div><div class='del'>-		otx2_cptlf_set_dev_info(&amp;cptpf-&gt;cpt1_lfs, cptpf-&gt;pdev,</div><div class='del'>-					cptpf-&gt;reg_base, &amp;cptpf-&gt;afpf_mbox,</div><div class='del'>-					BLKADDR_CPT1);</div><div class='ctx'> 		cptpf-&gt;cpt1_lfs.global_slot = num_lfs;</div><div class='ctx'> 		cptpf-&gt;cpt1_lfs.ctx_ilen_ovrd = cfg_req-&gt;ctx_ilen_valid;</div><div class='ctx'> 		cptpf-&gt;cpt1_lfs.ctx_ilen = cfg_req-&gt;ctx_ilen;</div><div class='hunk'>@@ -507,6 +502,7 @@ static void process_afpf_mbox_msg(struct otx2_cptpf_dev *cptpf,</div><div class='ctx'> 	case MBOX_MSG_CPT_INLINE_IPSEC_CFG:</div><div class='ctx'> 	case MBOX_MSG_NIX_INLINE_IPSEC_CFG:</div><div class='ctx'> 	case MBOX_MSG_CPT_LF_RESET:</div><div class='add'>+	case MBOX_MSG_LMTST_TBL_SETUP:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c<br/>index 42c5484ce66a..78367849c3d5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c</a></div><div class='hunk'>@@ -1513,8 +1513,6 @@ int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto delete_grps;</div><div class='ctx'> </div><div class='del'>-	otx2_cptlf_set_dev_info(lfs, cptpf-&gt;pdev, cptpf-&gt;reg_base,</div><div class='del'>-				&amp;cptpf-&gt;afpf_mbox, BLKADDR_CPT0);</div><div class='ctx'> 	ret = otx2_cptlf_init(lfs, OTX2_CPT_ALL_ENG_GRPS_MASK,</div><div class='ctx'> 			      OTX2_CPT_QUEUE_HI_PRIO, 1);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c<br/>index d84eebdf2fa8..56904bdfd6e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c</a></div><div class='hunk'>@@ -283,8 +283,6 @@ static int cptvf_lf_init(struct otx2_cptvf_dev *cptvf)</div><div class='ctx'> </div><div class='ctx'> 	lfs_num = cptvf-&gt;lfs.kvf_limits;</div><div class='ctx'> </div><div class='del'>-	otx2_cptlf_set_dev_info(lfs, cptvf-&gt;pdev, cptvf-&gt;reg_base,</div><div class='del'>-				&amp;cptvf-&gt;pfvf_mbox, cptvf-&gt;blkaddr);</div><div class='ctx'> 	ret = otx2_cptlf_init(lfs, eng_grp_msk, OTX2_CPT_QUEUE_HI_PRIO,</div><div class='ctx'> 			      lfs_num);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -378,10 +376,6 @@ static int otx2_cptvf_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	otx2_cpt_set_hw_caps(pdev, &amp;cptvf-&gt;cap_flag);</div><div class='ctx'> </div><div class='del'>-	ret = cn10k_cptvf_lmtst_init(cptvf);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto clear_drvdata;</div><div class='del'>-</div><div class='ctx'> 	/* Initialize PF&lt;=&gt;VF mailbox */</div><div class='ctx'> 	ret = cptvf_pfvf_mbox_init(cptvf);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -396,6 +390,9 @@ static int otx2_cptvf_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	cptvf_hw_ops_get(cptvf);</div><div class='ctx'> </div><div class='add'>+	otx2_cptlf_set_dev_info(&amp;cptvf-&gt;lfs, cptvf-&gt;pdev, cptvf-&gt;reg_base,</div><div class='add'>+				&amp;cptvf-&gt;pfvf_mbox, cptvf-&gt;blkaddr);</div><div class='add'>+</div><div class='ctx'> 	ret = otx2_cptvf_send_caps_msg(cptvf);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Couldn't get CPT engine capabilities.\n");</div><div class='hunk'>@@ -404,13 +401,19 @@ static int otx2_cptvf_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (cptvf-&gt;eng_caps[OTX2_CPT_SE_TYPES] &amp; BIT_ULL(35))</div><div class='ctx'> 		cptvf-&gt;lfs.ops-&gt;cpt_sg_info_create = cn10k_sgv2_info_create;</div><div class='ctx'> </div><div class='add'>+	ret = cn10k_cptvf_lmtst_init(cptvf);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unregister_interrupts;</div><div class='add'>+</div><div class='ctx'> 	/* Initialize CPT LFs */</div><div class='ctx'> 	ret = cptvf_lf_init(cptvf);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto unregister_interrupts;</div><div class='add'>+		goto free_lmtst;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+free_lmtst:</div><div class='add'>+	cn10k_cpt_lmtst_free(pdev, &amp;cptvf-&gt;lfs);</div><div class='ctx'> unregister_interrupts:</div><div class='ctx'> 	cptvf_disable_pfvf_mbox_intrs(cptvf);</div><div class='ctx'> destroy_pfvf_mbox:</div><div class='hunk'>@@ -434,6 +437,8 @@ static void otx2_cptvf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	cptvf_disable_pfvf_mbox_intrs(cptvf);</div><div class='ctx'> 	/* Destroy PF-VF mbox */</div><div class='ctx'> 	cptvf_pfvf_mbox_destroy(cptvf);</div><div class='add'>+	/* Free LMTST memory */</div><div class='add'>+	cn10k_cpt_lmtst_free(pdev, &amp;cptvf-&gt;lfs);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c b/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c<br/>index d9fa5f6e204d..931b72580fd9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c</a></div><div class='hunk'>@@ -134,6 +134,7 @@ static void process_pfvf_mbox_mbox_msg(struct otx2_cptvf_dev *cptvf,</div><div class='ctx'> 		       sizeof(cptvf-&gt;eng_caps));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MBOX_MSG_CPT_LF_RESET:</div><div class='add'>+	case MBOX_MSG_LMTST_TBL_SETUP:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(&amp;cptvf-&gt;pdev-&gt;dev, "Unsupported msg %d received.\n",</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-cbc.c b/drivers/crypto/nx/nx-aes-cbc.c<br/>index 0e440f704a8f..35fa5bad1d9f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-cbc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-cbc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-cbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx-aes-cbc.c</a></div><div class='hunk'>@@ -8,10 +8,12 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/vio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "nx_csbcpb.h"</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-ctr.c b/drivers/crypto/nx/nx-aes-ctr.c<br/>index dfa3ad1a12f2..709b3ee74657 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-ctr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-ctr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-ctr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx-aes-ctr.c</a></div><div class='hunk'>@@ -9,10 +9,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/vio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "nx_csbcpb.h"</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-ecb.c b/drivers/crypto/nx/nx-aes-ecb.c<br/>index 502a565074e9..4039cf3b22d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-ecb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-ecb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-ecb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx-aes-ecb.c</a></div><div class='hunk'>@@ -8,10 +8,12 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;asm/vio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "nx_csbcpb.h"</div><div class='head'>diff --git a/drivers/crypto/nx/nx-aes-xcbc.c b/drivers/crypto/nx/nx-aes-xcbc.c<br/>index eb5c8f689360..bf465d824e2c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-xcbc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-aes-xcbc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-aes-xcbc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx-aes-xcbc.c</a></div><div class='hunk'>@@ -7,13 +7,14 @@</div><div class='ctx'>  * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='del'>-#include &lt;asm/vio.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "nx_csbcpb.h"</div><div class='ctx'> #include "nx.h"</div><div class='hunk'>@@ -21,8 +22,6 @@</div><div class='ctx'> </div><div class='ctx'> struct xcbc_state {</div><div class='ctx'> 	u8 state[AES_BLOCK_SIZE];</div><div class='del'>-	unsigned int count;</div><div class='del'>-	u8 buffer[AES_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int nx_xcbc_set_key(struct crypto_shash *desc,</div><div class='hunk'>@@ -58,7 +57,7 @@ static int nx_xcbc_set_key(struct crypto_shash *desc,</div><div class='ctx'>  */</div><div class='ctx'> static int nx_xcbc_empty(struct shash_desc *desc, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='ctx'> 	struct nx_sg *in_sg, *out_sg;</div><div class='ctx'> 	u8 keys[2][AES_BLOCK_SIZE];</div><div class='hunk'>@@ -135,9 +134,9 @@ out:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nx_crypto_ctx_aes_xcbc_init2(struct crypto_tfm *tfm)</div><div class='add'>+static int nx_crypto_ctx_aes_xcbc_init2(struct crypto_shash *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(tfm);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -166,31 +165,24 @@ static int nx_xcbc_update(struct shash_desc *desc,</div><div class='ctx'> 			  const u8          *data,</div><div class='ctx'> 			  unsigned int       len)</div><div class='ctx'> {</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct xcbc_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='ctx'> 	struct nx_sg *in_sg;</div><div class='ctx'> 	struct nx_sg *out_sg;</div><div class='del'>-	u32 to_process = 0, leftover, total;</div><div class='ctx'> 	unsigned int max_sg_len;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='add'>+	u32 to_process, total;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	int data_len;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;nx_ctx-&gt;lock, irq_flags);</div><div class='ctx'> </div><div class='add'>+	memcpy(csbcpb-&gt;cpb.aes_xcbc.out_cv_mac, sctx-&gt;state, AES_BLOCK_SIZE);</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='ctx'> </div><div class='del'>-	total = sctx-&gt;count + len;</div><div class='del'>-</div><div class='del'>-	/* 2 cases for total data len:</div><div class='del'>-	 *  1: &lt;= AES_BLOCK_SIZE: copy into state, return 0</div><div class='del'>-	 *  2: &gt; AES_BLOCK_SIZE: process X blocks, copy in leftover</div><div class='del'>-	 */</div><div class='del'>-	if (total &lt;= AES_BLOCK_SIZE) {</div><div class='del'>-		memcpy(sctx-&gt;buffer + sctx-&gt;count, data, len);</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	total = len;</div><div class='ctx'> </div><div class='ctx'> 	in_sg = nx_ctx-&gt;in_sg;</div><div class='ctx'> 	max_sg_len = min_t(u64, nx_driver.of.max_sg_len/sizeof(struct nx_sg),</div><div class='hunk'>@@ -200,7 +192,7 @@ static int nx_xcbc_update(struct shash_desc *desc,</div><div class='ctx'> </div><div class='ctx'> 	data_len = AES_BLOCK_SIZE;</div><div class='ctx'> 	out_sg = nx_build_sg_list(nx_ctx-&gt;out_sg, (u8 *)sctx-&gt;state,</div><div class='del'>-				  &amp;len, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+				  &amp;data_len, nx_ctx-&gt;ap-&gt;sglen);</div><div class='ctx'> </div><div class='ctx'> 	if (data_len != AES_BLOCK_SIZE) {</div><div class='ctx'> 		rc = -EINVAL;</div><div class='hunk'>@@ -210,56 +202,21 @@ static int nx_xcbc_update(struct shash_desc *desc,</div><div class='ctx'> 	nx_ctx-&gt;op.outlen = (nx_ctx-&gt;out_sg - out_sg) * sizeof(struct nx_sg);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		to_process = total - to_process;</div><div class='del'>-		to_process = to_process &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-		leftover = total - to_process;</div><div class='del'>-</div><div class='del'>-		/* the hardware will not accept a 0 byte operation for this</div><div class='del'>-		 * algorithm and the operation MUST be finalized to be correct.</div><div class='del'>-		 * So if we happen to get an update that falls on a block sized</div><div class='del'>-		 * boundary, we must save off the last block to finalize with</div><div class='del'>-		 * later. */</div><div class='del'>-		if (!leftover) {</div><div class='del'>-			to_process -= AES_BLOCK_SIZE;</div><div class='del'>-			leftover = AES_BLOCK_SIZE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (sctx-&gt;count) {</div><div class='del'>-			data_len = sctx-&gt;count;</div><div class='del'>-			in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg,</div><div class='del'>-						(u8 *) sctx-&gt;buffer,</div><div class='del'>-						&amp;data_len,</div><div class='del'>-						max_sg_len);</div><div class='del'>-			if (data_len != sctx-&gt;count) {</div><div class='del'>-				rc = -EINVAL;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		to_process = total &amp; ~(AES_BLOCK_SIZE - 1);</div><div class='ctx'> </div><div class='del'>-		data_len = to_process - sctx-&gt;count;</div><div class='ctx'> 		in_sg = nx_build_sg_list(in_sg,</div><div class='ctx'> 					(u8 *) data,</div><div class='del'>-					&amp;data_len,</div><div class='add'>+					&amp;to_process,</div><div class='ctx'> 					max_sg_len);</div><div class='ctx'> </div><div class='del'>-		if (data_len != to_process - sctx-&gt;count) {</div><div class='del'>-			rc = -EINVAL;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) *</div><div class='ctx'> 					sizeof(struct nx_sg);</div><div class='ctx'> </div><div class='ctx'> 		/* we've hit the nx chip previously and we're updating again,</div><div class='ctx'> 		 * so copy over the partial digest */</div><div class='del'>-		if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='del'>-			memcpy(csbcpb-&gt;cpb.aes_xcbc.cv,</div><div class='del'>-				csbcpb-&gt;cpb.aes_xcbc.out_cv_mac,</div><div class='del'>-				AES_BLOCK_SIZE);</div><div class='del'>-		}</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.aes_xcbc.cv,</div><div class='add'>+		       csbcpb-&gt;cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-		NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='ctx'> 		if (!nx_ctx-&gt;op.inlen || !nx_ctx-&gt;op.outlen) {</div><div class='ctx'> 			rc = -EINVAL;</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -271,28 +228,24 @@ static int nx_xcbc_update(struct shash_desc *desc,</div><div class='ctx'> </div><div class='ctx'> 		atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;aes_ops));</div><div class='ctx'> </div><div class='del'>-		/* everything after the first update is continuation */</div><div class='del'>-		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='del'>-</div><div class='ctx'> 		total -= to_process;</div><div class='del'>-		data += to_process - sctx-&gt;count;</div><div class='del'>-		sctx-&gt;count = 0;</div><div class='add'>+		data += to_process;</div><div class='ctx'> 		in_sg = nx_ctx-&gt;in_sg;</div><div class='del'>-	} while (leftover &gt; AES_BLOCK_SIZE);</div><div class='add'>+	} while (total &gt;= AES_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	/* copy the leftover back into the state struct */</div><div class='del'>-	memcpy(sctx-&gt;buffer, data, leftover);</div><div class='del'>-	sctx-&gt;count = leftover;</div><div class='add'>+	rc = total;</div><div class='add'>+	memcpy(sctx-&gt;state, csbcpb-&gt;cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nx_ctx-&gt;lock, irq_flags);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nx_xcbc_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int nx_xcbc_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			 unsigned int nbytes, u8 *out)</div><div class='ctx'> {</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct xcbc_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = nx_ctx-&gt;csbcpb;</div><div class='ctx'> 	struct nx_sg *in_sg, *out_sg;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='hunk'>@@ -301,12 +254,10 @@ static int nx_xcbc_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;nx_ctx-&gt;lock, irq_flags);</div><div class='ctx'> </div><div class='del'>-	if (NX_CPB_FDM(csbcpb) &amp; NX_FDM_CONTINUATION) {</div><div class='del'>-		/* we've hit the nx chip previously, now we're finalizing,</div><div class='del'>-		 * so copy over the partial digest */</div><div class='del'>-		memcpy(csbcpb-&gt;cpb.aes_xcbc.cv,</div><div class='del'>-		       csbcpb-&gt;cpb.aes_xcbc.out_cv_mac, AES_BLOCK_SIZE);</div><div class='del'>-	} else if (sctx-&gt;count == 0) {</div><div class='add'>+	if (nbytes) {</div><div class='add'>+		/* non-zero final, so copy over the partial digest */</div><div class='add'>+		memcpy(csbcpb-&gt;cpb.aes_xcbc.cv, sctx-&gt;state, AES_BLOCK_SIZE);</div><div class='add'>+	} else {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * we've never seen an update, so this is a 0 byte op. The</div><div class='ctx'> 		 * hardware cannot handle a 0 byte op, so just ECB to</div><div class='hunk'>@@ -320,11 +271,11 @@ static int nx_xcbc_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 	 * this is not an intermediate operation */</div><div class='ctx'> 	NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='ctx'> </div><div class='del'>-	len = sctx-&gt;count;</div><div class='del'>-	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)sctx-&gt;buffer,</div><div class='del'>-				 &amp;len, nx_ctx-&gt;ap-&gt;sglen);</div><div class='add'>+	len = nbytes;</div><div class='add'>+	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)src, &amp;len,</div><div class='add'>+				 nx_ctx-&gt;ap-&gt;sglen);</div><div class='ctx'> </div><div class='del'>-	if (len != sctx-&gt;count) {</div><div class='add'>+	if (len != nbytes) {</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -362,18 +313,19 @@ struct shash_alg nx_shash_aes_xcbc_alg = {</div><div class='ctx'> 	.digestsize = AES_BLOCK_SIZE,</div><div class='ctx'> 	.init       = nx_xcbc_init,</div><div class='ctx'> 	.update     = nx_xcbc_update,</div><div class='del'>-	.final      = nx_xcbc_final,</div><div class='add'>+	.finup      = nx_xcbc_finup,</div><div class='ctx'> 	.setkey     = nx_xcbc_set_key,</div><div class='ctx'> 	.descsize   = sizeof(struct xcbc_state),</div><div class='del'>-	.statesize  = sizeof(struct xcbc_state),</div><div class='add'>+	.init_tfm   = nx_crypto_ctx_aes_xcbc_init2,</div><div class='add'>+	.exit_tfm   = nx_crypto_ctx_shash_exit,</div><div class='ctx'> 	.base       = {</div><div class='ctx'> 		.cra_name        = "xcbc(aes)",</div><div class='ctx'> 		.cra_driver_name = "xcbc-aes-nx",</div><div class='ctx'> 		.cra_priority    = 300,</div><div class='add'>+		.cra_flags	 = CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+				   CRYPTO_AHASH_ALG_FINAL_NONZERO,</div><div class='ctx'> 		.cra_blocksize   = AES_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module      = THIS_MODULE,</div><div class='ctx'> 		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='del'>-		.cra_init        = nx_crypto_ctx_aes_xcbc_init2,</div><div class='del'>-		.cra_exit        = nx_crypto_ctx_exit,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/nx/nx-sha256.c b/drivers/crypto/nx/nx-sha256.c<br/>index c3bebf0feabe..5b29dd026df2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-sha256.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-sha256.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-sha256.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx-sha256.c</a></div><div class='hunk'>@@ -9,9 +9,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/vio.h&gt;</div><div class='del'>-#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "nx_csbcpb.h"</div><div class='ctx'> #include "nx.h"</div><div class='hunk'>@@ -19,12 +22,11 @@</div><div class='ctx'> struct sha256_state_be {</div><div class='ctx'> 	__be32 state[SHA256_DIGEST_SIZE / 4];</div><div class='ctx'> 	u64 count;</div><div class='del'>-	u8 buf[SHA256_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int nx_crypto_ctx_sha256_init(struct crypto_tfm *tfm)</div><div class='add'>+static int nx_crypto_ctx_sha256_init(struct crypto_shash *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(tfm);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = nx_crypto_ctx_sha_init(tfm);</div><div class='hunk'>@@ -40,11 +42,10 @@ static int nx_crypto_ctx_sha256_init(struct crypto_tfm *tfm)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nx_sha256_init(struct shash_desc *desc) {</div><div class='add'>+static int nx_sha256_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='ctx'> 	struct sha256_state_be *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	memset(sctx, 0, sizeof *sctx);</div><div class='del'>-</div><div class='ctx'> 	sctx-&gt;state[0] = __cpu_to_be32(SHA256_H0);</div><div class='ctx'> 	sctx-&gt;state[1] = __cpu_to_be32(SHA256_H1);</div><div class='ctx'> 	sctx-&gt;state[2] = __cpu_to_be32(SHA256_H2);</div><div class='hunk'>@@ -61,30 +62,18 @@ static int nx_sha256_init(struct shash_desc *desc) {</div><div class='ctx'> static int nx_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			    unsigned int len)</div><div class='ctx'> {</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sha256_state_be *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	u64 to_process, leftover, total = len;</div><div class='ctx'> 	struct nx_sg *out_sg;</div><div class='del'>-	u64 to_process = 0, leftover, total;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	int data_len;</div><div class='ctx'> 	u32 max_sg_len;</div><div class='del'>-	u64 buf_len = (sctx-&gt;count % SHA256_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;nx_ctx-&gt;lock, irq_flags);</div><div class='ctx'> </div><div class='del'>-	/* 2 cases for total data len:</div><div class='del'>-	 *  1: &lt; SHA256_BLOCK_SIZE: copy into state, return 0</div><div class='del'>-	 *  2: &gt;= SHA256_BLOCK_SIZE: process X blocks, copy in leftover</div><div class='del'>-	 */</div><div class='del'>-	total = (sctx-&gt;count % SHA256_BLOCK_SIZE) + len;</div><div class='del'>-	if (total &lt; SHA256_BLOCK_SIZE) {</div><div class='del'>-		memcpy(sctx-&gt;buf + buf_len, data, len);</div><div class='del'>-		sctx-&gt;count += len;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	memcpy(csbcpb-&gt;cpb.sha256.message_digest, sctx-&gt;state, SHA256_DIGEST_SIZE);</div><div class='ctx'> 	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='ctx'> 	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='hunk'>@@ -105,41 +94,17 @@ static int nx_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		int used_sgs = 0;</div><div class='ctx'> 		struct nx_sg *in_sg = nx_ctx-&gt;in_sg;</div><div class='ctx'> </div><div class='del'>-		if (buf_len) {</div><div class='del'>-			data_len = buf_len;</div><div class='del'>-			in_sg = nx_build_sg_list(in_sg,</div><div class='del'>-						 (u8 *) sctx-&gt;buf,</div><div class='del'>-						 &amp;data_len,</div><div class='del'>-						 max_sg_len);</div><div class='del'>-</div><div class='del'>-			if (data_len != buf_len) {</div><div class='del'>-				rc = -EINVAL;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-			used_sgs = in_sg - nx_ctx-&gt;in_sg;</div><div class='del'>-		}</div><div class='add'>+		to_process = total &amp; ~(SHA256_BLOCK_SIZE - 1);</div><div class='ctx'> </div><div class='del'>-		/* to_process: SHA256_BLOCK_SIZE aligned chunk to be</div><div class='del'>-		 * processed in this iteration. This value is restricted</div><div class='del'>-		 * by sg list limits and number of sgs we already used</div><div class='del'>-		 * for leftover data. (see above)</div><div class='del'>-		 * In ideal case, we could allow NX_PAGE_SIZE * max_sg_len,</div><div class='del'>-		 * but because data may not be aligned, we need to account</div><div class='del'>-		 * for that too. */</div><div class='del'>-		to_process = min_t(u64, total,</div><div class='del'>-			(max_sg_len - 1 - used_sgs) * NX_PAGE_SIZE);</div><div class='del'>-		to_process = to_process &amp; ~(SHA256_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-		data_len = to_process - buf_len;</div><div class='add'>+		data_len = to_process;</div><div class='ctx'> 		in_sg = nx_build_sg_list(in_sg, (u8 *) data,</div><div class='ctx'> 					 &amp;data_len, max_sg_len);</div><div class='ctx'> </div><div class='ctx'> 		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) * sizeof(struct nx_sg);</div><div class='ctx'> </div><div class='del'>-		to_process = data_len + buf_len;</div><div class='add'>+		to_process = data_len;</div><div class='ctx'> 		leftover = total - to_process;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -162,26 +127,22 @@ static int nx_sha256_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 		atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sha256_ops));</div><div class='ctx'> </div><div class='ctx'> 		total -= to_process;</div><div class='del'>-		data += to_process - buf_len;</div><div class='del'>-		buf_len = 0;</div><div class='del'>-</div><div class='add'>+		data += to_process;</div><div class='add'>+		sctx-&gt;count += to_process;</div><div class='ctx'> 	} while (leftover &gt;= SHA256_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	/* copy the leftover back into the state struct */</div><div class='del'>-	if (leftover)</div><div class='del'>-		memcpy(sctx-&gt;buf, data, leftover);</div><div class='del'>-</div><div class='del'>-	sctx-&gt;count += len;</div><div class='add'>+	rc = leftover;</div><div class='ctx'> 	memcpy(sctx-&gt;state, csbcpb-&gt;cpb.sha256.message_digest, SHA256_DIGEST_SIZE);</div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nx_ctx-&gt;lock, irq_flags);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nx_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int nx_sha256_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			   unsigned int nbytes, u8 *out)</div><div class='ctx'> {</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sha256_state_be *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='ctx'> 	struct nx_sg *in_sg, *out_sg;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='hunk'>@@ -197,25 +158,19 @@ static int nx_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 			nx_ctx-&gt;ap-&gt;databytelen/NX_PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* final is represented by continuing the operation and indicating that</div><div class='del'>-	 * this is not an intermediate operation */</div><div class='del'>-	if (sctx-&gt;count &gt;= SHA256_BLOCK_SIZE) {</div><div class='del'>-		/* we've hit the nx chip previously, now we're finalizing,</div><div class='del'>-		 * so copy over the partial digest */</div><div class='del'>-		memcpy(csbcpb-&gt;cpb.sha256.input_partial_digest, sctx-&gt;state, SHA256_DIGEST_SIZE);</div><div class='del'>-		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='del'>-		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='del'>-	} else {</div><div class='del'>-		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='del'>-		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_CONTINUATION;</div><div class='del'>-	}</div><div class='add'>+	 * this is not an intermediate operation</div><div class='add'>+	 * copy over the partial digest */</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.sha256.input_partial_digest, sctx-&gt;state, SHA256_DIGEST_SIZE);</div><div class='add'>+	NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='ctx'> </div><div class='add'>+	sctx-&gt;count += nbytes;</div><div class='ctx'> 	csbcpb-&gt;cpb.sha256.message_bit_length = (u64) (sctx-&gt;count * 8);</div><div class='ctx'> </div><div class='del'>-	len = sctx-&gt;count &amp; (SHA256_BLOCK_SIZE - 1);</div><div class='del'>-	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *) sctx-&gt;buf,</div><div class='del'>-				 &amp;len, max_sg_len);</div><div class='add'>+	len = nbytes;</div><div class='add'>+	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)src, &amp;len, max_sg_len);</div><div class='ctx'> </div><div class='del'>-	if (len != (sctx-&gt;count &amp; (SHA256_BLOCK_SIZE - 1))) {</div><div class='add'>+	if (len != nbytes) {</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -251,18 +206,34 @@ out:</div><div class='ctx'> static int nx_sha256_export(struct shash_desc *desc, void *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha256_state_be *sctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		u8 *u8;</div><div class='add'>+		u32 *u32;</div><div class='add'>+		u64 *u64;</div><div class='add'>+	} p = { .u8 = out };</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='add'>+	for (i = 0; i &lt; SHA256_DIGEST_SIZE / sizeof(*p.u32); i++)</div><div class='add'>+		put_unaligned(be32_to_cpu(sctx-&gt;state[i]), p.u32++);</div><div class='ctx'> </div><div class='add'>+	put_unaligned(sctx-&gt;count, p.u64++);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nx_sha256_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha256_state_be *sctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		const u8 *u8;</div><div class='add'>+		const u32 *u32;</div><div class='add'>+		const u64 *u64;</div><div class='add'>+	} p = { .u8 = in };</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='add'>+	for (i = 0; i &lt; SHA256_DIGEST_SIZE / sizeof(*p.u32); i++)</div><div class='add'>+		sctx-&gt;state[i] = cpu_to_be32(get_unaligned(p.u32++));</div><div class='ctx'> </div><div class='add'>+	sctx-&gt;count = get_unaligned(p.u64++);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -270,19 +241,20 @@ struct shash_alg nx_shash_sha256_alg = {</div><div class='ctx'> 	.digestsize = SHA256_DIGEST_SIZE,</div><div class='ctx'> 	.init       = nx_sha256_init,</div><div class='ctx'> 	.update     = nx_sha256_update,</div><div class='del'>-	.final      = nx_sha256_final,</div><div class='add'>+	.finup      = nx_sha256_finup,</div><div class='ctx'> 	.export     = nx_sha256_export,</div><div class='ctx'> 	.import     = nx_sha256_import,</div><div class='add'>+	.init_tfm   = nx_crypto_ctx_sha256_init,</div><div class='add'>+	.exit_tfm   = nx_crypto_ctx_shash_exit,</div><div class='ctx'> 	.descsize   = sizeof(struct sha256_state_be),</div><div class='ctx'> 	.statesize  = sizeof(struct sha256_state_be),</div><div class='ctx'> 	.base       = {</div><div class='ctx'> 		.cra_name        = "sha256",</div><div class='ctx'> 		.cra_driver_name = "sha256-nx",</div><div class='ctx'> 		.cra_priority    = 300,</div><div class='add'>+		.cra_flags	 = CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize   = SHA256_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module      = THIS_MODULE,</div><div class='ctx'> 		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='del'>-		.cra_init        = nx_crypto_ctx_sha256_init,</div><div class='del'>-		.cra_exit        = nx_crypto_ctx_exit,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/nx/nx-sha512.c b/drivers/crypto/nx/nx-sha512.c<br/>index 1ffb40d2c324..f74776b7d7d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-sha512.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx-sha512.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx-sha512.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx-sha512.c</a></div><div class='hunk'>@@ -9,8 +9,12 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;asm/vio.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "nx_csbcpb.h"</div><div class='ctx'> #include "nx.h"</div><div class='hunk'>@@ -18,12 +22,11 @@</div><div class='ctx'> struct sha512_state_be {</div><div class='ctx'> 	__be64 state[SHA512_DIGEST_SIZE / 8];</div><div class='ctx'> 	u64 count[2];</div><div class='del'>-	u8 buf[SHA512_BLOCK_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int nx_crypto_ctx_sha512_init(struct crypto_tfm *tfm)</div><div class='add'>+static int nx_crypto_ctx_sha512_init(struct crypto_shash *tfm)</div><div class='ctx'> {</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(tfm);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(tfm);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = nx_crypto_ctx_sha_init(tfm);</div><div class='hunk'>@@ -43,8 +46,6 @@ static int nx_sha512_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha512_state_be *sctx = shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	memset(sctx, 0, sizeof *sctx);</div><div class='del'>-</div><div class='ctx'> 	sctx-&gt;state[0] = __cpu_to_be64(SHA512_H0);</div><div class='ctx'> 	sctx-&gt;state[1] = __cpu_to_be64(SHA512_H1);</div><div class='ctx'> 	sctx-&gt;state[2] = __cpu_to_be64(SHA512_H2);</div><div class='hunk'>@@ -54,6 +55,7 @@ static int nx_sha512_init(struct shash_desc *desc)</div><div class='ctx'> 	sctx-&gt;state[6] = __cpu_to_be64(SHA512_H6);</div><div class='ctx'> 	sctx-&gt;state[7] = __cpu_to_be64(SHA512_H7);</div><div class='ctx'> 	sctx-&gt;count[0] = 0;</div><div class='add'>+	sctx-&gt;count[1] = 0;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -61,30 +63,18 @@ static int nx_sha512_init(struct shash_desc *desc)</div><div class='ctx'> static int nx_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 			    unsigned int len)</div><div class='ctx'> {</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct sha512_state_be *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='add'>+	u64 to_process, leftover, total = len;</div><div class='ctx'> 	struct nx_sg *out_sg;</div><div class='del'>-	u64 to_process, leftover = 0, total;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	int data_len;</div><div class='ctx'> 	u32 max_sg_len;</div><div class='del'>-	u64 buf_len = (sctx-&gt;count[0] % SHA512_BLOCK_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;nx_ctx-&gt;lock, irq_flags);</div><div class='ctx'> </div><div class='del'>-	/* 2 cases for total data len:</div><div class='del'>-	 *  1: &lt; SHA512_BLOCK_SIZE: copy into state, return 0</div><div class='del'>-	 *  2: &gt;= SHA512_BLOCK_SIZE: process X blocks, copy in leftover</div><div class='del'>-	 */</div><div class='del'>-	total = (sctx-&gt;count[0] % SHA512_BLOCK_SIZE) + len;</div><div class='del'>-	if (total &lt; SHA512_BLOCK_SIZE) {</div><div class='del'>-		memcpy(sctx-&gt;buf + buf_len, data, len);</div><div class='del'>-		sctx-&gt;count[0] += len;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	memcpy(csbcpb-&gt;cpb.sha512.message_digest, sctx-&gt;state, SHA512_DIGEST_SIZE);</div><div class='ctx'> 	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;</div><div class='ctx'> 	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='hunk'>@@ -105,45 +95,17 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		int used_sgs = 0;</div><div class='ctx'> 		struct nx_sg *in_sg = nx_ctx-&gt;in_sg;</div><div class='ctx'> </div><div class='del'>-		if (buf_len) {</div><div class='del'>-			data_len = buf_len;</div><div class='del'>-			in_sg = nx_build_sg_list(in_sg,</div><div class='del'>-						 (u8 *) sctx-&gt;buf,</div><div class='del'>-						 &amp;data_len, max_sg_len);</div><div class='del'>-</div><div class='del'>-			if (data_len != buf_len) {</div><div class='del'>-				rc = -EINVAL;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-			used_sgs = in_sg - nx_ctx-&gt;in_sg;</div><div class='del'>-		}</div><div class='add'>+		to_process = total &amp; ~(SHA512_BLOCK_SIZE - 1);</div><div class='ctx'> </div><div class='del'>-		/* to_process: SHA512_BLOCK_SIZE aligned chunk to be</div><div class='del'>-		 * processed in this iteration. This value is restricted</div><div class='del'>-		 * by sg list limits and number of sgs we already used</div><div class='del'>-		 * for leftover data. (see above)</div><div class='del'>-		 * In ideal case, we could allow NX_PAGE_SIZE * max_sg_len,</div><div class='del'>-		 * but because data may not be aligned, we need to account</div><div class='del'>-		 * for that too. */</div><div class='del'>-		to_process = min_t(u64, total,</div><div class='del'>-			(max_sg_len - 1 - used_sgs) * NX_PAGE_SIZE);</div><div class='del'>-		to_process = to_process &amp; ~(SHA512_BLOCK_SIZE - 1);</div><div class='del'>-</div><div class='del'>-		data_len = to_process - buf_len;</div><div class='add'>+		data_len = to_process;</div><div class='ctx'> 		in_sg = nx_build_sg_list(in_sg, (u8 *) data,</div><div class='ctx'> 					 &amp;data_len, max_sg_len);</div><div class='ctx'> </div><div class='ctx'> 		nx_ctx-&gt;op.inlen = (nx_ctx-&gt;in_sg - in_sg) * sizeof(struct nx_sg);</div><div class='ctx'> </div><div class='del'>-		if (data_len != (to_process - buf_len)) {</div><div class='del'>-			rc = -EINVAL;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		to_process = data_len + buf_len;</div><div class='add'>+		to_process = data_len;</div><div class='ctx'> 		leftover = total - to_process;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -166,30 +128,29 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data,</div><div class='ctx'> 		atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sha512_ops));</div><div class='ctx'> </div><div class='ctx'> 		total -= to_process;</div><div class='del'>-		data += to_process - buf_len;</div><div class='del'>-		buf_len = 0;</div><div class='del'>-</div><div class='add'>+		data += to_process;</div><div class='add'>+		sctx-&gt;count[0] += to_process;</div><div class='add'>+		if (sctx-&gt;count[0] &lt; to_process)</div><div class='add'>+			sctx-&gt;count[1]++;</div><div class='ctx'> 	} while (leftover &gt;= SHA512_BLOCK_SIZE);</div><div class='ctx'> </div><div class='del'>-	/* copy the leftover back into the state struct */</div><div class='del'>-	if (leftover)</div><div class='del'>-		memcpy(sctx-&gt;buf, data, leftover);</div><div class='del'>-	sctx-&gt;count[0] += len;</div><div class='add'>+	rc = leftover;</div><div class='ctx'> 	memcpy(sctx-&gt;state, csbcpb-&gt;cpb.sha512.message_digest, SHA512_DIGEST_SIZE);</div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;nx_ctx-&gt;lock, irq_flags);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nx_sha512_final(struct shash_desc *desc, u8 *out)</div><div class='add'>+static int nx_sha512_finup(struct shash_desc *desc, const u8 *src,</div><div class='add'>+			   unsigned int nbytes, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha512_state_be *sctx = shash_desc_ctx(desc);</div><div class='del'>-	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&amp;desc-&gt;tfm-&gt;base);</div><div class='add'>+	struct nx_crypto_ctx *nx_ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='ctx'> 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx-&gt;csbcpb;</div><div class='ctx'> 	struct nx_sg *in_sg, *out_sg;</div><div class='ctx'> 	u32 max_sg_len;</div><div class='del'>-	u64 count0;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='add'>+	u64 count0, count1;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	int len;</div><div class='ctx'> </div><div class='hunk'>@@ -201,30 +162,23 @@ static int nx_sha512_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 			nx_ctx-&gt;ap-&gt;databytelen/NX_PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* final is represented by continuing the operation and indicating that</div><div class='del'>-	 * this is not an intermediate operation */</div><div class='del'>-	if (sctx-&gt;count[0] &gt;= SHA512_BLOCK_SIZE) {</div><div class='del'>-		/* we've hit the nx chip previously, now we're finalizing,</div><div class='del'>-		 * so copy over the partial digest */</div><div class='del'>-		memcpy(csbcpb-&gt;cpb.sha512.input_partial_digest, sctx-&gt;state,</div><div class='del'>-							SHA512_DIGEST_SIZE);</div><div class='del'>-		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='del'>-		NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='del'>-	} else {</div><div class='del'>-		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='del'>-		NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_CONTINUATION;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	 * this is not an intermediate operation</div><div class='add'>+	 * copy over the partial digest */</div><div class='add'>+	memcpy(csbcpb-&gt;cpb.sha512.input_partial_digest, sctx-&gt;state, SHA512_DIGEST_SIZE);</div><div class='ctx'> 	NX_CPB_FDM(csbcpb) &amp;= ~NX_FDM_INTERMEDIATE;</div><div class='add'>+	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;</div><div class='ctx'> </div><div class='del'>-	count0 = sctx-&gt;count[0] * 8;</div><div class='add'>+	count0 = sctx-&gt;count[0] + nbytes;</div><div class='add'>+	count1 = sctx-&gt;count[1];</div><div class='ctx'> </div><div class='del'>-	csbcpb-&gt;cpb.sha512.message_bit_length_lo = count0;</div><div class='add'>+	csbcpb-&gt;cpb.sha512.message_bit_length_lo = count0 &lt;&lt; 3;</div><div class='add'>+	csbcpb-&gt;cpb.sha512.message_bit_length_hi = (count1 &lt;&lt; 3) |</div><div class='add'>+						   (count0 &gt;&gt; 61);</div><div class='ctx'> </div><div class='del'>-	len = sctx-&gt;count[0] &amp; (SHA512_BLOCK_SIZE - 1);</div><div class='del'>-	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, sctx-&gt;buf, &amp;len,</div><div class='del'>-				 max_sg_len);</div><div class='add'>+	len = nbytes;</div><div class='add'>+	in_sg = nx_build_sg_list(nx_ctx-&gt;in_sg, (u8 *)src, &amp;len, max_sg_len);</div><div class='ctx'> </div><div class='del'>-	if (len != (sctx-&gt;count[0] &amp; (SHA512_BLOCK_SIZE - 1))) {</div><div class='add'>+	if (len != nbytes) {</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -246,7 +200,7 @@ static int nx_sha512_final(struct shash_desc *desc, u8 *out)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;(nx_ctx-&gt;stats-&gt;sha512_ops));</div><div class='del'>-	atomic64_add(sctx-&gt;count[0], &amp;(nx_ctx-&gt;stats-&gt;sha512_bytes));</div><div class='add'>+	atomic64_add(count0, &amp;(nx_ctx-&gt;stats-&gt;sha512_bytes));</div><div class='ctx'> </div><div class='ctx'> 	memcpy(out, csbcpb-&gt;cpb.sha512.message_digest, SHA512_DIGEST_SIZE);</div><div class='ctx'> out:</div><div class='hunk'>@@ -257,18 +211,34 @@ out:</div><div class='ctx'> static int nx_sha512_export(struct shash_desc *desc, void *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha512_state_be *sctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		u8 *u8;</div><div class='add'>+		u64 *u64;</div><div class='add'>+	} p = { .u8 = out };</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	memcpy(out, sctx, sizeof(*sctx));</div><div class='add'>+	for (i = 0; i &lt; SHA512_DIGEST_SIZE / sizeof(*p.u64); i++)</div><div class='add'>+		put_unaligned(be64_to_cpu(sctx-&gt;state[i]), p.u64++);</div><div class='ctx'> </div><div class='add'>+	put_unaligned(sctx-&gt;count[0], p.u64++);</div><div class='add'>+	put_unaligned(sctx-&gt;count[1], p.u64++);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nx_sha512_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='ctx'> 	struct sha512_state_be *sctx = shash_desc_ctx(desc);</div><div class='add'>+	union {</div><div class='add'>+		const u8 *u8;</div><div class='add'>+		const u64 *u64;</div><div class='add'>+	} p = { .u8 = in };</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	memcpy(sctx, in, sizeof(*sctx));</div><div class='add'>+	for (i = 0; i &lt; SHA512_DIGEST_SIZE / sizeof(*p.u64); i++)</div><div class='add'>+		sctx-&gt;state[i] = cpu_to_be64(get_unaligned(p.u64++));</div><div class='ctx'> </div><div class='add'>+	sctx-&gt;count[0] = get_unaligned(p.u64++);</div><div class='add'>+	sctx-&gt;count[1] = get_unaligned(p.u64++);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -276,19 +246,20 @@ struct shash_alg nx_shash_sha512_alg = {</div><div class='ctx'> 	.digestsize = SHA512_DIGEST_SIZE,</div><div class='ctx'> 	.init       = nx_sha512_init,</div><div class='ctx'> 	.update     = nx_sha512_update,</div><div class='del'>-	.final      = nx_sha512_final,</div><div class='add'>+	.finup      = nx_sha512_finup,</div><div class='ctx'> 	.export     = nx_sha512_export,</div><div class='ctx'> 	.import     = nx_sha512_import,</div><div class='add'>+	.init_tfm   = nx_crypto_ctx_sha512_init,</div><div class='add'>+	.exit_tfm   = nx_crypto_ctx_shash_exit,</div><div class='ctx'> 	.descsize   = sizeof(struct sha512_state_be),</div><div class='ctx'> 	.statesize  = sizeof(struct sha512_state_be),</div><div class='ctx'> 	.base       = {</div><div class='ctx'> 		.cra_name        = "sha512",</div><div class='ctx'> 		.cra_driver_name = "sha512-nx",</div><div class='ctx'> 		.cra_priority    = 300,</div><div class='add'>+		.cra_flags	 = CRYPTO_AHASH_ALG_BLOCK_ONLY,</div><div class='ctx'> 		.cra_blocksize   = SHA512_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module      = THIS_MODULE,</div><div class='ctx'> 		.cra_ctxsize     = sizeof(struct nx_crypto_ctx),</div><div class='del'>-		.cra_init        = nx_crypto_ctx_sha512_init,</div><div class='del'>-		.cra_exit        = nx_crypto_ctx_exit,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/crypto/nx/nx.c b/drivers/crypto/nx/nx.c<br/>index a3b979193d9b..78135fb13f5c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx.c</a></div><div class='hunk'>@@ -7,11 +7,11 @@</div><div class='ctx'>  * Author: Kent Yoder &lt;yoder1@us.ibm.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/aead.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='del'>-#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='ctx'> #include &lt;crypto/scatterwalk.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='hunk'>@@ -124,8 +124,6 @@ struct nx_sg *nx_build_sg_list(struct nx_sg *sg_head,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if ((sg - sg_head) == sgmax) {</div><div class='del'>-			pr_err("nx: scatter/gather list overflow, pid: %d\n",</div><div class='del'>-			       current-&gt;pid);</div><div class='ctx'> 			sg++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -702,14 +700,14 @@ int nx_crypto_ctx_aes_ecb_init(struct crypto_skcipher *tfm)</div><div class='ctx'> 				  NX_MODE_AES_ECB);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm)</div><div class='add'>+int nx_crypto_ctx_sha_init(struct crypto_shash *tfm)</div><div class='ctx'> {</div><div class='del'>-	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_SHA, NX_MODE_SHA);</div><div class='add'>+	return nx_crypto_ctx_init(crypto_shash_ctx(tfm), NX_FC_SHA, NX_MODE_SHA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm)</div><div class='add'>+int nx_crypto_ctx_aes_xcbc_init(struct crypto_shash *tfm)</div><div class='ctx'> {</div><div class='del'>-	return nx_crypto_ctx_init(crypto_tfm_ctx(tfm), NX_FC_AES,</div><div class='add'>+	return nx_crypto_ctx_init(crypto_shash_ctx(tfm), NX_FC_AES,</div><div class='ctx'> 				  NX_MODE_AES_XCBC_MAC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -744,6 +742,11 @@ void nx_crypto_ctx_aead_exit(struct crypto_aead *tfm)</div><div class='ctx'> 	kfree_sensitive(nx_ctx-&gt;kmem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void nx_crypto_ctx_shash_exit(struct crypto_shash *tfm)</div><div class='add'>+{</div><div class='add'>+	nx_crypto_ctx_exit(crypto_shash_ctx(tfm));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int nx_probe(struct vio_dev *viodev, const struct vio_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	dev_dbg(&amp;viodev-&gt;dev, "driver probed: %s resource id: 0x%x\n",</div><div class='head'>diff --git a/drivers/crypto/nx/nx.h b/drivers/crypto/nx/nx.h<br/>index e1b4b6927bec..36974f08490a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/nx/nx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/nx/nx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/nx/nx.h</a></div><div class='hunk'>@@ -3,7 +3,11 @@</div><div class='ctx'> #ifndef __NX_H__</div><div class='ctx'> #define __NX_H__</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/vio.h&gt;</div><div class='ctx'> #include &lt;crypto/ctr.h&gt;</div><div class='add'>+#include &lt;crypto/internal/aead.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define NX_NAME		"nx-crypto"</div><div class='ctx'> #define NX_STRING	"IBM Power7+ Nest Accelerator Crypto Driver"</div><div class='hunk'>@@ -139,19 +143,20 @@ struct nx_crypto_ctx {</div><div class='ctx'> 	} priv;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct crypto_aead;</div><div class='add'>+struct scatterlist;</div><div class='ctx'> </div><div class='ctx'> /* prototypes */</div><div class='ctx'> int nx_crypto_ctx_aes_ccm_init(struct crypto_aead *tfm);</div><div class='ctx'> int nx_crypto_ctx_aes_gcm_init(struct crypto_aead *tfm);</div><div class='del'>-int nx_crypto_ctx_aes_xcbc_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_aes_xcbc_init(struct crypto_shash *tfm);</div><div class='ctx'> int nx_crypto_ctx_aes_ctr_init(struct crypto_skcipher *tfm);</div><div class='ctx'> int nx_crypto_ctx_aes_cbc_init(struct crypto_skcipher *tfm);</div><div class='ctx'> int nx_crypto_ctx_aes_ecb_init(struct crypto_skcipher *tfm);</div><div class='del'>-int nx_crypto_ctx_sha_init(struct crypto_tfm *tfm);</div><div class='add'>+int nx_crypto_ctx_sha_init(struct crypto_shash *tfm);</div><div class='ctx'> void nx_crypto_ctx_exit(struct crypto_tfm *tfm);</div><div class='ctx'> void nx_crypto_ctx_skcipher_exit(struct crypto_skcipher *tfm);</div><div class='ctx'> void nx_crypto_ctx_aead_exit(struct crypto_aead *tfm);</div><div class='add'>+void nx_crypto_ctx_shash_exit(struct crypto_shash *tfm);</div><div class='ctx'> void nx_ctx_init(struct nx_crypto_ctx *nx_ctx, unsigned int function);</div><div class='ctx'> int nx_hcall_sync(struct nx_crypto_ctx *ctx, struct vio_pfo_op *op,</div><div class='ctx'> 		  u32 may_sleep);</div><div class='head'>diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c<br/>index 551dd32a8db0..1ecf5f6ac04e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/omap-aes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/omap-aes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/omap-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/omap-aes.c</a></div><div class='hunk'>@@ -1086,10 +1086,7 @@ static struct attribute *omap_aes_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_fallback.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static const struct attribute_group omap_aes_attr_group = {</div><div class='del'>-	.attrs = omap_aes_attrs,</div><div class='del'>-};</div><div class='add'>+ATTRIBUTE_GROUPS(omap_aes);</div><div class='ctx'> </div><div class='ctx'> static int omap_aes_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1215,12 +1212,6 @@ static int omap_aes_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;omap_aes_attr_group);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "could not create sysfs device attrs\n");</div><div class='del'>-		goto err_aead_algs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> err_aead_algs:</div><div class='ctx'> 	for (i = dd-&gt;pdata-&gt;aead_algs_info-&gt;registered - 1; i &gt;= 0; i--) {</div><div class='hunk'>@@ -1277,8 +1268,6 @@ static void omap_aes_remove(struct platform_device *pdev)</div><div class='ctx'> 	tasklet_kill(&amp;dd-&gt;done_task);</div><div class='ctx'> 	omap_aes_dma_cleanup(dd);</div><div class='ctx'> 	pm_runtime_disable(dd-&gt;dev);</div><div class='del'>-</div><div class='del'>-	sysfs_remove_group(&amp;dd-&gt;dev-&gt;kobj, &amp;omap_aes_attr_group);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM_SLEEP</div><div class='hunk'>@@ -1304,6 +1293,7 @@ static struct platform_driver omap_aes_driver = {</div><div class='ctx'> 		.name	= "omap-aes",</div><div class='ctx'> 		.pm	= &amp;omap_aes_pm_ops,</div><div class='ctx'> 		.of_match_table	= omap_aes_of_match,</div><div class='add'>+		.dev_groups = omap_aes_groups,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/omap-sham.c b/drivers/crypto/omap-sham.c<br/>index 7021481bf027..56f192cb976d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/omap-sham.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/omap-sham.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/omap-sham.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/omap-sham.c</a></div><div class='hunk'>@@ -2039,10 +2039,7 @@ static struct attribute *omap_sham_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_fallback.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-static const struct attribute_group omap_sham_attr_group = {</div><div class='del'>-	.attrs = omap_sham_attrs,</div><div class='del'>-};</div><div class='add'>+ATTRIBUTE_GROUPS(omap_sham);</div><div class='ctx'> </div><div class='ctx'> static int omap_sham_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -2158,12 +2155,6 @@ static int omap_sham_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = sysfs_create_group(&amp;dev-&gt;kobj, &amp;omap_sham_attr_group);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "could not create sysfs device attrs\n");</div><div class='del'>-		goto err_algs;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_algs:</div><div class='hunk'>@@ -2210,8 +2201,6 @@ static void omap_sham_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (!dd-&gt;polling_mode)</div><div class='ctx'> 		dma_release_channel(dd-&gt;dma_lch);</div><div class='del'>-</div><div class='del'>-	sysfs_remove_group(&amp;dd-&gt;dev-&gt;kobj, &amp;omap_sham_attr_group);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver omap_sham_driver = {</div><div class='hunk'>@@ -2220,6 +2209,7 @@ static struct platform_driver omap_sham_driver = {</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.name	= "omap-sham",</div><div class='ctx'> 		.of_match_table	= omap_sham_of_match,</div><div class='add'>+		.dev_groups = omap_sham_groups,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c<br/>index db9e84c0c9fb..329f60ad422e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/padlock-sha.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/padlock-sha.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/padlock-sha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/padlock-sha.c</a></div><div class='hunk'>@@ -7,59 +7,89 @@</div><div class='ctx'>  * Copyright (c) 2006  Michal Ludvig &lt;michal@logix.cz&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/padlock.h&gt;</div><div class='ctx'> #include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;crypto/sha2.h&gt;</div><div class='add'>+#include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='del'>-#include &lt;asm/cpu_device_id.h&gt;</div><div class='del'>-#include &lt;asm/fpu/api.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='del'>-struct padlock_sha_desc {</div><div class='del'>-	struct shash_desc fallback;</div><div class='del'>-};</div><div class='add'>+#define PADLOCK_SHA_DESCSIZE (128 + ((PADLOCK_ALIGNMENT - 1) &amp; \</div><div class='add'>+				     ~(CRYPTO_MINALIGN - 1)))</div><div class='ctx'> </div><div class='ctx'> struct padlock_sha_ctx {</div><div class='del'>-	struct crypto_shash *fallback;</div><div class='add'>+	struct crypto_ahash *fallback;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int padlock_sha_init(struct shash_desc *desc)</div><div class='add'>+static inline void *padlock_shash_desc_ctx(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct padlock_sha_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	return PTR_ALIGN(shash_desc_ctx(desc), PADLOCK_ALIGNMENT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int padlock_sha1_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct sha1_state *sctx = padlock_shash_desc_ctx(desc);</div><div class='add'>+</div><div class='add'>+	*sctx = (struct sha1_state){</div><div class='add'>+		.state = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int padlock_sha256_init(struct shash_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct crypto_sha256_state *sctx = padlock_shash_desc_ctx(desc);</div><div class='ctx'> </div><div class='del'>-	dctx-&gt;fallback.tfm = ctx-&gt;fallback;</div><div class='del'>-	return crypto_shash_init(&amp;dctx-&gt;fallback);</div><div class='add'>+	sha256_block_init(sctx);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int padlock_sha_update(struct shash_desc *desc,</div><div class='ctx'> 			      const u8 *data, unsigned int length)</div><div class='ctx'> {</div><div class='del'>-	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);</div><div class='add'>+	u8 *state = padlock_shash_desc_ctx(desc);</div><div class='add'>+	struct crypto_shash *tfm = desc-&gt;tfm;</div><div class='add'>+	int err, remain;</div><div class='add'>+</div><div class='add'>+	remain = length - round_down(length, crypto_shash_blocksize(tfm));</div><div class='add'>+	{</div><div class='add'>+		struct padlock_sha_ctx *ctx = crypto_shash_ctx(tfm);</div><div class='add'>+		HASH_REQUEST_ON_STACK(req, ctx-&gt;fallback);</div><div class='add'>+</div><div class='add'>+		ahash_request_set_callback(req, 0, NULL, NULL);</div><div class='add'>+		ahash_request_set_virt(req, data, NULL, length - remain);</div><div class='add'>+		err = crypto_ahash_import_core(req, state) ?:</div><div class='add'>+		      crypto_ahash_update(req) ?:</div><div class='add'>+		      crypto_ahash_export_core(req, state);</div><div class='add'>+		HASH_REQUEST_ZERO(req);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return crypto_shash_update(&amp;dctx-&gt;fallback, data, length);</div><div class='add'>+	return err ?: remain;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int padlock_sha_export(struct shash_desc *desc, void *out)</div><div class='ctx'> {</div><div class='del'>-	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_export(&amp;dctx-&gt;fallback, out);</div><div class='add'>+	memcpy(out, padlock_shash_desc_ctx(desc),</div><div class='add'>+	       crypto_shash_coresize(desc-&gt;tfm));</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int padlock_sha_import(struct shash_desc *desc, const void *in)</div><div class='ctx'> {</div><div class='del'>-	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct padlock_sha_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	unsigned int bs = crypto_shash_blocksize(desc-&gt;tfm);</div><div class='add'>+	unsigned int ss = crypto_shash_coresize(desc-&gt;tfm);</div><div class='add'>+	u64 *state = padlock_shash_desc_ctx(desc);</div><div class='add'>+</div><div class='add'>+	memcpy(state, in, ss);</div><div class='add'>+</div><div class='add'>+	/* Stop evil imports from generating a fault. */</div><div class='add'>+	state[ss / 8 - 1] &amp;= ~(bs - 1);</div><div class='ctx'> </div><div class='del'>-	dctx-&gt;fallback.tfm = ctx-&gt;fallback;</div><div class='del'>-	return crypto_shash_import(&amp;dctx-&gt;fallback, in);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void padlock_output_block(uint32_t *src,</div><div class='hunk'>@@ -69,65 +99,38 @@ static inline void padlock_output_block(uint32_t *src,</div><div class='ctx'> 		*dst++ = swab32(*src++);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int padlock_sha_finup(struct shash_desc *desc, const u8 *in,</div><div class='add'>+			     unsigned int count, u8 *out)</div><div class='add'>+{</div><div class='add'>+	struct padlock_sha_ctx *ctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	HASH_REQUEST_ON_STACK(req, ctx-&gt;fallback);</div><div class='add'>+</div><div class='add'>+	ahash_request_set_callback(req, 0, NULL, NULL);</div><div class='add'>+	ahash_request_set_virt(req, in, out, count);</div><div class='add'>+	return crypto_ahash_import_core(req, padlock_shash_desc_ctx(desc)) ?:</div><div class='add'>+	       crypto_ahash_finup(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int padlock_sha1_finup(struct shash_desc *desc, const u8 *in,</div><div class='ctx'> 			      unsigned int count, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	/* We can't store directly to *out as it may be unaligned. */</div><div class='ctx'> 	/* BTW Don't reduce the buffer size below 128 Bytes!</div><div class='ctx'> 	 *     PadLock microcode needs it that big. */</div><div class='del'>-	char buf[128 + PADLOCK_ALIGNMENT - STACK_ALIGN] __attribute__</div><div class='del'>-		((aligned(STACK_ALIGN)));</div><div class='del'>-	char *result = PTR_ALIGN(&amp;buf[0], PADLOCK_ALIGNMENT);</div><div class='del'>-	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct sha1_state state;</div><div class='del'>-	unsigned int space;</div><div class='del'>-	unsigned int leftover;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = crypto_shash_export(&amp;dctx-&gt;fallback, &amp;state);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='add'>+	struct sha1_state *state = padlock_shash_desc_ctx(desc);</div><div class='add'>+	u64 start = state-&gt;count;</div><div class='ctx'> </div><div class='del'>-	if (state.count + count &gt; ULONG_MAX)</div><div class='del'>-		return crypto_shash_finup(&amp;dctx-&gt;fallback, in, count, out);</div><div class='del'>-</div><div class='del'>-	leftover = ((state.count - 1) &amp; (SHA1_BLOCK_SIZE - 1)) + 1;</div><div class='del'>-	space =  SHA1_BLOCK_SIZE - leftover;</div><div class='del'>-	if (space) {</div><div class='del'>-		if (count &gt; space) {</div><div class='del'>-			err = crypto_shash_update(&amp;dctx-&gt;fallback, in, space) ?:</div><div class='del'>-			      crypto_shash_export(&amp;dctx-&gt;fallback, &amp;state);</div><div class='del'>-			if (err)</div><div class='del'>-				goto out;</div><div class='del'>-			count -= space;</div><div class='del'>-			in += space;</div><div class='del'>-		} else {</div><div class='del'>-			memcpy(state.buffer + leftover, in, count);</div><div class='del'>-			in = state.buffer;</div><div class='del'>-			count += leftover;</div><div class='del'>-			state.count &amp;= ~(SHA1_BLOCK_SIZE - 1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(result, &amp;state.state, SHA1_DIGEST_SIZE);</div><div class='add'>+	if (start + count &gt; ULONG_MAX)</div><div class='add'>+		return padlock_sha_finup(desc, in, count, out);</div><div class='ctx'> </div><div class='ctx'> 	asm volatile (".byte 0xf3,0x0f,0xa6,0xc8" /* rep xsha1 */</div><div class='ctx'> 		      : \</div><div class='del'>-		      : "c"((unsigned long)state.count + count), \</div><div class='del'>-			"a"((unsigned long)state.count), \</div><div class='del'>-			"S"(in), "D"(result));</div><div class='del'>-</div><div class='del'>-	padlock_output_block((uint32_t *)result, (uint32_t *)out, 5);</div><div class='add'>+		      : "c"((unsigned long)start + count), \</div><div class='add'>+			"a"((unsigned long)start), \</div><div class='add'>+			"S"(in), "D"(state));</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int padlock_sha1_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	const u8 *buf = (void *)desc;</div><div class='del'>-</div><div class='del'>-	return padlock_sha1_finup(desc, buf, 0, out);</div><div class='add'>+	padlock_output_block(state-&gt;state, (uint32_t *)out, 5);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int padlock_sha256_finup(struct shash_desc *desc, const u8 *in,</div><div class='hunk'>@@ -136,78 +139,46 @@ static int padlock_sha256_finup(struct shash_desc *desc, const u8 *in,</div><div class='ctx'> 	/* We can't store directly to *out as it may be unaligned. */</div><div class='ctx'> 	/* BTW Don't reduce the buffer size below 128 Bytes!</div><div class='ctx'> 	 *     PadLock microcode needs it that big. */</div><div class='del'>-	char buf[128 + PADLOCK_ALIGNMENT - STACK_ALIGN] __attribute__</div><div class='del'>-		((aligned(STACK_ALIGN)));</div><div class='del'>-	char *result = PTR_ALIGN(&amp;buf[0], PADLOCK_ALIGNMENT);</div><div class='del'>-	struct padlock_sha_desc *dctx = shash_desc_ctx(desc);</div><div class='del'>-	struct sha256_state state;</div><div class='del'>-	unsigned int space;</div><div class='del'>-	unsigned int leftover;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = crypto_shash_export(&amp;dctx-&gt;fallback, &amp;state);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='add'>+	struct sha256_state *state = padlock_shash_desc_ctx(desc);</div><div class='add'>+	u64 start = state-&gt;count;</div><div class='ctx'> </div><div class='del'>-	if (state.count + count &gt; ULONG_MAX)</div><div class='del'>-		return crypto_shash_finup(&amp;dctx-&gt;fallback, in, count, out);</div><div class='del'>-</div><div class='del'>-	leftover = ((state.count - 1) &amp; (SHA256_BLOCK_SIZE - 1)) + 1;</div><div class='del'>-	space =  SHA256_BLOCK_SIZE - leftover;</div><div class='del'>-	if (space) {</div><div class='del'>-		if (count &gt; space) {</div><div class='del'>-			err = crypto_shash_update(&amp;dctx-&gt;fallback, in, space) ?:</div><div class='del'>-			      crypto_shash_export(&amp;dctx-&gt;fallback, &amp;state);</div><div class='del'>-			if (err)</div><div class='del'>-				goto out;</div><div class='del'>-			count -= space;</div><div class='del'>-			in += space;</div><div class='del'>-		} else {</div><div class='del'>-			memcpy(state.buf + leftover, in, count);</div><div class='del'>-			in = state.buf;</div><div class='del'>-			count += leftover;</div><div class='del'>-			state.count &amp;= ~(SHA1_BLOCK_SIZE - 1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(result, &amp;state.state, SHA256_DIGEST_SIZE);</div><div class='add'>+	if (start + count &gt; ULONG_MAX)</div><div class='add'>+		return padlock_sha_finup(desc, in, count, out);</div><div class='ctx'> </div><div class='ctx'> 	asm volatile (".byte 0xf3,0x0f,0xa6,0xd0" /* rep xsha256 */</div><div class='ctx'> 		      : \</div><div class='del'>-		      : "c"((unsigned long)state.count + count), \</div><div class='del'>-			"a"((unsigned long)state.count), \</div><div class='del'>-			"S"(in), "D"(result));</div><div class='add'>+		      : "c"((unsigned long)start + count), \</div><div class='add'>+			"a"((unsigned long)start), \</div><div class='add'>+			"S"(in), "D"(state));</div><div class='ctx'> </div><div class='del'>-	padlock_output_block((uint32_t *)result, (uint32_t *)out, 8);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int padlock_sha256_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	const u8 *buf = (void *)desc;</div><div class='del'>-</div><div class='del'>-	return padlock_sha256_finup(desc, buf, 0, out);</div><div class='add'>+	padlock_output_block(state-&gt;state, (uint32_t *)out, 8);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int padlock_init_tfm(struct crypto_shash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	const char *fallback_driver_name = crypto_shash_alg_name(hash);</div><div class='ctx'> 	struct padlock_sha_ctx *ctx = crypto_shash_ctx(hash);</div><div class='del'>-	struct crypto_shash *fallback_tfm;</div><div class='add'>+	struct crypto_ahash *fallback_tfm;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate a fallback and abort if it failed. */</div><div class='del'>-	fallback_tfm = crypto_alloc_shash(fallback_driver_name, 0,</div><div class='del'>-					  CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+	fallback_tfm = crypto_alloc_ahash(fallback_driver_name, 0,</div><div class='add'>+					  CRYPTO_ALG_NEED_FALLBACK |</div><div class='add'>+					  CRYPTO_ALG_ASYNC);</div><div class='ctx'> 	if (IS_ERR(fallback_tfm)) {</div><div class='ctx'> 		printk(KERN_WARNING PFX "Fallback driver '%s' could not be loaded!\n",</div><div class='ctx'> 		       fallback_driver_name);</div><div class='ctx'> 		return PTR_ERR(fallback_tfm);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (crypto_shash_statesize(hash) !=</div><div class='add'>+	    crypto_ahash_statesize(fallback_tfm)) {</div><div class='add'>+		crypto_free_ahash(fallback_tfm);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ctx-&gt;fallback = fallback_tfm;</div><div class='del'>-	hash-&gt;descsize += crypto_shash_descsize(fallback_tfm);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -215,26 +186,27 @@ static void padlock_exit_tfm(struct crypto_shash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	struct padlock_sha_ctx *ctx = crypto_shash_ctx(hash);</div><div class='ctx'> </div><div class='del'>-	crypto_free_shash(ctx-&gt;fallback);</div><div class='add'>+	crypto_free_ahash(ctx-&gt;fallback);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha1_alg = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='del'>-	.init   	= 	padlock_sha_init,</div><div class='add'>+	.init   	= 	padlock_sha1_init,</div><div class='ctx'> 	.update 	=	padlock_sha_update,</div><div class='ctx'> 	.finup  	=	padlock_sha1_finup,</div><div class='del'>-	.final  	=	padlock_sha1_final,</div><div class='ctx'> 	.export		=	padlock_sha_export,</div><div class='ctx'> 	.import		=	padlock_sha_import,</div><div class='ctx'> 	.init_tfm	=	padlock_init_tfm,</div><div class='ctx'> 	.exit_tfm	=	padlock_exit_tfm,</div><div class='del'>-	.descsize	=	sizeof(struct padlock_sha_desc),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='add'>+	.descsize	=	PADLOCK_SHA_DESCSIZE,</div><div class='add'>+	.statesize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name		=	"sha1",</div><div class='ctx'> 		.cra_driver_name	=	"sha1-padlock",</div><div class='ctx'> 		.cra_priority		=	PADLOCK_CRA_PRIORITY,</div><div class='del'>-		.cra_flags		=	CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+		.cra_flags		=	CRYPTO_ALG_NEED_FALLBACK |</div><div class='add'>+						CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		=	sizeof(struct padlock_sha_ctx),</div><div class='ctx'> 		.cra_module		=	THIS_MODULE,</div><div class='hunk'>@@ -243,21 +215,22 @@ static struct shash_alg sha1_alg = {</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha256_alg = {</div><div class='ctx'> 	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init   	= 	padlock_sha_init,</div><div class='add'>+	.init   	= 	padlock_sha256_init,</div><div class='ctx'> 	.update 	=	padlock_sha_update,</div><div class='ctx'> 	.finup  	=	padlock_sha256_finup,</div><div class='del'>-	.final  	=	padlock_sha256_final,</div><div class='add'>+	.init_tfm	=	padlock_init_tfm,</div><div class='ctx'> 	.export		=	padlock_sha_export,</div><div class='ctx'> 	.import		=	padlock_sha_import,</div><div class='del'>-	.init_tfm	=	padlock_init_tfm,</div><div class='ctx'> 	.exit_tfm	=	padlock_exit_tfm,</div><div class='del'>-	.descsize	=	sizeof(struct padlock_sha_desc),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='add'>+	.descsize	=	PADLOCK_SHA_DESCSIZE,</div><div class='add'>+	.statesize	=	sizeof(struct crypto_sha256_state),</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name		=	"sha256",</div><div class='ctx'> 		.cra_driver_name	=	"sha256-padlock",</div><div class='ctx'> 		.cra_priority		=	PADLOCK_CRA_PRIORITY,</div><div class='del'>-		.cra_flags		=	CRYPTO_ALG_NEED_FALLBACK,</div><div class='add'>+		.cra_flags		=	CRYPTO_ALG_NEED_FALLBACK |</div><div class='add'>+						CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		=	SHA256_BLOCK_SIZE,</div><div class='ctx'> 		.cra_ctxsize		=	sizeof(struct padlock_sha_ctx),</div><div class='ctx'> 		.cra_module		=	THIS_MODULE,</div><div class='hunk'>@@ -266,207 +239,58 @@ static struct shash_alg sha256_alg = {</div><div class='ctx'> </div><div class='ctx'> /* Add two shash_alg instance for hardware-implemented *</div><div class='ctx'> * multiple-parts hash supported by VIA Nano Processor.*/</div><div class='del'>-static int padlock_sha1_init_nano(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*sctx = (struct sha1_state){</div><div class='del'>-		.state = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 },</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static int padlock_sha1_update_nano(struct shash_desc *desc,</div><div class='del'>-			const u8 *data,	unsigned int len)</div><div class='add'>+				    const u8 *src, unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha1_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial, done;</div><div class='del'>-	const u8 *src;</div><div class='ctx'> 	/*The PHE require the out buffer must 128 bytes and 16-bytes aligned*/</div><div class='del'>-	u8 buf[128 + PADLOCK_ALIGNMENT - STACK_ALIGN] __attribute__</div><div class='del'>-		((aligned(STACK_ALIGN)));</div><div class='del'>-	u8 *dst = PTR_ALIGN(&amp;buf[0], PADLOCK_ALIGNMENT);</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-	memcpy(dst, (u8 *)(sctx-&gt;state), SHA1_DIGEST_SIZE);</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt;= SHA1_BLOCK_SIZE) {</div><div class='del'>-</div><div class='del'>-		/* Append the bytes in state's buffer to a block to handle */</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buffer + partial, data,</div><div class='del'>-				done + SHA1_BLOCK_SIZE);</div><div class='del'>-			src = sctx-&gt;buffer;</div><div class='del'>-			asm volatile (".byte 0xf3,0x0f,0xa6,0xc8"</div><div class='del'>-			: "+S"(src), "+D"(dst) \</div><div class='del'>-			: "a"((long)-1), "c"((unsigned long)1));</div><div class='del'>-			done += SHA1_BLOCK_SIZE;</div><div class='del'>-			src = data + done;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Process the left bytes from the input data */</div><div class='del'>-		if (len - done &gt;= SHA1_BLOCK_SIZE) {</div><div class='del'>-			asm volatile (".byte 0xf3,0x0f,0xa6,0xc8"</div><div class='del'>-			: "+S"(src), "+D"(dst)</div><div class='del'>-			: "a"((long)-1),</div><div class='del'>-			"c"((unsigned long)((len - done) / SHA1_BLOCK_SIZE)));</div><div class='del'>-			done += ((len - done) - (len - done) % SHA1_BLOCK_SIZE);</div><div class='del'>-			src = data + done;</div><div class='del'>-		}</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy((u8 *)(sctx-&gt;state), dst, SHA1_DIGEST_SIZE);</div><div class='del'>-	memcpy(sctx-&gt;buffer + partial, src, len - done);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int padlock_sha1_final_nano(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha1_state *state = (struct sha1_state *)shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial, padlen;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_be64(state-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 */</div><div class='del'>-	partial = state-&gt;count &amp; 0x3f;</div><div class='del'>-	padlen = (partial &lt; 56) ? (56 - partial) : ((64+56) - partial);</div><div class='del'>-	padlock_sha1_update_nano(desc, padding, padlen);</div><div class='del'>-</div><div class='del'>-	/* Append length field bytes */</div><div class='del'>-	padlock_sha1_update_nano(desc, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	/* Swap to output */</div><div class='del'>-	padlock_output_block((uint32_t *)(state-&gt;state), (uint32_t *)out, 5);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int padlock_sha256_init_nano(struct shash_desc *desc)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	*sctx = (struct sha256_state){</div><div class='del'>-		.state = { SHA256_H0, SHA256_H1, SHA256_H2, SHA256_H3, \</div><div class='del'>-				SHA256_H4, SHA256_H5, SHA256_H6, SHA256_H7},</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	struct sha1_state *state = padlock_shash_desc_ctx(desc);</div><div class='add'>+	int blocks = len / SHA1_BLOCK_SIZE;</div><div class='add'>+</div><div class='add'>+	len -= blocks * SHA1_BLOCK_SIZE;</div><div class='add'>+	state-&gt;count += blocks * SHA1_BLOCK_SIZE;</div><div class='add'>+</div><div class='add'>+	/* Process the left bytes from the input data */</div><div class='add'>+	asm volatile (".byte 0xf3,0x0f,0xa6,0xc8"</div><div class='add'>+		      : "+S"(src), "+D"(state)</div><div class='add'>+		      : "a"((long)-1),</div><div class='add'>+			"c"((unsigned long)blocks));</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int padlock_sha256_update_nano(struct shash_desc *desc, const u8 *data,</div><div class='add'>+static int padlock_sha256_update_nano(struct shash_desc *desc, const u8 *src,</div><div class='ctx'> 			  unsigned int len)</div><div class='ctx'> {</div><div class='del'>-	struct sha256_state *sctx = shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial, done;</div><div class='del'>-	const u8 *src;</div><div class='ctx'> 	/*The PHE require the out buffer must 128 bytes and 16-bytes aligned*/</div><div class='del'>-	u8 buf[128 + PADLOCK_ALIGNMENT - STACK_ALIGN] __attribute__</div><div class='del'>-		((aligned(STACK_ALIGN)));</div><div class='del'>-	u8 *dst = PTR_ALIGN(&amp;buf[0], PADLOCK_ALIGNMENT);</div><div class='del'>-</div><div class='del'>-	partial = sctx-&gt;count &amp; 0x3f;</div><div class='del'>-	sctx-&gt;count += len;</div><div class='del'>-	done = 0;</div><div class='del'>-	src = data;</div><div class='del'>-	memcpy(dst, (u8 *)(sctx-&gt;state), SHA256_DIGEST_SIZE);</div><div class='del'>-</div><div class='del'>-	if ((partial + len) &gt;= SHA256_BLOCK_SIZE) {</div><div class='del'>-</div><div class='del'>-		/* Append the bytes in state's buffer to a block to handle */</div><div class='del'>-		if (partial) {</div><div class='del'>-			done = -partial;</div><div class='del'>-			memcpy(sctx-&gt;buf + partial, data,</div><div class='del'>-				done + SHA256_BLOCK_SIZE);</div><div class='del'>-			src = sctx-&gt;buf;</div><div class='del'>-			asm volatile (".byte 0xf3,0x0f,0xa6,0xd0"</div><div class='del'>-			: "+S"(src), "+D"(dst)</div><div class='del'>-			: "a"((long)-1), "c"((unsigned long)1));</div><div class='del'>-			done += SHA256_BLOCK_SIZE;</div><div class='del'>-			src = data + done;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Process the left bytes from input data*/</div><div class='del'>-		if (len - done &gt;= SHA256_BLOCK_SIZE) {</div><div class='del'>-			asm volatile (".byte 0xf3,0x0f,0xa6,0xd0"</div><div class='del'>-			: "+S"(src), "+D"(dst)</div><div class='del'>-			: "a"((long)-1),</div><div class='del'>-			"c"((unsigned long)((len - done) / 64)));</div><div class='del'>-			done += ((len - done) - (len - done) % 64);</div><div class='del'>-			src = data + done;</div><div class='del'>-		}</div><div class='del'>-		partial = 0;</div><div class='del'>-	}</div><div class='del'>-	memcpy((u8 *)(sctx-&gt;state), dst, SHA256_DIGEST_SIZE);</div><div class='del'>-	memcpy(sctx-&gt;buf + partial, src, len - done);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int padlock_sha256_final_nano(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct sha256_state *state =</div><div class='del'>-		(struct sha256_state *)shash_desc_ctx(desc);</div><div class='del'>-	unsigned int partial, padlen;</div><div class='del'>-	__be64 bits;</div><div class='del'>-	static const u8 padding[64] = { 0x80, };</div><div class='del'>-</div><div class='del'>-	bits = cpu_to_be64(state-&gt;count &lt;&lt; 3);</div><div class='del'>-</div><div class='del'>-	/* Pad out to 56 mod 64 */</div><div class='del'>-	partial = state-&gt;count &amp; 0x3f;</div><div class='del'>-	padlen = (partial &lt; 56) ? (56 - partial) : ((64+56) - partial);</div><div class='del'>-	padlock_sha256_update_nano(desc, padding, padlen);</div><div class='del'>-</div><div class='del'>-	/* Append length field bytes */</div><div class='del'>-	padlock_sha256_update_nano(desc, (const u8 *)&amp;bits, sizeof(bits));</div><div class='del'>-</div><div class='del'>-	/* Swap to output */</div><div class='del'>-	padlock_output_block((uint32_t *)(state-&gt;state), (uint32_t *)out, 8);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int padlock_sha_export_nano(struct shash_desc *desc,</div><div class='del'>-				void *out)</div><div class='del'>-{</div><div class='del'>-	int statesize = crypto_shash_statesize(desc-&gt;tfm);</div><div class='del'>-	void *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(out, sctx, statesize);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int padlock_sha_import_nano(struct shash_desc *desc,</div><div class='del'>-				const void *in)</div><div class='del'>-{</div><div class='del'>-	int statesize = crypto_shash_statesize(desc-&gt;tfm);</div><div class='del'>-	void *sctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	memcpy(sctx, in, statesize);</div><div class='del'>-	return 0;</div><div class='add'>+	struct crypto_sha256_state *state = padlock_shash_desc_ctx(desc);</div><div class='add'>+	int blocks = len / SHA256_BLOCK_SIZE;</div><div class='add'>+</div><div class='add'>+	len -= blocks * SHA256_BLOCK_SIZE;</div><div class='add'>+	state-&gt;count += blocks * SHA256_BLOCK_SIZE;</div><div class='add'>+</div><div class='add'>+	/* Process the left bytes from input data*/</div><div class='add'>+	asm volatile (".byte 0xf3,0x0f,0xa6,0xd0"</div><div class='add'>+		      : "+S"(src), "+D"(state)</div><div class='add'>+		      : "a"((long)-1),</div><div class='add'>+		      "c"((unsigned long)blocks));</div><div class='add'>+	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha1_alg_nano = {</div><div class='ctx'> 	.digestsize	=	SHA1_DIGEST_SIZE,</div><div class='del'>-	.init		=	padlock_sha1_init_nano,</div><div class='add'>+	.init		=	padlock_sha1_init,</div><div class='ctx'> 	.update		=	padlock_sha1_update_nano,</div><div class='del'>-	.final		=	padlock_sha1_final_nano,</div><div class='del'>-	.export		=	padlock_sha_export_nano,</div><div class='del'>-	.import		=	padlock_sha_import_nano,</div><div class='del'>-	.descsize	=	sizeof(struct sha1_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha1_state),</div><div class='add'>+	.finup  	=	padlock_sha1_finup,</div><div class='add'>+	.export		=	padlock_sha_export,</div><div class='add'>+	.import		=	padlock_sha_import,</div><div class='add'>+	.descsize	=	PADLOCK_SHA_DESCSIZE,</div><div class='add'>+	.statesize	=	SHA1_STATE_SIZE,</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name		=	"sha1",</div><div class='ctx'> 		.cra_driver_name	=	"sha1-padlock-nano",</div><div class='ctx'> 		.cra_priority		=	PADLOCK_CRA_PRIORITY,</div><div class='add'>+		.cra_flags		=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		=	SHA1_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='hunk'>@@ -474,17 +298,19 @@ static struct shash_alg sha1_alg_nano = {</div><div class='ctx'> </div><div class='ctx'> static struct shash_alg sha256_alg_nano = {</div><div class='ctx'> 	.digestsize	=	SHA256_DIGEST_SIZE,</div><div class='del'>-	.init		=	padlock_sha256_init_nano,</div><div class='add'>+	.init		=	padlock_sha256_init,</div><div class='ctx'> 	.update		=	padlock_sha256_update_nano,</div><div class='del'>-	.final		=	padlock_sha256_final_nano,</div><div class='del'>-	.export		=	padlock_sha_export_nano,</div><div class='del'>-	.import		=	padlock_sha_import_nano,</div><div class='del'>-	.descsize	=	sizeof(struct sha256_state),</div><div class='del'>-	.statesize	=	sizeof(struct sha256_state),</div><div class='add'>+	.finup		=	padlock_sha256_finup,</div><div class='add'>+	.export		=	padlock_sha_export,</div><div class='add'>+	.import		=	padlock_sha_import,</div><div class='add'>+	.descsize	=	PADLOCK_SHA_DESCSIZE,</div><div class='add'>+	.statesize	=	sizeof(struct crypto_sha256_state),</div><div class='ctx'> 	.base		=	{</div><div class='ctx'> 		.cra_name		=	"sha256",</div><div class='ctx'> 		.cra_driver_name	=	"sha256-padlock-nano",</div><div class='ctx'> 		.cra_priority		=	PADLOCK_CRA_PRIORITY,</div><div class='add'>+		.cra_flags		=	CRYPTO_AHASH_ALG_BLOCK_ONLY |</div><div class='add'>+						CRYPTO_AHASH_ALG_FINUP_MAX,</div><div class='ctx'> 		.cra_blocksize		=	SHA256_BLOCK_SIZE,</div><div class='ctx'> 		.cra_module		=	THIS_MODULE,</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/crypto/rockchip/rk3288_crypto_ahash.c b/drivers/crypto/rockchip/rk3288_crypto_ahash.c<br/>index 69d6019d8abc..d6928ebe9526 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/rockchip/rk3288_crypto_ahash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/rockchip/rk3288_crypto_ahash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/rockchip/rk3288_crypto_ahash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/rockchip/rk3288_crypto_ahash.c</a></div><div class='hunk'>@@ -52,12 +52,11 @@ static int rk_ahash_digest_fb(struct ahash_request *areq)</div><div class='ctx'> 	algt-&gt;stat_fb++;</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, tfmctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = areq-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = areq-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = areq-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = areq-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   areq-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   areq-&gt;base.complete, areq-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, areq-&gt;src, areq-&gt;result,</div><div class='add'>+				areq-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_digest(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -124,8 +123,9 @@ static int rk_ahash_init(struct ahash_request *req)</div><div class='ctx'> 	struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_init(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -137,10 +137,10 @@ static int rk_ahash_update(struct ahash_request *req)</div><div class='ctx'> 	struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, NULL, req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_update(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -152,9 +152,10 @@ static int rk_ahash_final(struct ahash_request *req)</div><div class='ctx'> 	struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, NULL, req-&gt;result, 0);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_final(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -166,12 +167,11 @@ static int rk_ahash_finup(struct ahash_request *req)</div><div class='ctx'> 	struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, req-&gt;result,</div><div class='add'>+				req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_finup(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -183,8 +183,9 @@ static int rk_ahash_import(struct ahash_request *req, const void *in)</div><div class='ctx'> 	struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_import(&amp;rctx-&gt;fallback_req, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -196,8 +197,9 @@ static int rk_ahash_export(struct ahash_request *req, void *out)</div><div class='ctx'> 	struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_export(&amp;rctx-&gt;fallback_req, out);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c<br/>index b4c3c14dafd5..b829c84f60f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/s5p-sss.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/s5p-sss.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/s5p-sss.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/s5p-sss.c</a></div><div class='hunk'>@@ -9,11 +9,17 @@</div><div class='ctx'> //</div><div class='ctx'> // Hash part based on omap-sham.c driver.</div><div class='ctx'> </div><div class='add'>+#include &lt;crypto/aes.h&gt;</div><div class='add'>+#include &lt;crypto/ctr.h&gt;</div><div class='add'>+#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;crypto/internal/skcipher.h&gt;</div><div class='add'>+#include &lt;crypto/md5.h&gt;</div><div class='add'>+#include &lt;crypto/scatterwalk.h&gt;</div><div class='add'>+#include &lt;crypto/sha1.h&gt;</div><div class='add'>+#include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='hunk'>@@ -22,17 +28,9 @@</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/scatterlist.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/ctr.h&gt;</div><div class='del'>-#include &lt;crypto/aes.h&gt;</div><div class='del'>-#include &lt;crypto/algapi.h&gt;</div><div class='del'>-#include &lt;crypto/scatterwalk.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;crypto/hash.h&gt;</div><div class='del'>-#include &lt;crypto/md5.h&gt;</div><div class='del'>-#include &lt;crypto/sha1.h&gt;</div><div class='del'>-#include &lt;crypto/sha2.h&gt;</div><div class='del'>-#include &lt;crypto/internal/hash.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define _SBF(s, v)			((v) &lt;&lt; (s))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/crypto/sa2ul.c b/drivers/crypto/sa2ul.c<br/>index 091612b066f1..fdc0b2486069 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/sa2ul.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/sa2ul.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/sa2ul.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/sa2ul.c</a></div><div class='hunk'>@@ -1415,22 +1415,13 @@ static int sa_sha_run(struct ahash_request *req)</div><div class='ctx'> 	    (auth_len &gt;= SA_UNSAFE_DATA_SZ_MIN &amp;&amp;</div><div class='ctx'> 	     auth_len &lt;= SA_UNSAFE_DATA_SZ_MAX)) {</div><div class='ctx'> 		struct ahash_request *subreq = &amp;rctx-&gt;fallback_req;</div><div class='del'>-		int ret = 0;</div><div class='add'>+		int ret;</div><div class='ctx'> </div><div class='ctx'> 		ahash_request_set_tfm(subreq, ctx-&gt;fallback.ahash);</div><div class='del'>-		subreq-&gt;base.flags = req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-		crypto_ahash_init(subreq);</div><div class='del'>-</div><div class='del'>-		subreq-&gt;nbytes = auth_len;</div><div class='del'>-		subreq-&gt;src = req-&gt;src;</div><div class='del'>-		subreq-&gt;result = req-&gt;result;</div><div class='del'>-</div><div class='del'>-		ret |= crypto_ahash_update(subreq);</div><div class='del'>-</div><div class='del'>-		subreq-&gt;nbytes = 0;</div><div class='add'>+		ahash_request_set_callback(subreq, req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);</div><div class='add'>+		ahash_request_set_crypt(subreq, req-&gt;src, req-&gt;result, auth_len);</div><div class='ctx'> </div><div class='del'>-		ret |= crypto_ahash_final(subreq);</div><div class='add'>+		ret = crypto_ahash_digest(subreq);</div><div class='ctx'> </div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1502,8 +1493,7 @@ static int sa_sha_cra_init_alg(struct crypto_tfm *tfm, const char *alg_base)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (alg_base) {</div><div class='del'>-		ctx-&gt;shash = crypto_alloc_shash(alg_base, 0,</div><div class='del'>-						CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+		ctx-&gt;shash = crypto_alloc_shash(alg_base, 0, 0);</div><div class='ctx'> 		if (IS_ERR(ctx-&gt;shash)) {</div><div class='ctx'> 			dev_err(sa_k3_dev, "base driver %s couldn't be loaded\n",</div><div class='ctx'> 				alg_base);</div><div class='hunk'>@@ -1511,8 +1501,7 @@ static int sa_sha_cra_init_alg(struct crypto_tfm *tfm, const char *alg_base)</div><div class='ctx'> 		}</div><div class='ctx'> 		/* for fallback */</div><div class='ctx'> 		ctx-&gt;fallback.ahash =</div><div class='del'>-			crypto_alloc_ahash(alg_base, 0,</div><div class='del'>-					   CRYPTO_ALG_NEED_FALLBACK);</div><div class='add'>+			crypto_alloc_ahash(alg_base, 0, CRYPTO_ALG_ASYNC);</div><div class='ctx'> 		if (IS_ERR(ctx-&gt;fallback.ahash)) {</div><div class='ctx'> 			dev_err(ctx-&gt;dev_data-&gt;dev,</div><div class='ctx'> 				"Could not load fallback driver\n");</div><div class='hunk'>@@ -1546,54 +1535,38 @@ static int sa_sha_init(struct ahash_request *req)</div><div class='ctx'> 		crypto_ahash_digestsize(tfm), rctx);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback.ahash);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags =</div><div class='del'>-		req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req, req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, NULL, NULL, 0);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_init(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sa_sha_update(struct ahash_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='ctx'> 	struct sa_sha_req_ctx *rctx = ahash_request_ctx(req);</div><div class='del'>-	struct sa_tfm_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback.ahash);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags =</div><div class='del'>-		req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req, req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, NULL, req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_update(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sa_sha_final(struct ahash_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='ctx'> 	struct sa_sha_req_ctx *rctx = ahash_request_ctx(req);</div><div class='del'>-	struct sa_tfm_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback.ahash);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags =</div><div class='del'>-		req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req, req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, NULL, req-&gt;result, 0);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_final(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sa_sha_finup(struct ahash_request *req)</div><div class='ctx'> {</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='ctx'> 	struct sa_sha_req_ctx *rctx = ahash_request_ctx(req);</div><div class='del'>-	struct sa_tfm_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback.ahash);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags =</div><div class='del'>-		req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req, req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, req-&gt;result, req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_finup(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -1605,8 +1578,7 @@ static int sa_sha_import(struct ahash_request *req, const void *in)</div><div class='ctx'> 	struct sa_tfm_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback.ahash);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-		CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req, req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_import(&amp;rctx-&gt;fallback_req, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -1614,12 +1586,9 @@ static int sa_sha_import(struct ahash_request *req, const void *in)</div><div class='ctx'> static int sa_sha_export(struct ahash_request *req, void *out)</div><div class='ctx'> {</div><div class='ctx'> 	struct sa_sha_req_ctx *rctx = ahash_request_ctx(req);</div><div class='del'>-	struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);</div><div class='del'>-	struct sa_tfm_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> 	struct ahash_request *subreq = &amp;rctx-&gt;fallback_req;</div><div class='ctx'> </div><div class='del'>-	ahash_request_set_tfm(subreq, ctx-&gt;fallback.ahash);</div><div class='del'>-	subreq-&gt;base.flags = req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(subreq, req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP, NULL, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_export(subreq, out);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/crypto/tegra/tegra-se-aes.c b/drivers/crypto/tegra/tegra-se-aes.c<br/>index ca9d0cca1f74..0e07d0523291 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-aes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/tegra/tegra-se-aes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-aes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/tegra/tegra-se-aes.c</a></div><div class='hunk'>@@ -269,7 +269,7 @@ static int tegra_aes_do_one_req(struct crypto_engine *engine, void *areq)</div><div class='ctx'> 	unsigned int cmdlen, key1_id, key2_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	rctx-&gt;iv = (u32 *)req-&gt;iv;</div><div class='add'>+	rctx-&gt;iv = (ctx-&gt;alg == SE_ALG_ECB) ? NULL : (u32 *)req-&gt;iv;</div><div class='ctx'> 	rctx-&gt;len = req-&gt;cryptlen;</div><div class='ctx'> 	key1_id = ctx-&gt;key1_id;</div><div class='ctx'> 	key2_id = ctx-&gt;key2_id;</div><div class='hunk'>@@ -498,9 +498,6 @@ static int tegra_aes_crypt(struct skcipher_request *req, bool encrypt)</div><div class='ctx'> 	if (!req-&gt;cryptlen)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;alg == SE_ALG_ECB)</div><div class='del'>-		req-&gt;iv = NULL;</div><div class='del'>-</div><div class='ctx'> 	rctx-&gt;encrypt = encrypt;</div><div class='ctx'> </div><div class='ctx'> 	return crypto_transfer_skcipher_request_to_engine(ctx-&gt;se-&gt;engine, req);</div><div class='head'>diff --git a/drivers/crypto/tegra/tegra-se-hash.c b/drivers/crypto/tegra/tegra-se-hash.c<br/>index 42d007b7af45..d09b4aaeecef 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-hash.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/tegra/tegra-se-hash.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/tegra/tegra-se-hash.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/tegra/tegra-se-hash.c</a></div><div class='hunk'>@@ -117,8 +117,9 @@ static int tegra_sha_fallback_init(struct ahash_request *req)</div><div class='ctx'> 	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_init(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -130,10 +131,10 @@ static int tegra_sha_fallback_update(struct ahash_request *req)</div><div class='ctx'> 	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, NULL, req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_update(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -145,9 +146,10 @@ static int tegra_sha_fallback_final(struct ahash_request *req)</div><div class='ctx'> 	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, NULL, req-&gt;result, 0);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_final(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -159,12 +161,11 @@ static int tegra_sha_fallback_finup(struct ahash_request *req)</div><div class='ctx'> 	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, req-&gt;result,</div><div class='add'>+				req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_finup(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -176,12 +177,11 @@ static int tegra_sha_fallback_digest(struct ahash_request *req)</div><div class='ctx'> 	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='del'>-</div><div class='del'>-	rctx-&gt;fallback_req.nbytes = req-&gt;nbytes;</div><div class='del'>-	rctx-&gt;fallback_req.src = req-&gt;src;</div><div class='del'>-	rctx-&gt;fallback_req.result = req-&gt;result;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='add'>+	ahash_request_set_crypt(&amp;rctx-&gt;fallback_req, req-&gt;src, req-&gt;result,</div><div class='add'>+				req-&gt;nbytes);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_digest(&amp;rctx-&gt;fallback_req);</div><div class='ctx'> }</div><div class='hunk'>@@ -193,8 +193,9 @@ static int tegra_sha_fallback_import(struct ahash_request *req, const void *in)</div><div class='ctx'> 	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_import(&amp;rctx-&gt;fallback_req, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -206,8 +207,9 @@ static int tegra_sha_fallback_export(struct ahash_request *req, void *out)</div><div class='ctx'> 	struct tegra_sha_ctx *ctx = crypto_ahash_ctx(tfm);</div><div class='ctx'> </div><div class='ctx'> 	ahash_request_set_tfm(&amp;rctx-&gt;fallback_req, ctx-&gt;fallback_tfm);</div><div class='del'>-	rctx-&gt;fallback_req.base.flags = req-&gt;base.flags &amp;</div><div class='del'>-					CRYPTO_TFM_REQ_MAY_SLEEP;</div><div class='add'>+	ahash_request_set_callback(&amp;rctx-&gt;fallback_req,</div><div class='add'>+				   req-&gt;base.flags &amp; CRYPTO_TFM_REQ_MAY_SLEEP,</div><div class='add'>+				   req-&gt;base.complete, req-&gt;base.data);</div><div class='ctx'> </div><div class='ctx'> 	return crypto_ahash_export(&amp;rctx-&gt;fallback_req, out);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/crypto/xilinx/zynqmp-sha.c b/drivers/crypto/xilinx/zynqmp-sha.c<br/>index 580649f9bff8..5813017b6b79 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/crypto/xilinx/zynqmp-sha.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/crypto/xilinx/zynqmp-sha.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/crypto/xilinx/zynqmp-sha.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/crypto/xilinx/zynqmp-sha.c</a></div><div class='hunk'>@@ -3,18 +3,18 @@</div><div class='ctx'>  * Xilinx ZynqMP SHA Driver.</div><div class='ctx'>  * Copyright (c) 2022 Xilinx Inc.</div><div class='ctx'>  */</div><div class='del'>-#include &lt;linux/cacheflush.h&gt;</div><div class='del'>-#include &lt;crypto/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/internal/hash.h&gt;</div><div class='ctx'> #include &lt;crypto/sha3.h&gt;</div><div class='del'>-#include &lt;linux/crypto.h&gt;</div><div class='add'>+#include &lt;linux/cacheflush.h&gt;</div><div class='add'>+#include &lt;linux/cleanup.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/firmware/xlnx-zynqmp.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ZYNQMP_DMA_BIT_MASK		32U</div><div class='hunk'>@@ -36,13 +36,11 @@ struct zynqmp_sha_tfm_ctx {</div><div class='ctx'> 	struct crypto_shash *fbk_tfm;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct zynqmp_sha_desc_ctx {</div><div class='del'>-	struct shash_desc fbk_req;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static dma_addr_t update_dma_addr, final_dma_addr;</div><div class='ctx'> static char *ubuf, *fbuf;</div><div class='ctx'> </div><div class='add'>+static DEFINE_SPINLOCK(zynqmp_sha_lock);</div><div class='add'>+</div><div class='ctx'> static int zynqmp_sha_init_tfm(struct crypto_shash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	const char *fallback_driver_name = crypto_shash_alg_name(hash);</div><div class='hunk'>@@ -60,8 +58,13 @@ static int zynqmp_sha_init_tfm(struct crypto_shash *hash)</div><div class='ctx'> 	if (IS_ERR(fallback_tfm))</div><div class='ctx'> 		return PTR_ERR(fallback_tfm);</div><div class='ctx'> </div><div class='add'>+	if (crypto_shash_descsize(hash) &lt;</div><div class='add'>+	    crypto_shash_statesize(tfm_ctx-&gt;fbk_tfm)) {</div><div class='add'>+		crypto_free_shash(fallback_tfm);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	tfm_ctx-&gt;fbk_tfm = fallback_tfm;</div><div class='del'>-	hash-&gt;descsize += crypto_shash_descsize(tfm_ctx-&gt;fbk_tfm);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -70,61 +73,55 @@ static void zynqmp_sha_exit_tfm(struct crypto_shash *hash)</div><div class='ctx'> {</div><div class='ctx'> 	struct zynqmp_sha_tfm_ctx *tfm_ctx = crypto_shash_ctx(hash);</div><div class='ctx'> </div><div class='del'>-	if (tfm_ctx-&gt;fbk_tfm) {</div><div class='del'>-		crypto_free_shash(tfm_ctx-&gt;fbk_tfm);</div><div class='del'>-		tfm_ctx-&gt;fbk_tfm = NULL;</div><div class='del'>-	}</div><div class='add'>+	crypto_free_shash(tfm_ctx-&gt;fbk_tfm);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	memzero_explicit(tfm_ctx, sizeof(struct zynqmp_sha_tfm_ctx));</div><div class='add'>+static int zynqmp_sha_continue(struct shash_desc *desc,</div><div class='add'>+			       struct shash_desc *fbdesc, int err)</div><div class='add'>+{</div><div class='add'>+	err = err ?: crypto_shash_export(fbdesc, shash_desc_ctx(desc));</div><div class='add'>+	shash_desc_zero(fbdesc);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int zynqmp_sha_init(struct shash_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	struct zynqmp_sha_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct crypto_shash *fbtfm = tctx-&gt;fbk_tfm;</div><div class='add'>+	SHASH_DESC_ON_STACK(fbdesc, fbtfm);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	dctx-&gt;fbk_req.tfm = tctx-&gt;fbk_tfm;</div><div class='del'>-	return crypto_shash_init(&amp;dctx-&gt;fbk_req);</div><div class='add'>+	fbdesc-&gt;tfm = fbtfm;</div><div class='add'>+	err = crypto_shash_init(fbdesc);</div><div class='add'>+	return zynqmp_sha_continue(desc, fbdesc, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int zynqmp_sha_update(struct shash_desc *desc, const u8 *data, unsigned int length)</div><div class='ctx'> {</div><div class='del'>-	struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_update(&amp;dctx-&gt;fbk_req, data, length);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int zynqmp_sha_final(struct shash_desc *desc, u8 *out)</div><div class='del'>-{</div><div class='del'>-	struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='add'>+	struct zynqmp_sha_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct crypto_shash *fbtfm = tctx-&gt;fbk_tfm;</div><div class='add'>+	SHASH_DESC_ON_STACK(fbdesc, fbtfm);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	return crypto_shash_final(&amp;dctx-&gt;fbk_req, out);</div><div class='add'>+	fbdesc-&gt;tfm = fbtfm;</div><div class='add'>+	err = crypto_shash_import(fbdesc, shash_desc_ctx(desc)) ?:</div><div class='add'>+	      crypto_shash_update(fbdesc, data, length);</div><div class='add'>+	return zynqmp_sha_continue(desc, fbdesc, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int zynqmp_sha_finup(struct shash_desc *desc, const u8 *data, unsigned int length, u8 *out)</div><div class='ctx'> {</div><div class='del'>-	struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_finup(&amp;dctx-&gt;fbk_req, data, length, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int zynqmp_sha_import(struct shash_desc *desc, const void *in)</div><div class='del'>-{</div><div class='del'>-	struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='ctx'> 	struct zynqmp_sha_tfm_ctx *tctx = crypto_shash_ctx(desc-&gt;tfm);</div><div class='add'>+	struct crypto_shash *fbtfm = tctx-&gt;fbk_tfm;</div><div class='add'>+	SHASH_DESC_ON_STACK(fbdesc, fbtfm);</div><div class='ctx'> </div><div class='del'>-	dctx-&gt;fbk_req.tfm = tctx-&gt;fbk_tfm;</div><div class='del'>-	return crypto_shash_import(&amp;dctx-&gt;fbk_req, in);</div><div class='add'>+	fbdesc-&gt;tfm = fbtfm;</div><div class='add'>+	return crypto_shash_import(fbdesc, shash_desc_ctx(desc)) ?:</div><div class='add'>+	       crypto_shash_finup(fbdesc, data, length, out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int zynqmp_sha_export(struct shash_desc *desc, void *out)</div><div class='del'>-{</div><div class='del'>-	struct zynqmp_sha_desc_ctx *dctx = shash_desc_ctx(desc);</div><div class='del'>-</div><div class='del'>-	return crypto_shash_export(&amp;dctx-&gt;fbk_req, out);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int zynqmp_sha_digest(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out)</div><div class='add'>+static int __zynqmp_sha_digest(struct shash_desc *desc, const u8 *data,</div><div class='add'>+			       unsigned int len, u8 *out)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int remaining_len = len;</div><div class='ctx'> 	int update_size;</div><div class='hunk'>@@ -159,26 +156,27 @@ static int zynqmp_sha_digest(struct shash_desc *desc, const u8 *data, unsigned i</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int zynqmp_sha_digest(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out)</div><div class='add'>+{</div><div class='add'>+	scoped_guard(spinlock_bh, &amp;zynqmp_sha_lock)</div><div class='add'>+		return __zynqmp_sha_digest(desc, data, len, out);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct zynqmp_sha_drv_ctx sha3_drv_ctx = {</div><div class='ctx'> 	.sha3_384 = {</div><div class='ctx'> 		.init = zynqmp_sha_init,</div><div class='ctx'> 		.update = zynqmp_sha_update,</div><div class='del'>-		.final = zynqmp_sha_final,</div><div class='ctx'> 		.finup = zynqmp_sha_finup,</div><div class='ctx'> 		.digest = zynqmp_sha_digest,</div><div class='del'>-		.export = zynqmp_sha_export,</div><div class='del'>-		.import = zynqmp_sha_import,</div><div class='ctx'> 		.init_tfm = zynqmp_sha_init_tfm,</div><div class='ctx'> 		.exit_tfm = zynqmp_sha_exit_tfm,</div><div class='del'>-		.descsize = sizeof(struct zynqmp_sha_desc_ctx),</div><div class='del'>-		.statesize = sizeof(struct sha3_state),</div><div class='add'>+		.descsize = SHA3_384_EXPORT_SIZE,</div><div class='ctx'> 		.digestsize = SHA3_384_DIGEST_SIZE,</div><div class='ctx'> 		.base = {</div><div class='ctx'> 			.cra_name = "sha3-384",</div><div class='ctx'> 			.cra_driver_name = "zynqmp-sha3-384",</div><div class='ctx'> 			.cra_priority = 300,</div><div class='ctx'> 			.cra_flags = CRYPTO_ALG_KERN_DRIVER_ONLY |</div><div class='del'>-				     CRYPTO_ALG_ALLOCATES_MEMORY |</div><div class='ctx'> 				     CRYPTO_ALG_NEED_FALLBACK,</div><div class='ctx'> 			.cra_blocksize = SHA3_384_BLOCK_SIZE,</div><div class='ctx'> 			.cra_ctxsize = sizeof(struct zynqmp_sha_tfm_ctx),</div><div class='head'>diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h<br/>index 15699299dc11..17b692eb3257 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/core/core.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/core.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/core/core.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/core/core.h</a></div><div class='hunk'>@@ -119,7 +119,7 @@ int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port,</div><div class='ctx'> </div><div class='ctx'> int cxl_ras_init(void);</div><div class='ctx'> void cxl_ras_exit(void);</div><div class='del'>-int cxl_gpf_port_setup(struct device *dport_dev, struct cxl_port *port);</div><div class='add'>+int cxl_gpf_port_setup(struct cxl_dport *dport);</div><div class='ctx'> int cxl_acpi_get_extended_linear_cache_size(struct resource *backing_res,</div><div class='ctx'> 					    int nid, resource_size_t *size);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cxl/core/features.c b/drivers/cxl/core/features.c<br/>index f4daefe3180e..1498e2369c37 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/core/features.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/features.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/core/features.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/core/features.c</a></div><div class='hunk'>@@ -528,13 +528,13 @@ static void *cxlctl_set_feature(struct cxl_features_state *cxlfs,</div><div class='ctx'> 	rc = cxl_set_feature(cxl_mbox, &amp;feat_in-&gt;uuid,</div><div class='ctx'> 			     feat_in-&gt;version, feat_in-&gt;feat_data,</div><div class='ctx'> 			     data_size, flags, offset, &amp;return_code);</div><div class='add'>+	*out_len = sizeof(*rpc_out);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		rpc_out-&gt;retval = return_code;</div><div class='ctx'> 		return no_free_ptr(rpc_out);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rpc_out-&gt;retval = CXL_MBOX_CMD_RC_SUCCESS;</div><div class='del'>-	*out_len = sizeof(*rpc_out);</div><div class='ctx'> </div><div class='ctx'> 	return no_free_ptr(rpc_out);</div><div class='ctx'> }</div><div class='hunk'>@@ -677,7 +677,7 @@ static void free_memdev_fwctl(void *_fwctl_dev)</div><div class='ctx'> 	fwctl_put(fwctl_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int devm_cxl_setup_fwctl(struct cxl_memdev *cxlmd)</div><div class='add'>+int devm_cxl_setup_fwctl(struct device *host, struct cxl_memdev *cxlmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct cxl_dev_state *cxlds = cxlmd-&gt;cxlds;</div><div class='ctx'> 	struct cxl_features_state *cxlfs;</div><div class='hunk'>@@ -700,7 +700,7 @@ int devm_cxl_setup_fwctl(struct cxl_memdev *cxlmd)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	return devm_add_action_or_reset(&amp;cxlmd-&gt;dev, free_memdev_fwctl,</div><div class='add'>+	return devm_add_action_or_reset(host, free_memdev_fwctl,</div><div class='ctx'> 					no_free_ptr(fwctl_dev));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(devm_cxl_setup_fwctl, "CXL");</div><div class='head'>diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c<br/>index 96fecb799cbc..3b80e9a76ba8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/core/pci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/core/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/core/pci.c</a></div><div class='hunk'>@@ -1072,14 +1072,20 @@ int cxl_pci_get_bandwidth(struct pci_dev *pdev, struct access_coordinate *c)</div><div class='ctx'> #define GPF_TIMEOUT_BASE_MAX 2</div><div class='ctx'> #define GPF_TIMEOUT_SCALE_MAX 7 /* 10 seconds */</div><div class='ctx'> </div><div class='del'>-u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port)</div><div class='add'>+u16 cxl_gpf_get_dvsec(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	bool is_port = true;</div><div class='ctx'> 	u16 dvsec;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev_is_pci(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	dvsec = pci_find_dvsec_capability(to_pci_dev(dev), PCI_VENDOR_ID_CXL,</div><div class='add'>+	pdev = to_pci_dev(dev);</div><div class='add'>+	if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ENDPOINT)</div><div class='add'>+		is_port = false;</div><div class='add'>+</div><div class='add'>+	dvsec = pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_CXL,</div><div class='ctx'> 			is_port ? CXL_DVSEC_PORT_GPF : CXL_DVSEC_DEVICE_GPF);</div><div class='ctx'> 	if (!dvsec)</div><div class='ctx'> 		dev_warn(dev, "%s GPF DVSEC not present\n",</div><div class='hunk'>@@ -1128,26 +1134,24 @@ static int update_gpf_port_dvsec(struct pci_dev *pdev, int dvsec, int phase)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int cxl_gpf_port_setup(struct device *dport_dev, struct cxl_port *port)</div><div class='add'>+int cxl_gpf_port_setup(struct cxl_dport *dport)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *pdev;</div><div class='del'>-</div><div class='del'>-	if (!port)</div><div class='add'>+	if (!dport)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!port-&gt;gpf_dvsec) {</div><div class='add'>+	if (!dport-&gt;gpf_dvsec) {</div><div class='add'>+		struct pci_dev *pdev;</div><div class='ctx'> 		int dvsec;</div><div class='ctx'> </div><div class='del'>-		dvsec = cxl_gpf_get_dvsec(dport_dev, true);</div><div class='add'>+		dvsec = cxl_gpf_get_dvsec(dport-&gt;dport_dev);</div><div class='ctx'> 		if (!dvsec)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		port-&gt;gpf_dvsec = dvsec;</div><div class='add'>+		dport-&gt;gpf_dvsec = dvsec;</div><div class='add'>+		pdev = to_pci_dev(dport-&gt;dport_dev);</div><div class='add'>+		update_gpf_port_dvsec(pdev, dport-&gt;gpf_dvsec, 1);</div><div class='add'>+		update_gpf_port_dvsec(pdev, dport-&gt;gpf_dvsec, 2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pdev = to_pci_dev(dport_dev);</div><div class='del'>-	update_gpf_port_dvsec(pdev, port-&gt;gpf_dvsec, 1);</div><div class='del'>-	update_gpf_port_dvsec(pdev, port-&gt;gpf_dvsec, 2);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c<br/>index 0fd6646c1a2e..726bd4a7de27 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/core/port.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/port.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/core/port.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/core/port.c</a></div><div class='hunk'>@@ -1678,7 +1678,7 @@ retry:</div><div class='ctx'> 			if (rc &amp;&amp; rc != -EBUSY)</div><div class='ctx'> 				return rc;</div><div class='ctx'> </div><div class='del'>-			cxl_gpf_port_setup(dport_dev, port);</div><div class='add'>+			cxl_gpf_port_setup(dport);</div><div class='ctx'> </div><div class='ctx'> 			/* Any more ports to add between this one and the root? */</div><div class='ctx'> 			if (!dev_is_cxl_root_child(&amp;port-&gt;dev))</div><div class='head'>diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c<br/>index 117c2e94c761..5ca7b0eed568 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/core/regs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/core/regs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/core/regs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/core/regs.c</a></div><div class='hunk'>@@ -581,7 +581,6 @@ resource_size_t __rcrb_to_component(struct device *dev, struct cxl_rcrb_info *ri</div><div class='ctx'> 	resource_size_t rcrb = ri-&gt;base;</div><div class='ctx'> 	void __iomem *addr;</div><div class='ctx'> 	u32 bar0, bar1;</div><div class='del'>-	u16 cmd;</div><div class='ctx'> 	u32 id;</div><div class='ctx'> </div><div class='ctx'> 	if (which == CXL_RCRB_UPSTREAM)</div><div class='hunk'>@@ -603,7 +602,6 @@ resource_size_t __rcrb_to_component(struct device *dev, struct cxl_rcrb_info *ri</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	id = readl(addr + PCI_VENDOR_ID);</div><div class='del'>-	cmd = readw(addr + PCI_COMMAND);</div><div class='ctx'> 	bar0 = readl(addr + PCI_BASE_ADDRESS_0);</div><div class='ctx'> 	bar1 = readl(addr + PCI_BASE_ADDRESS_1);</div><div class='ctx'> 	iounmap(addr);</div><div class='hunk'>@@ -618,8 +616,6 @@ resource_size_t __rcrb_to_component(struct device *dev, struct cxl_rcrb_info *ri</div><div class='ctx'> 			dev_err(dev, "Failed to access Downstream Port RCRB\n");</div><div class='ctx'> 		return CXL_RESOURCE_NONE;</div><div class='ctx'> 	}</div><div class='del'>-	if (!(cmd &amp; PCI_COMMAND_MEMORY))</div><div class='del'>-		return CXL_RESOURCE_NONE;</div><div class='ctx'> 	/* The RCRB is a Memory Window, and the MEM_TYPE_1M bit is obsolete */</div><div class='ctx'> 	if (bar0 &amp; (PCI_BASE_ADDRESS_MEM_TYPE_1M | PCI_BASE_ADDRESS_SPACE_IO))</div><div class='ctx'> 		return CXL_RESOURCE_NONE;</div><div class='head'>diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h<br/>index be8a7dc77719..a9ab46eb0610 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/cxl.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/cxl.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/cxl.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/cxl.h</a></div><div class='hunk'>@@ -592,7 +592,6 @@ struct cxl_dax_region {</div><div class='ctx'>  * @cdat: Cached CDAT data</div><div class='ctx'>  * @cdat_available: Should a CDAT attribute be available in sysfs</div><div class='ctx'>  * @pci_latency: Upstream latency in picoseconds</div><div class='del'>- * @gpf_dvsec: Cached GPF port DVSEC</div><div class='ctx'>  */</div><div class='ctx'> struct cxl_port {</div><div class='ctx'> 	struct device dev;</div><div class='hunk'>@@ -616,7 +615,6 @@ struct cxl_port {</div><div class='ctx'> 	} cdat;</div><div class='ctx'> 	bool cdat_available;</div><div class='ctx'> 	long pci_latency;</div><div class='del'>-	int gpf_dvsec;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -664,6 +662,7 @@ struct cxl_rcrb_info {</div><div class='ctx'>  * @regs: Dport parsed register blocks</div><div class='ctx'>  * @coord: access coordinates (bandwidth and latency performance attributes)</div><div class='ctx'>  * @link_latency: calculated PCIe downstream latency</div><div class='add'>+ * @gpf_dvsec: Cached GPF port DVSEC</div><div class='ctx'>  */</div><div class='ctx'> struct cxl_dport {</div><div class='ctx'> 	struct device *dport_dev;</div><div class='hunk'>@@ -675,6 +674,7 @@ struct cxl_dport {</div><div class='ctx'> 	struct cxl_regs regs;</div><div class='ctx'> 	struct access_coordinate coord[ACCESS_COORDINATE_MAX];</div><div class='ctx'> 	long link_latency;</div><div class='add'>+	int gpf_dvsec;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -910,6 +910,6 @@ bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port);</div><div class='ctx'> #define __mock static</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port);</div><div class='add'>+u16 cxl_gpf_get_dvsec(struct device *dev);</div><div class='ctx'> </div><div class='ctx'> #endif /* __CXL_H__ */</div><div class='head'>diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c<br/>index 7b14a154463c..785aa2af5eaa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/pci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/pci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/pci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/pci.c</a></div><div class='hunk'>@@ -1018,7 +1018,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	rc = devm_cxl_setup_fwctl(cxlmd);</div><div class='add'>+	rc = devm_cxl_setup_fwctl(&amp;pdev-&gt;dev, cxlmd);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		dev_dbg(&amp;pdev-&gt;dev, "No CXL FWCTL setup\n");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c<br/>index d061fe3d2b86..e197883690ef 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/cxl/pmem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/cxl/pmem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/cxl/pmem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/cxl/pmem.c</a></div><div class='hunk'>@@ -108,7 +108,7 @@ static void cxl_nvdimm_arm_dirty_shutdown_tracking(struct cxl_nvdimm *cxl_nvd)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!cxl_gpf_get_dvsec(cxlds-&gt;dev, false))</div><div class='add'>+	if (!cxl_gpf_get_dvsec(cxlds-&gt;dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (cxl_get_dirty_count(mds, &amp;count)) {</div><div class='head'>diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c<br/>index 5baa83b85515..890ecac04dac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-buf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/dma-buf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/dma-buf.c</a></div><div class='hunk'>@@ -19,7 +19,9 @@</div><div class='ctx'> #include &lt;linux/anon_inodes.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/sync_file.h&gt;</div><div class='ctx'> #include &lt;linux/poll.h&gt;</div><div class='hunk'>@@ -35,35 +37,91 @@</div><div class='ctx'> </div><div class='ctx'> static inline int is_dma_buf_file(struct file *);</div><div class='ctx'> </div><div class='del'>-#if IS_ENABLED(CONFIG_DEBUG_FS)</div><div class='del'>-static DEFINE_MUTEX(debugfs_list_mutex);</div><div class='del'>-static LIST_HEAD(debugfs_list);</div><div class='add'>+static DEFINE_MUTEX(dmabuf_list_mutex);</div><div class='add'>+static LIST_HEAD(dmabuf_list);</div><div class='ctx'> </div><div class='del'>-static void __dma_buf_debugfs_list_add(struct dma_buf *dmabuf)</div><div class='add'>+static void __dma_buf_list_add(struct dma_buf *dmabuf)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;debugfs_list_mutex);</div><div class='del'>-	list_add(&amp;dmabuf-&gt;list_node, &amp;debugfs_list);</div><div class='del'>-	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='add'>+	mutex_lock(&amp;dmabuf_list_mutex);</div><div class='add'>+	list_add(&amp;dmabuf-&gt;list_node, &amp;dmabuf_list);</div><div class='add'>+	mutex_unlock(&amp;dmabuf_list_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __dma_buf_debugfs_list_del(struct dma_buf *dmabuf)</div><div class='add'>+static void __dma_buf_list_del(struct dma_buf *dmabuf)</div><div class='ctx'> {</div><div class='ctx'> 	if (!dmabuf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;debugfs_list_mutex);</div><div class='add'>+	mutex_lock(&amp;dmabuf_list_mutex);</div><div class='ctx'> 	list_del(&amp;dmabuf-&gt;list_node);</div><div class='del'>-	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='add'>+	mutex_unlock(&amp;dmabuf_list_mutex);</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static void __dma_buf_debugfs_list_add(struct dma_buf *dmabuf)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_buf_iter_begin - begin iteration through global list of all DMA buffers</div><div class='add'>+ *</div><div class='add'>+ * Returns the first buffer in the global list of DMA-bufs that's not in the</div><div class='add'>+ * process of being destroyed. Increments that buffer's reference count to</div><div class='add'>+ * prevent buffer destruction. Callers must release the reference, either by</div><div class='add'>+ * continuing iteration with dma_buf_iter_next(), or with dma_buf_put().</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * First buffer from global list, with refcount elevated</div><div class='add'>+ * * NULL if no active buffers are present</div><div class='add'>+ */</div><div class='add'>+struct dma_buf *dma_buf_iter_begin(void)</div><div class='ctx'> {</div><div class='add'>+	struct dma_buf *ret = NULL, *dmabuf;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The list mutex does not protect a dmabuf's refcount, so it can be</div><div class='add'>+	 * zeroed while we are iterating. We cannot call get_dma_buf() since the</div><div class='add'>+	 * caller may not already own a reference to the buffer.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;dmabuf_list_mutex);</div><div class='add'>+	list_for_each_entry(dmabuf, &amp;dmabuf_list, list_node) {</div><div class='add'>+		if (file_ref_get(&amp;dmabuf-&gt;file-&gt;f_ref)) {</div><div class='add'>+			ret = dmabuf;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dmabuf_list_mutex);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __dma_buf_debugfs_list_del(struct dma_buf *dmabuf)</div><div class='add'>+/**</div><div class='add'>+ * dma_buf_iter_next - continue iteration through global list of all DMA buffers</div><div class='add'>+ * @dmabuf:	[in]	pointer to dma_buf</div><div class='add'>+ *</div><div class='add'>+ * Decrements the reference count on the provided buffer. Returns the next</div><div class='add'>+ * buffer from the remainder of the global list of DMA-bufs with its reference</div><div class='add'>+ * count incremented. Callers must release the reference, either by continuing</div><div class='add'>+ * iteration with dma_buf_iter_next(), or with dma_buf_put().</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * Next buffer from global list, with refcount elevated</div><div class='add'>+ * * NULL if no additional active buffers are present</div><div class='add'>+ */</div><div class='add'>+struct dma_buf *dma_buf_iter_next(struct dma_buf *dmabuf)</div><div class='ctx'> {</div><div class='add'>+	struct dma_buf *ret = NULL;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The list mutex does not protect a dmabuf's refcount, so it can be</div><div class='add'>+	 * zeroed while we are iterating. We cannot call get_dma_buf() since the</div><div class='add'>+	 * caller may not already own a reference to the buffer.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;dmabuf_list_mutex);</div><div class='add'>+	dma_buf_put(dmabuf);</div><div class='add'>+	list_for_each_entry_continue(dmabuf, &amp;dmabuf_list, list_node) {</div><div class='add'>+		if (file_ref_get(&amp;dmabuf-&gt;file-&gt;f_ref)) {</div><div class='add'>+			ret = dmabuf;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dmabuf_list_mutex);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen)</div><div class='ctx'> {</div><div class='hunk'>@@ -115,7 +173,7 @@ static int dma_buf_file_release(struct inode *inode, struct file *file)</div><div class='ctx'> 	if (!is_dma_buf_file(file))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	__dma_buf_debugfs_list_del(file-&gt;private_data);</div><div class='add'>+	__dma_buf_list_del(file-&gt;private_data);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -636,10 +694,6 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info)</div><div class='ctx'> 		    || !exp_info-&gt;ops-&gt;release))</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(exp_info-&gt;ops-&gt;cache_sgt_mapping &amp;&amp;</div><div class='del'>-		    (exp_info-&gt;ops-&gt;pin || exp_info-&gt;ops-&gt;unpin)))</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='del'>-</div><div class='ctx'> 	if (WARN_ON(!exp_info-&gt;ops-&gt;pin != !exp_info-&gt;ops-&gt;unpin))</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='hunk'>@@ -689,7 +743,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info)</div><div class='ctx'> 	file-&gt;f_path.dentry-&gt;d_fsdata = dmabuf;</div><div class='ctx'> 	dmabuf-&gt;file = file;</div><div class='ctx'> </div><div class='del'>-	__dma_buf_debugfs_list_add(dmabuf);</div><div class='add'>+	__dma_buf_list_add(dmabuf);</div><div class='ctx'> </div><div class='ctx'> 	return dmabuf;</div><div class='ctx'> </div><div class='hunk'>@@ -782,7 +836,7 @@ static void mangle_sg_table(struct sg_table *sg_table)</div><div class='ctx'> </div><div class='ctx'> 	/* To catch abuse of the underlying struct page by importers mix</div><div class='ctx'> 	 * up the bits, but take care to preserve the low SG_ bits to</div><div class='del'>-	 * not corrupt the sgt. The mixing is undone in __unmap_dma_buf</div><div class='add'>+	 * not corrupt the sgt. The mixing is undone on unmap</div><div class='ctx'> 	 * before passing the sgt back to the exporter.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for_each_sgtable_sg(sg_table, sg, i)</div><div class='hunk'>@@ -790,29 +844,19 @@ static void mangle_sg_table(struct sg_table *sg_table)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> }</div><div class='del'>-static struct sg_table *__map_dma_buf(struct dma_buf_attachment *attach,</div><div class='del'>-				       enum dma_data_direction direction)</div><div class='del'>-{</div><div class='del'>-	struct sg_table *sg_table;</div><div class='del'>-	signed long ret;</div><div class='ctx'> </div><div class='del'>-	sg_table = attach-&gt;dmabuf-&gt;ops-&gt;map_dma_buf(attach, direction);</div><div class='del'>-	if (IS_ERR_OR_NULL(sg_table))</div><div class='del'>-		return sg_table;</div><div class='del'>-</div><div class='del'>-	if (!dma_buf_attachment_is_dynamic(attach)) {</div><div class='del'>-		ret = dma_resv_wait_timeout(attach-&gt;dmabuf-&gt;resv,</div><div class='del'>-					    DMA_RESV_USAGE_KERNEL, true,</div><div class='del'>-					    MAX_SCHEDULE_TIMEOUT);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			attach-&gt;dmabuf-&gt;ops-&gt;unmap_dma_buf(attach, sg_table,</div><div class='del'>-							   direction);</div><div class='del'>-			return ERR_PTR(ret);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+static inline bool</div><div class='add'>+dma_buf_attachment_is_dynamic(struct dma_buf_attachment *attach)</div><div class='add'>+{</div><div class='add'>+	return !!attach-&gt;importer_ops;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	mangle_sg_table(sg_table);</div><div class='del'>-	return sg_table;</div><div class='add'>+static bool</div><div class='add'>+dma_buf_pin_on_map(struct dma_buf_attachment *attach)</div><div class='add'>+{</div><div class='add'>+	return attach-&gt;dmabuf-&gt;ops-&gt;pin &amp;&amp;</div><div class='add'>+		(!dma_buf_attachment_is_dynamic(attach) ||</div><div class='add'>+		 !IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -935,48 +979,11 @@ dma_buf_dynamic_attach(struct dma_buf *dmabuf, struct device *dev,</div><div class='ctx'> 	list_add(&amp;attach-&gt;node, &amp;dmabuf-&gt;attachments);</div><div class='ctx'> 	dma_resv_unlock(dmabuf-&gt;resv);</div><div class='ctx'> </div><div class='del'>-	/* When either the importer or the exporter can't handle dynamic</div><div class='del'>-	 * mappings we cache the mapping here to avoid issues with the</div><div class='del'>-	 * reservation object lock.</div><div class='del'>-	 */</div><div class='del'>-	if (dma_buf_attachment_is_dynamic(attach) !=</div><div class='del'>-	    dma_buf_is_dynamic(dmabuf)) {</div><div class='del'>-		struct sg_table *sgt;</div><div class='del'>-</div><div class='del'>-		dma_resv_lock(attach-&gt;dmabuf-&gt;resv, NULL);</div><div class='del'>-		if (dma_buf_is_dynamic(attach-&gt;dmabuf)) {</div><div class='del'>-			ret = dmabuf-&gt;ops-&gt;pin(attach);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto err_unlock;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		sgt = __map_dma_buf(attach, DMA_BIDIRECTIONAL);</div><div class='del'>-		if (!sgt)</div><div class='del'>-			sgt = ERR_PTR(-ENOMEM);</div><div class='del'>-		if (IS_ERR(sgt)) {</div><div class='del'>-			ret = PTR_ERR(sgt);</div><div class='del'>-			goto err_unpin;</div><div class='del'>-		}</div><div class='del'>-		dma_resv_unlock(attach-&gt;dmabuf-&gt;resv);</div><div class='del'>-		attach-&gt;sgt = sgt;</div><div class='del'>-		attach-&gt;dir = DMA_BIDIRECTIONAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return attach;</div><div class='ctx'> </div><div class='ctx'> err_attach:</div><div class='ctx'> 	kfree(attach);</div><div class='ctx'> 	return ERR_PTR(ret);</div><div class='del'>-</div><div class='del'>-err_unpin:</div><div class='del'>-	if (dma_buf_is_dynamic(attach-&gt;dmabuf))</div><div class='del'>-		dmabuf-&gt;ops-&gt;unpin(attach);</div><div class='del'>-</div><div class='del'>-err_unlock:</div><div class='del'>-	dma_resv_unlock(attach-&gt;dmabuf-&gt;resv);</div><div class='del'>-</div><div class='del'>-	dma_buf_detach(dmabuf, attach);</div><div class='del'>-	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(dma_buf_dynamic_attach, "DMA_BUF");</div><div class='ctx'> </div><div class='hunk'>@@ -995,16 +1002,6 @@ struct dma_buf_attachment *dma_buf_attach(struct dma_buf *dmabuf,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(dma_buf_attach, "DMA_BUF");</div><div class='ctx'> </div><div class='del'>-static void __unmap_dma_buf(struct dma_buf_attachment *attach,</div><div class='del'>-			    struct sg_table *sg_table,</div><div class='del'>-			    enum dma_data_direction direction)</div><div class='del'>-{</div><div class='del'>-	/* uses XOR, hence this unmangles */</div><div class='del'>-	mangle_sg_table(sg_table);</div><div class='del'>-</div><div class='del'>-	attach-&gt;dmabuf-&gt;ops-&gt;unmap_dma_buf(attach, sg_table, direction);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * dma_buf_detach - Remove the given attachment from dmabuf's attachments list</div><div class='ctx'>  * @dmabuf:	[in]	buffer to detach from.</div><div class='hunk'>@@ -1020,16 +1017,7 @@ void dma_buf_detach(struct dma_buf *dmabuf, struct dma_buf_attachment *attach)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	dma_resv_lock(dmabuf-&gt;resv, NULL);</div><div class='del'>-</div><div class='del'>-	if (attach-&gt;sgt) {</div><div class='del'>-</div><div class='del'>-		__unmap_dma_buf(attach, attach-&gt;sgt, attach-&gt;dir);</div><div class='del'>-</div><div class='del'>-		if (dma_buf_is_dynamic(attach-&gt;dmabuf))</div><div class='del'>-			dmabuf-&gt;ops-&gt;unpin(attach);</div><div class='del'>-	}</div><div class='ctx'> 	list_del(&amp;attach-&gt;node);</div><div class='del'>-</div><div class='ctx'> 	dma_resv_unlock(dmabuf-&gt;resv);</div><div class='ctx'> </div><div class='ctx'> 	if (dmabuf-&gt;ops-&gt;detach)</div><div class='hunk'>@@ -1058,7 +1046,7 @@ int dma_buf_pin(struct dma_buf_attachment *attach)</div><div class='ctx'> 	struct dma_buf *dmabuf = attach-&gt;dmabuf;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!dma_buf_attachment_is_dynamic(attach));</div><div class='add'>+	WARN_ON(!attach-&gt;importer_ops);</div><div class='ctx'> </div><div class='ctx'> 	dma_resv_assert_held(dmabuf-&gt;resv);</div><div class='ctx'> </div><div class='hunk'>@@ -1081,7 +1069,7 @@ void dma_buf_unpin(struct dma_buf_attachment *attach)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_buf *dmabuf = attach-&gt;dmabuf;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(!dma_buf_attachment_is_dynamic(attach));</div><div class='add'>+	WARN_ON(!attach-&gt;importer_ops);</div><div class='ctx'> </div><div class='ctx'> 	dma_resv_assert_held(dmabuf-&gt;resv);</div><div class='ctx'> </div><div class='hunk'>@@ -1115,7 +1103,7 @@ struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *attach,</div><div class='ctx'> 					enum dma_data_direction direction)</div><div class='ctx'> {</div><div class='ctx'> 	struct sg_table *sg_table;</div><div class='del'>-	int r;</div><div class='add'>+	signed long ret;</div><div class='ctx'> </div><div class='ctx'> 	might_sleep();</div><div class='ctx'> </div><div class='hunk'>@@ -1124,41 +1112,37 @@ struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *attach,</div><div class='ctx'> </div><div class='ctx'> 	dma_resv_assert_held(attach-&gt;dmabuf-&gt;resv);</div><div class='ctx'> </div><div class='del'>-	if (attach-&gt;sgt) {</div><div class='add'>+	if (dma_buf_pin_on_map(attach)) {</div><div class='add'>+		ret = attach-&gt;dmabuf-&gt;ops-&gt;pin(attach);</div><div class='ctx'> 		/*</div><div class='del'>-		 * Two mappings with different directions for the same</div><div class='del'>-		 * attachment are not allowed.</div><div class='add'>+		 * Catch exporters making buffers inaccessible even when</div><div class='add'>+		 * attachments preventing that exist.</div><div class='ctx'> 		 */</div><div class='del'>-		if (attach-&gt;dir != direction &amp;&amp;</div><div class='del'>-		    attach-&gt;dir != DMA_BIDIRECTIONAL)</div><div class='del'>-			return ERR_PTR(-EBUSY);</div><div class='del'>-</div><div class='del'>-		return attach-&gt;sgt;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dma_buf_is_dynamic(attach-&gt;dmabuf)) {</div><div class='del'>-		if (!IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY)) {</div><div class='del'>-			r = attach-&gt;dmabuf-&gt;ops-&gt;pin(attach);</div><div class='del'>-			if (r)</div><div class='del'>-				return ERR_PTR(r);</div><div class='del'>-		}</div><div class='add'>+		WARN_ON_ONCE(ret == EBUSY);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sg_table = __map_dma_buf(attach, direction);</div><div class='add'>+	sg_table = attach-&gt;dmabuf-&gt;ops-&gt;map_dma_buf(attach, direction);</div><div class='ctx'> 	if (!sg_table)</div><div class='ctx'> 		sg_table = ERR_PTR(-ENOMEM);</div><div class='add'>+	if (IS_ERR(sg_table))</div><div class='add'>+		goto error_unpin;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(sg_table) &amp;&amp; dma_buf_is_dynamic(attach-&gt;dmabuf) &amp;&amp;</div><div class='del'>-	     !IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY))</div><div class='del'>-		attach-&gt;dmabuf-&gt;ops-&gt;unpin(attach);</div><div class='del'>-</div><div class='del'>-	if (!IS_ERR(sg_table) &amp;&amp; attach-&gt;dmabuf-&gt;ops-&gt;cache_sgt_mapping) {</div><div class='del'>-		attach-&gt;sgt = sg_table;</div><div class='del'>-		attach-&gt;dir = direction;</div><div class='add'>+	/*</div><div class='add'>+	 * Importers with static attachments don't wait for fences.</div><div class='add'>+	 */</div><div class='add'>+	if (!dma_buf_attachment_is_dynamic(attach)) {</div><div class='add'>+		ret = dma_resv_wait_timeout(attach-&gt;dmabuf-&gt;resv,</div><div class='add'>+					    DMA_RESV_USAGE_KERNEL, true,</div><div class='add'>+					    MAX_SCHEDULE_TIMEOUT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto error_unmap;</div><div class='ctx'> 	}</div><div class='add'>+	mangle_sg_table(sg_table);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DMA_API_DEBUG</div><div class='del'>-	if (!IS_ERR(sg_table)) {</div><div class='add'>+	{</div><div class='ctx'> 		struct scatterlist *sg;</div><div class='ctx'> 		u64 addr;</div><div class='ctx'> 		int len;</div><div class='hunk'>@@ -1175,6 +1159,16 @@ struct sg_table *dma_buf_map_attachment(struct dma_buf_attachment *attach,</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* CONFIG_DMA_API_DEBUG */</div><div class='ctx'> 	return sg_table;</div><div class='add'>+</div><div class='add'>+error_unmap:</div><div class='add'>+	attach-&gt;dmabuf-&gt;ops-&gt;unmap_dma_buf(attach, sg_table, direction);</div><div class='add'>+	sg_table = ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+error_unpin:</div><div class='add'>+	if (dma_buf_pin_on_map(attach))</div><div class='add'>+		attach-&gt;dmabuf-&gt;ops-&gt;unpin(attach);</div><div class='add'>+</div><div class='add'>+	return sg_table;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(dma_buf_map_attachment, "DMA_BUF");</div><div class='ctx'> </div><div class='hunk'>@@ -1227,14 +1221,11 @@ void dma_buf_unmap_attachment(struct dma_buf_attachment *attach,</div><div class='ctx'> </div><div class='ctx'> 	dma_resv_assert_held(attach-&gt;dmabuf-&gt;resv);</div><div class='ctx'> </div><div class='del'>-	if (attach-&gt;sgt == sg_table)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	__unmap_dma_buf(attach, sg_table, direction);</div><div class='add'>+	mangle_sg_table(sg_table);</div><div class='add'>+	attach-&gt;dmabuf-&gt;ops-&gt;unmap_dma_buf(attach, sg_table, direction);</div><div class='ctx'> </div><div class='del'>-	if (dma_buf_is_dynamic(attach-&gt;dmabuf) &amp;&amp;</div><div class='del'>-	    !IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY))</div><div class='del'>-		dma_buf_unpin(attach);</div><div class='add'>+	if (dma_buf_pin_on_map(attach))</div><div class='add'>+		attach-&gt;dmabuf-&gt;ops-&gt;unpin(attach);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(dma_buf_unmap_attachment, "DMA_BUF");</div><div class='ctx'> </div><div class='hunk'>@@ -1630,7 +1621,7 @@ static int dma_buf_debug_show(struct seq_file *s, void *unused)</div><div class='ctx'> 	size_t size = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = mutex_lock_interruptible(&amp;debugfs_list_mutex);</div><div class='add'>+	ret = mutex_lock_interruptible(&amp;dmabuf_list_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1639,7 +1630,7 @@ static int dma_buf_debug_show(struct seq_file *s, void *unused)</div><div class='ctx'> 	seq_printf(s, "%-8s\t%-8s\t%-8s\t%-8s\texp_name\t%-8s\tname\n",</div><div class='ctx'> 		   "size", "flags", "mode", "count", "ino");</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(buf_obj, &amp;debugfs_list, list_node) {</div><div class='add'>+	list_for_each_entry(buf_obj, &amp;dmabuf_list, list_node) {</div><div class='ctx'> </div><div class='ctx'> 		ret = dma_resv_lock_interruptible(buf_obj-&gt;resv, NULL);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -1676,11 +1667,11 @@ static int dma_buf_debug_show(struct seq_file *s, void *unused)</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(s, "\nTotal %d objects, %zu bytes\n", count, size);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='add'>+	mutex_unlock(&amp;dmabuf_list_mutex);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error_unlock:</div><div class='del'>-	mutex_unlock(&amp;debugfs_list_mutex);</div><div class='add'>+	mutex_unlock(&amp;dmabuf_list_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma-buf/dma-fence-unwrap.c b/drivers/dma-buf/dma-fence-unwrap.c<br/>index 2a059ac0ed27..a495d8a6c2e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-fence-unwrap.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/dma-fence-unwrap.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-fence-unwrap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/dma-fence-unwrap.c</a></div><div class='hunk'>@@ -79,6 +79,41 @@ static int fence_cmp(const void *_a, const void *_b)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * dma_fence_dedup_array - Sort and deduplicate an array of dma_fence pointers</div><div class='add'>+ * @fences:     Array of dma_fence pointers to be deduplicated</div><div class='add'>+ * @num_fences: Number of entries in the @fences array</div><div class='add'>+ *</div><div class='add'>+ * Sorts the input array by context, then removes duplicate</div><div class='add'>+ * fences with the same context, keeping only the most recent one.</div><div class='add'>+ *</div><div class='add'>+ * The array is modified in-place and unreferenced duplicate fences are released</div><div class='add'>+ * via dma_fence_put(). The function returns the new number of fences after</div><div class='add'>+ * deduplication.</div><div class='add'>+ *</div><div class='add'>+ * Return: Number of unique fences remaining in the array.</div><div class='add'>+ */</div><div class='add'>+int dma_fence_dedup_array(struct dma_fence **fences, int num_fences)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	sort(fences, num_fences, sizeof(*fences), fence_cmp, NULL);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Only keep the most recent fence for each context.</div><div class='add'>+	 */</div><div class='add'>+	j = 0;</div><div class='add'>+	for (i = 1; i &lt; num_fences; i++) {</div><div class='add'>+		if (fences[i]-&gt;context == fences[j]-&gt;context)</div><div class='add'>+			dma_fence_put(fences[i]);</div><div class='add'>+		else</div><div class='add'>+			fences[++j] = fences[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ++j;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(dma_fence_dedup_array);</div><div class='add'>+</div><div class='ctx'> /* Implementation for the dma_fence_merge() marco, don't use directly */</div><div class='ctx'> struct dma_fence *__dma_fence_unwrap_merge(unsigned int num_fences,</div><div class='ctx'> 					   struct dma_fence **fences,</div><div class='hunk'>@@ -87,7 +122,7 @@ struct dma_fence *__dma_fence_unwrap_merge(unsigned int num_fences,</div><div class='ctx'> 	struct dma_fence *tmp, *unsignaled = NULL, **array;</div><div class='ctx'> 	struct dma_fence_array *result;</div><div class='ctx'> 	ktime_t timestamp;</div><div class='del'>-	int i, j, count;</div><div class='add'>+	int i, count;</div><div class='ctx'> </div><div class='ctx'> 	count = 0;</div><div class='ctx'> 	timestamp = ns_to_ktime(0);</div><div class='hunk'>@@ -141,19 +176,7 @@ struct dma_fence *__dma_fence_unwrap_merge(unsigned int num_fences,</div><div class='ctx'> 	if (count == 0 || count == 1)</div><div class='ctx'> 		goto return_fastpath;</div><div class='ctx'> </div><div class='del'>-	sort(array, count, sizeof(*array), fence_cmp, NULL);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Only keep the most recent fence for each context.</div><div class='del'>-	 */</div><div class='del'>-	j = 0;</div><div class='del'>-	for (i = 1; i &lt; count; i++) {</div><div class='del'>-		if (array[i]-&gt;context == array[j]-&gt;context)</div><div class='del'>-			dma_fence_put(array[i]);</div><div class='del'>-		else</div><div class='del'>-			array[++j] = array[i];</div><div class='del'>-	}</div><div class='del'>-	count = ++j;</div><div class='add'>+	count = dma_fence_dedup_array(array, count);</div><div class='ctx'> </div><div class='ctx'> 	if (count &gt; 1) {</div><div class='ctx'> 		result = dma_fence_array_create(count, array,</div><div class='head'>diff --git a/drivers/dma-buf/dma-resv.c b/drivers/dma-buf/dma-resv.c<br/>index 5f8d010516f0..b1ef4546346d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-resv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/dma-resv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/dma-resv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/dma-resv.c</a></div><div class='hunk'>@@ -320,8 +320,9 @@ void dma_resv_add_fence(struct dma_resv *obj, struct dma_fence *fence,</div><div class='ctx'> 	count++;</div><div class='ctx'> </div><div class='ctx'> 	dma_resv_list_set(fobj, i, fence, usage);</div><div class='del'>-	/* pointer update must be visible before we extend the num_fences */</div><div class='del'>-	smp_store_mb(fobj-&gt;num_fences, count);</div><div class='add'>+	/* fence update must be visible before we extend the num_fences */</div><div class='add'>+	smp_wmb();</div><div class='add'>+	fobj-&gt;num_fences = count;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(dma_resv_add_fence);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma-buf/heaps/system_heap.c b/drivers/dma-buf/heaps/system_heap.c<br/>index 26d5dc89ea16..82b1b714300d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/heaps/system_heap.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/heaps/system_heap.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/heaps/system_heap.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/heaps/system_heap.c</a></div><div class='hunk'>@@ -21,8 +21,6 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='del'>-static struct dma_heap *sys_heap;</div><div class='del'>-</div><div class='ctx'> struct system_heap_buffer {</div><div class='ctx'> 	struct dma_heap *heap;</div><div class='ctx'> 	struct list_head attachments;</div><div class='hunk'>@@ -424,6 +422,7 @@ static const struct dma_heap_ops system_heap_ops = {</div><div class='ctx'> static int __init system_heap_create(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_heap_export_info exp_info;</div><div class='add'>+	struct dma_heap *sys_heap;</div><div class='ctx'> </div><div class='ctx'> 	exp_info.name = "system";</div><div class='ctx'> 	exp_info.ops = &amp;system_heap_ops;</div><div class='head'>diff --git a/drivers/dma-buf/st-dma-fence.c b/drivers/dma-buf/st-dma-fence.c<br/>index 9f80a45498f0..261b38816226 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/st-dma-fence.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/st-dma-fence.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/st-dma-fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/st-dma-fence.c</a></div><div class='hunk'>@@ -413,7 +413,7 @@ static int test_wait_timeout(void *arg)</div><div class='ctx'> 	err = 0;</div><div class='ctx'> err_free:</div><div class='ctx'> 	timer_delete_sync(&amp;wt.timer);</div><div class='del'>-	destroy_timer_on_stack(&amp;wt.timer);</div><div class='add'>+	timer_destroy_on_stack(&amp;wt.timer);</div><div class='ctx'> 	dma_fence_signal(wt.f);</div><div class='ctx'> 	dma_fence_put(wt.f);</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/drivers/dma-buf/sw_sync.c b/drivers/dma-buf/sw_sync.c<br/>index f5905d67dedb..4f27ee93a00c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/sw_sync.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/sw_sync.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/sw_sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/sw_sync.c</a></div><div class='hunk'>@@ -173,20 +173,6 @@ static bool timeline_fence_signaled(struct dma_fence *fence)</div><div class='ctx'> 	return !__dma_fence_is_later(fence-&gt;seqno, parent-&gt;value, fence-&gt;ops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void timeline_fence_value_str(struct dma_fence *fence,</div><div class='del'>-				    char *str, int size)</div><div class='del'>-{</div><div class='del'>-	snprintf(str, size, "%lld", fence-&gt;seqno);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void timeline_fence_timeline_value_str(struct dma_fence *fence,</div><div class='del'>-					     char *str, int size)</div><div class='del'>-{</div><div class='del'>-	struct sync_timeline *parent = dma_fence_parent(fence);</div><div class='del'>-</div><div class='del'>-	snprintf(str, size, "%d", parent-&gt;value);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void timeline_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)</div><div class='ctx'> {</div><div class='ctx'> 	struct sync_pt *pt = dma_fence_to_sync_pt(fence);</div><div class='hunk'>@@ -208,8 +194,6 @@ static const struct dma_fence_ops timeline_fence_ops = {</div><div class='ctx'> 	.get_timeline_name = timeline_fence_get_timeline_name,</div><div class='ctx'> 	.signaled = timeline_fence_signaled,</div><div class='ctx'> 	.release = timeline_fence_release,</div><div class='del'>-	.fence_value_str = timeline_fence_value_str,</div><div class='del'>-	.timeline_value_str = timeline_fence_timeline_value_str,</div><div class='ctx'> 	.set_deadline = timeline_fence_set_deadline,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -438,15 +422,17 @@ static int sw_sync_ioctl_get_deadline(struct sync_timeline *obj, unsigned long a</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	pt = dma_fence_to_sync_pt(fence);</div><div class='del'>-	if (!pt)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!pt) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto put_fence;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(fence-&gt;lock, flags);</div><div class='del'>-	if (test_bit(SW_SYNC_HAS_DEADLINE_BIT, &amp;fence-&gt;flags)) {</div><div class='del'>-		data.deadline_ns = ktime_to_ns(pt-&gt;deadline);</div><div class='del'>-	} else {</div><div class='add'>+	if (!test_bit(SW_SYNC_HAS_DEADLINE_BIT, &amp;fence-&gt;flags)) {</div><div class='ctx'> 		ret = -ENOENT;</div><div class='add'>+		goto unlock;</div><div class='ctx'> 	}</div><div class='add'>+	data.deadline_ns = ktime_to_ns(pt-&gt;deadline);</div><div class='ctx'> 	spin_unlock_irqrestore(fence-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	dma_fence_put(fence);</div><div class='hunk'>@@ -458,6 +444,13 @@ static int sw_sync_ioctl_get_deadline(struct sync_timeline *obj, unsigned long a</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_irqrestore(fence-&gt;lock, flags);</div><div class='add'>+put_fence:</div><div class='add'>+	dma_fence_put(fence);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static long sw_sync_ioctl(struct file *file, unsigned int cmd,</div><div class='head'>diff --git a/drivers/dma-buf/sync_debug.c b/drivers/dma-buf/sync_debug.c<br/>index 237bce21d1e7..67cd69551e42 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/sync_debug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/sync_debug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/sync_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/sync_debug.c</a></div><div class='hunk'>@@ -12,8 +12,6 @@ static struct dentry *dbgfs;</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(sync_timeline_list_head);</div><div class='ctx'> static DEFINE_SPINLOCK(sync_timeline_list_lock);</div><div class='del'>-static LIST_HEAD(sync_file_list_head);</div><div class='del'>-static DEFINE_SPINLOCK(sync_file_list_lock);</div><div class='ctx'> </div><div class='ctx'> void sync_timeline_debug_add(struct sync_timeline *obj)</div><div class='ctx'> {</div><div class='hunk'>@@ -33,24 +31,6 @@ void sync_timeline_debug_remove(struct sync_timeline *obj)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;sync_timeline_list_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void sync_file_debug_add(struct sync_file *sync_file)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;sync_file_list_lock, flags);</div><div class='del'>-	list_add_tail(&amp;sync_file-&gt;sync_file_list, &amp;sync_file_list_head);</div><div class='del'>-	spin_unlock_irqrestore(&amp;sync_file_list_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void sync_file_debug_remove(struct sync_file *sync_file)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;sync_file_list_lock, flags);</div><div class='del'>-	list_del(&amp;sync_file-&gt;sync_file_list);</div><div class='del'>-	spin_unlock_irqrestore(&amp;sync_file_list_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const char *sync_status_str(int status)</div><div class='ctx'> {</div><div class='ctx'> 	if (status &lt; 0)</div><div class='hunk'>@@ -82,25 +62,8 @@ static void sync_print_fence(struct seq_file *s,</div><div class='ctx'> 		seq_printf(s, "@%lld.%09ld", (s64)ts64.tv_sec, ts64.tv_nsec);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (fence-&gt;ops-&gt;timeline_value_str &amp;&amp;</div><div class='del'>-		fence-&gt;ops-&gt;fence_value_str) {</div><div class='del'>-		char value[64];</div><div class='del'>-		bool success;</div><div class='del'>-</div><div class='del'>-		fence-&gt;ops-&gt;fence_value_str(fence, value, sizeof(value));</div><div class='del'>-		success = strlen(value);</div><div class='del'>-</div><div class='del'>-		if (success) {</div><div class='del'>-			seq_printf(s, ": %s", value);</div><div class='del'>-</div><div class='del'>-			fence-&gt;ops-&gt;timeline_value_str(fence, value,</div><div class='del'>-						       sizeof(value));</div><div class='del'>-</div><div class='del'>-			if (strlen(value))</div><div class='del'>-				seq_printf(s, " / %s", value);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	seq_printf(s, ": %lld", fence-&gt;seqno);</div><div class='add'>+	seq_printf(s, " / %d", parent-&gt;value);</div><div class='ctx'> 	seq_putc(s, '\n');</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -118,26 +81,6 @@ static void sync_print_obj(struct seq_file *s, struct sync_timeline *obj)</div><div class='ctx'> 	spin_unlock(&amp;obj-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sync_print_sync_file(struct seq_file *s,</div><div class='del'>-				  struct sync_file *sync_file)</div><div class='del'>-{</div><div class='del'>-	char buf[128];</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "[%p] %s: %s\n", sync_file,</div><div class='del'>-		   sync_file_get_name(sync_file, buf, sizeof(buf)),</div><div class='del'>-		   sync_status_str(dma_fence_get_status(sync_file-&gt;fence)));</div><div class='del'>-</div><div class='del'>-	if (dma_fence_is_array(sync_file-&gt;fence)) {</div><div class='del'>-		struct dma_fence_array *array = to_dma_fence_array(sync_file-&gt;fence);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; array-&gt;num_fences; ++i)</div><div class='del'>-			sync_print_fence(s, array-&gt;fences[i], true);</div><div class='del'>-	} else {</div><div class='del'>-		sync_print_fence(s, sync_file-&gt;fence, true);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sync_info_debugfs_show(struct seq_file *s, void *unused)</div><div class='ctx'> {</div><div class='ctx'> 	struct list_head *pos;</div><div class='hunk'>@@ -157,15 +100,6 @@ static int sync_info_debugfs_show(struct seq_file *s, void *unused)</div><div class='ctx'> </div><div class='ctx'> 	seq_puts(s, "fences:\n--------------\n");</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;sync_file_list_lock);</div><div class='del'>-	list_for_each(pos, &amp;sync_file_list_head) {</div><div class='del'>-		struct sync_file *sync_file =</div><div class='del'>-			container_of(pos, struct sync_file, sync_file_list);</div><div class='del'>-</div><div class='del'>-		sync_print_sync_file(s, sync_file);</div><div class='del'>-		seq_putc(s, '\n');</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irq(&amp;sync_file_list_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma-buf/sync_debug.h b/drivers/dma-buf/sync_debug.h<br/>index a1bdd62efccd..02af347293d0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/sync_debug.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/sync_debug.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/sync_debug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/sync_debug.h</a></div><div class='hunk'>@@ -68,7 +68,5 @@ extern const struct file_operations sw_sync_debugfs_fops;</div><div class='ctx'> </div><div class='ctx'> void sync_timeline_debug_add(struct sync_timeline *obj);</div><div class='ctx'> void sync_timeline_debug_remove(struct sync_timeline *obj);</div><div class='del'>-void sync_file_debug_add(struct sync_file *fence);</div><div class='del'>-void sync_file_debug_remove(struct sync_file *fence);</div><div class='ctx'> </div><div class='ctx'> #endif /* _LINUX_SYNC_H */</div><div class='head'>diff --git a/drivers/dma-buf/udmabuf.c b/drivers/dma-buf/udmabuf.c<br/>index cc7398cc17d6..7eee3eb47a8e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma-buf/udmabuf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma-buf/udmabuf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma-buf/udmabuf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma-buf/udmabuf.c</a></div><div class='hunk'>@@ -285,7 +285,6 @@ static int end_cpu_udmabuf(struct dma_buf *buf,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct dma_buf_ops udmabuf_ops = {</div><div class='del'>-	.cache_sgt_mapping = true,</div><div class='ctx'> 	.map_dma_buf	   = map_udmabuf,</div><div class='ctx'> 	.unmap_dma_buf	   = unmap_udmabuf,</div><div class='ctx'> 	.release	   = release_udmabuf,</div><div class='hunk'>@@ -393,7 +392,7 @@ static long udmabuf_create(struct miscdevice *device,</div><div class='ctx'> 	if (!ubuf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	pglimit = (size_limit_mb * 1024 * 1024) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+	pglimit = ((u64)size_limit_mb * 1024 * 1024) &gt;&gt; PAGE_SHIFT;</div><div class='ctx'> 	for (i = 0; i &lt; head-&gt;count; i++) {</div><div class='ctx'> 		pgoff_t subpgcnt;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/amd/ptdma/ptdma-dmaengine.c b/drivers/dma/amd/ptdma/ptdma-dmaengine.c<br/>index 715ac3ae067b..81339664036f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/amd/ptdma/ptdma-dmaengine.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/amd/ptdma/ptdma-dmaengine.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/amd/ptdma/ptdma-dmaengine.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/amd/ptdma/ptdma-dmaengine.c</a></div><div class='hunk'>@@ -342,6 +342,9 @@ static void pt_cmd_callback_work(void *data, int err)</div><div class='ctx'> 	struct pt_dma_chan *chan;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	if (!desc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	dma_chan = desc-&gt;vd.tx.chan;</div><div class='ctx'> 	chan = to_pt_chan(dma_chan);</div><div class='ctx'> </div><div class='hunk'>@@ -355,16 +358,14 @@ static void pt_cmd_callback_work(void *data, int err)</div><div class='ctx'> 		desc-&gt;status = DMA_ERROR;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;chan-&gt;vc.lock, flags);</div><div class='del'>-	if (desc) {</div><div class='del'>-		if (desc-&gt;status != DMA_COMPLETE) {</div><div class='del'>-			if (desc-&gt;status != DMA_ERROR)</div><div class='del'>-				desc-&gt;status = DMA_COMPLETE;</div><div class='add'>+	if (desc-&gt;status != DMA_COMPLETE) {</div><div class='add'>+		if (desc-&gt;status != DMA_ERROR)</div><div class='add'>+			desc-&gt;status = DMA_COMPLETE;</div><div class='ctx'> </div><div class='del'>-			dma_cookie_complete(tx_desc);</div><div class='del'>-			dma_descriptor_unmap(tx_desc);</div><div class='del'>-		} else {</div><div class='del'>-			tx_desc = NULL;</div><div class='del'>-		}</div><div class='add'>+		dma_cookie_complete(tx_desc);</div><div class='add'>+		dma_descriptor_unmap(tx_desc);</div><div class='add'>+	} else {</div><div class='add'>+		tx_desc = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chan-&gt;vc.lock, flags);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c<br/>index d891dfca358e..91b2fbc0b864 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/dmatest.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/dmatest.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/dmatest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/dmatest.c</a></div><div class='hunk'>@@ -841,9 +841,9 @@ static int dmatest_func(void *data)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dma_async_issue_pending(chan);</div><div class='ctx'> </div><div class='del'>-			wait_event_timeout(thread-&gt;done_wait,</div><div class='del'>-					   done-&gt;done,</div><div class='del'>-					   msecs_to_jiffies(params-&gt;timeout));</div><div class='add'>+			wait_event_freezable_timeout(thread-&gt;done_wait,</div><div class='add'>+					done-&gt;done,</div><div class='add'>+					msecs_to_jiffies(params-&gt;timeout));</div><div class='ctx'> </div><div class='ctx'> 			status = dma_async_is_tx_complete(chan, cookie, NULL,</div><div class='ctx'> 							  NULL);</div><div class='head'>diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c<br/>index 756d67325db5..66bfa28d984e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/fsl-edma-main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/fsl-edma-main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/fsl-edma-main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/fsl-edma-main.c</a></div><div class='hunk'>@@ -57,7 +57,7 @@ static irqreturn_t fsl_edma3_tx_handler(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	intr = edma_readl_chreg(fsl_chan, ch_int);</div><div class='ctx'> 	if (!intr)</div><div class='del'>-		return IRQ_HANDLED;</div><div class='add'>+		return IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	edma_writel_chreg(fsl_chan, 1, ch_int);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/dma/idxd/cdev.c b/drivers/dma/idxd/cdev.c<br/>index ff94ee892339..6d12033649f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/cdev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/idxd/cdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/cdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/idxd/cdev.c</a></div><div class='hunk'>@@ -222,7 +222,7 @@ static int idxd_cdev_open(struct inode *inode, struct file *filp)</div><div class='ctx'> 	struct idxd_wq *wq;</div><div class='ctx'> 	struct device *dev, *fdev;</div><div class='ctx'> 	int rc = 0;</div><div class='del'>-	struct iommu_sva *sva;</div><div class='add'>+	struct iommu_sva *sva = NULL;</div><div class='ctx'> 	unsigned int pasid;</div><div class='ctx'> 	struct idxd_cdev *idxd_cdev;</div><div class='ctx'> </div><div class='hunk'>@@ -317,7 +317,7 @@ failed_set_pasid:</div><div class='ctx'> 	if (device_user_pasid_enabled(idxd))</div><div class='ctx'> 		idxd_xa_pasid_remove(ctx);</div><div class='ctx'> failed_get_pasid:</div><div class='del'>-	if (device_user_pasid_enabled(idxd))</div><div class='add'>+	if (device_user_pasid_enabled(idxd) &amp;&amp; !IS_ERR_OR_NULL(sva))</div><div class='ctx'> 		iommu_sva_unbind_device(sva);</div><div class='ctx'> failed:</div><div class='ctx'> 	mutex_unlock(&amp;wq-&gt;wq_lock);</div><div class='hunk'>@@ -407,6 +407,9 @@ static int idxd_cdev_mmap(struct file *filp, struct vm_area_struct *vma)</div><div class='ctx'> 	if (!idxd-&gt;user_submission_safe &amp;&amp; !capable(CAP_SYS_RAWIO))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='add'>+	if (current-&gt;mm != ctx-&gt;mm)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	rc = check_vma(wq, vma, __func__);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		return rc;</div><div class='hunk'>@@ -473,6 +476,9 @@ static ssize_t idxd_cdev_write(struct file *filp, const char __user *buf, size_t</div><div class='ctx'> 	ssize_t written = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (current-&gt;mm != ctx-&gt;mm)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; len/sizeof(struct dsa_hw_desc); i++) {</div><div class='ctx'> 		int rc = idxd_submit_user_descriptor(ctx, udesc + i);</div><div class='ctx'> </div><div class='hunk'>@@ -493,6 +499,9 @@ static __poll_t idxd_cdev_poll(struct file *filp,</div><div class='ctx'> 	struct idxd_device *idxd = wq-&gt;idxd;</div><div class='ctx'> 	__poll_t out = 0;</div><div class='ctx'> </div><div class='add'>+	if (current-&gt;mm != ctx-&gt;mm)</div><div class='add'>+		return POLLNVAL;</div><div class='add'>+</div><div class='ctx'> 	poll_wait(filp, &amp;wq-&gt;err_queue, wait);</div><div class='ctx'> 	spin_lock(&amp;idxd-&gt;dev_lock);</div><div class='ctx'> 	if (idxd-&gt;sw_err.valid)</div><div class='head'>diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c<br/>index fca1d2924999..760b7d81fcd8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/idxd/init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/idxd/init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/idxd/init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/idxd/init.c</a></div><div class='hunk'>@@ -155,6 +155,25 @@ static void idxd_cleanup_interrupts(struct idxd_device *idxd)</div><div class='ctx'> 	pci_free_irq_vectors(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void idxd_clean_wqs(struct idxd_device *idxd)</div><div class='add'>+{</div><div class='add'>+	struct idxd_wq *wq;</div><div class='add'>+	struct device *conf_dev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; idxd-&gt;max_wqs; i++) {</div><div class='add'>+		wq = idxd-&gt;wqs[i];</div><div class='add'>+		if (idxd-&gt;hw.wq_cap.op_config)</div><div class='add'>+			bitmap_free(wq-&gt;opcap_bmap);</div><div class='add'>+		kfree(wq-&gt;wqcfg);</div><div class='add'>+		conf_dev = wq_confdev(wq);</div><div class='add'>+		put_device(conf_dev);</div><div class='add'>+		kfree(wq);</div><div class='add'>+	}</div><div class='add'>+	bitmap_free(idxd-&gt;wq_enable_map);</div><div class='add'>+	kfree(idxd-&gt;wqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int idxd_setup_wqs(struct idxd_device *idxd)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;idxd-&gt;pdev-&gt;dev;</div><div class='hunk'>@@ -169,8 +188,8 @@ static int idxd_setup_wqs(struct idxd_device *idxd)</div><div class='ctx'> </div><div class='ctx'> 	idxd-&gt;wq_enable_map = bitmap_zalloc_node(idxd-&gt;max_wqs, GFP_KERNEL, dev_to_node(dev));</div><div class='ctx'> 	if (!idxd-&gt;wq_enable_map) {</div><div class='del'>-		kfree(idxd-&gt;wqs);</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_bitmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; idxd-&gt;max_wqs; i++) {</div><div class='hunk'>@@ -189,10 +208,8 @@ static int idxd_setup_wqs(struct idxd_device *idxd)</div><div class='ctx'> 		conf_dev-&gt;bus = &amp;dsa_bus_type;</div><div class='ctx'> 		conf_dev-&gt;type = &amp;idxd_wq_device_type;</div><div class='ctx'> 		rc = dev_set_name(conf_dev, "wq%d.%d", idxd-&gt;id, wq-&gt;id);</div><div class='del'>-		if (rc &lt; 0) {</div><div class='del'>-			put_device(conf_dev);</div><div class='add'>+		if (rc &lt; 0)</div><div class='ctx'> 			goto err;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		mutex_init(&amp;wq-&gt;wq_lock);</div><div class='ctx'> 		init_waitqueue_head(&amp;wq-&gt;err_queue);</div><div class='hunk'>@@ -203,7 +220,6 @@ static int idxd_setup_wqs(struct idxd_device *idxd)</div><div class='ctx'> 		wq-&gt;enqcmds_retries = IDXD_ENQCMDS_RETRIES;</div><div class='ctx'> 		wq-&gt;wqcfg = kzalloc_node(idxd-&gt;wqcfg_size, GFP_KERNEL, dev_to_node(dev));</div><div class='ctx'> 		if (!wq-&gt;wqcfg) {</div><div class='del'>-			put_device(conf_dev);</div><div class='ctx'> 			rc = -ENOMEM;</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -211,9 +227,8 @@ static int idxd_setup_wqs(struct idxd_device *idxd)</div><div class='ctx'> 		if (idxd-&gt;hw.wq_cap.op_config) {</div><div class='ctx'> 			wq-&gt;opcap_bmap = bitmap_zalloc(IDXD_MAX_OPCAP_BITS, GFP_KERNEL);</div><div class='ctx'> 			if (!wq-&gt;opcap_bmap) {</div><div class='del'>-				put_device(conf_dev);</div><div class='ctx'> 				rc = -ENOMEM;</div><div class='del'>-				goto err;</div><div class='add'>+				goto err_opcap_bmap;</div><div class='ctx'> 			}</div><div class='ctx'> 			bitmap_copy(wq-&gt;opcap_bmap, idxd-&gt;opcap_bmap, IDXD_MAX_OPCAP_BITS);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -224,15 +239,46 @@ static int idxd_setup_wqs(struct idxd_device *idxd)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- err:</div><div class='add'>+err_opcap_bmap:</div><div class='add'>+	kfree(wq-&gt;wqcfg);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	put_device(conf_dev);</div><div class='add'>+	kfree(wq);</div><div class='add'>+</div><div class='ctx'> 	while (--i &gt;= 0) {</div><div class='ctx'> 		wq = idxd-&gt;wqs[i];</div><div class='add'>+		if (idxd-&gt;hw.wq_cap.op_config)</div><div class='add'>+			bitmap_free(wq-&gt;opcap_bmap);</div><div class='add'>+		kfree(wq-&gt;wqcfg);</div><div class='ctx'> 		conf_dev = wq_confdev(wq);</div><div class='ctx'> 		put_device(conf_dev);</div><div class='add'>+		kfree(wq);</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='add'>+	bitmap_free(idxd-&gt;wq_enable_map);</div><div class='add'>+</div><div class='add'>+err_bitmap:</div><div class='add'>+	kfree(idxd-&gt;wqs);</div><div class='add'>+</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void idxd_clean_engines(struct idxd_device *idxd)</div><div class='add'>+{</div><div class='add'>+	struct idxd_engine *engine;</div><div class='add'>+	struct device *conf_dev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; idxd-&gt;max_engines; i++) {</div><div class='add'>+		engine = idxd-&gt;engines[i];</div><div class='add'>+		conf_dev = engine_confdev(engine);</div><div class='add'>+		put_device(conf_dev);</div><div class='add'>+		kfree(engine);</div><div class='add'>+	}</div><div class='add'>+	kfree(idxd-&gt;engines);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int idxd_setup_engines(struct idxd_device *idxd)</div><div class='ctx'> {</div><div class='ctx'> 	struct idxd_engine *engine;</div><div class='hunk'>@@ -263,6 +309,7 @@ static int idxd_setup_engines(struct idxd_device *idxd)</div><div class='ctx'> 		rc = dev_set_name(conf_dev, "engine%d.%d", idxd-&gt;id, engine-&gt;id);</div><div class='ctx'> 		if (rc &lt; 0) {</div><div class='ctx'> 			put_device(conf_dev);</div><div class='add'>+			kfree(engine);</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -276,10 +323,26 @@ static int idxd_setup_engines(struct idxd_device *idxd)</div><div class='ctx'> 		engine = idxd-&gt;engines[i];</div><div class='ctx'> 		conf_dev = engine_confdev(engine);</div><div class='ctx'> 		put_device(conf_dev);</div><div class='add'>+		kfree(engine);</div><div class='ctx'> 	}</div><div class='add'>+	kfree(idxd-&gt;engines);</div><div class='add'>+</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void idxd_clean_groups(struct idxd_device *idxd)</div><div class='add'>+{</div><div class='add'>+	struct idxd_group *group;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; idxd-&gt;max_groups; i++) {</div><div class='add'>+		group = idxd-&gt;groups[i];</div><div class='add'>+		put_device(group_confdev(group));</div><div class='add'>+		kfree(group);</div><div class='add'>+	}</div><div class='add'>+	kfree(idxd-&gt;groups);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int idxd_setup_groups(struct idxd_device *idxd)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;idxd-&gt;pdev-&gt;dev;</div><div class='hunk'>@@ -310,6 +373,7 @@ static int idxd_setup_groups(struct idxd_device *idxd)</div><div class='ctx'> 		rc = dev_set_name(conf_dev, "group%d.%d", idxd-&gt;id, group-&gt;id);</div><div class='ctx'> 		if (rc &lt; 0) {</div><div class='ctx'> 			put_device(conf_dev);</div><div class='add'>+			kfree(group);</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -334,20 +398,18 @@ static int idxd_setup_groups(struct idxd_device *idxd)</div><div class='ctx'> 	while (--i &gt;= 0) {</div><div class='ctx'> 		group = idxd-&gt;groups[i];</div><div class='ctx'> 		put_device(group_confdev(group));</div><div class='add'>+		kfree(group);</div><div class='ctx'> 	}</div><div class='add'>+	kfree(idxd-&gt;groups);</div><div class='add'>+</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void idxd_cleanup_internals(struct idxd_device *idxd)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; idxd-&gt;max_groups; i++)</div><div class='del'>-		put_device(group_confdev(idxd-&gt;groups[i]));</div><div class='del'>-	for (i = 0; i &lt; idxd-&gt;max_engines; i++)</div><div class='del'>-		put_device(engine_confdev(idxd-&gt;engines[i]));</div><div class='del'>-	for (i = 0; i &lt; idxd-&gt;max_wqs; i++)</div><div class='del'>-		put_device(wq_confdev(idxd-&gt;wqs[i]));</div><div class='add'>+	idxd_clean_groups(idxd);</div><div class='add'>+	idxd_clean_engines(idxd);</div><div class='add'>+	idxd_clean_wqs(idxd);</div><div class='ctx'> 	destroy_workqueue(idxd-&gt;wq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -390,7 +452,7 @@ static int idxd_init_evl(struct idxd_device *idxd)</div><div class='ctx'> static int idxd_setup_internals(struct idxd_device *idxd)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;idxd-&gt;pdev-&gt;dev;</div><div class='del'>-	int rc, i;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;idxd-&gt;cmd_waitq);</div><div class='ctx'> </div><div class='hunk'>@@ -421,14 +483,11 @@ static int idxd_setup_internals(struct idxd_device *idxd)</div><div class='ctx'>  err_evl:</div><div class='ctx'> 	destroy_workqueue(idxd-&gt;wq);</div><div class='ctx'>  err_wkq_create:</div><div class='del'>-	for (i = 0; i &lt; idxd-&gt;max_groups; i++)</div><div class='del'>-		put_device(group_confdev(idxd-&gt;groups[i]));</div><div class='add'>+	idxd_clean_groups(idxd);</div><div class='ctx'>  err_group:</div><div class='del'>-	for (i = 0; i &lt; idxd-&gt;max_engines; i++)</div><div class='del'>-		put_device(engine_confdev(idxd-&gt;engines[i]));</div><div class='add'>+	idxd_clean_engines(idxd);</div><div class='ctx'>  err_engine:</div><div class='del'>-	for (i = 0; i &lt; idxd-&gt;max_wqs; i++)</div><div class='del'>-		put_device(wq_confdev(idxd-&gt;wqs[i]));</div><div class='add'>+	idxd_clean_wqs(idxd);</div><div class='ctx'>  err_wqs:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -528,6 +587,17 @@ static void idxd_read_caps(struct idxd_device *idxd)</div><div class='ctx'> 		idxd-&gt;hw.iaa_cap.bits = ioread64(idxd-&gt;reg_base + IDXD_IAACAP_OFFSET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void idxd_free(struct idxd_device *idxd)</div><div class='add'>+{</div><div class='add'>+	if (!idxd)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	put_device(idxd_confdev(idxd));</div><div class='add'>+	bitmap_free(idxd-&gt;opcap_bmap);</div><div class='add'>+	ida_free(&amp;idxd_ida, idxd-&gt;id);</div><div class='add'>+	kfree(idxd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct idxd_device *idxd_alloc(struct pci_dev *pdev, struct idxd_driver_data *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -545,28 +615,34 @@ static struct idxd_device *idxd_alloc(struct pci_dev *pdev, struct idxd_driver_d</div><div class='ctx'> 	idxd_dev_set_type(&amp;idxd-&gt;idxd_dev, idxd-&gt;data-&gt;type);</div><div class='ctx'> 	idxd-&gt;id = ida_alloc(&amp;idxd_ida, GFP_KERNEL);</div><div class='ctx'> 	if (idxd-&gt;id &lt; 0)</div><div class='del'>-		return NULL;</div><div class='add'>+		goto err_ida;</div><div class='ctx'> </div><div class='ctx'> 	idxd-&gt;opcap_bmap = bitmap_zalloc_node(IDXD_MAX_OPCAP_BITS, GFP_KERNEL, dev_to_node(dev));</div><div class='del'>-	if (!idxd-&gt;opcap_bmap) {</div><div class='del'>-		ida_free(&amp;idxd_ida, idxd-&gt;id);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='add'>+	if (!idxd-&gt;opcap_bmap)</div><div class='add'>+		goto err_opcap;</div><div class='ctx'> </div><div class='ctx'> 	device_initialize(conf_dev);</div><div class='ctx'> 	conf_dev-&gt;parent = dev;</div><div class='ctx'> 	conf_dev-&gt;bus = &amp;dsa_bus_type;</div><div class='ctx'> 	conf_dev-&gt;type = idxd-&gt;data-&gt;dev_type;</div><div class='ctx'> 	rc = dev_set_name(conf_dev, "%s%d", idxd-&gt;data-&gt;name_prefix, idxd-&gt;id);</div><div class='del'>-	if (rc &lt; 0) {</div><div class='del'>-		put_device(conf_dev);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto err_name;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;idxd-&gt;dev_lock);</div><div class='ctx'> 	spin_lock_init(&amp;idxd-&gt;cmd_lock);</div><div class='ctx'> </div><div class='ctx'> 	return idxd;</div><div class='add'>+</div><div class='add'>+err_name:</div><div class='add'>+	put_device(conf_dev);</div><div class='add'>+	bitmap_free(idxd-&gt;opcap_bmap);</div><div class='add'>+err_opcap:</div><div class='add'>+	ida_free(&amp;idxd_ida, idxd-&gt;id);</div><div class='add'>+err_ida:</div><div class='add'>+	kfree(idxd);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int idxd_enable_system_pasid(struct idxd_device *idxd)</div><div class='hunk'>@@ -1190,7 +1266,7 @@ int idxd_pci_probe_alloc(struct idxd_device *idxd, struct pci_dev *pdev,</div><div class='ctx'>  err:</div><div class='ctx'> 	pci_iounmap(pdev, idxd-&gt;reg_base);</div><div class='ctx'>  err_iomap:</div><div class='del'>-	put_device(idxd_confdev(idxd));</div><div class='add'>+	idxd_free(idxd);</div><div class='ctx'>  err_idxd_alloc:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -1232,7 +1308,6 @@ static void idxd_shutdown(struct pci_dev *pdev)</div><div class='ctx'> static void idxd_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct idxd_device *idxd = pci_get_drvdata(pdev);</div><div class='del'>-	struct idxd_irq_entry *irq_entry;</div><div class='ctx'> </div><div class='ctx'> 	idxd_unregister_devices(idxd);</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1245,20 +1320,12 @@ static void idxd_remove(struct pci_dev *pdev)</div><div class='ctx'> 	get_device(idxd_confdev(idxd));</div><div class='ctx'> 	device_unregister(idxd_confdev(idxd));</div><div class='ctx'> 	idxd_shutdown(pdev);</div><div class='del'>-	if (device_pasid_enabled(idxd))</div><div class='del'>-		idxd_disable_system_pasid(idxd);</div><div class='ctx'> 	idxd_device_remove_debugfs(idxd);</div><div class='del'>-</div><div class='del'>-	irq_entry = idxd_get_ie(idxd, 0);</div><div class='del'>-	free_irq(irq_entry-&gt;vector, irq_entry);</div><div class='del'>-	pci_free_irq_vectors(pdev);</div><div class='add'>+	idxd_cleanup(idxd);</div><div class='ctx'> 	pci_iounmap(pdev, idxd-&gt;reg_base);</div><div class='del'>-	if (device_user_pasid_enabled(idxd))</div><div class='del'>-		idxd_disable_sva(pdev);</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	destroy_workqueue(idxd-&gt;wq);</div><div class='del'>-	perfmon_pmu_remove(idxd);</div><div class='ctx'> 	put_device(idxd_confdev(idxd));</div><div class='add'>+	idxd_free(idxd);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver idxd_pci_driver = {</div><div class='head'>diff --git a/drivers/dma/ioat/dca.c b/drivers/dma/ioat/dca.c<br/>index c9aba2304de7..5d3c0ae6b342 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/ioat/dca.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/ioat/dca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/ioat/dca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/ioat/dca.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/dca.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/cpuid.h&gt;</div><div class='add'>+#include &lt;asm/cpuid/api.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* either a kernel change is needed, or we need something like this in kernel */</div><div class='ctx'> #ifndef CONFIG_SMP</div><div class='head'>diff --git a/drivers/dma/mediatek/mtk-cqdma.c b/drivers/dma/mediatek/mtk-cqdma.c<br/>index d5ddb4e30e71..47c8adfdc155 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/mediatek/mtk-cqdma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/mediatek/mtk-cqdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/mediatek/mtk-cqdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/mediatek/mtk-cqdma.c</a></div><div class='hunk'>@@ -420,15 +420,11 @@ static struct virt_dma_desc *mtk_cqdma_find_active_desc(struct dma_chan *c,</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_cqdma_vchan *cvc = to_cqdma_vchan(c);</div><div class='ctx'> 	struct virt_dma_desc *vd;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;cvc-&gt;pc-&gt;lock, flags);</div><div class='ctx'> 	list_for_each_entry(vd, &amp;cvc-&gt;pc-&gt;queue, node)</div><div class='ctx'> 		if (vd-&gt;tx.cookie == cookie) {</div><div class='del'>-			spin_unlock_irqrestore(&amp;cvc-&gt;pc-&gt;lock, flags);</div><div class='ctx'> 			return vd;</div><div class='ctx'> 		}</div><div class='del'>-	spin_unlock_irqrestore(&amp;cvc-&gt;pc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(vd, &amp;cvc-&gt;vc.desc_issued, node)</div><div class='ctx'> 		if (vd-&gt;tx.cookie == cookie)</div><div class='hunk'>@@ -452,9 +448,11 @@ static enum dma_status mtk_cqdma_tx_status(struct dma_chan *c,</div><div class='ctx'> 	if (ret == DMA_COMPLETE || !txstate)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;cvc-&gt;pc-&gt;lock, flags);</div><div class='ctx'> 	spin_lock_irqsave(&amp;cvc-&gt;vc.lock, flags);</div><div class='ctx'> 	vd = mtk_cqdma_find_active_desc(c, cookie);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cvc-&gt;vc.lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;cvc-&gt;pc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (vd) {</div><div class='ctx'> 		cvd = to_cqdma_vdesc(vd);</div><div class='head'>diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c<br/>index b223a7aacb0c..b6255c0601bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/dma/ti/k3-udma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/dma/ti/k3-udma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/dma/ti/k3-udma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/dma/ti/k3-udma.c</a></div><div class='hunk'>@@ -1091,8 +1091,11 @@ static void udma_check_tx_completion(struct work_struct *work)</div><div class='ctx'> 	u32 residue_diff;</div><div class='ctx'> 	ktime_t time_diff;</div><div class='ctx'> 	unsigned long delay;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='add'>+		spin_lock_irqsave(&amp;uc-&gt;vc.lock, flags);</div><div class='add'>+</div><div class='ctx'> 		if (uc-&gt;desc) {</div><div class='ctx'> 			/* Get previous residue and time stamp */</div><div class='ctx'> 			residue_diff = uc-&gt;tx_drain.residue;</div><div class='hunk'>@@ -1127,6 +1130,8 @@ static void udma_check_tx_completion(struct work_struct *work)</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			spin_unlock_irqrestore(&amp;uc-&gt;vc.lock, flags);</div><div class='add'>+</div><div class='ctx'> 			usleep_range(ktime_to_us(delay),</div><div class='ctx'> 				     ktime_to_us(delay) + 10);</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1143,6 +1148,8 @@ static void udma_check_tx_completion(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;uc-&gt;vc.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t udma_ring_irq_handler(int irq, void *data)</div><div class='hunk'>@@ -4246,7 +4253,6 @@ static struct dma_chan *udma_of_xlate(struct of_phandle_args *dma_spec,</div><div class='ctx'> 				      struct of_dma *ofdma)</div><div class='ctx'> {</div><div class='ctx'> 	struct udma_dev *ud = ofdma-&gt;of_dma_data;</div><div class='del'>-	dma_cap_mask_t mask = ud-&gt;ddev.cap_mask;</div><div class='ctx'> 	struct udma_filter_param filter_param;</div><div class='ctx'> 	struct dma_chan *chan;</div><div class='ctx'> </div><div class='hunk'>@@ -4278,7 +4284,7 @@ static struct dma_chan *udma_of_xlate(struct of_phandle_args *dma_spec,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	chan = __dma_request_channel(&amp;mask, udma_dma_filter_fn, &amp;filter_param,</div><div class='add'>+	chan = __dma_request_channel(&amp;ud-&gt;ddev.cap_mask, udma_dma_filter_fn, &amp;filter_param,</div><div class='ctx'> 				     ofdma-&gt;of_node);</div><div class='ctx'> 	if (!chan) {</div><div class='ctx'> 		dev_err(ud-&gt;dev, "get channel fail in %s.\n", __func__);</div><div class='head'>diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c<br/>index 3e971f902363..20333608b983 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/altera_edac.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/altera_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/altera_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/altera_edac.c</a></div><div class='hunk'>@@ -99,7 +99,7 @@ static irqreturn_t altr_sdram_mc_err_handler(int irq, void *dev_id)</div><div class='ctx'> 	if (status &amp; priv-&gt;ecc_stat_ce_mask) {</div><div class='ctx'> 		regmap_read(drvdata-&gt;mc_vbase, priv-&gt;ecc_saddr_offset,</div><div class='ctx'> 			    &amp;err_addr);</div><div class='del'>-		if (priv-&gt;ecc_uecnt_offset)</div><div class='add'>+		if (priv-&gt;ecc_cecnt_offset)</div><div class='ctx'> 			regmap_read(drvdata-&gt;mc_vbase,  priv-&gt;ecc_cecnt_offset,</div><div class='ctx'> 				    &amp;err_count);</div><div class='ctx'> 		edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, err_count,</div><div class='hunk'>@@ -1005,9 +1005,6 @@ altr_init_a10_ecc_block(struct device_node *np, u32 irq_mask,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Interrupt mode set to every SBERR */</div><div class='del'>-	regmap_write(ecc_mgr_map, ALTR_A10_ECC_INTMODE_OFST,</div><div class='del'>-		     ALTR_A10_ECC_INTMODE);</div><div class='ctx'> 	/* Enable ECC */</div><div class='ctx'> 	ecc_set_bits(ecc_ctrl_en_mask, (ecc_block_base +</div><div class='ctx'> 					ALTR_A10_ECC_CTRL_OFST));</div><div class='hunk'>@@ -2127,11 +2124,15 @@ static int altr_edac_a10_probe(struct platform_device *pdev)</div><div class='ctx'> 		return PTR_ERR(edac-&gt;ecc_mgr_map);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Set irq mask for DDR SBE to avoid any pending irq before registration */</div><div class='add'>+	regmap_write(edac-&gt;ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_SET_OFST,</div><div class='add'>+		     (A10_SYSMGR_ECC_INTMASK_SDMMCB | A10_SYSMGR_ECC_INTMASK_DDR0));</div><div class='add'>+</div><div class='ctx'> 	edac-&gt;irq_chip.name = pdev-&gt;dev.of_node-&gt;name;</div><div class='ctx'> 	edac-&gt;irq_chip.irq_mask = a10_eccmgr_irq_mask;</div><div class='ctx'> 	edac-&gt;irq_chip.irq_unmask = a10_eccmgr_irq_unmask;</div><div class='del'>-	edac-&gt;domain = irq_domain_add_linear(pdev-&gt;dev.of_node, 64,</div><div class='del'>-					     &amp;a10_eccmgr_ic_ops, edac);</div><div class='add'>+	edac-&gt;domain = irq_domain_create_linear(of_fwnode_handle(pdev-&gt;dev.of_node),</div><div class='add'>+						64, &amp;a10_eccmgr_ic_ops, edac);</div><div class='ctx'> 	if (!edac-&gt;domain) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Error adding IRQ domain\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h<br/>index 3727e72c8c2e..7248d24c4908 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/altera_edac.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/altera_edac.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/altera_edac.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/altera_edac.h</a></div><div class='hunk'>@@ -249,6 +249,8 @@ struct altr_sdram_mc_data {</div><div class='ctx'> #define A10_SYSMGR_ECC_INTMASK_SET_OFST   0x94</div><div class='ctx'> #define A10_SYSMGR_ECC_INTMASK_CLR_OFST   0x98</div><div class='ctx'> #define A10_SYSMGR_ECC_INTMASK_OCRAM      BIT(1)</div><div class='add'>+#define A10_SYSMGR_ECC_INTMASK_SDMMCB     BIT(16)</div><div class='add'>+#define A10_SYSMGR_ECC_INTMASK_DDR0       BIT(17)</div><div class='ctx'> </div><div class='ctx'> #define A10_SYSMGR_ECC_INTSTAT_SERR_OFST  0x9C</div><div class='ctx'> #define A10_SYSMGR_ECC_INTSTAT_DERR_OFST  0xA0</div><div class='head'>diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c<br/>index 90f0eb7cc5b9..58b1482a0fbb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/amd64_edac.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/amd64_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/amd64_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/amd64_edac.c</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> #include &lt;linux/ras.h&gt;</div><div class='ctx'> #include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include "amd64_edac.h"</div><div class='del'>-#include &lt;asm/amd_nb.h&gt;</div><div class='del'>-#include &lt;asm/amd_node.h&gt;</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='add'>+#include &lt;asm/amd/node.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct edac_pci_ctl_info *pci_ctl;</div><div class='ctx'> </div><div class='hunk'>@@ -2942,13 +2942,13 @@ static void dct_read_mc_regs(struct amd64_pvt *pvt)</div><div class='ctx'> 	 * Retrieve TOP_MEM and TOP_MEM2; no masking off of reserved bits since</div><div class='ctx'> 	 * those are Read-As-Zero.</div><div class='ctx'> 	 */</div><div class='del'>-	rdmsrl(MSR_K8_TOP_MEM1, pvt-&gt;top_mem);</div><div class='add'>+	rdmsrq(MSR_K8_TOP_MEM1, pvt-&gt;top_mem);</div><div class='ctx'> 	edac_dbg(0, "  TOP_MEM:  0x%016llx\n", pvt-&gt;top_mem);</div><div class='ctx'> </div><div class='ctx'> 	/* Check first whether TOP_MEM2 is enabled: */</div><div class='del'>-	rdmsrl(MSR_AMD64_SYSCFG, msr_val);</div><div class='add'>+	rdmsrq(MSR_AMD64_SYSCFG, msr_val);</div><div class='ctx'> 	if (msr_val &amp; BIT(21)) {</div><div class='del'>-		rdmsrl(MSR_K8_TOP_MEM2, pvt-&gt;top_mem2);</div><div class='add'>+		rdmsrq(MSR_K8_TOP_MEM2, pvt-&gt;top_mem2);</div><div class='ctx'> 		edac_dbg(0, "  TOP_MEM2: 0x%016llx\n", pvt-&gt;top_mem2);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		edac_dbg(0, "  TOP_MEM2 disabled\n");</div><div class='head'>diff --git a/drivers/edac/bluefield_edac.c b/drivers/edac/bluefield_edac.c<br/>index 4942a240c30f..ae3bb7afa103 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/bluefield_edac.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/bluefield_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/bluefield_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/bluefield_edac.c</a></div><div class='hunk'>@@ -199,8 +199,10 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci,</div><div class='ctx'> 	 * error without the detailed information.</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = bluefield_edac_readl(priv, MLXBF_SYNDROM, &amp;dram_syndrom);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "DRAM syndrom read failed.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	serr = FIELD_GET(MLXBF_SYNDROM__SERR, dram_syndrom);</div><div class='ctx'> 	derr = FIELD_GET(MLXBF_SYNDROM__DERR, dram_syndrom);</div><div class='hunk'>@@ -213,20 +215,26 @@ static void bluefield_gather_report_ecc(struct mem_ctl_info *mci,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = bluefield_edac_readl(priv, MLXBF_ADD_INFO, &amp;dram_additional_info);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "DRAM additional info read failed.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err_prank = FIELD_GET(MLXBF_ADD_INFO__ERR_PRANK, dram_additional_info);</div><div class='ctx'> </div><div class='ctx'> 	ecc_dimm = (err_prank &gt;= 2 &amp;&amp; priv-&gt;dimm_ranks[0] &lt;= 2) ? 1 : 0;</div><div class='ctx'> </div><div class='ctx'> 	err = bluefield_edac_readl(priv, MLXBF_ERR_ADDR_0, &amp;edea0);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "Error addr 0 read failed.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = bluefield_edac_readl(priv, MLXBF_ERR_ADDR_1, &amp;edea1);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "Error addr 1 read failed.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ecc_dimm_addr = ((u64)edea1 &lt;&lt; 32) | edea0;</div><div class='ctx'> </div><div class='hunk'>@@ -250,8 +258,10 @@ static void bluefield_edac_check(struct mem_ctl_info *mci)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	err = bluefield_edac_readl(priv, MLXBF_ECC_CNT, &amp;ecc_count);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "ECC count read failed.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	single_error_count = FIELD_GET(MLXBF_ECC_CNT__SERR_CNT, ecc_count);</div><div class='ctx'> 	double_error_count = FIELD_GET(MLXBF_ECC_CNT__DERR_CNT, ecc_count);</div><div class='head'>diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c<br/>index 355a977019e9..a3fca2567752 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/i10nm_base.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/i10nm_base.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/i10nm_base.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/i10nm_base.c</a></div><div class='hunk'>@@ -72,12 +72,6 @@</div><div class='ctx'> #define I10NM_SAD_ENABLE(reg)		GET_BITFIELD(reg, 0, 0)</div><div class='ctx'> #define I10NM_SAD_NM_CACHEABLE(reg)	GET_BITFIELD(reg, 5, 5)</div><div class='ctx'> </div><div class='del'>-#define RETRY_RD_ERR_LOG_UC		BIT(1)</div><div class='del'>-#define RETRY_RD_ERR_LOG_NOOVER		BIT(14)</div><div class='del'>-#define RETRY_RD_ERR_LOG_EN		BIT(15)</div><div class='del'>-#define RETRY_RD_ERR_LOG_NOOVER_UC	(BIT(14) | BIT(1))</div><div class='del'>-#define RETRY_RD_ERR_LOG_OVER_UC_V	(BIT(2) | BIT(1) | BIT(0))</div><div class='del'>-</div><div class='ctx'> static struct list_head *i10nm_edac_list;</div><div class='ctx'> </div><div class='ctx'> static struct res_config *res_cfg;</div><div class='hunk'>@@ -85,227 +79,319 @@ static int retry_rd_err_log;</div><div class='ctx'> static int decoding_via_mca;</div><div class='ctx'> static bool mem_cfg_2lm;</div><div class='ctx'> </div><div class='del'>-static u32 offsets_scrub_icx[]  = {0x22c60, 0x22c54, 0x22c5c, 0x22c58, 0x22c28, 0x20ed8};</div><div class='del'>-static u32 offsets_scrub_spr[]  = {0x22c60, 0x22c54, 0x22f08, 0x22c58, 0x22c28, 0x20ed8};</div><div class='del'>-static u32 offsets_scrub_spr_hbm0[]  = {0x2860, 0x2854, 0x2b08, 0x2858, 0x2828, 0x0ed8};</div><div class='del'>-static u32 offsets_scrub_spr_hbm1[]  = {0x2c60, 0x2c54, 0x2f08, 0x2c58, 0x2c28, 0x0fa8};</div><div class='del'>-static u32 offsets_demand_icx[] = {0x22e54, 0x22e60, 0x22e64, 0x22e58, 0x22e5c, 0x20ee0};</div><div class='del'>-static u32 offsets_demand_spr[] = {0x22e54, 0x22e60, 0x22f10, 0x22e58, 0x22e5c, 0x20ee0};</div><div class='del'>-static u32 offsets_demand2_spr[] = {0x22c70, 0x22d80, 0x22f18, 0x22d58, 0x22c64, 0x20f10};</div><div class='del'>-static u32 offsets_demand_spr_hbm0[] = {0x2a54, 0x2a60, 0x2b10, 0x2a58, 0x2a5c, 0x0ee0};</div><div class='del'>-static u32 offsets_demand_spr_hbm1[] = {0x2e54, 0x2e60, 0x2f10, 0x2e58, 0x2e5c, 0x0fb0};</div><div class='del'>-</div><div class='del'>-static void __enable_retry_rd_err_log(struct skx_imc *imc, int chan, bool enable,</div><div class='del'>-				      u32 *offsets_scrub, u32 *offsets_demand,</div><div class='del'>-				      u32 *offsets_demand2)</div><div class='add'>+static struct reg_rrl icx_reg_rrl_ddr = {</div><div class='add'>+	.set_num = 2,</div><div class='add'>+	.reg_num = 6,</div><div class='add'>+	.modes = {LRE_SCRUB, LRE_DEMAND},</div><div class='add'>+	.offsets = {</div><div class='add'>+		{0x22c60, 0x22c54, 0x22c5c, 0x22c58, 0x22c28, 0x20ed8},</div><div class='add'>+		{0x22e54, 0x22e60, 0x22e64, 0x22e58, 0x22e5c, 0x20ee0},</div><div class='add'>+	},</div><div class='add'>+	.widths		= {4, 4, 4, 4, 4, 8},</div><div class='add'>+	.v_mask		= BIT(0),</div><div class='add'>+	.uc_mask	= BIT(1),</div><div class='add'>+	.over_mask	= BIT(2),</div><div class='add'>+	.en_patspr_mask	= BIT(13),</div><div class='add'>+	.noover_mask	= BIT(14),</div><div class='add'>+	.en_mask	= BIT(15),</div><div class='add'>+</div><div class='add'>+	.cecnt_num	= 4,</div><div class='add'>+	.cecnt_offsets	= {0x22c18, 0x22c1c, 0x22c20, 0x22c24},</div><div class='add'>+	.cecnt_widths	= {4, 4, 4, 4},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct reg_rrl spr_reg_rrl_ddr = {</div><div class='add'>+	.set_num = 3,</div><div class='add'>+	.reg_num = 6,</div><div class='add'>+	.modes = {LRE_SCRUB, LRE_DEMAND, FRE_DEMAND},</div><div class='add'>+	.offsets = {</div><div class='add'>+		{0x22c60, 0x22c54, 0x22f08, 0x22c58, 0x22c28, 0x20ed8},</div><div class='add'>+		{0x22e54, 0x22e60, 0x22f10, 0x22e58, 0x22e5c, 0x20ee0},</div><div class='add'>+		{0x22c70, 0x22d80, 0x22f18, 0x22d58, 0x22c64, 0x20f10},</div><div class='add'>+	},</div><div class='add'>+	.widths		= {4, 4, 8, 4, 4, 8},</div><div class='add'>+	.v_mask		= BIT(0),</div><div class='add'>+	.uc_mask	= BIT(1),</div><div class='add'>+	.over_mask	= BIT(2),</div><div class='add'>+	.en_patspr_mask	= BIT(13),</div><div class='add'>+	.noover_mask	= BIT(14),</div><div class='add'>+	.en_mask	= BIT(15),</div><div class='add'>+</div><div class='add'>+	.cecnt_num	= 4,</div><div class='add'>+	.cecnt_offsets	= {0x22c18, 0x22c1c, 0x22c20, 0x22c24},</div><div class='add'>+	.cecnt_widths	= {4, 4, 4, 4},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct reg_rrl spr_reg_rrl_hbm_pch0 = {</div><div class='add'>+	.set_num = 2,</div><div class='add'>+	.reg_num = 6,</div><div class='add'>+	.modes = {LRE_SCRUB, LRE_DEMAND},</div><div class='add'>+	.offsets = {</div><div class='add'>+		{0x2860, 0x2854, 0x2b08, 0x2858, 0x2828, 0x0ed8},</div><div class='add'>+		{0x2a54, 0x2a60, 0x2b10, 0x2a58, 0x2a5c, 0x0ee0},</div><div class='add'>+	},</div><div class='add'>+	.widths		= {4, 4, 8, 4, 4, 8},</div><div class='add'>+	.v_mask		= BIT(0),</div><div class='add'>+	.uc_mask	= BIT(1),</div><div class='add'>+	.over_mask	= BIT(2),</div><div class='add'>+	.en_patspr_mask	= BIT(13),</div><div class='add'>+	.noover_mask	= BIT(14),</div><div class='add'>+	.en_mask	= BIT(15),</div><div class='add'>+</div><div class='add'>+	.cecnt_num	= 4,</div><div class='add'>+	.cecnt_offsets	= {0x2818, 0x281c, 0x2820, 0x2824},</div><div class='add'>+	.cecnt_widths	= {4, 4, 4, 4},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct reg_rrl spr_reg_rrl_hbm_pch1 = {</div><div class='add'>+	.set_num = 2,</div><div class='add'>+	.reg_num = 6,</div><div class='add'>+	.modes = {LRE_SCRUB, LRE_DEMAND},</div><div class='add'>+	.offsets = {</div><div class='add'>+		{0x2c60, 0x2c54, 0x2f08, 0x2c58, 0x2c28, 0x0fa8},</div><div class='add'>+		{0x2e54, 0x2e60, 0x2f10, 0x2e58, 0x2e5c, 0x0fb0},</div><div class='add'>+	},</div><div class='add'>+	.widths		= {4, 4, 8, 4, 4, 8},</div><div class='add'>+	.v_mask		= BIT(0),</div><div class='add'>+	.uc_mask	= BIT(1),</div><div class='add'>+	.over_mask	= BIT(2),</div><div class='add'>+	.en_patspr_mask	= BIT(13),</div><div class='add'>+	.noover_mask	= BIT(14),</div><div class='add'>+	.en_mask	= BIT(15),</div><div class='add'>+</div><div class='add'>+	.cecnt_num	= 4,</div><div class='add'>+	.cecnt_offsets	= {0x2c18, 0x2c1c, 0x2c20, 0x2c24},</div><div class='add'>+	.cecnt_widths	= {4, 4, 4, 4},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct reg_rrl gnr_reg_rrl_ddr = {</div><div class='add'>+	.set_num = 4,</div><div class='add'>+	.reg_num = 6,</div><div class='add'>+	.modes = {FRE_SCRUB, FRE_DEMAND, LRE_SCRUB, LRE_DEMAND},</div><div class='add'>+	.offsets = {</div><div class='add'>+		{0x2f10, 0x2f20, 0x2f30, 0x2f50, 0x2f60, 0xba0},</div><div class='add'>+		{0x2f14, 0x2f24, 0x2f38, 0x2f54, 0x2f64, 0xba8},</div><div class='add'>+		{0x2f18, 0x2f28, 0x2f40, 0x2f58, 0x2f68, 0xbb0},</div><div class='add'>+		{0x2f1c, 0x2f2c, 0x2f48, 0x2f5c, 0x2f6c, 0xbb8},</div><div class='add'>+	},</div><div class='add'>+	.widths		= {4, 4, 8, 4, 4, 8},</div><div class='add'>+	.v_mask		= BIT(0),</div><div class='add'>+	.uc_mask	= BIT(1),</div><div class='add'>+	.over_mask	= BIT(2),</div><div class='add'>+	.en_patspr_mask	= BIT(14),</div><div class='add'>+	.noover_mask	= BIT(15),</div><div class='add'>+	.en_mask	= BIT(12),</div><div class='add'>+</div><div class='add'>+	.cecnt_num	= 8,</div><div class='add'>+	.cecnt_offsets	= {0x2c10, 0x2c14, 0x2c18, 0x2c1c, 0x2c20, 0x2c24, 0x2c28, 0x2c2c},</div><div class='add'>+	.cecnt_widths	= {4, 4, 4, 4, 4, 4, 4, 4},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u64 read_imc_reg(struct skx_imc *imc, int chan, u32 offset, u8 width)</div><div class='ctx'> {</div><div class='del'>-	u32 s, d, d2;</div><div class='add'>+	switch (width) {</div><div class='add'>+	case 4:</div><div class='add'>+		return I10NM_GET_REG32(imc, chan, offset);</div><div class='add'>+	case 8:</div><div class='add'>+		return I10NM_GET_REG64(imc, chan, offset);</div><div class='add'>+	default:</div><div class='add'>+		i10nm_printk(KERN_ERR, "Invalid readd RRL 0x%x width %d\n", offset, width);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_imc_reg(struct skx_imc *imc, int chan, u32 offset, u8 width, u64 val)</div><div class='add'>+{</div><div class='add'>+	switch (width) {</div><div class='add'>+	case 4:</div><div class='add'>+		return I10NM_SET_REG32(imc, chan, offset, (u32)val);</div><div class='add'>+	default:</div><div class='add'>+		i10nm_printk(KERN_ERR, "Invalid write RRL 0x%x width %d\n", offset, width);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	s = I10NM_GET_REG32(imc, chan, offsets_scrub[0]);</div><div class='del'>-	d = I10NM_GET_REG32(imc, chan, offsets_demand[0]);</div><div class='del'>-	if (offsets_demand2)</div><div class='del'>-		d2 = I10NM_GET_REG32(imc, chan, offsets_demand2[0]);</div><div class='add'>+static void enable_rrl(struct skx_imc *imc, int chan, struct reg_rrl *rrl,</div><div class='add'>+		       int rrl_set, bool enable, u32 *rrl_ctl)</div><div class='add'>+{</div><div class='add'>+	enum rrl_mode mode = rrl-&gt;modes[rrl_set];</div><div class='add'>+	u32 offset = rrl-&gt;offsets[rrl_set][0], v;</div><div class='add'>+	u8 width = rrl-&gt;widths[0];</div><div class='add'>+	bool first, scrub;</div><div class='add'>+</div><div class='add'>+	/* First or last read error. */</div><div class='add'>+	first = (mode == FRE_SCRUB || mode == FRE_DEMAND);</div><div class='add'>+	/* Patrol scrub or on-demand read error. */</div><div class='add'>+	scrub = (mode == FRE_SCRUB || mode == LRE_SCRUB);</div><div class='add'>+</div><div class='add'>+	v = read_imc_reg(imc, chan, offset, width);</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='del'>-		/* Save default configurations */</div><div class='del'>-		imc-&gt;chan[chan].retry_rd_err_log_s = s;</div><div class='del'>-		imc-&gt;chan[chan].retry_rd_err_log_d = d;</div><div class='del'>-		if (offsets_demand2)</div><div class='del'>-			imc-&gt;chan[chan].retry_rd_err_log_d2 = d2;</div><div class='del'>-</div><div class='del'>-		s &amp;= ~RETRY_RD_ERR_LOG_NOOVER_UC;</div><div class='del'>-		s |=  RETRY_RD_ERR_LOG_EN;</div><div class='del'>-		d &amp;= ~RETRY_RD_ERR_LOG_NOOVER_UC;</div><div class='del'>-		d |=  RETRY_RD_ERR_LOG_EN;</div><div class='del'>-</div><div class='del'>-		if (offsets_demand2) {</div><div class='del'>-			d2 &amp;= ~RETRY_RD_ERR_LOG_UC;</div><div class='del'>-			d2 |=  RETRY_RD_ERR_LOG_NOOVER;</div><div class='del'>-			d2 |=  RETRY_RD_ERR_LOG_EN;</div><div class='del'>-		}</div><div class='add'>+		/* Save default configurations. */</div><div class='add'>+		*rrl_ctl = v;</div><div class='add'>+		v &amp;= ~rrl-&gt;uc_mask;</div><div class='add'>+</div><div class='add'>+		if (first)</div><div class='add'>+			v |= rrl-&gt;noover_mask;</div><div class='add'>+		else</div><div class='add'>+			v &amp;= ~rrl-&gt;noover_mask;</div><div class='add'>+</div><div class='add'>+		if (scrub)</div><div class='add'>+			v |= rrl-&gt;en_patspr_mask;</div><div class='add'>+		else</div><div class='add'>+			v &amp;= ~rrl-&gt;en_patspr_mask;</div><div class='add'>+</div><div class='add'>+		v |= rrl-&gt;en_mask;</div><div class='ctx'> 	} else {</div><div class='del'>-		/* Restore default configurations */</div><div class='del'>-		if (imc-&gt;chan[chan].retry_rd_err_log_s &amp; RETRY_RD_ERR_LOG_UC)</div><div class='del'>-			s |=  RETRY_RD_ERR_LOG_UC;</div><div class='del'>-		if (imc-&gt;chan[chan].retry_rd_err_log_s &amp; RETRY_RD_ERR_LOG_NOOVER)</div><div class='del'>-			s |=  RETRY_RD_ERR_LOG_NOOVER;</div><div class='del'>-		if (!(imc-&gt;chan[chan].retry_rd_err_log_s &amp; RETRY_RD_ERR_LOG_EN))</div><div class='del'>-			s &amp;= ~RETRY_RD_ERR_LOG_EN;</div><div class='del'>-		if (imc-&gt;chan[chan].retry_rd_err_log_d &amp; RETRY_RD_ERR_LOG_UC)</div><div class='del'>-			d |=  RETRY_RD_ERR_LOG_UC;</div><div class='del'>-		if (imc-&gt;chan[chan].retry_rd_err_log_d &amp; RETRY_RD_ERR_LOG_NOOVER)</div><div class='del'>-			d |=  RETRY_RD_ERR_LOG_NOOVER;</div><div class='del'>-		if (!(imc-&gt;chan[chan].retry_rd_err_log_d &amp; RETRY_RD_ERR_LOG_EN))</div><div class='del'>-			d &amp;= ~RETRY_RD_ERR_LOG_EN;</div><div class='del'>-</div><div class='del'>-		if (offsets_demand2) {</div><div class='del'>-			if (imc-&gt;chan[chan].retry_rd_err_log_d2 &amp; RETRY_RD_ERR_LOG_UC)</div><div class='del'>-				d2 |=  RETRY_RD_ERR_LOG_UC;</div><div class='del'>-			if (!(imc-&gt;chan[chan].retry_rd_err_log_d2 &amp; RETRY_RD_ERR_LOG_NOOVER))</div><div class='del'>-				d2 &amp;=  ~RETRY_RD_ERR_LOG_NOOVER;</div><div class='del'>-			if (!(imc-&gt;chan[chan].retry_rd_err_log_d2 &amp; RETRY_RD_ERR_LOG_EN))</div><div class='del'>-				d2 &amp;= ~RETRY_RD_ERR_LOG_EN;</div><div class='add'>+		/* Restore default configurations. */</div><div class='add'>+		if (*rrl_ctl &amp; rrl-&gt;uc_mask)</div><div class='add'>+			v |= rrl-&gt;uc_mask;</div><div class='add'>+</div><div class='add'>+		if (first) {</div><div class='add'>+			if (!(*rrl_ctl &amp; rrl-&gt;noover_mask))</div><div class='add'>+				v &amp;= ~rrl-&gt;noover_mask;</div><div class='add'>+		} else {</div><div class='add'>+			if (*rrl_ctl &amp; rrl-&gt;noover_mask)</div><div class='add'>+				v |= rrl-&gt;noover_mask;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (scrub) {</div><div class='add'>+			if (!(*rrl_ctl &amp; rrl-&gt;en_patspr_mask))</div><div class='add'>+				v &amp;= ~rrl-&gt;en_patspr_mask;</div><div class='add'>+		} else {</div><div class='add'>+			if (*rrl_ctl &amp; rrl-&gt;en_patspr_mask)</div><div class='add'>+				v |= rrl-&gt;en_patspr_mask;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!(*rrl_ctl &amp; rrl-&gt;en_mask))</div><div class='add'>+			v &amp;= ~rrl-&gt;en_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	I10NM_SET_REG32(imc, chan, offsets_scrub[0], s);</div><div class='del'>-	I10NM_SET_REG32(imc, chan, offsets_demand[0], d);</div><div class='del'>-	if (offsets_demand2)</div><div class='del'>-		I10NM_SET_REG32(imc, chan, offsets_demand2[0], d2);</div><div class='add'>+	write_imc_reg(imc, chan, offset, width, v);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_rrls(struct skx_imc *imc, int chan, struct reg_rrl *rrl,</div><div class='add'>+			bool enable, u32 *rrl_ctl)</div><div class='add'>+{</div><div class='add'>+	for (int i = 0; i &lt; rrl-&gt;set_num; i++)</div><div class='add'>+		enable_rrl(imc, chan, rrl, i, enable, rrl_ctl + i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_rrls_ddr(struct skx_imc *imc, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct reg_rrl *rrl_ddr = res_cfg-&gt;reg_rrl_ddr;</div><div class='add'>+	int i, chan_num = res_cfg-&gt;ddr_chan_num;</div><div class='add'>+	struct skx_channel *chan = imc-&gt;chan;</div><div class='add'>+</div><div class='add'>+	if (!imc-&gt;mbase)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; chan_num; i++)</div><div class='add'>+		enable_rrls(imc, i, rrl_ddr, enable, chan[i].rrl_ctl[0]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enable_rrls_hbm(struct skx_imc *imc, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct reg_rrl **rrl_hbm = res_cfg-&gt;reg_rrl_hbm;</div><div class='add'>+	int i, chan_num = res_cfg-&gt;hbm_chan_num;</div><div class='add'>+	struct skx_channel *chan = imc-&gt;chan;</div><div class='add'>+</div><div class='add'>+	if (!imc-&gt;mbase || !imc-&gt;hbm_mc || !rrl_hbm[0] || !rrl_hbm[1])</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; chan_num; i++) {</div><div class='add'>+		enable_rrls(imc, i, rrl_hbm[0], enable, chan[i].rrl_ctl[0]);</div><div class='add'>+		enable_rrls(imc, i, rrl_hbm[1], enable, chan[i].rrl_ctl[1]);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enable_retry_rd_err_log(bool enable)</div><div class='ctx'> {</div><div class='del'>-	int i, j, imc_num, chan_num;</div><div class='del'>-	struct skx_imc *imc;</div><div class='ctx'> 	struct skx_dev *d;</div><div class='add'>+	int i, imc_num;</div><div class='ctx'> </div><div class='ctx'> 	edac_dbg(2, "\n");</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(d, i10nm_edac_list, list) {</div><div class='ctx'> 		imc_num  = res_cfg-&gt;ddr_imc_num;</div><div class='del'>-		chan_num = res_cfg-&gt;ddr_chan_num;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; imc_num; i++) {</div><div class='del'>-			imc = &amp;d-&gt;imc[i];</div><div class='del'>-			if (!imc-&gt;mbase)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			for (j = 0; j &lt; chan_num; j++)</div><div class='del'>-				__enable_retry_rd_err_log(imc, j, enable,</div><div class='del'>-							  res_cfg-&gt;offsets_scrub,</div><div class='del'>-							  res_cfg-&gt;offsets_demand,</div><div class='del'>-							  res_cfg-&gt;offsets_demand2);</div><div class='del'>-		}</div><div class='add'>+		for (i = 0; i &lt; imc_num; i++)</div><div class='add'>+			enable_rrls_ddr(&amp;d-&gt;imc[i], enable);</div><div class='ctx'> </div><div class='ctx'> 		imc_num += res_cfg-&gt;hbm_imc_num;</div><div class='del'>-		chan_num = res_cfg-&gt;hbm_chan_num;</div><div class='del'>-</div><div class='del'>-		for (; i &lt; imc_num; i++) {</div><div class='del'>-			imc = &amp;d-&gt;imc[i];</div><div class='del'>-			if (!imc-&gt;mbase || !imc-&gt;hbm_mc)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			for (j = 0; j &lt; chan_num; j++) {</div><div class='del'>-				__enable_retry_rd_err_log(imc, j, enable,</div><div class='del'>-							  res_cfg-&gt;offsets_scrub_hbm0,</div><div class='del'>-							  res_cfg-&gt;offsets_demand_hbm0,</div><div class='del'>-							  NULL);</div><div class='del'>-				__enable_retry_rd_err_log(imc, j, enable,</div><div class='del'>-							  res_cfg-&gt;offsets_scrub_hbm1,</div><div class='del'>-							  res_cfg-&gt;offsets_demand_hbm1,</div><div class='del'>-							  NULL);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		for (; i &lt; imc_num; i++)</div><div class='add'>+			enable_rrls_hbm(&amp;d-&gt;imc[i], enable);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void show_retry_rd_err_log(struct decoded_addr *res, char *msg,</div><div class='ctx'> 				  int len, bool scrub_err)</div><div class='ctx'> {</div><div class='add'>+	int i, j, n, ch = res-&gt;channel, pch = res-&gt;cs &amp; 1;</div><div class='ctx'> 	struct skx_imc *imc = &amp;res-&gt;dev-&gt;imc[res-&gt;imc];</div><div class='del'>-	u32 log0, log1, log2, log3, log4;</div><div class='del'>-	u32 corr0, corr1, corr2, corr3;</div><div class='del'>-	u32 lxg0, lxg1, lxg3, lxg4;</div><div class='del'>-	u32 *xffsets = NULL;</div><div class='del'>-	u64 log2a, log5;</div><div class='del'>-	u64 lxg2a, lxg5;</div><div class='del'>-	u32 *offsets;</div><div class='del'>-	int n, pch;</div><div class='add'>+	u64 log, corr, status_mask;</div><div class='add'>+	struct reg_rrl *rrl;</div><div class='add'>+	bool scrub;</div><div class='add'>+	u32 offset;</div><div class='add'>+	u8 width;</div><div class='ctx'> </div><div class='ctx'> 	if (!imc-&gt;mbase)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (imc-&gt;hbm_mc) {</div><div class='del'>-		pch = res-&gt;cs &amp; 1;</div><div class='add'>+	rrl = imc-&gt;hbm_mc ? res_cfg-&gt;reg_rrl_hbm[pch] : res_cfg-&gt;reg_rrl_ddr;</div><div class='ctx'> </div><div class='del'>-		if (pch)</div><div class='del'>-			offsets = scrub_err ? res_cfg-&gt;offsets_scrub_hbm1 :</div><div class='del'>-					      res_cfg-&gt;offsets_demand_hbm1;</div><div class='del'>-		else</div><div class='del'>-			offsets = scrub_err ? res_cfg-&gt;offsets_scrub_hbm0 :</div><div class='del'>-					      res_cfg-&gt;offsets_demand_hbm0;</div><div class='del'>-	} else {</div><div class='del'>-		if (scrub_err) {</div><div class='del'>-			offsets = res_cfg-&gt;offsets_scrub;</div><div class='del'>-		} else {</div><div class='del'>-			offsets = res_cfg-&gt;offsets_demand;</div><div class='del'>-			xffsets = res_cfg-&gt;offsets_demand2;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (!rrl)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	log0 = I10NM_GET_REG32(imc, res-&gt;channel, offsets[0]);</div><div class='del'>-	log1 = I10NM_GET_REG32(imc, res-&gt;channel, offsets[1]);</div><div class='del'>-	log3 = I10NM_GET_REG32(imc, res-&gt;channel, offsets[3]);</div><div class='del'>-	log4 = I10NM_GET_REG32(imc, res-&gt;channel, offsets[4]);</div><div class='del'>-	log5 = I10NM_GET_REG64(imc, res-&gt;channel, offsets[5]);</div><div class='del'>-</div><div class='del'>-	if (xffsets) {</div><div class='del'>-		lxg0 = I10NM_GET_REG32(imc, res-&gt;channel, xffsets[0]);</div><div class='del'>-		lxg1 = I10NM_GET_REG32(imc, res-&gt;channel, xffsets[1]);</div><div class='del'>-		lxg3 = I10NM_GET_REG32(imc, res-&gt;channel, xffsets[3]);</div><div class='del'>-		lxg4 = I10NM_GET_REG32(imc, res-&gt;channel, xffsets[4]);</div><div class='del'>-		lxg5 = I10NM_GET_REG64(imc, res-&gt;channel, xffsets[5]);</div><div class='del'>-	}</div><div class='add'>+	status_mask = rrl-&gt;over_mask | rrl-&gt;uc_mask | rrl-&gt;v_mask;</div><div class='ctx'> </div><div class='del'>-	if (res_cfg-&gt;type == SPR) {</div><div class='del'>-		log2a = I10NM_GET_REG64(imc, res-&gt;channel, offsets[2]);</div><div class='del'>-		n = snprintf(msg, len, " retry_rd_err_log[%.8x %.8x %.16llx %.8x %.8x %.16llx",</div><div class='del'>-			     log0, log1, log2a, log3, log4, log5);</div><div class='add'>+	n = snprintf(msg, len, " retry_rd_err_log[");</div><div class='add'>+	for (i = 0; i &lt; rrl-&gt;set_num; i++) {</div><div class='add'>+		scrub = (rrl-&gt;modes[i] == FRE_SCRUB || rrl-&gt;modes[i] == LRE_SCRUB);</div><div class='add'>+		if (scrub_err != scrub)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		if (len - n &gt; 0) {</div><div class='del'>-			if (xffsets) {</div><div class='del'>-				lxg2a = I10NM_GET_REG64(imc, res-&gt;channel, xffsets[2]);</div><div class='del'>-				n += snprintf(msg + n, len - n, " %.8x %.8x %.16llx %.8x %.8x %.16llx]",</div><div class='del'>-					     lxg0, lxg1, lxg2a, lxg3, lxg4, lxg5);</div><div class='del'>-			} else {</div><div class='del'>-				n += snprintf(msg + n, len - n, "]");</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		log2 = I10NM_GET_REG32(imc, res-&gt;channel, offsets[2]);</div><div class='del'>-		n = snprintf(msg, len, " retry_rd_err_log[%.8x %.8x %.8x %.8x %.8x %.16llx]",</div><div class='del'>-			     log0, log1, log2, log3, log4, log5);</div><div class='del'>-	}</div><div class='add'>+		for (j = 0; j &lt; rrl-&gt;reg_num &amp;&amp; len - n &gt; 0; j++) {</div><div class='add'>+			offset = rrl-&gt;offsets[i][j];</div><div class='add'>+			width = rrl-&gt;widths[j];</div><div class='add'>+			log = read_imc_reg(imc, ch, offset, width);</div><div class='ctx'> </div><div class='del'>-	if (imc-&gt;hbm_mc) {</div><div class='del'>-		if (pch) {</div><div class='del'>-			corr0 = I10NM_GET_REG32(imc, res-&gt;channel, 0x2c18);</div><div class='del'>-			corr1 = I10NM_GET_REG32(imc, res-&gt;channel, 0x2c1c);</div><div class='del'>-			corr2 = I10NM_GET_REG32(imc, res-&gt;channel, 0x2c20);</div><div class='del'>-			corr3 = I10NM_GET_REG32(imc, res-&gt;channel, 0x2c24);</div><div class='del'>-		} else {</div><div class='del'>-			corr0 = I10NM_GET_REG32(imc, res-&gt;channel, 0x2818);</div><div class='del'>-			corr1 = I10NM_GET_REG32(imc, res-&gt;channel, 0x281c);</div><div class='del'>-			corr2 = I10NM_GET_REG32(imc, res-&gt;channel, 0x2820);</div><div class='del'>-			corr3 = I10NM_GET_REG32(imc, res-&gt;channel, 0x2824);</div><div class='add'>+			if (width == 4)</div><div class='add'>+				n += snprintf(msg + n, len - n, "%.8llx ", log);</div><div class='add'>+			else</div><div class='add'>+				n += snprintf(msg + n, len - n, "%.16llx ", log);</div><div class='add'>+</div><div class='add'>+			/* Clear RRL status if RRL in Linux control mode. */</div><div class='add'>+			if (retry_rd_err_log == 2 &amp;&amp; !j &amp;&amp; (log &amp; status_mask))</div><div class='add'>+				write_imc_reg(imc, ch, offset, width, log &amp; ~status_mask);</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		corr0 = I10NM_GET_REG32(imc, res-&gt;channel, 0x22c18);</div><div class='del'>-		corr1 = I10NM_GET_REG32(imc, res-&gt;channel, 0x22c1c);</div><div class='del'>-		corr2 = I10NM_GET_REG32(imc, res-&gt;channel, 0x22c20);</div><div class='del'>-		corr3 = I10NM_GET_REG32(imc, res-&gt;channel, 0x22c24);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (len - n &gt; 0)</div><div class='del'>-		snprintf(msg + n, len - n,</div><div class='del'>-			 " correrrcnt[%.4x %.4x %.4x %.4x %.4x %.4x %.4x %.4x]",</div><div class='del'>-			 corr0 &amp; 0xffff, corr0 &gt;&gt; 16,</div><div class='del'>-			 corr1 &amp; 0xffff, corr1 &gt;&gt; 16,</div><div class='del'>-			 corr2 &amp; 0xffff, corr2 &gt;&gt; 16,</div><div class='del'>-			 corr3 &amp; 0xffff, corr3 &gt;&gt; 16);</div><div class='del'>-</div><div class='del'>-	/* Clear status bits */</div><div class='del'>-	if (retry_rd_err_log == 2) {</div><div class='del'>-		if (log0 &amp; RETRY_RD_ERR_LOG_OVER_UC_V) {</div><div class='del'>-			log0 &amp;= ~RETRY_RD_ERR_LOG_OVER_UC_V;</div><div class='del'>-			I10NM_SET_REG32(imc, res-&gt;channel, offsets[0], log0);</div><div class='add'>+	/* Move back one space. */</div><div class='add'>+	n--;</div><div class='add'>+	n += snprintf(msg + n, len - n, "]");</div><div class='add'>+</div><div class='add'>+	if (len - n &gt; 0) {</div><div class='add'>+		n += snprintf(msg + n, len - n, " correrrcnt[");</div><div class='add'>+		for (i = 0; i &lt; rrl-&gt;cecnt_num &amp;&amp; len - n &gt; 0; i++) {</div><div class='add'>+			offset = rrl-&gt;cecnt_offsets[i];</div><div class='add'>+			width = rrl-&gt;cecnt_widths[i];</div><div class='add'>+			corr = read_imc_reg(imc, ch, offset, width);</div><div class='add'>+</div><div class='add'>+			/* CPUs {ICX,SPR} encode two counters per 4-byte CORRERRCNT register. */</div><div class='add'>+			if (res_cfg-&gt;type &lt;= SPR) {</div><div class='add'>+				n += snprintf(msg + n, len - n, "%.4llx %.4llx ",</div><div class='add'>+					      corr &amp; 0xffff, corr &gt;&gt; 16);</div><div class='add'>+			} else {</div><div class='add'>+			/* CPUs {GNR} encode one counter per CORRERRCNT register. */</div><div class='add'>+				if (width == 4)</div><div class='add'>+					n += snprintf(msg + n, len - n, "%.8llx ", corr);</div><div class='add'>+				else</div><div class='add'>+					n += snprintf(msg + n, len - n, "%.16llx ", corr);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (xffsets &amp;&amp; (lxg0 &amp; RETRY_RD_ERR_LOG_OVER_UC_V)) {</div><div class='del'>-			lxg0 &amp;= ~RETRY_RD_ERR_LOG_OVER_UC_V;</div><div class='del'>-			I10NM_SET_REG32(imc, res-&gt;channel, xffsets[0], lxg0);</div><div class='del'>-		}</div><div class='add'>+		/* Move back one space. */</div><div class='add'>+		n--;</div><div class='add'>+		n += snprintf(msg + n, len - n, "]");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -870,8 +956,7 @@ static struct res_config i10nm_cfg0 = {</div><div class='ctx'> 	.ddr_mdev_bdf		= {0, 12, 0},</div><div class='ctx'> 	.hbm_mdev_bdf		= {0, 12, 1},</div><div class='ctx'> 	.sad_all_offset		= 0x108,</div><div class='del'>-	.offsets_scrub		= offsets_scrub_icx,</div><div class='del'>-	.offsets_demand		= offsets_demand_icx,</div><div class='add'>+	.reg_rrl_ddr		= &amp;icx_reg_rrl_ddr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct res_config i10nm_cfg1 = {</div><div class='hunk'>@@ -889,8 +974,7 @@ static struct res_config i10nm_cfg1 = {</div><div class='ctx'> 	.ddr_mdev_bdf		= {0, 12, 0},</div><div class='ctx'> 	.hbm_mdev_bdf		= {0, 12, 1},</div><div class='ctx'> 	.sad_all_offset		= 0x108,</div><div class='del'>-	.offsets_scrub		= offsets_scrub_icx,</div><div class='del'>-	.offsets_demand		= offsets_demand_icx,</div><div class='add'>+	.reg_rrl_ddr		= &amp;icx_reg_rrl_ddr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct res_config spr_cfg = {</div><div class='hunk'>@@ -913,13 +997,9 @@ static struct res_config spr_cfg = {</div><div class='ctx'> 	.ddr_mdev_bdf		= {0, 12, 0},</div><div class='ctx'> 	.hbm_mdev_bdf		= {0, 12, 1},</div><div class='ctx'> 	.sad_all_offset		= 0x300,</div><div class='del'>-	.offsets_scrub		= offsets_scrub_spr,</div><div class='del'>-	.offsets_scrub_hbm0	= offsets_scrub_spr_hbm0,</div><div class='del'>-	.offsets_scrub_hbm1	= offsets_scrub_spr_hbm1,</div><div class='del'>-	.offsets_demand		= offsets_demand_spr,</div><div class='del'>-	.offsets_demand2	= offsets_demand2_spr,</div><div class='del'>-	.offsets_demand_hbm0	= offsets_demand_spr_hbm0,</div><div class='del'>-	.offsets_demand_hbm1	= offsets_demand_spr_hbm1,</div><div class='add'>+	.reg_rrl_ddr		= &amp;spr_reg_rrl_ddr,</div><div class='add'>+	.reg_rrl_hbm[0]		= &amp;spr_reg_rrl_hbm_pch0,</div><div class='add'>+	.reg_rrl_hbm[1]		= &amp;spr_reg_rrl_hbm_pch1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct res_config gnr_cfg = {</div><div class='hunk'>@@ -937,6 +1017,7 @@ static struct res_config gnr_cfg = {</div><div class='ctx'> 	.uracu_bdf		= {0, 0, 1},</div><div class='ctx'> 	.ddr_mdev_bdf		= {0, 5, 1},</div><div class='ctx'> 	.sad_all_offset		= 0x300,</div><div class='add'>+	.reg_rrl_ddr		= &amp;gnr_reg_rrl_ddr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct x86_cpu_id i10nm_cpuids[] = {</div><div class='hunk'>@@ -1108,7 +1189,7 @@ static int __init i10nm_init(void)</div><div class='ctx'> 	mce_register_decode_chain(&amp;i10nm_mce_dec);</div><div class='ctx'> 	skx_setup_debug("i10nm_test");</div><div class='ctx'> </div><div class='del'>-	if (retry_rd_err_log &amp;&amp; res_cfg-&gt;offsets_scrub &amp;&amp; res_cfg-&gt;offsets_demand) {</div><div class='add'>+	if (retry_rd_err_log &amp;&amp; res_cfg-&gt;reg_rrl_ddr) {</div><div class='ctx'> 		skx_set_decode(i10nm_mc_decode, show_retry_rd_err_log);</div><div class='ctx'> 		if (retry_rd_err_log == 2)</div><div class='ctx'> 			enable_retry_rd_err_log(true);</div><div class='hunk'>@@ -1128,7 +1209,7 @@ static void __exit i10nm_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	edac_dbg(2, "\n");</div><div class='ctx'> </div><div class='del'>-	if (retry_rd_err_log &amp;&amp; res_cfg-&gt;offsets_scrub &amp;&amp; res_cfg-&gt;offsets_demand) {</div><div class='add'>+	if (retry_rd_err_log &amp;&amp; res_cfg-&gt;reg_rrl_ddr) {</div><div class='ctx'> 		skx_set_decode(NULL, NULL);</div><div class='ctx'> 		if (retry_rd_err_log == 2)</div><div class='ctx'> 			enable_retry_rd_err_log(false);</div><div class='head'>diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c<br/>index 204834149579..a53612be4b2f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/ie31200_edac.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/ie31200_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/ie31200_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/ie31200_edac.c</a></div><div class='hunk'>@@ -52,6 +52,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/io-64-nonatomic-lo-hi.h&gt;</div><div class='ctx'> #include &lt;asm/mce.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> #include "edac_module.h"</div><div class='ctx'> </div><div class='ctx'> #define EDAC_MOD_STR "ie31200_edac"</div><div class='hunk'>@@ -89,6 +90,10 @@</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IE31200_RPL_S_1	0xa703</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IE31200_RPL_S_2	0x4640</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_IE31200_RPL_S_3	0x4630</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_IE31200_RPL_S_4	0xa700</div><div class='add'>+</div><div class='add'>+/* Alder Lake-S */</div><div class='add'>+#define PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1	0x4660</div><div class='ctx'> </div><div class='ctx'> #define IE31200_RANKS_PER_CHANNEL	8</div><div class='ctx'> #define IE31200_DIMMS_PER_CHANNEL	2</div><div class='hunk'>@@ -734,6 +739,8 @@ static const struct pci_device_id ie31200_pci_tbl[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_1), (kernel_ulong_t)&amp;rpl_s_cfg},</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_2), (kernel_ulong_t)&amp;rpl_s_cfg},</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_3), (kernel_ulong_t)&amp;rpl_s_cfg},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_RPL_S_4), (kernel_ulong_t)&amp;rpl_s_cfg},</div><div class='add'>+	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IE31200_ADL_S_1), (kernel_ulong_t)&amp;rpl_s_cfg},</div><div class='ctx'> 	{ 0, } /* 0 terminated list. */</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, ie31200_pci_tbl);</div><div class='head'>diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c<br/>index 5807517ee32d..1930dc00c791 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/igen6_edac.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/igen6_edac.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/igen6_edac.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/igen6_edac.c</a></div><div class='hunk'>@@ -127,6 +127,7 @@</div><div class='ctx'> </div><div class='ctx'> static const struct res_config {</div><div class='ctx'> 	bool machine_check;</div><div class='add'>+	/* The number of present memory controllers. */</div><div class='ctx'> 	int num_imc;</div><div class='ctx'> 	u32 imc_base;</div><div class='ctx'> 	u32 cmf_base;</div><div class='hunk'>@@ -240,6 +241,12 @@ static struct work_struct ecclog_work;</div><div class='ctx'> #define DID_ADL_N_SKU11	0x467c</div><div class='ctx'> #define DID_ADL_N_SKU12	0x4632</div><div class='ctx'> </div><div class='add'>+/* Compute die IDs for Arizona Beach with IBECC */</div><div class='add'>+#define DID_AZB_SKU1	0x4676</div><div class='add'>+</div><div class='add'>+/* Compute did IDs for Amston Lake with IBECC */</div><div class='add'>+#define DID_ASL_SKU1	0x464a</div><div class='add'>+</div><div class='ctx'> /* Compute die IDs for Raptor Lake-P with IBECC */</div><div class='ctx'> #define DID_RPL_P_SKU1	0xa706</div><div class='ctx'> #define DID_RPL_P_SKU2	0xa707</div><div class='hunk'>@@ -595,6 +602,8 @@ static const struct pci_device_id igen6_pci_tbl[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, DID_ADL_N_SKU10), (kernel_ulong_t)&amp;adl_n_cfg },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, DID_ADL_N_SKU11), (kernel_ulong_t)&amp;adl_n_cfg },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, DID_ADL_N_SKU12), (kernel_ulong_t)&amp;adl_n_cfg },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, DID_AZB_SKU1), (kernel_ulong_t)&amp;adl_n_cfg },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, DID_ASL_SKU1), (kernel_ulong_t)&amp;adl_n_cfg },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, DID_RPL_P_SKU1), (kernel_ulong_t)&amp;rpl_p_cfg },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, DID_RPL_P_SKU2), (kernel_ulong_t)&amp;rpl_p_cfg },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, DID_RPL_P_SKU3), (kernel_ulong_t)&amp;rpl_p_cfg },</div><div class='hunk'>@@ -1201,23 +1210,21 @@ static void igen6_check(struct mem_ctl_info *mci)</div><div class='ctx'> 		irq_work_queue(&amp;ecclog_irq_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int igen6_register_mci(int mc, u64 mchbar, struct pci_dev *pdev)</div><div class='add'>+/* Check whether the memory controller is absent. */</div><div class='add'>+static bool igen6_imc_absent(void __iomem *window)</div><div class='add'>+{</div><div class='add'>+	return readl(window + MAD_INTER_CHANNEL_OFFSET) == ~0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igen6_register_mci(int mc, void __iomem *window, struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct edac_mc_layer layers[2];</div><div class='ctx'> 	struct mem_ctl_info *mci;</div><div class='ctx'> 	struct igen6_imc *imc;</div><div class='del'>-	void __iomem *window;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	edac_dbg(2, "\n");</div><div class='ctx'> </div><div class='del'>-	mchbar += mc * MCHBAR_SIZE;</div><div class='del'>-	window = ioremap(mchbar, MCHBAR_SIZE);</div><div class='del'>-	if (!window) {</div><div class='del'>-		igen6_printk(KERN_ERR, "Failed to ioremap 0x%llx\n", mchbar);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	layers[0].type = EDAC_MC_LAYER_CHANNEL;</div><div class='ctx'> 	layers[0].size = NUM_CHANNELS;</div><div class='ctx'> 	layers[0].is_virt_csrow = false;</div><div class='hunk'>@@ -1283,7 +1290,6 @@ fail3:</div><div class='ctx'> fail2:</div><div class='ctx'> 	edac_mc_free(mci);</div><div class='ctx'> fail:</div><div class='del'>-	iounmap(window);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1309,6 +1315,56 @@ static void igen6_unregister_mcis(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int igen6_register_mcis(struct pci_dev *pdev, u64 mchbar)</div><div class='add'>+{</div><div class='add'>+	void __iomem *window;</div><div class='add'>+	int lmc, pmc, rc;</div><div class='add'>+	u64 base;</div><div class='add'>+</div><div class='add'>+	for (lmc = 0, pmc = 0; pmc &lt; NUM_IMC; pmc++) {</div><div class='add'>+		base   = mchbar + pmc * MCHBAR_SIZE;</div><div class='add'>+		window = ioremap(base, MCHBAR_SIZE);</div><div class='add'>+		if (!window) {</div><div class='add'>+			igen6_printk(KERN_ERR, "Failed to ioremap 0x%llx for mc%d\n", base, pmc);</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto out_unregister_mcis;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (igen6_imc_absent(window)) {</div><div class='add'>+			iounmap(window);</div><div class='add'>+			edac_dbg(2, "Skip absent mc%d\n", pmc);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = igen6_register_mci(lmc, window, pdev);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto out_iounmap;</div><div class='add'>+</div><div class='add'>+		/* Done, if all present MCs are detected and registered. */</div><div class='add'>+		if (++lmc &gt;= res_cfg-&gt;num_imc)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!lmc) {</div><div class='add'>+		igen6_printk(KERN_ERR, "No mc found.\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (lmc &lt; res_cfg-&gt;num_imc)</div><div class='add'>+		igen6_printk(KERN_WARNING, "Expected %d mcs, but only %d detected.",</div><div class='add'>+			     res_cfg-&gt;num_imc, lmc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_iounmap:</div><div class='add'>+	iounmap(window);</div><div class='add'>+</div><div class='add'>+out_unregister_mcis:</div><div class='add'>+	igen6_unregister_mcis();</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igen6_mem_slice_setup(u64 mchbar)</div><div class='ctx'> {</div><div class='ctx'> 	struct igen6_imc *imc = &amp;igen6_pvt-&gt;imc[0];</div><div class='hunk'>@@ -1405,7 +1461,7 @@ static void opstate_set(const struct res_config *cfg, const struct pci_device_id</div><div class='ctx'> static int igen6_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='ctx'> 	u64 mchbar;</div><div class='del'>-	int i, rc;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	edac_dbg(2, "\n");</div><div class='ctx'> </div><div class='hunk'>@@ -1421,11 +1477,9 @@ static int igen6_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	opstate_set(res_cfg, ent);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; res_cfg-&gt;num_imc; i++) {</div><div class='del'>-		rc = igen6_register_mci(i, mchbar, pdev);</div><div class='del'>-		if (rc)</div><div class='del'>-			goto fail2;</div><div class='del'>-	}</div><div class='add'>+	rc = igen6_register_mcis(pdev, mchbar);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto fail;</div><div class='ctx'> </div><div class='ctx'> 	if (res_cfg-&gt;num_imc &gt; 1) {</div><div class='ctx'> 		rc = igen6_mem_slice_setup(mchbar);</div><div class='head'>diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c<br/>index 50d74d3bf0f5..af3c12284a1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/mce_amd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/mce_amd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/mce_amd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/mce_amd.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cpu.h&gt;</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mce_amd.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/edac/skx_common.c b/drivers/edac/skx_common.c<br/>index fa5b442b1844..c9ade45c1a99 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/skx_common.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/skx_common.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/skx_common.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/skx_common.c</a></div><div class='hunk'>@@ -116,6 +116,7 @@ EXPORT_SYMBOL_GPL(skx_adxl_get);</div><div class='ctx'> </div><div class='ctx'> void skx_adxl_put(void)</div><div class='ctx'> {</div><div class='add'>+	adxl_component_count = 0;</div><div class='ctx'> 	kfree(adxl_values);</div><div class='ctx'> 	kfree(adxl_msg);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h<br/>index ca5408803f87..ec4966f7ea40 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/edac/skx_common.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/edac/skx_common.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/edac/skx_common.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/edac/skx_common.h</a></div><div class='hunk'>@@ -79,6 +79,47 @@</div><div class='ctx'>  */</div><div class='ctx'> #define MCACOD_EXT_MEM_ERR	0x280</div><div class='ctx'> </div><div class='add'>+/* Max RRL register sets per {,sub-,pseudo-}channel. */</div><div class='add'>+#define NUM_RRL_SET		4</div><div class='add'>+/* Max RRL registers per set. */</div><div class='add'>+#define NUM_RRL_REG		6</div><div class='add'>+/* Max correctable error count registers. */</div><div class='add'>+#define NUM_CECNT_REG		8</div><div class='add'>+</div><div class='add'>+/* Modes of RRL register set. */</div><div class='add'>+enum rrl_mode {</div><div class='add'>+	/* Last read error from patrol scrub. */</div><div class='add'>+	LRE_SCRUB,</div><div class='add'>+	/* Last read error from demand. */</div><div class='add'>+	LRE_DEMAND,</div><div class='add'>+	/* First read error from patrol scrub. */</div><div class='add'>+	FRE_SCRUB,</div><div class='add'>+	/* First read error from demand. */</div><div class='add'>+	FRE_DEMAND,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RRL registers per {,sub-,pseudo-}channel. */</div><div class='add'>+struct reg_rrl {</div><div class='add'>+	/* RRL register parts. */</div><div class='add'>+	int set_num, reg_num;</div><div class='add'>+	enum rrl_mode modes[NUM_RRL_SET];</div><div class='add'>+	u32 offsets[NUM_RRL_SET][NUM_RRL_REG];</div><div class='add'>+	/* RRL register widths in byte per set. */</div><div class='add'>+	u8 widths[NUM_RRL_REG];</div><div class='add'>+	/* RRL control bits of the first register per set. */</div><div class='add'>+	u32 v_mask;</div><div class='add'>+	u32 uc_mask;</div><div class='add'>+	u32 over_mask;</div><div class='add'>+	u32 en_patspr_mask;</div><div class='add'>+	u32 noover_mask;</div><div class='add'>+	u32 en_mask;</div><div class='add'>+</div><div class='add'>+	/* CORRERRCNT register parts. */</div><div class='add'>+	int cecnt_num;</div><div class='add'>+	u32 cecnt_offsets[NUM_CECNT_REG];</div><div class='add'>+	u8 cecnt_widths[NUM_CECNT_REG];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Each cpu socket contains some pci devices that provide global</div><div class='ctx'>  * information, and also some that are local to each of the two</div><div class='hunk'>@@ -117,9 +158,11 @@ struct skx_dev {</div><div class='ctx'> 		struct skx_channel {</div><div class='ctx'> 			struct pci_dev	*cdev;</div><div class='ctx'> 			struct pci_dev	*edev;</div><div class='del'>-			u32 retry_rd_err_log_s;</div><div class='del'>-			u32 retry_rd_err_log_d;</div><div class='del'>-			u32 retry_rd_err_log_d2;</div><div class='add'>+			/*</div><div class='add'>+			 * Two groups of RRL control registers per channel to save default RRL</div><div class='add'>+			 * settings of two {sub-,pseudo-}channels in Linux RRL control mode.</div><div class='add'>+			 */</div><div class='add'>+			u32 rrl_ctl[2][NUM_RRL_SET];</div><div class='ctx'> 			struct skx_dimm {</div><div class='ctx'> 				u8 close_pg;</div><div class='ctx'> 				u8 bank_xor_enable;</div><div class='hunk'>@@ -232,14 +275,10 @@ struct res_config {</div><div class='ctx'> 	/* HBM mdev device BDF */</div><div class='ctx'> 	struct pci_bdf hbm_mdev_bdf;</div><div class='ctx'> 	int sad_all_offset;</div><div class='del'>-	/* Offsets of retry_rd_err_log registers */</div><div class='del'>-	u32 *offsets_scrub;</div><div class='del'>-	u32 *offsets_scrub_hbm0;</div><div class='del'>-	u32 *offsets_scrub_hbm1;</div><div class='del'>-	u32 *offsets_demand;</div><div class='del'>-	u32 *offsets_demand2;</div><div class='del'>-	u32 *offsets_demand_hbm0;</div><div class='del'>-	u32 *offsets_demand_hbm1;</div><div class='add'>+	/* RRL register sets per DDR channel */</div><div class='add'>+	struct reg_rrl *reg_rrl_ddr;</div><div class='add'>+	/* RRL register sets per HBM channel */</div><div class='add'>+	struct reg_rrl *reg_rrl_hbm[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci,</div><div class='head'>diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c<br/>index b0f9ef6ac6df..18cacb9edbbc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firewire/core-transaction.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firewire/core-transaction.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firewire/core-transaction.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firewire/core-transaction.c</a></div><div class='hunk'>@@ -431,7 +431,7 @@ int fw_run_transaction(struct fw_card *card, int tcode, int destination_id,</div><div class='ctx'> 	fw_send_request(card, &amp;t, tcode, destination_id, generation, speed,</div><div class='ctx'> 			offset, payload, length, transaction_callback, &amp;d);</div><div class='ctx'> 	wait_for_completion(&amp;d.done);</div><div class='del'>-	destroy_timer_on_stack(&amp;t.split_timeout_timer);</div><div class='add'>+	timer_destroy_on_stack(&amp;t.split_timeout_timer);</div><div class='ctx'> </div><div class='ctx'> 	return d.rcode;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig<br/>index aadc395ee168..7df19d82aa68 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/Kconfig</a></div><div class='hunk'>@@ -31,7 +31,6 @@ config ARM_SCPI_PROTOCOL</div><div class='ctx'> config ARM_SDE_INTERFACE</div><div class='ctx'> 	bool "ARM Software Delegated Exception Interface (SDEI)"</div><div class='ctx'> 	depends on ARM64</div><div class='del'>-	depends on ACPI_APEI_GHES</div><div class='ctx'> 	help</div><div class='ctx'> 	  The Software Delegated Exception Interface (SDEI) is an ARM</div><div class='ctx'> 	  standard for registering callbacks from the platform firmware</div><div class='head'>diff --git a/drivers/firmware/arm_ffa/driver.c b/drivers/firmware/arm_ffa/driver.c<br/>index 19295282de24..fe55613a8ea9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_ffa/driver.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_ffa/driver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_ffa/driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/arm_ffa/driver.c</a></div><div class='hunk'>@@ -299,7 +299,8 @@ __ffa_partition_info_get(u32 uuid0, u32 uuid1, u32 uuid2, u32 uuid3,</div><div class='ctx'> 				import_uuid(&amp;buf-&gt;uuid, (u8 *)&amp;rx_buf-&gt;uuid);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	ffa_rx_release();</div><div class='add'>+	if (!(flags &amp; PARTITION_INFO_GET_RETURN_COUNT_ONLY))</div><div class='add'>+		ffa_rx_release();</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;drv_info-&gt;rx_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/arm_scmi/bus.c b/drivers/firmware/arm_scmi/bus.c<br/>index 7af01664ce7e..3a5474015f7d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/bus.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_scmi/bus.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/bus.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/arm_scmi/bus.c</a></div><div class='hunk'>@@ -255,6 +255,9 @@ static struct scmi_device *scmi_child_dev_find(struct device *parent,</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	/* Drop the refcnt bumped implicitly by device_find_child */</div><div class='add'>+	put_device(dev);</div><div class='add'>+</div><div class='ctx'> 	return to_scmi_dev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/arm_scmi/driver.c b/drivers/firmware/arm_scmi/driver.c<br/>index 1c75a4c9c371..0390d5ff195e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/driver.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_scmi/driver.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_scmi/driver.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/arm_scmi/driver.c</a></div><div class='hunk'>@@ -1248,7 +1248,8 @@ static void xfer_put(const struct scmi_protocol_handle *ph,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool scmi_xfer_done_no_timeout(struct scmi_chan_info *cinfo,</div><div class='del'>-				      struct scmi_xfer *xfer, ktime_t stop)</div><div class='add'>+				      struct scmi_xfer *xfer, ktime_t stop,</div><div class='add'>+				      bool *ooo)</div><div class='ctx'> {</div><div class='ctx'> 	struct scmi_info *info = handle_to_scmi_info(cinfo-&gt;handle);</div><div class='ctx'> </div><div class='hunk'>@@ -1257,7 +1258,7 @@ static bool scmi_xfer_done_no_timeout(struct scmi_chan_info *cinfo,</div><div class='ctx'> 	 * in case of out-of-order receptions of delayed responses</div><div class='ctx'> 	 */</div><div class='ctx'> 	return info-&gt;desc-&gt;ops-&gt;poll_done(cinfo, xfer) ||</div><div class='del'>-	       try_wait_for_completion(&amp;xfer-&gt;done) ||</div><div class='add'>+	       (*ooo = try_wait_for_completion(&amp;xfer-&gt;done)) ||</div><div class='ctx'> 	       ktime_after(ktime_get(), stop);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1274,15 +1275,17 @@ static int scmi_wait_for_reply(struct device *dev, const struct scmi_desc *desc,</div><div class='ctx'> 		 * itself to support synchronous commands replies.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!desc-&gt;sync_cmds_completed_on_ret) {</div><div class='add'>+			bool ooo = false;</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Poll on xfer using transport provided .poll_done();</div><div class='ctx'> 			 * assumes no completion interrupt was available.</div><div class='ctx'> 			 */</div><div class='ctx'> 			ktime_t stop = ktime_add_ms(ktime_get(), timeout_ms);</div><div class='ctx'> </div><div class='del'>-			spin_until_cond(scmi_xfer_done_no_timeout(cinfo,</div><div class='del'>-								  xfer, stop));</div><div class='del'>-			if (ktime_after(ktime_get(), stop)) {</div><div class='add'>+			spin_until_cond(scmi_xfer_done_no_timeout(cinfo, xfer,</div><div class='add'>+								  stop, &amp;ooo));</div><div class='add'>+			if (!ooo &amp;&amp; !info-&gt;desc-&gt;ops-&gt;poll_done(cinfo, xfer)) {</div><div class='ctx'> 				dev_err(dev,</div><div class='ctx'> 					"timed out in resp(caller: %pS) - polling\n",</div><div class='ctx'> 					(void *)_RET_IP_);</div><div class='head'>diff --git a/drivers/firmware/arm_sdei.c b/drivers/firmware/arm_sdei.c<br/>index 3e8051fe8296..71e2a9a89f6a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/arm_sdei.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/arm_sdei.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/arm_sdei.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/arm_sdei.c</a></div><div class='hunk'>@@ -1062,13 +1062,12 @@ static bool __init sdei_present_acpi(void)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __init sdei_init(void)</div><div class='add'>+void __init acpi_sdei_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = platform_driver_register(&amp;sdei_driver);</div><div class='del'>-	if (ret || !sdei_present_acpi())</div><div class='add'>+	if (!sdei_present_acpi())</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	pdev = platform_device_register_simple(sdei_driver.driver.name,</div><div class='hunk'>@@ -1081,6 +1080,12 @@ void __init sdei_init(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __init sdei_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;sdei_driver);</div><div class='add'>+}</div><div class='add'>+arch_initcall(sdei_init);</div><div class='add'>+</div><div class='ctx'> int sdei_event_handler(struct pt_regs *regs,</div><div class='ctx'> 		       struct sdei_registered_event *arg)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/firmware/cirrus/Kconfig b/drivers/firmware/cirrus/Kconfig<br/>index 0a883091259a..e3c2e38b746d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/cirrus/Kconfig</a></div><div class='hunk'>@@ -6,14 +6,11 @@ config FW_CS_DSP</div><div class='ctx'> </div><div class='ctx'> config FW_CS_DSP_KUNIT_TEST_UTILS</div><div class='ctx'> 	tristate</div><div class='del'>-	depends on KUNIT &amp;&amp; REGMAP</div><div class='del'>-	select FW_CS_DSP</div><div class='ctx'> </div><div class='ctx'> config FW_CS_DSP_KUNIT_TEST</div><div class='ctx'> 	tristate "KUnit tests for Cirrus Logic cs_dsp" if !KUNIT_ALL_TESTS</div><div class='del'>-	depends on KUNIT &amp;&amp; REGMAP</div><div class='add'>+	depends on KUNIT &amp;&amp; REGMAP &amp;&amp; FW_CS_DSP</div><div class='ctx'> 	default KUNIT_ALL_TESTS</div><div class='del'>-	select FW_CS_DSP</div><div class='ctx'> 	select FW_CS_DSP_KUNIT_TEST_UTILS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This builds KUnit tests for cs_dsp.</div><div class='head'>diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c b/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c<br/>index 49d84f7e59e6..3f8777ee4dc0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_mock_bin.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_mock_bin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/cirrus/test/cs_dsp_mock_bin.c</a></div><div class='hunk'>@@ -96,10 +96,11 @@ static void cs_dsp_mock_bin_add_name_or_info(struct cs_dsp_mock_bin_builder *bui</div><div class='ctx'> </div><div class='ctx'> 	if (info_len % 4) {</div><div class='ctx'> 		/* Create a padded string with length a multiple of 4 */</div><div class='add'>+		size_t copy_len = info_len;</div><div class='ctx'> 		info_len = round_up(info_len, 4);</div><div class='ctx'> 		tmp = kunit_kzalloc(builder-&gt;test_priv-&gt;test, info_len, GFP_KERNEL);</div><div class='ctx'> 		KUNIT_ASSERT_NOT_ERR_OR_NULL(builder-&gt;test_priv-&gt;test, tmp);</div><div class='del'>-		memcpy(tmp, info, info_len);</div><div class='add'>+		memcpy(tmp, info, copy_len);</div><div class='ctx'> 		info = tmp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -176,6 +177,9 @@ struct cs_dsp_mock_bin_builder *cs_dsp_mock_bin_init(struct cs_dsp_test *priv,</div><div class='ctx'> 	struct cs_dsp_mock_bin_builder *builder;</div><div class='ctx'> 	struct wmfw_coeff_hdr *hdr;</div><div class='ctx'> </div><div class='add'>+	KUNIT_ASSERT_LE(priv-&gt;test, format_version, 0xff);</div><div class='add'>+	KUNIT_ASSERT_LE(priv-&gt;test, fw_version, 0xffffff);</div><div class='add'>+</div><div class='ctx'> 	builder = kunit_kzalloc(priv-&gt;test, sizeof(*builder), GFP_KERNEL);</div><div class='ctx'> 	KUNIT_ASSERT_NOT_ERR_OR_NULL(priv-&gt;test, builder);</div><div class='ctx'> 	builder-&gt;test_priv = priv;</div><div class='head'>diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c b/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c<br/>index 161272e47bda..95946fac5563 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/cirrus/test/cs_dsp_mock_mem_maps.c</a></div><div class='hunk'>@@ -462,36 +462,6 @@ unsigned int cs_dsp_mock_xm_header_get_alg_base_in_words(struct cs_dsp_test *pri</div><div class='ctx'> EXPORT_SYMBOL_NS_GPL(cs_dsp_mock_xm_header_get_alg_base_in_words, "FW_CS_DSP_KUNIT_TEST_UTILS");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * cs_dsp_mock_xm_header_get_fw_version_from_regmap() - Firmware version.</div><div class='del'>- *</div><div class='del'>- * @priv:	Pointer to struct cs_dsp_test.</div><div class='del'>- *</div><div class='del'>- * Return: Firmware version word value.</div><div class='del'>- */</div><div class='del'>-unsigned int cs_dsp_mock_xm_header_get_fw_version_from_regmap(struct cs_dsp_test *priv)</div><div class='del'>-{</div><div class='del'>-	unsigned int xm = cs_dsp_mock_base_addr_for_mem(priv, WMFW_ADSP2_XM);</div><div class='del'>-	union {</div><div class='del'>-		struct wmfw_id_hdr adsp2;</div><div class='del'>-		struct wmfw_v3_id_hdr halo;</div><div class='del'>-	} hdr;</div><div class='del'>-</div><div class='del'>-	switch (priv-&gt;dsp-&gt;type) {</div><div class='del'>-	case WMFW_ADSP2:</div><div class='del'>-		regmap_raw_read(priv-&gt;dsp-&gt;regmap, xm, &amp;hdr.adsp2, sizeof(hdr.adsp2));</div><div class='del'>-		return be32_to_cpu(hdr.adsp2.ver);</div><div class='del'>-	case WMFW_HALO:</div><div class='del'>-		regmap_raw_read(priv-&gt;dsp-&gt;regmap, xm, &amp;hdr.halo, sizeof(hdr.halo));</div><div class='del'>-		return be32_to_cpu(hdr.halo.ver);</div><div class='del'>-	default:</div><div class='del'>-		KUNIT_FAIL(priv-&gt;test, NULL);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(cs_dsp_mock_xm_header_get_fw_version_from_regmap,</div><div class='del'>-		     "FW_CS_DSP_KUNIT_TEST_UTILS");</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * cs_dsp_mock_xm_header_get_fw_version() - Firmware version.</div><div class='ctx'>  *</div><div class='ctx'>  * @header:	Pointer to struct cs_dsp_mock_xm_header.</div><div class='hunk'>@@ -535,9 +505,11 @@ void cs_dsp_mock_xm_header_drop_from_regmap_cache(struct cs_dsp_test *priv)</div><div class='ctx'> 		 * Could be one 32-bit register or two 16-bit registers.</div><div class='ctx'> 		 * A raw read will read the requested number of bytes.</div><div class='ctx'> 		 */</div><div class='del'>-		regmap_raw_read(priv-&gt;dsp-&gt;regmap,</div><div class='del'>-				xm + (offsetof(struct wmfw_adsp2_id_hdr, n_algs) / 2),</div><div class='del'>-				&amp;num_algs_be32, sizeof(num_algs_be32));</div><div class='add'>+		KUNIT_ASSERT_GE(priv-&gt;test, 0,</div><div class='add'>+				regmap_raw_read(priv-&gt;dsp-&gt;regmap,</div><div class='add'>+						xm +</div><div class='add'>+						(offsetof(struct wmfw_adsp2_id_hdr, n_algs) / 2),</div><div class='add'>+						&amp;num_algs_be32, sizeof(num_algs_be32)));</div><div class='ctx'> 		num_algs = be32_to_cpu(num_algs_be32);</div><div class='ctx'> 		bytes = sizeof(struct wmfw_adsp2_id_hdr) +</div><div class='ctx'> 			(num_algs * sizeof(struct wmfw_adsp2_alg_hdr)) +</div><div class='hunk'>@@ -546,9 +518,10 @@ void cs_dsp_mock_xm_header_drop_from_regmap_cache(struct cs_dsp_test *priv)</div><div class='ctx'> 		regcache_drop_region(priv-&gt;dsp-&gt;regmap, xm, xm + (bytes / 2) - 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case WMFW_HALO:</div><div class='del'>-		regmap_read(priv-&gt;dsp-&gt;regmap,</div><div class='del'>-			    xm + offsetof(struct wmfw_halo_id_hdr, n_algs),</div><div class='del'>-			    &amp;num_algs);</div><div class='add'>+		KUNIT_ASSERT_GE(priv-&gt;test, 0,</div><div class='add'>+				regmap_read(priv-&gt;dsp-&gt;regmap,</div><div class='add'>+					    xm + offsetof(struct wmfw_halo_id_hdr, n_algs),</div><div class='add'>+					    &amp;num_algs));</div><div class='ctx'> 		bytes = sizeof(struct wmfw_halo_id_hdr) +</div><div class='ctx'> 			(num_algs * sizeof(struct wmfw_halo_alg_hdr)) +</div><div class='ctx'> 			4 /* terminator word */;</div><div class='head'>diff --git a/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c b/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c<br/>index 5a3ac03ac37f..934d40a4d709 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/cirrus/test/cs_dsp_mock_wmfw.c</a></div><div class='hunk'>@@ -178,6 +178,8 @@ void cs_dsp_mock_wmfw_start_alg_info_block(struct cs_dsp_mock_wmfw_builder *buil</div><div class='ctx'> 	size_t bytes_needed, name_len, description_len;</div><div class='ctx'> 	int offset;</div><div class='ctx'> </div><div class='add'>+	KUNIT_ASSERT_LE(builder-&gt;test_priv-&gt;test, alg_id, 0xffffff);</div><div class='add'>+</div><div class='ctx'> 	/* Bytes needed for region header */</div><div class='ctx'> 	bytes_needed = offsetof(struct wmfw_region, data);</div><div class='ctx'> </div><div class='hunk'>@@ -435,6 +437,8 @@ struct cs_dsp_mock_wmfw_builder *cs_dsp_mock_wmfw_init(struct cs_dsp_test *priv,</div><div class='ctx'> {</div><div class='ctx'> 	struct cs_dsp_mock_wmfw_builder *builder;</div><div class='ctx'> </div><div class='add'>+	KUNIT_ASSERT_LE(priv-&gt;test, format_version, 0xff);</div><div class='add'>+</div><div class='ctx'> 	/* If format version isn't given use the default for the target core */</div><div class='ctx'> 	if (format_version &lt; 0) {</div><div class='ctx'> 		switch (priv-&gt;dsp-&gt;type) {</div><div class='head'>diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_bin.c b/drivers/firmware/cirrus/test/cs_dsp_test_bin.c<br/>index 1e161bbc5b4a..163b7faecff4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_test_bin.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_test_bin.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_test_bin.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/cirrus/test/cs_dsp_test_bin.c</a></div><div class='hunk'>@@ -2198,7 +2198,7 @@ static int cs_dsp_bin_test_common_init(struct kunit *test, struct cs_dsp *dsp)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;local-&gt;bin_builder =</div><div class='ctx'> 		cs_dsp_mock_bin_init(priv, 1,</div><div class='del'>-				     cs_dsp_mock_xm_header_get_fw_version_from_regmap(priv));</div><div class='add'>+				     cs_dsp_mock_xm_header_get_fw_version(xm_hdr));</div><div class='ctx'> 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, priv-&gt;local-&gt;bin_builder);</div><div class='ctx'> </div><div class='ctx'> 	/* We must provide a dummy wmfw to load */</div><div class='head'>diff --git a/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c b/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c<br/>index 8748874f0552..a7ec956d2724 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/cirrus/test/cs_dsp_test_bin_error.c</a></div><div class='hunk'>@@ -451,7 +451,7 @@ static int cs_dsp_bin_err_test_common_init(struct kunit *test, struct cs_dsp *ds</div><div class='ctx'> </div><div class='ctx'> 	local-&gt;bin_builder =</div><div class='ctx'> 		cs_dsp_mock_bin_init(priv, 1,</div><div class='del'>-				     cs_dsp_mock_xm_header_get_fw_version_from_regmap(priv));</div><div class='add'>+				     cs_dsp_mock_xm_header_get_fw_version(local-&gt;xm_header));</div><div class='ctx'> 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, local-&gt;bin_builder);</div><div class='ctx'> </div><div class='ctx'> 	/* Init cs_dsp */</div><div class='head'>diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c<br/>index 7309394b8fc9..e57bff702b5f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/efi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/efi/efi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/efi/efi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/efi/efi.c</a></div><div class='hunk'>@@ -558,6 +558,7 @@ int __efi_mem_desc_lookup(u64 phys_addr, efi_memory_desc_t *out_md)</div><div class='ctx'> </div><div class='ctx'> extern int efi_mem_desc_lookup(u64 phys_addr, efi_memory_desc_t *out_md)</div><div class='ctx'> 	__weak __alias(__efi_mem_desc_lookup);</div><div class='add'>+EXPORT_SYMBOL_GPL(efi_mem_desc_lookup);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Calculate the highest address of an efi memory descriptor.</div><div class='head'>diff --git a/drivers/firmware/efi/libstub/Makefile b/drivers/firmware/efi/libstub/Makefile<br/>index d23a1b9fed75..2f173391b63d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/libstub/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/efi/libstub/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/efi/libstub/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/efi/libstub/Makefile</a></div><div class='hunk'>@@ -85,7 +85,6 @@ lib-$(CONFIG_EFI_GENERIC_STUB)	+= efi-stub.o string.o intrinsics.o systable.o \</div><div class='ctx'> lib-$(CONFIG_ARM)		+= arm32-stub.o</div><div class='ctx'> lib-$(CONFIG_ARM64)		+= kaslr.o arm64.o arm64-stub.o smbios.o</div><div class='ctx'> lib-$(CONFIG_X86)		+= x86-stub.o smbios.o</div><div class='del'>-lib-$(CONFIG_EFI_MIXED)		+= x86-mixed.o</div><div class='ctx'> lib-$(CONFIG_X86_64)		+= x86-5lvl.o</div><div class='ctx'> lib-$(CONFIG_RISCV)		+= kaslr.o riscv.o riscv-stub.o</div><div class='ctx'> lib-$(CONFIG_LOONGARCH)		+= loongarch.o loongarch-stub.o</div><div class='head'>diff --git a/drivers/firmware/efi/libstub/x86-5lvl.c b/drivers/firmware/efi/libstub/x86-5lvl.c<br/>index 77359e802181..f1c5fb45d5f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/efi/libstub/x86-5lvl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/efi/libstub/x86-5lvl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/efi/libstub/x86-5lvl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/efi/libstub/x86-5lvl.c</a></div><div class='hunk'>@@ -62,7 +62,7 @@ efi_status_t efi_setup_5level_paging(void)</div><div class='ctx'> </div><div class='ctx'> void efi_5level_switch(void)</div><div class='ctx'> {</div><div class='del'>-	bool want_la57 = IS_ENABLED(CONFIG_X86_5LEVEL) &amp;&amp; !efi_no5lvl;</div><div class='add'>+	bool want_la57 = !efi_no5lvl;</div><div class='ctx'> 	bool have_la57 = native_read_cr4() &amp; X86_CR4_LA57;</div><div class='ctx'> 	bool need_toggle = want_la57 ^ have_la57;</div><div class='ctx'> 	u64 *pgt = (void *)la57_toggle + PAGE_SIZE;</div><div class='head'>diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c<br/>index a1ebbe9b73b1..38ca190d4a22 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/psci/psci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/psci/psci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/psci/psci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/psci/psci.c</a></div><div class='hunk'>@@ -804,8 +804,10 @@ int __init psci_dt_init(void)</div><div class='ctx'> </div><div class='ctx'> 	np = of_find_matching_node_and_match(NULL, psci_of_match, &amp;matched_np);</div><div class='ctx'> </div><div class='del'>-	if (!np || !of_device_is_available(np))</div><div class='add'>+	if (!np || !of_device_is_available(np)) {</div><div class='add'>+		of_node_put(np);</div><div class='ctx'> 		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	init_fn = (psci_initcall_t)matched_np-&gt;data;</div><div class='ctx'> 	ret = init_fn(np);</div><div class='head'>diff --git a/drivers/firmware/psci/psci_checker.c b/drivers/firmware/psci/psci_checker.c<br/>index b662b7e28b80..df02a4ec3398 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/psci/psci_checker.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/psci/psci_checker.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/psci/psci_checker.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/psci/psci_checker.c</a></div><div class='hunk'>@@ -343,7 +343,7 @@ static int suspend_test_thread(void *arg)</div><div class='ctx'> 	 * later.</div><div class='ctx'> 	 */</div><div class='ctx'> 	timer_delete(&amp;wakeup_timer);</div><div class='del'>-	destroy_timer_on_stack(&amp;wakeup_timer);</div><div class='add'>+	timer_destroy_on_stack(&amp;wakeup_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (atomic_dec_return_relaxed(&amp;nb_active_threads) == 0)</div><div class='ctx'> 		complete(&amp;suspend_threads_done);</div><div class='head'>diff --git a/drivers/firmware/samsung/exynos-acpm.c b/drivers/firmware/samsung/exynos-acpm.c<br/>index a85b2dbdd9f0..15e991b99f5a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/samsung/exynos-acpm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/samsung/exynos-acpm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/samsung/exynos-acpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/samsung/exynos-acpm.c</a></div><div class='hunk'>@@ -185,6 +185,29 @@ struct acpm_match_data {</div><div class='ctx'> #define handle_to_acpm_info(h) container_of(h, struct acpm_info, handle)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * acpm_get_saved_rx() - get the response if it was already saved.</div><div class='add'>+ * @achan:	ACPM channel info.</div><div class='add'>+ * @xfer:	reference to the transfer to get response for.</div><div class='add'>+ * @tx_seqnum:	xfer TX sequence number.</div><div class='add'>+ */</div><div class='add'>+static void acpm_get_saved_rx(struct acpm_chan *achan,</div><div class='add'>+			      const struct acpm_xfer *xfer, u32 tx_seqnum)</div><div class='add'>+{</div><div class='add'>+	const struct acpm_rx_data *rx_data = &amp;achan-&gt;rx_data[tx_seqnum - 1];</div><div class='add'>+	u32 rx_seqnum;</div><div class='add'>+</div><div class='add'>+	if (!rx_data-&gt;response)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM, rx_data-&gt;cmd[0]);</div><div class='add'>+</div><div class='add'>+	if (rx_seqnum == tx_seqnum) {</div><div class='add'>+		memcpy(xfer-&gt;rxd, rx_data-&gt;cmd, xfer-&gt;rxlen);</div><div class='add'>+		clear_bit(rx_seqnum - 1, achan-&gt;bitmap_seqnum);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * acpm_get_rx() - get response from RX queue.</div><div class='ctx'>  * @achan:	ACPM channel info.</div><div class='ctx'>  * @xfer:	reference to the transfer to get response for.</div><div class='hunk'>@@ -204,15 +227,16 @@ static int acpm_get_rx(struct acpm_chan *achan, const struct acpm_xfer *xfer)</div><div class='ctx'> 	rx_front = readl(achan-&gt;rx.front);</div><div class='ctx'> 	i = readl(achan-&gt;rx.rear);</div><div class='ctx'> </div><div class='del'>-	/* Bail out if RX is empty. */</div><div class='del'>-	if (i == rx_front)</div><div class='add'>+	tx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM, xfer-&gt;txd[0]);</div><div class='add'>+</div><div class='add'>+	if (i == rx_front) {</div><div class='add'>+		acpm_get_saved_rx(achan, xfer, tx_seqnum);</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	base = achan-&gt;rx.base;</div><div class='ctx'> 	mlen = achan-&gt;mlen;</div><div class='ctx'> </div><div class='del'>-	tx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM, xfer-&gt;txd[0]);</div><div class='del'>-</div><div class='ctx'> 	/* Drain RX queue. */</div><div class='ctx'> 	do {</div><div class='ctx'> 		/* Read RX seqnum. */</div><div class='hunk'>@@ -259,16 +283,8 @@ static int acpm_get_rx(struct acpm_chan *achan, const struct acpm_xfer *xfer)</div><div class='ctx'> 	 * If the response was not in this iteration of the queue, check if the</div><div class='ctx'> 	 * RX data was previously saved.</div><div class='ctx'> 	 */</div><div class='del'>-	rx_data = &amp;achan-&gt;rx_data[tx_seqnum - 1];</div><div class='del'>-	if (!rx_set &amp;&amp; rx_data-&gt;response) {</div><div class='del'>-		rx_seqnum = FIELD_GET(ACPM_PROTOCOL_SEQNUM,</div><div class='del'>-				      rx_data-&gt;cmd[0]);</div><div class='del'>-</div><div class='del'>-		if (rx_seqnum == tx_seqnum) {</div><div class='del'>-			memcpy(xfer-&gt;rxd, rx_data-&gt;cmd, xfer-&gt;rxlen);</div><div class='del'>-			clear_bit(rx_seqnum - 1, achan-&gt;bitmap_seqnum);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (!rx_set)</div><div class='add'>+		acpm_get_saved_rx(achan, xfer, tx_seqnum);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/firmware/smccc/kvm_guest.c b/drivers/firmware/smccc/kvm_guest.c<br/>index 5767aed25cdc..a123c05cbc9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/smccc/kvm_guest.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/smccc/kvm_guest.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/smccc/kvm_guest.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/smccc/kvm_guest.c</a></div><div class='hunk'>@@ -95,7 +95,7 @@ void  __init kvm_arm_target_impl_cpu_init(void)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; max_cpus; i++) {</div><div class='ctx'> 		arm_smccc_1_1_invoke(ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID,</div><div class='del'>-				     i, &amp;res);</div><div class='add'>+				     i, 0, 0, &amp;res);</div><div class='ctx'> 		if (res.a0 != SMCCC_RET_SUCCESS) {</div><div class='ctx'> 			pr_warn("Discovering target implementation CPUs failed\n");</div><div class='ctx'> 			goto mem_free;</div><div class='hunk'>@@ -103,7 +103,7 @@ void  __init kvm_arm_target_impl_cpu_init(void)</div><div class='ctx'> 		target[i].midr = res.a1;</div><div class='ctx'> 		target[i].revidr = res.a2;</div><div class='ctx'> 		target[i].aidr = res.a3;</div><div class='del'>-	};</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!cpu_errata_set_target_impl(max_cpus, target)) {</div><div class='ctx'> 		pr_warn("Failed to set target implementation CPUs\n");</div><div class='head'>diff --git a/drivers/firmware/stratix10-svc.c b/drivers/firmware/stratix10-svc.c<br/>index 3c52cb73237a..e3f990d888d7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/stratix10-svc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/stratix10-svc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/stratix10-svc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/stratix10-svc.c</a></div><div class='hunk'>@@ -1224,22 +1224,28 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!svc-&gt;intel_svc_fcs) {</div><div class='ctx'> 		dev_err(dev, "failed to allocate %s device\n", INTEL_FCS);</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='del'>-		goto err_unregister_dev;</div><div class='add'>+		goto err_unregister_rsu_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = platform_device_add(svc-&gt;intel_svc_fcs);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		platform_device_put(svc-&gt;intel_svc_fcs);</div><div class='del'>-		goto err_unregister_dev;</div><div class='add'>+		goto err_unregister_rsu_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = of_platform_default_populate(dev_of_node(dev), NULL, dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_unregister_fcs_dev;</div><div class='add'>+</div><div class='ctx'> 	dev_set_drvdata(dev, svc);</div><div class='ctx'> </div><div class='ctx'> 	pr_info("Intel Service Layer Driver Initialized\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_unregister_dev:</div><div class='add'>+err_unregister_fcs_dev:</div><div class='add'>+	platform_device_unregister(svc-&gt;intel_svc_fcs);</div><div class='add'>+err_unregister_rsu_dev:</div><div class='ctx'> 	platform_device_unregister(svc-&gt;stratix10_svc_rsu);</div><div class='ctx'> err_free_kfifo:</div><div class='ctx'> 	kfifo_free(&amp;controller-&gt;svc_fifo);</div><div class='hunk'>@@ -1253,6 +1259,8 @@ static void stratix10_svc_drv_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct stratix10_svc *svc = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='add'>+	of_platform_depopulate(ctrl-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	platform_device_unregister(svc-&gt;intel_svc_fcs);</div><div class='ctx'> 	platform_device_unregister(svc-&gt;stratix10_svc_rsu);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/firmware/sysfb_simplefb.c b/drivers/firmware/sysfb_simplefb.c<br/>index 75a186bf8f8e..592d8a644619 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/firmware/sysfb_simplefb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/firmware/sysfb_simplefb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/firmware/sysfb_simplefb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/firmware/sysfb_simplefb.c</a></div><div class='hunk'>@@ -35,36 +35,7 @@ __init bool sysfb_parse_mode(const struct screen_info *si,</div><div class='ctx'> 	if (type != VIDEO_TYPE_VLFB &amp;&amp; type != VIDEO_TYPE_EFI)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * The meaning of depth and bpp for direct-color formats is</div><div class='del'>-	 * inconsistent:</div><div class='del'>-	 *</div><div class='del'>-	 *  - DRM format info specifies depth as the number of color</div><div class='del'>-	 *    bits; including alpha, but not including filler bits.</div><div class='del'>-	 *  - Linux' EFI platform code computes lfb_depth from the</div><div class='del'>-	 *    individual color channels, including the reserved bits.</div><div class='del'>-	 *  - VBE 1.1 defines lfb_depth for XRGB1555 as 16, but later</div><div class='del'>-	 *    versions use 15.</div><div class='del'>-	 *  - On the kernel command line, 'bpp' of 32 is usually</div><div class='del'>-	 *    XRGB8888 including the filler bits, but 15 is XRGB1555</div><div class='del'>-	 *    not including the filler bit.</div><div class='del'>-	 *</div><div class='del'>-	 * It's not easily possible to fix this in struct screen_info,</div><div class='del'>-	 * as this could break UAPI. The best solution is to compute</div><div class='del'>-	 * bits_per_pixel from the color bits, reserved bits and</div><div class='del'>-	 * reported lfb_depth, whichever is highest.  In the loop below,</div><div class='del'>-	 * ignore simplefb formats with alpha bits, as EFI and VESA</div><div class='del'>-	 * don't specify alpha channels.</div><div class='del'>-	 */</div><div class='del'>-	if (si-&gt;lfb_depth &gt; 8) {</div><div class='del'>-		bits_per_pixel = max(max3(si-&gt;red_size + si-&gt;red_pos,</div><div class='del'>-					  si-&gt;green_size + si-&gt;green_pos,</div><div class='del'>-					  si-&gt;blue_size + si-&gt;blue_pos),</div><div class='del'>-				     si-&gt;rsvd_size + si-&gt;rsvd_pos);</div><div class='del'>-		bits_per_pixel = max_t(u32, bits_per_pixel, si-&gt;lfb_depth);</div><div class='del'>-	} else {</div><div class='del'>-		bits_per_pixel = si-&gt;lfb_depth;</div><div class='del'>-	}</div><div class='add'>+	bits_per_pixel = __screen_info_lfb_bits_per_pixel(si);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(formats); ++i) {</div><div class='ctx'> 		const struct simplefb_format *f = &amp;formats[i];</div><div class='head'>diff --git a/drivers/fpga/tests/fpga-bridge-test.c b/drivers/fpga/tests/fpga-bridge-test.c<br/>index b9ab29809e96..124ba40e32b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/fpga/tests/fpga-bridge-test.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fpga/tests/fpga-bridge-test.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/fpga/tests/fpga-bridge-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/fpga/tests/fpga-bridge-test.c</a></div><div class='hunk'>@@ -170,4 +170,5 @@ static struct kunit_suite fpga_bridge_suite = {</div><div class='ctx'> </div><div class='ctx'> kunit_test_suite(fpga_bridge_suite);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("KUnit test for the FPGA Bridge");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/fpga/tests/fpga-mgr-test.c b/drivers/fpga/tests/fpga-mgr-test.c<br/>index 9cb37aefbac4..8748babb0504 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/fpga/tests/fpga-mgr-test.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fpga/tests/fpga-mgr-test.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/fpga/tests/fpga-mgr-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/fpga/tests/fpga-mgr-test.c</a></div><div class='hunk'>@@ -330,4 +330,5 @@ static struct kunit_suite fpga_mgr_suite = {</div><div class='ctx'> </div><div class='ctx'> kunit_test_suite(fpga_mgr_suite);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("KUnit test for the FPGA Manager");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/fpga/tests/fpga-region-test.c b/drivers/fpga/tests/fpga-region-test.c<br/>index 6a108cafded8..020ceac48509 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/fpga/tests/fpga-region-test.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fpga/tests/fpga-region-test.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/fpga/tests/fpga-region-test.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/fpga/tests/fpga-region-test.c</a></div><div class='hunk'>@@ -214,4 +214,5 @@ static struct kunit_suite fpga_region_suite = {</div><div class='ctx'> </div><div class='ctx'> kunit_test_suite(fpga_region_suite);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("KUnit test for the FPGA Region");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/fwctl/main.c b/drivers/fwctl/main.c<br/>index cb1ac9c40239..bc6378506296 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/fwctl/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fwctl/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/fwctl/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/fwctl/main.c</a></div><div class='hunk'>@@ -105,7 +105,7 @@ static int fwctl_cmd_rpc(struct fwctl_ucmd *ucmd)</div><div class='ctx'> 		if (!test_and_set_bit(0, &amp;fwctl_tainted)) {</div><div class='ctx'> 			dev_warn(</div><div class='ctx'> 				&amp;fwctl-&gt;dev,</div><div class='del'>-				"%s(%d): has requested full access to the physical device device",</div><div class='add'>+				"%s(%d): has requested full access to the physical device",</div><div class='ctx'> 				current-&gt;comm, task_pid_nr(current));</div><div class='ctx'> 			add_taint(TAINT_FWCTL, LOCKDEP_STILL_OK);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/fwctl/pds/main.c b/drivers/fwctl/pds/main.c<br/>index 284c4165fdd4..9b9d1f6b5556 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/fwctl/pds/main.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/fwctl/pds/main.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/fwctl/pds/main.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/fwctl/pds/main.c</a></div><div class='hunk'>@@ -105,12 +105,14 @@ static int pdsfc_identify(struct pdsfc_dev *pdsfc)</div><div class='ctx'> static void pdsfc_free_endpoints(struct pdsfc_dev *pdsfc)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdsfc-&gt;fwctl.dev;</div><div class='add'>+	u32 num_endpoints;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!pdsfc-&gt;endpoints)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; pdsfc-&gt;endpoint_info &amp;&amp; i &lt; pdsfc-&gt;endpoints-&gt;num_entries; i++)</div><div class='add'>+	num_endpoints = le32_to_cpu(pdsfc-&gt;endpoints-&gt;num_entries);</div><div class='add'>+	for (i = 0; pdsfc-&gt;endpoint_info &amp;&amp; i &lt; num_endpoints; i++)</div><div class='ctx'> 		mutex_destroy(&amp;pdsfc-&gt;endpoint_info[i].lock);</div><div class='ctx'> 	vfree(pdsfc-&gt;endpoint_info);</div><div class='ctx'> 	pdsfc-&gt;endpoint_info = NULL;</div><div class='hunk'>@@ -199,7 +201,7 @@ static int pdsfc_init_endpoints(struct pdsfc_dev *pdsfc)</div><div class='ctx'> 	ep_entry = (struct pds_fwctl_query_data_endpoint *)pdsfc-&gt;endpoints-&gt;entries;</div><div class='ctx'> 	for (i = 0; i &lt; num_endpoints; i++) {</div><div class='ctx'> 		mutex_init(&amp;pdsfc-&gt;endpoint_info[i].lock);</div><div class='del'>-		pdsfc-&gt;endpoint_info[i].endpoint = ep_entry[i].id;</div><div class='add'>+		pdsfc-&gt;endpoint_info[i].endpoint = le32_to_cpu(ep_entry[i].id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -214,6 +216,7 @@ static struct pds_fwctl_query_data *pdsfc_get_operations(struct pdsfc_dev *pdsfc</div><div class='ctx'> 	struct pds_fwctl_query_data *data;</div><div class='ctx'> 	union pds_core_adminq_cmd cmd;</div><div class='ctx'> 	dma_addr_t data_pa;</div><div class='add'>+	u32 num_entries;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -246,8 +249,9 @@ static struct pds_fwctl_query_data *pdsfc_get_operations(struct pdsfc_dev *pdsfc</div><div class='ctx'> 	*pa = data_pa;</div><div class='ctx'> </div><div class='ctx'> 	entries = (struct pds_fwctl_query_data_operation *)data-&gt;entries;</div><div class='del'>-	dev_dbg(dev, "num_entries %d\n", data-&gt;num_entries);</div><div class='del'>-	for (i = 0; i &lt; data-&gt;num_entries; i++) {</div><div class='add'>+	num_entries = le32_to_cpu(data-&gt;num_entries);</div><div class='add'>+	dev_dbg(dev, "num_entries %d\n", num_entries);</div><div class='add'>+	for (i = 0; i &lt; num_entries; i++) {</div><div class='ctx'> </div><div class='ctx'> 		/* Translate FW command attribute to fwctl scope */</div><div class='ctx'> 		switch (entries[i].scope) {</div><div class='hunk'>@@ -267,7 +271,7 @@ static struct pds_fwctl_query_data *pdsfc_get_operations(struct pdsfc_dev *pdsfc</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		dev_dbg(dev, "endpoint %d operation: id %x scope %d\n",</div><div class='del'>-			ep, entries[i].id, entries[i].scope);</div><div class='add'>+			ep, le32_to_cpu(entries[i].id), entries[i].scope);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return data;</div><div class='hunk'>@@ -280,24 +284,26 @@ static int pdsfc_validate_rpc(struct pdsfc_dev *pdsfc,</div><div class='ctx'> 	struct pds_fwctl_query_data_operation *op_entry;</div><div class='ctx'> 	struct pdsfc_rpc_endpoint_info *ep_info = NULL;</div><div class='ctx'> 	struct device *dev = &amp;pdsfc-&gt;fwctl.dev;</div><div class='add'>+	u32 num_entries;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* validate rpc in_len &amp; out_len based</div><div class='ctx'> 	 * on ident.max_req_sz &amp; max_resp_sz</div><div class='ctx'> 	 */</div><div class='del'>-	if (rpc-&gt;in.len &gt; pdsfc-&gt;ident.max_req_sz) {</div><div class='add'>+	if (rpc-&gt;in.len &gt; le32_to_cpu(pdsfc-&gt;ident.max_req_sz)) {</div><div class='ctx'> 		dev_dbg(dev, "Invalid request size %u, max %u\n",</div><div class='del'>-			rpc-&gt;in.len, pdsfc-&gt;ident.max_req_sz);</div><div class='add'>+			rpc-&gt;in.len, le32_to_cpu(pdsfc-&gt;ident.max_req_sz));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (rpc-&gt;out.len &gt; pdsfc-&gt;ident.max_resp_sz) {</div><div class='add'>+	if (rpc-&gt;out.len &gt; le32_to_cpu(pdsfc-&gt;ident.max_resp_sz)) {</div><div class='ctx'> 		dev_dbg(dev, "Invalid response size %u, max %u\n",</div><div class='del'>-			rpc-&gt;out.len, pdsfc-&gt;ident.max_resp_sz);</div><div class='add'>+			rpc-&gt;out.len, le32_to_cpu(pdsfc-&gt;ident.max_resp_sz));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pdsfc-&gt;endpoints-&gt;num_entries; i++) {</div><div class='add'>+	num_entries = le32_to_cpu(pdsfc-&gt;endpoints-&gt;num_entries);</div><div class='add'>+	for (i = 0; i &lt; num_entries; i++) {</div><div class='ctx'> 		if (pdsfc-&gt;endpoint_info[i].endpoint == rpc-&gt;in.ep) {</div><div class='ctx'> 			ep_info = &amp;pdsfc-&gt;endpoint_info[i];</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -326,8 +332,9 @@ static int pdsfc_validate_rpc(struct pdsfc_dev *pdsfc,</div><div class='ctx'> </div><div class='ctx'> 	/* reject unsupported and/or out of scope commands */</div><div class='ctx'> 	op_entry = (struct pds_fwctl_query_data_operation *)ep_info-&gt;operations-&gt;entries;</div><div class='del'>-	for (i = 0; i &lt; ep_info-&gt;operations-&gt;num_entries; i++) {</div><div class='del'>-		if (PDS_FWCTL_RPC_OPCODE_CMP(rpc-&gt;in.op, op_entry[i].id)) {</div><div class='add'>+	num_entries = le32_to_cpu(ep_info-&gt;operations-&gt;num_entries);</div><div class='add'>+	for (i = 0; i &lt; num_entries; i++) {</div><div class='add'>+		if (PDS_FWCTL_RPC_OPCODE_CMP(rpc-&gt;in.op, le32_to_cpu(op_entry[i].id))) {</div><div class='ctx'> 			if (scope &lt; op_entry[i].scope)</div><div class='ctx'> 				return -EPERM;</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -402,7 +409,7 @@ static void *pdsfc_fw_rpc(struct fwctl_uctx *uctx, enum fwctl_rpc_scope scope,</div><div class='ctx'> 	cmd = (union pds_core_adminq_cmd) {</div><div class='ctx'> 		.fwctl_rpc = {</div><div class='ctx'> 			.opcode = PDS_FWCTL_CMD_RPC,</div><div class='del'>-			.flags = PDS_FWCTL_RPC_IND_REQ | PDS_FWCTL_RPC_IND_RESP,</div><div class='add'>+			.flags = cpu_to_le16(PDS_FWCTL_RPC_IND_REQ | PDS_FWCTL_RPC_IND_RESP),</div><div class='ctx'> 			.ep = cpu_to_le32(rpc-&gt;in.ep),</div><div class='ctx'> 			.op = cpu_to_le32(rpc-&gt;in.op),</div><div class='ctx'> 			.req_pa = cpu_to_le64(in_payload_dma_addr),</div><div class='head'>diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig<br/>index f2c39bbff83a..44f922e10db2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/Kconfig</a></div><div class='hunk'>@@ -201,6 +201,7 @@ config GPIO_RASPBERRYPI_EXP</div><div class='ctx'> config GPIO_BCM_KONA</div><div class='ctx'> 	bool "Broadcom Kona GPIO"</div><div class='ctx'> 	depends on ARCH_BCM_MOBILE || COMPILE_TEST</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Turn on GPIO support for Broadcom "Kona" chips.</div><div class='ctx'> </div><div class='hunk'>@@ -213,6 +214,18 @@ config GPIO_BCM_XGS_IPROC</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to enable GPIO support for Broadcom XGS iProc SoCs.</div><div class='ctx'> </div><div class='add'>+config GPIO_BLZP1600</div><div class='add'>+	tristate "Blaize BLZP1600 GPIO support"</div><div class='add'>+	default y if ARCH_BLAIZE</div><div class='add'>+	depends on ARCH_BLAIZE || COMPILE_TEST</div><div class='add'>+	depends on OF_GPIO</div><div class='add'>+	select GPIO_GENERIC</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='add'>+	help</div><div class='add'>+	  Say Y or M here to add support for the Blaize BLZP1600 GPIO device.</div><div class='add'>+	  The controller is based on the Verisilicon Microelectronics GPIO APB v0.2</div><div class='add'>+	  IP block.</div><div class='add'>+</div><div class='ctx'> config GPIO_BRCMSTB</div><div class='ctx'> 	tristate "BRCMSTB GPIO support"</div><div class='ctx'> 	default y if (ARCH_BRCMSTB || BMIPS_GENERIC)</div><div class='hunk'>@@ -241,6 +254,7 @@ config GPIO_DAVINCI</div><div class='ctx'> 	tristate "TI Davinci/Keystone GPIO support"</div><div class='ctx'> 	default y if ARCH_DAVINCI</div><div class='ctx'> 	depends on ((ARM || ARM64) &amp;&amp; (ARCH_DAVINCI || ARCH_KEYSTONE || ARCH_K3)) || COMPILE_TEST</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to enable GPIO support for TI Davinci/Keystone SoCs.</div><div class='ctx'> </div><div class='hunk'>@@ -340,7 +354,7 @@ config GPIO_GRGPIO</div><div class='ctx'> 	tristate "Aeroflex Gaisler GRGPIO support"</div><div class='ctx'> 	depends on OF || COMPILE_TEST</div><div class='ctx'> 	select GPIO_GENERIC</div><div class='del'>-	select IRQ_DOMAIN</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this to support Aeroflex Gaisler GRGPIO cores from the GRLIB</div><div class='ctx'> 	  VHDL IP core library.</div><div class='hunk'>@@ -368,8 +382,7 @@ config GPIO_HLWD</div><div class='ctx'> </div><div class='ctx'> config GPIO_ICH</div><div class='ctx'> 	tristate "Intel ICH GPIO"</div><div class='del'>-	depends on X86</div><div class='del'>-	depends on LPC_ICH</div><div class='add'>+	depends on (X86 &amp;&amp; LPC_ICH) || (COMPILE_TEST &amp;&amp; HAS_IOPORT)</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support the GPIO functionality of a number of Intel</div><div class='ctx'> 	  ICH-based chipsets.  Currently supported devices: ICH6, ICH7, ICH8</div><div class='hunk'>@@ -425,6 +438,7 @@ config GPIO_LPC18XX</div><div class='ctx'> 	default y if ARCH_LPC18XX</div><div class='ctx'> 	depends on OF_GPIO &amp;&amp; (ARCH_LPC18XX || COMPILE_TEST)</div><div class='ctx'> 	select IRQ_DOMAIN_HIERARCHY</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select this option to enable GPIO driver for</div><div class='ctx'> 	  NXP LPC18XX/43XX devices.</div><div class='hunk'>@@ -468,7 +482,7 @@ config GPIO_MPC8XXX</div><div class='ctx'> 		   FSL_SOC_BOOKE || PPC_86xx || ARCH_LAYERSCAPE || ARM || \</div><div class='ctx'> 		   COMPILE_TEST</div><div class='ctx'> 	select GPIO_GENERIC</div><div class='del'>-	select IRQ_DOMAIN</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you're going to use hardware that connects to the</div><div class='ctx'> 	  MPC512x/831x/834x/837x/8572/8610/QorIQ GPIOs.</div><div class='hunk'>@@ -540,7 +554,7 @@ config GPIO_OMAP</div><div class='ctx'> </div><div class='ctx'> config GPIO_PL061</div><div class='ctx'> 	tristate "PrimeCell PL061 GPIO support"</div><div class='del'>-	depends on ARM_AMBA</div><div class='add'>+	depends on ARM_AMBA || COMPILE_TEST</div><div class='ctx'> 	select IRQ_DOMAIN</div><div class='ctx'> 	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='hunk'>@@ -555,6 +569,7 @@ config GPIO_POLARFIRE_SOC</div><div class='ctx'> config GPIO_PXA</div><div class='ctx'> 	bool "PXA GPIO support"</div><div class='ctx'> 	depends on ARCH_PXA || ARCH_MMP || COMPILE_TEST</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support the PXA GPIO device.</div><div class='ctx'> </div><div class='hunk'>@@ -604,7 +619,7 @@ config GPIO_ROCKCHIP</div><div class='ctx'> </div><div class='ctx'> config GPIO_RTD</div><div class='ctx'> 	tristate "Realtek DHC GPIO support"</div><div class='del'>-	depends on ARCH_REALTEK</div><div class='add'>+	depends on ARCH_REALTEK || COMPILE_TEST</div><div class='ctx'> 	default y</div><div class='ctx'> 	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='hunk'>@@ -656,6 +671,15 @@ config GPIO_SNPS_CREG</div><div class='ctx'> 	  where only several fields in register belong to GPIO lines and</div><div class='ctx'> 	  each GPIO line owns a field with different length and on/off value.</div><div class='ctx'> </div><div class='add'>+config GPIO_SPACEMIT_K1</div><div class='add'>+	tristate "SPACEMIT K1 GPIO support"</div><div class='add'>+	depends on ARCH_SPACEMIT || COMPILE_TEST</div><div class='add'>+	depends on OF_GPIO</div><div class='add'>+	select GPIO_GENERIC</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to support the SpacemiT's K1 GPIO device.</div><div class='add'>+</div><div class='ctx'> config GPIO_SPEAR_SPICS</div><div class='ctx'> 	bool "ST SPEAr13xx SPI Chip Select as GPIO support"</div><div class='ctx'> 	depends on PLAT_SPEAR</div><div class='hunk'>@@ -753,7 +777,7 @@ config GPIO_UNIPHIER</div><div class='ctx'> 	  Say yes here to support UniPhier GPIOs.</div><div class='ctx'> </div><div class='ctx'> config GPIO_VF610</div><div class='del'>-	bool "VF610 GPIO support"</div><div class='add'>+	tristate "VF610 GPIO support"</div><div class='ctx'> 	default y if SOC_VF610</div><div class='ctx'> 	depends on ARCH_MXC || COMPILE_TEST</div><div class='ctx'> 	select GPIOLIB_IRQCHIP</div><div class='hunk'>@@ -830,14 +854,14 @@ config GPIO_ZEVIO</div><div class='ctx'> </div><div class='ctx'> config GPIO_ZYNQ</div><div class='ctx'> 	tristate "Xilinx Zynq GPIO support"</div><div class='del'>-	depends on ARCH_ZYNQ || ARCH_ZYNQMP</div><div class='add'>+	depends on ARCH_ZYNQ || ARCH_ZYNQMP || COMPILE_TEST</div><div class='ctx'> 	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support Xilinx Zynq GPIO controller.</div><div class='ctx'> </div><div class='ctx'> config GPIO_ZYNQMP_MODEPIN</div><div class='ctx'> 	tristate "ZynqMP ps-mode pin GPIO configuration driver"</div><div class='del'>-	depends on ZYNQMP_FIRMWARE</div><div class='add'>+	depends on ZYNQMP_FIRMWARE || COMPILE_TEST</div><div class='ctx'> 	default ZYNQMP_FIRMWARE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to support the ZynqMP ps-mode pin GPIO configuration</div><div class='hunk'>@@ -866,7 +890,7 @@ config GPIO_AMD_FCH</div><div class='ctx'> </div><div class='ctx'> config GPIO_MSC313</div><div class='ctx'> 	bool "MStar MSC313 GPIO support"</div><div class='del'>-	depends on ARCH_MSTARV7</div><div class='add'>+	depends on ARCH_MSTARV7 || COMPILE_TEST</div><div class='ctx'> 	default ARCH_MSTARV7</div><div class='ctx'> 	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	select IRQ_DOMAIN_HIERARCHY</div><div class='hunk'>@@ -1365,7 +1389,7 @@ config GPIO_DLN2</div><div class='ctx'> </div><div class='ctx'> config HTC_EGPIO</div><div class='ctx'> 	bool "HTC EGPIO support"</div><div class='del'>-	depends on ARM</div><div class='add'>+	depends on ARM || COMPILE_TEST</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the CPLD egpio chip present on</div><div class='ctx'> 	  several HTC phones.  It provides basic support for input</div><div class='hunk'>@@ -1463,6 +1487,19 @@ config GPIO_MAX77650</div><div class='ctx'> 	  GPIO driver for MAX77650/77651 PMIC from Maxim Semiconductor.</div><div class='ctx'> 	  These chips have a single pin that can be configured as GPIO.</div><div class='ctx'> </div><div class='add'>+config GPIO_MAX77759</div><div class='add'>+	tristate "Maxim Integrated MAX77759 GPIO support"</div><div class='add'>+	depends on MFD_MAX77759</div><div class='add'>+	default MFD_MAX77759</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='add'>+	help</div><div class='add'>+	  GPIO driver for MAX77759 PMIC from Maxim Integrated.</div><div class='add'>+	  There are two GPIOs available on these chips in total, both of</div><div class='add'>+	  which can also generate interrupts.</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module will be</div><div class='add'>+	  called gpio-max77759.</div><div class='add'>+</div><div class='ctx'> config GPIO_PALMAS</div><div class='ctx'> 	bool "TI PALMAS series PMICs GPIO"</div><div class='ctx'> 	depends on MFD_PALMAS</div><div class='hunk'>@@ -1520,12 +1557,13 @@ config GPIO_TC3589X</div><div class='ctx'> config GPIO_TIMBERDALE</div><div class='ctx'> 	bool "Support for timberdale GPIO IP"</div><div class='ctx'> 	depends on MFD_TIMBERDALE</div><div class='add'>+	select GPIOLIB_IRQCHIP</div><div class='ctx'> 	help</div><div class='ctx'> 	Add support for the GPIO IP in the timberdale FPGA.</div><div class='ctx'> </div><div class='ctx'> config GPIO_TN48M_CPLD</div><div class='ctx'> 	tristate "Delta Networks TN48M switch CPLD GPIO driver"</div><div class='del'>-	depends on MFD_TN48M_CPLD</div><div class='add'>+	depends on MFD_TN48M_CPLD || COMPILE_TEST</div><div class='ctx'> 	select GPIO_REGMAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables support for the GPIOs found on the Delta</div><div class='hunk'>@@ -1869,6 +1907,8 @@ menu "Virtual GPIO drivers"</div><div class='ctx'> </div><div class='ctx'> config GPIO_AGGREGATOR</div><div class='ctx'> 	tristate "GPIO Aggregator"</div><div class='add'>+	select CONFIGFS_FS</div><div class='add'>+	select DEV_SYNC_PROBE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say yes here to enable the GPIO Aggregator, which provides a way to</div><div class='ctx'> 	  aggregate existing GPIO lines into a new virtual GPIO chip.</div><div class='head'>diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile<br/>index af130882ffee..88dedd298256 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/Makefile</a></div><div class='hunk'>@@ -10,6 +10,7 @@ obj-$(CONFIG_OF_GPIO)		+= gpiolib-of.o</div><div class='ctx'> obj-$(CONFIG_GPIO_CDEV)		+= gpiolib-cdev.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SYSFS)	+= gpiolib-sysfs.o</div><div class='ctx'> obj-$(CONFIG_GPIO_ACPI)		+= gpiolib-acpi.o</div><div class='add'>+gpiolib-acpi-y			:= gpiolib-acpi-core.o gpiolib-acpi-quirks.o</div><div class='ctx'> obj-$(CONFIG_GPIOLIB)		+= gpiolib-swnode.o</div><div class='ctx'> </div><div class='ctx'> # Device drivers. Generally keep list sorted alphabetically</div><div class='hunk'>@@ -45,6 +46,7 @@ obj-$(CONFIG_GPIO_BCM_XGS_IPROC)	+= gpio-xgs-iproc.o</div><div class='ctx'> obj-$(CONFIG_GPIO_BD71815)		+= gpio-bd71815.o</div><div class='ctx'> obj-$(CONFIG_GPIO_BD71828)		+= gpio-bd71828.o</div><div class='ctx'> obj-$(CONFIG_GPIO_BD9571MWV)		+= gpio-bd9571mwv.o</div><div class='add'>+obj-$(CONFIG_GPIO_BLZP1600)		+= gpio-blzp1600.o</div><div class='ctx'> obj-$(CONFIG_GPIO_BRCMSTB)		+= gpio-brcmstb.o</div><div class='ctx'> obj-$(CONFIG_GPIO_BT8XX)		+= gpio-bt8xx.o</div><div class='ctx'> obj-$(CONFIG_GPIO_CADENCE)		+= gpio-cadence.o</div><div class='hunk'>@@ -105,6 +107,7 @@ obj-$(CONFIG_GPIO_MAX730X)		+= gpio-max730x.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MAX732X)		+= gpio-max732x.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MAX77620)		+= gpio-max77620.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MAX77650)		+= gpio-max77650.o</div><div class='add'>+obj-$(CONFIG_GPIO_MAX77759)		+= gpio-max77759.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MB86S7X)		+= gpio-mb86s7x.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MC33880)		+= gpio-mc33880.o</div><div class='ctx'> obj-$(CONFIG_GPIO_MENZ127)		+= gpio-menz127.o</div><div class='hunk'>@@ -159,6 +162,7 @@ obj-$(CONFIG_GPIO_SIOX)			+= gpio-siox.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SL28CPLD)		+= gpio-sl28cpld.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER) += gpio-sloppy-logic-analyzer.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SODAVILLE)		+= gpio-sodaville.o</div><div class='add'>+obj-$(CONFIG_GPIO_SPACEMIT_K1)		+= gpio-spacemit-k1.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SPEAR_SPICS)		+= gpio-spear-spics.o</div><div class='ctx'> obj-$(CONFIG_GPIO_SPRD)			+= gpio-sprd.o</div><div class='ctx'> obj-$(CONFIG_GPIO_STMPE)		+= gpio-stmpe.o</div><div class='head'>diff --git a/drivers/gpio/TODO b/drivers/gpio/TODO<br/>index b5f0a7a2e1bf..4a8b349f2483 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/TODO?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/TODO</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/TODO?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/TODO</a></div><div class='hunk'>@@ -44,6 +44,13 @@ Work items:</div><div class='ctx'>   to a machine description such as device tree, ACPI or fwnode that</div><div class='ctx'>   implicitly does not use global GPIO numbers.</div><div class='ctx'> </div><div class='add'>+- Fix drivers to not read back struct gpio_chip::base. Some drivers do</div><div class='add'>+  that and would be broken by attempts to poison it or make it dynamic.</div><div class='add'>+  Example in AT91 pinctrl driver:</div><div class='add'>+  https://lore.kernel.org/all/1d00c056-3d61-4c22-bedd-3bae0bf1ddc4@pengutronix.de/</div><div class='add'>+  This particular driver is also DT-only, so with the above fixed, the</div><div class='add'>+  base can be made dynamic (set to -1) if CONFIG_GPIO_SYSFS is disabled.</div><div class='add'>+</div><div class='ctx'> - When this work is complete (will require some of the items in the</div><div class='ctx'>   following ongoing work as well) we can delete the old global</div><div class='ctx'>   numberspace accessors from &lt;linux/gpio.h&gt; and eventually delete</div><div class='hunk'>@@ -186,3 +193,37 @@ their hardware offsets within the chip.</div><div class='ctx'> </div><div class='ctx'> Encourage users to switch to using them and eventually remove the existing</div><div class='ctx'> global export/unexport attribues.</div><div class='add'>+</div><div class='add'>+-------------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Remove GPIOD_FLAGS_BIT_NONEXCLUSIVE</div><div class='add'>+</div><div class='add'>+GPIOs in the linux kernel are meant to be an exclusive resource. This means</div><div class='add'>+that the GPIO descriptors (the software representation of the hardware concept)</div><div class='add'>+are not reference counted and - in general - only one user at a time can</div><div class='add'>+request a GPIO line and control its settings. The consumer API is designed</div><div class='add'>+around full control of the line's state as evidenced by the fact that, for</div><div class='add'>+instance, gpiod_set_value() does indeed drive the line as requested, instead</div><div class='add'>+of bumping an enable counter of some sort.</div><div class='add'>+</div><div class='add'>+A problematic use-case for GPIOs is when two consumers want to use the same</div><div class='add'>+descriptor independently. An example of such a user is the regulator subsystem</div><div class='add'>+which may instantiate several struct regulator_dev instances containing</div><div class='add'>+a struct device but using the same enable GPIO line.</div><div class='add'>+</div><div class='add'>+A workaround was introduced in the form of the GPIOD_FLAGS_BIT_NONEXCLUSIVE</div><div class='add'>+flag but its implementation is problematic: it does not provide any</div><div class='add'>+synchronization of usage nor did it introduce any enable count meaning the</div><div class='add'>+non-exclusive users of the same descriptor will in fact "fight" for the</div><div class='add'>+control over it. This flag should be removed and replaced with a better</div><div class='add'>+solution, possibly based on the new power sequencing subsystem.</div><div class='add'>+</div><div class='add'>+-------------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Remove devm_gpiod_unhinge()</div><div class='add'>+</div><div class='add'>+devm_gpiod_unhinge() is provided as a way to transfer the ownership of managed</div><div class='add'>+enable GPIOs to the regulator core. Rather than doing that however, we should</div><div class='add'>+make it possible for the regulator subsystem to deal with GPIO resources the</div><div class='add'>+lifetime of which it doesn't control as logically, a GPIO obtained by a caller</div><div class='add'>+should also be freed by it.</div><div class='head'>diff --git a/drivers/gpio/gpio-aggregator.c b/drivers/gpio/gpio-aggregator.c<br/>index d232ea865356..6f941db02c04 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-aggregator.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-aggregator.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-aggregator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-aggregator.c</a></div><div class='hunk'>@@ -9,10 +9,13 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/configfs.h&gt;</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/idr.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='ctx'> #include &lt;linux/mod_devicetable.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='hunk'>@@ -27,226 +30,200 @@</div><div class='ctx'> #include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/machine.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "dev-sync-probe.h"</div><div class='add'>+</div><div class='ctx'> #define AGGREGATOR_MAX_GPIOS 512</div><div class='add'>+#define AGGREGATOR_LEGACY_PREFIX "_sysfs"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * GPIO Aggregator sysfs interface</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> struct gpio_aggregator {</div><div class='add'>+	struct dev_sync_probe_data probe_data;</div><div class='add'>+	struct config_group group;</div><div class='ctx'> 	struct gpiod_lookup_table *lookups;</div><div class='del'>-	struct platform_device *pdev;</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	/* List of gpio_aggregator_line. Always added in order */</div><div class='add'>+	struct list_head list_head;</div><div class='add'>+</div><div class='add'>+	/* used by legacy sysfs interface only */</div><div class='add'>+	bool init_via_sysfs;</div><div class='ctx'> 	char args[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct gpio_aggregator_line {</div><div class='add'>+	struct config_group group;</div><div class='add'>+	struct gpio_aggregator *parent;</div><div class='add'>+	struct list_head entry;</div><div class='add'>+</div><div class='add'>+	/* Line index within the aggregator device */</div><div class='add'>+	unsigned int idx;</div><div class='add'>+</div><div class='add'>+	/* Custom name for the virtual line */</div><div class='add'>+	const char *name;</div><div class='add'>+	/* GPIO chip label or line name */</div><div class='add'>+	const char *key;</div><div class='add'>+	/* Can be negative to indicate lookup by line name */</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	enum gpio_lookup_flags flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gpio_aggregator_pdev_meta {</div><div class='add'>+	bool init_via_sysfs;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static DEFINE_MUTEX(gpio_aggregator_lock);	/* protects idr */</div><div class='ctx'> static DEFINE_IDR(gpio_aggregator_idr);</div><div class='ctx'> </div><div class='del'>-static int aggr_add_gpio(struct gpio_aggregator *aggr, const char *key,</div><div class='del'>-			 int hwnum, unsigned int *n)</div><div class='add'>+static int gpio_aggregator_alloc(struct gpio_aggregator **aggr, size_t arg_size)</div><div class='ctx'> {</div><div class='del'>-	struct gpiod_lookup_table *lookups;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	lookups = krealloc(aggr-&gt;lookups, struct_size(lookups, table, *n + 2),</div><div class='del'>-			   GFP_KERNEL);</div><div class='del'>-	if (!lookups)</div><div class='add'>+	struct gpio_aggregator *new __free(kfree) = kzalloc(</div><div class='add'>+					sizeof(*new) + arg_size, GFP_KERNEL);</div><div class='add'>+	if (!new)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	lookups-&gt;table[*n] = GPIO_LOOKUP_IDX(key, hwnum, NULL, *n, 0);</div><div class='add'>+	scoped_guard(mutex, &amp;gpio_aggregator_lock)</div><div class='add'>+		ret = idr_alloc(&amp;gpio_aggregator_idr, new, 0, 0, GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-	(*n)++;</div><div class='del'>-	memset(&amp;lookups-&gt;table[*n], 0, sizeof(lookups-&gt;table[*n]));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	aggr-&gt;lookups = lookups;</div><div class='add'>+	new-&gt;id = ret;</div><div class='add'>+	INIT_LIST_HEAD(&amp;new-&gt;list_head);</div><div class='add'>+	mutex_init(&amp;new-&gt;lock);</div><div class='add'>+	*aggr = no_free_ptr(new);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aggr_parse(struct gpio_aggregator *aggr)</div><div class='add'>+static void gpio_aggregator_free(struct gpio_aggregator *aggr)</div><div class='ctx'> {</div><div class='del'>-	char *args = skip_spaces(aggr-&gt;args);</div><div class='del'>-	char *name, *offsets, *p;</div><div class='del'>-	unsigned int i, n = 0;</div><div class='del'>-	int error = 0;</div><div class='del'>-</div><div class='del'>-	unsigned long *bitmap __free(bitmap) =</div><div class='del'>-			bitmap_alloc(AGGREGATOR_MAX_GPIOS, GFP_KERNEL);</div><div class='del'>-	if (!bitmap)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	args = next_arg(args, &amp;name, &amp;p);</div><div class='del'>-	while (*args) {</div><div class='del'>-		args = next_arg(args, &amp;offsets, &amp;p);</div><div class='del'>-</div><div class='del'>-		p = get_options(offsets, 0, &amp;error);</div><div class='del'>-		if (error == 0 || *p) {</div><div class='del'>-			/* Named GPIO line */</div><div class='del'>-			error = aggr_add_gpio(aggr, name, U16_MAX, &amp;n);</div><div class='del'>-			if (error)</div><div class='del'>-				return error;</div><div class='add'>+	scoped_guard(mutex, &amp;gpio_aggregator_lock)</div><div class='add'>+		idr_remove(&amp;gpio_aggregator_idr, aggr-&gt;id);</div><div class='ctx'> </div><div class='del'>-			name = offsets;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='add'>+	mutex_destroy(&amp;aggr-&gt;lock);</div><div class='add'>+	kfree(aggr);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		/* GPIO chip + offset(s) */</div><div class='del'>-		error = bitmap_parselist(offsets, bitmap, AGGREGATOR_MAX_GPIOS);</div><div class='del'>-		if (error) {</div><div class='del'>-			pr_err("Cannot parse %s: %d\n", offsets, error);</div><div class='del'>-			return error;</div><div class='del'>-		}</div><div class='add'>+static int gpio_aggregator_add_gpio(struct gpio_aggregator *aggr,</div><div class='add'>+				    const char *key, int hwnum, unsigned int *n)</div><div class='add'>+{</div><div class='add'>+	struct gpiod_lookup_table *lookups;</div><div class='ctx'> </div><div class='del'>-		for_each_set_bit(i, bitmap, AGGREGATOR_MAX_GPIOS) {</div><div class='del'>-			error = aggr_add_gpio(aggr, name, i, &amp;n);</div><div class='del'>-			if (error)</div><div class='del'>-				return error;</div><div class='del'>-		}</div><div class='add'>+	lookups = krealloc(aggr-&gt;lookups, struct_size(lookups, table, *n + 2),</div><div class='add'>+			   GFP_KERNEL);</div><div class='add'>+	if (!lookups)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		args = next_arg(args, &amp;name, &amp;p);</div><div class='del'>-	}</div><div class='add'>+	lookups-&gt;table[*n] = GPIO_LOOKUP_IDX(key, hwnum, NULL, *n, 0);</div><div class='ctx'> </div><div class='del'>-	if (!n) {</div><div class='del'>-		pr_err("No GPIOs specified\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	(*n)++;</div><div class='add'>+	memset(&amp;lookups-&gt;table[*n], 0, sizeof(lookups-&gt;table[*n]));</div><div class='ctx'> </div><div class='add'>+	aggr-&gt;lookups = lookups;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t new_device_store(struct device_driver *driver, const char *buf,</div><div class='del'>-				size_t count)</div><div class='add'>+static bool gpio_aggregator_is_active(struct gpio_aggregator *aggr)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_aggregator *aggr;</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	int res, id;</div><div class='add'>+	lockdep_assert_held(&amp;aggr-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (!try_module_get(THIS_MODULE))</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	/* kernfs guarantees string termination, so count + 1 is safe */</div><div class='del'>-	aggr = kzalloc(sizeof(*aggr) + count + 1, GFP_KERNEL);</div><div class='del'>-	if (!aggr) {</div><div class='del'>-		res = -ENOMEM;</div><div class='del'>-		goto put_module;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(aggr-&gt;args, buf, count + 1);</div><div class='add'>+	return aggr-&gt;probe_data.pdev &amp;&amp; platform_get_drvdata(aggr-&gt;probe_data.pdev);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	aggr-&gt;lookups = kzalloc(struct_size(aggr-&gt;lookups, table, 1),</div><div class='del'>-				GFP_KERNEL);</div><div class='del'>-	if (!aggr-&gt;lookups) {</div><div class='del'>-		res = -ENOMEM;</div><div class='del'>-		goto free_ga;</div><div class='del'>-	}</div><div class='add'>+/* Only aggregators created via legacy sysfs can be "activating". */</div><div class='add'>+static bool gpio_aggregator_is_activating(struct gpio_aggregator *aggr)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;aggr-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;gpio_aggregator_lock);</div><div class='del'>-	id = idr_alloc(&amp;gpio_aggregator_idr, aggr, 0, 0, GFP_KERNEL);</div><div class='del'>-	mutex_unlock(&amp;gpio_aggregator_lock);</div><div class='add'>+	return aggr-&gt;probe_data.pdev &amp;&amp; !platform_get_drvdata(aggr-&gt;probe_data.pdev);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (id &lt; 0) {</div><div class='del'>-		res = id;</div><div class='del'>-		goto free_table;</div><div class='del'>-	}</div><div class='add'>+static size_t gpio_aggregator_count_lines(struct gpio_aggregator *aggr)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;aggr-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	aggr-&gt;lookups-&gt;dev_id = kasprintf(GFP_KERNEL, "%s.%d", DRV_NAME, id);</div><div class='del'>-	if (!aggr-&gt;lookups-&gt;dev_id) {</div><div class='del'>-		res = -ENOMEM;</div><div class='del'>-		goto remove_idr;</div><div class='del'>-	}</div><div class='add'>+	return list_count_nodes(&amp;aggr-&gt;list_head);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	res = aggr_parse(aggr);</div><div class='del'>-	if (res)</div><div class='del'>-		goto free_dev_id;</div><div class='add'>+static struct gpio_aggregator_line *</div><div class='add'>+gpio_aggregator_line_alloc(struct gpio_aggregator *parent, unsigned int idx,</div><div class='add'>+			   char *key, int offset)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line;</div><div class='ctx'> </div><div class='del'>-	gpiod_add_lookup_table(aggr-&gt;lookups);</div><div class='add'>+	line = kzalloc(sizeof(*line), GFP_KERNEL);</div><div class='add'>+	if (!line)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	pdev = platform_device_register_simple(DRV_NAME, id, NULL, 0);</div><div class='del'>-	if (IS_ERR(pdev)) {</div><div class='del'>-		res = PTR_ERR(pdev);</div><div class='del'>-		goto remove_table;</div><div class='add'>+	if (key) {</div><div class='add'>+		line-&gt;key = kstrdup(key, GFP_KERNEL);</div><div class='add'>+		if (!line-&gt;key) {</div><div class='add'>+			kfree(line);</div><div class='add'>+			return ERR_PTR(-ENOMEM);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	aggr-&gt;pdev = pdev;</div><div class='del'>-	module_put(THIS_MODULE);</div><div class='del'>-	return count;</div><div class='add'>+	line-&gt;flags = GPIO_LOOKUP_FLAGS_DEFAULT;</div><div class='add'>+	line-&gt;parent = parent;</div><div class='add'>+	line-&gt;idx = idx;</div><div class='add'>+	line-&gt;offset = offset;</div><div class='add'>+	INIT_LIST_HEAD(&amp;line-&gt;entry);</div><div class='ctx'> </div><div class='del'>-remove_table:</div><div class='del'>-	gpiod_remove_lookup_table(aggr-&gt;lookups);</div><div class='del'>-free_dev_id:</div><div class='del'>-	kfree(aggr-&gt;lookups-&gt;dev_id);</div><div class='del'>-remove_idr:</div><div class='del'>-	mutex_lock(&amp;gpio_aggregator_lock);</div><div class='del'>-	idr_remove(&amp;gpio_aggregator_idr, id);</div><div class='del'>-	mutex_unlock(&amp;gpio_aggregator_lock);</div><div class='del'>-free_table:</div><div class='del'>-	kfree(aggr-&gt;lookups);</div><div class='del'>-free_ga:</div><div class='del'>-	kfree(aggr);</div><div class='del'>-put_module:</div><div class='del'>-	module_put(THIS_MODULE);</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DRIVER_ATTR_WO(new_device);</div><div class='del'>-</div><div class='del'>-static void gpio_aggregator_free(struct gpio_aggregator *aggr)</div><div class='del'>-{</div><div class='del'>-	platform_device_unregister(aggr-&gt;pdev);</div><div class='del'>-	gpiod_remove_lookup_table(aggr-&gt;lookups);</div><div class='del'>-	kfree(aggr-&gt;lookups-&gt;dev_id);</div><div class='del'>-	kfree(aggr-&gt;lookups);</div><div class='del'>-	kfree(aggr);</div><div class='add'>+	return line;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t delete_device_store(struct device_driver *driver,</div><div class='del'>-				   const char *buf, size_t count)</div><div class='add'>+static void gpio_aggregator_line_add(struct gpio_aggregator *aggr,</div><div class='add'>+				     struct gpio_aggregator_line *line)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_aggregator *aggr;</div><div class='del'>-	unsigned int id;</div><div class='del'>-	int error;</div><div class='add'>+	struct gpio_aggregator_line *tmp;</div><div class='ctx'> </div><div class='del'>-	if (!str_has_prefix(buf, DRV_NAME "."))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	lockdep_assert_held(&amp;aggr-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	error = kstrtouint(buf + strlen(DRV_NAME "."), 10, &amp;id);</div><div class='del'>-	if (error)</div><div class='del'>-		return error;</div><div class='del'>-</div><div class='del'>-	if (!try_module_get(THIS_MODULE))</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;gpio_aggregator_lock);</div><div class='del'>-	aggr = idr_remove(&amp;gpio_aggregator_idr, id);</div><div class='del'>-	mutex_unlock(&amp;gpio_aggregator_lock);</div><div class='del'>-	if (!aggr) {</div><div class='del'>-		module_put(THIS_MODULE);</div><div class='del'>-		return -ENOENT;</div><div class='add'>+	list_for_each_entry(tmp, &amp;aggr-&gt;list_head, entry) {</div><div class='add'>+		if (tmp-&gt;idx &gt; line-&gt;idx) {</div><div class='add'>+			list_add_tail(&amp;line-&gt;entry, &amp;tmp-&gt;entry);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	gpio_aggregator_free(aggr);</div><div class='del'>-	module_put(THIS_MODULE);</div><div class='del'>-	return count;</div><div class='add'>+	list_add_tail(&amp;line-&gt;entry, &amp;aggr-&gt;list_head);</div><div class='ctx'> }</div><div class='del'>-static DRIVER_ATTR_WO(delete_device);</div><div class='del'>-</div><div class='del'>-static struct attribute *gpio_aggregator_attrs[] = {</div><div class='del'>-	&amp;driver_attr_new_device.attr,</div><div class='del'>-	&amp;driver_attr_delete_device.attr,</div><div class='del'>-	NULL</div><div class='del'>-};</div><div class='del'>-ATTRIBUTE_GROUPS(gpio_aggregator);</div><div class='ctx'> </div><div class='del'>-static int __exit gpio_aggregator_idr_remove(int id, void *p, void *data)</div><div class='add'>+static void gpio_aggregator_line_del(struct gpio_aggregator *aggr,</div><div class='add'>+				     struct gpio_aggregator_line *line)</div><div class='ctx'> {</div><div class='del'>-	gpio_aggregator_free(p);</div><div class='del'>-	return 0;</div><div class='add'>+	lockdep_assert_held(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;line-&gt;entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __exit gpio_aggregator_remove_all(void)</div><div class='add'>+static void gpio_aggregator_free_lines(struct gpio_aggregator *aggr)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;gpio_aggregator_lock);</div><div class='del'>-	idr_for_each(&amp;gpio_aggregator_idr, gpio_aggregator_idr_remove, NULL);</div><div class='del'>-	idr_destroy(&amp;gpio_aggregator_idr);</div><div class='del'>-	mutex_unlock(&amp;gpio_aggregator_lock);</div><div class='add'>+	struct gpio_aggregator_line *line, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(line, tmp, &amp;aggr-&gt;list_head, entry) {</div><div class='add'>+		configfs_unregister_group(&amp;line-&gt;group);</div><div class='add'>+		/*</div><div class='add'>+		 * Normally, we acquire aggr-&gt;lock within the configfs</div><div class='add'>+		 * callback. However, in the legacy sysfs interface case,</div><div class='add'>+		 * calling configfs_(un)register_group while holding</div><div class='add'>+		 * aggr-&gt;lock could cause a deadlock. Fortunately, this is</div><div class='add'>+		 * unnecessary because the new_device/delete_device path</div><div class='add'>+		 * and the module unload path are mutually exclusive,</div><div class='add'>+		 * thanks to an explicit try_module_get. That's why this</div><div class='add'>+		 * minimal scoped_guard suffices.</div><div class='add'>+		 */</div><div class='add'>+		scoped_guard(mutex, &amp;aggr-&gt;lock)</div><div class='add'>+			gpio_aggregator_line_del(aggr, line);</div><div class='add'>+		kfree(line-&gt;key);</div><div class='add'>+		kfree(line-&gt;name);</div><div class='add'>+		kfree(line);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -582,6 +559,728 @@ static struct gpiochip_fwd *gpiochip_fwd_create(struct device *dev,</div><div class='ctx'> 	return fwd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Configfs interface</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static struct gpio_aggregator *</div><div class='add'>+to_gpio_aggregator(struct config_item *item)</div><div class='add'>+{</div><div class='add'>+	struct config_group *group = to_config_group(item);</div><div class='add'>+</div><div class='add'>+	return container_of(group, struct gpio_aggregator, group);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct gpio_aggregator_line *</div><div class='add'>+to_gpio_aggregator_line(struct config_item *item)</div><div class='add'>+{</div><div class='add'>+	struct config_group *group = to_config_group(item);</div><div class='add'>+</div><div class='add'>+	return container_of(group, struct gpio_aggregator_line, group);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct fwnode_handle *</div><div class='add'>+gpio_aggregator_make_device_sw_node(struct gpio_aggregator *aggr)</div><div class='add'>+{</div><div class='add'>+	struct property_entry properties[2];</div><div class='add'>+	struct gpio_aggregator_line *line;</div><div class='add'>+	size_t num_lines;</div><div class='add'>+	int n = 0;</div><div class='add'>+</div><div class='add'>+	memset(properties, 0, sizeof(properties));</div><div class='add'>+</div><div class='add'>+	num_lines = gpio_aggregator_count_lines(aggr);</div><div class='add'>+	if (num_lines == 0)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	const char **line_names __free(kfree) = kcalloc(</div><div class='add'>+				num_lines, sizeof(*line_names), GFP_KERNEL);</div><div class='add'>+	if (!line_names)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	/* The list is always sorted as new elements are inserted in order. */</div><div class='add'>+	list_for_each_entry(line, &amp;aggr-&gt;list_head, entry)</div><div class='add'>+		line_names[n++] = line-&gt;name ?: "";</div><div class='add'>+</div><div class='add'>+	properties[0] = PROPERTY_ENTRY_STRING_ARRAY_LEN(</div><div class='add'>+					"gpio-line-names",</div><div class='add'>+					line_names, num_lines);</div><div class='add'>+</div><div class='add'>+	return fwnode_create_software_node(properties, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gpio_aggregator_activate(struct gpio_aggregator *aggr)</div><div class='add'>+{</div><div class='add'>+	struct platform_device_info pdevinfo;</div><div class='add'>+	struct gpio_aggregator_line *line;</div><div class='add'>+	struct fwnode_handle *swnode;</div><div class='add'>+	unsigned int n = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (gpio_aggregator_count_lines(aggr) == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aggr-&gt;lookups = kzalloc(struct_size(aggr-&gt;lookups, table, 1),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!aggr-&gt;lookups)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	swnode = gpio_aggregator_make_device_sw_node(aggr);</div><div class='add'>+	if (IS_ERR(swnode)) {</div><div class='add'>+		ret = PTR_ERR(swnode);</div><div class='add'>+		goto err_remove_lookups;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;pdevinfo, 0, sizeof(pdevinfo));</div><div class='add'>+	pdevinfo.name = DRV_NAME;</div><div class='add'>+	pdevinfo.id = aggr-&gt;id;</div><div class='add'>+	pdevinfo.fwnode = swnode;</div><div class='add'>+</div><div class='add'>+	/* The list is always sorted as new elements are inserted in order. */</div><div class='add'>+	list_for_each_entry(line, &amp;aggr-&gt;list_head, entry) {</div><div class='add'>+		/*</div><div class='add'>+		 * - Either GPIO chip label or line name must be configured</div><div class='add'>+		 *   (i.e. line-&gt;key must be non-NULL)</div><div class='add'>+		 * - Line directories must be named with sequential numeric</div><div class='add'>+		 *   suffixes starting from 0. (i.e. ./line0, ./line1, ...)</div><div class='add'>+		 */</div><div class='add'>+		if (!line-&gt;key || line-&gt;idx != n) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err_remove_swnode;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (line-&gt;offset &lt; 0)</div><div class='add'>+			ret = gpio_aggregator_add_gpio(aggr, line-&gt;key,</div><div class='add'>+						       U16_MAX, &amp;n);</div><div class='add'>+		else</div><div class='add'>+			ret = gpio_aggregator_add_gpio(aggr, line-&gt;key,</div><div class='add'>+						       line-&gt;offset, &amp;n);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_remove_swnode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aggr-&gt;lookups-&gt;dev_id = kasprintf(GFP_KERNEL, "%s.%d", DRV_NAME, aggr-&gt;id);</div><div class='add'>+	if (!aggr-&gt;lookups-&gt;dev_id) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_remove_swnode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpiod_add_lookup_table(aggr-&gt;lookups);</div><div class='add'>+</div><div class='add'>+	ret = dev_sync_probe_register(&amp;aggr-&gt;probe_data, &amp;pdevinfo);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_remove_lookup_table;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_remove_lookup_table:</div><div class='add'>+	kfree(aggr-&gt;lookups-&gt;dev_id);</div><div class='add'>+	gpiod_remove_lookup_table(aggr-&gt;lookups);</div><div class='add'>+err_remove_swnode:</div><div class='add'>+	fwnode_remove_software_node(swnode);</div><div class='add'>+err_remove_lookups:</div><div class='add'>+	kfree(aggr-&gt;lookups);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gpio_aggregator_deactivate(struct gpio_aggregator *aggr)</div><div class='add'>+{</div><div class='add'>+	dev_sync_probe_unregister(&amp;aggr-&gt;probe_data);</div><div class='add'>+	gpiod_remove_lookup_table(aggr-&gt;lookups);</div><div class='add'>+	kfree(aggr-&gt;lookups-&gt;dev_id);</div><div class='add'>+	kfree(aggr-&gt;lookups);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gpio_aggregator_lockup_configfs(struct gpio_aggregator *aggr,</div><div class='add'>+					    bool lock)</div><div class='add'>+{</div><div class='add'>+	struct configfs_subsystem *subsys = aggr-&gt;group.cg_subsys;</div><div class='add'>+	struct gpio_aggregator_line *line;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The device only needs to depend on leaf lines. This is</div><div class='add'>+	 * sufficient to lock up all the configfs entries that the</div><div class='add'>+	 * instantiated, alive device depends on.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(line, &amp;aggr-&gt;list_head, entry) {</div><div class='add'>+		if (lock)</div><div class='add'>+			configfs_depend_item_unlocked(</div><div class='add'>+					subsys, &amp;line-&gt;group.cg_item);</div><div class='add'>+		else</div><div class='add'>+			configfs_undepend_item_unlocked(</div><div class='add'>+					&amp;line-&gt;group.cg_item);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_line_key_show(struct config_item *item, char *page)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line = to_gpio_aggregator_line(item);</div><div class='add'>+	struct gpio_aggregator *aggr = line-&gt;parent;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(page, "%s\n", line-&gt;key ?: "");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_line_key_store(struct config_item *item, const char *page,</div><div class='add'>+			       size_t count)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line = to_gpio_aggregator_line(item);</div><div class='add'>+	struct gpio_aggregator *aggr = line-&gt;parent;</div><div class='add'>+</div><div class='add'>+	char *key __free(kfree) = kstrndup(skip_spaces(page), count,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+	if (!key)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	strim(key);</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (gpio_aggregator_is_activating(aggr) ||</div><div class='add'>+	    gpio_aggregator_is_active(aggr))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	kfree(line-&gt;key);</div><div class='add'>+	line-&gt;key = no_free_ptr(key);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+CONFIGFS_ATTR(gpio_aggregator_line_, key);</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_line_name_show(struct config_item *item, char *page)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line = to_gpio_aggregator_line(item);</div><div class='add'>+	struct gpio_aggregator *aggr = line-&gt;parent;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(page, "%s\n", line-&gt;name ?: "");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_line_name_store(struct config_item *item, const char *page,</div><div class='add'>+				size_t count)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line = to_gpio_aggregator_line(item);</div><div class='add'>+	struct gpio_aggregator *aggr = line-&gt;parent;</div><div class='add'>+</div><div class='add'>+	char *name __free(kfree) = kstrndup(skip_spaces(page), count,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+	if (!name)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	strim(name);</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (gpio_aggregator_is_activating(aggr) ||</div><div class='add'>+	    gpio_aggregator_is_active(aggr))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	kfree(line-&gt;name);</div><div class='add'>+	line-&gt;name = no_free_ptr(name);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+CONFIGFS_ATTR(gpio_aggregator_line_, name);</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_line_offset_show(struct config_item *item, char *page)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line = to_gpio_aggregator_line(item);</div><div class='add'>+	struct gpio_aggregator *aggr = line-&gt;parent;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(page, "%d\n", line-&gt;offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_line_offset_store(struct config_item *item, const char *page,</div><div class='add'>+				  size_t count)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line = to_gpio_aggregator_line(item);</div><div class='add'>+	struct gpio_aggregator *aggr = line-&gt;parent;</div><div class='add'>+	int offset, ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoint(page, 0, &amp;offset);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * When offset == -1, 'key' represents a line name to lookup.</div><div class='add'>+	 * When 0 &lt;= offset &lt; 65535, 'key' represents the label of the chip with</div><div class='add'>+	 * the 'offset' value representing the line within that chip.</div><div class='add'>+	 *</div><div class='add'>+	 * GPIOLIB uses the U16_MAX value to indicate lookup by line name so</div><div class='add'>+	 * the greatest offset we can accept is (U16_MAX - 1).</div><div class='add'>+	 */</div><div class='add'>+	if (offset &gt; (U16_MAX - 1) || offset &lt; -1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (gpio_aggregator_is_activating(aggr) ||</div><div class='add'>+	    gpio_aggregator_is_active(aggr))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	line-&gt;offset = offset;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+CONFIGFS_ATTR(gpio_aggregator_line_, offset);</div><div class='add'>+</div><div class='add'>+static struct configfs_attribute *gpio_aggregator_line_attrs[] = {</div><div class='add'>+	&amp;gpio_aggregator_line_attr_key,</div><div class='add'>+	&amp;gpio_aggregator_line_attr_name,</div><div class='add'>+	&amp;gpio_aggregator_line_attr_offset,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_device_dev_name_show(struct config_item *item, char *page)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator *aggr = to_gpio_aggregator(item);</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	pdev = aggr-&gt;probe_data.pdev;</div><div class='add'>+	if (pdev)</div><div class='add'>+		return sysfs_emit(page, "%s\n", dev_name(&amp;pdev-&gt;dev));</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(page, "%s.%d\n", DRV_NAME, aggr-&gt;id);</div><div class='add'>+}</div><div class='add'>+CONFIGFS_ATTR_RO(gpio_aggregator_device_, dev_name);</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_device_live_show(struct config_item *item, char *page)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator *aggr = to_gpio_aggregator(item);</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(page, "%c\n",</div><div class='add'>+			  gpio_aggregator_is_active(aggr) ? '1' : '0');</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+gpio_aggregator_device_live_store(struct config_item *item, const char *page,</div><div class='add'>+				  size_t count)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator *aggr = to_gpio_aggregator(item);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	bool live;</div><div class='add'>+</div><div class='add'>+	ret = kstrtobool(page, &amp;live);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!try_module_get(THIS_MODULE))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (live &amp;&amp; !aggr-&gt;init_via_sysfs)</div><div class='add'>+		gpio_aggregator_lockup_configfs(aggr, true);</div><div class='add'>+</div><div class='add'>+	scoped_guard(mutex, &amp;aggr-&gt;lock) {</div><div class='add'>+		if (gpio_aggregator_is_activating(aggr) ||</div><div class='add'>+		    (live == gpio_aggregator_is_active(aggr)))</div><div class='add'>+			ret = -EPERM;</div><div class='add'>+		else if (live)</div><div class='add'>+			ret = gpio_aggregator_activate(aggr);</div><div class='add'>+		else</div><div class='add'>+			gpio_aggregator_deactivate(aggr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Undepend is required only if device disablement (live == 0)</div><div class='add'>+	 * succeeds or if device enablement (live == 1) fails.</div><div class='add'>+	 */</div><div class='add'>+	if (live == !!ret &amp;&amp; !aggr-&gt;init_via_sysfs)</div><div class='add'>+		gpio_aggregator_lockup_configfs(aggr, false);</div><div class='add'>+</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+</div><div class='add'>+	return ret ?: count;</div><div class='add'>+}</div><div class='add'>+CONFIGFS_ATTR(gpio_aggregator_device_, live);</div><div class='add'>+</div><div class='add'>+static struct configfs_attribute *gpio_aggregator_device_attrs[] = {</div><div class='add'>+	&amp;gpio_aggregator_device_attr_dev_name,</div><div class='add'>+	&amp;gpio_aggregator_device_attr_live,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+gpio_aggregator_line_release(struct config_item *item)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_line *line = to_gpio_aggregator_line(item);</div><div class='add'>+	struct gpio_aggregator *aggr = line-&gt;parent;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	gpio_aggregator_line_del(aggr, line);</div><div class='add'>+	kfree(line-&gt;key);</div><div class='add'>+	kfree(line-&gt;name);</div><div class='add'>+	kfree(line);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct configfs_item_operations gpio_aggregator_line_item_ops = {</div><div class='add'>+	.release	= gpio_aggregator_line_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct config_item_type gpio_aggregator_line_type = {</div><div class='add'>+	.ct_item_ops	= &amp;gpio_aggregator_line_item_ops,</div><div class='add'>+	.ct_attrs	= gpio_aggregator_line_attrs,</div><div class='add'>+	.ct_owner	= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gpio_aggregator_device_release(struct config_item *item)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator *aggr = to_gpio_aggregator(item);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * At this point, aggr is neither active nor activating,</div><div class='add'>+	 * so calling gpio_aggregator_deactivate() is always unnecessary.</div><div class='add'>+	 */</div><div class='add'>+	gpio_aggregator_free(aggr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct configfs_item_operations gpio_aggregator_device_item_ops = {</div><div class='add'>+	.release	= gpio_aggregator_device_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct config_group *</div><div class='add'>+gpio_aggregator_device_make_group(struct config_group *group, const char *name)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator *aggr = to_gpio_aggregator(&amp;group-&gt;cg_item);</div><div class='add'>+	struct gpio_aggregator_line *line;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+	int ret, nchar;</div><div class='add'>+</div><div class='add'>+	ret = sscanf(name, "line%u%n", &amp;idx, &amp;nchar);</div><div class='add'>+	if (ret != 1 || nchar != strlen(name))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	if (aggr-&gt;init_via_sysfs)</div><div class='add'>+		/*</div><div class='add'>+		 * Aggregators created via legacy sysfs interface are exposed as</div><div class='add'>+		 * default groups, which means rmdir(2) is prohibited for them.</div><div class='add'>+		 * For simplicity, and to avoid confusion, we also prohibit</div><div class='add'>+		 * mkdir(2).</div><div class='add'>+		 */</div><div class='add'>+		return ERR_PTR(-EPERM);</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;aggr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (gpio_aggregator_is_active(aggr))</div><div class='add'>+		return ERR_PTR(-EBUSY);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(line, &amp;aggr-&gt;list_head, entry)</div><div class='add'>+		if (line-&gt;idx == idx)</div><div class='add'>+			return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	line = gpio_aggregator_line_alloc(aggr, idx, NULL, -1);</div><div class='add'>+	if (IS_ERR(line))</div><div class='add'>+		return ERR_CAST(line);</div><div class='add'>+</div><div class='add'>+	config_group_init_type_name(&amp;line-&gt;group, name, &amp;gpio_aggregator_line_type);</div><div class='add'>+</div><div class='add'>+	gpio_aggregator_line_add(aggr, line);</div><div class='add'>+</div><div class='add'>+	return &amp;line-&gt;group;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct configfs_group_operations gpio_aggregator_device_group_ops = {</div><div class='add'>+	.make_group	= gpio_aggregator_device_make_group,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct config_item_type gpio_aggregator_device_type = {</div><div class='add'>+	.ct_group_ops	= &amp;gpio_aggregator_device_group_ops,</div><div class='add'>+	.ct_item_ops	= &amp;gpio_aggregator_device_item_ops,</div><div class='add'>+	.ct_attrs	= gpio_aggregator_device_attrs,</div><div class='add'>+	.ct_owner	= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct config_group *</div><div class='add'>+gpio_aggregator_make_group(struct config_group *group, const char *name)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator *aggr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * "_sysfs" prefix is reserved for auto-generated config group</div><div class='add'>+	 * for devices create via legacy sysfs interface.</div><div class='add'>+	 */</div><div class='add'>+	if (strncmp(name, AGGREGATOR_LEGACY_PREFIX,</div><div class='add'>+		    sizeof(AGGREGATOR_LEGACY_PREFIX) - 1) == 0)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	/* arg space is unneeded */</div><div class='add'>+	ret = gpio_aggregator_alloc(&amp;aggr, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	config_group_init_type_name(&amp;aggr-&gt;group, name, &amp;gpio_aggregator_device_type);</div><div class='add'>+	dev_sync_probe_init(&amp;aggr-&gt;probe_data);</div><div class='add'>+</div><div class='add'>+	return &amp;aggr-&gt;group;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct configfs_group_operations gpio_aggregator_group_ops = {</div><div class='add'>+	.make_group	= gpio_aggregator_make_group,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct config_item_type gpio_aggregator_type = {</div><div class='add'>+	.ct_group_ops	= &amp;gpio_aggregator_group_ops,</div><div class='add'>+	.ct_owner	= THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct configfs_subsystem gpio_aggregator_subsys = {</div><div class='add'>+	.su_group = {</div><div class='add'>+		.cg_item = {</div><div class='add'>+			.ci_namebuf	= DRV_NAME,</div><div class='add'>+			.ci_type	= &amp;gpio_aggregator_type,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Sysfs interface</div><div class='add'>+ */</div><div class='add'>+static int gpio_aggregator_parse(struct gpio_aggregator *aggr)</div><div class='add'>+{</div><div class='add'>+	char *args = skip_spaces(aggr-&gt;args);</div><div class='add'>+	struct gpio_aggregator_line *line;</div><div class='add'>+	char name[CONFIGFS_ITEM_NAME_LEN];</div><div class='add'>+	char *key, *offsets, *p;</div><div class='add'>+	unsigned int i, n = 0;</div><div class='add'>+	int error = 0;</div><div class='add'>+</div><div class='add'>+	unsigned long *bitmap __free(bitmap) =</div><div class='add'>+			bitmap_alloc(AGGREGATOR_MAX_GPIOS, GFP_KERNEL);</div><div class='add'>+	if (!bitmap)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	args = next_arg(args, &amp;key, &amp;p);</div><div class='add'>+	while (*args) {</div><div class='add'>+		args = next_arg(args, &amp;offsets, &amp;p);</div><div class='add'>+</div><div class='add'>+		p = get_options(offsets, 0, &amp;error);</div><div class='add'>+		if (error == 0 || *p) {</div><div class='add'>+			/* Named GPIO line */</div><div class='add'>+			scnprintf(name, sizeof(name), "line%u", n);</div><div class='add'>+			line = gpio_aggregator_line_alloc(aggr, n, key, -1);</div><div class='add'>+			if (IS_ERR(line)) {</div><div class='add'>+				error = PTR_ERR(line);</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+			config_group_init_type_name(&amp;line-&gt;group, name,</div><div class='add'>+						    &amp;gpio_aggregator_line_type);</div><div class='add'>+			error = configfs_register_group(&amp;aggr-&gt;group,</div><div class='add'>+							&amp;line-&gt;group);</div><div class='add'>+			if (error)</div><div class='add'>+				goto err;</div><div class='add'>+			scoped_guard(mutex, &amp;aggr-&gt;lock)</div><div class='add'>+				gpio_aggregator_line_add(aggr, line);</div><div class='add'>+</div><div class='add'>+			error = gpio_aggregator_add_gpio(aggr, key, U16_MAX, &amp;n);</div><div class='add'>+			if (error)</div><div class='add'>+				goto err;</div><div class='add'>+</div><div class='add'>+			key = offsets;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* GPIO chip + offset(s) */</div><div class='add'>+		error = bitmap_parselist(offsets, bitmap, AGGREGATOR_MAX_GPIOS);</div><div class='add'>+		if (error) {</div><div class='add'>+			pr_err("Cannot parse %s: %d\n", offsets, error);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(i, bitmap, AGGREGATOR_MAX_GPIOS) {</div><div class='add'>+			scnprintf(name, sizeof(name), "line%u", n);</div><div class='add'>+			line = gpio_aggregator_line_alloc(aggr, n, key, i);</div><div class='add'>+			if (IS_ERR(line)) {</div><div class='add'>+				error = PTR_ERR(line);</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+			config_group_init_type_name(&amp;line-&gt;group, name,</div><div class='add'>+						    &amp;gpio_aggregator_line_type);</div><div class='add'>+			error = configfs_register_group(&amp;aggr-&gt;group,</div><div class='add'>+							&amp;line-&gt;group);</div><div class='add'>+			if (error)</div><div class='add'>+				goto err;</div><div class='add'>+			scoped_guard(mutex, &amp;aggr-&gt;lock)</div><div class='add'>+				gpio_aggregator_line_add(aggr, line);</div><div class='add'>+</div><div class='add'>+			error = gpio_aggregator_add_gpio(aggr, key, i, &amp;n);</div><div class='add'>+			if (error)</div><div class='add'>+				goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		args = next_arg(args, &amp;key, &amp;p);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!n) {</div><div class='add'>+		pr_err("No GPIOs specified\n");</div><div class='add'>+		error = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	gpio_aggregator_free_lines(aggr);</div><div class='add'>+	return error;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t gpio_aggregator_new_device_store(struct device_driver *driver,</div><div class='add'>+						const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator_pdev_meta meta = { .init_via_sysfs = true };</div><div class='add'>+	char name[CONFIGFS_ITEM_NAME_LEN];</div><div class='add'>+	struct gpio_aggregator *aggr;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (!try_module_get(THIS_MODULE))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	/* kernfs guarantees string termination, so count + 1 is safe */</div><div class='add'>+	res = gpio_aggregator_alloc(&amp;aggr, count + 1);</div><div class='add'>+	if (res)</div><div class='add'>+		goto put_module;</div><div class='add'>+</div><div class='add'>+	memcpy(aggr-&gt;args, buf, count + 1);</div><div class='add'>+</div><div class='add'>+	aggr-&gt;init_via_sysfs = true;</div><div class='add'>+	aggr-&gt;lookups = kzalloc(struct_size(aggr-&gt;lookups, table, 1),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!aggr-&gt;lookups) {</div><div class='add'>+		res = -ENOMEM;</div><div class='add'>+		goto free_ga;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aggr-&gt;lookups-&gt;dev_id = kasprintf(GFP_KERNEL, "%s.%d", DRV_NAME, aggr-&gt;id);</div><div class='add'>+	if (!aggr-&gt;lookups-&gt;dev_id) {</div><div class='add'>+		res = -ENOMEM;</div><div class='add'>+		goto free_table;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	scnprintf(name, sizeof(name), "%s.%d", AGGREGATOR_LEGACY_PREFIX, aggr-&gt;id);</div><div class='add'>+	config_group_init_type_name(&amp;aggr-&gt;group, name, &amp;gpio_aggregator_device_type);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Since the device created by sysfs might be toggled via configfs</div><div class='add'>+	 * 'live' attribute later, this initialization is needed.</div><div class='add'>+	 */</div><div class='add'>+	dev_sync_probe_init(&amp;aggr-&gt;probe_data);</div><div class='add'>+</div><div class='add'>+	/* Expose to configfs */</div><div class='add'>+	res = configfs_register_group(&amp;gpio_aggregator_subsys.su_group,</div><div class='add'>+				      &amp;aggr-&gt;group);</div><div class='add'>+	if (res)</div><div class='add'>+		goto free_dev_id;</div><div class='add'>+</div><div class='add'>+	res = gpio_aggregator_parse(aggr);</div><div class='add'>+	if (res)</div><div class='add'>+		goto unregister_group;</div><div class='add'>+</div><div class='add'>+	gpiod_add_lookup_table(aggr-&gt;lookups);</div><div class='add'>+</div><div class='add'>+	pdev = platform_device_register_data(NULL, DRV_NAME, aggr-&gt;id, &amp;meta, sizeof(meta));</div><div class='add'>+	if (IS_ERR(pdev)) {</div><div class='add'>+		res = PTR_ERR(pdev);</div><div class='add'>+		goto remove_table;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aggr-&gt;probe_data.pdev = pdev;</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	return count;</div><div class='add'>+</div><div class='add'>+remove_table:</div><div class='add'>+	gpiod_remove_lookup_table(aggr-&gt;lookups);</div><div class='add'>+unregister_group:</div><div class='add'>+	configfs_unregister_group(&amp;aggr-&gt;group);</div><div class='add'>+free_dev_id:</div><div class='add'>+	kfree(aggr-&gt;lookups-&gt;dev_id);</div><div class='add'>+free_table:</div><div class='add'>+	kfree(aggr-&gt;lookups);</div><div class='add'>+free_ga:</div><div class='add'>+	gpio_aggregator_free(aggr);</div><div class='add'>+put_module:</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct driver_attribute driver_attr_gpio_aggregator_new_device =</div><div class='add'>+	__ATTR(new_device, 0200, NULL, gpio_aggregator_new_device_store);</div><div class='add'>+</div><div class='add'>+static void gpio_aggregator_destroy(struct gpio_aggregator *aggr)</div><div class='add'>+{</div><div class='add'>+	scoped_guard(mutex, &amp;aggr-&gt;lock) {</div><div class='add'>+		if (gpio_aggregator_is_activating(aggr) ||</div><div class='add'>+		    gpio_aggregator_is_active(aggr))</div><div class='add'>+			gpio_aggregator_deactivate(aggr);</div><div class='add'>+	}</div><div class='add'>+	gpio_aggregator_free_lines(aggr);</div><div class='add'>+	configfs_unregister_group(&amp;aggr-&gt;group);</div><div class='add'>+	kfree(aggr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t gpio_aggregator_delete_device_store(struct device_driver *driver,</div><div class='add'>+						   const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct gpio_aggregator *aggr;</div><div class='add'>+	unsigned int id;</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	if (!str_has_prefix(buf, DRV_NAME "."))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	error = kstrtouint(buf + strlen(DRV_NAME "."), 10, &amp;id);</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	if (!try_module_get(THIS_MODULE))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;gpio_aggregator_lock);</div><div class='add'>+	aggr = idr_find(&amp;gpio_aggregator_idr, id);</div><div class='add'>+	/*</div><div class='add'>+	 * For simplicity, devices created via configfs cannot be deleted</div><div class='add'>+	 * via sysfs.</div><div class='add'>+	 */</div><div class='add'>+	if (aggr &amp;&amp; aggr-&gt;init_via_sysfs)</div><div class='add'>+		idr_remove(&amp;gpio_aggregator_idr, id);</div><div class='add'>+	else {</div><div class='add'>+		mutex_unlock(&amp;gpio_aggregator_lock);</div><div class='add'>+		module_put(THIS_MODULE);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;gpio_aggregator_lock);</div><div class='add'>+</div><div class='add'>+	gpio_aggregator_destroy(aggr);</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct driver_attribute driver_attr_gpio_aggregator_delete_device =</div><div class='add'>+	__ATTR(delete_device, 0200, NULL, gpio_aggregator_delete_device_store);</div><div class='add'>+</div><div class='add'>+static struct attribute *gpio_aggregator_attrs[] = {</div><div class='add'>+	&amp;driver_attr_gpio_aggregator_new_device.attr,</div><div class='add'>+	&amp;driver_attr_gpio_aggregator_delete_device.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+ATTRIBUTE_GROUPS(gpio_aggregator);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *  GPIO Aggregator platform device</div><div class='hunk'>@@ -589,7 +1288,9 @@ static struct gpiochip_fwd *gpiochip_fwd_create(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> static int gpio_aggregator_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct gpio_aggregator_pdev_meta *meta;</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	bool init_via_sysfs = false;</div><div class='ctx'> 	struct gpio_desc **descs;</div><div class='ctx'> 	struct gpiochip_fwd *fwd;</div><div class='ctx'> 	unsigned long features;</div><div class='hunk'>@@ -603,10 +1304,28 @@ static int gpio_aggregator_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!descs)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	meta = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+	if (meta &amp;&amp; meta-&gt;init_via_sysfs)</div><div class='add'>+		init_via_sysfs = true;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; n; i++) {</div><div class='ctx'> 		descs[i] = devm_gpiod_get_index(dev, NULL, i, GPIOD_ASIS);</div><div class='del'>-		if (IS_ERR(descs[i]))</div><div class='add'>+		if (IS_ERR(descs[i])) {</div><div class='add'>+			/*</div><div class='add'>+			 * Deferred probing is not suitable when the aggregator</div><div class='add'>+			 * is created via configfs. They should just retry later</div><div class='add'>+			 * whenever they like. For device creation via sysfs,</div><div class='add'>+			 * error is propagated without overriding for backward</div><div class='add'>+			 * compatibility. .prevent_deferred_probe is kept unset</div><div class='add'>+			 * for other cases.</div><div class='add'>+			 */</div><div class='add'>+			if (!init_via_sysfs &amp;&amp; !dev_of_node(dev) &amp;&amp;</div><div class='add'>+			    descs[i] == ERR_PTR(-EPROBE_DEFER)) {</div><div class='add'>+				pr_warn("Deferred probe canceled for creation via configfs.\n");</div><div class='add'>+				return -ENODEV;</div><div class='add'>+			}</div><div class='ctx'> 			return PTR_ERR(descs[i]);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	features = (uintptr_t)device_get_match_data(dev);</div><div class='hunk'>@@ -640,9 +1359,63 @@ static struct platform_driver gpio_aggregator_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int __exit gpio_aggregator_idr_remove(int id, void *p, void *data)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * There should be no aggregator created via configfs, as their</div><div class='add'>+	 * presence would prevent module unloading.</div><div class='add'>+	 */</div><div class='add'>+	gpio_aggregator_destroy(p);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit gpio_aggregator_remove_all(void)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Configfs callbacks acquire gpio_aggregator_lock when accessing</div><div class='add'>+	 * gpio_aggregator_idr, so to prevent lock inversion deadlock, we</div><div class='add'>+	 * cannot protect idr_for_each invocation here with</div><div class='add'>+	 * gpio_aggregator_lock, as gpio_aggregator_idr_remove() accesses</div><div class='add'>+	 * configfs groups. Fortunately, the new_device/delete_device path</div><div class='add'>+	 * and the module unload path are mutually exclusive, thanks to an</div><div class='add'>+	 * explicit try_module_get inside of those driver attr handlers.</div><div class='add'>+	 * Also, when we reach here, no configfs entries present or being</div><div class='add'>+	 * created. Therefore, no need to protect with gpio_aggregator_lock</div><div class='add'>+	 * below.</div><div class='add'>+	 */</div><div class='add'>+	idr_for_each(&amp;gpio_aggregator_idr, gpio_aggregator_idr_remove, NULL);</div><div class='add'>+	idr_destroy(&amp;gpio_aggregator_idr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __init gpio_aggregator_init(void)</div><div class='ctx'> {</div><div class='del'>-	return platform_driver_register(&amp;gpio_aggregator_driver);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	config_group_init(&amp;gpio_aggregator_subsys.su_group);</div><div class='add'>+	mutex_init(&amp;gpio_aggregator_subsys.su_mutex);</div><div class='add'>+	ret = configfs_register_subsystem(&amp;gpio_aggregator_subsys);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Failed to register the '%s' configfs subsystem: %d\n",</div><div class='add'>+		       gpio_aggregator_subsys.su_group.cg_item.ci_namebuf, ret);</div><div class='add'>+		mutex_destroy(&amp;gpio_aggregator_subsys.su_mutex);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CAVEAT: This must occur after configfs registration. Otherwise,</div><div class='add'>+	 * a race condition could arise: driver attribute groups might be</div><div class='add'>+	 * exposed and accessed by users before configfs registration</div><div class='add'>+	 * completes. new_device_store() does not expect a partially</div><div class='add'>+	 * initialized configfs state.</div><div class='add'>+	 */</div><div class='add'>+	ret = platform_driver_register(&amp;gpio_aggregator_driver);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Failed to register the platform driver: %d\n", ret);</div><div class='add'>+		mutex_destroy(&amp;gpio_aggregator_subsys.su_mutex);</div><div class='add'>+		configfs_unregister_subsystem(&amp;gpio_aggregator_subsys);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> module_init(gpio_aggregator_init);</div><div class='ctx'> </div><div class='hunk'>@@ -650,6 +1423,7 @@ static void __exit gpio_aggregator_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	gpio_aggregator_remove_all();</div><div class='ctx'> 	platform_driver_unregister(&amp;gpio_aggregator_driver);</div><div class='add'>+	configfs_unregister_subsystem(&amp;gpio_aggregator_subsys);</div><div class='ctx'> }</div><div class='ctx'> module_exit(gpio_aggregator_exit);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c<br/>index 17c287dc7471..8f22cb36004d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-bcm-kona.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-bcm-kona.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-bcm-kona.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-bcm-kona.c</a></div><div class='hunk'>@@ -516,6 +516,7 @@ static struct irq_chip bcm_gpio_irq_chip = {</div><div class='ctx'> 	.irq_set_type = bcm_kona_gpio_irq_set_type,</div><div class='ctx'> 	.irq_request_resources = bcm_kona_gpio_irq_reqres,</div><div class='ctx'> 	.irq_release_resources = bcm_kona_gpio_irq_relres,</div><div class='add'>+	.flags = IRQCHIP_IMMUTABLE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct of_device_id const bcm_kona_gpio_of_match[] = {</div><div class='head'>diff --git a/drivers/gpio/gpio-blzp1600.c b/drivers/gpio/gpio-blzp1600.c<br/>new file mode 100644<br/>index 000000000000..055cb296ae54<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-blzp1600.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-blzp1600.c</a></div><div class='hunk'>@@ -0,0 +1,281 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2019 VeriSilicon Limited.</div><div class='add'>+ * Copyright (C) 2025 Blaize, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+</div><div class='add'>+#define GPIO_DIR_REG	0x00</div><div class='add'>+#define GPIO_CTRL_REG	0x04</div><div class='add'>+#define GPIO_SET_REG	0x08</div><div class='add'>+#define GPIO_CLR_REG	0x0C</div><div class='add'>+#define GPIO_ODATA_REG	0x10</div><div class='add'>+#define GPIO_IDATA_REG	0x14</div><div class='add'>+#define GPIO_IEN_REG	0x18</div><div class='add'>+#define GPIO_IS_REG	0x1C</div><div class='add'>+#define GPIO_IBE_REG	0x20</div><div class='add'>+#define GPIO_IEV_REG	0x24</div><div class='add'>+#define GPIO_RIS_REG	0x28</div><div class='add'>+#define GPIO_IM_REG	0x2C</div><div class='add'>+#define GPIO_MIS_REG	0x30</div><div class='add'>+#define GPIO_IC_REG	0x34</div><div class='add'>+#define GPIO_DB_REG	0x38</div><div class='add'>+#define GPIO_DFG_REG	0x3C</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "blzp1600-gpio"</div><div class='add'>+</div><div class='add'>+struct blzp1600_gpio {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	int irq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct blzp1600_gpio *get_blzp1600_gpio_from_irq_data(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	return gpiochip_get_data(irq_data_get_irq_chip_data(d));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct blzp1600_gpio *get_blzp1600_gpio_from_irq_desc(struct irq_desc *d)</div><div class='add'>+{</div><div class='add'>+	return gpiochip_get_data(irq_desc_get_handler_data(d));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 blzp1600_gpio_read(struct blzp1600_gpio *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	return readl_relaxed(chip-&gt;base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void blzp1600_gpio_write(struct blzp1600_gpio *chip, unsigned int offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	writel_relaxed(val, chip-&gt;base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void blzp1600_gpio_rmw(void __iomem *reg, u32 mask, bool set)</div><div class='add'>+{</div><div class='add'>+	u32 val = readl_relaxed(reg);</div><div class='add'>+</div><div class='add'>+	if (set)</div><div class='add'>+		val |= mask;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~mask;</div><div class='add'>+</div><div class='add'>+	writel_relaxed(val, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blzp1600_gpio_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d);</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;chip-&gt;gc.bgpio_lock);</div><div class='add'>+	blzp1600_gpio_rmw(chip-&gt;base + GPIO_IM_REG, BIT(d-&gt;hwirq), 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blzp1600_gpio_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d);</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;chip-&gt;gc.bgpio_lock);</div><div class='add'>+	blzp1600_gpio_rmw(chip-&gt;base + GPIO_IM_REG, BIT(d-&gt;hwirq), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blzp1600_gpio_irq_ack(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d);</div><div class='add'>+</div><div class='add'>+	blzp1600_gpio_write(chip, GPIO_IC_REG, BIT(d-&gt;hwirq));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blzp1600_gpio_irq_enable(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d);</div><div class='add'>+</div><div class='add'>+	gpiochip_enable_irq(&amp;chip-&gt;gc, irqd_to_hwirq(d));</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;chip-&gt;gc.bgpio_lock);</div><div class='add'>+	blzp1600_gpio_rmw(chip-&gt;base + GPIO_DIR_REG, BIT(d-&gt;hwirq), 0);</div><div class='add'>+	blzp1600_gpio_rmw(chip-&gt;base + GPIO_IEN_REG, BIT(d-&gt;hwirq), 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void blzp1600_gpio_irq_disable(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d);</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;chip-&gt;gc.bgpio_lock);</div><div class='add'>+	blzp1600_gpio_rmw(chip-&gt;base + GPIO_IEN_REG, BIT(d-&gt;hwirq), 0);</div><div class='add'>+	gpiochip_disable_irq(&amp;chip-&gt;gc, irqd_to_hwirq(d));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blzp1600_gpio_irq_set_type(struct irq_data *d, u32 type)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip = get_blzp1600_gpio_from_irq_data(d);</div><div class='add'>+	u32 edge_level, single_both, fall_rise;</div><div class='add'>+	int mask = BIT(d-&gt;hwirq);</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;chip-&gt;gc.bgpio_lock);</div><div class='add'>+	edge_level = blzp1600_gpio_read(chip, GPIO_IS_REG);</div><div class='add'>+	single_both = blzp1600_gpio_read(chip, GPIO_IBE_REG);</div><div class='add'>+	fall_rise = blzp1600_gpio_read(chip, GPIO_IEV_REG);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case IRQ_TYPE_EDGE_BOTH:</div><div class='add'>+		edge_level &amp;= ~mask;</div><div class='add'>+		single_both |= mask;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_TYPE_EDGE_RISING:</div><div class='add'>+		edge_level &amp;= ~mask;</div><div class='add'>+		single_both &amp;= ~mask;</div><div class='add'>+		fall_rise |= mask;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_TYPE_EDGE_FALLING:</div><div class='add'>+		edge_level &amp;= ~mask;</div><div class='add'>+		single_both &amp;= ~mask;</div><div class='add'>+		fall_rise &amp;= ~mask;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_TYPE_LEVEL_HIGH:</div><div class='add'>+		edge_level |= mask;</div><div class='add'>+		fall_rise |= mask;</div><div class='add'>+		break;</div><div class='add'>+	case IRQ_TYPE_LEVEL_LOW:</div><div class='add'>+		edge_level |= mask;</div><div class='add'>+		fall_rise &amp;= ~mask;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	blzp1600_gpio_write(chip, GPIO_IS_REG, edge_level);</div><div class='add'>+	blzp1600_gpio_write(chip, GPIO_IBE_REG, single_both);</div><div class='add'>+	blzp1600_gpio_write(chip, GPIO_IEV_REG, fall_rise);</div><div class='add'>+</div><div class='add'>+	if (type &amp; IRQ_TYPE_LEVEL_MASK)</div><div class='add'>+		irq_set_handler_locked(d, handle_level_irq);</div><div class='add'>+	else</div><div class='add'>+		irq_set_handler_locked(d, handle_edge_irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip blzp1600_gpio_irqchip = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.irq_ack = blzp1600_gpio_irq_ack,</div><div class='add'>+	.irq_mask = blzp1600_gpio_irq_mask,</div><div class='add'>+	.irq_unmask = blzp1600_gpio_irq_unmask,</div><div class='add'>+	.irq_set_type = blzp1600_gpio_irq_set_type,</div><div class='add'>+	.irq_enable = blzp1600_gpio_irq_enable,</div><div class='add'>+	.irq_disable = blzp1600_gpio_irq_disable,</div><div class='add'>+	.flags = IRQCHIP_IMMUTABLE | IRQCHIP_MASK_ON_SUSPEND,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void blzp1600_gpio_irqhandler(struct irq_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *gpio = get_blzp1600_gpio_from_irq_desc(desc);</div><div class='add'>+	struct irq_chip *irqchip = irq_desc_get_chip(desc);</div><div class='add'>+	unsigned long irq_status;</div><div class='add'>+	int hwirq = 0;</div><div class='add'>+</div><div class='add'>+	chained_irq_enter(irqchip, desc);</div><div class='add'>+	irq_status = blzp1600_gpio_read(gpio, GPIO_RIS_REG);</div><div class='add'>+	for_each_set_bit(hwirq, &amp;irq_status, gpio-&gt;gc.ngpio)</div><div class='add'>+		generic_handle_domain_irq(gpio-&gt;gc.irq.domain, hwirq);</div><div class='add'>+</div><div class='add'>+	chained_irq_exit(irqchip, desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blzp1600_gpio_set_debounce(struct gpio_chip *gc, unsigned int offset,</div><div class='add'>+				      unsigned int debounce)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip = gpiochip_get_data(gc);</div><div class='add'>+</div><div class='add'>+	guard(raw_spinlock_irqsave)(&amp;chip-&gt;gc.bgpio_lock);</div><div class='add'>+	blzp1600_gpio_rmw(chip-&gt;base + GPIO_DB_REG, BIT(offset), debounce);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blzp1600_gpio_set_config(struct gpio_chip *gc, unsigned int offset, unsigned long config)</div><div class='add'>+{</div><div class='add'>+	u32 debounce;</div><div class='add'>+</div><div class='add'>+	if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	debounce = pinconf_to_config_argument(config);</div><div class='add'>+	return blzp1600_gpio_set_debounce(gc, offset, debounce);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blzp1600_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct blzp1600_gpio *chip;</div><div class='add'>+	struct gpio_chip *gc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	chip = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip-&gt;base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(chip-&gt;base))</div><div class='add'>+		return PTR_ERR(chip-&gt;base);</div><div class='add'>+</div><div class='add'>+	ret = bgpio_init(&amp;chip-&gt;gc, &amp;pdev-&gt;dev, 4, chip-&gt;base + GPIO_IDATA_REG,</div><div class='add'>+			 chip-&gt;base + GPIO_SET_REG, chip-&gt;base + GPIO_CLR_REG,</div><div class='add'>+			 chip-&gt;base + GPIO_DIR_REG, NULL, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret, "Failed to register generic gpio\n");</div><div class='add'>+</div><div class='add'>+	/* configure the gpio chip */</div><div class='add'>+	gc = &amp;chip-&gt;gc;</div><div class='add'>+	gc-&gt;set_config = blzp1600_gpio_set_config;</div><div class='add'>+</div><div class='add'>+	if (device_property_present(&amp;pdev-&gt;dev, "interrupt-controller")) {</div><div class='add'>+		struct gpio_irq_chip *girq;</div><div class='add'>+</div><div class='add'>+		chip-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+		if (chip-&gt;irq &lt; 0)</div><div class='add'>+			return chip-&gt;irq;</div><div class='add'>+</div><div class='add'>+		girq = &amp;gc-&gt;irq;</div><div class='add'>+		gpio_irq_chip_set_chip(girq, &amp;blzp1600_gpio_irqchip);</div><div class='add'>+		girq-&gt;parent_handler = blzp1600_gpio_irqhandler;</div><div class='add'>+		girq-&gt;num_parents = 1;</div><div class='add'>+		girq-&gt;parents = devm_kcalloc(&amp;pdev-&gt;dev, 1, sizeof(*girq-&gt;parents), GFP_KERNEL);</div><div class='add'>+		if (!girq-&gt;parents)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		girq-&gt;parents[0] = chip-&gt;irq;</div><div class='add'>+		girq-&gt;default_type = IRQ_TYPE_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(&amp;pdev-&gt;dev, gc, chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id blzp1600_gpio_of_match[] = {</div><div class='add'>+	{ .compatible = "blaize,blzp1600-gpio", },</div><div class='add'>+	{ /* Sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, blzp1600_gpio_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver blzp1600_gpio_driver = {</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= DRIVER_NAME,</div><div class='add'>+		.of_match_table = blzp1600_gpio_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe		= blzp1600_gpio_probe,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(blzp1600_gpio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Nikolaos Pasaloukos &lt;nikolaos.pasaloukos@blaize.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Blaize BLZP1600 GPIO driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c<br/>index ca3472977431..e7671bcd5c07 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-brcmstb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-brcmstb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-brcmstb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-brcmstb.c</a></div><div class='hunk'>@@ -437,7 +437,7 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;irq_domain =</div><div class='del'>-		irq_domain_add_linear(np, priv-&gt;num_gpios,</div><div class='add'>+		irq_domain_create_linear(of_fwnode_handle(np), priv-&gt;num_gpios,</div><div class='ctx'> 				      &amp;brcmstb_gpio_irq_domain_ops,</div><div class='ctx'> 				      priv);</div><div class='ctx'> 	if (!priv-&gt;irq_domain) {</div><div class='head'>diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c<br/>index 63fc7888c1d4..80a82492171e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-davinci.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-davinci.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-davinci.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-davinci.c</a></div><div class='hunk'>@@ -68,15 +68,6 @@ static inline u32 __gpio_mask(unsigned gpio)</div><div class='ctx'> 	return 1 &lt;&lt; (gpio % 32);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct davinci_gpio_regs __iomem *irq2regs(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct davinci_gpio_regs __iomem *g;</div><div class='del'>-</div><div class='del'>-	g = (__force struct davinci_gpio_regs __iomem *)irq_data_get_irq_chip_data(d);</div><div class='del'>-</div><div class='del'>-	return g;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int davinci_gpio_irq_setup(struct platform_device *pdev);</div><div class='ctx'> </div><div class='ctx'> /*--------------------------------------------------------------------------*/</div><div class='hunk'>@@ -255,19 +246,27 @@ static int davinci_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> static void gpio_irq_mask(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct davinci_gpio_regs __iomem *g = irq2regs(d);</div><div class='add'>+	struct davinci_gpio_controller *chips = irq_data_get_irq_chip_data(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+	struct davinci_gpio_regs __iomem *g = chips-&gt;regs[hwirq / 32];</div><div class='ctx'> 	uintptr_t mask = (uintptr_t)irq_data_get_irq_handler_data(d);</div><div class='ctx'> </div><div class='ctx'> 	writel_relaxed(mask, &amp;g-&gt;clr_falling);</div><div class='ctx'> 	writel_relaxed(mask, &amp;g-&gt;clr_rising);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(&amp;chips-&gt;chip, hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gpio_irq_unmask(struct irq_data *d)</div><div class='ctx'> {</div><div class='del'>-	struct davinci_gpio_regs __iomem *g = irq2regs(d);</div><div class='add'>+	struct davinci_gpio_controller *chips = irq_data_get_irq_chip_data(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+	struct davinci_gpio_regs __iomem *g = chips-&gt;regs[hwirq / 32];</div><div class='ctx'> 	uintptr_t mask = (uintptr_t)irq_data_get_irq_handler_data(d);</div><div class='ctx'> 	unsigned status = irqd_get_trigger_type(d);</div><div class='ctx'> </div><div class='add'>+	gpiochip_enable_irq(&amp;chips-&gt;chip, hwirq);</div><div class='add'>+</div><div class='ctx'> 	status &amp;= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;</div><div class='ctx'> 	if (!status)</div><div class='ctx'> 		status = IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;</div><div class='hunk'>@@ -286,12 +285,13 @@ static int gpio_irq_type(struct irq_data *d, unsigned trigger)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip gpio_irqchip = {</div><div class='add'>+static const struct irq_chip gpio_irqchip = {</div><div class='ctx'> 	.name		= "GPIO",</div><div class='ctx'> 	.irq_unmask	= gpio_irq_unmask,</div><div class='ctx'> 	.irq_mask	= gpio_irq_mask,</div><div class='ctx'> 	.irq_set_type	= gpio_irq_type,</div><div class='del'>-	.flags		= IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+	.flags		= IRQCHIP_IMMUTABLE | IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void gpio_irq_handler(struct irq_desc *desc)</div><div class='hunk'>@@ -399,12 +399,11 @@ davinci_gpio_irq_map(struct irq_domain *d, unsigned int irq,</div><div class='ctx'> {</div><div class='ctx'> 	struct davinci_gpio_controller *chips =</div><div class='ctx'> 				(struct davinci_gpio_controller *)d-&gt;host_data;</div><div class='del'>-	struct davinci_gpio_regs __iomem *g = chips-&gt;regs[hw / 32];</div><div class='ctx'> </div><div class='ctx'> 	irq_set_chip_and_handler_name(irq, &amp;gpio_irqchip, handle_simple_irq,</div><div class='ctx'> 				"davinci_gpio");</div><div class='ctx'> 	irq_set_irq_type(irq, IRQ_TYPE_NONE);</div><div class='del'>-	irq_set_chip_data(irq, (__force void *)g);</div><div class='add'>+	irq_set_chip_data(irq, (__force void *)chips);</div><div class='ctx'> 	irq_set_handler_data(irq, (void *)(uintptr_t)__gpio_mask(hw));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -479,9 +478,8 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)</div><div class='ctx'> 			return irq;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		irq_domain = irq_domain_add_legacy(dev-&gt;of_node, ngpio, irq, 0,</div><div class='del'>-							&amp;davinci_gpio_irq_ops,</div><div class='del'>-							chips);</div><div class='add'>+		irq_domain = irq_domain_create_legacy(of_fwnode_handle(dev-&gt;of_node), ngpio, irq, 0,</div><div class='add'>+						      &amp;davinci_gpio_irq_ops, chips);</div><div class='ctx'> 		if (!irq_domain) {</div><div class='ctx'> 			dev_err(dev, "Couldn't register an IRQ domain\n");</div><div class='ctx'> 			return -ENODEV;</div><div class='head'>diff --git a/drivers/gpio/gpio-dln2.c b/drivers/gpio/gpio-dln2.c<br/>index 596da59d4b13..4bd3c47eaf93 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-dln2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-dln2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-dln2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-dln2.c</a></div><div class='hunk'>@@ -220,11 +220,12 @@ static int dln2_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return dln2_gpio_pin_get_out_val(dln2, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dln2_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int dln2_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			 int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct dln2_gpio *dln2 = gpiochip_get_data(chip);</div><div class='ctx'> </div><div class='del'>-	dln2_gpio_pin_set_out_val(dln2, offset, value);</div><div class='add'>+	return dln2_gpio_pin_set_out_val(dln2, offset, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dln2_gpio_set_direction(struct gpio_chip *chip, unsigned offset,</div><div class='hunk'>@@ -468,7 +469,7 @@ static int dln2_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	dln2-&gt;gpio.base = -1;</div><div class='ctx'> 	dln2-&gt;gpio.ngpio = pins;</div><div class='ctx'> 	dln2-&gt;gpio.can_sleep = true;</div><div class='del'>-	dln2-&gt;gpio.set = dln2_gpio_set;</div><div class='add'>+	dln2-&gt;gpio.set_rv = dln2_gpio_set;</div><div class='ctx'> 	dln2-&gt;gpio.get = dln2_gpio_get;</div><div class='ctx'> 	dln2-&gt;gpio.request = dln2_gpio_request;</div><div class='ctx'> 	dln2-&gt;gpio.free = dln2_gpio_free;</div><div class='head'>diff --git a/drivers/gpio/gpio-ds4520.c b/drivers/gpio/gpio-ds4520.c<br/>index 1903deaef3e9..f52ecae382a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ds4520.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ds4520.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ds4520.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-ds4520.c</a></div><div class='hunk'>@@ -25,7 +25,6 @@ static int ds4520_gpio_probe(struct i2c_client *client)</div><div class='ctx'> 	struct gpio_regmap_config config = { };</div><div class='ctx'> 	struct device *dev = &amp;client-&gt;dev;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='del'>-	u32 ngpio;</div><div class='ctx'> 	u32 base;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -33,10 +32,6 @@ static int ds4520_gpio_probe(struct i2c_client *client)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return dev_err_probe(dev, ret, "Missing 'reg' property.\n");</div><div class='ctx'> </div><div class='del'>-	ret = device_property_read_u32(dev, "ngpios", &amp;ngpio);</div><div class='del'>-	if (ret)</div><div class='del'>-		return dev_err_probe(dev, ret, "Missing 'ngpios' property.\n");</div><div class='del'>-</div><div class='ctx'> 	regmap = devm_regmap_init_i2c(client, &amp;ds4520_regmap_config);</div><div class='ctx'> 	if (IS_ERR(regmap))</div><div class='ctx'> 		return dev_err_probe(dev, PTR_ERR(regmap),</div><div class='hunk'>@@ -44,7 +39,6 @@ static int ds4520_gpio_probe(struct i2c_client *client)</div><div class='ctx'> </div><div class='ctx'> 	config.regmap = regmap;</div><div class='ctx'> 	config.parent = dev;</div><div class='del'>-	config.ngpio = ngpio;</div><div class='ctx'> </div><div class='ctx'> 	config.reg_dat_base = base + DS4520_IO_STATUS0;</div><div class='ctx'> 	config.reg_set_base = base + DS4520_PULLUP0;</div><div class='head'>diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c<br/>index d4bf8d187e16..f2973d0b7138 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-eic-sprd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-eic-sprd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-eic-sprd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-eic-sprd.c</a></div><div class='hunk'>@@ -203,9 +203,10 @@ static int sprd_eic_direction_input(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sprd_eic_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='add'>+static int sprd_eic_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	/* EICs are always input, nothing need to do here. */</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sprd_eic_set_debounce(struct gpio_chip *chip, unsigned int offset,</div><div class='hunk'>@@ -662,7 +663,7 @@ static int sprd_eic_probe(struct platform_device *pdev)</div><div class='ctx'> 		sprd_eic-&gt;chip.request = sprd_eic_request;</div><div class='ctx'> 		sprd_eic-&gt;chip.free = sprd_eic_free;</div><div class='ctx'> 		sprd_eic-&gt;chip.set_config = sprd_eic_set_config;</div><div class='del'>-		sprd_eic-&gt;chip.set = sprd_eic_set;</div><div class='add'>+		sprd_eic-&gt;chip.set_rv = sprd_eic_set;</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case SPRD_EIC_ASYNC:</div><div class='ctx'> 	case SPRD_EIC_SYNC:</div><div class='head'>diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c<br/>index 6c862c572322..a5e6e446f39c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-em.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-em.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-em.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-em.c</a></div><div class='hunk'>@@ -204,13 +204,15 @@ static void __em_gio_set(struct gpio_chip *chip, unsigned int reg,</div><div class='ctx'> 		     (BIT(shift + 16)) | (value &lt;&lt; shift));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void em_gio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int em_gio_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	/* output is split into two registers */</div><div class='ctx'> 	if (offset &lt; 16)</div><div class='ctx'> 		__em_gio_set(chip, GIO_OL, offset, value);</div><div class='ctx'> 	else</div><div class='ctx'> 		__em_gio_set(chip, GIO_OH, offset - 16, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int em_gio_direction_output(struct gpio_chip *chip, unsigned offset,</div><div class='hunk'>@@ -304,7 +306,7 @@ static int em_gio_probe(struct platform_device *pdev)</div><div class='ctx'> 	gpio_chip-&gt;direction_input = em_gio_direction_input;</div><div class='ctx'> 	gpio_chip-&gt;get = em_gio_get;</div><div class='ctx'> 	gpio_chip-&gt;direction_output = em_gio_direction_output;</div><div class='del'>-	gpio_chip-&gt;set = em_gio_set;</div><div class='add'>+	gpio_chip-&gt;set_rv = em_gio_set;</div><div class='ctx'> 	gpio_chip-&gt;to_irq = em_gio_to_irq;</div><div class='ctx'> 	gpio_chip-&gt;request = pinctrl_gpio_request;</div><div class='ctx'> 	gpio_chip-&gt;free = em_gio_free;</div><div class='hunk'>@@ -323,8 +325,9 @@ static int em_gio_probe(struct platform_device *pdev)</div><div class='ctx'> 	irq_chip-&gt;irq_release_resources = em_gio_irq_relres;</div><div class='ctx'> 	irq_chip-&gt;flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;</div><div class='ctx'> </div><div class='del'>-	p-&gt;irq_domain = irq_domain_add_simple(dev-&gt;of_node, ngpios, 0,</div><div class='del'>-					      &amp;em_gio_irq_domain_ops, p);</div><div class='add'>+	p-&gt;irq_domain = irq_domain_create_simple(of_fwnode_handle(dev-&gt;of_node),</div><div class='add'>+						 ngpios, 0,</div><div class='add'>+						 &amp;em_gio_irq_domain_ops, p);</div><div class='ctx'> 	if (!p-&gt;irq_domain) {</div><div class='ctx'> 		dev_err(dev, "cannot initialize irq domain\n");</div><div class='ctx'> 		return -ENXIO;</div><div class='head'>diff --git a/drivers/gpio/gpio-exar.c b/drivers/gpio/gpio-exar.c<br/>index d5909a4f0433..beb98286d13e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-exar.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-exar.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-exar.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-exar.c</a></div><div class='hunk'>@@ -93,8 +93,8 @@ static int exar_get_value(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return !!(regmap_test_bits(exar_gpio-&gt;regmap, addr, BIT(bit)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void exar_set_value(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			   int value)</div><div class='add'>+static int exar_set_value(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			  int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);</div><div class='ctx'> 	unsigned int addr = exar_offset_to_lvl_addr(exar_gpio, offset);</div><div class='hunk'>@@ -105,7 +105,7 @@ static void exar_set_value(struct gpio_chip *chip, unsigned int offset,</div><div class='ctx'> 	 * regmap_write_bits() forces value to be written when an external</div><div class='ctx'> 	 * pull up/down might otherwise indicate value was already set.</div><div class='ctx'> 	 */</div><div class='del'>-	regmap_write_bits(exar_gpio-&gt;regmap, addr, BIT(bit), bit_value);</div><div class='add'>+	return regmap_write_bits(exar_gpio-&gt;regmap, addr, BIT(bit), bit_value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int exar_direction_output(struct gpio_chip *chip, unsigned int offset,</div><div class='hunk'>@@ -114,11 +114,13 @@ static int exar_direction_output(struct gpio_chip *chip, unsigned int offset,</div><div class='ctx'> 	struct exar_gpio_chip *exar_gpio = gpiochip_get_data(chip);</div><div class='ctx'> 	unsigned int addr = exar_offset_to_sel_addr(exar_gpio, offset);</div><div class='ctx'> 	unsigned int bit = exar_offset_to_bit(exar_gpio, offset);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	exar_set_value(chip, offset, value);</div><div class='del'>-	regmap_clear_bits(exar_gpio-&gt;regmap, addr, BIT(bit));</div><div class='add'>+	ret = exar_set_value(chip, offset, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return regmap_clear_bits(exar_gpio-&gt;regmap, addr, BIT(bit));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int exar_direction_input(struct gpio_chip *chip, unsigned int offset)</div><div class='hunk'>@@ -209,7 +211,7 @@ static int gpio_exar_probe(struct platform_device *pdev)</div><div class='ctx'> 	exar_gpio-&gt;gpio_chip.direction_input = exar_direction_input;</div><div class='ctx'> 	exar_gpio-&gt;gpio_chip.get_direction = exar_get_direction;</div><div class='ctx'> 	exar_gpio-&gt;gpio_chip.get = exar_get_value;</div><div class='del'>-	exar_gpio-&gt;gpio_chip.set = exar_set_value;</div><div class='add'>+	exar_gpio-&gt;gpio_chip.set_rv = exar_set_value;</div><div class='ctx'> 	exar_gpio-&gt;gpio_chip.base = -1;</div><div class='ctx'> 	exar_gpio-&gt;gpio_chip.ngpio = ngpios;</div><div class='ctx'> 	exar_gpio-&gt;index = index;</div><div class='head'>diff --git a/drivers/gpio/gpio-f7188x.c b/drivers/gpio/gpio-f7188x.c<br/>index 3875fd940ccb..dfcd3634f279 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-f7188x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-f7188x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-f7188x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-f7188x.c</a></div><div class='hunk'>@@ -159,7 +159,8 @@ static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);</div><div class='ctx'> static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);</div><div class='ctx'> static int f7188x_gpio_direction_out(struct gpio_chip *chip,</div><div class='ctx'> 				     unsigned offset, int value);</div><div class='del'>-static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);</div><div class='add'>+static int f7188x_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			   int value);</div><div class='ctx'> static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,</div><div class='ctx'> 				  unsigned long config);</div><div class='ctx'> </div><div class='hunk'>@@ -172,7 +173,7 @@ static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,</div><div class='ctx'> 			.direction_input  = f7188x_gpio_direction_in,	\</div><div class='ctx'> 			.get              = f7188x_gpio_get,		\</div><div class='ctx'> 			.direction_output = f7188x_gpio_direction_out,	\</div><div class='del'>-			.set              = f7188x_gpio_set,		\</div><div class='add'>+			.set_rv           = f7188x_gpio_set,		\</div><div class='ctx'> 			.set_config	  = f7188x_gpio_set_config,	\</div><div class='ctx'> 			.base             = -1,				\</div><div class='ctx'> 			.ngpio            = _ngpio,			\</div><div class='hunk'>@@ -391,7 +392,8 @@ static int f7188x_gpio_direction_out(struct gpio_chip *chip,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int f7188x_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			   int value)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);</div><div class='hunk'>@@ -400,7 +402,8 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='ctx'> </div><div class='ctx'> 	err = superio_enter(sio-&gt;addr);</div><div class='ctx'> 	if (err)</div><div class='del'>-		return;</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	superio_select(sio-&gt;addr, sio-&gt;device);</div><div class='ctx'> </div><div class='ctx'> 	data_out = superio_inb(sio-&gt;addr, f7188x_gpio_data_out(bank-&gt;regbase));</div><div class='hunk'>@@ -411,6 +414,8 @@ static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='ctx'> 	superio_outb(sio-&gt;addr, f7188x_gpio_data_out(bank-&gt;regbase), data_out);</div><div class='ctx'> </div><div class='ctx'> 	superio_exit(sio-&gt;addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,</div><div class='head'>diff --git a/drivers/gpio/gpio-graniterapids.c b/drivers/gpio/gpio-graniterapids.c<br/>index ad6a045fd3d2..f25283e5239d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-graniterapids.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-graniterapids.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-graniterapids.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-graniterapids.c</a></div><div class='hunk'>@@ -116,7 +116,7 @@ static int gnr_gpio_get(struct gpio_chip *gc, unsigned int gpio)</div><div class='ctx'> 	return !!(dw &amp; GNR_CFG_DW_RXSTATE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gnr_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='add'>+static int gnr_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='ctx'> 	u32 clear = 0;</div><div class='ctx'> 	u32 set = 0;</div><div class='hunk'>@@ -126,7 +126,7 @@ static void gnr_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> 	else</div><div class='ctx'> 		clear = GNR_CFG_DW_TXSTATE;</div><div class='ctx'> </div><div class='del'>-	gnr_gpio_configure_line(gc, gpio, clear, set);</div><div class='add'>+	return gnr_gpio_configure_line(gc, gpio, clear, set);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gnr_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio)</div><div class='hunk'>@@ -159,7 +159,7 @@ static const struct gpio_chip gnr_gpio_chip = {</div><div class='ctx'> 	.owner		  = THIS_MODULE,</div><div class='ctx'> 	.request	  = gnr_gpio_request,</div><div class='ctx'> 	.get		  = gnr_gpio_get,</div><div class='del'>-	.set		  = gnr_gpio_set,</div><div class='add'>+	.set_rv		  = gnr_gpio_set,</div><div class='ctx'> 	.get_direction    = gnr_gpio_get_direction,</div><div class='ctx'> 	.direction_input  = gnr_gpio_direction_input,</div><div class='ctx'> 	.direction_output = gnr_gpio_direction_output,</div><div class='head'>diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c<br/>index 30a0522ae735..d38a2d9854ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-grgpio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-grgpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-grgpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-grgpio.c</a></div><div class='hunk'>@@ -170,6 +170,8 @@ static void grgpio_irq_mask(struct irq_data *d)</div><div class='ctx'> 	grgpio_set_imask(priv, offset, 0);</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;priv-&gt;gc.bgpio_lock, flags);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(&amp;priv-&gt;gc, d-&gt;hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void grgpio_irq_unmask(struct irq_data *d)</div><div class='hunk'>@@ -178,6 +180,7 @@ static void grgpio_irq_unmask(struct irq_data *d)</div><div class='ctx'> 	int offset = d-&gt;hwirq;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	gpiochip_enable_irq(&amp;priv-&gt;gc, d-&gt;hwirq);</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;priv-&gt;gc.bgpio_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	grgpio_set_imask(priv, offset, 1);</div><div class='hunk'>@@ -185,11 +188,13 @@ static void grgpio_irq_unmask(struct irq_data *d)</div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;priv-&gt;gc.bgpio_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip grgpio_irq_chip = {</div><div class='add'>+static const struct irq_chip grgpio_irq_chip = {</div><div class='ctx'> 	.name			= "grgpio",</div><div class='ctx'> 	.irq_mask		= grgpio_irq_mask,</div><div class='ctx'> 	.irq_unmask		= grgpio_irq_unmask,</div><div class='ctx'> 	.irq_set_type		= grgpio_irq_set_type,</div><div class='add'>+	.flags = IRQCHIP_IMMUTABLE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t grgpio_irq_handler(int irq, void *dev)</div><div class='hunk'>@@ -397,7 +402,7 @@ static int grgpio_probe(struct platform_device *ofdev)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		priv-&gt;domain = irq_domain_add_linear(np, gc-&gt;ngpio,</div><div class='add'>+		priv-&gt;domain = irq_domain_create_linear(of_fwnode_handle(np), gc-&gt;ngpio,</div><div class='ctx'> 						     &amp;grgpio_irq_domain_ops,</div><div class='ctx'> 						     priv);</div><div class='ctx'> 		if (!priv-&gt;domain) {</div><div class='head'>diff --git a/drivers/gpio/gpio-gw-pld.c b/drivers/gpio/gpio-gw-pld.c<br/>index 7e29a2d8de1a..a40ba99a3aea 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-gw-pld.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-gw-pld.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-gw-pld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-gw-pld.c</a></div><div class='hunk'>@@ -62,9 +62,9 @@ static int gw_pld_output8(struct gpio_chip *gc, unsigned offset, int value)</div><div class='ctx'> 	return i2c_smbus_write_byte(gw-&gt;client, gw-&gt;out);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gw_pld_set8(struct gpio_chip *gc, unsigned offset, int value)</div><div class='add'>+static int gw_pld_set8(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='del'>-	gw_pld_output8(gc, offset, value);</div><div class='add'>+	return gw_pld_output8(gc, offset, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gw_pld_probe(struct i2c_client *client)</div><div class='hunk'>@@ -86,7 +86,7 @@ static int gw_pld_probe(struct i2c_client *client)</div><div class='ctx'> 	gw-&gt;chip.direction_input = gw_pld_input8;</div><div class='ctx'> 	gw-&gt;chip.get = gw_pld_get8;</div><div class='ctx'> 	gw-&gt;chip.direction_output = gw_pld_output8;</div><div class='del'>-	gw-&gt;chip.set = gw_pld_set8;</div><div class='add'>+	gw-&gt;chip.set_rv = gw_pld_set8;</div><div class='ctx'> 	gw-&gt;client = client;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='head'>diff --git a/drivers/gpio/gpio-htc-egpio.c b/drivers/gpio/gpio-htc-egpio.c<br/>index a40bd56673fe..b1844a676c7c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-htc-egpio.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-htc-egpio.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-htc-egpio.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-htc-egpio.c</a></div><div class='hunk'>@@ -170,7 +170,7 @@ static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'>  * Output pins</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int egpio_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long     flag;</div><div class='ctx'> 	struct egpio_chip *egpio;</div><div class='hunk'>@@ -198,6 +198,8 @@ static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='ctx'> 		egpio-&gt;cached_values &amp;= ~(1 &lt;&lt; offset);</div><div class='ctx'> 	egpio_writew((egpio-&gt;cached_values &gt;&gt; shift) &amp; ei-&gt;reg_mask, ei, reg);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ei-&gt;lock, flag);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int egpio_direction_output(struct gpio_chip *chip,</div><div class='hunk'>@@ -206,12 +208,10 @@ static int egpio_direction_output(struct gpio_chip *chip,</div><div class='ctx'> 	struct egpio_chip *egpio;</div><div class='ctx'> </div><div class='ctx'> 	egpio = gpiochip_get_data(chip);</div><div class='del'>-	if (test_bit(offset, &amp;egpio-&gt;is_out)) {</div><div class='del'>-		egpio_set(chip, offset, value);</div><div class='del'>-		return 0;</div><div class='del'>-	} else {</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (test_bit(offset, &amp;egpio-&gt;is_out))</div><div class='add'>+		return egpio_set(chip, offset, value);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)</div><div class='hunk'>@@ -324,7 +324,7 @@ static int __init egpio_probe(struct platform_device *pdev)</div><div class='ctx'> 		chip-&gt;parent          = &amp;pdev-&gt;dev;</div><div class='ctx'> 		chip-&gt;owner           = THIS_MODULE;</div><div class='ctx'> 		chip-&gt;get             = egpio_get;</div><div class='del'>-		chip-&gt;set             = egpio_set;</div><div class='add'>+		chip-&gt;set_rv          = egpio_set;</div><div class='ctx'> 		chip-&gt;direction_input = egpio_direction_input;</div><div class='ctx'> 		chip-&gt;direction_output = egpio_direction_output;</div><div class='ctx'> 		chip-&gt;get_direction   = egpio_get_direction;</div><div class='head'>diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c<br/>index 0be9285efebc..67089b2423d8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ich.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ich.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ich.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-ich.c</a></div><div class='hunk'>@@ -175,12 +175,16 @@ static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned int nr)</div><div class='ctx'> static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned int nr,</div><div class='ctx'> 					int val)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	/* Disable blink hardware which is available for GPIOs from 0 to 31. */</div><div class='ctx'> 	if (nr &lt; 32 &amp;&amp; ichx_priv.desc-&gt;have_blink)</div><div class='ctx'> 		ichx_write_bit(GPO_BLINK, nr, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Set GPIO output value. */</div><div class='del'>-	ichx_write_bit(GPIO_LVL, nr, val, 0);</div><div class='add'>+	ret = ichx_write_bit(GPIO_LVL, nr, val, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Try setting pin as an output and verify it worked since many pins</div><div class='hunk'>@@ -252,9 +256,9 @@ static int ich6_gpio_request(struct gpio_chip *chip, unsigned int nr)</div><div class='ctx'> 	return ichx_gpio_request(chip, nr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ichx_gpio_set(struct gpio_chip *chip, unsigned int nr, int val)</div><div class='add'>+static int ichx_gpio_set(struct gpio_chip *chip, unsigned int nr, int val)</div><div class='ctx'> {</div><div class='del'>-	ichx_write_bit(GPIO_LVL, nr, val, 0);</div><div class='add'>+	return ichx_write_bit(GPIO_LVL, nr, val, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ichx_gpiolib_setup(struct gpio_chip *chip)</div><div class='hunk'>@@ -269,7 +273,7 @@ static void ichx_gpiolib_setup(struct gpio_chip *chip)</div><div class='ctx'> 	chip-&gt;get = ichx_priv.desc-&gt;get ?</div><div class='ctx'> 		ichx_priv.desc-&gt;get : ichx_gpio_get;</div><div class='ctx'> </div><div class='del'>-	chip-&gt;set = ichx_gpio_set;</div><div class='add'>+	chip-&gt;set_rv = ichx_gpio_set;</div><div class='ctx'> 	chip-&gt;get_direction = ichx_gpio_get_direction;</div><div class='ctx'> 	chip-&gt;direction_input = ichx_gpio_direction_input;</div><div class='ctx'> 	chip-&gt;direction_output = ichx_gpio_direction_output;</div><div class='head'>diff --git a/drivers/gpio/gpio-idt3243x.c b/drivers/gpio/gpio-idt3243x.c<br/>index 00f547d26254..535f25514455 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-idt3243x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-idt3243x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-idt3243x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-idt3243x.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@ static void idt_gpio_dispatch(struct irq_desc *desc)</div><div class='ctx'> 	pending = readl(ctrl-&gt;pic + IDT_PIC_IRQ_PEND);</div><div class='ctx'> 	pending &amp;= ~ctrl-&gt;mask_cache;</div><div class='ctx'> 	for_each_set_bit(bit, &amp;pending, gc-&gt;ngpio) {</div><div class='del'>-		virq = irq_linear_revmap(gc-&gt;irq.domain, bit);</div><div class='add'>+		virq = irq_find_mapping(gc-&gt;irq.domain, bit);</div><div class='ctx'> 		if (virq)</div><div class='ctx'> 			generic_handle_irq(virq);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpio/gpio-imx-scu.c b/drivers/gpio/gpio-imx-scu.c<br/>index 13baf465aedf..1693dbf1b777 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-imx-scu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-imx-scu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-imx-scu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-imx-scu.c</a></div><div class='hunk'>@@ -6,8 +6,10 @@</div><div class='ctx'>  * to control the PIN resources on SCU domain.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/cleanup.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/firmware/imx/svc/rm.h&gt;</div><div class='hunk'>@@ -37,16 +39,11 @@ static int imx_scu_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	int level;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (offset &gt;= chip-&gt;ngpio)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* to read PIN state via scu api */</div><div class='del'>-	err = imx_sc_misc_get_control(priv-&gt;handle,</div><div class='del'>-			scu_rsrc_arr[offset], 0, &amp;level);</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;lock);</div><div class='del'>-</div><div class='add'>+	scoped_guard(mutex, &amp;priv-&gt;lock) {</div><div class='add'>+		/* to read PIN state via scu api */</div><div class='add'>+		err = imx_sc_misc_get_control(priv-&gt;handle,</div><div class='add'>+					      scu_rsrc_arr[offset], 0, &amp;level);</div><div class='add'>+	}</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "SCU get failed: %d\n", err);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -55,31 +52,26 @@ static int imx_scu_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return level;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void imx_scu_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='add'>+static int imx_scu_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct scu_gpio_priv *priv = gpiochip_get_data(chip);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (offset &gt;= chip-&gt;ngpio)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* to set PIN output level via scu api */</div><div class='del'>-	err = imx_sc_misc_set_control(priv-&gt;handle,</div><div class='del'>-			scu_rsrc_arr[offset], 0, value);</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;lock);</div><div class='del'>-</div><div class='add'>+	scoped_guard(mutex, &amp;priv-&gt;lock) {</div><div class='add'>+		/* to set PIN output level via scu api */</div><div class='add'>+		err = imx_sc_misc_set_control(priv-&gt;handle,</div><div class='add'>+					      scu_rsrc_arr[offset], 0, value);</div><div class='add'>+	}</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(priv-&gt;dev, "SCU set (%d) failed: %d\n",</div><div class='ctx'> 				scu_rsrc_arr[offset], err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int imx_scu_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> {</div><div class='del'>-	if (offset &gt;= chip-&gt;ngpio)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	return GPIO_LINE_DIRECTION_OUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -99,7 +91,10 @@ static int imx_scu_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;dev = dev;</div><div class='del'>-	mutex_init(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ret = devm_mutex_init(&amp;pdev-&gt;dev, &amp;priv-&gt;lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	gc = &amp;priv-&gt;chip;</div><div class='ctx'> 	gc-&gt;base = -1;</div><div class='hunk'>@@ -107,7 +102,7 @@ static int imx_scu_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	gc-&gt;ngpio = ARRAY_SIZE(scu_rsrc_arr);</div><div class='ctx'> 	gc-&gt;label = dev_name(dev);</div><div class='ctx'> 	gc-&gt;get = imx_scu_gpio_get;</div><div class='del'>-	gc-&gt;set = imx_scu_gpio_set;</div><div class='add'>+	gc-&gt;set_rv = imx_scu_gpio_set;</div><div class='ctx'> 	gc-&gt;get_direction = imx_scu_gpio_get_direction;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, priv);</div><div class='head'>diff --git a/drivers/gpio/gpio-it87.c b/drivers/gpio/gpio-it87.c<br/>index f332341fd4c8..d8184b527bac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-it87.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-it87.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-it87.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-it87.c</a></div><div class='hunk'>@@ -213,8 +213,7 @@ exit:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void it87_gpio_set(struct gpio_chip *chip,</div><div class='del'>-			  unsigned gpio_num, int val)</div><div class='add'>+static int it87_gpio_set(struct gpio_chip *chip, unsigned int gpio_num, int val)</div><div class='ctx'> {</div><div class='ctx'> 	u8 mask, curr_vals;</div><div class='ctx'> 	u16 reg;</div><div class='hunk'>@@ -228,6 +227,8 @@ static void it87_gpio_set(struct gpio_chip *chip,</div><div class='ctx'> 		outb(curr_vals | mask, reg);</div><div class='ctx'> 	else</div><div class='ctx'> 		outb(curr_vals &amp; ~mask, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int it87_gpio_direction_out(struct gpio_chip *chip,</div><div class='hunk'>@@ -249,7 +250,9 @@ static int it87_gpio_direction_out(struct gpio_chip *chip,</div><div class='ctx'> 	/* set the output enable bit */</div><div class='ctx'> 	superio_set_mask(mask, group + it87_gpio-&gt;output_base);</div><div class='ctx'> </div><div class='del'>-	it87_gpio_set(chip, gpio_num, val);</div><div class='add'>+	rc = it87_gpio_set(chip, gpio_num, val);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto exit;</div><div class='ctx'> </div><div class='ctx'> 	superio_exit();</div><div class='ctx'> </div><div class='hunk'>@@ -264,7 +267,7 @@ static const struct gpio_chip it87_template_chip = {</div><div class='ctx'> 	.request		= it87_gpio_request,</div><div class='ctx'> 	.get			= it87_gpio_get,</div><div class='ctx'> 	.direction_input	= it87_gpio_direction_in,</div><div class='del'>-	.set			= it87_gpio_set,</div><div class='add'>+	.set_rv			= it87_gpio_set,</div><div class='ctx'> 	.direction_output	= it87_gpio_direction_out,</div><div class='ctx'> 	.base			= -1</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpio/gpio-janz-ttl.c b/drivers/gpio/gpio-janz-ttl.c<br/>index cdf50e4ea165..9f548eda3888 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-janz-ttl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-janz-ttl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-janz-ttl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-janz-ttl.c</a></div><div class='hunk'>@@ -76,7 +76,7 @@ static int ttl_get_value(struct gpio_chip *gpio, unsigned offset)</div><div class='ctx'> 	return !!ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value)</div><div class='add'>+static int ttl_set_value(struct gpio_chip *gpio, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct ttl_module *mod = dev_get_drvdata(gpio-&gt;parent);</div><div class='ctx'> 	void __iomem *port;</div><div class='hunk'>@@ -103,6 +103,8 @@ static void ttl_set_value(struct gpio_chip *gpio, unsigned offset, int value)</div><div class='ctx'> </div><div class='ctx'> 	iowrite16be(*shadow, port);</div><div class='ctx'> 	spin_unlock(&amp;mod-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ttl_write_reg(struct ttl_module *mod, u8 reg, u16 val)</div><div class='hunk'>@@ -169,7 +171,7 @@ static int ttl_probe(struct platform_device *pdev)</div><div class='ctx'> 	gpio-&gt;parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	gpio-&gt;label = pdev-&gt;name;</div><div class='ctx'> 	gpio-&gt;get = ttl_get_value;</div><div class='del'>-	gpio-&gt;set = ttl_set_value;</div><div class='add'>+	gpio-&gt;set_rv = ttl_set_value;</div><div class='ctx'> 	gpio-&gt;owner = THIS_MODULE;</div><div class='ctx'> </div><div class='ctx'> 	/* request dynamic allocation */</div><div class='head'>diff --git a/drivers/gpio/gpio-kempld.c b/drivers/gpio/gpio-kempld.c<br/>index 4ea15f08e0f4..e38e604baa22 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-kempld.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-kempld.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-kempld.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-kempld.c</a></div><div class='hunk'>@@ -63,7 +63,8 @@ static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> 	return !!kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset), offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int kempld_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			   int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct kempld_gpio_data *gpio = gpiochip_get_data(chip);</div><div class='ctx'> 	struct kempld_device_data *pld = gpio-&gt;pld;</div><div class='hunk'>@@ -71,6 +72,8 @@ static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='ctx'> 	kempld_get_mutex(pld);</div><div class='ctx'> 	kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value);</div><div class='ctx'> 	kempld_release_mutex(pld);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset)</div><div class='hunk'>@@ -166,7 +169,7 @@ static int kempld_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	chip-&gt;direction_output = kempld_gpio_direction_output;</div><div class='ctx'> 	chip-&gt;get_direction = kempld_gpio_get_direction;</div><div class='ctx'> 	chip-&gt;get = kempld_gpio_get;</div><div class='del'>-	chip-&gt;set = kempld_gpio_set;</div><div class='add'>+	chip-&gt;set_rv = kempld_gpio_set;</div><div class='ctx'> 	chip-&gt;ngpio = kempld_gpio_pincount(pld);</div><div class='ctx'> 	if (chip-&gt;ngpio == 0) {</div><div class='ctx'> 		dev_err(dev, "No GPIO pins detected\n");</div><div class='head'>diff --git a/drivers/gpio/gpio-ljca.c b/drivers/gpio/gpio-ljca.c<br/>index 817ecb12d550..61524a9ba765 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ljca.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ljca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ljca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-ljca.c</a></div><div class='hunk'>@@ -144,8 +144,8 @@ static int ljca_gpio_get_value(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return ljca_gpio_read(ljca_gpio, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-				int val)</div><div class='add'>+static int ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			       int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct ljca_gpio_dev *ljca_gpio = gpiochip_get_data(chip);</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -155,6 +155,8 @@ static void ljca_gpio_set_value(struct gpio_chip *chip, unsigned int offset,</div><div class='ctx'> 		dev_err(chip-&gt;parent,</div><div class='ctx'> 			"set value failed offset: %u val: %d ret: %d\n",</div><div class='ctx'> 			offset, val, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ljca_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)</div><div class='hunk'>@@ -183,7 +185,10 @@ static int ljca_gpio_direction_output(struct gpio_chip *chip,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ljca_gpio_set_value(chip, offset, val);</div><div class='add'>+	ret = ljca_gpio_set_value(chip, offset, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	set_bit(offset, ljca_gpio-&gt;output_enabled);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -432,7 +437,7 @@ static int ljca_gpio_probe(struct auxiliary_device *auxdev,</div><div class='ctx'> 	ljca_gpio-&gt;gc.direction_output = ljca_gpio_direction_output;</div><div class='ctx'> 	ljca_gpio-&gt;gc.get_direction = ljca_gpio_get_direction;</div><div class='ctx'> 	ljca_gpio-&gt;gc.get = ljca_gpio_get_value;</div><div class='del'>-	ljca_gpio-&gt;gc.set = ljca_gpio_set_value;</div><div class='add'>+	ljca_gpio-&gt;gc.set_rv = ljca_gpio_set_value;</div><div class='ctx'> 	ljca_gpio-&gt;gc.set_config = ljca_gpio_set_config;</div><div class='ctx'> 	ljca_gpio-&gt;gc.init_valid_mask = ljca_gpio_init_valid_mask;</div><div class='ctx'> 	ljca_gpio-&gt;gc.can_sleep = true;</div><div class='head'>diff --git a/drivers/gpio/gpio-logicvc.c b/drivers/gpio/gpio-logicvc.c<br/>index 05d62011f335..19cd2847467c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-logicvc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-logicvc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-logicvc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-logicvc.c</a></div><div class='hunk'>@@ -61,23 +61,22 @@ static int logicvc_gpio_get(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> 	return !!(value &amp; bit);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void logicvc_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int logicvc_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct logicvc_gpio *logicvc = gpiochip_get_data(chip);</div><div class='ctx'> 	unsigned int reg, bit;</div><div class='ctx'> </div><div class='ctx'> 	logicvc_gpio_offset(logicvc, offset, &amp;reg, &amp;bit);</div><div class='ctx'> </div><div class='del'>-	regmap_update_bits(logicvc-&gt;regmap, reg, bit, value ? bit : 0);</div><div class='add'>+	return regmap_update_bits(logicvc-&gt;regmap, reg, bit, value ? bit : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int logicvc_gpio_direction_output(struct gpio_chip *chip,</div><div class='ctx'> 					 unsigned offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	/* Pins are always configured as output, so just set the value. */</div><div class='del'>-	logicvc_gpio_set(chip, offset, value);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return logicvc_gpio_set(chip, offset, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regmap_config logicvc_gpio_regmap_config = {</div><div class='hunk'>@@ -135,7 +134,7 @@ static int logicvc_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	logicvc-&gt;chip.ngpio = LOGICVC_CTRL_GPIO_BITS +</div><div class='ctx'> 			      LOGICVC_POWER_CTRL_GPIO_BITS;</div><div class='ctx'> 	logicvc-&gt;chip.get = logicvc_gpio_get;</div><div class='del'>-	logicvc-&gt;chip.set = logicvc_gpio_set;</div><div class='add'>+	logicvc-&gt;chip.set_rv = logicvc_gpio_set;</div><div class='ctx'> 	logicvc-&gt;chip.direction_output = logicvc_gpio_direction_output;</div><div class='ctx'> </div><div class='ctx'> 	return devm_gpiochip_add_data(dev, &amp;logicvc-&gt;chip, logicvc);</div><div class='head'>diff --git a/drivers/gpio/gpio-loongson-64bit.c b/drivers/gpio/gpio-loongson-64bit.c<br/>index a9a93036f08f..26227669f026 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-loongson-64bit.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-loongson-64bit.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-loongson-64bit.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-loongson-64bit.c</a></div><div class='hunk'>@@ -105,7 +105,7 @@ static int loongson_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)</div><div class='ctx'> 	return GPIO_LINE_DIRECTION_OUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)</div><div class='add'>+static int loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);</div><div class='hunk'>@@ -113,6 +113,8 @@ static void loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int valu</div><div class='ctx'> 	spin_lock_irqsave(&amp;lgpio-&gt;lock, flags);</div><div class='ctx'> 	loongson_commit_level(lgpio, pin, value);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lgpio-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)</div><div class='hunk'>@@ -155,7 +157,7 @@ static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgp</div><div class='ctx'> 		lgpio-&gt;chip.get = loongson_gpio_get;</div><div class='ctx'> 		lgpio-&gt;chip.get_direction = loongson_gpio_get_direction;</div><div class='ctx'> 		lgpio-&gt;chip.direction_output = loongson_gpio_direction_output;</div><div class='del'>-		lgpio-&gt;chip.set = loongson_gpio_set;</div><div class='add'>+		lgpio-&gt;chip.set_rv = loongson_gpio_set;</div><div class='ctx'> 		lgpio-&gt;chip.parent = dev;</div><div class='ctx'> 		spin_lock_init(&amp;lgpio-&gt;lock);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpio/gpio-loongson.c b/drivers/gpio/gpio-loongson.c<br/>index a42145873cc9..8f3668169ebf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-loongson.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-loongson.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-loongson.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-loongson.c</a></div><div class='hunk'>@@ -48,8 +48,8 @@ static int loongson_gpio_get_value(struct gpio_chip *chip, unsigned gpio)</div><div class='ctx'> 	return !!(val &amp; BIT(gpio + LOONGSON_GPIO_IN_OFFSET));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void loongson_gpio_set_value(struct gpio_chip *chip,</div><div class='del'>-		unsigned gpio, int value)</div><div class='add'>+static int loongson_gpio_set_value(struct gpio_chip *chip, unsigned int gpio,</div><div class='add'>+				   int value)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -61,6 +61,8 @@ static void loongson_gpio_set_value(struct gpio_chip *chip,</div><div class='ctx'> 		val &amp;= ~BIT(gpio);</div><div class='ctx'> 	LOONGSON_GPIODATA = val;</div><div class='ctx'> 	spin_unlock(&amp;gpio_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)</div><div class='hunk'>@@ -104,7 +106,7 @@ static int loongson_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	gc-&gt;base = 0;</div><div class='ctx'> 	gc-&gt;ngpio = LOONGSON_N_GPIO;</div><div class='ctx'> 	gc-&gt;get = loongson_gpio_get_value;</div><div class='del'>-	gc-&gt;set = loongson_gpio_set_value;</div><div class='add'>+	gc-&gt;set_rv = loongson_gpio_set_value;</div><div class='ctx'> 	gc-&gt;direction_input = loongson_gpio_direction_input;</div><div class='ctx'> 	gc-&gt;direction_output = loongson_gpio_direction_output;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-lp3943.c b/drivers/gpio/gpio-lp3943.c<br/>index 8e58242f5123..52ab3ac4844c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lp3943.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lp3943.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lp3943.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-lp3943.c</a></div><div class='hunk'>@@ -147,7 +147,8 @@ static int lp3943_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 		return lp3943_get_gpio_out_status(lp3943_gpio, chip, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lp3943_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='add'>+static int lp3943_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			   int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);</div><div class='ctx'> 	u8 data;</div><div class='hunk'>@@ -157,15 +158,19 @@ static void lp3943_gpio_set(struct gpio_chip *chip, unsigned int offset, int val</div><div class='ctx'> 	else</div><div class='ctx'> 		data = LP3943_GPIO_OUT_LOW;</div><div class='ctx'> </div><div class='del'>-	lp3943_gpio_set_mode(lp3943_gpio, offset, data);</div><div class='add'>+	return lp3943_gpio_set_mode(lp3943_gpio, offset, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lp3943_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,</div><div class='ctx'> 					int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lp3943_gpio_set(chip, offset, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	lp3943_gpio_set(chip, offset, value);</div><div class='ctx'> 	lp3943_gpio-&gt;input_mask &amp;= ~BIT(offset);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -179,7 +184,7 @@ static const struct gpio_chip lp3943_gpio_chip = {</div><div class='ctx'> 	.direction_input	= lp3943_gpio_direction_input,</div><div class='ctx'> 	.get			= lp3943_gpio_get,</div><div class='ctx'> 	.direction_output	= lp3943_gpio_direction_output,</div><div class='del'>-	.set			= lp3943_gpio_set,</div><div class='add'>+	.set_rv			= lp3943_gpio_set,</div><div class='ctx'> 	.base			= -1,</div><div class='ctx'> 	.ngpio			= LP3943_MAX_GPIO,</div><div class='ctx'> 	.can_sleep		= 1,</div><div class='head'>diff --git a/drivers/gpio/gpio-lp873x.c b/drivers/gpio/gpio-lp873x.c<br/>index 5c79ba1f229c..1908ed302e92 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lp873x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lp873x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lp873x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-lp873x.c</a></div><div class='hunk'>@@ -58,14 +58,14 @@ static int lp873x_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return val &amp; BIT(offset * BITS_PER_GPO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lp873x_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			    int value)</div><div class='add'>+static int lp873x_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			   int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp873x_gpio *gpio = gpiochip_get_data(chip);</div><div class='ctx'> </div><div class='del'>-	regmap_update_bits(gpio-&gt;lp873-&gt;regmap, LP873X_REG_GPO_CTRL,</div><div class='del'>-			   BIT(offset * BITS_PER_GPO),</div><div class='del'>-			   value ? BIT(offset * BITS_PER_GPO) : 0);</div><div class='add'>+	return regmap_update_bits(gpio-&gt;lp873-&gt;regmap, LP873X_REG_GPO_CTRL,</div><div class='add'>+				  BIT(offset * BITS_PER_GPO),</div><div class='add'>+				  value ? BIT(offset * BITS_PER_GPO) : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lp873x_gpio_request(struct gpio_chip *gc, unsigned int offset)</div><div class='hunk'>@@ -124,7 +124,7 @@ static const struct gpio_chip template_chip = {</div><div class='ctx'> 	.direction_input	= lp873x_gpio_direction_input,</div><div class='ctx'> 	.direction_output	= lp873x_gpio_direction_output,</div><div class='ctx'> 	.get			= lp873x_gpio_get,</div><div class='del'>-	.set			= lp873x_gpio_set,</div><div class='add'>+	.set_rv			= lp873x_gpio_set,</div><div class='ctx'> 	.set_config		= lp873x_gpio_set_config,</div><div class='ctx'> 	.base			= -1,</div><div class='ctx'> 	.ngpio			= 2,</div><div class='head'>diff --git a/drivers/gpio/gpio-lp87565.c b/drivers/gpio/gpio-lp87565.c<br/>index d3ce027de081..8ea687d5d028 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lp87565.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lp87565.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lp87565.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-lp87565.c</a></div><div class='hunk'>@@ -30,13 +30,13 @@ static int lp87565_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return !!(val &amp; BIT(offset));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			     int value)</div><div class='add'>+static int lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp87565_gpio *gpio = gpiochip_get_data(chip);</div><div class='ctx'> </div><div class='del'>-	regmap_update_bits(gpio-&gt;map, LP87565_REG_GPIO_OUT,</div><div class='del'>-			   BIT(offset), value ? BIT(offset) : 0);</div><div class='add'>+	return regmap_update_bits(gpio-&gt;map, LP87565_REG_GPIO_OUT,</div><div class='add'>+				  BIT(offset), value ? BIT(offset) : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lp87565_gpio_get_direction(struct gpio_chip *chip,</div><div class='hunk'>@@ -69,8 +69,11 @@ static int lp87565_gpio_direction_output(struct gpio_chip *chip,</div><div class='ctx'> 					 unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lp87565_gpio *gpio = gpiochip_get_data(chip);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	lp87565_gpio_set(chip, offset, value);</div><div class='add'>+	ret = lp87565_gpio_set(chip, offset, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return regmap_update_bits(gpio-&gt;map,</div><div class='ctx'> 				  LP87565_REG_GPIO_CONFIG,</div><div class='hunk'>@@ -136,7 +139,7 @@ static const struct gpio_chip template_chip = {</div><div class='ctx'> 	.direction_input	= lp87565_gpio_direction_input,</div><div class='ctx'> 	.direction_output	= lp87565_gpio_direction_output,</div><div class='ctx'> 	.get			= lp87565_gpio_get,</div><div class='del'>-	.set			= lp87565_gpio_set,</div><div class='add'>+	.set_rv			= lp87565_gpio_set,</div><div class='ctx'> 	.set_config		= lp87565_gpio_set_config,</div><div class='ctx'> 	.base			= -1,</div><div class='ctx'> 	.ngpio			= 3,</div><div class='head'>diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c<br/>index 2cf9fb4637a2..b0a8da5c058d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lpc18xx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lpc18xx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lpc18xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-lpc18xx.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@ struct lpc18xx_gpio_pin_ic {</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	struct irq_domain *domain;</div><div class='ctx'> 	struct raw_spinlock lock;</div><div class='add'>+	struct gpio_chip *gpio;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct lpc18xx_gpio_chip {</div><div class='hunk'>@@ -74,6 +75,7 @@ static void lpc18xx_gpio_pin_ic_mask(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpc18xx_gpio_pin_ic *ic = d-&gt;chip_data;</div><div class='ctx'> 	u32 type = irqd_get_trigger_type(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock(&amp;ic-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -88,12 +90,17 @@ static void lpc18xx_gpio_pin_ic_mask(struct irq_data *d)</div><div class='ctx'> 	raw_spin_unlock(&amp;ic-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	irq_chip_mask_parent(d);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(ic-&gt;gpio, hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lpc18xx_gpio_pin_ic_unmask(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpc18xx_gpio_pin_ic *ic = d-&gt;chip_data;</div><div class='ctx'> 	u32 type = irqd_get_trigger_type(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+	gpiochip_enable_irq(ic-&gt;gpio, hwirq);</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock(&amp;ic-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -149,13 +156,14 @@ static int lpc18xx_gpio_pin_ic_set_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip lpc18xx_gpio_pin_ic = {</div><div class='add'>+static const struct irq_chip lpc18xx_gpio_pin_ic = {</div><div class='ctx'> 	.name		= "LPC18xx GPIO pin",</div><div class='ctx'> 	.irq_mask	= lpc18xx_gpio_pin_ic_mask,</div><div class='ctx'> 	.irq_unmask	= lpc18xx_gpio_pin_ic_unmask,</div><div class='ctx'> 	.irq_eoi	= lpc18xx_gpio_pin_ic_eoi,</div><div class='ctx'> 	.irq_set_type	= lpc18xx_gpio_pin_ic_set_type,</div><div class='del'>-	.flags		= IRQCHIP_SET_TYPE_MASKED,</div><div class='add'>+	.flags		= IRQCHIP_IMMUTABLE | IRQCHIP_SET_TYPE_MASKED,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lpc18xx_gpio_pin_ic_domain_alloc(struct irq_domain *domain,</div><div class='hunk'>@@ -240,17 +248,16 @@ static int lpc18xx_gpio_pin_ic_probe(struct lpc18xx_gpio_chip *gc)</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_lock_init(&amp;ic-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	ic-&gt;domain = irq_domain_add_hierarchy(parent_domain, 0,</div><div class='del'>-					      NR_LPC18XX_GPIO_PIN_IC_IRQS,</div><div class='del'>-					      dev-&gt;of_node,</div><div class='del'>-					      &amp;lpc18xx_gpio_pin_ic_domain_ops,</div><div class='del'>-					      ic);</div><div class='add'>+	ic-&gt;domain = irq_domain_create_hierarchy(parent_domain, 0, NR_LPC18XX_GPIO_PIN_IC_IRQS,</div><div class='add'>+						 of_fwnode_handle(dev-&gt;of_node),</div><div class='add'>+						 &amp;lpc18xx_gpio_pin_ic_domain_ops, ic);</div><div class='ctx'> 	if (!ic-&gt;domain) {</div><div class='ctx'> 		pr_err("unable to add irq domain\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 		goto free_iomap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ic-&gt;gpio = &amp;gc-&gt;gpio;</div><div class='ctx'> 	gc-&gt;pin_ic = ic;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -263,10 +270,14 @@ free_ic:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lpc18xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int lpc18xx_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpc18xx_gpio_chip *gc = gpiochip_get_data(chip);</div><div class='add'>+</div><div class='ctx'> 	writeb(value ? 1 : 0, gc-&gt;base + offset);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lpc18xx_gpio_get(struct gpio_chip *chip, unsigned offset)</div><div class='hunk'>@@ -316,7 +327,7 @@ static const struct gpio_chip lpc18xx_chip = {</div><div class='ctx'> 	.free			= gpiochip_generic_free,</div><div class='ctx'> 	.direction_input	= lpc18xx_gpio_direction_input,</div><div class='ctx'> 	.direction_output	= lpc18xx_gpio_direction_output,</div><div class='del'>-	.set			= lpc18xx_gpio_set,</div><div class='add'>+	.set_rv			= lpc18xx_gpio_set,</div><div class='ctx'> 	.get			= lpc18xx_gpio_get,</div><div class='ctx'> 	.ngpio			= LPC18XX_MAX_PORTS * LPC18XX_PINS_PER_PORT,</div><div class='ctx'> 	.owner			= THIS_MODULE,</div><div class='head'>diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c<br/>index c097e310c9e8..6668b8bd9f1e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lpc32xx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-lpc32xx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-lpc32xx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-lpc32xx.c</a></div><div class='hunk'>@@ -340,28 +340,34 @@ static int lpc32xx_gpio_dir_out_always(struct gpio_chip *chip, unsigned pin,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lpc32xx_gpio_set_value_p012(struct gpio_chip *chip, unsigned pin,</div><div class='del'>-	int value)</div><div class='add'>+static int lpc32xx_gpio_set_value_p012(struct gpio_chip *chip,</div><div class='add'>+				       unsigned int pin, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip);</div><div class='ctx'> </div><div class='ctx'> 	__set_gpio_level_p012(group, pin, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lpc32xx_gpio_set_value_p3(struct gpio_chip *chip, unsigned pin,</div><div class='del'>-	int value)</div><div class='add'>+static int lpc32xx_gpio_set_value_p3(struct gpio_chip *chip,</div><div class='add'>+				     unsigned int pin, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip);</div><div class='ctx'> </div><div class='ctx'> 	__set_gpio_level_p3(group, pin, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned pin,</div><div class='del'>-	int value)</div><div class='add'>+static int lpc32xx_gpo_set_value(struct gpio_chip *chip, unsigned int pin,</div><div class='add'>+				 int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip);</div><div class='ctx'> </div><div class='ctx'> 	__set_gpo_level_p3(group, pin, value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lpc32xx_gpo_get_value(struct gpio_chip *chip, unsigned pin)</div><div class='hunk'>@@ -401,7 +407,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {</div><div class='ctx'> 			.direction_input	= lpc32xx_gpio_dir_input_p012,</div><div class='ctx'> 			.get			= lpc32xx_gpio_get_value_p012,</div><div class='ctx'> 			.direction_output	= lpc32xx_gpio_dir_output_p012,</div><div class='del'>-			.set			= lpc32xx_gpio_set_value_p012,</div><div class='add'>+			.set_rv			= lpc32xx_gpio_set_value_p012,</div><div class='ctx'> 			.request		= lpc32xx_gpio_request,</div><div class='ctx'> 			.to_irq			= lpc32xx_gpio_to_irq_p01,</div><div class='ctx'> 			.base			= LPC32XX_GPIO_P0_GRP,</div><div class='hunk'>@@ -417,7 +423,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {</div><div class='ctx'> 			.direction_input	= lpc32xx_gpio_dir_input_p012,</div><div class='ctx'> 			.get			= lpc32xx_gpio_get_value_p012,</div><div class='ctx'> 			.direction_output	= lpc32xx_gpio_dir_output_p012,</div><div class='del'>-			.set			= lpc32xx_gpio_set_value_p012,</div><div class='add'>+			.set_rv			= lpc32xx_gpio_set_value_p012,</div><div class='ctx'> 			.request		= lpc32xx_gpio_request,</div><div class='ctx'> 			.to_irq			= lpc32xx_gpio_to_irq_p01,</div><div class='ctx'> 			.base			= LPC32XX_GPIO_P1_GRP,</div><div class='hunk'>@@ -433,7 +439,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {</div><div class='ctx'> 			.direction_input	= lpc32xx_gpio_dir_input_p012,</div><div class='ctx'> 			.get			= lpc32xx_gpio_get_value_p012,</div><div class='ctx'> 			.direction_output	= lpc32xx_gpio_dir_output_p012,</div><div class='del'>-			.set			= lpc32xx_gpio_set_value_p012,</div><div class='add'>+			.set_rv			= lpc32xx_gpio_set_value_p012,</div><div class='ctx'> 			.request		= lpc32xx_gpio_request,</div><div class='ctx'> 			.base			= LPC32XX_GPIO_P2_GRP,</div><div class='ctx'> 			.ngpio			= LPC32XX_GPIO_P2_MAX,</div><div class='hunk'>@@ -448,7 +454,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {</div><div class='ctx'> 			.direction_input	= lpc32xx_gpio_dir_input_p3,</div><div class='ctx'> 			.get			= lpc32xx_gpio_get_value_p3,</div><div class='ctx'> 			.direction_output	= lpc32xx_gpio_dir_output_p3,</div><div class='del'>-			.set			= lpc32xx_gpio_set_value_p3,</div><div class='add'>+			.set_rv			= lpc32xx_gpio_set_value_p3,</div><div class='ctx'> 			.request		= lpc32xx_gpio_request,</div><div class='ctx'> 			.to_irq			= lpc32xx_gpio_to_irq_gpio_p3,</div><div class='ctx'> 			.base			= LPC32XX_GPIO_P3_GRP,</div><div class='hunk'>@@ -476,7 +482,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {</div><div class='ctx'> 		.chip = {</div><div class='ctx'> 			.label			= "gpo_p3",</div><div class='ctx'> 			.direction_output	= lpc32xx_gpio_dir_out_always,</div><div class='del'>-			.set			= lpc32xx_gpo_set_value,</div><div class='add'>+			.set_rv			= lpc32xx_gpo_set_value,</div><div class='ctx'> 			.get			= lpc32xx_gpo_get_value,</div><div class='ctx'> 			.request		= lpc32xx_gpio_request,</div><div class='ctx'> 			.base			= LPC32XX_GPO_P3_GRP,</div><div class='head'>diff --git a/drivers/gpio/gpio-madera.c b/drivers/gpio/gpio-madera.c<br/>index 8f38303fcbc4..e73e72d62bc8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-madera.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-madera.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-madera.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-madera.c</a></div><div class='hunk'>@@ -87,23 +87,17 @@ static int madera_gpio_direction_out(struct gpio_chip *chip,</div><div class='ctx'> 				  MADERA_GP1_LVL_MASK, reg_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void madera_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			    int value)</div><div class='add'>+static int madera_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			   int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct madera_gpio *madera_gpio = gpiochip_get_data(chip);</div><div class='ctx'> 	struct madera *madera = madera_gpio-&gt;madera;</div><div class='ctx'> 	unsigned int reg_offset = 2 * offset;</div><div class='ctx'> 	unsigned int reg_val = value ? MADERA_GP1_LVL : 0;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = regmap_update_bits(madera-&gt;regmap,</div><div class='del'>-				 MADERA_GPIO1_CTRL_1 + reg_offset,</div><div class='del'>-				 MADERA_GP1_LVL_MASK, reg_val);</div><div class='ctx'> </div><div class='del'>-	/* set() doesn't return an error so log a warning */</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_warn(madera-&gt;dev, "Failed to write to 0x%x (%d)\n",</div><div class='del'>-			 MADERA_GPIO1_CTRL_1 + reg_offset, ret);</div><div class='add'>+	return regmap_update_bits(madera-&gt;regmap,</div><div class='add'>+				  MADERA_GPIO1_CTRL_1 + reg_offset,</div><div class='add'>+				  MADERA_GP1_LVL_MASK, reg_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct gpio_chip madera_gpio_chip = {</div><div class='hunk'>@@ -115,7 +109,7 @@ static const struct gpio_chip madera_gpio_chip = {</div><div class='ctx'> 	.direction_input	= madera_gpio_direction_in,</div><div class='ctx'> 	.get			= madera_gpio_get,</div><div class='ctx'> 	.direction_output	= madera_gpio_direction_out,</div><div class='del'>-	.set			= madera_gpio_set,</div><div class='add'>+	.set_rv			= madera_gpio_set,</div><div class='ctx'> 	.set_config		= gpiochip_generic_config,</div><div class='ctx'> 	.can_sleep		= true,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpio/gpio-max3191x.c b/drivers/gpio/gpio-max3191x.c<br/>index fc0708ab5192..6e6504ab740a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max3191x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max3191x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max3191x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-max3191x.c</a></div><div class='hunk'>@@ -103,19 +103,6 @@ static int max3191x_direction_input(struct gpio_chip *gpio, unsigned int offset)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int max3191x_direction_output(struct gpio_chip *gpio,</div><div class='del'>-				     unsigned int offset, int value)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void max3191x_set(struct gpio_chip *gpio, unsigned int offset, int value)</div><div class='del'>-{ }</div><div class='del'>-</div><div class='del'>-static void max3191x_set_multiple(struct gpio_chip *gpio, unsigned long *mask,</div><div class='del'>-				  unsigned long *bits)</div><div class='del'>-{ }</div><div class='del'>-</div><div class='ctx'> static unsigned int max3191x_wordlen(struct max3191x_chip *max3191x)</div><div class='ctx'> {</div><div class='ctx'> 	return max3191x-&gt;mode == STATUS_BYTE_ENABLED ? 2 : 1;</div><div class='hunk'>@@ -421,9 +408,6 @@ static int max3191x_probe(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	max3191x-&gt;gpio.get_direction = max3191x_get_direction;</div><div class='ctx'> 	max3191x-&gt;gpio.direction_input = max3191x_direction_input;</div><div class='del'>-	max3191x-&gt;gpio.direction_output = max3191x_direction_output;</div><div class='del'>-	max3191x-&gt;gpio.set = max3191x_set;</div><div class='del'>-	max3191x-&gt;gpio.set_multiple = max3191x_set_multiple;</div><div class='ctx'> 	max3191x-&gt;gpio.get = max3191x_get;</div><div class='ctx'> 	max3191x-&gt;gpio.get_multiple = max3191x_get_multiple;</div><div class='ctx'> 	max3191x-&gt;gpio.set_config = max3191x_set_config;</div><div class='head'>diff --git a/drivers/gpio/gpio-max730x.c b/drivers/gpio/gpio-max730x.c<br/>index e688c13c8cc3..75d414d8c992 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max730x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max730x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max730x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-max730x.c</a></div><div class='hunk'>@@ -143,18 +143,21 @@ static int max7301_get(struct gpio_chip *chip, unsigned offset)</div><div class='ctx'> 	return level;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void max7301_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int max7301_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct max7301 *ts = gpiochip_get_data(chip);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* First 4 pins are unused in the controller */</div><div class='ctx'> 	offset += 4;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ts-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	__max7301_set(ts, offset, value);</div><div class='add'>+	ret = __max7301_set(ts, offset, value);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;ts-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int __max730x_probe(struct max7301 *ts)</div><div class='hunk'>@@ -185,7 +188,7 @@ int __max730x_probe(struct max7301 *ts)</div><div class='ctx'> 	ts-&gt;chip.direction_input = max7301_direction_input;</div><div class='ctx'> 	ts-&gt;chip.get = max7301_get;</div><div class='ctx'> 	ts-&gt;chip.direction_output = max7301_direction_output;</div><div class='del'>-	ts-&gt;chip.set = max7301_set;</div><div class='add'>+	ts-&gt;chip.set_rv = max7301_set;</div><div class='ctx'> </div><div class='ctx'> 	ts-&gt;chip.ngpio = PIN_NUMBER;</div><div class='ctx'> 	ts-&gt;chip.can_sleep = true;</div><div class='head'>diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c<br/>index 49d362907bc7..d5ffedb086af 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max732x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max732x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max732x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-max732x.c</a></div><div class='hunk'>@@ -225,16 +225,19 @@ out:</div><div class='ctx'> 	mutex_unlock(&amp;chip-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void max732x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)</div><div class='add'>+static int max732x_gpio_set_value(struct gpio_chip *gc, unsigned int off,</div><div class='add'>+				  int val)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned base = off &amp; ~0x7;</div><div class='ctx'> 	uint8_t mask = 1u &lt;&lt; (off &amp; 0x7);</div><div class='ctx'> </div><div class='ctx'> 	max732x_gpio_set_mask(gc, base, mask, val &lt;&lt; (off &amp; 0x7));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void max732x_gpio_set_multiple(struct gpio_chip *gc,</div><div class='del'>-				      unsigned long *mask, unsigned long *bits)</div><div class='add'>+static int max732x_gpio_set_multiple(struct gpio_chip *gc,</div><div class='add'>+				     unsigned long *mask, unsigned long *bits)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned mask_lo = mask[0] &amp; 0xff;</div><div class='ctx'> 	unsigned mask_hi = (mask[0] &gt;&gt; 8) &amp; 0xff;</div><div class='hunk'>@@ -243,6 +246,8 @@ static void max732x_gpio_set_multiple(struct gpio_chip *gc,</div><div class='ctx'> 		max732x_gpio_set_mask(gc, 0, mask_lo, bits[0] &amp; 0xff);</div><div class='ctx'> 	if (mask_hi)</div><div class='ctx'> 		max732x_gpio_set_mask(gc, 8, mask_hi, (bits[0] &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off)</div><div class='hunk'>@@ -580,8 +585,8 @@ static int max732x_setup_gpio(struct max732x_chip *chip,</div><div class='ctx'> 		gc-&gt;direction_input = max732x_gpio_direction_input;</div><div class='ctx'> 	if (chip-&gt;dir_output) {</div><div class='ctx'> 		gc-&gt;direction_output = max732x_gpio_direction_output;</div><div class='del'>-		gc-&gt;set = max732x_gpio_set_value;</div><div class='del'>-		gc-&gt;set_multiple = max732x_gpio_set_multiple;</div><div class='add'>+		gc-&gt;set_rv = max732x_gpio_set_value;</div><div class='add'>+		gc-&gt;set_multiple_rv = max732x_gpio_set_multiple;</div><div class='ctx'> 	}</div><div class='ctx'> 	gc-&gt;get = max732x_gpio_get_value;</div><div class='ctx'> 	gc-&gt;can_sleep = true;</div><div class='head'>diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gpio-max77620.c<br/>index 8c2a5609161f..af7af8e40afe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max77620.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-max77620.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max77620.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-max77620.c</a></div><div class='hunk'>@@ -223,20 +223,17 @@ static int max77620_gpio_set_debounce(struct max77620_gpio *mgpio,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void max77620_gpio_set(struct gpio_chip *gc, unsigned int offset,</div><div class='del'>-			      int value)</div><div class='add'>+static int max77620_gpio_set(struct gpio_chip *gc, unsigned int offset,</div><div class='add'>+			     int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct max77620_gpio *mgpio = gpiochip_get_data(gc);</div><div class='ctx'> 	u8 val;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	val = (value) ? MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH :</div><div class='ctx'> 				MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW;</div><div class='ctx'> </div><div class='del'>-	ret = regmap_update_bits(mgpio-&gt;rmap, GPIO_REG_ADDR(offset),</div><div class='del'>-				 MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		dev_err(mgpio-&gt;dev, "CNFG_GPIO_OUT update failed: %d\n", ret);</div><div class='add'>+	return regmap_update_bits(mgpio-&gt;rmap, GPIO_REG_ADDR(offset),</div><div class='add'>+				  MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int max77620_gpio_set_config(struct gpio_chip *gc, unsigned int offset,</div><div class='hunk'>@@ -314,7 +311,7 @@ static int max77620_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	mgpio-&gt;gpio_chip.direction_input = max77620_gpio_dir_input;</div><div class='ctx'> 	mgpio-&gt;gpio_chip.get = max77620_gpio_get;</div><div class='ctx'> 	mgpio-&gt;gpio_chip.direction_output = max77620_gpio_dir_output;</div><div class='del'>-	mgpio-&gt;gpio_chip.set = max77620_gpio_set;</div><div class='add'>+	mgpio-&gt;gpio_chip.set_rv = max77620_gpio_set;</div><div class='ctx'> 	mgpio-&gt;gpio_chip.set_config = max77620_gpio_set_config;</div><div class='ctx'> 	mgpio-&gt;gpio_chip.ngpio = MAX77620_GPIO_NR;</div><div class='ctx'> 	mgpio-&gt;gpio_chip.can_sleep = 1;</div><div class='head'>diff --git a/drivers/gpio/gpio-max77759.c b/drivers/gpio/gpio-max77759.c<br/>new file mode 100644<br/>index 000000000000..7fe8e6f697d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-max77759.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-max77759.c</a></div><div class='hunk'>@@ -0,0 +1,530 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+//</div><div class='add'>+// Copyright 2020 Google Inc</div><div class='add'>+// Copyright 2025 Linaro Ltd.</div><div class='add'>+//</div><div class='add'>+// GPIO driver for Maxim MAX77759</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dev_printk.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/device/driver.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqreturn.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='add'>+#include &lt;linux/mfd/max77759.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/overflow.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+</div><div class='add'>+#define MAX77759_N_GPIOS   ARRAY_SIZE(max77759_gpio_line_names)</div><div class='add'>+static const char * const max77759_gpio_line_names[] = { "GPIO5", "GPIO6" };</div><div class='add'>+</div><div class='add'>+struct max77759_gpio_chip {</div><div class='add'>+	struct regmap *map;</div><div class='add'>+	struct max77759 *max77759;</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	struct mutex maxq_lock; /* protect MaxQ r/m/w operations */</div><div class='add'>+</div><div class='add'>+	struct mutex irq_lock; /* protect irq bus */</div><div class='add'>+	int irq_mask;</div><div class='add'>+	int irq_mask_changed;</div><div class='add'>+	int irq_trig;</div><div class='add'>+	int irq_trig_changed;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX77759_GPIOx_TRIGGER(offs, val) (((val) &amp; 1) &lt;&lt; (offs))</div><div class='add'>+#define MAX77759_GPIOx_TRIGGER_MASK(offs) MAX77759_GPIOx_TRIGGER(offs, ~0)</div><div class='add'>+enum max77759_trigger_gpio_type {</div><div class='add'>+	MAX77759_GPIO_TRIGGER_RISING = 0,</div><div class='add'>+	MAX77759_GPIO_TRIGGER_FALLING = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX77759_GPIOx_DIR(offs, dir) (((dir) &amp; 1) &lt;&lt; (2 + (3 * (offs))))</div><div class='add'>+#define MAX77759_GPIOx_DIR_MASK(offs) MAX77759_GPIOx_DIR(offs, ~0)</div><div class='add'>+enum max77759_control_gpio_dir {</div><div class='add'>+	MAX77759_GPIO_DIR_IN = 0,</div><div class='add'>+	MAX77759_GPIO_DIR_OUT = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX77759_GPIOx_OUTVAL(offs, val) (((val) &amp; 1) &lt;&lt; (3 + (3 * (offs))))</div><div class='add'>+#define MAX77759_GPIOx_OUTVAL_MASK(offs) MAX77759_GPIOx_OUTVAL(offs, ~0)</div><div class='add'>+</div><div class='add'>+#define MAX77759_GPIOx_INVAL_MASK(offs) (BIT(4) &lt;&lt; (3 * (offs)))</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_maxq_gpio_trigger_read(struct max77759_gpio_chip *chip)</div><div class='add'>+{</div><div class='add'>+	DEFINE_FLEX(struct max77759_maxq_command, cmd, cmd, length, 1);</div><div class='add'>+	DEFINE_FLEX(struct max77759_maxq_response, rsp, rsp, length, 2);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd[0] = MAX77759_MAXQ_OPCODE_GPIO_TRIGGER_READ;</div><div class='add'>+</div><div class='add'>+	ret = max77759_maxq_command(chip-&gt;max77759, cmd, rsp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return rsp-&gt;rsp[1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_maxq_gpio_trigger_write(struct max77759_gpio_chip *chip,</div><div class='add'>+						 u8 trigger)</div><div class='add'>+{</div><div class='add'>+	DEFINE_FLEX(struct max77759_maxq_command, cmd, cmd, length, 2);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd[0] = MAX77759_MAXQ_OPCODE_GPIO_TRIGGER_WRITE;</div><div class='add'>+	cmd-&gt;cmd[1] = trigger;</div><div class='add'>+</div><div class='add'>+	return max77759_maxq_command(chip-&gt;max77759, cmd, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_maxq_gpio_control_read(struct max77759_gpio_chip *chip)</div><div class='add'>+{</div><div class='add'>+	DEFINE_FLEX(struct max77759_maxq_command, cmd, cmd, length, 1);</div><div class='add'>+	DEFINE_FLEX(struct max77759_maxq_response, rsp, rsp, length, 2);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd[0] = MAX77759_MAXQ_OPCODE_GPIO_CONTROL_READ;</div><div class='add'>+</div><div class='add'>+	ret = max77759_maxq_command(chip-&gt;max77759, cmd, rsp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return rsp-&gt;rsp[1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_maxq_gpio_control_write(struct max77759_gpio_chip *chip,</div><div class='add'>+						 u8 ctrl)</div><div class='add'>+{</div><div class='add'>+	DEFINE_FLEX(struct max77759_maxq_command, cmd, cmd, length, 2);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd[0] = MAX77759_MAXQ_OPCODE_GPIO_CONTROL_WRITE;</div><div class='add'>+	cmd-&gt;cmd[1] = ctrl;</div><div class='add'>+</div><div class='add'>+	return max77759_maxq_command(chip-&gt;max77759, cmd, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+max77759_gpio_direction_from_control(int ctrl, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	enum max77759_control_gpio_dir dir;</div><div class='add'>+</div><div class='add'>+	dir = !!(ctrl &amp; MAX77759_GPIOx_DIR_MASK(offset));</div><div class='add'>+	return ((dir == MAX77759_GPIO_DIR_OUT)</div><div class='add'>+		? GPIO_LINE_DIRECTION_OUT</div><div class='add'>+		: GPIO_LINE_DIRECTION_IN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_get_direction(struct gpio_chip *gc,</div><div class='add'>+				       unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	int ctrl;</div><div class='add'>+</div><div class='add'>+	ctrl = max77759_gpio_maxq_gpio_control_read(chip);</div><div class='add'>+	if (ctrl &lt; 0)</div><div class='add'>+		return ctrl;</div><div class='add'>+</div><div class='add'>+	return max77759_gpio_direction_from_control(ctrl, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_direction_helper(struct gpio_chip *gc,</div><div class='add'>+					  unsigned int offset,</div><div class='add'>+					  enum max77759_control_gpio_dir dir,</div><div class='add'>+					  int value)</div><div class='add'>+{</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	int ctrl, new_ctrl;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;chip-&gt;maxq_lock);</div><div class='add'>+</div><div class='add'>+	ctrl = max77759_gpio_maxq_gpio_control_read(chip);</div><div class='add'>+	if (ctrl &lt; 0)</div><div class='add'>+		return ctrl;</div><div class='add'>+</div><div class='add'>+	new_ctrl = ctrl &amp; ~MAX77759_GPIOx_DIR_MASK(offset);</div><div class='add'>+	new_ctrl |= MAX77759_GPIOx_DIR(offset, dir);</div><div class='add'>+</div><div class='add'>+	if (dir == MAX77759_GPIO_DIR_OUT) {</div><div class='add'>+		new_ctrl &amp;= ~MAX77759_GPIOx_OUTVAL_MASK(offset);</div><div class='add'>+		new_ctrl |= MAX77759_GPIOx_OUTVAL(offset, value);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_ctrl == ctrl)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return max77759_gpio_maxq_gpio_control_write(chip, new_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_direction_input(struct gpio_chip *gc,</div><div class='add'>+					 unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	return max77759_gpio_direction_helper(gc, offset,</div><div class='add'>+					      MAX77759_GPIO_DIR_IN, -1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_direction_output(struct gpio_chip *gc,</div><div class='add'>+					  unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	return max77759_gpio_direction_helper(gc, offset,</div><div class='add'>+					      MAX77759_GPIO_DIR_OUT, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_get_value(struct gpio_chip *gc, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	int ctrl, mask;</div><div class='add'>+</div><div class='add'>+	ctrl = max77759_gpio_maxq_gpio_control_read(chip);</div><div class='add'>+	if (ctrl &lt; 0)</div><div class='add'>+		return ctrl;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The input status bit doesn't reflect the pin state when the GPIO is</div><div class='add'>+	 * configured as an output. Check the direction, and inspect the input</div><div class='add'>+	 * or output bit accordingly.</div><div class='add'>+	 */</div><div class='add'>+	mask = ((max77759_gpio_direction_from_control(ctrl, offset)</div><div class='add'>+		 == GPIO_LINE_DIRECTION_IN)</div><div class='add'>+		? MAX77759_GPIOx_INVAL_MASK(offset)</div><div class='add'>+		: MAX77759_GPIOx_OUTVAL_MASK(offset));</div><div class='add'>+</div><div class='add'>+	return !!(ctrl &amp; mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_set_value(struct gpio_chip *gc,</div><div class='add'>+				   unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	int ctrl, new_ctrl;</div><div class='add'>+</div><div class='add'>+	guard(mutex)(&amp;chip-&gt;maxq_lock);</div><div class='add'>+</div><div class='add'>+	ctrl = max77759_gpio_maxq_gpio_control_read(chip);</div><div class='add'>+	if (ctrl &lt; 0)</div><div class='add'>+		return ctrl;</div><div class='add'>+</div><div class='add'>+	new_ctrl = ctrl &amp; ~MAX77759_GPIOx_OUTVAL_MASK(offset);</div><div class='add'>+	new_ctrl |= MAX77759_GPIOx_OUTVAL(offset, value);</div><div class='add'>+</div><div class='add'>+	if (new_ctrl == ctrl)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return max77759_gpio_maxq_gpio_control_write(chip, new_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77759_gpio_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+	chip-&gt;irq_mask &amp;= ~MAX77759_MAXQ_REG_UIC_INT1_GPIOxI_MASK(hwirq);</div><div class='add'>+	chip-&gt;irq_mask |= MAX77759_MAXQ_REG_UIC_INT1_GPIOxI(hwirq, 1);</div><div class='add'>+	chip-&gt;irq_mask_changed |= MAX77759_MAXQ_REG_UIC_INT1_GPIOxI(hwirq, 1);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(gc, hwirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77759_gpio_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+	gpiochip_enable_irq(gc, hwirq);</div><div class='add'>+</div><div class='add'>+	chip-&gt;irq_mask &amp;= ~MAX77759_MAXQ_REG_UIC_INT1_GPIOxI_MASK(hwirq);</div><div class='add'>+	chip-&gt;irq_mask |= MAX77759_MAXQ_REG_UIC_INT1_GPIOxI(hwirq, 0);</div><div class='add'>+	chip-&gt;irq_mask_changed |= MAX77759_MAXQ_REG_UIC_INT1_GPIOxI(hwirq, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_set_irq_type(struct irq_data *d, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+	chip-&gt;irq_trig &amp;= ~MAX77759_GPIOx_TRIGGER_MASK(hwirq);</div><div class='add'>+	switch (type) {</div><div class='add'>+	case IRQ_TYPE_EDGE_RISING:</div><div class='add'>+		chip-&gt;irq_trig |= MAX77759_GPIOx_TRIGGER(hwirq,</div><div class='add'>+						MAX77759_GPIO_TRIGGER_RISING);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IRQ_TYPE_EDGE_FALLING:</div><div class='add'>+		chip-&gt;irq_trig |= MAX77759_GPIOx_TRIGGER(hwirq,</div><div class='add'>+						MAX77759_GPIO_TRIGGER_FALLING);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;irq_trig_changed |= MAX77759_GPIOx_TRIGGER(hwirq, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77759_gpio_bus_lock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;irq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_bus_sync_unlock_helper(struct gpio_chip *gc,</div><div class='add'>+						struct max77759_gpio_chip *chip)</div><div class='add'>+					       __must_hold(&amp;chip-&gt;maxq_lock)</div><div class='add'>+{</div><div class='add'>+	int ctrl, trigger, new_trigger, new_ctrl;</div><div class='add'>+	unsigned long irq_trig_changed;</div><div class='add'>+	int offset;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;chip-&gt;maxq_lock);</div><div class='add'>+</div><div class='add'>+	ctrl = max77759_gpio_maxq_gpio_control_read(chip);</div><div class='add'>+	trigger = max77759_gpio_maxq_gpio_trigger_read(chip);</div><div class='add'>+	if (ctrl &lt; 0 || trigger &lt; 0) {</div><div class='add'>+		dev_err(gc-&gt;parent, "failed to read current state: %d / %d\n",</div><div class='add'>+			ctrl, trigger);</div><div class='add'>+		return (ctrl &lt; 0) ? ctrl : trigger;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	new_trigger = trigger &amp; ~chip-&gt;irq_trig_changed;</div><div class='add'>+	new_trigger |= (chip-&gt;irq_trig &amp; chip-&gt;irq_trig_changed);</div><div class='add'>+</div><div class='add'>+	/* change GPIO direction if required */</div><div class='add'>+	new_ctrl = ctrl;</div><div class='add'>+	irq_trig_changed = chip-&gt;irq_trig_changed;</div><div class='add'>+	for_each_set_bit(offset, &amp;irq_trig_changed, MAX77759_N_GPIOS) {</div><div class='add'>+		new_ctrl &amp;= ~MAX77759_GPIOx_DIR_MASK(offset);</div><div class='add'>+		new_ctrl |= MAX77759_GPIOx_DIR(offset, MAX77759_GPIO_DIR_IN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_trigger != trigger) {</div><div class='add'>+		ret = max77759_gpio_maxq_gpio_trigger_write(chip, new_trigger);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(gc-&gt;parent,</div><div class='add'>+				"failed to write new trigger: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_ctrl != ctrl) {</div><div class='add'>+		ret = max77759_gpio_maxq_gpio_control_write(chip, new_ctrl);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(gc-&gt;parent,</div><div class='add'>+				"failed to write new control: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;irq_trig_changed = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77759_gpio_bus_sync_unlock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct max77759_gpio_chip *chip = gpiochip_get_data(gc);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	scoped_guard(mutex, &amp;chip-&gt;maxq_lock) {</div><div class='add'>+		ret = max77759_gpio_bus_sync_unlock_helper(gc, chip);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(chip-&gt;map,</div><div class='add'>+				 MAX77759_MAXQ_REG_UIC_INT1_M,</div><div class='add'>+				 chip-&gt;irq_mask_changed, chip-&gt;irq_mask);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(gc-&gt;parent,</div><div class='add'>+			"failed to update UIC_INT1 irq mask: %d\n", ret);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;irq_mask_changed = 0;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;irq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void max77759_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	seq_puts(p, dev_name(gc-&gt;parent));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip max77759_gpio_irq_chip = {</div><div class='add'>+	.irq_mask		= max77759_gpio_irq_mask,</div><div class='add'>+	.irq_unmask		= max77759_gpio_irq_unmask,</div><div class='add'>+	.irq_set_type		= max77759_gpio_set_irq_type,</div><div class='add'>+	.irq_bus_lock		= max77759_gpio_bus_lock,</div><div class='add'>+	.irq_bus_sync_unlock	= max77759_gpio_bus_sync_unlock,</div><div class='add'>+	.irq_print_chip		= max77759_gpio_irq_print_chip,</div><div class='add'>+	.flags			= IRQCHIP_IMMUTABLE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t max77759_gpio_irqhandler(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct max77759_gpio_chip *chip = data;</div><div class='add'>+	struct gpio_chip *gc = &amp;chip-&gt;gc;</div><div class='add'>+	bool handled = false;</div><div class='add'>+</div><div class='add'>+	/* iterate until no interrupt is pending */</div><div class='add'>+	while (true) {</div><div class='add'>+		unsigned int uic_int1;</div><div class='add'>+		int ret;</div><div class='add'>+		unsigned long pending;</div><div class='add'>+		int offset;</div><div class='add'>+</div><div class='add'>+		ret = regmap_read(chip-&gt;map, MAX77759_MAXQ_REG_UIC_INT1,</div><div class='add'>+				  &amp;uic_int1);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err_ratelimited(gc-&gt;parent,</div><div class='add'>+					    "failed to read IRQ status: %d\n",</div><div class='add'>+					    ret);</div><div class='add'>+			/*</div><div class='add'>+			 * If !handled, we have looped not even once, which</div><div class='add'>+			 * means we should return IRQ_NONE in that case (and</div><div class='add'>+			 * of course IRQ_HANDLED otherwise).</div><div class='add'>+			 */</div><div class='add'>+			return IRQ_RETVAL(handled);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pending = uic_int1;</div><div class='add'>+		pending &amp;= (MAX77759_MAXQ_REG_UIC_INT1_GPIO6I</div><div class='add'>+			    | MAX77759_MAXQ_REG_UIC_INT1_GPIO5I);</div><div class='add'>+		if (!pending)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(offset, &amp;pending, MAX77759_N_GPIOS) {</div><div class='add'>+			/*</div><div class='add'>+			 * ACK interrupt by writing 1 to bit 'offset', all</div><div class='add'>+			 * others need to be written as 0. This needs to be</div><div class='add'>+			 * done unconditionally hence regmap_set_bits() is</div><div class='add'>+			 * inappropriate here.</div><div class='add'>+			 */</div><div class='add'>+			regmap_write(chip-&gt;map, MAX77759_MAXQ_REG_UIC_INT1,</div><div class='add'>+				     BIT(offset));</div><div class='add'>+</div><div class='add'>+			handle_nested_irq(irq_find_mapping(gc-&gt;irq.domain,</div><div class='add'>+							   offset));</div><div class='add'>+</div><div class='add'>+			handled = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_RETVAL(handled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int max77759_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct max77759_gpio_chip *chip;</div><div class='add'>+	int irq;</div><div class='add'>+	struct gpio_irq_chip *girq;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned long irq_flags;</div><div class='add'>+	struct irq_data *irqd;</div><div class='add'>+</div><div class='add'>+	chip = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip-&gt;map = dev_get_regmap(pdev-&gt;dev.parent, "maxq");</div><div class='add'>+	if (!chip-&gt;map)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, -ENODEV, "Missing regmap\n");</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq_byname(pdev, "GPI");</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, irq, "Failed to get IRQ\n");</div><div class='add'>+</div><div class='add'>+	chip-&gt;max77759 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	ret = devm_mutex_init(&amp;pdev-&gt;dev, &amp;chip-&gt;maxq_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = devm_mutex_init(&amp;pdev-&gt;dev, &amp;chip-&gt;irq_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	chip-&gt;gc.base = -1;</div><div class='add'>+	chip-&gt;gc.label = dev_name(&amp;pdev-&gt;dev);</div><div class='add'>+	chip-&gt;gc.parent = &amp;pdev-&gt;dev;</div><div class='add'>+	chip-&gt;gc.can_sleep = true;</div><div class='add'>+</div><div class='add'>+	chip-&gt;gc.names = max77759_gpio_line_names;</div><div class='add'>+	chip-&gt;gc.ngpio = MAX77759_N_GPIOS;</div><div class='add'>+	chip-&gt;gc.get_direction = max77759_gpio_get_direction;</div><div class='add'>+	chip-&gt;gc.direction_input = max77759_gpio_direction_input;</div><div class='add'>+	chip-&gt;gc.direction_output = max77759_gpio_direction_output;</div><div class='add'>+	chip-&gt;gc.get = max77759_gpio_get_value;</div><div class='add'>+	chip-&gt;gc.set_rv = max77759_gpio_set_value;</div><div class='add'>+</div><div class='add'>+	girq = &amp;chip-&gt;gc.irq;</div><div class='add'>+	gpio_irq_chip_set_chip(girq, &amp;max77759_gpio_irq_chip);</div><div class='add'>+	/* This will let us handle the parent IRQ in the driver */</div><div class='add'>+	girq-&gt;parent_handler = NULL;</div><div class='add'>+	girq-&gt;num_parents = 0;</div><div class='add'>+	girq-&gt;parents = NULL;</div><div class='add'>+	girq-&gt;default_type = IRQ_TYPE_NONE;</div><div class='add'>+	girq-&gt;handler = handle_simple_irq;</div><div class='add'>+	girq-&gt;threaded = true;</div><div class='add'>+</div><div class='add'>+	ret = devm_gpiochip_add_data(&amp;pdev-&gt;dev, &amp;chip-&gt;gc, chip);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				     "Failed to add GPIO chip\n");</div><div class='add'>+</div><div class='add'>+	irq_flags = IRQF_ONESHOT | IRQF_SHARED;</div><div class='add'>+	irqd = irq_get_irq_data(irq);</div><div class='add'>+	if (irqd)</div><div class='add'>+		irq_flags |= irqd_get_trigger_type(irqd);</div><div class='add'>+</div><div class='add'>+	ret = devm_request_threaded_irq(&amp;pdev-&gt;dev, irq, NULL,</div><div class='add'>+					max77759_gpio_irqhandler, irq_flags,</div><div class='add'>+					dev_name(&amp;pdev-&gt;dev), chip);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				     "Failed to request IRQ\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id max77759_gpio_of_id[] = {</div><div class='add'>+	{ .compatible = "maxim,max77759-gpio", },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, max77759_gpio_of_id);</div><div class='add'>+</div><div class='add'>+static const struct platform_device_id max77759_gpio_platform_id[] = {</div><div class='add'>+	{ "max77759-gpio", },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, max77759_gpio_platform_id);</div><div class='add'>+</div><div class='add'>+static struct platform_driver max77759_gpio_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "max77759-gpio",</div><div class='add'>+		.probe_type = PROBE_PREFER_ASYNCHRONOUS,</div><div class='add'>+		.of_match_table = max77759_gpio_of_id,</div><div class='add'>+	},</div><div class='add'>+	.probe = max77759_gpio_probe,</div><div class='add'>+	.id_table = max77759_gpio_platform_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(max77759_gpio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("André Draszik &lt;andre.draszik@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("GPIO driver for Maxim MAX77759");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpio/gpio-mb86s7x.c b/drivers/gpio/gpio-mb86s7x.c<br/>index 7ee891ef6905..5ee2991ecdfd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mb86s7x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mb86s7x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mb86s7x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-mb86s7x.c</a></div><div class='hunk'>@@ -119,7 +119,7 @@ static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)</div><div class='ctx'> 	return !!(readl(gchip-&gt;base + PDR(gpio)) &amp; OFFSET(gpio));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)</div><div class='add'>+static int mb86s70_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -135,6 +135,8 @@ static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)</div><div class='ctx'> 	writel(val, gchip-&gt;base + PDR(gpio));</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;gchip-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mb86s70_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)</div><div class='hunk'>@@ -178,7 +180,7 @@ static int mb86s70_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	gchip-&gt;gc.request = mb86s70_gpio_request;</div><div class='ctx'> 	gchip-&gt;gc.free = mb86s70_gpio_free;</div><div class='ctx'> 	gchip-&gt;gc.get = mb86s70_gpio_get;</div><div class='del'>-	gchip-&gt;gc.set = mb86s70_gpio_set;</div><div class='add'>+	gchip-&gt;gc.set_rv = mb86s70_gpio_set;</div><div class='ctx'> 	gchip-&gt;gc.to_irq = mb86s70_gpio_to_irq;</div><div class='ctx'> 	gchip-&gt;gc.label = dev_name(&amp;pdev-&gt;dev);</div><div class='ctx'> 	gchip-&gt;gc.ngpio = 32;</div><div class='head'>diff --git a/drivers/gpio/gpio-mc33880.c b/drivers/gpio/gpio-mc33880.c<br/>index 5fb357d7b78a..e68956104161 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mc33880.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mc33880.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mc33880.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-mc33880.c</a></div><div class='hunk'>@@ -57,15 +57,18 @@ static int __mc33880_set(struct mc33880 *mc, unsigned offset, int value)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void mc33880_set(struct gpio_chip *chip, unsigned offset, int value)</div><div class='add'>+static int mc33880_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct mc33880 *mc = gpiochip_get_data(chip);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mc-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	__mc33880_set(mc, offset, value);</div><div class='add'>+	ret = __mc33880_set(mc, offset, value);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;mc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mc33880_probe(struct spi_device *spi)</div><div class='hunk'>@@ -100,7 +103,7 @@ static int mc33880_probe(struct spi_device *spi)</div><div class='ctx'> 	mc-&gt;spi = spi;</div><div class='ctx'> </div><div class='ctx'> 	mc-&gt;chip.label = DRIVER_NAME;</div><div class='del'>-	mc-&gt;chip.set = mc33880_set;</div><div class='add'>+	mc-&gt;chip.set_rv = mc33880_set;</div><div class='ctx'> 	mc-&gt;chip.base = pdata-&gt;base;</div><div class='ctx'> 	mc-&gt;chip.ngpio = PIN_NUMBER;</div><div class='ctx'> 	mc-&gt;chip.can_sleep = true;</div><div class='head'>diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c<br/>index 48e3768a830e..12cf36f9ca63 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ml-ioh.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-ml-ioh.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-ml-ioh.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-ml-ioh.c</a></div><div class='hunk'>@@ -89,7 +89,7 @@ struct ioh_gpio {</div><div class='ctx'> </div><div class='ctx'> static const int num_ports[] = {6, 12, 16, 16, 15, 16, 16, 12};</div><div class='ctx'> </div><div class='del'>-static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)</div><div class='add'>+static int ioh_gpio_set(struct gpio_chip *gpio, unsigned int nr, int val)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> 	struct ioh_gpio *chip =	gpiochip_get_data(gpio);</div><div class='hunk'>@@ -104,6 +104,8 @@ static void ioh_gpio_set(struct gpio_chip *gpio, unsigned nr, int val)</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(reg_val, &amp;chip-&gt;reg-&gt;regs[chip-&gt;ch].po);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;chip-&gt;spinlock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ioh_gpio_get(struct gpio_chip *gpio, unsigned nr)</div><div class='hunk'>@@ -222,7 +224,7 @@ static void ioh_gpio_setup(struct ioh_gpio *chip, int num_port)</div><div class='ctx'> 	gpio-&gt;direction_input = ioh_gpio_direction_input;</div><div class='ctx'> 	gpio-&gt;get = ioh_gpio_get;</div><div class='ctx'> 	gpio-&gt;direction_output = ioh_gpio_direction_output;</div><div class='del'>-	gpio-&gt;set = ioh_gpio_set;</div><div class='add'>+	gpio-&gt;set_rv = ioh_gpio_set;</div><div class='ctx'> 	gpio-&gt;dbg_show = NULL;</div><div class='ctx'> 	gpio-&gt;base = -1;</div><div class='ctx'> 	gpio-&gt;ngpio = num_port;</div><div class='head'>diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c<br/>index 0cd4c36ae8aa..121efdd71e45 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mpc8xxx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mpc8xxx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mpc8xxx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-mpc8xxx.c</a></div><div class='hunk'>@@ -123,9 +123,12 @@ static irqreturn_t mpc8xxx_gpio_irq_cascade(int irq, void *data)</div><div class='ctx'> static void mpc8xxx_irq_unmask(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='ctx'> 	struct gpio_chip *gc = &amp;mpc8xxx_gc-&gt;gc;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	gpiochip_enable_irq(gc, hwirq);</div><div class='add'>+</div><div class='ctx'> 	raw_spin_lock_irqsave(&amp;mpc8xxx_gc-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	gc-&gt;write_reg(mpc8xxx_gc-&gt;regs + GPIO_IMR,</div><div class='hunk'>@@ -138,6 +141,7 @@ static void mpc8xxx_irq_unmask(struct irq_data *d)</div><div class='ctx'> static void mpc8xxx_irq_mask(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='ctx'> 	struct gpio_chip *gc = &amp;mpc8xxx_gc-&gt;gc;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -148,6 +152,8 @@ static void mpc8xxx_irq_mask(struct irq_data *d)</div><div class='ctx'> 		&amp; ~mpc_pin2mask(irqd_to_hwirq(d)));</div><div class='ctx'> </div><div class='ctx'> 	raw_spin_unlock_irqrestore(&amp;mpc8xxx_gc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(gc, hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mpc8xxx_irq_ack(struct irq_data *d)</div><div class='hunk'>@@ -244,6 +250,8 @@ static struct irq_chip mpc8xxx_irq_chip = {</div><div class='ctx'> 	.irq_ack	= mpc8xxx_irq_ack,</div><div class='ctx'> 	/* this might get overwritten in mpc8xxx_probe() */</div><div class='ctx'> 	.irq_set_type	= mpc8xxx_irq_set_type,</div><div class='add'>+	.flags = IRQCHIP_IMMUTABLE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mpc8xxx_gpio_irq_map(struct irq_domain *h, unsigned int irq,</div><div class='hunk'>@@ -410,7 +418,9 @@ static int mpc8xxx_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	device_init_wakeup(dev, true);</div><div class='add'>+	ret = devm_device_init_wakeup(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to init wakeup\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='head'>diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c<br/>index 3604abcb6fec..57633a7b4270 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mvebu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mvebu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mvebu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-mvebu.c</a></div><div class='hunk'>@@ -408,9 +408,8 @@ static void mvebu_gpio_irq_ack(struct irq_data *d)</div><div class='ctx'> 	struct mvebu_gpio_chip *mvchip = gc-&gt;private;</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	mvebu_gpio_write_edge_cause(mvchip, ~mask);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mvebu_gpio_edge_irq_mask(struct irq_data *d)</div><div class='hunk'>@@ -420,10 +419,9 @@ static void mvebu_gpio_edge_irq_mask(struct irq_data *d)</div><div class='ctx'> 	struct irq_chip_type *ct = irq_data_get_chip_type(d);</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	ct-&gt;mask_cache_priv &amp;= ~mask;</div><div class='ctx'> 	mvebu_gpio_write_edge_mask(mvchip, ct-&gt;mask_cache_priv);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mvebu_gpio_edge_irq_unmask(struct irq_data *d)</div><div class='hunk'>@@ -433,11 +431,10 @@ static void mvebu_gpio_edge_irq_unmask(struct irq_data *d)</div><div class='ctx'> 	struct irq_chip_type *ct = irq_data_get_chip_type(d);</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	mvebu_gpio_write_edge_cause(mvchip, ~mask);</div><div class='ctx'> 	ct-&gt;mask_cache_priv |= mask;</div><div class='ctx'> 	mvebu_gpio_write_edge_mask(mvchip, ct-&gt;mask_cache_priv);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mvebu_gpio_level_irq_mask(struct irq_data *d)</div><div class='hunk'>@@ -447,10 +444,9 @@ static void mvebu_gpio_level_irq_mask(struct irq_data *d)</div><div class='ctx'> 	struct irq_chip_type *ct = irq_data_get_chip_type(d);</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	ct-&gt;mask_cache_priv &amp;= ~mask;</div><div class='ctx'> 	mvebu_gpio_write_level_mask(mvchip, ct-&gt;mask_cache_priv);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mvebu_gpio_level_irq_unmask(struct irq_data *d)</div><div class='hunk'>@@ -460,10 +456,9 @@ static void mvebu_gpio_level_irq_unmask(struct irq_data *d)</div><div class='ctx'> 	struct irq_chip_type *ct = irq_data_get_chip_type(d);</div><div class='ctx'> 	u32 mask = d-&gt;mask;</div><div class='ctx'> </div><div class='del'>-	irq_gc_lock(gc);</div><div class='add'>+	guard(raw_spinlock)(&amp;gc-&gt;lock);</div><div class='ctx'> 	ct-&gt;mask_cache_priv |= mask;</div><div class='ctx'> 	mvebu_gpio_write_level_mask(mvchip, ct-&gt;mask_cache_priv);</div><div class='del'>-	irq_gc_unlock(gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*****************************************************************************</div><div class='hunk'>@@ -1242,7 +1237,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	mvchip-&gt;domain =</div><div class='del'>-	    irq_domain_add_linear(np, ngpios, &amp;irq_generic_chip_ops, NULL);</div><div class='add'>+	    irq_domain_create_linear(of_fwnode_handle(np), ngpios, &amp;irq_generic_chip_ops, NULL);</div><div class='ctx'> 	if (!mvchip-&gt;domain) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "couldn't allocate irq domain %s (DT).\n",</div><div class='ctx'> 			mvchip-&gt;chip.label);</div><div class='head'>diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c<br/>index 619b6fb9d833..fae1a30f8ae6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mxc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mxc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mxc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-mxc.c</a></div><div class='hunk'>@@ -490,7 +490,14 @@ static int mxc_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	port-&gt;gc.request = mxc_gpio_request;</div><div class='ctx'> 	port-&gt;gc.free = mxc_gpio_free;</div><div class='ctx'> 	port-&gt;gc.to_irq = mxc_gpio_to_irq;</div><div class='del'>-	port-&gt;gc.base = of_alias_get_id(np, "gpio") * 32;</div><div class='add'>+	/*</div><div class='add'>+	 * Driver is DT-only, so a fixed base needs only be maintained for legacy</div><div class='add'>+	 * userspace with sysfs interface.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ENABLED(CONFIG_GPIO_SYSFS))</div><div class='add'>+		port-&gt;gc.base = of_alias_get_id(np, "gpio") * 32;</div><div class='add'>+	else /* silence boot time warning */</div><div class='add'>+		port-&gt;gc.base = -1;</div><div class='ctx'> </div><div class='ctx'> 	err = devm_gpiochip_add_data(&amp;pdev-&gt;dev, &amp;port-&gt;gc, port);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -502,7 +509,7 @@ static int mxc_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto out_bgio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	port-&gt;domain = irq_domain_add_legacy(np, 32, irq_base, 0,</div><div class='add'>+	port-&gt;domain = irq_domain_create_legacy(of_fwnode_handle(np), 32, irq_base, 0,</div><div class='ctx'> 					     &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> 	if (!port-&gt;domain) {</div><div class='ctx'> 		err = -ENODEV;</div><div class='head'>diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c<br/>index 024ad077e98d..b418fbccb26c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mxs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-mxs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-mxs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-mxs.c</a></div><div class='hunk'>@@ -303,8 +303,8 @@ static int mxs_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto out_iounmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	port-&gt;domain = irq_domain_add_legacy(np, 32, irq_base, 0,</div><div class='del'>-					     &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	port-&gt;domain = irq_domain_create_legacy(of_fwnode_handle(np), 32, irq_base, 0,</div><div class='add'>+						&amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> 	if (!port-&gt;domain) {</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto out_iounmap;</div><div class='head'>diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c<br/>index 442435ded020..b852e4997629 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pca953x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-pca953x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pca953x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-pca953x.c</a></div><div class='hunk'>@@ -215,6 +215,8 @@ struct pca953x_chip {</div><div class='ctx'> 	DECLARE_BITMAP(irq_stat, MAX_LINE);</div><div class='ctx'> 	DECLARE_BITMAP(irq_trig_raise, MAX_LINE);</div><div class='ctx'> 	DECLARE_BITMAP(irq_trig_fall, MAX_LINE);</div><div class='add'>+	DECLARE_BITMAP(irq_trig_level_high, MAX_LINE);</div><div class='add'>+	DECLARE_BITMAP(irq_trig_level_low, MAX_LINE);</div><div class='ctx'> #endif</div><div class='ctx'> 	atomic_t wakeup_path;</div><div class='ctx'> </div><div class='hunk'>@@ -774,6 +776,8 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)</div><div class='ctx'> 	pca953x_read_regs(chip, chip-&gt;regs-&gt;direction, reg_direction);</div><div class='ctx'> </div><div class='ctx'> 	bitmap_or(irq_mask, chip-&gt;irq_trig_fall, chip-&gt;irq_trig_raise, gc-&gt;ngpio);</div><div class='add'>+	bitmap_or(irq_mask, irq_mask, chip-&gt;irq_trig_level_high, gc-&gt;ngpio);</div><div class='add'>+	bitmap_or(irq_mask, irq_mask, chip-&gt;irq_trig_level_low, gc-&gt;ngpio);</div><div class='ctx'> 	bitmap_complement(reg_direction, reg_direction, gc-&gt;ngpio);</div><div class='ctx'> 	bitmap_and(irq_mask, irq_mask, reg_direction, gc-&gt;ngpio);</div><div class='ctx'> </div><div class='hunk'>@@ -791,13 +795,15 @@ static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 	struct device *dev = &amp;chip-&gt;client-&gt;dev;</div><div class='ctx'> 	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='ctx'> </div><div class='del'>-	if (!(type &amp; IRQ_TYPE_EDGE_BOTH)) {</div><div class='add'>+	if (!(type &amp; IRQ_TYPE_SENSE_MASK)) {</div><div class='ctx'> 		dev_err(dev, "irq %d: unsupported type %d\n", d-&gt;irq, type);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	assign_bit(hwirq, chip-&gt;irq_trig_fall, type &amp; IRQ_TYPE_EDGE_FALLING);</div><div class='ctx'> 	assign_bit(hwirq, chip-&gt;irq_trig_raise, type &amp; IRQ_TYPE_EDGE_RISING);</div><div class='add'>+	assign_bit(hwirq, chip-&gt;irq_trig_level_low, type &amp; IRQ_TYPE_LEVEL_LOW);</div><div class='add'>+	assign_bit(hwirq, chip-&gt;irq_trig_level_high, type &amp; IRQ_TYPE_LEVEL_HIGH);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -810,6 +816,8 @@ static void pca953x_irq_shutdown(struct irq_data *d)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(hwirq, chip-&gt;irq_trig_raise);</div><div class='ctx'> 	clear_bit(hwirq, chip-&gt;irq_trig_fall);</div><div class='add'>+	clear_bit(hwirq, chip-&gt;irq_trig_level_low);</div><div class='add'>+	clear_bit(hwirq, chip-&gt;irq_trig_level_high);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pca953x_irq_print_chip(struct irq_data *data, struct seq_file *p)</div><div class='hunk'>@@ -840,6 +848,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pendin</div><div class='ctx'> 	DECLARE_BITMAP(cur_stat, MAX_LINE);</div><div class='ctx'> 	DECLARE_BITMAP(new_stat, MAX_LINE);</div><div class='ctx'> 	DECLARE_BITMAP(trigger, MAX_LINE);</div><div class='add'>+	DECLARE_BITMAP(edges, MAX_LINE);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pca953x_read_regs(chip, chip-&gt;regs-&gt;input, cur_stat);</div><div class='hunk'>@@ -857,13 +866,26 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pendin</div><div class='ctx'> </div><div class='ctx'> 	bitmap_copy(chip-&gt;irq_stat, new_stat, gc-&gt;ngpio);</div><div class='ctx'> </div><div class='del'>-	if (bitmap_empty(trigger, gc-&gt;ngpio))</div><div class='del'>-		return false;</div><div class='add'>+	if (bitmap_empty(chip-&gt;irq_trig_level_high, gc-&gt;ngpio) &amp;&amp;</div><div class='add'>+	    bitmap_empty(chip-&gt;irq_trig_level_low, gc-&gt;ngpio)) {</div><div class='add'>+		if (bitmap_empty(trigger, gc-&gt;ngpio))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bitmap_and(cur_stat, chip-&gt;irq_trig_fall, old_stat, gc-&gt;ngpio);</div><div class='ctx'> 	bitmap_and(old_stat, chip-&gt;irq_trig_raise, new_stat, gc-&gt;ngpio);</div><div class='del'>-	bitmap_or(new_stat, old_stat, cur_stat, gc-&gt;ngpio);</div><div class='del'>-	bitmap_and(pending, new_stat, trigger, gc-&gt;ngpio);</div><div class='add'>+	bitmap_or(edges, old_stat, cur_stat, gc-&gt;ngpio);</div><div class='add'>+	bitmap_and(pending, edges, trigger, gc-&gt;ngpio);</div><div class='add'>+</div><div class='add'>+	bitmap_and(cur_stat, new_stat, chip-&gt;irq_trig_level_high, gc-&gt;ngpio);</div><div class='add'>+	bitmap_and(cur_stat, cur_stat, chip-&gt;irq_mask, gc-&gt;ngpio);</div><div class='add'>+	bitmap_or(pending, pending, cur_stat, gc-&gt;ngpio);</div><div class='add'>+</div><div class='add'>+	bitmap_complement(cur_stat, new_stat, gc-&gt;ngpio);</div><div class='add'>+	bitmap_and(cur_stat, cur_stat, reg_direction, gc-&gt;ngpio);</div><div class='add'>+	bitmap_and(old_stat, cur_stat, chip-&gt;irq_trig_level_low, gc-&gt;ngpio);</div><div class='add'>+	bitmap_and(old_stat, old_stat, chip-&gt;irq_mask, gc-&gt;ngpio);</div><div class='add'>+	bitmap_or(pending, pending, old_stat, gc-&gt;ngpio);</div><div class='ctx'> </div><div class='ctx'> 	return !bitmap_empty(pending, gc-&gt;ngpio);</div><div class='ctx'> }</div><div class='hunk'>@@ -1204,6 +1226,8 @@ static int pca953x_restore_context(struct pca953x_chip *chip)</div><div class='ctx'> </div><div class='ctx'> 	guard(mutex)(&amp;chip-&gt;i2c_lock);</div><div class='ctx'> </div><div class='add'>+	if (chip-&gt;client-&gt;irq &gt; 0)</div><div class='add'>+		enable_irq(chip-&gt;client-&gt;irq);</div><div class='ctx'> 	regcache_cache_only(chip-&gt;regmap, false);</div><div class='ctx'> 	regcache_mark_dirty(chip-&gt;regmap);</div><div class='ctx'> 	ret = pca953x_regcache_sync(chip);</div><div class='hunk'>@@ -1216,6 +1240,10 @@ static int pca953x_restore_context(struct pca953x_chip *chip)</div><div class='ctx'> static void pca953x_save_context(struct pca953x_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	guard(mutex)(&amp;chip-&gt;i2c_lock);</div><div class='add'>+</div><div class='add'>+	/* Disable IRQ to prevent early triggering while regmap "cache only" is on */</div><div class='add'>+	if (chip-&gt;client-&gt;irq &gt; 0)</div><div class='add'>+		disable_irq(chip-&gt;client-&gt;irq);</div><div class='ctx'> 	regcache_cache_only(chip-&gt;regmap, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c<br/>index 91cea97255fa..aead35ea090e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pxa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-pxa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-pxa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-pxa.c</a></div><div class='hunk'>@@ -497,6 +497,8 @@ static void pxa_mask_muxed_gpio(struct irq_data *d)</div><div class='ctx'> 	gfer = readl_relaxed(base + GFER_OFFSET) &amp; ~GPIO_bit(gpio);</div><div class='ctx'> 	writel_relaxed(grer, base + GRER_OFFSET);</div><div class='ctx'> 	writel_relaxed(gfer, base + GFER_OFFSET);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(&amp;pchip-&gt;chip, gpio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pxa_gpio_set_wake(struct irq_data *d, unsigned int on)</div><div class='hunk'>@@ -516,17 +518,21 @@ static void pxa_unmask_muxed_gpio(struct irq_data *d)</div><div class='ctx'> 	unsigned int gpio = irqd_to_hwirq(d);</div><div class='ctx'> 	struct pxa_gpio_bank *c = gpio_to_pxabank(&amp;pchip-&gt;chip, gpio);</div><div class='ctx'> </div><div class='add'>+	gpiochip_enable_irq(&amp;pchip-&gt;chip, gpio);</div><div class='add'>+</div><div class='ctx'> 	c-&gt;irq_mask |= GPIO_bit(gpio);</div><div class='ctx'> 	update_edge_detect(c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip pxa_muxed_gpio_chip = {</div><div class='add'>+static const struct irq_chip pxa_muxed_gpio_chip = {</div><div class='ctx'> 	.name		= "GPIO",</div><div class='ctx'> 	.irq_ack	= pxa_ack_muxed_gpio,</div><div class='ctx'> 	.irq_mask	= pxa_mask_muxed_gpio,</div><div class='ctx'> 	.irq_unmask	= pxa_unmask_muxed_gpio,</div><div class='ctx'> 	.irq_set_type	= pxa_gpio_irq_type,</div><div class='ctx'> 	.irq_set_wake	= pxa_gpio_set_wake,</div><div class='add'>+	.flags = IRQCHIP_IMMUTABLE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int pxa_gpio_nums(struct platform_device *pdev)</div><div class='hunk'>@@ -636,9 +642,9 @@ static int pxa_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!pxa_last_gpio)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	pchip-&gt;irqdomain = irq_domain_add_legacy(pdev-&gt;dev.of_node,</div><div class='del'>-						 pxa_last_gpio + 1, irq_base,</div><div class='del'>-						 0, &amp;pxa_irq_domain_ops, pchip);</div><div class='add'>+	pchip-&gt;irqdomain = irq_domain_create_legacy(of_fwnode_handle(pdev-&gt;dev.of_node),</div><div class='add'>+						    pxa_last_gpio + 1, irq_base, 0,</div><div class='add'>+						    &amp;pxa_irq_domain_ops, pchip);</div><div class='ctx'> 	if (!pchip-&gt;irqdomain)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c<br/>index 01a3b3dac58b..c63352f2f1ec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-rockchip.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-rockchip.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-rockchip.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-rockchip.c</a></div><div class='hunk'>@@ -521,7 +521,7 @@ static int rockchip_interrupts_register(struct rockchip_pin_bank *bank)</div><div class='ctx'> 	struct irq_chip_generic *gc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	bank-&gt;domain = irq_domain_add_linear(bank-&gt;of_node, 32,</div><div class='add'>+	bank-&gt;domain = irq_domain_create_linear(of_fwnode_handle(bank-&gt;of_node), 32,</div><div class='ctx'> 					&amp;irq_generic_chip_ops, NULL);</div><div class='ctx'> 	if (!bank-&gt;domain) {</div><div class='ctx'> 		dev_warn(bank-&gt;dev, "could not init irq domain for bank %s\n",</div><div class='head'>diff --git a/drivers/gpio/gpio-sa1100.c b/drivers/gpio/gpio-sa1100.c<br/>index 242dad763ac4..3f3ee36bc3cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-sa1100.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-sa1100.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-sa1100.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-sa1100.c</a></div><div class='hunk'>@@ -319,7 +319,7 @@ void __init sa1100_init_gpio(void)</div><div class='ctx'> </div><div class='ctx'> 	gpiochip_add_data(&amp;sa1100_gpio_chip.chip, NULL);</div><div class='ctx'> </div><div class='del'>-	sa1100_gpio_irqdomain = irq_domain_add_simple(NULL,</div><div class='add'>+	sa1100_gpio_irqdomain = irq_domain_create_simple(NULL,</div><div class='ctx'> 			28, IRQ_GPIO0,</div><div class='ctx'> 			&amp;sa1100_gpio_irqdomain_ops, sgc);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c<br/>index c2a2c76c1652..6a3c4c625138 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-sodaville.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-sodaville.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-sodaville.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-sodaville.c</a></div><div class='hunk'>@@ -169,7 +169,7 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,</div><div class='ctx'> 			IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST,</div><div class='ctx'> 			IRQ_LEVEL | IRQ_NOPROBE);</div><div class='ctx'> </div><div class='del'>-	sd-&gt;id = irq_domain_add_legacy(pdev-&gt;dev.of_node, SDV_NUM_PUB_GPIOS,</div><div class='add'>+	sd-&gt;id = irq_domain_create_legacy(of_fwnode_handle(pdev-&gt;dev.of_node), SDV_NUM_PUB_GPIOS,</div><div class='ctx'> 				sd-&gt;irq_base, 0, &amp;irq_domain_sdv_ops, sd);</div><div class='ctx'> 	if (!sd-&gt;id)</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/drivers/gpio/gpio-spacemit-k1.c b/drivers/gpio/gpio-spacemit-k1.c<br/>new file mode 100644<br/>index 000000000000..f027066365ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-spacemit-k1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-spacemit-k1.c</a></div><div class='hunk'>@@ -0,0 +1,293 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2023-2025 SpacemiT (Hangzhou) Technology Co. Ltd</div><div class='add'>+ * Copyright (C) 2025 Yixun Lan &lt;dlan@gentoo.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+</div><div class='add'>+/* register offset */</div><div class='add'>+#define SPACEMIT_GPLR		0x00 /* port level - R */</div><div class='add'>+#define SPACEMIT_GPDR		0x0c /* port direction - R/W */</div><div class='add'>+#define SPACEMIT_GPSR		0x18 /* port set - W */</div><div class='add'>+#define SPACEMIT_GPCR		0x24 /* port clear - W */</div><div class='add'>+#define SPACEMIT_GRER		0x30 /* port rising edge R/W */</div><div class='add'>+#define SPACEMIT_GFER		0x3c /* port falling edge R/W */</div><div class='add'>+#define SPACEMIT_GEDR		0x48 /* edge detect status - R/W1C */</div><div class='add'>+#define SPACEMIT_GSDR		0x54 /* (set) direction - W */</div><div class='add'>+#define SPACEMIT_GCDR		0x60 /* (clear) direction - W */</div><div class='add'>+#define SPACEMIT_GSRER		0x6c /* (set) rising edge detect enable - W */</div><div class='add'>+#define SPACEMIT_GCRER		0x78 /* (clear) rising edge detect enable - W */</div><div class='add'>+#define SPACEMIT_GSFER		0x84 /* (set) falling edge detect enable - W */</div><div class='add'>+#define SPACEMIT_GCFER		0x90 /* (clear) falling edge detect enable - W */</div><div class='add'>+#define SPACEMIT_GAPMASK	0x9c /* interrupt mask , 0 disable, 1 enable - R/W */</div><div class='add'>+</div><div class='add'>+#define SPACEMIT_NR_BANKS		4</div><div class='add'>+#define SPACEMIT_NR_GPIOS_PER_BANK	32</div><div class='add'>+</div><div class='add'>+#define to_spacemit_gpio_bank(x) container_of((x), struct spacemit_gpio_bank, gc)</div><div class='add'>+</div><div class='add'>+struct spacemit_gpio;</div><div class='add'>+</div><div class='add'>+struct spacemit_gpio_bank {</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+	struct spacemit_gpio *sg;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 irq_mask;</div><div class='add'>+	u32 irq_rising_edge;</div><div class='add'>+	u32 irq_falling_edge;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct spacemit_gpio {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct spacemit_gpio_bank sgb[SPACEMIT_NR_BANKS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 spacemit_gpio_bank_index(struct spacemit_gpio_bank *gb)</div><div class='add'>+{</div><div class='add'>+	return (u32)(gb - gb-&gt;sg-&gt;sgb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t spacemit_gpio_irq_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = dev_id;</div><div class='add'>+	unsigned long pending;</div><div class='add'>+	u32 n, gedr;</div><div class='add'>+</div><div class='add'>+	gedr = readl(gb-&gt;base + SPACEMIT_GEDR);</div><div class='add'>+	if (!gedr)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	writel(gedr, gb-&gt;base + SPACEMIT_GEDR);</div><div class='add'>+</div><div class='add'>+	pending = gedr &amp; gb-&gt;irq_mask;</div><div class='add'>+	if (!pending)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(n, &amp;pending, BITS_PER_LONG)</div><div class='add'>+		handle_nested_irq(irq_find_mapping(gb-&gt;gc.irq.domain, n));</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void spacemit_gpio_irq_ack(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	writel(BIT(irqd_to_hwirq(d)), gb-&gt;base + SPACEMIT_GEDR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void spacemit_gpio_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = irq_data_get_irq_chip_data(d);</div><div class='add'>+	u32 bit = BIT(irqd_to_hwirq(d));</div><div class='add'>+</div><div class='add'>+	gb-&gt;irq_mask &amp;= ~bit;</div><div class='add'>+	writel(gb-&gt;irq_mask, gb-&gt;base + SPACEMIT_GAPMASK);</div><div class='add'>+</div><div class='add'>+	if (bit &amp; gb-&gt;irq_rising_edge)</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GCRER);</div><div class='add'>+</div><div class='add'>+	if (bit &amp; gb-&gt;irq_falling_edge)</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GCFER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void spacemit_gpio_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = irq_data_get_irq_chip_data(d);</div><div class='add'>+	u32 bit = BIT(irqd_to_hwirq(d));</div><div class='add'>+</div><div class='add'>+	gb-&gt;irq_mask |= bit;</div><div class='add'>+</div><div class='add'>+	if (bit &amp; gb-&gt;irq_rising_edge)</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GSRER);</div><div class='add'>+</div><div class='add'>+	if (bit &amp; gb-&gt;irq_falling_edge)</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GSFER);</div><div class='add'>+</div><div class='add'>+	writel(gb-&gt;irq_mask, gb-&gt;base + SPACEMIT_GAPMASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spacemit_gpio_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = irq_data_get_irq_chip_data(d);</div><div class='add'>+	u32 bit = BIT(irqd_to_hwirq(d));</div><div class='add'>+</div><div class='add'>+	if (type &amp; IRQ_TYPE_EDGE_RISING) {</div><div class='add'>+		gb-&gt;irq_rising_edge |= bit;</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GSRER);</div><div class='add'>+	} else {</div><div class='add'>+		gb-&gt;irq_rising_edge &amp;= ~bit;</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GCRER);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type &amp; IRQ_TYPE_EDGE_FALLING) {</div><div class='add'>+		gb-&gt;irq_falling_edge |= bit;</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GSFER);</div><div class='add'>+	} else {</div><div class='add'>+		gb-&gt;irq_falling_edge &amp;= ~bit;</div><div class='add'>+		writel(bit, gb-&gt;base + SPACEMIT_GCFER);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void spacemit_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = irq_data_get_irq_chip_data(data);</div><div class='add'>+</div><div class='add'>+	seq_printf(p, "%s-%d", dev_name(gb-&gt;gc.parent), spacemit_gpio_bank_index(gb));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip spacemit_gpio_chip = {</div><div class='add'>+	.name		= "k1-gpio-irqchip",</div><div class='add'>+	.irq_ack	= spacemit_gpio_irq_ack,</div><div class='add'>+	.irq_mask	= spacemit_gpio_irq_mask,</div><div class='add'>+	.irq_unmask	= spacemit_gpio_irq_unmask,</div><div class='add'>+	.irq_set_type	= spacemit_gpio_irq_set_type,</div><div class='add'>+	.irq_print_chip	= spacemit_gpio_irq_print_chip,</div><div class='add'>+	.flags		= IRQCHIP_IMMUTABLE | IRQCHIP_SKIP_SET_WAKE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool spacemit_of_node_instance_match(struct gpio_chip *gc, unsigned int i)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = gpiochip_get_data(gc);</div><div class='add'>+	struct spacemit_gpio *sg = gb-&gt;sg;</div><div class='add'>+</div><div class='add'>+	if (i &gt;= SPACEMIT_NR_BANKS)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return (gc == &amp;sg-&gt;sgb[i].gc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spacemit_gpio_add_bank(struct spacemit_gpio *sg,</div><div class='add'>+				  void __iomem *regs,</div><div class='add'>+				  int index, int irq)</div><div class='add'>+{</div><div class='add'>+	struct spacemit_gpio_bank *gb = &amp;sg-&gt;sgb[index];</div><div class='add'>+	struct gpio_chip *gc = &amp;gb-&gt;gc;</div><div class='add'>+	struct device *dev = sg-&gt;dev;</div><div class='add'>+	struct gpio_irq_chip *girq;</div><div class='add'>+	void __iomem *dat, *set, *clr, *dirin, *dirout;</div><div class='add'>+	int ret, bank_base[] = { 0x0, 0x4, 0x8, 0x100 };</div><div class='add'>+</div><div class='add'>+	gb-&gt;base = regs + bank_base[index];</div><div class='add'>+</div><div class='add'>+	dat	= gb-&gt;base + SPACEMIT_GPLR;</div><div class='add'>+	set	= gb-&gt;base + SPACEMIT_GPSR;</div><div class='add'>+	clr	= gb-&gt;base + SPACEMIT_GPCR;</div><div class='add'>+	dirin	= gb-&gt;base + SPACEMIT_GCDR;</div><div class='add'>+	dirout	= gb-&gt;base + SPACEMIT_GSDR;</div><div class='add'>+</div><div class='add'>+	/* This registers 32 GPIO lines per bank */</div><div class='add'>+	ret = bgpio_init(gc, dev, 4, dat, set, clr, dirout, dirin,</div><div class='add'>+			 BGPIOF_UNREADABLE_REG_SET | BGPIOF_UNREADABLE_REG_DIR);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to init gpio chip\n");</div><div class='add'>+</div><div class='add'>+	gb-&gt;sg = sg;</div><div class='add'>+</div><div class='add'>+	gc-&gt;label		= dev_name(dev);</div><div class='add'>+	gc-&gt;request		= gpiochip_generic_request;</div><div class='add'>+	gc-&gt;free		= gpiochip_generic_free;</div><div class='add'>+	gc-&gt;ngpio		= SPACEMIT_NR_GPIOS_PER_BANK;</div><div class='add'>+	gc-&gt;base		= -1;</div><div class='add'>+	gc-&gt;of_gpio_n_cells	= 3;</div><div class='add'>+	gc-&gt;of_node_instance_match = spacemit_of_node_instance_match;</div><div class='add'>+</div><div class='add'>+	girq			= &amp;gc-&gt;irq;</div><div class='add'>+	girq-&gt;threaded		= true;</div><div class='add'>+	girq-&gt;handler		= handle_simple_irq;</div><div class='add'>+</div><div class='add'>+	gpio_irq_chip_set_chip(girq, &amp;spacemit_gpio_chip);</div><div class='add'>+</div><div class='add'>+	/* Disable Interrupt */</div><div class='add'>+	writel(0, gb-&gt;base + SPACEMIT_GAPMASK);</div><div class='add'>+	/* Disable Edge Detection Settings */</div><div class='add'>+	writel(0x0, gb-&gt;base + SPACEMIT_GRER);</div><div class='add'>+	writel(0x0, gb-&gt;base + SPACEMIT_GFER);</div><div class='add'>+	/* Clear Interrupt */</div><div class='add'>+	writel(0xffffffff, gb-&gt;base + SPACEMIT_GCRER);</div><div class='add'>+	writel(0xffffffff, gb-&gt;base + SPACEMIT_GCFER);</div><div class='add'>+</div><div class='add'>+	ret = devm_request_threaded_irq(dev, irq, NULL,</div><div class='add'>+					spacemit_gpio_irq_handler,</div><div class='add'>+					IRQF_ONESHOT | IRQF_SHARED,</div><div class='add'>+					gb-&gt;gc.label, gb);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to register IRQ\n");</div><div class='add'>+</div><div class='add'>+	ret = devm_gpiochip_add_data(dev, gc, gb);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Distuingish IRQ domain, for selecting threecells mode */</div><div class='add'>+	irq_domain_update_bus_token(girq-&gt;domain, DOMAIN_BUS_WIRED);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int spacemit_gpio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct spacemit_gpio *sg;</div><div class='add'>+	struct clk *core_clk, *bus_clk;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	int i, irq, ret;</div><div class='add'>+</div><div class='add'>+	sg = devm_kzalloc(dev, sizeof(*sg), GFP_KERNEL);</div><div class='add'>+	if (!sg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	regs = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(regs))</div><div class='add'>+		return PTR_ERR(regs);</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+</div><div class='add'>+	sg-&gt;dev	= dev;</div><div class='add'>+</div><div class='add'>+	core_clk = devm_clk_get_enabled(dev, "core");</div><div class='add'>+	if (IS_ERR(core_clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(core_clk), "failed to get clock\n");</div><div class='add'>+</div><div class='add'>+	bus_clk = devm_clk_get_enabled(dev, "bus");</div><div class='add'>+	if (IS_ERR(bus_clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(bus_clk), "failed to get bus clock\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SPACEMIT_NR_BANKS; i++) {</div><div class='add'>+		ret = spacemit_gpio_add_bank(sg, regs, i, irq);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id spacemit_gpio_dt_ids[] = {</div><div class='add'>+	{ .compatible = "spacemit,k1-gpio" },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver spacemit_gpio_driver = {</div><div class='add'>+	.probe		= spacemit_gpio_probe,</div><div class='add'>+	.driver		= {</div><div class='add'>+		.name	= "k1-gpio",</div><div class='add'>+		.of_match_table = spacemit_gpio_dt_ids,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(spacemit_gpio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Yixun Lan &lt;dlan@gentoo.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("GPIO driver for SpacemiT K1 SoC");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpio/gpio-tb10x.c b/drivers/gpio/gpio-tb10x.c<br/>index b6335cde455f..8cf676fd0a0b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tb10x.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-tb10x.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tb10x.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-tb10x.c</a></div><div class='hunk'>@@ -183,7 +183,7 @@ static int tb10x_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 		if (ret != 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		tb10x_gpio-&gt;domain = irq_domain_add_linear(np,</div><div class='add'>+		tb10x_gpio-&gt;domain = irq_domain_create_linear(of_fwnode_handle(np),</div><div class='ctx'> 						tb10x_gpio-&gt;gc.ngpio,</div><div class='ctx'> 						&amp;irq_generic_chip_ops, NULL);</div><div class='ctx'> 		if (!tb10x_gpio-&gt;domain) {</div><div class='head'>diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c<br/>index 6895b65c86af..d27bfac6c9f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tegra186.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-tegra186.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-tegra186.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-tegra186.c</a></div><div class='hunk'>@@ -823,6 +823,7 @@ static int tegra186_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct gpio_irq_chip *irq;</div><div class='ctx'> 	struct tegra_gpio *gpio;</div><div class='ctx'> 	struct device_node *np;</div><div class='add'>+	struct resource *res;</div><div class='ctx'> 	char **names;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -842,19 +843,19 @@ static int tegra186_gpio_probe(struct platform_device *pdev)</div><div class='ctx'> 	gpio-&gt;num_banks++;</div><div class='ctx'> </div><div class='ctx'> 	/* get register apertures */</div><div class='del'>-	gpio-&gt;secure = devm_platform_ioremap_resource_byname(pdev, "security");</div><div class='del'>-	if (IS_ERR(gpio-&gt;secure)) {</div><div class='del'>-		gpio-&gt;secure = devm_platform_ioremap_resource(pdev, 0);</div><div class='del'>-		if (IS_ERR(gpio-&gt;secure))</div><div class='del'>-			return PTR_ERR(gpio-&gt;secure);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gpio-&gt;base = devm_platform_ioremap_resource_byname(pdev, "gpio");</div><div class='del'>-	if (IS_ERR(gpio-&gt;base)) {</div><div class='del'>-		gpio-&gt;base = devm_platform_ioremap_resource(pdev, 1);</div><div class='del'>-		if (IS_ERR(gpio-&gt;base))</div><div class='del'>-			return PTR_ERR(gpio-&gt;base);</div><div class='del'>-	}</div><div class='add'>+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "security");</div><div class='add'>+	if (!res)</div><div class='add'>+		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	gpio-&gt;secure = devm_ioremap_resource(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (IS_ERR(gpio-&gt;secure))</div><div class='add'>+		return PTR_ERR(gpio-&gt;secure);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gpio");</div><div class='add'>+	if (!res)</div><div class='add'>+		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='add'>+	gpio-&gt;base = devm_ioremap_resource(&amp;pdev-&gt;dev, res);</div><div class='add'>+	if (IS_ERR(gpio-&gt;base))</div><div class='add'>+		return PTR_ERR(gpio-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	err = platform_irq_count(pdev);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='head'>diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c<br/>index fad979797486..cb303a26f4d3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-timberdale.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-timberdale.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-timberdale.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-timberdale.c</a></div><div class='hunk'>@@ -103,20 +103,26 @@ static void timbgpio_irq_disable(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	int offset = d-&gt;irq - tgpio-&gt;irq_base;</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;tgpio-&gt;lock, flags);</div><div class='ctx'> 	tgpio-&gt;last_ier &amp;= ~(1UL &lt;&lt; offset);</div><div class='ctx'> 	iowrite32(tgpio-&gt;last_ier, tgpio-&gt;membase + TGPIO_IER);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;tgpio-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(&amp;tgpio-&gt;gpio, hwirq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void timbgpio_irq_enable(struct irq_data *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct timbgpio *tgpio = irq_data_get_irq_chip_data(d);</div><div class='ctx'> 	int offset = d-&gt;irq - tgpio-&gt;irq_base;</div><div class='add'>+	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	gpiochip_enable_irq(&amp;tgpio-&gt;gpio, hwirq);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;tgpio-&gt;lock, flags);</div><div class='ctx'> 	tgpio-&gt;last_ier |= 1UL &lt;&lt; offset;</div><div class='ctx'> 	iowrite32(tgpio-&gt;last_ier, tgpio-&gt;membase + TGPIO_IER);</div><div class='hunk'>@@ -205,11 +211,13 @@ static void timbgpio_irq(struct irq_desc *desc)</div><div class='ctx'> 	iowrite32(tgpio-&gt;last_ier, tgpio-&gt;membase + TGPIO_IER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip timbgpio_irqchip = {</div><div class='add'>+static const struct irq_chip timbgpio_irqchip = {</div><div class='ctx'> 	.name		= "GPIO",</div><div class='ctx'> 	.irq_enable	= timbgpio_irq_enable,</div><div class='ctx'> 	.irq_disable	= timbgpio_irq_disable,</div><div class='ctx'> 	.irq_set_type	= timbgpio_irq_type,</div><div class='add'>+	.flags = IRQCHIP_IMMUTABLE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int timbgpio_probe(struct platform_device *pdev)</div><div class='head'>diff --git a/drivers/gpio/gpio-twl4030.c b/drivers/gpio/gpio-twl4030.c<br/>index bcd692229c7c..0d17985a5fdc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-twl4030.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-twl4030.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-twl4030.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-twl4030.c</a></div><div class='hunk'>@@ -502,7 +502,6 @@ static void gpio_twl4030_power_off_action(void *data)</div><div class='ctx'> static int gpio_twl4030_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct twl4030_gpio_platform_data *pdata;</div><div class='del'>-	struct device_node *node = pdev-&gt;dev.of_node;</div><div class='ctx'> 	struct gpio_twl4030_priv *priv;</div><div class='ctx'> 	int ret, irq_base;</div><div class='ctx'> </div><div class='hunk'>@@ -524,8 +523,8 @@ static int gpio_twl4030_probe(struct platform_device *pdev)</div><div class='ctx'> 		return irq_base;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq_domain_add_legacy(node, TWL4030_GPIO_MAX, irq_base, 0,</div><div class='del'>-			      &amp;irq_domain_simple_ops, NULL);</div><div class='add'>+	irq_domain_create_legacy(of_fwnode_handle(pdev-&gt;dev.of_node), TWL4030_GPIO_MAX, irq_base, 0,</div><div class='add'>+				 &amp;irq_domain_simple_ops, NULL);</div><div class='ctx'> </div><div class='ctx'> 	ret = twl4030_sih_setup(&amp;pdev-&gt;dev, TWL4030_MODULE_GPIO, irq_base);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='head'>diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c<br/>index 4dad7ce0c4dc..7de0d5b53d56 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-vf610.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-vf610.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-vf610.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-vf610.c</a></div><div class='hunk'>@@ -345,4 +345,6 @@ static struct platform_driver vf610_gpio_driver = {</div><div class='ctx'> 	.probe		= vf610_gpio_probe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-builtin_platform_driver(vf610_gpio_driver);</div><div class='add'>+module_platform_driver(vf610_gpio_driver);</div><div class='add'>+MODULE_DESCRIPTION("VF610 GPIO driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/gpio/gpio-virtuser.c b/drivers/gpio/gpio-virtuser.c<br/>index 13407fd4f0eb..eab6726953b4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-virtuser.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-virtuser.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-virtuser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-virtuser.c</a></div><div class='hunk'>@@ -401,10 +401,15 @@ static ssize_t gpio_virtuser_direction_do_write(struct file *file,</div><div class='ctx'> 	char buf[32], *trimmed;</div><div class='ctx'> 	int ret, dir, val = 0;</div><div class='ctx'> </div><div class='del'>-	ret = simple_write_to_buffer(buf, sizeof(buf), ppos, user_buf, count);</div><div class='add'>+	if (count &gt;= sizeof(buf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, user_buf, count);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	buf[ret] = '\0';</div><div class='add'>+</div><div class='ctx'> 	trimmed = strim(buf);</div><div class='ctx'> </div><div class='ctx'> 	if (strcmp(trimmed, "input") == 0) {</div><div class='hunk'>@@ -623,12 +628,15 @@ static ssize_t gpio_virtuser_consumer_write(struct file *file,</div><div class='ctx'> 	char buf[GPIO_VIRTUSER_NAME_BUF_LEN + 2];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (count &gt;= sizeof(buf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	ret = simple_write_to_buffer(buf, GPIO_VIRTUSER_NAME_BUF_LEN, ppos,</div><div class='ctx'> 				     user_buf, count);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	buf[strlen(buf) - 1] = '\0';</div><div class='add'>+	buf[ret] = '\0';</div><div class='ctx'> </div><div class='ctx'> 	ret = gpiod_set_consumer_name(data-&gt;ad.desc, buf);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/drivers/gpio/gpio-xgene-sb.c b/drivers/gpio/gpio-xgene-sb.c<br/>index 48b829733b15..b51b1fa726bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-xgene-sb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-xgene-sb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-xgene-sb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-xgene-sb.c</a></div><div class='hunk'>@@ -103,12 +103,32 @@ static int xgene_gpio_sb_irq_set_type(struct irq_data *d, unsigned int type)</div><div class='ctx'> 		return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct irq_chip xgene_gpio_sb_irq_chip = {</div><div class='add'>+static void xgene_gpio_sb_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct xgene_gpio_sb *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	irq_chip_mask_parent(d);</div><div class='add'>+</div><div class='add'>+	gpiochip_disable_irq(&amp;priv-&gt;gc, d-&gt;hwirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_gpio_sb_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct xgene_gpio_sb *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	gpiochip_enable_irq(&amp;priv-&gt;gc, d-&gt;hwirq);</div><div class='add'>+</div><div class='add'>+	irq_chip_unmask_parent(d);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip xgene_gpio_sb_irq_chip = {</div><div class='ctx'> 	.name           = "sbgpio",</div><div class='ctx'> 	.irq_eoi	= irq_chip_eoi_parent,</div><div class='del'>-	.irq_mask       = irq_chip_mask_parent,</div><div class='del'>-	.irq_unmask     = irq_chip_unmask_parent,</div><div class='add'>+	.irq_mask       = xgene_gpio_sb_irq_mask,</div><div class='add'>+	.irq_unmask     = xgene_gpio_sb_irq_unmask,</div><div class='ctx'> 	.irq_set_type   = xgene_gpio_sb_irq_set_type,</div><div class='add'>+	.flags = IRQCHIP_IMMUTABLE,</div><div class='add'>+	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int xgene_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)</div><div class='head'>diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c<br/>index be81fa2b17ab..3dae63f3ea21 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-zynq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpio-zynq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpio-zynq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpio-zynq.c</a></div><div class='hunk'>@@ -1011,6 +1011,7 @@ static void zynq_gpio_remove(struct platform_device *pdev)</div><div class='ctx'> 	ret = pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "pm_runtime_get_sync() Failed\n");</div><div class='add'>+	device_init_wakeup(&amp;pdev-&gt;dev, 0);</div><div class='ctx'> 	gpiochip_remove(&amp;gpio-&gt;chip);</div><div class='ctx'> 	device_set_wakeup_capable(&amp;pdev-&gt;dev, 0);</div><div class='ctx'> 	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='head'>diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi-core.c<br/>index 69caa35c58df..12b24a717e43 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-acpi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-acpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-acpi-core.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-acpi-core.c</a></div><div class='hunk'>@@ -23,29 +23,6 @@</div><div class='ctx'> #include "gpiolib.h"</div><div class='ctx'> #include "gpiolib-acpi.h"</div><div class='ctx'> </div><div class='del'>-static int run_edge_events_on_boot = -1;</div><div class='del'>-module_param(run_edge_events_on_boot, int, 0444);</div><div class='del'>-MODULE_PARM_DESC(run_edge_events_on_boot,</div><div class='del'>-		 "Run edge _AEI event-handlers at boot: 0=no, 1=yes, -1=auto");</div><div class='del'>-</div><div class='del'>-static char *ignore_wake;</div><div class='del'>-module_param(ignore_wake, charp, 0444);</div><div class='del'>-MODULE_PARM_DESC(ignore_wake,</div><div class='del'>-		 "controller@pin combos on which to ignore the ACPI wake flag "</div><div class='del'>-		 "ignore_wake=controller@pin[,controller@pin[,...]]");</div><div class='del'>-</div><div class='del'>-static char *ignore_interrupt;</div><div class='del'>-module_param(ignore_interrupt, charp, 0444);</div><div class='del'>-MODULE_PARM_DESC(ignore_interrupt,</div><div class='del'>-		 "controller@pin combos on which to ignore interrupt "</div><div class='del'>-		 "ignore_interrupt=controller@pin[,controller@pin[,...]]");</div><div class='del'>-</div><div class='del'>-struct acpi_gpiolib_dmi_quirk {</div><div class='del'>-	bool no_edge_events_on_boot;</div><div class='del'>-	char *ignore_wake;</div><div class='del'>-	char *ignore_interrupt;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * struct acpi_gpio_event - ACPI GPIO event handler data</div><div class='ctx'>  *</div><div class='hunk'>@@ -96,10 +73,10 @@ struct acpi_gpio_chip {</div><div class='ctx'>  * @adev: reference to ACPI device which consumes GPIO resource</div><div class='ctx'>  * @flags: GPIO initialization flags</div><div class='ctx'>  * @gpioint: if %true this GPIO is of type GpioInt otherwise type is GpioIo</div><div class='add'>+ * @wake_capable: wake capability as provided by ACPI</div><div class='ctx'>  * @pin_config: pin bias as provided by ACPI</div><div class='ctx'>  * @polarity: interrupt polarity as provided by ACPI</div><div class='ctx'>  * @triggering: triggering type as provided by ACPI</div><div class='del'>- * @wake_capable: wake capability as provided by ACPI</div><div class='ctx'>  * @debounce: debounce timeout as provided by ACPI</div><div class='ctx'>  * @quirks: Linux specific quirks as provided by struct acpi_gpio_mapping</div><div class='ctx'>  */</div><div class='hunk'>@@ -107,25 +84,14 @@ struct acpi_gpio_info {</div><div class='ctx'> 	struct acpi_device *adev;</div><div class='ctx'> 	enum gpiod_flags flags;</div><div class='ctx'> 	bool gpioint;</div><div class='add'>+	bool wake_capable;</div><div class='ctx'> 	int pin_config;</div><div class='ctx'> 	int polarity;</div><div class='ctx'> 	int triggering;</div><div class='del'>-	bool wake_capable;</div><div class='ctx'> 	unsigned int debounce;</div><div class='ctx'> 	unsigned int quirks;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * For GPIO chips which call acpi_gpiochip_request_interrupts() before late_init</div><div class='del'>- * (so builtin drivers) we register the ACPI GpioInt IRQ handlers from a</div><div class='del'>- * late_initcall_sync() handler, so that other builtin drivers can register their</div><div class='del'>- * OpRegions before the event handlers can run. This list contains GPIO chips</div><div class='del'>- * for which the acpi_gpiochip_request_irqs() call has been deferred.</div><div class='del'>- */</div><div class='del'>-static DEFINE_MUTEX(acpi_gpio_deferred_req_irqs_lock);</div><div class='del'>-static LIST_HEAD(acpi_gpio_deferred_req_irqs_list);</div><div class='del'>-static bool acpi_gpio_deferred_req_irqs_done;</div><div class='del'>-</div><div class='ctx'> static int acpi_gpiochip_find(struct gpio_chip *gc, const void *data)</div><div class='ctx'> {</div><div class='ctx'> 	/* First check the actual GPIO device */</div><div class='hunk'>@@ -268,7 +234,7 @@ static void acpi_gpiochip_request_irq(struct acpi_gpio_chip *acpi_gpio,</div><div class='ctx'> 	event-&gt;irq_requested = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure we trigger the initial state of edge-triggered IRQs */</div><div class='del'>-	if (run_edge_events_on_boot &amp;&amp;</div><div class='add'>+	if (acpi_gpio_need_run_edge_events_on_boot() &amp;&amp;</div><div class='ctx'> 	    (event-&gt;irqflags &amp; (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))) {</div><div class='ctx'> 		value = gpiod_get_raw_value_cansleep(event-&gt;desc);</div><div class='ctx'> 		if (((event-&gt;irqflags &amp; IRQF_TRIGGER_RISING) &amp;&amp; value == 1) ||</div><div class='hunk'>@@ -350,42 +316,6 @@ static struct gpio_desc *acpi_request_own_gpiod(struct gpio_chip *chip,</div><div class='ctx'> 	return desc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool acpi_gpio_in_ignore_list(const char *ignore_list, const char *controller_in,</div><div class='del'>-				     unsigned int pin_in)</div><div class='del'>-{</div><div class='del'>-	const char *controller, *pin_str;</div><div class='del'>-	unsigned int pin;</div><div class='del'>-	char *endp;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	controller = ignore_list;</div><div class='del'>-	while (controller) {</div><div class='del'>-		pin_str = strchr(controller, '@');</div><div class='del'>-		if (!pin_str)</div><div class='del'>-			goto err;</div><div class='del'>-</div><div class='del'>-		len = pin_str - controller;</div><div class='del'>-		if (len == strlen(controller_in) &amp;&amp;</div><div class='del'>-		    strncmp(controller, controller_in, len) == 0) {</div><div class='del'>-			pin = simple_strtoul(pin_str + 1, &amp;endp, 10);</div><div class='del'>-			if (*endp != 0 &amp;&amp; *endp != ',')</div><div class='del'>-				goto err;</div><div class='del'>-</div><div class='del'>-			if (pin == pin_in)</div><div class='del'>-				return true;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		controller = strchr(controller, ',');</div><div class='del'>-		if (controller)</div><div class='del'>-			controller++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-err:</div><div class='del'>-	pr_err_once("Error: Invalid value for gpiolib_acpi.ignore_...: %s\n", ignore_list);</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool acpi_gpio_irq_is_wake(struct device *parent,</div><div class='ctx'> 				  const struct acpi_resource_gpio *agpio)</div><div class='ctx'> {</div><div class='hunk'>@@ -394,7 +324,7 @@ static bool acpi_gpio_irq_is_wake(struct device *parent,</div><div class='ctx'> 	if (agpio-&gt;wake_capable != ACPI_WAKE_CAPABLE)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (acpi_gpio_in_ignore_list(ignore_wake, dev_name(parent), pin)) {</div><div class='add'>+	if (acpi_gpio_in_ignore_list(ACPI_GPIO_IGNORE_WAKE, dev_name(parent), pin)) {</div><div class='ctx'> 		dev_info(parent, "Ignoring wakeup on pin %u\n", pin);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -437,7 +367,7 @@ static acpi_status acpi_gpiochip_alloc_event(struct acpi_resource *ares,</div><div class='ctx'> 	if (!handler)</div><div class='ctx'> 		return AE_OK;</div><div class='ctx'> </div><div class='del'>-	if (acpi_gpio_in_ignore_list(ignore_interrupt, dev_name(chip-&gt;parent), pin)) {</div><div class='add'>+	if (acpi_gpio_in_ignore_list(ACPI_GPIO_IGNORE_INTERRUPT, dev_name(chip-&gt;parent), pin)) {</div><div class='ctx'> 		dev_info(chip-&gt;parent, "Ignoring interrupt on pin %u\n", pin);</div><div class='ctx'> 		return AE_OK;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -525,7 +455,6 @@ void acpi_gpiochip_request_interrupts(struct gpio_chip *chip)</div><div class='ctx'> 	struct acpi_gpio_chip *acpi_gpio;</div><div class='ctx'> 	acpi_handle handle;</div><div class='ctx'> 	acpi_status status;</div><div class='del'>-	bool defer;</div><div class='ctx'> </div><div class='ctx'> 	if (!chip-&gt;parent || !chip-&gt;to_irq)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -544,14 +473,7 @@ void acpi_gpiochip_request_interrupts(struct gpio_chip *chip)</div><div class='ctx'> 	acpi_walk_resources(handle, METHOD_NAME__AEI,</div><div class='ctx'> 			    acpi_gpiochip_alloc_event, acpi_gpio);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='del'>-	defer = !acpi_gpio_deferred_req_irqs_done;</div><div class='del'>-	if (defer)</div><div class='del'>-		list_add(&amp;acpi_gpio-&gt;deferred_req_irqs_list_entry,</div><div class='del'>-			 &amp;acpi_gpio_deferred_req_irqs_list);</div><div class='del'>-	mutex_unlock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='del'>-</div><div class='del'>-	if (defer)</div><div class='add'>+	if (acpi_gpio_add_to_deferred_list(&amp;acpi_gpio-&gt;deferred_req_irqs_list_entry))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	acpi_gpiochip_request_irqs(acpi_gpio);</div><div class='hunk'>@@ -583,10 +505,7 @@ void acpi_gpiochip_free_interrupts(struct gpio_chip *chip)</div><div class='ctx'> 	if (ACPI_FAILURE(status))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='del'>-	if (!list_empty(&amp;acpi_gpio-&gt;deferred_req_irqs_list_entry))</div><div class='del'>-		list_del_init(&amp;acpi_gpio-&gt;deferred_req_irqs_list_entry);</div><div class='del'>-	mutex_unlock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+	acpi_gpio_remove_from_deferred_list(&amp;acpi_gpio-&gt;deferred_req_irqs_list_entry);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_safe_reverse(event, ep, &amp;acpi_gpio-&gt;events, node) {</div><div class='ctx'> 		if (event-&gt;irq_requested) {</div><div class='hunk'>@@ -604,6 +523,14 @@ void acpi_gpiochip_free_interrupts(struct gpio_chip *chip)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(acpi_gpiochip_free_interrupts);</div><div class='ctx'> </div><div class='add'>+void __init acpi_gpio_process_deferred_list(struct list_head *list)</div><div class='add'>+{</div><div class='add'>+	struct acpi_gpio_chip *acpi_gpio, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(acpi_gpio, tmp, list, deferred_req_irqs_list_entry)</div><div class='add'>+		acpi_gpiochip_request_irqs(acpi_gpio);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int acpi_dev_add_driver_gpios(struct acpi_device *adev,</div><div class='ctx'> 			      const struct acpi_gpio_mapping *gpios)</div><div class='ctx'> {</div><div class='hunk'>@@ -653,12 +580,12 @@ static bool acpi_get_driver_gpio_data(struct acpi_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	for (gm = adev-&gt;driver_gpios; gm-&gt;name; gm++)</div><div class='ctx'> 		if (!strcmp(name, gm-&gt;name) &amp;&amp; gm-&gt;data &amp;&amp; index &lt; gm-&gt;size) {</div><div class='del'>-			const struct acpi_gpio_params *par = gm-&gt;data + index;</div><div class='add'>+			const struct acpi_gpio_params *params = gm-&gt;data + index;</div><div class='ctx'> </div><div class='ctx'> 			args-&gt;fwnode = acpi_fwnode_handle(adev);</div><div class='del'>-			args-&gt;args[0] = par-&gt;crs_entry_index;</div><div class='del'>-			args-&gt;args[1] = par-&gt;line_index;</div><div class='del'>-			args-&gt;args[2] = par-&gt;active_low;</div><div class='add'>+			args-&gt;args[0] = params-&gt;crs_entry_index;</div><div class='add'>+			args-&gt;args[1] = params-&gt;line_index;</div><div class='add'>+			args-&gt;args[2] = params-&gt;active_low;</div><div class='ctx'> 			args-&gt;nargs = 3;</div><div class='ctx'> </div><div class='ctx'> 			*quirks = gm-&gt;quirks;</div><div class='hunk'>@@ -743,10 +670,8 @@ static int acpi_gpio_update_gpiod_lookup_flags(unsigned long *lookupflags,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct acpi_gpio_lookup {</div><div class='del'>-	struct acpi_gpio_info info;</div><div class='del'>-	int index;</div><div class='del'>-	u16 pin_index;</div><div class='del'>-	bool active_low;</div><div class='add'>+	struct acpi_gpio_params params;</div><div class='add'>+	struct acpi_gpio_info *info;</div><div class='ctx'> 	struct gpio_desc *desc;</div><div class='ctx'> 	int n;</div><div class='ctx'> };</div><div class='hunk'>@@ -754,6 +679,8 @@ struct acpi_gpio_lookup {</div><div class='ctx'> static int acpi_populate_gpio_lookup(struct acpi_resource *ares, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_gpio_lookup *lookup = data;</div><div class='add'>+	struct acpi_gpio_params *params = &amp;lookup-&gt;params;</div><div class='add'>+	struct acpi_gpio_info *info = lookup-&gt;info;</div><div class='ctx'> </div><div class='ctx'> 	if (ares-&gt;type != ACPI_RESOURCE_TYPE_GPIO)</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -764,26 +691,26 @@ static int acpi_populate_gpio_lookup(struct acpi_resource *ares, void *data)</div><div class='ctx'> 		struct gpio_desc *desc;</div><div class='ctx'> 		u16 pin_index;</div><div class='ctx'> </div><div class='del'>-		if (lookup-&gt;info.quirks &amp; ACPI_GPIO_QUIRK_ONLY_GPIOIO &amp;&amp; gpioint)</div><div class='del'>-			lookup-&gt;index++;</div><div class='add'>+		if (info-&gt;quirks &amp; ACPI_GPIO_QUIRK_ONLY_GPIOIO &amp;&amp; gpioint)</div><div class='add'>+			params-&gt;crs_entry_index++;</div><div class='ctx'> </div><div class='del'>-		if (lookup-&gt;n++ != lookup-&gt;index)</div><div class='add'>+		if (lookup-&gt;n++ != params-&gt;crs_entry_index)</div><div class='ctx'> 			return 1;</div><div class='ctx'> </div><div class='del'>-		pin_index = lookup-&gt;pin_index;</div><div class='add'>+		pin_index = params-&gt;line_index;</div><div class='ctx'> 		if (pin_index &gt;= agpio-&gt;pin_table_length)</div><div class='ctx'> 			return 1;</div><div class='ctx'> </div><div class='del'>-		if (lookup-&gt;info.quirks &amp; ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER)</div><div class='add'>+		if (info-&gt;quirks &amp; ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER)</div><div class='ctx'> 			desc = gpio_to_desc(agpio-&gt;pin_table[pin_index]);</div><div class='ctx'> 		else</div><div class='ctx'> 			desc = acpi_get_gpiod(agpio-&gt;resource_source.string_ptr,</div><div class='ctx'> 					      agpio-&gt;pin_table[pin_index]);</div><div class='ctx'> 		lookup-&gt;desc = desc;</div><div class='del'>-		lookup-&gt;info.pin_config = agpio-&gt;pin_config;</div><div class='del'>-		lookup-&gt;info.debounce = agpio-&gt;debounce_timeout;</div><div class='del'>-		lookup-&gt;info.gpioint = gpioint;</div><div class='del'>-		lookup-&gt;info.wake_capable = acpi_gpio_irq_is_wake(&amp;lookup-&gt;info.adev-&gt;dev, agpio);</div><div class='add'>+		info-&gt;pin_config = agpio-&gt;pin_config;</div><div class='add'>+		info-&gt;debounce = agpio-&gt;debounce_timeout;</div><div class='add'>+		info-&gt;gpioint = gpioint;</div><div class='add'>+		info-&gt;wake_capable = acpi_gpio_irq_is_wake(&amp;info-&gt;adev-&gt;dev, agpio);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Polarity and triggering are only specified for GpioInt</div><div class='hunk'>@@ -792,23 +719,23 @@ static int acpi_populate_gpio_lookup(struct acpi_resource *ares, void *data)</div><div class='ctx'> 		 * - ACPI_ACTIVE_LOW == GPIO_ACTIVE_LOW</div><div class='ctx'> 		 * - ACPI_ACTIVE_HIGH == GPIO_ACTIVE_HIGH</div><div class='ctx'> 		 */</div><div class='del'>-		if (lookup-&gt;info.gpioint) {</div><div class='del'>-			lookup-&gt;info.polarity = agpio-&gt;polarity;</div><div class='del'>-			lookup-&gt;info.triggering = agpio-&gt;triggering;</div><div class='add'>+		if (info-&gt;gpioint) {</div><div class='add'>+			info-&gt;polarity = agpio-&gt;polarity;</div><div class='add'>+			info-&gt;triggering = agpio-&gt;triggering;</div><div class='ctx'> 		} else {</div><div class='del'>-			lookup-&gt;info.polarity = lookup-&gt;active_low;</div><div class='add'>+			info-&gt;polarity = params-&gt;active_low;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		lookup-&gt;info.flags = acpi_gpio_to_gpiod_flags(agpio, lookup-&gt;info.polarity);</div><div class='add'>+		info-&gt;flags = acpi_gpio_to_gpiod_flags(agpio, info-&gt;polarity);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int acpi_gpio_resource_lookup(struct acpi_gpio_lookup *lookup,</div><div class='del'>-				     struct acpi_gpio_info *info)</div><div class='add'>+static int acpi_gpio_resource_lookup(struct acpi_gpio_lookup *lookup)</div><div class='ctx'> {</div><div class='del'>-	struct acpi_device *adev = lookup-&gt;info.adev;</div><div class='add'>+	struct acpi_gpio_info *info = lookup-&gt;info;</div><div class='add'>+	struct acpi_device *adev = info-&gt;adev;</div><div class='ctx'> 	struct list_head res_list;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -825,22 +752,22 @@ static int acpi_gpio_resource_lookup(struct acpi_gpio_lookup *lookup,</div><div class='ctx'> 	if (!lookup-&gt;desc)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	if (info)</div><div class='del'>-		*info = lookup-&gt;info;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int acpi_gpio_property_lookup(struct fwnode_handle *fwnode,</div><div class='del'>-				     const char *propname, int index,</div><div class='add'>+static int acpi_gpio_property_lookup(struct fwnode_handle *fwnode, const char *propname,</div><div class='ctx'> 				     struct acpi_gpio_lookup *lookup)</div><div class='ctx'> {</div><div class='ctx'> 	struct fwnode_reference_args args;</div><div class='add'>+	struct acpi_gpio_params *params = &amp;lookup-&gt;params;</div><div class='add'>+	struct acpi_gpio_info *info = lookup-&gt;info;</div><div class='add'>+	unsigned int index = params-&gt;crs_entry_index;</div><div class='ctx'> 	unsigned int quirks = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;args, 0, sizeof(args));</div><div class='del'>-	ret = __acpi_node_get_property_reference(fwnode, propname, index, 3,</div><div class='del'>-						 &amp;args);</div><div class='add'>+</div><div class='add'>+	ret = __acpi_node_get_property_reference(fwnode, propname, index, 3, &amp;args);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		struct acpi_device *adev;</div><div class='ctx'> </div><div class='hunk'>@@ -857,12 +784,12 @@ static int acpi_gpio_property_lookup(struct fwnode_handle *fwnode,</div><div class='ctx'> 	if (args.nargs != 3)</div><div class='ctx'> 		return -EPROTO;</div><div class='ctx'> </div><div class='del'>-	lookup-&gt;index = args.args[0];</div><div class='del'>-	lookup-&gt;pin_index = args.args[1];</div><div class='del'>-	lookup-&gt;active_low = !!args.args[2];</div><div class='add'>+	params-&gt;crs_entry_index = args.args[0];</div><div class='add'>+	params-&gt;line_index = args.args[1];</div><div class='add'>+	params-&gt;active_low = !!args.args[2];</div><div class='ctx'> </div><div class='del'>-	lookup-&gt;info.adev = to_acpi_device_node(args.fwnode);</div><div class='del'>-	lookup-&gt;info.quirks = quirks;</div><div class='add'>+	info-&gt;adev = to_acpi_device_node(args.fwnode);</div><div class='add'>+	info-&gt;quirks = quirks;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -871,96 +798,83 @@ static int acpi_gpio_property_lookup(struct fwnode_handle *fwnode,</div><div class='ctx'>  * acpi_get_gpiod_by_index() - get a GPIO descriptor from device resources</div><div class='ctx'>  * @adev: pointer to a ACPI device to get GPIO from</div><div class='ctx'>  * @propname: Property name of the GPIO (optional)</div><div class='del'>- * @index: index of GpioIo/GpioInt resource (starting from %0)</div><div class='del'>- * @info: info pointer to fill in (optional)</div><div class='add'>+ * @lookup: pointer to struct acpi_gpio_lookup to fill in</div><div class='ctx'>  *</div><div class='del'>- * Function goes through ACPI resources for @adev and based on @index looks</div><div class='add'>+ * Function goes through ACPI resources for @adev and based on @lookup.index looks</div><div class='ctx'>  * up a GpioIo/GpioInt resource, translates it to the Linux GPIO descriptor,</div><div class='del'>- * and returns it. @index matches GpioIo/GpioInt resources only so if there</div><div class='del'>- * are total %3 GPIO resources, the index goes from %0 to %2.</div><div class='add'>+ * and returns it. @lookup.index matches GpioIo/GpioInt resources only so if there</div><div class='add'>+ * are total 3 GPIO resources, the index goes from 0 to 2.</div><div class='ctx'>  *</div><div class='ctx'>  * If @propname is specified the GPIO is looked using device property. In</div><div class='ctx'>  * that case @index is used to select the GPIO entry in the property value</div><div class='ctx'>  * (in case of multiple).</div><div class='ctx'>  *</div><div class='ctx'>  * Returns:</div><div class='del'>- * GPIO descriptor to use with Linux generic GPIO API.</div><div class='del'>- * If the GPIO cannot be translated or there is an error an ERR_PTR is</div><div class='del'>- * returned.</div><div class='add'>+ * 0 on success, negative errno on failure.</div><div class='add'>+ *</div><div class='add'>+ * The @lookup is filled with GPIO descriptor to use with Linux generic GPIO API.</div><div class='add'>+ * If the GPIO cannot be translated an error will be returned.</div><div class='ctx'>  *</div><div class='ctx'>  * Note: if the GPIO resource has multiple entries in the pin list, this</div><div class='ctx'>  * function only returns the first.</div><div class='ctx'>  */</div><div class='del'>-static struct gpio_desc *acpi_get_gpiod_by_index(struct acpi_device *adev,</div><div class='del'>-						 const char *propname,</div><div class='del'>-						 int index,</div><div class='del'>-						 struct acpi_gpio_info *info)</div><div class='add'>+static int acpi_get_gpiod_by_index(struct acpi_device *adev, const char *propname,</div><div class='add'>+				   struct acpi_gpio_lookup *lookup)</div><div class='ctx'> {</div><div class='del'>-	struct acpi_gpio_lookup lookup;</div><div class='add'>+	struct acpi_gpio_params *params = &amp;lookup-&gt;params;</div><div class='add'>+	struct acpi_gpio_info *info = lookup-&gt;info;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;lookup, 0, sizeof(lookup));</div><div class='del'>-	lookup.index = index;</div><div class='del'>-</div><div class='ctx'> 	if (propname) {</div><div class='ctx'> 		dev_dbg(&amp;adev-&gt;dev, "GPIO: looking up %s\n", propname);</div><div class='ctx'> </div><div class='del'>-		ret = acpi_gpio_property_lookup(acpi_fwnode_handle(adev),</div><div class='del'>-						propname, index, &amp;lookup);</div><div class='add'>+		ret = acpi_gpio_property_lookup(acpi_fwnode_handle(adev), propname, lookup);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			return ERR_PTR(ret);</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		dev_dbg(&amp;adev-&gt;dev, "GPIO: _DSD returned %s %d %u %u\n",</div><div class='del'>-			dev_name(&amp;lookup.info.adev-&gt;dev), lookup.index,</div><div class='del'>-			lookup.pin_index, lookup.active_low);</div><div class='add'>+		dev_dbg(&amp;adev-&gt;dev, "GPIO: _DSD returned %s %u %u %u\n",</div><div class='add'>+			dev_name(&amp;info-&gt;adev-&gt;dev),</div><div class='add'>+			params-&gt;crs_entry_index, params-&gt;line_index, params-&gt;active_low);</div><div class='ctx'> 	} else {</div><div class='del'>-		dev_dbg(&amp;adev-&gt;dev, "GPIO: looking up %d in _CRS\n", index);</div><div class='del'>-		lookup.info.adev = adev;</div><div class='add'>+		dev_dbg(&amp;adev-&gt;dev, "GPIO: looking up %u in _CRS\n", params-&gt;crs_entry_index);</div><div class='add'>+		info-&gt;adev = adev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = acpi_gpio_resource_lookup(&amp;lookup, info);</div><div class='del'>-	return ret ? ERR_PTR(ret) : lookup.desc;</div><div class='add'>+	return acpi_gpio_resource_lookup(lookup);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * acpi_get_gpiod_from_data() - get a GPIO descriptor from ACPI data node</div><div class='ctx'>  * @fwnode: pointer to an ACPI firmware node to get the GPIO information from</div><div class='ctx'>  * @propname: Property name of the GPIO</div><div class='del'>- * @index: index of GpioIo/GpioInt resource (starting from %0)</div><div class='del'>- * @info: info pointer to fill in (optional)</div><div class='add'>+ * @lookup: pointer to struct acpi_gpio_lookup to fill in</div><div class='ctx'>  *</div><div class='ctx'>  * This function uses the property-based GPIO lookup to get to the GPIO</div><div class='ctx'>  * resource with the relevant information from a data-only ACPI firmware node</div><div class='ctx'>  * and uses that to obtain the GPIO descriptor to return.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns:</div><div class='del'>- * GPIO descriptor to use with Linux generic GPIO API.</div><div class='del'>- * If the GPIO cannot be translated or there is an error an ERR_PTR is</div><div class='del'>- * returned.</div><div class='add'>+ * 0 on success, negative errno on failure.</div><div class='add'>+ *</div><div class='add'>+ * The @lookup is filled with GPIO descriptor to use with Linux generic GPIO API.</div><div class='add'>+ * If the GPIO cannot be translated an error will be returned.</div><div class='ctx'>  */</div><div class='del'>-static struct gpio_desc *acpi_get_gpiod_from_data(struct fwnode_handle *fwnode,</div><div class='del'>-						  const char *propname,</div><div class='del'>-						  int index,</div><div class='del'>-						  struct acpi_gpio_info *info)</div><div class='add'>+static int acpi_get_gpiod_from_data(struct fwnode_handle *fwnode, const char *propname,</div><div class='add'>+				    struct acpi_gpio_lookup *lookup)</div><div class='ctx'> {</div><div class='del'>-	struct acpi_gpio_lookup lookup;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_acpi_data_node(fwnode))</div><div class='del'>-		return ERR_PTR(-ENODEV);</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (!propname)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='del'>-</div><div class='del'>-	memset(&amp;lookup, 0, sizeof(lookup));</div><div class='del'>-	lookup.index = index;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ret = acpi_gpio_property_lookup(fwnode, propname, index, &amp;lookup);</div><div class='add'>+	ret = acpi_gpio_property_lookup(fwnode, propname, lookup);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ERR_PTR(ret);</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = acpi_gpio_resource_lookup(&amp;lookup, info);</div><div class='del'>-	return ret ? ERR_PTR(ret) : lookup.desc;</div><div class='add'>+	return acpi_gpio_resource_lookup(lookup);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool acpi_can_fallback_to_crs(struct acpi_device *adev,</div><div class='hunk'>@@ -982,17 +896,25 @@ __acpi_find_gpio(struct fwnode_handle *fwnode, const char *con_id, unsigned int</div><div class='ctx'> 		 bool can_fallback, struct acpi_gpio_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_device *adev = to_acpi_device_node(fwnode);</div><div class='add'>+	struct acpi_gpio_lookup lookup;</div><div class='ctx'> 	struct gpio_desc *desc;</div><div class='ctx'> 	char propname[32];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;lookup, 0, sizeof(lookup));</div><div class='add'>+	lookup.params.crs_entry_index = idx;</div><div class='add'>+	lookup.info = info;</div><div class='ctx'> </div><div class='ctx'> 	/* Try first from _DSD */</div><div class='ctx'> 	for_each_gpio_property_name(propname, con_id) {</div><div class='ctx'> 		if (adev)</div><div class='del'>-			desc = acpi_get_gpiod_by_index(adev,</div><div class='del'>-						       propname, idx, info);</div><div class='add'>+			ret = acpi_get_gpiod_by_index(adev, propname, &amp;lookup);</div><div class='ctx'> 		else</div><div class='del'>-			desc = acpi_get_gpiod_from_data(fwnode,</div><div class='del'>-							propname, idx, info);</div><div class='add'>+			ret = acpi_get_gpiod_from_data(fwnode, propname, &amp;lookup);</div><div class='add'>+		if (ret)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		desc = lookup.desc;</div><div class='ctx'> 		if (PTR_ERR(desc) == -EPROBE_DEFER)</div><div class='ctx'> 			return desc;</div><div class='ctx'> </div><div class='hunk'>@@ -1001,8 +923,13 @@ __acpi_find_gpio(struct fwnode_handle *fwnode, const char *con_id, unsigned int</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Then from plain _CRS GPIOs */</div><div class='del'>-	if (can_fallback)</div><div class='del'>-		return acpi_get_gpiod_by_index(adev, NULL, idx, info);</div><div class='add'>+	if (can_fallback) {</div><div class='add'>+		ret = acpi_get_gpiod_by_index(adev, NULL, &amp;lookup);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+		return lookup.desc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ERR_PTR(-ENOENT);</div><div class='ctx'> }</div><div class='hunk'>@@ -1488,248 +1415,3 @@ int acpi_gpio_count(const struct fwnode_handle *fwnode, const char *con_id)</div><div class='ctx'> 	}</div><div class='ctx'> 	return count ? count : -ENOENT;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/* Run deferred acpi_gpiochip_request_irqs() */</div><div class='del'>-static int __init acpi_gpio_handle_deferred_request_irqs(void)</div><div class='del'>-{</div><div class='del'>-	struct acpi_gpio_chip *acpi_gpio, *tmp;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='del'>-	list_for_each_entry_safe(acpi_gpio, tmp,</div><div class='del'>-				 &amp;acpi_gpio_deferred_req_irqs_list,</div><div class='del'>-				 deferred_req_irqs_list_entry)</div><div class='del'>-		acpi_gpiochip_request_irqs(acpi_gpio);</div><div class='del'>-</div><div class='del'>-	acpi_gpio_deferred_req_irqs_done = true;</div><div class='del'>-	mutex_unlock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-/* We must use _sync so that this runs after the first deferred_probe run */</div><div class='del'>-late_initcall_sync(acpi_gpio_handle_deferred_request_irqs);</div><div class='del'>-</div><div class='del'>-static const struct dmi_system_id gpiolib_acpi_quirks[] __initconst = {</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * The Minix Neo Z83-4 has a micro-USB-B id-pin handler for</div><div class='del'>-		 * a non existing micro-USB-B connector which puts the HDMI</div><div class='del'>-		 * DDC pins in GPIO mode, breaking HDMI support.</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "MINIX"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.no_edge_events_on_boot = true,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * The Terra Pad 1061 has a micro-USB-B id-pin handler, which</div><div class='del'>-		 * instead of controlling the actual micro-USB-B turns the 5V</div><div class='del'>-		 * boost for its USB-A connector off. The actual micro-USB-B</div><div class='del'>-		 * connector is wired for charging only.</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Wortmann_AG"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "TERRA_PAD_1061"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.no_edge_events_on_boot = true,</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * The Dell Venue 10 Pro 5055, with Bay Trail SoC + TI PMIC uses an</div><div class='del'>-		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='del'>-		 * event handler on INT33FFC:02 pin 12, causing spurious wakeups.</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Venue 10 Pro 5055"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "INT33FC:02@12",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * HP X2 10 models with Cherry Trail SoC + TI PMIC use an</div><div class='del'>-		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='del'>-		 * event handler on INT33FF:01 pin 0, causing spurious wakeups.</div><div class='del'>-		 * When suspending by closing the LID, the power to the USB</div><div class='del'>-		 * keyboard is turned off, causing INT0002 ACPI events to</div><div class='del'>-		 * trigger once the XHCI controller notices the keyboard is</div><div class='del'>-		 * gone. So INT0002 events cause spurious wakeups too. Ignoring</div><div class='del'>-		 * EC wakes breaks wakeup when opening the lid, the user needs</div><div class='del'>-		 * to press the power-button to wakeup the system. The</div><div class='del'>-		 * alternative is suspend simply not working, which is worse.</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "HP x2 Detachable 10-p0XX"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "INT33FF:01@0,INT0002:00@2",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * HP X2 10 models with Bay Trail SoC + AXP288 PMIC use an</div><div class='del'>-		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='del'>-		 * event handler on INT33FC:02 pin 28, causing spurious wakeups.</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),</div><div class='del'>-			DMI_MATCH(DMI_BOARD_NAME, "815D"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "INT33FC:02@28",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * HP X2 10 models with Cherry Trail SoC + AXP288 PMIC use an</div><div class='del'>-		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='del'>-		 * event handler on INT33FF:01 pin 0, causing spurious wakeups.</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),</div><div class='del'>-			DMI_MATCH(DMI_BOARD_NAME, "813E"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "INT33FF:01@0",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * Interrupt storm caused from edge triggered floating pin</div><div class='del'>-		 * Found in BIOS UX325UAZ.300</div><div class='del'>-		 * https://bugzilla.kernel.org/show_bug.cgi?id=216208</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX325UAZ_UM325UAZ"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_interrupt = "AMDI0030:00@18",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * Spurious wakeups from TP_ATTN# pin</div><div class='del'>-		 * Found in BIOS 1.7.8</div><div class='del'>-		 * https://gitlab.freedesktop.org/drm/amd/-/issues/1722#note_1720627</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_BOARD_NAME, "NL5xNU"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "ELAN0415:00@9",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * Spurious wakeups from TP_ATTN# pin</div><div class='del'>-		 * Found in BIOS 1.7.8</div><div class='del'>-		 * https://gitlab.freedesktop.org/drm/amd/-/issues/1722#note_1720627</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_BOARD_NAME, "NL5xRU"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "ELAN0415:00@9",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * Spurious wakeups from TP_ATTN# pin</div><div class='del'>-		 * Found in BIOS 1.7.7</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_BOARD_NAME, "NH5xAx"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "SYNA1202:00@16",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * On the Peaq C1010 2-in-1 INT33FC:00 pin 3 is connected to</div><div class='del'>-		 * a "dolby" button. At the ACPI level an _AEI event-handler</div><div class='del'>-		 * is connected which sets an ACPI variable to 1 on both</div><div class='del'>-		 * edges. This variable can be polled + cleared to 0 using</div><div class='del'>-		 * WMI. But since the variable is set on both edges the WMI</div><div class='del'>-		 * interface is pretty useless even when polling.</div><div class='del'>-		 * So instead the x86-android-tablets code instantiates</div><div class='del'>-		 * a gpio-keys platform device for it.</div><div class='del'>-		 * Ignore the _AEI handler for the pin, so that it is not busy.</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "PEAQ"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "PEAQ PMM C1010 MD99187"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_interrupt = "INT33FC:00@3",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * Spurious wakeups from TP_ATTN# pin</div><div class='del'>-		 * Found in BIOS 0.35</div><div class='del'>-		 * https://gitlab.freedesktop.org/drm/amd/-/issues/3073</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "GPD"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "G1619-04"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_wake = "PNP0C50:00@8",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * Spurious wakeups from GPIO 11</div><div class='del'>-		 * Found in BIOS 1.04</div><div class='del'>-		 * https://gitlab.freedesktop.org/drm/amd/-/issues/3954</div><div class='del'>-		 */</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_FAMILY, "Acer Nitro V 14"),</div><div class='del'>-		},</div><div class='del'>-		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='del'>-			.ignore_interrupt = "AMDI0030:00@11",</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{} /* Terminating entry */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init acpi_gpio_setup_params(void)</div><div class='del'>-{</div><div class='del'>-	const struct acpi_gpiolib_dmi_quirk *quirk = NULL;</div><div class='del'>-	const struct dmi_system_id *id;</div><div class='del'>-</div><div class='del'>-	id = dmi_first_match(gpiolib_acpi_quirks);</div><div class='del'>-	if (id)</div><div class='del'>-		quirk = id-&gt;driver_data;</div><div class='del'>-</div><div class='del'>-	if (run_edge_events_on_boot &lt; 0) {</div><div class='del'>-		if (quirk &amp;&amp; quirk-&gt;no_edge_events_on_boot)</div><div class='del'>-			run_edge_events_on_boot = 0;</div><div class='del'>-		else</div><div class='del'>-			run_edge_events_on_boot = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ignore_wake == NULL &amp;&amp; quirk &amp;&amp; quirk-&gt;ignore_wake)</div><div class='del'>-		ignore_wake = quirk-&gt;ignore_wake;</div><div class='del'>-</div><div class='del'>-	if (ignore_interrupt == NULL &amp;&amp; quirk &amp;&amp; quirk-&gt;ignore_interrupt)</div><div class='del'>-		ignore_interrupt = quirk-&gt;ignore_interrupt;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Directly after dmi_setup() which runs as core_initcall() */</div><div class='del'>-postcore_initcall(acpi_gpio_setup_params);</div><div class='head'>diff --git a/drivers/gpio/gpiolib-acpi-quirks.c b/drivers/gpio/gpiolib-acpi-quirks.c<br/>new file mode 100644<br/>index 000000000000..219667315b2c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-acpi-quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-acpi-quirks.c</a></div><div class='hunk'>@@ -0,0 +1,363 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * ACPI quirks for GPIO ACPI helpers</div><div class='add'>+ *</div><div class='add'>+ * Author: Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dmi.h&gt;</div><div class='add'>+#include &lt;linux/kstrtox.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/printk.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "gpiolib-acpi.h"</div><div class='add'>+</div><div class='add'>+static int run_edge_events_on_boot = -1;</div><div class='add'>+module_param(run_edge_events_on_boot, int, 0444);</div><div class='add'>+MODULE_PARM_DESC(run_edge_events_on_boot,</div><div class='add'>+		 "Run edge _AEI event-handlers at boot: 0=no, 1=yes, -1=auto");</div><div class='add'>+</div><div class='add'>+static char *ignore_wake;</div><div class='add'>+module_param(ignore_wake, charp, 0444);</div><div class='add'>+MODULE_PARM_DESC(ignore_wake,</div><div class='add'>+		 "controller@pin combos on which to ignore the ACPI wake flag "</div><div class='add'>+		 "ignore_wake=controller@pin[,controller@pin[,...]]");</div><div class='add'>+</div><div class='add'>+static char *ignore_interrupt;</div><div class='add'>+module_param(ignore_interrupt, charp, 0444);</div><div class='add'>+MODULE_PARM_DESC(ignore_interrupt,</div><div class='add'>+		 "controller@pin combos on which to ignore interrupt "</div><div class='add'>+		 "ignore_interrupt=controller@pin[,controller@pin[,...]]");</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For GPIO chips which call acpi_gpiochip_request_interrupts() before late_init</div><div class='add'>+ * (so builtin drivers) we register the ACPI GpioInt IRQ handlers from a</div><div class='add'>+ * late_initcall_sync() handler, so that other builtin drivers can register their</div><div class='add'>+ * OpRegions before the event handlers can run. This list contains GPIO chips</div><div class='add'>+ * for which the acpi_gpiochip_request_irqs() call has been deferred.</div><div class='add'>+ */</div><div class='add'>+static DEFINE_MUTEX(acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+static LIST_HEAD(acpi_gpio_deferred_req_irqs_list);</div><div class='add'>+static bool acpi_gpio_deferred_req_irqs_done;</div><div class='add'>+</div><div class='add'>+bool acpi_gpio_add_to_deferred_list(struct list_head *list)</div><div class='add'>+{</div><div class='add'>+	bool defer;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+	defer = !acpi_gpio_deferred_req_irqs_done;</div><div class='add'>+	if (defer)</div><div class='add'>+		list_add(list, &amp;acpi_gpio_deferred_req_irqs_list);</div><div class='add'>+	mutex_unlock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+</div><div class='add'>+	return defer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void acpi_gpio_remove_from_deferred_list(struct list_head *list)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+	if (!list_empty(list))</div><div class='add'>+		list_del_init(list);</div><div class='add'>+	mutex_unlock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int acpi_gpio_need_run_edge_events_on_boot(void)</div><div class='add'>+{</div><div class='add'>+	return run_edge_events_on_boot;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool acpi_gpio_in_ignore_list(enum acpi_gpio_ignore_list list,</div><div class='add'>+			      const char *controller_in, unsigned int pin_in)</div><div class='add'>+{</div><div class='add'>+	const char *ignore_list, *controller, *pin_str;</div><div class='add'>+	unsigned int pin;</div><div class='add'>+	char *endp;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	switch (list) {</div><div class='add'>+	case ACPI_GPIO_IGNORE_WAKE:</div><div class='add'>+		ignore_list = ignore_wake;</div><div class='add'>+		break;</div><div class='add'>+	case ACPI_GPIO_IGNORE_INTERRUPT:</div><div class='add'>+		ignore_list = ignore_interrupt;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	controller = ignore_list;</div><div class='add'>+	while (controller) {</div><div class='add'>+		pin_str = strchr(controller, '@');</div><div class='add'>+		if (!pin_str)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		len = pin_str - controller;</div><div class='add'>+		if (len == strlen(controller_in) &amp;&amp;</div><div class='add'>+		    strncmp(controller, controller_in, len) == 0) {</div><div class='add'>+			pin = simple_strtoul(pin_str + 1, &amp;endp, 10);</div><div class='add'>+			if (*endp != 0 &amp;&amp; *endp != ',')</div><div class='add'>+				goto err;</div><div class='add'>+</div><div class='add'>+			if (pin == pin_in)</div><div class='add'>+				return true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		controller = strchr(controller, ',');</div><div class='add'>+		if (controller)</div><div class='add'>+			controller++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+err:</div><div class='add'>+	pr_err_once("Error: Invalid value for gpiolib_acpi.ignore_...: %s\n", ignore_list);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Run deferred acpi_gpiochip_request_irqs() */</div><div class='add'>+static int __init acpi_gpio_handle_deferred_request_irqs(void)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+	acpi_gpio_process_deferred_list(&amp;acpi_gpio_deferred_req_irqs_list);</div><div class='add'>+	acpi_gpio_deferred_req_irqs_done = true;</div><div class='add'>+	mutex_unlock(&amp;acpi_gpio_deferred_req_irqs_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+/* We must use _sync so that this runs after the first deferred_probe run */</div><div class='add'>+late_initcall_sync(acpi_gpio_handle_deferred_request_irqs);</div><div class='add'>+</div><div class='add'>+struct acpi_gpiolib_dmi_quirk {</div><div class='add'>+	bool no_edge_events_on_boot;</div><div class='add'>+	char *ignore_wake;</div><div class='add'>+	char *ignore_interrupt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dmi_system_id gpiolib_acpi_quirks[] __initconst = {</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * The Minix Neo Z83-4 has a micro-USB-B id-pin handler for</div><div class='add'>+		 * a non existing micro-USB-B connector which puts the HDMI</div><div class='add'>+		 * DDC pins in GPIO mode, breaking HDMI support.</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "MINIX"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.no_edge_events_on_boot = true,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * The Terra Pad 1061 has a micro-USB-B id-pin handler, which</div><div class='add'>+		 * instead of controlling the actual micro-USB-B turns the 5V</div><div class='add'>+		 * boost for its USB-A connector off. The actual micro-USB-B</div><div class='add'>+		 * connector is wired for charging only.</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Wortmann_AG"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "TERRA_PAD_1061"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.no_edge_events_on_boot = true,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * The Dell Venue 10 Pro 5055, with Bay Trail SoC + TI PMIC uses an</div><div class='add'>+		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='add'>+		 * event handler on INT33FFC:02 pin 12, causing spurious wakeups.</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Venue 10 Pro 5055"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "INT33FC:02@12",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * HP X2 10 models with Cherry Trail SoC + TI PMIC use an</div><div class='add'>+		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='add'>+		 * event handler on INT33FF:01 pin 0, causing spurious wakeups.</div><div class='add'>+		 * When suspending by closing the LID, the power to the USB</div><div class='add'>+		 * keyboard is turned off, causing INT0002 ACPI events to</div><div class='add'>+		 * trigger once the XHCI controller notices the keyboard is</div><div class='add'>+		 * gone. So INT0002 events cause spurious wakeups too. Ignoring</div><div class='add'>+		 * EC wakes breaks wakeup when opening the lid, the user needs</div><div class='add'>+		 * to press the power-button to wakeup the system. The</div><div class='add'>+		 * alternative is suspend simply not working, which is worse.</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP x2 Detachable 10-p0XX"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "INT33FF:01@0,INT0002:00@2",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * HP X2 10 models with Bay Trail SoC + AXP288 PMIC use an</div><div class='add'>+		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='add'>+		 * event handler on INT33FC:02 pin 28, causing spurious wakeups.</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "815D"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "INT33FC:02@28",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * HP X2 10 models with Cherry Trail SoC + AXP288 PMIC use an</div><div class='add'>+		 * external embedded-controller connected via I2C + an ACPI GPIO</div><div class='add'>+		 * event handler on INT33FF:01 pin 0, causing spurious wakeups.</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion x2 Detachable"),</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "813E"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "INT33FF:01@0",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * Interrupt storm caused from edge triggered floating pin</div><div class='add'>+		 * Found in BIOS UX325UAZ.300</div><div class='add'>+		 * https://bugzilla.kernel.org/show_bug.cgi?id=216208</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX325UAZ_UM325UAZ"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_interrupt = "AMDI0030:00@18",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * Spurious wakeups from TP_ATTN# pin</div><div class='add'>+		 * Found in BIOS 1.7.8</div><div class='add'>+		 * https://gitlab.freedesktop.org/drm/amd/-/issues/1722#note_1720627</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "NL5xNU"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "ELAN0415:00@9",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * Spurious wakeups from TP_ATTN# pin</div><div class='add'>+		 * Found in BIOS 1.7.8</div><div class='add'>+		 * https://gitlab.freedesktop.org/drm/amd/-/issues/1722#note_1720627</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "NL5xRU"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "ELAN0415:00@9",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * Spurious wakeups from TP_ATTN# pin</div><div class='add'>+		 * Found in BIOS 1.7.7</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_BOARD_NAME, "NH5xAx"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "SYNA1202:00@16",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * On the Peaq C1010 2-in-1 INT33FC:00 pin 3 is connected to</div><div class='add'>+		 * a "dolby" button. At the ACPI level an _AEI event-handler</div><div class='add'>+		 * is connected which sets an ACPI variable to 1 on both</div><div class='add'>+		 * edges. This variable can be polled + cleared to 0 using</div><div class='add'>+		 * WMI. But since the variable is set on both edges the WMI</div><div class='add'>+		 * interface is pretty useless even when polling.</div><div class='add'>+		 * So instead the x86-android-tablets code instantiates</div><div class='add'>+		 * a gpio-keys platform device for it.</div><div class='add'>+		 * Ignore the _AEI handler for the pin, so that it is not busy.</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "PEAQ"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "PEAQ PMM C1010 MD99187"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_interrupt = "INT33FC:00@3",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * Spurious wakeups from TP_ATTN# pin</div><div class='add'>+		 * Found in BIOS 0.35</div><div class='add'>+		 * https://gitlab.freedesktop.org/drm/amd/-/issues/3073</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "GPD"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "G1619-04"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_wake = "PNP0C50:00@8",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/*</div><div class='add'>+		 * Spurious wakeups from GPIO 11</div><div class='add'>+		 * Found in BIOS 1.04</div><div class='add'>+		 * https://gitlab.freedesktop.org/drm/amd/-/issues/3954</div><div class='add'>+		 */</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_FAMILY, "Acer Nitro V 14"),</div><div class='add'>+		},</div><div class='add'>+		.driver_data = &amp;(struct acpi_gpiolib_dmi_quirk) {</div><div class='add'>+			.ignore_interrupt = "AMDI0030:00@11",</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{} /* Terminating entry */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init acpi_gpio_setup_params(void)</div><div class='add'>+{</div><div class='add'>+	const struct acpi_gpiolib_dmi_quirk *quirk = NULL;</div><div class='add'>+	const struct dmi_system_id *id;</div><div class='add'>+</div><div class='add'>+	id = dmi_first_match(gpiolib_acpi_quirks);</div><div class='add'>+	if (id)</div><div class='add'>+		quirk = id-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	if (run_edge_events_on_boot &lt; 0) {</div><div class='add'>+		if (quirk &amp;&amp; quirk-&gt;no_edge_events_on_boot)</div><div class='add'>+			run_edge_events_on_boot = 0;</div><div class='add'>+		else</div><div class='add'>+			run_edge_events_on_boot = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ignore_wake == NULL &amp;&amp; quirk &amp;&amp; quirk-&gt;ignore_wake)</div><div class='add'>+		ignore_wake = quirk-&gt;ignore_wake;</div><div class='add'>+</div><div class='add'>+	if (ignore_interrupt == NULL &amp;&amp; quirk &amp;&amp; quirk-&gt;ignore_interrupt)</div><div class='add'>+		ignore_interrupt = quirk-&gt;ignore_interrupt;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Directly after dmi_setup() which runs as core_initcall() */</div><div class='add'>+postcore_initcall(acpi_gpio_setup_params);</div><div class='head'>diff --git a/drivers/gpio/gpiolib-acpi.h b/drivers/gpio/gpiolib-acpi.h<br/>index 7e1c51d04040..a90267470a4e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-acpi.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-acpi.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-acpi.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-acpi.h</a></div><div class='hunk'>@@ -58,4 +58,19 @@ static inline int acpi_gpio_count(const struct fwnode_handle *fwnode,</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+void acpi_gpio_process_deferred_list(struct list_head *list);</div><div class='add'>+</div><div class='add'>+bool acpi_gpio_add_to_deferred_list(struct list_head *list);</div><div class='add'>+void acpi_gpio_remove_from_deferred_list(struct list_head *list);</div><div class='add'>+</div><div class='add'>+int acpi_gpio_need_run_edge_events_on_boot(void);</div><div class='add'>+</div><div class='add'>+enum acpi_gpio_ignore_list {</div><div class='add'>+	ACPI_GPIO_IGNORE_WAKE,</div><div class='add'>+	ACPI_GPIO_IGNORE_INTERRUPT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+bool acpi_gpio_in_ignore_list(enum acpi_gpio_ignore_list list,</div><div class='add'>+			      const char *controller_in, unsigned int pin_in);</div><div class='add'>+</div><div class='ctx'> #endif /* GPIOLIB_ACPI_H */</div><div class='head'>diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c<br/>index 107d75558b5a..e6a289fa0f8f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-cdev.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-cdev.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-cdev.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-cdev.c</a></div><div class='hunk'>@@ -1366,9 +1366,6 @@ static long linereq_set_values(struct linereq *lr, void __user *ip)</div><div class='ctx'> 	/* scan requested lines to determine the subset to be set */</div><div class='ctx'> 	for (num_set = 0, i = 0; i &lt; lr-&gt;num_lines; i++) {</div><div class='ctx'> 		if (lv.mask &amp; BIT_ULL(i)) {</div><div class='del'>-			/* setting inputs is not allowed */</div><div class='del'>-			if (!test_bit(FLAG_IS_OUT, &amp;lr-&gt;lines[i].desc-&gt;flags))</div><div class='del'>-				return -EPERM;</div><div class='ctx'> 			/* add to compacted values */</div><div class='ctx'> 			if (lv.bits &amp; BIT_ULL(i))</div><div class='ctx'> 				__set_bit(num_set, vals);</div><div class='head'>diff --git a/drivers/gpio/gpiolib-devres.c b/drivers/gpio/gpiolib-devres.c<br/>index 08205f355ceb..4d5f83b17624 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-devres.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-devres.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-devres.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-devres.c</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'>  * Copyright (c) 2011 John Crispin &lt;john@phrozen.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/device/devres.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='hunk'>@@ -19,32 +19,14 @@</div><div class='ctx'> struct fwnode_handle;</div><div class='ctx'> struct lock_class_key;</div><div class='ctx'> </div><div class='del'>-static void devm_gpiod_release(struct device *dev, void *res)</div><div class='add'>+static void devm_gpiod_release(void *desc)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_desc **desc = res;</div><div class='del'>-</div><div class='del'>-	gpiod_put(*desc);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int devm_gpiod_match(struct device *dev, void *res, void *data)</div><div class='del'>-{</div><div class='del'>-	struct gpio_desc **this = res, **gpio = data;</div><div class='del'>-</div><div class='del'>-	return *this == *gpio;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void devm_gpiod_release_array(struct device *dev, void *res)</div><div class='del'>-{</div><div class='del'>-	struct gpio_descs **descs = res;</div><div class='del'>-</div><div class='del'>-	gpiod_put_array(*descs);</div><div class='add'>+	gpiod_put(desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int devm_gpiod_match_array(struct device *dev, void *res, void *data)</div><div class='add'>+static void devm_gpiod_release_array(void *descs)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_descs **this = res, **gpios = data;</div><div class='del'>-</div><div class='del'>-	return *this == *gpios;</div><div class='add'>+	gpiod_put_array(descs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -114,8 +96,8 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,</div><div class='ctx'> 						    unsigned int idx,</div><div class='ctx'> 						    enum gpiod_flags flags)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_desc **dr;</div><div class='ctx'> 	struct gpio_desc *desc;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	desc = gpiod_get_index(dev, con_id, idx, flags);</div><div class='ctx'> 	if (IS_ERR(desc))</div><div class='hunk'>@@ -126,23 +108,16 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,</div><div class='ctx'> 	 * already under resource management by this device.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (flags &amp; GPIOD_FLAGS_BIT_NONEXCLUSIVE) {</div><div class='del'>-		struct devres *dres;</div><div class='add'>+		bool dres;</div><div class='ctx'> </div><div class='del'>-		dres = devres_find(dev, devm_gpiod_release,</div><div class='del'>-				   devm_gpiod_match, &amp;desc);</div><div class='add'>+		dres = devm_is_action_added(dev, devm_gpiod_release, desc);</div><div class='ctx'> 		if (dres)</div><div class='ctx'> 			return desc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dr = devres_alloc(devm_gpiod_release, sizeof(struct gpio_desc *),</div><div class='del'>-			  GFP_KERNEL);</div><div class='del'>-	if (!dr) {</div><div class='del'>-		gpiod_put(desc);</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*dr = desc;</div><div class='del'>-	devres_add(dev, dr);</div><div class='add'>+	ret = devm_add_action_or_reset(dev, devm_gpiod_release, desc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='ctx'> 	return desc;</div><div class='ctx'> }</div><div class='hunk'>@@ -171,22 +146,16 @@ struct gpio_desc *devm_fwnode_gpiod_get_index(struct device *dev,</div><div class='ctx'> 					      enum gpiod_flags flags,</div><div class='ctx'> 					      const char *label)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_desc **dr;</div><div class='ctx'> 	struct gpio_desc *desc;</div><div class='del'>-</div><div class='del'>-	dr = devres_alloc(devm_gpiod_release, sizeof(struct gpio_desc *),</div><div class='del'>-			  GFP_KERNEL);</div><div class='del'>-	if (!dr)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	desc = gpiod_find_and_request(dev, fwnode, con_id, index, flags, label, false);</div><div class='del'>-	if (IS_ERR(desc)) {</div><div class='del'>-		devres_free(dr);</div><div class='add'>+	if (IS_ERR(desc))</div><div class='ctx'> 		return desc;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	*dr = desc;</div><div class='del'>-	devres_add(dev, dr);</div><div class='add'>+	ret = devm_add_action_or_reset(dev, devm_gpiod_release, desc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='ctx'> 	return desc;</div><div class='ctx'> }</div><div class='hunk'>@@ -244,22 +213,16 @@ struct gpio_descs *__must_check devm_gpiod_get_array(struct device *dev,</div><div class='ctx'> 						     const char *con_id,</div><div class='ctx'> 						     enum gpiod_flags flags)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_descs **dr;</div><div class='ctx'> 	struct gpio_descs *descs;</div><div class='del'>-</div><div class='del'>-	dr = devres_alloc(devm_gpiod_release_array,</div><div class='del'>-			  sizeof(struct gpio_descs *), GFP_KERNEL);</div><div class='del'>-	if (!dr)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	descs = gpiod_get_array(dev, con_id, flags);</div><div class='del'>-	if (IS_ERR(descs)) {</div><div class='del'>-		devres_free(dr);</div><div class='add'>+	if (IS_ERR(descs))</div><div class='ctx'> 		return descs;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	*dr = descs;</div><div class='del'>-	devres_add(dev, dr);</div><div class='add'>+	ret = devm_add_action_or_reset(dev, devm_gpiod_release_array, descs);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='ctx'> 	return descs;</div><div class='ctx'> }</div><div class='hunk'>@@ -307,8 +270,7 @@ EXPORT_SYMBOL_GPL(devm_gpiod_get_array_optional);</div><div class='ctx'>  */</div><div class='ctx'> void devm_gpiod_put(struct device *dev, struct gpio_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON(devres_release(dev, devm_gpiod_release, devm_gpiod_match,</div><div class='del'>-		&amp;desc));</div><div class='add'>+	devm_release_action(dev, devm_gpiod_release, desc);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_gpiod_put);</div><div class='ctx'> </div><div class='hunk'>@@ -317,24 +279,28 @@ EXPORT_SYMBOL_GPL(devm_gpiod_put);</div><div class='ctx'>  * @dev:	GPIO consumer</div><div class='ctx'>  * @desc:	GPIO descriptor to remove resource management from</div><div class='ctx'>  *</div><div class='add'>+ * *DEPRECATED*</div><div class='add'>+ * This function should not be used. It's been provided as a workaround for</div><div class='add'>+ * resource ownership issues in the regulator framework and should be replaced</div><div class='add'>+ * with a better solution.</div><div class='add'>+ *</div><div class='ctx'>  * Remove resource management from a GPIO descriptor. This is needed when</div><div class='ctx'>  * you want to hand over lifecycle management of a descriptor to another</div><div class='ctx'>  * mechanism.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> void devm_gpiod_unhinge(struct device *dev, struct gpio_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR_OR_NULL(desc))</div><div class='ctx'> 		return;</div><div class='del'>-	ret = devres_destroy(dev, devm_gpiod_release,</div><div class='del'>-			     devm_gpiod_match, &amp;desc);</div><div class='add'>+</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If the GPIO descriptor is requested as nonexclusive, we</div><div class='ctx'> 	 * may call this function several times on the same descriptor</div><div class='ctx'> 	 * so it is OK if devres_destroy() returns -ENOENT.</div><div class='ctx'> 	 */</div><div class='add'>+	ret = devm_remove_action_nowarn(dev, devm_gpiod_release, desc);</div><div class='ctx'> 	if (ret == -ENOENT)</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* Anything else we should warn about */</div><div class='hunk'>@@ -353,8 +319,7 @@ EXPORT_SYMBOL_GPL(devm_gpiod_unhinge);</div><div class='ctx'>  */</div><div class='ctx'> void devm_gpiod_put_array(struct device *dev, struct gpio_descs *descs)</div><div class='ctx'> {</div><div class='del'>-	WARN_ON(devres_release(dev, devm_gpiod_release_array,</div><div class='del'>-			       devm_gpiod_match_array, &amp;descs));</div><div class='add'>+	devm_remove_action(dev, devm_gpiod_release_array, descs);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_gpiod_put_array);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c<br/>index eb667f8f1ead..73ba73b31cb1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-of.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-of.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-of.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-of.c</a></div><div class='hunk'>@@ -193,6 +193,8 @@ static void of_gpio_try_fixup_polarity(const struct device_node *np,</div><div class='ctx'> 		 */</div><div class='ctx'> 		{ "himax,hx8357",	"gpios-reset",	false },</div><div class='ctx'> 		{ "himax,hx8369",	"gpios-reset",	false },</div><div class='add'>+#endif</div><div class='add'>+#if IS_ENABLED(CONFIG_MTD_NAND_JZ4780)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * The rb-gpios semantics was undocumented and qi,lb60 (along with</div><div class='ctx'> 		 * the ingenic driver) got it wrong. The active state encodes the</div><div class='hunk'>@@ -222,6 +224,15 @@ static void of_gpio_try_fixup_polarity(const struct device_node *np,</div><div class='ctx'> 		 */</div><div class='ctx'> 		{ "lantiq,pci-xway",	"gpio-reset",	false },</div><div class='ctx'> #endif</div><div class='add'>+#if IS_ENABLED(CONFIG_REGULATOR_S5M8767)</div><div class='add'>+		/*</div><div class='add'>+		 * According to S5M8767, the DVS and DS pin are</div><div class='add'>+		 * active-high signals. However, exynos5250-spring.dts use</div><div class='add'>+		 * active-low setting.</div><div class='add'>+		 */</div><div class='add'>+		{ "samsung,s5m8767-pmic", "s5m8767,pmic-buck-dvs-gpios", true },</div><div class='add'>+		{ "samsung,s5m8767-pmic", "s5m8767,pmic-buck-ds-gpios", true },</div><div class='add'>+#endif</div><div class='ctx'> #if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2005)</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * DTS for Nokia N900 incorrectly specified "active high"</div><div class='hunk'>@@ -266,6 +277,9 @@ static void of_gpio_set_polarity_by_property(const struct device_node *np,</div><div class='ctx'> 		{ "fsl,imx8qm-fec",  "phy-reset-gpios", "phy-reset-active-high" },</div><div class='ctx'> 		{ "fsl,s32v234-fec", "phy-reset-gpios", "phy-reset-active-high" },</div><div class='ctx'> #endif</div><div class='add'>+#if IS_ENABLED(CONFIG_MMC_ATMELMCI)</div><div class='add'>+		{ "atmel,hsmci",       "cd-gpios",     "cd-inverted" },</div><div class='add'>+#endif</div><div class='ctx'> #if IS_ENABLED(CONFIG_PCI_IMX6)</div><div class='ctx'> 		{ "fsl,imx6q-pcie",  "reset-gpio", "reset-gpio-active-high" },</div><div class='ctx'> 		{ "fsl,imx6sx-pcie", "reset-gpio", "reset-gpio-active-high" },</div><div class='hunk'>@@ -292,9 +306,6 @@ static void of_gpio_set_polarity_by_property(const struct device_node *np,</div><div class='ctx'> 		{ "regulator-gpio",    "enable-gpio",  "enable-active-high" },</div><div class='ctx'> 		{ "regulator-gpio",    "enable-gpios", "enable-active-high" },</div><div class='ctx'> #endif</div><div class='del'>-#if IS_ENABLED(CONFIG_MMC_ATMELMCI)</div><div class='del'>-		{ "atmel,hsmci",       "cd-gpios",     "cd-inverted" },</div><div class='del'>-#endif</div><div class='ctx'> 	};</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	bool active_high;</div><div class='hunk'>@@ -1276,3 +1287,11 @@ void of_gpiochip_remove(struct gpio_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	of_node_put(dev_of_node(&amp;chip-&gt;gpiodev-&gt;dev));</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool of_gpiochip_instance_match(struct gpio_chip *gc, unsigned int index)</div><div class='add'>+{</div><div class='add'>+	if (gc-&gt;of_node_instance_match)</div><div class='add'>+		return gc-&gt;of_node_instance_match(gc, index);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpio/gpiolib-of.h b/drivers/gpio/gpiolib-of.h<br/>index 16d6ac8cb156..3eebfac290c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-of.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-of.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-of.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-of.h</a></div><div class='hunk'>@@ -22,6 +22,7 @@ struct gpio_desc *of_find_gpio(struct device_node *np,</div><div class='ctx'> 			       unsigned long *lookupflags);</div><div class='ctx'> int of_gpiochip_add(struct gpio_chip *gc);</div><div class='ctx'> void of_gpiochip_remove(struct gpio_chip *gc);</div><div class='add'>+bool of_gpiochip_instance_match(struct gpio_chip *gc, unsigned int index);</div><div class='ctx'> int of_gpio_count(const struct fwnode_handle *fwnode, const char *con_id);</div><div class='ctx'> #else</div><div class='ctx'> static inline struct gpio_desc *of_find_gpio(struct device_node *np,</div><div class='hunk'>@@ -33,6 +34,11 @@ static inline struct gpio_desc *of_find_gpio(struct device_node *np,</div><div class='ctx'> }</div><div class='ctx'> static inline int of_gpiochip_add(struct gpio_chip *gc) { return 0; }</div><div class='ctx'> static inline void of_gpiochip_remove(struct gpio_chip *gc) { }</div><div class='add'>+static inline bool of_gpiochip_instance_match(struct gpio_chip *gc,</div><div class='add'>+					      unsigned int index)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> static inline int of_gpio_count(const struct fwnode_handle *fwnode,</div><div class='ctx'> 				const char *con_id)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c<br/>index 1acfa43bf1ab..4a3aa09dad9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-sysfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib-sysfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib-sysfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib-sysfs.c</a></div><div class='hunk'>@@ -134,17 +134,15 @@ static ssize_t value_store(struct device *dev,</div><div class='ctx'> 	long value;</div><div class='ctx'> </div><div class='ctx'> 	status = kstrtol(buf, 0, &amp;value);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='ctx'> </div><div class='ctx'> 	guard(mutex)(&amp;data-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(FLAG_IS_OUT, &amp;desc-&gt;flags))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='add'>+	status = gpiod_set_value_cansleep(desc, value);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	gpiod_set_value_cansleep(desc, value);</div><div class='del'>-</div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR_PREALLOC(value, S_IWUSR | S_IRUGO, value_show, value_store);</div><div class='head'>diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c<br/>index b8197502a5ac..fdafa0df1b43 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpio/gpiolib.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpio/gpiolib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpio/gpiolib.c</a></div><div class='hunk'>@@ -266,6 +266,20 @@ struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc)</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpiod_to_gpio_device);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * gpiod_is_equal() - Check if two GPIO descriptors refer to the same pin.</div><div class='add'>+ * @desc: Descriptor to compare.</div><div class='add'>+ * @other: The second descriptor to compare against.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * True if the descriptors refer to the same physical pin. False otherwise.</div><div class='add'>+ */</div><div class='add'>+bool gpiod_is_equal(struct gpio_desc *desc, struct gpio_desc *other)</div><div class='add'>+{</div><div class='add'>+	return desc == other;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gpiod_is_equal);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * gpio_device_get_base() - Get the base GPIO number allocated by this device</div><div class='ctx'>  * @gdev: GPIO device</div><div class='ctx'>  *</div><div class='hunk'>@@ -342,6 +356,37 @@ static int gpiochip_find_base_unlocked(u16 ngpio)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * This descriptor validation needs to be inserted verbatim into each</div><div class='add'>+ * function taking a descriptor, so we need to use a preprocessor</div><div class='add'>+ * macro to avoid endless duplication. If the desc is NULL it is an</div><div class='add'>+ * optional GPIO and calls should just bail out.</div><div class='add'>+ */</div><div class='add'>+static int validate_desc(const struct gpio_desc *desc, const char *func)</div><div class='add'>+{</div><div class='add'>+	if (!desc)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(desc)) {</div><div class='add'>+		pr_warn("%s: invalid GPIO (errorpointer: %pe)\n", func, desc);</div><div class='add'>+		return PTR_ERR(desc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define VALIDATE_DESC(desc) do { \</div><div class='add'>+	int __valid = validate_desc(desc, __func__); \</div><div class='add'>+	if (__valid &lt;= 0) \</div><div class='add'>+		return __valid; \</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define VALIDATE_DESC_VOID(desc) do { \</div><div class='add'>+	int __valid = validate_desc(desc, __func__); \</div><div class='add'>+	if (__valid &lt;= 0) \</div><div class='add'>+		return; \</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='ctx'> static int gpiochip_get_direction(struct gpio_chip *gc, unsigned int offset)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -376,11 +421,8 @@ int gpiod_get_direction(struct gpio_desc *desc)</div><div class='ctx'> 	unsigned int offset;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We cannot use VALIDATE_DESC() as we must not return 0 for a NULL</div><div class='del'>-	 * descriptor like we usually do.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_ERR_OR_NULL(desc))</div><div class='add'>+	ret = validate_desc(desc, __func__);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	CLASS(gpio_chip_guard, guard)(desc);</div><div class='hunk'>@@ -742,6 +784,12 @@ EXPORT_SYMBOL_GPL(gpiochip_query_valid_mask);</div><div class='ctx'> bool gpiochip_line_is_valid(const struct gpio_chip *gc,</div><div class='ctx'> 				unsigned int offset)</div><div class='ctx'> {</div><div class='add'>+	/*</div><div class='add'>+	 * hog pins are requested before registering GPIO chip</div><div class='add'>+	 */</div><div class='add'>+	if (!gc-&gt;gpiodev)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	/* No mask means all valid */</div><div class='ctx'> 	if (likely(!gc-&gt;gpiodev-&gt;valid_mask))</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -874,14 +922,12 @@ static void machine_gpiochip_add(struct gpio_chip *gc)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpiod_hog *hog;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;gpio_machine_hogs_mutex);</div><div class='add'>+	guard(mutex)(&amp;gpio_machine_hogs_mutex);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(hog, &amp;gpio_machine_hogs, list) {</div><div class='ctx'> 		if (!strcmp(gc-&gt;label, hog-&gt;chip_label))</div><div class='ctx'> 			gpiochip_machine_hog(gc, hog);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;gpio_machine_hogs_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gpiochip_setup_devs(void)</div><div class='hunk'>@@ -975,7 +1021,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,</div><div class='ctx'> 	struct gpio_device *gdev;</div><div class='ctx'> 	unsigned int desc_index;</div><div class='ctx'> 	int base = 0;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Only allow one set() and one set_multiple(). */</div><div class='ctx'> 	if ((gc-&gt;set &amp;&amp; gc-&gt;set_rv) ||</div><div class='hunk'>@@ -1000,11 +1046,10 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,</div><div class='ctx'> </div><div class='ctx'> 	device_set_node(&amp;gdev-&gt;dev, gpiochip_choose_fwnode(gc));</div><div class='ctx'> </div><div class='del'>-	gdev-&gt;id = ida_alloc(&amp;gpio_ida, GFP_KERNEL);</div><div class='del'>-	if (gdev-&gt;id &lt; 0) {</div><div class='del'>-		ret = gdev-&gt;id;</div><div class='add'>+	ret = ida_alloc(&amp;gpio_ida, GFP_KERNEL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		goto err_free_gdev;</div><div class='del'>-	}</div><div class='add'>+	gdev-&gt;id = ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = dev_set_name(&amp;gdev-&gt;dev, GPIOCHIP_NAME "%d", gdev-&gt;id);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1507,9 +1552,8 @@ static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,</div><div class='ctx'> 						   unsigned int *type)</div><div class='ctx'> {</div><div class='ctx'> 	/* We support standard DT translation */</div><div class='del'>-	if (is_of_node(fwspec-&gt;fwnode) &amp;&amp; fwspec-&gt;param_count == 2) {</div><div class='del'>-		return irq_domain_translate_twocell(d, fwspec, hwirq, type);</div><div class='del'>-	}</div><div class='add'>+	if (is_of_node(fwspec-&gt;fwnode))</div><div class='add'>+		return irq_domain_translate_twothreecell(d, fwspec, hwirq, type);</div><div class='ctx'> </div><div class='ctx'> 	/* This is for board files and others not using DT */</div><div class='ctx'> 	if (is_fwnode_irqchip(fwspec-&gt;fwnode)) {</div><div class='hunk'>@@ -1811,11 +1855,26 @@ static void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)</div><div class='ctx'> 	irq_set_chip_data(irq, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gpiochip_irq_select(struct irq_domain *d, struct irq_fwspec *fwspec,</div><div class='add'>+			       enum irq_domain_bus_token bus_token)</div><div class='add'>+{</div><div class='add'>+	struct fwnode_handle *fwnode = fwspec-&gt;fwnode;</div><div class='add'>+	struct gpio_chip *gc = d-&gt;host_data;</div><div class='add'>+	unsigned int index = fwspec-&gt;param[0];</div><div class='add'>+</div><div class='add'>+	if (fwspec-&gt;param_count == 3 &amp;&amp; is_of_node(fwnode))</div><div class='add'>+		return of_gpiochip_instance_match(gc, index);</div><div class='add'>+</div><div class='add'>+	/* Fallback for twocells */</div><div class='add'>+	return (fwnode &amp;&amp; (d-&gt;fwnode == fwnode) &amp;&amp; (d-&gt;bus_token == bus_token));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct irq_domain_ops gpiochip_domain_ops = {</div><div class='ctx'> 	.map	= gpiochip_irq_map,</div><div class='ctx'> 	.unmap	= gpiochip_irq_unmap,</div><div class='add'>+	.select	= gpiochip_irq_select,</div><div class='ctx'> 	/* Virtually all GPIO irqchips are twocell:ed */</div><div class='del'>-	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+	.xlate	= irq_domain_xlate_twothreecell,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_domain *gpiochip_simple_create_domain(struct gpio_chip *gc)</div><div class='hunk'>@@ -1835,7 +1894,6 @@ static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct irq_domain *domain = gc-&gt;irq.domain;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_GPIOLIB_IRQCHIP</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Avoid race condition with other code, which tries to lookup</div><div class='ctx'> 	 * an IRQ before the irqchip has been properly registered,</div><div class='hunk'>@@ -1843,7 +1901,6 @@ static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!gc-&gt;irq.initialized)</div><div class='ctx'> 		return -EPROBE_DEFER;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	if (!gpiochip_irqchip_irq_valid(gc, offset))</div><div class='ctx'> 		return -ENXIO;</div><div class='hunk'>@@ -2405,37 +2462,6 @@ out_clear_bit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * This descriptor validation needs to be inserted verbatim into each</div><div class='del'>- * function taking a descriptor, so we need to use a preprocessor</div><div class='del'>- * macro to avoid endless duplication. If the desc is NULL it is an</div><div class='del'>- * optional GPIO and calls should just bail out.</div><div class='del'>- */</div><div class='del'>-static int validate_desc(const struct gpio_desc *desc, const char *func)</div><div class='del'>-{</div><div class='del'>-	if (!desc)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(desc)) {</div><div class='del'>-		pr_warn("%s: invalid GPIO (errorpointer)\n", func);</div><div class='del'>-		return PTR_ERR(desc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define VALIDATE_DESC(desc) do { \</div><div class='del'>-	int __valid = validate_desc(desc, __func__); \</div><div class='del'>-	if (__valid &lt;= 0) \</div><div class='del'>-		return __valid; \</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='del'>-#define VALIDATE_DESC_VOID(desc) do { \</div><div class='del'>-	int __valid = validate_desc(desc, __func__); \</div><div class='del'>-	if (__valid &lt;= 0) \</div><div class='del'>-		return; \</div><div class='del'>-	} while (0)</div><div class='del'>-</div><div class='ctx'> int gpiod_request(struct gpio_desc *desc, const char *label)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -EPROBE_DEFER;</div><div class='hunk'>@@ -2879,7 +2905,7 @@ static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)</div><div class='ctx'> 	 * output-only, but if there is then not even a .set() operation it</div><div class='ctx'> 	 * is pretty tricky to drive the output line.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!guard.gc-&gt;set &amp;&amp; !guard.gc-&gt;direction_output) {</div><div class='add'>+	if (!guard.gc-&gt;set &amp;&amp; !guard.gc-&gt;set_rv &amp;&amp; !guard.gc-&gt;direction_output) {</div><div class='ctx'> 		gpiod_warn(desc,</div><div class='ctx'> 			   "%s: missing set() and direction_output() operations\n",</div><div class='ctx'> 			   __func__);</div><div class='hunk'>@@ -3045,7 +3071,7 @@ set_output_flag:</div><div class='ctx'>  */</div><div class='ctx'> int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	VALIDATE_DESC(desc);</div><div class='ctx'> </div><div class='hunk'>@@ -3078,7 +3104,7 @@ EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);</div><div class='ctx'>  */</div><div class='ctx'> int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	VALIDATE_DESC(desc);</div><div class='ctx'> </div><div class='hunk'>@@ -3593,6 +3619,9 @@ static int gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)</div><div class='ctx'> </div><div class='ctx'> static int gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)</div><div class='ctx'> {</div><div class='add'>+	if (unlikely(!test_bit(FLAG_IS_OUT, &amp;desc-&gt;flags)))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	CLASS(gpio_chip_guard, guard)(desc);</div><div class='ctx'> 	if (!guard.gc)</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -3664,6 +3693,12 @@ int gpiod_set_array_value_complex(bool raw, bool can_sleep,</div><div class='ctx'> 		if (!can_sleep)</div><div class='ctx'> 			WARN_ON(array_info-&gt;gdev-&gt;can_sleep);</div><div class='ctx'> </div><div class='add'>+		for (i = 0; i &lt; array_size; i++) {</div><div class='add'>+			if (unlikely(!test_bit(FLAG_IS_OUT,</div><div class='add'>+					       &amp;desc_array[i]-&gt;flags)))</div><div class='add'>+				return -EPERM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		guard(srcu)(&amp;array_info-&gt;gdev-&gt;srcu);</div><div class='ctx'> 		gc = srcu_dereference(array_info-&gt;gdev-&gt;chip,</div><div class='ctx'> 				      &amp;array_info-&gt;gdev-&gt;srcu);</div><div class='hunk'>@@ -3723,6 +3758,9 @@ int gpiod_set_array_value_complex(bool raw, bool can_sleep,</div><div class='ctx'> 			int hwgpio = gpio_chip_hwgpio(desc);</div><div class='ctx'> 			int value = test_bit(i, value_bitmap);</div><div class='ctx'> </div><div class='add'>+			if (unlikely(!test_bit(FLAG_IS_OUT, &amp;desc-&gt;flags)))</div><div class='add'>+				return -EPERM;</div><div class='add'>+</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * Pins applicable for fast input but not for</div><div class='ctx'> 			 * fast output processing may have been already</div><div class='hunk'>@@ -3944,13 +3982,10 @@ int gpiod_to_irq(const struct gpio_desc *desc)</div><div class='ctx'> 	struct gpio_device *gdev;</div><div class='ctx'> 	struct gpio_chip *gc;</div><div class='ctx'> 	int offset;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics</div><div class='del'>-	 * requires this function to not return zero on an invalid descriptor</div><div class='del'>-	 * but rather a negative error number.</div><div class='del'>-	 */</div><div class='del'>-	if (IS_ERR_OR_NULL(desc))</div><div class='add'>+	ret = validate_desc(desc, __func__);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	gdev = desc-&gt;gdev;</div><div class='hunk'>@@ -3962,13 +3997,12 @@ int gpiod_to_irq(const struct gpio_desc *desc)</div><div class='ctx'> </div><div class='ctx'> 	offset = gpio_chip_hwgpio(desc);</div><div class='ctx'> 	if (gc-&gt;to_irq) {</div><div class='del'>-		int retirq = gc-&gt;to_irq(gc, offset);</div><div class='add'>+		ret = gc-&gt;to_irq(gc, offset);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		/* Zero means NO_IRQ */</div><div class='del'>-		if (!retirq)</div><div class='del'>-			return -ENXIO;</div><div class='del'>-</div><div class='del'>-		return retirq;</div><div class='add'>+		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef CONFIG_GPIOLIB_IRQCHIP</div><div class='ctx'> 	if (gc-&gt;irq.chip) {</div><div class='hunk'>@@ -4323,12 +4357,10 @@ void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;gpio_lookup_lock);</div><div class='add'>+	guard(mutex)(&amp;gpio_lookup_lock);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; n; i++)</div><div class='ctx'> 		list_add_tail(&amp;tables[i]-&gt;list, &amp;gpio_lookup_list);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;gpio_lookup_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4387,11 +4419,9 @@ void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)</div><div class='ctx'> 	if (!table)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;gpio_lookup_lock);</div><div class='add'>+	guard(mutex)(&amp;gpio_lookup_lock);</div><div class='ctx'> </div><div class='ctx'> 	list_del(&amp;table-&gt;list);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;gpio_lookup_lock);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);</div><div class='ctx'> </div><div class='hunk'>@@ -4403,7 +4433,7 @@ void gpiod_add_hogs(struct gpiod_hog *hogs)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpiod_hog *hog;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;gpio_machine_hogs_mutex);</div><div class='add'>+	guard(mutex)(&amp;gpio_machine_hogs_mutex);</div><div class='ctx'> </div><div class='ctx'> 	for (hog = &amp;hogs[0]; hog-&gt;chip_label; hog++) {</div><div class='ctx'> 		list_add_tail(&amp;hog-&gt;list, &amp;gpio_machine_hogs);</div><div class='hunk'>@@ -4417,8 +4447,6 @@ void gpiod_add_hogs(struct gpiod_hog *hogs)</div><div class='ctx'> 		if (gdev)</div><div class='ctx'> 			gpiochip_machine_hog(gpio_device_get_chip(gdev), hog);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;gpio_machine_hogs_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpiod_add_hogs);</div><div class='ctx'> </div><div class='hunk'>@@ -4426,10 +4454,10 @@ void gpiod_remove_hogs(struct gpiod_hog *hogs)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpiod_hog *hog;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;gpio_machine_hogs_mutex);</div><div class='add'>+	guard(mutex)(&amp;gpio_machine_hogs_mutex);</div><div class='add'>+</div><div class='ctx'> 	for (hog = &amp;hogs[0]; hog-&gt;chip_label; hog++)</div><div class='ctx'> 		list_del(&amp;hog-&gt;list);</div><div class='del'>-	mutex_unlock(&amp;gpio_machine_hogs_mutex);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpiod_remove_hogs);</div><div class='ctx'> </div><div class='hunk'>@@ -5108,8 +5136,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_array_optional);</div><div class='ctx'>  */</div><div class='ctx'> void gpiod_put(struct gpio_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	if (desc)</div><div class='del'>-		gpiod_free(desc);</div><div class='add'>+	gpiod_free(desc);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gpiod_put);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig<br/>index 2cba2b6ebe1c..f094797f3b2b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Kconfig?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/Kconfig</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Kconfig?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/Kconfig</a></div><div class='hunk'>@@ -26,6 +26,11 @@ menuconfig DRM</div><div class='ctx'> 	  details.  You should also select and configure AGP</div><div class='ctx'> 	  (/dev/agpgart) support if it is available for your platform.</div><div class='ctx'> </div><div class='add'>+menu "DRM debugging options"</div><div class='add'>+depends on DRM</div><div class='add'>+source "drivers/gpu/drm/Kconfig.debug"</div><div class='add'>+endmenu</div><div class='add'>+</div><div class='ctx'> if DRM</div><div class='ctx'> </div><div class='ctx'> config DRM_MIPI_DBI</div><div class='hunk'>@@ -37,65 +42,6 @@ config DRM_MIPI_DSI</div><div class='ctx'> 	bool</div><div class='ctx'> 	depends on DRM</div><div class='ctx'> </div><div class='del'>-config DRM_DEBUG_MM</div><div class='del'>-	bool "Insert extra checks and debug info into the DRM range managers"</div><div class='del'>-	default n</div><div class='del'>-	depends on DRM</div><div class='del'>-	depends on STACKTRACE_SUPPORT</div><div class='del'>-	select STACKDEPOT</div><div class='del'>-	help</div><div class='del'>-	  Enable allocation tracking of memory manager and leak detection on</div><div class='del'>-	  shutdown.</div><div class='del'>-</div><div class='del'>-	  Recommended for driver developers only.</div><div class='del'>-</div><div class='del'>-	  If in doubt, say "N".</div><div class='del'>-</div><div class='del'>-config DRM_USE_DYNAMIC_DEBUG</div><div class='del'>-	bool "use dynamic debug to implement drm.debug"</div><div class='del'>-	default n</div><div class='del'>-	depends on BROKEN</div><div class='del'>-	depends on DRM</div><div class='del'>-	depends on DYNAMIC_DEBUG || DYNAMIC_DEBUG_CORE</div><div class='del'>-	depends on JUMP_LABEL</div><div class='del'>-	help</div><div class='del'>-	  Use dynamic-debug to avoid drm_debug_enabled() runtime overheads.</div><div class='del'>-	  Due to callsite counts in DRM drivers (~4k in amdgpu) and 56</div><div class='del'>-	  bytes per callsite, the .data costs can be substantial, and</div><div class='del'>-	  are therefore configurable.</div><div class='del'>-</div><div class='del'>-config DRM_KUNIT_TEST_HELPERS</div><div class='del'>-	tristate</div><div class='del'>-	depends on DRM &amp;&amp; KUNIT</div><div class='del'>-	select DRM_KMS_HELPER</div><div class='del'>-	help</div><div class='del'>-	  KUnit Helpers for KMS drivers.</div><div class='del'>-</div><div class='del'>-config DRM_KUNIT_TEST</div><div class='del'>-	tristate "KUnit tests for DRM" if !KUNIT_ALL_TESTS</div><div class='del'>-	depends on DRM &amp;&amp; KUNIT &amp;&amp; MMU</div><div class='del'>-	select DRM_BUDDY</div><div class='del'>-	select DRM_DISPLAY_DP_HELPER</div><div class='del'>-	select DRM_DISPLAY_HDMI_STATE_HELPER</div><div class='del'>-	select DRM_DISPLAY_HELPER</div><div class='del'>-	select DRM_EXEC</div><div class='del'>-	select DRM_EXPORT_FOR_TESTS if m</div><div class='del'>-	select DRM_GEM_SHMEM_HELPER</div><div class='del'>-	select DRM_KUNIT_TEST_HELPERS</div><div class='del'>-	select DRM_LIB_RANDOM</div><div class='del'>-	select PRIME_NUMBERS</div><div class='del'>-	default KUNIT_ALL_TESTS</div><div class='del'>-	help</div><div class='del'>-	  This builds unit tests for DRM. This option is not useful for</div><div class='del'>-	  distributions or general kernels, but only for kernel</div><div class='del'>-	  developers working on DRM and associated drivers.</div><div class='del'>-</div><div class='del'>-	  For more information on KUnit and unit tests in general,</div><div class='del'>-	  please refer to the KUnit documentation in</div><div class='del'>-	  Documentation/dev-tools/kunit/.</div><div class='del'>-</div><div class='del'>-	  If in doubt, say "N".</div><div class='del'>-</div><div class='ctx'> config DRM_KMS_HELPER</div><div class='ctx'> 	tristate</div><div class='ctx'> 	depends on DRM</div><div class='hunk'>@@ -188,7 +134,7 @@ config DRM_DEBUG_DP_MST_TOPOLOGY_REFS</div><div class='ctx'>         bool "Enable refcount backtrace history in the DP MST helpers"</div><div class='ctx'> 	depends on STACKTRACE_SUPPORT</div><div class='ctx'>         select STACKDEPOT</div><div class='del'>-        depends on DRM_KMS_HELPER</div><div class='add'>+        select DRM_KMS_HELPER</div><div class='ctx'>         depends on DEBUG_KERNEL</div><div class='ctx'>         depends on EXPERT</div><div class='ctx'>         help</div><div class='hunk'>@@ -247,23 +193,6 @@ config DRM_TTM</div><div class='ctx'> 	  GPU memory types. Will be enabled automatically if a device driver</div><div class='ctx'> 	  uses it.</div><div class='ctx'> </div><div class='del'>-config DRM_TTM_KUNIT_TEST</div><div class='del'>-        tristate "KUnit tests for TTM" if !KUNIT_ALL_TESTS</div><div class='del'>-        default n</div><div class='del'>-        depends on DRM &amp;&amp; KUNIT &amp;&amp; MMU &amp;&amp; (UML || COMPILE_TEST)</div><div class='del'>-        select DRM_TTM</div><div class='del'>-        select DRM_BUDDY</div><div class='del'>-        select DRM_EXPORT_FOR_TESTS if m</div><div class='del'>-        select DRM_KUNIT_TEST_HELPERS</div><div class='del'>-        default KUNIT_ALL_TESTS</div><div class='del'>-        help</div><div class='del'>-          Enables unit tests for TTM, a GPU memory manager subsystem used</div><div class='del'>-          to manage memory buffers. This option is mostly useful for kernel</div><div class='del'>-          developers. It depends on (UML || COMPILE_TEST) since no other driver</div><div class='del'>-          which uses TTM can be loaded while running the tests.</div><div class='del'>-</div><div class='del'>-          If in doubt, say "N".</div><div class='del'>-</div><div class='ctx'> config DRM_EXEC</div><div class='ctx'> 	tristate</div><div class='ctx'> 	depends on DRM</div><div class='hunk'>@@ -335,6 +264,8 @@ config DRM_SCHED</div><div class='ctx'> 	tristate</div><div class='ctx'> 	depends on DRM</div><div class='ctx'> </div><div class='add'>+source "drivers/gpu/drm/sysfb/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "drivers/gpu/drm/arm/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/radeon/Kconfig"</div><div class='hunk'>@@ -343,6 +274,8 @@ source "drivers/gpu/drm/amd/amdgpu/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/nouveau/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "drivers/gpu/drm/nova/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "drivers/gpu/drm/i915/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/xe/Kconfig"</div><div class='hunk'>@@ -454,6 +387,8 @@ source "drivers/gpu/drm/xlnx/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/gud/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "drivers/gpu/drm/sitronix/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "drivers/gpu/drm/solomon/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/gpu/drm/sprd/Kconfig"</div><div class='hunk'>@@ -474,9 +409,6 @@ config DRM_HYPERV</div><div class='ctx'> </div><div class='ctx'> 	 If M is selected the module will be called hyperv_drm.</div><div class='ctx'> </div><div class='del'>-config DRM_EXPORT_FOR_TESTS</div><div class='del'>-	bool</div><div class='del'>-</div><div class='ctx'> # Separate option as not all DRM drivers use it</div><div class='ctx'> config DRM_PANEL_BACKLIGHT_QUIRKS</div><div class='ctx'> 	tristate</div><div class='hunk'>@@ -489,31 +421,6 @@ config DRM_PRIVACY_SCREEN</div><div class='ctx'> 	bool</div><div class='ctx'> 	default n</div><div class='ctx'> </div><div class='del'>-config DRM_WERROR</div><div class='del'>-	bool "Compile the drm subsystem with warnings as errors"</div><div class='del'>-	depends on DRM &amp;&amp; EXPERT</div><div class='del'>-	depends on !WERROR</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  A kernel build should not cause any compiler warnings, and this</div><div class='del'>-	  enables the '-Werror' flag to enforce that rule in the drm subsystem.</div><div class='del'>-</div><div class='del'>-	  The drm subsystem enables more warnings than the kernel default, so</div><div class='del'>-	  this config option is disabled by default.</div><div class='del'>-</div><div class='del'>-	  If in doubt, say N.</div><div class='del'>-</div><div class='del'>-config DRM_HEADER_TEST</div><div class='del'>-	bool "Ensure DRM headers are self-contained and pass kernel-doc"</div><div class='del'>-	depends on DRM &amp;&amp; EXPERT &amp;&amp; BROKEN</div><div class='del'>-	default n</div><div class='del'>-	help</div><div class='del'>-	  Ensure the DRM subsystem headers both under drivers/gpu/drm and</div><div class='del'>-	  include/drm compile, are self-contained, have header guards, and have</div><div class='del'>-	  no kernel-doc warnings.</div><div class='del'>-</div><div class='del'>-	  If in doubt, say N.</div><div class='del'>-</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> # Separate option because drm_panel_orientation_quirks.c is shared with fbdev</div><div class='head'>diff --git a/drivers/gpu/drm/Kconfig.debug b/drivers/gpu/drm/Kconfig.debug<br/>new file mode 100644<br/>index 000000000000..fa6ee76f4d3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Kconfig.debug?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/Kconfig.debug</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+config DRM_USE_DYNAMIC_DEBUG</div><div class='add'>+	bool "use dynamic debug to implement drm.debug"</div><div class='add'>+	default n</div><div class='add'>+	depends on BROKEN</div><div class='add'>+	depends on DRM</div><div class='add'>+	depends on DYNAMIC_DEBUG || DYNAMIC_DEBUG_CORE</div><div class='add'>+	depends on JUMP_LABEL</div><div class='add'>+	help</div><div class='add'>+	 Use dynamic-debug to avoid drm_debug_enabled() runtime overheads.</div><div class='add'>+	 Due to callsite counts in DRM drivers (~4k in amdgpu) and 56</div><div class='add'>+	 bytes per callsite, the .data costs can be substantial, and</div><div class='add'>+	 are therefore configurable.</div><div class='add'>+</div><div class='add'>+config DRM_WERROR</div><div class='add'>+	bool "Compile the drm subsystem with warnings as errors"</div><div class='add'>+	depends on DRM &amp;&amp; EXPERT</div><div class='add'>+	depends on !WERROR</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  A kernel build should not cause any compiler warnings, and this</div><div class='add'>+	  enables the '-Werror' flag to enforce that rule in the drm subsystem.</div><div class='add'>+</div><div class='add'>+	  The drm subsystem enables more warnings than the kernel default, so</div><div class='add'>+	  this config option is disabled by default.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say N.</div><div class='add'>+</div><div class='add'>+config DRM_HEADER_TEST</div><div class='add'>+	bool "Ensure DRM headers are self-contained and pass kernel-doc"</div><div class='add'>+	depends on DRM &amp;&amp; EXPERT &amp;&amp; BROKEN</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Ensure the DRM subsystem headers both under drivers/gpu/drm and</div><div class='add'>+	  include/drm compile, are self-contained, have header guards, and have</div><div class='add'>+	  no kernel-doc warnings.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say N.</div><div class='add'>+</div><div class='add'>+config DRM_DEBUG_MM</div><div class='add'>+	bool "Insert extra checks and debug info into the DRM range managers"</div><div class='add'>+	default n</div><div class='add'>+	depends on DRM</div><div class='add'>+	depends on STACKTRACE_SUPPORT</div><div class='add'>+	select STACKDEPOT</div><div class='add'>+	help</div><div class='add'>+	  Enable allocation tracking of memory manager and leak detection on</div><div class='add'>+	  shutdown.</div><div class='add'>+</div><div class='add'>+	  Recommended for driver developers only.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say "N".</div><div class='add'>+</div><div class='add'>+config DRM_KUNIT_TEST_HELPERS</div><div class='add'>+	tristate</div><div class='add'>+	depends on DRM &amp;&amp; KUNIT</div><div class='add'>+	select DRM_KMS_HELPER</div><div class='add'>+	help</div><div class='add'>+	  KUnit Helpers for KMS drivers.</div><div class='add'>+</div><div class='add'>+config DRM_KUNIT_TEST</div><div class='add'>+	tristate "KUnit tests for DRM" if !KUNIT_ALL_TESTS</div><div class='add'>+	depends on DRM &amp;&amp; KUNIT &amp;&amp; MMU</div><div class='add'>+	select DRM_BRIDGE_CONNECTOR</div><div class='add'>+	select DRM_BUDDY</div><div class='add'>+	select DRM_DISPLAY_DP_HELPER</div><div class='add'>+	select DRM_DISPLAY_HDMI_STATE_HELPER</div><div class='add'>+	select DRM_DISPLAY_HELPER</div><div class='add'>+	select DRM_EXEC</div><div class='add'>+	select DRM_EXPORT_FOR_TESTS if m</div><div class='add'>+	select DRM_GEM_SHMEM_HELPER</div><div class='add'>+	select DRM_KUNIT_TEST_HELPERS</div><div class='add'>+	select DRM_LIB_RANDOM</div><div class='add'>+	select PRIME_NUMBERS</div><div class='add'>+	default KUNIT_ALL_TESTS</div><div class='add'>+	help</div><div class='add'>+	  This builds unit tests for DRM. This option is not useful for</div><div class='add'>+	  distributions or general kernels, but only for kernel</div><div class='add'>+	  developers working on DRM and associated drivers.</div><div class='add'>+</div><div class='add'>+	  For more information on KUnit and unit tests in general,</div><div class='add'>+	  please refer to the KUnit documentation in</div><div class='add'>+	  Documentation/dev-tools/kunit/.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say "N".</div><div class='add'>+</div><div class='add'>+config DRM_TTM_KUNIT_TEST</div><div class='add'>+	tristate "KUnit tests for TTM" if !KUNIT_ALL_TESTS</div><div class='add'>+	default n</div><div class='add'>+	depends on DRM &amp;&amp; KUNIT &amp;&amp; MMU &amp;&amp; (UML || COMPILE_TEST)</div><div class='add'>+	select DRM_TTM</div><div class='add'>+	select DRM_BUDDY</div><div class='add'>+	select DRM_EXPORT_FOR_TESTS if m</div><div class='add'>+	select DRM_KUNIT_TEST_HELPERS</div><div class='add'>+	default KUNIT_ALL_TESTS</div><div class='add'>+	help</div><div class='add'>+	  Enables unit tests for TTM, a GPU memory manager subsystem used</div><div class='add'>+	  to manage memory buffers. This option is mostly useful for kernel</div><div class='add'>+	  developers. It depends on (UML || COMPILE_TEST) since no other driver</div><div class='add'>+	  which uses TTM can be loaded while running the tests.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say "N".</div><div class='add'>+</div><div class='add'>+config DRM_SCHED_KUNIT_TEST</div><div class='add'>+	tristate "KUnit tests for the DRM scheduler" if !KUNIT_ALL_TESTS</div><div class='add'>+	select DRM_SCHED</div><div class='add'>+	depends on DRM &amp;&amp; KUNIT</div><div class='add'>+	default KUNIT_ALL_TESTS</div><div class='add'>+	help</div><div class='add'>+	  Choose this option to build unit tests for the DRM scheduler.</div><div class='add'>+</div><div class='add'>+	  Recommended for driver developers only.</div><div class='add'>+</div><div class='add'>+	  If in doubt, say "N".</div><div class='add'>+</div><div class='add'>+config DRM_EXPORT_FOR_TESTS</div><div class='add'>+	bool</div><div class='head'>diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile<br/>index ed54a546bbe2..5050ac32bba2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/Makefile</a></div><div class='hunk'>@@ -134,6 +134,7 @@ obj-$(CONFIG_DRM_TTM_HELPER) += drm_ttm_helper.o</div><div class='ctx'> drm_kms_helper-y := \</div><div class='ctx'> 	drm_atomic_helper.o \</div><div class='ctx'> 	drm_atomic_state_helper.o \</div><div class='add'>+	drm_bridge_helper.o \</div><div class='ctx'> 	drm_crtc_helper.o \</div><div class='ctx'> 	drm_damage_helper.o \</div><div class='ctx'> 	drm_flip_work.o \</div><div class='hunk'>@@ -176,6 +177,7 @@ obj-$(CONFIG_DRM_VMWGFX)+= vmwgfx/</div><div class='ctx'> obj-$(CONFIG_DRM_VGEM)	+= vgem/</div><div class='ctx'> obj-$(CONFIG_DRM_VKMS)	+= vkms/</div><div class='ctx'> obj-$(CONFIG_DRM_NOUVEAU) +=nouveau/</div><div class='add'>+obj-$(CONFIG_DRM_NOVA) += nova/</div><div class='ctx'> obj-$(CONFIG_DRM_EXYNOS) +=exynos/</div><div class='ctx'> obj-$(CONFIG_DRM_ROCKCHIP) +=rockchip/</div><div class='ctx'> obj-$(CONFIG_DRM_GMA500) += gma500/</div><div class='hunk'>@@ -204,6 +206,7 @@ obj-$(CONFIG_DRM_FSL_DCU) += fsl-dcu/</div><div class='ctx'> obj-$(CONFIG_DRM_ETNAVIV) += etnaviv/</div><div class='ctx'> obj-y			+= hisilicon/</div><div class='ctx'> obj-y			+= mxsfb/</div><div class='add'>+obj-y			+= sysfb/</div><div class='ctx'> obj-y			+= tiny/</div><div class='ctx'> obj-$(CONFIG_DRM_PL111) += pl111/</div><div class='ctx'> obj-$(CONFIG_DRM_TVE200) += tve200/</div><div class='hunk'>@@ -219,6 +222,7 @@ obj-$(CONFIG_DRM_TIDSS) += tidss/</div><div class='ctx'> obj-y			+= xlnx/</div><div class='ctx'> obj-y			+= gud/</div><div class='ctx'> obj-$(CONFIG_DRM_HYPERV) += hyperv/</div><div class='add'>+obj-y			+= sitronix/</div><div class='ctx'> obj-y			+= solomon/</div><div class='ctx'> obj-$(CONFIG_DRM_SPRD) += sprd/</div><div class='ctx'> obj-$(CONFIG_DRM_LOONGSON) += loongson/</div><div class='hunk'>@@ -236,7 +240,7 @@ always-$(CONFIG_DRM_HEADER_TEST) += \</div><div class='ctx'> quiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@)</div><div class='ctx'>       cmd_hdrtest = \</div><div class='ctx'> 		$(CC) $(c_flags) -fsyntax-only -x c /dev/null -include $&lt; -include $&lt;; \</div><div class='del'>-		$(srctree)/scripts/kernel-doc -none $(if $(CONFIG_WERROR)$(CONFIG_DRM_WERROR),-Werror) $&lt;; \</div><div class='add'>+		 PYTHONDONTWRITEBYTECODE=1 $(KERNELDOC) -none $(if $(CONFIG_WERROR)$(CONFIG_DRM_WERROR),-Werror) $&lt;; \</div><div class='ctx'> 		touch $@</div><div class='ctx'> </div><div class='ctx'> $(obj)/%.hdrtest: $(src)/%.h FORCE</div><div class='head'>diff --git a/drivers/gpu/drm/adp/adp-mipi.c b/drivers/gpu/drm/adp/adp-mipi.c<br/>index ad80542b60ed..2b60128e2c69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/adp/adp-mipi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/adp/adp-mipi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/adp/adp-mipi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/adp/adp-mipi.c</a></div><div class='hunk'>@@ -212,12 +212,13 @@ static const struct mipi_dsi_host_ops adp_dsi_host_ops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int adp_dsi_bridge_attach(struct drm_bridge *bridge,</div><div class='add'>+				 struct drm_encoder *encoder,</div><div class='ctx'> 				 enum drm_bridge_attach_flags flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct adp_mipi_drv_private *adp =</div><div class='ctx'> 		container_of(bridge, struct adp_mipi_drv_private, bridge);</div><div class='ctx'> </div><div class='del'>-	return drm_bridge_attach(bridge-&gt;encoder, adp-&gt;next_bridge, bridge, flags);</div><div class='add'>+	return drm_bridge_attach(encoder, adp-&gt;next_bridge, bridge, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct drm_bridge_funcs adp_dsi_bridge_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/adp/adp_drv.c b/drivers/gpu/drm/adp/adp_drv.c<br/>index c98c647f981d..54cde090c3f4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/adp/adp_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/adp/adp_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/adp/adp_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/adp/adp_drv.c</a></div><div class='hunk'>@@ -121,7 +121,6 @@ struct adp_drv_private {</div><div class='ctx'> 	dma_addr_t mask_iova;</div><div class='ctx'> 	int be_irq;</div><div class='ctx'> 	int fe_irq;</div><div class='del'>-	spinlock_t irq_lock;</div><div class='ctx'> 	struct drm_pending_vblank_event *event;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -288,6 +287,7 @@ static void adp_crtc_atomic_enable(struct drm_crtc *crtc,</div><div class='ctx'> 	writel(BIT(0), adp-&gt;be + ADBE_BLEND_EN3);</div><div class='ctx'> 	writel(BIT(0), adp-&gt;be + ADBE_BLEND_BYPASS);</div><div class='ctx'> 	writel(BIT(0), adp-&gt;be + ADBE_BLEND_EN4);</div><div class='add'>+	drm_crtc_vblank_on(crtc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void adp_crtc_atomic_disable(struct drm_crtc *crtc,</div><div class='hunk'>@@ -310,6 +310,7 @@ static void adp_crtc_atomic_flush(struct drm_crtc *crtc,</div><div class='ctx'> 				  struct drm_atomic_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	u32 frame_num = 1;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	struct adp_drv_private *adp = crtc_to_adp(crtc);</div><div class='ctx'> 	struct drm_crtc_state *new_state = drm_atomic_get_new_crtc_state(state, crtc);</div><div class='ctx'> 	u64 new_size = ALIGN(new_state-&gt;mode.hdisplay *</div><div class='hunk'>@@ -330,13 +331,19 @@ static void adp_crtc_atomic_flush(struct drm_crtc *crtc,</div><div class='ctx'> 	}</div><div class='ctx'> 	writel(ADBE_FIFO_SYNC | frame_num, adp-&gt;be + ADBE_FIFO);</div><div class='ctx'> 	//FIXME: use adbe flush interrupt</div><div class='del'>-	spin_lock_irq(&amp;crtc-&gt;dev-&gt;event_lock);</div><div class='ctx'> 	if (crtc-&gt;state-&gt;event) {</div><div class='del'>-		drm_crtc_vblank_get(crtc);</div><div class='del'>-		adp-&gt;event = crtc-&gt;state-&gt;event;</div><div class='add'>+		struct drm_pending_vblank_event *event = crtc-&gt;state-&gt;event;</div><div class='add'>+</div><div class='add'>+		crtc-&gt;state-&gt;event = NULL;</div><div class='add'>+		spin_lock_irqsave(&amp;crtc-&gt;dev-&gt;event_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (drm_crtc_vblank_get(crtc) != 0)</div><div class='add'>+			drm_crtc_send_vblank_event(crtc, event);</div><div class='add'>+		else</div><div class='add'>+			adp-&gt;event = event;</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;crtc-&gt;dev-&gt;event_lock, flags);</div><div class='ctx'> 	}</div><div class='del'>-	crtc-&gt;state-&gt;event = NULL;</div><div class='del'>-	spin_unlock_irq(&amp;crtc-&gt;dev-&gt;event_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct drm_crtc_funcs adp_crtc_funcs = {</div><div class='hunk'>@@ -482,8 +489,6 @@ static irqreturn_t adp_fe_irq(int irq, void *arg)</div><div class='ctx'> 	u32 int_status;</div><div class='ctx'> 	u32 int_ctl;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;adp-&gt;irq_lock);</div><div class='del'>-</div><div class='ctx'> 	int_status = readl(adp-&gt;fe + ADP_INT_STATUS);</div><div class='ctx'> 	if (int_status &amp; ADP_INT_STATUS_VBLANK) {</div><div class='ctx'> 		drm_crtc_handle_vblank(&amp;adp-&gt;crtc);</div><div class='hunk'>@@ -501,7 +506,6 @@ static irqreturn_t adp_fe_irq(int irq, void *arg)</div><div class='ctx'> </div><div class='ctx'> 	writel(int_status, adp-&gt;fe + ADP_INT_STATUS);</div><div class='ctx'> </div><div class='del'>-	spin_unlock(&amp;adp-&gt;irq_lock);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -512,8 +516,7 @@ static int adp_drm_bind(struct device *dev)</div><div class='ctx'> 	struct adp_drv_private *adp = to_adp(drm);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	adp_disable_vblank(adp);</div><div class='del'>-	writel(ADP_CTRL_FIFO_ON | ADP_CTRL_VBLANK_ON, adp-&gt;fe + ADP_CTRL);</div><div class='add'>+	writel(ADP_CTRL_FIFO_ON, adp-&gt;fe + ADP_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	adp-&gt;next_bridge = drmm_of_get_bridge(&amp;adp-&gt;drm, dev-&gt;of_node, 0, 0);</div><div class='ctx'> 	if (IS_ERR(adp-&gt;next_bridge)) {</div><div class='hunk'>@@ -567,8 +570,6 @@ static int adp_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(adp))</div><div class='ctx'> 		return PTR_ERR(adp);</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;adp-&gt;irq_lock);</div><div class='del'>-</div><div class='ctx'> 	dev_set_drvdata(&amp;pdev-&gt;dev, &amp;adp-&gt;drm);</div><div class='ctx'> </div><div class='ctx'> 	err = adp_parse_of(pdev, adp);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile<br/>index aacc810cabb3..87080c06e5fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/Makefile</a></div><div class='hunk'>@@ -66,7 +66,7 @@ amdgpu-y += amdgpu_device.o amdgpu_doorbell_mgr.o amdgpu_kms.o \</div><div class='ctx'> 	amdgpu_fw_attestation.o amdgpu_securedisplay.o \</div><div class='ctx'> 	amdgpu_eeprom.o amdgpu_mca.o amdgpu_psp_ta.o amdgpu_lsdma.o \</div><div class='ctx'> 	amdgpu_ring_mux.o amdgpu_xcp.o amdgpu_seq64.o amdgpu_aca.o amdgpu_dev_coredump.o \</div><div class='del'>-	amdgpu_cper.o</div><div class='add'>+	amdgpu_cper.o amdgpu_userq_fence.o amdgpu_eviction_fence.o</div><div class='ctx'> </div><div class='ctx'> amdgpu-$(CONFIG_PROC_FS) += amdgpu_fdinfo.o</div><div class='ctx'> </div><div class='hunk'>@@ -174,7 +174,10 @@ amdgpu-y += \</div><div class='ctx'> amdgpu-y += \</div><div class='ctx'> 	amdgpu_mes.o \</div><div class='ctx'> 	mes_v11_0.o \</div><div class='del'>-	mes_v12_0.o</div><div class='add'>+	mes_v12_0.o \</div><div class='add'>+</div><div class='add'>+# add GFX userqueue support</div><div class='add'>+amdgpu-y += mes_userqueue.o</div><div class='ctx'> </div><div class='ctx'> # add UVD block</div><div class='ctx'> amdgpu-y += \</div><div class='hunk'>@@ -253,6 +256,8 @@ amdgpu-y += \</div><div class='ctx'> # add amdkfd interfaces</div><div class='ctx'> amdgpu-y += amdgpu_amdkfd.o</div><div class='ctx'> </div><div class='add'>+# add gfx usermode queue</div><div class='add'>+amdgpu-y += amdgpu_userq.o</div><div class='ctx'> </div><div class='ctx'> ifneq ($(CONFIG_HSA_AMD),)</div><div class='ctx'> AMDKFD_PATH := ../amdkfd</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br/>index 6d83ccfa42ee..836ea081088a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu.h</a></div><div class='hunk'>@@ -113,6 +113,8 @@</div><div class='ctx'> #include "amdgpu_xcp.h"</div><div class='ctx'> #include "amdgpu_seq64.h"</div><div class='ctx'> #include "amdgpu_reg_state.h"</div><div class='add'>+#include "amdgpu_userq.h"</div><div class='add'>+#include "amdgpu_eviction_fence.h"</div><div class='ctx'> #if defined(CONFIG_DRM_AMD_ISP)</div><div class='ctx'> #include "amdgpu_isp.h"</div><div class='ctx'> #endif</div><div class='hunk'>@@ -228,7 +230,7 @@ extern int amdgpu_force_asic_type;</div><div class='ctx'> extern int amdgpu_smartshift_bias;</div><div class='ctx'> extern int amdgpu_use_xgmi_p2p;</div><div class='ctx'> extern int amdgpu_mtype_local;</div><div class='del'>-extern bool enforce_isolation;</div><div class='add'>+extern int amdgpu_enforce_isolation;</div><div class='ctx'> #ifdef CONFIG_HSA_AMD</div><div class='ctx'> extern int sched_policy;</div><div class='ctx'> extern bool debug_evictions;</div><div class='hunk'>@@ -266,8 +268,10 @@ extern int amdgpu_umsch_mm_fwlog;</div><div class='ctx'> </div><div class='ctx'> extern int amdgpu_user_partt_mode;</div><div class='ctx'> extern int amdgpu_agp;</div><div class='add'>+extern int amdgpu_rebar;</div><div class='ctx'> </div><div class='ctx'> extern int amdgpu_wbrf;</div><div class='add'>+extern int amdgpu_user_queue;</div><div class='ctx'> </div><div class='ctx'> #define AMDGPU_VM_MAX_NUM_CTX			4096</div><div class='ctx'> #define AMDGPU_SG_THRESHOLD			(256*1024*1024)</div><div class='hunk'>@@ -353,7 +357,6 @@ enum amdgpu_kiq_irq {</div><div class='ctx'> 	AMDGPU_CP_KIQ_IRQ_DRIVER0 = 0,</div><div class='ctx'> 	AMDGPU_CP_KIQ_IRQ_LAST</div><div class='ctx'> };</div><div class='del'>-#define SRIOV_USEC_TIMEOUT  1200000 /* wait 12 * 100ms for SRIOV */</div><div class='ctx'> #define MAX_KIQ_REG_WAIT       5000 /* in usecs, 5ms */</div><div class='ctx'> #define MAX_KIQ_REG_BAILOUT_INTERVAL   5 /* in msecs, 5ms */</div><div class='ctx'> #define MAX_KIQ_REG_TRY 1000</div><div class='hunk'>@@ -489,7 +492,6 @@ struct amdgpu_flip_work {</div><div class='ctx'> 	bool				async;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * file private structure</div><div class='ctx'>  */</div><div class='hunk'>@@ -502,6 +504,11 @@ struct amdgpu_fpriv {</div><div class='ctx'> 	struct mutex		bo_list_lock;</div><div class='ctx'> 	struct idr		bo_list_handles;</div><div class='ctx'> 	struct amdgpu_ctx_mgr	ctx_mgr;</div><div class='add'>+	struct amdgpu_userq_mgr	userq_mgr;</div><div class='add'>+</div><div class='add'>+	/* Eviction fence infra */</div><div class='add'>+	struct amdgpu_eviction_fence_mgr evf_mgr;</div><div class='add'>+</div><div class='ctx'> 	/** GPU partition selection */</div><div class='ctx'> 	uint32_t		xcp_id;</div><div class='ctx'> };</div><div class='hunk'>@@ -513,12 +520,62 @@ int amdgpu_file_to_fpriv(struct file *filp, struct amdgpu_fpriv **fpriv);</div><div class='ctx'>  */</div><div class='ctx'> #define AMDGPU_MAX_WB 1024	/* Reserve at most 1024 WB slots for amdgpu-owned rings. */</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * amdgpu_wb - This struct is used for small GPU memory allocation.</div><div class='add'>+ *</div><div class='add'>+ * This struct is used to allocate a small amount of GPU memory that can be</div><div class='add'>+ * used to shadow certain states into the memory. This is especially useful for</div><div class='add'>+ * providing easy CPU access to some states without requiring register access</div><div class='add'>+ * (e.g., if some block is power gated, reading register may be problematic).</div><div class='add'>+ *</div><div class='add'>+ * Note: the term writeback was initially used because many of the amdgpu</div><div class='add'>+ * components had some level of writeback memory, and this struct initially</div><div class='add'>+ * described those components.</div><div class='add'>+ */</div><div class='ctx'> struct amdgpu_wb {</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @wb_obj:</div><div class='add'>+	 *</div><div class='add'>+	 * Buffer Object used for the writeback memory.</div><div class='add'>+	 */</div><div class='ctx'> 	struct amdgpu_bo	*wb_obj;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @wb:</div><div class='add'>+	 *</div><div class='add'>+	 * Pointer to the first writeback slot. In terms of CPU address</div><div class='add'>+	 * this value can be accessed directly by using the offset as an index.</div><div class='add'>+	 * For the GPU address, it is necessary to use gpu_addr and the offset.</div><div class='add'>+	 */</div><div class='ctx'> 	volatile uint32_t	*wb;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @gpu_addr:</div><div class='add'>+	 *</div><div class='add'>+	 * Writeback base address in the GPU.</div><div class='add'>+	 */</div><div class='ctx'> 	uint64_t		gpu_addr;</div><div class='del'>-	u32			num_wb;	/* Number of wb slots actually reserved for amdgpu. */</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @num_wb:</div><div class='add'>+	 *</div><div class='add'>+	 * Number of writeback slots reserved for amdgpu.</div><div class='add'>+	 */</div><div class='add'>+	u32			num_wb;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @used:</div><div class='add'>+	 *</div><div class='add'>+	 * Track the writeback slot already used.</div><div class='add'>+	 */</div><div class='ctx'> 	unsigned long		used[DIV_ROUND_UP(AMDGPU_MAX_WB, BITS_PER_LONG)];</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @lock:</div><div class='add'>+	 *</div><div class='add'>+	 * Protects read and write of the used field array.</div><div class='add'>+	 */</div><div class='ctx'> 	spinlock_t		lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -552,6 +609,7 @@ struct amdgpu_allowed_register_entry {</div><div class='ctx'>  *                   are reset depends on the ASIC. Notably doesn't reset IPs</div><div class='ctx'>  *                   shared with the CPU on APUs or the memory controllers (so</div><div class='ctx'>  *                   VRAM is not lost). Not available on all ASICs.</div><div class='add'>+ * @AMD_RESET_LINK: Triggers SW-UP link reset on other GPUs</div><div class='ctx'>  * @AMD_RESET_BACO: BACO (Bus Alive, Chip Off) method powers off and on the card</div><div class='ctx'>  *                  but without powering off the PCI bus. Suitable only for</div><div class='ctx'>  *                  discrete GPUs.</div><div class='hunk'>@@ -569,6 +627,7 @@ enum amd_reset_method {</div><div class='ctx'> 	AMD_RESET_METHOD_MODE0,</div><div class='ctx'> 	AMD_RESET_METHOD_MODE1,</div><div class='ctx'> 	AMD_RESET_METHOD_MODE2,</div><div class='add'>+	AMD_RESET_METHOD_LINK,</div><div class='ctx'> 	AMD_RESET_METHOD_BACO,</div><div class='ctx'> 	AMD_RESET_METHOD_PCI,</div><div class='ctx'> 	AMD_RESET_METHOD_ON_INIT,</div><div class='hunk'>@@ -822,6 +881,11 @@ struct amdgpu_mqd_prop {</div><div class='ctx'> 	uint32_t hqd_queue_priority;</div><div class='ctx'> 	bool allow_tunneling;</div><div class='ctx'> 	bool hqd_active;</div><div class='add'>+	uint64_t shadow_addr;</div><div class='add'>+	uint64_t gds_bkup_addr;</div><div class='add'>+	uint64_t csa_addr;</div><div class='add'>+	uint64_t fence_address;</div><div class='add'>+	bool tmz_queue;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_mqd {</div><div class='hunk'>@@ -830,6 +894,12 @@ struct amdgpu_mqd {</div><div class='ctx'> 			struct amdgpu_mqd_prop *p);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct amdgpu_pcie_reset_ctx {</div><div class='add'>+	bool in_link_reset;</div><div class='add'>+	bool occurs_dpc;</div><div class='add'>+	bool audio_suspended;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Custom Init levels could be defined for different situations where a full</div><div class='ctx'>  * initialization of all hardware blocks are not expected. Sample cases are</div><div class='hunk'>@@ -854,6 +924,14 @@ struct amdgpu_init_level {</div><div class='ctx'> struct amdgpu_reset_domain;</div><div class='ctx'> struct amdgpu_fru_info;</div><div class='ctx'> </div><div class='add'>+enum amdgpu_enforce_isolation_mode {</div><div class='add'>+	AMDGPU_ENFORCE_ISOLATION_DISABLE = 0,</div><div class='add'>+	AMDGPU_ENFORCE_ISOLATION_ENABLE = 1,</div><div class='add'>+	AMDGPU_ENFORCE_ISOLATION_ENABLE_LEGACY = 2,</div><div class='add'>+	AMDGPU_ENFORCE_ISOLATION_NO_CLEANER_SHADER = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * Non-zero (true) if the GPU has VRAM. Zero (false) otherwise.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1082,6 +1160,13 @@ struct amdgpu_device {</div><div class='ctx'> 	bool                            enable_uni_mes;</div><div class='ctx'> 	struct amdgpu_mes               mes;</div><div class='ctx'> 	struct amdgpu_mqd               mqds[AMDGPU_HW_IP_NUM];</div><div class='add'>+	const struct amdgpu_userq_funcs *userq_funcs[AMDGPU_HW_IP_NUM];</div><div class='add'>+</div><div class='add'>+	/* xarray used to retrieve the user queue fence driver reference</div><div class='add'>+	 * in the EOP interrupt handler to signal the particular user</div><div class='add'>+	 * queue fence.</div><div class='add'>+	 */</div><div class='add'>+	struct xarray			userq_xa;</div><div class='ctx'> </div><div class='ctx'> 	/* df */</div><div class='ctx'> 	struct amdgpu_df                df;</div><div class='hunk'>@@ -1124,6 +1209,7 @@ struct amdgpu_device {</div><div class='ctx'> 	bool				in_s3;</div><div class='ctx'> 	bool				in_s4;</div><div class='ctx'> 	bool				in_s0ix;</div><div class='add'>+	suspend_state_t			last_suspend_state;</div><div class='ctx'> </div><div class='ctx'> 	enum pp_mp1_state               mp1_state;</div><div class='ctx'> 	struct amdgpu_doorbell_index doorbell_index;</div><div class='hunk'>@@ -1160,6 +1246,8 @@ struct amdgpu_device {</div><div class='ctx'> 	struct pci_saved_state          *pci_state;</div><div class='ctx'> 	pci_channel_state_t		pci_channel_state;</div><div class='ctx'> </div><div class='add'>+	struct amdgpu_pcie_reset_ctx	pcie_reset_ctx;</div><div class='add'>+</div><div class='ctx'> 	/* Track auto wait count on s_barrier settings */</div><div class='ctx'> 	bool				barrier_has_auto_waitcnt;</div><div class='ctx'> </div><div class='hunk'>@@ -1193,10 +1281,11 @@ struct amdgpu_device {</div><div class='ctx'> 	bool                            debug_enable_ras_aca;</div><div class='ctx'> 	bool                            debug_exp_resets;</div><div class='ctx'> 	bool                            debug_disable_gpu_ring_reset;</div><div class='add'>+	bool                            debug_vm_userptr;</div><div class='ctx'> </div><div class='ctx'> 	/* Protection for the following isolation structure */</div><div class='ctx'> 	struct mutex                    enforce_isolation_mutex;</div><div class='del'>-	bool				enforce_isolation[MAX_XCP];</div><div class='add'>+	enum amdgpu_enforce_isolation_mode	enforce_isolation[MAX_XCP];</div><div class='ctx'> 	struct amdgpu_isolation {</div><div class='ctx'> 		void			*owner;</div><div class='ctx'> 		struct dma_fence	*spearhead;</div><div class='hunk'>@@ -1210,6 +1299,10 @@ struct amdgpu_device {</div><div class='ctx'> 	 * in KFD: VRAM or GTT.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bool                            apu_prefer_gtt;</div><div class='add'>+</div><div class='add'>+	struct list_head		userq_mgr_list;</div><div class='add'>+	struct mutex                    userq_mutex;</div><div class='add'>+	bool                            userq_halt_for_enforce_isolation;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,</div><div class='hunk'>@@ -1464,6 +1557,7 @@ void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,</div><div class='ctx'> 					     const u32 array_size);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_device_mode1_reset(struct amdgpu_device *adev);</div><div class='add'>+int amdgpu_device_link_reset(struct amdgpu_device *adev);</div><div class='ctx'> bool amdgpu_device_supports_atpx(struct drm_device *dev);</div><div class='ctx'> bool amdgpu_device_supports_px(struct drm_device *dev);</div><div class='ctx'> bool amdgpu_device_supports_boco(struct drm_device *dev);</div><div class='hunk'>@@ -1614,11 +1708,9 @@ static inline void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_cap</div><div class='ctx'> #if defined(CONFIG_ACPI) &amp;&amp; defined(CONFIG_SUSPEND)</div><div class='ctx'> bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);</div><div class='ctx'> bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);</div><div class='del'>-void amdgpu_choose_low_power_state(struct amdgpu_device *adev);</div><div class='ctx'> #else</div><div class='ctx'> static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }</div><div class='ctx'> static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }</div><div class='del'>-static inline void amdgpu_choose_low_power_state(struct amdgpu_device *adev) { }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> void amdgpu_register_gpu_instance(struct amdgpu_device *adev);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c<br/>index b4ad163f42a7..3835f2592914 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c</a></div><div class='hunk'>@@ -120,6 +120,9 @@ static void aca_smu_bank_dump(struct amdgpu_device *adev, int idx, int total, st</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(aca_regs); i++)</div><div class='ctx'> 		RAS_EVENT_LOG(adev, event_id, HW_ERR "ACA[%02d/%02d].%s=0x%016llx\n",</div><div class='ctx'> 			      idx + 1, total, aca_regs[i].name, bank-&gt;regs[aca_regs[i].reg_idx]);</div><div class='add'>+</div><div class='add'>+	if (ACA_REG__STATUS__SCRUB(bank-&gt;regs[ACA_REG_IDX_STATUS]))</div><div class='add'>+		RAS_EVENT_LOG(adev, event_id, HW_ERR "hardware error logged by the scrubber\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aca_smu_get_valid_aca_banks(struct amdgpu_device *adev, enum aca_smu_type type,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c<br/>index b7f8f2ff143d..707e131f89d2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c</a></div><div class='hunk'>@@ -1533,22 +1533,4 @@ bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev)</div><div class='ctx'> #endif /* CONFIG_AMD_PMC */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * amdgpu_choose_low_power_state</div><div class='del'>- *</div><div class='del'>- * @adev: amdgpu_device_pointer</div><div class='del'>- *</div><div class='del'>- * Choose the target low power state for the GPU</div><div class='del'>- */</div><div class='del'>-void amdgpu_choose_low_power_state(struct amdgpu_device *adev)</div><div class='del'>-{</div><div class='del'>-	if (adev-&gt;in_runpm)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (amdgpu_acpi_is_s0ix_active(adev))</div><div class='del'>-		adev-&gt;in_s0ix = true;</div><div class='del'>-	else if (amdgpu_acpi_is_s3_active(adev))</div><div class='del'>-		adev-&gt;in_s3 = true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* CONFIG_SUSPEND */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c<br/>index d2ec4130a316..260165bbe373 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c</a></div><div class='hunk'>@@ -2559,6 +2559,18 @@ static int update_invalid_user_pages(struct amdkfd_process_info *process_info,</div><div class='ctx'> 			if (ret != -EFAULT)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='add'>+			/* If applications unmap memory before destroying the userptr</div><div class='add'>+			 * from the KFD, trigger a segmentation fault in VM debug mode.</div><div class='add'>+			 */</div><div class='add'>+			if (amdgpu_ttm_adev(bo-&gt;tbo.bdev)-&gt;debug_vm_userptr) {</div><div class='add'>+				pr_err("Pid %d unmapped memory before destroying userptr at GPU addr 0x%llx\n",</div><div class='add'>+								pid_nr(process_info-&gt;pid), mem-&gt;va);</div><div class='add'>+</div><div class='add'>+				// Send GPU VM fault to user space</div><div class='add'>+				kfd_signal_vm_fault_event_with_userptr(kfd_lookup_process_by_pid(process_info-&gt;pid),</div><div class='add'>+								mem-&gt;va);</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			ret = 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c<br/>index eb015bdda8a7..c7d32fb216e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c</a></div><div class='hunk'>@@ -281,6 +281,9 @@ static int convert_atom_mem_type_to_vram_type(struct amdgpu_device *adev,</div><div class='ctx'> 		case ATOM_DGPU_VRAM_TYPE_GDDR6:</div><div class='ctx'> 			vram_type = AMDGPU_VRAM_TYPE_GDDR6;</div><div class='ctx'> 			break;</div><div class='add'>+		case ATOM_DGPU_VRAM_TYPE_HBM3E:</div><div class='add'>+			vram_type = AMDGPU_VRAM_TYPE_HBM3E;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c<br/>index 68bce6a6d09d..004a6a9d6b9f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c</a></div><div class='hunk'>@@ -252,83 +252,22 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,</div><div class='ctx'> </div><div class='ctx'> 		if (!adev-&gt;pm.fw) {</div><div class='ctx'> 			switch (adev-&gt;asic_type) {</div><div class='del'>-			case CHIP_TAHITI:</div><div class='del'>-				strcpy(fw_name, "radeon/tahiti_smc.bin");</div><div class='del'>-				break;</div><div class='del'>-			case CHIP_PITCAIRN:</div><div class='del'>-				if ((adev-&gt;pdev-&gt;revision == 0x81) &amp;&amp;</div><div class='del'>-				    ((adev-&gt;pdev-&gt;device == 0x6810) ||</div><div class='del'>-				    (adev-&gt;pdev-&gt;device == 0x6811))) {</div><div class='del'>-					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "radeon/pitcairn_k_smc.bin");</div><div class='del'>-				} else {</div><div class='del'>-					strcpy(fw_name, "radeon/pitcairn_smc.bin");</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			case CHIP_VERDE:</div><div class='del'>-				if (((adev-&gt;pdev-&gt;device == 0x6820) &amp;&amp;</div><div class='del'>-					((adev-&gt;pdev-&gt;revision == 0x81) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;revision == 0x83))) ||</div><div class='del'>-				    ((adev-&gt;pdev-&gt;device == 0x6821) &amp;&amp;</div><div class='del'>-					((adev-&gt;pdev-&gt;revision == 0x83) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;revision == 0x87))) ||</div><div class='del'>-				    ((adev-&gt;pdev-&gt;revision == 0x87) &amp;&amp;</div><div class='del'>-					((adev-&gt;pdev-&gt;device == 0x6823) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x682b)))) {</div><div class='del'>-					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "radeon/verde_k_smc.bin");</div><div class='del'>-				} else {</div><div class='del'>-					strcpy(fw_name, "radeon/verde_smc.bin");</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			case CHIP_OLAND:</div><div class='del'>-				if (((adev-&gt;pdev-&gt;revision == 0x81) &amp;&amp;</div><div class='del'>-					((adev-&gt;pdev-&gt;device == 0x6600) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x6604) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x6605) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x6610))) ||</div><div class='del'>-				    ((adev-&gt;pdev-&gt;revision == 0x83) &amp;&amp;</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x6610))) {</div><div class='del'>-					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "radeon/oland_k_smc.bin");</div><div class='del'>-				} else {</div><div class='del'>-					strcpy(fw_name, "radeon/oland_smc.bin");</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			case CHIP_HAINAN:</div><div class='del'>-				if (((adev-&gt;pdev-&gt;revision == 0x81) &amp;&amp;</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x6660)) ||</div><div class='del'>-				    ((adev-&gt;pdev-&gt;revision == 0x83) &amp;&amp;</div><div class='del'>-					((adev-&gt;pdev-&gt;device == 0x6660) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x6663) ||</div><div class='del'>-					(adev-&gt;pdev-&gt;device == 0x6665) ||</div><div class='del'>-					 (adev-&gt;pdev-&gt;device == 0x6667)))) {</div><div class='del'>-					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "radeon/hainan_k_smc.bin");</div><div class='del'>-				} else if ((adev-&gt;pdev-&gt;revision == 0xc3) &amp;&amp;</div><div class='del'>-					 (adev-&gt;pdev-&gt;device == 0x6665)) {</div><div class='del'>-					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "radeon/banks_k_2_smc.bin");</div><div class='del'>-				} else {</div><div class='del'>-					strcpy(fw_name, "radeon/hainan_smc.bin");</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='ctx'> 			case CHIP_BONAIRE:</div><div class='ctx'> 				if ((adev-&gt;pdev-&gt;revision == 0x80) ||</div><div class='ctx'> 					(adev-&gt;pdev-&gt;revision == 0x81) ||</div><div class='ctx'> 					(adev-&gt;pdev-&gt;device == 0x665f)) {</div><div class='ctx'> 					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "amdgpu/bonaire_k_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/bonaire_k_smc.bin");</div><div class='ctx'> 				} else {</div><div class='del'>-					strcpy(fw_name, "amdgpu/bonaire_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/bonaire_smc.bin");</div><div class='ctx'> 				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_HAWAII:</div><div class='ctx'> 				if (adev-&gt;pdev-&gt;revision == 0x80) {</div><div class='ctx'> 					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "amdgpu/hawaii_k_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/hawaii_k_smc.bin");</div><div class='ctx'> 				} else {</div><div class='del'>-					strcpy(fw_name, "amdgpu/hawaii_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/hawaii_smc.bin");</div><div class='ctx'> 				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_TOPAZ:</div><div class='hunk'>@@ -338,76 +277,76 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,</div><div class='ctx'> 				    ((adev-&gt;pdev-&gt;device == 0x6900) &amp;&amp; (adev-&gt;pdev-&gt;revision == 0xD1)) ||</div><div class='ctx'> 				    ((adev-&gt;pdev-&gt;device == 0x6900) &amp;&amp; (adev-&gt;pdev-&gt;revision == 0xD3))) {</div><div class='ctx'> 					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "amdgpu/topaz_k_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/topaz_k_smc.bin");</div><div class='ctx'> 				} else</div><div class='del'>-					strcpy(fw_name, "amdgpu/topaz_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/topaz_smc.bin");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_TONGA:</div><div class='ctx'> 				if (((adev-&gt;pdev-&gt;device == 0x6939) &amp;&amp; (adev-&gt;pdev-&gt;revision == 0xf1)) ||</div><div class='ctx'> 				    ((adev-&gt;pdev-&gt;device == 0x6938) &amp;&amp; (adev-&gt;pdev-&gt;revision == 0xf1))) {</div><div class='ctx'> 					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "amdgpu/tonga_k_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/tonga_k_smc.bin");</div><div class='ctx'> 				} else</div><div class='del'>-					strcpy(fw_name, "amdgpu/tonga_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/tonga_smc.bin");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_FIJI:</div><div class='del'>-				strcpy(fw_name, "amdgpu/fiji_smc.bin");</div><div class='add'>+				strscpy(fw_name, "amdgpu/fiji_smc.bin");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_POLARIS11:</div><div class='ctx'> 				if (type == CGS_UCODE_ID_SMU) {</div><div class='ctx'> 					if (ASICID_IS_P21(adev-&gt;pdev-&gt;device, adev-&gt;pdev-&gt;revision)) {</div><div class='ctx'> 						info-&gt;is_kicker = true;</div><div class='del'>-						strcpy(fw_name, "amdgpu/polaris11_k_smc.bin");</div><div class='add'>+						strscpy(fw_name, "amdgpu/polaris11_k_smc.bin");</div><div class='ctx'> 					} else if (ASICID_IS_P31(adev-&gt;pdev-&gt;device, adev-&gt;pdev-&gt;revision)) {</div><div class='ctx'> 						info-&gt;is_kicker = true;</div><div class='del'>-						strcpy(fw_name, "amdgpu/polaris11_k2_smc.bin");</div><div class='add'>+						strscpy(fw_name, "amdgpu/polaris11_k2_smc.bin");</div><div class='ctx'> 					} else {</div><div class='del'>-						strcpy(fw_name, "amdgpu/polaris11_smc.bin");</div><div class='add'>+						strscpy(fw_name, "amdgpu/polaris11_smc.bin");</div><div class='ctx'> 					}</div><div class='ctx'> 				} else if (type == CGS_UCODE_ID_SMU_SK) {</div><div class='del'>-					strcpy(fw_name, "amdgpu/polaris11_smc_sk.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/polaris11_smc_sk.bin");</div><div class='ctx'> 				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_POLARIS10:</div><div class='ctx'> 				if (type == CGS_UCODE_ID_SMU) {</div><div class='ctx'> 					if (ASICID_IS_P20(adev-&gt;pdev-&gt;device, adev-&gt;pdev-&gt;revision)) {</div><div class='ctx'> 						info-&gt;is_kicker = true;</div><div class='del'>-						strcpy(fw_name, "amdgpu/polaris10_k_smc.bin");</div><div class='add'>+						strscpy(fw_name, "amdgpu/polaris10_k_smc.bin");</div><div class='ctx'> 					} else if (ASICID_IS_P30(adev-&gt;pdev-&gt;device, adev-&gt;pdev-&gt;revision)) {</div><div class='ctx'> 						info-&gt;is_kicker = true;</div><div class='del'>-						strcpy(fw_name, "amdgpu/polaris10_k2_smc.bin");</div><div class='add'>+						strscpy(fw_name, "amdgpu/polaris10_k2_smc.bin");</div><div class='ctx'> 					} else {</div><div class='del'>-						strcpy(fw_name, "amdgpu/polaris10_smc.bin");</div><div class='add'>+						strscpy(fw_name, "amdgpu/polaris10_smc.bin");</div><div class='ctx'> 					}</div><div class='ctx'> 				} else if (type == CGS_UCODE_ID_SMU_SK) {</div><div class='del'>-					strcpy(fw_name, "amdgpu/polaris10_smc_sk.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/polaris10_smc_sk.bin");</div><div class='ctx'> 				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_POLARIS12:</div><div class='ctx'> 				if (ASICID_IS_P23(adev-&gt;pdev-&gt;device, adev-&gt;pdev-&gt;revision)) {</div><div class='ctx'> 					info-&gt;is_kicker = true;</div><div class='del'>-					strcpy(fw_name, "amdgpu/polaris12_k_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/polaris12_k_smc.bin");</div><div class='ctx'> 				} else {</div><div class='del'>-					strcpy(fw_name, "amdgpu/polaris12_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/polaris12_smc.bin");</div><div class='ctx'> 				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_VEGAM:</div><div class='del'>-				strcpy(fw_name, "amdgpu/vegam_smc.bin");</div><div class='add'>+				strscpy(fw_name, "amdgpu/vegam_smc.bin");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_VEGA10:</div><div class='ctx'> 				if ((adev-&gt;pdev-&gt;device == 0x687f) &amp;&amp;</div><div class='ctx'> 					((adev-&gt;pdev-&gt;revision == 0xc0) ||</div><div class='ctx'> 					(adev-&gt;pdev-&gt;revision == 0xc1) ||</div><div class='ctx'> 					(adev-&gt;pdev-&gt;revision == 0xc3)))</div><div class='del'>-					strcpy(fw_name, "amdgpu/vega10_acg_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/vega10_acg_smc.bin");</div><div class='ctx'> 				else</div><div class='del'>-					strcpy(fw_name, "amdgpu/vega10_smc.bin");</div><div class='add'>+					strscpy(fw_name, "amdgpu/vega10_smc.bin");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_VEGA12:</div><div class='del'>-				strcpy(fw_name, "amdgpu/vega12_smc.bin");</div><div class='add'>+				strscpy(fw_name, "amdgpu/vega12_smc.bin");</div><div class='ctx'> 				break;</div><div class='ctx'> 			case CHIP_VEGA20:</div><div class='del'>-				strcpy(fw_name, "amdgpu/vega20_smc.bin");</div><div class='add'>+				strscpy(fw_name, "amdgpu/vega20_smc.bin");</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='ctx'> 				DRM_ERROR("SMC firmware not supported\n");</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c<br/>index 360e07a5c7c1..5a234eadae8b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_cper.c</a></div><div class='hunk'>@@ -549,7 +549,7 @@ int amdgpu_cper_init(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	if (!amdgpu_aca_is_enabled(adev))</div><div class='add'>+	if (!amdgpu_aca_is_enabled(adev) &amp;&amp; !amdgpu_sriov_ras_cper_en(adev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_cper_ring_init(adev);</div><div class='hunk'>@@ -568,7 +568,7 @@ int amdgpu_cper_init(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> int amdgpu_cper_fini(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	if (!amdgpu_aca_is_enabled(adev))</div><div class='add'>+	if (!amdgpu_aca_is_enabled(adev) &amp;&amp; !amdgpu_sriov_ras_cper_en(adev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	adev-&gt;cper.enabled = false;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c<br/>index 82df06a72ee0..9ea0d9b71f48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c</a></div><div class='hunk'>@@ -296,7 +296,25 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p,</div><div class='ctx'> 				       num_ibs[i], &amp;p-&gt;jobs[i]);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto free_all_kdata;</div><div class='del'>-		p-&gt;jobs[i]-&gt;enforce_isolation = p-&gt;adev-&gt;enforce_isolation[fpriv-&gt;xcp_id];</div><div class='add'>+		switch (p-&gt;adev-&gt;enforce_isolation[fpriv-&gt;xcp_id]) {</div><div class='add'>+		case AMDGPU_ENFORCE_ISOLATION_DISABLE:</div><div class='add'>+		default:</div><div class='add'>+			p-&gt;jobs[i]-&gt;enforce_isolation = false;</div><div class='add'>+			p-&gt;jobs[i]-&gt;run_cleaner_shader = false;</div><div class='add'>+			break;</div><div class='add'>+		case AMDGPU_ENFORCE_ISOLATION_ENABLE:</div><div class='add'>+			p-&gt;jobs[i]-&gt;enforce_isolation = true;</div><div class='add'>+			p-&gt;jobs[i]-&gt;run_cleaner_shader = true;</div><div class='add'>+			break;</div><div class='add'>+		case AMDGPU_ENFORCE_ISOLATION_ENABLE_LEGACY:</div><div class='add'>+			p-&gt;jobs[i]-&gt;enforce_isolation = true;</div><div class='add'>+			p-&gt;jobs[i]-&gt;run_cleaner_shader = false;</div><div class='add'>+			break;</div><div class='add'>+		case AMDGPU_ENFORCE_ISOLATION_NO_CLEANER_SHADER:</div><div class='add'>+			p-&gt;jobs[i]-&gt;enforce_isolation = true;</div><div class='add'>+			p-&gt;jobs[i]-&gt;run_cleaner_shader = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	p-&gt;gang_leader = p-&gt;jobs[p-&gt;gang_leader_idx];</div><div class='ctx'> </div><div class='hunk'>@@ -349,6 +367,10 @@ static int amdgpu_cs_p2_ib(struct amdgpu_cs_parser *p,</div><div class='ctx'> 	ring = amdgpu_job_ring(job);</div><div class='ctx'> 	ib = &amp;job-&gt;ibs[job-&gt;num_ibs++];</div><div class='ctx'> </div><div class='add'>+	/* submissions to kernel queues are disabled */</div><div class='add'>+	if (ring-&gt;no_user_submission)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	/* MM engine doesn't support user fences */</div><div class='ctx'> 	if (p-&gt;uf_bo &amp;&amp; ring-&gt;funcs-&gt;no_user_fence)</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c<br/>index cfdf558b48b6..02138aa55793 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c</a></div><div class='hunk'>@@ -109,7 +109,7 @@ int amdgpu_unmap_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> 	struct drm_exec exec;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	drm_exec_init(&amp;exec, DRM_EXEC_INTERRUPTIBLE_WAIT, 0);</div><div class='add'>+	drm_exec_init(&amp;exec, 0, 0);</div><div class='ctx'> 	drm_exec_until_all_locked(&amp;exec) {</div><div class='ctx'> 		r = amdgpu_vm_lock_pd(vm, &amp;exec, 0);</div><div class='ctx'> 		if (likely(!r))</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c<br/>index a1450f13d963..8e626f50b362 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c</a></div><div class='hunk'>@@ -2105,6 +2105,7 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)</div><div class='ctx'> 	amdgpu_rap_debugfs_init(adev);</div><div class='ctx'> 	amdgpu_securedisplay_debugfs_init(adev);</div><div class='ctx'> 	amdgpu_fw_attestation_debugfs_init(adev);</div><div class='add'>+	amdgpu_psp_debugfs_init(adev);</div><div class='ctx'> </div><div class='ctx'> 	debugfs_create_file("amdgpu_evict_vram", 0400, root, adev,</div><div class='ctx'> 			    &amp;amdgpu_evict_vram_fops);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br/>index a30111d2c3ea..4d1b54f58495 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_device.c</a></div><div class='hunk'>@@ -85,6 +85,7 @@</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_X86)</div><div class='ctx'> #include &lt;asm/intel-family.h&gt;</div><div class='add'>+#include &lt;asm/cpu_device_id.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> MODULE_FIRMWARE("amdgpu/vega10_gpu_info.bin");</div><div class='hunk'>@@ -1680,6 +1681,9 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (!amdgpu_rebar)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/* resizing on Dell G5 SE platforms causes problems with runtime pm */</div><div class='ctx'> 	if ((amdgpu_runtime_pm != 0) &amp;&amp;</div><div class='ctx'> 	    adev-&gt;pdev-&gt;vendor == PCI_VENDOR_ID_ATI &amp;&amp;</div><div class='hunk'>@@ -1870,6 +1874,35 @@ static bool amdgpu_device_pcie_dynamic_switching_supported(struct amdgpu_device</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool amdgpu_device_aspm_support_quirk(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_X86)</div><div class='add'>+	struct cpuinfo_x86 *c = &amp;cpu_data(0);</div><div class='add'>+</div><div class='add'>+	if (!(amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 0, 0) ||</div><div class='add'>+		  amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 0, 1)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (c-&gt;x86 == 6 &amp;&amp;</div><div class='add'>+		adev-&gt;pm.pcie_gen_mask &amp; CAIL_PCIE_LINK_SPEED_SUPPORT_GEN5) {</div><div class='add'>+		switch (c-&gt;x86_model) {</div><div class='add'>+		case VFM_MODEL(INTEL_ALDERLAKE):</div><div class='add'>+		case VFM_MODEL(INTEL_ALDERLAKE_L):</div><div class='add'>+		case VFM_MODEL(INTEL_RAPTORLAKE):</div><div class='add'>+		case VFM_MODEL(INTEL_RAPTORLAKE_P):</div><div class='add'>+		case VFM_MODEL(INTEL_RAPTORLAKE_S):</div><div class='add'>+			return true;</div><div class='add'>+		default:</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+#else</div><div class='add'>+	return false;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_device_should_use_aspm - check if the device should program ASPM</div><div class='ctx'>  *</div><div class='hunk'>@@ -1894,7 +1927,7 @@ bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (adev-&gt;flags &amp; AMD_IS_APU)</div><div class='ctx'> 		return false;</div><div class='del'>-	if (!(adev-&gt;pm.pp_feature &amp; PP_PCIE_DPM_MASK))</div><div class='add'>+	if (amdgpu_device_aspm_support_quirk(adev))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return pcie_aspm_enabled(adev-&gt;pdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -2112,8 +2145,31 @@ static int amdgpu_device_check_arguments(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	adev-&gt;firmware.load_type = amdgpu_ucode_get_load_type(adev, amdgpu_fw_load_type);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_XCP; i++)</div><div class='del'>-		adev-&gt;enforce_isolation[i] = !!enforce_isolation;</div><div class='add'>+	for (i = 0; i &lt; MAX_XCP; i++) {</div><div class='add'>+		switch (amdgpu_enforce_isolation) {</div><div class='add'>+		case -1:</div><div class='add'>+		case 0:</div><div class='add'>+		default:</div><div class='add'>+			/* disable */</div><div class='add'>+			adev-&gt;enforce_isolation[i] = AMDGPU_ENFORCE_ISOLATION_DISABLE;</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			/* enable */</div><div class='add'>+			adev-&gt;enforce_isolation[i] =</div><div class='add'>+				AMDGPU_ENFORCE_ISOLATION_ENABLE;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			/* enable legacy mode */</div><div class='add'>+			adev-&gt;enforce_isolation[i] =</div><div class='add'>+				AMDGPU_ENFORCE_ISOLATION_ENABLE_LEGACY;</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			/* enable only process isolation without submitting cleaner shader */</div><div class='add'>+			adev-&gt;enforce_isolation[i] =</div><div class='add'>+				AMDGPU_ENFORCE_ISOLATION_NO_CLEANER_SHADER;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2689,6 +2745,13 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Check for IP version 9.4.3 with A0 hardware */</div><div class='add'>+	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &amp;&amp;</div><div class='add'>+	    !amdgpu_device_get_rev_id(adev)) {</div><div class='add'>+		dev_err(adev-&gt;dev, "Unsupported A0 hardware\n");</div><div class='add'>+		return -ENODEV;	/* device unsupported - no device error */</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (amdgpu_has_atpx() &amp;&amp;</div><div class='ctx'> 	    (amdgpu_is_atpx_hybrid() ||</div><div class='ctx'> 	     amdgpu_has_atpx_dgpu_power_cntl()) &amp;&amp;</div><div class='hunk'>@@ -2701,7 +2764,6 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;has_pr3 = parent ? pci_pr3_present(parent) : false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	adev-&gt;pm.pp_feature = amdgpu_pp_feature_mask;</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev) || sched_policy == KFD_SCHED_POLICY_NO_HWS)</div><div class='ctx'> 		adev-&gt;pm.pp_feature &amp;= ~PP_GFXOFF_MASK;</div><div class='hunk'>@@ -3172,6 +3234,7 @@ static bool amdgpu_device_check_vram_lost(struct amdgpu_device *adev)</div><div class='ctx'> 	 * always assumed to be lost.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (amdgpu_asic_reset_method(adev)) {</div><div class='add'>+	case AMD_RESET_METHOD_LINK:</div><div class='ctx'> 	case AMD_RESET_METHOD_BACO:</div><div class='ctx'> 	case AMD_RESET_METHOD_MODE1:</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -3455,6 +3518,7 @@ static int amdgpu_device_ip_fini_early(struct amdgpu_device *adev)</div><div class='ctx'> 	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_amdkfd_suspend(adev, false);</div><div class='add'>+	amdgpu_userq_suspend(adev);</div><div class='ctx'> </div><div class='ctx'> 	/* Workaround for ASICs need to disable SMC first */</div><div class='ctx'> 	amdgpu_device_smu_fini_early(adev);</div><div class='hunk'>@@ -3510,6 +3574,7 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)</div><div class='ctx'> 			amdgpu_device_mem_scratch_fini(adev);</div><div class='ctx'> 			amdgpu_ib_pool_fini(adev);</div><div class='ctx'> 			amdgpu_seq64_fini(adev);</div><div class='add'>+			amdgpu_doorbell_fini(adev);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (adev-&gt;ip_blocks[i].version-&gt;funcs-&gt;sw_fini) {</div><div class='ctx'> 			r = adev-&gt;ip_blocks[i].version-&gt;funcs-&gt;sw_fini(&amp;adev-&gt;ip_blocks[i]);</div><div class='hunk'>@@ -3643,6 +3708,13 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)</div><div class='ctx'> 			    adev, adev-&gt;ip_blocks[i].version-&gt;type))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		/* Since we skip suspend for S0i3, we need to cancel the delayed</div><div class='add'>+		 * idle work here as the suspend callback never gets called.</div><div class='add'>+		 */</div><div class='add'>+		if (adev-&gt;in_s0ix &amp;&amp;</div><div class='add'>+		    adev-&gt;ip_blocks[i].version-&gt;type == AMD_IP_BLOCK_TYPE_GFX &amp;&amp;</div><div class='add'>+		    amdgpu_ip_version(adev, GC_HWIP, 0) &gt;= IP_VERSION(10, 0, 0))</div><div class='add'>+			cancel_delayed_work_sync(&amp;adev-&gt;gfx.idle_work);</div><div class='ctx'> 		/* skip suspend of gfx/mes and psp for S0ix</div><div class='ctx'> 		 * gfx is in gfxoff state, so on resume it will exit gfxoff just</div><div class='ctx'> 		 * like at runtime. PSP is also part of the always on hardware</div><div class='hunk'>@@ -4299,9 +4371,10 @@ int amdgpu_device_init(struct amdgpu_device *adev,</div><div class='ctx'> 		amdgpu_sync_create(&amp;adev-&gt;isolation[i].active);</div><div class='ctx'> 		amdgpu_sync_create(&amp;adev-&gt;isolation[i].prev);</div><div class='ctx'> 	}</div><div class='del'>-	mutex_init(&amp;adev-&gt;gfx.kfd_sch_mutex);</div><div class='add'>+	mutex_init(&amp;adev-&gt;gfx.userq_sch_mutex);</div><div class='ctx'> 	mutex_init(&amp;adev-&gt;gfx.workload_profile_mutex);</div><div class='ctx'> 	mutex_init(&amp;adev-&gt;vcn.workload_profile_mutex);</div><div class='add'>+	mutex_init(&amp;adev-&gt;userq_mutex);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_device_init_apu_flags(adev);</div><div class='ctx'> </div><div class='hunk'>@@ -4321,12 +4394,16 @@ int amdgpu_device_init(struct amdgpu_device *adev,</div><div class='ctx'> 	spin_lock_init(&amp;adev-&gt;virt.rlcg_reg_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adev-&gt;wb.lock);</div><div class='ctx'> </div><div class='add'>+	xa_init_flags(&amp;adev-&gt;userq_xa, XA_FLAGS_LOCK_IRQ);</div><div class='add'>+</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;adev-&gt;reset_list);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;adev-&gt;ras_list);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;adev-&gt;pm.od_kobj_list);</div><div class='ctx'> </div><div class='add'>+	INIT_LIST_HEAD(&amp;adev-&gt;userq_mgr_list);</div><div class='add'>+</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;adev-&gt;delayed_init_work,</div><div class='ctx'> 			  amdgpu_device_delayed_init_work_handler);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;adev-&gt;gfx.gfx_off_delay_work,</div><div class='hunk'>@@ -4851,7 +4928,6 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 		iounmap(adev-&gt;rmmio);</div><div class='ctx'> 		adev-&gt;rmmio = NULL;</div><div class='del'>-		amdgpu_doorbell_fini(adev);</div><div class='ctx'> 		drm_dev_exit(idx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4900,28 +4976,20 @@ static int amdgpu_device_evict_resources(struct amdgpu_device *adev)</div><div class='ctx'>  * @data: data</div><div class='ctx'>  *</div><div class='ctx'>  * This function is called when the system is about to suspend or hibernate.</div><div class='del'>- * It is used to evict resources from the device before the system goes to</div><div class='del'>- * sleep while there is still access to swap.</div><div class='add'>+ * It is used to set the appropriate flags so that eviction can be optimized</div><div class='add'>+ * in the pm prepare callback.</div><div class='ctx'>  */</div><div class='ctx'> static int amdgpu_device_pm_notifier(struct notifier_block *nb, unsigned long mode,</div><div class='ctx'> 				     void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = container_of(nb, struct amdgpu_device, pm_nb);</div><div class='del'>-	int r;</div><div class='ctx'> </div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case PM_HIBERNATION_PREPARE:</div><div class='ctx'> 		adev-&gt;in_s4 = true;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case PM_SUSPEND_PREPARE:</div><div class='del'>-		r = amdgpu_device_evict_resources(adev);</div><div class='del'>-		/*</div><div class='del'>-		 * This is considered non-fatal at this time because</div><div class='del'>-		 * amdgpu_device_prepare() will also fatally evict resources.</div><div class='del'>-		 * See https://gitlab.freedesktop.org/drm/amd/-/issues/3781</div><div class='del'>-		 */</div><div class='del'>-		if (r)</div><div class='del'>-			drm_warn(adev_to_drm(adev), "Failed to evict resources, freeze active processes if problems occur: %d\n", r);</div><div class='add'>+		break;</div><div class='add'>+	case PM_POST_HIBERNATION:</div><div class='add'>+		adev-&gt;in_s4 = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4942,15 +5010,13 @@ int amdgpu_device_prepare(struct drm_device *dev)</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='ctx'> 	int i, r;</div><div class='ctx'> </div><div class='del'>-	amdgpu_choose_low_power_state(adev);</div><div class='del'>-</div><div class='ctx'> 	if (dev-&gt;switch_power_state == DRM_SWITCH_POWER_OFF)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Evict the majority of BOs before starting suspend sequence */</div><div class='ctx'> 	r = amdgpu_device_evict_resources(adev);</div><div class='ctx'> 	if (r)</div><div class='del'>-		goto unprepare;</div><div class='add'>+		return r;</div><div class='ctx'> </div><div class='ctx'> 	flush_delayed_work(&amp;adev-&gt;gfx.gfx_off_delay_work);</div><div class='ctx'> </div><div class='hunk'>@@ -4961,15 +5027,10 @@ int amdgpu_device_prepare(struct drm_device *dev)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		r = adev-&gt;ip_blocks[i].version-&gt;funcs-&gt;prepare_suspend(&amp;adev-&gt;ip_blocks[i]);</div><div class='ctx'> 		if (r)</div><div class='del'>-			goto unprepare;</div><div class='add'>+			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-unprepare:</div><div class='del'>-	adev-&gt;in_s0ix = adev-&gt;in_s3 = adev-&gt;in_s4 = false;</div><div class='del'>-</div><div class='del'>-	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5011,8 +5072,10 @@ int amdgpu_device_suspend(struct drm_device *dev, bool notify_clients)</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_device_ip_suspend_phase1(adev);</div><div class='ctx'> </div><div class='del'>-	if (!adev-&gt;in_s0ix)</div><div class='add'>+	if (!adev-&gt;in_s0ix) {</div><div class='ctx'> 		amdgpu_amdkfd_suspend(adev, adev-&gt;in_runpm);</div><div class='add'>+		amdgpu_userq_suspend(adev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_device_evict_resources(adev);</div><div class='ctx'> 	if (r)</div><div class='hunk'>@@ -5079,6 +5142,10 @@ int amdgpu_device_resume(struct drm_device *dev, bool notify_clients)</div><div class='ctx'> 		r = amdgpu_amdkfd_resume(adev, adev-&gt;in_runpm);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			goto exit;</div><div class='add'>+</div><div class='add'>+		r = amdgpu_userq_resume(adev);</div><div class='add'>+		if (r)</div><div class='add'>+			goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_device_ip_late_init(adev);</div><div class='hunk'>@@ -5127,9 +5194,6 @@ exit:</div><div class='ctx'> 	}</div><div class='ctx'> 	adev-&gt;in_suspend = false;</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;enable_mes)</div><div class='del'>-		amdgpu_mes_self_test(adev);</div><div class='del'>-</div><div class='ctx'> 	if (amdgpu_acpi_smart_shift_update(dev, AMDGPU_SS_DEV_D0))</div><div class='ctx'> 		DRM_WARN("smart shift update failed\n");</div><div class='ctx'> </div><div class='hunk'>@@ -5510,6 +5574,29 @@ mode1_reset_failed:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int amdgpu_device_link_reset(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	dev_info(adev-&gt;dev, "GPU link reset\n");</div><div class='add'>+</div><div class='add'>+	if (!adev-&gt;pcie_reset_ctx.occurs_dpc)</div><div class='add'>+		ret = amdgpu_dpm_link_reset(adev);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		goto link_reset_failed;</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_psp_wait_for_bootloader(adev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto link_reset_failed;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+link_reset_failed:</div><div class='add'>+	dev_err(adev-&gt;dev, "GPU link reset failed\n");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,</div><div class='ctx'> 				 struct amdgpu_reset_context *reset_context)</div><div class='ctx'> {</div><div class='hunk'>@@ -5814,6 +5901,7 @@ static void amdgpu_device_set_mp1_state(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	switch (amdgpu_asic_reset_method(adev)) {</div><div class='ctx'> 	case AMD_RESET_METHOD_MODE1:</div><div class='add'>+	case AMD_RESET_METHOD_LINK:</div><div class='ctx'> 		adev-&gt;mp1_state = PP_MP1_STATE_SHUTDOWN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMD_RESET_METHOD_MODE2:</div><div class='hunk'>@@ -5930,94 +6018,42 @@ static int amdgpu_device_health_check(struct list_head *device_list_handle)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * amdgpu_device_gpu_recover - reset the asic and recover scheduler</div><div class='del'>- *</div><div class='del'>- * @adev: amdgpu_device pointer</div><div class='del'>- * @job: which job trigger hang</div><div class='del'>- * @reset_context: amdgpu reset context pointer</div><div class='del'>- *</div><div class='del'>- * Attempt to reset the GPU if it has hung (all asics).</div><div class='del'>- * Attempt to do soft-reset or full-reset and reinitialize Asic</div><div class='del'>- * Returns 0 for success or an error on failure.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-int amdgpu_device_gpu_recover(struct amdgpu_device *adev,</div><div class='add'>+static int amdgpu_device_halt_activities(struct amdgpu_device *adev,</div><div class='ctx'> 			      struct amdgpu_job *job,</div><div class='del'>-			      struct amdgpu_reset_context *reset_context)</div><div class='add'>+			      struct amdgpu_reset_context *reset_context,</div><div class='add'>+			      struct list_head *device_list,</div><div class='add'>+			      struct amdgpu_hive_info *hive,</div><div class='add'>+			      bool need_emergency_restart)</div><div class='ctx'> {</div><div class='del'>-	struct list_head device_list, *device_list_handle =  NULL;</div><div class='del'>-	bool job_signaled = false;</div><div class='del'>-	struct amdgpu_hive_info *hive = NULL;</div><div class='add'>+	struct list_head *device_list_handle =  NULL;</div><div class='ctx'> 	struct amdgpu_device *tmp_adev = NULL;</div><div class='ctx'> 	int i, r = 0;</div><div class='del'>-	bool need_emergency_restart = false;</div><div class='del'>-	bool audio_suspended = false;</div><div class='del'>-	int retry_limit = AMDGPU_MAX_RETRY_LIMIT;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If it reaches here because of hang/timeout and a RAS error is</div><div class='del'>-	 * detected at the same time, let RAS recovery take care of it.</div><div class='del'>-	 */</div><div class='del'>-	if (amdgpu_ras_is_err_state(adev, AMDGPU_RAS_BLOCK__ANY) &amp;&amp;</div><div class='del'>-	    !amdgpu_sriov_vf(adev) &amp;&amp;</div><div class='del'>-	    reset_context-&gt;src != AMDGPU_RESET_SRC_RAS) {</div><div class='del'>-		dev_dbg(adev-&gt;dev,</div><div class='del'>-			"Gpu recovery from source: %d yielding to RAS error recovery handling",</div><div class='del'>-			reset_context-&gt;src);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	/*</div><div class='del'>-	 * Special case: RAS triggered and full reset isn't supported</div><div class='del'>-	 */</div><div class='del'>-	need_emergency_restart = amdgpu_ras_need_emergency_restart(adev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Flush RAM to disk so that after reboot</div><div class='del'>-	 * the user can read log and see why the system rebooted.</div><div class='del'>-	 */</div><div class='del'>-	if (need_emergency_restart &amp;&amp; amdgpu_ras_get_context(adev) &amp;&amp;</div><div class='del'>-		amdgpu_ras_get_context(adev)-&gt;reboot) {</div><div class='del'>-		DRM_WARN("Emergency reboot.");</div><div class='del'>-</div><div class='del'>-		ksys_sync_helper();</div><div class='del'>-		emergency_restart();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_info(adev-&gt;dev, "GPU %s begin!\n",</div><div class='del'>-		need_emergency_restart ? "jobs stop":"reset");</div><div class='del'>-</div><div class='del'>-	if (!amdgpu_sriov_vf(adev))</div><div class='del'>-		hive = amdgpu_get_xgmi_hive(adev);</div><div class='del'>-	if (hive)</div><div class='del'>-		mutex_lock(&amp;hive-&gt;hive_lock);</div><div class='ctx'> </div><div class='del'>-	reset_context-&gt;job = job;</div><div class='del'>-	reset_context-&gt;hive = hive;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Build list of devices to reset.</div><div class='ctx'> 	 * In case we are in XGMI hive mode, resort the device list</div><div class='ctx'> 	 * to put adev in the 1st position.</div><div class='ctx'> 	 */</div><div class='del'>-	INIT_LIST_HEAD(&amp;device_list);</div><div class='ctx'> 	if (!amdgpu_sriov_vf(adev) &amp;&amp; (adev-&gt;gmc.xgmi.num_physical_nodes &gt; 1) &amp;&amp; hive) {</div><div class='ctx'> 		list_for_each_entry(tmp_adev, &amp;hive-&gt;device_list, gmc.xgmi.head) {</div><div class='del'>-			list_add_tail(&amp;tmp_adev-&gt;reset_list, &amp;device_list);</div><div class='add'>+			list_add_tail(&amp;tmp_adev-&gt;reset_list, device_list);</div><div class='ctx'> 			if (adev-&gt;shutdown)</div><div class='ctx'> 				tmp_adev-&gt;shutdown = true;</div><div class='add'>+			if (adev-&gt;pcie_reset_ctx.occurs_dpc)</div><div class='add'>+				tmp_adev-&gt;pcie_reset_ctx.in_link_reset = true;</div><div class='ctx'> 		}</div><div class='del'>-		if (!list_is_first(&amp;adev-&gt;reset_list, &amp;device_list))</div><div class='del'>-			list_rotate_to_front(&amp;adev-&gt;reset_list, &amp;device_list);</div><div class='del'>-		device_list_handle = &amp;device_list;</div><div class='add'>+		if (!list_is_first(&amp;adev-&gt;reset_list, device_list))</div><div class='add'>+			list_rotate_to_front(&amp;adev-&gt;reset_list, device_list);</div><div class='add'>+		device_list_handle = device_list;</div><div class='ctx'> 	} else {</div><div class='del'>-		list_add_tail(&amp;adev-&gt;reset_list, &amp;device_list);</div><div class='del'>-		device_list_handle = &amp;device_list;</div><div class='add'>+		list_add_tail(&amp;adev-&gt;reset_list, device_list);</div><div class='add'>+		device_list_handle = device_list;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!amdgpu_sriov_vf(adev)) {</div><div class='add'>+	if (!amdgpu_sriov_vf(adev) &amp;&amp; (!adev-&gt;pcie_reset_ctx.occurs_dpc)) {</div><div class='ctx'> 		r = amdgpu_device_health_check(device_list_handle);</div><div class='ctx'> 		if (r)</div><div class='del'>-			goto end_reset;</div><div class='add'>+			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* We need to lock reset domain only once both for XGMI and single device */</div><div class='hunk'>@@ -6041,7 +6077,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,</div><div class='ctx'> 		 * some audio codec errors.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!amdgpu_device_suspend_display_audio(tmp_adev))</div><div class='del'>-			audio_suspended = true;</div><div class='add'>+			tmp_adev-&gt;pcie_reset_ctx.audio_suspended = true;</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_ras_set_error_query_ready(tmp_adev, false);</div><div class='ctx'> </div><div class='hunk'>@@ -6059,6 +6095,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 		/* disable ras on ALL IPs */</div><div class='ctx'> 		if (!need_emergency_restart &amp;&amp;</div><div class='add'>+		      (!adev-&gt;pcie_reset_ctx.occurs_dpc) &amp;&amp;</div><div class='ctx'> 		      amdgpu_device_ip_need_full_reset(tmp_adev))</div><div class='ctx'> 			amdgpu_ras_suspend(tmp_adev);</div><div class='ctx'> </div><div class='hunk'>@@ -6076,24 +6113,24 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,</div><div class='ctx'> 		atomic_inc(&amp;tmp_adev-&gt;gpu_reset_counter);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (need_emergency_restart)</div><div class='del'>-		goto skip_sched_resume;</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Must check guilty signal here since after this point all old</div><div class='del'>-	 * HW fences are force signaled.</div><div class='del'>-	 *</div><div class='del'>-	 * job-&gt;base holds a reference to parent fence</div><div class='del'>-	 */</div><div class='del'>-	if (job &amp;&amp; dma_fence_is_signaled(&amp;job-&gt;hw_fence)) {</div><div class='del'>-		job_signaled = true;</div><div class='del'>-		dev_info(adev-&gt;dev, "Guilty job already signaled, skipping HW reset");</div><div class='del'>-		goto skip_hw_reset;</div><div class='del'>-	}</div><div class='add'>+static int amdgpu_device_asic_reset(struct amdgpu_device *adev,</div><div class='add'>+			      struct list_head *device_list,</div><div class='add'>+			      struct amdgpu_reset_context *reset_context)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *tmp_adev = NULL;</div><div class='add'>+	int retry_limit = AMDGPU_MAX_RETRY_LIMIT;</div><div class='add'>+	int r = 0;</div><div class='ctx'> </div><div class='ctx'> retry:	/* Rest of adevs pre asic reset from XGMI hive. */</div><div class='del'>-	list_for_each_entry(tmp_adev, device_list_handle, reset_list) {</div><div class='add'>+	list_for_each_entry(tmp_adev, device_list, reset_list) {</div><div class='add'>+		if (adev-&gt;pcie_reset_ctx.occurs_dpc)</div><div class='add'>+			tmp_adev-&gt;no_hw_access = true;</div><div class='ctx'> 		r = amdgpu_device_pre_asic_reset(tmp_adev, reset_context);</div><div class='add'>+		if (adev-&gt;pcie_reset_ctx.occurs_dpc)</div><div class='add'>+			tmp_adev-&gt;no_hw_access = false;</div><div class='ctx'> 		/*TODO Should we stop ?*/</div><div class='ctx'> 		if (r) {</div><div class='ctx'> 			dev_err(tmp_adev-&gt;dev, "GPU pre asic reset failed with err, %d for drm dev, %s ",</div><div class='hunk'>@@ -6105,6 +6142,11 @@ retry:	/* Rest of adevs pre asic reset from XGMI hive. */</div><div class='ctx'> 	/* Actual ASIC resets if needed.*/</div><div class='ctx'> 	/* Host driver will handle XGMI hive reset for SRIOV */</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev)) {</div><div class='add'>+</div><div class='add'>+		/* Bail out of reset early */</div><div class='add'>+		if (amdgpu_ras_is_rma(adev))</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 		if (amdgpu_ras_get_fed_status(adev) || amdgpu_virt_rcvd_ras_interrupt(adev)) {</div><div class='ctx'> 			dev_dbg(adev-&gt;dev, "Detected RAS error, wait for FLR completion\n");</div><div class='ctx'> 			amdgpu_ras_set_fed(adev, true);</div><div class='hunk'>@@ -6119,12 +6161,12 @@ retry:	/* Rest of adevs pre asic reset from XGMI hive. */</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			adev-&gt;asic_reset_res = r;</div><div class='ctx'> 	} else {</div><div class='del'>-		r = amdgpu_do_asic_reset(device_list_handle, reset_context);</div><div class='add'>+		r = amdgpu_do_asic_reset(device_list, reset_context);</div><div class='ctx'> 		if (r &amp;&amp; r == -EAGAIN)</div><div class='ctx'> 			goto retry;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(tmp_adev, device_list_handle, reset_list) {</div><div class='add'>+	list_for_each_entry(tmp_adev, device_list, reset_list) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Drop any pending non scheduler resets queued before reset is done.</div><div class='ctx'> 		 * Any reset scheduled after this point would be valid. Scheduler resets</div><div class='hunk'>@@ -6134,10 +6176,18 @@ retry:	/* Rest of adevs pre asic reset from XGMI hive. */</div><div class='ctx'> 		amdgpu_device_stop_pending_resets(tmp_adev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-skip_hw_reset:</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_device_sched_resume(struct list_head *device_list,</div><div class='add'>+			      struct amdgpu_reset_context *reset_context,</div><div class='add'>+			      bool   job_signaled)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *tmp_adev = NULL;</div><div class='add'>+	int i, r = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Post ASIC reset for all devs .*/</div><div class='del'>-	list_for_each_entry(tmp_adev, device_list_handle, reset_list) {</div><div class='add'>+	list_for_each_entry(tmp_adev, device_list, reset_list) {</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; AMDGPU_MAX_RINGS; ++i) {</div><div class='ctx'> 			struct amdgpu_ring *ring = tmp_adev-&gt;rings[i];</div><div class='hunk'>@@ -6173,8 +6223,16 @@ skip_hw_reset:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-skip_sched_resume:</div><div class='del'>-	list_for_each_entry(tmp_adev, device_list_handle, reset_list) {</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_device_gpu_resume(struct amdgpu_device *adev,</div><div class='add'>+			      struct list_head *device_list,</div><div class='add'>+			      bool   need_emergency_restart)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *tmp_adev = NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(tmp_adev, device_list, reset_list) {</div><div class='ctx'> 		/* unlock kfd: SRIOV would do it separately */</div><div class='ctx'> 		if (!need_emergency_restart &amp;&amp; !amdgpu_sriov_vf(tmp_adev))</div><div class='ctx'> 			amdgpu_amdkfd_post_reset(tmp_adev);</div><div class='hunk'>@@ -6185,18 +6243,114 @@ skip_sched_resume:</div><div class='ctx'> 		if (!adev-&gt;kfd.init_complete)</div><div class='ctx'> 			amdgpu_amdkfd_device_init(adev);</div><div class='ctx'> </div><div class='del'>-		if (audio_suspended)</div><div class='add'>+		if (tmp_adev-&gt;pcie_reset_ctx.audio_suspended)</div><div class='ctx'> 			amdgpu_device_resume_display_audio(tmp_adev);</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_device_unset_mp1_state(tmp_adev);</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_ras_set_error_query_ready(tmp_adev, true);</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tmp_adev = list_first_entry(device_list_handle, struct amdgpu_device,</div><div class='add'>+	tmp_adev = list_first_entry(device_list, struct amdgpu_device,</div><div class='ctx'> 					    reset_list);</div><div class='ctx'> 	amdgpu_device_unlock_reset_domain(tmp_adev-&gt;reset_domain);</div><div class='ctx'> </div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * amdgpu_device_gpu_recover - reset the asic and recover scheduler</div><div class='add'>+ *</div><div class='add'>+ * @adev: amdgpu_device pointer</div><div class='add'>+ * @job: which job trigger hang</div><div class='add'>+ * @reset_context: amdgpu reset context pointer</div><div class='add'>+ *</div><div class='add'>+ * Attempt to reset the GPU if it has hung (all asics).</div><div class='add'>+ * Attempt to do soft-reset or full-reset and reinitialize Asic</div><div class='add'>+ * Returns 0 for success or an error on failure.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int amdgpu_device_gpu_recover(struct amdgpu_device *adev,</div><div class='add'>+			      struct amdgpu_job *job,</div><div class='add'>+			      struct amdgpu_reset_context *reset_context)</div><div class='add'>+{</div><div class='add'>+	struct list_head device_list;</div><div class='add'>+	bool job_signaled = false;</div><div class='add'>+	struct amdgpu_hive_info *hive = NULL;</div><div class='add'>+	int r = 0;</div><div class='add'>+	bool need_emergency_restart = false;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If it reaches here because of hang/timeout and a RAS error is</div><div class='add'>+	 * detected at the same time, let RAS recovery take care of it.</div><div class='add'>+	 */</div><div class='add'>+	if (amdgpu_ras_is_err_state(adev, AMDGPU_RAS_BLOCK__ANY) &amp;&amp;</div><div class='add'>+	    !amdgpu_sriov_vf(adev) &amp;&amp;</div><div class='add'>+	    reset_context-&gt;src != AMDGPU_RESET_SRC_RAS) {</div><div class='add'>+		dev_dbg(adev-&gt;dev,</div><div class='add'>+			"Gpu recovery from source: %d yielding to RAS error recovery handling",</div><div class='add'>+			reset_context-&gt;src);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Special case: RAS triggered and full reset isn't supported</div><div class='add'>+	 */</div><div class='add'>+	need_emergency_restart = amdgpu_ras_need_emergency_restart(adev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Flush RAM to disk so that after reboot</div><div class='add'>+	 * the user can read log and see why the system rebooted.</div><div class='add'>+	 */</div><div class='add'>+	if (need_emergency_restart &amp;&amp; amdgpu_ras_get_context(adev) &amp;&amp;</div><div class='add'>+		amdgpu_ras_get_context(adev)-&gt;reboot) {</div><div class='add'>+		DRM_WARN("Emergency reboot.");</div><div class='add'>+</div><div class='add'>+		ksys_sync_helper();</div><div class='add'>+		emergency_restart();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(adev-&gt;dev, "GPU %s begin!\n",</div><div class='add'>+		need_emergency_restart ? "jobs stop":"reset");</div><div class='add'>+</div><div class='add'>+	if (!amdgpu_sriov_vf(adev))</div><div class='add'>+		hive = amdgpu_get_xgmi_hive(adev);</div><div class='add'>+	if (hive)</div><div class='add'>+		mutex_lock(&amp;hive-&gt;hive_lock);</div><div class='add'>+</div><div class='add'>+	reset_context-&gt;job = job;</div><div class='add'>+	reset_context-&gt;hive = hive;</div><div class='add'>+	INIT_LIST_HEAD(&amp;device_list);</div><div class='add'>+</div><div class='add'>+	r = amdgpu_device_halt_activities(adev, job, reset_context, &amp;device_list,</div><div class='add'>+					 hive, need_emergency_restart);</div><div class='add'>+	if (r)</div><div class='add'>+		goto end_reset;</div><div class='add'>+</div><div class='add'>+	if (need_emergency_restart)</div><div class='add'>+		goto skip_sched_resume;</div><div class='add'>+	/*</div><div class='add'>+	 * Must check guilty signal here since after this point all old</div><div class='add'>+	 * HW fences are force signaled.</div><div class='add'>+	 *</div><div class='add'>+	 * job-&gt;base holds a reference to parent fence</div><div class='add'>+	 */</div><div class='add'>+	if (job &amp;&amp; dma_fence_is_signaled(&amp;job-&gt;hw_fence)) {</div><div class='add'>+		job_signaled = true;</div><div class='add'>+		dev_info(adev-&gt;dev, "Guilty job already signaled, skipping HW reset");</div><div class='add'>+		goto skip_hw_reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_device_asic_reset(adev, &amp;device_list, reset_context);</div><div class='add'>+	if (r)</div><div class='add'>+		goto end_reset;</div><div class='add'>+skip_hw_reset:</div><div class='add'>+	r = amdgpu_device_sched_resume(&amp;device_list, reset_context, job_signaled);</div><div class='add'>+	if (r)</div><div class='add'>+		goto end_reset;</div><div class='add'>+skip_sched_resume:</div><div class='add'>+	amdgpu_device_gpu_resume(adev, &amp;device_list, need_emergency_restart);</div><div class='ctx'> end_reset:</div><div class='ctx'> 	if (hive) {</div><div class='ctx'> 		mutex_unlock(&amp;hive-&gt;hive_lock);</div><div class='hunk'>@@ -6580,12 +6734,15 @@ pci_ers_result_t amdgpu_pci_error_detected(struct pci_dev *pdev, pci_channel_sta</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='del'>-	int i;</div><div class='add'>+	struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev);</div><div class='add'>+	struct amdgpu_reset_context reset_context;</div><div class='add'>+	struct list_head device_list;</div><div class='add'>+	int r = 0;</div><div class='ctx'> </div><div class='del'>-	DRM_INFO("PCI error: detected callback, state(%d)!!\n", state);</div><div class='add'>+	dev_info(adev-&gt;dev, "PCI error: detected callback!!\n");</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;gmc.xgmi.num_physical_nodes &gt; 1) {</div><div class='del'>-		DRM_WARN("No support for XGMI hive yet...");</div><div class='add'>+	if (!amdgpu_dpm_is_link_reset_supported(adev)) {</div><div class='add'>+		dev_warn(adev-&gt;dev, "No support for XGMI hive yet...\n");</div><div class='ctx'> 		return PCI_ERS_RESULT_DISCONNECT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6593,32 +6750,30 @@ pci_ers_result_t amdgpu_pci_error_detected(struct pci_dev *pdev, pci_channel_sta</div><div class='ctx'> </div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case pci_channel_io_normal:</div><div class='add'>+		dev_info(adev-&gt;dev, "pci_channel_io_normal: state(%d)!!\n", state);</div><div class='ctx'> 		return PCI_ERS_RESULT_CAN_RECOVER;</div><div class='del'>-	/* Fatal error, prepare for slot reset */</div><div class='ctx'> 	case pci_channel_io_frozen:</div><div class='del'>-		/*</div><div class='del'>-		 * Locking adev-&gt;reset_domain-&gt;sem will prevent any external access</div><div class='del'>-		 * to GPU during PCI error recovery</div><div class='del'>-		 */</div><div class='del'>-		amdgpu_device_lock_reset_domain(adev-&gt;reset_domain);</div><div class='del'>-		amdgpu_device_set_mp1_state(adev);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Block any work scheduling as we do for regular GPU reset</div><div class='del'>-		 * for the duration of the recovery</div><div class='del'>-		 */</div><div class='del'>-		for (i = 0; i &lt; AMDGPU_MAX_RINGS; ++i) {</div><div class='del'>-			struct amdgpu_ring *ring = adev-&gt;rings[i];</div><div class='del'>-</div><div class='del'>-			if (!amdgpu_ring_sched_ready(ring))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			drm_sched_stop(&amp;ring-&gt;sched, NULL);</div><div class='add'>+		/* Fatal error, prepare for slot reset */</div><div class='add'>+		dev_info(adev-&gt;dev, "pci_channel_io_frozen: state(%d)!!\n", state);</div><div class='add'>+</div><div class='add'>+		if (hive)</div><div class='add'>+			mutex_lock(&amp;hive-&gt;hive_lock);</div><div class='add'>+		adev-&gt;pcie_reset_ctx.occurs_dpc = true;</div><div class='add'>+		memset(&amp;reset_context, 0, sizeof(reset_context));</div><div class='add'>+		INIT_LIST_HEAD(&amp;device_list);</div><div class='add'>+</div><div class='add'>+		r = amdgpu_device_halt_activities(adev, NULL, &amp;reset_context, &amp;device_list,</div><div class='add'>+					 hive, false);</div><div class='add'>+		if (hive) {</div><div class='add'>+			mutex_unlock(&amp;hive-&gt;hive_lock);</div><div class='add'>+			amdgpu_put_xgmi_hive(hive);</div><div class='ctx'> 		}</div><div class='del'>-		atomic_inc(&amp;adev-&gt;gpu_reset_counter);</div><div class='add'>+		if (r)</div><div class='add'>+			return PCI_ERS_RESULT_DISCONNECT;</div><div class='ctx'> 		return PCI_ERS_RESULT_NEED_RESET;</div><div class='ctx'> 	case pci_channel_io_perm_failure:</div><div class='ctx'> 		/* Permanent error, prepare for device removal */</div><div class='add'>+		dev_info(adev-&gt;dev, "pci_channel_io_perm_failure: state(%d)!!\n", state);</div><div class='ctx'> 		return PCI_ERS_RESULT_DISCONNECT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6631,8 +6786,10 @@ pci_ers_result_t amdgpu_pci_error_detected(struct pci_dev *pdev, pci_channel_sta</div><div class='ctx'>  */</div><div class='ctx'> pci_ers_result_t amdgpu_pci_mmio_enabled(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='ctx'> </div><div class='del'>-	DRM_INFO("PCI error: mmio enabled callback!!\n");</div><div class='add'>+	dev_info(adev-&gt;dev, "PCI error: mmio enabled callback!!\n");</div><div class='ctx'> </div><div class='ctx'> 	/* TODO - dump whatever for debugging purposes */</div><div class='ctx'> </div><div class='hunk'>@@ -6656,10 +6813,12 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='del'>-	int r, i;</div><div class='ctx'> 	struct amdgpu_reset_context reset_context;</div><div class='del'>-	u32 memsize;</div><div class='add'>+	struct amdgpu_device *tmp_adev;</div><div class='add'>+	struct amdgpu_hive_info *hive;</div><div class='ctx'> 	struct list_head device_list;</div><div class='add'>+	int r = 0, i;</div><div class='add'>+	u32 memsize;</div><div class='ctx'> </div><div class='ctx'> 	/* PCI error slot reset should be skipped During RAS recovery */</div><div class='ctx'> 	if ((amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) ||</div><div class='hunk'>@@ -6667,15 +6826,12 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	    amdgpu_ras_in_recovery(adev))</div><div class='ctx'> 		return PCI_ERS_RESULT_RECOVERED;</div><div class='ctx'> </div><div class='del'>-	DRM_INFO("PCI error: slot reset callback!!\n");</div><div class='add'>+	dev_info(adev-&gt;dev, "PCI error: slot reset callback!!\n");</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;reset_context, 0, sizeof(reset_context));</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;device_list);</div><div class='del'>-	list_add_tail(&amp;adev-&gt;reset_list, &amp;device_list);</div><div class='del'>-</div><div class='ctx'> 	/* wait for asic to come out of reset */</div><div class='del'>-	msleep(500);</div><div class='add'>+	msleep(700);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore PCI confspace */</div><div class='ctx'> 	amdgpu_device_load_pci_state(pdev);</div><div class='hunk'>@@ -6696,26 +6852,40 @@ pci_ers_result_t amdgpu_pci_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	reset_context.method = AMD_RESET_METHOD_NONE;</div><div class='ctx'> 	reset_context.reset_req_dev = adev;</div><div class='ctx'> 	set_bit(AMDGPU_NEED_FULL_RESET, &amp;reset_context.flags);</div><div class='del'>-	set_bit(AMDGPU_SKIP_HW_RESET, &amp;reset_context.flags);</div><div class='del'>-</div><div class='del'>-	adev-&gt;no_hw_access = true;</div><div class='del'>-	r = amdgpu_device_pre_asic_reset(adev, &amp;reset_context);</div><div class='del'>-	adev-&gt;no_hw_access = false;</div><div class='del'>-	if (r)</div><div class='del'>-		goto out;</div><div class='add'>+	set_bit(AMDGPU_SKIP_COREDUMP, &amp;reset_context.flags);</div><div class='add'>+	INIT_LIST_HEAD(&amp;device_list);</div><div class='ctx'> </div><div class='del'>-	r = amdgpu_do_asic_reset(&amp;device_list, &amp;reset_context);</div><div class='add'>+	hive = amdgpu_get_xgmi_hive(adev);</div><div class='add'>+	if (hive) {</div><div class='add'>+		mutex_lock(&amp;hive-&gt;hive_lock);</div><div class='add'>+		reset_context.hive = hive;</div><div class='add'>+		list_for_each_entry(tmp_adev, &amp;hive-&gt;device_list, gmc.xgmi.head) {</div><div class='add'>+			tmp_adev-&gt;pcie_reset_ctx.in_link_reset = true;</div><div class='add'>+			list_add_tail(&amp;tmp_adev-&gt;reset_list, &amp;device_list);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		set_bit(AMDGPU_SKIP_HW_RESET, &amp;reset_context.flags);</div><div class='add'>+		list_add_tail(&amp;adev-&gt;reset_list, &amp;device_list);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	r = amdgpu_device_asic_reset(adev, &amp;device_list, &amp;reset_context);</div><div class='ctx'> out:</div><div class='ctx'> 	if (!r) {</div><div class='ctx'> 		if (amdgpu_device_cache_pci_state(adev-&gt;pdev))</div><div class='ctx'> 			pci_restore_state(adev-&gt;pdev);</div><div class='del'>-</div><div class='del'>-		DRM_INFO("PCIe error recovery succeeded\n");</div><div class='add'>+		dev_info(adev-&gt;dev, "PCIe error recovery succeeded\n");</div><div class='ctx'> 	} else {</div><div class='del'>-		DRM_ERROR("PCIe error recovery failed, err:%d", r);</div><div class='del'>-		amdgpu_device_unset_mp1_state(adev);</div><div class='del'>-		amdgpu_device_unlock_reset_domain(adev-&gt;reset_domain);</div><div class='add'>+		dev_err(adev-&gt;dev, "PCIe error recovery failed, err:%d\n", r);</div><div class='add'>+		if (hive) {</div><div class='add'>+			list_for_each_entry(tmp_adev, &amp;device_list, reset_list)</div><div class='add'>+				amdgpu_device_unset_mp1_state(tmp_adev);</div><div class='add'>+			amdgpu_device_unlock_reset_domain(adev-&gt;reset_domain);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hive) {</div><div class='add'>+		mutex_unlock(&amp;hive-&gt;hive_lock);</div><div class='add'>+		amdgpu_put_xgmi_hive(hive);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return r ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED;</div><div class='hunk'>@@ -6732,26 +6902,36 @@ void amdgpu_pci_resume(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='add'>+	struct list_head device_list;</div><div class='add'>+	struct amdgpu_hive_info *hive = NULL;</div><div class='add'>+	struct amdgpu_device *tmp_adev = NULL;</div><div class='ctx'> </div><div class='del'>-	DRM_INFO("PCI error: resume callback!!\n");</div><div class='add'>+	dev_info(adev-&gt;dev, "PCI error: resume callback!!\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Only continue execution for the case of pci_channel_io_frozen */</div><div class='ctx'> 	if (adev-&gt;pci_channel_state != pci_channel_io_frozen)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; AMDGPU_MAX_RINGS; ++i) {</div><div class='del'>-		struct amdgpu_ring *ring = adev-&gt;rings[i];</div><div class='add'>+	INIT_LIST_HEAD(&amp;device_list);</div><div class='ctx'> </div><div class='del'>-		if (!amdgpu_ring_sched_ready(ring))</div><div class='del'>-			continue;</div><div class='add'>+	hive = amdgpu_get_xgmi_hive(adev);</div><div class='add'>+	if (hive) {</div><div class='add'>+		mutex_lock(&amp;hive-&gt;hive_lock);</div><div class='add'>+		list_for_each_entry(tmp_adev, &amp;hive-&gt;device_list, gmc.xgmi.head) {</div><div class='add'>+			tmp_adev-&gt;pcie_reset_ctx.in_link_reset = false;</div><div class='add'>+			list_add_tail(&amp;tmp_adev-&gt;reset_list, &amp;device_list);</div><div class='add'>+		}</div><div class='add'>+	} else</div><div class='add'>+		list_add_tail(&amp;adev-&gt;reset_list, &amp;device_list);</div><div class='ctx'> </div><div class='del'>-		drm_sched_start(&amp;ring-&gt;sched, 0);</div><div class='del'>-	}</div><div class='add'>+	amdgpu_device_sched_resume(&amp;device_list, NULL, NULL);</div><div class='add'>+	amdgpu_device_gpu_resume(adev, &amp;device_list, false);</div><div class='add'>+	adev-&gt;pcie_reset_ctx.occurs_dpc = false;</div><div class='ctx'> </div><div class='del'>-	amdgpu_device_unset_mp1_state(adev);</div><div class='del'>-	amdgpu_device_unlock_reset_domain(adev-&gt;reset_domain);</div><div class='add'>+	if (hive) {</div><div class='add'>+		mutex_unlock(&amp;hive-&gt;hive_lock);</div><div class='add'>+		amdgpu_put_xgmi_hive(hive);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool amdgpu_device_cache_pci_state(struct pci_dev *pdev)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br/>index dc2713ec95a5..9e738fae2b74 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c</a></div><div class='hunk'>@@ -120,6 +120,8 @@ MODULE_FIRMWARE("amdgpu/vega20_ip_discovery.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/raven_ip_discovery.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/raven2_ip_discovery.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/picasso_ip_discovery.bin");</div><div class='add'>+MODULE_FIRMWARE("amdgpu/arcturus_ip_discovery.bin");</div><div class='add'>+MODULE_FIRMWARE("amdgpu/aldebaran_ip_discovery.bin");</div><div class='ctx'> </div><div class='ctx'> #define mmIP_DISCOVERY_VERSION  0x16A00</div><div class='ctx'> #define mmRCC_CONFIG_MEMSIZE	0xde3</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c<br/>index 9f627caedc3f..44e120f9f764 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c</a></div><div class='hunk'>@@ -43,6 +43,29 @@</div><div class='ctx'> #include &lt;linux/dma-fence-array.h&gt;</div><div class='ctx'> #include &lt;linux/pci-p2pdma.h&gt;</div><div class='ctx'> </div><div class='add'>+static const struct dma_buf_attach_ops amdgpu_dma_buf_attach_ops;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dma_buf_attach_adev - Helper to get adev of an attachment</div><div class='add'>+ *</div><div class='add'>+ * @attach: attachment</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * A struct amdgpu_device * if the attaching device is an amdgpu device or</div><div class='add'>+ * partition, NULL otherwise.</div><div class='add'>+ */</div><div class='add'>+static struct amdgpu_device *dma_buf_attach_adev(struct dma_buf_attachment *attach)</div><div class='add'>+{</div><div class='add'>+	if (attach-&gt;importer_ops == &amp;amdgpu_dma_buf_attach_ops) {</div><div class='add'>+		struct drm_gem_object *obj = attach-&gt;importer_priv;</div><div class='add'>+		struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);</div><div class='add'>+</div><div class='add'>+		return amdgpu_ttm_adev(bo-&gt;tbo.bdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_dma_buf_attach - &amp;dma_buf_ops.attach implementation</div><div class='ctx'>  *</div><div class='hunk'>@@ -54,11 +77,13 @@</div><div class='ctx'> static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,</div><div class='ctx'> 				 struct dma_buf_attachment *attach)</div><div class='ctx'> {</div><div class='add'>+	struct amdgpu_device *attach_adev = dma_buf_attach_adev(attach);</div><div class='ctx'> 	struct drm_gem_object *obj = dmabuf-&gt;priv;</div><div class='ctx'> 	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);</div><div class='ctx'> 	struct amdgpu_device *adev = amdgpu_ttm_adev(bo-&gt;tbo.bdev);</div><div class='ctx'> </div><div class='del'>-	if (pci_p2pdma_distance(adev-&gt;pdev, attach-&gt;dev, false) &lt; 0)</div><div class='add'>+	if (!amdgpu_dmabuf_is_xgmi_accessible(attach_adev, bo) &amp;&amp;</div><div class='add'>+	    pci_p2pdma_distance(adev-&gt;pdev, attach-&gt;dev, false) &lt; 0)</div><div class='ctx'> 		attach-&gt;peer2peer = false;</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_vm_bo_update_shared(bo);</div><div class='hunk'>@@ -75,11 +100,35 @@ static int amdgpu_dma_buf_attach(struct dma_buf *dmabuf,</div><div class='ctx'>  */</div><div class='ctx'> static int amdgpu_dma_buf_pin(struct dma_buf_attachment *attach)</div><div class='ctx'> {</div><div class='del'>-	struct drm_gem_object *obj = attach-&gt;dmabuf-&gt;priv;</div><div class='del'>-	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);</div><div class='add'>+	struct dma_buf *dmabuf = attach-&gt;dmabuf;</div><div class='add'>+	struct amdgpu_bo *bo = gem_to_amdgpu_bo(dmabuf-&gt;priv);</div><div class='add'>+	u32 domains = bo-&gt;allowed_domains;</div><div class='add'>+</div><div class='add'>+	dma_resv_assert_held(dmabuf-&gt;resv);</div><div class='add'>+</div><div class='add'>+	/* Try pinning into VRAM to allow P2P with RDMA NICs without ODP</div><div class='add'>+	 * support if all attachments can do P2P. If any attachment can't do</div><div class='add'>+	 * P2P just pin into GTT instead.</div><div class='add'>+	 *</div><div class='add'>+	 * To avoid with conflicting pinnings between GPUs and RDMA when move</div><div class='add'>+	 * notifiers are disabled, only allow pinning in VRAM when move</div><div class='add'>+	 * notiers are enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (!IS_ENABLED(CONFIG_DMABUF_MOVE_NOTIFY)) {</div><div class='add'>+		domains &amp;= ~AMDGPU_GEM_DOMAIN_VRAM;</div><div class='add'>+	} else {</div><div class='add'>+		list_for_each_entry(attach, &amp;dmabuf-&gt;attachments, node)</div><div class='add'>+			if (!attach-&gt;peer2peer)</div><div class='add'>+				domains &amp;= ~AMDGPU_GEM_DOMAIN_VRAM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* pin buffer into GTT */</div><div class='del'>-	return amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT);</div><div class='add'>+	if (domains &amp; AMDGPU_GEM_DOMAIN_VRAM)</div><div class='add'>+		bo-&gt;flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!domains))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return amdgpu_bo_pin(bo, domains);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -134,9 +183,6 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,</div><div class='ctx'> 		r = ttm_bo_validate(&amp;bo-&gt;tbo, &amp;bo-&gt;placement, &amp;ctx);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return ERR_PTR(r);</div><div class='del'>-</div><div class='del'>-	} else if (bo-&gt;tbo.resource-&gt;mem_type != TTM_PL_TT) {</div><div class='del'>-		return ERR_PTR(-EBUSY);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (bo-&gt;tbo.resource-&gt;mem_type) {</div><div class='hunk'>@@ -153,6 +199,11 @@ static struct sg_table *amdgpu_dma_buf_map(struct dma_buf_attachment *attach,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TTM_PL_VRAM:</div><div class='add'>+		/* XGMI-accessible memory should never be DMA-mapped */</div><div class='add'>+		if (WARN_ON(amdgpu_dmabuf_is_xgmi_accessible(</div><div class='add'>+				dma_buf_attach_adev(attach), bo)))</div><div class='add'>+			return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='ctx'> 		r = amdgpu_vram_mgr_alloc_sgt(adev, bo-&gt;tbo.resource, 0,</div><div class='ctx'> 					      bo-&gt;tbo.base.size, attach-&gt;dev,</div><div class='ctx'> 					      dir, &amp;sgt);</div><div class='hunk'>@@ -184,7 +235,7 @@ static void amdgpu_dma_buf_unmap(struct dma_buf_attachment *attach,</div><div class='ctx'> 				 struct sg_table *sgt,</div><div class='ctx'> 				 enum dma_data_direction dir)</div><div class='ctx'> {</div><div class='del'>-	if (sgt-&gt;sgl-&gt;page_link) {</div><div class='add'>+	if (sg_page(sgt-&gt;sgl)) {</div><div class='ctx'> 		dma_unmap_sgtable(attach-&gt;dev, sgt, dir, 0);</div><div class='ctx'> 		sg_free_table(sgt);</div><div class='ctx'> 		kfree(sgt);</div><div class='hunk'>@@ -459,6 +510,9 @@ bool amdgpu_dmabuf_is_xgmi_accessible(struct amdgpu_device *adev,</div><div class='ctx'> 	struct drm_gem_object *obj = &amp;bo-&gt;tbo.base;</div><div class='ctx'> 	struct drm_gem_object *gobj;</div><div class='ctx'> </div><div class='add'>+	if (!adev)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='ctx'> 	if (obj-&gt;import_attach) {</div><div class='ctx'> 		struct dma_buf *dma_buf = obj-&gt;import_attach-&gt;dmabuf;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br/>index 26bf896f1444..4ddd08ce8885 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c</a></div><div class='hunk'>@@ -51,6 +51,8 @@</div><div class='ctx'> #include "amdgpu_reset.h"</div><div class='ctx'> #include "amdgpu_sched.h"</div><div class='ctx'> #include "amdgpu_xgmi.h"</div><div class='add'>+#include "amdgpu_userq.h"</div><div class='add'>+#include "amdgpu_userq_fence.h"</div><div class='ctx'> #include "../amdxcp/amdgpu_xcp_drv.h"</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -123,9 +125,10 @@</div><div class='ctx'>  * - 3.61.0 - Contains fix for RV/PCO compute queues</div><div class='ctx'>  * - 3.62.0 - Add AMDGPU_IDS_FLAGS_MODE_PF, AMDGPU_IDS_FLAGS_MODE_VF &amp; AMDGPU_IDS_FLAGS_MODE_PT</div><div class='ctx'>  * - 3.63.0 - GFX12 display DCC supports 256B max compressed block size</div><div class='add'>+ * - 3.64.0 - Userq IP support query</div><div class='ctx'>  */</div><div class='ctx'> #define KMS_DRIVER_MAJOR	3</div><div class='del'>-#define KMS_DRIVER_MINOR	63</div><div class='add'>+#define KMS_DRIVER_MINOR	64</div><div class='ctx'> #define KMS_DRIVER_PATCHLEVEL	0</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -140,6 +143,7 @@ enum AMDGPU_DEBUG_MASK {</div><div class='ctx'> 	AMDGPU_DEBUG_ENABLE_EXP_RESETS = BIT(5),</div><div class='ctx'> 	AMDGPU_DEBUG_DISABLE_GPU_RING_RESET = BIT(6),</div><div class='ctx'> 	AMDGPU_DEBUG_SMU_POOL = BIT(7),</div><div class='add'>+	AMDGPU_DEBUG_VM_USERPTR = BIT(8),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> unsigned int amdgpu_vram_limit = UINT_MAX;</div><div class='hunk'>@@ -176,7 +180,7 @@ uint amdgpu_pg_mask = 0xffffffff;</div><div class='ctx'> uint amdgpu_sdma_phase_quantum = 32;</div><div class='ctx'> char *amdgpu_disable_cu;</div><div class='ctx'> char *amdgpu_virtual_display;</div><div class='del'>-bool enforce_isolation;</div><div class='add'>+int amdgpu_enforce_isolation = -1;</div><div class='ctx'> int amdgpu_modeset = -1;</div><div class='ctx'> </div><div class='ctx'> /* Specifies the default granularity for SVM, used in buffer</div><div class='hunk'>@@ -238,6 +242,8 @@ int amdgpu_agp = -1; /* auto */</div><div class='ctx'> int amdgpu_wbrf = -1;</div><div class='ctx'> int amdgpu_damage_clips = -1; /* auto */</div><div class='ctx'> int amdgpu_umsch_mm_fwlog;</div><div class='add'>+int amdgpu_rebar = -1; /* auto */</div><div class='add'>+int amdgpu_user_queue = -1;</div><div class='ctx'> </div><div class='ctx'> DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,</div><div class='ctx'> 			"DRM_UT_CORE",</div><div class='hunk'>@@ -1033,11 +1039,13 @@ module_param_named(user_partt_mode, amdgpu_user_partt_mode, uint, 0444);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * DOC: enforce_isolation (bool)</div><div class='del'>- * enforce process isolation between graphics and compute via using the same reserved vmid.</div><div class='add'>+ * DOC: enforce_isolation (int)</div><div class='add'>+ * enforce process isolation between graphics and compute.</div><div class='add'>+ * (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)</div><div class='ctx'>  */</div><div class='del'>-module_param(enforce_isolation, bool, 0444);</div><div class='del'>-MODULE_PARM_DESC(enforce_isolation, "enforce process isolation between graphics and compute . enforce_isolation = on");</div><div class='add'>+module_param_named(enforce_isolation, amdgpu_enforce_isolation, int, 0444);</div><div class='add'>+MODULE_PARM_DESC(enforce_isolation,</div><div class='add'>+"enforce process isolation between graphics and compute. (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * DOC: modeset (int)</div><div class='hunk'>@@ -1096,6 +1104,28 @@ MODULE_PARM_DESC(wbrf,</div><div class='ctx'> 	"Enable Wifi RFI interference mitigation (0 = disabled, 1 = enabled, -1 = auto(default)");</div><div class='ctx'> module_param_named(wbrf, amdgpu_wbrf, int, 0444);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * DOC: rebar (int)</div><div class='add'>+ * Allow BAR resizing.  Disable this to prevent the driver from attempting</div><div class='add'>+ * to resize the BAR if the GPU supports it and there is available MMIO space.</div><div class='add'>+ * Note that this just prevents the driver from resizing the BAR.  The BIOS</div><div class='add'>+ * may have already resized the BAR at boot time.</div><div class='add'>+ */</div><div class='add'>+MODULE_PARM_DESC(rebar, "Resizable BAR (-1 = auto (default), 0 = disable, 1 = enable)");</div><div class='add'>+module_param_named(rebar, amdgpu_rebar, int, 0444);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: user_queue (int)</div><div class='add'>+ * Enable user queues on systems that support user queues. Possible values:</div><div class='add'>+ *</div><div class='add'>+ * - -1 = auto (ASIC specific default)</div><div class='add'>+ * -  0 = user queues disabled</div><div class='add'>+ * -  1 = user queues enabled and kernel queues enabled (if supported)</div><div class='add'>+ * -  2 = user queues enabled and kernel queues disabled</div><div class='add'>+ */</div><div class='add'>+MODULE_PARM_DESC(user_queue, "Enable user queues (-1 = auto (default), 0 = disable, 1 = enable, 2 = enable UQs and disable KQs)");</div><div class='add'>+module_param_named(user_queue, amdgpu_user_queue, int, 0444);</div><div class='add'>+</div><div class='ctx'> /* These devices are not supported by amdgpu.</div><div class='ctx'>  * They are supported by the mach64, r128, radeon drivers</div><div class='ctx'>  */</div><div class='hunk'>@@ -2244,6 +2274,10 @@ static void amdgpu_init_debug_options(struct amdgpu_device *adev)</div><div class='ctx'> 		pr_info("debug: use vram for smu pool\n");</div><div class='ctx'> 		adev-&gt;pm.smu_debug_mask |= SMU_DEBUG_POOL_USE_VRAM;</div><div class='ctx'> 	}</div><div class='add'>+	if (amdgpu_debug_mask &amp; AMDGPU_DEBUG_VM_USERPTR) {</div><div class='add'>+		pr_info("debug: VM mode debug for userptr is enabled\n");</div><div class='add'>+		adev-&gt;debug_vm_userptr = true;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned long amdgpu_fix_asic_type(struct pci_dev *pdev, unsigned long flags)</div><div class='hunk'>@@ -2548,8 +2582,20 @@ static int amdgpu_pmops_suspend(struct device *dev)</div><div class='ctx'> 		adev-&gt;in_s0ix = true;</div><div class='ctx'> 	else if (amdgpu_acpi_is_s3_active(adev))</div><div class='ctx'> 		adev-&gt;in_s3 = true;</div><div class='del'>-	if (!adev-&gt;in_s0ix &amp;&amp; !adev-&gt;in_s3)</div><div class='add'>+	if (!adev-&gt;in_s0ix &amp;&amp; !adev-&gt;in_s3) {</div><div class='add'>+		/* don't allow going deep first time followed by s2idle the next time */</div><div class='add'>+		if (adev-&gt;last_suspend_state != PM_SUSPEND_ON &amp;&amp;</div><div class='add'>+		    adev-&gt;last_suspend_state != pm_suspend_target_state) {</div><div class='add'>+			drm_err_once(drm_dev, "Unsupported suspend state %d\n",</div><div class='add'>+				     pm_suspend_target_state);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* cache the state last used for suspend */</div><div class='add'>+	adev-&gt;last_suspend_state = pm_suspend_target_state;</div><div class='add'>+</div><div class='ctx'> 	return amdgpu_device_suspend(drm_dev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2603,13 +2649,8 @@ static int amdgpu_pmops_freeze(struct device *dev)</div><div class='ctx'> static int amdgpu_pmops_thaw(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *drm_dev = dev_get_drvdata(dev);</div><div class='del'>-	struct amdgpu_device *adev = drm_to_adev(drm_dev);</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	r = amdgpu_device_resume(drm_dev, true);</div><div class='del'>-	adev-&gt;in_s4 = false;</div><div class='ctx'> </div><div class='del'>-	return r;</div><div class='add'>+	return amdgpu_device_resume(drm_dev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amdgpu_pmops_poweroff(struct device *dev)</div><div class='hunk'>@@ -2622,9 +2663,6 @@ static int amdgpu_pmops_poweroff(struct device *dev)</div><div class='ctx'> static int amdgpu_pmops_restore(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_device *drm_dev = dev_get_drvdata(dev);</div><div class='del'>-	struct amdgpu_device *adev = drm_to_adev(drm_dev);</div><div class='del'>-</div><div class='del'>-	adev-&gt;in_s4 = false;</div><div class='ctx'> </div><div class='ctx'> 	return amdgpu_device_resume(drm_dev, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -2696,6 +2734,29 @@ static int amdgpu_runtime_idle_check_display(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int amdgpu_runtime_idle_check_userq(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct drm_device *drm_dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct amdgpu_device *adev = drm_to_adev(drm_dev);</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_userq_mgr *uqm, *tmp;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	list_for_each_entry_safe(uqm, tmp, &amp;adev-&gt;userq_mgr_list, list) {</div><div class='add'>+		idr_for_each_entry(&amp;uqm-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+done:</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int amdgpu_pmops_runtime_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='hunk'>@@ -2711,6 +2772,9 @@ static int amdgpu_pmops_runtime_suspend(struct device *dev)</div><div class='ctx'> 	ret = amdgpu_runtime_idle_check_display(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+	ret = amdgpu_runtime_idle_check_userq(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* wait for all rings to drain before suspending */</div><div class='ctx'> 	for (i = 0; i &lt; AMDGPU_MAX_RINGS; i++) {</div><div class='hunk'>@@ -2832,12 +2896,30 @@ static int amdgpu_pmops_runtime_idle(struct device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = amdgpu_runtime_idle_check_display(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto done;</div><div class='ctx'> </div><div class='add'>+	ret = amdgpu_runtime_idle_check_userq(dev);</div><div class='add'>+done:</div><div class='ctx'> 	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_autosuspend(dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int amdgpu_drm_release(struct inode *inode, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	struct drm_file *file_priv = filp-&gt;private_data;</div><div class='add'>+	struct amdgpu_fpriv *fpriv = file_priv-&gt;driver_priv;</div><div class='add'>+</div><div class='add'>+	if (fpriv) {</div><div class='add'>+		fpriv-&gt;evf_mgr.fd_closing = true;</div><div class='add'>+		amdgpu_userq_mgr_fini(&amp;fpriv-&gt;userq_mgr);</div><div class='add'>+		amdgpu_eviction_fence_destroy(&amp;fpriv-&gt;evf_mgr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return drm_release(inode, filp);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> long amdgpu_drm_ioctl(struct file *filp,</div><div class='ctx'> 		      unsigned int cmd, unsigned long arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -2889,7 +2971,7 @@ static const struct file_operations amdgpu_driver_kms_fops = {</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> 	.open = drm_open,</div><div class='ctx'> 	.flush = amdgpu_flush,</div><div class='del'>-	.release = drm_release,</div><div class='add'>+	.release = amdgpu_drm_release,</div><div class='ctx'> 	.unlocked_ioctl = amdgpu_drm_ioctl,</div><div class='ctx'> 	.mmap = drm_gem_mmap,</div><div class='ctx'> 	.poll = drm_poll,</div><div class='hunk'>@@ -2936,6 +3018,9 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(AMDGPU_GEM_VA, amdgpu_gem_va_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),</div><div class='ctx'> 	DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(AMDGPU_USERQ, amdgpu_userq_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_SIGNAL, amdgpu_userq_signal_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),</div><div class='add'>+	DRM_IOCTL_DEF_DRV(AMDGPU_USERQ_WAIT, amdgpu_userq_wait_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct drm_driver amdgpu_kms_driver = {</div><div class='hunk'>@@ -3026,6 +3111,10 @@ static int __init amdgpu_init(void)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		goto error_fence;</div><div class='ctx'> </div><div class='add'>+	r = amdgpu_userq_fence_slab_init();</div><div class='add'>+	if (r)</div><div class='add'>+		goto error_fence;</div><div class='add'>+</div><div class='ctx'> 	DRM_INFO("amdgpu kernel modesetting enabled.\n");</div><div class='ctx'> 	amdgpu_register_atpx_handler();</div><div class='ctx'> 	amdgpu_acpi_detect();</div><div class='hunk'>@@ -3057,6 +3146,7 @@ static void __exit amdgpu_exit(void)</div><div class='ctx'> 	amdgpu_acpi_release();</div><div class='ctx'> 	amdgpu_sync_fini();</div><div class='ctx'> 	amdgpu_fence_slab_fini();</div><div class='add'>+	amdgpu_userq_fence_slab_fini();</div><div class='ctx'> 	mmu_notifier_synchronize();</div><div class='ctx'> 	amdgpu_xcp_drv_release();</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c<br/>new file mode 100644<br/>index 000000000000..73b629b5f56f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.c</a></div><div class='hunk'>@@ -0,0 +1,233 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;drm/drm_exec.h&gt;</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+</div><div class='add'>+#define work_to_evf_mgr(w, name) container_of(w, struct amdgpu_eviction_fence_mgr, name)</div><div class='add'>+#define evf_mgr_to_fpriv(e) container_of(e, struct amdgpu_fpriv, evf_mgr)</div><div class='add'>+</div><div class='add'>+static const char *</div><div class='add'>+amdgpu_eviction_fence_get_driver_name(struct dma_fence *fence)</div><div class='add'>+{</div><div class='add'>+	return "amdgpu_eviction_fence";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *</div><div class='add'>+amdgpu_eviction_fence_get_timeline_name(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence *ef;</div><div class='add'>+</div><div class='add'>+	ef = container_of(f, struct amdgpu_eviction_fence, base);</div><div class='add'>+	return ef-&gt;timeline_name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+amdgpu_eviction_fence_replace_fence(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+				    struct drm_exec *exec)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence *old_ef, *new_ef;</div><div class='add'>+	struct drm_gem_object *obj;</div><div class='add'>+	unsigned long index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (evf_mgr-&gt;ev_fence &amp;&amp;</div><div class='add'>+	    !dma_fence_is_signaled(&amp;evf_mgr-&gt;ev_fence-&gt;base))</div><div class='add'>+		return 0;</div><div class='add'>+	/*</div><div class='add'>+	 * Steps to replace eviction fence:</div><div class='add'>+	 * * lock all objects in exec (caller)</div><div class='add'>+	 * * create a new eviction fence</div><div class='add'>+	 * * update new eviction fence in evf_mgr</div><div class='add'>+	 * * attach the new eviction fence to BOs</div><div class='add'>+	 * * release the old fence</div><div class='add'>+	 * * unlock the objects (caller)</div><div class='add'>+	 */</div><div class='add'>+	new_ef = amdgpu_eviction_fence_create(evf_mgr);</div><div class='add'>+	if (!new_ef) {</div><div class='add'>+		DRM_ERROR("Failed to create new eviction fence\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update the eviction fence now */</div><div class='add'>+	spin_lock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+	old_ef = evf_mgr-&gt;ev_fence;</div><div class='add'>+	evf_mgr-&gt;ev_fence = new_ef;</div><div class='add'>+	spin_unlock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+</div><div class='add'>+	/* Attach the new fence */</div><div class='add'>+	drm_exec_for_each_locked_object(exec, index, obj) {</div><div class='add'>+		struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);</div><div class='add'>+</div><div class='add'>+		if (!bo)</div><div class='add'>+			continue;</div><div class='add'>+		ret = amdgpu_eviction_fence_attach(evf_mgr, bo);</div><div class='add'>+		if (ret) {</div><div class='add'>+			DRM_ERROR("Failed to attch new eviction fence\n");</div><div class='add'>+			goto free_err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Free old fence */</div><div class='add'>+	if (old_ef)</div><div class='add'>+		dma_fence_put(&amp;old_ef-&gt;base);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_err:</div><div class='add'>+	kfree(new_ef);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+amdgpu_eviction_fence_suspend_worker(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence_mgr *evf_mgr = work_to_evf_mgr(work, suspend_work.work);</div><div class='add'>+	struct amdgpu_fpriv *fpriv = evf_mgr_to_fpriv(evf_mgr);</div><div class='add'>+	struct amdgpu_userq_mgr *uq_mgr = &amp;fpriv-&gt;userq_mgr;</div><div class='add'>+	struct amdgpu_eviction_fence *ev_fence;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+	ev_fence = evf_mgr-&gt;ev_fence;</div><div class='add'>+	if (!ev_fence)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	amdgpu_userq_evict(uq_mgr, ev_fence);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amdgpu_eviction_fence_enable_signaling(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence_mgr *evf_mgr;</div><div class='add'>+	struct amdgpu_eviction_fence *ev_fence;</div><div class='add'>+</div><div class='add'>+	if (!f)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	ev_fence = to_ev_fence(f);</div><div class='add'>+	evf_mgr = ev_fence-&gt;evf_mgr;</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;evf_mgr-&gt;suspend_work, 0);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dma_fence_ops amdgpu_eviction_fence_ops = {</div><div class='add'>+	.use_64bit_seqno = true,</div><div class='add'>+	.get_driver_name = amdgpu_eviction_fence_get_driver_name,</div><div class='add'>+	.get_timeline_name = amdgpu_eviction_fence_get_timeline_name,</div><div class='add'>+	.enable_signaling = amdgpu_eviction_fence_enable_signaling,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void amdgpu_eviction_fence_signal(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+				  struct amdgpu_eviction_fence *ev_fence)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+	dma_fence_signal(&amp;ev_fence-&gt;base);</div><div class='add'>+	spin_unlock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct amdgpu_eviction_fence *</div><div class='add'>+amdgpu_eviction_fence_create(struct amdgpu_eviction_fence_mgr *evf_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence *ev_fence;</div><div class='add'>+</div><div class='add'>+	ev_fence = kzalloc(sizeof(*ev_fence), GFP_KERNEL);</div><div class='add'>+	if (!ev_fence)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ev_fence-&gt;evf_mgr = evf_mgr;</div><div class='add'>+	get_task_comm(ev_fence-&gt;timeline_name, current);</div><div class='add'>+	spin_lock_init(&amp;ev_fence-&gt;lock);</div><div class='add'>+	dma_fence_init(&amp;ev_fence-&gt;base, &amp;amdgpu_eviction_fence_ops,</div><div class='add'>+		       &amp;ev_fence-&gt;lock, evf_mgr-&gt;ev_fence_ctx,</div><div class='add'>+		       atomic_inc_return(&amp;evf_mgr-&gt;ev_fence_seq));</div><div class='add'>+	return ev_fence;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_eviction_fence_destroy(struct amdgpu_eviction_fence_mgr *evf_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence *ev_fence;</div><div class='add'>+</div><div class='add'>+	/* Wait for any pending work to execute */</div><div class='add'>+	flush_delayed_work(&amp;evf_mgr-&gt;suspend_work);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+	ev_fence = evf_mgr-&gt;ev_fence;</div><div class='add'>+	spin_unlock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+</div><div class='add'>+	if (!ev_fence)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dma_fence_wait(&amp;ev_fence-&gt;base, false);</div><div class='add'>+</div><div class='add'>+	/* Last unref of ev_fence */</div><div class='add'>+	dma_fence_put(&amp;ev_fence-&gt;base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_eviction_fence_attach(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+				 struct amdgpu_bo *bo)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence *ev_fence;</div><div class='add'>+	struct dma_resv *resv = bo-&gt;tbo.base.resv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!resv)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = dma_resv_reserve_fences(resv, 1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_DEBUG_DRIVER("Failed to resv fence space\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+	ev_fence = evf_mgr-&gt;ev_fence;</div><div class='add'>+	if (ev_fence)</div><div class='add'>+		dma_resv_add_fence(resv, &amp;ev_fence-&gt;base, DMA_RESV_USAGE_BOOKKEEP);</div><div class='add'>+	spin_unlock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_eviction_fence_detach(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+				  struct amdgpu_bo *bo)</div><div class='add'>+{</div><div class='add'>+	struct dma_fence *stub = dma_fence_get_stub();</div><div class='add'>+</div><div class='add'>+	dma_resv_replace_fences(bo-&gt;tbo.base.resv, evf_mgr-&gt;ev_fence_ctx,</div><div class='add'>+				stub, DMA_RESV_USAGE_BOOKKEEP);</div><div class='add'>+	dma_fence_put(stub);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_eviction_fence_init(struct amdgpu_eviction_fence_mgr *evf_mgr)</div><div class='add'>+{</div><div class='add'>+	/* This needs to be done one time per open */</div><div class='add'>+	atomic_set(&amp;evf_mgr-&gt;ev_fence_seq, 0);</div><div class='add'>+	evf_mgr-&gt;ev_fence_ctx = dma_fence_context_alloc(1);</div><div class='add'>+	spin_lock_init(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;evf_mgr-&gt;suspend_work, amdgpu_eviction_fence_suspend_worker);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.h<br/>new file mode 100644<br/>index 000000000000..fcd867b7147d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_eviction_fence.h</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AMDGPU_EV_FENCE_H_</div><div class='add'>+#define AMDGPU_EV_FENCE_H_</div><div class='add'>+</div><div class='add'>+struct amdgpu_eviction_fence {</div><div class='add'>+	struct dma_fence base;</div><div class='add'>+	spinlock_t	 lock;</div><div class='add'>+	char		 timeline_name[TASK_COMM_LEN];</div><div class='add'>+	struct amdgpu_eviction_fence_mgr *evf_mgr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct amdgpu_eviction_fence_mgr {</div><div class='add'>+	u64			ev_fence_ctx;</div><div class='add'>+	atomic_t		ev_fence_seq;</div><div class='add'>+	spinlock_t		ev_fence_lock;</div><div class='add'>+	struct amdgpu_eviction_fence *ev_fence;</div><div class='add'>+	struct delayed_work	suspend_work;</div><div class='add'>+	uint8_t fd_closing;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Eviction fence helper functions */</div><div class='add'>+struct amdgpu_eviction_fence *</div><div class='add'>+amdgpu_eviction_fence_create(struct amdgpu_eviction_fence_mgr *evf_mgr);</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+amdgpu_eviction_fence_destroy(struct amdgpu_eviction_fence_mgr *evf_mgr);</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+amdgpu_eviction_fence_attach(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+			     struct amdgpu_bo *bo);</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+amdgpu_eviction_fence_detach(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+			     struct amdgpu_bo *bo);</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+amdgpu_eviction_fence_init(struct amdgpu_eviction_fence_mgr *evf_mgr);</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+amdgpu_eviction_fence_signal(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+			     struct amdgpu_eviction_fence *ev_fence);</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+amdgpu_eviction_fence_replace_fence(struct amdgpu_eviction_fence_mgr *evf_mgr,</div><div class='add'>+				    struct drm_exec *exec);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c<br/>index 69429df09477..2c68118fe9fd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;drm/drm_exec.h&gt;</div><div class='ctx'> #include &lt;drm/drm_gem_ttm_helper.h&gt;</div><div class='ctx'> #include &lt;drm/ttm/ttm_tt.h&gt;</div><div class='add'>+#include &lt;drm/drm_syncobj.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "amdgpu_display.h"</div><div class='hunk'>@@ -44,6 +45,114 @@</div><div class='ctx'> #include "amdgpu_xgmi.h"</div><div class='ctx'> #include "amdgpu_vm.h"</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+amdgpu_gem_add_input_fence(struct drm_file *filp,</div><div class='add'>+			   uint64_t syncobj_handles_array,</div><div class='add'>+			   uint32_t num_syncobj_handles)</div><div class='add'>+{</div><div class='add'>+	struct dma_fence *fence;</div><div class='add'>+	uint32_t *syncobj_handles;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	if (!num_syncobj_handles)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	syncobj_handles = memdup_user(u64_to_user_ptr(syncobj_handles_array),</div><div class='add'>+				      sizeof(uint32_t) * num_syncobj_handles);</div><div class='add'>+	if (IS_ERR(syncobj_handles))</div><div class='add'>+		return PTR_ERR(syncobj_handles);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_syncobj_handles; i++) {</div><div class='add'>+</div><div class='add'>+		if (!syncobj_handles[i]) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto free_memdup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = drm_syncobj_find_fence(filp, syncobj_handles[i], 0, 0, &amp;fence);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto free_memdup;</div><div class='add'>+</div><div class='add'>+		dma_fence_wait(fence, false);</div><div class='add'>+</div><div class='add'>+		/* TODO: optimize async handling */</div><div class='add'>+		dma_fence_put(fence);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+free_memdup:</div><div class='add'>+	kfree(syncobj_handles);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_gem_update_timeline_node(struct drm_file *filp,</div><div class='add'>+				uint32_t syncobj_handle,</div><div class='add'>+				uint64_t point,</div><div class='add'>+				struct drm_syncobj **syncobj,</div><div class='add'>+				struct dma_fence_chain **chain)</div><div class='add'>+{</div><div class='add'>+	if (!syncobj_handle)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Find the sync object */</div><div class='add'>+	*syncobj = drm_syncobj_find(filp, syncobj_handle);</div><div class='add'>+	if (!*syncobj)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (!point)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Allocate the chain node */</div><div class='add'>+	*chain = dma_fence_chain_alloc();</div><div class='add'>+	if (!*chain) {</div><div class='add'>+		drm_syncobj_put(*syncobj);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+amdgpu_gem_update_bo_mapping(struct drm_file *filp,</div><div class='add'>+			     struct amdgpu_bo_va *bo_va,</div><div class='add'>+			     uint32_t operation,</div><div class='add'>+			     uint64_t point,</div><div class='add'>+			     struct dma_fence *fence,</div><div class='add'>+			     struct drm_syncobj *syncobj,</div><div class='add'>+			     struct dma_fence_chain *chain)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_bo *bo = bo_va ? bo_va-&gt;base.bo : NULL;</div><div class='add'>+	struct amdgpu_fpriv *fpriv = filp-&gt;driver_priv;</div><div class='add'>+	struct amdgpu_vm *vm = &amp;fpriv-&gt;vm;</div><div class='add'>+	struct dma_fence *last_update;</div><div class='add'>+</div><div class='add'>+	if (!syncobj)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Find the last update fence */</div><div class='add'>+	switch (operation) {</div><div class='add'>+	case AMDGPU_VA_OP_MAP:</div><div class='add'>+	case AMDGPU_VA_OP_REPLACE:</div><div class='add'>+		if (bo &amp;&amp; (bo-&gt;tbo.base.resv == vm-&gt;root.bo-&gt;tbo.base.resv))</div><div class='add'>+			last_update = vm-&gt;last_update;</div><div class='add'>+		else</div><div class='add'>+			last_update = bo_va-&gt;last_pt_update;</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_VA_OP_UNMAP:</div><div class='add'>+	case AMDGPU_VA_OP_CLEAR:</div><div class='add'>+		last_update = fence;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Add fence to timeline */</div><div class='add'>+	if (!point)</div><div class='add'>+		drm_syncobj_replace_fence(syncobj, last_update);</div><div class='add'>+	else</div><div class='add'>+		drm_syncobj_add_point(syncobj, chain, last_update, point);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static vm_fault_t amdgpu_gem_fault(struct vm_fault *vmf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ttm_buffer_object *bo = vmf-&gt;vma-&gt;vm_private_data;</div><div class='hunk'>@@ -184,6 +293,15 @@ static int amdgpu_gem_object_open(struct drm_gem_object *obj,</div><div class='ctx'> 		bo_va = amdgpu_vm_bo_add(adev, vm, abo);</div><div class='ctx'> 	else</div><div class='ctx'> 		++bo_va-&gt;ref_count;</div><div class='add'>+</div><div class='add'>+	/* attach gfx eviction fence */</div><div class='add'>+	r = amdgpu_eviction_fence_attach(&amp;fpriv-&gt;evf_mgr, abo);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_DEBUG_DRIVER("Failed to attach eviction fence to BO\n");</div><div class='add'>+		amdgpu_bo_unreserve(abo);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	amdgpu_bo_unreserve(abo);</div><div class='ctx'> </div><div class='ctx'> 	/* Validate and add eviction fence to DMABuf imports with dynamic</div><div class='hunk'>@@ -247,6 +365,9 @@ static void amdgpu_gem_object_close(struct drm_gem_object *obj,</div><div class='ctx'> 			goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!amdgpu_vm_is_bo_always_valid(vm, bo))</div><div class='add'>+		amdgpu_eviction_fence_detach(&amp;fpriv-&gt;evf_mgr, bo);</div><div class='add'>+</div><div class='ctx'> 	bo_va = amdgpu_vm_bo_find(vm, bo);</div><div class='ctx'> 	if (!bo_va || --bo_va-&gt;ref_count)</div><div class='ctx'> 		goto out_unlock;</div><div class='hunk'>@@ -321,10 +442,6 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	uint32_t handle, initial_domain;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='del'>-	/* reject DOORBELLs until userspace code to use it is available */</div><div class='del'>-	if (args-&gt;in.domains &amp; AMDGPU_GEM_DOMAIN_DOORBELL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	/* reject invalid gem flags */</div><div class='ctx'> 	if (flags &amp; ~(AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |</div><div class='ctx'> 		      AMDGPU_GEM_CREATE_NO_CPU_ACCESS |</div><div class='hunk'>@@ -638,18 +755,23 @@ out:</div><div class='ctx'>  *</div><div class='ctx'>  * Update the bo_va directly after setting its address. Errors are not</div><div class='ctx'>  * vital here, so they are not reported back to userspace.</div><div class='add'>+ *</div><div class='add'>+ * Returns resulting fence if freed BO(s) got cleared from the PT.</div><div class='add'>+ * otherwise stub fence in case of error.</div><div class='ctx'>  */</div><div class='del'>-static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,</div><div class='del'>-				    struct amdgpu_vm *vm,</div><div class='del'>-				    struct amdgpu_bo_va *bo_va,</div><div class='del'>-				    uint32_t operation)</div><div class='add'>+static struct dma_fence *</div><div class='add'>+amdgpu_gem_va_update_vm(struct amdgpu_device *adev,</div><div class='add'>+			struct amdgpu_vm *vm,</div><div class='add'>+			struct amdgpu_bo_va *bo_va,</div><div class='add'>+			uint32_t operation)</div><div class='ctx'> {</div><div class='add'>+	struct dma_fence *fence = dma_fence_get_stub();</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	if (!amdgpu_vm_ready(vm))</div><div class='del'>-		return;</div><div class='add'>+		return fence;</div><div class='ctx'> </div><div class='del'>-	r = amdgpu_vm_clear_freed(adev, vm, NULL);</div><div class='add'>+	r = amdgpu_vm_clear_freed(adev, vm, &amp;fence);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		goto error;</div><div class='ctx'> </div><div class='hunk'>@@ -665,6 +787,8 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,</div><div class='ctx'> error:</div><div class='ctx'> 	if (r &amp;&amp; r != -ERESTARTSYS)</div><div class='ctx'> 		DRM_ERROR("Couldn't update BO_VA (%d)\n", r);</div><div class='add'>+</div><div class='add'>+	return fence;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -713,6 +837,9 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	struct amdgpu_fpriv *fpriv = filp-&gt;driver_priv;</div><div class='ctx'> 	struct amdgpu_bo *abo;</div><div class='ctx'> 	struct amdgpu_bo_va *bo_va;</div><div class='add'>+	struct drm_syncobj *timeline_syncobj = NULL;</div><div class='add'>+	struct dma_fence_chain *timeline_chain = NULL;</div><div class='add'>+	struct dma_fence *fence;</div><div class='ctx'> 	struct drm_exec exec;</div><div class='ctx'> 	uint64_t va_flags;</div><div class='ctx'> 	uint64_t vm_size;</div><div class='hunk'>@@ -774,6 +901,12 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		abo = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	r = amdgpu_gem_add_input_fence(filp,</div><div class='add'>+				       args-&gt;input_fence_syncobj_handles,</div><div class='add'>+				       args-&gt;num_syncobj_handles);</div><div class='add'>+	if (r)</div><div class='add'>+		goto error_put_gobj;</div><div class='add'>+</div><div class='ctx'> 	drm_exec_init(&amp;exec, DRM_EXEC_INTERRUPTIBLE_WAIT |</div><div class='ctx'> 		      DRM_EXEC_IGNORE_DUPLICATES, 0);</div><div class='ctx'> 	drm_exec_until_all_locked(&amp;exec) {</div><div class='hunk'>@@ -802,6 +935,14 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 		bo_va = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	r = amdgpu_gem_update_timeline_node(filp,</div><div class='add'>+					    args-&gt;vm_timeline_syncobj_out,</div><div class='add'>+					    args-&gt;vm_timeline_point,</div><div class='add'>+					    &amp;timeline_syncobj,</div><div class='add'>+					    &amp;timeline_chain);</div><div class='add'>+	if (r)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='ctx'> 	switch (args-&gt;operation) {</div><div class='ctx'> 	case AMDGPU_VA_OP_MAP:</div><div class='ctx'> 		va_flags = amdgpu_gem_va_map_flags(adev, args-&gt;flags);</div><div class='hunk'>@@ -827,12 +968,24 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	if (!r &amp;&amp; !(args-&gt;flags &amp; AMDGPU_VM_DELAY_UPDATE) &amp;&amp; !adev-&gt;debug_vm)</div><div class='del'>-		amdgpu_gem_va_update_vm(adev, &amp;fpriv-&gt;vm, bo_va,</div><div class='del'>-					args-&gt;operation);</div><div class='add'>+	if (!r &amp;&amp; !(args-&gt;flags &amp; AMDGPU_VM_DELAY_UPDATE) &amp;&amp; !adev-&gt;debug_vm) {</div><div class='add'>+		fence = amdgpu_gem_va_update_vm(adev, &amp;fpriv-&gt;vm, bo_va,</div><div class='add'>+						args-&gt;operation);</div><div class='add'>+</div><div class='add'>+		if (timeline_syncobj)</div><div class='add'>+			amdgpu_gem_update_bo_mapping(filp, bo_va,</div><div class='add'>+					     args-&gt;operation,</div><div class='add'>+					     args-&gt;vm_timeline_point,</div><div class='add'>+					     fence, timeline_syncobj,</div><div class='add'>+					     timeline_chain);</div><div class='add'>+		else</div><div class='add'>+			dma_fence_put(fence);</div><div class='add'>+</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='ctx'> 	drm_exec_fini(&amp;exec);</div><div class='add'>+error_put_gobj:</div><div class='ctx'> 	drm_gem_object_put(gobj);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br/>index 72af5e5a894a..1db1e6ec0184 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include "amdgpu_reset.h"</div><div class='ctx'> #include "amdgpu_xcp.h"</div><div class='ctx'> #include "amdgpu_xgmi.h"</div><div class='add'>+#include "nvd.h"</div><div class='ctx'> </div><div class='ctx'> /* delay 0.1 second to enable gfx off feature */</div><div class='ctx'> #define GFX_OFF_DELAY_ENABLE         msecs_to_jiffies(100)</div><div class='hunk'>@@ -74,14 +75,15 @@ bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev,</div><div class='ctx'> 			adev-&gt;gfx.mec_bitmap[xcc_id].queue_bitmap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev,</div><div class='del'>-			       int me, int pipe, int queue)</div><div class='add'>+static int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev,</div><div class='add'>+				      int me, int pipe, int queue)</div><div class='ctx'> {</div><div class='add'>+	int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */</div><div class='ctx'> 	int bit = 0;</div><div class='ctx'> </div><div class='ctx'> 	bit += me * adev-&gt;gfx.me.num_pipe_per_me</div><div class='del'>-		* adev-&gt;gfx.me.num_queue_per_pipe;</div><div class='del'>-	bit += pipe * adev-&gt;gfx.me.num_queue_per_pipe;</div><div class='add'>+		* num_queue_per_pipe;</div><div class='add'>+	bit += pipe * num_queue_per_pipe;</div><div class='ctx'> 	bit += queue;</div><div class='ctx'> </div><div class='ctx'> 	return bit;</div><div class='hunk'>@@ -238,8 +240,8 @@ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	int i, queue, pipe;</div><div class='ctx'> 	bool multipipe_policy = amdgpu_gfx_is_graphics_multipipe_capable(adev);</div><div class='del'>-	int max_queues_per_me = adev-&gt;gfx.me.num_pipe_per_me *</div><div class='del'>-					adev-&gt;gfx.me.num_queue_per_pipe;</div><div class='add'>+	int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */</div><div class='add'>+	int max_queues_per_me = adev-&gt;gfx.me.num_pipe_per_me * num_queue_per_pipe;</div><div class='ctx'> </div><div class='ctx'> 	if (multipipe_policy) {</div><div class='ctx'> 		/* policy: amdgpu owns the first queue per pipe at this stage</div><div class='hunk'>@@ -247,9 +249,9 @@ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev)</div><div class='ctx'> 		for (i = 0; i &lt; max_queues_per_me; i++) {</div><div class='ctx'> 			pipe = i % adev-&gt;gfx.me.num_pipe_per_me;</div><div class='ctx'> 			queue = (i / adev-&gt;gfx.me.num_pipe_per_me) %</div><div class='del'>-				adev-&gt;gfx.me.num_queue_per_pipe;</div><div class='add'>+				num_queue_per_pipe;</div><div class='ctx'> </div><div class='del'>-			set_bit(pipe * adev-&gt;gfx.me.num_queue_per_pipe + queue,</div><div class='add'>+			set_bit(pipe * num_queue_per_pipe + queue,</div><div class='ctx'> 				adev-&gt;gfx.me.queue_bitmap);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -258,8 +260,9 @@ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* update the number of active graphics rings */</div><div class='del'>-	adev-&gt;gfx.num_gfx_rings =</div><div class='del'>-		bitmap_weight(adev-&gt;gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);</div><div class='add'>+	if (adev-&gt;gfx.num_gfx_rings)</div><div class='add'>+		adev-&gt;gfx.num_gfx_rings =</div><div class='add'>+			bitmap_weight(adev-&gt;gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,</div><div class='hunk'>@@ -1351,6 +1354,10 @@ static ssize_t amdgpu_gfx_get_current_compute_partition(struct device *dev,</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(ddev);</div><div class='ctx'> 	int mode;</div><div class='ctx'> </div><div class='add'>+	/* Only minimal precaution taken to reject requests while in reset.*/</div><div class='add'>+	if (amdgpu_in_reset(adev))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	mode = amdgpu_xcp_query_partition_mode(adev-&gt;xcp_mgr,</div><div class='ctx'> 					       AMDGPU_XCP_FL_NONE);</div><div class='ctx'> </div><div class='hunk'>@@ -1394,8 +1401,14 @@ static ssize_t amdgpu_gfx_set_compute_partition(struct device *dev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Don't allow a switch while under reset */</div><div class='add'>+	if (!down_read_trylock(&amp;adev-&gt;reset_domain-&gt;sem))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	ret = amdgpu_xcp_switch_partition_mode(adev-&gt;xcp_mgr, mode);</div><div class='ctx'> </div><div class='add'>+	up_read(&amp;adev-&gt;reset_domain-&gt;sem);</div><div class='add'>+</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1438,9 +1451,11 @@ static int amdgpu_gfx_run_cleaner_shader_job(struct amdgpu_ring *ring)</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	struct drm_gpu_scheduler *sched = &amp;ring-&gt;sched;</div><div class='ctx'> 	struct drm_sched_entity entity;</div><div class='add'>+	static atomic_t counter;</div><div class='ctx'> 	struct dma_fence *f;</div><div class='ctx'> 	struct amdgpu_job *job;</div><div class='ctx'> 	struct amdgpu_ib *ib;</div><div class='add'>+	void *owner;</div><div class='ctx'> 	int i, r;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the scheduler entity */</div><div class='hunk'>@@ -1451,13 +1466,21 @@ static int amdgpu_gfx_run_cleaner_shader_job(struct amdgpu_ring *ring)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r = amdgpu_job_alloc_with_ib(ring-&gt;adev, &amp;entity, NULL,</div><div class='del'>-				     64, 0,</div><div class='del'>-				     &amp;job);</div><div class='add'>+	/*</div><div class='add'>+	 * Use some unique dummy value as the owner to make sure we execute</div><div class='add'>+	 * the cleaner shader on each submission. The value just need to change</div><div class='add'>+	 * for each submission and is otherwise meaningless.</div><div class='add'>+	 */</div><div class='add'>+	owner = (void *)(unsigned long)atomic_inc_return(&amp;counter);</div><div class='add'>+</div><div class='add'>+	r = amdgpu_job_alloc_with_ib(ring-&gt;adev, &amp;entity, owner,</div><div class='add'>+				     64, 0, &amp;job);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	job-&gt;enforce_isolation = true;</div><div class='add'>+	/* always run the cleaner shader */</div><div class='add'>+	job-&gt;run_cleaner_shader = true;</div><div class='ctx'> </div><div class='ctx'> 	ib = &amp;job-&gt;ibs[0];</div><div class='ctx'> 	for (i = 0; i &lt;= ring-&gt;funcs-&gt;align_mask; ++i)</div><div class='hunk'>@@ -1544,6 +1567,9 @@ static ssize_t amdgpu_gfx_set_run_cleaner_shader(struct device *dev,</div><div class='ctx'> 	if (adev-&gt;in_suspend &amp;&amp; !adev-&gt;in_runpm)</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='add'>+	if (adev-&gt;gfx.disable_kq)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	ret = kstrtol(buf, 0, &amp;value);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1586,7 +1612,8 @@ static ssize_t amdgpu_gfx_set_run_cleaner_shader(struct device *dev,</div><div class='ctx'>  * Provides the sysfs read interface to get the current settings of the 'enforce_isolation'</div><div class='ctx'>  * feature for each GPU partition. Reading from the 'enforce_isolation'</div><div class='ctx'>  * sysfs file returns the isolation settings for all partitions, where '0'</div><div class='del'>- * indicates disabled and '1' indicates enabled.</div><div class='add'>+ * indicates disabled, '1' indicates enabled, and '2' indicates enabled in legacy mode,</div><div class='add'>+ * and '3' indicates enabled without cleaner shader.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: The number of bytes read from the sysfs file.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1621,9 +1648,12 @@ static ssize_t amdgpu_gfx_get_enforce_isolation(struct device *dev,</div><div class='ctx'>  * @count: The size of the input data</div><div class='ctx'>  *</div><div class='ctx'>  * This function allows control over the 'enforce_isolation' feature, which</div><div class='del'>- * serializes access to the graphics engine. Writing '1' or '0' to the</div><div class='del'>- * 'enforce_isolation' sysfs file enables or disables process isolation for</div><div class='del'>- * each partition. The input should specify the setting for all partitions.</div><div class='add'>+ * serializes access to the graphics engine. Writing '0' to disable, '1' to</div><div class='add'>+ * enable isolation with cleaner shader, '2' to enable legacy isolation without</div><div class='add'>+ * cleaner shader, or '3' to enable process isolation without submitting the</div><div class='add'>+ * cleaner shader to the 'enforce_isolation' sysfs file sets the isolation mode</div><div class='add'>+ * for each partition. The input should specify the setting for all</div><div class='add'>+ * partitions.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: The number of bytes written to the sysfs file.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1660,13 +1690,34 @@ static ssize_t amdgpu_gfx_set_enforce_isolation(struct device *dev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_partitions; i++) {</div><div class='del'>-		if (partition_values[i] != 0 &amp;&amp; partition_values[i] != 1)</div><div class='add'>+		if (partition_values[i] != 0 &amp;&amp;</div><div class='add'>+		    partition_values[i] != 1 &amp;&amp;</div><div class='add'>+		    partition_values[i] != 2 &amp;&amp;</div><div class='add'>+		    partition_values[i] != 3)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;adev-&gt;enforce_isolation_mutex);</div><div class='del'>-	for (i = 0; i &lt; num_partitions; i++)</div><div class='del'>-		adev-&gt;enforce_isolation[i] = partition_values[i];</div><div class='add'>+	for (i = 0; i &lt; num_partitions; i++) {</div><div class='add'>+		switch (partition_values[i]) {</div><div class='add'>+		case 0:</div><div class='add'>+		default:</div><div class='add'>+			adev-&gt;enforce_isolation[i] = AMDGPU_ENFORCE_ISOLATION_DISABLE;</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			adev-&gt;enforce_isolation[i] =</div><div class='add'>+				AMDGPU_ENFORCE_ISOLATION_ENABLE;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			adev-&gt;enforce_isolation[i] =</div><div class='add'>+				AMDGPU_ENFORCE_ISOLATION_ENABLE_LEGACY;</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			adev-&gt;enforce_isolation[i] =</div><div class='add'>+				AMDGPU_ENFORCE_ISOLATION_NO_CLEANER_SHADER;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	mutex_unlock(&amp;adev-&gt;enforce_isolation_mutex);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_mes_update_enforce_isolation(adev);</div><div class='hunk'>@@ -1915,39 +1966,41 @@ void amdgpu_gfx_cleaner_shader_init(struct amdgpu_device *adev,</div><div class='ctx'> static void amdgpu_gfx_kfd_sch_ctrl(struct amdgpu_device *adev, u32 idx,</div><div class='ctx'> 				    bool enable)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;adev-&gt;gfx.kfd_sch_mutex);</div><div class='add'>+	mutex_lock(&amp;adev-&gt;gfx.userq_sch_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		/* If the count is already 0, it means there's an imbalance bug somewhere.</div><div class='ctx'> 		 * Note that the bug may be in a different caller than the one which triggers the</div><div class='ctx'> 		 * WARN_ON_ONCE.</div><div class='ctx'> 		 */</div><div class='del'>-		if (WARN_ON_ONCE(adev-&gt;gfx.kfd_sch_req_count[idx] == 0)) {</div><div class='add'>+		if (WARN_ON_ONCE(adev-&gt;gfx.userq_sch_req_count[idx] == 0)) {</div><div class='ctx'> 			dev_err(adev-&gt;dev, "Attempted to enable KFD scheduler when reference count is already zero\n");</div><div class='ctx'> 			goto unlock;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		adev-&gt;gfx.kfd_sch_req_count[idx]--;</div><div class='add'>+		adev-&gt;gfx.userq_sch_req_count[idx]--;</div><div class='ctx'> </div><div class='del'>-		if (adev-&gt;gfx.kfd_sch_req_count[idx] == 0 &amp;&amp;</div><div class='del'>-		    adev-&gt;gfx.kfd_sch_inactive[idx]) {</div><div class='add'>+		if (adev-&gt;gfx.userq_sch_req_count[idx] == 0 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.userq_sch_inactive[idx]) {</div><div class='ctx'> 			schedule_delayed_work(&amp;adev-&gt;gfx.enforce_isolation[idx].work,</div><div class='ctx'> 					      msecs_to_jiffies(adev-&gt;gfx.enforce_isolation_time[idx]));</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (adev-&gt;gfx.kfd_sch_req_count[idx] == 0) {</div><div class='add'>+		if (adev-&gt;gfx.userq_sch_req_count[idx] == 0) {</div><div class='ctx'> 			cancel_delayed_work_sync(&amp;adev-&gt;gfx.enforce_isolation[idx].work);</div><div class='del'>-			if (!adev-&gt;gfx.kfd_sch_inactive[idx]) {</div><div class='del'>-				amdgpu_amdkfd_stop_sched(adev, idx);</div><div class='del'>-				adev-&gt;gfx.kfd_sch_inactive[idx] = true;</div><div class='add'>+			if (!adev-&gt;gfx.userq_sch_inactive[idx]) {</div><div class='add'>+				amdgpu_userq_stop_sched_for_enforce_isolation(adev, idx);</div><div class='add'>+				if (adev-&gt;kfd.init_complete)</div><div class='add'>+					amdgpu_amdkfd_stop_sched(adev, idx);</div><div class='add'>+				adev-&gt;gfx.userq_sch_inactive[idx] = true;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		adev-&gt;gfx.kfd_sch_req_count[idx]++;</div><div class='add'>+		adev-&gt;gfx.userq_sch_req_count[idx]++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='del'>-	mutex_unlock(&amp;adev-&gt;gfx.kfd_sch_mutex);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;gfx.userq_sch_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1992,12 +2045,13 @@ void amdgpu_gfx_enforce_isolation_handler(struct work_struct *work)</div><div class='ctx'> 				      msecs_to_jiffies(1));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Tell KFD to resume the runqueue */</div><div class='del'>-		if (adev-&gt;kfd.init_complete) {</div><div class='del'>-			WARN_ON_ONCE(!adev-&gt;gfx.kfd_sch_inactive[idx]);</div><div class='del'>-			WARN_ON_ONCE(adev-&gt;gfx.kfd_sch_req_count[idx]);</div><div class='add'>+		WARN_ON_ONCE(!adev-&gt;gfx.userq_sch_inactive[idx]);</div><div class='add'>+		WARN_ON_ONCE(adev-&gt;gfx.userq_sch_req_count[idx]);</div><div class='add'>+</div><div class='add'>+		amdgpu_userq_start_sched_for_enforce_isolation(adev, idx);</div><div class='add'>+		if (adev-&gt;kfd.init_complete)</div><div class='ctx'> 			amdgpu_amdkfd_start_sched(adev, idx);</div><div class='del'>-			adev-&gt;gfx.kfd_sch_inactive[idx] = false;</div><div class='del'>-		}</div><div class='add'>+		adev-&gt;gfx.userq_sch_inactive[idx] = false;</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;adev-&gt;enforce_isolation_mutex);</div><div class='ctx'> }</div><div class='hunk'>@@ -2021,7 +2075,7 @@ amdgpu_gfx_enforce_isolation_wait_for_kfd(struct amdgpu_device *adev,</div><div class='ctx'> 	bool wait = false;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;adev-&gt;enforce_isolation_mutex);</div><div class='del'>-	if (adev-&gt;enforce_isolation[idx]) {</div><div class='add'>+	if (adev-&gt;enforce_isolation[idx] == AMDGPU_ENFORCE_ISOLATION_ENABLE) {</div><div class='ctx'> 		/* set the initial values if nothing is set */</div><div class='ctx'> 		if (!adev-&gt;gfx.enforce_isolation_jiffies[idx]) {</div><div class='ctx'> 			adev-&gt;gfx.enforce_isolation_jiffies[idx] = jiffies;</div><div class='hunk'>@@ -2088,7 +2142,7 @@ void amdgpu_gfx_enforce_isolation_ring_begin_use(struct amdgpu_ring *ring)</div><div class='ctx'> 	amdgpu_gfx_enforce_isolation_wait_for_kfd(adev, idx);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;adev-&gt;enforce_isolation_mutex);</div><div class='del'>-	if (adev-&gt;enforce_isolation[idx]) {</div><div class='add'>+	if (adev-&gt;enforce_isolation[idx] == AMDGPU_ENFORCE_ISOLATION_ENABLE) {</div><div class='ctx'> 		if (adev-&gt;kfd.init_complete)</div><div class='ctx'> 			sched_work = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2125,7 +2179,7 @@ void amdgpu_gfx_enforce_isolation_ring_end_use(struct amdgpu_ring *ring)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;adev-&gt;enforce_isolation_mutex);</div><div class='del'>-	if (adev-&gt;enforce_isolation[idx]) {</div><div class='add'>+	if (adev-&gt;enforce_isolation[idx] == AMDGPU_ENFORCE_ISOLATION_ENABLE) {</div><div class='ctx'> 		if (adev-&gt;kfd.init_complete)</div><div class='ctx'> 			sched_work = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2209,6 +2263,74 @@ void amdgpu_gfx_profile_ring_end_use(struct amdgpu_ring *ring)</div><div class='ctx'> 	schedule_delayed_work(&amp;ring-&gt;adev-&gt;gfx.idle_work, GFX_PROFILE_IDLE_TIMEOUT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * amdgpu_gfx_csb_preamble_start - Set CSB preamble start</div><div class='add'>+ *</div><div class='add'>+ * @buffer: This is an output variable that gets the PACKET3 preamble setup.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * return the latest index.</div><div class='add'>+ */</div><div class='add'>+u32 amdgpu_gfx_csb_preamble_start(volatile u32 *buffer)</div><div class='add'>+{</div><div class='add'>+	u32 count = 0;</div><div class='add'>+</div><div class='add'>+	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='add'>+	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);</div><div class='add'>+</div><div class='add'>+	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));</div><div class='add'>+	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='add'>+	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * amdgpu_gfx_csb_data_parser - Parser CS data</div><div class='add'>+ *</div><div class='add'>+ * @adev: amdgpu_device pointer used to get the CS data and other gfx info.</div><div class='add'>+ * @buffer: This is an output variable that gets the PACKET3 preamble end.</div><div class='add'>+ * @count: Index to start set the preemble end.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * return the latest index.</div><div class='add'>+ */</div><div class='add'>+u32 amdgpu_gfx_csb_data_parser(struct amdgpu_device *adev, volatile u32 *buffer, u32 count)</div><div class='add'>+{</div><div class='add'>+	const struct cs_section_def *sect = NULL;</div><div class='add'>+	const struct cs_extent_def *ext = NULL;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (sect = adev-&gt;gfx.rlc.cs_data; sect-&gt;section != NULL; ++sect) {</div><div class='add'>+		for (ext = sect-&gt;section; ext-&gt;extent != NULL; ++ext) {</div><div class='add'>+			if (sect-&gt;id == SECT_CONTEXT) {</div><div class='add'>+				buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext-&gt;reg_count));</div><div class='add'>+				buffer[count++] = cpu_to_le32(ext-&gt;reg_index - PACKET3_SET_CONTEXT_REG_START);</div><div class='add'>+</div><div class='add'>+				for (i = 0; i &lt; ext-&gt;reg_count; i++)</div><div class='add'>+					buffer[count++] = cpu_to_le32(ext-&gt;extent[i]);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * amdgpu_gfx_csb_preamble_end - Set CSB preamble end</div><div class='add'>+ *</div><div class='add'>+ * @buffer: This is an output variable that gets the PACKET3 preamble end.</div><div class='add'>+ * @count: Index to start set the preemble end.</div><div class='add'>+ */</div><div class='add'>+void amdgpu_gfx_csb_preamble_end(volatile u32 *buffer, u32 count)</div><div class='add'>+{</div><div class='add'>+	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='add'>+	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);</div><div class='add'>+</div><div class='add'>+	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));</div><div class='add'>+	buffer[count++] = cpu_to_le32(0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * debugfs for to enable/disable gfx job submission to specific core.</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h<br/>index 87e862188766..08f268dab8f5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h</a></div><div class='hunk'>@@ -170,10 +170,46 @@ struct amdgpu_kiq {</div><div class='ctx'> #define AMDGPU_GFX_MAX_SE 4</div><div class='ctx'> #define AMDGPU_GFX_MAX_SH_PER_SE 2</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * amdgpu_rb_config - Configure a single Render Backend (RB)</div><div class='add'>+ *</div><div class='add'>+ * Bad RBs are fused off and there is a harvest register the driver reads to</div><div class='add'>+ * determine which RB(s) are fused off so that the driver can configure the</div><div class='add'>+ * hardware state so that nothing gets sent to them. There are also user</div><div class='add'>+ * harvest registers that the driver can program to disable additional RBs,</div><div class='add'>+ * etc., for testing purposes.</div><div class='add'>+ */</div><div class='ctx'> struct amdgpu_rb_config {</div><div class='add'>+	/**</div><div class='add'>+	 * @rb_backend_disable:</div><div class='add'>+	 *</div><div class='add'>+	 * The value captured from register RB_BACKEND_DISABLE indicates if the</div><div class='add'>+	 * RB backend is disabled or not.</div><div class='add'>+	 */</div><div class='ctx'> 	uint32_t rb_backend_disable;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @user_rb_backend_disable:</div><div class='add'>+	 *</div><div class='add'>+	 * The value captured from register USER_RB_BACKEND_DISABLE indicates</div><div class='add'>+	 * if the User RB backend is disabled or not.</div><div class='add'>+	 */</div><div class='ctx'> 	uint32_t user_rb_backend_disable;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @raster_config:</div><div class='add'>+	 *</div><div class='add'>+	 * To set up all of the states, it is necessary to have two registers</div><div class='add'>+	 * to keep all of the states. This field holds the first register.</div><div class='add'>+	 */</div><div class='ctx'> 	uint32_t raster_config;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @raster_config_1:</div><div class='add'>+	 *</div><div class='add'>+	 * To set up all of the states, it is necessary to have two registers</div><div class='add'>+	 * to keep all of the states. This field holds the second register.</div><div class='add'>+	 */</div><div class='ctx'> 	uint32_t raster_config_1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -221,6 +257,13 @@ struct amdgpu_gfx_config {</div><div class='ctx'> 	uint32_t macrotile_mode_array[16];</div><div class='ctx'> </div><div class='ctx'> 	struct gb_addr_config gb_addr_config_fields;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @rb_config:</div><div class='add'>+	 *</div><div class='add'>+	 * Matrix that keeps all the Render Backend (color and depth buffer</div><div class='add'>+	 * handling) configuration on the 3D engine.</div><div class='add'>+	 */</div><div class='ctx'> 	struct amdgpu_rb_config rb_config[AMDGPU_GFX_MAX_SE][AMDGPU_GFX_MAX_SH_PER_SE];</div><div class='ctx'> </div><div class='ctx'> 	/* gfx configure feature */</div><div class='hunk'>@@ -305,7 +348,8 @@ struct amdgpu_gfx_funcs {</div><div class='ctx'> 	void (*init_spm_golden)(struct amdgpu_device *adev);</div><div class='ctx'> 	void (*update_perfmon_mgcg)(struct amdgpu_device *adev, bool enable);</div><div class='ctx'> 	int (*get_gfx_shadow_info)(struct amdgpu_device *adev,</div><div class='del'>-				   struct amdgpu_gfx_shadow_info *shadow_info);</div><div class='add'>+				   struct amdgpu_gfx_shadow_info *shadow_info,</div><div class='add'>+				   bool skip_check);</div><div class='ctx'> 	enum amdgpu_gfx_partition</div><div class='ctx'> 			(*query_partition_mode)(struct amdgpu_device *adev);</div><div class='ctx'> 	int (*switch_partition_mode)(struct amdgpu_device *adev,</div><div class='hunk'>@@ -474,9 +518,9 @@ struct amdgpu_gfx {</div><div class='ctx'> 	bool				enable_cleaner_shader;</div><div class='ctx'> 	struct amdgpu_isolation_work	enforce_isolation[MAX_XCP];</div><div class='ctx'> 	/* Mutex for synchronizing KFD scheduler operations */</div><div class='del'>-	struct mutex                    kfd_sch_mutex;</div><div class='del'>-	u64				kfd_sch_req_count[MAX_XCP];</div><div class='del'>-	bool				kfd_sch_inactive[MAX_XCP];</div><div class='add'>+	struct mutex                    userq_sch_mutex;</div><div class='add'>+	u64				userq_sch_req_count[MAX_XCP];</div><div class='add'>+	bool				userq_sch_inactive[MAX_XCP];</div><div class='ctx'> 	unsigned long			enforce_isolation_jiffies[MAX_XCP];</div><div class='ctx'> 	unsigned long			enforce_isolation_time[MAX_XCP];</div><div class='ctx'> </div><div class='hunk'>@@ -484,6 +528,9 @@ struct amdgpu_gfx {</div><div class='ctx'> 	struct delayed_work		idle_work;</div><div class='ctx'> 	bool				workload_profile_active;</div><div class='ctx'> 	struct mutex                    workload_profile_mutex;</div><div class='add'>+</div><div class='add'>+	bool				disable_kq;</div><div class='add'>+	bool				disable_uq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_gfx_ras_reg_entry {</div><div class='hunk'>@@ -503,7 +550,7 @@ struct amdgpu_gfx_ras_mem_id_entry {</div><div class='ctx'> #define amdgpu_gfx_select_se_sh(adev, se, sh, instance, xcc_id) ((adev)-&gt;gfx.funcs-&gt;select_se_sh((adev), (se), (sh), (instance), (xcc_id)))</div><div class='ctx'> #define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid, xcc_id) ((adev)-&gt;gfx.funcs-&gt;select_me_pipe_q((adev), (me), (pipe), (q), (vmid), (xcc_id)))</div><div class='ctx'> #define amdgpu_gfx_init_spm_golden(adev) (adev)-&gt;gfx.funcs-&gt;init_spm_golden((adev))</div><div class='del'>-#define amdgpu_gfx_get_gfx_shadow_info(adev, si) ((adev)-&gt;gfx.funcs-&gt;get_gfx_shadow_info((adev), (si)))</div><div class='add'>+#define amdgpu_gfx_get_gfx_shadow_info(adev, si) ((adev)-&gt;gfx.funcs-&gt;get_gfx_shadow_info((adev), (si), false))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_gfx_create_bitmask - create a bitmask</div><div class='hunk'>@@ -550,8 +597,6 @@ bool amdgpu_gfx_is_high_priority_compute_queue(struct amdgpu_device *adev,</div><div class='ctx'> 					       struct amdgpu_ring *ring);</div><div class='ctx'> bool amdgpu_gfx_is_high_priority_graphics_queue(struct amdgpu_device *adev,</div><div class='ctx'> 						struct amdgpu_ring *ring);</div><div class='del'>-int amdgpu_gfx_me_queue_to_bit(struct amdgpu_device *adev, int me,</div><div class='del'>-			       int pipe, int queue);</div><div class='ctx'> bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me,</div><div class='ctx'> 				    int pipe, int queue);</div><div class='ctx'> void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);</div><div class='hunk'>@@ -597,6 +642,9 @@ void amdgpu_gfx_enforce_isolation_ring_end_use(struct amdgpu_ring *ring);</div><div class='ctx'> void amdgpu_gfx_profile_idle_work_handler(struct work_struct *work);</div><div class='ctx'> void amdgpu_gfx_profile_ring_begin_use(struct amdgpu_ring *ring);</div><div class='ctx'> void amdgpu_gfx_profile_ring_end_use(struct amdgpu_ring *ring);</div><div class='add'>+u32 amdgpu_gfx_csb_preamble_start(volatile u32 *buffer);</div><div class='add'>+u32 amdgpu_gfx_csb_data_parser(struct amdgpu_device *adev, volatile u32 *buffer, u32 count);</div><div class='add'>+void amdgpu_gfx_csb_preamble_end(volatile u32 *buffer, u32 count);</div><div class='ctx'> </div><div class='ctx'> void amdgpu_debugfs_gfx_sched_mask_init(struct amdgpu_device *adev);</div><div class='ctx'> void amdgpu_debugfs_compute_sched_mask_init(struct amdgpu_device *adev);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c<br/>index 464625282872..6b0fbbb91e57 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c</a></div><div class='hunk'>@@ -699,12 +699,10 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct amdgpu_device *adev, uint16_t pasid,</div><div class='ctx'> 				   uint32_t flush_type, bool all_hub,</div><div class='ctx'> 				   uint32_t inst)</div><div class='ctx'> {</div><div class='del'>-	u32 usec_timeout = amdgpu_sriov_vf(adev) ? SRIOV_USEC_TIMEOUT :</div><div class='del'>-		adev-&gt;usec_timeout;</div><div class='ctx'> 	struct amdgpu_ring *ring = &amp;adev-&gt;gfx.kiq[inst].ring;</div><div class='ctx'> 	struct amdgpu_kiq *kiq = &amp;adev-&gt;gfx.kiq[inst];</div><div class='ctx'> 	unsigned int ndw;</div><div class='del'>-	int r;</div><div class='add'>+	int r, cnt = 0;</div><div class='ctx'> 	uint32_t seq;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -761,10 +759,21 @@ int amdgpu_gmc_flush_gpu_tlb_pasid(struct amdgpu_device *adev, uint16_t pasid,</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_ring_commit(ring);</div><div class='ctx'> 		spin_unlock(&amp;adev-&gt;gfx.kiq[inst].ring_lock);</div><div class='del'>-		if (amdgpu_fence_wait_polling(ring, seq, usec_timeout) &lt; 1) {</div><div class='add'>+</div><div class='add'>+		r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);</div><div class='add'>+</div><div class='add'>+		might_sleep();</div><div class='add'>+		while (r &lt; 1 &amp;&amp; cnt++ &lt; MAX_KIQ_REG_TRY &amp;&amp;</div><div class='add'>+		       !amdgpu_reset_pending(adev-&gt;reset_domain)) {</div><div class='add'>+			msleep(MAX_KIQ_REG_BAILOUT_INTERVAL);</div><div class='add'>+			r = amdgpu_fence_wait_polling(ring, seq, MAX_KIQ_REG_WAIT);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cnt &gt; MAX_KIQ_REG_TRY) {</div><div class='ctx'> 			dev_err(adev-&gt;dev, "timeout waiting for kiq fence\n");</div><div class='ctx'> 			r = -ETIME;</div><div class='del'>-		}</div><div class='add'>+		} else</div><div class='add'>+			r = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> error_unlock_reset:</div><div class='hunk'>@@ -1221,6 +1230,10 @@ static ssize_t current_memory_partition_show(</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(ddev);</div><div class='ctx'> 	enum amdgpu_memory_partition mode;</div><div class='ctx'> </div><div class='add'>+	/* Only minimal precaution taken to reject requests while in reset */</div><div class='add'>+	if (amdgpu_in_reset(adev))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	mode = adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode(adev);</div><div class='ctx'> 	if ((mode &gt;= ARRAY_SIZE(nps_desc)) ||</div><div class='ctx'> 	    (BIT(mode) &amp; AMDGPU_ALL_NPS_MASK) != BIT(mode))</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h<br/>index bd7fc123b8f9..80fa29c26e9e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h</a></div><div class='hunk'>@@ -62,6 +62,9 @@</div><div class='ctx'>  */</div><div class='ctx'> #define AMDGPU_GMC_FAULT_TIMEOUT	5000ULL</div><div class='ctx'> </div><div class='add'>+/* XNACK flags */</div><div class='add'>+#define AMDGPU_GMC_XNACK_FLAG_CHAIN BIT(0)</div><div class='add'>+</div><div class='ctx'> struct firmware;</div><div class='ctx'> </div><div class='ctx'> enum amdgpu_memory_partition {</div><div class='hunk'>@@ -301,6 +304,7 @@ struct amdgpu_gmc {</div><div class='ctx'> 	struct amdgpu_xgmi xgmi;</div><div class='ctx'> 	struct amdgpu_irq_src	ecc_irq;</div><div class='ctx'> 	int noretry;</div><div class='add'>+	uint32_t xnack_flags;</div><div class='ctx'> </div><div class='ctx'> 	uint32_t	vmid0_page_table_block_size;</div><div class='ctx'> 	uint32_t	vmid0_page_table_depth;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c<br/>index b6cf801939aa..6e02fb9ac2f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "amdgpu_ras.h"</div><div class='add'>+#include &lt;uapi/linux/kfd_ioctl.h&gt;</div><div class='ctx'> </div><div class='ctx'> int amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='hunk'>@@ -46,3 +47,22 @@ int amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	/* hdp ras follows amdgpu_ras_block_late_init_default for late init */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void amdgpu_hdp_generic_flush(struct amdgpu_device *adev,</div><div class='add'>+			      struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	if (!ring || !ring-&gt;funcs-&gt;emit_wreg) {</div><div class='add'>+		WREG32((adev-&gt;rmmio_remap.reg_offset +</div><div class='add'>+			KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt;</div><div class='add'>+			       2,</div><div class='add'>+		       0);</div><div class='add'>+		if (adev-&gt;nbio.funcs-&gt;get_memsize)</div><div class='add'>+			adev-&gt;nbio.funcs-&gt;get_memsize(adev);</div><div class='add'>+	} else {</div><div class='add'>+		amdgpu_ring_emit_wreg(ring,</div><div class='add'>+				      (adev-&gt;rmmio_remap.reg_offset +</div><div class='add'>+				       KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt;</div><div class='add'>+					      2,</div><div class='add'>+				      0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h<br/>index 7b8a6152dc8d..4cfd932b7e91 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h</a></div><div class='hunk'>@@ -44,4 +44,6 @@ struct amdgpu_hdp {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int amdgpu_hdp_ras_sw_init(struct amdgpu_device *adev);</div><div class='add'>+void amdgpu_hdp_generic_flush(struct amdgpu_device *adev,</div><div class='add'>+			      struct amdgpu_ring *ring);</div><div class='ctx'> #endif /* __AMDGPU_HDP_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c<br/>index 2ea98ec60220..802743efa3b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c</a></div><div class='hunk'>@@ -163,12 +163,12 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,</div><div class='ctx'> 		init_shadow = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;sched.ready &amp;&amp; !ring-&gt;is_mes_queue) {</div><div class='add'>+	if (!ring-&gt;sched.ready) {</div><div class='ctx'> 		dev_err(adev-&gt;dev, "couldn't schedule ib on ring &lt;%s&gt;\n", ring-&gt;name);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vm &amp;&amp; !job-&gt;vmid &amp;&amp; !ring-&gt;is_mes_queue) {</div><div class='add'>+	if (vm &amp;&amp; !job-&gt;vmid) {</div><div class='ctx'> 		dev_err(adev-&gt;dev, "VM IB without ID\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c<br/>index 4c4e087230ac..5dd78a9cb12d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c</a></div><div class='hunk'>@@ -576,8 +576,16 @@ void amdgpu_vmid_mgr_init(struct amdgpu_device *adev)</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;id_mgr-&gt;ids_lru);</div><div class='ctx'> 		id_mgr-&gt;reserved_use_count = 0;</div><div class='ctx'> </div><div class='del'>-		/* manage only VMIDs not used by KFD */</div><div class='del'>-		id_mgr-&gt;num_ids = adev-&gt;vm_manager.first_kfd_vmid;</div><div class='add'>+		/* for GC &lt;10, SDMA uses MMHUB so use first_kfd_vmid for both GC and MM */</div><div class='add'>+		if (amdgpu_ip_version(adev, GC_HWIP, 0) &lt; IP_VERSION(10, 0, 0))</div><div class='add'>+			/* manage only VMIDs not used by KFD */</div><div class='add'>+			id_mgr-&gt;num_ids = adev-&gt;vm_manager.first_kfd_vmid;</div><div class='add'>+		else if (AMDGPU_IS_MMHUB0(i) ||</div><div class='add'>+			 AMDGPU_IS_MMHUB1(i))</div><div class='add'>+			id_mgr-&gt;num_ids = 16;</div><div class='add'>+		else</div><div class='add'>+			/* manage only VMIDs not used by KFD */</div><div class='add'>+			id_mgr-&gt;num_ids = adev-&gt;vm_manager.first_kfd_vmid;</div><div class='ctx'> </div><div class='ctx'> 		/* skip over VMID 0, since it is the system VM */</div><div class='ctx'> 		for (j = 1; j &lt; id_mgr-&gt;num_ids; ++j) {</div><div class='hunk'>@@ -588,7 +596,7 @@ void amdgpu_vmid_mgr_init(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> 	/* alloc a default reserved vmid to enforce isolation */</div><div class='ctx'> 	for (i = 0; i &lt; (adev-&gt;xcp_mgr ? adev-&gt;xcp_mgr-&gt;num_xcps : 1); i++) {</div><div class='del'>-		if (adev-&gt;enforce_isolation[i])</div><div class='add'>+		if (adev-&gt;enforce_isolation[i] != AMDGPU_ENFORCE_ISOLATION_DISABLE)</div><div class='ctx'> 			amdgpu_vmid_alloc_reserved(adev, AMDGPU_GFXHUB(i));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c<br/>index 901f8b12c672..30f16968b578 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c</a></div><div class='hunk'>@@ -25,6 +25,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "amdgpu_ih.h"</div><div class='add'>+#include "amdgpu_reset.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_ih_ring_init - initialize the IH state</div><div class='hunk'>@@ -227,13 +228,23 @@ restart_ih:</div><div class='ctx'> 		ih-&gt;rptr &amp;= ih-&gt;ptr_mask;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	amdgpu_ih_set_rptr(adev, ih);</div><div class='add'>+	if (!ih-&gt;overflow)</div><div class='add'>+		amdgpu_ih_set_rptr(adev, ih);</div><div class='add'>+</div><div class='ctx'> 	wake_up_all(&amp;ih-&gt;wait_process);</div><div class='ctx'> </div><div class='ctx'> 	/* make sure wptr hasn't changed while processing */</div><div class='ctx'> 	wptr = amdgpu_ih_get_wptr(adev, ih);</div><div class='ctx'> 	if (wptr != ih-&gt;rptr)</div><div class='del'>-		goto restart_ih;</div><div class='add'>+		if (!ih-&gt;overflow)</div><div class='add'>+			goto restart_ih;</div><div class='add'>+</div><div class='add'>+	if (ih-&gt;overflow)</div><div class='add'>+		if (amdgpu_sriov_runtime(adev))</div><div class='add'>+			WARN_ONCE(!amdgpu_reset_domain_schedule(adev-&gt;reset_domain,</div><div class='add'>+				   &amp;adev-&gt;virt.flr_work),</div><div class='add'>+				  "Failed to queue work! at %s",</div><div class='add'>+				  __func__);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h<br/>index b0a88f92cd82..7f7ea046e209 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h</a></div><div class='hunk'>@@ -72,6 +72,7 @@ struct amdgpu_ih_ring {</div><div class='ctx'> 	/* For waiting on IH processing at checkpoint. */</div><div class='ctx'> 	wait_queue_head_t wait_process;</div><div class='ctx'> 	uint64_t		processed_timestamp;</div><div class='add'>+	bool overflow;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* return true if time stamp t2 is after t1 with 48bit wrap around */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br/>index 19ce4da285e8..13c60cac4261 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c</a></div><div class='hunk'>@@ -619,6 +619,10 @@ int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,</div><div class='ctx'> int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,</div><div class='ctx'> 		   unsigned int type)</div><div class='ctx'> {</div><div class='add'>+	/* When the threshold is reached,the interrupt source may not be enabled.return -EINVAL */</div><div class='add'>+	if (amdgpu_ras_is_rma(adev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (!adev-&gt;irq.installed)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='hunk'>@@ -725,8 +729,8 @@ static const struct irq_domain_ops amdgpu_hw_irqdomain_ops = {</div><div class='ctx'>  */</div><div class='ctx'> int amdgpu_irq_add_domain(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	adev-&gt;irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,</div><div class='del'>-						 &amp;amdgpu_hw_irqdomain_ops, adev);</div><div class='add'>+	adev-&gt;irq.domain = irq_domain_create_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,</div><div class='add'>+						    &amp;amdgpu_hw_irqdomain_ops, adev);</div><div class='ctx'> 	if (!adev-&gt;irq.domain) {</div><div class='ctx'> 		DRM_ERROR("GPU irq add domain failed\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h<br/>index ce6b9ba967ff..f2c049129661 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_job.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_job.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_job.h</a></div><div class='hunk'>@@ -78,6 +78,7 @@ struct amdgpu_job {</div><div class='ctx'> </div><div class='ctx'> 	/* enforce isolation */</div><div class='ctx'> 	bool			enforce_isolation;</div><div class='add'>+	bool			run_cleaner_shader;</div><div class='ctx'> </div><div class='ctx'> 	uint32_t		num_ibs;</div><div class='ctx'> 	struct amdgpu_ib	ibs[];</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c<br/>index 27bfe9c8af06..9fbb04aee97b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c</a></div><div class='hunk'>@@ -45,6 +45,7 @@</div><div class='ctx'> #include "amdgpu_ras.h"</div><div class='ctx'> #include "amdgpu_reset.h"</div><div class='ctx'> #include "amd_pcie.h"</div><div class='add'>+#include "amdgpu_userq.h"</div><div class='ctx'> </div><div class='ctx'> void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='hunk'>@@ -370,6 +371,26 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int amdgpu_userq_metadata_info_gfx(struct amdgpu_device *adev,</div><div class='add'>+					  struct drm_amdgpu_info *info,</div><div class='add'>+					  struct drm_amdgpu_info_uq_metadata_gfx *meta)</div><div class='add'>+{</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;gfx.funcs-&gt;get_gfx_shadow_info) {</div><div class='add'>+		struct amdgpu_gfx_shadow_info shadow = {};</div><div class='add'>+</div><div class='add'>+		adev-&gt;gfx.funcs-&gt;get_gfx_shadow_info(adev, &amp;shadow, true);</div><div class='add'>+		meta-&gt;shadow_size = shadow.shadow_size;</div><div class='add'>+		meta-&gt;shadow_alignment = shadow.shadow_alignment;</div><div class='add'>+		meta-&gt;csa_size = shadow.csa_size;</div><div class='add'>+		meta-&gt;csa_alignment = shadow.csa_alignment;</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 			     struct drm_amdgpu_info *info,</div><div class='ctx'> 			     struct drm_amdgpu_info_hw_ip *result)</div><div class='hunk'>@@ -387,7 +408,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 	case AMDGPU_HW_IP_GFX:</div><div class='ctx'> 		type = AMD_IP_BLOCK_TYPE_GFX;</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++)</div><div class='del'>-			if (adev-&gt;gfx.gfx_ring[i].sched.ready)</div><div class='add'>+			if (adev-&gt;gfx.gfx_ring[i].sched.ready &amp;&amp;</div><div class='add'>+			    !adev-&gt;gfx.gfx_ring[i].no_user_submission)</div><div class='ctx'> 				++num_rings;</div><div class='ctx'> 		ib_start_alignment = 32;</div><div class='ctx'> 		ib_size_alignment = 32;</div><div class='hunk'>@@ -395,7 +417,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 	case AMDGPU_HW_IP_COMPUTE:</div><div class='ctx'> 		type = AMD_IP_BLOCK_TYPE_GFX;</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;gfx.num_compute_rings; i++)</div><div class='del'>-			if (adev-&gt;gfx.compute_ring[i].sched.ready)</div><div class='add'>+			if (adev-&gt;gfx.compute_ring[i].sched.ready &amp;&amp;</div><div class='add'>+			    !adev-&gt;gfx.compute_ring[i].no_user_submission)</div><div class='ctx'> 				++num_rings;</div><div class='ctx'> 		ib_start_alignment = 32;</div><div class='ctx'> 		ib_size_alignment = 32;</div><div class='hunk'>@@ -403,7 +426,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 	case AMDGPU_HW_IP_DMA:</div><div class='ctx'> 		type = AMD_IP_BLOCK_TYPE_SDMA;</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++)</div><div class='del'>-			if (adev-&gt;sdma.instance[i].ring.sched.ready)</div><div class='add'>+			if (adev-&gt;sdma.instance[i].ring.sched.ready &amp;&amp;</div><div class='add'>+			    !adev-&gt;sdma.instance[i].ring.no_user_submission)</div><div class='ctx'> 				++num_rings;</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='ctx'> 		ib_size_alignment = 4;</div><div class='hunk'>@@ -414,7 +438,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 			if (adev-&gt;uvd.harvest_config &amp; (1 &lt;&lt; i))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			if (adev-&gt;uvd.inst[i].ring.sched.ready)</div><div class='add'>+			if (adev-&gt;uvd.inst[i].ring.sched.ready &amp;&amp;</div><div class='add'>+			    !adev-&gt;uvd.inst[i].ring.no_user_submission)</div><div class='ctx'> 				++num_rings;</div><div class='ctx'> 		}</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='hunk'>@@ -423,7 +448,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 	case AMDGPU_HW_IP_VCE:</div><div class='ctx'> 		type = AMD_IP_BLOCK_TYPE_VCE;</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;vce.num_rings; i++)</div><div class='del'>-			if (adev-&gt;vce.ring[i].sched.ready)</div><div class='add'>+			if (adev-&gt;vce.ring[i].sched.ready &amp;&amp;</div><div class='add'>+			    !adev-&gt;vce.ring[i].no_user_submission)</div><div class='ctx'> 				++num_rings;</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='ctx'> 		ib_size_alignment = 4;</div><div class='hunk'>@@ -435,7 +461,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			for (j = 0; j &lt; adev-&gt;uvd.num_enc_rings; j++)</div><div class='del'>-				if (adev-&gt;uvd.inst[i].ring_enc[j].sched.ready)</div><div class='add'>+				if (adev-&gt;uvd.inst[i].ring_enc[j].sched.ready &amp;&amp;</div><div class='add'>+				    !adev-&gt;uvd.inst[i].ring_enc[j].no_user_submission)</div><div class='ctx'> 					++num_rings;</div><div class='ctx'> 		}</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='hunk'>@@ -447,7 +474,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 			if (adev-&gt;vcn.harvest_config &amp; (1 &lt;&lt; i))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			if (adev-&gt;vcn.inst[i].ring_dec.sched.ready)</div><div class='add'>+			if (adev-&gt;vcn.inst[i].ring_dec.sched.ready &amp;&amp;</div><div class='add'>+			    !adev-&gt;vcn.inst[i].ring_dec.no_user_submission)</div><div class='ctx'> 				++num_rings;</div><div class='ctx'> 		}</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='hunk'>@@ -460,7 +488,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			for (j = 0; j &lt; adev-&gt;vcn.inst[i].num_enc_rings; j++)</div><div class='del'>-				if (adev-&gt;vcn.inst[i].ring_enc[j].sched.ready)</div><div class='add'>+				if (adev-&gt;vcn.inst[i].ring_enc[j].sched.ready &amp;&amp;</div><div class='add'>+				    !adev-&gt;vcn.inst[i].ring_enc[j].no_user_submission)</div><div class='ctx'> 					++num_rings;</div><div class='ctx'> 		}</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='hunk'>@@ -475,7 +504,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			for (j = 0; j &lt; adev-&gt;jpeg.num_jpeg_rings; j++)</div><div class='del'>-				if (adev-&gt;jpeg.inst[i].ring_dec[j].sched.ready)</div><div class='add'>+				if (adev-&gt;jpeg.inst[i].ring_dec[j].sched.ready &amp;&amp;</div><div class='add'>+				    !adev-&gt;jpeg.inst[i].ring_dec[j].no_user_submission)</div><div class='ctx'> 					++num_rings;</div><div class='ctx'> 		}</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='hunk'>@@ -483,7 +513,8 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_HW_IP_VPE:</div><div class='ctx'> 		type = AMD_IP_BLOCK_TYPE_VPE;</div><div class='del'>-		if (adev-&gt;vpe.ring.sched.ready)</div><div class='add'>+		if (adev-&gt;vpe.ring.sched.ready &amp;&amp;</div><div class='add'>+		    !adev-&gt;vpe.ring.no_user_submission)</div><div class='ctx'> 			++num_rings;</div><div class='ctx'> 		ib_start_alignment = 256;</div><div class='ctx'> 		ib_size_alignment = 4;</div><div class='hunk'>@@ -978,6 +1009,8 @@ out:</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		dev_info-&gt;userq_ip_mask = amdgpu_userq_get_supported_ip_mask(adev);</div><div class='add'>+</div><div class='ctx'> 		ret = copy_to_user(out, dev_info,</div><div class='ctx'> 				   min((size_t)size, sizeof(*dev_info))) ? -EFAULT : 0;</div><div class='ctx'> 		kfree(dev_info);</div><div class='hunk'>@@ -1293,6 +1326,22 @@ out:</div><div class='ctx'> 		return copy_to_user(out, &amp;gpuvm_fault,</div><div class='ctx'> 				    min((size_t)size, sizeof(gpuvm_fault))) ? -EFAULT : 0;</div><div class='ctx'> 	}</div><div class='add'>+	case AMDGPU_INFO_UQ_FW_AREAS: {</div><div class='add'>+		struct drm_amdgpu_info_uq_metadata meta_info = {};</div><div class='add'>+</div><div class='add'>+		switch (info-&gt;query_hw_ip.type) {</div><div class='add'>+		case AMDGPU_HW_IP_GFX:</div><div class='add'>+			ret = amdgpu_userq_metadata_info_gfx(adev, info, &amp;meta_info.gfx);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			ret = copy_to_user(out, &amp;meta_info,</div><div class='add'>+						min((size_t)size, sizeof(meta_info))) ? -EFAULT : 0;</div><div class='add'>+			return 0;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	default:</div><div class='ctx'> 		DRM_DEBUG_KMS("Invalid request %d\n", info-&gt;query);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1376,6 +1425,14 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)</div><div class='ctx'> 	mutex_init(&amp;fpriv-&gt;bo_list_lock);</div><div class='ctx'> 	idr_init_base(&amp;fpriv-&gt;bo_list_handles, 1);</div><div class='ctx'> </div><div class='add'>+	r = amdgpu_userq_mgr_init(&amp;fpriv-&gt;userq_mgr, file_priv, adev);</div><div class='add'>+	if (r)</div><div class='add'>+		DRM_WARN("Can't setup usermode queues, use legacy workload submission only\n");</div><div class='add'>+</div><div class='add'>+	r = amdgpu_eviction_fence_init(&amp;fpriv-&gt;evf_mgr);</div><div class='add'>+	if (r)</div><div class='add'>+		goto error_vm;</div><div class='add'>+</div><div class='ctx'> 	amdgpu_ctx_mgr_init(&amp;fpriv-&gt;ctx_mgr, adev);</div><div class='ctx'> </div><div class='ctx'> 	file_priv-&gt;driver_priv = fpriv;</div><div class='hunk'>@@ -1445,6 +1502,11 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,</div><div class='ctx'> 		amdgpu_bo_unreserve(pd);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!fpriv-&gt;evf_mgr.fd_closing) {</div><div class='add'>+		fpriv-&gt;evf_mgr.fd_closing = true;</div><div class='add'>+		amdgpu_userq_mgr_fini(&amp;fpriv-&gt;userq_mgr);</div><div class='add'>+		amdgpu_eviction_fence_destroy(&amp;fpriv-&gt;evf_mgr);</div><div class='add'>+	}</div><div class='ctx'> 	amdgpu_ctx_mgr_fini(&amp;fpriv-&gt;ctx_mgr);</div><div class='ctx'> 	amdgpu_vm_fini(adev, &amp;fpriv-&gt;vm);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br/>index fb212f0a1136..2febb63ab232 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c</a></div><div class='hunk'>@@ -39,42 +39,6 @@ int amdgpu_mes_doorbell_process_slice(struct amdgpu_device *adev)</div><div class='ctx'> 		       PAGE_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amdgpu_mes_kernel_doorbell_get(struct amdgpu_device *adev,</div><div class='del'>-					 int ip_type, uint64_t *doorbell_index)</div><div class='del'>-{</div><div class='del'>-	unsigned int offset, found;</div><div class='del'>-	struct amdgpu_mes *mes = &amp;adev-&gt;mes;</div><div class='del'>-</div><div class='del'>-	if (ip_type == AMDGPU_RING_TYPE_SDMA)</div><div class='del'>-		offset = adev-&gt;doorbell_index.sdma_engine[0];</div><div class='del'>-	else</div><div class='del'>-		offset = 0;</div><div class='del'>-</div><div class='del'>-	found = find_next_zero_bit(mes-&gt;doorbell_bitmap, mes-&gt;num_mes_dbs, offset);</div><div class='del'>-	if (found &gt;= mes-&gt;num_mes_dbs) {</div><div class='del'>-		DRM_WARN("No doorbell available\n");</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	set_bit(found, mes-&gt;doorbell_bitmap);</div><div class='del'>-</div><div class='del'>-	/* Get the absolute doorbell index on BAR */</div><div class='del'>-	*doorbell_index = mes-&gt;db_start_dw_offset + found * 2;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void amdgpu_mes_kernel_doorbell_free(struct amdgpu_device *adev,</div><div class='del'>-					   uint32_t doorbell_index)</div><div class='del'>-{</div><div class='del'>-	unsigned int old, rel_index;</div><div class='del'>-	struct amdgpu_mes *mes = &amp;adev-&gt;mes;</div><div class='del'>-</div><div class='del'>-	/* Find the relative index of the doorbell in this object */</div><div class='del'>-	rel_index = (doorbell_index - mes-&gt;db_start_dw_offset) / 2;</div><div class='del'>-	old = test_and_clear_bit(rel_index, mes-&gt;doorbell_bitmap);</div><div class='del'>-	WARN_ON(!old);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -126,7 +90,7 @@ static void amdgpu_mes_doorbell_free(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> int amdgpu_mes_init(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	int i, r;</div><div class='add'>+	int i, r, num_pipes;</div><div class='ctx'> </div><div class='ctx'> 	adev-&gt;mes.adev = adev;</div><div class='ctx'> </div><div class='hunk'>@@ -142,19 +106,52 @@ int amdgpu_mes_init(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	adev-&gt;mes.total_max_queue = AMDGPU_FENCE_MES_QUEUE_ID_MASK;</div><div class='ctx'> 	adev-&gt;mes.vmid_mask_mmhub = 0xffffff00;</div><div class='del'>-	adev-&gt;mes.vmid_mask_gfxhub = 0xffffff00;</div><div class='add'>+	adev-&gt;mes.vmid_mask_gfxhub = adev-&gt;gfx.disable_kq ? 0xfffffffe : 0xffffff00;</div><div class='add'>+</div><div class='add'>+	num_pipes = adev-&gt;gfx.me.num_pipe_per_me * adev-&gt;gfx.me.num_me;</div><div class='add'>+	if (num_pipes &gt; AMDGPU_MES_MAX_GFX_PIPES)</div><div class='add'>+		dev_warn(adev-&gt;dev, "more gfx pipes than supported by MES! (%d vs %d)\n",</div><div class='add'>+			 num_pipes, AMDGPU_MES_MAX_GFX_PIPES);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AMDGPU_MES_MAX_GFX_PIPES; i++) {</div><div class='add'>+		if (i &gt;= num_pipes)</div><div class='add'>+			break;</div><div class='add'>+		if (amdgpu_ip_version(adev, GC_HWIP, 0) &gt;=</div><div class='add'>+		    IP_VERSION(12, 0, 0))</div><div class='add'>+			/*</div><div class='add'>+			 * GFX V12 has only one GFX pipe, but 8 queues in it.</div><div class='add'>+			 * GFX pipe 0 queue 0 is being used by Kernel queue.</div><div class='add'>+			 * Set GFX pipe 0 queue 1-7 for MES scheduling</div><div class='add'>+			 * mask = 1111 1110b</div><div class='add'>+			 */</div><div class='add'>+			adev-&gt;mes.gfx_hqd_mask[i] = adev-&gt;gfx.disable_kq ? 0xFF : 0xFE;</div><div class='add'>+		else</div><div class='add'>+			/*</div><div class='add'>+			 * GFX pipe 0 queue 0 is being used by Kernel queue.</div><div class='add'>+			 * Set GFX pipe 0 queue 1 for MES scheduling</div><div class='add'>+			 * mask = 10b</div><div class='add'>+			 */</div><div class='add'>+			adev-&gt;mes.gfx_hqd_mask[i] = adev-&gt;gfx.disable_kq ? 0x3 : 0x2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_pipes = adev-&gt;gfx.mec.num_pipe_per_mec * adev-&gt;gfx.mec.num_mec;</div><div class='add'>+	if (num_pipes &gt; AMDGPU_MES_MAX_COMPUTE_PIPES)</div><div class='add'>+		dev_warn(adev-&gt;dev, "more compute pipes than supported by MES! (%d vs %d)\n",</div><div class='add'>+			 num_pipes, AMDGPU_MES_MAX_COMPUTE_PIPES);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; AMDGPU_MES_MAX_COMPUTE_PIPES; i++) {</div><div class='del'>-		if (i &gt;= (adev-&gt;gfx.mec.num_pipe_per_mec * adev-&gt;gfx.mec.num_mec))</div><div class='add'>+		if (i &gt;= num_pipes)</div><div class='ctx'> 			break;</div><div class='del'>-		adev-&gt;mes.compute_hqd_mask[i] = 0xc;</div><div class='add'>+		adev-&gt;mes.compute_hqd_mask[i] = adev-&gt;gfx.disable_kq ? 0xF : 0xC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; AMDGPU_MES_MAX_GFX_PIPES; i++)</div><div class='del'>-		adev-&gt;mes.gfx_hqd_mask[i] = i ? 0 : 0xfffffffe;</div><div class='add'>+	num_pipes = adev-&gt;sdma.num_instances;</div><div class='add'>+	if (num_pipes &gt; AMDGPU_MES_MAX_SDMA_PIPES)</div><div class='add'>+		dev_warn(adev-&gt;dev, "more SDMA pipes than supported by MES! (%d vs %d)\n",</div><div class='add'>+			 num_pipes, AMDGPU_MES_MAX_SDMA_PIPES);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; AMDGPU_MES_MAX_SDMA_PIPES; i++) {</div><div class='del'>-		if (i &gt;= adev-&gt;sdma.num_instances)</div><div class='add'>+		if (i &gt;= num_pipes)</div><div class='ctx'> 			break;</div><div class='ctx'> 		adev-&gt;mes.sdma_hqd_mask[i] = 0xfc;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -240,244 +237,6 @@ void amdgpu_mes_fini(struct amdgpu_device *adev)</div><div class='ctx'> 	mutex_destroy(&amp;adev-&gt;mes.mutex_hidden);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amdgpu_mes_queue_free_mqd(struct amdgpu_mes_queue *q)</div><div class='del'>-{</div><div class='del'>-	amdgpu_bo_free_kernel(&amp;q-&gt;mqd_obj,</div><div class='del'>-			      &amp;q-&gt;mqd_gpu_addr,</div><div class='del'>-			      &amp;q-&gt;mqd_cpu_ptr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_create_process(struct amdgpu_device *adev, int pasid,</div><div class='del'>-			      struct amdgpu_vm *vm)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_mes_process *process;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	/* allocate the mes process buffer */</div><div class='del'>-	process = kzalloc(sizeof(struct amdgpu_mes_process), GFP_KERNEL);</div><div class='del'>-	if (!process) {</div><div class='del'>-		DRM_ERROR("no more memory to create mes process\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate the process context bo and map it */</div><div class='del'>-	r = amdgpu_bo_create_kernel(adev, AMDGPU_MES_PROC_CTX_SIZE, PAGE_SIZE,</div><div class='del'>-				    AMDGPU_GEM_DOMAIN_GTT,</div><div class='del'>-				    &amp;process-&gt;proc_ctx_bo,</div><div class='del'>-				    &amp;process-&gt;proc_ctx_gpu_addr,</div><div class='del'>-				    &amp;process-&gt;proc_ctx_cpu_ptr);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to allocate process context bo\n");</div><div class='del'>-		goto clean_up_memory;</div><div class='del'>-	}</div><div class='del'>-	memset(process-&gt;proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	/* add the mes process to idr list */</div><div class='del'>-	r = idr_alloc(&amp;adev-&gt;mes.pasid_idr, process, pasid, pasid + 1,</div><div class='del'>-		      GFP_KERNEL);</div><div class='del'>-	if (r &lt; 0) {</div><div class='del'>-		DRM_ERROR("failed to lock pasid=%d\n", pasid);</div><div class='del'>-		goto clean_up_ctx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;process-&gt;gang_list);</div><div class='del'>-	process-&gt;vm = vm;</div><div class='del'>-	process-&gt;pasid = pasid;</div><div class='del'>-	process-&gt;process_quantum = adev-&gt;mes.default_process_quantum;</div><div class='del'>-	process-&gt;pd_gpu_addr = amdgpu_bo_gpu_offset(vm-&gt;root.bo);</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-clean_up_ctx:</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-	amdgpu_bo_free_kernel(&amp;process-&gt;proc_ctx_bo,</div><div class='del'>-			      &amp;process-&gt;proc_ctx_gpu_addr,</div><div class='del'>-			      &amp;process-&gt;proc_ctx_cpu_ptr);</div><div class='del'>-clean_up_memory:</div><div class='del'>-	kfree(process);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void amdgpu_mes_destroy_process(struct amdgpu_device *adev, int pasid)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_mes_process *process;</div><div class='del'>-	struct amdgpu_mes_gang *gang, *tmp1;</div><div class='del'>-	struct amdgpu_mes_queue *queue, *tmp2;</div><div class='del'>-	struct mes_remove_queue_input queue_input;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	process = idr_find(&amp;adev-&gt;mes.pasid_idr, pasid);</div><div class='del'>-	if (!process) {</div><div class='del'>-		DRM_WARN("pasid %d doesn't exist\n", pasid);</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Remove all queues from hardware */</div><div class='del'>-	list_for_each_entry_safe(gang, tmp1, &amp;process-&gt;gang_list, list) {</div><div class='del'>-		list_for_each_entry_safe(queue, tmp2, &amp;gang-&gt;queue_list, list) {</div><div class='del'>-			spin_lock_irqsave(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-			idr_remove(&amp;adev-&gt;mes.queue_id_idr, queue-&gt;queue_id);</div><div class='del'>-			spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-</div><div class='del'>-			queue_input.doorbell_offset = queue-&gt;doorbell_off;</div><div class='del'>-			queue_input.gang_context_addr = gang-&gt;gang_ctx_gpu_addr;</div><div class='del'>-</div><div class='del'>-			r = adev-&gt;mes.funcs-&gt;remove_hw_queue(&amp;adev-&gt;mes,</div><div class='del'>-							     &amp;queue_input);</div><div class='del'>-			if (r)</div><div class='del'>-				DRM_WARN("failed to remove hardware queue\n");</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		idr_remove(&amp;adev-&gt;mes.gang_id_idr, gang-&gt;gang_id);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	idr_remove(&amp;adev-&gt;mes.pasid_idr, pasid);</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	/* free all memory allocated by the process */</div><div class='del'>-	list_for_each_entry_safe(gang, tmp1, &amp;process-&gt;gang_list, list) {</div><div class='del'>-		/* free all queues in the gang */</div><div class='del'>-		list_for_each_entry_safe(queue, tmp2, &amp;gang-&gt;queue_list, list) {</div><div class='del'>-			amdgpu_mes_queue_free_mqd(queue);</div><div class='del'>-			list_del(&amp;queue-&gt;list);</div><div class='del'>-			kfree(queue);</div><div class='del'>-		}</div><div class='del'>-		amdgpu_bo_free_kernel(&amp;gang-&gt;gang_ctx_bo,</div><div class='del'>-				      &amp;gang-&gt;gang_ctx_gpu_addr,</div><div class='del'>-				      &amp;gang-&gt;gang_ctx_cpu_ptr);</div><div class='del'>-		list_del(&amp;gang-&gt;list);</div><div class='del'>-		kfree(gang);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-	amdgpu_bo_free_kernel(&amp;process-&gt;proc_ctx_bo,</div><div class='del'>-			      &amp;process-&gt;proc_ctx_gpu_addr,</div><div class='del'>-			      &amp;process-&gt;proc_ctx_cpu_ptr);</div><div class='del'>-	kfree(process);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_add_gang(struct amdgpu_device *adev, int pasid,</div><div class='del'>-			struct amdgpu_mes_gang_properties *gprops,</div><div class='del'>-			int *gang_id)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_mes_process *process;</div><div class='del'>-	struct amdgpu_mes_gang *gang;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	/* allocate the mes gang buffer */</div><div class='del'>-	gang = kzalloc(sizeof(struct amdgpu_mes_gang), GFP_KERNEL);</div><div class='del'>-	if (!gang) {</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate the gang context bo and map it to cpu space */</div><div class='del'>-	r = amdgpu_bo_create_kernel(adev, AMDGPU_MES_GANG_CTX_SIZE, PAGE_SIZE,</div><div class='del'>-				    AMDGPU_GEM_DOMAIN_GTT,</div><div class='del'>-				    &amp;gang-&gt;gang_ctx_bo,</div><div class='del'>-				    &amp;gang-&gt;gang_ctx_gpu_addr,</div><div class='del'>-				    &amp;gang-&gt;gang_ctx_cpu_ptr);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to allocate process context bo\n");</div><div class='del'>-		goto clean_up_mem;</div><div class='del'>-	}</div><div class='del'>-	memset(gang-&gt;gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	process = idr_find(&amp;adev-&gt;mes.pasid_idr, pasid);</div><div class='del'>-	if (!process) {</div><div class='del'>-		DRM_ERROR("pasid %d doesn't exist\n", pasid);</div><div class='del'>-		r = -EINVAL;</div><div class='del'>-		goto clean_up_ctx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* add the mes gang to idr list */</div><div class='del'>-	r = idr_alloc(&amp;adev-&gt;mes.gang_id_idr, gang, 1, 0,</div><div class='del'>-		      GFP_KERNEL);</div><div class='del'>-	if (r &lt; 0) {</div><div class='del'>-		DRM_ERROR("failed to allocate idr for gang\n");</div><div class='del'>-		goto clean_up_ctx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gang-&gt;gang_id = r;</div><div class='del'>-	*gang_id = r;</div><div class='del'>-</div><div class='del'>-	INIT_LIST_HEAD(&amp;gang-&gt;queue_list);</div><div class='del'>-	gang-&gt;process = process;</div><div class='del'>-	gang-&gt;priority = gprops-&gt;priority;</div><div class='del'>-	gang-&gt;gang_quantum = gprops-&gt;gang_quantum ?</div><div class='del'>-		gprops-&gt;gang_quantum : adev-&gt;mes.default_gang_quantum;</div><div class='del'>-	gang-&gt;global_priority_level = gprops-&gt;global_priority_level;</div><div class='del'>-	gang-&gt;inprocess_gang_priority = gprops-&gt;inprocess_gang_priority;</div><div class='del'>-	list_add_tail(&amp;gang-&gt;list, &amp;process-&gt;gang_list);</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-clean_up_ctx:</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-	amdgpu_bo_free_kernel(&amp;gang-&gt;gang_ctx_bo,</div><div class='del'>-			      &amp;gang-&gt;gang_ctx_gpu_addr,</div><div class='del'>-			      &amp;gang-&gt;gang_ctx_cpu_ptr);</div><div class='del'>-clean_up_mem:</div><div class='del'>-	kfree(gang);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_remove_gang(struct amdgpu_device *adev, int gang_id)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_mes_gang *gang;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	gang = idr_find(&amp;adev-&gt;mes.gang_id_idr, gang_id);</div><div class='del'>-	if (!gang) {</div><div class='del'>-		DRM_ERROR("gang id %d doesn't exist\n", gang_id);</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!list_empty(&amp;gang-&gt;queue_list)) {</div><div class='del'>-		DRM_ERROR("queue list is not empty\n");</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	idr_remove(&amp;adev-&gt;mes.gang_id_idr, gang-&gt;gang_id);</div><div class='del'>-	list_del(&amp;gang-&gt;list);</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	amdgpu_bo_free_kernel(&amp;gang-&gt;gang_ctx_bo,</div><div class='del'>-			      &amp;gang-&gt;gang_ctx_gpu_addr,</div><div class='del'>-			      &amp;gang-&gt;gang_ctx_cpu_ptr);</div><div class='del'>-</div><div class='del'>-	kfree(gang);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int amdgpu_mes_suspend(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mes_suspend_gang_input input;</div><div class='hunk'>@@ -526,304 +285,6 @@ int amdgpu_mes_resume(struct amdgpu_device *adev)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amdgpu_mes_queue_alloc_mqd(struct amdgpu_device *adev,</div><div class='del'>-				     struct amdgpu_mes_queue *q,</div><div class='del'>-				     struct amdgpu_mes_queue_properties *p)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_mqd *mqd_mgr = &amp;adev-&gt;mqds[p-&gt;queue_type];</div><div class='del'>-	u32 mqd_size = mqd_mgr-&gt;mqd_size;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,</div><div class='del'>-				    AMDGPU_GEM_DOMAIN_GTT,</div><div class='del'>-				    &amp;q-&gt;mqd_obj,</div><div class='del'>-				    &amp;q-&gt;mqd_gpu_addr, &amp;q-&gt;mqd_cpu_ptr);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_warn(adev-&gt;dev, "failed to create queue mqd bo (%d)", r);</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-	memset(q-&gt;mqd_cpu_ptr, 0, mqd_size);</div><div class='del'>-</div><div class='del'>-	r = amdgpu_bo_reserve(q-&gt;mqd_obj, false);</div><div class='del'>-	if (unlikely(r != 0))</div><div class='del'>-		goto clean_up;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-clean_up:</div><div class='del'>-	amdgpu_bo_free_kernel(&amp;q-&gt;mqd_obj,</div><div class='del'>-			      &amp;q-&gt;mqd_gpu_addr,</div><div class='del'>-			      &amp;q-&gt;mqd_cpu_ptr);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void amdgpu_mes_queue_init_mqd(struct amdgpu_device *adev,</div><div class='del'>-				     struct amdgpu_mes_queue *q,</div><div class='del'>-				     struct amdgpu_mes_queue_properties *p)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_mqd *mqd_mgr = &amp;adev-&gt;mqds[p-&gt;queue_type];</div><div class='del'>-	struct amdgpu_mqd_prop mqd_prop = {0};</div><div class='del'>-</div><div class='del'>-	mqd_prop.mqd_gpu_addr = q-&gt;mqd_gpu_addr;</div><div class='del'>-	mqd_prop.hqd_base_gpu_addr = p-&gt;hqd_base_gpu_addr;</div><div class='del'>-	mqd_prop.rptr_gpu_addr = p-&gt;rptr_gpu_addr;</div><div class='del'>-	mqd_prop.wptr_gpu_addr = p-&gt;wptr_gpu_addr;</div><div class='del'>-	mqd_prop.queue_size = p-&gt;queue_size;</div><div class='del'>-	mqd_prop.use_doorbell = true;</div><div class='del'>-	mqd_prop.doorbell_index = p-&gt;doorbell_off;</div><div class='del'>-	mqd_prop.eop_gpu_addr = p-&gt;eop_gpu_addr;</div><div class='del'>-	mqd_prop.hqd_pipe_priority = p-&gt;hqd_pipe_priority;</div><div class='del'>-	mqd_prop.hqd_queue_priority = p-&gt;hqd_queue_priority;</div><div class='del'>-	mqd_prop.hqd_active = false;</div><div class='del'>-</div><div class='del'>-	if (p-&gt;queue_type == AMDGPU_RING_TYPE_GFX ||</div><div class='del'>-	    p-&gt;queue_type == AMDGPU_RING_TYPE_COMPUTE) {</div><div class='del'>-		mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='del'>-		amdgpu_gfx_select_me_pipe_q(adev, p-&gt;ring-&gt;me, p-&gt;ring-&gt;pipe, 0, 0, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mqd_mgr-&gt;init_mqd(adev, q-&gt;mqd_cpu_ptr, &amp;mqd_prop);</div><div class='del'>-</div><div class='del'>-	if (p-&gt;queue_type == AMDGPU_RING_TYPE_GFX ||</div><div class='del'>-	    p-&gt;queue_type == AMDGPU_RING_TYPE_COMPUTE) {</div><div class='del'>-		amdgpu_gfx_select_me_pipe_q(adev, 0, 0, 0, 0, 0);</div><div class='del'>-		mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	amdgpu_bo_unreserve(q-&gt;mqd_obj);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,</div><div class='del'>-			    struct amdgpu_mes_queue_properties *qprops,</div><div class='del'>-			    int *queue_id)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_mes_queue *queue;</div><div class='del'>-	struct amdgpu_mes_gang *gang;</div><div class='del'>-	struct mes_add_queue_input queue_input;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	memset(&amp;queue_input, 0, sizeof(struct mes_add_queue_input));</div><div class='del'>-</div><div class='del'>-	/* allocate the mes queue buffer */</div><div class='del'>-	queue = kzalloc(sizeof(struct amdgpu_mes_queue), GFP_KERNEL);</div><div class='del'>-	if (!queue) {</div><div class='del'>-		DRM_ERROR("Failed to allocate memory for queue\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allocate the queue mqd */</div><div class='del'>-	r = amdgpu_mes_queue_alloc_mqd(adev, queue, qprops);</div><div class='del'>-	if (r)</div><div class='del'>-		goto clean_up_memory;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	gang = idr_find(&amp;adev-&gt;mes.gang_id_idr, gang_id);</div><div class='del'>-	if (!gang) {</div><div class='del'>-		DRM_ERROR("gang id %d doesn't exist\n", gang_id);</div><div class='del'>-		r = -EINVAL;</div><div class='del'>-		goto clean_up_mqd;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* add the mes gang to idr list */</div><div class='del'>-	spin_lock_irqsave(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-	r = idr_alloc(&amp;adev-&gt;mes.queue_id_idr, queue, 1, 0,</div><div class='del'>-		      GFP_ATOMIC);</div><div class='del'>-	if (r &lt; 0) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-		goto clean_up_mqd;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-	*queue_id = queue-&gt;queue_id = r;</div><div class='del'>-</div><div class='del'>-	/* allocate a doorbell index for the queue */</div><div class='del'>-	r = amdgpu_mes_kernel_doorbell_get(adev,</div><div class='del'>-					  qprops-&gt;queue_type,</div><div class='del'>-					  &amp;qprops-&gt;doorbell_off);</div><div class='del'>-	if (r)</div><div class='del'>-		goto clean_up_queue_id;</div><div class='del'>-</div><div class='del'>-	/* initialize the queue mqd */</div><div class='del'>-	amdgpu_mes_queue_init_mqd(adev, queue, qprops);</div><div class='del'>-</div><div class='del'>-	/* add hw queue to mes */</div><div class='del'>-	queue_input.process_id = gang-&gt;process-&gt;pasid;</div><div class='del'>-</div><div class='del'>-	queue_input.page_table_base_addr =</div><div class='del'>-		adev-&gt;vm_manager.vram_base_offset + gang-&gt;process-&gt;pd_gpu_addr -</div><div class='del'>-		adev-&gt;gmc.vram_start;</div><div class='del'>-</div><div class='del'>-	queue_input.process_va_start = 0;</div><div class='del'>-	queue_input.process_va_end =</div><div class='del'>-		(adev-&gt;vm_manager.max_pfn - 1) &lt;&lt; AMDGPU_GPU_PAGE_SHIFT;</div><div class='del'>-	queue_input.process_quantum = gang-&gt;process-&gt;process_quantum;</div><div class='del'>-	queue_input.process_context_addr = gang-&gt;process-&gt;proc_ctx_gpu_addr;</div><div class='del'>-	queue_input.gang_quantum = gang-&gt;gang_quantum;</div><div class='del'>-	queue_input.gang_context_addr = gang-&gt;gang_ctx_gpu_addr;</div><div class='del'>-	queue_input.inprocess_gang_priority = gang-&gt;inprocess_gang_priority;</div><div class='del'>-	queue_input.gang_global_priority_level = gang-&gt;global_priority_level;</div><div class='del'>-	queue_input.doorbell_offset = qprops-&gt;doorbell_off;</div><div class='del'>-	queue_input.mqd_addr = queue-&gt;mqd_gpu_addr;</div><div class='del'>-	queue_input.wptr_addr = qprops-&gt;wptr_gpu_addr;</div><div class='del'>-	queue_input.wptr_mc_addr = qprops-&gt;wptr_mc_addr;</div><div class='del'>-	queue_input.queue_type = qprops-&gt;queue_type;</div><div class='del'>-	queue_input.paging = qprops-&gt;paging;</div><div class='del'>-	queue_input.is_kfd_process = 0;</div><div class='del'>-</div><div class='del'>-	r = adev-&gt;mes.funcs-&gt;add_hw_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to add hardware queue to MES, doorbell=0x%llx\n",</div><div class='del'>-			  qprops-&gt;doorbell_off);</div><div class='del'>-		goto clean_up_doorbell;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG("MES hw queue was added, pasid=%d, gang id=%d, "</div><div class='del'>-		  "queue type=%d, doorbell=0x%llx\n",</div><div class='del'>-		  gang-&gt;process-&gt;pasid, gang_id, qprops-&gt;queue_type,</div><div class='del'>-		  qprops-&gt;doorbell_off);</div><div class='del'>-</div><div class='del'>-	queue-&gt;ring = qprops-&gt;ring;</div><div class='del'>-	queue-&gt;doorbell_off = qprops-&gt;doorbell_off;</div><div class='del'>-	queue-&gt;wptr_gpu_addr = qprops-&gt;wptr_gpu_addr;</div><div class='del'>-	queue-&gt;queue_type = qprops-&gt;queue_type;</div><div class='del'>-	queue-&gt;paging = qprops-&gt;paging;</div><div class='del'>-	queue-&gt;gang = gang;</div><div class='del'>-	queue-&gt;ring-&gt;mqd_ptr = queue-&gt;mqd_cpu_ptr;</div><div class='del'>-	list_add_tail(&amp;queue-&gt;list, &amp;gang-&gt;queue_list);</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-clean_up_doorbell:</div><div class='del'>-	amdgpu_mes_kernel_doorbell_free(adev, qprops-&gt;doorbell_off);</div><div class='del'>-clean_up_queue_id:</div><div class='del'>-	spin_lock_irqsave(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-	idr_remove(&amp;adev-&gt;mes.queue_id_idr, queue-&gt;queue_id);</div><div class='del'>-	spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-clean_up_mqd:</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-	amdgpu_mes_queue_free_mqd(queue);</div><div class='del'>-clean_up_memory:</div><div class='del'>-	kfree(queue);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct amdgpu_mes_queue *queue;</div><div class='del'>-	struct amdgpu_mes_gang *gang;</div><div class='del'>-	struct mes_remove_queue_input queue_input;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	/* remove the mes gang from idr list */</div><div class='del'>-	spin_lock_irqsave(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-</div><div class='del'>-	queue = idr_find(&amp;adev-&gt;mes.queue_id_idr, queue_id);</div><div class='del'>-	if (!queue) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		DRM_ERROR("queue id %d doesn't exist\n", queue_id);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	idr_remove(&amp;adev-&gt;mes.queue_id_idr, queue_id);</div><div class='del'>-	spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG("try to remove queue, doorbell off = 0x%llx\n",</div><div class='del'>-		  queue-&gt;doorbell_off);</div><div class='del'>-</div><div class='del'>-	gang = queue-&gt;gang;</div><div class='del'>-	queue_input.doorbell_offset = queue-&gt;doorbell_off;</div><div class='del'>-	queue_input.gang_context_addr = gang-&gt;gang_ctx_gpu_addr;</div><div class='del'>-</div><div class='del'>-	r = adev-&gt;mes.funcs-&gt;remove_hw_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='del'>-	if (r)</div><div class='del'>-		DRM_ERROR("failed to remove hardware queue, queue id = %d\n",</div><div class='del'>-			  queue_id);</div><div class='del'>-</div><div class='del'>-	list_del(&amp;queue-&gt;list);</div><div class='del'>-	amdgpu_mes_kernel_doorbell_free(adev, queue-&gt;doorbell_off);</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_queue_free_mqd(queue);</div><div class='del'>-	kfree(queue);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_reset_hw_queue(struct amdgpu_device *adev, int queue_id)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct amdgpu_mes_queue *queue;</div><div class='del'>-	struct amdgpu_mes_gang *gang;</div><div class='del'>-	struct mes_reset_queue_input queue_input;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	/* remove the mes gang from idr list */</div><div class='del'>-	spin_lock_irqsave(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-</div><div class='del'>-	queue = idr_find(&amp;adev-&gt;mes.queue_id_idr, queue_id);</div><div class='del'>-	if (!queue) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		DRM_ERROR("queue id %d doesn't exist\n", queue_id);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;adev-&gt;mes.queue_id_lock, flags);</div><div class='del'>-</div><div class='del'>-	DRM_DEBUG("try to reset queue, doorbell off = 0x%llx\n",</div><div class='del'>-		  queue-&gt;doorbell_off);</div><div class='del'>-</div><div class='del'>-	gang = queue-&gt;gang;</div><div class='del'>-	queue_input.doorbell_offset = queue-&gt;doorbell_off;</div><div class='del'>-	queue_input.gang_context_addr = gang-&gt;gang_ctx_gpu_addr;</div><div class='del'>-</div><div class='del'>-	r = adev-&gt;mes.funcs-&gt;reset_hw_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='del'>-	if (r)</div><div class='del'>-		DRM_ERROR("failed to reset hardware queue, queue id = %d\n",</div><div class='del'>-			  queue_id);</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_reset_hw_queue_mmio(struct amdgpu_device *adev, int queue_type,</div><div class='del'>-				   int me_id, int pipe_id, int queue_id, int vmid)</div><div class='del'>-{</div><div class='del'>-	struct mes_reset_queue_input queue_input;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	queue_input.queue_type = queue_type;</div><div class='del'>-	queue_input.use_mmio = true;</div><div class='del'>-	queue_input.me_id = me_id;</div><div class='del'>-	queue_input.pipe_id = pipe_id;</div><div class='del'>-	queue_input.queue_id = queue_id;</div><div class='del'>-	queue_input.vmid = vmid;</div><div class='del'>-	r = adev-&gt;mes.funcs-&gt;reset_hw_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='del'>-	if (r)</div><div class='del'>-		DRM_ERROR("failed to reset hardware queue by mmio, queue id = %d\n",</div><div class='del'>-			  queue_id);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,</div><div class='ctx'> 				struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -874,7 +335,7 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,</div><div class='ctx'> 				  unsigned int vmid,</div><div class='ctx'> 				  bool use_mmio)</div><div class='ctx'> {</div><div class='del'>-	struct mes_reset_legacy_queue_input queue_input;</div><div class='add'>+	struct mes_reset_queue_input queue_input;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;queue_input, 0, sizeof(queue_input));</div><div class='hunk'>@@ -888,8 +349,11 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,</div><div class='ctx'> 	queue_input.wptr_addr = ring-&gt;wptr_gpu_addr;</div><div class='ctx'> 	queue_input.vmid = vmid;</div><div class='ctx'> 	queue_input.use_mmio = use_mmio;</div><div class='add'>+	queue_input.is_kq = true;</div><div class='add'>+	if (ring-&gt;funcs-&gt;type == AMDGPU_RING_TYPE_GFX)</div><div class='add'>+		queue_input.legacy_gfx = true;</div><div class='ctx'> </div><div class='del'>-	r = adev-&gt;mes.funcs-&gt;reset_legacy_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='add'>+	r = adev-&gt;mes.funcs-&gt;reset_hw_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		DRM_ERROR("failed to reset legacy queue\n");</div><div class='ctx'> </div><div class='hunk'>@@ -905,7 +369,7 @@ uint32_t amdgpu_mes_rreg(struct amdgpu_device *adev, uint32_t reg)</div><div class='ctx'> 	uint32_t *read_val_ptr;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_device_wb_get(adev, &amp;addr_offset)) {</div><div class='del'>-		DRM_ERROR("critical bug! too many mes readers\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "critical bug! too many mes readers\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> 	read_val_gpu_addr = adev-&gt;wb.gpu_addr + (addr_offset * 4);</div><div class='hunk'>@@ -915,13 +379,13 @@ uint32_t amdgpu_mes_rreg(struct amdgpu_device *adev, uint32_t reg)</div><div class='ctx'> 	op_input.read_reg.buffer_addr = read_val_gpu_addr;</div><div class='ctx'> </div><div class='ctx'> 	if (!adev-&gt;mes.funcs-&gt;misc_op) {</div><div class='del'>-		DRM_ERROR("mes rreg is not supported!\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "mes rreg is not supported!\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = adev-&gt;mes.funcs-&gt;misc_op(&amp;adev-&gt;mes, &amp;op_input);</div><div class='ctx'> 	if (r)</div><div class='del'>-		DRM_ERROR("failed to read reg (0x%x)\n", reg);</div><div class='add'>+		dev_err(adev-&gt;dev, "failed to read reg (0x%x)\n", reg);</div><div class='ctx'> 	else</div><div class='ctx'> 		val = *(read_val_ptr);</div><div class='ctx'> </div><div class='hunk'>@@ -942,14 +406,14 @@ int amdgpu_mes_wreg(struct amdgpu_device *adev,</div><div class='ctx'> 	op_input.write_reg.reg_value = val;</div><div class='ctx'> </div><div class='ctx'> 	if (!adev-&gt;mes.funcs-&gt;misc_op) {</div><div class='del'>-		DRM_ERROR("mes wreg is not supported!\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "mes wreg is not supported!\n");</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = adev-&gt;mes.funcs-&gt;misc_op(&amp;adev-&gt;mes, &amp;op_input);</div><div class='ctx'> 	if (r)</div><div class='del'>-		DRM_ERROR("failed to write reg (0x%x)\n", reg);</div><div class='add'>+		dev_err(adev-&gt;dev, "failed to write reg (0x%x)\n", reg);</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='ctx'> 	return r;</div><div class='hunk'>@@ -969,14 +433,14 @@ int amdgpu_mes_reg_write_reg_wait(struct amdgpu_device *adev,</div><div class='ctx'> 	op_input.wrm_reg.mask = mask;</div><div class='ctx'> </div><div class='ctx'> 	if (!adev-&gt;mes.funcs-&gt;misc_op) {</div><div class='del'>-		DRM_ERROR("mes reg_write_reg_wait is not supported!\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "mes reg_write_reg_wait is not supported!\n");</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = adev-&gt;mes.funcs-&gt;misc_op(&amp;adev-&gt;mes, &amp;op_input);</div><div class='ctx'> 	if (r)</div><div class='del'>-		DRM_ERROR("failed to reg_write_reg_wait\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "failed to reg_write_reg_wait\n");</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='ctx'> 	return r;</div><div class='hunk'>@@ -994,14 +458,14 @@ int amdgpu_mes_reg_wait(struct amdgpu_device *adev, uint32_t reg,</div><div class='ctx'> 	op_input.wrm_reg.mask = mask;</div><div class='ctx'> </div><div class='ctx'> 	if (!adev-&gt;mes.funcs-&gt;misc_op) {</div><div class='del'>-		DRM_ERROR("mes reg wait is not supported!\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "mes reg wait is not supported!\n");</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = adev-&gt;mes.funcs-&gt;misc_op(&amp;adev-&gt;mes, &amp;op_input);</div><div class='ctx'> 	if (r)</div><div class='del'>-		DRM_ERROR("failed to reg_write_reg_wait\n");</div><div class='add'>+		dev_err(adev-&gt;dev, "failed to reg_write_reg_wait\n");</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='ctx'> 	return r;</div><div class='hunk'>@@ -1075,25 +539,6 @@ int amdgpu_mes_flush_shader_debugger(struct amdgpu_device *adev,</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-amdgpu_mes_ring_to_queue_props(struct amdgpu_device *adev,</div><div class='del'>-			       struct amdgpu_ring *ring,</div><div class='del'>-			       struct amdgpu_mes_queue_properties *props)</div><div class='del'>-{</div><div class='del'>-	props-&gt;queue_type = ring-&gt;funcs-&gt;type;</div><div class='del'>-	props-&gt;hqd_base_gpu_addr = ring-&gt;gpu_addr;</div><div class='del'>-	props-&gt;rptr_gpu_addr = ring-&gt;rptr_gpu_addr;</div><div class='del'>-	props-&gt;wptr_gpu_addr = ring-&gt;wptr_gpu_addr;</div><div class='del'>-	props-&gt;wptr_mc_addr =</div><div class='del'>-		ring-&gt;mes_ctx-&gt;meta_data_mc_addr + ring-&gt;wptr_offs;</div><div class='del'>-	props-&gt;queue_size = ring-&gt;ring_size;</div><div class='del'>-	props-&gt;eop_gpu_addr = ring-&gt;eop_gpu_addr;</div><div class='del'>-	props-&gt;hqd_pipe_priority = AMDGPU_GFX_PIPE_PRIO_NORMAL;</div><div class='del'>-	props-&gt;hqd_queue_priority = AMDGPU_GFX_QUEUE_PRIORITY_MINIMUM;</div><div class='del'>-	props-&gt;paging = false;</div><div class='del'>-	props-&gt;ring = ring;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define DEFINE_AMDGPU_MES_CTX_GET_OFFS_ENG(_eng)			\</div><div class='ctx'> do {									\</div><div class='ctx'>        if (id_offs &lt; AMDGPU_MES_CTX_MAX_OFFS)				\</div><div class='hunk'>@@ -1130,453 +575,12 @@ int amdgpu_mes_ctx_get_offs(struct amdgpu_ring *ring, unsigned int id_offs)</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int amdgpu_mes_add_ring(struct amdgpu_device *adev, int gang_id,</div><div class='del'>-			int queue_type, int idx,</div><div class='del'>-			struct amdgpu_mes_ctx_data *ctx_data,</div><div class='del'>-			struct amdgpu_ring **out)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_ring *ring;</div><div class='del'>-	struct amdgpu_mes_gang *gang;</div><div class='del'>-	struct amdgpu_mes_queue_properties qprops = {0};</div><div class='del'>-	int r, queue_id, pasid;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Avoid taking any other locks under MES lock to avoid circular</div><div class='del'>-	 * lock dependencies.</div><div class='del'>-	 */</div><div class='del'>-	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='del'>-	gang = idr_find(&amp;adev-&gt;mes.gang_id_idr, gang_id);</div><div class='del'>-	if (!gang) {</div><div class='del'>-		DRM_ERROR("gang id %d doesn't exist\n", gang_id);</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	pasid = gang-&gt;process-&gt;pasid;</div><div class='del'>-</div><div class='del'>-	ring = kzalloc(sizeof(struct amdgpu_ring), GFP_KERNEL);</div><div class='del'>-	if (!ring) {</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ring-&gt;ring_obj = NULL;</div><div class='del'>-	ring-&gt;use_doorbell = true;</div><div class='del'>-	ring-&gt;is_mes_queue = true;</div><div class='del'>-	ring-&gt;mes_ctx = ctx_data;</div><div class='del'>-	ring-&gt;idx = idx;</div><div class='del'>-	ring-&gt;no_scheduler = true;</div><div class='del'>-</div><div class='del'>-	if (queue_type == AMDGPU_RING_TYPE_COMPUTE) {</div><div class='del'>-		int offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-				      compute[ring-&gt;idx].mec_hpd);</div><div class='del'>-		ring-&gt;eop_gpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (queue_type) {</div><div class='del'>-	case AMDGPU_RING_TYPE_GFX:</div><div class='del'>-		ring-&gt;funcs = adev-&gt;gfx.gfx_ring[0].funcs;</div><div class='del'>-		ring-&gt;me = adev-&gt;gfx.gfx_ring[0].me;</div><div class='del'>-		ring-&gt;pipe = adev-&gt;gfx.gfx_ring[0].pipe;</div><div class='del'>-		break;</div><div class='del'>-	case AMDGPU_RING_TYPE_COMPUTE:</div><div class='del'>-		ring-&gt;funcs = adev-&gt;gfx.compute_ring[0].funcs;</div><div class='del'>-		ring-&gt;me = adev-&gt;gfx.compute_ring[0].me;</div><div class='del'>-		ring-&gt;pipe = adev-&gt;gfx.compute_ring[0].pipe;</div><div class='del'>-		break;</div><div class='del'>-	case AMDGPU_RING_TYPE_SDMA:</div><div class='del'>-		ring-&gt;funcs = adev-&gt;sdma.instance[0].ring.funcs;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = amdgpu_ring_init(adev, ring, 1024, NULL, 0,</div><div class='del'>-			     AMDGPU_RING_PRIO_DEFAULT, NULL);</div><div class='del'>-	if (r) {</div><div class='del'>-		amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-		goto clean_up_memory;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_ring_to_queue_props(adev, ring, &amp;qprops);</div><div class='del'>-</div><div class='del'>-	dma_fence_wait(gang-&gt;process-&gt;vm-&gt;last_update, false);</div><div class='del'>-	dma_fence_wait(ctx_data-&gt;meta_data_va-&gt;last_pt_update, false);</div><div class='del'>-	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='del'>-</div><div class='del'>-	r = amdgpu_mes_add_hw_queue(adev, gang_id, &amp;qprops, &amp;queue_id);</div><div class='del'>-	if (r)</div><div class='del'>-		goto clean_up_ring;</div><div class='del'>-</div><div class='del'>-	ring-&gt;hw_queue_id = queue_id;</div><div class='del'>-	ring-&gt;doorbell_index = qprops.doorbell_off;</div><div class='del'>-</div><div class='del'>-	if (queue_type == AMDGPU_RING_TYPE_GFX)</div><div class='del'>-		sprintf(ring-&gt;name, "gfx_%d.%d.%d", pasid, gang_id, queue_id);</div><div class='del'>-	else if (queue_type == AMDGPU_RING_TYPE_COMPUTE)</div><div class='del'>-		sprintf(ring-&gt;name, "compute_%d.%d.%d", pasid, gang_id,</div><div class='del'>-			queue_id);</div><div class='del'>-	else if (queue_type == AMDGPU_RING_TYPE_SDMA)</div><div class='del'>-		sprintf(ring-&gt;name, "sdma_%d.%d.%d", pasid, gang_id,</div><div class='del'>-			queue_id);</div><div class='del'>-	else</div><div class='del'>-		BUG();</div><div class='del'>-</div><div class='del'>-	*out = ring;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-clean_up_ring:</div><div class='del'>-	amdgpu_ring_fini(ring);</div><div class='del'>-clean_up_memory:</div><div class='del'>-	kfree(ring);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void amdgpu_mes_remove_ring(struct amdgpu_device *adev,</div><div class='del'>-			    struct amdgpu_ring *ring)</div><div class='del'>-{</div><div class='del'>-	if (!ring)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_remove_hw_queue(adev, ring-&gt;hw_queue_id);</div><div class='del'>-	timer_delete_sync(&amp;ring-&gt;fence_drv.fallback_timer);</div><div class='del'>-	amdgpu_ring_fini(ring);</div><div class='del'>-	kfree(ring);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> uint32_t amdgpu_mes_get_aggregated_doorbell_index(struct amdgpu_device *adev,</div><div class='ctx'> 						   enum amdgpu_mes_priority_level prio)</div><div class='ctx'> {</div><div class='ctx'> 	return adev-&gt;mes.aggregated_doorbells[prio];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int amdgpu_mes_ctx_alloc_meta_data(struct amdgpu_device *adev,</div><div class='del'>-				   struct amdgpu_mes_ctx_data *ctx_data)</div><div class='del'>-{</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	r = amdgpu_bo_create_kernel(adev,</div><div class='del'>-			    sizeof(struct amdgpu_mes_ctx_meta_data),</div><div class='del'>-			    PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,</div><div class='del'>-			    &amp;ctx_data-&gt;meta_data_obj,</div><div class='del'>-			    &amp;ctx_data-&gt;meta_data_mc_addr,</div><div class='del'>-			    &amp;ctx_data-&gt;meta_data_ptr);</div><div class='del'>-	if (r) {</div><div class='del'>-		dev_warn(adev-&gt;dev, "(%d) create CTX bo failed\n", r);</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ctx_data-&gt;meta_data_obj)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	memset(ctx_data-&gt;meta_data_ptr, 0,</div><div class='del'>-	       sizeof(struct amdgpu_mes_ctx_meta_data));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void amdgpu_mes_ctx_free_meta_data(struct amdgpu_mes_ctx_data *ctx_data)</div><div class='del'>-{</div><div class='del'>-	if (ctx_data-&gt;meta_data_obj)</div><div class='del'>-		amdgpu_bo_free_kernel(&amp;ctx_data-&gt;meta_data_obj,</div><div class='del'>-				      &amp;ctx_data-&gt;meta_data_mc_addr,</div><div class='del'>-				      &amp;ctx_data-&gt;meta_data_ptr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device *adev,</div><div class='del'>-				 struct amdgpu_vm *vm,</div><div class='del'>-				 struct amdgpu_mes_ctx_data *ctx_data)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_bo_va *bo_va;</div><div class='del'>-	struct amdgpu_sync sync;</div><div class='del'>-	struct drm_exec exec;</div><div class='del'>-	int r;</div><div class='del'>-</div><div class='del'>-	amdgpu_sync_create(&amp;sync);</div><div class='del'>-</div><div class='del'>-	drm_exec_init(&amp;exec, 0, 0);</div><div class='del'>-	drm_exec_until_all_locked(&amp;exec) {</div><div class='del'>-		r = drm_exec_lock_obj(&amp;exec,</div><div class='del'>-				      &amp;ctx_data-&gt;meta_data_obj-&gt;tbo.base);</div><div class='del'>-		drm_exec_retry_on_contention(&amp;exec);</div><div class='del'>-		if (unlikely(r))</div><div class='del'>-			goto error_fini_exec;</div><div class='del'>-</div><div class='del'>-		r = amdgpu_vm_lock_pd(vm, &amp;exec, 0);</div><div class='del'>-		drm_exec_retry_on_contention(&amp;exec);</div><div class='del'>-		if (unlikely(r))</div><div class='del'>-			goto error_fini_exec;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bo_va = amdgpu_vm_bo_add(adev, vm, ctx_data-&gt;meta_data_obj);</div><div class='del'>-	if (!bo_va) {</div><div class='del'>-		DRM_ERROR("failed to create bo_va for meta data BO\n");</div><div class='del'>-		r = -ENOMEM;</div><div class='del'>-		goto error_fini_exec;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = amdgpu_vm_bo_map(adev, bo_va, ctx_data-&gt;meta_data_gpu_addr, 0,</div><div class='del'>-			     sizeof(struct amdgpu_mes_ctx_meta_data),</div><div class='del'>-			     AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |</div><div class='del'>-			     AMDGPU_PTE_EXECUTABLE);</div><div class='del'>-</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to do bo_map on meta data, err=%d\n", r);</div><div class='del'>-		goto error_del_bo_va;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = amdgpu_vm_bo_update(adev, bo_va, false);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to do vm_bo_update on meta data\n");</div><div class='del'>-		goto error_del_bo_va;</div><div class='del'>-	}</div><div class='del'>-	amdgpu_sync_fence(&amp;sync, bo_va-&gt;last_pt_update, GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	r = amdgpu_vm_update_pdes(adev, vm, false);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to update pdes on meta data\n");</div><div class='del'>-		goto error_del_bo_va;</div><div class='del'>-	}</div><div class='del'>-	amdgpu_sync_fence(&amp;sync, vm-&gt;last_update, GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	amdgpu_sync_wait(&amp;sync, false);</div><div class='del'>-	drm_exec_fini(&amp;exec);</div><div class='del'>-</div><div class='del'>-	amdgpu_sync_free(&amp;sync);</div><div class='del'>-	ctx_data-&gt;meta_data_va = bo_va;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error_del_bo_va:</div><div class='del'>-	amdgpu_vm_bo_del(adev, bo_va);</div><div class='del'>-</div><div class='del'>-error_fini_exec:</div><div class='del'>-	drm_exec_fini(&amp;exec);</div><div class='del'>-	amdgpu_sync_free(&amp;sync);</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_ctx_unmap_meta_data(struct amdgpu_device *adev,</div><div class='del'>-				   struct amdgpu_mes_ctx_data *ctx_data)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_bo_va *bo_va = ctx_data-&gt;meta_data_va;</div><div class='del'>-	struct amdgpu_bo *bo = ctx_data-&gt;meta_data_obj;</div><div class='del'>-	struct amdgpu_vm *vm = bo_va-&gt;base.vm;</div><div class='del'>-	struct dma_fence *fence;</div><div class='del'>-	struct drm_exec exec;</div><div class='del'>-	long r;</div><div class='del'>-</div><div class='del'>-	drm_exec_init(&amp;exec, 0, 0);</div><div class='del'>-	drm_exec_until_all_locked(&amp;exec) {</div><div class='del'>-		r = drm_exec_lock_obj(&amp;exec,</div><div class='del'>-				      &amp;ctx_data-&gt;meta_data_obj-&gt;tbo.base);</div><div class='del'>-		drm_exec_retry_on_contention(&amp;exec);</div><div class='del'>-		if (unlikely(r))</div><div class='del'>-			goto out_unlock;</div><div class='del'>-</div><div class='del'>-		r = amdgpu_vm_lock_pd(vm, &amp;exec, 0);</div><div class='del'>-		drm_exec_retry_on_contention(&amp;exec);</div><div class='del'>-		if (unlikely(r))</div><div class='del'>-			goto out_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	amdgpu_vm_bo_del(adev, bo_va);</div><div class='del'>-	if (!amdgpu_vm_ready(vm))</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	r = dma_resv_get_singleton(bo-&gt;tbo.base.resv, DMA_RESV_USAGE_BOOKKEEP,</div><div class='del'>-				   &amp;fence);</div><div class='del'>-	if (r)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-	if (fence) {</div><div class='del'>-		amdgpu_bo_fence(bo, fence, true);</div><div class='del'>-		fence = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = amdgpu_vm_clear_freed(adev, vm, &amp;fence);</div><div class='del'>-	if (r || !fence)</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	dma_fence_wait(fence, false);</div><div class='del'>-	amdgpu_bo_fence(bo, fence, true);</div><div class='del'>-	dma_fence_put(fence);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	if (unlikely(r &lt; 0))</div><div class='del'>-		dev_err(adev-&gt;dev, "failed to clear page tables (%ld)\n", r);</div><div class='del'>-	drm_exec_fini(&amp;exec);</div><div class='del'>-</div><div class='del'>-	return r;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int amdgpu_mes_test_create_gang_and_queues(struct amdgpu_device *adev,</div><div class='del'>-					  int pasid, int *gang_id,</div><div class='del'>-					  int queue_type, int num_queue,</div><div class='del'>-					  struct amdgpu_ring **added_rings,</div><div class='del'>-					  struct amdgpu_mes_ctx_data *ctx_data)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_ring *ring;</div><div class='del'>-	struct amdgpu_mes_gang_properties gprops = {0};</div><div class='del'>-	int r, j;</div><div class='del'>-</div><div class='del'>-	/* create a gang for the process */</div><div class='del'>-	gprops.priority = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;</div><div class='del'>-	gprops.gang_quantum = adev-&gt;mes.default_gang_quantum;</div><div class='del'>-	gprops.inprocess_gang_priority = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;</div><div class='del'>-	gprops.priority_level = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;</div><div class='del'>-	gprops.global_priority_level = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;</div><div class='del'>-</div><div class='del'>-	r = amdgpu_mes_add_gang(adev, pasid, &amp;gprops, gang_id);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to add gang\n");</div><div class='del'>-		return r;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* create queues for the gang */</div><div class='del'>-	for (j = 0; j &lt; num_queue; j++) {</div><div class='del'>-		r = amdgpu_mes_add_ring(adev, *gang_id, queue_type, j,</div><div class='del'>-					ctx_data, &amp;ring);</div><div class='del'>-		if (r) {</div><div class='del'>-			DRM_ERROR("failed to add ring\n");</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		DRM_INFO("ring %s was added\n", ring-&gt;name);</div><div class='del'>-		added_rings[j] = ring;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int amdgpu_mes_test_queues(struct amdgpu_ring **added_rings)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_ring *ring;</div><div class='del'>-	int i, r;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; AMDGPU_MES_CTX_MAX_RINGS; i++) {</div><div class='del'>-		ring = added_rings[i];</div><div class='del'>-		if (!ring)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		r = amdgpu_ring_test_helper(ring);</div><div class='del'>-		if (r)</div><div class='del'>-			return r;</div><div class='del'>-</div><div class='del'>-		r = amdgpu_ring_test_ib(ring, 1000 * 10);</div><div class='del'>-		if (r) {</div><div class='del'>-			DRM_DEV_ERROR(ring-&gt;adev-&gt;dev,</div><div class='del'>-				      "ring %s ib test failed (%d)\n",</div><div class='del'>-				      ring-&gt;name, r);</div><div class='del'>-			return r;</div><div class='del'>-		} else</div><div class='del'>-			DRM_INFO("ring %s ib test pass\n", ring-&gt;name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_self_test(struct amdgpu_device *adev)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_vm *vm = NULL;</div><div class='del'>-	struct amdgpu_mes_ctx_data ctx_data = {0};</div><div class='del'>-	struct amdgpu_ring *added_rings[AMDGPU_MES_CTX_MAX_RINGS] = { NULL };</div><div class='del'>-	int gang_ids[3] = {0};</div><div class='del'>-	int queue_types[][2] = { { AMDGPU_RING_TYPE_GFX, 1 },</div><div class='del'>-				 { AMDGPU_RING_TYPE_COMPUTE, 1 },</div><div class='del'>-				 { AMDGPU_RING_TYPE_SDMA, 1} };</div><div class='del'>-	int i, r, pasid, k = 0;</div><div class='del'>-</div><div class='del'>-	pasid = amdgpu_pasid_alloc(16);</div><div class='del'>-	if (pasid &lt; 0) {</div><div class='del'>-		dev_warn(adev-&gt;dev, "No more PASIDs available!");</div><div class='del'>-		pasid = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vm = kzalloc(sizeof(*vm), GFP_KERNEL);</div><div class='del'>-	if (!vm) {</div><div class='del'>-		r = -ENOMEM;</div><div class='del'>-		goto error_pasid;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = amdgpu_vm_init(adev, vm, -1);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to initialize vm\n");</div><div class='del'>-		goto error_pasid;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = amdgpu_mes_ctx_alloc_meta_data(adev, &amp;ctx_data);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to alloc ctx meta data\n");</div><div class='del'>-		goto error_fini;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ctx_data.meta_data_gpu_addr = AMDGPU_VA_RESERVED_BOTTOM;</div><div class='del'>-	r = amdgpu_mes_ctx_map_meta_data(adev, vm, &amp;ctx_data);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to map ctx meta data\n");</div><div class='del'>-		goto error_vm;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	r = amdgpu_mes_create_process(adev, pasid, vm);</div><div class='del'>-	if (r) {</div><div class='del'>-		DRM_ERROR("failed to create MES process\n");</div><div class='del'>-		goto error_vm;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(queue_types); i++) {</div><div class='del'>-		/* On GFX v10.3, fw hasn't supported to map sdma queue. */</div><div class='del'>-		if (amdgpu_ip_version(adev, GC_HWIP, 0) &gt;=</div><div class='del'>-			    IP_VERSION(10, 3, 0) &amp;&amp;</div><div class='del'>-		    amdgpu_ip_version(adev, GC_HWIP, 0) &lt;</div><div class='del'>-			    IP_VERSION(11, 0, 0) &amp;&amp;</div><div class='del'>-		    queue_types[i][0] == AMDGPU_RING_TYPE_SDMA)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		r = amdgpu_mes_test_create_gang_and_queues(adev, pasid,</div><div class='del'>-							   &amp;gang_ids[i],</div><div class='del'>-							   queue_types[i][0],</div><div class='del'>-							   queue_types[i][1],</div><div class='del'>-							   &amp;added_rings[k],</div><div class='del'>-							   &amp;ctx_data);</div><div class='del'>-		if (r)</div><div class='del'>-			goto error_queues;</div><div class='del'>-</div><div class='del'>-		k += queue_types[i][1];</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* start ring test and ib test for MES queues */</div><div class='del'>-	amdgpu_mes_test_queues(added_rings);</div><div class='del'>-</div><div class='del'>-error_queues:</div><div class='del'>-	/* remove all queues */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(added_rings); i++) {</div><div class='del'>-		if (!added_rings[i])</div><div class='del'>-			continue;</div><div class='del'>-		amdgpu_mes_remove_ring(adev, added_rings[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(gang_ids); i++) {</div><div class='del'>-		if (!gang_ids[i])</div><div class='del'>-			continue;</div><div class='del'>-		amdgpu_mes_remove_gang(adev, gang_ids[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_destroy_process(adev, pasid);</div><div class='del'>-</div><div class='del'>-error_vm:</div><div class='del'>-	amdgpu_mes_ctx_unmap_meta_data(adev, &amp;ctx_data);</div><div class='del'>-</div><div class='del'>-error_fini:</div><div class='del'>-	amdgpu_vm_fini(adev, vm);</div><div class='del'>-</div><div class='del'>-error_pasid:</div><div class='del'>-	if (pasid)</div><div class='del'>-		amdgpu_pasid_free(pasid);</div><div class='del'>-</div><div class='del'>-	amdgpu_mes_ctx_free_meta_data(&amp;ctx_data);</div><div class='del'>-	kfree(vm);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe)</div><div class='ctx'> {</div><div class='ctx'> 	const struct mes_firmware_header_v1_0 *mes_hdr;</div><div class='hunk'>@@ -1705,7 +709,7 @@ int amdgpu_mes_update_enforce_isolation(struct amdgpu_device *adev)</div><div class='ctx'> 	if (adev-&gt;enable_mes &amp;&amp; adev-&gt;gfx.enable_cleaner_shader) {</div><div class='ctx'> 		mutex_lock(&amp;adev-&gt;enforce_isolation_mutex);</div><div class='ctx'> 		for (i = 0; i &lt; (adev-&gt;xcp_mgr ? adev-&gt;xcp_mgr-&gt;num_xcps : 1); i++) {</div><div class='del'>-			if (adev-&gt;enforce_isolation[i])</div><div class='add'>+			if (adev-&gt;enforce_isolation[i] == AMDGPU_ENFORCE_ISOLATION_ENABLE)</div><div class='ctx'> 				r |= amdgpu_mes_set_enforce_isolation(adev, i, true);</div><div class='ctx'> 			else</div><div class='ctx'> 				r |= amdgpu_mes_set_enforce_isolation(adev, i, false);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br/>index da2c9a8cb3e0..a41f65b4f733 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h</a></div><div class='hunk'>@@ -111,8 +111,8 @@ struct amdgpu_mes {</div><div class='ctx'> </div><div class='ctx'> 	uint32_t                        vmid_mask_gfxhub;</div><div class='ctx'> 	uint32_t                        vmid_mask_mmhub;</div><div class='del'>-	uint32_t                        compute_hqd_mask[AMDGPU_MES_MAX_COMPUTE_PIPES];</div><div class='ctx'> 	uint32_t                        gfx_hqd_mask[AMDGPU_MES_MAX_GFX_PIPES];</div><div class='add'>+	uint32_t                        compute_hqd_mask[AMDGPU_MES_MAX_COMPUTE_PIPES];</div><div class='ctx'> 	uint32_t                        sdma_hqd_mask[AMDGPU_MES_MAX_SDMA_PIPES];</div><div class='ctx'> 	uint32_t                        aggregated_doorbells[AMDGPU_MES_PRIORITY_NUM_LEVELS];</div><div class='ctx'> 	uint32_t                        sch_ctx_offs[AMDGPU_MAX_MES_PIPES];</div><div class='hunk'>@@ -149,19 +149,6 @@ struct amdgpu_mes {</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct amdgpu_mes_process {</div><div class='del'>-	int			pasid;</div><div class='del'>-	struct			amdgpu_vm *vm;</div><div class='del'>-	uint64_t		pd_gpu_addr;</div><div class='del'>-	struct amdgpu_bo 	*proc_ctx_bo;</div><div class='del'>-	uint64_t 		proc_ctx_gpu_addr;</div><div class='del'>-	void 			*proc_ctx_cpu_ptr;</div><div class='del'>-	uint64_t 		process_quantum;</div><div class='del'>-	struct 			list_head gang_list;</div><div class='del'>-	uint32_t 		doorbell_index;</div><div class='del'>-	struct mutex		doorbell_lock;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct amdgpu_mes_gang {</div><div class='ctx'> 	int 				gang_id;</div><div class='ctx'> 	int 				priority;</div><div class='hunk'>@@ -248,18 +235,6 @@ struct mes_remove_queue_input {</div><div class='ctx'> 	uint64_t	gang_context_addr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mes_reset_queue_input {</div><div class='del'>-	uint32_t	doorbell_offset;</div><div class='del'>-	uint64_t	gang_context_addr;</div><div class='del'>-	bool		use_mmio;</div><div class='del'>-	uint32_t	queue_type;</div><div class='del'>-	uint32_t	me_id;</div><div class='del'>-	uint32_t	pipe_id;</div><div class='del'>-	uint32_t	queue_id;</div><div class='del'>-	uint32_t	xcc_id;</div><div class='del'>-	uint32_t	vmid;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct mes_map_legacy_queue_input {</div><div class='ctx'> 	uint32_t                           queue_type;</div><div class='ctx'> 	uint32_t                           doorbell_offset;</div><div class='hunk'>@@ -291,7 +266,7 @@ struct mes_resume_gang_input {</div><div class='ctx'> 	uint64_t	gang_context_addr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mes_reset_legacy_queue_input {</div><div class='add'>+struct mes_reset_queue_input {</div><div class='ctx'> 	uint32_t                           queue_type;</div><div class='ctx'> 	uint32_t                           doorbell_offset;</div><div class='ctx'> 	bool                               use_mmio;</div><div class='hunk'>@@ -301,6 +276,8 @@ struct mes_reset_legacy_queue_input {</div><div class='ctx'> 	uint64_t                           mqd_addr;</div><div class='ctx'> 	uint64_t                           wptr_addr;</div><div class='ctx'> 	uint32_t                           vmid;</div><div class='add'>+	bool                               legacy_gfx;</div><div class='add'>+	bool                               is_kq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum mes_misc_opcode {</div><div class='hunk'>@@ -388,9 +365,6 @@ struct amdgpu_mes_funcs {</div><div class='ctx'> 	int (*misc_op)(struct amdgpu_mes *mes,</div><div class='ctx'> 		       struct mes_misc_op_input *input);</div><div class='ctx'> </div><div class='del'>-	int (*reset_legacy_queue)(struct amdgpu_mes *mes,</div><div class='del'>-				  struct mes_reset_legacy_queue_input *input);</div><div class='del'>-</div><div class='ctx'> 	int (*reset_hw_queue)(struct amdgpu_mes *mes,</div><div class='ctx'> 			      struct mes_reset_queue_input *input);</div><div class='ctx'> };</div><div class='hunk'>@@ -404,26 +378,9 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe);</div><div class='ctx'> int amdgpu_mes_init(struct amdgpu_device *adev);</div><div class='ctx'> void amdgpu_mes_fini(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='del'>-int amdgpu_mes_create_process(struct amdgpu_device *adev, int pasid,</div><div class='del'>-			      struct amdgpu_vm *vm);</div><div class='del'>-void amdgpu_mes_destroy_process(struct amdgpu_device *adev, int pasid);</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_add_gang(struct amdgpu_device *adev, int pasid,</div><div class='del'>-			struct amdgpu_mes_gang_properties *gprops,</div><div class='del'>-			int *gang_id);</div><div class='del'>-int amdgpu_mes_remove_gang(struct amdgpu_device *adev, int gang_id);</div><div class='del'>-</div><div class='ctx'> int amdgpu_mes_suspend(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_mes_resume(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='del'>-int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,</div><div class='del'>-			    struct amdgpu_mes_queue_properties *qprops,</div><div class='del'>-			    int *queue_id);</div><div class='del'>-int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id);</div><div class='del'>-int amdgpu_mes_reset_hw_queue(struct amdgpu_device *adev, int queue_id);</div><div class='del'>-int amdgpu_mes_reset_hw_queue_mmio(struct amdgpu_device *adev, int queue_type,</div><div class='del'>-				   int me_id, int pipe_id, int queue_id, int vmid);</div><div class='del'>-</div><div class='ctx'> int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,</div><div class='ctx'> 				struct amdgpu_ring *ring);</div><div class='ctx'> int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,</div><div class='hunk'>@@ -451,27 +408,10 @@ int amdgpu_mes_set_shader_debugger(struct amdgpu_device *adev,</div><div class='ctx'> 				bool trap_en);</div><div class='ctx'> int amdgpu_mes_flush_shader_debugger(struct amdgpu_device *adev,</div><div class='ctx'> 				uint64_t process_context_addr);</div><div class='del'>-int amdgpu_mes_add_ring(struct amdgpu_device *adev, int gang_id,</div><div class='del'>-			int queue_type, int idx,</div><div class='del'>-			struct amdgpu_mes_ctx_data *ctx_data,</div><div class='del'>-			struct amdgpu_ring **out);</div><div class='del'>-void amdgpu_mes_remove_ring(struct amdgpu_device *adev,</div><div class='del'>-			    struct amdgpu_ring *ring);</div><div class='ctx'> </div><div class='ctx'> uint32_t amdgpu_mes_get_aggregated_doorbell_index(struct amdgpu_device *adev,</div><div class='ctx'> 						   enum amdgpu_mes_priority_level prio);</div><div class='ctx'> </div><div class='del'>-int amdgpu_mes_ctx_alloc_meta_data(struct amdgpu_device *adev,</div><div class='del'>-				   struct amdgpu_mes_ctx_data *ctx_data);</div><div class='del'>-void amdgpu_mes_ctx_free_meta_data(struct amdgpu_mes_ctx_data *ctx_data);</div><div class='del'>-int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device *adev,</div><div class='del'>-				 struct amdgpu_vm *vm,</div><div class='del'>-				 struct amdgpu_mes_ctx_data *ctx_data);</div><div class='del'>-int amdgpu_mes_ctx_unmap_meta_data(struct amdgpu_device *adev,</div><div class='del'>-				   struct amdgpu_mes_ctx_data *ctx_data);</div><div class='del'>-</div><div class='del'>-int amdgpu_mes_self_test(struct amdgpu_device *adev);</div><div class='del'>-</div><div class='ctx'> int amdgpu_mes_doorbell_process_slice(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br/>index 80cd6f5273db..73403744331a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_object.c</a></div><div class='hunk'>@@ -163,8 +163,8 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)</div><div class='ctx'> 		 * When GTT is just an alternative to VRAM make sure that we</div><div class='ctx'> 		 * only use it as fallback and still try to fill up VRAM first.</div><div class='ctx'> 		 */</div><div class='del'>-		if (domain &amp; abo-&gt;preferred_domains &amp; AMDGPU_GEM_DOMAIN_VRAM &amp;&amp;</div><div class='del'>-		    !(adev-&gt;flags &amp; AMD_IS_APU))</div><div class='add'>+		if (abo-&gt;tbo.resource &amp;&amp; !(adev-&gt;flags &amp; AMD_IS_APU) &amp;&amp;</div><div class='add'>+		    domain &amp; abo-&gt;preferred_domains &amp; AMDGPU_GEM_DOMAIN_VRAM)</div><div class='ctx'> 			places[c].flags |= TTM_PL_FLAG_FALLBACK;</div><div class='ctx'> 		c++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1044,7 +1044,8 @@ static const char * const amdgpu_vram_names[] = {</div><div class='ctx'> 	"GDDR6",</div><div class='ctx'> 	"DDR5",</div><div class='ctx'> 	"LPDDR4",</div><div class='del'>-	"LPDDR5"</div><div class='add'>+	"LPDDR5",</div><div class='add'>+	"HBM3E"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1644,7 +1645,11 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)</div><div class='ctx'> 	amdgpu_bo_print_flag(m, bo, VRAM_CONTIGUOUS);</div><div class='ctx'> 	amdgpu_bo_print_flag(m, bo, VM_ALWAYS_VALID);</div><div class='ctx'> 	amdgpu_bo_print_flag(m, bo, EXPLICIT_SYNC);</div><div class='del'>-</div><div class='add'>+	/* Add the gem obj resv fence dump*/</div><div class='add'>+	if (dma_resv_trylock(bo-&gt;tbo.base.resv)) {</div><div class='add'>+		dma_resv_describe(bo-&gt;tbo.base.resv, m);</div><div class='add'>+		dma_resv_unlock(bo-&gt;tbo.base.resv);</div><div class='add'>+	}</div><div class='ctx'> 	seq_puts(m, "\n");</div><div class='ctx'> </div><div class='ctx'> 	return size;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br/>index df5d5dbd7f0f..e6f0b035e20b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c</a></div><div class='hunk'>@@ -2214,7 +2214,8 @@ static int psp_securedisplay_initialize(struct psp_context *psp)</div><div class='ctx'> </div><div class='ctx'> 	if (!psp-&gt;securedisplay_context.context.bin_desc.size_bytes ||</div><div class='ctx'> 	    !psp-&gt;securedisplay_context.context.bin_desc.start_addr) {</div><div class='del'>-		dev_info(psp-&gt;adev-&gt;dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n");</div><div class='add'>+		dev_info(psp-&gt;adev-&gt;dev,</div><div class='add'>+			 "SECUREDISPLAY: optional securedisplay ta ucode is not available\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4185,6 +4186,110 @@ const struct attribute_group amdgpu_flash_attr_group = {</div><div class='ctx'> 	.is_visible = amdgpu_flash_attr_is_visible,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_DEBUG_FS)</div><div class='add'>+static int psp_read_spirom_debugfs_open(struct inode *inode, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = filp-&gt;f_inode-&gt;i_private;</div><div class='add'>+	struct spirom_bo *bo_triplet;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* serialize the open() file calling */</div><div class='add'>+	if (!mutex_trylock(&amp;adev-&gt;psp.mutex))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * make sure only one userpace process is alive for dumping so that</div><div class='add'>+	 * only one memory buffer of AMD_VBIOS_FILE_MAX_SIZE * 2 is consumed.</div><div class='add'>+	 * let's say the case where one process try opening the file while</div><div class='add'>+	 * another one has proceeded to read or release. In this way, eliminate</div><div class='add'>+	 * the use of mutex for read() or release() callback as well.</div><div class='add'>+	 */</div><div class='add'>+	if (adev-&gt;psp.spirom_dump_trip) {</div><div class='add'>+		mutex_unlock(&amp;adev-&gt;psp.mutex);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bo_triplet = kzalloc(sizeof(struct spirom_bo), GFP_KERNEL);</div><div class='add'>+	if (!bo_triplet) {</div><div class='add'>+		mutex_unlock(&amp;adev-&gt;psp.mutex);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_bo_create_kernel(adev, AMD_VBIOS_FILE_MAX_SIZE_B * 2,</div><div class='add'>+				      AMDGPU_GPU_PAGE_SIZE,</div><div class='add'>+				      AMDGPU_GEM_DOMAIN_GTT,</div><div class='add'>+				      &amp;bo_triplet-&gt;bo,</div><div class='add'>+				      &amp;bo_triplet-&gt;mc_addr,</div><div class='add'>+				      &amp;bo_triplet-&gt;cpu_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto rel_trip;</div><div class='add'>+</div><div class='add'>+	ret = psp_dump_spirom(&amp;adev-&gt;psp, bo_triplet-&gt;mc_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto rel_bo;</div><div class='add'>+</div><div class='add'>+	adev-&gt;psp.spirom_dump_trip = bo_triplet;</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;psp.mutex);</div><div class='add'>+	return 0;</div><div class='add'>+rel_bo:</div><div class='add'>+	amdgpu_bo_free_kernel(&amp;bo_triplet-&gt;bo, &amp;bo_triplet-&gt;mc_addr,</div><div class='add'>+			      &amp;bo_triplet-&gt;cpu_addr);</div><div class='add'>+rel_trip:</div><div class='add'>+	kfree(bo_triplet);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;psp.mutex);</div><div class='add'>+	dev_err(adev-&gt;dev, "Trying IFWI dump fails, err = %d\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t psp_read_spirom_debugfs_read(struct file *filp, char __user *buf, size_t size,</div><div class='add'>+					    loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = filp-&gt;f_inode-&gt;i_private;</div><div class='add'>+	struct spirom_bo *bo_triplet = adev-&gt;psp.spirom_dump_trip;</div><div class='add'>+</div><div class='add'>+	if (!bo_triplet)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buf,</div><div class='add'>+				       size,</div><div class='add'>+				       pos, bo_triplet-&gt;cpu_addr,</div><div class='add'>+				       AMD_VBIOS_FILE_MAX_SIZE_B * 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int psp_read_spirom_debugfs_release(struct inode *inode, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = filp-&gt;f_inode-&gt;i_private;</div><div class='add'>+	struct spirom_bo *bo_triplet = adev-&gt;psp.spirom_dump_trip;</div><div class='add'>+</div><div class='add'>+	if (bo_triplet) {</div><div class='add'>+		amdgpu_bo_free_kernel(&amp;bo_triplet-&gt;bo, &amp;bo_triplet-&gt;mc_addr,</div><div class='add'>+				      &amp;bo_triplet-&gt;cpu_addr);</div><div class='add'>+		kfree(bo_triplet);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adev-&gt;psp.spirom_dump_trip = NULL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations psp_dump_spirom_debugfs_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = psp_read_spirom_debugfs_open,</div><div class='add'>+	.read = psp_read_spirom_debugfs_read,</div><div class='add'>+	.release = psp_read_spirom_debugfs_release,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void amdgpu_psp_debugfs_init(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+#if defined(CONFIG_DEBUG_FS)</div><div class='add'>+	struct drm_minor *minor = adev_to_drm(adev)-&gt;primary;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file_size("psp_spirom_dump", 0444, minor-&gt;debugfs_root,</div><div class='add'>+				 adev, &amp;psp_dump_spirom_debugfs_ops, AMD_VBIOS_FILE_MAX_SIZE_B * 2);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct amd_ip_funcs psp_ip_funcs = {</div><div class='ctx'> 	.name = "psp",</div><div class='ctx'> 	.early_init = psp_early_init,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h<br/>index 8d5acc415d38..428adc7f741d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h</a></div><div class='hunk'>@@ -39,6 +39,18 @@</div><div class='ctx'> #define PSP_TMR_ALIGNMENT	0x100000</div><div class='ctx'> #define PSP_FW_NAME_LEN		0x24</div><div class='ctx'> </div><div class='add'>+/* VBIOS gfl defines */</div><div class='add'>+#define MBOX_READY_MASK 0x80000000</div><div class='add'>+#define MBOX_STATUS_MASK 0x0000FFFF</div><div class='add'>+#define MBOX_COMMAND_MASK 0x00FF0000</div><div class='add'>+#define MBOX_READY_FLAG 0x80000000</div><div class='add'>+#define C2PMSG_CMD_SPI_UPDATE_ROM_IMAGE_ADDR_LO 0x2</div><div class='add'>+#define C2PMSG_CMD_SPI_UPDATE_ROM_IMAGE_ADDR_HI 0x3</div><div class='add'>+#define C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE 0x4</div><div class='add'>+#define C2PMSG_CMD_SPI_GET_ROM_IMAGE_ADDR_LO 0xf</div><div class='add'>+#define C2PMSG_CMD_SPI_GET_ROM_IMAGE_ADDR_HI 0x10</div><div class='add'>+#define C2PMSG_CMD_SPI_GET_FLASH_IMAGE 0x11</div><div class='add'>+</div><div class='ctx'> extern const struct attribute_group amdgpu_flash_attr_group;</div><div class='ctx'> </div><div class='ctx'> enum psp_shared_mem_size {</div><div class='hunk'>@@ -107,6 +119,7 @@ enum psp_reg_prog_id {</div><div class='ctx'> 	PSP_REG_IH_RB_CNTL        = 0,  /* register IH_RB_CNTL */</div><div class='ctx'> 	PSP_REG_IH_RB_CNTL_RING1  = 1,  /* register IH_RB_CNTL_RING1 */</div><div class='ctx'> 	PSP_REG_IH_RB_CNTL_RING2  = 2,  /* register IH_RB_CNTL_RING2 */</div><div class='add'>+	PSP_REG_MMHUB_L1_TLB_CNTL = 25,</div><div class='ctx'> 	PSP_REG_LAST</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -137,11 +150,14 @@ struct psp_funcs {</div><div class='ctx'> 	int (*load_usbc_pd_fw)(struct psp_context *psp, uint64_t fw_pri_mc_addr);</div><div class='ctx'> 	int (*read_usbc_pd_fw)(struct psp_context *psp, uint32_t *fw_ver);</div><div class='ctx'> 	int (*update_spirom)(struct psp_context *psp, uint64_t fw_pri_mc_addr);</div><div class='add'>+	int (*dump_spirom)(struct psp_context *psp, uint64_t fw_pri_mc_addr);</div><div class='ctx'> 	int (*vbflash_stat)(struct psp_context *psp);</div><div class='ctx'> 	int (*fatal_error_recovery_quirk)(struct psp_context *psp);</div><div class='ctx'> 	bool (*get_ras_capability)(struct psp_context *psp);</div><div class='ctx'> 	bool (*is_aux_sos_load_required)(struct psp_context *psp);</div><div class='ctx'> 	bool (*is_reload_needed)(struct psp_context *psp);</div><div class='add'>+	int (*reg_program_no_ring)(struct psp_context *psp, uint32_t val,</div><div class='add'>+				   enum psp_reg_prog_id id);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ta_funcs {</div><div class='hunk'>@@ -319,6 +335,14 @@ struct psp_runtime_scpm_entry {</div><div class='ctx'> 	enum psp_runtime_scpm_authentication scpm_status;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#if defined(CONFIG_DEBUG_FS)</div><div class='add'>+struct spirom_bo {</div><div class='add'>+	struct amdgpu_bo *bo;</div><div class='add'>+	uint64_t mc_addr;</div><div class='add'>+	void *cpu_addr;</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> struct psp_context {</div><div class='ctx'> 	struct amdgpu_device		*adev;</div><div class='ctx'> 	struct psp_ring			km_ring;</div><div class='hunk'>@@ -406,6 +430,9 @@ struct psp_context {</div><div class='ctx'> 	char				*vbflash_tmp_buf;</div><div class='ctx'> 	size_t				vbflash_image_size;</div><div class='ctx'> 	bool				vbflash_done;</div><div class='add'>+#if defined(CONFIG_DEBUG_FS)</div><div class='add'>+	struct spirom_bo *spirom_dump_trip;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_psp_funcs {</div><div class='hunk'>@@ -464,6 +491,10 @@ struct amdgpu_psp_funcs {</div><div class='ctx'> 	((psp)-&gt;funcs-&gt;update_spirom ? \</div><div class='ctx'> 	(psp)-&gt;funcs-&gt;update_spirom((psp), fw_pri_mc_addr) : -EINVAL)</div><div class='ctx'> </div><div class='add'>+#define psp_dump_spirom(psp, fw_pri_mc_addr) \</div><div class='add'>+	((psp)-&gt;funcs-&gt;dump_spirom ? \</div><div class='add'>+	(psp)-&gt;funcs-&gt;dump_spirom((psp), fw_pri_mc_addr) : -EINVAL)</div><div class='add'>+</div><div class='ctx'> #define psp_vbflash_status(psp) \</div><div class='ctx'> 	((psp)-&gt;funcs-&gt;vbflash_stat ? \</div><div class='ctx'> 	(psp)-&gt;funcs-&gt;vbflash_stat((psp)) : -EINVAL)</div><div class='hunk'>@@ -475,6 +506,10 @@ struct amdgpu_psp_funcs {</div><div class='ctx'> #define psp_is_aux_sos_load_required(psp) \</div><div class='ctx'> 	((psp)-&gt;funcs-&gt;is_aux_sos_load_required ? (psp)-&gt;funcs-&gt;is_aux_sos_load_required((psp)) : 0)</div><div class='ctx'> </div><div class='add'>+#define psp_reg_program_no_ring(psp, val, id) \</div><div class='add'>+	((psp)-&gt;funcs-&gt;reg_program_no_ring ? \</div><div class='add'>+	(psp)-&gt;funcs-&gt;reg_program_no_ring((psp), val, id) : -EINVAL)</div><div class='add'>+</div><div class='ctx'> extern const struct amd_ip_funcs psp_ip_funcs;</div><div class='ctx'> </div><div class='ctx'> extern const struct amdgpu_ip_block_version psp_v3_1_ip_block;</div><div class='hunk'>@@ -569,5 +604,9 @@ bool amdgpu_psp_get_ras_capability(struct psp_context *psp);</div><div class='ctx'> int psp_config_sq_perfmon(struct psp_context *psp, uint32_t xcp_id,</div><div class='ctx'> 	bool core_override_enable, bool reg_override_enable, bool perfmon_override_enable);</div><div class='ctx'> bool amdgpu_psp_tos_reload_needed(struct amdgpu_device *adev);</div><div class='add'>+int amdgpu_psp_reg_program_no_ring(struct psp_context *psp, uint32_t val,</div><div class='add'>+				   enum psp_reg_prog_id id);</div><div class='add'>+void amdgpu_psp_debugfs_init(struct amdgpu_device *adev);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c<br/>index 443409d4f4b0..dc07936d2fcb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c</a></div><div class='hunk'>@@ -1498,6 +1498,9 @@ int amdgpu_ras_reset_error_count(struct amdgpu_device *adev,</div><div class='ctx'> 	    !amdgpu_ras_get_aca_debug_mode(adev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_sriov_vf(adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	/* skip ras error reset in gpu reset */</div><div class='ctx'> 	if ((amdgpu_in_reset(adev) || amdgpu_ras_in_recovery(adev)) &amp;&amp;</div><div class='ctx'> 	    ((smu_funcs &amp;&amp; smu_funcs-&gt;set_debug_mode) ||</div><div class='hunk'>@@ -2161,7 +2164,7 @@ void amdgpu_ras_interrupt_fatal_error_handler(struct amdgpu_device *adev)</div><div class='ctx'> 	/* Fatal error events are handled on host side */</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 		return;</div><div class='del'>-	/**</div><div class='add'>+	/*</div><div class='ctx'> 	 * If the current interrupt is caused by a non-fatal RAS error, skip</div><div class='ctx'> 	 * check for fatal error. For fatal errors, FED status of all devices</div><div class='ctx'> 	 * in XGMI hive gets set when the first device gets fatal error</div><div class='hunk'>@@ -2886,6 +2889,7 @@ static int __amdgpu_ras_convert_rec_from_rom(struct amdgpu_device *adev,</div><div class='ctx'> 		if (amdgpu_ras_mca2pa_by_idx(adev, bps, err_data))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return __amdgpu_ras_restore_bad_pages(adev, err_data-&gt;err_addr,</div><div class='ctx'> 									adev-&gt;umc.retire_unit);</div><div class='ctx'> }</div><div class='hunk'>@@ -2900,7 +2904,7 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> 			&amp;adev-&gt;psp.ras_context.ras-&gt;eeprom_control;</div><div class='ctx'> 	enum amdgpu_memory_partition nps = AMDGPU_NPS1_PARTITION_MODE;</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	uint32_t i;</div><div class='add'>+	uint32_t i = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!con || !con-&gt;eh_data || !bps || pages &lt;= 0)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2921,34 +2925,36 @@ int amdgpu_ras_add_bad_pages(struct amdgpu_device *adev,</div><div class='ctx'> 	mutex_lock(&amp;con-&gt;recovery_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (from_rom) {</div><div class='del'>-		for (i = 0; i &lt; pages; i++) {</div><div class='del'>-			if (control-&gt;ras_num_recs - i &gt;= adev-&gt;umc.retire_unit) {</div><div class='del'>-				if ((bps[i].address == bps[i + 1].address) &amp;&amp;</div><div class='del'>-				    (bps[i].mem_channel == bps[i + 1].mem_channel)) {</div><div class='del'>-					//deal with retire_unit records a time</div><div class='del'>-					ret = __amdgpu_ras_convert_rec_array_from_rom(adev,</div><div class='del'>-									&amp;bps[i], &amp;err_data, nps);</div><div class='del'>-					if (ret)</div><div class='del'>-						goto free;</div><div class='del'>-					i += (adev-&gt;umc.retire_unit - 1);</div><div class='add'>+		/* there is no pa recs in V3, so skip pa recs processing */</div><div class='add'>+		if (control-&gt;tbl_hdr.version &lt; RAS_TABLE_VER_V3) {</div><div class='add'>+			for (i = 0; i &lt; pages; i++) {</div><div class='add'>+				if (control-&gt;ras_num_recs - i &gt;= adev-&gt;umc.retire_unit) {</div><div class='add'>+					if ((bps[i].address == bps[i + 1].address) &amp;&amp;</div><div class='add'>+						(bps[i].mem_channel == bps[i + 1].mem_channel)) {</div><div class='add'>+						/* deal with retire_unit records a time */</div><div class='add'>+						ret = __amdgpu_ras_convert_rec_array_from_rom(adev,</div><div class='add'>+										&amp;bps[i], &amp;err_data, nps);</div><div class='add'>+						if (ret)</div><div class='add'>+							control-&gt;ras_num_bad_pages -= adev-&gt;umc.retire_unit;</div><div class='add'>+						i += (adev-&gt;umc.retire_unit - 1);</div><div class='add'>+					} else {</div><div class='add'>+						break;</div><div class='add'>+					}</div><div class='ctx'> 				} else {</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='del'>-			} else {</div><div class='del'>-				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		for (; i &lt; pages; i++) {</div><div class='ctx'> 			ret = __amdgpu_ras_convert_rec_from_rom(adev,</div><div class='ctx'> 				&amp;bps[i], &amp;err_data, nps);</div><div class='ctx'> 			if (ret)</div><div class='del'>-				goto free;</div><div class='add'>+				control-&gt;ras_num_bad_pages -= adev-&gt;umc.retire_unit;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = __amdgpu_ras_restore_bad_pages(adev, bps, pages);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-free:</div><div class='ctx'> 	if (from_rom)</div><div class='ctx'> 		kfree(err_data.err_addr);</div><div class='ctx'> 	mutex_unlock(&amp;con-&gt;recovery_lock);</div><div class='hunk'>@@ -3037,21 +3043,28 @@ static int amdgpu_ras_load_bad_pages(struct amdgpu_device *adev)</div><div class='ctx'> 		dev_err(adev-&gt;dev, "Failed to load EEPROM table records!");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (adev-&gt;umc.ras &amp;&amp; adev-&gt;umc.ras-&gt;convert_ras_err_addr) {</div><div class='del'>-			for (i = 0; i &lt; control-&gt;ras_num_recs; i++) {</div><div class='del'>-				if ((control-&gt;ras_num_recs - i) &gt;= adev-&gt;umc.retire_unit) {</div><div class='del'>-					if ((bps[i].address == bps[i + 1].address) &amp;&amp;</div><div class='del'>-						(bps[i].mem_channel == bps[i + 1].mem_channel)) {</div><div class='del'>-						control-&gt;ras_num_pa_recs += adev-&gt;umc.retire_unit;</div><div class='del'>-						i += (adev-&gt;umc.retire_unit - 1);</div><div class='add'>+			/*In V3, there is no pa recs, and some cases(when address==0) may be parsed</div><div class='add'>+			as pa recs, so add verion check to avoid it.</div><div class='add'>+			*/</div><div class='add'>+			if (control-&gt;tbl_hdr.version &lt; RAS_TABLE_VER_V3) {</div><div class='add'>+				for (i = 0; i &lt; control-&gt;ras_num_recs; i++) {</div><div class='add'>+					if ((control-&gt;ras_num_recs - i) &gt;= adev-&gt;umc.retire_unit) {</div><div class='add'>+						if ((bps[i].address == bps[i + 1].address) &amp;&amp;</div><div class='add'>+							(bps[i].mem_channel == bps[i + 1].mem_channel)) {</div><div class='add'>+							control-&gt;ras_num_pa_recs += adev-&gt;umc.retire_unit;</div><div class='add'>+							i += (adev-&gt;umc.retire_unit - 1);</div><div class='add'>+						} else {</div><div class='add'>+							control-&gt;ras_num_mca_recs +=</div><div class='add'>+										(control-&gt;ras_num_recs - i);</div><div class='add'>+							break;</div><div class='add'>+						}</div><div class='ctx'> 					} else {</div><div class='del'>-						control-&gt;ras_num_mca_recs +=</div><div class='del'>-									(control-&gt;ras_num_recs - i);</div><div class='add'>+						control-&gt;ras_num_mca_recs += (control-&gt;ras_num_recs - i);</div><div class='ctx'> 						break;</div><div class='ctx'> 					}</div><div class='del'>-				} else {</div><div class='del'>-					control-&gt;ras_num_mca_recs += (control-&gt;ras_num_recs - i);</div><div class='del'>-					break;</div><div class='ctx'> 				}</div><div class='add'>+			} else {</div><div class='add'>+				control-&gt;ras_num_mca_recs = control-&gt;ras_num_recs;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -3460,6 +3473,10 @@ int amdgpu_ras_init_badpage_info(struct amdgpu_device *adev)</div><div class='ctx'> 	if (!adev-&gt;umc.ras || !adev-&gt;umc.ras-&gt;convert_ras_err_addr)</div><div class='ctx'> 		control-&gt;ras_num_pa_recs = control-&gt;ras_num_recs;</div><div class='ctx'> </div><div class='add'>+	if (adev-&gt;umc.ras &amp;&amp;</div><div class='add'>+	    adev-&gt;umc.ras-&gt;get_retire_flip_bits)</div><div class='add'>+		adev-&gt;umc.ras-&gt;get_retire_flip_bits(adev);</div><div class='add'>+</div><div class='ctx'> 	if (control-&gt;ras_num_recs) {</div><div class='ctx'> 		ret = amdgpu_ras_load_bad_pages(adev);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -3793,10 +3810,12 @@ init_ras_enabled_flag:</div><div class='ctx'> 		adev-&gt;ras_hw_enabled &amp; amdgpu_ras_mask;</div><div class='ctx'> </div><div class='ctx'> 	/* aca is disabled by default except for psp v13_0_6/v13_0_12/v13_0_14 */</div><div class='del'>-	adev-&gt;aca.is_enabled =</div><div class='del'>-		(amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||</div><div class='del'>-		 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||</div><div class='del'>-		 amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14));</div><div class='add'>+	if (!amdgpu_sriov_vf(adev)) {</div><div class='add'>+		adev-&gt;aca.is_enabled =</div><div class='add'>+			(amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||</div><div class='add'>+			amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||</div><div class='add'>+			amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* bad page feature is not applicable to specific app platform */</div><div class='ctx'> 	if (adev-&gt;gmc.is_app_apu &amp;&amp;</div><div class='hunk'>@@ -4479,8 +4498,11 @@ void amdgpu_ras_global_ras_isr(struct amdgpu_device *adev)</div><div class='ctx'> 		enum ras_event_type type = RAS_EVENT_TYPE_FATAL;</div><div class='ctx'> 		u64 event_id;</div><div class='ctx'> </div><div class='del'>-		if (amdgpu_ras_mark_ras_event(adev, type))</div><div class='add'>+		if (amdgpu_ras_mark_ras_event(adev, type)) {</div><div class='add'>+			dev_err(adev-&gt;dev,</div><div class='add'>+				"uncorrectable hardware error (ERREVENT_ATHUB_INTERRUPT) detected!\n");</div><div class='ctx'> 			return;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		event_id = amdgpu_ras_acquire_event_id(adev, type);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c<br/>index 0ea7cfaf3587..2c58e09e56f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c</a></div><div class='hunk'>@@ -418,6 +418,7 @@ static void amdgpu_ras_set_eeprom_table_version(struct amdgpu_ras_eeprom_control</div><div class='ctx'> 		hdr-&gt;version = RAS_TABLE_VER_V2_1;</div><div class='ctx'> 		return;</div><div class='ctx'> 	case IP_VERSION(12, 0, 0):</div><div class='add'>+	case IP_VERSION(12, 5, 0):</div><div class='ctx'> 		hdr-&gt;version = RAS_TABLE_VER_V3;</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1392,17 +1393,39 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control)</div><div class='ctx'> </div><div class='ctx'> 	__decode_table_header_from_buf(hdr, buf);</div><div class='ctx'> </div><div class='del'>-	if (hdr-&gt;version &gt;= RAS_TABLE_VER_V2_1) {</div><div class='add'>+	if (hdr-&gt;header != RAS_TABLE_HDR_VAL &amp;&amp;</div><div class='add'>+	    hdr-&gt;header != RAS_TABLE_HDR_BAD) {</div><div class='add'>+		dev_info(adev-&gt;dev, "Creating a new EEPROM table");</div><div class='add'>+		return amdgpu_ras_eeprom_reset_table(control);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (hdr-&gt;version) {</div><div class='add'>+	case RAS_TABLE_VER_V2_1:</div><div class='add'>+	case RAS_TABLE_VER_V3:</div><div class='ctx'> 		control-&gt;ras_num_recs = RAS_NUM_RECS_V2_1(hdr);</div><div class='ctx'> 		control-&gt;ras_record_offset = RAS_RECORD_START_V2_1;</div><div class='ctx'> 		control-&gt;ras_max_record_count = RAS_MAX_RECORD_COUNT_V2_1;</div><div class='del'>-	} else {</div><div class='add'>+		break;</div><div class='add'>+	case RAS_TABLE_VER_V1:</div><div class='ctx'> 		control-&gt;ras_num_recs = RAS_NUM_RECS(hdr);</div><div class='ctx'> 		control-&gt;ras_record_offset = RAS_RECORD_START;</div><div class='ctx'> 		control-&gt;ras_max_record_count = RAS_MAX_RECORD_COUNT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(adev-&gt;dev,</div><div class='add'>+			"RAS header invalid, unsupported version: %u",</div><div class='add'>+			hdr-&gt;version);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	control-&gt;ras_fri = RAS_OFFSET_TO_INDEX(control, hdr-&gt;first_rec_offset);</div><div class='ctx'> </div><div class='add'>+	if (control-&gt;ras_num_recs &gt; control-&gt;ras_max_record_count) {</div><div class='add'>+		dev_err(adev-&gt;dev,</div><div class='add'>+			"RAS header invalid, records in header: %u max allowed :%u",</div><div class='add'>+			control-&gt;ras_num_recs, control-&gt;ras_max_record_count);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	control-&gt;ras_fri = RAS_OFFSET_TO_INDEX(control, hdr-&gt;first_rec_offset);</div><div class='ctx'> 	control-&gt;ras_num_mca_recs = 0;</div><div class='ctx'> 	control-&gt;ras_num_pa_recs = 0;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1413,7 +1436,7 @@ int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control)</div><div class='ctx'> 	struct amdgpu_device *adev = to_amdgpu_device(control);</div><div class='ctx'> 	struct amdgpu_ras_eeprom_table_header *hdr = &amp;control-&gt;tbl_hdr;</div><div class='ctx'> 	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='del'>-	int res;</div><div class='add'>+	int res = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!__is_ras_eeprom_supported(adev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1494,10 +1517,6 @@ int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control)</div><div class='ctx'> 					 "User defined threshold is set, runtime service will be halt when threshold is reached\n");</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		DRM_INFO("Creating a new EEPROM table");</div><div class='del'>-</div><div class='del'>-		res = amdgpu_ras_eeprom_reset_table(control);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return res &lt; 0 ? res : 0;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c<br/>index 59acdbfe28d8..426834806fbf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c</a></div><div class='hunk'>@@ -187,14 +187,10 @@ void amdgpu_ring_undo(struct amdgpu_ring *ring)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define amdgpu_ring_get_gpu_addr(ring, offset)				\</div><div class='del'>-	(ring-&gt;is_mes_queue ?						\</div><div class='del'>-	 (ring-&gt;mes_ctx-&gt;meta_data_gpu_addr + offset) :			\</div><div class='del'>-	 (ring-&gt;adev-&gt;wb.gpu_addr + offset * 4))</div><div class='add'>+	 (ring-&gt;adev-&gt;wb.gpu_addr + offset * 4)</div><div class='ctx'> </div><div class='ctx'> #define amdgpu_ring_get_cpu_addr(ring, offset)				\</div><div class='del'>-	(ring-&gt;is_mes_queue ?						\</div><div class='del'>-	 (void *)((uint8_t *)(ring-&gt;mes_ctx-&gt;meta_data_ptr) + offset) : \</div><div class='del'>-	 (&amp;ring-&gt;adev-&gt;wb.wb[offset]))</div><div class='add'>+	 (&amp;ring-&gt;adev-&gt;wb.wb[offset])</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * amdgpu_ring_init - init driver ring struct.</div><div class='hunk'>@@ -243,57 +239,42 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,</div><div class='ctx'> 		ring-&gt;sched_score = sched_score;</div><div class='ctx'> 		ring-&gt;vmid_wait = dma_fence_get_stub();</div><div class='ctx'> </div><div class='del'>-		if (!ring-&gt;is_mes_queue) {</div><div class='del'>-			ring-&gt;idx = adev-&gt;num_rings++;</div><div class='del'>-			adev-&gt;rings[ring-&gt;idx] = ring;</div><div class='del'>-		}</div><div class='add'>+		ring-&gt;idx = adev-&gt;num_rings++;</div><div class='add'>+		adev-&gt;rings[ring-&gt;idx] = ring;</div><div class='ctx'> </div><div class='ctx'> 		r = amdgpu_fence_driver_init_ring(ring);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		ring-&gt;rptr_offs = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-				AMDGPU_MES_CTX_RPTR_OFFS);</div><div class='del'>-		ring-&gt;wptr_offs = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-				AMDGPU_MES_CTX_WPTR_OFFS);</div><div class='del'>-		ring-&gt;fence_offs = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-				AMDGPU_MES_CTX_FENCE_OFFS);</div><div class='del'>-		ring-&gt;trail_fence_offs = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-				AMDGPU_MES_CTX_TRAIL_FENCE_OFFS);</div><div class='del'>-		ring-&gt;cond_exe_offs = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-				AMDGPU_MES_CTX_COND_EXE_OFFS);</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;ring-&gt;rptr_offs);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) ring rptr_offs wb alloc failed\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;ring-&gt;rptr_offs);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) ring rptr_offs wb alloc failed\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;ring-&gt;wptr_offs);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) ring wptr_offs wb alloc failed\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;ring-&gt;wptr_offs);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) ring wptr_offs wb alloc failed\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;ring-&gt;fence_offs);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) ring fence_offs wb alloc failed\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;ring-&gt;fence_offs);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) ring fence_offs wb alloc failed\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;ring-&gt;trail_fence_offs);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) ring trail_fence_offs wb alloc failed\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;ring-&gt;trail_fence_offs);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) ring trail_fence_offs wb alloc failed\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;ring-&gt;cond_exe_offs);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) ring cond_exec_polling wb alloc failed\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;ring-&gt;cond_exe_offs);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) ring cond_exec_polling wb alloc failed\n", r);</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;fence_gpu_addr =</div><div class='hunk'>@@ -353,18 +334,7 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,</div><div class='ctx'> 	ring-&gt;cached_rptr = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate ring buffer */</div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		int offset = 0;</div><div class='del'>-</div><div class='del'>-		BUG_ON(ring-&gt;ring_size &gt; PAGE_SIZE*4);</div><div class='del'>-</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_RING_OFFS);</div><div class='del'>-		ring-&gt;gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ring-&gt;ring = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		amdgpu_ring_clear_ring(ring);</div><div class='del'>-</div><div class='del'>-	} else if (ring-&gt;ring_obj == NULL) {</div><div class='add'>+	if (ring-&gt;ring_obj == NULL) {</div><div class='ctx'> 		r = amdgpu_bo_create_kernel(adev, ring-&gt;ring_size + ring-&gt;funcs-&gt;extra_dw, PAGE_SIZE,</div><div class='ctx'> 					    AMDGPU_GEM_DOMAIN_GTT,</div><div class='ctx'> 					    &amp;ring-&gt;ring_obj,</div><div class='hunk'>@@ -401,32 +371,26 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	/* Not to finish a ring which is not initialized */</div><div class='del'>-	if (!(ring-&gt;adev) ||</div><div class='del'>-	    (!ring-&gt;is_mes_queue &amp;&amp; !(ring-&gt;adev-&gt;rings[ring-&gt;idx])))</div><div class='add'>+	if (!(ring-&gt;adev) || !(ring-&gt;adev-&gt;rings[ring-&gt;idx]))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;sched.ready = false;</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;is_mes_queue) {</div><div class='del'>-		amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;rptr_offs);</div><div class='del'>-		amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;wptr_offs);</div><div class='add'>+	amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;rptr_offs);</div><div class='add'>+	amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;wptr_offs);</div><div class='ctx'> </div><div class='del'>-		amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;cond_exe_offs);</div><div class='del'>-		amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;fence_offs);</div><div class='add'>+	amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;cond_exe_offs);</div><div class='add'>+	amdgpu_device_wb_free(ring-&gt;adev, ring-&gt;fence_offs);</div><div class='ctx'> </div><div class='del'>-		amdgpu_bo_free_kernel(&amp;ring-&gt;ring_obj,</div><div class='del'>-				      &amp;ring-&gt;gpu_addr,</div><div class='del'>-				      (void **)&amp;ring-&gt;ring);</div><div class='del'>-	} else {</div><div class='del'>-		kfree(ring-&gt;fence_drv.fences);</div><div class='del'>-	}</div><div class='add'>+	amdgpu_bo_free_kernel(&amp;ring-&gt;ring_obj,</div><div class='add'>+			      &amp;ring-&gt;gpu_addr,</div><div class='add'>+			      (void **)&amp;ring-&gt;ring);</div><div class='ctx'> </div><div class='ctx'> 	dma_fence_put(ring-&gt;vmid_wait);</div><div class='ctx'> 	ring-&gt;vmid_wait = NULL;</div><div class='ctx'> 	ring-&gt;me = 0;</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		ring-&gt;adev-&gt;rings[ring-&gt;idx] = NULL;</div><div class='add'>+	ring-&gt;adev-&gt;rings[ring-&gt;idx] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h<br/>index bb2b66385223..b95b47110769 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h</a></div><div class='hunk'>@@ -164,8 +164,24 @@ void amdgpu_fence_update_start_timestamp(struct amdgpu_ring *ring, uint32_t seq,</div><div class='ctx'> </div><div class='ctx'> /* provided by hw blocks that expose a ring buffer for commands */</div><div class='ctx'> struct amdgpu_ring_funcs {</div><div class='add'>+	/**</div><div class='add'>+	 * @type:</div><div class='add'>+	 *</div><div class='add'>+	 * GFX, Compute, SDMA, UVD, VCE, VCN, VPE, KIQ, MES, UMSCH, and CPER</div><div class='add'>+	 * use ring buffers. The type field just identifies which component the</div><div class='add'>+	 * ring buffer is associated with.</div><div class='add'>+	 */</div><div class='ctx'> 	enum amdgpu_ring_type	type;</div><div class='ctx'> 	uint32_t		align_mask;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @nop:</div><div class='add'>+	 *</div><div class='add'>+	 * Every block in the amdgpu has no-op instructions (e.g., GFX 10</div><div class='add'>+	 * uses PACKET3(PACKET3_NOP, 0x3FFF), VCN 5 uses VCN_ENC_CMD_NO_OP,</div><div class='add'>+	 * etc). This field receives the specific no-op for the component</div><div class='add'>+	 * that initializes the ring.</div><div class='add'>+	 */</div><div class='ctx'> 	u32			nop;</div><div class='ctx'> 	bool			support_64bit_ptrs;</div><div class='ctx'> 	bool			no_user_fence;</div><div class='hunk'>@@ -241,6 +257,9 @@ struct amdgpu_ring_funcs {</div><div class='ctx'> 	bool (*is_guilty)(struct amdgpu_ring *ring);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * amdgpu_ring - Holds ring information</div><div class='add'>+ */</div><div class='ctx'> struct amdgpu_ring {</div><div class='ctx'> 	struct amdgpu_device		*adev;</div><div class='ctx'> 	const struct amdgpu_ring_funcs	*funcs;</div><div class='hunk'>@@ -252,13 +271,61 @@ struct amdgpu_ring {</div><div class='ctx'> 	unsigned		rptr_offs;</div><div class='ctx'> 	u64			rptr_gpu_addr;</div><div class='ctx'> 	volatile u32		*rptr_cpu_addr;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @wptr:</div><div class='add'>+	 *</div><div class='add'>+	 * This is part of the Ring buffer implementation and represents the</div><div class='add'>+	 * write pointer. The wptr determines where the host has written.</div><div class='add'>+	 */</div><div class='ctx'> 	u64			wptr;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @wptr_old:</div><div class='add'>+	 *</div><div class='add'>+	 * Before update wptr with the new value, usually the old value is</div><div class='add'>+	 * stored in the wptr_old.</div><div class='add'>+	 */</div><div class='ctx'> 	u64			wptr_old;</div><div class='ctx'> 	unsigned		ring_size;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @max_dw:</div><div class='add'>+	 *</div><div class='add'>+	 * Maximum number of DWords for ring allocation. This information is</div><div class='add'>+	 * provided at the ring initialization time, and each IP block can</div><div class='add'>+	 * specify a specific value. Check places that invoke</div><div class='add'>+	 * amdgpu_ring_init() to see the maximum size per block.</div><div class='add'>+	 */</div><div class='ctx'> 	unsigned		max_dw;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @count_dw:</div><div class='add'>+	 *</div><div class='add'>+	 * This value starts with the maximum amount of DWords supported by the</div><div class='add'>+	 * ring. This value is updated based on the ring manipulation.</div><div class='add'>+	 */</div><div class='ctx'> 	int			count_dw;</div><div class='ctx'> 	uint64_t		gpu_addr;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @ptr_mask:</div><div class='add'>+	 *</div><div class='add'>+	 * Some IPs provide support for 64-bit pointers and others for 32-bit</div><div class='add'>+	 * only; this behavior is component-specific and defined by the field</div><div class='add'>+	 * support_64bit_ptr. If the IP block supports 64-bits, the mask</div><div class='add'>+	 * 0xffffffffffffffff is set; otherwise, this value assumes buf_mask.</div><div class='add'>+	 * Notice that this field is used to keep wptr under a valid range.</div><div class='add'>+	 */</div><div class='ctx'> 	uint64_t		ptr_mask;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @buf_mask:</div><div class='add'>+	 *</div><div class='add'>+	 * Buffer mask is a value used to keep wptr count under its</div><div class='add'>+	 * thresholding. Buffer mask initialized during the ring buffer</div><div class='add'>+	 * initialization time, and it is defined as (ring_size / 4) -1.</div><div class='add'>+	 */</div><div class='ctx'> 	uint32_t		buf_mask;</div><div class='ctx'> 	u32			idx;</div><div class='ctx'> 	u32			xcc_id;</div><div class='hunk'>@@ -276,6 +343,13 @@ struct amdgpu_ring {</div><div class='ctx'> 	bool			use_pollmem;</div><div class='ctx'> 	unsigned		wptr_offs;</div><div class='ctx'> 	u64			wptr_gpu_addr;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @wptr_cpu_addr:</div><div class='add'>+	 *</div><div class='add'>+	 * This is the CPU address pointer in the writeback slot. This is used</div><div class='add'>+	 * to commit changes to the GPU.</div><div class='add'>+	 */</div><div class='ctx'> 	volatile u32		*wptr_cpu_addr;</div><div class='ctx'> 	unsigned		fence_offs;</div><div class='ctx'> 	u64			fence_gpu_addr;</div><div class='hunk'>@@ -297,20 +371,15 @@ struct amdgpu_ring {</div><div class='ctx'> 	struct dma_fence	*vmid_wait;</div><div class='ctx'> 	bool			has_compute_vm_bug;</div><div class='ctx'> 	bool			no_scheduler;</div><div class='add'>+	bool			no_user_submission;</div><div class='ctx'> 	int			hw_prio;</div><div class='ctx'> 	unsigned 		num_hw_submission;</div><div class='ctx'> 	atomic_t		*sched_score;</div><div class='ctx'> </div><div class='del'>-	/* used for mes */</div><div class='del'>-	bool			is_mes_queue;</div><div class='del'>-	uint32_t		hw_queue_id;</div><div class='del'>-	struct amdgpu_mes_ctx_data *mes_ctx;</div><div class='del'>-</div><div class='ctx'> 	bool            is_sw_ring;</div><div class='ctx'> 	unsigned int    entry_index;</div><div class='ctx'> 	/* store the cached rptr to restore after reset */</div><div class='ctx'> 	uint64_t cached_rptr;</div><div class='del'>-</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define amdgpu_ring_parse_cs(r, p, job, ib) ((r)-&gt;funcs-&gt;parse_cs((p), (job), (ib)))</div><div class='hunk'>@@ -435,15 +504,6 @@ static inline void amdgpu_ring_patch_cond_exec(struct amdgpu_ring *ring,</div><div class='ctx'> 	ring-&gt;ring[offset] = cur - offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset)			\</div><div class='del'>-	(ring-&gt;is_mes_queue &amp;&amp; ring-&gt;mes_ctx ?				\</div><div class='del'>-	 (ring-&gt;mes_ctx-&gt;meta_data_gpu_addr + offset) : 0)</div><div class='del'>-</div><div class='del'>-#define amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset)			\</div><div class='del'>-	(ring-&gt;is_mes_queue &amp;&amp; ring-&gt;mes_ctx ?				\</div><div class='del'>-	 (void *)((uint8_t *)(ring-&gt;mes_ctx-&gt;meta_data_ptr) + offset) : \</div><div class='del'>-	 NULL)</div><div class='del'>-</div><div class='ctx'> int amdgpu_ring_test_helper(struct amdgpu_ring *ring);</div><div class='ctx'> </div><div class='ctx'> void amdgpu_debugfs_ring_init(struct amdgpu_device *adev,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h<br/>index fce22d3f816b..c210625be220 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h</a></div><div class='hunk'>@@ -237,6 +237,20 @@ struct amdgpu_rlc_funcs {</div><div class='ctx'> 	void (*unset_safe_mode)(struct amdgpu_device *adev, int xcc_id);</div><div class='ctx'> 	int  (*init)(struct amdgpu_device *adev);</div><div class='ctx'> 	u32  (*get_csb_size)(struct amdgpu_device *adev);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @get_csb_buffer: Get the clear state to be put into the hardware.</div><div class='add'>+	 *</div><div class='add'>+	 * The parameter adev is used to get the CS data and other gfx info,</div><div class='add'>+	 * and buffer is the RLC CS pointer</div><div class='add'>+	 *</div><div class='add'>+	 * Sometimes, the user space puts a request to clear the state in the</div><div class='add'>+	 * command buffer; this function provides the clear state that gets put</div><div class='add'>+	 * into the hardware. Note that the driver programs Clear State</div><div class='add'>+	 * Indirect Buffer (CSB) explicitly when it sets up the kernel rings,</div><div class='add'>+	 * and it also provides a pointer to it which is used by the firmware</div><div class='add'>+	 * to load the clear state in some cases.</div><div class='add'>+	 */</div><div class='ctx'> 	void (*get_csb_buffer)(struct amdgpu_device *adev, volatile u32 *buffer);</div><div class='ctx'> 	int  (*get_cp_table_num)(struct amdgpu_device *adev);</div><div class='ctx'> 	int  (*resume)(struct amdgpu_device *adev);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c<br/>index 529c9696c2f3..6716ac281c49 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> #include "amdgpu_sdma.h"</div><div class='ctx'> #include "amdgpu_ras.h"</div><div class='ctx'> #include "amdgpu_reset.h"</div><div class='add'>+#include "gc/gc_10_1_0_offset.h"</div><div class='add'>+#include "gc/gc_10_3_0_sh_mask.h"</div><div class='ctx'> </div><div class='ctx'> #define AMDGPU_CSA_SDMA_SIZE 64</div><div class='ctx'> /* SDMA CSA reside in the 3rd page of CSA */</div><div class='hunk'>@@ -76,22 +78,14 @@ uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring,</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev) || vmid == 0 || !adev-&gt;gfx.mcbp)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='add'>+	r = amdgpu_sdma_get_index_from_ring(ring, &amp;index);</div><div class='ctx'> </div><div class='del'>-		offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-				  sdma[ring-&gt;idx].sdma_meta_data);</div><div class='del'>-		csa_mc_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_sdma_get_index_from_ring(ring, &amp;index);</div><div class='del'>-</div><div class='del'>-		if (r || index &gt; 31)</div><div class='del'>-			csa_mc_addr = 0;</div><div class='del'>-		else</div><div class='del'>-			csa_mc_addr = amdgpu_csa_vaddr(adev) +</div><div class='del'>-				AMDGPU_CSA_SDMA_OFFSET +</div><div class='del'>-				index * AMDGPU_CSA_SDMA_SIZE;</div><div class='del'>-	}</div><div class='add'>+	if (r || index &gt; 31)</div><div class='add'>+		csa_mc_addr = 0;</div><div class='add'>+	else</div><div class='add'>+		csa_mc_addr = amdgpu_csa_vaddr(adev) +</div><div class='add'>+			AMDGPU_CSA_SDMA_OFFSET +</div><div class='add'>+			index * AMDGPU_CSA_SDMA_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	return csa_mc_addr;</div><div class='ctx'> }</div><div class='hunk'>@@ -537,28 +531,38 @@ bool amdgpu_sdma_is_shared_inv_eng(struct amdgpu_device *adev, struct amdgpu_rin</div><div class='ctx'> 		return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * amdgpu_sdma_register_on_reset_callbacks - Register SDMA reset callbacks</div><div class='del'>- * @funcs: Pointer to the callback structure containing pre_reset and post_reset functions</div><div class='del'>- *</div><div class='del'>- * This function allows KFD and AMDGPU to register their own callbacks for handling</div><div class='del'>- * pre-reset and post-reset operations for engine reset. These are needed because engine</div><div class='del'>- * reset will stop all queues on that engine.</div><div class='del'>- */</div><div class='del'>-void amdgpu_sdma_register_on_reset_callbacks(struct amdgpu_device *adev, struct sdma_on_reset_funcs *funcs)</div><div class='add'>+static int amdgpu_sdma_soft_reset(struct amdgpu_device *adev, u32 instance_id)</div><div class='ctx'> {</div><div class='del'>-	if (!funcs)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Ensure the reset_callback_list is initialized */</div><div class='del'>-	if (!adev-&gt;sdma.reset_callback_list.next) {</div><div class='del'>-		INIT_LIST_HEAD(&amp;adev-&gt;sdma.reset_callback_list);</div><div class='add'>+	struct amdgpu_sdma_instance *sdma_instance = &amp;adev-&gt;sdma.instance[instance_id];</div><div class='add'>+	int r = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {</div><div class='add'>+	case IP_VERSION(4, 4, 2):</div><div class='add'>+	case IP_VERSION(4, 4, 4):</div><div class='add'>+	case IP_VERSION(4, 4, 5):</div><div class='add'>+		/* For SDMA 4.x, use the existing DPM interface for backward compatibility */</div><div class='add'>+		r = amdgpu_dpm_reset_sdma(adev, 1 &lt;&lt; instance_id);</div><div class='add'>+		break;</div><div class='add'>+	case IP_VERSION(5, 0, 0):</div><div class='add'>+	case IP_VERSION(5, 0, 1):</div><div class='add'>+	case IP_VERSION(5, 0, 2):</div><div class='add'>+	case IP_VERSION(5, 0, 5):</div><div class='add'>+	case IP_VERSION(5, 2, 0):</div><div class='add'>+	case IP_VERSION(5, 2, 2):</div><div class='add'>+	case IP_VERSION(5, 2, 4):</div><div class='add'>+	case IP_VERSION(5, 2, 5):</div><div class='add'>+	case IP_VERSION(5, 2, 6):</div><div class='add'>+	case IP_VERSION(5, 2, 3):</div><div class='add'>+	case IP_VERSION(5, 2, 1):</div><div class='add'>+	case IP_VERSION(5, 2, 7):</div><div class='add'>+		if (sdma_instance-&gt;funcs-&gt;soft_reset_kernel_queue)</div><div class='add'>+			r = sdma_instance-&gt;funcs-&gt;soft_reset_kernel_queue(adev, instance_id);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='del'>-	/* Initialize the list node in the callback structure */</div><div class='del'>-	INIT_LIST_HEAD(&amp;funcs-&gt;list);</div><div class='ctx'> </div><div class='del'>-	/* Add the callback structure to the global list */</div><div class='del'>-	list_add_tail(&amp;funcs-&gt;list, &amp;adev-&gt;sdma.reset_callback_list);</div><div class='add'>+	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -566,16 +570,10 @@ void amdgpu_sdma_register_on_reset_callbacks(struct amdgpu_device *adev, struct</div><div class='ctx'>  * @adev: Pointer to the AMDGPU device</div><div class='ctx'>  * @instance_id: ID of the SDMA engine instance to reset</div><div class='ctx'>  *</div><div class='del'>- * This function performs the following steps:</div><div class='del'>- * 1. Calls all registered pre_reset callbacks to allow KFD and AMDGPU to save their state.</div><div class='del'>- * 2. Resets the specified SDMA engine instance.</div><div class='del'>- * 3. Calls all registered post_reset callbacks to allow KFD and AMDGPU to restore their state.</div><div class='del'>- *</div><div class='ctx'>  * Returns: 0 on success, or a negative error code on failure.</div><div class='ctx'>  */</div><div class='ctx'> int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id)</div><div class='ctx'> {</div><div class='del'>-	struct sdma_on_reset_funcs *funcs;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	struct amdgpu_sdma_instance *sdma_instance = &amp;adev-&gt;sdma.instance[instance_id];</div><div class='ctx'> 	struct amdgpu_ring *gfx_ring = &amp;sdma_instance-&gt;ring;</div><div class='hunk'>@@ -597,38 +595,18 @@ int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id)</div><div class='ctx'> 		page_sched_stopped = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Invoke all registered pre_reset callbacks */</div><div class='del'>-	list_for_each_entry(funcs, &amp;adev-&gt;sdma.reset_callback_list, list) {</div><div class='del'>-		if (funcs-&gt;pre_reset) {</div><div class='del'>-			ret = funcs-&gt;pre_reset(adev, instance_id);</div><div class='del'>-			if (ret) {</div><div class='del'>-				dev_err(adev-&gt;dev,</div><div class='del'>-				"beforeReset callback failed for instance %u: %d\n",</div><div class='del'>-					instance_id, ret);</div><div class='del'>-				goto exit;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (sdma_instance-&gt;funcs-&gt;stop_kernel_queue)</div><div class='add'>+		sdma_instance-&gt;funcs-&gt;stop_kernel_queue(gfx_ring);</div><div class='ctx'> </div><div class='ctx'> 	/* Perform the SDMA reset for the specified instance */</div><div class='del'>-	ret = amdgpu_dpm_reset_sdma(adev, 1 &lt;&lt; instance_id);</div><div class='add'>+	ret = amdgpu_sdma_soft_reset(adev, instance_id);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(adev-&gt;dev, "Failed to reset SDMA instance %u\n", instance_id);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Invoke all registered post_reset callbacks */</div><div class='del'>-	list_for_each_entry(funcs, &amp;adev-&gt;sdma.reset_callback_list, list) {</div><div class='del'>-		if (funcs-&gt;post_reset) {</div><div class='del'>-			ret = funcs-&gt;post_reset(adev, instance_id);</div><div class='del'>-			if (ret) {</div><div class='del'>-				dev_err(adev-&gt;dev,</div><div class='del'>-				"afterReset callback failed for instance %u: %d\n",</div><div class='del'>-					instance_id, ret);</div><div class='del'>-				goto exit;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (sdma_instance-&gt;funcs-&gt;start_kernel_queue)</div><div class='add'>+		sdma_instance-&gt;funcs-&gt;start_kernel_queue(gfx_ring);</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='ctx'> 	/* Restart the scheduler's work queue for the GFX and page rings</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h<br/>index 47d56fd0589f..5605921212f0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h</a></div><div class='hunk'>@@ -50,6 +50,12 @@ enum amdgpu_sdma_irq {</div><div class='ctx'> </div><div class='ctx'> #define NUM_SDMA(x) hweight32(x)</div><div class='ctx'> </div><div class='add'>+struct amdgpu_sdma_funcs {</div><div class='add'>+	int (*stop_kernel_queue)(struct amdgpu_ring *ring);</div><div class='add'>+	int (*start_kernel_queue)(struct amdgpu_ring *ring);</div><div class='add'>+	int (*soft_reset_kernel_queue)(struct amdgpu_device *adev, u32 instance_id);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct amdgpu_sdma_instance {</div><div class='ctx'> 	/* SDMA firmware */</div><div class='ctx'> 	const struct firmware	*fw;</div><div class='hunk'>@@ -68,7 +74,7 @@ struct amdgpu_sdma_instance {</div><div class='ctx'> 	/* track guilty state of GFX and PAGE queues */</div><div class='ctx'> 	bool			gfx_guilty;</div><div class='ctx'> 	bool			page_guilty;</div><div class='del'>-</div><div class='add'>+	const struct amdgpu_sdma_funcs   *funcs;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum amdgpu_sdma_ras_memory_id {</div><div class='hunk'>@@ -103,13 +109,6 @@ struct amdgpu_sdma_ras {</div><div class='ctx'> 	struct amdgpu_ras_block_object ras_block;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct sdma_on_reset_funcs {</div><div class='del'>-	int (*pre_reset)(struct amdgpu_device *adev, uint32_t instance_id);</div><div class='del'>-	int (*post_reset)(struct amdgpu_device *adev, uint32_t instance_id);</div><div class='del'>-	/* Linked list node to store this structure in a list; */</div><div class='del'>-	struct list_head list;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct amdgpu_sdma {</div><div class='ctx'> 	struct amdgpu_sdma_instance instance[AMDGPU_MAX_SDMA_INSTANCES];</div><div class='ctx'> 	struct amdgpu_irq_src	trap_irq;</div><div class='hunk'>@@ -131,6 +130,8 @@ struct amdgpu_sdma {</div><div class='ctx'> 	uint32_t		*ip_dump;</div><div class='ctx'> 	uint32_t 		supported_reset;</div><div class='ctx'> 	struct list_head	reset_callback_list;</div><div class='add'>+	bool			no_user_submission;</div><div class='add'>+	bool			disable_uq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -170,7 +171,6 @@ struct amdgpu_buffer_funcs {</div><div class='ctx'> 				 uint32_t byte_count);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void amdgpu_sdma_register_on_reset_callbacks(struct amdgpu_device *adev, struct sdma_on_reset_funcs *funcs);</div><div class='ctx'> int amdgpu_sdma_reset_engine(struct amdgpu_device *adev, uint32_t instance_id);</div><div class='ctx'> </div><div class='ctx'> #define amdgpu_emit_copy_buffer(adev, ib, s, d, b, t) (adev)-&gt;mman.buffer_funcs-&gt;emit_copy_buffer((ib),  (s), (d), (b), (t))</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c<br/>index e22cb2b5cd92..3939761be31c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c</a></div><div class='hunk'>@@ -45,7 +45,11 @@</div><div class='ctx'>  */</div><div class='ctx'> static inline u64 amdgpu_seq64_get_va_base(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	return AMDGPU_VA_RESERVED_SEQ64_START(adev);</div><div class='add'>+	u64 addr = AMDGPU_VA_RESERVED_SEQ64_START(adev);</div><div class='add'>+</div><div class='add'>+	addr = amdgpu_gmc_sign_extend(addr);</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -63,9 +67,9 @@ static inline u64 amdgpu_seq64_get_va_base(struct amdgpu_device *adev)</div><div class='ctx'> int amdgpu_seq64_map(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> 		     struct amdgpu_bo_va **bo_va)</div><div class='ctx'> {</div><div class='add'>+	u64 seq64_addr, va_flags;</div><div class='ctx'> 	struct amdgpu_bo *bo;</div><div class='ctx'> 	struct drm_exec exec;</div><div class='del'>-	u64 seq64_addr;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='ctx'> 	bo = adev-&gt;seq64.sbo;</div><div class='hunk'>@@ -88,9 +92,11 @@ int amdgpu_seq64_map(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	seq64_addr = amdgpu_seq64_get_va_base(adev);</div><div class='add'>+	seq64_addr = amdgpu_seq64_get_va_base(adev) &amp; AMDGPU_GMC_HOLE_MASK;</div><div class='add'>+</div><div class='add'>+	va_flags = amdgpu_gem_va_map_flags(adev, AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_MTYPE_UC);</div><div class='ctx'> 	r = amdgpu_vm_bo_map(adev, *bo_va, seq64_addr, 0, AMDGPU_VA_RESERVED_SEQ64_SIZE,</div><div class='del'>-			     AMDGPU_PTE_READABLE);</div><div class='add'>+			     va_flags);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("failed to do bo_map on userq sem, err=%d\n", r);</div><div class='ctx'> 		amdgpu_vm_bo_del(adev, *bo_va);</div><div class='hunk'>@@ -156,6 +162,7 @@ error:</div><div class='ctx'>  *</div><div class='ctx'>  * @adev: amdgpu_device pointer</div><div class='ctx'>  * @va: VA to access the seq in process address space</div><div class='add'>+ * @gpu_addr: GPU address to access the seq</div><div class='ctx'>  * @cpu_addr: CPU address to access the seq</div><div class='ctx'>  *</div><div class='ctx'>  * Alloc a 64 bit memory from seq64 pool.</div><div class='hunk'>@@ -163,7 +170,8 @@ error:</div><div class='ctx'>  * Returns:</div><div class='ctx'>  * 0 on success or a negative error code on failure</div><div class='ctx'>  */</div><div class='del'>-int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 **cpu_addr)</div><div class='add'>+int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va,</div><div class='add'>+		       u64 *gpu_addr, u64 **cpu_addr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long bit_pos;</div><div class='ctx'> </div><div class='hunk'>@@ -172,7 +180,12 @@ int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 **cpu_addr)</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> </div><div class='ctx'> 	__set_bit(bit_pos, adev-&gt;seq64.used);</div><div class='add'>+</div><div class='ctx'> 	*va = bit_pos * sizeof(u64) + amdgpu_seq64_get_va_base(adev);</div><div class='add'>+</div><div class='add'>+	if (gpu_addr)</div><div class='add'>+		*gpu_addr = bit_pos * sizeof(u64) + adev-&gt;seq64.gpu_addr;</div><div class='add'>+</div><div class='ctx'> 	*cpu_addr = bit_pos + adev-&gt;seq64.cpu_base_addr;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -233,7 +246,7 @@ int amdgpu_seq64_init(struct amdgpu_device *adev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	r = amdgpu_bo_create_kernel(adev, AMDGPU_VA_RESERVED_SEQ64_SIZE,</div><div class='ctx'> 				    PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,</div><div class='del'>-				    &amp;adev-&gt;seq64.sbo, NULL,</div><div class='add'>+				    &amp;adev-&gt;seq64.sbo, &amp;adev-&gt;seq64.gpu_addr,</div><div class='ctx'> 				    (void **)&amp;adev-&gt;seq64.cpu_base_addr);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		dev_warn(adev-&gt;dev, "(%d) create seq64 failed\n", r);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h<br/>index 4203b2ab318d..26a249aaaee1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h</a></div><div class='hunk'>@@ -32,13 +32,14 @@</div><div class='ctx'> struct amdgpu_seq64 {</div><div class='ctx'> 	struct amdgpu_bo *sbo;</div><div class='ctx'> 	u32 num_sem;</div><div class='add'>+	u64 gpu_addr;</div><div class='ctx'> 	u64 *cpu_base_addr;</div><div class='ctx'> 	DECLARE_BITMAP(used, AMDGPU_MAX_SEQ64_SLOTS);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void amdgpu_seq64_fini(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_seq64_init(struct amdgpu_device *adev);</div><div class='del'>-int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *gpu_addr, u64 **cpu_addr);</div><div class='add'>+int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 *gpu_addr, u64 **cpu_addr);</div><div class='ctx'> void amdgpu_seq64_free(struct amdgpu_device *adev, u64 gpu_addr);</div><div class='ctx'> int amdgpu_seq64_map(struct amdgpu_device *adev, struct amdgpu_vm *vm,</div><div class='ctx'> 		     struct amdgpu_bo_va **bo_va);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c<br/>index 5576ed0b508f..d6ae9974c952 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c</a></div><div class='hunk'>@@ -249,9 +249,8 @@ int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,</div><div class='ctx'> </div><div class='ctx'> 	if (resv == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* TODO: Use DMA_RESV_USAGE_READ here */</div><div class='del'>-	dma_resv_for_each_fence(&amp;cursor, resv, DMA_RESV_USAGE_BOOKKEEP, f) {</div><div class='add'>+	/* Implicitly sync only to KERNEL, WRITE and READ */</div><div class='add'>+	dma_resv_for_each_fence(&amp;cursor, resv, DMA_RESV_USAGE_READ, f) {</div><div class='ctx'> 		dma_fence_chain_for_each(f, f) {</div><div class='ctx'> 			struct dma_fence *tmp = dma_fence_chain_contained(f);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c<br/>index 53b71e9d8076..9c5df35f05b7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c</a></div><div class='hunk'>@@ -2081,6 +2081,8 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)</div><div class='ctx'> 	amdgpu_vram_mgr_fini(adev);</div><div class='ctx'> 	amdgpu_gtt_mgr_fini(adev);</div><div class='ctx'> 	amdgpu_preempt_mgr_fini(adev);</div><div class='add'>+	amdgpu_doorbell_fini(adev);</div><div class='add'>+</div><div class='ctx'> 	ttm_range_man_fini(&amp;adev-&gt;mman.bdev, AMDGPU_PL_GDS);</div><div class='ctx'> 	ttm_range_man_fini(&amp;adev-&gt;mman.bdev, AMDGPU_PL_GWS);</div><div class='ctx'> 	ttm_range_man_fini(&amp;adev-&gt;mman.bdev, AMDGPU_PL_OA);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c<br/>index 3d9e9fdc10b4..4a72c2bbd49e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c</a></div><div class='hunk'>@@ -767,6 +767,7 @@ FW_VERSION_ATTR(vcn_fw_version, 0444, vcn.fw_version);</div><div class='ctx'> FW_VERSION_ATTR(dmcu_fw_version, 0444, dm.dmcu_fw_version);</div><div class='ctx'> FW_VERSION_ATTR(mes_fw_version, 0444, mes.sched_version &amp; AMDGPU_MES_VERSION_MASK);</div><div class='ctx'> FW_VERSION_ATTR(mes_kiq_fw_version, 0444, mes.kiq_version &amp; AMDGPU_MES_VERSION_MASK);</div><div class='add'>+FW_VERSION_ATTR(pldm_fw_version, 0444, firmware.pldm_version);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *fw_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_vce_fw_version.attr, &amp;dev_attr_uvd_fw_version.attr,</div><div class='hunk'>@@ -781,7 +782,7 @@ static struct attribute *fw_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_sdma2_fw_version.attr, &amp;dev_attr_vcn_fw_version.attr,</div><div class='ctx'> 	&amp;dev_attr_dmcu_fw_version.attr, &amp;dev_attr_imu_fw_version.attr,</div><div class='ctx'> 	&amp;dev_attr_mes_fw_version.attr, &amp;dev_attr_mes_kiq_fw_version.attr,</div><div class='del'>-	NULL</div><div class='add'>+	&amp;dev_attr_pldm_fw_version.attr, NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define to_dev_attr(x) container_of(x, struct device_attribute, attr)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h<br/>index 4eedd92f000b..9e89c3487be5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "amdgpu_socbb.h"</div><div class='ctx'> </div><div class='add'>+#define RS64_FW_UC_START_ADDR_LO 0x3000</div><div class='add'>+</div><div class='ctx'> struct common_firmware_header {</div><div class='ctx'> 	uint32_t size_bytes; /* size of the entire header+image(s) in bytes */</div><div class='ctx'> 	uint32_t header_size_bytes; /* size of just the header in bytes */</div><div class='hunk'>@@ -600,6 +602,7 @@ struct amdgpu_firmware {</div><div class='ctx'> </div><div class='ctx'> 	void *fw_buf_ptr;</div><div class='ctx'> 	uint64_t fw_buf_mc;</div><div class='add'>+	uint32_t pldm_version;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void amdgpu_ucode_print_mc_hdr(const struct common_firmware_header *hdr);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c<br/>index 0a1ef95b2866..8c6e55b5b967 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c</a></div><div class='hunk'>@@ -529,6 +529,7 @@ int amdgpu_umc_lookup_bad_pages_in_a_row(struct amdgpu_device *adev,</div><div class='ctx'> 		pfns[i] = err_data.err_addr[i].retired_page;</div><div class='ctx'> 	}</div><div class='ctx'> 	ret = i;</div><div class='add'>+	adev-&gt;umc.err_addr_cnt = err_data.err_addr_cnt;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	kfree(err_data.err_addr);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h<br/>index 857693bcd8d4..29ce6b1d214a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h</a></div><div class='hunk'>@@ -78,6 +78,18 @@</div><div class='ctx'> #define UMC_NPS_SHIFT 40</div><div class='ctx'> #define UMC_NPS_MASK 0xffULL</div><div class='ctx'> </div><div class='add'>+/* three column bits and one row bit in MCA address flip</div><div class='add'>+ * in bad page retirement</div><div class='add'>+ */</div><div class='add'>+#define RETIRE_FLIP_BITS_NUM 4</div><div class='add'>+</div><div class='add'>+struct amdgpu_umc_flip_bits {</div><div class='add'>+	uint32_t flip_bits_in_pa[RETIRE_FLIP_BITS_NUM];</div><div class='add'>+	uint32_t flip_row_bit;</div><div class='add'>+	uint32_t r13_in_pa;</div><div class='add'>+	uint32_t bit_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> typedef int (*umc_func)(struct amdgpu_device *adev, uint32_t node_inst,</div><div class='ctx'> 			uint32_t umc_inst, uint32_t ch_inst, void *data);</div><div class='ctx'> </div><div class='hunk'>@@ -100,6 +112,7 @@ struct amdgpu_umc_ras {</div><div class='ctx'> 			bool dump_addr);</div><div class='ctx'> 	uint32_t (*get_die_id_from_pa)(struct amdgpu_device *adev,</div><div class='ctx'> 			uint64_t mca_addr, uint64_t retired_page);</div><div class='add'>+	void (*get_retire_flip_bits)(struct amdgpu_device *adev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_umc_funcs {</div><div class='hunk'>@@ -130,6 +143,10 @@ struct amdgpu_umc {</div><div class='ctx'> </div><div class='ctx'> 	/* active mask for umc node instance */</div><div class='ctx'> 	unsigned long active_mask;</div><div class='add'>+</div><div class='add'>+	struct amdgpu_umc_flip_bits flip_bits;</div><div class='add'>+</div><div class='add'>+	unsigned long err_addr_cnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int amdgpu_umc_ras_sw_init(struct amdgpu_device *adev);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c<br/>new file mode 100644<br/>index 000000000000..295e7186e156<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c</a></div><div class='hunk'>@@ -0,0 +1,924 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;drm/drm_auth.h&gt;</div><div class='add'>+#include &lt;drm/drm_exec.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "amdgpu_vm.h"</div><div class='add'>+#include "amdgpu_userq.h"</div><div class='add'>+#include "amdgpu_userq_fence.h"</div><div class='add'>+</div><div class='add'>+u32 amdgpu_userq_get_supported_ip_mask(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u32 userq_ip_mask = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AMDGPU_HW_IP_NUM; i++) {</div><div class='add'>+		if (adev-&gt;userq_funcs[i])</div><div class='add'>+			userq_ip_mask |= (1 &lt;&lt; i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return userq_ip_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_unmap_helper(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			  struct amdgpu_usermode_queue *queue)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	const struct amdgpu_userq_funcs *userq_funcs =</div><div class='add'>+		adev-&gt;userq_funcs[queue-&gt;queue_type];</div><div class='add'>+	int r = 0;</div><div class='add'>+</div><div class='add'>+	if (queue-&gt;state == AMDGPU_USERQ_STATE_MAPPED) {</div><div class='add'>+		r = userq_funcs-&gt;unmap(uq_mgr, queue);</div><div class='add'>+		if (r)</div><div class='add'>+			queue-&gt;state = AMDGPU_USERQ_STATE_HUNG;</div><div class='add'>+		else</div><div class='add'>+			queue-&gt;state = AMDGPU_USERQ_STATE_UNMAPPED;</div><div class='add'>+	}</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_map_helper(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			struct amdgpu_usermode_queue *queue)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	const struct amdgpu_userq_funcs *userq_funcs =</div><div class='add'>+		adev-&gt;userq_funcs[queue-&gt;queue_type];</div><div class='add'>+	int r = 0;</div><div class='add'>+</div><div class='add'>+	if (queue-&gt;state == AMDGPU_USERQ_STATE_UNMAPPED) {</div><div class='add'>+		r = userq_funcs-&gt;map(uq_mgr, queue);</div><div class='add'>+		if (r) {</div><div class='add'>+			queue-&gt;state = AMDGPU_USERQ_STATE_HUNG;</div><div class='add'>+		} else {</div><div class='add'>+			queue-&gt;state = AMDGPU_USERQ_STATE_MAPPED;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+amdgpu_userq_wait_for_last_fence(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+				 struct amdgpu_usermode_queue *queue)</div><div class='add'>+{</div><div class='add'>+	struct dma_fence *f = queue-&gt;last_fence;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (f &amp;&amp; !dma_fence_is_signaled(f)) {</div><div class='add'>+		ret = dma_fence_wait_timeout(f, true, msecs_to_jiffies(100));</div><div class='add'>+		if (ret &lt;= 0)</div><div class='add'>+			drm_file_err(uq_mgr-&gt;file, "Timed out waiting for fence=%llu:%llu\n",</div><div class='add'>+				     f-&gt;context, f-&gt;seqno);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+amdgpu_userq_cleanup(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+		     struct amdgpu_usermode_queue *queue,</div><div class='add'>+		     int queue_id)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	const struct amdgpu_userq_funcs *uq_funcs = adev-&gt;userq_funcs[queue-&gt;queue_type];</div><div class='add'>+</div><div class='add'>+	uq_funcs-&gt;mqd_destroy(uq_mgr, queue);</div><div class='add'>+	amdgpu_userq_fence_driver_free(queue);</div><div class='add'>+	idr_remove(&amp;uq_mgr-&gt;userq_idr, queue_id);</div><div class='add'>+	kfree(queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+amdgpu_userq_active(struct amdgpu_userq_mgr *uq_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+	/* Resume all the queues for this process */</div><div class='add'>+	idr_for_each_entry(&amp;uq_mgr-&gt;userq_idr, queue, queue_id)</div><div class='add'>+		ret += queue-&gt;state == AMDGPU_USERQ_STATE_MAPPED;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct amdgpu_usermode_queue *</div><div class='add'>+amdgpu_userq_find(struct amdgpu_userq_mgr *uq_mgr, int qid)</div><div class='add'>+{</div><div class='add'>+	return idr_find(&amp;uq_mgr-&gt;userq_idr, qid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+amdgpu_userq_ensure_ev_fence(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			     struct amdgpu_eviction_fence_mgr *evf_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_eviction_fence *ev_fence;</div><div class='add'>+</div><div class='add'>+retry:</div><div class='add'>+	/* Flush any pending resume work to create ev_fence */</div><div class='add'>+	flush_delayed_work(&amp;uq_mgr-&gt;resume_work);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+	spin_lock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+	ev_fence = evf_mgr-&gt;ev_fence;</div><div class='add'>+	spin_unlock(&amp;evf_mgr-&gt;ev_fence_lock);</div><div class='add'>+	if (!ev_fence || dma_fence_is_signaled(&amp;ev_fence-&gt;base)) {</div><div class='add'>+		mutex_unlock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+		/*</div><div class='add'>+		 * Looks like there was no pending resume work,</div><div class='add'>+		 * add one now to create a valid eviction fence</div><div class='add'>+		 */</div><div class='add'>+		schedule_delayed_work(&amp;uq_mgr-&gt;resume_work, 0);</div><div class='add'>+		goto retry;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_create_object(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			       struct amdgpu_userq_obj *userq_obj,</div><div class='add'>+			       int size)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	struct amdgpu_bo_param bp;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	memset(&amp;bp, 0, sizeof(bp));</div><div class='add'>+	bp.byte_align = PAGE_SIZE;</div><div class='add'>+	bp.domain = AMDGPU_GEM_DOMAIN_GTT;</div><div class='add'>+	bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |</div><div class='add'>+		   AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;</div><div class='add'>+	bp.type = ttm_bo_type_kernel;</div><div class='add'>+	bp.size = size;</div><div class='add'>+	bp.resv = NULL;</div><div class='add'>+	bp.bo_ptr_size = sizeof(struct amdgpu_bo);</div><div class='add'>+</div><div class='add'>+	r = amdgpu_bo_create(adev, &amp;bp, &amp;userq_obj-&gt;obj);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to allocate BO for userqueue (%d)", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_bo_reserve(userq_obj-&gt;obj, true);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to reserve BO to map (%d)", r);</div><div class='add'>+		goto free_obj;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_ttm_alloc_gart(&amp;(userq_obj-&gt;obj)-&gt;tbo);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to alloc GART for userqueue object (%d)", r);</div><div class='add'>+		goto unresv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_bo_kmap(userq_obj-&gt;obj, &amp;userq_obj-&gt;cpu_ptr);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to map BO for userqueue (%d)", r);</div><div class='add'>+		goto unresv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	userq_obj-&gt;gpu_addr = amdgpu_bo_gpu_offset(userq_obj-&gt;obj);</div><div class='add'>+	amdgpu_bo_unreserve(userq_obj-&gt;obj);</div><div class='add'>+	memset(userq_obj-&gt;cpu_ptr, 0, size);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unresv:</div><div class='add'>+	amdgpu_bo_unreserve(userq_obj-&gt;obj);</div><div class='add'>+</div><div class='add'>+free_obj:</div><div class='add'>+	amdgpu_bo_unref(&amp;userq_obj-&gt;obj);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_destroy_object(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+				 struct amdgpu_userq_obj *userq_obj)</div><div class='add'>+{</div><div class='add'>+	amdgpu_bo_kunmap(userq_obj-&gt;obj);</div><div class='add'>+	amdgpu_bo_unref(&amp;userq_obj-&gt;obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+uint64_t</div><div class='add'>+amdgpu_userq_get_doorbell_index(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+				struct amdgpu_db_info *db_info,</div><div class='add'>+				struct drm_file *filp)</div><div class='add'>+{</div><div class='add'>+	uint64_t index;</div><div class='add'>+	struct drm_gem_object *gobj;</div><div class='add'>+	struct amdgpu_userq_obj *db_obj = db_info-&gt;db_obj;</div><div class='add'>+	int r, db_size;</div><div class='add'>+</div><div class='add'>+	gobj = drm_gem_object_lookup(filp, db_info-&gt;doorbell_handle);</div><div class='add'>+	if (gobj == NULL) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Can't find GEM object for doorbell\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	db_obj-&gt;obj = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));</div><div class='add'>+	drm_gem_object_put(gobj);</div><div class='add'>+</div><div class='add'>+	r = amdgpu_bo_reserve(db_obj-&gt;obj, true);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "[Usermode queues] Failed to pin doorbell object\n");</div><div class='add'>+		goto unref_bo;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Pin the BO before generating the index, unpin in queue destroy */</div><div class='add'>+	r = amdgpu_bo_pin(db_obj-&gt;obj, AMDGPU_GEM_DOMAIN_DOORBELL);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "[Usermode queues] Failed to pin doorbell object\n");</div><div class='add'>+		goto unresv_bo;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (db_info-&gt;queue_type) {</div><div class='add'>+	case AMDGPU_HW_IP_GFX:</div><div class='add'>+	case AMDGPU_HW_IP_COMPUTE:</div><div class='add'>+	case AMDGPU_HW_IP_DMA:</div><div class='add'>+		db_size = sizeof(u64);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case AMDGPU_HW_IP_VCN_ENC:</div><div class='add'>+		db_size = sizeof(u32);</div><div class='add'>+		db_info-&gt;doorbell_offset += AMDGPU_NAVI10_DOORBELL64_VCN0_1 &lt;&lt; 1;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case AMDGPU_HW_IP_VPE:</div><div class='add'>+		db_size = sizeof(u32);</div><div class='add'>+		db_info-&gt;doorbell_offset += AMDGPU_NAVI10_DOORBELL64_VPE &lt;&lt; 1;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "[Usermode queues] IP %d not support\n",</div><div class='add'>+			     db_info-&gt;queue_type);</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto unpin_bo;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	index = amdgpu_doorbell_index_on_bar(uq_mgr-&gt;adev, db_obj-&gt;obj,</div><div class='add'>+					     db_info-&gt;doorbell_offset, db_size);</div><div class='add'>+	drm_dbg_driver(adev_to_drm(uq_mgr-&gt;adev),</div><div class='add'>+		       "[Usermode queues] doorbell index=%lld\n", index);</div><div class='add'>+	amdgpu_bo_unreserve(db_obj-&gt;obj);</div><div class='add'>+	return index;</div><div class='add'>+</div><div class='add'>+unpin_bo:</div><div class='add'>+	amdgpu_bo_unpin(db_obj-&gt;obj);</div><div class='add'>+unresv_bo:</div><div class='add'>+	amdgpu_bo_unreserve(db_obj-&gt;obj);</div><div class='add'>+unref_bo:</div><div class='add'>+	amdgpu_bo_unref(&amp;db_obj-&gt;obj);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_destroy(struct drm_file *filp, int queue_id)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_fpriv *fpriv = filp-&gt;driver_priv;</div><div class='add'>+	struct amdgpu_userq_mgr *uq_mgr = &amp;fpriv-&gt;userq_mgr;</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	int r = 0;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;uq_mgr-&gt;resume_work);</div><div class='add'>+	mutex_lock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+</div><div class='add'>+	queue = amdgpu_userq_find(uq_mgr, queue_id);</div><div class='add'>+	if (!queue) {</div><div class='add'>+		drm_dbg_driver(adev_to_drm(uq_mgr-&gt;adev), "Invalid queue id to destroy\n");</div><div class='add'>+		mutex_unlock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	amdgpu_userq_wait_for_last_fence(uq_mgr, queue);</div><div class='add'>+	r = amdgpu_bo_reserve(queue-&gt;db_obj.obj, true);</div><div class='add'>+	if (!r) {</div><div class='add'>+		amdgpu_bo_unpin(queue-&gt;db_obj.obj);</div><div class='add'>+		amdgpu_bo_unreserve(queue-&gt;db_obj.obj);</div><div class='add'>+	}</div><div class='add'>+	amdgpu_bo_unref(&amp;queue-&gt;db_obj.obj);</div><div class='add'>+	r = amdgpu_userq_unmap_helper(uq_mgr, queue);</div><div class='add'>+	amdgpu_userq_cleanup(uq_mgr, queue, queue_id);</div><div class='add'>+	mutex_unlock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+</div><div class='add'>+	pm_runtime_mark_last_busy(adev_to_drm(adev)-&gt;dev);</div><div class='add'>+	pm_runtime_put_autosuspend(adev_to_drm(adev)-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_userq_priority_permit(struct drm_file *filp,</div><div class='add'>+					int priority)</div><div class='add'>+{</div><div class='add'>+	if (priority &lt; AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (capable(CAP_SYS_NICE))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (drm_is_current_master(filp))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return -EACCES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_create(struct drm_file *filp, union drm_amdgpu_userq *args)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_fpriv *fpriv = filp-&gt;driver_priv;</div><div class='add'>+	struct amdgpu_userq_mgr *uq_mgr = &amp;fpriv-&gt;userq_mgr;</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	const struct amdgpu_userq_funcs *uq_funcs;</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_db_info db_info;</div><div class='add'>+	bool skip_map_queue;</div><div class='add'>+	uint64_t index;</div><div class='add'>+	int qid, r = 0;</div><div class='add'>+	int priority =</div><div class='add'>+		(args-&gt;in.flags &amp; AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK) &gt;&gt;</div><div class='add'>+		AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* Usermode queues are only supported for GFX IP as of now */</div><div class='add'>+	if (args-&gt;in.ip_type != AMDGPU_HW_IP_GFX &amp;&amp;</div><div class='add'>+	    args-&gt;in.ip_type != AMDGPU_HW_IP_DMA &amp;&amp;</div><div class='add'>+	    args-&gt;in.ip_type != AMDGPU_HW_IP_COMPUTE) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Usermode queue doesn't support IP type %u\n",</div><div class='add'>+			     args-&gt;in.ip_type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_userq_priority_permit(filp, priority);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	if ((args-&gt;in.flags &amp; AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE) &amp;&amp;</div><div class='add'>+	    (args-&gt;in.ip_type != AMDGPU_HW_IP_GFX) &amp;&amp;</div><div class='add'>+	    (args-&gt;in.ip_type != AMDGPU_HW_IP_COMPUTE) &amp;&amp;</div><div class='add'>+	    !amdgpu_is_tmz(adev)) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Secure only supported on GFX/Compute queues\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = pm_runtime_get_sync(adev_to_drm(adev)-&gt;dev);</div><div class='add'>+	if (r &lt; 0) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "pm_runtime_get_sync() failed for userqueue create\n");</div><div class='add'>+		pm_runtime_put_autosuspend(adev_to_drm(adev)-&gt;dev);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * There could be a situation that we are creating a new queue while</div><div class='add'>+	 * the other queues under this UQ_mgr are suspended. So if there is any</div><div class='add'>+	 * resume work pending, wait for it to get done.</div><div class='add'>+	 *</div><div class='add'>+	 * This will also make sure we have a valid eviction fence ready to be used.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	amdgpu_userq_ensure_ev_fence(&amp;fpriv-&gt;userq_mgr, &amp;fpriv-&gt;evf_mgr);</div><div class='add'>+</div><div class='add'>+	uq_funcs = adev-&gt;userq_funcs[args-&gt;in.ip_type];</div><div class='add'>+	if (!uq_funcs) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Usermode queue is not supported for this IP (%u)\n",</div><div class='add'>+			     args-&gt;in.ip_type);</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue = kzalloc(sizeof(struct amdgpu_usermode_queue), GFP_KERNEL);</div><div class='add'>+	if (!queue) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to allocate memory for queue\n");</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+	queue-&gt;doorbell_handle = args-&gt;in.doorbell_handle;</div><div class='add'>+	queue-&gt;queue_type = args-&gt;in.ip_type;</div><div class='add'>+	queue-&gt;vm = &amp;fpriv-&gt;vm;</div><div class='add'>+	queue-&gt;priority = priority;</div><div class='add'>+</div><div class='add'>+	db_info.queue_type = queue-&gt;queue_type;</div><div class='add'>+	db_info.doorbell_handle = queue-&gt;doorbell_handle;</div><div class='add'>+	db_info.db_obj = &amp;queue-&gt;db_obj;</div><div class='add'>+	db_info.doorbell_offset = args-&gt;in.doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* Convert relative doorbell offset into absolute doorbell index */</div><div class='add'>+	index = amdgpu_userq_get_doorbell_index(uq_mgr, &amp;db_info, filp);</div><div class='add'>+	if (index == (uint64_t)-EINVAL) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to get doorbell for queue\n");</div><div class='add'>+		kfree(queue);</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue-&gt;doorbell_index = index;</div><div class='add'>+	xa_init_flags(&amp;queue-&gt;fence_drv_xa, XA_FLAGS_ALLOC);</div><div class='add'>+	r = amdgpu_userq_fence_driver_alloc(adev, queue);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to alloc fence driver\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = uq_funcs-&gt;mqd_create(uq_mgr, &amp;args-&gt;in, queue);</div><div class='add'>+	if (r) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to create Queue\n");</div><div class='add'>+		amdgpu_userq_fence_driver_free(queue);</div><div class='add'>+		kfree(queue);</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	qid = idr_alloc(&amp;uq_mgr-&gt;userq_idr, queue, 1, AMDGPU_MAX_USERQ_COUNT, GFP_KERNEL);</div><div class='add'>+	if (qid &lt; 0) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to allocate a queue id\n");</div><div class='add'>+		amdgpu_userq_fence_driver_free(queue);</div><div class='add'>+		uq_funcs-&gt;mqd_destroy(uq_mgr, queue);</div><div class='add'>+		kfree(queue);</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* don't map the queue if scheduling is halted */</div><div class='add'>+	if (adev-&gt;userq_halt_for_enforce_isolation &amp;&amp;</div><div class='add'>+	    ((queue-&gt;queue_type == AMDGPU_HW_IP_GFX) ||</div><div class='add'>+	     (queue-&gt;queue_type == AMDGPU_HW_IP_COMPUTE)))</div><div class='add'>+		skip_map_queue = true;</div><div class='add'>+	else</div><div class='add'>+		skip_map_queue = false;</div><div class='add'>+	if (!skip_map_queue) {</div><div class='add'>+		r = amdgpu_userq_map_helper(uq_mgr, queue);</div><div class='add'>+		if (r) {</div><div class='add'>+			drm_file_err(uq_mgr-&gt;file, "Failed to map Queue\n");</div><div class='add'>+			idr_remove(&amp;uq_mgr-&gt;userq_idr, qid);</div><div class='add'>+			amdgpu_userq_fence_driver_free(queue);</div><div class='add'>+			uq_funcs-&gt;mqd_destroy(uq_mgr, queue);</div><div class='add'>+			kfree(queue);</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	args-&gt;out.queue_id = qid;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+		       struct drm_file *filp)</div><div class='add'>+{</div><div class='add'>+	union drm_amdgpu_userq *args = data;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	switch (args-&gt;in.op) {</div><div class='add'>+	case AMDGPU_USERQ_OP_CREATE:</div><div class='add'>+		if (args-&gt;in.flags &amp; ~(AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_MASK |</div><div class='add'>+				       AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		r = amdgpu_userq_create(filp, args);</div><div class='add'>+		if (r)</div><div class='add'>+			drm_file_err(filp, "Failed to create usermode queue\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case AMDGPU_USERQ_OP_FREE:</div><div class='add'>+		if (args-&gt;in.ip_type ||</div><div class='add'>+		    args-&gt;in.doorbell_handle ||</div><div class='add'>+		    args-&gt;in.doorbell_offset ||</div><div class='add'>+		    args-&gt;in.flags ||</div><div class='add'>+		    args-&gt;in.queue_va ||</div><div class='add'>+		    args-&gt;in.queue_size ||</div><div class='add'>+		    args-&gt;in.rptr_va ||</div><div class='add'>+		    args-&gt;in.wptr_va ||</div><div class='add'>+		    args-&gt;in.wptr_va ||</div><div class='add'>+		    args-&gt;in.mqd ||</div><div class='add'>+		    args-&gt;in.mqd_size)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		r = amdgpu_userq_destroy(filp, args-&gt;in.queue_id);</div><div class='add'>+		if (r)</div><div class='add'>+			drm_file_err(filp, "Failed to destroy usermode queue\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		drm_dbg_driver(dev, "Invalid user queue op specified: %d\n", args-&gt;in.op);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_restore_all(struct amdgpu_userq_mgr *uq_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0, r;</div><div class='add'>+</div><div class='add'>+	/* Resume all the queues for this process */</div><div class='add'>+	idr_for_each_entry(&amp;uq_mgr-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+		r = amdgpu_userq_map_helper(uq_mgr, queue);</div><div class='add'>+		if (r)</div><div class='add'>+			ret = r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to map all the queues\n");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_validate_vm_bo(void *_unused, struct amdgpu_bo *bo)</div><div class='add'>+{</div><div class='add'>+	struct ttm_operation_ctx ctx = { false, false };</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	amdgpu_bo_placement_from_domain(bo, bo-&gt;allowed_domains);</div><div class='add'>+</div><div class='add'>+	ret = ttm_bo_validate(&amp;bo-&gt;tbo, &amp;bo-&gt;placement, &amp;ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		DRM_ERROR("Fail to validate\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_validate_bos(struct amdgpu_userq_mgr *uq_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_fpriv *fpriv = uq_mgr_to_fpriv(uq_mgr);</div><div class='add'>+	struct amdgpu_vm *vm = &amp;fpriv-&gt;vm;</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	struct amdgpu_bo_va *bo_va;</div><div class='add'>+	struct ww_acquire_ctx *ticket;</div><div class='add'>+	struct drm_exec exec;</div><div class='add'>+	struct amdgpu_bo *bo;</div><div class='add'>+	struct dma_resv *resv;</div><div class='add'>+	bool clear, unlock;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	drm_exec_init(&amp;exec, DRM_EXEC_IGNORE_DUPLICATES, 0);</div><div class='add'>+	drm_exec_until_all_locked(&amp;exec) {</div><div class='add'>+		ret = amdgpu_vm_lock_pd(vm, &amp;exec, 2);</div><div class='add'>+		drm_exec_retry_on_contention(&amp;exec);</div><div class='add'>+		if (unlikely(ret)) {</div><div class='add'>+			drm_file_err(uq_mgr-&gt;file, "Failed to lock PD\n");</div><div class='add'>+			goto unlock_all;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Lock the done list */</div><div class='add'>+		list_for_each_entry(bo_va, &amp;vm-&gt;done, base.vm_status) {</div><div class='add'>+			bo = bo_va-&gt;base.bo;</div><div class='add'>+			if (!bo)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ret = drm_exec_lock_obj(&amp;exec, &amp;bo-&gt;tbo.base);</div><div class='add'>+			drm_exec_retry_on_contention(&amp;exec);</div><div class='add'>+			if (unlikely(ret))</div><div class='add'>+				goto unlock_all;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;vm-&gt;status_lock);</div><div class='add'>+	while (!list_empty(&amp;vm-&gt;moved)) {</div><div class='add'>+		bo_va = list_first_entry(&amp;vm-&gt;moved, struct amdgpu_bo_va,</div><div class='add'>+					 base.vm_status);</div><div class='add'>+		spin_unlock(&amp;vm-&gt;status_lock);</div><div class='add'>+</div><div class='add'>+		/* Per VM BOs never need to bo cleared in the page tables */</div><div class='add'>+		ret = amdgpu_vm_bo_update(adev, bo_va, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock_all;</div><div class='add'>+		spin_lock(&amp;vm-&gt;status_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ticket = &amp;exec.ticket;</div><div class='add'>+	while (!list_empty(&amp;vm-&gt;invalidated)) {</div><div class='add'>+		bo_va = list_first_entry(&amp;vm-&gt;invalidated, struct amdgpu_bo_va,</div><div class='add'>+					 base.vm_status);</div><div class='add'>+		resv = bo_va-&gt;base.bo-&gt;tbo.base.resv;</div><div class='add'>+		spin_unlock(&amp;vm-&gt;status_lock);</div><div class='add'>+</div><div class='add'>+		bo = bo_va-&gt;base.bo;</div><div class='add'>+		ret = amdgpu_userq_validate_vm_bo(NULL, bo);</div><div class='add'>+		if (ret) {</div><div class='add'>+			drm_file_err(uq_mgr-&gt;file, "Failed to validate BO\n");</div><div class='add'>+			goto unlock_all;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Try to reserve the BO to avoid clearing its ptes */</div><div class='add'>+		if (!adev-&gt;debug_vm &amp;&amp; dma_resv_trylock(resv)) {</div><div class='add'>+			clear = false;</div><div class='add'>+			unlock = true;</div><div class='add'>+		/* The caller is already holding the reservation lock */</div><div class='add'>+		} else if (dma_resv_locking_ctx(resv) == ticket) {</div><div class='add'>+			clear = false;</div><div class='add'>+			unlock = false;</div><div class='add'>+		/* Somebody else is using the BO right now */</div><div class='add'>+		} else {</div><div class='add'>+			clear = true;</div><div class='add'>+			unlock = false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = amdgpu_vm_bo_update(adev, bo_va, clear);</div><div class='add'>+</div><div class='add'>+		if (unlock)</div><div class='add'>+			dma_resv_unlock(resv);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock_all;</div><div class='add'>+</div><div class='add'>+		spin_lock(&amp;vm-&gt;status_lock);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;vm-&gt;status_lock);</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_eviction_fence_replace_fence(&amp;fpriv-&gt;evf_mgr, &amp;exec);</div><div class='add'>+	if (ret)</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to replace eviction fence\n");</div><div class='add'>+</div><div class='add'>+unlock_all:</div><div class='add'>+	drm_exec_fini(&amp;exec);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_userq_restore_worker(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_mgr *uq_mgr = work_to_uq_mgr(work, resume_work.work);</div><div class='add'>+	struct amdgpu_fpriv *fpriv = uq_mgr_to_fpriv(uq_mgr);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	flush_work(&amp;fpriv-&gt;evf_mgr.suspend_work.work);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_userq_validate_bos(uq_mgr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to validate BOs to restore\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_userq_restore_all(uq_mgr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to restore all queues\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;uq_mgr-&gt;userq_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_evict_all(struct amdgpu_userq_mgr *uq_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0, r;</div><div class='add'>+</div><div class='add'>+	/* Try to unmap all the queues in this process ctx */</div><div class='add'>+	idr_for_each_entry(&amp;uq_mgr-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+		r = amdgpu_userq_unmap_helper(uq_mgr, queue);</div><div class='add'>+		if (r)</div><div class='add'>+			ret = r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Couldn't unmap all the queues\n");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+amdgpu_userq_wait_for_signal(struct amdgpu_userq_mgr *uq_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	int queue_id, ret;</div><div class='add'>+</div><div class='add'>+	idr_for_each_entry(&amp;uq_mgr-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+		struct dma_fence *f = queue-&gt;last_fence;</div><div class='add'>+</div><div class='add'>+		if (!f || dma_fence_is_signaled(f))</div><div class='add'>+			continue;</div><div class='add'>+		ret = dma_fence_wait_timeout(f, true, msecs_to_jiffies(100));</div><div class='add'>+		if (ret &lt;= 0) {</div><div class='add'>+			drm_file_err(uq_mgr-&gt;file, "Timed out waiting for fence=%llu:%llu\n",</div><div class='add'>+				     f-&gt;context, f-&gt;seqno);</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+amdgpu_userq_evict(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+		   struct amdgpu_eviction_fence *ev_fence)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct amdgpu_fpriv *fpriv = uq_mgr_to_fpriv(uq_mgr);</div><div class='add'>+	struct amdgpu_eviction_fence_mgr *evf_mgr = &amp;fpriv-&gt;evf_mgr;</div><div class='add'>+</div><div class='add'>+	/* Wait for any pending userqueue fence work to finish */</div><div class='add'>+	ret = amdgpu_userq_wait_for_signal(uq_mgr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Not evicting userqueue, timeout waiting for work\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_userq_evict_all(uq_mgr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		drm_file_err(uq_mgr-&gt;file, "Failed to evict userqueue\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Signal current eviction fence */</div><div class='add'>+	amdgpu_eviction_fence_signal(evf_mgr, ev_fence);</div><div class='add'>+</div><div class='add'>+	if (evf_mgr-&gt;fd_closing) {</div><div class='add'>+		cancel_delayed_work_sync(&amp;uq_mgr-&gt;resume_work);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Schedule a resume work */</div><div class='add'>+	schedule_delayed_work(&amp;uq_mgr-&gt;resume_work, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, struct drm_file *file_priv,</div><div class='add'>+			  struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	mutex_init(&amp;userq_mgr-&gt;userq_mutex);</div><div class='add'>+	idr_init_base(&amp;userq_mgr-&gt;userq_idr, 1);</div><div class='add'>+	userq_mgr-&gt;adev = adev;</div><div class='add'>+	userq_mgr-&gt;file = file_priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	list_add(&amp;userq_mgr-&gt;list, &amp;adev-&gt;userq_mgr_list);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;userq_mgr-&gt;resume_work, amdgpu_userq_restore_worker);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_mgr_fini(struct amdgpu_userq_mgr *userq_mgr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = userq_mgr-&gt;adev;</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_userq_mgr *uqm, *tmp;</div><div class='add'>+	uint32_t queue_id;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;userq_mgr-&gt;resume_work);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	mutex_lock(&amp;userq_mgr-&gt;userq_mutex);</div><div class='add'>+	idr_for_each_entry(&amp;userq_mgr-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+		amdgpu_userq_wait_for_last_fence(userq_mgr, queue);</div><div class='add'>+		amdgpu_userq_unmap_helper(userq_mgr, queue);</div><div class='add'>+		amdgpu_userq_cleanup(userq_mgr, queue, queue_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(uqm, tmp, &amp;adev-&gt;userq_mgr_list, list) {</div><div class='add'>+		if (uqm == userq_mgr) {</div><div class='add'>+			list_del(&amp;uqm-&gt;list);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	idr_destroy(&amp;userq_mgr-&gt;userq_idr);</div><div class='add'>+	mutex_unlock(&amp;userq_mgr-&gt;userq_mutex);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	mutex_destroy(&amp;userq_mgr-&gt;userq_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_suspend(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	u32 ip_mask = amdgpu_userq_get_supported_ip_mask(adev);</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_userq_mgr *uqm, *tmp;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0, r;</div><div class='add'>+</div><div class='add'>+	if (!ip_mask)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	list_for_each_entry_safe(uqm, tmp, &amp;adev-&gt;userq_mgr_list, list) {</div><div class='add'>+		cancel_delayed_work_sync(&amp;uqm-&gt;resume_work);</div><div class='add'>+		mutex_lock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+		idr_for_each_entry(&amp;uqm-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+			r = amdgpu_userq_unmap_helper(uqm, queue);</div><div class='add'>+			if (r)</div><div class='add'>+				ret = r;</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_resume(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	u32 ip_mask = amdgpu_userq_get_supported_ip_mask(adev);</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_userq_mgr *uqm, *tmp;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0, r;</div><div class='add'>+</div><div class='add'>+	if (!ip_mask)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	list_for_each_entry_safe(uqm, tmp, &amp;adev-&gt;userq_mgr_list, list) {</div><div class='add'>+		mutex_lock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+		idr_for_each_entry(&amp;uqm-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+			r = amdgpu_userq_map_helper(uqm, queue);</div><div class='add'>+			if (r)</div><div class='add'>+				ret = r;</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_stop_sched_for_enforce_isolation(struct amdgpu_device *adev,</div><div class='add'>+						  u32 idx)</div><div class='add'>+{</div><div class='add'>+	u32 ip_mask = amdgpu_userq_get_supported_ip_mask(adev);</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_userq_mgr *uqm, *tmp;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0, r;</div><div class='add'>+</div><div class='add'>+	/* only need to stop gfx/compute */</div><div class='add'>+	if (!(ip_mask &amp; ((1 &lt;&lt; AMDGPU_HW_IP_GFX) | (1 &lt;&lt; AMDGPU_HW_IP_COMPUTE))))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	if (adev-&gt;userq_halt_for_enforce_isolation)</div><div class='add'>+		dev_warn(adev-&gt;dev, "userq scheduling already stopped!\n");</div><div class='add'>+	adev-&gt;userq_halt_for_enforce_isolation = true;</div><div class='add'>+	list_for_each_entry_safe(uqm, tmp, &amp;adev-&gt;userq_mgr_list, list) {</div><div class='add'>+		cancel_delayed_work_sync(&amp;uqm-&gt;resume_work);</div><div class='add'>+		mutex_lock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+		idr_for_each_entry(&amp;uqm-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+			if (((queue-&gt;queue_type == AMDGPU_HW_IP_GFX) ||</div><div class='add'>+			     (queue-&gt;queue_type == AMDGPU_HW_IP_COMPUTE)) &amp;&amp;</div><div class='add'>+			    (queue-&gt;xcp_id == idx)) {</div><div class='add'>+				r = amdgpu_userq_unmap_helper(uqm, queue);</div><div class='add'>+				if (r)</div><div class='add'>+					ret = r;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_start_sched_for_enforce_isolation(struct amdgpu_device *adev,</div><div class='add'>+						   u32 idx)</div><div class='add'>+{</div><div class='add'>+	u32 ip_mask = amdgpu_userq_get_supported_ip_mask(adev);</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_userq_mgr *uqm, *tmp;</div><div class='add'>+	int queue_id;</div><div class='add'>+	int ret = 0, r;</div><div class='add'>+</div><div class='add'>+	/* only need to stop gfx/compute */</div><div class='add'>+	if (!(ip_mask &amp; ((1 &lt;&lt; AMDGPU_HW_IP_GFX) | (1 &lt;&lt; AMDGPU_HW_IP_COMPUTE))))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	if (!adev-&gt;userq_halt_for_enforce_isolation)</div><div class='add'>+		dev_warn(adev-&gt;dev, "userq scheduling already started!\n");</div><div class='add'>+	adev-&gt;userq_halt_for_enforce_isolation = false;</div><div class='add'>+	list_for_each_entry_safe(uqm, tmp, &amp;adev-&gt;userq_mgr_list, list) {</div><div class='add'>+		mutex_lock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+		idr_for_each_entry(&amp;uqm-&gt;userq_idr, queue, queue_id) {</div><div class='add'>+			if (((queue-&gt;queue_type == AMDGPU_HW_IP_GFX) ||</div><div class='add'>+			     (queue-&gt;queue_type == AMDGPU_HW_IP_COMPUTE)) &amp;&amp;</div><div class='add'>+			    (queue-&gt;xcp_id == idx)) {</div><div class='add'>+				r = amdgpu_userq_map_helper(uqm, queue);</div><div class='add'>+				if (r)</div><div class='add'>+					ret = r;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;uqm-&gt;userq_mutex);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;userq_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h<br/>new file mode 100644<br/>index 000000000000..ec040c2fd6c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h</a></div><div class='hunk'>@@ -0,0 +1,135 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AMDGPU_USERQ_H_</div><div class='add'>+#define AMDGPU_USERQ_H_</div><div class='add'>+#include "amdgpu_eviction_fence.h"</div><div class='add'>+</div><div class='add'>+#define AMDGPU_MAX_USERQ_COUNT 512</div><div class='add'>+</div><div class='add'>+#define to_ev_fence(f) container_of(f, struct amdgpu_eviction_fence, base)</div><div class='add'>+#define uq_mgr_to_fpriv(u) container_of(u, struct amdgpu_fpriv, userq_mgr)</div><div class='add'>+#define work_to_uq_mgr(w, name) container_of(w, struct amdgpu_userq_mgr, name)</div><div class='add'>+</div><div class='add'>+enum amdgpu_userq_state {</div><div class='add'>+	AMDGPU_USERQ_STATE_UNMAPPED = 0,</div><div class='add'>+	AMDGPU_USERQ_STATE_MAPPED,</div><div class='add'>+	AMDGPU_USERQ_STATE_PREEMPTED,</div><div class='add'>+	AMDGPU_USERQ_STATE_HUNG,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct amdgpu_mqd_prop;</div><div class='add'>+</div><div class='add'>+struct amdgpu_userq_obj {</div><div class='add'>+	void		 *cpu_ptr;</div><div class='add'>+	uint64_t	 gpu_addr;</div><div class='add'>+	struct amdgpu_bo *obj;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct amdgpu_usermode_queue {</div><div class='add'>+	int			queue_type;</div><div class='add'>+	enum amdgpu_userq_state state;</div><div class='add'>+	uint64_t		doorbell_handle;</div><div class='add'>+	uint64_t		doorbell_index;</div><div class='add'>+	uint64_t		flags;</div><div class='add'>+	struct amdgpu_mqd_prop	*userq_prop;</div><div class='add'>+	struct amdgpu_userq_mgr *userq_mgr;</div><div class='add'>+	struct amdgpu_vm	*vm;</div><div class='add'>+	struct amdgpu_userq_obj mqd;</div><div class='add'>+	struct amdgpu_userq_obj	db_obj;</div><div class='add'>+	struct amdgpu_userq_obj fw_obj;</div><div class='add'>+	struct amdgpu_userq_obj wptr_obj;</div><div class='add'>+	struct xarray		fence_drv_xa;</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv;</div><div class='add'>+	struct dma_fence	*last_fence;</div><div class='add'>+	u32			xcp_id;</div><div class='add'>+	int			priority;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct amdgpu_userq_funcs {</div><div class='add'>+	int (*mqd_create)(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			  struct drm_amdgpu_userq_in *args,</div><div class='add'>+			  struct amdgpu_usermode_queue *queue);</div><div class='add'>+	void (*mqd_destroy)(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			    struct amdgpu_usermode_queue *uq);</div><div class='add'>+	int (*unmap)(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+		     struct amdgpu_usermode_queue *queue);</div><div class='add'>+	int (*map)(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+		   struct amdgpu_usermode_queue *queue);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Usermode queues for gfx */</div><div class='add'>+struct amdgpu_userq_mgr {</div><div class='add'>+	struct idr			userq_idr;</div><div class='add'>+	struct mutex			userq_mutex;</div><div class='add'>+	struct amdgpu_device		*adev;</div><div class='add'>+	struct delayed_work		resume_work;</div><div class='add'>+	struct list_head		list;</div><div class='add'>+	struct drm_file			*file;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct amdgpu_db_info {</div><div class='add'>+	uint64_t doorbell_handle;</div><div class='add'>+	uint32_t queue_type;</div><div class='add'>+	uint32_t doorbell_offset;</div><div class='add'>+	struct amdgpu_userq_obj	*db_obj;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, struct drm_file *file_priv,</div><div class='add'>+			  struct amdgpu_device *adev);</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_mgr_fini(struct amdgpu_userq_mgr *userq_mgr);</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_create_object(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			       struct amdgpu_userq_obj *userq_obj,</div><div class='add'>+			       int size);</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_destroy_object(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+				 struct amdgpu_userq_obj *userq_obj);</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_evict(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			struct amdgpu_eviction_fence *ev_fence);</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_active(struct amdgpu_userq_mgr *uq_mgr);</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_ensure_ev_fence(struct amdgpu_userq_mgr *userq_mgr,</div><div class='add'>+				  struct amdgpu_eviction_fence_mgr *evf_mgr);</div><div class='add'>+</div><div class='add'>+uint64_t amdgpu_userq_get_doorbell_index(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+					 struct amdgpu_db_info *db_info,</div><div class='add'>+					     struct drm_file *filp);</div><div class='add'>+</div><div class='add'>+u32 amdgpu_userq_get_supported_ip_mask(struct amdgpu_device *adev);</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_suspend(struct amdgpu_device *adev);</div><div class='add'>+int amdgpu_userq_resume(struct amdgpu_device *adev);</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_stop_sched_for_enforce_isolation(struct amdgpu_device *adev,</div><div class='add'>+						  u32 idx);</div><div class='add'>+int amdgpu_userq_start_sched_for_enforce_isolation(struct amdgpu_device *adev,</div><div class='add'>+						   u32 idx);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c<br/>new file mode 100644<br/>index 000000000000..fc4d0d42e223<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c</a></div><div class='hunk'>@@ -0,0 +1,968 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kref.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/dma-fence-unwrap.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;drm/drm_exec.h&gt;</div><div class='add'>+#include &lt;drm/drm_syncobj.h&gt;</div><div class='add'>+</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "amdgpu_userq_fence.h"</div><div class='add'>+</div><div class='add'>+static const struct dma_fence_ops amdgpu_userq_fence_ops;</div><div class='add'>+static struct kmem_cache *amdgpu_userq_fence_slab;</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_fence_slab_init(void)</div><div class='add'>+{</div><div class='add'>+	amdgpu_userq_fence_slab = kmem_cache_create("amdgpu_userq_fence",</div><div class='add'>+						    sizeof(struct amdgpu_userq_fence),</div><div class='add'>+						    0,</div><div class='add'>+						    SLAB_HWCACHE_ALIGN,</div><div class='add'>+						    NULL);</div><div class='add'>+	if (!amdgpu_userq_fence_slab)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_fence_slab_fini(void)</div><div class='add'>+{</div><div class='add'>+	rcu_barrier();</div><div class='add'>+	kmem_cache_destroy(amdgpu_userq_fence_slab);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct amdgpu_userq_fence *to_amdgpu_userq_fence(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	if (!f || f-&gt;ops != &amp;amdgpu_userq_fence_ops)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return container_of(f, struct amdgpu_userq_fence, base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 amdgpu_userq_fence_read(struct amdgpu_userq_fence_driver *fence_drv)</div><div class='add'>+{</div><div class='add'>+	return le64_to_cpu(*fence_drv-&gt;cpu_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_fence_driver_alloc(struct amdgpu_device *adev,</div><div class='add'>+				    struct amdgpu_usermode_queue *userq)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	fence_drv = kzalloc(sizeof(*fence_drv), GFP_KERNEL);</div><div class='add'>+	if (!fence_drv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Acquire seq64 memory */</div><div class='add'>+	r = amdgpu_seq64_alloc(adev, &amp;fence_drv-&gt;va, &amp;fence_drv-&gt;gpu_addr,</div><div class='add'>+			       &amp;fence_drv-&gt;cpu_addr);</div><div class='add'>+	if (r)</div><div class='add'>+		goto free_fence_drv;</div><div class='add'>+</div><div class='add'>+	memset(fence_drv-&gt;cpu_addr, 0, sizeof(u64));</div><div class='add'>+</div><div class='add'>+	kref_init(&amp;fence_drv-&gt;refcount);</div><div class='add'>+	INIT_LIST_HEAD(&amp;fence_drv-&gt;fences);</div><div class='add'>+	spin_lock_init(&amp;fence_drv-&gt;fence_list_lock);</div><div class='add'>+</div><div class='add'>+	fence_drv-&gt;adev = adev;</div><div class='add'>+	fence_drv-&gt;context = dma_fence_context_alloc(1);</div><div class='add'>+	get_task_comm(fence_drv-&gt;timeline_name, current);</div><div class='add'>+</div><div class='add'>+	xa_lock_irqsave(&amp;adev-&gt;userq_xa, flags);</div><div class='add'>+	r = xa_err(__xa_store(&amp;adev-&gt;userq_xa, userq-&gt;doorbell_index,</div><div class='add'>+			      fence_drv, GFP_KERNEL));</div><div class='add'>+	xa_unlock_irqrestore(&amp;adev-&gt;userq_xa, flags);</div><div class='add'>+	if (r)</div><div class='add'>+		goto free_seq64;</div><div class='add'>+</div><div class='add'>+	userq-&gt;fence_drv = fence_drv;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_seq64:</div><div class='add'>+	amdgpu_seq64_free(adev, fence_drv-&gt;va);</div><div class='add'>+free_fence_drv:</div><div class='add'>+	kfree(fence_drv);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_userq_walk_and_drop_fence_drv(struct xarray *xa)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv;</div><div class='add'>+	unsigned long index;</div><div class='add'>+</div><div class='add'>+	if (xa_empty(xa))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xa_lock(xa);</div><div class='add'>+	xa_for_each(xa, index, fence_drv) {</div><div class='add'>+		__xa_erase(xa, index);</div><div class='add'>+		amdgpu_userq_fence_driver_put(fence_drv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xa_unlock(xa);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+amdgpu_userq_fence_driver_free(struct amdgpu_usermode_queue *userq)</div><div class='add'>+{</div><div class='add'>+	amdgpu_userq_walk_and_drop_fence_drv(&amp;userq-&gt;fence_drv_xa);</div><div class='add'>+	xa_destroy(&amp;userq-&gt;fence_drv_xa);</div><div class='add'>+	/* Drop the fence_drv reference held by user queue */</div><div class='add'>+	amdgpu_userq_fence_driver_put(userq-&gt;fence_drv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_fence_driver_process(struct amdgpu_userq_fence_driver *fence_drv)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_fence *userq_fence, *tmp;</div><div class='add'>+	struct dma_fence *fence;</div><div class='add'>+	u64 rptr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!fence_drv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rptr = amdgpu_userq_fence_read(fence_drv);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;fence_drv-&gt;fence_list_lock);</div><div class='add'>+	list_for_each_entry_safe(userq_fence, tmp, &amp;fence_drv-&gt;fences, link) {</div><div class='add'>+		fence = &amp;userq_fence-&gt;base;</div><div class='add'>+</div><div class='add'>+		if (rptr &lt; fence-&gt;seqno)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_fence_signal(fence);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; userq_fence-&gt;fence_drv_array_count; i++)</div><div class='add'>+			amdgpu_userq_fence_driver_put(userq_fence-&gt;fence_drv_array[i]);</div><div class='add'>+</div><div class='add'>+		list_del(&amp;userq_fence-&gt;link);</div><div class='add'>+		dma_fence_put(fence);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;fence_drv-&gt;fence_list_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_fence_driver_destroy(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv = container_of(ref,</div><div class='add'>+					 struct amdgpu_userq_fence_driver,</div><div class='add'>+					 refcount);</div><div class='add'>+	struct amdgpu_userq_fence_driver *xa_fence_drv;</div><div class='add'>+	struct amdgpu_device *adev = fence_drv-&gt;adev;</div><div class='add'>+	struct amdgpu_userq_fence *fence, *tmp;</div><div class='add'>+	struct xarray *xa = &amp;adev-&gt;userq_xa;</div><div class='add'>+	unsigned long index, flags;</div><div class='add'>+	struct dma_fence *f;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fence_drv-&gt;fence_list_lock, flags);</div><div class='add'>+	list_for_each_entry_safe(fence, tmp, &amp;fence_drv-&gt;fences, link) {</div><div class='add'>+		f = &amp;fence-&gt;base;</div><div class='add'>+</div><div class='add'>+		if (!dma_fence_is_signaled(f)) {</div><div class='add'>+			dma_fence_set_error(f, -ECANCELED);</div><div class='add'>+			dma_fence_signal(f);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		list_del(&amp;fence-&gt;link);</div><div class='add'>+		dma_fence_put(f);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;fence_drv-&gt;fence_list_lock, flags);</div><div class='add'>+</div><div class='add'>+	xa_lock_irqsave(xa, flags);</div><div class='add'>+	xa_for_each(xa, index, xa_fence_drv)</div><div class='add'>+		if (xa_fence_drv == fence_drv)</div><div class='add'>+			__xa_erase(xa, index);</div><div class='add'>+	xa_unlock_irqrestore(xa, flags);</div><div class='add'>+</div><div class='add'>+	/* Free seq64 memory */</div><div class='add'>+	amdgpu_seq64_free(adev, fence_drv-&gt;va);</div><div class='add'>+	kfree(fence_drv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_fence_driver_get(struct amdgpu_userq_fence_driver *fence_drv)</div><div class='add'>+{</div><div class='add'>+	kref_get(&amp;fence_drv-&gt;refcount);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_fence_driver_put(struct amdgpu_userq_fence_driver *fence_drv)</div><div class='add'>+{</div><div class='add'>+	kref_put(&amp;fence_drv-&gt;refcount, amdgpu_userq_fence_driver_destroy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_userq_fence_alloc(struct amdgpu_userq_fence **userq_fence)</div><div class='add'>+{</div><div class='add'>+	*userq_fence = kmem_cache_alloc(amdgpu_userq_fence_slab, GFP_ATOMIC);</div><div class='add'>+	return *userq_fence ? 0 : -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amdgpu_userq_fence_create(struct amdgpu_usermode_queue *userq,</div><div class='add'>+				     struct amdgpu_userq_fence *userq_fence,</div><div class='add'>+				     u64 seq, struct dma_fence **f)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv;</div><div class='add'>+	struct dma_fence *fence;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	fence_drv = userq-&gt;fence_drv;</div><div class='add'>+	if (!fence_drv)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;userq_fence-&gt;lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;userq_fence-&gt;link);</div><div class='add'>+	fence = &amp;userq_fence-&gt;base;</div><div class='add'>+	userq_fence-&gt;fence_drv = fence_drv;</div><div class='add'>+</div><div class='add'>+	dma_fence_init(fence, &amp;amdgpu_userq_fence_ops, &amp;userq_fence-&gt;lock,</div><div class='add'>+		       fence_drv-&gt;context, seq);</div><div class='add'>+</div><div class='add'>+	amdgpu_userq_fence_driver_get(fence_drv);</div><div class='add'>+	dma_fence_get(fence);</div><div class='add'>+</div><div class='add'>+	if (!xa_empty(&amp;userq-&gt;fence_drv_xa)) {</div><div class='add'>+		struct amdgpu_userq_fence_driver *stored_fence_drv;</div><div class='add'>+		unsigned long index, count = 0;</div><div class='add'>+		int i = 0;</div><div class='add'>+</div><div class='add'>+		xa_lock(&amp;userq-&gt;fence_drv_xa);</div><div class='add'>+		xa_for_each(&amp;userq-&gt;fence_drv_xa, index, stored_fence_drv)</div><div class='add'>+			count++;</div><div class='add'>+</div><div class='add'>+		userq_fence-&gt;fence_drv_array =</div><div class='add'>+			kvmalloc_array(count,</div><div class='add'>+				       sizeof(struct amdgpu_userq_fence_driver *),</div><div class='add'>+				       GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+		if (userq_fence-&gt;fence_drv_array) {</div><div class='add'>+			xa_for_each(&amp;userq-&gt;fence_drv_xa, index, stored_fence_drv) {</div><div class='add'>+				userq_fence-&gt;fence_drv_array[i] = stored_fence_drv;</div><div class='add'>+				__xa_erase(&amp;userq-&gt;fence_drv_xa, index);</div><div class='add'>+				i++;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		userq_fence-&gt;fence_drv_array_count = i;</div><div class='add'>+		xa_unlock(&amp;userq-&gt;fence_drv_xa);</div><div class='add'>+	} else {</div><div class='add'>+		userq_fence-&gt;fence_drv_array = NULL;</div><div class='add'>+		userq_fence-&gt;fence_drv_array_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check if hardware has already processed the job */</div><div class='add'>+	spin_lock_irqsave(&amp;fence_drv-&gt;fence_list_lock, flags);</div><div class='add'>+	if (!dma_fence_is_signaled_locked(fence))</div><div class='add'>+		list_add_tail(&amp;userq_fence-&gt;link, &amp;fence_drv-&gt;fences);</div><div class='add'>+	else</div><div class='add'>+		dma_fence_put(fence);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;fence_drv-&gt;fence_list_lock, flags);</div><div class='add'>+</div><div class='add'>+	*f = fence;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *amdgpu_userq_fence_get_driver_name(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	return "amdgpu_userq_fence";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *amdgpu_userq_fence_get_timeline_name(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_fence *fence = to_amdgpu_userq_fence(f);</div><div class='add'>+</div><div class='add'>+	return fence-&gt;fence_drv-&gt;timeline_name;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amdgpu_userq_fence_signaled(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_fence *fence = to_amdgpu_userq_fence(f);</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv = fence-&gt;fence_drv;</div><div class='add'>+	u64 rptr, wptr;</div><div class='add'>+</div><div class='add'>+	rptr = amdgpu_userq_fence_read(fence_drv);</div><div class='add'>+	wptr = fence-&gt;base.seqno;</div><div class='add'>+</div><div class='add'>+	if (rptr &gt;= wptr)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_userq_fence_free(struct rcu_head *rcu)</div><div class='add'>+{</div><div class='add'>+	struct dma_fence *fence = container_of(rcu, struct dma_fence, rcu);</div><div class='add'>+	struct amdgpu_userq_fence *userq_fence = to_amdgpu_userq_fence(fence);</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv = userq_fence-&gt;fence_drv;</div><div class='add'>+</div><div class='add'>+	/* Release the fence driver reference */</div><div class='add'>+	amdgpu_userq_fence_driver_put(fence_drv);</div><div class='add'>+</div><div class='add'>+	kvfree(userq_fence-&gt;fence_drv_array);</div><div class='add'>+	kmem_cache_free(amdgpu_userq_fence_slab, userq_fence);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_userq_fence_release(struct dma_fence *f)</div><div class='add'>+{</div><div class='add'>+	call_rcu(&amp;f-&gt;rcu, amdgpu_userq_fence_free);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dma_fence_ops amdgpu_userq_fence_ops = {</div><div class='add'>+	.use_64bit_seqno = true,</div><div class='add'>+	.get_driver_name = amdgpu_userq_fence_get_driver_name,</div><div class='add'>+	.get_timeline_name = amdgpu_userq_fence_get_timeline_name,</div><div class='add'>+	.signaled = amdgpu_userq_fence_signaled,</div><div class='add'>+	.release = amdgpu_userq_fence_release,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * amdgpu_userq_fence_read_wptr - Read the userq wptr value</div><div class='add'>+ *</div><div class='add'>+ * @queue: user mode queue structure pointer</div><div class='add'>+ * @wptr: write pointer value</div><div class='add'>+ *</div><div class='add'>+ * Read the wptr value from userq's MQD. The userq signal IOCTL</div><div class='add'>+ * creates a dma_fence for the shared buffers that expects the</div><div class='add'>+ * RPTR value written to seq64 memory &gt;= WPTR.</div><div class='add'>+ *</div><div class='add'>+ * Returns wptr value on success, error on failure.</div><div class='add'>+ */</div><div class='add'>+static int amdgpu_userq_fence_read_wptr(struct amdgpu_usermode_queue *queue,</div><div class='add'>+					u64 *wptr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_bo_va_mapping *mapping;</div><div class='add'>+	struct amdgpu_bo *bo;</div><div class='add'>+	u64 addr, *ptr;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	r = amdgpu_bo_reserve(queue-&gt;vm-&gt;root.bo, false);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	addr = queue-&gt;userq_prop-&gt;wptr_gpu_addr;</div><div class='add'>+	addr &amp;= AMDGPU_GMC_HOLE_MASK;</div><div class='add'>+</div><div class='add'>+	mapping = amdgpu_vm_bo_lookup_mapping(queue-&gt;vm, addr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	if (!mapping) {</div><div class='add'>+		amdgpu_bo_unreserve(queue-&gt;vm-&gt;root.bo);</div><div class='add'>+		DRM_ERROR("Failed to lookup amdgpu_bo_va_mapping\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bo = amdgpu_bo_ref(mapping-&gt;bo_va-&gt;base.bo);</div><div class='add'>+	amdgpu_bo_unreserve(queue-&gt;vm-&gt;root.bo);</div><div class='add'>+	r = amdgpu_bo_reserve(bo, true);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed to reserve userqueue wptr bo");</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_bo_kmap(bo, (void **)&amp;ptr);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed mapping the userqueue wptr bo");</div><div class='add'>+		goto map_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*wptr = le64_to_cpu(*ptr);</div><div class='add'>+</div><div class='add'>+	amdgpu_bo_kunmap(bo);</div><div class='add'>+	amdgpu_bo_unreserve(bo);</div><div class='add'>+	amdgpu_bo_unref(&amp;bo);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+map_error:</div><div class='add'>+	amdgpu_bo_unreserve(bo);</div><div class='add'>+	amdgpu_bo_unref(&amp;bo);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amdgpu_userq_fence_cleanup(struct dma_fence *fence)</div><div class='add'>+{</div><div class='add'>+	dma_fence_put(fence);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_signal_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+			      struct drm_file *filp)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_fpriv *fpriv = filp-&gt;driver_priv;</div><div class='add'>+	struct amdgpu_userq_mgr *userq_mgr = &amp;fpriv-&gt;userq_mgr;</div><div class='add'>+	struct drm_amdgpu_userq_signal *args = data;</div><div class='add'>+	struct drm_gem_object **gobj_write = NULL;</div><div class='add'>+	struct drm_gem_object **gobj_read = NULL;</div><div class='add'>+	struct amdgpu_usermode_queue *queue;</div><div class='add'>+	struct amdgpu_userq_fence *userq_fence;</div><div class='add'>+	struct drm_syncobj **syncobj = NULL;</div><div class='add'>+	u32 *bo_handles_write, num_write_bo_handles;</div><div class='add'>+	u32 *syncobj_handles, num_syncobj_handles;</div><div class='add'>+	u32 *bo_handles_read, num_read_bo_handles;</div><div class='add'>+	int r, i, entry, rentry, wentry;</div><div class='add'>+	struct dma_fence *fence;</div><div class='add'>+	struct drm_exec exec;</div><div class='add'>+	u64 wptr;</div><div class='add'>+</div><div class='add'>+	num_syncobj_handles = args-&gt;num_syncobj_handles;</div><div class='add'>+	syncobj_handles = memdup_user(u64_to_user_ptr(args-&gt;syncobj_handles),</div><div class='add'>+				      sizeof(u32) * num_syncobj_handles);</div><div class='add'>+	if (IS_ERR(syncobj_handles))</div><div class='add'>+		return PTR_ERR(syncobj_handles);</div><div class='add'>+</div><div class='add'>+	/* Array of pointers to the looked up syncobjs */</div><div class='add'>+	syncobj = kmalloc_array(num_syncobj_handles, sizeof(*syncobj), GFP_KERNEL);</div><div class='add'>+	if (!syncobj) {</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto free_syncobj_handles;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (entry = 0; entry &lt; num_syncobj_handles; entry++) {</div><div class='add'>+		syncobj[entry] = drm_syncobj_find(filp, syncobj_handles[entry]);</div><div class='add'>+		if (!syncobj[entry]) {</div><div class='add'>+			r = -ENOENT;</div><div class='add'>+			goto free_syncobj;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_read_bo_handles = args-&gt;num_bo_read_handles;</div><div class='add'>+	bo_handles_read = memdup_user(u64_to_user_ptr(args-&gt;bo_read_handles),</div><div class='add'>+				      sizeof(u32) * num_read_bo_handles);</div><div class='add'>+	if (IS_ERR(bo_handles_read)) {</div><div class='add'>+		r = PTR_ERR(bo_handles_read);</div><div class='add'>+		goto free_syncobj;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Array of pointers to the GEM read objects */</div><div class='add'>+	gobj_read = kmalloc_array(num_read_bo_handles, sizeof(*gobj_read), GFP_KERNEL);</div><div class='add'>+	if (!gobj_read) {</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto free_bo_handles_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (rentry = 0; rentry &lt; num_read_bo_handles; rentry++) {</div><div class='add'>+		gobj_read[rentry] = drm_gem_object_lookup(filp, bo_handles_read[rentry]);</div><div class='add'>+		if (!gobj_read[rentry]) {</div><div class='add'>+			r = -ENOENT;</div><div class='add'>+			goto put_gobj_read;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_write_bo_handles = args-&gt;num_bo_write_handles;</div><div class='add'>+	bo_handles_write = memdup_user(u64_to_user_ptr(args-&gt;bo_write_handles),</div><div class='add'>+				       sizeof(u32) * num_write_bo_handles);</div><div class='add'>+	if (IS_ERR(bo_handles_write)) {</div><div class='add'>+		r = PTR_ERR(bo_handles_write);</div><div class='add'>+		goto put_gobj_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Array of pointers to the GEM write objects */</div><div class='add'>+	gobj_write = kmalloc_array(num_write_bo_handles, sizeof(*gobj_write), GFP_KERNEL);</div><div class='add'>+	if (!gobj_write) {</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto free_bo_handles_write;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (wentry = 0; wentry &lt; num_write_bo_handles; wentry++) {</div><div class='add'>+		gobj_write[wentry] = drm_gem_object_lookup(filp, bo_handles_write[wentry]);</div><div class='add'>+		if (!gobj_write[wentry]) {</div><div class='add'>+			r = -ENOENT;</div><div class='add'>+			goto put_gobj_write;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Retrieve the user queue */</div><div class='add'>+	queue = idr_find(&amp;userq_mgr-&gt;userq_idr, args-&gt;queue_id);</div><div class='add'>+	if (!queue) {</div><div class='add'>+		r = -ENOENT;</div><div class='add'>+		goto put_gobj_write;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_userq_fence_read_wptr(queue, &amp;wptr);</div><div class='add'>+	if (r)</div><div class='add'>+		goto put_gobj_write;</div><div class='add'>+</div><div class='add'>+	r = amdgpu_userq_fence_alloc(&amp;userq_fence);</div><div class='add'>+	if (r)</div><div class='add'>+		goto put_gobj_write;</div><div class='add'>+</div><div class='add'>+	/* We are here means UQ is active, make sure the eviction fence is valid */</div><div class='add'>+	amdgpu_userq_ensure_ev_fence(&amp;fpriv-&gt;userq_mgr, &amp;fpriv-&gt;evf_mgr);</div><div class='add'>+</div><div class='add'>+	/* Create a new fence */</div><div class='add'>+	r = amdgpu_userq_fence_create(queue, userq_fence, wptr, &amp;fence);</div><div class='add'>+	if (r) {</div><div class='add'>+		mutex_unlock(&amp;userq_mgr-&gt;userq_mutex);</div><div class='add'>+		kmem_cache_free(amdgpu_userq_fence_slab, userq_fence);</div><div class='add'>+		goto put_gobj_write;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_fence_put(queue-&gt;last_fence);</div><div class='add'>+	queue-&gt;last_fence = dma_fence_get(fence);</div><div class='add'>+	mutex_unlock(&amp;userq_mgr-&gt;userq_mutex);</div><div class='add'>+</div><div class='add'>+	drm_exec_init(&amp;exec, DRM_EXEC_INTERRUPTIBLE_WAIT,</div><div class='add'>+		      (num_read_bo_handles + num_write_bo_handles));</div><div class='add'>+</div><div class='add'>+	/* Lock all BOs with retry handling */</div><div class='add'>+	drm_exec_until_all_locked(&amp;exec) {</div><div class='add'>+		r = drm_exec_prepare_array(&amp;exec, gobj_read, num_read_bo_handles, 1);</div><div class='add'>+		drm_exec_retry_on_contention(&amp;exec);</div><div class='add'>+		if (r) {</div><div class='add'>+			amdgpu_userq_fence_cleanup(fence);</div><div class='add'>+			goto exec_fini;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		r = drm_exec_prepare_array(&amp;exec, gobj_write, num_write_bo_handles, 1);</div><div class='add'>+		drm_exec_retry_on_contention(&amp;exec);</div><div class='add'>+		if (r) {</div><div class='add'>+			amdgpu_userq_fence_cleanup(fence);</div><div class='add'>+			goto exec_fini;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_read_bo_handles; i++) {</div><div class='add'>+		if (!gobj_read || !gobj_read[i]-&gt;resv)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_resv_add_fence(gobj_read[i]-&gt;resv, fence,</div><div class='add'>+				   DMA_RESV_USAGE_READ);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_write_bo_handles; i++) {</div><div class='add'>+		if (!gobj_write || !gobj_write[i]-&gt;resv)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_resv_add_fence(gobj_write[i]-&gt;resv, fence,</div><div class='add'>+				   DMA_RESV_USAGE_WRITE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Add the created fence to syncobj/BO's */</div><div class='add'>+	for (i = 0; i &lt; num_syncobj_handles; i++)</div><div class='add'>+		drm_syncobj_replace_fence(syncobj[i], fence);</div><div class='add'>+</div><div class='add'>+	/* drop the reference acquired in fence creation function */</div><div class='add'>+	dma_fence_put(fence);</div><div class='add'>+</div><div class='add'>+exec_fini:</div><div class='add'>+	drm_exec_fini(&amp;exec);</div><div class='add'>+put_gobj_write:</div><div class='add'>+	while (wentry-- &gt; 0)</div><div class='add'>+		drm_gem_object_put(gobj_write[wentry]);</div><div class='add'>+	kfree(gobj_write);</div><div class='add'>+free_bo_handles_write:</div><div class='add'>+	kfree(bo_handles_write);</div><div class='add'>+put_gobj_read:</div><div class='add'>+	while (rentry-- &gt; 0)</div><div class='add'>+		drm_gem_object_put(gobj_read[rentry]);</div><div class='add'>+	kfree(gobj_read);</div><div class='add'>+free_bo_handles_read:</div><div class='add'>+	kfree(bo_handles_read);</div><div class='add'>+free_syncobj:</div><div class='add'>+	while (entry-- &gt; 0)</div><div class='add'>+		if (syncobj[entry])</div><div class='add'>+			drm_syncobj_put(syncobj[entry]);</div><div class='add'>+	kfree(syncobj);</div><div class='add'>+free_syncobj_handles:</div><div class='add'>+	kfree(syncobj_handles);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+			    struct drm_file *filp)</div><div class='add'>+{</div><div class='add'>+	u32 *syncobj_handles, *timeline_points, *timeline_handles, *bo_handles_read, *bo_handles_write;</div><div class='add'>+	u32 num_syncobj, num_read_bo_handles, num_write_bo_handles;</div><div class='add'>+	struct drm_amdgpu_userq_fence_info *fence_info = NULL;</div><div class='add'>+	struct drm_amdgpu_userq_wait *wait_info = data;</div><div class='add'>+	struct amdgpu_fpriv *fpriv = filp-&gt;driver_priv;</div><div class='add'>+	struct amdgpu_userq_mgr *userq_mgr = &amp;fpriv-&gt;userq_mgr;</div><div class='add'>+	struct amdgpu_usermode_queue *waitq;</div><div class='add'>+	struct drm_gem_object **gobj_write;</div><div class='add'>+	struct drm_gem_object **gobj_read;</div><div class='add'>+	struct dma_fence **fences = NULL;</div><div class='add'>+	u16 num_points, num_fences = 0;</div><div class='add'>+	int r, i, rentry, wentry, cnt;</div><div class='add'>+	struct drm_exec exec;</div><div class='add'>+</div><div class='add'>+	num_read_bo_handles = wait_info-&gt;num_bo_read_handles;</div><div class='add'>+	bo_handles_read = memdup_user(u64_to_user_ptr(wait_info-&gt;bo_read_handles),</div><div class='add'>+				      sizeof(u32) * num_read_bo_handles);</div><div class='add'>+	if (IS_ERR(bo_handles_read))</div><div class='add'>+		return PTR_ERR(bo_handles_read);</div><div class='add'>+</div><div class='add'>+	num_write_bo_handles = wait_info-&gt;num_bo_write_handles;</div><div class='add'>+	bo_handles_write = memdup_user(u64_to_user_ptr(wait_info-&gt;bo_write_handles),</div><div class='add'>+				       sizeof(u32) * num_write_bo_handles);</div><div class='add'>+	if (IS_ERR(bo_handles_write)) {</div><div class='add'>+		r = PTR_ERR(bo_handles_write);</div><div class='add'>+		goto free_bo_handles_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_syncobj = wait_info-&gt;num_syncobj_handles;</div><div class='add'>+	syncobj_handles = memdup_user(u64_to_user_ptr(wait_info-&gt;syncobj_handles),</div><div class='add'>+				      sizeof(u32) * num_syncobj);</div><div class='add'>+	if (IS_ERR(syncobj_handles)) {</div><div class='add'>+		r = PTR_ERR(syncobj_handles);</div><div class='add'>+		goto free_bo_handles_write;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_points = wait_info-&gt;num_syncobj_timeline_handles;</div><div class='add'>+	timeline_handles = memdup_user(u64_to_user_ptr(wait_info-&gt;syncobj_timeline_handles),</div><div class='add'>+				       sizeof(u32) * num_points);</div><div class='add'>+	if (IS_ERR(timeline_handles)) {</div><div class='add'>+		r = PTR_ERR(timeline_handles);</div><div class='add'>+		goto free_syncobj_handles;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	timeline_points = memdup_user(u64_to_user_ptr(wait_info-&gt;syncobj_timeline_points),</div><div class='add'>+				      sizeof(u32) * num_points);</div><div class='add'>+	if (IS_ERR(timeline_points)) {</div><div class='add'>+		r = PTR_ERR(timeline_points);</div><div class='add'>+		goto free_timeline_handles;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gobj_read = kmalloc_array(num_read_bo_handles, sizeof(*gobj_read), GFP_KERNEL);</div><div class='add'>+	if (!gobj_read) {</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto free_timeline_points;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (rentry = 0; rentry &lt; num_read_bo_handles; rentry++) {</div><div class='add'>+		gobj_read[rentry] = drm_gem_object_lookup(filp, bo_handles_read[rentry]);</div><div class='add'>+		if (!gobj_read[rentry]) {</div><div class='add'>+			r = -ENOENT;</div><div class='add'>+			goto put_gobj_read;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gobj_write = kmalloc_array(num_write_bo_handles, sizeof(*gobj_write), GFP_KERNEL);</div><div class='add'>+	if (!gobj_write) {</div><div class='add'>+		r = -ENOMEM;</div><div class='add'>+		goto put_gobj_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (wentry = 0; wentry &lt; num_write_bo_handles; wentry++) {</div><div class='add'>+		gobj_write[wentry] = drm_gem_object_lookup(filp, bo_handles_write[wentry]);</div><div class='add'>+		if (!gobj_write[wentry]) {</div><div class='add'>+			r = -ENOENT;</div><div class='add'>+			goto put_gobj_write;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_exec_init(&amp;exec, DRM_EXEC_INTERRUPTIBLE_WAIT,</div><div class='add'>+		      (num_read_bo_handles + num_write_bo_handles));</div><div class='add'>+</div><div class='add'>+	/* Lock all BOs with retry handling */</div><div class='add'>+	drm_exec_until_all_locked(&amp;exec) {</div><div class='add'>+		r = drm_exec_prepare_array(&amp;exec, gobj_read, num_read_bo_handles, 1);</div><div class='add'>+		drm_exec_retry_on_contention(&amp;exec);</div><div class='add'>+		if (r) {</div><div class='add'>+			drm_exec_fini(&amp;exec);</div><div class='add'>+			goto put_gobj_write;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		r = drm_exec_prepare_array(&amp;exec, gobj_write, num_write_bo_handles, 1);</div><div class='add'>+		drm_exec_retry_on_contention(&amp;exec);</div><div class='add'>+		if (r) {</div><div class='add'>+			drm_exec_fini(&amp;exec);</div><div class='add'>+			goto put_gobj_write;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!wait_info-&gt;num_fences) {</div><div class='add'>+		if (num_points) {</div><div class='add'>+			struct dma_fence_unwrap iter;</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+			struct dma_fence *f;</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; num_points; i++) {</div><div class='add'>+				r = drm_syncobj_find_fence(filp, timeline_handles[i],</div><div class='add'>+							   timeline_points[i],</div><div class='add'>+							   DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT,</div><div class='add'>+							   &amp;fence);</div><div class='add'>+				if (r)</div><div class='add'>+					goto exec_fini;</div><div class='add'>+</div><div class='add'>+				dma_fence_unwrap_for_each(f, &amp;iter, fence)</div><div class='add'>+					num_fences++;</div><div class='add'>+</div><div class='add'>+				dma_fence_put(fence);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Count syncobj's fence */</div><div class='add'>+		for (i = 0; i &lt; num_syncobj; i++) {</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+</div><div class='add'>+			r = drm_syncobj_find_fence(filp, syncobj_handles[i],</div><div class='add'>+						   0,</div><div class='add'>+						   DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT,</div><div class='add'>+						   &amp;fence);</div><div class='add'>+			if (r)</div><div class='add'>+				goto exec_fini;</div><div class='add'>+</div><div class='add'>+			num_fences++;</div><div class='add'>+			dma_fence_put(fence);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Count GEM objects fence */</div><div class='add'>+		for (i = 0; i &lt; num_read_bo_handles; i++) {</div><div class='add'>+			struct dma_resv_iter resv_cursor;</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+</div><div class='add'>+			dma_resv_for_each_fence(&amp;resv_cursor, gobj_read[i]-&gt;resv,</div><div class='add'>+						DMA_RESV_USAGE_READ, fence)</div><div class='add'>+				num_fences++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; num_write_bo_handles; i++) {</div><div class='add'>+			struct dma_resv_iter resv_cursor;</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+</div><div class='add'>+			dma_resv_for_each_fence(&amp;resv_cursor, gobj_write[i]-&gt;resv,</div><div class='add'>+						DMA_RESV_USAGE_WRITE, fence)</div><div class='add'>+				num_fences++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Passing num_fences = 0 means that userspace doesn't want to</div><div class='add'>+		 * retrieve userq_fence_info. If num_fences = 0 we skip filling</div><div class='add'>+		 * userq_fence_info and return the actual number of fences on</div><div class='add'>+		 * args-&gt;num_fences.</div><div class='add'>+		 */</div><div class='add'>+		wait_info-&gt;num_fences = num_fences;</div><div class='add'>+	} else {</div><div class='add'>+		/* Array of fence info */</div><div class='add'>+		fence_info = kmalloc_array(wait_info-&gt;num_fences, sizeof(*fence_info), GFP_KERNEL);</div><div class='add'>+		if (!fence_info) {</div><div class='add'>+			r = -ENOMEM;</div><div class='add'>+			goto exec_fini;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Array of fences */</div><div class='add'>+		fences = kmalloc_array(wait_info-&gt;num_fences, sizeof(*fences), GFP_KERNEL);</div><div class='add'>+		if (!fences) {</div><div class='add'>+			r = -ENOMEM;</div><div class='add'>+			goto free_fence_info;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Retrieve GEM read objects fence */</div><div class='add'>+		for (i = 0; i &lt; num_read_bo_handles; i++) {</div><div class='add'>+			struct dma_resv_iter resv_cursor;</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+</div><div class='add'>+			dma_resv_for_each_fence(&amp;resv_cursor, gobj_read[i]-&gt;resv,</div><div class='add'>+						DMA_RESV_USAGE_READ, fence) {</div><div class='add'>+				if (WARN_ON_ONCE(num_fences &gt;= wait_info-&gt;num_fences)) {</div><div class='add'>+					r = -EINVAL;</div><div class='add'>+					goto free_fences;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				fences[num_fences++] = fence;</div><div class='add'>+				dma_fence_get(fence);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Retrieve GEM write objects fence */</div><div class='add'>+		for (i = 0; i &lt; num_write_bo_handles; i++) {</div><div class='add'>+			struct dma_resv_iter resv_cursor;</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+</div><div class='add'>+			dma_resv_for_each_fence(&amp;resv_cursor, gobj_write[i]-&gt;resv,</div><div class='add'>+						DMA_RESV_USAGE_WRITE, fence) {</div><div class='add'>+				if (WARN_ON_ONCE(num_fences &gt;= wait_info-&gt;num_fences)) {</div><div class='add'>+					r = -EINVAL;</div><div class='add'>+					goto free_fences;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				fences[num_fences++] = fence;</div><div class='add'>+				dma_fence_get(fence);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (num_points) {</div><div class='add'>+			struct dma_fence_unwrap iter;</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+			struct dma_fence *f;</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; num_points; i++) {</div><div class='add'>+				r = drm_syncobj_find_fence(filp, timeline_handles[i],</div><div class='add'>+							   timeline_points[i],</div><div class='add'>+							   DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT,</div><div class='add'>+							   &amp;fence);</div><div class='add'>+				if (r)</div><div class='add'>+					goto free_fences;</div><div class='add'>+</div><div class='add'>+				dma_fence_unwrap_for_each(f, &amp;iter, fence) {</div><div class='add'>+					if (WARN_ON_ONCE(num_fences &gt;= wait_info-&gt;num_fences)) {</div><div class='add'>+						r = -EINVAL;</div><div class='add'>+						goto free_fences;</div><div class='add'>+					}</div><div class='add'>+</div><div class='add'>+					dma_fence_get(f);</div><div class='add'>+					fences[num_fences++] = f;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				dma_fence_put(fence);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Retrieve syncobj's fence */</div><div class='add'>+		for (i = 0; i &lt; num_syncobj; i++) {</div><div class='add'>+			struct dma_fence *fence;</div><div class='add'>+</div><div class='add'>+			r = drm_syncobj_find_fence(filp, syncobj_handles[i],</div><div class='add'>+						   0,</div><div class='add'>+						   DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT,</div><div class='add'>+						   &amp;fence);</div><div class='add'>+			if (r)</div><div class='add'>+				goto free_fences;</div><div class='add'>+</div><div class='add'>+			if (WARN_ON_ONCE(num_fences &gt;= wait_info-&gt;num_fences)) {</div><div class='add'>+				r = -EINVAL;</div><div class='add'>+				goto free_fences;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			fences[num_fences++] = fence;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Keep only the latest fences to reduce the number of values</div><div class='add'>+		 * given back to userspace.</div><div class='add'>+		 */</div><div class='add'>+		num_fences = dma_fence_dedup_array(fences, num_fences);</div><div class='add'>+</div><div class='add'>+		waitq = idr_find(&amp;userq_mgr-&gt;userq_idr, wait_info-&gt;waitq_id);</div><div class='add'>+		if (!waitq) {</div><div class='add'>+			r = -EINVAL;</div><div class='add'>+			goto free_fences;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0, cnt = 0; i &lt; num_fences; i++) {</div><div class='add'>+			struct amdgpu_userq_fence_driver *fence_drv;</div><div class='add'>+			struct amdgpu_userq_fence *userq_fence;</div><div class='add'>+			u32 index;</div><div class='add'>+</div><div class='add'>+			userq_fence = to_amdgpu_userq_fence(fences[i]);</div><div class='add'>+			if (!userq_fence) {</div><div class='add'>+				/*</div><div class='add'>+				 * Just waiting on other driver fences should</div><div class='add'>+				 * be good for now</div><div class='add'>+				 */</div><div class='add'>+				r = dma_fence_wait(fences[i], true);</div><div class='add'>+				if (r) {</div><div class='add'>+					dma_fence_put(fences[i]);</div><div class='add'>+					goto free_fences;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				dma_fence_put(fences[i]);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			fence_drv = userq_fence-&gt;fence_drv;</div><div class='add'>+			/*</div><div class='add'>+			 * We need to make sure the user queue release their reference</div><div class='add'>+			 * to the fence drivers at some point before queue destruction.</div><div class='add'>+			 * Otherwise, we would gather those references until we don't</div><div class='add'>+			 * have any more space left and crash.</div><div class='add'>+			 */</div><div class='add'>+			r = xa_alloc(&amp;waitq-&gt;fence_drv_xa, &amp;index, fence_drv,</div><div class='add'>+				     xa_limit_32b, GFP_KERNEL);</div><div class='add'>+			if (r)</div><div class='add'>+				goto free_fences;</div><div class='add'>+</div><div class='add'>+			amdgpu_userq_fence_driver_get(fence_drv);</div><div class='add'>+</div><div class='add'>+			/* Store drm syncobj's gpu va address and value */</div><div class='add'>+			fence_info[cnt].va = fence_drv-&gt;va;</div><div class='add'>+			fence_info[cnt].value = fences[i]-&gt;seqno;</div><div class='add'>+</div><div class='add'>+			dma_fence_put(fences[i]);</div><div class='add'>+			/* Increment the actual userq fence count */</div><div class='add'>+			cnt++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wait_info-&gt;num_fences = cnt;</div><div class='add'>+		/* Copy userq fence info to user space */</div><div class='add'>+		if (copy_to_user(u64_to_user_ptr(wait_info-&gt;out_fences),</div><div class='add'>+				 fence_info, wait_info-&gt;num_fences * sizeof(*fence_info))) {</div><div class='add'>+			r = -EFAULT;</div><div class='add'>+			goto free_fences;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kfree(fences);</div><div class='add'>+		kfree(fence_info);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	drm_exec_fini(&amp;exec);</div><div class='add'>+	for (i = 0; i &lt; num_read_bo_handles; i++)</div><div class='add'>+		drm_gem_object_put(gobj_read[i]);</div><div class='add'>+	kfree(gobj_read);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_write_bo_handles; i++)</div><div class='add'>+		drm_gem_object_put(gobj_write[i]);</div><div class='add'>+	kfree(gobj_write);</div><div class='add'>+</div><div class='add'>+	kfree(timeline_points);</div><div class='add'>+	kfree(timeline_handles);</div><div class='add'>+	kfree(syncobj_handles);</div><div class='add'>+	kfree(bo_handles_write);</div><div class='add'>+	kfree(bo_handles_read);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_fences:</div><div class='add'>+	while (num_fences-- &gt; 0)</div><div class='add'>+		dma_fence_put(fences[num_fences]);</div><div class='add'>+	kfree(fences);</div><div class='add'>+free_fence_info:</div><div class='add'>+	kfree(fence_info);</div><div class='add'>+exec_fini:</div><div class='add'>+	drm_exec_fini(&amp;exec);</div><div class='add'>+put_gobj_write:</div><div class='add'>+	while (wentry-- &gt; 0)</div><div class='add'>+		drm_gem_object_put(gobj_write[wentry]);</div><div class='add'>+	kfree(gobj_write);</div><div class='add'>+put_gobj_read:</div><div class='add'>+	while (rentry-- &gt; 0)</div><div class='add'>+		drm_gem_object_put(gobj_read[rentry]);</div><div class='add'>+	kfree(gobj_read);</div><div class='add'>+free_timeline_points:</div><div class='add'>+	kfree(timeline_points);</div><div class='add'>+free_timeline_handles:</div><div class='add'>+	kfree(timeline_handles);</div><div class='add'>+free_syncobj_handles:</div><div class='add'>+	kfree(syncobj_handles);</div><div class='add'>+free_bo_handles_write:</div><div class='add'>+	kfree(bo_handles_write);</div><div class='add'>+free_bo_handles_read:</div><div class='add'>+	kfree(bo_handles_read);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.h<br/>new file mode 100644<br/>index 000000000000..97a125ab8a78<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.h</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __AMDGPU_USERQ_FENCE_H__</div><div class='add'>+#define __AMDGPU_USERQ_FENCE_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "amdgpu_userq.h"</div><div class='add'>+</div><div class='add'>+struct amdgpu_userq_fence {</div><div class='add'>+	struct dma_fence base;</div><div class='add'>+	/*</div><div class='add'>+	 * This lock is necessary to synchronize the</div><div class='add'>+	 * userqueue dma fence operations.</div><div class='add'>+	 */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct list_head link;</div><div class='add'>+	unsigned long fence_drv_array_count;</div><div class='add'>+	struct amdgpu_userq_fence_driver *fence_drv;</div><div class='add'>+	struct amdgpu_userq_fence_driver **fence_drv_array;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct amdgpu_userq_fence_driver {</div><div class='add'>+	struct kref refcount;</div><div class='add'>+	u64 va;</div><div class='add'>+	u64 gpu_addr;</div><div class='add'>+	u64 *cpu_addr;</div><div class='add'>+	u64 context;</div><div class='add'>+	/*</div><div class='add'>+	 * This lock is necesaary to synchronize the access</div><div class='add'>+	 * to the fences list by the fence driver.</div><div class='add'>+	 */</div><div class='add'>+	spinlock_t fence_list_lock;</div><div class='add'>+	struct list_head fences;</div><div class='add'>+	struct amdgpu_device *adev;</div><div class='add'>+	char timeline_name[TASK_COMM_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int amdgpu_userq_fence_slab_init(void);</div><div class='add'>+void amdgpu_userq_fence_slab_fini(void);</div><div class='add'>+</div><div class='add'>+void amdgpu_userq_fence_driver_get(struct amdgpu_userq_fence_driver *fence_drv);</div><div class='add'>+void amdgpu_userq_fence_driver_put(struct amdgpu_userq_fence_driver *fence_drv);</div><div class='add'>+int amdgpu_userq_fence_driver_alloc(struct amdgpu_device *adev,</div><div class='add'>+				    struct amdgpu_usermode_queue *userq);</div><div class='add'>+void amdgpu_userq_fence_driver_free(struct amdgpu_usermode_queue *userq);</div><div class='add'>+void amdgpu_userq_fence_driver_process(struct amdgpu_userq_fence_driver *fence_drv);</div><div class='add'>+void amdgpu_userq_fence_driver_destroy(struct kref *ref);</div><div class='add'>+int amdgpu_userq_signal_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+			      struct drm_file *filp);</div><div class='add'>+int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,</div><div class='add'>+			    struct drm_file *filp);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br/>index 1991dd3d1056..c8885c3d54b3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c</a></div><div class='hunk'>@@ -353,9 +353,9 @@ int amdgpu_vcn_suspend(struct amdgpu_device *adev, int i)</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adev-&gt;vcn.inst[i].idle_work);</div><div class='ctx'> </div><div class='del'>-	/* err_event_athub will corrupt VCPU buffer, so we need to</div><div class='add'>+	/* err_event_athub and dpc recovery will corrupt VCPU buffer, so we need to</div><div class='ctx'> 	 * restore fw data and clear buffer in amdgpu_vcn_resume() */</div><div class='del'>-	if (in_ras_intr)</div><div class='add'>+	if (in_ras_intr || adev-&gt;pcie_reset_ctx.in_link_reset)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return amdgpu_vcn_save_vcpu_bo_inst(adev, i);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br/>index cdcdae7f71ce..83adf81defc7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h</a></div><div class='hunk'>@@ -66,7 +66,6 @@</div><div class='ctx'> #define VCN_ENC_CMD_REG_WAIT		0x0000000c</div><div class='ctx'> </div><div class='ctx'> #define VCN_AON_SOC_ADDRESS_2_0 	0x1f800</div><div class='del'>-#define VCN1_AON_SOC_ADDRESS_3_0 	0x48000</div><div class='ctx'> #define VCN_VID_IP_ADDRESS_2_0		0x0</div><div class='ctx'> #define VCN_AON_IP_ADDRESS_2_0		0x30000</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c<br/>index 0bb8cbe0dcc0..13f0cdeb59c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c</a></div><div class='hunk'>@@ -1323,6 +1323,9 @@ static int amdgpu_virt_req_ras_err_count_internal(struct amdgpu_device *adev, bo</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_virt *virt = &amp;adev-&gt;virt;</div><div class='ctx'> </div><div class='add'>+	if (!virt-&gt;ops || !virt-&gt;ops-&gt;req_ras_err_count)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	/* Host allows 15 ras telemetry requests per 60 seconds. Afterwhich, the Host</div><div class='ctx'> 	 * will ignore incoming guest messages. Ratelimit the guest messages to</div><div class='ctx'> 	 * prevent guest self DOS.</div><div class='hunk'>@@ -1378,14 +1381,16 @@ amdgpu_virt_write_cpers_to_ring(struct amdgpu_device *adev,</div><div class='ctx'> 	used_size = host_telemetry-&gt;header.used_size;</div><div class='ctx'> </div><div class='ctx'> 	if (used_size &gt; (AMD_SRIOV_RAS_TELEMETRY_SIZE_KB &lt;&lt; 10))</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	cper_dump = kmemdup(&amp;host_telemetry-&gt;body.cper_dump, used_size, GFP_KERNEL);</div><div class='ctx'> 	if (!cper_dump)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (checksum != amd_sriov_msg_checksum(cper_dump, used_size, 0, 0))</div><div class='add'>+	if (checksum != amd_sriov_msg_checksum(cper_dump, used_size, 0, 0)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	*more = cper_dump-&gt;more;</div><div class='ctx'> </div><div class='hunk'>@@ -1425,7 +1430,7 @@ static int amdgpu_virt_req_ras_cper_dump_internal(struct amdgpu_device *adev)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	uint32_t more = 0;</div><div class='ctx'> </div><div class='del'>-	if (!amdgpu_sriov_ras_cper_en(adev))</div><div class='add'>+	if (!virt-&gt;ops || !virt-&gt;ops-&gt;req_ras_cper_dump)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='hunk'>@@ -1434,7 +1439,7 @@ static int amdgpu_virt_req_ras_cper_dump_internal(struct amdgpu_device *adev)</div><div class='ctx'> 				adev, virt-&gt;fw_reserve.ras_telemetry, &amp;more);</div><div class='ctx'> 		else</div><div class='ctx'> 			ret = 0;</div><div class='del'>-	} while (more);</div><div class='add'>+	} while (more &amp;&amp; !ret);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1444,6 +1449,9 @@ int amdgpu_virt_req_ras_cper_dump(struct amdgpu_device *adev, bool force_update)</div><div class='ctx'> 	struct amdgpu_virt *virt = &amp;adev-&gt;virt;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (!amdgpu_sriov_ras_cper_en(adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	if ((__ratelimit(&amp;virt-&gt;ras.ras_cper_dump_rs) || force_update) &amp;&amp;</div><div class='ctx'> 	    down_read_trylock(&amp;adev-&gt;reset_domain-&gt;sem)) {</div><div class='ctx'> 		mutex_lock(&amp;virt-&gt;ras.ras_telemetry_mutex);</div><div class='hunk'>@@ -1480,3 +1488,16 @@ bool amdgpu_virt_ras_telemetry_block_en(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * amdgpu_virt_request_bad_pages() - request bad pages</div><div class='add'>+ * @adev: amdgpu device.</div><div class='add'>+ * Send command to GPU hypervisor to write new bad pages into the shared PF2VF region</div><div class='add'>+ */</div><div class='add'>+void amdgpu_virt_request_bad_pages(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_virt *virt = &amp;adev-&gt;virt;</div><div class='add'>+</div><div class='add'>+	if (virt-&gt;ops &amp;&amp; virt-&gt;ops-&gt;req_bad_pages)</div><div class='add'>+		virt-&gt;ops-&gt;req_bad_pages(adev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h<br/>index df03dba67ab8..577c6194db78 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h</a></div><div class='hunk'>@@ -97,6 +97,7 @@ struct amdgpu_virt_ops {</div><div class='ctx'> 	bool (*rcvd_ras_intr)(struct amdgpu_device *adev);</div><div class='ctx'> 	int (*req_ras_err_count)(struct amdgpu_device *adev);</div><div class='ctx'> 	int (*req_ras_cper_dump)(struct amdgpu_device *adev, u64 vf_rptr);</div><div class='add'>+	int (*req_bad_pages)(struct amdgpu_device *adev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -146,11 +147,13 @@ enum AMDGIM_FEATURE_FLAG {</div><div class='ctx'> </div><div class='ctx'> enum AMDGIM_REG_ACCESS_FLAG {</div><div class='ctx'> 	/* Use PSP to program IH_RB_CNTL */</div><div class='del'>-	AMDGIM_FEATURE_IH_REG_PSP_EN     = (1 &lt;&lt; 0),</div><div class='add'>+	AMDGIM_FEATURE_IH_REG_PSP_EN      = (1 &lt;&lt; 0),</div><div class='ctx'> 	/* Use RLC to program MMHUB regs */</div><div class='del'>-	AMDGIM_FEATURE_MMHUB_REG_RLC_EN  = (1 &lt;&lt; 1),</div><div class='add'>+	AMDGIM_FEATURE_MMHUB_REG_RLC_EN   = (1 &lt;&lt; 1),</div><div class='ctx'> 	/* Use RLC to program GC regs */</div><div class='del'>-	AMDGIM_FEATURE_GC_REG_RLC_EN     = (1 &lt;&lt; 2),</div><div class='add'>+	AMDGIM_FEATURE_GC_REG_RLC_EN      = (1 &lt;&lt; 2),</div><div class='add'>+	/* Use PSP to program L1_TLB_CNTL*/</div><div class='add'>+	AMDGIM_FEATURE_L1_TLB_CNTL_PSP_EN = (1 &lt;&lt; 3),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgim_pf2vf_info_v1 {</div><div class='hunk'>@@ -260,7 +263,10 @@ struct amdgpu_virt {</div><div class='ctx'> 	uint32_t			reg_val_offs;</div><div class='ctx'> 	struct amdgpu_irq_src		ack_irq;</div><div class='ctx'> 	struct amdgpu_irq_src		rcv_irq;</div><div class='add'>+</div><div class='ctx'> 	struct work_struct		flr_work;</div><div class='add'>+	struct work_struct		bad_pages_work;</div><div class='add'>+</div><div class='ctx'> 	struct amdgpu_mm_table		mm_table;</div><div class='ctx'> 	const struct amdgpu_virt_ops	*ops;</div><div class='ctx'> 	struct amdgpu_vf_error_buffer	vf_errors;</div><div class='hunk'>@@ -330,6 +336,10 @@ struct amdgpu_video_codec_info;</div><div class='ctx'> (amdgpu_sriov_vf((adev)) &amp;&amp; \</div><div class='ctx'> 	((adev)-&gt;virt.reg_access &amp; (AMDGIM_FEATURE_GC_REG_RLC_EN)))</div><div class='ctx'> </div><div class='add'>+#define amdgpu_sriov_reg_indirect_l1_tlb_cntl(adev) \</div><div class='add'>+(amdgpu_sriov_vf((adev)) &amp;&amp; \</div><div class='add'>+	((adev)-&gt;virt.reg_access &amp; (AMDGIM_FEATURE_L1_TLB_CNTL_PSP_EN)))</div><div class='add'>+</div><div class='ctx'> #define amdgpu_sriov_rlcg_error_report_enabled(adev) \</div><div class='ctx'>         (amdgpu_sriov_reg_indirect_mmhub(adev) || amdgpu_sriov_reg_indirect_gc(adev))</div><div class='ctx'> </div><div class='hunk'>@@ -423,4 +433,5 @@ int amdgpu_virt_req_ras_cper_dump(struct amdgpu_device *adev, bool force_update)</div><div class='ctx'> int amdgpu_virt_ras_telemetry_post_reset(struct amdgpu_device *adev);</div><div class='ctx'> bool amdgpu_virt_ras_telemetry_block_en(struct amdgpu_device *adev,</div><div class='ctx'> 					enum amdgpu_ras_block block);</div><div class='add'>+void amdgpu_virt_request_bad_pages(struct amdgpu_device *adev);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br/>index ce52b4d75e94..3911c78f8282 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c</a></div><div class='hunk'>@@ -787,7 +787,8 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,</div><div class='ctx'> 	pasid_mapping_needed &amp;= adev-&gt;gmc.gmc_funcs-&gt;emit_pasid_mapping &amp;&amp;</div><div class='ctx'> 		ring-&gt;funcs-&gt;emit_wreg;</div><div class='ctx'> </div><div class='del'>-	cleaner_shader_needed = adev-&gt;gfx.enable_cleaner_shader &amp;&amp;</div><div class='add'>+	cleaner_shader_needed = job-&gt;run_cleaner_shader &amp;&amp;</div><div class='add'>+		adev-&gt;gfx.enable_cleaner_shader &amp;&amp;</div><div class='ctx'> 		ring-&gt;funcs-&gt;emit_cleaner_shader &amp;&amp; job-&gt;base.s_fence &amp;&amp;</div><div class='ctx'> 		&amp;job-&gt;base.s_fence-&gt;scheduled == isolation-&gt;spearhead;</div><div class='ctx'> </div><div class='hunk'>@@ -817,7 +818,7 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,</div><div class='ctx'> 	if (spm_update_needed &amp;&amp; adev-&gt;gfx.rlc.funcs-&gt;update_spm_vmid)</div><div class='ctx'> 		adev-&gt;gfx.rlc.funcs-&gt;update_spm_vmid(adev, ring, job-&gt;vmid);</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;is_mes_queue &amp;&amp; ring-&gt;funcs-&gt;emit_gds_switch &amp;&amp;</div><div class='add'>+	if (ring-&gt;funcs-&gt;emit_gds_switch &amp;&amp;</div><div class='ctx'> 	    gds_switch_needed) {</div><div class='ctx'> 		amdgpu_ring_emit_gds_switch(ring, job-&gt;vmid, job-&gt;gds_base,</div><div class='ctx'> 					    job-&gt;gds_size, job-&gt;gws_base,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c<br/>index 6da8994e0469..2d7f82e98df9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;drm/ttm/ttm_range_manager.h&gt;</div><div class='add'>+#include &lt;drm/drm_drv.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "amdgpu_vm.h"</div><div class='hunk'>@@ -907,6 +908,9 @@ int amdgpu_vram_mgr_init(struct amdgpu_device *adev)</div><div class='ctx'> 	struct ttm_resource_manager *man = &amp;mgr-&gt;manager;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	man-&gt;cg = drmm_cgroup_register_region(adev_to_drm(adev), "vram", adev-&gt;gmc.real_vram_size);</div><div class='add'>+	if (IS_ERR(man-&gt;cg))</div><div class='add'>+		return PTR_ERR(man-&gt;cg);</div><div class='ctx'> 	ttm_resource_manager_init(man, &amp;adev-&gt;mman.bdev,</div><div class='ctx'> 				  adev-&gt;gmc.real_vram_size);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c<br/>index 23b6f7a4aa4a..b03c3895897b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c</a></div><div class='hunk'>@@ -709,10 +709,10 @@ void amdgpu_xcp_cfg_sysfs_fini(struct amdgpu_device *adev)</div><div class='ctx'> 	struct amdgpu_xcp_cfg *xcp_cfg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!adev-&gt;xcp_mgr)</div><div class='add'>+	if (!adev-&gt;xcp_mgr || !adev-&gt;xcp_mgr-&gt;xcp_cfg)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	xcp_cfg =  adev-&gt;xcp_mgr-&gt;xcp_cfg;</div><div class='add'>+	xcp_cfg = adev-&gt;xcp_mgr-&gt;xcp_cfg;</div><div class='ctx'> 	for (i = 0; i &lt; xcp_cfg-&gt;num_res; i++) {</div><div class='ctx'> 		xcp_res = &amp;xcp_cfg-&gt;xcp_res[i];</div><div class='ctx'> 		kobject_put(&amp;xcp_res-&gt;kobj);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c<br/>index 477424472bbe..f51ef4cf16e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c</a></div><div class='hunk'>@@ -296,15 +296,27 @@ static const struct amdgpu_pcs_ras_field xgmi3x16_pcs_ras_fields[] = {</div><div class='ctx'> </div><div class='ctx'> static u32 xgmi_v6_4_get_link_status(struct amdgpu_device *adev, int global_link_num)</div><div class='ctx'> {</div><div class='del'>-	const u32 smnpcs_xgmi3x16_pcs_state_hist1 = 0x11a00070;</div><div class='del'>-	const int xgmi_inst = 2;</div><div class='del'>-	u32 link_inst;</div><div class='add'>+	const u32 smn_xgmi_6_4_pcs_state_hist1[2] = { 0x11a00070, 0x11b00070 };</div><div class='add'>+	const u32 smn_xgmi_6_4_1_pcs_state_hist1[2] = { 0x12100070,</div><div class='add'>+							0x11b00070 };</div><div class='add'>+	u32 i, n;</div><div class='ctx'> 	u64 addr;</div><div class='ctx'> </div><div class='del'>-	link_inst = global_link_num % xgmi_inst;</div><div class='add'>+	switch (amdgpu_ip_version(adev, XGMI_HWIP, 0)) {</div><div class='add'>+	case IP_VERSION(6, 4, 0):</div><div class='add'>+		n = ARRAY_SIZE(smn_xgmi_6_4_pcs_state_hist1);</div><div class='add'>+		addr = smn_xgmi_6_4_pcs_state_hist1[global_link_num % n];</div><div class='add'>+		break;</div><div class='add'>+	case IP_VERSION(6, 4, 1):</div><div class='add'>+		n = ARRAY_SIZE(smn_xgmi_6_4_1_pcs_state_hist1);</div><div class='add'>+		addr = smn_xgmi_6_4_1_pcs_state_hist1[global_link_num % n];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return U32_MAX;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	addr = (smnpcs_xgmi3x16_pcs_state_hist1 | (link_inst &lt;&lt; 20)) +</div><div class='del'>-		adev-&gt;asic_funcs-&gt;encode_ext_smn_addressing(global_link_num / xgmi_inst);</div><div class='add'>+	i = global_link_num / n;</div><div class='add'>+	addr += adev-&gt;asic_funcs-&gt;encode_ext_smn_addressing(i);</div><div class='ctx'> </div><div class='ctx'> 	return RREG32_PCIE_EXT(addr);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h<br/>index d6ac2652f0ac..92ca13097aaa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h</a></div><div class='hunk'>@@ -109,10 +109,11 @@ union amd_sriov_msg_feature_flags {</div><div class='ctx'> </div><div class='ctx'> union amd_sriov_reg_access_flags {</div><div class='ctx'> 	struct {</div><div class='del'>-		uint32_t vf_reg_access_ih	: 1;</div><div class='del'>-		uint32_t vf_reg_access_mmhub	: 1;</div><div class='del'>-		uint32_t vf_reg_access_gc	: 1;</div><div class='del'>-		uint32_t reserved		: 29;</div><div class='add'>+		uint32_t vf_reg_access_ih		: 1;</div><div class='add'>+		uint32_t vf_reg_access_mmhub		: 1;</div><div class='add'>+		uint32_t vf_reg_access_gc		: 1;</div><div class='add'>+		uint32_t vf_reg_access_l1_tlb_cntl	: 1;</div><div class='add'>+		uint32_t reserved			: 28;</div><div class='ctx'> 	} flags;</div><div class='ctx'> 	uint32_t all;</div><div class='ctx'> };</div><div class='hunk'>@@ -330,6 +331,7 @@ enum amd_sriov_mailbox_request_message {</div><div class='ctx'> 	MB_REQ_MSG_RAS_POISON = 202,</div><div class='ctx'> 	MB_REQ_RAS_ERROR_COUNT = 203,</div><div class='ctx'> 	MB_REQ_RAS_CPER_DUMP = 204,</div><div class='add'>+	MB_REQ_RAS_BAD_PAGES = 205,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* mailbox message send from host to guest  */</div><div class='hunk'>@@ -347,6 +349,9 @@ enum amd_sriov_mailbox_response_message {</div><div class='ctx'> 	MB_RES_MSG_GPU_RMA			= 10,</div><div class='ctx'> 	MB_RES_MSG_RAS_ERROR_COUNT_READY	= 11,</div><div class='ctx'> 	MB_REQ_RAS_CPER_DUMP_READY		= 14,</div><div class='add'>+	MB_RES_MSG_RAS_BAD_PAGES_READY		= 15,</div><div class='add'>+	MB_RES_MSG_RAS_BAD_PAGES_NOTIFICATION	= 16,</div><div class='add'>+	MB_RES_MSG_UNRECOV_ERR_NOTIFICATION	= 17,</div><div class='ctx'> 	MB_RES_MSG_TEXT_MESSAGE			= 255</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c<br/>index ae071985f26e..1c083304ae77 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c</a></div><div class='hunk'>@@ -448,53 +448,71 @@ static int __aqua_vanjaram_get_xcp_ip_info(struct amdgpu_xcp_mgr *xcp_mgr, int x</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqua_vanjaram_get_xcp_res_info(struct amdgpu_xcp_mgr *xcp_mgr,</div><div class='del'>-					  int mode,</div><div class='del'>-					  struct amdgpu_xcp_cfg *xcp_cfg)</div><div class='add'>+static int __aqua_vanjaram_get_px_mode_info(struct amdgpu_xcp_mgr *xcp_mgr,</div><div class='add'>+					    int px_mode, int *num_xcp,</div><div class='add'>+					    uint16_t *nps_modes)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = xcp_mgr-&gt;adev;</div><div class='del'>-	int max_res[AMDGPU_XCP_RES_MAX] = {};</div><div class='del'>-	bool res_lt_xcp;</div><div class='del'>-	int num_xcp, i;</div><div class='del'>-	u16 nps_modes;</div><div class='ctx'> </div><div class='del'>-	if (!(xcp_mgr-&gt;supp_xcp_modes &amp; BIT(mode)))</div><div class='add'>+	if (!num_xcp || !nps_modes || !(xcp_mgr-&gt;supp_xcp_modes &amp; BIT(px_mode)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	max_res[AMDGPU_XCP_RES_XCC] = NUM_XCC(adev-&gt;gfx.xcc_mask);</div><div class='del'>-	max_res[AMDGPU_XCP_RES_DMA] = adev-&gt;sdma.num_instances;</div><div class='del'>-	max_res[AMDGPU_XCP_RES_DEC] = adev-&gt;vcn.num_vcn_inst;</div><div class='del'>-	max_res[AMDGPU_XCP_RES_JPEG] = adev-&gt;jpeg.num_jpeg_inst;</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='add'>+	switch (px_mode) {</div><div class='ctx'> 	case AMDGPU_SPX_PARTITION_MODE:</div><div class='del'>-		num_xcp = 1;</div><div class='del'>-		nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE);</div><div class='add'>+		*num_xcp = 1;</div><div class='add'>+		*nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_DPX_PARTITION_MODE:</div><div class='del'>-		num_xcp = 2;</div><div class='del'>-		nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='del'>-			    BIT(AMDGPU_NPS2_PARTITION_MODE);</div><div class='add'>+		*num_xcp = 2;</div><div class='add'>+		*nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='add'>+			     BIT(AMDGPU_NPS2_PARTITION_MODE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_TPX_PARTITION_MODE:</div><div class='del'>-		num_xcp = 3;</div><div class='del'>-		nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='del'>-			    BIT(AMDGPU_NPS4_PARTITION_MODE);</div><div class='add'>+		*num_xcp = 3;</div><div class='add'>+		*nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='add'>+			     BIT(AMDGPU_NPS4_PARTITION_MODE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_QPX_PARTITION_MODE:</div><div class='del'>-		num_xcp = 4;</div><div class='del'>-		nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='del'>-			    BIT(AMDGPU_NPS4_PARTITION_MODE);</div><div class='add'>+		*num_xcp = 4;</div><div class='add'>+		*nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='add'>+			     BIT(AMDGPU_NPS4_PARTITION_MODE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_CPX_PARTITION_MODE:</div><div class='del'>-		num_xcp = NUM_XCC(adev-&gt;gfx.xcc_mask);</div><div class='del'>-		nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='del'>-			    BIT(AMDGPU_NPS4_PARTITION_MODE);</div><div class='add'>+		*num_xcp = NUM_XCC(adev-&gt;gfx.xcc_mask);</div><div class='add'>+		*nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |</div><div class='add'>+			     BIT(AMDGPU_NPS4_PARTITION_MODE);</div><div class='add'>+		if (amdgpu_sriov_vf(adev))</div><div class='add'>+			*nps_modes |= BIT(AMDGPU_NPS2_PARTITION_MODE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqua_vanjaram_get_xcp_res_info(struct amdgpu_xcp_mgr *xcp_mgr,</div><div class='add'>+					  int mode,</div><div class='add'>+					  struct amdgpu_xcp_cfg *xcp_cfg)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = xcp_mgr-&gt;adev;</div><div class='add'>+	int max_res[AMDGPU_XCP_RES_MAX] = {};</div><div class='add'>+	bool res_lt_xcp;</div><div class='add'>+	int num_xcp, i, r;</div><div class='add'>+	u16 nps_modes;</div><div class='add'>+</div><div class='add'>+	if (!(xcp_mgr-&gt;supp_xcp_modes &amp; BIT(mode)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	max_res[AMDGPU_XCP_RES_XCC] = NUM_XCC(adev-&gt;gfx.xcc_mask);</div><div class='add'>+	max_res[AMDGPU_XCP_RES_DMA] = adev-&gt;sdma.num_instances;</div><div class='add'>+	max_res[AMDGPU_XCP_RES_DEC] = adev-&gt;vcn.num_vcn_inst;</div><div class='add'>+	max_res[AMDGPU_XCP_RES_JPEG] = adev-&gt;jpeg.num_jpeg_inst;</div><div class='add'>+</div><div class='add'>+	r = __aqua_vanjaram_get_px_mode_info(xcp_mgr, mode, &amp;num_xcp, &amp;nps_modes);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='ctx'> 	xcp_cfg-&gt;compatible_nps_modes =</div><div class='ctx'> 		(adev-&gt;gmc.supported_nps_modes &amp; nps_modes);</div><div class='ctx'> 	xcp_cfg-&gt;num_res = ARRAY_SIZE(max_res);</div><div class='hunk'>@@ -543,30 +561,31 @@ static bool __aqua_vanjaram_is_valid_mode(struct amdgpu_xcp_mgr *xcp_mgr,</div><div class='ctx'> 					  enum amdgpu_gfx_partition mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = xcp_mgr-&gt;adev;</div><div class='del'>-	int num_xcc, num_xccs_per_xcp;</div><div class='add'>+	int num_xcc, num_xccs_per_xcp, r;</div><div class='add'>+	int num_xcp, nps_mode;</div><div class='add'>+	u16 supp_nps_modes;</div><div class='add'>+	bool comp_mode;</div><div class='add'>+</div><div class='add'>+	nps_mode = adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode(adev);</div><div class='add'>+	r = __aqua_vanjaram_get_px_mode_info(xcp_mgr, mode, &amp;num_xcp,</div><div class='add'>+					       &amp;supp_nps_modes);</div><div class='add'>+	if (r)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='add'>+	comp_mode = !!(BIT(nps_mode) &amp; supp_nps_modes);</div><div class='ctx'> 	num_xcc = NUM_XCC(adev-&gt;gfx.xcc_mask);</div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case AMDGPU_SPX_PARTITION_MODE:</div><div class='del'>-		return adev-&gt;gmc.num_mem_partitions == 1 &amp;&amp; num_xcc &gt; 0;</div><div class='add'>+		return comp_mode &amp;&amp; num_xcc &gt; 0;</div><div class='ctx'> 	case AMDGPU_DPX_PARTITION_MODE:</div><div class='del'>-		return adev-&gt;gmc.num_mem_partitions &lt;= 2 &amp;&amp; (num_xcc % 4) == 0;</div><div class='add'>+		return comp_mode &amp;&amp; (num_xcc % 4) == 0;</div><div class='ctx'> 	case AMDGPU_TPX_PARTITION_MODE:</div><div class='del'>-		return (adev-&gt;gmc.num_mem_partitions == 1 ||</div><div class='del'>-			adev-&gt;gmc.num_mem_partitions == 3) &amp;&amp;</div><div class='del'>-		       ((num_xcc % 3) == 0);</div><div class='add'>+		return comp_mode &amp;&amp; ((num_xcc % 3) == 0);</div><div class='ctx'> 	case AMDGPU_QPX_PARTITION_MODE:</div><div class='ctx'> 		num_xccs_per_xcp = num_xcc / 4;</div><div class='del'>-		return (adev-&gt;gmc.num_mem_partitions == 1 ||</div><div class='del'>-			adev-&gt;gmc.num_mem_partitions == 4) &amp;&amp;</div><div class='del'>-		       (num_xccs_per_xcp &gt;= 2);</div><div class='add'>+		return comp_mode &amp;&amp; (num_xccs_per_xcp &gt;= 2);</div><div class='ctx'> 	case AMDGPU_CPX_PARTITION_MODE:</div><div class='del'>-		/* (num_xcc &gt; 1) because 1 XCC is considered SPX, not CPX.</div><div class='del'>-		 * (num_xcc % adev-&gt;gmc.num_mem_partitions) == 0 because</div><div class='del'>-		 * num_compute_partitions can't be less than num_mem_partitions</div><div class='del'>-		 */</div><div class='del'>-		return ((num_xcc &gt; 1) &amp;&amp;</div><div class='del'>-		       (num_xcc % adev-&gt;gmc.num_mem_partitions) == 0);</div><div class='add'>+		return comp_mode &amp;&amp; (num_xcc &gt; 1);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c b/drivers/gpu/drm/amd/amdgpu/atom.c<br/>index 81d195d366ce..427b073de2fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/atom.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/atom.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/atom.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/atom.c</a></div><div class='hunk'>@@ -1444,6 +1444,7 @@ static void atom_get_vbios_pn(struct atom_context *ctx)</div><div class='ctx'> 		if (vbios_str == NULL)</div><div class='ctx'> 			vbios_str += sizeof(BIOS_ATOM_PREFIX) - 1;</div><div class='ctx'> 	}</div><div class='add'>+	OPTIMIZER_HIDE_VAR(vbios_str);</div><div class='ctx'> 	if (vbios_str != NULL &amp;&amp; *vbios_str == 0)</div><div class='ctx'> 		vbios_str++;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c<br/>index 521b9faab180..492813ab1b54 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/atombios_dp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/atombios_dp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/atombios_dp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/atombios_dp.c</a></div><div class='hunk'>@@ -458,8 +458,8 @@ bool amdgpu_atombios_dp_needs_link_train(struct amdgpu_connector *amdgpu_connect</div><div class='ctx'> 	u8 link_status[DP_LINK_STATUS_SIZE];</div><div class='ctx'> 	struct amdgpu_connector_atom_dig *dig = amdgpu_connector-&gt;con_priv;</div><div class='ctx'> </div><div class='del'>-	if (drm_dp_dpcd_read_link_status(&amp;amdgpu_connector-&gt;ddc_bus-&gt;aux, link_status)</div><div class='del'>-	    &lt;= 0)</div><div class='add'>+	if (drm_dp_dpcd_read_link_status(&amp;amdgpu_connector-&gt;ddc_bus-&gt;aux,</div><div class='add'>+					 link_status) &lt; 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (drm_dp_channel_eq_ok(link_status, dig-&gt;dp_lane_count))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -616,7 +616,7 @@ amdgpu_atombios_dp_link_train_cr(struct amdgpu_atombios_dp_link_train_info *dp_i</div><div class='ctx'> 		drm_dp_link_train_clock_recovery_delay(dp_info-&gt;aux, dp_info-&gt;dpcd);</div><div class='ctx'> </div><div class='ctx'> 		if (drm_dp_dpcd_read_link_status(dp_info-&gt;aux,</div><div class='del'>-						 dp_info-&gt;link_status) &lt;= 0) {</div><div class='add'>+						 dp_info-&gt;link_status) &lt; 0) {</div><div class='ctx'> 			DRM_ERROR("displayport link status failed\n");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -681,7 +681,7 @@ amdgpu_atombios_dp_link_train_ce(struct amdgpu_atombios_dp_link_train_info *dp_i</div><div class='ctx'> 		drm_dp_link_train_channel_eq_delay(dp_info-&gt;aux, dp_info-&gt;dpcd);</div><div class='ctx'> </div><div class='ctx'> 		if (drm_dp_dpcd_read_link_status(dp_info-&gt;aux,</div><div class='del'>-						 dp_info-&gt;link_status) &lt;= 0) {</div><div class='add'>+						 dp_info-&gt;link_status) &lt; 0) {</div><div class='ctx'> 			DRM_ERROR("displayport link status failed\n");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c<br/>index 508cea965983..9e8715b4739d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik_sdma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/cik_sdma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cik_sdma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/cik_sdma.c</a></div><div class='hunk'>@@ -56,6 +56,8 @@ static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void cik_sdma_set_vm_pte_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static int cik_sdma_soft_reset(struct amdgpu_ip_block *ip_block);</div><div class='ctx'> </div><div class='add'>+u32 amdgpu_cik_gpu_check_soft_reset(struct amdgpu_device *adev);</div><div class='add'>+</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/bonaire_sdma.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/bonaire_sdma1.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/hawaii_sdma.bin");</div><div class='hunk'>@@ -67,9 +69,6 @@ MODULE_FIRMWARE("amdgpu/kabini_sdma1.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/mullins_sdma.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/mullins_sdma1.bin");</div><div class='ctx'> </div><div class='del'>-u32 amdgpu_cik_gpu_check_soft_reset(struct amdgpu_device *adev);</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> static void cik_sdma_free_microcode(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -993,14 +992,9 @@ static int cik_sdma_sw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> static int cik_sdma_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='del'>-	int r;</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='del'>-	r = cik_sdma_start(adev);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='del'>-</div><div class='del'>-	return r;</div><div class='add'>+	return cik_sdma_start(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cik_sdma_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='hunk'>@@ -1040,14 +1034,10 @@ static bool cik_sdma_is_idle(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> static int cik_sdma_wait_for_idle(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned i;</div><div class='del'>-	u32 tmp;</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		tmp = RREG32(mmSRBM_STATUS2) &amp; (SRBM_STATUS2__SDMA_BUSY_MASK |</div><div class='del'>-				SRBM_STATUS2__SDMA1_BUSY_MASK);</div><div class='del'>-</div><div class='del'>-		if (!tmp)</div><div class='add'>+		if (cik_sdma_is_idle(ip_block))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/cikd.h b/drivers/gpu/drm/amd/amdgpu/cikd.h<br/>index 279288365940..8aca4f2734f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cikd.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/cikd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/cikd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/cikd.h</a></div><div class='hunk'>@@ -60,9 +60,6 @@</div><div class='ctx'> #define AUD5_REGISTER_OFFSET                 (0x179d - 0x1780)</div><div class='ctx'> #define AUD6_REGISTER_OFFSET                 (0x17a4 - 0x1780)</div><div class='ctx'> </div><div class='del'>-#define BONAIRE_GB_ADDR_CONFIG_GOLDEN        0x12010001</div><div class='del'>-#define HAWAII_GB_ADDR_CONFIG_GOLDEN         0x12011003</div><div class='del'>-</div><div class='ctx'> #define		PIPEID(x)					((x) &lt;&lt; 0)</div><div class='ctx'> #define		MEID(x)						((x) &lt;&lt; 2)</div><div class='ctx'> #define		VMID(x)						((x) &lt;&lt; 4)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c<br/>index df401aded662..bf7c22f81cda 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/dce_v10_0.c</a></div><div class='hunk'>@@ -3075,7 +3075,7 @@ static int dce_v10_0_set_hpd_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (hpd &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", hpd);</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", hpd);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3227,7 +3227,7 @@ static void dce_v10_0_hpd_int_ack(struct amdgpu_device *adev,</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (hpd &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", hpd);</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", hpd);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c<br/>index 80f01c3989cd..47e05783c4a0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/dce_v11_0.c</a></div><div class='hunk'>@@ -3206,7 +3206,7 @@ static int dce_v11_0_set_hpd_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (hpd &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", hpd);</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", hpd);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3358,7 +3358,7 @@ static void dce_v11_0_hpd_int_ack(struct amdgpu_device *adev,</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (hpd &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", hpd);</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", hpd);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3488,8 +3488,7 @@ static const struct amd_ip_funcs dce_v11_0_ip_funcs = {</div><div class='ctx'> 	.set_powergating_state = dce_v11_0_set_powergating_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-dce_v11_0_encoder_mode_set(struct drm_encoder *encoder,</div><div class='add'>+static void dce_v11_0_encoder_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> 			  struct drm_display_mode *mode,</div><div class='ctx'> 			  struct drm_display_mode *adjusted_mode)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c<br/>index 255c70959343..276c025c4c03 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/dce_v6_0.c</a></div><div class='hunk'>@@ -287,7 +287,7 @@ static void dce_v6_0_hpd_int_ack(struct amdgpu_device *adev,</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (hpd &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", hpd);</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", hpd);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -412,7 +412,7 @@ static void dce_v6_0_set_vga_render_state(struct amdgpu_device *adev,</div><div class='ctx'> {</div><div class='ctx'> 	if (!render)</div><div class='ctx'> 		WREG32(mmVGA_RENDER_CONTROL,</div><div class='del'>-			RREG32(mmVGA_RENDER_CONTROL) &amp; VGA_VSTATUS_CNTL);</div><div class='add'>+		       RREG32(mmVGA_RENDER_CONTROL) &amp; ~VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dce_v6_0_get_num_crtc(struct amdgpu_device *adev)</div><div class='hunk'>@@ -1011,16 +1011,16 @@ static void dce_v6_0_program_watermarks(struct amdgpu_device *adev,</div><div class='ctx'> 	/* select wm A */</div><div class='ctx'> 	arb_control3 = RREG32(mmDPG_PIPE_ARBITRATION_CONTROL3 + amdgpu_crtc-&gt;crtc_offset);</div><div class='ctx'> 	tmp = arb_control3;</div><div class='del'>-	tmp &amp;= ~LATENCY_WATERMARK_MASK(3);</div><div class='del'>-	tmp |= LATENCY_WATERMARK_MASK(1);</div><div class='add'>+	tmp &amp;= ~(3 &lt;&lt; DPG_PIPE_ARBITRATION_CONTROL3__URGENCY_WATERMARK_MASK__SHIFT);</div><div class='add'>+	tmp |= (1 &lt;&lt; DPG_PIPE_ARBITRATION_CONTROL3__URGENCY_WATERMARK_MASK__SHIFT);</div><div class='ctx'> 	WREG32(mmDPG_PIPE_ARBITRATION_CONTROL3 + amdgpu_crtc-&gt;crtc_offset, tmp);</div><div class='ctx'> 	WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='ctx'> 	       ((latency_watermark_a &lt;&lt; DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT)  |</div><div class='ctx'> 		(line_time &lt;&lt; DPG_PIPE_URGENCY_CONTROL__URGENCY_HIGH_WATERMARK__SHIFT)));</div><div class='ctx'> 	/* select wm B */</div><div class='ctx'> 	tmp = RREG32(mmDPG_PIPE_ARBITRATION_CONTROL3 + amdgpu_crtc-&gt;crtc_offset);</div><div class='del'>-	tmp &amp;= ~LATENCY_WATERMARK_MASK(3);</div><div class='del'>-	tmp |= LATENCY_WATERMARK_MASK(2);</div><div class='add'>+	tmp &amp;= ~(3 &lt;&lt; DPG_PIPE_ARBITRATION_CONTROL3__URGENCY_WATERMARK_MASK__SHIFT);</div><div class='add'>+	tmp |= (2 &lt;&lt; DPG_PIPE_ARBITRATION_CONTROL3__URGENCY_WATERMARK_MASK__SHIFT);</div><div class='ctx'> 	WREG32(mmDPG_PIPE_ARBITRATION_CONTROL3 + amdgpu_crtc-&gt;crtc_offset, tmp);</div><div class='ctx'> 	WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='ctx'> 	       ((latency_watermark_b &lt;&lt; DPG_PIPE_URGENCY_CONTROL__URGENCY_LOW_WATERMARK__SHIFT) |</div><div class='hunk'>@@ -1089,7 +1089,7 @@ static u32 dce_v6_0_line_buffer_adjust(struct amdgpu_device *adev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WREG32(mmDC_LB_MEMORY_SPLIT + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       DC_LB_MEMORY_CONFIG(tmp));</div><div class='add'>+	       (tmp &lt;&lt; DC_LB_MEMORY_SPLIT__DC_LB_MEMORY_CONFIG__SHIFT));</div><div class='ctx'> </div><div class='ctx'> 	WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset,</div><div class='ctx'> 	       (buffer_alloc &lt;&lt; PIPE0_DMIF_BUFFER_CONTROL__DMIF_BUFFERS_ALLOCATED__SHIFT));</div><div class='hunk'>@@ -1306,6 +1306,7 @@ static void dce_v6_0_audio_write_sad_regs(struct drm_encoder *encoder)</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='ctx'> 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);</div><div class='ctx'> 	struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder-&gt;enc_priv;</div><div class='add'>+	u32 offset;</div><div class='ctx'> 	struct drm_connector *connector;</div><div class='ctx'> 	struct drm_connector_list_iter iter;</div><div class='ctx'> 	struct amdgpu_connector *amdgpu_connector = NULL;</div><div class='hunk'>@@ -1327,6 +1328,11 @@ static void dce_v6_0_audio_write_sad_regs(struct drm_encoder *encoder)</div><div class='ctx'> 		{ ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO },</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (!dig || !dig-&gt;afmt || !dig-&gt;afmt-&gt;pin)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	offset = dig-&gt;afmt-&gt;pin-&gt;offset;</div><div class='add'>+</div><div class='ctx'> 	drm_connector_list_iter_begin(dev, &amp;iter);</div><div class='ctx'> 	drm_for_each_connector_iter(connector, &amp;iter) {</div><div class='ctx'> 		if (connector-&gt;encoder == encoder) {</div><div class='hunk'>@@ -1348,7 +1354,7 @@ static void dce_v6_0_audio_write_sad_regs(struct drm_encoder *encoder)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(eld_reg_to_type); i++) {</div><div class='del'>-		u32 tmp = 0;</div><div class='add'>+		u32 value = 0;</div><div class='ctx'> 		u8 stereo_freqs = 0;</div><div class='ctx'> 		int max_channels = -1;</div><div class='ctx'> 		int j;</div><div class='hunk'>@@ -1358,12 +1364,12 @@ static void dce_v6_0_audio_write_sad_regs(struct drm_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> 			if (sad-&gt;format == eld_reg_to_type[i][1]) {</div><div class='ctx'> 				if (sad-&gt;channels &gt; max_channels) {</div><div class='del'>-					tmp = REG_SET_FIELD(tmp, AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0,</div><div class='del'>-							MAX_CHANNELS, sad-&gt;channels);</div><div class='del'>-					tmp = REG_SET_FIELD(tmp, AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0,</div><div class='del'>-							DESCRIPTOR_BYTE_2, sad-&gt;byte2);</div><div class='del'>-					tmp = REG_SET_FIELD(tmp, AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0,</div><div class='del'>-							SUPPORTED_FREQUENCIES, sad-&gt;freq);</div><div class='add'>+					value = (sad-&gt;channels &lt;&lt;</div><div class='add'>+						AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0__MAX_CHANNELS__SHIFT) |</div><div class='add'>+					       (sad-&gt;byte2 &lt;&lt;</div><div class='add'>+						AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0__DESCRIPTOR_BYTE_2__SHIFT) |</div><div class='add'>+					       (sad-&gt;freq &lt;&lt;</div><div class='add'>+						AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0__SUPPORTED_FREQUENCIES__SHIFT);</div><div class='ctx'> 					max_channels = sad-&gt;channels;</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='hunk'>@@ -1374,13 +1380,13 @@ static void dce_v6_0_audio_write_sad_regs(struct drm_encoder *encoder)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		tmp = REG_SET_FIELD(tmp, AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0,</div><div class='del'>-				SUPPORTED_FREQUENCIES_STEREO, stereo_freqs);</div><div class='del'>-		WREG32_AUDIO_ENDPT(dig-&gt;afmt-&gt;pin-&gt;offset, eld_reg_to_type[i][0], tmp);</div><div class='add'>+		value |= (stereo_freqs &lt;&lt;</div><div class='add'>+			AZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0__SUPPORTED_FREQUENCIES_STEREO__SHIFT);</div><div class='add'>+</div><div class='add'>+		WREG32_AUDIO_ENDPT(offset, eld_reg_to_type[i][0], value);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(sads);</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dce_v6_0_audio_enable(struct amdgpu_device *adev,</div><div class='hunk'>@@ -1886,7 +1892,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 	struct amdgpu_bo *abo;</div><div class='ctx'> 	uint64_t fb_location, tiling_flags;</div><div class='ctx'> 	uint32_t fb_format, fb_pitch_pixels, pipe_config;</div><div class='del'>-	u32 fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_NONE);</div><div class='add'>+	u32 fb_swap = (GRPH_ENDIAN_NONE &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> 	u32 viewport_w, viewport_h;</div><div class='ctx'> 	int r;</div><div class='ctx'> 	bool bypass_lut = false;</div><div class='hunk'>@@ -1926,76 +1932,76 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,</div><div class='ctx'> </div><div class='ctx'> 	switch (target_fb-&gt;format-&gt;format) {</div><div class='ctx'> 	case DRM_FORMAT_C8:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_8BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_INDEXED));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_8BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_INDEXED &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_XRGB4444:</div><div class='ctx'> 	case DRM_FORMAT_ARGB4444:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_ARGB4444));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_16BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_ARGB4444 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN16);</div><div class='add'>+		fb_swap = (GRPH_ENDIAN_8IN16 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_XRGB1555:</div><div class='ctx'> 	case DRM_FORMAT_ARGB1555:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_ARGB1555));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_16BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_ARGB1555 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN16);</div><div class='add'>+		fb_swap = (GRPH_ENDIAN_8IN16 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_BGRX5551:</div><div class='ctx'> 	case DRM_FORMAT_BGRA5551:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_BGRA5551));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_16BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_BGRA5551 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN16);</div><div class='add'>+		fb_swap = (GRPH_ENDIAN_8IN16 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_RGB565:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_ARGB565));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_16BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_ARGB565 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN16);</div><div class='add'>+		fb_swap = (GRPH_ENDIAN_8IN16 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_XRGB8888:</div><div class='ctx'> 	case DRM_FORMAT_ARGB8888:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_ARGB8888));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_32BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_ARGB8888 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN32);</div><div class='add'>+		fb_swap = (GRPH_ENDIAN_8IN32 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_XRGB2101010:</div><div class='ctx'> 	case DRM_FORMAT_ARGB2101010:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_ARGB2101010));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_32BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_ARGB2101010 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN32);</div><div class='add'>+		fb_swap = (GRPH_ENDIAN_8IN32 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		/* Greater 8 bpc fb needs to bypass hw-lut to retain precision */</div><div class='ctx'> 		bypass_lut = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_BGRX1010102:</div><div class='ctx'> 	case DRM_FORMAT_BGRA1010102:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_BGRA1010102));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_32BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_BGRA1010102 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap = GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN32);</div><div class='add'>+		fb_swap = (GRPH_ENDIAN_8IN32 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		/* Greater 8 bpc fb needs to bypass hw-lut to retain precision */</div><div class='ctx'> 		bypass_lut = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DRM_FORMAT_XBGR8888:</div><div class='ctx'> 	case DRM_FORMAT_ABGR8888:</div><div class='del'>-		fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) |</div><div class='del'>-			     GRPH_FORMAT(GRPH_FORMAT_ARGB8888));</div><div class='del'>-		fb_swap = (GRPH_RED_CROSSBAR(GRPH_RED_SEL_B) |</div><div class='del'>-			   GRPH_BLUE_CROSSBAR(GRPH_BLUE_SEL_R));</div><div class='add'>+		fb_format = ((GRPH_DEPTH_32BPP &lt;&lt; GRPH_CONTROL__GRPH_DEPTH__SHIFT) |</div><div class='add'>+			     (GRPH_FORMAT_ARGB8888 &lt;&lt; GRPH_CONTROL__GRPH_FORMAT__SHIFT));</div><div class='add'>+		fb_swap = ((GRPH_RED_SEL_B &lt;&lt; GRPH_SWAP_CNTL__GRPH_RED_CROSSBAR__SHIFT) |</div><div class='add'>+			   (GRPH_BLUE_SEL_R &lt;&lt; GRPH_SWAP_CNTL__GRPH_BLUE_CROSSBAR__SHIFT));</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		fb_swap |= GRPH_ENDIAN_SWAP(GRPH_ENDIAN_8IN32);</div><div class='add'>+		fb_swap |= (GRPH_ENDIAN_8IN32 &lt;&lt; GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);</div><div class='ctx'> #endif</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2013,18 +2019,18 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 		tile_split = AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT);</div><div class='ctx'> 		num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS);</div><div class='ctx'> </div><div class='del'>-		fb_format |= GRPH_NUM_BANKS(num_banks);</div><div class='del'>-		fb_format |= GRPH_ARRAY_MODE(GRPH_ARRAY_2D_TILED_THIN1);</div><div class='del'>-		fb_format |= GRPH_TILE_SPLIT(tile_split);</div><div class='del'>-		fb_format |= GRPH_BANK_WIDTH(bankw);</div><div class='del'>-		fb_format |= GRPH_BANK_HEIGHT(bankh);</div><div class='del'>-		fb_format |= GRPH_MACRO_TILE_ASPECT(mtaspect);</div><div class='add'>+		fb_format |= (num_banks &lt;&lt; GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT);</div><div class='add'>+		fb_format |= (GRPH_ARRAY_2D_TILED_THIN1 &lt;&lt; GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT);</div><div class='add'>+		fb_format |= (tile_split &lt;&lt; GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT);</div><div class='add'>+		fb_format |= (bankw &lt;&lt; GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT);</div><div class='add'>+		fb_format |= (bankh &lt;&lt; GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT);</div><div class='add'>+		fb_format |= (mtaspect &lt;&lt; GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT);</div><div class='ctx'> 	} else if (AMDGPU_TILING_GET(tiling_flags, ARRAY_MODE) == ARRAY_1D_TILED_THIN1) {</div><div class='del'>-		fb_format |= GRPH_ARRAY_MODE(GRPH_ARRAY_1D_TILED_THIN1);</div><div class='add'>+		fb_format |= (GRPH_ARRAY_1D_TILED_THIN1 &lt;&lt; GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG);</div><div class='del'>-	fb_format |= GRPH_PIPE_CONFIG(pipe_config);</div><div class='add'>+	fb_format |= (pipe_config &lt;&lt; GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT);</div><div class='ctx'> </div><div class='ctx'> 	dce_v6_0_vga_enable(crtc, false);</div><div class='ctx'> </div><div class='hunk'>@@ -2040,7 +2046,7 @@ static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,</div><div class='ctx'> 	WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc-&gt;crtc_offset,</div><div class='ctx'> 	       (u32)fb_location &amp; GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK);</div><div class='ctx'> 	WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       (u32) fb_location &amp; GRPH_PRIMARY_SURFACE_ADDRESS__GRPH_PRIMARY_SURFACE_ADDRESS_MASK);</div><div class='add'>+	       (u32) fb_location &amp; GRPH_SECONDARY_SURFACE_ADDRESS__GRPH_SECONDARY_SURFACE_ADDRESS_MASK);</div><div class='ctx'> 	WREG32(mmGRPH_CONTROL + amdgpu_crtc-&gt;crtc_offset, fb_format);</div><div class='ctx'> 	WREG32(mmGRPH_SWAP_CNTL + amdgpu_crtc-&gt;crtc_offset, fb_swap);</div><div class='ctx'> </div><div class='hunk'>@@ -2108,14 +2114,13 @@ static void dce_v6_0_set_interleave(struct drm_crtc *crtc,</div><div class='ctx'> </div><div class='ctx'> 	if (mode-&gt;flags &amp; DRM_MODE_FLAG_INTERLACE)</div><div class='ctx'> 		WREG32(mmDATA_FORMAT + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-		       INTERLEAVE_EN);</div><div class='add'>+			DATA_FORMAT__INTERLEAVE_EN_MASK);</div><div class='ctx'> 	else</div><div class='ctx'> 		WREG32(mmDATA_FORMAT + amdgpu_crtc-&gt;crtc_offset, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> {</div><div class='del'>-</div><div class='ctx'> 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='hunk'>@@ -2125,15 +2130,15 @@ static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> 	DRM_DEBUG_KMS("%d\n", amdgpu_crtc-&gt;crtc_id);</div><div class='ctx'> </div><div class='ctx'> 	WREG32(mmINPUT_CSC_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       ((0 &lt;&lt; INPUT_CSC_CONTROL__INPUT_CSC_GRPH_MODE__SHIFT) |</div><div class='del'>-		(0 &lt;&lt; INPUT_CSC_CONTROL__INPUT_CSC_OVL_MODE__SHIFT)));</div><div class='add'>+	       ((INPUT_CSC_BYPASS &lt;&lt; INPUT_CSC_CONTROL__INPUT_CSC_GRPH_MODE__SHIFT) |</div><div class='add'>+		(INPUT_CSC_BYPASS &lt;&lt; INPUT_CSC_CONTROL__INPUT_CSC_OVL_MODE__SHIFT)));</div><div class='ctx'> 	WREG32(mmPRESCALE_GRPH_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='ctx'> 	       PRESCALE_GRPH_CONTROL__GRPH_PRESCALE_BYPASS_MASK);</div><div class='ctx'> 	WREG32(mmPRESCALE_OVL_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='ctx'> 	       PRESCALE_OVL_CONTROL__OVL_PRESCALE_BYPASS_MASK);</div><div class='ctx'> 	WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       ((0 &lt;&lt; INPUT_GAMMA_CONTROL__GRPH_INPUT_GAMMA_MODE__SHIFT) |</div><div class='del'>-		(0 &lt;&lt; INPUT_GAMMA_CONTROL__OVL_INPUT_GAMMA_MODE__SHIFT)));</div><div class='add'>+	       ((INPUT_GAMMA_USE_LUT &lt;&lt; INPUT_GAMMA_CONTROL__GRPH_INPUT_GAMMA_MODE__SHIFT) |</div><div class='add'>+		(INPUT_GAMMA_USE_LUT &lt;&lt; INPUT_GAMMA_CONTROL__OVL_INPUT_GAMMA_MODE__SHIFT)));</div><div class='ctx'> </div><div class='ctx'> 	WREG32(mmDC_LUT_CONTROL + amdgpu_crtc-&gt;crtc_offset, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -2160,19 +2165,19 @@ static void dce_v6_0_crtc_load_lut(struct drm_crtc *crtc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       ((0 &lt;&lt; DEGAMMA_CONTROL__GRPH_DEGAMMA_MODE__SHIFT) |</div><div class='del'>-		(0 &lt;&lt; DEGAMMA_CONTROL__OVL_DEGAMMA_MODE__SHIFT) |</div><div class='del'>-		ICON_DEGAMMA_MODE(0) |</div><div class='del'>-		(0 &lt;&lt; DEGAMMA_CONTROL__CURSOR_DEGAMMA_MODE__SHIFT)));</div><div class='add'>+	       ((DEGAMMA_BYPASS &lt;&lt; DEGAMMA_CONTROL__GRPH_DEGAMMA_MODE__SHIFT) |</div><div class='add'>+		(DEGAMMA_BYPASS &lt;&lt; DEGAMMA_CONTROL__OVL_DEGAMMA_MODE__SHIFT) |</div><div class='add'>+		(DEGAMMA_BYPASS &lt;&lt; DEGAMMA_CONTROL__ICON_DEGAMMA_MODE__SHIFT) |</div><div class='add'>+		(DEGAMMA_BYPASS &lt;&lt; DEGAMMA_CONTROL__CURSOR_DEGAMMA_MODE__SHIFT)));</div><div class='ctx'> 	WREG32(mmGAMUT_REMAP_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       ((0 &lt;&lt; GAMUT_REMAP_CONTROL__GRPH_GAMUT_REMAP_MODE__SHIFT) |</div><div class='del'>-		(0 &lt;&lt; GAMUT_REMAP_CONTROL__OVL_GAMUT_REMAP_MODE__SHIFT)));</div><div class='add'>+	       ((GAMUT_REMAP_BYPASS &lt;&lt; GAMUT_REMAP_CONTROL__GRPH_GAMUT_REMAP_MODE__SHIFT) |</div><div class='add'>+		(GAMUT_REMAP_BYPASS &lt;&lt; GAMUT_REMAP_CONTROL__OVL_GAMUT_REMAP_MODE__SHIFT)));</div><div class='ctx'> 	WREG32(mmREGAMMA_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       ((0 &lt;&lt; REGAMMA_CONTROL__GRPH_REGAMMA_MODE__SHIFT) |</div><div class='del'>-		(0 &lt;&lt; REGAMMA_CONTROL__OVL_REGAMMA_MODE__SHIFT)));</div><div class='add'>+	       ((REGAMMA_BYPASS &lt;&lt; REGAMMA_CONTROL__GRPH_REGAMMA_MODE__SHIFT) |</div><div class='add'>+		(REGAMMA_BYPASS &lt;&lt; REGAMMA_CONTROL__OVL_REGAMMA_MODE__SHIFT)));</div><div class='ctx'> 	WREG32(mmOUTPUT_CSC_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='del'>-	       ((0 &lt;&lt; OUTPUT_CSC_CONTROL__OUTPUT_CSC_GRPH_MODE__SHIFT) |</div><div class='del'>-		(0 &lt;&lt; OUTPUT_CSC_CONTROL__OUTPUT_CSC_OVL_MODE__SHIFT)));</div><div class='add'>+	       ((OUTPUT_CSC_BYPASS &lt;&lt; OUTPUT_CSC_CONTROL__OUTPUT_CSC_GRPH_MODE__SHIFT) |</div><div class='add'>+		(OUTPUT_CSC_BYPASS &lt;&lt; OUTPUT_CSC_CONTROL__OUTPUT_CSC_OVL_MODE__SHIFT)));</div><div class='ctx'> 	/* XXX match this to the depth of the crtc fmt block, move to modeset? */</div><div class='ctx'> 	WREG32(0x1a50 + amdgpu_crtc-&gt;crtc_offset, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -2267,8 +2272,6 @@ static void dce_v6_0_hide_cursor(struct drm_crtc *crtc)</div><div class='ctx'> 	WREG32(mmCUR_CONTROL + amdgpu_crtc-&gt;crtc_offset,</div><div class='ctx'> 	       (CURSOR_24_8_PRE_MULT &lt;&lt; CUR_CONTROL__CURSOR_MODE__SHIFT) |</div><div class='ctx'> 	       (CURSOR_URGENT_1_2 &lt;&lt; CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dce_v6_0_show_cursor(struct drm_crtc *crtc)</div><div class='hunk'>@@ -2285,7 +2288,6 @@ static void dce_v6_0_show_cursor(struct drm_crtc *crtc)</div><div class='ctx'> 	       CUR_CONTROL__CURSOR_EN_MASK |</div><div class='ctx'> 	       (CURSOR_24_8_PRE_MULT &lt;&lt; CUR_CONTROL__CURSOR_MODE__SHIFT) |</div><div class='ctx'> 	       (CURSOR_URGENT_1_2 &lt;&lt; CUR_CONTROL__CURSOR_URGENT_CONTROL__SHIFT));</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dce_v6_0_cursor_move_locked(struct drm_crtc *crtc,</div><div class='hunk'>@@ -2596,7 +2598,6 @@ static bool dce_v6_0_crtc_mode_fixup(struct drm_crtc *crtc,</div><div class='ctx'> 				     const struct drm_display_mode *mode,</div><div class='ctx'> 				     struct drm_display_mode *adjusted_mode)</div><div class='ctx'> {</div><div class='del'>-</div><div class='ctx'> 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);</div><div class='ctx'> 	struct drm_device *dev = crtc-&gt;dev;</div><div class='ctx'> 	struct drm_encoder *encoder;</div><div class='hunk'>@@ -2669,7 +2670,7 @@ static void dce_v6_0_panic_flush(struct drm_plane *plane)</div><div class='ctx'> </div><div class='ctx'> 	/* Disable DC tiling */</div><div class='ctx'> 	fb_format = RREG32(mmGRPH_CONTROL + amdgpu_crtc-&gt;crtc_offset);</div><div class='del'>-	fb_format &amp;= ~GRPH_ARRAY_MODE(0x7);</div><div class='add'>+	fb_format &amp;= ~GRPH_CONTROL__GRPH_ARRAY_MODE_MASK;</div><div class='ctx'> 	WREG32(mmGRPH_CONTROL + amdgpu_crtc-&gt;crtc_offset, fb_format);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -2745,7 +2746,6 @@ static int dce_v6_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> static int dce_v6_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	int r, i;</div><div class='del'>-	bool ret;</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;mode_info.num_crtc; i++) {</div><div class='hunk'>@@ -2789,8 +2789,7 @@ static int dce_v6_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = amdgpu_atombios_get_connector_info_from_object_table(adev);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (amdgpu_atombios_get_connector_info_from_object_table(adev))</div><div class='ctx'> 		amdgpu_display_print_display_setup(adev_to_drm(adev));</div><div class='ctx'> 	else</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -2986,12 +2985,12 @@ static void dce_v6_0_set_crtc_vblank_interrupt_state(struct amdgpu_device *adev,</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case AMDGPU_IRQ_STATE_DISABLE:</div><div class='ctx'> 		interrupt_mask = RREG32(mmINT_MASK + reg_block);</div><div class='del'>-		interrupt_mask &amp;= ~VBLANK_INT_MASK;</div><div class='add'>+		interrupt_mask &amp;= ~INT_MASK__VBLANK_INT_MASK;</div><div class='ctx'> 		WREG32(mmINT_MASK + reg_block, interrupt_mask);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_IRQ_STATE_ENABLE:</div><div class='ctx'> 		interrupt_mask = RREG32(mmINT_MASK + reg_block);</div><div class='del'>-		interrupt_mask |= VBLANK_INT_MASK;</div><div class='add'>+		interrupt_mask |= INT_MASK__VBLANK_INT_MASK;</div><div class='ctx'> 		WREG32(mmINT_MASK + reg_block, interrupt_mask);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3006,28 +3005,28 @@ static void dce_v6_0_set_crtc_vline_interrupt_state(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dce_v6_0_set_hpd_interrupt_state(struct amdgpu_device *adev,</div><div class='add'>+static int dce_v6_0_set_hpd_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 					    struct amdgpu_irq_src *src,</div><div class='del'>-					    unsigned type,</div><div class='add'>+					    unsigned hpd,</div><div class='ctx'> 					    enum amdgpu_interrupt_state state)</div><div class='ctx'> {</div><div class='ctx'> 	u32 dc_hpd_int_cntl;</div><div class='ctx'> </div><div class='del'>-	if (type &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", type);</div><div class='add'>+	if (hpd &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", hpd);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case AMDGPU_IRQ_STATE_DISABLE:</div><div class='del'>-		dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type]);</div><div class='del'>-		dc_hpd_int_cntl &amp;= ~DC_HPDx_INT_EN;</div><div class='del'>-		WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type], dc_hpd_int_cntl);</div><div class='add'>+		dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);</div><div class='add'>+		dc_hpd_int_cntl &amp;= ~DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK;</div><div class='add'>+		WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], dc_hpd_int_cntl);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AMDGPU_IRQ_STATE_ENABLE:</div><div class='del'>-		dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type]);</div><div class='del'>-		dc_hpd_int_cntl |= DC_HPDx_INT_EN;</div><div class='del'>-		WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type], dc_hpd_int_cntl);</div><div class='add'>+		dc_hpd_int_cntl = RREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd]);</div><div class='add'>+		dc_hpd_int_cntl |= DC_HPD1_INT_CONTROL__DC_HPD1_INT_EN_MASK;</div><div class='add'>+		WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], dc_hpd_int_cntl);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -3036,7 +3035,7 @@ static int dce_v6_0_set_hpd_interrupt_state(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dce_v6_0_set_crtc_interrupt_state(struct amdgpu_device *adev,</div><div class='add'>+static int dce_v6_0_set_crtc_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 					     struct amdgpu_irq_src *src,</div><div class='ctx'> 					     unsigned type,</div><div class='ctx'> 					     enum amdgpu_interrupt_state state)</div><div class='hunk'>@@ -3096,7 +3095,7 @@ static int dce_v6_0_crtc_irq(struct amdgpu_device *adev,</div><div class='ctx'> 	switch (entry-&gt;src_data[0]) {</div><div class='ctx'> 	case 0: /* vblank */</div><div class='ctx'> 		if (disp_int &amp; interrupt_status_offsets[crtc].vblank)</div><div class='del'>-			WREG32(mmVBLANK_STATUS + crtc_offsets[crtc], VBLANK_ACK);</div><div class='add'>+			WREG32(mmVBLANK_STATUS + crtc_offsets[crtc], VBLANK_STATUS__VBLANK_ACK_MASK);</div><div class='ctx'> 		else</div><div class='ctx'> 			DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");</div><div class='ctx'> </div><div class='hunk'>@@ -3107,7 +3106,7 @@ static int dce_v6_0_crtc_irq(struct amdgpu_device *adev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1: /* vline */</div><div class='ctx'> 		if (disp_int &amp; interrupt_status_offsets[crtc].vline)</div><div class='del'>-			WREG32(mmVLINE_STATUS + crtc_offsets[crtc], VLINE_ACK);</div><div class='add'>+			WREG32(mmVLINE_STATUS + crtc_offsets[crtc], VLINE_STATUS__VLINE_ACK_MASK);</div><div class='ctx'> 		else</div><div class='ctx'> 			DRM_DEBUG("IH: IH event w/o asserted irq bit?\n");</div><div class='ctx'> </div><div class='hunk'>@@ -3121,7 +3120,7 @@ static int dce_v6_0_crtc_irq(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dce_v6_0_set_pageflip_interrupt_state(struct amdgpu_device *adev,</div><div class='add'>+static int dce_v6_0_set_pageflip_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 						 struct amdgpu_irq_src *src,</div><div class='ctx'> 						 unsigned type,</div><div class='ctx'> 						 enum amdgpu_interrupt_state state)</div><div class='hunk'>@@ -3172,7 +3171,7 @@ static int dce_v6_0_pageflip_irq(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;adev_to_drm(adev)-&gt;event_lock, flags);</div><div class='ctx'> 	works = amdgpu_crtc-&gt;pflip_works;</div><div class='del'>-	if (amdgpu_crtc-&gt;pflip_status != AMDGPU_FLIP_SUBMITTED){</div><div class='add'>+	if (amdgpu_crtc-&gt;pflip_status != AMDGPU_FLIP_SUBMITTED) {</div><div class='ctx'> 		DRM_DEBUG_DRIVER("amdgpu_crtc-&gt;pflip_status = %d != "</div><div class='ctx'> 						"AMDGPU_FLIP_SUBMITTED(%d)\n",</div><div class='ctx'> 						amdgpu_crtc-&gt;pflip_status,</div><div class='hunk'>@@ -3249,12 +3248,10 @@ static const struct amd_ip_funcs dce_v6_0_ip_funcs = {</div><div class='ctx'> 	.set_powergating_state = dce_v6_0_set_powergating_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-dce_v6_0_encoder_mode_set(struct drm_encoder *encoder,</div><div class='add'>+static void dce_v6_0_encoder_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> 			  struct drm_display_mode *mode,</div><div class='ctx'> 			  struct drm_display_mode *adjusted_mode)</div><div class='ctx'> {</div><div class='del'>-</div><div class='ctx'> 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);</div><div class='ctx'> 	int em = amdgpu_atombios_encoder_get_encoder_mode(encoder);</div><div class='ctx'> </div><div class='hunk'>@@ -3274,7 +3271,6 @@ dce_v6_0_encoder_mode_set(struct drm_encoder *encoder,</div><div class='ctx'> </div><div class='ctx'> static void dce_v6_0_encoder_prepare(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(encoder-&gt;dev);</div><div class='ctx'> 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);</div><div class='ctx'> 	struct drm_connector *connector = amdgpu_get_connector_for_encoder(encoder);</div><div class='hunk'>@@ -3314,7 +3310,6 @@ static void dce_v6_0_encoder_prepare(struct drm_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> static void dce_v6_0_encoder_commit(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-</div><div class='ctx'> 	struct drm_device *dev = encoder-&gt;dev;</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -3325,7 +3320,6 @@ static void dce_v6_0_encoder_commit(struct drm_encoder *encoder)</div><div class='ctx'> </div><div class='ctx'> static void dce_v6_0_encoder_disable(struct drm_encoder *encoder)</div><div class='ctx'> {</div><div class='del'>-</div><div class='ctx'> 	struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);</div><div class='ctx'> 	struct amdgpu_encoder_atom_dig *dig;</div><div class='ctx'> 	int em = amdgpu_atombios_encoder_get_encoder_mode(encoder);</div><div class='hunk'>@@ -3541,17 +3535,17 @@ static void dce_v6_0_set_display_funcs(struct amdgpu_device *adev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_irq_src_funcs dce_v6_0_crtc_irq_funcs = {</div><div class='del'>-	.set = dce_v6_0_set_crtc_interrupt_state,</div><div class='add'>+	.set = dce_v6_0_set_crtc_irq_state,</div><div class='ctx'> 	.process = dce_v6_0_crtc_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_irq_src_funcs dce_v6_0_pageflip_irq_funcs = {</div><div class='del'>-	.set = dce_v6_0_set_pageflip_interrupt_state,</div><div class='add'>+	.set = dce_v6_0_set_pageflip_irq_state,</div><div class='ctx'> 	.process = dce_v6_0_pageflip_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_irq_src_funcs dce_v6_0_hpd_irq_funcs = {</div><div class='del'>-	.set = dce_v6_0_set_hpd_interrupt_state,</div><div class='add'>+	.set = dce_v6_0_set_hpd_irq_state,</div><div class='ctx'> 	.process = dce_v6_0_hpd_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c<br/>index 07358546581f..e62ccf9eb73d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/dce_v8_0.c</a></div><div class='hunk'>@@ -271,7 +271,7 @@ static void dce_v8_0_hpd_int_ack(struct amdgpu_device *adev,</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (hpd &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", hpd);</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", hpd);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3021,7 +3021,7 @@ static void dce_v8_0_set_crtc_vline_interrupt_state(struct amdgpu_device *adev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dce_v8_0_set_hpd_interrupt_state(struct amdgpu_device *adev,</div><div class='add'>+static int dce_v8_0_set_hpd_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 					    struct amdgpu_irq_src *src,</div><div class='ctx'> 					    unsigned type,</div><div class='ctx'> 					    enum amdgpu_interrupt_state state)</div><div class='hunk'>@@ -3029,7 +3029,7 @@ static int dce_v8_0_set_hpd_interrupt_state(struct amdgpu_device *adev,</div><div class='ctx'> 	u32 dc_hpd_int_cntl;</div><div class='ctx'> </div><div class='ctx'> 	if (type &gt;= adev-&gt;mode_info.num_hpd) {</div><div class='del'>-		DRM_DEBUG("invalid hdp %d\n", type);</div><div class='add'>+		DRM_DEBUG("invalid hpd %d\n", type);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3051,7 +3051,7 @@ static int dce_v8_0_set_hpd_interrupt_state(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dce_v8_0_set_crtc_interrupt_state(struct amdgpu_device *adev,</div><div class='add'>+static int dce_v8_0_set_crtc_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 					     struct amdgpu_irq_src *src,</div><div class='ctx'> 					     unsigned type,</div><div class='ctx'> 					     enum amdgpu_interrupt_state state)</div><div class='hunk'>@@ -3136,7 +3136,7 @@ static int dce_v8_0_crtc_irq(struct amdgpu_device *adev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dce_v8_0_set_pageflip_interrupt_state(struct amdgpu_device *adev,</div><div class='add'>+static int dce_v8_0_set_pageflip_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 						 struct amdgpu_irq_src *src,</div><div class='ctx'> 						 unsigned type,</div><div class='ctx'> 						 enum amdgpu_interrupt_state state)</div><div class='hunk'>@@ -3547,17 +3547,17 @@ static void dce_v8_0_set_display_funcs(struct amdgpu_device *adev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_irq_src_funcs dce_v8_0_crtc_irq_funcs = {</div><div class='del'>-	.set = dce_v8_0_set_crtc_interrupt_state,</div><div class='add'>+	.set = dce_v8_0_set_crtc_irq_state,</div><div class='ctx'> 	.process = dce_v8_0_crtc_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_irq_src_funcs dce_v8_0_pageflip_irq_funcs = {</div><div class='del'>-	.set = dce_v8_0_set_pageflip_interrupt_state,</div><div class='add'>+	.set = dce_v8_0_set_pageflip_irq_state,</div><div class='ctx'> 	.process = dce_v8_0_pageflip_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_irq_src_funcs dce_v8_0_hpd_irq_funcs = {</div><div class='del'>-	.set = dce_v8_0_set_hpd_interrupt_state,</div><div class='add'>+	.set = dce_v8_0_set_hpd_irq_state,</div><div class='ctx'> 	.process = dce_v8_0_hpd_irq,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br/>index a63ce747863f..75ea071744eb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c</a></div><div class='hunk'>@@ -368,11 +368,6 @@ static const struct amdgpu_hwip_reg_entry gc_reg_list_10_1[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_DEBUG_INST_ADDR),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_LX6_CORE_PDEBUG_INST),</div><div class='ctx'> 	/* cp header registers */</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME2_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MES_HEADER_DUMP),</div><div class='ctx'> 	/* SE status registers */</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE0),</div><div class='hunk'>@@ -421,7 +416,16 @@ static const struct amdgpu_hwip_reg_entry gc_cp_reg_list_10[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_SUSPEND_CNTL_STACK_OFFSET),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_SUSPEND_CNTL_STACK_DW_CNT),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_SUSPEND_WG_STATE_OFFSET),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_DEQUEUE_STATUS)</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_DEQUEUE_STATUS),</div><div class='add'>+	/* cp header registers */</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_hwip_reg_entry gc_gfx_queue_reg_list_10[] = {</div><div class='hunk'>@@ -448,7 +452,32 @@ static const struct amdgpu_hwip_reg_entry gc_gfx_queue_reg_list_10[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_MQD_BASE_ADDR),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_GFX_MQD_BASE_ADDR_HI),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI)</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI),</div><div class='add'>+	/* gfx header registers */</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct soc15_reg_golden golden_settings_gc_10_1[] = {</div><div class='hunk'>@@ -4296,9 +4325,7 @@ static u32 gfx_v10_0_get_csb_size(struct amdgpu_device *adev)</div><div class='ctx'> static void gfx_v10_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 				    volatile u32 *buffer)</div><div class='ctx'> {</div><div class='del'>-	u32 count = 0, i;</div><div class='del'>-	const struct cs_section_def *sect = NULL;</div><div class='del'>-	const struct cs_extent_def *ext = NULL;</div><div class='add'>+	u32 count = 0;</div><div class='ctx'> 	int ctx_reg_offset;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;gfx.rlc.cs_data == NULL)</div><div class='hunk'>@@ -4306,39 +4333,15 @@ static void gfx_v10_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 	if (buffer == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);</div><div class='add'>+	count = amdgpu_gfx_csb_preamble_start(buffer);</div><div class='add'>+	count = amdgpu_gfx_csb_data_parser(adev, buffer, count);</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-</div><div class='del'>-	for (sect = adev-&gt;gfx.rlc.cs_data; sect-&gt;section != NULL; ++sect) {</div><div class='del'>-		for (ext = sect-&gt;section; ext-&gt;extent != NULL; ++ext) {</div><div class='del'>-			if (sect-&gt;id == SECT_CONTEXT) {</div><div class='del'>-				buffer[count++] =</div><div class='del'>-					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext-&gt;reg_count));</div><div class='del'>-				buffer[count++] = cpu_to_le32(ext-&gt;reg_index -</div><div class='del'>-						PACKET3_SET_CONTEXT_REG_START);</div><div class='del'>-				for (i = 0; i &lt; ext-&gt;reg_count; i++)</div><div class='del'>-					buffer[count++] = cpu_to_le32(ext-&gt;extent[i]);</div><div class='del'>-			} else {</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ctx_reg_offset =</div><div class='del'>-		SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;</div><div class='add'>+	ctx_reg_offset = SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(ctx_reg_offset);</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(adev-&gt;gfx.config.pa_sc_tile_steering_override);</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0);</div><div class='add'>+	amdgpu_gfx_csb_preamble_end(buffer, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v10_0_rlc_fini(struct amdgpu_device *adev)</div><div class='hunk'>@@ -4752,6 +4755,7 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	int i, j, k, r, ring_id = 0;</div><div class='ctx'> 	int xcc_id = 0;</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='add'>+	int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;adev-&gt;gfx.idle_work, amdgpu_gfx_profile_idle_work_handler);</div><div class='ctx'> </div><div class='hunk'>@@ -4763,7 +4767,7 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	case IP_VERSION(10, 1, 4):</div><div class='ctx'> 		adev-&gt;gfx.me.num_me = 1;</div><div class='ctx'> 		adev-&gt;gfx.me.num_pipe_per_me = 1;</div><div class='del'>-		adev-&gt;gfx.me.num_queue_per_pipe = 1;</div><div class='add'>+		adev-&gt;gfx.me.num_queue_per_pipe = 8;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_mec = 2;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_pipe_per_mec = 4;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_queue_per_pipe = 8;</div><div class='hunk'>@@ -4778,7 +4782,7 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	case IP_VERSION(10, 3, 7):</div><div class='ctx'> 		adev-&gt;gfx.me.num_me = 1;</div><div class='ctx'> 		adev-&gt;gfx.me.num_pipe_per_me = 2;</div><div class='del'>-		adev-&gt;gfx.me.num_queue_per_pipe = 1;</div><div class='add'>+		adev-&gt;gfx.me.num_queue_per_pipe = 2;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_mec = 2;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_pipe_per_mec = 4;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_queue_per_pipe = 4;</div><div class='hunk'>@@ -4800,7 +4804,7 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		adev-&gt;gfx.cleaner_shader_size = sizeof(gfx_10_1_10_cleaner_shader_hex);</div><div class='ctx'> 		if (adev-&gt;gfx.me_fw_version &gt;= 101 &amp;&amp;</div><div class='ctx'> 		    adev-&gt;gfx.pfp_fw_version  &gt;= 158 &amp;&amp;</div><div class='del'>-		    adev-&gt;gfx.mec_fw_version &gt;= 152) {</div><div class='add'>+		    adev-&gt;gfx.mec_fw_version &gt;= 151) {</div><div class='ctx'> 			adev-&gt;gfx.enable_cleaner_shader = true;</div><div class='ctx'> 			r = amdgpu_gfx_cleaner_shader_sw_init(adev, adev-&gt;gfx.cleaner_shader_size);</div><div class='ctx'> 			if (r) {</div><div class='hunk'>@@ -4810,7 +4814,9 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IP_VERSION(10, 3, 0):</div><div class='add'>+	case IP_VERSION(10, 3, 1):</div><div class='ctx'> 	case IP_VERSION(10, 3, 2):</div><div class='add'>+	case IP_VERSION(10, 3, 3):</div><div class='ctx'> 	case IP_VERSION(10, 3, 4):</div><div class='ctx'> 	case IP_VERSION(10, 3, 5):</div><div class='ctx'> 		adev-&gt;gfx.cleaner_shader_ptr = gfx_10_3_0_cleaner_shader_hex;</div><div class='hunk'>@@ -4826,6 +4832,34 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case IP_VERSION(10, 3, 6):</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_ptr = gfx_10_3_0_cleaner_shader_hex;</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_size = sizeof(gfx_10_3_0_cleaner_shader_hex);</div><div class='add'>+		if (adev-&gt;gfx.me_fw_version &gt;= 14 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.pfp_fw_version &gt;= 17 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.mec_fw_version &gt;= 24) {</div><div class='add'>+			adev-&gt;gfx.enable_cleaner_shader = true;</div><div class='add'>+			r = amdgpu_gfx_cleaner_shader_sw_init(adev, adev-&gt;gfx.cleaner_shader_size);</div><div class='add'>+			if (r) {</div><div class='add'>+				adev-&gt;gfx.enable_cleaner_shader = false;</div><div class='add'>+				dev_err(adev-&gt;dev, "Failed to initialize cleaner shader\n");</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case IP_VERSION(10, 3, 7):</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_ptr = gfx_10_3_0_cleaner_shader_hex;</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_size = sizeof(gfx_10_3_0_cleaner_shader_hex);</div><div class='add'>+		if (adev-&gt;gfx.me_fw_version &gt;= 4 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.pfp_fw_version &gt;= 9 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.mec_fw_version &gt;= 12) {</div><div class='add'>+			adev-&gt;gfx.enable_cleaner_shader = true;</div><div class='add'>+			r = amdgpu_gfx_cleaner_shader_sw_init(adev, adev-&gt;gfx.cleaner_shader_size);</div><div class='add'>+			if (r) {</div><div class='add'>+				adev-&gt;gfx.enable_cleaner_shader = false;</div><div class='add'>+				dev_err(adev-&gt;dev, "Failed to initialize cleaner shader\n");</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		adev-&gt;gfx.enable_cleaner_shader = false;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -4886,7 +4920,7 @@ static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 	/* set up the gfx ring */</div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;gfx.me.num_me; i++) {</div><div class='del'>-		for (j = 0; j &lt; adev-&gt;gfx.me.num_queue_per_pipe; j++) {</div><div class='add'>+		for (j = 0; j &lt; num_queue_per_pipe; j++) {</div><div class='ctx'> 			for (k = 0; k &lt; adev-&gt;gfx.me.num_pipe_per_me; k++) {</div><div class='ctx'> 				if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))</div><div class='ctx'> 					continue;</div><div class='hunk'>@@ -6114,7 +6148,7 @@ static int gfx_v10_0_cp_gfx_load_pfp_microcode(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32_SOC15(GC, 0, mmCP_PFP_IC_BASE_CNTL);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID, 0);</div><div class='hunk'>@@ -6192,7 +6226,7 @@ static int gfx_v10_0_cp_gfx_load_ce_microcode(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_BASE_CNTL);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_CE_IC_BASE_CNTL, VMID, 0);</div><div class='hunk'>@@ -6269,7 +6303,7 @@ static int gfx_v10_0_cp_gfx_load_me_microcode(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32_SOC15(GC, 0, mmCP_ME_IC_BASE_CNTL);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_ME_IC_BASE_CNTL, VMID, 0);</div><div class='hunk'>@@ -6644,7 +6678,7 @@ static int gfx_v10_0_cp_compute_load_microcode(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, CACHE_POLICY, 0);</div><div class='hunk'>@@ -9645,9 +9679,14 @@ static void gfx_v10_ip_print(struct amdgpu_ip_block *ip_block, struct drm_printe</div><div class='ctx'> 			for (k = 0; k &lt; adev-&gt;gfx.mec.num_queue_per_pipe; k++) {</div><div class='ctx'> 				drm_printf(p, "\nmec %d, pipe %d, queue %d\n", i, j, k);</div><div class='ctx'> 				for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-					drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='del'>-						   gc_cp_reg_list_10[reg].reg_name,</div><div class='del'>-						   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='add'>+					if (i &amp;&amp; gc_cp_reg_list_10[reg].reg_offset == mmCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+						drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='add'>+							   "mmCP_MEC_ME2_HEADER_DUMP",</div><div class='add'>+							   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='add'>+					else</div><div class='add'>+						drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='add'>+							   gc_cp_reg_list_10[reg].reg_name,</div><div class='add'>+							   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='ctx'> 				}</div><div class='ctx'> 				index += reg_count;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -9708,9 +9747,13 @@ static void gfx_v10_ip_dump(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 				nv_grbm_select(adev, adev-&gt;gfx.me.num_me + i, j, k, 0);</div><div class='ctx'> </div><div class='ctx'> 				for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-					adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='del'>-						RREG32(SOC15_REG_ENTRY_OFFSET(</div><div class='del'>-							gc_cp_reg_list_10[reg]));</div><div class='add'>+					if (i &amp;&amp; gc_cp_reg_list_10[reg].reg_offset == mmCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+						adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='add'>+							RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME2_HEADER_DUMP));</div><div class='add'>+					else</div><div class='add'>+						adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='add'>+							RREG32(SOC15_REG_ENTRY_OFFSET(</div><div class='add'>+								       gc_cp_reg_list_10[reg]));</div><div class='ctx'> 				}</div><div class='ctx'> 				index += reg_count;</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c<br/>index d57db42f9536..afd6d59164bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c</a></div><div class='hunk'>@@ -48,6 +48,8 @@</div><div class='ctx'> #include "gfx_v11_0_3.h"</div><div class='ctx'> #include "nbio_v4_3.h"</div><div class='ctx'> #include "mes_v11_0.h"</div><div class='add'>+#include "mes_userqueue.h"</div><div class='add'>+#include "amdgpu_userq_fence.h"</div><div class='ctx'> </div><div class='ctx'> #define GFX11_NUM_GFX_RINGS		1</div><div class='ctx'> #define GFX11_MEC_HPD_SIZE	2048</div><div class='hunk'>@@ -177,9 +179,13 @@ static const struct amdgpu_hwip_reg_entry gc_reg_list_11_0[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_INSTR_PNTR),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_CPC_STATUS),</div><div class='ctx'> 	/* cp header registers */</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='ctx'> 	/* SE status registers */</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE0),</div><div class='hunk'>@@ -230,7 +236,16 @@ static const struct amdgpu_hwip_reg_entry gc_cp_reg_list_11[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_OFFSET),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_DW_CNT),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_WG_STATE_OFFSET),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_STATUS)</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_STATUS),</div><div class='add'>+	/* cp header registers */</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_hwip_reg_entry gc_gfx_queue_reg_list_11[] = {</div><div class='hunk'>@@ -259,7 +274,24 @@ static const struct amdgpu_hwip_reg_entry gc_gfx_queue_reg_list_11[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_LO),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_HI),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_CMD_BUFSZ),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ)</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ),</div><div class='add'>+	/* cp header registers */</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct soc15_reg_golden golden_settings_gc_11_0[] = {</div><div class='hunk'>@@ -580,33 +612,18 @@ static int gfx_v11_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;ib, 0, sizeof(ib));</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t padding, offset;</div><div class='del'>-</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring, AMDGPU_MES_CTX_IB_OFFS);</div><div class='del'>-		padding = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-						  AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-</div><div class='del'>-		ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ib.ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, padding);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, padding);</div><div class='del'>-		*cpu_ptr = cpu_to_le32(0xCAFEDEAD);</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r)</div><div class='del'>-			return r;</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='ctx'> </div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(0xCAFEDEAD);</div><div class='del'>-		cpu_ptr = &amp;adev-&gt;wb.wb[index];</div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(0xCAFEDEAD);</div><div class='add'>+	cpu_ptr = &amp;adev-&gt;wb.wb[index];</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='del'>-		if (r) {</div><div class='del'>-			DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='del'>-			goto err1;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='add'>+		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);</div><div class='hunk'>@@ -633,12 +650,10 @@ static int gfx_v11_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 	else</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> err2:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_ib_free(&amp;ib, NULL);</div><div class='add'>+	amdgpu_ib_free(&amp;ib, NULL);</div><div class='ctx'> 	dma_fence_put(f);</div><div class='ctx'> err1:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -833,9 +848,7 @@ static u32 gfx_v11_0_get_csb_size(struct amdgpu_device *adev)</div><div class='ctx'> static void gfx_v11_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 				    volatile u32 *buffer)</div><div class='ctx'> {</div><div class='del'>-	u32 count = 0, i;</div><div class='del'>-	const struct cs_section_def *sect = NULL;</div><div class='del'>-	const struct cs_extent_def *ext = NULL;</div><div class='add'>+	u32 count = 0;</div><div class='ctx'> 	int ctx_reg_offset;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;gfx.rlc.cs_data == NULL)</div><div class='hunk'>@@ -843,39 +856,15 @@ static void gfx_v11_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 	if (buffer == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-</div><div class='del'>-	for (sect = adev-&gt;gfx.rlc.cs_data; sect-&gt;section != NULL; ++sect) {</div><div class='del'>-		for (ext = sect-&gt;section; ext-&gt;extent != NULL; ++ext) {</div><div class='del'>-			if (sect-&gt;id == SECT_CONTEXT) {</div><div class='del'>-				buffer[count++] =</div><div class='del'>-					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext-&gt;reg_count));</div><div class='del'>-				buffer[count++] = cpu_to_le32(ext-&gt;reg_index -</div><div class='del'>-						PACKET3_SET_CONTEXT_REG_START);</div><div class='del'>-				for (i = 0; i &lt; ext-&gt;reg_count; i++)</div><div class='del'>-					buffer[count++] = cpu_to_le32(ext-&gt;extent[i]);</div><div class='del'>-			} else {</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	count = amdgpu_gfx_csb_preamble_start(buffer);</div><div class='add'>+	count = amdgpu_gfx_csb_data_parser(adev, buffer, count);</div><div class='ctx'> </div><div class='del'>-	ctx_reg_offset =</div><div class='del'>-		SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;</div><div class='add'>+	ctx_reg_offset = SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START;</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(ctx_reg_offset);</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(adev-&gt;gfx.config.pa_sc_tile_steering_override);</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0);</div><div class='add'>+	amdgpu_gfx_csb_preamble_end(buffer, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v11_0_rlc_fini(struct amdgpu_device *adev)</div><div class='hunk'>@@ -1056,14 +1045,21 @@ static void gfx_v11_0_select_me_pipe_q(struct amdgpu_device *adev,</div><div class='ctx'> #define MQD_FWWORKAREA_SIZE       484</div><div class='ctx'> #define MQD_FWWORKAREA_ALIGNMENT  256</div><div class='ctx'> </div><div class='del'>-static int gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device *adev,</div><div class='add'>+static void gfx_v11_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev,</div><div class='ctx'> 					 struct amdgpu_gfx_shadow_info *shadow_info)</div><div class='ctx'> {</div><div class='del'>-	if (adev-&gt;gfx.cp_gfx_shadow) {</div><div class='del'>-		shadow_info-&gt;shadow_size = MQD_SHADOW_BASE_SIZE;</div><div class='del'>-		shadow_info-&gt;shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;</div><div class='del'>-		shadow_info-&gt;csa_size = MQD_FWWORKAREA_SIZE;</div><div class='del'>-		shadow_info-&gt;csa_alignment = MQD_FWWORKAREA_ALIGNMENT;</div><div class='add'>+	shadow_info-&gt;shadow_size = MQD_SHADOW_BASE_SIZE;</div><div class='add'>+	shadow_info-&gt;shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;</div><div class='add'>+	shadow_info-&gt;csa_size = MQD_FWWORKAREA_SIZE;</div><div class='add'>+	shadow_info-&gt;csa_alignment = MQD_FWWORKAREA_ALIGNMENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device *adev,</div><div class='add'>+					 struct amdgpu_gfx_shadow_info *shadow_info,</div><div class='add'>+					 bool skip_check)</div><div class='add'>+{</div><div class='add'>+	if (adev-&gt;gfx.cp_gfx_shadow || skip_check) {</div><div class='add'>+		gfx_v11_0_get_gfx_shadow_info_nocheck(adev, shadow_info);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		memset(shadow_info, 0, sizeof(struct amdgpu_gfx_shadow_info));</div><div class='hunk'>@@ -1136,6 +1132,10 @@ static int gfx_v11_0_gfx_ring_init(struct amdgpu_device *adev, int ring_id,</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;ring_obj = NULL;</div><div class='ctx'> 	ring-&gt;use_doorbell = true;</div><div class='add'>+	if (adev-&gt;gfx.disable_kq) {</div><div class='add'>+		ring-&gt;no_scheduler = true;</div><div class='add'>+		ring-&gt;no_user_submission = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!ring_id)</div><div class='ctx'> 		ring-&gt;doorbell_index = adev-&gt;doorbell_index.gfx_ring0 &lt;&lt; 1;</div><div class='hunk'>@@ -1568,24 +1568,18 @@ static void gfx_v11_0_alloc_ip_dump(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='del'>-	int i, j, k, r, ring_id = 0;</div><div class='add'>+	int i, j, k, r, ring_id;</div><div class='ctx'> 	int xcc_id = 0;</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='add'>+	int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;adev-&gt;gfx.idle_work, amdgpu_gfx_profile_idle_work_handler);</div><div class='ctx'> </div><div class='ctx'> 	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {</div><div class='ctx'> 	case IP_VERSION(11, 0, 0):</div><div class='add'>+	case IP_VERSION(11, 0, 1):</div><div class='ctx'> 	case IP_VERSION(11, 0, 2):</div><div class='ctx'> 	case IP_VERSION(11, 0, 3):</div><div class='del'>-		adev-&gt;gfx.me.num_me = 1;</div><div class='del'>-		adev-&gt;gfx.me.num_pipe_per_me = 1;</div><div class='del'>-		adev-&gt;gfx.me.num_queue_per_pipe = 1;</div><div class='del'>-		adev-&gt;gfx.mec.num_mec = 1;</div><div class='del'>-		adev-&gt;gfx.mec.num_pipe_per_mec = 4;</div><div class='del'>-		adev-&gt;gfx.mec.num_queue_per_pipe = 4;</div><div class='del'>-		break;</div><div class='del'>-	case IP_VERSION(11, 0, 1):</div><div class='ctx'> 	case IP_VERSION(11, 0, 4):</div><div class='ctx'> 	case IP_VERSION(11, 5, 0):</div><div class='ctx'> 	case IP_VERSION(11, 5, 1):</div><div class='hunk'>@@ -1593,7 +1587,7 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	case IP_VERSION(11, 5, 3):</div><div class='ctx'> 		adev-&gt;gfx.me.num_me = 1;</div><div class='ctx'> 		adev-&gt;gfx.me.num_pipe_per_me = 1;</div><div class='del'>-		adev-&gt;gfx.me.num_queue_per_pipe = 1;</div><div class='add'>+		adev-&gt;gfx.me.num_queue_per_pipe = 2;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_mec = 1;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_pipe_per_mec = 4;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_queue_per_pipe = 4;</div><div class='hunk'>@@ -1612,6 +1606,35 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	case IP_VERSION(11, 0, 0):</div><div class='ctx'> 	case IP_VERSION(11, 0, 2):</div><div class='ctx'> 	case IP_VERSION(11, 0, 3):</div><div class='add'>+		if (!adev-&gt;gfx.disable_uq &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.me_fw_version  &gt;= 2390 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.pfp_fw_version &gt;= 2530 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.mec_fw_version &gt;= 2600 &amp;&amp;</div><div class='add'>+		    adev-&gt;mes.fw_version[0] &gt;= 120) {</div><div class='add'>+			adev-&gt;userq_funcs[AMDGPU_HW_IP_GFX] = &amp;userq_mes_funcs;</div><div class='add'>+			adev-&gt;userq_funcs[AMDGPU_HW_IP_COMPUTE] = &amp;userq_mes_funcs;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case IP_VERSION(11, 0, 1):</div><div class='add'>+	case IP_VERSION(11, 0, 4):</div><div class='add'>+	case IP_VERSION(11, 5, 0):</div><div class='add'>+	case IP_VERSION(11, 5, 1):</div><div class='add'>+	case IP_VERSION(11, 5, 2):</div><div class='add'>+	case IP_VERSION(11, 5, 3):</div><div class='add'>+		/* add firmware version checks here */</div><div class='add'>+		if (0 &amp;&amp; !adev-&gt;gfx.disable_uq) {</div><div class='add'>+			adev-&gt;userq_funcs[AMDGPU_HW_IP_GFX] = &amp;userq_mes_funcs;</div><div class='add'>+			adev-&gt;userq_funcs[AMDGPU_HW_IP_COMPUTE] = &amp;userq_mes_funcs;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {</div><div class='add'>+	case IP_VERSION(11, 0, 0):</div><div class='add'>+	case IP_VERSION(11, 0, 2):</div><div class='add'>+	case IP_VERSION(11, 0, 3):</div><div class='ctx'> 		adev-&gt;gfx.cleaner_shader_ptr = gfx_11_0_3_cleaner_shader_hex;</div><div class='ctx'> 		adev-&gt;gfx.cleaner_shader_size = sizeof(gfx_11_0_3_cleaner_shader_hex);</div><div class='ctx'> 		if (adev-&gt;gfx.me_fw_version  &gt;= 2280 &amp;&amp;</div><div class='hunk'>@@ -1640,6 +1663,34 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case IP_VERSION(11, 5, 2):</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_ptr = gfx_11_0_3_cleaner_shader_hex;</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_size = sizeof(gfx_11_0_3_cleaner_shader_hex);</div><div class='add'>+		if (adev-&gt;gfx.me_fw_version  &gt;= 12 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.pfp_fw_version &gt;= 15 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.mec_fw_version &gt;= 15) {</div><div class='add'>+			adev-&gt;gfx.enable_cleaner_shader = true;</div><div class='add'>+			r = amdgpu_gfx_cleaner_shader_sw_init(adev, adev-&gt;gfx.cleaner_shader_size);</div><div class='add'>+			if (r) {</div><div class='add'>+				adev-&gt;gfx.enable_cleaner_shader = false;</div><div class='add'>+				dev_err(adev-&gt;dev, "Failed to initialize cleaner shader\n");</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case IP_VERSION(11, 5, 3):</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_ptr = gfx_11_0_3_cleaner_shader_hex;</div><div class='add'>+		adev-&gt;gfx.cleaner_shader_size = sizeof(gfx_11_0_3_cleaner_shader_hex);</div><div class='add'>+		if (adev-&gt;gfx.me_fw_version  &gt;= 7 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.pfp_fw_version &gt;= 8 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.mec_fw_version &gt;= 8) {</div><div class='add'>+			adev-&gt;gfx.enable_cleaner_shader = true;</div><div class='add'>+			r = amdgpu_gfx_cleaner_shader_sw_init(adev, adev-&gt;gfx.cleaner_shader_size);</div><div class='add'>+			if (r) {</div><div class='add'>+				adev-&gt;gfx.enable_cleaner_shader = false;</div><div class='add'>+				dev_err(adev-&gt;dev, "Failed to initialize cleaner shader\n");</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		adev-&gt;gfx.enable_cleaner_shader = false;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1701,37 +1752,42 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* set up the gfx ring */</div><div class='del'>-	for (i = 0; i &lt; adev-&gt;gfx.me.num_me; i++) {</div><div class='del'>-		for (j = 0; j &lt; adev-&gt;gfx.me.num_queue_per_pipe; j++) {</div><div class='del'>-			for (k = 0; k &lt; adev-&gt;gfx.me.num_pipe_per_me; k++) {</div><div class='del'>-				if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))</div><div class='del'>-					continue;</div><div class='del'>-</div><div class='del'>-				r = gfx_v11_0_gfx_ring_init(adev, ring_id,</div><div class='del'>-							    i, k, j);</div><div class='del'>-				if (r)</div><div class='del'>-					return r;</div><div class='del'>-				ring_id++;</div><div class='add'>+	if (adev-&gt;gfx.num_gfx_rings) {</div><div class='add'>+		ring_id = 0;</div><div class='add'>+		/* set up the gfx ring */</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;gfx.me.num_me; i++) {</div><div class='add'>+			for (j = 0; j &lt; num_queue_per_pipe; j++) {</div><div class='add'>+				for (k = 0; k &lt; adev-&gt;gfx.me.num_pipe_per_me; k++) {</div><div class='add'>+					if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))</div><div class='add'>+						continue;</div><div class='add'>+</div><div class='add'>+					r = gfx_v11_0_gfx_ring_init(adev, ring_id,</div><div class='add'>+								    i, k, j);</div><div class='add'>+					if (r)</div><div class='add'>+						return r;</div><div class='add'>+					ring_id++;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ring_id = 0;</div><div class='del'>-	/* set up the compute queues - allocate horizontally across pipes */</div><div class='del'>-	for (i = 0; i &lt; adev-&gt;gfx.mec.num_mec; ++i) {</div><div class='del'>-		for (j = 0; j &lt; adev-&gt;gfx.mec.num_queue_per_pipe; j++) {</div><div class='del'>-			for (k = 0; k &lt; adev-&gt;gfx.mec.num_pipe_per_mec; k++) {</div><div class='del'>-				if (!amdgpu_gfx_is_mec_queue_enabled(adev, 0, i,</div><div class='del'>-								     k, j))</div><div class='del'>-					continue;</div><div class='add'>+	if (adev-&gt;gfx.num_compute_rings) {</div><div class='add'>+		ring_id = 0;</div><div class='add'>+		/* set up the compute queues - allocate horizontally across pipes */</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;gfx.mec.num_mec; ++i) {</div><div class='add'>+			for (j = 0; j &lt; adev-&gt;gfx.mec.num_queue_per_pipe; j++) {</div><div class='add'>+				for (k = 0; k &lt; adev-&gt;gfx.mec.num_pipe_per_mec; k++) {</div><div class='add'>+					if (!amdgpu_gfx_is_mec_queue_enabled(adev, 0, i,</div><div class='add'>+									     k, j))</div><div class='add'>+						continue;</div><div class='ctx'> </div><div class='del'>-				r = gfx_v11_0_compute_ring_init(adev, ring_id,</div><div class='del'>-								i, k, j);</div><div class='del'>-				if (r)</div><div class='del'>-					return r;</div><div class='add'>+					r = gfx_v11_0_compute_ring_init(adev, ring_id,</div><div class='add'>+									i, k, j);</div><div class='add'>+					if (r)</div><div class='add'>+						return r;</div><div class='ctx'> </div><div class='del'>-				ring_id++;</div><div class='add'>+					ring_id++;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2428,7 +2484,7 @@ static int gfx_v11_0_config_me_cache(struct amdgpu_device *adev, uint64_t addr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32_SOC15(GC, 0, regCP_ME_IC_BASE_CNTL);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_ME_IC_BASE_CNTL, VMID, 0);</div><div class='hunk'>@@ -2472,7 +2528,7 @@ static int gfx_v11_0_config_pfp_cache(struct amdgpu_device *adev, uint64_t addr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_CNTL);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_PFP_IC_BASE_CNTL, VMID, 0);</div><div class='hunk'>@@ -2517,7 +2573,7 @@ static int gfx_v11_0_config_mec_cache(struct amdgpu_device *adev, uint64_t addr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32_SOC15(GC, 0, regCP_CPC_IC_BASE_CNTL);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, CACHE_POLICY, 0);</div><div class='hunk'>@@ -3153,7 +3209,7 @@ static int gfx_v11_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device *adev)</div><div class='ctx'> 	amdgpu_bo_unreserve(adev-&gt;gfx.pfp.pfp_fw_data_obj);</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,</div><div class='ctx'> 		lower_32_bits(adev-&gt;gfx.pfp.pfp_fw_gpu_addr));</div><div class='hunk'>@@ -3371,7 +3427,7 @@ static int gfx_v11_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device *adev)</div><div class='ctx'> 	amdgpu_bo_unreserve(adev-&gt;gfx.me.me_fw_data_obj);</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,</div><div class='ctx'> 		lower_32_bits(adev-&gt;gfx.me.me_fw_gpu_addr));</div><div class='hunk'>@@ -4061,6 +4117,8 @@ static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, BUF_SWAP, 1);</div><div class='ctx'> #endif</div><div class='add'>+	if (prop-&gt;tmz_queue)</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);</div><div class='ctx'> 	mqd-&gt;cp_gfx_hqd_cntl = tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* set up cp_doorbell_control */</div><div class='hunk'>@@ -4081,6 +4139,16 @@ static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> 	/* active the queue */</div><div class='ctx'> 	mqd-&gt;cp_gfx_hqd_active = 1;</div><div class='ctx'> </div><div class='add'>+	/* set gfx UQ items */</div><div class='add'>+	mqd-&gt;shadow_base_lo = lower_32_bits(prop-&gt;shadow_addr);</div><div class='add'>+	mqd-&gt;shadow_base_hi = upper_32_bits(prop-&gt;shadow_addr);</div><div class='add'>+	mqd-&gt;gds_bkup_base_lo = lower_32_bits(prop-&gt;gds_bkup_addr);</div><div class='add'>+	mqd-&gt;gds_bkup_base_hi = upper_32_bits(prop-&gt;gds_bkup_addr);</div><div class='add'>+	mqd-&gt;fw_work_area_base_lo = lower_32_bits(prop-&gt;csa_addr);</div><div class='add'>+	mqd-&gt;fw_work_area_base_hi = upper_32_bits(prop-&gt;csa_addr);</div><div class='add'>+	mqd-&gt;fence_address_lo = lower_32_bits(prop-&gt;fence_address);</div><div class='add'>+	mqd-&gt;fence_address_hi = upper_32_bits(prop-&gt;fence_address);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4205,6 +4273,8 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> 			    prop-&gt;allow_tunneling);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);</div><div class='add'>+	if (prop-&gt;tmz_queue)</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);</div><div class='ctx'> 	mqd-&gt;cp_hqd_pq_control = tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* set the wb address whether it's enabled or not */</div><div class='hunk'>@@ -4256,6 +4326,10 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> </div><div class='ctx'> 	mqd-&gt;cp_hqd_active = prop-&gt;hqd_active;</div><div class='ctx'> </div><div class='add'>+	/* set UQ fenceaddress */</div><div class='add'>+	mqd-&gt;fence_address_lo = lower_32_bits(prop-&gt;fence_address);</div><div class='add'>+	mqd-&gt;fence_address_hi = upper_32_bits(prop-&gt;fence_address);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4509,11 +4583,23 @@ static int gfx_v11_0_cp_resume(struct amdgpu_device *adev)</div><div class='ctx'> 			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++) {</div><div class='del'>-		ring = &amp;adev-&gt;gfx.gfx_ring[i];</div><div class='del'>-		r = amdgpu_ring_test_helper(ring);</div><div class='del'>-		if (r)</div><div class='del'>-			return r;</div><div class='add'>+	if (adev-&gt;gfx.disable_kq) {</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++) {</div><div class='add'>+			ring = &amp;adev-&gt;gfx.gfx_ring[i];</div><div class='add'>+			/* we don't want to set ring-&gt;ready */</div><div class='add'>+			r = amdgpu_ring_test_ring(ring);</div><div class='add'>+			if (r)</div><div class='add'>+				return r;</div><div class='add'>+		}</div><div class='add'>+		if (amdgpu_async_gfx_ring)</div><div class='add'>+			amdgpu_gfx_disable_kgq(adev, 0);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++) {</div><div class='add'>+			ring = &amp;adev-&gt;gfx.gfx_ring[i];</div><div class='add'>+			r = amdgpu_ring_test_helper(ring);</div><div class='add'>+			if (r)</div><div class='add'>+				return r;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;gfx.num_compute_rings; i++) {</div><div class='hunk'>@@ -4541,7 +4627,7 @@ static int gfx_v11_0_gfxhub_enable(struct amdgpu_device *adev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?</div><div class='ctx'> 		false : true;</div><div class='hunk'>@@ -4722,6 +4808,49 @@ static int gfx_v11_0_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gfx_v11_0_set_userq_eop_interrupts(struct amdgpu_device *adev,</div><div class='add'>+					      bool enable)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq_type;</div><div class='add'>+	int m, p, r;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;userq_funcs[AMDGPU_HW_IP_GFX]) {</div><div class='add'>+		for (m = 0; m &lt; adev-&gt;gfx.me.num_me; m++) {</div><div class='add'>+			for (p = 0; p &lt; adev-&gt;gfx.me.num_pipe_per_me; p++) {</div><div class='add'>+				irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p;</div><div class='add'>+				if (enable)</div><div class='add'>+					r = amdgpu_irq_get(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				else</div><div class='add'>+					r = amdgpu_irq_put(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				if (r)</div><div class='add'>+					return r;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;userq_funcs[AMDGPU_HW_IP_COMPUTE]) {</div><div class='add'>+		for (m = 0; m &lt; adev-&gt;gfx.mec.num_mec; ++m) {</div><div class='add'>+			for (p = 0; p &lt; adev-&gt;gfx.mec.num_pipe_per_mec; p++) {</div><div class='add'>+				irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP</div><div class='add'>+					+ (m * adev-&gt;gfx.mec.num_pipe_per_mec)</div><div class='add'>+					+ p;</div><div class='add'>+				if (enable)</div><div class='add'>+					r = amdgpu_irq_get(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				else</div><div class='add'>+					r = amdgpu_irq_put(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				if (r)</div><div class='add'>+					return r;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfx_v11_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='hunk'>@@ -4731,9 +4860,11 @@ static int gfx_v11_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	amdgpu_irq_put(adev, &amp;adev-&gt;gfx.priv_reg_irq, 0);</div><div class='ctx'> 	amdgpu_irq_put(adev, &amp;adev-&gt;gfx.priv_inst_irq, 0);</div><div class='ctx'> 	amdgpu_irq_put(adev, &amp;adev-&gt;gfx.bad_op_irq, 0);</div><div class='add'>+	gfx_v11_0_set_userq_eop_interrupts(adev, false);</div><div class='ctx'> </div><div class='ctx'> 	if (!adev-&gt;no_hw_access) {</div><div class='del'>-		if (amdgpu_async_gfx_ring) {</div><div class='add'>+		if (amdgpu_async_gfx_ring &amp;&amp;</div><div class='add'>+		    !adev-&gt;gfx.disable_kq) {</div><div class='ctx'> 			if (amdgpu_gfx_disable_kgq(adev, 0))</div><div class='ctx'> 				DRM_ERROR("KGQ disable failed\n");</div><div class='ctx'> 		}</div><div class='hunk'>@@ -5059,11 +5190,36 @@ static int gfx_v11_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='add'>+	switch (amdgpu_user_queue) {</div><div class='add'>+	case -1:</div><div class='add'>+	case 0:</div><div class='add'>+	default:</div><div class='add'>+		adev-&gt;gfx.disable_kq = false;</div><div class='add'>+		adev-&gt;gfx.disable_uq = true;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		adev-&gt;gfx.disable_kq = false;</div><div class='add'>+		adev-&gt;gfx.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		adev-&gt;gfx.disable_kq = true;</div><div class='add'>+		adev-&gt;gfx.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	adev-&gt;gfx.funcs = &amp;gfx_v11_0_gfx_funcs;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;gfx.num_gfx_rings = GFX11_NUM_GFX_RINGS;</div><div class='del'>-	adev-&gt;gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),</div><div class='del'>-					  AMDGPU_MAX_COMPUTE_RINGS);</div><div class='add'>+	if (adev-&gt;gfx.disable_kq) {</div><div class='add'>+		/* We need one GFX ring temporarily to set up</div><div class='add'>+		 * the clear state.</div><div class='add'>+		 */</div><div class='add'>+		adev-&gt;gfx.num_gfx_rings = 1;</div><div class='add'>+		adev-&gt;gfx.num_compute_rings = 0;</div><div class='add'>+	} else {</div><div class='add'>+		adev-&gt;gfx.num_gfx_rings = GFX11_NUM_GFX_RINGS;</div><div class='add'>+		adev-&gt;gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),</div><div class='add'>+						  AMDGPU_MAX_COMPUTE_RINGS);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	gfx_v11_0_set_kiq_pm4_funcs(adev);</div><div class='ctx'> 	gfx_v11_0_set_ring_funcs(adev);</div><div class='hunk'>@@ -5094,6 +5250,11 @@ static int gfx_v11_0_late_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	r = amdgpu_irq_get(adev, &amp;adev-&gt;gfx.bad_op_irq, 0);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='add'>+</div><div class='add'>+	r = gfx_v11_0_set_userq_eop_interrupts(adev, true);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5691,10 +5852,6 @@ static void gfx_v11_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,</div><div class='ctx'> 				    (!amdgpu_sriov_vf(ring-&gt;adev) &amp;&amp; flags &amp; AMDGPU_IB_PREEMPTED) ? true : false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		/* inherit vmid from mqd */</div><div class='del'>-		control |= 0x400000;</div><div class='del'>-</div><div class='ctx'> 	amdgpu_ring_write(ring, header);</div><div class='ctx'> 	BUG_ON(ib-&gt;gpu_addr &amp; 0x3); /* Dword align */</div><div class='ctx'> 	amdgpu_ring_write(ring,</div><div class='hunk'>@@ -5714,10 +5871,6 @@ static void gfx_v11_0_ring_emit_ib_compute(struct amdgpu_ring *ring,</div><div class='ctx'> 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);</div><div class='ctx'> 	u32 control = INDIRECT_BUFFER_VALID | ib-&gt;length_dw | (vmid &lt;&lt; 24);</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		/* inherit vmid from mqd */</div><div class='del'>-		control |= 0x40000000;</div><div class='del'>-</div><div class='ctx'> 	/* Currently, there is a high possibility to get wave ID mismatch</div><div class='ctx'> 	 * between ME and GDS, leading to a hw deadlock, because ME generates</div><div class='ctx'> 	 * different wave IDs than the GDS expects. This situation happens</div><div class='hunk'>@@ -5775,8 +5928,7 @@ static void gfx_v11_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,</div><div class='ctx'> 	amdgpu_ring_write(ring, upper_32_bits(addr));</div><div class='ctx'> 	amdgpu_ring_write(ring, lower_32_bits(seq));</div><div class='ctx'> 	amdgpu_ring_write(ring, upper_32_bits(seq));</div><div class='del'>-	amdgpu_ring_write(ring, ring-&gt;is_mes_queue ?</div><div class='del'>-			 (ring-&gt;hw_queue_id | AMDGPU_FENCE_MES_QUEUE_FLAG) : 0);</div><div class='add'>+	amdgpu_ring_write(ring, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v11_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)</div><div class='hunk'>@@ -5804,10 +5956,7 @@ static void gfx_v11_0_ring_invalidate_tlbs(struct amdgpu_ring *ring,</div><div class='ctx'> static void gfx_v11_0_ring_emit_vm_flush(struct amdgpu_ring *ring,</div><div class='ctx'> 					 unsigned vmid, uint64_t pd_addr)</div><div class='ctx'> {</div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		gfx_v11_0_ring_invalidate_tlbs(ring, 0, 0, false, 0);</div><div class='del'>-	else</div><div class='del'>-		amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);</div><div class='add'>+	amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);</div><div class='ctx'> </div><div class='ctx'> 	/* compute doesn't have PFP */</div><div class='ctx'> 	if (ring-&gt;funcs-&gt;type == AMDGPU_RING_TYPE_GFX) {</div><div class='hunk'>@@ -6036,28 +6185,13 @@ static void gfx_v11_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume)</div><div class='ctx'> 	void *de_payload_cpu_addr;</div><div class='ctx'> 	int cnt;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-				  gfx[0].gfx_meta_data) +</div><div class='del'>-			offsetof(struct v10_gfx_meta_data, de_payload);</div><div class='del'>-		de_payload_gpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		de_payload_cpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-				  gfx[0].gds_backup) +</div><div class='del'>-			offsetof(struct v10_gfx_meta_data, de_payload);</div><div class='del'>-		gds_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-	} else {</div><div class='del'>-		offset = offsetof(struct v10_gfx_meta_data, de_payload);</div><div class='del'>-		de_payload_gpu_addr = amdgpu_csa_vaddr(ring-&gt;adev) + offset;</div><div class='del'>-		de_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + offset;</div><div class='add'>+	offset = offsetof(struct v10_gfx_meta_data, de_payload);</div><div class='add'>+	de_payload_gpu_addr = amdgpu_csa_vaddr(ring-&gt;adev) + offset;</div><div class='add'>+	de_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + offset;</div><div class='ctx'> </div><div class='del'>-		gds_addr = ALIGN(amdgpu_csa_vaddr(ring-&gt;adev) +</div><div class='del'>-				 AMDGPU_CSA_SIZE - adev-&gt;gds.gds_size,</div><div class='del'>-				 PAGE_SIZE);</div><div class='del'>-	}</div><div class='add'>+	gds_addr = ALIGN(amdgpu_csa_vaddr(ring-&gt;adev) +</div><div class='add'>+			 AMDGPU_CSA_SIZE - adev-&gt;gds.gds_size,</div><div class='add'>+			 PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	de_payload.gds_backup_addrlo = lower_32_bits(gds_addr);</div><div class='ctx'> 	de_payload.gds_backup_addrhi = upper_32_bits(gds_addr);</div><div class='hunk'>@@ -6296,25 +6430,23 @@ static int gfx_v11_0_eop_irq(struct amdgpu_device *adev,</div><div class='ctx'> 			     struct amdgpu_irq_src *source,</div><div class='ctx'> 			     struct amdgpu_iv_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	u32 doorbell_offset = entry-&gt;src_data[0];</div><div class='ctx'> 	u8 me_id, pipe_id, queue_id;</div><div class='ctx'> 	struct amdgpu_ring *ring;</div><div class='del'>-	uint32_t mes_queue_id = entry-&gt;src_data[0];</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("IH: CP EOP\n");</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;enable_mes &amp;&amp; (mes_queue_id &amp; AMDGPU_FENCE_MES_QUEUE_FLAG)) {</div><div class='del'>-		struct amdgpu_mes_queue *queue;</div><div class='del'>-</div><div class='del'>-		mes_queue_id &amp;= AMDGPU_FENCE_MES_QUEUE_ID_MASK;</div><div class='add'>+	if (adev-&gt;enable_mes &amp;&amp; doorbell_offset) {</div><div class='add'>+		struct amdgpu_userq_fence_driver *fence_drv = NULL;</div><div class='add'>+		struct xarray *xa = &amp;adev-&gt;userq_xa;</div><div class='add'>+		unsigned long flags;</div><div class='ctx'> </div><div class='del'>-		spin_lock(&amp;adev-&gt;mes.queue_id_lock);</div><div class='del'>-		queue = idr_find(&amp;adev-&gt;mes.queue_id_idr, mes_queue_id);</div><div class='del'>-		if (queue) {</div><div class='del'>-			DRM_DEBUG("process mes queue id = %d\n", mes_queue_id);</div><div class='del'>-			amdgpu_fence_process(queue-&gt;ring);</div><div class='del'>-		}</div><div class='del'>-		spin_unlock(&amp;adev-&gt;mes.queue_id_lock);</div><div class='add'>+		xa_lock_irqsave(xa, flags);</div><div class='add'>+		fence_drv = xa_load(xa, doorbell_offset);</div><div class='add'>+		if (fence_drv)</div><div class='add'>+			amdgpu_userq_fence_driver_process(fence_drv);</div><div class='add'>+		xa_unlock_irqrestore(xa, flags);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		me_id = (entry-&gt;ring_id &amp; 0x0c) &gt;&gt; 2;</div><div class='ctx'> 		pipe_id = (entry-&gt;ring_id &amp; 0x03) &gt;&gt; 0;</div><div class='hunk'>@@ -6481,27 +6613,29 @@ static void gfx_v11_0_handle_priv_fault(struct amdgpu_device *adev,</div><div class='ctx'> 	pipe_id = (entry-&gt;ring_id &amp; 0x03) &gt;&gt; 0;</div><div class='ctx'> 	queue_id = (entry-&gt;ring_id &amp; 0x70) &gt;&gt; 4;</div><div class='ctx'> </div><div class='del'>-	switch (me_id) {</div><div class='del'>-	case 0:</div><div class='del'>-		for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++) {</div><div class='del'>-			ring = &amp;adev-&gt;gfx.gfx_ring[i];</div><div class='del'>-			if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='del'>-			    ring-&gt;queue == queue_id)</div><div class='del'>-				drm_sched_fault(&amp;ring-&gt;sched);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-	case 2:</div><div class='del'>-		for (i = 0; i &lt; adev-&gt;gfx.num_compute_rings; i++) {</div><div class='del'>-			ring = &amp;adev-&gt;gfx.compute_ring[i];</div><div class='del'>-			if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='del'>-			    ring-&gt;queue == queue_id)</div><div class='del'>-				drm_sched_fault(&amp;ring-&gt;sched);</div><div class='add'>+	if (!adev-&gt;gfx.disable_kq) {</div><div class='add'>+		switch (me_id) {</div><div class='add'>+		case 0:</div><div class='add'>+			for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++) {</div><div class='add'>+				ring = &amp;adev-&gt;gfx.gfx_ring[i];</div><div class='add'>+				if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='add'>+				    ring-&gt;queue == queue_id)</div><div class='add'>+					drm_sched_fault(&amp;ring-&gt;sched);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+		case 2:</div><div class='add'>+			for (i = 0; i &lt; adev-&gt;gfx.num_compute_rings; i++) {</div><div class='add'>+				ring = &amp;adev-&gt;gfx.compute_ring[i];</div><div class='add'>+				if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='add'>+				    ring-&gt;queue == queue_id)</div><div class='add'>+					drm_sched_fault(&amp;ring-&gt;sched);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			BUG();</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6609,6 +6743,69 @@ static void gfx_v11_0_emit_mem_sync(struct amdgpu_ring *ring)</div><div class='ctx'> 	amdgpu_ring_write(ring, gcr_cntl); /* GCR_CNTL */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool gfx_v11_pipe_reset_support(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	/* Disable the pipe reset until the CPFW fully support it.*/</div><div class='add'>+	dev_warn_once(adev-&gt;dev, "The CPFW hasn't support pipe reset yet.\n");</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int gfx_v11_reset_gfx_pipe(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	uint32_t reset_pipe = 0, clean_pipe = 0;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (!gfx_v11_pipe_reset_support(adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	gfx_v11_0_set_safe_mode(adev, 0);</div><div class='add'>+	mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	soc21_grbm_select(adev, ring-&gt;me, ring-&gt;pipe, ring-&gt;queue, 0);</div><div class='add'>+</div><div class='add'>+	switch (ring-&gt;pipe) {</div><div class='add'>+	case 0:</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE0_RESET, 1);</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE0_RESET, 1);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE0_RESET, 0);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE0_RESET, 0);</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE1_RESET, 1);</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE1_RESET, 1);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE1_RESET, 0);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE1_RESET, 0);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG32_SOC15(GC, 0, regCP_ME_CNTL, reset_pipe);</div><div class='add'>+	WREG32_SOC15(GC, 0, regCP_ME_CNTL, clean_pipe);</div><div class='add'>+</div><div class='add'>+	r = (RREG32(SOC15_REG_OFFSET(GC, 0, regCP_GFX_RS64_INSTR_PNTR1)) &lt;&lt; 2) -</div><div class='add'>+						RS64_FW_UC_START_ADDR_LO;</div><div class='add'>+	soc21_grbm_select(adev, 0, 0, 0, 0);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	gfx_v11_0_unset_safe_mode(adev, 0);</div><div class='add'>+</div><div class='add'>+	dev_info(adev-&gt;dev, "The ring %s pipe reset to the ME firmware start PC: %s\n", ring-&gt;name,</div><div class='add'>+			r == 0 ? "successfully" : "failed");</div><div class='add'>+	/* FIXME: Sometimes driver can't cache the ME firmware start PC correctly,</div><div class='add'>+	 * so the pipe reset status relies on the later gfx ring test result.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='hunk'>@@ -6618,8 +6815,13 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_mes_reset_legacy_queue(ring-&gt;adev, ring, vmid, false);</div><div class='del'>-	if (r)</div><div class='del'>-		return r;</div><div class='add'>+	if (r) {</div><div class='add'>+</div><div class='add'>+		dev_warn(adev-&gt;dev, "reset via MES failed and try pipe reset %d\n", r);</div><div class='add'>+		r = gfx_v11_reset_gfx_pipe(ring);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	r = gfx_v11_0_kgq_init_queue(ring, true);</div><div class='ctx'> 	if (r) {</div><div class='hunk'>@@ -6636,6 +6838,136 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> 	return amdgpu_ring_test_ring(ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gfx_v11_0_reset_compute_pipe(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	uint32_t reset_pipe = 0, clean_pipe = 0;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (!gfx_v11_pipe_reset_support(adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	gfx_v11_0_set_safe_mode(adev, 0);</div><div class='add'>+	mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	soc21_grbm_select(adev, ring-&gt;me, ring-&gt;pipe, ring-&gt;queue, 0);</div><div class='add'>+</div><div class='add'>+	reset_pipe = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);</div><div class='add'>+	clean_pipe = reset_pipe;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;gfx.rs64_enable) {</div><div class='add'>+</div><div class='add'>+		switch (ring-&gt;pipe) {</div><div class='add'>+		case 0:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE0_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE0_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE1_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE1_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE2_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE2_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE3_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE3_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, reset_pipe);</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, clean_pipe);</div><div class='add'>+		r = (RREG32_SOC15(GC, 0, regCP_MEC_RS64_INSTR_PNTR) &lt;&lt; 2) -</div><div class='add'>+					RS64_FW_UC_START_ADDR_LO;</div><div class='add'>+	} else {</div><div class='add'>+		if (ring-&gt;me == 1) {</div><div class='add'>+			switch (ring-&gt;pipe) {</div><div class='add'>+			case 0:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE0_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE0_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE1_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE1_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			case 2:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE2_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE2_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			case 3:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE3_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE3_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			/* mec1 fw pc: CP_MEC1_INSTR_PNTR */</div><div class='add'>+		} else {</div><div class='add'>+			switch (ring-&gt;pipe) {</div><div class='add'>+			case 0:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE0_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE0_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			case 1:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE1_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE1_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			case 2:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE2_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE2_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			case 3:</div><div class='add'>+				reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE3_RESET, 1);</div><div class='add'>+				clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME2_PIPE3_RESET, 0);</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			/* mec2 fw pc: CP:CP_MEC2_INSTR_PNTR */</div><div class='add'>+		}</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_CNTL, reset_pipe);</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_CNTL, clean_pipe);</div><div class='add'>+		r = RREG32(SOC15_REG_OFFSET(GC, 0, regCP_MEC1_INSTR_PNTR));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	soc21_grbm_select(adev, 0, 0, 0, 0);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	gfx_v11_0_unset_safe_mode(adev, 0);</div><div class='add'>+</div><div class='add'>+	dev_info(adev-&gt;dev, "The ring %s pipe resets to MEC FW start PC: %s\n", ring-&gt;name,</div><div class='add'>+			r == 0 ? "successfully" : "failed");</div><div class='add'>+	/*FIXME:Sometimes driver can't cache the MEC firmware start PC correctly, so the pipe</div><div class='add'>+	 * reset status relies on the compute ring test result.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='hunk'>@@ -6646,8 +6978,10 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_mes_reset_legacy_queue(ring-&gt;adev, ring, vmid, true);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "reset via MMIO failed %d\n", r);</div><div class='del'>-		return r;</div><div class='add'>+		dev_warn(adev-&gt;dev, "fail(%d) to reset kcq and try pipe reset\n", r);</div><div class='add'>+		r = gfx_v11_0_reset_compute_pipe(ring);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = gfx_v11_0_kcq_init_queue(ring, true);</div><div class='hunk'>@@ -6693,9 +7027,14 @@ static void gfx_v11_ip_print(struct amdgpu_ip_block *ip_block, struct drm_printe</div><div class='ctx'> 			for (k = 0; k &lt; adev-&gt;gfx.mec.num_queue_per_pipe; k++) {</div><div class='ctx'> 				drm_printf(p, "\nmec %d, pipe %d, queue %d\n", i, j, k);</div><div class='ctx'> 				for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-					drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='del'>-						   gc_cp_reg_list_11[reg].reg_name,</div><div class='del'>-						   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='add'>+					if (i &amp;&amp; gc_cp_reg_list_11[reg].reg_offset == regCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+						drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='add'>+							   "regCP_MEC_ME2_HEADER_DUMP",</div><div class='add'>+							   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='add'>+					else</div><div class='add'>+						drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='add'>+							   gc_cp_reg_list_11[reg].reg_name,</div><div class='add'>+							   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='ctx'> 				}</div><div class='ctx'> 				index += reg_count;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -6755,9 +7094,16 @@ static void gfx_v11_ip_dump(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 				/* ME0 is for GFX so start from 1 for CP */</div><div class='ctx'> 				soc21_grbm_select(adev, adev-&gt;gfx.me.num_me + i, j, k, 0);</div><div class='ctx'> 				for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-					adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='del'>-						RREG32(SOC15_REG_ENTRY_OFFSET(</div><div class='del'>-							gc_cp_reg_list_11[reg]));</div><div class='add'>+					if (i &amp;&amp;</div><div class='add'>+					    gc_cp_reg_list_11[reg].reg_offset ==</div><div class='add'>+						    regCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+						adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='add'>+							RREG32(SOC15_REG_OFFSET(GC, 0,</div><div class='add'>+							       regCP_MEC_ME2_HEADER_DUMP));</div><div class='add'>+					else</div><div class='add'>+						adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='add'>+							RREG32(SOC15_REG_ENTRY_OFFSET(</div><div class='add'>+								       gc_cp_reg_list_11[reg]));</div><div class='ctx'> 				}</div><div class='ctx'> 				index += reg_count;</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c<br/>index e7b58e470292..f09d96bfee16 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c</a></div><div class='hunk'>@@ -44,6 +44,8 @@</div><div class='ctx'> #include "gfx_v12_0.h"</div><div class='ctx'> #include "nbif_v6_3_1.h"</div><div class='ctx'> #include "mes_v12_0.h"</div><div class='add'>+#include "mes_userqueue.h"</div><div class='add'>+#include "amdgpu_userq_fence.h"</div><div class='ctx'> </div><div class='ctx'> #define GFX12_NUM_GFX_RINGS	1</div><div class='ctx'> #define GFX12_MEC_HPD_SIZE	2048</div><div class='hunk'>@@ -133,11 +135,14 @@ static const struct amdgpu_hwip_reg_entry gc_reg_list_12_0[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_RS64_INSTR_PNTR0),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_RS64_INSTR_PNTR1),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_RS64_INSTR_PNTR),</div><div class='del'>-</div><div class='ctx'> 	/* cp header registers */</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_MES_HEADER_DUMP),</div><div class='ctx'> 	/* SE status registers */</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE0),</div><div class='hunk'>@@ -186,7 +191,16 @@ static const struct amdgpu_hwip_reg_entry gc_cp_reg_list_12[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_OFFSET),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_CNTL_STACK_DW_CNT),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_SUSPEND_WG_STATE_OFFSET),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_STATUS)</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_DEQUEUE_STATUS),</div><div class='add'>+	/* cp header registers */</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_hwip_reg_entry gc_gfx_queue_reg_list_12[] = {</div><div class='hunk'>@@ -215,7 +229,24 @@ static const struct amdgpu_hwip_reg_entry gc_gfx_queue_reg_list_12[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_LO),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BASE_HI),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_CMD_BUFSZ),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ)</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ),</div><div class='add'>+	/* cp header registers */</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_ME_HEADER_DUMP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct soc15_reg_golden golden_settings_gc_12_0_rev0[] = {</div><div class='hunk'>@@ -475,33 +506,18 @@ static int gfx_v12_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;ib, 0, sizeof(ib));</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t padding, offset;</div><div class='del'>-</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring, AMDGPU_MES_CTX_IB_OFFS);</div><div class='del'>-		padding = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-						  AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-</div><div class='del'>-		ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ib.ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, padding);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, padding);</div><div class='del'>-		*cpu_ptr = cpu_to_le32(0xCAFEDEAD);</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r)</div><div class='del'>-			return r;</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='ctx'> </div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(0xCAFEDEAD);</div><div class='del'>-		cpu_ptr = &amp;adev-&gt;wb.wb[index];</div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(0xCAFEDEAD);</div><div class='add'>+	cpu_ptr = &amp;adev-&gt;wb.wb[index];</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "amdgpu: failed to get ib (%ld).\n", r);</div><div class='del'>-			goto err1;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "amdgpu: failed to get ib (%ld).\n", r);</div><div class='add'>+		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3);</div><div class='hunk'>@@ -528,12 +544,10 @@ static int gfx_v12_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 	else</div><div class='ctx'> 		r = -EINVAL;</div><div class='ctx'> err2:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_ib_free(&amp;ib, NULL);</div><div class='add'>+	amdgpu_ib_free(&amp;ib, NULL);</div><div class='ctx'> 	dma_fence_put(f);</div><div class='ctx'> err1:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -881,6 +895,34 @@ static void gfx_v12_0_select_me_pipe_q(struct amdgpu_device *adev,</div><div class='ctx'> 	soc24_grbm_select(adev, me, pipe, q, vm);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* all sizes are in bytes */</div><div class='add'>+#define MQD_SHADOW_BASE_SIZE      73728</div><div class='add'>+#define MQD_SHADOW_BASE_ALIGNMENT 256</div><div class='add'>+#define MQD_FWWORKAREA_SIZE       484</div><div class='add'>+#define MQD_FWWORKAREA_ALIGNMENT  256</div><div class='add'>+</div><div class='add'>+static void gfx_v12_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev,</div><div class='add'>+						  struct amdgpu_gfx_shadow_info *shadow_info)</div><div class='add'>+{</div><div class='add'>+	shadow_info-&gt;shadow_size = MQD_SHADOW_BASE_SIZE;</div><div class='add'>+	shadow_info-&gt;shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;</div><div class='add'>+	shadow_info-&gt;csa_size = MQD_FWWORKAREA_SIZE;</div><div class='add'>+	shadow_info-&gt;csa_alignment = MQD_FWWORKAREA_ALIGNMENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device *adev,</div><div class='add'>+					 struct amdgpu_gfx_shadow_info *shadow_info,</div><div class='add'>+					 bool skip_check)</div><div class='add'>+{</div><div class='add'>+	if (adev-&gt;gfx.cp_gfx_shadow || skip_check) {</div><div class='add'>+		gfx_v12_0_get_gfx_shadow_info_nocheck(adev, shadow_info);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(shadow_info, 0, sizeof(struct amdgpu_gfx_shadow_info));</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct amdgpu_gfx_funcs gfx_v12_0_gfx_funcs = {</div><div class='ctx'> 	.get_gpu_clock_counter = &amp;gfx_v12_0_get_gpu_clock_counter,</div><div class='ctx'> 	.select_se_sh = &amp;gfx_v12_0_select_se_sh,</div><div class='hunk'>@@ -889,6 +931,7 @@ static const struct amdgpu_gfx_funcs gfx_v12_0_gfx_funcs = {</div><div class='ctx'> 	.read_wave_vgprs = &amp;gfx_v12_0_read_wave_vgprs,</div><div class='ctx'> 	.select_me_pipe_q = &amp;gfx_v12_0_select_me_pipe_q,</div><div class='ctx'> 	.update_perfmon_mgcg = &amp;gfx_v12_0_update_perf_clk,</div><div class='add'>+	.get_gfx_shadow_info = &amp;gfx_v12_0_get_gfx_shadow_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int gfx_v12_0_gpu_early_init(struct amdgpu_device *adev)</div><div class='hunk'>@@ -1346,6 +1389,7 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	unsigned num_compute_rings;</div><div class='ctx'> 	int xcc_id = 0;</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='add'>+	int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;adev-&gt;gfx.idle_work, amdgpu_gfx_profile_idle_work_handler);</div><div class='ctx'> </div><div class='hunk'>@@ -1354,7 +1398,7 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	case IP_VERSION(12, 0, 1):</div><div class='ctx'> 		adev-&gt;gfx.me.num_me = 1;</div><div class='ctx'> 		adev-&gt;gfx.me.num_pipe_per_me = 1;</div><div class='del'>-		adev-&gt;gfx.me.num_queue_per_pipe = 1;</div><div class='add'>+		adev-&gt;gfx.me.num_queue_per_pipe = 8;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_mec = 1;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_pipe_per_mec = 2;</div><div class='ctx'> 		adev-&gt;gfx.mec.num_queue_per_pipe = 4;</div><div class='hunk'>@@ -1372,6 +1416,22 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {</div><div class='ctx'> 	case IP_VERSION(12, 0, 0):</div><div class='ctx'> 	case IP_VERSION(12, 0, 1):</div><div class='add'>+		if (!adev-&gt;gfx.disable_uq &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.me_fw_version  &gt;= 2780 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.pfp_fw_version &gt;= 2840 &amp;&amp;</div><div class='add'>+		    adev-&gt;gfx.mec_fw_version &gt;= 3050 &amp;&amp;</div><div class='add'>+		    adev-&gt;mes.fw_version[0] &gt;= 123) {</div><div class='add'>+			adev-&gt;userq_funcs[AMDGPU_HW_IP_GFX] = &amp;userq_mes_funcs;</div><div class='add'>+			adev-&gt;userq_funcs[AMDGPU_HW_IP_COMPUTE] = &amp;userq_mes_funcs;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {</div><div class='add'>+	case IP_VERSION(12, 0, 0):</div><div class='add'>+	case IP_VERSION(12, 0, 1):</div><div class='ctx'> 		if (adev-&gt;gfx.me_fw_version  &gt;= 2480 &amp;&amp;</div><div class='ctx'> 		    adev-&gt;gfx.pfp_fw_version &gt;= 2530 &amp;&amp;</div><div class='ctx'> 		    adev-&gt;gfx.mec_fw_version &gt;= 2680 &amp;&amp;</div><div class='hunk'>@@ -1383,11 +1443,13 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* recalculate compute rings to use based on hardware configuration */</div><div class='del'>-	num_compute_rings = (adev-&gt;gfx.mec.num_pipe_per_mec *</div><div class='del'>-			     adev-&gt;gfx.mec.num_queue_per_pipe) / 2;</div><div class='del'>-	adev-&gt;gfx.num_compute_rings = min(adev-&gt;gfx.num_compute_rings,</div><div class='del'>-					  num_compute_rings);</div><div class='add'>+	if (adev-&gt;gfx.num_compute_rings) {</div><div class='add'>+		/* recalculate compute rings to use based on hardware configuration */</div><div class='add'>+		num_compute_rings = (adev-&gt;gfx.mec.num_pipe_per_mec *</div><div class='add'>+				     adev-&gt;gfx.mec.num_queue_per_pipe) / 2;</div><div class='add'>+		adev-&gt;gfx.num_compute_rings = min(adev-&gt;gfx.num_compute_rings,</div><div class='add'>+						  num_compute_rings);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* EOP Event */</div><div class='ctx'> 	r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GRBM_CP,</div><div class='hunk'>@@ -1433,37 +1495,41 @@ static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* set up the gfx ring */</div><div class='del'>-	for (i = 0; i &lt; adev-&gt;gfx.me.num_me; i++) {</div><div class='del'>-		for (j = 0; j &lt; adev-&gt;gfx.me.num_queue_per_pipe; j++) {</div><div class='del'>-			for (k = 0; k &lt; adev-&gt;gfx.me.num_pipe_per_me; k++) {</div><div class='del'>-				if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))</div><div class='del'>-					continue;</div><div class='del'>-</div><div class='del'>-				r = gfx_v12_0_gfx_ring_init(adev, ring_id,</div><div class='del'>-							    i, k, j);</div><div class='del'>-				if (r)</div><div class='del'>-					return r;</div><div class='del'>-				ring_id++;</div><div class='add'>+	if (adev-&gt;gfx.num_gfx_rings) {</div><div class='add'>+		/* set up the gfx ring */</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;gfx.me.num_me; i++) {</div><div class='add'>+			for (j = 0; j &lt; num_queue_per_pipe; j++) {</div><div class='add'>+				for (k = 0; k &lt; adev-&gt;gfx.me.num_pipe_per_me; k++) {</div><div class='add'>+					if (!amdgpu_gfx_is_me_queue_enabled(adev, i, k, j))</div><div class='add'>+						continue;</div><div class='add'>+</div><div class='add'>+					r = gfx_v12_0_gfx_ring_init(adev, ring_id,</div><div class='add'>+								    i, k, j);</div><div class='add'>+					if (r)</div><div class='add'>+						return r;</div><div class='add'>+					ring_id++;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ring_id = 0;</div><div class='del'>-	/* set up the compute queues - allocate horizontally across pipes */</div><div class='del'>-	for (i = 0; i &lt; adev-&gt;gfx.mec.num_mec; ++i) {</div><div class='del'>-		for (j = 0; j &lt; adev-&gt;gfx.mec.num_queue_per_pipe; j++) {</div><div class='del'>-			for (k = 0; k &lt; adev-&gt;gfx.mec.num_pipe_per_mec; k++) {</div><div class='del'>-				if (!amdgpu_gfx_is_mec_queue_enabled(adev,</div><div class='del'>-								0, i, k, j))</div><div class='del'>-					continue;</div><div class='add'>+	if (adev-&gt;gfx.num_compute_rings) {</div><div class='add'>+		ring_id = 0;</div><div class='add'>+		/* set up the compute queues - allocate horizontally across pipes */</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;gfx.mec.num_mec; ++i) {</div><div class='add'>+			for (j = 0; j &lt; adev-&gt;gfx.mec.num_queue_per_pipe; j++) {</div><div class='add'>+				for (k = 0; k &lt; adev-&gt;gfx.mec.num_pipe_per_mec; k++) {</div><div class='add'>+					if (!amdgpu_gfx_is_mec_queue_enabled(adev,</div><div class='add'>+									     0, i, k, j))</div><div class='add'>+						continue;</div><div class='ctx'> </div><div class='del'>-				r = gfx_v12_0_compute_ring_init(adev, ring_id,</div><div class='del'>-								i, k, j);</div><div class='del'>-				if (r)</div><div class='del'>-					return r;</div><div class='add'>+					r = gfx_v12_0_compute_ring_init(adev, ring_id,</div><div class='add'>+									i, k, j);</div><div class='add'>+					if (r)</div><div class='add'>+						return r;</div><div class='ctx'> </div><div class='del'>-				ring_id++;</div><div class='add'>+					ring_id++;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2324,7 +2390,7 @@ static int gfx_v12_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device *adev)</div><div class='ctx'> 	amdgpu_bo_unreserve(adev-&gt;gfx.pfp.pfp_fw_data_obj);</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	WREG32_SOC15(GC, 0, regCP_PFP_IC_BASE_LO,</div><div class='ctx'> 		lower_32_bits(adev-&gt;gfx.pfp.pfp_fw_gpu_addr));</div><div class='hunk'>@@ -2468,7 +2534,7 @@ static int gfx_v12_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device *adev)</div><div class='ctx'> 	amdgpu_bo_unreserve(adev-&gt;gfx.me.me_fw_data_obj);</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_emu_mode == 1)</div><div class='del'>-		adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+		amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	WREG32_SOC15(GC, 0, regCP_ME_IC_BASE_LO,</div><div class='ctx'> 		lower_32_bits(adev-&gt;gfx.me.me_fw_gpu_addr));</div><div class='hunk'>@@ -2948,6 +3014,8 @@ static int gfx_v12_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, BUF_SWAP, 1);</div><div class='ctx'> #endif</div><div class='add'>+	if (prop-&gt;tmz_queue)</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);</div><div class='ctx'> 	mqd-&gt;cp_gfx_hqd_cntl = tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* set up cp_doorbell_control */</div><div class='hunk'>@@ -2968,6 +3036,14 @@ static int gfx_v12_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> 	/* active the queue */</div><div class='ctx'> 	mqd-&gt;cp_gfx_hqd_active = 1;</div><div class='ctx'> </div><div class='add'>+	/* set gfx UQ items */</div><div class='add'>+	mqd-&gt;shadow_base_lo = lower_32_bits(prop-&gt;shadow_addr);</div><div class='add'>+	mqd-&gt;shadow_base_hi = upper_32_bits(prop-&gt;shadow_addr);</div><div class='add'>+	mqd-&gt;fw_work_area_base_lo = lower_32_bits(prop-&gt;csa_addr);</div><div class='add'>+	mqd-&gt;fw_work_area_base_hi = upper_32_bits(prop-&gt;csa_addr);</div><div class='add'>+	mqd-&gt;fence_address_lo = lower_32_bits(prop-&gt;fence_address);</div><div class='add'>+	mqd-&gt;fence_address_hi = upper_32_bits(prop-&gt;fence_address);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3091,6 +3167,8 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH, 0);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);</div><div class='ctx'> 	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);</div><div class='add'>+	if (prop-&gt;tmz_queue)</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);</div><div class='ctx'> 	mqd-&gt;cp_hqd_pq_control = tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* set the wb address whether it's enabled or not */</div><div class='hunk'>@@ -3142,6 +3220,10 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,</div><div class='ctx'> </div><div class='ctx'> 	mqd-&gt;cp_hqd_active = prop-&gt;hqd_active;</div><div class='ctx'> </div><div class='add'>+	/* set UQ fenceaddress */</div><div class='add'>+	mqd-&gt;fence_address_lo = lower_32_bits(prop-&gt;fence_address);</div><div class='add'>+	mqd-&gt;fence_address_hi = upper_32_bits(prop-&gt;fence_address);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3426,7 +3508,7 @@ static int gfx_v12_0_gfxhub_enable(struct amdgpu_device *adev)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?</div><div class='ctx'> 		false : true;</div><div class='hunk'>@@ -3600,6 +3682,49 @@ static int gfx_v12_0_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gfx_v12_0_set_userq_eop_interrupts(struct amdgpu_device *adev,</div><div class='add'>+					      bool enable)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq_type;</div><div class='add'>+	int m, p, r;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;userq_funcs[AMDGPU_HW_IP_GFX]) {</div><div class='add'>+		for (m = 0; m &lt; adev-&gt;gfx.me.num_me; m++) {</div><div class='add'>+			for (p = 0; p &lt; adev-&gt;gfx.me.num_pipe_per_me; p++) {</div><div class='add'>+				irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p;</div><div class='add'>+				if (enable)</div><div class='add'>+					r = amdgpu_irq_get(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				else</div><div class='add'>+					r = amdgpu_irq_put(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				if (r)</div><div class='add'>+					return r;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;userq_funcs[AMDGPU_HW_IP_COMPUTE]) {</div><div class='add'>+		for (m = 0; m &lt; adev-&gt;gfx.mec.num_mec; ++m) {</div><div class='add'>+			for (p = 0; p &lt; adev-&gt;gfx.mec.num_pipe_per_mec; p++) {</div><div class='add'>+				irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP</div><div class='add'>+					+ (m * adev-&gt;gfx.mec.num_pipe_per_mec)</div><div class='add'>+					+ p;</div><div class='add'>+				if (enable)</div><div class='add'>+					r = amdgpu_irq_get(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				else</div><div class='add'>+					r = amdgpu_irq_put(adev, &amp;adev-&gt;gfx.eop_irq,</div><div class='add'>+							   irq_type);</div><div class='add'>+				if (r)</div><div class='add'>+					return r;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfx_v12_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='hunk'>@@ -3610,6 +3735,7 @@ static int gfx_v12_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	amdgpu_irq_put(adev, &amp;adev-&gt;gfx.priv_reg_irq, 0);</div><div class='ctx'> 	amdgpu_irq_put(adev, &amp;adev-&gt;gfx.priv_inst_irq, 0);</div><div class='ctx'> 	amdgpu_irq_put(adev, &amp;adev-&gt;gfx.bad_op_irq, 0);</div><div class='add'>+	gfx_v12_0_set_userq_eop_interrupts(adev, false);</div><div class='ctx'> </div><div class='ctx'> 	if (!adev-&gt;no_hw_access) {</div><div class='ctx'> 		if (amdgpu_async_gfx_ring) {</div><div class='hunk'>@@ -3698,11 +3824,33 @@ static int gfx_v12_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='add'>+	switch (amdgpu_user_queue) {</div><div class='add'>+	case -1:</div><div class='add'>+	case 0:</div><div class='add'>+	default:</div><div class='add'>+		adev-&gt;gfx.disable_kq = false;</div><div class='add'>+		adev-&gt;gfx.disable_uq = true;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		adev-&gt;gfx.disable_kq = false;</div><div class='add'>+		adev-&gt;gfx.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		adev-&gt;gfx.disable_kq = true;</div><div class='add'>+		adev-&gt;gfx.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	adev-&gt;gfx.funcs = &amp;gfx_v12_0_gfx_funcs;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;gfx.num_gfx_rings = GFX12_NUM_GFX_RINGS;</div><div class='del'>-	adev-&gt;gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),</div><div class='del'>-					  AMDGPU_MAX_COMPUTE_RINGS);</div><div class='add'>+	if (adev-&gt;gfx.disable_kq) {</div><div class='add'>+		adev-&gt;gfx.num_gfx_rings = 0;</div><div class='add'>+		adev-&gt;gfx.num_compute_rings = 0;</div><div class='add'>+	} else {</div><div class='add'>+		adev-&gt;gfx.num_gfx_rings = GFX12_NUM_GFX_RINGS;</div><div class='add'>+		adev-&gt;gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),</div><div class='add'>+						  AMDGPU_MAX_COMPUTE_RINGS);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	gfx_v12_0_set_kiq_pm4_funcs(adev);</div><div class='ctx'> 	gfx_v12_0_set_ring_funcs(adev);</div><div class='hunk'>@@ -3733,6 +3881,10 @@ static int gfx_v12_0_late_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='add'>+	r = gfx_v12_0_set_userq_eop_interrupts(adev, true);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4172,45 +4324,17 @@ static u64 gfx_v12_0_ring_get_wptr_gfx(struct amdgpu_ring *ring)</div><div class='ctx'> static void gfx_v12_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='del'>-	uint32_t *wptr_saved;</div><div class='del'>-	uint32_t *is_queue_unmap;</div><div class='del'>-	uint64_t aggregated_db_index;</div><div class='del'>-	uint32_t mqd_size = adev-&gt;mqds[AMDGPU_HW_IP_GFX].mqd_size;</div><div class='del'>-	uint64_t wptr_tmp;</div><div class='del'>-</div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		wptr_saved = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size);</div><div class='del'>-		is_queue_unmap = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size +</div><div class='del'>-					      sizeof(uint32_t));</div><div class='del'>-		aggregated_db_index =</div><div class='del'>-			amdgpu_mes_get_aggregated_doorbell_index(adev,</div><div class='del'>-								 ring-&gt;hw_prio);</div><div class='del'>-</div><div class='del'>-		wptr_tmp = ring-&gt;wptr &amp; ring-&gt;buf_mask;</div><div class='del'>-		atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr, wptr_tmp);</div><div class='del'>-		*wptr_saved = wptr_tmp;</div><div class='del'>-		/* assume doorbell always being used by mes mapped queue */</div><div class='del'>-		if (*is_queue_unmap) {</div><div class='del'>-			WDOORBELL64(aggregated_db_index, wptr_tmp);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, wptr_tmp);</div><div class='del'>-		} else {</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, wptr_tmp);</div><div class='ctx'> </div><div class='del'>-			if (*is_queue_unmap)</div><div class='del'>-				WDOORBELL64(aggregated_db_index, wptr_tmp);</div><div class='del'>-		}</div><div class='add'>+	if (ring-&gt;use_doorbell) {</div><div class='add'>+		/* XXX check if swapping is necessary on BE */</div><div class='add'>+		atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='add'>+			     ring-&gt;wptr);</div><div class='add'>+		WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (ring-&gt;use_doorbell) {</div><div class='del'>-			/* XXX check if swapping is necessary on BE */</div><div class='del'>-			atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='del'>-				     ring-&gt;wptr);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr);</div><div class='del'>-		} else {</div><div class='del'>-			WREG32_SOC15(GC, 0, regCP_RB0_WPTR,</div><div class='del'>-				     lower_32_bits(ring-&gt;wptr));</div><div class='del'>-			WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI,</div><div class='del'>-				     upper_32_bits(ring-&gt;wptr));</div><div class='del'>-		}</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_RB0_WPTR,</div><div class='add'>+			     lower_32_bits(ring-&gt;wptr));</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI,</div><div class='add'>+			     upper_32_bits(ring-&gt;wptr));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4235,42 +4359,14 @@ static u64 gfx_v12_0_ring_get_wptr_compute(struct amdgpu_ring *ring)</div><div class='ctx'> static void gfx_v12_0_ring_set_wptr_compute(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='del'>-	uint32_t *wptr_saved;</div><div class='del'>-	uint32_t *is_queue_unmap;</div><div class='del'>-	uint64_t aggregated_db_index;</div><div class='del'>-	uint32_t mqd_size = adev-&gt;mqds[AMDGPU_HW_IP_COMPUTE].mqd_size;</div><div class='del'>-	uint64_t wptr_tmp;</div><div class='del'>-</div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		wptr_saved = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size);</div><div class='del'>-		is_queue_unmap = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size +</div><div class='del'>-					      sizeof(uint32_t));</div><div class='del'>-		aggregated_db_index =</div><div class='del'>-			amdgpu_mes_get_aggregated_doorbell_index(adev,</div><div class='del'>-								 ring-&gt;hw_prio);</div><div class='del'>-</div><div class='del'>-		wptr_tmp = ring-&gt;wptr &amp; ring-&gt;buf_mask;</div><div class='del'>-		atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr, wptr_tmp);</div><div class='del'>-		*wptr_saved = wptr_tmp;</div><div class='del'>-		/* assume doorbell always used by mes mapped queue */</div><div class='del'>-		if (*is_queue_unmap) {</div><div class='del'>-			WDOORBELL64(aggregated_db_index, wptr_tmp);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, wptr_tmp);</div><div class='del'>-		} else {</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, wptr_tmp);</div><div class='ctx'> </div><div class='del'>-			if (*is_queue_unmap)</div><div class='del'>-				WDOORBELL64(aggregated_db_index, wptr_tmp);</div><div class='del'>-		}</div><div class='add'>+	/* XXX check if swapping is necessary on BE */</div><div class='add'>+	if (ring-&gt;use_doorbell) {</div><div class='add'>+		atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='add'>+			     ring-&gt;wptr);</div><div class='add'>+		WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr);</div><div class='ctx'> 	} else {</div><div class='del'>-		/* XXX check if swapping is necessary on BE */</div><div class='del'>-		if (ring-&gt;use_doorbell) {</div><div class='del'>-			atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='del'>-				     ring-&gt;wptr);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr);</div><div class='del'>-		} else {</div><div class='del'>-			BUG(); /* only DOORBELL method supported on gfx12 now */</div><div class='del'>-		}</div><div class='add'>+		BUG(); /* only DOORBELL method supported on gfx12 now */</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4317,10 +4413,6 @@ static void gfx_v12_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,</div><div class='ctx'> </div><div class='ctx'> 	control |= ib-&gt;length_dw | (vmid &lt;&lt; 24);</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		/* inherit vmid from mqd */</div><div class='del'>-		control |= 0x400000;</div><div class='del'>-</div><div class='ctx'> 	amdgpu_ring_write(ring, header);</div><div class='ctx'> 	BUG_ON(ib-&gt;gpu_addr &amp; 0x3); /* Dword align */</div><div class='ctx'> 	amdgpu_ring_write(ring,</div><div class='hunk'>@@ -4340,10 +4432,6 @@ static void gfx_v12_0_ring_emit_ib_compute(struct amdgpu_ring *ring,</div><div class='ctx'> 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);</div><div class='ctx'> 	u32 control = INDIRECT_BUFFER_VALID | ib-&gt;length_dw | (vmid &lt;&lt; 24);</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		/* inherit vmid from mqd */</div><div class='del'>-		control |= 0x40000000;</div><div class='del'>-</div><div class='ctx'> 	amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));</div><div class='ctx'> 	BUG_ON(ib-&gt;gpu_addr &amp; 0x3); /* Dword align */</div><div class='ctx'> 	amdgpu_ring_write(ring,</div><div class='hunk'>@@ -4383,8 +4471,7 @@ static void gfx_v12_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,</div><div class='ctx'> 	amdgpu_ring_write(ring, upper_32_bits(addr));</div><div class='ctx'> 	amdgpu_ring_write(ring, lower_32_bits(seq));</div><div class='ctx'> 	amdgpu_ring_write(ring, upper_32_bits(seq));</div><div class='del'>-	amdgpu_ring_write(ring, ring-&gt;is_mes_queue ?</div><div class='del'>-			 (ring-&gt;hw_queue_id | AMDGPU_FENCE_MES_QUEUE_FLAG) : 0);</div><div class='add'>+	amdgpu_ring_write(ring, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v12_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)</div><div class='hunk'>@@ -4412,10 +4499,7 @@ static void gfx_v12_0_ring_invalidate_tlbs(struct amdgpu_ring *ring,</div><div class='ctx'> static void gfx_v12_0_ring_emit_vm_flush(struct amdgpu_ring *ring,</div><div class='ctx'> 					 unsigned vmid, uint64_t pd_addr)</div><div class='ctx'> {</div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		gfx_v12_0_ring_invalidate_tlbs(ring, 0, 0, false, 0);</div><div class='del'>-	else</div><div class='del'>-		amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);</div><div class='add'>+	amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr);</div><div class='ctx'> </div><div class='ctx'> 	/* compute doesn't have PFP */</div><div class='ctx'> 	if (ring-&gt;funcs-&gt;type == AMDGPU_RING_TYPE_GFX) {</div><div class='hunk'>@@ -4749,25 +4833,23 @@ static int gfx_v12_0_eop_irq(struct amdgpu_device *adev,</div><div class='ctx'> 			     struct amdgpu_irq_src *source,</div><div class='ctx'> 			     struct amdgpu_iv_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	u32 doorbell_offset = entry-&gt;src_data[0];</div><div class='ctx'> 	u8 me_id, pipe_id, queue_id;</div><div class='ctx'> 	struct amdgpu_ring *ring;</div><div class='del'>-	uint32_t mes_queue_id = entry-&gt;src_data[0];</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("IH: CP EOP\n");</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;enable_mes &amp;&amp; (mes_queue_id &amp; AMDGPU_FENCE_MES_QUEUE_FLAG)) {</div><div class='del'>-		struct amdgpu_mes_queue *queue;</div><div class='add'>+	if (adev-&gt;enable_mes &amp;&amp; doorbell_offset) {</div><div class='add'>+		struct amdgpu_userq_fence_driver *fence_drv = NULL;</div><div class='add'>+		struct xarray *xa = &amp;adev-&gt;userq_xa;</div><div class='add'>+		unsigned long flags;</div><div class='ctx'> </div><div class='del'>-		mes_queue_id &amp;= AMDGPU_FENCE_MES_QUEUE_ID_MASK;</div><div class='del'>-</div><div class='del'>-		spin_lock(&amp;adev-&gt;mes.queue_id_lock);</div><div class='del'>-		queue = idr_find(&amp;adev-&gt;mes.queue_id_idr, mes_queue_id);</div><div class='del'>-		if (queue) {</div><div class='del'>-			DRM_DEBUG("process mes queue id = %d\n", mes_queue_id);</div><div class='del'>-			amdgpu_fence_process(queue-&gt;ring);</div><div class='del'>-		}</div><div class='del'>-		spin_unlock(&amp;adev-&gt;mes.queue_id_lock);</div><div class='add'>+		xa_lock_irqsave(xa, flags);</div><div class='add'>+		fence_drv = xa_load(xa, doorbell_offset);</div><div class='add'>+		if (fence_drv)</div><div class='add'>+			amdgpu_userq_fence_driver_process(fence_drv);</div><div class='add'>+		xa_unlock_irqrestore(xa, flags);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		me_id = (entry-&gt;ring_id &amp; 0x0c) &gt;&gt; 2;</div><div class='ctx'> 		pipe_id = (entry-&gt;ring_id &amp; 0x03) &gt;&gt; 0;</div><div class='hunk'>@@ -4934,27 +5016,29 @@ static void gfx_v12_0_handle_priv_fault(struct amdgpu_device *adev,</div><div class='ctx'> 	pipe_id = (entry-&gt;ring_id &amp; 0x03) &gt;&gt; 0;</div><div class='ctx'> 	queue_id = (entry-&gt;ring_id &amp; 0x70) &gt;&gt; 4;</div><div class='ctx'> </div><div class='del'>-	switch (me_id) {</div><div class='del'>-	case 0:</div><div class='del'>-		for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++) {</div><div class='del'>-			ring = &amp;adev-&gt;gfx.gfx_ring[i];</div><div class='del'>-			if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='del'>-			    ring-&gt;queue == queue_id)</div><div class='del'>-				drm_sched_fault(&amp;ring-&gt;sched);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-	case 2:</div><div class='del'>-		for (i = 0; i &lt; adev-&gt;gfx.num_compute_rings; i++) {</div><div class='del'>-			ring = &amp;adev-&gt;gfx.compute_ring[i];</div><div class='del'>-			if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='del'>-			    ring-&gt;queue == queue_id)</div><div class='del'>-				drm_sched_fault(&amp;ring-&gt;sched);</div><div class='add'>+	if (!adev-&gt;gfx.disable_kq) {</div><div class='add'>+		switch (me_id) {</div><div class='add'>+		case 0:</div><div class='add'>+			for (i = 0; i &lt; adev-&gt;gfx.num_gfx_rings; i++) {</div><div class='add'>+				ring = &amp;adev-&gt;gfx.gfx_ring[i];</div><div class='add'>+				if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='add'>+				    ring-&gt;queue == queue_id)</div><div class='add'>+					drm_sched_fault(&amp;ring-&gt;sched);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+		case 2:</div><div class='add'>+			for (i = 0; i &lt; adev-&gt;gfx.num_compute_rings; i++) {</div><div class='add'>+				ring = &amp;adev-&gt;gfx.compute_ring[i];</div><div class='add'>+				if (ring-&gt;me == me_id &amp;&amp; ring-&gt;pipe == pipe_id &amp;&amp;</div><div class='add'>+				    ring-&gt;queue == queue_id)</div><div class='add'>+					drm_sched_fault(&amp;ring-&gt;sched);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			BUG();</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		BUG();</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5160,6 +5244,69 @@ static void gfx_v12_ip_dump(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	amdgpu_gfx_off_ctrl(adev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool gfx_v12_pipe_reset_support(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	/* Disable the pipe reset until the CPFW fully support it.*/</div><div class='add'>+	dev_warn_once(adev-&gt;dev, "The CPFW hasn't support pipe reset yet.\n");</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gfx_v12_reset_gfx_pipe(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	uint32_t reset_pipe = 0, clean_pipe = 0;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	if (!gfx_v12_pipe_reset_support(adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	gfx_v12_0_set_safe_mode(adev, 0);</div><div class='add'>+	mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	soc24_grbm_select(adev, ring-&gt;me, ring-&gt;pipe, ring-&gt;queue, 0);</div><div class='add'>+</div><div class='add'>+	switch (ring-&gt;pipe) {</div><div class='add'>+	case 0:</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE0_RESET, 1);</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE0_RESET, 1);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE0_RESET, 0);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE0_RESET, 0);</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE1_RESET, 1);</div><div class='add'>+		reset_pipe = REG_SET_FIELD(reset_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE1_RESET, 1);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   PFP_PIPE1_RESET, 0);</div><div class='add'>+		clean_pipe = REG_SET_FIELD(clean_pipe, CP_ME_CNTL,</div><div class='add'>+					   ME_PIPE1_RESET, 0);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG32_SOC15(GC, 0, regCP_ME_CNTL, reset_pipe);</div><div class='add'>+	WREG32_SOC15(GC, 0, regCP_ME_CNTL, clean_pipe);</div><div class='add'>+</div><div class='add'>+	r = (RREG32(SOC15_REG_OFFSET(GC, 0, regCP_GFX_RS64_INSTR_PNTR1)) &lt;&lt; 2) -</div><div class='add'>+					RS64_FW_UC_START_ADDR_LO;</div><div class='add'>+	soc24_grbm_select(adev, 0, 0, 0, 0);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	gfx_v12_0_unset_safe_mode(adev, 0);</div><div class='add'>+</div><div class='add'>+	dev_info(adev-&gt;dev, "The ring %s pipe reset: %s\n", ring-&gt;name,</div><div class='add'>+			r == 0 ? "successfully" : "failed");</div><div class='add'>+	/* Sometimes the ME start pc counter can't cache correctly, so the</div><div class='add'>+	 * PC check only as a reference and pipe reset result rely on the</div><div class='add'>+	 * later ring test.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='hunk'>@@ -5170,8 +5317,10 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_mes_reset_legacy_queue(ring-&gt;adev, ring, vmid, false);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "reset via MES failed %d\n", r);</div><div class='del'>-		return r;</div><div class='add'>+		dev_warn(adev-&gt;dev, "reset via MES failed and try pipe reset %d\n", r);</div><div class='add'>+		r = gfx_v12_reset_gfx_pipe(ring);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = gfx_v12_0_kgq_init_queue(ring, true);</div><div class='hunk'>@@ -5189,6 +5338,89 @@ static int gfx_v12_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> 	return amdgpu_ring_test_ring(ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gfx_v12_0_reset_compute_pipe(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	uint32_t reset_pipe = 0, clean_pipe = 0;</div><div class='add'>+	int r = 0;</div><div class='add'>+</div><div class='add'>+	if (!gfx_v12_pipe_reset_support(adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	gfx_v12_0_set_safe_mode(adev, 0);</div><div class='add'>+	mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	soc24_grbm_select(adev, ring-&gt;me, ring-&gt;pipe, ring-&gt;queue, 0);</div><div class='add'>+</div><div class='add'>+	reset_pipe = RREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL);</div><div class='add'>+	clean_pipe = reset_pipe;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;gfx.rs64_enable) {</div><div class='add'>+		switch (ring-&gt;pipe) {</div><div class='add'>+		case 0:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE0_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE0_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE1_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE1_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE2_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE2_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE3_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_RS64_CNTL,</div><div class='add'>+						   MEC_PIPE3_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, reset_pipe);</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_RS64_CNTL, clean_pipe);</div><div class='add'>+		r = (RREG32_SOC15(GC, 0, regCP_MEC_RS64_INSTR_PNTR) &lt;&lt; 2) -</div><div class='add'>+				RS64_FW_UC_START_ADDR_LO;</div><div class='add'>+	} else {</div><div class='add'>+		switch (ring-&gt;pipe) {</div><div class='add'>+		case 0:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE0_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE0_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			reset_pipe = REG_SET_FIELD(reset_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE1_RESET, 1);</div><div class='add'>+			clean_pipe = REG_SET_FIELD(clean_pipe, CP_MEC_CNTL,</div><div class='add'>+							   MEC_ME1_PIPE1_RESET, 0);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+		break;</div><div class='add'>+		}</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_CNTL, reset_pipe);</div><div class='add'>+		WREG32_SOC15(GC, 0, regCP_MEC_CNTL, clean_pipe);</div><div class='add'>+		/* Doesn't find the F32 MEC instruction pointer register, and suppose</div><div class='add'>+		 * the driver won't run into the F32 mode.</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	soc24_grbm_select(adev, 0, 0, 0, 0);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	gfx_v12_0_unset_safe_mode(adev, 0);</div><div class='add'>+</div><div class='add'>+	dev_info(adev-&gt;dev, "The ring %s pipe resets: %s\n", ring-&gt;name,</div><div class='add'>+			r == 0 ? "successfully" : "failed");</div><div class='add'>+	/* Need the ring test to verify the pipe reset result.*/</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfx_v12_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='hunk'>@@ -5199,8 +5431,10 @@ static int gfx_v12_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_mes_reset_legacy_queue(ring-&gt;adev, ring, vmid, true);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "reset via MMIO failed %d\n", r);</div><div class='del'>-		return r;</div><div class='add'>+		dev_warn(adev-&gt;dev, "fail(%d) to reset kcq  and try pipe reset\n", r);</div><div class='add'>+		r = gfx_v12_0_reset_compute_pipe(ring);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = gfx_v12_0_kcq_init_queue(ring, true);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c<br/>index 13fbee46417a..70d7a1f434c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c</a></div><div class='hunk'>@@ -53,6 +53,9 @@</div><div class='ctx'> #define VERDE_GB_ADDR_CONFIG_GOLDEN         0x12010002</div><div class='ctx'> #define HAINAN_GB_ADDR_CONFIG_GOLDEN        0x02010001</div><div class='ctx'> </div><div class='add'>+#define GFX6_NUM_GFX_RINGS     1</div><div class='add'>+#define GFX6_NUM_COMPUTE_RINGS 2</div><div class='add'>+</div><div class='ctx'> static void gfx_v6_0_set_ring_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void gfx_v6_0_set_irq_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void gfx_v6_0_get_cu_info(struct amdgpu_device *adev);</div><div class='hunk'>@@ -1732,10 +1735,14 @@ static void gfx_v6_0_constants_init(struct amdgpu_device *adev)</div><div class='ctx'> 	gfx_v6_0_get_cu_info(adev);</div><div class='ctx'> 	gfx_v6_0_config_init(adev);</div><div class='ctx'> </div><div class='del'>-	WREG32(mmCP_QUEUE_THRESHOLDS, ((0x16 &lt;&lt; CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT) |</div><div class='del'>-				       (0x2b &lt;&lt; CP_QUEUE_THRESHOLDS__ROQ_IB2_START__SHIFT)));</div><div class='del'>-	WREG32(mmCP_MEQ_THRESHOLDS, (0x30 &lt;&lt; CP_MEQ_THRESHOLDS__MEQ1_START__SHIFT) |</div><div class='del'>-				    (0x60 &lt;&lt; CP_MEQ_THRESHOLDS__MEQ2_START__SHIFT));</div><div class='add'>+	WREG32(mmCP_QUEUE_THRESHOLDS,</div><div class='add'>+		((0x16 &lt;&lt; CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT) |</div><div class='add'>+		(0x2b &lt;&lt; CP_QUEUE_THRESHOLDS__ROQ_IB2_START__SHIFT)));</div><div class='add'>+</div><div class='add'>+	/* set HW defaults for 3D engine */</div><div class='add'>+	WREG32(mmCP_MEQ_THRESHOLDS,</div><div class='add'>+		(0x30 &lt;&lt; CP_MEQ_THRESHOLDS__MEQ1_START__SHIFT) |</div><div class='add'>+		(0x60 &lt;&lt; CP_MEQ_THRESHOLDS__MEQ2_START__SHIFT));</div><div class='ctx'> </div><div class='ctx'> 	sx_debug_1 = RREG32(mmSX_DEBUG_1);</div><div class='ctx'> 	WREG32(mmSX_DEBUG_1, sx_debug_1);</div><div class='hunk'>@@ -2851,44 +2858,21 @@ static u32 gfx_v6_0_get_csb_size(struct amdgpu_device *adev)</div><div class='ctx'> static void gfx_v6_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 				    volatile u32 *buffer)</div><div class='ctx'> {</div><div class='del'>-	u32 count = 0, i;</div><div class='del'>-	const struct cs_section_def *sect = NULL;</div><div class='del'>-	const struct cs_extent_def *ext = NULL;</div><div class='add'>+	u32 count = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;gfx.rlc.cs_data == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (buffer == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-</div><div class='del'>-	for (sect = adev-&gt;gfx.rlc.cs_data; sect-&gt;section != NULL; ++sect) {</div><div class='del'>-		for (ext = sect-&gt;section; ext-&gt;extent != NULL; ++ext) {</div><div class='del'>-			if (sect-&gt;id == SECT_CONTEXT) {</div><div class='del'>-				buffer[count++] =</div><div class='del'>-					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext-&gt;reg_count));</div><div class='del'>-				buffer[count++] = cpu_to_le32(ext-&gt;reg_index - 0xa000);</div><div class='del'>-				for (i = 0; i &lt; ext-&gt;reg_count; i++)</div><div class='del'>-					buffer[count++] = cpu_to_le32(ext-&gt;extent[i]);</div><div class='del'>-			} else {</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	count = amdgpu_gfx_csb_preamble_start(buffer);</div><div class='add'>+	count = amdgpu_gfx_csb_data_parser(adev, buffer, count);</div><div class='ctx'> </div><div class='ctx'> 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(adev-&gt;gfx.config.rb_config[0][0].raster_config);</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0);</div><div class='add'>+	amdgpu_gfx_csb_preamble_end(buffer, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v6_0_init_pg(struct amdgpu_device *adev)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c<br/>index 8181bd0e4f18..da0534ff1271 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c</a></div><div class='hunk'>@@ -55,6 +55,9 @@</div><div class='ctx'> #define GFX7_NUM_GFX_RINGS     1</div><div class='ctx'> #define GFX7_MEC_HPD_SIZE      2048</div><div class='ctx'> </div><div class='add'>+#define BONAIRE_GB_ADDR_CONFIG_GOLDEN        0x12010001</div><div class='add'>+#define HAWAII_GB_ADDR_CONFIG_GOLDEN         0x12011003</div><div class='add'>+</div><div class='ctx'> static void gfx_v7_0_set_ring_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void gfx_v7_0_set_irq_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void gfx_v7_0_set_gds_init(struct amdgpu_device *adev);</div><div class='hunk'>@@ -3882,67 +3885,22 @@ static u32 gfx_v7_0_get_csb_size(struct amdgpu_device *adev)</div><div class='ctx'> static void gfx_v7_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 				    volatile u32 *buffer)</div><div class='ctx'> {</div><div class='del'>-	u32 count = 0, i;</div><div class='del'>-	const struct cs_section_def *sect = NULL;</div><div class='del'>-	const struct cs_extent_def *ext = NULL;</div><div class='add'>+	u32 count = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;gfx.rlc.cs_data == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (buffer == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-</div><div class='del'>-	for (sect = adev-&gt;gfx.rlc.cs_data; sect-&gt;section != NULL; ++sect) {</div><div class='del'>-		for (ext = sect-&gt;section; ext-&gt;extent != NULL; ++ext) {</div><div class='del'>-			if (sect-&gt;id == SECT_CONTEXT) {</div><div class='del'>-				buffer[count++] =</div><div class='del'>-					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext-&gt;reg_count));</div><div class='del'>-				buffer[count++] = cpu_to_le32(ext-&gt;reg_index - PACKET3_SET_CONTEXT_REG_START);</div><div class='del'>-				for (i = 0; i &lt; ext-&gt;reg_count; i++)</div><div class='del'>-					buffer[count++] = cpu_to_le32(ext-&gt;extent[i]);</div><div class='del'>-			} else {</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	count = amdgpu_gfx_csb_preamble_start(buffer);</div><div class='add'>+	count = amdgpu_gfx_csb_data_parser(adev, buffer, count);</div><div class='ctx'> </div><div class='ctx'> 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);</div><div class='del'>-	switch (adev-&gt;asic_type) {</div><div class='del'>-	case CHIP_BONAIRE:</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x16000012);</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x00000000);</div><div class='del'>-		break;</div><div class='del'>-	case CHIP_KAVERI:</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x00000000); /* XXX */</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x00000000);</div><div class='del'>-		break;</div><div class='del'>-	case CHIP_KABINI:</div><div class='del'>-	case CHIP_MULLINS:</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x00000000); /* XXX */</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x00000000);</div><div class='del'>-		break;</div><div class='del'>-	case CHIP_HAWAII:</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x3a00161a);</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x0000002e);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x00000000);</div><div class='del'>-		buffer[count++] = cpu_to_le32(0x00000000);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);</div><div class='add'>+	buffer[count++] = cpu_to_le32(adev-&gt;gfx.config.rb_config[0][0].raster_config);</div><div class='add'>+	buffer[count++] = cpu_to_le32(adev-&gt;gfx.config.rb_config[0][0].raster_config_1);</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0);</div><div class='add'>+	amdgpu_gfx_csb_preamble_end(buffer, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v7_0_init_pg(struct amdgpu_device *adev)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c<br/>index bfedd487efc5..5ee2237d8ee8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c</a></div><div class='hunk'>@@ -1223,48 +1223,22 @@ out:</div><div class='ctx'> static void gfx_v8_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 				    volatile u32 *buffer)</div><div class='ctx'> {</div><div class='del'>-	u32 count = 0, i;</div><div class='del'>-	const struct cs_section_def *sect = NULL;</div><div class='del'>-	const struct cs_extent_def *ext = NULL;</div><div class='add'>+	u32 count = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;gfx.rlc.cs_data == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (buffer == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-</div><div class='del'>-	for (sect = adev-&gt;gfx.rlc.cs_data; sect-&gt;section != NULL; ++sect) {</div><div class='del'>-		for (ext = sect-&gt;section; ext-&gt;extent != NULL; ++ext) {</div><div class='del'>-			if (sect-&gt;id == SECT_CONTEXT) {</div><div class='del'>-				buffer[count++] =</div><div class='del'>-					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext-&gt;reg_count));</div><div class='del'>-				buffer[count++] = cpu_to_le32(ext-&gt;reg_index -</div><div class='del'>-						PACKET3_SET_CONTEXT_REG_START);</div><div class='del'>-				for (i = 0; i &lt; ext-&gt;reg_count; i++)</div><div class='del'>-					buffer[count++] = cpu_to_le32(ext-&gt;extent[i]);</div><div class='del'>-			} else {</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	count = amdgpu_gfx_csb_preamble_start(buffer);</div><div class='add'>+	count = amdgpu_gfx_csb_data_parser(adev, buffer, count);</div><div class='ctx'> </div><div class='ctx'> 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));</div><div class='del'>-	buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG -</div><div class='del'>-			PACKET3_SET_CONTEXT_REG_START);</div><div class='add'>+	buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(adev-&gt;gfx.config.rb_config[0][0].raster_config);</div><div class='ctx'> 	buffer[count++] = cpu_to_le32(adev-&gt;gfx.config.rb_config[0][0].raster_config_1);</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0);</div><div class='add'>+	amdgpu_gfx_csb_preamble_end(buffer, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gfx_v8_0_cp_jump_table_num(struct amdgpu_device *adev)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c<br/>index d7db4cb907ae..d377a7c57d5e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c</a></div><div class='hunk'>@@ -225,17 +225,36 @@ static const struct amdgpu_hwip_reg_entry gc_reg_list_9[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_SMU_SAFE_MODE),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_INT_STAT),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmRLC_GPM_GENERAL_6),</div><div class='del'>-	/* cp header registers */</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME2_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='ctx'> 	/* SE status registers */</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE0),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE1),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE2),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE3)</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS_SE3),</div><div class='add'>+	/* packet headers */</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_CE_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_PFP_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_ME_HEADER_DUMP)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_hwip_reg_entry gc_cp_reg_list_9[] = {</div><div class='hunk'>@@ -277,6 +296,14 @@ static const struct amdgpu_hwip_reg_entry gc_cp_reg_list_9[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_LO),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_HI),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_GFX_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, mmCP_MEC_ME1_HEADER_DUMP)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ta_ras_gfx_subblock {</div><div class='hunk'>@@ -1624,42 +1651,16 @@ static u32 gfx_v9_0_get_csb_size(struct amdgpu_device *adev)</div><div class='ctx'> static void gfx_v9_0_get_csb_buffer(struct amdgpu_device *adev,</div><div class='ctx'> 				    volatile u32 *buffer)</div><div class='ctx'> {</div><div class='del'>-	u32 count = 0, i;</div><div class='del'>-	const struct cs_section_def *sect = NULL;</div><div class='del'>-	const struct cs_extent_def *ext = NULL;</div><div class='add'>+	u32 count = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;gfx.rlc.cs_data == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> 	if (buffer == NULL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-	buffer[count++] = cpu_to_le32(0x80000000);</div><div class='del'>-</div><div class='del'>-	for (sect = adev-&gt;gfx.rlc.cs_data; sect-&gt;section != NULL; ++sect) {</div><div class='del'>-		for (ext = sect-&gt;section; ext-&gt;extent != NULL; ++ext) {</div><div class='del'>-			if (sect-&gt;id == SECT_CONTEXT) {</div><div class='del'>-				buffer[count++] =</div><div class='del'>-					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext-&gt;reg_count));</div><div class='del'>-				buffer[count++] = cpu_to_le32(ext-&gt;reg_index -</div><div class='del'>-						PACKET3_SET_CONTEXT_REG_START);</div><div class='del'>-				for (i = 0; i &lt; ext-&gt;reg_count; i++)</div><div class='del'>-					buffer[count++] = cpu_to_le32(ext-&gt;extent[i]);</div><div class='del'>-			} else {</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);</div><div class='del'>-</div><div class='del'>-	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));</div><div class='del'>-	buffer[count++] = cpu_to_le32(0);</div><div class='add'>+	count = amdgpu_gfx_csb_preamble_start(buffer);</div><div class='add'>+	count = amdgpu_gfx_csb_data_parser(adev, buffer, count);</div><div class='add'>+	amdgpu_gfx_csb_preamble_end(buffer, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v9_0_init_always_on_cu_mask(struct amdgpu_device *adev)</div><div class='hunk'>@@ -5441,16 +5442,8 @@ static void gfx_v9_0_ring_patch_ce_meta(struct amdgpu_ring *ring,</div><div class='ctx'> </div><div class='ctx'> 	payload_size = sizeof(struct v9_ce_ib_state);</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		payload_offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-					  gfx[0].gfx_meta_data) +</div><div class='del'>-			offsetof(struct v9_gfx_meta_data, ce_payload);</div><div class='del'>-		ce_payload_cpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_cpu_addr(ring, payload_offset);</div><div class='del'>-	} else {</div><div class='del'>-		payload_offset = offsetof(struct v9_gfx_meta_data, ce_payload);</div><div class='del'>-		ce_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + payload_offset;</div><div class='del'>-	}</div><div class='add'>+	payload_offset = offsetof(struct v9_gfx_meta_data, ce_payload);</div><div class='add'>+	ce_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + payload_offset;</div><div class='ctx'> </div><div class='ctx'> 	if (offset + (payload_size &gt;&gt; 2) &lt;= ring-&gt;buf_mask + 1) {</div><div class='ctx'> 		memcpy((void *)&amp;ring-&gt;ring[offset], ce_payload_cpu_addr, payload_size);</div><div class='hunk'>@@ -5473,16 +5466,8 @@ static void gfx_v9_0_ring_patch_de_meta(struct amdgpu_ring *ring,</div><div class='ctx'> </div><div class='ctx'> 	payload_size = sizeof(struct v9_de_ib_state);</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		payload_offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-					  gfx[0].gfx_meta_data) +</div><div class='del'>-			offsetof(struct v9_gfx_meta_data, de_payload);</div><div class='del'>-		de_payload_cpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_cpu_addr(ring, payload_offset);</div><div class='del'>-	} else {</div><div class='del'>-		payload_offset = offsetof(struct v9_gfx_meta_data, de_payload);</div><div class='del'>-		de_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + payload_offset;</div><div class='del'>-	}</div><div class='add'>+	payload_offset = offsetof(struct v9_gfx_meta_data, de_payload);</div><div class='add'>+	de_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + payload_offset;</div><div class='ctx'> </div><div class='ctx'> 	((struct v9_de_ib_state *)de_payload_cpu_addr)-&gt;ib_completion_status =</div><div class='ctx'> 		IB_COMPLETION_STATUS_PREEMPTED;</div><div class='hunk'>@@ -5672,19 +5657,9 @@ static void gfx_v9_0_ring_emit_ce_meta(struct amdgpu_ring *ring, bool resume)</div><div class='ctx'> </div><div class='ctx'> 	cnt = (sizeof(ce_payload) &gt;&gt; 2) + 4 - 2;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-				  gfx[0].gfx_meta_data) +</div><div class='del'>-			offsetof(struct v9_gfx_meta_data, ce_payload);</div><div class='del'>-		ce_payload_gpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ce_payload_cpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-	} else {</div><div class='del'>-		offset = offsetof(struct v9_gfx_meta_data, ce_payload);</div><div class='del'>-		ce_payload_gpu_addr = amdgpu_csa_vaddr(ring-&gt;adev) + offset;</div><div class='del'>-		ce_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + offset;</div><div class='del'>-	}</div><div class='add'>+	offset = offsetof(struct v9_gfx_meta_data, ce_payload);</div><div class='add'>+	ce_payload_gpu_addr = amdgpu_csa_vaddr(ring-&gt;adev) + offset;</div><div class='add'>+	ce_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + offset;</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));</div><div class='ctx'> 	amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |</div><div class='hunk'>@@ -5770,28 +5745,13 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring, bool resume, bo</div><div class='ctx'> 	void *de_payload_cpu_addr;</div><div class='ctx'> 	int cnt;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-				  gfx[0].gfx_meta_data) +</div><div class='del'>-			offsetof(struct v9_gfx_meta_data, de_payload);</div><div class='del'>-		de_payload_gpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		de_payload_cpu_addr =</div><div class='del'>-			amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		offset = offsetof(struct amdgpu_mes_ctx_meta_data,</div><div class='del'>-				  gfx[0].gds_backup) +</div><div class='del'>-			offsetof(struct v9_gfx_meta_data, de_payload);</div><div class='del'>-		gds_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-	} else {</div><div class='del'>-		offset = offsetof(struct v9_gfx_meta_data, de_payload);</div><div class='del'>-		de_payload_gpu_addr = amdgpu_csa_vaddr(ring-&gt;adev) + offset;</div><div class='del'>-		de_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + offset;</div><div class='add'>+	offset = offsetof(struct v9_gfx_meta_data, de_payload);</div><div class='add'>+	de_payload_gpu_addr = amdgpu_csa_vaddr(ring-&gt;adev) + offset;</div><div class='add'>+	de_payload_cpu_addr = adev-&gt;virt.csa_cpu_addr + offset;</div><div class='ctx'> </div><div class='del'>-		gds_addr = ALIGN(amdgpu_csa_vaddr(ring-&gt;adev) +</div><div class='del'>-				 AMDGPU_CSA_SIZE - adev-&gt;gds.gds_size,</div><div class='del'>-				 PAGE_SIZE);</div><div class='del'>-	}</div><div class='add'>+	gds_addr = ALIGN(amdgpu_csa_vaddr(ring-&gt;adev) +</div><div class='add'>+			 AMDGPU_CSA_SIZE - adev-&gt;gds.gds_size,</div><div class='add'>+			 PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	if (usegds) {</div><div class='ctx'> 		de_payload.gds_backup_addrlo = lower_32_bits(gds_addr);</div><div class='hunk'>@@ -7339,9 +7299,14 @@ static void gfx_v9_ip_print(struct amdgpu_ip_block *ip_block, struct drm_printer</div><div class='ctx'> 			for (k = 0; k &lt; adev-&gt;gfx.mec.num_queue_per_pipe; k++) {</div><div class='ctx'> 				drm_printf(p, "\nmec %d, pipe %d, queue %d\n", i, j, k);</div><div class='ctx'> 				for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-					drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='del'>-						   gc_cp_reg_list_9[reg].reg_name,</div><div class='del'>-						   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='add'>+					if (i &amp;&amp; gc_cp_reg_list_9[reg].reg_offset == mmCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+						drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='add'>+							   "mmCP_MEC_ME2_HEADER_DUMP",</div><div class='add'>+							   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='add'>+					else</div><div class='add'>+						drm_printf(p, "%-50s \t 0x%08x\n",</div><div class='add'>+							   gc_cp_reg_list_9[reg].reg_name,</div><div class='add'>+							   adev-&gt;gfx.ip_dump_compute_queues[index + reg]);</div><div class='ctx'> 				}</div><div class='ctx'> 				index += reg_count;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -7378,9 +7343,13 @@ static void gfx_v9_ip_dump(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 				soc15_grbm_select(adev, 1 + i, j, k, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 				for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-					adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='del'>-						RREG32(SOC15_REG_ENTRY_OFFSET(</div><div class='del'>-							gc_cp_reg_list_9[reg]));</div><div class='add'>+					if (i &amp;&amp; gc_cp_reg_list_9[reg].reg_offset == mmCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+						adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='add'>+							RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_MEC_ME2_HEADER_DUMP));</div><div class='add'>+					else</div><div class='add'>+						adev-&gt;gfx.ip_dump_compute_queues[index + reg] =</div><div class='add'>+							RREG32(SOC15_REG_ENTRY_OFFSET(</div><div class='add'>+								       gc_cp_reg_list_9[reg]));</div><div class='ctx'> 				}</div><div class='ctx'> 				index += reg_count;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -7394,8 +7363,14 @@ static void gfx_v9_ip_dump(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> static void gfx_v9_0_ring_emit_cleaner_shader(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+</div><div class='ctx'> 	/* Emit the cleaner shader */</div><div class='del'>-	amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));</div><div class='add'>+	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2))</div><div class='add'>+		amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER, 0));</div><div class='add'>+	else</div><div class='add'>+		amdgpu_ring_write(ring, PACKET3(PACKET3_RUN_CLEANER_SHADER_9_0, 0));</div><div class='add'>+</div><div class='ctx'> 	amdgpu_ring_write(ring, 0);  /* RESERVED field, programmed to zero */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c<br/>index d81449f9d822..c48cd47b531f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c</a></div><div class='hunk'>@@ -1547,7 +1547,7 @@ static void gfx_v9_4_2_log_utc_edc_count(struct amdgpu_device *adev,</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t bank, way, mem;</div><div class='ctx'> 	static const char * const vml2_way_str[] = { "BIGK", "4K" };</div><div class='del'>-	static const char * const utcl2_rounter_str[] = { "VMC", "APT" };</div><div class='add'>+	static const char * const utcl2_router_str[] = { "VMC", "APT" };</div><div class='ctx'> </div><div class='ctx'> 	mem = instance % blk-&gt;num_mem_blocks;</div><div class='ctx'> 	way = (instance / blk-&gt;num_mem_blocks) % blk-&gt;num_ways;</div><div class='hunk'>@@ -1568,7 +1568,7 @@ static void gfx_v9_4_2_log_utc_edc_count(struct amdgpu_device *adev,</div><div class='ctx'> 		dev_info(</div><div class='ctx'> 			adev-&gt;dev,</div><div class='ctx'> 			"GFX SubBlock UTCL2_ROUTER_IFIF%d_GROUP0_%s, SED %d, DED %d\n",</div><div class='del'>-			bank, utcl2_rounter_str[mem], sec_cnt, ded_cnt);</div><div class='add'>+			bank, utcl2_router_str[mem], sec_cnt, ded_cnt);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ATC_L2_CACHE_2M:</div><div class='ctx'> 		dev_info(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c<br/>index 53fbf6ca7cdb..c233edf60569 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c</a></div><div class='hunk'>@@ -105,9 +105,6 @@ static const struct amdgpu_hwip_reg_entry gc_reg_list_9_4_3[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regRLC_SMU_SAFE_MODE),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regRLC_INT_STAT),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regRLC_GPM_GENERAL_6),</div><div class='del'>-	/* cp header registers */</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='del'>-	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME2_HEADER_DUMP),</div><div class='ctx'> 	/* SE status registers */</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE0),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regGRBM_STATUS_SE1),</div><div class='hunk'>@@ -154,6 +151,14 @@ static const struct amdgpu_hwip_reg_entry gc_cp_reg_list_9_4_3[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_LO),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_PQ_WPTR_HI),</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_GFX_STATUS),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='add'>+	SOC15_REG_ENTRY_STR(GC, 0, regCP_MEC_ME1_HEADER_DUMP),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct amdgpu_gfx_ras gfx_v9_4_3_ras;</div><div class='hunk'>@@ -1148,6 +1153,12 @@ static int gfx_v9_4_3_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			adev-&gt;gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_PIPE;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case IP_VERSION(9, 5, 0):</div><div class='add'>+		if (adev-&gt;gfx.mec_fw_version &gt;= 21) {</div><div class='add'>+			adev-&gt;gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;</div><div class='add'>+			adev-&gt;gfx.compute_supported_reset |= AMDGPU_RESET_TYPE_PER_PIPE;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1262,6 +1273,22 @@ static void gfx_v9_4_3_xcc_init_gds_vmid(struct amdgpu_device *adev, int xcc_id)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* For ASICs that needs xnack chain and MEC version supports, set SG_CONFIG1</div><div class='add'>+ * DISABLE_XNACK_CHECK_IN_RETRY_DISABLE bit and inform KFD to set xnack_chain</div><div class='add'>+ * bit in SET_RESOURCES</div><div class='add'>+ */</div><div class='add'>+static void gfx_v9_4_3_xcc_init_sq(struct amdgpu_device *adev, int xcc_id)</div><div class='add'>+{</div><div class='add'>+	uint32_t data;</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;gmc.xnack_flags &amp; AMDGPU_GMC_XNACK_FLAG_CHAIN))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regSQ_CONFIG1);</div><div class='add'>+	data = REG_SET_FIELD(data, SQ_CONFIG1, DISABLE_XNACK_CHECK_IN_RETRY_DISABLE, 1);</div><div class='add'>+	WREG32_SOC15(GC, xcc_id, regSQ_CONFIG1, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void gfx_v9_4_3_xcc_constants_init(struct amdgpu_device *adev,</div><div class='ctx'> 					  int xcc_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -1306,6 +1333,7 @@ static void gfx_v9_4_3_xcc_constants_init(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	gfx_v9_4_3_xcc_init_compute_vmid(adev, xcc_id);</div><div class='ctx'> 	gfx_v9_4_3_xcc_init_gds_vmid(adev, xcc_id);</div><div class='add'>+	gfx_v9_4_3_xcc_init_sq(adev, xcc_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gfx_v9_4_3_constants_init(struct amdgpu_device *adev)</div><div class='hunk'>@@ -1318,6 +1346,20 @@ static void gfx_v9_4_3_constants_init(struct amdgpu_device *adev)</div><div class='ctx'> 	adev-&gt;gfx.config.db_debug2 =</div><div class='ctx'> 		RREG32_SOC15(GC, GET_INST(GC, 0), regDB_DEBUG2);</div><div class='ctx'> </div><div class='add'>+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {</div><div class='add'>+	/* ToDo: GC 9.4.4 */</div><div class='add'>+	case IP_VERSION(9, 4, 3):</div><div class='add'>+		if (adev-&gt;gfx.mec_fw_version &gt;= 184)</div><div class='add'>+			adev-&gt;gmc.xnack_flags |= AMDGPU_GMC_XNACK_FLAG_CHAIN;</div><div class='add'>+		break;</div><div class='add'>+	case IP_VERSION(9, 5, 0):</div><div class='add'>+		if (adev-&gt;gfx.mec_fw_version &gt;= 23)</div><div class='add'>+			adev-&gt;gmc.xnack_flags |= AMDGPU_GMC_XNACK_FLAG_CHAIN;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; num_xcc; i++)</div><div class='ctx'> 		gfx_v9_4_3_xcc_constants_init(adev, i);</div><div class='ctx'> }</div><div class='hunk'>@@ -3447,9 +3489,7 @@ static int gfx_v9_4_3_unmap_done(struct amdgpu_device *adev, uint32_t me,</div><div class='ctx'> </div><div class='ctx'> static bool gfx_v9_4_3_pipe_reset_support(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	/*TODO: Need check gfx9.4.4 mec fw whether supports pipe reset as well.*/</div><div class='del'>-	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &amp;&amp;</div><div class='del'>-			adev-&gt;gfx.mec_fw_version &gt;= 0x0000009b)</div><div class='add'>+	if (!!(adev-&gt;gfx.compute_supported_reset &amp; AMDGPU_RESET_TYPE_PER_PIPE))</div><div class='ctx'> 		return true;</div><div class='ctx'> 	else</div><div class='ctx'> 		dev_warn_once(adev-&gt;dev, "Please use the latest MEC version to see whether support pipe reset\n");</div><div class='hunk'>@@ -4558,12 +4598,21 @@ static void gfx_v9_4_3_ip_print(struct amdgpu_ip_block *ip_block, struct drm_pri</div><div class='ctx'> 						   "\nxcc:%d mec:%d, pipe:%d, queue:%d\n",</div><div class='ctx'> 						    xcc_id, i, j, k);</div><div class='ctx'> 					for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-						drm_printf(p,</div><div class='del'>-							   "%-50s \t 0x%08x\n",</div><div class='del'>-							   gc_cp_reg_list_9_4_3[reg].reg_name,</div><div class='del'>-							   adev-&gt;gfx.ip_dump_compute_queues</div><div class='del'>-								[xcc_offset + inst_offset +</div><div class='del'>-								reg]);</div><div class='add'>+						if (i &amp;&amp; gc_cp_reg_list_9_4_3[reg].reg_offset ==</div><div class='add'>+						    regCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+							drm_printf(p,</div><div class='add'>+								   "%-50s \t 0x%08x\n",</div><div class='add'>+								   "regCP_MEC_ME2_HEADER_DUMP",</div><div class='add'>+								   adev-&gt;gfx.ip_dump_compute_queues</div><div class='add'>+								   [xcc_offset + inst_offset +</div><div class='add'>+								    reg]);</div><div class='add'>+						else</div><div class='add'>+							drm_printf(p,</div><div class='add'>+								   "%-50s \t 0x%08x\n",</div><div class='add'>+								   gc_cp_reg_list_9_4_3[reg].reg_name,</div><div class='add'>+								   adev-&gt;gfx.ip_dump_compute_queues</div><div class='add'>+								   [xcc_offset + inst_offset +</div><div class='add'>+								    reg]);</div><div class='ctx'> 					}</div><div class='ctx'> 					inst_offset += reg_count;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -4612,12 +4661,20 @@ static void gfx_v9_4_3_ip_dump(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 							  GET_INST(GC, xcc_id));</div><div class='ctx'> </div><div class='ctx'> 					for (reg = 0; reg &lt; reg_count; reg++) {</div><div class='del'>-						adev-&gt;gfx.ip_dump_compute_queues</div><div class='del'>-							[xcc_offset +</div><div class='del'>-							 inst_offset + reg] =</div><div class='del'>-							RREG32(SOC15_REG_ENTRY_OFFSET_INST(</div><div class='del'>-								gc_cp_reg_list_9_4_3[reg],</div><div class='del'>-								GET_INST(GC, xcc_id)));</div><div class='add'>+						if (i &amp;&amp; gc_cp_reg_list_9_4_3[reg].reg_offset ==</div><div class='add'>+						    regCP_MEC_ME1_HEADER_DUMP)</div><div class='add'>+							adev-&gt;gfx.ip_dump_compute_queues</div><div class='add'>+								[xcc_offset +</div><div class='add'>+								 inst_offset + reg] =</div><div class='add'>+								RREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id),</div><div class='add'>+											regCP_MEC_ME2_HEADER_DUMP));</div><div class='add'>+						else</div><div class='add'>+							adev-&gt;gfx.ip_dump_compute_queues</div><div class='add'>+								[xcc_offset +</div><div class='add'>+								 inst_offset + reg] =</div><div class='add'>+								RREG32(SOC15_REG_ENTRY_OFFSET_INST(</div><div class='add'>+									       gc_cp_reg_list_9_4_3[reg],</div><div class='add'>+									       GET_INST(GC, xcc_id)));</div><div class='ctx'> 					}</div><div class='ctx'> 					inst_offset += reg_count;</div><div class='ctx'> 				}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c<br/>index 95d894a231fc..a3e2787501f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c</a></div><div class='hunk'>@@ -268,7 +268,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,</div><div class='ctx'> 	ack = hub-&gt;vm_inv_eng0_ack + hub-&gt;eng_distance * eng;</div><div class='ctx'> </div><div class='ctx'> 	/* flush hdp cache */</div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* This is necessary for SRIOV as well as for GFXOFF to function</div><div class='ctx'> 	 * properly under bare metal</div><div class='hunk'>@@ -428,10 +428,6 @@ static void gmc_v10_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned int</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	uint32_t reg;</div><div class='ctx'> </div><div class='del'>-	/* MES fw manages IH_VMID_x_LUT updating */</div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	if (ring-&gt;vm_hub == AMDGPU_GFXHUB(0))</div><div class='ctx'> 		reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -969,7 +965,7 @@ static int gmc_v10_0_gart_enable(struct amdgpu_device *adev)</div><div class='ctx'> 	adev-&gt;hdp.funcs-&gt;init_registers(adev);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush HDP after it is initialized */</div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?</div><div class='ctx'> 		false : true;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c<br/>index ad099f136f84..72211409227b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c</a></div><div class='hunk'>@@ -229,7 +229,7 @@ static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,</div><div class='ctx'> 	ack = hub-&gt;vm_inv_eng0_ack + hub-&gt;eng_distance * eng;</div><div class='ctx'> </div><div class='ctx'> 	/* flush hdp cache */</div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* This is necessary for SRIOV as well as for GFXOFF to function</div><div class='ctx'> 	 * properly under bare metal</div><div class='hunk'>@@ -393,10 +393,6 @@ static void gmc_v11_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned int</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	uint32_t reg;</div><div class='ctx'> </div><div class='del'>-	/* MES fw manages IH_VMID_x_LUT updating */</div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	if (ring-&gt;vm_hub == AMDGPU_GFXHUB(0))</div><div class='ctx'> 		reg = SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_0_LUT) + vmid;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -752,6 +748,18 @@ static int gmc_v11_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	adev-&gt;gmc.vram_type = vram_type;</div><div class='ctx'> 	adev-&gt;gmc.vram_vendor = vram_vendor;</div><div class='ctx'> </div><div class='add'>+	/* The mall_size is already calculated as mall_size_per_umc * num_umc.</div><div class='add'>+	 * However, for gfx1151, which features a 2-to-1 UMC mapping,</div><div class='add'>+	 * the result must be multiplied by 2 to determine the actual mall size.</div><div class='add'>+	 */</div><div class='add'>+	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {</div><div class='add'>+	case IP_VERSION(11, 5, 1):</div><div class='add'>+		adev-&gt;gmc.mall_size *= 2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {</div><div class='ctx'> 	case IP_VERSION(11, 0, 0):</div><div class='ctx'> 	case IP_VERSION(11, 0, 1):</div><div class='hunk'>@@ -832,7 +840,7 @@ static int gmc_v11_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	 * amdgpu graphics/compute will use VMIDs 1-7</div><div class='ctx'> 	 * amdkfd will use VMIDs 8-15</div><div class='ctx'> 	 */</div><div class='del'>-	adev-&gt;vm_manager.first_kfd_vmid = 8;</div><div class='add'>+	adev-&gt;vm_manager.first_kfd_vmid = adev-&gt;gfx.disable_kq ? 1 : 8;</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_vm_manager_init(adev);</div><div class='ctx'> </div><div class='hunk'>@@ -899,7 +907,7 @@ static int gmc_v11_0_gart_enable(struct amdgpu_device *adev)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='ctx'> 	/* Flush HDP after it is initialized */</div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?</div><div class='ctx'> 		false : true;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c<br/>index 05c026d0b0d9..b645d3e6a6c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c</a></div><div class='hunk'>@@ -297,7 +297,7 @@ static void gmc_v12_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* flush hdp cache */</div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* This is necessary for SRIOV as well as for GFXOFF to function</div><div class='ctx'> 	 * properly under bare metal</div><div class='hunk'>@@ -413,10 +413,6 @@ static void gmc_v12_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned vmid</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	uint32_t reg;</div><div class='ctx'> </div><div class='del'>-	/* MES fw manages IH_VMID_x_LUT updating */</div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	if (ring-&gt;vm_hub == AMDGPU_GFXHUB(0))</div><div class='ctx'> 		reg = SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_0_LUT) + vmid;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -820,7 +816,7 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	 * amdgpu graphics/compute will use VMIDs 1-7</div><div class='ctx'> 	 * amdkfd will use VMIDs 8-15</div><div class='ctx'> 	 */</div><div class='del'>-	adev-&gt;vm_manager.first_kfd_vmid = 8;</div><div class='add'>+	adev-&gt;vm_manager.first_kfd_vmid = adev-&gt;gfx.disable_kq ? 1 : 8;</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_vm_manager_init(adev);</div><div class='ctx'> </div><div class='hunk'>@@ -881,7 +877,7 @@ static int gmc_v12_0_gart_enable(struct amdgpu_device *adev)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='ctx'> 	/* Flush HDP after it is initialized */</div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	value = (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) ?</div><div class='ctx'> 		false : true;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c<br/>index a992e79d9581..8030fcd64210 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c</a></div><div class='hunk'>@@ -249,7 +249,7 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 		/* disable VGA render */</div><div class='ctx'> 		tmp = RREG32(mmVGA_RENDER_CONTROL);</div><div class='del'>-		tmp &amp;= ~VGA_VSTATUS_CNTL;</div><div class='add'>+		tmp &amp;= VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK;</div><div class='ctx'> 		WREG32(mmVGA_RENDER_CONTROL, tmp);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Update configuration */</div><div class='hunk'>@@ -627,17 +627,16 @@ static void gmc_v6_0_vm_decode_fault(struct amdgpu_device *adev,</div><div class='ctx'> 	       "write" : "read", block, mc_client, mc_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='ctx'> static const u32 mc_cg_registers[] = {</div><div class='del'>-	MC_HUB_MISC_HUB_CG,</div><div class='del'>-	MC_HUB_MISC_SIP_CG,</div><div class='del'>-	MC_HUB_MISC_VM_CG,</div><div class='del'>-	MC_XPB_CLK_GAT,</div><div class='del'>-	ATC_MISC_CG,</div><div class='del'>-	MC_CITF_MISC_WR_CG,</div><div class='del'>-	MC_CITF_MISC_RD_CG,</div><div class='del'>-	MC_CITF_MISC_VM_CG,</div><div class='del'>-	VM_L2_CG,</div><div class='add'>+	mmMC_HUB_MISC_HUB_CG,</div><div class='add'>+	mmMC_HUB_MISC_SIP_CG,</div><div class='add'>+	mmMC_HUB_MISC_VM_CG,</div><div class='add'>+	mmMC_XPB_CLK_GAT,</div><div class='add'>+	mmATC_MISC_CG,</div><div class='add'>+	mmMC_CITF_MISC_WR_CG,</div><div class='add'>+	mmMC_CITF_MISC_RD_CG,</div><div class='add'>+	mmMC_CITF_MISC_VM_CG,</div><div class='add'>+	mmVM_L2_CG,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u32 mc_cg_ls_en[] = {</div><div class='hunk'>@@ -672,7 +671,7 @@ static void gmc_v6_0_enable_mc_ls(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mc_cg_registers); i++) {</div><div class='ctx'> 		orig = data = RREG32(mc_cg_registers[i]);</div><div class='del'>-		if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMDGPU_CG_SUPPORT_MC_LS))</div><div class='add'>+		if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMD_CG_SUPPORT_MC_LS))</div><div class='ctx'> 			data |= mc_cg_ls_en[i];</div><div class='ctx'> 		else</div><div class='ctx'> 			data &amp;= ~mc_cg_ls_en[i];</div><div class='hunk'>@@ -689,7 +688,7 @@ static void gmc_v6_0_enable_mc_mgcg(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mc_cg_registers); i++) {</div><div class='ctx'> 		orig = data = RREG32(mc_cg_registers[i]);</div><div class='del'>-		if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMDGPU_CG_SUPPORT_MC_MGCG))</div><div class='add'>+		if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMD_CG_SUPPORT_MC_MGCG))</div><div class='ctx'> 			data |= mc_cg_en[i];</div><div class='ctx'> 		else</div><div class='ctx'> 			data &amp;= ~mc_cg_en[i];</div><div class='hunk'>@@ -705,7 +704,7 @@ static void gmc_v6_0_enable_bif_mgls(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	orig = data = RREG32_PCIE(ixPCIE_CNTL2);</div><div class='ctx'> </div><div class='del'>-	if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMDGPU_CG_SUPPORT_BIF_LS)) {</div><div class='add'>+	if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMD_CG_SUPPORT_BIF_LS)) {</div><div class='ctx'> 		data = REG_SET_FIELD(data, PCIE_CNTL2, SLV_MEM_LS_EN, 1);</div><div class='ctx'> 		data = REG_SET_FIELD(data, PCIE_CNTL2, MST_MEM_LS_EN, 1);</div><div class='ctx'> 		data = REG_SET_FIELD(data, PCIE_CNTL2, REPLAY_MEM_LS_EN, 1);</div><div class='hunk'>@@ -728,7 +727,7 @@ static void gmc_v6_0_enable_hdp_mgcg(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	orig = data = RREG32(mmHDP_HOST_PATH_CNTL);</div><div class='ctx'> </div><div class='del'>-	if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMDGPU_CG_SUPPORT_HDP_MGCG))</div><div class='add'>+	if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMD_CG_SUPPORT_HDP_MGCG))</div><div class='ctx'> 		data = REG_SET_FIELD(data, HDP_HOST_PATH_CNTL, CLOCK_GATING_DIS, 0);</div><div class='ctx'> 	else</div><div class='ctx'> 		data = REG_SET_FIELD(data, HDP_HOST_PATH_CNTL, CLOCK_GATING_DIS, 1);</div><div class='hunk'>@@ -744,7 +743,7 @@ static void gmc_v6_0_enable_hdp_ls(struct amdgpu_device *adev,</div><div class='ctx'> </div><div class='ctx'> 	orig = data = RREG32(mmHDP_MEM_POWER_LS);</div><div class='ctx'> </div><div class='del'>-	if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMDGPU_CG_SUPPORT_HDP_LS))</div><div class='add'>+	if (enable &amp;&amp; (adev-&gt;cg_flags &amp; AMD_CG_SUPPORT_HDP_LS))</div><div class='ctx'> 		data = REG_SET_FIELD(data, HDP_MEM_POWER_LS, LS_ENABLE, 1);</div><div class='ctx'> 	else</div><div class='ctx'> 		data = REG_SET_FIELD(data, HDP_MEM_POWER_LS, LS_ENABLE, 0);</div><div class='hunk'>@@ -752,7 +751,6 @@ static void gmc_v6_0_enable_hdp_ls(struct amdgpu_device *adev,</div><div class='ctx'> 	if (orig != data)</div><div class='ctx'> 		WREG32(mmHDP_MEM_POWER_LS, data);</div><div class='ctx'> }</div><div class='del'>-*/</div><div class='ctx'> </div><div class='ctx'> static int gmc_v6_0_convert_vram_type(int mc_seq_vram_type)</div><div class='ctx'> {</div><div class='hunk'>@@ -1098,6 +1096,20 @@ static int gmc_v6_0_process_interrupt(struct amdgpu_device *adev,</div><div class='ctx'> static int gmc_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,</div><div class='ctx'> 					  enum amd_clockgating_state state)</div><div class='ctx'> {</div><div class='add'>+	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='add'>+	bool gate = false;</div><div class='add'>+</div><div class='add'>+	if (state == AMD_CG_STATE_GATE)</div><div class='add'>+		gate = true;</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;flags &amp; AMD_IS_APU)) {</div><div class='add'>+		gmc_v6_0_enable_mc_mgcg(adev, gate);</div><div class='add'>+		gmc_v6_0_enable_mc_ls(adev, gate);</div><div class='add'>+	}</div><div class='add'>+	gmc_v6_0_enable_bif_mgls(adev, gate);</div><div class='add'>+	gmc_v6_0_enable_hdp_mgcg(adev, gate);</div><div class='add'>+	gmc_v6_0_enable_hdp_ls(adev, gate);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c<br/>index 83e39f16044a..a8d5795084fc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c</a></div><div class='hunk'>@@ -1157,17 +1157,10 @@ static bool gmc_v7_0_is_idle(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> static int gmc_v7_0_wait_for_idle(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	u32 tmp;</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		/* read MC_STATUS */</div><div class='del'>-		tmp = RREG32(mmSRBM_STATUS) &amp; (SRBM_STATUS__MCB_BUSY_MASK |</div><div class='del'>-					       SRBM_STATUS__MCB_NON_DISPLAY_BUSY_MASK |</div><div class='del'>-					       SRBM_STATUS__MCC_BUSY_MASK |</div><div class='del'>-					       SRBM_STATUS__MCD_BUSY_MASK |</div><div class='del'>-					       SRBM_STATUS__VMC_BUSY_MASK);</div><div class='del'>-		if (!tmp)</div><div class='add'>+		if (gmc_v7_0_is_idle(ip_block))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br/>index 783e0c3b86b4..282197f4ffb1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c</a></div><div class='hunk'>@@ -1213,10 +1213,7 @@ static void gmc_v9_0_get_coherence_flags(struct amdgpu_device *adev,</div><div class='ctx'> 		if (uncached) {</div><div class='ctx'> 			mtype = MTYPE_UC;</div><div class='ctx'> 		} else if (ext_coherent) {</div><div class='del'>-			if (gc_ip_version == IP_VERSION(9, 5, 0) || adev-&gt;rev_id)</div><div class='del'>-				mtype = is_local ? MTYPE_CC : MTYPE_UC;</div><div class='del'>-			else</div><div class='del'>-				mtype = MTYPE_UC;</div><div class='add'>+			mtype = is_local ? MTYPE_CC : MTYPE_UC;</div><div class='ctx'> 		} else if (adev-&gt;flags &amp; AMD_IS_APU) {</div><div class='ctx'> 			mtype = is_local ? mtype_local : MTYPE_NC;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1336,7 +1333,7 @@ static void gmc_v9_0_override_vm_pte_flags(struct amdgpu_device *adev,</div><div class='ctx'> 				mtype_local = MTYPE_CC;</div><div class='ctx'> </div><div class='ctx'> 			*flags = AMDGPU_PTE_MTYPE_VG10(*flags, mtype_local);</div><div class='del'>-		} else if (adev-&gt;rev_id) {</div><div class='add'>+		} else {</div><div class='ctx'> 			/* MTYPE_UC case */</div><div class='ctx'> 			*flags = AMDGPU_PTE_MTYPE_VG10(*flags, MTYPE_CC);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1505,7 +1502,6 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;umc.umc_inst_num = UMC_V12_0_UMC_INSTANCE_NUM;</div><div class='ctx'> 		adev-&gt;umc.node_inst_num /= UMC_V12_0_UMC_INSTANCE_NUM;</div><div class='ctx'> 		adev-&gt;umc.channel_offs = UMC_V12_0_PER_CHANNEL_OFFSET;</div><div class='del'>-		adev-&gt;umc.retire_unit = UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL;</div><div class='ctx'> 		if (!adev-&gt;gmc.xgmi.connected_to_cpu &amp;&amp; !adev-&gt;gmc.is_app_apu)</div><div class='ctx'> 			adev-&gt;umc.ras = &amp;umc_v12_0_ras;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2075,6 +2071,9 @@ static void gmc_v9_4_3_init_vram_info(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	adev-&gt;gmc.vram_type = AMDGPU_VRAM_TYPE_HBM;</div><div class='ctx'> 	adev-&gt;gmc.vram_width = 128 * 64;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 5, 0))</div><div class='add'>+		adev-&gt;gmc.vram_type = AMDGPU_VRAM_TYPE_HBM3E;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='hunk'>@@ -2411,13 +2410,6 @@ static int gmc_v9_0_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	adev-&gt;gmc.flush_tlb_needs_extra_type_2 =</div><div class='ctx'> 		amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 0) &amp;&amp;</div><div class='ctx'> 		adev-&gt;gmc.xgmi.num_physical_nodes;</div><div class='del'>-	/*</div><div class='del'>-	 * TODO: This workaround is badly documented and had a buggy</div><div class='del'>-	 * implementation. We should probably verify what we do here.</div><div class='del'>-	 */</div><div class='del'>-	adev-&gt;gmc.flush_tlb_needs_extra_type_0 =</div><div class='del'>-		amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) &amp;&amp;</div><div class='del'>-		adev-&gt;rev_id == 0;</div><div class='ctx'> </div><div class='ctx'> 	/* The sequence of these two function calls matters.*/</div><div class='ctx'> 	gmc_v9_0_init_golden_registers(adev);</div><div class='hunk'>@@ -2435,7 +2427,7 @@ static int gmc_v9_0_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	adev-&gt;hdp.funcs-&gt;init_registers(adev);</div><div class='ctx'> </div><div class='ctx'> 	/* After HDP is initialized, flush HDP.*/</div><div class='del'>-	adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+	amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS)</div><div class='ctx'> 		value = false;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c<br/>index f1dc13b3ab38..e6c0d86d3486 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c</a></div><div class='hunk'>@@ -36,17 +36,6 @@</div><div class='ctx'> #define HDP_MEM_POWER_CTRL__RC_MEM_POWER_LS_EN_MASK     0x00020000L</div><div class='ctx'> #define mmHDP_MEM_POWER_CTRL_BASE_IDX   0</div><div class='ctx'> </div><div class='del'>-static void hdp_v4_0_flush_hdp(struct amdgpu_device *adev,</div><div class='del'>-				struct amdgpu_ring *ring)</div><div class='del'>-{</div><div class='del'>-	if (!ring || !ring-&gt;funcs-&gt;emit_wreg) {</div><div class='del'>-		WREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-		RREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2);</div><div class='del'>-	} else {</div><div class='del'>-		amdgpu_ring_emit_wreg(ring, (adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hdp_v4_0_invalidate_hdp(struct amdgpu_device *adev,</div><div class='ctx'> 				    struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -180,7 +169,7 @@ struct amdgpu_hdp_ras hdp_v4_0_ras = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_hdp_funcs hdp_v4_0_funcs = {</div><div class='del'>-	.flush_hdp = hdp_v4_0_flush_hdp,</div><div class='add'>+	.flush_hdp = amdgpu_hdp_generic_flush,</div><div class='ctx'> 	.invalidate_hdp = hdp_v4_0_invalidate_hdp,</div><div class='ctx'> 	.update_clock_gating = hdp_v4_0_update_clock_gating,</div><div class='ctx'> 	.get_clock_gating_state = hdp_v4_0_get_clockgating_state,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c<br/>index 43195c079748..8bc001dc9f63 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/hdp_v5_0.c</a></div><div class='hunk'>@@ -27,17 +27,6 @@</div><div class='ctx'> #include "hdp/hdp_5_0_0_sh_mask.h"</div><div class='ctx'> #include &lt;uapi/linux/kfd_ioctl.h&gt;</div><div class='ctx'> </div><div class='del'>-static void hdp_v5_0_flush_hdp(struct amdgpu_device *adev,</div><div class='del'>-				struct amdgpu_ring *ring)</div><div class='del'>-{</div><div class='del'>-	if (!ring || !ring-&gt;funcs-&gt;emit_wreg) {</div><div class='del'>-		WREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-		RREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2);</div><div class='del'>-	} else {</div><div class='del'>-		amdgpu_ring_emit_wreg(ring, (adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hdp_v5_0_invalidate_hdp(struct amdgpu_device *adev,</div><div class='ctx'> 				    struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -217,7 +206,7 @@ static void hdp_v5_0_init_registers(struct amdgpu_device *adev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_hdp_funcs hdp_v5_0_funcs = {</div><div class='del'>-	.flush_hdp = hdp_v5_0_flush_hdp,</div><div class='add'>+	.flush_hdp = amdgpu_hdp_generic_flush,</div><div class='ctx'> 	.invalidate_hdp = hdp_v5_0_invalidate_hdp,</div><div class='ctx'> 	.update_clock_gating = hdp_v5_0_update_clock_gating,</div><div class='ctx'> 	.get_clock_gating_state = hdp_v5_0_get_clockgating_state,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c b/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c<br/>index fcb8dd2876bc..40940b4ab400 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/hdp_v5_2.c</a></div><div class='hunk'>@@ -33,7 +33,17 @@ static void hdp_v5_2_flush_hdp(struct amdgpu_device *adev,</div><div class='ctx'> 	if (!ring || !ring-&gt;funcs-&gt;emit_wreg) {</div><div class='ctx'> 		WREG32_NO_KIQ((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2,</div><div class='ctx'> 			0);</div><div class='del'>-		RREG32_NO_KIQ((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2);</div><div class='add'>+		if (amdgpu_sriov_vf(adev)) {</div><div class='add'>+			/* this is fine because SR_IOV doesn't remap the register */</div><div class='add'>+			RREG32_NO_KIQ((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2);</div><div class='add'>+		} else {</div><div class='add'>+			/* We just need to read back a register to post the write.</div><div class='add'>+			 * Reading back the remapped register causes problems on</div><div class='add'>+			 * some platforms so just read back the memory size register.</div><div class='add'>+			 */</div><div class='add'>+			if (adev-&gt;nbio.funcs-&gt;get_memsize)</div><div class='add'>+				adev-&gt;nbio.funcs-&gt;get_memsize(adev);</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		amdgpu_ring_emit_wreg(ring,</div><div class='ctx'> 			(adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c<br/>index a88d25a06c29..ec20daf4272c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/hdp_v6_0.c</a></div><div class='hunk'>@@ -30,17 +30,6 @@</div><div class='ctx'> #define regHDP_CLK_CNTL_V6_1	0xd5</div><div class='ctx'> #define regHDP_CLK_CNTL_V6_1_BASE_IDX 0</div><div class='ctx'> </div><div class='del'>-static void hdp_v6_0_flush_hdp(struct amdgpu_device *adev,</div><div class='del'>-				struct amdgpu_ring *ring)</div><div class='del'>-{</div><div class='del'>-	if (!ring || !ring-&gt;funcs-&gt;emit_wreg) {</div><div class='del'>-		WREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-		RREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2);</div><div class='del'>-	} else {</div><div class='del'>-		amdgpu_ring_emit_wreg(ring, (adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hdp_v6_0_update_clock_gating(struct amdgpu_device *adev,</div><div class='ctx'> 					 bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -149,7 +138,7 @@ static void hdp_v6_0_get_clockgating_state(struct amdgpu_device *adev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_hdp_funcs hdp_v6_0_funcs = {</div><div class='del'>-	.flush_hdp = hdp_v6_0_flush_hdp,</div><div class='add'>+	.flush_hdp = amdgpu_hdp_generic_flush,</div><div class='ctx'> 	.update_clock_gating = hdp_v6_0_update_clock_gating,</div><div class='ctx'> 	.get_clock_gating_state = hdp_v6_0_get_clockgating_state,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c<br/>index 49f7eb4fbd11..ed1debc03507 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/hdp_v7_0.c</a></div><div class='hunk'>@@ -27,17 +27,6 @@</div><div class='ctx'> #include "hdp/hdp_7_0_0_sh_mask.h"</div><div class='ctx'> #include &lt;uapi/linux/kfd_ioctl.h&gt;</div><div class='ctx'> </div><div class='del'>-static void hdp_v7_0_flush_hdp(struct amdgpu_device *adev,</div><div class='del'>-				struct amdgpu_ring *ring)</div><div class='del'>-{</div><div class='del'>-	if (!ring || !ring-&gt;funcs-&gt;emit_wreg) {</div><div class='del'>-		WREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-		RREG32((adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2);</div><div class='del'>-	} else {</div><div class='del'>-		amdgpu_ring_emit_wreg(ring, (adev-&gt;rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) &gt;&gt; 2, 0);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hdp_v7_0_update_clock_gating(struct amdgpu_device *adev,</div><div class='ctx'> 					 bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -137,7 +126,7 @@ static void hdp_v7_0_get_clockgating_state(struct amdgpu_device *adev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct amdgpu_hdp_funcs hdp_v7_0_funcs = {</div><div class='del'>-	.flush_hdp = hdp_v7_0_flush_hdp,</div><div class='add'>+	.flush_hdp = amdgpu_hdp_generic_flush,</div><div class='ctx'> 	.update_clock_gating = hdp_v7_0_update_clock_gating,</div><div class='ctx'> 	.get_clock_gating_state = hdp_v7_0_get_clockgating_state,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c b/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c<br/>index eb4185dcbd1d..5900b560b7de 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/ih_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/ih_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/ih_v6_0.c</a></div><div class='hunk'>@@ -349,6 +349,7 @@ static int ih_v6_0_irq_init(struct amdgpu_device *adev)</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> 		}</div><div class='add'>+		ih[i]-&gt;overflow = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* update doorbell range for ih ring 0 */</div><div class='hunk'>@@ -446,7 +447,10 @@ static u32 ih_v6_0_get_wptr(struct amdgpu_device *adev,</div><div class='ctx'> 	wptr = RREG32_NO_KIQ(ih_regs-&gt;ih_rb_wptr);</div><div class='ctx'> 	if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))</div><div class='ctx'> 		goto out;</div><div class='del'>-	wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0);</div><div class='add'>+	if (!amdgpu_sriov_vf(adev))</div><div class='add'>+		wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0);</div><div class='add'>+	else</div><div class='add'>+		ih-&gt;overflow = true;</div><div class='ctx'> </div><div class='ctx'> 	/* When a ring buffer overflow happen start parsing interrupt</div><div class='ctx'> 	 * from the last not overwritten vector (wptr + 32). Hopefully</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c<br/>index 218e16b68f1d..cb94bd71300f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c</a></div><div class='hunk'>@@ -28,11 +28,13 @@</div><div class='ctx'> #include "soc15d.h"</div><div class='ctx'> #include "jpeg_v4_0_3.h"</div><div class='ctx'> #include "jpeg_v5_0_1.h"</div><div class='add'>+#include "mmsch_v5_0.h"</div><div class='ctx'> </div><div class='ctx'> #include "vcn/vcn_5_0_0_offset.h"</div><div class='ctx'> #include "vcn/vcn_5_0_0_sh_mask.h"</div><div class='ctx'> #include "ivsrcid/vcn/irqsrcs_vcn_5_0.h"</div><div class='ctx'> </div><div class='add'>+static int jpeg_v5_0_1_start_sriov(struct amdgpu_device *adev);</div><div class='ctx'> static void jpeg_v5_0_1_set_dec_ring_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void jpeg_v5_0_1_set_irq_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static int jpeg_v5_0_1_set_powergating_state(struct amdgpu_ip_block *ip_block,</div><div class='hunk'>@@ -156,21 +158,16 @@ static int jpeg_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; adev-&gt;jpeg.num_jpeg_rings; ++j) {</div><div class='ctx'> 			ring = &amp;adev-&gt;jpeg.inst[i].ring_dec[j];</div><div class='del'>-			ring-&gt;use_doorbell = false;</div><div class='add'>+			ring-&gt;use_doorbell = true;</div><div class='ctx'> 			ring-&gt;vm_hub = AMDGPU_MMHUB0(adev-&gt;jpeg.inst[i].aid_id);</div><div class='ctx'> 			if (!amdgpu_sriov_vf(adev)) {</div><div class='ctx'> 				ring-&gt;doorbell_index =</div><div class='ctx'> 					(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='ctx'> 					1 + j + 11 * jpeg_inst;</div><div class='ctx'> 			} else {</div><div class='del'>-				if (j &lt; 4)</div><div class='del'>-					ring-&gt;doorbell_index =</div><div class='del'>-						(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='del'>-						4 + j + 32 * jpeg_inst;</div><div class='del'>-				else</div><div class='del'>-					ring-&gt;doorbell_index =</div><div class='del'>-						(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='del'>-						8 + j + 32 * jpeg_inst;</div><div class='add'>+				ring-&gt;doorbell_index =</div><div class='add'>+					(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='add'>+					2 + j + 32 * jpeg_inst;</div><div class='ctx'> 			}</div><div class='ctx'> 			sprintf(ring-&gt;name, "jpeg_dec_%d.%d", adev-&gt;jpeg.inst[i].aid_id, j);</div><div class='ctx'> 			r = amdgpu_ring_init(adev, ring, 512, &amp;adev-&gt;jpeg.inst-&gt;irq, 0,</div><div class='hunk'>@@ -237,7 +234,10 @@ static int jpeg_v5_0_1_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	int i, j, r, jpeg_inst;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(adev)) {</div><div class='del'>-		/* jpeg_v5_0_1_start_sriov(adev); */</div><div class='add'>+		r = jpeg_v5_0_1_start_sriov(adev);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;jpeg.num_jpeg_inst; ++i) {</div><div class='ctx'> 			for (j = 0; j &lt; adev-&gt;jpeg.num_jpeg_rings; ++j) {</div><div class='ctx'> 				ring = &amp;adev-&gt;jpeg.inst[i].ring_dec[j];</div><div class='hunk'>@@ -264,7 +264,7 @@ static int jpeg_v5_0_1_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			ring = &amp;adev-&gt;jpeg.inst[i].ring_dec[j];</div><div class='ctx'> 			if (ring-&gt;use_doorbell)</div><div class='ctx'> 				WREG32_SOC15_OFFSET(VCN, GET_INST(VCN, i), regVCN_JPEG_DB_CTRL,</div><div class='del'>-						    (ring-&gt;pipe ? (ring-&gt;pipe - 0x15) : 0),</div><div class='add'>+						    ring-&gt;pipe,</div><div class='ctx'> 						    ring-&gt;doorbell_index &lt;&lt;</div><div class='ctx'> 						    VCN_JPEG_DB_CTRL__OFFSET__SHIFT |</div><div class='ctx'> 						    VCN_JPEG_DB_CTRL__EN_MASK);</div><div class='hunk'>@@ -291,8 +291,10 @@ static int jpeg_v5_0_1_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adev-&gt;jpeg.idle_work);</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;jpeg.cur_state != AMD_PG_STATE_GATE)</div><div class='del'>-		ret = jpeg_v5_0_1_set_powergating_state(ip_block, AMD_PG_STATE_GATE);</div><div class='add'>+	if (!amdgpu_sriov_vf(adev)) {</div><div class='add'>+		if (adev-&gt;jpeg.cur_state != AMD_PG_STATE_GATE)</div><div class='add'>+			ret = jpeg_v5_0_1_set_powergating_state(ip_block, AMD_PG_STATE_GATE);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -422,6 +424,119 @@ static void jpeg_v5_0_1_init_jrbc(struct amdgpu_ring *ring)</div><div class='ctx'> 					 reg_offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int jpeg_v5_0_1_start_sriov(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_ring *ring;</div><div class='add'>+	uint64_t ctx_addr;</div><div class='add'>+	uint32_t param, resp, expected;</div><div class='add'>+	uint32_t tmp, timeout;</div><div class='add'>+</div><div class='add'>+	struct amdgpu_mm_table *table = &amp;adev-&gt;virt.mm_table;</div><div class='add'>+	uint32_t *table_loc;</div><div class='add'>+	uint32_t table_size;</div><div class='add'>+	uint32_t size, size_dw, item_offset;</div><div class='add'>+	uint32_t init_status;</div><div class='add'>+	int i, j, jpeg_inst;</div><div class='add'>+</div><div class='add'>+	struct mmsch_v5_0_cmd_direct_write</div><div class='add'>+		direct_wt = { {0} };</div><div class='add'>+	struct mmsch_v5_0_cmd_end end = { {0} };</div><div class='add'>+	struct mmsch_v5_0_init_header header;</div><div class='add'>+</div><div class='add'>+	direct_wt.cmd_header.command_type =</div><div class='add'>+		MMSCH_COMMAND__DIRECT_REG_WRITE;</div><div class='add'>+	end.cmd_header.command_type =</div><div class='add'>+		MMSCH_COMMAND__END;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adev-&gt;jpeg.num_jpeg_inst; i++) {</div><div class='add'>+		jpeg_inst = GET_INST(JPEG, i);</div><div class='add'>+</div><div class='add'>+		memset(&amp;header, 0, sizeof(struct mmsch_v5_0_init_header));</div><div class='add'>+		header.version = MMSCH_VERSION;</div><div class='add'>+		header.total_size = sizeof(struct mmsch_v5_0_init_header) &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+		table_loc = (uint32_t *)table-&gt;cpu_addr;</div><div class='add'>+		table_loc += header.total_size;</div><div class='add'>+</div><div class='add'>+		item_offset = header.total_size;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; adev-&gt;jpeg.num_jpeg_rings; j++) {</div><div class='add'>+			ring = &amp;adev-&gt;jpeg.inst[i].ring_dec[j];</div><div class='add'>+			table_size = 0;</div><div class='add'>+</div><div class='add'>+			tmp = SOC15_REG_OFFSET(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_LOW);</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(tmp, lower_32_bits(ring-&gt;gpu_addr));</div><div class='add'>+			tmp = SOC15_REG_OFFSET(JPEG, 0, regUVD_LMI_JRBC_RB_64BIT_BAR_HIGH);</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(tmp, upper_32_bits(ring-&gt;gpu_addr));</div><div class='add'>+			tmp = SOC15_REG_OFFSET(JPEG, 0, regUVD_JRBC_RB_SIZE);</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(tmp, ring-&gt;ring_size / 4);</div><div class='add'>+</div><div class='add'>+			if (j &lt; 5) {</div><div class='add'>+				header.mjpegdec0[j].table_offset = item_offset;</div><div class='add'>+				header.mjpegdec0[j].init_status = 0;</div><div class='add'>+				header.mjpegdec0[j].table_size = table_size;</div><div class='add'>+			} else {</div><div class='add'>+				header.mjpegdec1[j - 5].table_offset = item_offset;</div><div class='add'>+				header.mjpegdec1[j - 5].init_status = 0;</div><div class='add'>+				header.mjpegdec1[j - 5].table_size = table_size;</div><div class='add'>+			}</div><div class='add'>+			header.total_size += table_size;</div><div class='add'>+			item_offset += table_size;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_END();</div><div class='add'>+</div><div class='add'>+		/* send init table to MMSCH */</div><div class='add'>+		size = sizeof(struct mmsch_v5_0_init_header);</div><div class='add'>+		table_loc = (uint32_t *)table-&gt;cpu_addr;</div><div class='add'>+		memcpy((void *)table_loc, &amp;header, size);</div><div class='add'>+</div><div class='add'>+		ctx_addr = table-&gt;gpu_addr;</div><div class='add'>+		WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));</div><div class='add'>+		WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));</div><div class='add'>+</div><div class='add'>+		tmp = RREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_VMID);</div><div class='add'>+		tmp &amp;= ~MMSCH_VF_VMID__VF_CTX_VMID_MASK;</div><div class='add'>+		tmp |= (0 &lt;&lt; MMSCH_VF_VMID__VF_CTX_VMID__SHIFT);</div><div class='add'>+		WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_VMID, tmp);</div><div class='add'>+</div><div class='add'>+		size = header.total_size;</div><div class='add'>+		WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_CTX_SIZE, size);</div><div class='add'>+</div><div class='add'>+		WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_RESP, 0);</div><div class='add'>+</div><div class='add'>+		param = 0x00000001;</div><div class='add'>+		WREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_HOST, param);</div><div class='add'>+		tmp = 0;</div><div class='add'>+		timeout = 1000;</div><div class='add'>+		resp = 0;</div><div class='add'>+		expected = MMSCH_VF_MAILBOX_RESP__OK;</div><div class='add'>+		init_status =</div><div class='add'>+			((struct mmsch_v5_0_init_header *)(table_loc))-&gt;mjpegdec0[i].init_status;</div><div class='add'>+		while (resp != expected) {</div><div class='add'>+			resp = RREG32_SOC15(VCN, jpeg_inst, regMMSCH_VF_MAILBOX_RESP);</div><div class='add'>+</div><div class='add'>+			if (resp != 0)</div><div class='add'>+				break;</div><div class='add'>+			udelay(10);</div><div class='add'>+			tmp = tmp + 10;</div><div class='add'>+			if (tmp &gt;= timeout) {</div><div class='add'>+				DRM_ERROR("failed to init MMSCH. TIME-OUT after %d usec"\</div><div class='add'>+					" waiting for regMMSCH_VF_MAILBOX_RESP "\</div><div class='add'>+					"(expected=0x%08x, readback=0x%08x)\n",</div><div class='add'>+					tmp, expected, resp);</div><div class='add'>+				return -EBUSY;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (resp != expected &amp;&amp; resp != MMSCH_VF_MAILBOX_RESP__INCOMPLETE &amp;&amp;</div><div class='add'>+				init_status != MMSCH_VF_ENGINE_STATUS__PASS)</div><div class='add'>+			DRM_ERROR("MMSCH init status is incorrect! readback=0x%08x, header init status for jpeg: %x\n",</div><div class='add'>+					resp, init_status);</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * jpeg_v5_0_1_start - start JPEG block</div><div class='ctx'>  *</div><div class='hunk'>@@ -581,6 +696,11 @@ static int jpeg_v5_0_1_set_powergating_state(struct amdgpu_ip_block *ip_block,</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_sriov_vf(adev)) {</div><div class='add'>+		adev-&gt;jpeg.cur_state = AMD_PG_STATE_UNGATE;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (state == adev-&gt;jpeg.cur_state)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c<br/>new file mode 100644<br/>index 000000000000..d6f50b13e2ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mes_userqueue.c</a></div><div class='hunk'>@@ -0,0 +1,355 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "amdgpu_gfx.h"</div><div class='add'>+#include "mes_userqueue.h"</div><div class='add'>+#include "amdgpu_userq_fence.h"</div><div class='add'>+</div><div class='add'>+#define AMDGPU_USERQ_PROC_CTX_SZ PAGE_SIZE</div><div class='add'>+#define AMDGPU_USERQ_GANG_CTX_SZ PAGE_SIZE</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mes_userq_map_gtt_bo_to_gart(struct amdgpu_bo *bo)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_bo_reserve(bo, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Failed to reserve bo. ret %d\n", ret);</div><div class='add'>+		goto err_reserve_bo_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amdgpu_ttm_alloc_gart(&amp;bo-&gt;tbo);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Failed to bind bo to GART. ret %d\n", ret);</div><div class='add'>+		goto err_map_bo_gart_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amdgpu_bo_unreserve(bo);</div><div class='add'>+	bo = amdgpu_bo_ref(bo);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_map_bo_gart_failed:</div><div class='add'>+	amdgpu_bo_unreserve(bo);</div><div class='add'>+err_reserve_bo_failed:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mes_userq_create_wptr_mapping(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			      struct amdgpu_usermode_queue *queue,</div><div class='add'>+			      uint64_t wptr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_bo_va_mapping *wptr_mapping;</div><div class='add'>+	struct amdgpu_vm *wptr_vm;</div><div class='add'>+	struct amdgpu_userq_obj *wptr_obj = &amp;queue-&gt;wptr_obj;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	wptr_vm = queue-&gt;vm;</div><div class='add'>+	ret = amdgpu_bo_reserve(wptr_vm-&gt;root.bo, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	wptr &amp;= AMDGPU_GMC_HOLE_MASK;</div><div class='add'>+	wptr_mapping = amdgpu_vm_bo_lookup_mapping(wptr_vm, wptr &gt;&gt; PAGE_SHIFT);</div><div class='add'>+	amdgpu_bo_unreserve(wptr_vm-&gt;root.bo);</div><div class='add'>+	if (!wptr_mapping) {</div><div class='add'>+		DRM_ERROR("Failed to lookup wptr bo\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wptr_obj-&gt;obj = wptr_mapping-&gt;bo_va-&gt;base.bo;</div><div class='add'>+	if (wptr_obj-&gt;obj-&gt;tbo.base.size &gt; PAGE_SIZE) {</div><div class='add'>+		DRM_ERROR("Requested GART mapping for wptr bo larger than one page\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mes_userq_map_gtt_bo_to_gart(wptr_obj-&gt;obj);</div><div class='add'>+	if (ret) {</div><div class='add'>+		DRM_ERROR("Failed to map wptr bo to GART\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue-&gt;wptr_obj.gpu_addr = amdgpu_bo_gpu_offset_no_check(wptr_obj-&gt;obj);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int convert_to_mes_priority(int priority)</div><div class='add'>+{</div><div class='add'>+	switch (priority) {</div><div class='add'>+	case AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_LOW:</div><div class='add'>+	default:</div><div class='add'>+		return AMDGPU_MES_PRIORITY_LEVEL_NORMAL;</div><div class='add'>+	case AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_LOW:</div><div class='add'>+		return AMDGPU_MES_PRIORITY_LEVEL_LOW;</div><div class='add'>+	case AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_NORMAL_HIGH:</div><div class='add'>+		return AMDGPU_MES_PRIORITY_LEVEL_MEDIUM;</div><div class='add'>+	case AMDGPU_USERQ_CREATE_FLAGS_QUEUE_PRIORITY_HIGH:</div><div class='add'>+		return AMDGPU_MES_PRIORITY_LEVEL_HIGH;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mes_userq_map(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			 struct amdgpu_usermode_queue *queue)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	struct amdgpu_userq_obj *ctx = &amp;queue-&gt;fw_obj;</div><div class='add'>+	struct amdgpu_mqd_prop *userq_props = queue-&gt;userq_prop;</div><div class='add'>+	struct mes_add_queue_input queue_input;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	memset(&amp;queue_input, 0x0, sizeof(struct mes_add_queue_input));</div><div class='add'>+</div><div class='add'>+	queue_input.process_va_start = 0;</div><div class='add'>+	queue_input.process_va_end = adev-&gt;vm_manager.max_pfn - 1;</div><div class='add'>+</div><div class='add'>+	/* set process quantum to 10 ms and gang quantum to 1 ms as default */</div><div class='add'>+	queue_input.process_quantum = 100000;</div><div class='add'>+	queue_input.gang_quantum = 10000;</div><div class='add'>+	queue_input.paging = false;</div><div class='add'>+</div><div class='add'>+	queue_input.process_context_addr = ctx-&gt;gpu_addr;</div><div class='add'>+	queue_input.gang_context_addr = ctx-&gt;gpu_addr + AMDGPU_USERQ_PROC_CTX_SZ;</div><div class='add'>+	queue_input.inprocess_gang_priority = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;</div><div class='add'>+	queue_input.gang_global_priority_level = convert_to_mes_priority(queue-&gt;priority);</div><div class='add'>+</div><div class='add'>+	queue_input.process_id = queue-&gt;vm-&gt;pasid;</div><div class='add'>+	queue_input.queue_type = queue-&gt;queue_type;</div><div class='add'>+	queue_input.mqd_addr = queue-&gt;mqd.gpu_addr;</div><div class='add'>+	queue_input.wptr_addr = userq_props-&gt;wptr_gpu_addr;</div><div class='add'>+	queue_input.queue_size = userq_props-&gt;queue_size &gt;&gt; 2;</div><div class='add'>+	queue_input.doorbell_offset = userq_props-&gt;doorbell_index;</div><div class='add'>+	queue_input.page_table_base_addr = amdgpu_gmc_pd_addr(queue-&gt;vm-&gt;root.bo);</div><div class='add'>+	queue_input.wptr_mc_addr = queue-&gt;wptr_obj.gpu_addr;</div><div class='add'>+</div><div class='add'>+	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='add'>+	r = adev-&gt;mes.funcs-&gt;add_hw_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='add'>+	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed to map queue in HW, err (%d)\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DRM_DEBUG_DRIVER("Queue (doorbell:%d) mapped successfully\n", userq_props-&gt;doorbell_index);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mes_userq_unmap(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+			   struct amdgpu_usermode_queue *queue)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	struct mes_remove_queue_input queue_input;</div><div class='add'>+	struct amdgpu_userq_obj *ctx = &amp;queue-&gt;fw_obj;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	memset(&amp;queue_input, 0x0, sizeof(struct mes_remove_queue_input));</div><div class='add'>+	queue_input.doorbell_offset = queue-&gt;doorbell_index;</div><div class='add'>+	queue_input.gang_context_addr = ctx-&gt;gpu_addr + AMDGPU_USERQ_PROC_CTX_SZ;</div><div class='add'>+</div><div class='add'>+	amdgpu_mes_lock(&amp;adev-&gt;mes);</div><div class='add'>+	r = adev-&gt;mes.funcs-&gt;remove_hw_queue(&amp;adev-&gt;mes, &amp;queue_input);</div><div class='add'>+	amdgpu_mes_unlock(&amp;adev-&gt;mes);</div><div class='add'>+	if (r)</div><div class='add'>+		DRM_ERROR("Failed to unmap queue in HW, err (%d)\n", r);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mes_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+				      struct amdgpu_usermode_queue *queue,</div><div class='add'>+				      struct drm_amdgpu_userq_in *mqd_user)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_userq_obj *ctx = &amp;queue-&gt;fw_obj;</div><div class='add'>+	int r, size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The FW expects at least one page space allocated for</div><div class='add'>+	 * process ctx and gang ctx each. Create an object</div><div class='add'>+	 * for the same.</div><div class='add'>+	 */</div><div class='add'>+	size = AMDGPU_USERQ_PROC_CTX_SZ + AMDGPU_USERQ_GANG_CTX_SZ;</div><div class='add'>+	r = amdgpu_userq_create_object(uq_mgr, ctx, size);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed to allocate ctx space bo for userqueue, err:%d\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mes_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+				struct drm_amdgpu_userq_in *args_in,</div><div class='add'>+				struct amdgpu_usermode_queue *queue)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = uq_mgr-&gt;adev;</div><div class='add'>+	struct amdgpu_mqd *mqd_hw_default = &amp;adev-&gt;mqds[queue-&gt;queue_type];</div><div class='add'>+	struct drm_amdgpu_userq_in *mqd_user = args_in;</div><div class='add'>+	struct amdgpu_mqd_prop *userq_props;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	/* Structure to initialize MQD for userqueue using generic MQD init function */</div><div class='add'>+	userq_props = kzalloc(sizeof(struct amdgpu_mqd_prop), GFP_KERNEL);</div><div class='add'>+	if (!userq_props) {</div><div class='add'>+		DRM_ERROR("Failed to allocate memory for userq_props\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mqd_user-&gt;wptr_va || !mqd_user-&gt;rptr_va ||</div><div class='add'>+	    !mqd_user-&gt;queue_va || mqd_user-&gt;queue_size == 0) {</div><div class='add'>+		DRM_ERROR("Invalid MQD parameters for userqueue\n");</div><div class='add'>+		r = -EINVAL;</div><div class='add'>+		goto free_props;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	r = amdgpu_userq_create_object(uq_mgr, &amp;queue-&gt;mqd, mqd_hw_default-&gt;mqd_size);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed to create MQD object for userqueue\n");</div><div class='add'>+		goto free_props;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize the MQD BO with user given values */</div><div class='add'>+	userq_props-&gt;wptr_gpu_addr = mqd_user-&gt;wptr_va;</div><div class='add'>+	userq_props-&gt;rptr_gpu_addr = mqd_user-&gt;rptr_va;</div><div class='add'>+	userq_props-&gt;queue_size = mqd_user-&gt;queue_size;</div><div class='add'>+	userq_props-&gt;hqd_base_gpu_addr = mqd_user-&gt;queue_va;</div><div class='add'>+	userq_props-&gt;mqd_gpu_addr = queue-&gt;mqd.gpu_addr;</div><div class='add'>+	userq_props-&gt;use_doorbell = true;</div><div class='add'>+	userq_props-&gt;doorbell_index = queue-&gt;doorbell_index;</div><div class='add'>+	userq_props-&gt;fence_address = queue-&gt;fence_drv-&gt;gpu_addr;</div><div class='add'>+</div><div class='add'>+	if (queue-&gt;queue_type == AMDGPU_HW_IP_COMPUTE) {</div><div class='add'>+		struct drm_amdgpu_userq_mqd_compute_gfx11 *compute_mqd;</div><div class='add'>+</div><div class='add'>+		if (mqd_user-&gt;mqd_size != sizeof(*compute_mqd)) {</div><div class='add'>+			DRM_ERROR("Invalid compute IP MQD size\n");</div><div class='add'>+			r = -EINVAL;</div><div class='add'>+			goto free_mqd;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		compute_mqd = memdup_user(u64_to_user_ptr(mqd_user-&gt;mqd), mqd_user-&gt;mqd_size);</div><div class='add'>+		if (IS_ERR(compute_mqd)) {</div><div class='add'>+			DRM_ERROR("Failed to read user MQD\n");</div><div class='add'>+			r = -ENOMEM;</div><div class='add'>+			goto free_mqd;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		userq_props-&gt;eop_gpu_addr = compute_mqd-&gt;eop_va;</div><div class='add'>+		userq_props-&gt;hqd_pipe_priority = AMDGPU_GFX_PIPE_PRIO_NORMAL;</div><div class='add'>+		userq_props-&gt;hqd_queue_priority = AMDGPU_GFX_QUEUE_PRIORITY_MINIMUM;</div><div class='add'>+		userq_props-&gt;hqd_active = false;</div><div class='add'>+		userq_props-&gt;tmz_queue =</div><div class='add'>+			mqd_user-&gt;flags &amp; AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE;</div><div class='add'>+		kfree(compute_mqd);</div><div class='add'>+	} else if (queue-&gt;queue_type == AMDGPU_HW_IP_GFX) {</div><div class='add'>+		struct drm_amdgpu_userq_mqd_gfx11 *mqd_gfx_v11;</div><div class='add'>+</div><div class='add'>+		if (mqd_user-&gt;mqd_size != sizeof(*mqd_gfx_v11) || !mqd_user-&gt;mqd) {</div><div class='add'>+			DRM_ERROR("Invalid GFX MQD\n");</div><div class='add'>+			r = -EINVAL;</div><div class='add'>+			goto free_mqd;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mqd_gfx_v11 = memdup_user(u64_to_user_ptr(mqd_user-&gt;mqd), mqd_user-&gt;mqd_size);</div><div class='add'>+		if (IS_ERR(mqd_gfx_v11)) {</div><div class='add'>+			DRM_ERROR("Failed to read user MQD\n");</div><div class='add'>+			r = -ENOMEM;</div><div class='add'>+			goto free_mqd;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		userq_props-&gt;shadow_addr = mqd_gfx_v11-&gt;shadow_va;</div><div class='add'>+		userq_props-&gt;csa_addr = mqd_gfx_v11-&gt;csa_va;</div><div class='add'>+		userq_props-&gt;tmz_queue =</div><div class='add'>+			mqd_user-&gt;flags &amp; AMDGPU_USERQ_CREATE_FLAGS_QUEUE_SECURE;</div><div class='add'>+		kfree(mqd_gfx_v11);</div><div class='add'>+	} else if (queue-&gt;queue_type == AMDGPU_HW_IP_DMA) {</div><div class='add'>+		struct drm_amdgpu_userq_mqd_sdma_gfx11 *mqd_sdma_v11;</div><div class='add'>+</div><div class='add'>+		if (mqd_user-&gt;mqd_size != sizeof(*mqd_sdma_v11) || !mqd_user-&gt;mqd) {</div><div class='add'>+			DRM_ERROR("Invalid SDMA MQD\n");</div><div class='add'>+			r = -EINVAL;</div><div class='add'>+			goto free_mqd;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mqd_sdma_v11 = memdup_user(u64_to_user_ptr(mqd_user-&gt;mqd), mqd_user-&gt;mqd_size);</div><div class='add'>+		if (IS_ERR(mqd_sdma_v11)) {</div><div class='add'>+			DRM_ERROR("Failed to read sdma user MQD\n");</div><div class='add'>+			r = -ENOMEM;</div><div class='add'>+			goto free_mqd;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		userq_props-&gt;csa_addr = mqd_sdma_v11-&gt;csa_va;</div><div class='add'>+		kfree(mqd_sdma_v11);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue-&gt;userq_prop = userq_props;</div><div class='add'>+</div><div class='add'>+	r = mqd_hw_default-&gt;init_mqd(adev, (void *)queue-&gt;mqd.cpu_ptr, userq_props);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed to initialize MQD for userqueue\n");</div><div class='add'>+		goto free_mqd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create BO for FW operations */</div><div class='add'>+	r = mes_userq_create_ctx_space(uq_mgr, queue, mqd_user);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed to allocate BO for userqueue (%d)", r);</div><div class='add'>+		goto free_mqd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FW expects WPTR BOs to be mapped into GART */</div><div class='add'>+	r = mes_userq_create_wptr_mapping(uq_mgr, queue, userq_props-&gt;wptr_gpu_addr);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("Failed to create WPTR mapping\n");</div><div class='add'>+		goto free_ctx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_ctx:</div><div class='add'>+	amdgpu_userq_destroy_object(uq_mgr, &amp;queue-&gt;fw_obj);</div><div class='add'>+</div><div class='add'>+free_mqd:</div><div class='add'>+	amdgpu_userq_destroy_object(uq_mgr, &amp;queue-&gt;mqd);</div><div class='add'>+</div><div class='add'>+free_props:</div><div class='add'>+	kfree(userq_props);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mes_userq_mqd_destroy(struct amdgpu_userq_mgr *uq_mgr,</div><div class='add'>+		      struct amdgpu_usermode_queue *queue)</div><div class='add'>+{</div><div class='add'>+	amdgpu_userq_destroy_object(uq_mgr, &amp;queue-&gt;fw_obj);</div><div class='add'>+	kfree(queue-&gt;userq_prop);</div><div class='add'>+	amdgpu_userq_destroy_object(uq_mgr, &amp;queue-&gt;mqd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct amdgpu_userq_funcs userq_mes_funcs = {</div><div class='add'>+	.mqd_create = mes_userq_mqd_create,</div><div class='add'>+	.mqd_destroy = mes_userq_mqd_destroy,</div><div class='add'>+	.unmap = mes_userq_unmap,</div><div class='add'>+	.map = mes_userq_map,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ad102.c b/drivers/gpu/drm/amd/amdgpu/mes_userqueue.h<br/>index 7ac87ef26aec..090ae8897770 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/nouveau/nvkm/engine/ofa/ad102.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/nouveau/nvkm/engine/ofa/ad102.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_userqueue.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mes_userqueue.h</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='ctx'> /*</div><div class='del'>- * Copyright 2023 Red Hat Inc.</div><div class='add'>+ * Copyright 2024 Advanced Micro Devices, Inc.</div><div class='ctx'>  *</div><div class='ctx'>  * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='ctx'>  * copy of this software and associated documentation files (the "Software"),</div><div class='hunk'>@@ -18,27 +19,12 @@</div><div class='ctx'>  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='ctx'>  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='ctx'>  * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='ctx'>  */</div><div class='del'>-#include "priv.h"</div><div class='del'>-</div><div class='del'>-#include &lt;subdev/gsp.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;nvif/class.h&gt;</div><div class='del'>-</div><div class='del'>-static const struct nvkm_engine_func</div><div class='del'>-ad102_ofa = {</div><div class='del'>-	.sclass = {</div><div class='del'>-		{ -1, -1, NVC9FA_VIDEO_OFA },</div><div class='del'>-		{}</div><div class='del'>-	}</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-ad102_ofa_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,</div><div class='del'>-	      struct nvkm_engine **pengine)</div><div class='del'>-{</div><div class='del'>-	if (nvkm_gsp_rm(device-&gt;gsp))</div><div class='del'>-		return r535_ofa_new(&amp;ad102_ofa, device, type, inst, pengine);</div><div class='add'>+#ifndef MES_USERQ_H</div><div class='add'>+#define MES_USERQ_H</div><div class='add'>+#include "amdgpu_userq.h"</div><div class='ctx'> </div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='add'>+extern const struct amdgpu_userq_funcs userq_mes_funcs;</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br/>index e65916ada23b..c9eba537de09 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mes_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mes_v11_0.c</a></div><div class='hunk'>@@ -287,6 +287,23 @@ static int convert_to_mes_queue_type(int queue_type)</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int convert_to_mes_priority_level(int priority_level)</div><div class='add'>+{</div><div class='add'>+	switch (priority_level) {</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_LOW:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_LOW;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_NORMAL:</div><div class='add'>+	default:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_NORMAL;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_MEDIUM:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_MEDIUM;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_HIGH:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_HIGH;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_REALTIME:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_REALTIME;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 				  struct mes_add_queue_input *input)</div><div class='ctx'> {</div><div class='hunk'>@@ -310,9 +327,9 @@ static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 	mes_add_queue_pkt.gang_quantum = input-&gt;gang_quantum;</div><div class='ctx'> 	mes_add_queue_pkt.gang_context_addr = input-&gt;gang_context_addr;</div><div class='ctx'> 	mes_add_queue_pkt.inprocess_gang_priority =</div><div class='del'>-		input-&gt;inprocess_gang_priority;</div><div class='add'>+		convert_to_mes_priority_level(input-&gt;inprocess_gang_priority);</div><div class='ctx'> 	mes_add_queue_pkt.gang_global_priority_level =</div><div class='del'>-		input-&gt;gang_global_priority_level;</div><div class='add'>+		convert_to_mes_priority_level(input-&gt;gang_global_priority_level);</div><div class='ctx'> 	mes_add_queue_pkt.doorbell_offset = input-&gt;doorbell_offset;</div><div class='ctx'> 	mes_add_queue_pkt.mqd_addr = input-&gt;mqd_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -458,31 +475,6 @@ static int mes_v11_0_reset_queue_mmio(struct amdgpu_mes *mes, uint32_t queue_typ</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mes_v11_0_reset_hw_queue(struct amdgpu_mes *mes,</div><div class='del'>-				    struct mes_reset_queue_input *input)</div><div class='del'>-{</div><div class='del'>-	if (input-&gt;use_mmio)</div><div class='del'>-		return mes_v11_0_reset_queue_mmio(mes, input-&gt;queue_type,</div><div class='del'>-						  input-&gt;me_id, input-&gt;pipe_id,</div><div class='del'>-						  input-&gt;queue_id, input-&gt;vmid);</div><div class='del'>-</div><div class='del'>-	union MESAPI__RESET mes_reset_queue_pkt;</div><div class='del'>-</div><div class='del'>-	memset(&amp;mes_reset_queue_pkt, 0, sizeof(mes_reset_queue_pkt));</div><div class='del'>-</div><div class='del'>-	mes_reset_queue_pkt.header.type = MES_API_TYPE_SCHEDULER;</div><div class='del'>-	mes_reset_queue_pkt.header.opcode = MES_SCH_API_RESET;</div><div class='del'>-	mes_reset_queue_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;</div><div class='del'>-</div><div class='del'>-	mes_reset_queue_pkt.doorbell_offset = input-&gt;doorbell_offset;</div><div class='del'>-	mes_reset_queue_pkt.gang_context_addr = input-&gt;gang_context_addr;</div><div class='del'>-	/*mes_reset_queue_pkt.reset_queue_only = 1;*/</div><div class='del'>-</div><div class='del'>-	return mes_v11_0_submit_pkt_and_poll_completion(mes,</div><div class='del'>-			&amp;mes_reset_queue_pkt, sizeof(mes_reset_queue_pkt),</div><div class='del'>-			offsetof(union MESAPI__REMOVE_QUEUE, api_status));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mes_v11_0_map_legacy_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 				      struct mes_map_legacy_queue_input *input)</div><div class='ctx'> {</div><div class='hunk'>@@ -649,7 +641,7 @@ static int mes_v11_0_misc_op(struct amdgpu_mes *mes,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MES_MISC_OP_CHANGE_CONFIG:</div><div class='ctx'> 		if ((mes-&gt;adev-&gt;mes.sched_version &amp; AMDGPU_MES_VERSION_MASK) &lt; 0x63) {</div><div class='del'>-			dev_err(mes-&gt;adev-&gt;dev, "MES FW versoin must be larger than 0x63 to support limit single process feature.\n");</div><div class='add'>+			dev_err(mes-&gt;adev-&gt;dev, "MES FW version must be larger than 0x63 to support limit single process feature.\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		misc_pkt.opcode = MESAPI_MISC__CHANGE_CONFIG;</div><div class='hunk'>@@ -694,7 +686,8 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)</div><div class='ctx'> 			mes-&gt;compute_hqd_mask[i];</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_GFX_PIPES; i++)</div><div class='del'>-		mes_set_hw_res_pkt.gfx_hqd_mask[i] = mes-&gt;gfx_hqd_mask[i];</div><div class='add'>+		mes_set_hw_res_pkt.gfx_hqd_mask[i] =</div><div class='add'>+			mes-&gt;gfx_hqd_mask[i];</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_SDMA_PIPES; i++)</div><div class='ctx'> 		mes_set_hw_res_pkt.sdma_hqd_mask[i] = mes-&gt;sdma_hqd_mask[i];</div><div class='hunk'>@@ -723,7 +716,7 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)</div><div class='ctx'> 					mes-&gt;event_log_gpu_addr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (enforce_isolation)</div><div class='add'>+	if (adev-&gt;enforce_isolation[0] == AMDGPU_ENFORCE_ISOLATION_ENABLE)</div><div class='ctx'> 		mes_set_hw_res_pkt.limit_single_process = 1;</div><div class='ctx'> </div><div class='ctx'> 	return mes_v11_0_submit_pkt_and_poll_completion(mes,</div><div class='hunk'>@@ -753,8 +746,8 @@ static int mes_v11_0_set_hw_resources_1(struct amdgpu_mes *mes)</div><div class='ctx'> 			offsetof(union MESAPI_SET_HW_RESOURCES_1, api_status));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mes_v11_0_reset_legacy_queue(struct amdgpu_mes *mes,</div><div class='del'>-					struct mes_reset_legacy_queue_input *input)</div><div class='add'>+static int mes_v11_0_reset_hw_queue(struct amdgpu_mes *mes,</div><div class='add'>+				    struct mes_reset_queue_input *input)</div><div class='ctx'> {</div><div class='ctx'> 	union MESAPI__RESET mes_reset_queue_pkt;</div><div class='ctx'> </div><div class='hunk'>@@ -772,7 +765,7 @@ static int mes_v11_0_reset_legacy_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 	mes_reset_queue_pkt.queue_type =</div><div class='ctx'> 		convert_to_mes_queue_type(input-&gt;queue_type);</div><div class='ctx'> </div><div class='del'>-	if (mes_reset_queue_pkt.queue_type == MES_QUEUE_TYPE_GFX) {</div><div class='add'>+	if (input-&gt;legacy_gfx) {</div><div class='ctx'> 		mes_reset_queue_pkt.reset_legacy_gfx = 1;</div><div class='ctx'> 		mes_reset_queue_pkt.pipe_id_lp = input-&gt;pipe_id;</div><div class='ctx'> 		mes_reset_queue_pkt.queue_id_lp = input-&gt;queue_id;</div><div class='hunk'>@@ -798,7 +791,6 @@ static const struct amdgpu_mes_funcs mes_v11_0_funcs = {</div><div class='ctx'> 	.suspend_gang = mes_v11_0_suspend_gang,</div><div class='ctx'> 	.resume_gang = mes_v11_0_resume_gang,</div><div class='ctx'> 	.misc_op = mes_v11_0_misc_op,</div><div class='del'>-	.reset_legacy_queue = mes_v11_0_reset_legacy_queue,</div><div class='ctx'> 	.reset_hw_queue = mes_v11_0_reset_hw_queue,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -894,6 +886,10 @@ static void mes_v11_0_get_fw_version(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	int pipe;</div><div class='ctx'> </div><div class='add'>+	/* return early if we have already fetched these */</div><div class='add'>+	if (adev-&gt;mes.sched_version &amp;&amp; adev-&gt;mes.kiq_version)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* get MES scheduler/KIQ versions */</div><div class='ctx'> 	mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -1697,22 +1693,10 @@ static int mes_v11_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mes_v11_0_late_init(struct amdgpu_ip_block *ip_block)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='del'>-</div><div class='del'>-	/* it's only intended for use in mes_self_test case, not for s0ix and reset */</div><div class='del'>-	if (!amdgpu_in_reset(adev) &amp;&amp; !adev-&gt;in_s0ix &amp;&amp; !adev-&gt;in_suspend &amp;&amp;</div><div class='del'>-	    (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(11, 0, 3)))</div><div class='del'>-		amdgpu_mes_self_test(adev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct amd_ip_funcs mes_v11_0_ip_funcs = {</div><div class='ctx'> 	.name = "mes_v11_0",</div><div class='ctx'> 	.early_init = mes_v11_0_early_init,</div><div class='del'>-	.late_init = mes_v11_0_late_init,</div><div class='add'>+	.late_init = NULL,</div><div class='ctx'> 	.sw_init = mes_v11_0_sw_init,</div><div class='ctx'> 	.sw_fini = mes_v11_0_sw_fini,</div><div class='ctx'> 	.hw_init = mes_v11_0_hw_init,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c<br/>index 183dd3346da5..b4f17332d466 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mes_v12_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mes_v12_0.c</a></div><div class='hunk'>@@ -274,6 +274,23 @@ static int convert_to_mes_queue_type(int queue_type)</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int convert_to_mes_priority_level(int priority_level)</div><div class='add'>+{</div><div class='add'>+	switch (priority_level) {</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_LOW:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_LOW;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_NORMAL:</div><div class='add'>+	default:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_NORMAL;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_MEDIUM:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_MEDIUM;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_HIGH:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_HIGH;</div><div class='add'>+	case AMDGPU_MES_PRIORITY_LEVEL_REALTIME:</div><div class='add'>+		return AMD_PRIORITY_LEVEL_REALTIME;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mes_v12_0_add_hw_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 				  struct mes_add_queue_input *input)</div><div class='ctx'> {</div><div class='hunk'>@@ -297,9 +314,9 @@ static int mes_v12_0_add_hw_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 	mes_add_queue_pkt.gang_quantum = input-&gt;gang_quantum;</div><div class='ctx'> 	mes_add_queue_pkt.gang_context_addr = input-&gt;gang_context_addr;</div><div class='ctx'> 	mes_add_queue_pkt.inprocess_gang_priority =</div><div class='del'>-		input-&gt;inprocess_gang_priority;</div><div class='add'>+		convert_to_mes_priority_level(input-&gt;inprocess_gang_priority);</div><div class='ctx'> 	mes_add_queue_pkt.gang_global_priority_level =</div><div class='del'>-		input-&gt;gang_global_priority_level;</div><div class='add'>+		convert_to_mes_priority_level(input-&gt;gang_global_priority_level);</div><div class='ctx'> 	mes_add_queue_pkt.doorbell_offset = input-&gt;doorbell_offset;</div><div class='ctx'> 	mes_add_queue_pkt.mqd_addr = input-&gt;mqd_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -477,32 +494,6 @@ static int mes_v12_0_reset_queue_mmio(struct amdgpu_mes *mes, uint32_t queue_typ</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mes_v12_0_reset_hw_queue(struct amdgpu_mes *mes,</div><div class='del'>-				    struct mes_reset_queue_input *input)</div><div class='del'>-{</div><div class='del'>-	union MESAPI__RESET mes_reset_queue_pkt;</div><div class='del'>-	int pipe;</div><div class='del'>-</div><div class='del'>-	memset(&amp;mes_reset_queue_pkt, 0, sizeof(mes_reset_queue_pkt));</div><div class='del'>-</div><div class='del'>-	mes_reset_queue_pkt.header.type = MES_API_TYPE_SCHEDULER;</div><div class='del'>-	mes_reset_queue_pkt.header.opcode = MES_SCH_API_RESET;</div><div class='del'>-	mes_reset_queue_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;</div><div class='del'>-</div><div class='del'>-	mes_reset_queue_pkt.doorbell_offset = input-&gt;doorbell_offset;</div><div class='del'>-	mes_reset_queue_pkt.gang_context_addr = input-&gt;gang_context_addr;</div><div class='del'>-	/*mes_reset_queue_pkt.reset_queue_only = 1;*/</div><div class='del'>-</div><div class='del'>-	if (mes-&gt;adev-&gt;enable_uni_mes)</div><div class='del'>-		pipe = AMDGPU_MES_KIQ_PIPE;</div><div class='del'>-	else</div><div class='del'>-		pipe = AMDGPU_MES_SCHED_PIPE;</div><div class='del'>-</div><div class='del'>-	return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,</div><div class='del'>-			&amp;mes_reset_queue_pkt, sizeof(mes_reset_queue_pkt),</div><div class='del'>-			offsetof(union MESAPI__REMOVE_QUEUE, api_status));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mes_v12_0_map_legacy_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 				      struct mes_map_legacy_queue_input *input)</div><div class='ctx'> {</div><div class='hunk'>@@ -762,7 +753,7 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe)</div><div class='ctx'> 				pipe * (AMDGPU_MES_LOG_BUFFER_SIZE + AMDGPU_MES_MSCRATCH_SIZE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (enforce_isolation)</div><div class='add'>+	if (adev-&gt;enforce_isolation[0] == AMDGPU_ENFORCE_ISOLATION_ENABLE)</div><div class='ctx'> 		mes_set_hw_res_pkt.limit_single_process = 1;</div><div class='ctx'> </div><div class='ctx'> 	return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,</div><div class='hunk'>@@ -845,8 +836,8 @@ static void mes_v12_0_enable_unmapped_doorbell_handling(</div><div class='ctx'> 	WREG32_SOC15(GC, 0, regCP_UNMAPPED_DOORBELL, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mes_v12_0_reset_legacy_queue(struct amdgpu_mes *mes,</div><div class='del'>-					struct mes_reset_legacy_queue_input *input)</div><div class='add'>+static int mes_v12_0_reset_hw_queue(struct amdgpu_mes *mes,</div><div class='add'>+				    struct mes_reset_queue_input *input)</div><div class='ctx'> {</div><div class='ctx'> 	union MESAPI__RESET mes_reset_queue_pkt;</div><div class='ctx'> 	int pipe;</div><div class='hunk'>@@ -865,7 +856,7 @@ static int mes_v12_0_reset_legacy_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 	mes_reset_queue_pkt.queue_type =</div><div class='ctx'> 		convert_to_mes_queue_type(input-&gt;queue_type);</div><div class='ctx'> </div><div class='del'>-	if (mes_reset_queue_pkt.queue_type == MES_QUEUE_TYPE_GFX) {</div><div class='add'>+	if (input-&gt;legacy_gfx) {</div><div class='ctx'> 		mes_reset_queue_pkt.reset_legacy_gfx = 1;</div><div class='ctx'> 		mes_reset_queue_pkt.pipe_id_lp = input-&gt;pipe_id;</div><div class='ctx'> 		mes_reset_queue_pkt.queue_id_lp = input-&gt;queue_id;</div><div class='hunk'>@@ -878,7 +869,7 @@ static int mes_v12_0_reset_legacy_queue(struct amdgpu_mes *mes,</div><div class='ctx'> 		mes_reset_queue_pkt.doorbell_offset = input-&gt;doorbell_offset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mes-&gt;adev-&gt;enable_uni_mes)</div><div class='add'>+	if (input-&gt;is_kq)</div><div class='ctx'> 		pipe = AMDGPU_MES_KIQ_PIPE;</div><div class='ctx'> 	else</div><div class='ctx'> 		pipe = AMDGPU_MES_SCHED_PIPE;</div><div class='hunk'>@@ -896,7 +887,6 @@ static const struct amdgpu_mes_funcs mes_v12_0_funcs = {</div><div class='ctx'> 	.suspend_gang = mes_v12_0_suspend_gang,</div><div class='ctx'> 	.resume_gang = mes_v12_0_resume_gang,</div><div class='ctx'> 	.misc_op = mes_v12_0_misc_op,</div><div class='del'>-	.reset_legacy_queue = mes_v12_0_reset_legacy_queue,</div><div class='ctx'> 	.reset_hw_queue = mes_v12_0_reset_hw_queue,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1392,17 +1382,20 @@ static int mes_v12_0_queue_init(struct amdgpu_device *adev,</div><div class='ctx'> 		mes_v12_0_queue_init_register(ring);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* get MES scheduler/KIQ versions */</div><div class='del'>-	mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='del'>-	soc21_grbm_select(adev, 3, pipe, 0, 0);</div><div class='add'>+	if (((pipe == AMDGPU_MES_SCHED_PIPE) &amp;&amp; !adev-&gt;mes.sched_version) ||</div><div class='add'>+	    ((pipe == AMDGPU_MES_KIQ_PIPE) &amp;&amp; !adev-&gt;mes.kiq_version)) {</div><div class='add'>+		/* get MES scheduler/KIQ versions */</div><div class='add'>+		mutex_lock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+		soc21_grbm_select(adev, 3, pipe, 0, 0);</div><div class='ctx'> </div><div class='del'>-	if (pipe == AMDGPU_MES_SCHED_PIPE)</div><div class='del'>-		adev-&gt;mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);</div><div class='del'>-	else if (pipe == AMDGPU_MES_KIQ_PIPE &amp;&amp; adev-&gt;enable_mes_kiq)</div><div class='del'>-		adev-&gt;mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);</div><div class='add'>+		if (pipe == AMDGPU_MES_SCHED_PIPE)</div><div class='add'>+			adev-&gt;mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);</div><div class='add'>+		else if (pipe == AMDGPU_MES_KIQ_PIPE &amp;&amp; adev-&gt;enable_mes_kiq)</div><div class='add'>+			adev-&gt;mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);</div><div class='ctx'> </div><div class='del'>-	soc21_grbm_select(adev, 0, 0, 0, 0);</div><div class='del'>-	mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+		soc21_grbm_select(adev, 0, 0, 0, 0);</div><div class='add'>+		mutex_unlock(&amp;adev-&gt;srbm_mutex);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1808,21 +1801,10 @@ static int mes_v12_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mes_v12_0_late_init(struct amdgpu_ip_block *ip_block)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='del'>-</div><div class='del'>-	/* it's only intended for use in mes_self_test case, not for s0ix and reset */</div><div class='del'>-	if (!amdgpu_in_reset(adev) &amp;&amp; !adev-&gt;in_s0ix &amp;&amp; !adev-&gt;in_suspend)</div><div class='del'>-		amdgpu_mes_self_test(adev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct amd_ip_funcs mes_v12_0_ip_funcs = {</div><div class='ctx'> 	.name = "mes_v12_0",</div><div class='ctx'> 	.early_init = mes_v12_0_early_init,</div><div class='del'>-	.late_init = mes_v12_0_late_init,</div><div class='add'>+	.late_init = NULL,</div><div class='ctx'> 	.sw_init = mes_v12_0_sw_init,</div><div class='ctx'> 	.sw_fini = mes_v12_0_sw_fini,</div><div class='ctx'> 	.hw_init = mes_v12_0_hw_init,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c<br/>index 84cde1239ee4..76167fadb292 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include "soc15_common.h"</div><div class='ctx'> #include "soc15.h"</div><div class='ctx'> #include "amdgpu_ras.h"</div><div class='add'>+#include "amdgpu_psp.h"</div><div class='ctx'> </div><div class='ctx'> #define regVM_L2_CNTL3_DEFAULT	0x80100007</div><div class='ctx'> #define regVM_L2_CNTL4_DEFAULT	0x000000c1</div><div class='hunk'>@@ -192,10 +193,8 @@ static void mmhub_v1_8_init_tlb_regs(struct amdgpu_device *adev)</div><div class='ctx'> 	uint32_t tmp, inst_mask;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* Setup TLB control */</div><div class='del'>-	inst_mask = adev-&gt;aid_mask;</div><div class='del'>-	for_each_inst(i, inst_mask) {</div><div class='del'>-		tmp = RREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL);</div><div class='add'>+	if (amdgpu_sriov_reg_indirect_l1_tlb_cntl(adev)) {</div><div class='add'>+		tmp = RREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL);</div><div class='ctx'> </div><div class='ctx'> 		tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB,</div><div class='ctx'> 				    1);</div><div class='hunk'>@@ -209,7 +208,26 @@ static void mmhub_v1_8_init_tlb_regs(struct amdgpu_device *adev)</div><div class='ctx'> 				    MTYPE, MTYPE_UC);/* XXX for emulation. */</div><div class='ctx'> 		tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ATC_EN, 1);</div><div class='ctx'> </div><div class='del'>-		WREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL, tmp);</div><div class='add'>+		psp_reg_program_no_ring(&amp;adev-&gt;psp, tmp, PSP_REG_MMHUB_L1_TLB_CNTL);</div><div class='add'>+	} else {</div><div class='add'>+		inst_mask = adev-&gt;aid_mask;</div><div class='add'>+		for_each_inst(i, inst_mask) {</div><div class='add'>+			tmp = RREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL);</div><div class='add'>+</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB,</div><div class='add'>+					    1);</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL,</div><div class='add'>+					    SYSTEM_ACCESS_MODE, 3);</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL,</div><div class='add'>+					    ENABLE_ADVANCED_DRIVER_MODEL, 1);</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL,</div><div class='add'>+					    SYSTEM_APERTURE_UNMAPPED_ACCESS, 0);</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL,</div><div class='add'>+					    MTYPE, MTYPE_UC);/* XXX for emulation. */</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ATC_EN, 1);</div><div class='add'>+</div><div class='add'>+			WREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL, tmp);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -221,6 +239,9 @@ static void mmhub_v1_8_init_snoop_override_regs(struct amdgpu_device *adev)</div><div class='ctx'> 	uint32_t distance = regDAGB1_WRCLI_GPU_SNOOP_OVERRIDE -</div><div class='ctx'> 			    regDAGB0_WRCLI_GPU_SNOOP_OVERRIDE;</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_sriov_vf(adev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	inst_mask = adev-&gt;aid_mask;</div><div class='ctx'> 	for_each_inst(i, inst_mask) {</div><div class='ctx'> 		for (j = 0; j &lt; 5; j++) { /* DAGB instances */</div><div class='hunk'>@@ -454,6 +475,30 @@ static int mmhub_v1_8_gart_enable(struct amdgpu_device *adev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mmhub_v1_8_disable_l1_tlb(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	u32 tmp;</div><div class='add'>+	u32 i, inst_mask;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_sriov_reg_indirect_l1_tlb_cntl(adev)) {</div><div class='add'>+		tmp = RREG32_SOC15(MMHUB, 0, regMC_VM_MX_L1_TLB_CNTL);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 0);</div><div class='add'>+		tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL,</div><div class='add'>+				    ENABLE_ADVANCED_DRIVER_MODEL, 0);</div><div class='add'>+		psp_reg_program_no_ring(&amp;adev-&gt;psp, tmp, PSP_REG_MMHUB_L1_TLB_CNTL);</div><div class='add'>+	} else {</div><div class='add'>+		inst_mask = adev-&gt;aid_mask;</div><div class='add'>+		for_each_inst(i, inst_mask) {</div><div class='add'>+			tmp = RREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL);</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB,</div><div class='add'>+					    0);</div><div class='add'>+			tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL,</div><div class='add'>+					    ENABLE_ADVANCED_DRIVER_MODEL, 0);</div><div class='add'>+			WREG32_SOC15(MMHUB, i, regMC_VM_MX_L1_TLB_CNTL, tmp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mmhub_v1_8_gart_disable(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_vmhub *hub;</div><div class='hunk'>@@ -467,15 +512,6 @@ static void mmhub_v1_8_gart_disable(struct amdgpu_device *adev)</div><div class='ctx'> 		for (i = 0; i &lt; 16; i++)</div><div class='ctx'> 			WREG32_SOC15_OFFSET(MMHUB, j, regVM_CONTEXT0_CNTL,</div><div class='ctx'> 					    i * hub-&gt;ctx_distance, 0);</div><div class='del'>-</div><div class='del'>-		/* Setup TLB control */</div><div class='del'>-		tmp = RREG32_SOC15(MMHUB, j, regMC_VM_MX_L1_TLB_CNTL);</div><div class='del'>-		tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB,</div><div class='del'>-				    0);</div><div class='del'>-		tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL,</div><div class='del'>-				    ENABLE_ADVANCED_DRIVER_MODEL, 0);</div><div class='del'>-		WREG32_SOC15(MMHUB, j, regMC_VM_MX_L1_TLB_CNTL, tmp);</div><div class='del'>-</div><div class='ctx'> 		if (!amdgpu_sriov_vf(adev)) {</div><div class='ctx'> 			/* Setup L2 cache */</div><div class='ctx'> 			tmp = RREG32_SOC15(MMHUB, j, regVM_L2_CNTL);</div><div class='hunk'>@@ -485,6 +521,8 @@ static void mmhub_v1_8_gart_disable(struct amdgpu_device *adev)</div><div class='ctx'> 			WREG32_SOC15(MMHUB, j, regVM_L2_CNTL3, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	mmhub_v1_8_disable_l1_tlb(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mmsch_v5_0.h b/drivers/gpu/drm/amd/amdgpu/mmsch_v5_0.h<br/>new file mode 100644<br/>index 000000000000..6f749814929f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mmsch_v5_0.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mmsch_v5_0.h</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2023 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MMSCH_V5_0_H__</div><div class='add'>+#define __MMSCH_V5_0_H__</div><div class='add'>+</div><div class='add'>+#include "amdgpu_vcn.h"</div><div class='add'>+</div><div class='add'>+#define MMSCH_VERSION_MAJOR	5</div><div class='add'>+#define MMSCH_VERSION_MINOR	0</div><div class='add'>+#define MMSCH_VERSION	(MMSCH_VERSION_MAJOR &lt;&lt; 16 | MMSCH_VERSION_MINOR)</div><div class='add'>+</div><div class='add'>+#define RB_ENABLED (1 &lt;&lt; 0)</div><div class='add'>+#define RB4_ENABLED (1 &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+#define MMSCH_VF_ENGINE_STATUS__PASS 0x1</div><div class='add'>+</div><div class='add'>+#define MMSCH_VF_MAILBOX_RESP__OK                      0x1</div><div class='add'>+#define MMSCH_VF_MAILBOX_RESP__INCOMPLETE              0x2</div><div class='add'>+#define MMSCH_VF_MAILBOX_RESP__FAILED                  0x3</div><div class='add'>+#define MMSCH_VF_MAILBOX_RESP__FAILED_SMALL_CTX_SIZE   0x4</div><div class='add'>+#define MMSCH_VF_MAILBOX_RESP__UNKNOWN_CMD             0x5</div><div class='add'>+</div><div class='add'>+enum mmsch_v5_0_command_type {</div><div class='add'>+	MMSCH_COMMAND__DIRECT_REG_WRITE = 0,</div><div class='add'>+	MMSCH_COMMAND__DIRECT_REG_POLLING = 2,</div><div class='add'>+	MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3,</div><div class='add'>+	MMSCH_COMMAND__INDIRECT_REG_WRITE = 8,</div><div class='add'>+	MMSCH_COMMAND__END = 0xf</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_table_info {</div><div class='add'>+	uint32_t init_status;</div><div class='add'>+	uint32_t table_offset;</div><div class='add'>+	uint32_t table_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_init_header {</div><div class='add'>+	uint32_t version;</div><div class='add'>+	uint32_t total_size;</div><div class='add'>+	struct mmsch_v5_0_table_info vcn0;</div><div class='add'>+	struct mmsch_v5_0_table_info mjpegdec0[5];</div><div class='add'>+	struct mmsch_v5_0_table_info mjpegdec1[5];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_cmd_direct_reg_header {</div><div class='add'>+	uint32_t reg_offset   : 28;</div><div class='add'>+	uint32_t command_type : 4;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_cmd_indirect_reg_header {</div><div class='add'>+	uint32_t reg_offset    : 20;</div><div class='add'>+	uint32_t reg_idx_space : 8;</div><div class='add'>+	uint32_t command_type  : 4;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_cmd_direct_write {</div><div class='add'>+	struct mmsch_v5_0_cmd_direct_reg_header cmd_header;</div><div class='add'>+	uint32_t reg_value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_cmd_direct_read_modify_write {</div><div class='add'>+	struct mmsch_v5_0_cmd_direct_reg_header cmd_header;</div><div class='add'>+	uint32_t write_data;</div><div class='add'>+	uint32_t mask_value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_cmd_direct_polling {</div><div class='add'>+	struct mmsch_v5_0_cmd_direct_reg_header cmd_header;</div><div class='add'>+	uint32_t mask_value;</div><div class='add'>+	uint32_t wait_value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_cmd_end {</div><div class='add'>+	struct mmsch_v5_0_cmd_direct_reg_header cmd_header;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mmsch_v5_0_cmd_indirect_write {</div><div class='add'>+	struct mmsch_v5_0_cmd_indirect_reg_header cmd_header;</div><div class='add'>+	uint32_t reg_value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MMSCH_V5_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \</div><div class='add'>+	size = sizeof(struct mmsch_v5_0_cmd_direct_read_modify_write); \</div><div class='add'>+	size_dw = size / 4; \</div><div class='add'>+	direct_rd_mod_wt.cmd_header.reg_offset = reg; \</div><div class='add'>+	direct_rd_mod_wt.mask_value = mask; \</div><div class='add'>+	direct_rd_mod_wt.write_data = data; \</div><div class='add'>+	memcpy((void *)table_loc, &amp;direct_rd_mod_wt, size); \</div><div class='add'>+	table_loc += size_dw; \</div><div class='add'>+	table_size += size_dw; \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MMSCH_V5_0_INSERT_DIRECT_WT(reg, value) { \</div><div class='add'>+	size = sizeof(struct mmsch_v5_0_cmd_direct_write); \</div><div class='add'>+	size_dw = size / 4; \</div><div class='add'>+	direct_wt.cmd_header.reg_offset = reg; \</div><div class='add'>+	direct_wt.reg_value = value; \</div><div class='add'>+	memcpy((void *)table_loc, &amp;direct_wt, size); \</div><div class='add'>+	table_loc += size_dw; \</div><div class='add'>+	table_size += size_dw; \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MMSCH_V5_0_INSERT_DIRECT_POLL(reg, mask, wait) { \</div><div class='add'>+	size = sizeof(struct mmsch_v5_0_cmd_direct_polling); \</div><div class='add'>+	size_dw = size / 4; \</div><div class='add'>+	direct_poll.cmd_header.reg_offset = reg; \</div><div class='add'>+	direct_poll.mask_value = mask; \</div><div class='add'>+	direct_poll.wait_value = wait; \</div><div class='add'>+	memcpy((void *)table_loc, &amp;direct_poll, size); \</div><div class='add'>+	table_loc += size_dw; \</div><div class='add'>+	table_size += size_dw; \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MMSCH_V5_0_INSERT_END() { \</div><div class='add'>+	size = sizeof(struct mmsch_v5_0_cmd_end); \</div><div class='add'>+	size_dw = size / 4; \</div><div class='add'>+	memcpy((void *)table_loc, &amp;end, size); \</div><div class='add'>+	table_loc += size_dw; \</div><div class='add'>+	table_size += size_dw; \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c<br/>index f5411b798e11..48101a34e049 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c</a></div><div class='hunk'>@@ -274,6 +274,7 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, flr_work);</div><div class='ctx'> 	struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);</div><div class='add'>+	struct amdgpu_reset_context reset_context = { 0 };</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_virt_fini_data_exchange(adev);</div><div class='ctx'> </div><div class='hunk'>@@ -281,8 +282,6 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> 	if (amdgpu_device_should_recover_gpu(adev)</div><div class='ctx'> 		&amp;&amp; (!amdgpu_device_has_job_running(adev) ||</div><div class='ctx'> 			adev-&gt;sdma_timeout == MAX_SCHEDULE_TIMEOUT)) {</div><div class='del'>-		struct amdgpu_reset_context reset_context;</div><div class='del'>-		memset(&amp;reset_context, 0, sizeof(reset_context));</div><div class='ctx'> </div><div class='ctx'> 		reset_context.method = AMD_RESET_METHOD_NONE;</div><div class='ctx'> 		reset_context.reset_req_dev = adev;</div><div class='hunk'>@@ -293,6 +292,19 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgpu_ai_mailbox_bad_pages_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, bad_pages_work);</div><div class='add'>+	struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);</div><div class='add'>+</div><div class='add'>+	if (down_read_trylock(&amp;adev-&gt;reset_domain-&gt;sem)) {</div><div class='add'>+		amdgpu_virt_fini_data_exchange(adev);</div><div class='add'>+		amdgpu_virt_request_bad_pages(adev);</div><div class='add'>+		amdgpu_virt_init_data_exchange(adev);</div><div class='add'>+		up_read(&amp;adev-&gt;reset_domain-&gt;sem);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgpu_ai_set_mailbox_rcv_irq(struct amdgpu_device *adev,</div><div class='ctx'> 				       struct amdgpu_irq_src *src,</div><div class='ctx'> 				       unsigned type,</div><div class='hunk'>@@ -312,26 +324,42 @@ static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device *adev,</div><div class='ctx'> 				   struct amdgpu_iv_entry *entry)</div><div class='ctx'> {</div><div class='ctx'> 	enum idh_event event = xgpu_ai_mailbox_peek_msg(adev);</div><div class='add'>+	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='ctx'> </div><div class='ctx'> 	switch (event) {</div><div class='del'>-		case IDH_FLR_NOTIFICATION:</div><div class='add'>+	case IDH_RAS_BAD_PAGES_NOTIFICATION:</div><div class='add'>+		xgpu_ai_mailbox_send_ack(adev);</div><div class='add'>+		if (amdgpu_sriov_runtime(adev))</div><div class='add'>+			schedule_work(&amp;adev-&gt;virt.bad_pages_work);</div><div class='add'>+		break;</div><div class='add'>+	case IDH_UNRECOV_ERR_NOTIFICATION:</div><div class='add'>+		xgpu_ai_mailbox_send_ack(adev);</div><div class='add'>+		ras-&gt;is_rma = true;</div><div class='add'>+		dev_err(adev-&gt;dev, "VF is in an unrecoverable state. Runtime Services are halted.\n");</div><div class='ctx'> 		if (amdgpu_sriov_runtime(adev))</div><div class='ctx'> 			WARN_ONCE(!amdgpu_reset_domain_schedule(adev-&gt;reset_domain,</div><div class='del'>-								&amp;adev-&gt;virt.flr_work),</div><div class='del'>-				  "Failed to queue work! at %s",</div><div class='del'>-				  __func__);</div><div class='add'>+					&amp;adev-&gt;virt.flr_work),</div><div class='add'>+					"Failed to queue work! at %s",</div><div class='add'>+					__func__);</div><div class='ctx'> 		break;</div><div class='del'>-		case IDH_QUERY_ALIVE:</div><div class='del'>-			xgpu_ai_mailbox_send_ack(adev);</div><div class='del'>-			break;</div><div class='del'>-		/* READY_TO_ACCESS_GPU is fetched by kernel polling, IRQ can ignore</div><div class='del'>-		 * it byfar since that polling thread will handle it,</div><div class='del'>-		 * other msg like flr complete is not handled here.</div><div class='del'>-		 */</div><div class='del'>-		case IDH_CLR_MSG_BUF:</div><div class='del'>-		case IDH_FLR_NOTIFICATION_CMPL:</div><div class='del'>-		case IDH_READY_TO_ACCESS_GPU:</div><div class='del'>-		default:</div><div class='add'>+	case IDH_FLR_NOTIFICATION:</div><div class='add'>+		if (amdgpu_sriov_runtime(adev))</div><div class='add'>+			WARN_ONCE(!amdgpu_reset_domain_schedule(adev-&gt;reset_domain,</div><div class='add'>+						&amp;adev-&gt;virt.flr_work),</div><div class='add'>+					"Failed to queue work! at %s",</div><div class='add'>+					__func__);</div><div class='add'>+		break;</div><div class='add'>+	case IDH_QUERY_ALIVE:</div><div class='add'>+		xgpu_ai_mailbox_send_ack(adev);</div><div class='add'>+		break;</div><div class='add'>+	/* READY_TO_ACCESS_GPU is fetched by kernel polling, IRQ can ignore</div><div class='add'>+	 * it byfar since that polling thread will handle it,</div><div class='add'>+	 * other msg like flr complete is not handled here.</div><div class='add'>+	 */</div><div class='add'>+	case IDH_CLR_MSG_BUF:</div><div class='add'>+	case IDH_FLR_NOTIFICATION_CMPL:</div><div class='add'>+	case IDH_READY_TO_ACCESS_GPU:</div><div class='add'>+	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -387,6 +415,7 @@ int xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;adev-&gt;virt.flr_work, xgpu_ai_mailbox_flr_work);</div><div class='add'>+	INIT_WORK(&amp;adev-&gt;virt.bad_pages_work, xgpu_ai_mailbox_bad_pages_work);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h<br/>index ed57cbc150af..874b9f8f9804 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mxgpu_ai.h</a></div><div class='hunk'>@@ -40,6 +40,7 @@ enum idh_request {</div><div class='ctx'> 	IDH_LOG_VF_ERROR       = 200,</div><div class='ctx'> 	IDH_READY_TO_RESET 	= 201,</div><div class='ctx'> 	IDH_RAS_POISON  = 202,</div><div class='add'>+	IDH_REQ_RAS_BAD_PAGES = 205,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum idh_event {</div><div class='hunk'>@@ -54,6 +55,9 @@ enum idh_event {</div><div class='ctx'> 	IDH_RAS_POISON_READY,</div><div class='ctx'> 	IDH_PF_SOFT_FLR_NOTIFICATION,</div><div class='ctx'> 	IDH_RAS_ERROR_DETECTED,</div><div class='add'>+	IDH_RAS_BAD_PAGES_READY = 15,</div><div class='add'>+	IDH_RAS_BAD_PAGES_NOTIFICATION = 16,</div><div class='add'>+	IDH_UNRECOV_ERR_NOTIFICATION = 17,</div><div class='ctx'> 	IDH_TEXT_MESSAGE = 255,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c<br/>index 5aadf24cb202..f6d8597452ed 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c</a></div><div class='hunk'>@@ -67,6 +67,8 @@ static int xgpu_nv_mailbox_rcv_msg(struct amdgpu_device *adev,</div><div class='ctx'> 	reg = RREG32_NO_KIQ(mmMAILBOX_MSGBUF_RCV_DW0);</div><div class='ctx'> 	if (reg == IDH_FAIL)</div><div class='ctx'> 		r = -EINVAL;</div><div class='add'>+	if (reg == IDH_UNRECOV_ERR_NOTIFICATION)</div><div class='add'>+		r = -ENODEV;</div><div class='ctx'> 	else if (reg != event)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='hunk'>@@ -103,6 +105,7 @@ static int xgpu_nv_poll_msg(struct amdgpu_device *adev, enum idh_event event)</div><div class='ctx'> {</div><div class='ctx'> 	int r;</div><div class='ctx'> 	uint64_t timeout, now;</div><div class='add'>+	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='ctx'> </div><div class='ctx'> 	now = (uint64_t)ktime_to_ms(ktime_get());</div><div class='ctx'> 	timeout = now + NV_MAILBOX_POLL_MSG_TIMEDOUT;</div><div class='hunk'>@@ -110,8 +113,16 @@ static int xgpu_nv_poll_msg(struct amdgpu_device *adev, enum idh_event event)</div><div class='ctx'> 	do {</div><div class='ctx'> 		r = xgpu_nv_mailbox_rcv_msg(adev, event);</div><div class='ctx'> 		if (!r) {</div><div class='del'>-			dev_dbg(adev-&gt;dev, "rcv_msg 0x%x after %llu ms\n", event, NV_MAILBOX_POLL_MSG_TIMEDOUT - timeout + now);</div><div class='add'>+			dev_dbg(adev-&gt;dev, "rcv_msg 0x%x after %llu ms\n",</div><div class='add'>+					event, NV_MAILBOX_POLL_MSG_TIMEDOUT - timeout + now);</div><div class='ctx'> 			return 0;</div><div class='add'>+		} else if (r == -ENODEV) {</div><div class='add'>+			if (!amdgpu_ras_is_rma(adev)) {</div><div class='add'>+				ras-&gt;is_rma = true;</div><div class='add'>+				dev_err(adev-&gt;dev, "VF is in an unrecoverable state. "</div><div class='add'>+						"Runtime Services are halted.\n");</div><div class='add'>+			}</div><div class='add'>+			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		msleep(10);</div><div class='hunk'>@@ -166,6 +177,10 @@ static int xgpu_nv_send_access_requests_with_param(struct amdgpu_device *adev,</div><div class='ctx'> 	enum idh_event event = -1;</div><div class='ctx'> </div><div class='ctx'> send_request:</div><div class='add'>+</div><div class='add'>+	if (amdgpu_ras_is_rma(adev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	xgpu_nv_mailbox_trans_msg(adev, req, data1, data2, data3);</div><div class='ctx'> </div><div class='ctx'> 	switch (req) {</div><div class='hunk'>@@ -187,6 +202,9 @@ send_request:</div><div class='ctx'> 	case IDH_REQ_RAS_CPER_DUMP:</div><div class='ctx'> 		event = IDH_RAS_CPER_DUMP_READY;</div><div class='ctx'> 		break;</div><div class='add'>+	case IDH_REQ_RAS_BAD_PAGES:</div><div class='add'>+		event = IDH_RAS_BAD_PAGES_READY;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -320,6 +338,7 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, flr_work);</div><div class='ctx'> 	struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);</div><div class='add'>+	struct amdgpu_reset_context reset_context = { 0 };</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_virt_fini_data_exchange(adev);</div><div class='ctx'> </div><div class='hunk'>@@ -330,8 +349,6 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> 		adev-&gt;gfx_timeout == MAX_SCHEDULE_TIMEOUT ||</div><div class='ctx'> 		adev-&gt;compute_timeout == MAX_SCHEDULE_TIMEOUT ||</div><div class='ctx'> 		adev-&gt;video_timeout == MAX_SCHEDULE_TIMEOUT)) {</div><div class='del'>-		struct amdgpu_reset_context reset_context;</div><div class='del'>-		memset(&amp;reset_context, 0, sizeof(reset_context));</div><div class='ctx'> </div><div class='ctx'> 		reset_context.method = AMD_RESET_METHOD_NONE;</div><div class='ctx'> 		reset_context.reset_req_dev = adev;</div><div class='hunk'>@@ -342,6 +359,19 @@ static void xgpu_nv_mailbox_flr_work(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgpu_nv_mailbox_bad_pages_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt, bad_pages_work);</div><div class='add'>+	struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt);</div><div class='add'>+</div><div class='add'>+	if (down_read_trylock(&amp;adev-&gt;reset_domain-&gt;sem)) {</div><div class='add'>+		amdgpu_virt_fini_data_exchange(adev);</div><div class='add'>+		amdgpu_virt_request_bad_pages(adev);</div><div class='add'>+		amdgpu_virt_init_data_exchange(adev);</div><div class='add'>+		up_read(&amp;adev-&gt;reset_domain-&gt;sem);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgpu_nv_set_mailbox_rcv_irq(struct amdgpu_device *adev,</div><div class='ctx'> 				       struct amdgpu_irq_src *src,</div><div class='ctx'> 				       unsigned type,</div><div class='hunk'>@@ -364,8 +394,27 @@ static int xgpu_nv_mailbox_rcv_irq(struct amdgpu_device *adev,</div><div class='ctx'> 				   struct amdgpu_iv_entry *entry)</div><div class='ctx'> {</div><div class='ctx'> 	enum idh_event event = xgpu_nv_mailbox_peek_msg(adev);</div><div class='add'>+	struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);</div><div class='ctx'> </div><div class='ctx'> 	switch (event) {</div><div class='add'>+	case IDH_RAS_BAD_PAGES_NOTIFICATION:</div><div class='add'>+		xgpu_nv_mailbox_send_ack(adev);</div><div class='add'>+		if (amdgpu_sriov_runtime(adev))</div><div class='add'>+			schedule_work(&amp;adev-&gt;virt.bad_pages_work);</div><div class='add'>+		break;</div><div class='add'>+	case IDH_UNRECOV_ERR_NOTIFICATION:</div><div class='add'>+		xgpu_nv_mailbox_send_ack(adev);</div><div class='add'>+		if (!amdgpu_ras_is_rma(adev)) {</div><div class='add'>+			ras-&gt;is_rma = true;</div><div class='add'>+			dev_err(adev-&gt;dev, "VF is in an unrecoverable state. Runtime Services are halted.\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (amdgpu_sriov_runtime(adev))</div><div class='add'>+			WARN_ONCE(!amdgpu_reset_domain_schedule(adev-&gt;reset_domain,</div><div class='add'>+						&amp;adev-&gt;virt.flr_work),</div><div class='add'>+					"Failed to queue work! at %s",</div><div class='add'>+					__func__);</div><div class='add'>+		break;</div><div class='ctx'> 	case IDH_FLR_NOTIFICATION:</div><div class='ctx'> 		if (amdgpu_sriov_runtime(adev))</div><div class='ctx'> 			WARN_ONCE(!amdgpu_reset_domain_schedule(adev-&gt;reset_domain,</div><div class='hunk'>@@ -436,6 +485,7 @@ int xgpu_nv_mailbox_get_irq(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;adev-&gt;virt.flr_work, xgpu_nv_mailbox_flr_work);</div><div class='add'>+	INIT_WORK(&amp;adev-&gt;virt.bad_pages_work, xgpu_nv_mailbox_bad_pages_work);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -480,6 +530,11 @@ static int xgpu_nv_req_ras_cper_dump(struct amdgpu_device *adev, u64 vf_rptr)</div><div class='ctx'> 		adev, IDH_REQ_RAS_CPER_DUMP, vf_rptr_hi, vf_rptr_lo, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int xgpu_nv_req_ras_bad_pages(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	return xgpu_nv_send_access_requests(adev, IDH_REQ_RAS_BAD_PAGES);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct amdgpu_virt_ops xgpu_nv_virt_ops = {</div><div class='ctx'> 	.req_full_gpu	= xgpu_nv_request_full_gpu_access,</div><div class='ctx'> 	.rel_full_gpu	= xgpu_nv_release_full_gpu_access,</div><div class='hunk'>@@ -492,4 +547,5 @@ const struct amdgpu_virt_ops xgpu_nv_virt_ops = {</div><div class='ctx'> 	.rcvd_ras_intr = xgpu_nv_rcvd_ras_intr,</div><div class='ctx'> 	.req_ras_err_count = xgpu_nv_req_ras_err_count,</div><div class='ctx'> 	.req_ras_cper_dump = xgpu_nv_req_ras_cper_dump,</div><div class='add'>+	.req_bad_pages = xgpu_nv_req_ras_bad_pages,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h<br/>index 72c9fceb9d79..5808689562cc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/mxgpu_nv.h</a></div><div class='hunk'>@@ -42,6 +42,7 @@ enum idh_request {</div><div class='ctx'> 	IDH_RAS_POISON	= 202,</div><div class='ctx'> 	IDH_REQ_RAS_ERROR_COUNT = 203,</div><div class='ctx'> 	IDH_REQ_RAS_CPER_DUMP = 204,</div><div class='add'>+	IDH_REQ_RAS_BAD_PAGES = 205,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum idh_event {</div><div class='hunk'>@@ -58,6 +59,9 @@ enum idh_event {</div><div class='ctx'> 	IDH_RAS_ERROR_DETECTED,</div><div class='ctx'> 	IDH_RAS_ERROR_COUNT_READY = 11,</div><div class='ctx'> 	IDH_RAS_CPER_DUMP_READY = 14,</div><div class='add'>+	IDH_RAS_BAD_PAGES_READY = 15,</div><div class='add'>+	IDH_RAS_BAD_PAGES_NOTIFICATION = 16,</div><div class='add'>+	IDH_UNRECOV_ERR_NOTIFICATION = 17,</div><div class='ctx'> </div><div class='ctx'> 	IDH_TEXT_MESSAGE = 255,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c<br/>index 2ece3ae75ec1..bed5ef4d8788 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c</a></div><div class='hunk'>@@ -360,7 +360,7 @@ static void nbio_v7_11_get_clockgating_state(struct amdgpu_device *adev,</div><div class='ctx'> 		*flags |= AMD_CG_SUPPORT_BIF_LS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define MMIO_REG_HOLE_OFFSET (0x80000 - PAGE_SIZE)</div><div class='add'>+#define MMIO_REG_HOLE_OFFSET 0x44000</div><div class='ctx'> </div><div class='ctx'> static void nbio_v7_11_set_reg_remap(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c<br/>index f23cb79110d6..a376f072700d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c</a></div><div class='hunk'>@@ -177,8 +177,12 @@ static void nbio_v7_9_vcn_doorbell_range(struct amdgpu_device *adev, bool use_do</div><div class='ctx'> {</div><div class='ctx'> 	u32 doorbell_range = 0, doorbell_ctrl = 0;</div><div class='ctx'> 	u32 aid_id = instance;</div><div class='add'>+	u32 range_size;</div><div class='ctx'> </div><div class='ctx'> 	if (use_doorbell) {</div><div class='add'>+		range_size = (amdgpu_ip_version(adev, GC_HWIP, 0) ==</div><div class='add'>+						IP_VERSION(9, 5, 0)) ?</div><div class='add'>+						0xb : 0x9;</div><div class='ctx'> 		doorbell_range = REG_SET_FIELD(doorbell_range,</div><div class='ctx'> 				DOORBELL0_CTRL_ENTRY_0,</div><div class='ctx'> 				BIF_DOORBELL0_RANGE_OFFSET_ENTRY,</div><div class='hunk'>@@ -186,7 +190,7 @@ static void nbio_v7_9_vcn_doorbell_range(struct amdgpu_device *adev, bool use_do</div><div class='ctx'> 		doorbell_range = REG_SET_FIELD(doorbell_range,</div><div class='ctx'> 				DOORBELL0_CTRL_ENTRY_0,</div><div class='ctx'> 				BIF_DOORBELL0_RANGE_SIZE_ENTRY,</div><div class='del'>-				0x9);</div><div class='add'>+				range_size);</div><div class='ctx'> 		if (aid_id)</div><div class='ctx'> 			doorbell_range = REG_SET_FIELD(doorbell_range,</div><div class='ctx'> 					DOORBELL0_CTRL_ENTRY_0,</div><div class='hunk'>@@ -204,7 +208,7 @@ static void nbio_v7_9_vcn_doorbell_range(struct amdgpu_device *adev, bool use_do</div><div class='ctx'> 				S2A_DOORBELL_PORT1_RANGE_OFFSET, 0x4);</div><div class='ctx'> 		doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl,</div><div class='ctx'> 				S2A_DOORBELL_ENTRY_1_CTRL,</div><div class='del'>-				S2A_DOORBELL_PORT1_RANGE_SIZE, 0x9);</div><div class='add'>+				S2A_DOORBELL_PORT1_RANGE_SIZE, range_size);</div><div class='ctx'> 		doorbell_ctrl = REG_SET_FIELD(doorbell_ctrl,</div><div class='ctx'> 				S2A_DOORBELL_ENTRY_1_CTRL,</div><div class='ctx'> 				S2A_DOORBELL_PORT1_AWADDR_31_28_VALUE, 0x4);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c<br/>index bb5dfc410a66..215543575f47 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v11_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/psp_v11_0.c</a></div><div class='hunk'>@@ -533,7 +533,7 @@ static int psp_v11_0_memory_training(struct psp_context *psp, uint32_t ops)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			memcpy_toio(adev-&gt;mman.aper_base_kaddr, buf, sz);</div><div class='del'>-			adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+			amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> 			vfree(buf);</div><div class='ctx'> 			drm_dev_exit(idx);</div><div class='ctx'> 		} else {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c<br/>index fcd708eae75c..80153f837470 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v12_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/psp_v12_0.c</a></div><div class='hunk'>@@ -34,9 +34,6 @@</div><div class='ctx'> #include "sdma0/sdma0_4_0_offset.h"</div><div class='ctx'> #include "nbio/nbio_7_4_offset.h"</div><div class='ctx'> </div><div class='del'>-#include "oss/osssys_4_0_offset.h"</div><div class='del'>-#include "oss/osssys_4_0_sh_mask.h"</div><div class='del'>-</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/renoir_asd.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/renoir_ta.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/green_sardine_asd.bin");</div><div class='hunk'>@@ -99,9 +96,6 @@ static int psp_v12_0_bootloader_load_sysdrv(struct psp_context *psp)</div><div class='ctx'> 	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,</div><div class='ctx'> 	       psp_gfxdrv_command_reg);</div><div class='ctx'> </div><div class='del'>-	/* there might be handshake issue with hardware which needs delay */</div><div class='del'>-	mdelay(20);</div><div class='del'>-</div><div class='ctx'> 	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),</div><div class='ctx'> 			   0x80000000, 0x80000000, false);</div><div class='ctx'> </div><div class='hunk'>@@ -138,8 +132,6 @@ static int psp_v12_0_bootloader_load_sos(struct psp_context *psp)</div><div class='ctx'> 	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,</div><div class='ctx'> 	       psp_gfxdrv_command_reg);</div><div class='ctx'> </div><div class='del'>-	/* there might be handshake issue with hardware which needs delay */</div><div class='del'>-	mdelay(20);</div><div class='ctx'> 	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81),</div><div class='ctx'> 			   RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81),</div><div class='ctx'> 			   0, true);</div><div class='hunk'>@@ -147,37 +139,6 @@ static int psp_v12_0_bootloader_load_sos(struct psp_context *psp)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void psp_v12_0_reroute_ih(struct psp_context *psp)</div><div class='del'>-{</div><div class='del'>-	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='del'>-	uint32_t tmp;</div><div class='del'>-</div><div class='del'>-	/* Change IH ring for VMC */</div><div class='del'>-	tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1244b);</div><div class='del'>-	tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, CLIENT_TYPE, 1);</div><div class='del'>-	tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, RING_ID, 1);</div><div class='del'>-</div><div class='del'>-	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3);</div><div class='del'>-	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);</div><div class='del'>-	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);</div><div class='del'>-</div><div class='del'>-	mdelay(20);</div><div class='del'>-	psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),</div><div class='del'>-		     0x80000000, 0x8000FFFF, false);</div><div class='del'>-</div><div class='del'>-	/* Change IH ring for UMC */</div><div class='del'>-	tmp = REG_SET_FIELD(0, IH_CLIENT_CFG_DATA, CREDIT_RETURN_ADDR, 0x1216b);</div><div class='del'>-	tmp = REG_SET_FIELD(tmp, IH_CLIENT_CFG_DATA, RING_ID, 1);</div><div class='del'>-</div><div class='del'>-	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4);</div><div class='del'>-	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp);</div><div class='del'>-	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET);</div><div class='del'>-</div><div class='del'>-	mdelay(20);</div><div class='del'>-	psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),</div><div class='del'>-		     0x80000000, 0x8000FFFF, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int psp_v12_0_ring_create(struct psp_context *psp,</div><div class='ctx'> 				enum psp_ring_type ring_type)</div><div class='ctx'> {</div><div class='hunk'>@@ -186,49 +147,23 @@ static int psp_v12_0_ring_create(struct psp_context *psp,</div><div class='ctx'> 	struct psp_ring *ring = &amp;psp-&gt;km_ring;</div><div class='ctx'> 	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='ctx'> </div><div class='del'>-	psp_v12_0_reroute_ih(psp);</div><div class='del'>-</div><div class='del'>-	if (amdgpu_sriov_vf(psp-&gt;adev)) {</div><div class='del'>-		/* Write low address of the ring to C2PMSG_102 */</div><div class='del'>-		psp_ring_reg = lower_32_bits(ring-&gt;ring_mem_mc_addr);</div><div class='del'>-		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg);</div><div class='del'>-		/* Write high address of the ring to C2PMSG_103 */</div><div class='del'>-		psp_ring_reg = upper_32_bits(ring-&gt;ring_mem_mc_addr);</div><div class='del'>-		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg);</div><div class='del'>-</div><div class='del'>-		/* Write the ring initialization command to C2PMSG_101 */</div><div class='del'>-		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101,</div><div class='del'>-					     GFX_CTRL_CMD_ID_INIT_GPCOM_RING);</div><div class='del'>-</div><div class='del'>-		/* there might be handshake issue with hardware which needs delay */</div><div class='del'>-		mdelay(20);</div><div class='del'>-</div><div class='del'>-		/* Wait for response flag (bit 31) in C2PMSG_101 */</div><div class='del'>-		ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),</div><div class='del'>-				   0x80000000, 0x8000FFFF, false);</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		/* Write low address of the ring to C2PMSG_69 */</div><div class='del'>-		psp_ring_reg = lower_32_bits(ring-&gt;ring_mem_mc_addr);</div><div class='del'>-		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);</div><div class='del'>-		/* Write high address of the ring to C2PMSG_70 */</div><div class='del'>-		psp_ring_reg = upper_32_bits(ring-&gt;ring_mem_mc_addr);</div><div class='del'>-		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);</div><div class='del'>-		/* Write size of ring to C2PMSG_71 */</div><div class='del'>-		psp_ring_reg = ring-&gt;ring_size;</div><div class='del'>-		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);</div><div class='del'>-		/* Write the ring initialization command to C2PMSG_64 */</div><div class='del'>-		psp_ring_reg = ring_type;</div><div class='del'>-		psp_ring_reg = psp_ring_reg &lt;&lt; 16;</div><div class='del'>-		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);</div><div class='del'>-</div><div class='del'>-		/* there might be handshake issue with hardware which needs delay */</div><div class='del'>-		mdelay(20);</div><div class='del'>-</div><div class='del'>-		/* Wait for response flag (bit 31) in C2PMSG_64 */</div><div class='del'>-		ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),</div><div class='del'>-				   0x80000000, 0x8000FFFF, false);</div><div class='del'>-	}</div><div class='add'>+	/* Write low address of the ring to C2PMSG_69 */</div><div class='add'>+	psp_ring_reg = lower_32_bits(ring-&gt;ring_mem_mc_addr);</div><div class='add'>+	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);</div><div class='add'>+	/* Write high address of the ring to C2PMSG_70 */</div><div class='add'>+	psp_ring_reg = upper_32_bits(ring-&gt;ring_mem_mc_addr);</div><div class='add'>+	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg);</div><div class='add'>+	/* Write size of ring to C2PMSG_71 */</div><div class='add'>+	psp_ring_reg = ring-&gt;ring_size;</div><div class='add'>+	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg);</div><div class='add'>+	/* Write the ring initialization command to C2PMSG_64 */</div><div class='add'>+	psp_ring_reg = ring_type;</div><div class='add'>+	psp_ring_reg = psp_ring_reg &lt;&lt; 16;</div><div class='add'>+	WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);</div><div class='add'>+</div><div class='add'>+	/* Wait for response flag (bit 31) in C2PMSG_64 */</div><div class='add'>+	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),</div><div class='add'>+			   0x80000000, 0x8000FFFF, false);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -247,9 +182,6 @@ static int psp_v12_0_ring_stop(struct psp_context *psp,</div><div class='ctx'> 		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64,</div><div class='ctx'> 				     GFX_CTRL_CMD_ID_DESTROY_RINGS);</div><div class='ctx'> </div><div class='del'>-	/* there might be handshake issue with hardware which needs delay */</div><div class='del'>-	mdelay(20);</div><div class='del'>-</div><div class='ctx'> 	/* Wait for response flag (bit 31) */</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 		ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_101),</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c<br/>index cc621064610f..df612fd9cc50 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v13_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/psp_v13_0.c</a></div><div class='hunk'>@@ -71,20 +71,13 @@ MODULE_FIRMWARE("amdgpu/psp_14_0_4_ta.bin");</div><div class='ctx'> /* Retry times for vmbx ready wait */</div><div class='ctx'> #define PSP_VMBX_POLLING_LIMIT 3000</div><div class='ctx'> </div><div class='del'>-/* VBIOS gfl defines */</div><div class='del'>-#define MBOX_READY_MASK 0x80000000</div><div class='del'>-#define MBOX_STATUS_MASK 0x0000FFFF</div><div class='del'>-#define MBOX_COMMAND_MASK 0x00FF0000</div><div class='del'>-#define MBOX_READY_FLAG 0x80000000</div><div class='del'>-#define C2PMSG_CMD_SPI_UPDATE_ROM_IMAGE_ADDR_LO 0x2</div><div class='del'>-#define C2PMSG_CMD_SPI_UPDATE_ROM_IMAGE_ADDR_HI 0x3</div><div class='del'>-#define C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE 0x4</div><div class='del'>-</div><div class='ctx'> /* memory training timeout define */</div><div class='ctx'> #define MEM_TRAIN_SEND_MSG_TIMEOUT_US	3000000</div><div class='ctx'> </div><div class='ctx'> #define regMP1_PUB_SCRATCH0	0x3b10090</div><div class='ctx'> </div><div class='add'>+#define PSP13_BL_STATUS_SIZE 100</div><div class='add'>+</div><div class='ctx'> static int psp_v13_0_init_microcode(struct psp_context *psp)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='hunk'>@@ -151,6 +144,32 @@ static bool psp_v13_0_is_sos_alive(struct psp_context *psp)</div><div class='ctx'> 	return sol_reg != 0x0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void psp_v13_0_bootloader_print_status(struct psp_context *psp,</div><div class='add'>+					      const char *msg)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='add'>+	u32 bl_status_reg;</div><div class='add'>+	char bl_status_msg[PSP13_BL_STATUS_SIZE];</div><div class='add'>+	int i, at;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6) ||</div><div class='add'>+	    amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 12) ||</div><div class='add'>+	    amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 14)) {</div><div class='add'>+		at = 0;</div><div class='add'>+		for_each_inst(i, adev-&gt;aid_mask) {</div><div class='add'>+			bl_status_reg =</div><div class='add'>+				(SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_92)</div><div class='add'>+				 &lt;&lt; 2) +</div><div class='add'>+				adev-&gt;asic_funcs-&gt;encode_ext_smn_addressing(i);</div><div class='add'>+			at += snprintf(bl_status_msg + at,</div><div class='add'>+				       PSP13_BL_STATUS_SIZE - at,</div><div class='add'>+				       " status(%02i): 0x%08x", i,</div><div class='add'>+				       RREG32_PCIE_EXT(bl_status_reg));</div><div class='add'>+		}</div><div class='add'>+		dev_info(adev-&gt;dev, "%s - %s", msg, bl_status_msg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int psp_v13_0_wait_for_vmbx_ready(struct psp_context *psp)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='hunk'>@@ -196,6 +215,9 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp)</div><div class='ctx'> </div><div class='ctx'> 		if (ret == 0)</div><div class='ctx'> 			return 0;</div><div class='add'>+		if (retry_loop &amp;&amp; !(retry_loop % 10))</div><div class='add'>+			psp_v13_0_bootloader_print_status(</div><div class='add'>+				psp, "Waiting for bootloader completion");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -610,7 +632,7 @@ static int psp_v13_0_memory_training(struct psp_context *psp, uint32_t ops)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			memcpy_toio(adev-&gt;mman.aper_base_kaddr, buf, sz);</div><div class='del'>-			adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+			amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> 			vfree(buf);</div><div class='ctx'> 			drm_dev_exit(idx);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -710,7 +732,8 @@ static int psp_v13_0_exec_spi_cmd(struct psp_context *psp, int cmd)</div><div class='ctx'> 	/* Ring the doorbell */</div><div class='ctx'> 	WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_73, 1);</div><div class='ctx'> </div><div class='del'>-	if (cmd == C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE)</div><div class='add'>+	if (cmd == C2PMSG_CMD_SPI_UPDATE_FLASH_IMAGE ||</div><div class='add'>+	    cmd == C2PMSG_CMD_SPI_GET_FLASH_IMAGE)</div><div class='ctx'> 		ret = psp_wait_for_spirom_update(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_115),</div><div class='ctx'> 						 MBOX_READY_FLAG, MBOX_READY_MASK, PSP_SPIROM_UPDATE_TIMEOUT);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -766,6 +789,37 @@ static int psp_v13_0_update_spirom(struct psp_context *psp,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int psp_v13_0_dump_spirom(struct psp_context *psp,</div><div class='add'>+				 uint64_t fw_pri_mc_addr)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Confirm PSP is ready to start */</div><div class='add'>+	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_115),</div><div class='add'>+			   MBOX_READY_FLAG, MBOX_READY_MASK, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(adev-&gt;dev, "PSP Not ready to start processing, ret = %d", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_116, lower_32_bits(fw_pri_mc_addr));</div><div class='add'>+</div><div class='add'>+	ret = psp_v13_0_exec_spi_cmd(psp, C2PMSG_CMD_SPI_GET_ROM_IMAGE_ADDR_LO);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_116, upper_32_bits(fw_pri_mc_addr));</div><div class='add'>+</div><div class='add'>+	ret = psp_v13_0_exec_spi_cmd(psp, C2PMSG_CMD_SPI_GET_ROM_IMAGE_ADDR_HI);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = psp_v13_0_exec_spi_cmd(psp, C2PMSG_CMD_SPI_GET_FLASH_IMAGE);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int psp_v13_0_vbflash_status(struct psp_context *psp)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='hunk'>@@ -858,6 +912,25 @@ static bool psp_v13_0_is_reload_needed(struct psp_context *psp)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int psp_v13_0_reg_program_no_ring(struct psp_context *psp, uint32_t val,</div><div class='add'>+					 enum psp_reg_prog_id id)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = psp-&gt;adev;</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* PSP will broadcast the value to all instances */</div><div class='add'>+	if (amdgpu_sriov_vf(adev)) {</div><div class='add'>+		WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101, GFX_CTRL_CMD_ID_GBR_IH_SET);</div><div class='add'>+		WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, id);</div><div class='add'>+		WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_103, val);</div><div class='add'>+</div><div class='add'>+		ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_101),</div><div class='add'>+				   0x80000000, 0x80000000, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct psp_funcs psp_v13_0_funcs = {</div><div class='ctx'> 	.init_microcode = psp_v13_0_init_microcode,</div><div class='ctx'> 	.wait_for_bootloader = psp_v13_0_wait_for_bootloader_steady_state,</div><div class='hunk'>@@ -879,11 +952,13 @@ static const struct psp_funcs psp_v13_0_funcs = {</div><div class='ctx'> 	.load_usbc_pd_fw = psp_v13_0_load_usbc_pd_fw,</div><div class='ctx'> 	.read_usbc_pd_fw = psp_v13_0_read_usbc_pd_fw,</div><div class='ctx'> 	.update_spirom = psp_v13_0_update_spirom,</div><div class='add'>+	.dump_spirom = psp_v13_0_dump_spirom,</div><div class='ctx'> 	.vbflash_stat = psp_v13_0_vbflash_status,</div><div class='ctx'> 	.fatal_error_recovery_quirk = psp_v13_0_fatal_error_recovery_quirk,</div><div class='ctx'> 	.get_ras_capability = psp_v13_0_get_ras_capability,</div><div class='ctx'> 	.is_aux_sos_load_required = psp_v13_0_is_aux_sos_load_required,</div><div class='ctx'> 	.is_reload_needed = psp_v13_0_is_reload_needed,</div><div class='add'>+	.reg_program_no_ring = psp_v13_0_reg_program_no_ring,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void psp_v13_0_set_psp_funcs(struct psp_context *psp)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c<br/>index 7c49c3f3c388..256288c6cd78 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/psp_v14_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/psp_v14_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/psp_v14_0.c</a></div><div class='hunk'>@@ -498,7 +498,7 @@ static int psp_v14_0_memory_training(struct psp_context *psp, uint32_t ops)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			memcpy_toio(adev-&gt;mman.aper_base_kaddr, buf, sz);</div><div class='del'>-			adev-&gt;hdp.funcs-&gt;flush_hdp(adev, NULL);</div><div class='add'>+			amdgpu_device_flush_hdp(adev, NULL);</div><div class='ctx'> 			vfree(buf);</div><div class='ctx'> 			drm_dev_exit(idx);</div><div class='ctx'> 		} else {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c<br/>index 688a720bbbbd..9c169112a5e7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c</a></div><div class='hunk'>@@ -106,8 +106,9 @@ static void sdma_v4_4_2_set_buffer_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v4_4_2_set_vm_pte_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v4_4_2_set_irq_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v4_4_2_set_ras_funcs(struct amdgpu_device *adev);</div><div class='del'>-static void sdma_v4_4_2_set_engine_reset_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v4_4_2_update_reset_mask(struct amdgpu_device *adev);</div><div class='add'>+static int sdma_v4_4_2_stop_queue(struct amdgpu_ring *ring);</div><div class='add'>+static int sdma_v4_4_2_restore_queue(struct amdgpu_ring *ring);</div><div class='ctx'> </div><div class='ctx'> static u32 sdma_v4_4_2_get_reg_offset(struct amdgpu_device *adev,</div><div class='ctx'> 		u32 instance, u32 offset)</div><div class='hunk'>@@ -1333,6 +1334,11 @@ static bool sdma_v4_4_2_fw_support_paging_queue(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct amdgpu_sdma_funcs sdma_v4_4_2_sdma_funcs = {</div><div class='add'>+	.stop_kernel_queue = &amp;sdma_v4_4_2_stop_queue,</div><div class='add'>+	.start_kernel_queue = &amp;sdma_v4_4_2_restore_queue,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int sdma_v4_4_2_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='hunk'>@@ -1351,8 +1357,6 @@ static int sdma_v4_4_2_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	sdma_v4_4_2_set_vm_pte_funcs(adev);</div><div class='ctx'> 	sdma_v4_4_2_set_irq_funcs(adev);</div><div class='ctx'> 	sdma_v4_4_2_set_ras_funcs(adev);</div><div class='del'>-	sdma_v4_4_2_set_engine_reset_funcs(adev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1447,6 +1451,7 @@ static int sdma_v4_4_2_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		/* Initialize guilty flags for GFX and PAGE queues */</div><div class='ctx'> 		adev-&gt;sdma.instance[i].gfx_guilty = false;</div><div class='ctx'> 		adev-&gt;sdma.instance[i].page_guilty = false;</div><div class='add'>+		adev-&gt;sdma.instance[i].funcs = &amp;sdma_v4_4_2_sdma_funcs;</div><div class='ctx'> </div><div class='ctx'> 		ring = &amp;adev-&gt;sdma.instance[i].ring;</div><div class='ctx'> 		ring-&gt;ring_obj = NULL;</div><div class='hunk'>@@ -1678,11 +1683,12 @@ static int sdma_v4_4_2_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sdma_v4_4_2_stop_queue(struct amdgpu_device *adev, uint32_t instance_id)</div><div class='add'>+static int sdma_v4_4_2_stop_queue(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	u32 instance_id = GET_INST(SDMA0, ring-&gt;me);</div><div class='ctx'> 	u32 inst_mask;</div><div class='ctx'> 	uint64_t rptr;</div><div class='del'>-	struct amdgpu_ring *ring = &amp;adev-&gt;sdma.instance[instance_id].ring;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1715,11 +1721,11 @@ static int sdma_v4_4_2_stop_queue(struct amdgpu_device *adev, uint32_t instance_</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sdma_v4_4_2_restore_queue(struct amdgpu_device *adev, uint32_t instance_id)</div><div class='add'>+static int sdma_v4_4_2_restore_queue(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	u32 inst_mask;</div><div class='del'>-	struct amdgpu_ring *ring = &amp;adev-&gt;sdma.instance[instance_id].ring;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	inst_mask = 1 &lt;&lt; ring-&gt;me;</div><div class='ctx'> 	udelay(50);</div><div class='hunk'>@@ -1739,16 +1745,6 @@ static int sdma_v4_4_2_restore_queue(struct amdgpu_device *adev, uint32_t instan</div><div class='ctx'> 	return sdma_v4_4_2_inst_start(adev, inst_mask, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sdma_on_reset_funcs sdma_v4_4_2_engine_reset_funcs = {</div><div class='del'>-	.pre_reset = sdma_v4_4_2_stop_queue,</div><div class='del'>-	.post_reset = sdma_v4_4_2_restore_queue,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void sdma_v4_4_2_set_engine_reset_funcs(struct amdgpu_device *adev)</div><div class='del'>-{</div><div class='del'>-	amdgpu_sdma_register_on_reset_callbacks(adev, &amp;sdma_v4_4_2_engine_reset_funcs);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int sdma_v4_4_2_set_trap_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 					struct amdgpu_irq_src *source,</div><div class='ctx'> 					unsigned type,</div><div class='hunk'>@@ -2373,7 +2369,9 @@ static void sdma_v4_4_2_update_reset_mask(struct amdgpu_device *adev)</div><div class='ctx'> 			adev-&gt;sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IP_VERSION(9, 5, 0):</div><div class='del'>-		/*TODO: enable the queue reset flag until fw supported */</div><div class='add'>+		if ((adev-&gt;gfx.mec_fw_version &gt;= 0xf) &amp;&amp; amdgpu_dpm_reset_sdma_is_supported(adev))</div><div class='add'>+			adev-&gt;sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br/>index 0dce59f4f6e2..9505ae96fbec 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c</a></div><div class='hunk'>@@ -112,6 +112,8 @@ static void sdma_v5_0_set_ring_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v5_0_set_buffer_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v5_0_set_vm_pte_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v5_0_set_irq_funcs(struct amdgpu_device *adev);</div><div class='add'>+static int sdma_v5_0_stop_queue(struct amdgpu_ring *ring);</div><div class='add'>+static int sdma_v5_0_restore_queue(struct amdgpu_ring *ring);</div><div class='ctx'> </div><div class='ctx'> static const struct soc15_reg_golden golden_settings_sdma_5[] = {</div><div class='ctx'> 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSDMA0_CHICKEN_BITS, 0xffbf1f0f, 0x03ab0107),</div><div class='hunk'>@@ -369,67 +371,36 @@ static uint64_t sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> static void sdma_v5_0_ring_set_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='del'>-	uint32_t *wptr_saved;</div><div class='del'>-	uint32_t *is_queue_unmap;</div><div class='del'>-	uint64_t aggregated_db_index;</div><div class='del'>-	uint32_t mqd_size = adev-&gt;mqds[AMDGPU_HW_IP_DMA].mqd_size;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("Setting write pointer\n");</div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		wptr_saved = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size);</div><div class='del'>-		is_queue_unmap = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size +</div><div class='del'>-					      sizeof(uint32_t));</div><div class='del'>-		aggregated_db_index =</div><div class='del'>-			amdgpu_mes_get_aggregated_doorbell_index(adev,</div><div class='del'>-			AMDGPU_MES_PRIORITY_LEVEL_NORMAL);</div><div class='del'>-</div><div class='add'>+	if (ring-&gt;use_doorbell) {</div><div class='add'>+		DRM_DEBUG("Using doorbell -- "</div><div class='add'>+			  "wptr_offs == 0x%08x "</div><div class='add'>+			  "lower_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x "</div><div class='add'>+			  "upper_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x\n",</div><div class='add'>+			  ring-&gt;wptr_offs,</div><div class='add'>+			  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='add'>+			  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='add'>+		/* XXX check if swapping is necessary on BE */</div><div class='ctx'> 		atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='ctx'> 			     ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		*wptr_saved = ring-&gt;wptr &lt;&lt; 2;</div><div class='del'>-		if (*is_queue_unmap) {</div><div class='del'>-			WDOORBELL64(aggregated_db_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='del'>-					ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		} else {</div><div class='del'>-			DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='del'>-					ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-</div><div class='del'>-			if (*is_queue_unmap)</div><div class='del'>-				WDOORBELL64(aggregated_db_index,</div><div class='del'>-					    ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		}</div><div class='add'>+		DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='add'>+			  ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='add'>+		WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (ring-&gt;use_doorbell) {</div><div class='del'>-			DRM_DEBUG("Using doorbell -- "</div><div class='del'>-				  "wptr_offs == 0x%08x "</div><div class='del'>-				  "lower_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x "</div><div class='del'>-				  "upper_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x\n",</div><div class='del'>-				  ring-&gt;wptr_offs,</div><div class='del'>-				  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='del'>-				  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-			/* XXX check if swapping is necessary on BE */</div><div class='del'>-			atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='del'>-				     ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='del'>-				  ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		} else {</div><div class='del'>-			DRM_DEBUG("Not using doorbell -- "</div><div class='del'>-				  "mmSDMA%i_GFX_RB_WPTR == 0x%08x "</div><div class='del'>-				  "mmSDMA%i_GFX_RB_WPTR_HI == 0x%08x\n",</div><div class='del'>-				  ring-&gt;me,</div><div class='del'>-				  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='del'>-				  ring-&gt;me,</div><div class='del'>-				  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-			WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev,</div><div class='del'>-					     ring-&gt;me, mmSDMA0_GFX_RB_WPTR),</div><div class='del'>-					lower_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-			WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev,</div><div class='del'>-					     ring-&gt;me, mmSDMA0_GFX_RB_WPTR_HI),</div><div class='del'>-					upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-		}</div><div class='add'>+		DRM_DEBUG("Not using doorbell -- "</div><div class='add'>+			  "mmSDMA%i_GFX_RB_WPTR == 0x%08x "</div><div class='add'>+			  "mmSDMA%i_GFX_RB_WPTR_HI == 0x%08x\n",</div><div class='add'>+			  ring-&gt;me,</div><div class='add'>+			  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='add'>+			  ring-&gt;me,</div><div class='add'>+			  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='add'>+		WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev,</div><div class='add'>+							     ring-&gt;me, mmSDMA0_GFX_RB_WPTR),</div><div class='add'>+				lower_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='add'>+		WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev,</div><div class='add'>+							     ring-&gt;me, mmSDMA0_GFX_RB_WPTR_HI),</div><div class='add'>+				upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -575,11 +546,9 @@ static void sdma_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 se</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; AMDGPU_FENCE_FLAG_INT) {</div><div class='del'>-		uint32_t ctx = ring-&gt;is_mes_queue ?</div><div class='del'>-			(ring-&gt;hw_queue_id | AMDGPU_FENCE_MES_QUEUE_FLAG) : 0;</div><div class='ctx'> 		/* generate an interrupt */</div><div class='ctx'> 		amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));</div><div class='del'>-		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(ctx));</div><div class='add'>+		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -588,15 +557,15 @@ static void sdma_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 se</div><div class='ctx'>  * sdma_v5_0_gfx_stop - stop the gfx async dma engines</div><div class='ctx'>  *</div><div class='ctx'>  * @adev: amdgpu_device pointer</div><div class='del'>- *</div><div class='add'>+ * @inst_mask: mask of dma engine instances to be disabled</div><div class='ctx'>  * Stop the gfx async dma ring buffers (NAVI10).</div><div class='ctx'>  */</div><div class='del'>-static void sdma_v5_0_gfx_stop(struct amdgpu_device *adev)</div><div class='add'>+static void sdma_v5_0_gfx_stop(struct amdgpu_device *adev, uint32_t inst_mask)</div><div class='ctx'> {</div><div class='ctx'> 	u32 rb_cntl, ib_cntl;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+	for_each_inst(i, inst_mask) {</div><div class='ctx'> 		rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));</div><div class='ctx'> 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);</div><div class='ctx'> 		WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);</div><div class='hunk'>@@ -688,9 +657,11 @@ static void sdma_v5_0_enable(struct amdgpu_device *adev, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	u32 f32_cntl;</div><div class='ctx'> 	int i;</div><div class='add'>+	uint32_t inst_mask;</div><div class='ctx'> </div><div class='add'>+	inst_mask = GENMASK(adev-&gt;sdma.num_instances - 1, 0);</div><div class='ctx'> 	if (!enable) {</div><div class='del'>-		sdma_v5_0_gfx_stop(adev);</div><div class='add'>+		sdma_v5_0_gfx_stop(adev, 1 &lt;&lt; inst_mask);</div><div class='ctx'> 		sdma_v5_0_rlc_stop(adev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1046,33 +1017,22 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	int r;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+</div><div class='ctx'> 	r = amdgpu_ring_alloc(ring, 20);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring-&gt;idx, r);</div><div class='del'>-		if (!ring-&gt;is_mes_queue)</div><div class='del'>-			amdgpu_device_wb_free(adev, index);</div><div class='add'>+		amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1085,10 +1045,7 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	amdgpu_ring_commit(ring);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		if (ring-&gt;is_mes_queue)</div><div class='del'>-			tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-		else</div><div class='del'>-			tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> 		if (tmp == 0xDEADBEEF)</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (amdgpu_emu_mode == 1)</div><div class='hunk'>@@ -1100,8 +1057,7 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	if (i &gt;= adev-&gt;usec_timeout)</div><div class='ctx'> 		r = -ETIMEDOUT;</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -1124,38 +1080,24 @@ static int sdma_v5_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 	long r;</div><div class='ctx'> 	u32 tmp = 0;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> 	memset(&amp;ib, 0, sizeof(ib));</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring, AMDGPU_MES_CTX_IB_OFFS);</div><div class='del'>-		ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ib.ptr = (void *)amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_ib_get(adev, NULL, 256,</div><div class='del'>-					AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='del'>-		if (r) {</div><div class='del'>-			DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='del'>-			goto err0;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_ib_get(adev, NULL, 256,</div><div class='add'>+			  AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='add'>+		goto err0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |</div><div class='hunk'>@@ -1183,10 +1125,7 @@ static int sdma_v5_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-	else</div><div class='del'>-		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+	tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> </div><div class='ctx'> 	if (tmp == 0xDEADBEEF)</div><div class='ctx'> 		r = 0;</div><div class='hunk'>@@ -1197,8 +1136,7 @@ err1:</div><div class='ctx'> 	amdgpu_ib_free(&amp;ib, NULL);</div><div class='ctx'> 	dma_fence_put(f);</div><div class='ctx'> err0:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1389,6 +1327,36 @@ static void sdma_v5_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring,</div><div class='ctx'> 	amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sdma_v5_0_soft_reset_engine(struct amdgpu_device *adev, u32 instance_id)</div><div class='add'>+{</div><div class='add'>+	u32 grbm_soft_reset;</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='add'>+	grbm_soft_reset = REG_SET_FIELD(0,</div><div class='add'>+					GRBM_SOFT_RESET, SOFT_RESET_SDMA0,</div><div class='add'>+					1);</div><div class='add'>+	grbm_soft_reset &lt;&lt;= instance_id;</div><div class='add'>+</div><div class='add'>+	tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='add'>+	tmp |= grbm_soft_reset;</div><div class='add'>+	DRM_DEBUG("GRBM_SOFT_RESET=0x%08X\n", tmp);</div><div class='add'>+	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);</div><div class='add'>+	tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='add'>+</div><div class='add'>+	udelay(50);</div><div class='add'>+</div><div class='add'>+	tmp &amp;= ~grbm_soft_reset;</div><div class='add'>+	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);</div><div class='add'>+	tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct amdgpu_sdma_funcs sdma_v5_0_sdma_funcs = {</div><div class='add'>+	.stop_kernel_queue = &amp;sdma_v5_0_stop_queue,</div><div class='add'>+	.start_kernel_queue = &amp;sdma_v5_0_restore_queue,</div><div class='add'>+	.soft_reset_kernel_queue = &amp;sdma_v5_0_soft_reset_engine,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int sdma_v5_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='hunk'>@@ -1431,6 +1399,7 @@ static int sdma_v5_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		return r;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+		adev-&gt;sdma.instance[i].funcs = &amp;sdma_v5_0_sdma_funcs;</div><div class='ctx'> 		ring = &amp;adev-&gt;sdma.instance[i].ring;</div><div class='ctx'> 		ring-&gt;ring_obj = NULL;</div><div class='ctx'> 		ring-&gt;use_doorbell = true;</div><div class='hunk'>@@ -1572,32 +1541,25 @@ static int sdma_v5_0_soft_reset(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> static int sdma_v5_0_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='del'>-	int i, j, r;</div><div class='del'>-	u32 rb_cntl, ib_cntl, f32_cntl, freeze, cntl, preempt, soft_reset, stat1_reg;</div><div class='add'>+	u32 inst_id = ring-&gt;me;</div><div class='ctx'> </div><div class='del'>-	if (amdgpu_sriov_vf(adev))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	return amdgpu_sdma_reset_engine(adev, inst_id);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='del'>-		if (ring == &amp;adev-&gt;sdma.instance[i].ring)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='add'>+static int sdma_v5_0_stop_queue(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 f32_cntl, freeze, cntl, stat1_reg;</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	int i, j, r = 0;</div><div class='ctx'> </div><div class='del'>-	if (i == adev-&gt;sdma.num_instances) {</div><div class='del'>-		DRM_ERROR("sdma instance not found\n");</div><div class='add'>+	if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	i = ring-&gt;me;</div><div class='ctx'> 	amdgpu_gfx_rlc_enter_safe_mode(adev, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* stop queue */</div><div class='del'>-	ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));</div><div class='del'>-	ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0);</div><div class='del'>-	WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);</div><div class='del'>-</div><div class='del'>-	rb_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));</div><div class='del'>-	rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);</div><div class='del'>-	WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);</div><div class='add'>+	sdma_v5_0_gfx_stop(adev, 1 &lt;&lt; i);</div><div class='ctx'> </div><div class='ctx'> 	/* engine stop SDMA1_F32_CNTL.HALT to 1 and SDMAx_FREEZE freeze bit to 1 */</div><div class='ctx'> 	freeze = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_FREEZE));</div><div class='hunk'>@@ -1628,30 +1590,25 @@ static int sdma_v5_0_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> 	cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL));</div><div class='ctx'> 	cntl = REG_SET_FIELD(cntl, SDMA0_CNTL, UTC_L1_ENABLE, 0);</div><div class='ctx'> 	WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), cntl);</div><div class='add'>+err0:</div><div class='add'>+	amdgpu_gfx_rlc_exit_safe_mode(adev, 0);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* soft reset SDMA_GFX_PREEMPT.IB_PREEMPT = 0 mmGRBM_SOFT_RESET.SOFT_RESET_SDMA0/1 = 1 */</div><div class='del'>-	preempt = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_PREEMPT));</div><div class='del'>-	preempt = REG_SET_FIELD(preempt, SDMA0_GFX_PREEMPT, IB_PREEMPT, 0);</div><div class='del'>-	WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_PREEMPT), preempt);</div><div class='del'>-</div><div class='del'>-	soft_reset = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='del'>-	soft_reset |= 1 &lt;&lt; GRBM_SOFT_RESET__SOFT_RESET_SDMA0__SHIFT &lt;&lt; i;</div><div class='del'>-</div><div class='del'>-	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, soft_reset);</div><div class='del'>-</div><div class='del'>-	udelay(50);</div><div class='del'>-</div><div class='del'>-	soft_reset &amp;= ~(1 &lt;&lt; GRBM_SOFT_RESET__SOFT_RESET_SDMA0__SHIFT &lt;&lt; i);</div><div class='del'>-	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, soft_reset);</div><div class='add'>+static int sdma_v5_0_restore_queue(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	u32 inst_id = ring-&gt;me;</div><div class='add'>+	u32 freeze;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='add'>+	amdgpu_gfx_rlc_enter_safe_mode(adev, 0);</div><div class='ctx'> 	/* unfreeze*/</div><div class='del'>-	freeze = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_FREEZE));</div><div class='add'>+	freeze = RREG32(sdma_v5_0_get_reg_offset(adev, inst_id, mmSDMA0_FREEZE));</div><div class='ctx'> 	freeze = REG_SET_FIELD(freeze, SDMA0_FREEZE, FREEZE, 0);</div><div class='del'>-	WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_FREEZE), freeze);</div><div class='add'>+	WREG32(sdma_v5_0_get_reg_offset(adev, inst_id, mmSDMA0_FREEZE), freeze);</div><div class='ctx'> </div><div class='del'>-	r = sdma_v5_0_gfx_resume_instance(adev, i, true);</div><div class='del'>-</div><div class='del'>-err0:</div><div class='add'>+	r = sdma_v5_0_gfx_resume_instance(adev, inst_id, true);</div><div class='ctx'> 	amdgpu_gfx_rlc_exit_safe_mode(adev, 0);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br/>index 2b39a03ff0c1..a6e612b4a892 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c</a></div><div class='hunk'>@@ -113,6 +113,8 @@ static void sdma_v5_2_set_ring_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v5_2_set_buffer_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v5_2_set_vm_pte_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void sdma_v5_2_set_irq_funcs(struct amdgpu_device *adev);</div><div class='add'>+static int sdma_v5_2_stop_queue(struct amdgpu_ring *ring);</div><div class='add'>+static int sdma_v5_2_restore_queue(struct amdgpu_ring *ring);</div><div class='ctx'> </div><div class='ctx'> static u32 sdma_v5_2_get_reg_offset(struct amdgpu_device *adev, u32 instance, u32 internal_offset)</div><div class='ctx'> {</div><div class='hunk'>@@ -394,11 +396,9 @@ static void sdma_v5_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 se</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((flags &amp; AMDGPU_FENCE_FLAG_INT)) {</div><div class='del'>-		uint32_t ctx = ring-&gt;is_mes_queue ?</div><div class='del'>-			(ring-&gt;hw_queue_id | AMDGPU_FENCE_MES_QUEUE_FLAG) : 0;</div><div class='ctx'> 		/* generate an interrupt */</div><div class='ctx'> 		amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));</div><div class='del'>-		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(ctx));</div><div class='add'>+		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -407,15 +407,15 @@ static void sdma_v5_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 se</div><div class='ctx'>  * sdma_v5_2_gfx_stop - stop the gfx async dma engines</div><div class='ctx'>  *</div><div class='ctx'>  * @adev: amdgpu_device pointer</div><div class='del'>- *</div><div class='add'>+ * @inst_mask: mask of dma engine instances to be disabled</div><div class='ctx'>  * Stop the gfx async dma ring buffers.</div><div class='ctx'>  */</div><div class='del'>-static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev)</div><div class='add'>+static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev,  uint32_t inst_mask)</div><div class='ctx'> {</div><div class='ctx'> 	u32 rb_cntl, ib_cntl;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+	for_each_inst(i, inst_mask) {</div><div class='ctx'> 		rb_cntl = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));</div><div class='ctx'> 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);</div><div class='ctx'> 		WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);</div><div class='hunk'>@@ -506,9 +506,11 @@ static void sdma_v5_2_enable(struct amdgpu_device *adev, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	u32 f32_cntl;</div><div class='ctx'> 	int i;</div><div class='add'>+	uint32_t inst_mask;</div><div class='ctx'> </div><div class='add'>+	inst_mask = GENMASK(adev-&gt;sdma.num_instances - 1, 0);</div><div class='ctx'> 	if (!enable) {</div><div class='del'>-		sdma_v5_2_gfx_stop(adev);</div><div class='add'>+		sdma_v5_2_gfx_stop(adev, inst_mask);</div><div class='ctx'> 		sdma_v5_2_rlc_stop(adev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -761,37 +763,49 @@ static int sdma_v5_2_load_microcode(struct amdgpu_device *adev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sdma_v5_2_soft_reset(struct amdgpu_ip_block *ip_block)</div><div class='add'>+static int sdma_v5_2_soft_reset_engine(struct amdgpu_device *adev, u32 instance_id)</div><div class='ctx'> {</div><div class='del'>-	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> 	u32 grbm_soft_reset;</div><div class='ctx'> 	u32 tmp;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='del'>-		grbm_soft_reset = REG_SET_FIELD(0,</div><div class='del'>-						GRBM_SOFT_RESET, SOFT_RESET_SDMA0,</div><div class='del'>-						1);</div><div class='del'>-		grbm_soft_reset &lt;&lt;= i;</div><div class='add'>+	grbm_soft_reset = REG_SET_FIELD(0,</div><div class='add'>+					GRBM_SOFT_RESET, SOFT_RESET_SDMA0,</div><div class='add'>+					1);</div><div class='add'>+	grbm_soft_reset &lt;&lt;= instance_id;</div><div class='ctx'> </div><div class='del'>-		tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='del'>-		tmp |= grbm_soft_reset;</div><div class='del'>-		DRM_DEBUG("GRBM_SOFT_RESET=0x%08X\n", tmp);</div><div class='del'>-		WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);</div><div class='del'>-		tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='add'>+	tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='add'>+	tmp |= grbm_soft_reset;</div><div class='add'>+	DRM_DEBUG("GRBM_SOFT_RESET=0x%08X\n", tmp);</div><div class='add'>+	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);</div><div class='add'>+	tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='ctx'> </div><div class='del'>-		udelay(50);</div><div class='add'>+	udelay(50);</div><div class='add'>+</div><div class='add'>+	tmp &amp;= ~grbm_soft_reset;</div><div class='add'>+	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);</div><div class='add'>+	tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		tmp &amp;= ~grbm_soft_reset;</div><div class='del'>-		WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, tmp);</div><div class='del'>-		tmp = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='add'>+static int sdma_v5_2_soft_reset(struct amdgpu_ip_block *ip_block)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+		sdma_v5_2_soft_reset_engine(adev, i);</div><div class='ctx'> 		udelay(50);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct amdgpu_sdma_funcs sdma_v5_2_sdma_funcs = {</div><div class='add'>+	.stop_kernel_queue = &amp;sdma_v5_2_stop_queue,</div><div class='add'>+	.start_kernel_queue = &amp;sdma_v5_2_restore_queue,</div><div class='add'>+	.soft_reset_kernel_queue = &amp;sdma_v5_2_soft_reset_engine,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * sdma_v5_2_start - setup and start the async dma engines</div><div class='ctx'>  *</div><div class='hunk'>@@ -903,33 +917,22 @@ static int sdma_v5_2_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	int r;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+</div><div class='ctx'> 	r = amdgpu_ring_alloc(ring, 20);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring-&gt;idx, r);</div><div class='del'>-		if (!ring-&gt;is_mes_queue)</div><div class='del'>-			amdgpu_device_wb_free(adev, index);</div><div class='add'>+		amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -942,10 +945,7 @@ static int sdma_v5_2_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	amdgpu_ring_commit(ring);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		if (ring-&gt;is_mes_queue)</div><div class='del'>-			tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-		else</div><div class='del'>-			tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> 		if (tmp == 0xDEADBEEF)</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (amdgpu_emu_mode == 1)</div><div class='hunk'>@@ -957,8 +957,7 @@ static int sdma_v5_2_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	if (i &gt;= adev-&gt;usec_timeout)</div><div class='ctx'> 		r = -ETIMEDOUT;</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -981,37 +980,23 @@ static int sdma_v5_2_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 	long r;</div><div class='ctx'> 	u32 tmp = 0;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> 	memset(&amp;ib, 0, sizeof(ib));</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring, AMDGPU_MES_CTX_IB_OFFS);</div><div class='del'>-		ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ib.ptr = (void *)amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='del'>-		if (r) {</div><div class='del'>-			DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='del'>-			goto err0;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='add'>+		goto err0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |</div><div class='hunk'>@@ -1039,10 +1024,7 @@ static int sdma_v5_2_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-	else</div><div class='del'>-		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+	tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> </div><div class='ctx'> 	if (tmp == 0xDEADBEEF)</div><div class='ctx'> 		r = 0;</div><div class='hunk'>@@ -1053,8 +1035,7 @@ err1:</div><div class='ctx'> 	amdgpu_ib_free(&amp;ib, NULL);</div><div class='ctx'> 	dma_fence_put(f);</div><div class='ctx'> err0:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1337,6 +1318,7 @@ static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+		adev-&gt;sdma.instance[i].funcs = &amp;sdma_v5_2_sdma_funcs;</div><div class='ctx'> 		ring = &amp;adev-&gt;sdma.instance[i].ring;</div><div class='ctx'> 		ring-&gt;ring_obj = NULL;</div><div class='ctx'> 		ring-&gt;use_doorbell = true;</div><div class='hunk'>@@ -1472,32 +1454,25 @@ static int sdma_v5_2_wait_for_idle(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> static int sdma_v5_2_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='del'>-	int i, j, r;</div><div class='del'>-	u32 rb_cntl, ib_cntl, f32_cntl, freeze, cntl, preempt, soft_reset, stat1_reg;</div><div class='add'>+	u32 inst_id = ring-&gt;me;</div><div class='ctx'> </div><div class='del'>-	if (amdgpu_sriov_vf(adev))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	return amdgpu_sdma_reset_engine(adev, inst_id);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='del'>-		if (ring == &amp;adev-&gt;sdma.instance[i].ring)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='add'>+static int sdma_v5_2_stop_queue(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 f32_cntl, freeze, cntl, stat1_reg;</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	int i, j, r = 0;</div><div class='ctx'> </div><div class='del'>-	if (i == adev-&gt;sdma.num_instances) {</div><div class='del'>-		DRM_ERROR("sdma instance not found\n");</div><div class='add'>+	if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	i = ring-&gt;me;</div><div class='ctx'> 	amdgpu_gfx_rlc_enter_safe_mode(adev, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* stop queue */</div><div class='del'>-	ib_cntl = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL));</div><div class='del'>-	ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0);</div><div class='del'>-	WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);</div><div class='del'>-</div><div class='del'>-	rb_cntl = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL));</div><div class='del'>-	rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_ENABLE, 0);</div><div class='del'>-	WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_CNTL), rb_cntl);</div><div class='add'>+	sdma_v5_2_gfx_stop(adev, 1 &lt;&lt; i);</div><div class='ctx'> </div><div class='ctx'> 	/*engine stop SDMA1_F32_CNTL.HALT to 1 and SDMAx_FREEZE freeze bit to 1 */</div><div class='ctx'> 	freeze = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_FREEZE));</div><div class='hunk'>@@ -1530,31 +1505,26 @@ static int sdma_v5_2_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='ctx'> 	cntl = REG_SET_FIELD(cntl, SDMA0_CNTL, UTC_L1_ENABLE, 0);</div><div class='ctx'> 	WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CNTL), cntl);</div><div class='ctx'> </div><div class='del'>-	/* soft reset SDMA_GFX_PREEMPT.IB_PREEMPT = 0 mmGRBM_SOFT_RESET.SOFT_RESET_SDMA0/1 = 1 */</div><div class='del'>-	preempt = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_PREEMPT));</div><div class='del'>-	preempt = REG_SET_FIELD(preempt, SDMA0_GFX_PREEMPT, IB_PREEMPT, 0);</div><div class='del'>-	WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_PREEMPT), preempt);</div><div class='del'>-</div><div class='del'>-	soft_reset = RREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET);</div><div class='del'>-	soft_reset |= 1 &lt;&lt; GRBM_SOFT_RESET__SOFT_RESET_SDMA0__SHIFT &lt;&lt; i;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, soft_reset);</div><div class='del'>-</div><div class='del'>-	udelay(50);</div><div class='del'>-</div><div class='del'>-	soft_reset &amp;= ~(1 &lt;&lt; GRBM_SOFT_RESET__SOFT_RESET_SDMA0__SHIFT &lt;&lt; i);</div><div class='add'>+err0:</div><div class='add'>+	amdgpu_gfx_rlc_exit_safe_mode(adev, 0);</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	WREG32_SOC15(GC, 0, mmGRBM_SOFT_RESET, soft_reset);</div><div class='add'>+static int sdma_v5_2_restore_queue(struct amdgpu_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	u32 inst_id = ring-&gt;me;</div><div class='add'>+	u32 freeze;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='add'>+	amdgpu_gfx_rlc_enter_safe_mode(adev, 0);</div><div class='ctx'> 	/* unfreeze and unhalt */</div><div class='del'>-	freeze = RREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_FREEZE));</div><div class='add'>+	freeze = RREG32(sdma_v5_2_get_reg_offset(adev, inst_id, mmSDMA0_FREEZE));</div><div class='ctx'> 	freeze = REG_SET_FIELD(freeze, SDMA0_FREEZE, FREEZE, 0);</div><div class='del'>-	WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_FREEZE), freeze);</div><div class='add'>+	WREG32(sdma_v5_2_get_reg_offset(adev, inst_id, mmSDMA0_FREEZE), freeze);</div><div class='ctx'> </div><div class='del'>-	r = sdma_v5_2_gfx_resume_instance(adev, i, true);</div><div class='add'>+	r = sdma_v5_2_gfx_resume_instance(adev, inst_id, true);</div><div class='ctx'> </div><div class='del'>-err0:</div><div class='ctx'> 	amdgpu_gfx_rlc_exit_safe_mode(adev, 0);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c<br/>index c214c3d2149b..da5b5d64f137 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c</a></div><div class='hunk'>@@ -43,6 +43,7 @@</div><div class='ctx'> #include "sdma_common.h"</div><div class='ctx'> #include "sdma_v6_0.h"</div><div class='ctx'> #include "v11_structs.h"</div><div class='add'>+#include "mes_userqueue.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_FIRMWARE("amdgpu/sdma_6_0_0.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/sdma_6_0_1.bin");</div><div class='hunk'>@@ -376,11 +377,9 @@ static void sdma_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 se</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; AMDGPU_FENCE_FLAG_INT) {</div><div class='del'>-		uint32_t ctx = ring-&gt;is_mes_queue ?</div><div class='del'>-			(ring-&gt;hw_queue_id | AMDGPU_FENCE_MES_QUEUE_FLAG) : 0;</div><div class='ctx'> 		/* generate an interrupt */</div><div class='ctx'> 		amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_TRAP));</div><div class='del'>-		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(ctx));</div><div class='add'>+		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -891,6 +890,9 @@ static int sdma_v6_0_mqd_init(struct amdgpu_device *adev, void *mqd,</div><div class='ctx'> 	m-&gt;sdmax_rlcx_rb_aql_cntl = regSDMA0_QUEUE0_RB_AQL_CNTL_DEFAULT;</div><div class='ctx'> 	m-&gt;sdmax_rlcx_dummy_reg = regSDMA0_QUEUE0_DUMMY_REG_DEFAULT;</div><div class='ctx'> </div><div class='add'>+	m-&gt;sdmax_rlcx_csa_addr_lo = lower_32_bits(prop-&gt;csa_addr);</div><div class='add'>+	m-&gt;sdmax_rlcx_csa_addr_hi = upper_32_bits(prop-&gt;csa_addr);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -917,33 +919,22 @@ static int sdma_v6_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	int r;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+</div><div class='ctx'> 	r = amdgpu_ring_alloc(ring, 5);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring-&gt;idx, r);</div><div class='del'>-		if (!ring-&gt;is_mes_queue)</div><div class='del'>-			amdgpu_device_wb_free(adev, index);</div><div class='add'>+		amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -956,10 +947,7 @@ static int sdma_v6_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	amdgpu_ring_commit(ring);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		if (ring-&gt;is_mes_queue)</div><div class='del'>-			tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-		else</div><div class='del'>-			tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> 		if (tmp == 0xDEADBEEF)</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (amdgpu_emu_mode == 1)</div><div class='hunk'>@@ -971,8 +959,7 @@ static int sdma_v6_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	if (i &gt;= adev-&gt;usec_timeout)</div><div class='ctx'> 		r = -ETIMEDOUT;</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -995,37 +982,23 @@ static int sdma_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 	long r;</div><div class='ctx'> 	u32 tmp = 0;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> 	memset(&amp;ib, 0, sizeof(ib));</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring, AMDGPU_MES_CTX_IB_OFFS);</div><div class='del'>-		ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ib.ptr = (void *)amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='del'>-		if (r) {</div><div class='del'>-			DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='del'>-			goto err0;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='add'>+		goto err0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ib.ptr[0] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) |</div><div class='hunk'>@@ -1053,10 +1026,7 @@ static int sdma_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-	else</div><div class='del'>-		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+	tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> </div><div class='ctx'> 	if (tmp == 0xDEADBEEF)</div><div class='ctx'> 		r = 0;</div><div class='hunk'>@@ -1067,8 +1037,7 @@ err1:</div><div class='ctx'> 	amdgpu_ib_free(&amp;ib, NULL);</div><div class='ctx'> 	dma_fence_put(f);</div><div class='ctx'> err0:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1300,6 +1269,23 @@ static int sdma_v6_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='add'>+	switch (amdgpu_user_queue) {</div><div class='add'>+	case -1:</div><div class='add'>+	case 0:</div><div class='add'>+	default:</div><div class='add'>+		adev-&gt;sdma.no_user_submission = false;</div><div class='add'>+		adev-&gt;sdma.disable_uq = true;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		adev-&gt;sdma.no_user_submission = false;</div><div class='add'>+		adev-&gt;sdma.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		adev-&gt;sdma.no_user_submission = true;</div><div class='add'>+		adev-&gt;sdma.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	r = amdgpu_sdma_init_microcode(adev, 0, true);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='hunk'>@@ -1334,6 +1320,7 @@ static int sdma_v6_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		ring-&gt;ring_obj = NULL;</div><div class='ctx'> 		ring-&gt;use_doorbell = true;</div><div class='ctx'> 		ring-&gt;me = i;</div><div class='add'>+		ring-&gt;no_user_submission = adev-&gt;sdma.no_user_submission;</div><div class='ctx'> </div><div class='ctx'> 		DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,</div><div class='ctx'> 				ring-&gt;use_doorbell?"true":"false");</div><div class='hunk'>@@ -1376,6 +1363,10 @@ static int sdma_v6_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	else</div><div class='ctx'> 		DRM_ERROR("Failed to allocated memory for SDMA IP Dump\n");</div><div class='ctx'> </div><div class='add'>+	/* add firmware version checks here */</div><div class='add'>+	if (0 &amp;&amp; !adev-&gt;sdma.disable_uq)</div><div class='add'>+		adev-&gt;userq_funcs[AMDGPU_HW_IP_DMA] = &amp;userq_mes_funcs;</div><div class='add'>+</div><div class='ctx'> 	r = amdgpu_sdma_sysfs_reset_mask_init(adev);</div><div class='ctx'> 	if (r)</div><div class='ctx'> 		return r;</div><div class='hunk'>@@ -1399,11 +1390,39 @@ static int sdma_v6_0_sw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sdma_v6_0_set_userq_trap_interrupts(struct amdgpu_device *adev,</div><div class='add'>+					       bool enable)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq_type;</div><div class='add'>+	int i, r;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;userq_funcs[AMDGPU_HW_IP_DMA]) {</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+			irq_type = AMDGPU_SDMA_IRQ_INSTANCE0 + i;</div><div class='add'>+			if (enable)</div><div class='add'>+				r = amdgpu_irq_get(adev, &amp;adev-&gt;sdma.trap_irq,</div><div class='add'>+						   irq_type);</div><div class='add'>+			else</div><div class='add'>+				r = amdgpu_irq_put(adev, &amp;adev-&gt;sdma.trap_irq,</div><div class='add'>+						   irq_type);</div><div class='add'>+			if (r)</div><div class='add'>+				return r;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int sdma_v6_0_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='del'>-	return sdma_v6_0_start(adev);</div><div class='add'>+	r = sdma_v6_0_start(adev);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	return sdma_v6_0_set_userq_trap_interrupts(adev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sdma_v6_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='hunk'>@@ -1415,6 +1434,7 @@ static int sdma_v6_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 	sdma_v6_0_ctxempty_int_enable(adev, false);</div><div class='ctx'> 	sdma_v6_0_enable(adev, false);</div><div class='add'>+	sdma_v6_0_set_userq_trap_interrupts(adev, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c<br/>index b2706221df99..befe013b11a7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@</div><div class='ctx'> #include "sdma_common.h"</div><div class='ctx'> #include "sdma_v7_0.h"</div><div class='ctx'> #include "v12_structs.h"</div><div class='add'>+#include "mes_userqueue.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_FIRMWARE("amdgpu/sdma_7_0_0.bin");</div><div class='ctx'> MODULE_FIRMWARE("amdgpu/sdma_7_0_1.bin");</div><div class='hunk'>@@ -204,66 +205,39 @@ static uint64_t sdma_v7_0_ring_get_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> static void sdma_v7_0_ring_set_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='del'>-	uint32_t *wptr_saved;</div><div class='del'>-	uint32_t *is_queue_unmap;</div><div class='del'>-	uint64_t aggregated_db_index;</div><div class='del'>-	uint32_t mqd_size = adev-&gt;mqds[AMDGPU_HW_IP_DMA].mqd_size;</div><div class='ctx'> </div><div class='ctx'> 	DRM_DEBUG("Setting write pointer\n");</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		wptr_saved = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size);</div><div class='del'>-		is_queue_unmap = (uint32_t *)(ring-&gt;mqd_ptr + mqd_size +</div><div class='del'>-					      sizeof(uint32_t));</div><div class='del'>-		aggregated_db_index =</div><div class='del'>-			amdgpu_mes_get_aggregated_doorbell_index(adev,</div><div class='del'>-							 ring-&gt;hw_prio);</div><div class='del'>-</div><div class='add'>+	if (ring-&gt;use_doorbell) {</div><div class='add'>+		DRM_DEBUG("Using doorbell -- "</div><div class='add'>+			  "wptr_offs == 0x%08x "</div><div class='add'>+			  "lower_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x "</div><div class='add'>+			  "upper_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x\n",</div><div class='add'>+			  ring-&gt;wptr_offs,</div><div class='add'>+			  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='add'>+			  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='add'>+		/* XXX check if swapping is necessary on BE */</div><div class='ctx'> 		atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='ctx'> 			     ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		*wptr_saved = ring-&gt;wptr &lt;&lt; 2;</div><div class='del'>-		if (*is_queue_unmap) {</div><div class='del'>-			WDOORBELL64(aggregated_db_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='del'>-					ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		} else {</div><div class='del'>-			DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='del'>-					ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		}</div><div class='add'>+		DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='add'>+			  ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='add'>+		WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (ring-&gt;use_doorbell) {</div><div class='del'>-			DRM_DEBUG("Using doorbell -- "</div><div class='del'>-				  "wptr_offs == 0x%08x "</div><div class='del'>-				  "lower_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x "</div><div class='del'>-				  "upper_32_bits(ring-&gt;wptr) &lt;&lt; 2 == 0x%08x\n",</div><div class='del'>-				  ring-&gt;wptr_offs,</div><div class='del'>-				  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='del'>-				  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-			/* XXX check if swapping is necessary on BE */</div><div class='del'>-			atomic64_set((atomic64_t *)ring-&gt;wptr_cpu_addr,</div><div class='del'>-				     ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",</div><div class='del'>-				  ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-			WDOORBELL64(ring-&gt;doorbell_index, ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		} else {</div><div class='del'>-			DRM_DEBUG("Not using doorbell -- "</div><div class='del'>-				  "regSDMA%i_GFX_RB_WPTR == 0x%08x "</div><div class='del'>-				  "regSDMA%i_GFX_RB_WPTR_HI == 0x%08x\n",</div><div class='del'>-				  ring-&gt;me,</div><div class='del'>-				  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='del'>-				  ring-&gt;me,</div><div class='del'>-				  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-			WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev,</div><div class='del'>-								     ring-&gt;me,</div><div class='del'>-								     regSDMA0_QUEUE0_RB_WPTR),</div><div class='del'>-					lower_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-			WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev,</div><div class='del'>-								     ring-&gt;me,</div><div class='del'>-								     regSDMA0_QUEUE0_RB_WPTR_HI),</div><div class='del'>-					upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='del'>-		}</div><div class='add'>+		DRM_DEBUG("Not using doorbell -- "</div><div class='add'>+			  "regSDMA%i_GFX_RB_WPTR == 0x%08x "</div><div class='add'>+			  "regSDMA%i_GFX_RB_WPTR_HI == 0x%08x\n",</div><div class='add'>+			  ring-&gt;me,</div><div class='add'>+			  lower_32_bits(ring-&gt;wptr &lt;&lt; 2),</div><div class='add'>+			  ring-&gt;me,</div><div class='add'>+			  upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='add'>+		WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev,</div><div class='add'>+							     ring-&gt;me,</div><div class='add'>+							     regSDMA0_QUEUE0_RB_WPTR),</div><div class='add'>+				lower_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='add'>+		WREG32_SOC15_IP(GC, sdma_v7_0_get_reg_offset(adev,</div><div class='add'>+							     ring-&gt;me,</div><div class='add'>+							     regSDMA0_QUEUE0_RB_WPTR_HI),</div><div class='add'>+				upper_32_bits(ring-&gt;wptr &lt;&lt; 2));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -407,11 +381,9 @@ static void sdma_v7_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 se</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; AMDGPU_FENCE_FLAG_INT) {</div><div class='del'>-		uint32_t ctx = ring-&gt;is_mes_queue ?</div><div class='del'>-			(ring-&gt;hw_queue_id | AMDGPU_FENCE_MES_QUEUE_FLAG) : 0;</div><div class='ctx'> 		/* generate an interrupt */</div><div class='ctx'> 		amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_TRAP));</div><div class='del'>-		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(ctx));</div><div class='add'>+		amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -935,6 +907,9 @@ static int sdma_v7_0_mqd_init(struct amdgpu_device *adev, void *mqd,</div><div class='ctx'> 	m-&gt;sdmax_rlcx_rb_aql_cntl = 0x4000;	//regSDMA0_QUEUE0_RB_AQL_CNTL_DEFAULT;</div><div class='ctx'> 	m-&gt;sdmax_rlcx_dummy_reg = 0xf;	//regSDMA0_QUEUE0_DUMMY_REG_DEFAULT;</div><div class='ctx'> </div><div class='add'>+	m-&gt;sdmax_rlcx_csa_addr_lo = lower_32_bits(prop-&gt;csa_addr);</div><div class='add'>+	m-&gt;sdmax_rlcx_csa_addr_hi = upper_32_bits(prop-&gt;csa_addr);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -961,33 +936,22 @@ static int sdma_v7_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	int r;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%d) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+</div><div class='ctx'> 	r = amdgpu_ring_alloc(ring, 5);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring-&gt;idx, r);</div><div class='del'>-		if (!ring-&gt;is_mes_queue)</div><div class='del'>-			amdgpu_device_wb_free(adev, index);</div><div class='add'>+		amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1000,10 +964,7 @@ static int sdma_v7_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	amdgpu_ring_commit(ring);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		if (ring-&gt;is_mes_queue)</div><div class='del'>-			tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-		else</div><div class='del'>-			tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> 		if (tmp == 0xDEADBEEF)</div><div class='ctx'> 			break;</div><div class='ctx'> 		if (amdgpu_emu_mode == 1)</div><div class='hunk'>@@ -1015,8 +976,7 @@ static int sdma_v7_0_ring_test_ring(struct amdgpu_ring *ring)</div><div class='ctx'> 	if (i &gt;= adev-&gt;usec_timeout)</div><div class='ctx'> 		r = -ETIMEDOUT;</div><div class='ctx'> </div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> </div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -1039,37 +999,23 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 	long r;</div><div class='ctx'> 	u32 tmp = 0;</div><div class='ctx'> 	u64 gpu_addr;</div><div class='del'>-	volatile uint32_t *cpu_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tmp = 0xCAFEDEAD;</div><div class='ctx'> 	memset(&amp;ib, 0, sizeof(ib));</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue) {</div><div class='del'>-		uint32_t offset = 0;</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring, AMDGPU_MES_CTX_IB_OFFS);</div><div class='del'>-		ib.gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		ib.ptr = (void *)amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-</div><div class='del'>-		offset = amdgpu_mes_ctx_get_offs(ring,</div><div class='del'>-					 AMDGPU_MES_CTX_PADDING_OFFS);</div><div class='del'>-		gpu_addr = amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);</div><div class='del'>-		cpu_ptr = amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset);</div><div class='del'>-		*cpu_ptr = tmp;</div><div class='del'>-	} else {</div><div class='del'>-		r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='del'>-		if (r) {</div><div class='del'>-			dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='del'>-			return r;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_device_wb_get(adev, &amp;index);</div><div class='add'>+	if (r) {</div><div class='add'>+		dev_err(adev-&gt;dev, "(%ld) failed to allocate wb slot\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='del'>-		adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='add'>+	gpu_addr = adev-&gt;wb.gpu_addr + (index * 4);</div><div class='add'>+	adev-&gt;wb.wb[index] = cpu_to_le32(tmp);</div><div class='ctx'> </div><div class='del'>-		r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='del'>-		if (r) {</div><div class='del'>-			DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='del'>-			goto err0;</div><div class='del'>-		}</div><div class='add'>+	r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &amp;ib);</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);</div><div class='add'>+		goto err0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ib.ptr[0] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) |</div><div class='hunk'>@@ -1097,10 +1043,7 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)</div><div class='ctx'> 		goto err1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;is_mes_queue)</div><div class='del'>-		tmp = le32_to_cpu(*cpu_ptr);</div><div class='del'>-	else</div><div class='del'>-		tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='add'>+	tmp = le32_to_cpu(adev-&gt;wb.wb[index]);</div><div class='ctx'> </div><div class='ctx'> 	if (tmp == 0xDEADBEEF)</div><div class='ctx'> 		r = 0;</div><div class='hunk'>@@ -1111,8 +1054,7 @@ err1:</div><div class='ctx'> 	amdgpu_ib_free(&amp;ib, NULL);</div><div class='ctx'> 	dma_fence_put(f);</div><div class='ctx'> err0:</div><div class='del'>-	if (!ring-&gt;is_mes_queue)</div><div class='del'>-		amdgpu_device_wb_free(adev, index);</div><div class='add'>+	amdgpu_device_wb_free(adev, index);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1312,6 +1254,23 @@ static int sdma_v7_0_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='add'>+	switch (amdgpu_user_queue) {</div><div class='add'>+	case -1:</div><div class='add'>+	case 0:</div><div class='add'>+	default:</div><div class='add'>+		adev-&gt;sdma.no_user_submission = false;</div><div class='add'>+		adev-&gt;sdma.disable_uq = true;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		adev-&gt;sdma.no_user_submission = false;</div><div class='add'>+		adev-&gt;sdma.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		adev-&gt;sdma.no_user_submission = true;</div><div class='add'>+		adev-&gt;sdma.disable_uq = false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	r = amdgpu_sdma_init_microcode(adev, 0, true);</div><div class='ctx'> 	if (r) {</div><div class='ctx'> 		DRM_ERROR("Failed to init sdma firmware!\n");</div><div class='hunk'>@@ -1347,6 +1306,7 @@ static int sdma_v7_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		ring-&gt;ring_obj = NULL;</div><div class='ctx'> 		ring-&gt;use_doorbell = true;</div><div class='ctx'> 		ring-&gt;me = i;</div><div class='add'>+		ring-&gt;no_user_submission = adev-&gt;sdma.no_user_submission;</div><div class='ctx'> </div><div class='ctx'> 		DRM_DEBUG("SDMA %d use_doorbell being set to: [%s]\n", i,</div><div class='ctx'> 				ring-&gt;use_doorbell?"true":"false");</div><div class='hunk'>@@ -1378,6 +1338,10 @@ static int sdma_v7_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	else</div><div class='ctx'> 		DRM_ERROR("Failed to allocated memory for SDMA IP Dump\n");</div><div class='ctx'> </div><div class='add'>+	/* add firmware version checks here */</div><div class='add'>+	if (0 &amp;&amp; !adev-&gt;sdma.disable_uq)</div><div class='add'>+		adev-&gt;userq_funcs[AMDGPU_HW_IP_DMA] = &amp;userq_mes_funcs;</div><div class='add'>+</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1400,11 +1364,39 @@ static int sdma_v7_0_sw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sdma_v7_0_set_userq_trap_interrupts(struct amdgpu_device *adev,</div><div class='add'>+					       bool enable)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq_type;</div><div class='add'>+	int i, r;</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;userq_funcs[AMDGPU_HW_IP_DMA]) {</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='add'>+			irq_type = AMDGPU_SDMA_IRQ_INSTANCE0 + i;</div><div class='add'>+			if (enable)</div><div class='add'>+				r = amdgpu_irq_get(adev, &amp;adev-&gt;sdma.trap_irq,</div><div class='add'>+						   irq_type);</div><div class='add'>+			else</div><div class='add'>+				r = amdgpu_irq_put(adev, &amp;adev-&gt;sdma.trap_irq,</div><div class='add'>+						   irq_type);</div><div class='add'>+			if (r)</div><div class='add'>+				return r;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int sdma_v7_0_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='del'>-	return sdma_v7_0_start(adev);</div><div class='add'>+	r = sdma_v7_0_start(adev);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	return sdma_v7_0_set_userq_trap_interrupts(adev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sdma_v7_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='hunk'>@@ -1416,6 +1408,7 @@ static int sdma_v7_0_hw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 	sdma_v7_0_ctx_switch_enable(adev, false);</div><div class='ctx'> 	sdma_v7_0_enable(adev, false);</div><div class='add'>+	sdma_v7_0_set_userq_trap_interrupts(adev, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c<br/>index 2247f6a94858..e0f139de7991 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/si.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include "amdgpu_vce.h"</div><div class='ctx'> #include "atom.h"</div><div class='ctx'> #include "amd_pcie.h"</div><div class='add'>+</div><div class='ctx'> #include "si_dpm.h"</div><div class='ctx'> #include "sid.h"</div><div class='ctx'> #include "si_ih.h"</div><div class='hunk'>@@ -44,17 +45,30 @@</div><div class='ctx'> #include "dce_v6_0.h"</div><div class='ctx'> #include "si.h"</div><div class='ctx'> #include "uvd_v3_1.h"</div><div class='del'>-#include "amdgpu_vkms.h"</div><div class='add'>+</div><div class='add'>+#include "uvd/uvd_4_0_d.h"</div><div class='add'>+</div><div class='add'>+#include "smu/smu_6_0_d.h"</div><div class='add'>+#include "smu/smu_6_0_sh_mask.h"</div><div class='add'>+</div><div class='ctx'> #include "gca/gfx_6_0_d.h"</div><div class='add'>+#include "gca/gfx_6_0_sh_mask.h"</div><div class='add'>+</div><div class='ctx'> #include "oss/oss_1_0_d.h"</div><div class='ctx'> #include "oss/oss_1_0_sh_mask.h"</div><div class='add'>+</div><div class='ctx'> #include "gmc/gmc_6_0_d.h"</div><div class='add'>+#include"gmc/gmc_6_0_sh_mask.h"</div><div class='add'>+</div><div class='ctx'> #include "dce/dce_6_0_d.h"</div><div class='del'>-#include "uvd/uvd_4_0_d.h"</div><div class='add'>+#include "dce/dce_6_0_sh_mask.h"</div><div class='add'>+</div><div class='ctx'> #include "bif/bif_3_0_d.h"</div><div class='ctx'> #include "bif/bif_3_0_sh_mask.h"</div><div class='add'>+#include "si_enums.h"</div><div class='ctx'> </div><div class='ctx'> #include "amdgpu_dm.h"</div><div class='add'>+#include "amdgpu_vkms.h"</div><div class='ctx'> </div><div class='ctx'> static const u32 tahiti_golden_registers[] =</div><div class='ctx'> {</div><div class='hunk'>@@ -1071,8 +1085,8 @@ static u32 si_smc_rreg(struct amdgpu_device *adev, u32 reg)</div><div class='ctx'> 	u32 r;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;adev-&gt;smc_idx_lock, flags);</div><div class='del'>-	WREG32(SMC_IND_INDEX_0, (reg));</div><div class='del'>-	r = RREG32(SMC_IND_DATA_0);</div><div class='add'>+	WREG32(mmSMC_IND_INDEX_0, (reg));</div><div class='add'>+	r = RREG32(mmSMC_IND_DATA_0);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;adev-&gt;smc_idx_lock, flags);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='hunk'>@@ -1082,8 +1096,8 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;adev-&gt;smc_idx_lock, flags);</div><div class='del'>-	WREG32(SMC_IND_INDEX_0, (reg));</div><div class='del'>-	WREG32(SMC_IND_DATA_0, (v));</div><div class='add'>+	WREG32(mmSMC_IND_INDEX_0, (reg));</div><div class='add'>+	WREG32(mmSMC_IND_DATA_0, (v));</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;adev-&gt;smc_idx_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1110,20 +1124,20 @@ static void si_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {</div><div class='del'>-	{GRBM_STATUS},</div><div class='add'>+	{mmGRBM_STATUS},</div><div class='ctx'> 	{mmGRBM_STATUS2},</div><div class='ctx'> 	{mmGRBM_STATUS_SE0},</div><div class='ctx'> 	{mmGRBM_STATUS_SE1},</div><div class='ctx'> 	{mmSRBM_STATUS},</div><div class='ctx'> 	{mmSRBM_STATUS2},</div><div class='del'>-	{DMA_STATUS_REG + DMA0_REGISTER_OFFSET},</div><div class='del'>-	{DMA_STATUS_REG + DMA1_REGISTER_OFFSET},</div><div class='add'>+	{mmDMA_STATUS_REG + DMA0_REGISTER_OFFSET},</div><div class='add'>+	{mmDMA_STATUS_REG + DMA1_REGISTER_OFFSET},</div><div class='ctx'> 	{mmCP_STAT},</div><div class='ctx'> 	{mmCP_STALLED_STAT1},</div><div class='ctx'> 	{mmCP_STALLED_STAT2},</div><div class='ctx'> 	{mmCP_STALLED_STAT3},</div><div class='del'>-	{GB_ADDR_CONFIG},</div><div class='del'>-	{MC_ARB_RAMCFG},</div><div class='add'>+	{mmGB_ADDR_CONFIG},</div><div class='add'>+	{mmMC_ARB_RAMCFG},</div><div class='ctx'> 	{mmGB_TILE_MODE0},</div><div class='ctx'> 	{mmGB_TILE_MODE1},</div><div class='ctx'> 	{mmGB_TILE_MODE2},</div><div class='hunk'>@@ -1156,7 +1170,7 @@ static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {</div><div class='ctx'> 	{mmGB_TILE_MODE29},</div><div class='ctx'> 	{mmGB_TILE_MODE30},</div><div class='ctx'> 	{mmGB_TILE_MODE31},</div><div class='del'>-	{CC_RB_BACKEND_DISABLE, true},</div><div class='add'>+	{mmCC_RB_BACKEND_DISABLE, true},</div><div class='ctx'> 	{mmGC_USER_RB_BACKEND_DISABLE, true},</div><div class='ctx'> 	{mmPA_SC_RASTER_CONFIG, true},</div><div class='ctx'> };</div><div class='hunk'>@@ -1264,37 +1278,37 @@ static bool si_read_disabled_bios(struct amdgpu_device *adev)</div><div class='ctx'> 	u32 rom_cntl;</div><div class='ctx'> 	bool r;</div><div class='ctx'> </div><div class='del'>-	bus_cntl = RREG32(R600_BUS_CNTL);</div><div class='add'>+	bus_cntl = RREG32(mmBUS_CNTL);</div><div class='ctx'> 	if (adev-&gt;mode_info.num_crtc) {</div><div class='del'>-		d1vga_control = RREG32(AVIVO_D1VGA_CONTROL);</div><div class='del'>-		d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);</div><div class='del'>-		vga_render_control = RREG32(VGA_RENDER_CONTROL);</div><div class='add'>+		d1vga_control = RREG32(mmD1VGA_CONTROL);</div><div class='add'>+		d2vga_control = RREG32(mmD2VGA_CONTROL);</div><div class='add'>+		vga_render_control = RREG32(mmVGA_RENDER_CONTROL);</div><div class='ctx'> 	}</div><div class='ctx'> 	rom_cntl = RREG32(R600_ROM_CNTL);</div><div class='ctx'> </div><div class='ctx'> 	/* enable the rom */</div><div class='del'>-	WREG32(R600_BUS_CNTL, (bus_cntl &amp; ~R600_BIOS_ROM_DIS));</div><div class='add'>+	WREG32(mmBUS_CNTL, (bus_cntl &amp; ~BUS_CNTL__BIOS_ROM_DIS_MASK));</div><div class='ctx'> 	if (adev-&gt;mode_info.num_crtc) {</div><div class='ctx'> 		/* Disable VGA mode */</div><div class='del'>-		WREG32(AVIVO_D1VGA_CONTROL,</div><div class='del'>-		       (d1vga_control &amp; ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |</div><div class='del'>-					  AVIVO_DVGA_CONTROL_TIMING_SELECT)));</div><div class='del'>-		WREG32(AVIVO_D2VGA_CONTROL,</div><div class='del'>-		       (d2vga_control &amp; ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |</div><div class='del'>-					  AVIVO_DVGA_CONTROL_TIMING_SELECT)));</div><div class='del'>-		WREG32(VGA_RENDER_CONTROL,</div><div class='del'>-		       (vga_render_control &amp; C_000300_VGA_VSTATUS_CNTL));</div><div class='add'>+		WREG32(mmD1VGA_CONTROL,</div><div class='add'>+		       (d1vga_control &amp; ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK |</div><div class='add'>+					  D1VGA_CONTROL__D1VGA_TIMING_SELECT_MASK)));</div><div class='add'>+		WREG32(mmD2VGA_CONTROL,</div><div class='add'>+		       (d2vga_control &amp; ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK |</div><div class='add'>+					  D1VGA_CONTROL__D1VGA_TIMING_SELECT_MASK)));</div><div class='add'>+		WREG32(mmVGA_RENDER_CONTROL,</div><div class='add'>+		       (vga_render_control &amp; ~VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK));</div><div class='ctx'> 	}</div><div class='ctx'> 	WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE);</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_read_bios(adev);</div><div class='ctx'> </div><div class='ctx'> 	/* restore regs */</div><div class='del'>-	WREG32(R600_BUS_CNTL, bus_cntl);</div><div class='add'>+	WREG32(mmBUS_CNTL, bus_cntl);</div><div class='ctx'> 	if (adev-&gt;mode_info.num_crtc) {</div><div class='del'>-		WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);</div><div class='del'>-		WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);</div><div class='del'>-		WREG32(VGA_RENDER_CONTROL, vga_render_control);</div><div class='add'>+		WREG32(mmD1VGA_CONTROL, d1vga_control);</div><div class='add'>+		WREG32(mmD2VGA_CONTROL, d2vga_control);</div><div class='add'>+		WREG32(mmVGA_RENDER_CONTROL, vga_render_control);</div><div class='ctx'> 	}</div><div class='ctx'> 	WREG32(R600_ROM_CNTL, rom_cntl);</div><div class='ctx'> 	return r;</div><div class='hunk'>@@ -1331,23 +1345,24 @@ static void si_set_clk_bypass_mode(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tmp, i;</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(CG_SPLL_FUNC_CNTL);</div><div class='del'>-	tmp |= SPLL_BYPASS_EN;</div><div class='del'>-	WREG32(CG_SPLL_FUNC_CNTL, tmp);</div><div class='add'>+	tmp = RREG32(mmCG_SPLL_FUNC_CNTL);</div><div class='add'>+	tmp |= CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN_MASK;</div><div class='add'>+	WREG32(mmCG_SPLL_FUNC_CNTL, tmp);</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(CG_SPLL_FUNC_CNTL_2);</div><div class='del'>-	tmp |= SPLL_CTLREQ_CHG;</div><div class='del'>-	WREG32(CG_SPLL_FUNC_CNTL_2, tmp);</div><div class='add'>+	tmp = RREG32(mmCG_SPLL_FUNC_CNTL_2);</div><div class='add'>+	tmp |= CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK;</div><div class='add'>+	WREG32(mmCG_SPLL_FUNC_CNTL_2, tmp);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		if (RREG32(SPLL_STATUS) &amp; SPLL_CHG_STATUS)</div><div class='add'>+		if (RREG32(mmCG_SPLL_STATUS) &amp; CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK)</div><div class='ctx'> 			break;</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(CG_SPLL_FUNC_CNTL_2);</div><div class='del'>-	tmp &amp;= ~(SPLL_CTLREQ_CHG | SCLK_MUX_UPDATE);</div><div class='del'>-	WREG32(CG_SPLL_FUNC_CNTL_2, tmp);</div><div class='add'>+	tmp = RREG32(mmCG_SPLL_FUNC_CNTL_2);</div><div class='add'>+	tmp &amp;= ~(CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK |</div><div class='add'>+		CG_SPLL_FUNC_CNTL_2__SCLK_MUX_UPDATE_MASK);</div><div class='add'>+	WREG32(mmCG_SPLL_FUNC_CNTL_2, tmp);</div><div class='ctx'> </div><div class='ctx'> 	tmp = RREG32(MPLL_CNTL_MODE);</div><div class='ctx'> 	tmp &amp;= ~MPLL_MCLK_SEL;</div><div class='hunk'>@@ -1358,21 +1373,21 @@ static void si_spll_powerdown(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(SPLL_CNTL_MODE);</div><div class='del'>-	tmp |= SPLL_SW_DIR_CONTROL;</div><div class='del'>-	WREG32(SPLL_CNTL_MODE, tmp);</div><div class='add'>+	tmp = RREG32(mmSPLL_CNTL_MODE);</div><div class='add'>+	tmp |= SPLL_CNTL_MODE__SPLL_SW_DIR_CONTROL_MASK;</div><div class='add'>+	WREG32(mmSPLL_CNTL_MODE, tmp);</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(CG_SPLL_FUNC_CNTL);</div><div class='del'>-	tmp |= SPLL_RESET;</div><div class='del'>-	WREG32(CG_SPLL_FUNC_CNTL, tmp);</div><div class='add'>+	tmp = RREG32(mmCG_SPLL_FUNC_CNTL);</div><div class='add'>+	tmp |= CG_SPLL_FUNC_CNTL__SPLL_RESET_MASK;</div><div class='add'>+	WREG32(mmCG_SPLL_FUNC_CNTL, tmp);</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(CG_SPLL_FUNC_CNTL);</div><div class='del'>-	tmp |= SPLL_SLEEP;</div><div class='del'>-	WREG32(CG_SPLL_FUNC_CNTL, tmp);</div><div class='add'>+	tmp = RREG32(mmCG_SPLL_FUNC_CNTL);</div><div class='add'>+	tmp |= CG_SPLL_FUNC_CNTL__SPLL_SLEEP_MASK;</div><div class='add'>+	WREG32(mmCG_SPLL_FUNC_CNTL, tmp);</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(SPLL_CNTL_MODE);</div><div class='del'>-	tmp &amp;= ~SPLL_SW_DIR_CONTROL;</div><div class='del'>-	WREG32(SPLL_CNTL_MODE, tmp);</div><div class='add'>+	tmp = RREG32(mmSPLL_CNTL_MODE);</div><div class='add'>+	tmp &amp;= ~SPLL_CNTL_MODE__SPLL_SW_DIR_CONTROL_MASK;</div><div class='add'>+	WREG32(mmSPLL_CNTL_MODE, tmp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int si_gpu_pci_config_reset(struct amdgpu_device *adev)</div><div class='hunk'>@@ -1454,14 +1469,14 @@ static void si_vga_set_state(struct amdgpu_device *adev, bool state)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t temp;</div><div class='ctx'> </div><div class='del'>-	temp = RREG32(CONFIG_CNTL);</div><div class='add'>+	temp = RREG32(mmCONFIG_CNTL);</div><div class='ctx'> 	if (!state) {</div><div class='ctx'> 		temp &amp;= ~(1&lt;&lt;0);</div><div class='ctx'> 		temp |= (1&lt;&lt;1);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		temp &amp;= ~(1&lt;&lt;1);</div><div class='ctx'> 	}</div><div class='del'>-	WREG32(CONFIG_CNTL, temp);</div><div class='add'>+	WREG32(mmCONFIG_CNTL, temp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 si_get_xclk(struct amdgpu_device *adev)</div><div class='hunk'>@@ -1469,12 +1484,12 @@ static u32 si_get_xclk(struct amdgpu_device *adev)</div><div class='ctx'> 	u32 reference_clock = adev-&gt;clock.spll.reference_freq;</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(CG_CLKPIN_CNTL_2);</div><div class='del'>-	if (tmp &amp; MUX_TCLK_TO_XCLK)</div><div class='add'>+	tmp = RREG32(mmCG_CLKPIN_CNTL_2);</div><div class='add'>+	if (tmp &amp; CG_CLKPIN_CNTL_2__MUX_TCLK_TO_XCLK_MASK)</div><div class='ctx'> 		return TCLK;</div><div class='ctx'> </div><div class='del'>-	tmp = RREG32(CG_CLKPIN_CNTL);</div><div class='del'>-	if (tmp &amp; XTALIN_DIVIDE)</div><div class='add'>+	tmp = RREG32(mmCG_CLKPIN_CNTL);</div><div class='add'>+	if (tmp &amp; CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK)</div><div class='ctx'> 		return reference_clock / 4;</div><div class='ctx'> </div><div class='ctx'> 	return reference_clock;</div><div class='hunk'>@@ -1519,9 +1534,9 @@ static int si_get_pcie_lanes(struct amdgpu_device *adev)</div><div class='ctx'> 	if (adev-&gt;flags &amp; AMD_IS_APU)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	link_width_cntl = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);</div><div class='add'>+	link_width_cntl = RREG32_PCIE_PORT(ixPCIE_LC_LINK_WIDTH_CNTL);</div><div class='ctx'> </div><div class='del'>-	switch ((link_width_cntl &amp; LC_LINK_WIDTH_RD_MASK) &gt;&gt; LC_LINK_WIDTH_RD_SHIFT) {</div><div class='add'>+	switch ((link_width_cntl &amp; PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK) &gt;&gt; PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT) {</div><div class='ctx'> 	case LC_LINK_WIDTH_X1:</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	case LC_LINK_WIDTH_X2:</div><div class='hunk'>@@ -1568,13 +1583,13 @@ static void si_set_pcie_lanes(struct amdgpu_device *adev, int lanes)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	link_width_cntl = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);</div><div class='del'>-	link_width_cntl &amp;= ~LC_LINK_WIDTH_MASK;</div><div class='del'>-	link_width_cntl |= mask &lt;&lt; LC_LINK_WIDTH_SHIFT;</div><div class='del'>-	link_width_cntl |= (LC_RECONFIG_NOW |</div><div class='del'>-			    LC_RECONFIG_ARC_MISSING_ESCAPE);</div><div class='add'>+	link_width_cntl = RREG32_PCIE_PORT(ixPCIE_LC_LINK_WIDTH_CNTL);</div><div class='add'>+	link_width_cntl &amp;= ~PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_MASK;</div><div class='add'>+	link_width_cntl |= mask &lt;&lt; PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH__SHIFT;</div><div class='add'>+	link_width_cntl |= (PCIE_LC_LINK_WIDTH_CNTL__LC_RECONFIG_NOW_MASK |</div><div class='add'>+		PCIE_LC_LINK_WIDTH_CNTL__LC_RECONFIG_ARC_MISSING_ESCAPE_MASK);</div><div class='ctx'> </div><div class='del'>-	WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);</div><div class='add'>+	WREG32_PCIE_PORT(ixPCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void si_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0,</div><div class='hunk'>@@ -2018,7 +2033,7 @@ static const struct amdgpu_asic_funcs si_asic_funcs =</div><div class='ctx'> </div><div class='ctx'> static uint32_t si_get_rev_id(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='del'>-	return (RREG32(CC_DRM_ID_STRAPS) &amp; CC_DRM_ID_STRAPS__ATI_REV_ID_MASK)</div><div class='add'>+	return (RREG32(mmCC_DRM_ID_STRAPS) &amp; CC_DRM_ID_STRAPS__ATI_REV_ID_MASK)</div><div class='ctx'> 		&gt;&gt; CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2239,9 +2254,9 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)</div><div class='ctx'> 					CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);</div><div class='del'>-	current_data_rate = (speed_cntl &amp; LC_CURRENT_DATA_RATE_MASK) &gt;&gt;</div><div class='del'>-		LC_CURRENT_DATA_RATE_SHIFT;</div><div class='add'>+	speed_cntl = RREG32_PCIE_PORT(ixPCIE_LC_SPEED_CNTL);</div><div class='add'>+	current_data_rate = (speed_cntl &amp; PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK) &gt;&gt;</div><div class='add'>+		PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT;</div><div class='ctx'> 	if (adev-&gt;pm.pcie_gen_mask &amp; CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) {</div><div class='ctx'> 		if (current_data_rate == 2) {</div><div class='ctx'> 			DRM_INFO("PCIE gen 3 link speeds already enabled\n");</div><div class='hunk'>@@ -2268,17 +2283,17 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)</div><div class='ctx'> 			pcie_capability_set_word(root, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);</div><div class='ctx'> 			pcie_capability_set_word(adev-&gt;pdev, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_HAWD);</div><div class='ctx'> </div><div class='del'>-			tmp = RREG32_PCIE(PCIE_LC_STATUS1);</div><div class='del'>-			max_lw = (tmp &amp; LC_DETECTED_LINK_WIDTH_MASK) &gt;&gt; LC_DETECTED_LINK_WIDTH_SHIFT;</div><div class='del'>-			current_lw = (tmp &amp; LC_OPERATING_LINK_WIDTH_MASK) &gt;&gt; LC_OPERATING_LINK_WIDTH_SHIFT;</div><div class='add'>+			tmp = RREG32_PCIE(ixPCIE_LC_STATUS1);</div><div class='add'>+			max_lw = (tmp &amp; PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH_MASK) &gt;&gt; PCIE_LC_STATUS1__LC_DETECTED_LINK_WIDTH__SHIFT;</div><div class='add'>+			current_lw = (tmp &amp; PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH_MASK) &gt;&gt; PCIE_LC_STATUS1__LC_OPERATING_LINK_WIDTH__SHIFT;</div><div class='ctx'> </div><div class='ctx'> 			if (current_lw &lt; max_lw) {</div><div class='del'>-				tmp = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);</div><div class='del'>-				if (tmp &amp; LC_RENEGOTIATION_SUPPORT) {</div><div class='del'>-					tmp &amp;= ~(LC_LINK_WIDTH_MASK | LC_UPCONFIGURE_DIS);</div><div class='del'>-					tmp |= (max_lw &lt;&lt; LC_LINK_WIDTH_SHIFT);</div><div class='del'>-					tmp |= LC_UPCONFIGURE_SUPPORT | LC_RENEGOTIATE_EN | LC_RECONFIG_NOW;</div><div class='del'>-					WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, tmp);</div><div class='add'>+				tmp = RREG32_PCIE_PORT(ixPCIE_LC_LINK_WIDTH_CNTL);</div><div class='add'>+				if (tmp &amp; PCIE_LC_LINK_WIDTH_CNTL__LC_RENEGOTIATION_SUPPORT_MASK) {</div><div class='add'>+					tmp &amp;= ~(PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_MASK | PCIE_LC_LINK_WIDTH_CNTL__LC_UPCONFIGURE_DIS_MASK);</div><div class='add'>+					tmp |= (max_lw &lt;&lt; PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH__SHIFT);</div><div class='add'>+					tmp |= PCIE_LC_LINK_WIDTH_CNTL__LC_UPCONFIGURE_SUPPORT_MASK | PCIE_LC_LINK_WIDTH_CNTL__LC_RENEGOTIATE_EN_MASK | PCIE_LC_LINK_WIDTH_CNTL__LC_RECONFIG_NOW_MASK;</div><div class='add'>+					WREG32_PCIE_PORT(ixPCIE_LC_LINK_WIDTH_CNTL, tmp);</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -2301,13 +2316,13 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)</div><div class='ctx'> 							  PCI_EXP_LNKCTL2,</div><div class='ctx'> 							  &amp;gpu_cfg2);</div><div class='ctx'> </div><div class='del'>-				tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);</div><div class='del'>-				tmp |= LC_SET_QUIESCE;</div><div class='del'>-				WREG32_PCIE_PORT(PCIE_LC_CNTL4, tmp);</div><div class='add'>+				tmp = RREG32_PCIE_PORT(ixPCIE_LC_CNTL4);</div><div class='add'>+				tmp |= PCIE_LC_CNTL4__LC_SET_QUIESCE_MASK;</div><div class='add'>+				WREG32_PCIE_PORT(ixPCIE_LC_CNTL4, tmp);</div><div class='ctx'> </div><div class='del'>-				tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);</div><div class='del'>-				tmp |= LC_REDO_EQ;</div><div class='del'>-				WREG32_PCIE_PORT(PCIE_LC_CNTL4, tmp);</div><div class='add'>+				tmp = RREG32_PCIE_PORT(ixPCIE_LC_CNTL4);</div><div class='add'>+				tmp |= PCIE_LC_CNTL4__LC_REDO_EQ_MASK;</div><div class='add'>+				WREG32_PCIE_PORT(ixPCIE_LC_CNTL4, tmp);</div><div class='ctx'> </div><div class='ctx'> 				mdelay(100);</div><div class='ctx'> </div><div class='hunk'>@@ -2333,16 +2348,16 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)</div><div class='ctx'> 								   (PCI_EXP_LNKCTL2_ENTER_COMP |</div><div class='ctx'> 								    PCI_EXP_LNKCTL2_TX_MARGIN));</div><div class='ctx'> </div><div class='del'>-				tmp = RREG32_PCIE_PORT(PCIE_LC_CNTL4);</div><div class='del'>-				tmp &amp;= ~LC_SET_QUIESCE;</div><div class='del'>-				WREG32_PCIE_PORT(PCIE_LC_CNTL4, tmp);</div><div class='add'>+				tmp = RREG32_PCIE_PORT(ixPCIE_LC_CNTL4);</div><div class='add'>+				tmp &amp;= ~PCIE_LC_CNTL4__LC_SET_QUIESCE_MASK;</div><div class='add'>+				WREG32_PCIE_PORT(ixPCIE_LC_CNTL4, tmp);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	speed_cntl |= LC_FORCE_EN_SW_SPEED_CHANGE | LC_FORCE_DIS_HW_SPEED_CHANGE;</div><div class='del'>-	speed_cntl &amp;= ~LC_FORCE_DIS_SW_SPEED_CHANGE;</div><div class='del'>-	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);</div><div class='add'>+	speed_cntl |= PCIE_LC_SPEED_CNTL__LC_FORCE_EN_SW_SPEED_CHANGE_MASK | PCIE_LC_SPEED_CNTL__LC_FORCE_DIS_HW_SPEED_CHANGE_MASK;</div><div class='add'>+	speed_cntl &amp;= ~PCIE_LC_SPEED_CNTL__LC_FORCE_DIS_SW_SPEED_CHANGE_MASK;</div><div class='add'>+	WREG32_PCIE_PORT(ixPCIE_LC_SPEED_CNTL, speed_cntl);</div><div class='ctx'> </div><div class='ctx'> 	tmp16 = 0;</div><div class='ctx'> 	if (adev-&gt;pm.pcie_gen_mask &amp; CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)</div><div class='hunk'>@@ -2354,13 +2369,13 @@ static void si_pcie_gen3_enable(struct amdgpu_device *adev)</div><div class='ctx'> 	pcie_capability_clear_and_set_word(adev-&gt;pdev, PCI_EXP_LNKCTL2,</div><div class='ctx'> 					   PCI_EXP_LNKCTL2_TLS, tmp16);</div><div class='ctx'> </div><div class='del'>-	speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);</div><div class='del'>-	speed_cntl |= LC_INITIATE_LINK_SPEED_CHANGE;</div><div class='del'>-	WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);</div><div class='add'>+	speed_cntl = RREG32_PCIE_PORT(ixPCIE_LC_SPEED_CNTL);</div><div class='add'>+	speed_cntl |= PCIE_LC_SPEED_CNTL__LC_INITIATE_LINK_SPEED_CHANGE_MASK;</div><div class='add'>+	WREG32_PCIE_PORT(ixPCIE_LC_SPEED_CNTL, speed_cntl);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;usec_timeout; i++) {</div><div class='del'>-		speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);</div><div class='del'>-		if ((speed_cntl &amp; LC_INITIATE_LINK_SPEED_CHANGE) == 0)</div><div class='add'>+		speed_cntl = RREG32_PCIE_PORT(ixPCIE_LC_SPEED_CNTL);</div><div class='add'>+		if ((speed_cntl &amp; PCIE_LC_SPEED_CNTL__LC_INITIATE_LINK_SPEED_CHANGE_MASK) == 0)</div><div class='ctx'> 			break;</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2418,121 +2433,121 @@ static void si_program_aspm(struct amdgpu_device *adev)</div><div class='ctx'> 	if (!amdgpu_device_should_use_aspm(adev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	orig = data = RREG32_PCIE_PORT(PCIE_LC_N_FTS_CNTL);</div><div class='del'>-	data &amp;= ~LC_XMIT_N_FTS_MASK;</div><div class='del'>-	data |= LC_XMIT_N_FTS(0x24) | LC_XMIT_N_FTS_OVERRIDE_EN;</div><div class='add'>+	orig = data = RREG32_PCIE_PORT(ixPCIE_LC_N_FTS_CNTL);</div><div class='add'>+	data &amp;= ~PCIE_LC_N_FTS_CNTL__LC_XMIT_N_FTS_MASK;</div><div class='add'>+	data |= (0x24 &lt;&lt; PCIE_LC_N_FTS_CNTL__LC_XMIT_N_FTS__SHIFT) | PCIE_LC_N_FTS_CNTL__LC_XMIT_N_FTS_OVERRIDE_EN_MASK;</div><div class='ctx'> 	if (orig != data)</div><div class='del'>-		WREG32_PCIE_PORT(PCIE_LC_N_FTS_CNTL, data);</div><div class='add'>+		WREG32_PCIE_PORT(ixPCIE_LC_N_FTS_CNTL, data);</div><div class='ctx'> </div><div class='del'>-	orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL3);</div><div class='del'>-	data |= LC_GO_TO_RECOVERY;</div><div class='add'>+	orig = data = RREG32_PCIE_PORT(ixPCIE_LC_CNTL3);</div><div class='add'>+	data |= PCIE_LC_CNTL3__LC_GO_TO_RECOVERY_MASK;</div><div class='ctx'> 	if (orig != data)</div><div class='del'>-		WREG32_PCIE_PORT(PCIE_LC_CNTL3, data);</div><div class='add'>+		WREG32_PCIE_PORT(ixPCIE_LC_CNTL3, data);</div><div class='ctx'> </div><div class='del'>-	orig = data = RREG32_PCIE(PCIE_P_CNTL);</div><div class='del'>-	data |= P_IGNORE_EDB_ERR;</div><div class='add'>+	orig = data = RREG32_PCIE(ixPCIE_P_CNTL);</div><div class='add'>+	data |= PCIE_P_CNTL__P_IGNORE_EDB_ERR_MASK;</div><div class='ctx'> 	if (orig != data)</div><div class='del'>-		WREG32_PCIE(PCIE_P_CNTL, data);</div><div class='add'>+		WREG32_PCIE(ixPCIE_P_CNTL, data);</div><div class='ctx'> </div><div class='del'>-	orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL);</div><div class='del'>-	data &amp;= ~(LC_L0S_INACTIVITY_MASK | LC_L1_INACTIVITY_MASK);</div><div class='del'>-	data |= LC_PMI_TO_L1_DIS;</div><div class='add'>+	orig = data = RREG32_PCIE_PORT(ixPCIE_LC_CNTL);</div><div class='add'>+	data &amp;= ~(PCIE_LC_CNTL__LC_L0S_INACTIVITY_MASK | PCIE_LC_CNTL__LC_L1_INACTIVITY_MASK);</div><div class='add'>+	data |= PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK;</div><div class='ctx'> 	if (!disable_l0s)</div><div class='del'>-		data |= LC_L0S_INACTIVITY(7);</div><div class='add'>+		data |= (7 &lt;&lt; PCIE_LC_CNTL__LC_L0S_INACTIVITY__SHIFT);</div><div class='ctx'> </div><div class='ctx'> 	if (!disable_l1) {</div><div class='del'>-		data |= LC_L1_INACTIVITY(7);</div><div class='del'>-		data &amp;= ~LC_PMI_TO_L1_DIS;</div><div class='add'>+		data |= (7 &lt;&lt; PCIE_LC_CNTL__LC_L1_INACTIVITY__SHIFT);</div><div class='add'>+		data &amp;= ~PCIE_LC_CNTL__LC_PMI_TO_L1_DIS_MASK;</div><div class='ctx'> 		if (orig != data)</div><div class='del'>-			WREG32_PCIE_PORT(PCIE_LC_CNTL, data);</div><div class='add'>+			WREG32_PCIE_PORT(ixPCIE_LC_CNTL, data);</div><div class='ctx'> </div><div class='ctx'> 		if (!disable_plloff_in_l1) {</div><div class='ctx'> 			bool clk_req_support;</div><div class='ctx'> </div><div class='del'>-			orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0);</div><div class='del'>-			data &amp;= ~(PLL_POWER_STATE_IN_OFF_0_MASK | PLL_POWER_STATE_IN_TXS2_0_MASK);</div><div class='del'>-			data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7);</div><div class='add'>+			orig = data = si_pif_phy0_rreg(adev,ixPB0_PIF_PWRDOWN_0);</div><div class='add'>+			data &amp;= ~(PB0_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_OFF_0_MASK | PB0_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_TXS2_0_MASK);</div><div class='add'>+			data |= (7 &lt;&lt; PB0_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_OFF_0__SHIFT) | (7 &lt;&lt; PB0_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_TXS2_0__SHIFT);</div><div class='ctx'> 			if (orig != data)</div><div class='del'>-				si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_0, data);</div><div class='add'>+				si_pif_phy0_wreg(adev,ixPB0_PIF_PWRDOWN_0, data);</div><div class='ctx'> </div><div class='del'>-			orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_1);</div><div class='del'>-			data &amp;= ~(PLL_POWER_STATE_IN_OFF_1_MASK | PLL_POWER_STATE_IN_TXS2_1_MASK);</div><div class='del'>-			data |= PLL_POWER_STATE_IN_OFF_1(7) | PLL_POWER_STATE_IN_TXS2_1(7);</div><div class='add'>+			orig = data = si_pif_phy0_rreg(adev,ixPB0_PIF_PWRDOWN_1);</div><div class='add'>+			data &amp;= ~(PB0_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_OFF_1_MASK | PB0_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_TXS2_1_MASK);</div><div class='add'>+			data |= (7 &lt;&lt; PB0_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_OFF_1__SHIFT) | (7 &lt;&lt; PB0_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_TXS2_1__SHIFT);</div><div class='ctx'> 			if (orig != data)</div><div class='del'>-				si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_1, data);</div><div class='add'>+				si_pif_phy0_wreg(adev,ixPB0_PIF_PWRDOWN_1, data);</div><div class='ctx'> </div><div class='del'>-			orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_0);</div><div class='del'>-			data &amp;= ~(PLL_POWER_STATE_IN_OFF_0_MASK | PLL_POWER_STATE_IN_TXS2_0_MASK);</div><div class='del'>-			data |= PLL_POWER_STATE_IN_OFF_0(7) | PLL_POWER_STATE_IN_TXS2_0(7);</div><div class='add'>+			orig = data = si_pif_phy1_rreg(adev,ixPB1_PIF_PWRDOWN_0);</div><div class='add'>+			data &amp;= ~(PB1_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_OFF_0_MASK | PB1_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_TXS2_0_MASK);</div><div class='add'>+			data |= (7 &lt;&lt; PB1_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_OFF_0__SHIFT) | (7 &lt;&lt; PB1_PIF_PWRDOWN_0__PLL_POWER_STATE_IN_TXS2_0__SHIFT);</div><div class='ctx'> 			if (orig != data)</div><div class='del'>-				si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_0, data);</div><div class='add'>+				si_pif_phy1_wreg(adev,ixPB1_PIF_PWRDOWN_0, data);</div><div class='ctx'> </div><div class='del'>-			orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_1);</div><div class='del'>-			data &amp;= ~(PLL_POWER_STATE_IN_OFF_1_MASK | PLL_POWER_STATE_IN_TXS2_1_MASK);</div><div class='del'>-			data |= PLL_POWER_STATE_IN_OFF_1(7) | PLL_POWER_STATE_IN_TXS2_1(7);</div><div class='add'>+			orig = data = si_pif_phy1_rreg(adev,ixPB1_PIF_PWRDOWN_1);</div><div class='add'>+			data &amp;= ~(PB1_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_OFF_1_MASK | PB1_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_TXS2_1_MASK);</div><div class='add'>+			data |= (7 &lt;&lt; PB1_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_OFF_1__SHIFT) | (7 &lt;&lt; PB1_PIF_PWRDOWN_1__PLL_POWER_STATE_IN_TXS2_1__SHIFT);</div><div class='ctx'> 			if (orig != data)</div><div class='del'>-				si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_1, data);</div><div class='add'>+				si_pif_phy1_wreg(adev,ixPB1_PIF_PWRDOWN_1, data);</div><div class='ctx'> </div><div class='ctx'> 			if ((adev-&gt;asic_type != CHIP_OLAND) &amp;&amp; (adev-&gt;asic_type != CHIP_HAINAN)) {</div><div class='del'>-				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_0_MASK;</div><div class='add'>+				orig = data = si_pif_phy0_rreg(adev,ixPB0_PIF_PWRDOWN_0);</div><div class='add'>+				data &amp;= ~PB0_PIF_PWRDOWN_0__PLL_RAMP_UP_TIME_0_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_0, data);</div><div class='add'>+					si_pif_phy0_wreg(adev,ixPB0_PIF_PWRDOWN_0, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_1);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_1_MASK;</div><div class='add'>+				orig = data = si_pif_phy0_rreg(adev,ixPB0_PIF_PWRDOWN_1);</div><div class='add'>+				data &amp;= ~PB0_PIF_PWRDOWN_1__PLL_RAMP_UP_TIME_1_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_1, data);</div><div class='add'>+					si_pif_phy0_wreg(adev,ixPB0_PIF_PWRDOWN_1, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_2);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_2_MASK;</div><div class='add'>+				orig = data = si_pif_phy0_rreg(adev,ixPB0_PIF_PWRDOWN_2);</div><div class='add'>+				data &amp;= ~PB0_PIF_PWRDOWN_2__PLL_RAMP_UP_TIME_2_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_2, data);</div><div class='add'>+					si_pif_phy0_wreg(adev,ixPB0_PIF_PWRDOWN_2, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_3);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_3_MASK;</div><div class='add'>+				orig = data = si_pif_phy0_rreg(adev,ixPB0_PIF_PWRDOWN_3);</div><div class='add'>+				data &amp;= ~PB0_PIF_PWRDOWN_3__PLL_RAMP_UP_TIME_3_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy0_wreg(adev,PB0_PIF_PWRDOWN_3, data);</div><div class='add'>+					si_pif_phy0_wreg(adev,ixPB0_PIF_PWRDOWN_3, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_0);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_0_MASK;</div><div class='add'>+				orig = data = si_pif_phy1_rreg(adev,ixPB1_PIF_PWRDOWN_0);</div><div class='add'>+				data &amp;= ~PB1_PIF_PWRDOWN_0__PLL_RAMP_UP_TIME_0_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_0, data);</div><div class='add'>+					si_pif_phy1_wreg(adev,ixPB1_PIF_PWRDOWN_0, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_1);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_1_MASK;</div><div class='add'>+				orig = data = si_pif_phy1_rreg(adev,ixPB1_PIF_PWRDOWN_1);</div><div class='add'>+				data &amp;= ~PB1_PIF_PWRDOWN_1__PLL_RAMP_UP_TIME_1_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_1, data);</div><div class='add'>+					si_pif_phy1_wreg(adev,ixPB1_PIF_PWRDOWN_1, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_2);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_2_MASK;</div><div class='add'>+				orig = data = si_pif_phy1_rreg(adev,ixPB1_PIF_PWRDOWN_2);</div><div class='add'>+				data &amp;= ~PB1_PIF_PWRDOWN_2__PLL_RAMP_UP_TIME_2_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_2, data);</div><div class='add'>+					si_pif_phy1_wreg(adev,ixPB1_PIF_PWRDOWN_2, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_3);</div><div class='del'>-				data &amp;= ~PLL_RAMP_UP_TIME_3_MASK;</div><div class='add'>+				orig = data = si_pif_phy1_rreg(adev,ixPB1_PIF_PWRDOWN_3);</div><div class='add'>+				data &amp;= ~PB1_PIF_PWRDOWN_3__PLL_RAMP_UP_TIME_3_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_3, data);</div><div class='add'>+					si_pif_phy1_wreg(adev,ixPB1_PIF_PWRDOWN_3, data);</div><div class='ctx'> 			}</div><div class='del'>-			orig = data = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);</div><div class='del'>-			data &amp;= ~LC_DYN_LANES_PWR_STATE_MASK;</div><div class='del'>-			data |= LC_DYN_LANES_PWR_STATE(3);</div><div class='add'>+			orig = data = RREG32_PCIE_PORT(ixPCIE_LC_LINK_WIDTH_CNTL);</div><div class='add'>+			data &amp;= ~PCIE_LC_LINK_WIDTH_CNTL__LC_DYN_LANES_PWR_STATE_MASK;</div><div class='add'>+			data |= (3 &lt;&lt; PCIE_LC_LINK_WIDTH_CNTL__LC_DYN_LANES_PWR_STATE__SHIFT);</div><div class='ctx'> 			if (orig != data)</div><div class='del'>-				WREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL, data);</div><div class='add'>+				WREG32_PCIE_PORT(ixPCIE_LC_LINK_WIDTH_CNTL, data);</div><div class='ctx'> </div><div class='del'>-			orig = data = si_pif_phy0_rreg(adev,PB0_PIF_CNTL);</div><div class='del'>-			data &amp;= ~LS2_EXIT_TIME_MASK;</div><div class='add'>+			orig = data = si_pif_phy0_rreg(adev,ixPB0_PIF_CNTL);</div><div class='add'>+			data &amp;= ~PB0_PIF_CNTL__LS2_EXIT_TIME_MASK;</div><div class='ctx'> 			if ((adev-&gt;asic_type == CHIP_OLAND) || (adev-&gt;asic_type == CHIP_HAINAN))</div><div class='del'>-				data |= LS2_EXIT_TIME(5);</div><div class='add'>+				data |= (5 &lt;&lt; PB0_PIF_CNTL__LS2_EXIT_TIME__SHIFT);</div><div class='ctx'> 			if (orig != data)</div><div class='del'>-				si_pif_phy0_wreg(adev,PB0_PIF_CNTL, data);</div><div class='add'>+				si_pif_phy0_wreg(adev,ixPB0_PIF_CNTL, data);</div><div class='ctx'> </div><div class='del'>-			orig = data = si_pif_phy1_rreg(adev,PB1_PIF_CNTL);</div><div class='del'>-			data &amp;= ~LS2_EXIT_TIME_MASK;</div><div class='add'>+			orig = data = si_pif_phy1_rreg(adev,ixPB1_PIF_CNTL);</div><div class='add'>+			data &amp;= ~PB1_PIF_CNTL__LS2_EXIT_TIME_MASK;</div><div class='ctx'> 			if ((adev-&gt;asic_type == CHIP_OLAND) || (adev-&gt;asic_type == CHIP_HAINAN))</div><div class='del'>-				data |= LS2_EXIT_TIME(5);</div><div class='add'>+				data |= (5 &lt;&lt; PB1_PIF_CNTL__LS2_EXIT_TIME__SHIFT);</div><div class='ctx'> 			if (orig != data)</div><div class='del'>-				si_pif_phy1_wreg(adev,PB1_PIF_CNTL, data);</div><div class='add'>+				si_pif_phy1_wreg(adev,ixPB1_PIF_CNTL, data);</div><div class='ctx'> </div><div class='ctx'> 			if (!disable_clkreq &amp;&amp;</div><div class='ctx'> 			    !pci_is_root_bus(adev-&gt;pdev-&gt;bus)) {</div><div class='hunk'>@@ -2548,64 +2563,64 @@ static void si_program_aspm(struct amdgpu_device *adev)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (clk_req_support) {</div><div class='del'>-				orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL2);</div><div class='del'>-				data |= LC_ALLOW_PDWN_IN_L1 | LC_ALLOW_PDWN_IN_L23;</div><div class='add'>+				orig = data = RREG32_PCIE_PORT(ixPCIE_LC_CNTL2);</div><div class='add'>+				data |= PCIE_LC_CNTL2__LC_ALLOW_PDWN_IN_L1_MASK | PCIE_LC_CNTL2__LC_ALLOW_PDWN_IN_L23_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32_PCIE_PORT(PCIE_LC_CNTL2, data);</div><div class='add'>+					WREG32_PCIE_PORT(ixPCIE_LC_CNTL2, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = RREG32(THM_CLK_CNTL);</div><div class='del'>-				data &amp;= ~(CMON_CLK_SEL_MASK | TMON_CLK_SEL_MASK);</div><div class='del'>-				data |= CMON_CLK_SEL(1) | TMON_CLK_SEL(1);</div><div class='add'>+				orig = data = RREG32(mmTHM_CLK_CNTL);</div><div class='add'>+				data &amp;= ~(THM_CLK_CNTL__CMON_CLK_SEL_MASK | THM_CLK_CNTL__TMON_CLK_SEL_MASK);</div><div class='add'>+				data |= (1 &lt;&lt; THM_CLK_CNTL__CMON_CLK_SEL__SHIFT) | (1 &lt;&lt; THM_CLK_CNTL__TMON_CLK_SEL__SHIFT);</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32(THM_CLK_CNTL, data);</div><div class='add'>+					WREG32(mmTHM_CLK_CNTL, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = RREG32(MISC_CLK_CNTL);</div><div class='del'>-				data &amp;= ~(DEEP_SLEEP_CLK_SEL_MASK | ZCLK_SEL_MASK);</div><div class='del'>-				data |= DEEP_SLEEP_CLK_SEL(1) | ZCLK_SEL(1);</div><div class='add'>+				orig = data = RREG32(mmMISC_CLK_CNTL);</div><div class='add'>+				data &amp;= ~(MISC_CLK_CNTL__DEEP_SLEEP_CLK_SEL_MASK | MISC_CLK_CNTL__ZCLK_SEL_MASK);</div><div class='add'>+				data |= (1 &lt;&lt; MISC_CLK_CNTL__DEEP_SLEEP_CLK_SEL__SHIFT) | (1 &lt;&lt; MISC_CLK_CNTL__ZCLK_SEL__SHIFT);</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32(MISC_CLK_CNTL, data);</div><div class='add'>+					WREG32(mmMISC_CLK_CNTL, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = RREG32(CG_CLKPIN_CNTL);</div><div class='del'>-				data &amp;= ~BCLK_AS_XCLK;</div><div class='add'>+				orig = data = RREG32(mmCG_CLKPIN_CNTL);</div><div class='add'>+				data &amp;= ~CG_CLKPIN_CNTL__BCLK_AS_XCLK_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32(CG_CLKPIN_CNTL, data);</div><div class='add'>+					WREG32(mmCG_CLKPIN_CNTL, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = RREG32(CG_CLKPIN_CNTL_2);</div><div class='del'>-				data &amp;= ~FORCE_BIF_REFCLK_EN;</div><div class='add'>+				orig = data = RREG32(mmCG_CLKPIN_CNTL_2);</div><div class='add'>+				data &amp;= ~CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32(CG_CLKPIN_CNTL_2, data);</div><div class='add'>+					WREG32(mmCG_CLKPIN_CNTL_2, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = RREG32(MPLL_BYPASSCLK_SEL);</div><div class='del'>-				data &amp;= ~MPLL_CLKOUT_SEL_MASK;</div><div class='del'>-				data |= MPLL_CLKOUT_SEL(4);</div><div class='add'>+				orig = data = RREG32(mmMPLL_BYPASSCLK_SEL);</div><div class='add'>+				data &amp;= ~MPLL_BYPASSCLK_SEL__MPLL_CLKOUT_SEL_MASK;</div><div class='add'>+				data |= 4 &lt;&lt; MPLL_BYPASSCLK_SEL__MPLL_CLKOUT_SEL__SHIFT;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32(MPLL_BYPASSCLK_SEL, data);</div><div class='add'>+					WREG32(mmMPLL_BYPASSCLK_SEL, data);</div><div class='ctx'> </div><div class='del'>-				orig = data = RREG32(SPLL_CNTL_MODE);</div><div class='del'>-				data &amp;= ~SPLL_REFCLK_SEL_MASK;</div><div class='add'>+				orig = data = RREG32(mmSPLL_CNTL_MODE);</div><div class='add'>+				data &amp;= ~SPLL_CNTL_MODE__SPLL_REFCLK_SEL_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32(SPLL_CNTL_MODE, data);</div><div class='add'>+					WREG32(mmSPLL_CNTL_MODE, data);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (orig != data)</div><div class='del'>-			WREG32_PCIE_PORT(PCIE_LC_CNTL, data);</div><div class='add'>+			WREG32_PCIE_PORT(ixPCIE_LC_CNTL, data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	orig = data = RREG32_PCIE(PCIE_CNTL2);</div><div class='del'>-	data |= SLV_MEM_LS_EN | MST_MEM_LS_EN | REPLAY_MEM_LS_EN;</div><div class='add'>+	orig = data = RREG32_PCIE(ixPCIE_CNTL2);</div><div class='add'>+	data |= PCIE_CNTL2__SLV_MEM_LS_EN_MASK | PCIE_CNTL2__MST_MEM_LS_EN_MASK | PCIE_CNTL2__REPLAY_MEM_LS_EN_MASK;</div><div class='ctx'> 	if (orig != data)</div><div class='del'>-		WREG32_PCIE(PCIE_CNTL2, data);</div><div class='add'>+		WREG32_PCIE(ixPCIE_CNTL2, data);</div><div class='ctx'> </div><div class='ctx'> 	if (!disable_l0s) {</div><div class='del'>-		data = RREG32_PCIE_PORT(PCIE_LC_N_FTS_CNTL);</div><div class='del'>-		if((data &amp; LC_N_FTS_MASK) == LC_N_FTS_MASK) {</div><div class='del'>-			data = RREG32_PCIE(PCIE_LC_STATUS1);</div><div class='del'>-			if ((data &amp; LC_REVERSE_XMIT) &amp;&amp; (data &amp; LC_REVERSE_RCVR)) {</div><div class='del'>-				orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL);</div><div class='del'>-				data &amp;= ~LC_L0S_INACTIVITY_MASK;</div><div class='add'>+		data = RREG32_PCIE_PORT(ixPCIE_LC_N_FTS_CNTL);</div><div class='add'>+		if((data &amp; PCIE_LC_N_FTS_CNTL__LC_N_FTS_MASK) == PCIE_LC_N_FTS_CNTL__LC_N_FTS_MASK) {</div><div class='add'>+			data = RREG32_PCIE(ixPCIE_LC_STATUS1);</div><div class='add'>+			if ((data &amp; PCIE_LC_STATUS1__LC_REVERSE_XMIT_MASK) &amp;&amp; (data &amp; PCIE_LC_STATUS1__LC_REVERSE_RCVR_MASK)) {</div><div class='add'>+				orig = data = RREG32_PCIE_PORT(ixPCIE_LC_CNTL);</div><div class='add'>+				data &amp;= ~PCIE_LC_CNTL__LC_L0S_INACTIVITY_MASK;</div><div class='ctx'> 				if (orig != data)</div><div class='del'>-					WREG32_PCIE_PORT(PCIE_LC_CNTL, data);</div><div class='add'>+					WREG32_PCIE_PORT(ixPCIE_LC_CNTL, data);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c<br/>index e2089c8da71b..7f18e4875287 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_dma.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si_dma.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_dma.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/si_dma.c</a></div><div class='hunk'>@@ -27,6 +27,8 @@</div><div class='ctx'> #include "si.h"</div><div class='ctx'> #include "sid.h"</div><div class='ctx'> </div><div class='add'>+#include "oss/oss_1_0_d.h"</div><div class='add'>+#include "oss/oss_1_0_sh_mask.h"</div><div class='ctx'> const u32 sdma_offsets[SDMA_MAX_INSTANCE] =</div><div class='ctx'> {</div><div class='ctx'> 	DMA0_REGISTER_OFFSET,</div><div class='hunk'>@@ -38,17 +40,31 @@ static void si_dma_set_buffer_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void si_dma_set_vm_pte_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void si_dma_set_irq_funcs(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * si_dma_ring_get_rptr - get the current read pointer</div><div class='add'>+ *</div><div class='add'>+ * @ring: amdgpu ring pointer</div><div class='add'>+ *</div><div class='add'>+ * Get the current rptr from the hardware (SI).</div><div class='add'>+ */</div><div class='ctx'> static uint64_t si_dma_ring_get_rptr(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	return *ring-&gt;rptr_cpu_addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * si_dma_ring_get_wptr - get the current write pointer</div><div class='add'>+ *</div><div class='add'>+ * @ring: amdgpu ring pointer</div><div class='add'>+ *</div><div class='add'>+ * Get the current wptr from the hardware (SI).</div><div class='add'>+ */</div><div class='ctx'> static uint64_t si_dma_ring_get_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	u32 me = (ring == &amp;adev-&gt;sdma.instance[0].ring) ? 0 : 1;</div><div class='ctx'> </div><div class='del'>-	return (RREG32(DMA_RB_WPTR + sdma_offsets[me]) &amp; 0x3fffc) &gt;&gt; 2;</div><div class='add'>+	return (RREG32(mmDMA_GFX_RB_WPTR + sdma_offsets[me]) &amp; 0x3fffc) &gt;&gt; 2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void si_dma_ring_set_wptr(struct amdgpu_ring *ring)</div><div class='hunk'>@@ -56,7 +72,7 @@ static void si_dma_ring_set_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> 	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='ctx'> 	u32 me = (ring == &amp;adev-&gt;sdma.instance[0].ring) ? 0 : 1;</div><div class='ctx'> </div><div class='del'>-	WREG32(DMA_RB_WPTR + sdma_offsets[me], (ring-&gt;wptr &lt;&lt; 2) &amp; 0x3fffc);</div><div class='add'>+	WREG32(mmDMA_GFX_RB_WPTR + sdma_offsets[me], (ring-&gt;wptr &lt;&lt; 2) &amp; 0x3fffc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void si_dma_ring_emit_ib(struct amdgpu_ring *ring,</div><div class='hunk'>@@ -117,9 +133,9 @@ static void si_dma_stop(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='ctx'> 		/* dma0 */</div><div class='del'>-		rb_cntl = RREG32(DMA_RB_CNTL + sdma_offsets[i]);</div><div class='del'>-		rb_cntl &amp;= ~DMA_RB_ENABLE;</div><div class='del'>-		WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl);</div><div class='add'>+		rb_cntl = RREG32(mmDMA_GFX_RB_CNTL + sdma_offsets[i]);</div><div class='add'>+		rb_cntl &amp;= ~DMA_GFX_RB_CNTL__RB_ENABLE_MASK;</div><div class='add'>+		WREG32(mmDMA_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -133,44 +149,44 @@ static int si_dma_start(struct amdgpu_device *adev)</div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='ctx'> 		ring = &amp;adev-&gt;sdma.instance[i].ring;</div><div class='ctx'> </div><div class='del'>-		WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);</div><div class='del'>-		WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);</div><div class='add'>+		WREG32(mmDMA_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);</div><div class='add'>+		WREG32(mmDMA_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);</div><div class='ctx'> </div><div class='ctx'> 		/* Set ring buffer size in dwords */</div><div class='ctx'> 		rb_bufsz = order_base_2(ring-&gt;ring_size / 4);</div><div class='ctx'> 		rb_cntl = rb_bufsz &lt;&lt; 1;</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		rb_cntl |= DMA_RB_SWAP_ENABLE | DMA_RPTR_WRITEBACK_SWAP_ENABLE;</div><div class='add'>+		rb_cntl |= DMA_GFX_RB_CNTL__RB_SWAP_ENABLE_MASK | DMA_GFX_RB_CNTL__RPTR_WRITEBACK_SWAP_ENABLE_MASK;</div><div class='ctx'> #endif</div><div class='del'>-		WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl);</div><div class='add'>+		WREG32(mmDMA_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);</div><div class='ctx'> </div><div class='ctx'> 		/* Initialize the ring buffer's read and write pointers */</div><div class='del'>-		WREG32(DMA_RB_RPTR + sdma_offsets[i], 0);</div><div class='del'>-		WREG32(DMA_RB_WPTR + sdma_offsets[i], 0);</div><div class='add'>+		WREG32(mmDMA_GFX_RB_RPTR + sdma_offsets[i], 0);</div><div class='add'>+		WREG32(mmDMA_GFX_RB_WPTR + sdma_offsets[i], 0);</div><div class='ctx'> </div><div class='ctx'> 		rptr_addr = ring-&gt;rptr_gpu_addr;</div><div class='ctx'> </div><div class='del'>-		WREG32(DMA_RB_RPTR_ADDR_LO + sdma_offsets[i], lower_32_bits(rptr_addr));</div><div class='del'>-		WREG32(DMA_RB_RPTR_ADDR_HI + sdma_offsets[i], upper_32_bits(rptr_addr) &amp; 0xFF);</div><div class='add'>+		WREG32(mmDMA_GFX_RB_RPTR_ADDR_LO + sdma_offsets[i], lower_32_bits(rptr_addr));</div><div class='add'>+		WREG32(mmDMA_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i], upper_32_bits(rptr_addr) &amp; 0xFF);</div><div class='ctx'> </div><div class='del'>-		rb_cntl |= DMA_RPTR_WRITEBACK_ENABLE;</div><div class='add'>+		rb_cntl |= DMA_GFX_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK;</div><div class='ctx'> </div><div class='del'>-		WREG32(DMA_RB_BASE + sdma_offsets[i], ring-&gt;gpu_addr &gt;&gt; 8);</div><div class='add'>+		WREG32(mmDMA_GFX_RB_BASE + sdma_offsets[i], ring-&gt;gpu_addr &gt;&gt; 8);</div><div class='ctx'> </div><div class='ctx'> 		/* enable DMA IBs */</div><div class='del'>-		ib_cntl = DMA_IB_ENABLE | CMD_VMID_FORCE;</div><div class='add'>+		ib_cntl = DMA_GFX_IB_CNTL__IB_ENABLE_MASK | DMA_GFX_IB_CNTL__CMD_VMID_FORCE_MASK;</div><div class='ctx'> #ifdef __BIG_ENDIAN</div><div class='del'>-		ib_cntl |= DMA_IB_SWAP_ENABLE;</div><div class='add'>+		ib_cntl |= DMA_GFX_IB_CNTL__IB_SWAP_ENABLE_MASK;</div><div class='ctx'> #endif</div><div class='del'>-		WREG32(DMA_IB_CNTL + sdma_offsets[i], ib_cntl);</div><div class='add'>+		WREG32(mmDMA_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);</div><div class='ctx'> </div><div class='del'>-		dma_cntl = RREG32(DMA_CNTL + sdma_offsets[i]);</div><div class='del'>-		dma_cntl &amp;= ~CTXEMPTY_INT_ENABLE;</div><div class='del'>-		WREG32(DMA_CNTL + sdma_offsets[i], dma_cntl);</div><div class='add'>+		dma_cntl = RREG32(mmDMA_CNTL + sdma_offsets[i]);</div><div class='add'>+		dma_cntl &amp;= ~DMA_CNTL__CTXEMPTY_INT_ENABLE_MASK;</div><div class='add'>+		WREG32(mmDMA_CNTL + sdma_offsets[i], dma_cntl);</div><div class='ctx'> </div><div class='ctx'> 		ring-&gt;wptr = 0;</div><div class='del'>-		WREG32(DMA_RB_WPTR + sdma_offsets[i], ring-&gt;wptr &lt;&lt; 2);</div><div class='del'>-		WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl | DMA_RB_ENABLE);</div><div class='add'>+		WREG32(mmDMA_GFX_RB_WPTR + sdma_offsets[i], ring-&gt;wptr &lt;&lt; 2);</div><div class='add'>+		WREG32(mmDMA_GFX_RB_CNTL + sdma_offsets[i], rb_cntl | DMA_GFX_RB_CNTL__RB_ENABLE_MASK);</div><div class='ctx'> </div><div class='ctx'> 		r = amdgpu_ring_test_helper(ring);</div><div class='ctx'> 		if (r)</div><div class='hunk'>@@ -461,7 +477,7 @@ static int si_dma_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;sdma.num_instances = 2;</div><div class='add'>+	adev-&gt;sdma.num_instances = SDMA_MAX_INSTANCE;</div><div class='ctx'> </div><div class='ctx'> 	si_dma_set_ring_funcs(adev);</div><div class='ctx'> 	si_dma_set_buffer_funcs(adev);</div><div class='hunk'>@@ -545,9 +561,9 @@ static bool si_dma_is_idle(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='del'>-	u32 tmp = RREG32(SRBM_STATUS2);</div><div class='add'>+	u32 tmp = RREG32(mmSRBM_STATUS2);</div><div class='ctx'> </div><div class='del'>-	if (tmp &amp; (DMA_BUSY_MASK | DMA1_BUSY_MASK))</div><div class='add'>+	if (tmp &amp; (SRBM_STATUS2__DMA_BUSY_MASK | SRBM_STATUS2__DMA1_BUSY_MASK))</div><div class='ctx'> 	    return false;</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -583,14 +599,14 @@ static int si_dma_set_trap_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 	case AMDGPU_SDMA_IRQ_INSTANCE0:</div><div class='ctx'> 		switch (state) {</div><div class='ctx'> 		case AMDGPU_IRQ_STATE_DISABLE:</div><div class='del'>-			sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);</div><div class='del'>-			sdma_cntl &amp;= ~TRAP_ENABLE;</div><div class='del'>-			WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);</div><div class='add'>+			sdma_cntl = RREG32(mmDMA_CNTL + DMA0_REGISTER_OFFSET);</div><div class='add'>+			sdma_cntl &amp;= ~DMA_CNTL__TRAP_ENABLE_MASK;</div><div class='add'>+			WREG32(mmDMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AMDGPU_IRQ_STATE_ENABLE:</div><div class='del'>-			sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);</div><div class='del'>-			sdma_cntl |= TRAP_ENABLE;</div><div class='del'>-			WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);</div><div class='add'>+			sdma_cntl = RREG32(mmDMA_CNTL + DMA0_REGISTER_OFFSET);</div><div class='add'>+			sdma_cntl |= DMA_CNTL__TRAP_ENABLE_MASK;</div><div class='add'>+			WREG32(mmDMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -599,14 +615,14 @@ static int si_dma_set_trap_irq_state(struct amdgpu_device *adev,</div><div class='ctx'> 	case AMDGPU_SDMA_IRQ_INSTANCE1:</div><div class='ctx'> 		switch (state) {</div><div class='ctx'> 		case AMDGPU_IRQ_STATE_DISABLE:</div><div class='del'>-			sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET);</div><div class='del'>-			sdma_cntl &amp;= ~TRAP_ENABLE;</div><div class='del'>-			WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);</div><div class='add'>+			sdma_cntl = RREG32(mmDMA_CNTL + DMA1_REGISTER_OFFSET);</div><div class='add'>+			sdma_cntl &amp;= ~DMA_CNTL__TRAP_ENABLE_MASK;</div><div class='add'>+			WREG32(mmDMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AMDGPU_IRQ_STATE_ENABLE:</div><div class='del'>-			sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET);</div><div class='del'>-			sdma_cntl |= TRAP_ENABLE;</div><div class='del'>-			WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);</div><div class='add'>+			sdma_cntl = RREG32(mmDMA_CNTL + DMA1_REGISTER_OFFSET);</div><div class='add'>+			sdma_cntl |= DMA_CNTL__TRAP_ENABLE_MASK;</div><div class='add'>+			WREG32(mmDMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -645,11 +661,11 @@ static int si_dma_set_clockgating_state(struct amdgpu_ip_block *ip_block,</div><div class='ctx'> 				offset = DMA0_REGISTER_OFFSET;</div><div class='ctx'> 			else</div><div class='ctx'> 				offset = DMA1_REGISTER_OFFSET;</div><div class='del'>-			orig = data = RREG32(DMA_POWER_CNTL + offset);</div><div class='del'>-			data &amp;= ~MEM_POWER_OVERRIDE;</div><div class='add'>+			orig = data = RREG32(mmDMA_POWER_CNTL + offset);</div><div class='add'>+			data &amp;= ~DMA_POWER_CNTL__MEM_POWER_OVERRIDE_MASK;</div><div class='ctx'> 			if (data != orig)</div><div class='del'>-				WREG32(DMA_POWER_CNTL + offset, data);</div><div class='del'>-			WREG32(DMA_CLK_CTRL + offset, 0x00000100);</div><div class='add'>+				WREG32(mmDMA_POWER_CNTL + offset, data);</div><div class='add'>+			WREG32(mmDMA_CLK_CTRL + offset, 0x00000100);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;sdma.num_instances; i++) {</div><div class='hunk'>@@ -657,15 +673,15 @@ static int si_dma_set_clockgating_state(struct amdgpu_ip_block *ip_block,</div><div class='ctx'> 				offset = DMA0_REGISTER_OFFSET;</div><div class='ctx'> 			else</div><div class='ctx'> 				offset = DMA1_REGISTER_OFFSET;</div><div class='del'>-			orig = data = RREG32(DMA_POWER_CNTL + offset);</div><div class='del'>-			data |= MEM_POWER_OVERRIDE;</div><div class='add'>+			orig = data = RREG32(mmDMA_POWER_CNTL + offset);</div><div class='add'>+			data |= DMA_POWER_CNTL__MEM_POWER_OVERRIDE_MASK;</div><div class='ctx'> 			if (data != orig)</div><div class='del'>-				WREG32(DMA_POWER_CNTL + offset, data);</div><div class='add'>+				WREG32(mmDMA_POWER_CNTL + offset, data);</div><div class='ctx'> </div><div class='del'>-			orig = data = RREG32(DMA_CLK_CTRL + offset);</div><div class='add'>+			orig = data = RREG32(mmDMA_CLK_CTRL + offset);</div><div class='ctx'> 			data = 0xff000000;</div><div class='ctx'> 			if (data != orig)</div><div class='del'>-				WREG32(DMA_CLK_CTRL + offset, data);</div><div class='add'>+				WREG32(mmDMA_CLK_CTRL + offset, data);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -679,11 +695,11 @@ static int si_dma_set_powergating_state(struct amdgpu_ip_block *ip_block,</div><div class='ctx'> </div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='del'>-	WREG32(DMA_PGFSM_WRITE,  0x00002000);</div><div class='del'>-	WREG32(DMA_PGFSM_CONFIG, 0x100010ff);</div><div class='add'>+	WREG32(mmDMA_PGFSM_WRITE,  0x00002000);</div><div class='add'>+	WREG32(mmDMA_PGFSM_CONFIG, 0x100010ff);</div><div class='ctx'> </div><div class='ctx'> 	for (tmp = 0; tmp &lt; 5; tmp++)</div><div class='del'>-		WREG32(DMA_PGFSM_WRITE, 0);</div><div class='add'>+		WREG32(mmDMA_PGFSM_WRITE, 0);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/si_enums.h b/drivers/gpu/drm/amd/amdgpu/si_enums.h<br/>index d656ef1fa6e1..6da65778292b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_enums.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si_enums.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_enums.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/si_enums.h</a></div><div class='hunk'>@@ -23,115 +23,15 @@</div><div class='ctx'> #ifndef SI_ENUMS_H</div><div class='ctx'> #define SI_ENUMS_H</div><div class='ctx'> </div><div class='del'>-#define VBLANK_INT_MASK                (1 &lt;&lt; 0)</div><div class='del'>-#define DC_HPDx_INT_EN                 (1 &lt;&lt; 16)</div><div class='del'>-#define VBLANK_ACK                     (1 &lt;&lt; 4)</div><div class='del'>-#define VLINE_ACK                      (1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define CURSOR_WIDTH 64</div><div class='del'>-#define CURSOR_HEIGHT 64</div><div class='del'>-</div><div class='del'>-#define VGA_VSTATUS_CNTL               0xFFFCFFFF</div><div class='ctx'> #define PRIORITY_MARK_MASK             0x7fff</div><div class='ctx'> #define PRIORITY_OFF                   (1 &lt;&lt; 16)</div><div class='ctx'> #define PRIORITY_ALWAYS_ON             (1 &lt;&lt; 20)</div><div class='del'>-#define INTERLEAVE_EN                  (1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define LATENCY_WATERMARK_MASK(x)      ((x) &lt;&lt; 16)</div><div class='del'>-#define DC_LB_MEMORY_CONFIG(x)         ((x) &lt;&lt; 20)</div><div class='del'>-#define ICON_DEGAMMA_MODE(x)           (((x) &amp; 0x3) &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define GRPH_ENDIAN_SWAP(x)            (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#define GRPH_ENDIAN_NONE               0</div><div class='del'>-#define GRPH_ENDIAN_8IN16              1</div><div class='del'>-#define GRPH_ENDIAN_8IN32              2</div><div class='del'>-#define GRPH_ENDIAN_8IN64              3</div><div class='del'>-#define GRPH_RED_CROSSBAR(x)           (((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-#define GRPH_RED_SEL_R                 0</div><div class='del'>-#define GRPH_RED_SEL_G                 1</div><div class='del'>-#define GRPH_RED_SEL_B                 2</div><div class='del'>-#define GRPH_RED_SEL_A                 3</div><div class='del'>-#define GRPH_GREEN_CROSSBAR(x)         (((x) &amp; 0x3) &lt;&lt; 6)</div><div class='del'>-#define GRPH_GREEN_SEL_G               0</div><div class='del'>-#define GRPH_GREEN_SEL_B               1</div><div class='del'>-#define GRPH_GREEN_SEL_A               2</div><div class='del'>-#define GRPH_GREEN_SEL_R               3</div><div class='del'>-#define GRPH_BLUE_CROSSBAR(x)          (((x) &amp; 0x3) &lt;&lt; 8)</div><div class='del'>-#define GRPH_BLUE_SEL_B                0</div><div class='del'>-#define GRPH_BLUE_SEL_A                1</div><div class='del'>-#define GRPH_BLUE_SEL_R                2</div><div class='del'>-#define GRPH_BLUE_SEL_G                3</div><div class='del'>-#define GRPH_ALPHA_CROSSBAR(x)         (((x) &amp; 0x3) &lt;&lt; 10)</div><div class='del'>-#define GRPH_ALPHA_SEL_A               0</div><div class='del'>-#define GRPH_ALPHA_SEL_R               1</div><div class='del'>-#define GRPH_ALPHA_SEL_G               2</div><div class='del'>-#define GRPH_ALPHA_SEL_B               3</div><div class='del'>-</div><div class='del'>-#define GRPH_DEPTH(x)                  (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#define GRPH_DEPTH_8BPP                0</div><div class='del'>-#define GRPH_DEPTH_16BPP               1</div><div class='del'>-#define GRPH_DEPTH_32BPP               2</div><div class='del'>-</div><div class='del'>-#define GRPH_FORMAT(x)                 (((x) &amp; 0x7) &lt;&lt; 8)</div><div class='del'>-#define GRPH_FORMAT_INDEXED            0</div><div class='del'>-#define GRPH_FORMAT_ARGB1555           0</div><div class='del'>-#define GRPH_FORMAT_ARGB565            1</div><div class='del'>-#define GRPH_FORMAT_ARGB4444           2</div><div class='del'>-#define GRPH_FORMAT_AI88               3</div><div class='del'>-#define GRPH_FORMAT_MONO16             4</div><div class='del'>-#define GRPH_FORMAT_BGRA5551           5</div><div class='del'>-#define GRPH_FORMAT_ARGB8888           0</div><div class='del'>-#define GRPH_FORMAT_ARGB2101010        1</div><div class='del'>-#define GRPH_FORMAT_32BPP_DIG          2</div><div class='del'>-#define GRPH_FORMAT_8B_ARGB2101010     3</div><div class='del'>-#define GRPH_FORMAT_BGRA1010102        4</div><div class='del'>-#define GRPH_FORMAT_8B_BGRA1010102     5</div><div class='del'>-#define GRPH_FORMAT_RGB111110          6</div><div class='del'>-#define GRPH_FORMAT_BGR101111          7</div><div class='del'>-</div><div class='del'>-#define GRPH_NUM_BANKS(x)              (((x) &amp; 0x3) &lt;&lt; 2)</div><div class='del'>-#define GRPH_ARRAY_MODE(x)             (((x) &amp; 0x7) &lt;&lt; 20)</div><div class='del'>-#define GRPH_ARRAY_LINEAR_GENERAL      0</div><div class='del'>-#define GRPH_ARRAY_LINEAR_ALIGNED      1</div><div class='del'>-#define GRPH_ARRAY_1D_TILED_THIN1      2</div><div class='del'>-#define GRPH_ARRAY_2D_TILED_THIN1      4</div><div class='del'>-#define GRPH_TILE_SPLIT(x)             (((x) &amp; 0x7) &lt;&lt; 13)</div><div class='del'>-#define GRPH_BANK_WIDTH(x)             (((x) &amp; 0x3) &lt;&lt; 6)</div><div class='del'>-#define GRPH_BANK_HEIGHT(x)            (((x) &amp; 0x3) &lt;&lt; 11)</div><div class='del'>-#define GRPH_MACRO_TILE_ASPECT(x)      (((x) &amp; 0x3) &lt;&lt; 18)</div><div class='del'>-#define GRPH_ARRAY_MODE(x)             (((x) &amp; 0x7) &lt;&lt; 20)</div><div class='del'>-#define GRPH_PIPE_CONFIG(x)                   (((x) &amp; 0x1f) &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define CURSOR_EN                      (1 &lt;&lt; 0)</div><div class='del'>-#define CURSOR_MODE(x)                 (((x) &amp; 0x3) &lt;&lt; 8)</div><div class='del'>-#define CURSOR_MONO                    0</div><div class='del'>-#define CURSOR_24_1                    1</div><div class='del'>-#define CURSOR_24_8_PRE_MULT           2</div><div class='del'>-#define CURSOR_24_8_UNPRE_MULT         3</div><div class='del'>-#define CURSOR_2X_MAGNIFY              (1 &lt;&lt; 16)</div><div class='del'>-#define CURSOR_FORCE_MC_ON             (1 &lt;&lt; 20)</div><div class='del'>-#define CURSOR_URGENT_CONTROL(x)       (((x) &amp; 0x7) &lt;&lt; 24)</div><div class='del'>-#define CURSOR_URGENT_ALWAYS           0</div><div class='del'>-#define CURSOR_URGENT_1_8              1</div><div class='del'>-#define CURSOR_URGENT_1_4              2</div><div class='del'>-#define CURSOR_URGENT_3_8              3</div><div class='del'>-#define CURSOR_URGENT_1_2              4</div><div class='del'>-#define CURSOR_UPDATE_PENDING          (1 &lt;&lt; 0)</div><div class='del'>-#define CURSOR_UPDATE_TAKEN            (1 &lt;&lt; 1)</div><div class='del'>-#define CURSOR_UPDATE_LOCK             (1 &lt;&lt; 16)</div><div class='del'>-#define CURSOR_DISABLE_MULTIPLE_UPDATE (1 &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define ES_AND_GS_AUTO       3</div><div class='del'>-#define RADEON_PACKET_TYPE3  3</div><div class='del'>-#define CE_PARTITION_BASE    3</div><div class='del'>-#define BUF_SWAP_32BIT       (2 &lt;&lt; 16)</div><div class='ctx'> </div><div class='ctx'> #define GFX_POWER_STATUS                           (1 &lt;&lt; 1)</div><div class='ctx'> #define GFX_CLOCK_STATUS                           (1 &lt;&lt; 2)</div><div class='ctx'> #define GFX_LS_STATUS                              (1 &lt;&lt; 3)</div><div class='del'>-#define RLC_BUSY_STATUS                            (1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='add'>+#define RLC_BUSY_STATUS                            (1 &lt;&lt; 0)</div><div class='ctx'> #define RLC_PUD(x)                               ((x) &lt;&lt; 0)</div><div class='ctx'> #define RLC_PUD_MASK                             (0xff &lt;&lt; 0)</div><div class='ctx'> #define RLC_PDD(x)                               ((x) &lt;&lt; 8)</div><div class='hunk'>@@ -140,140 +40,8 @@</div><div class='ctx'> #define RLC_TTPD_MASK                            (0xff &lt;&lt; 16)</div><div class='ctx'> #define RLC_MSD(x)                               ((x) &lt;&lt; 24)</div><div class='ctx'> #define RLC_MSD_MASK                             (0xff &lt;&lt; 24)</div><div class='del'>-#define WRITE_DATA_ENGINE_SEL(x) ((x) &lt;&lt; 30)</div><div class='del'>-#define WRITE_DATA_DST_SEL(x) ((x) &lt;&lt; 8)</div><div class='del'>-#define EVENT_TYPE(x) ((x) &lt;&lt; 0)</div><div class='del'>-#define EVENT_INDEX(x) ((x) &lt;&lt; 8)</div><div class='del'>-#define WAIT_REG_MEM_MEM_SPACE(x)               ((x) &lt;&lt; 4)</div><div class='del'>-#define WAIT_REG_MEM_FUNCTION(x)                ((x) &lt;&lt; 0)</div><div class='del'>-#define WAIT_REG_MEM_ENGINE(x)                  ((x) &lt;&lt; 8)</div><div class='ctx'> </div><div class='del'>-#define GFX6_NUM_GFX_RINGS     1</div><div class='del'>-#define GFX6_NUM_COMPUTE_RINGS 2</div><div class='ctx'> #define RLC_SAVE_AND_RESTORE_STARTING_OFFSET 0x90</div><div class='ctx'> #define RLC_CLEAR_STATE_DESCRIPTOR_OFFSET    0x3D</div><div class='ctx'> </div><div class='del'>-#define PACKET3(op, n)  ((RADEON_PACKET_TYPE3 &lt;&lt; 30) |                  \</div><div class='del'>-                         (((op) &amp; 0xFF) &lt;&lt; 8) |                         \</div><div class='del'>-                         ((n) &amp; 0x3FFF) &lt;&lt; 16)</div><div class='del'>-#define PACKET3_COMPUTE(op, n) (PACKET3(op, n) | 1 &lt;&lt; 1)</div><div class='del'>-#define	PACKET3_NOP					0x10</div><div class='del'>-#define	PACKET3_SET_BASE				0x11</div><div class='del'>-#define		PACKET3_BASE_INDEX(x)                  ((x) &lt;&lt; 0)</div><div class='del'>-#define	PACKET3_CLEAR_STATE				0x12</div><div class='del'>-#define	PACKET3_INDEX_BUFFER_SIZE			0x13</div><div class='del'>-#define	PACKET3_DISPATCH_DIRECT				0x15</div><div class='del'>-#define	PACKET3_DISPATCH_INDIRECT			0x16</div><div class='del'>-#define	PACKET3_ALLOC_GDS				0x1B</div><div class='del'>-#define	PACKET3_WRITE_GDS_RAM				0x1C</div><div class='del'>-#define	PACKET3_ATOMIC_GDS				0x1D</div><div class='del'>-#define	PACKET3_ATOMIC					0x1E</div><div class='del'>-#define	PACKET3_OCCLUSION_QUERY				0x1F</div><div class='del'>-#define	PACKET3_SET_PREDICATION				0x20</div><div class='del'>-#define	PACKET3_REG_RMW					0x21</div><div class='del'>-#define	PACKET3_COND_EXEC				0x22</div><div class='del'>-#define	PACKET3_PRED_EXEC				0x23</div><div class='del'>-#define	PACKET3_DRAW_INDIRECT				0x24</div><div class='del'>-#define	PACKET3_DRAW_INDEX_INDIRECT			0x25</div><div class='del'>-#define	PACKET3_INDEX_BASE				0x26</div><div class='del'>-#define	PACKET3_DRAW_INDEX_2				0x27</div><div class='del'>-#define	PACKET3_CONTEXT_CONTROL				0x28</div><div class='del'>-#define	PACKET3_INDEX_TYPE				0x2A</div><div class='del'>-#define	PACKET3_DRAW_INDIRECT_MULTI			0x2C</div><div class='del'>-#define	PACKET3_DRAW_INDEX_AUTO				0x2D</div><div class='del'>-#define	PACKET3_DRAW_INDEX_IMMD				0x2E</div><div class='del'>-#define	PACKET3_NUM_INSTANCES				0x2F</div><div class='del'>-#define	PACKET3_DRAW_INDEX_MULTI_AUTO			0x30</div><div class='del'>-#define	PACKET3_INDIRECT_BUFFER_CONST			0x31</div><div class='del'>-#define	PACKET3_INDIRECT_BUFFER				0x3F</div><div class='del'>-#define	PACKET3_STRMOUT_BUFFER_UPDATE			0x34</div><div class='del'>-#define	PACKET3_DRAW_INDEX_OFFSET_2			0x35</div><div class='del'>-#define	PACKET3_DRAW_INDEX_MULTI_ELEMENT		0x36</div><div class='del'>-#define	PACKET3_WRITE_DATA				0x37</div><div class='del'>-#define	PACKET3_DRAW_INDEX_INDIRECT_MULTI		0x38</div><div class='del'>-#define	PACKET3_MEM_SEMAPHORE				0x39</div><div class='del'>-#define	PACKET3_MPEG_INDEX				0x3A</div><div class='del'>-#define	PACKET3_COPY_DW					0x3B</div><div class='del'>-#define	PACKET3_WAIT_REG_MEM				0x3C</div><div class='del'>-#define	PACKET3_MEM_WRITE				0x3D</div><div class='del'>-#define	PACKET3_COPY_DATA				0x40</div><div class='del'>-#define	PACKET3_CP_DMA					0x41</div><div class='del'>-#              define PACKET3_CP_DMA_DST_SEL(x)    ((x) &lt;&lt; 20)</div><div class='del'>-#              define PACKET3_CP_DMA_ENGINE(x)     ((x) &lt;&lt; 27)</div><div class='del'>-#              define PACKET3_CP_DMA_SRC_SEL(x)    ((x) &lt;&lt; 29)</div><div class='del'>-#              define PACKET3_CP_DMA_CP_SYNC       (1 &lt;&lt; 31)</div><div class='del'>-#              define PACKET3_CP_DMA_DIS_WC        (1 &lt;&lt; 21)</div><div class='del'>-#              define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) &lt;&lt; 22)</div><div class='del'>-#              define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) &lt;&lt; 24)</div><div class='del'>-#              define PACKET3_CP_DMA_CMD_SAS       (1 &lt;&lt; 26)</div><div class='del'>-#              define PACKET3_CP_DMA_CMD_DAS       (1 &lt;&lt; 27)</div><div class='del'>-#              define PACKET3_CP_DMA_CMD_SAIC      (1 &lt;&lt; 28)</div><div class='del'>-#              define PACKET3_CP_DMA_CMD_DAIC      (1 &lt;&lt; 29)</div><div class='del'>-#              define PACKET3_CP_DMA_CMD_RAW_WAIT  (1 &lt;&lt; 30)</div><div class='del'>-#define	PACKET3_PFP_SYNC_ME				0x42</div><div class='del'>-#define	PACKET3_SURFACE_SYNC				0x43</div><div class='del'>-#              define PACKET3_DEST_BASE_0_ENA      (1 &lt;&lt; 0)</div><div class='del'>-#              define PACKET3_DEST_BASE_1_ENA      (1 &lt;&lt; 1)</div><div class='del'>-#              define PACKET3_CB0_DEST_BASE_ENA    (1 &lt;&lt; 6)</div><div class='del'>-#              define PACKET3_CB1_DEST_BASE_ENA    (1 &lt;&lt; 7)</div><div class='del'>-#              define PACKET3_CB2_DEST_BASE_ENA    (1 &lt;&lt; 8)</div><div class='del'>-#              define PACKET3_CB3_DEST_BASE_ENA    (1 &lt;&lt; 9)</div><div class='del'>-#              define PACKET3_CB4_DEST_BASE_ENA    (1 &lt;&lt; 10)</div><div class='del'>-#              define PACKET3_CB5_DEST_BASE_ENA    (1 &lt;&lt; 11)</div><div class='del'>-#              define PACKET3_CB6_DEST_BASE_ENA    (1 &lt;&lt; 12)</div><div class='del'>-#              define PACKET3_CB7_DEST_BASE_ENA    (1 &lt;&lt; 13)</div><div class='del'>-#              define PACKET3_DB_DEST_BASE_ENA     (1 &lt;&lt; 14)</div><div class='del'>-#              define PACKET3_DEST_BASE_2_ENA      (1 &lt;&lt; 19)</div><div class='del'>-#              define PACKET3_DEST_BASE_3_ENA      (1 &lt;&lt; 21)</div><div class='del'>-#              define PACKET3_TCL1_ACTION_ENA      (1 &lt;&lt; 22)</div><div class='del'>-#              define PACKET3_TC_ACTION_ENA        (1 &lt;&lt; 23)</div><div class='del'>-#              define PACKET3_CB_ACTION_ENA        (1 &lt;&lt; 25)</div><div class='del'>-#              define PACKET3_DB_ACTION_ENA        (1 &lt;&lt; 26)</div><div class='del'>-#              define PACKET3_SH_KCACHE_ACTION_ENA (1 &lt;&lt; 27)</div><div class='del'>-#              define PACKET3_SH_ICACHE_ACTION_ENA (1 &lt;&lt; 29)</div><div class='del'>-#define	PACKET3_ME_INITIALIZE				0x44</div><div class='del'>-#define		PACKET3_ME_INITIALIZE_DEVICE_ID(x) ((x) &lt;&lt; 16)</div><div class='del'>-#define	PACKET3_COND_WRITE				0x45</div><div class='del'>-#define	PACKET3_EVENT_WRITE				0x46</div><div class='del'>-#define	PACKET3_EVENT_WRITE_EOP				0x47</div><div class='del'>-#define	PACKET3_EVENT_WRITE_EOS				0x48</div><div class='del'>-#define	PACKET3_PREAMBLE_CNTL				0x4A</div><div class='del'>-#              define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE     (2 &lt;&lt; 28)</div><div class='del'>-#              define PACKET3_PREAMBLE_END_CLEAR_STATE       (3 &lt;&lt; 28)</div><div class='del'>-#define	PACKET3_ONE_REG_WRITE				0x57</div><div class='del'>-#define	PACKET3_LOAD_CONFIG_REG				0x5F</div><div class='del'>-#define	PACKET3_LOAD_CONTEXT_REG			0x60</div><div class='del'>-#define	PACKET3_LOAD_SH_REG				0x61</div><div class='del'>-#define	PACKET3_SET_CONFIG_REG				0x68</div><div class='del'>-#define		PACKET3_SET_CONFIG_REG_START			0x00002000</div><div class='del'>-#define		PACKET3_SET_CONFIG_REG_END			0x00002c00</div><div class='del'>-#define	PACKET3_SET_CONTEXT_REG				0x69</div><div class='del'>-#define		PACKET3_SET_CONTEXT_REG_START			0x000a000</div><div class='del'>-#define		PACKET3_SET_CONTEXT_REG_END			0x000a400</div><div class='del'>-#define	PACKET3_SET_CONTEXT_REG_INDIRECT		0x73</div><div class='del'>-#define	PACKET3_SET_RESOURCE_INDIRECT			0x74</div><div class='del'>-#define	PACKET3_SET_SH_REG				0x76</div><div class='del'>-#define		PACKET3_SET_SH_REG_START			0x00002c00</div><div class='del'>-#define		PACKET3_SET_SH_REG_END				0x00003000</div><div class='del'>-#define	PACKET3_SET_SH_REG_OFFSET			0x77</div><div class='del'>-#define	PACKET3_ME_WRITE				0x7A</div><div class='del'>-#define	PACKET3_SCRATCH_RAM_WRITE			0x7D</div><div class='del'>-#define	PACKET3_SCRATCH_RAM_READ			0x7E</div><div class='del'>-#define	PACKET3_CE_WRITE				0x7F</div><div class='del'>-#define	PACKET3_LOAD_CONST_RAM				0x80</div><div class='del'>-#define	PACKET3_WRITE_CONST_RAM				0x81</div><div class='del'>-#define	PACKET3_WRITE_CONST_RAM_OFFSET			0x82</div><div class='del'>-#define	PACKET3_DUMP_CONST_RAM				0x83</div><div class='del'>-#define	PACKET3_INCREMENT_CE_COUNTER			0x84</div><div class='del'>-#define	PACKET3_INCREMENT_DE_COUNTER			0x85</div><div class='del'>-#define	PACKET3_WAIT_ON_CE_COUNTER			0x86</div><div class='del'>-#define	PACKET3_WAIT_ON_DE_COUNTER			0x87</div><div class='del'>-#define	PACKET3_WAIT_ON_DE_COUNTER_DIFF			0x88</div><div class='del'>-#define	PACKET3_SET_CE_DE_COUNTERS			0x89</div><div class='del'>-#define	PACKET3_WAIT_ON_AVAIL_BUFFER			0x8A</div><div class='del'>-#define	PACKET3_SWITCH_BUFFER				0x8B</div><div class='del'>-#define PACKET3_SEM_WAIT_ON_SIGNAL    (0x1 &lt;&lt; 12)</div><div class='del'>-#define PACKET3_SEM_SEL_SIGNAL	    (0x6 &lt;&lt; 29)</div><div class='del'>-#define PACKET3_SEM_SEL_WAIT	    (0x7 &lt;&lt; 29)</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c b/drivers/gpu/drm/amd/amdgpu/si_ih.c<br/>index 5c38e1fb1dca..1df00f8a2406 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_ih.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/si_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/si_ih.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/si_ih.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include "amdgpu_ih.h"</div><div class='ctx'> #include "sid.h"</div><div class='ctx'> #include "si_ih.h"</div><div class='add'>+</div><div class='ctx'> #include "oss/oss_1_0_d.h"</div><div class='ctx'> #include "oss/oss_1_0_sh_mask.h"</div><div class='ctx'> </div><div class='hunk'>@@ -213,7 +214,7 @@ static int si_ih_resume(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> static bool si_ih_is_idle(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='del'>-	u32 tmp = RREG32(SRBM_STATUS);</div><div class='add'>+	u32 tmp = RREG32(mmSRBM_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	if (tmp &amp; SRBM_STATUS__IH_BUSY_MASK)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -239,23 +240,23 @@ static int si_ih_soft_reset(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> </div><div class='ctx'> 	u32 srbm_soft_reset = 0;</div><div class='del'>-	u32 tmp = RREG32(SRBM_STATUS);</div><div class='add'>+	u32 tmp = RREG32(mmSRBM_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	if (tmp &amp; SRBM_STATUS__IH_BUSY_MASK)</div><div class='ctx'> 		srbm_soft_reset |= SRBM_SOFT_RESET__SOFT_RESET_IH_MASK;</div><div class='ctx'> </div><div class='ctx'> 	if (srbm_soft_reset) {</div><div class='del'>-		tmp = RREG32(SRBM_SOFT_RESET);</div><div class='add'>+		tmp = RREG32(mmSRBM_SOFT_RESET);</div><div class='ctx'> 		tmp |= srbm_soft_reset;</div><div class='del'>-		dev_info(adev-&gt;dev, "SRBM_SOFT_RESET=0x%08X\n", tmp);</div><div class='del'>-		WREG32(SRBM_SOFT_RESET, tmp);</div><div class='del'>-		tmp = RREG32(SRBM_SOFT_RESET);</div><div class='add'>+		dev_info(adev-&gt;dev, "mmSRBM_SOFT_RESET=0x%08X\n", tmp);</div><div class='add'>+		WREG32(mmSRBM_SOFT_RESET, tmp);</div><div class='add'>+		tmp = RREG32(mmSRBM_SOFT_RESET);</div><div class='ctx'> </div><div class='ctx'> 		udelay(50);</div><div class='ctx'> </div><div class='ctx'> 		tmp &amp;= ~srbm_soft_reset;</div><div class='del'>-		WREG32(SRBM_SOFT_RESET, tmp);</div><div class='del'>-		tmp = RREG32(SRBM_SOFT_RESET);</div><div class='add'>+		WREG32(mmSRBM_SOFT_RESET, tmp);</div><div class='add'>+		tmp = RREG32(mmSRBM_SOFT_RESET);</div><div class='ctx'> </div><div class='ctx'> 		udelay(50);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/sid.h b/drivers/gpu/drm/amd/amdgpu/sid.h<br/>index cbf232f5235b..cbd4f8951cfa 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sid.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/sid.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/sid.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/sid.h</a></div><div class='hunk'>@@ -24,43 +24,12 @@</div><div class='ctx'> #ifndef SI_H</div><div class='ctx'> #define SI_H</div><div class='ctx'> </div><div class='del'>-#define TAHITI_RB_BITMAP_WIDTH_PER_SH  2</div><div class='del'>-</div><div class='del'>-#define SI_MAX_SH_GPRS		 	256</div><div class='del'>-#define SI_MAX_TEMP_GPRS         	16</div><div class='del'>-#define SI_MAX_SH_THREADS        	256</div><div class='del'>-#define SI_MAX_SH_STACK_ENTRIES  	4096</div><div class='del'>-#define SI_MAX_FRC_EOV_CNT       	16384</div><div class='del'>-#define SI_MAX_BACKENDS          	8</div><div class='del'>-#define SI_MAX_BACKENDS_MASK     	0xFF</div><div class='del'>-#define SI_MAX_BACKENDS_PER_SE_MASK     0x0F</div><div class='del'>-#define SI_MAX_SIMDS             	12</div><div class='del'>-#define SI_MAX_SIMDS_MASK        	0x0FFF</div><div class='del'>-#define SI_MAX_SIMDS_PER_SE_MASK        0x00FF</div><div class='del'>-#define SI_MAX_PIPES            	8</div><div class='del'>-#define SI_MAX_PIPES_MASK        	0xFF</div><div class='del'>-#define SI_MAX_PIPES_PER_SIMD_MASK      0x3F</div><div class='del'>-#define SI_MAX_LDS_NUM           	0xFFFF</div><div class='del'>-#define SI_MAX_TCC               	16</div><div class='del'>-#define SI_MAX_TCC_MASK          	0xFFFF</div><div class='ctx'> #define SI_MAX_CTLACKS_ASSERTION_WAIT   100</div><div class='ctx'> </div><div class='del'>-/* SMC IND accessor regs */</div><div class='del'>-#define SMC_IND_INDEX_0                              0x80</div><div class='del'>-#define SMC_IND_DATA_0                               0x81</div><div class='del'>-</div><div class='del'>-#define SMC_IND_ACCESS_CNTL                          0x8A</div><div class='del'>-#       define AUTO_INCREMENT_IND_0                  (1 &lt;&lt; 0)</div><div class='del'>-#define SMC_MESSAGE_0                                0x8B</div><div class='del'>-#define SMC_RESP_0                                   0x8C</div><div class='del'>-</div><div class='ctx'> /* CG IND registers are accessed via SMC indirect space + SMC_CG_IND_START */</div><div class='ctx'> #define SMC_CG_IND_START                    0xc0030000</div><div class='ctx'> #define SMC_CG_IND_END                      0xc0040000</div><div class='ctx'> </div><div class='del'>-#define	CG_CGTT_LOCAL_0				0x400</div><div class='del'>-#define	CG_CGTT_LOCAL_1				0x401</div><div class='del'>-</div><div class='ctx'> /* SMC IND registers */</div><div class='ctx'> #define	SMC_SYSCON_RESET_CNTL				0x80000000</div><div class='ctx'> #       define RST_REG                                  (1 &lt;&lt; 0)</div><div class='hunk'>@@ -68,9 +37,6 @@</div><div class='ctx'> #       define CK_DISABLE                               (1 &lt;&lt; 0)</div><div class='ctx'> #       define CKEN                                     (1 &lt;&lt; 24)</div><div class='ctx'> </div><div class='del'>-#define VGA_HDP_CONTROL  				0xCA</div><div class='del'>-#define		VGA_MEMORY_DISABLE				(1 &lt;&lt; 4)</div><div class='del'>-</div><div class='ctx'> #define DCCG_DISP_SLOW_SELECT_REG                       0x13F</div><div class='ctx'> #define		DCCG_DISP1_SLOW_SELECT(x)		((x) &lt;&lt; 0)</div><div class='ctx'> #define		DCCG_DISP1_SLOW_SELECT_MASK		(7 &lt;&lt; 0)</div><div class='hunk'>@@ -79,47 +45,6 @@</div><div class='ctx'> #define		DCCG_DISP2_SLOW_SELECT_MASK		(7 &lt;&lt; 4)</div><div class='ctx'> #define		DCCG_DISP2_SLOW_SELECT_SHIFT		4</div><div class='ctx'> </div><div class='del'>-#define	CG_SPLL_FUNC_CNTL				0x180</div><div class='del'>-#define		SPLL_RESET				(1 &lt;&lt; 0)</div><div class='del'>-#define		SPLL_SLEEP				(1 &lt;&lt; 1)</div><div class='del'>-#define		SPLL_BYPASS_EN				(1 &lt;&lt; 3)</div><div class='del'>-#define		SPLL_REF_DIV(x)				((x) &lt;&lt; 4)</div><div class='del'>-#define		SPLL_REF_DIV_MASK			(0x3f &lt;&lt; 4)</div><div class='del'>-#define		SPLL_PDIV_A(x)				((x) &lt;&lt; 20)</div><div class='del'>-#define		SPLL_PDIV_A_MASK			(0x7f &lt;&lt; 20)</div><div class='del'>-#define		SPLL_PDIV_A_SHIFT			20</div><div class='del'>-#define	CG_SPLL_FUNC_CNTL_2				0x181</div><div class='del'>-#define		SCLK_MUX_SEL(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		SCLK_MUX_SEL_MASK			(0x1ff &lt;&lt; 0)</div><div class='del'>-#define		SPLL_CTLREQ_CHG				(1 &lt;&lt; 23)</div><div class='del'>-#define		SCLK_MUX_UPDATE				(1 &lt;&lt; 26)</div><div class='del'>-#define	CG_SPLL_FUNC_CNTL_3				0x182</div><div class='del'>-#define		SPLL_FB_DIV(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		SPLL_FB_DIV_MASK			(0x3ffffff &lt;&lt; 0)</div><div class='del'>-#define		SPLL_FB_DIV_SHIFT			0</div><div class='del'>-#define		SPLL_DITHEN				(1 &lt;&lt; 28)</div><div class='del'>-#define	CG_SPLL_FUNC_CNTL_4				0x183</div><div class='del'>-</div><div class='del'>-#define	SPLL_STATUS					0x185</div><div class='del'>-#define		SPLL_CHG_STATUS				(1 &lt;&lt; 1)</div><div class='del'>-#define	SPLL_CNTL_MODE					0x186</div><div class='del'>-#define		SPLL_SW_DIR_CONTROL			(1 &lt;&lt; 0)</div><div class='del'>-#	define SPLL_REFCLK_SEL(x)			((x) &lt;&lt; 26)</div><div class='del'>-#	define SPLL_REFCLK_SEL_MASK			(3 &lt;&lt; 26)</div><div class='del'>-</div><div class='del'>-#define	CG_SPLL_SPREAD_SPECTRUM				0x188</div><div class='del'>-#define		SSEN					(1 &lt;&lt; 0)</div><div class='del'>-#define		CLK_S(x)				((x) &lt;&lt; 4)</div><div class='del'>-#define		CLK_S_MASK				(0xfff &lt;&lt; 4)</div><div class='del'>-#define		CLK_S_SHIFT				4</div><div class='del'>-#define	CG_SPLL_SPREAD_SPECTRUM_2			0x189</div><div class='del'>-#define		CLK_V(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		CLK_V_MASK				(0x3ffffff &lt;&lt; 0)</div><div class='del'>-#define		CLK_V_SHIFT				0</div><div class='del'>-</div><div class='del'>-#define	CG_SPLL_AUTOSCALE_CNTL				0x18b</div><div class='del'>-#       define AUTOSCALE_ON_SS_CLEAR                    (1 &lt;&lt; 9)</div><div class='del'>-</div><div class='ctx'> /* discrete uvd clocks */</div><div class='ctx'> #define	CG_UPLL_FUNC_CNTL				0x18d</div><div class='ctx'> #	define UPLL_RESET_MASK				0x00000001</div><div class='hunk'>@@ -149,317 +74,13 @@</div><div class='ctx'> #define	CG_UPLL_SPREAD_SPECTRUM				0x194</div><div class='ctx'> #	define SSEN_MASK				0x00000001</div><div class='ctx'> </div><div class='del'>-#define	MPLL_BYPASSCLK_SEL				0x197</div><div class='del'>-#	define MPLL_CLKOUT_SEL(x)			((x) &lt;&lt; 8)</div><div class='del'>-#	define MPLL_CLKOUT_SEL_MASK			0xFF00</div><div class='del'>-</div><div class='del'>-#define CG_CLKPIN_CNTL                                    0x198</div><div class='del'>-#       define XTALIN_DIVIDE                              (1 &lt;&lt; 1)</div><div class='del'>-#       define BCLK_AS_XCLK                               (1 &lt;&lt; 2)</div><div class='del'>-#define CG_CLKPIN_CNTL_2                                  0x199</div><div class='del'>-#       define FORCE_BIF_REFCLK_EN                        (1 &lt;&lt; 3)</div><div class='del'>-#       define MUX_TCLK_TO_XCLK                           (1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define	THM_CLK_CNTL					0x19b</div><div class='del'>-#	define CMON_CLK_SEL(x)				((x) &lt;&lt; 0)</div><div class='del'>-#	define CMON_CLK_SEL_MASK			0xFF</div><div class='del'>-#	define TMON_CLK_SEL(x)				((x) &lt;&lt; 8)</div><div class='del'>-#	define TMON_CLK_SEL_MASK			0xFF00</div><div class='del'>-#define	MISC_CLK_CNTL					0x19c</div><div class='del'>-#	define DEEP_SLEEP_CLK_SEL(x)			((x) &lt;&lt; 0)</div><div class='del'>-#	define DEEP_SLEEP_CLK_SEL_MASK			0xFF</div><div class='del'>-#	define ZCLK_SEL(x)				((x) &lt;&lt; 8)</div><div class='del'>-#	define ZCLK_SEL_MASK				0xFF00</div><div class='del'>-</div><div class='del'>-#define	CG_THERMAL_CTRL					0x1c0</div><div class='del'>-#define 	DPM_EVENT_SRC(x)			((x) &lt;&lt; 0)</div><div class='del'>-#define 	DPM_EVENT_SRC_MASK			(7 &lt;&lt; 0)</div><div class='del'>-#define		DIG_THERM_DPM(x)			((x) &lt;&lt; 14)</div><div class='del'>-#define		DIG_THERM_DPM_MASK			0x003FC000</div><div class='del'>-#define		DIG_THERM_DPM_SHIFT			14</div><div class='del'>-#define	CG_THERMAL_STATUS				0x1c1</div><div class='del'>-#define		FDO_PWM_DUTY(x)				((x) &lt;&lt; 9)</div><div class='del'>-#define		FDO_PWM_DUTY_MASK			(0xff &lt;&lt; 9)</div><div class='del'>-#define		FDO_PWM_DUTY_SHIFT			9</div><div class='del'>-#define	CG_THERMAL_INT					0x1c2</div><div class='del'>-#define		DIG_THERM_INTH(x)			((x) &lt;&lt; 8)</div><div class='del'>-#define		DIG_THERM_INTH_MASK			0x0000FF00</div><div class='del'>-#define		DIG_THERM_INTH_SHIFT			8</div><div class='del'>-#define		DIG_THERM_INTL(x)			((x) &lt;&lt; 16)</div><div class='del'>-#define		DIG_THERM_INTL_MASK			0x00FF0000</div><div class='del'>-#define		DIG_THERM_INTL_SHIFT			16</div><div class='del'>-#define 	THERM_INT_MASK_HIGH			(1 &lt;&lt; 24)</div><div class='del'>-#define 	THERM_INT_MASK_LOW			(1 &lt;&lt; 25)</div><div class='del'>-</div><div class='del'>-#define	CG_MULT_THERMAL_CTRL					0x1c4</div><div class='del'>-#define		TEMP_SEL(x)					((x) &lt;&lt; 20)</div><div class='del'>-#define		TEMP_SEL_MASK					(0xff &lt;&lt; 20)</div><div class='del'>-#define		TEMP_SEL_SHIFT					20</div><div class='del'>-#define	CG_MULT_THERMAL_STATUS					0x1c5</div><div class='del'>-#define		ASIC_MAX_TEMP(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		ASIC_MAX_TEMP_MASK				0x000001ff</div><div class='del'>-#define		ASIC_MAX_TEMP_SHIFT				0</div><div class='del'>-#define		CTF_TEMP(x)					((x) &lt;&lt; 9)</div><div class='del'>-#define		CTF_TEMP_MASK					0x0003fe00</div><div class='del'>-#define		CTF_TEMP_SHIFT					9</div><div class='del'>-</div><div class='del'>-#define	CG_FDO_CTRL0					0x1d5</div><div class='del'>-#define		FDO_STATIC_DUTY(x)			((x) &lt;&lt; 0)</div><div class='del'>-#define		FDO_STATIC_DUTY_MASK			0x000000FF</div><div class='del'>-#define		FDO_STATIC_DUTY_SHIFT			0</div><div class='del'>-#define	CG_FDO_CTRL1					0x1d6</div><div class='del'>-#define		FMAX_DUTY100(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		FMAX_DUTY100_MASK			0x000000FF</div><div class='del'>-#define		FMAX_DUTY100_SHIFT			0</div><div class='del'>-#define	CG_FDO_CTRL2					0x1d7</div><div class='del'>-#define		TMIN(x)					((x) &lt;&lt; 0)</div><div class='del'>-#define		TMIN_MASK				0x000000FF</div><div class='del'>-#define		TMIN_SHIFT				0</div><div class='del'>-#define		FDO_PWM_MODE(x)				((x) &lt;&lt; 11)</div><div class='del'>-#define		FDO_PWM_MODE_MASK			(7 &lt;&lt; 11)</div><div class='del'>-#define		FDO_PWM_MODE_SHIFT			11</div><div class='del'>-#define		TACH_PWM_RESP_RATE(x)			((x) &lt;&lt; 25)</div><div class='del'>-#define		TACH_PWM_RESP_RATE_MASK			(0x7f &lt;&lt; 25)</div><div class='del'>-#define		TACH_PWM_RESP_RATE_SHIFT		25</div><div class='del'>-</div><div class='del'>-#define CG_TACH_CTRL                                    0x1dc</div><div class='del'>-#       define EDGE_PER_REV(x)                          ((x) &lt;&lt; 0)</div><div class='del'>-#       define EDGE_PER_REV_MASK                        (0x7 &lt;&lt; 0)</div><div class='del'>-#       define EDGE_PER_REV_SHIFT                       0</div><div class='del'>-#       define TARGET_PERIOD(x)                         ((x) &lt;&lt; 3)</div><div class='del'>-#       define TARGET_PERIOD_MASK                       0xfffffff8</div><div class='del'>-#       define TARGET_PERIOD_SHIFT                      3</div><div class='del'>-#define CG_TACH_STATUS                                  0x1dd</div><div class='del'>-#       define TACH_PERIOD(x)                           ((x) &lt;&lt; 0)</div><div class='del'>-#       define TACH_PERIOD_MASK                         0xffffffff</div><div class='del'>-#       define TACH_PERIOD_SHIFT                        0</div><div class='del'>-</div><div class='del'>-#define GENERAL_PWRMGT                                  0x1e0</div><div class='del'>-#       define GLOBAL_PWRMGT_EN                         (1 &lt;&lt; 0)</div><div class='del'>-#       define STATIC_PM_EN                             (1 &lt;&lt; 1)</div><div class='del'>-#       define THERMAL_PROTECTION_DIS                   (1 &lt;&lt; 2)</div><div class='del'>-#       define THERMAL_PROTECTION_TYPE                  (1 &lt;&lt; 3)</div><div class='del'>-#       define SW_SMIO_INDEX(x)                         ((x) &lt;&lt; 6)</div><div class='del'>-#       define SW_SMIO_INDEX_MASK                       (1 &lt;&lt; 6)</div><div class='del'>-#       define SW_SMIO_INDEX_SHIFT                      6</div><div class='del'>-#       define VOLT_PWRMGT_EN                           (1 &lt;&lt; 10)</div><div class='del'>-#       define DYN_SPREAD_SPECTRUM_EN                   (1 &lt;&lt; 23)</div><div class='del'>-#define CG_TPC                                            0x1e1</div><div class='del'>-#define SCLK_PWRMGT_CNTL                                  0x1e2</div><div class='del'>-#       define SCLK_PWRMGT_OFF                            (1 &lt;&lt; 0)</div><div class='del'>-#       define SCLK_LOW_D1                                (1 &lt;&lt; 1)</div><div class='del'>-#       define FIR_RESET                                  (1 &lt;&lt; 4)</div><div class='del'>-#       define FIR_FORCE_TREND_SEL                        (1 &lt;&lt; 5)</div><div class='del'>-#       define FIR_TREND_MODE                             (1 &lt;&lt; 6)</div><div class='del'>-#       define DYN_GFX_CLK_OFF_EN                         (1 &lt;&lt; 7)</div><div class='del'>-#       define GFX_CLK_FORCE_ON                           (1 &lt;&lt; 8)</div><div class='del'>-#       define GFX_CLK_REQUEST_OFF                        (1 &lt;&lt; 9)</div><div class='del'>-#       define GFX_CLK_FORCE_OFF                          (1 &lt;&lt; 10)</div><div class='del'>-#       define GFX_CLK_OFF_ACPI_D1                        (1 &lt;&lt; 11)</div><div class='del'>-#       define GFX_CLK_OFF_ACPI_D2                        (1 &lt;&lt; 12)</div><div class='del'>-#       define GFX_CLK_OFF_ACPI_D3                        (1 &lt;&lt; 13)</div><div class='del'>-#       define DYN_LIGHT_SLEEP_EN                         (1 &lt;&lt; 14)</div><div class='del'>-</div><div class='del'>-#define TARGET_AND_CURRENT_PROFILE_INDEX                  0x1e6</div><div class='del'>-#       define CURRENT_STATE_INDEX_MASK                   (0xf &lt;&lt; 4)</div><div class='del'>-#       define CURRENT_STATE_INDEX_SHIFT                  4</div><div class='del'>-</div><div class='del'>-#define CG_FTV                                            0x1ef</div><div class='del'>-</div><div class='del'>-#define CG_FFCT_0                                         0x1f0</div><div class='del'>-#       define UTC_0(x)                                   ((x) &lt;&lt; 0)</div><div class='del'>-#       define UTC_0_MASK                                 (0x3ff &lt;&lt; 0)</div><div class='del'>-#       define DTC_0(x)                                   ((x) &lt;&lt; 10)</div><div class='del'>-#       define DTC_0_MASK                                 (0x3ff &lt;&lt; 10)</div><div class='del'>-</div><div class='del'>-#define CG_BSP                                          0x1ff</div><div class='del'>-#       define BSP(x)					((x) &lt;&lt; 0)</div><div class='del'>-#       define BSP_MASK					(0xffff &lt;&lt; 0)</div><div class='del'>-#       define BSU(x)					((x) &lt;&lt; 16)</div><div class='del'>-#       define BSU_MASK					(0xf &lt;&lt; 16)</div><div class='del'>-#define CG_AT                                           0x200</div><div class='del'>-#       define CG_R(x)					((x) &lt;&lt; 0)</div><div class='del'>-#       define CG_R_MASK				(0xffff &lt;&lt; 0)</div><div class='del'>-#       define CG_L(x)					((x) &lt;&lt; 16)</div><div class='del'>-#       define CG_L_MASK				(0xffff &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define CG_GIT                                          0x201</div><div class='del'>-#       define CG_GICST(x)                              ((x) &lt;&lt; 0)</div><div class='del'>-#       define CG_GICST_MASK                            (0xffff &lt;&lt; 0)</div><div class='del'>-#       define CG_GIPOT(x)                              ((x) &lt;&lt; 16)</div><div class='del'>-#       define CG_GIPOT_MASK                            (0xffff &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define CG_SSP                                            0x203</div><div class='del'>-#       define SST(x)                                     ((x) &lt;&lt; 0)</div><div class='del'>-#       define SST_MASK                                   (0xffff &lt;&lt; 0)</div><div class='del'>-#       define SSTU(x)                                    ((x) &lt;&lt; 16)</div><div class='del'>-#       define SSTU_MASK                                  (0xf &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define CG_DISPLAY_GAP_CNTL                               0x20a</div><div class='del'>-#       define DISP1_GAP(x)                               ((x) &lt;&lt; 0)</div><div class='del'>-#       define DISP1_GAP_MASK                             (3 &lt;&lt; 0)</div><div class='del'>-#       define DISP2_GAP(x)                               ((x) &lt;&lt; 2)</div><div class='del'>-#       define DISP2_GAP_MASK                             (3 &lt;&lt; 2)</div><div class='del'>-#       define VBI_TIMER_COUNT(x)                         ((x) &lt;&lt; 4)</div><div class='del'>-#       define VBI_TIMER_COUNT_MASK                       (0x3fff &lt;&lt; 4)</div><div class='del'>-#       define VBI_TIMER_UNIT(x)                          ((x) &lt;&lt; 20)</div><div class='del'>-#       define VBI_TIMER_UNIT_MASK                        (7 &lt;&lt; 20)</div><div class='del'>-#       define DISP1_GAP_MCHG(x)                          ((x) &lt;&lt; 24)</div><div class='del'>-#       define DISP1_GAP_MCHG_MASK                        (3 &lt;&lt; 24)</div><div class='del'>-#       define DISP2_GAP_MCHG(x)                          ((x) &lt;&lt; 26)</div><div class='del'>-#       define DISP2_GAP_MCHG_MASK                        (3 &lt;&lt; 26)</div><div class='del'>-</div><div class='del'>-#define	CG_ULV_CONTROL					0x21e</div><div class='del'>-#define	CG_ULV_PARAMETER				0x21f</div><div class='del'>-</div><div class='del'>-#define	SMC_SCRATCH0					0x221</div><div class='del'>-</div><div class='del'>-#define	CG_CAC_CTRL					0x22e</div><div class='del'>-#	define CAC_WINDOW(x)				((x) &lt;&lt; 0)</div><div class='del'>-#	define CAC_WINDOW_MASK				0x00ffffff</div><div class='del'>-</div><div class='del'>-#define DMIF_ADDR_CONFIG  				0x2F5</div><div class='del'>-</div><div class='del'>-#define DMIF_ADDR_CALC  				0x300</div><div class='del'>-</div><div class='del'>-#define	PIPE0_DMIF_BUFFER_CONTROL			  0x0328</div><div class='del'>-#       define DMIF_BUFFERS_ALLOCATED(x)                  ((x) &lt;&lt; 0)</div><div class='del'>-#       define DMIF_BUFFERS_ALLOCATED_COMPLETED           (1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define	SRBM_STATUS				        0x394</div><div class='del'>-#define		GRBM_RQ_PENDING 			(1 &lt;&lt; 5)</div><div class='del'>-#define		VMC_BUSY 				(1 &lt;&lt; 8)</div><div class='del'>-#define		MCB_BUSY 				(1 &lt;&lt; 9)</div><div class='del'>-#define		MCB_NON_DISPLAY_BUSY 			(1 &lt;&lt; 10)</div><div class='del'>-#define		MCC_BUSY 				(1 &lt;&lt; 11)</div><div class='del'>-#define		MCD_BUSY 				(1 &lt;&lt; 12)</div><div class='del'>-#define		SEM_BUSY 				(1 &lt;&lt; 14)</div><div class='del'>-#define		IH_BUSY 				(1 &lt;&lt; 17)</div><div class='del'>-</div><div class='del'>-#define	SRBM_SOFT_RESET				        0x398</div><div class='del'>-#define		SOFT_RESET_BIF				(1 &lt;&lt; 1)</div><div class='del'>-#define		SOFT_RESET_DC				(1 &lt;&lt; 5)</div><div class='del'>-#define		SOFT_RESET_DMA1				(1 &lt;&lt; 6)</div><div class='del'>-#define		SOFT_RESET_GRBM				(1 &lt;&lt; 8)</div><div class='del'>-#define		SOFT_RESET_HDP				(1 &lt;&lt; 9)</div><div class='del'>-#define		SOFT_RESET_IH				(1 &lt;&lt; 10)</div><div class='del'>-#define		SOFT_RESET_MC				(1 &lt;&lt; 11)</div><div class='del'>-#define		SOFT_RESET_ROM				(1 &lt;&lt; 14)</div><div class='del'>-#define		SOFT_RESET_SEM				(1 &lt;&lt; 15)</div><div class='del'>-#define		SOFT_RESET_VMC				(1 &lt;&lt; 17)</div><div class='del'>-#define		SOFT_RESET_DMA				(1 &lt;&lt; 20)</div><div class='del'>-#define		SOFT_RESET_TST				(1 &lt;&lt; 21)</div><div class='del'>-#define		SOFT_RESET_REGBB			(1 &lt;&lt; 22)</div><div class='del'>-#define		SOFT_RESET_ORB				(1 &lt;&lt; 23)</div><div class='del'>-</div><div class='del'>-#define	CC_SYS_RB_BACKEND_DISABLE			0x3A0</div><div class='del'>-#define	GC_USER_SYS_RB_BACKEND_DISABLE			0x3A1</div><div class='del'>-</div><div class='del'>-#define SRBM_READ_ERROR					0x3A6</div><div class='del'>-#define SRBM_INT_CNTL					0x3A8</div><div class='del'>-#define SRBM_INT_ACK					0x3AA</div><div class='del'>-</div><div class='del'>-#define	SRBM_STATUS2				        0x3B1</div><div class='del'>-#define		DMA_BUSY 				(1 &lt;&lt; 5)</div><div class='del'>-#define		DMA1_BUSY 				(1 &lt;&lt; 6)</div><div class='del'>-</div><div class='del'>-#define VM_L2_CNTL					0x500</div><div class='del'>-#define		ENABLE_L2_CACHE					(1 &lt;&lt; 0)</div><div class='del'>-#define		ENABLE_L2_FRAGMENT_PROCESSING			(1 &lt;&lt; 1)</div><div class='del'>-#define		L2_CACHE_PTE_ENDIAN_SWAP_MODE(x)		((x) &lt;&lt; 2)</div><div class='del'>-#define		L2_CACHE_PDE_ENDIAN_SWAP_MODE(x)		((x) &lt;&lt; 4)</div><div class='del'>-#define		ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE		(1 &lt;&lt; 9)</div><div class='del'>-#define		ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE	(1 &lt;&lt; 10)</div><div class='del'>-#define		EFFECTIVE_L2_QUEUE_SIZE(x)			(((x) &amp; 7) &lt;&lt; 15)</div><div class='del'>-#define		CONTEXT1_IDENTITY_ACCESS_MODE(x)		(((x) &amp; 3) &lt;&lt; 19)</div><div class='del'>-#define VM_L2_CNTL2					0x501</div><div class='del'>-#define		INVALIDATE_ALL_L1_TLBS				(1 &lt;&lt; 0)</div><div class='del'>-#define		INVALIDATE_L2_CACHE				(1 &lt;&lt; 1)</div><div class='del'>-#define		INVALIDATE_CACHE_MODE(x)			((x) &lt;&lt; 26)</div><div class='del'>-#define			INVALIDATE_PTE_AND_PDE_CACHES		0</div><div class='del'>-#define			INVALIDATE_ONLY_PTE_CACHES		1</div><div class='del'>-#define			INVALIDATE_ONLY_PDE_CACHES		2</div><div class='del'>-#define VM_L2_CNTL3					0x502</div><div class='del'>-#define		BANK_SELECT(x)					((x) &lt;&lt; 0)</div><div class='del'>-#define		L2_CACHE_UPDATE_MODE(x)				((x) &lt;&lt; 6)</div><div class='del'>-#define		L2_CACHE_BIGK_FRAGMENT_SIZE(x)			((x) &lt;&lt; 15)</div><div class='del'>-#define		L2_CACHE_BIGK_ASSOCIATIVITY			(1 &lt;&lt; 20)</div><div class='del'>-#define	VM_L2_STATUS					0x503</div><div class='del'>-#define		L2_BUSY						(1 &lt;&lt; 0)</div><div class='del'>-#define VM_CONTEXT0_CNTL				0x504</div><div class='del'>-#define		ENABLE_CONTEXT					(1 &lt;&lt; 0)</div><div class='del'>-#define		PAGE_TABLE_DEPTH(x)				(((x) &amp; 3) &lt;&lt; 1)</div><div class='del'>-#define		RANGE_PROTECTION_FAULT_ENABLE_INTERRUPT		(1 &lt;&lt; 3)</div><div class='del'>-#define		RANGE_PROTECTION_FAULT_ENABLE_DEFAULT		(1 &lt;&lt; 4)</div><div class='del'>-#define		DUMMY_PAGE_PROTECTION_FAULT_ENABLE_INTERRUPT	(1 &lt;&lt; 6)</div><div class='del'>-#define		DUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT	(1 &lt;&lt; 7)</div><div class='del'>-#define		PDE0_PROTECTION_FAULT_ENABLE_INTERRUPT		(1 &lt;&lt; 9)</div><div class='del'>-#define		PDE0_PROTECTION_FAULT_ENABLE_DEFAULT		(1 &lt;&lt; 10)</div><div class='del'>-#define		VALID_PROTECTION_FAULT_ENABLE_INTERRUPT		(1 &lt;&lt; 12)</div><div class='del'>-#define		VALID_PROTECTION_FAULT_ENABLE_DEFAULT		(1 &lt;&lt; 13)</div><div class='del'>-#define		READ_PROTECTION_FAULT_ENABLE_INTERRUPT		(1 &lt;&lt; 15)</div><div class='del'>-#define		READ_PROTECTION_FAULT_ENABLE_DEFAULT		(1 &lt;&lt; 16)</div><div class='del'>-#define		WRITE_PROTECTION_FAULT_ENABLE_INTERRUPT		(1 &lt;&lt; 18)</div><div class='del'>-#define		WRITE_PROTECTION_FAULT_ENABLE_DEFAULT		(1 &lt;&lt; 19)</div><div class='del'>-#define		PAGE_TABLE_BLOCK_SIZE(x)			(((x) &amp; 0xF) &lt;&lt; 24)</div><div class='del'>-#define VM_CONTEXT1_CNTL				0x505</div><div class='del'>-#define VM_CONTEXT0_CNTL2				0x50C</div><div class='del'>-#define VM_CONTEXT1_CNTL2				0x50D</div><div class='del'>-#define	VM_CONTEXT8_PAGE_TABLE_BASE_ADDR		0x50E</div><div class='del'>-#define	VM_CONTEXT9_PAGE_TABLE_BASE_ADDR		0x50F</div><div class='del'>-#define	VM_CONTEXT10_PAGE_TABLE_BASE_ADDR		0x510</div><div class='del'>-#define	VM_CONTEXT11_PAGE_TABLE_BASE_ADDR		0x511</div><div class='del'>-#define	VM_CONTEXT12_PAGE_TABLE_BASE_ADDR		0x512</div><div class='del'>-#define	VM_CONTEXT13_PAGE_TABLE_BASE_ADDR		0x513</div><div class='del'>-#define	VM_CONTEXT14_PAGE_TABLE_BASE_ADDR		0x514</div><div class='del'>-#define	VM_CONTEXT15_PAGE_TABLE_BASE_ADDR		0x515</div><div class='del'>-</div><div class='del'>-#define	VM_CONTEXT1_PROTECTION_FAULT_ADDR		0x53f</div><div class='del'>-#define	VM_CONTEXT1_PROTECTION_FAULT_STATUS		0x537</div><div class='del'>-#define		PROTECTIONS_MASK			(0xf &lt;&lt; 0)</div><div class='del'>-#define		PROTECTIONS_SHIFT			0</div><div class='del'>-		/* bit 0: range</div><div class='del'>-		 * bit 1: pde0</div><div class='del'>-		 * bit 2: valid</div><div class='del'>-		 * bit 3: read</div><div class='del'>-		 * bit 4: write</div><div class='del'>-		 */</div><div class='del'>-#define		MEMORY_CLIENT_ID_MASK			(0xff &lt;&lt; 12)</div><div class='del'>-#define		MEMORY_CLIENT_ID_SHIFT			12</div><div class='del'>-#define		MEMORY_CLIENT_RW_MASK			(1 &lt;&lt; 24)</div><div class='del'>-#define		MEMORY_CLIENT_RW_SHIFT			24</div><div class='del'>-#define		FAULT_VMID_MASK				(0xf &lt;&lt; 25)</div><div class='del'>-#define		FAULT_VMID_SHIFT			25</div><div class='del'>-</div><div class='ctx'> #define VM_INVALIDATE_REQUEST				0x51E</div><div class='ctx'> #define VM_INVALIDATE_RESPONSE				0x51F</div><div class='ctx'> </div><div class='del'>-#define VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR	0x546</div><div class='del'>-#define VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR	0x547</div><div class='del'>-</div><div class='del'>-#define	VM_CONTEXT0_PAGE_TABLE_BASE_ADDR		0x54F</div><div class='del'>-#define	VM_CONTEXT1_PAGE_TABLE_BASE_ADDR		0x550</div><div class='del'>-#define	VM_CONTEXT2_PAGE_TABLE_BASE_ADDR		0x551</div><div class='del'>-#define	VM_CONTEXT3_PAGE_TABLE_BASE_ADDR		0x552</div><div class='del'>-#define	VM_CONTEXT4_PAGE_TABLE_BASE_ADDR		0x553</div><div class='del'>-#define	VM_CONTEXT5_PAGE_TABLE_BASE_ADDR		0x554</div><div class='del'>-#define	VM_CONTEXT6_PAGE_TABLE_BASE_ADDR		0x555</div><div class='del'>-#define	VM_CONTEXT7_PAGE_TABLE_BASE_ADDR		0x556</div><div class='del'>-#define	VM_CONTEXT0_PAGE_TABLE_START_ADDR		0x557</div><div class='del'>-#define	VM_CONTEXT1_PAGE_TABLE_START_ADDR		0x558</div><div class='del'>-</div><div class='del'>-#define	VM_CONTEXT0_PAGE_TABLE_END_ADDR			0x55F</div><div class='del'>-#define	VM_CONTEXT1_PAGE_TABLE_END_ADDR			0x560</div><div class='del'>-</div><div class='ctx'> #define VM_L2_CG           				0x570</div><div class='ctx'> #define		MC_CG_ENABLE				(1 &lt;&lt; 18)</div><div class='ctx'> #define		MC_LS_ENABLE				(1 &lt;&lt; 19)</div><div class='ctx'> </div><div class='del'>-#define MC_SHARED_CHMAP						0x801</div><div class='del'>-#define		NOOFCHAN_SHIFT					12</div><div class='del'>-#define		NOOFCHAN_MASK					0x0000f000</div><div class='del'>-#define MC_SHARED_CHREMAP					0x802</div><div class='del'>-</div><div class='ctx'> #define	MC_VM_FB_LOCATION				0x809</div><div class='ctx'> #define	MC_VM_AGP_TOP					0x80A</div><div class='ctx'> #define	MC_VM_AGP_BOT					0x80B</div><div class='hunk'>@@ -491,21 +112,6 @@</div><div class='ctx'> #define MC_CITF_MISC_WR_CG           			0x993</div><div class='ctx'> #define MC_CITF_MISC_VM_CG           			0x994</div><div class='ctx'> </div><div class='del'>-#define	MC_ARB_RAMCFG					0x9D8</div><div class='del'>-#define		NOOFBANK_SHIFT					0</div><div class='del'>-#define		NOOFBANK_MASK					0x00000003</div><div class='del'>-#define		NOOFRANK_SHIFT					2</div><div class='del'>-#define		NOOFRANK_MASK					0x00000004</div><div class='del'>-#define		NOOFROWS_SHIFT					3</div><div class='del'>-#define		NOOFROWS_MASK					0x00000038</div><div class='del'>-#define		NOOFCOLS_SHIFT					6</div><div class='del'>-#define		NOOFCOLS_MASK					0x000000C0</div><div class='del'>-#define		CHANSIZE_SHIFT					8</div><div class='del'>-#define		CHANSIZE_MASK					0x00000100</div><div class='del'>-#define		CHANSIZE_OVERRIDE				(1 &lt;&lt; 11)</div><div class='del'>-#define		NOOFGROUPS_SHIFT				12</div><div class='del'>-#define		NOOFGROUPS_MASK					0x00001000</div><div class='del'>-</div><div class='ctx'> #define	MC_ARB_DRAM_TIMING				0x9DD</div><div class='ctx'> #define	MC_ARB_DRAM_TIMING2				0x9DE</div><div class='ctx'> </div><div class='hunk'>@@ -631,20 +237,6 @@</div><div class='ctx'> #define		CLKS(x)					((x) &lt;&lt; 0)</div><div class='ctx'> #define		CLKS_MASK				(0xfff &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define	HDP_HOST_PATH_CNTL				0xB00</div><div class='del'>-#define 	CLOCK_GATING_DIS			(1 &lt;&lt; 23)</div><div class='del'>-#define	HDP_NONSURFACE_BASE				0xB01</div><div class='del'>-#define	HDP_NONSURFACE_INFO				0xB02</div><div class='del'>-#define	HDP_NONSURFACE_SIZE				0xB03</div><div class='del'>-</div><div class='del'>-#define HDP_DEBUG0  					0xBCC</div><div class='del'>-</div><div class='del'>-#define HDP_ADDR_CONFIG  				0xBD2</div><div class='del'>-#define HDP_MISC_CNTL					0xBD3</div><div class='del'>-#define 	HDP_FLUSH_INVALIDATE_CACHE			(1 &lt;&lt; 0)</div><div class='del'>-#define HDP_MEM_POWER_LS				0xBD4</div><div class='del'>-#define 	HDP_LS_ENABLE				(1 &lt;&lt; 0)</div><div class='del'>-</div><div class='ctx'> #define ATC_MISC_CG           				0xCD4</div><div class='ctx'> </div><div class='ctx'> #define IH_RB_CNTL                                        0xF80</div><div class='hunk'>@@ -674,8 +266,6 @@</div><div class='ctx'> #       define MC_WR_CLEAN_CNT(x)                         ((x) &lt;&lt; 20)</div><div class='ctx'> #       define MC_VMID(x)                                 ((x) &lt;&lt; 25)</div><div class='ctx'> </div><div class='del'>-#define	CONFIG_MEMSIZE					0x150A</div><div class='del'>-</div><div class='ctx'> #define INTERRUPT_CNTL                                    0x151A</div><div class='ctx'> #       define IH_DUMMY_RD_OVERRIDE                       (1 &lt;&lt; 0)</div><div class='ctx'> #       define IH_DUMMY_RD_EN                             (1 &lt;&lt; 1)</div><div class='hunk'>@@ -683,486 +273,22 @@</div><div class='ctx'> #       define GEN_IH_INT_EN                              (1 &lt;&lt; 8)</div><div class='ctx'> #define INTERRUPT_CNTL2                                   0x151B</div><div class='ctx'> </div><div class='del'>-#define HDP_MEM_COHERENCY_FLUSH_CNTL			0x1520</div><div class='del'>-</div><div class='del'>-#define	BIF_FB_EN						0x1524</div><div class='del'>-#define		FB_READ_EN					(1 &lt;&lt; 0)</div><div class='del'>-#define		FB_WRITE_EN					(1 &lt;&lt; 1)</div><div class='del'>-</div><div class='del'>-#define HDP_REG_COHERENCY_FLUSH_CNTL			0x1528</div><div class='del'>-</div><div class='del'>-/* DCE6 ELD audio interface */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0        0x28 /* LPCM */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR1        0x29 /* AC3 */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR2        0x2A /* MPEG1 */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR3        0x2B /* MP3 */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR4        0x2C /* MPEG2 */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR5        0x2D /* AAC */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR6        0x2E /* DTS */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR7        0x2F /* ATRAC */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR8        0x30 /* one bit audio - leave at 0 (default) */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR9        0x31 /* Dolby Digital */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR10       0x32 /* DTS-HD */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR11       0x33 /* MAT-MLP */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR12       0x34 /* DTS */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13       0x35 /* WMA Pro */</div><div class='del'>-#       define MAX_CHANNELS(x)                            (((x) &amp; 0x7) &lt;&lt; 0)</div><div class='del'>-/* max channels minus one.  7 = 8 channels */</div><div class='del'>-#       define SUPPORTED_FREQUENCIES(x)                   (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='del'>-#       define DESCRIPTOR_BYTE_2(x)                       (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='del'>-#       define SUPPORTED_FREQUENCIES_STEREO(x)            (((x) &amp; 0xff) &lt;&lt; 24) /* LPCM only */</div><div class='del'>-/* SUPPORTED_FREQUENCIES, SUPPORTED_FREQUENCIES_STEREO</div><div class='del'>- * bit0 = 32 kHz</div><div class='del'>- * bit1 = 44.1 kHz</div><div class='del'>- * bit2 = 48 kHz</div><div class='del'>- * bit3 = 88.2 kHz</div><div class='del'>- * bit4 = 96 kHz</div><div class='del'>- * bit5 = 176.4 kHz</div><div class='del'>- * bit6 = 192 kHz</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC         0x37</div><div class='del'>-#       define VIDEO_LIPSYNC(x)                           (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='del'>-#       define AUDIO_LIPSYNC(x)                           (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='del'>-/* VIDEO_LIPSYNC, AUDIO_LIPSYNC</div><div class='del'>- * 0   = invalid</div><div class='del'>- * x   = legal delay value</div><div class='del'>- * 255 = sync not supported</div><div class='del'>- */</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_RESPONSE_HBR             0x38</div><div class='del'>-#       define HBR_CAPABLE                                (1 &lt;&lt; 0) /* enabled by default */</div><div class='del'>-</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO0               0x3a</div><div class='del'>-#       define MANUFACTURER_ID(x)                        (((x) &amp; 0xffff) &lt;&lt; 0)</div><div class='del'>-#       define PRODUCT_ID(x)                             (((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO1               0x3b</div><div class='del'>-#       define SINK_DESCRIPTION_LEN(x)                   (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO2               0x3c</div><div class='del'>-#       define PORT_ID0(x)                               (((x) &amp; 0xffffffff) &lt;&lt; 0)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO3               0x3d</div><div class='del'>-#       define PORT_ID1(x)                               (((x) &amp; 0xffffffff) &lt;&lt; 0)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO4               0x3e</div><div class='del'>-#       define DESCRIPTION0(x)                           (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='del'>-#       define DESCRIPTION1(x)                           (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='del'>-#       define DESCRIPTION2(x)                           (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='del'>-#       define DESCRIPTION3(x)                           (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO5               0x3f</div><div class='del'>-#       define DESCRIPTION4(x)                           (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='del'>-#       define DESCRIPTION5(x)                           (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='del'>-#       define DESCRIPTION6(x)                           (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='del'>-#       define DESCRIPTION7(x)                           (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO6               0x40</div><div class='del'>-#       define DESCRIPTION8(x)                           (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='del'>-#       define DESCRIPTION9(x)                           (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='del'>-#       define DESCRIPTION10(x)                          (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='del'>-#       define DESCRIPTION11(x)                          (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO7               0x41</div><div class='del'>-#       define DESCRIPTION12(x)                          (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='del'>-#       define DESCRIPTION13(x)                          (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='del'>-#       define DESCRIPTION14(x)                          (((x) &amp; 0xff) &lt;&lt; 16)</div><div class='del'>-#       define DESCRIPTION15(x)                          (((x) &amp; 0xff) &lt;&lt; 24)</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO8               0x42</div><div class='del'>-#       define DESCRIPTION16(x)                          (((x) &amp; 0xff) &lt;&lt; 0)</div><div class='del'>-#       define DESCRIPTION17(x)                          (((x) &amp; 0xff) &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL         0x54</div><div class='del'>-#       define AUDIO_ENABLED                             (1 &lt;&lt; 31)</div><div class='del'>-</div><div class='del'>-#define AZ_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT  0x56</div><div class='del'>-#define		PORT_CONNECTIVITY_MASK				(3 &lt;&lt; 30)</div><div class='del'>-#define		PORT_CONNECTIVITY_SHIFT				30</div><div class='del'>-</div><div class='del'>-#define	DC_LB_MEMORY_SPLIT					0x1AC3</div><div class='del'>-#define		DC_LB_MEMORY_CONFIG(x)				((x) &lt;&lt; 20)</div><div class='del'>-</div><div class='del'>-#define	PRIORITY_A_CNT						0x1AC6</div><div class='del'>-#define		PRIORITY_MARK_MASK				0x7fff</div><div class='del'>-#define		PRIORITY_OFF					(1 &lt;&lt; 16)</div><div class='del'>-#define		PRIORITY_ALWAYS_ON				(1 &lt;&lt; 20)</div><div class='del'>-#define	PRIORITY_B_CNT						0x1AC7</div><div class='del'>-</div><div class='del'>-#define	DPG_PIPE_ARBITRATION_CONTROL3				0x1B32</div><div class='del'>-#       define LATENCY_WATERMARK_MASK(x)			((x) &lt;&lt; 16)</div><div class='del'>-#define	DPG_PIPE_LATENCY_CONTROL				0x1B33</div><div class='del'>-#       define LATENCY_LOW_WATERMARK(x)				((x) &lt;&lt; 0)</div><div class='del'>-#       define LATENCY_HIGH_WATERMARK(x)			((x) &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-/* 0x6bb8, 0x77b8, 0x103b8, 0x10fb8, 0x11bb8, 0x127b8 */</div><div class='del'>-#define VLINE_STATUS                                    0x1AEE</div><div class='del'>-#       define VLINE_OCCURRED                           (1 &lt;&lt; 0)</div><div class='del'>-#       define VLINE_ACK                                (1 &lt;&lt; 4)</div><div class='del'>-#       define VLINE_STAT                               (1 &lt;&lt; 12)</div><div class='del'>-#       define VLINE_INTERRUPT                          (1 &lt;&lt; 16)</div><div class='del'>-#       define VLINE_INTERRUPT_TYPE                     (1 &lt;&lt; 17)</div><div class='del'>-/* 0x6bbc, 0x77bc, 0x103bc, 0x10fbc, 0x11bbc, 0x127bc */</div><div class='del'>-#define VBLANK_STATUS                                   0x1AEF</div><div class='del'>-#       define VBLANK_OCCURRED                          (1 &lt;&lt; 0)</div><div class='del'>-#       define VBLANK_ACK                               (1 &lt;&lt; 4)</div><div class='del'>-#       define VBLANK_STAT                              (1 &lt;&lt; 12)</div><div class='del'>-#       define VBLANK_INTERRUPT                         (1 &lt;&lt; 16)</div><div class='del'>-#       define VBLANK_INTERRUPT_TYPE                    (1 &lt;&lt; 17)</div><div class='del'>-</div><div class='del'>-/* 0x6b40, 0x7740, 0x10340, 0x10f40, 0x11b40, 0x12740 */</div><div class='del'>-#define INT_MASK                                        0x1AD0</div><div class='del'>-#       define VBLANK_INT_MASK                          (1 &lt;&lt; 0)</div><div class='del'>-#       define VLINE_INT_MASK                           (1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define DISP_INTERRUPT_STATUS                           0x183D</div><div class='del'>-#       define LB_D1_VLINE_INTERRUPT                    (1 &lt;&lt; 2)</div><div class='del'>-#       define LB_D1_VBLANK_INTERRUPT                   (1 &lt;&lt; 3)</div><div class='del'>-#       define DC_HPD1_INTERRUPT                        (1 &lt;&lt; 17)</div><div class='del'>-#       define DC_HPD1_RX_INTERRUPT                     (1 &lt;&lt; 18)</div><div class='del'>-#       define DACA_AUTODETECT_INTERRUPT                (1 &lt;&lt; 22)</div><div class='del'>-#       define DACB_AUTODETECT_INTERRUPT                (1 &lt;&lt; 23)</div><div class='del'>-#       define DC_I2C_SW_DONE_INTERRUPT                 (1 &lt;&lt; 24)</div><div class='del'>-#       define DC_I2C_HW_DONE_INTERRUPT                 (1 &lt;&lt; 25)</div><div class='del'>-#define DISP_INTERRUPT_STATUS_CONTINUE                  0x183E</div><div class='del'>-#       define LB_D2_VLINE_INTERRUPT                    (1 &lt;&lt; 2)</div><div class='del'>-#       define LB_D2_VBLANK_INTERRUPT                   (1 &lt;&lt; 3)</div><div class='del'>-#       define DC_HPD2_INTERRUPT                        (1 &lt;&lt; 17)</div><div class='del'>-#       define DC_HPD2_RX_INTERRUPT                     (1 &lt;&lt; 18)</div><div class='del'>-#       define DISP_TIMER_INTERRUPT                     (1 &lt;&lt; 24)</div><div class='del'>-#define DISP_INTERRUPT_STATUS_CONTINUE2                 0x183F</div><div class='del'>-#       define LB_D3_VLINE_INTERRUPT                    (1 &lt;&lt; 2)</div><div class='del'>-#       define LB_D3_VBLANK_INTERRUPT                   (1 &lt;&lt; 3)</div><div class='del'>-#       define DC_HPD3_INTERRUPT                        (1 &lt;&lt; 17)</div><div class='del'>-#       define DC_HPD3_RX_INTERRUPT                     (1 &lt;&lt; 18)</div><div class='del'>-#define DISP_INTERRUPT_STATUS_CONTINUE3                 0x1840</div><div class='del'>-#       define LB_D4_VLINE_INTERRUPT                    (1 &lt;&lt; 2)</div><div class='del'>-#       define LB_D4_VBLANK_INTERRUPT                   (1 &lt;&lt; 3)</div><div class='del'>-#       define DC_HPD4_INTERRUPT                        (1 &lt;&lt; 17)</div><div class='del'>-#       define DC_HPD4_RX_INTERRUPT                     (1 &lt;&lt; 18)</div><div class='del'>-#define DISP_INTERRUPT_STATUS_CONTINUE4                 0x1853</div><div class='del'>-#       define LB_D5_VLINE_INTERRUPT                    (1 &lt;&lt; 2)</div><div class='del'>-#       define LB_D5_VBLANK_INTERRUPT                   (1 &lt;&lt; 3)</div><div class='del'>-#       define DC_HPD5_INTERRUPT                        (1 &lt;&lt; 17)</div><div class='del'>-#       define DC_HPD5_RX_INTERRUPT                     (1 &lt;&lt; 18)</div><div class='del'>-#define DISP_INTERRUPT_STATUS_CONTINUE5                 0x1854</div><div class='del'>-#       define LB_D6_VLINE_INTERRUPT                    (1 &lt;&lt; 2)</div><div class='del'>-#       define LB_D6_VBLANK_INTERRUPT                   (1 &lt;&lt; 3)</div><div class='del'>-#       define DC_HPD6_INTERRUPT                        (1 &lt;&lt; 17)</div><div class='del'>-#       define DC_HPD6_RX_INTERRUPT                     (1 &lt;&lt; 18)</div><div class='del'>-</div><div class='del'>-/* 0x6858, 0x7458, 0x10058, 0x10c58, 0x11858, 0x12458 */</div><div class='del'>-#define GRPH_INT_STATUS                                 0x1A16</div><div class='del'>-#       define GRPH_PFLIP_INT_OCCURRED                  (1 &lt;&lt; 0)</div><div class='del'>-#       define GRPH_PFLIP_INT_CLEAR                     (1 &lt;&lt; 8)</div><div class='del'>-/* 0x685c, 0x745c, 0x1005c, 0x10c5c, 0x1185c, 0x1245c */</div><div class='del'>-#define	GRPH_INT_CONTROL			        0x1A17</div><div class='del'>-#       define GRPH_PFLIP_INT_MASK                      (1 &lt;&lt; 0)</div><div class='del'>-#       define GRPH_PFLIP_INT_TYPE                      (1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define	DAC_AUTODETECT_INT_CONTROL			0x19F2</div><div class='del'>-</div><div class='del'>-#define DC_HPD1_INT_STATUS                              0x1807</div><div class='del'>-#define DC_HPD2_INT_STATUS                              0x180A</div><div class='del'>-#define DC_HPD3_INT_STATUS                              0x180D</div><div class='del'>-#define DC_HPD4_INT_STATUS                              0x1810</div><div class='del'>-#define DC_HPD5_INT_STATUS                              0x1813</div><div class='del'>-#define DC_HPD6_INT_STATUS                              0x1816</div><div class='del'>-#       define DC_HPDx_INT_STATUS                       (1 &lt;&lt; 0)</div><div class='del'>-#       define DC_HPDx_SENSE                            (1 &lt;&lt; 1)</div><div class='del'>-#       define DC_HPDx_RX_INT_STATUS                    (1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define DC_HPD1_INT_CONTROL                             0x1808</div><div class='del'>-#define DC_HPD2_INT_CONTROL                             0x180B</div><div class='del'>-#define DC_HPD3_INT_CONTROL                             0x180E</div><div class='del'>-#define DC_HPD4_INT_CONTROL                             0x1811</div><div class='del'>-#define DC_HPD5_INT_CONTROL                             0x1814</div><div class='del'>-#define DC_HPD6_INT_CONTROL                             0x1817</div><div class='del'>-#       define DC_HPDx_INT_ACK                          (1 &lt;&lt; 0)</div><div class='del'>-#       define DC_HPDx_INT_POLARITY                     (1 &lt;&lt; 8)</div><div class='del'>-#       define DC_HPDx_INT_EN                           (1 &lt;&lt; 16)</div><div class='del'>-#       define DC_HPDx_RX_INT_ACK                       (1 &lt;&lt; 20)</div><div class='del'>-#       define DC_HPDx_RX_INT_EN                        (1 &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define DC_HPD1_CONTROL                                   0x1809</div><div class='del'>-#define DC_HPD2_CONTROL                                   0x180C</div><div class='del'>-#define DC_HPD3_CONTROL                                   0x180F</div><div class='del'>-#define DC_HPD4_CONTROL                                   0x1812</div><div class='del'>-#define DC_HPD5_CONTROL                                   0x1815</div><div class='del'>-#define DC_HPD6_CONTROL                                   0x1818</div><div class='del'>-#       define DC_HPDx_CONNECTION_TIMER(x)                ((x) &lt;&lt; 0)</div><div class='del'>-#       define DC_HPDx_RX_INT_TIMER(x)                    ((x) &lt;&lt; 16)</div><div class='del'>-#       define DC_HPDx_EN                                 (1 &lt;&lt; 28)</div><div class='del'>-</div><div class='del'>-#define DPG_PIPE_STUTTER_CONTROL                          0x1B35</div><div class='del'>-#       define STUTTER_ENABLE                             (1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-/* 0x6e98, 0x7a98, 0x10698, 0x11298, 0x11e98, 0x12a98 */</div><div class='del'>-#define CRTC_STATUS_FRAME_COUNT                         0x1BA6</div><div class='del'>-</div><div class='del'>-/* Audio clocks */</div><div class='del'>-#define DCCG_AUDIO_DTO0_PHASE                           0x05b0</div><div class='del'>-#define DCCG_AUDIO_DTO0_MODULE                          0x05b4</div><div class='del'>-#define DCCG_AUDIO_DTO1_PHASE                           0x05c0</div><div class='del'>-#define DCCG_AUDIO_DTO1_MODULE                          0x05c4</div><div class='del'>-</div><div class='del'>-#define	GRBM_CNTL					0x2000</div><div class='del'>-#define		GRBM_READ_TIMEOUT(x)				((x) &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define	GRBM_STATUS2					0x2002</div><div class='del'>-#define		RLC_RQ_PENDING 					(1 &lt;&lt; 0)</div><div class='del'>-#define		RLC_BUSY 					(1 &lt;&lt; 8)</div><div class='del'>-#define		TC_BUSY 					(1 &lt;&lt; 9)</div><div class='del'>-</div><div class='del'>-#define	GRBM_STATUS					0x2004</div><div class='del'>-#define		CMDFIFO_AVAIL_MASK				0x0000000F</div><div class='del'>-#define		RING2_RQ_PENDING				(1 &lt;&lt; 4)</div><div class='del'>-#define		SRBM_RQ_PENDING					(1 &lt;&lt; 5)</div><div class='del'>-#define		RING1_RQ_PENDING				(1 &lt;&lt; 6)</div><div class='del'>-#define		CF_RQ_PENDING					(1 &lt;&lt; 7)</div><div class='del'>-#define		PF_RQ_PENDING					(1 &lt;&lt; 8)</div><div class='del'>-#define		GDS_DMA_RQ_PENDING				(1 &lt;&lt; 9)</div><div class='del'>-#define		GRBM_EE_BUSY					(1 &lt;&lt; 10)</div><div class='del'>-#define		DB_CLEAN					(1 &lt;&lt; 12)</div><div class='del'>-#define		CB_CLEAN					(1 &lt;&lt; 13)</div><div class='del'>-#define		TA_BUSY 					(1 &lt;&lt; 14)</div><div class='del'>-#define		GDS_BUSY 					(1 &lt;&lt; 15)</div><div class='del'>-#define		VGT_BUSY					(1 &lt;&lt; 17)</div><div class='del'>-#define		IA_BUSY_NO_DMA					(1 &lt;&lt; 18)</div><div class='del'>-#define		IA_BUSY						(1 &lt;&lt; 19)</div><div class='del'>-#define		SX_BUSY 					(1 &lt;&lt; 20)</div><div class='del'>-#define		SPI_BUSY					(1 &lt;&lt; 22)</div><div class='del'>-#define		BCI_BUSY					(1 &lt;&lt; 23)</div><div class='del'>-#define		SC_BUSY 					(1 &lt;&lt; 24)</div><div class='del'>-#define		PA_BUSY 					(1 &lt;&lt; 25)</div><div class='del'>-#define		DB_BUSY 					(1 &lt;&lt; 26)</div><div class='del'>-#define		CP_COHERENCY_BUSY      				(1 &lt;&lt; 28)</div><div class='del'>-#define		CP_BUSY 					(1 &lt;&lt; 29)</div><div class='del'>-#define		CB_BUSY 					(1 &lt;&lt; 30)</div><div class='del'>-#define		GUI_ACTIVE					(1 &lt;&lt; 31)</div><div class='del'>-#define	GRBM_STATUS_SE0					0x2005</div><div class='del'>-#define	GRBM_STATUS_SE1					0x2006</div><div class='del'>-#define		SE_DB_CLEAN					(1 &lt;&lt; 1)</div><div class='del'>-#define		SE_CB_CLEAN					(1 &lt;&lt; 2)</div><div class='del'>-#define		SE_BCI_BUSY					(1 &lt;&lt; 22)</div><div class='del'>-#define		SE_VGT_BUSY					(1 &lt;&lt; 23)</div><div class='del'>-#define		SE_PA_BUSY					(1 &lt;&lt; 24)</div><div class='del'>-#define		SE_TA_BUSY					(1 &lt;&lt; 25)</div><div class='del'>-#define		SE_SX_BUSY					(1 &lt;&lt; 26)</div><div class='del'>-#define		SE_SPI_BUSY					(1 &lt;&lt; 27)</div><div class='del'>-#define		SE_SC_BUSY					(1 &lt;&lt; 29)</div><div class='del'>-#define		SE_DB_BUSY					(1 &lt;&lt; 30)</div><div class='del'>-#define		SE_CB_BUSY					(1 &lt;&lt; 31)</div><div class='del'>-</div><div class='del'>-#define GRBM_INT_CNTL                                   0x2018</div><div class='del'>-#       define RDERR_INT_ENABLE                         (1 &lt;&lt; 0)</div><div class='del'>-#       define GUI_IDLE_INT_ENABLE                      (1 &lt;&lt; 19)</div><div class='del'>-</div><div class='del'>-#define	CP_STRMOUT_CNTL					0x213F</div><div class='del'>-#define	SCRATCH_REG0					0x2140</div><div class='del'>-#define	SCRATCH_REG1					0x2141</div><div class='del'>-#define	SCRATCH_REG2					0x2142</div><div class='del'>-#define	SCRATCH_REG3					0x2143</div><div class='del'>-#define	SCRATCH_REG4					0x2144</div><div class='del'>-#define	SCRATCH_REG5					0x2145</div><div class='del'>-#define	SCRATCH_REG6					0x2146</div><div class='del'>-#define	SCRATCH_REG7					0x2147</div><div class='del'>-</div><div class='del'>-#define	SCRATCH_UMSK					0x2150</div><div class='del'>-#define	SCRATCH_ADDR					0x2151</div><div class='del'>-</div><div class='del'>-#define	CP_SEM_WAIT_TIMER				0x216F</div><div class='del'>-</div><div class='del'>-#define	CP_SEM_INCOMPLETE_TIMER_CNTL			0x2172</div><div class='del'>-</div><div class='del'>-#define CP_ME_CNTL					0x21B6</div><div class='del'>-#define		CP_CE_HALT					(1 &lt;&lt; 24)</div><div class='del'>-#define		CP_PFP_HALT					(1 &lt;&lt; 26)</div><div class='del'>-#define		CP_ME_HALT					(1 &lt;&lt; 28)</div><div class='del'>-</div><div class='del'>-#define	CP_COHER_CNTL2					0x217A</div><div class='del'>-</div><div class='del'>-#define	CP_RB2_RPTR					0x21BE</div><div class='del'>-#define	CP_RB1_RPTR					0x21BF</div><div class='del'>-#define	CP_RB0_RPTR					0x21C0</div><div class='del'>-#define	CP_RB_WPTR_DELAY				0x21C1</div><div class='del'>-</div><div class='del'>-#define	CP_QUEUE_THRESHOLDS				0x21D8</div><div class='del'>-#define		ROQ_IB1_START(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		ROQ_IB2_START(x)				((x) &lt;&lt; 8)</div><div class='del'>-#define CP_MEQ_THRESHOLDS				0x21D9</div><div class='del'>-#define		MEQ1_START(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		MEQ2_START(x)				((x) &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define	CP_PERFMON_CNTL					0x21FF</div><div class='del'>-</div><div class='ctx'> #define	VGT_VTX_VECT_EJECT_REG				0x222C</div><div class='del'>-</div><div class='ctx'> #define	VGT_ESGS_RING_SIZE				0x2232</div><div class='ctx'> #define	VGT_GSVS_RING_SIZE				0x2233</div><div class='del'>-</div><div class='ctx'> #define	VGT_GS_VERTEX_REUSE				0x2235</div><div class='del'>-</div><div class='ctx'> #define	VGT_PRIMITIVE_TYPE				0x2256</div><div class='ctx'> #define	VGT_INDEX_TYPE					0x2257</div><div class='del'>-</div><div class='ctx'> #define	VGT_NUM_INDICES					0x225C</div><div class='ctx'> #define	VGT_NUM_INSTANCES				0x225D</div><div class='del'>-</div><div class='ctx'> #define	VGT_TF_RING_SIZE				0x2262</div><div class='del'>-</div><div class='ctx'> #define	VGT_HS_OFFCHIP_PARAM				0x226C</div><div class='del'>-</div><div class='ctx'> #define	VGT_TF_MEMORY_BASE				0x226E</div><div class='ctx'> </div><div class='del'>-#define	PA_CL_ENHANCE					0x2285</div><div class='del'>-#define		CLIP_VTX_REORDER_ENA				(1 &lt;&lt; 0)</div><div class='del'>-#define		NUM_CLIP_SEQ(x)					((x) &lt;&lt; 1)</div><div class='del'>-</div><div class='del'>-#define	PA_SU_LINE_STIPPLE_VALUE			0x2298</div><div class='del'>-</div><div class='del'>-#define	PA_SC_LINE_STIPPLE_STATE			0x22C4</div><div class='del'>-</div><div class='del'>-#define	PA_SC_FORCE_EOV_MAX_CNTS			0x22C9</div><div class='del'>-#define		FORCE_EOV_MAX_CLK_CNT(x)			((x) &lt;&lt; 0)</div><div class='del'>-#define		FORCE_EOV_MAX_REZ_CNT(x)			((x) &lt;&lt; 16)</div><div class='del'>-</div><div class='del'>-#define	PA_SC_FIFO_SIZE					0x22F3</div><div class='del'>-#define		SC_FRONTEND_PRIM_FIFO_SIZE(x)			((x) &lt;&lt; 0)</div><div class='del'>-#define		SC_BACKEND_PRIM_FIFO_SIZE(x)			((x) &lt;&lt; 6)</div><div class='del'>-#define		SC_HIZ_TILE_FIFO_SIZE(x)			((x) &lt;&lt; 15)</div><div class='del'>-#define		SC_EARLYZ_TILE_FIFO_SIZE(x)			((x) &lt;&lt; 23)</div><div class='del'>-</div><div class='ctx'> #define	PA_SC_ENHANCE					0x22FC</div><div class='ctx'> </div><div class='del'>-#define	SQ_CONFIG					0x2300</div><div class='del'>-</div><div class='del'>-#define	SQC_CACHES					0x2302</div><div class='del'>-</div><div class='del'>-#define SQ_POWER_THROTTLE                               0x2396</div><div class='del'>-#define		MIN_POWER(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		MIN_POWER_MASK				(0x3fff &lt;&lt; 0)</div><div class='del'>-#define		MIN_POWER_SHIFT				0</div><div class='del'>-#define		MAX_POWER(x)				((x) &lt;&lt; 16)</div><div class='del'>-#define		MAX_POWER_MASK				(0x3fff &lt;&lt; 16)</div><div class='del'>-#define		MAX_POWER_SHIFT				0</div><div class='del'>-#define SQ_POWER_THROTTLE2                              0x2397</div><div class='del'>-#define		MAX_POWER_DELTA(x)			((x) &lt;&lt; 0)</div><div class='del'>-#define		MAX_POWER_DELTA_MASK			(0x3fff &lt;&lt; 0)</div><div class='del'>-#define		MAX_POWER_DELTA_SHIFT			0</div><div class='del'>-#define		STI_SIZE(x)				((x) &lt;&lt; 16)</div><div class='del'>-#define		STI_SIZE_MASK				(0x3ff &lt;&lt; 16)</div><div class='del'>-#define		STI_SIZE_SHIFT				16</div><div class='del'>-#define		LTI_RATIO(x)				((x) &lt;&lt; 27)</div><div class='del'>-#define		LTI_RATIO_MASK				(0xf &lt;&lt; 27)</div><div class='del'>-#define		LTI_RATIO_SHIFT				27</div><div class='del'>-</div><div class='del'>-#define	SX_DEBUG_1					0x2418</div><div class='del'>-</div><div class='del'>-#define	SPI_STATIC_THREAD_MGMT_1			0x2438</div><div class='del'>-#define	SPI_STATIC_THREAD_MGMT_2			0x2439</div><div class='del'>-#define	SPI_STATIC_THREAD_MGMT_3			0x243A</div><div class='del'>-#define	SPI_PS_MAX_WAVE_ID				0x243B</div><div class='del'>-</div><div class='del'>-#define	SPI_CONFIG_CNTL					0x2440</div><div class='del'>-</div><div class='del'>-#define	SPI_CONFIG_CNTL_1				0x244F</div><div class='del'>-#define		VTX_DONE_DELAY(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		INTERP_ONE_PRIM_PER_ROW				(1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define	CGTS_TCC_DISABLE				0x2452</div><div class='del'>-#define	CGTS_USER_TCC_DISABLE				0x2453</div><div class='del'>-#define		TCC_DISABLE_MASK				0xFFFF0000</div><div class='del'>-#define		TCC_DISABLE_SHIFT				16</div><div class='del'>-#define	CGTS_SM_CTRL_REG				0x2454</div><div class='del'>-#define		OVERRIDE				(1 &lt;&lt; 21)</div><div class='del'>-#define		LS_OVERRIDE				(1 &lt;&lt; 22)</div><div class='del'>-</div><div class='del'>-#define	SPI_LB_CU_MASK					0x24D5</div><div class='del'>-</div><div class='ctx'> #define	TA_CNTL_AUX					0x2542</div><div class='ctx'> </div><div class='del'>-#define CC_RB_BACKEND_DISABLE				0x263D</div><div class='del'>-#define		BACKEND_DISABLE(x)     			((x) &lt;&lt; 16)</div><div class='del'>-#define GB_ADDR_CONFIG  				0x263E</div><div class='del'>-#define		NUM_PIPES(x)				((x) &lt;&lt; 0)</div><div class='del'>-#define		NUM_PIPES_MASK				0x00000007</div><div class='del'>-#define		NUM_PIPES_SHIFT				0</div><div class='del'>-#define		PIPE_INTERLEAVE_SIZE(x)			((x) &lt;&lt; 4)</div><div class='del'>-#define		PIPE_INTERLEAVE_SIZE_MASK		0x00000070</div><div class='del'>-#define		PIPE_INTERLEAVE_SIZE_SHIFT		4</div><div class='del'>-#define		NUM_SHADER_ENGINES(x)			((x) &lt;&lt; 12)</div><div class='del'>-#define		NUM_SHADER_ENGINES_MASK			0x00003000</div><div class='del'>-#define		NUM_SHADER_ENGINES_SHIFT		12</div><div class='del'>-#define		SHADER_ENGINE_TILE_SIZE(x)     		((x) &lt;&lt; 16)</div><div class='del'>-#define		SHADER_ENGINE_TILE_SIZE_MASK		0x00070000</div><div class='del'>-#define		SHADER_ENGINE_TILE_SIZE_SHIFT		16</div><div class='del'>-#define		NUM_GPUS(x)     			((x) &lt;&lt; 20)</div><div class='del'>-#define		NUM_GPUS_MASK				0x00700000</div><div class='del'>-#define		NUM_GPUS_SHIFT				20</div><div class='del'>-#define		MULTI_GPU_TILE_SIZE(x)     		((x) &lt;&lt; 24)</div><div class='del'>-#define		MULTI_GPU_TILE_SIZE_MASK		0x03000000</div><div class='del'>-#define		MULTI_GPU_TILE_SIZE_SHIFT		24</div><div class='del'>-#define		ROW_SIZE(x)             		((x) &lt;&lt; 28)</div><div class='del'>-#define		ROW_SIZE_MASK				0x30000000</div><div class='del'>-#define		ROW_SIZE_SHIFT				28</div><div class='del'>-</div><div class='del'>-#define	CB_PERFCOUNTER0_SELECT0				0x2688</div><div class='del'>-#define	CB_PERFCOUNTER0_SELECT1				0x2689</div><div class='del'>-#define	CB_PERFCOUNTER1_SELECT0				0x268A</div><div class='del'>-#define	CB_PERFCOUNTER1_SELECT1				0x268B</div><div class='del'>-#define	CB_PERFCOUNTER2_SELECT0				0x268C</div><div class='del'>-#define	CB_PERFCOUNTER2_SELECT1				0x268D</div><div class='del'>-#define	CB_PERFCOUNTER3_SELECT0				0x268E</div><div class='del'>-#define	CB_PERFCOUNTER3_SELECT1				0x268F</div><div class='del'>-</div><div class='del'>-#define	CB_CGTT_SCLK_CTRL				0x2698</div><div class='del'>-</div><div class='del'>-#define	TCP_CHAN_STEER_LO				0x2B03</div><div class='del'>-#define	TCP_CHAN_STEER_HI				0x2B94</div><div class='del'>-</div><div class='del'>-#define	CP_RB0_BASE					0x3040</div><div class='del'>-#define	CP_RB0_CNTL					0x3041</div><div class='del'>-#define		RB_BUFSZ(x)					((x) &lt;&lt; 0)</div><div class='del'>-#define		RB_BLKSZ(x)					((x) &lt;&lt; 8)</div><div class='del'>-#define		BUF_SWAP_32BIT					(2 &lt;&lt; 16)</div><div class='del'>-#define		RB_NO_UPDATE					(1 &lt;&lt; 27)</div><div class='del'>-#define		RB_RPTR_WR_ENA					(1 &lt;&lt; 31)</div><div class='del'>-</div><div class='del'>-#define	CP_RB0_RPTR_ADDR				0x3043</div><div class='del'>-#define	CP_RB0_RPTR_ADDR_HI				0x3044</div><div class='del'>-#define	CP_RB0_WPTR					0x3045</div><div class='del'>-</div><div class='del'>-#define	CP_PFP_UCODE_ADDR				0x3054</div><div class='del'>-#define	CP_PFP_UCODE_DATA				0x3055</div><div class='del'>-#define	CP_ME_RAM_RADDR					0x3056</div><div class='del'>-#define	CP_ME_RAM_WADDR					0x3057</div><div class='del'>-#define	CP_ME_RAM_DATA					0x3058</div><div class='del'>-</div><div class='del'>-#define	CP_CE_UCODE_ADDR				0x305A</div><div class='del'>-#define	CP_CE_UCODE_DATA				0x305B</div><div class='del'>-</div><div class='del'>-#define	CP_RB1_BASE					0x3060</div><div class='del'>-#define	CP_RB1_CNTL					0x3061</div><div class='del'>-#define	CP_RB1_RPTR_ADDR				0x3062</div><div class='del'>-#define	CP_RB1_RPTR_ADDR_HI				0x3063</div><div class='del'>-#define	CP_RB1_WPTR					0x3064</div><div class='del'>-#define	CP_RB2_BASE					0x3065</div><div class='del'>-#define	CP_RB2_CNTL					0x3066</div><div class='del'>-#define	CP_RB2_RPTR_ADDR				0x3067</div><div class='del'>-#define	CP_RB2_RPTR_ADDR_HI				0x3068</div><div class='del'>-#define	CP_RB2_WPTR					0x3069</div><div class='del'>-#define CP_INT_CNTL_RING0                               0x306A</div><div class='del'>-#define CP_INT_CNTL_RING1                               0x306B</div><div class='del'>-#define CP_INT_CNTL_RING2                               0x306C</div><div class='del'>-#       define CNTX_BUSY_INT_ENABLE                     (1 &lt;&lt; 19)</div><div class='del'>-#       define CNTX_EMPTY_INT_ENABLE                    (1 &lt;&lt; 20)</div><div class='del'>-#       define WAIT_MEM_SEM_INT_ENABLE                  (1 &lt;&lt; 21)</div><div class='del'>-#       define TIME_STAMP_INT_ENABLE                    (1 &lt;&lt; 26)</div><div class='del'>-#       define CP_RINGID2_INT_ENABLE                    (1 &lt;&lt; 29)</div><div class='del'>-#       define CP_RINGID1_INT_ENABLE                    (1 &lt;&lt; 30)</div><div class='del'>-#       define CP_RINGID0_INT_ENABLE                    (1 &lt;&lt; 31)</div><div class='del'>-#define CP_INT_STATUS_RING0                             0x306D</div><div class='del'>-#define CP_INT_STATUS_RING1                             0x306E</div><div class='del'>-#define CP_INT_STATUS_RING2                             0x306F</div><div class='del'>-#       define WAIT_MEM_SEM_INT_STAT                    (1 &lt;&lt; 21)</div><div class='del'>-#       define TIME_STAMP_INT_STAT                      (1 &lt;&lt; 26)</div><div class='del'>-#       define CP_RINGID2_INT_STAT                      (1 &lt;&lt; 29)</div><div class='del'>-#       define CP_RINGID1_INT_STAT                      (1 &lt;&lt; 30)</div><div class='del'>-#       define CP_RINGID0_INT_STAT                      (1 &lt;&lt; 31)</div><div class='del'>-</div><div class='ctx'> // #define PA_SC_RASTER_CONFIG                             0xA0D4</div><div class='ctx'> #	define RB_XSEL2(x)				((x) &lt;&lt; 4)</div><div class='ctx'> #	define RB_XSEL2_MASK				(0x3 &lt;&lt; 4)</div><div class='hunk'>@@ -1185,171 +311,14 @@</div><div class='ctx'> #	define SE_YSEL(x)				((x) &lt;&lt; 28)</div><div class='ctx'> #	define SE_YSEL_MASK				(0x3 &lt;&lt; 28)</div><div class='ctx'> </div><div class='del'>-/* PIF PHY0 registers idx/data 0x8/0xc */</div><div class='del'>-#define PB0_PIF_CNTL                                      0x10</div><div class='del'>-#       define LS2_EXIT_TIME(x)                           ((x) &lt;&lt; 17)</div><div class='del'>-#       define LS2_EXIT_TIME_MASK                         (0x7 &lt;&lt; 17)</div><div class='del'>-#       define LS2_EXIT_TIME_SHIFT                        17</div><div class='del'>-#define PB0_PIF_PAIRING                                   0x11</div><div class='del'>-#       define MULTI_PIF                                  (1 &lt;&lt; 25)</div><div class='del'>-#define PB0_PIF_PWRDOWN_0                                 0x12</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_0(x)               ((x) &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_0_MASK             (0x7 &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_0_SHIFT            7</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_0(x)                ((x) &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_0_MASK              (0x7 &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_0_SHIFT             10</div><div class='del'>-#       define PLL_RAMP_UP_TIME_0(x)                      ((x) &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_0_MASK                    (0x7 &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_0_SHIFT                   24</div><div class='del'>-#define PB0_PIF_PWRDOWN_1                                 0x13</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_1(x)               ((x) &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_1_MASK             (0x7 &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_1_SHIFT            7</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_1(x)                ((x) &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_1_MASK              (0x7 &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_1_SHIFT             10</div><div class='del'>-#       define PLL_RAMP_UP_TIME_1(x)                      ((x) &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_1_MASK                    (0x7 &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_1_SHIFT                   24</div><div class='del'>-</div><div class='del'>-#define PB0_PIF_PWRDOWN_2                                 0x17</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_2(x)               ((x) &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_2_MASK             (0x7 &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_2_SHIFT            7</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_2(x)                ((x) &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_2_MASK              (0x7 &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_2_SHIFT             10</div><div class='del'>-#       define PLL_RAMP_UP_TIME_2(x)                      ((x) &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_2_MASK                    (0x7 &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_2_SHIFT                   24</div><div class='del'>-#define PB0_PIF_PWRDOWN_3                                 0x18</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_3(x)               ((x) &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_3_MASK             (0x7 &lt;&lt; 7)</div><div class='del'>-#       define PLL_POWER_STATE_IN_TXS2_3_SHIFT            7</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_3(x)                ((x) &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_3_MASK              (0x7 &lt;&lt; 10)</div><div class='del'>-#       define PLL_POWER_STATE_IN_OFF_3_SHIFT             10</div><div class='del'>-#       define PLL_RAMP_UP_TIME_3(x)                      ((x) &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_3_MASK                    (0x7 &lt;&lt; 24)</div><div class='del'>-#       define PLL_RAMP_UP_TIME_3_SHIFT                   24</div><div class='del'>-/* PIF PHY1 registers idx/data 0x10/0x14 */</div><div class='del'>-#define PB1_PIF_CNTL                                      0x10</div><div class='del'>-#define PB1_PIF_PAIRING                                   0x11</div><div class='del'>-#define PB1_PIF_PWRDOWN_0                                 0x12</div><div class='del'>-#define PB1_PIF_PWRDOWN_1                                 0x13</div><div class='del'>-</div><div class='del'>-#define PB1_PIF_PWRDOWN_2                                 0x17</div><div class='del'>-#define PB1_PIF_PWRDOWN_3                                 0x18</div><div class='del'>-/* PCIE registers idx/data 0x30/0x34 */</div><div class='del'>-#define PCIE_CNTL2                                        0x1c /* PCIE */</div><div class='del'>-#       define SLV_MEM_LS_EN                              (1 &lt;&lt; 16)</div><div class='del'>-#       define SLV_MEM_AGGRESSIVE_LS_EN                   (1 &lt;&lt; 17)</div><div class='del'>-#       define MST_MEM_LS_EN                              (1 &lt;&lt; 18)</div><div class='del'>-#       define REPLAY_MEM_LS_EN                           (1 &lt;&lt; 19)</div><div class='del'>-#define PCIE_LC_STATUS1                                   0x28 /* PCIE */</div><div class='del'>-#       define LC_REVERSE_RCVR                            (1 &lt;&lt; 0)</div><div class='del'>-#       define LC_REVERSE_XMIT                            (1 &lt;&lt; 1)</div><div class='del'>-#       define LC_OPERATING_LINK_WIDTH_MASK               (0x7 &lt;&lt; 2)</div><div class='del'>-#       define LC_OPERATING_LINK_WIDTH_SHIFT              2</div><div class='del'>-#       define LC_DETECTED_LINK_WIDTH_MASK                (0x7 &lt;&lt; 5)</div><div class='del'>-#       define LC_DETECTED_LINK_WIDTH_SHIFT               5</div><div class='del'>-</div><div class='del'>-#define PCIE_P_CNTL                                       0x40 /* PCIE */</div><div class='del'>-#       define P_IGNORE_EDB_ERR                           (1 &lt;&lt; 6)</div><div class='del'>-</div><div class='ctx'> /* PCIE PORT registers idx/data 0x38/0x3c */</div><div class='del'>-#define PCIE_LC_CNTL                                      0xa0</div><div class='del'>-#       define LC_L0S_INACTIVITY(x)                       ((x) &lt;&lt; 8)</div><div class='del'>-#       define LC_L0S_INACTIVITY_MASK                     (0xf &lt;&lt; 8)</div><div class='del'>-#       define LC_L0S_INACTIVITY_SHIFT                    8</div><div class='del'>-#       define LC_L1_INACTIVITY(x)                        ((x) &lt;&lt; 12)</div><div class='del'>-#       define LC_L1_INACTIVITY_MASK                      (0xf &lt;&lt; 12)</div><div class='del'>-#       define LC_L1_INACTIVITY_SHIFT                     12</div><div class='del'>-#       define LC_PMI_TO_L1_DIS                           (1 &lt;&lt; 16)</div><div class='del'>-#       define LC_ASPM_TO_L1_DIS                          (1 &lt;&lt; 24)</div><div class='del'>-#define PCIE_LC_LINK_WIDTH_CNTL                           0xa2 /* PCIE_P */</div><div class='del'>-#       define LC_LINK_WIDTH_SHIFT                        0</div><div class='del'>-#       define LC_LINK_WIDTH_MASK                         0x7</div><div class='add'>+// #define PCIE_LC_LINK_WIDTH_CNTL                           0xa2 /* PCIE_P */</div><div class='ctx'> #       define LC_LINK_WIDTH_X0                           0</div><div class='ctx'> #       define LC_LINK_WIDTH_X1                           1</div><div class='ctx'> #       define LC_LINK_WIDTH_X2                           2</div><div class='ctx'> #       define LC_LINK_WIDTH_X4                           3</div><div class='ctx'> #       define LC_LINK_WIDTH_X8                           4</div><div class='ctx'> #       define LC_LINK_WIDTH_X16                          6</div><div class='del'>-#       define LC_LINK_WIDTH_RD_SHIFT                     4</div><div class='del'>-#       define LC_LINK_WIDTH_RD_MASK                      0x70</div><div class='del'>-#       define LC_RECONFIG_ARC_MISSING_ESCAPE             (1 &lt;&lt; 7)</div><div class='del'>-#       define LC_RECONFIG_NOW                            (1 &lt;&lt; 8)</div><div class='del'>-#       define LC_RENEGOTIATION_SUPPORT                   (1 &lt;&lt; 9)</div><div class='del'>-#       define LC_RENEGOTIATE_EN                          (1 &lt;&lt; 10)</div><div class='del'>-#       define LC_SHORT_RECONFIG_EN                       (1 &lt;&lt; 11)</div><div class='del'>-#       define LC_UPCONFIGURE_SUPPORT                     (1 &lt;&lt; 12)</div><div class='del'>-#       define LC_UPCONFIGURE_DIS                         (1 &lt;&lt; 13)</div><div class='del'>-#       define LC_DYN_LANES_PWR_STATE(x)                  ((x) &lt;&lt; 21)</div><div class='del'>-#       define LC_DYN_LANES_PWR_STATE_MASK                (0x3 &lt;&lt; 21)</div><div class='del'>-#       define LC_DYN_LANES_PWR_STATE_SHIFT               21</div><div class='del'>-#define PCIE_LC_N_FTS_CNTL                                0xa3 /* PCIE_P */</div><div class='del'>-#       define LC_XMIT_N_FTS(x)                           ((x) &lt;&lt; 0)</div><div class='del'>-#       define LC_XMIT_N_FTS_MASK                         (0xff &lt;&lt; 0)</div><div class='del'>-#       define LC_XMIT_N_FTS_SHIFT                        0</div><div class='del'>-#       define LC_XMIT_N_FTS_OVERRIDE_EN                  (1 &lt;&lt; 8)</div><div class='del'>-#       define LC_N_FTS_MASK                              (0xff &lt;&lt; 24)</div><div class='del'>-#define PCIE_LC_SPEED_CNTL                                0xa4 /* PCIE_P */</div><div class='del'>-#       define LC_GEN2_EN_STRAP                           (1 &lt;&lt; 0)</div><div class='del'>-#       define LC_GEN3_EN_STRAP                           (1 &lt;&lt; 1)</div><div class='del'>-#       define LC_TARGET_LINK_SPEED_OVERRIDE_EN           (1 &lt;&lt; 2)</div><div class='del'>-#       define LC_TARGET_LINK_SPEED_OVERRIDE_MASK         (0x3 &lt;&lt; 3)</div><div class='del'>-#       define LC_TARGET_LINK_SPEED_OVERRIDE_SHIFT        3</div><div class='del'>-#       define LC_FORCE_EN_SW_SPEED_CHANGE                (1 &lt;&lt; 5)</div><div class='del'>-#       define LC_FORCE_DIS_SW_SPEED_CHANGE               (1 &lt;&lt; 6)</div><div class='del'>-#       define LC_FORCE_EN_HW_SPEED_CHANGE                (1 &lt;&lt; 7)</div><div class='del'>-#       define LC_FORCE_DIS_HW_SPEED_CHANGE               (1 &lt;&lt; 8)</div><div class='del'>-#       define LC_INITIATE_LINK_SPEED_CHANGE              (1 &lt;&lt; 9)</div><div class='del'>-#       define LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_MASK      (0x3 &lt;&lt; 10)</div><div class='del'>-#       define LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_SHIFT     10</div><div class='del'>-#       define LC_CURRENT_DATA_RATE_MASK                  (0x3 &lt;&lt; 13) /* 0/1/2 = gen1/2/3 */</div><div class='del'>-#       define LC_CURRENT_DATA_RATE_SHIFT                 13</div><div class='del'>-#       define LC_CLR_FAILED_SPD_CHANGE_CNT               (1 &lt;&lt; 16)</div><div class='del'>-#       define LC_OTHER_SIDE_EVER_SENT_GEN2               (1 &lt;&lt; 18)</div><div class='del'>-#       define LC_OTHER_SIDE_SUPPORTS_GEN2                (1 &lt;&lt; 19)</div><div class='del'>-#       define LC_OTHER_SIDE_EVER_SENT_GEN3               (1 &lt;&lt; 20)</div><div class='del'>-#       define LC_OTHER_SIDE_SUPPORTS_GEN3                (1 &lt;&lt; 21)</div><div class='del'>-</div><div class='del'>-#define PCIE_LC_CNTL2                                     0xb1</div><div class='del'>-#       define LC_ALLOW_PDWN_IN_L1                        (1 &lt;&lt; 17)</div><div class='del'>-#       define LC_ALLOW_PDWN_IN_L23                       (1 &lt;&lt; 18)</div><div class='del'>-</div><div class='del'>-#define PCIE_LC_CNTL3                                     0xb5 /* PCIE_P */</div><div class='del'>-#       define LC_GO_TO_RECOVERY                          (1 &lt;&lt; 30)</div><div class='del'>-#define PCIE_LC_CNTL4                                     0xb6 /* PCIE_P */</div><div class='del'>-#       define LC_REDO_EQ                                 (1 &lt;&lt; 5)</div><div class='del'>-#       define LC_SET_QUIESCE                             (1 &lt;&lt; 13)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * UVD</div><div class='del'>- */</div><div class='del'>-#define UVD_UDEC_ADDR_CONFIG				0x3bd3</div><div class='del'>-#define UVD_UDEC_DB_ADDR_CONFIG				0x3bd4</div><div class='del'>-#define UVD_UDEC_DBW_ADDR_CONFIG			0x3bd5</div><div class='del'>-#define UVD_RBC_RB_RPTR					0x3da4</div><div class='del'>-#define UVD_RBC_RB_WPTR					0x3da5</div><div class='del'>-#define UVD_STATUS					0x3daf</div><div class='del'>-</div><div class='del'>-#define	UVD_CGC_CTRL					0x3dc2</div><div class='del'>-#	define DCM					(1 &lt;&lt; 0)</div><div class='del'>-#	define CG_DT(x)					((x) &lt;&lt; 2)</div><div class='del'>-#	define CG_DT_MASK				(0xf &lt;&lt; 2)</div><div class='del'>-#	define CLK_OD(x)				((x) &lt;&lt; 6)</div><div class='del'>-#	define CLK_OD_MASK				(0x1f &lt;&lt; 6)</div><div class='del'>-</div><div class='del'>- /* UVD CTX indirect */</div><div class='del'>-#define	UVD_CGC_MEM_CTRL				0xC0</div><div class='del'>-#define	UVD_CGC_CTRL2					0xC1</div><div class='del'>-#	define DYN_OR_EN				(1 &lt;&lt; 0)</div><div class='del'>-#	define DYN_RR_EN				(1 &lt;&lt; 1)</div><div class='del'>-#	define G_DIV_ID(x)				((x) &lt;&lt; 2)</div><div class='del'>-#	define G_DIV_ID_MASK				(0x7 &lt;&lt; 2)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * PM4</div><div class='hunk'>@@ -1583,45 +552,7 @@</div><div class='ctx'> /* ASYNC DMA - first instance at 0xd000, second at 0xd800 */</div><div class='ctx'> #define DMA0_REGISTER_OFFSET                              0x0 /* not a register */</div><div class='ctx'> #define DMA1_REGISTER_OFFSET                              0x200 /* not a register */</div><div class='del'>-</div><div class='del'>-#define DMA_RB_CNTL                                       0x3400</div><div class='del'>-#       define DMA_RB_ENABLE                              (1 &lt;&lt; 0)</div><div class='del'>-#       define DMA_RB_SIZE(x)                             ((x) &lt;&lt; 1) /* log2 */</div><div class='del'>-#       define DMA_RB_SWAP_ENABLE                         (1 &lt;&lt; 9) /* 8IN32 */</div><div class='del'>-#       define DMA_RPTR_WRITEBACK_ENABLE                  (1 &lt;&lt; 12)</div><div class='del'>-#       define DMA_RPTR_WRITEBACK_SWAP_ENABLE             (1 &lt;&lt; 13)  /* 8IN32 */</div><div class='del'>-#       define DMA_RPTR_WRITEBACK_TIMER(x)                ((x) &lt;&lt; 16) /* log2 */</div><div class='del'>-#define DMA_RB_BASE                                       0x3401</div><div class='del'>-#define DMA_RB_RPTR                                       0x3402</div><div class='del'>-#define DMA_RB_WPTR                                       0x3403</div><div class='del'>-</div><div class='del'>-#define DMA_RB_RPTR_ADDR_HI                               0x3407</div><div class='del'>-#define DMA_RB_RPTR_ADDR_LO                               0x3408</div><div class='del'>-</div><div class='del'>-#define DMA_IB_CNTL                                       0x3409</div><div class='del'>-#       define DMA_IB_ENABLE                              (1 &lt;&lt; 0)</div><div class='del'>-#       define DMA_IB_SWAP_ENABLE                         (1 &lt;&lt; 4)</div><div class='del'>-#       define CMD_VMID_FORCE                             (1 &lt;&lt; 31)</div><div class='del'>-#define DMA_IB_RPTR                                       0x340a</div><div class='del'>-#define DMA_CNTL                                          0x340b</div><div class='del'>-#       define TRAP_ENABLE                                (1 &lt;&lt; 0)</div><div class='del'>-#       define SEM_INCOMPLETE_INT_ENABLE                  (1 &lt;&lt; 1)</div><div class='del'>-#       define SEM_WAIT_INT_ENABLE                        (1 &lt;&lt; 2)</div><div class='del'>-#       define DATA_SWAP_ENABLE                           (1 &lt;&lt; 3)</div><div class='del'>-#       define FENCE_SWAP_ENABLE                          (1 &lt;&lt; 4)</div><div class='del'>-#       define CTXEMPTY_INT_ENABLE                        (1 &lt;&lt; 28)</div><div class='del'>-#define DMA_STATUS_REG                                    0x340d</div><div class='del'>-#       define DMA_IDLE                                   (1 &lt;&lt; 0)</div><div class='del'>-#define DMA_TILING_CONFIG  				  0x342e</div><div class='del'>-</div><div class='del'>-#define	DMA_POWER_CNTL					0x342f</div><div class='del'>-#       define MEM_POWER_OVERRIDE                       (1 &lt;&lt; 8)</div><div class='del'>-#define	DMA_CLK_CTRL					0x3430</div><div class='del'>-</div><div class='del'>-#define	DMA_PG						0x3435</div><div class='del'>-#	define PG_CNTL_ENABLE				(1 &lt;&lt; 0)</div><div class='del'>-#define	DMA_PGFSM_CONFIG				0x3436</div><div class='del'>-#define	DMA_PGFSM_WRITE					0x3437</div><div class='add'>+#define SDMA_MAX_INSTANCE 2</div><div class='ctx'> </div><div class='ctx'> #define DMA_PACKET(cmd, b, t, s, n)	((((cmd) &amp; 0xF) &lt;&lt; 28) |	\</div><div class='ctx'> 					 (((b) &amp; 0x1) &lt;&lt; 26) |		\</div><div class='hunk'>@@ -1650,6 +581,7 @@</div><div class='ctx'> #define	DMA_PACKET_POLL_REG_MEM				  0xe</div><div class='ctx'> #define	DMA_PACKET_NOP					  0xf</div><div class='ctx'> </div><div class='add'>+/* VCE */</div><div class='ctx'> #define VCE_STATUS					0x20004</div><div class='ctx'> #define VCE_VCPU_CNTL					0x20014</div><div class='ctx'> #define		VCE_CLK_EN				(1 &lt;&lt; 0)</div><div class='hunk'>@@ -1726,378 +658,118 @@</div><div class='ctx'> </div><div class='ctx'> #define CURSOR_WIDTH 64</div><div class='ctx'> #define CURSOR_HEIGHT 64</div><div class='del'>-#define AMDGPU_MM_INDEX		        0x0000</div><div class='del'>-#define AMDGPU_MM_DATA		        0x0001</div><div class='del'>-</div><div class='del'>-#define VERDE_NUM_CRTC 6</div><div class='del'>-#define	BLACKOUT_MODE_MASK			0x00000007</div><div class='del'>-#define	VGA_RENDER_CONTROL			0xC0</div><div class='del'>-#define R_000300_VGA_RENDER_CONTROL             0xC0</div><div class='del'>-#define C_000300_VGA_VSTATUS_CNTL               0xFFFCFFFF</div><div class='del'>-#define EVERGREEN_CRTC_STATUS                   0x1BA3</div><div class='del'>-#define EVERGREEN_CRTC_V_BLANK                  (1 &lt;&lt; 0)</div><div class='del'>-#define EVERGREEN_CRTC_STATUS_POSITION          0x1BA4</div><div class='del'>-/* CRTC blocks at 0x6df0, 0x79f0, 0x105f0, 0x111f0, 0x11df0, 0x129f0 */</div><div class='del'>-#define EVERGREEN_CRTC_V_BLANK_START_END                0x1b8d</div><div class='del'>-#define EVERGREEN_CRTC_CONTROL                          0x1b9c</div><div class='del'>-#define EVERGREEN_CRTC_MASTER_EN                 (1 &lt;&lt; 0)</div><div class='del'>-#define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 &lt;&lt; 24)</div><div class='del'>-#define EVERGREEN_CRTC_BLANK_CONTROL                    0x1b9d</div><div class='del'>-#define EVERGREEN_CRTC_BLANK_DATA_EN             (1 &lt;&lt; 8)</div><div class='del'>-#define EVERGREEN_CRTC_V_BLANK                   (1 &lt;&lt; 0)</div><div class='del'>-#define EVERGREEN_CRTC_STATUS_HV_COUNT                  0x1ba8</div><div class='del'>-#define EVERGREEN_CRTC_UPDATE_LOCK                      0x1bb5</div><div class='del'>-#define EVERGREEN_MASTER_UPDATE_LOCK                    0x1bbd</div><div class='del'>-#define EVERGREEN_MASTER_UPDATE_MODE                    0x1bbe</div><div class='del'>-#define EVERGREEN_GRPH_UPDATE_LOCK               (1 &lt;&lt; 16)</div><div class='del'>-#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH     0x1a07</div><div class='del'>-#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH   0x1a08</div><div class='del'>-#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS          0x1a04</div><div class='del'>-#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS        0x1a05</div><div class='del'>-#define EVERGREEN_GRPH_UPDATE                           0x1a11</div><div class='del'>-#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS               0xc4</div><div class='del'>-#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH          0xc9</div><div class='del'>-#define EVERGREEN_GRPH_SURFACE_UPDATE_PENDING    (1 &lt;&lt; 2)</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_DATA_FORMAT                           0x1ac0</div><div class='del'>-#       define EVERGREEN_INTERLEAVE_EN                  (1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define R600_D1GRPH_ARRAY_MODE_LINEAR_GENERAL            (0 &lt;&lt; 20)</div><div class='del'>-#define R600_D1GRPH_ARRAY_MODE_LINEAR_ALIGNED            (1 &lt;&lt; 20)</div><div class='del'>-#define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1            (2 &lt;&lt; 20)</div><div class='del'>-#define R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1            (4 &lt;&lt; 20)</div><div class='del'>-</div><div class='del'>-#define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH                0x1a45</div><div class='del'>-#define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH                0x1845</div><div class='del'>-</div><div class='del'>-#define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH              0x1847</div><div class='del'>-#define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH              0x1a47</div><div class='del'>-</div><div class='del'>-#define R600_D1GRPH_SWAP_CONTROL                               0x1843</div><div class='del'>-#define R600_D1GRPH_SWAP_ENDIAN_NONE                    (0 &lt;&lt; 0)</div><div class='del'>-#define R600_D1GRPH_SWAP_ENDIAN_16BIT                   (1 &lt;&lt; 0)</div><div class='del'>-#define R600_D1GRPH_SWAP_ENDIAN_32BIT                   (2 &lt;&lt; 0)</div><div class='del'>-#define R600_D1GRPH_SWAP_ENDIAN_64BIT                   (3 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define AVIVO_D1VGA_CONTROL					0x00cc</div><div class='del'>-#       define AVIVO_DVGA_CONTROL_MODE_ENABLE            (1 &lt;&lt; 0)</div><div class='del'>-#       define AVIVO_DVGA_CONTROL_TIMING_SELECT          (1 &lt;&lt; 8)</div><div class='del'>-#       define AVIVO_DVGA_CONTROL_SYNC_POLARITY_SELECT   (1 &lt;&lt; 9)</div><div class='del'>-#       define AVIVO_DVGA_CONTROL_OVERSCAN_TIMING_SELECT (1 &lt;&lt; 10)</div><div class='del'>-#       define AVIVO_DVGA_CONTROL_OVERSCAN_COLOR_EN      (1 &lt;&lt; 16)</div><div class='del'>-#       define AVIVO_DVGA_CONTROL_ROTATE                 (1 &lt;&lt; 24)</div><div class='del'>-#define AVIVO_D2VGA_CONTROL					0x00ce</div><div class='del'>-</div><div class='del'>-#define R600_BUS_CNTL                                           0x1508</div><div class='del'>-#       define R600_BIOS_ROM_DIS                                (1 &lt;&lt; 1)</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> #define R600_ROM_CNTL                              0x580</div><div class='ctx'> #       define R600_SCK_OVERWRITE                  (1 &lt;&lt; 1)</div><div class='ctx'> #       define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT 28</div><div class='ctx'> #       define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK  (0xf &lt;&lt; 28)</div><div class='ctx'> </div><div class='del'>-#define FMT_BIT_DEPTH_CONTROL                0x1bf2</div><div class='del'>-#define FMT_TRUNCATE_EN               (1 &lt;&lt; 0)</div><div class='del'>-#define FMT_TRUNCATE_DEPTH            (1 &lt;&lt; 4)</div><div class='del'>-#define FMT_SPATIAL_DITHER_EN         (1 &lt;&lt; 8)</div><div class='del'>-#define FMT_SPATIAL_DITHER_MODE(x)    ((x) &lt;&lt; 9)</div><div class='del'>-#define FMT_SPATIAL_DITHER_DEPTH      (1 &lt;&lt; 12)</div><div class='del'>-#define FMT_FRAME_RANDOM_ENABLE       (1 &lt;&lt; 13)</div><div class='del'>-#define FMT_RGB_RANDOM_ENABLE         (1 &lt;&lt; 14)</div><div class='del'>-#define FMT_HIGHPASS_RANDOM_ENABLE    (1 &lt;&lt; 15)</div><div class='del'>-#define FMT_TEMPORAL_DITHER_EN        (1 &lt;&lt; 16)</div><div class='del'>-#define FMT_TEMPORAL_DITHER_DEPTH     (1 &lt;&lt; 20)</div><div class='del'>-#define FMT_TEMPORAL_DITHER_OFFSET(x) ((x) &lt;&lt; 21)</div><div class='del'>-#define FMT_TEMPORAL_LEVEL            (1 &lt;&lt; 24)</div><div class='del'>-#define FMT_TEMPORAL_DITHER_RESET     (1 &lt;&lt; 25)</div><div class='del'>-#define FMT_25FRC_SEL(x)              ((x) &lt;&lt; 26)</div><div class='del'>-#define FMT_50FRC_SEL(x)              ((x) &lt;&lt; 28)</div><div class='del'>-#define FMT_75FRC_SEL(x)              ((x) &lt;&lt; 30)</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_DC_LUT_CONTROL                        0x1a80</div><div class='del'>-#define EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE              0x1a81</div><div class='del'>-#define EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN             0x1a82</div><div class='del'>-#define EVERGREEN_DC_LUT_BLACK_OFFSET_RED               0x1a83</div><div class='del'>-#define EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE              0x1a84</div><div class='del'>-#define EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN             0x1a85</div><div class='del'>-#define EVERGREEN_DC_LUT_WHITE_OFFSET_RED               0x1a86</div><div class='del'>-#define EVERGREEN_DC_LUT_30_COLOR                       0x1a7c</div><div class='del'>-#define EVERGREEN_DC_LUT_RW_INDEX                       0x1a79</div><div class='del'>-#define EVERGREEN_DC_LUT_WRITE_EN_MASK                  0x1a7e</div><div class='del'>-#define EVERGREEN_DC_LUT_RW_MODE                        0x1a78</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_GRPH_ENABLE                           0x1a00</div><div class='del'>-#define EVERGREEN_GRPH_CONTROL                          0x1a01</div><div class='del'>-#define EVERGREEN_GRPH_DEPTH(x)                  (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#define EVERGREEN_GRPH_DEPTH_8BPP                0</div><div class='del'>-#define EVERGREEN_GRPH_DEPTH_16BPP               1</div><div class='del'>-#define EVERGREEN_GRPH_DEPTH_32BPP               2</div><div class='del'>-#define EVERGREEN_GRPH_NUM_BANKS(x)              (((x) &amp; 0x3) &lt;&lt; 2)</div><div class='del'>-#define EVERGREEN_ADDR_SURF_2_BANK               0</div><div class='del'>-#define EVERGREEN_ADDR_SURF_4_BANK               1</div><div class='del'>-#define EVERGREEN_ADDR_SURF_8_BANK               2</div><div class='del'>-#define EVERGREEN_ADDR_SURF_16_BANK              3</div><div class='del'>-#define EVERGREEN_GRPH_Z(x)                      (((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-#define EVERGREEN_GRPH_BANK_WIDTH(x)             (((x) &amp; 0x3) &lt;&lt; 6)</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_WIDTH_1         0</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_WIDTH_2         1</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_WIDTH_4         2</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_WIDTH_8         3</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT(x)                 (((x) &amp; 0x7) &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_INDEXED            0</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_ARGB1555           0</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_ARGB565            1</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_ARGB4444           2</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_AI88               3</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_MONO16             4</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_BGRA5551           5</div><div class='add'>+#define GRPH_ARRAY_LINEAR_GENERAL      0</div><div class='add'>+#define GRPH_ARRAY_LINEAR_ALIGNED      1</div><div class='add'>+#define GRPH_ARRAY_1D_TILED_THIN1      2</div><div class='add'>+#define GRPH_ARRAY_2D_TILED_THIN1      4</div><div class='add'>+</div><div class='add'>+#define ES_AND_GS_AUTO       3</div><div class='add'>+#define BUF_SWAP_32BIT       (2 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+#define GRPH_DEPTH_8BPP                0</div><div class='add'>+#define GRPH_DEPTH_16BPP               1</div><div class='add'>+#define GRPH_DEPTH_32BPP               2</div><div class='add'>+</div><div class='add'>+/* 8 BPP */</div><div class='add'>+#define GRPH_FORMAT_INDEXED            0</div><div class='add'>+</div><div class='add'>+/* 16 BPP */</div><div class='add'>+#define GRPH_FORMAT_ARGB1555           0</div><div class='add'>+#define GRPH_FORMAT_ARGB565            1</div><div class='add'>+#define GRPH_FORMAT_ARGB4444           2</div><div class='add'>+#define GRPH_FORMAT_AI88               3</div><div class='add'>+#define GRPH_FORMAT_MONO16             4</div><div class='add'>+#define GRPH_FORMAT_BGRA5551           5</div><div class='ctx'> </div><div class='ctx'> /* 32 BPP */</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_ARGB8888           0</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_ARGB2101010        1</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_32BPP_DIG          2</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_8B_ARGB2101010     3</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_BGRA1010102        4</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102     5</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_RGB111110          6</div><div class='del'>-#define EVERGREEN_GRPH_FORMAT_BGR101111          7</div><div class='del'>-#define EVERGREEN_GRPH_BANK_HEIGHT(x)            (((x) &amp; 0x3) &lt;&lt; 11)</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_HEIGHT_1        0</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_HEIGHT_2        1</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_HEIGHT_4        2</div><div class='del'>-#define EVERGREEN_ADDR_SURF_BANK_HEIGHT_8        3</div><div class='del'>-#define EVERGREEN_GRPH_TILE_SPLIT(x)             (((x) &amp; 0x7) &lt;&lt; 13)</div><div class='del'>-#define EVERGREEN_ADDR_SURF_TILE_SPLIT_64B       0</div><div class='del'>-#define EVERGREEN_ADDR_SURF_TILE_SPLIT_128B      1</div><div class='del'>-#define EVERGREEN_ADDR_SURF_TILE_SPLIT_256B      2</div><div class='del'>-#define EVERGREEN_ADDR_SURF_TILE_SPLIT_512B      3</div><div class='del'>-#define EVERGREEN_ADDR_SURF_TILE_SPLIT_1KB       4</div><div class='del'>-#define EVERGREEN_ADDR_SURF_TILE_SPLIT_2KB       5</div><div class='del'>-#define EVERGREEN_ADDR_SURF_TILE_SPLIT_4KB       6</div><div class='del'>-#define EVERGREEN_GRPH_MACRO_TILE_ASPECT(x)      (((x) &amp; 0x3) &lt;&lt; 18)</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_1  0</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_2  1</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4  2</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_8  3</div><div class='del'>-#define EVERGREEN_GRPH_ARRAY_MODE(x)             (((x) &amp; 0x7) &lt;&lt; 20)</div><div class='del'>-#define EVERGREEN_GRPH_ARRAY_LINEAR_GENERAL      0</div><div class='del'>-#define EVERGREEN_GRPH_ARRAY_LINEAR_ALIGNED      1</div><div class='del'>-#define EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1      2</div><div class='del'>-#define EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1      4</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_1  0</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_2  1</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_4  2</div><div class='del'>-#define EVERGREEN_ADDR_SURF_MACRO_TILE_ASPECT_8  3</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_GRPH_SWAP_CONTROL                     0x1a03</div><div class='del'>-#define EVERGREEN_GRPH_ENDIAN_SWAP(x)            (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#       define EVERGREEN_GRPH_ENDIAN_NONE               0</div><div class='del'>-#       define EVERGREEN_GRPH_ENDIAN_8IN16              1</div><div class='del'>-#       define EVERGREEN_GRPH_ENDIAN_8IN32              2</div><div class='del'>-#       define EVERGREEN_GRPH_ENDIAN_8IN64              3</div><div class='del'>-#define EVERGREEN_GRPH_RED_CROSSBAR(x)           (((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-#       define EVERGREEN_GRPH_RED_SEL_R                 0</div><div class='del'>-#       define EVERGREEN_GRPH_RED_SEL_G                 1</div><div class='del'>-#       define EVERGREEN_GRPH_RED_SEL_B                 2</div><div class='del'>-#       define EVERGREEN_GRPH_RED_SEL_A                 3</div><div class='del'>-#define EVERGREEN_GRPH_GREEN_CROSSBAR(x)         (((x) &amp; 0x3) &lt;&lt; 6)</div><div class='del'>-#       define EVERGREEN_GRPH_GREEN_SEL_G               0</div><div class='del'>-#       define EVERGREEN_GRPH_GREEN_SEL_B               1</div><div class='del'>-#       define EVERGREEN_GRPH_GREEN_SEL_A               2</div><div class='del'>-#       define EVERGREEN_GRPH_GREEN_SEL_R               3</div><div class='del'>-#define EVERGREEN_GRPH_BLUE_CROSSBAR(x)          (((x) &amp; 0x3) &lt;&lt; 8)</div><div class='del'>-#       define EVERGREEN_GRPH_BLUE_SEL_B                0</div><div class='del'>-#       define EVERGREEN_GRPH_BLUE_SEL_A                1</div><div class='del'>-#       define EVERGREEN_GRPH_BLUE_SEL_R                2</div><div class='del'>-#       define EVERGREEN_GRPH_BLUE_SEL_G                3</div><div class='del'>-#define EVERGREEN_GRPH_ALPHA_CROSSBAR(x)         (((x) &amp; 0x3) &lt;&lt; 10)</div><div class='del'>-#       define EVERGREEN_GRPH_ALPHA_SEL_A               0</div><div class='del'>-#       define EVERGREEN_GRPH_ALPHA_SEL_R               1</div><div class='del'>-#       define EVERGREEN_GRPH_ALPHA_SEL_G               2</div><div class='del'>-#       define EVERGREEN_GRPH_ALPHA_SEL_B               3</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_D3VGA_CONTROL                         0xf8</div><div class='del'>-#define EVERGREEN_D4VGA_CONTROL                         0xf9</div><div class='del'>-#define EVERGREEN_D5VGA_CONTROL                         0xfa</div><div class='del'>-#define EVERGREEN_D6VGA_CONTROL                         0xfb</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_GRPH_SURFACE_ADDRESS_MASK      0xffffff00</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_GRPH_LUT_10BIT_BYPASS_CONTROL         0x1a02</div><div class='del'>-#define EVERGREEN_LUT_10BIT_BYPASS_EN            (1 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_GRPH_PITCH                            0x1a06</div><div class='del'>-#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH     0x1a07</div><div class='del'>-#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH   0x1a08</div><div class='del'>-#define EVERGREEN_GRPH_SURFACE_OFFSET_X                 0x1a09</div><div class='del'>-#define EVERGREEN_GRPH_SURFACE_OFFSET_Y                 0x1a0a</div><div class='del'>-#define EVERGREEN_GRPH_X_START                          0x1a0b</div><div class='del'>-#define EVERGREEN_GRPH_Y_START                          0x1a0c</div><div class='del'>-#define EVERGREEN_GRPH_X_END                            0x1a0d</div><div class='del'>-#define EVERGREEN_GRPH_Y_END                            0x1a0e</div><div class='del'>-#define EVERGREEN_GRPH_UPDATE                           0x1a11</div><div class='del'>-#define EVERGREEN_GRPH_SURFACE_UPDATE_PENDING    (1 &lt;&lt; 2)</div><div class='del'>-#define EVERGREEN_GRPH_UPDATE_LOCK               (1 &lt;&lt; 16)</div><div class='del'>-#define EVERGREEN_GRPH_FLIP_CONTROL                     0x1a12</div><div class='del'>-#define EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN (1 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-#define EVERGREEN_VIEWPORT_START                        0x1b5c</div><div class='del'>-#define EVERGREEN_VIEWPORT_SIZE                         0x1b5d</div><div class='del'>-#define EVERGREEN_DESKTOP_HEIGHT                        0x1ac1</div><div class='del'>-</div><div class='del'>-/* CUR blocks at 0x6998, 0x7598, 0x10198, 0x10d98, 0x11998, 0x12598 */</div><div class='del'>-#define EVERGREEN_CUR_CONTROL                           0x1a66</div><div class='del'>-#       define EVERGREEN_CURSOR_EN                      (1 &lt;&lt; 0)</div><div class='del'>-#       define EVERGREEN_CURSOR_MODE(x)                 (((x) &amp; 0x3) &lt;&lt; 8)</div><div class='del'>-#       define EVERGREEN_CURSOR_MONO                    0</div><div class='del'>-#       define EVERGREEN_CURSOR_24_1                    1</div><div class='del'>-#       define EVERGREEN_CURSOR_24_8_PRE_MULT           2</div><div class='del'>-#       define EVERGREEN_CURSOR_24_8_UNPRE_MULT         3</div><div class='del'>-#       define EVERGREEN_CURSOR_2X_MAGNIFY              (1 &lt;&lt; 16)</div><div class='del'>-#       define EVERGREEN_CURSOR_FORCE_MC_ON             (1 &lt;&lt; 20)</div><div class='del'>-#       define EVERGREEN_CURSOR_URGENT_CONTROL(x)       (((x) &amp; 0x7) &lt;&lt; 24)</div><div class='del'>-#       define EVERGREEN_CURSOR_URGENT_ALWAYS           0</div><div class='del'>-#       define EVERGREEN_CURSOR_URGENT_1_8              1</div><div class='del'>-#       define EVERGREEN_CURSOR_URGENT_1_4              2</div><div class='del'>-#       define EVERGREEN_CURSOR_URGENT_3_8              3</div><div class='del'>-#       define EVERGREEN_CURSOR_URGENT_1_2              4</div><div class='del'>-#define EVERGREEN_CUR_SURFACE_ADDRESS                   0x1a67</div><div class='del'>-#       define EVERGREEN_CUR_SURFACE_ADDRESS_MASK       0xfffff000</div><div class='del'>-#define EVERGREEN_CUR_SIZE                              0x1a68</div><div class='del'>-#define EVERGREEN_CUR_SURFACE_ADDRESS_HIGH              0x1a69</div><div class='del'>-#define EVERGREEN_CUR_POSITION                          0x1a6a</div><div class='del'>-#define EVERGREEN_CUR_HOT_SPOT                          0x1a6b</div><div class='del'>-#define EVERGREEN_CUR_COLOR1                            0x1a6c</div><div class='del'>-#define EVERGREEN_CUR_COLOR2                            0x1a6d</div><div class='del'>-#define EVERGREEN_CUR_UPDATE                            0x1a6e</div><div class='del'>-#       define EVERGREEN_CURSOR_UPDATE_PENDING          (1 &lt;&lt; 0)</div><div class='del'>-#       define EVERGREEN_CURSOR_UPDATE_TAKEN            (1 &lt;&lt; 1)</div><div class='del'>-#       define EVERGREEN_CURSOR_UPDATE_LOCK             (1 &lt;&lt; 16)</div><div class='del'>-#       define EVERGREEN_CURSOR_DISABLE_MULTIPLE_UPDATE (1 &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define NI_INPUT_CSC_CONTROL                           0x1a35</div><div class='del'>-#       define NI_INPUT_CSC_GRPH_MODE(x)               (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#       define NI_INPUT_CSC_BYPASS                     0</div><div class='del'>-#       define NI_INPUT_CSC_PROG_COEFF                 1</div><div class='del'>-#       define NI_INPUT_CSC_PROG_SHARED_MATRIXA        2</div><div class='del'>-#       define NI_INPUT_CSC_OVL_MODE(x)                (((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define NI_OUTPUT_CSC_CONTROL                          0x1a3c</div><div class='del'>-#       define NI_OUTPUT_CSC_GRPH_MODE(x)              (((x) &amp; 0x7) &lt;&lt; 0)</div><div class='del'>-#       define NI_OUTPUT_CSC_BYPASS                    0</div><div class='del'>-#       define NI_OUTPUT_CSC_TV_RGB                    1</div><div class='del'>-#       define NI_OUTPUT_CSC_YCBCR_601                 2</div><div class='del'>-#       define NI_OUTPUT_CSC_YCBCR_709                 3</div><div class='del'>-#       define NI_OUTPUT_CSC_PROG_COEFF                4</div><div class='del'>-#       define NI_OUTPUT_CSC_PROG_SHARED_MATRIXB       5</div><div class='del'>-#       define NI_OUTPUT_CSC_OVL_MODE(x)               (((x) &amp; 0x7) &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define NI_DEGAMMA_CONTROL                             0x1a58</div><div class='del'>-#       define NI_GRPH_DEGAMMA_MODE(x)                 (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#       define NI_DEGAMMA_BYPASS                       0</div><div class='del'>-#       define NI_DEGAMMA_SRGB_24                      1</div><div class='del'>-#       define NI_DEGAMMA_XVYCC_222                    2</div><div class='del'>-#       define NI_OVL_DEGAMMA_MODE(x)                  (((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-#       define NI_ICON_DEGAMMA_MODE(x)                 (((x) &amp; 0x3) &lt;&lt; 8)</div><div class='del'>-#       define NI_CURSOR_DEGAMMA_MODE(x)               (((x) &amp; 0x3) &lt;&lt; 12)</div><div class='del'>-</div><div class='del'>-#define NI_GAMUT_REMAP_CONTROL                         0x1a59</div><div class='del'>-#       define NI_GRPH_GAMUT_REMAP_MODE(x)             (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#       define NI_GAMUT_REMAP_BYPASS                   0</div><div class='del'>-#       define NI_GAMUT_REMAP_PROG_COEFF               1</div><div class='del'>-#       define NI_GAMUT_REMAP_PROG_SHARED_MATRIXA      2</div><div class='del'>-#       define NI_GAMUT_REMAP_PROG_SHARED_MATRIXB      3</div><div class='del'>-#       define NI_OVL_GAMUT_REMAP_MODE(x)              (((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define NI_REGAMMA_CONTROL                             0x1aa0</div><div class='del'>-#       define NI_GRPH_REGAMMA_MODE(x)                 (((x) &amp; 0x7) &lt;&lt; 0)</div><div class='del'>-#       define NI_REGAMMA_BYPASS                       0</div><div class='del'>-#       define NI_REGAMMA_SRGB_24                      1</div><div class='del'>-#       define NI_REGAMMA_XVYCC_222                    2</div><div class='del'>-#       define NI_REGAMMA_PROG_A                       3</div><div class='del'>-#       define NI_REGAMMA_PROG_B                       4</div><div class='del'>-#       define NI_OVL_REGAMMA_MODE(x)                  (((x) &amp; 0x7) &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define NI_PRESCALE_GRPH_CONTROL                       0x1a2d</div><div class='del'>-#       define NI_GRPH_PRESCALE_BYPASS                 (1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define NI_PRESCALE_OVL_CONTROL                        0x1a31</div><div class='del'>-#       define NI_OVL_PRESCALE_BYPASS                  (1 &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define NI_INPUT_GAMMA_CONTROL                         0x1a10</div><div class='del'>-#       define NI_GRPH_INPUT_GAMMA_MODE(x)             (((x) &amp; 0x3) &lt;&lt; 0)</div><div class='del'>-#       define NI_INPUT_GAMMA_USE_LUT                  0</div><div class='del'>-#       define NI_INPUT_GAMMA_BYPASS                   1</div><div class='del'>-#       define NI_INPUT_GAMMA_SRGB_24                  2</div><div class='del'>-#       define NI_INPUT_GAMMA_XVYCC_222                3</div><div class='del'>-#       define NI_OVL_INPUT_GAMMA_MODE(x)              (((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-</div><div class='del'>-#define	BLACKOUT_MODE_MASK			0x00000007</div><div class='del'>-#define	VGA_RENDER_CONTROL			0xC0</div><div class='del'>-#define R_000300_VGA_RENDER_CONTROL             0xC0</div><div class='del'>-#define C_000300_VGA_VSTATUS_CNTL               0xFFFCFFFF</div><div class='del'>-#define EVERGREEN_CRTC_STATUS                   0x1BA3</div><div class='del'>-#define EVERGREEN_CRTC_V_BLANK                  (1 &lt;&lt; 0)</div><div class='del'>-#define EVERGREEN_CRTC_STATUS_POSITION          0x1BA4</div><div class='del'>-/* CRTC blocks at 0x6df0, 0x79f0, 0x105f0, 0x111f0, 0x11df0, 0x129f0 */</div><div class='del'>-#define EVERGREEN_CRTC_V_BLANK_START_END                0x1b8d</div><div class='del'>-#define EVERGREEN_CRTC_CONTROL                          0x1b9c</div><div class='del'>-#       define EVERGREEN_CRTC_MASTER_EN                 (1 &lt;&lt; 0)</div><div class='del'>-#       define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 &lt;&lt; 24)</div><div class='del'>-#define EVERGREEN_CRTC_BLANK_CONTROL                    0x1b9d</div><div class='del'>-#       define EVERGREEN_CRTC_BLANK_DATA_EN             (1 &lt;&lt; 8)</div><div class='del'>-#       define EVERGREEN_CRTC_V_BLANK                   (1 &lt;&lt; 0)</div><div class='del'>-#define EVERGREEN_CRTC_STATUS_HV_COUNT                  0x1ba8</div><div class='del'>-#define EVERGREEN_CRTC_UPDATE_LOCK                      0x1bb5</div><div class='del'>-#define EVERGREEN_MASTER_UPDATE_LOCK                    0x1bbd</div><div class='del'>-#define EVERGREEN_MASTER_UPDATE_MODE                    0x1bbe</div><div class='del'>-#define EVERGREEN_GRPH_UPDATE_LOCK               (1 &lt;&lt; 16)</div><div class='del'>-#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH     0x1a07</div><div class='del'>-#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH   0x1a08</div><div class='del'>-#define EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS          0x1a04</div><div class='del'>-#define EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS        0x1a05</div><div class='del'>-#define EVERGREEN_GRPH_UPDATE                           0x1a11</div><div class='del'>-#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS               0xc4</div><div class='del'>-#define EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH          0xc9</div><div class='del'>-#define EVERGREEN_GRPH_SURFACE_UPDATE_PENDING    (1 &lt;&lt; 2)</div><div class='del'>-</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxRANGE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x10</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxRANGE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x4</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxDUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x80</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxDUMMY_PAGE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x7</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxPDE0_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x400</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxPDE0_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0xa</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxVALID_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x2000</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxVALID_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0xd</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxREAD_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x10000</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxREAD_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x10</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxWRITE_PROTECTION_FAULT_ENABLE_DEFAULT_MASK 0x80000</div><div class='del'>-#define mmVM_CONTEXT1_CNTL__xxWRITE_PROTECTION_FAULT_ENABLE_DEFAULT__SHIFT 0x13</div><div class='del'>-</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxVMID_MASK 0x1e000000</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxVMID__SHIFT 0x19</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxPROTECTIONS_MASK 0xff</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxPROTECTIONS__SHIFT 0x0</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxMEMORY_CLIENT_ID_MASK 0xff000</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxMEMORY_CLIENT_ID__SHIFT 0xc</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxMEMORY_CLIENT_RW_MASK 0x1000000</div><div class='del'>-#define mmVM_CONTEXT1_PROTECTION_FAULT_STATUS__xxMEMORY_CLIENT_RW__SHIFT 0x18</div><div class='del'>-</div><div class='del'>-#define mmMC_SHARED_BLACKOUT_CNTL__xxBLACKOUT_MODE_MASK 0x7</div><div class='del'>-#define mmMC_SHARED_BLACKOUT_CNTL__xxBLACKOUT_MODE__SHIFT 0x0</div><div class='del'>-</div><div class='del'>-#define mmBIF_FB_EN__xxFB_READ_EN_MASK 0x1</div><div class='del'>-#define mmBIF_FB_EN__xxFB_READ_EN__SHIFT 0x0</div><div class='del'>-#define mmBIF_FB_EN__xxFB_WRITE_EN_MASK 0x2</div><div class='del'>-#define mmBIF_FB_EN__xxFB_WRITE_EN__SHIFT 0x1</div><div class='del'>-</div><div class='del'>-#define mmSRBM_SOFT_RESET__xxSOFT_RESET_VMC_MASK 0x20000</div><div class='del'>-#define mmSRBM_SOFT_RESET__xxSOFT_RESET_VMC__SHIFT 0x11</div><div class='del'>-#define mmSRBM_SOFT_RESET__xxSOFT_RESET_MC_MASK 0x800</div><div class='del'>-#define mmSRBM_SOFT_RESET__xxSOFT_RESET_MC__SHIFT 0xb</div><div class='add'>+#define GRPH_FORMAT_ARGB8888           0</div><div class='add'>+#define GRPH_FORMAT_ARGB2101010        1</div><div class='add'>+#define GRPH_FORMAT_32BPP_DIG          2</div><div class='add'>+#define GRPH_FORMAT_8B_ARGB2101010     3</div><div class='add'>+#define GRPH_FORMAT_BGRA1010102        4</div><div class='add'>+#define GRPH_FORMAT_8B_BGRA1010102     5</div><div class='add'>+#define GRPH_FORMAT_RGB111110          6</div><div class='add'>+#define GRPH_FORMAT_BGR101111          7</div><div class='add'>+</div><div class='add'>+#define GRPH_ENDIAN_NONE               0</div><div class='add'>+#define GRPH_ENDIAN_8IN16              1</div><div class='add'>+#define GRPH_ENDIAN_8IN32              2</div><div class='add'>+#define GRPH_ENDIAN_8IN64              3</div><div class='add'>+#define GRPH_RED_SEL_R                 0</div><div class='add'>+#define GRPH_RED_SEL_G                 1</div><div class='add'>+#define GRPH_RED_SEL_B                 2</div><div class='add'>+#define GRPH_RED_SEL_A                 3</div><div class='add'>+</div><div class='add'>+#define GRPH_GREEN_SEL_G               0</div><div class='add'>+#define GRPH_GREEN_SEL_B               1</div><div class='add'>+#define GRPH_GREEN_SEL_A               2</div><div class='add'>+#define GRPH_GREEN_SEL_R               3</div><div class='add'>+</div><div class='add'>+#define GRPH_BLUE_SEL_B                0</div><div class='add'>+#define GRPH_BLUE_SEL_A                1</div><div class='add'>+#define GRPH_BLUE_SEL_R                2</div><div class='add'>+#define GRPH_BLUE_SEL_G                3</div><div class='add'>+</div><div class='add'>+#define GRPH_ALPHA_SEL_A               0</div><div class='add'>+#define GRPH_ALPHA_SEL_R               1</div><div class='add'>+#define GRPH_ALPHA_SEL_G               2</div><div class='add'>+#define GRPH_ALPHA_SEL_B               3</div><div class='add'>+</div><div class='add'>+/* CUR_CONTROL */</div><div class='add'>+	#define CURSOR_MONO                    0</div><div class='add'>+	#define CURSOR_24_1                    1</div><div class='add'>+	#define CURSOR_24_8_PRE_MULT           2</div><div class='add'>+	#define CURSOR_24_8_UNPRE_MULT         3</div><div class='add'>+	#define CURSOR_URGENT_ALWAYS           0</div><div class='add'>+	#define CURSOR_URGENT_1_8              1</div><div class='add'>+	#define CURSOR_URGENT_1_4              2</div><div class='add'>+	#define CURSOR_URGENT_3_8              3</div><div class='add'>+	#define CURSOR_URGENT_1_2              4</div><div class='add'>+</div><div class='add'>+/* INPUT_CSC_CONTROL */</div><div class='add'>+#       define INPUT_CSC_BYPASS                     0</div><div class='add'>+#       define INPUT_CSC_PROG_COEFF                 1</div><div class='add'>+#       define INPUT_CSC_PROG_SHARED_MATRIXA        2</div><div class='add'>+</div><div class='add'>+/* OUTPUT_CSC_CONTROL */</div><div class='add'>+#       define OUTPUT_CSC_BYPASS                    0</div><div class='add'>+#       define OUTPUT_CSC_TV_RGB                    1</div><div class='add'>+#       define OUTPUT_CSC_YCBCR_601                 2</div><div class='add'>+#       define OUTPUT_CSC_YCBCR_709                 3</div><div class='add'>+#       define OUTPUT_CSC_PROG_COEFF                4</div><div class='add'>+#       define OUTPUT_CSC_PROG_SHARED_MATRIXB       5</div><div class='add'>+</div><div class='add'>+/* DEGAMMA_CONTROL */</div><div class='add'>+#       define DEGAMMA_BYPASS                       0</div><div class='add'>+#       define DEGAMMA_SRGB_24                      1</div><div class='add'>+#       define DEGAMMA_XVYCC_222                    2</div><div class='add'>+</div><div class='add'>+/* GAMUT_REMAP_CONTROL */</div><div class='add'>+#       define GAMUT_REMAP_BYPASS                   0</div><div class='add'>+#       define GAMUT_REMAP_PROG_COEFF               1</div><div class='add'>+#       define GAMUT_REMAP_PROG_SHARED_MATRIXA      2</div><div class='add'>+#       define GAMUT_REMAP_PROG_SHARED_MATRIXB      3</div><div class='add'>+</div><div class='add'>+/* REGAMMA_CONTROL */</div><div class='add'>+#       define REGAMMA_BYPASS                       0</div><div class='add'>+#       define REGAMMA_SRGB_24                      1</div><div class='add'>+#       define REGAMMA_XVYCC_222                    2</div><div class='add'>+#       define REGAMMA_PROG_A                       3</div><div class='add'>+#       define REGAMMA_PROG_B                       4</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* INPUT_GAMMA_CONTROL */</div><div class='add'>+#       define INPUT_GAMMA_USE_LUT                  0</div><div class='add'>+#       define INPUT_GAMMA_BYPASS                   1</div><div class='add'>+#       define INPUT_GAMMA_SRGB_24                  2</div><div class='add'>+#       define INPUT_GAMMA_XVYCC_222                3</div><div class='ctx'> </div><div class='ctx'> #define MC_SEQ_MISC0__MT__MASK	0xf0000000</div><div class='ctx'> #define MC_SEQ_MISC0__MT__GDDR1  0x10000000</div><div class='hunk'>@@ -2113,20 +785,9 @@</div><div class='ctx'> #define PACKET3_SEM_SEL_SIGNAL	    (0x6 &lt;&lt; 29)</div><div class='ctx'> #define PACKET3_SEM_SEL_WAIT	    (0x7 &lt;&lt; 29)</div><div class='ctx'> </div><div class='del'>-#define CONFIG_CNTL	0x1509</div><div class='del'>-#define CC_DRM_ID_STRAPS	0X1559</div><div class='ctx'> #define AMDGPU_PCIE_INDEX	0xc</div><div class='ctx'> #define AMDGPU_PCIE_DATA	0xd</div><div class='ctx'> </div><div class='del'>-#define DMA_SEM_INCOMPLETE_TIMER_CNTL                     0x3411</div><div class='del'>-#define DMA_SEM_WAIT_FAIL_TIMER_CNTL                      0x3412</div><div class='del'>-#define DMA_MODE                                          0x342f</div><div class='del'>-#define DMA_RB_RPTR_ADDR_HI                               0x3407</div><div class='del'>-#define DMA_RB_RPTR_ADDR_LO                               0x3408</div><div class='del'>-#define DMA_BUSY_MASK 0x20</div><div class='del'>-#define DMA1_BUSY_MASK 0X40</div><div class='del'>-#define SDMA_MAX_INSTANCE 2</div><div class='del'>-</div><div class='ctx'> #define PCIE_BUS_CLK    10000</div><div class='ctx'> #define TCLK            (PCIE_BUS_CLK / 10)</div><div class='ctx'> #define	PCIE_PORT_INDEX					0xe</div><div class='hunk'>@@ -2136,8 +797,6 @@</div><div class='ctx'> #define EVERGREEN_PIF_PHY1_INDEX                        0x10</div><div class='ctx'> #define EVERGREEN_PIF_PHY1_DATA				0x14</div><div class='ctx'> </div><div class='del'>-#define	MC_VM_FB_OFFSET					0x81a</div><div class='del'>-</div><div class='ctx'> /* Discrete VCE clocks */</div><div class='ctx'> #define CG_VCEPLL_FUNC_CNTL                             0xc0030600</div><div class='ctx'> #define    VCEPLL_RESET_MASK                            0x00000001</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c<br/>index 659eab9b90be..c457be3a3c56 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/soc15.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/soc15.c</a></div><div class='hunk'>@@ -584,6 +584,8 @@ soc15_asic_reset_method(struct amdgpu_device *adev)</div><div class='ctx'> 		 * Enable triggering of GPU reset only if specified</div><div class='ctx'> 		 * by module parameter.</div><div class='ctx'> 		 */</div><div class='add'>+		if (adev-&gt;pcie_reset_ctx.in_link_reset)</div><div class='add'>+			return AMD_RESET_METHOD_LINK;</div><div class='ctx'> 		if (amdgpu_gpu_recovery == 4 || amdgpu_gpu_recovery == 5)</div><div class='ctx'> 			return AMD_RESET_METHOD_MODE2;</div><div class='ctx'> 		else if (!(adev-&gt;flags &amp; AMD_IS_APU))</div><div class='hunk'>@@ -640,6 +642,9 @@ asic_reset:</div><div class='ctx'> 	case AMD_RESET_METHOD_MODE2:</div><div class='ctx'> 		dev_info(adev-&gt;dev, "MODE2 reset\n");</div><div class='ctx'> 		return amdgpu_dpm_mode2_reset(adev);</div><div class='add'>+	case AMD_RESET_METHOD_LINK:</div><div class='add'>+		dev_info(adev-&gt;dev, "Link reset\n");</div><div class='add'>+		return amdgpu_device_link_reset(adev);</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_info(adev-&gt;dev, "MODE1 reset\n");</div><div class='ctx'> 		return amdgpu_device_mode1_reset(adev);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/soc15d.h b/drivers/gpu/drm/amd/amdgpu/soc15d.h<br/>index a5000c171c02..cf93fa477674 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15d.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/soc15d.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/soc15d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/soc15d.h</a></div><div class='hunk'>@@ -552,6 +552,11 @@</div><div class='ctx'> #              define PACKET3_QUERY_STATUS_DOORBELL_OFFSET(x)  ((x) &lt;&lt; 2)</div><div class='ctx'> #              define PACKET3_QUERY_STATUS_ENG_SEL(x)          ((x) &lt;&lt; 25)</div><div class='ctx'> </div><div class='add'>+#define PACKET3_RUN_CLEANER_SHADER_9_0                      0xD7</div><div class='add'>+/* 1. header</div><div class='add'>+ * 2. RESERVED [31:0]</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> #define PACKET3_RUN_CLEANER_SHADER                      0xD2</div><div class='ctx'> /* 1. header</div><div class='ctx'>  * 2. RESERVED [31:0]</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c<br/>index 0e404c074975..e590cbdd8de9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.c</a></div><div class='hunk'>@@ -174,19 +174,76 @@ static void umc_v12_0_query_ras_error_count(struct amdgpu_device *adev,</div><div class='ctx'> 	umc_v12_0_reset_error_count(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void umc_v12_0_get_retire_flip_bits(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	enum amdgpu_memory_partition nps = AMDGPU_NPS1_PARTITION_MODE;</div><div class='add'>+	uint32_t vram_type = adev-&gt;gmc.vram_type;</div><div class='add'>+	struct amdgpu_umc_flip_bits *flip_bits = &amp;(adev-&gt;umc.flip_bits);</div><div class='add'>+</div><div class='add'>+	if (adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode)</div><div class='add'>+		nps = adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode(adev);</div><div class='add'>+</div><div class='add'>+	/* default setting */</div><div class='add'>+	flip_bits-&gt;flip_bits_in_pa[0] = UMC_V12_0_PA_C2_BIT;</div><div class='add'>+	flip_bits-&gt;flip_bits_in_pa[1] = UMC_V12_0_PA_C3_BIT;</div><div class='add'>+	flip_bits-&gt;flip_bits_in_pa[2] = UMC_V12_0_PA_C4_BIT;</div><div class='add'>+	flip_bits-&gt;flip_bits_in_pa[3] = UMC_V12_0_PA_R13_BIT;</div><div class='add'>+	flip_bits-&gt;flip_row_bit = 13;</div><div class='add'>+	flip_bits-&gt;bit_num = 4;</div><div class='add'>+	flip_bits-&gt;r13_in_pa = UMC_V12_0_PA_R13_BIT;</div><div class='add'>+</div><div class='add'>+	if (nps == AMDGPU_NPS2_PARTITION_MODE) {</div><div class='add'>+		flip_bits-&gt;flip_bits_in_pa[0] = UMC_V12_0_PA_CH5_BIT;</div><div class='add'>+		flip_bits-&gt;flip_bits_in_pa[1] = UMC_V12_0_PA_C2_BIT;</div><div class='add'>+		flip_bits-&gt;flip_bits_in_pa[2] = UMC_V12_0_PA_B1_BIT;</div><div class='add'>+		flip_bits-&gt;r13_in_pa = UMC_V12_0_PA_R12_BIT;</div><div class='add'>+	} else if (nps == AMDGPU_NPS4_PARTITION_MODE) {</div><div class='add'>+		flip_bits-&gt;flip_bits_in_pa[0] = UMC_V12_0_PA_CH4_BIT;</div><div class='add'>+		flip_bits-&gt;flip_bits_in_pa[1] = UMC_V12_0_PA_CH5_BIT;</div><div class='add'>+		flip_bits-&gt;flip_bits_in_pa[2] = UMC_V12_0_PA_B0_BIT;</div><div class='add'>+		flip_bits-&gt;r13_in_pa = UMC_V12_0_PA_R11_BIT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (vram_type) {</div><div class='add'>+	case AMDGPU_VRAM_TYPE_HBM:</div><div class='add'>+		/* other nps modes are taken as nps1 */</div><div class='add'>+		if (nps == AMDGPU_NPS2_PARTITION_MODE)</div><div class='add'>+			flip_bits-&gt;flip_bits_in_pa[3] = UMC_V12_0_PA_R12_BIT;</div><div class='add'>+		else if (nps == AMDGPU_NPS4_PARTITION_MODE)</div><div class='add'>+			flip_bits-&gt;flip_bits_in_pa[3] = UMC_V12_0_PA_R11_BIT;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case AMDGPU_VRAM_TYPE_HBM3E:</div><div class='add'>+		flip_bits-&gt;flip_bits_in_pa[3] = UMC_V12_0_PA_R12_BIT;</div><div class='add'>+		flip_bits-&gt;flip_row_bit = 12;</div><div class='add'>+</div><div class='add'>+		if (nps == AMDGPU_NPS2_PARTITION_MODE)</div><div class='add'>+			flip_bits-&gt;flip_bits_in_pa[3] = UMC_V12_0_PA_R11_BIT;</div><div class='add'>+		else if (nps == AMDGPU_NPS4_PARTITION_MODE)</div><div class='add'>+			flip_bits-&gt;flip_bits_in_pa[3] = UMC_V12_0_PA_R10_BIT;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(adev-&gt;dev,</div><div class='add'>+			"Unknown HBM type, set RAS retire flip bits to the value in NPS1 mode.\n");</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adev-&gt;umc.retire_unit = 0x1 &lt;&lt; flip_bits-&gt;bit_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int umc_v12_0_convert_error_address(struct amdgpu_device *adev,</div><div class='ctx'> 					struct ras_err_data *err_data,</div><div class='ctx'> 					struct ta_ras_query_address_input *addr_in,</div><div class='ctx'> 					struct ta_ras_query_address_output *addr_out,</div><div class='ctx'> 					bool dump_addr)</div><div class='ctx'> {</div><div class='del'>-	uint32_t col, col_lower, row, row_lower, bank;</div><div class='add'>+	uint32_t col, col_lower, row, row_lower, row_high, bank;</div><div class='ctx'> 	uint32_t channel_index = 0, umc_inst = 0;</div><div class='del'>-	uint32_t i, loop_bits[UMC_V12_0_RETIRE_LOOP_BITS];</div><div class='add'>+	uint32_t i, bit_num, retire_unit, *flip_bits;</div><div class='ctx'> 	uint64_t soc_pa, column, err_addr;</div><div class='ctx'> 	struct ta_ras_query_address_output addr_out_tmp;</div><div class='ctx'> 	struct ta_ras_query_address_output *paddr_out;</div><div class='del'>-	enum amdgpu_memory_partition nps = AMDGPU_NPS1_PARTITION_MODE;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!addr_out)</div><div class='hunk'>@@ -211,46 +268,46 @@ static int umc_v12_0_convert_error_address(struct amdgpu_device *adev,</div><div class='ctx'> 		umc_inst = addr_in-&gt;ma.umc_inst;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	loop_bits[0] = UMC_V12_0_PA_C2_BIT;</div><div class='del'>-	loop_bits[1] = UMC_V12_0_PA_C3_BIT;</div><div class='del'>-	loop_bits[2] = UMC_V12_0_PA_C4_BIT;</div><div class='del'>-	loop_bits[3] = UMC_V12_0_PA_R13_BIT;</div><div class='del'>-</div><div class='del'>-	if (adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode)</div><div class='del'>-		nps = adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode(adev);</div><div class='del'>-</div><div class='del'>-	/* other nps modes are taken as nps1 */</div><div class='del'>-	if (nps == AMDGPU_NPS4_PARTITION_MODE) {</div><div class='del'>-		loop_bits[0] = UMC_V12_0_PA_CH4_BIT;</div><div class='del'>-		loop_bits[1] = UMC_V12_0_PA_CH5_BIT;</div><div class='del'>-		loop_bits[2] = UMC_V12_0_PA_B0_BIT;</div><div class='del'>-		loop_bits[3] = UMC_V12_0_PA_R11_BIT;</div><div class='del'>-	}</div><div class='add'>+	flip_bits = adev-&gt;umc.flip_bits.flip_bits_in_pa;</div><div class='add'>+	bit_num = adev-&gt;umc.flip_bits.bit_num;</div><div class='add'>+	retire_unit = adev-&gt;umc.retire_unit;</div><div class='ctx'> </div><div class='ctx'> 	soc_pa = paddr_out-&gt;pa.pa;</div><div class='ctx'> 	channel_index = paddr_out-&gt;pa.channel_idx;</div><div class='ctx'> 	/* clear loop bits in soc physical address */</div><div class='del'>-	for (i = 0; i &lt; UMC_V12_0_RETIRE_LOOP_BITS; i++)</div><div class='del'>-		soc_pa &amp;= ~BIT_ULL(loop_bits[i]);</div><div class='add'>+	for (i = 0; i &lt; bit_num; i++)</div><div class='add'>+		soc_pa &amp;= ~BIT_ULL(flip_bits[i]);</div><div class='ctx'> </div><div class='ctx'> 	paddr_out-&gt;pa.pa = soc_pa;</div><div class='ctx'> 	/* get column bit 0 and 1 in mca address */</div><div class='ctx'> 	col_lower = (err_addr &gt;&gt; 1) &amp; 0x3ULL;</div><div class='del'>-	/* MA_R13_BIT will be handled later */</div><div class='add'>+	/* extra row bit will be handled later */</div><div class='ctx'> 	row_lower = (err_addr &gt;&gt; UMC_V12_0_MA_R0_BIT) &amp; 0x1fffULL;</div><div class='add'>+	row_lower &amp;= ~BIT_ULL(adev-&gt;umc.flip_bits.flip_row_bit);</div><div class='add'>+</div><div class='add'>+	if (amdgpu_ip_version(adev, GC_HWIP, 0) &gt;= IP_VERSION(9, 5, 0)) {</div><div class='add'>+		row_high = (soc_pa &gt;&gt; adev-&gt;umc.flip_bits.r13_in_pa) &amp; 0x3ULL;</div><div class='add'>+		/* it's 2.25GB in each channel, from MCA address to PA</div><div class='add'>+		 * [R14 R13] is converted if the two bits value are 0x3,</div><div class='add'>+		 * get them from PA instead of MCA address.</div><div class='add'>+		 */</div><div class='add'>+		row_lower |= (row_high &lt;&lt; 13);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!err_data &amp;&amp; !dump_addr)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* loop for all possibilities of retired bits */</div><div class='del'>-	for (column = 0; column &lt; UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL; column++) {</div><div class='add'>+	for (column = 0; column &lt; retire_unit; column++) {</div><div class='ctx'> 		soc_pa = paddr_out-&gt;pa.pa;</div><div class='del'>-		for (i = 0; i &lt; UMC_V12_0_RETIRE_LOOP_BITS; i++)</div><div class='del'>-			soc_pa |= (((column &gt;&gt; i) &amp; 0x1ULL) &lt;&lt; loop_bits[i]);</div><div class='add'>+		for (i = 0; i &lt; bit_num; i++)</div><div class='add'>+			soc_pa |= (((column &gt;&gt; i) &amp; 0x1ULL) &lt;&lt; flip_bits[i]);</div><div class='ctx'> </div><div class='ctx'> 		col = ((column &amp; 0x7) &lt;&lt; 2) | col_lower;</div><div class='del'>-		/* add row bit 13 */</div><div class='del'>-		row = ((column &gt;&gt; 3) &lt;&lt; 13) | row_lower;</div><div class='add'>+		/* handle extra row bit */</div><div class='add'>+		if (bit_num == RETIRE_FLIP_BITS_NUM)</div><div class='add'>+			row = ((column &gt;&gt; 3) &lt;&lt; adev-&gt;umc.flip_bits.flip_row_bit) |</div><div class='add'>+					row_lower;</div><div class='ctx'> </div><div class='ctx'> 		if (dump_addr)</div><div class='ctx'> 			dev_info(adev-&gt;dev,</div><div class='hunk'>@@ -428,8 +485,12 @@ static int umc_v12_0_aca_bank_parser(struct aca_handle *handle, struct aca_bank</div><div class='ctx'> 		bank-&gt;regs[ACA_REG_IDX_ADDR]);</div><div class='ctx'> </div><div class='ctx'> 	ext_error_code = ACA_REG__STATUS__ERRORCODEEXT(status);</div><div class='del'>-	count = ext_error_code == 0 ?</div><div class='del'>-		ACA_REG__MISC0__ERRCNT(bank-&gt;regs[ACA_REG_IDX_MISC0]) : 1ULL;</div><div class='add'>+	if (umc_v12_0_is_deferred_error(adev, status))</div><div class='add'>+		count = ext_error_code == 0 ?</div><div class='add'>+			adev-&gt;umc.err_addr_cnt / adev-&gt;umc.retire_unit : 1ULL;</div><div class='add'>+	else</div><div class='add'>+		count = ext_error_code == 0 ?</div><div class='add'>+			ACA_REG__MISC0__ERRCNT(bank-&gt;regs[ACA_REG_IDX_MISC0]) : 1ULL;</div><div class='ctx'> </div><div class='ctx'> 	return aca_error_cache_log_bank_error(handle, &amp;info, err_type, count);</div><div class='ctx'> }</div><div class='hunk'>@@ -469,8 +530,7 @@ static int umc_v12_0_update_ecc_status(struct amdgpu_device *adev,</div><div class='ctx'> 	uint64_t err_addr, pa_addr = 0;</div><div class='ctx'> 	struct ras_ecc_err *ecc_err;</div><div class='ctx'> 	struct ta_ras_query_address_output addr_out;</div><div class='del'>-	enum amdgpu_memory_partition nps = AMDGPU_NPS1_PARTITION_MODE;</div><div class='del'>-	uint32_t shift_bit = UMC_V12_0_PA_C4_BIT;</div><div class='add'>+	uint32_t shift_bit = adev-&gt;umc.flip_bits.flip_bits_in_pa[2];</div><div class='ctx'> 	int count, ret, i;</div><div class='ctx'> </div><div class='ctx'> 	hwid = REG_GET_FIELD(ipid, MCMP1_IPIDT0, HardwareID);</div><div class='hunk'>@@ -515,11 +575,6 @@ static int umc_v12_0_update_ecc_status(struct amdgpu_device *adev,</div><div class='ctx'> 	ecc_err-&gt;pa_pfn = pa_addr &gt;&gt; AMDGPU_GPU_PAGE_SHIFT;</div><div class='ctx'> 	ecc_err-&gt;channel_idx = addr_out.pa.channel_idx;</div><div class='ctx'> </div><div class='del'>-	if (adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode)</div><div class='del'>-		nps = adev-&gt;gmc.gmc_funcs-&gt;query_mem_partition_mode(adev);</div><div class='del'>-	if (nps == AMDGPU_NPS4_PARTITION_MODE)</div><div class='del'>-		shift_bit = UMC_V12_0_PA_B0_BIT;</div><div class='del'>-</div><div class='ctx'> 	/* If converted pa_pfn is 0, use pa C4 pfn. */</div><div class='ctx'> 	if (!ecc_err-&gt;pa_pfn)</div><div class='ctx'> 		ecc_err-&gt;pa_pfn = BIT_ULL(shift_bit) &gt;&gt; AMDGPU_GPU_PAGE_SHIFT;</div><div class='hunk'>@@ -665,5 +720,6 @@ struct amdgpu_umc_ras umc_v12_0_ras = {</div><div class='ctx'> 	.update_ecc_status = umc_v12_0_update_ecc_status,</div><div class='ctx'> 	.convert_ras_err_addr = umc_v12_0_convert_error_address,</div><div class='ctx'> 	.get_die_id_from_pa = umc_v12_0_get_die_id,</div><div class='add'>+	.get_retire_flip_bits = umc_v12_0_get_retire_flip_bits,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h b/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h<br/>index 9298018d938f..63b7e7254526 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/umc_v12_0.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/umc_v12_0.h</a></div><div class='hunk'>@@ -55,8 +55,6 @@</div><div class='ctx'> #define UMC_V12_0_NA_MAP_PA_NUM        8</div><div class='ctx'> /* R13 bit shift should be considered, double the number */</div><div class='ctx'> #define UMC_V12_0_BAD_PAGE_NUM_PER_CHANNEL (UMC_V12_0_NA_MAP_PA_NUM * 2)</div><div class='del'>-/* C2, C3, C4, R13, four bits in MCA address are looped in retirement */</div><div class='del'>-#define UMC_V12_0_RETIRE_LOOP_BITS 4</div><div class='ctx'> </div><div class='ctx'> /* column bits in SOC physical address */</div><div class='ctx'> #define UMC_V12_0_PA_C2_BIT 15</div><div class='hunk'>@@ -64,13 +62,16 @@</div><div class='ctx'> #define UMC_V12_0_PA_C4_BIT 21</div><div class='ctx'> /* row bits in SOC physical address */</div><div class='ctx'> #define UMC_V12_0_PA_R0_BIT 22</div><div class='add'>+#define UMC_V12_0_PA_R10_BIT 32</div><div class='ctx'> #define UMC_V12_0_PA_R11_BIT 33</div><div class='add'>+#define UMC_V12_0_PA_R12_BIT 34</div><div class='ctx'> #define UMC_V12_0_PA_R13_BIT 35</div><div class='ctx'> /* channel bit in SOC physical address */</div><div class='ctx'> #define UMC_V12_0_PA_CH4_BIT 12</div><div class='ctx'> #define UMC_V12_0_PA_CH5_BIT 13</div><div class='ctx'> /* bank bit in SOC physical address */</div><div class='ctx'> #define UMC_V12_0_PA_B0_BIT 19</div><div class='add'>+#define UMC_V12_0_PA_B1_BIT 20</div><div class='ctx'> /* row bits in MCA address */</div><div class='ctx'> #define UMC_V12_0_MA_R0_BIT 10</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c<br/>index 8e7a36f26e9c..b8d835c9e17e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> </div><div class='ctx'> #define VCN_VID_SOC_ADDRESS_2_0					0x1fa00</div><div class='ctx'> #define VCN1_VID_SOC_ADDRESS_3_0				0x48200</div><div class='add'>+#define VCN1_AON_SOC_ADDRESS_3_0				0x48000</div><div class='ctx'> </div><div class='ctx'> #define mmUVD_CONTEXT_ID_INTERNAL_OFFSET			0x1fd</div><div class='ctx'> #define mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET			0x503</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c<br/>index d716510b8dd6..3eec1b8feaee 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> </div><div class='ctx'> #define VCN_VID_SOC_ADDRESS_2_0					0x1fa00</div><div class='ctx'> #define VCN1_VID_SOC_ADDRESS_3_0				0x48200</div><div class='add'>+#define VCN1_AON_SOC_ADDRESS_3_0				0x48000</div><div class='ctx'> </div><div class='ctx'> #define mmUVD_CONTEXT_ID_INTERNAL_OFFSET			0x27</div><div class='ctx'> #define mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET			0x0f</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br/>index 22ae1939476f..0b19f0ab4480 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> </div><div class='ctx'> #define VCN_VID_SOC_ADDRESS_2_0					0x1fa00</div><div class='ctx'> #define VCN1_VID_SOC_ADDRESS_3_0				0x48200</div><div class='add'>+#define VCN1_AON_SOC_ADDRESS_3_0				0x48000</div><div class='ctx'> </div><div class='ctx'> #define mmUVD_CONTEXT_ID_INTERNAL_OFFSET			0x27</div><div class='ctx'> #define mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET			0x0f</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c<br/>index c6f6392c1c20..8fff470bce87 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c</a></div><div class='hunk'>@@ -46,6 +46,7 @@</div><div class='ctx'> </div><div class='ctx'> #define VCN_VID_SOC_ADDRESS_2_0							0x1fb00</div><div class='ctx'> #define VCN1_VID_SOC_ADDRESS_3_0						0x48300</div><div class='add'>+#define VCN1_AON_SOC_ADDRESS_3_0						0x48000</div><div class='ctx'> </div><div class='ctx'> #define VCN_HARVEST_MMSCH								0</div><div class='ctx'> </div><div class='hunk'>@@ -238,9 +239,9 @@ static int vcn_v4_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			adev-&gt;vcn.inst[i].pause_dpg_mode = vcn_v4_0_pause_dpg_mode;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* TODO: Add queue reset mask when FW fully supports it */</div><div class='ctx'> 	adev-&gt;vcn.supported_reset =</div><div class='ctx'> 		amdgpu_get_soft_full_reset_mask(&amp;adev-&gt;vcn.inst[0].ring_enc[0]);</div><div class='add'>+	adev-&gt;vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(adev)) {</div><div class='ctx'> 		r = amdgpu_virt_alloc_mm_table(adev);</div><div class='hunk'>@@ -614,7 +615,8 @@ static void vcn_v4_0_mc_resume_dpg_mode(struct amdgpu_vcn_inst *vinst,</div><div class='ctx'> </div><div class='ctx'> 	/* VCN global tiling registers */</div><div class='ctx'> 	WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET(</div><div class='del'>-		VCN, 0, regUVD_GFX10_ADDR_CONFIG), adev-&gt;gfx.config.gb_addr_config, 0, indirect);</div><div class='add'>+			VCN, inst_idx, regUVD_GFX10_ADDR_CONFIG),</div><div class='add'>+			adev-&gt;gfx.config.gb_addr_config, 0, indirect);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1945,6 +1947,20 @@ static int vcn_v4_0_ring_patch_cs_in_place(struct amdgpu_cs_parser *p,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vcn_v4_0_ring_reset(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	struct amdgpu_vcn_inst *vinst = &amp;adev-&gt;vcn.inst[ring-&gt;me];</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;vcn.supported_reset &amp; AMDGPU_RESET_TYPE_PER_QUEUE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	vcn_v4_0_stop(vinst);</div><div class='add'>+	vcn_v4_0_start(vinst);</div><div class='add'>+</div><div class='add'>+	return amdgpu_ring_test_helper(ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct amdgpu_ring_funcs vcn_v4_0_unified_ring_vm_funcs = {</div><div class='ctx'> 	.type = AMDGPU_RING_TYPE_VCN_ENC,</div><div class='ctx'> 	.align_mask = 0x3f,</div><div class='hunk'>@@ -1974,6 +1990,7 @@ static struct amdgpu_ring_funcs vcn_v4_0_unified_ring_vm_funcs = {</div><div class='ctx'> 	.emit_wreg = vcn_v2_0_enc_ring_emit_wreg,</div><div class='ctx'> 	.emit_reg_wait = vcn_v2_0_enc_ring_emit_reg_wait,</div><div class='ctx'> 	.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,</div><div class='add'>+	.reset = vcn_v4_0_ring_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c<br/>index 3e176b4b7c69..712e1fba33ce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c</a></div><div class='hunk'>@@ -45,6 +45,7 @@</div><div class='ctx'> </div><div class='ctx'> #define VCN_VID_SOC_ADDRESS_2_0		0x1fb00</div><div class='ctx'> #define VCN1_VID_SOC_ADDRESS_3_0	0x48300</div><div class='add'>+#define VCN1_AON_SOC_ADDRESS_3_0	0x48000</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_hwip_reg_entry vcn_reg_list_4_0_3[] = {</div><div class='ctx'> 	SOC15_REG_ENTRY_STR(VCN, 0, regUVD_POWER_STATUS),</div><div class='hunk'>@@ -287,6 +288,31 @@ static int vcn_v4_0_3_sw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vcn_v4_0_3_hw_init_inst(struct amdgpu_vcn_inst *vinst)</div><div class='add'>+{</div><div class='add'>+	int vcn_inst;</div><div class='add'>+	struct amdgpu_device *adev = vinst-&gt;adev;</div><div class='add'>+	struct amdgpu_ring *ring;</div><div class='add'>+	int inst_idx = vinst-&gt;inst;</div><div class='add'>+</div><div class='add'>+	vcn_inst = GET_INST(VCN, inst_idx);</div><div class='add'>+	ring = &amp;adev-&gt;vcn.inst[inst_idx].ring_enc[0];</div><div class='add'>+	if (ring-&gt;use_doorbell) {</div><div class='add'>+		adev-&gt;nbio.funcs-&gt;vcn_doorbell_range(adev, ring-&gt;use_doorbell,</div><div class='add'>+			(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) + 9 * vcn_inst,</div><div class='add'>+			adev-&gt;vcn.inst[inst_idx].aid_id);</div><div class='add'>+</div><div class='add'>+		WREG32_SOC15(VCN, vcn_inst, regVCN_RB1_DB_CTRL,</div><div class='add'>+			ring-&gt;doorbell_index &lt;&lt; VCN_RB1_DB_CTRL__OFFSET__SHIFT |</div><div class='add'>+			VCN_RB1_DB_CTRL__EN_MASK);</div><div class='add'>+</div><div class='add'>+		/* Read DB_CTRL to flush the write DB_CTRL command. */</div><div class='add'>+		RREG32_SOC15(VCN, vcn_inst, regVCN_RB1_DB_CTRL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * vcn_v4_0_3_hw_init - start and test VCN block</div><div class='ctx'>  *</div><div class='hunk'>@@ -298,7 +324,8 @@ static int vcn_v4_0_3_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> {</div><div class='ctx'> 	struct amdgpu_device *adev = ip_block-&gt;adev;</div><div class='ctx'> 	struct amdgpu_ring *ring;</div><div class='del'>-	int i, r, vcn_inst;</div><div class='add'>+	struct amdgpu_vcn_inst *vinst;</div><div class='add'>+	int i, r;</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_sriov_vf(adev)) {</div><div class='ctx'> 		r = vcn_v4_0_3_start_sriov(adev);</div><div class='hunk'>@@ -321,28 +348,9 @@ static int vcn_v4_0_3_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; ++i) {</div><div class='ctx'> 			struct amdgpu_vcn4_fw_shared *fw_shared;</div><div class='ctx'> </div><div class='del'>-			vcn_inst = GET_INST(VCN, i);</div><div class='ctx'> 			ring = &amp;adev-&gt;vcn.inst[i].ring_enc[0];</div><div class='del'>-</div><div class='del'>-			if (ring-&gt;use_doorbell) {</div><div class='del'>-				adev-&gt;nbio.funcs-&gt;vcn_doorbell_range(</div><div class='del'>-					adev, ring-&gt;use_doorbell,</div><div class='del'>-					(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='del'>-						9 * vcn_inst,</div><div class='del'>-					adev-&gt;vcn.inst[i].aid_id);</div><div class='del'>-</div><div class='del'>-				WREG32_SOC15(</div><div class='del'>-					VCN, GET_INST(VCN, ring-&gt;me),</div><div class='del'>-					regVCN_RB1_DB_CTRL,</div><div class='del'>-					ring-&gt;doorbell_index</div><div class='del'>-							&lt;&lt; VCN_RB1_DB_CTRL__OFFSET__SHIFT |</div><div class='del'>-						VCN_RB1_DB_CTRL__EN_MASK);</div><div class='del'>-</div><div class='del'>-				/* Read DB_CTRL to flush the write DB_CTRL command. */</div><div class='del'>-				RREG32_SOC15(</div><div class='del'>-					VCN, GET_INST(VCN, ring-&gt;me),</div><div class='del'>-					regVCN_RB1_DB_CTRL);</div><div class='del'>-			}</div><div class='add'>+			vinst = &amp;adev-&gt;vcn.inst[i];</div><div class='add'>+			vcn_v4_0_3_hw_init_inst(vinst);</div><div class='ctx'> </div><div class='ctx'> 			/* Re-init fw_shared when RAS fatal error occurred */</div><div class='ctx'> 			fw_shared = adev-&gt;vcn.inst[i].fw_shared.cpu_addr;</div><div class='hunk'>@@ -1563,6 +1571,37 @@ static void vcn_v4_0_3_unified_ring_set_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vcn_v4_0_3_ring_reset(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='add'>+{</div><div class='add'>+	int r = 0;</div><div class='add'>+	int vcn_inst;</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	struct amdgpu_vcn_inst *vinst = &amp;adev-&gt;vcn.inst[ring-&gt;me];</div><div class='add'>+</div><div class='add'>+	if (amdgpu_sriov_vf(ring-&gt;adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;vcn.supported_reset &amp; AMDGPU_RESET_TYPE_PER_QUEUE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	vcn_inst = GET_INST(VCN, ring-&gt;me);</div><div class='add'>+	r = amdgpu_dpm_reset_vcn(adev, 1 &lt;&lt; vcn_inst);</div><div class='add'>+</div><div class='add'>+	if (r) {</div><div class='add'>+		DRM_DEV_ERROR(adev-&gt;dev, "VCN reset fail : %d\n", r);</div><div class='add'>+		return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This flag is not set for VF, assumed to be disabled always */</div><div class='add'>+	if (RREG32_SOC15(VCN, GET_INST(VCN, 0), regVCN_RRMT_CNTL) &amp; 0x100)</div><div class='add'>+		adev-&gt;vcn.caps |= AMDGPU_VCN_CAPS(RRMT_ENABLED);</div><div class='add'>+	vcn_v4_0_3_hw_init_inst(vinst);</div><div class='add'>+	vcn_v4_0_3_start_dpg_mode(vinst, adev-&gt;vcn.inst[ring-&gt;me].indirect_sram);</div><div class='add'>+	r = amdgpu_ring_test_helper(ring);</div><div class='add'>+</div><div class='add'>+	return r;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct amdgpu_ring_funcs vcn_v4_0_3_unified_ring_vm_funcs = {</div><div class='ctx'> 	.type = AMDGPU_RING_TYPE_VCN_ENC,</div><div class='ctx'> 	.align_mask = 0x3f,</div><div class='hunk'>@@ -1591,6 +1630,7 @@ static const struct amdgpu_ring_funcs vcn_v4_0_3_unified_ring_vm_funcs = {</div><div class='ctx'> 	.emit_wreg = vcn_v4_0_3_enc_ring_emit_wreg,</div><div class='ctx'> 	.emit_reg_wait = vcn_v4_0_3_enc_ring_emit_reg_wait,</div><div class='ctx'> 	.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,</div><div class='add'>+	.reset = vcn_v4_0_3_ring_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c<br/>index ba603b2246e2..a09f9a2dd471 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c</a></div><div class='hunk'>@@ -46,6 +46,7 @@</div><div class='ctx'> </div><div class='ctx'> #define VCN_VID_SOC_ADDRESS_2_0						0x1fb00</div><div class='ctx'> #define VCN1_VID_SOC_ADDRESS_3_0					(0x48300 + 0x38000)</div><div class='add'>+#define VCN1_AON_SOC_ADDRESS_3_0					(0x48000 + 0x38000)</div><div class='ctx'> </div><div class='ctx'> #define VCN_HARVEST_MMSCH							0</div><div class='ctx'> </div><div class='hunk'>@@ -207,6 +208,10 @@ static int vcn_v4_0_5_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		if (amdgpu_sriov_vf(adev))</div><div class='ctx'> 			fw_shared-&gt;present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG);</div><div class='ctx'> </div><div class='add'>+		fw_shared-&gt;present_flag_0 |= AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT;</div><div class='add'>+		fw_shared-&gt;drm_key_wa.method =</div><div class='add'>+			AMDGPU_DRM_KEY_INJECT_WORKAROUND_VCNFW_ASD_HANDSHAKING;</div><div class='add'>+</div><div class='ctx'> 		if (amdgpu_vcnfw_log)</div><div class='ctx'> 			amdgpu_vcn_fwlog_init(&amp;adev-&gt;vcn.inst[i]);</div><div class='ctx'> </div><div class='hunk'>@@ -214,6 +219,13 @@ static int vcn_v4_0_5_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			adev-&gt;vcn.inst[i].pause_dpg_mode = vcn_v4_0_5_pause_dpg_mode;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	adev-&gt;vcn.supported_reset = amdgpu_get_soft_full_reset_mask(&amp;adev-&gt;vcn.inst[0].ring_enc[0]);</div><div class='add'>+	adev-&gt;vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;</div><div class='add'>+</div><div class='add'>+	r = amdgpu_vcn_sysfs_reset_mask_init(adev);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='ctx'> 	if (amdgpu_sriov_vf(adev)) {</div><div class='ctx'> 		r = amdgpu_virt_alloc_mm_table(adev);</div><div class='ctx'> 		if (r)</div><div class='hunk'>@@ -1022,6 +1034,10 @@ static int vcn_v4_0_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst,</div><div class='ctx'> 			ring-&gt;doorbell_index &lt;&lt; VCN_RB1_DB_CTRL__OFFSET__SHIFT |</div><div class='ctx'> 			VCN_RB1_DB_CTRL__EN_MASK);</div><div class='ctx'> </div><div class='add'>+	/* Keeping one read-back to ensure all register writes are done, otherwise</div><div class='add'>+	 * it may introduce race conditions */</div><div class='add'>+	RREG32_SOC15(VCN, inst_idx, regVCN_RB1_DB_CTRL);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1204,6 +1220,10 @@ static int vcn_v4_0_5_start(struct amdgpu_vcn_inst *vinst)</div><div class='ctx'> 	WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);</div><div class='ctx'> 	fw_shared-&gt;sq.queue_mode &amp;= ~(FW_QUEUE_RING_RESET | FW_QUEUE_DPG_HOLD_OFF);</div><div class='ctx'> </div><div class='add'>+	/* Keeping one read-back to ensure all register writes are done, otherwise</div><div class='add'>+	 * it may introduce race conditions */</div><div class='add'>+	RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1435,6 +1455,20 @@ static void vcn_v4_0_5_unified_ring_set_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vcn_v4_0_5_ring_reset(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	struct amdgpu_vcn_inst *vinst = &amp;adev-&gt;vcn.inst[ring-&gt;me];</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;vcn.supported_reset &amp; AMDGPU_RESET_TYPE_PER_QUEUE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	vcn_v4_0_5_stop(vinst);</div><div class='add'>+	vcn_v4_0_5_start(vinst);</div><div class='add'>+</div><div class='add'>+	return amdgpu_ring_test_helper(ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct amdgpu_ring_funcs vcn_v4_0_5_unified_ring_vm_funcs = {</div><div class='ctx'> 	.type = AMDGPU_RING_TYPE_VCN_ENC,</div><div class='ctx'> 	.align_mask = 0x3f,</div><div class='hunk'>@@ -1462,6 +1496,7 @@ static struct amdgpu_ring_funcs vcn_v4_0_5_unified_ring_vm_funcs = {</div><div class='ctx'> 	.emit_wreg = vcn_v2_0_enc_ring_emit_wreg,</div><div class='ctx'> 	.emit_reg_wait = vcn_v2_0_enc_ring_emit_reg_wait,</div><div class='ctx'> 	.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,</div><div class='add'>+	.reset = vcn_v4_0_5_ring_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c<br/>index d99d05f42f1d..27dcc6f37a73 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c</a></div><div class='hunk'>@@ -196,9 +196,9 @@ static int vcn_v5_0_0_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			adev-&gt;vcn.inst[i].pause_dpg_mode = vcn_v5_0_0_pause_dpg_mode;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* TODO: Add queue reset mask when FW fully supports it */</div><div class='ctx'> 	adev-&gt;vcn.supported_reset =</div><div class='ctx'> 		amdgpu_get_soft_full_reset_mask(&amp;adev-&gt;vcn.inst[0].ring_enc[0]);</div><div class='add'>+	adev-&gt;vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;</div><div class='ctx'> </div><div class='ctx'> 	vcn_v5_0_0_alloc_ip_dump(adev);</div><div class='ctx'> </div><div class='hunk'>@@ -533,7 +533,8 @@ static void vcn_v5_0_0_mc_resume_dpg_mode(struct amdgpu_vcn_inst *vinst,</div><div class='ctx'> </div><div class='ctx'> 	/* VCN global tiling registers */</div><div class='ctx'> 	WREG32_SOC24_DPG_MODE(inst_idx, SOC24_DPG_MODE_OFFSET(</div><div class='del'>-		VCN, 0, regUVD_GFX10_ADDR_CONFIG), adev-&gt;gfx.config.gb_addr_config, 0, indirect);</div><div class='add'>+		VCN, inst_idx, regUVD_GFX10_ADDR_CONFIG),</div><div class='add'>+		adev-&gt;gfx.config.gb_addr_config, 0, indirect);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='hunk'>@@ -1171,6 +1172,20 @@ static void vcn_v5_0_0_unified_ring_set_wptr(struct amdgpu_ring *ring)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vcn_v5_0_0_ring_reset(struct amdgpu_ring *ring, unsigned int vmid)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = ring-&gt;adev;</div><div class='add'>+	struct amdgpu_vcn_inst *vinst = &amp;adev-&gt;vcn.inst[ring-&gt;me];</div><div class='add'>+</div><div class='add'>+	if (!(adev-&gt;vcn.supported_reset &amp; AMDGPU_RESET_TYPE_PER_QUEUE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	vcn_v5_0_0_stop(vinst);</div><div class='add'>+	vcn_v5_0_0_start(vinst);</div><div class='add'>+</div><div class='add'>+	return amdgpu_ring_test_helper(ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct amdgpu_ring_funcs vcn_v5_0_0_unified_ring_vm_funcs = {</div><div class='ctx'> 	.type = AMDGPU_RING_TYPE_VCN_ENC,</div><div class='ctx'> 	.align_mask = 0x3f,</div><div class='hunk'>@@ -1198,6 +1213,7 @@ static const struct amdgpu_ring_funcs vcn_v5_0_0_unified_ring_vm_funcs = {</div><div class='ctx'> 	.emit_wreg = vcn_v2_0_enc_ring_emit_wreg,</div><div class='ctx'> 	.emit_reg_wait = vcn_v2_0_enc_ring_emit_reg_wait,</div><div class='ctx'> 	.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,</div><div class='add'>+	.reset = vcn_v5_0_0_ring_reset,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c<br/>index 581d8629b9d9..8e843011703c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'> #include "soc15_hw_ip.h"</div><div class='ctx'> #include "vcn_v2_0.h"</div><div class='ctx'> #include "vcn_v4_0_3.h"</div><div class='add'>+#include "mmsch_v5_0.h"</div><div class='ctx'> </div><div class='ctx'> #include "vcn/vcn_5_0_0_offset.h"</div><div class='ctx'> #include "vcn/vcn_5_0_0_sh_mask.h"</div><div class='hunk'>@@ -39,6 +40,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/drm_drv.h&gt;</div><div class='ctx'> </div><div class='add'>+static int vcn_v5_0_1_start_sriov(struct amdgpu_device *adev);</div><div class='ctx'> static void vcn_v5_0_1_set_unified_ring_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static void vcn_v5_0_1_set_irq_funcs(struct amdgpu_device *adev);</div><div class='ctx'> static int vcn_v5_0_1_set_pg_state(struct amdgpu_vcn_inst *vinst,</div><div class='hunk'>@@ -126,7 +128,14 @@ static int vcn_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 		ring = &amp;adev-&gt;vcn.inst[i].ring_enc[0];</div><div class='ctx'> 		ring-&gt;use_doorbell = true;</div><div class='del'>-		ring-&gt;doorbell_index = (adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) + 9 * vcn_inst;</div><div class='add'>+		if (!amdgpu_sriov_vf(adev))</div><div class='add'>+			ring-&gt;doorbell_index =</div><div class='add'>+				(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='add'>+				11 * vcn_inst;</div><div class='add'>+		else</div><div class='add'>+			ring-&gt;doorbell_index =</div><div class='add'>+				(adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='add'>+				32 * vcn_inst;</div><div class='ctx'> </div><div class='ctx'> 		ring-&gt;vm_hub = AMDGPU_MMHUB0(adev-&gt;vcn.inst[i].aid_id);</div><div class='ctx'> 		sprintf(ring-&gt;name, "vcn_unified_%d", adev-&gt;vcn.inst[i].aid_id);</div><div class='hunk'>@@ -143,6 +152,12 @@ static int vcn_v5_0_1_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	adev-&gt;vcn.supported_reset =</div><div class='ctx'> 		amdgpu_get_soft_full_reset_mask(&amp;adev-&gt;vcn.inst[0].ring_enc[0]);</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_sriov_vf(adev)) {</div><div class='add'>+		r = amdgpu_virt_alloc_mm_table(adev);</div><div class='add'>+		if (r)</div><div class='add'>+			return r;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	vcn_v5_0_0_alloc_ip_dump(adev);</div><div class='ctx'> </div><div class='ctx'> 	return amdgpu_vcn_sysfs_reset_mask_init(adev);</div><div class='hunk'>@@ -172,6 +187,9 @@ static int vcn_v5_0_1_sw_fini(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 		drm_dev_exit(idx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_sriov_vf(adev))</div><div class='add'>+		amdgpu_virt_free_mm_table(adev);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; i++) {</div><div class='ctx'> 		r = amdgpu_vcn_suspend(adev, i);</div><div class='ctx'> 		if (r)</div><div class='hunk'>@@ -204,24 +222,38 @@ static int vcn_v5_0_1_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	struct amdgpu_ring *ring;</div><div class='ctx'> 	int i, r, vcn_inst;</div><div class='ctx'> </div><div class='del'>-	if (RREG32_SOC15(VCN, GET_INST(VCN, 0), regVCN_RRMT_CNTL) &amp; 0x100)</div><div class='del'>-		adev-&gt;vcn.caps |= AMDGPU_VCN_CAPS(RRMT_ENABLED);</div><div class='del'>-	for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; ++i) {</div><div class='del'>-		vcn_inst = GET_INST(VCN, i);</div><div class='del'>-		ring = &amp;adev-&gt;vcn.inst[i].ring_enc[0];</div><div class='del'>-</div><div class='del'>-		if (ring-&gt;use_doorbell)</div><div class='del'>-			adev-&gt;nbio.funcs-&gt;vcn_doorbell_range(adev, ring-&gt;use_doorbell,</div><div class='del'>-				((adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='del'>-				 9 * vcn_inst),</div><div class='del'>-				adev-&gt;vcn.inst[i].aid_id);</div><div class='del'>-</div><div class='del'>-		/* Re-init fw_shared, if required */</div><div class='del'>-		vcn_v5_0_1_fw_shared_init(adev, i);</div><div class='del'>-</div><div class='del'>-		r = amdgpu_ring_test_helper(ring);</div><div class='add'>+	if (amdgpu_sriov_vf(adev)) {</div><div class='add'>+		r = vcn_v5_0_1_start_sriov(adev);</div><div class='ctx'> 		if (r)</div><div class='ctx'> 			return r;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; ++i) {</div><div class='add'>+			ring = &amp;adev-&gt;vcn.inst[i].ring_enc[0];</div><div class='add'>+			ring-&gt;wptr = 0;</div><div class='add'>+			ring-&gt;wptr_old = 0;</div><div class='add'>+			vcn_v5_0_1_unified_ring_set_wptr(ring);</div><div class='add'>+			ring-&gt;sched.ready = true;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (RREG32_SOC15(VCN, GET_INST(VCN, 0), regVCN_RRMT_CNTL) &amp; 0x100)</div><div class='add'>+			adev-&gt;vcn.caps |= AMDGPU_VCN_CAPS(RRMT_ENABLED);</div><div class='add'>+		for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; ++i) {</div><div class='add'>+			vcn_inst = GET_INST(VCN, i);</div><div class='add'>+			ring = &amp;adev-&gt;vcn.inst[i].ring_enc[0];</div><div class='add'>+</div><div class='add'>+			if (ring-&gt;use_doorbell)</div><div class='add'>+				adev-&gt;nbio.funcs-&gt;vcn_doorbell_range(adev, ring-&gt;use_doorbell,</div><div class='add'>+					((adev-&gt;doorbell_index.vcn.vcn_ring0_1 &lt;&lt; 1) +</div><div class='add'>+					11 * vcn_inst),</div><div class='add'>+					adev-&gt;vcn.inst[i].aid_id);</div><div class='add'>+</div><div class='add'>+			/* Re-init fw_shared, if required */</div><div class='add'>+			vcn_v5_0_1_fw_shared_init(adev, i);</div><div class='add'>+</div><div class='add'>+			r = amdgpu_ring_test_helper(ring);</div><div class='add'>+			if (r)</div><div class='add'>+				return r;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -503,6 +535,52 @@ static void vcn_v5_0_1_enable_clock_gating(struct amdgpu_vcn_inst *vinst)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * vcn_v5_0_1_pause_dpg_mode - VCN pause with dpg mode</div><div class='add'>+ *</div><div class='add'>+ * @vinst: VCN instance</div><div class='add'>+ * @new_state: pause state</div><div class='add'>+ *</div><div class='add'>+ * Pause dpg mode for VCN block</div><div class='add'>+ */</div><div class='add'>+static int vcn_v5_0_1_pause_dpg_mode(struct amdgpu_vcn_inst *vinst,</div><div class='add'>+				     struct dpg_pause_state *new_state)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = vinst-&gt;adev;</div><div class='add'>+	uint32_t reg_data = 0;</div><div class='add'>+	int vcn_inst;</div><div class='add'>+</div><div class='add'>+	vcn_inst = GET_INST(VCN, vinst-&gt;inst);</div><div class='add'>+</div><div class='add'>+	/* pause/unpause if state is changed */</div><div class='add'>+	if (vinst-&gt;pause_state.fw_based != new_state-&gt;fw_based) {</div><div class='add'>+		DRM_DEV_DEBUG(adev-&gt;dev, "dpg pause state changed %d -&gt; %d %s\n",</div><div class='add'>+			vinst-&gt;pause_state.fw_based, new_state-&gt;fw_based,</div><div class='add'>+			new_state-&gt;fw_based ? "VCN_DPG_STATE__PAUSE" : "VCN_DPG_STATE__UNPAUSE");</div><div class='add'>+		reg_data = RREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE) &amp;</div><div class='add'>+			(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);</div><div class='add'>+</div><div class='add'>+		if (new_state-&gt;fw_based == VCN_DPG_STATE__PAUSE) {</div><div class='add'>+			/* pause DPG */</div><div class='add'>+			reg_data |= UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;</div><div class='add'>+			WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);</div><div class='add'>+</div><div class='add'>+			/* wait for ACK */</div><div class='add'>+			SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_DPG_PAUSE,</div><div class='add'>+					UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,</div><div class='add'>+					UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);</div><div class='add'>+		} else {</div><div class='add'>+			/* unpause DPG, no need to wait */</div><div class='add'>+			reg_data &amp;= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;</div><div class='add'>+			WREG32_SOC15(VCN, vcn_inst, regUVD_DPG_PAUSE, reg_data);</div><div class='add'>+		}</div><div class='add'>+		vinst-&gt;pause_state.fw_based = new_state-&gt;fw_based;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * vcn_v5_0_1_start_dpg_mode - VCN start with dpg mode</div><div class='ctx'>  *</div><div class='ctx'>  * @vinst: VCN instance</div><div class='hunk'>@@ -518,6 +596,7 @@ static int vcn_v5_0_1_start_dpg_mode(struct amdgpu_vcn_inst *vinst,</div><div class='ctx'> 	volatile struct amdgpu_vcn5_fw_shared *fw_shared =</div><div class='ctx'> 		adev-&gt;vcn.inst[inst_idx].fw_shared.cpu_addr;</div><div class='ctx'> 	struct amdgpu_ring *ring;</div><div class='add'>+	struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__PAUSE};</div><div class='ctx'> 	int vcn_inst;</div><div class='ctx'> 	uint32_t tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -582,6 +661,9 @@ static int vcn_v5_0_1_start_dpg_mode(struct amdgpu_vcn_inst *vinst,</div><div class='ctx'> 	if (indirect)</div><div class='ctx'> 		amdgpu_vcn_psp_update_sram(adev, inst_idx, AMDGPU_UCODE_ID_VCN0_RAM);</div><div class='ctx'> </div><div class='add'>+	/* Pause dpg */</div><div class='add'>+	vcn_v5_0_1_pause_dpg_mode(vinst, &amp;state);</div><div class='add'>+</div><div class='ctx'> 	ring = &amp;adev-&gt;vcn.inst[inst_idx].ring_enc[0];</div><div class='ctx'> </div><div class='ctx'> 	WREG32_SOC15(VCN, vcn_inst, regUVD_RB_BASE_LO, lower_32_bits(ring-&gt;gpu_addr));</div><div class='hunk'>@@ -613,6 +695,195 @@ static int vcn_v5_0_1_start_dpg_mode(struct amdgpu_vcn_inst *vinst,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int vcn_v5_0_1_start_sriov(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	int i, vcn_inst;</div><div class='add'>+	struct amdgpu_ring *ring_enc;</div><div class='add'>+	uint64_t cache_addr;</div><div class='add'>+	uint64_t rb_enc_addr;</div><div class='add'>+	uint64_t ctx_addr;</div><div class='add'>+	uint32_t param, resp, expected;</div><div class='add'>+	uint32_t offset, cache_size;</div><div class='add'>+	uint32_t tmp, timeout;</div><div class='add'>+</div><div class='add'>+	struct amdgpu_mm_table *table = &amp;adev-&gt;virt.mm_table;</div><div class='add'>+	uint32_t *table_loc;</div><div class='add'>+	uint32_t table_size;</div><div class='add'>+	uint32_t size, size_dw;</div><div class='add'>+	uint32_t init_status;</div><div class='add'>+	uint32_t enabled_vcn;</div><div class='add'>+</div><div class='add'>+	struct mmsch_v5_0_cmd_direct_write</div><div class='add'>+		direct_wt = { {0} };</div><div class='add'>+	struct mmsch_v5_0_cmd_direct_read_modify_write</div><div class='add'>+		direct_rd_mod_wt = { {0} };</div><div class='add'>+	struct mmsch_v5_0_cmd_end end = { {0} };</div><div class='add'>+	struct mmsch_v5_0_init_header header;</div><div class='add'>+</div><div class='add'>+	volatile struct amdgpu_vcn5_fw_shared *fw_shared;</div><div class='add'>+	volatile struct amdgpu_fw_shared_rb_setup *rb_setup;</div><div class='add'>+</div><div class='add'>+	direct_wt.cmd_header.command_type =</div><div class='add'>+		MMSCH_COMMAND__DIRECT_REG_WRITE;</div><div class='add'>+	direct_rd_mod_wt.cmd_header.command_type =</div><div class='add'>+		MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE;</div><div class='add'>+	end.cmd_header.command_type = MMSCH_COMMAND__END;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adev-&gt;vcn.num_vcn_inst; i++) {</div><div class='add'>+		vcn_inst = GET_INST(VCN, i);</div><div class='add'>+</div><div class='add'>+		vcn_v5_0_1_fw_shared_init(adev, vcn_inst);</div><div class='add'>+</div><div class='add'>+		memset(&amp;header, 0, sizeof(struct mmsch_v5_0_init_header));</div><div class='add'>+		header.version = MMSCH_VERSION;</div><div class='add'>+		header.total_size = sizeof(struct mmsch_v5_0_init_header) &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+		table_loc = (uint32_t *)table-&gt;cpu_addr;</div><div class='add'>+		table_loc += header.total_size;</div><div class='add'>+</div><div class='add'>+		table_size = 0;</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCN, 0, regUVD_STATUS),</div><div class='add'>+			~UVD_STATUS__UVD_BUSY, UVD_STATUS__UVD_BUSY);</div><div class='add'>+</div><div class='add'>+		cache_size = AMDGPU_GPU_PAGE_ALIGN(adev-&gt;vcn.inst[i].fw-&gt;size + 4);</div><div class='add'>+</div><div class='add'>+		if (adev-&gt;firmware.load_type == AMDGPU_FW_LOAD_PSP) {</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+				regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),</div><div class='add'>+				adev-&gt;firmware.ucode[AMDGPU_UCODE_ID_VCN + i].tmr_mc_addr_lo);</div><div class='add'>+</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+				regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH),</div><div class='add'>+				adev-&gt;firmware.ucode[AMDGPU_UCODE_ID_VCN + i].tmr_mc_addr_hi);</div><div class='add'>+</div><div class='add'>+			offset = 0;</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+				regUVD_VCPU_CACHE_OFFSET0), 0);</div><div class='add'>+		} else {</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+				regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW),</div><div class='add'>+				lower_32_bits(adev-&gt;vcn.inst[i].gpu_addr));</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+				regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH),</div><div class='add'>+				upper_32_bits(adev-&gt;vcn.inst[i].gpu_addr));</div><div class='add'>+			offset = cache_size;</div><div class='add'>+			MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+				regUVD_VCPU_CACHE_OFFSET0),</div><div class='add'>+				AMDGPU_UVD_FIRMWARE_OFFSET &gt;&gt; 3);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_VCPU_CACHE_SIZE0),</div><div class='add'>+			cache_size);</div><div class='add'>+</div><div class='add'>+		cache_addr = adev-&gt;vcn.inst[vcn_inst].gpu_addr + offset;</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW), lower_32_bits(cache_addr));</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), upper_32_bits(cache_addr));</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_VCPU_CACHE_OFFSET1), 0);</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_VCPU_CACHE_SIZE1), AMDGPU_VCN_STACK_SIZE);</div><div class='add'>+</div><div class='add'>+		cache_addr = adev-&gt;vcn.inst[vcn_inst].gpu_addr + offset +</div><div class='add'>+			AMDGPU_VCN_STACK_SIZE;</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW), lower_32_bits(cache_addr));</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), upper_32_bits(cache_addr));</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_VCPU_CACHE_OFFSET2), 0);</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE);</div><div class='add'>+</div><div class='add'>+		fw_shared = adev-&gt;vcn.inst[vcn_inst].fw_shared.cpu_addr;</div><div class='add'>+		rb_setup = &amp;fw_shared-&gt;rb_setup;</div><div class='add'>+</div><div class='add'>+		ring_enc = &amp;adev-&gt;vcn.inst[vcn_inst].ring_enc[0];</div><div class='add'>+		ring_enc-&gt;wptr = 0;</div><div class='add'>+		rb_enc_addr = ring_enc-&gt;gpu_addr;</div><div class='add'>+</div><div class='add'>+		rb_setup-&gt;is_rb_enabled_flags |= RB_ENABLED;</div><div class='add'>+		rb_setup-&gt;rb_addr_lo = lower_32_bits(rb_enc_addr);</div><div class='add'>+		rb_setup-&gt;rb_addr_hi = upper_32_bits(rb_enc_addr);</div><div class='add'>+		rb_setup-&gt;rb_size = ring_enc-&gt;ring_size / 4;</div><div class='add'>+		fw_shared-&gt;present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG);</div><div class='add'>+</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_LMI_VCPU_NC0_64BIT_BAR_LOW),</div><div class='add'>+			lower_32_bits(adev-&gt;vcn.inst[vcn_inst].fw_shared.gpu_addr));</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_LMI_VCPU_NC0_64BIT_BAR_HIGH),</div><div class='add'>+			upper_32_bits(adev-&gt;vcn.inst[vcn_inst].fw_shared.gpu_addr));</div><div class='add'>+		MMSCH_V5_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCN, 0,</div><div class='add'>+			regUVD_VCPU_NONCACHE_SIZE0),</div><div class='add'>+			AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)));</div><div class='add'>+		MMSCH_V5_0_INSERT_END();</div><div class='add'>+</div><div class='add'>+		header.vcn0.init_status = 0;</div><div class='add'>+		header.vcn0.table_offset = header.total_size;</div><div class='add'>+		header.vcn0.table_size = table_size;</div><div class='add'>+		header.total_size += table_size;</div><div class='add'>+</div><div class='add'>+		/* Send init table to mmsch */</div><div class='add'>+		size = sizeof(struct mmsch_v5_0_init_header);</div><div class='add'>+		table_loc = (uint32_t *)table-&gt;cpu_addr;</div><div class='add'>+		memcpy((void *)table_loc, &amp;header, size);</div><div class='add'>+</div><div class='add'>+		ctx_addr = table-&gt;gpu_addr;</div><div class='add'>+		WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_ADDR_LO, lower_32_bits(ctx_addr));</div><div class='add'>+		WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_ADDR_HI, upper_32_bits(ctx_addr));</div><div class='add'>+</div><div class='add'>+		tmp = RREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_VMID);</div><div class='add'>+		tmp &amp;= ~MMSCH_VF_VMID__VF_CTX_VMID_MASK;</div><div class='add'>+		tmp |= (0 &lt;&lt; MMSCH_VF_VMID__VF_CTX_VMID__SHIFT);</div><div class='add'>+		WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_VMID, tmp);</div><div class='add'>+</div><div class='add'>+		size = header.total_size;</div><div class='add'>+		WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_CTX_SIZE, size);</div><div class='add'>+</div><div class='add'>+		WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_MAILBOX_RESP, 0);</div><div class='add'>+</div><div class='add'>+		param = 0x00000001;</div><div class='add'>+		WREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_MAILBOX_HOST, param);</div><div class='add'>+		tmp = 0;</div><div class='add'>+		timeout = 1000;</div><div class='add'>+		resp = 0;</div><div class='add'>+		expected = MMSCH_VF_MAILBOX_RESP__OK;</div><div class='add'>+		while (resp != expected) {</div><div class='add'>+			resp = RREG32_SOC15(VCN, vcn_inst, regMMSCH_VF_MAILBOX_RESP);</div><div class='add'>+			if (resp != 0)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			udelay(10);</div><div class='add'>+			tmp = tmp + 10;</div><div class='add'>+			if (tmp &gt;= timeout) {</div><div class='add'>+				DRM_ERROR("failed to init MMSCH. TIME-OUT after %d usec"\</div><div class='add'>+					" waiting for regMMSCH_VF_MAILBOX_RESP "\</div><div class='add'>+					"(expected=0x%08x, readback=0x%08x)\n",</div><div class='add'>+					tmp, expected, resp);</div><div class='add'>+				return -EBUSY;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		enabled_vcn = amdgpu_vcn_is_disabled_vcn(adev, VCN_DECODE_RING, 0) ? 1 : 0;</div><div class='add'>+		init_status = ((struct mmsch_v5_0_init_header *)(table_loc))-&gt;vcn0.init_status;</div><div class='add'>+		if (resp != expected &amp;&amp; resp != MMSCH_VF_MAILBOX_RESP__INCOMPLETE</div><div class='add'>+					&amp;&amp; init_status != MMSCH_VF_ENGINE_STATUS__PASS) {</div><div class='add'>+			DRM_ERROR("MMSCH init status is incorrect! readback=0x%08x, header init "\</div><div class='add'>+				"status for VCN%x: 0x%x\n", resp, enabled_vcn, init_status);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * vcn_v5_0_1_start - VCN start</div><div class='ctx'>  *</div><div class='hunk'>@@ -775,9 +1046,13 @@ static void vcn_v5_0_1_stop_dpg_mode(struct amdgpu_vcn_inst *vinst)</div><div class='ctx'> 	int inst_idx = vinst-&gt;inst;</div><div class='ctx'> 	uint32_t tmp;</div><div class='ctx'> 	int vcn_inst;</div><div class='add'>+	struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};</div><div class='ctx'> </div><div class='ctx'> 	vcn_inst = GET_INST(VCN, inst_idx);</div><div class='ctx'> </div><div class='add'>+	/* Unpause dpg */</div><div class='add'>+	vcn_v5_0_1_pause_dpg_mode(vinst, &amp;state);</div><div class='add'>+</div><div class='ctx'> 	/* Wait for power status to be 1 */</div><div class='ctx'> 	SOC15_WAIT_ON_RREG(VCN, vcn_inst, regUVD_POWER_STATUS, 1,</div><div class='ctx'> 		UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);</div><div class='hunk'>@@ -1049,8 +1324,18 @@ static int vcn_v5_0_1_set_clockgating_state(struct amdgpu_ip_block *ip_block,</div><div class='ctx'> static int vcn_v5_0_1_set_pg_state(struct amdgpu_vcn_inst *vinst,</div><div class='ctx'> 				   enum amd_powergating_state state)</div><div class='ctx'> {</div><div class='add'>+	struct amdgpu_device *adev = vinst-&gt;adev;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	/* for SRIOV, guest should not control VCN Power-gating</div><div class='add'>+	 * MMSCH FW should control Power-gating and clock-gating</div><div class='add'>+	 * guest should avoid touching CGC and PG</div><div class='add'>+	 */</div><div class='add'>+	if (amdgpu_sriov_vf(adev)) {</div><div class='add'>+		vinst-&gt;cur_state = AMD_PG_STATE_UNGATE;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (state == vinst-&gt;cur_state)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c<br/>index faa0dd75dd6d..85846fd08ce4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vega20_ih.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vega20_ih.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vega20_ih.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vega20_ih.c</a></div><div class='hunk'>@@ -350,6 +350,7 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> 		}</div><div class='add'>+		ih[i]-&gt;overflow = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!amdgpu_sriov_vf(adev))</div><div class='hunk'>@@ -437,7 +438,10 @@ static u32 vega20_ih_get_wptr(struct amdgpu_device *adev,</div><div class='ctx'> 	if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0);</div><div class='add'>+	if (!amdgpu_sriov_vf(adev))</div><div class='add'>+		wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0);</div><div class='add'>+	else</div><div class='add'>+		ih-&gt;overflow = true;</div><div class='ctx'> </div><div class='ctx'> 	/* When a ring buffer overflow happen start parsing interrupt</div><div class='ctx'> 	 * from the last not overwritten vector (wptr + 32). Hopefully</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c<br/>index 86d8bc10d90a..9b3510e53112 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vi.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdgpu/vi.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdgpu/vi.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdgpu/vi.c</a></div><div class='hunk'>@@ -239,6 +239,13 @@ static const struct amdgpu_video_codec_info cz_video_codecs_decode_array[] =</div><div class='ctx'> 		.max_pixels_per_frame = 4096 * 4096,</div><div class='ctx'> 		.max_level = 186,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.codec_type = AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG,</div><div class='add'>+		.max_width = 4096,</div><div class='add'>+		.max_height = 4096,</div><div class='add'>+		.max_pixels_per_frame = 4096 * 4096,</div><div class='add'>+		.max_level = 0,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct amdgpu_video_codecs cz_video_codecs_decode =</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c b/drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c<br/>index 4a5a0a4e00f2..9bde2c64540f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_debugfs.c</a></div><div class='hunk'>@@ -27,6 +27,16 @@</div><div class='ctx'> #include "kfd_priv.h"</div><div class='ctx'> </div><div class='ctx'> static struct dentry *debugfs_root;</div><div class='add'>+static struct dentry *debugfs_proc;</div><div class='add'>+static struct list_head procs;</div><div class='add'>+</div><div class='add'>+struct debugfs_proc_entry {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct dentry *proc_dentry;</div><div class='add'>+	pid_t pid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MAX_DEBUGFS_FILENAME_LEN 32</div><div class='ctx'> </div><div class='ctx'> static int kfd_debugfs_open(struct inode *inode, struct file *file)</div><div class='ctx'> {</div><div class='hunk'>@@ -92,6 +102,8 @@ static const struct file_operations kfd_debugfs_hang_hws_fops = {</div><div class='ctx'> void kfd_debugfs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	debugfs_root = debugfs_create_dir("kfd", NULL);</div><div class='add'>+	debugfs_proc = debugfs_create_dir("proc", debugfs_root);</div><div class='add'>+	INIT_LIST_HEAD(&amp;procs);</div><div class='ctx'> </div><div class='ctx'> 	debugfs_create_file("mqds", S_IFREG | 0444, debugfs_root,</div><div class='ctx'> 			    kfd_debugfs_mqds_by_process, &amp;kfd_debugfs_fops);</div><div class='hunk'>@@ -107,5 +119,69 @@ void kfd_debugfs_init(void)</div><div class='ctx'> </div><div class='ctx'> void kfd_debugfs_fini(void)</div><div class='ctx'> {</div><div class='add'>+	debugfs_remove_recursive(debugfs_proc);</div><div class='ctx'> 	debugfs_remove_recursive(debugfs_root);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static ssize_t kfd_debugfs_pasid_read(struct file *file, char __user *buf,</div><div class='add'>+				      size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct kfd_process_device *pdd = file_inode(file)-&gt;i_private;</div><div class='add'>+	char tmp[32];</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	len = snprintf(tmp, sizeof(tmp), "%u\n", pdd-&gt;pasid);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buf, count, ppos, tmp, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations kfd_debugfs_pasid_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.read = kfd_debugfs_pasid_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void kfd_debugfs_add_process(struct kfd_process *p)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	char name[MAX_DEBUGFS_FILENAME_LEN];</div><div class='add'>+	struct debugfs_proc_entry *entry;</div><div class='add'>+</div><div class='add'>+	entry = kzalloc(sizeof(*entry), GFP_KERNEL);</div><div class='add'>+	if (!entry)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	list_add(&amp;entry-&gt;list, &amp;procs);</div><div class='add'>+	entry-&gt;pid = p-&gt;lead_thread-&gt;pid;</div><div class='add'>+	snprintf(name, MAX_DEBUGFS_FILENAME_LEN, "%d",</div><div class='add'>+		 (int)entry-&gt;pid);</div><div class='add'>+	entry-&gt;proc_dentry = debugfs_create_dir(name, debugfs_proc);</div><div class='add'>+</div><div class='add'>+	/* Create debugfs files for each GPU:</div><div class='add'>+	 * - proc/&lt;pid&gt;/pasid_&lt;gpuid&gt;</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; p-&gt;n_pdds; i++) {</div><div class='add'>+		struct kfd_process_device *pdd = p-&gt;pdds[i];</div><div class='add'>+</div><div class='add'>+		snprintf(name, MAX_DEBUGFS_FILENAME_LEN, "pasid_%u",</div><div class='add'>+			 pdd-&gt;dev-&gt;id);</div><div class='add'>+		debugfs_create_file((const char *)name, S_IFREG | 0444,</div><div class='add'>+				    entry-&gt;proc_dentry, pdd,</div><div class='add'>+				    &amp;kfd_debugfs_pasid_fops);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kfd_debugfs_remove_process(struct kfd_process *p)</div><div class='add'>+{</div><div class='add'>+	struct debugfs_proc_entry *entry, *next;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kfd_processes_mutex);</div><div class='add'>+	list_for_each_entry_safe(entry, next, &amp;procs, list) {</div><div class='add'>+		if (entry-&gt;pid != p-&gt;lead_thread-&gt;pid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		debugfs_remove_recursive(entry-&gt;proc_dentry);</div><div class='add'>+		list_del(&amp;entry-&gt;list);</div><div class='add'>+		kfree(entry);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;kfd_processes_mutex);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c<br/>index b9c82be6ce13..bf0854bd5555 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_device.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_device.c</a></div><div class='hunk'>@@ -352,11 +352,6 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)</div><div class='ctx'> 			f2g = &amp;aldebaran_kfd2kgd;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case IP_VERSION(9, 4, 3):</div><div class='del'>-			gfx_target_version = adev-&gt;rev_id &gt;= 1 ? 90402</div><div class='del'>-					   : adev-&gt;flags &amp; AMD_IS_APU ? 90400</div><div class='del'>-					   : 90401;</div><div class='del'>-			f2g = &amp;gc_9_4_3_kfd2kgd;</div><div class='del'>-			break;</div><div class='ctx'> 		case IP_VERSION(9, 4, 4):</div><div class='ctx'> 			gfx_target_version = 90402;</div><div class='ctx'> 			f2g = &amp;gc_9_4_3_kfd2kgd;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c<br/>index c610e172a2b8..76359c6a3f3a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c</a></div><div class='hunk'>@@ -1576,8 +1576,9 @@ static int allocate_sdma_queue(struct device_queue_manager *dqm,</div><div class='ctx'> 	int bit;</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;properties.type == KFD_QUEUE_TYPE_SDMA) {</div><div class='del'>-		if (bitmap_empty(dqm-&gt;sdma_bitmap, KFD_MAX_SDMA_QUEUES)) {</div><div class='del'>-			dev_err(dev, "No more SDMA queue to allocate\n");</div><div class='add'>+		if (bitmap_empty(dqm-&gt;sdma_bitmap, get_num_sdma_queues(dqm))) {</div><div class='add'>+			dev_warn(dev, "No more SDMA queue to allocate (%d total queues)\n",</div><div class='add'>+				 get_num_sdma_queues(dqm));</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1602,8 +1603,9 @@ static int allocate_sdma_queue(struct device_queue_manager *dqm,</div><div class='ctx'> 		q-&gt;properties.sdma_queue_id = q-&gt;sdma_id /</div><div class='ctx'> 				kfd_get_num_sdma_engines(dqm-&gt;dev);</div><div class='ctx'> 	} else if (q-&gt;properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {</div><div class='del'>-		if (bitmap_empty(dqm-&gt;xgmi_sdma_bitmap, KFD_MAX_SDMA_QUEUES)) {</div><div class='del'>-			dev_err(dev, "No more XGMI SDMA queue to allocate\n");</div><div class='add'>+		if (bitmap_empty(dqm-&gt;xgmi_sdma_bitmap, get_num_xgmi_sdma_queues(dqm))) {</div><div class='add'>+			dev_warn(dev, "No more XGMI SDMA queue to allocate (%d total queues)\n",</div><div class='add'>+				 get_num_xgmi_sdma_queues(dqm));</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (restore_sdma_id) {</div><div class='hunk'>@@ -1662,8 +1664,8 @@ static int allocate_sdma_queue(struct device_queue_manager *dqm,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!free_bit_found) {</div><div class='del'>-			dev_err(dev, "No more SDMA queue to allocate for target ID %i\n",</div><div class='del'>-				q-&gt;properties.sdma_engine_id);</div><div class='add'>+			dev_warn(dev, "No more SDMA queue to allocate for target ID %i (%d total queues)\n",</div><div class='add'>+				 q-&gt;properties.sdma_engine_id, num_queues);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_events.c<br/>index fecdb6794075..e54e708ed82d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_events.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_events.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_events.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_events.c</a></div><div class='hunk'>@@ -1177,6 +1177,25 @@ void kfd_signal_hw_exception_event(u32 pasid)</div><div class='ctx'> 	kfd_unref_process(p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kfd_signal_vm_fault_event_with_userptr(struct kfd_process *p, uint64_t gpu_va)</div><div class='add'>+{</div><div class='add'>+	struct kfd_process_device *pdd;</div><div class='add'>+	struct kfd_hsa_memory_exception_data exception_data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	memset(&amp;exception_data, 0, sizeof(exception_data));</div><div class='add'>+	exception_data.va = gpu_va;</div><div class='add'>+	exception_data.failure.NotPresent = 1;</div><div class='add'>+</div><div class='add'>+	// Send VM seg fault to all kfd process device</div><div class='add'>+	for (i = 0; i &lt; p-&gt;n_pdds; i++) {</div><div class='add'>+		pdd = p-&gt;pdds[i];</div><div class='add'>+		exception_data.gpu_id = pdd-&gt;user_gpu_id;</div><div class='add'>+		kfd_evict_process_device(pdd);</div><div class='add'>+		kfd_signal_vm_fault_event(pdd, NULL, &amp;exception_data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void kfd_signal_vm_fault_event(struct kfd_process_device *pdd,</div><div class='ctx'> 				struct kfd_vm_fault_info *info,</div><div class='ctx'> 				struct kfd_hsa_memory_exception_data *data)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c<br/>index 37b69fe0ede3..3e1ad8974797 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c</a></div><div class='hunk'>@@ -168,14 +168,14 @@ static bool event_interrupt_isr_v10(struct kfd_node *dev,</div><div class='ctx'> 	    client_id != SOC15_IH_CLIENTID_SE3SH)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",</div><div class='del'>-		 client_id, source_id, vmid, pasid);</div><div class='del'>-	pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",</div><div class='del'>-		 data[0], data[1], data[2], data[3],</div><div class='del'>-		 data[4], data[5], data[6], data[7]);</div><div class='add'>+	dev_dbg(dev-&gt;adev-&gt;dev,</div><div class='add'>+		"client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",</div><div class='add'>+		client_id, source_id, vmid, pasid);</div><div class='add'>+	dev_dbg(dev-&gt;adev-&gt;dev, "%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",</div><div class='add'>+		data[0], data[1], data[2], data[3], data[4], data[5], data[6],</div><div class='add'>+		data[7]);</div><div class='ctx'> </div><div class='del'>-	/* If there is no valid PASID, it's likely a bug */</div><div class='del'>-	if (WARN_ONCE(pasid == 0, "Bug: No PASID in KFD interrupt"))</div><div class='add'>+	if (pasid == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Interrupt types we care about: various signals and faults.</div><div class='hunk'>@@ -217,37 +217,66 @@ static void event_interrupt_wq_v10(struct kfd_node *dev,</div><div class='ctx'> 						SQ_INTERRUPT_WORD_WAVE_CTXID1, ENCODING);</div><div class='ctx'> 			switch (encoding) {</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_AUTO:</div><div class='del'>-				pr_debug_ratelimited(</div><div class='add'>+				dev_dbg_ratelimited(</div><div class='add'>+					dev-&gt;adev-&gt;dev,</div><div class='ctx'> 					"sq_intr: auto, se %d, ttrace %d, wlt %d, ttrac_buf0_full %d, ttrac_buf1_full %d, ttrace_utc_err %d\n",</div><div class='del'>-					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_AUTO_CTXID1,</div><div class='del'>-							SE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='del'>-							THREAD_TRACE),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='del'>-							WLT),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='del'>-							THREAD_TRACE_BUF0_FULL),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='del'>-							THREAD_TRACE_BUF1_FULL),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='del'>-							THREAD_TRACE_UTC_ERROR));</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id1,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID1,</div><div class='add'>+						SE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+						THREAD_TRACE),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+						WLT),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+						THREAD_TRACE_BUF0_FULL),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+						THREAD_TRACE_BUF1_FULL),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+						THREAD_TRACE_UTC_ERROR));</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_INST:</div><div class='del'>-				pr_debug_ratelimited("sq_intr: inst, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d\n",</div><div class='del'>-					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='del'>-							SE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							DATA),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							SA_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							PRIV),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							WAVE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							SIMD_ID),</div><div class='del'>-					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='del'>-							WGP_ID));</div><div class='add'>+				dev_dbg_ratelimited(</div><div class='add'>+					dev-&gt;adev-&gt;dev,</div><div class='add'>+					"sq_intr: inst, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d\n",</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id1,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='add'>+						SE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						DATA),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						SA_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						PRIV),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						WAVE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						SIMD_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id1,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='add'>+						WGP_ID));</div><div class='ctx'> 				if (context_id0 &amp; SQ_INTERRUPT_WORD_WAVE_CTXID0__PRIV_MASK) {</div><div class='ctx'> 					if (kfd_set_dbg_ev_from_interrupt(dev, pasid,</div><div class='ctx'> 							KFD_DEBUG_DOORBELL_ID(context_id0),</div><div class='hunk'>@@ -259,21 +288,37 @@ static void event_interrupt_wq_v10(struct kfd_node *dev,</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_ERROR:</div><div class='ctx'> 				sq_intr_err_type = REG_GET_FIELD(context_id0, KFD_CTXID0,</div><div class='ctx'> 								ERR_TYPE);</div><div class='del'>-				pr_warn_ratelimited("sq_intr: error, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d, err_type %d\n",</div><div class='del'>-					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='del'>-							SE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							DATA),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							SA_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							PRIV),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							WAVE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='del'>-							SIMD_ID),</div><div class='del'>-					REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='del'>-							WGP_ID),</div><div class='add'>+				dev_warn_ratelimited(</div><div class='add'>+					dev-&gt;adev-&gt;dev,</div><div class='add'>+					"sq_intr: error, se %d, data 0x%x, sa %d, priv %d, wave_id %d, simd_id %d, wgp_id %d, err_type %d\n",</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id1,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='add'>+						SE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						DATA),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						SA_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						PRIV),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						WAVE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+						SIMD_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id1,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='add'>+						WGP_ID),</div><div class='ctx'> 					sq_intr_err_type);</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c<br/>index c5f97e6e36ff..2788a52714d1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c</a></div><div class='hunk'>@@ -148,44 +148,69 @@ enum SQ_INTERRUPT_ERROR_TYPE {</div><div class='ctx'> #define KFD_CTXID0_DOORBELL_ID(ctxid0)		((ctxid0) &amp; \</div><div class='ctx'> 				KFD_CTXID0_DOORBELL_ID_MASK)</div><div class='ctx'> </div><div class='del'>-static void print_sq_intr_info_auto(uint32_t context_id0, uint32_t context_id1)</div><div class='add'>+static void print_sq_intr_info_auto(struct kfd_node *dev, uint32_t context_id0,</div><div class='add'>+				    uint32_t context_id1)</div><div class='ctx'> {</div><div class='del'>-	pr_debug_ratelimited(</div><div class='add'>+	dev_dbg_ratelimited(</div><div class='add'>+		dev-&gt;adev-&gt;dev,</div><div class='ctx'> 		"sq_intr: auto, ttrace %d, wlt %d, ttrace_buf_full %d, reg_tms %d, cmd_tms %d, host_cmd_ovf %d, host_reg_ovf %d, immed_ovf %d, ttrace_utc_err %d\n",</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      THREAD_TRACE),</div><div class='ctx'> 		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, WLT),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE_BUF_FULL),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, REG_TIMESTAMP),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, CMD_TIMESTAMP),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, HOST_CMD_OVERFLOW),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, HOST_REG_OVERFLOW),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, IMMED_OVERFLOW),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0, THREAD_TRACE_UTC_ERROR));</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      THREAD_TRACE_BUF_FULL),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      REG_TIMESTAMP),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      CMD_TIMESTAMP),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      HOST_CMD_OVERFLOW),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      HOST_REG_OVERFLOW),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      IMMED_OVERFLOW),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID0,</div><div class='add'>+			      THREAD_TRACE_UTC_ERROR));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void print_sq_intr_info_inst(uint32_t context_id0, uint32_t context_id1)</div><div class='add'>+static void print_sq_intr_info_inst(struct kfd_node *dev, uint32_t context_id0,</div><div class='add'>+				    uint32_t context_id1)</div><div class='ctx'> {</div><div class='del'>-	pr_debug_ratelimited(</div><div class='add'>+	dev_dbg_ratelimited(</div><div class='add'>+		dev-&gt;adev-&gt;dev,</div><div class='ctx'> 		"sq_intr: inst, data 0x%08x, sh %d, priv %d, wave_id %d, simd_id %d, wgp_id %d\n",</div><div class='ctx'> 		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, DATA),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, SH_ID),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+			      SH_ID),</div><div class='ctx'> 		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, PRIV),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0, WAVE_ID),</div><div class='del'>-		REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1, SIMD_ID),</div><div class='del'>-		REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1, WGP_ID));</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID0,</div><div class='add'>+			      WAVE_ID),</div><div class='add'>+		REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='add'>+			      SIMD_ID),</div><div class='add'>+		REG_GET_FIELD(context_id1, SQ_INTERRUPT_WORD_WAVE_CTXID1,</div><div class='add'>+			      WGP_ID));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void print_sq_intr_info_error(uint32_t context_id0, uint32_t context_id1)</div><div class='add'>+static void print_sq_intr_info_error(struct kfd_node *dev, uint32_t context_id0,</div><div class='add'>+				     uint32_t context_id1)</div><div class='ctx'> {</div><div class='del'>-	pr_warn_ratelimited(</div><div class='add'>+	dev_warn_ratelimited(</div><div class='add'>+		dev-&gt;adev-&gt;dev,</div><div class='ctx'> 		"sq_intr: error, detail 0x%08x, type %d, sh %d, priv %d, wave_id %d, simd_id %d, wgp_id %d\n",</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, DETAIL),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, TYPE),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, SH_ID),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, PRIV),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0, WAVE_ID),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1, SIMD_ID),</div><div class='del'>-		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1, WGP_ID));</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,</div><div class='add'>+			      DETAIL),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,</div><div class='add'>+			      TYPE),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,</div><div class='add'>+			      SH_ID),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,</div><div class='add'>+			      PRIV),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID0,</div><div class='add'>+			      WAVE_ID),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1,</div><div class='add'>+			      SIMD_ID),</div><div class='add'>+		REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_ERROR_CTXID1,</div><div class='add'>+			      WGP_ID));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void event_interrupt_poison_consumption_v11(struct kfd_node *dev,</div><div class='hunk'>@@ -255,14 +280,14 @@ static bool event_interrupt_isr_v11(struct kfd_node *dev,</div><div class='ctx'> 	    (context_id0 &amp; AMDGPU_FENCE_MES_QUEUE_FLAG))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",</div><div class='del'>-		 client_id, source_id, vmid, pasid);</div><div class='del'>-	pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",</div><div class='del'>-		 data[0], data[1], data[2], data[3],</div><div class='del'>-		 data[4], data[5], data[6], data[7]);</div><div class='add'>+	dev_dbg(dev-&gt;adev-&gt;dev,</div><div class='add'>+		"client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",</div><div class='add'>+		client_id, source_id, vmid, pasid);</div><div class='add'>+	dev_dbg(dev-&gt;adev-&gt;dev, "%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",</div><div class='add'>+		data[0], data[1], data[2], data[3], data[4], data[5], data[6],</div><div class='add'>+		data[7]);</div><div class='ctx'> </div><div class='del'>-	/* If there is no valid PASID, it's likely a bug */</div><div class='del'>-	if (WARN_ONCE(pasid == 0, "Bug: No PASID in KFD interrupt"))</div><div class='add'>+	if (pasid == 0)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Interrupt types we care about: various signals and faults.</div><div class='hunk'>@@ -353,10 +378,10 @@ static void event_interrupt_wq_v11(struct kfd_node *dev,</div><div class='ctx'> 					SQ_INTERRUPT_WORD_WAVE_CTXID1, ENCODING);</div><div class='ctx'> 			switch (sq_int_enc) {</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_AUTO:</div><div class='del'>-				print_sq_intr_info_auto(context_id0, context_id1);</div><div class='add'>+				print_sq_intr_info_auto(dev, context_id0, context_id1);</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_INST:</div><div class='del'>-				print_sq_intr_info_inst(context_id0, context_id1);</div><div class='add'>+				print_sq_intr_info_inst(dev, context_id0, context_id1);</div><div class='ctx'> 				sq_int_priv = REG_GET_FIELD(context_id0,</div><div class='ctx'> 						SQ_INTERRUPT_WORD_WAVE_CTXID0, PRIV);</div><div class='ctx'> 				if (sq_int_priv &amp;&amp; (kfd_set_dbg_ev_from_interrupt(dev, pasid,</div><div class='hunk'>@@ -366,7 +391,7 @@ static void event_interrupt_wq_v11(struct kfd_node *dev,</div><div class='ctx'> 					return;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_ERROR:</div><div class='del'>-				print_sq_intr_info_error(context_id0, context_id1);</div><div class='add'>+				print_sq_intr_info_error(dev, context_id0, context_id1);</div><div class='ctx'> 				sq_int_errtype = REG_GET_FIELD(context_id0,</div><div class='ctx'> 						SQ_INTERRUPT_WORD_ERROR_CTXID0, TYPE);</div><div class='ctx'> 				if (sq_int_errtype != SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST &amp;&amp;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c<br/>index b8a91bf4ef30..4ceb251312a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c</a></div><div class='hunk'>@@ -314,11 +314,12 @@ static bool event_interrupt_isr_v9(struct kfd_node *dev,</div><div class='ctx'> 					&amp; ~pasid_mask) | pasid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pr_debug("client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",</div><div class='del'>-		 client_id, source_id, vmid, pasid);</div><div class='del'>-	pr_debug("%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",</div><div class='del'>-		 data[0], data[1], data[2], data[3],</div><div class='del'>-		 data[4], data[5], data[6], data[7]);</div><div class='add'>+	dev_dbg(dev-&gt;adev-&gt;dev,</div><div class='add'>+		"client id 0x%x, source id %d, vmid %d, pasid 0x%x. raw data:\n",</div><div class='add'>+		client_id, source_id, vmid, pasid);</div><div class='add'>+	dev_dbg(dev-&gt;adev-&gt;dev, "%8X, %8X, %8X, %8X, %8X, %8X, %8X, %8X.\n",</div><div class='add'>+		data[0], data[1], data[2], data[3], data[4], data[5], data[6],</div><div class='add'>+		data[7]);</div><div class='ctx'> </div><div class='ctx'> 	/* If there is no valid PASID, it's likely a bug */</div><div class='ctx'> 	if (WARN_ONCE(pasid == 0, "Bug: No PASID in KFD interrupt"))</div><div class='hunk'>@@ -379,28 +380,82 @@ static void event_interrupt_wq_v9(struct kfd_node *dev,</div><div class='ctx'> 			encoding = REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, ENCODING);</div><div class='ctx'> 			switch (encoding) {</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_AUTO:</div><div class='del'>-				pr_debug_ratelimited(</div><div class='add'>+				dev_dbg_ratelimited(</div><div class='add'>+					dev-&gt;adev-&gt;dev,</div><div class='ctx'> 					"sq_intr: auto, se %d, ttrace %d, wlt %d, ttrac_buf_full %d, reg_tms %d, cmd_tms %d, host_cmd_ovf %d, host_reg_ovf %d, immed_ovf %d, ttrace_utc_err %d\n",</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, SE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, WLT),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE_BUF_FULL),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, REG_TIMESTAMP),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, CMD_TIMESTAMP),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, HOST_CMD_OVERFLOW),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, HOST_REG_OVERFLOW),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, IMMED_OVERFLOW),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_AUTO_CTXID, THREAD_TRACE_UTC_ERROR));</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						SE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						THREAD_TRACE),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						WLT),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						THREAD_TRACE_BUF_FULL),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						REG_TIMESTAMP),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						CMD_TIMESTAMP),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						HOST_CMD_OVERFLOW),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						HOST_REG_OVERFLOW),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						IMMED_OVERFLOW),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_AUTO_CTXID,</div><div class='add'>+						THREAD_TRACE_UTC_ERROR));</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_INST:</div><div class='del'>-				pr_debug_ratelimited("sq_intr: inst, se %d, data 0x%x, sh %d, priv %d, wave_id %d, simd_id %d, cu_id %d, intr_data 0x%x\n",</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, DATA),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SH_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, PRIV),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, WAVE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SIMD_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, CU_ID),</div><div class='add'>+				dev_dbg_ratelimited(</div><div class='add'>+					dev-&gt;adev-&gt;dev,</div><div class='add'>+					"sq_intr: inst, se %d, data 0x%x, sh %d, priv %d, wave_id %d, simd_id %d, cu_id %d, intr_data 0x%x\n",</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						SE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						DATA),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						SH_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						PRIV),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						WAVE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						SIMD_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						CU_ID),</div><div class='ctx'> 					sq_int_data);</div><div class='ctx'> 				if (context_id0 &amp; SQ_INTERRUPT_WORD_WAVE_CTXID__PRIV_MASK) {</div><div class='ctx'> 					if (kfd_set_dbg_ev_from_interrupt(dev, pasid,</div><div class='hunk'>@@ -412,14 +467,37 @@ static void event_interrupt_wq_v9(struct kfd_node *dev,</div><div class='ctx'> 				break;</div><div class='ctx'> 			case SQ_INTERRUPT_WORD_ENCODING_ERROR:</div><div class='ctx'> 				sq_intr_err = REG_GET_FIELD(sq_int_data, KFD_SQ_INT_DATA, ERR_TYPE);</div><div class='del'>-				pr_warn_ratelimited("sq_intr: error, se %d, data 0x%x, sh %d, priv %d, wave_id %d, simd_id %d, cu_id %d, err_type %d\n",</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, DATA),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SH_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, PRIV),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, WAVE_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, SIMD_ID),</div><div class='del'>-					REG_GET_FIELD(context_id0, SQ_INTERRUPT_WORD_WAVE_CTXID, CU_ID),</div><div class='add'>+				dev_warn_ratelimited(</div><div class='add'>+					dev-&gt;adev-&gt;dev,</div><div class='add'>+					"sq_intr: error, se %d, data 0x%x, sh %d, priv %d, wave_id %d, simd_id %d, cu_id %d, err_type %d\n",</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						SE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						DATA),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						SH_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						PRIV),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						WAVE_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						SIMD_ID),</div><div class='add'>+					REG_GET_FIELD(</div><div class='add'>+						context_id0,</div><div class='add'>+						SQ_INTERRUPT_WORD_WAVE_CTXID,</div><div class='add'>+						CU_ID),</div><div class='ctx'> 					sq_intr_err);</div><div class='ctx'> 				if (sq_intr_err != SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST &amp;&amp;</div><div class='ctx'> 					sq_intr_err != SQ_INTERRUPT_ERROR_TYPE_MEMVIOL) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c<br/>index 80320a6c8854..97933d2a3803 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c</a></div><div class='hunk'>@@ -495,6 +495,10 @@ static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,</div><div class='ctx'> 	m-&gt;sdma_engine_id = q-&gt;sdma_engine_id;</div><div class='ctx'> 	m-&gt;sdma_queue_id = q-&gt;sdma_queue_id;</div><div class='ctx'> 	m-&gt;sdmax_rlcx_dummy_reg = SDMA_RLC_DUMMY_DEFAULT;</div><div class='add'>+	/* Allow context switch so we don't cross-process starve with a massive</div><div class='add'>+	 * command buffer of long-running SDMA commands</div><div class='add'>+	 */</div><div class='add'>+	m-&gt;sdmax_rlcx_ib_cntl |= SDMA0_GFX_IB_CNTL__SWITCH_INSIDE_IB_MASK;</div><div class='ctx'> </div><div class='ctx'> 	q-&gt;is_active = QUEUE_IS_ACTIVE(*q);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c<br/>index 271c567242ab..b1a6eb349bb3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #define OVER_SUBSCRIPTION_PROCESS_COUNT (1 &lt;&lt; 0)</div><div class='ctx'> #define OVER_SUBSCRIPTION_COMPUTE_QUEUE_COUNT (1 &lt;&lt; 1)</div><div class='ctx'> #define OVER_SUBSCRIPTION_GWS_QUEUE_COUNT (1 &lt;&lt; 2)</div><div class='add'>+#define OVER_SUBSCRIPTION_XNACK_CONFLICT (1 &lt;&lt; 3)</div><div class='ctx'> </div><div class='ctx'> static inline void inc_wptr(unsigned int *wptr, unsigned int increment_bytes,</div><div class='ctx'> 				unsigned int buffer_size_bytes)</div><div class='hunk'>@@ -44,7 +45,8 @@ static inline void inc_wptr(unsigned int *wptr, unsigned int increment_bytes,</div><div class='ctx'> </div><div class='ctx'> static void pm_calc_rlib_size(struct packet_manager *pm,</div><div class='ctx'> 				unsigned int *rlib_size,</div><div class='del'>-				int *over_subscription)</div><div class='add'>+				int *over_subscription,</div><div class='add'>+				int xnack_conflict)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int process_count, queue_count, compute_queue_count, gws_queue_count;</div><div class='ctx'> 	unsigned int map_queue_size;</div><div class='hunk'>@@ -73,6 +75,8 @@ static void pm_calc_rlib_size(struct packet_manager *pm,</div><div class='ctx'> 		*over_subscription |= OVER_SUBSCRIPTION_COMPUTE_QUEUE_COUNT;</div><div class='ctx'> 	if (gws_queue_count &gt; 1)</div><div class='ctx'> 		*over_subscription |= OVER_SUBSCRIPTION_GWS_QUEUE_COUNT;</div><div class='add'>+	if (xnack_conflict &amp;&amp; (node-&gt;adev-&gt;gmc.xnack_flags &amp; AMDGPU_GMC_XNACK_FLAG_CHAIN))</div><div class='add'>+		*over_subscription |= OVER_SUBSCRIPTION_XNACK_CONFLICT;</div><div class='ctx'> </div><div class='ctx'> 	if (*over_subscription)</div><div class='ctx'> 		dev_dbg(dev, "Over subscribed runlist\n");</div><div class='hunk'>@@ -96,7 +100,8 @@ static int pm_allocate_runlist_ib(struct packet_manager *pm,</div><div class='ctx'> 				unsigned int **rl_buffer,</div><div class='ctx'> 				uint64_t *rl_gpu_buffer,</div><div class='ctx'> 				unsigned int *rl_buffer_size,</div><div class='del'>-				int *is_over_subscription)</div><div class='add'>+				int *is_over_subscription,</div><div class='add'>+				int xnack_conflict)</div><div class='ctx'> {</div><div class='ctx'> 	struct kfd_node *node = pm-&gt;dqm-&gt;dev;</div><div class='ctx'> 	struct device *dev = node-&gt;adev-&gt;dev;</div><div class='hunk'>@@ -105,7 +110,8 @@ static int pm_allocate_runlist_ib(struct packet_manager *pm,</div><div class='ctx'> 	if (WARN_ON(pm-&gt;allocated))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	pm_calc_rlib_size(pm, rl_buffer_size, is_over_subscription);</div><div class='add'>+	pm_calc_rlib_size(pm, rl_buffer_size, is_over_subscription,</div><div class='add'>+				xnack_conflict);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pm-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -142,11 +148,27 @@ static int pm_create_runlist_ib(struct packet_manager *pm,</div><div class='ctx'> 	struct queue *q;</div><div class='ctx'> 	struct kernel_queue *kq;</div><div class='ctx'> 	int is_over_subscription;</div><div class='add'>+	int xnack_enabled = -1;</div><div class='add'>+	bool xnack_conflict = 0;</div><div class='ctx'> </div><div class='ctx'> 	rl_wptr = retval = processes_mapped = 0;</div><div class='ctx'> </div><div class='add'>+	/* Check if processes set different xnack modes */</div><div class='add'>+	list_for_each_entry(cur, queues, list) {</div><div class='add'>+		qpd = cur-&gt;qpd;</div><div class='add'>+		if (xnack_enabled &lt; 0)</div><div class='add'>+			/* First process */</div><div class='add'>+			xnack_enabled = qpd-&gt;pqm-&gt;process-&gt;xnack_enabled;</div><div class='add'>+		else if (qpd-&gt;pqm-&gt;process-&gt;xnack_enabled != xnack_enabled) {</div><div class='add'>+			/* Found a process with a different xnack mode */</div><div class='add'>+			xnack_conflict = 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	retval = pm_allocate_runlist_ib(pm, &amp;rl_buffer, rl_gpu_addr,</div><div class='del'>-				&amp;alloc_size_bytes, &amp;is_over_subscription);</div><div class='add'>+				&amp;alloc_size_bytes, &amp;is_over_subscription,</div><div class='add'>+				xnack_conflict);</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		return retval;</div><div class='ctx'> </div><div class='hunk'>@@ -156,9 +178,13 @@ static int pm_create_runlist_ib(struct packet_manager *pm,</div><div class='ctx'> 	dev_dbg(dev, "Building runlist ib process count: %d queues count %d\n",</div><div class='ctx'> 		pm-&gt;dqm-&gt;processes_count, pm-&gt;dqm-&gt;active_queue_count);</div><div class='ctx'> </div><div class='add'>+build_runlist_ib:</div><div class='ctx'> 	/* build the run list ib packet */</div><div class='ctx'> 	list_for_each_entry(cur, queues, list) {</div><div class='ctx'> 		qpd = cur-&gt;qpd;</div><div class='add'>+		/* group processes with the same xnack mode together */</div><div class='add'>+		if (qpd-&gt;pqm-&gt;process-&gt;xnack_enabled != xnack_enabled)</div><div class='add'>+			continue;</div><div class='ctx'> 		/* build map process packet */</div><div class='ctx'> 		if (processes_mapped &gt;= pm-&gt;dqm-&gt;processes_count) {</div><div class='ctx'> 			dev_dbg(dev, "Not enough space left in runlist IB\n");</div><div class='hunk'>@@ -215,18 +241,26 @@ static int pm_create_runlist_ib(struct packet_manager *pm,</div><div class='ctx'> 				alloc_size_bytes);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	if (xnack_conflict) {</div><div class='add'>+		/* pick up processes with the other xnack mode */</div><div class='add'>+		xnack_enabled = !xnack_enabled;</div><div class='add'>+		xnack_conflict = 0;</div><div class='add'>+		goto build_runlist_ib;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "Finished map process and queues to runlist\n");</div><div class='ctx'> </div><div class='ctx'> 	if (is_over_subscription) {</div><div class='ctx'> 		if (!pm-&gt;is_over_subscription)</div><div class='del'>-			dev_warn(dev, "Runlist is getting oversubscribed due to%s%s%s. Expect reduced ROCm performance.\n",</div><div class='del'>-				 is_over_subscription &amp; OVER_SUBSCRIPTION_PROCESS_COUNT ?</div><div class='del'>-				 " too many processes." : "",</div><div class='del'>-				 is_over_subscription &amp; OVER_SUBSCRIPTION_COMPUTE_QUEUE_COUNT ?</div><div class='del'>-				 " too many queues." : "",</div><div class='del'>-				 is_over_subscription &amp; OVER_SUBSCRIPTION_GWS_QUEUE_COUNT ?</div><div class='del'>-				 " multiple processes using cooperative launch." : "");</div><div class='add'>+			dev_warn(dev, "Runlist is getting oversubscribed due to%s%s%s%s. Expect reduced ROCm performance.\n",</div><div class='add'>+				is_over_subscription &amp; OVER_SUBSCRIPTION_PROCESS_COUNT ?</div><div class='add'>+				" too many processes" : "",</div><div class='add'>+				is_over_subscription &amp; OVER_SUBSCRIPTION_COMPUTE_QUEUE_COUNT ?</div><div class='add'>+				" too many queues" : "",</div><div class='add'>+				is_over_subscription &amp; OVER_SUBSCRIPTION_GWS_QUEUE_COUNT ?</div><div class='add'>+				" multiple processes using cooperative launch" : "",</div><div class='add'>+				is_over_subscription &amp; OVER_SUBSCRIPTION_XNACK_CONFLICT ?</div><div class='add'>+				" xnack on/off processes mixed on gfx9" : "");</div><div class='ctx'> </div><div class='ctx'> 		retval = pm-&gt;pmf-&gt;runlist(pm, &amp;rl_buffer[rl_wptr],</div><div class='ctx'> 					*rl_gpu_addr,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c<br/>index 2893fd5e5d00..8fa6489b6f5d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@ static int pm_map_process_v9(struct packet_manager *pm,</div><div class='ctx'> 	memset(buffer, 0, sizeof(struct pm4_mes_map_process));</div><div class='ctx'> 	packet-&gt;header.u32All = pm_build_pm4_header(IT_MAP_PROCESS,</div><div class='ctx'> 					sizeof(struct pm4_mes_map_process));</div><div class='del'>-	if (adev-&gt;enforce_isolation[kfd-&gt;node_id])</div><div class='add'>+	if (adev-&gt;enforce_isolation[kfd-&gt;node_id] == AMDGPU_ENFORCE_ISOLATION_ENABLE)</div><div class='ctx'> 		packet-&gt;bitfields2.exec_cleaner_shader = 1;</div><div class='ctx'> 	packet-&gt;bitfields2.diq_enable = (qpd-&gt;is_debug) ? 1 : 0;</div><div class='ctx'> 	packet-&gt;bitfields2.process_quantum = 10;</div><div class='hunk'>@@ -102,7 +102,8 @@ static int pm_map_process_aldebaran(struct packet_manager *pm,</div><div class='ctx'> 	memset(buffer, 0, sizeof(struct pm4_mes_map_process_aldebaran));</div><div class='ctx'> 	packet-&gt;header.u32All = pm_build_pm4_header(IT_MAP_PROCESS,</div><div class='ctx'> 			sizeof(struct pm4_mes_map_process_aldebaran));</div><div class='del'>-	if (adev-&gt;enforce_isolation[knode-&gt;node_id])</div><div class='add'>+	if (adev-&gt;enforce_isolation[knode-&gt;node_id] ==</div><div class='add'>+	    AMDGPU_ENFORCE_ISOLATION_ENABLE)</div><div class='ctx'> 		packet-&gt;bitfields2.exec_cleaner_shader = 1;</div><div class='ctx'> 	packet-&gt;bitfields2.diq_enable = (qpd-&gt;is_debug) ? 1 : 0;</div><div class='ctx'> 	packet-&gt;bitfields2.process_quantum = 10;</div><div class='hunk'>@@ -165,9 +166,9 @@ static int pm_runlist_v9(struct packet_manager *pm, uint32_t *buffer,</div><div class='ctx'> 	 * hws_max_conc_proc has been done in</div><div class='ctx'> 	 * kgd2kfd_device_init().</div><div class='ctx'> 	 */</div><div class='del'>-	concurrent_proc_cnt = adev-&gt;enforce_isolation[kfd-&gt;node_id] ?</div><div class='del'>-			1 : min(pm-&gt;dqm-&gt;processes_count,</div><div class='del'>-			kfd-&gt;max_proc_per_quantum);</div><div class='add'>+	concurrent_proc_cnt = (adev-&gt;enforce_isolation[kfd-&gt;node_id] ==</div><div class='add'>+			       AMDGPU_ENFORCE_ISOLATION_ENABLE) ?</div><div class='add'>+		1 : min(pm-&gt;dqm-&gt;processes_count, kfd-&gt;max_proc_per_quantum);</div><div class='ctx'> </div><div class='ctx'> 	packet = (struct pm4_mes_runlist *)buffer;</div><div class='ctx'> </div><div class='hunk'>@@ -202,6 +203,8 @@ static int pm_set_resources_v9(struct packet_manager *pm, uint32_t *buffer,</div><div class='ctx'> 			queue_type__mes_set_resources__hsa_interface_queue_hiq;</div><div class='ctx'> 	packet-&gt;bitfields2.vmid_mask = res-&gt;vmid_mask;</div><div class='ctx'> 	packet-&gt;bitfields2.unmap_latency = KFD_UNMAP_LATENCY_MS / 100;</div><div class='add'>+	if (pm-&gt;dqm-&gt;dev-&gt;adev-&gt;gmc.xnack_flags &amp; AMDGPU_GMC_XNACK_FLAG_CHAIN)</div><div class='add'>+		packet-&gt;bitfields2.enb_xnack_retry_disable_check = 1;</div><div class='ctx'> 	packet-&gt;bitfields7.oac_mask = res-&gt;oac_mask;</div><div class='ctx'> 	packet-&gt;bitfields8.gds_heap_base = res-&gt;gds_heap_base;</div><div class='ctx'> 	packet-&gt;bitfields8.gds_heap_size = res-&gt;gds_heap_size;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h b/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h<br/>index cd8611401a66..e356a207d03c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h</a></div><div class='hunk'>@@ -63,7 +63,8 @@ struct pm4_mes_set_resources {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			uint32_t vmid_mask:16;</div><div class='ctx'> 			uint32_t unmap_latency:8;</div><div class='del'>-			uint32_t reserved1:5;</div><div class='add'>+			uint32_t reserved1:4;</div><div class='add'>+			uint32_t enb_xnack_retry_disable_check:1;</div><div class='ctx'> 			enum mes_set_resources_queue_type_enum queue_type:3;</div><div class='ctx'> 		} bitfields2;</div><div class='ctx'> 		uint32_t ordinal2;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h<br/>index f6aedf69c644..d221c58dccc3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_priv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_priv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_priv.h</a></div><div class='hunk'>@@ -1507,6 +1507,8 @@ int kfd_event_create(struct file *devkfd, struct kfd_process *p,</div><div class='ctx'> int kfd_get_num_events(struct kfd_process *p);</div><div class='ctx'> int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);</div><div class='ctx'> </div><div class='add'>+void kfd_signal_vm_fault_event_with_userptr(struct kfd_process *p, uint64_t gpu_va);</div><div class='add'>+</div><div class='ctx'> void kfd_signal_vm_fault_event(struct kfd_process_device *pdd,</div><div class='ctx'> 				struct kfd_vm_fault_info *info,</div><div class='ctx'> 				struct kfd_hsa_memory_exception_data *data);</div><div class='hunk'>@@ -1581,10 +1583,15 @@ int kfd_debugfs_hang_hws(struct kfd_node *dev);</div><div class='ctx'> int pm_debugfs_hang_hws(struct packet_manager *pm);</div><div class='ctx'> int dqm_debugfs_hang_hws(struct device_queue_manager *dqm);</div><div class='ctx'> </div><div class='add'>+void kfd_debugfs_add_process(struct kfd_process *p);</div><div class='add'>+void kfd_debugfs_remove_process(struct kfd_process *p);</div><div class='add'>+</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> static inline void kfd_debugfs_init(void) {}</div><div class='ctx'> static inline void kfd_debugfs_fini(void) {}</div><div class='add'>+static inline void kfd_debugfs_add_process(struct kfd_process *p) {}</div><div class='add'>+static inline void kfd_debugfs_remove_process(struct kfd_process *p) {}</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c<br/>index 7c0c24732481..722ac1662bdc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_process.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_process.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_process.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_process.c</a></div><div class='hunk'>@@ -900,6 +900,8 @@ struct kfd_process *kfd_create_process(struct task_struct *thread)</div><div class='ctx'> 		kfd_procfs_add_sysfs_files(process);</div><div class='ctx'> 		kfd_procfs_add_sysfs_counters(process);</div><div class='ctx'> </div><div class='add'>+		kfd_debugfs_add_process(process);</div><div class='add'>+</div><div class='ctx'> 		init_waitqueue_head(&amp;process-&gt;wait_irq_drain);</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='hunk'>@@ -1054,6 +1056,8 @@ static void kfd_process_destroy_pdds(struct kfd_process *p)</div><div class='ctx'> 	for (i = 0; i &lt; p-&gt;n_pdds; i++) {</div><div class='ctx'> 		struct kfd_process_device *pdd = p-&gt;pdds[i];</div><div class='ctx'> </div><div class='add'>+		kfd_smi_event_process(pdd, false);</div><div class='add'>+</div><div class='ctx'> 		pr_debug("Releasing pdd (topology id %d, for pid %d)\n",</div><div class='ctx'> 			pdd-&gt;dev-&gt;id, p-&gt;lead_thread-&gt;pid);</div><div class='ctx'> 		kfd_process_device_destroy_cwsr_dgpu(pdd);</div><div class='hunk'>@@ -1174,6 +1178,7 @@ static void kfd_process_wq_release(struct work_struct *work)</div><div class='ctx'> 		dma_fence_signal(ef);</div><div class='ctx'> </div><div class='ctx'> 	kfd_process_remove_sysfs(p);</div><div class='add'>+	kfd_debugfs_remove_process(p);</div><div class='ctx'> </div><div class='ctx'> 	kfd_process_kunmap_signal_bo(p);</div><div class='ctx'> 	kfd_process_free_outstanding_kfd_bos(p);</div><div class='hunk'>@@ -1715,6 +1720,8 @@ int kfd_process_device_init_vm(struct kfd_process_device *pdd,</div><div class='ctx'> 	pdd-&gt;pasid = avm-&gt;pasid;</div><div class='ctx'> 	pdd-&gt;drm_file = drm_file;</div><div class='ctx'> </div><div class='add'>+	kfd_smi_event_process(pdd, true);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_get_pasid:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c<br/>index 7eb370b68159..6d5fa57d4a23 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c</a></div><div class='hunk'>@@ -451,8 +451,15 @@ int pqm_create_queue(struct process_queue_manager *pqm,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (retval != 0) {</div><div class='del'>-		pr_err("process pid %d DQM create queue type %d failed. ret %d\n",</div><div class='del'>-			pqm-&gt;process-&gt;lead_thread-&gt;pid, type, retval);</div><div class='add'>+		if ((type == KFD_QUEUE_TYPE_SDMA ||</div><div class='add'>+		    type == KFD_QUEUE_TYPE_SDMA_XGMI ||</div><div class='add'>+		    type == KFD_QUEUE_TYPE_SDMA_BY_ENG_ID) &amp;&amp;</div><div class='add'>+		    retval == -ENOMEM)</div><div class='add'>+			pr_warn("process pid %d DQM create queue type %d failed. ret %d\n",</div><div class='add'>+				pqm-&gt;process-&gt;lead_thread-&gt;pid, type, retval);</div><div class='add'>+		else</div><div class='add'>+			pr_err("process pid %d DQM create queue type %d failed. ret %d\n",</div><div class='add'>+				pqm-&gt;process-&gt;lead_thread-&gt;pid, type, retval);</div><div class='ctx'> 		goto err_create_queue;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_queue.c<br/>index 4afff7094caf..a65c67cf56ff 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_queue.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_queue.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_queue.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_queue.c</a></div><div class='hunk'>@@ -402,7 +402,7 @@ static u32 kfd_get_vgpr_size_per_cu(u32 gfxv)</div><div class='ctx'> {</div><div class='ctx'> 	u32 vgpr_size = 0x40000;</div><div class='ctx'> </div><div class='del'>-	if ((gfxv / 100 * 100) == 90400 ||	/* GFX_VERSION_AQUA_VANJARAM */</div><div class='add'>+	if (gfxv == 90402 ||			/* GFX_VERSION_AQUA_VANJARAM */</div><div class='ctx'> 	    gfxv == 90010 ||			/* GFX_VERSION_ALDEBARAN */</div><div class='ctx'> 	    gfxv == 90008 ||			/* GFX_VERSION_ARCTURUS */</div><div class='ctx'> 	    gfxv == 90500)</div><div class='hunk'>@@ -462,7 +462,7 @@ void kfd_queue_ctx_save_restore_size(struct kfd_topology_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (gfxv == 80002)	/* GFX_VERSION_TONGA */</div><div class='ctx'> 		props-&gt;eop_buffer_size = 0x8000;</div><div class='del'>-	else if ((gfxv / 100 * 100) == 90400)	/* GFX_VERSION_AQUA_VANJARAM */</div><div class='add'>+	else if (gfxv == 90402)	/* GFX_VERSION_AQUA_VANJARAM */</div><div class='ctx'> 		props-&gt;eop_buffer_size = 4096;</div><div class='ctx'> 	else if (gfxv &gt;= 80000)</div><div class='ctx'> 		props-&gt;eop_buffer_size = 4096;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c<br/>index 9b8169761ec5..83d9384ac815 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c</a></div><div class='hunk'>@@ -163,10 +163,9 @@ static int kfd_smi_ev_release(struct inode *inode, struct file *filep)</div><div class='ctx'> static bool kfd_smi_ev_enabled(pid_t pid, struct kfd_smi_client *client,</div><div class='ctx'> 			       unsigned int event)</div><div class='ctx'> {</div><div class='del'>-	uint64_t all = KFD_SMI_EVENT_MASK_FROM_INDEX(KFD_SMI_EVENT_ALL_PROCESS);</div><div class='ctx'> 	uint64_t events = READ_ONCE(client-&gt;events);</div><div class='ctx'> </div><div class='del'>-	if (pid &amp;&amp; client-&gt;pid != pid &amp;&amp; !(client-&gt;suser &amp;&amp; (events &amp; all)))</div><div class='add'>+	if (pid &amp;&amp; client-&gt;pid != pid &amp;&amp; !client-&gt;suser)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return events &amp; KFD_SMI_EVENT_MASK_FROM_INDEX(event);</div><div class='hunk'>@@ -345,6 +344,27 @@ void kfd_smi_event_unmap_from_gpu(struct kfd_node *node, pid_t pid,</div><div class='ctx'> 			  pid, address, last - address + 1, node-&gt;id, trigger));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void kfd_smi_event_process(struct kfd_process_device *pdd, bool start)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_task_info *task_info;</div><div class='add'>+	struct amdgpu_vm *avm;</div><div class='add'>+</div><div class='add'>+	if (!pdd-&gt;drm_priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	avm = drm_priv_to_vm(pdd-&gt;drm_priv);</div><div class='add'>+	task_info = amdgpu_vm_get_task_info_vm(avm);</div><div class='add'>+</div><div class='add'>+	if (task_info) {</div><div class='add'>+		kfd_smi_event_add(0, pdd-&gt;dev,</div><div class='add'>+				  start ? KFD_SMI_EVENT_PROCESS_START :</div><div class='add'>+				  KFD_SMI_EVENT_PROCESS_END,</div><div class='add'>+				  KFD_EVENT_FMT_PROCESS(task_info-&gt;pid,</div><div class='add'>+				  task_info-&gt;task_name));</div><div class='add'>+		amdgpu_vm_put_task_info(task_info);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int kfd_smi_event_open(struct kfd_node *dev, uint32_t *fd)</div><div class='ctx'> {</div><div class='ctx'> 	struct kfd_smi_client *client;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h<br/>index 503bff13d815..bb4d72b57387 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_smi_events.h</a></div><div class='hunk'>@@ -53,4 +53,5 @@ void kfd_smi_event_queue_restore_rescheduled(struct mm_struct *mm);</div><div class='ctx'> void kfd_smi_event_unmap_from_gpu(struct kfd_node *node, pid_t pid,</div><div class='ctx'> 				  unsigned long address, unsigned long last,</div><div class='ctx'> 				  uint32_t trigger);</div><div class='add'>+void kfd_smi_event_process(struct kfd_process_device *pdd, bool start);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c<br/>index 100717a98ec1..72be6e152e88 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_svm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_svm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_svm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_svm.c</a></div><div class='hunk'>@@ -1245,8 +1245,7 @@ svm_range_get_pte_flags(struct kfd_node *node,</div><div class='ctx'> 	case IP_VERSION(9, 4, 4):</div><div class='ctx'> 	case IP_VERSION(9, 5, 0):</div><div class='ctx'> 		if (ext_coherent)</div><div class='del'>-			mtype_local = (gc_ip_version &lt; IP_VERSION(9, 5, 0) &amp;&amp; !node-&gt;adev-&gt;rev_id) ?</div><div class='del'>-					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_CC;</div><div class='add'>+			mtype_local = AMDGPU_VM_MTYPE_CC;</div><div class='ctx'> 		else</div><div class='ctx'> 			mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :</div><div class='ctx'> 				amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c<br/>index e477d7509646..baa2374acdeb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_topology.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/amdkfd/kfd_topology.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/amdkfd/kfd_topology.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/amdkfd/kfd_topology.c</a></div><div class='hunk'>@@ -1267,34 +1267,41 @@ static void kfd_set_recommended_sdma_engines(struct kfd_topology_device *to_dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct kfd_node *gpu = outbound_link-&gt;gpu;</div><div class='ctx'> 	struct amdgpu_device *adev = gpu-&gt;adev;</div><div class='del'>-	int num_xgmi_nodes = adev-&gt;gmc.xgmi.num_physical_nodes;</div><div class='add'>+	unsigned int num_xgmi_nodes = adev-&gt;gmc.xgmi.num_physical_nodes;</div><div class='add'>+	unsigned int num_xgmi_sdma_engines = kfd_get_num_xgmi_sdma_engines(gpu);</div><div class='add'>+	unsigned int num_sdma_engines = kfd_get_num_sdma_engines(gpu);</div><div class='add'>+	uint32_t sdma_eng_id_mask = (1 &lt;&lt; num_sdma_engines) - 1;</div><div class='add'>+	uint32_t xgmi_sdma_eng_id_mask =</div><div class='add'>+			((1 &lt;&lt; num_xgmi_sdma_engines) - 1) &lt;&lt; num_sdma_engines;</div><div class='add'>+</div><div class='ctx'> 	bool support_rec_eng = !amdgpu_sriov_vf(adev) &amp;&amp; to_dev-&gt;gpu &amp;&amp;</div><div class='ctx'> 		adev-&gt;aid_mask &amp;&amp; num_xgmi_nodes &amp;&amp; gpu-&gt;kfd-&gt;num_nodes == 1 &amp;&amp;</div><div class='del'>-		kfd_get_num_xgmi_sdma_engines(gpu) &gt;= 14 &amp;&amp;</div><div class='del'>-		(!(adev-&gt;flags &amp; AMD_IS_APU) &amp;&amp; num_xgmi_nodes == 8);</div><div class='add'>+		num_xgmi_sdma_engines &gt;= 6 &amp;&amp; (!(adev-&gt;flags &amp; AMD_IS_APU) &amp;&amp;</div><div class='add'>+		num_xgmi_nodes == 8);</div><div class='ctx'> </div><div class='ctx'> 	if (support_rec_eng) {</div><div class='ctx'> 		int src_socket_id = adev-&gt;gmc.xgmi.physical_node_id;</div><div class='ctx'> 		int dst_socket_id = to_dev-&gt;gpu-&gt;adev-&gt;gmc.xgmi.physical_node_id;</div><div class='add'>+		unsigned int reshift = num_xgmi_sdma_engines == 6 ? 1 : 0;</div><div class='ctx'> </div><div class='ctx'> 		outbound_link-&gt;rec_sdma_eng_id_mask =</div><div class='del'>-			1 &lt;&lt; rec_sdma_eng_map[src_socket_id][dst_socket_id];</div><div class='add'>+			1 &lt;&lt; (rec_sdma_eng_map[src_socket_id][dst_socket_id] &gt;&gt; reshift);</div><div class='ctx'> 		inbound_link-&gt;rec_sdma_eng_id_mask =</div><div class='del'>-			1 &lt;&lt; rec_sdma_eng_map[dst_socket_id][src_socket_id];</div><div class='del'>-	} else {</div><div class='del'>-		int num_sdma_eng = kfd_get_num_sdma_engines(gpu);</div><div class='del'>-		int i, eng_offset = 0;</div><div class='add'>+			1 &lt;&lt; (rec_sdma_eng_map[dst_socket_id][src_socket_id] &gt;&gt; reshift);</div><div class='ctx'> </div><div class='del'>-		if (outbound_link-&gt;iolink_type == CRAT_IOLINK_TYPE_XGMI &amp;&amp;</div><div class='del'>-		    kfd_get_num_xgmi_sdma_engines(gpu) &amp;&amp; to_dev-&gt;gpu) {</div><div class='del'>-			eng_offset = num_sdma_eng;</div><div class='del'>-			num_sdma_eng = kfd_get_num_xgmi_sdma_engines(gpu);</div><div class='del'>-		}</div><div class='add'>+		/* If recommended engine is out of range, need to reset the mask */</div><div class='add'>+		if (outbound_link-&gt;rec_sdma_eng_id_mask &amp; sdma_eng_id_mask)</div><div class='add'>+			outbound_link-&gt;rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask;</div><div class='add'>+		if (inbound_link-&gt;rec_sdma_eng_id_mask &amp; sdma_eng_id_mask)</div><div class='add'>+			inbound_link-&gt;rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; num_sdma_eng; i++) {</div><div class='del'>-			outbound_link-&gt;rec_sdma_eng_id_mask |= (1 &lt;&lt; (i + eng_offset));</div><div class='del'>-			inbound_link-&gt;rec_sdma_eng_id_mask |= (1 &lt;&lt; (i + eng_offset));</div><div class='del'>-		}</div><div class='add'>+	} else {</div><div class='add'>+		uint32_t engine_mask = (outbound_link-&gt;iolink_type == CRAT_IOLINK_TYPE_XGMI &amp;&amp;</div><div class='add'>+				num_xgmi_sdma_engines &amp;&amp; to_dev-&gt;gpu) ? xgmi_sdma_eng_id_mask :</div><div class='add'>+				sdma_eng_id_mask;</div><div class='add'>+</div><div class='add'>+		outbound_link-&gt;rec_sdma_eng_id_mask = engine_mask;</div><div class='add'>+		inbound_link-&gt;rec_sdma_eng_id_mask = engine_mask;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1983,9 +1990,6 @@ static void kfd_topology_set_capabilities(struct kfd_topology_device *dev)</div><div class='ctx'> 	if (kfd_dbg_has_ttmps_always_setup(dev-&gt;gpu))</div><div class='ctx'> 		dev-&gt;node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;gpu-&gt;adev-&gt;sdma.supported_reset &amp; AMDGPU_RESET_TYPE_PER_QUEUE)</div><div class='del'>-		dev-&gt;node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;</div><div class='del'>-</div><div class='ctx'> 	if (KFD_GC_VERSION(dev-&gt;gpu) &lt; IP_VERSION(10, 0, 0)) {</div><div class='ctx'> 		if (KFD_GC_VERSION(dev-&gt;gpu) == IP_VERSION(9, 4, 3) ||</div><div class='ctx'> 		    KFD_GC_VERSION(dev-&gt;gpu) == IP_VERSION(9, 4, 4))</div><div class='hunk'>@@ -2001,7 +2005,11 @@ static void kfd_topology_set_capabilities(struct kfd_topology_device *dev)</div><div class='ctx'> 			dev-&gt;node_props.capability |=</div><div class='ctx'> 				HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED;</div><div class='ctx'> </div><div class='del'>-		dev-&gt;node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;</div><div class='add'>+		if (!amdgpu_sriov_vf(dev-&gt;gpu-&gt;adev))</div><div class='add'>+			dev-&gt;node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;gpu-&gt;adev-&gt;sdma.supported_reset &amp; AMDGPU_RESET_TYPE_PER_QUEUE)</div><div class='add'>+			dev-&gt;node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev-&gt;node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |</div><div class='ctx'> 					HSA_DBG_WATCH_ADDR_MASK_HI_BIT;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile b/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile<br/>index ab2a97e354da..7329b8cc2576 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/Makefile</a></div><div class='hunk'>@@ -38,6 +38,7 @@ AMDGPUDM = \</div><div class='ctx'> 	amdgpu_dm_pp_smu.o \</div><div class='ctx'> 	amdgpu_dm_psr.o \</div><div class='ctx'> 	amdgpu_dm_replay.o \</div><div class='add'>+	amdgpu_dm_quirks.o \</div><div class='ctx'> 	amdgpu_dm_wb.o</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_DRM_AMD_DC_FP</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br/>index d0d8ad5368c3..742b10881112 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c</a></div><div class='hunk'>@@ -80,7 +80,6 @@</div><div class='ctx'> #include &lt;linux/power_supply.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/component.h&gt;</div><div class='del'>-#include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/sort.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;drm/display/drm_dp_mst_helper.h&gt;</div><div class='hunk'>@@ -115,6 +114,8 @@</div><div class='ctx'> #include "modules/inc/mod_freesync.h"</div><div class='ctx'> #include "modules/power/power_helpers.h"</div><div class='ctx'> </div><div class='add'>+static_assert(AMDGPU_DMUB_NOTIFICATION_MAX == DMUB_NOTIFICATION_MAX, "AMDGPU_DMUB_NOTIFICATION_MAX mismatch");</div><div class='add'>+</div><div class='ctx'> #define FIRMWARE_RENOIR_DMUB "amdgpu/renoir_dmcub.bin"</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_RENOIR_DMUB);</div><div class='ctx'> #define FIRMWARE_SIENNA_CICHLID_DMUB "amdgpu/sienna_cichlid_dmcub.bin"</div><div class='hunk'>@@ -280,7 +281,7 @@ static u32 dm_vblank_get_counter(struct amdgpu_device *adev, int crtc)</div><div class='ctx'> 	acrtc = adev-&gt;mode_info.crtcs[crtc];</div><div class='ctx'> </div><div class='ctx'> 	if (!acrtc-&gt;dm_irq_params.stream) {</div><div class='del'>-		DRM_ERROR("dc_stream_state is NULL for crtc '%d'!\n",</div><div class='add'>+		drm_err(adev_to_drm(adev), "dc_stream_state is NULL for crtc '%d'!\n",</div><div class='ctx'> 			  crtc);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -301,7 +302,7 @@ static int dm_crtc_get_scanoutpos(struct amdgpu_device *adev, int crtc,</div><div class='ctx'> 	acrtc = adev-&gt;mode_info.crtcs[crtc];</div><div class='ctx'> </div><div class='ctx'> 	if (!acrtc-&gt;dm_irq_params.stream) {</div><div class='del'>-		DRM_ERROR("dc_stream_state is NULL for crtc '%d'!\n",</div><div class='add'>+		drm_err(adev_to_drm(adev), "dc_stream_state is NULL for crtc '%d'!\n",</div><div class='ctx'> 			  crtc);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -372,6 +373,8 @@ get_crtc_by_otg_inst(struct amdgpu_device *adev,</div><div class='ctx'> static inline bool is_dc_timing_adjust_needed(struct dm_crtc_state *old_state,</div><div class='ctx'> 					      struct dm_crtc_state *new_state)</div><div class='ctx'> {</div><div class='add'>+	if (new_state-&gt;stream-&gt;adjust.timing_adjust_pending)</div><div class='add'>+		return true;</div><div class='ctx'> 	if (new_state-&gt;freesync_config.state ==  VRR_STATE_ACTIVE_FIXED)</div><div class='ctx'> 		return true;</div><div class='ctx'> 	else if (amdgpu_dm_crtc_vrr_active(old_state) != amdgpu_dm_crtc_vrr_active(new_state))</div><div class='hunk'>@@ -673,15 +676,21 @@ static void dm_crtc_high_irq(void *interrupt_params)</div><div class='ctx'> 	spin_lock_irqsave(&amp;adev_to_drm(adev)-&gt;event_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (acrtc-&gt;dm_irq_params.stream &amp;&amp;</div><div class='del'>-	    acrtc-&gt;dm_irq_params.vrr_params.supported &amp;&amp;</div><div class='del'>-	    acrtc-&gt;dm_irq_params.freesync_config.state ==</div><div class='del'>-		    VRR_STATE_ACTIVE_VARIABLE) {</div><div class='add'>+		acrtc-&gt;dm_irq_params.vrr_params.supported) {</div><div class='add'>+		bool replay_en = acrtc-&gt;dm_irq_params.stream-&gt;link-&gt;replay_settings.replay_feature_enabled;</div><div class='add'>+		bool psr_en = acrtc-&gt;dm_irq_params.stream-&gt;link-&gt;psr_settings.psr_feature_enabled;</div><div class='add'>+		bool fs_active_var_en = acrtc-&gt;dm_irq_params.freesync_config.state == VRR_STATE_ACTIVE_VARIABLE;</div><div class='add'>+</div><div class='ctx'> 		mod_freesync_handle_v_update(adev-&gt;dm.freesync_module,</div><div class='ctx'> 					     acrtc-&gt;dm_irq_params.stream,</div><div class='ctx'> 					     &amp;acrtc-&gt;dm_irq_params.vrr_params);</div><div class='ctx'> </div><div class='del'>-		dc_stream_adjust_vmin_vmax(adev-&gt;dm.dc, acrtc-&gt;dm_irq_params.stream,</div><div class='del'>-					   &amp;acrtc-&gt;dm_irq_params.vrr_params.adjust);</div><div class='add'>+		/* update vmin_vmax only if freesync is enabled, or only if PSR and REPLAY are disabled */</div><div class='add'>+		if (fs_active_var_en || (!fs_active_var_en &amp;&amp; !replay_en &amp;&amp; !psr_en)) {</div><div class='add'>+			dc_stream_adjust_vmin_vmax(adev-&gt;dm.dc,</div><div class='add'>+					acrtc-&gt;dm_irq_params.stream,</div><div class='add'>+					&amp;acrtc-&gt;dm_irq_params.vrr_params.adjust);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -749,6 +758,29 @@ static void dmub_aux_setconfig_callback(struct amdgpu_device *adev,</div><div class='ctx'> 		complete(&amp;adev-&gt;dm.dmub_aux_transfer_done);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dmub_aux_fused_io_callback(struct amdgpu_device *adev,</div><div class='add'>+					struct dmub_notification *notify)</div><div class='add'>+{</div><div class='add'>+	if (!adev || !notify) {</div><div class='add'>+		ASSERT(false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	const struct dmub_cmd_fused_request *req = &amp;notify-&gt;fused_request;</div><div class='add'>+	const uint8_t ddc_line = req-&gt;u.aux.ddc_line;</div><div class='add'>+</div><div class='add'>+	if (ddc_line &gt;= ARRAY_SIZE(adev-&gt;dm.fused_io)) {</div><div class='add'>+		ASSERT(false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	struct fused_io_sync *sync = &amp;adev-&gt;dm.fused_io[ddc_line];</div><div class='add'>+</div><div class='add'>+	static_assert(sizeof(*req) &lt;= sizeof(sync-&gt;reply_data), "Size mismatch");</div><div class='add'>+	memcpy(sync-&gt;reply_data, req, sizeof(*req));</div><div class='add'>+	complete(&amp;sync-&gt;replied);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * dmub_hpd_callback - DMUB HPD interrupt processing callback.</div><div class='ctx'>  * @adev: amdgpu_device pointer</div><div class='hunk'>@@ -772,18 +804,18 @@ static void dmub_hpd_callback(struct amdgpu_device *adev,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (notify == NULL) {</div><div class='del'>-		DRM_ERROR("DMUB HPD callback notification was NULL");</div><div class='add'>+		drm_err(adev_to_drm(adev), "DMUB HPD callback notification was NULL");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (notify-&gt;link_index &gt; adev-&gt;dm.dc-&gt;link_count) {</div><div class='del'>-		DRM_ERROR("DMUB HPD index (%u)is abnormal", notify-&gt;link_index);</div><div class='add'>+		drm_err(adev_to_drm(adev), "DMUB HPD index (%u)is abnormal", notify-&gt;link_index);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Skip DMUB HPD IRQ in suspend/resume. We will probe them later. */</div><div class='ctx'> 	if (notify-&gt;type == DMUB_NOTIFICATION_HPD &amp;&amp; adev-&gt;in_suspend) {</div><div class='del'>-		DRM_INFO("Skip DMUB HPD IRQ callback in suspend/resume\n");</div><div class='add'>+		drm_info(adev_to_drm(adev), "Skip DMUB HPD IRQ callback in suspend/resume\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -800,11 +832,11 @@ static void dmub_hpd_callback(struct amdgpu_device *adev,</div><div class='ctx'> 		aconnector = to_amdgpu_dm_connector(connector);</div><div class='ctx'> 		if (link &amp;&amp; aconnector-&gt;dc_link == link) {</div><div class='ctx'> 			if (notify-&gt;type == DMUB_NOTIFICATION_HPD)</div><div class='del'>-				DRM_INFO("DMUB HPD IRQ callback: link_index=%u\n", link_index);</div><div class='add'>+				drm_info(adev_to_drm(adev), "DMUB HPD IRQ callback: link_index=%u\n", link_index);</div><div class='ctx'> 			else if (notify-&gt;type == DMUB_NOTIFICATION_HPD_IRQ)</div><div class='del'>-				DRM_INFO("DMUB HPD RX IRQ callback: link_index=%u\n", link_index);</div><div class='add'>+				drm_info(adev_to_drm(adev), "DMUB HPD RX IRQ callback: link_index=%u\n", link_index);</div><div class='ctx'> 			else</div><div class='del'>-				DRM_WARN("DMUB Unknown HPD callback type %d, link_index=%u\n",</div><div class='add'>+				drm_warn(adev_to_drm(adev), "DMUB Unknown HPD callback type %d, link_index=%u\n",</div><div class='ctx'> 						notify-&gt;type, link_index);</div><div class='ctx'> </div><div class='ctx'> 			hpd_aconnector = aconnector;</div><div class='hunk'>@@ -816,7 +848,7 @@ static void dmub_hpd_callback(struct amdgpu_device *adev,</div><div class='ctx'> 	if (hpd_aconnector) {</div><div class='ctx'> 		if (notify-&gt;type == DMUB_NOTIFICATION_HPD) {</div><div class='ctx'> 			if (hpd_aconnector-&gt;dc_link-&gt;hpd_status == (notify-&gt;hpd_status == DP_HPD_PLUG))</div><div class='del'>-				DRM_WARN("DMUB reported hpd status unchanged. link_index=%u\n", link_index);</div><div class='add'>+				drm_warn(adev_to_drm(adev), "DMUB reported hpd status unchanged. link_index=%u\n", link_index);</div><div class='ctx'> 			handle_hpd_irq_helper(hpd_aconnector);</div><div class='ctx'> 		} else if (notify-&gt;type == DMUB_NOTIFICATION_HPD_IRQ) {</div><div class='ctx'> 			handle_hpd_rx_irq(hpd_aconnector);</div><div class='hunk'>@@ -835,7 +867,7 @@ static void dmub_hpd_callback(struct amdgpu_device *adev,</div><div class='ctx'> static void dmub_hpd_sense_callback(struct amdgpu_device *adev,</div><div class='ctx'> 			      struct dmub_notification *notify)</div><div class='ctx'> {</div><div class='del'>-	DRM_DEBUG_DRIVER("DMUB HPD SENSE callback.\n");</div><div class='add'>+	drm_dbg_driver(adev_to_drm(adev), "DMUB HPD SENSE callback.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -871,7 +903,7 @@ static void dm_handle_hpd_work(struct work_struct *work)</div><div class='ctx'> 	dmub_hpd_wrk = container_of(work, struct dmub_hpd_work, handle_hpd_work);</div><div class='ctx'> </div><div class='ctx'> 	if (!dmub_hpd_wrk-&gt;dmub_notify) {</div><div class='del'>-		DRM_ERROR("dmub_hpd_wrk dmub_notify is NULL");</div><div class='add'>+		drm_err(adev_to_drm(dmub_hpd_wrk-&gt;adev), "dmub_hpd_wrk dmub_notify is NULL");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -885,6 +917,30 @@ static void dm_handle_hpd_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char *dmub_notification_type_str(enum dmub_notification_type e)</div><div class='add'>+{</div><div class='add'>+	switch (e) {</div><div class='add'>+	case DMUB_NOTIFICATION_NO_DATA:</div><div class='add'>+		return "NO_DATA";</div><div class='add'>+	case DMUB_NOTIFICATION_AUX_REPLY:</div><div class='add'>+		return "AUX_REPLY";</div><div class='add'>+	case DMUB_NOTIFICATION_HPD:</div><div class='add'>+		return "HPD";</div><div class='add'>+	case DMUB_NOTIFICATION_HPD_IRQ:</div><div class='add'>+		return "HPD_IRQ";</div><div class='add'>+	case DMUB_NOTIFICATION_SET_CONFIG_REPLY:</div><div class='add'>+		return "SET_CONFIG_REPLY";</div><div class='add'>+	case DMUB_NOTIFICATION_DPIA_NOTIFICATION:</div><div class='add'>+		return "DPIA_NOTIFICATION";</div><div class='add'>+	case DMUB_NOTIFICATION_HPD_SENSE_NOTIFY:</div><div class='add'>+		return "HPD_SENSE_NOTIFY";</div><div class='add'>+	case DMUB_NOTIFICATION_FUSED_IO:</div><div class='add'>+		return "FUSED_IO";</div><div class='add'>+	default:</div><div class='add'>+		return "&lt;unknown&gt;";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define DMUB_TRACE_MAX_READ 64</div><div class='ctx'> /**</div><div class='ctx'>  * dm_dmub_outbox1_low_irq() - Handles Outbox interrupt</div><div class='hunk'>@@ -902,22 +958,13 @@ static void dm_dmub_outbox1_low_irq(void *interrupt_params)</div><div class='ctx'> 	struct dmcub_trace_buf_entry entry = { 0 };</div><div class='ctx'> 	u32 count = 0;</div><div class='ctx'> 	struct dmub_hpd_work *dmub_hpd_wrk;</div><div class='del'>-	static const char *const event_type[] = {</div><div class='del'>-		"NO_DATA",</div><div class='del'>-		"AUX_REPLY",</div><div class='del'>-		"HPD",</div><div class='del'>-		"HPD_IRQ",</div><div class='del'>-		"SET_CONFIGC_REPLY",</div><div class='del'>-		"DPIA_NOTIFICATION",</div><div class='del'>-		"HPD_SENSE_NOTIFY",</div><div class='del'>-	};</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		if (dc_dmub_srv_get_dmub_outbox0_msg(dm-&gt;dc, &amp;entry)) {</div><div class='ctx'> 			trace_amdgpu_dmub_trace_high_irq(entry.trace_code, entry.tick_count,</div><div class='ctx'> 							entry.param0, entry.param1);</div><div class='ctx'> </div><div class='del'>-			DRM_DEBUG_DRIVER("trace_code:%u, tick_count:%u, param0:%u, param1:%u\n",</div><div class='add'>+			drm_dbg_driver(adev_to_drm(adev), "trace_code:%u, tick_count:%u, param0:%u, param1:%u\n",</div><div class='ctx'> 				 entry.trace_code, entry.tick_count, entry.param0, entry.param1);</div><div class='ctx'> 		} else</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -927,7 +974,7 @@ static void dm_dmub_outbox1_low_irq(void *interrupt_params)</div><div class='ctx'> 	} while (count &lt;= DMUB_TRACE_MAX_READ);</div><div class='ctx'> </div><div class='ctx'> 	if (count &gt; DMUB_TRACE_MAX_READ)</div><div class='del'>-		DRM_DEBUG_DRIVER("Warning : count &gt; DMUB_TRACE_MAX_READ");</div><div class='add'>+		drm_dbg_driver(adev_to_drm(adev), "Warning : count &gt; DMUB_TRACE_MAX_READ");</div><div class='ctx'> </div><div class='ctx'> 	if (dc_enable_dmub_notifications(adev-&gt;dm.dc) &amp;&amp;</div><div class='ctx'> 		irq_params-&gt;irq_src == DC_IRQ_SOURCE_DMCUB_OUTBOX) {</div><div class='hunk'>@@ -935,25 +982,25 @@ static void dm_dmub_outbox1_low_irq(void *interrupt_params)</div><div class='ctx'> 		do {</div><div class='ctx'> 			dc_stat_get_dmub_notification(adev-&gt;dm.dc, &amp;notify);</div><div class='ctx'> 			if (notify.type &gt;= ARRAY_SIZE(dm-&gt;dmub_thread_offload)) {</div><div class='del'>-				DRM_ERROR("DM: notify type %d invalid!", notify.type);</div><div class='add'>+				drm_err(adev_to_drm(adev), "DM: notify type %d invalid!", notify.type);</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (!dm-&gt;dmub_callback[notify.type]) {</div><div class='del'>-				DRM_WARN("DMUB notification skipped due to no handler: type=%s\n",</div><div class='del'>-					event_type[notify.type]);</div><div class='add'>+				drm_warn(adev_to_drm(adev), "DMUB notification skipped due to no handler: type=%s\n",</div><div class='add'>+					dmub_notification_type_str(notify.type));</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (dm-&gt;dmub_thread_offload[notify.type] == true) {</div><div class='ctx'> 				dmub_hpd_wrk = kzalloc(sizeof(*dmub_hpd_wrk), GFP_ATOMIC);</div><div class='ctx'> 				if (!dmub_hpd_wrk) {</div><div class='del'>-					DRM_ERROR("Failed to allocate dmub_hpd_wrk");</div><div class='add'>+					drm_err(adev_to_drm(adev), "Failed to allocate dmub_hpd_wrk");</div><div class='ctx'> 					return;</div><div class='ctx'> 				}</div><div class='ctx'> 				dmub_hpd_wrk-&gt;dmub_notify = kmemdup(&amp;notify, sizeof(struct dmub_notification),</div><div class='ctx'> 								    GFP_ATOMIC);</div><div class='ctx'> 				if (!dmub_hpd_wrk-&gt;dmub_notify) {</div><div class='ctx'> 					kfree(dmub_hpd_wrk);</div><div class='del'>-					DRM_ERROR("Failed to allocate dmub_hpd_wrk-&gt;dmub_notify");</div><div class='add'>+					drm_err(adev_to_drm(adev), "Failed to allocate dmub_hpd_wrk-&gt;dmub_notify");</div><div class='ctx'> 					return;</div><div class='ctx'> 				}</div><div class='ctx'> 				INIT_WORK(&amp;dmub_hpd_wrk-&gt;handle_hpd_work, dm_handle_hpd_work);</div><div class='hunk'>@@ -1011,10 +1058,10 @@ static void amdgpu_dm_fbc_init(struct drm_connector *connector)</div><div class='ctx'> 			    &amp;compressor-&gt;gpu_addr, &amp;compressor-&gt;cpu_addr);</div><div class='ctx'> </div><div class='ctx'> 		if (r)</div><div class='del'>-			DRM_ERROR("DM: Failed to initialize FBC\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "DM: Failed to initialize FBC\n");</div><div class='ctx'> 		else {</div><div class='ctx'> 			adev-&gt;dm.dc-&gt;ctx-&gt;fbc_gpu_addr = compressor-&gt;gpu_addr;</div><div class='del'>-			DRM_INFO("DM: FBC alloc %lu\n", max_size*4);</div><div class='add'>+			drm_info(adev_to_drm(adev), "DM: FBC alloc %lu\n", max_size*4);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='hunk'>@@ -1179,13 +1226,13 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!fb_info) {</div><div class='del'>-		DRM_ERROR("No framebuffer info for DMUB service.\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "No framebuffer info for DMUB service.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!dmub_fw) {</div><div class='ctx'> 		/* Firmware required for DMUB support. */</div><div class='del'>-		DRM_ERROR("No firmware provided for DMUB.\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "No firmware provided for DMUB.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1195,19 +1242,19 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	status = dmub_srv_has_hw_support(dmub_srv, &amp;has_hw_support);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='del'>-		DRM_ERROR("Error checking HW support for DMUB: %d\n", status);</div><div class='add'>+		drm_err(adev_to_drm(adev), "Error checking HW support for DMUB: %d\n", status);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!has_hw_support) {</div><div class='del'>-		DRM_INFO("DMUB unsupported on ASIC\n");</div><div class='add'>+		drm_info(adev_to_drm(adev), "DMUB unsupported on ASIC\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reset DMCUB if it was previously running - before we overwrite its memory. */</div><div class='ctx'> 	status = dmub_srv_hw_reset(dmub_srv);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK)</div><div class='del'>-		DRM_WARN("Error resetting DMUB HW: %d\n", status);</div><div class='add'>+		drm_warn(adev_to_drm(adev), "Error resetting DMUB HW: %d\n", status);</div><div class='ctx'> </div><div class='ctx'> 	hdr = (const struct dmcub_firmware_header_v1_0 *)dmub_fw-&gt;data;</div><div class='ctx'> </div><div class='hunk'>@@ -1290,6 +1337,7 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	case IP_VERSION(3, 5, 1):</div><div class='ctx'> 	case IP_VERSION(3, 6, 0):</div><div class='ctx'> 		hw_params.ips_sequential_ono = adev-&gt;external_rev_id &gt; 0x10;</div><div class='add'>+		hw_params.lower_hbr3_phy_ssc = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1297,14 +1345,14 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	status = dmub_srv_hw_init(dmub_srv, &amp;hw_params);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='del'>-		DRM_ERROR("Error initializing DMUB HW: %d\n", status);</div><div class='add'>+		drm_err(adev_to_drm(adev), "Error initializing DMUB HW: %d\n", status);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for firmware load to finish. */</div><div class='ctx'> 	status = dmub_srv_wait_for_auto_load(dmub_srv, 100000);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK)</div><div class='del'>-		DRM_WARN("Wait for DMUB auto-load failed: %d\n", status);</div><div class='add'>+		drm_warn(adev_to_drm(adev), "Wait for DMUB auto-load failed: %d\n", status);</div><div class='ctx'> </div><div class='ctx'> 	/* Init DMCU and ABM if available. */</div><div class='ctx'> 	if (dmcu &amp;&amp; abm) {</div><div class='hunk'>@@ -1315,11 +1363,11 @@ static int dm_dmub_hw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	if (!adev-&gt;dm.dc-&gt;ctx-&gt;dmub_srv)</div><div class='ctx'> 		adev-&gt;dm.dc-&gt;ctx-&gt;dmub_srv = dc_dmub_srv_create(adev-&gt;dm.dc, dmub_srv);</div><div class='ctx'> 	if (!adev-&gt;dm.dc-&gt;ctx-&gt;dmub_srv) {</div><div class='del'>-		DRM_ERROR("Couldn't allocate DC DMUB server!\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Couldn't allocate DC DMUB server!\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	DRM_INFO("DMUB hardware initialized: version=0x%08X\n",</div><div class='add'>+	drm_info(adev_to_drm(adev), "DMUB hardware initialized: version=0x%08X\n",</div><div class='ctx'> 		 adev-&gt;dm.dmcub_fw_version);</div><div class='ctx'> </div><div class='ctx'> 	/* Keeping sanity checks off if</div><div class='hunk'>@@ -1362,18 +1410,18 @@ static void dm_dmub_hw_resume(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	status = dmub_srv_is_hw_init(dmub_srv, &amp;init);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK)</div><div class='del'>-		DRM_WARN("DMUB hardware init check failed: %d\n", status);</div><div class='add'>+		drm_warn(adev_to_drm(adev), "DMUB hardware init check failed: %d\n", status);</div><div class='ctx'> </div><div class='ctx'> 	if (status == DMUB_STATUS_OK &amp;&amp; init) {</div><div class='ctx'> 		/* Wait for firmware load to finish. */</div><div class='ctx'> 		status = dmub_srv_wait_for_auto_load(dmub_srv, 100000);</div><div class='ctx'> 		if (status != DMUB_STATUS_OK)</div><div class='del'>-			DRM_WARN("Wait for DMUB auto-load failed: %d\n", status);</div><div class='add'>+			drm_warn(adev_to_drm(adev), "Wait for DMUB auto-load failed: %d\n", status);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Perform the full hardware initialization. */</div><div class='ctx'> 		r = dm_dmub_hw_init(adev);</div><div class='ctx'> 		if (r)</div><div class='del'>-			DRM_ERROR("DMUB interface failed to initialize: status=%d\n", r);</div><div class='add'>+			drm_err(adev_to_drm(adev), "DMUB interface failed to initialize: status=%d\n", r);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1483,18 +1531,18 @@ static void dm_handle_hpd_rx_offload_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	offload_work = container_of(work, struct hpd_rx_irq_offload_work, work);</div><div class='ctx'> 	aconnector = offload_work-&gt;offload_wq-&gt;aconnector;</div><div class='add'>+	adev = offload_work-&gt;adev;</div><div class='ctx'> </div><div class='ctx'> 	if (!aconnector) {</div><div class='del'>-		DRM_ERROR("Can't retrieve aconnector in hpd_rx_irq_offload_work");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Can't retrieve aconnector in hpd_rx_irq_offload_work");</div><div class='ctx'> 		goto skip;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adev = drm_to_adev(aconnector-&gt;base.dev);</div><div class='ctx'> 	dc_link = aconnector-&gt;dc_link;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;aconnector-&gt;hpd_lock);</div><div class='ctx'> 	if (!dc_link_detect_connection_type(dc_link, &amp;new_connection_type))</div><div class='del'>-		DRM_ERROR("KMS: Failed to detect connector\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "KMS: Failed to detect connector\n");</div><div class='ctx'> 	mutex_unlock(&amp;aconnector-&gt;hpd_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (new_connection_type == dc_connection_none)</div><div class='hunk'>@@ -1563,8 +1611,9 @@ skip:</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct hpd_rx_irq_offload_work_queue *hpd_rx_irq_create_workqueue(struct dc *dc)</div><div class='add'>+static struct hpd_rx_irq_offload_work_queue *hpd_rx_irq_create_workqueue(struct amdgpu_device *adev)</div><div class='ctx'> {</div><div class='add'>+	struct dc *dc = adev-&gt;dm.dc;</div><div class='ctx'> 	int max_caps = dc-&gt;caps.max_links;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	struct hpd_rx_irq_offload_work_queue *hpd_rx_offload_wq = NULL;</div><div class='hunk'>@@ -1580,7 +1629,7 @@ static struct hpd_rx_irq_offload_work_queue *hpd_rx_irq_create_workqueue(struct</div><div class='ctx'> 				    create_singlethread_workqueue("amdgpu_dm_hpd_rx_offload_wq");</div><div class='ctx'> </div><div class='ctx'> 		if (hpd_rx_offload_wq[i].wq == NULL) {</div><div class='del'>-			DRM_ERROR("create amdgpu_dm_hpd_rx_offload_wq fail!");</div><div class='add'>+			drm_err(adev_to_drm(adev), "create amdgpu_dm_hpd_rx_offload_wq fail!");</div><div class='ctx'> 			goto out_err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1629,132 +1678,6 @@ static bool dm_should_disable_stutter(struct pci_dev *pdev)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct amdgpu_dm_quirks {</div><div class='del'>-	bool aux_hpd_discon;</div><div class='del'>-	bool support_edp0_on_dp1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct amdgpu_dm_quirks quirk_entries = {</div><div class='del'>-	.aux_hpd_discon = false,</div><div class='del'>-	.support_edp0_on_dp1 = false</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int edp0_on_dp1_callback(const struct dmi_system_id *id)</div><div class='del'>-{</div><div class='del'>-	quirk_entries.support_edp0_on_dp1 = true;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int aux_hpd_discon_callback(const struct dmi_system_id *id)</div><div class='del'>-{</div><div class='del'>-	quirk_entries.aux_hpd_discon = true;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct dmi_system_id dmi_quirk_table[] = {</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Precision 3660"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Precision 3260"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "Precision 3460"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Tower Plus 7010"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Tower 7010"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex SFF Plus 7010"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex SFF 7010"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Micro Plus 7010"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = aux_hpd_discon_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Micro 7010"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = edp0_on_dp1_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "HP Elite mt645 G8 Mobile Thin Client"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.callback = edp0_on_dp1_callback,</div><div class='del'>-		.matches = {</div><div class='del'>-			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='del'>-			DMI_MATCH(DMI_PRODUCT_NAME, "HP EliteBook 665 16 inch G11 Notebook PC"),</div><div class='del'>-		},</div><div class='del'>-	},</div><div class='del'>-	{}</div><div class='del'>-	/* TODO: refactor this from a fixed table to a dynamic option */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void retrieve_dmi_info(struct amdgpu_display_manager *dm, struct dc_init_data *init_data)</div><div class='del'>-{</div><div class='del'>-	int dmi_id;</div><div class='del'>-	struct drm_device *dev = dm-&gt;ddev;</div><div class='del'>-</div><div class='del'>-	dm-&gt;aux_hpd_discon_quirk = false;</div><div class='del'>-	init_data-&gt;flags.support_edp0_on_dp1 = false;</div><div class='del'>-</div><div class='del'>-	dmi_id = dmi_check_system(dmi_quirk_table);</div><div class='del'>-</div><div class='del'>-	if (!dmi_id)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (quirk_entries.aux_hpd_discon) {</div><div class='del'>-		dm-&gt;aux_hpd_discon_quirk = true;</div><div class='del'>-		drm_info(dev, "aux_hpd_discon_quirk attached\n");</div><div class='del'>-	}</div><div class='del'>-	if (quirk_entries.support_edp0_on_dp1) {</div><div class='del'>-		init_data-&gt;flags.support_edp0_on_dp1 = true;</div><div class='del'>-		drm_info(dev, "support_edp0_on_dp1 attached\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> void*</div><div class='ctx'> dm_allocate_gpu_mem(</div><div class='hunk'>@@ -1899,26 +1822,6 @@ static enum dmub_ips_disable_type dm_get_default_ips_mode(</div><div class='ctx'> 	switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {</div><div class='ctx'> 	case IP_VERSION(3, 5, 0):</div><div class='ctx'> 	case IP_VERSION(3, 6, 0):</div><div class='del'>-		/*</div><div class='del'>-		 * On DCN35 systems with Z8 enabled, it's possible for IPS2 + Z8 to</div><div class='del'>-		 * cause a hard hang. A fix exists for newer PMFW.</div><div class='del'>-		 *</div><div class='del'>-		 * As a workaround, for non-fixed PMFW, force IPS1+RCG as the deepest</div><div class='del'>-		 * IPS state in all cases, except for s0ix and all displays off (DPMS),</div><div class='del'>-		 * where IPS2 is allowed.</div><div class='del'>-		 *</div><div class='del'>-		 * When checking pmfw version, use the major and minor only.</div><div class='del'>-		 */</div><div class='del'>-		if ((adev-&gt;pm.fw_version &amp; 0x00FFFF00) &lt; 0x005D6300)</div><div class='del'>-			ret = DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF;</div><div class='del'>-		else if (amdgpu_ip_version(adev, GC_HWIP, 0) &gt; IP_VERSION(11, 5, 0))</div><div class='del'>-			/*</div><div class='del'>-			 * Other ASICs with DCN35 that have residency issues with</div><div class='del'>-			 * IPS2 in idle.</div><div class='del'>-			 * We want them to use IPS2 only in display off cases.</div><div class='del'>-			 */</div><div class='del'>-			ret =  DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF;</div><div class='del'>-		break;</div><div class='ctx'> 	case IP_VERSION(3, 5, 1):</div><div class='ctx'> 		ret =  DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1950,7 +1853,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 	mutex_init(&amp;adev-&gt;dm.audio_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_dm_irq_init(adev)) {</div><div class='del'>-		DRM_ERROR("amdgpu: failed to initialize DM IRQ support.\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "amdgpu: failed to initialize DM IRQ support.\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2061,7 +1964,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 	if (amdgpu_ip_version(adev, DCE_HWIP, 0) &gt;= IP_VERSION(3, 0, 0))</div><div class='ctx'> 		init_data.num_virtual_links = 1;</div><div class='ctx'> </div><div class='del'>-	retrieve_dmi_info(&amp;adev-&gt;dm, &amp;init_data);</div><div class='add'>+	retrieve_dmi_info(&amp;adev-&gt;dm);</div><div class='add'>+	if (adev-&gt;dm.edp0_on_dp1_quirk)</div><div class='add'>+		init_data.flags.support_edp0_on_dp1 = true;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;dm.bb_from_dmub)</div><div class='ctx'> 		init_data.bb_from_dmub = adev-&gt;dm.bb_from_dmub;</div><div class='hunk'>@@ -2072,10 +1977,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 	adev-&gt;dm.dc = dc_create(&amp;init_data);</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;dm.dc) {</div><div class='del'>-		DRM_INFO("Display Core v%s initialized on %s\n", DC_VER,</div><div class='add'>+		drm_info(adev_to_drm(adev), "Display Core v%s initialized on %s\n", DC_VER,</div><div class='ctx'> 			 dce_version_to_string(adev-&gt;dm.dc-&gt;ctx-&gt;dce_version));</div><div class='ctx'> 	} else {</div><div class='del'>-		DRM_INFO("Display Core failed to initialize with v%s!\n", DC_VER);</div><div class='add'>+		drm_info(adev_to_drm(adev), "Display Core failed to initialize with v%s!\n", DC_VER);</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2109,25 +2014,31 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;dm.dc-&gt;debug.using_dml21 = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_dc_debug_mask &amp; DC_HDCP_LC_FORCE_FW_ENABLE)</div><div class='add'>+		adev-&gt;dm.dc-&gt;debug.hdcp_lc_force_fw_enable = true;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_dc_debug_mask &amp; DC_HDCP_LC_ENABLE_SW_FALLBACK)</div><div class='add'>+		adev-&gt;dm.dc-&gt;debug.hdcp_lc_enable_sw_fallback = true;</div><div class='add'>+</div><div class='ctx'> 	adev-&gt;dm.dc-&gt;debug.visual_confirm = amdgpu_dc_visual_confirm;</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: Remove after DP2 receiver gets proper support of Cable ID feature */</div><div class='ctx'> 	adev-&gt;dm.dc-&gt;debug.ignore_cable_id = true;</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;dm.dc-&gt;caps.dp_hdmi21_pcon_support)</div><div class='del'>-		DRM_INFO("DP-HDMI FRL PCON supported\n");</div><div class='add'>+		drm_info(adev_to_drm(adev), "DP-HDMI FRL PCON supported\n");</div><div class='ctx'> </div><div class='ctx'> 	r = dm_dmub_hw_init(adev);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		DRM_ERROR("DMUB interface failed to initialize: status=%d\n", r);</div><div class='add'>+		drm_err(adev_to_drm(adev), "DMUB interface failed to initialize: status=%d\n", r);</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dc_hardware_init(adev-&gt;dm.dc);</div><div class='ctx'> </div><div class='del'>-	adev-&gt;dm.hpd_rx_offload_wq = hpd_rx_irq_create_workqueue(adev-&gt;dm.dc);</div><div class='add'>+	adev-&gt;dm.hpd_rx_offload_wq = hpd_rx_irq_create_workqueue(adev);</div><div class='ctx'> 	if (!adev-&gt;dm.hpd_rx_offload_wq) {</div><div class='del'>-		DRM_ERROR("amdgpu: failed to create hpd rx offload workqueue.\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "amdgpu: failed to create hpd rx offload workqueue.\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2142,10 +2053,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	adev-&gt;dm.freesync_module = mod_freesync_create(adev-&gt;dm.dc);</div><div class='ctx'> 	if (!adev-&gt;dm.freesync_module) {</div><div class='del'>-		DRM_ERROR(</div><div class='add'>+		drm_err(adev_to_drm(adev),</div><div class='ctx'> 		"amdgpu: failed to initialize freesync_module.\n");</div><div class='ctx'> 	} else</div><div class='del'>-		DRM_DEBUG_DRIVER("amdgpu: freesync_module init done %p.\n",</div><div class='add'>+		drm_dbg_driver(adev_to_drm(adev), "amdgpu: freesync_module init done %p.\n",</div><div class='ctx'> 				adev-&gt;dm.freesync_module);</div><div class='ctx'> </div><div class='ctx'> 	amdgpu_dm_init_color_mod();</div><div class='hunk'>@@ -2154,7 +2065,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;dm.vblank_control_workqueue =</div><div class='ctx'> 			create_singlethread_workqueue("dm_vblank_control_workqueue");</div><div class='ctx'> 		if (!adev-&gt;dm.vblank_control_workqueue)</div><div class='del'>-			DRM_ERROR("amdgpu: failed to initialize vblank_workqueue.\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: failed to initialize vblank_workqueue.\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (adev-&gt;dm.dc-&gt;caps.ips_support &amp;&amp;</div><div class='hunk'>@@ -2165,9 +2076,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;dm.hdcp_workqueue = hdcp_create_workqueue(adev, &amp;init_params.cp_psp, adev-&gt;dm.dc);</div><div class='ctx'> </div><div class='ctx'> 		if (!adev-&gt;dm.hdcp_workqueue)</div><div class='del'>-			DRM_ERROR("amdgpu: failed to initialize hdcp_workqueue.\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: failed to initialize hdcp_workqueue.\n");</div><div class='ctx'> 		else</div><div class='del'>-			DRM_DEBUG_DRIVER("amdgpu: hdcp_workqueue init done %p.\n", adev-&gt;dm.hdcp_workqueue);</div><div class='add'>+			drm_dbg_driver(adev_to_drm(adev), "amdgpu: hdcp_workqueue init done %p.\n", adev-&gt;dm.hdcp_workqueue);</div><div class='ctx'> </div><div class='ctx'> 		dc_init_callbacks(adev-&gt;dm.dc, &amp;init_params);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2175,20 +2086,29 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 		init_completion(&amp;adev-&gt;dm.dmub_aux_transfer_done);</div><div class='ctx'> 		adev-&gt;dm.dmub_notify = kzalloc(sizeof(struct dmub_notification), GFP_KERNEL);</div><div class='ctx'> 		if (!adev-&gt;dm.dmub_notify) {</div><div class='del'>-			DRM_INFO("amdgpu: fail to allocate adev-&gt;dm.dmub_notify");</div><div class='add'>+			drm_info(adev_to_drm(adev), "amdgpu: fail to allocate adev-&gt;dm.dmub_notify");</div><div class='ctx'> 			goto error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		adev-&gt;dm.delayed_hpd_wq = create_singlethread_workqueue("amdgpu_dm_hpd_wq");</div><div class='ctx'> 		if (!adev-&gt;dm.delayed_hpd_wq) {</div><div class='del'>-			DRM_ERROR("amdgpu: failed to create hpd offload workqueue.\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: failed to create hpd offload workqueue.\n");</div><div class='ctx'> 			goto error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		amdgpu_dm_outbox_init(adev);</div><div class='ctx'> 		if (!register_dmub_notify_callback(adev, DMUB_NOTIFICATION_AUX_REPLY,</div><div class='ctx'> 			dmub_aux_setconfig_callback, false)) {</div><div class='del'>-			DRM_ERROR("amdgpu: fail to register dmub aux callback");</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: fail to register dmub aux callback");</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (size_t i = 0; i &lt; ARRAY_SIZE(adev-&gt;dm.fused_io); i++)</div><div class='add'>+			init_completion(&amp;adev-&gt;dm.fused_io[i].replied);</div><div class='add'>+</div><div class='add'>+		if (!register_dmub_notify_callback(adev, DMUB_NOTIFICATION_FUSED_IO,</div><div class='add'>+			dmub_aux_fused_io_callback, false)) {</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: fail to register dmub fused io callback");</div><div class='ctx'> 			goto error;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Enable outbox notification only after IRQ handlers are registered and DMUB is alive.</div><div class='hunk'>@@ -2205,7 +2125,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_dm_initialize_drm_device(adev)) {</div><div class='del'>-		DRM_ERROR(</div><div class='add'>+		drm_err(adev_to_drm(adev),</div><div class='ctx'> 		"amdgpu: failed to initialize sw for display support.\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2220,7 +2140,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> 	adev_to_drm(adev)-&gt;mode_config.cursor_height = adev-&gt;dm.dc-&gt;caps.max_cursor_size;</div><div class='ctx'> </div><div class='ctx'> 	if (drm_vblank_init(adev_to_drm(adev), adev-&gt;dm.display_indexes_num)) {</div><div class='del'>-		DRM_ERROR(</div><div class='add'>+		drm_err(adev_to_drm(adev),</div><div class='ctx'> 		"amdgpu: failed to initialize sw for display support.\n");</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2228,14 +2148,14 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)</div><div class='ctx'> #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)</div><div class='ctx'> 	amdgpu_dm_crtc_secure_display_create_contexts(adev);</div><div class='ctx'> 	if (!adev-&gt;dm.secure_display_ctx.crtc_ctx)</div><div class='del'>-		DRM_ERROR("amdgpu: failed to initialize secure display contexts.\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "amdgpu: failed to initialize secure display contexts.\n");</div><div class='ctx'> </div><div class='ctx'> 	if (amdgpu_ip_version(adev, DCE_HWIP, 0) &gt;= IP_VERSION(4, 0, 1))</div><div class='ctx'> 		adev-&gt;dm.secure_display_ctx.support_mul_roi = true;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	DRM_DEBUG_DRIVER("KMS initialized.\n");</div><div class='add'>+	drm_dbg_driver(adev_to_drm(adev), "KMS initialized.\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> error:</div><div class='hunk'>@@ -2408,7 +2328,7 @@ static int load_dmcu_fw(struct amdgpu_device *adev)</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev-&gt;asic_type);</div><div class='add'>+		drm_err(adev_to_drm(adev), "Unsupported ASIC type: 0x%X\n", adev-&gt;asic_type);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2426,7 +2346,7 @@ static int load_dmcu_fw(struct amdgpu_device *adev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "amdgpu_dm: Can't validate firmware \"%s\"\n",</div><div class='add'>+		drm_err(adev_to_drm(adev), "amdgpu_dm: Can't validate firmware \"%s\"\n",</div><div class='ctx'> 			fw_name_dmcu);</div><div class='ctx'> 		amdgpu_ucode_release(&amp;adev-&gt;dm.fw_dmcu);</div><div class='ctx'> 		return r;</div><div class='hunk'>@@ -2551,7 +2471,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> 		adev-&gt;firmware.fw_size +=</div><div class='ctx'> 			ALIGN(le32_to_cpu(hdr-&gt;inst_const_bytes), PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-		DRM_INFO("Loading DMUB firmware via PSP: version=0x%08X\n",</div><div class='add'>+		drm_info(adev_to_drm(adev), "Loading DMUB firmware via PSP: version=0x%08X\n",</div><div class='ctx'> 			 adev-&gt;dm.dmcub_fw_version);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2560,7 +2480,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	dmub_srv = adev-&gt;dm.dmub_srv;</div><div class='ctx'> </div><div class='ctx'> 	if (!dmub_srv) {</div><div class='del'>-		DRM_ERROR("Failed to allocate DMUB service!\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to allocate DMUB service!\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2573,7 +2493,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	/* Create the DMUB service. */</div><div class='ctx'> 	status = dmub_srv_create(dmub_srv, &amp;create_params);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='del'>-		DRM_ERROR("Error creating DMUB service: %d\n", status);</div><div class='add'>+		drm_err(adev_to_drm(adev), "Error creating DMUB service: %d\n", status);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2598,7 +2518,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> 					   &amp;region_info);</div><div class='ctx'> </div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='del'>-		DRM_ERROR("Error calculating DMUB region info: %d\n", status);</div><div class='add'>+		drm_err(adev_to_drm(adev), "Error calculating DMUB region info: %d\n", status);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2627,14 +2547,14 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	fb_info = adev-&gt;dm.dmub_fb_info;</div><div class='ctx'> </div><div class='ctx'> 	if (!fb_info) {</div><div class='del'>-		DRM_ERROR(</div><div class='add'>+		drm_err(adev_to_drm(adev),</div><div class='ctx'> 			"Failed to allocate framebuffer info for DMUB service!\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	status = dmub_srv_calc_mem_info(dmub_srv, &amp;memory_params, fb_info);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='del'>-		DRM_ERROR("Error calculating DMUB FB info: %d\n", status);</div><div class='add'>+		drm_err(adev_to_drm(adev), "Error calculating DMUB FB info: %d\n", status);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2651,7 +2571,7 @@ static int dm_sw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	adev-&gt;dm.cgs_device = amdgpu_cgs_create_device(adev);</div><div class='ctx'> </div><div class='ctx'> 	if (!adev-&gt;dm.cgs_device) {</div><div class='del'>-		DRM_ERROR("amdgpu: failed to create cgs device.\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "amdgpu: failed to create cgs device.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2957,7 +2877,7 @@ static int amdgpu_dm_smu_write_watermarks_table(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	ret = amdgpu_dpm_write_watermarks_table(adev);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		DRM_ERROR("Failed to update WMTABLE!\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to update WMTABLE!\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2975,13 +2895,13 @@ static int dm_oem_i2c_hw_init(struct amdgpu_device *adev)</div><div class='ctx'> 	if (oem_ddc_service) {</div><div class='ctx'> 		oem_i2c = create_i2c(oem_ddc_service, true);</div><div class='ctx'> 		if (!oem_i2c) {</div><div class='del'>-			dev_info(adev-&gt;dev, "Failed to create oem i2c adapter data\n");</div><div class='add'>+			drm_info(adev_to_drm(adev), "Failed to create oem i2c adapter data\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		r = i2c_add_adapter(&amp;oem_i2c-&gt;base);</div><div class='ctx'> 		if (r) {</div><div class='del'>-			dev_info(adev-&gt;dev, "Failed to register oem i2c\n");</div><div class='add'>+			drm_info(adev_to_drm(adev), "Failed to register oem i2c\n");</div><div class='ctx'> 			kfree(oem_i2c);</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3024,7 +2944,7 @@ static int dm_hw_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 	r = dm_oem_i2c_hw_init(adev);</div><div class='ctx'> 	if (r)</div><div class='del'>-		dev_info(adev-&gt;dev, "Failed to add OEM i2c bus\n");</div><div class='add'>+		drm_info(adev_to_drm(adev), "Failed to add OEM i2c bus\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3067,7 +2987,7 @@ static void dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,</div><div class='ctx'> 			irq_source = IRQ_TYPE_PFLIP + acrtc-&gt;otg_inst;</div><div class='ctx'> 			rc = dc_interrupt_set(adev-&gt;dm.dc, irq_source, enable) ? 0 : -EBUSY;</div><div class='ctx'> 			if (rc)</div><div class='del'>-				DRM_WARN("Failed to %s pflip interrupts\n",</div><div class='add'>+				drm_warn(adev_to_drm(adev), "Failed to %s pflip interrupts\n",</div><div class='ctx'> 					 enable ? "enable" : "disable");</div><div class='ctx'> </div><div class='ctx'> 			if (enable) {</div><div class='hunk'>@@ -3077,14 +2997,14 @@ static void dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,</div><div class='ctx'> 				rc = amdgpu_dm_crtc_set_vupdate_irq(&amp;acrtc-&gt;base, false);</div><div class='ctx'> </div><div class='ctx'> 			if (rc)</div><div class='del'>-				DRM_WARN("Failed to %sable vupdate interrupt\n", enable ? "en" : "dis");</div><div class='add'>+				drm_warn(adev_to_drm(adev), "Failed to %sable vupdate interrupt\n", enable ? "en" : "dis");</div><div class='ctx'> </div><div class='ctx'> 			irq_source = IRQ_TYPE_VBLANK + acrtc-&gt;otg_inst;</div><div class='ctx'> 			/* During gpu-reset we disable and then enable vblank irq, so</div><div class='ctx'> 			 * don't use amdgpu_irq_get/put() to avoid refcount change.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (!dc_interrupt_set(adev-&gt;dm.dc, irq_source, enable))</div><div class='del'>-				DRM_WARN("Failed to %sable vblank interrupt\n", enable ? "en" : "dis");</div><div class='add'>+				drm_warn(adev_to_drm(adev), "Failed to %sable vblank interrupt\n", enable ? "en" : "dis");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3334,16 +3254,16 @@ static void dm_gpureset_commit_state(struct dc_state *dc_state,</div><div class='ctx'> 	for (k = 0; k &lt; dc_state-&gt;stream_count; k++) {</div><div class='ctx'> 		bundle-&gt;stream_update.stream = dc_state-&gt;streams[k];</div><div class='ctx'> </div><div class='del'>-		for (m = 0; m &lt; dc_state-&gt;stream_status-&gt;plane_count; m++) {</div><div class='add'>+		for (m = 0; m &lt; dc_state-&gt;stream_status[k].plane_count; m++) {</div><div class='ctx'> 			bundle-&gt;surface_updates[m].surface =</div><div class='del'>-				dc_state-&gt;stream_status-&gt;plane_states[m];</div><div class='add'>+				dc_state-&gt;stream_status[k].plane_states[m];</div><div class='ctx'> 			bundle-&gt;surface_updates[m].surface-&gt;force_full_update =</div><div class='ctx'> 				true;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		update_planes_and_stream_adapter(dm-&gt;dc,</div><div class='ctx'> 					 UPDATE_TYPE_FULL,</div><div class='del'>-					 dc_state-&gt;stream_status-&gt;plane_count,</div><div class='add'>+					 dc_state-&gt;stream_status[k].plane_count,</div><div class='ctx'> 					 dc_state-&gt;streams[k],</div><div class='ctx'> 					 &amp;bundle-&gt;stream_update,</div><div class='ctx'> 					 bundle-&gt;surface_updates);</div><div class='hunk'>@@ -3460,11 +3380,6 @@ static int dm_resume(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* leave display off for S4 sequence */</div><div class='del'>-	if (adev-&gt;in_s4)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	/* Recreate dc_state - DC invalidates it when setting power state to S3. */</div><div class='ctx'> 	dc_state_release(dm_state-&gt;context);</div><div class='ctx'> 	dm_state-&gt;context = dc_state_create(dm-&gt;dc, NULL);</div><div class='hunk'>@@ -3919,20 +3834,21 @@ static void handle_hpd_irq(void *param)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void schedule_hpd_rx_offload_work(struct hpd_rx_irq_offload_work_queue *offload_wq,</div><div class='add'>+static void schedule_hpd_rx_offload_work(struct amdgpu_device *adev, struct hpd_rx_irq_offload_work_queue *offload_wq,</div><div class='ctx'> 							union hpd_irq_data hpd_irq_data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hpd_rx_irq_offload_work *offload_work =</div><div class='ctx'> 				kzalloc(sizeof(*offload_work), GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> 	if (!offload_work) {</div><div class='del'>-		DRM_ERROR("Failed to allocate hpd_rx_irq_offload_work.\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to allocate hpd_rx_irq_offload_work.\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;offload_work-&gt;work, dm_handle_hpd_rx_offload_work);</div><div class='ctx'> 	offload_work-&gt;data = hpd_irq_data;</div><div class='ctx'> 	offload_work-&gt;offload_wq = offload_wq;</div><div class='add'>+	offload_work-&gt;adev = adev;</div><div class='ctx'> </div><div class='ctx'> 	queue_work(offload_wq-&gt;wq, &amp;offload_work-&gt;work);</div><div class='ctx'> 	DRM_DEBUG_KMS("queue work to handle hpd_rx offload work");</div><div class='hunk'>@@ -3974,7 +3890,7 @@ static void handle_hpd_rx_irq(void *param)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (hpd_irq_data.bytes.device_service_irq.bits.AUTOMATED_TEST) {</div><div class='del'>-		schedule_hpd_rx_offload_work(offload_wq, hpd_irq_data);</div><div class='add'>+		schedule_hpd_rx_offload_work(adev, offload_wq, hpd_irq_data);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3996,7 +3912,7 @@ static void handle_hpd_rx_irq(void *param)</div><div class='ctx'> 			spin_unlock(&amp;offload_wq-&gt;offload_lock);</div><div class='ctx'> </div><div class='ctx'> 			if (!skip)</div><div class='del'>-				schedule_hpd_rx_offload_work(offload_wq, hpd_irq_data);</div><div class='add'>+				schedule_hpd_rx_offload_work(adev, offload_wq, hpd_irq_data);</div><div class='ctx'> </div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -4013,7 +3929,7 @@ static void handle_hpd_rx_irq(void *param)</div><div class='ctx'> 			spin_unlock(&amp;offload_wq-&gt;offload_lock);</div><div class='ctx'> </div><div class='ctx'> 			if (!skip)</div><div class='del'>-				schedule_hpd_rx_offload_work(offload_wq, hpd_irq_data);</div><div class='add'>+				schedule_hpd_rx_offload_work(adev, offload_wq, hpd_irq_data);</div><div class='ctx'> </div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -4023,7 +3939,7 @@ out:</div><div class='ctx'> 	if (result &amp;&amp; !is_mst_root_connector) {</div><div class='ctx'> 		/* Downstream Port status changed. */</div><div class='ctx'> 		if (!dc_link_detect_connection_type(dc_link, &amp;new_connection_type))</div><div class='del'>-			DRM_ERROR("KMS: Failed to detect connector\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "KMS: Failed to detect connector\n");</div><div class='ctx'> </div><div class='ctx'> 		if (aconnector-&gt;base.force &amp;&amp; new_connection_type == dc_connection_none) {</div><div class='ctx'> 			emulated_link_detect(dc_link);</div><div class='hunk'>@@ -4086,19 +4002,19 @@ static int register_hpd_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	if (dc_is_dmub_outbox_supported(adev-&gt;dm.dc)) {</div><div class='ctx'> 		if (!register_dmub_notify_callback(adev, DMUB_NOTIFICATION_HPD,</div><div class='ctx'> 			dmub_hpd_callback, true)) {</div><div class='del'>-			DRM_ERROR("amdgpu: fail to register dmub hpd callback");</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: fail to register dmub hpd callback");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!register_dmub_notify_callback(adev, DMUB_NOTIFICATION_HPD_IRQ,</div><div class='ctx'> 			dmub_hpd_callback, true)) {</div><div class='del'>-			DRM_ERROR("amdgpu: fail to register dmub hpd callback");</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: fail to register dmub hpd callback");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!register_dmub_notify_callback(adev, DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,</div><div class='ctx'> 			dmub_hpd_sense_callback, true)) {</div><div class='del'>-			DRM_ERROR("amdgpu: fail to register dmub hpd sense callback");</div><div class='add'>+			drm_err(adev_to_drm(adev), "amdgpu: fail to register dmub hpd sense callback");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4119,7 +4035,7 @@ static int register_hpd_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 			if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 				int_params.irq_source  &lt; DC_IRQ_SOURCE_HPD1 ||</div><div class='ctx'> 				int_params.irq_source  &gt; DC_IRQ_SOURCE_HPD6) {</div><div class='del'>-				DRM_ERROR("Failed to register hpd irq!\n");</div><div class='add'>+				drm_err(adev_to_drm(adev), "Failed to register hpd irq!\n");</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -4137,7 +4053,7 @@ static int register_hpd_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 			if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 				int_params.irq_source  &lt; DC_IRQ_SOURCE_HPD1RX ||</div><div class='ctx'> 				int_params.irq_source  &gt; DC_IRQ_SOURCE_HPD6RX) {</div><div class='del'>-				DRM_ERROR("Failed to register hpd rx irq!\n");</div><div class='add'>+				drm_err(adev_to_drm(adev), "Failed to register hpd rx irq!\n");</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -4179,7 +4095,7 @@ static int dce60_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	for (i = 0; i &lt; adev-&gt;mode_info.num_crtc; i++) {</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, client_id, i + 1, &amp;adev-&gt;crtc_irq);</div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add crtc irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add crtc irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4190,7 +4106,7 @@ static int dce60_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_VBLANK1 ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_VBLANK6) {</div><div class='del'>-			DRM_ERROR("Failed to register vblank irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register vblank irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4209,7 +4125,7 @@ static int dce60_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 			i &lt;= VISLANDS30_IV_SRCID_D6_GRPH_PFLIP; i += 2) {</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, client_id, i, &amp;adev-&gt;pageflip_irq);</div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add page flip irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add page flip irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4220,7 +4136,7 @@ static int dce60_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_PFLIP_FIRST ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_PFLIP_LAST) {</div><div class='del'>-			DRM_ERROR("Failed to register pflip irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register pflip irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4238,7 +4154,7 @@ static int dce60_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	r = amdgpu_irq_add_id(adev, client_id,</div><div class='ctx'> 			VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &amp;adev-&gt;hpd_irq);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		DRM_ERROR("Failed to add hpd irq id!\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to add hpd irq id!\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4280,7 +4196,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	for (i = VISLANDS30_IV_SRCID_D1_VERTICAL_INTERRUPT0; i &lt;= VISLANDS30_IV_SRCID_D6_VERTICAL_INTERRUPT0; i++) {</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, client_id, i, &amp;adev-&gt;crtc_irq);</div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add crtc irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add crtc irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4291,7 +4207,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_VBLANK1 ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_VBLANK6) {</div><div class='del'>-			DRM_ERROR("Failed to register vblank irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register vblank irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4309,7 +4225,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	for (i = VISLANDS30_IV_SRCID_D1_V_UPDATE_INT; i &lt;= VISLANDS30_IV_SRCID_D6_V_UPDATE_INT; i += 2) {</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, client_id, i, &amp;adev-&gt;vupdate_irq);</div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add vupdate irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add vupdate irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4320,7 +4236,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_VUPDATE1 ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_VUPDATE6) {</div><div class='del'>-			DRM_ERROR("Failed to register vupdate irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register vupdate irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4339,7 +4255,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 			i &lt;= VISLANDS30_IV_SRCID_D6_GRPH_PFLIP; i += 2) {</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, client_id, i, &amp;adev-&gt;pageflip_irq);</div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add page flip irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add page flip irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4350,7 +4266,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_PFLIP_FIRST ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_PFLIP_LAST) {</div><div class='del'>-			DRM_ERROR("Failed to register pflip irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register pflip irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4368,7 +4284,7 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	r = amdgpu_irq_add_id(adev, client_id,</div><div class='ctx'> 			VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A, &amp;adev-&gt;hpd_irq);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		DRM_ERROR("Failed to add hpd irq id!\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to add hpd irq id!\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4418,7 +4334,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &amp;adev-&gt;crtc_irq);</div><div class='ctx'> </div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add crtc irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add crtc irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4429,7 +4345,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_VBLANK1 ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_VBLANK6) {</div><div class='del'>-			DRM_ERROR("Failed to register vblank irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register vblank irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4450,7 +4366,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 				vrtl_int_srcid[i], &amp;adev-&gt;vline0_irq);</div><div class='ctx'> </div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add vline0 irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add vline0 irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4461,7 +4377,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source &lt; DC_IRQ_SOURCE_DC1_VLINE0 ||</div><div class='ctx'> 			int_params.irq_source &gt; DC_IRQ_SOURCE_DC6_VLINE0) {</div><div class='del'>-			DRM_ERROR("Failed to register vline0 irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register vline0 irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4489,7 +4405,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &amp;adev-&gt;vupdate_irq);</div><div class='ctx'> </div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add vupdate irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add vupdate irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4500,7 +4416,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_VUPDATE1 ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_VUPDATE6) {</div><div class='del'>-			DRM_ERROR("Failed to register vupdate irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register vupdate irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4520,7 +4436,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 			i++) {</div><div class='ctx'> 		r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &amp;adev-&gt;pageflip_irq);</div><div class='ctx'> 		if (r) {</div><div class='del'>-			DRM_ERROR("Failed to add page flip irq id!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to add page flip irq id!\n");</div><div class='ctx'> 			return r;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4531,7 +4447,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 		if (int_params.irq_source == DC_IRQ_SOURCE_INVALID ||</div><div class='ctx'> 			int_params.irq_source  &lt; DC_IRQ_SOURCE_PFLIP_FIRST ||</div><div class='ctx'> 			int_params.irq_source  &gt; DC_IRQ_SOURCE_PFLIP_LAST) {</div><div class='del'>-			DRM_ERROR("Failed to register pflip irq!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to register pflip irq!\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -4549,7 +4465,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, DCN_1_0__SRCID__DC_HPD1_INT,</div><div class='ctx'> 			&amp;adev-&gt;hpd_irq);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		DRM_ERROR("Failed to add hpd irq id!\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to add hpd irq id!\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4571,7 +4487,7 @@ static int register_outbox_irq_handlers(struct amdgpu_device *adev)</div><div class='ctx'> 	r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, DCN_1_0__SRCID__DMCUB_OUTBOX_LOW_PRIORITY_READY_INT,</div><div class='ctx'> 			&amp;adev-&gt;dmub_outbox_irq);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		DRM_ERROR("Failed to add outbox irq id!\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to add outbox irq id!\n");</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4803,41 +4719,54 @@ static int get_brightness_range(const struct amdgpu_dm_backlight_caps *caps,</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 convert_brightness_from_user(const struct amdgpu_dm_backlight_caps *caps,</div><div class='del'>-					uint32_t brightness)</div><div class='add'>+static void convert_custom_brightness(const struct amdgpu_dm_backlight_caps *caps,</div><div class='add'>+				      uint32_t *brightness)</div><div class='ctx'> {</div><div class='del'>-	unsigned int min, max;</div><div class='ctx'> 	u8 prev_signal = 0, prev_lum = 0;</div><div class='add'>+	int i = 0;</div><div class='ctx'> </div><div class='del'>-	if (!get_brightness_range(caps, &amp;min, &amp;max))</div><div class='del'>-		return brightness;</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; caps-&gt;data_points; i++) {</div><div class='del'>-		u8 signal, lum;</div><div class='add'>+	if (amdgpu_dc_debug_mask &amp; DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		if (amdgpu_dc_debug_mask &amp; DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE)</div><div class='del'>-			break;</div><div class='add'>+	if (!caps-&gt;data_points)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		signal = caps-&gt;luminance_data[i].input_signal;</div><div class='del'>-		lum = caps-&gt;luminance_data[i].luminance;</div><div class='add'>+	/* choose start to run less interpolation steps */</div><div class='add'>+	if (caps-&gt;luminance_data[caps-&gt;data_points/2].input_signal &gt; *brightness)</div><div class='add'>+		i = caps-&gt;data_points/2;</div><div class='add'>+	do {</div><div class='add'>+		u8 signal = caps-&gt;luminance_data[i].input_signal;</div><div class='add'>+		u8 lum = caps-&gt;luminance_data[i].luminance;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * brightness == signal: luminance is percent numerator</div><div class='ctx'> 		 * brightness &lt; signal: interpolate between previous and current luminance numerator</div><div class='ctx'> 		 * brightness &gt; signal: find next data point</div><div class='ctx'> 		 */</div><div class='del'>-		if (brightness &lt; signal)</div><div class='del'>-			lum = prev_lum + DIV_ROUND_CLOSEST((lum - prev_lum) *</div><div class='del'>-							   (brightness - prev_signal),</div><div class='del'>-							   signal - prev_signal);</div><div class='del'>-		else if (brightness &gt; signal) {</div><div class='add'>+		if (*brightness &gt; signal) {</div><div class='ctx'> 			prev_signal = signal;</div><div class='ctx'> 			prev_lum = lum;</div><div class='add'>+			i++;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		brightness = DIV_ROUND_CLOSEST(lum * brightness, 101);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+		if (*brightness &lt; signal)</div><div class='add'>+			lum = prev_lum + DIV_ROUND_CLOSEST((lum - prev_lum) *</div><div class='add'>+							   (*brightness - prev_signal),</div><div class='add'>+							   signal - prev_signal);</div><div class='add'>+		*brightness = DIV_ROUND_CLOSEST(lum * *brightness, 101);</div><div class='add'>+		return;</div><div class='add'>+	} while (i &lt; caps-&gt;data_points);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_brightness_from_user(const struct amdgpu_dm_backlight_caps *caps,</div><div class='add'>+					uint32_t brightness)</div><div class='add'>+{</div><div class='add'>+	unsigned int min, max;</div><div class='add'>+</div><div class='add'>+	if (!get_brightness_range(caps, &amp;min, &amp;max))</div><div class='add'>+		return brightness;</div><div class='add'>+</div><div class='add'>+	convert_custom_brightness(caps, &amp;brightness);</div><div class='ctx'> </div><div class='ctx'> 	// Rescale 0..255 to min..max</div><div class='ctx'> 	return min + DIV_ROUND_CLOSEST((max - min) * brightness,</div><div class='hunk'>@@ -5016,10 +4945,10 @@ amdgpu_dm_register_backlight_device(struct amdgpu_dm_connector *aconnector)</div><div class='ctx'> 	dm-&gt;brightness[aconnector-&gt;bl_idx] = props.brightness;</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(dm-&gt;backlight_dev[aconnector-&gt;bl_idx])) {</div><div class='del'>-		DRM_ERROR("DM: Backlight registration failed!\n");</div><div class='add'>+		drm_err(drm, "DM: Backlight registration failed!\n");</div><div class='ctx'> 		dm-&gt;backlight_dev[aconnector-&gt;bl_idx] = NULL;</div><div class='ctx'> 	} else</div><div class='del'>-		DRM_DEBUG_DRIVER("DM: Registered Backlight device: %s\n", bl_name);</div><div class='add'>+		drm_dbg_driver(drm, "DM: Registered Backlight device: %s\n", bl_name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int initialize_plane(struct amdgpu_display_manager *dm,</div><div class='hunk'>@@ -5033,7 +4962,7 @@ static int initialize_plane(struct amdgpu_display_manager *dm,</div><div class='ctx'> </div><div class='ctx'> 	plane = kzalloc(sizeof(struct drm_plane), GFP_KERNEL);</div><div class='ctx'> 	if (!plane) {</div><div class='del'>-		DRM_ERROR("KMS: Failed to allocate plane\n");</div><div class='add'>+		drm_err(adev_to_drm(dm-&gt;adev), "KMS: Failed to allocate plane\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	plane-&gt;type = plane_type;</div><div class='hunk'>@@ -5051,7 +4980,7 @@ static int initialize_plane(struct amdgpu_display_manager *dm,</div><div class='ctx'> 	ret = amdgpu_dm_plane_init(dm, plane, possible_crtcs, plane_cap);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='del'>-		DRM_ERROR("KMS: Failed to initialize plane\n");</div><div class='add'>+		drm_err(adev_to_drm(dm-&gt;adev), "KMS: Failed to initialize plane\n");</div><div class='ctx'> 		kfree(plane);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5120,14 +5049,14 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	link_cnt = dm-&gt;dc-&gt;caps.max_links;</div><div class='ctx'> 	if (amdgpu_dm_mode_config_init(dm-&gt;adev)) {</div><div class='del'>-		DRM_ERROR("DM: Failed to initialize mode config\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "DM: Failed to initialize mode config\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* There is one primary plane per CRTC */</div><div class='ctx'> 	primary_planes = dm-&gt;dc-&gt;caps.max_streams;</div><div class='ctx'> 	if (primary_planes &gt; AMDGPU_MAX_PLANES) {</div><div class='del'>-		DRM_ERROR("DM: Plane nums out of 6 planes\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "DM: Plane nums out of 6 planes\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5140,7 +5069,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 		if (initialize_plane(dm, mode_info, i,</div><div class='ctx'> 				     DRM_PLANE_TYPE_PRIMARY, plane)) {</div><div class='del'>-			DRM_ERROR("KMS: Failed to initialize primary plane\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "KMS: Failed to initialize primary plane\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5172,14 +5101,14 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> </div><div class='ctx'> 		if (initialize_plane(dm, NULL, primary_planes + i,</div><div class='ctx'> 				     DRM_PLANE_TYPE_OVERLAY, plane)) {</div><div class='del'>-			DRM_ERROR("KMS: Failed to initialize overlay plane\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "KMS: Failed to initialize overlay plane\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dm-&gt;dc-&gt;caps.max_streams; i++)</div><div class='ctx'> 		if (amdgpu_dm_crtc_init(dm, mode_info-&gt;planes[i], i)) {</div><div class='del'>-			DRM_ERROR("KMS: Failed to initialize crtc\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "KMS: Failed to initialize crtc\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -5199,7 +5128,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 	case IP_VERSION(3, 6, 0):</div><div class='ctx'> 	case IP_VERSION(4, 0, 1):</div><div class='ctx'> 		if (register_outbox_irq_handlers(dm-&gt;adev)) {</div><div class='del'>-			DRM_ERROR("DM: Failed to initialize IRQ\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "DM: Failed to initialize IRQ\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -5249,7 +5178,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (link_cnt &gt; MAX_LINKS) {</div><div class='del'>-		DRM_ERROR(</div><div class='add'>+		drm_err(adev_to_drm(adev),</div><div class='ctx'> 			"KMS: Cannot support more than %d display indexes\n",</div><div class='ctx'> 				MAX_LINKS);</div><div class='ctx'> 		goto fail;</div><div class='hunk'>@@ -5265,12 +5194,12 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 			struct amdgpu_dm_wb_connector *wbcon = kzalloc(sizeof(*wbcon), GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> 			if (!wbcon) {</div><div class='del'>-				DRM_ERROR("KMS: Failed to allocate writeback connector\n");</div><div class='add'>+				drm_err(adev_to_drm(adev), "KMS: Failed to allocate writeback connector\n");</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (amdgpu_dm_wb_connector_init(dm, wbcon, i)) {</div><div class='del'>-				DRM_ERROR("KMS: Failed to initialize writeback connector\n");</div><div class='add'>+				drm_err(adev_to_drm(adev), "KMS: Failed to initialize writeback connector\n");</div><div class='ctx'> 				kfree(wbcon);</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -5290,12 +5219,12 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> </div><div class='ctx'> 		if (amdgpu_dm_encoder_init(dm-&gt;ddev, aencoder, i)) {</div><div class='del'>-			DRM_ERROR("KMS: Failed to initialize encoder\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "KMS: Failed to initialize encoder\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (amdgpu_dm_connector_init(dm, aconnector, i, aencoder)) {</div><div class='del'>-			DRM_ERROR("KMS: Failed to initialize connector\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "KMS: Failed to initialize connector\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -5304,7 +5233,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 				aconnector;</div><div class='ctx'> </div><div class='ctx'> 		if (!dc_link_detect_connection_type(link, &amp;new_connection_type))</div><div class='del'>-			DRM_ERROR("KMS: Failed to detect connector\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "KMS: Failed to detect connector\n");</div><div class='ctx'> </div><div class='ctx'> 		if (aconnector-&gt;base.force &amp;&amp; new_connection_type == dc_connection_none) {</div><div class='ctx'> 			emulated_link_detect(link);</div><div class='hunk'>@@ -5326,8 +5255,15 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 					if (amdgpu_dm_set_replay_caps(link, aconnector))</div><div class='ctx'> 						psr_feature_enabled = false;</div><div class='ctx'> </div><div class='del'>-				if (psr_feature_enabled)</div><div class='add'>+				if (psr_feature_enabled) {</div><div class='ctx'> 					amdgpu_dm_set_psr_caps(link);</div><div class='add'>+					drm_info(adev_to_drm(adev), "PSR support %d, DC PSR ver %d, sink PSR ver %d DPCD caps 0x%x su_y_granularity %d\n",</div><div class='add'>+						 link-&gt;psr_settings.psr_feature_enabled,</div><div class='add'>+						 link-&gt;psr_settings.psr_version,</div><div class='add'>+						 link-&gt;dpcd_caps.psr_info.psr_version,</div><div class='add'>+						 link-&gt;dpcd_caps.psr_info.psr_dpcd_caps.raw,</div><div class='add'>+						 link-&gt;dpcd_caps.psr_info.psr2_su_y_granularity_cap);</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		amdgpu_set_panel_orientation(&amp;aconnector-&gt;base);</div><div class='hunk'>@@ -5341,7 +5277,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 	case CHIP_VERDE:</div><div class='ctx'> 	case CHIP_OLAND:</div><div class='ctx'> 		if (dce60_register_irq_handlers(dm-&gt;adev)) {</div><div class='del'>-			DRM_ERROR("DM: Failed to initialize IRQ\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "DM: Failed to initialize IRQ\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -5363,7 +5299,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 	case CHIP_VEGA12:</div><div class='ctx'> 	case CHIP_VEGA20:</div><div class='ctx'> 		if (dce110_register_irq_handlers(dm-&gt;adev)) {</div><div class='del'>-			DRM_ERROR("DM: Failed to initialize IRQ\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "DM: Failed to initialize IRQ\n");</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -5391,12 +5327,12 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)</div><div class='ctx'> 		case IP_VERSION(3, 6, 0):</div><div class='ctx'> 		case IP_VERSION(4, 0, 1):</div><div class='ctx'> 			if (dcn10_register_irq_handlers(dm-&gt;adev)) {</div><div class='del'>-				DRM_ERROR("DM: Failed to initialize IRQ\n");</div><div class='add'>+				drm_err(adev_to_drm(adev), "DM: Failed to initialize IRQ\n");</div><div class='ctx'> 				goto fail;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			DRM_ERROR("Unsupported DCE IP versions: 0x%X\n",</div><div class='add'>+			drm_err(adev_to_drm(adev), "Unsupported DCE IP versions: 0x%X\n",</div><div class='ctx'> 					amdgpu_ip_version(adev, DCE_HWIP, 0));</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -5557,7 +5493,7 @@ static int dm_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 	/* if there is no object header, skip DM */</div><div class='ctx'> 	if (!amdgpu_atom_parse_data_header(ctx, index, NULL, NULL, NULL, &amp;data_offset)) {</div><div class='ctx'> 		adev-&gt;harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK;</div><div class='del'>-		dev_info(adev-&gt;dev, "No object header, skipping DM\n");</div><div class='add'>+		drm_info(adev_to_drm(adev), "No object header, skipping DM\n");</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5669,7 +5605,7 @@ static int dm_early_init(struct amdgpu_ip_block *ip_block)</div><div class='ctx'> 			adev-&gt;mode_info.num_dig = 4;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			DRM_ERROR("Unsupported DCE IP versions: 0x%x\n",</div><div class='add'>+			drm_err(adev_to_drm(adev), "Unsupported DCE IP versions: 0x%x\n",</div><div class='ctx'> 					amdgpu_ip_version(adev, DCE_HWIP, 0));</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -5818,7 +5754,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,</div><div class='ctx'> 		plane_info-&gt;format = SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		DRM_ERROR(</div><div class='add'>+		drm_err(adev_to_drm(adev),</div><div class='ctx'> 			"Unsupported screen format %p4cc\n",</div><div class='ctx'> 			&amp;fb-&gt;format-&gt;format);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -6339,6 +6275,7 @@ static void fill_stream_properties_from_drm_display_mode(</div><div class='ctx'> 	struct amdgpu_dm_connector *aconnector = NULL;</div><div class='ctx'> 	struct hdmi_vendor_infoframe hv_frame;</div><div class='ctx'> 	struct hdmi_avi_infoframe avi_frame;</div><div class='add'>+	ssize_t err;</div><div class='ctx'> </div><div class='ctx'> 	if (connector-&gt;connector_type != DRM_MODE_CONNECTOR_WRITEBACK)</div><div class='ctx'> 		aconnector = to_amdgpu_dm_connector(connector);</div><div class='hunk'>@@ -6385,9 +6322,17 @@ static void fill_stream_properties_from_drm_display_mode(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (stream-&gt;signal == SIGNAL_TYPE_HDMI_TYPE_A) {</div><div class='del'>-		drm_hdmi_avi_infoframe_from_display_mode(&amp;avi_frame, (struct drm_connector *)connector, mode_in);</div><div class='add'>+		err = drm_hdmi_avi_infoframe_from_display_mode(&amp;avi_frame,</div><div class='add'>+							       (struct drm_connector *)connector,</div><div class='add'>+							       mode_in);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			drm_warn_once(connector-&gt;dev, "Failed to setup avi infoframe on connector %s: %zd \n", connector-&gt;name, err);</div><div class='ctx'> 		timing_out-&gt;vic = avi_frame.video_code;</div><div class='del'>-		drm_hdmi_vendor_infoframe_from_display_mode(&amp;hv_frame, (struct drm_connector *)connector, mode_in);</div><div class='add'>+		err = drm_hdmi_vendor_infoframe_from_display_mode(&amp;hv_frame,</div><div class='add'>+								  (struct drm_connector *)connector,</div><div class='add'>+								  mode_in);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			drm_warn_once(connector-&gt;dev, "Failed to setup vendor infoframe on connector %s: %zd \n", connector-&gt;name, err);</div><div class='ctx'> 		timing_out-&gt;hdmi_vic = hv_frame.vic;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6500,19 +6445,19 @@ decide_crtc_timing_for_drm_display_mode(struct drm_display_mode *drm_mode,</div><div class='ctx'> 					const struct drm_display_mode *native_mode,</div><div class='ctx'> 					bool scale_enabled)</div><div class='ctx'> {</div><div class='del'>-	if (scale_enabled) {</div><div class='del'>-		copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode);</div><div class='del'>-	} else if (native_mode-&gt;clock == drm_mode-&gt;clock &amp;&amp;</div><div class='del'>-			native_mode-&gt;htotal == drm_mode-&gt;htotal &amp;&amp;</div><div class='del'>-			native_mode-&gt;vtotal == drm_mode-&gt;vtotal) {</div><div class='del'>-		copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode);</div><div class='add'>+	if (scale_enabled || (</div><div class='add'>+	    native_mode-&gt;clock == drm_mode-&gt;clock &amp;&amp;</div><div class='add'>+	    native_mode-&gt;htotal == drm_mode-&gt;htotal &amp;&amp;</div><div class='add'>+	    native_mode-&gt;vtotal == drm_mode-&gt;vtotal)) {</div><div class='add'>+		if (native_mode-&gt;crtc_clock)</div><div class='add'>+			copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* no scaling nor amdgpu inserted, no need to patch */</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct dc_sink *</div><div class='del'>-create_fake_sink(struct dc_link *link)</div><div class='add'>+create_fake_sink(struct drm_device *dev, struct dc_link *link)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_sink_init_data sink_init_data = { 0 };</div><div class='ctx'> 	struct dc_sink *sink = NULL;</div><div class='hunk'>@@ -6522,7 +6467,7 @@ create_fake_sink(struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> 	sink = dc_sink_create(&amp;sink_init_data);</div><div class='ctx'> 	if (!sink) {</div><div class='del'>-		DRM_ERROR("Failed to create sink!\n");</div><div class='add'>+		drm_err(dev, "Failed to create sink!\n");</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	sink-&gt;sink_signal = SIGNAL_TYPE_VIRTUAL;</div><div class='hunk'>@@ -6655,7 +6600,7 @@ get_highest_refresh_rate_mode(struct amdgpu_dm_connector *aconnector,</div><div class='ctx'> 		m_pref = list_first_entry_or_null(</div><div class='ctx'> 				&amp;aconnector-&gt;base.modes, struct drm_display_mode, head);</div><div class='ctx'> 		if (!m_pref) {</div><div class='del'>-			DRM_DEBUG_DRIVER("No preferred mode found in EDID\n");</div><div class='add'>+			drm_dbg_driver(aconnector-&gt;base.dev, "No preferred mode found in EDID\n");</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6830,7 +6775,7 @@ static void apply_dsc_policy_for_stream(struct amdgpu_dm_connector *aconnector,</div><div class='ctx'> 						dc_link_get_highest_encoding_format(aconnector-&gt;dc_link),</div><div class='ctx'> 						&amp;stream-&gt;timing.dsc_cfg)) {</div><div class='ctx'> 				stream-&gt;timing.flags.DSC = 1;</div><div class='del'>-				DRM_DEBUG_DRIVER("%s: SST_DSC [%s] DSC is selected from SST RX\n",</div><div class='add'>+				drm_dbg_driver(drm_connector-&gt;dev, "%s: SST_DSC [%s] DSC is selected from SST RX\n",</div><div class='ctx'> 							__func__, drm_connector-&gt;name);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (sink-&gt;link-&gt;dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) {</div><div class='hunk'>@@ -6850,7 +6795,7 @@ static void apply_dsc_policy_for_stream(struct amdgpu_dm_connector *aconnector,</div><div class='ctx'> 						dc_link_get_highest_encoding_format(aconnector-&gt;dc_link),</div><div class='ctx'> 						&amp;stream-&gt;timing.dsc_cfg)) {</div><div class='ctx'> 					stream-&gt;timing.flags.DSC = 1;</div><div class='del'>-					DRM_DEBUG_DRIVER("%s: SST_DSC [%s] DSC is selected from DP-HDMI PCON\n",</div><div class='add'>+					drm_dbg_driver(drm_connector-&gt;dev, "%s: SST_DSC [%s] DSC is selected from DP-HDMI PCON\n",</div><div class='ctx'> 									 __func__, drm_connector-&gt;name);</div><div class='ctx'> 				}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -6878,6 +6823,7 @@ create_stream_for_sink(struct drm_connector *connector,</div><div class='ctx'> 		       const struct dc_stream_state *old_stream,</div><div class='ctx'> 		       int requested_bpc)</div><div class='ctx'> {</div><div class='add'>+	struct drm_device *dev = connector-&gt;dev;</div><div class='ctx'> 	struct amdgpu_dm_connector *aconnector = NULL;</div><div class='ctx'> 	struct drm_display_mode *preferred_mode = NULL;</div><div class='ctx'> 	const struct drm_connector_state *con_state = &amp;dm_state-&gt;base;</div><div class='hunk'>@@ -6900,11 +6846,6 @@ create_stream_for_sink(struct drm_connector *connector,</div><div class='ctx'> 	drm_mode_init(&amp;mode, drm_mode);</div><div class='ctx'> 	memset(&amp;saved_mode, 0, sizeof(saved_mode));</div><div class='ctx'> </div><div class='del'>-	if (connector == NULL) {</div><div class='del'>-		DRM_ERROR("connector is NULL!\n");</div><div class='del'>-		return stream;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (connector-&gt;connector_type != DRM_MODE_CONNECTOR_WRITEBACK) {</div><div class='ctx'> 		aconnector = NULL;</div><div class='ctx'> 		aconnector = to_amdgpu_dm_connector(connector);</div><div class='hunk'>@@ -6919,7 +6860,7 @@ create_stream_for_sink(struct drm_connector *connector,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!aconnector || !aconnector-&gt;dc_sink) {</div><div class='del'>-		sink = create_fake_sink(link);</div><div class='add'>+		sink = create_fake_sink(dev, link);</div><div class='ctx'> 		if (!sink)</div><div class='ctx'> 			return stream;</div><div class='ctx'> </div><div class='hunk'>@@ -6931,7 +6872,7 @@ create_stream_for_sink(struct drm_connector *connector,</div><div class='ctx'> 	stream = dc_create_stream_for_sink(sink);</div><div class='ctx'> </div><div class='ctx'> 	if (stream == NULL) {</div><div class='del'>-		DRM_ERROR("Failed to create stream for sink!\n");</div><div class='add'>+		drm_err(dev, "Failed to create stream for sink!\n");</div><div class='ctx'> 		goto finish;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6963,7 +6904,7 @@ create_stream_for_sink(struct drm_connector *connector,</div><div class='ctx'> 		 * case, we call set mode ourselves to restore the previous mode</div><div class='ctx'> 		 * and the modelist may not be filled in time.</div><div class='ctx'> 		 */</div><div class='del'>-		DRM_DEBUG_DRIVER("No preferred mode found\n");</div><div class='add'>+		drm_dbg_driver(dev, "No preferred mode found\n");</div><div class='ctx'> 	} else if (aconnector) {</div><div class='ctx'> 		recalculate_timing = amdgpu_freesync_vid_mode &amp;&amp;</div><div class='ctx'> 				 is_freesync_video_mode(&amp;mode, aconnector);</div><div class='hunk'>@@ -7413,6 +7354,7 @@ static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector)</div><div class='ctx'> 	struct dc_sink *dc_em_sink = aconnector-&gt;dc_em_sink;</div><div class='ctx'> 	const struct drm_edid *drm_edid;</div><div class='ctx'> 	struct i2c_adapter *ddc;</div><div class='add'>+	struct drm_device *dev = connector-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (dc_link &amp;&amp; dc_link-&gt;aux_mode)</div><div class='ctx'> 		ddc = &amp;aconnector-&gt;dm_dp_aux.aux.ddc;</div><div class='hunk'>@@ -7422,7 +7364,7 @@ static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector)</div><div class='ctx'> 	drm_edid = drm_edid_read_ddc(connector, ddc);</div><div class='ctx'> 	drm_edid_connector_update(connector, drm_edid);</div><div class='ctx'> 	if (!drm_edid) {</div><div class='del'>-		DRM_ERROR("No EDID found on connector: %s.\n", connector-&gt;name);</div><div class='add'>+		drm_err(dev, "No EDID found on connector: %s.\n", connector-&gt;name);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7481,7 +7423,7 @@ static void create_eml_sink(struct amdgpu_dm_connector *aconnector)</div><div class='ctx'> 	drm_edid = drm_edid_read_ddc(connector, ddc);</div><div class='ctx'> 	drm_edid_connector_update(connector, drm_edid);</div><div class='ctx'> 	if (!drm_edid) {</div><div class='del'>-		DRM_ERROR("No EDID found on connector: %s.\n", connector-&gt;name);</div><div class='add'>+		drm_err(connector-&gt;dev, "No EDID found on connector: %s.\n", connector-&gt;name);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7615,7 +7557,7 @@ create_validate_stream_for_sink(struct drm_connector *connector,</div><div class='ctx'> 						dm_state, old_stream,</div><div class='ctx'> 						requested_bpc);</div><div class='ctx'> 		if (stream == NULL) {</div><div class='del'>-			DRM_ERROR("Failed to create stream for sink!\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to create stream for sink!\n");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -7690,7 +7632,7 @@ enum drm_mode_status amdgpu_dm_connector_mode_valid(struct drm_connector *connec</div><div class='ctx'> </div><div class='ctx'> 	if (dc_sink == NULL &amp;&amp; aconnector-&gt;base.force != DRM_FORCE_ON_DIGITAL &amp;&amp;</div><div class='ctx'> 				aconnector-&gt;base.force != DRM_FORCE_ON) {</div><div class='del'>-		DRM_ERROR("dc_sink is NULL!\n");</div><div class='add'>+		drm_err(connector-&gt;dev, "dc_sink is NULL!\n");</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -8598,7 +8540,7 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,</div><div class='ctx'> </div><div class='ctx'> 	i2c = create_i2c(link-&gt;ddc, false);</div><div class='ctx'> 	if (!i2c) {</div><div class='del'>-		DRM_ERROR("Failed to create i2c adapter data\n");</div><div class='add'>+		drm_err(adev_to_drm(dm-&gt;adev), "Failed to create i2c adapter data\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -8606,7 +8548,7 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,</div><div class='ctx'> 	res = i2c_add_adapter(&amp;i2c-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	if (res) {</div><div class='del'>-		DRM_ERROR("Failed to register hw i2c %d\n", link-&gt;link_index);</div><div class='add'>+		drm_err(adev_to_drm(dm-&gt;adev), "Failed to register hw i2c %d\n", link-&gt;link_index);</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -8620,7 +8562,7 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,</div><div class='ctx'> 			&amp;i2c-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	if (res) {</div><div class='del'>-		DRM_ERROR("connector_init failed\n");</div><div class='add'>+		drm_err(adev_to_drm(dm-&gt;adev), "connector_init failed\n");</div><div class='ctx'> 		aconnector-&gt;connector_id = -1;</div><div class='ctx'> 		goto out_free;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9110,7 +9052,7 @@ static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,</div><div class='ctx'> 		 */</div><div class='ctx'> 		WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state-&gt;base.crtc, true) != 0);</div><div class='ctx'> 		WARN_ON(drm_crtc_vblank_get(new_state-&gt;base.crtc) != 0);</div><div class='del'>-		DRM_DEBUG_DRIVER("%s: crtc=%u VRR off-&gt;on: Get vblank ref\n",</div><div class='add'>+		drm_dbg_driver(new_state-&gt;base.crtc-&gt;dev, "%s: crtc=%u VRR off-&gt;on: Get vblank ref\n",</div><div class='ctx'> 				 __func__, new_state-&gt;base.crtc-&gt;base.id);</div><div class='ctx'> 	} else if (old_vrr_active &amp;&amp; !new_vrr_active) {</div><div class='ctx'> 		/* Transition VRR active -&gt; inactive:</div><div class='hunk'>@@ -9118,7 +9060,7 @@ static void amdgpu_dm_handle_vrr_transition(struct dm_crtc_state *old_state,</div><div class='ctx'> 		 */</div><div class='ctx'> 		WARN_ON(amdgpu_dm_crtc_set_vupdate_irq(new_state-&gt;base.crtc, false) != 0);</div><div class='ctx'> 		drm_crtc_vblank_put(new_state-&gt;base.crtc);</div><div class='del'>-		DRM_DEBUG_DRIVER("%s: crtc=%u VRR on-&gt;off: Drop vblank ref\n",</div><div class='add'>+		drm_dbg_driver(new_state-&gt;base.crtc-&gt;dev, "%s: crtc=%u VRR on-&gt;off: Drop vblank ref\n",</div><div class='ctx'> 				 __func__, new_state-&gt;base.crtc-&gt;base.id);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -9205,13 +9147,13 @@ static void amdgpu_dm_update_cursor(struct drm_plane *plane,</div><div class='ctx'> 	if (crtc_state-&gt;stream) {</div><div class='ctx'> 		if (!dc_stream_set_cursor_attributes(crtc_state-&gt;stream,</div><div class='ctx'> 						     &amp;attributes))</div><div class='del'>-			DRM_ERROR("DC failed to set cursor attributes\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "DC failed to set cursor attributes\n");</div><div class='ctx'> </div><div class='ctx'> 		update-&gt;cursor_attributes = &amp;crtc_state-&gt;stream-&gt;cursor_attributes;</div><div class='ctx'> </div><div class='ctx'> 		if (!dc_stream_set_cursor_position(crtc_state-&gt;stream,</div><div class='ctx'> 						   &amp;position))</div><div class='del'>-			DRM_ERROR("DC failed to set cursor position\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "DC failed to set cursor position\n");</div><div class='ctx'> </div><div class='ctx'> 		update-&gt;cursor_position = &amp;crtc_state-&gt;stream-&gt;cursor_position;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9462,7 +9404,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,</div><div class='ctx'> 		bundle-&gt;surface_updates[planes_count].surface = dc_plane;</div><div class='ctx'> </div><div class='ctx'> 		if (!bundle-&gt;surface_updates[planes_count].surface) {</div><div class='del'>-			DRM_ERROR("No surface for CRTC: id=%d\n",</div><div class='add'>+			drm_err(dev, "No surface for CRTC: id=%d\n",</div><div class='ctx'> 					acrtc_attach-&gt;crtc_id);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -9978,20 +9920,20 @@ static void dm_set_writeback(struct amdgpu_display_manager *dm,</div><div class='ctx'> </div><div class='ctx'> 	wb_info = kzalloc(sizeof(*wb_info), GFP_KERNEL);</div><div class='ctx'> 	if (!wb_info) {</div><div class='del'>-		DRM_ERROR("Failed to allocate wb_info\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "Failed to allocate wb_info\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	acrtc = to_amdgpu_crtc(wb_conn-&gt;encoder.crtc);</div><div class='ctx'> 	if (!acrtc) {</div><div class='del'>-		DRM_ERROR("no amdgpu_crtc found\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "no amdgpu_crtc found\n");</div><div class='ctx'> 		kfree(wb_info);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	afb = to_amdgpu_framebuffer(new_con_state-&gt;writeback_job-&gt;fb);</div><div class='ctx'> 	if (!afb) {</div><div class='del'>-		DRM_ERROR("No amdgpu_framebuffer found\n");</div><div class='add'>+		drm_err(adev_to_drm(adev), "No amdgpu_framebuffer found\n");</div><div class='ctx'> 		kfree(wb_info);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -10212,7 +10154,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)</div><div class='ctx'> 				new_con_state-&gt;content_protection &gt;= DRM_MODE_CONTENT_PROTECTION_DESIRED)</div><div class='ctx'> 				enable_encryption = true;</div><div class='ctx'> </div><div class='del'>-			DRM_INFO("[HDCP_DM] hdcp_update_display enable_encryption = %x\n", enable_encryption);</div><div class='add'>+			drm_info(adev_to_drm(adev), "[HDCP_DM] hdcp_update_display enable_encryption = %x\n", enable_encryption);</div><div class='ctx'> </div><div class='ctx'> 			if (aconnector-&gt;dc_link)</div><div class='ctx'> 				hdcp_update_display(</div><div class='hunk'>@@ -10304,7 +10246,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)</div><div class='ctx'> 		 */</div><div class='ctx'> 		dummy_updates = kzalloc(sizeof(struct dc_surface_update) * MAX_SURFACES, GFP_ATOMIC);</div><div class='ctx'> 		if (!dummy_updates) {</div><div class='del'>-			DRM_ERROR("Failed to allocate memory for dummy_updates.\n");</div><div class='add'>+			drm_err(adev_to_drm(adev), "Failed to allocate memory for dummy_updates.\n");</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		for (j = 0; j &lt; status-&gt;plane_count; j++)</div><div class='hunk'>@@ -10512,16 +10454,20 @@ static int dm_force_atomic_commit(struct drm_connector *connector)</div><div class='ctx'> 	 */</div><div class='ctx'> 	conn_state = drm_atomic_get_connector_state(state, connector);</div><div class='ctx'> </div><div class='del'>-	ret = PTR_ERR_OR_ZERO(conn_state);</div><div class='del'>-	if (ret)</div><div class='add'>+	/* Check for error in getting connector state */</div><div class='add'>+	if (IS_ERR(conn_state)) {</div><div class='add'>+		ret = PTR_ERR(conn_state);</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Attach crtc to drm_atomic_state*/</div><div class='ctx'> 	crtc_state = drm_atomic_get_crtc_state(state, &amp;disconnected_acrtc-&gt;base);</div><div class='ctx'> </div><div class='del'>-	ret = PTR_ERR_OR_ZERO(crtc_state);</div><div class='del'>-	if (ret)</div><div class='add'>+	/* Check for error in getting crtc state */</div><div class='add'>+	if (IS_ERR(crtc_state)) {</div><div class='add'>+		ret = PTR_ERR(crtc_state);</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* force a restore */</div><div class='ctx'> 	crtc_state-&gt;mode_changed = true;</div><div class='hunk'>@@ -10529,9 +10475,11 @@ static int dm_force_atomic_commit(struct drm_connector *connector)</div><div class='ctx'> 	/* Attach plane to drm_atomic_state */</div><div class='ctx'> 	plane_state = drm_atomic_get_plane_state(state, plane);</div><div class='ctx'> </div><div class='del'>-	ret = PTR_ERR_OR_ZERO(plane_state);</div><div class='del'>-	if (ret)</div><div class='add'>+	/* Check for error in getting plane state */</div><div class='add'>+	if (IS_ERR(plane_state)) {</div><div class='add'>+		ret = PTR_ERR(plane_state);</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Call commit internally with the state we just constructed */</div><div class='ctx'> 	ret = drm_atomic_commit(state);</div><div class='hunk'>@@ -10539,7 +10487,7 @@ static int dm_force_atomic_commit(struct drm_connector *connector)</div><div class='ctx'> out:</div><div class='ctx'> 	drm_atomic_state_put(state);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		DRM_ERROR("Restoring old state failed with %i\n", ret);</div><div class='add'>+		drm_err(ddev, "Restoring old state failed with %i\n", ret);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -10623,7 +10571,7 @@ static int do_aquire_global_lock(struct drm_device *dev,</div><div class='ctx'> 					&amp;commit-&gt;flip_done, 10*HZ);</div><div class='ctx'> </div><div class='ctx'> 		if (ret == 0)</div><div class='del'>-			DRM_ERROR("[CRTC:%d:%s] hw_done or flip_done timed out\n",</div><div class='add'>+			drm_err(dev, "[CRTC:%d:%s] hw_done or flip_done timed out\n",</div><div class='ctx'> 				  crtc-&gt;base.id, crtc-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 		drm_crtc_commit_put(commit);</div><div class='hunk'>@@ -10739,6 +10687,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm,</div><div class='ctx'> 	struct dm_atomic_state *dm_state = NULL;</div><div class='ctx'> 	struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state;</div><div class='ctx'> 	struct dc_stream_state *new_stream;</div><div class='add'>+	struct amdgpu_device *adev = dm-&gt;adev;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -10768,8 +10717,8 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm,</div><div class='ctx'> 		drm_old_conn_state = drm_atomic_get_old_connector_state(state,</div><div class='ctx'> 									connector);</div><div class='ctx'> </div><div class='del'>-		if (IS_ERR(drm_new_conn_state)) {</div><div class='del'>-			ret = PTR_ERR_OR_ZERO(drm_new_conn_state);</div><div class='add'>+		if (WARN_ON(!drm_new_conn_state)) {</div><div class='add'>+			ret = -EINVAL;</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -10792,7 +10741,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm,</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		if (!new_stream) {</div><div class='del'>-			DRM_DEBUG_DRIVER("%s: Failed to create new stream for crtc %d\n",</div><div class='add'>+			drm_dbg_driver(adev_to_drm(adev), "%s: Failed to create new stream for crtc %d\n",</div><div class='ctx'> 					__func__, acrtc-&gt;base.base.id);</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 			goto fail;</div><div class='hunk'>@@ -10830,7 +10779,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm,</div><div class='ctx'> 		    dc_is_stream_unchanged(new_stream, dm_old_crtc_state-&gt;stream) &amp;&amp;</div><div class='ctx'> 		    dc_is_stream_scaling_unchanged(new_stream, dm_old_crtc_state-&gt;stream)) {</div><div class='ctx'> 			new_crtc_state-&gt;mode_changed = false;</div><div class='del'>-			DRM_DEBUG_DRIVER("Mode change not required, setting mode_changed to %d",</div><div class='add'>+			drm_dbg_driver(adev_to_drm(adev), "Mode change not required, setting mode_changed to %d",</div><div class='ctx'> 					 new_crtc_state-&gt;mode_changed);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -10868,7 +10817,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm,</div><div class='ctx'> 		    is_timing_unchanged_for_freesync(new_crtc_state,</div><div class='ctx'> 						     old_crtc_state)) {</div><div class='ctx'> 			new_crtc_state-&gt;mode_changed = false;</div><div class='del'>-			DRM_DEBUG_DRIVER(</div><div class='add'>+			drm_dbg_driver(adev_to_drm(adev),</div><div class='ctx'> 				"Mode change not required for front porch change, setting mode_changed to %d",</div><div class='ctx'> 				new_crtc_state-&gt;mode_changed);</div><div class='ctx'> </div><div class='hunk'>@@ -10889,7 +10838,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> </div><div class='del'>-		DRM_DEBUG_DRIVER("Disabling DRM crtc: %d\n",</div><div class='add'>+		drm_dbg_driver(adev_to_drm(adev), "Disabling DRM crtc: %d\n",</div><div class='ctx'> 				crtc-&gt;base.id);</div><div class='ctx'> </div><div class='ctx'> 		/* i.e. reset mode */</div><div class='hunk'>@@ -11022,6 +10971,9 @@ static bool should_reset_plane(struct drm_atomic_state *state,</div><div class='ctx'> 	    state-&gt;allow_modeset)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	if (amdgpu_in_reset(adev) &amp;&amp; state-&gt;allow_modeset)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	/* Exit early if we know that we're adding or removing the plane. */</div><div class='ctx'> 	if (old_plane_state-&gt;crtc != new_plane_state-&gt;crtc)</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -11739,7 +11691,7 @@ static bool amdgpu_dm_crtc_mem_type_changed(struct drm_device *dev,</div><div class='ctx'> 		old_plane_state = drm_atomic_get_plane_state(state, plane);</div><div class='ctx'> </div><div class='ctx'> 		if (IS_ERR(new_plane_state) || IS_ERR(old_plane_state)) {</div><div class='del'>-			DRM_ERROR("Failed to get plane state for plane %s\n", plane-&gt;name);</div><div class='add'>+			drm_err(dev, "Failed to get plane state for plane %s\n", plane-&gt;name);</div><div class='ctx'> 			return false;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -12308,7 +12260,7 @@ static bool dm_edid_parser_send_cea(struct amdgpu_display_manager *dm,</div><div class='ctx'> </div><div class='ctx'> 	res = dc_wake_and_execute_dmub_cmd(dm-&gt;dc-&gt;ctx, &amp;cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY);</div><div class='ctx'> 	if (!res) {</div><div class='del'>-		DRM_ERROR("EDID CEA parser failed\n");</div><div class='add'>+		drm_err(adev_to_drm(dm-&gt;adev), "EDID CEA parser failed\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -12316,7 +12268,7 @@ static bool dm_edid_parser_send_cea(struct amdgpu_display_manager *dm,</div><div class='ctx'> </div><div class='ctx'> 	if (output-&gt;type == DMUB_CMD__EDID_CEA_ACK) {</div><div class='ctx'> 		if (!output-&gt;ack.success) {</div><div class='del'>-			DRM_ERROR("EDID CEA ack failed at offset %d\n",</div><div class='add'>+			drm_err(adev_to_drm(dm-&gt;adev), "EDID CEA ack failed at offset %d\n",</div><div class='ctx'> 					output-&gt;ack.offset);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (output-&gt;type == DMUB_CMD__EDID_CEA_AMD_VSDB) {</div><div class='hunk'>@@ -12328,7 +12280,7 @@ static bool dm_edid_parser_send_cea(struct amdgpu_display_manager *dm,</div><div class='ctx'> 		vsdb-&gt;min_refresh_rate_hz = output-&gt;amd_vsdb.min_frame_rate;</div><div class='ctx'> 		vsdb-&gt;max_refresh_rate_hz = output-&gt;amd_vsdb.max_frame_rate;</div><div class='ctx'> 	} else {</div><div class='del'>-		DRM_WARN("Unknown EDID CEA parser results\n");</div><div class='add'>+		drm_warn(adev_to_drm(dm-&gt;adev), "Unknown EDID CEA parser results\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -12544,7 +12496,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,</div><div class='ctx'> 	enum adaptive_sync_type as_type = ADAPTIVE_SYNC_TYPE_NONE;</div><div class='ctx'> </div><div class='ctx'> 	if (!connector-&gt;state) {</div><div class='del'>-		DRM_ERROR("%s - Connector has no state", __func__);</div><div class='add'>+		drm_err(adev_to_drm(adev), "%s - Connector has no state", __func__);</div><div class='ctx'> 		goto update;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -12729,7 +12681,7 @@ int amdgpu_dm_process_dmub_aux_transfer_sync(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!wait_for_completion_timeout(&amp;adev-&gt;dm.dmub_aux_transfer_done, 10 * HZ)) {</div><div class='del'>-		DRM_ERROR("wait_for_completion_timeout timeout!");</div><div class='add'>+		drm_err(adev_to_drm(adev), "wait_for_completion_timeout timeout!");</div><div class='ctx'> 		*operation_result = AUX_RET_ERROR_TIMEOUT;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -12739,31 +12691,24 @@ int amdgpu_dm_process_dmub_aux_transfer_sync(</div><div class='ctx'> 		 * Transient states before tunneling is enabled could</div><div class='ctx'> 		 * lead to this error. We can ignore this for now.</div><div class='ctx'> 		 */</div><div class='del'>-		if (p_notify-&gt;result != AUX_RET_ERROR_PROTOCOL_ERROR) {</div><div class='del'>-			DRM_WARN("DPIA AUX failed on 0x%x(%d), error %d\n",</div><div class='add'>+		if (p_notify-&gt;result == AUX_RET_ERROR_PROTOCOL_ERROR) {</div><div class='add'>+			drm_warn(adev_to_drm(adev), "DPIA AUX failed on 0x%x(%d), error %d\n",</div><div class='ctx'> 					payload-&gt;address, payload-&gt;length,</div><div class='ctx'> 					p_notify-&gt;result);</div><div class='ctx'> 		}</div><div class='del'>-		*operation_result = AUX_RET_ERROR_INVALID_REPLY;</div><div class='add'>+		*operation_result = p_notify-&gt;result;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	payload-&gt;reply[0] = adev-&gt;dm.dmub_notify-&gt;aux_reply.command &amp; 0xF;</div><div class='add'>+	if (adev-&gt;dm.dmub_notify-&gt;aux_reply.command &amp; 0xF0)</div><div class='add'>+		/* The reply is stored in the top nibble of the command. */</div><div class='add'>+		payload-&gt;reply[0] = (adev-&gt;dm.dmub_notify-&gt;aux_reply.command &gt;&gt; 4) &amp; 0xF;</div><div class='ctx'> </div><div class='del'>-	payload-&gt;reply[0] = adev-&gt;dm.dmub_notify-&gt;aux_reply.command;</div><div class='del'>-	if (!payload-&gt;write &amp;&amp; p_notify-&gt;aux_reply.length &amp;&amp;</div><div class='del'>-			(payload-&gt;reply[0] == AUX_TRANSACTION_REPLY_AUX_ACK)) {</div><div class='del'>-</div><div class='del'>-		if (payload-&gt;length != p_notify-&gt;aux_reply.length) {</div><div class='del'>-			DRM_WARN("invalid read length %d from DPIA AUX 0x%x(%d)!\n",</div><div class='del'>-				p_notify-&gt;aux_reply.length,</div><div class='del'>-					payload-&gt;address, payload-&gt;length);</div><div class='del'>-			*operation_result = AUX_RET_ERROR_INVALID_REPLY;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+	/*write req may receive a byte indicating partially written number as well*/</div><div class='add'>+	if (p_notify-&gt;aux_reply.length)</div><div class='ctx'> 		memcpy(payload-&gt;data, p_notify-&gt;aux_reply.data,</div><div class='ctx'> 				p_notify-&gt;aux_reply.length);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* success */</div><div class='ctx'> 	ret = p_notify-&gt;aux_reply.length;</div><div class='hunk'>@@ -12774,6 +12719,79 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void abort_fused_io(</div><div class='add'>+		struct dc_context *ctx,</div><div class='add'>+		const struct dmub_cmd_fused_request *request</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	union dmub_rb_cmd command = { 0 };</div><div class='add'>+	struct dmub_rb_cmd_fused_io *io = &amp;command.fused_io;</div><div class='add'>+</div><div class='add'>+	io-&gt;header.type = DMUB_CMD__FUSED_IO;</div><div class='add'>+	io-&gt;header.sub_type = DMUB_CMD__FUSED_IO_ABORT;</div><div class='add'>+	io-&gt;header.payload_bytes = sizeof(*io) - sizeof(io-&gt;header);</div><div class='add'>+	io-&gt;request = *request;</div><div class='add'>+	dm_execute_dmub_cmd(ctx, &amp;command, DM_DMUB_WAIT_TYPE_NO_WAIT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool execute_fused_io(</div><div class='add'>+		struct amdgpu_device *dev,</div><div class='add'>+		struct dc_context *ctx,</div><div class='add'>+		union dmub_rb_cmd *commands,</div><div class='add'>+		uint8_t count,</div><div class='add'>+		uint32_t timeout_us</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	const uint8_t ddc_line = commands[0].fused_io.request.u.aux.ddc_line;</div><div class='add'>+</div><div class='add'>+	if (ddc_line &gt;= ARRAY_SIZE(dev-&gt;dm.fused_io))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	struct fused_io_sync *sync = &amp;dev-&gt;dm.fused_io[ddc_line];</div><div class='add'>+	struct dmub_rb_cmd_fused_io *first = &amp;commands[0].fused_io;</div><div class='add'>+	const bool result = dm_execute_dmub_cmd_list(ctx, count, commands, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)</div><div class='add'>+			&amp;&amp; first-&gt;header.ret_status</div><div class='add'>+			&amp;&amp; first-&gt;request.status == FUSED_REQUEST_STATUS_SUCCESS;</div><div class='add'>+</div><div class='add'>+	if (!result)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	while (wait_for_completion_timeout(&amp;sync-&gt;replied, usecs_to_jiffies(timeout_us))) {</div><div class='add'>+		reinit_completion(&amp;sync-&gt;replied);</div><div class='add'>+</div><div class='add'>+		struct dmub_cmd_fused_request *reply = (struct dmub_cmd_fused_request *) sync-&gt;reply_data;</div><div class='add'>+</div><div class='add'>+		static_assert(sizeof(*reply) &lt;= sizeof(sync-&gt;reply_data), "Size mismatch");</div><div class='add'>+</div><div class='add'>+		if (reply-&gt;identifier == first-&gt;request.identifier) {</div><div class='add'>+			first-&gt;request = *reply;</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;sync-&gt;replied);</div><div class='add'>+	first-&gt;request.status = FUSED_REQUEST_STATUS_TIMEOUT;</div><div class='add'>+	abort_fused_io(ctx, &amp;first-&gt;request);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool amdgpu_dm_execute_fused_io(</div><div class='add'>+		struct amdgpu_device *dev,</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		union dmub_rb_cmd *commands,</div><div class='add'>+		uint8_t count,</div><div class='add'>+		uint32_t timeout_us)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_display_manager *dm = &amp;dev-&gt;dm;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dm-&gt;dpia_aux_lock);</div><div class='add'>+</div><div class='add'>+	const bool result = execute_fused_io(dev, link-&gt;ctx, commands, count, timeout_us);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dm-&gt;dpia_aux_lock);</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_dm_process_dmub_set_config_sync(</div><div class='ctx'> 		struct dc_context *ctx,</div><div class='ctx'> 		unsigned int link_index,</div><div class='hunk'>@@ -12792,7 +12810,7 @@ int amdgpu_dm_process_dmub_set_config_sync(</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 		*operation_result = adev-&gt;dm.dmub_notify-&gt;sc_status;</div><div class='ctx'> 	} else {</div><div class='del'>-		DRM_ERROR("wait_for_completion_timeout timeout!");</div><div class='add'>+		drm_err(adev_to_drm(adev), "wait_for_completion_timeout timeout!");</div><div class='ctx'> 		ret = -1;</div><div class='ctx'> 		*operation_result = SET_CONFIG_UNKNOWN_ERROR;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h<br/>index 385faaca6e26..d7d92f9911e4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h</a></div><div class='hunk'>@@ -50,7 +50,7 @@</div><div class='ctx'> </div><div class='ctx'> #define AMDGPU_DM_MAX_NUM_EDP 2</div><div class='ctx'> </div><div class='del'>-#define AMDGPU_DMUB_NOTIFICATION_MAX 7</div><div class='add'>+#define AMDGPU_DMUB_NOTIFICATION_MAX 8</div><div class='ctx'> </div><div class='ctx'> #define HDMI_AMD_VENDOR_SPECIFIC_DATA_BLOCK_IEEE_REGISTRATION_ID 0x00001A</div><div class='ctx'> #define AMD_VSDB_VERSION_3_FEATURECAP_REPLAYMODE 0x40</div><div class='hunk'>@@ -81,6 +81,7 @@ struct amdgpu_bo;</div><div class='ctx'> struct dmub_srv;</div><div class='ctx'> struct dc_plane_state;</div><div class='ctx'> struct dmub_notification;</div><div class='add'>+struct dmub_cmd_fused_request;</div><div class='ctx'> </div><div class='ctx'> struct amd_vsdb_block {</div><div class='ctx'> 	unsigned char ieee_id[3];</div><div class='hunk'>@@ -276,6 +277,10 @@ struct hpd_rx_irq_offload_work {</div><div class='ctx'> 	 * @offload_wq: offload work queue that this work is queued to</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct hpd_rx_irq_offload_work_queue *offload_wq;</div><div class='add'>+	/**</div><div class='add'>+	 * @adev: amdgpu_device pointer</div><div class='add'>+	 */</div><div class='add'>+	struct amdgpu_device *adev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -614,6 +619,13 @@ struct amdgpu_display_manager {</div><div class='ctx'> 	bool aux_hpd_discon_quirk;</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='add'>+	 * @edp0_on_dp1_quirk:</div><div class='add'>+	 *</div><div class='add'>+	 * quirk for platforms that put edp0 on DP1.</div><div class='add'>+	 */</div><div class='add'>+	bool edp0_on_dp1_quirk;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='ctx'> 	 * @dpia_aux_lock:</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Guards access to DPIA AUX</div><div class='hunk'>@@ -633,6 +645,16 @@ struct amdgpu_display_manager {</div><div class='ctx'> 	 * OEM i2c bus</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct amdgpu_i2c_adapter *oem_i2c;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @fused_io:</div><div class='add'>+	 *</div><div class='add'>+	 * dmub fused io interface</div><div class='add'>+	 */</div><div class='add'>+	struct fused_io_sync {</div><div class='add'>+		struct completion replied;</div><div class='add'>+		char reply_data[0x40];  // Cannot include dmub_cmd here</div><div class='add'>+	} fused_io[8];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum dsc_clock_force_state {</div><div class='hunk'>@@ -1012,6 +1034,14 @@ extern const struct drm_encoder_helper_funcs amdgpu_dm_encoder_helper_funcs;</div><div class='ctx'> int amdgpu_dm_process_dmub_aux_transfer_sync(struct dc_context *ctx, unsigned int link_index,</div><div class='ctx'> 					struct aux_payload *payload, enum aux_return_code_type *operation_result);</div><div class='ctx'> </div><div class='add'>+bool amdgpu_dm_execute_fused_io(</div><div class='add'>+		struct amdgpu_device *dev,</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		union dmub_rb_cmd *commands,</div><div class='add'>+		uint8_t count,</div><div class='add'>+		uint32_t timeout_us</div><div class='add'>+);</div><div class='add'>+</div><div class='ctx'> int amdgpu_dm_process_dmub_set_config_sync(struct dc_context *ctx, unsigned int link_index,</div><div class='ctx'> 					struct set_config_cmd_payload *payload, enum set_config_status *operation_result);</div><div class='ctx'> </div><div class='hunk'>@@ -1045,4 +1075,6 @@ void hdmi_cec_set_edid(struct amdgpu_dm_connector *aconnector);</div><div class='ctx'> void hdmi_cec_unset_edid(struct amdgpu_dm_connector *aconnector);</div><div class='ctx'> int amdgpu_dm_initialize_hdmi_connector(struct amdgpu_dm_connector *aconnector);</div><div class='ctx'> </div><div class='add'>+void retrieve_dmi_info(struct amdgpu_display_manager *dm);</div><div class='add'>+</div><div class='ctx'> #endif /* __AMDGPU_DM_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c<br/>index 36a830a7440f..e8bdd7f0c460 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c</a></div><div class='hunk'>@@ -113,6 +113,7 @@ bool amdgpu_dm_crtc_vrr_active(const struct dm_crtc_state *dm_state)</div><div class='ctx'>  *</div><div class='ctx'>  * Panel Replay and PSR SU</div><div class='ctx'>  * - Enable when:</div><div class='add'>+ *      - VRR is disabled</div><div class='ctx'>  *      - vblank counter is disabled</div><div class='ctx'>  *      - entry is allowed: usermode demonstrates an adequate number of fast</div><div class='ctx'>  *        commits)</div><div class='hunk'>@@ -131,19 +132,20 @@ static void amdgpu_dm_crtc_set_panel_sr_feature(</div><div class='ctx'> 	bool is_sr_active = (link-&gt;replay_settings.replay_allow_active ||</div><div class='ctx'> 				 link-&gt;psr_settings.psr_allow_active);</div><div class='ctx'> 	bool is_crc_window_active = false;</div><div class='add'>+	bool vrr_active = amdgpu_dm_crtc_vrr_active_irq(vblank_work-&gt;acrtc);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY</div><div class='ctx'> 	is_crc_window_active =</div><div class='ctx'> 		amdgpu_dm_crc_window_is_activated(&amp;vblank_work-&gt;acrtc-&gt;base);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	if (link-&gt;replay_settings.replay_feature_enabled &amp;&amp;</div><div class='add'>+	if (link-&gt;replay_settings.replay_feature_enabled &amp;&amp; !vrr_active &amp;&amp;</div><div class='ctx'> 		allow_sr_entry &amp;&amp; !is_sr_active &amp;&amp; !is_crc_window_active) {</div><div class='ctx'> 		amdgpu_dm_replay_enable(vblank_work-&gt;stream, true);</div><div class='ctx'> 	} else if (vblank_enabled) {</div><div class='ctx'> 		if (link-&gt;psr_settings.psr_version &lt; DC_PSR_VERSION_SU_1 &amp;&amp; is_sr_active)</div><div class='ctx'> 			amdgpu_dm_psr_disable(vblank_work-&gt;stream, false);</div><div class='del'>-	} else if (link-&gt;psr_settings.psr_feature_enabled &amp;&amp;</div><div class='add'>+	} else if (link-&gt;psr_settings.psr_feature_enabled &amp;&amp; !vrr_active &amp;&amp;</div><div class='ctx'> 		allow_sr_entry &amp;&amp; !is_sr_active &amp;&amp; !is_crc_window_active) {</div><div class='ctx'> </div><div class='ctx'> 		struct amdgpu_dm_connector *aconn =</div><div class='hunk'>@@ -244,6 +246,8 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)</div><div class='ctx'> 	struct vblank_control_work *vblank_work =</div><div class='ctx'> 		container_of(work, struct vblank_control_work, work);</div><div class='ctx'> 	struct amdgpu_display_manager *dm = vblank_work-&gt;dm;</div><div class='add'>+	struct amdgpu_device *adev = drm_to_adev(dm-&gt;ddev);</div><div class='add'>+	int r;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dm-&gt;dc_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -271,8 +275,15 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)</div><div class='ctx'> 			vblank_work-&gt;acrtc-&gt;dm_irq_params.allow_sr_entry);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dm-&gt;active_vblank_irq_count == 0)</div><div class='add'>+	if (dm-&gt;active_vblank_irq_count == 0) {</div><div class='add'>+		r = amdgpu_dpm_pause_power_profile(adev, true);</div><div class='add'>+		if (r)</div><div class='add'>+			dev_warn(adev-&gt;dev, "failed to set default power profile mode\n");</div><div class='ctx'> 		dc_allow_idle_optimizations(dm-&gt;dc, true);</div><div class='add'>+		r = amdgpu_dpm_pause_power_profile(adev, false);</div><div class='add'>+		if (r)</div><div class='add'>+			dev_warn(adev-&gt;dev, "failed to restore the power profile mode\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;dm-&gt;dc_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c<br/>index 5198a079b463..c16962256514 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include "amdgpu_dm_hdcp.h"</div><div class='ctx'> #include "amdgpu.h"</div><div class='ctx'> #include "amdgpu_dm.h"</div><div class='add'>+#include "dc_fused_io.h"</div><div class='ctx'> #include "dm_helpers.h"</div><div class='ctx'> #include &lt;drm/display/drm_hdcp_helper.h&gt;</div><div class='ctx'> #include "hdcp_psp.h"</div><div class='hunk'>@@ -76,6 +77,34 @@ lp_read_dpcd(void *handle, uint32_t address, uint8_t *data, uint32_t size)</div><div class='ctx'> 	return dm_helpers_dp_read_dpcd(link-&gt;ctx, link, address, data, size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool lp_atomic_write_poll_read_i2c(</div><div class='add'>+		void *handle,</div><div class='add'>+		const struct mod_hdcp_atomic_op_i2c *write,</div><div class='add'>+		const struct mod_hdcp_atomic_op_i2c *poll,</div><div class='add'>+		struct mod_hdcp_atomic_op_i2c *read,</div><div class='add'>+		uint32_t poll_timeout_us,</div><div class='add'>+		uint8_t poll_mask_msb</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	struct dc_link *link = handle;</div><div class='add'>+</div><div class='add'>+	return dm_atomic_write_poll_read_i2c(link, write, poll, read, poll_timeout_us, poll_mask_msb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool lp_atomic_write_poll_read_aux(</div><div class='add'>+		void *handle,</div><div class='add'>+		const struct mod_hdcp_atomic_op_aux *write,</div><div class='add'>+		const struct mod_hdcp_atomic_op_aux *poll,</div><div class='add'>+		struct mod_hdcp_atomic_op_aux *read,</div><div class='add'>+		uint32_t poll_timeout_us,</div><div class='add'>+		uint8_t poll_mask_msb</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	struct dc_link *link = handle;</div><div class='add'>+</div><div class='add'>+	return dm_atomic_write_poll_read_aux(link, write, poll, read, poll_timeout_us, poll_mask_msb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint32_t *srm_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct ta_hdcp_shared_memory *hdcp_cmd;</div><div class='hunk'>@@ -173,6 +202,9 @@ void hdcp_update_display(struct hdcp_workqueue *hdcp_work,</div><div class='ctx'> 	unsigned int conn_index = aconnector-&gt;base.index;</div><div class='ctx'> </div><div class='ctx'> 	guard(mutex)(&amp;hdcp_w-&gt;mutex);</div><div class='add'>+	drm_connector_get(&amp;aconnector-&gt;base);</div><div class='add'>+	if (hdcp_w-&gt;aconnector[conn_index])</div><div class='add'>+		drm_connector_put(&amp;hdcp_w-&gt;aconnector[conn_index]-&gt;base);</div><div class='ctx'> 	hdcp_w-&gt;aconnector[conn_index] = aconnector;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;link_adjust, 0, sizeof(link_adjust));</div><div class='hunk'>@@ -220,7 +252,6 @@ static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,</div><div class='ctx'> 	unsigned int conn_index = aconnector-&gt;base.index;</div><div class='ctx'> </div><div class='ctx'> 	guard(mutex)(&amp;hdcp_w-&gt;mutex);</div><div class='del'>-	hdcp_w-&gt;aconnector[conn_index] = aconnector;</div><div class='ctx'> </div><div class='ctx'> 	/* the removal of display will invoke auth reset -&gt; hdcp destroy and</div><div class='ctx'> 	 * we'd expect the Content Protection (CP) property changed back to</div><div class='hunk'>@@ -236,7 +267,10 @@ static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mod_hdcp_remove_display(&amp;hdcp_w-&gt;hdcp, aconnector-&gt;base.index, &amp;hdcp_w-&gt;output);</div><div class='del'>-</div><div class='add'>+	if (hdcp_w-&gt;aconnector[conn_index]) {</div><div class='add'>+		drm_connector_put(&amp;hdcp_w-&gt;aconnector[conn_index]-&gt;base);</div><div class='add'>+		hdcp_w-&gt;aconnector[conn_index] = NULL;</div><div class='add'>+	}</div><div class='ctx'> 	process_output(hdcp_w);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -254,6 +288,10 @@ void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_inde</div><div class='ctx'> 	for (conn_index = 0; conn_index &lt; AMDGPU_DM_MAX_DISPLAY_INDEX; conn_index++) {</div><div class='ctx'> 		hdcp_w-&gt;encryption_status[conn_index] =</div><div class='ctx'> 			MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;</div><div class='add'>+		if (hdcp_w-&gt;aconnector[conn_index]) {</div><div class='add'>+			drm_connector_put(&amp;hdcp_w-&gt;aconnector[conn_index]-&gt;base);</div><div class='add'>+			hdcp_w-&gt;aconnector[conn_index] = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	process_output(hdcp_w);</div><div class='hunk'>@@ -488,6 +526,7 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)</div><div class='ctx'> 	struct hdcp_workqueue *hdcp_work = handle;</div><div class='ctx'> 	struct amdgpu_dm_connector *aconnector = config-&gt;dm_stream_ctx;</div><div class='ctx'> 	int link_index = aconnector-&gt;dc_link-&gt;link_index;</div><div class='add'>+	unsigned int conn_index = aconnector-&gt;base.index;</div><div class='ctx'> 	struct mod_hdcp_display *display = &amp;hdcp_work[link_index].display;</div><div class='ctx'> 	struct mod_hdcp_link *link = &amp;hdcp_work[link_index].link;</div><div class='ctx'> 	struct hdcp_workqueue *hdcp_w = &amp;hdcp_work[link_index];</div><div class='hunk'>@@ -544,7 +583,10 @@ static void update_config(void *handle, struct cp_psp_stream_config *config)</div><div class='ctx'> 	guard(mutex)(&amp;hdcp_w-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	mod_hdcp_add_display(&amp;hdcp_w-&gt;hdcp, link, display, &amp;hdcp_w-&gt;output);</div><div class='del'>-</div><div class='add'>+	drm_connector_get(&amp;aconnector-&gt;base);</div><div class='add'>+	if (hdcp_w-&gt;aconnector[conn_index])</div><div class='add'>+		drm_connector_put(&amp;hdcp_w-&gt;aconnector[conn_index]-&gt;base);</div><div class='add'>+	hdcp_w-&gt;aconnector[conn_index] = aconnector;</div><div class='ctx'> 	process_output(hdcp_w);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -719,7 +761,10 @@ struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev,</div><div class='ctx'> 		INIT_DELAYED_WORK(&amp;hdcp_work[i].watchdog_timer_dwork, event_watchdog_timer);</div><div class='ctx'> 		INIT_DELAYED_WORK(&amp;hdcp_work[i].property_validate_dwork, event_property_validate);</div><div class='ctx'> </div><div class='del'>-		hdcp_work[i].hdcp.config.psp.handle = &amp;adev-&gt;psp;</div><div class='add'>+		struct mod_hdcp_config *config = &amp;hdcp_work[i].hdcp.config;</div><div class='add'>+		struct mod_hdcp_ddc_funcs *ddc_funcs = &amp;config-&gt;ddc.funcs;</div><div class='add'>+</div><div class='add'>+		config-&gt;psp.handle = &amp;adev-&gt;psp;</div><div class='ctx'> 		if (dc-&gt;ctx-&gt;dce_version == DCN_VERSION_3_1 ||</div><div class='ctx'> 		    dc-&gt;ctx-&gt;dce_version == DCN_VERSION_3_14 ||</div><div class='ctx'> 		    dc-&gt;ctx-&gt;dce_version == DCN_VERSION_3_15 ||</div><div class='hunk'>@@ -727,12 +772,22 @@ struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev,</div><div class='ctx'> 		    dc-&gt;ctx-&gt;dce_version == DCN_VERSION_3_51 ||</div><div class='ctx'> 		    dc-&gt;ctx-&gt;dce_version == DCN_VERSION_3_6 ||</div><div class='ctx'> 		    dc-&gt;ctx-&gt;dce_version == DCN_VERSION_3_16)</div><div class='del'>-			hdcp_work[i].hdcp.config.psp.caps.dtm_v3_supported = 1;</div><div class='del'>-		hdcp_work[i].hdcp.config.ddc.handle = dc_get_link_at_index(dc, i);</div><div class='del'>-		hdcp_work[i].hdcp.config.ddc.funcs.write_i2c = lp_write_i2c;</div><div class='del'>-		hdcp_work[i].hdcp.config.ddc.funcs.read_i2c = lp_read_i2c;</div><div class='del'>-		hdcp_work[i].hdcp.config.ddc.funcs.write_dpcd = lp_write_dpcd;</div><div class='del'>-		hdcp_work[i].hdcp.config.ddc.funcs.read_dpcd = lp_read_dpcd;</div><div class='add'>+			config-&gt;psp.caps.dtm_v3_supported = 1;</div><div class='add'>+		config-&gt;ddc.handle = dc_get_link_at_index(dc, i);</div><div class='add'>+</div><div class='add'>+		ddc_funcs-&gt;write_i2c = lp_write_i2c;</div><div class='add'>+		ddc_funcs-&gt;read_i2c = lp_read_i2c;</div><div class='add'>+		ddc_funcs-&gt;write_dpcd = lp_write_dpcd;</div><div class='add'>+		ddc_funcs-&gt;read_dpcd = lp_read_dpcd;</div><div class='add'>+</div><div class='add'>+		config-&gt;debug.lc_enable_sw_fallback = dc-&gt;debug.hdcp_lc_enable_sw_fallback;</div><div class='add'>+		if (dc-&gt;caps.fused_io_supported || dc-&gt;debug.hdcp_lc_force_fw_enable) {</div><div class='add'>+			ddc_funcs-&gt;atomic_write_poll_read_i2c = lp_atomic_write_poll_read_i2c;</div><div class='add'>+			ddc_funcs-&gt;atomic_write_poll_read_aux = lp_atomic_write_poll_read_aux;</div><div class='add'>+		} else {</div><div class='add'>+			ddc_funcs-&gt;atomic_write_poll_read_i2c = NULL;</div><div class='add'>+			ddc_funcs-&gt;atomic_write_poll_read_aux = NULL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		memset(hdcp_work[i].aconnector, 0,</div><div class='ctx'> 		       sizeof(struct amdgpu_dm_connector *) *</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c<br/>index 2cd35392e2da..d4395b92fb85 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c</a></div><div class='hunk'>@@ -630,6 +630,19 @@ bool dm_helpers_submit_i2c(</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool dm_helpers_execute_fused_io(</div><div class='add'>+		struct dc_context *ctx,</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		union dmub_rb_cmd *commands,</div><div class='add'>+		uint8_t count,</div><div class='add'>+		uint32_t timeout_us</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *dev = ctx-&gt;driver_context;</div><div class='add'>+</div><div class='add'>+	return amdgpu_dm_execute_fused_io(dev, link, commands, count, timeout_us);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool execute_synaptics_rc_command(struct drm_dp_aux *aux,</div><div class='ctx'> 		bool is_write_cmd,</div><div class='ctx'> 		unsigned char cmd,</div><div class='hunk'>@@ -918,7 +931,7 @@ dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsigned int block, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	struct drm_connector *connector = data;</div><div class='ctx'> 	struct acpi_device *acpidev = ACPI_COMPANION(connector-&gt;dev-&gt;dev);</div><div class='del'>-	unsigned char start = block * EDID_LENGTH;</div><div class='add'>+	unsigned short start = block * EDID_LENGTH;</div><div class='ctx'> 	struct edid *edid;</div><div class='ctx'> 	int r;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c<br/>index 7ceedf626d23..25e8befbcc47 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c</a></div><div class='hunk'>@@ -51,6 +51,9 @@</div><div class='ctx'> </div><div class='ctx'> #define PEAK_FACTOR_X1000 1006</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * This function handles both native AUX and I2C-Over-AUX transactions.</div><div class='add'>+ */</div><div class='ctx'> static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,</div><div class='ctx'> 				  struct drm_dp_aux_msg *msg)</div><div class='ctx'> {</div><div class='hunk'>@@ -59,6 +62,7 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,</div><div class='ctx'> 	enum aux_return_code_type operation_result;</div><div class='ctx'> 	struct amdgpu_device *adev;</div><div class='ctx'> 	struct ddc_service *ddc;</div><div class='add'>+	uint8_t copy[16];</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(msg-&gt;size &gt; 16))</div><div class='ctx'> 		return -E2BIG;</div><div class='hunk'>@@ -74,6 +78,11 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,</div><div class='ctx'> 			(msg-&gt;request &amp; DP_AUX_I2C_WRITE_STATUS_UPDATE) != 0;</div><div class='ctx'> 	payload.defer_delay = 0;</div><div class='ctx'> </div><div class='add'>+	if (payload.write) {</div><div class='add'>+		memcpy(copy, msg-&gt;buffer, msg-&gt;size);</div><div class='add'>+		payload.data = copy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)-&gt;ddc_service, &amp;payload,</div><div class='ctx'> 				      &amp;operation_result);</div><div class='ctx'> </div><div class='hunk'>@@ -87,15 +96,25 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,</div><div class='ctx'> 	if (adev-&gt;dm.aux_hpd_discon_quirk) {</div><div class='ctx'> 		if (msg-&gt;address == DP_SIDEBAND_MSG_DOWN_REQ_BASE &amp;&amp;</div><div class='ctx'> 			operation_result == AUX_RET_ERROR_HPD_DISCON) {</div><div class='del'>-			result = 0;</div><div class='add'>+			result = msg-&gt;size;</div><div class='ctx'> 			operation_result = AUX_RET_SUCCESS;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (payload.write &amp;&amp; result &gt;= 0)</div><div class='del'>-		result = msg-&gt;size;</div><div class='add'>+	/*</div><div class='add'>+	 * result equals to 0 includes the cases of AUX_DEFER/I2C_DEFER</div><div class='add'>+	 */</div><div class='add'>+	if (payload.write &amp;&amp; result &gt;= 0) {</div><div class='add'>+		if (result) {</div><div class='add'>+			/*one byte indicating partially written bytes*/</div><div class='add'>+			drm_dbg_dp(adev_to_drm(adev), "amdgpu: AUX partially written\n");</div><div class='add'>+			result = payload.data[0];</div><div class='add'>+		} else if (!payload.reply[0])</div><div class='add'>+			/*I2C_ACK|AUX_ACK*/</div><div class='add'>+			result = msg-&gt;size;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (result &lt; 0)</div><div class='add'>+	if (result &lt; 0) {</div><div class='ctx'> 		switch (operation_result) {</div><div class='ctx'> 		case AUX_RET_SUCCESS:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -114,6 +133,13 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		drm_dbg_dp(adev_to_drm(adev), "amdgpu: DP AUX transfer fail:%d\n", operation_result);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (payload.reply[0])</div><div class='add'>+		drm_dbg_dp(adev_to_drm(adev), "amdgpu: AUX reply command not ACK: 0x%02x.",</div><div class='add'>+			payload.reply[0]);</div><div class='add'>+</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1713,16 +1739,17 @@ static bool is_dsc_common_config_possible(struct dc_stream_state *stream,</div><div class='ctx'> 					  struct dc_dsc_bw_range *bw_range)</div><div class='ctx'> {</div><div class='ctx'> 	struct dc_dsc_policy dsc_policy = {0};</div><div class='add'>+	bool is_dsc_possible;</div><div class='ctx'> </div><div class='ctx'> 	dc_dsc_get_policy_for_timing(&amp;stream-&gt;timing, 0, &amp;dsc_policy, dc_link_get_highest_encoding_format(stream-&gt;link));</div><div class='del'>-	dc_dsc_compute_bandwidth_range(stream-&gt;sink-&gt;ctx-&gt;dc-&gt;res_pool-&gt;dscs[0],</div><div class='del'>-				       stream-&gt;sink-&gt;ctx-&gt;dc-&gt;debug.dsc_min_slice_height_override,</div><div class='del'>-				       dsc_policy.min_target_bpp * 16,</div><div class='del'>-				       dsc_policy.max_target_bpp * 16,</div><div class='del'>-				       &amp;stream-&gt;sink-&gt;dsc_caps.dsc_dec_caps,</div><div class='del'>-				       &amp;stream-&gt;timing, dc_link_get_highest_encoding_format(stream-&gt;link), bw_range);</div><div class='del'>-</div><div class='del'>-	return bw_range-&gt;max_target_bpp_x16 &amp;&amp; bw_range-&gt;min_target_bpp_x16;</div><div class='add'>+	is_dsc_possible = dc_dsc_compute_bandwidth_range(stream-&gt;sink-&gt;ctx-&gt;dc-&gt;res_pool-&gt;dscs[0],</div><div class='add'>+							 stream-&gt;sink-&gt;ctx-&gt;dc-&gt;debug.dsc_min_slice_height_override,</div><div class='add'>+							 dsc_policy.min_target_bpp * 16,</div><div class='add'>+							 dsc_policy.max_target_bpp * 16,</div><div class='add'>+							 &amp;stream-&gt;sink-&gt;dsc_caps.dsc_dec_caps,</div><div class='add'>+							 &amp;stream-&gt;timing, dc_link_get_highest_encoding_format(stream-&gt;link), bw_range);</div><div class='add'>+</div><div class='add'>+	return is_dsc_possible;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c<br/>index 3e0f45f1711c..b7c6e8d13435 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c</a></div><div class='hunk'>@@ -948,13 +948,13 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane,</div><div class='ctx'> 	adev = amdgpu_ttm_adev(rbo-&gt;tbo.bdev);</div><div class='ctx'> 	r = amdgpu_bo_reserve(rbo, true);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "fail to reserve bo (%d)\n", r);</div><div class='add'>+		drm_err(adev_to_drm(adev), "fail to reserve bo (%d)\n", r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = dma_resv_reserve_fences(rbo-&gt;tbo.base.resv, 1);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "reserving fence slot failed (%d)\n", r);</div><div class='add'>+		drm_err(adev_to_drm(adev), "reserving fence slot failed (%d)\n", r);</div><div class='ctx'> 		goto error_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c<br/>index e140b7a04d72..f984cb0cb889 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c</a></div><div class='hunk'>@@ -87,14 +87,6 @@ void amdgpu_dm_set_psr_caps(struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> 		link-&gt;psr_settings.psr_feature_enabled = true;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	DRM_INFO("PSR support %d, DC PSR ver %d, sink PSR ver %d DPCD caps 0x%x su_y_granularity %d\n",</div><div class='del'>-		link-&gt;psr_settings.psr_feature_enabled,</div><div class='del'>-		link-&gt;psr_settings.psr_version,</div><div class='del'>-		link-&gt;dpcd_caps.psr_info.psr_version,</div><div class='del'>-		link-&gt;dpcd_caps.psr_info.psr_dpcd_caps.raw,</div><div class='del'>-		link-&gt;dpcd_caps.psr_info.psr2_su_y_granularity_cap);</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c<br/>new file mode 100644<br/>index 000000000000..1da07ebf9217<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_quirks.c</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * Permission is hereby granted, free of charge, to any person obtaining a</div><div class='add'>+ * copy of this software and associated documentation files (the "Software"),</div><div class='add'>+ * to deal in the Software without restriction, including without limitation</div><div class='add'>+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,</div><div class='add'>+ * and/or sell copies of the Software, and to permit persons to whom the</div><div class='add'>+ * Software is furnished to do so, subject to the following conditions:</div><div class='add'>+ *</div><div class='add'>+ * The above copyright notice and this permission notice shall be included in</div><div class='add'>+ * all copies or substantial portions of the Software.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR</div><div class='add'>+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,</div><div class='add'>+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL</div><div class='add'>+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR</div><div class='add'>+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,</div><div class='add'>+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR</div><div class='add'>+ * OTHER DEALINGS IN THE SOFTWARE.</div><div class='add'>+ *</div><div class='add'>+ * Authors: AMD</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dmi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "amdgpu.h"</div><div class='add'>+#include "amdgpu_dm.h"</div><div class='add'>+</div><div class='add'>+struct amdgpu_dm_quirks {</div><div class='add'>+	bool aux_hpd_discon;</div><div class='add'>+	bool support_edp0_on_dp1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct amdgpu_dm_quirks quirk_entries = {</div><div class='add'>+	.aux_hpd_discon = false,</div><div class='add'>+	.support_edp0_on_dp1 = false</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int edp0_on_dp1_callback(const struct dmi_system_id *id)</div><div class='add'>+{</div><div class='add'>+	quirk_entries.support_edp0_on_dp1 = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aux_hpd_discon_callback(const struct dmi_system_id *id)</div><div class='add'>+{</div><div class='add'>+	quirk_entries.aux_hpd_discon = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dmi_system_id dmi_quirk_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Precision 3660"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Precision 3260"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "Precision 3460"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Tower Plus 7010"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Tower 7010"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex SFF Plus 7010"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex SFF 7010"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Micro Plus 7010"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = aux_hpd_discon_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex Micro 7010"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = edp0_on_dp1_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP Elite mt645 G8 Mobile Thin Client"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = edp0_on_dp1_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP EliteBook 645 14 inch G11 Notebook PC"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = edp0_on_dp1_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP EliteBook 665 16 inch G11 Notebook PC"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = edp0_on_dp1_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook 445 14 inch G11 Notebook PC"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.callback = edp0_on_dp1_callback,</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "HP"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "HP ProBook 465 16 inch G11 Notebook PC"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+	/* TODO: refactor this from a fixed table to a dynamic option */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void retrieve_dmi_info(struct amdgpu_display_manager *dm)</div><div class='add'>+{</div><div class='add'>+	struct drm_device *dev = dm-&gt;ddev;</div><div class='add'>+	int dmi_id;</div><div class='add'>+</div><div class='add'>+	dm-&gt;aux_hpd_discon_quirk = false;</div><div class='add'>+	dm-&gt;edp0_on_dp1_quirk = false;</div><div class='add'>+</div><div class='add'>+	dmi_id = dmi_check_system(dmi_quirk_table);</div><div class='add'>+</div><div class='add'>+	if (!dmi_id)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (quirk_entries.aux_hpd_discon) {</div><div class='add'>+		dm-&gt;aux_hpd_discon_quirk = true;</div><div class='add'>+		drm_info(dev, "aux_hpd_discon_quirk attached\n");</div><div class='add'>+	}</div><div class='add'>+	if (quirk_entries.support_edp0_on_dp1) {</div><div class='add'>+		dm-&gt;edp0_on_dp1_quirk = true;</div><div class='add'>+		drm_info(dev, "support_edp0_on_dp1 attached\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c<br/>index 0d5fefb0f591..d9527c05fc87 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c</a></div><div class='hunk'>@@ -102,13 +102,13 @@ static int amdgpu_dm_wb_prepare_job(struct drm_writeback_connector *wb_connector</div><div class='ctx'> </div><div class='ctx'> 	r = amdgpu_bo_reserve(rbo, true);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "fail to reserve bo (%d)\n", r);</div><div class='add'>+		drm_err(adev_to_drm(adev), "fail to reserve bo (%d)\n", r);</div><div class='ctx'> 		return r;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	r = dma_resv_reserve_fences(rbo-&gt;tbo.base.resv, 1);</div><div class='ctx'> 	if (r) {</div><div class='del'>-		dev_err(adev-&gt;dev, "reserving fence slot failed (%d)\n", r);</div><div class='add'>+		drm_err(adev_to_drm(adev), "reserving fence slot failed (%d)\n", r);</div><div class='ctx'> 		goto error_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/Makefile b/drivers/gpu/drm/amd/display/dc/Makefile<br/>index 3e1f5b689718..3c9ecea7eebc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/Makefile</a></div><div class='hunk'>@@ -53,31 +53,30 @@ DC_LIBS += hdcp</div><div class='ctx'> </div><div class='ctx'> ifdef CONFIG_DRM_AMD_DC_FP</div><div class='ctx'> DC_LIBS += sspl</div><div class='del'>-DC_SPL_TRANS += dc_spl_translate.o</div><div class='add'>+AMD_DISPLAY_FILES += $(addprefix $(AMDDALPATH)/dc/, dc_spl_translate.o)</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> AMD_DC = $(addsuffix /Makefile, $(addprefix $(FULL_AMD_DISPLAY_PATH)/dc/,$(DC_LIBS)))</div><div class='ctx'> </div><div class='ctx'> include $(AMD_DC)</div><div class='ctx'> </div><div class='del'>-DISPLAY_CORE = dc.o dc_stat.o dc_resource.o dc_hw_sequencer.o dc_sink.o \</div><div class='del'>-dc_surface.o dc_debug.o dc_stream.o dc_link_enc_cfg.o dc_link_exports.o dc_state.o</div><div class='add'>+FILES =</div><div class='add'>+FILES += dc_dmub_srv.o</div><div class='add'>+FILES += dc_edid_parser.o</div><div class='add'>+FILES += dc_fused_io.o</div><div class='add'>+FILES += dc_helper.o</div><div class='add'>+FILES += core/dc.o</div><div class='add'>+FILES += core/dc_debug.o</div><div class='add'>+FILES += core/dc_hw_sequencer.o</div><div class='add'>+FILES += core/dc_link_enc_cfg.o</div><div class='add'>+FILES += core/dc_link_exports.o</div><div class='add'>+FILES += core/dc_resource.o</div><div class='add'>+FILES += core/dc_sink.o</div><div class='add'>+FILES += core/dc_stat.o</div><div class='add'>+FILES += core/dc_state.o</div><div class='add'>+FILES += core/dc_stream.o</div><div class='add'>+FILES += core/dc_surface.o</div><div class='add'>+FILES += core/dc_vm_helper.o</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(addprefix $(AMDDALPATH)/dc/, $(FILES))</div><div class='ctx'> </div><div class='del'>-DISPLAY_CORE += dc_vm_helper.o</div><div class='del'>-</div><div class='del'>-AMD_DISPLAY_CORE = $(addprefix $(AMDDALPATH)/dc/core/,$(DISPLAY_CORE))</div><div class='del'>-</div><div class='del'>-AMD_DM_REG_UPDATE = $(addprefix $(AMDDALPATH)/dc/,dc_helper.o)</div><div class='del'>-</div><div class='del'>-AMD_DC_SPL_TRANS = $(addprefix $(AMDDALPATH)/dc/,$(DC_SPL_TRANS))</div><div class='del'>-</div><div class='del'>-AMD_DISPLAY_FILES += $(AMD_DISPLAY_CORE)</div><div class='del'>-AMD_DISPLAY_FILES += $(AMD_DM_REG_UPDATE)</div><div class='del'>-</div><div class='del'>-DC_DMUB += dc_dmub_srv.o</div><div class='del'>-DC_EDID += dc_edid_parser.o</div><div class='del'>-AMD_DISPLAY_DMUB = $(addprefix $(AMDDALPATH)/dc/,$(DC_DMUB))</div><div class='del'>-AMD_DISPLAY_EDID = $(addprefix $(AMDDALPATH)/dc/,$(DC_EDID))</div><div class='del'>-AMD_DISPLAY_FILES += $(AMD_DISPLAY_DMUB) $(AMD_DISPLAY_EDID)</div><div class='del'>-</div><div class='del'>-AMD_DISPLAY_FILES += $(AMD_DC_SPL_TRANS)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c b/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c<br/>index 88d3f9d7dd55..452206b5095e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c</a></div><div class='hunk'>@@ -51,8 +51,6 @@ static inline unsigned long long complete_integer_division_u64(</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long result;</div><div class='ctx'> </div><div class='del'>-	ASSERT(divisor);</div><div class='del'>-</div><div class='ctx'> 	result = div64_u64_rem(dividend, divisor, remainder);</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='hunk'>@@ -213,9 +211,6 @@ struct fixed31_32 dc_fixpt_recip(struct fixed31_32 arg)</div><div class='ctx'> 	 * @note</div><div class='ctx'> 	 * Good idea to use Newton's method</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='del'>-	ASSERT(arg.value);</div><div class='del'>-</div><div class='ctx'> 	return dc_fixpt_from_fraction(</div><div class='ctx'> 		dc_fixpt_one.value,</div><div class='ctx'> 		arg.value);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c<br/>index 3bacf470f7c5..67f08495b7e6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/bios/bios_parser.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/bios/bios_parser.c</a></div><div class='hunk'>@@ -2384,10 +2384,10 @@ static enum bp_result get_integrated_info_v8(</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * get_integrated_info_v8</div><div class='add'>+ * get_integrated_info_v9</div><div class='ctx'>  *</div><div class='ctx'>  * @brief</div><div class='del'>- * Get V8 integrated BIOS information</div><div class='add'>+ * Get V9 integrated BIOS information</div><div class='ctx'>  *</div><div class='ctx'>  * @param</div><div class='ctx'>  * bios_parser *bp - [in]BIOS parser handler to get master data table</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c<br/>index 19897fa52e7e..d82a52319088 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c</a></div><div class='hunk'>@@ -142,17 +142,3 @@ int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_di</div><div class='ctx'> </div><div class='ctx'> 	return actual_dispclk_set_mhz * 1000;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr)</div><div class='del'>-{</div><div class='del'>-	int actual_dprefclk_set_mhz = -1;</div><div class='del'>-</div><div class='del'>-	actual_dprefclk_set_mhz = rv1_vbios_smu_send_msg_with_param(</div><div class='del'>-			clk_mgr,</div><div class='del'>-			VBIOSSMC_MSG_SetDprefclkFreq,</div><div class='del'>-			khz_to_mhz_ceil(clk_mgr-&gt;base.dprefclk_khz));</div><div class='del'>-</div><div class='del'>-	/* TODO: add code for programing DP DTO, currently this is down by command table */</div><div class='del'>-</div><div class='del'>-	return actual_dprefclk_set_mhz * 1000;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h<br/>index 083cb3158859..81d7c912549c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.h</a></div><div class='hunk'>@@ -27,6 +27,5 @@</div><div class='ctx'> #define DAL_DC_DCN10_RV1_CLK_MGR_VBIOS_SMU_H_</div><div class='ctx'> </div><div class='ctx'> int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);</div><div class='del'>-int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> </div><div class='ctx'> #endif /* DAL_DC_DCN10_RV1_CLK_MGR_VBIOS_SMU_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c<br/>index 23b390245b5d..5a633333dbb5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c</a></div><div class='hunk'>@@ -164,20 +164,6 @@ int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dis</div><div class='ctx'> 	return actual_dispclk_set_mhz * 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr)</div><div class='del'>-{</div><div class='del'>-	int actual_dprefclk_set_mhz = -1;</div><div class='del'>-</div><div class='del'>-	actual_dprefclk_set_mhz = rn_vbios_smu_send_msg_with_param(</div><div class='del'>-			clk_mgr,</div><div class='del'>-			VBIOSSMC_MSG_SetDprefclkFreq,</div><div class='del'>-			khz_to_mhz_ceil(clk_mgr-&gt;base.dprefclk_khz));</div><div class='del'>-</div><div class='del'>-	/* TODO: add code for programing DP DTO, currently this is down by command table */</div><div class='del'>-</div><div class='del'>-	return actual_dprefclk_set_mhz * 1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz)</div><div class='ctx'> {</div><div class='ctx'> 	int actual_dcfclk_set_mhz = -1;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h<br/>index 1ce19d875358..f76fad87f0e1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.h</a></div><div class='hunk'>@@ -30,7 +30,6 @@ enum dcn_pwr_state;</div><div class='ctx'> </div><div class='ctx'> int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);</div><div class='del'>-int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);</div><div class='ctx'> int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);</div><div class='ctx'> int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz);</div><div class='ctx'> void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c<br/>index 2d14346b680e..478b4d6a3544 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c</a></div><div class='hunk'>@@ -49,12 +49,9 @@ static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E0000</div><div class='ctx'> 					{ { 0, 0, 0, 0, 0, 0 } },</div><div class='ctx'> 					{ { 0, 0, 0, 0, 0, 0 } },</div><div class='ctx'> 					{ { 0, 0, 0, 0, 0, 0 } } } };</div><div class='del'>-static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D20, 0x00010400, 0x0241B000, 0x04040000 } },</div><div class='del'>-					{ { 0, 0, 0, 0, 0, 0 } },</div><div class='del'>-					{ { 0, 0, 0, 0, 0, 0 } },</div><div class='del'>-					{ { 0, 0, 0, 0, 0, 0 } },</div><div class='del'>-					{ { 0, 0, 0, 0, 0, 0 } },</div><div class='del'>-					{ { 0, 0, 0, 0, 0, 0 } } } };</div><div class='add'>+</div><div class='add'>+#define CTX clk_mgr-&gt;base.ctx</div><div class='add'>+#define IND_REG(offset)	offset</div><div class='ctx'> </div><div class='ctx'> #define regBIF_BX_PF2_RSMU_INDEX                                                                        0x0000</div><div class='ctx'> #define regBIF_BX_PF2_RSMU_INDEX_BASE_IDX                                                               1</div><div class='hunk'>@@ -67,9 +64,6 @@ static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D</div><div class='ctx'> #define FN(reg_name, field) \</div><div class='ctx'> 	FD(reg_name##__##field)</div><div class='ctx'> </div><div class='del'>-#define REG_NBIO(reg_name) \</div><div class='del'>-	(NBIO_BASE.instance[0].segment[regBIF_BX_PF2_ ## reg_name ## _BASE_IDX] + regBIF_BX_PF2_ ## reg_name)</div><div class='del'>-</div><div class='ctx'> #undef DC_LOGGER</div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 	CTX-&gt;logger</div><div class='hunk'>@@ -77,6 +71,13 @@ static const struct IP_BASE NBIO_BASE = { { { { 0x00000000, 0x00000014, 0x00000D</div><div class='ctx'> </div><div class='ctx'> #define mmMP1_C2PMSG_3                            0x3B1050C</div><div class='ctx'> </div><div class='add'>+#define reg__MP1_C2PMSG_3_MASK					(0xFFFFFFFF)</div><div class='add'>+#define reg__MP1_C2PMSG_3__SHIFT					(0)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define data_reg_name__MP1_C2PMSG_3_MASK		(0xFFFFFFFF)</div><div class='add'>+#define data_reg_name__MP1_C2PMSG_3__SHIFT		(0)</div><div class='add'>+</div><div class='ctx'> #define VBIOSSMC_MSG_TestMessage                  0x01 ///&lt; To check if PMFW is alive and responding. Requirement specified by PMFW team</div><div class='ctx'> #define VBIOSSMC_MSG_GetPmfwVersion               0x02 ///&lt; Get PMFW version</div><div class='ctx'> #define VBIOSSMC_MSG_Spare0                       0x03 ///&lt; Spare0</div><div class='hunk'>@@ -153,12 +154,10 @@ static int dcn315_smu_send_msg_with_param(</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; SMU_REGISTER_WRITE_RETRY_COUNT; i++) {</div><div class='ctx'> 		/* Trigger the message transaction by writing the message ID */</div><div class='del'>-		generic_write_indirect_reg(CTX,</div><div class='del'>-			REG_NBIO(RSMU_INDEX), REG_NBIO(RSMU_DATA),</div><div class='del'>-			mmMP1_C2PMSG_3, msg_id);</div><div class='del'>-		read_back_data = generic_read_indirect_reg(CTX,</div><div class='del'>-			REG_NBIO(RSMU_INDEX), REG_NBIO(RSMU_DATA),</div><div class='del'>-			mmMP1_C2PMSG_3);</div><div class='add'>+		IX_REG_SET_SYNC(mmMP1_C2PMSG_3, 0,</div><div class='add'>+			MP1_C2PMSG_3, msg_id);</div><div class='add'>+		IX_REG_GET_SYNC(mmMP1_C2PMSG_3,</div><div class='add'>+			MP1_C2PMSG_3, &amp;read_back_data);</div><div class='ctx'> 		if (read_back_data == msg_id)</div><div class='ctx'> 			break;</div><div class='ctx'> 		udelay(2);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c<br/>index 6a6ae618650b..4607eff07253 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c</a></div><div class='hunk'>@@ -65,6 +65,7 @@</div><div class='ctx'> #define mmCLK1_CLK5_ALLOW_DS 0x16EB1</div><div class='ctx'> </div><div class='ctx'> #define mmCLK5_spll_field_8 0x1B04B</div><div class='add'>+#define mmCLK6_spll_field_8 0x1B24B</div><div class='ctx'> #define mmDENTIST_DISPCLK_CNTL 0x0124</div><div class='ctx'> #define regDENTIST_DISPCLK_CNTL 0x0064</div><div class='ctx'> #define regDENTIST_DISPCLK_CNTL_BASE_IDX 1</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c<br/>index 142de8938d7c..bb1ac12a2b09 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c</a></div><div class='hunk'>@@ -90,6 +90,7 @@</div><div class='ctx'> #define mmCLK1_CLK5_ALLOW_DS 0x16EB1</div><div class='ctx'> </div><div class='ctx'> #define mmCLK5_spll_field_8 0x1B24B</div><div class='add'>+#define mmCLK6_spll_field_8 0x1B24B</div><div class='ctx'> #define mmDENTIST_DISPCLK_CNTL 0x0124</div><div class='ctx'> #define regDENTIST_DISPCLK_CNTL 0x0064</div><div class='ctx'> #define regDENTIST_DISPCLK_CNTL_BASE_IDX 1</div><div class='hunk'>@@ -116,6 +117,7 @@</div><div class='ctx'> #define DENTIST_DISPCLK_CNTL__DENTIST_DPPCLK_WDIVIDER_MASK 0x7F000000L</div><div class='ctx'> </div><div class='ctx'> #define CLK5_spll_field_8__spll_ssc_en_MASK 0x00002000L</div><div class='add'>+#define CLK6_spll_field_8__spll_ssc_en_MASK 0x00002000L</div><div class='ctx'> </div><div class='ctx'> #define SMU_VER_THRESHOLD 0x5D4A00 //93.74.0</div><div class='ctx'> #undef FN</div><div class='hunk'>@@ -596,7 +598,11 @@ static bool dcn35_is_spll_ssc_enabled(struct clk_mgr *clk_mgr_base)</div><div class='ctx'> </div><div class='ctx'> 	uint32_t ssc_enable;</div><div class='ctx'> </div><div class='del'>-	ssc_enable = REG_READ(CLK5_spll_field_8) &amp; CLK5_spll_field_8__spll_ssc_en_MASK;</div><div class='add'>+	if (clk_mgr_base-&gt;ctx-&gt;dce_version == DCN_VERSION_3_51) {</div><div class='add'>+		ssc_enable = REG_READ(CLK6_spll_field_8) &amp; CLK6_spll_field_8__spll_ssc_en_MASK;</div><div class='add'>+	} else {</div><div class='add'>+		ssc_enable = REG_READ(CLK5_spll_field_8) &amp; CLK5_spll_field_8__spll_ssc_en_MASK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ssc_enable != 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c<br/>index f6f0e6a33001..604d256cb47a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c</a></div><div class='hunk'>@@ -84,8 +84,8 @@</div><div class='ctx'> #define VBIOSSMC_MSG_AllowZstatesEntry            0x15</div><div class='ctx'> #define VBIOSSMC_MSG_DisallowZstatesEntry     	  0x16</div><div class='ctx'> #define VBIOSSMC_MSG_SetDtbClk                    0x17</div><div class='del'>-#define VBIOSSMC_MSG_DispPsrEntry                 0x18 ///&lt; Display PSR entry, DMU</div><div class='del'>-#define VBIOSSMC_MSG_DispPsrExit                  0x19 ///&lt; Display PSR exit, DMU</div><div class='add'>+#define VBIOSSMC_MSG_DispIPS2Entry                0x18 ///&lt; Display IPS2 entry, DMU</div><div class='add'>+#define VBIOSSMC_MSG_DispIPS2Exit                 0x19 ///&lt; Display IPS2 exit, DMU</div><div class='ctx'> #define VBIOSSMC_MSG_DisableLSdma                 0x1A ///&lt; Disable LSDMA; only sent by VBIOS</div><div class='ctx'> #define VBIOSSMC_MSG_DpControllerPhyStatus        0x1B ///&lt; Inform PMFW about the pre conditions for turning SLDO2 on/off . bit[0]==1 precondition is met, bit[1-2] are for DPPHY number</div><div class='ctx'> #define VBIOSSMC_MSG_QueryIPS2Support             0x1C ///&lt; Return 1: support; else not supported</div><div class='hunk'>@@ -475,7 +475,7 @@ int dcn35_smu_exit_low_power_state(struct clk_mgr_internal *clk_mgr)</div><div class='ctx'> </div><div class='ctx'> 	retv = dcn35_smu_send_msg_with_param(</div><div class='ctx'> 		clk_mgr,</div><div class='del'>-		VBIOSSMC_MSG_DispPsrExit,</div><div class='add'>+		VBIOSSMC_MSG_DispIPS2Exit,</div><div class='ctx'> 		0);</div><div class='ctx'> 	smu_print("%s: smu_exit_low_power_state return = %d\n", __func__, retv);</div><div class='ctx'> 	return retv;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c<br/>index 28d1353f403d..56d011a1323c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/core/dc.c</a></div><div class='hunk'>@@ -36,7 +36,9 @@</div><div class='ctx'> #include "resource.h"</div><div class='ctx'> #include "dc_state.h"</div><div class='ctx'> #include "dc_state_priv.h"</div><div class='add'>+#include "dc_plane.h"</div><div class='ctx'> #include "dc_plane_priv.h"</div><div class='add'>+#include "dc_stream_priv.h"</div><div class='ctx'> </div><div class='ctx'> #include "gpio_service_interface.h"</div><div class='ctx'> #include "clk_mgr.h"</div><div class='hunk'>@@ -439,9 +441,12 @@ bool dc_stream_adjust_vmin_vmax(struct dc *dc,</div><div class='ctx'> 	 * Don't adjust DRR while there's bandwidth optimizations pending to</div><div class='ctx'> 	 * avoid conflicting with firmware updates.</div><div class='ctx'> 	 */</div><div class='del'>-	if (dc-&gt;ctx-&gt;dce_version &gt; DCE_VERSION_MAX)</div><div class='del'>-		if (dc-&gt;optimized_required || dc-&gt;wm_optimized_required)</div><div class='add'>+	if (dc-&gt;ctx-&gt;dce_version &gt; DCE_VERSION_MAX) {</div><div class='add'>+		if (dc-&gt;optimized_required || dc-&gt;wm_optimized_required) {</div><div class='add'>+			stream-&gt;adjust.timing_adjust_pending = true;</div><div class='ctx'> 			return false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dc_exit_ips_for_hw_access(dc);</div><div class='ctx'> </div><div class='hunk'>@@ -1192,6 +1197,12 @@ static void apply_ctx_interdependent_lock(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> static void dc_update_visual_confirm_color(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx)</div><div class='ctx'> {</div><div class='add'>+	if (dc-&gt;debug.visual_confirm &amp; VISUAL_CONFIRM_EXPLICIT) {</div><div class='add'>+		memcpy(&amp;pipe_ctx-&gt;visual_confirm_color, &amp;pipe_ctx-&gt;plane_state-&gt;visual_confirm_color,</div><div class='add'>+		sizeof(pipe_ctx-&gt;visual_confirm_color));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (dc-&gt;ctx-&gt;dce_version &gt;= DCN_VERSION_1_0) {</div><div class='ctx'> 		memset(&amp;pipe_ctx-&gt;visual_confirm_color, 0, sizeof(struct tg_color));</div><div class='ctx'> </div><div class='hunk'>@@ -1225,6 +1236,51 @@ static void dc_update_visual_confirm_color(struct dc *dc, struct dc_state *conte</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dc_get_visual_confirm_for_stream(</div><div class='add'>+	struct dc *dc,</div><div class='add'>+	struct dc_stream_state *stream_state,</div><div class='add'>+	struct tg_color *color)</div><div class='add'>+{</div><div class='add'>+	struct dc_stream_status *stream_status = dc_stream_get_status(stream_state);</div><div class='add'>+	struct pipe_ctx *pipe_ctx;</div><div class='add'>+	int i;</div><div class='add'>+	struct dc_plane_state *plane_state = NULL;</div><div class='add'>+</div><div class='add'>+	if (!stream_status)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (dc-&gt;debug.visual_confirm) {</div><div class='add'>+	case VISUAL_CONFIRM_DISABLE:</div><div class='add'>+		return;</div><div class='add'>+	case VISUAL_CONFIRM_PSR:</div><div class='add'>+	case VISUAL_CONFIRM_FAMS:</div><div class='add'>+		pipe_ctx = dc_stream_get_pipe_ctx(stream_state);</div><div class='add'>+		if (!pipe_ctx)</div><div class='add'>+			return;</div><div class='add'>+		dc_dmub_srv_get_visual_confirm_color_cmd(dc, pipe_ctx);</div><div class='add'>+		memcpy(color, &amp;dc-&gt;ctx-&gt;dmub_srv-&gt;dmub-&gt;visual_confirm_color, sizeof(struct tg_color));</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		/* find plane with highest layer_index */</div><div class='add'>+		for (i = 0; i &lt; stream_status-&gt;plane_count; i++) {</div><div class='add'>+			if (stream_status-&gt;plane_states[i]-&gt;visible)</div><div class='add'>+				plane_state = stream_status-&gt;plane_states[i];</div><div class='add'>+		}</div><div class='add'>+		if (!plane_state)</div><div class='add'>+			return;</div><div class='add'>+		/* find pipe that contains plane with highest layer index */</div><div class='add'>+		for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='add'>+			struct pipe_ctx *pipe = &amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+</div><div class='add'>+			if (pipe-&gt;plane_state == plane_state) {</div><div class='add'>+				memcpy(color, &amp;pipe-&gt;visual_confirm_color, sizeof(struct tg_color));</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void disable_dangling_plane(struct dc *dc, struct dc_state *context)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -2053,6 +2109,18 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c</div><div class='ctx'> 		dc-&gt;hwss.enable_accelerated_mode(dc, context);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dc-&gt;hwseq-&gt;funcs.wait_for_pipe_update_if_needed) {</div><div class='add'>+		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+			pipe = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+			//Only delay otg master for a given config</div><div class='add'>+			if (resource_is_pipe_type(pipe, OTG_MASTER)) {</div><div class='add'>+				//dc_commit_state_no_check is always a full update</div><div class='add'>+				dc-&gt;hwseq-&gt;funcs.wait_for_pipe_update_if_needed(dc, pipe, false);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (context-&gt;stream_count &gt; get_seamless_boot_stream_count(context) ||</div><div class='ctx'> 		context-&gt;stream_count == 0)</div><div class='ctx'> 		dc-&gt;hwss.prepare_bandwidth(dc, context);</div><div class='hunk'>@@ -2117,6 +2185,14 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c</div><div class='ctx'> 	if (dc-&gt;hwss.program_front_end_for_ctx) {</div><div class='ctx'> 		dc-&gt;hwss.interdependent_update_lock(dc, context, true);</div><div class='ctx'> 		dc-&gt;hwss.program_front_end_for_ctx(dc, context);</div><div class='add'>+</div><div class='add'>+		if (dc-&gt;hwseq-&gt;funcs.set_wait_for_update_needed_for_pipe) {</div><div class='add'>+			for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='add'>+				pipe = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+				dc-&gt;hwseq-&gt;funcs.set_wait_for_update_needed_for_pipe(dc, pipe);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		dc-&gt;hwss.interdependent_update_lock(dc, context, false);</div><div class='ctx'> 		dc-&gt;hwss.post_unlock_program_front_end(dc, context);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2258,11 +2334,15 @@ enum dc_status dc_commit_streams(struct dc *dc, struct dc_commit_streams_params</div><div class='ctx'> 	for (i = 0; i &lt; params-&gt;stream_count; i++) {</div><div class='ctx'> 		struct dc_stream_state *stream = params-&gt;streams[i];</div><div class='ctx'> 		struct dc_stream_status *status = dc_stream_get_status(stream);</div><div class='add'>+		struct dc_sink *sink = stream-&gt;sink;</div><div class='ctx'> </div><div class='ctx'> 		/* revalidate streams */</div><div class='del'>-		res = dc_validate_stream(dc, stream);</div><div class='del'>-		if (res != DC_OK)</div><div class='del'>-			return res;</div><div class='add'>+		if (!dc_is_virtual_signal(sink-&gt;sink_signal)) {</div><div class='add'>+			res = dc_validate_stream(dc, stream);</div><div class='add'>+			if (res != DC_OK)</div><div class='add'>+				return res;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 		dc_stream_log(dc, stream);</div><div class='ctx'> </div><div class='hunk'>@@ -2815,7 +2895,7 @@ static enum surface_update_type check_update_surfaces_for_stream(</div><div class='ctx'> 	int i;</div><div class='ctx'> 	enum surface_update_type overall_type = UPDATE_TYPE_FAST;</div><div class='ctx'> </div><div class='del'>-	if (dc-&gt;idle_optimizations_allowed)</div><div class='add'>+	if (dc-&gt;idle_optimizations_allowed || dc_can_clear_cursor_limit(dc))</div><div class='ctx'> 		overall_type = UPDATE_TYPE_FULL;</div><div class='ctx'> </div><div class='ctx'> 	if (stream_status == NULL || stream_status-&gt;plane_count != surface_count)</div><div class='hunk'>@@ -3168,7 +3248,8 @@ static void copy_stream_update_to_stream(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	if (update-&gt;crtc_timing_adjust) {</div><div class='ctx'> 		if (stream-&gt;adjust.v_total_min != update-&gt;crtc_timing_adjust-&gt;v_total_min ||</div><div class='del'>-			stream-&gt;adjust.v_total_max != update-&gt;crtc_timing_adjust-&gt;v_total_max)</div><div class='add'>+			stream-&gt;adjust.v_total_max != update-&gt;crtc_timing_adjust-&gt;v_total_max ||</div><div class='add'>+			stream-&gt;adjust.timing_adjust_pending)</div><div class='ctx'> 			update-&gt;crtc_timing_adjust-&gt;timing_adjust_pending = true;</div><div class='ctx'> 		stream-&gt;adjust = *update-&gt;crtc_timing_adjust;</div><div class='ctx'> 		update-&gt;crtc_timing_adjust-&gt;timing_adjust_pending = false;</div><div class='hunk'>@@ -3219,7 +3300,7 @@ static void copy_stream_update_to_stream(struct dc *dc,</div><div class='ctx'> 		if (dsc_validate_context) {</div><div class='ctx'> 			stream-&gt;timing.dsc_cfg = *update-&gt;dsc_config;</div><div class='ctx'> 			stream-&gt;timing.flags.DSC = enable_dsc;</div><div class='del'>-			if (!dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, dsc_validate_context, true)) {</div><div class='add'>+			if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, dsc_validate_context, true) != DC_OK) {</div><div class='ctx'> 				stream-&gt;timing.dsc_cfg = old_dsc_cfg;</div><div class='ctx'> 				stream-&gt;timing.flags.DSC = old_dsc_enabled;</div><div class='ctx'> 				update-&gt;dsc_config = NULL;</div><div class='hunk'>@@ -3248,7 +3329,7 @@ static void backup_planes_and_stream_state(</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; status-&gt;plane_count; i++) {</div><div class='del'>-		scratch-&gt;plane_states[i] = *status-&gt;plane_states[i];</div><div class='add'>+		dc_plane_copy_config(&amp;scratch-&gt;plane_states[i], status-&gt;plane_states[i]);</div><div class='ctx'> 	}</div><div class='ctx'> 	scratch-&gt;stream_state = *stream;</div><div class='ctx'> }</div><div class='hunk'>@@ -3264,10 +3345,7 @@ static void restore_planes_and_stream_state(</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; status-&gt;plane_count; i++) {</div><div class='del'>-		/* refcount will always be valid, restore everything else */</div><div class='del'>-		struct kref refcount = status-&gt;plane_states[i]-&gt;refcount;</div><div class='del'>-		*status-&gt;plane_states[i] = scratch-&gt;plane_states[i];</div><div class='del'>-		status-&gt;plane_states[i]-&gt;refcount = refcount;</div><div class='add'>+		dc_plane_copy_config(status-&gt;plane_states[i], &amp;scratch-&gt;plane_states[i]);</div><div class='ctx'> 	}</div><div class='ctx'> 	*stream = scratch-&gt;stream_state;</div><div class='ctx'> }</div><div class='hunk'>@@ -3444,7 +3522,7 @@ static bool update_planes_and_stream_state(struct dc *dc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (update_type == UPDATE_TYPE_FULL) {</div><div class='del'>-		if (!dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false)) {</div><div class='add'>+		if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false) != DC_OK) {</div><div class='ctx'> 			BREAK_TO_DEBUGGER();</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3998,6 +4076,7 @@ static void commit_planes_for_stream(struct dc *dc,</div><div class='ctx'> 				&amp;context-&gt;res_ctx,</div><div class='ctx'> 				stream);</div><div class='ctx'> 	ASSERT(top_pipe_to_program != NULL);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 		struct pipe_ctx *old_pipe = &amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> </div><div class='hunk'>@@ -4048,6 +4127,9 @@ static void commit_planes_for_stream(struct dc *dc,</div><div class='ctx'> 		dc-&gt;hwss.wait_for_dcc_meta_propagation(dc, top_pipe_to_program);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dc-&gt;hwseq-&gt;funcs.wait_for_pipe_update_if_needed)</div><div class='add'>+		dc-&gt;hwseq-&gt;funcs.wait_for_pipe_update_if_needed(dc, top_pipe_to_program, update_type == UPDATE_TYPE_FAST);</div><div class='add'>+</div><div class='ctx'> 	if (should_lock_all_pipes &amp;&amp; dc-&gt;hwss.interdependent_update_lock) {</div><div class='ctx'> 		if (dc-&gt;hwss.subvp_pipe_control_lock)</div><div class='ctx'> 			dc-&gt;hwss.subvp_pipe_control_lock(dc, context, true, should_lock_all_pipes, NULL, subvp_prev_use);</div><div class='hunk'>@@ -4168,12 +4250,6 @@ static void commit_planes_for_stream(struct dc *dc,</div><div class='ctx'> 			if (update_type == UPDATE_TYPE_FAST)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			ASSERT(!pipe_ctx-&gt;plane_state-&gt;triplebuffer_flips);</div><div class='del'>-			if (dc-&gt;hwss.program_triplebuffer != NULL &amp;&amp; dc-&gt;debug.enable_tri_buf) {</div><div class='del'>-				/*turn off triple buffer for full update*/</div><div class='del'>-				dc-&gt;hwss.program_triplebuffer(</div><div class='del'>-					dc, pipe_ctx, pipe_ctx-&gt;plane_state-&gt;triplebuffer_flips);</div><div class='del'>-			}</div><div class='ctx'> 			stream_status =</div><div class='ctx'> 				stream_get_status(context, pipe_ctx-&gt;stream);</div><div class='ctx'> </div><div class='hunk'>@@ -4182,8 +4258,37 @@ static void commit_planes_for_stream(struct dc *dc,</div><div class='ctx'> 					dc, pipe_ctx-&gt;stream, stream_status-&gt;plane_count, context);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; dc-&gt;res_pool-&gt;pipe_count; j++) {</div><div class='add'>+		struct pipe_ctx *pipe_ctx = &amp;context-&gt;res_ctx.pipe_ctx[j];</div><div class='add'>+</div><div class='add'>+		if (!pipe_ctx-&gt;plane_state)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Full fe update*/</div><div class='add'>+		if (update_type == UPDATE_TYPE_FAST)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ASSERT(!pipe_ctx-&gt;plane_state-&gt;triplebuffer_flips);</div><div class='add'>+		if (dc-&gt;hwss.program_triplebuffer != NULL &amp;&amp; dc-&gt;debug.enable_tri_buf) {</div><div class='add'>+			/*turn off triple buffer for full update*/</div><div class='add'>+			dc-&gt;hwss.program_triplebuffer(</div><div class='add'>+				dc, pipe_ctx, pipe_ctx-&gt;plane_state-&gt;triplebuffer_flips);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (dc-&gt;hwss.program_front_end_for_ctx &amp;&amp; update_type != UPDATE_TYPE_FAST) {</div><div class='ctx'> 		dc-&gt;hwss.program_front_end_for_ctx(dc, context);</div><div class='add'>+</div><div class='add'>+		//Pipe busy until some frame and line #</div><div class='add'>+		if (dc-&gt;hwseq-&gt;funcs.set_wait_for_update_needed_for_pipe &amp;&amp; update_type == UPDATE_TYPE_FULL) {</div><div class='add'>+			for (j = 0; j &lt; dc-&gt;res_pool-&gt;pipe_count; j++) {</div><div class='add'>+				struct pipe_ctx *pipe_ctx = &amp;context-&gt;res_ctx.pipe_ctx[j];</div><div class='add'>+</div><div class='add'>+				dc-&gt;hwseq-&gt;funcs.set_wait_for_update_needed_for_pipe(dc, pipe_ctx);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (dc-&gt;debug.validate_dml_output) {</div><div class='ctx'> 			for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 				struct pipe_ctx *cur_pipe = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='hunk'>@@ -4523,7 +4628,7 @@ static struct dc_state *create_minimal_transition_state(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 	backup_and_set_minimal_pipe_split_policy(dc, base_context, policy);</div><div class='ctx'> 	/* commit minimal state */</div><div class='del'>-	if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, minimal_transition_context, false)) {</div><div class='add'>+	if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, minimal_transition_context, false) == DC_OK) {</div><div class='ctx'> 		/* prevent underflow and corruption when reconfiguring pipes */</div><div class='ctx'> 		force_vsync_flip_in_minimal_transition_context(minimal_transition_context);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -4958,6 +5063,9 @@ static bool full_update_required(struct dc *dc,</div><div class='ctx'> 	if (dc-&gt;idle_optimizations_allowed)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='add'>+	if (dc_can_clear_cursor_limit(dc))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5043,7 +5151,7 @@ static bool update_planes_and_stream_v1(struct dc *dc,</div><div class='ctx'> 	copy_stream_update_to_stream(dc, context, stream, stream_update);</div><div class='ctx'> </div><div class='ctx'> 	if (update_type &gt;= UPDATE_TYPE_FULL) {</div><div class='del'>-		if (!dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false)) {</div><div class='add'>+		if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false) != DC_OK) {</div><div class='ctx'> 			DC_ERROR("Mode validation failed for stream update!\n");</div><div class='ctx'> 			dc_state_release(context);</div><div class='ctx'> 			return false;</div><div class='hunk'>@@ -6187,15 +6295,22 @@ bool dc_abm_save_restore(</div><div class='ctx'> void dc_query_current_properties(struct dc *dc, struct dc_current_properties *properties)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	bool subvp_sw_cursor_req = false;</div><div class='add'>+	unsigned int max_cursor_size = dc-&gt;caps.max_cursor_size;</div><div class='add'>+	unsigned int stream_cursor_size;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; dc-&gt;current_state-&gt;stream_count; i++) {</div><div class='del'>-		if (check_subvp_sw_cursor_fallback_req(dc, dc-&gt;current_state-&gt;streams[i]) &amp;&amp; !dc-&gt;current_state-&gt;streams[i]-&gt;hw_cursor_req) {</div><div class='del'>-			subvp_sw_cursor_req = true;</div><div class='del'>-			break;</div><div class='add'>+	if (dc-&gt;debug.allow_sw_cursor_fallback &amp;&amp; dc-&gt;res_pool-&gt;funcs-&gt;get_max_hw_cursor_size) {</div><div class='add'>+		for (i = 0; i &lt; dc-&gt;current_state-&gt;stream_count; i++) {</div><div class='add'>+			stream_cursor_size = dc-&gt;res_pool-&gt;funcs-&gt;get_max_hw_cursor_size(dc,</div><div class='add'>+					dc-&gt;current_state,</div><div class='add'>+					dc-&gt;current_state-&gt;streams[i]);</div><div class='add'>+</div><div class='add'>+			if (stream_cursor_size &lt; max_cursor_size) {</div><div class='add'>+				max_cursor_size = stream_cursor_size;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	properties-&gt;cursor_size_limit = subvp_sw_cursor_req ? 64 : dc-&gt;caps.max_cursor_size;</div><div class='add'>+</div><div class='add'>+	properties-&gt;cursor_size_limit = max_cursor_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6261,3 +6376,27 @@ unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context)</div><div class='ctx'> 	else</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool dc_is_cursor_limit_pending(struct dc *dc)</div><div class='add'>+{</div><div class='add'>+	uint32_t i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dc-&gt;current_state-&gt;stream_count; i++) {</div><div class='add'>+		if (dc_stream_is_cursor_limit_pending(dc, dc-&gt;current_state-&gt;streams[i]))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dc_can_clear_cursor_limit(struct dc *dc)</div><div class='add'>+{</div><div class='add'>+	uint32_t i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dc-&gt;current_state-&gt;stream_count; i++) {</div><div class='add'>+		if (dc_state_can_clear_stream_cursor_subvp_limit(dc-&gt;current_state-&gt;streams[i], dc-&gt;current_state))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c<br/>index 650e89825968..7551d0a3fe82 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_debug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_debug.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_debug.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/core/dc_debug.c</a></div><div class='hunk'>@@ -266,6 +266,8 @@ char *dc_status_to_str(enum dc_status status)</div><div class='ctx'> 		return "Fail dp payload allocation";</div><div class='ctx'> 	case DC_FAIL_DP_LINK_BANDWIDTH:</div><div class='ctx'> 		return "Insufficient DP link bandwidth";</div><div class='add'>+	case DC_FAIL_HW_CURSOR_SUPPORT:</div><div class='add'>+		return "HW Cursor not supported";</div><div class='ctx'> 	case DC_ERROR_UNEXPECTED:</div><div class='ctx'> 		return "Unexpected error";</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c<br/>index 55b32dfbfdd6..7014b8d000bb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c</a></div><div class='hunk'>@@ -697,7 +697,7 @@ void get_fams2_visual_confirm_color(</div><div class='ctx'> void hwss_build_fast_sequence(struct dc *dc,</div><div class='ctx'> 		struct dc_dmub_cmd *dc_dmub_cmd,</div><div class='ctx'> 		unsigned int dmub_cmd_count,</div><div class='del'>-		struct block_sequence block_sequence[],</div><div class='add'>+		struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE],</div><div class='ctx'> 		unsigned int *num_steps,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 		struct dc_stream_status *stream_status,</div><div class='hunk'>@@ -896,7 +896,7 @@ void hwss_build_fast_sequence(struct dc *dc,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hwss_execute_sequence(struct dc *dc,</div><div class='del'>-		struct block_sequence block_sequence[],</div><div class='add'>+		struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE],</div><div class='ctx'> 		int num_steps)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c<br/>index 313a32248cd7..3da25bd8b578 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/core/dc_resource.c</a></div><div class='hunk'>@@ -1342,32 +1342,6 @@ static void calculate_inits_and_viewports(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	data-&gt;viewport_c.y += src.y / vpc_div;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool is_subvp_high_refresh_candidate(struct dc_stream_state *stream)</div><div class='del'>-{</div><div class='del'>-	uint32_t refresh_rate;</div><div class='del'>-	struct dc *dc = stream-&gt;ctx-&gt;dc;</div><div class='del'>-</div><div class='del'>-	refresh_rate = (stream-&gt;timing.pix_clk_100hz * (uint64_t)100 +</div><div class='del'>-		stream-&gt;timing.v_total * stream-&gt;timing.h_total - (uint64_t)1);</div><div class='del'>-	refresh_rate = div_u64(refresh_rate, stream-&gt;timing.v_total);</div><div class='del'>-	refresh_rate = div_u64(refresh_rate, stream-&gt;timing.h_total);</div><div class='del'>-</div><div class='del'>-	/* If there's any stream that fits the SubVP high refresh criteria,</div><div class='del'>-	 * we must return true. This is because cursor updates are asynchronous</div><div class='del'>-	 * with full updates, so we could transition into a SubVP config and</div><div class='del'>-	 * remain in HW cursor mode if there's no cursor update which will</div><div class='del'>-	 * then cause corruption.</div><div class='del'>-	 */</div><div class='del'>-	if ((refresh_rate &gt;= 120 &amp;&amp; refresh_rate &lt;= 175 &amp;&amp;</div><div class='del'>-			stream-&gt;timing.v_addressable &gt;= 1080 &amp;&amp;</div><div class='del'>-			stream-&gt;timing.v_addressable &lt;= 2160) &amp;&amp;</div><div class='del'>-			(dc-&gt;current_state-&gt;stream_count &gt; 1 ||</div><div class='del'>-			(dc-&gt;current_state-&gt;stream_count == 1 &amp;&amp; !stream-&gt;allow_freesync)))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static enum controller_dp_test_pattern convert_dp_to_controller_test_pattern(</div><div class='ctx'> 				enum dp_test_pattern test_pattern)</div><div class='ctx'> {</div><div class='hunk'>@@ -3937,6 +3911,10 @@ enum dc_status resource_map_pool_resources(</div><div class='ctx'> 		if (!dc-&gt;link_srv-&gt;dp_decide_link_settings(stream,</div><div class='ctx'> 				&amp;pipe_ctx-&gt;link_config.dp_link_settings))</div><div class='ctx'> 			return DC_FAIL_DP_LINK_BANDWIDTH;</div><div class='add'>+</div><div class='add'>+		dc-&gt;link_srv-&gt;dp_decide_tunnel_settings(stream,</div><div class='add'>+				&amp;pipe_ctx-&gt;link_config.dp_tunnel_settings);</div><div class='add'>+</div><div class='ctx'> 		if (dc-&gt;link_srv-&gt;dp_get_encoding_format(</div><div class='ctx'> 				&amp;pipe_ctx-&gt;link_config.dp_link_settings) == DP_128b_132b_ENCODING) {</div><div class='ctx'> 			pipe_ctx-&gt;stream_res.hpo_dp_stream_enc =</div><div class='hunk'>@@ -4259,6 +4237,11 @@ enum dc_status dc_validate_with_context(struct dc *dc,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* clear subvp cursor limitations */</div><div class='add'>+	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+		dc_state_set_stream_subvp_cursor_limit(context-&gt;streams[i], context, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	res = dc_validate_global_state(dc, context, fast_validate);</div><div class='ctx'> </div><div class='ctx'> 	/* calculate pixel rate divider after deciding pxiel clock &amp; odm combine  */</div><div class='hunk'>@@ -4385,8 +4368,7 @@ enum dc_status dc_validate_global_state(</div><div class='ctx'> 	result = resource_build_scaling_params_for_context(dc, new_ctx);</div><div class='ctx'> </div><div class='ctx'> 	if (result == DC_OK)</div><div class='del'>-		if (!dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, new_ctx, fast_validate))</div><div class='del'>-			result = DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+		result = dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, new_ctx, fast_validate);</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='hunk'>@@ -5538,23 +5520,17 @@ enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,</div><div class='ctx'> 	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool check_subvp_sw_cursor_fallback_req(const struct dc *dc, struct dc_stream_state *stream)</div><div class='add'>+struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> {</div><div class='del'>-	if (!dc-&gt;debug.disable_subvp_high_refresh &amp;&amp; is_subvp_high_refresh_candidate(stream))</div><div class='del'>-		return true;</div><div class='del'>-	if (dc-&gt;current_state-&gt;stream_count == 1 &amp;&amp; stream-&gt;timing.v_addressable &gt;= 2880 &amp;&amp;</div><div class='del'>-			((stream-&gt;timing.pix_clk_100hz * 100) / stream-&gt;timing.v_total / stream-&gt;timing.h_total) &lt; 120)</div><div class='del'>-		return true;</div><div class='del'>-	else if (dc-&gt;current_state-&gt;stream_count &gt; 1 &amp;&amp; stream-&gt;timing.v_addressable &gt;= 1080 &amp;&amp;</div><div class='del'>-			((stream-&gt;timing.pix_clk_100hz * 100) / stream-&gt;timing.v_total / stream-&gt;timing.h_total) &lt; 120)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='add'>+	return &amp;pipe_ctx-&gt;plane_res.scl_data.dscl_prog_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx)</div><div class='add'>+static bool resource_allocate_mcache(struct dc_state *context, const struct  dc_mcache_params *mcache_params)</div><div class='ctx'> {</div><div class='del'>-	return &amp;pipe_ctx-&gt;plane_res.scl_data.dscl_prog_data;</div><div class='add'>+	if (context-&gt;clk_mgr-&gt;ctx-&gt;dc-&gt;res_pool-&gt;funcs-&gt;program_mcache_pipe_config)</div><div class='add'>+		context-&gt;clk_mgr-&gt;ctx-&gt;dc-&gt;res_pool-&gt;funcs-&gt;program_mcache_pipe_config(context, mcache_params);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options)</div><div class='hunk'>@@ -5576,6 +5552,7 @@ void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuratio</div><div class='ctx'> 	dml2_options-&gt;callbacks.get_stream_status = &amp;dc_state_get_stream_status;</div><div class='ctx'> 	dml2_options-&gt;callbacks.get_stream_from_id = &amp;dc_state_get_stream_from_id;</div><div class='ctx'> 	dml2_options-&gt;callbacks.get_max_flickerless_instant_vtotal_increase = &amp;dc_stream_get_max_flickerless_instant_vtotal_increase;</div><div class='add'>+	dml2_options-&gt;callbacks.allocate_mcache = &amp;resource_allocate_mcache;</div><div class='ctx'> </div><div class='ctx'> 	dml2_options-&gt;svp_pstate.callbacks.dc = dc;</div><div class='ctx'> 	dml2_options-&gt;svp_pstate.callbacks.add_phantom_plane = &amp;dc_state_add_phantom_plane;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_state.c b/drivers/gpu/drm/amd/display/dc/core/dc_state.c<br/>index 1b2cce127981..4db7383720fd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_state.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_state.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_state.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/core/dc_state.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'>  * Authors: AMD</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='add'>+#include "dc_types.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "core_status.h"</div><div class='ctx'> #include "dc_state.h"</div><div class='hunk'>@@ -812,8 +813,12 @@ enum dc_status dc_state_add_phantom_stream(const struct dc *dc,</div><div class='ctx'> 	if (phantom_stream_status) {</div><div class='ctx'> 		phantom_stream_status-&gt;mall_stream_config.type = SUBVP_PHANTOM;</div><div class='ctx'> 		phantom_stream_status-&gt;mall_stream_config.paired_stream = main_stream;</div><div class='add'>+		phantom_stream_status-&gt;mall_stream_config.subvp_limit_cursor_size = false;</div><div class='add'>+		phantom_stream_status-&gt;mall_stream_config.cursor_size_limit_subvp = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dc_state_set_stream_subvp_cursor_limit(main_stream, state, true);</div><div class='add'>+</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -939,13 +944,20 @@ void dc_state_release_phantom_streams_and_planes(</div><div class='ctx'> 		const struct dc *dc,</div><div class='ctx'> 		struct dc_state *state)</div><div class='ctx'> {</div><div class='add'>+	unsigned int phantom_count;</div><div class='add'>+	struct dc_stream_state *phantom_streams[MAX_PHANTOM_PIPES];</div><div class='add'>+	struct dc_plane_state *phantom_planes[MAX_PHANTOM_PIPES];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; state-&gt;phantom_stream_count; i++)</div><div class='del'>-		dc_state_release_phantom_stream(dc, state, state-&gt;phantom_streams[i]);</div><div class='add'>+	phantom_count = state-&gt;phantom_stream_count;</div><div class='add'>+	memcpy(phantom_streams, state-&gt;phantom_streams, sizeof(struct dc_stream_state *) * MAX_PHANTOM_PIPES);</div><div class='add'>+	for (i = 0; i &lt; phantom_count; i++)</div><div class='add'>+		dc_state_release_phantom_stream(dc, state, phantom_streams[i]);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; state-&gt;phantom_plane_count; i++)</div><div class='del'>-		dc_state_release_phantom_plane(dc, state, state-&gt;phantom_planes[i]);</div><div class='add'>+	phantom_count = state-&gt;phantom_plane_count;</div><div class='add'>+	memcpy(phantom_planes, state-&gt;phantom_planes, sizeof(struct dc_plane_state *) * MAX_PHANTOM_PIPES);</div><div class='add'>+	for (i = 0; i &lt; phantom_count; i++)</div><div class='add'>+		dc_state_release_phantom_plane(dc, state, phantom_planes[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct dc_stream_state *dc_state_get_stream_from_id(const struct dc_state *state, unsigned int id)</div><div class='hunk'>@@ -977,3 +989,94 @@ bool dc_state_is_fams2_in_use(</div><div class='ctx'> </div><div class='ctx'> 	return is_fams2_in_use;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void dc_state_set_stream_subvp_cursor_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		bool limit)</div><div class='add'>+{</div><div class='add'>+	struct dc_stream_status *stream_status;</div><div class='add'>+</div><div class='add'>+	stream_status = dc_state_get_stream_status(state, stream);</div><div class='add'>+</div><div class='add'>+	if (stream_status) {</div><div class='add'>+		stream_status-&gt;mall_stream_config.subvp_limit_cursor_size = limit;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dc_state_get_stream_subvp_cursor_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state)</div><div class='add'>+{</div><div class='add'>+	bool limit = false;</div><div class='add'>+</div><div class='add'>+	struct dc_stream_status *stream_status;</div><div class='add'>+</div><div class='add'>+	stream_status = dc_state_get_stream_status(state, stream);</div><div class='add'>+</div><div class='add'>+	if (stream_status) {</div><div class='add'>+		limit = stream_status-&gt;mall_stream_config.subvp_limit_cursor_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return limit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dc_state_set_stream_cursor_subvp_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		bool limit)</div><div class='add'>+{</div><div class='add'>+	struct dc_stream_status *stream_status;</div><div class='add'>+</div><div class='add'>+	stream_status = dc_state_get_stream_status(state, stream);</div><div class='add'>+</div><div class='add'>+	if (stream_status) {</div><div class='add'>+		stream_status-&gt;mall_stream_config.cursor_size_limit_subvp = limit;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dc_state_get_stream_cursor_subvp_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state)</div><div class='add'>+{</div><div class='add'>+	bool limit = false;</div><div class='add'>+</div><div class='add'>+	struct dc_stream_status *stream_status;</div><div class='add'>+</div><div class='add'>+	stream_status = dc_state_get_stream_status(state, stream);</div><div class='add'>+</div><div class='add'>+	if (stream_status) {</div><div class='add'>+		limit = stream_status-&gt;mall_stream_config.cursor_size_limit_subvp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return limit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dc_state_can_clear_stream_cursor_subvp_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state)</div><div class='add'>+{</div><div class='add'>+	bool can_clear_limit = false;</div><div class='add'>+</div><div class='add'>+	struct dc_stream_status *stream_status;</div><div class='add'>+</div><div class='add'>+	stream_status = dc_state_get_stream_status(state, stream);</div><div class='add'>+</div><div class='add'>+	if (stream_status) {</div><div class='add'>+		can_clear_limit = dc_state_get_stream_cursor_subvp_limit(stream, state) &amp;&amp;</div><div class='add'>+				(stream_status-&gt;mall_stream_config.type == SUBVP_PHANTOM ||</div><div class='add'>+				stream-&gt;hw_cursor_req ||</div><div class='add'>+				!stream_status-&gt;mall_stream_config.subvp_limit_cursor_size ||</div><div class='add'>+				!stream-&gt;cursor_position.enable ||</div><div class='add'>+				dc_stream_check_cursor_attributes(stream, state, &amp;stream-&gt;cursor_attributes));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return can_clear_limit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dc_state_is_subvp_in_use(struct dc_state *state)</div><div class='add'>+{</div><div class='add'>+	uint32_t i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; state-&gt;stream_count; i++) {</div><div class='add'>+		if (dc_state_get_stream_subvp_type(state, state-&gt;streams[i]) != SUBVP_NONE)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c<br/>index 0478dd856d8c..b883fb24fa12 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_stream.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_stream.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_stream.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/core/dc_stream.c</a></div><div class='hunk'>@@ -265,13 +265,16 @@ void program_cursor_attributes(</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address</div><div class='add'>+ * dc_stream_check_cursor_attributes() - Check validitity of cursor attributes and surface address</div><div class='ctx'>  */</div><div class='del'>-bool dc_stream_set_cursor_attributes(</div><div class='del'>-	struct dc_stream_state *stream,</div><div class='add'>+bool dc_stream_check_cursor_attributes(</div><div class='add'>+	const struct dc_stream_state *stream,</div><div class='add'>+	struct dc_state *state,</div><div class='ctx'> 	const struct dc_cursor_attributes *attributes)</div><div class='ctx'> {</div><div class='del'>-	struct dc  *dc;</div><div class='add'>+	const struct dc *dc;</div><div class='add'>+</div><div class='add'>+	unsigned int max_cursor_size;</div><div class='ctx'> </div><div class='ctx'> 	if (NULL == stream) {</div><div class='ctx'> 		dm_error("DC: dc_stream is NULL!\n");</div><div class='hunk'>@@ -289,24 +292,38 @@ bool dc_stream_set_cursor_attributes(</div><div class='ctx'> </div><div class='ctx'> 	dc = stream-&gt;ctx-&gt;dc;</div><div class='ctx'> </div><div class='del'>-	/* SubVP is not compatible with HW cursor larger than 64 x 64 x 4.</div><div class='del'>-	 * Therefore, if cursor is greater than 64 x 64 x 4, fallback to SW cursor in the following case:</div><div class='del'>-	 * 1. If the config is a candidate for SubVP high refresh (both single an dual display configs)</div><div class='del'>-	 * 2. If not subvp high refresh, for single display cases, if resolution is &gt;= 5K and refresh rate &lt; 120hz</div><div class='del'>-	 * 3. If not subvp high refresh, for multi display cases, if resolution is &gt;= 4K and refresh rate &lt; 120hz</div><div class='add'>+	/* SubVP is not compatible with HW cursor larger than what can fit in cursor SRAM.</div><div class='add'>+	 * Therefore, if cursor is greater than this, fallback to SW cursor.</div><div class='ctx'> 	 */</div><div class='del'>-	if (dc-&gt;debug.allow_sw_cursor_fallback &amp;&amp;</div><div class='del'>-		attributes-&gt;height * attributes-&gt;width * 4 &gt; 16384 &amp;&amp;</div><div class='del'>-		!stream-&gt;hw_cursor_req) {</div><div class='del'>-		if (check_subvp_sw_cursor_fallback_req(dc, stream))</div><div class='add'>+	if (dc-&gt;debug.allow_sw_cursor_fallback &amp;&amp; dc-&gt;res_pool-&gt;funcs-&gt;get_max_hw_cursor_size) {</div><div class='add'>+		max_cursor_size = dc-&gt;res_pool-&gt;funcs-&gt;get_max_hw_cursor_size(dc, state, stream);</div><div class='add'>+		max_cursor_size = max_cursor_size * max_cursor_size * 4;</div><div class='add'>+</div><div class='add'>+		if (attributes-&gt;height * attributes-&gt;width * 4 &gt; max_cursor_size) {</div><div class='ctx'> 			return false;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stream-&gt;cursor_attributes = *attributes;</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address</div><div class='add'>+ */</div><div class='add'>+bool dc_stream_set_cursor_attributes(</div><div class='add'>+	struct dc_stream_state *stream,</div><div class='add'>+	const struct dc_cursor_attributes *attributes)</div><div class='add'>+{</div><div class='add'>+	bool result = false;</div><div class='add'>+</div><div class='add'>+	if (dc_stream_check_cursor_attributes(stream, stream-&gt;ctx-&gt;dc-&gt;current_state, attributes)) {</div><div class='add'>+		stream-&gt;cursor_attributes = *attributes;</div><div class='add'>+		result = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool dc_stream_program_cursor_attributes(</div><div class='ctx'> 	struct dc_stream_state *stream,</div><div class='ctx'> 	const struct dc_cursor_attributes *attributes)</div><div class='hunk'>@@ -552,6 +569,14 @@ bool dc_stream_fc_disable_writeback(struct dc *dc,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * dc_stream_remove_writeback() - Disables writeback and removes writeback info.</div><div class='add'>+ * @dc: Display core control structure.</div><div class='add'>+ * @stream: Display core stream state.</div><div class='add'>+ * @dwb_pipe_inst: Display writeback pipe.</div><div class='add'>+ *</div><div class='add'>+ * Return: returns true on success, false otherwise.</div><div class='add'>+ */</div><div class='ctx'> bool dc_stream_remove_writeback(struct dc *dc,</div><div class='ctx'> 		struct dc_stream_state *stream,</div><div class='ctx'> 		uint32_t dwb_pipe_inst)</div><div class='hunk'>@@ -1109,3 +1134,26 @@ unsigned int dc_stream_get_max_flickerless_instant_vtotal_increase(struct dc_str</div><div class='ctx'> </div><div class='ctx'> 	return dc_stream_get_max_flickerless_instant_vtotal_delta(stream, is_gaming, false);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+	bool is_limit_pending = false;</div><div class='add'>+</div><div class='add'>+	if (dc-&gt;current_state)</div><div class='add'>+		is_limit_pending = dc_state_get_stream_cursor_subvp_limit(stream, dc-&gt;current_state);</div><div class='add'>+</div><div class='add'>+	return is_limit_pending;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+	bool can_clear_limit = false;</div><div class='add'>+</div><div class='add'>+	if (dc-&gt;current_state)</div><div class='add'>+		can_clear_limit = dc_state_get_stream_cursor_subvp_limit(stream, dc-&gt;current_state) &amp;&amp;</div><div class='add'>+				(stream-&gt;hw_cursor_req ||</div><div class='add'>+				!stream-&gt;cursor_position.enable ||</div><div class='add'>+				dc_stream_check_cursor_attributes(stream, dc-&gt;current_state, &amp;stream-&gt;cursor_attributes));</div><div class='add'>+</div><div class='add'>+	return can_clear_limit;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c<br/>index e6fcc21bb9bc..922f23557f5d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_surface.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/core/dc_surface.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/core/dc_surface.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/core/dc_surface.c</a></div><div class='hunk'>@@ -109,7 +109,8 @@ struct dc_plane_state *dc_create_plane_state(const struct dc *dc)</div><div class='ctx'>  *****************************************************************************</div><div class='ctx'>  */</div><div class='ctx'> const struct dc_plane_status *dc_plane_get_status(</div><div class='del'>-		const struct dc_plane_state *plane_state)</div><div class='add'>+		const struct dc_plane_state *plane_state,</div><div class='add'>+		union dc_plane_status_update_flags flags)</div><div class='ctx'> {</div><div class='ctx'> 	const struct dc_plane_status *plane_status;</div><div class='ctx'> 	struct dc  *dc;</div><div class='hunk'>@@ -136,7 +137,7 @@ const struct dc_plane_status *dc_plane_get_status(</div><div class='ctx'> 		if (pipe_ctx-&gt;plane_state != plane_state)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (pipe_ctx-&gt;plane_state)</div><div class='add'>+		if (pipe_ctx-&gt;plane_state &amp;&amp; flags.bits.address)</div><div class='ctx'> 			pipe_ctx-&gt;plane_state-&gt;status.is_flip_pending = false;</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='hunk'>@@ -151,7 +152,8 @@ const struct dc_plane_status *dc_plane_get_status(</div><div class='ctx'> 		if (pipe_ctx-&gt;plane_state != plane_state)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		dc-&gt;hwss.update_pending_status(pipe_ctx);</div><div class='add'>+		if (flags.bits.address)</div><div class='add'>+			dc-&gt;hwss.update_pending_status(pipe_ctx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return plane_status;</div><div class='hunk'>@@ -294,3 +296,17 @@ void dc_plane_force_dcc_and_tiling_disable(struct dc_plane_state *plane_state,</div><div class='ctx'> 			dc-&gt;hwss.clear_surface_dcc_and_tiling(pipe_ctx, plane_state, clear_tiling);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void dc_plane_copy_config(struct dc_plane_state *dst, const struct dc_plane_state *src)</div><div class='add'>+{</div><div class='add'>+	struct kref temp_refcount;</div><div class='add'>+</div><div class='add'>+	/* backup persistent info */</div><div class='add'>+	memcpy(&amp;temp_refcount, &amp;dst-&gt;refcount, sizeof(struct kref));</div><div class='add'>+</div><div class='add'>+	/* copy all configuration information */</div><div class='add'>+	memcpy(dst, src, sizeof(struct dc_plane_state));</div><div class='add'>+</div><div class='add'>+	/* restore persistent info */</div><div class='add'>+	memcpy(&amp;dst-&gt;refcount, &amp;temp_refcount, sizeof(struct kref));</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h<br/>index 7c2ee0526926..1d917be36fc4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc.h</a></div><div class='hunk'>@@ -53,7 +53,7 @@ struct aux_payload;</div><div class='ctx'> struct set_config_cmd_payload;</div><div class='ctx'> struct dmub_notification;</div><div class='ctx'> </div><div class='del'>-#define DC_VER "3.2.325"</div><div class='add'>+#define DC_VER "3.2.334"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC</div><div class='hunk'>@@ -249,6 +249,7 @@ struct dc_caps {</div><div class='ctx'> 	uint32_t i2c_speed_in_khz_hdcp;</div><div class='ctx'> 	uint32_t dmdata_alloc_size;</div><div class='ctx'> 	unsigned int max_cursor_size;</div><div class='add'>+	unsigned int max_buffered_cursor_size;</div><div class='ctx'> 	unsigned int max_video_width;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * max video plane width that can be safely assumed to be always</div><div class='hunk'>@@ -282,6 +283,7 @@ struct dc_caps {</div><div class='ctx'> 	bool edp_dsc_support;</div><div class='ctx'> 	bool vbios_lttpr_aware;</div><div class='ctx'> 	bool vbios_lttpr_enable;</div><div class='add'>+	bool fused_io_supported;</div><div class='ctx'> 	uint32_t max_otg_num;</div><div class='ctx'> 	uint32_t max_cab_allocation_bytes;</div><div class='ctx'> 	uint32_t cache_line_size;</div><div class='hunk'>@@ -447,6 +449,7 @@ struct dc_config {</div><div class='ctx'> 	bool enable_windowed_mpo_odm;</div><div class='ctx'> 	bool forceHBR2CP2520; // Used for switching between test patterns TPS4 and CP2520</div><div class='ctx'> 	uint32_t allow_edp_hotplug_detection;</div><div class='add'>+	bool skip_riommu_prefetch_wa;</div><div class='ctx'> 	bool clamp_min_dcfclk;</div><div class='ctx'> 	uint64_t vblank_alignment_dto_params;</div><div class='ctx'> 	uint8_t  vblank_alignment_max_frame_time_diff;</div><div class='hunk'>@@ -496,6 +499,7 @@ enum visual_confirm {</div><div class='ctx'> 	VISUAL_CONFIRM_HW_CURSOR = 20,</div><div class='ctx'> 	VISUAL_CONFIRM_VABC = 21,</div><div class='ctx'> 	VISUAL_CONFIRM_DCC = 22,</div><div class='add'>+	VISUAL_CONFIRM_EXPLICIT = 0x80000000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum dc_psr_power_opts {</div><div class='hunk'>@@ -902,6 +906,9 @@ struct dc_debug_options {</div><div class='ctx'> 	bool voltage_align_fclk;</div><div class='ctx'> 	bool disable_min_fclk;</div><div class='ctx'> </div><div class='add'>+	bool hdcp_lc_force_fw_enable;</div><div class='add'>+	bool hdcp_lc_enable_sw_fallback;</div><div class='add'>+</div><div class='ctx'> 	bool disable_dfs_bypass;</div><div class='ctx'> 	bool disable_dpp_power_gate;</div><div class='ctx'> 	bool disable_hubp_power_gate;</div><div class='hunk'>@@ -1418,6 +1425,171 @@ struct dc_scratch_space {</div><div class='ctx'> 	struct dc_stream_state stream_state;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * A link contains one or more sinks and their connected status.</div><div class='add'>+ * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.</div><div class='add'>+ */</div><div class='add'>+ struct dc_link {</div><div class='add'>+	struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];</div><div class='add'>+	unsigned int sink_count;</div><div class='add'>+	struct dc_sink *local_sink;</div><div class='add'>+	unsigned int link_index;</div><div class='add'>+	enum dc_connection_type type;</div><div class='add'>+	enum signal_type connector_signal;</div><div class='add'>+	enum dc_irq_source irq_source_hpd;</div><div class='add'>+	enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */</div><div class='add'>+	enum dc_irq_source irq_source_read_request;/* Read Request */</div><div class='add'>+</div><div class='add'>+	bool is_hpd_filter_disabled;</div><div class='add'>+	bool dp_ss_off;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @link_state_valid:</div><div class='add'>+	 *</div><div class='add'>+	 * If there is no link and local sink, this variable should be set to</div><div class='add'>+	 * false. Otherwise, it should be set to true; usually, the function</div><div class='add'>+	 * core_link_enable_stream sets this field to true.</div><div class='add'>+	 */</div><div class='add'>+	bool link_state_valid;</div><div class='add'>+	bool aux_access_disabled;</div><div class='add'>+	bool sync_lt_in_progress;</div><div class='add'>+	bool skip_stream_reenable;</div><div class='add'>+	bool is_internal_display;</div><div class='add'>+	/** @todo Rename. Flag an endpoint as having a programmable mapping to a DIG encoder. */</div><div class='add'>+	bool is_dig_mapping_flexible;</div><div class='add'>+	bool hpd_status; /* HPD status of link without physical HPD pin. */</div><div class='add'>+	bool is_hpd_pending; /* Indicates a new received hpd */</div><div class='add'>+</div><div class='add'>+	/* USB4 DPIA links skip verifying link cap, instead performing the fallback method</div><div class='add'>+	 * for every link training. This is incompatible with DP LL compliance automation,</div><div class='add'>+	 * which expects the same link settings to be used every retry on a link loss.</div><div class='add'>+	 * This flag is used to skip the fallback when link loss occurs during automation.</div><div class='add'>+	 */</div><div class='add'>+	bool skip_fallback_on_link_loss;</div><div class='add'>+</div><div class='add'>+	bool edp_sink_present;</div><div class='add'>+</div><div class='add'>+	struct dp_trace dp_trace;</div><div class='add'>+</div><div class='add'>+	/* caps is the same as reported_link_cap. link_traing use</div><div class='add'>+	 * reported_link_cap. Will clean up.  TODO</div><div class='add'>+	 */</div><div class='add'>+	struct dc_link_settings reported_link_cap;</div><div class='add'>+	struct dc_link_settings verified_link_cap;</div><div class='add'>+	struct dc_link_settings cur_link_settings;</div><div class='add'>+	struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];</div><div class='add'>+	struct dc_link_settings preferred_link_setting;</div><div class='add'>+	/* preferred_training_settings are override values that</div><div class='add'>+	 * come from DM. DM is responsible for the memory</div><div class='add'>+	 * management of the override pointers.</div><div class='add'>+	 */</div><div class='add'>+	struct dc_link_training_overrides preferred_training_settings;</div><div class='add'>+	struct dp_audio_test_data audio_test_data;</div><div class='add'>+</div><div class='add'>+	uint8_t ddc_hw_inst;</div><div class='add'>+</div><div class='add'>+	uint8_t hpd_src;</div><div class='add'>+</div><div class='add'>+	uint8_t link_enc_hw_inst;</div><div class='add'>+	/* DIG link encoder ID. Used as index in link encoder resource pool.</div><div class='add'>+	 * For links with fixed mapping to DIG, this is not changed after dc_link</div><div class='add'>+	 * object creation.</div><div class='add'>+	 */</div><div class='add'>+	enum engine_id eng_id;</div><div class='add'>+	enum engine_id dpia_preferred_eng_id;</div><div class='add'>+</div><div class='add'>+	bool test_pattern_enabled;</div><div class='add'>+	/* Pending/Current test pattern are only used to perform and track</div><div class='add'>+	 * FIXED_VS retimer test pattern/lane adjustment override state.</div><div class='add'>+	 * Pending allows link HWSS to differentiate PHY vs non-PHY pattern,</div><div class='add'>+	 * to perform specific lane adjust overrides before setting certain</div><div class='add'>+	 * PHY test patterns. In cases when lane adjust and set test pattern</div><div class='add'>+	 * calls are not performed atomically (i.e. performing link training),</div><div class='add'>+	 * pending_test_pattern will be invalid or contain a non-PHY test pattern</div><div class='add'>+	 * and current_test_pattern will contain required context for any future</div><div class='add'>+	 * set pattern/set lane adjust to transition between override state(s).</div><div class='add'>+	 * */</div><div class='add'>+	enum dp_test_pattern current_test_pattern;</div><div class='add'>+	enum dp_test_pattern pending_test_pattern;</div><div class='add'>+</div><div class='add'>+	union compliance_test_state compliance_test_state;</div><div class='add'>+</div><div class='add'>+	void *priv;</div><div class='add'>+</div><div class='add'>+	struct ddc_service *ddc;</div><div class='add'>+</div><div class='add'>+	enum dp_panel_mode panel_mode;</div><div class='add'>+	bool aux_mode;</div><div class='add'>+</div><div class='add'>+	/* Private to DC core */</div><div class='add'>+</div><div class='add'>+	const struct dc *dc;</div><div class='add'>+</div><div class='add'>+	struct dc_context *ctx;</div><div class='add'>+</div><div class='add'>+	struct panel_cntl *panel_cntl;</div><div class='add'>+	struct link_encoder *link_enc;</div><div class='add'>+	struct graphics_object_id link_id;</div><div class='add'>+	/* Endpoint type distinguishes display endpoints which do not have entries</div><div class='add'>+	 * in the BIOS connector table from those that do. Helps when tracking link</div><div class='add'>+	 * encoder to display endpoint assignments.</div><div class='add'>+	 */</div><div class='add'>+	enum display_endpoint_type ep_type;</div><div class='add'>+	union ddi_channel_mapping ddi_channel_mapping;</div><div class='add'>+	struct connector_device_tag_info device_tag;</div><div class='add'>+	struct dpcd_caps dpcd_caps;</div><div class='add'>+	uint32_t dongle_max_pix_clk;</div><div class='add'>+	unsigned short chip_caps;</div><div class='add'>+	unsigned int dpcd_sink_count;</div><div class='add'>+	struct hdcp_caps hdcp_caps;</div><div class='add'>+	enum edp_revision edp_revision;</div><div class='add'>+	union dpcd_sink_ext_caps dpcd_sink_ext_caps;</div><div class='add'>+</div><div class='add'>+	struct psr_settings psr_settings;</div><div class='add'>+	struct replay_settings replay_settings;</div><div class='add'>+</div><div class='add'>+	/* Drive settings read from integrated info table */</div><div class='add'>+	struct dc_lane_settings bios_forced_drive_settings;</div><div class='add'>+</div><div class='add'>+	/* Vendor specific LTTPR workaround variables */</div><div class='add'>+	uint8_t vendor_specific_lttpr_link_rate_wa;</div><div class='add'>+	bool apply_vendor_specific_lttpr_link_rate_wa;</div><div class='add'>+</div><div class='add'>+	/* MST record stream using this link */</div><div class='add'>+	struct link_flags {</div><div class='add'>+		bool dp_keep_receiver_powered;</div><div class='add'>+		bool dp_skip_DID2;</div><div class='add'>+		bool dp_skip_reset_segment;</div><div class='add'>+		bool dp_skip_fs_144hz;</div><div class='add'>+		bool dp_mot_reset_segment;</div><div class='add'>+		/* Some USB4 docks do not handle turning off MST DSC once it has been enabled. */</div><div class='add'>+		bool dpia_mst_dsc_always_on;</div><div class='add'>+		/* Forced DPIA into TBT3 compatibility mode. */</div><div class='add'>+		bool dpia_forced_tbt3_mode;</div><div class='add'>+		bool dongle_mode_timing_override;</div><div class='add'>+		bool blank_stream_on_ocs_change;</div><div class='add'>+		bool read_dpcd204h_on_irq_hpd;</div><div class='add'>+		bool force_dp_ffe_preset;</div><div class='add'>+	} wa_flags;</div><div class='add'>+	union dc_dp_ffe_preset forced_dp_ffe_preset;</div><div class='add'>+	struct link_mst_stream_allocation_table mst_stream_alloc_table;</div><div class='add'>+</div><div class='add'>+	struct dc_link_status link_status;</div><div class='add'>+	struct dprx_states dprx_states;</div><div class='add'>+</div><div class='add'>+	struct gpio *hpd_gpio;</div><div class='add'>+	enum dc_link_fec_state fec_state;</div><div class='add'>+	bool link_powered_externally;	// Used to bypass hardware sequencing delays when panel is powered down forcibly</div><div class='add'>+</div><div class='add'>+	struct dc_panel_config panel_config;</div><div class='add'>+	struct phy_state phy_state;</div><div class='add'>+	uint32_t phy_transition_bitmask;</div><div class='add'>+	// BW ALLOCATON USB4 ONLY</div><div class='add'>+	struct dc_dpia_bw_alloc dpia_bw_alloc_config;</div><div class='add'>+	bool skip_implict_edp_power_control;</div><div class='add'>+	enum backlight_control_type backlight_control_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct dc {</div><div class='ctx'> 	struct dc_debug_options debug;</div><div class='ctx'> 	struct dc_versions versions;</div><div class='hunk'>@@ -1485,6 +1657,7 @@ struct dc {</div><div class='ctx'> 		struct dc_scratch_space current_state;</div><div class='ctx'> 		struct dc_scratch_space new_state;</div><div class='ctx'> 		struct dc_stream_state temp_stream; // Used so we don't need to allocate stream on the stack</div><div class='add'>+		struct dc_link temp_link;</div><div class='ctx'> 		bool pipes_to_unlock_first[MAX_PIPES]; /* Any of the pipes indicated here should be unlocked first */</div><div class='ctx'> 	} scratch;</div><div class='ctx'> </div><div class='hunk'>@@ -1651,170 +1824,6 @@ uint32_t dc_bandwidth_in_kbps_from_timing(</div><div class='ctx'> 		const enum dc_link_encoding_format link_encoding);</div><div class='ctx'> </div><div class='ctx'> /* Link Interfaces */</div><div class='del'>-/*</div><div class='del'>- * A link contains one or more sinks and their connected status.</div><div class='del'>- * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.</div><div class='del'>- */</div><div class='del'>-struct dc_link {</div><div class='del'>-	struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];</div><div class='del'>-	unsigned int sink_count;</div><div class='del'>-	struct dc_sink *local_sink;</div><div class='del'>-	unsigned int link_index;</div><div class='del'>-	enum dc_connection_type type;</div><div class='del'>-	enum signal_type connector_signal;</div><div class='del'>-	enum dc_irq_source irq_source_hpd;</div><div class='del'>-	enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */</div><div class='del'>-</div><div class='del'>-	bool is_hpd_filter_disabled;</div><div class='del'>-	bool dp_ss_off;</div><div class='del'>-</div><div class='del'>-	/**</div><div class='del'>-	 * @link_state_valid:</div><div class='del'>-	 *</div><div class='del'>-	 * If there is no link and local sink, this variable should be set to</div><div class='del'>-	 * false. Otherwise, it should be set to true; usually, the function</div><div class='del'>-	 * core_link_enable_stream sets this field to true.</div><div class='del'>-	 */</div><div class='del'>-	bool link_state_valid;</div><div class='del'>-	bool aux_access_disabled;</div><div class='del'>-	bool sync_lt_in_progress;</div><div class='del'>-	bool skip_stream_reenable;</div><div class='del'>-	bool is_internal_display;</div><div class='del'>-	/** @todo Rename. Flag an endpoint as having a programmable mapping to a DIG encoder. */</div><div class='del'>-	bool is_dig_mapping_flexible;</div><div class='del'>-	bool hpd_status; /* HPD status of link without physical HPD pin. */</div><div class='del'>-	bool is_hpd_pending; /* Indicates a new received hpd */</div><div class='del'>-</div><div class='del'>-	/* USB4 DPIA links skip verifying link cap, instead performing the fallback method</div><div class='del'>-	 * for every link training. This is incompatible with DP LL compliance automation,</div><div class='del'>-	 * which expects the same link settings to be used every retry on a link loss.</div><div class='del'>-	 * This flag is used to skip the fallback when link loss occurs during automation.</div><div class='del'>-	 */</div><div class='del'>-	bool skip_fallback_on_link_loss;</div><div class='del'>-</div><div class='del'>-	bool edp_sink_present;</div><div class='del'>-</div><div class='del'>-	struct dp_trace dp_trace;</div><div class='del'>-</div><div class='del'>-	/* caps is the same as reported_link_cap. link_traing use</div><div class='del'>-	 * reported_link_cap. Will clean up.  TODO</div><div class='del'>-	 */</div><div class='del'>-	struct dc_link_settings reported_link_cap;</div><div class='del'>-	struct dc_link_settings verified_link_cap;</div><div class='del'>-	struct dc_link_settings cur_link_settings;</div><div class='del'>-	struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];</div><div class='del'>-	struct dc_link_settings preferred_link_setting;</div><div class='del'>-	/* preferred_training_settings are override values that</div><div class='del'>-	 * come from DM. DM is responsible for the memory</div><div class='del'>-	 * management of the override pointers.</div><div class='del'>-	 */</div><div class='del'>-	struct dc_link_training_overrides preferred_training_settings;</div><div class='del'>-	struct dp_audio_test_data audio_test_data;</div><div class='del'>-</div><div class='del'>-	uint8_t ddc_hw_inst;</div><div class='del'>-</div><div class='del'>-	uint8_t hpd_src;</div><div class='del'>-</div><div class='del'>-	uint8_t link_enc_hw_inst;</div><div class='del'>-	/* DIG link encoder ID. Used as index in link encoder resource pool.</div><div class='del'>-	 * For links with fixed mapping to DIG, this is not changed after dc_link</div><div class='del'>-	 * object creation.</div><div class='del'>-	 */</div><div class='del'>-	enum engine_id eng_id;</div><div class='del'>-	enum engine_id dpia_preferred_eng_id;</div><div class='del'>-</div><div class='del'>-	bool test_pattern_enabled;</div><div class='del'>-	/* Pending/Current test pattern are only used to perform and track</div><div class='del'>-	 * FIXED_VS retimer test pattern/lane adjustment override state.</div><div class='del'>-	 * Pending allows link HWSS to differentiate PHY vs non-PHY pattern,</div><div class='del'>-	 * to perform specific lane adjust overrides before setting certain</div><div class='del'>-	 * PHY test patterns. In cases when lane adjust and set test pattern</div><div class='del'>-	 * calls are not performed atomically (i.e. performing link training),</div><div class='del'>-	 * pending_test_pattern will be invalid or contain a non-PHY test pattern</div><div class='del'>-	 * and current_test_pattern will contain required context for any future</div><div class='del'>-	 * set pattern/set lane adjust to transition between override state(s).</div><div class='del'>-	 * */</div><div class='del'>-	enum dp_test_pattern current_test_pattern;</div><div class='del'>-	enum dp_test_pattern pending_test_pattern;</div><div class='del'>-</div><div class='del'>-	union compliance_test_state compliance_test_state;</div><div class='del'>-</div><div class='del'>-	void *priv;</div><div class='del'>-</div><div class='del'>-	struct ddc_service *ddc;</div><div class='del'>-</div><div class='del'>-	enum dp_panel_mode panel_mode;</div><div class='del'>-	bool aux_mode;</div><div class='del'>-</div><div class='del'>-	/* Private to DC core */</div><div class='del'>-</div><div class='del'>-	const struct dc *dc;</div><div class='del'>-</div><div class='del'>-	struct dc_context *ctx;</div><div class='del'>-</div><div class='del'>-	struct panel_cntl *panel_cntl;</div><div class='del'>-	struct link_encoder *link_enc;</div><div class='del'>-	struct graphics_object_id link_id;</div><div class='del'>-	/* Endpoint type distinguishes display endpoints which do not have entries</div><div class='del'>-	 * in the BIOS connector table from those that do. Helps when tracking link</div><div class='del'>-	 * encoder to display endpoint assignments.</div><div class='del'>-	 */</div><div class='del'>-	enum display_endpoint_type ep_type;</div><div class='del'>-	union ddi_channel_mapping ddi_channel_mapping;</div><div class='del'>-	struct connector_device_tag_info device_tag;</div><div class='del'>-	struct dpcd_caps dpcd_caps;</div><div class='del'>-	uint32_t dongle_max_pix_clk;</div><div class='del'>-	unsigned short chip_caps;</div><div class='del'>-	unsigned int dpcd_sink_count;</div><div class='del'>-	struct hdcp_caps hdcp_caps;</div><div class='del'>-	enum edp_revision edp_revision;</div><div class='del'>-	union dpcd_sink_ext_caps dpcd_sink_ext_caps;</div><div class='del'>-</div><div class='del'>-	struct psr_settings psr_settings;</div><div class='del'>-	struct replay_settings replay_settings;</div><div class='del'>-</div><div class='del'>-	/* Drive settings read from integrated info table */</div><div class='del'>-	struct dc_lane_settings bios_forced_drive_settings;</div><div class='del'>-</div><div class='del'>-	/* Vendor specific LTTPR workaround variables */</div><div class='del'>-	uint8_t vendor_specific_lttpr_link_rate_wa;</div><div class='del'>-	bool apply_vendor_specific_lttpr_link_rate_wa;</div><div class='del'>-</div><div class='del'>-	/* MST record stream using this link */</div><div class='del'>-	struct link_flags {</div><div class='del'>-		bool dp_keep_receiver_powered;</div><div class='del'>-		bool dp_skip_DID2;</div><div class='del'>-		bool dp_skip_reset_segment;</div><div class='del'>-		bool dp_skip_fs_144hz;</div><div class='del'>-		bool dp_mot_reset_segment;</div><div class='del'>-		/* Some USB4 docks do not handle turning off MST DSC once it has been enabled. */</div><div class='del'>-		bool dpia_mst_dsc_always_on;</div><div class='del'>-		/* Forced DPIA into TBT3 compatibility mode. */</div><div class='del'>-		bool dpia_forced_tbt3_mode;</div><div class='del'>-		bool dongle_mode_timing_override;</div><div class='del'>-		bool blank_stream_on_ocs_change;</div><div class='del'>-		bool read_dpcd204h_on_irq_hpd;</div><div class='del'>-		bool force_dp_ffe_preset;</div><div class='del'>-	} wa_flags;</div><div class='del'>-	union dc_dp_ffe_preset forced_dp_ffe_preset;</div><div class='del'>-	struct link_mst_stream_allocation_table mst_stream_alloc_table;</div><div class='del'>-</div><div class='del'>-	struct dc_link_status link_status;</div><div class='del'>-	struct dprx_states dprx_states;</div><div class='del'>-</div><div class='del'>-	struct gpio *hpd_gpio;</div><div class='del'>-	enum dc_link_fec_state fec_state;</div><div class='del'>-	bool link_powered_externally;	// Used to bypass hardware sequencing delays when panel is powered down forcibly</div><div class='del'>-</div><div class='del'>-	struct dc_panel_config panel_config;</div><div class='del'>-	struct phy_state phy_state;</div><div class='del'>-	uint32_t phy_transition_bitmask;</div><div class='del'>-	// BW ALLOCATON USB4 ONLY</div><div class='del'>-	struct dc_dpia_bw_alloc dpia_bw_alloc_config;</div><div class='del'>-	bool skip_implict_edp_power_control;</div><div class='del'>-	enum backlight_control_type backlight_control_type;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Return an enumerated dc_link.</div><div class='ctx'>  * dc_link order is constant and determined at</div><div class='ctx'>  * boot time.  They cannot be created or destroyed.</div><div class='hunk'>@@ -2589,10 +2598,18 @@ unsigned int dc_get_det_buffer_size_from_state(const struct dc_state *context);</div><div class='ctx'> /* DSC Interfaces */</div><div class='ctx'> #include "dc_dsc.h"</div><div class='ctx'> </div><div class='add'>+void dc_get_visual_confirm_for_stream(</div><div class='add'>+	struct dc *dc,</div><div class='add'>+	struct dc_stream_state *stream_state,</div><div class='add'>+	struct tg_color *color);</div><div class='add'>+</div><div class='ctx'> /* Disable acc mode Interfaces */</div><div class='ctx'> void dc_disable_accelerated_mode(struct dc *dc);</div><div class='ctx'> </div><div class='ctx'> bool dc_is_timing_changed(struct dc_stream_state *cur_stream,</div><div class='ctx'> 		       struct dc_stream_state *new_stream);</div><div class='ctx'> </div><div class='add'>+bool dc_is_cursor_limit_pending(struct dc *dc);</div><div class='add'>+bool dc_can_clear_cursor_limit(struct dc *dc);</div><div class='add'>+</div><div class='ctx'> #endif /* DC_INTERFACE_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c<br/>index 614e03bfd598..afbcf866520e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> </div><div class='ctx'> #define CTX dc_dmub_srv-&gt;ctx</div><div class='ctx'> #define DC_LOGGER CTX-&gt;logger</div><div class='add'>+#define GPINT_RETRY_NUM 20</div><div class='ctx'> </div><div class='ctx'> static void dc_dmub_srv_construct(struct dc_dmub_srv *dc_srv, struct dc *dc,</div><div class='ctx'> 				  struct dmub_srv *dmub)</div><div class='hunk'>@@ -70,20 +71,28 @@ void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv)</div><div class='add'>+bool dc_dmub_srv_wait_for_pending(struct dc_dmub_srv *dc_dmub_srv)</div><div class='ctx'> {</div><div class='del'>-	struct dmub_srv *dmub = dc_dmub_srv-&gt;dmub;</div><div class='del'>-	struct dc_context *dc_ctx = dc_dmub_srv-&gt;ctx;</div><div class='add'>+	struct dmub_srv *dmub;</div><div class='add'>+	struct dc_context *dc_ctx;</div><div class='ctx'> 	enum dmub_status status;</div><div class='ctx'> </div><div class='add'>+	if (!dc_dmub_srv || !dc_dmub_srv-&gt;dmub)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	dc_ctx = dc_dmub_srv-&gt;ctx;</div><div class='add'>+	dmub = dc_dmub_srv-&gt;dmub;</div><div class='add'>+</div><div class='ctx'> 	do {</div><div class='del'>-		status = dmub_srv_wait_for_idle(dmub, 100000);</div><div class='add'>+		status = dmub_srv_wait_for_pending(dmub, 100000);</div><div class='ctx'> 	} while (dc_dmub_srv-&gt;ctx-&gt;dc-&gt;debug.disable_timeout &amp;&amp; status != DMUB_STATUS_OK);</div><div class='ctx'> </div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='ctx'> 		DC_ERROR("Error waiting for DMUB idle: status=%d\n", status);</div><div class='ctx'> 		dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return status == DMUB_STATUS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dc_dmub_srv)</div><div class='hunk'>@@ -126,7 +135,49 @@ void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,</div><div class='add'>+static bool dc_dmub_srv_reg_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,</div><div class='add'>+		unsigned int count,</div><div class='add'>+		union dmub_rb_cmd *cmd_list)</div><div class='add'>+{</div><div class='add'>+	struct dc_context *dc_ctx;</div><div class='add'>+	struct dmub_srv *dmub;</div><div class='add'>+	enum dmub_status status = DMUB_STATUS_OK;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!dc_dmub_srv || !dc_dmub_srv-&gt;dmub)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	dc_ctx = dc_dmub_srv-&gt;ctx;</div><div class='add'>+	dmub = dc_dmub_srv-&gt;dmub;</div><div class='add'>+</div><div class='add'>+	for (i = 0 ; i &lt; count; i++) {</div><div class='add'>+		/* confirm no messages pending */</div><div class='add'>+		do {</div><div class='add'>+			status = dmub_srv_wait_for_idle(dmub, 100000);</div><div class='add'>+		} while (dc_dmub_srv-&gt;ctx-&gt;dc-&gt;debug.disable_timeout &amp;&amp; status != DMUB_STATUS_OK);</div><div class='add'>+</div><div class='add'>+		/* queue command */</div><div class='add'>+		if (status == DMUB_STATUS_OK)</div><div class='add'>+			status = dmub_srv_reg_cmd_execute(dmub, &amp;cmd_list[i]);</div><div class='add'>+</div><div class='add'>+		/* check for errors */</div><div class='add'>+		if (status != DMUB_STATUS_OK) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status != DMUB_STATUS_OK) {</div><div class='add'>+		if (status != DMUB_STATUS_POWER_STATE_D3) {</div><div class='add'>+			DC_ERROR("Error starting DMUB execution: status=%d\n", status);</div><div class='add'>+			dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);</div><div class='add'>+		}</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool dc_dmub_srv_fb_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> 		unsigned int count,</div><div class='ctx'> 		union dmub_rb_cmd *cmd_list)</div><div class='ctx'> {</div><div class='hunk'>@@ -143,20 +194,25 @@ bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0 ; i &lt; count; i++) {</div><div class='ctx'> 		// Queue command</div><div class='del'>-		status = dmub_srv_cmd_queue(dmub, &amp;cmd_list[i]);</div><div class='add'>+		if (!cmd_list[i].cmd_common.header.multi_cmd_pending ||</div><div class='add'>+				dmub_rb_num_free(&amp;dmub-&gt;inbox1.rb) &gt;= count - i) {</div><div class='add'>+			status = dmub_srv_fb_cmd_queue(dmub, &amp;cmd_list[i]);</div><div class='add'>+		} else {</div><div class='add'>+			status = DMUB_STATUS_QUEUE_FULL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (status == DMUB_STATUS_QUEUE_FULL) {</div><div class='ctx'> 			/* Execute and wait for queue to become empty again. */</div><div class='del'>-			status = dmub_srv_cmd_execute(dmub);</div><div class='add'>+			status = dmub_srv_fb_cmd_execute(dmub);</div><div class='ctx'> 			if (status == DMUB_STATUS_POWER_STATE_D3)</div><div class='ctx'> 				return false;</div><div class='ctx'> </div><div class='ctx'> 			do {</div><div class='del'>-				status = dmub_srv_wait_for_idle(dmub, 100000);</div><div class='add'>+					status = dmub_srv_wait_for_inbox_free(dmub, 100000, count - i);</div><div class='ctx'> 			} while (dc_dmub_srv-&gt;ctx-&gt;dc-&gt;debug.disable_timeout &amp;&amp; status != DMUB_STATUS_OK);</div><div class='ctx'> </div><div class='ctx'> 			/* Requeue the command. */</div><div class='del'>-			status = dmub_srv_cmd_queue(dmub, &amp;cmd_list[i]);</div><div class='add'>+			status = dmub_srv_fb_cmd_queue(dmub, &amp;cmd_list[i]);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (status != DMUB_STATUS_OK) {</div><div class='hunk'>@@ -168,7 +224,7 @@ bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = dmub_srv_cmd_execute(dmub);</div><div class='add'>+	status = dmub_srv_fb_cmd_execute(dmub);</div><div class='ctx'> 	if (status != DMUB_STATUS_OK) {</div><div class='ctx'> 		if (status != DMUB_STATUS_POWER_STATE_D3) {</div><div class='ctx'> 			DC_ERROR("Error starting DMUB execution: status=%d\n", status);</div><div class='hunk'>@@ -180,6 +236,26 @@ bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,</div><div class='add'>+		unsigned int count,</div><div class='add'>+		union dmub_rb_cmd *cmd_list)</div><div class='add'>+{</div><div class='add'>+	bool res = false;</div><div class='add'>+</div><div class='add'>+	if (dc_dmub_srv &amp;&amp; dc_dmub_srv-&gt;dmub) {</div><div class='add'>+		if (dc_dmub_srv-&gt;dmub-&gt;inbox_type == DMUB_CMD_INTERFACE_REG) {</div><div class='add'>+			res = dc_dmub_srv_reg_cmd_list_queue_execute(dc_dmub_srv, count, cmd_list);</div><div class='add'>+		} else {</div><div class='add'>+			res = dc_dmub_srv_fb_cmd_list_queue_execute(dc_dmub_srv, count, cmd_list);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (res)</div><div class='add'>+			res = dmub_srv_update_inbox_status(dc_dmub_srv-&gt;dmub) == DMUB_STATUS_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> 		enum dm_dmub_wait_type wait_type,</div><div class='ctx'> 		union dmub_rb_cmd *cmd_list)</div><div class='hunk'>@@ -202,7 +278,8 @@ bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> 			DC_LOG_DEBUG("No reply for DMUB command: status=%d\n", status);</div><div class='ctx'> 			if (!dmub-&gt;debug.timeout_info.timeout_occured) {</div><div class='ctx'> 				dmub-&gt;debug.timeout_info.timeout_occured = true;</div><div class='del'>-				dmub-&gt;debug.timeout_info.timeout_cmd = *cmd_list;</div><div class='add'>+				if (cmd_list)</div><div class='add'>+					dmub-&gt;debug.timeout_info.timeout_cmd = *cmd_list;</div><div class='ctx'> 				dmub-&gt;debug.timeout_info.timestamp = dm_get_timestamp(dc_dmub_srv-&gt;ctx);</div><div class='ctx'> 			}</div><div class='ctx'> 			dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);</div><div class='hunk'>@@ -210,8 +287,9 @@ bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		// Copy data back from ring buffer into command</div><div class='del'>-		if (wait_type == DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)</div><div class='del'>-			dmub_rb_get_return_data(&amp;dmub-&gt;inbox1_rb, cmd_list);</div><div class='add'>+		if (wait_type == DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY &amp;&amp; cmd_list) {</div><div class='add'>+			dmub_srv_cmd_get_response(dc_dmub_srv-&gt;dmub, cmd_list);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -224,74 +302,10 @@ bool dc_dmub_srv_cmd_run(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd</div><div class='ctx'> </div><div class='ctx'> bool dc_dmub_srv_cmd_run_list(struct dc_dmub_srv *dc_dmub_srv, unsigned int count, union dmub_rb_cmd *cmd_list, enum dm_dmub_wait_type wait_type)</div><div class='ctx'> {</div><div class='del'>-	struct dc_context *dc_ctx;</div><div class='del'>-	struct dmub_srv *dmub;</div><div class='del'>-	enum dmub_status status;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!dc_dmub_srv || !dc_dmub_srv-&gt;dmub)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	dc_ctx = dc_dmub_srv-&gt;ctx;</div><div class='del'>-	dmub = dc_dmub_srv-&gt;dmub;</div><div class='del'>-</div><div class='del'>-	for (i = 0 ; i &lt; count; i++) {</div><div class='del'>-		// Queue command</div><div class='del'>-		status = dmub_srv_cmd_queue(dmub, &amp;cmd_list[i]);</div><div class='del'>-</div><div class='del'>-		if (status == DMUB_STATUS_QUEUE_FULL) {</div><div class='del'>-			/* Execute and wait for queue to become empty again. */</div><div class='del'>-			status = dmub_srv_cmd_execute(dmub);</div><div class='del'>-			if (status == DMUB_STATUS_POWER_STATE_D3)</div><div class='del'>-				return false;</div><div class='del'>-</div><div class='del'>-			status = dmub_srv_wait_for_idle(dmub, 100000);</div><div class='del'>-			if (status != DMUB_STATUS_OK)</div><div class='del'>-				return false;</div><div class='del'>-</div><div class='del'>-			/* Requeue the command. */</div><div class='del'>-			status = dmub_srv_cmd_queue(dmub, &amp;cmd_list[i]);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (status != DMUB_STATUS_OK) {</div><div class='del'>-			if (status != DMUB_STATUS_POWER_STATE_D3) {</div><div class='del'>-				DC_ERROR("Error queueing DMUB command: status=%d\n", status);</div><div class='del'>-				dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);</div><div class='del'>-			}</div><div class='del'>-			return false;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	status = dmub_srv_cmd_execute(dmub);</div><div class='del'>-	if (status != DMUB_STATUS_OK) {</div><div class='del'>-		if (status != DMUB_STATUS_POWER_STATE_D3) {</div><div class='del'>-			DC_ERROR("Error starting DMUB execution: status=%d\n", status);</div><div class='del'>-			dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);</div><div class='del'>-		}</div><div class='add'>+	if (!dc_dmub_srv_cmd_list_queue_execute(dc_dmub_srv, count, cmd_list))</div><div class='ctx'> 		return false;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	// Wait for DMUB to process command</div><div class='del'>-	if (wait_type != DM_DMUB_WAIT_TYPE_NO_WAIT) {</div><div class='del'>-		if (dc_dmub_srv-&gt;ctx-&gt;dc-&gt;debug.disable_timeout) {</div><div class='del'>-			do {</div><div class='del'>-				status = dmub_srv_wait_for_idle(dmub, 100000);</div><div class='del'>-			} while (status != DMUB_STATUS_OK);</div><div class='del'>-		} else</div><div class='del'>-			status = dmub_srv_wait_for_idle(dmub, 100000);</div><div class='del'>-</div><div class='del'>-		if (status != DMUB_STATUS_OK) {</div><div class='del'>-			DC_LOG_DEBUG("No reply for DMUB command: status=%d\n", status);</div><div class='del'>-			dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);</div><div class='del'>-			return false;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		// Copy data back from ring buffer into command</div><div class='del'>-		if (wait_type == DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)</div><div class='del'>-			dmub_rb_get_return_data(&amp;dmub-&gt;inbox1_rb, cmd_list);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='add'>+	return dc_dmub_srv_wait_for_idle(dc_dmub_srv, wait_type, cmd_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv)</div><div class='hunk'>@@ -1243,7 +1257,7 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, bool allow_idle)</div><div class='ctx'> 			ips_fw-&gt;signals.bits.ips1_commit,</div><div class='ctx'> 			ips_fw-&gt;signals.bits.ips2_commit);</div><div class='ctx'> </div><div class='del'>-		dc_dmub_srv_wait_idle(dc-&gt;ctx-&gt;dmub_srv);</div><div class='add'>+		dc_dmub_srv_wait_for_idle(dc-&gt;ctx-&gt;dmub_srv, DM_DMUB_WAIT_TYPE_WAIT, NULL);</div><div class='ctx'> </div><div class='ctx'> 		memset(&amp;new_signals, 0, sizeof(new_signals));</div><div class='ctx'> </div><div class='hunk'>@@ -1355,14 +1369,15 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc)</div><div class='ctx'> 			if (!dc-&gt;debug.optimize_ips_handshake || !ips_fw-&gt;signals.bits.ips2_commit)</div><div class='ctx'> 				udelay(dc-&gt;debug.ips2_eval_delay_us);</div><div class='ctx'> </div><div class='del'>-			if (ips_fw-&gt;signals.bits.ips2_commit) {</div><div class='del'>-				DC_LOG_IPS(</div><div class='del'>-					"exit IPS2 #1 (ips1_commit=%u ips2_commit=%u)",</div><div class='del'>-					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='del'>-					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='add'>+			DC_LOG_IPS(</div><div class='add'>+				"exit IPS2 #1 (ips1_commit=%u ips2_commit=%u)",</div><div class='add'>+				ips_fw-&gt;signals.bits.ips1_commit,</div><div class='add'>+				ips_fw-&gt;signals.bits.ips2_commit);</div><div class='ctx'> </div><div class='del'>-				// Tell PMFW to exit low power state</div><div class='del'>-				dc-&gt;clk_mgr-&gt;funcs-&gt;exit_low_power_state(dc-&gt;clk_mgr);</div><div class='add'>+			// Tell PMFW to exit low power state</div><div class='add'>+			dc-&gt;clk_mgr-&gt;funcs-&gt;exit_low_power_state(dc-&gt;clk_mgr);</div><div class='add'>+</div><div class='add'>+			if (ips_fw-&gt;signals.bits.ips2_commit) {</div><div class='ctx'> </div><div class='ctx'> 				DC_LOG_IPS(</div><div class='ctx'> 					"wait IPS2 entry delay (ips1_commit=%u ips2_commit=%u)",</div><div class='hunk'>@@ -1400,7 +1415,7 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc)</div><div class='ctx'> 					ips_fw-&gt;signals.bits.ips1_commit,</div><div class='ctx'> 					ips_fw-&gt;signals.bits.ips2_commit);</div><div class='ctx'> </div><div class='del'>-				dmub_srv_sync_inbox1(dc-&gt;ctx-&gt;dmub_srv-&gt;dmub);</div><div class='add'>+				dmub_srv_sync_inboxes(dc-&gt;ctx-&gt;dmub_srv-&gt;dmub);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1654,7 +1669,8 @@ void dc_dmub_srv_fams2_update_config(struct dc *dc,</div><div class='ctx'> 	/* fill in generic command header */</div><div class='ctx'> 	global_cmd-&gt;header.type = DMUB_CMD__FW_ASSISTED_MCLK_SWITCH;</div><div class='ctx'> 	global_cmd-&gt;header.sub_type = DMUB_CMD__FAMS2_CONFIG;</div><div class='del'>-	global_cmd-&gt;header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);</div><div class='add'>+	global_cmd-&gt;header.payload_bytes =</div><div class='add'>+			sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		/* send global configuration parameters */</div><div class='hunk'>@@ -1673,11 +1689,13 @@ void dc_dmub_srv_fams2_update_config(struct dc *dc,</div><div class='ctx'> 			/* configure command header */</div><div class='ctx'> 			stream_base_cmd-&gt;header.type = DMUB_CMD__FW_ASSISTED_MCLK_SWITCH;</div><div class='ctx'> 			stream_base_cmd-&gt;header.sub_type = DMUB_CMD__FAMS2_CONFIG;</div><div class='del'>-			stream_base_cmd-&gt;header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);</div><div class='add'>+			stream_base_cmd-&gt;header.payload_bytes =</div><div class='add'>+					sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);</div><div class='ctx'> 			stream_base_cmd-&gt;header.multi_cmd_pending = 1;</div><div class='ctx'> 			stream_sub_state_cmd-&gt;header.type = DMUB_CMD__FW_ASSISTED_MCLK_SWITCH;</div><div class='ctx'> 			stream_sub_state_cmd-&gt;header.sub_type = DMUB_CMD__FAMS2_CONFIG;</div><div class='del'>-			stream_sub_state_cmd-&gt;header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);</div><div class='add'>+			stream_sub_state_cmd-&gt;header.payload_bytes =</div><div class='add'>+					sizeof(struct dmub_rb_cmd_fams2) - sizeof(struct dmub_cmd_header);</div><div class='ctx'> 			stream_sub_state_cmd-&gt;header.multi_cmd_pending = 1;</div><div class='ctx'> 			/* copy stream static base state */</div><div class='ctx'> 			memcpy(&amp;stream_base_cmd-&gt;config,</div><div class='hunk'>@@ -1723,7 +1741,8 @@ void dc_dmub_srv_fams2_drr_update(struct dc *dc,</div><div class='ctx'> 	cmd.fams2_drr_update.dmub_optc_state_req.v_total_mid_frame_num = vtotal_mid_frame_num;</div><div class='ctx'> 	cmd.fams2_drr_update.dmub_optc_state_req.program_manual_trigger = program_manual_trigger;</div><div class='ctx'> </div><div class='del'>-	cmd.fams2_drr_update.header.payload_bytes = sizeof(cmd.fams2_drr_update) - sizeof(cmd.fams2_drr_update.header);</div><div class='add'>+	cmd.fams2_drr_update.header.payload_bytes =</div><div class='add'>+			sizeof(cmd.fams2_drr_update) - sizeof(cmd.fams2_drr_update.header);</div><div class='ctx'> </div><div class='ctx'> 	dm_execute_dmub_cmd(dc-&gt;ctx, &amp;cmd, DM_DMUB_WAIT_TYPE_WAIT);</div><div class='ctx'> }</div><div class='hunk'>@@ -1759,7 +1778,8 @@ void dc_dmub_srv_fams2_passthrough_flip(</div><div class='ctx'> 		/* build command header */</div><div class='ctx'> 		cmds[num_cmds].fams2_flip.header.type = DMUB_CMD__FW_ASSISTED_MCLK_SWITCH;</div><div class='ctx'> 		cmds[num_cmds].fams2_flip.header.sub_type = DMUB_CMD__FAMS2_FLIP;</div><div class='del'>-		cmds[num_cmds].fams2_flip.header.payload_bytes = sizeof(struct dmub_rb_cmd_fams2_flip);</div><div class='add'>+		cmds[num_cmds].fams2_flip.header.payload_bytes =</div><div class='add'>+				sizeof(struct dmub_rb_cmd_fams2_flip) - sizeof(struct dmub_cmd_header);</div><div class='ctx'> </div><div class='ctx'> 		/* for chaining multiple commands, all but last command should set to 1 */</div><div class='ctx'> 		cmds[num_cmds].fams2_flip.header.multi_cmd_pending = 1;</div><div class='hunk'>@@ -1869,11 +1889,14 @@ void dc_dmub_srv_ips_query_residency_info(struct dc_dmub_srv *dc_dmub_srv, struc</div><div class='ctx'> 	if (command_code == DMUB_GPINT__INVALID_COMMAND)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	// send gpint commands and wait for ack</div><div class='del'>-	if (!dc_wake_and_execute_gpint(dc_dmub_srv-&gt;ctx, DMUB_GPINT__GET_IPS_RESIDENCY_PERCENT,</div><div class='del'>-				      (uint16_t)(output-&gt;ips_mode),</div><div class='del'>-				       &amp;output-&gt;residency_percent, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))</div><div class='del'>-		output-&gt;residency_percent = 0;</div><div class='add'>+	for (i = 0; i &lt; GPINT_RETRY_NUM; i++) {</div><div class='add'>+		// false could mean GPINT timeout, in which case we should retry</div><div class='add'>+		if (dc_wake_and_execute_gpint(dc_dmub_srv-&gt;ctx, DMUB_GPINT__GET_IPS_RESIDENCY_PERCENT,</div><div class='add'>+					      (uint16_t)(output-&gt;ips_mode), &amp;output-&gt;residency_percent,</div><div class='add'>+					      DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))</div><div class='add'>+			break;</div><div class='add'>+		udelay(100);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!dc_wake_and_execute_gpint(dc_dmub_srv-&gt;ctx, DMUB_GPINT__GET_IPS_RESIDENCY_ENTRY_COUNTER,</div><div class='ctx'> 				      (uint16_t)(output-&gt;ips_mode),</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h<br/>index a636f4c3f01d..ada5c2fb2db3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h</a></div><div class='hunk'>@@ -58,7 +58,7 @@ struct dc_dmub_srv {</div><div class='ctx'> 	bool needs_idle_wake;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv);</div><div class='add'>+bool dc_dmub_srv_wait_for_pending(struct dc_dmub_srv *dc_dmub_srv);</div><div class='ctx'> </div><div class='ctx'> bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h<br/>index 77c87ad57220..0bad8304ccf6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dp_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_dp_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_dp_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_dp_types.h</a></div><div class='hunk'>@@ -159,6 +159,11 @@ struct dc_link_settings {</div><div class='ctx'> 	uint8_t link_rate_set;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct dc_tunnel_settings {</div><div class='add'>+	bool should_enable_dp_tunneling;</div><div class='add'>+	bool should_use_dp_bw_allocation;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> union dc_dp_ffe_preset {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		uint8_t level		: 4;</div><div class='hunk'>@@ -943,10 +948,20 @@ union dpia_info {</div><div class='ctx'> 	uint8_t raw;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* DPCD[0xE0020] USB4_DRIVER_BW_CAPABILITY register. */</div><div class='add'>+union usb4_driver_bw_cap {</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t rsvd :7;</div><div class='add'>+		uint8_t driver_bw_alloc_support :1;</div><div class='add'>+	} bits;</div><div class='add'>+	uint8_t raw;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* DP Tunneling over USB4 */</div><div class='ctx'> struct dpcd_usb4_dp_tunneling_info {</div><div class='ctx'> 	union dp_tun_cap_support dp_tun_cap;</div><div class='ctx'> 	union dpia_info dpia_info;</div><div class='add'>+	union usb4_driver_bw_cap driver_bw_cap;</div><div class='ctx'> 	uint8_t usb4_driver_id;</div><div class='ctx'> 	uint8_t usb4_topology_id[DPCD_USB4_TOPOLOGY_ID_LEN];</div><div class='ctx'> };</div><div class='hunk'>@@ -1486,5 +1501,11 @@ struct dp_trace {</div><div class='ctx'> # ifndef DP_TUNNELING_BW_ALLOC_CAP_CHANGED</div><div class='ctx'> # define DP_TUNNELING_BW_ALLOC_CAP_CHANGED		(1 &lt;&lt; 3)</div><div class='ctx'> # endif</div><div class='add'>+# ifndef DPTX_BW_ALLOC_UNMASK_IRQ</div><div class='add'>+# define DPTX_BW_ALLOC_UNMASK_IRQ			(1 &lt;&lt; 6)</div><div class='add'>+# endif</div><div class='add'>+# ifndef DPTX_BW_ALLOC_MODE_ENABLE</div><div class='add'>+# define DPTX_BW_ALLOC_MODE_ENABLE			(1 &lt;&lt; 7)</div><div class='add'>+# endif</div><div class='ctx'> </div><div class='ctx'> #endif /* DC_DP_TYPES_H */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_fused_io.c b/drivers/gpu/drm/amd/display/dc/dc_fused_io.c<br/>new file mode 100644<br/>index 000000000000..fee69642fb93<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_fused_io.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_fused_io.c</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+// SPDX-License-Identifier: MIT</div><div class='add'>+//</div><div class='add'>+// Copyright 2025 Advanced Micro Devices, Inc.</div><div class='add'>+</div><div class='add'>+#include "dc_fused_io.h"</div><div class='add'>+</div><div class='add'>+#include "dm_helpers.h"</div><div class='add'>+#include "gpio.h"</div><div class='add'>+</div><div class='add'>+static bool op_i2c_convert(</div><div class='add'>+		union dmub_rb_cmd *cmd,</div><div class='add'>+		const struct mod_hdcp_atomic_op_i2c *op,</div><div class='add'>+		enum dmub_cmd_fused_request_type type,</div><div class='add'>+		uint32_t ddc_line,</div><div class='add'>+		bool over_aux</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	struct dmub_cmd_fused_request *req = &amp;cmd-&gt;fused_io.request;</div><div class='add'>+	struct dmub_cmd_fused_request_location_i2c *loc = &amp;req-&gt;u.i2c;</div><div class='add'>+</div><div class='add'>+	if (!op || op-&gt;size &gt; sizeof(req-&gt;buffer))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	req-&gt;type = type;</div><div class='add'>+	loc-&gt;is_aux = false;</div><div class='add'>+	loc-&gt;ddc_line = ddc_line;</div><div class='add'>+	loc-&gt;over_aux = over_aux;</div><div class='add'>+	loc-&gt;address = op-&gt;address;</div><div class='add'>+	loc-&gt;offset = op-&gt;offset;</div><div class='add'>+	loc-&gt;length = op-&gt;size;</div><div class='add'>+	memcpy(req-&gt;buffer, op-&gt;data, op-&gt;size);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool op_aux_convert(</div><div class='add'>+		union dmub_rb_cmd *cmd,</div><div class='add'>+		const struct mod_hdcp_atomic_op_aux *op,</div><div class='add'>+		enum dmub_cmd_fused_request_type type,</div><div class='add'>+		uint32_t ddc_line</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	struct dmub_cmd_fused_request *req = &amp;cmd-&gt;fused_io.request;</div><div class='add'>+	struct dmub_cmd_fused_request_location_aux *loc = &amp;req-&gt;u.aux;</div><div class='add'>+</div><div class='add'>+	if (!op || op-&gt;size &gt; sizeof(req-&gt;buffer))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	req-&gt;type = type;</div><div class='add'>+	loc-&gt;is_aux = true;</div><div class='add'>+	loc-&gt;ddc_line = ddc_line;</div><div class='add'>+	loc-&gt;address = op-&gt;address;</div><div class='add'>+	loc-&gt;length = op-&gt;size;</div><div class='add'>+	memcpy(req-&gt;buffer, op-&gt;data, op-&gt;size);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool atomic_write_poll_read(</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		union dmub_rb_cmd commands[3],</div><div class='add'>+		uint32_t poll_timeout_us,</div><div class='add'>+		uint8_t poll_mask_msb</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	const uint8_t count = 3;</div><div class='add'>+	const uint32_t timeout_per_request_us = 10000;</div><div class='add'>+	const uint32_t timeout_per_aux_transaction_us = 10000;</div><div class='add'>+	uint64_t timeout_us = 0;</div><div class='add'>+</div><div class='add'>+	commands[1].fused_io.request.poll_mask_msb = poll_mask_msb;</div><div class='add'>+	commands[1].fused_io.request.timeout_us = poll_timeout_us;</div><div class='add'>+</div><div class='add'>+	for (uint8_t i = 0; i &lt; count; i++) {</div><div class='add'>+		struct dmub_rb_cmd_fused_io *io = &amp;commands[i].fused_io;</div><div class='add'>+</div><div class='add'>+		io-&gt;header.type = DMUB_CMD__FUSED_IO;</div><div class='add'>+		io-&gt;header.sub_type = DMUB_CMD__FUSED_IO_EXECUTE;</div><div class='add'>+		io-&gt;header.multi_cmd_pending = i != count - 1;</div><div class='add'>+		io-&gt;header.payload_bytes = sizeof(commands[i].fused_io) - sizeof(io-&gt;header);</div><div class='add'>+</div><div class='add'>+		timeout_us += timeout_per_request_us + io-&gt;request.timeout_us;</div><div class='add'>+		if (!io-&gt;request.timeout_us &amp;&amp; io-&gt;request.u.aux.is_aux)</div><div class='add'>+			timeout_us += timeout_per_aux_transaction_us * (io-&gt;request.u.aux.length / 16);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!dm_helpers_execute_fused_io(link-&gt;ctx, link, commands, count, timeout_us))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return commands[0].fused_io.request.status == FUSED_REQUEST_STATUS_SUCCESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dm_atomic_write_poll_read_i2c(</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		const struct mod_hdcp_atomic_op_i2c *write,</div><div class='add'>+		const struct mod_hdcp_atomic_op_i2c *poll,</div><div class='add'>+		struct mod_hdcp_atomic_op_i2c *read,</div><div class='add'>+		uint32_t poll_timeout_us,</div><div class='add'>+		uint8_t poll_mask_msb</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	if (!link)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	const bool over_aux = false;</div><div class='add'>+	const uint32_t ddc_line = link-&gt;ddc-&gt;ddc_pin-&gt;pin_data-&gt;en;</div><div class='add'>+</div><div class='add'>+	union dmub_rb_cmd commands[3] = { 0 };</div><div class='add'>+	const bool converted = op_i2c_convert(&amp;commands[0], write, FUSED_REQUEST_WRITE, ddc_line, over_aux)</div><div class='add'>+			&amp;&amp; op_i2c_convert(&amp;commands[1], poll, FUSED_REQUEST_POLL, ddc_line, over_aux)</div><div class='add'>+			&amp;&amp; op_i2c_convert(&amp;commands[2], read, FUSED_REQUEST_READ, ddc_line, over_aux);</div><div class='add'>+</div><div class='add'>+	if (!converted)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	const bool result = atomic_write_poll_read(link, commands, poll_timeout_us, poll_mask_msb);</div><div class='add'>+</div><div class='add'>+	memcpy(read-&gt;data, commands[0].fused_io.request.buffer, read-&gt;size);</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dm_atomic_write_poll_read_aux(</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		const struct mod_hdcp_atomic_op_aux *write,</div><div class='add'>+		const struct mod_hdcp_atomic_op_aux *poll,</div><div class='add'>+		struct mod_hdcp_atomic_op_aux *read,</div><div class='add'>+		uint32_t poll_timeout_us,</div><div class='add'>+		uint8_t poll_mask_msb</div><div class='add'>+)</div><div class='add'>+{</div><div class='add'>+	if (!link)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	const uint32_t ddc_line = link-&gt;ddc-&gt;ddc_pin-&gt;pin_data-&gt;en;</div><div class='add'>+	union dmub_rb_cmd commands[3] = { 0 };</div><div class='add'>+	const bool converted = op_aux_convert(&amp;commands[0], write, FUSED_REQUEST_WRITE, ddc_line)</div><div class='add'>+			&amp;&amp; op_aux_convert(&amp;commands[1], poll, FUSED_REQUEST_POLL, ddc_line)</div><div class='add'>+			&amp;&amp; op_aux_convert(&amp;commands[2], read, FUSED_REQUEST_READ, ddc_line);</div><div class='add'>+</div><div class='add'>+	if (!converted)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	const bool result = atomic_write_poll_read(link, commands, poll_timeout_us, poll_mask_msb);</div><div class='add'>+</div><div class='add'>+	memcpy(read-&gt;data, commands[0].fused_io.request.buffer, read-&gt;size);</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_fused_io.h b/drivers/gpu/drm/amd/display/dc/dc_fused_io.h<br/>new file mode 100644<br/>index 000000000000..c74917240985<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_fused_io.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_fused_io.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2025 Advanced Micro Devices, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __DC_FUSED_IO_H__</div><div class='add'>+#define __DC_FUSED_IO_H__</div><div class='add'>+</div><div class='add'>+#include "dc.h"</div><div class='add'>+#include "mod_hdcp.h"</div><div class='add'>+</div><div class='add'>+bool dm_atomic_write_poll_read_i2c(</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		const struct mod_hdcp_atomic_op_i2c *write,</div><div class='add'>+		const struct mod_hdcp_atomic_op_i2c *poll,</div><div class='add'>+		struct mod_hdcp_atomic_op_i2c *read,</div><div class='add'>+		uint32_t poll_timeout_us,</div><div class='add'>+		uint8_t poll_mask_msb</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+bool dm_atomic_write_poll_read_aux(</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		const struct mod_hdcp_atomic_op_aux *write,</div><div class='add'>+		const struct mod_hdcp_atomic_op_aux *poll,</div><div class='add'>+		struct mod_hdcp_atomic_op_aux *read,</div><div class='add'>+		uint32_t poll_timeout_us,</div><div class='add'>+		uint8_t poll_mask_msb</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+#endif  // __DC_FUSED_IO_H__</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_helper.c b/drivers/gpu/drm/amd/display/dc/dc_helper.c<br/>index 8f077e15b4f0..7217de258851 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_helper.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_helper.c</a></div><div class='hunk'>@@ -682,13 +682,19 @@ void reg_sequence_wait_done(const struct dc_context *ctx)</div><div class='ctx'> 	if (offload &amp;&amp;</div><div class='ctx'> 	    ctx-&gt;dc-&gt;debug.dmub_offload_enabled &amp;&amp;</div><div class='ctx'> 	    !ctx-&gt;dc-&gt;debug.dmcub_emulation) {</div><div class='del'>-		dc_dmub_srv_wait_idle(ctx-&gt;dmub_srv);</div><div class='add'>+		dc_dmub_srv_wait_for_idle(ctx-&gt;dmub_srv, DM_DMUB_WAIT_TYPE_WAIT, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> char *dce_version_to_string(const int version)</div><div class='ctx'> {</div><div class='ctx'> 	switch (version) {</div><div class='add'>+	case DCE_VERSION_6_0:</div><div class='add'>+		return "DCE 6.0";</div><div class='add'>+	case DCE_VERSION_6_1:</div><div class='add'>+		return "DCE 6.1";</div><div class='add'>+	case DCE_VERSION_6_4:</div><div class='add'>+		return "DCE 6.4";</div><div class='ctx'> 	case DCE_VERSION_8_0:</div><div class='ctx'> 		return "DCE 8.0";</div><div class='ctx'> 	case DCE_VERSION_8_1:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_plane.h b/drivers/gpu/drm/amd/display/dc/dc_plane.h<br/>index e9413685ed4f..14feb843e694 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_plane.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_plane.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_plane.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_plane.h</a></div><div class='hunk'>@@ -28,13 +28,24 @@</div><div class='ctx'> </div><div class='ctx'> #include "dc_hw_types.h"</div><div class='ctx'> </div><div class='add'>+union dc_plane_status_update_flags {</div><div class='add'>+	struct {</div><div class='add'>+		uint32_t address : 1;</div><div class='add'>+	} bits;</div><div class='add'>+	uint32_t raw;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct dc_plane_state *dc_create_plane_state(const struct dc *dc);</div><div class='ctx'> const struct dc_plane_status *dc_plane_get_status(</div><div class='del'>-		const struct dc_plane_state *plane_state);</div><div class='add'>+		const struct dc_plane_state *plane_state,</div><div class='add'>+		union dc_plane_status_update_flags flags);</div><div class='ctx'> void dc_plane_state_retain(struct dc_plane_state *plane_state);</div><div class='ctx'> void dc_plane_state_release(struct dc_plane_state *plane_state);</div><div class='ctx'> </div><div class='ctx'> void dc_plane_force_dcc_and_tiling_disable(struct dc_plane_state *plane_state,</div><div class='ctx'> 					   bool clear_tiling);</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+void dc_plane_copy_config(struct dc_plane_state *dst, const struct dc_plane_state *src);</div><div class='add'>+</div><div class='ctx'> #endif /* _DC_PLANE_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_state_priv.h b/drivers/gpu/drm/amd/display/dc/dc_state_priv.h<br/>index 1a12ef579ff4..1d9bae56ff6a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_state_priv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_state_priv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_state_priv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_state_priv.h</a></div><div class='hunk'>@@ -105,4 +105,24 @@ bool dc_state_is_fams2_in_use(</div><div class='ctx'> 		const struct dc *dc,</div><div class='ctx'> 		const struct dc_state *state);</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+void dc_state_set_stream_subvp_cursor_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		bool limit);</div><div class='add'>+</div><div class='add'>+bool dc_state_get_stream_subvp_cursor_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state);</div><div class='add'>+</div><div class='add'>+void dc_state_set_stream_cursor_subvp_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state,</div><div class='add'>+		bool limit);</div><div class='add'>+</div><div class='add'>+bool dc_state_get_stream_cursor_subvp_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state);</div><div class='add'>+</div><div class='add'>+bool dc_state_can_clear_stream_cursor_subvp_limit(const struct dc_stream_state *stream,</div><div class='add'>+		struct dc_state *state);</div><div class='add'>+</div><div class='add'>+bool dc_state_is_subvp_in_use(struct dc_state *state);</div><div class='add'>+</div><div class='ctx'> #endif /* _DC_STATE_PRIV_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h<br/>index e0bfddaa23e3..341d2ffb64b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_stream.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_stream.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_stream.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_stream.h</a></div><div class='hunk'>@@ -44,6 +44,8 @@ struct mall_stream_config {</div><div class='ctx'> 	 */</div><div class='ctx'> 	enum mall_stream_type type;</div><div class='ctx'> 	struct dc_stream_state *paired_stream;	// master / slave stream</div><div class='add'>+	bool subvp_limit_cursor_size; /* stream has/is using subvp limiting hw cursor support */</div><div class='add'>+	bool cursor_size_limit_subvp; /* stream is using hw cursor config preventing subvp */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dc_stream_status {</div><div class='hunk'>@@ -503,6 +505,11 @@ void program_cursor_position(</div><div class='ctx'> 	struct dc *dc,</div><div class='ctx'> 	struct dc_stream_state *stream);</div><div class='ctx'> </div><div class='add'>+bool dc_stream_check_cursor_attributes(</div><div class='add'>+	const struct dc_stream_state *stream,</div><div class='add'>+	struct dc_state *state,</div><div class='add'>+	const struct dc_cursor_attributes *attributes);</div><div class='add'>+</div><div class='ctx'> bool dc_stream_set_cursor_attributes(</div><div class='ctx'> 	struct dc_stream_state *stream,</div><div class='ctx'> 	const struct dc_cursor_attributes *attributes);</div><div class='hunk'>@@ -579,4 +586,8 @@ void dc_dmub_update_dirty_rect(struct dc *dc,</div><div class='ctx'> 			       struct dc_stream_state *stream,</div><div class='ctx'> 			       struct dc_surface_update *srf_updates,</div><div class='ctx'> 			       struct dc_state *context);</div><div class='add'>+</div><div class='add'>+bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream);</div><div class='add'>+bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream);</div><div class='add'>+</div><div class='ctx'> #endif /* DC_STREAM_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h<br/>index 83ffaae9f439..a4cd0eb39a3a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dc_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dc_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dc_types.h</a></div><div class='hunk'>@@ -210,6 +210,7 @@ struct dc_edid_caps {</div><div class='ctx'> </div><div class='ctx'> 	bool edid_hdmi;</div><div class='ctx'> 	bool hdr_supported;</div><div class='add'>+	bool rr_capable;</div><div class='ctx'> </div><div class='ctx'> 	struct dc_panel_patch panel_patch;</div><div class='ctx'> };</div><div class='hunk'>@@ -1089,7 +1090,8 @@ union replay_low_refresh_rate_enable_options {</div><div class='ctx'> 	struct {</div><div class='ctx'> 	//BIT[0-3]: Replay Low Hz Support control</div><div class='ctx'> 		unsigned int ENABLE_LOW_RR_SUPPORT          :1;</div><div class='del'>-		unsigned int RESERVED_1_3                   :3;</div><div class='add'>+		unsigned int SKIP_ASIC_CHECK                :1;</div><div class='add'>+		unsigned int RESERVED_2_3                   :2;</div><div class='ctx'> 	//BIT[4-15]: Replay Low Hz Enable Scenarios</div><div class='ctx'> 		unsigned int ENABLE_STATIC_SCREEN           :1;</div><div class='ctx'> 		unsigned int ENABLE_FULL_SCREEN_VIDEO       :1;</div><div class='hunk'>@@ -1129,6 +1131,10 @@ struct replay_config {</div><div class='ctx'> 	union replay_low_refresh_rate_enable_options low_rr_enable_options;</div><div class='ctx'> 	/* Replay coasting vtotal is within low refresh rate range. */</div><div class='ctx'> 	bool low_rr_activated;</div><div class='add'>+	/* Replay low refresh rate supported*/</div><div class='add'>+	bool low_rr_supported;</div><div class='add'>+	/* Replay Video Conferencing Optimization Enabled */</div><div class='add'>+	bool replay_video_conferencing_optimization_enabled;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Replay feature flags*/</div><div class='hunk'>@@ -1249,6 +1255,7 @@ enum dc_cm2_gpu_mem_layout {</div><div class='ctx'> </div><div class='ctx'> enum dc_cm2_gpu_mem_pixel_component_order {</div><div class='ctx'> 	DC_CM2_GPU_MEM_PIXEL_COMPONENT_ORDER_RGBA,</div><div class='add'>+	DC_CM2_GPU_MEM_PIXEL_COMPONENT_ORDER_BGRA</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum dc_cm2_gpu_mem_format {</div><div class='hunk'>@@ -1270,7 +1277,8 @@ struct dc_cm2_gpu_mem_format_parameters {</div><div class='ctx'> </div><div class='ctx'> enum dc_cm2_gpu_mem_size {</div><div class='ctx'> 	DC_CM2_GPU_MEM_SIZE_171717,</div><div class='del'>-	DC_CM2_GPU_MEM_SIZE_TRANSFORMED</div><div class='add'>+	DC_CM2_GPU_MEM_SIZE_333333,</div><div class='add'>+	DC_CM2_GPU_MEM_SIZE_TRANSFORMED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dc_cm2_gpu_mem_parameters {</div><div class='hunk'>@@ -1279,6 +1287,7 @@ struct dc_cm2_gpu_mem_parameters {</div><div class='ctx'> 	struct dc_cm2_gpu_mem_format_parameters format_params;</div><div class='ctx'> 	enum dc_cm2_gpu_mem_pixel_component_order component_order;</div><div class='ctx'> 	enum dc_cm2_gpu_mem_size  size;</div><div class='add'>+	uint16_t bit_depth;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum dc_cm2_transfer_func_source {</div><div class='hunk'>@@ -1302,6 +1311,10 @@ struct dc_cm2_func_luts {</div><div class='ctx'> 			const struct dc_3dlut *lut3d_func;</div><div class='ctx'> 			struct dc_cm2_gpu_mem_parameters gpu_mem_params;</div><div class='ctx'> 		};</div><div class='add'>+		bool rmcm_3dlut_shaper_select;</div><div class='add'>+		bool mpc_3dlut_enable;</div><div class='add'>+		bool rmcm_3dlut_enable;</div><div class='add'>+		bool mpc_mcm_post_blend;</div><div class='ctx'> 	} lut3d_data;</div><div class='ctx'> 	const struct dc_transfer_func *lut1d_func;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c b/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c<br/>index b363f5360818..58c84f555c0f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c</a></div><div class='hunk'>@@ -391,6 +391,7 @@ static void dccg35_set_dppclk_rcg(struct dccg *dccg,</div><div class='ctx'> </div><div class='ctx'> 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	if (!dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp &amp;&amp; enable)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -411,6 +412,8 @@ static void dccg35_set_dppclk_rcg(struct dccg *dccg,</div><div class='ctx'> 	BREAK_TO_DEBUGGER();</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	//DC_LOG_DEBUG("%s: inst(%d) DPPCLK rcg_disable: %d\n", __func__, inst, enable ? 0 : 1);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dccg35_set_dpstreamclk_rcg(</div><div class='hunk'>@@ -1035,6 +1038,7 @@ static void dccg35_enable_dpp_clk_new(</div><div class='ctx'> 			  DPPCLK0_DTO_MODULO, 0xFF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> static void dccg35_disable_dpp_clk_new(</div><div class='ctx'> 	struct dccg *dccg,</div><div class='ctx'> 	int inst)</div><div class='hunk'>@@ -1112,30 +1116,24 @@ static void dcn35_set_dppclk_enable(struct dccg *dccg,</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	switch (dpp_inst) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK0_EN, enable);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK1_EN, enable);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK1_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK2_EN, enable);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK2_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE(DPPCLK_CTRL, DPPCLK3_EN, enable);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK3_ROOT_GATE_DISABLE, enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	//DC_LOG_DEBUG("%s: dpp_inst(%d) DPPCLK_EN = %d\n", __func__, dpp_inst, enable);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1163,14 +1161,18 @@ static void dccg35_update_dpp_dto(struct dccg *dccg, int dpp_inst,</div><div class='ctx'> 			ASSERT(false);</div><div class='ctx'> 			phase = 0xff;</div><div class='ctx'> 		}</div><div class='add'>+		dccg35_set_dppclk_rcg(dccg, dpp_inst, false);</div><div class='ctx'> </div><div class='ctx'> 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,</div><div class='ctx'> 				DPPCLK0_DTO_PHASE, phase,</div><div class='ctx'> 				DPPCLK0_DTO_MODULO, modulo);</div><div class='ctx'> </div><div class='ctx'> 		dcn35_set_dppclk_enable(dccg, dpp_inst, true);</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		dcn35_set_dppclk_enable(dccg, dpp_inst, false);</div><div class='add'>+		/*we have this in hwss: disable_plane*/</div><div class='add'>+		//dccg35_set_dppclk_rcg(dccg, dpp_inst, true);</div><div class='add'>+	}</div><div class='ctx'> 	dccg-&gt;pipe_dppclk_khz[dpp_inst] = req_dppclk;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1182,6 +1184,7 @@ static void dccg35_set_dppclk_root_clock_gating(struct dccg *dccg,</div><div class='ctx'> 	if (!dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dpp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	switch (dpp_inst) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DPPCLK0_ROOT_GATE_DISABLE, enable);</div><div class='hunk'>@@ -1198,6 +1201,8 @@ static void dccg35_set_dppclk_root_clock_gating(struct dccg *dccg,</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+	//DC_LOG_DEBUG("%s: dpp_inst(%d) rcg: %d\n", __func__, dpp_inst, enable);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dccg35_get_pixel_rate_div(</div><div class='hunk'>@@ -1521,28 +1526,30 @@ static void dccg35_set_physymclk_root_clock_gating(</div><div class='ctx'> 	switch (phy_inst) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='del'>-				PHYASYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+				PHYASYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='del'>-				PHYBSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+				PHYBSYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='del'>-				PHYCSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+				PHYCSYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='del'>-				PHYDSYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+				PHYDSYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 4:</div><div class='ctx'> 		REG_UPDATE(DCCG_GATE_DISABLE_CNTL2,</div><div class='del'>-				PHYESYMCLK_ROOT_GATE_DISABLE, enable ? 1 : 0);</div><div class='add'>+				PHYESYMCLK_ROOT_GATE_DISABLE, enable ? 0 : 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BREAK_TO_DEBUGGER();</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	//DC_LOG_DEBUG("%s: dpp_inst(%d) PHYESYMCLK_ROOT_GATE_DISABLE:\n", __func__, phy_inst, enable ? 0 : 1);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dccg35_set_physymclk(</div><div class='hunk'>@@ -1643,6 +1650,8 @@ static void dccg35_dpp_root_clock_control(</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (clock_on) {</div><div class='add'>+		dccg35_set_dppclk_rcg(dccg, dpp_inst, false);</div><div class='add'>+</div><div class='ctx'> 		/* turn off the DTO and leave phase/modulo at max */</div><div class='ctx'> 		dcn35_set_dppclk_enable(dccg, dpp_inst, 1);</div><div class='ctx'> 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,</div><div class='hunk'>@@ -1654,6 +1663,8 @@ static void dccg35_dpp_root_clock_control(</div><div class='ctx'> 		REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,</div><div class='ctx'> 			  DPPCLK0_DTO_PHASE, 0,</div><div class='ctx'> 			  DPPCLK0_DTO_MODULO, 1);</div><div class='add'>+		/*we have this in hwss: disable_plane*/</div><div class='add'>+		//dccg35_set_dppclk_rcg(dccg, dpp_inst, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dccg-&gt;dpp_clock_gated[dpp_inst] = !clock_on;</div><div class='hunk'>@@ -1771,36 +1782,40 @@ static void dccg35_enable_dscclk(struct dccg *dccg, int inst)</div><div class='ctx'> 	//Disable DTO</div><div class='ctx'> 	switch (inst) {</div><div class='ctx'> 	case 0:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, 1);</div><div class='add'>+</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK0_DTO_PARAM,</div><div class='ctx'> 				DSCCLK0_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK0_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL,	DSCCLK0_EN, 1);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK0_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, 1);</div><div class='add'>+</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK1_DTO_PARAM,</div><div class='ctx'> 				DSCCLK1_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK1_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK1_EN, 1);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK1_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, 1);</div><div class='add'>+</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK2_DTO_PARAM,</div><div class='ctx'> 				DSCCLK2_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK2_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK2_EN, 1);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK2_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='add'>+		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='add'>+			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, 1);</div><div class='add'>+</div><div class='ctx'> 		REG_UPDATE_2(DSCCLK3_DTO_PARAM,</div><div class='ctx'> 				DSCCLK3_DTO_PHASE, 0,</div><div class='ctx'> 				DSCCLK3_DTO_MODULO, 0);</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK3_EN, 1);</div><div class='del'>-		if (dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='del'>-			REG_UPDATE(DCCG_GATE_DISABLE_CNTL6, DSCCLK3_ROOT_GATE_DISABLE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		BREAK_TO_DEBUGGER();</div><div class='hunk'>@@ -1813,9 +1828,6 @@ static void dccg35_disable_dscclk(struct dccg *dccg,</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);</div><div class='ctx'> </div><div class='del'>-	if (!dccg-&gt;ctx-&gt;dc-&gt;debug.root_clock_optimization.bits.dsc)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	switch (inst) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		REG_UPDATE(DSCCLK_DTO_CTRL, DSCCLK0_EN, 0);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c<br/>index 077337698e0a..b4f5b4a6331a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c</a></div><div class='hunk'>@@ -976,11 +976,12 @@ static bool dcn31_program_pix_clk(</div><div class='ctx'> 	struct bp_pixel_clock_parameters bp_pc_params = {0};</div><div class='ctx'> 	enum transmitter_color_depth bp_pc_colour_depth = TRANSMITTER_COLOR_DEPTH_24;</div><div class='ctx'> </div><div class='del'>-	// Apply ssed(spread spectrum) dpref clock for edp only.</div><div class='del'>-	if (clock_source-&gt;ctx-&gt;dc-&gt;clk_mgr-&gt;dp_dto_source_clock_in_khz != 0</div><div class='del'>-		&amp;&amp; pix_clk_params-&gt;signal_type == SIGNAL_TYPE_EDP</div><div class='del'>-		&amp;&amp; encoding == DP_8b_10b_ENCODING)</div><div class='add'>+	// Apply ssed(spread spectrum) dpref clock for edp and dp</div><div class='add'>+	if (clock_source-&gt;ctx-&gt;dc-&gt;clk_mgr-&gt;dp_dto_source_clock_in_khz != 0 &amp;&amp;</div><div class='add'>+		dc_is_dp_signal(pix_clk_params-&gt;signal_type) &amp;&amp;</div><div class='add'>+		encoding == DP_8b_10b_ENCODING)</div><div class='ctx'> 		dp_dto_ref_khz = clock_source-&gt;ctx-&gt;dc-&gt;clk_mgr-&gt;dp_dto_source_clock_in_khz;</div><div class='add'>+</div><div class='ctx'> 	// For these signal types Driver to program DP_DTO without calling VBIOS Command table</div><div class='ctx'> 	if (dc_is_dp_signal(pix_clk_params-&gt;signal_type) || dc_is_virtual_signal(pix_clk_params-&gt;signal_type)) {</div><div class='ctx'> 		if (e) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h<br/>index 0721ae895ae9..94128f7a18b1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h</a></div><div class='hunk'>@@ -257,7 +257,7 @@ bool dce110_clk_src_construct(</div><div class='ctx'> 	struct dce110_clk_src *clk_src,</div><div class='ctx'> 	struct dc_context *ctx,</div><div class='ctx'> 	struct dc_bios *bios,</div><div class='del'>-	enum clock_source_id,</div><div class='add'>+	enum clock_source_id id,</div><div class='ctx'> 	const struct dce110_clk_src_regs *regs,</div><div class='ctx'> 	const struct dce110_clk_src_shift *cs_shift,</div><div class='ctx'> 	const struct dce110_clk_src_mask *cs_mask);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c<br/>index ccc154b0281c..3b9011ef9b68 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c</a></div><div class='hunk'>@@ -28,6 +28,8 @@</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> #include "core_types.h"</div><div class='ctx'> #include "dmub_cmd.h"</div><div class='add'>+#include "dc_dmub_srv.h"</div><div class='add'>+#include "dmub/dmub_srv.h"</div><div class='ctx'> </div><div class='ctx'> #define TO_DMUB_ABM(abm)\</div><div class='ctx'> 	container_of(abm, struct dce_abm, base)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c<br/>index 0d7e7f3b81a1..a641ae04450c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dce/dmub_abm_lcd.c</a></div><div class='hunk'>@@ -240,7 +240,8 @@ bool dmub_abm_save_restore(</div><div class='ctx'> 	cmd.abm_save_restore.abm_init_config_data.version = DMUB_CMD_ABM_CONTROL_VERSION_1;</div><div class='ctx'> 	cmd.abm_save_restore.abm_init_config_data.panel_mask = panel_mask;</div><div class='ctx'> </div><div class='del'>-	cmd.abm_save_restore.header.payload_bytes = sizeof(struct dmub_rb_cmd_abm_save_restore);</div><div class='add'>+	cmd.abm_save_restore.header.payload_bytes =</div><div class='add'>+			sizeof(struct dmub_rb_cmd_abm_save_restore) - sizeof(struct dmub_cmd_header);</div><div class='ctx'> </div><div class='ctx'> 	dc_wake_and_execute_dmub_cmd(dc, &amp;cmd, DM_DMUB_WAIT_TYPE_WAIT);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c b/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c<br/>index c31e4f26a305..fcd3d86ad517 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c</a></div><div class='hunk'>@@ -280,7 +280,9 @@ static void dmub_replay_set_power_opt_and_coasting_vtotal(struct dmub_replay *dm</div><div class='ctx'> 	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='ctx'> 	pCmd-&gt;header.type = DMUB_CMD__REPLAY;</div><div class='ctx'> 	pCmd-&gt;header.sub_type = DMUB_CMD__REPLAY_SET_POWER_OPT_AND_COASTING_VTOTAL;</div><div class='del'>-	pCmd-&gt;header.payload_bytes = sizeof(struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal);</div><div class='add'>+	pCmd-&gt;header.payload_bytes =</div><div class='add'>+			sizeof(struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal) -</div><div class='add'>+			sizeof(struct dmub_cmd_header);</div><div class='ctx'> 	pCmd-&gt;replay_set_power_opt_data.power_opt = power_opt;</div><div class='ctx'> 	pCmd-&gt;replay_set_power_opt_data.panel_inst = panel_inst;</div><div class='ctx'> 	pCmd-&gt;replay_set_coasting_vtotal_data.coasting_vtotal = (coasting_vtotal &amp; 0xFFFF);</div><div class='hunk'>@@ -319,7 +321,8 @@ static void dmub_replay_send_cmd(struct dmub_replay *dmub,</div><div class='ctx'> 		cmd.replay_set_timing_sync.header.sub_type =</div><div class='ctx'> 			DMUB_CMD__REPLAY_SET_TIMING_SYNC_SUPPORTED;</div><div class='ctx'> 		cmd.replay_set_timing_sync.header.payload_bytes =</div><div class='del'>-			sizeof(struct dmub_rb_cmd_replay_set_timing_sync);</div><div class='add'>+			sizeof(struct dmub_rb_cmd_replay_set_timing_sync) -</div><div class='add'>+			sizeof(struct dmub_cmd_header);</div><div class='ctx'> 		//Cmd Body</div><div class='ctx'> 		cmd.replay_set_timing_sync.replay_set_timing_sync_data.panel_inst =</div><div class='ctx'> 						cmd_element-&gt;sync_data.panel_inst;</div><div class='hunk'>@@ -331,7 +334,8 @@ static void dmub_replay_send_cmd(struct dmub_replay *dmub,</div><div class='ctx'> 		cmd.replay_set_frameupdate_timer.header.sub_type =</div><div class='ctx'> 			DMUB_CMD__REPLAY_SET_RESIDENCY_FRAMEUPDATE_TIMER;</div><div class='ctx'> 		cmd.replay_set_frameupdate_timer.header.payload_bytes =</div><div class='del'>-			sizeof(struct dmub_rb_cmd_replay_set_frameupdate_timer);</div><div class='add'>+			sizeof(struct dmub_rb_cmd_replay_set_frameupdate_timer) -</div><div class='add'>+			sizeof(struct dmub_cmd_header);</div><div class='ctx'> 		//Cmd Body</div><div class='ctx'> 		cmd.replay_set_frameupdate_timer.data.panel_inst =</div><div class='ctx'> 						cmd_element-&gt;panel_inst;</div><div class='hunk'>@@ -345,7 +349,8 @@ static void dmub_replay_send_cmd(struct dmub_replay *dmub,</div><div class='ctx'> 		cmd.replay_set_pseudo_vtotal.header.sub_type =</div><div class='ctx'> 			DMUB_CMD__REPLAY_SET_PSEUDO_VTOTAL;</div><div class='ctx'> 		cmd.replay_set_pseudo_vtotal.header.payload_bytes =</div><div class='del'>-			sizeof(struct dmub_rb_cmd_replay_set_pseudo_vtotal);</div><div class='add'>+			sizeof(struct dmub_rb_cmd_replay_set_pseudo_vtotal) -</div><div class='add'>+			sizeof(struct dmub_cmd_header);</div><div class='ctx'> 		//Cmd Body</div><div class='ctx'> 		cmd.replay_set_pseudo_vtotal.data.panel_inst =</div><div class='ctx'> 			cmd_element-&gt;pseudo_vtotal_data.panel_inst;</div><div class='hunk'>@@ -357,7 +362,8 @@ static void dmub_replay_send_cmd(struct dmub_replay *dmub,</div><div class='ctx'> 		cmd.replay_disabled_adaptive_sync_sdp.header.sub_type =</div><div class='ctx'> 			DMUB_CMD__REPLAY_DISABLED_ADAPTIVE_SYNC_SDP;</div><div class='ctx'> 		cmd.replay_disabled_adaptive_sync_sdp.header.payload_bytes =</div><div class='del'>-			sizeof(struct dmub_rb_cmd_replay_disabled_adaptive_sync_sdp);</div><div class='add'>+			sizeof(struct dmub_rb_cmd_replay_disabled_adaptive_sync_sdp) -</div><div class='add'>+			sizeof(struct dmub_cmd_header);</div><div class='ctx'> 		//Cmd Body</div><div class='ctx'> 		cmd.replay_disabled_adaptive_sync_sdp.data.panel_inst =</div><div class='ctx'> 			cmd_element-&gt;disabled_adaptive_sync_sdp_data.panel_inst;</div><div class='hunk'>@@ -369,7 +375,8 @@ static void dmub_replay_send_cmd(struct dmub_replay *dmub,</div><div class='ctx'> 		cmd.replay_set_general_cmd.header.sub_type =</div><div class='ctx'> 			DMUB_CMD__REPLAY_SET_GENERAL_CMD;</div><div class='ctx'> 		cmd.replay_set_general_cmd.header.payload_bytes =</div><div class='del'>-			sizeof(struct dmub_rb_cmd_replay_set_general_cmd);</div><div class='add'>+			sizeof(struct dmub_rb_cmd_replay_set_general_cmd) -</div><div class='add'>+			sizeof(struct dmub_cmd_header);</div><div class='ctx'> 		//Cmd Body</div><div class='ctx'> 		cmd.replay_set_general_cmd.data.panel_inst =</div><div class='ctx'> 			cmd_element-&gt;set_general_cmd_data.panel_inst;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce60/Makefile b/drivers/gpu/drm/amd/display/dc/dce60/Makefile<br/>index eede83ad91fa..824f73eb3326 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce60/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce60/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce60/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dce60/Makefile</a></div><div class='hunk'>@@ -25,8 +25,7 @@</div><div class='ctx'> </div><div class='ctx'> CFLAGS_$(AMDDALPATH)/dc/dce60/dce60_resource.o = -Wno-override-init</div><div class='ctx'> </div><div class='del'>-DCE60 = dce60_timing_generator.o dce60_hw_sequencer.o \</div><div class='del'>-	dce60_resource.o</div><div class='add'>+DCE60 = dce60_timing_generator.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_DCE60 = $(addprefix $(AMDDALPATH)/dc/dce60/,$(DCE60))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c<br/>index 003a9330c286..88e7a1fc9a30 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dce80/dce80_timing_generator.c</a></div><div class='hunk'>@@ -105,7 +105,7 @@ static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz)</div><div class='ctx'> 	dm_write_reg(tg-&gt;ctx, addr, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void program_timing(struct timing_generator *tg,</div><div class='add'>+static void dce80_timing_generator_program_timing(struct timing_generator *tg,</div><div class='ctx'> 	const struct dc_crtc_timing *timing,</div><div class='ctx'> 	int vready_offset,</div><div class='ctx'> 	int vstartup_start,</div><div class='hunk'>@@ -185,7 +185,7 @@ static void dce80_timing_generator_enable_advanced_request(</div><div class='ctx'> </div><div class='ctx'> static const struct timing_generator_funcs dce80_tg_funcs = {</div><div class='ctx'> 		.validate_timing = dce110_tg_validate_timing,</div><div class='del'>-		.program_timing = program_timing,</div><div class='add'>+		.program_timing = dce80_timing_generator_program_timing,</div><div class='ctx'> 		.enable_crtc = dce110_timing_generator_enable_crtc,</div><div class='ctx'> 		.disable_crtc = dce110_timing_generator_disable_crtc,</div><div class='ctx'> 		.is_counter_moving = dce110_timing_generator_is_counter_moving,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/amd/display/dc/dm_helpers.h<br/>index 5efddd48d5c5..9d160b39e8c5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dm_helpers.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dm_helpers.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dm_helpers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dm_helpers.h</a></div><div class='hunk'>@@ -153,6 +153,14 @@ bool dm_helpers_submit_i2c(</div><div class='ctx'> 		const struct dc_link *link,</div><div class='ctx'> 		struct i2c_command *cmd);</div><div class='ctx'> </div><div class='add'>+bool dm_helpers_execute_fused_io(</div><div class='add'>+		struct dc_context *ctx,</div><div class='add'>+		struct dc_link *link,</div><div class='add'>+		union dmub_rb_cmd *commands,</div><div class='add'>+		uint8_t count,</div><div class='add'>+		uint32_t timeout_us</div><div class='add'>+);</div><div class='add'>+</div><div class='ctx'> bool dm_helpers_dp_write_dsc_enable(</div><div class='ctx'> 		struct dc_context *ctx,</div><div class='ctx'> 		const struct dc_stream_state *stream,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c<br/>index f1fe49401bc0..8d24763938ea 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c</a></div><div class='hunk'>@@ -1002,6 +1002,7 @@ static bool CalculatePrefetchSchedule(</div><div class='ctx'> </div><div class='ctx'> 	dst_y_prefetch_equ = VStartup - (Tsetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime</div><div class='ctx'> 			- (*DSTYAfterScaler + *DSTXAfterScaler / myPipe-&gt;HTotal);</div><div class='add'>+	dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH</div><div class='ctx'> </div><div class='ctx'> 	Lsw_oto = dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC);</div><div class='ctx'> 	Tsw_oto = Lsw_oto * LineTime;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c<br/>index f567a9023682..ed59c77bc6f6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c</a></div><div class='hunk'>@@ -1105,6 +1105,7 @@ static bool CalculatePrefetchSchedule(</div><div class='ctx'> 	Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;</div><div class='ctx'> 	dst_y_prefetch_oto = Tvm_oto_lines + 2 * Tr0_oto_lines + Lsw_oto;</div><div class='ctx'> 	dst_y_prefetch_equ =  VStartup - (*TSetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime - (*DSTYAfterScaler + *DSTXAfterScaler / myPipe-&gt;HTotal);</div><div class='add'>+	dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH</div><div class='ctx'> 	dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;</div><div class='ctx'> 	Tpre_rounded = dst_y_prefetch_equ * LineTime;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c b/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c<br/>index 5865e8fa2d8e..9f3938a50240 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c</a></div><div class='hunk'>@@ -1123,6 +1123,7 @@ static bool CalculatePrefetchSchedule(</div><div class='ctx'> 	Tr0_oto_lines = dml_ceil(4.0 * Tr0_oto / LineTime, 1) / 4.0;</div><div class='ctx'> 	dst_y_prefetch_oto = Tvm_oto_lines + 2 * Tr0_oto_lines + Lsw_oto;</div><div class='ctx'> 	dst_y_prefetch_equ =  VStartup - (*TSetup + dml_max(TWait + TCalc, *Tdmdl)) / LineTime - (*DSTYAfterScaler + *DSTXAfterScaler / myPipe-&gt;HTotal);</div><div class='add'>+	dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH</div><div class='ctx'> 	dst_y_prefetch_equ = dml_floor(4.0 * (dst_y_prefetch_equ + 0.125), 1) / 4.0;</div><div class='ctx'> 	Tpre_rounded = dst_y_prefetch_equ * LineTime;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c<br/>index 56dda686e299..b0fc1fd20208 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c</a></div><div class='hunk'>@@ -627,6 +627,7 @@ static bool dcn32_assign_subvp_pipe(struct dc *dc,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (pipe-&gt;plane_state &amp;&amp; !pipe-&gt;top_pipe &amp;&amp; !pipe-&gt;prev_odm_pipe &amp;&amp; !dcn32_is_center_timing(pipe) &amp;&amp;</div><div class='ctx'> 				!pipe-&gt;stream-&gt;hw_cursor_req &amp;&amp;</div><div class='add'>+				!dc_state_get_stream_cursor_subvp_limit(pipe-&gt;stream, context) &amp;&amp;</div><div class='ctx'> 				!(pipe-&gt;stream-&gt;timing.pix_clk_100hz / 10000 &gt; DCN3_2_MAX_SUBVP_PIXEL_RATE_MHZ) &amp;&amp;</div><div class='ctx'> 				(!dcn32_is_psr_capable(pipe) || (context-&gt;stream_count == 1 &amp;&amp; dc-&gt;caps.dmub_caps.subvp_psr)) &amp;&amp;</div><div class='ctx'> 				dc_state_get_pipe_subvp_type(context, pipe) == SUBVP_NONE &amp;&amp;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/Makefile b/drivers/gpu/drm/amd/display/dc/dml2/Makefile<br/>index 21fd466dba26..157ecf008d6c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/Makefile</a></div><div class='hunk'>@@ -99,7 +99,6 @@ CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_standalone_libraries/lib_float_math.</div><div class='ctx'> CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/src/dml21_wrapper.o := $(dml2_ccflags)</div><div class='ctx'> CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/dml21_translation_helper.o := $(dml2_ccflags)</div><div class='ctx'> CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/dml21_utils.o := $(dml2_ccflags)</div><div class='del'>-CFLAGS_$(AMDDALPATH)/dc/dml2/dml21/inc/dml2_debug.o := $(dml2_ccflags)</div><div class='ctx'> </div><div class='ctx'> CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml2_top_interfaces.o := $(dml2_rcflags)</div><div class='ctx'> CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.o := $(dml2_rcflags)</div><div class='hunk'>@@ -117,11 +116,9 @@ CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml2_standalone_libraries/lib_floa</div><div class='ctx'> CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/src/dml21_wrapper.o := $(dml2_rcflags)</div><div class='ctx'> CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/dml21_translation_helper.o := $(dml2_rcflags)</div><div class='ctx'> CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/dml21_utils.o := $(dml2_rcflags)</div><div class='del'>-CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml2/dml21/inc/dml2_debug.o := $(dml2_rcflags)</div><div class='ctx'> </div><div class='ctx'> DML21 := src/dml2_top/dml2_top_interfaces.o</div><div class='ctx'> DML21 += src/dml2_top/dml2_top_soc15.o</div><div class='del'>-DML21 += src/inc/dml2_debug.o</div><div class='ctx'> DML21 += src/dml2_core/dml2_core_dcn4.o</div><div class='ctx'> DML21 += src/dml2_core/dml2_core_factory.o</div><div class='ctx'> DML21 += src/dml2_core/dml2_core_dcn4_calcs.o</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c<br/>index 0c8ec30ea672..d47cacfdb695 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c</a></div><div class='hunk'>@@ -526,7 +526,8 @@ static void populate_dml21_output_config_from_stream_state(struct dml2_link_outp</div><div class='ctx'> </div><div class='ctx'> static void populate_dml21_stream_overrides_from_stream_state(</div><div class='ctx'> 		struct dml2_stream_parameters *stream_desc,</div><div class='del'>-		struct dc_stream_state *stream)</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_stream_status *stream_status)</div><div class='ctx'> {</div><div class='ctx'> 	switch (stream-&gt;debug.force_odm_combine_segments) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -551,7 +552,9 @@ static void populate_dml21_stream_overrides_from_stream_state(</div><div class='ctx'> 	if (!stream-&gt;ctx-&gt;dc-&gt;debug.enable_single_display_2to1_odm_policy ||</div><div class='ctx'> 			stream-&gt;debug.force_odm_combine_segments &gt; 0)</div><div class='ctx'> 		stream_desc-&gt;overrides.disable_dynamic_odm = true;</div><div class='del'>-	stream_desc-&gt;overrides.disable_subvp = stream-&gt;ctx-&gt;dc-&gt;debug.force_disable_subvp || stream-&gt;hw_cursor_req;</div><div class='add'>+	stream_desc-&gt;overrides.disable_subvp = stream-&gt;ctx-&gt;dc-&gt;debug.force_disable_subvp ||</div><div class='add'>+			stream-&gt;hw_cursor_req ||</div><div class='add'>+			stream_status-&gt;mall_stream_config.cursor_size_limit_subvp;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum dml2_swizzle_mode gfx_addr3_to_dml2_swizzle_mode(enum swizzle_mode_addr3_values addr3_mode)</div><div class='hunk'>@@ -885,6 +888,9 @@ static void populate_dml21_plane_config_from_plane_state(struct dml2_context *dm</div><div class='ctx'> 		case DC_CM2_GPU_MEM_SIZE_171717:</div><div class='ctx'> 			plane-&gt;tdlut.tdlut_width_mode = dml2_tdlut_width_17_cube;</div><div class='ctx'> 			break;</div><div class='add'>+		case DC_CM2_GPU_MEM_SIZE_333333:</div><div class='add'>+			plane-&gt;tdlut.tdlut_width_mode = dml2_tdlut_width_33_cube;</div><div class='add'>+			break;</div><div class='ctx'> 		case DC_CM2_GPU_MEM_SIZE_TRANSFORMED:</div><div class='ctx'> 			//plane-&gt;tdlut.tdlut_width_mode = dml2_tdlut_width_flatten; // dml2_tdlut_width_flatten undefined</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -910,7 +916,7 @@ static void populate_dml21_plane_config_from_plane_state(struct dml2_context *dm</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> //TODO : Could be possibly moved to a common helper layer.</div><div class='del'>-static bool dml21_wrapper_get_plane_id(const struct dc_state *context, const struct dc_plane_state *plane, unsigned int *plane_id)</div><div class='add'>+static bool dml21_wrapper_get_plane_id(const struct dc_state *context, unsigned int stream_id, const struct dc_plane_state *plane, unsigned int *plane_id)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='hunk'>@@ -918,10 +924,12 @@ static bool dml21_wrapper_get_plane_id(const struct dc_state *context, const str</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='del'>-		for (j = 0; j &lt; context-&gt;stream_status[i].plane_count; j++) {</div><div class='del'>-			if (context-&gt;stream_status[i].plane_states[j] == plane) {</div><div class='del'>-				*plane_id = (i &lt;&lt; 16) | j;</div><div class='del'>-				return true;</div><div class='add'>+		if (context-&gt;streams[i]-&gt;stream_id == stream_id) {</div><div class='add'>+			for (j = 0; j &lt; context-&gt;stream_status[i].plane_count; j++) {</div><div class='add'>+				if (context-&gt;stream_status[i].plane_states[j] == plane) {</div><div class='add'>+					*plane_id = (i &lt;&lt; 16) | j;</div><div class='add'>+					return true;</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -944,14 +952,14 @@ static unsigned int map_stream_to_dml21_display_cfg(const struct dml2_context *d</div><div class='ctx'> 	return location;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int map_plane_to_dml21_display_cfg(const struct dml2_context *dml_ctx,</div><div class='add'>+unsigned int map_plane_to_dml21_display_cfg(const struct dml2_context *dml_ctx, unsigned int stream_id,</div><div class='ctx'> 		const struct dc_plane_state *plane, const struct dc_state *context)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int plane_id;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> 	int location = -1;</div><div class='ctx'> </div><div class='del'>-	if (!dml21_wrapper_get_plane_id(context, plane, &amp;plane_id)) {</div><div class='add'>+	if (!dml21_wrapper_get_plane_id(context, stream_id, plane, &amp;plane_id)) {</div><div class='ctx'> 		ASSERT(false);</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1021,7 +1029,7 @@ bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 		populate_dml21_timing_config_from_stream_state(&amp;dml_dispcfg-&gt;stream_descriptors[disp_cfg_stream_location].timing, context-&gt;streams[stream_index], dml_ctx);</div><div class='ctx'> 		adjust_dml21_hblank_timing_config_from_pipe_ctx(&amp;dml_dispcfg-&gt;stream_descriptors[disp_cfg_stream_location].timing, &amp;context-&gt;res_ctx.pipe_ctx[stream_index]);</div><div class='ctx'> 		populate_dml21_output_config_from_stream_state(&amp;dml_dispcfg-&gt;stream_descriptors[disp_cfg_stream_location].output, context-&gt;streams[stream_index], &amp;context-&gt;res_ctx.pipe_ctx[stream_index]);</div><div class='del'>-		populate_dml21_stream_overrides_from_stream_state(&amp;dml_dispcfg-&gt;stream_descriptors[disp_cfg_stream_location], context-&gt;streams[stream_index]);</div><div class='add'>+		populate_dml21_stream_overrides_from_stream_state(&amp;dml_dispcfg-&gt;stream_descriptors[disp_cfg_stream_location], context-&gt;streams[stream_index], &amp;context-&gt;stream_status[stream_index]);</div><div class='ctx'> </div><div class='ctx'> 		dml_dispcfg-&gt;stream_descriptors[disp_cfg_stream_location].overrides.hw.twait_budgeting.fclk_pstate = dml2_twait_budgeting_setting_if_needed;</div><div class='ctx'> 		dml_dispcfg-&gt;stream_descriptors[disp_cfg_stream_location].overrides.hw.twait_budgeting.uclk_pstate = dml2_twait_budgeting_setting_if_needed;</div><div class='hunk'>@@ -1037,7 +1045,7 @@ bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 			dml_dispcfg-&gt;plane_descriptors[disp_cfg_plane_location].stream_index = disp_cfg_stream_location;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			for (plane_index = 0; plane_index &lt; context-&gt;stream_status[stream_index].plane_count; plane_index++) {</div><div class='del'>-				disp_cfg_plane_location = map_plane_to_dml21_display_cfg(dml_ctx, context-&gt;stream_status[stream_index].plane_states[plane_index], context);</div><div class='add'>+				disp_cfg_plane_location = map_plane_to_dml21_display_cfg(dml_ctx, context-&gt;streams[stream_index]-&gt;stream_id, context-&gt;stream_status[stream_index].plane_states[plane_index], context);</div><div class='ctx'> </div><div class='ctx'> 				if (disp_cfg_plane_location &lt; 0)</div><div class='ctx'> 					disp_cfg_plane_location = dml_dispcfg-&gt;num_planes++;</div><div class='hunk'>@@ -1048,7 +1056,7 @@ bool dml21_map_dc_state_into_dml_display_cfg(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 				populate_dml21_plane_config_from_plane_state(dml_ctx, &amp;dml_dispcfg-&gt;plane_descriptors[disp_cfg_plane_location], context-&gt;stream_status[stream_index].plane_states[plane_index], context, stream_index);</div><div class='ctx'> 				dml_dispcfg-&gt;plane_descriptors[disp_cfg_plane_location].stream_index = disp_cfg_stream_location;</div><div class='ctx'> </div><div class='del'>-				if (dml21_wrapper_get_plane_id(context, context-&gt;stream_status[stream_index].plane_states[plane_index], &amp;dml_ctx-&gt;v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id[disp_cfg_plane_location]))</div><div class='add'>+				if (dml21_wrapper_get_plane_id(context, context-&gt;streams[stream_index]-&gt;stream_id, context-&gt;stream_status[stream_index].plane_states[plane_index], &amp;dml_ctx-&gt;v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id[disp_cfg_plane_location]))</div><div class='ctx'> 					dml_ctx-&gt;v21.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id_valid[disp_cfg_plane_location] = true;</div><div class='ctx'> </div><div class='ctx'> 				/* apply forced pstate policy */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h<br/>index 069b939c672a..73a013be1e48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_translation_helper.h</a></div><div class='hunk'>@@ -11,6 +11,7 @@ struct dc_state;</div><div class='ctx'> struct dcn_watermarks;</div><div class='ctx'> union dcn_watermark_set;</div><div class='ctx'> struct pipe_ctx;</div><div class='add'>+struct dc_plane_state;</div><div class='ctx'> </div><div class='ctx'> struct dml2_context;</div><div class='ctx'> struct dml2_configuration_options;</div><div class='hunk'>@@ -25,4 +26,5 @@ void dml21_extract_watermark_sets(const struct dc *in_dc, union dcn_watermark_se</div><div class='ctx'> void dml21_map_hw_resources(struct dml2_context *dml_ctx);</div><div class='ctx'> void dml21_get_pipe_mcache_config(struct dc_state *context, struct pipe_ctx *pipe_ctx, struct dml2_per_plane_programming *pln_prog, struct dml2_pipe_configuration_descriptor *mcache_pipe_config);</div><div class='ctx'> void dml21_set_dc_p_state_type(struct pipe_ctx *pipe_ctx, struct dml2_per_stream_programming *stream_programming, bool sub_vp_enabled);</div><div class='add'>+unsigned int map_plane_to_dml21_display_cfg(const struct dml2_context *dml_ctx, unsigned int stream_id, const struct dc_plane_state *plane, const struct dc_state *context);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c<br/>index be54f0e696ce..208d3651b6ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> //</div><div class='ctx'> // Copyright 2024 Advanced Micro Devices, Inc.</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "dml2_internal_types.h"</div><div class='ctx'> #include "dml_top.h"</div><div class='hunk'>@@ -11,13 +12,15 @@</div><div class='ctx'> #include "dml21_translation_helper.h"</div><div class='ctx'> #include "dml2_dc_resource_mgmt.h"</div><div class='ctx'> </div><div class='add'>+#define INVALID -1</div><div class='add'>+</div><div class='ctx'> static bool dml21_allocate_memory(struct dml2_context **dml_ctx)</div><div class='ctx'> {</div><div class='del'>-	*dml_ctx = kzalloc(sizeof(struct dml2_context), GFP_KERNEL);</div><div class='add'>+	*dml_ctx = vzalloc(sizeof(struct dml2_context));</div><div class='ctx'> 	if (!(*dml_ctx))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	(*dml_ctx)-&gt;v21.dml_init.dml2_instance = kzalloc(sizeof(struct dml2_instance), GFP_KERNEL);</div><div class='add'>+	(*dml_ctx)-&gt;v21.dml_init.dml2_instance = vzalloc(sizeof(struct dml2_instance));</div><div class='ctx'> 	if (!((*dml_ctx)-&gt;v21.dml_init.dml2_instance))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -27,7 +30,7 @@ static bool dml21_allocate_memory(struct dml2_context **dml_ctx)</div><div class='ctx'> 	(*dml_ctx)-&gt;v21.mode_support.display_config = &amp;(*dml_ctx)-&gt;v21.display_config;</div><div class='ctx'> 	(*dml_ctx)-&gt;v21.mode_programming.display_config = (*dml_ctx)-&gt;v21.mode_support.display_config;</div><div class='ctx'> </div><div class='del'>-	(*dml_ctx)-&gt;v21.mode_programming.programming = kzalloc(sizeof(struct dml2_display_cfg_programming), GFP_KERNEL);</div><div class='add'>+	(*dml_ctx)-&gt;v21.mode_programming.programming = vzalloc(sizeof(struct dml2_display_cfg_programming));</div><div class='ctx'> 	if (!((*dml_ctx)-&gt;v21.mode_programming.programming))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -86,6 +89,8 @@ static void dml21_init(const struct dc *in_dc, struct dml2_context **dml_ctx, co</div><div class='ctx'> 	/* Store configuration options */</div><div class='ctx'> 	(*dml_ctx)-&gt;config = *config;</div><div class='ctx'> </div><div class='add'>+	DC_FP_START();</div><div class='add'>+</div><div class='ctx'> 	/*Initialize SOCBB and DCNIP params */</div><div class='ctx'> 	dml21_initialize_soc_bb_params(&amp;(*dml_ctx)-&gt;v21.dml_init, config, in_dc);</div><div class='ctx'> 	dml21_initialize_ip_params(&amp;(*dml_ctx)-&gt;v21.dml_init, config, in_dc);</div><div class='hunk'>@@ -96,6 +101,8 @@ static void dml21_init(const struct dc *in_dc, struct dml2_context **dml_ctx, co</div><div class='ctx'> </div><div class='ctx'> 	/*Initialize DML21 instance */</div><div class='ctx'> 	dml2_initialize_instance(&amp;(*dml_ctx)-&gt;v21.dml_init);</div><div class='add'>+</div><div class='add'>+	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dml21_create(const struct dc *in_dc, struct dml2_context **dml_ctx, const struct dml2_configuration_options *config)</div><div class='hunk'>@@ -111,8 +118,8 @@ bool dml21_create(const struct dc *in_dc, struct dml2_context **dml_ctx, const s</div><div class='ctx'> </div><div class='ctx'> void dml21_destroy(struct dml2_context *dml2)</div><div class='ctx'> {</div><div class='del'>-	kfree(dml2-&gt;v21.dml_init.dml2_instance);</div><div class='del'>-	kfree(dml2-&gt;v21.mode_programming.programming);</div><div class='add'>+	vfree(dml2-&gt;v21.dml_init.dml2_instance);</div><div class='add'>+	vfree(dml2-&gt;v21.mode_programming.programming);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dml21_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_state *context, struct resource_context *out_new_hw_state,</div><div class='hunk'>@@ -203,10 +210,40 @@ static void dml21_calculate_rq_and_dlg_params(const struct dc *dc, struct dc_sta</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dml21_prepare_mcache_params(struct dml2_context *dml_ctx, struct dc_state *context, struct dc_mcache_params *mcache_params)</div><div class='add'>+{</div><div class='add'>+	int dc_plane_idx = 0;</div><div class='add'>+	int dml_prog_idx, stream_idx, plane_idx;</div><div class='add'>+	struct dml2_per_plane_programming *pln_prog = NULL;</div><div class='add'>+</div><div class='add'>+	for (stream_idx = 0; stream_idx &lt; context-&gt;stream_count; stream_idx++) {</div><div class='add'>+		for (plane_idx = 0; plane_idx &lt; context-&gt;stream_status[stream_idx].plane_count; plane_idx++) {</div><div class='add'>+			dml_prog_idx = map_plane_to_dml21_display_cfg(dml_ctx, context-&gt;streams[stream_idx]-&gt;stream_id, context-&gt;stream_status[stream_idx].plane_states[plane_idx], context);</div><div class='add'>+			if (dml_prog_idx == INVALID) {</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+			pln_prog = &amp;dml_ctx-&gt;v21.mode_programming.programming-&gt;plane_programming[dml_prog_idx];</div><div class='add'>+			mcache_params[dc_plane_idx].valid = pln_prog-&gt;mcache_allocation.valid;</div><div class='add'>+			mcache_params[dc_plane_idx].num_mcaches_plane0 = pln_prog-&gt;mcache_allocation.num_mcaches_plane0;</div><div class='add'>+			mcache_params[dc_plane_idx].num_mcaches_plane1 = pln_prog-&gt;mcache_allocation.num_mcaches_plane1;</div><div class='add'>+			mcache_params[dc_plane_idx].requires_dedicated_mall_mcache = pln_prog-&gt;mcache_allocation.requires_dedicated_mall_mcache;</div><div class='add'>+			mcache_params[dc_plane_idx].last_slice_sharing.plane0_plane1 = pln_prog-&gt;mcache_allocation.last_slice_sharing.plane0_plane1;</div><div class='add'>+			memcpy(mcache_params[dc_plane_idx].mcache_x_offsets_plane0,</div><div class='add'>+				pln_prog-&gt;mcache_allocation.mcache_x_offsets_plane0,</div><div class='add'>+				sizeof(int) * (DML2_MAX_MCACHES + 1));</div><div class='add'>+			memcpy(mcache_params[dc_plane_idx].mcache_x_offsets_plane1,</div><div class='add'>+				pln_prog-&gt;mcache_allocation.mcache_x_offsets_plane1,</div><div class='add'>+				sizeof(int) * (DML2_MAX_MCACHES + 1));</div><div class='add'>+			dc_plane_idx++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool dml21_mode_check_and_programming(const struct dc *in_dc, struct dc_state *context, struct dml2_context *dml_ctx)</div><div class='ctx'> {</div><div class='ctx'> 	bool result = false;</div><div class='ctx'> 	struct dml2_build_mode_programming_in_out *mode_programming = &amp;dml_ctx-&gt;v21.mode_programming;</div><div class='add'>+	struct dc_mcache_params mcache_params[MAX_PLANES] = {0};</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;dml_ctx-&gt;v21.display_config, 0, sizeof(struct dml2_display_cfg));</div><div class='ctx'> 	memset(&amp;dml_ctx-&gt;v21.dml_to_dc_pipe_mapping, 0, sizeof(struct dml2_dml_to_dc_pipe_mapping));</div><div class='hunk'>@@ -229,7 +266,9 @@ static bool dml21_mode_check_and_programming(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 	if (!result)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	DC_FP_START();</div><div class='ctx'> 	result = dml2_build_mode_programming(mode_programming);</div><div class='add'>+	DC_FP_END();</div><div class='ctx'> 	if (!result)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -239,6 +278,14 @@ static bool dml21_mode_check_and_programming(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 		dml2_map_dc_pipes(dml_ctx, context, NULL, &amp;dml_ctx-&gt;v21.dml_to_dc_pipe_mapping, in_dc-&gt;current_state);</div><div class='ctx'> 		/* if subvp phantoms are present, expand them into dc context */</div><div class='ctx'> 		dml21_handle_phantom_streams_planes(in_dc, context, dml_ctx);</div><div class='add'>+</div><div class='add'>+		if (in_dc-&gt;res_pool-&gt;funcs-&gt;program_mcache_pipe_config) {</div><div class='add'>+			//Prepare mcache params for each plane based on mcache output from DML</div><div class='add'>+			dml21_prepare_mcache_params(dml_ctx, context, mcache_params);</div><div class='add'>+</div><div class='add'>+			//populate mcache regs to each pipe</div><div class='add'>+			dml_ctx-&gt;config.callbacks.allocate_mcache(context, mcache_params);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Copy DML CLK, WM and REG outputs to bandwidth context */</div><div class='hunk'>@@ -272,7 +319,9 @@ static bool dml21_check_mode_support(const struct dc *in_dc, struct dc_state *co</div><div class='ctx'> 	mode_support-&gt;dml2_instance = dml_init-&gt;dml2_instance;</div><div class='ctx'> 	dml21_map_dc_state_into_dml_display_cfg(in_dc, context, dml_ctx);</div><div class='ctx'> 	dml_ctx-&gt;v21.mode_programming.dml2_instance-&gt;scratch.build_mode_programming_locals.mode_programming_params.programming = dml_ctx-&gt;v21.mode_programming.programming;</div><div class='add'>+	DC_FP_START();</div><div class='ctx'> 	is_supported = dml2_check_mode_supported(mode_support);</div><div class='add'>+	DC_FP_END();</div><div class='ctx'> 	if (!is_supported)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -284,10 +333,11 @@ bool dml21_validate(const struct dc *in_dc, struct dc_state *context, struct dml</div><div class='ctx'> 	bool out = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Use dml_validate_only for fast_validate path */</div><div class='del'>-	if (fast_validate) {</div><div class='add'>+	if (fast_validate)</div><div class='ctx'> 		out = dml21_check_mode_support(in_dc, context, dml_ctx);</div><div class='del'>-	} else</div><div class='add'>+	else</div><div class='ctx'> 		out = dml21_mode_check_and_programming(in_dc, context, dml_ctx);</div><div class='add'>+</div><div class='ctx'> 	return out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -426,8 +476,12 @@ void dml21_copy(struct dml2_context *dst_dml_ctx,</div><div class='ctx'> </div><div class='ctx'> 	dst_dml_ctx-&gt;v21.mode_programming.programming = dst_dml2_programming;</div><div class='ctx'> </div><div class='add'>+	DC_FP_START();</div><div class='add'>+</div><div class='ctx'> 	/* need to initialize copied instance for internal references to be correct */</div><div class='ctx'> 	dml2_initialize_instance(&amp;dst_dml_ctx-&gt;v21.dml_init);</div><div class='add'>+</div><div class='add'>+	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dml21_create_copy(struct dml2_context **dst_dml_ctx,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h<br/>index b2075b8c363b..42e715024bc9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "os_types.h"</div><div class='ctx'> #include "dml_top_soc_parameter_types.h"</div><div class='add'>+#include "dml_top_display_cfg_types.h"</div><div class='ctx'> </div><div class='ctx'> struct dc;</div><div class='ctx'> struct dc_state;</div><div class='hunk'>@@ -65,4 +66,67 @@ struct socbb_ip_params_external {</div><div class='ctx'> 	struct dml2_ip_capabilities ip_params;</div><div class='ctx'> 	struct dml2_soc_bb soc_bb;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+/*mcache parameters decided by dml*/</div><div class='add'>+struct dc_mcache_params {</div><div class='add'>+	bool valid;</div><div class='add'>+	/*</div><div class='add'>+	* For iMALL, dedicated mall mcaches are required (sharing of last</div><div class='add'>+	* slice possible), for legacy phantom or phantom without return</div><div class='add'>+	* the only mall mcaches need to be valid.</div><div class='add'>+	*/</div><div class='add'>+	bool requires_dedicated_mall_mcache;</div><div class='add'>+	unsigned int num_mcaches_plane0;</div><div class='add'>+	unsigned int num_mcaches_plane1;</div><div class='add'>+	/*</div><div class='add'>+	* Generally, plane0/1 slices must use a disjoint set of caches</div><div class='add'>+	* but in some cases the final segement of the two planes can</div><div class='add'>+	* use the same cache. If plane0_plane1 is set, then this is</div><div class='add'>+	* allowed.</div><div class='add'>+	*</div><div class='add'>+	* Similarly, the caches allocated to MALL prefetcher are generally</div><div class='add'>+	* disjoint, but if mall_prefetch is set, then the final segment</div><div class='add'>+	* between the main and the mall pixel requestor can use the same</div><div class='add'>+	* cache.</div><div class='add'>+	*</div><div class='add'>+	* Note that both bits may be set at the same time.</div><div class='add'>+	*/</div><div class='add'>+	struct {</div><div class='add'>+		bool mall_comb_mcache_p0;</div><div class='add'>+		bool mall_comb_mcache_p1;</div><div class='add'>+		bool plane0_plane1;</div><div class='add'>+	} last_slice_sharing;</div><div class='add'>+	/*</div><div class='add'>+	* A plane is divided into vertical slices of mcaches,</div><div class='add'>+	* which wrap on the surface width.</div><div class='add'>+	*</div><div class='add'>+	* For example, if the surface width is 7680, and split into</div><div class='add'>+	* three slices of equal width, the boundary array would contain</div><div class='add'>+	* [2560, 5120, 7680]</div><div class='add'>+	*</div><div class='add'>+	* The assignments are</div><div class='add'>+	* 0 = [0 .. 2559]</div><div class='add'>+	* 1 = [2560 .. 5119]</div><div class='add'>+	* 2 = [5120 .. 7679]</div><div class='add'>+	* 0 = [7680 .. INF]</div><div class='add'>+	* The final element implicitly is the same as the first, and</div><div class='add'>+	* at first seems invalid since it is never referenced (since)</div><div class='add'>+	* it is outside the surface. However, its useful when shifting</div><div class='add'>+	* (see below).</div><div class='add'>+	*</div><div class='add'>+	* For any given valid mcache assignment, a shifted version, wrapped</div><div class='add'>+	* on the surface width boundary is also assumed to be valid.</div><div class='add'>+	*</div><div class='add'>+	* For example, shifting [2560, 5120, 7680] by -50 results in</div><div class='add'>+	* [2510, 5170, 7630].</div><div class='add'>+	*</div><div class='add'>+	* The assignments are now:</div><div class='add'>+	* 0 = [0 .. 2509]</div><div class='add'>+	* 1 = [2510 .. 5169]</div><div class='add'>+	* 2 = [5170 .. 7629]</div><div class='add'>+	* 0 = [7630 .. INF]</div><div class='add'>+	*/</div><div class='add'>+	int mcache_x_offsets_plane0[DML2_MAX_MCACHES + 1];</div><div class='add'>+	int mcache_x_offsets_plane1[DML2_MAX_MCACHES + 1];</div><div class='add'>+};</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h<br/>index a64ec4dcf11a..c047d56527c4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top.h</a></div><div class='hunk'>@@ -43,4 +43,5 @@ bool dml2_build_mode_programming(struct dml2_build_mode_programming_in_out *in_o</div><div class='ctx'>  */</div><div class='ctx'> bool dml2_build_mcache_programming(struct dml2_build_mcache_programming_in_out *in_out);</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h<br/>index 25b607e7b726..84c90050668c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_dchub_registers.h</a></div><div class='hunk'>@@ -156,6 +156,8 @@ struct dml2_dchub_watermark_regs {</div><div class='ctx'> 	uint32_t urgent;</div><div class='ctx'> 	uint32_t sr_enter;</div><div class='ctx'> 	uint32_t sr_exit;</div><div class='add'>+	uint32_t sr_enter_z8;</div><div class='add'>+	uint32_t sr_exit_z8;</div><div class='ctx'> 	uint32_t uclk_pstate;</div><div class='ctx'> 	uint32_t fclk_pstate;</div><div class='ctx'> 	uint32_t temp_read_or_ppt;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h<br/>index 5e1ab6d97640..255f05de362c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/dml_top_display_cfg_types.h</a></div><div class='hunk'>@@ -166,7 +166,7 @@ struct dml2_surface_cfg {</div><div class='ctx'> 	enum dml2_swizzle_mode tiling;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='del'>-		unsigned long pitch;</div><div class='add'>+		unsigned long pitch; // In elements, two pixels per element in 422 packed format</div><div class='ctx'> 		unsigned long width;</div><div class='ctx'> 		unsigned long height;</div><div class='ctx'> 	} plane0;</div><div class='hunk'>@@ -385,6 +385,7 @@ struct dml2_plane_parameters {</div><div class='ctx'> 		long reserved_vblank_time_ns;</div><div class='ctx'> 		unsigned int max_vactive_det_fill_delay_us; // 0 = no reserved time, +ve = explicit max delay</div><div class='ctx'> 		unsigned int gpuvm_min_page_size_kbytes;</div><div class='add'>+		unsigned int hostvm_min_page_size_kbytes;</div><div class='ctx'> </div><div class='ctx'> 		enum dml2_svp_mode_override legacy_svp_config; //TODO remove in favor of svp_config</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c<br/>index bb863c8c6b39..6ee37386f672 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4.c</a></div><div class='hunk'>@@ -456,10 +456,10 @@ bool core_dcn4_mode_support(struct dml2_core_mode_support_in_out *in_out)</div><div class='ctx'> 		in_out-&gt;mode_support_result.global.active.urgent_bw_dram_kbps = (unsigned long)math_ceil2((l-&gt;mode_support_ex_params.out_evaluation_info-&gt;urg_bandwidth_required_flip[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram] * 1000), 1.0);</div><div class='ctx'> 		in_out-&gt;mode_support_result.global.svp_prefetch.average_bw_dram_kbps = (unsigned long)math_ceil2((l-&gt;mode_support_ex_params.out_evaluation_info-&gt;avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram] * 1000), 1.0);</div><div class='ctx'> 		in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_dram_kbps = (unsigned long)math_ceil2((l-&gt;mode_support_ex_params.out_evaluation_info-&gt;urg_bandwidth_required_flip[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram] * 1000), 1.0);</div><div class='del'>-		dml2_printf("DML::%s: in_out-&gt;mode_support_result.global.active.urgent_bw_sdp_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.active.urgent_bw_sdp_kbps);</div><div class='del'>-		dml2_printf("DML::%s: in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_sdp_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_sdp_kbps);</div><div class='del'>-		dml2_printf("DML::%s: in_out-&gt;mode_support_result.global.active.urgent_bw_dram_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.active.urgent_bw_dram_kbps);</div><div class='del'>-		dml2_printf("DML::%s: in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_dram_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_dram_kbps);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: in_out-&gt;mode_support_result.global.active.urgent_bw_sdp_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.active.urgent_bw_sdp_kbps);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_sdp_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_sdp_kbps);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: in_out-&gt;mode_support_result.global.active.urgent_bw_dram_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.active.urgent_bw_dram_kbps);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_dram_kbps = %ld\n", __func__, in_out-&gt;mode_support_result.global.svp_prefetch.urgent_bw_dram_kbps);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; l-&gt;svp_expanded_display_cfg.num_planes; i++) {</div><div class='ctx'> 			in_out-&gt;mode_support_result.per_plane[i].dppclk_khz = (unsigned int)(core-&gt;clean_me_up.mode_lib.ms.RequiredDPPCLK[i] * 1000);</div><div class='hunk'>@@ -509,7 +509,7 @@ bool core_dcn4_mode_support(struct dml2_core_mode_support_in_out *in_out)</div><div class='ctx'> 			stream_index = l-&gt;svp_expanded_display_cfg.plane_descriptors[i].stream_index;</div><div class='ctx'> </div><div class='ctx'> 			in_out-&gt;mode_support_result.per_stream[stream_index].dscclk_khz = (unsigned int)core-&gt;clean_me_up.mode_lib.ms.required_dscclk_freq_mhz[i] * 1000;</div><div class='del'>-			dml2_printf("CORE_DCN4::%s: i=%d stream_index=%d, in_out-&gt;mode_support_result.per_stream[stream_index].dscclk_khz = %u\n", __func__, i, stream_index, in_out-&gt;mode_support_result.per_stream[stream_index].dscclk_khz);</div><div class='add'>+			DML_LOG_VERBOSE("CORE_DCN4::%s: i=%d stream_index=%d, in_out-&gt;mode_support_result.per_stream[stream_index].dscclk_khz = %u\n", __func__, i, stream_index, in_out-&gt;mode_support_result.per_stream[stream_index].dscclk_khz);</div><div class='ctx'> </div><div class='ctx'> 			if (!((stream_bitmask &gt;&gt; stream_index) &amp; 0x1)) {</div><div class='ctx'> 				in_out-&gt;mode_support_result.cfg_support_info.stream_support_info[stream_index].odms_used = odm_count;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c<br/>index 4c504cb0e1c5..c4dad7164d31 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_dcn4_calcs.c</a></div><div class='hunk'>@@ -54,104 +54,104 @@ static double dml2_core_div_rem(double dividend, unsigned int divisor, unsigned</div><div class='ctx'> </div><div class='ctx'> static void dml2_print_mode_support_info(const struct dml2_core_internal_mode_support_info *support, bool fail_only)</div><div class='ctx'> {</div><div class='del'>-	dml2_printf("DML: ===================================== \n");</div><div class='del'>-	dml2_printf("DML: DML_MODE_SUPPORT_INFO_ST\n");</div><div class='add'>+	DML_LOG_VERBOSE("DML: ===================================== \n");</div><div class='add'>+	DML_LOG_VERBOSE("DML: DML_MODE_SUPPORT_INFO_ST\n");</div><div class='ctx'> 	if (!fail_only || support-&gt;ScaleRatioAndTapsSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ScaleRatioAndTapsSupport = %d\n", support-&gt;ScaleRatioAndTapsSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ScaleRatioAndTapsSupport = %d\n", support-&gt;ScaleRatioAndTapsSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;SourceFormatPixelAndScanSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: SourceFormatPixelAndScanSupport = %d\n", support-&gt;SourceFormatPixelAndScanSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: SourceFormatPixelAndScanSupport = %d\n", support-&gt;SourceFormatPixelAndScanSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;ViewportSizeSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ViewportSizeSupport = %d\n", support-&gt;ViewportSizeSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ViewportSizeSupport = %d\n", support-&gt;ViewportSizeSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;LinkRateDoesNotMatchDPVersion == 1)</div><div class='del'>-		dml2_printf("DML: support: LinkRateDoesNotMatchDPVersion = %d\n", support-&gt;LinkRateDoesNotMatchDPVersion);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: LinkRateDoesNotMatchDPVersion = %d\n", support-&gt;LinkRateDoesNotMatchDPVersion);</div><div class='ctx'> 	if (!fail_only || support-&gt;LinkRateForMultistreamNotIndicated == 1)</div><div class='del'>-		dml2_printf("DML: support: LinkRateForMultistreamNotIndicated = %d\n", support-&gt;LinkRateForMultistreamNotIndicated);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: LinkRateForMultistreamNotIndicated = %d\n", support-&gt;LinkRateForMultistreamNotIndicated);</div><div class='ctx'> 	if (!fail_only || support-&gt;BPPForMultistreamNotIndicated == 1)</div><div class='del'>-		dml2_printf("DML: support: BPPForMultistreamNotIndicated = %d\n", support-&gt;BPPForMultistreamNotIndicated);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: BPPForMultistreamNotIndicated = %d\n", support-&gt;BPPForMultistreamNotIndicated);</div><div class='ctx'> 	if (!fail_only || support-&gt;MultistreamWithHDMIOreDP == 1)</div><div class='del'>-		dml2_printf("DML: support: MultistreamWithHDMIOreDP = %d\n", support-&gt;MultistreamWithHDMIOreDP);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: MultistreamWithHDMIOreDP = %d\n", support-&gt;MultistreamWithHDMIOreDP);</div><div class='ctx'> 	if (!fail_only || support-&gt;ExceededMultistreamSlots == 1)</div><div class='del'>-		dml2_printf("DML: support: ExceededMultistreamSlots = %d\n", support-&gt;ExceededMultistreamSlots);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ExceededMultistreamSlots = %d\n", support-&gt;ExceededMultistreamSlots);</div><div class='ctx'> 	if (!fail_only || support-&gt;MSOOrODMSplitWithNonDPLink == 1)</div><div class='del'>-		dml2_printf("DML: support: MSOOrODMSplitWithNonDPLink = %d\n", support-&gt;MSOOrODMSplitWithNonDPLink);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: MSOOrODMSplitWithNonDPLink = %d\n", support-&gt;MSOOrODMSplitWithNonDPLink);</div><div class='ctx'> 	if (!fail_only || support-&gt;NotEnoughLanesForMSO == 1)</div><div class='del'>-		dml2_printf("DML: support: NotEnoughLanesForMSO = %d\n", support-&gt;NotEnoughLanesForMSO);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NotEnoughLanesForMSO = %d\n", support-&gt;NotEnoughLanesForMSO);</div><div class='ctx'> 	if (!fail_only || support-&gt;P2IWith420 == 1)</div><div class='del'>-		dml2_printf("DML: support: P2IWith420 = %d\n", support-&gt;P2IWith420);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: P2IWith420 = %d\n", support-&gt;P2IWith420);</div><div class='ctx'> 	if (!fail_only || support-&gt;DSC422NativeNotSupported == 1)</div><div class='del'>-		dml2_printf("DML: support: DSC422NativeNotSupported = %d\n", support-&gt;DSC422NativeNotSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DSC422NativeNotSupported = %d\n", support-&gt;DSC422NativeNotSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;DSCSlicesODMModeSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: DSCSlicesODMModeSupported = %d\n", support-&gt;DSCSlicesODMModeSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DSCSlicesODMModeSupported = %d\n", support-&gt;DSCSlicesODMModeSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;NotEnoughDSCUnits == 1)</div><div class='del'>-		dml2_printf("DML: support: NotEnoughDSCUnits = %d\n", support-&gt;NotEnoughDSCUnits);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NotEnoughDSCUnits = %d\n", support-&gt;NotEnoughDSCUnits);</div><div class='ctx'> 	if (!fail_only || support-&gt;NotEnoughDSCSlices == 1)</div><div class='del'>-		dml2_printf("DML: support: NotEnoughDSCSlices = %d\n", support-&gt;NotEnoughDSCSlices);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NotEnoughDSCSlices = %d\n", support-&gt;NotEnoughDSCSlices);</div><div class='ctx'> 	if (!fail_only || support-&gt;ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe == 1)</div><div class='del'>-		dml2_printf("DML: support: ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe = %d\n", support-&gt;ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe = %d\n", support-&gt;ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe);</div><div class='ctx'> 	if (!fail_only || support-&gt;InvalidCombinationOfMALLUseForPStateAndStaticScreen == 1)</div><div class='del'>-		dml2_printf("DML: support: InvalidCombinationOfMALLUseForPStateAndStaticScreen = %d\n", support-&gt;InvalidCombinationOfMALLUseForPStateAndStaticScreen);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: InvalidCombinationOfMALLUseForPStateAndStaticScreen = %d\n", support-&gt;InvalidCombinationOfMALLUseForPStateAndStaticScreen);</div><div class='ctx'> 	if (!fail_only || support-&gt;DSCCLKRequiredMoreThanSupported == 1)</div><div class='del'>-		dml2_printf("DML: support: DSCCLKRequiredMoreThanSupported = %d\n", support-&gt;DSCCLKRequiredMoreThanSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DSCCLKRequiredMoreThanSupported = %d\n", support-&gt;DSCCLKRequiredMoreThanSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;PixelsPerLinePerDSCUnitSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: PixelsPerLinePerDSCUnitSupport = %d\n", support-&gt;PixelsPerLinePerDSCUnitSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PixelsPerLinePerDSCUnitSupport = %d\n", support-&gt;PixelsPerLinePerDSCUnitSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;DTBCLKRequiredMoreThanSupported == 1)</div><div class='del'>-		dml2_printf("DML: support: DTBCLKRequiredMoreThanSupported = %d\n", support-&gt;DTBCLKRequiredMoreThanSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DTBCLKRequiredMoreThanSupported = %d\n", support-&gt;DTBCLKRequiredMoreThanSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;InvalidCombinationOfMALLUseForPState == 1)</div><div class='del'>-		dml2_printf("DML: support: InvalidCombinationOfMALLUseForPState = %d\n", support-&gt;InvalidCombinationOfMALLUseForPState);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: InvalidCombinationOfMALLUseForPState = %d\n", support-&gt;InvalidCombinationOfMALLUseForPState);</div><div class='ctx'> 	if (!fail_only || support-&gt;ROBSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ROBSupport = %d\n", support-&gt;ROBSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ROBSupport = %d\n", support-&gt;ROBSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;OutstandingRequestsSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: OutstandingRequestsSupport = %d\n", support-&gt;OutstandingRequestsSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: OutstandingRequestsSupport = %d\n", support-&gt;OutstandingRequestsSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;OutstandingRequestsUrgencyAvoidance == 0)</div><div class='del'>-		dml2_printf("DML: support: OutstandingRequestsUrgencyAvoidance = %d\n", support-&gt;OutstandingRequestsUrgencyAvoidance);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: OutstandingRequestsUrgencyAvoidance = %d\n", support-&gt;OutstandingRequestsUrgencyAvoidance);</div><div class='ctx'> 	if (!fail_only || support-&gt;DISPCLK_DPPCLK_Support == 0)</div><div class='del'>-		dml2_printf("DML: support: DISPCLK_DPPCLK_Support = %d\n", support-&gt;DISPCLK_DPPCLK_Support);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DISPCLK_DPPCLK_Support = %d\n", support-&gt;DISPCLK_DPPCLK_Support);</div><div class='ctx'> 	if (!fail_only || support-&gt;TotalAvailablePipesSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: TotalAvailablePipesSupport = %d\n", support-&gt;TotalAvailablePipesSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: TotalAvailablePipesSupport = %d\n", support-&gt;TotalAvailablePipesSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;NumberOfOTGSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: NumberOfOTGSupport = %d\n", support-&gt;NumberOfOTGSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NumberOfOTGSupport = %d\n", support-&gt;NumberOfOTGSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;NumberOfHDMIFRLSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: NumberOfHDMIFRLSupport = %d\n", support-&gt;NumberOfHDMIFRLSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NumberOfHDMIFRLSupport = %d\n", support-&gt;NumberOfHDMIFRLSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;NumberOfDP2p0Support == 0)</div><div class='del'>-		dml2_printf("DML: support: NumberOfDP2p0Support = %d\n", support-&gt;NumberOfDP2p0Support);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NumberOfDP2p0Support = %d\n", support-&gt;NumberOfDP2p0Support);</div><div class='ctx'> 	if (!fail_only || support-&gt;EnoughWritebackUnits == 0)</div><div class='del'>-		dml2_printf("DML: support: EnoughWritebackUnits = %d\n", support-&gt;EnoughWritebackUnits);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: EnoughWritebackUnits = %d\n", support-&gt;EnoughWritebackUnits);</div><div class='ctx'> 	if (!fail_only || support-&gt;WritebackScaleRatioAndTapsSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: WritebackScaleRatioAndTapsSupport = %d\n", support-&gt;WritebackScaleRatioAndTapsSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: WritebackScaleRatioAndTapsSupport = %d\n", support-&gt;WritebackScaleRatioAndTapsSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;WritebackLatencySupport == 0)</div><div class='del'>-		dml2_printf("DML: support: WritebackLatencySupport = %d\n", support-&gt;WritebackLatencySupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: WritebackLatencySupport = %d\n", support-&gt;WritebackLatencySupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;CursorSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: CursorSupport = %d\n", support-&gt;CursorSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: CursorSupport = %d\n", support-&gt;CursorSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;PitchSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: PitchSupport = %d\n", support-&gt;PitchSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PitchSupport = %d\n", support-&gt;PitchSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;ViewportExceedsSurface == 1)</div><div class='del'>-		dml2_printf("DML: support: ViewportExceedsSurface = %d\n", support-&gt;ViewportExceedsSurface);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ViewportExceedsSurface = %d\n", support-&gt;ViewportExceedsSurface);</div><div class='ctx'> 	if (!fail_only || support-&gt;PrefetchSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: PrefetchSupported = %d\n", support-&gt;PrefetchSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PrefetchSupported = %d\n", support-&gt;PrefetchSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;EnoughUrgentLatencyHidingSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: EnoughUrgentLatencyHidingSupport = %d\n", support-&gt;EnoughUrgentLatencyHidingSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: EnoughUrgentLatencyHidingSupport = %d\n", support-&gt;EnoughUrgentLatencyHidingSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;AvgBandwidthSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: AvgBandwidthSupport = %d\n", support-&gt;AvgBandwidthSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: AvgBandwidthSupport = %d\n", support-&gt;AvgBandwidthSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;DynamicMetadataSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: DynamicMetadataSupported = %d\n", support-&gt;DynamicMetadataSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DynamicMetadataSupported = %d\n", support-&gt;DynamicMetadataSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;VRatioInPrefetchSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: VRatioInPrefetchSupported = %d\n", support-&gt;VRatioInPrefetchSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: VRatioInPrefetchSupported = %d\n", support-&gt;VRatioInPrefetchSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;PTEBufferSizeNotExceeded == 0)</div><div class='del'>-		dml2_printf("DML: support: PTEBufferSizeNotExceeded = %d\n", support-&gt;PTEBufferSizeNotExceeded);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PTEBufferSizeNotExceeded = %d\n", support-&gt;PTEBufferSizeNotExceeded);</div><div class='ctx'> 	if (!fail_only || support-&gt;DCCMetaBufferSizeNotExceeded == 0)</div><div class='del'>-		dml2_printf("DML: support: DCCMetaBufferSizeNotExceeded = %d\n", support-&gt;DCCMetaBufferSizeNotExceeded);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DCCMetaBufferSizeNotExceeded = %d\n", support-&gt;DCCMetaBufferSizeNotExceeded);</div><div class='ctx'> 	if (!fail_only || support-&gt;ExceededMALLSize == 1)</div><div class='del'>-		dml2_printf("DML: support: ExceededMALLSize = %d\n", support-&gt;ExceededMALLSize);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ExceededMALLSize = %d\n", support-&gt;ExceededMALLSize);</div><div class='ctx'> 	if (!fail_only || support-&gt;g6_temp_read_support == 0)</div><div class='del'>-		dml2_printf("DML: support: g6_temp_read_support = %d\n", support-&gt;g6_temp_read_support);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: g6_temp_read_support = %d\n", support-&gt;g6_temp_read_support);</div><div class='ctx'> 	if (!fail_only || support-&gt;ImmediateFlipSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ImmediateFlipSupport = %d\n", support-&gt;ImmediateFlipSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ImmediateFlipSupport = %d\n", support-&gt;ImmediateFlipSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;LinkCapacitySupport == 0)</div><div class='del'>-		dml2_printf("DML: support: LinkCapacitySupport = %d\n", support-&gt;LinkCapacitySupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: LinkCapacitySupport = %d\n", support-&gt;LinkCapacitySupport);</div><div class='ctx'> </div><div class='ctx'> 	if (!fail_only || support-&gt;ModeSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ModeSupport = %d\n", support-&gt;ModeSupport);</div><div class='del'>-	dml2_printf("DML: ===================================== \n");</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ModeSupport = %d\n", support-&gt;ModeSupport);</div><div class='add'>+	DML_LOG_VERBOSE("DML: ===================================== \n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void get_stream_output_bpp(double *out_bpp, const struct dml2_display_cfg *display_cfg)</div><div class='hunk'>@@ -179,11 +179,9 @@ static void get_stream_output_bpp(double *out_bpp, const struct dml2_display_cfg</div><div class='ctx'> 		} else {</div><div class='ctx'> 			out_bpp[k] = 0;</div><div class='ctx'> 		}</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%d bpc=%f\n", __func__, k, bpc);</div><div class='del'>-		dml2_printf("DML::%s: k=%d dsc.enable=%d\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.dsc.enable);</div><div class='del'>-		dml2_printf("DML::%s: k=%d out_bpp=%f\n", __func__, k, out_bpp[k]);</div><div class='del'>-#endif</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d bpc=%f\n", __func__, k, bpc);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d dsc.enable=%d\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.dsc.enable);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d out_bpp=%f\n", __func__, k, out_bpp[k]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -212,9 +210,7 @@ static unsigned int dml_get_num_active_pipes(int unsigned num_planes, const stru</div><div class='ctx'> 		num_active_pipes = num_active_pipes + (unsigned int)cfg_support_info-&gt;plane_support_info[k].dpps_used;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: num_active_pipes = %d\n", __func__, num_active_pipes);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_active_pipes = %d\n", __func__, num_active_pipes);</div><div class='ctx'> 	return num_active_pipes;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -251,7 +247,7 @@ static bool dml_get_is_phantom_pipe(const struct dml2_display_cfg *display_cfg,</div><div class='ctx'> 	unsigned int plane_idx = mode_lib-&gt;mp.pipe_plane[pipe_idx];</div><div class='ctx'> </div><div class='ctx'> 	bool is_phantom = dml_is_phantom_pipe(&amp;display_cfg-&gt;plane_descriptors[plane_idx]);</div><div class='del'>-	dml2_printf("DML::%s: pipe_idx=%d legacy_svp_config=%0d is_phantom=%d\n", __func__, pipe_idx, display_cfg-&gt;plane_descriptors[plane_idx].overrides.legacy_svp_config, is_phantom);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: pipe_idx=%d legacy_svp_config=%0d is_phantom=%d\n", __func__, pipe_idx, display_cfg-&gt;plane_descriptors[plane_idx].overrides.legacy_svp_config, is_phantom);</div><div class='ctx'> 	return is_phantom;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -415,19 +411,17 @@ static void CalculateMaxDETAndMinCompressedBufferSize(</div><div class='ctx'> 	*nomDETInKByte = (unsigned int)(math_floor2((double)*MaxTotalDETInKByte / (double)MaxNumDPP, ConfigReturnBufferSegmentSizeInKByte));</div><div class='ctx'> 	*MinCompressedBufferSizeInKByte = ConfigReturnBufferSizeInKByte - *MaxTotalDETInKByte;</div><div class='ctx'> </div><div class='del'>-#if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	dml2_printf("DML::%s: is_mrq_present = %u\n", __func__, is_mrq_present);</div><div class='del'>-	dml2_printf("DML::%s: ConfigReturnBufferSizeInKByte = %u\n", __func__, ConfigReturnBufferSizeInKByte);</div><div class='del'>-	dml2_printf("DML::%s: ROBBufferSizeInKByte = %u\n", __func__, ROBBufferSizeInKByte);</div><div class='del'>-	dml2_printf("DML::%s: MaxNumDPP = %u\n", __func__, MaxNumDPP);</div><div class='del'>-	dml2_printf("DML::%s: MaxTotalDETInKByte = %u\n", __func__, *MaxTotalDETInKByte);</div><div class='del'>-	dml2_printf("DML::%s: nomDETInKByte = %u\n", __func__, *nomDETInKByte);</div><div class='del'>-	dml2_printf("DML::%s: MinCompressedBufferSizeInKByte = %u\n", __func__, *MinCompressedBufferSizeInKByte);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: is_mrq_present = %u\n", __func__, is_mrq_present);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ConfigReturnBufferSizeInKByte = %u\n", __func__, ConfigReturnBufferSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ROBBufferSizeInKByte = %u\n", __func__, ROBBufferSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxNumDPP = %u\n", __func__, MaxNumDPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxTotalDETInKByte = %u\n", __func__, *MaxTotalDETInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: nomDETInKByte = %u\n", __func__, *nomDETInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MinCompressedBufferSizeInKByte = %u\n", __func__, *MinCompressedBufferSizeInKByte);</div><div class='ctx'> </div><div class='ctx'> 	if (nomDETInKByteOverrideEnable) {</div><div class='ctx'> 		*nomDETInKByte = nomDETInKByteOverrideValue;</div><div class='del'>-		dml2_printf("DML::%s: nomDETInKByte = %u (overrided)\n", __func__, *nomDETInKByte);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: nomDETInKByte = %u (overrided)\n", __func__, *nomDETInKByte);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -502,7 +496,7 @@ static bool dml_is_420(enum dml2_source_format_class source_format)</div><div class='ctx'> 		val = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return val;</div><div class='hunk'>@@ -535,7 +529,7 @@ static unsigned int dml_get_tile_block_size_bytes(enum dml2_swizzle_mode sw_mode</div><div class='ctx'> 	else if (sw_mode == dml2_gfx11_sw_256kb_r_x)</div><div class='ctx'> 		return 262144;</div><div class='ctx'> 	else {</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 		return 256;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -570,8 +564,8 @@ static int unsigned dml_get_gfx_version(enum dml2_swizzle_mode sw_mode)</div><div class='ctx'> 		sw_mode == dml2_gfx11_sw_256kb_r_x) {</div><div class='ctx'> 		version = 11;</div><div class='ctx'> 	} else {</div><div class='del'>-		dml2_printf("ERROR: Invalid sw_mode setting! val=%u\n", sw_mode);</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_LOG_VERBOSE("ERROR: Invalid sw_mode setting! val=%u\n", sw_mode);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return version;</div><div class='hunk'>@@ -645,21 +639,19 @@ static void CalculateBytePerPixelAndBlockSizes(</div><div class='ctx'> 		*BytePerPixelY = 2;</div><div class='ctx'> 		*BytePerPixelC = 4;</div><div class='ctx'> 	} else {</div><div class='del'>-		dml2_printf("ERROR: DML::%s: SourcePixelFormat = %u not supported!\n", __func__, SourcePixelFormat);</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_LOG_VERBOSE("ERROR: DML::%s: SourcePixelFormat = %u not supported!\n", __func__, SourcePixelFormat);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: SourcePixelFormat = %u\n", __func__, SourcePixelFormat);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixelDETY = %f\n", __func__, *BytePerPixelDETY);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixelDETC = %f\n", __func__, *BytePerPixelDETC);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixelY = %u\n", __func__, *BytePerPixelY);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixelC = %u\n", __func__, *BytePerPixelC);</div><div class='del'>-	dml2_printf("DML::%s: pitch_y = %u\n", __func__, pitch_y);</div><div class='del'>-	dml2_printf("DML::%s: pitch_c = %u\n", __func__, pitch_c);</div><div class='del'>-	dml2_printf("DML::%s: surf_linear128_l = %u\n", __func__, *surf_linear128_l);</div><div class='del'>-	dml2_printf("DML::%s: surf_linear128_c = %u\n", __func__, *surf_linear128_c);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SourcePixelFormat = %u\n", __func__, SourcePixelFormat);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixelDETY = %f\n", __func__, *BytePerPixelDETY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixelDETC = %f\n", __func__, *BytePerPixelDETC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixelY = %u\n", __func__, *BytePerPixelY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixelC = %u\n", __func__, *BytePerPixelC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: pitch_y = %u\n", __func__, pitch_y);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: pitch_c = %u\n", __func__, pitch_c);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: surf_linear128_l = %u\n", __func__, *surf_linear128_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: surf_linear128_c = %u\n", __func__, *surf_linear128_c);</div><div class='ctx'> </div><div class='ctx'> 	if (dml_get_gfx_version(SurfaceTiling) == 11) {</div><div class='ctx'> 		*surf_linear128_l = 0;</div><div class='hunk'>@@ -703,12 +695,10 @@ static void CalculateBytePerPixelAndBlockSizes(</div><div class='ctx'> 		*BlockWidth256BytesY = 256U / *BytePerPixelY / *BlockHeight256BytesY;</div><div class='ctx'> 		*BlockWidth256BytesC = 256U / *BytePerPixelC / *BlockHeight256BytesC;</div><div class='ctx'> 	}</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: BlockWidth256BytesY = %u\n", __func__, *BlockWidth256BytesY);</div><div class='del'>-	dml2_printf("DML::%s: BlockHeight256BytesY = %u\n", __func__, *BlockHeight256BytesY);</div><div class='del'>-	dml2_printf("DML::%s: BlockWidth256BytesC = %u\n", __func__, *BlockWidth256BytesC);</div><div class='del'>-	dml2_printf("DML::%s: BlockHeight256BytesC = %u\n", __func__, *BlockHeight256BytesC);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BlockWidth256BytesY = %u\n", __func__, *BlockWidth256BytesY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BlockHeight256BytesY = %u\n", __func__, *BlockHeight256BytesY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BlockWidth256BytesC = %u\n", __func__, *BlockWidth256BytesC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BlockHeight256BytesC = %u\n", __func__, *BlockHeight256BytesC);</div><div class='ctx'> </div><div class='ctx'> 	if (dml_get_gfx_version(SurfaceTiling) == 11) {</div><div class='ctx'> 		if (SurfaceTiling == dml2_gfx11_sw_linear) {</div><div class='hunk'>@@ -752,8 +742,8 @@ static void CalculateBytePerPixelAndBlockSizes(</div><div class='ctx'> 		} else if (SurfaceTiling == dml2_sw_256kb_2d) {</div><div class='ctx'> 			macro_tile_scale = 32;</div><div class='ctx'> 		} else {</div><div class='del'>-			dml2_printf("ERROR: Invalid SurfaceTiling setting! val=%u\n", SurfaceTiling);</div><div class='del'>-			DML2_ASSERT(0);</div><div class='add'>+			DML_LOG_VERBOSE("ERROR: Invalid SurfaceTiling setting! val=%u\n", SurfaceTiling);</div><div class='add'>+			DML_ASSERT(0);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		*MacroTileHeightY = macro_tile_scale * *BlockHeight256BytesY;</div><div class='hunk'>@@ -766,12 +756,10 @@ static void CalculateBytePerPixelAndBlockSizes(</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: MacroTileWidthY = %u\n", __func__, *MacroTileWidthY);</div><div class='del'>-	dml2_printf("DML::%s: MacroTileHeightY = %u\n", __func__, *MacroTileHeightY);</div><div class='del'>-	dml2_printf("DML::%s: MacroTileWidthC = %u\n", __func__, *MacroTileWidthC);</div><div class='del'>-	dml2_printf("DML::%s: MacroTileHeightC = %u\n", __func__, *MacroTileHeightC);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MacroTileWidthY = %u\n", __func__, *MacroTileWidthY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MacroTileHeightY = %u\n", __func__, *MacroTileHeightY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MacroTileWidthC = %u\n", __func__, *MacroTileWidthC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MacroTileHeightC = %u\n", __func__, *MacroTileHeightC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void CalculateSinglePipeDPPCLKAndSCLThroughput(</div><div class='hunk'>@@ -860,10 +848,8 @@ static void CalculateSwathWidth(</div><div class='ctx'> 	unsigned int surface_width_ub_c;</div><div class='ctx'> 	unsigned int surface_height_ub_c;</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: ForceSingleDPP = %u\n", __func__, ForceSingleDPP);</div><div class='del'>-	dml2_printf("DML::%s: NumberOfActiveSurfaces = %u\n", __func__, NumberOfActiveSurfaces);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ForceSingleDPP = %u\n", __func__, ForceSingleDPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NumberOfActiveSurfaces = %u\n", __func__, NumberOfActiveSurfaces);</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int k = 0; k &lt; NumberOfActiveSurfaces; ++k) {</div><div class='ctx'> 		if (!dml_is_vertical_rotation(display_cfg-&gt;plane_descriptors[k].composition.rotation_angle)) {</div><div class='hunk'>@@ -872,11 +858,9 @@ static void CalculateSwathWidth(</div><div class='ctx'> 			SwathWidthSingleDPPY[k] = (unsigned int)display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u ViewportWidth=%u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.width);</div><div class='del'>-		dml2_printf("DML::%s: k=%u ViewportHeight=%u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height);</div><div class='del'>-		dml2_printf("DML::%s: k=%u DPPPerSurface=%u\n", __func__, k, DPPPerSurface[k]);</div><div class='del'>-#endif</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u ViewportWidth=%lu\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.width);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u ViewportHeight=%lu\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DPPPerSurface=%u\n", __func__, k, DPPPerSurface[k]);</div><div class='ctx'> </div><div class='ctx'> 		MainSurfaceODMMode = ODMMode[k];</div><div class='ctx'> </div><div class='hunk'>@@ -899,13 +883,11 @@ static void CalculateSwathWidth(</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u HActive=%u\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_active);</div><div class='del'>-		dml2_printf("DML::%s: k=%u HRatio=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MainSurfaceODMMode=%u\n", __func__, k, MainSurfaceODMMode);</div><div class='del'>-		dml2_printf("DML::%s: k=%u SwathWidthSingleDPPY=%u\n", __func__, k, SwathWidthSingleDPPY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u SwathWidthY=%u\n", __func__, k, SwathWidthY[k]);</div><div class='del'>-#endif</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u HActive=%lu\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_active);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u HRatio=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MainSurfaceODMMode=%u\n", __func__, k, MainSurfaceODMMode);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u SwathWidthSingleDPPY=%u\n", __func__, k, SwathWidthSingleDPPY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u SwathWidthY=%u\n", __func__, k, SwathWidthY[k]);</div><div class='ctx'> </div><div class='ctx'> 		if (dml_is_420(display_cfg-&gt;plane_descriptors[k].pixel_format)) {</div><div class='ctx'> 			SwathWidthC[k] = SwathWidthY[k] / 2;</div><div class='hunk'>@@ -934,22 +916,20 @@ static void CalculateSwathWidth(</div><div class='ctx'> 		surface_width_ub_c = (unsigned int)math_ceil2((double)display_cfg-&gt;plane_descriptors[k].surface.plane1.width, req_width_horz_c);</div><div class='ctx'> 		surface_height_ub_c = (unsigned int)math_ceil2((double)display_cfg-&gt;plane_descriptors[k].surface.plane1.height, Read256BytesBlockHeightC[k]);</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u surface_width_ub_l=%u\n", __func__, k, surface_width_ub_l);</div><div class='del'>-		dml2_printf("DML::%s: k=%u surface_height_ub_l=%u\n", __func__, k, surface_height_ub_l);</div><div class='del'>-		dml2_printf("DML::%s: k=%u surface_width_ub_c=%u\n", __func__, k, surface_width_ub_c);</div><div class='del'>-		dml2_printf("DML::%s: k=%u surface_height_ub_c=%u\n", __func__, k, surface_height_ub_c);</div><div class='del'>-		dml2_printf("DML::%s: k=%u req_width_horz_y=%u\n", __func__, k, req_width_horz_y);</div><div class='del'>-		dml2_printf("DML::%s: k=%u req_width_horz_c=%u\n", __func__, k, req_width_horz_c);</div><div class='del'>-		dml2_printf("DML::%s: k=%u Read256BytesBlockWidthY=%u\n", __func__, k, Read256BytesBlockWidthY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u Read256BytesBlockHeightY=%u\n", __func__, k, Read256BytesBlockHeightY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u Read256BytesBlockWidthC=%u\n", __func__, k, Read256BytesBlockWidthC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u Read256BytesBlockHeightC=%u\n", __func__, k, Read256BytesBlockHeightC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u req_width_horz_y=%u\n", __func__, k, req_width_horz_y);</div><div class='del'>-		dml2_printf("DML::%s: k=%u req_width_horz_c=%u\n", __func__, k, req_width_horz_c);</div><div class='del'>-		dml2_printf("DML::%s: k=%u ViewportStationary=%u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.stationary);</div><div class='del'>-		dml2_printf("DML::%s: k=%u DPPPerSurface=%u\n", __func__, k, DPPPerSurface[k]);</div><div class='del'>-#endif</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u surface_width_ub_l=%u\n", __func__, k, surface_width_ub_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u surface_height_ub_l=%u\n", __func__, k, surface_height_ub_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u surface_width_ub_c=%u\n", __func__, k, surface_width_ub_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u surface_height_ub_c=%u\n", __func__, k, surface_height_ub_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u req_width_horz_y=%u\n", __func__, k, req_width_horz_y);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u req_width_horz_c=%u\n", __func__, k, req_width_horz_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u Read256BytesBlockWidthY=%u\n", __func__, k, Read256BytesBlockWidthY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u Read256BytesBlockHeightY=%u\n", __func__, k, Read256BytesBlockHeightY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u Read256BytesBlockWidthC=%u\n", __func__, k, Read256BytesBlockWidthC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u Read256BytesBlockHeightC=%u\n", __func__, k, Read256BytesBlockHeightC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u req_width_horz_y=%u\n", __func__, k, req_width_horz_y);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u req_width_horz_c=%u\n", __func__, k, req_width_horz_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u ViewportStationary=%u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.stationary);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DPPPerSurface=%u\n", __func__, k, DPPPerSurface[k]);</div><div class='ctx'> </div><div class='ctx'> 		req_per_swath_ub_l[k] = 0;</div><div class='ctx'> 		req_per_swath_ub_c[k] = 0;</div><div class='hunk'>@@ -995,15 +975,12 @@ static void CalculateSwathWidth(</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u swath_width_luma_ub=%u\n", __func__, k, swath_width_luma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u swath_width_chroma_ub=%u\n", __func__, k, swath_width_chroma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathHeightY=%u\n", __func__, k, MaximumSwathHeightY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathHeightC=%u\n", __func__, k, MaximumSwathHeightC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u req_per_swath_ub_l=%u\n", __func__, k, req_per_swath_ub_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u req_per_swath_ub_c=%u\n", __func__, k, req_per_swath_ub_c[k]);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u swath_width_luma_ub=%u\n", __func__, k, swath_width_luma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u swath_width_chroma_ub=%u\n", __func__, k, swath_width_chroma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathHeightY=%u\n", __func__, k, MaximumSwathHeightY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathHeightC=%u\n", __func__, k, MaximumSwathHeightC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u req_per_swath_ub_l=%u\n", __func__, k, req_per_swath_ub_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u req_per_swath_ub_c=%u\n", __func__, k, req_per_swath_ub_c[k]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1018,13 +995,11 @@ static bool UnboundedRequest(bool unb_req_force_en, bool unb_req_force_val, unsi</div><div class='ctx'> 	if (unb_req_force_en) {</div><div class='ctx'> 		unb_req_en = unb_req_force_val &amp;&amp; unb_req_ok;</div><div class='ctx'> 	}</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: unb_req_force_en = %u\n", __func__, unb_req_force_en);</div><div class='del'>-	dml2_printf("DML::%s: unb_req_force_val = %u\n", __func__, unb_req_force_val);</div><div class='del'>-	dml2_printf("DML::%s: unb_req_ok = %u\n", __func__, unb_req_ok);</div><div class='del'>-	dml2_printf("DML::%s: unb_req_en = %u\n", __func__, unb_req_en);</div><div class='del'>-#endif</div><div class='del'>-	return (unb_req_en);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: unb_req_force_en = %u\n", __func__, unb_req_force_en);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: unb_req_force_val = %u\n", __func__, unb_req_force_val);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: unb_req_ok = %u\n", __func__, unb_req_ok);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: unb_req_en = %u\n", __func__, unb_req_en);</div><div class='add'>+	return unb_req_en;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void CalculateDETBufferSize(</div><div class='hunk'>@@ -1054,16 +1029,14 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 	bool NextPotentialSurfaceToAssignDETPieceFound;</div><div class='ctx'> 	bool MinimizeReallocationSuccess = false;</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: ForceSingleDPP = %u\n", __func__, ForceSingleDPP);</div><div class='del'>-	dml2_printf("DML::%s: nomDETInKByte = %u\n", __func__, nomDETInKByte);</div><div class='del'>-	dml2_printf("DML::%s: NumberOfActiveSurfaces = %u\n", __func__, NumberOfActiveSurfaces);</div><div class='del'>-	dml2_printf("DML::%s: UnboundedRequestEnabled = %u\n", __func__, UnboundedRequestEnabled);</div><div class='del'>-	dml2_printf("DML::%s: MaxTotalDETInKByte = %u\n", __func__, MaxTotalDETInKByte);</div><div class='del'>-	dml2_printf("DML::%s: ConfigReturnBufferSizeInKByte = %u\n", __func__, ConfigReturnBufferSizeInKByte);</div><div class='del'>-	dml2_printf("DML::%s: MinCompressedBufferSizeInKByte = %u\n", __func__, MinCompressedBufferSizeInKByte);</div><div class='del'>-	dml2_printf("DML::%s: CompressedBufferSegmentSizeInkByte = %u\n", __func__, CompressedBufferSegmentSizeInkByte);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ForceSingleDPP = %u\n", __func__, ForceSingleDPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: nomDETInKByte = %u\n", __func__, nomDETInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NumberOfActiveSurfaces = %u\n", __func__, NumberOfActiveSurfaces);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UnboundedRequestEnabled = %u\n", __func__, UnboundedRequestEnabled);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxTotalDETInKByte = %u\n", __func__, MaxTotalDETInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ConfigReturnBufferSizeInKByte = %u\n", __func__, ConfigReturnBufferSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MinCompressedBufferSizeInKByte = %u\n", __func__, MinCompressedBufferSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: CompressedBufferSegmentSizeInkByte = %u\n", __func__, CompressedBufferSegmentSizeInkByte);</div><div class='ctx'> </div><div class='ctx'> 	// Note: Will use default det size if that fits 2 swaths</div><div class='ctx'> 	if (UnboundedRequestEnabled) {</div><div class='hunk'>@@ -1092,19 +1065,15 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 				l-&gt;minDET = l-&gt;minDET + ConfigReturnBufferSegmentSizeInkByte;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u minDET = %u\n", __func__, k, l-&gt;minDET);</div><div class='del'>-			dml2_printf("DML::%s: k=%u max_minDET = %u\n", __func__, k, l-&gt;max_minDET);</div><div class='del'>-			dml2_printf("DML::%s: k=%u minDET_pipe = %u\n", __func__, k, l-&gt;minDET_pipe);</div><div class='del'>-			dml2_printf("DML::%s: k=%u full_swath_bytes_l = %u\n", __func__, k, full_swath_bytes_l[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u full_swath_bytes_c = %u\n", __func__, k, full_swath_bytes_c[k]);</div><div class='del'>-#endif</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u minDET = %u\n", __func__, k, l-&gt;minDET);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u max_minDET = %u\n", __func__, k, l-&gt;max_minDET);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u minDET_pipe = %u\n", __func__, k, l-&gt;minDET_pipe);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_l = %u\n", __func__, k, full_swath_bytes_l[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_c = %u\n", __func__, k, full_swath_bytes_c[k]);</div><div class='ctx'> </div><div class='ctx'> 			if (l-&gt;minDET_pipe == 0) {</div><div class='ctx'> 				l-&gt;minDET_pipe = (unsigned int)(math_max2(128, math_ceil2(((double)full_swath_bytes_l[k] + (double)full_swath_bytes_c[k]) / 1024.0, ConfigReturnBufferSegmentSizeInkByte)));</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: k=%u minDET_pipe = %u (assume each plane take half DET)\n", __func__, k, l-&gt;minDET_pipe);</div><div class='del'>-#endif</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u minDET_pipe = %u (assume each plane take half DET)\n", __func__, k, l-&gt;minDET_pipe);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (dml_is_phantom_pipe(&amp;display_cfg-&gt;plane_descriptors[k])) {</div><div class='hunk'>@@ -1117,12 +1086,10 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 				l-&gt;DETBufferSizePoolInKByte = l-&gt;DETBufferSizePoolInKByte - (ForceSingleDPP ? 1 : DPPPerSurface[k]) * l-&gt;minDET_pipe;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u DPPPerSurface = %u\n", __func__, k, DPPPerSurface[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u DETSizeOverride = %u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.det_size_override_kb);</div><div class='del'>-			dml2_printf("DML::%s: k=%u DETBufferSizeInKByte = %u\n", __func__, k, DETBufferSizeInKByte[k]);</div><div class='del'>-			dml2_printf("DML::%s: DETBufferSizePoolInKByte = %u\n", __func__, l-&gt;DETBufferSizePoolInKByte);</div><div class='del'>-#endif</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u DPPPerSurface = %u\n", __func__, k, DPPPerSurface[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u DETSizeOverride = %u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.det_size_override_kb);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeInKByte = %u\n", __func__, k, DETBufferSizeInKByte[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: DETBufferSizePoolInKByte = %u\n", __func__, l-&gt;DETBufferSizePoolInKByte);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (display_cfg-&gt;minimize_det_reallocation) {</div><div class='hunk'>@@ -1194,14 +1161,12 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 					l-&gt;TotalBandwidth = l-&gt;TotalBandwidth + ReadBandwidthLuma[k] + ReadBandwidthChroma[k];</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: --- Before bandwidth adjustment ---\n", __func__);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: --- Before bandwidth adjustment ---\n", __func__);</div><div class='ctx'> 			for (unsigned int k = 0; k &lt; NumberOfActiveSurfaces; ++k) {</div><div class='del'>-				dml2_printf("DML::%s: k=%u DETBufferSizeInKByte = %u\n", __func__, k, DETBufferSizeInKByte[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeInKByte = %u\n", __func__, k, DETBufferSizeInKByte[k]);</div><div class='ctx'> 			}</div><div class='del'>-			dml2_printf("DML::%s: --- DET allocation with bandwidth ---\n", __func__);</div><div class='del'>-#endif</div><div class='del'>-			dml2_printf("DML::%s: TotalBandwidth = %f\n", __func__, l-&gt;TotalBandwidth);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: --- DET allocation with bandwidth ---\n", __func__);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: TotalBandwidth = %f\n", __func__, l-&gt;TotalBandwidth);</div><div class='ctx'> 			l-&gt;BandwidthOfSurfacesNotAssignedDETPiece = l-&gt;TotalBandwidth;</div><div class='ctx'> 			for (unsigned int k = 0; k &lt; NumberOfActiveSurfaces; ++k) {</div><div class='ctx'> </div><div class='hunk'>@@ -1213,10 +1178,8 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 				} else {</div><div class='ctx'> 					DETPieceAssignedToThisSurfaceAlready[k] = false;</div><div class='ctx'> 				}</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: k=%u DETPieceAssignedToThisSurfaceAlready = %u\n", __func__, k, DETPieceAssignedToThisSurfaceAlready[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%u BandwidthOfSurfacesNotAssignedDETPiece = %f\n", __func__, k, l-&gt;BandwidthOfSurfacesNotAssignedDETPiece);</div><div class='del'>-#endif</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u DETPieceAssignedToThisSurfaceAlready = %u\n", __func__, k, DETPieceAssignedToThisSurfaceAlready[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u BandwidthOfSurfacesNotAssignedDETPiece = %f\n", __func__, k, l-&gt;BandwidthOfSurfacesNotAssignedDETPiece);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			for (unsigned int j = 0; j &lt; NumberOfActiveSurfaces; ++j) {</div><div class='hunk'>@@ -1224,22 +1187,18 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 				l-&gt;NextSurfaceToAssignDETPiece = 0;</div><div class='ctx'> </div><div class='ctx'> 				for (unsigned int k = 0; k &lt; NumberOfActiveSurfaces; ++k) {</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-					dml2_printf("DML::%s: j=%u k=%u, ReadBandwidthLuma[k] = %f\n", __func__, j, k, ReadBandwidthLuma[k]);</div><div class='del'>-					dml2_printf("DML::%s: j=%u k=%u, ReadBandwidthChroma[k] = %f\n", __func__, j, k, ReadBandwidthChroma[k]);</div><div class='del'>-					dml2_printf("DML::%s: j=%u k=%u, ReadBandwidthLuma[Next] = %f\n", __func__, j, k, ReadBandwidthLuma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='del'>-					dml2_printf("DML::%s: j=%u k=%u, ReadBandwidthChroma[Next] = %f\n", __func__, j, k, ReadBandwidthChroma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='del'>-					dml2_printf("DML::%s: j=%u k=%u, NextSurfaceToAssignDETPiece = %u\n", __func__, j, k, l-&gt;NextSurfaceToAssignDETPiece);</div><div class='del'>-#endif</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u k=%u, ReadBandwidthLuma[k] = %f\n", __func__, j, k, ReadBandwidthLuma[k]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u k=%u, ReadBandwidthChroma[k] = %f\n", __func__, j, k, ReadBandwidthChroma[k]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u k=%u, ReadBandwidthLuma[Next] = %f\n", __func__, j, k, ReadBandwidthLuma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u k=%u, ReadBandwidthChroma[Next] = %f\n", __func__, j, k, ReadBandwidthChroma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u k=%u, NextSurfaceToAssignDETPiece = %u\n", __func__, j, k, l-&gt;NextSurfaceToAssignDETPiece);</div><div class='ctx'> 					if (!DETPieceAssignedToThisSurfaceAlready[k] &amp;&amp; (!NextPotentialSurfaceToAssignDETPieceFound ||</div><div class='ctx'> 						ReadBandwidthLuma[k] + ReadBandwidthChroma[k] &lt; ReadBandwidthLuma[l-&gt;NextSurfaceToAssignDETPiece] + ReadBandwidthChroma[l-&gt;NextSurfaceToAssignDETPiece])) {</div><div class='ctx'> 						l-&gt;NextSurfaceToAssignDETPiece = k;</div><div class='ctx'> 						NextPotentialSurfaceToAssignDETPieceFound = true;</div><div class='ctx'> 					}</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-					dml2_printf("DML::%s: j=%u k=%u, DETPieceAssignedToThisSurfaceAlready = %u\n", __func__, j, k, DETPieceAssignedToThisSurfaceAlready[k]);</div><div class='del'>-					dml2_printf("DML::%s: j=%u k=%u, NextPotentialSurfaceToAssignDETPieceFound = %u\n", __func__, j, k, NextPotentialSurfaceToAssignDETPieceFound);</div><div class='del'>-#endif</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u k=%u, DETPieceAssignedToThisSurfaceAlready = %u\n", __func__, j, k, DETPieceAssignedToThisSurfaceAlready[k]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u k=%u, NextPotentialSurfaceToAssignDETPieceFound = %u\n", __func__, j, k, NextPotentialSurfaceToAssignDETPieceFound);</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				if (NextPotentialSurfaceToAssignDETPieceFound) {</div><div class='hunk'>@@ -1249,20 +1208,16 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 						* (ForceSingleDPP ? 1 : DPPPerSurface[l-&gt;NextSurfaceToAssignDETPiece]) * ConfigReturnBufferSegmentSizeInkByte,</div><div class='ctx'> 						math_floor2((double)l-&gt;DETBufferSizePoolInKByte, (ForceSingleDPP ? 1 : DPPPerSurface[l-&gt;NextSurfaceToAssignDETPiece]) * ConfigReturnBufferSegmentSizeInkByte)));</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-					dml2_printf("DML::%s: j=%u, DETBufferSizePoolInKByte = %u\n", __func__, j, l-&gt;DETBufferSizePoolInKByte);</div><div class='del'>-					dml2_printf("DML::%s: j=%u, NextSurfaceToAssignDETPiece = %u\n", __func__, j, l-&gt;NextSurfaceToAssignDETPiece);</div><div class='del'>-					dml2_printf("DML::%s: j=%u, ReadBandwidthLuma[%u] = %f\n", __func__, j, l-&gt;NextSurfaceToAssignDETPiece, ReadBandwidthLuma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='del'>-					dml2_printf("DML::%s: j=%u, ReadBandwidthChroma[%u] = %f\n", __func__, j, l-&gt;NextSurfaceToAssignDETPiece, ReadBandwidthChroma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='del'>-					dml2_printf("DML::%s: j=%u, BandwidthOfSurfacesNotAssignedDETPiece = %f\n", __func__, j, l-&gt;BandwidthOfSurfacesNotAssignedDETPiece);</div><div class='del'>-					dml2_printf("DML::%s: j=%u, NextDETBufferPieceInKByte = %u\n", __func__, j, l-&gt;NextDETBufferPieceInKByte);</div><div class='del'>-					dml2_printf("DML::%s: j=%u, DETBufferSizeInKByte[%u] increases from %u ", __func__, j, l-&gt;NextSurfaceToAssignDETPiece, DETBufferSizeInKByte[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='del'>-#endif</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u, DETBufferSizePoolInKByte = %u\n", __func__, j, l-&gt;DETBufferSizePoolInKByte);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u, NextSurfaceToAssignDETPiece = %u\n", __func__, j, l-&gt;NextSurfaceToAssignDETPiece);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u, ReadBandwidthLuma[%u] = %f\n", __func__, j, l-&gt;NextSurfaceToAssignDETPiece, ReadBandwidthLuma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u, ReadBandwidthChroma[%u] = %f\n", __func__, j, l-&gt;NextSurfaceToAssignDETPiece, ReadBandwidthChroma[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u, BandwidthOfSurfacesNotAssignedDETPiece = %f\n", __func__, j, l-&gt;BandwidthOfSurfacesNotAssignedDETPiece);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u, NextDETBufferPieceInKByte = %u\n", __func__, j, l-&gt;NextDETBufferPieceInKByte);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: j=%u, DETBufferSizeInKByte[%u] increases from %u ", __func__, j, l-&gt;NextSurfaceToAssignDETPiece, DETBufferSizeInKByte[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='ctx'> </div><div class='ctx'> 					DETBufferSizeInKByte[l-&gt;NextSurfaceToAssignDETPiece] = DETBufferSizeInKByte[l-&gt;NextSurfaceToAssignDETPiece] + l-&gt;NextDETBufferPieceInKByte / (ForceSingleDPP ? 1 : DPPPerSurface[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-					dml2_printf("to %u\n", DETBufferSizeInKByte[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='del'>-#endif</div><div class='add'>+					DML_LOG_VERBOSE("to %u\n", DETBufferSizeInKByte[l-&gt;NextSurfaceToAssignDETPiece]);</div><div class='ctx'> </div><div class='ctx'> 					l-&gt;DETBufferSizePoolInKByte = l-&gt;DETBufferSizePoolInKByte - l-&gt;NextDETBufferPieceInKByte;</div><div class='ctx'> 					DETPieceAssignedToThisSurfaceAlready[l-&gt;NextSurfaceToAssignDETPiece] = true;</div><div class='hunk'>@@ -1274,13 +1229,11 @@ static void CalculateDETBufferSize(</div><div class='ctx'> 	}</div><div class='ctx'> 	*CompressedBufferSizeInkByte = *CompressedBufferSizeInkByte * CompressedBufferSegmentSizeInkByte / ConfigReturnBufferSegmentSizeInkByte;</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: --- After bandwidth adjustment ---\n", __func__);</div><div class='del'>-	dml2_printf("DML::%s: CompressedBufferSizeInkByte = %u\n", __func__, *CompressedBufferSizeInkByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: --- After bandwidth adjustment ---\n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: CompressedBufferSizeInkByte = %u\n", __func__, *CompressedBufferSizeInkByte);</div><div class='ctx'> 	for (unsigned int k = 0; k &lt; NumberOfActiveSurfaces; ++k) {</div><div class='del'>-		dml2_printf("DML::%s: k=%u DETBufferSizeInKByte = %u (TotalReadBandWidth=%f)\n", __func__, k, DETBufferSizeInKByte[k], ReadBandwidthLuma[k] + ReadBandwidthChroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeInKByte = %u (TotalReadBandWidth=%f)\n", __func__, k, DETBufferSizeInKByte[k], ReadBandwidthLuma[k] + ReadBandwidthChroma[k]);</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static double CalculateRequiredDispclk(</div><div class='hunk'>@@ -1510,15 +1463,13 @@ static unsigned int dscceComputeDelay(</div><div class='ctx'> 	//pixel delay is group_delay (converted to pixels) + pipeline, however, first group is a special case since it is processed as soon as it arrives (i.e., in 3 cycles regardless of pixel format)</div><div class='ctx'> 	pixels = (group_delay - 1) * cycles_per_group + 3 + pipeline_delay;</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: bpc: %u\n", __func__, bpc);</div><div class='del'>-	dml2_printf("DML::%s: BPP: %f\n", __func__, BPP);</div><div class='del'>-	dml2_printf("DML::%s: sliceWidth: %u\n", __func__, sliceWidth);</div><div class='del'>-	dml2_printf("DML::%s: numSlices: %u\n", __func__, numSlices);</div><div class='del'>-	dml2_printf("DML::%s: pixelFormat: %u\n", __func__, pixelFormat);</div><div class='del'>-	dml2_printf("DML::%s: Output: %u\n", __func__, Output);</div><div class='del'>-	dml2_printf("DML::%s: pixels: %u\n", __func__, pixels);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: bpc: %u\n", __func__, bpc);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BPP: %f\n", __func__, BPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: sliceWidth: %u\n", __func__, sliceWidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: numSlices: %u\n", __func__, numSlices);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: pixelFormat: %u\n", __func__, pixelFormat);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Output: %u\n", __func__, Output);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: pixels: %u\n", __func__, pixels);</div><div class='ctx'> 	return pixels;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1593,10 +1544,8 @@ static unsigned int dscComputeDelay(enum dml2_output_format_class pixelFormat, e</div><div class='ctx'> </div><div class='ctx'> 	// sft</div><div class='ctx'> 	Delay = Delay + 1;</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: pixelFormat = %u\n", __func__, pixelFormat);</div><div class='del'>-	dml2_printf("DML::%s: Delay = %u\n", __func__, Delay);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: pixelFormat = %u\n", __func__, pixelFormat);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Delay = %u\n", __func__, Delay);</div><div class='ctx'> </div><div class='ctx'> 	return Delay;</div><div class='ctx'> }</div><div class='hunk'>@@ -1667,10 +1616,8 @@ static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	meta_surface_bytes = (unsigned int)(p-&gt;DCCMetaPitch * vp_height_meta_ub * p-&gt;BytePerPixel / 256.0);</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DCCMetaPitch = %u\n", __func__, p-&gt;DCCMetaPitch);</div><div class='del'>-	dml2_printf("DML::%s: meta_surface_bytes = %u\n", __func__, meta_surface_bytes);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCCMetaPitch = %u\n", __func__, p-&gt;DCCMetaPitch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: meta_surface_bytes = %u\n", __func__, meta_surface_bytes);</div><div class='ctx'> 	if (p-&gt;GPUVMEnable == true) {</div><div class='ctx'> 		double meta_vmpg_bytes = 4.0 * 1024.0;</div><div class='ctx'> 		*p-&gt;meta_pte_bytes_per_frame_ub = (unsigned int)((math_ceil2((double) (meta_surface_bytes - meta_vmpg_bytes) / (8 * meta_vmpg_bytes), 1) + 1) * 64);</div><div class='hunk'>@@ -1724,25 +1671,23 @@ static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_</div><div class='ctx'> </div><div class='ctx'> 	vm_bytes = *p-&gt;meta_pte_bytes_per_frame_ub + extra_mpde_bytes + *p-&gt;dpde0_bytes_per_frame_ub + extra_dpde_bytes;</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DCCEnable = %u\n", __func__, p-&gt;DCCEnable);</div><div class='del'>-	dml2_printf("DML::%s: GPUVMEnable = %u\n", __func__, p-&gt;GPUVMEnable);</div><div class='del'>-	dml2_printf("DML::%s: SwModeLinear = %u\n", __func__, p-&gt;SurfaceTiling == dml2_sw_linear);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixel = %u\n", __func__, p-&gt;BytePerPixel);</div><div class='del'>-	dml2_printf("DML::%s: GPUVMMaxPageTableLevels = %u\n", __func__, p-&gt;GPUVMMaxPageTableLevels);</div><div class='del'>-	dml2_printf("DML::%s: BlockHeight256Bytes = %u\n", __func__, p-&gt;BlockHeight256Bytes);</div><div class='del'>-	dml2_printf("DML::%s: BlockWidth256Bytes = %u\n", __func__, p-&gt;BlockWidth256Bytes);</div><div class='del'>-	dml2_printf("DML::%s: MacroTileHeight = %u\n", __func__, p-&gt;MacroTileHeight);</div><div class='del'>-	dml2_printf("DML::%s: MacroTileWidth = %u\n", __func__, p-&gt;MacroTileWidth);</div><div class='del'>-	dml2_printf("DML::%s: meta_pte_bytes_per_frame_ub = %u\n", __func__, *p-&gt;meta_pte_bytes_per_frame_ub);</div><div class='del'>-	dml2_printf("DML::%s: dpde0_bytes_per_frame_ub = %u\n", __func__, *p-&gt;dpde0_bytes_per_frame_ub);</div><div class='del'>-	dml2_printf("DML::%s: extra_mpde_bytes = %u\n", __func__, extra_mpde_bytes);</div><div class='del'>-	dml2_printf("DML::%s: extra_dpde_bytes = %u\n", __func__, extra_dpde_bytes);</div><div class='del'>-	dml2_printf("DML::%s: vm_bytes = %u\n", __func__, vm_bytes);</div><div class='del'>-	dml2_printf("DML::%s: ViewportHeight = %u\n", __func__, p-&gt;ViewportHeight);</div><div class='del'>-	dml2_printf("DML::%s: SwathWidth = %u\n", __func__, p-&gt;SwathWidth);</div><div class='del'>-	dml2_printf("DML::%s: vp_height_dpte_ub = %u\n", __func__, vp_height_dpte_ub);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCCEnable = %u\n", __func__, p-&gt;DCCEnable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMEnable = %u\n", __func__, p-&gt;GPUVMEnable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SwModeLinear = %u\n", __func__, p-&gt;SurfaceTiling == dml2_sw_linear);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixel = %u\n", __func__, p-&gt;BytePerPixel);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMMaxPageTableLevels = %u\n", __func__, p-&gt;GPUVMMaxPageTableLevels);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BlockHeight256Bytes = %u\n", __func__, p-&gt;BlockHeight256Bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BlockWidth256Bytes = %u\n", __func__, p-&gt;BlockWidth256Bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MacroTileHeight = %u\n", __func__, p-&gt;MacroTileHeight);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MacroTileWidth = %u\n", __func__, p-&gt;MacroTileWidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: meta_pte_bytes_per_frame_ub = %u\n", __func__, *p-&gt;meta_pte_bytes_per_frame_ub);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpde0_bytes_per_frame_ub = %u\n", __func__, *p-&gt;dpde0_bytes_per_frame_ub);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: extra_mpde_bytes = %u\n", __func__, extra_mpde_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: extra_dpde_bytes = %u\n", __func__, extra_dpde_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vm_bytes = %u\n", __func__, vm_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ViewportHeight = %u\n", __func__, p-&gt;ViewportHeight);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SwathWidth = %u\n", __func__, p-&gt;SwathWidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vp_height_dpte_ub = %u\n", __func__, vp_height_dpte_ub);</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;SurfaceTiling == dml2_sw_linear) {</div><div class='ctx'> 		*p-&gt;PixelPTEReqHeight = 1;</div><div class='hunk'>@@ -1778,22 +1723,20 @@ static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_</div><div class='ctx'> 		*p-&gt;vmpg_width = 1024 * p-&gt;GPUVMMinPageSizeKBytes / (p-&gt;MacroTileHeight * p-&gt;BytePerPixel);</div><div class='ctx'> </div><div class='ctx'> 		if (p-&gt;GPUVMEnable == true) {</div><div class='del'>-			dml2_printf("DML::%s: GPUVMMinPageSizeKBytes=%u and sw_mode=%u (tile_size=%d) not supported!\n",</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: GPUVMMinPageSizeKBytes=%u and sw_mode=%u (tile_size=%d) not supported!\n",</div><div class='ctx'> 				__func__, p-&gt;GPUVMMinPageSizeKBytes, p-&gt;SurfaceTiling, dml_get_tile_block_size_bytes(p-&gt;SurfaceTiling));</div><div class='del'>-			DML2_ASSERT(0);</div><div class='add'>+			DML_ASSERT(0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: GPUVMMinPageSizeKBytes = %u\n", __func__, p-&gt;GPUVMMinPageSizeKBytes);</div><div class='del'>-	dml2_printf("DML::%s: PixelPTEReqHeight = %u\n", __func__, *p-&gt;PixelPTEReqHeight);</div><div class='del'>-	dml2_printf("DML::%s: PixelPTEReqWidth = %u\n", __func__, *p-&gt;PixelPTEReqWidth);</div><div class='del'>-	dml2_printf("DML::%s: PixelPTEReqWidth_linear = %u\n", __func__, PixelPTEReqWidth_linear);</div><div class='del'>-	dml2_printf("DML::%s: PTERequestSize = %u\n", __func__, *p-&gt;PTERequestSize);</div><div class='del'>-	dml2_printf("DML::%s: Pitch = %u\n", __func__, p-&gt;Pitch);</div><div class='del'>-	dml2_printf("DML::%s: vmpg_width = %u\n", __func__, *p-&gt;vmpg_width);</div><div class='del'>-	dml2_printf("DML::%s: vmpg_height = %u\n", __func__, *p-&gt;vmpg_height);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMMinPageSizeKBytes = %u\n", __func__, p-&gt;GPUVMMinPageSizeKBytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelPTEReqHeight = %u\n", __func__, *p-&gt;PixelPTEReqHeight);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelPTEReqWidth = %u\n", __func__, *p-&gt;PixelPTEReqWidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelPTEReqWidth_linear = %u\n", __func__, PixelPTEReqWidth_linear);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PTERequestSize = %u\n", __func__, *p-&gt;PTERequestSize);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Pitch = %u\n", __func__, p-&gt;Pitch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vmpg_width = %u\n", __func__, *p-&gt;vmpg_width);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vmpg_height = %u\n", __func__, *p-&gt;vmpg_height);</div><div class='ctx'> </div><div class='ctx'> 	*p-&gt;dpte_row_height_one_row_per_frame = vp_height_dpte_ub;</div><div class='ctx'> 	*p-&gt;dpte_row_width_ub_one_row_per_frame = (unsigned int)((math_ceil2(((double)p-&gt;Pitch * (double)*p-&gt;dpte_row_height_one_row_per_frame / (double)*p-&gt;PixelPTEReqHeight - 1) / (double)*p-&gt;PixelPTEReqWidth, 1) + 1) * (double)*p-&gt;PixelPTEReqWidth);</div><div class='hunk'>@@ -1811,7 +1754,7 @@ static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_</div><div class='ctx'> 			*p-&gt;dpte_row_height_linear = 128;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: dpte_row_width_ub = %u (linear)\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dpte_row_width_ub = %u (linear)\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	} else if (!dml_is_vertical_rotation(p-&gt;RotationAngle)) {</div><div class='hunk'>@@ -1825,7 +1768,7 @@ static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_</div><div class='ctx'> 			*p-&gt;dpte_row_width_ub = (unsigned int)((math_ceil2((double)(p-&gt;SwathWidth - 1) / (double)*p-&gt;PixelPTEReqWidth, 1) + 1.0) * *p-&gt;PixelPTEReqWidth);</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: dpte_row_width_ub = %u (tiled horz)\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dpte_row_width_ub = %u (tiled horz)\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		*p-&gt;PixelPTEBytesPerRow = *p-&gt;dpte_row_width_ub / *p-&gt;PixelPTEReqWidth * *p-&gt;PTERequestSize;</div><div class='hunk'>@@ -1840,7 +1783,7 @@ static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_</div><div class='ctx'> </div><div class='ctx'> 		*p-&gt;PixelPTEBytesPerRow = (unsigned int)((double)*p-&gt;dpte_row_width_ub / (double)*p-&gt;PixelPTEReqHeight * *p-&gt;PTERequestSize);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: dpte_row_width_ub = %u (tiled vert)\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dpte_row_width_ub = %u (tiled vert)\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1852,18 +1795,18 @@ static unsigned int CalculateVMAndRowBytes(struct dml2_core_shared_calculate_vm_</div><div class='ctx'> 	*p-&gt;PixelPTEBytesPerRowStorage = *p-&gt;PixelPTEBytesPerRow;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: GPUVMMinPageSizeKBytes = %u\n", __func__, p-&gt;GPUVMMinPageSizeKBytes);</div><div class='del'>-	dml2_printf("DML::%s: GPUVMEnable = %u\n", __func__, p-&gt;GPUVMEnable);</div><div class='del'>-	dml2_printf("DML::%s: meta_row_height = %u\n", __func__, *p-&gt;meta_row_height);</div><div class='del'>-	dml2_printf("DML::%s: dpte_row_height = %u\n", __func__, *p-&gt;dpte_row_height);</div><div class='del'>-	dml2_printf("DML::%s: dpte_row_height_linear = %u\n", __func__, *p-&gt;dpte_row_height_linear);</div><div class='del'>-	dml2_printf("DML::%s: dpte_row_width_ub = %u\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='del'>-	dml2_printf("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, *p-&gt;PixelPTEBytesPerRow);</div><div class='del'>-	dml2_printf("DML::%s: PixelPTEBytesPerRowStorage = %u\n", __func__, *p-&gt;PixelPTEBytesPerRowStorage);</div><div class='del'>-	dml2_printf("DML::%s: PTEBufferSizeInRequests = %u\n", __func__, p-&gt;PTEBufferSizeInRequests);</div><div class='del'>-	dml2_printf("DML::%s: dpte_row_height_one_row_per_frame = %u\n", __func__, *p-&gt;dpte_row_height_one_row_per_frame);</div><div class='del'>-	dml2_printf("DML::%s: dpte_row_width_ub_one_row_per_frame = %u\n", __func__, *p-&gt;dpte_row_width_ub_one_row_per_frame);</div><div class='del'>-	dml2_printf("DML::%s: PixelPTEBytesPerRow_one_row_per_frame = %u\n", __func__, *p-&gt;PixelPTEBytesPerRow_one_row_per_frame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMMinPageSizeKBytes = %u\n", __func__, p-&gt;GPUVMMinPageSizeKBytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMEnable = %u\n", __func__, p-&gt;GPUVMEnable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: meta_row_height = %u\n", __func__, *p-&gt;meta_row_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpte_row_height = %u\n", __func__, *p-&gt;dpte_row_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpte_row_height_linear = %u\n", __func__, *p-&gt;dpte_row_height_linear);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpte_row_width_ub = %u\n", __func__, *p-&gt;dpte_row_width_ub);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, *p-&gt;PixelPTEBytesPerRow);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelPTEBytesPerRowStorage = %u\n", __func__, *p-&gt;PixelPTEBytesPerRowStorage);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PTEBufferSizeInRequests = %u\n", __func__, p-&gt;PTEBufferSizeInRequests);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpte_row_height_one_row_per_frame = %u\n", __func__, *p-&gt;dpte_row_height_one_row_per_frame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpte_row_width_ub_one_row_per_frame = %u\n", __func__, *p-&gt;dpte_row_width_ub_one_row_per_frame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelPTEBytesPerRow_one_row_per_frame = %u\n", __func__, *p-&gt;PixelPTEBytesPerRow_one_row_per_frame);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return vm_bytes;</div><div class='hunk'>@@ -1894,12 +1837,12 @@ static unsigned int CalculatePrefetchSourceLines(</div><div class='ctx'> 	double numLines = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: VRatio = %f\n", __func__, VRatio);</div><div class='del'>-	dml2_printf("DML::%s: VTaps = %u\n", __func__, VTaps);</div><div class='del'>-	dml2_printf("DML::%s: ViewportXStart = %u\n", __func__, ViewportXStart);</div><div class='del'>-	dml2_printf("DML::%s: ViewportYStart = %u\n", __func__, ViewportYStart);</div><div class='del'>-	dml2_printf("DML::%s: ViewportStationary = %u\n", __func__, ViewportStationary);</div><div class='del'>-	dml2_printf("DML::%s: SwathHeight = %u\n", __func__, SwathHeight);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VRatio = %f\n", __func__, VRatio);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VTaps = %u\n", __func__, VTaps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ViewportXStart = %u\n", __func__, ViewportXStart);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ViewportYStart = %u\n", __func__, ViewportYStart);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ViewportStationary = %u\n", __func__, ViewportStationary);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SwathHeight = %u\n", __func__, SwathHeight);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (ProgressiveToInterlaceUnitInOPP)</div><div class='ctx'> 		*VInitPreFill = (unsigned int)(math_floor2((VRatio + (double)VTaps + 1) / 2.0, 1));</div><div class='hunk'>@@ -1934,11 +1877,11 @@ static unsigned int CalculatePrefetchSourceLines(</div><div class='ctx'> 	numLines = *MaxNumSwath * SwathHeight + MaxPartialSwath;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: vp_start_rot = %u\n", __func__, vp_start_rot);</div><div class='del'>-	dml2_printf("DML::%s: VInitPreFill = %u\n", __func__, *VInitPreFill);</div><div class='del'>-	dml2_printf("DML::%s: MaxPartialSwath = %u\n", __func__, MaxPartialSwath);</div><div class='del'>-	dml2_printf("DML::%s: MaxNumSwath = %u\n", __func__, *MaxNumSwath);</div><div class='del'>-	dml2_printf("DML::%s: Prefetch source lines = %3.2f\n", __func__, numLines);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vp_start_rot = %u\n", __func__, vp_start_rot);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VInitPreFill = %u\n", __func__, *VInitPreFill);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxPartialSwath = %u\n", __func__, MaxPartialSwath);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxNumSwath = %u\n", __func__, *MaxNumSwath);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Prefetch source lines = %3.2f\n", __func__, numLines);</div><div class='ctx'> #endif</div><div class='ctx'> 	return (unsigned int)(numLines);</div><div class='ctx'> </div><div class='hunk'>@@ -2007,8 +1950,8 @@ static void CalculateMALLUseForStaticScreen(</div><div class='ctx'> 		if (is_using_mall_for_ss[k])</div><div class='ctx'> 			TotalSurfaceSizeInMALL = TotalSurfaceSizeInMALL + SurfaceSizeInMALL[k];</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, is_using_mall_for_ss = %u\n", __func__, k, is_using_mall_for_ss[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, TotalSurfaceSizeInMALL = %u\n", __func__, k, TotalSurfaceSizeInMALL);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, is_using_mall_for_ss = %u\n", __func__, k, is_using_mall_for_ss[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, TotalSurfaceSizeInMALL = %u\n", __func__, k, TotalSurfaceSizeInMALL);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2022,7 +1965,7 @@ static void CalculateMALLUseForStaticScreen(</div><div class='ctx'> 				(!CanAddAnotherSurfaceToMALL || SurfaceSizeInMALL[k] &lt; SurfaceSizeInMALL[SurfaceToAddToMALL])) {</div><div class='ctx'> 				CanAddAnotherSurfaceToMALL = true;</div><div class='ctx'> 				SurfaceToAddToMALL = k;</div><div class='del'>-				dml2_printf("DML::%s: k=%u, UseMALLForStaticScreen = %u (dis, en, optimize)\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.refresh_from_mall);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, UseMALLForStaticScreen = %u (dis, en, optimize)\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.refresh_from_mall);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (CanAddAnotherSurfaceToMALL) {</div><div class='hunk'>@@ -2030,8 +1973,8 @@ static void CalculateMALLUseForStaticScreen(</div><div class='ctx'> 			TotalSurfaceSizeInMALL = TotalSurfaceSizeInMALL + SurfaceSizeInMALL[SurfaceToAddToMALL];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: SurfaceToAddToMALL = %u\n", __func__, SurfaceToAddToMALL);</div><div class='del'>-			dml2_printf("DML::%s: TotalSurfaceSizeInMALL = %u\n", __func__, TotalSurfaceSizeInMALL);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: SurfaceToAddToMALL = %u\n", __func__, SurfaceToAddToMALL);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: TotalSurfaceSizeInMALL = %u\n", __func__, TotalSurfaceSizeInMALL);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2203,15 +2146,15 @@ static void CalculateDCCConfiguration(</div><div class='ctx'> 		segment_order_vert_contiguous_chroma = 0;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DCCEnabled = %u\n", __func__, DCCEnabled);</div><div class='del'>-	dml2_printf("DML::%s: nomDETInKByte = %u\n", __func__, nomDETInKByte);</div><div class='del'>-	dml2_printf("DML::%s: DETBufferSizeForDCC = %u\n", __func__, DETBufferSizeForDCC);</div><div class='del'>-	dml2_printf("DML::%s: req128_horz_wc_l = %u\n", __func__, req128_horz_wc_l);</div><div class='del'>-	dml2_printf("DML::%s: req128_horz_wc_c = %u\n", __func__, req128_horz_wc_c);</div><div class='del'>-	dml2_printf("DML::%s: full_swath_bytes_horz_wc_l = %u\n", __func__, full_swath_bytes_horz_wc_l);</div><div class='del'>-	dml2_printf("DML::%s: full_swath_bytes_vert_wc_c = %u\n", __func__, full_swath_bytes_vert_wc_c);</div><div class='del'>-	dml2_printf("DML::%s: segment_order_horz_contiguous_luma = %u\n", __func__, segment_order_horz_contiguous_luma);</div><div class='del'>-	dml2_printf("DML::%s: segment_order_horz_contiguous_chroma = %u\n", __func__, segment_order_horz_contiguous_chroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCCEnabled = %u\n", __func__, DCCEnabled);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: nomDETInKByte = %u\n", __func__, nomDETInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DETBufferSizeForDCC = %u\n", __func__, DETBufferSizeForDCC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: req128_horz_wc_l = %u\n", __func__, req128_horz_wc_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: req128_horz_wc_c = %u\n", __func__, req128_horz_wc_c);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: full_swath_bytes_horz_wc_l = %u\n", __func__, full_swath_bytes_horz_wc_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: full_swath_bytes_vert_wc_c = %u\n", __func__, full_swath_bytes_vert_wc_c);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: segment_order_horz_contiguous_luma = %u\n", __func__, segment_order_horz_contiguous_luma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: segment_order_horz_contiguous_chroma = %u\n", __func__, segment_order_horz_contiguous_chroma);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (DCCProgrammingAssumesScanDirectionUnknown == true) {</div><div class='ctx'> 		if (req128_horz_wc_l == 0 &amp;&amp; req128_vert_wc_l == 0) {</div><div class='hunk'>@@ -2301,12 +2244,12 @@ static void CalculateDCCConfiguration(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: MaxUncompressedBlockLuma = %u\n", __func__, *MaxUncompressedBlockLuma);</div><div class='del'>-	dml2_printf("DML::%s: MaxCompressedBlockLuma = %u\n", __func__, *MaxCompressedBlockLuma);</div><div class='del'>-	dml2_printf("DML::%s: IndependentBlockLuma = %u\n", __func__, *IndependentBlockLuma);</div><div class='del'>-	dml2_printf("DML::%s: MaxUncompressedBlockChroma = %u\n", __func__, *MaxUncompressedBlockChroma);</div><div class='del'>-	dml2_printf("DML::%s: MaxCompressedBlockChroma = %u\n", __func__, *MaxCompressedBlockChroma);</div><div class='del'>-	dml2_printf("DML::%s: IndependentBlockChroma = %u\n", __func__, *IndependentBlockChroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxUncompressedBlockLuma = %u\n", __func__, *MaxUncompressedBlockLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxCompressedBlockLuma = %u\n", __func__, *MaxCompressedBlockLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: IndependentBlockLuma = %u\n", __func__, *IndependentBlockLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxUncompressedBlockChroma = %u\n", __func__, *MaxUncompressedBlockChroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxCompressedBlockChroma = %u\n", __func__, *MaxCompressedBlockChroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: IndependentBlockChroma = %u\n", __func__, *IndependentBlockChroma);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -2326,26 +2269,26 @@ static void calculate_mcache_row_bytes(</div><div class='ctx'> 	unsigned int mvmpg_per_mcache;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: num_chans = %u\n", __func__, p-&gt;num_chans);</div><div class='del'>-	dml2_printf("DML::%s: mem_word_bytes = %u\n", __func__, p-&gt;mem_word_bytes);</div><div class='del'>-	dml2_printf("DML::%s: mcache_line_size_bytes = %u\n", __func__, p-&gt;mcache_line_size_bytes);</div><div class='del'>-	dml2_printf("DML::%s: mcache_size_bytes = %u\n", __func__, p-&gt;mcache_size_bytes);</div><div class='del'>-	dml2_printf("DML::%s: gpuvm_enable = %u\n", __func__, p-&gt;gpuvm_enable);</div><div class='del'>-	dml2_printf("DML::%s: gpuvm_page_size_kbytes = %u\n", __func__, p-&gt;gpuvm_page_size_kbytes);</div><div class='del'>-	dml2_printf("DML::%s: vp_stationary = %u\n", __func__, p-&gt;vp_stationary);</div><div class='del'>-	dml2_printf("DML::%s: tiling_mode = %u\n", __func__, p-&gt;tiling_mode);</div><div class='del'>-	dml2_printf("DML::%s: vp_start_x = %u\n", __func__, p-&gt;vp_start_x);</div><div class='del'>-	dml2_printf("DML::%s: vp_start_y = %u\n", __func__, p-&gt;vp_start_y);</div><div class='del'>-	dml2_printf("DML::%s: full_vp_width = %u\n", __func__, p-&gt;full_vp_width);</div><div class='del'>-	dml2_printf("DML::%s: full_vp_height = %u\n", __func__, p-&gt;full_vp_height);</div><div class='del'>-	dml2_printf("DML::%s: blk_width = %u\n", __func__, p-&gt;blk_width);</div><div class='del'>-	dml2_printf("DML::%s: blk_height = %u\n", __func__, p-&gt;blk_height);</div><div class='del'>-	dml2_printf("DML::%s: vmpg_width = %u\n", __func__, p-&gt;vmpg_width);</div><div class='del'>-	dml2_printf("DML::%s: vmpg_height = %u\n", __func__, p-&gt;vmpg_height);</div><div class='del'>-	dml2_printf("DML::%s: full_swath_bytes = %u\n", __func__, p-&gt;full_swath_bytes);</div><div class='del'>-#endif</div><div class='del'>-	DML2_ASSERT(p-&gt;mcache_line_size_bytes != 0);</div><div class='del'>-	DML2_ASSERT(p-&gt;mcache_size_bytes != 0);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_chans = %u\n", __func__, p-&gt;num_chans);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mem_word_bytes = %u\n", __func__, p-&gt;mem_word_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mcache_line_size_bytes = %u\n", __func__, p-&gt;mcache_line_size_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mcache_size_bytes = %u\n", __func__, p-&gt;mcache_size_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: gpuvm_enable = %u\n", __func__, p-&gt;gpuvm_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: gpuvm_page_size_kbytes = %u\n", __func__, p-&gt;gpuvm_page_size_kbytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vp_stationary = %u\n", __func__, p-&gt;vp_stationary);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tiling_mode = %u\n", __func__, p-&gt;tiling_mode);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vp_start_x = %u\n", __func__, p-&gt;vp_start_x);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vp_start_y = %u\n", __func__, p-&gt;vp_start_y);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: full_vp_width = %u\n", __func__, p-&gt;full_vp_width);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: full_vp_height = %u\n", __func__, p-&gt;full_vp_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: blk_width = %u\n", __func__, p-&gt;blk_width);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: blk_height = %u\n", __func__, p-&gt;blk_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vmpg_width = %u\n", __func__, p-&gt;vmpg_width);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vmpg_height = %u\n", __func__, p-&gt;vmpg_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: full_swath_bytes = %u\n", __func__, p-&gt;full_swath_bytes);</div><div class='add'>+#endif</div><div class='add'>+	DML_ASSERT(p-&gt;mcache_line_size_bytes != 0);</div><div class='add'>+	DML_ASSERT(p-&gt;mcache_size_bytes != 0);</div><div class='ctx'> </div><div class='ctx'> 	*p-&gt;mvmpg_width = 0;</div><div class='ctx'> 	*p-&gt;mvmpg_height = 0;</div><div class='hunk'>@@ -2370,8 +2313,8 @@ static void calculate_mcache_row_bytes(</div><div class='ctx'> 				*p-&gt;mvmpg_width = p-&gt;vmpg_width;</div><div class='ctx'> 				*p-&gt;mvmpg_height = p-&gt;vmpg_height;</div><div class='ctx'> 			} else if (!((blk_bytes == 65536) &amp;&amp; (vmpg_bytes == 4096))) {</div><div class='del'>-				dml2_printf("ERROR: DML::%s: Tiling size and vm page size combination not supported\n", __func__);</div><div class='del'>-				DML2_ASSERT(0);</div><div class='add'>+				DML_LOG_VERBOSE("ERROR: DML::%s: Tiling size and vm page size combination not supported\n", __func__);</div><div class='add'>+				DML_ASSERT(0);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2439,25 +2382,25 @@ static void calculate_mcache_row_bytes(</div><div class='ctx'> 		*p-&gt;mvmpg_per_mcache_lb = (unsigned int)math_floor2(mvmpg_per_mcache, 1);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: gpuvm_enable = %u\n", __func__, p-&gt;gpuvm_enable);</div><div class='del'>-		dml2_printf("DML::%s: vmpg_bytes = %u\n", __func__, vmpg_bytes);</div><div class='del'>-		dml2_printf("DML::%s: blk_bytes = %u\n", __func__, blk_bytes);</div><div class='del'>-		dml2_printf("DML::%s: meta_per_mvmpg_per_channel = %f\n", __func__, meta_per_mvmpg_per_channel);</div><div class='del'>-		dml2_printf("DML::%s: mvmpg_per_row_ub = %u\n", __func__, mvmpg_per_row_ub);</div><div class='del'>-		dml2_printf("DML::%s: meta_row_width_ub = %u\n", __func__, *p-&gt;meta_row_width_ub);</div><div class='del'>-		dml2_printf("DML::%s: mvmpg_width = %u\n", __func__, *p-&gt;mvmpg_width);</div><div class='del'>-		dml2_printf("DML::%s: mvmpg_height = %u\n", __func__, *p-&gt;mvmpg_height);</div><div class='del'>-		dml2_printf("DML::%s: dcc_dram_bw_nom_overhead_factor = %f\n", __func__, *p-&gt;dcc_dram_bw_nom_overhead_factor);</div><div class='del'>-		dml2_printf("DML::%s: dcc_dram_bw_pref_overhead_factor = %f\n", __func__, *p-&gt;dcc_dram_bw_pref_overhead_factor);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: gpuvm_enable = %u\n", __func__, p-&gt;gpuvm_enable);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: vmpg_bytes = %u\n", __func__, vmpg_bytes);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: blk_bytes = %u\n", __func__, blk_bytes);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: meta_per_mvmpg_per_channel = %f\n", __func__, meta_per_mvmpg_per_channel);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mvmpg_per_row_ub = %u\n", __func__, mvmpg_per_row_ub);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: meta_row_width_ub = %u\n", __func__, *p-&gt;meta_row_width_ub);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mvmpg_width = %u\n", __func__, *p-&gt;mvmpg_width);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mvmpg_height = %u\n", __func__, *p-&gt;mvmpg_height);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dcc_dram_bw_nom_overhead_factor = %f\n", __func__, *p-&gt;dcc_dram_bw_nom_overhead_factor);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dcc_dram_bw_pref_overhead_factor = %f\n", __func__, *p-&gt;dcc_dram_bw_pref_overhead_factor);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: mcache_row_bytes = %u\n", __func__, *p-&gt;mcache_row_bytes);</div><div class='del'>-	dml2_printf("DML::%s: mcache_row_bytes_per_channel = %u\n", __func__, *p-&gt;mcache_row_bytes_per_channel);</div><div class='del'>-	dml2_printf("DML::%s: num_mcaches = %u\n", __func__, *p-&gt;num_mcaches);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mcache_row_bytes = %u\n", __func__, *p-&gt;mcache_row_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mcache_row_bytes_per_channel = %u\n", __func__, *p-&gt;mcache_row_bytes_per_channel);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_mcaches = %u\n", __func__, *p-&gt;num_mcaches);</div><div class='ctx'> #endif</div><div class='del'>-	DML2_ASSERT(*p-&gt;num_mcaches &gt; 0);</div><div class='add'>+	DML_ASSERT(*p-&gt;num_mcaches &gt; 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void calculate_mcache_setting(</div><div class='hunk'>@@ -2523,7 +2466,7 @@ static void calculate_mcache_setting(</div><div class='ctx'> 	l-&gt;l_p.mvmpg_per_mcache_lb = &amp;l-&gt;mvmpg_per_mcache_lb_l;</div><div class='ctx'> </div><div class='ctx'> 	calculate_mcache_row_bytes(scratch, &amp;l-&gt;l_p);</div><div class='del'>-	DML2_ASSERT(*p-&gt;num_mcaches_l &gt; 0);</div><div class='add'>+	DML_ASSERT(*p-&gt;num_mcaches_l &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 	if (l-&gt;is_dual_plane) {</div><div class='ctx'> 		l-&gt;c_p.num_chans = p-&gt;num_chans;</div><div class='hunk'>@@ -2559,7 +2502,7 @@ static void calculate_mcache_setting(</div><div class='ctx'> 		l-&gt;c_p.mvmpg_per_mcache_lb = &amp;l-&gt;mvmpg_per_mcache_lb_c;</div><div class='ctx'> </div><div class='ctx'> 		calculate_mcache_row_bytes(scratch, &amp;l-&gt;c_p);</div><div class='del'>-		DML2_ASSERT(*p-&gt;num_mcaches_c &gt; 0);</div><div class='add'>+		DML_ASSERT(*p-&gt;num_mcaches_c &gt; 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	// Sharing for iMALL access</div><div class='hunk'>@@ -2598,28 +2541,28 @@ static void calculate_mcache_setting(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: imall_enable = %u\n", __func__, p-&gt;imall_enable);</div><div class='del'>-	dml2_printf("DML::%s: is_dual_plane = %u\n", __func__, l-&gt;is_dual_plane);</div><div class='del'>-	dml2_printf("DML::%s: surf_vert = %u\n", __func__, p-&gt;surf_vert);</div><div class='del'>-	dml2_printf("DML::%s: mvmpg_width_l = %u\n", __func__, l-&gt;mvmpg_width_l);</div><div class='del'>-	dml2_printf("DML::%s: mvmpg_height_l = %u\n", __func__, l-&gt;mvmpg_height_l);</div><div class='del'>-	dml2_printf("DML::%s: mcache_remainder_l = %f\n", __func__, l-&gt;mcache_remainder_l);</div><div class='del'>-	dml2_printf("DML::%s: num_mcaches_l = %u\n", __func__, *p-&gt;num_mcaches_l);</div><div class='del'>-	dml2_printf("DML::%s: avg_mcache_element_size_l = %u\n", __func__, l-&gt;avg_mcache_element_size_l);</div><div class='del'>-	dml2_printf("DML::%s: mvmpg_access_width_l = %u\n", __func__, l-&gt;mvmpg_access_width_l);</div><div class='del'>-	dml2_printf("DML::%s: mall_comb_mcache_l = %u\n", __func__, *p-&gt;mall_comb_mcache_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: imall_enable = %u\n", __func__, p-&gt;imall_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: is_dual_plane = %u\n", __func__, l-&gt;is_dual_plane);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: surf_vert = %u\n", __func__, p-&gt;surf_vert);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mvmpg_width_l = %u\n", __func__, l-&gt;mvmpg_width_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mvmpg_height_l = %u\n", __func__, l-&gt;mvmpg_height_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mcache_remainder_l = %f\n", __func__, l-&gt;mcache_remainder_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_mcaches_l = %u\n", __func__, *p-&gt;num_mcaches_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: avg_mcache_element_size_l = %u\n", __func__, l-&gt;avg_mcache_element_size_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mvmpg_access_width_l = %u\n", __func__, l-&gt;mvmpg_access_width_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mall_comb_mcache_l = %u\n", __func__, *p-&gt;mall_comb_mcache_l);</div><div class='ctx'> </div><div class='ctx'> 	if (l-&gt;is_dual_plane) {</div><div class='del'>-		dml2_printf("DML::%s: mvmpg_width_c = %u\n", __func__, l-&gt;mvmpg_width_c);</div><div class='del'>-		dml2_printf("DML::%s: mvmpg_height_c = %u\n", __func__, l-&gt;mvmpg_height_c);</div><div class='del'>-		dml2_printf("DML::%s: mcache_remainder_c = %f\n", __func__, l-&gt;mcache_remainder_c);</div><div class='del'>-		dml2_printf("DML::%s: luma_time_factor = %f\n", __func__, l-&gt;luma_time_factor);</div><div class='del'>-		dml2_printf("DML::%s: num_mcaches_c = %u\n", __func__, *p-&gt;num_mcaches_c);</div><div class='del'>-		dml2_printf("DML::%s: avg_mcache_element_size_c = %u\n", __func__, l-&gt;avg_mcache_element_size_c);</div><div class='del'>-		dml2_printf("DML::%s: mvmpg_access_width_c = %u\n", __func__, l-&gt;mvmpg_access_width_c);</div><div class='del'>-		dml2_printf("DML::%s: mall_comb_mcache_c = %u\n", __func__, *p-&gt;mall_comb_mcache_c);</div><div class='del'>-		dml2_printf("DML::%s: lc_comb_last_mcache_size = %u\n", __func__, l-&gt;lc_comb_last_mcache_size);</div><div class='del'>-		dml2_printf("DML::%s: lc_comb_mcache = %u\n", __func__, *p-&gt;lc_comb_mcache);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mvmpg_width_c = %u\n", __func__, l-&gt;mvmpg_width_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mvmpg_height_c = %u\n", __func__, l-&gt;mvmpg_height_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mcache_remainder_c = %f\n", __func__, l-&gt;mcache_remainder_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: luma_time_factor = %f\n", __func__, l-&gt;luma_time_factor);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: num_mcaches_c = %u\n", __func__, *p-&gt;num_mcaches_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: avg_mcache_element_size_c = %u\n", __func__, l-&gt;avg_mcache_element_size_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mvmpg_access_width_c = %u\n", __func__, l-&gt;mvmpg_access_width_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mall_comb_mcache_c = %u\n", __func__, *p-&gt;mall_comb_mcache_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: lc_comb_last_mcache_size = %u\n", __func__, l-&gt;lc_comb_last_mcache_size);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: lc_comb_mcache = %u\n", __func__, *p-&gt;lc_comb_mcache);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	// calculate split_coordinate</div><div class='hunk'>@@ -2639,11 +2582,11 @@ static void calculate_mcache_setting(</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='ctx'> 	for (n = 0; n &lt; *p-&gt;num_mcaches_l; n++)</div><div class='del'>-		dml2_printf("DML::%s: mcache_offsets_l[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_l[n]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mcache_offsets_l[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_l[n]);</div><div class='ctx'> </div><div class='ctx'> 	if (l-&gt;is_dual_plane) {</div><div class='ctx'> 		for (n = 0; n &lt; *p-&gt;num_mcaches_c; n++)</div><div class='del'>-			dml2_printf("DML::%s: mcache_offsets_c[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_c[n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: mcache_offsets_c[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_c[n]);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -2660,10 +2603,10 @@ static void calculate_mcache_setting(</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='ctx'> 		for (n = 0; n &lt; *p-&gt;num_mcaches_l; n++)</div><div class='del'>-			dml2_printf("DML::%s: mcache_offsets_l[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_l[n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: mcache_offsets_l[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_l[n]);</div><div class='ctx'> </div><div class='ctx'> 		for (n = 0; n &lt; *p-&gt;num_mcaches_c; n++)</div><div class='del'>-			dml2_printf("DML::%s: mcache_offsets_c[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_c[n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: mcache_offsets_c[%u] = %u\n", __func__, n, p-&gt;mcache_offsets_c[n]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2694,8 +2637,8 @@ static void calculate_mall_bw_overhead_factor(</div><div class='ctx'> 			mall_prefetch_dram_overhead_factor[k] = 2.0;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, mall_prefetch_sdp_overhead_factor = %f\n", __func__, k, mall_prefetch_sdp_overhead_factor[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, mall_prefetch_dram_overhead_factor = %f\n", __func__, k, mall_prefetch_dram_overhead_factor[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, mall_prefetch_sdp_overhead_factor = %f\n", __func__, k, mall_prefetch_sdp_overhead_factor[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, mall_prefetch_dram_overhead_factor = %f\n", __func__, k, mall_prefetch_dram_overhead_factor[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2772,22 +2715,20 @@ static double dml_get_return_bandwidth_available(</div><div class='ctx'> 	else // dml2_core_internal_bw_dram</div><div class='ctx'> 		return_bw_mbps = derate_dram_bandwidth;</div><div class='ctx'> </div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: is_avg_bw = %u\n", __func__, is_avg_bw);</div><div class='del'>-	dml2_printf("DML::%s: is_hvm_en = %u\n", __func__, is_hvm_en);</div><div class='del'>-	dml2_printf("DML::%s: is_hvm_only = %u\n", __func__, is_hvm_only);</div><div class='del'>-	dml2_printf("DML::%s: state_type = %s\n", __func__, dml2_core_internal_soc_state_type_str(state_type));</div><div class='del'>-	dml2_printf("DML::%s: bw_type = %s\n", __func__, dml2_core_internal_bw_type_str(bw_type));</div><div class='del'>-	dml2_printf("DML::%s: dcfclk_mhz = %f\n", __func__, dcfclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: fclk_mhz = %f\n", __func__, fclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: ideal_sdp_bandwidth = %f\n", __func__, ideal_sdp_bandwidth);</div><div class='del'>-	dml2_printf("DML::%s: ideal_fabric_bandwidth = %f\n", __func__, ideal_fabric_bandwidth);</div><div class='del'>-	dml2_printf("DML::%s: ideal_dram_bandwidth = %f\n", __func__, ideal_dram_bandwidth);</div><div class='del'>-	dml2_printf("DML::%s: derate_sdp_bandwidth = %f (derate %f)\n", __func__, derate_sdp_bandwidth, derate_sdp_factor);</div><div class='del'>-	dml2_printf("DML::%s: derate_fabric_bandwidth = %f (derate %f)\n", __func__, derate_fabric_bandwidth, derate_fabric_factor);</div><div class='del'>-	dml2_printf("DML::%s: derate_dram_bandwidth = %f (derate %f)\n", __func__, derate_dram_bandwidth, derate_dram_factor);</div><div class='del'>-	dml2_printf("DML::%s: return_bw_mbps = %f\n", __func__, return_bw_mbps);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: is_avg_bw = %u\n", __func__, is_avg_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: is_hvm_en = %u\n", __func__, is_hvm_en);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: is_hvm_only = %u\n", __func__, is_hvm_only);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: state_type = %s\n", __func__, dml2_core_internal_soc_state_type_str(state_type));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: bw_type = %s\n", __func__, dml2_core_internal_bw_type_str(bw_type));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dcfclk_mhz = %f\n", __func__, dcfclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: fclk_mhz = %f\n", __func__, fclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ideal_sdp_bandwidth = %f\n", __func__, ideal_sdp_bandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ideal_fabric_bandwidth = %f\n", __func__, ideal_fabric_bandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ideal_dram_bandwidth = %f\n", __func__, ideal_dram_bandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: derate_sdp_bandwidth = %f (derate %f)\n", __func__, derate_sdp_bandwidth, derate_sdp_factor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: derate_fabric_bandwidth = %f (derate %f)\n", __func__, derate_fabric_bandwidth, derate_fabric_factor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: derate_dram_bandwidth = %f (derate %f)\n", __func__, derate_dram_bandwidth, derate_dram_factor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: return_bw_mbps = %f\n", __func__, return_bw_mbps);</div><div class='ctx'> 	return return_bw_mbps;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2807,9 +2748,9 @@ static noinline_for_stack void calculate_bandwidth_available(</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int n, m;</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: dcfclk_mhz = %f\n", __func__, dcfclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: fclk_mhz = %f\n", __func__, fclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: dram_bw_mbps = %f\n", __func__, dram_bw_mbps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dcfclk_mhz = %f\n", __func__, dcfclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: fclk_mhz = %f\n", __func__, fclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dram_bw_mbps = %f\n", __func__, dram_bw_mbps);</div><div class='ctx'> </div><div class='ctx'> 	// Calculate all the bandwidth availabe</div><div class='ctx'> 	for (m = 0; m &lt; dml2_core_internal_soc_state_max; m++) {</div><div class='hunk'>@@ -2828,8 +2769,8 @@ static noinline_for_stack void calculate_bandwidth_available(</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: avg_bandwidth_available[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), avg_bandwidth_available[m][n]);</div><div class='del'>-			dml2_printf("DML::%s: urg_bandwidth_available[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), urg_bandwidth_available[m][n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: avg_bandwidth_available[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), avg_bandwidth_available[m][n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: urg_bandwidth_available[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), urg_bandwidth_available[m][n]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 			// urg_bandwidth_available_vm_only is indexed by soc_state</div><div class='hunk'>@@ -2843,9 +2784,9 @@ static noinline_for_stack void calculate_bandwidth_available(</div><div class='ctx'> 		urg_bandwidth_available_min[m] = math_min2(urg_bandwidth_available[m][dml2_core_internal_bw_dram], urg_bandwidth_available[m][dml2_core_internal_bw_sdp]);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: avg_bandwidth_available_min[%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), avg_bandwidth_available_min[m]);</div><div class='del'>-		dml2_printf("DML::%s: urg_bandwidth_available_min[%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), urg_bandwidth_available_min[m]);</div><div class='del'>-		dml2_printf("DML::%s: urg_bandwidth_available_vm_only[%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), urg_bandwidth_available_vm_only[n]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: avg_bandwidth_available_min[%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), avg_bandwidth_available_min[m]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: urg_bandwidth_available_min[%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), urg_bandwidth_available_min[m]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: urg_bandwidth_available_vm_only[%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), urg_bandwidth_available_vm_only[n]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2879,13 +2820,13 @@ static void calculate_avg_bandwidth_required(</div><div class='ctx'> 	// SysActive and SVP Prefetch AVG bandwidth Check</div><div class='ctx'> 	for (k = 0; k &lt; num_active_planes; ++k) {</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: plane %0d\n", __func__, k);</div><div class='del'>-		dml2_printf("DML::%s: ReadBandwidthLuma=%f\n", __func__, ReadBandwidthLuma[k]);</div><div class='del'>-		dml2_printf("DML::%s: ReadBandwidthChroma=%f\n", __func__, ReadBandwidthChroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: dcc_dram_bw_nom_overhead_factor_p0=%f\n", __func__, dcc_dram_bw_nom_overhead_factor_p0[k]);</div><div class='del'>-		dml2_printf("DML::%s: dcc_dram_bw_nom_overhead_factor_p1=%f\n", __func__, dcc_dram_bw_nom_overhead_factor_p1[k]);</div><div class='del'>-		dml2_printf("DML::%s: mall_prefetch_dram_overhead_factor=%f\n", __func__, mall_prefetch_dram_overhead_factor[k]);</div><div class='del'>-		dml2_printf("DML::%s: mall_prefetch_sdp_overhead_factor=%f\n", __func__, mall_prefetch_sdp_overhead_factor[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: plane %0d\n", __func__, k);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: ReadBandwidthLuma=%f\n", __func__, ReadBandwidthLuma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: ReadBandwidthChroma=%f\n", __func__, ReadBandwidthChroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dcc_dram_bw_nom_overhead_factor_p0=%f\n", __func__, dcc_dram_bw_nom_overhead_factor_p0[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dcc_dram_bw_nom_overhead_factor_p1=%f\n", __func__, dcc_dram_bw_nom_overhead_factor_p1[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mall_prefetch_dram_overhead_factor=%f\n", __func__, mall_prefetch_dram_overhead_factor[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mall_prefetch_sdp_overhead_factor=%f\n", __func__, mall_prefetch_sdp_overhead_factor[k]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		sdp_overhead_factor = mall_prefetch_sdp_overhead_factor[k];</div><div class='hunk'>@@ -2902,10 +2843,10 @@ static void calculate_avg_bandwidth_required(</div><div class='ctx'> 		avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram] += dram_overhead_factor_p0 * ReadBandwidthLuma[k] + dram_overhead_factor_p1 * ReadBandwidthChroma[k] + cursor_bw[k];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_sys_active), dml2_core_internal_bw_type_str(dml2_core_internal_bw_sdp), avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]);</div><div class='del'>-		dml2_printf("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_sys_active), dml2_core_internal_bw_type_str(dml2_core_internal_bw_dram), avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]);</div><div class='del'>-		dml2_printf("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_svp_prefetch), dml2_core_internal_bw_type_str(dml2_core_internal_bw_sdp), avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]);</div><div class='del'>-		dml2_printf("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_svp_prefetch), dml2_core_internal_bw_type_str(dml2_core_internal_bw_dram), avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_sys_active), dml2_core_internal_bw_type_str(dml2_core_internal_bw_sdp), avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_sys_active), dml2_core_internal_bw_type_str(dml2_core_internal_bw_dram), avg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_dram]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_svp_prefetch), dml2_core_internal_bw_type_str(dml2_core_internal_bw_sdp), avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_sdp]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: avg_bandwidth_required[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(dml2_core_internal_soc_state_svp_prefetch), dml2_core_internal_bw_type_str(dml2_core_internal_bw_dram), avg_bandwidth_required[dml2_core_internal_soc_state_svp_prefetch][dml2_core_internal_bw_dram]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3080,10 +3021,10 @@ static void CalculateVMRowAndSwath(struct dml2_core_internal_scratch *scratch,</div><div class='ctx'> 			&amp;p-&gt;MaxNumSwathY[k]);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, vm_bytes_l = %u (before hvm level)\n", __func__, k, s-&gt;vm_bytes_l);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, vm_bytes_c = %u (before hvm level)\n", __func__, k, s-&gt;vm_bytes_c);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, meta_row_bytes_per_row_ub_l = %u\n", __func__, k, s-&gt;meta_row_bytes_per_row_ub_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, meta_row_bytes_per_row_ub_c = %u\n", __func__, k, s-&gt;meta_row_bytes_per_row_ub_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, vm_bytes_l = %u (before hvm level)\n", __func__, k, s-&gt;vm_bytes_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, vm_bytes_c = %u (before hvm level)\n", __func__, k, s-&gt;vm_bytes_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, meta_row_bytes_per_row_ub_l = %u\n", __func__, k, s-&gt;meta_row_bytes_per_row_ub_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, meta_row_bytes_per_row_ub_c = %u\n", __func__, k, s-&gt;meta_row_bytes_per_row_ub_c[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		p-&gt;vm_bytes[k] = (s-&gt;vm_bytes_l + s-&gt;vm_bytes_c) * (1 + 8 * s-&gt;HostVMDynamicLevels);</div><div class='ctx'> 		p-&gt;meta_row_bytes[k] = s-&gt;meta_row_bytes_per_row_ub_l[k] + s-&gt;meta_row_bytes_per_row_ub_c[k];</div><div class='hunk'>@@ -3091,8 +3032,8 @@ static void CalculateVMRowAndSwath(struct dml2_core_internal_scratch *scratch,</div><div class='ctx'> 		p-&gt;meta_row_bytes_per_row_ub_c[k] = s-&gt;meta_row_bytes_per_row_ub_c[k];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, meta_row_bytes = %u\n", __func__, k, p-&gt;meta_row_bytes[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, vm_bytes = %u (after hvm level)\n", __func__, k, p-&gt;vm_bytes[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, meta_row_bytes = %u\n", __func__, k, p-&gt;meta_row_bytes[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, vm_bytes = %u (after hvm level)\n", __func__, k, p-&gt;vm_bytes[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		if (s-&gt;PixelPTEBytesPerRowStorageY[k] &lt;= 64 * s-&gt;PTEBufferSizeInRequestsForLuma[k] &amp;&amp; s-&gt;PixelPTEBytesPerRowStorageC[k] &lt;= 64 * s-&gt;PTEBufferSizeInRequestsForChroma[k]) {</div><div class='ctx'> 			p-&gt;PTEBufferSizeNotExceeded[k] = true;</div><div class='hunk'>@@ -3104,18 +3045,18 @@ static void CalculateVMRowAndSwath(struct dml2_core_internal_scratch *scratch,</div><div class='ctx'> 												s-&gt;PixelPTEBytesPerRowC_one_row_per_frame[k] &lt;= 64 * 2 * s-&gt;PTEBufferSizeInRequestsForChroma[k]);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='ctx'> 		if (p-&gt;PTEBufferSizeNotExceeded[k] == 0 || s-&gt;one_row_per_frame_fits_in_buffer[k] == 0) {</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowY = %u (before hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowY[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowC = %u (before hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowC[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowStorageY = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowStorageY[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowStorageC = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowStorageC[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PTEBufferSizeInRequestsForLuma = %u\n", __func__, k, s-&gt;PTEBufferSizeInRequestsForLuma[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PTEBufferSizeInRequestsForChroma = %u\n", __func__, k, s-&gt;PTEBufferSizeInRequestsForChroma[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PTEBufferSizeNotExceeded (not one_row_per_frame) = %u\n", __func__, k, p-&gt;PTEBufferSizeNotExceeded[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowY = %u (before hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowY[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowC = %u (before hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowC[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowStorageY = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowStorageY[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowStorageC = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowStorageC[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PTEBufferSizeInRequestsForLuma = %u\n", __func__, k, s-&gt;PTEBufferSizeInRequestsForLuma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PTEBufferSizeInRequestsForChroma = %u\n", __func__, k, s-&gt;PTEBufferSizeInRequestsForChroma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PTEBufferSizeNotExceeded (not one_row_per_frame) = %u\n", __func__, k, p-&gt;PTEBufferSizeNotExceeded[k]);</div><div class='ctx'> </div><div class='del'>-			dml2_printf("DML::%s: k=%u, HostVMDynamicLevels = %u\n", __func__, k, s-&gt;HostVMDynamicLevels);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowY_one_row_per_frame = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowY_one_row_per_frame[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowC_one_row_per_frame = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowC_one_row_per_frame[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, one_row_per_frame_fits_in_buffer = %u\n", __func__, k, s-&gt;one_row_per_frame_fits_in_buffer[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, HostVMDynamicLevels = %u\n", __func__, k, s-&gt;HostVMDynamicLevels);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowY_one_row_per_frame = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowY_one_row_per_frame[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowC_one_row_per_frame = %u\n", __func__, k, s-&gt;PixelPTEBytesPerRowC_one_row_per_frame[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, one_row_per_frame_fits_in_buffer = %u\n", __func__, k, s-&gt;one_row_per_frame_fits_in_buffer[k]);</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3146,8 +3087,8 @@ static void CalculateVMRowAndSwath(struct dml2_core_internal_scratch *scratch,</div><div class='ctx'> 	for (unsigned int k = 0; k &lt; p-&gt;NumberOfActiveSurfaces; ++k) {</div><div class='ctx'> 		p-&gt;DCCMetaBufferSizeNotExceeded[k] = true;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, SurfaceSizeInMALL = %u\n", __func__, k, p-&gt;SurfaceSizeInMALL[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, is_using_mall_for_ss = %u\n", __func__, k, p-&gt;is_using_mall_for_ss[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, SurfaceSizeInMALL = %u\n", __func__, k, p-&gt;SurfaceSizeInMALL[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, is_using_mall_for_ss = %u\n", __func__, k, p-&gt;is_using_mall_for_ss[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		p-&gt;use_one_row_for_frame[k] = p-&gt;myPipe[k].FORCE_ONE_ROW_FOR_FRAME || p-&gt;is_using_mall_for_ss[k] || (p-&gt;display_cfg-&gt;plane_descriptors[k].overrides.legacy_svp_config == dml2_svp_mode_override_main_pipe) ||</div><div class='ctx'> 			(dml_is_phantom_pipe(&amp;p-&gt;display_cfg-&gt;plane_descriptors[k])) || (p-&gt;display_cfg-&gt;plane_descriptors[k].overrides.gpuvm_min_page_size_kbytes &gt; 64 &amp;&amp; dml_is_vertical_rotation(p-&gt;myPipe[k].RotationAngle));</div><div class='hunk'>@@ -3170,9 +3111,9 @@ static void CalculateVMRowAndSwath(struct dml2_core_internal_scratch *scratch,</div><div class='ctx'> 			p-&gt;DCCMetaBufferSizeNotExceeded[k] = false;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%d, meta_row_bytes = %d\n",  __func__, k, p-&gt;meta_row_bytes[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, DCCMetaBufferSizeBytes = %d\n",  __func__, k, p-&gt;DCCMetaBufferSizeBytes);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, DCCMetaBufferSizeNotExceeded = %d\n",  __func__, k, p-&gt;DCCMetaBufferSizeNotExceeded[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, meta_row_bytes = %d\n",  __func__, k, p-&gt;meta_row_bytes[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, DCCMetaBufferSizeBytes = %d\n",  __func__, k, p-&gt;DCCMetaBufferSizeBytes);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, DCCMetaBufferSizeNotExceeded = %d\n",  __func__, k, p-&gt;DCCMetaBufferSizeNotExceeded[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -3209,20 +3150,20 @@ static void CalculateVMRowAndSwath(struct dml2_core_internal_scratch *scratch,</div><div class='ctx'> 			&amp;p-&gt;dpte_row_bw[k],</div><div class='ctx'> 			&amp;p-&gt;meta_row_bw[k]);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, use_one_row_for_frame = %u\n", __func__, k, p-&gt;use_one_row_for_frame[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, use_one_row_for_frame_flip = %u\n", __func__, k, p-&gt;use_one_row_for_frame_flip[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, UseMALLForPStateChange = %u\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].overrides.legacy_svp_config);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dpte_row_height_luma = %u\n", __func__, k, p-&gt;dpte_row_height_luma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dpte_row_width_luma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_luma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowY = %u (after hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dpte_row_height_chroma = %u\n", __func__, k, p-&gt;dpte_row_height_chroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dpte_row_width_chroma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_chroma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRowC = %u (after hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, PixelPTEBytesPerRow = %u\n", __func__, k, p-&gt;PixelPTEBytesPerRow[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, PTEBufferSizeNotExceeded = %u\n", __func__, k, p-&gt;PTEBufferSizeNotExceeded[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, gpuvm_enable = %u\n", __func__, k, p-&gt;display_cfg-&gt;gpuvm_enable);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, PTE_BUFFER_MODE = %u\n", __func__, k, p-&gt;PTE_BUFFER_MODE[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, BIGK_FRAGMENT_SIZE = %u\n", __func__, k, p-&gt;BIGK_FRAGMENT_SIZE[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, use_one_row_for_frame = %u\n", __func__, k, p-&gt;use_one_row_for_frame[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, use_one_row_for_frame_flip = %u\n", __func__, k, p-&gt;use_one_row_for_frame_flip[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, UseMALLForPStateChange = %u\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].overrides.legacy_svp_config);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dpte_row_height_luma = %u\n", __func__, k, p-&gt;dpte_row_height_luma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dpte_row_width_luma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_luma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowY = %u (after hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dpte_row_height_chroma = %u\n", __func__, k, p-&gt;dpte_row_height_chroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dpte_row_width_chroma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_chroma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRowC = %u (after hvm level)\n", __func__, k, s-&gt;PixelPTEBytesPerRowC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEBytesPerRow = %u\n", __func__, k, p-&gt;PixelPTEBytesPerRow[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, PTEBufferSizeNotExceeded = %u\n", __func__, k, p-&gt;PTEBufferSizeNotExceeded[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, gpuvm_enable = %u\n", __func__, k, p-&gt;display_cfg-&gt;gpuvm_enable);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, PTE_BUFFER_MODE = %u\n", __func__, k, p-&gt;PTE_BUFFER_MODE[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, BIGK_FRAGMENT_SIZE = %u\n", __func__, k, p-&gt;BIGK_FRAGMENT_SIZE[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3257,19 +3198,19 @@ static double CalculateUrgentLatency(</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='ctx'> 	if (qos_type == dml2_qos_param_type_dcn4x) {</div><div class='del'>-		dml2_printf("DML::%s: qos_type = %d\n", __func__, qos_type);</div><div class='del'>-		dml2_printf("DML::%s: urgent_ramp_uclk_cycles = %d\n", __func__, urgent_ramp_uclk_cycles);</div><div class='del'>-		dml2_printf("DML::%s: uclk_freq_mhz = %f\n", __func__, uclk_freq_mhz);</div><div class='del'>-		dml2_printf("DML::%s: umc_urgent_ramp_latency_margin = %f\n", __func__, umc_urgent_ramp_latency_margin);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: qos_type = %d\n", __func__, qos_type);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: urgent_ramp_uclk_cycles = %d\n", __func__, urgent_ramp_uclk_cycles);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: uclk_freq_mhz = %f\n", __func__, uclk_freq_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: umc_urgent_ramp_latency_margin = %f\n", __func__, umc_urgent_ramp_latency_margin);</div><div class='ctx'> 	} else {</div><div class='del'>-		dml2_printf("DML::%s: UrgentLatencyPixelDataOnly = %f\n", __func__, UrgentLatencyPixelDataOnly);</div><div class='del'>-		dml2_printf("DML::%s: UrgentLatencyPixelMixedWithVMData = %f\n", __func__, UrgentLatencyPixelMixedWithVMData);</div><div class='del'>-		dml2_printf("DML::%s: UrgentLatencyVMDataOnly = %f\n", __func__, UrgentLatencyVMDataOnly);</div><div class='del'>-		dml2_printf("DML::%s: UrgentLatencyAdjustmentFabricClockComponent = %f\n", __func__, UrgentLatencyAdjustmentFabricClockComponent);</div><div class='del'>-		dml2_printf("DML::%s: UrgentLatencyAdjustmentFabricClockReference = %f\n", __func__, UrgentLatencyAdjustmentFabricClockReference);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgentLatencyPixelDataOnly = %f\n", __func__, UrgentLatencyPixelDataOnly);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgentLatencyPixelMixedWithVMData = %f\n", __func__, UrgentLatencyPixelMixedWithVMData);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgentLatencyVMDataOnly = %f\n", __func__, UrgentLatencyVMDataOnly);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgentLatencyAdjustmentFabricClockComponent = %f\n", __func__, UrgentLatencyAdjustmentFabricClockComponent);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgentLatencyAdjustmentFabricClockReference = %f\n", __func__, UrgentLatencyAdjustmentFabricClockReference);</div><div class='ctx'> 	}</div><div class='del'>-	dml2_printf("DML::%s: FabricClock = %f\n", __func__, FabricClock);</div><div class='del'>-	dml2_printf("DML::%s: UrgentLatency = %f\n", __func__, urgent_latency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: FabricClock = %f\n", __func__, FabricClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentLatency = %f\n", __func__, urgent_latency);</div><div class='ctx'> #endif</div><div class='ctx'> 	return urgent_latency;</div><div class='ctx'> }</div><div class='hunk'>@@ -3296,18 +3237,18 @@ static double CalculateTripToMemory(</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='ctx'> 	if (qos_type == dml2_qos_param_type_dcn4x) {</div><div class='del'>-		dml2_printf("DML::%s: qos_type = %d\n", __func__, qos_type);</div><div class='del'>-		dml2_printf("DML::%s: max_round_trip_to_furthest_cs_fclk_cycles = %d\n", __func__, max_round_trip_to_furthest_cs_fclk_cycles);</div><div class='del'>-		dml2_printf("DML::%s: mall_overhead_fclk_cycles = %d\n", __func__, mall_overhead_fclk_cycles);</div><div class='del'>-		dml2_printf("DML::%s: trip_to_memory_uclk_cycles = %d\n", __func__, trip_to_memory_uclk_cycles);</div><div class='del'>-		dml2_printf("DML::%s: uclk_freq_mhz = %f\n", __func__, uclk_freq_mhz);</div><div class='del'>-		dml2_printf("DML::%s: FabricClock = %f\n", __func__, FabricClock);</div><div class='del'>-		dml2_printf("DML::%s: fabric_max_transport_latency_margin = %f\n", __func__, fabric_max_transport_latency_margin);</div><div class='del'>-		dml2_printf("DML::%s: umc_max_latency_margin = %f\n", __func__, umc_max_latency_margin);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: qos_type = %d\n", __func__, qos_type);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: max_round_trip_to_furthest_cs_fclk_cycles = %d\n", __func__, max_round_trip_to_furthest_cs_fclk_cycles);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: mall_overhead_fclk_cycles = %d\n", __func__, mall_overhead_fclk_cycles);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: trip_to_memory_uclk_cycles = %d\n", __func__, trip_to_memory_uclk_cycles);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: uclk_freq_mhz = %f\n", __func__, uclk_freq_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: FabricClock = %f\n", __func__, FabricClock);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: fabric_max_transport_latency_margin = %f\n", __func__, fabric_max_transport_latency_margin);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: umc_max_latency_margin = %f\n", __func__, umc_max_latency_margin);</div><div class='ctx'> 	} else {</div><div class='del'>-		dml2_printf("DML::%s: UrgLatency = %f\n", __func__, UrgLatency);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgLatency = %f\n", __func__, UrgLatency);</div><div class='ctx'> 	}</div><div class='del'>-	dml2_printf("DML::%s: trip_to_memory_us = %f\n", __func__, trip_to_memory_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: trip_to_memory_us = %f\n", __func__, trip_to_memory_us);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -3334,14 +3275,14 @@ static double CalculateMetaTripToMemory(</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='ctx'> 	if (qos_type == dml2_qos_param_type_dcn4x) {</div><div class='del'>-		dml2_printf("DML::%s: qos_type = %d\n", __func__, qos_type);</div><div class='del'>-		dml2_printf("DML::%s: meta_trip_to_memory_fclk_cycles = %d\n", __func__, meta_trip_to_memory_fclk_cycles);</div><div class='del'>-		dml2_printf("DML::%s: meta_trip_to_memory_uclk_cycles = %d\n", __func__, meta_trip_to_memory_uclk_cycles);</div><div class='del'>-		dml2_printf("DML::%s: uclk_freq_mhz = %f\n", __func__, uclk_freq_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: qos_type = %d\n", __func__, qos_type);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: meta_trip_to_memory_fclk_cycles = %d\n", __func__, meta_trip_to_memory_fclk_cycles);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: meta_trip_to_memory_uclk_cycles = %d\n", __func__, meta_trip_to_memory_uclk_cycles);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: uclk_freq_mhz = %f\n", __func__, uclk_freq_mhz);</div><div class='ctx'> 	} else {</div><div class='del'>-		dml2_printf("DML::%s: UrgLatency = %f\n", __func__, UrgLatency);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgLatency = %f\n", __func__, UrgLatency);</div><div class='ctx'> 	}</div><div class='del'>-	dml2_printf("DML::%s: meta_trip_to_memory_us = %f\n", __func__, meta_trip_to_memory_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: meta_trip_to_memory_us = %f\n", __func__, meta_trip_to_memory_us);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -3358,7 +3299,6 @@ static void calculate_cursor_req_attributes(</div><div class='ctx'> 	unsigned int *cursor_bytes_per_chunk,</div><div class='ctx'> 	unsigned int *cursor_bytes)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cursor_pitch = 0;</div><div class='ctx'> 	unsigned int cursor_bytes_per_req = 0;</div><div class='ctx'> 	unsigned int cursor_width_bytes = 0;</div><div class='ctx'> 	unsigned int cursor_height = 0;</div><div class='hunk'>@@ -3366,10 +3306,6 @@ static void calculate_cursor_req_attributes(</div><div class='ctx'> 	//SW determines the cursor pitch to support the maximum cursor_width that will be used but the following restrictions apply.</div><div class='ctx'> 	//- For 2bpp, cursor_pitch = 256 pixels due to min cursor request size of 64B</div><div class='ctx'> 	//- For 32 or 64 bpp, cursor_pitch = 64, 128 or 256 pixels depending on the cursor width</div><div class='del'>-	if (cursor_bpp == 2)</div><div class='del'>-		cursor_pitch = 256;</div><div class='del'>-	else</div><div class='del'>-		cursor_pitch = (unsigned int)1 &lt;&lt; (unsigned int)math_ceil2(math_log((float)cursor_width, 2), 1);</div><div class='ctx'> </div><div class='ctx'> 	//The cursor requestor uses a cursor request size of 64B, 128B, or 256B depending on the cursor_width and cursor_bpp as follows.</div><div class='ctx'> </div><div class='hunk'>@@ -3409,8 +3345,8 @@ static void calculate_cursor_req_attributes(</div><div class='ctx'> 			*cursor_lines_per_chunk = 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (cursor_width &gt; 0) {</div><div class='del'>-			dml2_printf("DML::%s: Invalid cursor_bpp = %d\n", __func__, cursor_bpp);</div><div class='del'>-			DML2_ASSERT(0);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Invalid cursor_bpp = %d\n", __func__, cursor_bpp);</div><div class='add'>+			DML_ASSERT(0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3421,15 +3357,15 @@ static void calculate_cursor_req_attributes(</div><div class='ctx'> 	cursor_height = cursor_width;</div><div class='ctx'> 	*cursor_bytes = *cursor_bytes_per_line * cursor_height;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: cursor_bpp = %d\n", __func__, cursor_bpp);</div><div class='del'>-	dml2_printf("DML::%s: cursor_width = %d\n", __func__, cursor_width);</div><div class='del'>-	dml2_printf("DML::%s: cursor_width_bytes = %d\n", __func__, cursor_width_bytes);</div><div class='del'>-	dml2_printf("DML::%s: cursor_bytes_per_req = %d\n", __func__, cursor_bytes_per_req);</div><div class='del'>-	dml2_printf("DML::%s: cursor_lines_per_chunk = %d\n", __func__, *cursor_lines_per_chunk);</div><div class='del'>-	dml2_printf("DML::%s: cursor_bytes_per_line = %d\n", __func__, *cursor_bytes_per_line);</div><div class='del'>-	dml2_printf("DML::%s: cursor_bytes_per_chunk = %d\n", __func__, *cursor_bytes_per_chunk);</div><div class='del'>-	dml2_printf("DML::%s: cursor_bytes = %d\n", __func__, *cursor_bytes);</div><div class='del'>-	dml2_printf("DML::%s: cursor_pitch = %d\n", __func__, cursor_pitch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_bpp = %d\n", __func__, cursor_bpp);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_width = %d\n", __func__, cursor_width);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_width_bytes = %d\n", __func__, cursor_width_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_req = %d\n", __func__, cursor_bytes_per_req);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_lines_per_chunk = %d\n", __func__, *cursor_lines_per_chunk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_line = %d\n", __func__, *cursor_bytes_per_line);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_chunk = %d\n", __func__, *cursor_bytes_per_chunk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_bytes = %d\n", __func__, *cursor_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: cursor_pitch = %d\n", __func__, cursor_bpp == 2 ? 256 : (unsigned int)1 &lt;&lt; (unsigned int)math_ceil2(math_log((float)cursor_width, 2), 1));</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3460,13 +3396,13 @@ static void calculate_cursor_urgent_burst_factor(</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: LinesInCursorBuffer = %u\n", __func__, LinesInCursorBuffer);</div><div class='del'>-		dml2_printf("DML::%s: CursorBufferSizeInTime = %f\n", __func__, CursorBufferSizeInTime);</div><div class='del'>-		dml2_printf("DML::%s: CursorBufferSize = %u (kbytes)\n", __func__, CursorBufferSize);</div><div class='del'>-		dml2_printf("DML::%s: cursor_bytes_per_chunk = %u\n", __func__, cursor_bytes_per_chunk);</div><div class='del'>-		dml2_printf("DML::%s: cursor_lines_per_chunk = %u\n", __func__, cursor_lines_per_chunk);</div><div class='del'>-		dml2_printf("DML::%s: UrgentBurstFactorCursor = %f\n", __func__, *UrgentBurstFactorCursor);</div><div class='del'>-		dml2_printf("DML::%s: NotEnoughUrgentLatencyHiding = %d\n", __func__, *NotEnoughUrgentLatencyHiding);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: LinesInCursorBuffer = %u\n", __func__, LinesInCursorBuffer);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: CursorBufferSizeInTime = %f\n", __func__, CursorBufferSizeInTime);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: CursorBufferSize = %u (kbytes)\n", __func__, CursorBufferSize);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_chunk = %u\n", __func__, cursor_bytes_per_chunk);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: cursor_lines_per_chunk = %u\n", __func__, cursor_lines_per_chunk);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: UrgentBurstFactorCursor = %f\n", __func__, *UrgentBurstFactorCursor);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: NotEnoughUrgentLatencyHiding = %d\n", __func__, *NotEnoughUrgentLatencyHiding);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='hunk'>@@ -3501,15 +3437,15 @@ static void CalculateUrgentBurstFactor(</div><div class='ctx'> 	*UrgentBurstFactorChroma = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: VRatio = %f\n", __func__, VRatio);</div><div class='del'>-	dml2_printf("DML::%s: VRatioC = %f\n", __func__, VRatioC);</div><div class='del'>-	dml2_printf("DML::%s: DETBufferSizeY = %d\n", __func__, DETBufferSizeY);</div><div class='del'>-	dml2_printf("DML::%s: DETBufferSizeC = %d\n", __func__, DETBufferSizeC);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixelInDETY = %f\n", __func__, BytePerPixelInDETY);</div><div class='del'>-	dml2_printf("DML::%s: swath_width_luma_ub = %d\n", __func__, swath_width_luma_ub);</div><div class='del'>-	dml2_printf("DML::%s: LineTime = %f\n", __func__, LineTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VRatio = %f\n", __func__, VRatio);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VRatioC = %f\n", __func__, VRatioC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DETBufferSizeY = %d\n", __func__, DETBufferSizeY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DETBufferSizeC = %d\n", __func__, DETBufferSizeC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixelInDETY = %f\n", __func__, BytePerPixelInDETY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: swath_width_luma_ub = %d\n", __func__, swath_width_luma_ub);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: LineTime = %f\n", __func__, LineTime);</div><div class='ctx'> #endif</div><div class='del'>-	DML2_ASSERT(VRatio &gt; 0);</div><div class='add'>+	DML_ASSERT(VRatio &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 	LinesInDETLuma = (dml_is_phantom_pipe(plane_cfg) ? 1024 * 1024 : DETBufferSizeY) / BytePerPixelInDETY / swath_width_luma_ub;</div><div class='ctx'> </div><div class='hunk'>@@ -3534,12 +3470,12 @@ static void CalculateUrgentBurstFactor(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: LinesInDETLuma = %f\n", __func__, LinesInDETLuma);</div><div class='del'>-	dml2_printf("DML::%s: UrgentLatency = %f\n", __func__, UrgentLatency);</div><div class='del'>-	dml2_printf("DML::%s: DETBufferSizeInTimeLuma = %f\n", __func__, DETBufferSizeInTimeLuma);</div><div class='del'>-	dml2_printf("DML::%s: UrgentBurstFactorLuma = %f\n", __func__, *UrgentBurstFactorLuma);</div><div class='del'>-	dml2_printf("DML::%s: UrgentBurstFactorChroma = %f\n", __func__, *UrgentBurstFactorChroma);</div><div class='del'>-	dml2_printf("DML::%s: NotEnoughUrgentLatencyHiding = %d\n", __func__, *NotEnoughUrgentLatencyHiding);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: LinesInDETLuma = %f\n", __func__, LinesInDETLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentLatency = %f\n", __func__, UrgentLatency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DETBufferSizeInTimeLuma = %f\n", __func__, DETBufferSizeInTimeLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentBurstFactorLuma = %f\n", __func__, *UrgentBurstFactorLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentBurstFactorChroma = %f\n", __func__, *UrgentBurstFactorChroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NotEnoughUrgentLatencyHiding = %d\n", __func__, *NotEnoughUrgentLatencyHiding);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3600,10 +3536,10 @@ static void CalculateDCFCLKDeepSleepTdlut(</div><div class='ctx'> 		if (display_cfg-&gt;plane_descriptors[k].tdlut.setup_for_tdlut &amp;&amp; tdlut_bytes_to_deliver[k] &gt; 0) {</div><div class='ctx'> 			double tdlut_required_deepsleep_dcfclk = (double) tdlut_bytes_to_deliver[k] / 64.0 / prefetch_swath_time_us[k];</div><div class='ctx'> </div><div class='del'>-			dml2_printf("DML::%s: k=%d, DCFClkDeepSleepPerSurface = %f\n", __func__, k, DCFClkDeepSleepPerSurface[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, tdlut_bytes_to_deliver = %d\n", __func__, k, tdlut_bytes_to_deliver[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, prefetch_swath_time_us = %f\n", __func__, k, prefetch_swath_time_us[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, tdlut_required_deepsleep_dcfclk = %f\n", __func__, k, tdlut_required_deepsleep_dcfclk);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, DCFClkDeepSleepPerSurface = %f\n", __func__, k, DCFClkDeepSleepPerSurface[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, tdlut_bytes_to_deliver = %d\n", __func__, k, tdlut_bytes_to_deliver[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, prefetch_swath_time_us = %f\n", __func__, k, prefetch_swath_time_us[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, tdlut_required_deepsleep_dcfclk = %f\n", __func__, k, tdlut_required_deepsleep_dcfclk);</div><div class='ctx'> </div><div class='ctx'> 			// increase the deepsleep dcfclk to match the original dispclk throughput rate</div><div class='ctx'> 			if (tdlut_required_deepsleep_dcfclk &gt; DCFClkDeepSleepPerSurface[k]) {</div><div class='hunk'>@@ -3613,8 +3549,8 @@ static void CalculateDCFCLKDeepSleepTdlut(</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, PixelClock = %f\n", __func__, k, pixel_rate_mhz);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, DCFClkDeepSleepPerSurface = %f\n", __func__, k, DCFClkDeepSleepPerSurface[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, PixelClock = %f\n", __func__, k, pixel_rate_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, DCFClkDeepSleepPerSurface = %f\n", __func__, k, DCFClkDeepSleepPerSurface[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3625,17 +3561,17 @@ static void CalculateDCFCLKDeepSleepTdlut(</div><div class='ctx'> 	*DCFClkDeepSleep = math_max2(8.0, __DML2_CALCS_DCFCLK_FACTOR__ * ReadBandwidth / (double)ReturnBusWidth);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: __DML2_CALCS_DCFCLK_FACTOR__ = %f\n", __func__, __DML2_CALCS_DCFCLK_FACTOR__);</div><div class='del'>-	dml2_printf("DML::%s: ReadBandwidth = %f\n", __func__, ReadBandwidth);</div><div class='del'>-	dml2_printf("DML::%s: ReturnBusWidth = %u\n", __func__, ReturnBusWidth);</div><div class='del'>-	dml2_printf("DML::%s: DCFClkDeepSleep = %f\n", __func__, *DCFClkDeepSleep);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: __DML2_CALCS_DCFCLK_FACTOR__ = %f\n", __func__, __DML2_CALCS_DCFCLK_FACTOR__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ReadBandwidth = %f\n", __func__, ReadBandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ReturnBusWidth = %u\n", __func__, ReturnBusWidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCFClkDeepSleep = %f\n", __func__, *DCFClkDeepSleep);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int k = 0; k &lt; NumberOfActiveSurfaces; ++k) {</div><div class='ctx'> 		*DCFClkDeepSleep = math_max2(*DCFClkDeepSleep, DCFClkDeepSleepPerSurface[k]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: DCFClkDeepSleep = %f (final)\n", __func__, *DCFClkDeepSleep);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCFClkDeepSleep = %f (final)\n", __func__, *DCFClkDeepSleep);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static noinline_for_stack void CalculateDCFCLKDeepSleep(</div><div class='hunk'>@@ -3731,12 +3667,12 @@ static unsigned int CalculateMaxVStartup(</div><div class='ctx'> 	else</div><div class='ctx'> 		max_vstartup_lines = vblank_size - (unsigned int)math_max2(1.0, math_ceil2(write_back_delay_us / line_time_us, 1.0));</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: VBlankNom = %u\n", __func__, timing-&gt;vblank_nom);</div><div class='del'>-	dml2_printf("DML::%s: vblank_nom_default_us = %u\n", __func__, vblank_nom_default_us);</div><div class='del'>-	dml2_printf("DML::%s: line_time_us = %f\n", __func__, line_time_us);</div><div class='del'>-	dml2_printf("DML::%s: vblank_actual = %u\n", __func__, vblank_actual);</div><div class='del'>-	dml2_printf("DML::%s: vblank_avail = %u\n", __func__, vblank_avail);</div><div class='del'>-	dml2_printf("DML::%s: max_vstartup_lines = %u\n", __func__, max_vstartup_lines);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VBlankNom = %lu\n", __func__, timing-&gt;vblank_nom);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vblank_nom_default_us = %u\n", __func__, vblank_nom_default_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: line_time_us = %f\n", __func__, line_time_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vblank_actual = %u\n", __func__, vblank_actual);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vblank_avail = %u\n", __func__, vblank_avail);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_vstartup_lines = %u\n", __func__, max_vstartup_lines);</div><div class='ctx'> #endif</div><div class='ctx'> 	max_vstartup_lines = (unsigned int)math_min2(max_vstartup_lines, DML_MAX_VSTARTUP_START);</div><div class='ctx'> 	return max_vstartup_lines;</div><div class='hunk'>@@ -3761,9 +3697,9 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> 	const long MAXIMUMCOMPRESSION = 4;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: ForceSingleDPP = %u\n", __func__, p-&gt;ForceSingleDPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ForceSingleDPP = %u\n", __func__, p-&gt;ForceSingleDPP);</div><div class='ctx'> 	for (unsigned int k = 0; k &lt; p-&gt;NumberOfActiveSurfaces; ++k) {</div><div class='del'>-		dml2_printf("DML::%s: DPPPerSurface[%u] = %u\n", __func__, k, p-&gt;DPPPerSurface[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: DPPPerSurface[%u] = %u\n", __func__, k, p-&gt;DPPPerSurface[k]);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	CalculateSwathWidth(</div><div class='hunk'>@@ -3797,15 +3733,15 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> 		p-&gt;full_swath_bytes_l[k] = (unsigned int)(p-&gt;swath_width_luma_ub[k] * p-&gt;BytePerPixDETY[k] * MaximumSwathHeightY[k]);</div><div class='ctx'> 		p-&gt;full_swath_bytes_c[k] = (unsigned int)(p-&gt;swath_width_chroma_ub[k] * p-&gt;BytePerPixDETC[k] * MaximumSwathHeightC[k]);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u DPPPerSurface = %u\n", __func__, k, p-&gt;DPPPerSurface[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u swath_width_luma_ub = %u\n", __func__, k, p-&gt;swath_width_luma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u BytePerPixDETY = %f\n", __func__, k, p-&gt;BytePerPixDETY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathHeightY = %u\n", __func__, k, MaximumSwathHeightY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u full_swath_bytes_l = %u\n", __func__, k, p-&gt;full_swath_bytes_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u swath_width_chroma_ub = %u\n", __func__, k, p-&gt;swath_width_chroma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u BytePerPixDETC = %f\n", __func__, k, p-&gt;BytePerPixDETC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathHeightC = %u\n", __func__, k, MaximumSwathHeightC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u full_swath_bytes_c = %u\n", __func__, k, p-&gt;full_swath_bytes_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DPPPerSurface = %u\n", __func__, k, p-&gt;DPPPerSurface[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u swath_width_luma_ub = %u\n", __func__, k, p-&gt;swath_width_luma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u BytePerPixDETY = %f\n", __func__, k, p-&gt;BytePerPixDETY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathHeightY = %u\n", __func__, k, MaximumSwathHeightY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_l = %u\n", __func__, k, p-&gt;full_swath_bytes_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u swath_width_chroma_ub = %u\n", __func__, k, p-&gt;swath_width_chroma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u BytePerPixDETC = %f\n", __func__, k, p-&gt;BytePerPixDETC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathHeightC = %u\n", __func__, k, MaximumSwathHeightC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_c = %u\n", __func__, k, p-&gt;full_swath_bytes_c[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		if (p-&gt;display_cfg-&gt;plane_descriptors[k].pixel_format == dml2_420_10) {</div><div class='ctx'> 			p-&gt;full_swath_bytes_l[k] = (unsigned int)(math_ceil2((double)p-&gt;full_swath_bytes_l[k], 256));</div><div class='hunk'>@@ -3848,11 +3784,11 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> 		p-&gt;CompressedBufferSizeInkByte);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: TotalActiveDPP = %u\n", __func__, TotalActiveDPP);</div><div class='del'>-	dml2_printf("DML::%s: nomDETInKByte = %u\n", __func__, p-&gt;nomDETInKByte);</div><div class='del'>-	dml2_printf("DML::%s: ConfigReturnBufferSizeInKByte = %u\n", __func__, p-&gt;ConfigReturnBufferSizeInKByte);</div><div class='del'>-	dml2_printf("DML::%s: UnboundedRequestEnabled = %u\n", __func__, *p-&gt;UnboundedRequestEnabled);</div><div class='del'>-	dml2_printf("DML::%s: CompressedBufferSizeInkByte = %u\n", __func__, *p-&gt;CompressedBufferSizeInkByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalActiveDPP = %u\n", __func__, TotalActiveDPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: nomDETInKByte = %u\n", __func__, p-&gt;nomDETInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ConfigReturnBufferSizeInKByte = %u\n", __func__, p-&gt;ConfigReturnBufferSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UnboundedRequestEnabled = %u\n", __func__, *p-&gt;UnboundedRequestEnabled);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: CompressedBufferSizeInkByte = %u\n", __func__, *p-&gt;CompressedBufferSizeInkByte);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	*p-&gt;ViewportSizeSupport = true;</div><div class='hunk'>@@ -3860,7 +3796,7 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> </div><div class='ctx'> 		DETBufferSizeInKByteForSwathCalculation = (dml_is_phantom_pipe(&amp;p-&gt;display_cfg-&gt;plane_descriptors[k]) ? 1024 : p-&gt;DETBufferSizeInKByte[k]);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u DETBufferSizeInKByteForSwathCalculation = %u\n", __func__, k, DETBufferSizeInKByteForSwathCalculation);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeInKByteForSwathCalculation = %u\n", __func__, k, DETBufferSizeInKByteForSwathCalculation);</div><div class='ctx'> #endif</div><div class='ctx'> 		if (p-&gt;display_cfg-&gt;plane_descriptors[k].surface.tiling == dml2_sw_linear) {</div><div class='ctx'> 			p-&gt;SwathHeightY[k] = MaximumSwathHeightY[k];</div><div class='hunk'>@@ -3917,13 +3853,13 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> 		if ((p-&gt;full_swath_bytes_l[k] / 2 + p-&gt;full_swath_bytes_c[k] / 2 &gt; DETBufferSizeInKByteForSwathCalculation * 1024 / 2) ||</div><div class='ctx'> 			p-&gt;SwathWidth[k] &gt; p-&gt;MaximumSwathWidthLuma[k] || (p-&gt;SwathHeightC[k] &gt; 0 &amp;&amp; p-&gt;SwathWidthChroma[k] &gt; p-&gt;MaximumSwathWidthChroma[k])) {</div><div class='ctx'> 			*p-&gt;ViewportSizeSupport = false;</div><div class='del'>-			dml2_printf("DML::%s: k=%u full_swath_bytes_l=%u\n", __func__, k, p-&gt;full_swath_bytes_l[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u full_swath_bytes_c=%u\n", __func__, k, p-&gt;full_swath_bytes_c[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u DETBufferSizeInKByteForSwathCalculation=%u\n", __func__, k, DETBufferSizeInKByteForSwathCalculation);</div><div class='del'>-			dml2_printf("DML::%s: k=%u SwathWidth=%u\n", __func__, k, p-&gt;SwathWidth[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u MaximumSwathWidthLuma=%f\n", __func__, k, p-&gt;MaximumSwathWidthLuma[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u SwathWidthChroma=%d\n", __func__, k, p-&gt;SwathWidthChroma[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u MaximumSwathWidthChroma=%f\n", __func__, k, p-&gt;MaximumSwathWidthChroma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_l=%u\n", __func__, k, p-&gt;full_swath_bytes_l[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_c=%u\n", __func__, k, p-&gt;full_swath_bytes_c[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeInKByteForSwathCalculation=%u\n", __func__, k, DETBufferSizeInKByteForSwathCalculation);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u SwathWidth=%u\n", __func__, k, p-&gt;SwathWidth[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthLuma=%f\n", __func__, k, p-&gt;MaximumSwathWidthLuma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u SwathWidthChroma=%d\n", __func__, k, p-&gt;SwathWidthChroma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthChroma=%f\n", __func__, k, p-&gt;MaximumSwathWidthChroma[k]);</div><div class='ctx'> 			p-&gt;ViewportSizeSupportPerSurface[k] = false;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			p-&gt;ViewportSizeSupportPerSurface[k] = true;</div><div class='hunk'>@@ -3931,35 +3867,35 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> </div><div class='ctx'> 		if (p-&gt;SwathHeightC[k] == 0) {</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, All DET will be used for plane0\n", __func__, k);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, All DET will be used for plane0\n", __func__, k);</div><div class='ctx'> #endif</div><div class='ctx'> 			p-&gt;DETBufferSizeY[k] = p-&gt;DETBufferSizeInKByte[k] * 1024;</div><div class='ctx'> 			p-&gt;DETBufferSizeC[k] = 0;</div><div class='ctx'> 		} else if (RoundedUpSwathSizeBytesY[k] &lt;= 1.5 * RoundedUpSwathSizeBytesC[k]) {</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, Half DET will be used for plane0, and half for plane1\n", __func__, k);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, Half DET will be used for plane0, and half for plane1\n", __func__, k);</div><div class='ctx'> #endif</div><div class='ctx'> 			p-&gt;DETBufferSizeY[k] = p-&gt;DETBufferSizeInKByte[k] * 1024 / 2;</div><div class='ctx'> 			p-&gt;DETBufferSizeC[k] = p-&gt;DETBufferSizeInKByte[k] * 1024 / 2;</div><div class='ctx'> 		} else {</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, 2/3 DET will be used for plane0, and 1/3 for plane1\n", __func__, k);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, 2/3 DET will be used for plane0, and 1/3 for plane1\n", __func__, k);</div><div class='ctx'> #endif</div><div class='ctx'> 			p-&gt;DETBufferSizeY[k] = (unsigned int)(math_floor2(p-&gt;DETBufferSizeInKByte[k] * 1024 * 2 / 3, 1024));</div><div class='ctx'> 			p-&gt;DETBufferSizeC[k] = p-&gt;DETBufferSizeInKByte[k] * 1024 - p-&gt;DETBufferSizeY[k];</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u SwathHeightY = %u\n", __func__, k, p-&gt;SwathHeightY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u SwathHeightC = %u\n", __func__, k, p-&gt;SwathHeightC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u full_swath_bytes_l = %u\n", __func__, k, p-&gt;full_swath_bytes_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u full_swath_bytes_c = %u\n", __func__, k, p-&gt;full_swath_bytes_c[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u RoundedUpSwathSizeBytesY = %u\n", __func__, k, RoundedUpSwathSizeBytesY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u RoundedUpSwathSizeBytesC = %u\n", __func__, k, RoundedUpSwathSizeBytesC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u DETBufferSizeInKByte = %u\n", __func__, k, p-&gt;DETBufferSizeInKByte[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u DETBufferSizeY = %u\n", __func__, k, p-&gt;DETBufferSizeY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u DETBufferSizeC = %u\n", __func__, k, p-&gt;DETBufferSizeC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u ViewportSizeSupportPerSurface = %u\n", __func__, k, p-&gt;ViewportSizeSupportPerSurface[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u SwathHeightY = %u\n", __func__, k, p-&gt;SwathHeightY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u SwathHeightC = %u\n", __func__, k, p-&gt;SwathHeightC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_l = %u\n", __func__, k, p-&gt;full_swath_bytes_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u full_swath_bytes_c = %u\n", __func__, k, p-&gt;full_swath_bytes_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u RoundedUpSwathSizeBytesY = %u\n", __func__, k, RoundedUpSwathSizeBytesY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u RoundedUpSwathSizeBytesC = %u\n", __func__, k, RoundedUpSwathSizeBytesC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeInKByte = %u\n", __func__, k, p-&gt;DETBufferSizeInKByte[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeY = %u\n", __func__, k, p-&gt;DETBufferSizeY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u DETBufferSizeC = %u\n", __func__, k, p-&gt;DETBufferSizeC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u ViewportSizeSupportPerSurface = %u\n", __func__, k, p-&gt;ViewportSizeSupportPerSurface[k]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='hunk'>@@ -3969,12 +3905,12 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> 		*p-&gt;compbuf_reserved_space_64b = (unsigned int)math_ceil2(math_max2(*p-&gt;compbuf_reserved_space_64b,</div><div class='ctx'> 			(double)(p-&gt;rob_buffer_size_kbytes * 1024 / 64) - (double)(RoundedUpSwathSizeBytesY[SurfaceDoingUnboundedRequest] * TTUFIFODEPTH / (p-&gt;mrq_present ? MAXIMUMCOMPRESSION : 1) / 64)), 1.0);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: RoundedUpSwathSizeBytesY[%d] = %u\n", __func__, SurfaceDoingUnboundedRequest, RoundedUpSwathSizeBytesY[SurfaceDoingUnboundedRequest]);</div><div class='del'>-		dml2_printf("DML::%s: rob_buffer_size_kbytes = %u\n", __func__, p-&gt;rob_buffer_size_kbytes);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: RoundedUpSwathSizeBytesY[%d] = %u\n", __func__, SurfaceDoingUnboundedRequest, RoundedUpSwathSizeBytesY[SurfaceDoingUnboundedRequest]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: rob_buffer_size_kbytes = %u\n", __func__, p-&gt;rob_buffer_size_kbytes);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: compbuf_reserved_space_64b = %u\n", __func__, *p-&gt;compbuf_reserved_space_64b);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: compbuf_reserved_space_64b = %u\n", __func__, *p-&gt;compbuf_reserved_space_64b);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	*p-&gt;hw_debug5 = false;</div><div class='hunk'>@@ -3989,12 +3925,12 @@ static void CalculateSwathAndDETConfiguration(struct dml2_core_internal_scratch</div><div class='ctx'> 				+ *p-&gt;CompressedBufferSizeInkByte * MAXIMUMCOMPRESSION * 1024) &gt; TTUFIFODEPTH * (RoundedUpSwathSizeBytesY[k] + RoundedUpSwathSizeBytesC[k])))</div><div class='ctx'> 			*p-&gt;hw_debug5 = true;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u UnboundedRequestEnabled = %u\n", __func__, k, *p-&gt;UnboundedRequestEnabled);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MAXIMUMCOMPRESSION = %lu\n", __func__, k, MAXIMUMCOMPRESSION);</div><div class='del'>-		dml2_printf("DML::%s: k=%u TTUFIFODEPTH = %lu\n", __func__, k, TTUFIFODEPTH);</div><div class='del'>-		dml2_printf("DML::%s: k=%u CompressedBufferSizeInkByte = %u\n", __func__, k, *p-&gt;CompressedBufferSizeInkByte);</div><div class='del'>-		dml2_printf("DML::%s: k=%u RoundedUpSwathSizeBytesC = %u\n", __func__, k, RoundedUpSwathSizeBytesC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u hw_debug5 = %u\n", __func__, k, *p-&gt;hw_debug5);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u UnboundedRequestEnabled = %u\n", __func__, k, *p-&gt;UnboundedRequestEnabled);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MAXIMUMCOMPRESSION = %lu\n", __func__, k, MAXIMUMCOMPRESSION);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u TTUFIFODEPTH = %lu\n", __func__, k, TTUFIFODEPTH);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u CompressedBufferSizeInkByte = %u\n", __func__, k, *p-&gt;CompressedBufferSizeInkByte);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u RoundedUpSwathSizeBytesC = %u\n", __func__, k, RoundedUpSwathSizeBytesC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u hw_debug5 = %u\n", __func__, k, *p-&gt;hw_debug5);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -4192,15 +4128,15 @@ static noinline_for_stack void CalculateODMMode(</div><div class='ctx'> 	SurfaceRequiredDISPCLKWithODMCombineThreeToOne = CalculateRequiredDispclk(dml2_odm_mode_combine_3to1, PixelClock);</div><div class='ctx'> 	SurfaceRequiredDISPCLKWithODMCombineFourToOne = CalculateRequiredDispclk(dml2_odm_mode_combine_4to1, PixelClock);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: ODMUse = %d\n", __func__, ODMUse);</div><div class='del'>-	dml2_printf("DML::%s: Output = %d\n", __func__, Output);</div><div class='del'>-	dml2_printf("DML::%s: DSCEnable = %d\n", __func__, DSCEnable);</div><div class='del'>-	dml2_printf("DML::%s: MaxDispclk = %f\n", __func__, MaxDispclk);</div><div class='del'>-	dml2_printf("DML::%s: MaximumPixelsPerLinePerDSCUnit = %d\n", __func__, MaximumPixelsPerLinePerDSCUnit);</div><div class='del'>-	dml2_printf("DML::%s: SurfaceRequiredDISPCLKWithoutODMCombine = %f\n", __func__, SurfaceRequiredDISPCLKWithoutODMCombine);</div><div class='del'>-	dml2_printf("DML::%s: SurfaceRequiredDISPCLKWithODMCombineTwoToOne = %f\n", __func__, SurfaceRequiredDISPCLKWithODMCombineTwoToOne);</div><div class='del'>-	dml2_printf("DML::%s: SurfaceRequiredDISPCLKWithODMCombineThreeToOne = %f\n", __func__, SurfaceRequiredDISPCLKWithODMCombineThreeToOne);</div><div class='del'>-	dml2_printf("DML::%s: SurfaceRequiredDISPCLKWithODMCombineFourToOne = %f\n", __func__, SurfaceRequiredDISPCLKWithODMCombineFourToOne);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ODMUse = %d\n", __func__, ODMUse);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Output = %d\n", __func__, Output);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSCEnable = %d\n", __func__, DSCEnable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxDispclk = %f\n", __func__, MaxDispclk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaximumPixelsPerLinePerDSCUnit = %d\n", __func__, MaximumPixelsPerLinePerDSCUnit);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SurfaceRequiredDISPCLKWithoutODMCombine = %f\n", __func__, SurfaceRequiredDISPCLKWithoutODMCombine);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SurfaceRequiredDISPCLKWithODMCombineTwoToOne = %f\n", __func__, SurfaceRequiredDISPCLKWithODMCombineTwoToOne);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SurfaceRequiredDISPCLKWithODMCombineThreeToOne = %f\n", __func__, SurfaceRequiredDISPCLKWithODMCombineThreeToOne);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SurfaceRequiredDISPCLKWithODMCombineFourToOne = %f\n", __func__, SurfaceRequiredDISPCLKWithODMCombineFourToOne);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (ODMUse == dml2_odm_mode_auto)</div><div class='ctx'> 		DecidedODMMode = DecideODMMode(HActive,</div><div class='hunk'>@@ -4245,10 +4181,10 @@ static noinline_for_stack void CalculateODMMode(</div><div class='ctx'> 	*NumberOfDPP = NumberOfDPPRequired;</div><div class='ctx'> 	*RequiredDISPCLKPerSurface = success ? DISPCLKRequired : 0;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: ODMMode = %d\n", __func__, *ODMMode);</div><div class='del'>-	dml2_printf("DML::%s: NumberOfDPP = %d\n", __func__, *NumberOfDPP);</div><div class='del'>-	dml2_printf("DML::%s: TotalAvailablePipesSupport = %d\n", __func__, *TotalAvailablePipesSupport);</div><div class='del'>-	dml2_printf("DML::%s: RequiredDISPCLKPerSurface = %f\n", __func__, *RequiredDISPCLKPerSurface);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ODMMode = %d\n", __func__, *ODMMode);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NumberOfDPP = %d\n", __func__, *NumberOfDPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalAvailablePipesSupport = %d\n", __func__, *TotalAvailablePipesSupport);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: RequiredDISPCLKPerSurface = %f\n", __func__, *RequiredDISPCLKPerSurface);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4292,17 +4228,17 @@ static noinline_for_stack void CalculateOutputLink(</div><div class='ctx'> 	*OutputRate = dml2_core_internal_output_rate_unknown;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DSCEnable = %u (dis, en, en_if_necessary)\n", __func__, DSCEnable);</div><div class='del'>-	dml2_printf("DML::%s: PHYCLK = %f\n", __func__, PHYCLK);</div><div class='del'>-	dml2_printf("DML::%s: PixelClockBackEnd = %f\n", __func__, PixelClockBackEnd);</div><div class='del'>-	dml2_printf("DML::%s: AudioSampleRate = %f\n", __func__, AudioSampleRate);</div><div class='del'>-	dml2_printf("DML::%s: HActive = %u\n", __func__, HActive);</div><div class='del'>-	dml2_printf("DML::%s: HTotal = %u\n", __func__, HTotal);</div><div class='del'>-	dml2_printf("DML::%s: ODMModeNoDSC = %u\n", __func__, ODMModeNoDSC);</div><div class='del'>-	dml2_printf("DML::%s: ODMModeDSC = %u\n", __func__, ODMModeDSC);</div><div class='del'>-	dml2_printf("DML::%s: ForcedOutputLinkBPP = %f\n", __func__, ForcedOutputLinkBPP);</div><div class='del'>-	dml2_printf("DML::%s: Output (encoder) = %u\n", __func__, Output);</div><div class='del'>-	dml2_printf("DML::%s: OutputLinkDPRate = %u\n", __func__, OutputLinkDPRate);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSCEnable = %u (dis, en, en_if_necessary)\n", __func__, DSCEnable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PHYCLK = %f\n", __func__, PHYCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelClockBackEnd = %f\n", __func__, PixelClockBackEnd);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: AudioSampleRate = %f\n", __func__, AudioSampleRate);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HActive = %u\n", __func__, HActive);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HTotal = %u\n", __func__, HTotal);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ODMModeNoDSC = %u\n", __func__, ODMModeNoDSC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ODMModeDSC = %u\n", __func__, ODMModeDSC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ForcedOutputLinkBPP = %f\n", __func__, ForcedOutputLinkBPP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Output (encoder) = %u\n", __func__, Output);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: OutputLinkDPRate = %u\n", __func__, OutputLinkDPRate);</div><div class='ctx'> #endif</div><div class='ctx'> 	{</div><div class='ctx'> 		if (Output == dml2_hdmi) {</div><div class='hunk'>@@ -4487,9 +4423,9 @@ static noinline_for_stack void CalculateOutputLink(</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: RequiresDSC = %u\n", __func__, *RequiresDSC);</div><div class='del'>-	dml2_printf("DML::%s: RequiresFEC = %u\n", __func__, *RequiresFEC);</div><div class='del'>-	dml2_printf("DML::%s: OutBpp = %f\n", __func__, *OutBpp);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: RequiresDSC = %u\n", __func__, *RequiresDSC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: RequiresFEC = %u\n", __func__, *RequiresFEC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: OutBpp = %f\n", __func__, *OutBpp);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4571,17 +4507,17 @@ static unsigned int DSCDelayRequirement(</div><div class='ctx'> 		DSCDelayRequirement_val = 0;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DSCEnabled= %u\n", __func__, DSCEnabled);</div><div class='del'>-	dml2_printf("DML::%s: ODMMode = %u\n", __func__, ODMMode);</div><div class='del'>-	dml2_printf("DML::%s: OutputBpp = %f\n", __func__, OutputBpp);</div><div class='del'>-	dml2_printf("DML::%s: HActive = %u\n", __func__, HActive);</div><div class='del'>-	dml2_printf("DML::%s: HTotal = %u\n", __func__, HTotal);</div><div class='del'>-	dml2_printf("DML::%s: PixelClock = %f\n", __func__, PixelClock);</div><div class='del'>-	dml2_printf("DML::%s: PixelClockBackEnd = %f\n", __func__, PixelClockBackEnd);</div><div class='del'>-	dml2_printf("DML::%s: OutputFormat = %u\n", __func__, OutputFormat);</div><div class='del'>-	dml2_printf("DML::%s: DSCInputBitPerComponent = %u\n", __func__, DSCInputBitPerComponent);</div><div class='del'>-	dml2_printf("DML::%s: NumberOfDSCSlices = %u\n", __func__, NumberOfDSCSlices);</div><div class='del'>-	dml2_printf("DML::%s: DSCDelayRequirement_val = %u\n", __func__, DSCDelayRequirement_val);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSCEnabled= %u\n", __func__, DSCEnabled);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ODMMode = %u\n", __func__, ODMMode);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: OutputBpp = %f\n", __func__, OutputBpp);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HActive = %u\n", __func__, HActive);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HTotal = %u\n", __func__, HTotal);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelClock = %f\n", __func__, PixelClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelClockBackEnd = %f\n", __func__, PixelClockBackEnd);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: OutputFormat = %u\n", __func__, OutputFormat);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSCInputBitPerComponent = %u\n", __func__, DSCInputBitPerComponent);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NumberOfDSCSlices = %u\n", __func__, NumberOfDSCSlices);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSCDelayRequirement_val = %u\n", __func__, DSCDelayRequirement_val);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return DSCDelayRequirement_val;</div><div class='hunk'>@@ -4654,10 +4590,10 @@ static void CalculateSurfaceSizeInMall(</div><div class='ctx'> 		(TotalSurfaceSizeInMALLForSubVP &gt; MALLAllocatedForDCNInBytes);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: MALLAllocatedForDCN = %u\n", __func__, MALLAllocatedForDCN * 1024 * 1024);</div><div class='del'>-	dml2_printf("DML::%s: TotalSurfaceSizeInMALLForSubVP = %u\n", __func__, TotalSurfaceSizeInMALLForSubVP);</div><div class='del'>-	dml2_printf("DML::%s: TotalSurfaceSizeInMALLForSS = %u\n", __func__, TotalSurfaceSizeInMALLForSS);</div><div class='del'>-	dml2_printf("DML::%s: ExceededMALLSize = %u\n", __func__, *ExceededMALLSize);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MALLAllocatedForDCN = %u\n", __func__, MALLAllocatedForDCN * 1024 * 1024);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalSurfaceSizeInMALLForSubVP = %u\n", __func__, TotalSurfaceSizeInMALLForSubVP);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalSurfaceSizeInMALLForSS = %u\n", __func__, TotalSurfaceSizeInMALLForSS);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ExceededMALLSize = %u\n", __func__, *ExceededMALLSize);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4674,7 +4610,6 @@ static void calculate_tdlut_setting(</div><div class='ctx'> 	unsigned int tdlut_vmpg_per_frame;</div><div class='ctx'> 	unsigned int tdlut_pte_req_per_frame;</div><div class='ctx'> 	unsigned int tdlut_bytes_per_line;</div><div class='del'>-	unsigned int tdlut_delivery_cycles;</div><div class='ctx'> 	double tdlut_drain_rate;</div><div class='ctx'> 	unsigned int tdlut_mpc_width;</div><div class='ctx'> 	unsigned int tdlut_bytes_per_group_simple;</div><div class='hunk'>@@ -4737,13 +4672,13 @@ static void calculate_tdlut_setting(</div><div class='ctx'> 		*p-&gt;tdlut_bytes_per_frame = tdlut_bytes_per_line * tdlut_mpc_width * tdlut_mpc_width;</div><div class='ctx'> 		*p-&gt;tdlut_bytes_per_group = tdlut_bytes_per_line * tdlut_mpc_width;</div><div class='ctx'> 		//the delivery cycles is DispClk cycles per line * number of lines * number of slices</div><div class='del'>-		tdlut_delivery_cycles = (unsigned int)math_ceil2(tdlut_mpc_width/2.0, 1) * tdlut_mpc_width * tdlut_mpc_width;</div><div class='add'>+		//tdlut_delivery_cycles = (unsigned int)math_ceil2(tdlut_mpc_width/2.0, 1) * tdlut_mpc_width * tdlut_mpc_width;</div><div class='ctx'> 		tdlut_drain_rate = tdlut_bytes_per_line * p-&gt;dispclk_mhz / math_ceil2(tdlut_mpc_width/2.0, 1);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		//tdlut_addressing_mode = tdlut_simple_linear, 3dlut width should be 4*1229=4916 elements</div><div class='ctx'> 		*p-&gt;tdlut_bytes_per_frame = (unsigned int)math_ceil2(tdlut_width * tdlut_bpe, 256);</div><div class='ctx'> 		*p-&gt;tdlut_bytes_per_group = tdlut_bytes_per_group_simple;</div><div class='del'>-		tdlut_delivery_cycles = (unsigned int)math_ceil2(tdlut_width/2.0, 1);</div><div class='add'>+		//tdlut_delivery_cycles = (unsigned int)math_ceil2(tdlut_width/2.0, 1);</div><div class='ctx'> 		tdlut_drain_rate = 2 * tdlut_bpe * p-&gt;dispclk_mhz;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4756,25 +4691,25 @@ static void calculate_tdlut_setting(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: gpuvm_enable = %d\n", __func__, p-&gt;gpuvm_enable);</div><div class='del'>-	dml2_printf("DML::%s: vmpg_bytes = %d\n", __func__, vmpg_bytes);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_vmpg_per_frame = %d\n", __func__, tdlut_vmpg_per_frame);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_pte_req_per_frame = %d\n", __func__, tdlut_pte_req_per_frame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: gpuvm_enable = %d\n", __func__, p-&gt;gpuvm_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vmpg_bytes = %d\n", __func__, vmpg_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_vmpg_per_frame = %d\n", __func__, tdlut_vmpg_per_frame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_pte_req_per_frame = %d\n", __func__, tdlut_pte_req_per_frame);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: dispclk_mhz = %f\n", __func__, p-&gt;dispclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_width = %u\n", __func__, tdlut_width);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_addressing_mode = %s\n", __func__, (p-&gt;tdlut_addressing_mode == dml2_tdlut_sw_linear) ? "sw_linear" : "simple_linear");</div><div class='del'>-	dml2_printf("DML::%s: tdlut_pitch_bytes = %u\n", __func__, tdlut_pitch_bytes);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_footprint_bytes = %u\n", __func__, tdlut_footprint_bytes);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_bytes_per_frame = %u\n", __func__, *p-&gt;tdlut_bytes_per_frame);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_bytes_per_line = %u\n", __func__, tdlut_bytes_per_line);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_bytes_per_group = %u\n", __func__, *p-&gt;tdlut_bytes_per_group);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_drain_rate = %f\n", __func__, tdlut_drain_rate);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_delivery_cycles = %u\n", __func__, tdlut_delivery_cycles);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_opt_time = %f\n", __func__, *p-&gt;tdlut_opt_time);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_drain_time = %f\n", __func__, *p-&gt;tdlut_drain_time);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_bytes_to_deliver = %d\n", __func__, *p-&gt;tdlut_bytes_to_deliver);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_groups_per_2row_ub = %d\n", __func__, *p-&gt;tdlut_groups_per_2row_ub);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dispclk_mhz = %f\n", __func__, p-&gt;dispclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_width = %u\n", __func__, tdlut_width);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_addressing_mode = %s\n", __func__, (p-&gt;tdlut_addressing_mode == dml2_tdlut_sw_linear) ? "sw_linear" : "simple_linear");</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_pitch_bytes = %u\n", __func__, tdlut_pitch_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_footprint_bytes = %u\n", __func__, tdlut_footprint_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_bytes_per_frame = %u\n", __func__, *p-&gt;tdlut_bytes_per_frame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_bytes_per_line = %u\n", __func__, tdlut_bytes_per_line);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_bytes_per_group = %u\n", __func__, *p-&gt;tdlut_bytes_per_group);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_drain_rate = %f\n", __func__, tdlut_drain_rate);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_delivery_cycles = %u\n", __func__, p-&gt;tdlut_addressing_mode == dml2_tdlut_sw_linear ? (unsigned int)math_ceil2(tdlut_mpc_width/2.0, 1) * tdlut_mpc_width * tdlut_mpc_width : (unsigned int)math_ceil2(tdlut_width/2.0, 1));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_opt_time = %f\n", __func__, *p-&gt;tdlut_opt_time);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_drain_time = %f\n", __func__, *p-&gt;tdlut_drain_time);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_bytes_to_deliver = %d\n", __func__, *p-&gt;tdlut_bytes_to_deliver);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_groups_per_2row_ub = %d\n", __func__, *p-&gt;tdlut_groups_per_2row_ub);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4820,10 +4755,10 @@ static void CalculateTarb(</div><div class='ctx'> 	*Tarb = extra_bytes / ReturnBW;</div><div class='ctx'> 	*Tarb_prefetch = extra_bytes_prefetch / ReturnBW;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: PixelChunkSizeInKByte = %d\n", __func__, PixelChunkSizeInKByte);</div><div class='del'>-	dml2_printf("DML::%s: MetaChunkSize = %d\n", __func__, MetaChunkSize);</div><div class='del'>-	dml2_printf("DML::%s: extra_bytes = %f\n", __func__, extra_bytes);</div><div class='del'>-	dml2_printf("DML::%s: extra_bytes_prefetch = %f\n", __func__, extra_bytes_prefetch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelChunkSizeInKByte = %d\n", __func__, PixelChunkSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MetaChunkSize = %d\n", __func__, MetaChunkSize);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: extra_bytes = %f\n", __func__, extra_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: extra_bytes_prefetch = %f\n", __func__, extra_bytes_prefetch);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4838,10 +4773,10 @@ static double CalculateTWait(</div><div class='ctx'> 	TWait = math_max2(reserved_vblank_time_ns/1000.0, g6_temp_read_blackout_us) + t_urg_trip;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: reserved_vblank_time_ns = %d\n", __func__, reserved_vblank_time_ns);</div><div class='del'>-	dml2_printf("DML::%s: UrgentLatency = %f\n", __func__, UrgentLatency);</div><div class='del'>-	dml2_printf("DML::%s: Ttrip = %f\n", __func__, Ttrip);</div><div class='del'>-	dml2_printf("DML::%s: TWait = %f\n", __func__, TWait);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: reserved_vblank_time_ns = %ld\n", __func__, reserved_vblank_time_ns);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentLatency = %f\n", __func__, UrgentLatency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Ttrip = %f\n", __func__, Ttrip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TWait = %f\n", __func__, TWait);</div><div class='ctx'> #endif</div><div class='ctx'> 	return TWait;</div><div class='ctx'> }</div><div class='hunk'>@@ -4887,20 +4822,20 @@ static void CalculateVUpdateAndDynamicMetadataParameters(</div><div class='ctx'> 		*Tdmsks = *Tdmsks / 2;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DynamicMetadataLinesBeforeActiveRequired = %u\n", __func__, DynamicMetadataLinesBeforeActiveRequired);</div><div class='del'>-	dml2_printf("DML::%s: VBlank = %u\n", __func__, VBlank);</div><div class='del'>-	dml2_printf("DML::%s: HTotal = %u\n", __func__, HTotal);</div><div class='del'>-	dml2_printf("DML::%s: PixelClock = %f\n", __func__, PixelClock);</div><div class='del'>-	dml2_printf("DML::%s: Dppclk = %f\n", __func__, Dppclk);</div><div class='del'>-	dml2_printf("DML::%s: DCFClkDeepSleep = %f\n", __func__, DCFClkDeepSleep);</div><div class='del'>-	dml2_printf("DML::%s: MaxInterDCNTileRepeaters = %u\n", __func__, MaxInterDCNTileRepeaters);</div><div class='del'>-	dml2_printf("DML::%s: TotalRepeaterDelayTime = %f\n", __func__, TotalRepeaterDelayTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DynamicMetadataLinesBeforeActiveRequired = %u\n", __func__, DynamicMetadataLinesBeforeActiveRequired);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VBlank = %u\n", __func__, VBlank);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HTotal = %u\n", __func__, HTotal);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelClock = %f\n", __func__, PixelClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Dppclk = %f\n", __func__, Dppclk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCFClkDeepSleep = %f\n", __func__, DCFClkDeepSleep);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxInterDCNTileRepeaters = %u\n", __func__, MaxInterDCNTileRepeaters);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalRepeaterDelayTime = %f\n", __func__, TotalRepeaterDelayTime);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: VUpdateWidthPix = %u\n", __func__, *VUpdateWidthPix);</div><div class='del'>-	dml2_printf("DML::%s: VReadyOffsetPix = %u\n", __func__, *VReadyOffsetPix);</div><div class='del'>-	dml2_printf("DML::%s: VUpdateOffsetPix = %u\n", __func__, *VUpdateOffsetPix);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VUpdateWidthPix = %u\n", __func__, *VUpdateWidthPix);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VReadyOffsetPix = %u\n", __func__, *VReadyOffsetPix);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VUpdateOffsetPix = %u\n", __func__, *VUpdateOffsetPix);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: Tdmsks = %f\n", __func__, *Tdmsks);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tdmsks = %f\n", __func__, *Tdmsks);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4962,11 +4897,11 @@ static double get_urgent_bandwidth_required(</div><div class='ctx'> 		l-&gt;adj_factor_cur_pre = UrgentBurstFactorCursorPre[k];</div><div class='ctx'> </div><div class='ctx'> 		bool is_phantom = dml_is_phantom_pipe(&amp;display_cfg-&gt;plane_descriptors[k]);</div><div class='del'>-		bool exclude_this_plane = 0;</div><div class='add'>+		bool exclude_this_plane = false;</div><div class='ctx'> </div><div class='ctx'> 		// Exclude phantom pipe in bw calculation for non svp prefetch state</div><div class='ctx'> 		if (state_type != dml2_core_internal_soc_state_svp_prefetch &amp;&amp; is_phantom)</div><div class='del'>-			exclude_this_plane = 1;</div><div class='add'>+			exclude_this_plane = true;</div><div class='ctx'> </div><div class='ctx'> 		// The qualified row bandwidth, qual_row_bw, accounts for the regular non-flip row bandwidth when there is no possible immediate flip or HostVM invalidation flip.</div><div class='ctx'> 		// The qual_row_bw is zero if HostVM is possible and only non-zero and equal to row_bw(i) if immediate flip is not allowed for that pipe.</div><div class='hunk'>@@ -4995,12 +4930,12 @@ static double get_urgent_bandwidth_required(</div><div class='ctx'> 			surface_peak_required_bw[k] = math_max2(surface_required_bw[k], surface_peak_required_bw[k]);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%d, max1: vm_row_bw=%f\n", __func__, k, l-&gt;vm_row_bw);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, max2: flip_and_active_bw=%f\n", __func__, k, l-&gt;flip_and_active_bw);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, max3: flip_and_prefetch_bw=%f\n", __func__, k, l-&gt;flip_and_prefetch_bw);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, max4: active_and_excess_bw=%f\n", __func__, k, l-&gt;active_and_excess_bw);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, surface_required_bw=%f\n", __func__, k, surface_required_bw[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, surface_peak_required_bw=%f\n", __func__, k, surface_peak_required_bw[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, max1: vm_row_bw=%f\n", __func__, k, l-&gt;vm_row_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, max2: flip_and_active_bw=%f\n", __func__, k, l-&gt;flip_and_active_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, max3: flip_and_prefetch_bw=%f\n", __func__, k, l-&gt;flip_and_prefetch_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, max4: active_and_excess_bw=%f\n", __func__, k, l-&gt;active_and_excess_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, surface_required_bw=%f\n", __func__, k, surface_required_bw[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, surface_peak_required_bw=%f\n", __func__, k, surface_peak_required_bw[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		} else {</div><div class='ctx'> 			surface_required_bw[k] = 0.0;</div><div class='hunk'>@@ -5009,34 +4944,34 @@ static double get_urgent_bandwidth_required(</div><div class='ctx'> 		l-&gt;required_bandwidth_mbps += surface_required_bw[k];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%d, NumberOfDPP=%d\n", __func__, k, NumberOfDPP[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, use_qual_row_bw=%d\n", __func__, k, use_qual_row_bw);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, immediate_flip=%d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].immediate_flip);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, mall_svp_prefetch_factor=%f\n", __func__, k, l-&gt;mall_svp_prefetch_factor);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, adj_factor_p0=%f\n", __func__, k, l-&gt;adj_factor_p0);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, adj_factor_p1=%f\n", __func__, k, l-&gt;adj_factor_p1);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, adj_factor_cur=%f\n", __func__, k, l-&gt;adj_factor_cur);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, NumberOfDPP=%d\n", __func__, k, NumberOfDPP[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, use_qual_row_bw=%d\n", __func__, k, use_qual_row_bw);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, immediate_flip=%d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].immediate_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, mall_svp_prefetch_factor=%f\n", __func__, k, l-&gt;mall_svp_prefetch_factor);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, adj_factor_p0=%f\n", __func__, k, l-&gt;adj_factor_p0);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, adj_factor_p1=%f\n", __func__, k, l-&gt;adj_factor_p1);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, adj_factor_cur=%f\n", __func__, k, l-&gt;adj_factor_cur);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: k=%d, adj_factor_p0_pre=%f\n", __func__, k, l-&gt;adj_factor_p0_pre);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, adj_factor_p1_pre=%f\n", __func__, k, l-&gt;adj_factor_p1_pre);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, adj_factor_cur_pre=%f\n", __func__, k, l-&gt;adj_factor_cur_pre);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, adj_factor_p0_pre=%f\n", __func__, k, l-&gt;adj_factor_p0_pre);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, adj_factor_p1_pre=%f\n", __func__, k, l-&gt;adj_factor_p1_pre);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, adj_factor_cur_pre=%f\n", __func__, k, l-&gt;adj_factor_cur_pre);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: k=%d, per_plane_flip_bw=%f\n", __func__, k, l-&gt;per_plane_flip_bw[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, prefetch_vmrow_bw=%f\n", __func__, k, prefetch_vmrow_bw[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, ReadBandwidthLuma=%f\n", __func__, k, ReadBandwidthLuma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, ReadBandwidthChroma=%f\n", __func__, k, ReadBandwidthChroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, excess_vactive_fill_bw_l=%f\n", __func__, k, excess_vactive_fill_bw_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, excess_vactive_fill_bw_c=%f\n", __func__, k, excess_vactive_fill_bw_c[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, cursor_bw=%f\n", __func__, k, cursor_bw[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, per_plane_flip_bw=%f\n", __func__, k, l-&gt;per_plane_flip_bw[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, prefetch_vmrow_bw=%f\n", __func__, k, prefetch_vmrow_bw[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, ReadBandwidthLuma=%f\n", __func__, k, ReadBandwidthLuma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, ReadBandwidthChroma=%f\n", __func__, k, ReadBandwidthChroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, excess_vactive_fill_bw_l=%f\n", __func__, k, excess_vactive_fill_bw_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, excess_vactive_fill_bw_c=%f\n", __func__, k, excess_vactive_fill_bw_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, cursor_bw=%f\n", __func__, k, cursor_bw[k]);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: k=%d, meta_row_bw=%f\n", __func__, k, meta_row_bw[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, dpte_row_bw=%f\n", __func__, k, dpte_row_bw[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, PrefetchBandwidthLuma=%f\n", __func__, k, PrefetchBandwidthLuma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, PrefetchBandwidthChroma=%f\n", __func__, k, PrefetchBandwidthChroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, prefetch_cursor_bw=%f\n", __func__, k, prefetch_cursor_bw[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, required_bandwidth_mbps=%f (total), inc_flip_bw=%d, is_phantom=%d exclude_this_plane=%d\n", __func__, k, l-&gt;required_bandwidth_mbps, inc_flip_bw, is_phantom, exclude_this_plane);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, required_bandwidth_mbps=%f (total), soc_state=%s, inc_flip_bw=%d, is_phantom=%d exclude_this_plane=%d\n", __func__, k, l-&gt;required_bandwidth_mbps, dml2_core_internal_soc_state_type_str(state_type), inc_flip_bw, is_phantom, exclude_this_plane);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, required_bandwidth_mbps=%f (total), inc_flip_bw=%d, is_phantom=%d exclude_this_plane=%d\n", __func__, k, l-&gt;required_bandwidth_mbps, inc_flip_bw, is_phantom, exclude_this_plane);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, meta_row_bw=%f\n", __func__, k, meta_row_bw[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, dpte_row_bw=%f\n", __func__, k, dpte_row_bw[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, PrefetchBandwidthLuma=%f\n", __func__, k, PrefetchBandwidthLuma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, PrefetchBandwidthChroma=%f\n", __func__, k, PrefetchBandwidthChroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, prefetch_cursor_bw=%f\n", __func__, k, prefetch_cursor_bw[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, required_bandwidth_mbps=%f (total), inc_flip_bw=%d, is_phantom=%d exclude_this_plane=%d\n", __func__, k, l-&gt;required_bandwidth_mbps, inc_flip_bw, is_phantom, exclude_this_plane);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, required_bandwidth_mbps=%f (total), soc_state=%s, inc_flip_bw=%d, is_phantom=%d exclude_this_plane=%d\n", __func__, k, l-&gt;required_bandwidth_mbps, dml2_core_internal_soc_state_type_str(state_type), inc_flip_bw, is_phantom, exclude_this_plane);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, required_bandwidth_mbps=%f (total), inc_flip_bw=%d, is_phantom=%d exclude_this_plane=%d\n", __func__, k, l-&gt;required_bandwidth_mbps, inc_flip_bw, is_phantom, exclude_this_plane);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5120,19 +5055,19 @@ static void CalculateExtraLatency(</div><div class='ctx'> 	*ExtraLatency_sr = *ExtraLatency_sr + Tarb;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: qos_type=%u\n", __func__, qos_type);</div><div class='del'>-	dml2_printf("DML::%s: hostvm_mode=%u\n", __func__, hostvm_mode);</div><div class='del'>-	dml2_printf("DML::%s: Tex_trips=%u\n", __func__, Tex_trips);</div><div class='del'>-	dml2_printf("DML::%s: max_outstanding_when_urgent_expected=%u\n", __func__, max_outstanding_when_urgent_expected);</div><div class='del'>-	dml2_printf("DML::%s: FabricClock=%f\n", __func__, FabricClock);</div><div class='del'>-	dml2_printf("DML::%s: DCFCLK=%f\n", __func__, DCFCLK);</div><div class='del'>-	dml2_printf("DML::%s: ReturnBW=%f\n", __func__, ReturnBW);</div><div class='del'>-	dml2_printf("DML::%s: RoundTripPingLatencyCycles=%u\n", __func__, RoundTripPingLatencyCycles);</div><div class='del'>-	dml2_printf("DML::%s: ReorderingBytes=%u\n", __func__, ReorderingBytes);</div><div class='del'>-	dml2_printf("DML::%s: Tarb=%f\n", __func__, Tarb);</div><div class='del'>-	dml2_printf("DML::%s: ExtraLatency=%f\n", __func__, *ExtraLatency);</div><div class='del'>-	dml2_printf("DML::%s: ExtraLatency_sr=%f\n", __func__, *ExtraLatency_sr);</div><div class='del'>-	dml2_printf("DML::%s: ExtraLatencyPrefetch=%f\n", __func__, *ExtraLatencyPrefetch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: qos_type=%u\n", __func__, qos_type);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: hostvm_mode=%u\n", __func__, hostvm_mode);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tex_trips=%f\n", __func__, Tex_trips);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_outstanding_when_urgent_expected=%u\n", __func__, max_outstanding_when_urgent_expected);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: FabricClock=%f\n", __func__, FabricClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCFCLK=%f\n", __func__, DCFCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ReturnBW=%f\n", __func__, ReturnBW);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: RoundTripPingLatencyCycles=%u\n", __func__, RoundTripPingLatencyCycles);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ReorderingBytes=%u\n", __func__, ReorderingBytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tarb=%f\n", __func__, Tarb);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ExtraLatency=%f\n", __func__, *ExtraLatency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ExtraLatency_sr=%f\n", __func__, *ExtraLatency_sr);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ExtraLatencyPrefetch=%f\n", __func__, *ExtraLatencyPrefetch);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5199,20 +5134,20 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		s-&gt;HostVMDynamicLevelsTrips = 0;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: dcc_enable = %u\n", __func__, p-&gt;dcc_enable);</div><div class='del'>-	dml2_printf("DML::%s: mrq_present = %u\n", __func__, p-&gt;mrq_present);</div><div class='del'>-	dml2_printf("DML::%s: dcc_mrq_enable = %u\n", __func__, dcc_mrq_enable);</div><div class='del'>-	dml2_printf("DML::%s: GPUVMEnable = %u\n", __func__, p-&gt;display_cfg-&gt;gpuvm_enable);</div><div class='del'>-	dml2_printf("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p-&gt;display_cfg-&gt;gpuvm_max_page_table_levels);</div><div class='del'>-	dml2_printf("DML::%s: DCCEnable = %u\n", __func__, p-&gt;myPipe-&gt;DCCEnable);</div><div class='del'>-	dml2_printf("DML::%s: VStartup = %u\n", __func__, p-&gt;VStartup);</div><div class='del'>-	dml2_printf("DML::%s: HostVMEnable = %u\n", __func__, p-&gt;display_cfg-&gt;hostvm_enable);</div><div class='del'>-	dml2_printf("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, p-&gt;HostVMInefficiencyFactor);</div><div class='del'>-	dml2_printf("DML::%s: TWait = %f\n", __func__, p-&gt;TWait);</div><div class='del'>-	dml2_printf("DML::%s: TWait_p = %f\n", __func__, s-&gt;TWait_p);</div><div class='del'>-	dml2_printf("DML::%s: Ttrip = %f\n", __func__, p-&gt;Ttrip);</div><div class='del'>-	dml2_printf("DML::%s: myPipe-&gt;Dppclk = %f\n", __func__, p-&gt;myPipe-&gt;Dppclk);</div><div class='del'>-	dml2_printf("DML::%s: myPipe-&gt;Dispclk = %f\n", __func__, p-&gt;myPipe-&gt;Dispclk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dcc_enable = %u\n", __func__, p-&gt;dcc_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mrq_present = %u\n", __func__, p-&gt;mrq_present);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dcc_mrq_enable = %u\n", __func__, dcc_mrq_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMEnable = %u\n", __func__, p-&gt;display_cfg-&gt;gpuvm_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p-&gt;display_cfg-&gt;gpuvm_max_page_table_levels);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCCEnable = %u\n", __func__, p-&gt;myPipe-&gt;DCCEnable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VStartup = %u\n", __func__, p-&gt;VStartup);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HostVMEnable = %u\n", __func__, p-&gt;display_cfg-&gt;hostvm_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, p-&gt;HostVMInefficiencyFactor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TWait = %f\n", __func__, p-&gt;TWait);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TWait_p = %f\n", __func__, s-&gt;TWait_p);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Ttrip = %f\n", __func__, p-&gt;Ttrip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: myPipe-&gt;Dppclk = %f\n", __func__, p-&gt;myPipe-&gt;Dppclk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: myPipe-&gt;Dispclk = %f\n", __func__, p-&gt;myPipe-&gt;Dispclk);</div><div class='ctx'> #endif</div><div class='ctx'> 	CalculateVUpdateAndDynamicMetadataParameters(</div><div class='ctx'> 		p-&gt;MaxInterDCNTileRepeaters,</div><div class='hunk'>@@ -5258,11 +5193,11 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 	if (p-&gt;DynamicMetadataEnable == true) {</div><div class='ctx'> 		if (p-&gt;VStartup * s-&gt;LineTime &lt; *p-&gt;TSetup + *p-&gt;Tdmdl + s-&gt;Tdmbf + s-&gt;Tdmec + s-&gt;Tdmsks) {</div><div class='ctx'> 			*p-&gt;NotEnoughTimeForDynamicMetadata = true;</div><div class='del'>-			dml2_printf("DML::%s: Not Enough Time for Dynamic Meta!\n", __func__);</div><div class='del'>-			dml2_printf("DML::%s: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", __func__, s-&gt;Tdmbf);</div><div class='del'>-			dml2_printf("DML::%s: Tdmec: %fus - time dio takes to transfer dmd\n", __func__, s-&gt;Tdmec);</div><div class='del'>-			dml2_printf("DML::%s: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", __func__, s-&gt;Tdmsks);</div><div class='del'>-			dml2_printf("DML::%s: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", __func__, *p-&gt;Tdmdl);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Not Enough Time for Dynamic Meta!\n", __func__);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", __func__, s-&gt;Tdmbf);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tdmec: %fus - time dio takes to transfer dmd\n", __func__, s-&gt;Tdmec);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", __func__, s-&gt;Tdmsks);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", __func__, *p-&gt;Tdmdl);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			*p-&gt;NotEnoughTimeForDynamicMetadata = false;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -5288,21 +5223,21 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		((p-&gt;myPipe-&gt;ODMMode == dml2_odm_mode_mso_1to4) ? (double)p-&gt;myPipe-&gt;HActive * 3.0 / 4.0 : 0));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DynamicMetadataVMEnabled = %u\n", __func__, p-&gt;DynamicMetadataVMEnabled);</div><div class='del'>-	dml2_printf("DML::%s: DPPCycles = %u\n", __func__, s-&gt;DPPCycles);</div><div class='del'>-	dml2_printf("DML::%s: PixelClock = %f\n", __func__, p-&gt;myPipe-&gt;PixelClock);</div><div class='del'>-	dml2_printf("DML::%s: Dppclk = %f\n", __func__, p-&gt;myPipe-&gt;Dppclk);</div><div class='del'>-	dml2_printf("DML::%s: DISPCLKCycles = %u\n", __func__, s-&gt;DISPCLKCycles);</div><div class='del'>-	dml2_printf("DML::%s: DISPCLK = %f\n", __func__, p-&gt;myPipe-&gt;Dispclk);</div><div class='del'>-	dml2_printf("DML::%s: DSCDelay = %u\n", __func__, p-&gt;DSCDelay);</div><div class='del'>-	dml2_printf("DML::%s: ODMMode = %u\n", __func__, p-&gt;myPipe-&gt;ODMMode);</div><div class='del'>-	dml2_printf("DML::%s: DPP_RECOUT_WIDTH = %u\n", __func__, p-&gt;DPP_RECOUT_WIDTH);</div><div class='del'>-	dml2_printf("DML::%s: DSTXAfterScaler = %u\n", __func__, *p-&gt;DSTXAfterScaler);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DynamicMetadataVMEnabled = %u\n", __func__, p-&gt;DynamicMetadataVMEnabled);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DPPCycles = %u\n", __func__, s-&gt;DPPCycles);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelClock = %f\n", __func__, p-&gt;myPipe-&gt;PixelClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Dppclk = %f\n", __func__, p-&gt;myPipe-&gt;Dppclk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DISPCLKCycles = %u\n", __func__, s-&gt;DISPCLKCycles);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DISPCLK = %f\n", __func__, p-&gt;myPipe-&gt;Dispclk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSCDelay = %u\n", __func__, p-&gt;DSCDelay);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ODMMode = %u\n", __func__, p-&gt;myPipe-&gt;ODMMode);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DPP_RECOUT_WIDTH = %u\n", __func__, p-&gt;DPP_RECOUT_WIDTH);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSTXAfterScaler = %u\n", __func__, *p-&gt;DSTXAfterScaler);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: setup_for_tdlut = %u\n", __func__, p-&gt;setup_for_tdlut);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_opt_time = %f\n", __func__, p-&gt;tdlut_opt_time);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_pte_bytes_per_frame = %u\n", __func__, p-&gt;tdlut_pte_bytes_per_frame);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_drain_time = %f\n", __func__, p-&gt;tdlut_drain_time);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: setup_for_tdlut = %u\n", __func__, p-&gt;setup_for_tdlut);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_opt_time = %f\n", __func__, p-&gt;tdlut_opt_time);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_pte_bytes_per_frame = %u\n", __func__, p-&gt;tdlut_pte_bytes_per_frame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_drain_time = %f\n", __func__, p-&gt;tdlut_drain_time);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;OutputFormat == dml2_420 || (p-&gt;myPipe-&gt;InterlaceEnable &amp;&amp; p-&gt;myPipe-&gt;ProgressiveToInterlaceUnitInOPP))</div><div class='hunk'>@@ -5314,17 +5249,17 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 	*p-&gt;DSTYAfterScaler = (unsigned int)(math_floor2(s-&gt;DSTTotalPixelsAfterScaler / p-&gt;myPipe-&gt;HTotal, 1));</div><div class='ctx'> 	*p-&gt;DSTXAfterScaler = (unsigned int)(s-&gt;DSTTotalPixelsAfterScaler - ((double)(*p-&gt;DSTYAfterScaler * p-&gt;myPipe-&gt;HTotal)));</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DSTXAfterScaler = %u (final)\n", __func__, *p-&gt;DSTXAfterScaler);</div><div class='del'>-	dml2_printf("DML::%s: DSTYAfterScaler = %u (final)\n", __func__, *p-&gt;DSTYAfterScaler);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSTXAfterScaler = %u (final)\n", __func__, *p-&gt;DSTXAfterScaler);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSTYAfterScaler = %u (final)\n", __func__, *p-&gt;DSTYAfterScaler);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: Tr0_trips = %f\n", __func__, *p-&gt;Tr0_trips);</div><div class='del'>-	dml2_printf("DML::%s: Tvm_trips = %f\n", __func__, *p-&gt;Tvm_trips);</div><div class='del'>-	dml2_printf("DML::%s: trip_to_mem = %f\n", __func__, s-&gt;trip_to_mem);</div><div class='del'>-	dml2_printf("DML::%s: ExtraLatencyPrefetch = %f\n", __func__, p-&gt;ExtraLatencyPrefetch);</div><div class='del'>-	dml2_printf("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p-&gt;display_cfg-&gt;gpuvm_max_page_table_levels);</div><div class='del'>-	dml2_printf("DML::%s: HostVMDynamicLevelsTrips = %u\n", __func__, s-&gt;HostVMDynamicLevelsTrips);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tr0_trips = %f\n", __func__, *p-&gt;Tr0_trips);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_trips = %f\n", __func__, *p-&gt;Tvm_trips);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: trip_to_mem = %f\n", __func__, s-&gt;trip_to_mem);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ExtraLatencyPrefetch = %f\n", __func__, p-&gt;ExtraLatencyPrefetch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMPageTableLevels = %u\n", __func__, p-&gt;display_cfg-&gt;gpuvm_max_page_table_levels);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HostVMDynamicLevelsTrips = %u\n", __func__, s-&gt;HostVMDynamicLevelsTrips);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (p-&gt;display_cfg-&gt;gpuvm_enable) {</div><div class='ctx'> 		s-&gt;Tvm_trips_rounded = math_ceil2(4.0 * *p-&gt;Tvm_trips / s-&gt;LineTime, 1.0) / 4.0 * s-&gt;LineTime;</div><div class='hunk'>@@ -5402,7 +5337,7 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* oto prefetch bw should be always be less than total vactive bw */</div><div class='del'>-	//DML2_ASSERT(s-&gt;prefetch_bw_oto &lt; s-&gt;per_pipe_vactive_sw_bw * p-&gt;myPipe-&gt;DPPPerSurface);</div><div class='add'>+	//DML_ASSERT(s-&gt;prefetch_bw_oto &lt; s-&gt;per_pipe_vactive_sw_bw * p-&gt;myPipe-&gt;DPPPerSurface);</div><div class='ctx'> </div><div class='ctx'> 	s-&gt;prefetch_bw_oto = math_max2(s-&gt;per_pipe_vactive_sw_bw, s-&gt;prefetch_bw_oto) * p-&gt;mall_prefetch_sdp_overhead_factor;</div><div class='ctx'> </div><div class='hunk'>@@ -5421,9 +5356,9 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 	*p-&gt;RequiredPrefetchBWOTO = s-&gt;prefetch_bw_oto;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: vactive_sw_bw_l = %f\n", __func__, p-&gt;vactive_sw_bw_l);</div><div class='del'>-	dml2_printf("DML::%s: vactive_sw_bw_c = %f\n", __func__, p-&gt;vactive_sw_bw_c);</div><div class='del'>-	dml2_printf("DML::%s: per_pipe_vactive_sw_bw = %f\n", __func__, s-&gt;per_pipe_vactive_sw_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vactive_sw_bw_l = %f\n", __func__, p-&gt;vactive_sw_bw_l);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vactive_sw_bw_c = %f\n", __func__, p-&gt;vactive_sw_bw_c);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: per_pipe_vactive_sw_bw = %f\n", __func__, s-&gt;per_pipe_vactive_sw_bw);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;display_cfg-&gt;gpuvm_enable == true) {</div><div class='hunk'>@@ -5433,9 +5368,9 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			s-&gt;LineTime / 4.0);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: Tvm_oto max0 = %f\n", __func__, *p-&gt;Tvm_trips);</div><div class='del'>-		dml2_printf("DML::%s: Tvm_oto max1 = %f\n", __func__, *p-&gt;Tno_bw + vm_bytes * p-&gt;HostVMInefficiencyFactor / s-&gt;prefetch_bw_oto);</div><div class='del'>-		dml2_printf("DML::%s: Tvm_oto max2 = %f\n", __func__, s-&gt;LineTime / 4.0);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tvm_oto max0 = %f\n", __func__, *p-&gt;Tvm_trips);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tvm_oto max1 = %f\n", __func__, *p-&gt;Tno_bw + vm_bytes * p-&gt;HostVMInefficiencyFactor / s-&gt;prefetch_bw_oto);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tvm_oto max2 = %f\n", __func__, s-&gt;LineTime / 4.0);</div><div class='ctx'> #endif</div><div class='ctx'> 	} else {</div><div class='ctx'> 		s-&gt;Tvm_oto = s-&gt;Tvm_trips_rounded;</div><div class='hunk'>@@ -5447,9 +5382,9 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			(p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes) / s-&gt;prefetch_bw_oto,</div><div class='ctx'> 			s-&gt;LineTime / 4.0);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: Tr0_oto max0 = %f\n", __func__, *p-&gt;Tr0_trips);</div><div class='del'>-		dml2_printf("DML::%s: Tr0_oto max1 = %f\n", __func__, (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes) / s-&gt;prefetch_bw_oto);</div><div class='del'>-		dml2_printf("DML::%s: Tr0_oto max2 = %f\n", __func__, s-&gt;LineTime / 4);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tr0_oto max0 = %f\n", __func__, *p-&gt;Tr0_trips);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tr0_oto max1 = %f\n", __func__, (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes) / s-&gt;prefetch_bw_oto);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tr0_oto max2 = %f\n", __func__, s-&gt;LineTime / 4);</div><div class='ctx'> #endif</div><div class='ctx'> 	} else</div><div class='ctx'> 		s-&gt;Tr0_oto = s-&gt;LineTime / 4.0;</div><div class='hunk'>@@ -5459,11 +5394,11 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 	s-&gt;dst_y_prefetch_oto = s-&gt;Tvm_oto_lines + 2 * s-&gt;Tr0_oto_lines + s-&gt;Lsw_oto;</div><div class='ctx'> </div><div class='ctx'> #ifdef DML_GLOBAL_PREFETCH_CHECK</div><div class='del'>-	dml2_printf("DML::%s: impacted_Tpre = %f\n", __func__, p-&gt;impacted_dst_y_pre);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: impacted_Tpre = %f\n", __func__, p-&gt;impacted_dst_y_pre);</div><div class='ctx'> 	if (p-&gt;impacted_dst_y_pre &gt; 0) {</div><div class='del'>-		dml2_printf("DML::%s: dst_y_prefetch_oto = %f\n", __func__, s-&gt;dst_y_prefetch_oto);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dst_y_prefetch_oto = %f\n", __func__, s-&gt;dst_y_prefetch_oto);</div><div class='ctx'> 		s-&gt;dst_y_prefetch_oto = math_max2(s-&gt;dst_y_prefetch_oto, p-&gt;impacted_dst_y_pre);</div><div class='del'>-		dml2_printf("DML::%s: dst_y_prefetch_oto = %f (impacted)\n", __func__, s-&gt;dst_y_prefetch_oto);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dst_y_prefetch_oto = %f (impacted)\n", __func__, s-&gt;dst_y_prefetch_oto);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	*p-&gt;Tpre_oto = s-&gt;dst_y_prefetch_oto * s-&gt;LineTime;</div><div class='hunk'>@@ -5492,72 +5427,71 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 	s-&gt;dst_y_prefetch_equ = math_min2(s-&gt;dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST_Y_PREFETCH</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: HTotal = %u\n", __func__, p-&gt;myPipe-&gt;HTotal);</div><div class='del'>-	dml2_printf("DML::%s: min_Lsw_oto = %f\n", __func__, s-&gt;min_Lsw_oto);</div><div class='del'>-	dml2_printf("DML::%s: min_Lsw_equ = %f\n", __func__, s-&gt;min_Lsw_equ);</div><div class='del'>-	dml2_printf("DML::%s: Tno_bw = %f\n", __func__, *p-&gt;Tno_bw);</div><div class='del'>-	dml2_printf("DML::%s: Tno_bw_flip = %f\n", __func__, *p-&gt;Tno_bw_flip);</div><div class='del'>-	dml2_printf("DML::%s: ExtraLatencyPrefetch = %f\n", __func__, p-&gt;ExtraLatencyPrefetch);</div><div class='del'>-	dml2_printf("DML::%s: trip_to_mem = %f\n", __func__, s-&gt;trip_to_mem);</div><div class='del'>-	dml2_printf("DML::%s: mall_prefetch_sdp_overhead_factor = %f\n", __func__, p-&gt;mall_prefetch_sdp_overhead_factor);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixelY = %u\n", __func__, p-&gt;myPipe-&gt;BytePerPixelY);</div><div class='del'>-	dml2_printf("DML::%s: PrefetchSourceLinesY = %f\n", __func__, p-&gt;PrefetchSourceLinesY);</div><div class='del'>-	dml2_printf("DML::%s: swath_width_luma_ub = %u\n", __func__, p-&gt;swath_width_luma_ub);</div><div class='del'>-	dml2_printf("DML::%s: BytePerPixelC = %u\n", __func__, p-&gt;myPipe-&gt;BytePerPixelC);</div><div class='del'>-	dml2_printf("DML::%s: PrefetchSourceLinesC = %f\n", __func__, p-&gt;PrefetchSourceLinesC);</div><div class='del'>-	dml2_printf("DML::%s: swath_width_chroma_ub = %u\n", __func__, p-&gt;swath_width_chroma_ub);</div><div class='del'>-	dml2_printf("DML::%s: prefetch_sw_bytes = %f\n", __func__, *p-&gt;prefetch_sw_bytes);</div><div class='del'>-	dml2_printf("DML::%s: max_Tsw = %f\n", __func__, s-&gt;max_Tsw);</div><div class='del'>-	dml2_printf("DML::%s: bytes_pp = %f\n", __func__, s-&gt;bytes_pp);</div><div class='del'>-	dml2_printf("DML::%s: vm_bytes = %u\n", __func__, vm_bytes);</div><div class='del'>-	dml2_printf("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, p-&gt;PixelPTEBytesPerRow);</div><div class='del'>-	dml2_printf("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, p-&gt;HostVMInefficiencyFactor);</div><div class='del'>-	dml2_printf("DML::%s: Tvm_trips = %f\n", __func__, *p-&gt;Tvm_trips);</div><div class='del'>-	dml2_printf("DML::%s: Tr0_trips = %f\n", __func__, *p-&gt;Tr0_trips);</div><div class='del'>-	dml2_printf("DML::%s: Tvm_trips_flip = %f\n", __func__, *p-&gt;Tvm_trips_flip);</div><div class='del'>-	dml2_printf("DML::%s: Tr0_trips_flip = %f\n", __func__, *p-&gt;Tr0_trips_flip);</div><div class='del'>-	dml2_printf("DML::%s: prefetch_bw_pr = %f\n", __func__, s-&gt;prefetch_bw_pr);</div><div class='del'>-	dml2_printf("DML::%s: prefetch_bw_oto = %f\n", __func__, s-&gt;prefetch_bw_oto);</div><div class='del'>-	dml2_printf("DML::%s: Tr0_oto = %f\n", __func__, s-&gt;Tr0_oto);</div><div class='del'>-	dml2_printf("DML::%s: Tvm_oto = %f\n", __func__, s-&gt;Tvm_oto);</div><div class='del'>-	dml2_printf("DML::%s: Tvm_oto_lines = %f\n", __func__, s-&gt;Tvm_oto_lines);</div><div class='del'>-	dml2_printf("DML::%s: Tr0_oto_lines = %f\n", __func__, s-&gt;Tr0_oto_lines);</div><div class='del'>-	dml2_printf("DML::%s: Lsw_oto = %f\n", __func__, s-&gt;Lsw_oto);</div><div class='del'>-	dml2_printf("DML::%s: dst_y_prefetch_oto = %f\n", __func__, s-&gt;dst_y_prefetch_oto);</div><div class='del'>-	dml2_printf("DML::%s: dst_y_prefetch_equ = %f\n", __func__, s-&gt;dst_y_prefetch_equ);</div><div class='del'>-	dml2_printf("DML::%s: tdlut_row_bytes = %d\n", __func__, tdlut_row_bytes);</div><div class='del'>-	dml2_printf("DML::%s: meta_row_bytes = %d\n", __func__, p-&gt;meta_row_bytes);</div><div class='del'>-#endif</div><div class='del'>-	double Tpre = s-&gt;dst_y_prefetch_equ * s-&gt;LineTime;</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HTotal = %u\n", __func__, p-&gt;myPipe-&gt;HTotal);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_Lsw_oto = %f\n", __func__, s-&gt;min_Lsw_oto);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_Lsw_equ = %f\n", __func__, s-&gt;min_Lsw_equ);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tno_bw = %f\n", __func__, *p-&gt;Tno_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tno_bw_flip = %f\n", __func__, *p-&gt;Tno_bw_flip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ExtraLatencyPrefetch = %f\n", __func__, p-&gt;ExtraLatencyPrefetch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: trip_to_mem = %f\n", __func__, s-&gt;trip_to_mem);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mall_prefetch_sdp_overhead_factor = %f\n", __func__, p-&gt;mall_prefetch_sdp_overhead_factor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixelY = %u\n", __func__, p-&gt;myPipe-&gt;BytePerPixelY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PrefetchSourceLinesY = %f\n", __func__, p-&gt;PrefetchSourceLinesY);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: swath_width_luma_ub = %u\n", __func__, p-&gt;swath_width_luma_ub);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BytePerPixelC = %u\n", __func__, p-&gt;myPipe-&gt;BytePerPixelC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PrefetchSourceLinesC = %f\n", __func__, p-&gt;PrefetchSourceLinesC);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: swath_width_chroma_ub = %u\n", __func__, p-&gt;swath_width_chroma_ub);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: prefetch_sw_bytes = %f\n", __func__, *p-&gt;prefetch_sw_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_Tsw = %f\n", __func__, s-&gt;max_Tsw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: bytes_pp = %f\n", __func__, s-&gt;bytes_pp);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vm_bytes = %u\n", __func__, vm_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, p-&gt;PixelPTEBytesPerRow);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, p-&gt;HostVMInefficiencyFactor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_trips = %f\n", __func__, *p-&gt;Tvm_trips);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tr0_trips = %f\n", __func__, *p-&gt;Tr0_trips);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_trips_flip = %f\n", __func__, *p-&gt;Tvm_trips_flip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tr0_trips_flip = %f\n", __func__, *p-&gt;Tr0_trips_flip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: prefetch_bw_pr = %f\n", __func__, s-&gt;prefetch_bw_pr);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: prefetch_bw_oto = %f\n", __func__, s-&gt;prefetch_bw_oto);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tr0_oto = %f\n", __func__, s-&gt;Tr0_oto);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_oto = %f\n", __func__, s-&gt;Tvm_oto);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_oto_lines = %f\n", __func__, s-&gt;Tvm_oto_lines);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tr0_oto_lines = %f\n", __func__, s-&gt;Tr0_oto_lines);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Lsw_oto = %f\n", __func__, s-&gt;Lsw_oto);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dst_y_prefetch_oto = %f\n", __func__, s-&gt;dst_y_prefetch_oto);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dst_y_prefetch_equ = %f\n", __func__, s-&gt;dst_y_prefetch_equ);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: tdlut_row_bytes = %d\n", __func__, tdlut_row_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: meta_row_bytes = %d\n", __func__, p-&gt;meta_row_bytes);</div><div class='add'>+#endif</div><div class='ctx'> 	s-&gt;dst_y_prefetch_equ = math_floor2(4.0 * (s-&gt;dst_y_prefetch_equ + 0.125), 1) / 4.0;</div><div class='ctx'> 	*p-&gt;Tpre_rounded = s-&gt;dst_y_prefetch_equ * s-&gt;LineTime;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: dst_y_prefetch_equ: %f (after round)\n", __func__, s-&gt;dst_y_prefetch_equ);</div><div class='del'>-	dml2_printf("DML::%s: LineTime: %f\n", __func__, s-&gt;LineTime);</div><div class='del'>-	dml2_printf("DML::%s: VStartup: %u\n", __func__, p-&gt;VStartup);</div><div class='del'>-	dml2_printf("DML::%s: Tvstartup: %fus - time between vstartup and first pixel of active\n", __func__, p-&gt;VStartup * s-&gt;LineTime);</div><div class='del'>-	dml2_printf("DML::%s: TSetup: %fus - time from vstartup to vready\n", __func__, *p-&gt;TSetup);</div><div class='del'>-	dml2_printf("DML::%s: TCalc: %fus - time for calculations in dchub starting at vready\n", __func__, p-&gt;TCalc);</div><div class='del'>-	dml2_printf("DML::%s: TWait: %fus - time for fabric to become ready max(pstate exit,cstate enter/exit, urgent latency) after TCalc\n", __func__, p-&gt;TWait);</div><div class='del'>-	dml2_printf("DML::%s: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", __func__, s-&gt;Tdmbf);</div><div class='del'>-	dml2_printf("DML::%s: Tdmec: %fus - time dio takes to transfer dmd\n", __func__, s-&gt;Tdmec);</div><div class='del'>-	dml2_printf("DML::%s: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", __func__, s-&gt;Tdmsks);</div><div class='del'>-	dml2_printf("DML::%s: TWait = %f\n", __func__, p-&gt;TWait);</div><div class='del'>-	dml2_printf("DML::%s: TWait_p = %f\n", __func__, s-&gt;TWait_p);</div><div class='del'>-	dml2_printf("DML::%s: Ttrip = %f\n", __func__, p-&gt;Ttrip);</div><div class='del'>-	dml2_printf("DML::%s: Tex = %f\n", __func__, p-&gt;ExtraLatencyPrefetch);</div><div class='del'>-	dml2_printf("DML::%s: Tdmdl_vm: %fus - time for vm stages of dmd \n", __func__, *p-&gt;Tdmdl_vm);</div><div class='del'>-	dml2_printf("DML::%s: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", __func__, *p-&gt;Tdmdl);</div><div class='del'>-	dml2_printf("DML::%s: TWait_p: %fus\n", __func__, s-&gt;TWait_p);</div><div class='del'>-	dml2_printf("DML::%s: Ttrip: %fus\n", __func__, p-&gt;Ttrip);</div><div class='del'>-	dml2_printf("DML::%s: DSTXAfterScaler: %u pixels - number of pixel clocks pipeline and buffer delay after scaler \n", __func__, *p-&gt;DSTXAfterScaler);</div><div class='del'>-	dml2_printf("DML::%s: DSTYAfterScaler: %u lines - number of lines of pipeline and buffer delay after scaler \n", __func__, *p-&gt;DSTYAfterScaler);</div><div class='del'>-	dml2_printf("DML::%s: vm_bytes: %f (hvm inefficiency scaled)\n", __func__, vm_bytes*p-&gt;HostVMInefficiencyFactor);</div><div class='del'>-	dml2_printf("DML::%s: row_bytes: %f (hvm inefficiency scaled, 1 row)\n", __func__, p-&gt;PixelPTEBytesPerRow*p-&gt;HostVMInefficiencyFactor+p-&gt;meta_row_bytes+tdlut_row_bytes);</div><div class='del'>-	dml2_printf("DML::%s: Tno_bw: %f\n", __func__, *p-&gt;Tno_bw);</div><div class='del'>-	dml2_printf("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, Tpre, *p-&gt;Tpre_rounded, (*p-&gt;Tpre_rounded - Tpre));</div><div class='del'>-	dml2_printf("DML::%s: Tvm_trips=%f Tvm_trips_rounded: %f, delta=%f\n", __func__, *p-&gt;Tvm_trips, s-&gt;Tvm_trips_rounded, (s-&gt;Tvm_trips_rounded - *p-&gt;Tvm_trips));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dst_y_prefetch_equ: %f (after round)\n", __func__, s-&gt;dst_y_prefetch_equ);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: LineTime: %f\n", __func__, s-&gt;LineTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VStartup: %u\n", __func__, p-&gt;VStartup);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvstartup: %fus - time between vstartup and first pixel of active\n", __func__, p-&gt;VStartup * s-&gt;LineTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TSetup: %fus - time from vstartup to vready\n", __func__, *p-&gt;TSetup);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TCalc: %fus - time for calculations in dchub starting at vready\n", __func__, p-&gt;TCalc);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TWait: %fus - time for fabric to become ready max(pstate exit,cstate enter/exit, urgent latency) after TCalc\n", __func__, p-&gt;TWait);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", __func__, s-&gt;Tdmbf);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tdmec: %fus - time dio takes to transfer dmd\n", __func__, s-&gt;Tdmec);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", __func__, s-&gt;Tdmsks);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TWait = %f\n", __func__, p-&gt;TWait);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TWait_p = %f\n", __func__, s-&gt;TWait_p);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Ttrip = %f\n", __func__, p-&gt;Ttrip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tex = %f\n", __func__, p-&gt;ExtraLatencyPrefetch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tdmdl_vm: %fus - time for vm stages of dmd \n", __func__, *p-&gt;Tdmdl_vm);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tdmdl: %fus - time for fabric to become ready and fetch dmd \n", __func__, *p-&gt;Tdmdl);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TWait_p: %fus\n", __func__, s-&gt;TWait_p);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Ttrip: %fus\n", __func__, p-&gt;Ttrip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSTXAfterScaler: %u pixels - number of pixel clocks pipeline and buffer delay after scaler \n", __func__, *p-&gt;DSTXAfterScaler);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DSTYAfterScaler: %u lines - number of lines of pipeline and buffer delay after scaler \n", __func__, *p-&gt;DSTYAfterScaler);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vm_bytes: %f (hvm inefficiency scaled)\n", __func__, vm_bytes*p-&gt;HostVMInefficiencyFactor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: row_bytes: %f (hvm inefficiency scaled, 1 row)\n", __func__, p-&gt;PixelPTEBytesPerRow*p-&gt;HostVMInefficiencyFactor+p-&gt;meta_row_bytes+tdlut_row_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tno_bw: %f\n", __func__, *p-&gt;Tno_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, (s-&gt;dst_y_prefetch_equ * s-&gt;LineTime), *p-&gt;Tpre_rounded, (*p-&gt;Tpre_rounded - (s-&gt;dst_y_prefetch_equ * s-&gt;LineTime)));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_trips=%f Tvm_trips_rounded: %f, delta=%f\n", __func__, *p-&gt;Tvm_trips, s-&gt;Tvm_trips_rounded, (s-&gt;Tvm_trips_rounded - *p-&gt;Tvm_trips));</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	*p-&gt;dst_y_per_vm_vblank = 0;</div><div class='hunk'>@@ -5596,19 +5530,19 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		} else</div><div class='ctx'> 			s-&gt;prefetch_bw1 = 0;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: prefetch_bw1: %f\n", __func__, s-&gt;prefetch_bw1);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_bw1: %f\n", __func__, s-&gt;prefetch_bw1);</div><div class='ctx'> 		if ((s-&gt;Tsw_est1 &lt; s-&gt;min_Lsw_equ * s-&gt;LineTime) &amp;&amp; (*p-&gt;Tpre_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.75 * s-&gt;LineTime - *p-&gt;Tno_bw &gt; 0)) {</div><div class='ctx'> 			s-&gt;prefetch_bw1 = (vm_bytes * p-&gt;HostVMInefficiencyFactor + 2 * (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes)) /</div><div class='ctx'> 				(*p-&gt;Tpre_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.75 * s-&gt;LineTime - *p-&gt;Tno_bw);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: vm and 2 rows bytes = %f\n", __func__, (vm_bytes * p-&gt;HostVMInefficiencyFactor + 2 * (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes)));</div><div class='del'>-			dml2_printf("DML::%s: Tpre_rounded = %f\n", __func__, *p-&gt;Tpre_rounded);</div><div class='del'>-			dml2_printf("DML::%s: minus term = %f\n", __func__, s-&gt;min_Lsw_equ * s-&gt;LineTime + 0.75 * s-&gt;LineTime + *p-&gt;Tno_bw);</div><div class='del'>-			dml2_printf("DML::%s: min_Lsw_equ = %f\n", __func__, s-&gt;min_Lsw_equ);</div><div class='del'>-			dml2_printf("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='del'>-			dml2_printf("DML::%s: Tno_bw = %f\n", __func__, *p-&gt;Tno_bw);</div><div class='del'>-			dml2_printf("DML::%s: Time to fetch vm and 2 rows = %f\n", __func__, (*p-&gt;Tpre_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.75 * s-&gt;LineTime - *p-&gt;Tno_bw));</div><div class='del'>-			dml2_printf("DML::%s: prefetch_bw1: %f (updated)\n", __func__, s-&gt;prefetch_bw1);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: vm and 2 rows bytes = %f\n", __func__, (vm_bytes * p-&gt;HostVMInefficiencyFactor + 2 * (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes)));</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tpre_rounded = %f\n", __func__, *p-&gt;Tpre_rounded);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: minus term = %f\n", __func__, s-&gt;min_Lsw_equ * s-&gt;LineTime + 0.75 * s-&gt;LineTime + *p-&gt;Tno_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: min_Lsw_equ = %f\n", __func__, s-&gt;min_Lsw_equ);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tno_bw = %f\n", __func__, *p-&gt;Tno_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Time to fetch vm and 2 rows = %f\n", __func__, (*p-&gt;Tpre_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.75 * s-&gt;LineTime - *p-&gt;Tno_bw));</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: prefetch_bw1: %f (updated)\n", __func__, s-&gt;prefetch_bw1);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -5620,10 +5554,10 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		} else</div><div class='ctx'> 			s-&gt;prefetch_bw2 = 0;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: prefetch_bw2: %f\n", __func__, s-&gt;prefetch_bw2);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_bw2: %f\n", __func__, s-&gt;prefetch_bw2);</div><div class='ctx'> 		if ((s-&gt;Tsw_est2 &lt; s-&gt;min_Lsw_equ * s-&gt;LineTime) &amp;&amp; ((*p-&gt;Tpre_rounded - *p-&gt;Tno_bw - 2.0 * s-&gt;Tr0_trips_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.25 * s-&gt;LineTime) &gt; 0)) {</div><div class='ctx'> 			s-&gt;prefetch_bw2 = vm_bytes * p-&gt;HostVMInefficiencyFactor / (*p-&gt;Tpre_rounded - *p-&gt;Tno_bw - 2.0 * s-&gt;Tr0_trips_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.25 * s-&gt;LineTime);</div><div class='del'>-			dml2_printf("DML::%s: prefetch_bw2: %f (updated)\n", __func__, s-&gt;prefetch_bw2);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: prefetch_bw2: %f (updated)\n", __func__, s-&gt;prefetch_bw2);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		// prefetch_bw3: 2*R0 + SW</div><div class='hunk'>@@ -5634,10 +5568,10 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		} else</div><div class='ctx'> 			s-&gt;prefetch_bw3 = 0;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: prefetch_bw3: %f\n", __func__, s-&gt;prefetch_bw3);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_bw3: %f\n", __func__, s-&gt;prefetch_bw3);</div><div class='ctx'> 		if ((s-&gt;Tsw_est3 &lt; s-&gt;min_Lsw_equ * s-&gt;LineTime) &amp;&amp; ((*p-&gt;Tpre_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.5 * s-&gt;LineTime - s-&gt;Tvm_trips_rounded) &gt; 0)) {</div><div class='ctx'> 			s-&gt;prefetch_bw3 = (2 * (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes)) / (*p-&gt;Tpre_rounded - s-&gt;min_Lsw_equ * s-&gt;LineTime - 0.5 * s-&gt;LineTime - s-&gt;Tvm_trips_rounded);</div><div class='del'>-			dml2_printf("DML::%s: prefetch_bw3: %f (updated)\n", __func__, s-&gt;prefetch_bw3);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: prefetch_bw3: %f (updated)\n", __func__, s-&gt;prefetch_bw3);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		// prefetch_bw4: SW</div><div class='hunk'>@@ -5647,17 +5581,17 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			s-&gt;prefetch_bw4 = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: Tno_bw: %f\n", __func__, *p-&gt;Tno_bw);</div><div class='del'>-		dml2_printf("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, Tpre, *p-&gt;Tpre_rounded, (*p-&gt;Tpre_rounded - Tpre));</div><div class='del'>-		dml2_printf("DML::%s: Tvm_trips=%f Tvm_trips_rounded: %f, delta=%f\n", __func__, *p-&gt;Tvm_trips, s-&gt;Tvm_trips_rounded, (s-&gt;Tvm_trips_rounded - *p-&gt;Tvm_trips));</div><div class='del'>-		dml2_printf("DML::%s: Tr0_trips=%f Tr0_trips_rounded: %f, delta=%f\n", __func__, *p-&gt;Tr0_trips, s-&gt;Tr0_trips_rounded, (s-&gt;Tr0_trips_rounded - *p-&gt;Tr0_trips));</div><div class='del'>-		dml2_printf("DML::%s: Tsw_est1: %f\n", __func__, s-&gt;Tsw_est1);</div><div class='del'>-		dml2_printf("DML::%s: Tsw_est2: %f\n", __func__, s-&gt;Tsw_est2);</div><div class='del'>-		dml2_printf("DML::%s: Tsw_est3: %f\n", __func__, s-&gt;Tsw_est3);</div><div class='del'>-		dml2_printf("DML::%s: prefetch_bw1: %f (final)\n", __func__, s-&gt;prefetch_bw1);</div><div class='del'>-		dml2_printf("DML::%s: prefetch_bw2: %f (final)\n", __func__, s-&gt;prefetch_bw2);</div><div class='del'>-		dml2_printf("DML::%s: prefetch_bw3: %f (final)\n", __func__, s-&gt;prefetch_bw3);</div><div class='del'>-		dml2_printf("DML::%s: prefetch_bw4: %f (final)\n", __func__, s-&gt;prefetch_bw4);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tno_bw: %f\n", __func__, *p-&gt;Tno_bw);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tpre=%f Tpre_rounded: %f, delta=%f\n", __func__, s-&gt;dst_y_prefetch_equ * s-&gt;LineTime, *p-&gt;Tpre_rounded, (*p-&gt;Tpre_rounded - (s-&gt;dst_y_prefetch_equ * s-&gt;LineTime)));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tvm_trips=%f Tvm_trips_rounded: %f, delta=%f\n", __func__, *p-&gt;Tvm_trips, s-&gt;Tvm_trips_rounded, (s-&gt;Tvm_trips_rounded - *p-&gt;Tvm_trips));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tr0_trips=%f Tr0_trips_rounded: %f, delta=%f\n", __func__, *p-&gt;Tr0_trips, s-&gt;Tr0_trips_rounded, (s-&gt;Tr0_trips_rounded - *p-&gt;Tr0_trips));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tsw_est1: %f\n", __func__, s-&gt;Tsw_est1);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tsw_est2: %f\n", __func__, s-&gt;Tsw_est2);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tsw_est3: %f\n", __func__, s-&gt;Tsw_est3);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_bw1: %f (final)\n", __func__, s-&gt;prefetch_bw1);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_bw2: %f (final)\n", __func__, s-&gt;prefetch_bw2);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_bw3: %f (final)\n", __func__, s-&gt;prefetch_bw3);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_bw4: %f (final)\n", __func__, s-&gt;prefetch_bw4);</div><div class='ctx'> #endif</div><div class='ctx'> 		{</div><div class='ctx'> 			bool Case1OK = false;</div><div class='hunk'>@@ -5676,14 +5610,14 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> </div><div class='ctx'> 			double total_row_bytes = (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes);</div><div class='ctx'> </div><div class='del'>-			dml2_printf("DML::%s: Tvm_trips_rounded = %f\n", __func__, s-&gt;Tvm_trips_rounded);</div><div class='del'>-			dml2_printf("DML::%s: Tr0_trips_rounded = %f\n", __func__, s-&gt;Tr0_trips_rounded);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tvm_trips_rounded = %f\n", __func__, s-&gt;Tvm_trips_rounded);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Tr0_trips_rounded = %f\n", __func__, s-&gt;Tr0_trips_rounded);</div><div class='ctx'> </div><div class='ctx'> 			if (s-&gt;prefetch_bw1 &gt; 0) {</div><div class='ctx'> 				double vm_transfer_time = *p-&gt;Tno_bw + vm_bytes * p-&gt;HostVMInefficiencyFactor / s-&gt;prefetch_bw1;</div><div class='ctx'> 				double row_transfer_time = total_row_bytes / s-&gt;prefetch_bw1;</div><div class='del'>-				dml2_printf("DML::%s: Case1: vm_transfer_time  = %f\n", __func__, vm_transfer_time);</div><div class='del'>-				dml2_printf("DML::%s: Case1: row_transfer_time = %f\n", __func__, row_transfer_time);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Case1: vm_transfer_time  = %f\n", __func__, vm_transfer_time);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Case1: row_transfer_time = %f\n", __func__, row_transfer_time);</div><div class='ctx'> 				if (vm_transfer_time &gt;= s-&gt;Tvm_trips_rounded &amp;&amp; row_transfer_time &gt;= s-&gt;Tr0_trips_rounded) {</div><div class='ctx'> 					Case1OK = true;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -5696,8 +5630,8 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			if (s-&gt;prefetch_bw2 &gt; 0) {</div><div class='ctx'> 				double vm_transfer_time = *p-&gt;Tno_bw + vm_bytes * p-&gt;HostVMInefficiencyFactor / s-&gt;prefetch_bw2;</div><div class='ctx'> 				double row_transfer_time = total_row_bytes / s-&gt;prefetch_bw2;</div><div class='del'>-				dml2_printf("DML::%s: Case2: vm_transfer_time  = %f\n", __func__, vm_transfer_time);</div><div class='del'>-				dml2_printf("DML::%s: Case2: row_transfer_time = %f\n", __func__, row_transfer_time);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Case2: vm_transfer_time  = %f\n", __func__, vm_transfer_time);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Case2: row_transfer_time = %f\n", __func__, row_transfer_time);</div><div class='ctx'> 				if (vm_transfer_time &gt;= s-&gt;Tvm_trips_rounded &amp;&amp; row_transfer_time &lt; s-&gt;Tr0_trips_rounded) {</div><div class='ctx'> 					Case2OK = true;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -5709,8 +5643,8 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			if (s-&gt;prefetch_bw3 &gt; 0) {</div><div class='ctx'> 				double vm_transfer_time = *p-&gt;Tno_bw + vm_bytes * p-&gt;HostVMInefficiencyFactor / s-&gt;prefetch_bw3;</div><div class='ctx'> 				double row_transfer_time = total_row_bytes / s-&gt;prefetch_bw3;</div><div class='del'>-				dml2_printf("DML::%s: Case3: vm_transfer_time  = %f\n", __func__, vm_transfer_time);</div><div class='del'>-				dml2_printf("DML::%s: Case3: row_transfer_time = %f\n", __func__, row_transfer_time);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Case3: vm_transfer_time  = %f\n", __func__, vm_transfer_time);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Case3: row_transfer_time = %f\n", __func__, row_transfer_time);</div><div class='ctx'> 				if (vm_transfer_time &lt; s-&gt;Tvm_trips_rounded &amp;&amp; row_transfer_time &gt;= s-&gt;Tr0_trips_rounded) {</div><div class='ctx'> 					Case3OK = true;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -5730,10 +5664,10 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 							p-&gt;vm_bytes * p-&gt;HostVMInefficiencyFactor / (31 * s-&gt;LineTime) - *p-&gt;Tno_bw,</div><div class='ctx'> 							(p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + p-&gt;meta_row_bytes + tdlut_row_bytes) / (15 * s-&gt;LineTime));</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: Case1OK: %u\n", __func__, Case1OK);</div><div class='del'>-			dml2_printf("DML::%s: Case2OK: %u\n", __func__, Case2OK);</div><div class='del'>-			dml2_printf("DML::%s: Case3OK: %u\n", __func__, Case3OK);</div><div class='del'>-			dml2_printf("DML::%s: prefetch_bw_equ: %f\n", __func__, s-&gt;prefetch_bw_equ);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Case1OK: %u\n", __func__, Case1OK);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Case2OK: %u\n", __func__, Case2OK);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Case3OK: %u\n", __func__, Case3OK);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: prefetch_bw_equ: %f\n", __func__, s-&gt;prefetch_bw_equ);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 			if (s-&gt;prefetch_bw_equ &gt; 0) {</div><div class='hunk'>@@ -5753,12 +5687,12 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			} else {</div><div class='ctx'> 				s-&gt;Tvm_equ = 0;</div><div class='ctx'> 				s-&gt;Tr0_equ = 0;</div><div class='del'>-				dml2_printf("DML::%s: prefetch_bw_equ equals 0!\n", __func__);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: prefetch_bw_equ equals 0!\n", __func__);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: Tvm_equ = %f\n", __func__, s-&gt;Tvm_equ);</div><div class='del'>-		dml2_printf("DML::%s: Tr0_equ = %f\n", __func__, s-&gt;Tr0_equ);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tvm_equ = %f\n", __func__, s-&gt;Tvm_equ);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tr0_equ = %f\n", __func__, s-&gt;Tr0_equ);</div><div class='ctx'> #endif</div><div class='ctx'> 		// Use the more stressful prefetch schedule</div><div class='ctx'> 		if (s-&gt;dst_y_prefetch_oto &lt; s-&gt;dst_y_prefetch_equ) {</div><div class='hunk'>@@ -5769,7 +5703,7 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			*p-&gt;dst_y_per_vm_vblank = math_ceil2(4.0 * s-&gt;TimeForFetchingVM / s-&gt;LineTime, 1.0) / 4.0;</div><div class='ctx'> 			*p-&gt;dst_y_per_row_vblank = math_ceil2(4.0 * s-&gt;TimeForFetchingRowInVBlank / s-&gt;LineTime, 1.0) / 4.0;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: Using oto scheduling for prefetch\n", __func__);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Using oto scheduling for prefetch\n", __func__);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -5785,7 +5719,7 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		*p-&gt;dst_y_per_row_vblank = math_ceil2(4.0 * s-&gt;TimeForFetchingRowInVBlank / s-&gt;LineTime, 1.0) / 4.0;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: Using equ bw scheduling for prefetch\n", __func__);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Using equ bw scheduling for prefetch\n", __func__);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -5797,31 +5731,31 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		*p-&gt;prefetch_swath_time_us = (s-&gt;LinesToRequestPrefetchPixelData * s-&gt;LineTime);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: TimeForFetchingVM = %f\n", __func__, s-&gt;TimeForFetchingVM);</div><div class='del'>-		dml2_printf("DML::%s: TimeForFetchingRowInVBlank = %f\n", __func__, s-&gt;TimeForFetchingRowInVBlank);</div><div class='del'>-		dml2_printf("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='del'>-		dml2_printf("DML::%s: dst_y_prefetch = %f\n", __func__, *p-&gt;dst_y_prefetch);</div><div class='del'>-		dml2_printf("DML::%s: dst_y_per_vm_vblank = %f\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='del'>-		dml2_printf("DML::%s: dst_y_per_row_vblank = %f\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='del'>-		dml2_printf("DML::%s: LinesToRequestPrefetchPixelData = %f\n", __func__, s-&gt;LinesToRequestPrefetchPixelData);</div><div class='del'>-		dml2_printf("DML::%s: PrefetchSourceLinesY = %f\n", __func__, p-&gt;PrefetchSourceLinesY);</div><div class='del'>-		dml2_printf("DML::%s: prefetch_swath_time_us = %f\n", __func__, *p-&gt;prefetch_swath_time_us);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: TimeForFetchingVM = %f\n", __func__, s-&gt;TimeForFetchingVM);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: TimeForFetchingRowInVBlank = %f\n", __func__, s-&gt;TimeForFetchingRowInVBlank);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dst_y_prefetch = %f\n", __func__, *p-&gt;dst_y_prefetch);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dst_y_per_vm_vblank = %f\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dst_y_per_row_vblank = %f\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: LinesToRequestPrefetchPixelData = %f\n", __func__, s-&gt;LinesToRequestPrefetchPixelData);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: PrefetchSourceLinesY = %f\n", __func__, p-&gt;PrefetchSourceLinesY);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_swath_time_us = %f\n", __func__, *p-&gt;prefetch_swath_time_us);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: cursor_bytes_per_chunk = %d\n", __func__, p-&gt;cursor_bytes_per_chunk);</div><div class='del'>-		dml2_printf("DML::%s: cursor_bytes_per_line = %d\n", __func__, p-&gt;cursor_bytes_per_line);</div><div class='del'>-		dml2_printf("DML::%s: cursor_prefetch_bytes = %d\n", __func__, s-&gt;cursor_prefetch_bytes);</div><div class='del'>-		dml2_printf("DML::%s: prefetch_cursor_bw = %f\n", __func__, *p-&gt;prefetch_cursor_bw);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_chunk = %d\n", __func__, p-&gt;cursor_bytes_per_chunk);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: cursor_bytes_per_line = %d\n", __func__, p-&gt;cursor_bytes_per_line);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: cursor_prefetch_bytes = %d\n", __func__, s-&gt;cursor_prefetch_bytes);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: prefetch_cursor_bw = %f\n", __func__, *p-&gt;prefetch_cursor_bw);</div><div class='ctx'> #endif</div><div class='del'>-		DML2_ASSERT(*p-&gt;dst_y_prefetch &lt; 64);</div><div class='add'>+		DML_ASSERT(*p-&gt;dst_y_prefetch &lt; 64);</div><div class='ctx'> </div><div class='ctx'> 		unsigned int min_lsw_required = (unsigned int)math_max2(2, p-&gt;tdlut_drain_time / s-&gt;LineTime);</div><div class='ctx'> 		if (s-&gt;LinesToRequestPrefetchPixelData &gt;= min_lsw_required &amp;&amp; s-&gt;prefetch_bw_equ &gt; 0) {</div><div class='ctx'> 			*p-&gt;VRatioPrefetchY = (double)p-&gt;PrefetchSourceLinesY / s-&gt;LinesToRequestPrefetchPixelData;</div><div class='ctx'> 			*p-&gt;VRatioPrefetchY = math_max2(*p-&gt;VRatioPrefetchY, 1.0);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: VRatioPrefetchY = %f\n", __func__, *p-&gt;VRatioPrefetchY);</div><div class='del'>-			dml2_printf("DML::%s: SwathHeightY = %u\n", __func__, p-&gt;SwathHeightY);</div><div class='del'>-			dml2_printf("DML::%s: VInitPreFillY = %u\n", __func__, p-&gt;VInitPreFillY);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: VRatioPrefetchY = %f\n", __func__, *p-&gt;VRatioPrefetchY);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: SwathHeightY = %u\n", __func__, p-&gt;SwathHeightY);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: VInitPreFillY = %u\n", __func__, p-&gt;VInitPreFillY);</div><div class='ctx'> #endif</div><div class='ctx'> 			if ((p-&gt;SwathHeightY &gt; 4) &amp;&amp; (p-&gt;VInitPreFillY &gt; 3)) {</div><div class='ctx'> 				if (s-&gt;LinesToRequestPrefetchPixelData &gt; (p-&gt;VInitPreFillY - 3.0) / 2.0) {</div><div class='hunk'>@@ -5829,13 +5763,13 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 						(double)p-&gt;MaxNumSwathY * p-&gt;SwathHeightY / (s-&gt;LinesToRequestPrefetchPixelData - (p-&gt;VInitPreFillY - 3.0) / 2.0));</div><div class='ctx'> 				} else {</div><div class='ctx'> 					s-&gt;NoTimeToPrefetch = true;</div><div class='del'>-					dml2_printf("DML::%s: No time to prefetch!. LinesToRequestPrefetchPixelData=%f VinitPreFillY=%u\n", __func__, s-&gt;LinesToRequestPrefetchPixelData, p-&gt;VInitPreFillY);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: No time to prefetch!. LinesToRequestPrefetchPixelData=%f VinitPreFillY=%u\n", __func__, s-&gt;LinesToRequestPrefetchPixelData, p-&gt;VInitPreFillY);</div><div class='ctx'> 					*p-&gt;VRatioPrefetchY = 0;</div><div class='ctx'> 				}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: VRatioPrefetchY = %f\n", __func__, *p-&gt;VRatioPrefetchY);</div><div class='del'>-				dml2_printf("DML::%s: PrefetchSourceLinesY = %f\n", __func__, p-&gt;PrefetchSourceLinesY);</div><div class='del'>-				dml2_printf("DML::%s: MaxNumSwathY = %u\n", __func__, p-&gt;MaxNumSwathY);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: VRatioPrefetchY = %f\n", __func__, *p-&gt;VRatioPrefetchY);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: PrefetchSourceLinesY = %f\n", __func__, p-&gt;PrefetchSourceLinesY);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: MaxNumSwathY = %u\n", __func__, p-&gt;MaxNumSwathY);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -5843,22 +5777,22 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			*p-&gt;VRatioPrefetchC = math_max2(*p-&gt;VRatioPrefetchC, 1.0);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: VRatioPrefetchC = %f\n", __func__, *p-&gt;VRatioPrefetchC);</div><div class='del'>-			dml2_printf("DML::%s: SwathHeightC = %u\n", __func__, p-&gt;SwathHeightC);</div><div class='del'>-			dml2_printf("DML::%s: VInitPreFillC = %u\n", __func__, p-&gt;VInitPreFillC);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: VRatioPrefetchC = %f\n", __func__, *p-&gt;VRatioPrefetchC);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: SwathHeightC = %u\n", __func__, p-&gt;SwathHeightC);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: VInitPreFillC = %u\n", __func__, p-&gt;VInitPreFillC);</div><div class='ctx'> #endif</div><div class='ctx'> 			if ((p-&gt;SwathHeightC &gt; 4) &amp;&amp; (p-&gt;VInitPreFillC &gt; 3)) {</div><div class='ctx'> 				if (s-&gt;LinesToRequestPrefetchPixelData &gt; (p-&gt;VInitPreFillC - 3.0) / 2.0) {</div><div class='ctx'> 					*p-&gt;VRatioPrefetchC = math_max2(*p-&gt;VRatioPrefetchC, (double)p-&gt;MaxNumSwathC * p-&gt;SwathHeightC / (s-&gt;LinesToRequestPrefetchPixelData - (p-&gt;VInitPreFillC - 3.0) / 2.0));</div><div class='ctx'> 				} else {</div><div class='ctx'> 					s-&gt;NoTimeToPrefetch = true;</div><div class='del'>-					dml2_printf("DML::%s: No time to prefetch!. LinesToRequestPrefetchPixelData=%f VInitPreFillC=%u\n", __func__, s-&gt;LinesToRequestPrefetchPixelData, p-&gt;VInitPreFillC);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: No time to prefetch!. LinesToRequestPrefetchPixelData=%f VInitPreFillC=%u\n", __func__, s-&gt;LinesToRequestPrefetchPixelData, p-&gt;VInitPreFillC);</div><div class='ctx'> 					*p-&gt;VRatioPrefetchC = 0;</div><div class='ctx'> 				}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: VRatioPrefetchC = %f\n", __func__, *p-&gt;VRatioPrefetchC);</div><div class='del'>-				dml2_printf("DML::%s: PrefetchSourceLinesC = %f\n", __func__, p-&gt;PrefetchSourceLinesC);</div><div class='del'>-				dml2_printf("DML::%s: MaxNumSwathC = %u\n", __func__, p-&gt;MaxNumSwathC);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: VRatioPrefetchC = %f\n", __func__, *p-&gt;VRatioPrefetchC);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: PrefetchSourceLinesC = %f\n", __func__, p-&gt;PrefetchSourceLinesC);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: MaxNumSwathC = %u\n", __func__, p-&gt;MaxNumSwathC);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -5866,36 +5800,34 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			*p-&gt;RequiredPrefetchPixelDataBWChroma = (double)p-&gt;PrefetchSourceLinesC / s-&gt;LinesToRequestPrefetchPixelData * p-&gt;myPipe-&gt;BytePerPixelC * p-&gt;swath_width_chroma_ub / s-&gt;LineTime;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: BytePerPixelY = %u\n", __func__, p-&gt;myPipe-&gt;BytePerPixelY);</div><div class='del'>-			dml2_printf("DML::%s: swath_width_luma_ub = %u\n", __func__, p-&gt;swath_width_luma_ub);</div><div class='del'>-			dml2_printf("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='del'>-			dml2_printf("DML::%s: RequiredPrefetchPixelDataBWLuma = %f\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWLuma);</div><div class='del'>-			dml2_printf("DML::%s: RequiredPrefetchPixelDataBWChroma = %f\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWChroma);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: BytePerPixelY = %u\n", __func__, p-&gt;myPipe-&gt;BytePerPixelY);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: swath_width_luma_ub = %u\n", __func__, p-&gt;swath_width_luma_ub);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: RequiredPrefetchPixelDataBWLuma = %f\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWLuma);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: RequiredPrefetchPixelDataBWChroma = %f\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWChroma);</div><div class='ctx'> #endif</div><div class='ctx'> 		} else {</div><div class='ctx'> 			s-&gt;NoTimeToPrefetch = true;</div><div class='del'>-			dml2_printf("DML::%s: No time to prefetch!, LinesToRequestPrefetchPixelData: %f, should be &gt;= %d\n", __func__, s-&gt;LinesToRequestPrefetchPixelData, min_lsw_required);</div><div class='del'>-			dml2_printf("DML::%s: No time to prefetch!, prefetch_bw_equ: %f, should be &gt; 0\n", __func__, s-&gt;prefetch_bw_equ);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: No time to prefetch!, LinesToRequestPrefetchPixelData: %f, should be &gt;= %d\n", __func__, s-&gt;LinesToRequestPrefetchPixelData, min_lsw_required);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: No time to prefetch!, prefetch_bw_equ: %f, should be &gt; 0\n", __func__, s-&gt;prefetch_bw_equ);</div><div class='ctx'> 			*p-&gt;VRatioPrefetchY = 0;</div><div class='ctx'> 			*p-&gt;VRatioPrefetchC = 0;</div><div class='ctx'> 			*p-&gt;RequiredPrefetchPixelDataBWLuma = 0;</div><div class='ctx'> 			*p-&gt;RequiredPrefetchPixelDataBWChroma = 0;</div><div class='ctx'> 		}</div><div class='del'>-		dml2_printf("DML: Tpre: %fus - sum of time to request 2 x data pte, swaths\n", (double)s-&gt;LinesToRequestPrefetchPixelData * s-&gt;LineTime + 2.0 * s-&gt;TimeForFetchingRowInVBlank + s-&gt;TimeForFetchingVM);</div><div class='del'>-		dml2_printf("DML: Tvm: %fus - time to fetch vm\n", s-&gt;TimeForFetchingVM);</div><div class='del'>-		dml2_printf("DML: Tr0: %fus - time to fetch first row of data pagetables\n", s-&gt;TimeForFetchingRowInVBlank);</div><div class='del'>-		dml2_printf("DML: Tsw: %fus = time to fetch enough pixel data and cursor data to feed the scalers init position and detile\n", (double)s-&gt;LinesToRequestPrefetchPixelData * s-&gt;LineTime);</div><div class='del'>-		dml2_printf("DML: To: %fus - time for propagation from scaler to optc\n", (*p-&gt;DSTYAfterScaler + ((double)(*p-&gt;DSTXAfterScaler) / (double)p-&gt;myPipe-&gt;HTotal)) * s-&gt;LineTime);</div><div class='del'>-		dml2_printf("DML: Tvstartup - TSetup - Tcalc - TWait - Tpre - To &gt; 0\n");</div><div class='del'>-		dml2_printf("DML: Tslack(pre): %fus - time left over in schedule\n", p-&gt;VStartup * s-&gt;LineTime - s-&gt;TimeForFetchingVM - 2 * s-&gt;TimeForFetchingRowInVBlank - (*p-&gt;DSTYAfterScaler + ((double)(*p-&gt;DSTXAfterScaler) / (double)p-&gt;myPipe-&gt;HTotal)) * s-&gt;LineTime - p-&gt;TWait - p-&gt;TCalc - *p-&gt;TSetup);</div><div class='del'>-		dml2_printf("DML: row_bytes = dpte_row_bytes (per_pipe) = PixelPTEBytesPerRow = : %u\n", p-&gt;PixelPTEBytesPerRow);</div><div class='add'>+		DML_LOG_VERBOSE("DML: Tpre: %fus - sum of time to request 2 x data pte, swaths\n", (double)s-&gt;LinesToRequestPrefetchPixelData * s-&gt;LineTime + 2.0 * s-&gt;TimeForFetchingRowInVBlank + s-&gt;TimeForFetchingVM);</div><div class='add'>+		DML_LOG_VERBOSE("DML: Tvm: %fus - time to fetch vm\n", s-&gt;TimeForFetchingVM);</div><div class='add'>+		DML_LOG_VERBOSE("DML: Tr0: %fus - time to fetch first row of data pagetables\n", s-&gt;TimeForFetchingRowInVBlank);</div><div class='add'>+		DML_LOG_VERBOSE("DML: Tsw: %fus = time to fetch enough pixel data and cursor data to feed the scalers init position and detile\n", (double)s-&gt;LinesToRequestPrefetchPixelData * s-&gt;LineTime);</div><div class='add'>+		DML_LOG_VERBOSE("DML: To: %fus - time for propagation from scaler to optc\n", (*p-&gt;DSTYAfterScaler + ((double)(*p-&gt;DSTXAfterScaler) / (double)p-&gt;myPipe-&gt;HTotal)) * s-&gt;LineTime);</div><div class='add'>+		DML_LOG_VERBOSE("DML: Tvstartup - TSetup - Tcalc - TWait - Tpre - To &gt; 0\n");</div><div class='add'>+		DML_LOG_VERBOSE("DML: Tslack(pre): %fus - time left over in schedule\n", p-&gt;VStartup * s-&gt;LineTime - s-&gt;TimeForFetchingVM - 2 * s-&gt;TimeForFetchingRowInVBlank - (*p-&gt;DSTYAfterScaler + ((double)(*p-&gt;DSTXAfterScaler) / (double)p-&gt;myPipe-&gt;HTotal)) * s-&gt;LineTime - p-&gt;TWait - p-&gt;TCalc - *p-&gt;TSetup);</div><div class='add'>+		DML_LOG_VERBOSE("DML: row_bytes = dpte_row_bytes (per_pipe) = PixelPTEBytesPerRow = : %u\n", p-&gt;PixelPTEBytesPerRow);</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='del'>-		dml2_printf("DML::%s: No time to prefetch! dst_y_prefetch_equ = %f (should be &gt; 1)\n", __func__, s-&gt;dst_y_prefetch_equ);</div><div class='del'>-		dml2_printf("DML::%s: No time to prefetch! min_Lsw_equ_ok = %d, Tpre_rounded (%f) should be &gt;= Tvm_trips_rounded (%f) + 2.0*Tr0_trips_rounded (%f) + min_Tsw_equ (%f)\n",</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: No time to prefetch! dst_y_prefetch_equ = %f (should be &gt; 1)\n", __func__, s-&gt;dst_y_prefetch_equ);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: No time to prefetch! min_Lsw_equ_ok = %d, Tpre_rounded (%f) should be &gt;= Tvm_trips_rounded (%f) + 2.0*Tr0_trips_rounded (%f) + min_Tsw_equ (%f)\n",</div><div class='ctx'> 				__func__, min_Lsw_equ_ok, *p-&gt;Tpre_rounded, s-&gt;Tvm_trips_rounded, 2.0*s-&gt;Tr0_trips_rounded, s-&gt;min_Lsw_equ*s-&gt;LineTime);</div><div class='del'>-		dml2_printf("DML::%s: No time to prefetch! min_Lsw_equ_ok = %d, Tpre_rounded+Tvm_trips_rounded+2.0*Tr0_trips_rounded+min_Tsw_equ (%f) should be &gt; \n",</div><div class='del'>-				__func__, tpre_gt_req_latency, (s-&gt;min_Lsw_equ*s-&gt;LineTime + s-&gt;Tvm_trips_rounded + 2.0*s-&gt;Tr0_trips_rounded), p-&gt;Turg, s-&gt;trip_to_mem, p-&gt;ExtraLatencyPrefetch);</div><div class='ctx'> 		s-&gt;NoTimeToPrefetch = true;</div><div class='ctx'> 		s-&gt;TimeForFetchingVM = 0;</div><div class='ctx'> 		s-&gt;TimeForFetchingRowInVBlank = 0;</div><div class='hunk'>@@ -5916,18 +5848,18 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			prefetch_vm_bw = 0;</div><div class='ctx'> 		} else if (*p-&gt;dst_y_per_vm_vblank &gt; 0) {</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, p-&gt;HostVMInefficiencyFactor);</div><div class='del'>-			dml2_printf("DML::%s: dst_y_per_vm_vblank = %f\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='del'>-			dml2_printf("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, p-&gt;HostVMInefficiencyFactor);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: dst_y_per_vm_vblank = %f\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: LineTime = %f\n", __func__, s-&gt;LineTime);</div><div class='ctx'> #endif</div><div class='ctx'> 			prefetch_vm_bw = vm_bytes * p-&gt;HostVMInefficiencyFactor / (*p-&gt;dst_y_per_vm_vblank * s-&gt;LineTime);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: prefetch_vm_bw = %f\n", __func__, prefetch_vm_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: prefetch_vm_bw = %f\n", __func__, prefetch_vm_bw);</div><div class='ctx'> #endif</div><div class='ctx'> 		} else {</div><div class='ctx'> 			prefetch_vm_bw = 0;</div><div class='ctx'> 			s-&gt;NoTimeToPrefetch = true;</div><div class='del'>-			dml2_printf("DML::%s: No time to prefetch!. dst_y_per_vm_vblank=%f (should be &gt; 0)\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: No time to prefetch!. dst_y_per_vm_vblank=%f (should be &gt; 0)\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (p-&gt;PixelPTEBytesPerRow == 0 &amp;&amp; tdlut_row_bytes == 0) {</div><div class='hunk'>@@ -5936,14 +5868,14 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 			prefetch_row_bw = (p-&gt;PixelPTEBytesPerRow * p-&gt;HostVMInefficiencyFactor + tdlut_row_bytes) / (*p-&gt;dst_y_per_row_vblank * s-&gt;LineTime);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, p-&gt;PixelPTEBytesPerRow);</div><div class='del'>-			dml2_printf("DML::%s: dst_y_per_row_vblank = %f\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='del'>-			dml2_printf("DML::%s: prefetch_row_bw = %f\n", __func__, prefetch_row_bw);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, p-&gt;PixelPTEBytesPerRow);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: dst_y_per_row_vblank = %f\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: prefetch_row_bw = %f\n", __func__, prefetch_row_bw);</div><div class='ctx'> #endif</div><div class='ctx'> 		} else {</div><div class='ctx'> 			prefetch_row_bw = 0;</div><div class='ctx'> 			s-&gt;NoTimeToPrefetch = true;</div><div class='del'>-			dml2_printf("DML::%s: No time to prefetch!. dst_y_per_row_vblank=%f (should be &gt; 0)\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: No time to prefetch!. dst_y_per_row_vblank=%f (should be &gt; 0)\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		*p-&gt;prefetch_vmrow_bw = math_max2(prefetch_vm_bw, prefetch_row_bw);</div><div class='hunk'>@@ -5963,12 +5895,12 @@ static bool CalculatePrefetchSchedule(struct dml2_core_internal_scratch *scratch</div><div class='ctx'> 		*p-&gt;prefetch_vmrow_bw = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: dst_y_per_vm_vblank = %f (final)\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='del'>-	dml2_printf("DML::%s: dst_y_per_row_vblank = %f (final)\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='del'>-	dml2_printf("DML::%s: prefetch_vmrow_bw = %f (final)\n", __func__, *p-&gt;prefetch_vmrow_bw);</div><div class='del'>-	dml2_printf("DML::%s: RequiredPrefetchPixelDataBWLuma = %f (final)\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWLuma);</div><div class='del'>-	dml2_printf("DML::%s: RequiredPrefetchPixelDataBWChroma = %f (final)\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWChroma);</div><div class='del'>-	dml2_printf("DML::%s: NoTimeToPrefetch=%d\n", __func__, s-&gt;NoTimeToPrefetch);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dst_y_per_vm_vblank = %f (final)\n", __func__, *p-&gt;dst_y_per_vm_vblank);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dst_y_per_row_vblank = %f (final)\n", __func__, *p-&gt;dst_y_per_row_vblank);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: prefetch_vmrow_bw = %f (final)\n", __func__, *p-&gt;prefetch_vmrow_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: RequiredPrefetchPixelDataBWLuma = %f (final)\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: RequiredPrefetchPixelDataBWChroma = %f (final)\n", __func__, *p-&gt;RequiredPrefetchPixelDataBWChroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NoTimeToPrefetch=%d\n", __func__, s-&gt;NoTimeToPrefetch);</div><div class='ctx'> </div><div class='ctx'> 	return s-&gt;NoTimeToPrefetch;</div><div class='ctx'> }</div><div class='hunk'>@@ -6005,7 +5937,7 @@ static unsigned int find_max_impact_plane(unsigned int this_plane_idx, unsigned</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (max_idx &lt;= 0) {</div><div class='del'>-		DML2_ASSERT(max_idx &gt;= 0);</div><div class='add'>+		DML_ASSERT(max_idx &gt;= 0);</div><div class='ctx'> 		max_idx = this_plane_idx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6037,12 +5969,12 @@ static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core</div><div class='ctx'> 	// worst case if the rob and cdb is fully hogged</div><div class='ctx'> 	s-&gt;max_Trpd_dcfclk_cycles = (unsigned int) math_ceil2((p-&gt;rob_buffer_size_kbytes*1024 + p-&gt;compressed_buffer_size_kbytes*DML_MAX_COMPRESSION_RATIO*1024)/64.0, 1.0);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: num_active_planes = %d\n", __func__, p-&gt;num_active_planes);</div><div class='del'>-	dml2_printf("DML::%s: rob_buffer_size_kbytes = %d\n", __func__, p-&gt;rob_buffer_size_kbytes);</div><div class='del'>-	dml2_printf("DML::%s: compressed_buffer_size_kbytes = %d\n", __func__, p-&gt;compressed_buffer_size_kbytes);</div><div class='del'>-	dml2_printf("DML::%s: estimated_urg_bandwidth_required_mbps = %f\n", __func__, p-&gt;estimated_urg_bandwidth_required_mbps);</div><div class='del'>-	dml2_printf("DML::%s: estimated_dcfclk_mhz = %f\n", __func__, p-&gt;estimated_dcfclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: max_Trpd_dcfclk_cycles = %u\n", __func__, s-&gt;max_Trpd_dcfclk_cycles);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_active_planes = %d\n", __func__, p-&gt;num_active_planes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: rob_buffer_size_kbytes = %d\n", __func__, p-&gt;rob_buffer_size_kbytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: compressed_buffer_size_kbytes = %d\n", __func__, p-&gt;compressed_buffer_size_kbytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: estimated_urg_bandwidth_required_mbps = %f\n", __func__, p-&gt;estimated_urg_bandwidth_required_mbps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: estimated_dcfclk_mhz = %f\n", __func__, p-&gt;estimated_dcfclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_Trpd_dcfclk_cycles = %u\n", __func__, s-&gt;max_Trpd_dcfclk_cycles);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	// calculate the return impact from each plane, request is 256B per dcfclk</div><div class='hunk'>@@ -6063,12 +5995,12 @@ static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core</div><div class='ctx'> 		s-&gt;burst_bytes_to_fill_det += (unsigned int) (math_floor2(p-&gt;lb_source_lines_l[i] / p-&gt;swath_height_l[i], 1) * s-&gt;src_swath_bytes_l[i]);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: i=%u pixel_format = %d\n", __func__, i, p-&gt;pixel_format[i]);</div><div class='del'>-		dml2_printf("DML::%s: i=%u chunk_bytes_l = %d\n", __func__, i, p-&gt;chunk_bytes_l);</div><div class='del'>-		dml2_printf("DML::%s: i=%u lb_source_lines_l = %d\n", __func__, i, p-&gt;lb_source_lines_l[i]);</div><div class='del'>-		dml2_printf("DML::%s: i=%u src_detile_buf_size_bytes_l=%d\n", __func__, i, s-&gt;src_detile_buf_size_bytes_l[i]);</div><div class='del'>-		dml2_printf("DML::%s: i=%u src_swath_bytes_l=%d\n", __func__, i, s-&gt;src_swath_bytes_l[i]);</div><div class='del'>-		dml2_printf("DML::%s: i=%u burst_bytes_to_fill_det=%d (luma)\n", __func__, i, s-&gt;burst_bytes_to_fill_det);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u pixel_format = %d\n", __func__, i, p-&gt;pixel_format[i]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u chunk_bytes_l = %d\n", __func__, i, p-&gt;chunk_bytes_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u lb_source_lines_l = %d\n", __func__, i, p-&gt;lb_source_lines_l[i]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u src_detile_buf_size_bytes_l=%d\n", __func__, i, s-&gt;src_detile_buf_size_bytes_l[i]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u src_swath_bytes_l=%d\n", __func__, i, s-&gt;src_swath_bytes_l[i]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u burst_bytes_to_fill_det=%d (luma)\n", __func__, i, s-&gt;burst_bytes_to_fill_det);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		if (s-&gt;src_swath_bytes_c[i] &gt; 0) { // dual_plane</div><div class='hunk'>@@ -6079,10 +6011,10 @@ static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: i=%u chunk_bytes_c = %d\n", __func__, i, p-&gt;chunk_bytes_c);</div><div class='del'>-			dml2_printf("DML::%s: i=%u lb_source_lines_c = %d\n", __func__, i, p-&gt;lb_source_lines_c[i]);</div><div class='del'>-			dml2_printf("DML::%s: i=%u src_detile_buf_size_bytes_c=%d\n", __func__, i, s-&gt;src_detile_buf_size_bytes_c[i]);</div><div class='del'>-			dml2_printf("DML::%s: i=%u src_swath_bytes_c=%d\n", __func__, i, s-&gt;src_swath_bytes_c[i]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: i=%u chunk_bytes_c = %d\n", __func__, i, p-&gt;chunk_bytes_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: i=%u lb_source_lines_c = %d\n", __func__, i, p-&gt;lb_source_lines_c[i]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: i=%u src_detile_buf_size_bytes_c=%d\n", __func__, i, s-&gt;src_detile_buf_size_bytes_c[i]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: i=%u src_swath_bytes_c=%d\n", __func__, i, s-&gt;src_swath_bytes_c[i]);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -6090,9 +6022,9 @@ static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core</div><div class='ctx'> 		s-&gt;accumulated_return_path_dcfclk_cycles[i] = (unsigned int) math_ceil2(((DML_MAX_COMPRESSION_RATIO-1) * 64 * p-&gt;estimated_dcfclk_mhz) * s-&gt;time_to_fill_det_us / 64.0, 1.0); //for 64B per DCFClk</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: i=%u burst_bytes_to_fill_det=%d\n", __func__, i, s-&gt;burst_bytes_to_fill_det);</div><div class='del'>-		dml2_printf("DML::%s: i=%u time_to_fill_det_us=%f\n", __func__, i, s-&gt;time_to_fill_det_us);</div><div class='del'>-		dml2_printf("DML::%s: i=%u accumulated_return_path_dcfclk_cycles=%u\n", __func__, i, s-&gt;accumulated_return_path_dcfclk_cycles[i]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u burst_bytes_to_fill_det=%d\n", __func__, i, s-&gt;burst_bytes_to_fill_det);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u time_to_fill_det_us=%f\n", __func__, i, s-&gt;time_to_fill_det_us);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u accumulated_return_path_dcfclk_cycles=%u\n", __func__, i, s-&gt;accumulated_return_path_dcfclk_cycles[i]);</div><div class='ctx'> #endif</div><div class='ctx'> 		// clamping to worst case delay which is one which occupy the full rob+cdb</div><div class='ctx'> 		if (s-&gt;accumulated_return_path_dcfclk_cycles[i] &gt; s-&gt;max_Trpd_dcfclk_cycles)</div><div class='hunk'>@@ -6109,7 +6041,7 @@ static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core</div><div class='ctx'> 		p-&gt;impacted_dst_y_pre[i] = math_ceil2(p-&gt;impacted_dst_y_pre[i] / p-&gt;line_time[i], 0.25);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: i=%u impacted_Tpre=%f (k=%u)\n", __func__, i, p-&gt;impacted_dst_y_pre[i], k);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: i=%u impacted_Tpre=%f (k=%u)\n", __func__, i, p-&gt;impacted_dst_y_pre[i], k);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6120,8 +6052,8 @@ static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core</div><div class='ctx'> 				*p-&gt;recalc_prefetch_schedule = 1;</div><div class='ctx'> 			}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: i=%u Tpre_rounded=%f\n", __func__, i, p-&gt;Tpre_rounded[i]);</div><div class='del'>-			dml2_printf("DML::%s: i=%u Tpre_oto=%f\n", __func__, i, p-&gt;Tpre_oto[i]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: i=%u Tpre_rounded=%f\n", __func__, i, p-&gt;Tpre_rounded[i]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: i=%u Tpre_oto=%f\n", __func__, i, p-&gt;Tpre_oto[i]);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -6131,8 +6063,8 @@ static noinline_for_stack bool CheckGlobalPrefetchAdmissibility(struct dml2_core</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: prefetch_global_check_passed=%u\n", __func__, s-&gt;prefetch_global_check_passed);</div><div class='del'>-	dml2_printf("DML::%s: recalc_prefetch_schedule=%u\n", __func__, *p-&gt;recalc_prefetch_schedule);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: prefetch_global_check_passed=%u\n", __func__, s-&gt;prefetch_global_check_passed);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: recalc_prefetch_schedule=%u\n", __func__, *p-&gt;recalc_prefetch_schedule);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return s-&gt;prefetch_global_check_passed;</div><div class='hunk'>@@ -6150,8 +6082,8 @@ static void calculate_peak_bandwidth_required(</div><div class='ctx'> 	memset(l, 0, sizeof(struct dml2_core_shared_calculate_peak_bandwidth_required_locals));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: inc_flip_bw = %d\n", __func__, p-&gt;inc_flip_bw);</div><div class='del'>-	dml2_printf("DML::%s: NumberOfActiveSurfaces = %d\n", __func__, p-&gt;num_active_planes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: inc_flip_bw = %d\n", __func__, p-&gt;inc_flip_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NumberOfActiveSurfaces = %d\n", __func__, p-&gt;num_active_planes);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int k = 0; k &lt; p-&gt;num_active_planes; ++k) {</div><div class='hunk'>@@ -6347,12 +6279,12 @@ static void calculate_peak_bandwidth_required(</div><div class='ctx'> 				p-&gt;surface_peak_required_bw[m][n]);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: urg_vactive_bandwidth_required%s[%s][%s]=%f\n", __func__, (p-&gt;inc_flip_bw ? "_flip" : ""), dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;urg_vactive_bandwidth_required[m][n]);</div><div class='del'>-			dml2_printf("DML::%s: urg_bandwidth_required%s[%s][%s]=%f\n", __func__, (p-&gt;inc_flip_bw ? "_flip" : ""), dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;urg_bandwidth_required[m][n]);</div><div class='del'>-			dml2_printf("DML::%s: urg_bandwidth_required_qual[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;urg_bandwidth_required[m][n]);</div><div class='del'>-			dml2_printf("DML::%s: non_urg_bandwidth_required%s[%s][%s]=%f\n", __func__, (p-&gt;inc_flip_bw ? "_flip" : ""), dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;non_urg_bandwidth_required[m][n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: urg_vactive_bandwidth_required%s[%s][%s]=%f\n", __func__, (p-&gt;inc_flip_bw ? "_flip" : ""), dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;urg_vactive_bandwidth_required[m][n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: urg_bandwidth_required%s[%s][%s]=%f\n", __func__, (p-&gt;inc_flip_bw ? "_flip" : ""), dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;urg_bandwidth_required[m][n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: urg_bandwidth_required_qual[%s][%s]=%f\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;urg_bandwidth_required[m][n]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: non_urg_bandwidth_required%s[%s][%s]=%f\n", __func__, (p-&gt;inc_flip_bw ? "_flip" : ""), dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n), p-&gt;non_urg_bandwidth_required[m][n]);</div><div class='ctx'> #endif</div><div class='del'>-			DML2_ASSERT(p-&gt;urg_bandwidth_required[m][n] &gt;= p-&gt;non_urg_bandwidth_required[m][n]);</div><div class='add'>+			DML_ASSERT(p-&gt;urg_bandwidth_required[m][n] &gt;= p-&gt;non_urg_bandwidth_required[m][n]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -6414,18 +6346,18 @@ static void check_urgent_bandwidth_support(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bandwidth_nom_sdp = %f\n", __func__, frac_urg_bandwidth_nom_sdp);</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bandwidth_nom_dram = %f\n", __func__, frac_urg_bandwidth_nom_dram);</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bandwidth_nom = %f\n", __func__, *frac_urg_bandwidth_nom);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bandwidth_nom_sdp = %f\n", __func__, frac_urg_bandwidth_nom_sdp);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bandwidth_nom_dram = %f\n", __func__, frac_urg_bandwidth_nom_dram);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bandwidth_nom = %f\n", __func__, *frac_urg_bandwidth_nom);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bandwidth_mall_sdp = %f\n", __func__, frac_urg_bandwidth_mall_sdp);</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bandwidth_mall_dram = %f\n", __func__, frac_urg_bandwidth_mall_dram);</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bandwidth_mall = %f\n", __func__, *frac_urg_bandwidth_mall);</div><div class='del'>-	dml2_printf("DML::%s: bandwidth_support_ok = %d\n", __func__, *bandwidth_support_ok);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bandwidth_mall_sdp = %f\n", __func__, frac_urg_bandwidth_mall_sdp);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bandwidth_mall_dram = %f\n", __func__, frac_urg_bandwidth_mall_dram);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bandwidth_mall = %f\n", __func__, *frac_urg_bandwidth_mall);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: bandwidth_support_ok = %d\n", __func__, *bandwidth_support_ok);</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int m = 0; m &lt; dml2_core_internal_soc_state_max; m++) {</div><div class='ctx'> 		for (unsigned int n = 0; n &lt; dml2_core_internal_bw_max; n++) {</div><div class='del'>-			dml2_printf("DML::%s: state:%s bw_type:%s urg_bandwidth_available=%f %s urg_bandwidth_required=%f\n",</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: state:%s bw_type:%s urg_bandwidth_available=%f %s urg_bandwidth_required=%f\n",</div><div class='ctx'> 			__func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n),</div><div class='ctx'> 			urg_bandwidth_available[m][n], (urg_bandwidth_available[m][n] &lt; urg_bandwidth_required[m][n]) ? "&lt;" : "&gt;=", urg_bandwidth_required[m][n]);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -6446,14 +6378,14 @@ static double get_bandwidth_available_for_immediate_flip(enum dml2_core_internal</div><div class='ctx'> 	flip_bw_available_mbps = flip_bw_available_sdp_mbps &lt; flip_bw_available_dram_mbps ? flip_bw_available_sdp_mbps : flip_bw_available_dram_mbps;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: eval_state = %s\n", __func__, dml2_core_internal_soc_state_type_str(eval_state));</div><div class='del'>-	dml2_printf("DML::%s: urg_bandwidth_available_sdp_mbps = %f\n", __func__, urg_bandwidth_available[eval_state][dml2_core_internal_bw_sdp]);</div><div class='del'>-	dml2_printf("DML::%s: urg_bandwidth_available_dram_mbps = %f\n", __func__, urg_bandwidth_available[eval_state][dml2_core_internal_bw_dram]);</div><div class='del'>-	dml2_printf("DML::%s: urg_bandwidth_required_sdp_mbps = %f\n", __func__, urg_bandwidth_required[eval_state][dml2_core_internal_bw_sdp]);</div><div class='del'>-	dml2_printf("DML::%s: urg_bandwidth_required_dram_mbps = %f\n", __func__, urg_bandwidth_required[eval_state][dml2_core_internal_bw_dram]);</div><div class='del'>-	dml2_printf("DML::%s: flip_bw_available_sdp_mbps = %f\n", __func__, flip_bw_available_sdp_mbps);</div><div class='del'>-	dml2_printf("DML::%s: flip_bw_available_dram_mbps = %f\n", __func__, flip_bw_available_dram_mbps);</div><div class='del'>-	dml2_printf("DML::%s: flip_bw_available_mbps = %f\n", __func__, flip_bw_available_mbps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: eval_state = %s\n", __func__, dml2_core_internal_soc_state_type_str(eval_state));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: urg_bandwidth_available_sdp_mbps = %f\n", __func__, urg_bandwidth_available[eval_state][dml2_core_internal_bw_sdp]);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: urg_bandwidth_available_dram_mbps = %f\n", __func__, urg_bandwidth_available[eval_state][dml2_core_internal_bw_dram]);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: urg_bandwidth_required_sdp_mbps = %f\n", __func__, urg_bandwidth_required[eval_state][dml2_core_internal_bw_sdp]);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: urg_bandwidth_required_dram_mbps = %f\n", __func__, urg_bandwidth_required[eval_state][dml2_core_internal_bw_dram]);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: flip_bw_available_sdp_mbps = %f\n", __func__, flip_bw_available_sdp_mbps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: flip_bw_available_dram_mbps = %f\n", __func__, flip_bw_available_dram_mbps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: flip_bw_available_mbps = %f\n", __func__, flip_bw_available_mbps);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return flip_bw_available_mbps;</div><div class='hunk'>@@ -6478,28 +6410,28 @@ static void calculate_immediate_flip_bandwidth_support(</div><div class='ctx'> 		*flip_bandwidth_support_ok &amp;= urg_bandwidth_available[eval_state][n] &gt;= urg_bandwidth_required_flip[eval_state][n];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: n = %s\n", __func__, dml2_core_internal_bw_type_str(n));</div><div class='del'>-		dml2_printf("DML::%s: urg_bandwidth_available = %f\n", __func__, urg_bandwidth_available[eval_state][n]);</div><div class='del'>-		dml2_printf("DML::%s: non_urg_bandwidth_required_flip = %f\n", __func__, non_urg_bandwidth_required_flip[eval_state][n]);</div><div class='del'>-		dml2_printf("DML::%s: urg_bandwidth_required_flip = %f\n", __func__, urg_bandwidth_required_flip[eval_state][n]);</div><div class='del'>-		dml2_printf("DML::%s: flip_bandwidth_support_ok = %d\n", __func__, *flip_bandwidth_support_ok);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: n = %s\n", __func__, dml2_core_internal_bw_type_str(n));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: urg_bandwidth_available = %f\n", __func__, urg_bandwidth_available[eval_state][n]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: non_urg_bandwidth_required_flip = %f\n", __func__, non_urg_bandwidth_required_flip[eval_state][n]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: urg_bandwidth_required_flip = %f\n", __func__, urg_bandwidth_required_flip[eval_state][n]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: flip_bandwidth_support_ok = %d\n", __func__, *flip_bandwidth_support_ok);</div><div class='ctx'> #endif</div><div class='del'>-		DML2_ASSERT(urg_bandwidth_required_flip[eval_state][n] &gt;= non_urg_bandwidth_required_flip[eval_state][n]);</div><div class='add'>+		DML_ASSERT(urg_bandwidth_required_flip[eval_state][n] &gt;= non_urg_bandwidth_required_flip[eval_state][n]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*frac_urg_bandwidth_flip = (frac_urg_bw_flip_sdp &gt; frac_urg_bw_flip_dram) ? frac_urg_bw_flip_sdp : frac_urg_bw_flip_dram;</div><div class='ctx'> 	*flip_bandwidth_support_ok &amp;= (*frac_urg_bandwidth_flip &lt;= 1.0);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: eval_state = %s\n", __func__, dml2_core_internal_soc_state_type_str(eval_state));</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bw_flip_sdp = %f\n", __func__, frac_urg_bw_flip_sdp);</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bw_flip_dram = %f\n", __func__, frac_urg_bw_flip_dram);</div><div class='del'>-	dml2_printf("DML::%s: frac_urg_bandwidth_flip = %f\n", __func__, *frac_urg_bandwidth_flip);</div><div class='del'>-	dml2_printf("DML::%s: flip_bandwidth_support_ok = %d\n", __func__, *flip_bandwidth_support_ok);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: eval_state = %s\n", __func__, dml2_core_internal_soc_state_type_str(eval_state));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bw_flip_sdp = %f\n", __func__, frac_urg_bw_flip_sdp);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bw_flip_dram = %f\n", __func__, frac_urg_bw_flip_dram);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: frac_urg_bandwidth_flip = %f\n", __func__, *frac_urg_bandwidth_flip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: flip_bandwidth_support_ok = %d\n", __func__, *flip_bandwidth_support_ok);</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int m = 0; m &lt; dml2_core_internal_soc_state_max; m++) {</div><div class='ctx'> 		for (unsigned int n = 0; n &lt; dml2_core_internal_bw_max; n++) {</div><div class='del'>-			dml2_printf("DML::%s: state:%s bw_type:%s, urg_bandwidth_available=%f %s urg_bandwidth_required=%f\n",</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: state:%s bw_type:%s, urg_bandwidth_available=%f %s urg_bandwidth_required=%f\n",</div><div class='ctx'> 			__func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n),</div><div class='ctx'> 			urg_bandwidth_available[m][n], (urg_bandwidth_available[m][n] &lt; urg_bandwidth_required_flip[m][n]) ? "&lt;" : "&gt;=", urg_bandwidth_required_flip[m][n]);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -6549,27 +6481,27 @@ static void CalculateFlipSchedule(</div><div class='ctx'> 	l-&gt;dpte_row_bytes = DPTEBytesPerRow;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: GPUVMEnable = %u\n", __func__, GPUVMEnable);</div><div class='del'>-	dml2_printf("DML::%s: ip.max_flip_time_us = %d\n", __func__, max_flip_time_us);</div><div class='del'>-	dml2_printf("DML::%s: ip.max_flip_time_lines = %d\n", __func__, max_flip_time_lines);</div><div class='del'>-	dml2_printf("DML::%s: BandwidthAvailableForImmediateFlip = %f\n", __func__, BandwidthAvailableForImmediateFlip);</div><div class='del'>-	dml2_printf("DML::%s: TotImmediateFlipBytes = %u\n", __func__, TotImmediateFlipBytes);</div><div class='del'>-	dml2_printf("DML::%s: use_lb_flip_bw = %u\n", __func__, use_lb_flip_bw);</div><div class='del'>-	dml2_printf("DML::%s: iflip_enable = %u\n", __func__, iflip_enable);</div><div class='del'>-	dml2_printf("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, HostVMInefficiencyFactor);</div><div class='del'>-	dml2_printf("DML::%s: LineTime = %f\n", __func__, LineTime);</div><div class='del'>-	dml2_printf("DML::%s: Tno_bw_flip = %f\n", __func__, Tno_bw_flip);</div><div class='del'>-	dml2_printf("DML::%s: Tvm_trips_flip = %f\n", __func__, Tvm_trips_flip);</div><div class='del'>-	dml2_printf("DML::%s: Tr0_trips_flip = %f\n", __func__, Tr0_trips_flip);</div><div class='del'>-	dml2_printf("DML::%s: Tvm_trips_flip_rounded = %f\n", __func__, Tvm_trips_flip_rounded);</div><div class='del'>-	dml2_printf("DML::%s: Tr0_trips_flip_rounded = %f\n", __func__, Tr0_trips_flip_rounded);</div><div class='del'>-	dml2_printf("DML::%s: vm_bytes = %f\n", __func__, vm_bytes);</div><div class='del'>-	dml2_printf("DML::%s: DPTEBytesPerRow = %f\n", __func__, DPTEBytesPerRow);</div><div class='del'>-	dml2_printf("DML::%s: meta_row_bytes = %d\n", __func__, meta_row_bytes);</div><div class='del'>-	dml2_printf("DML::%s: dpte_row_bytes = %f\n", __func__, l-&gt;dpte_row_bytes);</div><div class='del'>-	dml2_printf("DML::%s: dpte_row_height = %d\n", __func__, dpte_row_height);</div><div class='del'>-	dml2_printf("DML::%s: meta_row_height = %d\n", __func__, meta_row_height);</div><div class='del'>-	dml2_printf("DML::%s: VRatio = %f\n", __func__, VRatio);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GPUVMEnable = %u\n", __func__, GPUVMEnable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ip.max_flip_time_us = %d\n", __func__, max_flip_time_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ip.max_flip_time_lines = %d\n", __func__, max_flip_time_lines);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: BandwidthAvailableForImmediateFlip = %f\n", __func__, BandwidthAvailableForImmediateFlip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotImmediateFlipBytes = %u\n", __func__, TotImmediateFlipBytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: use_lb_flip_bw = %u\n", __func__, use_lb_flip_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: iflip_enable = %u\n", __func__, iflip_enable);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, HostVMInefficiencyFactor);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: LineTime = %f\n", __func__, LineTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tno_bw_flip = %f\n", __func__, Tno_bw_flip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_trips_flip = %f\n", __func__, Tvm_trips_flip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tr0_trips_flip = %f\n", __func__, Tr0_trips_flip);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tvm_trips_flip_rounded = %f\n", __func__, Tvm_trips_flip_rounded);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Tr0_trips_flip_rounded = %f\n", __func__, Tr0_trips_flip_rounded);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vm_bytes = %f\n", __func__, vm_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DPTEBytesPerRow = %f\n", __func__, DPTEBytesPerRow);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: meta_row_bytes = %d\n", __func__, meta_row_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpte_row_bytes = %f\n", __func__, l-&gt;dpte_row_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dpte_row_height = %d\n", __func__, dpte_row_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: meta_row_height = %d\n", __func__, meta_row_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VRatio = %f\n", __func__, VRatio);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (TotImmediateFlipBytes &gt; 0 &amp;&amp; (GPUVMEnable || dcc_mrq_enable)) {</div><div class='hunk'>@@ -6596,9 +6528,9 @@ static void CalculateFlipSchedule(</div><div class='ctx'> 			l-&gt;min_row_time = l-&gt;min_row_height * LineTime / VRatio;</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: min_row_time = %f\n", __func__, l-&gt;min_row_time);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: min_row_time = %f\n", __func__, l-&gt;min_row_time);</div><div class='ctx'> #endif</div><div class='del'>-		DML2_ASSERT(l-&gt;min_row_time &gt; 0);</div><div class='add'>+		DML_ASSERT(l-&gt;min_row_time &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 		if (use_lb_flip_bw) {</div><div class='ctx'> 			// For mode check, calculation the flip bw requirement with worst case flip time</div><div class='hunk'>@@ -6619,20 +6551,20 @@ static void CalculateFlipSchedule(</div><div class='ctx'> 					l-&gt;hvm_scaled_vm_bytes / (l-&gt;max_flip_time - Tno_bw_flip - 2 * Tr0_trips_flip_rounded),</div><div class='ctx'> 					l-&gt;hvm_scaled_row_bytes / (l-&gt;max_flip_time - Tvm_trips_flip_rounded));</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: max_flip_time = %f\n", __func__, l-&gt;max_flip_time);</div><div class='del'>-				dml2_printf("DML::%s: total vm bytes (hvm ineff scaled) = %f\n", __func__, l-&gt;hvm_scaled_vm_bytes);</div><div class='del'>-				dml2_printf("DML::%s: total row bytes (%d row, hvm ineff scaled) = %f\n", __func__, l-&gt;num_rows, l-&gt;hvm_scaled_row_bytes);</div><div class='del'>-				dml2_printf("DML::%s: total vm+row bytes (hvm ineff scaled) = %f\n", __func__, l-&gt;hvm_scaled_vm_row_bytes);</div><div class='del'>-				dml2_printf("DML::%s: lb_flip_bw for vm and row = %f\n", __func__, l-&gt;hvm_scaled_vm_row_bytes / (l-&gt;max_flip_time - Tno_bw_flip));</div><div class='del'>-				dml2_printf("DML::%s: lb_flip_bw for vm = %f\n", __func__, l-&gt;hvm_scaled_vm_bytes / (l-&gt;max_flip_time - Tno_bw_flip - 2 * Tr0_trips_flip_rounded));</div><div class='del'>-				dml2_printf("DML::%s: lb_flip_bw for row = %f\n", __func__, l-&gt;hvm_scaled_row_bytes / (l-&gt;max_flip_time - Tvm_trips_flip_rounded));</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: max_flip_time = %f\n", __func__, l-&gt;max_flip_time);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: total vm bytes (hvm ineff scaled) = %f\n", __func__, l-&gt;hvm_scaled_vm_bytes);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: total row bytes (%f row, hvm ineff scaled) = %f\n", __func__, l-&gt;num_rows, l-&gt;hvm_scaled_row_bytes);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: total vm+row bytes (hvm ineff scaled) = %f\n", __func__, l-&gt;hvm_scaled_vm_row_bytes);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: lb_flip_bw for vm and row = %f\n", __func__, l-&gt;hvm_scaled_vm_row_bytes / (l-&gt;max_flip_time - Tno_bw_flip));</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: lb_flip_bw for vm = %f\n", __func__, l-&gt;hvm_scaled_vm_bytes / (l-&gt;max_flip_time - Tno_bw_flip - 2 * Tr0_trips_flip_rounded));</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: lb_flip_bw for row = %f\n", __func__, l-&gt;hvm_scaled_row_bytes / (l-&gt;max_flip_time - Tvm_trips_flip_rounded));</div><div class='ctx'> </div><div class='ctx'> 				if (l-&gt;lb_flip_bw &gt; 0) {</div><div class='del'>-					dml2_printf("DML::%s: mode_support est Tvm_flip = %f (bw-based)\n", __func__, Tno_bw_flip + l-&gt;hvm_scaled_vm_bytes / l-&gt;lb_flip_bw);</div><div class='del'>-					dml2_printf("DML::%s: mode_support est Tr0_flip = %f (bw-based)\n", __func__, l-&gt;hvm_scaled_row_bytes / l-&gt;lb_flip_bw / l-&gt;num_rows);</div><div class='del'>-					dml2_printf("DML::%s: mode_support est dst_y_per_vm_flip = %f (bw-based)\n", __func__, Tno_bw_flip + l-&gt;hvm_scaled_vm_bytes / l-&gt;lb_flip_bw / LineTime);</div><div class='del'>-					dml2_printf("DML::%s: mode_support est dst_y_per_row_flip = %f (bw-based)\n", __func__, l-&gt;hvm_scaled_row_bytes / l-&gt;lb_flip_bw / LineTime / l-&gt;num_rows);</div><div class='del'>-					dml2_printf("DML::%s: Tvm_trips_flip_rounded + 2*Tr0_trips_flip_rounded = %f\n", __func__, (Tvm_trips_flip_rounded + 2 * Tr0_trips_flip_rounded));</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: mode_support est Tvm_flip = %f (bw-based)\n", __func__, Tno_bw_flip + l-&gt;hvm_scaled_vm_bytes / l-&gt;lb_flip_bw);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: mode_support est Tr0_flip = %f (bw-based)\n", __func__, l-&gt;hvm_scaled_row_bytes / l-&gt;lb_flip_bw / l-&gt;num_rows);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: mode_support est dst_y_per_vm_flip = %f (bw-based)\n", __func__, Tno_bw_flip + l-&gt;hvm_scaled_vm_bytes / l-&gt;lb_flip_bw / LineTime);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: mode_support est dst_y_per_row_flip = %f (bw-based)\n", __func__, l-&gt;hvm_scaled_row_bytes / l-&gt;lb_flip_bw / LineTime / l-&gt;num_rows);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: Tvm_trips_flip_rounded + 2*Tr0_trips_flip_rounded = %f\n", __func__, (Tvm_trips_flip_rounded + 2 * Tr0_trips_flip_rounded));</div><div class='ctx'> 				}</div><div class='ctx'> #endif</div><div class='ctx'> 				l-&gt;lb_flip_bw = math_max3(l-&gt;lb_flip_bw,</div><div class='hunk'>@@ -6640,8 +6572,8 @@ static void CalculateFlipSchedule(</div><div class='ctx'> 						(l-&gt;dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes) / (15 * LineTime));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: lb_flip_bw for vm reg limit = %f\n", __func__, l-&gt;hvm_scaled_vm_bytes / (31 * LineTime) - Tno_bw_flip);</div><div class='del'>-				dml2_printf("DML::%s: lb_flip_bw for row reg limit = %f\n", __func__, (l-&gt;dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes) / (15 * LineTime));</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: lb_flip_bw for vm reg limit = %f\n", __func__, l-&gt;hvm_scaled_vm_bytes / (31 * LineTime) - Tno_bw_flip);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: lb_flip_bw for row reg limit = %f\n", __func__, (l-&gt;dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes) / (15 * LineTime));</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -6653,13 +6585,12 @@ static void CalculateFlipSchedule(</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (iflip_enable) {</div><div class='ctx'> 				l-&gt;ImmediateFlipBW = (double)per_pipe_flip_bytes * BandwidthAvailableForImmediateFlip / (double)TotImmediateFlipBytes; // flip_bw(i)</div><div class='del'>-				double portion = (double)per_pipe_flip_bytes / (double)TotImmediateFlipBytes;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: per_pipe_flip_bytes = %d\n", __func__, per_pipe_flip_bytes);</div><div class='del'>-				dml2_printf("DML::%s: BandwidthAvailableForImmediateFlip = %f\n", __func__, BandwidthAvailableForImmediateFlip);</div><div class='del'>-				dml2_printf("DML::%s: ImmediateFlipBW = %f\n", __func__, l-&gt;ImmediateFlipBW);</div><div class='del'>-				dml2_printf("DML::%s: portion of flip bw = %f\n", __func__, portion);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: per_pipe_flip_bytes = %d\n", __func__, per_pipe_flip_bytes);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: BandwidthAvailableForImmediateFlip = %f\n", __func__, BandwidthAvailableForImmediateFlip);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: ImmediateFlipBW = %f\n", __func__, l-&gt;ImmediateFlipBW);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: portion of flip bw = %f\n", __func__, (double)per_pipe_flip_bytes / (double)TotImmediateFlipBytes);</div><div class='ctx'> #endif</div><div class='ctx'> 				if (l-&gt;ImmediateFlipBW == 0) {</div><div class='ctx'> 					l-&gt;Tvm_flip = 0;</div><div class='hunk'>@@ -6674,11 +6605,11 @@ static void CalculateFlipSchedule(</div><div class='ctx'> 						LineTime / 4.0);</div><div class='ctx'> 				}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: total vm bytes (hvm ineff scaled) = %f\n", __func__, vm_bytes * HostVMInefficiencyFactor);</div><div class='del'>-				dml2_printf("DML::%s: total row bytes (hvm ineff scaled, one row) = %f\n", __func__, (l-&gt;dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes));</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: total vm bytes (hvm ineff scaled) = %f\n", __func__, vm_bytes * HostVMInefficiencyFactor);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: total row bytes (hvm ineff scaled, one row) = %f\n", __func__, (l-&gt;dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes));</div><div class='ctx'> </div><div class='del'>-				dml2_printf("DML::%s: Tvm_flip = %f (bw-based), Tvm_trips_flip = %f (latency-based)\n", __func__, Tno_bw_flip + vm_bytes * HostVMInefficiencyFactor / l-&gt;ImmediateFlipBW, Tvm_trips_flip);</div><div class='del'>-				dml2_printf("DML::%s: Tr0_flip = %f (bw-based), Tr0_trips_flip = %f (latency-based)\n", __func__, (l-&gt;dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes) / l-&gt;ImmediateFlipBW, Tr0_trips_flip);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Tvm_flip = %f (bw-based), Tvm_trips_flip = %f (latency-based)\n", __func__, Tno_bw_flip + vm_bytes * HostVMInefficiencyFactor / l-&gt;ImmediateFlipBW, Tvm_trips_flip);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Tr0_flip = %f (bw-based), Tr0_trips_flip = %f (latency-based)\n", __func__, (l-&gt;dpte_row_bytes * HostVMInefficiencyFactor + meta_row_bytes) / l-&gt;ImmediateFlipBW, Tr0_trips_flip);</div><div class='ctx'> #endif</div><div class='ctx'> 				*dst_y_per_vm_flip = math_ceil2(4.0 * (l-&gt;Tvm_flip / LineTime), 1.0) / 4.0;</div><div class='ctx'> 				*dst_y_per_row_flip = math_ceil2(4.0 * (l-&gt;Tr0_flip / LineTime), 1.0) / 4.0;</div><div class='hunk'>@@ -6711,14 +6642,14 @@ static void CalculateFlipSchedule(</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='ctx'> 	if (!use_lb_flip_bw) {</div><div class='del'>-		dml2_printf("DML::%s: dst_y_per_vm_flip = %f (should be &lt; 32)\n", __func__, *dst_y_per_vm_flip);</div><div class='del'>-		dml2_printf("DML::%s: dst_y_per_row_flip = %f (should be &lt; 16)\n", __func__, *dst_y_per_row_flip);</div><div class='del'>-		dml2_printf("DML::%s: Tvm_flip = %f (final)\n", __func__, l-&gt;Tvm_flip);</div><div class='del'>-		dml2_printf("DML::%s: Tr0_flip = %f (final)\n", __func__, l-&gt;Tr0_flip);</div><div class='del'>-		dml2_printf("DML::%s: Tvm_flip + 2*Tr0_flip = %f (should be &lt;= min_row_time=%f)\n", __func__, l-&gt;Tvm_flip + 2 * l-&gt;Tr0_flip, l-&gt;min_row_time);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dst_y_per_vm_flip = %f (should be &lt; 32)\n", __func__, *dst_y_per_vm_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: dst_y_per_row_flip = %f (should be &lt; 16)\n", __func__, *dst_y_per_row_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tvm_flip = %f (final)\n", __func__, l-&gt;Tvm_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tr0_flip = %f (final)\n", __func__, l-&gt;Tr0_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Tvm_flip + 2*Tr0_flip = %f (should be &lt;= min_row_time=%f)\n", __func__, l-&gt;Tvm_flip + 2 * l-&gt;Tr0_flip, l-&gt;min_row_time);</div><div class='ctx'> 	}</div><div class='del'>-	dml2_printf("DML::%s: final_flip_bw = %f\n", __func__, *final_flip_bw);</div><div class='del'>-	dml2_printf("DML::%s: ImmediateFlipSupportedForPipe = %u\n", __func__, *ImmediateFlipSupportedForPipe);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: final_flip_bw = %f\n", __func__, *final_flip_bw);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ImmediateFlipSupportedForPipe = %u\n", __func__, *ImmediateFlipSupportedForPipe);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6736,7 +6667,7 @@ static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 	p-&gt;Watermark-&gt;UrgentWatermark = p-&gt;mmSOCParameters.UrgentLatency + p-&gt;mmSOCParameters.ExtraLatency;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: UrgentWatermark = %f\n", __func__, p-&gt;Watermark-&gt;UrgentWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentWatermark = %f\n", __func__, p-&gt;Watermark-&gt;UrgentWatermark);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;Watermark-&gt;USRRetrainingWatermark = p-&gt;mmSOCParameters.UrgentLatency + p-&gt;mmSOCParameters.ExtraLatency + p-&gt;mmSOCParameters.USRRetrainingLatency + p-&gt;mmSOCParameters.SMNLatency;</div><div class='hunk'>@@ -6755,20 +6686,20 @@ static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 	p-&gt;Watermark-&gt;temp_read_or_ppt_watermark_us = p-&gt;mmSOCParameters.g6_temp_read_blackout_us + p-&gt;Watermark-&gt;UrgentWatermark;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: UrgentLatency = %f\n", __func__, p-&gt;mmSOCParameters.UrgentLatency);</div><div class='del'>-	dml2_printf("DML::%s: ExtraLatency = %f\n", __func__, p-&gt;mmSOCParameters.ExtraLatency);</div><div class='del'>-	dml2_printf("DML::%s: DRAMClockChangeLatency = %f\n", __func__, p-&gt;mmSOCParameters.DRAMClockChangeLatency);</div><div class='del'>-	dml2_printf("DML::%s: SREnterPlusExitZ8Time = %f\n", __func__, p-&gt;mmSOCParameters.SREnterPlusExitZ8Time);</div><div class='del'>-	dml2_printf("DML::%s: SREnterPlusExitTime = %f\n", __func__, p-&gt;mmSOCParameters.SREnterPlusExitTime);</div><div class='del'>-	dml2_printf("DML::%s: UrgentWatermark = %f\n", __func__, p-&gt;Watermark-&gt;UrgentWatermark);</div><div class='del'>-	dml2_printf("DML::%s: USRRetrainingWatermark = %f\n", __func__, p-&gt;Watermark-&gt;USRRetrainingWatermark);</div><div class='del'>-	dml2_printf("DML::%s: DRAMClockChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;DRAMClockChangeWatermark);</div><div class='del'>-	dml2_printf("DML::%s: FCLKChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;FCLKChangeWatermark);</div><div class='del'>-	dml2_printf("DML::%s: StutterExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;StutterExitWatermark);</div><div class='del'>-	dml2_printf("DML::%s: StutterEnterPlusExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;StutterEnterPlusExitWatermark);</div><div class='del'>-	dml2_printf("DML::%s: Z8StutterExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;Z8StutterExitWatermark);</div><div class='del'>-	dml2_printf("DML::%s: Z8StutterEnterPlusExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;Z8StutterEnterPlusExitWatermark);</div><div class='del'>-	dml2_printf("DML::%s: temp_read_or_ppt_watermark_us = %f\n", __func__, p-&gt;Watermark-&gt;temp_read_or_ppt_watermark_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentLatency = %f\n", __func__, p-&gt;mmSOCParameters.UrgentLatency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ExtraLatency = %f\n", __func__, p-&gt;mmSOCParameters.ExtraLatency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DRAMClockChangeLatency = %f\n", __func__, p-&gt;mmSOCParameters.DRAMClockChangeLatency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SREnterPlusExitZ8Time = %f\n", __func__, p-&gt;mmSOCParameters.SREnterPlusExitZ8Time);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SREnterPlusExitTime = %f\n", __func__, p-&gt;mmSOCParameters.SREnterPlusExitTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UrgentWatermark = %f\n", __func__, p-&gt;Watermark-&gt;UrgentWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: USRRetrainingWatermark = %f\n", __func__, p-&gt;Watermark-&gt;USRRetrainingWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DRAMClockChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;DRAMClockChangeWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: FCLKChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;FCLKChangeWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;StutterExitWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterEnterPlusExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;StutterEnterPlusExitWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Z8StutterExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;Z8StutterExitWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Z8StutterEnterPlusExitWatermark = %f\n", __func__, p-&gt;Watermark-&gt;Z8StutterEnterPlusExitWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: temp_read_or_ppt_watermark_us = %f\n", __func__, p-&gt;Watermark-&gt;temp_read_or_ppt_watermark_us);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	s-&gt;TotalActiveWriteback = 0;</div><div class='hunk'>@@ -6801,11 +6732,11 @@ static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 		p-&gt;Watermark-&gt;WritebackFCLKChangeWatermark = p-&gt;Watermark-&gt;WritebackFCLKChangeWatermark + p-&gt;mmSOCParameters.USRRetrainingLatency;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: WritebackDRAMClockChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;WritebackDRAMClockChangeWatermark);</div><div class='del'>-	dml2_printf("DML::%s: WritebackFCLKChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;WritebackFCLKChangeWatermark);</div><div class='del'>-	dml2_printf("DML::%s: WritebackUrgentWatermark = %f\n", __func__, p-&gt;Watermark-&gt;WritebackUrgentWatermark);</div><div class='del'>-	dml2_printf("DML::%s: USRRetrainingRequired = %u\n", __func__, p-&gt;USRRetrainingRequired);</div><div class='del'>-	dml2_printf("DML::%s: USRRetrainingLatency = %f\n", __func__, p-&gt;mmSOCParameters.USRRetrainingLatency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: WritebackDRAMClockChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;WritebackDRAMClockChangeWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: WritebackFCLKChangeWatermark = %f\n", __func__, p-&gt;Watermark-&gt;WritebackFCLKChangeWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: WritebackUrgentWatermark = %f\n", __func__, p-&gt;Watermark-&gt;WritebackUrgentWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: USRRetrainingRequired = %u\n", __func__, p-&gt;USRRetrainingRequired);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: USRRetrainingLatency = %f\n", __func__, p-&gt;mmSOCParameters.USRRetrainingLatency);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	s-&gt;TotalPixelBW = 0.0;</div><div class='hunk'>@@ -6836,11 +6767,11 @@ static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 		s-&gt;LBLatencyHidingSourceLinesC[k] = (unsigned int)(math_min2((double)p-&gt;MaxLineBufferLines, math_floor2((double)p-&gt;LineBufferSize / LBBitPerPixel / ((double)p-&gt;SwathWidthC[k] / math_max2(h_ratio_c, 1.0)), 1)) - (v_taps_c - 1));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, MaxLineBufferLines = %u\n", __func__, k, p-&gt;MaxLineBufferLines);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, LineBufferSize = %u\n", __func__, k, p-&gt;LineBufferSize);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, LBBitPerPixel = %u\n", __func__, k, LBBitPerPixel);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, HRatio = %f\n", __func__, k, h_ratio);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, VTaps = %f\n", __func__, k, v_taps);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, MaxLineBufferLines = %u\n", __func__, k, p-&gt;MaxLineBufferLines);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, LineBufferSize = %u\n", __func__, k, p-&gt;LineBufferSize);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, LBBitPerPixel = %f\n", __func__, k, LBBitPerPixel);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, HRatio = %f\n", __func__, k, h_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, VTaps = %f\n", __func__, k, v_taps);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		s-&gt;EffectiveLBLatencyHidingY = s-&gt;LBLatencyHidingSourceLinesY[k] / v_ratio * (h_total / pixel_clock_mhz);</div><div class='hunk'>@@ -6943,16 +6874,16 @@ static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 		s-&gt;sub_vp_lines_l = s-&gt;src_y_pstate_l + s-&gt;src_y_ahead_l + p-&gt;meta_row_height_l[k];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, DETBufferSizeY = %u\n", __func__, k, p-&gt;DETBufferSizeY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, BytePerPixelDETY = %f\n", __func__, k, p-&gt;BytePerPixelDETY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, SwathWidthY = %u\n", __func__, k, p-&gt;SwathWidthY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, SwathHeightY = %u\n", __func__, k, p-&gt;SwathHeightY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, LBLatencyHidingSourceLinesY = %u\n", __func__, k, s-&gt;LBLatencyHidingSourceLinesY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dst_y_pstate = %u\n", __func__, k, s-&gt;dst_y_pstate);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, src_y_pstate_l = %u\n", __func__, k, s-&gt;src_y_pstate_l);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, src_y_ahead_l = %u\n", __func__, k, s-&gt;src_y_ahead_l);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, meta_row_height_l = %u\n", __func__, k, p-&gt;meta_row_height_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, sub_vp_lines_l = %u\n", __func__, k, s-&gt;sub_vp_lines_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, DETBufferSizeY = %u\n", __func__, k, p-&gt;DETBufferSizeY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, BytePerPixelDETY = %f\n", __func__, k, p-&gt;BytePerPixelDETY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, SwathWidthY = %u\n", __func__, k, p-&gt;SwathWidthY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, SwathHeightY = %u\n", __func__, k, p-&gt;SwathHeightY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, LBLatencyHidingSourceLinesY = %u\n", __func__, k, s-&gt;LBLatencyHidingSourceLinesY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dst_y_pstate = %u\n", __func__, k, s-&gt;dst_y_pstate);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, src_y_pstate_l = %u\n", __func__, k, s-&gt;src_y_pstate_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, src_y_ahead_l = %u\n", __func__, k, s-&gt;src_y_ahead_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, meta_row_height_l = %u\n", __func__, k, p-&gt;meta_row_height_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, sub_vp_lines_l = %u\n", __func__, k, s-&gt;sub_vp_lines_l);</div><div class='ctx'> #endif</div><div class='ctx'> 		p-&gt;SubViewportLinesNeededInMALL[k] = s-&gt;sub_vp_lines_l;</div><div class='ctx'> </div><div class='hunk'>@@ -6967,10 +6898,10 @@ static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 				p-&gt;SubViewportLinesNeededInMALL[k] = (unsigned int)(math_max2(s-&gt;sub_vp_lines_l, s-&gt;sub_vp_lines_c));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, meta_row_height_c = %u\n", __func__, k, p-&gt;meta_row_height_c[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, src_y_pstate_c = %u\n", __func__, k, s-&gt;src_y_pstate_c);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, src_y_ahead_c = %u\n", __func__, k, s-&gt;src_y_ahead_c);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, sub_vp_lines_c = %u\n", __func__, k, s-&gt;sub_vp_lines_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, meta_row_height_c = %u\n", __func__, k, p-&gt;meta_row_height_c[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, src_y_pstate_c = %u\n", __func__, k, s-&gt;src_y_pstate_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, src_y_ahead_c = %u\n", __func__, k, s-&gt;src_y_ahead_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, sub_vp_lines_c = %u\n", __func__, k, s-&gt;sub_vp_lines_c);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6992,10 +6923,10 @@ static void CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DRAMClockChangeSupport = %u\n", __func__, *p-&gt;global_dram_clock_change_supported);</div><div class='del'>-	dml2_printf("DML::%s: FCLKChangeSupport = %u\n", __func__, *p-&gt;global_fclk_change_supported);</div><div class='del'>-	dml2_printf("DML::%s: MaxActiveFCLKChangeLatencySupported = %f\n", __func__, *p-&gt;MaxActiveFCLKChangeLatencySupported);</div><div class='del'>-	dml2_printf("DML::%s: USRRetrainingSupport = %u\n", __func__, *p-&gt;USRRetrainingSupport);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DRAMClockChangeSupport = %u\n", __func__, *p-&gt;global_dram_clock_change_supported);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: FCLKChangeSupport = %u\n", __func__, *p-&gt;global_fclk_change_supported);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxActiveFCLKChangeLatencySupported = %f\n", __func__, *p-&gt;MaxActiveFCLKChangeLatencySupported);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: USRRetrainingSupport = %u\n", __func__, *p-&gt;USRRetrainingSupport);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7141,7 +7072,7 @@ static unsigned int get_qos_param_index(unsigned long uclk_freq_khz, const struc</div><div class='ctx'> 	unsigned int index = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; DML_MAX_CLK_TABLE_SIZE; i++) {</div><div class='del'>-		dml2_printf("DML::%s: per_uclk_dpm_params[%d].minimum_uclk_khz = %d\n", __func__, i, per_uclk_dpm_params[i].minimum_uclk_khz);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: per_uclk_dpm_params[%d].minimum_uclk_khz = %ld\n", __func__, i, per_uclk_dpm_params[i].minimum_uclk_khz);</div><div class='ctx'> </div><div class='ctx'> 		if (i == 0)</div><div class='ctx'> 			index = 0;</div><div class='hunk'>@@ -7153,32 +7084,30 @@ static unsigned int get_qos_param_index(unsigned long uclk_freq_khz, const struc</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-#if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	dml2_printf("DML::%s: uclk_freq_khz = %d\n", __func__, uclk_freq_khz);</div><div class='del'>-	dml2_printf("DML::%s: index = %d\n", __func__, index);</div><div class='del'>-#endif</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: uclk_freq_khz = %ld\n", __func__, uclk_freq_khz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: index = %d\n", __func__, index);</div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int get_active_min_uclk_dpm_index(unsigned long uclk_freq_khz, const struct dml2_soc_state_table *clk_table)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	bool clk_entry_found = 0;</div><div class='add'>+	bool clk_entry_found = false;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; clk_table-&gt;uclk.num_clk_values; i++) {</div><div class='del'>-		dml2_printf("DML::%s: clk_table.uclk.clk_values_khz[%d] = %d\n", __func__, i, clk_table-&gt;uclk.clk_values_khz[i]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: clk_table.uclk.clk_values_khz[%d] = %ld\n", __func__, i, clk_table-&gt;uclk.clk_values_khz[i]);</div><div class='ctx'> </div><div class='ctx'> 		if (uclk_freq_khz == clk_table-&gt;uclk.clk_values_khz[i]) {</div><div class='del'>-			clk_entry_found = 1;</div><div class='add'>+			clk_entry_found = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!clk_entry_found)</div><div class='del'>-		DML2_ASSERT(clk_entry_found);</div><div class='add'>+		DML_ASSERT(clk_entry_found);</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	dml2_printf("DML::%s: uclk_freq_khz = %ld\n", __func__, uclk_freq_khz);</div><div class='del'>-	dml2_printf("DML::%s: index = %d\n", __func__, i);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: uclk_freq_khz = %ld\n", __func__, uclk_freq_khz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: index = %d\n", __func__, i);</div><div class='ctx'> #endif</div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='hunk'>@@ -7218,10 +7147,10 @@ static void calculate_hostvm_inefficiency_factor(</div><div class='ctx'> 			if ((*HostVMInefficiencyFactorPrefetch &lt; 4) &amp;&amp; (remote_iommu_outstanding_translations &lt; max_outstanding_reqs))</div><div class='ctx'> 				*HostVMInefficiencyFactorPrefetch = 4;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: urg_bandwidth_avail_active_pixel_and_vm = %f\n", __func__, urg_bandwidth_avail_active_pixel_and_vm);</div><div class='del'>-			dml2_printf("DML::%s: urg_bandwidth_avail_active_vm_only = %f\n", __func__, urg_bandwidth_avail_active_vm_only);</div><div class='del'>-			dml2_printf("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, *HostVMInefficiencyFactor);</div><div class='del'>-			dml2_printf("DML::%s: HostVMInefficiencyFactorPrefetch = %f\n", __func__, *HostVMInefficiencyFactorPrefetch);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: urg_bandwidth_avail_active_pixel_and_vm = %f\n", __func__, urg_bandwidth_avail_active_pixel_and_vm);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: urg_bandwidth_avail_active_vm_only = %f\n", __func__, urg_bandwidth_avail_active_vm_only);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: HostVMInefficiencyFactor = %f\n", __func__, *HostVMInefficiencyFactor);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: HostVMInefficiencyFactorPrefetch = %f\n", __func__, *HostVMInefficiencyFactorPrefetch);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> }</div><div class='hunk'>@@ -7335,30 +7264,659 @@ static void calculate_pstate_keepout_dst_lines(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static noinline_for_stack void dml_core_ms_prefetch_check(struct dml2_core_internal_display_mode_lib *mode_lib,</div><div class='add'>+	const struct dml2_display_cfg *display_cfg)</div><div class='add'>+{</div><div class='add'>+	struct dml2_core_calcs_mode_support_locals *s = &amp;mode_lib-&gt;scratch.dml_core_mode_support_locals;</div><div class='add'>+	struct dml2_core_calcs_calculate_tdlut_setting_params *calculate_tdlut_setting_params = &amp;mode_lib-&gt;scratch.calculate_tdlut_setting_params;</div><div class='add'>+	struct dml2_core_calcs_CalculatePrefetchSchedule_params *CalculatePrefetchSchedule_params = &amp;mode_lib-&gt;scratch.CalculatePrefetchSchedule_params;</div><div class='add'>+	struct dml2_core_calcs_calculate_peak_bandwidth_required_params *calculate_peak_bandwidth_params = &amp;mode_lib-&gt;scratch.calculate_peak_bandwidth_params;</div><div class='add'>+#ifdef DML_GLOBAL_PREFETCH_CHECK</div><div class='add'>+	struct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_params *CheckGlobalPrefetchAdmissibility_params = &amp;mode_lib-&gt;scratch.CheckGlobalPrefetchAdmissibility_params;</div><div class='add'>+#endif</div><div class='add'>+	struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_params *CalculateWatermarks_params = &amp;mode_lib-&gt;scratch.CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_params;</div><div class='add'>+</div><div class='add'>+	double min_return_bw_for_latency;</div><div class='add'>+	unsigned int k;</div><div class='add'>+</div><div class='add'>+	mode_lib-&gt;ms.TimeCalc = 24 / mode_lib-&gt;ms.dcfclk_deepsleep;</div><div class='add'>+</div><div class='add'>+	calculate_hostvm_inefficiency_factor(</div><div class='add'>+			&amp;s-&gt;HostVMInefficiencyFactor,</div><div class='add'>+			&amp;s-&gt;HostVMInefficiencyFactorPrefetch,</div><div class='add'>+</div><div class='add'>+			display_cfg-&gt;gpuvm_enable,</div><div class='add'>+			display_cfg-&gt;hostvm_enable,</div><div class='add'>+			mode_lib-&gt;ip.remote_iommu_outstanding_translations,</div><div class='add'>+			mode_lib-&gt;soc.max_outstanding_reqs,</div><div class='add'>+			mode_lib-&gt;ms.support.urg_bandwidth_available_pixel_and_vm[dml2_core_internal_soc_state_sys_active],</div><div class='add'>+			mode_lib-&gt;ms.support.urg_bandwidth_available_vm_only[dml2_core_internal_soc_state_sys_active]);</div><div class='add'>+</div><div class='add'>+	mode_lib-&gt;ms.Total3dlutActive = 0;</div><div class='add'>+	for (k = 0; k &lt;= mode_lib-&gt;ms.num_active_planes - 1; k++) {</div><div class='add'>+		if (display_cfg-&gt;plane_descriptors[k].tdlut.setup_for_tdlut)</div><div class='add'>+			mode_lib-&gt;ms.Total3dlutActive = mode_lib-&gt;ms.Total3dlutActive + 1;</div><div class='add'>+</div><div class='add'>+		// Calculate tdlut schedule related terms</div><div class='add'>+		calculate_tdlut_setting_params-&gt;dispclk_mhz = mode_lib-&gt;ms.RequiredDISPCLK;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;setup_for_tdlut = display_cfg-&gt;plane_descriptors[k].tdlut.setup_for_tdlut;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_width_mode = display_cfg-&gt;plane_descriptors[k].tdlut.tdlut_width_mode;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_addressing_mode = display_cfg-&gt;plane_descriptors[k].tdlut.tdlut_addressing_mode;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;cursor_buffer_size = mode_lib-&gt;ip.cursor_buffer_size;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;gpuvm_enable = display_cfg-&gt;gpuvm_enable;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;gpuvm_page_size_kbytes = display_cfg-&gt;plane_descriptors[k].overrides.gpuvm_min_page_size_kbytes;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_mpc_width_flag = display_cfg-&gt;plane_descriptors[k].tdlut.tdlut_mpc_width_flag;</div><div class='add'>+		calculate_tdlut_setting_params-&gt;is_gfx11 = dml_get_gfx_version(display_cfg-&gt;plane_descriptors[k].surface.tiling);</div><div class='add'>+</div><div class='add'>+		// output</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_pte_bytes_per_frame = &amp;s-&gt;tdlut_pte_bytes_per_frame[k];</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_bytes_per_frame = &amp;s-&gt;tdlut_bytes_per_frame[k];</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_groups_per_2row_ub = &amp;s-&gt;tdlut_groups_per_2row_ub[k];</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_opt_time = &amp;s-&gt;tdlut_opt_time[k];</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_drain_time = &amp;s-&gt;tdlut_drain_time[k];</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_bytes_to_deliver = &amp;s-&gt;tdlut_bytes_to_deliver[k];</div><div class='add'>+		calculate_tdlut_setting_params-&gt;tdlut_bytes_per_group = &amp;s-&gt;tdlut_bytes_per_group[k];</div><div class='add'>+</div><div class='add'>+		calculate_tdlut_setting(&amp;mode_lib-&gt;scratch, calculate_tdlut_setting_params);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	min_return_bw_for_latency = mode_lib-&gt;ms.support.urg_bandwidth_available_min_latency[dml2_core_internal_soc_state_sys_active];</div><div class='add'>+</div><div class='add'>+	if (mode_lib-&gt;soc.qos_parameters.qos_type == dml2_qos_param_type_dcn3)</div><div class='add'>+		s-&gt;ReorderingBytes = (unsigned int)(mode_lib-&gt;soc.clk_table.dram_config.channel_count * math_max3(mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.urgent_out_of_order_return_per_channel_pixel_only_bytes,</div><div class='add'>+										mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.urgent_out_of_order_return_per_channel_pixel_and_vm_bytes,</div><div class='add'>+										mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.urgent_out_of_order_return_per_channel_vm_only_bytes));</div><div class='add'>+</div><div class='add'>+	CalculateExtraLatency(</div><div class='add'>+		display_cfg,</div><div class='add'>+		mode_lib-&gt;ip.rob_buffer_size_kbytes,</div><div class='add'>+		mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.loaded_round_trip_latency_fclk_cycles,</div><div class='add'>+		s-&gt;ReorderingBytes,</div><div class='add'>+		mode_lib-&gt;ms.DCFCLK,</div><div class='add'>+		mode_lib-&gt;ms.FabricClock,</div><div class='add'>+		mode_lib-&gt;ip.pixel_chunk_size_kbytes,</div><div class='add'>+		min_return_bw_for_latency,</div><div class='add'>+		mode_lib-&gt;ms.num_active_planes,</div><div class='add'>+		mode_lib-&gt;ms.NoOfDPP,</div><div class='add'>+		mode_lib-&gt;ms.dpte_group_bytes,</div><div class='add'>+		s-&gt;tdlut_bytes_per_group,</div><div class='add'>+		s-&gt;HostVMInefficiencyFactor,</div><div class='add'>+		s-&gt;HostVMInefficiencyFactorPrefetch,</div><div class='add'>+		mode_lib-&gt;soc.hostvm_min_page_size_kbytes,</div><div class='add'>+		mode_lib-&gt;soc.qos_parameters.qos_type,</div><div class='add'>+		!(display_cfg-&gt;overrides.max_outstanding_when_urgent_expected_disable),</div><div class='add'>+		mode_lib-&gt;soc.max_outstanding_reqs,</div><div class='add'>+		mode_lib-&gt;ms.support.request_size_bytes_luma,</div><div class='add'>+		mode_lib-&gt;ms.support.request_size_bytes_chroma,</div><div class='add'>+		mode_lib-&gt;ip.meta_chunk_size_kbytes,</div><div class='add'>+		mode_lib-&gt;ip.dchub_arb_to_ret_delay,</div><div class='add'>+		mode_lib-&gt;ms.TripToMemory,</div><div class='add'>+		mode_lib-&gt;ip.hostvm_mode,</div><div class='add'>+</div><div class='add'>+		// output</div><div class='add'>+		&amp;mode_lib-&gt;ms.ExtraLatency,</div><div class='add'>+		&amp;mode_lib-&gt;ms.ExtraLatency_sr,</div><div class='add'>+		&amp;mode_lib-&gt;ms.ExtraLatencyPrefetch);</div><div class='add'>+</div><div class='add'>+	for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++)</div><div class='add'>+		s-&gt;impacted_dst_y_pre[k] = 0;</div><div class='add'>+</div><div class='add'>+	s-&gt;recalc_prefetch_schedule = 0;</div><div class='add'>+	s-&gt;recalc_prefetch_done = 0;</div><div class='add'>+	do {</div><div class='add'>+		mode_lib-&gt;ms.support.PrefetchSupported = true;</div><div class='add'>+</div><div class='add'>+		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='add'>+			s-&gt;line_times[k] = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='add'>+			s-&gt;pixel_format[k] = display_cfg-&gt;plane_descriptors[k].pixel_format;</div><div class='add'>+</div><div class='add'>+			s-&gt;lb_source_lines_l[k] = get_num_lb_source_lines(mode_lib-&gt;ip.max_line_buffer_lines, mode_lib-&gt;ip.line_buffer_size_bits,</div><div class='add'>+																mode_lib-&gt;ms.NoOfDPP[k],</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.width,</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height,</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio,</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.rotation_angle);</div><div class='add'>+</div><div class='add'>+			s-&gt;lb_source_lines_c[k] = get_num_lb_source_lines(mode_lib-&gt;ip.max_line_buffer_lines, mode_lib-&gt;ip.line_buffer_size_bits,</div><div class='add'>+																mode_lib-&gt;ms.NoOfDPP[k],</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.viewport.plane1.width,</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.viewport.plane1.height,</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.h_ratio,</div><div class='add'>+																display_cfg-&gt;plane_descriptors[k].composition.rotation_angle);</div><div class='add'>+</div><div class='add'>+			struct dml2_core_internal_DmlPipe *myPipe = &amp;s-&gt;myPipe;</div><div class='add'>+</div><div class='add'>+			mode_lib-&gt;ms.TWait[k] = CalculateTWait(</div><div class='add'>+				display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns,</div><div class='add'>+				mode_lib-&gt;ms.UrgLatency,</div><div class='add'>+				mode_lib-&gt;ms.TripToMemory,</div><div class='add'>+				!dml_is_phantom_pipe(&amp;display_cfg-&gt;plane_descriptors[k]) &amp;&amp; display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.drr_config.enabled ?</div><div class='add'>+				get_g6_temp_read_blackout_us(&amp;mode_lib-&gt;soc, (unsigned int)(mode_lib-&gt;ms.uclk_freq_mhz * 1000), mode_lib-&gt;ms.state_idx) : 0.0);</div><div class='add'>+</div><div class='add'>+			myPipe-&gt;Dppclk = mode_lib-&gt;ms.RequiredDPPCLK[k];</div><div class='add'>+			myPipe-&gt;Dispclk = mode_lib-&gt;ms.RequiredDISPCLK;</div><div class='add'>+			myPipe-&gt;PixelClock = ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='add'>+			myPipe-&gt;DCFClkDeepSleep = mode_lib-&gt;ms.dcfclk_deepsleep;</div><div class='add'>+			myPipe-&gt;DPPPerSurface = mode_lib-&gt;ms.NoOfDPP[k];</div><div class='add'>+			myPipe-&gt;ScalerEnabled = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.enabled;</div><div class='add'>+			myPipe-&gt;VRatio = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio;</div><div class='add'>+			myPipe-&gt;VRatioChroma = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio;</div><div class='add'>+			myPipe-&gt;VTaps = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_taps;</div><div class='add'>+			myPipe-&gt;VTapsChroma = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_taps;</div><div class='add'>+			myPipe-&gt;RotationAngle = display_cfg-&gt;plane_descriptors[k].composition.rotation_angle;</div><div class='add'>+			myPipe-&gt;mirrored = display_cfg-&gt;plane_descriptors[k].composition.mirrored;</div><div class='add'>+			myPipe-&gt;BlockWidth256BytesY = mode_lib-&gt;ms.Read256BlockWidthY[k];</div><div class='add'>+			myPipe-&gt;BlockHeight256BytesY = mode_lib-&gt;ms.Read256BlockHeightY[k];</div><div class='add'>+			myPipe-&gt;BlockWidth256BytesC = mode_lib-&gt;ms.Read256BlockWidthC[k];</div><div class='add'>+			myPipe-&gt;BlockHeight256BytesC = mode_lib-&gt;ms.Read256BlockHeightC[k];</div><div class='add'>+			myPipe-&gt;InterlaceEnable = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.interlaced;</div><div class='add'>+			myPipe-&gt;NumberOfCursors = display_cfg-&gt;plane_descriptors[k].cursor.num_cursors;</div><div class='add'>+			myPipe-&gt;VBlank = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_total - display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_active;</div><div class='add'>+			myPipe-&gt;HTotal = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total;</div><div class='add'>+			myPipe-&gt;HActive = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_active;</div><div class='add'>+			myPipe-&gt;DCCEnable = display_cfg-&gt;plane_descriptors[k].surface.dcc.enable;</div><div class='add'>+			myPipe-&gt;ODMMode = mode_lib-&gt;ms.ODMMode[k];</div><div class='add'>+			myPipe-&gt;SourcePixelFormat = display_cfg-&gt;plane_descriptors[k].pixel_format;</div><div class='add'>+			myPipe-&gt;BytePerPixelY = mode_lib-&gt;ms.BytePerPixelY[k];</div><div class='add'>+			myPipe-&gt;BytePerPixelC = mode_lib-&gt;ms.BytePerPixelC[k];</div><div class='add'>+			myPipe-&gt;ProgressiveToInterlaceUnitInOPP = mode_lib-&gt;ip.ptoi_supported;</div><div class='add'>+</div><div class='add'>+#ifdef __DML_VBA_DEBUG__</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Calling CalculatePrefetchSchedule for k=%u\n", __func__, k);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: MaximumVStartup = %u\n", __func__, s-&gt;MaximumVStartup[k]);</div><div class='add'>+#endif</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;display_cfg = display_cfg;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;HostVMInefficiencyFactor = s-&gt;HostVMInefficiencyFactorPrefetch;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;myPipe = myPipe;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DSCDelay = mode_lib-&gt;ms.DSCDelay[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DPPCLKDelaySubtotalPlusCNVCFormater = mode_lib-&gt;ip.dppclk_delay_subtotal + mode_lib-&gt;ip.dppclk_delay_cnvc_formatter;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DPPCLKDelaySCL = mode_lib-&gt;ip.dppclk_delay_scl;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DPPCLKDelaySCLLBOnly = mode_lib-&gt;ip.dppclk_delay_scl_lb_only;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DPPCLKDelayCNVCCursor = mode_lib-&gt;ip.dppclk_delay_cnvc_cursor;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DISPCLKDelaySubtotal = mode_lib-&gt;ip.dispclk_delay_subtotal;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DPP_RECOUT_WIDTH = (unsigned int)(mode_lib-&gt;ms.SwathWidthY[k] / display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio);</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;OutputFormat = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].output.output_format;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;MaxInterDCNTileRepeaters = mode_lib-&gt;ip.max_inter_dcn_tile_repeaters;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VStartup = s-&gt;MaximumVStartup[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;HostVMMinPageSize = mode_lib-&gt;soc.hostvm_min_page_size_kbytes;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DynamicMetadataEnable = display_cfg-&gt;plane_descriptors[k].dynamic_meta_data.enable;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DynamicMetadataVMEnabled = mode_lib-&gt;ip.dynamic_metadata_vm_enabled;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DynamicMetadataLinesBeforeActiveRequired = display_cfg-&gt;plane_descriptors[k].dynamic_meta_data.lines_before_active_required;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DynamicMetadataTransmittedBytes = display_cfg-&gt;plane_descriptors[k].dynamic_meta_data.transmitted_bytes;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;UrgentLatency = mode_lib-&gt;ms.UrgLatency;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;ExtraLatencyPrefetch = mode_lib-&gt;ms.ExtraLatencyPrefetch;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;TCalc = mode_lib-&gt;ms.TimeCalc;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;vm_bytes = mode_lib-&gt;ms.vm_bytes[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;PixelPTEBytesPerRow = mode_lib-&gt;ms.DPTEBytesPerRow[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;PrefetchSourceLinesY = mode_lib-&gt;ms.PrefetchLinesY[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VInitPreFillY = mode_lib-&gt;ms.PrefillY[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;MaxNumSwathY = mode_lib-&gt;ms.MaxNumSwathY[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;PrefetchSourceLinesC = mode_lib-&gt;ms.PrefetchLinesC[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VInitPreFillC = mode_lib-&gt;ms.PrefillC[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;MaxNumSwathC = mode_lib-&gt;ms.MaxNumSwathC[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;swath_width_luma_ub = mode_lib-&gt;ms.swath_width_luma_ub[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;swath_width_chroma_ub = mode_lib-&gt;ms.swath_width_chroma_ub[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;SwathHeightY = mode_lib-&gt;ms.SwathHeightY[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;SwathHeightC = mode_lib-&gt;ms.SwathHeightC[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;TWait = mode_lib-&gt;ms.TWait[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Ttrip = mode_lib-&gt;ms.TripToMemory;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Turg = mode_lib-&gt;ms.UrgLatency;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;setup_for_tdlut = display_cfg-&gt;plane_descriptors[k].tdlut.setup_for_tdlut;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;tdlut_pte_bytes_per_frame = s-&gt;tdlut_pte_bytes_per_frame[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;tdlut_bytes_per_frame = s-&gt;tdlut_bytes_per_frame[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;tdlut_opt_time = s-&gt;tdlut_opt_time[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;tdlut_drain_time = s-&gt;tdlut_drain_time[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;num_cursors = (display_cfg-&gt;plane_descriptors[k].cursor.cursor_width &gt; 0);</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;cursor_bytes_per_chunk = s-&gt;cursor_bytes_per_chunk[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;cursor_bytes_per_line = s-&gt;cursor_bytes_per_line[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;dcc_enable = display_cfg-&gt;plane_descriptors[k].surface.dcc.enable;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;mrq_present = mode_lib-&gt;ip.dcn_mrq_present;</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;meta_row_bytes = mode_lib-&gt;ms.meta_row_bytes[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;mall_prefetch_sdp_overhead_factor = mode_lib-&gt;ms.mall_prefetch_sdp_overhead_factor[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;impacted_dst_y_pre = s-&gt;impacted_dst_y_pre[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;vactive_sw_bw_l = mode_lib-&gt;ms.vactive_sw_bw_l[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;vactive_sw_bw_c = mode_lib-&gt;ms.vactive_sw_bw_c[k];</div><div class='add'>+</div><div class='add'>+			// output</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DSTXAfterScaler = &amp;s-&gt;DSTXAfterScaler[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;DSTYAfterScaler = &amp;s-&gt;DSTYAfterScaler[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;dst_y_prefetch = &amp;mode_lib-&gt;ms.dst_y_prefetch[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;dst_y_per_vm_vblank = &amp;mode_lib-&gt;ms.LinesForVM[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;dst_y_per_row_vblank = &amp;mode_lib-&gt;ms.LinesForDPTERow[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VRatioPrefetchY = &amp;mode_lib-&gt;ms.VRatioPreY[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VRatioPrefetchC = &amp;mode_lib-&gt;ms.VRatioPreC[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;RequiredPrefetchPixelDataBWLuma = &amp;mode_lib-&gt;ms.RequiredPrefetchPixelDataBWLuma[k]; // prefetch_sw_bw_l</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;RequiredPrefetchPixelDataBWChroma = &amp;mode_lib-&gt;ms.RequiredPrefetchPixelDataBWChroma[k]; // prefetch_sw_bw_c</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;RequiredPrefetchBWOTO = &amp;mode_lib-&gt;ms.RequiredPrefetchBWOTO[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;NotEnoughTimeForDynamicMetadata = &amp;mode_lib-&gt;ms.NoTimeForDynamicMetadata[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tno_bw = &amp;mode_lib-&gt;ms.Tno_bw[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tno_bw_flip = &amp;mode_lib-&gt;ms.Tno_bw_flip[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;prefetch_vmrow_bw = &amp;mode_lib-&gt;ms.prefetch_vmrow_bw[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tdmdl_vm = &amp;s-&gt;dummy_single[0];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tdmdl = &amp;s-&gt;dummy_single[1];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;TSetup = &amp;s-&gt;dummy_single[2];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tvm_trips = &amp;s-&gt;Tvm_trips[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tr0_trips = &amp;s-&gt;Tr0_trips[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tvm_trips_flip = &amp;s-&gt;Tvm_trips_flip[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tr0_trips_flip = &amp;s-&gt;Tr0_trips_flip[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tvm_trips_flip_rounded = &amp;s-&gt;Tvm_trips_flip_rounded[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tr0_trips_flip_rounded = &amp;s-&gt;Tr0_trips_flip_rounded[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VUpdateOffsetPix = &amp;s-&gt;dummy_integer[0];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VUpdateWidthPix = &amp;s-&gt;dummy_integer[1];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;VReadyOffsetPix = &amp;s-&gt;dummy_integer[2];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;prefetch_cursor_bw = &amp;mode_lib-&gt;ms.prefetch_cursor_bw[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;prefetch_sw_bytes = &amp;s-&gt;prefetch_sw_bytes[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tpre_rounded = &amp;s-&gt;Tpre_rounded[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;Tpre_oto = &amp;s-&gt;Tpre_oto[k];</div><div class='add'>+			CalculatePrefetchSchedule_params-&gt;prefetch_swath_time_us = &amp;s-&gt;prefetch_swath_time_us[k];</div><div class='add'>+</div><div class='add'>+			mode_lib-&gt;ms.NoTimeForPrefetch[k] = CalculatePrefetchSchedule(&amp;mode_lib-&gt;scratch, CalculatePrefetchSchedule_params);</div><div class='add'>+</div><div class='add'>+			mode_lib-&gt;ms.support.PrefetchSupported &amp;= !mode_lib-&gt;ms.NoTimeForPrefetch[k];</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, dst_y_per_vm_vblank = %f\n", __func__, k, *CalculatePrefetchSchedule_params-&gt;dst_y_per_vm_vblank);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, dst_y_per_row_vblank = %f\n", __func__, k, *CalculatePrefetchSchedule_params-&gt;dst_y_per_row_vblank);</div><div class='add'>+		} // for k num_planes</div><div class='add'>+</div><div class='add'>+		CalculateDCFCLKDeepSleepTdlut(</div><div class='add'>+			display_cfg,</div><div class='add'>+			mode_lib-&gt;ms.num_active_planes,</div><div class='add'>+			mode_lib-&gt;ms.BytePerPixelY,</div><div class='add'>+			mode_lib-&gt;ms.BytePerPixelC,</div><div class='add'>+			mode_lib-&gt;ms.SwathWidthY,</div><div class='add'>+			mode_lib-&gt;ms.SwathWidthC,</div><div class='add'>+			mode_lib-&gt;ms.NoOfDPP,</div><div class='add'>+			mode_lib-&gt;ms.PSCL_FACTOR,</div><div class='add'>+			mode_lib-&gt;ms.PSCL_FACTOR_CHROMA,</div><div class='add'>+			mode_lib-&gt;ms.RequiredDPPCLK,</div><div class='add'>+			mode_lib-&gt;ms.vactive_sw_bw_l,</div><div class='add'>+			mode_lib-&gt;ms.vactive_sw_bw_c,</div><div class='add'>+			mode_lib-&gt;soc.return_bus_width_bytes,</div><div class='add'>+			mode_lib-&gt;ms.RequiredDISPCLK,</div><div class='add'>+			s-&gt;tdlut_bytes_to_deliver,</div><div class='add'>+			s-&gt;prefetch_swath_time_us,</div><div class='add'>+</div><div class='add'>+			/* Output */</div><div class='add'>+			&amp;mode_lib-&gt;ms.dcfclk_deepsleep);</div><div class='add'>+</div><div class='add'>+		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='add'>+			if (mode_lib-&gt;ms.dst_y_prefetch[k] &lt; 2.0</div><div class='add'>+				|| mode_lib-&gt;ms.LinesForVM[k] &gt;= 32.0</div><div class='add'>+				|| mode_lib-&gt;ms.LinesForDPTERow[k] &gt;= 16.0</div><div class='add'>+				|| mode_lib-&gt;ms.NoTimeForPrefetch[k] == true</div><div class='add'>+				|| s-&gt;DSTYAfterScaler[k] &gt; 8) {</div><div class='add'>+				mode_lib-&gt;ms.support.PrefetchSupported = false;</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, dst_y_prefetch=%f (should not be &lt; 2)\n", __func__, k, mode_lib-&gt;ms.dst_y_prefetch[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, LinesForVM=%f (should not be &gt;= 32)\n", __func__, k, mode_lib-&gt;ms.LinesForVM[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, LinesForDPTERow=%f (should not be &gt;= 16)\n", __func__, k, mode_lib-&gt;ms.LinesForDPTERow[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, DSTYAfterScaler=%d (should be &lt;= 8)\n", __func__, k, s-&gt;DSTYAfterScaler[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, NoTimeForPrefetch=%d\n", __func__, k, mode_lib-&gt;ms.NoTimeForPrefetch[k]);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mode_lib-&gt;ms.support.DynamicMetadataSupported = true;</div><div class='add'>+		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; ++k) {</div><div class='add'>+			if (mode_lib-&gt;ms.NoTimeForDynamicMetadata[k] == true) {</div><div class='add'>+				mode_lib-&gt;ms.support.DynamicMetadataSupported = false;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mode_lib-&gt;ms.support.VRatioInPrefetchSupported = true;</div><div class='add'>+		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='add'>+			if (mode_lib-&gt;ms.VRatioPreY[k] &gt; __DML2_CALCS_MAX_VRATIO_PRE__ ||</div><div class='add'>+				mode_lib-&gt;ms.VRatioPreC[k] &gt; __DML2_CALCS_MAX_VRATIO_PRE__) {</div><div class='add'>+				mode_lib-&gt;ms.support.VRatioInPrefetchSupported = false;</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d VRatioPreY = %f (should be &lt;= %f)\n", __func__, k, mode_lib-&gt;ms.VRatioPreY[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d VRatioPreC = %f (should be &lt;= %f)\n", __func__, k, mode_lib-&gt;ms.VRatioPreC[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: VRatioInPrefetchSupported = %u\n", __func__, mode_lib-&gt;ms.support.VRatioInPrefetchSupported);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mode_lib-&gt;ms.support.PrefetchSupported &amp;= mode_lib-&gt;ms.support.VRatioInPrefetchSupported;</div><div class='add'>+</div><div class='add'>+		// By default, do not recalc prefetch schedule</div><div class='add'>+		s-&gt;recalc_prefetch_schedule = 0;</div><div class='add'>+</div><div class='add'>+		// Only do urg vs prefetch bandwidth check, flip schedule check, power saving feature support check IF the Prefetch Schedule Check is ok</div><div class='add'>+		if (mode_lib-&gt;ms.support.PrefetchSupported) {</div><div class='add'>+			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='add'>+				// Calculate Urgent burst factor for prefetch</div><div class='add'>+#ifdef __DML_VBA_DEBUG__</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, Calling CalculateUrgentBurstFactor (for prefetch)\n", __func__, k);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, VRatioPreY=%f\n", __func__, k, mode_lib-&gt;ms.VRatioPreY[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, VRatioPreC=%f\n", __func__, k, mode_lib-&gt;ms.VRatioPreC[k]);</div><div class='add'>+#endif</div><div class='add'>+				CalculateUrgentBurstFactor(</div><div class='add'>+					&amp;display_cfg-&gt;plane_descriptors[k],</div><div class='add'>+					mode_lib-&gt;ms.swath_width_luma_ub[k],</div><div class='add'>+					mode_lib-&gt;ms.swath_width_chroma_ub[k],</div><div class='add'>+					mode_lib-&gt;ms.SwathHeightY[k],</div><div class='add'>+					mode_lib-&gt;ms.SwathHeightC[k],</div><div class='add'>+					s-&gt;line_times[k],</div><div class='add'>+					mode_lib-&gt;ms.UrgLatency,</div><div class='add'>+					mode_lib-&gt;ms.VRatioPreY[k],</div><div class='add'>+					mode_lib-&gt;ms.VRatioPreC[k],</div><div class='add'>+					mode_lib-&gt;ms.BytePerPixelInDETY[k],</div><div class='add'>+					mode_lib-&gt;ms.BytePerPixelInDETC[k],</div><div class='add'>+					mode_lib-&gt;ms.DETBufferSizeY[k],</div><div class='add'>+					mode_lib-&gt;ms.DETBufferSizeC[k],</div><div class='add'>+					/* Output */</div><div class='add'>+					&amp;mode_lib-&gt;ms.UrgentBurstFactorLumaPre[k],</div><div class='add'>+					&amp;mode_lib-&gt;ms.UrgentBurstFactorChromaPre[k],</div><div class='add'>+					&amp;mode_lib-&gt;ms.NotEnoughUrgentLatencyHidingPre[k]);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			// Calculate urgent bandwidth required, both urg and non urg peak bandwidth</div><div class='add'>+			// assume flip bw is 0 at this point</div><div class='add'>+			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++)</div><div class='add'>+				mode_lib-&gt;ms.final_flip_bw[k] = 0;</div><div class='add'>+</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urg_vactive_bandwidth_required = mode_lib-&gt;ms.support.urg_vactive_bandwidth_required;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urg_bandwidth_required = mode_lib-&gt;ms.support.urg_bandwidth_required;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urg_bandwidth_required_qual = mode_lib-&gt;ms.support.urg_bandwidth_required_qual;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;non_urg_bandwidth_required = mode_lib-&gt;ms.support.non_urg_bandwidth_required;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;surface_avg_vactive_required_bw = mode_lib-&gt;ms.surface_avg_vactive_required_bw;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;surface_peak_required_bw = mode_lib-&gt;ms.surface_peak_required_bw;</div><div class='add'>+</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;display_cfg = display_cfg;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;inc_flip_bw = 0;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;num_active_planes =  mode_lib-&gt;ms.num_active_planes;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;num_of_dpp = mode_lib-&gt;ms.NoOfDPP;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p0;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p1;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p0;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p1;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;mall_prefetch_sdp_overhead_factor = mode_lib-&gt;ms.mall_prefetch_sdp_overhead_factor;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;mall_prefetch_dram_overhead_factor = mode_lib-&gt;ms.mall_prefetch_dram_overhead_factor;</div><div class='add'>+</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_l = mode_lib-&gt;ms.vactive_sw_bw_l;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_c = mode_lib-&gt;ms.vactive_sw_bw_c;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_l = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWLuma;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_c = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWChroma;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_oto = mode_lib-&gt;ms.RequiredPrefetchBWOTO;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_l = mode_lib-&gt;ms.excess_vactive_fill_bw_l;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_c = mode_lib-&gt;ms.excess_vactive_fill_bw_c;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;cursor_bw = mode_lib-&gt;ms.cursor_bw;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;dpte_row_bw = mode_lib-&gt;ms.dpte_row_bw;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;meta_row_bw = mode_lib-&gt;ms.meta_row_bw;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;prefetch_cursor_bw = mode_lib-&gt;ms.prefetch_cursor_bw;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;prefetch_vmrow_bw = mode_lib-&gt;ms.prefetch_vmrow_bw;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;flip_bw = mode_lib-&gt;ms.final_flip_bw;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_l = mode_lib-&gt;ms.UrgentBurstFactorLuma;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_c = mode_lib-&gt;ms.UrgentBurstFactorChroma;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursor;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_l = mode_lib-&gt;ms.UrgentBurstFactorLumaPre;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_c = mode_lib-&gt;ms.UrgentBurstFactorChromaPre;</div><div class='add'>+			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursorPre;</div><div class='add'>+</div><div class='add'>+			calculate_peak_bandwidth_required(</div><div class='add'>+					&amp;mode_lib-&gt;scratch,</div><div class='add'>+					calculate_peak_bandwidth_params);</div><div class='add'>+</div><div class='add'>+			// Check urg peak bandwidth against available urg bw</div><div class='add'>+			// check at SDP and DRAM, for all soc states (SVP prefetch an Sys Active)</div><div class='add'>+			check_urgent_bandwidth_support(</div><div class='add'>+				&amp;s-&gt;dummy_single[0], // double* frac_urg_bandwidth</div><div class='add'>+				&amp;s-&gt;dummy_single[1], // double* frac_urg_bandwidth_mall</div><div class='add'>+				&amp;mode_lib-&gt;ms.support.UrgVactiveBandwidthSupport,</div><div class='add'>+				&amp;mode_lib-&gt;ms.support.PrefetchBandwidthSupported,</div><div class='add'>+</div><div class='add'>+				mode_lib-&gt;soc.mall_allocated_for_dcn_mbytes,</div><div class='add'>+				mode_lib-&gt;ms.support.non_urg_bandwidth_required,</div><div class='add'>+				mode_lib-&gt;ms.support.urg_vactive_bandwidth_required,</div><div class='add'>+				mode_lib-&gt;ms.support.urg_bandwidth_required,</div><div class='add'>+				mode_lib-&gt;ms.support.urg_bandwidth_available);</div><div class='add'>+</div><div class='add'>+			mode_lib-&gt;ms.support.PrefetchSupported &amp;= mode_lib-&gt;ms.support.PrefetchBandwidthSupported;</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: PrefetchBandwidthSupported=%0d\n", __func__, mode_lib-&gt;ms.support.PrefetchBandwidthSupported);</div><div class='add'>+</div><div class='add'>+			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='add'>+				if (mode_lib-&gt;ms.NotEnoughUrgentLatencyHidingPre[k]) {</div><div class='add'>+					mode_lib-&gt;ms.support.PrefetchSupported = false;</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%d, NotEnoughUrgentLatencyHidingPre=%d\n", __func__, k, mode_lib-&gt;ms.NotEnoughUrgentLatencyHidingPre[k]);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+#ifdef DML_GLOBAL_PREFETCH_CHECK</div><div class='add'>+			if (mode_lib-&gt;ms.support.PrefetchSupported &amp;&amp; mode_lib-&gt;ms.num_active_planes &gt; 1 &amp;&amp; s-&gt;recalc_prefetch_done == 0) {</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;num_active_planes =  mode_lib-&gt;ms.num_active_planes;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;pixel_format = s-&gt;pixel_format;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;chunk_bytes_l = mode_lib-&gt;ip.pixel_chunk_size_kbytes * 1024;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;chunk_bytes_c = mode_lib-&gt;ip.pixel_chunk_size_kbytes * 1024;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;lb_source_lines_l = s-&gt;lb_source_lines_l;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;lb_source_lines_c = s-&gt;lb_source_lines_c;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;swath_height_l =  mode_lib-&gt;ms.SwathHeightY;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;swath_height_c =  mode_lib-&gt;ms.SwathHeightC;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;rob_buffer_size_kbytes = mode_lib-&gt;ip.rob_buffer_size_kbytes;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;compressed_buffer_size_kbytes = mode_lib-&gt;ms.CompressedBufferSizeInkByte;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;detile_buffer_size_bytes_l = mode_lib-&gt;ms.DETBufferSizeY;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;detile_buffer_size_bytes_c = mode_lib-&gt;ms.DETBufferSizeC;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;full_swath_bytes_l = s-&gt;full_swath_bytes_l;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;full_swath_bytes_c = s-&gt;full_swath_bytes_c;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;prefetch_sw_bytes = s-&gt;prefetch_sw_bytes;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;Tpre_rounded = s-&gt;Tpre_rounded;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;Tpre_oto = s-&gt;Tpre_oto;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps = mode_lib-&gt;ms.support.urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp];</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;line_time = s-&gt;line_times;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;dst_y_prefetch = mode_lib-&gt;ms.dst_y_prefetch;</div><div class='add'>+				if (CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps &lt; 10 * 1024)</div><div class='add'>+					CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps = 10 * 1024;</div><div class='add'>+</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;estimated_dcfclk_mhz = (CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps / (double) mode_lib-&gt;soc.return_bus_width_bytes) /</div><div class='add'>+																				((double)mode_lib-&gt;soc.qos_parameters.derate_table.system_active_urgent.dcfclk_derate_percent / 100.0);</div><div class='add'>+</div><div class='add'>+				// if recalc_prefetch_schedule is set, recalculate the prefetch schedule with the new impacted_Tpre, prefetch should be possible</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;recalc_prefetch_schedule = &amp;s-&gt;recalc_prefetch_schedule;</div><div class='add'>+				CheckGlobalPrefetchAdmissibility_params-&gt;impacted_dst_y_pre = s-&gt;impacted_dst_y_pre;</div><div class='add'>+				mode_lib-&gt;ms.support.PrefetchSupported = CheckGlobalPrefetchAdmissibility(&amp;mode_lib-&gt;scratch, CheckGlobalPrefetchAdmissibility_params);</div><div class='add'>+				s-&gt;recalc_prefetch_done = 1;</div><div class='add'>+				s-&gt;recalc_prefetch_schedule = 1;</div><div class='add'>+			}</div><div class='add'>+#endif</div><div class='add'>+		} // prefetch schedule ok, do urg bw and flip schedule</div><div class='add'>+	} while (s-&gt;recalc_prefetch_schedule);</div><div class='add'>+</div><div class='add'>+	// Flip Schedule</div><div class='add'>+	// Both prefetch schedule and BW okay</div><div class='add'>+	if (mode_lib-&gt;ms.support.PrefetchSupported == true) {</div><div class='add'>+		mode_lib-&gt;ms.BandwidthAvailableForImmediateFlip =</div><div class='add'>+			get_bandwidth_available_for_immediate_flip(</div><div class='add'>+				dml2_core_internal_soc_state_sys_active,</div><div class='add'>+				mode_lib-&gt;ms.support.urg_bandwidth_required_qual, // no flip</div><div class='add'>+				mode_lib-&gt;ms.support.urg_bandwidth_available);</div><div class='add'>+</div><div class='add'>+		mode_lib-&gt;ms.TotImmediateFlipBytes = 0;</div><div class='add'>+		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='add'>+			if (display_cfg-&gt;plane_descriptors[k].immediate_flip) {</div><div class='add'>+				s-&gt;per_pipe_flip_bytes[k] = get_pipe_flip_bytes(</div><div class='add'>+								s-&gt;HostVMInefficiencyFactor,</div><div class='add'>+								mode_lib-&gt;ms.vm_bytes[k],</div><div class='add'>+								mode_lib-&gt;ms.DPTEBytesPerRow[k],</div><div class='add'>+								mode_lib-&gt;ms.meta_row_bytes[k]);</div><div class='add'>+			} else {</div><div class='add'>+				s-&gt;per_pipe_flip_bytes[k] = 0;</div><div class='add'>+			}</div><div class='add'>+			mode_lib-&gt;ms.TotImmediateFlipBytes += s-&gt;per_pipe_flip_bytes[k] * mode_lib-&gt;ms.NoOfDPP[k];</div><div class='add'>+</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='add'>+			CalculateFlipSchedule(</div><div class='add'>+				&amp;mode_lib-&gt;scratch,</div><div class='add'>+				display_cfg-&gt;plane_descriptors[k].immediate_flip,</div><div class='add'>+				1, // use_lb_flip_bw</div><div class='add'>+				s-&gt;HostVMInefficiencyFactor,</div><div class='add'>+				s-&gt;Tvm_trips_flip[k],</div><div class='add'>+				s-&gt;Tr0_trips_flip[k],</div><div class='add'>+				s-&gt;Tvm_trips_flip_rounded[k],</div><div class='add'>+				s-&gt;Tr0_trips_flip_rounded[k],</div><div class='add'>+				display_cfg-&gt;gpuvm_enable,</div><div class='add'>+				mode_lib-&gt;ms.vm_bytes[k],</div><div class='add'>+				mode_lib-&gt;ms.DPTEBytesPerRow[k],</div><div class='add'>+				mode_lib-&gt;ms.BandwidthAvailableForImmediateFlip,</div><div class='add'>+				mode_lib-&gt;ms.TotImmediateFlipBytes,</div><div class='add'>+				display_cfg-&gt;plane_descriptors[k].pixel_format,</div><div class='add'>+				(display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)),</div><div class='add'>+				display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio,</div><div class='add'>+				display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio,</div><div class='add'>+				mode_lib-&gt;ms.Tno_bw_flip[k],</div><div class='add'>+				mode_lib-&gt;ms.dpte_row_height[k],</div><div class='add'>+				mode_lib-&gt;ms.dpte_row_height_chroma[k],</div><div class='add'>+				mode_lib-&gt;ms.use_one_row_for_frame_flip[k],</div><div class='add'>+				mode_lib-&gt;ip.max_flip_time_us,</div><div class='add'>+				mode_lib-&gt;ip.max_flip_time_lines,</div><div class='add'>+				s-&gt;per_pipe_flip_bytes[k],</div><div class='add'>+				mode_lib-&gt;ms.meta_row_bytes[k],</div><div class='add'>+				s-&gt;meta_row_height_luma[k],</div><div class='add'>+				s-&gt;meta_row_height_chroma[k],</div><div class='add'>+				mode_lib-&gt;ip.dcn_mrq_present &amp;&amp; display_cfg-&gt;plane_descriptors[k].surface.dcc.enable,</div><div class='add'>+</div><div class='add'>+				/* Output */</div><div class='add'>+				&amp;mode_lib-&gt;ms.dst_y_per_vm_flip[k],</div><div class='add'>+				&amp;mode_lib-&gt;ms.dst_y_per_row_flip[k],</div><div class='add'>+				&amp;mode_lib-&gt;ms.final_flip_bw[k],</div><div class='add'>+				&amp;mode_lib-&gt;ms.ImmediateFlipSupportedForPipe[k]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urg_vactive_bandwidth_required = s-&gt;dummy_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urg_bandwidth_required = mode_lib-&gt;ms.support.urg_bandwidth_required_flip;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urg_bandwidth_required_qual = s-&gt;dummy_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;non_urg_bandwidth_required = mode_lib-&gt;ms.support.non_urg_bandwidth_required_flip;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;surface_avg_vactive_required_bw = s-&gt;surface_dummy_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;surface_peak_required_bw = mode_lib-&gt;ms.surface_peak_required_bw;</div><div class='add'>+</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;display_cfg = display_cfg;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;inc_flip_bw = 1;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;num_active_planes = mode_lib-&gt;ms.num_active_planes;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;num_of_dpp = mode_lib-&gt;ms.NoOfDPP;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p0;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p1;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p0;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p1;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;mall_prefetch_sdp_overhead_factor = mode_lib-&gt;ms.mall_prefetch_sdp_overhead_factor;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;mall_prefetch_dram_overhead_factor = mode_lib-&gt;ms.mall_prefetch_dram_overhead_factor;</div><div class='add'>+</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_l = mode_lib-&gt;ms.vactive_sw_bw_l;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_c = mode_lib-&gt;ms.vactive_sw_bw_c;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_l = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWLuma;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_c = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWChroma;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_oto = mode_lib-&gt;ms.RequiredPrefetchBWOTO;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_l = mode_lib-&gt;ms.excess_vactive_fill_bw_l;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_c = mode_lib-&gt;ms.excess_vactive_fill_bw_c;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;cursor_bw = mode_lib-&gt;ms.cursor_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;dpte_row_bw = mode_lib-&gt;ms.dpte_row_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;meta_row_bw = mode_lib-&gt;ms.meta_row_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;prefetch_cursor_bw = mode_lib-&gt;ms.prefetch_cursor_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;prefetch_vmrow_bw = mode_lib-&gt;ms.prefetch_vmrow_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;flip_bw = mode_lib-&gt;ms.final_flip_bw;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urgent_burst_factor_l = mode_lib-&gt;ms.UrgentBurstFactorLuma;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urgent_burst_factor_c = mode_lib-&gt;ms.UrgentBurstFactorChroma;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urgent_burst_factor_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursor;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_l = mode_lib-&gt;ms.UrgentBurstFactorLumaPre;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_c = mode_lib-&gt;ms.UrgentBurstFactorChromaPre;</div><div class='add'>+		calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursorPre;</div><div class='add'>+</div><div class='add'>+		calculate_peak_bandwidth_required(</div><div class='add'>+				&amp;mode_lib-&gt;scratch,</div><div class='add'>+				calculate_peak_bandwidth_params);</div><div class='add'>+</div><div class='add'>+		calculate_immediate_flip_bandwidth_support(</div><div class='add'>+			&amp;s-&gt;dummy_single[0], // double* frac_urg_bandwidth_flip</div><div class='add'>+			&amp;mode_lib-&gt;ms.support.ImmediateFlipSupport,</div><div class='add'>+</div><div class='add'>+			dml2_core_internal_soc_state_sys_active,</div><div class='add'>+			mode_lib-&gt;ms.support.urg_bandwidth_required_flip,</div><div class='add'>+			mode_lib-&gt;ms.support.non_urg_bandwidth_required_flip,</div><div class='add'>+			mode_lib-&gt;ms.support.urg_bandwidth_available);</div><div class='add'>+</div><div class='add'>+		for (k = 0; k &lt;= mode_lib-&gt;ms.num_active_planes - 1; k++) {</div><div class='add'>+			if (display_cfg-&gt;plane_descriptors[k].immediate_flip == true &amp;&amp; mode_lib-&gt;ms.ImmediateFlipSupportedForPipe[k] == false)</div><div class='add'>+				mode_lib-&gt;ms.support.ImmediateFlipSupport = false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	} else { // if prefetch not support, assume iflip is not supported too</div><div class='add'>+		mode_lib-&gt;ms.support.ImmediateFlipSupport = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	s-&gt;mSOCParameters.UrgentLatency = mode_lib-&gt;ms.UrgLatency;</div><div class='add'>+	s-&gt;mSOCParameters.ExtraLatency = mode_lib-&gt;ms.ExtraLatency;</div><div class='add'>+	s-&gt;mSOCParameters.ExtraLatency_sr = mode_lib-&gt;ms.ExtraLatency_sr;</div><div class='add'>+	s-&gt;mSOCParameters.WritebackLatency = mode_lib-&gt;soc.qos_parameters.writeback.base_latency_us;</div><div class='add'>+	s-&gt;mSOCParameters.DRAMClockChangeLatency = mode_lib-&gt;soc.power_management_parameters.dram_clk_change_blackout_us;</div><div class='add'>+	s-&gt;mSOCParameters.FCLKChangeLatency = mode_lib-&gt;soc.power_management_parameters.fclk_change_blackout_us;</div><div class='add'>+	s-&gt;mSOCParameters.SRExitTime = mode_lib-&gt;soc.power_management_parameters.stutter_exit_latency_us;</div><div class='add'>+	s-&gt;mSOCParameters.SREnterPlusExitTime = mode_lib-&gt;soc.power_management_parameters.stutter_enter_plus_exit_latency_us;</div><div class='add'>+	s-&gt;mSOCParameters.SRExitZ8Time = mode_lib-&gt;soc.power_management_parameters.z8_stutter_exit_latency_us;</div><div class='add'>+	s-&gt;mSOCParameters.SREnterPlusExitZ8Time = mode_lib-&gt;soc.power_management_parameters.z8_stutter_enter_plus_exit_latency_us;</div><div class='add'>+	s-&gt;mSOCParameters.USRRetrainingLatency = 0;</div><div class='add'>+	s-&gt;mSOCParameters.SMNLatency = 0;</div><div class='add'>+	s-&gt;mSOCParameters.g6_temp_read_blackout_us = get_g6_temp_read_blackout_us(&amp;mode_lib-&gt;soc, (unsigned int)(mode_lib-&gt;ms.uclk_freq_mhz * 1000), mode_lib-&gt;ms.state_idx);</div><div class='add'>+	s-&gt;mSOCParameters.max_urgent_latency_us = get_max_urgent_latency_us(&amp;mode_lib-&gt;soc.qos_parameters.qos_params.dcn4x, mode_lib-&gt;ms.uclk_freq_mhz, mode_lib-&gt;ms.FabricClock, mode_lib-&gt;ms.state_idx);</div><div class='add'>+	s-&gt;mSOCParameters.df_response_time_us = mode_lib-&gt;soc.qos_parameters.qos_params.dcn4x.df_qos_response_time_fclk_cycles / mode_lib-&gt;ms.FabricClock;</div><div class='add'>+	s-&gt;mSOCParameters.qos_type = mode_lib-&gt;soc.qos_parameters.qos_type;</div><div class='add'>+</div><div class='add'>+	CalculateWatermarks_params-&gt;display_cfg = display_cfg;</div><div class='add'>+	CalculateWatermarks_params-&gt;USRRetrainingRequired = false;</div><div class='add'>+	CalculateWatermarks_params-&gt;NumberOfActiveSurfaces = mode_lib-&gt;ms.num_active_planes;</div><div class='add'>+	CalculateWatermarks_params-&gt;MaxLineBufferLines = mode_lib-&gt;ip.max_line_buffer_lines;</div><div class='add'>+	CalculateWatermarks_params-&gt;LineBufferSize = mode_lib-&gt;ip.line_buffer_size_bits;</div><div class='add'>+	CalculateWatermarks_params-&gt;WritebackInterfaceBufferSize = mode_lib-&gt;ip.writeback_interface_buffer_size_kbytes;</div><div class='add'>+	CalculateWatermarks_params-&gt;DCFCLK = mode_lib-&gt;ms.DCFCLK;</div><div class='add'>+	CalculateWatermarks_params-&gt;SynchronizeTimings = display_cfg-&gt;overrides.synchronize_timings;</div><div class='add'>+	CalculateWatermarks_params-&gt;SynchronizeDRRDisplaysForUCLKPStateChange = display_cfg-&gt;overrides.synchronize_ddr_displays_for_uclk_pstate_change;</div><div class='add'>+	CalculateWatermarks_params-&gt;dpte_group_bytes = mode_lib-&gt;ms.dpte_group_bytes;</div><div class='add'>+	CalculateWatermarks_params-&gt;mmSOCParameters = s-&gt;mSOCParameters;</div><div class='add'>+	CalculateWatermarks_params-&gt;WritebackChunkSize = mode_lib-&gt;ip.writeback_chunk_size_kbytes;</div><div class='add'>+	CalculateWatermarks_params-&gt;SOCCLK = mode_lib-&gt;ms.SOCCLK;</div><div class='add'>+	CalculateWatermarks_params-&gt;DCFClkDeepSleep = mode_lib-&gt;ms.dcfclk_deepsleep;</div><div class='add'>+	CalculateWatermarks_params-&gt;DETBufferSizeY = mode_lib-&gt;ms.DETBufferSizeY;</div><div class='add'>+	CalculateWatermarks_params-&gt;DETBufferSizeC = mode_lib-&gt;ms.DETBufferSizeC;</div><div class='add'>+	CalculateWatermarks_params-&gt;SwathHeightY = mode_lib-&gt;ms.SwathHeightY;</div><div class='add'>+	CalculateWatermarks_params-&gt;SwathHeightC = mode_lib-&gt;ms.SwathHeightC;</div><div class='add'>+	CalculateWatermarks_params-&gt;SwathWidthY = mode_lib-&gt;ms.SwathWidthY;</div><div class='add'>+	CalculateWatermarks_params-&gt;SwathWidthC = mode_lib-&gt;ms.SwathWidthC;</div><div class='add'>+	CalculateWatermarks_params-&gt;DPPPerSurface = mode_lib-&gt;ms.NoOfDPP;</div><div class='add'>+	CalculateWatermarks_params-&gt;BytePerPixelDETY = mode_lib-&gt;ms.BytePerPixelInDETY;</div><div class='add'>+	CalculateWatermarks_params-&gt;BytePerPixelDETC = mode_lib-&gt;ms.BytePerPixelInDETC;</div><div class='add'>+	CalculateWatermarks_params-&gt;DSTXAfterScaler = s-&gt;DSTXAfterScaler;</div><div class='add'>+	CalculateWatermarks_params-&gt;DSTYAfterScaler = s-&gt;DSTYAfterScaler;</div><div class='add'>+	CalculateWatermarks_params-&gt;UnboundedRequestEnabled = mode_lib-&gt;ms.UnboundedRequestEnabled;</div><div class='add'>+	CalculateWatermarks_params-&gt;CompressedBufferSizeInkByte = mode_lib-&gt;ms.CompressedBufferSizeInkByte;</div><div class='add'>+	CalculateWatermarks_params-&gt;meta_row_height_l = s-&gt;meta_row_height_luma;</div><div class='add'>+	CalculateWatermarks_params-&gt;meta_row_height_c = s-&gt;meta_row_height_chroma;</div><div class='add'>+</div><div class='add'>+	// Output</div><div class='add'>+	CalculateWatermarks_params-&gt;Watermark = &amp;mode_lib-&gt;ms.support.watermarks; // Watermarks *Watermark</div><div class='add'>+	CalculateWatermarks_params-&gt;DRAMClockChangeSupport = mode_lib-&gt;ms.support.DRAMClockChangeSupport;</div><div class='add'>+	CalculateWatermarks_params-&gt;global_dram_clock_change_supported = &amp;mode_lib-&gt;ms.support.global_dram_clock_change_supported;</div><div class='add'>+	CalculateWatermarks_params-&gt;MaxActiveDRAMClockChangeLatencySupported = &amp;s-&gt;dummy_single_array[0]; // double *MaxActiveDRAMClockChangeLatencySupported[]</div><div class='add'>+	CalculateWatermarks_params-&gt;SubViewportLinesNeededInMALL = mode_lib-&gt;ms.SubViewportLinesNeededInMALL; // unsigned int SubViewportLinesNeededInMALL[]</div><div class='add'>+	CalculateWatermarks_params-&gt;FCLKChangeSupport = mode_lib-&gt;ms.support.FCLKChangeSupport;</div><div class='add'>+	CalculateWatermarks_params-&gt;global_fclk_change_supported = &amp;mode_lib-&gt;ms.support.global_fclk_change_supported;</div><div class='add'>+	CalculateWatermarks_params-&gt;MaxActiveFCLKChangeLatencySupported = &amp;s-&gt;dummy_single[0]; // double *MaxActiveFCLKChangeLatencySupported</div><div class='add'>+	CalculateWatermarks_params-&gt;USRRetrainingSupport = &amp;mode_lib-&gt;ms.support.USRRetrainingSupport;</div><div class='add'>+	CalculateWatermarks_params-&gt;g6_temp_read_support = &amp;mode_lib-&gt;ms.support.g6_temp_read_support;</div><div class='add'>+	CalculateWatermarks_params-&gt;VActiveLatencyHidingMargin = mode_lib-&gt;ms.VActiveLatencyHidingMargin;</div><div class='add'>+	CalculateWatermarks_params-&gt;VActiveLatencyHidingUs = mode_lib-&gt;ms.VActiveLatencyHidingUs;</div><div class='add'>+</div><div class='add'>+	CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(&amp;mode_lib-&gt;scratch, CalculateWatermarks_params);</div><div class='add'>+</div><div class='add'>+	calculate_pstate_keepout_dst_lines(display_cfg, &amp;mode_lib-&gt;ms.support.watermarks, s-&gt;dummy_integer_array[0]);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Done prefetch calculation\n", __func__);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out_params)</div><div class='ctx'> {</div><div class='ctx'> 	struct dml2_core_internal_display_mode_lib *mode_lib = in_out_params-&gt;mode_lib;</div><div class='ctx'> 	const struct dml2_display_cfg *display_cfg = in_out_params-&gt;in_display_cfg;</div><div class='ctx'> 	const struct dml2_mcg_min_clock_table *min_clk_table = in_out_params-&gt;min_clk_table;</div><div class='ctx'> </div><div class='del'>-#if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	double old_ReadBandwidthLuma;</div><div class='del'>-	double old_ReadBandwidthChroma;</div><div class='del'>-#endif</div><div class='ctx'> 	double outstanding_latency_us = 0;</div><div class='del'>-	double min_return_bw_for_latency;</div><div class='ctx'> </div><div class='ctx'> 	struct dml2_core_calcs_mode_support_locals *s = &amp;mode_lib-&gt;scratch.dml_core_mode_support_locals;</div><div class='del'>-	struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_params *CalculateWatermarks_params = &amp;mode_lib-&gt;scratch.CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_params;</div><div class='ctx'> 	struct dml2_core_calcs_CalculateVMRowAndSwath_params *CalculateVMRowAndSwath_params = &amp;mode_lib-&gt;scratch.CalculateVMRowAndSwath_params;</div><div class='ctx'> 	struct dml2_core_calcs_CalculateSwathAndDETConfiguration_params *CalculateSwathAndDETConfiguration_params = &amp;mode_lib-&gt;scratch.CalculateSwathAndDETConfiguration_params;</div><div class='del'>-	struct dml2_core_calcs_CalculatePrefetchSchedule_params *CalculatePrefetchSchedule_params = &amp;mode_lib-&gt;scratch.CalculatePrefetchSchedule_params;</div><div class='del'>-#ifdef DML_GLOBAL_PREFETCH_CHECK</div><div class='del'>-	struct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_params *CheckGlobalPrefetchAdmissibility_params = &amp;mode_lib-&gt;scratch.CheckGlobalPrefetchAdmissibility_params;</div><div class='del'>-#endif</div><div class='del'>-	struct dml2_core_calcs_calculate_tdlut_setting_params *calculate_tdlut_setting_params = &amp;mode_lib-&gt;scratch.calculate_tdlut_setting_params;</div><div class='ctx'> 	struct dml2_core_calcs_calculate_mcache_setting_params *calculate_mcache_setting_params = &amp;mode_lib-&gt;scratch.calculate_mcache_setting_params;</div><div class='del'>-	struct dml2_core_calcs_calculate_peak_bandwidth_required_params *calculate_peak_bandwidth_params = &amp;mode_lib-&gt;scratch.calculate_peak_bandwidth_params;</div><div class='ctx'> 	struct dml2_core_calcs_calculate_bytes_to_fetch_required_to_hide_latency_params *calculate_bytes_to_fetch_required_to_hide_latency_params = &amp;mode_lib-&gt;scratch.calculate_bytes_to_fetch_required_to_hide_latency_params;</div><div class='ctx'> 	unsigned int k, m, n;</div><div class='ctx'> </div><div class='hunk'>@@ -7374,9 +7932,9 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 	mode_lib-&gt;ms.FabricClock = ((double)min_clk_table-&gt;dram_bw_table.entries[in_out_params-&gt;min_clk_index].min_fclk_khz / 1000);</div><div class='ctx'> 	mode_lib-&gt;ms.MaxDCFCLK = (double)min_clk_table-&gt;max_clocks_khz.dcfclk / 1000;</div><div class='ctx'> 	mode_lib-&gt;ms.MaxFabricClock = (double)min_clk_table-&gt;max_clocks_khz.fclk / 1000;</div><div class='del'>-	mode_lib-&gt;ms.max_dispclk_freq_mhz = (double)min_clk_table-&gt;max_clocks_khz.dispclk / 1000;</div><div class='add'>+	mode_lib-&gt;ms.max_dispclk_freq_mhz = (double)min_clk_table-&gt;max_ss_clocks_khz.dispclk / 1000;</div><div class='ctx'> 	mode_lib-&gt;ms.max_dscclk_freq_mhz = (double)min_clk_table-&gt;max_clocks_khz.dscclk / 1000;</div><div class='del'>-	mode_lib-&gt;ms.max_dppclk_freq_mhz = (double)min_clk_table-&gt;max_clocks_khz.dppclk / 1000;</div><div class='add'>+	mode_lib-&gt;ms.max_dppclk_freq_mhz = (double)min_clk_table-&gt;max_ss_clocks_khz.dppclk / 1000;</div><div class='ctx'> 	mode_lib-&gt;ms.uclk_freq_mhz = dram_bw_kbps_to_uclk_mhz(min_clk_table-&gt;dram_bw_table.entries[in_out_params-&gt;min_clk_index].pre_derate_dram_bw_kbps, &amp;mode_lib-&gt;soc.clk_table.dram_config);</div><div class='ctx'> 	mode_lib-&gt;ms.dram_bw_mbps = ((double)min_clk_table-&gt;dram_bw_table.entries[in_out_params-&gt;min_clk_index].pre_derate_dram_bw_kbps / 1000);</div><div class='ctx'> 	mode_lib-&gt;ms.max_dram_bw_mbps = ((double)min_clk_table-&gt;dram_bw_table.entries[min_clk_table-&gt;dram_bw_table.num_entries - 1].pre_derate_dram_bw_kbps / 1000);</div><div class='hunk'>@@ -7384,25 +7942,25 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 	mode_lib-&gt;ms.active_min_uclk_dpm_index = get_active_min_uclk_dpm_index((unsigned int) (mode_lib-&gt;ms.uclk_freq_mhz * 1000.0), &amp;mode_lib-&gt;soc.clk_table);</div><div class='ctx'> </div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	dml2_printf("DML::%s: --- START --- \n", __func__);</div><div class='del'>-	dml2_printf("DML::%s: num_active_planes = %u\n", __func__, mode_lib-&gt;ms.num_active_planes);</div><div class='del'>-	dml2_printf("DML::%s: min_clk_index = %0d\n", __func__, in_out_params-&gt;min_clk_index);</div><div class='del'>-	dml2_printf("DML::%s: qos_param_index = %0d\n", __func__, mode_lib-&gt;ms.qos_param_index);</div><div class='del'>-	dml2_printf("DML::%s: SOCCLK = %f\n", __func__, mode_lib-&gt;ms.SOCCLK);</div><div class='del'>-	dml2_printf("DML::%s: dram_bw_mbps = %f\n", __func__, mode_lib-&gt;ms.dram_bw_mbps);</div><div class='del'>-	dml2_printf("DML::%s: uclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.uclk_freq_mhz);</div><div class='del'>-	dml2_printf("DML::%s: DCFCLK = %f\n", __func__, mode_lib-&gt;ms.DCFCLK);</div><div class='del'>-	dml2_printf("DML::%s: FabricClock = %f\n", __func__, mode_lib-&gt;ms.FabricClock);</div><div class='del'>-	dml2_printf("DML::%s: MaxDCFCLK = %f\n", __func__, mode_lib-&gt;ms.MaxDCFCLK);</div><div class='del'>-	dml2_printf("DML::%s: max_dispclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.max_dispclk_freq_mhz);</div><div class='del'>-	dml2_printf("DML::%s: max_dscclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.max_dscclk_freq_mhz);</div><div class='del'>-	dml2_printf("DML::%s: max_dppclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.max_dppclk_freq_mhz);</div><div class='del'>-	dml2_printf("DML::%s: MaxFabricClock = %f\n", __func__, mode_lib-&gt;ms.MaxFabricClock);</div><div class='del'>-	dml2_printf("DML::%s: ip.compressed_buffer_segment_size_in_kbytes = %u\n", __func__, mode_lib-&gt;ip.compressed_buffer_segment_size_in_kbytes);</div><div class='del'>-	dml2_printf("DML::%s: ip.dcn_mrq_present = %u\n", __func__, mode_lib-&gt;ip.dcn_mrq_present);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: --- START --- \n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_active_planes = %u\n", __func__, mode_lib-&gt;ms.num_active_planes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_clk_index = %0d\n", __func__, in_out_params-&gt;min_clk_index);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: qos_param_index = %0d\n", __func__, mode_lib-&gt;ms.qos_param_index);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SOCCLK = %f\n", __func__, mode_lib-&gt;ms.SOCCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dram_bw_mbps = %f\n", __func__, mode_lib-&gt;ms.dram_bw_mbps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: uclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.uclk_freq_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCFCLK = %f\n", __func__, mode_lib-&gt;ms.DCFCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: FabricClock = %f\n", __func__, mode_lib-&gt;ms.FabricClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxDCFCLK = %f\n", __func__, mode_lib-&gt;ms.MaxDCFCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_dispclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.max_dispclk_freq_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_dscclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.max_dscclk_freq_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_dppclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.max_dppclk_freq_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaxFabricClock = %f\n", __func__, mode_lib-&gt;ms.MaxFabricClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ip.compressed_buffer_segment_size_in_kbytes = %u\n", __func__, mode_lib-&gt;ip.compressed_buffer_segment_size_in_kbytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ip.dcn_mrq_present = %u\n", __func__, mode_lib-&gt;ip.dcn_mrq_present);</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++)</div><div class='del'>-		dml2_printf("DML::%s: plane_%d: reserved_vblank_time_ns = %u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: plane_%d: reserved_vblank_time_ns = %lu\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	CalculateMaxDETAndMinCompressedBufferSize(</div><div class='hunk'>@@ -7504,12 +8062,10 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			display_cfg-&gt;plane_descriptors[k].cursor.cursor_bpp / 8.0 / (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		old_ReadBandwidthLuma = mode_lib-&gt;ms.SwathWidthYSingleDPP[k] * math_ceil2(mode_lib-&gt;ms.BytePerPixelInDETY[k], 1.0) / (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio;</div><div class='del'>-		old_ReadBandwidthChroma = mode_lib-&gt;ms.SwathWidthYSingleDPP[k] / 2 * math_ceil2(mode_lib-&gt;ms.BytePerPixelInDETC[k], 2.0) / (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio / 2.0;</div><div class='del'>-		dml2_printf("DML::%s: k=%u, old_ReadBandwidthLuma = %f\n", __func__, k, old_ReadBandwidthLuma);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, old_ReadBandwidthChroma = %f\n", __func__, k, old_ReadBandwidthChroma);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, vactive_sw_bw_l = %f\n", __func__, k, mode_lib-&gt;ms.vactive_sw_bw_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, vactive_sw_bw_c = %f\n", __func__, k, mode_lib-&gt;ms.vactive_sw_bw_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, old_ReadBandwidthLuma = %f\n", __func__, k, mode_lib-&gt;ms.SwathWidthYSingleDPP[k] * math_ceil2(mode_lib-&gt;ms.BytePerPixelInDETY[k], 1.0) / (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, old_ReadBandwidthChroma = %f\n", __func__, k, mode_lib-&gt;ms.SwathWidthYSingleDPP[k] / 2 * math_ceil2(mode_lib-&gt;ms.BytePerPixelInDETC[k], 2.0) / (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio / 2.0);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, vactive_sw_bw_l = %f\n", __func__, k, mode_lib-&gt;ms.vactive_sw_bw_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, vactive_sw_bw_c = %f\n", __func__, k, mode_lib-&gt;ms.vactive_sw_bw_c[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7629,13 +8185,13 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 		mode_lib-&gt;ms.MaximumSwathWidthLuma[k] = math_min2(s-&gt;MaximumSwathWidthSupportLuma, mode_lib-&gt;ms.MaximumSwathWidthInLineBufferLuma);</div><div class='ctx'> 		mode_lib-&gt;ms.MaximumSwathWidthChroma[k] = math_min2(s-&gt;MaximumSwathWidthSupportChroma, mode_lib-&gt;ms.MaximumSwathWidthInLineBufferChroma);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathWidthLuma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthLuma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathWidthSupportLuma=%u\n", __func__, k, s-&gt;MaximumSwathWidthSupportLuma);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathWidthInLineBufferLuma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthInLineBufferLuma);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthLuma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthLuma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthSupportLuma=%u\n", __func__, k, s-&gt;MaximumSwathWidthSupportLuma);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthInLineBufferLuma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthInLineBufferLuma);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathWidthChroma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthChroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathWidthSupportChroma=%u\n", __func__, k, s-&gt;MaximumSwathWidthSupportChroma);</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaximumSwathWidthInLineBufferChroma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthInLineBufferChroma);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthChroma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthChroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthSupportChroma=%u\n", __func__, k, s-&gt;MaximumSwathWidthSupportChroma);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaximumSwathWidthInLineBufferChroma=%f\n", __func__, k, mode_lib-&gt;ms.MaximumSwathWidthInLineBufferChroma);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Cursor Support Check */</div><div class='hunk'>@@ -7672,11 +8228,11 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			mode_lib-&gt;ms.support.AlignedCPitch[k] &gt; display_cfg-&gt;plane_descriptors[k].surface.plane1.pitch) {</div><div class='ctx'> 			mode_lib-&gt;ms.support.PitchSupport = false;</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-			dml2_printf("DML::%s: k=%u AlignedYPitch = %d\n", __func__, k, mode_lib-&gt;ms.support.AlignedYPitch[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u PitchY = %d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane0.pitch);</div><div class='del'>-			dml2_printf("DML::%s: k=%u AlignedCPitch = %d\n", __func__, k, mode_lib-&gt;ms.support.AlignedCPitch[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u PitchC = %d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane1.pitch);</div><div class='del'>-			dml2_printf("DML::%s: k=%u PitchSupport = %d\n", __func__, k, mode_lib-&gt;ms.support.PitchSupport);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u AlignedYPitch = %d\n", __func__, k, mode_lib-&gt;ms.support.AlignedYPitch[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u PitchY = %ld\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane0.pitch);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u AlignedCPitch = %d\n", __func__, k, mode_lib-&gt;ms.support.AlignedCPitch[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u PitchC = %ld\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane1.pitch);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u PitchSupport = %d\n", __func__, k, mode_lib-&gt;ms.support.PitchSupport);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -7708,11 +8264,11 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 				display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height &gt; display_cfg-&gt;plane_descriptors[k].surface.plane0.height) {</div><div class='ctx'> 				mode_lib-&gt;ms.support.ViewportExceedsSurface = true;</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-				dml2_printf("DML::%s: k=%u ViewportWidth = %d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.width);</div><div class='del'>-				dml2_printf("DML::%s: k=%u SurfaceWidthY = %d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane0.width);</div><div class='del'>-				dml2_printf("DML::%s: k=%u ViewportHeight = %d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height);</div><div class='del'>-				dml2_printf("DML::%s: k=%u SurfaceHeightY = %d\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane0.height);</div><div class='del'>-				dml2_printf("DML::%s: k=%u ViewportExceedsSurface = %d\n", __func__, k, mode_lib-&gt;ms.support.ViewportExceedsSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u ViewportWidth = %ld\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.width);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u SurfaceWidthY = %ld\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane0.width);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u ViewportHeight = %ld\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u SurfaceHeightY = %ld\n", __func__, k, display_cfg-&gt;plane_descriptors[k].surface.plane0.height);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u ViewportExceedsSurface = %d\n", __func__, k, mode_lib-&gt;ms.support.ViewportExceedsSurface);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> 			if (dml_is_420(display_cfg-&gt;plane_descriptors[k].pixel_format) || display_cfg-&gt;plane_descriptors[k].pixel_format == dml2_rgbe_alpha) {</div><div class='hunk'>@@ -7894,8 +8450,8 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			mode_lib-&gt;ms.TotalNumberOfActiveDPP = mode_lib-&gt;ms.TotalNumberOfActiveDPP + s-&gt;NumberOfDPPDSC;</div><div class='ctx'> 		}</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-		dml2_printf("DML::%s: k=%d RequiresDSC = %d\n", __func__, k, mode_lib-&gt;ms.RequiresDSC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d ODMMode = %d\n", __func__, k, mode_lib-&gt;ms.ODMMode[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d RequiresDSC = %d\n", __func__, k, mode_lib-&gt;ms.RequiresDSC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d ODMMode = %d\n", __func__, k, mode_lib-&gt;ms.ODMMode[k]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		// ensure the number dsc slices is integer multiple based on ODM mode</div><div class='hunk'>@@ -7911,9 +8467,9 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 					mode_lib-&gt;ms.support.DSCSlicesODMModeSupported = ((mode_lib-&gt;ms.support.NumberOfDSCSlices[k] % 4) == 0);</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='ctx'> 				if (!mode_lib-&gt;ms.support.DSCSlicesODMModeSupported) {</div><div class='del'>-					dml2_printf("DML::%s: k=%d Invalid dsc num_slices and ODM mode setting\n", __func__, k);</div><div class='del'>-					dml2_printf("DML::%s: k=%d num_slices = %d\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.dsc.overrides.num_slices);</div><div class='del'>-					dml2_printf("DML::%s: k=%d ODMMode = %d\n", __func__, k, mode_lib-&gt;ms.ODMMode[k]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%d Invalid dsc num_slices and ODM mode setting\n", __func__, k);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%d num_slices = %d\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.dsc.overrides.num_slices);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%d ODMMode = %d\n", __func__, k, mode_lib-&gt;ms.ODMMode[k]);</div><div class='ctx'> 				}</div><div class='ctx'> #endif</div><div class='ctx'> 			} else {</div><div class='hunk'>@@ -7958,7 +8514,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			mode_lib-&gt;ms.MPCCombine[k] = false;</div><div class='ctx'> 			mode_lib-&gt;ms.NoOfDPP[k] = 1;</div><div class='ctx'> 			if (!mode_lib-&gt;ms.SingleDPPViewportSizeSupportPerSurface[k]) {</div><div class='del'>-				dml2_printf("WARNING: DML::%s: MPCC is override to disable but viewport is too large to be supported with single pipe!\n", __func__);</div><div class='add'>+				DML_LOG_VERBOSE("WARNING: DML::%s: MPCC is override to disable but viewport is too large to be supported with single pipe!\n", __func__);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if ((mode_lib-&gt;ms.MinDPPCLKUsingSingleDPP[k] &gt; mode_lib-&gt;ms.max_dppclk_freq_mhz) || !mode_lib-&gt;ms.SingleDPPViewportSizeSupportPerSurface[k]) {</div><div class='hunk'>@@ -7968,7 +8524,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-		dml2_printf("DML::%s: k=%d, NoOfDPP = %d\n", __func__, k, mode_lib-&gt;ms.NoOfDPP[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, NoOfDPP = %d\n", __func__, k, mode_lib-&gt;ms.NoOfDPP[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -8138,7 +8694,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 				display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].output.audio_sample_rate,</div><div class='ctx'> 				display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].output.audio_sample_layout);</div><div class='ctx'> </div><div class='del'>-			if (mode_lib-&gt;ms.RequiredDTBCLK[k] &gt; ((double)min_clk_table-&gt;max_clocks_khz.dtbclk / 1000)) {</div><div class='add'>+			if (mode_lib-&gt;ms.RequiredDTBCLK[k] &gt; ((double)min_clk_table-&gt;max_ss_clocks_khz.dtbclk / 1000)) {</div><div class='ctx'> 				mode_lib-&gt;ms.support.DTBCLKRequiredMoreThanSupported = true;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -8167,7 +8723,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 				s-&gt;DSCFormatFactor = 1;</div><div class='ctx'> 			}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, RequiresDSC = %u\n", __func__, k, mode_lib-&gt;ms.RequiresDSC[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, RequiresDSC = %u\n", __func__, k, mode_lib-&gt;ms.RequiresDSC[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 			if (mode_lib-&gt;ms.RequiresDSC[k] == true) {</div><div class='ctx'> 				s-&gt;PixelClockBackEndFactor = 3.0;</div><div class='hunk'>@@ -8185,10 +8741,10 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: k=%u, PixelClockBackEnd = %f\n", __func__, k, s-&gt;PixelClockBackEnd[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, required_dscclk_freq_mhz = %f\n", __func__, k, mode_lib-&gt;ms.required_dscclk_freq_mhz[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, DSCFormatFactor = %u\n", __func__, k, s-&gt;DSCFormatFactor);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, DSCCLKRequiredMoreThanSupported = %u\n", __func__, k, mode_lib-&gt;ms.support.DSCCLKRequiredMoreThanSupported);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, PixelClockBackEnd = %f\n", __func__, k, s-&gt;PixelClockBackEnd[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, required_dscclk_freq_mhz = %f\n", __func__, k, mode_lib-&gt;ms.required_dscclk_freq_mhz[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, DSCFormatFactor = %u\n", __func__, k, s-&gt;DSCFormatFactor);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, DSCCLKRequiredMoreThanSupported = %u\n", __func__, k, mode_lib-&gt;ms.support.DSCCLKRequiredMoreThanSupported);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -8423,13 +8979,13 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			mode_lib-&gt;ms.support.DCCMetaBufferSizeNotExceeded = false;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, PTEBufferSizeNotExceeded = %u\n", __func__, k, mode_lib-&gt;ms.PTEBufferSizeNotExceeded[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, DCCMetaBufferSizeNotExceeded = %u\n", __func__, k, mode_lib-&gt;ms.DCCMetaBufferSizeNotExceeded[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, PTEBufferSizeNotExceeded = %u\n", __func__, k, mode_lib-&gt;ms.PTEBufferSizeNotExceeded[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, DCCMetaBufferSizeNotExceeded = %u\n", __func__, k, mode_lib-&gt;ms.DCCMetaBufferSizeNotExceeded[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: PTEBufferSizeNotExceeded = %u\n", __func__, mode_lib-&gt;ms.support.PTEBufferSizeNotExceeded);</div><div class='del'>-	dml2_printf("DML::%s: DCCMetaBufferSizeNotExceeded = %u\n", __func__, mode_lib-&gt;ms.support.DCCMetaBufferSizeNotExceeded);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PTEBufferSizeNotExceeded = %u\n", __func__, mode_lib-&gt;ms.support.PTEBufferSizeNotExceeded);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCCMetaBufferSizeNotExceeded = %u\n", __func__, mode_lib-&gt;ms.support.DCCMetaBufferSizeNotExceeded);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* VActive bytes to fetch for UCLK P-State */</div><div class='hunk'>@@ -8502,7 +9058,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; ++k) {</div><div class='ctx'> 		double line_time_us = (double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='del'>-		bool cursor_not_enough_urgent_latency_hiding = 0;</div><div class='add'>+		bool cursor_not_enough_urgent_latency_hiding = false;</div><div class='ctx'> </div><div class='ctx'> 		if (display_cfg-&gt;plane_descriptors[k].cursor.num_cursors &gt; 0) {</div><div class='ctx'> 			calculate_cursor_req_attributes(</div><div class='hunk'>@@ -8531,9 +9087,9 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 		mode_lib-&gt;ms.UrgentBurstFactorCursorPre[k] = mode_lib-&gt;ms.UrgentBurstFactorCursor[k];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%d, Calling CalculateUrgentBurstFactor\n", __func__, k);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, VRatio=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, VRatioChroma=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, Calling CalculateUrgentBurstFactor\n", __func__, k);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, VRatio=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, VRatioChroma=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		CalculateUrgentBurstFactor(</div><div class='hunk'>@@ -8605,7 +9161,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: k=%u, MaximumVStartup = %u\n", __func__, k, s-&gt;MaximumVStartup[k]);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: k=%u, MaximumVStartup = %u\n", __func__, k, s-&gt;MaximumVStartup[k]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* Immediate Flip and MALL parameters */</div><div class='hunk'>@@ -8654,16 +9210,15 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 		(s-&gt;SubViewportMALLPStateMethod &amp;&amp; s-&gt;FullFrameMALLPStateMethod) || s-&gt;SubViewportMALLRefreshGreaterThan120Hz;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: SubViewportMALLPStateMethod = %u\n", __func__, s-&gt;SubViewportMALLPStateMethod);</div><div class='del'>-	dml2_printf("DML::%s: PhantomPipeMALLPStateMethod = %u\n", __func__, s-&gt;PhantomPipeMALLPStateMethod);</div><div class='del'>-	dml2_printf("DML::%s: FullFrameMALLPStateMethod = %u\n", __func__, s-&gt;FullFrameMALLPStateMethod);</div><div class='del'>-	dml2_printf("DML::%s: SubViewportMALLRefreshGreaterThan120Hz = %u\n", __func__, s-&gt;SubViewportMALLRefreshGreaterThan120Hz);</div><div class='del'>-	dml2_printf("DML::%s: InvalidCombinationOfMALLUseForPState = %u\n", __func__, mode_lib-&gt;ms.support.InvalidCombinationOfMALLUseForPState);</div><div class='del'>-	dml2_printf("DML::%s: in_out_params-&gt;min_clk_index = %u\n", __func__, in_out_params-&gt;min_clk_index);</div><div class='del'>-	dml2_printf("DML::%s: mode_lib-&gt;ms.DCFCLK = %f\n", __func__, mode_lib-&gt;ms.DCFCLK);</div><div class='del'>-	dml2_printf("DML::%s: mode_lib-&gt;ms.FabricClock = %f\n", __func__, mode_lib-&gt;ms.FabricClock);</div><div class='del'>-	dml2_printf("DML::%s: mode_lib-&gt;ms.uclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.uclk_freq_mhz);</div><div class='del'>-	dml2_printf("DML::%s: urgent latency tolarance = %f\n", __func__, ((mode_lib-&gt;ip.rob_buffer_size_kbytes - mode_lib-&gt;ip.pixel_chunk_size_kbytes) * 1024 / (mode_lib-&gt;ms.DCFCLK * mode_lib-&gt;soc.return_bus_width_bytes)));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SubViewportMALLPStateMethod = %u\n", __func__, s-&gt;SubViewportMALLPStateMethod);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PhantomPipeMALLPStateMethod = %u\n", __func__, s-&gt;PhantomPipeMALLPStateMethod);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: FullFrameMALLPStateMethod = %u\n", __func__, s-&gt;FullFrameMALLPStateMethod);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SubViewportMALLRefreshGreaterThan120Hz = %u\n", __func__, s-&gt;SubViewportMALLRefreshGreaterThan120Hz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: InvalidCombinationOfMALLUseForPState = %u\n", __func__, mode_lib-&gt;ms.support.InvalidCombinationOfMALLUseForPState);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: in_out_params-&gt;min_clk_index = %u\n", __func__, in_out_params-&gt;min_clk_index);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mode_lib-&gt;ms.DCFCLK = %f\n", __func__, mode_lib-&gt;ms.DCFCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mode_lib-&gt;ms.FabricClock = %f\n", __func__, mode_lib-&gt;ms.FabricClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: mode_lib-&gt;ms.uclk_freq_mhz = %f\n", __func__, mode_lib-&gt;ms.uclk_freq_mhz);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	mode_lib-&gt;ms.support.OutstandingRequestsSupport = true;</div><div class='hunk'>@@ -8703,10 +9258,10 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: avg_urgent_latency_us = %f\n", __func__, mode_lib-&gt;ms.support.avg_urgent_latency_us);</div><div class='del'>-			dml2_printf("DML::%s: avg_non_urgent_latency_us = %f\n", __func__, mode_lib-&gt;ms.support.avg_non_urgent_latency_us);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, request_size_bytes_luma = %d\n", __func__, k, mode_lib-&gt;ms.support.request_size_bytes_luma[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, outstanding_latency_us = %f (luma)\n", __func__, k, outstanding_latency_us);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: avg_urgent_latency_us = %f\n", __func__, mode_lib-&gt;ms.support.avg_urgent_latency_us);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: avg_non_urgent_latency_us = %f\n", __func__, mode_lib-&gt;ms.support.avg_non_urgent_latency_us);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, request_size_bytes_luma = %d\n", __func__, k, mode_lib-&gt;ms.support.request_size_bytes_luma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, outstanding_latency_us = %f (luma)\n", __func__, k, outstanding_latency_us);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -8722,8 +9277,8 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 				mode_lib-&gt;ms.support.OutstandingRequestsUrgencyAvoidance = false;</div><div class='ctx'> 			}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%d, request_size_bytes_chroma = %d\n", __func__, k, mode_lib-&gt;ms.support.request_size_bytes_chroma[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%d, outstanding_latency_us = %f (chroma)\n", __func__, k, outstanding_latency_us);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, request_size_bytes_chroma = %d\n", __func__, k, mode_lib-&gt;ms.support.request_size_bytes_chroma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d, outstanding_latency_us = %f (chroma)\n", __func__, k, outstanding_latency_us);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -8869,7 +9424,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 	for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; ++k) {</div><div class='ctx'> 		if (mode_lib-&gt;ms.NotEnoughUrgentLatencyHiding[k]) {</div><div class='ctx'> 			mode_lib-&gt;ms.support.EnoughUrgentLatencyHidingSupport = false;</div><div class='del'>-			dml2_printf("DML::%s: k=%u NotEnoughUrgentLatencyHiding set\n", __func__, k);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u NotEnoughUrgentLatencyHiding set\n", __func__, k);</div><div class='ctx'> </div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -8878,639 +9433,13 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			if (!mode_lib-&gt;ms.support.avg_bandwidth_support_ok[m][n] &amp;&amp; (m == dml2_core_internal_soc_state_sys_active || mode_lib-&gt;soc.mall_allocated_for_dcn_mbytes &gt; 0)) {</div><div class='ctx'> 				mode_lib-&gt;ms.support.AvgBandwidthSupport = false;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: avg_bandwidth_support_ok[%s][%s] not ok\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n));</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: avg_bandwidth_support_ok[%s][%s] not ok\n", __func__, dml2_core_internal_soc_state_type_str(m), dml2_core_internal_bw_type_str(n));</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Prefetch Check */</div><div class='del'>-	{</div><div class='del'>-		mode_lib-&gt;ms.TimeCalc = 24 / mode_lib-&gt;ms.dcfclk_deepsleep;</div><div class='del'>-</div><div class='del'>-		calculate_hostvm_inefficiency_factor(</div><div class='del'>-				&amp;s-&gt;HostVMInefficiencyFactor,</div><div class='del'>-				&amp;s-&gt;HostVMInefficiencyFactorPrefetch,</div><div class='del'>-</div><div class='del'>-				display_cfg-&gt;gpuvm_enable,</div><div class='del'>-				display_cfg-&gt;hostvm_enable,</div><div class='del'>-				mode_lib-&gt;ip.remote_iommu_outstanding_translations,</div><div class='del'>-				mode_lib-&gt;soc.max_outstanding_reqs,</div><div class='del'>-				mode_lib-&gt;ms.support.urg_bandwidth_available_pixel_and_vm[dml2_core_internal_soc_state_sys_active],</div><div class='del'>-				mode_lib-&gt;ms.support.urg_bandwidth_available_vm_only[dml2_core_internal_soc_state_sys_active]);</div><div class='del'>-</div><div class='del'>-		mode_lib-&gt;ms.Total3dlutActive = 0;</div><div class='del'>-		for (k = 0; k &lt;= mode_lib-&gt;ms.num_active_planes - 1; k++) {</div><div class='del'>-			if (display_cfg-&gt;plane_descriptors[k].tdlut.setup_for_tdlut)</div><div class='del'>-				mode_lib-&gt;ms.Total3dlutActive = mode_lib-&gt;ms.Total3dlutActive + 1;</div><div class='del'>-</div><div class='del'>-			// Calculate tdlut schedule related terms</div><div class='del'>-			calculate_tdlut_setting_params-&gt;dispclk_mhz = mode_lib-&gt;ms.RequiredDISPCLK;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;setup_for_tdlut = display_cfg-&gt;plane_descriptors[k].tdlut.setup_for_tdlut;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_width_mode = display_cfg-&gt;plane_descriptors[k].tdlut.tdlut_width_mode;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_addressing_mode = display_cfg-&gt;plane_descriptors[k].tdlut.tdlut_addressing_mode;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;cursor_buffer_size = mode_lib-&gt;ip.cursor_buffer_size;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;gpuvm_enable = display_cfg-&gt;gpuvm_enable;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;gpuvm_page_size_kbytes = display_cfg-&gt;plane_descriptors[k].overrides.gpuvm_min_page_size_kbytes;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_mpc_width_flag = display_cfg-&gt;plane_descriptors[k].tdlut.tdlut_mpc_width_flag;</div><div class='del'>-			calculate_tdlut_setting_params-&gt;is_gfx11 = dml_get_gfx_version(display_cfg-&gt;plane_descriptors[k].surface.tiling);</div><div class='del'>-</div><div class='del'>-			// output</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_pte_bytes_per_frame = &amp;s-&gt;tdlut_pte_bytes_per_frame[k];</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_bytes_per_frame = &amp;s-&gt;tdlut_bytes_per_frame[k];</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_groups_per_2row_ub = &amp;s-&gt;tdlut_groups_per_2row_ub[k];</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_opt_time = &amp;s-&gt;tdlut_opt_time[k];</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_drain_time = &amp;s-&gt;tdlut_drain_time[k];</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_bytes_to_deliver = &amp;s-&gt;tdlut_bytes_to_deliver[k];</div><div class='del'>-			calculate_tdlut_setting_params-&gt;tdlut_bytes_per_group = &amp;s-&gt;tdlut_bytes_per_group[k];</div><div class='del'>-</div><div class='del'>-			calculate_tdlut_setting(&amp;mode_lib-&gt;scratch, calculate_tdlut_setting_params);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		min_return_bw_for_latency = mode_lib-&gt;ms.support.urg_bandwidth_available_min_latency[dml2_core_internal_soc_state_sys_active];</div><div class='del'>-</div><div class='del'>-		if (mode_lib-&gt;soc.qos_parameters.qos_type == dml2_qos_param_type_dcn3)</div><div class='del'>-			s-&gt;ReorderingBytes = (unsigned int)(mode_lib-&gt;soc.clk_table.dram_config.channel_count * math_max3(mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.urgent_out_of_order_return_per_channel_pixel_only_bytes,</div><div class='del'>-											mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.urgent_out_of_order_return_per_channel_pixel_and_vm_bytes,</div><div class='del'>-											mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.urgent_out_of_order_return_per_channel_vm_only_bytes));</div><div class='del'>-</div><div class='del'>-		CalculateExtraLatency(</div><div class='del'>-			display_cfg,</div><div class='del'>-			mode_lib-&gt;ip.rob_buffer_size_kbytes,</div><div class='del'>-			mode_lib-&gt;soc.qos_parameters.qos_params.dcn32x.loaded_round_trip_latency_fclk_cycles,</div><div class='del'>-			s-&gt;ReorderingBytes,</div><div class='del'>-			mode_lib-&gt;ms.DCFCLK,</div><div class='del'>-			mode_lib-&gt;ms.FabricClock,</div><div class='del'>-			mode_lib-&gt;ip.pixel_chunk_size_kbytes,</div><div class='del'>-			min_return_bw_for_latency,</div><div class='del'>-			mode_lib-&gt;ms.num_active_planes,</div><div class='del'>-			mode_lib-&gt;ms.NoOfDPP,</div><div class='del'>-			mode_lib-&gt;ms.dpte_group_bytes,</div><div class='del'>-			s-&gt;tdlut_bytes_per_group,</div><div class='del'>-			s-&gt;HostVMInefficiencyFactor,</div><div class='del'>-			s-&gt;HostVMInefficiencyFactorPrefetch,</div><div class='del'>-			mode_lib-&gt;soc.hostvm_min_page_size_kbytes,</div><div class='del'>-			mode_lib-&gt;soc.qos_parameters.qos_type,</div><div class='del'>-			!(display_cfg-&gt;overrides.max_outstanding_when_urgent_expected_disable),</div><div class='del'>-			mode_lib-&gt;soc.max_outstanding_reqs,</div><div class='del'>-			mode_lib-&gt;ms.support.request_size_bytes_luma,</div><div class='del'>-			mode_lib-&gt;ms.support.request_size_bytes_chroma,</div><div class='del'>-			mode_lib-&gt;ip.meta_chunk_size_kbytes,</div><div class='del'>-			mode_lib-&gt;ip.dchub_arb_to_ret_delay,</div><div class='del'>-			mode_lib-&gt;ms.TripToMemory,</div><div class='del'>-			mode_lib-&gt;ip.hostvm_mode,</div><div class='del'>-</div><div class='del'>-			// output</div><div class='del'>-			&amp;mode_lib-&gt;ms.ExtraLatency,</div><div class='del'>-			&amp;mode_lib-&gt;ms.ExtraLatency_sr,</div><div class='del'>-			&amp;mode_lib-&gt;ms.ExtraLatencyPrefetch);</div><div class='del'>-</div><div class='del'>-		for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++)</div><div class='del'>-			s-&gt;impacted_dst_y_pre[k] = 0;</div><div class='del'>-</div><div class='del'>-		s-&gt;recalc_prefetch_schedule = 0;</div><div class='del'>-		s-&gt;recalc_prefetch_done = 0;</div><div class='del'>-		do {</div><div class='del'>-			mode_lib-&gt;ms.support.PrefetchSupported = true;</div><div class='del'>-</div><div class='del'>-			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='del'>-				s-&gt;line_times[k] = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='del'>-				s-&gt;pixel_format[k] = display_cfg-&gt;plane_descriptors[k].pixel_format;</div><div class='del'>-</div><div class='del'>-				s-&gt;lb_source_lines_l[k] = get_num_lb_source_lines(mode_lib-&gt;ip.max_line_buffer_lines, mode_lib-&gt;ip.line_buffer_size_bits,</div><div class='del'>-																	mode_lib-&gt;ms.NoOfDPP[k],</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.width,</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.viewport.plane0.height,</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio,</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.rotation_angle);</div><div class='del'>-</div><div class='del'>-				s-&gt;lb_source_lines_c[k] = get_num_lb_source_lines(mode_lib-&gt;ip.max_line_buffer_lines, mode_lib-&gt;ip.line_buffer_size_bits,</div><div class='del'>-																	mode_lib-&gt;ms.NoOfDPP[k],</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.viewport.plane1.width,</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.viewport.plane1.height,</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.h_ratio,</div><div class='del'>-																	display_cfg-&gt;plane_descriptors[k].composition.rotation_angle);</div><div class='del'>-</div><div class='del'>-				struct dml2_core_internal_DmlPipe *myPipe = &amp;s-&gt;myPipe;</div><div class='del'>-</div><div class='del'>-				mode_lib-&gt;ms.TWait[k] = CalculateTWait(</div><div class='del'>-					display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns,</div><div class='del'>-					mode_lib-&gt;ms.UrgLatency,</div><div class='del'>-					mode_lib-&gt;ms.TripToMemory,</div><div class='del'>-					!dml_is_phantom_pipe(&amp;display_cfg-&gt;plane_descriptors[k]) &amp;&amp; display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.drr_config.enabled ?</div><div class='del'>-					get_g6_temp_read_blackout_us(&amp;mode_lib-&gt;soc, (unsigned int)(mode_lib-&gt;ms.uclk_freq_mhz * 1000), in_out_params-&gt;min_clk_index) : 0.0);</div><div class='del'>-</div><div class='del'>-				myPipe-&gt;Dppclk = mode_lib-&gt;ms.RequiredDPPCLK[k];</div><div class='del'>-				myPipe-&gt;Dispclk = mode_lib-&gt;ms.RequiredDISPCLK;</div><div class='del'>-				myPipe-&gt;PixelClock = ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='del'>-				myPipe-&gt;DCFClkDeepSleep = mode_lib-&gt;ms.dcfclk_deepsleep;</div><div class='del'>-				myPipe-&gt;DPPPerSurface = mode_lib-&gt;ms.NoOfDPP[k];</div><div class='del'>-				myPipe-&gt;ScalerEnabled = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.enabled;</div><div class='del'>-				myPipe-&gt;VRatio = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio;</div><div class='del'>-				myPipe-&gt;VRatioChroma = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio;</div><div class='del'>-				myPipe-&gt;VTaps = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_taps;</div><div class='del'>-				myPipe-&gt;VTapsChroma = display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_taps;</div><div class='del'>-				myPipe-&gt;RotationAngle = display_cfg-&gt;plane_descriptors[k].composition.rotation_angle;</div><div class='del'>-				myPipe-&gt;mirrored = display_cfg-&gt;plane_descriptors[k].composition.mirrored;</div><div class='del'>-				myPipe-&gt;BlockWidth256BytesY = mode_lib-&gt;ms.Read256BlockWidthY[k];</div><div class='del'>-				myPipe-&gt;BlockHeight256BytesY = mode_lib-&gt;ms.Read256BlockHeightY[k];</div><div class='del'>-				myPipe-&gt;BlockWidth256BytesC = mode_lib-&gt;ms.Read256BlockWidthC[k];</div><div class='del'>-				myPipe-&gt;BlockHeight256BytesC = mode_lib-&gt;ms.Read256BlockHeightC[k];</div><div class='del'>-				myPipe-&gt;InterlaceEnable = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.interlaced;</div><div class='del'>-				myPipe-&gt;NumberOfCursors = display_cfg-&gt;plane_descriptors[k].cursor.num_cursors;</div><div class='del'>-				myPipe-&gt;VBlank = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_total - display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_active;</div><div class='del'>-				myPipe-&gt;HTotal = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total;</div><div class='del'>-				myPipe-&gt;HActive = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_active;</div><div class='del'>-				myPipe-&gt;DCCEnable = display_cfg-&gt;plane_descriptors[k].surface.dcc.enable;</div><div class='del'>-				myPipe-&gt;ODMMode = mode_lib-&gt;ms.ODMMode[k];</div><div class='del'>-				myPipe-&gt;SourcePixelFormat = display_cfg-&gt;plane_descriptors[k].pixel_format;</div><div class='del'>-				myPipe-&gt;BytePerPixelY = mode_lib-&gt;ms.BytePerPixelY[k];</div><div class='del'>-				myPipe-&gt;BytePerPixelC = mode_lib-&gt;ms.BytePerPixelC[k];</div><div class='del'>-				myPipe-&gt;ProgressiveToInterlaceUnitInOPP = mode_lib-&gt;ip.ptoi_supported;</div><div class='del'>-</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: Calling CalculatePrefetchSchedule for k=%u\n", __func__, k);</div><div class='del'>-				dml2_printf("DML::%s: MaximumVStartup = %u\n", __func__, s-&gt;MaximumVStartup[k]);</div><div class='del'>-#endif</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;display_cfg = display_cfg;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;HostVMInefficiencyFactor = s-&gt;HostVMInefficiencyFactorPrefetch;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;myPipe = myPipe;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DSCDelay = mode_lib-&gt;ms.DSCDelay[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DPPCLKDelaySubtotalPlusCNVCFormater = mode_lib-&gt;ip.dppclk_delay_subtotal + mode_lib-&gt;ip.dppclk_delay_cnvc_formatter;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DPPCLKDelaySCL = mode_lib-&gt;ip.dppclk_delay_scl;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DPPCLKDelaySCLLBOnly = mode_lib-&gt;ip.dppclk_delay_scl_lb_only;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DPPCLKDelayCNVCCursor = mode_lib-&gt;ip.dppclk_delay_cnvc_cursor;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DISPCLKDelaySubtotal = mode_lib-&gt;ip.dispclk_delay_subtotal;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DPP_RECOUT_WIDTH = (unsigned int)(mode_lib-&gt;ms.SwathWidthY[k] / display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio);</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;OutputFormat = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].output.output_format;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;MaxInterDCNTileRepeaters = mode_lib-&gt;ip.max_inter_dcn_tile_repeaters;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VStartup = s-&gt;MaximumVStartup[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;HostVMMinPageSize = mode_lib-&gt;soc.hostvm_min_page_size_kbytes;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DynamicMetadataEnable = display_cfg-&gt;plane_descriptors[k].dynamic_meta_data.enable;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DynamicMetadataVMEnabled = mode_lib-&gt;ip.dynamic_metadata_vm_enabled;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DynamicMetadataLinesBeforeActiveRequired = display_cfg-&gt;plane_descriptors[k].dynamic_meta_data.lines_before_active_required;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DynamicMetadataTransmittedBytes = display_cfg-&gt;plane_descriptors[k].dynamic_meta_data.transmitted_bytes;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;UrgentLatency = mode_lib-&gt;ms.UrgLatency;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;ExtraLatencyPrefetch = mode_lib-&gt;ms.ExtraLatencyPrefetch;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;TCalc = mode_lib-&gt;ms.TimeCalc;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;vm_bytes = mode_lib-&gt;ms.vm_bytes[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;PixelPTEBytesPerRow = mode_lib-&gt;ms.DPTEBytesPerRow[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;PrefetchSourceLinesY = mode_lib-&gt;ms.PrefetchLinesY[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VInitPreFillY = mode_lib-&gt;ms.PrefillY[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;MaxNumSwathY = mode_lib-&gt;ms.MaxNumSwathY[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;PrefetchSourceLinesC = mode_lib-&gt;ms.PrefetchLinesC[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VInitPreFillC = mode_lib-&gt;ms.PrefillC[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;MaxNumSwathC = mode_lib-&gt;ms.MaxNumSwathC[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;swath_width_luma_ub = mode_lib-&gt;ms.swath_width_luma_ub[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;swath_width_chroma_ub = mode_lib-&gt;ms.swath_width_chroma_ub[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;SwathHeightY = mode_lib-&gt;ms.SwathHeightY[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;SwathHeightC = mode_lib-&gt;ms.SwathHeightC[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;TWait = mode_lib-&gt;ms.TWait[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Ttrip = mode_lib-&gt;ms.TripToMemory;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Turg = mode_lib-&gt;ms.UrgLatency;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;setup_for_tdlut = display_cfg-&gt;plane_descriptors[k].tdlut.setup_for_tdlut;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;tdlut_pte_bytes_per_frame = s-&gt;tdlut_pte_bytes_per_frame[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;tdlut_bytes_per_frame = s-&gt;tdlut_bytes_per_frame[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;tdlut_opt_time = s-&gt;tdlut_opt_time[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;tdlut_drain_time = s-&gt;tdlut_drain_time[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;num_cursors = (display_cfg-&gt;plane_descriptors[k].cursor.cursor_width &gt; 0);</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;cursor_bytes_per_chunk = s-&gt;cursor_bytes_per_chunk[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;cursor_bytes_per_line = s-&gt;cursor_bytes_per_line[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;dcc_enable = display_cfg-&gt;plane_descriptors[k].surface.dcc.enable;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;mrq_present = mode_lib-&gt;ip.dcn_mrq_present;</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;meta_row_bytes = mode_lib-&gt;ms.meta_row_bytes[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;mall_prefetch_sdp_overhead_factor = mode_lib-&gt;ms.mall_prefetch_sdp_overhead_factor[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;impacted_dst_y_pre = s-&gt;impacted_dst_y_pre[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;vactive_sw_bw_l = mode_lib-&gt;ms.vactive_sw_bw_l[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;vactive_sw_bw_c = mode_lib-&gt;ms.vactive_sw_bw_c[k];</div><div class='del'>-</div><div class='del'>-				// output</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DSTXAfterScaler = &amp;s-&gt;DSTXAfterScaler[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;DSTYAfterScaler = &amp;s-&gt;DSTYAfterScaler[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;dst_y_prefetch = &amp;mode_lib-&gt;ms.dst_y_prefetch[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;dst_y_per_vm_vblank = &amp;mode_lib-&gt;ms.LinesForVM[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;dst_y_per_row_vblank = &amp;mode_lib-&gt;ms.LinesForDPTERow[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VRatioPrefetchY = &amp;mode_lib-&gt;ms.VRatioPreY[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VRatioPrefetchC = &amp;mode_lib-&gt;ms.VRatioPreC[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;RequiredPrefetchPixelDataBWLuma = &amp;mode_lib-&gt;ms.RequiredPrefetchPixelDataBWLuma[k]; // prefetch_sw_bw_l</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;RequiredPrefetchPixelDataBWChroma = &amp;mode_lib-&gt;ms.RequiredPrefetchPixelDataBWChroma[k]; // prefetch_sw_bw_c</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;RequiredPrefetchBWOTO = &amp;mode_lib-&gt;ms.RequiredPrefetchBWOTO[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;NotEnoughTimeForDynamicMetadata = &amp;mode_lib-&gt;ms.NoTimeForDynamicMetadata[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tno_bw = &amp;mode_lib-&gt;ms.Tno_bw[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tno_bw_flip = &amp;mode_lib-&gt;ms.Tno_bw_flip[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;prefetch_vmrow_bw = &amp;mode_lib-&gt;ms.prefetch_vmrow_bw[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tdmdl_vm = &amp;s-&gt;dummy_single[0];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tdmdl = &amp;s-&gt;dummy_single[1];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;TSetup = &amp;s-&gt;dummy_single[2];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tvm_trips = &amp;s-&gt;Tvm_trips[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tr0_trips = &amp;s-&gt;Tr0_trips[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tvm_trips_flip = &amp;s-&gt;Tvm_trips_flip[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tr0_trips_flip = &amp;s-&gt;Tr0_trips_flip[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tvm_trips_flip_rounded = &amp;s-&gt;Tvm_trips_flip_rounded[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tr0_trips_flip_rounded = &amp;s-&gt;Tr0_trips_flip_rounded[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VUpdateOffsetPix = &amp;s-&gt;dummy_integer[0];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VUpdateWidthPix = &amp;s-&gt;dummy_integer[1];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;VReadyOffsetPix = &amp;s-&gt;dummy_integer[2];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;prefetch_cursor_bw = &amp;mode_lib-&gt;ms.prefetch_cursor_bw[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;prefetch_sw_bytes = &amp;s-&gt;prefetch_sw_bytes[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tpre_rounded = &amp;s-&gt;Tpre_rounded[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;Tpre_oto = &amp;s-&gt;Tpre_oto[k];</div><div class='del'>-				CalculatePrefetchSchedule_params-&gt;prefetch_swath_time_us = &amp;s-&gt;prefetch_swath_time_us[k];</div><div class='del'>-</div><div class='del'>-				mode_lib-&gt;ms.NoTimeForPrefetch[k] = CalculatePrefetchSchedule(&amp;mode_lib-&gt;scratch, CalculatePrefetchSchedule_params);</div><div class='del'>-</div><div class='del'>-				mode_lib-&gt;ms.support.PrefetchSupported &amp;= !mode_lib-&gt;ms.NoTimeForPrefetch[k];</div><div class='del'>-				dml2_printf("DML::%s: k=%d, dst_y_per_vm_vblank = %f\n", __func__, k, *CalculatePrefetchSchedule_params-&gt;dst_y_per_vm_vblank);</div><div class='del'>-				dml2_printf("DML::%s: k=%d, dst_y_per_row_vblank = %f\n", __func__, k, *CalculatePrefetchSchedule_params-&gt;dst_y_per_row_vblank);</div><div class='del'>-			} // for k num_planes</div><div class='del'>-</div><div class='del'>-			CalculateDCFCLKDeepSleepTdlut(</div><div class='del'>-				display_cfg,</div><div class='del'>-				mode_lib-&gt;ms.num_active_planes,</div><div class='del'>-				mode_lib-&gt;ms.BytePerPixelY,</div><div class='del'>-				mode_lib-&gt;ms.BytePerPixelC,</div><div class='del'>-				mode_lib-&gt;ms.SwathWidthY,</div><div class='del'>-				mode_lib-&gt;ms.SwathWidthC,</div><div class='del'>-				mode_lib-&gt;ms.NoOfDPP,</div><div class='del'>-				mode_lib-&gt;ms.PSCL_FACTOR,</div><div class='del'>-				mode_lib-&gt;ms.PSCL_FACTOR_CHROMA,</div><div class='del'>-				mode_lib-&gt;ms.RequiredDPPCLK,</div><div class='del'>-				mode_lib-&gt;ms.vactive_sw_bw_l,</div><div class='del'>-				mode_lib-&gt;ms.vactive_sw_bw_c,</div><div class='del'>-				mode_lib-&gt;soc.return_bus_width_bytes,</div><div class='del'>-				mode_lib-&gt;ms.RequiredDISPCLK,</div><div class='del'>-				s-&gt;tdlut_bytes_to_deliver,</div><div class='del'>-				s-&gt;prefetch_swath_time_us,</div><div class='del'>-</div><div class='del'>-				/* Output */</div><div class='del'>-				&amp;mode_lib-&gt;ms.dcfclk_deepsleep);</div><div class='del'>-</div><div class='del'>-			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='del'>-				if (mode_lib-&gt;ms.dst_y_prefetch[k] &lt; 2.0</div><div class='del'>-					|| mode_lib-&gt;ms.LinesForVM[k] &gt;= 32.0</div><div class='del'>-					|| mode_lib-&gt;ms.LinesForDPTERow[k] &gt;= 16.0</div><div class='del'>-					|| mode_lib-&gt;ms.NoTimeForPrefetch[k] == true</div><div class='del'>-					|| s-&gt;DSTYAfterScaler[k] &gt; 8) {</div><div class='del'>-					mode_lib-&gt;ms.support.PrefetchSupported = false;</div><div class='del'>-					dml2_printf("DML::%s: k=%d, dst_y_prefetch=%f (should not be &lt; 2)\n", __func__, k, mode_lib-&gt;ms.dst_y_prefetch[k]);</div><div class='del'>-					dml2_printf("DML::%s: k=%d, LinesForVM=%f (should not be &gt;= 32)\n", __func__, k, mode_lib-&gt;ms.LinesForVM[k]);</div><div class='del'>-					dml2_printf("DML::%s: k=%d, LinesForDPTERow=%f (should not be &gt;= 16)\n", __func__, k, mode_lib-&gt;ms.LinesForDPTERow[k]);</div><div class='del'>-					dml2_printf("DML::%s: k=%d, DSTYAfterScaler=%d (should be &lt;= 8)\n", __func__, k, s-&gt;DSTYAfterScaler[k]);</div><div class='del'>-					dml2_printf("DML::%s: k=%d, NoTimeForPrefetch=%d\n", __func__, k, mode_lib-&gt;ms.NoTimeForPrefetch[k]);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			mode_lib-&gt;ms.support.DynamicMetadataSupported = true;</div><div class='del'>-			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; ++k) {</div><div class='del'>-				if (mode_lib-&gt;ms.NoTimeForDynamicMetadata[k] == true) {</div><div class='del'>-					mode_lib-&gt;ms.support.DynamicMetadataSupported = false;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			mode_lib-&gt;ms.support.VRatioInPrefetchSupported = true;</div><div class='del'>-			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='del'>-				if (mode_lib-&gt;ms.VRatioPreY[k] &gt; __DML2_CALCS_MAX_VRATIO_PRE__ ||</div><div class='del'>-					mode_lib-&gt;ms.VRatioPreC[k] &gt; __DML2_CALCS_MAX_VRATIO_PRE__) {</div><div class='del'>-					mode_lib-&gt;ms.support.VRatioInPrefetchSupported = false;</div><div class='del'>-					dml2_printf("DML::%s: k=%d VRatioPreY = %f (should be &lt;= %f)\n", __func__, k, mode_lib-&gt;ms.VRatioPreY[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='del'>-					dml2_printf("DML::%s: k=%d VRatioPreC = %f (should be &lt;= %f)\n", __func__, k, mode_lib-&gt;ms.VRatioPreC[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='del'>-					dml2_printf("DML::%s: VRatioInPrefetchSupported = %u\n", __func__, mode_lib-&gt;ms.support.VRatioInPrefetchSupported);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			mode_lib-&gt;ms.support.PrefetchSupported &amp;= mode_lib-&gt;ms.support.VRatioInPrefetchSupported;</div><div class='del'>-</div><div class='del'>-			// By default, do not recalc prefetch schedule</div><div class='del'>-			s-&gt;recalc_prefetch_schedule = 0;</div><div class='del'>-</div><div class='del'>-			// Only do urg vs prefetch bandwidth check, flip schedule check, power saving feature support check IF the Prefetch Schedule Check is ok</div><div class='del'>-			if (mode_lib-&gt;ms.support.PrefetchSupported) {</div><div class='del'>-				for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='del'>-					// Calculate Urgent burst factor for prefetch</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-					dml2_printf("DML::%s: k=%d, Calling CalculateUrgentBurstFactor (for prefetch)\n", __func__, k);</div><div class='del'>-					dml2_printf("DML::%s: k=%d, VRatioPreY=%f\n", __func__, k, mode_lib-&gt;ms.VRatioPreY[k]);</div><div class='del'>-					dml2_printf("DML::%s: k=%d, VRatioPreC=%f\n", __func__, k, mode_lib-&gt;ms.VRatioPreC[k]);</div><div class='del'>-#endif</div><div class='del'>-					CalculateUrgentBurstFactor(</div><div class='del'>-						&amp;display_cfg-&gt;plane_descriptors[k],</div><div class='del'>-						mode_lib-&gt;ms.swath_width_luma_ub[k],</div><div class='del'>-						mode_lib-&gt;ms.swath_width_chroma_ub[k],</div><div class='del'>-						mode_lib-&gt;ms.SwathHeightY[k],</div><div class='del'>-						mode_lib-&gt;ms.SwathHeightC[k],</div><div class='del'>-						s-&gt;line_times[k],</div><div class='del'>-						mode_lib-&gt;ms.UrgLatency,</div><div class='del'>-						mode_lib-&gt;ms.VRatioPreY[k],</div><div class='del'>-						mode_lib-&gt;ms.VRatioPreC[k],</div><div class='del'>-						mode_lib-&gt;ms.BytePerPixelInDETY[k],</div><div class='del'>-						mode_lib-&gt;ms.BytePerPixelInDETC[k],</div><div class='del'>-						mode_lib-&gt;ms.DETBufferSizeY[k],</div><div class='del'>-						mode_lib-&gt;ms.DETBufferSizeC[k],</div><div class='del'>-						/* Output */</div><div class='del'>-						&amp;mode_lib-&gt;ms.UrgentBurstFactorLumaPre[k],</div><div class='del'>-						&amp;mode_lib-&gt;ms.UrgentBurstFactorChromaPre[k],</div><div class='del'>-						&amp;mode_lib-&gt;ms.NotEnoughUrgentLatencyHidingPre[k]);</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				// Calculate urgent bandwidth required, both urg and non urg peak bandwidth</div><div class='del'>-				// assume flip bw is 0 at this point</div><div class='del'>-				for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++)</div><div class='del'>-					mode_lib-&gt;ms.final_flip_bw[k] = 0;</div><div class='del'>-</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urg_vactive_bandwidth_required = mode_lib-&gt;ms.support.urg_vactive_bandwidth_required;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urg_bandwidth_required = mode_lib-&gt;ms.support.urg_bandwidth_required;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urg_bandwidth_required_qual = mode_lib-&gt;ms.support.urg_bandwidth_required_qual;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;non_urg_bandwidth_required = mode_lib-&gt;ms.support.non_urg_bandwidth_required;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;surface_avg_vactive_required_bw = mode_lib-&gt;ms.surface_avg_vactive_required_bw;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;surface_peak_required_bw = mode_lib-&gt;ms.surface_peak_required_bw;</div><div class='del'>-</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;display_cfg = display_cfg;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;inc_flip_bw = 0;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;num_active_planes =  mode_lib-&gt;ms.num_active_planes;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;num_of_dpp = mode_lib-&gt;ms.NoOfDPP;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p0;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p1;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p0;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p1;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;mall_prefetch_sdp_overhead_factor = mode_lib-&gt;ms.mall_prefetch_sdp_overhead_factor;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;mall_prefetch_dram_overhead_factor = mode_lib-&gt;ms.mall_prefetch_dram_overhead_factor;</div><div class='del'>-</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_l = mode_lib-&gt;ms.vactive_sw_bw_l;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_c = mode_lib-&gt;ms.vactive_sw_bw_c;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_l = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWLuma;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_c = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWChroma;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_oto = mode_lib-&gt;ms.RequiredPrefetchBWOTO;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_l = mode_lib-&gt;ms.excess_vactive_fill_bw_l;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_c = mode_lib-&gt;ms.excess_vactive_fill_bw_c;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;cursor_bw = mode_lib-&gt;ms.cursor_bw;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;dpte_row_bw = mode_lib-&gt;ms.dpte_row_bw;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;meta_row_bw = mode_lib-&gt;ms.meta_row_bw;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;prefetch_cursor_bw = mode_lib-&gt;ms.prefetch_cursor_bw;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;prefetch_vmrow_bw = mode_lib-&gt;ms.prefetch_vmrow_bw;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;flip_bw = mode_lib-&gt;ms.final_flip_bw;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urgent_burst_factor_l = mode_lib-&gt;ms.UrgentBurstFactorLuma;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urgent_burst_factor_c = mode_lib-&gt;ms.UrgentBurstFactorChroma;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urgent_burst_factor_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursor;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_l = mode_lib-&gt;ms.UrgentBurstFactorLumaPre;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_c = mode_lib-&gt;ms.UrgentBurstFactorChromaPre;</div><div class='del'>-				calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursorPre;</div><div class='del'>-</div><div class='del'>-				calculate_peak_bandwidth_required(</div><div class='del'>-						&amp;mode_lib-&gt;scratch,</div><div class='del'>-						calculate_peak_bandwidth_params);</div><div class='del'>-</div><div class='del'>-				// Check urg peak bandwidth against available urg bw</div><div class='del'>-				// check at SDP and DRAM, for all soc states (SVP prefetch an Sys Active)</div><div class='del'>-				check_urgent_bandwidth_support(</div><div class='del'>-					&amp;s-&gt;dummy_single[0], // double* frac_urg_bandwidth</div><div class='del'>-					&amp;s-&gt;dummy_single[1], // double* frac_urg_bandwidth_mall</div><div class='del'>-					&amp;mode_lib-&gt;ms.support.UrgVactiveBandwidthSupport,</div><div class='del'>-					&amp;mode_lib-&gt;ms.support.PrefetchBandwidthSupported,</div><div class='del'>-</div><div class='del'>-					mode_lib-&gt;soc.mall_allocated_for_dcn_mbytes,</div><div class='del'>-					mode_lib-&gt;ms.support.non_urg_bandwidth_required,</div><div class='del'>-					mode_lib-&gt;ms.support.urg_vactive_bandwidth_required,</div><div class='del'>-					mode_lib-&gt;ms.support.urg_bandwidth_required,</div><div class='del'>-					mode_lib-&gt;ms.support.urg_bandwidth_available);</div><div class='del'>-</div><div class='del'>-				mode_lib-&gt;ms.support.PrefetchSupported &amp;= mode_lib-&gt;ms.support.PrefetchBandwidthSupported;</div><div class='del'>-				dml2_printf("DML::%s: PrefetchBandwidthSupported=%0d\n", __func__, mode_lib-&gt;ms.support.PrefetchBandwidthSupported);</div><div class='del'>-</div><div class='del'>-				for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='del'>-					if (mode_lib-&gt;ms.NotEnoughUrgentLatencyHidingPre[k]) {</div><div class='del'>-						mode_lib-&gt;ms.support.PrefetchSupported = false;</div><div class='del'>-						dml2_printf("DML::%s: k=%d, NotEnoughUrgentLatencyHidingPre=%d\n", __func__, k, mode_lib-&gt;ms.NotEnoughUrgentLatencyHidingPre[k]);</div><div class='del'>-					}</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-#ifdef DML_GLOBAL_PREFETCH_CHECK</div><div class='del'>-				if (mode_lib-&gt;ms.support.PrefetchSupported &amp;&amp; mode_lib-&gt;ms.num_active_planes &gt; 1 &amp;&amp; s-&gt;recalc_prefetch_done == 0) {</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;num_active_planes =  mode_lib-&gt;ms.num_active_planes;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;pixel_format = s-&gt;pixel_format;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;chunk_bytes_l = mode_lib-&gt;ip.pixel_chunk_size_kbytes * 1024;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;chunk_bytes_c = mode_lib-&gt;ip.pixel_chunk_size_kbytes * 1024;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;lb_source_lines_l = s-&gt;lb_source_lines_l;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;lb_source_lines_c = s-&gt;lb_source_lines_c;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;swath_height_l =  mode_lib-&gt;ms.SwathHeightY;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;swath_height_c =  mode_lib-&gt;ms.SwathHeightC;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;rob_buffer_size_kbytes = mode_lib-&gt;ip.rob_buffer_size_kbytes;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;compressed_buffer_size_kbytes = mode_lib-&gt;ms.CompressedBufferSizeInkByte;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;detile_buffer_size_bytes_l = mode_lib-&gt;ms.DETBufferSizeY;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;detile_buffer_size_bytes_c = mode_lib-&gt;ms.DETBufferSizeC;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;full_swath_bytes_l = s-&gt;full_swath_bytes_l;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;full_swath_bytes_c = s-&gt;full_swath_bytes_c;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;prefetch_sw_bytes = s-&gt;prefetch_sw_bytes;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;Tpre_rounded = s-&gt;Tpre_rounded;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;Tpre_oto = s-&gt;Tpre_oto;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps = mode_lib-&gt;ms.support.urg_bandwidth_required[dml2_core_internal_soc_state_sys_active][dml2_core_internal_bw_sdp];</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;line_time = s-&gt;line_times;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;dst_y_prefetch = mode_lib-&gt;ms.dst_y_prefetch;</div><div class='del'>-					if (CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps &lt; 10 * 1024)</div><div class='del'>-						CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps = 10 * 1024;</div><div class='del'>-</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;estimated_dcfclk_mhz = (CheckGlobalPrefetchAdmissibility_params-&gt;estimated_urg_bandwidth_required_mbps / (double) mode_lib-&gt;soc.return_bus_width_bytes) /</div><div class='del'>-																					((double)mode_lib-&gt;soc.qos_parameters.derate_table.system_active_urgent.dcfclk_derate_percent / 100.0);</div><div class='del'>-</div><div class='del'>-					// if recalc_prefetch_schedule is set, recalculate the prefetch schedule with the new impacted_Tpre, prefetch should be possible</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;recalc_prefetch_schedule = &amp;s-&gt;recalc_prefetch_schedule;</div><div class='del'>-					CheckGlobalPrefetchAdmissibility_params-&gt;impacted_dst_y_pre = s-&gt;impacted_dst_y_pre;</div><div class='del'>-					mode_lib-&gt;ms.support.PrefetchSupported = CheckGlobalPrefetchAdmissibility(&amp;mode_lib-&gt;scratch, CheckGlobalPrefetchAdmissibility_params);</div><div class='del'>-					s-&gt;recalc_prefetch_done = 1;</div><div class='del'>-					s-&gt;recalc_prefetch_schedule = 1;</div><div class='del'>-				}</div><div class='del'>-#endif</div><div class='del'>-			} // prefetch schedule ok, do urg bw and flip schedule</div><div class='del'>-		} while (s-&gt;recalc_prefetch_schedule);</div><div class='del'>-</div><div class='del'>-		// Flip Schedule</div><div class='del'>-		// Both prefetch schedule and BW okay</div><div class='del'>-		if (mode_lib-&gt;ms.support.PrefetchSupported == true) {</div><div class='del'>-			mode_lib-&gt;ms.BandwidthAvailableForImmediateFlip =</div><div class='del'>-				get_bandwidth_available_for_immediate_flip(</div><div class='del'>-					dml2_core_internal_soc_state_sys_active,</div><div class='del'>-					mode_lib-&gt;ms.support.urg_bandwidth_required_qual, // no flip</div><div class='del'>-					mode_lib-&gt;ms.support.urg_bandwidth_available);</div><div class='del'>-</div><div class='del'>-			mode_lib-&gt;ms.TotImmediateFlipBytes = 0;</div><div class='del'>-			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='del'>-				if (display_cfg-&gt;plane_descriptors[k].immediate_flip) {</div><div class='del'>-					s-&gt;per_pipe_flip_bytes[k] = get_pipe_flip_bytes(</div><div class='del'>-									s-&gt;HostVMInefficiencyFactor,</div><div class='del'>-									mode_lib-&gt;ms.vm_bytes[k],</div><div class='del'>-									mode_lib-&gt;ms.DPTEBytesPerRow[k],</div><div class='del'>-									mode_lib-&gt;ms.meta_row_bytes[k]);</div><div class='del'>-				} else {</div><div class='del'>-					s-&gt;per_pipe_flip_bytes[k] = 0;</div><div class='del'>-				}</div><div class='del'>-				mode_lib-&gt;ms.TotImmediateFlipBytes += s-&gt;per_pipe_flip_bytes[k] * mode_lib-&gt;ms.NoOfDPP[k];</div><div class='del'>-</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='del'>-				CalculateFlipSchedule(</div><div class='del'>-					&amp;mode_lib-&gt;scratch,</div><div class='del'>-					display_cfg-&gt;plane_descriptors[k].immediate_flip,</div><div class='del'>-					1, // use_lb_flip_bw</div><div class='del'>-					s-&gt;HostVMInefficiencyFactor,</div><div class='del'>-					s-&gt;Tvm_trips_flip[k],</div><div class='del'>-					s-&gt;Tr0_trips_flip[k],</div><div class='del'>-					s-&gt;Tvm_trips_flip_rounded[k],</div><div class='del'>-					s-&gt;Tr0_trips_flip_rounded[k],</div><div class='del'>-					display_cfg-&gt;gpuvm_enable,</div><div class='del'>-					mode_lib-&gt;ms.vm_bytes[k],</div><div class='del'>-					mode_lib-&gt;ms.DPTEBytesPerRow[k],</div><div class='del'>-					mode_lib-&gt;ms.BandwidthAvailableForImmediateFlip,</div><div class='del'>-					mode_lib-&gt;ms.TotImmediateFlipBytes,</div><div class='del'>-					display_cfg-&gt;plane_descriptors[k].pixel_format,</div><div class='del'>-					(display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)),</div><div class='del'>-					display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio,</div><div class='del'>-					display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio,</div><div class='del'>-					mode_lib-&gt;ms.Tno_bw_flip[k],</div><div class='del'>-					mode_lib-&gt;ms.dpte_row_height[k],</div><div class='del'>-					mode_lib-&gt;ms.dpte_row_height_chroma[k],</div><div class='del'>-					mode_lib-&gt;ms.use_one_row_for_frame_flip[k],</div><div class='del'>-					mode_lib-&gt;ip.max_flip_time_us,</div><div class='del'>-					mode_lib-&gt;ip.max_flip_time_lines,</div><div class='del'>-					s-&gt;per_pipe_flip_bytes[k],</div><div class='del'>-					mode_lib-&gt;ms.meta_row_bytes[k],</div><div class='del'>-					s-&gt;meta_row_height_luma[k],</div><div class='del'>-					s-&gt;meta_row_height_chroma[k],</div><div class='del'>-					mode_lib-&gt;ip.dcn_mrq_present &amp;&amp; display_cfg-&gt;plane_descriptors[k].surface.dcc.enable,</div><div class='del'>-</div><div class='del'>-					/* Output */</div><div class='del'>-					&amp;mode_lib-&gt;ms.dst_y_per_vm_flip[k],</div><div class='del'>-					&amp;mode_lib-&gt;ms.dst_y_per_row_flip[k],</div><div class='del'>-					&amp;mode_lib-&gt;ms.final_flip_bw[k],</div><div class='del'>-					&amp;mode_lib-&gt;ms.ImmediateFlipSupportedForPipe[k]);</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urg_vactive_bandwidth_required = s-&gt;dummy_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urg_bandwidth_required = mode_lib-&gt;ms.support.urg_bandwidth_required_flip;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urg_bandwidth_required_qual = s-&gt;dummy_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;non_urg_bandwidth_required = mode_lib-&gt;ms.support.non_urg_bandwidth_required_flip;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;surface_avg_vactive_required_bw = s-&gt;surface_dummy_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;surface_peak_required_bw = mode_lib-&gt;ms.surface_peak_required_bw;</div><div class='del'>-</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;display_cfg = display_cfg;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;inc_flip_bw = 1;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;num_active_planes = mode_lib-&gt;ms.num_active_planes;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;num_of_dpp = mode_lib-&gt;ms.NoOfDPP;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p0;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_nom_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_nom_overhead_factor_p1;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p0 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p0;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;dcc_dram_bw_pref_overhead_factor_p1 = mode_lib-&gt;ms.dcc_dram_bw_pref_overhead_factor_p1;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;mall_prefetch_sdp_overhead_factor = mode_lib-&gt;ms.mall_prefetch_sdp_overhead_factor;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;mall_prefetch_dram_overhead_factor = mode_lib-&gt;ms.mall_prefetch_dram_overhead_factor;</div><div class='del'>-</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_l = mode_lib-&gt;ms.vactive_sw_bw_l;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;surface_read_bandwidth_c = mode_lib-&gt;ms.vactive_sw_bw_c;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_l = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWLuma;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_c = mode_lib-&gt;ms.RequiredPrefetchPixelDataBWChroma;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;prefetch_bandwidth_oto = mode_lib-&gt;ms.RequiredPrefetchBWOTO;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_l = mode_lib-&gt;ms.excess_vactive_fill_bw_l;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;excess_vactive_fill_bw_c = mode_lib-&gt;ms.excess_vactive_fill_bw_c;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;cursor_bw = mode_lib-&gt;ms.cursor_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;dpte_row_bw = mode_lib-&gt;ms.dpte_row_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;meta_row_bw = mode_lib-&gt;ms.meta_row_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;prefetch_cursor_bw = mode_lib-&gt;ms.prefetch_cursor_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;prefetch_vmrow_bw = mode_lib-&gt;ms.prefetch_vmrow_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;flip_bw = mode_lib-&gt;ms.final_flip_bw;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_l = mode_lib-&gt;ms.UrgentBurstFactorLuma;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_c = mode_lib-&gt;ms.UrgentBurstFactorChroma;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursor;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_l = mode_lib-&gt;ms.UrgentBurstFactorLumaPre;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_c = mode_lib-&gt;ms.UrgentBurstFactorChromaPre;</div><div class='del'>-			calculate_peak_bandwidth_params-&gt;urgent_burst_factor_prefetch_cursor = mode_lib-&gt;ms.UrgentBurstFactorCursorPre;</div><div class='del'>-</div><div class='del'>-			calculate_peak_bandwidth_required(</div><div class='del'>-					&amp;mode_lib-&gt;scratch,</div><div class='del'>-					calculate_peak_bandwidth_params);</div><div class='del'>-</div><div class='del'>-			calculate_immediate_flip_bandwidth_support(</div><div class='del'>-				&amp;s-&gt;dummy_single[0], // double* frac_urg_bandwidth_flip</div><div class='del'>-				&amp;mode_lib-&gt;ms.support.ImmediateFlipSupport,</div><div class='del'>-</div><div class='del'>-				dml2_core_internal_soc_state_sys_active,</div><div class='del'>-				mode_lib-&gt;ms.support.urg_bandwidth_required_flip,</div><div class='del'>-				mode_lib-&gt;ms.support.non_urg_bandwidth_required_flip,</div><div class='del'>-				mode_lib-&gt;ms.support.urg_bandwidth_available);</div><div class='del'>-</div><div class='del'>-			for (k = 0; k &lt;= mode_lib-&gt;ms.num_active_planes - 1; k++) {</div><div class='del'>-				if (display_cfg-&gt;plane_descriptors[k].immediate_flip == true &amp;&amp; mode_lib-&gt;ms.ImmediateFlipSupportedForPipe[k] == false)</div><div class='del'>-					mode_lib-&gt;ms.support.ImmediateFlipSupport = false;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-		} else { // if prefetch not support, assume iflip is not supported too</div><div class='del'>-			mode_lib-&gt;ms.support.ImmediateFlipSupport = false;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		s-&gt;mSOCParameters.UrgentLatency = mode_lib-&gt;ms.UrgLatency;</div><div class='del'>-		s-&gt;mSOCParameters.ExtraLatency = mode_lib-&gt;ms.ExtraLatency;</div><div class='del'>-		s-&gt;mSOCParameters.ExtraLatency_sr = mode_lib-&gt;ms.ExtraLatency_sr;</div><div class='del'>-		s-&gt;mSOCParameters.WritebackLatency = mode_lib-&gt;soc.qos_parameters.writeback.base_latency_us;</div><div class='del'>-		s-&gt;mSOCParameters.DRAMClockChangeLatency = mode_lib-&gt;soc.power_management_parameters.dram_clk_change_blackout_us;</div><div class='del'>-		s-&gt;mSOCParameters.FCLKChangeLatency = mode_lib-&gt;soc.power_management_parameters.fclk_change_blackout_us;</div><div class='del'>-		s-&gt;mSOCParameters.SRExitTime = mode_lib-&gt;soc.power_management_parameters.stutter_exit_latency_us;</div><div class='del'>-		s-&gt;mSOCParameters.SREnterPlusExitTime = mode_lib-&gt;soc.power_management_parameters.stutter_enter_plus_exit_latency_us;</div><div class='del'>-		s-&gt;mSOCParameters.SRExitZ8Time = mode_lib-&gt;soc.power_management_parameters.z8_stutter_exit_latency_us;</div><div class='del'>-		s-&gt;mSOCParameters.SREnterPlusExitZ8Time = mode_lib-&gt;soc.power_management_parameters.z8_stutter_enter_plus_exit_latency_us;</div><div class='del'>-		s-&gt;mSOCParameters.USRRetrainingLatency = 0;</div><div class='del'>-		s-&gt;mSOCParameters.SMNLatency = 0;</div><div class='del'>-		s-&gt;mSOCParameters.g6_temp_read_blackout_us = get_g6_temp_read_blackout_us(&amp;mode_lib-&gt;soc, (unsigned int)(mode_lib-&gt;ms.uclk_freq_mhz * 1000), in_out_params-&gt;min_clk_index);</div><div class='del'>-		s-&gt;mSOCParameters.max_urgent_latency_us = get_max_urgent_latency_us(&amp;mode_lib-&gt;soc.qos_parameters.qos_params.dcn4x, mode_lib-&gt;ms.uclk_freq_mhz, mode_lib-&gt;ms.FabricClock, in_out_params-&gt;min_clk_index);</div><div class='del'>-		s-&gt;mSOCParameters.df_response_time_us = mode_lib-&gt;soc.qos_parameters.qos_params.dcn4x.df_qos_response_time_fclk_cycles / mode_lib-&gt;ms.FabricClock;</div><div class='del'>-		s-&gt;mSOCParameters.qos_type = mode_lib-&gt;soc.qos_parameters.qos_type;</div><div class='del'>-</div><div class='del'>-		CalculateWatermarks_params-&gt;display_cfg = display_cfg;</div><div class='del'>-		CalculateWatermarks_params-&gt;USRRetrainingRequired = false;</div><div class='del'>-		CalculateWatermarks_params-&gt;NumberOfActiveSurfaces = mode_lib-&gt;ms.num_active_planes;</div><div class='del'>-		CalculateWatermarks_params-&gt;MaxLineBufferLines = mode_lib-&gt;ip.max_line_buffer_lines;</div><div class='del'>-		CalculateWatermarks_params-&gt;LineBufferSize = mode_lib-&gt;ip.line_buffer_size_bits;</div><div class='del'>-		CalculateWatermarks_params-&gt;WritebackInterfaceBufferSize = mode_lib-&gt;ip.writeback_interface_buffer_size_kbytes;</div><div class='del'>-		CalculateWatermarks_params-&gt;DCFCLK = mode_lib-&gt;ms.DCFCLK;</div><div class='del'>-		CalculateWatermarks_params-&gt;SynchronizeTimings = display_cfg-&gt;overrides.synchronize_timings;</div><div class='del'>-		CalculateWatermarks_params-&gt;SynchronizeDRRDisplaysForUCLKPStateChange = display_cfg-&gt;overrides.synchronize_ddr_displays_for_uclk_pstate_change;</div><div class='del'>-		CalculateWatermarks_params-&gt;dpte_group_bytes = mode_lib-&gt;ms.dpte_group_bytes;</div><div class='del'>-		CalculateWatermarks_params-&gt;mmSOCParameters = s-&gt;mSOCParameters;</div><div class='del'>-		CalculateWatermarks_params-&gt;WritebackChunkSize = mode_lib-&gt;ip.writeback_chunk_size_kbytes;</div><div class='del'>-		CalculateWatermarks_params-&gt;SOCCLK = mode_lib-&gt;ms.SOCCLK;</div><div class='del'>-		CalculateWatermarks_params-&gt;DCFClkDeepSleep = mode_lib-&gt;ms.dcfclk_deepsleep;</div><div class='del'>-		CalculateWatermarks_params-&gt;DETBufferSizeY = mode_lib-&gt;ms.DETBufferSizeY;</div><div class='del'>-		CalculateWatermarks_params-&gt;DETBufferSizeC = mode_lib-&gt;ms.DETBufferSizeC;</div><div class='del'>-		CalculateWatermarks_params-&gt;SwathHeightY = mode_lib-&gt;ms.SwathHeightY;</div><div class='del'>-		CalculateWatermarks_params-&gt;SwathHeightC = mode_lib-&gt;ms.SwathHeightC;</div><div class='del'>-		CalculateWatermarks_params-&gt;SwathWidthY = mode_lib-&gt;ms.SwathWidthY;</div><div class='del'>-		CalculateWatermarks_params-&gt;SwathWidthC = mode_lib-&gt;ms.SwathWidthC;</div><div class='del'>-		CalculateWatermarks_params-&gt;DPPPerSurface = mode_lib-&gt;ms.NoOfDPP;</div><div class='del'>-		CalculateWatermarks_params-&gt;BytePerPixelDETY = mode_lib-&gt;ms.BytePerPixelInDETY;</div><div class='del'>-		CalculateWatermarks_params-&gt;BytePerPixelDETC = mode_lib-&gt;ms.BytePerPixelInDETC;</div><div class='del'>-		CalculateWatermarks_params-&gt;DSTXAfterScaler = s-&gt;DSTXAfterScaler;</div><div class='del'>-		CalculateWatermarks_params-&gt;DSTYAfterScaler = s-&gt;DSTYAfterScaler;</div><div class='del'>-		CalculateWatermarks_params-&gt;UnboundedRequestEnabled = mode_lib-&gt;ms.UnboundedRequestEnabled;</div><div class='del'>-		CalculateWatermarks_params-&gt;CompressedBufferSizeInkByte = mode_lib-&gt;ms.CompressedBufferSizeInkByte;</div><div class='del'>-		CalculateWatermarks_params-&gt;meta_row_height_l = s-&gt;meta_row_height_luma;</div><div class='del'>-		CalculateWatermarks_params-&gt;meta_row_height_c = s-&gt;meta_row_height_chroma;</div><div class='del'>-</div><div class='del'>-		// Output</div><div class='del'>-		CalculateWatermarks_params-&gt;Watermark = &amp;mode_lib-&gt;ms.support.watermarks; // Watermarks *Watermark</div><div class='del'>-		CalculateWatermarks_params-&gt;DRAMClockChangeSupport = mode_lib-&gt;ms.support.DRAMClockChangeSupport;</div><div class='del'>-		CalculateWatermarks_params-&gt;global_dram_clock_change_supported = &amp;mode_lib-&gt;ms.support.global_dram_clock_change_supported;</div><div class='del'>-		CalculateWatermarks_params-&gt;MaxActiveDRAMClockChangeLatencySupported = &amp;s-&gt;dummy_single_array[0]; // double *MaxActiveDRAMClockChangeLatencySupported[]</div><div class='del'>-		CalculateWatermarks_params-&gt;SubViewportLinesNeededInMALL = mode_lib-&gt;ms.SubViewportLinesNeededInMALL; // unsigned int SubViewportLinesNeededInMALL[]</div><div class='del'>-		CalculateWatermarks_params-&gt;FCLKChangeSupport = mode_lib-&gt;ms.support.FCLKChangeSupport;</div><div class='del'>-		CalculateWatermarks_params-&gt;global_fclk_change_supported = &amp;mode_lib-&gt;ms.support.global_fclk_change_supported;</div><div class='del'>-		CalculateWatermarks_params-&gt;MaxActiveFCLKChangeLatencySupported = &amp;s-&gt;dummy_single[0]; // double *MaxActiveFCLKChangeLatencySupported</div><div class='del'>-		CalculateWatermarks_params-&gt;USRRetrainingSupport = &amp;mode_lib-&gt;ms.support.USRRetrainingSupport;</div><div class='del'>-		CalculateWatermarks_params-&gt;g6_temp_read_support = &amp;mode_lib-&gt;ms.support.g6_temp_read_support;</div><div class='del'>-		CalculateWatermarks_params-&gt;VActiveLatencyHidingMargin = mode_lib-&gt;ms.VActiveLatencyHidingMargin;</div><div class='del'>-		CalculateWatermarks_params-&gt;VActiveLatencyHidingUs = mode_lib-&gt;ms.VActiveLatencyHidingUs;</div><div class='del'>-</div><div class='del'>-		CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(&amp;mode_lib-&gt;scratch, CalculateWatermarks_params);</div><div class='del'>-</div><div class='del'>-		calculate_pstate_keepout_dst_lines(display_cfg, &amp;mode_lib-&gt;ms.support.watermarks, s-&gt;dummy_integer_array[0]);</div><div class='del'>-	}</div><div class='del'>-	dml2_printf("DML::%s: Done prefetch calculation\n", __func__);</div><div class='del'>-	// End of Prefetch Check</div><div class='add'>+	dml_core_ms_prefetch_check(mode_lib, display_cfg);</div><div class='ctx'> </div><div class='ctx'> 	mode_lib-&gt;ms.support.max_urgent_latency_us = s-&gt;mSOCParameters.max_urgent_latency_us;</div><div class='ctx'> </div><div class='hunk'>@@ -9546,8 +9475,8 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			mode_lib-&gt;ms.dram_change_vactive_det_fill_delay_us);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: max_urgent_latency_us = %f\n", __func__, s-&gt;mSOCParameters.max_urgent_latency_us);</div><div class='del'>-	dml2_printf("DML::%s: ROBSupport = %u\n", __func__, mode_lib-&gt;ms.support.ROBSupport);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_urgent_latency_us = %f\n", __func__, s-&gt;mSOCParameters.max_urgent_latency_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ROBSupport = %u\n", __func__, mode_lib-&gt;ms.support.ROBSupport);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/*Mode Support, Voltage State and SOC Configuration*/</div><div class='hunk'>@@ -9597,17 +9526,17 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 			&amp;&amp; !mode_lib-&gt;ms.support.ExceededMALLSize</div><div class='ctx'> 			&amp;&amp; mode_lib-&gt;ms.support.g6_temp_read_support</div><div class='ctx'> 			&amp;&amp; ((!display_cfg-&gt;hostvm_enable &amp;&amp; !s-&gt;ImmediateFlipRequired) || mode_lib-&gt;ms.support.ImmediateFlipSupport)) {</div><div class='del'>-			dml2_printf("DML::%s: mode is supported\n", __func__);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: mode is supported\n", __func__);</div><div class='ctx'> 			mode_lib-&gt;ms.support.ModeSupport = true;</div><div class='ctx'> 		} else {</div><div class='del'>-			dml2_printf("DML::%s: mode is NOT supported\n", __func__);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: mode is NOT supported\n", __func__);</div><div class='ctx'> 			mode_lib-&gt;ms.support.ModeSupport = false;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	// Since now the mode_support work on 1 particular power state, so there is only 1 state idx (index 0).</div><div class='del'>-	dml2_printf("DML::%s: ModeSupport = %u\n", __func__, mode_lib-&gt;ms.support.ModeSupport);</div><div class='del'>-	dml2_printf("DML::%s: ImmediateFlipSupport = %u\n", __func__, mode_lib-&gt;ms.support.ImmediateFlipSupport);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ModeSupport = %u\n", __func__, mode_lib-&gt;ms.support.ModeSupport);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ImmediateFlipSupport = %u\n", __func__, mode_lib-&gt;ms.support.ImmediateFlipSupport);</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; mode_lib-&gt;ms.num_active_planes; k++) {</div><div class='ctx'> 		mode_lib-&gt;ms.support.MPCCombineEnable[k] = mode_lib-&gt;ms.MPCCombine[k];</div><div class='hunk'>@@ -9623,8 +9552,8 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 		mode_lib-&gt;ms.support.OutputRate[k] = mode_lib-&gt;ms.OutputRate[k];</div><div class='ctx'> </div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-		dml2_printf("DML::%s: k=%d, ODMMode = %u\n", __func__, k, mode_lib-&gt;ms.support.ODMMode[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, DSCEnabled = %u\n", __func__, k, mode_lib-&gt;ms.support.DSCEnabled[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, ODMMode = %u\n", __func__, k, mode_lib-&gt;ms.support.ODMMode[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, DSCEnabled = %u\n", __func__, k, mode_lib-&gt;ms.support.DSCEnabled[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -9632,7 +9561,7 @@ static bool dml_core_mode_support(struct dml2_core_calcs_mode_support_ex *in_out</div><div class='ctx'> 	if (!mode_lib-&gt;ms.support.ModeSupport)</div><div class='ctx'> 		dml2_print_mode_support_info(&amp;mode_lib-&gt;ms.support, true);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: --- DONE --- \n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: --- DONE --- \n", __func__);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	return mode_lib-&gt;ms.support.ModeSupport;</div><div class='hunk'>@@ -9642,18 +9571,18 @@ unsigned int dml2_core_calcs_mode_support_ex(struct dml2_core_calcs_mode_support</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int result;</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: ------------- START ----------\n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ------------- START ----------\n", __func__);</div><div class='ctx'> 	result = dml_core_mode_support(in_out_params);</div><div class='ctx'> </div><div class='ctx'> 	if (result)</div><div class='ctx'> 		*in_out_params-&gt;out_evaluation_info = in_out_params-&gt;mode_lib-&gt;ms.support;</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: is_mode_support = %u (min_clk_index=%d)\n", __func__, result, in_out_params-&gt;min_clk_index);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: is_mode_support = %u (min_clk_index=%d)\n", __func__, result, in_out_params-&gt;min_clk_index);</div><div class='ctx'> </div><div class='ctx'> 	for (unsigned int k = 0; k &lt; in_out_params-&gt;in_display_cfg-&gt;num_planes; k++)</div><div class='del'>-		dml2_printf("DML::%s: plane_%d: reserved_vblank_time_ns = %u\n", __func__, k, in_out_params-&gt;in_display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: plane_%d: reserved_vblank_time_ns = %lu\n", __func__, k, in_out_params-&gt;in_display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: ------------- DONE ----------\n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ------------- DONE ----------\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='hunk'>@@ -9687,19 +9616,19 @@ static void CalculatePixelDeliveryTimes(</div><div class='ctx'> 		double pixel_clock_mhz = ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u : HRatio = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : VRatio = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : HRatioChroma = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.h_ratio);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : VRatioChroma = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : VRatioPrefetchY = %f\n", __func__, k, VRatioPrefetchY[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : VRatioPrefetchC = %f\n", __func__, k, VRatioPrefetchC[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : swath_width_luma_ub = %u\n", __func__, k, swath_width_luma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : swath_width_chroma_ub = %u\n", __func__, k, swath_width_chroma_ub[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : PSCL_THROUGHPUT = %f\n", __func__, k, PSCL_THROUGHPUT[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : PSCL_THROUGHPUT_CHROMA = %f\n", __func__, k, PSCL_THROUGHPUT_CHROMA[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DPPPerSurface = %u\n", __func__, k, cfg_support_info-&gt;plane_support_info[k].dpps_used);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : pixel_clock_mhz = %f\n", __func__, k, pixel_clock_mhz);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : Dppclk = %f\n", __func__, k, Dppclk[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : HRatio = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : VRatio = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : HRatioChroma = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.h_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : VRatioChroma = %f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : VRatioPrefetchY = %f\n", __func__, k, VRatioPrefetchY[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : VRatioPrefetchC = %f\n", __func__, k, VRatioPrefetchC[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : swath_width_luma_ub = %u\n", __func__, k, swath_width_luma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : swath_width_chroma_ub = %u\n", __func__, k, swath_width_chroma_ub[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : PSCL_THROUGHPUT = %f\n", __func__, k, PSCL_THROUGHPUT[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : PSCL_THROUGHPUT_CHROMA = %f\n", __func__, k, PSCL_THROUGHPUT_CHROMA[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DPPPerSurface = %u\n", __func__, k, cfg_support_info-&gt;plane_support_info[k].dpps_used);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : pixel_clock_mhz = %f\n", __func__, k, pixel_clock_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : Dppclk = %f\n", __func__, k, Dppclk[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		if (display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio &lt;= 1) {</div><div class='ctx'> 			DisplayPipeLineDeliveryTimeLuma[k] = swath_width_luma_ub[k] * cfg_support_info-&gt;plane_support_info[k].dpps_used / display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.h_ratio / pixel_clock_mhz;</div><div class='hunk'>@@ -9733,10 +9662,10 @@ static void CalculatePixelDeliveryTimes(</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeLineDeliveryTimeLuma = %f\n", __func__, k, DisplayPipeLineDeliveryTimeLuma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeLineDeliveryTimeLumaPrefetch = %f\n", __func__, k, DisplayPipeLineDeliveryTimeLumaPrefetch[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeLineDeliveryTimeChroma = %f\n", __func__, k, DisplayPipeLineDeliveryTimeChroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeLineDeliveryTimeChromaPrefetch = %f\n", __func__, k, DisplayPipeLineDeliveryTimeChromaPrefetch[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeLineDeliveryTimeLuma = %f\n", __func__, k, DisplayPipeLineDeliveryTimeLuma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeLineDeliveryTimeLumaPrefetch = %f\n", __func__, k, DisplayPipeLineDeliveryTimeLumaPrefetch[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeLineDeliveryTimeChroma = %f\n", __func__, k, DisplayPipeLineDeliveryTimeChroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeLineDeliveryTimeChromaPrefetch = %f\n", __func__, k, DisplayPipeLineDeliveryTimeChromaPrefetch[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -9752,12 +9681,12 @@ static void CalculatePixelDeliveryTimes(</div><div class='ctx'> 			DisplayPipeRequestDeliveryTimeChromaPrefetch[k] = DisplayPipeLineDeliveryTimeChromaPrefetch[k] / req_per_swath_ub_c[k];</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeLuma = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeLuma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeLumaPrefetch = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeLumaPrefetch[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : req_per_swath_ub_l = %d\n", __func__, k, req_per_swath_ub_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeChroma = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeChroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeChromaPrefetch = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeChromaPrefetch[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u : req_per_swath_ub_c = %d\n", __func__, k, req_per_swath_ub_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeLuma = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeLuma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeLumaPrefetch = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeLumaPrefetch[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : req_per_swath_ub_l = %d\n", __func__, k, req_per_swath_ub_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeChroma = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeChroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : DisplayPipeRequestDeliveryTimeChromaPrefetch = %f\n", __func__, k, DisplayPipeRequestDeliveryTimeChromaPrefetch[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u : req_per_swath_ub_c = %d\n", __func__, k, req_per_swath_ub_c[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -9853,14 +9782,14 @@ static void CalculateMetaAndPTETimes(struct dml2_core_shared_CalculateMetaAndPTE</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%d, DST_Y_PER_META_ROW_NOM_L = %f\n", __func__, k, p-&gt;DST_Y_PER_META_ROW_NOM_L[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, DST_Y_PER_META_ROW_NOM_C = %f\n", __func__, k, p-&gt;DST_Y_PER_META_ROW_NOM_C[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, TimePerMetaChunkNominal		  = %f\n", __func__, k, p-&gt;TimePerMetaChunkNominal[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, TimePerMetaChunkVBlank		   = %f\n", __func__, k, p-&gt;TimePerMetaChunkVBlank[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, TimePerMetaChunkFlip			 = %f\n", __func__, k, p-&gt;TimePerMetaChunkFlip[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, TimePerChromaMetaChunkNominal	= %f\n", __func__, k, p-&gt;TimePerChromaMetaChunkNominal[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, TimePerChromaMetaChunkVBlank	 = %f\n", __func__, k, p-&gt;TimePerChromaMetaChunkVBlank[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, TimePerChromaMetaChunkFlip	   = %f\n", __func__, k, p-&gt;TimePerChromaMetaChunkFlip[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, DST_Y_PER_META_ROW_NOM_L = %f\n", __func__, k, p-&gt;DST_Y_PER_META_ROW_NOM_L[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, DST_Y_PER_META_ROW_NOM_C = %f\n", __func__, k, p-&gt;DST_Y_PER_META_ROW_NOM_C[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, TimePerMetaChunkNominal		  = %f\n", __func__, k, p-&gt;TimePerMetaChunkNominal[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, TimePerMetaChunkVBlank		   = %f\n", __func__, k, p-&gt;TimePerMetaChunkVBlank[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, TimePerMetaChunkFlip			 = %f\n", __func__, k, p-&gt;TimePerMetaChunkFlip[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, TimePerChromaMetaChunkNominal	= %f\n", __func__, k, p-&gt;TimePerChromaMetaChunkNominal[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, TimePerChromaMetaChunkVBlank	 = %f\n", __func__, k, p-&gt;TimePerChromaMetaChunkVBlank[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, TimePerChromaMetaChunkFlip	   = %f\n", __func__, k, p-&gt;TimePerChromaMetaChunkFlip[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -9881,7 +9810,7 @@ static void CalculateMetaAndPTETimes(struct dml2_core_shared_CalculateMetaAndPTE</div><div class='ctx'> 		else</div><div class='ctx'> 			p-&gt;time_per_tdlut_group[k] = 0;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: k=%u, time_per_tdlut_group = %f\n", __func__, k, p-&gt;time_per_tdlut_group[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, time_per_tdlut_group = %f\n", __func__, k, p-&gt;time_per_tdlut_group[k]);</div><div class='ctx'> </div><div class='ctx'> 		if (p-&gt;display_cfg-&gt;gpuvm_enable == true) {</div><div class='ctx'> 			if (!dml_is_vertical_rotation(p-&gt;display_cfg-&gt;plane_descriptors[k].composition.rotation_angle)) {</div><div class='hunk'>@@ -9897,14 +9826,14 @@ static void CalculateMetaAndPTETimes(struct dml2_core_shared_CalculateMetaAndPTE</div><div class='ctx'> 			if (dpte_groups_per_row_luma_ub &lt;= 2) {</div><div class='ctx'> 				dpte_groups_per_row_luma_ub = dpte_groups_per_row_luma_ub + 1;</div><div class='ctx'> 			}</div><div class='del'>-			dml2_printf("DML::%s: k=%u, use_one_row_for_frame = %u\n", __func__, k, p-&gt;use_one_row_for_frame[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, dpte_group_bytes = %u\n", __func__, k, p-&gt;dpte_group_bytes[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PTERequestSizeY = %u\n", __func__, k, p-&gt;PTERequestSizeY[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEReqWidthY = %u\n", __func__, k, p-&gt;PixelPTEReqWidthY[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, PixelPTEReqHeightY = %u\n", __func__, k, p-&gt;PixelPTEReqHeightY[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, dpte_row_width_luma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_luma_ub[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, dpte_group_width_luma = %u\n", __func__, k, dpte_group_width_luma);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, dpte_groups_per_row_luma_ub = %u\n", __func__, k, dpte_groups_per_row_luma_ub);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, use_one_row_for_frame = %u\n", __func__, k, p-&gt;use_one_row_for_frame[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, dpte_group_bytes = %u\n", __func__, k, p-&gt;dpte_group_bytes[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PTERequestSizeY = %u\n", __func__, k, p-&gt;PTERequestSizeY[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEReqWidthY = %u\n", __func__, k, p-&gt;PixelPTEReqWidthY[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, PixelPTEReqHeightY = %u\n", __func__, k, p-&gt;PixelPTEReqHeightY[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, dpte_row_width_luma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_luma_ub[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, dpte_group_width_luma = %u\n", __func__, k, dpte_group_width_luma);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, dpte_groups_per_row_luma_ub = %u\n", __func__, k, dpte_groups_per_row_luma_ub);</div><div class='ctx'> </div><div class='ctx'> 			p-&gt;time_per_pte_group_nom_luma[k] = p-&gt;DST_Y_PER_PTE_ROW_NOM_L[k] * p-&gt;display_cfg-&gt;stream_descriptors[p-&gt;display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / pixel_clock_mhz / dpte_groups_per_row_luma_ub;</div><div class='ctx'> 			p-&gt;time_per_pte_group_vblank_luma[k] = p-&gt;dst_y_per_row_vblank[k] * p-&gt;display_cfg-&gt;stream_descriptors[p-&gt;display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / pixel_clock_mhz / dpte_groups_per_row_luma_ub;</div><div class='hunk'>@@ -9928,9 +9857,9 @@ static void CalculateMetaAndPTETimes(struct dml2_core_shared_CalculateMetaAndPTE</div><div class='ctx'> 				if (dpte_groups_per_row_chroma_ub &lt;= 2) {</div><div class='ctx'> 					dpte_groups_per_row_chroma_ub = dpte_groups_per_row_chroma_ub + 1;</div><div class='ctx'> 				}</div><div class='del'>-				dml2_printf("DML::%s: k=%u, dpte_row_width_chroma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_chroma_ub[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, dpte_group_width_chroma = %u\n", __func__, k, dpte_group_width_chroma);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, dpte_groups_per_row_chroma_ub = %u\n", __func__, k, dpte_groups_per_row_chroma_ub);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, dpte_row_width_chroma_ub = %u\n", __func__, k, p-&gt;dpte_row_width_chroma_ub[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, dpte_group_width_chroma = %u\n", __func__, k, dpte_group_width_chroma);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, dpte_groups_per_row_chroma_ub = %u\n", __func__, k, dpte_groups_per_row_chroma_ub);</div><div class='ctx'> </div><div class='ctx'> 				p-&gt;time_per_pte_group_nom_chroma[k] = p-&gt;DST_Y_PER_PTE_ROW_NOM_C[k] * p-&gt;display_cfg-&gt;stream_descriptors[p-&gt;display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / pixel_clock_mhz / dpte_groups_per_row_chroma_ub;</div><div class='ctx'> 				p-&gt;time_per_pte_group_vblank_chroma[k] = p-&gt;dst_y_per_row_vblank[k] * p-&gt;display_cfg-&gt;stream_descriptors[p-&gt;display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / pixel_clock_mhz / dpte_groups_per_row_chroma_ub;</div><div class='hunk'>@@ -9945,17 +9874,17 @@ static void CalculateMetaAndPTETimes(struct dml2_core_shared_CalculateMetaAndPTE</div><div class='ctx'> 			p-&gt;time_per_pte_group_flip_chroma[k] = 0;</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dst_y_per_row_vblank = %f\n", __func__, k, p-&gt;dst_y_per_row_vblank[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dst_y_per_row_flip = %f\n", __func__, k, p-&gt;dst_y_per_row_flip[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dst_y_per_row_vblank = %f\n", __func__, k, p-&gt;dst_y_per_row_vblank[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dst_y_per_row_flip = %f\n", __func__, k, p-&gt;dst_y_per_row_flip[k]);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: k=%u, DST_Y_PER_PTE_ROW_NOM_L = %f\n", __func__, k, p-&gt;DST_Y_PER_PTE_ROW_NOM_L[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, DST_Y_PER_PTE_ROW_NOM_C = %f\n", __func__, k, p-&gt;DST_Y_PER_PTE_ROW_NOM_C[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, time_per_pte_group_nom_luma = %f\n", __func__, k, p-&gt;time_per_pte_group_nom_luma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, time_per_pte_group_vblank_luma = %f\n", __func__, k, p-&gt;time_per_pte_group_vblank_luma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, time_per_pte_group_flip_luma = %f\n", __func__, k, p-&gt;time_per_pte_group_flip_luma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, time_per_pte_group_nom_chroma = %f\n", __func__, k, p-&gt;time_per_pte_group_nom_chroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, time_per_pte_group_vblank_chroma = %f\n", __func__, k, p-&gt;time_per_pte_group_vblank_chroma[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, time_per_pte_group_flip_chroma = %f\n", __func__, k, p-&gt;time_per_pte_group_flip_chroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, DST_Y_PER_PTE_ROW_NOM_L = %f\n", __func__, k, p-&gt;DST_Y_PER_PTE_ROW_NOM_L[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, DST_Y_PER_PTE_ROW_NOM_C = %f\n", __func__, k, p-&gt;DST_Y_PER_PTE_ROW_NOM_C[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, time_per_pte_group_nom_luma = %f\n", __func__, k, p-&gt;time_per_pte_group_nom_luma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, time_per_pte_group_vblank_luma = %f\n", __func__, k, p-&gt;time_per_pte_group_vblank_luma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, time_per_pte_group_flip_luma = %f\n", __func__, k, p-&gt;time_per_pte_group_flip_luma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, time_per_pte_group_nom_chroma = %f\n", __func__, k, p-&gt;time_per_pte_group_nom_chroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, time_per_pte_group_vblank_chroma = %f\n", __func__, k, p-&gt;time_per_pte_group_vblank_chroma[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, time_per_pte_group_flip_chroma = %f\n", __func__, k, p-&gt;time_per_pte_group_flip_chroma[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> } // CalculateMetaAndPTETimes</div><div class='hunk'>@@ -9991,18 +9920,18 @@ static void CalculateVMGroupAndRequestTimes(</div><div class='ctx'> 	double line_time;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: NumberOfActiveSurfaces = %u\n", __func__, NumberOfActiveSurfaces);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NumberOfActiveSurfaces = %u\n", __func__, NumberOfActiveSurfaces);</div><div class='ctx'> #endif</div><div class='ctx'> 	for (unsigned int k = 0; k &lt; NumberOfActiveSurfaces; ++k) {</div><div class='ctx'> 		double pixel_clock_mhz = ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='ctx'> 		bool dcc_mrq_enable = display_cfg-&gt;plane_descriptors[k].surface.dcc.enable &amp;&amp; mrq_present;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dcc_mrq_enable = %u\n", __func__, k, dcc_mrq_enable);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, vm_group_bytes = %u\n", __func__, k, vm_group_bytes[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dpde0_bytes_per_frame_ub_l = %u\n", __func__, k, dpde0_bytes_per_frame_ub_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, dpde0_bytes_per_frame_ub_c = %u\n", __func__, k, dpde0_bytes_per_frame_ub_c[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, meta_pte_bytes_per_frame_ub_l = %d\n", __func__, k, meta_pte_bytes_per_frame_ub_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%d, meta_pte_bytes_per_frame_ub_c = %d\n", __func__, k, meta_pte_bytes_per_frame_ub_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dcc_mrq_enable = %u\n", __func__, k, dcc_mrq_enable);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, vm_group_bytes = %u\n", __func__, k, vm_group_bytes[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dpde0_bytes_per_frame_ub_l = %u\n", __func__, k, dpde0_bytes_per_frame_ub_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, dpde0_bytes_per_frame_ub_c = %u\n", __func__, k, dpde0_bytes_per_frame_ub_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, meta_pte_bytes_per_frame_ub_l = %d\n", __func__, k, meta_pte_bytes_per_frame_ub_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d, meta_pte_bytes_per_frame_ub_c = %d\n", __func__, k, meta_pte_bytes_per_frame_ub_c[k]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		if (display_cfg-&gt;gpuvm_enable) {</div><div class='hunk'>@@ -10071,13 +10000,13 @@ static void CalculateVMGroupAndRequestTimes(</div><div class='ctx'> 			else</div><div class='ctx'> 				TimePerVMRequestFlip[k] = 0.0;</div><div class='ctx'> </div><div class='del'>-			dml2_printf("DML::%s: k=%u, dst_y_per_vm_vblank = %f\n", __func__, k, dst_y_per_vm_vblank[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, dst_y_per_vm_flip = %f\n", __func__, k, dst_y_per_vm_flip[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, line_time = %f\n", __func__, k, line_time);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, num_group_per_lower_vm_stage_pref = %f\n", __func__, k, num_group_per_lower_vm_stage_pref);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, num_group_per_lower_vm_stage_flip = %f\n", __func__, k, num_group_per_lower_vm_stage_flip);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, num_req_per_lower_vm_stage_pref = %f\n", __func__, k, num_req_per_lower_vm_stage_pref);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, num_req_per_lower_vm_stage_flip = %f\n", __func__, k, num_req_per_lower_vm_stage_flip);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, dst_y_per_vm_vblank = %f\n", __func__, k, dst_y_per_vm_vblank[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, dst_y_per_vm_flip = %f\n", __func__, k, dst_y_per_vm_flip[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, line_time = %f\n", __func__, k, line_time);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, num_group_per_lower_vm_stage_pref = %d\n", __func__, k, num_group_per_lower_vm_stage_pref);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, num_group_per_lower_vm_stage_flip = %d\n", __func__, k, num_group_per_lower_vm_stage_flip);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, num_req_per_lower_vm_stage_pref = %d\n", __func__, k, num_req_per_lower_vm_stage_pref);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, num_req_per_lower_vm_stage_flip = %d\n", __func__, k, num_req_per_lower_vm_stage_flip);</div><div class='ctx'> </div><div class='ctx'> 			if (display_cfg-&gt;gpuvm_max_page_table_levels &gt; 2) {</div><div class='ctx'> 				TimePerVMGroupVBlank[k] = TimePerVMGroupVBlank[k] / 2;</div><div class='hunk'>@@ -10094,10 +10023,10 @@ static void CalculateVMGroupAndRequestTimes(</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u, TimePerVMGroupVBlank = %f\n", __func__, k, TimePerVMGroupVBlank[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, TimePerVMGroupFlip = %f\n", __func__, k, TimePerVMGroupFlip[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, TimePerVMRequestVBlank = %f\n", __func__, k, TimePerVMRequestVBlank[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u, TimePerVMRequestFlip = %f\n", __func__, k, TimePerVMRequestFlip[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, TimePerVMGroupVBlank = %f\n", __func__, k, TimePerVMGroupVBlank[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, TimePerVMGroupFlip = %f\n", __func__, k, TimePerVMGroupFlip[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, TimePerVMRequestVBlank = %f\n", __func__, k, TimePerVMRequestVBlank[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u, TimePerVMRequestFlip = %f\n", __func__, k, TimePerVMRequestFlip[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -10113,7 +10042,6 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 	unsigned int SingleVTotal = 0;</div><div class='ctx'> 	bool SameTiming = true;</div><div class='ctx'> 	bool FoundCriticalSurface = false;</div><div class='del'>-	double LastZ8StutterPeriod = 0;</div><div class='ctx'> </div><div class='ctx'> 	memset(l, 0, sizeof(struct dml2_core_calcs_CalculateStutterEfficiency_locals));</div><div class='ctx'> </div><div class='hunk'>@@ -10127,9 +10055,9 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 				}</div><div class='ctx'> 				l-&gt;TotalCompressedReadBandwidth = l-&gt;TotalCompressedReadBandwidth + p-&gt;ReadBandwidthSurfaceLuma[k] / math_min2(p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.dcc_rate_plane0, l-&gt;MaximumEffectiveCompressionLuma);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: k=%u, ReadBandwidthSurfaceLuma = %f\n", __func__, k, p-&gt;ReadBandwidthSurfaceLuma[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, NetDCCRateLuma = %f\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.dcc_rate_plane0);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, MaximumEffectiveCompressionLuma = %f\n", __func__, k, l-&gt;MaximumEffectiveCompressionLuma);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, ReadBandwidthSurfaceLuma = %f\n", __func__, k, p-&gt;ReadBandwidthSurfaceLuma[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, NetDCCRateLuma = %f\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.dcc_rate_plane0);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, MaximumEffectiveCompressionLuma = %f\n", __func__, k, l-&gt;MaximumEffectiveCompressionLuma);</div><div class='ctx'> #endif</div><div class='ctx'> 				l-&gt;TotalZeroSizeRequestReadBandwidth = l-&gt;TotalZeroSizeRequestReadBandwidth + p-&gt;ReadBandwidthSurfaceLuma[k] * p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.fraction_of_zero_size_request_plane0;</div><div class='ctx'> 				l-&gt;TotalZeroSizeCompressedReadBandwidth = l-&gt;TotalZeroSizeCompressedReadBandwidth + p-&gt;ReadBandwidthSurfaceLuma[k] * p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.fraction_of_zero_size_request_plane0 / l-&gt;MaximumEffectiveCompressionLuma;</div><div class='hunk'>@@ -10142,9 +10070,9 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 					}</div><div class='ctx'> 					l-&gt;TotalCompressedReadBandwidth = l-&gt;TotalCompressedReadBandwidth + p-&gt;ReadBandwidthSurfaceChroma[k] / math_min2(p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.dcc_rate_plane1, l-&gt;MaximumEffectiveCompressionChroma);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-					dml2_printf("DML::%s: k=%u, ReadBandwidthSurfaceChroma = %f\n", __func__, k, p-&gt;ReadBandwidthSurfaceChroma[k]);</div><div class='del'>-					dml2_printf("DML::%s: k=%u, NetDCCRateChroma = %f\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.dcc_rate_plane1);</div><div class='del'>-					dml2_printf("DML::%s: k=%u, MaximumEffectiveCompressionChroma = %f\n", __func__, k, l-&gt;MaximumEffectiveCompressionChroma);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%u, ReadBandwidthSurfaceChroma = %f\n", __func__, k, p-&gt;ReadBandwidthSurfaceChroma[k]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%u, NetDCCRateChroma = %f\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.dcc_rate_plane1);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%u, MaximumEffectiveCompressionChroma = %f\n", __func__, k, l-&gt;MaximumEffectiveCompressionChroma);</div><div class='ctx'> #endif</div><div class='ctx'> 					l-&gt;TotalZeroSizeRequestReadBandwidth = l-&gt;TotalZeroSizeRequestReadBandwidth + p-&gt;ReadBandwidthSurfaceChroma[k] * p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.fraction_of_zero_size_request_plane1;</div><div class='ctx'> 					l-&gt;TotalZeroSizeCompressedReadBandwidth = l-&gt;TotalZeroSizeCompressedReadBandwidth + p-&gt;ReadBandwidthSurfaceChroma[k] * p-&gt;display_cfg-&gt;plane_descriptors[k].surface.dcc.informative.fraction_of_zero_size_request_plane1 / l-&gt;MaximumEffectiveCompressionChroma;</div><div class='hunk'>@@ -10160,19 +10088,19 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 	l-&gt;AverageDCCZeroSizeFraction = l-&gt;TotalZeroSizeRequestReadBandwidth / p-&gt;TotalDataReadBandwidth;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: UnboundedRequestEnabled = %u\n", __func__, p-&gt;UnboundedRequestEnabled);</div><div class='del'>-	dml2_printf("DML::%s: TotalCompressedReadBandwidth = %f\n", __func__, l-&gt;TotalCompressedReadBandwidth);</div><div class='del'>-	dml2_printf("DML::%s: TotalZeroSizeRequestReadBandwidth = %f\n", __func__, l-&gt;TotalZeroSizeRequestReadBandwidth);</div><div class='del'>-	dml2_printf("DML::%s: TotalZeroSizeCompressedReadBandwidth = %f\n", __func__, l-&gt;TotalZeroSizeCompressedReadBandwidth);</div><div class='del'>-	dml2_printf("DML::%s: MaximumEffectiveCompressionLuma = %f\n", __func__, l-&gt;MaximumEffectiveCompressionLuma);</div><div class='del'>-	dml2_printf("DML::%s: MaximumEffectiveCompressionChroma = %f\n", __func__, l-&gt;MaximumEffectiveCompressionChroma);</div><div class='del'>-	dml2_printf("DML::%s: AverageDCCCompressionRate = %f\n", __func__, l-&gt;AverageDCCCompressionRate);</div><div class='del'>-	dml2_printf("DML::%s: AverageDCCZeroSizeFraction = %f\n", __func__, l-&gt;AverageDCCZeroSizeFraction);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: UnboundedRequestEnabled = %u\n", __func__, p-&gt;UnboundedRequestEnabled);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalCompressedReadBandwidth = %f\n", __func__, l-&gt;TotalCompressedReadBandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalZeroSizeRequestReadBandwidth = %f\n", __func__, l-&gt;TotalZeroSizeRequestReadBandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalZeroSizeCompressedReadBandwidth = %f\n", __func__, l-&gt;TotalZeroSizeCompressedReadBandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaximumEffectiveCompressionLuma = %f\n", __func__, l-&gt;MaximumEffectiveCompressionLuma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MaximumEffectiveCompressionChroma = %f\n", __func__, l-&gt;MaximumEffectiveCompressionChroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: AverageDCCCompressionRate = %f\n", __func__, l-&gt;AverageDCCCompressionRate);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: AverageDCCZeroSizeFraction = %f\n", __func__, l-&gt;AverageDCCZeroSizeFraction);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: CompbufReservedSpace64B = %u (%f kbytes)\n", __func__, p-&gt;CompbufReservedSpace64B, p-&gt;CompbufReservedSpace64B * 64 / 1024.0);</div><div class='del'>-	dml2_printf("DML::%s: CompbufReservedSpaceZs = %u\n", __func__, p-&gt;CompbufReservedSpaceZs);</div><div class='del'>-	dml2_printf("DML::%s: CompressedBufferSizeInkByte = %u kbytes\n", __func__, p-&gt;CompressedBufferSizeInkByte);</div><div class='del'>-	dml2_printf("DML::%s: ROBBufferSizeInKByte = %u kbytes\n", __func__, p-&gt;ROBBufferSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: CompbufReservedSpace64B = %u (%f kbytes)\n", __func__, p-&gt;CompbufReservedSpace64B, p-&gt;CompbufReservedSpace64B * 64 / 1024.0);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: CompbufReservedSpaceZs = %u\n", __func__, p-&gt;CompbufReservedSpaceZs);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: CompressedBufferSizeInkByte = %u kbytes\n", __func__, p-&gt;CompressedBufferSizeInkByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ROBBufferSizeInKByte = %u kbytes\n", __func__, p-&gt;ROBBufferSizeInKByte);</div><div class='ctx'> #endif</div><div class='ctx'> 	if (l-&gt;AverageDCCZeroSizeFraction == 1) {</div><div class='ctx'> 		l-&gt;AverageZeroSizeCompressionRate = l-&gt;TotalZeroSizeRequestReadBandwidth / l-&gt;TotalZeroSizeCompressedReadBandwidth;</div><div class='hunk'>@@ -10189,10 +10117,10 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: min 1 = %f\n", __func__, p-&gt;CompressedBufferSizeInkByte * 1024 * l-&gt;AverageDCCCompressionRate);</div><div class='del'>-		dml2_printf("DML::%s: min 2 = %f\n", __func__, p-&gt;MetaFIFOSizeInKEntries * 1024 * 64 / (l-&gt;AverageDCCZeroSizeFraction / l-&gt;AverageZeroSizeCompressionRate + 1 / l-&gt;AverageDCCCompressionRate));</div><div class='del'>-		dml2_printf("DML::%s: min 3 = %d\n", __func__, (p-&gt;ROBBufferSizeInKByte * 1024 - p-&gt;CompbufReservedSpace64B * 64));</div><div class='del'>-		dml2_printf("DML::%s: min 4 = %f\n", __func__, (p-&gt;ZeroSizeBufferEntries - p-&gt;CompbufReservedSpaceZs) * 64 / (l-&gt;AverageDCCZeroSizeFraction / l-&gt;AverageZeroSizeCompressionRate));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: min 1 = %f\n", __func__, p-&gt;CompressedBufferSizeInkByte * 1024 * l-&gt;AverageDCCCompressionRate);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: min 2 = %f\n", __func__, p-&gt;MetaFIFOSizeInKEntries * 1024 * 64 / (l-&gt;AverageDCCZeroSizeFraction / l-&gt;AverageZeroSizeCompressionRate + 1 / l-&gt;AverageDCCCompressionRate));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: min 3 = %d\n", __func__, (p-&gt;ROBBufferSizeInKByte * 1024 - p-&gt;CompbufReservedSpace64B * 64));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: min 4 = %f\n", __func__, (p-&gt;ZeroSizeBufferEntries - p-&gt;CompbufReservedSpaceZs) * 64 / (l-&gt;AverageDCCZeroSizeFraction / l-&gt;AverageZeroSizeCompressionRate));</div><div class='ctx'> #endif</div><div class='ctx'> 	} else {</div><div class='ctx'> 		l-&gt;EffectiveCompressedBufferSize = math_min2((double)p-&gt;CompressedBufferSizeInkByte * 1024 * l-&gt;AverageDCCCompressionRate,</div><div class='hunk'>@@ -10200,16 +10128,16 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 			((double)p-&gt;ROBBufferSizeInKByte * 1024 - p-&gt;CompbufReservedSpace64B * 64) * (p-&gt;rob_alloc_compressed ? l-&gt;AverageDCCCompressionRate : 1.0);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: min 1 = %f\n", __func__, p-&gt;CompressedBufferSizeInkByte * 1024 * l-&gt;AverageDCCCompressionRate);</div><div class='del'>-		dml2_printf("DML::%s: min 2 = %f\n", __func__, p-&gt;MetaFIFOSizeInKEntries * 1024 * 64 * l-&gt;AverageDCCCompressionRate);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: min 1 = %f\n", __func__, p-&gt;CompressedBufferSizeInkByte * 1024 * l-&gt;AverageDCCCompressionRate);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: min 2 = %f\n", __func__, p-&gt;MetaFIFOSizeInKEntries * 1024 * 64 * l-&gt;AverageDCCCompressionRate);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: MetaFIFOSizeInKEntries = %u\n", __func__, p-&gt;MetaFIFOSizeInKEntries);</div><div class='del'>-	dml2_printf("DML::%s: ZeroSizeBufferEntries = %u\n", __func__, p-&gt;ZeroSizeBufferEntries);</div><div class='del'>-	dml2_printf("DML::%s: AverageZeroSizeCompressionRate = %f\n", __func__, l-&gt;AverageZeroSizeCompressionRate);</div><div class='del'>-	dml2_printf("DML::%s: EffectiveCompressedBufferSize = %f (%f kbytes)\n", __func__, l-&gt;EffectiveCompressedBufferSize, l-&gt;EffectiveCompressedBufferSize / 1024.0);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: MetaFIFOSizeInKEntries = %u\n", __func__, p-&gt;MetaFIFOSizeInKEntries);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ZeroSizeBufferEntries = %u\n", __func__, p-&gt;ZeroSizeBufferEntries);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: AverageZeroSizeCompressionRate = %f\n", __func__, l-&gt;AverageZeroSizeCompressionRate);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: EffectiveCompressedBufferSize = %f (%f kbytes)\n", __func__, l-&gt;EffectiveCompressedBufferSize, l-&gt;EffectiveCompressedBufferSize / 1024.0);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	*p-&gt;StutterPeriod = 0;</div><div class='hunk'>@@ -10220,15 +10148,15 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 			l-&gt;LinesInDETYRoundedDownToSwath = math_floor2(l-&gt;LinesInDETY, p-&gt;SwathHeightY[k]);</div><div class='ctx'> 			l-&gt;DETBufferingTimeY = l-&gt;LinesInDETYRoundedDownToSwath * ((double)p-&gt;display_cfg-&gt;stream_descriptors[p-&gt;display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)p-&gt;display_cfg-&gt;stream_descriptors[p-&gt;display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) / p-&gt;display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, DETBufferSizeY = %u (%u kbytes)\n", __func__, k, p-&gt;DETBufferSizeY[k], p-&gt;DETBufferSizeY[k] / 1024);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, BytePerPixelDETY = %f\n", __func__, k, p-&gt;BytePerPixelDETY[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, SwathWidthY = %u\n", __func__, k, p-&gt;SwathWidthY[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, ReadBandwidthSurfaceLuma = %f\n", __func__, k, p-&gt;ReadBandwidthSurfaceLuma[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, TotalDataReadBandwidth = %f\n", __func__, k, p-&gt;TotalDataReadBandwidth);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, LinesInDETY = %f\n", __func__, k, l-&gt;LinesInDETY);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, LinesInDETYRoundedDownToSwath = %f\n", __func__, k, l-&gt;LinesInDETYRoundedDownToSwath);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VRatio = %f\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, DETBufferingTimeY = %f\n", __func__, k, l-&gt;DETBufferingTimeY);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, DETBufferSizeY = %u (%u kbytes)\n", __func__, k, p-&gt;DETBufferSizeY[k], p-&gt;DETBufferSizeY[k] / 1024);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, BytePerPixelDETY = %f\n", __func__, k, p-&gt;BytePerPixelDETY[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, SwathWidthY = %u\n", __func__, k, p-&gt;SwathWidthY[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, ReadBandwidthSurfaceLuma = %f\n", __func__, k, p-&gt;ReadBandwidthSurfaceLuma[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, TotalDataReadBandwidth = %f\n", __func__, k, p-&gt;TotalDataReadBandwidth);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, LinesInDETY = %f\n", __func__, k, l-&gt;LinesInDETY);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, LinesInDETYRoundedDownToSwath = %f\n", __func__, k, l-&gt;LinesInDETYRoundedDownToSwath);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VRatio = %f\n", __func__, k, p-&gt;display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, DETBufferingTimeY = %f\n", __func__, k, l-&gt;DETBufferingTimeY);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 			if (!FoundCriticalSurface || l-&gt;DETBufferingTimeY &lt; *p-&gt;StutterPeriod) {</div><div class='hunk'>@@ -10248,17 +10176,17 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 				l-&gt;SinglePipeCriticalSurface = (p-&gt;DPPPerSurface[k] == 1);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: k=%u, FoundCriticalSurface = %u\n", __func__, k, FoundCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, StutterPeriod = %f\n", __func__, k, *p-&gt;StutterPeriod);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, MinTTUVBlankCriticalSurface = %f\n", __func__, k, l-&gt;MinTTUVBlankCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, FrameTimeCriticalSurface= %f\n", __func__, k, l-&gt;FrameTimeCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, VActiveTimeCriticalSurface = %f\n", __func__, k, l-&gt;VActiveTimeCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, BytePerPixelYCriticalSurface = %u\n", __func__, k, l-&gt;BytePerPixelYCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, SwathWidthYCriticalSurface = %f\n", __func__, k, l-&gt;SwathWidthYCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, SwathHeightYCriticalSurface = %f\n", __func__, k, l-&gt;SwathHeightYCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, BlockWidth256BytesYCriticalSurface = %u\n", __func__, k, l-&gt;BlockWidth256BytesYCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, SinglePlaneCriticalSurface = %u\n", __func__, k, l-&gt;SinglePlaneCriticalSurface);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, SinglePipeCriticalSurface = %u\n", __func__, k, l-&gt;SinglePipeCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, FoundCriticalSurface = %u\n", __func__, k, FoundCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, StutterPeriod = %f\n", __func__, k, *p-&gt;StutterPeriod);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, MinTTUVBlankCriticalSurface = %f\n", __func__, k, l-&gt;MinTTUVBlankCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, FrameTimeCriticalSurface= %f\n", __func__, k, l-&gt;FrameTimeCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, VActiveTimeCriticalSurface = %f\n", __func__, k, l-&gt;VActiveTimeCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, BytePerPixelYCriticalSurface = %u\n", __func__, k, l-&gt;BytePerPixelYCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, SwathWidthYCriticalSurface = %f\n", __func__, k, l-&gt;SwathWidthYCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, SwathHeightYCriticalSurface = %f\n", __func__, k, l-&gt;SwathHeightYCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, BlockWidth256BytesYCriticalSurface = %u\n", __func__, k, l-&gt;BlockWidth256BytesYCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, SinglePlaneCriticalSurface = %u\n", __func__, k, l-&gt;SinglePlaneCriticalSurface);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, SinglePipeCriticalSurface = %u\n", __func__, k, l-&gt;SinglePipeCriticalSurface);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -10276,14 +10204,14 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> </div><div class='ctx'> 	l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer = math_min2(*p-&gt;StutterPeriod * p-&gt;TotalDataReadBandwidth, l-&gt;EffectiveCompressedBufferSize);</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: AverageDCCCompressionRate = %f\n", __func__, l-&gt;AverageDCCCompressionRate);</div><div class='del'>-	dml2_printf("DML::%s: StutterPeriod*TotalDataReadBandwidth = %f (%f kbytes)\n", __func__, *p-&gt;StutterPeriod * p-&gt;TotalDataReadBandwidth, (*p-&gt;StutterPeriod * p-&gt;TotalDataReadBandwidth) / 1024.0);</div><div class='del'>-	dml2_printf("DML::%s: EffectiveCompressedBufferSize = %f (%f kbytes)\n", __func__, l-&gt;EffectiveCompressedBufferSize, l-&gt;EffectiveCompressedBufferSize / 1024.0);</div><div class='del'>-	dml2_printf("DML::%s: PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer = %f (%f kbytes)\n", __func__, l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer, l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer / 1024);</div><div class='del'>-	dml2_printf("DML::%s: ReturnBW = %f\n", __func__, p-&gt;ReturnBW);</div><div class='del'>-	dml2_printf("DML::%s: TotalDataReadBandwidth = %f\n", __func__, p-&gt;TotalDataReadBandwidth);</div><div class='del'>-	dml2_printf("DML::%s: TotalRowReadBandwidth = %f\n", __func__, l-&gt;TotalRowReadBandwidth);</div><div class='del'>-	dml2_printf("DML::%s: DCFCLK = %f\n", __func__, p-&gt;DCFCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: AverageDCCCompressionRate = %f\n", __func__, l-&gt;AverageDCCCompressionRate);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterPeriod*TotalDataReadBandwidth = %f (%f kbytes)\n", __func__, *p-&gt;StutterPeriod * p-&gt;TotalDataReadBandwidth, (*p-&gt;StutterPeriod * p-&gt;TotalDataReadBandwidth) / 1024.0);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: EffectiveCompressedBufferSize = %f (%f kbytes)\n", __func__, l-&gt;EffectiveCompressedBufferSize, l-&gt;EffectiveCompressedBufferSize / 1024.0);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer = %f (%f kbytes)\n", __func__, l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer, l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer / 1024);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ReturnBW = %f\n", __func__, p-&gt;ReturnBW);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalDataReadBandwidth = %f\n", __func__, p-&gt;TotalDataReadBandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalRowReadBandwidth = %f\n", __func__, l-&gt;TotalRowReadBandwidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCFCLK = %f\n", __func__, p-&gt;DCFCLK);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	l-&gt;StutterBurstTime = l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer</div><div class='hunk'>@@ -10292,10 +10220,10 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 		/ math_min2(p-&gt;DCFCLK * 64, p-&gt;ReturnBW * (p-&gt;hw_debug5 ? 1 : l-&gt;AverageDCCCompressionRate)) +</div><div class='ctx'> 		*p-&gt;StutterPeriod * l-&gt;TotalRowReadBandwidth / p-&gt;ReturnBW;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: Part 1 = %f\n", __func__, l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer / p-&gt;ReturnBW / (p-&gt;hw_debug5 ? 1 : l-&gt;AverageDCCCompressionRate));</div><div class='del'>-	dml2_printf("DML::%s: Part 2 = %f\n", __func__, (*p-&gt;StutterPeriod * p-&gt;TotalDataReadBandwidth - l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer) / (p-&gt;DCFCLK * 64));</div><div class='del'>-	dml2_printf("DML::%s: Part 3 = %f\n", __func__, *p-&gt;StutterPeriod * l-&gt;TotalRowReadBandwidth / p-&gt;ReturnBW);</div><div class='del'>-	dml2_printf("DML::%s: StutterBurstTime = %f\n", __func__, l-&gt;StutterBurstTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Part 1 = %f\n", __func__, l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer / p-&gt;ReturnBW / (p-&gt;hw_debug5 ? 1 : l-&gt;AverageDCCCompressionRate));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Part 2 = %f\n", __func__, (*p-&gt;StutterPeriod * p-&gt;TotalDataReadBandwidth - l-&gt;PartOfUncompressedPixelBurstThatFitsInROBAndCompressedBuffer) / (p-&gt;DCFCLK * 64));</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Part 3 = %f\n", __func__, *p-&gt;StutterPeriod * l-&gt;TotalRowReadBandwidth / p-&gt;ReturnBW);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterBurstTime = %f\n", __func__, l-&gt;StutterBurstTime);</div><div class='ctx'> #endif</div><div class='ctx'> 	l-&gt;TotalActiveWriteback = 0;</div><div class='ctx'> 	memset(l-&gt;stream_visited, 0, DML2_MAX_PLANES * sizeof(bool));</div><div class='hunk'>@@ -10324,9 +10252,9 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> </div><div class='ctx'> 	if (l-&gt;TotalActiveWriteback == 0) {</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: SRExitTime = %f\n", __func__, p-&gt;SRExitTime);</div><div class='del'>-		dml2_printf("DML::%s: SRExitZ8Time = %f\n", __func__, p-&gt;SRExitZ8Time);</div><div class='del'>-		dml2_printf("DML::%s: StutterPeriod = %f\n", __func__, *p-&gt;StutterPeriod);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: SRExitTime = %f\n", __func__, p-&gt;SRExitTime);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: SRExitZ8Time = %f\n", __func__, p-&gt;SRExitZ8Time);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: StutterPeriod = %f\n", __func__, *p-&gt;StutterPeriod);</div><div class='ctx'> #endif</div><div class='ctx'> 		*p-&gt;StutterEfficiencyNotIncludingVBlank = math_max2(0., 1 - (p-&gt;SRExitTime + l-&gt;StutterBurstTime) / *p-&gt;StutterPeriod) * 100;</div><div class='ctx'> 		*p-&gt;Z8StutterEfficiencyNotIncludingVBlank = math_max2(0., 1 - (p-&gt;SRExitZ8Time + l-&gt;StutterBurstTime) / *p-&gt;StutterPeriod) * 100;</div><div class='hunk'>@@ -10339,11 +10267,11 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 		*p-&gt;Z8NumberOfStutterBurstsPerFrame = 0;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: VActiveTimeCriticalSurface = %f\n", __func__, l-&gt;VActiveTimeCriticalSurface);</div><div class='del'>-	dml2_printf("DML::%s: StutterEfficiencyNotIncludingVBlank = %f\n", __func__, *p-&gt;StutterEfficiencyNotIncludingVBlank);</div><div class='del'>-	dml2_printf("DML::%s: Z8StutterEfficiencyNotIncludingVBlank = %f\n", __func__, *p-&gt;Z8StutterEfficiencyNotIncludingVBlank);</div><div class='del'>-	dml2_printf("DML::%s: NumberOfStutterBurstsPerFrame = %u\n", __func__, *p-&gt;NumberOfStutterBurstsPerFrame);</div><div class='del'>-	dml2_printf("DML::%s: Z8NumberOfStutterBurstsPerFrame = %u\n", __func__, *p-&gt;Z8NumberOfStutterBurstsPerFrame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: VActiveTimeCriticalSurface = %f\n", __func__, l-&gt;VActiveTimeCriticalSurface);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterEfficiencyNotIncludingVBlank = %f\n", __func__, *p-&gt;StutterEfficiencyNotIncludingVBlank);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Z8StutterEfficiencyNotIncludingVBlank = %f\n", __func__, *p-&gt;Z8StutterEfficiencyNotIncludingVBlank);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: NumberOfStutterBurstsPerFrame = %u\n", __func__, *p-&gt;NumberOfStutterBurstsPerFrame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Z8NumberOfStutterBurstsPerFrame = %u\n", __func__, *p-&gt;Z8NumberOfStutterBurstsPerFrame);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (*p-&gt;StutterEfficiencyNotIncludingVBlank &gt; 0) {</div><div class='hunk'>@@ -10358,7 +10286,7 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (*p-&gt;Z8StutterEfficiencyNotIncludingVBlank &gt; 0) {</div><div class='del'>-		LastZ8StutterPeriod = l-&gt;VActiveTimeCriticalSurface - (*p-&gt;Z8NumberOfStutterBurstsPerFrame - 1) * *p-&gt;StutterPeriod;</div><div class='add'>+		//LastZ8StutterPeriod = l-&gt;VActiveTimeCriticalSurface - (*p-&gt;Z8NumberOfStutterBurstsPerFrame - 1) * *p-&gt;StutterPeriod;</div><div class='ctx'> 		if (!((p-&gt;SynchronizeTimings || TotalNumberOfActiveOTG == 1) &amp;&amp; SameTiming)) {</div><div class='ctx'> 			*p-&gt;Z8StutterEfficiency = *p-&gt;Z8StutterEfficiencyNotIncludingVBlank;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -10370,25 +10298,25 @@ static void CalculateStutterEfficiency(struct dml2_core_internal_scratch *scratc</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: TotalNumberOfActiveOTG = %u\n", __func__, TotalNumberOfActiveOTG);</div><div class='del'>-	dml2_printf("DML::%s: SameTiming = %u\n", __func__, SameTiming);</div><div class='del'>-	dml2_printf("DML::%s: SynchronizeTimings = %u\n", __func__, p-&gt;SynchronizeTimings);</div><div class='del'>-	dml2_printf("DML::%s: LastZ8StutterPeriod = %f\n", __func__, LastZ8StutterPeriod);</div><div class='del'>-	dml2_printf("DML::%s: Z8StutterEnterPlusExitWatermark = %f\n", __func__, p-&gt;Z8StutterEnterPlusExitWatermark);</div><div class='del'>-	dml2_printf("DML::%s: StutterBurstTime = %f\n", __func__, l-&gt;StutterBurstTime);</div><div class='del'>-	dml2_printf("DML::%s: StutterPeriod = %f\n", __func__, *p-&gt;StutterPeriod);</div><div class='del'>-	dml2_printf("DML::%s: StutterEfficiency = %f\n", __func__, *p-&gt;StutterEfficiency);</div><div class='del'>-	dml2_printf("DML::%s: Z8StutterEfficiency = %f\n", __func__, *p-&gt;Z8StutterEfficiency);</div><div class='del'>-	dml2_printf("DML::%s: StutterEfficiencyNotIncludingVBlank = %f\n", __func__, *p-&gt;StutterEfficiencyNotIncludingVBlank);</div><div class='del'>-	dml2_printf("DML::%s: Z8NumberOfStutterBurstsPerFrame = %u\n", __func__, *p-&gt;Z8NumberOfStutterBurstsPerFrame);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: TotalNumberOfActiveOTG = %u\n", __func__, TotalNumberOfActiveOTG);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SameTiming = %u\n", __func__, SameTiming);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SynchronizeTimings = %u\n", __func__, p-&gt;SynchronizeTimings);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: LastZ8StutterPeriod = %f\n", __func__, *p-&gt;Z8StutterEfficiencyNotIncludingVBlank &gt; 0 ? l-&gt;VActiveTimeCriticalSurface - (*p-&gt;Z8NumberOfStutterBurstsPerFrame - 1) * *p-&gt;StutterPeriod : 0);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Z8StutterEnterPlusExitWatermark = %f\n", __func__, p-&gt;Z8StutterEnterPlusExitWatermark);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterBurstTime = %f\n", __func__, l-&gt;StutterBurstTime);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterPeriod = %f\n", __func__, *p-&gt;StutterPeriod);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterEfficiency = %f\n", __func__, *p-&gt;StutterEfficiency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Z8StutterEfficiency = %f\n", __func__, *p-&gt;Z8StutterEfficiency);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: StutterEfficiencyNotIncludingVBlank = %f\n", __func__, *p-&gt;StutterEfficiencyNotIncludingVBlank);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Z8NumberOfStutterBurstsPerFrame = %u\n", __func__, *p-&gt;Z8NumberOfStutterBurstsPerFrame);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	*p-&gt;DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE = !(!p-&gt;UnboundedRequestEnabled &amp;&amp; (p-&gt;NumberOfActiveSurfaces == 1) &amp;&amp; l-&gt;SinglePlaneCriticalSurface &amp;&amp; l-&gt;SinglePipeCriticalSurface);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: DETBufferSizeYCriticalSurface = %u\n", __func__, l-&gt;DETBufferSizeYCriticalSurface);</div><div class='del'>-	dml2_printf("DML::%s: PixelChunkSizeInKByte = %u\n", __func__, p-&gt;PixelChunkSizeInKByte);</div><div class='del'>-	dml2_printf("DML::%s: DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE = %u\n", __func__, *p-&gt;DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DETBufferSizeYCriticalSurface = %u\n", __func__, l-&gt;DETBufferSizeYCriticalSurface);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: PixelChunkSizeInKByte = %u\n", __func__, p-&gt;PixelChunkSizeInKByte);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE = %u\n", __func__, *p-&gt;DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -10422,7 +10350,7 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 	double max_uclk_mhz = 0;</div><div class='ctx'> 	double min_return_latency_in_DCFCLK_cycles = 0;</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: --- START --- \n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: --- START --- \n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;mode_lib-&gt;scratch, 0, sizeof(struct dml2_core_internal_scratch));</div><div class='ctx'> 	memset(&amp;mode_lib-&gt;mp, 0, sizeof(struct dml2_core_internal_mode_program));</div><div class='hunk'>@@ -10444,13 +10372,13 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> 		unsigned int stream_index = display_cfg-&gt;plane_descriptors[k].stream_index;</div><div class='del'>-		DML2_ASSERT(cfg_support_info-&gt;stream_support_info[stream_index].odms_used &lt;= 4);</div><div class='del'>-		DML2_ASSERT(cfg_support_info-&gt;stream_support_info[stream_index].num_odm_output_segments == 4 ||</div><div class='add'>+		DML_ASSERT(cfg_support_info-&gt;stream_support_info[stream_index].odms_used &lt;= 4);</div><div class='add'>+		DML_ASSERT(cfg_support_info-&gt;stream_support_info[stream_index].num_odm_output_segments == 4 ||</div><div class='ctx'> 					cfg_support_info-&gt;stream_support_info[stream_index].num_odm_output_segments == 2 ||</div><div class='ctx'> 					cfg_support_info-&gt;stream_support_info[stream_index].num_odm_output_segments == 1);</div><div class='ctx'> </div><div class='ctx'> 		if (cfg_support_info-&gt;stream_support_info[stream_index].odms_used &gt; 1)</div><div class='del'>-			DML2_ASSERT(cfg_support_info-&gt;stream_support_info[stream_index].num_odm_output_segments == 1);</div><div class='add'>+			DML_ASSERT(cfg_support_info-&gt;stream_support_info[stream_index].num_odm_output_segments == 1);</div><div class='ctx'> </div><div class='ctx'> 		switch (cfg_support_info-&gt;stream_support_info[stream_index].odms_used) {</div><div class='ctx'> 		case (4):</div><div class='hunk'>@@ -10476,51 +10404,51 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 	for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> 		mode_lib-&gt;mp.NoOfDPP[k] = cfg_support_info-&gt;plane_support_info[k].dpps_used;</div><div class='ctx'> 		mode_lib-&gt;mp.Dppclk[k] = programming-&gt;plane_programming[k].min_clocks.dcn4x.dppclk_khz / 1000.0;</div><div class='del'>-		DML2_ASSERT(mode_lib-&gt;mp.Dppclk[k] &gt; 0);</div><div class='add'>+		DML_ASSERT(mode_lib-&gt;mp.Dppclk[k] &gt; 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> 		unsigned int stream_index = display_cfg-&gt;plane_descriptors[k].stream_index;</div><div class='ctx'> 		mode_lib-&gt;mp.DSCCLK[k] = programming-&gt;stream_programming[stream_index].min_clocks.dcn4x.dscclk_khz / 1000.0;</div><div class='del'>-		dml2_printf("DML::%s: k=%d stream_index=%d, mode_lib-&gt;mp.DSCCLK = %f\n", __func__, k, stream_index, mode_lib-&gt;mp.DSCCLK[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d stream_index=%d, mode_lib-&gt;mp.DSCCLK = %f\n", __func__, k, stream_index, mode_lib-&gt;mp.DSCCLK[k]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mode_lib-&gt;mp.Dispclk = programming-&gt;min_clocks.dcn4x.dispclk_khz / 1000.0;</div><div class='ctx'> 	mode_lib-&gt;mp.DCFCLKDeepSleep = programming-&gt;min_clocks.dcn4x.deepsleep_dcfclk_khz / 1000.0;</div><div class='ctx'> </div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.Dcfclk &gt; 0);</div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.FabricClock &gt; 0);</div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.dram_bw_mbps &gt; 0);</div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.uclk_freq_mhz &gt; 0);</div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.GlobalDPPCLK &gt; 0);</div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.Dispclk &gt; 0);</div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.DCFCLKDeepSleep &gt; 0);</div><div class='del'>-	DML2_ASSERT(s-&gt;SOCCLK &gt; 0);</div><div class='del'>-</div><div class='del'>-#ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: num_active_planes = %u\n", __func__, s-&gt;num_active_planes);</div><div class='del'>-	dml2_printf("DML::%s: num_active_pipes = %u\n", __func__, mode_lib-&gt;mp.num_active_pipes);</div><div class='del'>-	dml2_printf("DML::%s: Dcfclk = %f\n", __func__, mode_lib-&gt;mp.Dcfclk);</div><div class='del'>-	dml2_printf("DML::%s: FabricClock = %f\n", __func__, mode_lib-&gt;mp.FabricClock);</div><div class='del'>-	dml2_printf("DML::%s: dram_bw_mbps = %f\n", __func__, mode_lib-&gt;mp.dram_bw_mbps);</div><div class='del'>-	dml2_printf("DML::%s: uclk_freq_mhz = %f\n", __func__, mode_lib-&gt;mp.uclk_freq_mhz);</div><div class='del'>-	dml2_printf("DML::%s: Dispclk = %f\n", __func__, mode_lib-&gt;mp.Dispclk);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.Dcfclk &gt; 0);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.FabricClock &gt; 0);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.dram_bw_mbps &gt; 0);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.uclk_freq_mhz &gt; 0);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.GlobalDPPCLK &gt; 0);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.Dispclk &gt; 0);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.DCFCLKDeepSleep &gt; 0);</div><div class='add'>+	DML_ASSERT(s-&gt;SOCCLK &gt; 0);</div><div class='add'>+</div><div class='add'>+#ifdef __DML_VBA_DEBUG__</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_active_planes = %u\n", __func__, s-&gt;num_active_planes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_active_pipes = %u\n", __func__, mode_lib-&gt;mp.num_active_pipes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Dcfclk = %f\n", __func__, mode_lib-&gt;mp.Dcfclk);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: FabricClock = %f\n", __func__, mode_lib-&gt;mp.FabricClock);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dram_bw_mbps = %f\n", __func__, mode_lib-&gt;mp.dram_bw_mbps);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: uclk_freq_mhz = %f\n", __func__, mode_lib-&gt;mp.uclk_freq_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: Dispclk = %f\n", __func__, mode_lib-&gt;mp.Dispclk);</div><div class='ctx'> 	for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='del'>-		dml2_printf("DML::%s: Dppclk[%0d] = %f\n", __func__, k, mode_lib-&gt;mp.Dppclk[k]);</div><div class='del'>-	}</div><div class='del'>-	dml2_printf("DML::%s: GlobalDPPCLK = %f\n", __func__, mode_lib-&gt;mp.GlobalDPPCLK);</div><div class='del'>-	dml2_printf("DML::%s: DCFCLKDeepSleep = %f\n", __func__, mode_lib-&gt;mp.DCFCLKDeepSleep);</div><div class='del'>-	dml2_printf("DML::%s: SOCCLK = %f\n", __func__, s-&gt;SOCCLK);</div><div class='del'>-	dml2_printf("DML::%s: min_clk_index = %0d\n", __func__, in_out_params-&gt;min_clk_index);</div><div class='del'>-	dml2_printf("DML::%s: min_clk_table min_fclk_khz = %d\n", __func__, min_clk_table-&gt;dram_bw_table.entries[in_out_params-&gt;min_clk_index].min_fclk_khz);</div><div class='del'>-	dml2_printf("DML::%s: min_clk_table uclk_mhz = %f\n", __func__, dram_bw_kbps_to_uclk_mhz(min_clk_table-&gt;dram_bw_table.entries[in_out_params-&gt;min_clk_index].pre_derate_dram_bw_kbps, &amp;mode_lib-&gt;soc.clk_table.dram_config));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Dppclk[%0d] = %f\n", __func__, k, mode_lib-&gt;mp.Dppclk[k]);</div><div class='add'>+	}</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: GlobalDPPCLK = %f\n", __func__, mode_lib-&gt;mp.GlobalDPPCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: DCFCLKDeepSleep = %f\n", __func__, mode_lib-&gt;mp.DCFCLKDeepSleep);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: SOCCLK = %f\n", __func__, s-&gt;SOCCLK);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_clk_index = %0d\n", __func__, in_out_params-&gt;min_clk_index);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_clk_table min_fclk_khz = %ld\n", __func__, min_clk_table-&gt;dram_bw_table.entries[in_out_params-&gt;min_clk_index].min_fclk_khz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_clk_table uclk_mhz = %f\n", __func__, dram_bw_kbps_to_uclk_mhz(min_clk_table-&gt;dram_bw_table.entries[in_out_params-&gt;min_clk_index].pre_derate_dram_bw_kbps, &amp;mode_lib-&gt;soc.clk_table.dram_config));</div><div class='ctx'> 	for (k = 0; k &lt; mode_lib-&gt;mp.num_active_pipes; ++k) {</div><div class='del'>-		dml2_printf("DML::%s: pipe=%d is in plane=%d\n", __func__, k, mode_lib-&gt;mp.pipe_plane[k]);</div><div class='del'>-		dml2_printf("DML::%s: Per-plane DPPPerSurface[%0d] = %d\n", __func__, k, mode_lib-&gt;mp.NoOfDPP[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: pipe=%d is in plane=%d\n", __func__, k, mode_lib-&gt;mp.pipe_plane[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Per-plane DPPPerSurface[%0d] = %d\n", __func__, k, mode_lib-&gt;mp.NoOfDPP[k]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; s-&gt;num_active_planes; k++)</div><div class='del'>-		dml2_printf("DML::%s: plane_%d: reserved_vblank_time_ns = %u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: plane_%d: reserved_vblank_time_ns = %lu\n", __func__, k, display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	CalculateMaxDETAndMinCompressedBufferSize(</div><div class='hunk'>@@ -10617,8 +10545,8 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 			((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000));</div><div class='ctx'> 		mode_lib-&gt;mp.vactive_sw_bw_l[k] = mode_lib-&gt;mp.SwathWidthSingleDPPY[k] * mode_lib-&gt;mp.BytePerPixelY[k] / (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio;</div><div class='ctx'> 		mode_lib-&gt;mp.vactive_sw_bw_c[k] = mode_lib-&gt;mp.SwathWidthSingleDPPC[k] * mode_lib-&gt;mp.BytePerPixelC[k] / (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000)) * display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane1.v_ratio;</div><div class='del'>-		dml2_printf("DML::%s: vactive_sw_bw_l[%i] = %fBps\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_l[k]);</div><div class='del'>-		dml2_printf("DML::%s: vactive_sw_bw_c[%i] = %fBps\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_c[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: vactive_sw_bw_l[%i] = %fBps\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_l[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: vactive_sw_bw_c[%i] = %fBps\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_c[k]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	CalculateSwathAndDETConfiguration_params-&gt;display_cfg = display_cfg;</div><div class='hunk'>@@ -11097,7 +11025,7 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 		mode_lib-&gt;soc.qos_parameters.qos_params.dcn4x.fabric_max_transport_latency_margin);</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='del'>-		bool cursor_not_enough_urgent_latency_hiding = 0;</div><div class='add'>+		bool cursor_not_enough_urgent_latency_hiding = false;</div><div class='ctx'> 		s-&gt;line_times[k] = display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total /</div><div class='ctx'> 			((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='ctx'> </div><div class='hunk'>@@ -11173,8 +11101,8 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 			mode_lib-&gt;mp.WritebackDelay[k]);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%u MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='del'>-		dml2_printf("DML::%s: k=%u WritebackDelay = %f\n", __func__, k, mode_lib-&gt;mp.WritebackDelay[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%u WritebackDelay = %f\n", __func__, k, mode_lib-&gt;mp.WritebackDelay[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -11183,7 +11111,7 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 		s-&gt;immediate_flip_required = s-&gt;immediate_flip_required || display_cfg-&gt;plane_descriptors[k].immediate_flip;</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: immediate_flip_required = %u\n", __func__, s-&gt;immediate_flip_required);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: immediate_flip_required = %u\n", __func__, s-&gt;immediate_flip_required);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (s-&gt;num_active_planes &gt; 1) {</div><div class='hunk'>@@ -11219,12 +11147,12 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 		s-&gt;DestinationLineTimesForPrefetchLessThan2 = false;</div><div class='ctx'> 		s-&gt;VRatioPrefetchMoreThanMax = false;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: Start one iteration of prefetch schedule evaluation\n", __func__);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Start one iteration of prefetch schedule evaluation\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 		for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> 			struct dml2_core_internal_DmlPipe *myPipe = &amp;s-&gt;myPipe;</div><div class='ctx'> </div><div class='del'>-			dml2_printf("DML::%s: k=%d MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%d MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='ctx'> 			mode_lib-&gt;mp.TWait[k] = CalculateTWait(</div><div class='ctx'> 					display_cfg-&gt;plane_descriptors[k].overrides.reserved_vblank_time_ns,</div><div class='ctx'> 					mode_lib-&gt;mp.UrgentLatency,</div><div class='hunk'>@@ -11261,7 +11189,7 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 			myPipe-&gt;ProgressiveToInterlaceUnitInOPP = mode_lib-&gt;ip.ptoi_supported;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: Calling CalculatePrefetchSchedule for k=%u\n", __func__, k);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Calling CalculatePrefetchSchedule for k=%u\n", __func__, k);</div><div class='ctx'> #endif</div><div class='ctx'> 			CalculatePrefetchSchedule_params-&gt;display_cfg = display_cfg;</div><div class='ctx'> 			CalculatePrefetchSchedule_params-&gt;HostVMInefficiencyFactor = s-&gt;HostVMInefficiencyFactorPrefetch;</div><div class='hunk'>@@ -11356,7 +11284,7 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 				mode_lib-&gt;mp.impacted_prefetch_margin_us[k] = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%0u NoTimeToPrefetch=%0d\n", __func__, k, mode_lib-&gt;mp.NoTimeToPrefetch[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%0u NoTimeToPrefetch=%0d\n", __func__, k, mode_lib-&gt;mp.NoTimeToPrefetch[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 			mode_lib-&gt;mp.VStartupMin[k] = s-&gt;MaxVStartupLines[k];</div><div class='ctx'> 		} // for k</div><div class='hunk'>@@ -11366,9 +11294,9 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 			if (mode_lib-&gt;mp.NoTimeToPrefetch[k] == true ||</div><div class='ctx'> 				mode_lib-&gt;mp.NotEnoughTimeForDynamicMetadata[k] ||</div><div class='ctx'> 				mode_lib-&gt;mp.DSTYAfterScaler[k] &gt; 8) {</div><div class='del'>-				dml2_printf("DML::%s: k=%u, NoTimeToPrefetch = %0d\n", __func__, k, mode_lib-&gt;mp.NoTimeToPrefetch[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, NotEnoughTimeForDynamicMetadata=%u\n", __func__, k, mode_lib-&gt;mp.NotEnoughTimeForDynamicMetadata[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%u, DSTYAfterScaler=%u (should be &lt;= 0)\n", __func__, k, mode_lib-&gt;mp.DSTYAfterScaler[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, NoTimeToPrefetch = %0d\n", __func__, k, mode_lib-&gt;mp.NoTimeToPrefetch[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, NotEnoughTimeForDynamicMetadata=%u\n", __func__, k, mode_lib-&gt;mp.NotEnoughTimeForDynamicMetadata[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, DSTYAfterScaler=%u (should be &lt;= 0)\n", __func__, k, mode_lib-&gt;mp.DSTYAfterScaler[k]);</div><div class='ctx'> 				mode_lib-&gt;mp.PrefetchModeSupported = false;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (mode_lib-&gt;mp.dst_y_prefetch[k] &lt; 2)</div><div class='hunk'>@@ -11377,24 +11305,24 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 			if (mode_lib-&gt;mp.VRatioPrefetchY[k] &gt; __DML2_CALCS_MAX_VRATIO_PRE__ ||</div><div class='ctx'> 				mode_lib-&gt;mp.VRatioPrefetchC[k] &gt; __DML2_CALCS_MAX_VRATIO_PRE__) {</div><div class='ctx'> 				s-&gt;VRatioPrefetchMoreThanMax = true;</div><div class='del'>-				dml2_printf("DML::%s: k=%d, VRatioPrefetchY=%f (should not be &lt; %f)\n", __func__, k, mode_lib-&gt;mp.VRatioPrefetchY[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='del'>-				dml2_printf("DML::%s: k=%d, VRatioPrefetchC=%f (should not be &lt; %f)\n", __func__, k, mode_lib-&gt;mp.VRatioPrefetchC[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='del'>-				dml2_printf("DML::%s: VRatioPrefetchMoreThanMax = %u\n", __func__, s-&gt;VRatioPrefetchMoreThanMax);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, VRatioPrefetchY=%f (should not be &lt; %f)\n", __func__, k, mode_lib-&gt;mp.VRatioPrefetchY[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%d, VRatioPrefetchC=%f (should not be &lt; %f)\n", __func__, k, mode_lib-&gt;mp.VRatioPrefetchC[k], __DML2_CALCS_MAX_VRATIO_PRE__);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: VRatioPrefetchMoreThanMax = %u\n", __func__, s-&gt;VRatioPrefetchMoreThanMax);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (mode_lib-&gt;mp.NotEnoughUrgentLatencyHiding[k]) {</div><div class='del'>-				dml2_printf("DML::%s: k=%u, NotEnoughUrgentLatencyHiding = %u\n", __func__, k, mode_lib-&gt;mp.NotEnoughUrgentLatencyHiding[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%u, NotEnoughUrgentLatencyHiding = %u\n", __func__, k, mode_lib-&gt;mp.NotEnoughUrgentLatencyHiding[k]);</div><div class='ctx'> 				mode_lib-&gt;mp.PrefetchModeSupported = false;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (s-&gt;VRatioPrefetchMoreThanMax == true || s-&gt;DestinationLineTimesForPrefetchLessThan2 == true) {</div><div class='del'>-			dml2_printf("DML::%s: VRatioPrefetchMoreThanMax = %u\n", __func__, s-&gt;VRatioPrefetchMoreThanMax);</div><div class='del'>-			dml2_printf("DML::%s: DestinationLineTimesForPrefetchLessThan2 = %u\n", __func__, s-&gt;DestinationLineTimesForPrefetchLessThan2);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: VRatioPrefetchMoreThanMax = %u\n", __func__, s-&gt;VRatioPrefetchMoreThanMax);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: DestinationLineTimesForPrefetchLessThan2 = %u\n", __func__, s-&gt;DestinationLineTimesForPrefetchLessThan2);</div><div class='ctx'> 			mode_lib-&gt;mp.PrefetchModeSupported = false;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: Prefetch schedule is %sOK at vstartup = %u\n", __func__,</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Prefetch schedule is %sOK at vstartup = %u\n", __func__,</div><div class='ctx'> 			mode_lib-&gt;mp.PrefetchModeSupported ? "" : "NOT ", CalculatePrefetchSchedule_params-&gt;VStartup);</div><div class='ctx'> </div><div class='ctx'> 		// Prefetch schedule OK, now check prefetch bw</div><div class='hunk'>@@ -11422,24 +11350,24 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 					&amp;mode_lib-&gt;mp.NotEnoughUrgentLatencyHidingPre[k]);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: k=%0u DPPPerSurface=%u\n", __func__, k, mode_lib-&gt;mp.NoOfDPP[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u UrgentBurstFactorLuma=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorLuma[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u UrgentBurstFactorChroma=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorChroma[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u UrgentBurstFactorLumaPre=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorLumaPre[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u UrgentBurstFactorChromaPre=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorChromaPre[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u DPPPerSurface=%u\n", __func__, k, mode_lib-&gt;mp.NoOfDPP[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u UrgentBurstFactorLuma=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorLuma[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u UrgentBurstFactorChroma=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorChroma[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u UrgentBurstFactorLumaPre=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorLumaPre[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u UrgentBurstFactorChromaPre=%f\n", __func__, k, mode_lib-&gt;mp.UrgentBurstFactorChromaPre[k]);</div><div class='ctx'> </div><div class='del'>-				dml2_printf("DML::%s: k=%0u VRatioPrefetchY=%f\n", __func__, k, mode_lib-&gt;mp.VRatioPrefetchY[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u VRatioY=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u VRatioPrefetchY=%f\n", __func__, k, mode_lib-&gt;mp.VRatioPrefetchY[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u VRatioY=%f\n", __func__, k, display_cfg-&gt;plane_descriptors[k].composition.scaler_info.plane0.v_ratio);</div><div class='ctx'> </div><div class='del'>-				dml2_printf("DML::%s: k=%0u prefetch_vmrow_bw=%f\n", __func__, k, mode_lib-&gt;mp.prefetch_vmrow_bw[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u vactive_sw_bw_l=%f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_l[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u vactive_sw_bw_c=%f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_c[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u cursor_bw=%f\n", __func__, k, mode_lib-&gt;mp.cursor_bw[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u dpte_row_bw=%f\n", __func__, k, mode_lib-&gt;mp.dpte_row_bw[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u meta_row_bw=%f\n", __func__, k, mode_lib-&gt;mp.meta_row_bw[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u RequiredPrefetchPixelDataBWLuma=%f\n", __func__, k, mode_lib-&gt;mp.RequiredPrefetchPixelDataBWLuma[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u RequiredPrefetchPixelDataBWChroma=%f\n", __func__, k, mode_lib-&gt;mp.RequiredPrefetchPixelDataBWChroma[k]);</div><div class='del'>-				dml2_printf("DML::%s: k=%0u prefetch_cursor_bw=%f\n", __func__, k, mode_lib-&gt;mp.prefetch_cursor_bw[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u prefetch_vmrow_bw=%f\n", __func__, k, mode_lib-&gt;mp.prefetch_vmrow_bw[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u vactive_sw_bw_l=%f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_l[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u vactive_sw_bw_c=%f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_c[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u cursor_bw=%f\n", __func__, k, mode_lib-&gt;mp.cursor_bw[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u dpte_row_bw=%f\n", __func__, k, mode_lib-&gt;mp.dpte_row_bw[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u meta_row_bw=%f\n", __func__, k, mode_lib-&gt;mp.meta_row_bw[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u RequiredPrefetchPixelDataBWLuma=%f\n", __func__, k, mode_lib-&gt;mp.RequiredPrefetchPixelDataBWLuma[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u RequiredPrefetchPixelDataBWChroma=%f\n", __func__, k, mode_lib-&gt;mp.RequiredPrefetchPixelDataBWChroma[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k=%0u prefetch_cursor_bw=%f\n", __func__, k, mode_lib-&gt;mp.prefetch_cursor_bw[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -11503,11 +11431,11 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 				mode_lib-&gt;mp.urg_bandwidth_available);</div><div class='ctx'> </div><div class='ctx'> 			if (!mode_lib-&gt;mp.PrefetchModeSupported)</div><div class='del'>-				dml2_printf("DML::%s: Bandwidth not sufficient for prefetch!\n", __func__);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Bandwidth not sufficient for prefetch!\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 			for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> 				if (mode_lib-&gt;mp.NotEnoughUrgentLatencyHidingPre[k]) {</div><div class='del'>-					dml2_printf("DML::%s: k=%u, NotEnoughUrgentLatencyHidingPre = %u\n", __func__, k, mode_lib-&gt;mp.NotEnoughUrgentLatencyHidingPre[k]);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: k=%u, NotEnoughUrgentLatencyHidingPre = %u\n", __func__, k, mode_lib-&gt;mp.NotEnoughUrgentLatencyHidingPre[k]);</div><div class='ctx'> 					mode_lib-&gt;mp.PrefetchModeSupported = false;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='hunk'>@@ -11533,12 +11461,12 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 				}</div><div class='ctx'> 				mode_lib-&gt;mp.TotImmediateFlipBytes += s-&gt;per_pipe_flip_bytes[k] * mode_lib-&gt;mp.NoOfDPP[k];</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML::%s: k = %u\n", __func__, k);</div><div class='del'>-				dml2_printf("DML::%s: DPPPerSurface = %u\n", __func__, mode_lib-&gt;mp.NoOfDPP[k]);</div><div class='del'>-				dml2_printf("DML::%s: vm_bytes = %u\n", __func__, mode_lib-&gt;mp.vm_bytes[k]);</div><div class='del'>-				dml2_printf("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, mode_lib-&gt;mp.PixelPTEBytesPerRow[k]);</div><div class='del'>-				dml2_printf("DML::%s: meta_row_bytes = %u\n", __func__, mode_lib-&gt;mp.meta_row_bytes[k]);</div><div class='del'>-				dml2_printf("DML::%s: TotImmediateFlipBytes = %u\n", __func__, mode_lib-&gt;mp.TotImmediateFlipBytes);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: k = %u\n", __func__, k);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: DPPPerSurface = %u\n", __func__, mode_lib-&gt;mp.NoOfDPP[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: vm_bytes = %u\n", __func__, mode_lib-&gt;mp.vm_bytes[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: PixelPTEBytesPerRow = %u\n", __func__, mode_lib-&gt;mp.PixelPTEBytesPerRow[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: meta_row_bytes = %u\n", __func__, mode_lib-&gt;mp.meta_row_bytes[k]);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: TotImmediateFlipBytes = %u\n", __func__, mode_lib-&gt;mp.TotImmediateFlipBytes);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> 			for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='hunk'>@@ -11631,13 +11559,13 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 				mode_lib-&gt;mp.urg_bandwidth_available);</div><div class='ctx'> </div><div class='ctx'> 			if (!mode_lib-&gt;mp.ImmediateFlipSupported)</div><div class='del'>-				dml2_printf("DML::%s: Bandwidth not sufficient for flip!", __func__);</div><div class='add'>+				DML_LOG_VERBOSE("DML::%s: Bandwidth not sufficient for flip!", __func__);</div><div class='ctx'> </div><div class='ctx'> 			for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> 				if (display_cfg-&gt;plane_descriptors[k].immediate_flip &amp;&amp; mode_lib-&gt;mp.ImmediateFlipSupportedForPipe[k] == false) {</div><div class='ctx'> 					mode_lib-&gt;mp.ImmediateFlipSupported = false;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-					dml2_printf("DML::%s: Pipe %0d not supporting iflip!\n", __func__, k);</div><div class='add'>+					DML_LOG_VERBOSE("DML::%s: Pipe %0d not supporting iflip!\n", __func__, k);</div><div class='ctx'> #endif</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='hunk'>@@ -11650,28 +11578,28 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 		mode_lib-&gt;mp.PrefetchAndImmediateFlipSupported = (mode_lib-&gt;mp.PrefetchModeSupported == true &amp;&amp; (!must_support_iflip || mode_lib-&gt;mp.ImmediateFlipSupported));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: PrefetchModeSupported = %u\n", __func__, mode_lib-&gt;mp.PrefetchModeSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: PrefetchModeSupported = %u\n", __func__, mode_lib-&gt;mp.PrefetchModeSupported);</div><div class='ctx'> 		for (k = 0; k &lt; s-&gt;num_active_planes; ++k)</div><div class='del'>-			dml2_printf("DML::%s: immediate_flip_required[%u] = %u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].immediate_flip);</div><div class='del'>-		dml2_printf("DML::%s: HostVMEnable = %u\n", __func__, display_cfg-&gt;hostvm_enable);</div><div class='del'>-		dml2_printf("DML::%s: ImmediateFlipSupported = %u\n", __func__, mode_lib-&gt;mp.ImmediateFlipSupported);</div><div class='del'>-		dml2_printf("DML::%s: PrefetchAndImmediateFlipSupported = %u\n", __func__, mode_lib-&gt;mp.PrefetchAndImmediateFlipSupported);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: immediate_flip_required[%u] = %u\n", __func__, k, display_cfg-&gt;plane_descriptors[k].immediate_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: HostVMEnable = %u\n", __func__, display_cfg-&gt;hostvm_enable);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: ImmediateFlipSupported = %u\n", __func__, mode_lib-&gt;mp.ImmediateFlipSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: PrefetchAndImmediateFlipSupported = %u\n", __func__, mode_lib-&gt;mp.PrefetchAndImmediateFlipSupported);</div><div class='ctx'> #endif</div><div class='del'>-		dml2_printf("DML::%s: Done one iteration: k=%d, MaxVStartupLines=%u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Done one iteration: k=%d, MaxVStartupLines=%u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (k = 0; k &lt; s-&gt;num_active_planes; ++k)</div><div class='del'>-		dml2_printf("DML::%s: k=%d MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='ctx'> </div><div class='ctx'> 	if (!mode_lib-&gt;mp.PrefetchAndImmediateFlipSupported) {</div><div class='del'>-		dml2_printf("DML::%s: Bad, Prefetch and flip scheduling solution NOT found!\n", __func__);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Bad, Prefetch and flip scheduling solution NOT found!\n", __func__);</div><div class='ctx'> 	} else {</div><div class='del'>-		dml2_printf("DML::%s: Good, Prefetch and flip scheduling solution found\n", __func__);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: Good, Prefetch and flip scheduling solution found\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 		// DCC Configuration</div><div class='ctx'> 		for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: Calculate DCC configuration for surface k=%u\n", __func__, k);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: Calculate DCC configuration for surface k=%u\n", __func__, k);</div><div class='ctx'> #endif</div><div class='ctx'> 			CalculateDCCConfiguration(</div><div class='ctx'> 				display_cfg-&gt;plane_descriptors[k].surface.dcc.enable,</div><div class='hunk'>@@ -11780,8 +11708,8 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> </div><div class='ctx'> 		calculate_pstate_keepout_dst_lines(display_cfg, &amp;mode_lib-&gt;mp.Watermark, mode_lib-&gt;mp.pstate_keepout_dst_lines);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML::%s: DEBUG stream_index = %0d\n", __func__, display_cfg-&gt;plane_descriptors[0].stream_index);</div><div class='del'>-		dml2_printf("DML::%s: DEBUG PixelClock = %d kHz\n", __func__, (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[0].stream_index].timing.pixel_clock_khz));</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: DEBUG stream_index = %0d\n", __func__, display_cfg-&gt;plane_descriptors[0].stream_index);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: DEBUG PixelClock = %ld kHz\n", __func__, (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[0].stream_index].timing.pixel_clock_khz));</div><div class='ctx'> </div><div class='ctx'> 		//Display Pipeline Delivery Time in Prefetch, Groups</div><div class='ctx'> 		CalculatePixelDeliveryTimes(</div><div class='hunk'>@@ -11893,15 +11821,15 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 				mode_lib-&gt;mp.MinTTUVBlank[k] = mode_lib-&gt;mp.TCalc + mode_lib-&gt;mp.MinTTUVBlank[k];</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, MinTTUVBlank = %f (before vstartup margin)\n", __func__, k, mode_lib-&gt;mp.MinTTUVBlank[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, MinTTUVBlank = %f (before vstartup margin)\n", __func__, k, mode_lib-&gt;mp.MinTTUVBlank[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 			s-&gt;Tvstartup_margin = (s-&gt;MaxVStartupLines[k] - mode_lib-&gt;mp.VStartupMin[k]) * display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total / ((double)display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.pixel_clock_khz / 1000);</div><div class='ctx'> 			mode_lib-&gt;mp.MinTTUVBlank[k] = mode_lib-&gt;mp.MinTTUVBlank[k] + s-&gt;Tvstartup_margin;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, Tvstartup_margin = %f\n", __func__, k, s-&gt;Tvstartup_margin);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, MinTTUVBlank = %f\n", __func__, k, mode_lib-&gt;mp.MinTTUVBlank[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, Tvstartup_margin = %f\n", __func__, k, s-&gt;Tvstartup_margin);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, MaxVStartupLines = %u\n", __func__, k, s-&gt;MaxVStartupLines[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, MinTTUVBlank = %f\n", __func__, k, mode_lib-&gt;mp.MinTTUVBlank[k]);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 			mode_lib-&gt;mp.Tdmdl[k] = mode_lib-&gt;mp.Tdmdl[k] + s-&gt;Tvstartup_margin;</div><div class='hunk'>@@ -11920,9 +11848,9 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 			s-&gt;blank_lines_remaining = (display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_total - display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_active) - mode_lib-&gt;mp.VStartup[k];</div><div class='ctx'> </div><div class='ctx'> 			if (s-&gt;blank_lines_remaining &lt; 0) {</div><div class='del'>-				dml2_printf("ERROR: Vstartup is larger than vblank!?\n");</div><div class='add'>+				DML_LOG_VERBOSE("ERROR: Vstartup is larger than vblank!?\n");</div><div class='ctx'> 				s-&gt;blank_lines_remaining = 0;</div><div class='del'>-				DML2_ASSERT(0);</div><div class='add'>+				DML_ASSERT(0);</div><div class='ctx'> 			}</div><div class='ctx'> 			mode_lib-&gt;mp.MIN_DST_Y_NEXT_START[k] = s-&gt;dlg_vblank_start + s-&gt;blank_lines_remaining + s-&gt;LSetup;</div><div class='ctx'> </div><div class='hunk'>@@ -11936,18 +11864,18 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 				mode_lib-&gt;mp.VREADY_AT_OR_AFTER_VSYNC[k] = false;</div><div class='ctx'> 			}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VStartup = %u (max)\n", __func__, k, mode_lib-&gt;mp.VStartup[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VStartupMin = %u (max)\n", __func__, k, mode_lib-&gt;mp.VStartupMin[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VUpdateOffsetPix = %u\n", __func__, k, mode_lib-&gt;mp.VUpdateOffsetPix[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VUpdateWidthPix = %u\n", __func__, k, mode_lib-&gt;mp.VUpdateWidthPix[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VReadyOffsetPix = %u\n", __func__, k, mode_lib-&gt;mp.VReadyOffsetPix[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, HTotal = %u\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VTotal = %u\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_total);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VActive = %u\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_active);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VFrontPorch = %u\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_front_porch);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, TSetup = %f\n", __func__, k, mode_lib-&gt;mp.TSetup[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, MIN_DST_Y_NEXT_START = %f\n", __func__, k, mode_lib-&gt;mp.MIN_DST_Y_NEXT_START[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, VREADY_AT_OR_AFTER_VSYNC = %u\n", __func__, k, mode_lib-&gt;mp.VREADY_AT_OR_AFTER_VSYNC[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VStartup = %u (max)\n", __func__, k, mode_lib-&gt;mp.VStartup[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VStartupMin = %u (max)\n", __func__, k, mode_lib-&gt;mp.VStartupMin[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VUpdateOffsetPix = %u\n", __func__, k, mode_lib-&gt;mp.VUpdateOffsetPix[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VUpdateWidthPix = %u\n", __func__, k, mode_lib-&gt;mp.VUpdateWidthPix[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VReadyOffsetPix = %u\n", __func__, k, mode_lib-&gt;mp.VReadyOffsetPix[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, HTotal = %lu\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.h_total);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VTotal = %lu\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_total);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VActive = %lu\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_active);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VFrontPorch = %lu\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.v_front_porch);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, TSetup = %f\n", __func__, k, mode_lib-&gt;mp.TSetup[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, MIN_DST_Y_NEXT_START = %f\n", __func__, k, mode_lib-&gt;mp.MIN_DST_Y_NEXT_START[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, VREADY_AT_OR_AFTER_VSYNC = %u\n", __func__, k, mode_lib-&gt;mp.VREADY_AT_OR_AFTER_VSYNC[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -11969,9 +11897,9 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 		for (k = 0; k &lt; s-&gt;num_active_planes; ++k) {</div><div class='ctx'> 			mode_lib-&gt;mp.TotalDataReadBandwidth = mode_lib-&gt;mp.TotalDataReadBandwidth + mode_lib-&gt;mp.vactive_sw_bw_l[k] + mode_lib-&gt;mp.vactive_sw_bw_c[k];</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML::%s: k=%u, TotalDataReadBandwidth = %f\n", __func__, k, mode_lib-&gt;mp.TotalDataReadBandwidth);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, vactive_sw_bw_l = %f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_l[k]);</div><div class='del'>-			dml2_printf("DML::%s: k=%u, vactive_sw_bw_c = %f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_c[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, TotalDataReadBandwidth = %f\n", __func__, k, mode_lib-&gt;mp.TotalDataReadBandwidth);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, vactive_sw_bw_l = %f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_l[k]);</div><div class='add'>+			DML_LOG_VERBOSE("DML::%s: k=%u, vactive_sw_bw_c = %f\n", __func__, k, mode_lib-&gt;mp.vactive_sw_bw_c[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -12051,28 +11979,28 @@ static bool dml_core_mode_programming(struct dml2_core_calcs_mode_programming_ex</div><div class='ctx'> 	min_return_latency_in_DCFCLK_cycles = (min_return_uclk_cycles / max_uclk_mhz + min_return_fclk_cycles / max_fclk_mhz) * hard_minimum_dcfclk_mhz;</div><div class='ctx'> 	mode_lib-&gt;mp.min_return_latency_in_dcfclk = (unsigned int)min_return_latency_in_DCFCLK_cycles;</div><div class='ctx'> 	mode_lib-&gt;mp.dcfclk_deep_sleep_hysteresis = (unsigned int)math_max2(32, (double)mode_lib-&gt;ip.pixel_chunk_size_kbytes * 1024 * 3 / 4 / 64 - min_return_latency_in_DCFCLK_cycles);</div><div class='del'>-	DML2_ASSERT(mode_lib-&gt;mp.dcfclk_deep_sleep_hysteresis &lt; 256);</div><div class='add'>+	DML_ASSERT(mode_lib-&gt;mp.dcfclk_deep_sleep_hysteresis &lt; 256);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: max_fclk_mhz = %f\n", __func__, max_fclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: max_uclk_mhz = %f\n", __func__, max_uclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: hard_minimum_dcfclk_mhz = %f\n", __func__, hard_minimum_dcfclk_mhz);</div><div class='del'>-	dml2_printf("DML::%s: min_return_uclk_cycles = %d\n", __func__, min_return_uclk_cycles);</div><div class='del'>-	dml2_printf("DML::%s: min_return_fclk_cycles = %d\n", __func__, min_return_fclk_cycles);</div><div class='del'>-	dml2_printf("DML::%s: min_return_latency_in_DCFCLK_cycles = %f\n", __func__, min_return_latency_in_DCFCLK_cycles);</div><div class='del'>-	dml2_printf("DML::%s: dcfclk_deep_sleep_hysteresis = %d \n", __func__, mode_lib-&gt;mp.dcfclk_deep_sleep_hysteresis);</div><div class='del'>-	dml2_printf("DML::%s: --- END --- \n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_fclk_mhz = %f\n", __func__, max_fclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_uclk_mhz = %f\n", __func__, max_uclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: hard_minimum_dcfclk_mhz = %f\n", __func__, hard_minimum_dcfclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_return_uclk_cycles = %ld\n", __func__, min_return_uclk_cycles);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_return_fclk_cycles = %ld\n", __func__, min_return_fclk_cycles);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: min_return_latency_in_DCFCLK_cycles = %f\n", __func__, min_return_latency_in_DCFCLK_cycles);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dcfclk_deep_sleep_hysteresis = %d \n", __func__, mode_lib-&gt;mp.dcfclk_deep_sleep_hysteresis);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: --- END --- \n", __func__);</div><div class='ctx'> #endif</div><div class='ctx'> 	return (in_out_params-&gt;mode_lib-&gt;mp.PrefetchAndImmediateFlipSupported);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dml2_core_calcs_mode_programming_ex(struct dml2_core_calcs_mode_programming_ex *in_out_params)</div><div class='ctx'> {</div><div class='del'>-	dml2_printf("DML::%s: ------------- START ----------\n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ------------- START ----------\n", __func__);</div><div class='ctx'> 	bool result = dml_core_mode_programming(in_out_params);</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML::%s: result = %0d\n", __func__, result);</div><div class='del'>-	dml2_printf("DML::%s: ------------- DONE ----------\n", __func__);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: result = %0d\n", __func__, result);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: ------------- DONE ----------\n", __func__);</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -12130,16 +12058,16 @@ void dml2_core_calcs_get_dpte_row_height(</div><div class='ctx'> 	unsigned int MacroTileHeight		= is_plane1 ? MacroTileHeightC : MacroTileHeightY;</div><div class='ctx'> 	unsigned int PTEBufferSizeInRequests = is_plane1 ? mode_lib-&gt;ip.dpte_buffer_size_in_pte_reqs_chroma : mode_lib-&gt;ip.dpte_buffer_size_in_pte_reqs_luma;</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML: %s: is_plane1 = %u\n", __func__, is_plane1);</div><div class='del'>-	dml2_printf("DML: %s: BytePerPixel = %u\n", __func__, BytePerPixel);</div><div class='del'>-	dml2_printf("DML: %s: BlockHeight256Bytes = %u\n", __func__, BlockHeight256Bytes);</div><div class='del'>-	dml2_printf("DML: %s: BlockWidth256Bytes = %u\n", __func__, BlockWidth256Bytes);</div><div class='del'>-	dml2_printf("DML: %s: MacroTileWidth = %u\n", __func__, MacroTileWidth);</div><div class='del'>-	dml2_printf("DML: %s: MacroTileHeight = %u\n", __func__, MacroTileHeight);</div><div class='del'>-	dml2_printf("DML: %s: PTEBufferSizeInRequests = %u\n", __func__, PTEBufferSizeInRequests);</div><div class='del'>-	dml2_printf("DML: %s: dpte_buffer_size_in_pte_reqs_luma = %u\n", __func__, mode_lib-&gt;ip.dpte_buffer_size_in_pte_reqs_luma);</div><div class='del'>-	dml2_printf("DML: %s: dpte_buffer_size_in_pte_reqs_chroma = %u\n", __func__, mode_lib-&gt;ip.dpte_buffer_size_in_pte_reqs_chroma);</div><div class='del'>-	dml2_printf("DML: %s: GPUVMMinPageSizeKBytes = %u\n", __func__, GPUVMMinPageSizeKBytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: is_plane1 = %u\n", __func__, is_plane1);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: BytePerPixel = %u\n", __func__, BytePerPixel);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: BlockHeight256Bytes = %u\n", __func__, BlockHeight256Bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: BlockWidth256Bytes = %u\n", __func__, BlockWidth256Bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: MacroTileWidth = %u\n", __func__, MacroTileWidth);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: MacroTileHeight = %u\n", __func__, MacroTileHeight);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: PTEBufferSizeInRequests = %u\n", __func__, PTEBufferSizeInRequests);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: dpte_buffer_size_in_pte_reqs_luma = %u\n", __func__, mode_lib-&gt;ip.dpte_buffer_size_in_pte_reqs_luma);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: dpte_buffer_size_in_pte_reqs_chroma = %u\n", __func__, mode_lib-&gt;ip.dpte_buffer_size_in_pte_reqs_chroma);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: GPUVMMinPageSizeKBytes = %u\n", __func__, GPUVMMinPageSizeKBytes);</div><div class='ctx'> #endif</div><div class='ctx'> 	unsigned int dummy_integer[21];</div><div class='ctx'> </div><div class='hunk'>@@ -12193,16 +12121,16 @@ void dml2_core_calcs_get_dpte_row_height(</div><div class='ctx'> 	CalculateVMAndRowBytes(&amp;mode_lib-&gt;scratch.calculate_vm_and_row_bytes_params);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML: %s: dpte_row_height = %u\n", __func__, *dpte_row_height);</div><div class='add'>+	DML_LOG_VERBOSE("DML: %s: dpte_row_height = %u\n", __func__, *dpte_row_height);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool is_dual_plane(enum dml2_source_format_class source_format)</div><div class='ctx'> {</div><div class='del'>-	bool ret_val = 0;</div><div class='add'>+	bool ret_val = false;</div><div class='ctx'> </div><div class='ctx'> 	if ((source_format == dml2_420_12) || (source_format == dml2_420_8) || (source_format == dml2_420_10) || (source_format == dml2_rgbe_alpha))</div><div class='del'>-		ret_val = 1;</div><div class='add'>+		ret_val = true;</div><div class='ctx'> </div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='hunk'>@@ -12220,6 +12148,8 @@ static void rq_dlg_get_wm_regs(const struct dml2_display_cfg *display_cfg, const</div><div class='ctx'> 	wm_regs-&gt;fclk_pstate = (int unsigned)(mode_lib-&gt;mp.Watermark.FCLKChangeWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	wm_regs-&gt;sr_enter = (int unsigned)(mode_lib-&gt;mp.Watermark.StutterEnterPlusExitWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	wm_regs-&gt;sr_exit = (int unsigned)(mode_lib-&gt;mp.Watermark.StutterExitWatermark * refclk_freq_in_mhz);</div><div class='add'>+	wm_regs-&gt;sr_enter_z8 = (int unsigned)(mode_lib-&gt;mp.Watermark.Z8StutterEnterPlusExitWatermark * refclk_freq_in_mhz);</div><div class='add'>+	wm_regs-&gt;sr_exit_z8 = (int unsigned)(mode_lib-&gt;mp.Watermark.Z8StutterExitWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	wm_regs-&gt;temp_read_or_ppt = (int unsigned)(mode_lib-&gt;mp.Watermark.temp_read_or_ppt_watermark_us * refclk_freq_in_mhz);</div><div class='ctx'> 	wm_regs-&gt;uclk_pstate = (int unsigned)(mode_lib-&gt;mp.Watermark.DRAMClockChangeWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	wm_regs-&gt;urgent = (int unsigned)(mode_lib-&gt;mp.Watermark.UrgentWatermark * refclk_freq_in_mhz);</div><div class='hunk'>@@ -12246,11 +12176,11 @@ void dml2_core_calcs_cursor_dlg_reg(struct dml2_cursor_dlg_regs *cursor_dlg_regs</div><div class='ctx'> 	cursor_dlg_regs-&gt;dst_x_offset = (unsigned int) ((dst_x_offset &gt; 0) ? dst_x_offset : 0);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML_DLG::%s: cursor_x_position=%d\n", __func__, p-&gt;cursor_x_position);</div><div class='del'>-	dml2_printf("DML_DLG::%s: dlg_refclk_mhz=%f\n", __func__, p-&gt;dlg_refclk_mhz);</div><div class='del'>-	dml2_printf("DML_DLG::%s: pixel_rate_mhz=%f\n", __func__, p-&gt;pixel_rate_mhz);</div><div class='del'>-	dml2_printf("DML_DLG::%s: dst_x_offset=%d\n", __func__, dst_x_offset);</div><div class='del'>-	dml2_printf("DML_DLG::%s: dst_x_offset=%d (reg)\n", __func__, cursor_dlg_regs-&gt;dst_x_offset);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: cursor_x_position=%d\n", __func__, p-&gt;cursor_x_position);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: dlg_refclk_mhz=%f\n", __func__, p-&gt;dlg_refclk_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: pixel_rate_mhz=%f\n", __func__, p-&gt;pixel_rate_mhz);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: dst_x_offset=%d\n", __func__, dst_x_offset);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: dst_x_offset=%d (reg)\n", __func__, cursor_dlg_regs-&gt;dst_x_offset);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	cursor_dlg_regs-&gt;chunk_hdl_adjust = 3;</div><div class='hunk'>@@ -12286,7 +12216,7 @@ static void rq_dlg_get_rq_reg(struct dml2_display_rq_regs *rq_regs,</div><div class='ctx'> 	double stored_swath_c_bytes;</div><div class='ctx'> 	bool is_phantom_pipe;</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML_DLG::%s: Calculation for pipe[%d] start\n", __func__, pipe_idx);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: Calculation for pipe[%d] start\n", __func__, pipe_idx);</div><div class='ctx'> </div><div class='ctx'> 	pixel_chunk_bytes = (unsigned int)(mode_lib-&gt;ip.pixel_chunk_size_kbytes * 1024);</div><div class='ctx'> 	min_pixel_chunk_bytes = (unsigned int)(mode_lib-&gt;ip.min_pixel_chunk_size_bytes);</div><div class='hunk'>@@ -12329,19 +12259,19 @@ static void rq_dlg_get_rq_reg(struct dml2_display_rq_regs *rq_regs,</div><div class='ctx'> 	if (sw_mode == dml2_sw_linear &amp;&amp; display_cfg-&gt;gpuvm_enable) {</div><div class='ctx'> 		unsigned int p0_pte_row_height_linear = (unsigned int)(dml_get_dpte_row_height_linear_l(mode_lib, pipe_idx));</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML_DLG: %s: p0_pte_row_height_linear = %u\n", __func__, p0_pte_row_height_linear);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: p0_pte_row_height_linear = %u\n", __func__, p0_pte_row_height_linear);</div><div class='ctx'> #endif</div><div class='del'>-		DML2_ASSERT(p0_pte_row_height_linear &gt;= 8);</div><div class='add'>+		DML_ASSERT(p0_pte_row_height_linear &gt;= 8);</div><div class='ctx'> </div><div class='ctx'> 		rq_regs-&gt;rq_regs_l.pte_row_height_linear = math_log2_approx(p0_pte_row_height_linear) - 3;</div><div class='ctx'> 		if (dual_plane) {</div><div class='ctx'> 			unsigned int p1_pte_row_height_linear = (unsigned int)(dml_get_dpte_row_height_linear_c(mode_lib, pipe_idx));</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-			dml2_printf("DML_DLG: %s: p1_pte_row_height_linear = %u\n", __func__, p1_pte_row_height_linear);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: p1_pte_row_height_linear = %u\n", __func__, p1_pte_row_height_linear);</div><div class='ctx'> #endif</div><div class='ctx'> 			if (sw_mode == dml2_sw_linear) {</div><div class='del'>-				DML2_ASSERT(p1_pte_row_height_linear &gt;= 8);</div><div class='add'>+				DML_ASSERT(p1_pte_row_height_linear &gt;= 8);</div><div class='ctx'> 			}</div><div class='ctx'> 			rq_regs-&gt;rq_regs_c.pte_row_height_linear = math_log2_approx(p1_pte_row_height_linear) - 3;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -12375,12 +12305,12 @@ static void rq_dlg_get_rq_reg(struct dml2_display_rq_regs *rq_regs,</div><div class='ctx'> 			if (stored_swath_l_bytes / stored_swath_c_bytes &lt;= 1.5) {</div><div class='ctx'> 				detile_buf_plane1_addr = (unsigned int)(detile_buf_size_in_bytes / 2.0 / 1024.0); // half to chroma</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML_DLG: %s: detile_buf_plane1_addr = %d (1/2 to chroma)\n", __func__, detile_buf_plane1_addr);</div><div class='add'>+				DML_LOG_VERBOSE("DML_DLG: %s: detile_buf_plane1_addr = %d (1/2 to chroma)\n", __func__, detile_buf_plane1_addr);</div><div class='ctx'> #endif</div><div class='ctx'> 			} else {</div><div class='ctx'> 				detile_buf_plane1_addr = (unsigned int)(dml_round_to_multiple((unsigned int)((2.0 * detile_buf_size_in_bytes) / 3.0), 1024, 0) / 1024.0); // 2/3 to luma</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-				dml2_printf("DML_DLG: %s: detile_buf_plane1_addr = %d (1/3 chroma)\n", __func__, detile_buf_plane1_addr);</div><div class='add'>+				DML_LOG_VERBOSE("DML_DLG: %s: detile_buf_plane1_addr = %d (1/3 chroma)\n", __func__, detile_buf_plane1_addr);</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -12388,15 +12318,15 @@ static void rq_dlg_get_rq_reg(struct dml2_display_rq_regs *rq_regs,</div><div class='ctx'> 	rq_regs-&gt;plane1_base_address = detile_buf_plane1_addr;</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML_DLG: %s: is_phantom_pipe = %d\n", __func__, is_phantom_pipe);</div><div class='del'>-	dml2_printf("DML_DLG: %s: stored_swath_l_bytes = %f\n", __func__, stored_swath_l_bytes);</div><div class='del'>-	dml2_printf("DML_DLG: %s: stored_swath_c_bytes = %f\n", __func__, stored_swath_c_bytes);</div><div class='del'>-	dml2_printf("DML_DLG: %s: detile_buf_size_in_bytes = %d\n", __func__, detile_buf_size_in_bytes);</div><div class='del'>-	dml2_printf("DML_DLG: %s: detile_buf_plane1_addr = %d\n", __func__, detile_buf_plane1_addr);</div><div class='del'>-	dml2_printf("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs-&gt;plane1_base_address);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG: %s: is_phantom_pipe = %d\n", __func__, is_phantom_pipe);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG: %s: stored_swath_l_bytes = %f\n", __func__, stored_swath_l_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG: %s: stored_swath_c_bytes = %f\n", __func__, stored_swath_c_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG: %s: detile_buf_size_in_bytes = %d\n", __func__, detile_buf_size_in_bytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG: %s: detile_buf_plane1_addr = %d\n", __func__, detile_buf_plane1_addr);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG: %s: plane1_base_address = %d\n", __func__, rq_regs-&gt;plane1_base_address);</div><div class='ctx'> #endif</div><div class='del'>-	//dml2_printf_rq_regs_st(rq_regs);</div><div class='del'>-	dml2_printf("DML_DLG::%s: Calculation for pipe[%d] done\n", __func__, pipe_idx);</div><div class='add'>+	//DML_LOG_VERBOSE_rq_regs_st(rq_regs);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: Calculation for pipe[%d] done\n", __func__, pipe_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rq_dlg_get_dlg_reg(</div><div class='hunk'>@@ -12411,10 +12341,10 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> </div><div class='ctx'> 	memset(l, 0, sizeof(struct dml2_core_shared_rq_dlg_get_dlg_reg_locals));</div><div class='ctx'> </div><div class='del'>-	dml2_printf("DML_DLG::%s: Calculation for pipe_idx=%d\n", __func__, pipe_idx);</div><div class='add'>+	DML_LOG_VERBOSE("DML_DLG::%s: Calculation for pipe_idx=%d\n", __func__, pipe_idx);</div><div class='ctx'> </div><div class='ctx'> 	l-&gt;plane_idx = dml_get_plane_idx(mode_lib, pipe_idx);</div><div class='del'>-	DML2_ASSERT(l-&gt;plane_idx &lt; DML2_MAX_PLANES);</div><div class='add'>+	DML_ASSERT(l-&gt;plane_idx &lt; DML2_MAX_PLANES);</div><div class='ctx'> </div><div class='ctx'> 	l-&gt;source_format = dml2_444_8;</div><div class='ctx'> 	l-&gt;odm_mode = dml2_odm_mode_bypass;</div><div class='hunk'>@@ -12444,18 +12374,18 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 		l-&gt;pclk_freq_in_mhz = (double)l-&gt;timing-&gt;pixel_clock_khz / 1000;</div><div class='ctx'> 		l-&gt;ref_freq_to_pix_freq = l-&gt;refclk_freq_in_mhz / l-&gt;pclk_freq_in_mhz;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG::%s: plane_idx = %d\n", __func__, l-&gt;plane_idx);</div><div class='del'>-		dml2_printf("DML_DLG: %s: htotal = %d\n", __func__, l-&gt;htotal);</div><div class='del'>-		dml2_printf("DML_DLG: %s: refclk_freq_in_mhz = %3.2f\n", __func__, l-&gt;refclk_freq_in_mhz);</div><div class='del'>-		dml2_printf("DML_DLG: %s: dlg_ref_clk_mhz = %3.2f\n", __func__, display_cfg-&gt;overrides.hw.dlg_ref_clk_mhz);</div><div class='del'>-		dml2_printf("DML_DLG: %s: soc.refclk_mhz = %3.2f\n", __func__, mode_lib-&gt;soc.dchub_refclk_mhz);</div><div class='del'>-		dml2_printf("DML_DLG: %s: pclk_freq_in_mhz = %3.2f\n", __func__, l-&gt;pclk_freq_in_mhz);</div><div class='del'>-		dml2_printf("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", __func__, l-&gt;ref_freq_to_pix_freq);</div><div class='del'>-		dml2_printf("DML_DLG: %s: interlaced = %d\n", __func__, l-&gt;interlaced);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG::%s: plane_idx = %d\n", __func__, l-&gt;plane_idx);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: htotal = %d\n", __func__, l-&gt;htotal);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: refclk_freq_in_mhz = %3.2f\n", __func__, l-&gt;refclk_freq_in_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dlg_ref_clk_mhz = %3.2f\n", __func__, display_cfg-&gt;overrides.hw.dlg_ref_clk_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: soc.refclk_mhz = %d\n", __func__, mode_lib-&gt;soc.dchub_refclk_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: pclk_freq_in_mhz = %3.2f\n", __func__, l-&gt;pclk_freq_in_mhz);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", __func__, l-&gt;ref_freq_to_pix_freq);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: interlaced = %d\n", __func__, l-&gt;interlaced);</div><div class='ctx'> </div><div class='del'>-		DML2_ASSERT(l-&gt;refclk_freq_in_mhz != 0);</div><div class='del'>-		DML2_ASSERT(l-&gt;pclk_freq_in_mhz != 0);</div><div class='del'>-		DML2_ASSERT(l-&gt;ref_freq_to_pix_freq &lt; 4.0);</div><div class='add'>+		DML_ASSERT(l-&gt;refclk_freq_in_mhz != 0);</div><div class='add'>+		DML_ASSERT(l-&gt;pclk_freq_in_mhz != 0);</div><div class='add'>+		DML_ASSERT(l-&gt;ref_freq_to_pix_freq &lt; 4.0);</div><div class='ctx'> </div><div class='ctx'> 		// Need to figure out which side of odm combine we're in</div><div class='ctx'> 		// Assume the pipe instance under the same plane is in order</div><div class='hunk'>@@ -12484,14 +12414,14 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 			l-&gt;pipe_idx_in_combine = pipe_idx - l-&gt;first_pipe_idx_in_plane; // DML assumes the pipes in the same plane will have continuous indexing (i.e. plane 0 use pipe 0, 1, and plane 1 uses pipe 2, 3, etc.)</div><div class='ctx'> </div><div class='ctx'> 			disp_dlg_regs-&gt;refcyc_h_blank_end = (unsigned int)(((double)l-&gt;hblank_end + (double)l-&gt;pipe_idx_in_combine * (double)l-&gt;hactive / (double)l-&gt;odm_combine_factor) * l-&gt;ref_freq_to_pix_freq);</div><div class='del'>-			dml2_printf("DML_DLG: %s: pipe_idx = %d\n", __func__, pipe_idx);</div><div class='del'>-			dml2_printf("DML_DLG: %s: first_pipe_idx_in_plane = %d\n", __func__, l-&gt;first_pipe_idx_in_plane);</div><div class='del'>-			dml2_printf("DML_DLG: %s: pipe_idx_in_combine = %d\n", __func__, l-&gt;pipe_idx_in_combine);</div><div class='del'>-			dml2_printf("DML_DLG: %s: odm_combine_factor = %d\n", __func__, l-&gt;odm_combine_factor);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: pipe_idx = %d\n", __func__, pipe_idx);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: first_pipe_idx_in_plane = %d\n", __func__, l-&gt;first_pipe_idx_in_plane);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: pipe_idx_in_combine = %d\n", __func__, l-&gt;pipe_idx_in_combine);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: odm_combine_factor = %d\n", __func__, l-&gt;odm_combine_factor);</div><div class='ctx'> 		}</div><div class='del'>-		dml2_printf("DML_DLG: %s: refcyc_h_blank_end = %d\n", __func__, disp_dlg_regs-&gt;refcyc_h_blank_end);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: refcyc_h_blank_end = %d\n", __func__, disp_dlg_regs-&gt;refcyc_h_blank_end);</div><div class='ctx'> </div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;refcyc_h_blank_end &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;refcyc_h_blank_end &lt; (unsigned int)math_pow(2, 13));</div><div class='ctx'> </div><div class='ctx'> 		disp_dlg_regs-&gt;ref_freq_to_pix_freq = (unsigned int)(l-&gt;ref_freq_to_pix_freq * math_pow(2, 19));</div><div class='ctx'> 		disp_dlg_regs-&gt;refcyc_per_htotal = (unsigned int)(l-&gt;ref_freq_to_pix_freq * (double)l-&gt;htotal * math_pow(2, 8));</div><div class='hunk'>@@ -12500,20 +12430,20 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 		l-&gt;min_ttu_vblank = mode_lib-&gt;mp.MinTTUVBlank[mode_lib-&gt;mp.pipe_plane[pipe_idx]];</div><div class='ctx'> 		l-&gt;min_dst_y_next_start = (unsigned int)(mode_lib-&gt;mp.MIN_DST_Y_NEXT_START[mode_lib-&gt;mp.pipe_plane[pipe_idx]]);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: min_ttu_vblank (us) = %3.2f\n", __func__, l-&gt;min_ttu_vblank);</div><div class='del'>-		dml2_printf("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, l-&gt;min_dst_y_next_start);</div><div class='del'>-		dml2_printf("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", __func__, l-&gt;ref_freq_to_pix_freq);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: min_ttu_vblank (us) = %3.2f\n", __func__, l-&gt;min_ttu_vblank);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, l-&gt;min_dst_y_next_start);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: ref_freq_to_pix_freq = %3.2f\n", __func__, l-&gt;ref_freq_to_pix_freq);</div><div class='ctx'> </div><div class='ctx'> 		l-&gt;vready_after_vcount0 = (unsigned int)(mode_lib-&gt;mp.VREADY_AT_OR_AFTER_VSYNC[mode_lib-&gt;mp.pipe_plane[pipe_idx]]);</div><div class='ctx'> 		disp_dlg_regs-&gt;vready_after_vcount0 = l-&gt;vready_after_vcount0;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, disp_dlg_regs-&gt;vready_after_vcount0);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: vready_after_vcount0 = %d\n", __func__, disp_dlg_regs-&gt;vready_after_vcount0);</div><div class='ctx'> </div><div class='ctx'> 		l-&gt;dst_x_after_scaler = (unsigned int)(mode_lib-&gt;mp.DSTXAfterScaler[mode_lib-&gt;mp.pipe_plane[pipe_idx]]);</div><div class='ctx'> 		l-&gt;dst_y_after_scaler = (unsigned int)(mode_lib-&gt;mp.DSTYAfterScaler[mode_lib-&gt;mp.pipe_plane[pipe_idx]]);</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: dst_x_after_scaler = %d\n", __func__, l-&gt;dst_x_after_scaler);</div><div class='del'>-		dml2_printf("DML_DLG: %s: dst_y_after_scaler = %d\n", __func__, l-&gt;dst_y_after_scaler);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dst_x_after_scaler = %d\n", __func__, l-&gt;dst_x_after_scaler);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dst_y_after_scaler = %d\n", __func__, l-&gt;dst_y_after_scaler);</div><div class='ctx'> </div><div class='ctx'> 		l-&gt;dst_y_prefetch = mode_lib-&gt;mp.dst_y_prefetch[mode_lib-&gt;mp.pipe_plane[pipe_idx]];</div><div class='ctx'> 		l-&gt;dst_y_per_vm_vblank = mode_lib-&gt;mp.dst_y_per_vm_vblank[mode_lib-&gt;mp.pipe_plane[pipe_idx]];</div><div class='hunk'>@@ -12521,28 +12451,28 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 		l-&gt;dst_y_per_vm_flip = mode_lib-&gt;mp.dst_y_per_vm_flip[mode_lib-&gt;mp.pipe_plane[pipe_idx]];</div><div class='ctx'> 		l-&gt;dst_y_per_row_flip = mode_lib-&gt;mp.dst_y_per_row_flip[mode_lib-&gt;mp.pipe_plane[pipe_idx]];</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: dst_y_prefetch (after rnd) = %3.2f\n", __func__, l-&gt;dst_y_prefetch);</div><div class='del'>-		dml2_printf("DML_DLG: %s: dst_y_per_vm_flip = %3.2f\n", __func__, l-&gt;dst_y_per_vm_flip);</div><div class='del'>-		dml2_printf("DML_DLG: %s: dst_y_per_row_flip = %3.2f\n", __func__, l-&gt;dst_y_per_row_flip);</div><div class='del'>-		dml2_printf("DML_DLG: %s: dst_y_per_vm_vblank = %3.2f\n", __func__, l-&gt;dst_y_per_vm_vblank);</div><div class='del'>-		dml2_printf("DML_DLG: %s: dst_y_per_row_vblank = %3.2f\n", __func__, l-&gt;dst_y_per_row_vblank);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dst_y_prefetch (after rnd) = %3.2f\n", __func__, l-&gt;dst_y_prefetch);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dst_y_per_vm_flip = %3.2f\n", __func__, l-&gt;dst_y_per_vm_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dst_y_per_row_flip = %3.2f\n", __func__, l-&gt;dst_y_per_row_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dst_y_per_vm_vblank = %3.2f\n", __func__, l-&gt;dst_y_per_vm_vblank);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: dst_y_per_row_vblank = %3.2f\n", __func__, l-&gt;dst_y_per_row_vblank);</div><div class='ctx'> </div><div class='ctx'> 		if (l-&gt;dst_y_prefetch &gt; 0 &amp;&amp; l-&gt;dst_y_per_vm_vblank &gt; 0 &amp;&amp; l-&gt;dst_y_per_row_vblank &gt; 0) {</div><div class='del'>-			DML2_ASSERT(l-&gt;dst_y_prefetch &gt; (l-&gt;dst_y_per_vm_vblank + l-&gt;dst_y_per_row_vblank));</div><div class='add'>+			DML_ASSERT(l-&gt;dst_y_prefetch &gt; (l-&gt;dst_y_per_vm_vblank + l-&gt;dst_y_per_row_vblank));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		l-&gt;vratio_pre_l = mode_lib-&gt;mp.VRatioPrefetchY[mode_lib-&gt;mp.pipe_plane[pipe_idx]];</div><div class='ctx'> 		l-&gt;vratio_pre_c = mode_lib-&gt;mp.VRatioPrefetchC[mode_lib-&gt;mp.pipe_plane[pipe_idx]];</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: vratio_pre_l = %3.2f\n", __func__, l-&gt;vratio_pre_l);</div><div class='del'>-		dml2_printf("DML_DLG: %s: vratio_pre_c = %3.2f\n", __func__, l-&gt;vratio_pre_c);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: vratio_pre_l = %3.2f\n", __func__, l-&gt;vratio_pre_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: vratio_pre_c = %3.2f\n", __func__, l-&gt;vratio_pre_c);</div><div class='ctx'> </div><div class='ctx'> 		// Active</div><div class='ctx'> 		l-&gt;refcyc_per_line_delivery_pre_l = mode_lib-&gt;mp.DisplayPipeLineDeliveryTimeLumaPrefetch[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> 		l-&gt;refcyc_per_line_delivery_l = mode_lib-&gt;mp.DisplayPipeLineDeliveryTimeLuma[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: refcyc_per_line_delivery_pre_l = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_pre_l);</div><div class='del'>-		dml2_printf("DML_DLG: %s: refcyc_per_line_delivery_l = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_line_delivery_pre_l = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_pre_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_line_delivery_l = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_l);</div><div class='ctx'> </div><div class='ctx'> 		l-&gt;refcyc_per_line_delivery_pre_c = 0.0;</div><div class='ctx'> 		l-&gt;refcyc_per_line_delivery_c = 0.0;</div><div class='hunk'>@@ -12551,8 +12481,8 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 			l-&gt;refcyc_per_line_delivery_pre_c = mode_lib-&gt;mp.DisplayPipeLineDeliveryTimeChromaPrefetch[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> 			l-&gt;refcyc_per_line_delivery_c = mode_lib-&gt;mp.DisplayPipeLineDeliveryTimeChroma[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> </div><div class='del'>-			dml2_printf("DML_DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_pre_c);</div><div class='del'>-			dml2_printf("DML_DLG: %s: refcyc_per_line_delivery_c = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_line_delivery_pre_c = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_pre_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_line_delivery_c = %3.2f\n", __func__, l-&gt;refcyc_per_line_delivery_c);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		disp_dlg_regs-&gt;refcyc_per_vm_dmdata = (unsigned int)(mode_lib-&gt;mp.Tdmdl_vm[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz);</div><div class='hunk'>@@ -12561,8 +12491,8 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 		l-&gt;refcyc_per_req_delivery_pre_l = mode_lib-&gt;mp.DisplayPipeRequestDeliveryTimeLumaPrefetch[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> 		l-&gt;refcyc_per_req_delivery_l = mode_lib-&gt;mp.DisplayPipeRequestDeliveryTimeLuma[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_pre_l);</div><div class='del'>-		dml2_printf("DML_DLG: %s: refcyc_per_req_delivery_l = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_req_delivery_pre_l = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_pre_l);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_req_delivery_l = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_l);</div><div class='ctx'> </div><div class='ctx'> 		l-&gt;refcyc_per_req_delivery_pre_c = 0.0;</div><div class='ctx'> 		l-&gt;refcyc_per_req_delivery_c = 0.0;</div><div class='hunk'>@@ -12570,16 +12500,16 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 			l-&gt;refcyc_per_req_delivery_pre_c = mode_lib-&gt;mp.DisplayPipeRequestDeliveryTimeChromaPrefetch[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> 			l-&gt;refcyc_per_req_delivery_c = mode_lib-&gt;mp.DisplayPipeRequestDeliveryTimeChroma[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz;</div><div class='ctx'> </div><div class='del'>-			dml2_printf("DML_DLG: %s: refcyc_per_req_delivery_pre_c = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_pre_c);</div><div class='del'>-			dml2_printf("DML_DLG: %s: refcyc_per_req_delivery_c = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_req_delivery_pre_c = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_pre_c);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: refcyc_per_req_delivery_c = %3.2f\n", __func__, l-&gt;refcyc_per_req_delivery_c);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		// TTU - Cursor</div><div class='del'>-		DML2_ASSERT(display_cfg-&gt;plane_descriptors[l-&gt;plane_idx].cursor.num_cursors &lt;= 1);</div><div class='add'>+		DML_ASSERT(display_cfg-&gt;plane_descriptors[l-&gt;plane_idx].cursor.num_cursors &lt;= 1);</div><div class='ctx'> </div><div class='ctx'> 		// Assign to register structures</div><div class='ctx'> 		disp_dlg_regs-&gt;min_dst_y_next_start = (unsigned int)((double)l-&gt;min_dst_y_next_start * math_pow(2, 2));</div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;min_dst_y_next_start &lt; (unsigned int)math_pow(2, 18));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;min_dst_y_next_start &lt; (unsigned int)math_pow(2, 18));</div><div class='ctx'> </div><div class='ctx'> 		disp_dlg_regs-&gt;dst_y_after_scaler = l-&gt;dst_y_after_scaler; // in terms of line</div><div class='ctx'> 		disp_dlg_regs-&gt;refcyc_x_after_scaler = (unsigned int)((double)l-&gt;dst_x_after_scaler * l-&gt;ref_freq_to_pix_freq); // in terms of refclk</div><div class='hunk'>@@ -12592,10 +12522,10 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 		disp_dlg_regs-&gt;vratio_prefetch = (unsigned int)(l-&gt;vratio_pre_l * math_pow(2, 19));</div><div class='ctx'> 		disp_dlg_regs-&gt;vratio_prefetch_c = (unsigned int)(l-&gt;vratio_pre_c * math_pow(2, 19));</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_vm_vblank = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_vm_vblank);</div><div class='del'>-		dml2_printf("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_row_vblank);</div><div class='del'>-		dml2_printf("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_vm_flip = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_vm_flip);</div><div class='del'>-		dml2_printf("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_row_flip = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_row_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_vm_vblank = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_vm_vblank);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_row_vblank = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_row_vblank);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_vm_flip = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_vm_flip);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG: %s: disp_dlg_regs-&gt;dst_y_per_row_flip = 0x%x\n", __func__, disp_dlg_regs-&gt;dst_y_per_row_flip);</div><div class='ctx'> </div><div class='ctx'> 		disp_dlg_regs-&gt;refcyc_per_vm_group_vblank = (unsigned int)(mode_lib-&gt;mp.TimePerVMGroupVBlank[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz);</div><div class='ctx'> 		disp_dlg_regs-&gt;refcyc_per_vm_group_flip = (unsigned int)(mode_lib-&gt;mp.TimePerVMGroupFlip[mode_lib-&gt;mp.pipe_plane[pipe_idx]] * l-&gt;refclk_freq_in_mhz);</div><div class='hunk'>@@ -12662,11 +12592,11 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 		disp_ttu_regs-&gt;qos_ramp_disable_c = 0;</div><div class='ctx'> 		disp_ttu_regs-&gt;min_ttu_vblank = (unsigned int)(l-&gt;min_ttu_vblank * l-&gt;refclk_freq_in_mhz);</div><div class='ctx'> </div><div class='del'>-		// CHECK for HW registers' range, DML2_ASSERT or clamp</div><div class='del'>-		DML2_ASSERT(l-&gt;refcyc_per_req_delivery_pre_l &lt; math_pow(2, 13));</div><div class='del'>-		DML2_ASSERT(l-&gt;refcyc_per_req_delivery_l &lt; math_pow(2, 13));</div><div class='del'>-		DML2_ASSERT(l-&gt;refcyc_per_req_delivery_pre_c &lt; math_pow(2, 13));</div><div class='del'>-		DML2_ASSERT(l-&gt;refcyc_per_req_delivery_c &lt; math_pow(2, 13));</div><div class='add'>+		// CHECK for HW registers' range, DML_ASSERT or clamp</div><div class='add'>+		DML_ASSERT(l-&gt;refcyc_per_req_delivery_pre_l &lt; math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(l-&gt;refcyc_per_req_delivery_l &lt; math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(l-&gt;refcyc_per_req_delivery_pre_c &lt; math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(l-&gt;refcyc_per_req_delivery_c &lt; math_pow(2, 13));</div><div class='ctx'> 		if (disp_dlg_regs-&gt;refcyc_per_vm_group_vblank &gt;= (unsigned int)math_pow(2, 23))</div><div class='ctx'> 			disp_dlg_regs-&gt;refcyc_per_vm_group_vblank = (unsigned int)(math_pow(2, 23) - 1);</div><div class='ctx'> </div><div class='hunk'>@@ -12680,16 +12610,16 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 			disp_dlg_regs-&gt;refcyc_per_vm_req_flip = (unsigned int)(math_pow(2, 23) - 1);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;dst_y_after_scaler &lt; (unsigned int)8);</div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;refcyc_x_after_scaler &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;dst_y_after_scaler &lt; (unsigned int)8);</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;refcyc_x_after_scaler &lt; (unsigned int)math_pow(2, 13));</div><div class='ctx'> </div><div class='ctx'> 		if (disp_dlg_regs-&gt;dst_y_per_pte_row_nom_l &gt;= (unsigned int)math_pow(2, 17)) {</div><div class='del'>-			dml2_printf("DML_DLG: %s: Warning DST_Y_PER_PTE_ROW_NOM_L %u &gt; register max U15.2 %u, clamp to max\n", __func__, disp_dlg_regs-&gt;dst_y_per_pte_row_nom_l, (unsigned int)math_pow(2, 17) - 1);</div><div class='add'>+			DML_LOG_VERBOSE("DML_DLG: %s: Warning DST_Y_PER_PTE_ROW_NOM_L %u &gt; register max U15.2 %u, clamp to max\n", __func__, disp_dlg_regs-&gt;dst_y_per_pte_row_nom_l, (unsigned int)math_pow(2, 17) - 1);</div><div class='ctx'> 			l-&gt;dst_y_per_pte_row_nom_l = (unsigned int)math_pow(2, 17) - 1;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (l-&gt;dual_plane) {</div><div class='ctx'> 			if (disp_dlg_regs-&gt;dst_y_per_pte_row_nom_c &gt;= (unsigned int)math_pow(2, 17)) {</div><div class='del'>-				dml2_printf("DML_DLG: %s: Warning DST_Y_PER_PTE_ROW_NOM_C %u &gt; register max U15.2 %u, clamp to max\n", __func__, disp_dlg_regs-&gt;dst_y_per_pte_row_nom_c, (unsigned int)math_pow(2, 17) - 1);</div><div class='add'>+				DML_LOG_VERBOSE("DML_DLG: %s: Warning DST_Y_PER_PTE_ROW_NOM_C %u &gt; register max U15.2 %u, clamp to max\n", __func__, disp_dlg_regs-&gt;dst_y_per_pte_row_nom_c, (unsigned int)math_pow(2, 17) - 1);</div><div class='ctx'> 				l-&gt;dst_y_per_pte_row_nom_c = (unsigned int)math_pow(2, 17) - 1;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -12700,20 +12630,20 @@ static void rq_dlg_get_dlg_reg(</div><div class='ctx'> 			if (disp_dlg_regs-&gt;refcyc_per_pte_group_nom_c &gt;= (unsigned int)math_pow(2, 23))</div><div class='ctx'> 				disp_dlg_regs-&gt;refcyc_per_pte_group_nom_c = (unsigned int)(math_pow(2, 23) - 1);</div><div class='ctx'> 		}</div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;refcyc_per_pte_group_vblank_l &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;refcyc_per_pte_group_vblank_l &lt; (unsigned int)math_pow(2, 13));</div><div class='ctx'> 		if (l-&gt;dual_plane) {</div><div class='del'>-			DML2_ASSERT(disp_dlg_regs-&gt;refcyc_per_pte_group_vblank_c &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+			DML_ASSERT(disp_dlg_regs-&gt;refcyc_per_pte_group_vblank_c &lt; (unsigned int)math_pow(2, 13));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_pre_l &lt; (unsigned int)math_pow(2, 13));</div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_l &lt; (unsigned int)math_pow(2, 13));</div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_pre_c &lt; (unsigned int)math_pow(2, 13));</div><div class='del'>-		DML2_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_c &lt; (unsigned int)math_pow(2, 13));</div><div class='del'>-		DML2_ASSERT(disp_ttu_regs-&gt;qos_level_low_wm &lt; (unsigned int)math_pow(2, 14));</div><div class='del'>-		DML2_ASSERT(disp_ttu_regs-&gt;qos_level_high_wm &lt; (unsigned int)math_pow(2, 14));</div><div class='del'>-		DML2_ASSERT(disp_ttu_regs-&gt;min_ttu_vblank &lt; (unsigned int)math_pow(2, 24));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_pre_l &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_l &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_pre_c &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(disp_dlg_regs-&gt;refcyc_per_line_delivery_c &lt; (unsigned int)math_pow(2, 13));</div><div class='add'>+		DML_ASSERT(disp_ttu_regs-&gt;qos_level_low_wm &lt; (unsigned int)math_pow(2, 14));</div><div class='add'>+		DML_ASSERT(disp_ttu_regs-&gt;qos_level_high_wm &lt; (unsigned int)math_pow(2, 14));</div><div class='add'>+		DML_ASSERT(disp_ttu_regs-&gt;min_ttu_vblank &lt; (unsigned int)math_pow(2, 24));</div><div class='ctx'> </div><div class='del'>-		dml2_printf("DML_DLG::%s: Calculation for pipe[%d] done\n", __func__, pipe_idx);</div><div class='add'>+		DML_LOG_VERBOSE("DML_DLG::%s: Calculation for pipe[%d] done\n", __func__, pipe_idx);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -12736,11 +12666,11 @@ static void rq_dlg_get_arb_params(const struct dml2_display_cfg *display_cfg, co</div><div class='ctx'> 	arb_param-&gt;pstate_stall_threshold = (unsigned int)(mode_lib-&gt;ip_caps.fams2.max_allow_delay_us * refclk_freq_in_mhz);</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: max_req_outstanding = %d\n", __func__, arb_param-&gt;max_req_outstanding);</div><div class='del'>-	dml2_printf("DML::%s: sdpif_request_rate_limit = %d\n", __func__, arb_param-&gt;sdpif_request_rate_limit);</div><div class='del'>-	dml2_printf("DML::%s: compbuf_reserved_space_kbytes = %d\n", __func__, arb_param-&gt;compbuf_reserved_space_kbytes);</div><div class='del'>-	dml2_printf("DML::%s: allow_sdpif_rate_limit_when_cstate_req = %d\n", __func__, arb_param-&gt;allow_sdpif_rate_limit_when_cstate_req);</div><div class='del'>-	dml2_printf("DML::%s: dcfclk_deep_sleep_hysteresis = %d\n", __func__, arb_param-&gt;dcfclk_deep_sleep_hysteresis);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: max_req_outstanding = %d\n", __func__, arb_param-&gt;max_req_outstanding);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: sdpif_request_rate_limit = %d\n", __func__, arb_param-&gt;sdpif_request_rate_limit);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: compbuf_reserved_space_kbytes = %d\n", __func__, arb_param-&gt;compbuf_reserved_space_kbytes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: allow_sdpif_rate_limit_when_cstate_req = %d\n", __func__, arb_param-&gt;allow_sdpif_rate_limit_when_cstate_req);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: dcfclk_deep_sleep_hysteresis = %d\n", __func__, arb_param-&gt;dcfclk_deep_sleep_hysteresis);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -13013,10 +12943,10 @@ void dml2_core_calcs_get_stream_support_info(const struct dml2_display_cfg *disp</div><div class='ctx'> </div><div class='ctx'> 	out-&gt;vblank_reserved_time_us = display_cfg-&gt;plane_descriptors[plane_index].overrides.reserved_vblank_time_ns / 1000;</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	dml2_printf("DML::%s: subvp_fw_processing_delay_us = %d\n", __func__, mode_lib-&gt;ip.subvp_fw_processing_delay_us);</div><div class='del'>-	dml2_printf("DML::%s: subvp_pstate_allow_width_us = %d\n", __func__, mode_lib-&gt;ip.subvp_pstate_allow_width_us);</div><div class='del'>-	dml2_printf("DML::%s: subvp_swath_height_margin_lines = %d\n", __func__, mode_lib-&gt;ip.subvp_swath_height_margin_lines);</div><div class='del'>-	dml2_printf("DML::%s: vblank_reserved_time_us = %f\n", __func__, out-&gt;vblank_reserved_time_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: subvp_fw_processing_delay_us = %d\n", __func__, mode_lib-&gt;ip.subvp_fw_processing_delay_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: subvp_pstate_allow_width_us = %d\n", __func__, mode_lib-&gt;ip.subvp_pstate_allow_width_us);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: subvp_swath_height_margin_lines = %d\n", __func__, mode_lib-&gt;ip.subvp_swath_height_margin_lines);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: vblank_reserved_time_us = %u\n", __func__, out-&gt;vblank_reserved_time_us);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h<br/>index 4e502f0a6d20..bdee6ad7bc59 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared_types.h</a></div><div class='hunk'>@@ -1078,6 +1078,8 @@ struct dml2_core_calcs_mode_programming_locals {</div><div class='ctx'> 	enum dml2_source_format_class pixel_format[DML2_MAX_PLANES];</div><div class='ctx'> 	unsigned int lb_source_lines_l[DML2_MAX_PLANES];</div><div class='ctx'> 	unsigned int lb_source_lines_c[DML2_MAX_PLANES];</div><div class='add'>+	unsigned int num_dsc_slices[DML2_MAX_PLANES];</div><div class='add'>+	bool dsc_enable[DML2_MAX_PLANES];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_locals {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c<br/>index 2504d9c2ec34..7a220c0141c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_utils.c</a></div><div class='hunk'>@@ -82,7 +82,7 @@ bool dml2_core_utils_is_420(enum dml2_source_format_class source_format)</div><div class='ctx'> 		val = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return val;</div><div class='hunk'>@@ -145,7 +145,7 @@ bool dml2_core_utils_is_422_planar(enum dml2_source_format_class source_format)</div><div class='ctx'> 		val = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return val;</div><div class='hunk'>@@ -208,7 +208,7 @@ bool dml2_core_utils_is_422_packed(enum dml2_source_format_class source_format)</div><div class='ctx'> 		val = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return val;</div><div class='hunk'>@@ -216,104 +216,104 @@ bool dml2_core_utils_is_422_packed(enum dml2_source_format_class source_format)</div><div class='ctx'> </div><div class='ctx'> void dml2_core_utils_print_mode_support_info(const struct dml2_core_internal_mode_support_info *support, bool fail_only)</div><div class='ctx'> {</div><div class='del'>-	dml2_printf("DML: ===================================== \n");</div><div class='del'>-	dml2_printf("DML: DML_MODE_SUPPORT_INFO_ST\n");</div><div class='add'>+	DML_LOG_VERBOSE("DML: ===================================== \n");</div><div class='add'>+	DML_LOG_VERBOSE("DML: DML_MODE_SUPPORT_INFO_ST\n");</div><div class='ctx'> 	if (!fail_only || support-&gt;ScaleRatioAndTapsSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ScaleRatioAndTapsSupport = %d\n", support-&gt;ScaleRatioAndTapsSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ScaleRatioAndTapsSupport = %d\n", support-&gt;ScaleRatioAndTapsSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;SourceFormatPixelAndScanSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: SourceFormatPixelAndScanSupport = %d\n", support-&gt;SourceFormatPixelAndScanSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: SourceFormatPixelAndScanSupport = %d\n", support-&gt;SourceFormatPixelAndScanSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;ViewportSizeSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ViewportSizeSupport = %d\n", support-&gt;ViewportSizeSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ViewportSizeSupport = %d\n", support-&gt;ViewportSizeSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;LinkRateDoesNotMatchDPVersion == 1)</div><div class='del'>-		dml2_printf("DML: support: LinkRateDoesNotMatchDPVersion = %d\n", support-&gt;LinkRateDoesNotMatchDPVersion);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: LinkRateDoesNotMatchDPVersion = %d\n", support-&gt;LinkRateDoesNotMatchDPVersion);</div><div class='ctx'> 	if (!fail_only || support-&gt;LinkRateForMultistreamNotIndicated == 1)</div><div class='del'>-		dml2_printf("DML: support: LinkRateForMultistreamNotIndicated = %d\n", support-&gt;LinkRateForMultistreamNotIndicated);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: LinkRateForMultistreamNotIndicated = %d\n", support-&gt;LinkRateForMultistreamNotIndicated);</div><div class='ctx'> 	if (!fail_only || support-&gt;BPPForMultistreamNotIndicated == 1)</div><div class='del'>-		dml2_printf("DML: support: BPPForMultistreamNotIndicated = %d\n", support-&gt;BPPForMultistreamNotIndicated);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: BPPForMultistreamNotIndicated = %d\n", support-&gt;BPPForMultistreamNotIndicated);</div><div class='ctx'> 	if (!fail_only || support-&gt;MultistreamWithHDMIOreDP == 1)</div><div class='del'>-		dml2_printf("DML: support: MultistreamWithHDMIOreDP = %d\n", support-&gt;MultistreamWithHDMIOreDP);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: MultistreamWithHDMIOreDP = %d\n", support-&gt;MultistreamWithHDMIOreDP);</div><div class='ctx'> 	if (!fail_only || support-&gt;ExceededMultistreamSlots == 1)</div><div class='del'>-		dml2_printf("DML: support: ExceededMultistreamSlots = %d\n", support-&gt;ExceededMultistreamSlots);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ExceededMultistreamSlots = %d\n", support-&gt;ExceededMultistreamSlots);</div><div class='ctx'> 	if (!fail_only || support-&gt;MSOOrODMSplitWithNonDPLink == 1)</div><div class='del'>-		dml2_printf("DML: support: MSOOrODMSplitWithNonDPLink = %d\n", support-&gt;MSOOrODMSplitWithNonDPLink);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: MSOOrODMSplitWithNonDPLink = %d\n", support-&gt;MSOOrODMSplitWithNonDPLink);</div><div class='ctx'> 	if (!fail_only || support-&gt;NotEnoughLanesForMSO == 1)</div><div class='del'>-		dml2_printf("DML: support: NotEnoughLanesForMSO = %d\n", support-&gt;NotEnoughLanesForMSO);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NotEnoughLanesForMSO = %d\n", support-&gt;NotEnoughLanesForMSO);</div><div class='ctx'> 	if (!fail_only || support-&gt;P2IWith420 == 1)</div><div class='del'>-		dml2_printf("DML: support: P2IWith420 = %d\n", support-&gt;P2IWith420);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: P2IWith420 = %d\n", support-&gt;P2IWith420);</div><div class='ctx'> 	if (!fail_only || support-&gt;DSC422NativeNotSupported == 1)</div><div class='del'>-		dml2_printf("DML: support: DSC422NativeNotSupported = %d\n", support-&gt;DSC422NativeNotSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DSC422NativeNotSupported = %d\n", support-&gt;DSC422NativeNotSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;DSCSlicesODMModeSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: DSCSlicesODMModeSupported = %d\n", support-&gt;DSCSlicesODMModeSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DSCSlicesODMModeSupported = %d\n", support-&gt;DSCSlicesODMModeSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;NotEnoughDSCUnits == 1)</div><div class='del'>-		dml2_printf("DML: support: NotEnoughDSCUnits = %d\n", support-&gt;NotEnoughDSCUnits);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NotEnoughDSCUnits = %d\n", support-&gt;NotEnoughDSCUnits);</div><div class='ctx'> 	if (!fail_only || support-&gt;NotEnoughDSCSlices == 1)</div><div class='del'>-		dml2_printf("DML: support: NotEnoughDSCSlices = %d\n", support-&gt;NotEnoughDSCSlices);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NotEnoughDSCSlices = %d\n", support-&gt;NotEnoughDSCSlices);</div><div class='ctx'> 	if (!fail_only || support-&gt;ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe == 1)</div><div class='del'>-		dml2_printf("DML: support: ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe = %d\n", support-&gt;ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe = %d\n", support-&gt;ImmediateFlipOrHostVMAndPStateWithMALLFullFrameOrPhantomPipe);</div><div class='ctx'> 	if (!fail_only || support-&gt;InvalidCombinationOfMALLUseForPStateAndStaticScreen == 1)</div><div class='del'>-		dml2_printf("DML: support: InvalidCombinationOfMALLUseForPStateAndStaticScreen = %d\n", support-&gt;InvalidCombinationOfMALLUseForPStateAndStaticScreen);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: InvalidCombinationOfMALLUseForPStateAndStaticScreen = %d\n", support-&gt;InvalidCombinationOfMALLUseForPStateAndStaticScreen);</div><div class='ctx'> 	if (!fail_only || support-&gt;DSCCLKRequiredMoreThanSupported == 1)</div><div class='del'>-		dml2_printf("DML: support: DSCCLKRequiredMoreThanSupported = %d\n", support-&gt;DSCCLKRequiredMoreThanSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DSCCLKRequiredMoreThanSupported = %d\n", support-&gt;DSCCLKRequiredMoreThanSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;PixelsPerLinePerDSCUnitSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: PixelsPerLinePerDSCUnitSupport = %d\n", support-&gt;PixelsPerLinePerDSCUnitSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PixelsPerLinePerDSCUnitSupport = %d\n", support-&gt;PixelsPerLinePerDSCUnitSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;DTBCLKRequiredMoreThanSupported == 1)</div><div class='del'>-		dml2_printf("DML: support: DTBCLKRequiredMoreThanSupported = %d\n", support-&gt;DTBCLKRequiredMoreThanSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DTBCLKRequiredMoreThanSupported = %d\n", support-&gt;DTBCLKRequiredMoreThanSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;InvalidCombinationOfMALLUseForPState == 1)</div><div class='del'>-		dml2_printf("DML: support: InvalidCombinationOfMALLUseForPState = %d\n", support-&gt;InvalidCombinationOfMALLUseForPState);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: InvalidCombinationOfMALLUseForPState = %d\n", support-&gt;InvalidCombinationOfMALLUseForPState);</div><div class='ctx'> 	if (!fail_only || support-&gt;ROBSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ROBSupport = %d\n", support-&gt;ROBSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ROBSupport = %d\n", support-&gt;ROBSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;OutstandingRequestsSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: OutstandingRequestsSupport = %d\n", support-&gt;OutstandingRequestsSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: OutstandingRequestsSupport = %d\n", support-&gt;OutstandingRequestsSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;OutstandingRequestsUrgencyAvoidance == 0)</div><div class='del'>-		dml2_printf("DML: support: OutstandingRequestsUrgencyAvoidance = %d\n", support-&gt;OutstandingRequestsUrgencyAvoidance);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: OutstandingRequestsUrgencyAvoidance = %d\n", support-&gt;OutstandingRequestsUrgencyAvoidance);</div><div class='ctx'> 	if (!fail_only || support-&gt;DISPCLK_DPPCLK_Support == 0)</div><div class='del'>-		dml2_printf("DML: support: DISPCLK_DPPCLK_Support = %d\n", support-&gt;DISPCLK_DPPCLK_Support);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DISPCLK_DPPCLK_Support = %d\n", support-&gt;DISPCLK_DPPCLK_Support);</div><div class='ctx'> 	if (!fail_only || support-&gt;TotalAvailablePipesSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: TotalAvailablePipesSupport = %d\n", support-&gt;TotalAvailablePipesSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: TotalAvailablePipesSupport = %d\n", support-&gt;TotalAvailablePipesSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;NumberOfOTGSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: NumberOfOTGSupport = %d\n", support-&gt;NumberOfOTGSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NumberOfOTGSupport = %d\n", support-&gt;NumberOfOTGSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;NumberOfHDMIFRLSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: NumberOfHDMIFRLSupport = %d\n", support-&gt;NumberOfHDMIFRLSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NumberOfHDMIFRLSupport = %d\n", support-&gt;NumberOfHDMIFRLSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;NumberOfDP2p0Support == 0)</div><div class='del'>-		dml2_printf("DML: support: NumberOfDP2p0Support = %d\n", support-&gt;NumberOfDP2p0Support);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: NumberOfDP2p0Support = %d\n", support-&gt;NumberOfDP2p0Support);</div><div class='ctx'> 	if (!fail_only || support-&gt;EnoughWritebackUnits == 0)</div><div class='del'>-		dml2_printf("DML: support: EnoughWritebackUnits = %d\n", support-&gt;EnoughWritebackUnits);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: EnoughWritebackUnits = %d\n", support-&gt;EnoughWritebackUnits);</div><div class='ctx'> 	if (!fail_only || support-&gt;WritebackScaleRatioAndTapsSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: WritebackScaleRatioAndTapsSupport = %d\n", support-&gt;WritebackScaleRatioAndTapsSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: WritebackScaleRatioAndTapsSupport = %d\n", support-&gt;WritebackScaleRatioAndTapsSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;WritebackLatencySupport == 0)</div><div class='del'>-		dml2_printf("DML: support: WritebackLatencySupport = %d\n", support-&gt;WritebackLatencySupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: WritebackLatencySupport = %d\n", support-&gt;WritebackLatencySupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;CursorSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: CursorSupport = %d\n", support-&gt;CursorSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: CursorSupport = %d\n", support-&gt;CursorSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;PitchSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: PitchSupport = %d\n", support-&gt;PitchSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PitchSupport = %d\n", support-&gt;PitchSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;ViewportExceedsSurface == 1)</div><div class='del'>-		dml2_printf("DML: support: ViewportExceedsSurface = %d\n", support-&gt;ViewportExceedsSurface);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ViewportExceedsSurface = %d\n", support-&gt;ViewportExceedsSurface);</div><div class='ctx'> 	if (!fail_only || support-&gt;PrefetchSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: PrefetchSupported = %d\n", support-&gt;PrefetchSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PrefetchSupported = %d\n", support-&gt;PrefetchSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;EnoughUrgentLatencyHidingSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: EnoughUrgentLatencyHidingSupport = %d\n", support-&gt;EnoughUrgentLatencyHidingSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: EnoughUrgentLatencyHidingSupport = %d\n", support-&gt;EnoughUrgentLatencyHidingSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;AvgBandwidthSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: AvgBandwidthSupport = %d\n", support-&gt;AvgBandwidthSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: AvgBandwidthSupport = %d\n", support-&gt;AvgBandwidthSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;DynamicMetadataSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: DynamicMetadataSupported = %d\n", support-&gt;DynamicMetadataSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DynamicMetadataSupported = %d\n", support-&gt;DynamicMetadataSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;VRatioInPrefetchSupported == 0)</div><div class='del'>-		dml2_printf("DML: support: VRatioInPrefetchSupported = %d\n", support-&gt;VRatioInPrefetchSupported);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: VRatioInPrefetchSupported = %d\n", support-&gt;VRatioInPrefetchSupported);</div><div class='ctx'> 	if (!fail_only || support-&gt;PTEBufferSizeNotExceeded == 0)</div><div class='del'>-		dml2_printf("DML: support: PTEBufferSizeNotExceeded = %d\n", support-&gt;PTEBufferSizeNotExceeded);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: PTEBufferSizeNotExceeded = %d\n", support-&gt;PTEBufferSizeNotExceeded);</div><div class='ctx'> 	if (!fail_only || support-&gt;DCCMetaBufferSizeNotExceeded == 0)</div><div class='del'>-		dml2_printf("DML: support: DCCMetaBufferSizeNotExceeded = %d\n", support-&gt;DCCMetaBufferSizeNotExceeded);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: DCCMetaBufferSizeNotExceeded = %d\n", support-&gt;DCCMetaBufferSizeNotExceeded);</div><div class='ctx'> 	if (!fail_only || support-&gt;ExceededMALLSize == 1)</div><div class='del'>-		dml2_printf("DML: support: ExceededMALLSize = %d\n", support-&gt;ExceededMALLSize);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ExceededMALLSize = %d\n", support-&gt;ExceededMALLSize);</div><div class='ctx'> 	if (!fail_only || support-&gt;g6_temp_read_support == 0)</div><div class='del'>-		dml2_printf("DML: support: g6_temp_read_support = %d\n", support-&gt;g6_temp_read_support);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: g6_temp_read_support = %d\n", support-&gt;g6_temp_read_support);</div><div class='ctx'> 	if (!fail_only || support-&gt;ImmediateFlipSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ImmediateFlipSupport = %d\n", support-&gt;ImmediateFlipSupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ImmediateFlipSupport = %d\n", support-&gt;ImmediateFlipSupport);</div><div class='ctx'> 	if (!fail_only || support-&gt;LinkCapacitySupport == 0)</div><div class='del'>-		dml2_printf("DML: support: LinkCapacitySupport = %d\n", support-&gt;LinkCapacitySupport);</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: LinkCapacitySupport = %d\n", support-&gt;LinkCapacitySupport);</div><div class='ctx'> </div><div class='ctx'> 	if (!fail_only || support-&gt;ModeSupport == 0)</div><div class='del'>-		dml2_printf("DML: support: ModeSupport = %d\n", support-&gt;ModeSupport);</div><div class='del'>-	dml2_printf("DML: ===================================== \n");</div><div class='add'>+		DML_LOG_VERBOSE("DML: support: ModeSupport = %d\n", support-&gt;ModeSupport);</div><div class='add'>+	DML_LOG_VERBOSE("DML: ===================================== \n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const char *dml2_core_utils_internal_soc_state_type_str(enum dml2_core_internal_soc_state_type dml2_core_internal_soc_state_type)</div><div class='hunk'>@@ -358,9 +358,9 @@ void dml2_core_utils_get_stream_output_bpp(double *out_bpp, const struct dml2_di</div><div class='ctx'> 			out_bpp[k] = 0;</div><div class='ctx'> 		}</div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-		dml2_printf("DML::%s: k=%d bpc=%f\n", __func__, k, bpc);</div><div class='del'>-		dml2_printf("DML::%s: k=%d dsc.enable=%d\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.dsc.enable);</div><div class='del'>-		dml2_printf("DML::%s: k=%d out_bpp=%f\n", __func__, k, out_bpp[k]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d bpc=%f\n", __func__, k, bpc);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d dsc.enable=%d\n", __func__, k, display_cfg-&gt;stream_descriptors[display_cfg-&gt;plane_descriptors[k].stream_index].timing.dsc.enable);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: k=%d out_bpp=%f\n", __func__, k, out_bpp[k]);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -391,7 +391,7 @@ unsigned int dml2_core_util_get_num_active_pipes(int unsigned num_planes, const</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef __DML_VBA_DEBUG__</div><div class='del'>-	dml2_printf("DML::%s: num_active_pipes = %d\n", __func__, num_active_pipes);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: num_active_pipes = %d\n", __func__, num_active_pipes);</div><div class='ctx'> #endif</div><div class='ctx'> 	return num_active_pipes;</div><div class='ctx'> }</div><div class='hunk'>@@ -452,7 +452,7 @@ unsigned int dml2_core_utils_get_tile_block_size_bytes(enum dml2_swizzle_mode sw</div><div class='ctx'> 	else if (sw_mode == dml2_gfx11_sw_256kb_r_x)</div><div class='ctx'> 		return 262144;</div><div class='ctx'> 	else {</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 		return 256;</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='hunk'>@@ -498,8 +498,8 @@ int unsigned dml2_core_utils_get_gfx_version(enum dml2_swizzle_mode sw_mode)</div><div class='ctx'> 		sw_mode == dml2_gfx11_sw_256kb_r_x)</div><div class='ctx'> 		version = 11;</div><div class='ctx'> 	else {</div><div class='del'>-		dml2_printf("ERROR: Invalid sw_mode setting! val=%u\n", sw_mode);</div><div class='del'>-		DML2_ASSERT(0);</div><div class='add'>+		DML_LOG_VERBOSE("ERROR: Invalid sw_mode setting! val=%u\n", sw_mode);</div><div class='add'>+		DML_ASSERT(0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return version;</div><div class='hunk'>@@ -511,7 +511,7 @@ unsigned int dml2_core_utils_get_qos_param_index(unsigned long uclk_freq_khz, co</div><div class='ctx'> 	unsigned int index = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; DML_MAX_CLK_TABLE_SIZE; i++) {</div><div class='del'>-		dml2_printf("DML::%s: per_uclk_dpm_params[%d].minimum_uclk_khz = %d\n", __func__, i, per_uclk_dpm_params[i].minimum_uclk_khz);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: per_uclk_dpm_params[%d].minimum_uclk_khz = %ld\n", __func__, i, per_uclk_dpm_params[i].minimum_uclk_khz);</div><div class='ctx'> </div><div class='ctx'> 		if (i == 0)</div><div class='ctx'> 			index = 0;</div><div class='hunk'>@@ -524,8 +524,8 @@ unsigned int dml2_core_utils_get_qos_param_index(unsigned long uclk_freq_khz, co</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	dml2_printf("DML::%s: uclk_freq_khz = %d\n", __func__, uclk_freq_khz);</div><div class='del'>-	dml2_printf("DML::%s: index = %d\n", __func__, index);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: uclk_freq_khz = %ld\n", __func__, uclk_freq_khz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: index = %d\n", __func__, index);</div><div class='ctx'> #endif</div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='hunk'>@@ -533,32 +533,32 @@ unsigned int dml2_core_utils_get_qos_param_index(unsigned long uclk_freq_khz, co</div><div class='ctx'> unsigned int dml2_core_utils_get_active_min_uclk_dpm_index(unsigned long uclk_freq_khz, const struct dml2_soc_state_table *clk_table)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	bool clk_entry_found = 0;</div><div class='add'>+	bool clk_entry_found = false;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; clk_table-&gt;uclk.num_clk_values; i++) {</div><div class='del'>-		dml2_printf("DML::%s: clk_table.uclk.clk_values_khz[%d] = %d\n", __func__, i, clk_table-&gt;uclk.clk_values_khz[i]);</div><div class='add'>+		DML_LOG_VERBOSE("DML::%s: clk_table.uclk.clk_values_khz[%d] = %ld\n", __func__, i, clk_table-&gt;uclk.clk_values_khz[i]);</div><div class='ctx'> </div><div class='ctx'> 		if (uclk_freq_khz == clk_table-&gt;uclk.clk_values_khz[i]) {</div><div class='del'>-			clk_entry_found = 1;</div><div class='add'>+			clk_entry_found = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!clk_entry_found)</div><div class='del'>-		DML2_ASSERT(clk_entry_found);</div><div class='add'>+		DML_ASSERT(clk_entry_found);</div><div class='ctx'> #if defined(__DML_VBA_DEBUG__)</div><div class='del'>-	dml2_printf("DML::%s: uclk_freq_khz = %ld\n", __func__, uclk_freq_khz);</div><div class='del'>-	dml2_printf("DML::%s: index = %d\n", __func__, i);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: uclk_freq_khz = %ld\n", __func__, uclk_freq_khz);</div><div class='add'>+	DML_LOG_VERBOSE("DML::%s: index = %d\n", __func__, i);</div><div class='ctx'> #endif</div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dml2_core_utils_is_dual_plane(enum dml2_source_format_class source_format)</div><div class='ctx'> {</div><div class='del'>-	bool ret_val = 0;</div><div class='add'>+	bool ret_val = false;</div><div class='ctx'> </div><div class='ctx'> 	if (dml2_core_utils_is_420(source_format) || dml2_core_utils_is_422_planar(source_format) || (source_format == dml2_rgbe_alpha))</div><div class='del'>-		ret_val = 1;</div><div class='add'>+		ret_val = true;</div><div class='ctx'> </div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c<br/>index 15507926f3a4..f486b090bbfc 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c</a></div><div class='hunk'>@@ -754,6 +754,8 @@ bool dpmm_dcn4_map_watermarks(struct dml2_dpmm_map_watermarks_params_in_out *in_</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].fclk_pstate = (int unsigned)(mode_lib-&gt;mp.Watermark.FCLKChangeWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_enter = (int unsigned)(mode_lib-&gt;mp.Watermark.StutterEnterPlusExitWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_exit = (int unsigned)(mode_lib-&gt;mp.Watermark.StutterExitWatermark * refclk_freq_in_mhz);</div><div class='add'>+	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_enter_z8 = (int unsigned)(mode_lib-&gt;mp.Watermark.Z8StutterEnterPlusExitWatermark * refclk_freq_in_mhz);</div><div class='add'>+	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].sr_exit_z8 = (int unsigned)(mode_lib-&gt;mp.Watermark.Z8StutterExitWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].temp_read_or_ppt = (int unsigned)(mode_lib-&gt;mp.Watermark.temp_read_or_ppt_watermark_us * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].uclk_pstate = (int unsigned)(mode_lib-&gt;mp.Watermark.DRAMClockChangeWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_A].urgent = (int unsigned)(mode_lib-&gt;mp.Watermark.UrgentWatermark * refclk_freq_in_mhz);</div><div class='hunk'>@@ -768,6 +770,8 @@ bool dpmm_dcn4_map_watermarks(struct dml2_dpmm_map_watermarks_params_in_out *in_</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].fclk_pstate = (int unsigned)(mode_lib-&gt;mp.Watermark.FCLKChangeWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].sr_enter = (int unsigned)(mode_lib-&gt;mp.Watermark.StutterEnterPlusExitWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].sr_exit = (int unsigned)(mode_lib-&gt;mp.Watermark.StutterExitWatermark * refclk_freq_in_mhz);</div><div class='add'>+	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].sr_enter_z8 = (int unsigned)(mode_lib-&gt;mp.Watermark.Z8StutterEnterPlusExitWatermark * refclk_freq_in_mhz);</div><div class='add'>+	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].sr_exit_z8 = (int unsigned)(mode_lib-&gt;mp.Watermark.Z8StutterExitWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].temp_read_or_ppt = (int unsigned)(mode_lib-&gt;mp.Watermark.temp_read_or_ppt_watermark_us * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].uclk_pstate = (int unsigned)(mode_lib-&gt;mp.Watermark.DRAMClockChangeWatermark * refclk_freq_in_mhz);</div><div class='ctx'> 	dchubbub_regs-&gt;wm_regs[DML2_DCHUB_WATERMARK_SET_B].urgent = (int unsigned)(mode_lib-&gt;mp.Watermark.UrgentWatermark * refclk_freq_in_mhz);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c<br/>index f4b1a7d02d42..a265f254152c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_dcn4.c</a></div><div class='hunk'>@@ -182,6 +182,10 @@ static bool build_min_clock_table(const struct dml2_soc_bb *soc_bb, struct dml2_</div><div class='ctx'> 	min_table-&gt;max_clocks_khz.dtbclk = soc_bb-&gt;clk_table.dtbclk.clk_values_khz[soc_bb-&gt;clk_table.dtbclk.num_clk_values - 1];</div><div class='ctx'> 	min_table-&gt;max_clocks_khz.phyclk = soc_bb-&gt;clk_table.phyclk.clk_values_khz[soc_bb-&gt;clk_table.phyclk.num_clk_values - 1];</div><div class='ctx'> </div><div class='add'>+	min_table-&gt;max_ss_clocks_khz.dispclk = (unsigned int)((double)min_table-&gt;max_clocks_khz.dispclk / (1.0 + soc_bb-&gt;dcn_downspread_percent / 100.0));</div><div class='add'>+	min_table-&gt;max_ss_clocks_khz.dppclk = (unsigned int)((double)min_table-&gt;max_clocks_khz.dppclk / (1.0 + soc_bb-&gt;dcn_downspread_percent / 100.0));</div><div class='add'>+	min_table-&gt;max_ss_clocks_khz.dtbclk = (unsigned int)((double)min_table-&gt;max_clocks_khz.dtbclk / (1.0 + soc_bb-&gt;dcn_downspread_percent / 100.0));</div><div class='add'>+</div><div class='ctx'> 	min_table-&gt;max_clocks_khz.dcfclk = soc_bb-&gt;clk_table.dcfclk.clk_values_khz[soc_bb-&gt;clk_table.dcfclk.num_clk_values - 1];</div><div class='ctx'> 	min_table-&gt;max_clocks_khz.fclk = soc_bb-&gt;clk_table.fclk.clk_values_khz[soc_bb-&gt;clk_table.fclk.num_clk_values - 1];</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c<br/>index f50662b83296..d88b3e0082dd 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c</a></div><div class='hunk'>@@ -659,7 +659,7 @@ bool pmo_dcn4_fams2_initialize(struct dml2_pmo_initialize_in_out *in_out)</div><div class='ctx'> 	for (i = 1; i &lt;= PMO_DCN4_MAX_DISPLAYS; i++) {</div><div class='ctx'> 		switch (i) {</div><div class='ctx'> 		case 1:</div><div class='del'>-			DML2_ASSERT(base_strategy_list_1_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='add'>+			DML_ASSERT(base_strategy_list_1_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='ctx'> </div><div class='ctx'> 			/* populate list */</div><div class='ctx'> 			pmo_dcn4_fams2_expand_base_pstate_strategies(</div><div class='hunk'>@@ -670,7 +670,7 @@ bool pmo_dcn4_fams2_initialize(struct dml2_pmo_initialize_in_out *in_out)</div><div class='ctx'> 					&amp;pmo-&gt;init_data.pmo_dcn4.num_expanded_strategies_per_list[i - 1]);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='del'>-			DML2_ASSERT(base_strategy_list_2_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='add'>+			DML_ASSERT(base_strategy_list_2_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='ctx'> </div><div class='ctx'> 			/* populate list */</div><div class='ctx'> 			pmo_dcn4_fams2_expand_base_pstate_strategies(</div><div class='hunk'>@@ -681,7 +681,7 @@ bool pmo_dcn4_fams2_initialize(struct dml2_pmo_initialize_in_out *in_out)</div><div class='ctx'> 					&amp;pmo-&gt;init_data.pmo_dcn4.num_expanded_strategies_per_list[i - 1]);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 3:</div><div class='del'>-			DML2_ASSERT(base_strategy_list_3_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='add'>+			DML_ASSERT(base_strategy_list_3_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='ctx'> </div><div class='ctx'> 			/* populate list */</div><div class='ctx'> 			pmo_dcn4_fams2_expand_base_pstate_strategies(</div><div class='hunk'>@@ -692,7 +692,7 @@ bool pmo_dcn4_fams2_initialize(struct dml2_pmo_initialize_in_out *in_out)</div><div class='ctx'> 					&amp;pmo-&gt;init_data.pmo_dcn4.num_expanded_strategies_per_list[i - 1]);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 4:</div><div class='del'>-			DML2_ASSERT(base_strategy_list_4_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='add'>+			DML_ASSERT(base_strategy_list_4_display_size &lt;= PMO_DCN4_MAX_BASE_STRATEGIES);</div><div class='ctx'> </div><div class='ctx'> 			/* populate list */</div><div class='ctx'> 			pmo_dcn4_fams2_expand_base_pstate_strategies(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c<br/>index dc2ce5e77f57..4a7c4c62111e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_top/dml2_top_soc15.c</a></div><div class='hunk'>@@ -761,7 +761,7 @@ bool dml2_top_mcache_calc_mcache_count_and_offsets(struct top_mcache_calc_mcache</div><div class='ctx'> 				total_mcaches_required--;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	dml2_printf("DML_CORE_DCN3::%s: plane_%d, total_mcaches_required=%d\n", __func__, i, total_mcaches_required);</div><div class='add'>+	DML_LOG_VERBOSE("DML_CORE_DCN3::%s: plane_%d, total_mcaches_required=%d\n", __func__, i, total_mcaches_required);</div><div class='ctx'> </div><div class='ctx'> 	if (total_mcaches_required &gt; dml-&gt;soc_bbox.num_dcc_mcaches) {</div><div class='ctx'> 		result = false;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.c<br/>deleted file mode 100644<br/>index c506667897c4..000000000000<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: MIT</div><div class='del'>-//</div><div class='del'>-// Copyright 2024 Advanced Micro Devices, Inc.</div><div class='del'>-</div><div class='del'>-#include "dml2_debug.h"</div><div class='del'>-</div><div class='del'>-int dml2_log_internal(const char *format, ...)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int dml2_printf(const char *format, ...)</div><div class='del'>-{</div><div class='del'>-#ifdef _DEBUG</div><div class='del'>-#ifdef _DEBUG_PRINTS</div><div class='del'>-	int result;</div><div class='del'>-	va_list args;</div><div class='del'>-	va_start(args, format);</div><div class='del'>-</div><div class='del'>-	result = vprintf(format, args);</div><div class='del'>-</div><div class='del'>-	va_end(args);</div><div class='del'>-</div><div class='del'>-	return result;</div><div class='del'>-#else</div><div class='del'>-	return 0;</div><div class='del'>-#endif</div><div class='del'>-#else</div><div class='del'>-	return 0;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h<br/>index bfe6f236d2e4..b226225103c3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_debug.h</a></div><div class='hunk'>@@ -5,55 +5,62 @@</div><div class='ctx'> #ifndef __DML2_DEBUG_H__</div><div class='ctx'> #define __DML2_DEBUG_H__</div><div class='ctx'> </div><div class='del'>-#ifndef DML2_ASSERT</div><div class='del'>-#define DML2_ASSERT(condition) ((void)0)</div><div class='del'>-#endif</div><div class='add'>+#include "os_types.h"</div><div class='add'>+#define DML_ASSERT(condition) ASSERT(condition)</div><div class='add'>+#define DML_LOG_LEVEL_DEFAULT DML_LOG_LEVEL_WARN</div><div class='add'>+#define DML_LOG_INTERNAL(fmt, ...) dm_output_to_console(fmt, ## __VA_ARGS__)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * DML_LOG_FATAL - fatal errors for unrecoverable DML states until a restart.</div><div class='del'>- * DML_LOG_ERROR - unexpected but recoverable failures inside DML</div><div class='del'>- * DML_LOG_WARN - unexpected inputs or events to DML</div><div class='del'>- * DML_LOG_INFO - high level tracing of DML interfaces</div><div class='del'>- * DML_LOG_DEBUG - detailed tracing of DML internal components</div><div class='del'>- * DML_LOG_VERBOSE - detailed tracing of DML calculation procedure</div><div class='del'>- */</div><div class='del'>-#if !defined(DML_LOG_LEVEL)</div><div class='del'>-#if defined(_DEBUG) &amp;&amp; defined(_DEBUG_PRINTS)</div><div class='del'>-/* for backward compatibility with old macros */</div><div class='del'>-#define DML_LOG_LEVEL 5</div><div class='del'>-#else</div><div class='del'>-#define DML_LOG_LEVEL 0</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='add'>+/* ASSERT with message output */</div><div class='add'>+#define DML_ASSERT_MSG(condition, fmt, ...)								\</div><div class='add'>+	do {												\</div><div class='add'>+		if (!(condition)) {									\</div><div class='add'>+			DML_LOG_ERROR("DML ASSERT hit in %s line %d\n", __func__, __LINE__);	\</div><div class='add'>+			DML_LOG_ERROR(fmt, ## __VA_ARGS__);						\</div><div class='add'>+			DML_ASSERT(condition);								\</div><div class='add'>+		}											\</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+/* fatal errors for unrecoverable DML states until a full reset */</div><div class='add'>+#define DML_LOG_LEVEL_FATAL 0</div><div class='add'>+/* unexpected but recoverable failures inside DML */</div><div class='add'>+#define DML_LOG_LEVEL_ERROR 1</div><div class='add'>+/* unexpected inputs or events to DML */</div><div class='add'>+#define DML_LOG_LEVEL_WARN 2</div><div class='add'>+/* high level tracing of DML interfaces */</div><div class='add'>+#define DML_LOG_LEVEL_INFO 3</div><div class='add'>+/* detailed tracing of DML internal components */</div><div class='add'>+#define DML_LOG_LEVEL_DEBUG 4</div><div class='add'>+/* detailed tracing of DML calculation procedure */</div><div class='add'>+#define DML_LOG_LEVEL_VERBOSE 5</div><div class='ctx'> </div><div class='del'>-#define DML_LOG_FATAL(fmt, ...) dml2_log_internal(fmt, ## __VA_ARGS__)</div><div class='del'>-#if DML_LOG_LEVEL &gt;= 1</div><div class='del'>-#define DML_LOG_ERROR(fmt, ...) dml2_log_internal(fmt, ## __VA_ARGS__)</div><div class='add'>+#ifndef DML_LOG_LEVEL</div><div class='add'>+#define DML_LOG_LEVEL DML_LOG_LEVEL_DEFAULT</div><div class='add'>+#endif /* #ifndef DML_LOG_LEVEL */</div><div class='add'>+</div><div class='add'>+#define DML_LOG_FATAL(fmt, ...) DML_LOG_INTERNAL("[DML FATAL] " fmt, ## __VA_ARGS__)</div><div class='add'>+#if DML_LOG_LEVEL &gt;= DML_LOG_LEVEL_ERROR</div><div class='add'>+#define DML_LOG_ERROR(fmt, ...) DML_LOG_INTERNAL("[DML ERROR] "fmt, ## __VA_ARGS__)</div><div class='ctx'> #else</div><div class='ctx'> #define DML_LOG_ERROR(fmt, ...) ((void)0)</div><div class='ctx'> #endif</div><div class='del'>-#if DML_LOG_LEVEL &gt;= 2</div><div class='del'>-#define DML_LOG_WARN(fmt, ...) dml2_log_internal(fmt, ## __VA_ARGS__)</div><div class='add'>+#if DML_LOG_LEVEL &gt;= DML_LOG_LEVEL_WARN</div><div class='add'>+#define DML_LOG_WARN(fmt, ...) DML_LOG_INTERNAL("[DML WARN] "fmt, ## __VA_ARGS__)</div><div class='ctx'> #else</div><div class='ctx'> #define DML_LOG_WARN(fmt, ...) ((void)0)</div><div class='ctx'> #endif</div><div class='del'>-#if DML_LOG_LEVEL &gt;= 3</div><div class='del'>-#define DML_LOG_INFO(fmt, ...) dml2_log_internal(fmt, ## __VA_ARGS__)</div><div class='add'>+#if DML_LOG_LEVEL &gt;= DML_LOG_LEVEL_INFO</div><div class='add'>+#define DML_LOG_INFO(fmt, ...) DML_LOG_INTERNAL("[DML INFO] "fmt, ## __VA_ARGS__)</div><div class='ctx'> #else</div><div class='ctx'> #define DML_LOG_INFO(fmt, ...) ((void)0)</div><div class='ctx'> #endif</div><div class='del'>-#if DML_LOG_LEVEL &gt;= 4</div><div class='del'>-#define DML_LOG_DEBUG(fmt, ...) dml2_log_internal(fmt, ## __VA_ARGS__)</div><div class='add'>+#if DML_LOG_LEVEL &gt;= DML_LOG_LEVEL_DEBUG</div><div class='add'>+#define DML_LOG_DEBUG(fmt, ...) DML_LOG_INTERNAL("[DML DEBUG] "fmt, ## __VA_ARGS__)</div><div class='ctx'> #else</div><div class='ctx'> #define DML_LOG_DEBUG(fmt, ...) ((void)0)</div><div class='ctx'> #endif</div><div class='del'>-#if DML_LOG_LEVEL &gt;= 5</div><div class='del'>-#define DML_LOG_VERBOSE(fmt, ...) dml2_log_internal(fmt, ## __VA_ARGS__)</div><div class='add'>+#if DML_LOG_LEVEL &gt;= DML_LOG_LEVEL_VERBOSE</div><div class='add'>+#define DML_LOG_VERBOSE(fmt, ...) DML_LOG_INTERNAL("[DML VERBOSE] "fmt, ## __VA_ARGS__)</div><div class='ctx'> #else</div><div class='ctx'> #define DML_LOG_VERBOSE(fmt, ...) ((void)0)</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='del'>-int dml2_log_internal(const char *format, ...);</div><div class='del'>-int dml2_printf(const char *format, ...);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='add'>+#endif /* __DML2_DEBUG_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h<br/>index d8d01dceacdd..00688b9f1df4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/dml2_internal_shared_types.h</a></div><div class='hunk'>@@ -38,6 +38,12 @@ struct dml2_mcg_min_clock_table {</div><div class='ctx'> 	} max_clocks_khz;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='add'>+		unsigned int dispclk;</div><div class='add'>+		unsigned int dppclk;</div><div class='add'>+		unsigned int dtbclk;</div><div class='add'>+	} max_ss_clocks_khz;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='ctx'> 		unsigned int dprefclk;</div><div class='ctx'> 		unsigned int xtalclk;</div><div class='ctx'> 		unsigned int pcierefclk;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c<br/>index a966abd40788..5f1b49a50049 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c</a></div><div class='hunk'>@@ -1082,22 +1082,22 @@ bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const s</div><div class='ctx'> 		if (stream_disp_cfg_index &gt;= disp_cfg_index_max)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_bypass) {</div><div class='del'>-			scratch.odm_info.odm_factor = 1;</div><div class='del'>-		} else if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_combine_2to1) {</div><div class='del'>-			scratch.odm_info.odm_factor = 2;</div><div class='del'>-		} else if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_combine_4to1) {</div><div class='del'>-			scratch.odm_info.odm_factor = 4;</div><div class='del'>-		} else {</div><div class='del'>-			ASSERT(false);</div><div class='del'>-			scratch.odm_info.odm_factor = 1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		if (ctx-&gt;architecture == dml2_architecture_20) {</div><div class='add'>+			if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_bypass) {</div><div class='add'>+				scratch.odm_info.odm_factor = 1;</div><div class='add'>+			} else if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_combine_2to1) {</div><div class='add'>+				scratch.odm_info.odm_factor = 2;</div><div class='add'>+			} else if (ODMMode[stream_disp_cfg_index] == dml_odm_mode_combine_4to1) {</div><div class='add'>+				scratch.odm_info.odm_factor = 4;</div><div class='add'>+			} else {</div><div class='add'>+				ASSERT(false);</div><div class='add'>+				scratch.odm_info.odm_factor = 1;</div><div class='add'>+			}</div><div class='add'>+		} else if (ctx-&gt;architecture == dml2_architecture_21) {</div><div class='ctx'> 		/* After DML2.1 update, ODM interpretation needs to change and is no longer same as for DML2.0.</div><div class='ctx'> 		 * This is not an issue with new resource management logic. This block ensure backcompat</div><div class='ctx'> 		 * with legacy pipe management with updated DML.</div><div class='ctx'> 		 * */</div><div class='del'>-		if (ctx-&gt;architecture == dml2_architecture_21) {</div><div class='ctx'> 			if (ODMMode[stream_disp_cfg_index] == 1) {</div><div class='ctx'> 				scratch.odm_info.odm_factor = 1;</div><div class='ctx'> 			} else if (ODMMode[stream_disp_cfg_index] == 2) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c<br/>index 2061d43b92e1..5de775fd8fce 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c</a></div><div class='hunk'>@@ -896,7 +896,7 @@ static void populate_dummy_dml_surface_cfg(struct dml_surface_cfg_st *out, unsig</div><div class='ctx'> 	out-&gt;SurfaceWidthC[location] = in-&gt;timing.h_addressable;</div><div class='ctx'> 	out-&gt;SurfaceHeightC[location] = in-&gt;timing.v_addressable;</div><div class='ctx'> 	out-&gt;PitchY[location] = ((out-&gt;SurfaceWidthY[location] + 127) / 128) * 128;</div><div class='del'>-	out-&gt;PitchC[location] = 0;</div><div class='add'>+	out-&gt;PitchC[location] = 1;</div><div class='ctx'> 	out-&gt;DCCEnable[location] = false;</div><div class='ctx'> 	out-&gt;DCCMetaPitchY[location] = 0;</div><div class='ctx'> 	out-&gt;DCCMetaPitchC[location] = 0;</div><div class='hunk'>@@ -973,7 +973,9 @@ static void populate_dml_surface_cfg_from_plane_state(enum dml_project_id dml2_p</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void get_scaler_data_for_plane(const struct dc_plane_state *in, struct dc_state *context, struct scaler_data *out)</div><div class='add'>+static struct scaler_data *get_scaler_data_for_plane(</div><div class='add'>+		const struct dc_plane_state *in,</div><div class='add'>+		struct dc_state *context)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct pipe_ctx *temp_pipe = &amp;context-&gt;res_ctx.temp_pipe;</div><div class='hunk'>@@ -994,7 +996,7 @@ static void get_scaler_data_for_plane(const struct dc_plane_state *in, struct dc</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ASSERT(i &lt; MAX_PIPES);</div><div class='del'>-	memcpy(out, &amp;temp_pipe-&gt;plane_res.scl_data, sizeof(*out));</div><div class='add'>+	return &amp;temp_pipe-&gt;plane_res.scl_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned int location,</div><div class='hunk'>@@ -1057,11 +1059,7 @@ static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out</div><div class='ctx'> 						    const struct dc_plane_state *in, struct dc_state *context,</div><div class='ctx'> 						    const struct soc_bounding_box_st *soc)</div><div class='ctx'> {</div><div class='del'>-	struct scaler_data *scaler_data = kzalloc(sizeof(*scaler_data), GFP_KERNEL);</div><div class='del'>-	if (!scaler_data)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	get_scaler_data_for_plane(in, context, scaler_data);</div><div class='add'>+	struct scaler_data *scaler_data = get_scaler_data_for_plane(in, context);</div><div class='ctx'> </div><div class='ctx'> 	out-&gt;CursorBPP[location] = dml_cur_32bit;</div><div class='ctx'> 	out-&gt;CursorWidth[location] = 256;</div><div class='hunk'>@@ -1126,8 +1124,6 @@ static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st *out</div><div class='ctx'> 	out-&gt;DynamicMetadataTransmittedBytes[location] = 0;</div><div class='ctx'> </div><div class='ctx'> 	out-&gt;NumberOfCursors[location] = 1;</div><div class='del'>-</div><div class='del'>-	kfree(scaler_data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int map_stream_to_dml_display_cfg(const struct dml2_context *dml2,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c<br/>index 939ee0708bd2..525b7d04bf84 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c</a></div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "display_mode_core.h"</div><div class='ctx'> #include "dml2_internal_types.h"</div><div class='ctx'> #include "dml2_utils.h"</div><div class='hunk'>@@ -661,7 +663,10 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s</div><div class='ctx'> 		dml2_copy_clocks_to_dc_state(&amp;out_clks, context);</div><div class='ctx'> 		dml2_extract_watermark_set(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.a, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='ctx'> 		dml2_extract_watermark_set(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.b, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='del'>-		memcpy(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.c, &amp;dml2-&gt;v20.g6_temp_read_watermark_set, sizeof(context-&gt;bw_ctx.bw.dcn.watermarks.c));</div><div class='add'>+		if (context-&gt;streams[0]-&gt;sink-&gt;link-&gt;dc-&gt;caps.is_apu)</div><div class='add'>+			dml2_extract_watermark_set(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.c, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='add'>+		else</div><div class='add'>+			memcpy(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.c, &amp;dml2-&gt;v20.g6_temp_read_watermark_set, sizeof(context-&gt;bw_ctx.bw.dcn.watermarks.c));</div><div class='ctx'> 		dml2_extract_watermark_set(&amp;context-&gt;bw_ctx.bw.dcn.watermarks.d, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='ctx'> 		dml2_extract_writeback_wm(context, &amp;dml2-&gt;v20.dml_core_ctx);</div><div class='ctx'> 		//copy for deciding zstate use</div><div class='hunk'>@@ -732,17 +737,22 @@ bool dml2_validate(const struct dc *in_dc, struct dc_state *context, struct dml2</div><div class='ctx'> 		return out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	DC_FP_START();</div><div class='add'>+</div><div class='ctx'> 	/* Use dml_validate_only for fast_validate path */</div><div class='ctx'> 	if (fast_validate)</div><div class='ctx'> 		out = dml2_validate_only(context);</div><div class='ctx'> 	else</div><div class='ctx'> 		out = dml2_validate_and_build_resource(in_dc, context);</div><div class='add'>+</div><div class='add'>+	DC_FP_END();</div><div class='add'>+</div><div class='ctx'> 	return out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct dml2_context *dml2_allocate_memory(void)</div><div class='ctx'> {</div><div class='del'>-	return (struct dml2_context *) kzalloc(sizeof(struct dml2_context), GFP_KERNEL);</div><div class='add'>+	return (struct dml2_context *) vzalloc(sizeof(struct dml2_context));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dml2_init(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2)</div><div class='hunk'>@@ -779,11 +789,15 @@ static void dml2_init(const struct dc *in_dc, const struct dml2_configuration_op</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	DC_FP_START();</div><div class='add'>+</div><div class='ctx'> 	initialize_dml2_ip_params(*dml2, in_dc, &amp;(*dml2)-&gt;v20.dml_core_ctx.ip);</div><div class='ctx'> </div><div class='ctx'> 	initialize_dml2_soc_bbox(*dml2, in_dc, &amp;(*dml2)-&gt;v20.dml_core_ctx.soc);</div><div class='ctx'> </div><div class='ctx'> 	initialize_dml2_soc_states(*dml2, in_dc, &amp;(*dml2)-&gt;v20.dml_core_ctx.soc, &amp;(*dml2)-&gt;v20.dml_core_ctx.states);</div><div class='add'>+</div><div class='add'>+	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dml2_create(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2)</div><div class='hunk'>@@ -812,7 +826,7 @@ void dml2_destroy(struct dml2_context *dml2)</div><div class='ctx'> </div><div class='ctx'> 	if (dml2-&gt;architecture == dml2_architecture_21)</div><div class='ctx'> 		dml21_destroy(dml2);</div><div class='del'>-	kfree(dml2);</div><div class='add'>+	vfree(dml2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dml2_extract_dram_and_fclk_change_support(struct dml2_context *dml2,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h<br/>index 785226945699..5100f269368e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h</a></div><div class='hunk'>@@ -40,6 +40,7 @@ struct dc_sink;</div><div class='ctx'> struct dc_stream_state;</div><div class='ctx'> struct resource_context;</div><div class='ctx'> struct display_stream_compressor;</div><div class='add'>+struct dc_mcache_params;</div><div class='ctx'> </div><div class='ctx'> // Configuration of the MALL on the SoC</div><div class='ctx'> struct dml2_soc_mall_info {</div><div class='hunk'>@@ -107,6 +108,7 @@ struct dml2_dc_callbacks {</div><div class='ctx'> 	unsigned int (*get_max_flickerless_instant_vtotal_increase)(</div><div class='ctx'> 			struct dc_stream_state *stream,</div><div class='ctx'> 			bool is_gaming);</div><div class='add'>+	bool (*allocate_mcache)(struct dc_state *context, const struct dc_mcache_params *mcache_params);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dml2_dc_svp_callbacks {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c<br/>index abf439e743f2..2d70586cef40 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c</a></div><div class='hunk'>@@ -790,8 +790,7 @@ static bool dpp3_program_blnd_lut(struct dpp *dpp_base,</div><div class='ctx'> </div><div class='ctx'> 	if (params == NULL) {</div><div class='ctx'> 		REG_SET(CM_BLNDGAM_CONTROL, 0, CM_BLNDGAM_MODE, 0);</div><div class='del'>-		if (dpp_base-&gt;ctx-&gt;dc-&gt;debug.enable_mem_low_power.bits.cm)</div><div class='del'>-			dpp3_power_on_blnd_lut(dpp_base, false);</div><div class='add'>+		dpp3_power_on_blnd_lut(dpp_base, false);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1204,8 +1203,7 @@ static bool dpp3_program_shaper(struct dpp *dpp_base,</div><div class='ctx'> </div><div class='ctx'> 	if (params == NULL) {</div><div class='ctx'> 		REG_SET(CM_SHAPER_CONTROL, 0, CM_SHAPER_LUT_MODE, 0);</div><div class='del'>-		if (dpp_base-&gt;ctx-&gt;dc-&gt;debug.enable_mem_low_power.bits.cm)</div><div class='del'>-			dpp3_power_on_shaper(dpp_base, false);</div><div class='add'>+		dpp3_power_on_shaper(dpp_base, false);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1399,8 +1397,7 @@ static bool dpp3_program_3dlut(struct dpp *dpp_base,</div><div class='ctx'> </div><div class='ctx'> 	if (params == NULL) {</div><div class='ctx'> 		dpp3_set_3dlut_mode(dpp_base, LUT_BYPASS, false, false);</div><div class='del'>-		if (dpp_base-&gt;ctx-&gt;dc-&gt;debug.enable_mem_low_power.bits.cm)</div><div class='del'>-			dpp3_power_on_hdr3dlut(dpp_base, false);</div><div class='add'>+		dpp3_power_on_hdr3dlut(dpp_base, false);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c<br/>index 62b7012cda43..f7a373a3d70a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c</a></div><div class='hunk'>@@ -138,7 +138,7 @@ bool dpp35_construct(</div><div class='ctx'> 	dpp-&gt;base.funcs = &amp;dcn35_dpp_funcs;</div><div class='ctx'> </div><div class='ctx'> 	// w/a for cursor memory stuck in LS by programming DISPCLK_R_GATE_DISABLE, limit w/a to some ASIC revs</div><div class='del'>-	if (dpp-&gt;base.ctx-&gt;asic_id.hw_internal_rev &lt;= 0x10)</div><div class='add'>+	if (dpp-&gt;base.ctx-&gt;asic_id.hw_internal_rev &lt; 0x40)</div><div class='ctx'> 		dpp-&gt;dispclk_r_gate_disable = true;</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c<br/>index 1236e0f9a256..712aff7e17f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_cm.c</a></div><div class='hunk'>@@ -120,10 +120,11 @@ void dpp401_set_cursor_attributes(</div><div class='ctx'> 	enum dc_cursor_color_format color_format = cursor_attributes-&gt;color_format;</div><div class='ctx'> 	int cur_rom_en = 0;</div><div class='ctx'> </div><div class='del'>-	// DCN4 should always do Cursor degamma for Cursor Color modes</div><div class='ctx'> 	if (color_format == CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA ||</div><div class='ctx'> 		color_format == CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA) {</div><div class='del'>-		cur_rom_en = 1;</div><div class='add'>+		if (cursor_attributes-&gt;attribute_flags.bits.ENABLE_CURSOR_DEGAMMA) {</div><div class='add'>+			cur_rom_en = 1;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	REG_UPDATE_3(CURSOR0_CONTROL,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c<br/>index 75128fd34306..bd1b9aef6d5c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.c</a></div><div class='hunk'>@@ -57,13 +57,6 @@ static const struct dsc_funcs dcn20_dsc_funcs = {</div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 	dsc-&gt;ctx-&gt;logger</div><div class='ctx'> </div><div class='del'>-enum dsc_bits_per_comp {</div><div class='del'>-	DSC_BPC_8 = 8,</div><div class='del'>-	DSC_BPC_10 = 10,</div><div class='del'>-	DSC_BPC_12 = 12,</div><div class='del'>-	DSC_BPC_UNKNOWN</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* API functions (external or via structure-&gt;function_pointer) */</div><div class='ctx'> </div><div class='ctx'> void dsc2_construct(struct dcn20_dsc *dsc,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h b/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h<br/>index 1fb90b52b814..a9c04fc95bd1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dsc/dcn20/dcn20_dsc.h</a></div><div class='hunk'>@@ -457,6 +457,12 @@</div><div class='ctx'> 	type DSCRM_DSC_DOUBLE_BUFFER_REG_UPDATE_PENDING; \</div><div class='ctx'> 	type DSCRM_DSC_FORWARD_EN_STATUS</div><div class='ctx'> </div><div class='add'>+enum dsc_bits_per_comp {</div><div class='add'>+	DSC_BPC_8 = 8,</div><div class='add'>+	DSC_BPC_10 = 10,</div><div class='add'>+	DSC_BPC_12 = 12,</div><div class='add'>+	DSC_BPC_UNKNOWN</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct dcn20_dsc_registers {</div><div class='ctx'> 	uint32_t DSC_TOP_CONTROL;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c b/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c<br/>index 4893b793fec0..4222679fd4c9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c</a></div><div class='hunk'>@@ -45,12 +45,6 @@ static const struct dsc_funcs dcn401_dsc_funcs = {</div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 	dsc-&gt;ctx-&gt;logger</div><div class='ctx'> </div><div class='del'>-enum dsc_bits_per_comp {</div><div class='del'>-	DSC_BPC_8 = 8,</div><div class='del'>-	DSC_BPC_10 = 10,</div><div class='del'>-	DSC_BPC_12 = 12,</div><div class='del'>-	DSC_BPC_UNKNOWN</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> /* API functions (external or via structure-&gt;function_pointer) */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c<br/>index b099989d9364..942d9f0b6df2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c</a></div><div class='hunk'>@@ -411,6 +411,20 @@ enum dc_irq_source dal_irq_get_rx_source(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum dc_irq_source dal_irq_get_read_request(</div><div class='add'>+	const struct gpio *irq)</div><div class='add'>+{</div><div class='add'>+	enum gpio_id id = dal_gpio_get_id(irq);</div><div class='add'>+</div><div class='add'>+	switch (id) {</div><div class='add'>+	case GPIO_ID_HPD:</div><div class='add'>+		return (enum dc_irq_source)(DC_IRQ_SOURCE_DCI2C_RR_DDC1 +</div><div class='add'>+			dal_gpio_get_enum(irq));</div><div class='add'>+	default:</div><div class='add'>+		return DC_IRQ_SOURCE_INVALID;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum gpio_result dal_irq_setup_hpd_filter(</div><div class='ctx'> 	struct gpio *irq,</div><div class='ctx'> 	struct gpio_hpd_config *config)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c b/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c<br/>index 2546224b326a..e4496ad203b2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hubbub/dcn21/dcn21_hubbub.c</a></div><div class='hunk'>@@ -132,9 +132,9 @@ int hubbub21_init_dchub(struct hubbub *hubbub,</div><div class='ctx'> 		// Init VMID 0 based on PA config</div><div class='ctx'> 		dcn20_vmid_setup(&amp;hubbub1-&gt;vmid[0], &amp;phys_config);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	dcn21_dchvm_init(hubbub);</div><div class='del'>-</div><div class='add'>+	if (!hubbub1-&gt;base.ctx-&gt;dc-&gt;config.skip_riommu_prefetch_wa) {</div><div class='add'>+		dcn21_dchvm_init(hubbub);</div><div class='add'>+	}</div><div class='ctx'> 	return hubbub1-&gt;num_vmid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c b/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c<br/>index 5ed195377a6c..baed31611477 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c</a></div><div class='hunk'>@@ -1032,7 +1032,7 @@ static struct hubp_funcs dcn401_hubp_funcs = {</div><div class='ctx'> 	.hubp_program_3dlut_fl_tmz_protected = hubp401_program_3dlut_fl_tmz_protected,</div><div class='ctx'> 	.hubp_program_3dlut_fl_crossbar = hubp401_program_3dlut_fl_crossbar,</div><div class='ctx'> 	.hubp_get_3dlut_fl_done = hubp401_get_3dlut_fl_done,</div><div class='del'>-	.hubp_clear_tiling = hubp2_clear_tiling,</div><div class='add'>+	.hubp_clear_tiling = hubp401_clear_tiling,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> bool hubp401_construct(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/Makefile b/drivers/gpu/drm/amd/display/dc/hwss/Makefile<br/>index 40ecebea1ba0..bee617ca0838 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/Makefile</a></div><div class='hunk'>@@ -27,6 +27,24 @@</div><div class='ctx'> #  DCE</div><div class='ctx'> ###############################################################################</div><div class='ctx'> </div><div class='add'>+ifdef CONFIG_DRM_AMD_DC_SI</div><div class='add'>+HWSS_DCE60 = dce60_hwseq.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_HWSS_DCE60 = $(addprefix $(AMDDALPATH)/dc/hwss/dce60/,$(HWSS_DCE60))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE60)</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+HWSS_DCE80 = dce80_hwseq.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_HWSS_DCE80 = $(addprefix $(AMDDALPATH)/dc/hwss/dce80/,$(HWSS_DCE80))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE80)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='ctx'> HWSS_DCE = dce_hwseq.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_HWSS_DCE = $(addprefix $(AMDDALPATH)/dc/hwss/dce/,$(HWSS_DCE))</div><div class='hunk'>@@ -65,14 +83,6 @@ AMD_DAL_HWSS_DCE120 = $(addprefix $(AMDDALPATH)/dc/hwss/dce120/,$(HWSS_DCE120))</div><div class='ctx'> </div><div class='ctx'> AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE120)</div><div class='ctx'> </div><div class='del'>-###############################################################################</div><div class='del'>-</div><div class='del'>-HWSS_DCE80 = dce80_hwseq.o</div><div class='del'>-</div><div class='del'>-AMD_DAL_HWSS_DCE80 = $(addprefix $(AMDDALPATH)/dc/hwss/dce80/,$(HWSS_DCE80))</div><div class='del'>-</div><div class='del'>-AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE80)</div><div class='del'>-</div><div class='ctx'> ifdef CONFIG_DRM_AMD_DC_FP</div><div class='ctx'> ###############################################################################</div><div class='ctx'> # DCN</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c<br/>index 5656d10368ad..23bec5d25ed6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c</a></div><div class='hunk'>@@ -2763,12 +2763,12 @@ static void dce110_enable_per_frame_crtc_position_reset(</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void init_pipes(struct dc *dc, struct dc_state *context)</div><div class='add'>+static void dce110_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> {</div><div class='ctx'> 	// Do nothing</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void init_hw(struct dc *dc)</div><div class='add'>+static void dce110_init_hw(struct dc *dc)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct dc_bios *bp;</div><div class='hunk'>@@ -3327,7 +3327,7 @@ void dce110_disable_link_output(struct dc_link *link,</div><div class='ctx'> static const struct hw_sequencer_funcs dce110_funcs = {</div><div class='ctx'> 	.program_gamut_remap = program_gamut_remap,</div><div class='ctx'> 	.program_output_csc = program_output_csc,</div><div class='del'>-	.init_hw = init_hw,</div><div class='add'>+	.init_hw = dce110_init_hw,</div><div class='ctx'> 	.apply_ctx_to_hw = dce110_apply_ctx_to_hw,</div><div class='ctx'> 	.apply_ctx_for_surface = dce110_apply_ctx_for_surface,</div><div class='ctx'> 	.post_unlock_program_front_end = dce110_post_unlock_program_front_end,</div><div class='hunk'>@@ -3371,7 +3371,7 @@ static const struct hw_sequencer_funcs dce110_funcs = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct hwseq_private_funcs dce110_private_funcs = {</div><div class='del'>-	.init_pipes = init_pipes,</div><div class='add'>+	.init_pipes = dce110_init_pipes,</div><div class='ctx'> 	.set_input_transfer_func = dce110_set_input_transfer_func,</div><div class='ctx'> 	.set_output_transfer_func = dce110_set_output_transfer_func,</div><div class='ctx'> 	.power_down = dce110_power_down,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c<br/>index 44b56490e152..a08e9f9eec17 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include "dm_services.h"</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> #include "core_types.h"</div><div class='del'>-#include "dce60_hw_sequencer.h"</div><div class='add'>+#include "dce60_hwseq.h"</div><div class='ctx'> </div><div class='ctx'> #include "dce/dce_hwseq.h"</div><div class='ctx'> #include "dce110/dce110_hwseq.h"</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.h<br/>index f3b2d8b60d5b..f3b2d8b60d5b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.h</a></div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c<br/>index 912f96323ed6..f9ee55998b6b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c</a></div><div class='hunk'>@@ -94,6 +94,128 @@ static void print_microsec(struct dc_context *dc_ctx,</div><div class='ctx'> 			us_x10 % frac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Delay until we passed busy-until-point to which we can</div><div class='add'>+ * do necessary locking/programming on consecutive full updates</div><div class='add'>+ */</div><div class='add'>+void dcn10_wait_for_pipe_update_if_needed(struct dc *dc, struct pipe_ctx *pipe_ctx, bool is_surface_update_only)</div><div class='add'>+{</div><div class='add'>+	struct crtc_position position;</div><div class='add'>+	struct dc_stream_state *stream = pipe_ctx-&gt;stream;</div><div class='add'>+	unsigned int vpos, frame_count;</div><div class='add'>+	uint32_t vupdate_start, vupdate_end, vblank_start;</div><div class='add'>+	unsigned int lines_to_vupdate, us_to_vupdate;</div><div class='add'>+	unsigned int us_per_line, us_vupdate;</div><div class='add'>+</div><div class='add'>+	if (!pipe_ctx-&gt;stream ||</div><div class='add'>+		!pipe_ctx-&gt;stream_res.tg ||</div><div class='add'>+		!pipe_ctx-&gt;stream_res.stream_enc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pipe_ctx-&gt;prev_odm_pipe &amp;&amp;</div><div class='add'>+				pipe_ctx-&gt;stream)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!pipe_ctx-&gt;wait_is_required)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	struct timing_generator *tg = pipe_ctx-&gt;stream_res.tg;</div><div class='add'>+</div><div class='add'>+	if (tg-&gt;funcs-&gt;is_tg_enabled &amp;&amp; !tg-&gt;funcs-&gt;is_tg_enabled(tg))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dc-&gt;hwss.calc_vupdate_position(dc, pipe_ctx, &amp;vupdate_start,</div><div class='add'>+						&amp;vupdate_end);</div><div class='add'>+</div><div class='add'>+	dc-&gt;hwss.get_position(&amp;pipe_ctx, 1, &amp;position);</div><div class='add'>+	vpos = position.vertical_count;</div><div class='add'>+</div><div class='add'>+	frame_count = tg-&gt;funcs-&gt;get_frame_count(tg);</div><div class='add'>+</div><div class='add'>+	if (frame_count - pipe_ctx-&gt;wait_frame_count &gt; 2)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vblank_start = pipe_ctx-&gt;pipe_dlg_param.vblank_start;</div><div class='add'>+</div><div class='add'>+	if (vpos &gt;= vupdate_start &amp;&amp; vupdate_start &gt;= vblank_start)</div><div class='add'>+		lines_to_vupdate = stream-&gt;timing.v_total - vpos + vupdate_start;</div><div class='add'>+	else</div><div class='add'>+		lines_to_vupdate = vupdate_start - vpos;</div><div class='add'>+</div><div class='add'>+	us_per_line =</div><div class='add'>+		stream-&gt;timing.h_total * 10000u / stream-&gt;timing.pix_clk_100hz;</div><div class='add'>+	us_to_vupdate = lines_to_vupdate * us_per_line;</div><div class='add'>+</div><div class='add'>+	if (vupdate_end &lt; vupdate_start)</div><div class='add'>+		vupdate_end += stream-&gt;timing.v_total;</div><div class='add'>+</div><div class='add'>+	if (lines_to_vupdate &gt; stream-&gt;timing.v_total - vupdate_end + vupdate_start)</div><div class='add'>+		us_to_vupdate = 0;</div><div class='add'>+</div><div class='add'>+	us_vupdate = (vupdate_end - vupdate_start + 1) * us_per_line;</div><div class='add'>+</div><div class='add'>+	if (is_surface_update_only &amp;&amp; us_to_vupdate + us_vupdate &gt; 200) {</div><div class='add'>+		//surface updates come in at high irql</div><div class='add'>+		pipe_ctx-&gt;wait_is_required = true;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fsleep(us_to_vupdate + us_vupdate);</div><div class='add'>+</div><div class='add'>+	//clear</div><div class='add'>+	pipe_ctx-&gt;next_vupdate = 0;</div><div class='add'>+	pipe_ctx-&gt;wait_frame_count = 0;</div><div class='add'>+	pipe_ctx-&gt;wait_is_required = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * On pipe unlock and programming, indicate pipe will be busy</div><div class='add'>+ * until some frame and line (vupdate), this is required for consecutive</div><div class='add'>+ * full updates, need to wait for updates</div><div class='add'>+ * to latch to try and program the next update</div><div class='add'>+ */</div><div class='add'>+void dcn10_set_wait_for_update_needed_for_pipe(struct dc *dc, struct pipe_ctx *pipe_ctx)</div><div class='add'>+{</div><div class='add'>+	uint32_t vupdate_start, vupdate_end;</div><div class='add'>+	struct crtc_position position;</div><div class='add'>+	unsigned int vpos, cur_frame;</div><div class='add'>+</div><div class='add'>+	if (!pipe_ctx-&gt;stream ||</div><div class='add'>+		!pipe_ctx-&gt;stream_res.tg ||</div><div class='add'>+		!pipe_ctx-&gt;stream_res.stream_enc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dc-&gt;hwss.get_position(&amp;pipe_ctx, 1, &amp;position);</div><div class='add'>+	vpos = position.vertical_count;</div><div class='add'>+</div><div class='add'>+	dc-&gt;hwss.calc_vupdate_position(dc, pipe_ctx, &amp;vupdate_start,</div><div class='add'>+						&amp;vupdate_end);</div><div class='add'>+</div><div class='add'>+	struct timing_generator *tg = pipe_ctx-&gt;stream_res.tg;</div><div class='add'>+</div><div class='add'>+	struct optc *optc1 = DCN10TG_FROM_TG(tg);</div><div class='add'>+</div><div class='add'>+	ASSERT(optc1-&gt;max_frame_count != 0);</div><div class='add'>+</div><div class='add'>+	if (tg-&gt;funcs-&gt;is_tg_enabled &amp;&amp; !tg-&gt;funcs-&gt;is_tg_enabled(tg))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pipe_ctx-&gt;next_vupdate = vupdate_start;</div><div class='add'>+</div><div class='add'>+	cur_frame = tg-&gt;funcs-&gt;get_frame_count(tg);</div><div class='add'>+</div><div class='add'>+	if (vpos &lt; vupdate_start) {</div><div class='add'>+		pipe_ctx-&gt;wait_frame_count = cur_frame;</div><div class='add'>+	} else {</div><div class='add'>+		if (cur_frame + 1 &gt; optc1-&gt;max_frame_count)</div><div class='add'>+			pipe_ctx-&gt;wait_frame_count = cur_frame + 1 - optc1-&gt;max_frame_count;</div><div class='add'>+		else</div><div class='add'>+			pipe_ctx-&gt;wait_frame_count = cur_frame + 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pipe_ctx-&gt;wait_is_required = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void dcn10_lock_all_pipes(struct dc *dc,</div><div class='ctx'> 	struct dc_state *context,</div><div class='ctx'> 	bool lock)</div><div class='hunk'>@@ -2664,7 +2786,6 @@ void dcn10_update_visual_confirm_color(struct dc *dc,</div><div class='ctx'> 	struct mpc *mpc = dc-&gt;res_pool-&gt;mpc;</div><div class='ctx'> </div><div class='ctx'> 	if (mpc-&gt;funcs-&gt;set_bg_color) {</div><div class='del'>-		memcpy(&amp;pipe_ctx-&gt;plane_state-&gt;visual_confirm_color, &amp;(pipe_ctx-&gt;visual_confirm_color), sizeof(struct tg_color));</div><div class='ctx'> 		mpc-&gt;funcs-&gt;set_bg_color(mpc, &amp;(pipe_ctx-&gt;visual_confirm_color), mpcc_id);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h<br/>index 42ffd1e1299c..57d30ea225f2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h</a></div><div class='hunk'>@@ -50,6 +50,13 @@ void dcn10_optimize_bandwidth(</div><div class='ctx'> void dcn10_prepare_bandwidth(</div><div class='ctx'> 		struct dc *dc,</div><div class='ctx'> 		struct dc_state *context);</div><div class='add'>+void dcn10_wait_for_pipe_update_if_needed(</div><div class='add'>+		struct dc *dc,</div><div class='add'>+		struct pipe_ctx *pipe_ctx,</div><div class='add'>+		bool is_surface_update_only);</div><div class='add'>+void dcn10_set_wait_for_update_needed_for_pipe(</div><div class='add'>+	struct dc *dc,</div><div class='add'>+	struct pipe_ctx *pipe_ctx);</div><div class='ctx'> void dcn10_pipe_control_lock(</div><div class='ctx'> 	struct dc *dc,</div><div class='ctx'> 	struct pipe_ctx *pipe,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c<br/>index 846c9c51f2d9..858288c3b1ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c</a></div><div class='hunk'>@@ -2053,7 +2053,7 @@ void dcn20_program_front_end_for_ctx(</div><div class='ctx'> 		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 			pipe = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> </div><div class='del'>-			if (!pipe-&gt;top_pipe &amp;&amp; !pipe-&gt;prev_odm_pipe &amp;&amp; pipe-&gt;plane_state) {</div><div class='add'>+			if (pipe-&gt;plane_state) {</div><div class='ctx'> 				ASSERT(!pipe-&gt;plane_state-&gt;triplebuffer_flips);</div><div class='ctx'> 				/*turn off triple buffer for full update*/</div><div class='ctx'> 				dc-&gt;hwss.program_triplebuffer(</div><div class='hunk'>@@ -2482,7 +2482,7 @@ bool dcn20_update_bandwidth(</div><div class='ctx'> 	struct dce_hwseq *hws = dc-&gt;hwseq;</div><div class='ctx'> </div><div class='ctx'> 	/* recalculate DML parameters */</div><div class='del'>-	if (!dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false))</div><div class='add'>+	if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false) != DC_OK)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* apply updated bandwidth parameters */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c<br/>index be26c925fdfa..e68f21fd5f0f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c</a></div><div class='hunk'>@@ -84,6 +84,20 @@ static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable)</div><div class='ctx'> 		struct dsc_config dsc_cfg;</div><div class='ctx'> 		struct dsc_optc_config dsc_optc_cfg = {0};</div><div class='ctx'> 		enum optc_dsc_mode optc_dsc_mode;</div><div class='add'>+		struct dcn_dsc_state dsc_state = {0};</div><div class='add'>+</div><div class='add'>+		if (!dsc) {</div><div class='add'>+			DC_LOG_DSC("DSC is NULL for tg instance %d:", pipe_ctx-&gt;stream_res.tg-&gt;inst);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (dsc-&gt;funcs-&gt;dsc_read_state) {</div><div class='add'>+			dsc-&gt;funcs-&gt;dsc_read_state(dsc, &amp;dsc_state);</div><div class='add'>+			if (!dsc_state.dsc_fw_en) {</div><div class='add'>+				DC_LOG_DSC("DSC has been disabled for tg instance %d:", pipe_ctx-&gt;stream_res.tg-&gt;inst);</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Enable DSC hw block */</div><div class='ctx'> 		dsc_cfg.pic_width = (stream-&gt;timing.h_addressable + stream-&gt;timing.h_border_left + stream-&gt;timing.h_border_right) / opp_cnt;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c<br/>index cd0adf72b223..a0b05b9ef660 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c</a></div><div class='hunk'>@@ -1181,6 +1181,7 @@ unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsign</div><div class='ctx'> 	struct dc_stream_state *stream = pipe_ctx-&gt;stream;</div><div class='ctx'> 	unsigned int odm_combine_factor = 0;</div><div class='ctx'> 	bool two_pix_per_container = false;</div><div class='add'>+	struct dce_hwseq *hws = stream-&gt;ctx-&gt;dc-&gt;hwseq;</div><div class='ctx'> </div><div class='ctx'> 	two_pix_per_container = pipe_ctx-&gt;stream_res.tg-&gt;funcs-&gt;is_two_pixels_per_container(&amp;stream-&gt;timing);</div><div class='ctx'> 	odm_combine_factor = get_odm_config(pipe_ctx, NULL);</div><div class='hunk'>@@ -1201,7 +1202,8 @@ unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsign</div><div class='ctx'> 		} else {</div><div class='ctx'> 			*k1_div = PIXEL_RATE_DIV_BY_1;</div><div class='ctx'> 			*k2_div = PIXEL_RATE_DIV_BY_4;</div><div class='del'>-			if ((odm_combine_factor == 2) || dcn32_is_dp_dig_pixel_rate_div_policy(pipe_ctx))</div><div class='add'>+			if ((odm_combine_factor == 2) || (hws-&gt;funcs.is_dp_dig_pixel_rate_div_policy &amp;&amp;</div><div class='add'>+				hws-&gt;funcs.is_dp_dig_pixel_rate_div_policy(pipe_ctx)))</div><div class='ctx'> 				*k2_div = PIXEL_RATE_DIV_BY_2;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c<br/>index 922b8d71cf1a..c814d957305a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c</a></div><div class='hunk'>@@ -241,11 +241,6 @@ void dcn35_init_hw(struct dc *dc)</div><div class='ctx'> 			dc-&gt;res_pool-&gt;hubbub-&gt;funcs-&gt;allow_self_refresh_control(dc-&gt;res_pool-&gt;hubbub,</div><div class='ctx'> 					!dc-&gt;res_pool-&gt;hubbub-&gt;ctx-&gt;dc-&gt;debug.disable_stutter);</div><div class='ctx'> 	}</div><div class='del'>-	if (res_pool-&gt;dccg-&gt;funcs-&gt;dccg_root_gate_disable_control) {</div><div class='del'>-		for (i = 0; i &lt; res_pool-&gt;pipe_count; i++)</div><div class='del'>-			res_pool-&gt;dccg-&gt;funcs-&gt;dccg_root_gate_disable_control(res_pool-&gt;dccg, i, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; res_pool-&gt;audio_count; i++) {</div><div class='ctx'> 		struct audio *audio = res_pool-&gt;audios[i];</div><div class='ctx'> </div><div class='hunk'>@@ -901,12 +896,18 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context)</div><div class='ctx'> void dcn35_enable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 			       struct dc_state *context)</div><div class='ctx'> {</div><div class='add'>+	struct dpp *dpp = pipe_ctx-&gt;plane_res.dpp;</div><div class='add'>+	struct dccg *dccg = dc-&gt;res_pool-&gt;dccg;</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> 	/* enable DCFCLK current DCHUB */</div><div class='ctx'> 	pipe_ctx-&gt;plane_res.hubp-&gt;funcs-&gt;hubp_clk_cntl(pipe_ctx-&gt;plane_res.hubp, true);</div><div class='ctx'> </div><div class='ctx'> 	/* initialize HUBP on power up */</div><div class='ctx'> 	pipe_ctx-&gt;plane_res.hubp-&gt;funcs-&gt;hubp_init(pipe_ctx-&gt;plane_res.hubp);</div><div class='del'>-</div><div class='add'>+	/*make sure DPPCLK is on*/</div><div class='add'>+	dccg-&gt;funcs-&gt;dccg_root_gate_disable_control(dccg, dpp-&gt;inst, true);</div><div class='add'>+	dpp-&gt;funcs-&gt;dpp_dppclk_control(dpp, false, true);</div><div class='ctx'> 	/* make sure OPP_PIPE_CLOCK_EN = 1 */</div><div class='ctx'> 	pipe_ctx-&gt;stream_res.opp-&gt;funcs-&gt;opp_pipe_clock_control(</div><div class='ctx'> 			pipe_ctx-&gt;stream_res.opp,</div><div class='hunk'>@@ -923,6 +924,7 @@ void dcn35_enable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 		// Program system aperture settings</div><div class='ctx'> 		pipe_ctx-&gt;plane_res.hubp-&gt;funcs-&gt;hubp_set_vm_system_aperture_settings(pipe_ctx-&gt;plane_res.hubp, &amp;apt);</div><div class='ctx'> 	}</div><div class='add'>+	//DC_LOG_DEBUG("%s: dpp_inst(%d) =\n", __func__, dpp-&gt;inst);</div><div class='ctx'> </div><div class='ctx'> 	if (!pipe_ctx-&gt;top_pipe</div><div class='ctx'> 		&amp;&amp; pipe_ctx-&gt;plane_state</div><div class='hunk'>@@ -938,6 +940,8 @@ void dcn35_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct hubp *hubp = pipe_ctx-&gt;plane_res.hubp;</div><div class='ctx'> 	struct dpp *dpp = pipe_ctx-&gt;plane_res.dpp;</div><div class='add'>+	struct dccg *dccg = dc-&gt;res_pool-&gt;dccg;</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	dc-&gt;hwss.wait_for_mpcc_disconnect(dc, dc-&gt;res_pool, pipe_ctx);</div><div class='ctx'> </div><div class='hunk'>@@ -955,7 +959,8 @@ void dcn35_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	hubp-&gt;funcs-&gt;hubp_clk_cntl(hubp, false);</div><div class='ctx'> </div><div class='ctx'> 	dpp-&gt;funcs-&gt;dpp_dppclk_control(dpp, false, false);</div><div class='del'>-/*to do, need to support both case*/</div><div class='add'>+	dccg-&gt;funcs-&gt;dccg_root_gate_disable_control(dccg, dpp-&gt;inst, false);</div><div class='add'>+</div><div class='ctx'> 	hubp-&gt;power_gated = true;</div><div class='ctx'> </div><div class='ctx'> 	hubp-&gt;funcs-&gt;hubp_reset(hubp);</div><div class='hunk'>@@ -967,6 +972,8 @@ void dcn35_plane_atomic_disable(struct dc *dc, struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	pipe_ctx-&gt;top_pipe = NULL;</div><div class='ctx'> 	pipe_ctx-&gt;bottom_pipe = NULL;</div><div class='ctx'> 	pipe_ctx-&gt;plane_state = NULL;</div><div class='add'>+	//DC_LOG_DEBUG("%s: dpp_inst(%d)=\n", __func__, dpp-&gt;inst);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn35_disable_plane(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx)</div><div class='hunk'>@@ -1543,7 +1550,7 @@ static bool should_avoid_empty_tu(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	struct dc_link_settings *link_settings = &amp;pipe_ctx-&gt;link_config.dp_link_settings;</div><div class='ctx'> 	const struct dc *dc = pipe_ctx-&gt;stream-&gt;link-&gt;dc;</div><div class='ctx'> </div><div class='del'>-	if (pipe_ctx-&gt;stream-&gt;link-&gt;ep_type != DISPLAY_ENDPOINT_USB4_DPIA)</div><div class='add'>+	if (pipe_ctx-&gt;link_config.dp_tunnel_settings.should_enable_dp_tunneling == false)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	// Not necessary for MST configurations</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c<br/>index 6a82a865209c..a3ccf805bd16 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c</a></div><div class='hunk'>@@ -168,6 +168,8 @@ static const struct hwseq_private_funcs dcn35_private_funcs = {</div><div class='ctx'> 	.dsc_pg_control = dcn35_dsc_pg_control,</div><div class='ctx'> 	.dsc_pg_status = dcn32_dsc_pg_status,</div><div class='ctx'> 	.enable_plane = dcn35_enable_plane,</div><div class='add'>+	.wait_for_pipe_update_if_needed = dcn10_wait_for_pipe_update_if_needed,</div><div class='add'>+	.set_wait_for_update_needed_for_pipe = dcn10_set_wait_for_update_needed_for_pipe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void dcn35_hw_sequencer_construct(struct dc *dc)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c<br/>index 902a96940a01..58f2be2a326b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c</a></div><div class='hunk'>@@ -158,10 +158,12 @@ static const struct hwseq_private_funcs dcn351_private_funcs = {</div><div class='ctx'> 	.set_mcm_luts = dcn32_set_mcm_luts,</div><div class='ctx'> 	.setup_hpo_hw_control = dcn35_setup_hpo_hw_control,</div><div class='ctx'> 	.calculate_dccg_k1_k2_values = dcn32_calculate_dccg_k1_k2_values,</div><div class='del'>-	.is_dp_dig_pixel_rate_div_policy = dcn32_is_dp_dig_pixel_rate_div_policy,</div><div class='add'>+	.is_dp_dig_pixel_rate_div_policy = dcn35_is_dp_dig_pixel_rate_div_policy,</div><div class='ctx'> 	.dsc_pg_control = dcn35_dsc_pg_control,</div><div class='ctx'> 	.dsc_pg_status = dcn32_dsc_pg_status,</div><div class='ctx'> 	.enable_plane = dcn35_enable_plane,</div><div class='add'>+	.wait_for_pipe_update_if_needed = dcn10_wait_for_pipe_update_if_needed,</div><div class='add'>+	.set_wait_for_update_needed_for_pipe = dcn10_set_wait_for_update_needed_for_pipe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void dcn351_hw_sequencer_construct(struct dc *dc)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c<br/>index 5489f3d431f6..c4177a9a662f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c</a></div><div class='hunk'>@@ -396,6 +396,249 @@ static void dcn401_get_mcm_lut_xable_from_pipe_ctx(struct dc *dc, struct pipe_ct</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dcn401_set_mcm_location_post_blend(struct dc *dc, struct pipe_ctx *pipe_ctx, bool bPostBlend)</div><div class='add'>+{</div><div class='add'>+	struct mpc *mpc = dc-&gt;res_pool-&gt;mpc;</div><div class='add'>+	int mpcc_id = pipe_ctx-&gt;plane_res.hubp-&gt;inst;</div><div class='add'>+</div><div class='add'>+	if (!pipe_ctx-&gt;plane_state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mpc-&gt;funcs-&gt;set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id);</div><div class='add'>+	pipe_ctx-&gt;plane_state-&gt;mcm_location = (bPostBlend) ?</div><div class='add'>+											MPCC_MOVABLE_CM_LOCATION_AFTER :</div><div class='add'>+											MPCC_MOVABLE_CM_LOCATION_BEFORE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dc_get_lut_mode(</div><div class='add'>+	enum dc_cm2_gpu_mem_layout layout,</div><div class='add'>+	enum hubp_3dlut_fl_mode *mode,</div><div class='add'>+	enum hubp_3dlut_fl_addressing_mode *addr_mode)</div><div class='add'>+{</div><div class='add'>+	switch (layout) {</div><div class='add'>+	case DC_CM2_GPU_MEM_LAYOUT_3D_SWIZZLE_LINEAR_RGB:</div><div class='add'>+		*mode = hubp_3dlut_fl_mode_native_1;</div><div class='add'>+		*addr_mode = hubp_3dlut_fl_addressing_mode_sw_linear;</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_GPU_MEM_LAYOUT_3D_SWIZZLE_LINEAR_BGR:</div><div class='add'>+		*mode = hubp_3dlut_fl_mode_native_2;</div><div class='add'>+		*addr_mode = hubp_3dlut_fl_addressing_mode_sw_linear;</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_GPU_MEM_LAYOUT_1D_PACKED_LINEAR:</div><div class='add'>+		*mode = hubp_3dlut_fl_mode_transform;</div><div class='add'>+		*addr_mode = hubp_3dlut_fl_addressing_mode_simple_linear;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*mode = hubp_3dlut_fl_mode_disable;</div><div class='add'>+		*addr_mode = hubp_3dlut_fl_addressing_mode_sw_linear;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dc_get_lut_format(</div><div class='add'>+	enum dc_cm2_gpu_mem_format dc_format,</div><div class='add'>+	enum hubp_3dlut_fl_format *format)</div><div class='add'>+{</div><div class='add'>+	switch (dc_format) {</div><div class='add'>+	case DC_CM2_GPU_MEM_FORMAT_16161616_UNORM_12MSB:</div><div class='add'>+		*format = hubp_3dlut_fl_format_unorm_12msb_bitslice;</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_GPU_MEM_FORMAT_16161616_UNORM_12LSB:</div><div class='add'>+		*format = hubp_3dlut_fl_format_unorm_12lsb_bitslice;</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_GPU_MEM_FORMAT_16161616_FLOAT_FP1_5_10:</div><div class='add'>+		*format = hubp_3dlut_fl_format_float_fp1_5_10;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dc_get_lut_xbar(</div><div class='add'>+	enum dc_cm2_gpu_mem_pixel_component_order order,</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice *cr_r,</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice *y_g,</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice *cb_b)</div><div class='add'>+{</div><div class='add'>+	switch (order) {</div><div class='add'>+	case DC_CM2_GPU_MEM_PIXEL_COMPONENT_ORDER_RGBA:</div><div class='add'>+		*cr_r = hubp_3dlut_fl_crossbar_bit_slice_32_47;</div><div class='add'>+		*y_g = hubp_3dlut_fl_crossbar_bit_slice_16_31;</div><div class='add'>+		*cb_b =  hubp_3dlut_fl_crossbar_bit_slice_0_15;</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_GPU_MEM_PIXEL_COMPONENT_ORDER_BGRA:</div><div class='add'>+		*cr_r = hubp_3dlut_fl_crossbar_bit_slice_0_15;</div><div class='add'>+		*y_g = hubp_3dlut_fl_crossbar_bit_slice_16_31;</div><div class='add'>+		*cb_b = hubp_3dlut_fl_crossbar_bit_slice_32_47;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dc_get_lut_width(</div><div class='add'>+	enum dc_cm2_gpu_mem_size  size,</div><div class='add'>+	enum hubp_3dlut_fl_width *width)</div><div class='add'>+{</div><div class='add'>+	switch (size) {</div><div class='add'>+	case DC_CM2_GPU_MEM_SIZE_333333:</div><div class='add'>+		*width = hubp_3dlut_fl_width_33;</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_GPU_MEM_SIZE_171717:</div><div class='add'>+		*width = hubp_3dlut_fl_width_17;</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_GPU_MEM_SIZE_TRANSFORMED:</div><div class='add'>+		*width = hubp_3dlut_fl_width_transformed;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+static bool dc_is_rmcm_3dlut_supported(struct hubp *hubp, struct mpc *mpc)</div><div class='add'>+{</div><div class='add'>+	if (mpc-&gt;funcs-&gt;rmcm.update_3dlut_fast_load_select &amp;&amp;</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_lut_read_write_control &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_addr &amp;&amp;</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_bit_depth &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_mode &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_addressing_mode &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_format &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_update_3dlut_fl_bias_scale &amp;&amp;</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_bias_scale &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_crossbar &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_width &amp;&amp;</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.update_3dlut_fast_load_select &amp;&amp;</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.populate_lut &amp;&amp;</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_lut_mode &amp;&amp;</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_enable_3dlut_fl &amp;&amp;</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.enable_3dlut_fl)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool dcn401_program_rmcm_luts(</div><div class='add'>+	struct hubp *hubp,</div><div class='add'>+	struct pipe_ctx *pipe_ctx,</div><div class='add'>+	enum dc_cm2_transfer_func_source lut3d_src,</div><div class='add'>+	struct dc_cm2_func_luts *mcm_luts,</div><div class='add'>+	struct mpc *mpc,</div><div class='add'>+	bool lut_bank_a,</div><div class='add'>+	int mpcc_id)</div><div class='add'>+{</div><div class='add'>+	struct dpp *dpp_base = pipe_ctx-&gt;plane_res.dpp;</div><div class='add'>+	union mcm_lut_params m_lut_params;</div><div class='add'>+	enum MCM_LUT_XABLE shaper_xable, lut3d_xable = MCM_LUT_DISABLE, lut1d_xable;</div><div class='add'>+	enum hubp_3dlut_fl_mode mode;</div><div class='add'>+	enum hubp_3dlut_fl_addressing_mode addr_mode;</div><div class='add'>+	enum hubp_3dlut_fl_format format = 0;</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_y_g = 0;</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_cb_b = 0;</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_cr_r = 0;</div><div class='add'>+	enum hubp_3dlut_fl_width width = 0;</div><div class='add'>+	struct dc *dc = hubp-&gt;ctx-&gt;dc;</div><div class='add'>+</div><div class='add'>+	bool bypass_rmcm_3dlut  = false;</div><div class='add'>+	bool bypass_rmcm_shaper = false;</div><div class='add'>+</div><div class='add'>+	dcn401_get_mcm_lut_xable_from_pipe_ctx(dc, pipe_ctx, &amp;shaper_xable, &amp;lut3d_xable, &amp;lut1d_xable);</div><div class='add'>+</div><div class='add'>+	/* 3DLUT */</div><div class='add'>+	switch (lut3d_src) {</div><div class='add'>+	case DC_CM2_TRANSFER_FUNC_SOURCE_SYSMEM:</div><div class='add'>+		memset(&amp;m_lut_params, 0, sizeof(m_lut_params));</div><div class='add'>+		// Don't know what to do in this case.</div><div class='add'>+		//case DC_CM2_TRANSFER_FUNC_SOURCE_SYSMEM:</div><div class='add'>+		break;</div><div class='add'>+	case DC_CM2_TRANSFER_FUNC_SOURCE_VIDMEM:</div><div class='add'>+		dc_get_lut_width(mcm_luts-&gt;lut3d_data.gpu_mem_params.size, &amp;width);</div><div class='add'>+		if (!dc_is_rmcm_3dlut_supported(hubp, mpc) ||</div><div class='add'>+			!mpc-&gt;funcs-&gt;rmcm.is_config_supported(width))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		//0. disable fl on mpc</div><div class='add'>+		mpc-&gt;funcs-&gt;update_3dlut_fast_load_select(mpc, mpcc_id, 0xF);</div><div class='add'>+</div><div class='add'>+		//1. power down the block</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.power_on_shaper_3dlut(mpc, mpcc_id, false);</div><div class='add'>+</div><div class='add'>+		//2. program RMCM</div><div class='add'>+		//2a. 3dlut reg programming</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a,</div><div class='add'>+				(!bypass_rmcm_3dlut) &amp;&amp; lut3d_xable != MCM_LUT_DISABLE, mpcc_id);</div><div class='add'>+</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_addr(hubp,</div><div class='add'>+				mcm_luts-&gt;lut3d_data.gpu_mem_params.addr);</div><div class='add'>+</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_bit_depth(mpc,</div><div class='add'>+				mcm_luts-&gt;lut3d_data.gpu_mem_params.bit_depth, mpcc_id);</div><div class='add'>+</div><div class='add'>+		// setting native or transformed mode,</div><div class='add'>+		dc_get_lut_mode(mcm_luts-&gt;lut3d_data.gpu_mem_params.layout, &amp;mode, &amp;addr_mode);</div><div class='add'>+</div><div class='add'>+		//these program the mcm 3dlut</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_mode(hubp, mode);</div><div class='add'>+</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_addressing_mode(hubp, addr_mode);</div><div class='add'>+</div><div class='add'>+		//seems to be only for the MCM</div><div class='add'>+		dc_get_lut_format(mcm_luts-&gt;lut3d_data.gpu_mem_params.format_params.format, &amp;format);</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_format(hubp, format);</div><div class='add'>+</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_bias_scale(mpc,</div><div class='add'>+			mcm_luts-&gt;lut3d_data.gpu_mem_params.format_params.float_params.bias,</div><div class='add'>+			mcm_luts-&gt;lut3d_data.gpu_mem_params.format_params.float_params.scale,</div><div class='add'>+			mpcc_id);</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_update_3dlut_fl_bias_scale(hubp,</div><div class='add'>+					mcm_luts-&gt;lut3d_data.gpu_mem_params.format_params.float_params.bias,</div><div class='add'>+					mcm_luts-&gt;lut3d_data.gpu_mem_params.format_params.float_params.scale);</div><div class='add'>+</div><div class='add'>+		dc_get_lut_xbar(</div><div class='add'>+			mcm_luts-&gt;lut3d_data.gpu_mem_params.component_order,</div><div class='add'>+			&amp;crossbar_bit_slice_cr_r,</div><div class='add'>+			&amp;crossbar_bit_slice_y_g,</div><div class='add'>+			&amp;crossbar_bit_slice_cb_b);</div><div class='add'>+</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_crossbar(hubp,</div><div class='add'>+			crossbar_bit_slice_cr_r,</div><div class='add'>+			crossbar_bit_slice_y_g,</div><div class='add'>+			crossbar_bit_slice_cb_b);</div><div class='add'>+</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.program_3dlut_size(mpc, width, mpcc_id);</div><div class='add'>+</div><div class='add'>+		mpc-&gt;funcs-&gt;update_3dlut_fast_load_select(mpc, mpcc_id, hubp-&gt;inst);</div><div class='add'>+</div><div class='add'>+		//2b. shaper reg programming</div><div class='add'>+		memset(&amp;m_lut_params, 0, sizeof(m_lut_params));</div><div class='add'>+</div><div class='add'>+		if (mcm_luts-&gt;shaper-&gt;type == TF_TYPE_HWPWL) {</div><div class='add'>+			m_lut_params.pwl = &amp;mcm_luts-&gt;shaper-&gt;pwl;</div><div class='add'>+		} else if (mcm_luts-&gt;shaper-&gt;type == TF_TYPE_DISTRIBUTED_POINTS) {</div><div class='add'>+			ASSERT(false);</div><div class='add'>+			cm_helper_translate_curve_to_hw_format(</div><div class='add'>+					dc-&gt;ctx,</div><div class='add'>+					mcm_luts-&gt;shaper,</div><div class='add'>+					&amp;dpp_base-&gt;regamma_params, true);</div><div class='add'>+			m_lut_params.pwl = &amp;dpp_base-&gt;regamma_params;</div><div class='add'>+		}</div><div class='add'>+		if (m_lut_params.pwl) {</div><div class='add'>+			mpc-&gt;funcs-&gt;rmcm.populate_lut(mpc, m_lut_params, lut_bank_a, mpcc_id);</div><div class='add'>+			mpc-&gt;funcs-&gt;rmcm.program_lut_mode(mpc, !bypass_rmcm_shaper, lut_bank_a, mpcc_id);</div><div class='add'>+		} else {</div><div class='add'>+			//RMCM 3dlut won't work without its shaper</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		//3. Select the hubp connected to this RMCM</div><div class='add'>+		hubp-&gt;funcs-&gt;hubp_enable_3dlut_fl(hubp, true);</div><div class='add'>+		mpc-&gt;funcs-&gt;rmcm.enable_3dlut_fl(mpc, true, mpcc_id);</div><div class='add'>+</div><div class='add'>+		//4. power on the block</div><div class='add'>+		if (m_lut_params.pwl)</div><div class='add'>+			mpc-&gt;funcs-&gt;rmcm.power_on_shaper_3dlut(mpc, mpcc_id, true);</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 		struct dc_cm2_func_luts mcm_luts,</div><div class='hunk'>@@ -407,21 +650,39 @@ void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> 	struct mpc *mpc = dc-&gt;res_pool-&gt;mpc;</div><div class='ctx'> 	union mcm_lut_params m_lut_params;</div><div class='ctx'> 	enum dc_cm2_transfer_func_source lut3d_src = mcm_luts.lut3d_data.lut3d_src;</div><div class='del'>-	enum hubp_3dlut_fl_format format;</div><div class='add'>+	enum hubp_3dlut_fl_format format = 0;</div><div class='ctx'> 	enum hubp_3dlut_fl_mode mode;</div><div class='del'>-	enum hubp_3dlut_fl_width width;</div><div class='add'>+	enum hubp_3dlut_fl_width width = 0;</div><div class='ctx'> 	enum hubp_3dlut_fl_addressing_mode addr_mode;</div><div class='del'>-	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_y_g;</div><div class='del'>-	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_cb_b;</div><div class='del'>-	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_cr_r;</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_y_g = 0;</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_cb_b = 0;</div><div class='add'>+	enum hubp_3dlut_fl_crossbar_bit_slice crossbar_bit_slice_cr_r = 0;</div><div class='ctx'> 	enum MCM_LUT_XABLE shaper_xable = MCM_LUT_DISABLE;</div><div class='ctx'> 	enum MCM_LUT_XABLE lut3d_xable = MCM_LUT_DISABLE;</div><div class='ctx'> 	enum MCM_LUT_XABLE lut1d_xable = MCM_LUT_DISABLE;</div><div class='del'>-	bool is_17x17x17 = true;</div><div class='ctx'> 	bool rval;</div><div class='ctx'> </div><div class='ctx'> 	dcn401_get_mcm_lut_xable_from_pipe_ctx(dc, pipe_ctx, &amp;shaper_xable, &amp;lut3d_xable, &amp;lut1d_xable);</div><div class='ctx'> </div><div class='add'>+	//MCM - setting its location (Before/After) blender</div><div class='add'>+	//set to post blend (true)</div><div class='add'>+	dcn401_set_mcm_location_post_blend(</div><div class='add'>+		dc,</div><div class='add'>+		pipe_ctx,</div><div class='add'>+		mcm_luts.lut3d_data.mpc_mcm_post_blend);</div><div class='add'>+</div><div class='add'>+	//RMCM - 3dLUT+Shaper</div><div class='add'>+	if (mcm_luts.lut3d_data.rmcm_3dlut_enable) {</div><div class='add'>+		dcn401_program_rmcm_luts(</div><div class='add'>+			hubp,</div><div class='add'>+			pipe_ctx,</div><div class='add'>+			lut3d_src,</div><div class='add'>+			&amp;mcm_luts,</div><div class='add'>+			mpc,</div><div class='add'>+			lut_bank_a,</div><div class='add'>+			mpcc_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* 1D LUT */</div><div class='ctx'> 	if (mcm_luts.lut1d_func) {</div><div class='ctx'> 		memset(&amp;m_lut_params, 0, sizeof(m_lut_params));</div><div class='hunk'>@@ -442,7 +703,7 @@ void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Shaper */</div><div class='del'>-	if (mcm_luts.shaper) {</div><div class='add'>+	if (mcm_luts.shaper &amp;&amp; mcm_luts.lut3d_data.mpc_3dlut_enable) {</div><div class='ctx'> 		memset(&amp;m_lut_params, 0, sizeof(m_lut_params));</div><div class='ctx'> 		if (mcm_luts.shaper-&gt;type == TF_TYPE_HWPWL)</div><div class='ctx'> 			m_lut_params.pwl = &amp;mcm_luts.shaper-&gt;pwl;</div><div class='hunk'>@@ -454,11 +715,11 @@ void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> 			m_lut_params.pwl = rval ? &amp;dpp_base-&gt;regamma_params : NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (m_lut_params.pwl) {</div><div class='del'>-			if (mpc-&gt;funcs-&gt;populate_lut)</div><div class='del'>-				mpc-&gt;funcs-&gt;populate_lut(mpc, MCM_LUT_SHAPER, m_lut_params, lut_bank_a, mpcc_id);</div><div class='add'>+			if (mpc-&gt;funcs-&gt;mcm.populate_lut)</div><div class='add'>+				mpc-&gt;funcs-&gt;mcm.populate_lut(mpc, m_lut_params, lut_bank_a, mpcc_id);</div><div class='add'>+			if (mpc-&gt;funcs-&gt;program_lut_mode)</div><div class='add'>+				mpc-&gt;funcs-&gt;program_lut_mode(mpc, MCM_LUT_SHAPER, MCM_LUT_ENABLE, lut_bank_a, mpcc_id);</div><div class='ctx'> 		}</div><div class='del'>-		if (mpc-&gt;funcs-&gt;program_lut_mode)</div><div class='del'>-			mpc-&gt;funcs-&gt;program_lut_mode(mpc, MCM_LUT_SHAPER, shaper_xable, lut_bank_a, mpcc_id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* 3DLUT */</div><div class='hunk'>@@ -467,6 +728,7 @@ void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> 		memset(&amp;m_lut_params, 0, sizeof(m_lut_params));</div><div class='ctx'> 		if (hubp-&gt;funcs-&gt;hubp_enable_3dlut_fl)</div><div class='ctx'> 			hubp-&gt;funcs-&gt;hubp_enable_3dlut_fl(hubp, false);</div><div class='add'>+</div><div class='ctx'> 		if (mcm_luts.lut3d_data.lut3d_func &amp;&amp; mcm_luts.lut3d_data.lut3d_func-&gt;state.bits.initialized) {</div><div class='ctx'> 			m_lut_params.lut3d = &amp;mcm_luts.lut3d_data.lut3d_func-&gt;lut_3d;</div><div class='ctx'> 			if (mpc-&gt;funcs-&gt;populate_lut)</div><div class='hunk'>@@ -476,16 +738,35 @@ void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> 						mpcc_id);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	case DC_CM2_TRANSFER_FUNC_SOURCE_VIDMEM:</div><div class='add'>+		case DC_CM2_TRANSFER_FUNC_SOURCE_VIDMEM:</div><div class='add'>+		switch (mcm_luts.lut3d_data.gpu_mem_params.size) {</div><div class='add'>+		case DC_CM2_GPU_MEM_SIZE_333333:</div><div class='add'>+			width = hubp_3dlut_fl_width_33;</div><div class='add'>+			break;</div><div class='add'>+		case DC_CM2_GPU_MEM_SIZE_171717:</div><div class='add'>+			width = hubp_3dlut_fl_width_17;</div><div class='add'>+			break;</div><div class='add'>+		case DC_CM2_GPU_MEM_SIZE_TRANSFORMED:</div><div class='add'>+			width = hubp_3dlut_fl_width_transformed;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		//check for support</div><div class='add'>+		if (mpc-&gt;funcs-&gt;mcm.is_config_supported &amp;&amp;</div><div class='add'>+			!mpc-&gt;funcs-&gt;mcm.is_config_supported(width))</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='ctx'> 		if (mpc-&gt;funcs-&gt;program_lut_read_write_control)</div><div class='ctx'> 			mpc-&gt;funcs-&gt;program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a, mpcc_id);</div><div class='ctx'> 		if (mpc-&gt;funcs-&gt;program_lut_mode)</div><div class='ctx'> 			mpc-&gt;funcs-&gt;program_lut_mode(mpc, MCM_LUT_3DLUT, lut3d_xable, lut_bank_a, mpcc_id);</div><div class='del'>-		if (mpc-&gt;funcs-&gt;program_3dlut_size)</div><div class='del'>-			mpc-&gt;funcs-&gt;program_3dlut_size(mpc, is_17x17x17, mpcc_id);</div><div class='add'>+</div><div class='ctx'> 		if (hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_addr)</div><div class='ctx'> 			hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_addr(hubp, mcm_luts.lut3d_data.gpu_mem_params.addr);</div><div class='add'>+</div><div class='add'>+		if (mpc-&gt;funcs-&gt;mcm.program_bit_depth)</div><div class='add'>+			mpc-&gt;funcs-&gt;mcm.program_bit_depth(mpc, mcm_luts.lut3d_data.gpu_mem_params.bit_depth, mpcc_id);</div><div class='add'>+</div><div class='ctx'> 		switch (mcm_luts.lut3d_data.gpu_mem_params.layout) {</div><div class='ctx'> 		case DC_CM2_GPU_MEM_LAYOUT_3D_SWIZZLE_LINEAR_RGB:</div><div class='ctx'> 			mode = hubp_3dlut_fl_mode_native_1;</div><div class='hunk'>@@ -512,7 +793,6 @@ void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> </div><div class='ctx'> 		switch (mcm_luts.lut3d_data.gpu_mem_params.format_params.format) {</div><div class='ctx'> 		case DC_CM2_GPU_MEM_FORMAT_16161616_UNORM_12MSB:</div><div class='del'>-		default:</div><div class='ctx'> 			format = hubp_3dlut_fl_format_unorm_12msb_bitslice;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case DC_CM2_GPU_MEM_FORMAT_16161616_UNORM_12LSB:</div><div class='hunk'>@@ -524,37 +804,37 @@ void dcn401_populate_mcm_luts(struct dc *dc,</div><div class='ctx'> 		}</div><div class='ctx'> 		if (hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_format)</div><div class='ctx'> 			hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_format(hubp, format);</div><div class='del'>-		if (hubp-&gt;funcs-&gt;hubp_update_3dlut_fl_bias_scale)</div><div class='add'>+		if (hubp-&gt;funcs-&gt;hubp_update_3dlut_fl_bias_scale &amp;&amp;</div><div class='add'>+				mpc-&gt;funcs-&gt;mcm.program_bias_scale) {</div><div class='add'>+			mpc-&gt;funcs-&gt;mcm.program_bias_scale(mpc,</div><div class='add'>+				mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.bias,</div><div class='add'>+				mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.scale,</div><div class='add'>+				mpcc_id);</div><div class='ctx'> 			hubp-&gt;funcs-&gt;hubp_update_3dlut_fl_bias_scale(hubp,</div><div class='del'>-					mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.bias,</div><div class='del'>-					mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.scale);</div><div class='del'>-</div><div class='del'>-		switch (mcm_luts.lut3d_data.gpu_mem_params.component_order) {</div><div class='del'>-		case DC_CM2_GPU_MEM_PIXEL_COMPONENT_ORDER_RGBA:</div><div class='del'>-		default:</div><div class='del'>-			crossbar_bit_slice_cr_r = hubp_3dlut_fl_crossbar_bit_slice_0_15;</div><div class='del'>-			crossbar_bit_slice_y_g = hubp_3dlut_fl_crossbar_bit_slice_16_31;</div><div class='del'>-			crossbar_bit_slice_cb_b = hubp_3dlut_fl_crossbar_bit_slice_32_47;</div><div class='del'>-			break;</div><div class='add'>+						mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.bias,</div><div class='add'>+						mcm_luts.lut3d_data.gpu_mem_params.format_params.float_params.scale);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		//navi 4x has a bug and r and blue are swapped and need to be worked around here in</div><div class='add'>+		//TODO: need to make a method for get_xbar per asic OR do the workaround in program_crossbar for 4x</div><div class='add'>+		dc_get_lut_xbar(</div><div class='add'>+			mcm_luts.lut3d_data.gpu_mem_params.component_order,</div><div class='add'>+			&amp;crossbar_bit_slice_cr_r,</div><div class='add'>+			&amp;crossbar_bit_slice_y_g,</div><div class='add'>+			&amp;crossbar_bit_slice_cb_b);</div><div class='add'>+</div><div class='ctx'> 		if (hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_crossbar)</div><div class='ctx'> 			hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_crossbar(hubp,</div><div class='add'>+					crossbar_bit_slice_cr_r,</div><div class='ctx'> 					crossbar_bit_slice_y_g,</div><div class='del'>-					crossbar_bit_slice_cb_b,</div><div class='del'>-					crossbar_bit_slice_cr_r);</div><div class='add'>+					crossbar_bit_slice_cb_b);</div><div class='add'>+</div><div class='add'>+		if (mpc-&gt;funcs-&gt;mcm.program_lut_read_write_control)</div><div class='add'>+			mpc-&gt;funcs-&gt;mcm.program_lut_read_write_control(mpc, MCM_LUT_3DLUT, lut_bank_a, true, mpcc_id);</div><div class='add'>+</div><div class='add'>+		if (mpc-&gt;funcs-&gt;mcm.program_3dlut_size)</div><div class='add'>+			mpc-&gt;funcs-&gt;mcm.program_3dlut_size(mpc, width, mpcc_id);</div><div class='ctx'> </div><div class='del'>-		switch (mcm_luts.lut3d_data.gpu_mem_params.size) {</div><div class='del'>-		case DC_CM2_GPU_MEM_SIZE_171717:</div><div class='del'>-		default:</div><div class='del'>-			width = hubp_3dlut_fl_width_17;</div><div class='del'>-			break;</div><div class='del'>-		case DC_CM2_GPU_MEM_SIZE_TRANSFORMED:</div><div class='del'>-			width = hubp_3dlut_fl_width_transformed;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_width)</div><div class='del'>-			hubp-&gt;funcs-&gt;hubp_program_3dlut_fl_width(hubp, width);</div><div class='ctx'> 		if (mpc-&gt;funcs-&gt;update_3dlut_fast_load_select)</div><div class='ctx'> 			mpc-&gt;funcs-&gt;update_3dlut_fast_load_select(mpc, mpcc_id, hubp-&gt;inst);</div><div class='ctx'> </div><div class='hunk'>@@ -1980,9 +2260,9 @@ void dcn401_program_pipe(</div><div class='ctx'> 				dc-&gt;res_pool-&gt;hubbub, pipe_ctx-&gt;plane_res.hubp-&gt;inst, pipe_ctx-&gt;hubp_regs.det_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pipe_ctx-&gt;update_flags.raw ||</div><div class='del'>-		(pipe_ctx-&gt;plane_state &amp;&amp; pipe_ctx-&gt;plane_state-&gt;update_flags.raw) ||</div><div class='del'>-		pipe_ctx-&gt;stream-&gt;update_flags.raw)</div><div class='add'>+	if (pipe_ctx-&gt;plane_state &amp;&amp; (pipe_ctx-&gt;update_flags.raw ||</div><div class='add'>+	    pipe_ctx-&gt;plane_state-&gt;update_flags.raw ||</div><div class='add'>+	    pipe_ctx-&gt;stream-&gt;update_flags.raw))</div><div class='ctx'> 		dc-&gt;hwss.update_dchubp_dpp(dc, pipe_ctx, context);</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_ctx-&gt;plane_state &amp;&amp; (pipe_ctx-&gt;update_flags.bits.enable ||</div><div class='hunk'>@@ -2081,7 +2361,7 @@ void dcn401_program_front_end_for_ctx(</div><div class='ctx'> 		for (i = 0; i &lt; dc-&gt;res_pool-&gt;pipe_count; i++) {</div><div class='ctx'> 			pipe = &amp;context-&gt;res_ctx.pipe_ctx[i];</div><div class='ctx'> </div><div class='del'>-			if (!pipe-&gt;top_pipe &amp;&amp; !pipe-&gt;prev_odm_pipe &amp;&amp; pipe-&gt;plane_state) {</div><div class='add'>+			if (pipe-&gt;plane_state) {</div><div class='ctx'> 				if (pipe-&gt;plane_state-&gt;triplebuffer_flips)</div><div class='ctx'> 					BREAK_TO_DEBUGGER();</div><div class='ctx'> </div><div class='hunk'>@@ -2371,7 +2651,7 @@ bool dcn401_update_bandwidth(</div><div class='ctx'> 	struct dce_hwseq *hws = dc-&gt;hwseq;</div><div class='ctx'> </div><div class='ctx'> 	/* recalculate DML parameters */</div><div class='del'>-	if (!dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false))</div><div class='add'>+	if (dc-&gt;res_pool-&gt;funcs-&gt;validate_bandwidth(dc, context, false) != DC_OK)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* apply updated bandwidth parameters */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h<br/>index 781cf0efccc6..ce65b4f6c672 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h</a></div><div class='hunk'>@@ -109,4 +109,12 @@ void dcn401_detect_pipe_changes(</div><div class='ctx'> void dcn401_plane_atomic_power_down(struct dc *dc,</div><div class='ctx'> 		struct dpp *dpp,</div><div class='ctx'> 		struct hubp *hubp);</div><div class='add'>+bool dcn401_program_rmcm_luts(</div><div class='add'>+	struct hubp *hubp,</div><div class='add'>+	struct pipe_ctx *pipe_ctx,</div><div class='add'>+	enum dc_cm2_transfer_func_source lut3d_src,</div><div class='add'>+	struct dc_cm2_func_luts *mcm_luts,</div><div class='add'>+	struct mpc *mpc,</div><div class='add'>+	bool lut_bank_a,</div><div class='add'>+	int mpcc_id);</div><div class='ctx'> #endif /* __DC_HWSS_DCN401_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h<br/>index c8b5ed834579..3a0795045bc6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h</a></div><div class='hunk'>@@ -195,6 +195,8 @@ enum block_sequence_func {</div><div class='ctx'> 	DMUB_SUBVP_SAVE_SURF_ADDR,</div><div class='ctx'> 	HUBP_WAIT_FOR_DCC_META_PROP,</div><div class='ctx'> 	DMUB_FAMS2_GLOBAL_CONTROL_LOCK_FAST,</div><div class='add'>+	/* This must be the last value in this enum, add new ones above */</div><div class='add'>+	HWSS_BLOCK_SEQUENCE_FUNC_COUNT</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct block_sequence {</div><div class='hunk'>@@ -202,6 +204,8 @@ struct block_sequence {</div><div class='ctx'> 	enum block_sequence_func func;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define MAX_HWSS_BLOCK_SEQUENCE_SIZE (HWSS_BLOCK_SEQUENCE_FUNC_COUNT * MAX_PIPES)</div><div class='add'>+</div><div class='ctx'> struct hw_sequencer_funcs {</div><div class='ctx'> 	void (*hardware_release)(struct dc *dc);</div><div class='ctx'> 	/* Embedded Display Related */</div><div class='hunk'>@@ -534,13 +538,13 @@ void set_drr_and_clear_adjust_pending(</div><div class='ctx'> 		struct drr_params *params);</div><div class='ctx'> </div><div class='ctx'> void hwss_execute_sequence(struct dc *dc,</div><div class='del'>-		struct block_sequence block_sequence[],</div><div class='add'>+		struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE],</div><div class='ctx'> 		int num_steps);</div><div class='ctx'> </div><div class='ctx'> void hwss_build_fast_sequence(struct dc *dc,</div><div class='ctx'> 		struct dc_dmub_cmd *dc_dmub_cmd,</div><div class='ctx'> 		unsigned int dmub_cmd_count,</div><div class='del'>-		struct block_sequence block_sequence[],</div><div class='add'>+		struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE],</div><div class='ctx'> 		unsigned int *num_steps,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx,</div><div class='ctx'> 		struct dc_stream_status *stream_status,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h b/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h<br/>index 22a5d4a03c98..09bc65c2fa23 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h</a></div><div class='hunk'>@@ -183,6 +183,8 @@ struct hwseq_private_funcs {</div><div class='ctx'> 			struct dc_cm2_func_luts mcm_luts,</div><div class='ctx'> 			bool lut_bank_a);</div><div class='ctx'> 	void (*perform_3dlut_wa_unlock)(struct pipe_ctx *pipe_ctx);</div><div class='add'>+	void (*wait_for_pipe_update_if_needed)(struct dc *dc, struct pipe_ctx *pipe_ctx, bool is_surface_update_only);</div><div class='add'>+	void (*set_wait_for_update_needed_for_pipe)(struct dc *dc, struct pipe_ctx *pipe_ctx);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dce_hwseq {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_status.h b/drivers/gpu/drm/amd/display/dc/inc/core_status.h<br/>index b5afd8c3103d..f3696143590c 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/core_status.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/core_status.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/core_status.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/core_status.h</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> #ifndef _CORE_STATUS_H_</div><div class='ctx'> #define _CORE_STATUS_H_</div><div class='ctx'> </div><div class='add'>+#include "dc_hw_types.h"</div><div class='add'>+</div><div class='ctx'> enum dc_status {</div><div class='ctx'> 	DC_OK = 1,</div><div class='ctx'> </div><div class='hunk'>@@ -56,6 +58,7 @@ enum dc_status {</div><div class='ctx'> 	DC_NO_LINK_ENC_RESOURCE = 26,</div><div class='ctx'> 	DC_FAIL_DP_PAYLOAD_ALLOCATION = 27,</div><div class='ctx'> 	DC_FAIL_DP_LINK_BANDWIDTH = 28,</div><div class='add'>+	DC_FAIL_HW_CURSOR_SUPPORT = 29,</div><div class='ctx'> 	DC_ERROR_UNEXPECTED = -1</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h<br/>index d0021f25f3d8..0cf349cafb3e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/core_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/core_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/core_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/core_types.h</a></div><div class='hunk'>@@ -65,6 +65,7 @@ struct resource_pool;</div><div class='ctx'> struct dc_state;</div><div class='ctx'> struct resource_context;</div><div class='ctx'> struct clk_bw_params;</div><div class='add'>+struct dc_mcache_params;</div><div class='ctx'> </div><div class='ctx'> struct resource_funcs {</div><div class='ctx'> 	enum engine_id (*get_preferred_eng_id_dpia)(unsigned int dpia_index);</div><div class='hunk'>@@ -78,8 +79,7 @@ struct resource_funcs {</div><div class='ctx'> 	/* Create a minimal link encoder object with no dc_link object</div><div class='ctx'> 	 * associated with it. */</div><div class='ctx'> 	struct link_encoder *(*link_enc_create_minimal)(struct dc_context *ctx, enum engine_id eng_id);</div><div class='del'>-</div><div class='del'>-	bool (*validate_bandwidth)(</div><div class='add'>+	enum dc_status (*validate_bandwidth)(</div><div class='ctx'> 					struct dc *dc,</div><div class='ctx'> 					struct dc_state *context,</div><div class='ctx'> 					bool fast_validate);</div><div class='hunk'>@@ -218,6 +218,11 @@ struct resource_funcs {</div><div class='ctx'> 	int (*get_power_profile)(const struct dc_state *context);</div><div class='ctx'> 	unsigned int (*get_det_buffer_size)(const struct dc_state *context);</div><div class='ctx'> 	unsigned int (*get_vstartup_for_pipe)(struct pipe_ctx *pipe_ctx);</div><div class='add'>+	unsigned int (*get_max_hw_cursor_size)(const struct dc *dc,</div><div class='add'>+			struct dc_state *state,</div><div class='add'>+			const struct dc_stream_state *stream);</div><div class='add'>+	bool (*program_mcache_pipe_config)(struct dc_state *context,</div><div class='add'>+		const struct dc_mcache_params *mcache_params);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct audio_support{</div><div class='hunk'>@@ -382,7 +387,9 @@ struct link_resource {</div><div class='ctx'> </div><div class='ctx'> struct link_config {</div><div class='ctx'> 	struct dc_link_settings dp_link_settings;</div><div class='add'>+	struct dc_tunnel_settings dp_tunnel_settings;</div><div class='ctx'> };</div><div class='add'>+</div><div class='ctx'> union pipe_update_flags {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		uint32_t enable : 1;</div><div class='hunk'>@@ -480,6 +487,10 @@ struct pipe_ctx {</div><div class='ctx'> 	struct pixel_rate_divider pixel_rate_divider;</div><div class='ctx'> 	/* pixels borrowed from hblank to hactive */</div><div class='ctx'> 	uint8_t hblank_borrow;</div><div class='add'>+	/* next vupdate */</div><div class='add'>+	uint32_t next_vupdate;</div><div class='add'>+	uint32_t wait_frame_count;</div><div class='add'>+	bool wait_is_required;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Data used for dynamic link encoder assignment.</div><div class='hunk'>@@ -507,7 +518,7 @@ struct resource_context {</div><div class='ctx'> 	unsigned int hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS];</div><div class='ctx'> 	int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS];</div><div class='ctx'> 	bool is_mpc_3dlut_acquired[MAX_PIPES];</div><div class='del'>-	/* solely used for build scalar data in dml2 */</div><div class='add'>+	/* used to build scalar data in dml2 and for edp backlight programming */</div><div class='ctx'> 	struct pipe_ctx temp_pipe;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -630,7 +641,7 @@ struct dc_state {</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct bw_context bw_ctx;</div><div class='ctx'> </div><div class='del'>-	struct block_sequence block_sequence[100];</div><div class='add'>+	struct block_sequence block_sequence[MAX_HWSS_BLOCK_SEQUENCE_SIZE];</div><div class='ctx'> 	unsigned int block_sequence_steps;</div><div class='ctx'> 	struct dc_dmub_cmd dc_dmub_cmd[10];</div><div class='ctx'> 	unsigned int dmub_cmd_count;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h<br/>index 221645c023b5..bac8febad69a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h</a></div><div class='hunk'>@@ -199,6 +199,7 @@ enum dentist_divider_range {</div><div class='ctx'> 	CLK_SR_DCN35(CLK1_CLK4_ALLOW_DS), \</div><div class='ctx'> 	CLK_SR_DCN35(CLK1_CLK5_ALLOW_DS), \</div><div class='ctx'> 	CLK_SR_DCN35(CLK5_spll_field_8), \</div><div class='add'>+	CLK_SR_DCN35(CLK6_spll_field_8), \</div><div class='ctx'> 	SR(DENTIST_DISPCLK_CNTL), \</div><div class='ctx'> </div><div class='ctx'> #define CLK_COMMON_MASK_SH_LIST_DCN32(mask_sh) \</div><div class='hunk'>@@ -307,7 +308,7 @@ struct clk_mgr_registers {</div><div class='ctx'> 	uint32_t CLK1_CLK4_ALLOW_DS;</div><div class='ctx'> 	uint32_t CLK1_CLK5_ALLOW_DS;</div><div class='ctx'> 	uint32_t CLK5_spll_field_8;</div><div class='del'>-</div><div class='add'>+	uint32_t CLK6_spll_field_8;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct clk_mgr_shift {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h<br/>index 3a89cc0cffc1..6e303b81bfb0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h</a></div><div class='hunk'>@@ -967,23 +967,6 @@ struct mpc_funcs {</div><div class='ctx'> 	*/</div><div class='ctx'> </div><div class='ctx'> 	void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx);</div><div class='del'>-	/**</div><div class='del'>-	* @get_3dlut_fast_load_status:</div><div class='del'>-	*</div><div class='del'>-	* Get 3D LUT fast load status and reference them with done, soft_underflow and hard_underflow pointers.</div><div class='del'>-	*</div><div class='del'>-	* Parameters:</div><div class='del'>-	* - [in/out] mpc - MPC context.</div><div class='del'>-	* - [in] mpcc_id</div><div class='del'>-	* - [in/out] done</div><div class='del'>-	* - [in/out] soft_underflow</div><div class='del'>-	* - [in/out] hard_underflow</div><div class='del'>-	*</div><div class='del'>-	* Return:</div><div class='del'>-	*</div><div class='del'>-	* void</div><div class='del'>-	*/</div><div class='del'>-	void (*get_3dlut_fast_load_status)(struct mpc *mpc, int mpcc_id, uint32_t *done, uint32_t *soft_underflow, uint32_t *hard_underflow);</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='ctx'> 	* @populate_lut:</div><div class='hunk'>@@ -1054,6 +1037,35 @@ struct mpc_funcs {</div><div class='ctx'> 	* void</div><div class='ctx'> 	*/</div><div class='ctx'> 	void (*program_3dlut_size)(struct mpc *mpc, bool is_17x17x17, int mpcc_id);</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id);</div><div class='add'>+		void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id);</div><div class='add'>+		void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id);</div><div class='add'>+		bool (*is_config_supported)(uint32_t width);</div><div class='add'>+		void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id,</div><div class='add'>+			bool lut_bank_a, bool enabled, int mpcc_id);</div><div class='add'>+</div><div class='add'>+		void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params,</div><div class='add'>+			bool lut_bank_a, int mpcc_id);</div><div class='add'>+	} mcm;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		void (*enable_3dlut_fl)(struct mpc *mpc, bool enable, int mpcc_id);</div><div class='add'>+		void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx);</div><div class='add'>+		void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id,</div><div class='add'>+			bool lut_bank_a, bool enabled, int mpcc_id);</div><div class='add'>+		void (*program_lut_mode)(struct mpc *mpc, const enum MCM_LUT_XABLE xable,</div><div class='add'>+			bool lut_bank_a, int mpcc_id);</div><div class='add'>+		void (*program_3dlut_size)(struct mpc *mpc, uint32_t width, int mpcc_id);</div><div class='add'>+		void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id);</div><div class='add'>+		void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id);</div><div class='add'>+		bool (*is_config_supported)(uint32_t width);</div><div class='add'>+</div><div class='add'>+		void (*power_on_shaper_3dlut)(struct mpc *mpc, uint32_t mpcc_id, bool power_on);</div><div class='add'>+		void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params,</div><div class='add'>+			bool lut_bank_a, int mpcc_id);</div><div class='add'>+	} rmcm;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h b/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h<br/>index 7f371cbb35cd..0d5a8358a778 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/hw/optc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/hw/optc.h</a></div><div class='hunk'>@@ -68,6 +68,7 @@ struct optc {</div><div class='ctx'> 	int pstate_keepout;</div><div class='ctx'> 	struct dc_crtc_timing orginal_patched_timing;</div><div class='ctx'> 	enum signal_type signal;</div><div class='add'>+	uint32_t max_frame_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void optc1_read_otg_state(struct timing_generator *optc, struct dcn_otg_state *s);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/link.h b/drivers/gpu/drm/amd/display/dc/inc/link.h<br/>index 2948a696ee12..7d16351bba99 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/link.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/link.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/link.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/link.h</a></div><div class='hunk'>@@ -207,6 +207,9 @@ struct link_service {</div><div class='ctx'> 	bool (*dp_decide_link_settings)(</div><div class='ctx'> 		struct dc_stream_state *stream,</div><div class='ctx'> 		struct dc_link_settings *link_setting);</div><div class='add'>+	void (*dp_decide_tunnel_settings)(</div><div class='add'>+		struct dc_stream_state *stream,</div><div class='add'>+		struct dc_tunnel_settings *dp_tunnel_setting);</div><div class='ctx'> 	enum dp_link_encoding (*mst_decide_link_encoding_format)(</div><div class='ctx'> 			const struct dc_link *link);</div><div class='ctx'> 	bool (*edp_decide_link_settings)(struct dc_link *link,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h b/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h<br/>index a402df225a76..26cb1459b743 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/reg_helper.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/reg_helper.h</a></div><div class='hunk'>@@ -508,6 +508,10 @@ uint32_t generic_indirect_reg_update_ex(const struct dc_context *ctx,</div><div class='ctx'> 				initial_val, \</div><div class='ctx'> 				n, __VA_ARGS__)</div><div class='ctx'> </div><div class='add'>+#define IX_REG_SET_SYNC(index, init_value, f1, v1)	\</div><div class='add'>+		IX_REG_SET_N_SYNC(index, 1, init_value, \</div><div class='add'>+				FN(reg, f1), v1)</div><div class='add'>+</div><div class='ctx'> #define IX_REG_SET_2_SYNC(index, init_value, f1, v1, f2, v2)	\</div><div class='ctx'> 		IX_REG_SET_N_SYNC(index, 2, init_value, \</div><div class='ctx'> 				FN(reg, f1), v1,\</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h<br/>index 9458187b834d..a890f581f4e8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/inc/resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/inc/resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/inc/resource.h</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> #define MEMORY_TYPE_MULTIPLIER_CZ 4</div><div class='ctx'> #define MEMORY_TYPE_HBM 2</div><div class='add'>+#define MAX_MCACHES 8</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)-&gt;pipe_idx_syncd) &amp; 0x80)?1:0)</div><div class='hunk'>@@ -65,6 +66,13 @@ struct resource_straps {</div><div class='ctx'> 	uint32_t audio_stream_number;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct dc_mcache_allocations {</div><div class='add'>+	int global_mcache_ids_plane0[MAX_MCACHES + 1];</div><div class='add'>+	int global_mcache_ids_plane1[MAX_MCACHES + 1];</div><div class='add'>+	int global_mcache_ids_mall_plane0[MAX_MCACHES + 1];</div><div class='add'>+	int global_mcache_ids_mall_plane1[MAX_MCACHES + 1];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct resource_create_funcs {</div><div class='ctx'> 	void (*read_dce_straps)(</div><div class='ctx'> 			struct dc_context *ctx, struct resource_straps *straps);</div><div class='hunk'>@@ -628,8 +636,6 @@ enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		struct pipe_ctx *pipe_ctx);</div><div class='ctx'> </div><div class='del'>-bool check_subvp_sw_cursor_fallback_req(const struct dc *dc, struct dc_stream_state *stream);</div><div class='del'>-</div><div class='ctx'> /* Get hw programming parameters container from pipe context</div><div class='ctx'>  * @pipe_ctx: pipe context</div><div class='ctx'>  * @dscl_prog_data: struct to hold programmable hw reg values</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c b/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c<br/>index 953f4a4dacad..33ce470e4c88 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c</a></div><div class='hunk'>@@ -37,36 +37,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "ivsrcid/ivsrcid_vislands30.h"</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c b/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c<br/>index 2c72074310c7..d777b85e70da 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dce60/irq_service_dce60.c</a></div><div class='hunk'>@@ -46,36 +46,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "dc_types.h"</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			DC_HPD1_INT_STATUS,</div><div class='del'>-			DC_HPD1_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		DC_HPD1_INT_CONTROL,</div><div class='del'>-		DC_HPD1_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd1_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='hunk'>@@ -391,5 +364,3 @@ struct irq_service *dal_irq_service_dce60_create(</div><div class='ctx'> 	dce60_irq_construct(irq_service, init_data);</div><div class='ctx'> 	return irq_service;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c b/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c<br/>index 49317934ef4f..3a9163acb49b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dce80/irq_service_dce80.c</a></div><div class='hunk'>@@ -37,36 +37,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "dc_types.h"</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			DC_HPD1_INT_STATUS,</div><div class='del'>-			DC_HPD1_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		DC_HPD1_INT_CONTROL,</div><div class='del'>-		DC_HPD1_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd1_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='hunk'>@@ -303,5 +276,3 @@ struct irq_service *dal_irq_service_dce80_create(</div><div class='ctx'> 	dce80_irq_construct(irq_service, init_data);</div><div class='ctx'> 	return irq_service;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c b/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c<br/>index 9ca28565a9d1..4ce9edd16344 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c</a></div><div class='hunk'>@@ -129,36 +129,9 @@ static enum dc_irq_source to_dal_irq_source_dcn10(struct irq_service *irq_servic</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c b/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c<br/>index 916f0c974637..5847af0e66cb 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c</a></div><div class='hunk'>@@ -130,36 +130,9 @@ static enum dc_irq_source to_dal_irq_source_dcn20(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c b/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c<br/>index 1d61d475d36f..6417011d2246 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c</a></div><div class='hunk'>@@ -80,36 +80,9 @@ static enum dc_irq_source to_dal_irq_source_dcn201(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c b/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c<br/>index 42cdfe6c3538..71d2f065140b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c</a></div><div class='hunk'>@@ -132,36 +132,9 @@ static enum dc_irq_source to_dal_irq_source_dcn21(struct irq_service *irq_servic</div><div class='ctx'> 	return DC_IRQ_SOURCE_INVALID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c b/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c<br/>index a443a8abb1ea..2a4080bdcf6b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c</a></div><div class='hunk'>@@ -139,36 +139,9 @@ static enum dc_irq_source to_dal_irq_source_dcn30(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='hunk'>@@ -447,4 +420,3 @@ struct irq_service *dal_irq_service_dcn30_create(</div><div class='ctx'> 	dcn30_irq_construct(irq_service, init_data);</div><div class='ctx'> 	return irq_service;</div><div class='ctx'> }</div><div class='del'>-</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c b/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c<br/>index 8ffc7e2c681a..624f1ac309f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c</a></div><div class='hunk'>@@ -126,26 +126,9 @@ static enum dc_irq_source to_dal_irq_source_dcn302(struct irq_service *irq_servi</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(struct irq_service *irq_service, const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status = get_reg_field_value(value, HPD0_DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(value, current_status ? 0 : 1, HPD0_DC_HPD_INT_CONTROL, DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 		.set = NULL,</div><div class='del'>-		.ack = hpd_ack</div><div class='add'>+		.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c b/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c<br/>index 262bb8b74b15..137caffae916 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c</a></div><div class='hunk'>@@ -77,26 +77,9 @@ static enum dc_irq_source to_dal_irq_source_dcn303(struct irq_service *irq_servi</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(struct irq_service *irq_service, const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status = get_reg_field_value(value, HPD0_DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(value, current_status ? 0 : 1, HPD0_DC_HPD_INT_CONTROL, DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 		.set = NULL,</div><div class='del'>-		.ack = hpd_ack</div><div class='add'>+		.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c b/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c<br/>index 53e78ae7eecf..921cb167d920 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c</a></div><div class='hunk'>@@ -128,36 +128,9 @@ static enum dc_irq_source to_dal_irq_source_dcn31(struct irq_service *irq_servic</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c b/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c<br/>index e0563e880432..0118fd6e5db0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c</a></div><div class='hunk'>@@ -130,36 +130,9 @@ static enum dc_irq_source to_dal_irq_source_dcn314(struct irq_service *irq_servi</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c b/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c<br/>index 2ef22299101a..adebfc888618 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c</a></div><div class='hunk'>@@ -135,36 +135,9 @@ static enum dc_irq_source to_dal_irq_source_dcn315(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c b/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c<br/>index f0ac0aeeac51..e9e315c75d76 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c</a></div><div class='hunk'>@@ -129,36 +129,9 @@ static enum dc_irq_source to_dal_irq_source_dcn32(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs  = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='hunk'>@@ -191,6 +164,16 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 	.ack = NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct irq_source_info_funcs vline1_irq_info_funcs = {</div><div class='add'>+	.set = NULL,</div><div class='add'>+	.ack = NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct irq_source_info_funcs vline2_irq_info_funcs = {</div><div class='add'>+	.set = NULL,</div><div class='add'>+	.ack = NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #undef BASE_INNER</div><div class='ctx'> #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg</div><div class='ctx'> </div><div class='hunk'>@@ -259,6 +242,13 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 		.funcs = &amp;pflip_irq_info_funcs\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define vblank_int_entry(reg_num)\</div><div class='add'>+	[DC_IRQ_SOURCE_VBLANK1 + reg_num] = {\</div><div class='add'>+		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='add'>+			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_INT_EN,\</div><div class='add'>+			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_EVENT_CLEAR),\</div><div class='add'>+		.funcs = &amp;vblank_irq_info_funcs\</div><div class='add'>+	}</div><div class='ctx'> /* vupdate_no_lock_int_entry maps to DC_IRQ_SOURCE_VUPDATEx, to match semantic</div><div class='ctx'>  * of DCE's DC_IRQ_SOURCE_VUPDATEx.</div><div class='ctx'>  */</div><div class='hunk'>@@ -270,14 +260,6 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 		.funcs = &amp;vupdate_no_lock_irq_info_funcs\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#define vblank_int_entry(reg_num)\</div><div class='del'>-	[DC_IRQ_SOURCE_VBLANK1 + reg_num] = {\</div><div class='del'>-		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='del'>-			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_INT_EN,\</div><div class='del'>-			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_EVENT_CLEAR),\</div><div class='del'>-		.funcs = &amp;vblank_irq_info_funcs\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define vline0_int_entry(reg_num)\</div><div class='ctx'> 	[DC_IRQ_SOURCE_DC1_VLINE0 + reg_num] = {\</div><div class='ctx'> 		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='hunk'>@@ -285,6 +267,20 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 			OTG_VERTICAL_INTERRUPT0_CONTROL, OTG_VERTICAL_INTERRUPT0_CLEAR),\</div><div class='ctx'> 		.funcs = &amp;vline0_irq_info_funcs\</div><div class='ctx'> 	}</div><div class='add'>+#define vline1_int_entry(reg_num)\</div><div class='add'>+	[DC_IRQ_SOURCE_DC1_VLINE1 + reg_num] = {\</div><div class='add'>+		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT1_CONTROL, OTG_VERTICAL_INTERRUPT1_INT_ENABLE,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT1_CONTROL, OTG_VERTICAL_INTERRUPT1_CLEAR),\</div><div class='add'>+		.funcs = &amp;vline1_irq_info_funcs\</div><div class='add'>+	}</div><div class='add'>+#define vline2_int_entry(reg_num)\</div><div class='add'>+	[DC_IRQ_SOURCE_DC1_VLINE2 + reg_num] = {\</div><div class='add'>+		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT2_CONTROL, OTG_VERTICAL_INTERRUPT2_INT_ENABLE,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT2_CONTROL, OTG_VERTICAL_INTERRUPT2_CLEAR),\</div><div class='add'>+		.funcs = &amp;vline2_irq_info_funcs\</div><div class='add'>+	}</div><div class='ctx'> #define dmub_outbox_int_entry()\</div><div class='ctx'> 	[DC_IRQ_SOURCE_DMCUB_OUTBOX] = {\</div><div class='ctx'> 		IRQ_REG_ENTRY_DMUB(\</div><div class='hunk'>@@ -387,21 +383,29 @@ irq_source_info_dcn32[DAL_IRQ_SOURCES_NUMBER] = {</div><div class='ctx'> 	dc_underflow_int_entry(6),</div><div class='ctx'> 	[DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),</div><div class='ctx'> 	[DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),</div><div class='del'>-	vupdate_no_lock_int_entry(0),</div><div class='del'>-	vupdate_no_lock_int_entry(1),</div><div class='del'>-	vupdate_no_lock_int_entry(2),</div><div class='del'>-	vupdate_no_lock_int_entry(3),</div><div class='ctx'> 	vblank_int_entry(0),</div><div class='ctx'> 	vblank_int_entry(1),</div><div class='ctx'> 	vblank_int_entry(2),</div><div class='ctx'> 	vblank_int_entry(3),</div><div class='add'>+	[DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),</div><div class='add'>+	[DC_IRQ_SOURCE_DC6_VLINE1] = dummy_irq_entry(),</div><div class='add'>+	dmub_outbox_int_entry(),</div><div class='add'>+	vupdate_no_lock_int_entry(0),</div><div class='add'>+	vupdate_no_lock_int_entry(1),</div><div class='add'>+	vupdate_no_lock_int_entry(2),</div><div class='add'>+	vupdate_no_lock_int_entry(3),</div><div class='ctx'> 	vline0_int_entry(0),</div><div class='ctx'> 	vline0_int_entry(1),</div><div class='ctx'> 	vline0_int_entry(2),</div><div class='ctx'> 	vline0_int_entry(3),</div><div class='del'>-	[DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),</div><div class='del'>-	[DC_IRQ_SOURCE_DC6_VLINE1] = dummy_irq_entry(),</div><div class='del'>-	dmub_outbox_int_entry(),</div><div class='add'>+	vline1_int_entry(0),</div><div class='add'>+	vline1_int_entry(1),</div><div class='add'>+	vline1_int_entry(2),</div><div class='add'>+	vline1_int_entry(3),</div><div class='add'>+	vline2_int_entry(0),</div><div class='add'>+	vline2_int_entry(1),</div><div class='add'>+	vline2_int_entry(2),</div><div class='add'>+	vline2_int_entry(3)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct irq_service_funcs irq_service_funcs_dcn32 = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c b/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c<br/>index ea8c271171bc..79e5e8c137ca 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c</a></div><div class='hunk'>@@ -127,36 +127,9 @@ static enum dc_irq_source to_dal_irq_source_dcn35(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c b/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c<br/>index 7ec8e0de2f01..163b8ee9ebf7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c</a></div><div class='hunk'>@@ -106,36 +106,9 @@ static enum dc_irq_source to_dal_irq_source_dcn351(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c b/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c<br/>index ea958628f8b8..f716ab0fd30e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c</a></div><div class='hunk'>@@ -105,36 +105,9 @@ static enum dc_irq_source to_dal_irq_source_dcn36(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c b/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c<br/>index b43c9524b0de..fd9bb1950c20 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c</a></div><div class='hunk'>@@ -109,36 +109,9 @@ static enum dc_irq_source to_dal_irq_source_dcn401(</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool hpd_ack(</div><div class='del'>-	struct irq_service *irq_service,</div><div class='del'>-	const struct irq_source_info *info)</div><div class='del'>-{</div><div class='del'>-	uint32_t addr = info-&gt;status_reg;</div><div class='del'>-	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='del'>-	uint32_t current_status =</div><div class='del'>-		get_reg_field_value(</div><div class='del'>-			value,</div><div class='del'>-			HPD0_DC_HPD_INT_STATUS,</div><div class='del'>-			DC_HPD_SENSE_DELAYED);</div><div class='del'>-</div><div class='del'>-	dal_irq_service_ack_generic(irq_service, info);</div><div class='del'>-</div><div class='del'>-	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='del'>-</div><div class='del'>-	set_reg_field_value(</div><div class='del'>-		value,</div><div class='del'>-		current_status ? 0 : 1,</div><div class='del'>-		HPD0_DC_HPD_INT_CONTROL,</div><div class='del'>-		DC_HPD_INT_POLARITY);</div><div class='del'>-</div><div class='del'>-	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct irq_source_info_funcs hpd_irq_info_funcs = {</div><div class='ctx'> 	.set = NULL,</div><div class='del'>-	.ack = hpd_ack</div><div class='add'>+	.ack = hpd0_ack</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct irq_source_info_funcs hpd_rx_irq_info_funcs = {</div><div class='hunk'>@@ -171,6 +144,16 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 	.ack = NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct irq_source_info_funcs vline1_irq_info_funcs = {</div><div class='add'>+	.set = NULL,</div><div class='add'>+	.ack = NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct irq_source_info_funcs vline2_irq_info_funcs = {</div><div class='add'>+	.set = NULL,</div><div class='add'>+	.ack = NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #undef BASE_INNER</div><div class='ctx'> #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg</div><div class='ctx'> </div><div class='hunk'>@@ -239,6 +222,13 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 		.funcs = &amp;pflip_irq_info_funcs\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define vblank_int_entry(reg_num)\</div><div class='add'>+	[DC_IRQ_SOURCE_VBLANK1 + reg_num] = {\</div><div class='add'>+		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='add'>+			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_INT_EN,\</div><div class='add'>+			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_EVENT_CLEAR),\</div><div class='add'>+		.funcs = &amp;vblank_irq_info_funcs\</div><div class='add'>+	}</div><div class='ctx'> /* vupdate_no_lock_int_entry maps to DC_IRQ_SOURCE_VUPDATEx, to match semantic</div><div class='ctx'>  * of DCE's DC_IRQ_SOURCE_VUPDATEx.</div><div class='ctx'>  */</div><div class='hunk'>@@ -250,13 +240,6 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 		.funcs = &amp;vupdate_no_lock_irq_info_funcs\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#define vblank_int_entry(reg_num)\</div><div class='del'>-	[DC_IRQ_SOURCE_VBLANK1 + reg_num] = {\</div><div class='del'>-		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='del'>-			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_INT_EN,\</div><div class='del'>-			OTG_GLOBAL_SYNC_STATUS, VSTARTUP_EVENT_CLEAR),\</div><div class='del'>-		.funcs = &amp;vblank_irq_info_funcs\</div><div class='del'>-	}</div><div class='ctx'> #define vline0_int_entry(reg_num)\</div><div class='ctx'> 	[DC_IRQ_SOURCE_DC1_VLINE0 + reg_num] = {\</div><div class='ctx'> 		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='hunk'>@@ -264,6 +247,20 @@ static struct irq_source_info_funcs vline0_irq_info_funcs = {</div><div class='ctx'> 			OTG_VERTICAL_INTERRUPT0_CONTROL, OTG_VERTICAL_INTERRUPT0_CLEAR),\</div><div class='ctx'> 		.funcs = &amp;vline0_irq_info_funcs\</div><div class='ctx'> 	}</div><div class='add'>+#define vline1_int_entry(reg_num)\</div><div class='add'>+	[DC_IRQ_SOURCE_DC1_VLINE1 + reg_num] = {\</div><div class='add'>+		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT1_CONTROL, OTG_VERTICAL_INTERRUPT1_INT_ENABLE,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT1_CONTROL, OTG_VERTICAL_INTERRUPT1_CLEAR),\</div><div class='add'>+		.funcs = &amp;vline1_irq_info_funcs\</div><div class='add'>+	}</div><div class='add'>+#define vline2_int_entry(reg_num)\</div><div class='add'>+	[DC_IRQ_SOURCE_DC1_VLINE2 + reg_num] = {\</div><div class='add'>+		IRQ_REG_ENTRY(OTG, reg_num,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT2_CONTROL, OTG_VERTICAL_INTERRUPT2_INT_ENABLE,\</div><div class='add'>+			OTG_VERTICAL_INTERRUPT2_CONTROL, OTG_VERTICAL_INTERRUPT2_CLEAR),\</div><div class='add'>+		.funcs = &amp;vline2_irq_info_funcs\</div><div class='add'>+	}</div><div class='ctx'> #define dmub_outbox_int_entry()\</div><div class='ctx'> 	[DC_IRQ_SOURCE_DMCUB_OUTBOX] = {\</div><div class='ctx'> 		IRQ_REG_ENTRY_DMUB(\</div><div class='hunk'>@@ -364,21 +361,29 @@ irq_source_info_dcn401[DAL_IRQ_SOURCES_NUMBER] = {</div><div class='ctx'> 	dc_underflow_int_entry(6),</div><div class='ctx'> 	[DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),</div><div class='ctx'> 	[DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),</div><div class='del'>-	vupdate_no_lock_int_entry(0),</div><div class='del'>-	vupdate_no_lock_int_entry(1),</div><div class='del'>-	vupdate_no_lock_int_entry(2),</div><div class='del'>-	vupdate_no_lock_int_entry(3),</div><div class='ctx'> 	vblank_int_entry(0),</div><div class='ctx'> 	vblank_int_entry(1),</div><div class='ctx'> 	vblank_int_entry(2),</div><div class='ctx'> 	vblank_int_entry(3),</div><div class='add'>+	[DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),</div><div class='add'>+	[DC_IRQ_SOURCE_DC6_VLINE1] = dummy_irq_entry(),</div><div class='add'>+	dmub_outbox_int_entry(),</div><div class='add'>+	vupdate_no_lock_int_entry(0),</div><div class='add'>+	vupdate_no_lock_int_entry(1),</div><div class='add'>+	vupdate_no_lock_int_entry(2),</div><div class='add'>+	vupdate_no_lock_int_entry(3),</div><div class='ctx'> 	vline0_int_entry(0),</div><div class='ctx'> 	vline0_int_entry(1),</div><div class='ctx'> 	vline0_int_entry(2),</div><div class='ctx'> 	vline0_int_entry(3),</div><div class='del'>-	[DC_IRQ_SOURCE_DC5_VLINE1] = dummy_irq_entry(),</div><div class='del'>-	[DC_IRQ_SOURCE_DC6_VLINE1] = dummy_irq_entry(),</div><div class='del'>-	dmub_outbox_int_entry(),</div><div class='add'>+	vline1_int_entry(0),</div><div class='add'>+	vline1_int_entry(1),</div><div class='add'>+	vline1_int_entry(2),</div><div class='add'>+	vline1_int_entry(3),</div><div class='add'>+	vline2_int_entry(0),</div><div class='add'>+	vline2_int_entry(1),</div><div class='add'>+	vline2_int_entry(2),</div><div class='add'>+	vline2_int_entry(3),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct irq_service_funcs irq_service_funcs_dcn401 = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c<br/>index eca3d7ee7e4e..b595a11c5eaf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/irq_service.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/irq_service.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/irq_service.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/irq_service.c</a></div><div class='hunk'>@@ -41,6 +41,16 @@</div><div class='ctx'> #include "reg_helper.h"</div><div class='ctx'> #include "irq_service.h"</div><div class='ctx'> </div><div class='add'>+//HPD0_DC_HPD_INT_STATUS</div><div class='add'>+#define HPD0_DC_HPD_INT_STATUS__DC_HPD_SENSE_DELAYED_MASK		0x00000010L</div><div class='add'>+#define HPD0_DC_HPD_INT_CONTROL__DC_HPD_INT_POLARITY_MASK		0x00000100L</div><div class='add'>+#define HPD0_DC_HPD_INT_STATUS__DC_HPD_SENSE_DELAYED__SHIFT		0x4</div><div class='add'>+#define HPD0_DC_HPD_INT_CONTROL__DC_HPD_INT_POLARITY__SHIFT     0x8</div><div class='add'>+//HPD1_DC_HPD_INT_STATUS</div><div class='add'>+#define DC_HPD1_INT_STATUS__DC_HPD1_SENSE_DELAYED_MASK			0x10</div><div class='add'>+#define DC_HPD1_INT_STATUS__DC_HPD1_SENSE_DELAYED__SHIFT		0x4</div><div class='add'>+#define DC_HPD1_INT_CONTROL__DC_HPD1_INT_POLARITY_MASK			0x100</div><div class='add'>+#define DC_HPD1_INT_CONTROL__DC_HPD1_INT_POLARITY__SHIFT		0x8</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define CTX \</div><div class='hunk'>@@ -177,3 +187,57 @@ enum dc_irq_source dal_irq_service_to_irq_source(</div><div class='ctx'> 		src_id,</div><div class='ctx'> 		ext_id);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool hpd0_ack(</div><div class='add'>+	struct irq_service *irq_service,</div><div class='add'>+	const struct irq_source_info *info)</div><div class='add'>+{</div><div class='add'>+	uint32_t addr = info-&gt;status_reg;</div><div class='add'>+	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='add'>+	uint32_t current_status =</div><div class='add'>+		get_reg_field_value(</div><div class='add'>+			value,</div><div class='add'>+			HPD0_DC_HPD_INT_STATUS,</div><div class='add'>+			DC_HPD_SENSE_DELAYED);</div><div class='add'>+</div><div class='add'>+	dal_irq_service_ack_generic(irq_service, info);</div><div class='add'>+</div><div class='add'>+	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='add'>+</div><div class='add'>+	set_reg_field_value(</div><div class='add'>+		value,</div><div class='add'>+		current_status ? 0 : 1,</div><div class='add'>+		HPD0_DC_HPD_INT_CONTROL,</div><div class='add'>+		DC_HPD_INT_POLARITY);</div><div class='add'>+</div><div class='add'>+	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hpd1_ack(</div><div class='add'>+	struct irq_service *irq_service,</div><div class='add'>+	const struct irq_source_info *info)</div><div class='add'>+{</div><div class='add'>+	uint32_t addr = info-&gt;status_reg;</div><div class='add'>+	uint32_t value = dm_read_reg(irq_service-&gt;ctx, addr);</div><div class='add'>+	uint32_t current_status =</div><div class='add'>+		get_reg_field_value(</div><div class='add'>+			value,</div><div class='add'>+			DC_HPD1_INT_STATUS,</div><div class='add'>+			DC_HPD1_SENSE_DELAYED);</div><div class='add'>+</div><div class='add'>+	dal_irq_service_ack_generic(irq_service, info);</div><div class='add'>+</div><div class='add'>+	value = dm_read_reg(irq_service-&gt;ctx, info-&gt;enable_reg);</div><div class='add'>+</div><div class='add'>+	set_reg_field_value(</div><div class='add'>+		value,</div><div class='add'>+		current_status ? 0 : 1,</div><div class='add'>+		DC_HPD1_INT_CONTROL,</div><div class='add'>+		DC_HPD1_INT_POLARITY);</div><div class='add'>+</div><div class='add'>+	dm_write_reg(irq_service-&gt;ctx, info-&gt;enable_reg, value);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.h b/drivers/gpu/drm/amd/display/dc/irq/irq_service.h<br/>index b178f85944cd..bbcef3d2fe33 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/irq_service.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq/irq_service.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq/irq_service.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq/irq_service.h</a></div><div class='hunk'>@@ -82,4 +82,12 @@ void dal_irq_service_set_generic(</div><div class='ctx'> 	const struct irq_source_info *info,</div><div class='ctx'> 	bool enable);</div><div class='ctx'> </div><div class='add'>+bool hpd0_ack(</div><div class='add'>+	struct irq_service *irq_service,</div><div class='add'>+	const struct irq_source_info *info);</div><div class='add'>+</div><div class='add'>+bool hpd1_ack(</div><div class='add'>+	struct irq_service *irq_service,</div><div class='add'>+	const struct irq_source_info *info);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/irq_types.h b/drivers/gpu/drm/amd/display/dc/irq_types.h<br/>index 110f656d43ae..a2f7b933bebf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/irq_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/irq_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/irq_types.h</a></div><div class='hunk'>@@ -161,6 +161,20 @@ enum dc_irq_source {</div><div class='ctx'> 	DC_IRQ_SOURCE_DPCX_TX_PHYE,</div><div class='ctx'> 	DC_IRQ_SOURCE_DPCX_TX_PHYF,</div><div class='ctx'> </div><div class='add'>+	DC_IRQ_SOURCE_DC1_VLINE2,</div><div class='add'>+	DC_IRQ_SOURCE_DC2_VLINE2,</div><div class='add'>+	DC_IRQ_SOURCE_DC3_VLINE2,</div><div class='add'>+	DC_IRQ_SOURCE_DC4_VLINE2,</div><div class='add'>+	DC_IRQ_SOURCE_DC5_VLINE2,</div><div class='add'>+	DC_IRQ_SOURCE_DC6_VLINE2,</div><div class='add'>+</div><div class='add'>+	DC_IRQ_SOURCE_DCI2C_RR_DDC1,</div><div class='add'>+	DC_IRQ_SOURCE_DCI2C_RR_DDC2,</div><div class='add'>+	DC_IRQ_SOURCE_DCI2C_RR_DDC3,</div><div class='add'>+	DC_IRQ_SOURCE_DCI2C_RR_DDC4,</div><div class='add'>+	DC_IRQ_SOURCE_DCI2C_RR_DDC5,</div><div class='add'>+	DC_IRQ_SOURCE_DCI2C_RR_DDC6,</div><div class='add'>+</div><div class='ctx'> 	DAL_IRQ_SOURCES_NUMBER</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -170,6 +184,8 @@ enum irq_type</div><div class='ctx'> 	IRQ_TYPE_VUPDATE = DC_IRQ_SOURCE_VUPDATE1,</div><div class='ctx'> 	IRQ_TYPE_VBLANK = DC_IRQ_SOURCE_VBLANK1,</div><div class='ctx'> 	IRQ_TYPE_VLINE0 = DC_IRQ_SOURCE_DC1_VLINE0,</div><div class='add'>+	IRQ_TYPE_VLINE1 = DC_IRQ_SOURCE_DC1_VLINE1,</div><div class='add'>+	IRQ_TYPE_VLINE2 = DC_IRQ_SOURCE_DC1_VLINE2,</div><div class='ctx'> 	IRQ_TYPE_DCUNDERFLOW = DC_IRQ_SOURCE_DC1UNDERFLOW,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c<br/>index cc9191a5c9e6..9655e6fa53a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_detection.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/link_detection.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_detection.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/link_detection.c</a></div><div class='hunk'>@@ -611,6 +611,7 @@ static bool detect_dp(struct dc_link *link,</div><div class='ctx'> 		link-&gt;dpcd_caps.dongle_type = sink_caps-&gt;dongle_type;</div><div class='ctx'> 		link-&gt;dpcd_caps.is_dongle_type_one = sink_caps-&gt;is_dongle_type_one;</div><div class='ctx'> 		link-&gt;dpcd_caps.dpcd_rev.raw = 0;</div><div class='add'>+		link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='hunk'>@@ -1007,21 +1008,11 @@ static bool detect_link_and_local_sink(struct dc_link *link,</div><div class='ctx'> 					link-&gt;reported_link_cap.link_rate &gt; LINK_RATE_HIGH3)</div><div class='ctx'> 				link-&gt;reported_link_cap.link_rate = LINK_RATE_HIGH3;</div><div class='ctx'> </div><div class='del'>-			/*</div><div class='del'>-			 * If this is DP over USB4 link then we need to:</div><div class='del'>-			 * - Enable BW ALLOC support on DPtx if applicable</div><div class='del'>-			 */</div><div class='del'>-			if (dc-&gt;config.usb4_bw_alloc_support) {</div><div class='del'>-				if (link_dp_dpia_set_dptx_usb4_bw_alloc_support(link)) {</div><div class='del'>-					/* update with non reduced link cap if bw allocation mode is supported */</div><div class='del'>-					if (link-&gt;dpia_bw_alloc_config.nrd_max_link_rate &amp;&amp;</div><div class='del'>-						link-&gt;dpia_bw_alloc_config.nrd_max_lane_count) {</div><div class='del'>-						link-&gt;reported_link_cap.link_rate =</div><div class='del'>-							link-&gt;dpia_bw_alloc_config.nrd_max_link_rate;</div><div class='del'>-						link-&gt;reported_link_cap.lane_count =</div><div class='del'>-							link-&gt;dpia_bw_alloc_config.nrd_max_lane_count;</div><div class='del'>-					}</div><div class='del'>-				}</div><div class='add'>+			if (link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling</div><div class='add'>+					&amp;&amp; link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc</div><div class='add'>+					&amp;&amp; link-&gt;dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support) {</div><div class='add'>+				if (link_dpia_enable_usb4_dp_bw_alloc_mode(link) == false)</div><div class='add'>+					link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc = false;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c<br/>index 268626e73c54..273a3be6d593 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_dpms.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/link_dpms.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_dpms.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/link_dpms.c</a></div><div class='hunk'>@@ -148,6 +148,7 @@ void link_blank_dp_stream(struct dc_link *link, bool hw_init)</div><div class='ctx'> void link_set_all_streams_dpms_off_for_link(struct dc_link *link)</div><div class='ctx'> {</div><div class='ctx'> 	struct pipe_ctx *pipes[MAX_PIPES];</div><div class='add'>+	struct dc_stream_state *streams[MAX_PIPES];</div><div class='ctx'> 	struct dc_state *state = link-&gt;dc-&gt;current_state;</div><div class='ctx'> 	uint8_t count;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -160,10 +161,18 @@ void link_set_all_streams_dpms_off_for_link(struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> 	link_get_master_pipes_with_dpms_on(link, state, &amp;count, pipes);</div><div class='ctx'> </div><div class='add'>+	/* The subsequent call to dc_commit_updates_for_stream for a full update</div><div class='add'>+	 * will release the current state and swap to a new state. Releasing the</div><div class='add'>+	 * current state results in the stream pointers in the pipe_ctx structs</div><div class='add'>+	 * to be zero'd. Hence, cache all streams prior to dc_commit_updates_for_stream.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		streams[i] = pipes[i]-&gt;stream;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		stream_update.stream = pipes[i]-&gt;stream;</div><div class='add'>+		stream_update.stream = streams[i];</div><div class='ctx'> 		dc_commit_updates_for_stream(link-&gt;ctx-&gt;dc, NULL, 0,</div><div class='del'>-				pipes[i]-&gt;stream, &amp;stream_update,</div><div class='add'>+				streams[i], &amp;stream_update,</div><div class='ctx'> 				state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2365,7 +2374,7 @@ void link_set_dpms_off(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	update_psp_stream_config(pipe_ctx, true);</div><div class='ctx'> 	dc-&gt;hwss.blank_stream(pipe_ctx);</div><div class='ctx'> </div><div class='del'>-	if (pipe_ctx-&gt;stream-&gt;link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA)</div><div class='add'>+	if (pipe_ctx-&gt;link_config.dp_tunnel_settings.should_use_dp_bw_allocation)</div><div class='ctx'> 		deallocate_usb4_bandwidth(pipe_ctx-&gt;stream);</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_ctx-&gt;stream-&gt;signal == SIGNAL_TYPE_DISPLAY_PORT_MST)</div><div class='hunk'>@@ -2433,7 +2442,7 @@ void link_set_dpms_off(struct pipe_ctx *pipe_ctx)</div><div class='ctx'> 	if (link-&gt;connector_signal == SIGNAL_TYPE_EDP &amp;&amp; dc-&gt;debug.psp_disabled_wa) {</div><div class='ctx'> 		/* reset internal save state to default since eDP is  off */</div><div class='ctx'> 		enum dp_panel_mode panel_mode = dp_get_panel_mode(pipe_ctx-&gt;stream-&gt;link);</div><div class='del'>-		/* since current psp not loaded, we need to reset it to default*/</div><div class='add'>+		/* since current psp not loaded, we need to reset it to default */</div><div class='ctx'> 		link-&gt;panel_mode = panel_mode;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2611,7 +2620,7 @@ void link_set_dpms_on(</div><div class='ctx'> 	if (dc_is_dp_signal(pipe_ctx-&gt;stream-&gt;signal))</div><div class='ctx'> 		dp_set_hblank_reduction_on_rx(pipe_ctx);</div><div class='ctx'> </div><div class='del'>-	if (pipe_ctx-&gt;stream-&gt;link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA)</div><div class='add'>+	if (pipe_ctx-&gt;link_config.dp_tunnel_settings.should_use_dp_bw_allocation)</div><div class='ctx'> 		allocate_usb4_bandwidth(pipe_ctx-&gt;stream);</div><div class='ctx'> </div><div class='ctx'> 	if (pipe_ctx-&gt;stream-&gt;signal == SIGNAL_TYPE_DISPLAY_PORT_MST)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/link_factory.c b/drivers/gpu/drm/amd/display/dc/link/link_factory.c<br/>index f6b6b19e7481..1a04f4b74585 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_factory.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/link_factory.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/link_factory.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/link_factory.c</a></div><div class='hunk'>@@ -156,6 +156,7 @@ static void construct_link_service_dp_capability(struct link_service *link_srv)</div><div class='ctx'> 	link_srv-&gt;dp_get_encoding_format = link_dp_get_encoding_format;</div><div class='ctx'> 	link_srv-&gt;dp_should_enable_fec = dp_should_enable_fec;</div><div class='ctx'> 	link_srv-&gt;dp_decide_link_settings = link_decide_link_settings;</div><div class='add'>+	link_srv-&gt;dp_decide_tunnel_settings = link_decide_dp_tunnel_settings;</div><div class='ctx'> 	link_srv-&gt;mst_decide_link_encoding_format =</div><div class='ctx'> 			mst_decide_link_encoding_format;</div><div class='ctx'> 	link_srv-&gt;edp_decide_link_settings = edp_decide_link_settings;</div><div class='hunk'>@@ -464,6 +465,7 @@ static bool construct_phy(struct dc_link *link,</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;irq_source_hpd = DC_IRQ_SOURCE_INVALID;</div><div class='ctx'> 	link-&gt;irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID;</div><div class='add'>+	link-&gt;irq_source_read_request = DC_IRQ_SOURCE_INVALID;</div><div class='ctx'> 	link-&gt;link_status.dpcd_caps = &amp;link-&gt;dpcd_caps;</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;dc = init_params-&gt;dc;</div><div class='hunk'>@@ -514,6 +516,9 @@ static bool construct_phy(struct dc_link *link,</div><div class='ctx'> 	case CONNECTOR_ID_HDMI_TYPE_A:</div><div class='ctx'> 		link-&gt;connector_signal = SIGNAL_TYPE_HDMI_TYPE_A;</div><div class='ctx'> </div><div class='add'>+		if (link-&gt;hpd_gpio)</div><div class='add'>+			link-&gt;irq_source_read_request =</div><div class='add'>+					dal_irq_get_read_request(link-&gt;hpd_gpio);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CONNECTOR_ID_SINGLE_LINK_DVID:</div><div class='ctx'> 	case CONNECTOR_ID_SINGLE_LINK_DVII:</div><div class='hunk'>@@ -653,7 +658,7 @@ static bool construct_phy(struct dc_link *link,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Look for device tag that matches connector signal,</div><div class='del'>-		 * CRT for rgb, LCD for other supported signal tyes</div><div class='add'>+		 * CRT for rgb, LCD for other supported signal types</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!bp_funcs-&gt;is_device_id_supported(dc_ctx-&gt;dc_bios,</div><div class='ctx'> 						      link-&gt;device_tag.dev_id))</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c<br/>index 21ee0d96c9d4..8f79881ad9f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c</a></div><div class='hunk'>@@ -158,6 +158,14 @@ uint8_t dp_parse_lttpr_repeater_count(uint8_t lttpr_repeater_count)</div><div class='ctx'> 	return 0; // invalid value</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+uint32_t dp_get_closest_lttpr_offset(uint8_t lttpr_count)</div><div class='add'>+{</div><div class='add'>+	/* Calculate offset for LTTPR closest to DPTX which is highest in the chain</div><div class='add'>+	 * Offset is 0 for single LTTPR cases as base LTTPR DPCD addresses target LTTPR 1</div><div class='add'>+	 */</div><div class='add'>+	return DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE * (lttpr_count - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> uint32_t link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw)</div><div class='ctx'> {</div><div class='ctx'> 	switch (bw) {</div><div class='hunk'>@@ -2013,11 +2021,9 @@ static bool retrieve_link_cap(struct dc_link *link)</div><div class='ctx'> 			sizeof(link-&gt;dpcd_caps.max_uncompressed_pixel_rate_cap.raw));</div><div class='ctx'> </div><div class='ctx'> 	/* Read DP tunneling information. */</div><div class='del'>-	if (link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA) {</div><div class='del'>-		status = dpcd_get_tunneling_device_data(link);</div><div class='del'>-		if (status != DC_OK)</div><div class='del'>-			dm_error("%s: Read DP tunneling device data failed.\n", __func__);</div><div class='del'>-	}</div><div class='add'>+	status = dpcd_get_tunneling_device_data(link);</div><div class='add'>+	if (status != DC_OK)</div><div class='add'>+		dm_error("%s: Read DP tunneling device data failed.\n", __func__);</div><div class='ctx'> </div><div class='ctx'> 	retrieve_cable_id(link);</div><div class='ctx'> 	dpcd_write_cable_id_to_dprx(link);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h<br/>index 0ce0af3ddbeb..940b147cc5d4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h</a></div><div class='hunk'>@@ -48,6 +48,9 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link);</div><div class='ctx'> /* Convert PHY repeater count read from DPCD uint8_t. */</div><div class='ctx'> uint8_t dp_parse_lttpr_repeater_count(uint8_t lttpr_repeater_count);</div><div class='ctx'> </div><div class='add'>+/* Calculate embedded LTTPR address offset for vendor-specific behaviour */</div><div class='add'>+uint32_t dp_get_closest_lttpr_offset(uint8_t lttpr_count);</div><div class='add'>+</div><div class='ctx'> bool dp_is_sink_present(struct dc_link *link);</div><div class='ctx'> </div><div class='ctx'> bool dp_is_lttpr_present(struct dc_link *link);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c<br/>index 0d123e647652..22bfdced64ab 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c</a></div><div class='hunk'>@@ -62,6 +62,36 @@ enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link)</div><div class='ctx'> 	if (status != DC_OK)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='add'>+	link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw =</div><div class='add'>+			dpcd_dp_tun_data[DP_TUNNELING_CAPABILITIES_SUPPORT - DP_TUNNELING_CAPABILITIES_SUPPORT];</div><div class='add'>+</div><div class='add'>+	if (link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling == false)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	link-&gt;dpcd_caps.usb4_dp_tun_info.dpia_info.raw =</div><div class='add'>+			dpcd_dp_tun_data[DP_IN_ADAPTER_INFO - DP_TUNNELING_CAPABILITIES_SUPPORT];</div><div class='add'>+	link-&gt;dpcd_caps.usb4_dp_tun_info.usb4_driver_id =</div><div class='add'>+			dpcd_dp_tun_data[DP_USB4_DRIVER_ID - DP_TUNNELING_CAPABILITIES_SUPPORT];</div><div class='add'>+</div><div class='add'>+	if (link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc) {</div><div class='add'>+		status = core_link_read_dpcd(link, USB4_DRIVER_BW_CAPABILITY,</div><div class='add'>+				dpcd_dp_tun_data, 1);</div><div class='add'>+</div><div class='add'>+		if (status != DC_OK)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		link-&gt;dpcd_caps.usb4_dp_tun_info.driver_bw_cap.raw = dpcd_dp_tun_data[0];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DC_LOG_DEBUG("%s: Link[%d]  DP tunneling support  (RouterId=%d  AdapterId=%d)  "</div><div class='add'>+			"DPIA_BW_Alloc_support=%d "</div><div class='add'>+			"CM_BW_Alloc_support=%d ",</div><div class='add'>+			__func__, link-&gt;link_index,</div><div class='add'>+			link-&gt;dpcd_caps.usb4_dp_tun_info.usb4_driver_id,</div><div class='add'>+			link-&gt;dpcd_caps.usb4_dp_tun_info.dpia_info.bits.dpia_num,</div><div class='add'>+			link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc,</div><div class='add'>+			link-&gt;dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support);</div><div class='add'>+</div><div class='ctx'> 	status = core_link_read_dpcd(</div><div class='ctx'> 			link,</div><div class='ctx'> 			DP_USB4_ROUTER_TOPOLOGY_ID,</div><div class='hunk'>@@ -71,13 +101,6 @@ enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link)</div><div class='ctx'> 	if (status != DC_OK)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw =</div><div class='del'>-			dpcd_dp_tun_data[DP_TUNNELING_CAPABILITIES_SUPPORT - DP_TUNNELING_CAPABILITIES_SUPPORT];</div><div class='del'>-	link-&gt;dpcd_caps.usb4_dp_tun_info.dpia_info.raw =</div><div class='del'>-			dpcd_dp_tun_data[DP_IN_ADAPTER_INFO - DP_TUNNELING_CAPABILITIES_SUPPORT];</div><div class='del'>-	link-&gt;dpcd_caps.usb4_dp_tun_info.usb4_driver_id =</div><div class='del'>-			dpcd_dp_tun_data[DP_USB4_DRIVER_ID - DP_TUNNELING_CAPABILITIES_SUPPORT];</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; DPCD_USB4_TOPOLOGY_ID_LEN; i++)</div><div class='ctx'> 		link-&gt;dpcd_caps.usb4_dp_tun_info.usb4_topology_id[i] = dpcd_topology_data[i];</div><div class='ctx'> </div><div class='hunk'>@@ -92,6 +115,7 @@ bool dpia_query_hpd_status(struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> 	/* prepare QUERY_HPD command */</div><div class='ctx'> 	cmd.query_hpd.header.type = DMUB_CMD__QUERY_HPD_STATE;</div><div class='add'>+	cmd.query_hpd.header.payload_bytes = sizeof(cmd.query_hpd.data);</div><div class='ctx'> 	cmd.query_hpd.data.instance = link-&gt;link_id.enum_id - ENUM_ID_1;</div><div class='ctx'> 	cmd.query_hpd.data.ch_type = AUX_CHANNEL_DPIA;</div><div class='ctx'> </div><div class='hunk'>@@ -119,3 +143,20 @@ bool dpia_query_hpd_status(struct dc_link *link)</div><div class='ctx'> 	return link-&gt;hpd_status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void link_decide_dp_tunnel_settings(struct dc_stream_state *stream,</div><div class='add'>+			struct dc_tunnel_settings *dp_tunnel_setting)</div><div class='add'>+{</div><div class='add'>+	struct dc_link *link = stream-&gt;link;</div><div class='add'>+</div><div class='add'>+	memset(dp_tunnel_setting, 0, sizeof(*dp_tunnel_setting));</div><div class='add'>+</div><div class='add'>+	if ((stream-&gt;signal == SIGNAL_TYPE_DISPLAY_PORT) || (stream-&gt;signal == SIGNAL_TYPE_DISPLAY_PORT_MST)) {</div><div class='add'>+		dp_tunnel_setting-&gt;should_enable_dp_tunneling =</div><div class='add'>+					link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling;</div><div class='add'>+</div><div class='add'>+		if (link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc</div><div class='add'>+				&amp;&amp; link-&gt;dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support)</div><div class='add'>+			dp_tunnel_setting-&gt;should_use_dp_bw_allocation = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h<br/>index 363f45a1a964..a61edfc9ca7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.h</a></div><div class='hunk'>@@ -38,4 +38,10 @@ enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link);</div><div class='ctx'>  * Returns true if HPD high.</div><div class='ctx'>  */</div><div class='ctx'> bool dpia_query_hpd_status(struct dc_link *link);</div><div class='add'>+</div><div class='add'>+/* Decide the DP tunneling settings based on the DPCD capabilities</div><div class='add'>+ */</div><div class='add'>+void link_decide_dp_tunnel_settings(struct dc_stream_state *stream,</div><div class='add'>+			struct dc_tunnel_settings *dp_tunnel_setting);</div><div class='add'>+</div><div class='ctx'> #endif /* __DC_LINK_DPIA_H__ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c<br/>index a254ead2f7e8..3af7564a84f1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c</a></div><div class='hunk'>@@ -46,9 +46,10 @@</div><div class='ctx'>  */</div><div class='ctx'> static bool link_dp_is_bw_alloc_available(struct dc_link *link)</div><div class='ctx'> {</div><div class='del'>-	return (link &amp;&amp; link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA</div><div class='del'>-		&amp;&amp; link-&gt;hpd_status</div><div class='del'>-		&amp;&amp; link-&gt;dpia_bw_alloc_config.bw_alloc_enabled);</div><div class='add'>+	return (link &amp;&amp; link-&gt;hpd_status</div><div class='add'>+		&amp;&amp; link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling</div><div class='add'>+		&amp;&amp; link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dpia_bw_alloc</div><div class='add'>+		&amp;&amp; link-&gt;dpcd_caps.usb4_dp_tun_info.driver_bw_cap.bits.driver_bw_alloc_support);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void reset_bw_alloc_struct(struct dc_link *link)</div><div class='hunk'>@@ -141,7 +142,7 @@ static int get_non_reduced_max_lane_count(struct dc_link *link)</div><div class='ctx'>  * granuality, Driver_ID, CM_Group, &amp; populate the BW allocation structs</div><div class='ctx'>  * for host router and dpia</div><div class='ctx'>  */</div><div class='del'>-static void init_usb4_bw_struct(struct dc_link *link)</div><div class='add'>+static void retrieve_usb4_dp_bw_allocation_info(struct dc_link *link)</div><div class='ctx'> {</div><div class='ctx'> 	reset_bw_alloc_struct(link);</div><div class='ctx'> </div><div class='hunk'>@@ -282,49 +283,26 @@ static void link_dpia_send_bw_alloc_request(struct dc_link *link, int req_bw)</div><div class='ctx'> // ------------------------------------------------------------------</div><div class='ctx'> // PUBLIC FUNCTIONS</div><div class='ctx'> // ------------------------------------------------------------------</div><div class='del'>-bool link_dp_dpia_set_dptx_usb4_bw_alloc_support(struct dc_link *link)</div><div class='add'>+bool link_dpia_enable_usb4_dp_bw_alloc_mode(struct dc_link *link)</div><div class='ctx'> {</div><div class='ctx'> 	bool ret = false;</div><div class='del'>-	uint8_t response = 0,</div><div class='del'>-			bw_support_dpia = 0,</div><div class='del'>-			bw_support_cm = 0;</div><div class='add'>+	uint8_t val;</div><div class='ctx'> </div><div class='del'>-	if (!(link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA &amp;&amp; link-&gt;hpd_status))</div><div class='del'>-		goto out;</div><div class='add'>+	if (link-&gt;hpd_status) {</div><div class='add'>+		val = DPTX_BW_ALLOC_MODE_ENABLE | DPTX_BW_ALLOC_UNMASK_IRQ;</div><div class='ctx'> </div><div class='del'>-	if (core_link_read_dpcd(</div><div class='del'>-			link,</div><div class='del'>-			DP_TUNNELING_CAPABILITIES,</div><div class='del'>-			&amp;response,</div><div class='del'>-			sizeof(uint8_t)) == DC_OK)</div><div class='del'>-		bw_support_dpia = (response &gt;&gt; 7) &amp; 1;</div><div class='del'>-</div><div class='del'>-	if (core_link_read_dpcd(</div><div class='del'>-		link,</div><div class='del'>-		USB4_DRIVER_BW_CAPABILITY,</div><div class='del'>-		&amp;response,</div><div class='del'>-		sizeof(uint8_t)) == DC_OK)</div><div class='del'>-		bw_support_cm = (response &gt;&gt; 7) &amp; 1;</div><div class='del'>-</div><div class='del'>-	/* Send request acknowledgment to Turn ON DPTX support */</div><div class='del'>-	if (bw_support_cm &amp;&amp; bw_support_dpia) {</div><div class='del'>-</div><div class='del'>-		response = 0x80;</div><div class='del'>-		if (core_link_write_dpcd(</div><div class='del'>-				link,</div><div class='del'>-				DPTX_BW_ALLOCATION_MODE_CONTROL,</div><div class='del'>-				&amp;response,</div><div class='del'>-				sizeof(uint8_t)) != DC_OK) {</div><div class='del'>-			DC_LOG_DEBUG("%s: FAILURE Enabling DPtx BW Allocation Mode Support for link(%d)\n",</div><div class='del'>-				__func__, link-&gt;link_index);</div><div class='del'>-		} else {</div><div class='del'>-			// SUCCESS Enabled DPtx BW Allocation Mode Support</div><div class='del'>-			DC_LOG_DEBUG("%s: SUCCESS Enabling DPtx BW Allocation Mode Support for link(%d)\n",</div><div class='del'>-				__func__, link-&gt;link_index);</div><div class='add'>+		if (core_link_write_dpcd(link, DPTX_BW_ALLOCATION_MODE_CONTROL, &amp;val, sizeof(uint8_t)) == DC_OK) {</div><div class='add'>+			DC_LOG_DEBUG("%s:  link[%d] DPTX BW allocation mode enabled", __func__, link-&gt;link_index);</div><div class='add'>+</div><div class='add'>+			retrieve_usb4_dp_bw_allocation_info(link);</div><div class='add'>+</div><div class='add'>+			if (link-&gt;dpia_bw_alloc_config.nrd_max_link_rate &amp;&amp; link-&gt;dpia_bw_alloc_config.nrd_max_lane_count) {</div><div class='add'>+				link-&gt;reported_link_cap.link_rate = link-&gt;dpia_bw_alloc_config.nrd_max_link_rate;</div><div class='add'>+				link-&gt;reported_link_cap.lane_count = link-&gt;dpia_bw_alloc_config.nrd_max_lane_count;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-			ret = true;</div><div class='del'>-			init_usb4_bw_struct(link);</div><div class='ctx'> 			link-&gt;dpia_bw_alloc_config.bw_alloc_enabled = true;</div><div class='add'>+			ret = true;</div><div class='ctx'> </div><div class='ctx'> 			/*</div><div class='ctx'> 			 * During DP tunnel creation, CM preallocates BW and reduces estimated BW of other</div><div class='hunk'>@@ -332,11 +310,12 @@ bool link_dp_dpia_set_dptx_usb4_bw_alloc_support(struct dc_link *link)</div><div class='ctx'> 			 * to make the CM to release preallocation and update estimated BW correctly for</div><div class='ctx'> 			 * all DPIAs per host router</div><div class='ctx'> 			 */</div><div class='add'>+			// TODO: Zero allocation can be removed once the MSFT CM fix has been released</div><div class='ctx'> 			link_dp_dpia_allocate_usb4_bandwidth_for_stream(link, 0);</div><div class='del'>-		}</div><div class='add'>+		} else</div><div class='add'>+			DC_LOG_DEBUG("%s:  link[%d] failed to enable DPTX BW allocation mode", __func__, link-&gt;link_index);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -378,7 +357,8 @@ void link_dp_dpia_handle_bw_alloc_status(struct dc_link *link, uint8_t status)</div><div class='ctx'>  */</div><div class='ctx'> void dpia_handle_usb4_bandwidth_allocation_for_link(struct dc_link *link, int peak_bw)</div><div class='ctx'> {</div><div class='del'>-	if (link &amp;&amp; link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA &amp;&amp; link-&gt;dpia_bw_alloc_config.bw_alloc_enabled) {</div><div class='add'>+	if (link &amp;&amp; link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling</div><div class='add'>+			&amp;&amp; link-&gt;dpia_bw_alloc_config.bw_alloc_enabled) {</div><div class='ctx'> 		//1. Hot Plug</div><div class='ctx'> 		if (link-&gt;hpd_status &amp;&amp; peak_bw &gt; 0) {</div><div class='ctx'> 			// If DP over USB4 then we need to check BW allocation</div><div class='hunk'>@@ -401,7 +381,7 @@ void link_dp_dpia_allocate_usb4_bandwidth_for_stream(struct dc_link *link, int r</div><div class='ctx'> 	if (link_dp_is_bw_alloc_available(link))</div><div class='ctx'> 		link_dpia_send_bw_alloc_request(link, req_bw);</div><div class='ctx'> 	else</div><div class='del'>-		DC_LOG_DEBUG("%s:  Not able to send the BW Allocation request", __func__);</div><div class='add'>+		DC_LOG_DEBUG("%s:  BW Allocation mode not available", __func__);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool dpia_validate_usb4_bw(struct dc_link **link, int *bw_needed_per_dpia, const unsigned int num_dpias)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h<br/>index 6df9b946b00f..801965b5f9a4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.h</a></div><div class='hunk'>@@ -43,13 +43,13 @@ enum bw_type {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Enable BW Allocation Mode Support from the DP-Tx side</div><div class='add'>+ * Enable USB4 DP BW allocation mode</div><div class='ctx'>  *</div><div class='ctx'>  * @link: pointer to the dc_link struct instance</div><div class='ctx'>  *</div><div class='ctx'>  * return: SUCCESS or FAILURE</div><div class='ctx'>  */</div><div class='del'>-bool link_dp_dpia_set_dptx_usb4_bw_alloc_support(struct dc_link *link);</div><div class='add'>+bool link_dpia_enable_usb4_dp_bw_alloc_mode(struct dc_link *link);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Allocates only what the stream needs for bw, so if:</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c<br/>index 5be00e4ce10b..693477413347 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c</a></div><div class='hunk'>@@ -229,6 +229,10 @@ static void handle_hpd_irq_replay_sink(struct dc_link *link)</div><div class='ctx'> </div><div class='ctx'> 		link-&gt;replay_settings.config.replay_error_status.raw |= replay_error_status.raw;</div><div class='ctx'> </div><div class='add'>+		/* Increment desync error counter if a desync error is detected */</div><div class='add'>+		if (replay_configuration.bits.DESYNC_ERROR_STATUS)</div><div class='add'>+			link-&gt;replay_settings.replay_desync_error_fail_count++;</div><div class='add'>+</div><div class='ctx'> 		if (link-&gt;replay_settings.config.force_disable_desync_error_check)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='hunk'>@@ -240,9 +244,6 @@ static void handle_hpd_irq_replay_sink(struct dc_link *link)</div><div class='ctx'> 			&amp;replay_configuration.raw,</div><div class='ctx'> 			sizeof(replay_configuration.raw));</div><div class='ctx'> </div><div class='del'>-		/* Update desync error counter */</div><div class='del'>-		link-&gt;replay_settings.replay_desync_error_fail_count++;</div><div class='del'>-</div><div class='ctx'> 		/* Acknowledge and clear error bits */</div><div class='ctx'> 		dm_helpers_dp_write_dpcd(</div><div class='ctx'> 			link-&gt;ctx,</div><div class='hunk'>@@ -351,7 +352,7 @@ enum dc_status dp_read_hpd_rx_irq_data(</div><div class='ctx'> 			irq_data-&gt;raw,</div><div class='ctx'> 			DP_SINK_STATUS - DP_SINK_COUNT + 1);</div><div class='ctx'> </div><div class='del'>-		if (link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA) {</div><div class='add'>+		if (link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) {</div><div class='ctx'> 			retval = core_link_read_dpcd(</div><div class='ctx'> 					link, DP_LINK_SERVICE_IRQ_VECTOR_ESI0,</div><div class='ctx'> 					&amp;irq_data-&gt;bytes.link_service_irq_esi0.raw, 1);</div><div class='hunk'>@@ -520,7 +521,7 @@ bool dp_handle_hpd_rx_irq(struct dc_link *link,</div><div class='ctx'> 		dp_trace_link_loss_increment(link);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA) {</div><div class='add'>+	if (link-&gt;dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling) {</div><div class='ctx'> 		if (hpd_irq_dpcd_data.bytes.link_service_irq_esi0.bits.DP_LINK_TUNNELING_IRQ)</div><div class='ctx'> 			dp_handle_tunneling_irq(link);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c<br/>index ef358afdfb65..2dc1a660e504 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c</a></div><div class='hunk'>@@ -785,7 +785,6 @@ void override_training_settings(</div><div class='ctx'> 		lt_settings-&gt;lttpr_mode = LTTPR_MODE_NON_LTTPR;</div><div class='ctx'> </div><div class='ctx'> 	dp_get_lttpr_mode_override(link, &amp;lt_settings-&gt;lttpr_mode);</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum dc_dp_training_pattern decide_cr_training_pattern(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c<br/>index 34d2e097ca2e..66d0fb1b9b9d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c</a></div><div class='hunk'>@@ -35,6 +35,17 @@</div><div class='ctx'> #define DC_LOGGER \</div><div class='ctx'> 	link-&gt;ctx-&gt;logger</div><div class='ctx'> </div><div class='add'>+static void get_default_8b_10b_lttpr_aux_rd_interval(</div><div class='add'>+		union training_aux_rd_interval *training_rd_interval)</div><div class='add'>+{</div><div class='add'>+	/* LTTPR are required to program DPCD 0000Eh to 0x4 (16ms) upon AUX</div><div class='add'>+	 * read reply to this register. Since old sinks with DPCD rev 1.1</div><div class='add'>+	 * and earlier may not support this register, assume the mandatory</div><div class='add'>+	 * value is programmed by the LTTPR to avoid AUX timeout issues.</div><div class='add'>+	 */</div><div class='add'>+	training_rd_interval-&gt;raw = 0x4;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int32_t get_cr_training_aux_rd_interval(struct dc_link *link,</div><div class='ctx'> 		const struct dc_link_settings *link_settings,</div><div class='ctx'> 		enum lttpr_mode lttpr_mode)</div><div class='hunk'>@@ -43,17 +54,22 @@ static int32_t get_cr_training_aux_rd_interval(struct dc_link *link,</div><div class='ctx'> 	uint32_t wait_in_micro_secs = 100;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;training_rd_interval, 0, sizeof(training_rd_interval));</div><div class='del'>-	if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING &amp;&amp;</div><div class='del'>-			link-&gt;dpcd_caps.dpcd_rev.raw &gt;= DPCD_REV_12) {</div><div class='del'>-		core_link_read_dpcd(</div><div class='del'>-				link,</div><div class='del'>-				DP_TRAINING_AUX_RD_INTERVAL,</div><div class='del'>-				(uint8_t *)&amp;training_rd_interval,</div><div class='del'>-				sizeof(training_rd_interval));</div><div class='del'>-		if (lttpr_mode != LTTPR_MODE_NON_TRANSPARENT)</div><div class='del'>-			wait_in_micro_secs = 400;</div><div class='del'>-		if (training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL)</div><div class='del'>-			wait_in_micro_secs = training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL * 4000;</div><div class='add'>+	if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING) {</div><div class='add'>+		if (link-&gt;dpcd_caps.dpcd_rev.raw &gt;= DPCD_REV_12)</div><div class='add'>+			core_link_read_dpcd(</div><div class='add'>+					link,</div><div class='add'>+					DP_TRAINING_AUX_RD_INTERVAL,</div><div class='add'>+					(uint8_t *)&amp;training_rd_interval,</div><div class='add'>+					sizeof(training_rd_interval));</div><div class='add'>+		else if (dp_is_lttpr_present(link))</div><div class='add'>+			get_default_8b_10b_lttpr_aux_rd_interval(&amp;training_rd_interval);</div><div class='add'>+</div><div class='add'>+		if (training_rd_interval.raw != 0) {</div><div class='add'>+			if (lttpr_mode != LTTPR_MODE_NON_TRANSPARENT)</div><div class='add'>+				wait_in_micro_secs = 400;</div><div class='add'>+			if (training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL)</div><div class='add'>+				wait_in_micro_secs = training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL * 4000;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return wait_in_micro_secs;</div><div class='ctx'> }</div><div class='hunk'>@@ -71,13 +87,15 @@ static uint32_t get_eq_training_aux_rd_interval(</div><div class='ctx'> 				DP_128B132B_TRAINING_AUX_RD_INTERVAL,</div><div class='ctx'> 				(uint8_t *)&amp;training_rd_interval,</div><div class='ctx'> 				sizeof(training_rd_interval));</div><div class='del'>-	} else if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING &amp;&amp;</div><div class='del'>-			link-&gt;dpcd_caps.dpcd_rev.raw &gt;= DPCD_REV_12) {</div><div class='del'>-		core_link_read_dpcd(</div><div class='del'>-				link,</div><div class='del'>-				DP_TRAINING_AUX_RD_INTERVAL,</div><div class='del'>-				(uint8_t *)&amp;training_rd_interval,</div><div class='del'>-				sizeof(training_rd_interval));</div><div class='add'>+	} else if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING) {</div><div class='add'>+		if (link-&gt;dpcd_caps.dpcd_rev.raw &gt;= DPCD_REV_12)</div><div class='add'>+			core_link_read_dpcd(</div><div class='add'>+					link,</div><div class='add'>+					DP_TRAINING_AUX_RD_INTERVAL,</div><div class='add'>+					(uint8_t *)&amp;training_rd_interval,</div><div class='add'>+					sizeof(training_rd_interval));</div><div class='add'>+		else if (dp_is_lttpr_present(link))</div><div class='add'>+			get_default_8b_10b_lttpr_aux_rd_interval(&amp;training_rd_interval);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (training_rd_interval.bits.TRAINIG_AUX_RD_INTERVAL) {</div><div class='hunk'>@@ -124,6 +142,14 @@ void decide_8b_10b_training_settings(</div><div class='ctx'> 	lt_settings-&gt;lttpr_mode = dp_decide_8b_10b_lttpr_mode(link);</div><div class='ctx'> 	lt_settings-&gt;cr_pattern_time = get_cr_training_aux_rd_interval(link, link_setting, lt_settings-&gt;lttpr_mode);</div><div class='ctx'> 	dp_hw_to_dpcd_lane_settings(lt_settings, lt_settings-&gt;hw_lane_settings, lt_settings-&gt;dpcd_lane_settings);</div><div class='add'>+</div><div class='add'>+	/* Some embedded LTTPRs rely on receiving TPS2 before LT to interop reliably with sensitive VGA dongles</div><div class='add'>+	 * This allows these LTTPRs to minimize freq/phase and skew variation during lock and deskew sequences</div><div class='add'>+	 */</div><div class='add'>+	if ((link-&gt;chip_caps &amp; AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) ==</div><div class='add'>+			AMD_EXT_DISPLAY_PATH_CAPS__DP_EARLY_8B10B_TPS2) {</div><div class='add'>+		lt_settings-&gt;lttpr_early_tps2 = true;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum lttpr_mode dp_decide_8b_10b_lttpr_mode(struct dc_link *link)</div><div class='hunk'>@@ -155,6 +181,42 @@ enum lttpr_mode dp_decide_8b_10b_lttpr_mode(struct dc_link *link)</div><div class='ctx'> 	return LTTPR_MODE_NON_LTTPR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void set_link_settings_and_perform_early_tps2_retimer_pre_lt_sequence(struct dc_link *link,</div><div class='add'>+	const struct link_resource *link_res,</div><div class='add'>+	struct link_training_settings *lt_settings,</div><div class='add'>+	uint32_t lttpr_count)</div><div class='add'>+{</div><div class='add'>+	/* Vendor-specific LTTPR early TPS2 sequence:</div><div class='add'>+	* 1. Output TPS2</div><div class='add'>+	* 2. Wait 400us</div><div class='add'>+	* 3. Set link settings as usual</div><div class='add'>+	* 4. Write TPS1 to DP_TRAINING_PATTERN_SET_PHY_REPEATERx targeting LTTPR closest to host</div><div class='add'>+	* 5. Wait 1ms</div><div class='add'>+	* 6. Begin link training as usual</div><div class='add'>+	* */</div><div class='add'>+</div><div class='add'>+	uint32_t closest_lttpr_address_offset = dp_get_closest_lttpr_offset(lttpr_count);</div><div class='add'>+</div><div class='add'>+	union dpcd_training_pattern dpcd_pattern = {0};</div><div class='add'>+</div><div class='add'>+	dpcd_pattern.v1_4.TRAINING_PATTERN_SET = 1;</div><div class='add'>+	dpcd_pattern.v1_4.SCRAMBLING_DISABLE = 1;</div><div class='add'>+</div><div class='add'>+	DC_LOG_HW_LINK_TRAINING("%s\n GPU sends TPS2. Wait 400us.\n", __func__);</div><div class='add'>+</div><div class='add'>+	dp_set_hw_training_pattern(link, link_res, DP_TRAINING_PATTERN_SEQUENCE_2, DPRX);</div><div class='add'>+</div><div class='add'>+	dp_set_hw_lane_settings(link, link_res, lt_settings, DPRX);</div><div class='add'>+</div><div class='add'>+	udelay(400);</div><div class='add'>+</div><div class='add'>+	dpcd_set_link_settings(link, lt_settings);</div><div class='add'>+</div><div class='add'>+	core_link_write_dpcd(link, DP_TRAINING_PATTERN_SET_PHY_REPEATER1 + closest_lttpr_address_offset, &amp;dpcd_pattern.raw, 1);</div><div class='add'>+</div><div class='add'>+	udelay(1000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> enum link_training_result perform_8b_10b_clock_recovery_sequence(</div><div class='ctx'> 	struct dc_link *link,</div><div class='ctx'> 	const struct link_resource *link_res,</div><div class='hunk'>@@ -365,7 +427,7 @@ enum link_training_result dp_perform_8b_10b_link_training(</div><div class='ctx'> {</div><div class='ctx'> 	enum link_training_result status = LINK_TRAINING_SUCCESS;</div><div class='ctx'> </div><div class='del'>-	uint8_t repeater_cnt;</div><div class='add'>+	uint8_t repeater_cnt = dp_parse_lttpr_repeater_count(link-&gt;dpcd_caps.lttpr_caps.phy_repeater_cnt);</div><div class='ctx'> 	uint8_t repeater_id;</div><div class='ctx'> 	uint8_t lane = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -373,14 +435,16 @@ enum link_training_result dp_perform_8b_10b_link_training(</div><div class='ctx'> 		start_clock_recovery_pattern_early(link, link_res, lt_settings, DPRX);</div><div class='ctx'> </div><div class='ctx'> 	/* 1. set link rate, lane count and spread. */</div><div class='del'>-	dpcd_set_link_settings(link, lt_settings);</div><div class='add'>+	if (lt_settings-&gt;lttpr_early_tps2)</div><div class='add'>+		set_link_settings_and_perform_early_tps2_retimer_pre_lt_sequence(link, link_res, lt_settings, repeater_cnt);</div><div class='add'>+	else</div><div class='add'>+		dpcd_set_link_settings(link, lt_settings);</div><div class='ctx'> </div><div class='ctx'> 	if (lt_settings-&gt;lttpr_mode == LTTPR_MODE_NON_TRANSPARENT) {</div><div class='ctx'> </div><div class='ctx'> 		/* 2. perform link training (set link training done</div><div class='ctx'> 		 *  to false is done as well)</div><div class='ctx'> 		 */</div><div class='del'>-		repeater_cnt = dp_parse_lttpr_repeater_count(link-&gt;dpcd_caps.lttpr_caps.phy_repeater_cnt);</div><div class='ctx'> </div><div class='ctx'> 		for (repeater_id = repeater_cnt; (repeater_id &gt; 0 &amp;&amp; status == LINK_TRAINING_SUCCESS);</div><div class='ctx'> 				repeater_id--) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c<br/>index 1e4adbc764ea..da74c2b5854f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c</a></div><div class='hunk'>@@ -524,7 +524,7 @@ bool edp_set_backlight_level(const struct dc_link *link,</div><div class='ctx'> 	struct dc  *dc = link-&gt;ctx-&gt;dc;</div><div class='ctx'> 	uint32_t backlight_pwm_u16_16 = backlight_level_params-&gt;backlight_pwm_u16_16;</div><div class='ctx'> 	uint32_t frame_ramp = backlight_level_params-&gt;frame_ramp;</div><div class='del'>-	DC_LOGGER_INIT(link-&gt;ctx-&gt;logger);</div><div class='add'>+</div><div class='ctx'> 	DC_LOG_BACKLIGHT("New Backlight level: %d (0x%X)\n",</div><div class='ctx'> 			backlight_pwm_u16_16, backlight_pwm_u16_16);</div><div class='ctx'> </div><div class='hunk'>@@ -1022,6 +1022,9 @@ bool edp_setup_replay(struct dc_link *link, const struct dc_stream_state *stream</div><div class='ctx'> 			&amp;alpm_config.raw,</div><div class='ctx'> 			sizeof(alpm_config.raw));</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	link-&gt;replay_settings.config.replay_video_conferencing_optimization_enabled = false;</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1130,11 +1133,11 @@ static struct abm *get_abm_from_stream_res(const struct dc_link *link)</div><div class='ctx'> 	struct abm *abm = NULL;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_PIPES; i++) {</div><div class='del'>-		struct pipe_ctx pipe_ctx = dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='del'>-		struct dc_stream_state *stream = pipe_ctx.stream;</div><div class='add'>+		struct pipe_ctx *pipe_ctx = &amp;dc-&gt;current_state-&gt;res_ctx.pipe_ctx[i];</div><div class='add'>+		struct dc_stream_state *stream = pipe_ctx-&gt;stream;</div><div class='ctx'> </div><div class='ctx'> 		if (stream &amp;&amp; stream-&gt;link == link) {</div><div class='del'>-			abm = pipe_ctx.stream_res.abm;</div><div class='add'>+			abm = pipe_ctx-&gt;stream_res.abm;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c b/drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c<br/>index a0e9e9f0441a..b4cea2b8cb2a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c</a></div><div class='hunk'>@@ -370,275 +370,279 @@ void mpc32_program_shaper_luta_settings(</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_BASE_B, params-&gt;corner_points[1].red.custom_float_y);</div><div class='ctx'> </div><div class='ctx'> 	curve = params-&gt;arr_curve_points;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_0_1[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_2_3[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_4_5[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_6_7[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_8_9[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_10_11[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_12_13[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_14_15[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_16_17[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_18_19[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_20_21[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_22_23[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_24_25[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_26_27[mpcc_id], 0,</div><div class='add'>+	if (curve) {</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_0_1[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_28_29[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_30_31[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_32_33[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-void mpc32_program_shaper_lutb_settings(</div><div class='del'>-		struct mpc *mpc,</div><div class='del'>-		const struct pwl_params *params,</div><div class='del'>-		uint32_t mpcc_id)</div><div class='del'>-{</div><div class='del'>-	const struct gamma_curve *curve;</div><div class='del'>-	struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);</div><div class='del'>-</div><div class='del'>-	REG_SET_2(MPCC_MCM_SHAPER_RAMB_START_CNTL_B[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_B, params-&gt;corner_points[0].blue.custom_float_x,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B, 0);</div><div class='del'>-	REG_SET_2(MPCC_MCM_SHAPER_RAMB_START_CNTL_G[mpcc_id], 0,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_B, params-&gt;corner_points[0].green.custom_float_x,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B, 0);</div><div class='del'>-	REG_SET_2(MPCC_MCM_SHAPER_RAMB_START_CNTL_R[mpcc_id], 0,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_B, params-&gt;corner_points[0].red.custom_float_x,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B, 0);</div><div class='del'>-</div><div class='del'>-	REG_SET_2(MPCC_MCM_SHAPER_RAMB_END_CNTL_B[mpcc_id], 0,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_B, params-&gt;corner_points[1].blue.custom_float_x,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_BASE_B, params-&gt;corner_points[1].blue.custom_float_y);</div><div class='del'>-	REG_SET_2(MPCC_MCM_SHAPER_RAMB_END_CNTL_G[mpcc_id], 0,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_B, params-&gt;corner_points[1].green.custom_float_x,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_BASE_B, params-&gt;corner_points[1].green.custom_float_y);</div><div class='del'>-	REG_SET_2(MPCC_MCM_SHAPER_RAMB_END_CNTL_R[mpcc_id], 0,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_B, params-&gt;corner_points[1].red.custom_float_x,</div><div class='del'>-			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_BASE_B, params-&gt;corner_points[1].red.custom_float_y);</div><div class='del'>-</div><div class='del'>-	curve = params-&gt;arr_curve_points;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_0_1[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_2_3[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_2_3[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_4_5[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_4_5[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_6_7[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_6_7[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_8_9[mpcc_id], 0,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='del'>-		MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_8_9[mpcc_id], 0,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_10_11[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_10_11[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_12_13[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_12_13[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_14_15[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_14_15[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_16_17[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_16_17[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_18_19[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_18_19[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_20_21[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_20_21[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_22_23[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_22_23[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_24_25[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_24_25[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_26_27[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_26_27[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_28_29[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_28_29[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_30_31[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_30_31[mpcc_id], 0,</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMA_REGION_32_33[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+void mpc32_program_shaper_lutb_settings(</div><div class='add'>+		struct mpc *mpc,</div><div class='add'>+		const struct pwl_params *params,</div><div class='add'>+		uint32_t mpcc_id)</div><div class='add'>+{</div><div class='add'>+	const struct gamma_curve *curve;</div><div class='add'>+	struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);</div><div class='add'>+</div><div class='add'>+	REG_SET_2(MPCC_MCM_SHAPER_RAMB_START_CNTL_B[mpcc_id], 0,</div><div class='add'>+		MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_B, params-&gt;corner_points[0].blue.custom_float_x,</div><div class='add'>+		MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B, 0);</div><div class='add'>+	REG_SET_2(MPCC_MCM_SHAPER_RAMB_START_CNTL_G[mpcc_id], 0,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_B, params-&gt;corner_points[0].green.custom_float_x,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B, 0);</div><div class='add'>+	REG_SET_2(MPCC_MCM_SHAPER_RAMB_START_CNTL_R[mpcc_id], 0,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_B, params-&gt;corner_points[0].red.custom_float_x,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_START_SEGMENT_B, 0);</div><div class='ctx'> </div><div class='del'>-	curve += 2;</div><div class='del'>-	REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_32_33[mpcc_id], 0,</div><div class='add'>+	REG_SET_2(MPCC_MCM_SHAPER_RAMB_END_CNTL_B[mpcc_id], 0,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_B, params-&gt;corner_points[1].blue.custom_float_x,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_BASE_B, params-&gt;corner_points[1].blue.custom_float_y);</div><div class='add'>+	REG_SET_2(MPCC_MCM_SHAPER_RAMB_END_CNTL_G[mpcc_id], 0,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_B, params-&gt;corner_points[1].green.custom_float_x,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_BASE_B, params-&gt;corner_points[1].green.custom_float_y);</div><div class='add'>+	REG_SET_2(MPCC_MCM_SHAPER_RAMB_END_CNTL_R[mpcc_id], 0,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_B, params-&gt;corner_points[1].red.custom_float_x,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION_END_BASE_B, params-&gt;corner_points[1].red.custom_float_y);</div><div class='add'>+</div><div class='add'>+	curve = params-&gt;arr_curve_points;</div><div class='add'>+	if (curve) {</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_0_1[mpcc_id], 0,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='ctx'> 			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_2_3[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_4_5[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_6_7[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_8_9[mpcc_id], 0,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+			MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_10_11[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_12_13[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_14_15[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_16_17[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_18_19[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_20_21[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_22_23[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_24_25[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_26_27[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_28_29[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_30_31[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+</div><div class='add'>+		curve += 2;</div><div class='add'>+		REG_SET_4(MPCC_MCM_SHAPER_RAMB_REGION_32_33[mpcc_id], 0,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_LUT_OFFSET, curve[0].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION0_NUM_SEGMENTS, curve[0].segments_num,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_LUT_OFFSET, curve[1].offset,</div><div class='add'>+				MPCC_MCM_SHAPER_RAMA_EXP_REGION1_NUM_SEGMENTS, curve[1].segments_num);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c b/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c<br/>index ad67197557ca..98cf0cbd59ba 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.c</a></div><div class='hunk'>@@ -47,16 +47,6 @@ void mpc401_update_3dlut_fast_load_select(struct mpc *mpc, int mpcc_id, int hubp</div><div class='ctx'> 	REG_SET(MPCC_MCM_3DLUT_FAST_LOAD_SELECT[mpcc_id], 0, MPCC_MCM_3DLUT_FL_SEL, hubp_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mpc401_get_3dlut_fast_load_status(struct mpc *mpc, int mpcc_id, uint32_t *done, uint32_t *soft_underflow, uint32_t *hard_underflow)</div><div class='del'>-{</div><div class='del'>-	struct dcn401_mpc *mpc401 = TO_DCN401_MPC(mpc);</div><div class='del'>-</div><div class='del'>-	REG_GET_3(MPCC_MCM_3DLUT_FAST_LOAD_STATUS[mpcc_id],</div><div class='del'>-			MPCC_MCM_3DLUT_FL_DONE, done,</div><div class='del'>-			MPCC_MCM_3DLUT_FL_SOFT_UNDERFLOW, soft_underflow,</div><div class='del'>-			MPCC_MCM_3DLUT_FL_HARD_UNDERFLOW, hard_underflow);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void mpc401_set_movable_cm_location(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct dcn401_mpc *mpc401 = TO_DCN401_MPC(mpc);</div><div class='hunk'>@@ -618,7 +608,6 @@ static const struct mpc_funcs dcn401_mpc_funcs = {</div><div class='ctx'> 	.set_bg_color = mpc1_set_bg_color,</div><div class='ctx'> 	.set_movable_cm_location = mpc401_set_movable_cm_location,</div><div class='ctx'> 	.update_3dlut_fast_load_select = mpc401_update_3dlut_fast_load_select,</div><div class='del'>-	.get_3dlut_fast_load_status = mpc401_get_3dlut_fast_load_status,</div><div class='ctx'> 	.populate_lut = mpc401_populate_lut,</div><div class='ctx'> 	.program_lut_read_write_control = mpc401_program_lut_read_write_control,</div><div class='ctx'> 	.program_lut_mode = mpc401_program_lut_mode,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h b/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h<br/>index ce6fbcf14d7a..8e35ebc603a9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/mpc/dcn401/dcn401_mpc.h</a></div><div class='hunk'>@@ -241,23 +241,9 @@ void mpc401_update_3dlut_fast_load_select(</div><div class='ctx'> 	int mpcc_id,</div><div class='ctx'> 	int hubp_idx);</div><div class='ctx'> </div><div class='del'>-void mpc401_get_3dlut_fast_load_status(</div><div class='del'>-	struct mpc *mpc,</div><div class='del'>-	int mpcc_id,</div><div class='del'>-	uint32_t *done,</div><div class='del'>-	uint32_t *soft_underflow,</div><div class='del'>-	uint32_t *hard_underflow);</div><div class='del'>-</div><div class='ctx'> void mpc401_update_3dlut_fast_load_select(</div><div class='ctx'> 	struct mpc *mpc,</div><div class='ctx'> 	int mpcc_id,</div><div class='ctx'> 	int hubp_idx);</div><div class='ctx'> </div><div class='del'>-void mpc401_get_3dlut_fast_load_status(</div><div class='del'>-	struct mpc *mpc,</div><div class='del'>-	int mpcc_id,</div><div class='del'>-	uint32_t *done,</div><div class='del'>-	uint32_t *soft_underflow,</div><div class='del'>-	uint32_t *hard_underflow);</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c<br/>index b86fe2b094f8..4cfc6c0fa147 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c</a></div><div class='hunk'>@@ -507,6 +507,7 @@ void dcn35_timing_generator_init(struct optc *optc1)</div><div class='ctx'> 	optc1-&gt;min_v_blank_interlace = 5;</div><div class='ctx'> 	optc1-&gt;min_h_sync_width = 4;</div><div class='ctx'> 	optc1-&gt;min_v_sync_width = 1;</div><div class='add'>+	optc1-&gt;max_frame_count = 0xFFFFFF;</div><div class='ctx'> </div><div class='ctx'> 	dcn35_timing_generator_set_fgcg(</div><div class='ctx'> 		optc1, CTX-&gt;dc-&gt;debug.enable_fine_grain_clock_gating.bits.optc);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/Makefile b/drivers/gpu/drm/amd/display/dc/resource/Makefile<br/>index b8cddef6b3d2..5b42da8b79c2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/Makefile?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/Makefile</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/Makefile?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/Makefile</a></div><div class='hunk'>@@ -27,6 +27,24 @@</div><div class='ctx'> #  DCE</div><div class='ctx'> ###############################################################################</div><div class='ctx'> </div><div class='add'>+ifdef CONFIG_DRM_AMD_DC_SI</div><div class='add'>+RESOURCE_DCE60 = dce60_resource.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_RESOURCE_DCE60 = $(addprefix $(AMDDALPATH)/dc/resource/dce60/,$(RESOURCE_DCE60))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCE60)</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='add'>+RESOURCE_DCE80 = dce80_resource.o</div><div class='add'>+</div><div class='add'>+AMD_DAL_RESOURCE_DCE80 = $(addprefix $(AMDDALPATH)/dc/resource/dce80/,$(RESOURCE_DCE80))</div><div class='add'>+</div><div class='add'>+AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCE80)</div><div class='add'>+</div><div class='add'>+###############################################################################</div><div class='add'>+</div><div class='ctx'> RESOURCE_DCE100 = dce100_resource.o</div><div class='ctx'> </div><div class='ctx'> AMD_DAL_RESOURCE_DCE100 = $(addprefix $(AMDDALPATH)/dc/resource/dce100/,$(RESOURCE_DCE100))</div><div class='hunk'>@@ -57,14 +75,6 @@ AMD_DAL_RESOURCE_DCE120 = $(addprefix $(AMDDALPATH)/dc/resource/dce120/,$(RESOUR</div><div class='ctx'> </div><div class='ctx'> AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCE120)</div><div class='ctx'> </div><div class='del'>-###############################################################################</div><div class='del'>-</div><div class='del'>-RESOURCE_DCE80 = dce80_resource.o</div><div class='del'>-</div><div class='del'>-AMD_DAL_RESOURCE_DCE80 = $(addprefix $(AMDDALPATH)/dc/resource/dce80/,$(RESOURCE_DCE80))</div><div class='del'>-</div><div class='del'>-AMD_DISPLAY_FILES += $(AMD_DAL_RESOURCE_DCE80)</div><div class='del'>-</div><div class='ctx'> ifdef CONFIG_DRM_AMD_DC_FP</div><div class='ctx'> ###############################################################################</div><div class='ctx'> # DCN</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c<br/>index e698543ec937..84f73fdb0f95 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c</a></div><div class='hunk'>@@ -836,7 +836,7 @@ static enum dc_status build_mapped_resource(</div><div class='ctx'> 	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dce100_validate_bandwidth(</div><div class='add'>+static enum dc_status dce100_validate_bandwidth(</div><div class='ctx'> 	struct dc  *dc,</div><div class='ctx'> 	struct dc_state *context,</div><div class='ctx'> 	bool fast_validate)</div><div class='hunk'>@@ -858,7 +858,7 @@ static bool dce100_validate_bandwidth(</div><div class='ctx'> 		context-&gt;bw_ctx.bw.dce.yclk_khz = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool dce100_validate_surface_sets(</div><div class='hunk'>@@ -1069,7 +1069,7 @@ static bool dce100_resource_construct(</div><div class='ctx'> 	pool-&gt;base.timing_generator_count = pool-&gt;base.res_cap-&gt;num_timing_generator;</div><div class='ctx'> 	dc-&gt;caps.max_downscale_ratio = 200;</div><div class='ctx'> 	dc-&gt;caps.i2c_speed_in_khz = 40;</div><div class='del'>-	dc-&gt;caps.i2c_speed_in_khz = 40;</div><div class='add'>+	dc-&gt;caps.i2c_speed_in_khz_hdcp = 40;</div><div class='ctx'> 	dc-&gt;caps.max_cursor_size = 128;</div><div class='ctx'> 	dc-&gt;caps.min_horizontal_blanking_period = 80;</div><div class='ctx'> 	dc-&gt;caps.dual_link_dvi = true;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c<br/>index 035c6cfdaee5..f3d5baac11bf 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c</a></div><div class='hunk'>@@ -960,7 +960,7 @@ static enum dc_status build_mapped_resource(</div><div class='ctx'> 	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dce110_validate_bandwidth(</div><div class='add'>+static enum dc_status dce110_validate_bandwidth(</div><div class='ctx'> 	struct dc *dc,</div><div class='ctx'> 	struct dc_state *context,</div><div class='ctx'> 	bool fast_validate)</div><div class='hunk'>@@ -1031,7 +1031,7 @@ static bool dce110_validate_bandwidth(</div><div class='ctx'> 			context-&gt;bw_ctx.bw.dce.yclk_khz,</div><div class='ctx'> 			context-&gt;bw_ctx.bw.dce.blackout_recovery_time_us);</div><div class='ctx'> 	}</div><div class='del'>-	return result;</div><div class='add'>+	return result ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c<br/>index 480a50967385..4225cae68c10 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c</a></div><div class='hunk'>@@ -883,7 +883,7 @@ static enum dc_status build_mapped_resource(</div><div class='ctx'> 	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dce112_validate_bandwidth(</div><div class='add'>+enum dc_status dce112_validate_bandwidth(</div><div class='ctx'> 	struct dc *dc,</div><div class='ctx'> 	struct dc_state *context,</div><div class='ctx'> 	bool fast_validate)</div><div class='hunk'>@@ -952,7 +952,7 @@ bool dce112_validate_bandwidth(</div><div class='ctx'> 			context-&gt;bw_ctx.bw.dce.yclk_khz,</div><div class='ctx'> 			context-&gt;bw_ctx.bw.dce.blackout_recovery_time_us);</div><div class='ctx'> 	}</div><div class='del'>-	return result;</div><div class='add'>+	return result ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum dc_status resource_map_phy_clock_resources(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h<br/>index 1f57ebc6f9b4..6221d749246d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.h</a></div><div class='hunk'>@@ -42,7 +42,7 @@ enum dc_status dce112_validate_with_context(</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		struct dc_state *old_context);</div><div class='ctx'> </div><div class='del'>-bool dce112_validate_bandwidth(</div><div class='add'>+enum dc_status dce112_validate_bandwidth(</div><div class='ctx'> 	struct dc *dc,</div><div class='ctx'> 	struct dc_state *context,</div><div class='ctx'> 	bool fast_validate);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c<br/>index 889f314cac65..d9ffdded5ce1 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c</a></div><div class='hunk'>@@ -48,7 +48,7 @@</div><div class='ctx'> #include "dce/dce_clock_source.h"</div><div class='ctx'> #include "dce/dce_audio.h"</div><div class='ctx'> #include "dce/dce_hwseq.h"</div><div class='del'>-#include "dce60/dce60_hw_sequencer.h"</div><div class='add'>+#include "dce60/dce60_hwseq.h"</div><div class='ctx'> #include "dce100/dce100_resource.h"</div><div class='ctx'> #include "dce/dce_panel_cntl.h"</div><div class='ctx'> </div><div class='hunk'>@@ -863,7 +863,7 @@ static void dce60_resource_destruct(struct dce110_resource_pool *pool)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dce60_validate_bandwidth(</div><div class='add'>+static enum dc_status dce60_validate_bandwidth(</div><div class='ctx'> 	struct dc *dc,</div><div class='ctx'> 	struct dc_state *context,</div><div class='ctx'> 	bool fast_validate)</div><div class='hunk'>@@ -885,7 +885,7 @@ static bool dce60_validate_bandwidth(</div><div class='ctx'> 		context-&gt;bw_ctx.bw.dce.yclk_khz = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool dce60_validate_surface_sets(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.h<br/>index 5d653a76b0b0..5d653a76b0b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/dce60/dce60_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.h</a></div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c<br/>index 3d5113f010bb..bd5811f97531 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c</a></div><div class='hunk'>@@ -869,7 +869,7 @@ static void dce80_resource_destruct(struct dce110_resource_pool *pool)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dce80_validate_bandwidth(</div><div class='add'>+static enum dc_status dce80_validate_bandwidth(</div><div class='ctx'> 	struct dc *dc,</div><div class='ctx'> 	struct dc_state *context,</div><div class='ctx'> 	bool fast_validate)</div><div class='hunk'>@@ -891,7 +891,7 @@ static bool dce80_validate_bandwidth(</div><div class='ctx'> 		context-&gt;bw_ctx.bw.dce.yclk_khz = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool dce80_validate_surface_sets(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c<br/>index e92f14d50adb..be4ade0853e9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "core_status.h"</div><div class='ctx'> #include "dm_services.h"</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1125,7 +1126,7 @@ static void dcn10_destroy_resource_pool(struct resource_pool **pool)</div><div class='ctx'> 	*pool = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool dcn10_validate_bandwidth(</div><div class='add'>+static enum dc_status dcn10_validate_bandwidth(</div><div class='ctx'> 		struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='hunk'>@@ -1136,7 +1137,7 @@ static bool dcn10_validate_bandwidth(</div><div class='ctx'> 	voltage_supported = dcn_validate_bandwidth(dc, context, fast_validate);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='del'>-	return voltage_supported;</div><div class='add'>+	return voltage_supported ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)</div><div class='hunk'>@@ -1245,6 +1246,10 @@ struct stream_encoder *dcn10_find_first_free_match_stream_enc_for_link(</div><div class='ctx'> 			if (link-&gt;ep_type == DISPLAY_ENDPOINT_PHY &amp;&amp; pool-&gt;stream_enc[i]-&gt;id ==</div><div class='ctx'> 					link-&gt;link_enc-&gt;preferred_engine)</div><div class='ctx'> 				return pool-&gt;stream_enc[i];</div><div class='add'>+</div><div class='add'>+			if (link-&gt;ep_type == DISPLAY_ENDPOINT_USB4_DPIA &amp;&amp; pool-&gt;stream_enc[i]-&gt;id ==</div><div class='add'>+					link-&gt;dpia_preferred_eng_id)</div><div class='add'>+				return pool-&gt;stream_enc[i];</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c<br/>index e4eca3e32c1b..3405be07f5e3 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c</a></div><div class='hunk'>@@ -2124,7 +2124,7 @@ validate_out:</div><div class='ctx'> 	return out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='add'>+enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='ctx'> 	bool voltage_supported;</div><div class='hunk'>@@ -2132,14 +2132,14 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='ctx'> </div><div class='ctx'> 	pipes = kcalloc(dc-&gt;res_pool-&gt;pipe_count, sizeof(display_e2e_pipe_params_st), GFP_KERNEL);</div><div class='ctx'> 	if (!pipes)</div><div class='del'>-		return false;</div><div class='add'>+		return DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	voltage_supported = dcn20_validate_bandwidth_fp(dc, context, fast_validate, pipes);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='ctx'> 	kfree(pipes);</div><div class='del'>-	return voltage_supported;</div><div class='add'>+	return voltage_supported ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct pipe_ctx *dcn20_acquire_free_pipe_for_layer(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h<br/>index 4cee3fa11a7f..c0e062c7407d 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h</a></div><div class='hunk'>@@ -119,7 +119,7 @@ void dcn20_set_mcif_arb_params(</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		display_e2e_pipe_params_st *pipes,</div><div class='ctx'> 		int pipe_cnt);</div><div class='del'>-bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);</div><div class='add'>+enum dc_status dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);</div><div class='ctx'> void dcn20_merge_pipes_for_validate(</div><div class='ctx'> 		struct dc *dc,</div><div class='ctx'> 		struct dc_state *context);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c<br/>index 4bd5c2278596..9ab01b65b177 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c</a></div><div class='hunk'>@@ -923,7 +923,7 @@ validate_out:</div><div class='ctx'>  * with DC_FP_START()/DC_FP_END(). Use the same approach as for</div><div class='ctx'>  * dcn20_validate_bandwidth in dcn20_resource.c.</div><div class='ctx'>  */</div><div class='del'>-static bool dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='add'>+static enum dc_status dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='ctx'> 	bool voltage_supported;</div><div class='hunk'>@@ -931,14 +931,14 @@ static bool dcn21_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='ctx'> </div><div class='ctx'> 	pipes = kcalloc(dc-&gt;res_pool-&gt;pipe_count, sizeof(display_e2e_pipe_params_st), GFP_KERNEL);</div><div class='ctx'> 	if (!pipes)</div><div class='del'>-		return false;</div><div class='add'>+		return DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	voltage_supported = dcn21_validate_bandwidth_fp(dc, context, fast_validate, pipes);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='ctx'> 	kfree(pipes);</div><div class='del'>-	return voltage_supported;</div><div class='add'>+	return voltage_supported ? DC_OK : DC_NOT_SUPPORTED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dcn21_destroy_resource_pool(struct resource_pool **pool)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c<br/>index f01ced015072..f631ae34e320 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c</a></div><div class='hunk'>@@ -1891,8 +1891,6 @@ static int get_refresh_rate(struct dc_state *context)</div><div class='ctx'> </div><div class='ctx'> 	/* check if refresh rate at least 120hz */</div><div class='ctx'> 	timing = &amp;context-&gt;streams[0]-&gt;timing;</div><div class='del'>-	if (timing == NULL)</div><div class='del'>-		return 0;</div><div class='ctx'> </div><div class='ctx'> 	h_v_total = timing-&gt;h_total * timing-&gt;v_total;</div><div class='ctx'> 	if (h_v_total == 0)</div><div class='hunk'>@@ -2037,7 +2035,7 @@ void dcn30_calculate_wm_and_dlg(</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn30_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn30_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='hunk'>@@ -2094,7 +2092,7 @@ validate_out:</div><div class='ctx'> </div><div class='ctx'> 	BW_VAL_TRACE_FINISH();</div><div class='ctx'> </div><div class='del'>-	return out;</div><div class='add'>+	return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h<br/>index 8e6b8b7368fd..689d9bdace81 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.h</a></div><div class='hunk'>@@ -56,7 +56,7 @@ unsigned int dcn30_calc_max_scaled_time(</div><div class='ctx'> 		enum mmhubbub_wbif_mode mode,</div><div class='ctx'> 		unsigned int urgent_watermark);</div><div class='ctx'> </div><div class='del'>-bool dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='add'>+enum dc_status dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,</div><div class='ctx'> 		bool fast_validate);</div><div class='ctx'> bool dcn30_internal_validate_bw(</div><div class='ctx'> 		struct dc *dc,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c<br/>index dddddbfef85f..7e0af5297dc4 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c</a></div><div class='hunk'>@@ -1758,7 +1758,7 @@ dcn31_set_mcif_arb_params(struct dc *dc,</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn31_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn31_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='hunk'>@@ -1813,7 +1813,7 @@ validate_out:</div><div class='ctx'> </div><div class='ctx'> 	BW_VAL_TRACE_FINISH();</div><div class='ctx'> </div><div class='del'>-	return out;</div><div class='add'>+	return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dcn31_get_panel_config_defaults(struct dc_panel_config *panel_config)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h<br/>index 551ad912f7be..dd82815d7efe 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.h</a></div><div class='hunk'>@@ -37,7 +37,7 @@ struct dcn31_resource_pool {</div><div class='ctx'> 	struct resource_pool base;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-bool dcn31_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn31_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate);</div><div class='ctx'> void dcn31_calculate_wm_and_dlg(</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c<br/>index 26becc4cb804..d96bc6cb73ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c</a></div><div class='hunk'>@@ -1694,7 +1694,7 @@ static void dcn314_get_panel_config_defaults(struct dc_panel_config *panel_confi</div><div class='ctx'> 	*panel_config = panel_config_defaults;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn314_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn314_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='hunk'>@@ -1750,7 +1750,7 @@ validate_out:</div><div class='ctx'> </div><div class='ctx'> 	BW_VAL_TRACE_FINISH();</div><div class='ctx'> </div><div class='del'>-	return out;</div><div class='add'>+	return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource_funcs dcn314_res_pool_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h<br/>index 49ffe71018df..f8ba531d6342 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.h</a></div><div class='hunk'>@@ -39,7 +39,7 @@ struct dcn314_resource_pool {</div><div class='ctx'> 	struct resource_pool base;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-bool dcn314_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn314_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c<br/>index 2a59cc61ed8c..bb0dae0be5b8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "dc_types.h"</div><div class='ctx'> #include "dm_services.h"</div><div class='ctx'> #include "dc.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1806,19 +1807,56 @@ validate_out:</div><div class='ctx'> 	return out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn32_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn32_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='del'>-	bool out = false;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	enum dc_status status;</div><div class='add'>+	const struct dc_stream_state *stream;</div><div class='add'>+</div><div class='add'>+	/* reset cursor limitations on subvp */</div><div class='add'>+	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+		stream = context-&gt;streams[i];</div><div class='add'>+</div><div class='add'>+		if (dc_state_can_clear_stream_cursor_subvp_limit(stream, context)) {</div><div class='add'>+			dc_state_set_stream_cursor_subvp_limit(stream, context, false);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (dc-&gt;debug.using_dml2)</div><div class='del'>-		out = dml2_validate(dc, context,</div><div class='add'>+		status = dml2_validate(dc, context,</div><div class='ctx'> 				context-&gt;power_source == DC_POWER_SOURCE_DC ? context-&gt;bw_ctx.dml2_dc_power_source : context-&gt;bw_ctx.dml2,</div><div class='del'>-				fast_validate);</div><div class='add'>+				fast_validate) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> 	else</div><div class='del'>-		out = dml1_validate(dc, context, fast_validate);</div><div class='del'>-	return out;</div><div class='add'>+		status = dml1_validate(dc, context, fast_validate) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+</div><div class='add'>+	if (!fast_validate &amp;&amp; status == DC_OK &amp;&amp; dc_state_is_subvp_in_use(context)) {</div><div class='add'>+		/* check new stream configuration still supports cursor if subvp used */</div><div class='add'>+		for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+			stream = context-&gt;streams[i];</div><div class='add'>+</div><div class='add'>+			if (dc_state_get_stream_subvp_type(context, stream) != SUBVP_PHANTOM &amp;&amp;</div><div class='add'>+					stream-&gt;cursor_position.enable &amp;&amp;</div><div class='add'>+					!dc_stream_check_cursor_attributes(stream, context, &amp;stream-&gt;cursor_attributes)) {</div><div class='add'>+				/* hw cursor cannot be supported with subvp active, so disable subvp for now */</div><div class='add'>+				dc_state_set_stream_cursor_subvp_limit(stream, context, true);</div><div class='add'>+				status = DC_FAIL_HW_CURSOR_SUPPORT;</div><div class='add'>+			}</div><div class='add'>+		};</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!fast_validate &amp;&amp; status == DC_FAIL_HW_CURSOR_SUPPORT) {</div><div class='add'>+		/* attempt to validate again with subvp disabled due to cursor */</div><div class='add'>+		if (dc-&gt;debug.using_dml2)</div><div class='add'>+			status = dml2_validate(dc, context,</div><div class='add'>+					context-&gt;power_source == DC_POWER_SOURCE_DC ? context-&gt;bw_ctx.dml2_dc_power_source : context-&gt;bw_ctx.dml2,</div><div class='add'>+					fast_validate) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+		else</div><div class='add'>+			status = dml1_validate(dc, context, fast_validate) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int dcn32_populate_dml_pipes_from_context(</div><div class='hunk'>@@ -2042,6 +2080,18 @@ static void dcn32_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned int dcn32_get_max_hw_cursor_size(const struct dc *dc,</div><div class='add'>+			struct dc_state *state,</div><div class='add'>+			const struct dc_stream_state *stream)</div><div class='add'>+{</div><div class='add'>+	bool limit_cur_to_buf;</div><div class='add'>+</div><div class='add'>+	limit_cur_to_buf = dc_state_get_stream_subvp_cursor_limit(stream, state) &amp;&amp;</div><div class='add'>+			!stream-&gt;hw_cursor_req;</div><div class='add'>+</div><div class='add'>+	return limit_cur_to_buf ? dc-&gt;caps.max_buffered_cursor_size : dc-&gt;caps.max_cursor_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct resource_funcs dcn32_res_pool_funcs = {</div><div class='ctx'> 	.destroy = dcn32_destroy_resource_pool,</div><div class='ctx'> 	.link_enc_create = dcn32_link_encoder_create,</div><div class='hunk'>@@ -2067,7 +2117,8 @@ static struct resource_funcs dcn32_res_pool_funcs = {</div><div class='ctx'> 	.add_phantom_pipes = dcn32_add_phantom_pipes,</div><div class='ctx'> 	.build_pipe_pix_clk_params = dcn20_build_pipe_pix_clk_params,</div><div class='ctx'> 	.calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,</div><div class='del'>-	.get_vstartup_for_pipe = dcn10_get_vstartup_for_pipe</div><div class='add'>+	.get_vstartup_for_pipe = dcn10_get_vstartup_for_pipe,</div><div class='add'>+	.get_max_hw_cursor_size = dcn32_get_max_hw_cursor_size,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static uint32_t read_pipe_fuses(struct dc_context *ctx)</div><div class='hunk'>@@ -2114,8 +2165,6 @@ static bool dcn32_resource_construct(</div><div class='ctx'> #define REG_STRUCT dccg_regs</div><div class='ctx'> 	dccg_regs_init();</div><div class='ctx'> </div><div class='del'>-	DC_FP_START();</div><div class='del'>-</div><div class='ctx'> 	ctx-&gt;dc_bios-&gt;regs = &amp;bios_regs;</div><div class='ctx'> </div><div class='ctx'> 	pool-&gt;base.res_cap = &amp;res_cap_dcn32;</div><div class='hunk'>@@ -2153,6 +2202,7 @@ static bool dcn32_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.i2c_speed_in_khz_hdcp = 100; /*1.4 w/a applied by default*/</div><div class='ctx'> 	/* TODO: Bring max_cursor_size back to 256 after subvp cursor corruption is fixed*/</div><div class='ctx'> 	dc-&gt;caps.max_cursor_size = 64;</div><div class='add'>+	dc-&gt;caps.max_buffered_cursor_size = 64; // sqrt(16 * 1024 / 4)</div><div class='ctx'> 	dc-&gt;caps.min_horizontal_blanking_period = 80;</div><div class='ctx'> 	dc-&gt;caps.dmdata_alloc_size = 2048;</div><div class='ctx'> 	dc-&gt;caps.mall_size_per_mem_channel = 4;</div><div class='hunk'>@@ -2501,14 +2551,10 @@ static bool dcn32_resource_construct(</div><div class='ctx'> 	if (ASICREV_IS_GC_11_0_3(dc-&gt;ctx-&gt;asic_id.hw_internal_rev) &amp;&amp; (dc-&gt;config.sdpif_request_limit_words_per_umc == 0))</div><div class='ctx'> 		dc-&gt;config.sdpif_request_limit_words_per_umc = 16;</div><div class='ctx'> </div><div class='del'>-	DC_FP_END();</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> </div><div class='ctx'> create_fail:</div><div class='ctx'> </div><div class='del'>-	DC_FP_END();</div><div class='del'>-</div><div class='ctx'> 	dcn32_resource_destruct(pool);</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h<br/>index 1aa4ced29291..d60ed77eda80 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.h</a></div><div class='hunk'>@@ -98,7 +98,7 @@ void dcn32_add_phantom_pipes(struct dc *dc,</div><div class='ctx'> 		unsigned int pipe_cnt,</div><div class='ctx'> 		unsigned int index);</div><div class='ctx'> </div><div class='del'>-bool dcn32_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn32_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate);</div><div class='ctx'> </div><div class='hunk'>@@ -188,6 +188,10 @@ void dcn32_override_min_req_dcfclk(struct dc *dc, struct dc_state *context);</div><div class='ctx'> </div><div class='ctx'> unsigned int dcn32_calculate_mall_ways_from_bytes(const struct dc *dc, unsigned int total_size_in_mall_bytes);</div><div class='ctx'> </div><div class='add'>+unsigned int dcn32_get_max_hw_cursor_size(const struct dc *dc,</div><div class='add'>+			struct dc_state *state,</div><div class='add'>+			const struct dc_stream_state *stream);</div><div class='add'>+</div><div class='ctx'> /* definitions for run time init of reg offsets */</div><div class='ctx'> </div><div class='ctx'> /* CLK SRC */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c<br/>index 38d76434683e..7db1f7a5613f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c</a></div><div class='hunk'>@@ -1624,7 +1624,8 @@ static struct resource_funcs dcn321_res_pool_funcs = {</div><div class='ctx'> 	.add_phantom_pipes = dcn32_add_phantom_pipes,</div><div class='ctx'> 	.build_pipe_pix_clk_params = dcn20_build_pipe_pix_clk_params,</div><div class='ctx'> 	.calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,</div><div class='del'>-	.get_vstartup_for_pipe = dcn10_get_vstartup_for_pipe</div><div class='add'>+	.get_vstartup_for_pipe = dcn10_get_vstartup_for_pipe,</div><div class='add'>+	.get_max_hw_cursor_size = dcn32_get_max_hw_cursor_size,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static uint32_t read_pipe_fuses(struct dc_context *ctx)</div><div class='hunk'>@@ -1709,6 +1710,7 @@ static bool dcn321_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.i2c_speed_in_khz_hdcp = 100; /*1.4 w/a applied by default*/</div><div class='ctx'> 	/* TODO: Bring max cursor size back to 256 after subvp cursor corruption is fixed*/</div><div class='ctx'> 	dc-&gt;caps.max_cursor_size = 64;</div><div class='add'>+	dc-&gt;caps.max_buffered_cursor_size = 64; // sqrt(16 * 1024 / 4)</div><div class='ctx'> 	dc-&gt;caps.min_horizontal_blanking_period = 80;</div><div class='ctx'> 	dc-&gt;caps.dmdata_alloc_size = 2048;</div><div class='ctx'> 	dc-&gt;caps.mall_size_per_mem_channel = 4;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c<br/>index ffd2b816cd02..72c6cf047db0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c</a></div><div class='hunk'>@@ -1732,7 +1732,7 @@ static void dcn35_get_panel_config_defaults(struct dc_panel_config *panel_config</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static bool dcn35_validate_bandwidth(struct dc *dc,</div><div class='add'>+static enum dc_status dcn35_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='hunk'>@@ -1743,13 +1743,13 @@ static bool dcn35_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 			fast_validate);</div><div class='ctx'> </div><div class='ctx'> 	if (fast_validate)</div><div class='del'>-		return out;</div><div class='add'>+		return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	dcn35_decide_zstate_support(dc, context);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='del'>-	return out;</div><div class='add'>+	return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum dc_status dcn35_patch_unknown_plane_state(struct dc_plane_state *plane_state)</div><div class='hunk'>@@ -1903,7 +1903,7 @@ static bool dcn35_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.max_disp_clock_khz_at_vmin = 650000;</div><div class='ctx'> </div><div class='ctx'> 	/* Sequential ONO is based on ASIC. */</div><div class='del'>-	if (dc-&gt;ctx-&gt;asic_id.hw_internal_rev &gt; 0x10)</div><div class='add'>+	if (dc-&gt;ctx-&gt;asic_id.hw_internal_rev &gt;= 0x40)</div><div class='ctx'> 		dc-&gt;caps.sequential_ono = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Use pipe context based otg sync logic */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c<br/>index 98f5bc1b929e..989a270f7dea 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c</a></div><div class='hunk'>@@ -1712,7 +1712,7 @@ static void dcn35_get_panel_config_defaults(struct dc_panel_config *panel_config</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static bool dcn351_validate_bandwidth(struct dc *dc,</div><div class='add'>+static enum dc_status dcn351_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='hunk'>@@ -1723,13 +1723,13 @@ static bool dcn351_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 			fast_validate);</div><div class='ctx'> </div><div class='ctx'> 	if (fast_validate)</div><div class='del'>-		return out;</div><div class='add'>+		return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	dcn35_decide_zstate_support(dc, context);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='del'>-	return out;</div><div class='add'>+	return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct resource_funcs dcn351_res_pool_funcs = {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c<br/>index b6468573dc33..48e1f234185f 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c</a></div><div class='hunk'>@@ -1713,7 +1713,7 @@ static void dcn35_get_panel_config_defaults(struct dc_panel_config *panel_config</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static bool dcn35_validate_bandwidth(struct dc *dc,</div><div class='add'>+static enum dc_status dcn35_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='hunk'>@@ -1724,13 +1724,13 @@ static bool dcn35_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 			fast_validate);</div><div class='ctx'> </div><div class='ctx'> 	if (fast_validate)</div><div class='del'>-		return out;</div><div class='add'>+		return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> </div><div class='ctx'> 	DC_FP_START();</div><div class='ctx'> 	dcn35_decide_zstate_support(dc, context);</div><div class='ctx'> 	DC_FP_END();</div><div class='ctx'> </div><div class='del'>-	return out;</div><div class='add'>+	return out ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1876,7 +1876,7 @@ static bool dcn36_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.max_disp_clock_khz_at_vmin = 650000;</div><div class='ctx'> </div><div class='ctx'> 	/* Sequential ONO is based on ASIC. */</div><div class='del'>-	if (dc-&gt;ctx-&gt;asic_id.hw_internal_rev &gt; 0x10)</div><div class='add'>+	if (dc-&gt;ctx-&gt;asic_id.hw_internal_rev &gt;= 0x40)</div><div class='ctx'> 		dc-&gt;caps.sequential_ono = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Use pipe context based otg sync logic */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c<br/>index 7436dfbdf927..e0e32975ca34 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c</a></div><div class='hunk'>@@ -1642,16 +1642,52 @@ enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_sta</div><div class='ctx'> 	return DC_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool dcn401_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn401_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate)</div><div class='ctx'> {</div><div class='del'>-	bool out = false;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	enum dc_status status = DC_OK;</div><div class='add'>+	const struct dc_stream_state *stream;</div><div class='add'>+</div><div class='add'>+	/* reset cursor limitations on subvp */</div><div class='add'>+	for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+		stream = context-&gt;streams[i];</div><div class='add'>+</div><div class='add'>+		if (dc_state_can_clear_stream_cursor_subvp_limit(stream, context)) {</div><div class='add'>+			dc_state_set_stream_cursor_subvp_limit(stream, context, false);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (dc-&gt;debug.using_dml2)</div><div class='del'>-		out = dml2_validate(dc, context,</div><div class='add'>+		status = dml2_validate(dc, context,</div><div class='ctx'> 				context-&gt;power_source == DC_POWER_SOURCE_DC ? context-&gt;bw_ctx.dml2_dc_power_source : context-&gt;bw_ctx.dml2,</div><div class='del'>-				fast_validate);</div><div class='del'>-	return out;</div><div class='add'>+				fast_validate) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+</div><div class='add'>+	if (!fast_validate &amp;&amp; status == DC_OK &amp;&amp; dc_state_is_subvp_in_use(context)) {</div><div class='add'>+		/* check new stream configuration still supports cursor if subvp used */</div><div class='add'>+		for (i = 0; i &lt; context-&gt;stream_count; i++) {</div><div class='add'>+			stream = context-&gt;streams[i];</div><div class='add'>+</div><div class='add'>+			if (dc_state_get_stream_subvp_type(context, stream) != SUBVP_PHANTOM &amp;&amp;</div><div class='add'>+					stream-&gt;cursor_position.enable &amp;&amp;</div><div class='add'>+					!dc_stream_check_cursor_attributes(stream, context, &amp;stream-&gt;cursor_attributes))	{</div><div class='add'>+				/* hw cursor cannot be supported with subvp active, so disable subvp for now */</div><div class='add'>+				dc_state_set_stream_cursor_subvp_limit(stream, context, true);</div><div class='add'>+				status = DC_FAIL_HW_CURSOR_SUPPORT;</div><div class='add'>+			}</div><div class='add'>+		};</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!fast_validate &amp;&amp; status == DC_FAIL_HW_CURSOR_SUPPORT) {</div><div class='add'>+		/* attempt to validate again with subvp disabled due to cursor */</div><div class='add'>+		if (dc-&gt;debug.using_dml2)</div><div class='add'>+			status = dml2_validate(dc, context,</div><div class='add'>+					context-&gt;power_source == DC_POWER_SOURCE_DC ? context-&gt;bw_ctx.dml2_dc_power_source : context-&gt;bw_ctx.dml2,</div><div class='add'>+					fast_validate) ? DC_OK : DC_FAIL_BANDWIDTH_VALIDATE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dcn401_prepare_mcache_programming(struct dc *dc,</div><div class='hunk'>@@ -1770,7 +1806,8 @@ static struct resource_funcs dcn401_res_pool_funcs = {</div><div class='ctx'> 	.build_pipe_pix_clk_params = dcn401_build_pipe_pix_clk_params,</div><div class='ctx'> 	.calculate_mall_ways_from_bytes = dcn32_calculate_mall_ways_from_bytes,</div><div class='ctx'> 	.get_power_profile = dcn401_get_power_profile,</div><div class='del'>-	.get_vstartup_for_pipe = dcn401_get_vstartup_for_pipe</div><div class='add'>+	.get_vstartup_for_pipe = dcn401_get_vstartup_for_pipe,</div><div class='add'>+	.get_max_hw_cursor_size = dcn32_get_max_hw_cursor_size</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static uint32_t read_pipe_fuses(struct dc_context *ctx)</div><div class='hunk'>@@ -1846,8 +1883,9 @@ static bool dcn401_resource_construct(</div><div class='ctx'> 	dc-&gt;caps.max_downscale_ratio = 600;</div><div class='ctx'> 	dc-&gt;caps.i2c_speed_in_khz = 95;</div><div class='ctx'> 	dc-&gt;caps.i2c_speed_in_khz_hdcp = 95; /*1.4 w/a applied by default*/</div><div class='del'>-	/* TODO: Bring max cursor size back to 256 after subvp cursor corruption is fixed*/</div><div class='add'>+	/* used to set cursor pitch, so must be aligned to power of 2 (HW actually supported 78x78) */</div><div class='ctx'> 	dc-&gt;caps.max_cursor_size = 64;</div><div class='add'>+	dc-&gt;caps.max_buffered_cursor_size = 64;</div><div class='ctx'> 	dc-&gt;caps.cursor_not_scaled = true;</div><div class='ctx'> 	dc-&gt;caps.min_horizontal_blanking_period = 80;</div><div class='ctx'> 	dc-&gt;caps.dmdata_alloc_size = 2048;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h b/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h<br/>index 4c259745d519..dc52a30991af 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@ struct resource_pool *dcn401_create_resource_pool(</div><div class='ctx'> </div><div class='ctx'> enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state);</div><div class='ctx'> </div><div class='del'>-bool dcn401_validate_bandwidth(struct dc *dc,</div><div class='add'>+enum dc_status dcn401_validate_bandwidth(struct dc *dc,</div><div class='ctx'> 		struct dc_state *context,</div><div class='ctx'> 		bool fast_validate);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c b/drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c<br/>index 28348734d900..e0008c5f08ad 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/sspl/dc_spl.c</a></div><div class='hunk'>@@ -776,7 +776,7 @@ static enum scl_mode spl_get_dscl_mode(const struct spl_in *spl_in,</div><div class='ctx'> 	 * Do not bypass UV at 1:1 for cositing to be applied</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!enable_isharp) {</div><div class='del'>-		if (data-&gt;ratios.horz.value == one &amp;&amp; data-&gt;ratios.vert.value == one)</div><div class='add'>+		if (data-&gt;ratios.horz.value == one &amp;&amp; data-&gt;ratios.vert.value == one &amp;&amp; !spl_in-&gt;basic_out.always_scale)</div><div class='ctx'> 			return SCL_MODE_SCALING_420_LUMA_BYPASS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -884,7 +884,7 @@ static bool spl_get_isharp_en(struct spl_in *spl_in,</div><div class='ctx'> </div><div class='ctx'> /* Calculate number of tap with adaptive scaling off */</div><div class='ctx'> static void spl_get_taps_non_adaptive_scaler(</div><div class='del'>-	  struct spl_scratch *spl_scratch, const struct spl_taps *in_taps)</div><div class='add'>+	  struct spl_scratch *spl_scratch, const struct spl_taps *in_taps, bool always_scale)</div><div class='ctx'> {</div><div class='ctx'> 	bool check_max_downscale = false;</div><div class='ctx'> </div><div class='hunk'>@@ -944,15 +944,15 @@ static void spl_get_taps_non_adaptive_scaler(</div><div class='ctx'> 		spl_fixpt_from_fraction(6, 1));</div><div class='ctx'> 	SPL_ASSERT(check_max_downscale);</div><div class='ctx'> </div><div class='del'>-	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.horz))</div><div class='add'>+</div><div class='add'>+	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.horz) &amp;&amp; !always_scale)</div><div class='ctx'> 		spl_scratch-&gt;scl_data.taps.h_taps = 1;</div><div class='del'>-	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.vert))</div><div class='add'>+	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.vert) &amp;&amp; !always_scale)</div><div class='ctx'> 		spl_scratch-&gt;scl_data.taps.v_taps = 1;</div><div class='del'>-	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.horz_c))</div><div class='add'>+	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.horz_c) &amp;&amp; !always_scale)</div><div class='ctx'> 		spl_scratch-&gt;scl_data.taps.h_taps_c = 1;</div><div class='del'>-	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.vert_c))</div><div class='add'>+	if (IDENTITY_RATIO(spl_scratch-&gt;scl_data.ratios.vert_c) &amp;&amp; !always_scale)</div><div class='ctx'> 		spl_scratch-&gt;scl_data.taps.v_taps_c = 1;</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Calculate optimal number of taps */</div><div class='hunk'>@@ -965,13 +965,15 @@ static bool spl_get_optimal_number_of_taps(</div><div class='ctx'> 	unsigned int max_taps_y, max_taps_c;</div><div class='ctx'> 	unsigned int min_taps_y, min_taps_c;</div><div class='ctx'> 	enum lb_memory_config lb_config;</div><div class='del'>-	bool skip_easf = false;</div><div class='add'>+	bool skip_easf     = false;</div><div class='add'>+	bool always_scale  = spl_in-&gt;basic_out.always_scale;</div><div class='ctx'> 	bool is_subsampled = spl_is_subsampled_format(spl_in-&gt;basic_in.format);</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> 	if (spl_scratch-&gt;scl_data.viewport.width &gt; spl_scratch-&gt;scl_data.h_active &amp;&amp;</div><div class='ctx'> 		max_downscale_src_width != 0 &amp;&amp;</div><div class='ctx'> 		spl_scratch-&gt;scl_data.viewport.width &gt; max_downscale_src_width) {</div><div class='del'>-		spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps);</div><div class='add'>+		spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps, always_scale);</div><div class='ctx'> 		*enable_easf_v = false;</div><div class='ctx'> 		*enable_easf_h = false;</div><div class='ctx'> 		*enable_isharp = false;</div><div class='hunk'>@@ -980,7 +982,7 @@ static bool spl_get_optimal_number_of_taps(</div><div class='ctx'> </div><div class='ctx'> 	/* Disable adaptive scaler and sharpener when integer scaling is enabled */</div><div class='ctx'> 	if (spl_in-&gt;scaling_quality.integer_scaling) {</div><div class='del'>-		spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps);</div><div class='add'>+		spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps, always_scale);</div><div class='ctx'> 		*enable_easf_v = false;</div><div class='ctx'> 		*enable_easf_h = false;</div><div class='ctx'> 		*enable_isharp = false;</div><div class='hunk'>@@ -996,7 +998,7 @@ static bool spl_get_optimal_number_of_taps(</div><div class='ctx'> 	 * taps = 4 for upscaling</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (skip_easf)</div><div class='del'>-		spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps);</div><div class='add'>+		spl_get_taps_non_adaptive_scaler(spl_scratch, in_taps, always_scale);</div><div class='ctx'> 	else {</div><div class='ctx'> 		if (spl_is_video_format(spl_in-&gt;basic_in.format)) {</div><div class='ctx'> 			spl_scratch-&gt;scl_data.taps.h_taps = 6;</div><div class='hunk'>@@ -1297,7 +1299,7 @@ static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *s</div><div class='ctx'> 	if (enable_easf_v) {</div><div class='ctx'> 		dscl_prog_data-&gt;easf_v_en = true;</div><div class='ctx'> 		dscl_prog_data-&gt;easf_v_ring = 0;</div><div class='del'>-		dscl_prog_data-&gt;easf_v_sharp_factor = 0;</div><div class='add'>+		dscl_prog_data-&gt;easf_v_sharp_factor = 1;</div><div class='ctx'> 		dscl_prog_data-&gt;easf_v_bf1_en = 1;	// 1-bit, BF1 calculation enable, 0=disable, 1=enable</div><div class='ctx'> 		dscl_prog_data-&gt;easf_v_bf2_mode = 0xF;	// 4-bit, BF2 calculation mode</div><div class='ctx'> 		/* 2-bit, BF3 chroma mode correction calculation mode */</div><div class='hunk'>@@ -1461,7 +1463,7 @@ static void spl_set_easf_data(struct spl_scratch *spl_scratch, struct spl_out *s</div><div class='ctx'> 	if (enable_easf_h) {</div><div class='ctx'> 		dscl_prog_data-&gt;easf_h_en = true;</div><div class='ctx'> 		dscl_prog_data-&gt;easf_h_ring = 0;</div><div class='del'>-		dscl_prog_data-&gt;easf_h_sharp_factor = 0;</div><div class='add'>+		dscl_prog_data-&gt;easf_h_sharp_factor = 1;</div><div class='ctx'> 		dscl_prog_data-&gt;easf_h_bf1_en =</div><div class='ctx'> 			1;	// 1-bit, BF1 calculation enable, 0=disable, 1=enable</div><div class='ctx'> 		dscl_prog_data-&gt;easf_h_bf2_mode =</div><div class='hunk'>@@ -1898,3 +1900,4 @@ bool SPL_NAMESPACE(spl_get_number_of_taps(struct spl_in *spl_in, struct spl_out</div><div class='ctx'> 	spl_set_taps_data(dscl_prog_data, data);</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h b/drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h<br/>index 1c3949b24611..36a284305a70 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/sspl/dc_spl_types.h</a></div><div class='hunk'>@@ -480,6 +480,10 @@ enum sharpness_setting	{</div><div class='ctx'> 	SHARPNESS_ZERO,</div><div class='ctx'> 	SHARPNESS_CUSTOM</div><div class='ctx'> };</div><div class='add'>+enum sharpness_range_source	{</div><div class='add'>+	SHARPNESS_RANGE_DCN = 0,</div><div class='add'>+	SHARPNESS_RANGE_DCN_OVERRIDE</div><div class='add'>+};</div><div class='ctx'> struct spl_sharpness_range {</div><div class='ctx'> 	int sdr_rgb_min;</div><div class='ctx'> 	int sdr_rgb_max;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c b/drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c<br/>index 52d97918a3bd..ebf0287417e0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dc/sspl/spl_fixpt31_32.c</a></div><div class='hunk'>@@ -29,8 +29,6 @@ static inline unsigned long long spl_complete_integer_division_u64(</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long long result;</div><div class='ctx'> </div><div class='del'>-	SPL_ASSERT(divisor);</div><div class='del'>-</div><div class='ctx'> 	result = spl_div64_u64_rem(dividend, divisor, remainder);</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='hunk'>@@ -196,8 +194,6 @@ struct spl_fixed31_32 spl_fixpt_recip(struct spl_fixed31_32 arg)</div><div class='ctx'> 	 * Good idea to use Newton's method</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	SPL_ASSERT(arg.value);</div><div class='del'>-</div><div class='ctx'> 	return spl_fixpt_from_fraction(</div><div class='ctx'> 		spl_fixpt_one.value,</div><div class='ctx'> 		arg.value);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h<br/>index 4e0efff92dca..3f3fa1b6a69e 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/dmub_srv.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/dmub_srv.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/dmub_srv.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dmub/dmub_srv.h</a></div><div class='hunk'>@@ -51,8 +51,8 @@</div><div class='ctx'>  * for the cache windows.</div><div class='ctx'>  *</div><div class='ctx'>  * The call to dmub_srv_hw_init() programs the DMCUB registers to prepare</div><div class='del'>- * for command submission. Commands can be queued via dmub_srv_cmd_queue()</div><div class='del'>- * and executed via dmub_srv_cmd_execute().</div><div class='add'>+ * for command submission. Commands can be queued via dmub_srv_fb_cmd_queue()</div><div class='add'>+ * and executed via dmub_srv_fb_cmd_execute().</div><div class='ctx'>  *</div><div class='ctx'>  * If the queue is full the dmub_srv_wait_for_idle() call can be used to</div><div class='ctx'>  * wait until the queue has been cleared.</div><div class='hunk'>@@ -142,6 +142,7 @@ enum dmub_notification_type {</div><div class='ctx'> 	DMUB_NOTIFICATION_SET_CONFIG_REPLY,</div><div class='ctx'> 	DMUB_NOTIFICATION_DPIA_NOTIFICATION,</div><div class='ctx'> 	DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,</div><div class='add'>+	DMUB_NOTIFICATION_FUSED_IO,</div><div class='ctx'> 	DMUB_NOTIFICATION_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -170,6 +171,13 @@ enum dmub_srv_power_state_type {</div><div class='ctx'> 	DMUB_POWER_STATE_D3 = 8</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* enum dmub_inbox_cmd_interface type - defines default interface for host-&gt;dmub commands */</div><div class='add'>+enum dmub_inbox_cmd_interface_type {</div><div class='add'>+	DMUB_CMD_INTERFACE_DEFAULT = 0,</div><div class='add'>+	DMUB_CMD_INTERFACE_FB = 1,</div><div class='add'>+	DMUB_CMD_INTERFACE_REG = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct dmub_region - dmub hw memory region</div><div class='ctx'>  * @base: base address for region, must be 256 byte aligned</div><div class='hunk'>@@ -349,6 +357,21 @@ struct dmub_diagnostic_data {</div><div class='ctx'> 	uint8_t is_cw6_enabled : 1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct dmub_srv_inbox {</div><div class='add'>+	/* generic status */</div><div class='add'>+	uint64_t num_submitted;</div><div class='add'>+	uint64_t num_reported;</div><div class='add'>+	union {</div><div class='add'>+		/* frame buffer mailbox status */</div><div class='add'>+		struct dmub_rb rb;</div><div class='add'>+		/* register mailbox status */</div><div class='add'>+		struct {</div><div class='add'>+			bool is_pending;</div><div class='add'>+			bool is_multi_pending;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct dmub_srv_base_funcs - Driver specific base callbacks</div><div class='ctx'>  */</div><div class='hunk'>@@ -422,6 +445,8 @@ struct dmub_srv_hw_funcs {</div><div class='ctx'> </div><div class='ctx'> 	uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);</div><div class='ctx'> </div><div class='add'>+	uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub);</div><div class='add'>+</div><div class='ctx'> 	void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);</div><div class='ctx'> </div><div class='ctx'> 	bool (*is_supported)(struct dmub_srv *dmub);</div><div class='hunk'>@@ -462,18 +487,21 @@ struct dmub_srv_hw_funcs {</div><div class='ctx'> 	void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);</div><div class='ctx'> </div><div class='ctx'> 	void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);</div><div class='add'>+</div><div class='ctx'> 	void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,</div><div class='ctx'> 			union dmub_rb_cmd *cmd);</div><div class='ctx'> 	uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);</div><div class='ctx'> 	void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,</div><div class='ctx'> 			union dmub_rb_cmd *cmd);</div><div class='ctx'> 	void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);</div><div class='add'>+	void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);</div><div class='add'>+	void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);</div><div class='add'>+</div><div class='ctx'> 	uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);</div><div class='ctx'> 	void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);</div><div class='ctx'> 	void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);</div><div class='ctx'> 	void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);</div><div class='ctx'> 	uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);</div><div class='del'>-	void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);</div><div class='ctx'> 	void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -493,6 +521,7 @@ struct dmub_srv_create_params {</div><div class='ctx'> 	enum dmub_asic asic;</div><div class='ctx'> 	uint32_t fw_version;</div><div class='ctx'> 	bool is_virtual;</div><div class='add'>+	enum dmub_inbox_cmd_interface_type inbox_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -521,8 +550,9 @@ struct dmub_srv {</div><div class='ctx'> 	const struct dmub_srv_dcn401_regs *regs_dcn401;</div><div class='ctx'> 	struct dmub_srv_base_funcs funcs;</div><div class='ctx'> 	struct dmub_srv_hw_funcs hw_funcs;</div><div class='del'>-	struct dmub_rb inbox1_rb;</div><div class='add'>+	struct dmub_srv_inbox inbox1;</div><div class='ctx'> 	uint32_t inbox1_last_wptr;</div><div class='add'>+	struct dmub_srv_inbox reg_inbox0;</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * outbox1_rb is accessed without locks (dal &amp; dc)</div><div class='ctx'> 	 * and to be used only in dmub_srv_stat_get_notification()</div><div class='hunk'>@@ -542,6 +572,7 @@ struct dmub_srv {</div><div class='ctx'> 	struct dmub_fw_meta_info meta_info;</div><div class='ctx'> 	struct dmub_feature_caps feature_caps;</div><div class='ctx'> 	struct dmub_visual_confirm_color visual_confirm_color;</div><div class='add'>+	enum dmub_inbox_cmd_interface_type inbox_type;</div><div class='ctx'> </div><div class='ctx'> 	enum dmub_srv_power_state_type power_state;</div><div class='ctx'> 	struct dmub_diagnostic_data debug;</div><div class='hunk'>@@ -566,11 +597,8 @@ struct dmub_notification {</div><div class='ctx'> 		struct aux_reply_data aux_reply;</div><div class='ctx'> 		enum dp_hpd_status hpd_status;</div><div class='ctx'> 		enum set_config_status sc_status;</div><div class='del'>-		/**</div><div class='del'>-		 * DPIA notification command.</div><div class='del'>-		 */</div><div class='del'>-		struct dmub_rb_cmd_dpia_notification dpia_notification;</div><div class='ctx'> 		struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;</div><div class='add'>+		struct dmub_cmd_fused_request fused_request;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -699,19 +727,7 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,</div><div class='ctx'> enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dmub_srv_sync_inbox1() - sync sw state with hw state</div><div class='del'>- * @dmub: the dmub service</div><div class='del'>- *</div><div class='del'>- * Sync sw state with hw state when resume from S0i3</div><div class='del'>- *</div><div class='del'>- * Return:</div><div class='del'>- *   DMUB_STATUS_OK - success</div><div class='del'>- *   DMUB_STATUS_INVALID - unspecified error</div><div class='del'>- */</div><div class='del'>-enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * dmub_srv_cmd_queue() - queues a command to the DMUB</div><div class='add'>+ * dmub_srv_fb_cmd_queue() - queues a command to the DMUB</div><div class='ctx'>  * @dmub: the dmub service</div><div class='ctx'>  * @cmd: the command to queue</div><div class='ctx'>  *</div><div class='hunk'>@@ -723,11 +739,11 @@ enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub);</div><div class='ctx'>  *   DMUB_STATUS_QUEUE_FULL - no remaining room in queue</div><div class='ctx'>  *   DMUB_STATUS_INVALID - unspecified error</div><div class='ctx'>  */</div><div class='del'>-enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,</div><div class='add'>+enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub,</div><div class='ctx'> 				    const union dmub_rb_cmd *cmd);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dmub_srv_cmd_execute() - Executes a queued sequence to the dmub</div><div class='add'>+ * dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub</div><div class='ctx'>  * @dmub: the dmub service</div><div class='ctx'>  *</div><div class='ctx'>  * Begins execution of queued commands on the dmub.</div><div class='hunk'>@@ -736,7 +752,7 @@ enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,</div><div class='ctx'>  *   DMUB_STATUS_OK - success</div><div class='ctx'>  *   DMUB_STATUS_INVALID - unspecified error</div><div class='ctx'>  */</div><div class='del'>-enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub);</div><div class='add'>+enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed</div><div class='hunk'>@@ -795,6 +811,23 @@ enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,</div><div class='ctx'> 					    uint32_t timeout_us);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending</div><div class='add'>+ * @dmub: the dmub service</div><div class='add'>+ * @timeout_us: the maximum number of microseconds to wait</div><div class='add'>+ *</div><div class='add'>+ * Waits until the commands queued prior to this call are complete.</div><div class='add'>+ * If interfaces remain busy due to additional work being submitted</div><div class='add'>+ * concurrently, this function will not continue to wait.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *   DMUB_STATUS_OK - success</div><div class='add'>+ *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out</div><div class='add'>+ *   DMUB_STATUS_INVALID - unspecified error</div><div class='add'>+ */</div><div class='add'>+enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub,</div><div class='add'>+					uint32_t timeout_us);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * dmub_srv_wait_for_idle() - Waits for the DMUB to be idle</div><div class='ctx'>  * @dmub: the dmub service</div><div class='ctx'>  * @timeout_us: the maximum number of microseconds to wait</div><div class='hunk'>@@ -892,9 +925,6 @@ enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,</div><div class='ctx'> enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,</div><div class='ctx'> 					     union dmub_fw_boot_options *option);</div><div class='ctx'> </div><div class='del'>-enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,</div><div class='del'>-					      union dmub_rb_cmd *cmd);</div><div class='del'>-</div><div class='ctx'> enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,</div><div class='ctx'> 					     bool skip);</div><div class='ctx'> </div><div class='hunk'>@@ -959,26 +989,6 @@ enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);</div><div class='ctx'> void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * dmub_srv_send_reg_inbox0_cmd() - send a dmub command and wait for the command</div><div class='del'>- * being processed by DMUB.</div><div class='del'>- * @dmub: The dmub service</div><div class='del'>- * @cmd: The dmub command being sent. If with_replay is true, the function will</div><div class='del'>- * update cmd with replied data.</div><div class='del'>- * @with_reply: true if DMUB reply needs to be copied back to cmd. false if the</div><div class='del'>- * cmd doesn't need to be replied.</div><div class='del'>- * @timeout_us: timeout in microseconds.</div><div class='del'>- *</div><div class='del'>- * Return:</div><div class='del'>- * DMUB_STATUS_OK - success</div><div class='del'>- * DMUB_STATUS_TIMEOUT - DMUB fails to process the command within the timeout</div><div class='del'>- * interval.</div><div class='del'>- */</div><div class='del'>-enum dmub_status dmub_srv_send_reg_inbox0_cmd(</div><div class='del'>-		struct dmub_srv *dmub,</div><div class='del'>-		union dmub_rb_cmd *cmd,</div><div class='del'>-		bool with_reply, uint32_t timeout_us);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * dmub_srv_set_power_state() - Track DC power state in dmub_srv</div><div class='ctx'>  * @dmub: The dmub service</div><div class='ctx'>  * @power_state: DC power state setting</div><div class='hunk'>@@ -990,4 +1000,71 @@ enum dmub_status dmub_srv_send_reg_inbox0_cmd(</div><div class='ctx'>  */</div><div class='ctx'> void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * dmub_srv_reg_cmd_execute() - Executes provided command to the dmub</div><div class='add'>+ * @dmub: the dmub service</div><div class='add'>+ * @cmd: the command packet to be executed</div><div class='add'>+ *</div><div class='add'>+ * Executes a single command for the dmub.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *   DMUB_STATUS_OK - success</div><div class='add'>+ *   DMUB_STATUS_INVALID - unspecified error</div><div class='add'>+ */</div><div class='add'>+enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dmub_srv_cmd_get_response() - Copies return data for command into buffer</div><div class='add'>+ * @dmub: the dmub service</div><div class='add'>+ * @cmd_rsp: response buffer</div><div class='add'>+ *</div><div class='add'>+ * Copies return data for command into buffer</div><div class='add'>+ */</div><div class='add'>+void dmub_srv_cmd_get_response(struct dmub_srv *dmub,</div><div class='add'>+		union dmub_rb_cmd *cmd_rsp);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dmub_srv_sync_inboxes() - Sync inbox state</div><div class='add'>+ * @dmub: the dmub service</div><div class='add'>+ *</div><div class='add'>+ * Sync inbox state</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *   DMUB_STATUS_OK - success</div><div class='add'>+ *   DMUB_STATUS_INVALID - unspecified error</div><div class='add'>+ */</div><div class='add'>+enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up</div><div class='add'>+ * @dmub: the dmub service</div><div class='add'>+ * @timeout_us: the maximum number of microseconds to wait</div><div class='add'>+ * @num_free_required: number of free entries required</div><div class='add'>+ *</div><div class='add'>+ * Waits until the DMUB buffer is freed to the specified number.</div><div class='add'>+ *  The maximum wait time is given in microseconds to prevent spinning</div><div class='add'>+ * forever.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *   DMUB_STATUS_OK - success</div><div class='add'>+ *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out</div><div class='add'>+ *   DMUB_STATUS_INVALID - unspecified error</div><div class='add'>+ */</div><div class='add'>+enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub,</div><div class='add'>+		uint32_t timeout_us,</div><div class='add'>+		uint32_t num_free_required);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dmub_srv_update_inbox_status() - Updates pending status for inbox &amp; reg inbox0</div><div class='add'>+ * @dmub: the dmub service</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *   DMUB_STATUS_OK - success</div><div class='add'>+ *   DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out</div><div class='add'>+ *   DMUB_STATUS_HW_FAILURE - issue with HW programming</div><div class='add'>+ *   DMUB_STATUS_INVALID - unspecified error</div><div class='add'>+ */</div><div class='add'>+enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub);</div><div class='add'>+</div><div class='ctx'> #endif /* _DMUB_SRV_H_ */</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h<br/>index 1f5f4e3e49d4..57fa05bddb45 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h</a></div><div class='hunk'>@@ -36,6 +36,9 @@</div><div class='ctx'> //&lt;DMUB_TYPES&gt;==================================================================</div><div class='ctx'> /* Basic type definitions. */</div><div class='ctx'> </div><div class='add'>+#ifdef __forceinline</div><div class='add'>+#undef __forceinline</div><div class='add'>+#endif</div><div class='ctx'> #define __forceinline inline</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -547,6 +550,11 @@ union replay_hw_flags {</div><div class='ctx'> 		 * @is_alpm_initialized: Indicates whether ALPM is initialized</div><div class='ctx'> 		 */</div><div class='ctx'> 		uint32_t is_alpm_initialized : 1;</div><div class='add'>+</div><div class='add'>+		/**</div><div class='add'>+		 * @alpm_mode: Indicates ALPM mode selected</div><div class='add'>+		 */</div><div class='add'>+		uint32_t alpm_mode : 2;</div><div class='ctx'> 	} bitfields;</div><div class='ctx'> </div><div class='ctx'> 	uint32_t u32All;</div><div class='hunk'>@@ -739,6 +747,14 @@ enum dmub_ips_disable_type {</div><div class='ctx'> 	DMUB_IPS_DISABLE_IPS2_Z10 = 4,</div><div class='ctx'> 	DMUB_IPS_DISABLE_DYNAMIC = 5,</div><div class='ctx'> 	DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF = 6,</div><div class='add'>+	DMUB_IPS_DISABLE_Z8_RETENTION = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum dmub_ips_rcg_disable_type {</div><div class='add'>+	DMUB_IPS_RCG_ENABLE = 0,</div><div class='add'>+	DMUB_IPS0_RCG_DISABLE = 1,</div><div class='add'>+	DMUB_IPS1_RCG_DISABLE = 2,</div><div class='add'>+	DMUB_IPS_RCG_DISABLE = 3</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define DMUB_IPS1_ALLOW_MASK 0x00000001</div><div class='hunk'>@@ -817,11 +833,12 @@ enum dmub_shared_state_feature_id {</div><div class='ctx'>  */</div><div class='ctx'> union dmub_shared_state_ips_fw_signals {</div><div class='ctx'> 	struct {</div><div class='del'>-		uint32_t ips1_commit : 1;  /**&lt; 1 if in IPS1 */</div><div class='add'>+		uint32_t ips1_commit : 1;  /**&lt; 1 if in IPS1 or IPS0 RCG */</div><div class='ctx'> 		uint32_t ips2_commit : 1; /**&lt; 1 if in IPS2 */</div><div class='ctx'> 		uint32_t in_idle : 1; /**&lt; 1 if DMCUB is in idle */</div><div class='ctx'> 		uint32_t detection_required : 1; /**&lt; 1 if detection is required */</div><div class='del'>-		uint32_t reserved_bits : 28; /**&lt; Reversed */</div><div class='add'>+		uint32_t ips1z8_commit: 1; /**&lt; 1 if in IPS1 Z8 Retention */</div><div class='add'>+		uint32_t reserved_bits : 27; /**&lt; Reversed */</div><div class='ctx'> 	} bits;</div><div class='ctx'> 	uint32_t all;</div><div class='ctx'> };</div><div class='hunk'>@@ -836,7 +853,10 @@ union dmub_shared_state_ips_driver_signals {</div><div class='ctx'> 		uint32_t allow_ips2 : 1; /**&lt; 1 is IPS1 is allowed */</div><div class='ctx'> 		uint32_t allow_z10 : 1; /**&lt; 1 if Z10 is allowed */</div><div class='ctx'> 		uint32_t allow_idle: 1; /**&lt; 1 if driver is allowing idle */</div><div class='del'>-		uint32_t reserved_bits : 27; /**&lt; Reversed bits */</div><div class='add'>+		uint32_t allow_ips0_rcg : 1; /**&lt; 1 is IPS0 RCG is allowed */</div><div class='add'>+		uint32_t allow_ips1_rcg : 1; /**&lt; 1 is IPS1 RCG is allowed */</div><div class='add'>+		uint32_t allow_ips1z8 : 1; /**&lt; 1 is IPS1 Z8 Retention is allowed */</div><div class='add'>+		uint32_t reserved_bits : 24; /**&lt; Reversed bits */</div><div class='ctx'> 	} bits;</div><div class='ctx'> 	uint32_t all;</div><div class='ctx'> };</div><div class='hunk'>@@ -865,7 +885,9 @@ struct dmub_shared_state_ips_fw {</div><div class='ctx'> 	uint32_t ips1_exit_count; /**&lt; Exit counter for IPS1 */</div><div class='ctx'> 	uint32_t ips2_entry_count; /**&lt; Entry counter for IPS2 */</div><div class='ctx'> 	uint32_t ips2_exit_count; /**&lt; Exit counter for IPS2 */</div><div class='del'>-	uint32_t reserved[55]; /**&lt; Reversed, to be updated when adding new fields. */</div><div class='add'>+	uint32_t ips1_z8ret_entry_count; /**&lt; Entry counter for IPS1 Z8 Retention */</div><div class='add'>+	uint32_t ips1_z8ret_exit_count; /**&lt; Exit counter for IPS1 Z8 Retention */</div><div class='add'>+	uint32_t reserved[53]; /**&lt; Reversed, to be updated when adding new fields. */</div><div class='ctx'> }; /* 248-bytes, fixed */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1253,6 +1275,10 @@ enum dmub_gpint_command {</div><div class='ctx'> 	 * DESC: Setup debug configs.</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_GPINT__SETUP_DEBUG_MODE = 136,</div><div class='add'>+	/**</div><div class='add'>+	 * DESC: Initiates IPS wake sequence.</div><div class='add'>+	 */</div><div class='add'>+	DMUB_GPINT__IPS_DEBUG_WAKE = 137,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2113,6 +2139,11 @@ union dmub_cmd_fams2_config {</div><div class='ctx'> 	} stream_v1; //v1</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct dmub_fams2_config_v2 {</div><div class='add'>+	struct dmub_cmd_fams2_global_config global;</div><div class='add'>+	struct dmub_fams2_stream_static_state_v1 stream_v1[DMUB_MAX_STREAMS]; //v1</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * DMUB rb command definition for FAMS2 (merged SubVP, FPO, Legacy)</div><div class='ctx'>  */</div><div class='hunk'>@@ -2122,6 +2153,22 @@ struct dmub_rb_cmd_fams2 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * Indirect buffer descriptor</div><div class='add'>+ */</div><div class='add'>+struct dmub_ib_data {</div><div class='add'>+	union dmub_addr src; // location of indirect buffer in memory</div><div class='add'>+	uint16_t size; // indirect buffer size in bytes</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DMUB rb command definition for commands passed over indirect buffer</div><div class='add'>+ */</div><div class='add'>+struct dmub_rb_cmd_ib {</div><div class='add'>+	struct dmub_cmd_header header;</div><div class='add'>+	struct dmub_ib_data ib_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * enum dmub_cmd_idle_opt_type - Idle optimization command type.</div><div class='ctx'>  */</div><div class='ctx'> enum dmub_cmd_idle_opt_type {</div><div class='hunk'>@@ -2144,6 +2191,11 @@ enum dmub_cmd_idle_opt_type {</div><div class='ctx'> 	 * DCN hardware notify power state.</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__IDLE_OPT_SET_DC_POWER_STATE = 3,</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * DCN notify to release HW.</div><div class='add'>+	 */</div><div class='add'>+	 DMUB_CMD__IDLE_OPT_RELEASE_HW = 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2636,7 +2688,11 @@ enum dp_hpd_type {</div><div class='ctx'> 	/**</div><div class='ctx'> 	 * DP HPD short pulse</div><div class='ctx'> 	 */</div><div class='del'>-	DP_IRQ</div><div class='add'>+	DP_IRQ = 1,</div><div class='add'>+	/**</div><div class='add'>+	 * Failure to acquire DP HPD state</div><div class='add'>+	 */</div><div class='add'>+	DP_NONE_HPD = 2</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2901,8 +2957,9 @@ enum dmub_cmd_fams_type {</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__FAMS_SET_MANUAL_TRIGGER = 3,</div><div class='ctx'> 	DMUB_CMD__FAMS2_CONFIG = 4,</div><div class='del'>-	DMUB_CMD__FAMS2_DRR_UPDATE = 5,</div><div class='del'>-	DMUB_CMD__FAMS2_FLIP = 6,</div><div class='add'>+	DMUB_CMD__FAMS2_IB_CONFIG = 5,</div><div class='add'>+	DMUB_CMD__FAMS2_DRR_UPDATE = 6,</div><div class='add'>+	DMUB_CMD__FAMS2_FLIP = 7,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3609,6 +3666,12 @@ struct dmub_rb_cmd_psr_set_power_opt {</div><div class='ctx'> 	struct dmub_cmd_psr_set_power_opt_data psr_set_power_opt_data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum dmub_alpm_mode {</div><div class='add'>+	ALPM_AUXWAKE = 0,</div><div class='add'>+	ALPM_AUXLESS = 1,</div><div class='add'>+	ALPM_UNSUPPORTED = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Definition of Replay Residency GPINT command.</div><div class='ctx'>  * Bit[0] - Residency mode for Revision 0</div><div class='hunk'>@@ -3742,6 +3805,15 @@ enum dmub_cmd_replay_general_subtype {</div><div class='ctx'> 	REPLAY_GENERAL_CMD_SET_LOW_RR_ACTIVATE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct dmub_alpm_auxless_data {</div><div class='add'>+	uint16_t lfps_setup_ns;</div><div class='add'>+	uint16_t lfps_period_ns;</div><div class='add'>+	uint16_t lfps_silence_ns;</div><div class='add'>+	uint16_t lfps_t1_t2_override_us;</div><div class='add'>+	short lfps_t1_t2_offset_us;</div><div class='add'>+	uint8_t lttpr_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * Data passed from driver to FW in a DMUB_CMD__REPLAY_COPY_SETTINGS command.</div><div class='ctx'>  */</div><div class='hunk'>@@ -3812,6 +3884,10 @@ struct dmub_cmd_replay_copy_settings_data {</div><div class='ctx'> 	 * Use FSM state for Replay power up/down</div><div class='ctx'> 	 */</div><div class='ctx'> 	uint8_t use_phy_fsm;</div><div class='add'>+	/**</div><div class='add'>+	 * Use for AUX-less ALPM LFPS wake operation</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_alpm_auxless_data auxless_alpm_data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4360,6 +4436,11 @@ enum dmub_cmd_abm_type {</div><div class='ctx'> 	 * Get the current ACE curve.</div><div class='ctx'> 	 */</div><div class='ctx'> 	DMUB_CMD__ABM_GET_ACE_CURVE = 10,</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Get current histogram data</div><div class='add'>+	 */</div><div class='add'>+	DMUB_CMD__ABM_GET_HISTOGRAM_DATA = 11,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct abm_ace_curve {</div><div class='hunk'>@@ -4954,6 +5035,20 @@ enum dmub_abm_ace_curve_type {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * enum dmub_abm_histogram_type - Histogram type.</div><div class='add'>+ */</div><div class='add'>+enum dmub_abm_histogram_type {</div><div class='add'>+	/**</div><div class='add'>+	 * ACE curve as defined by the SW layer.</div><div class='add'>+	 */</div><div class='add'>+	ABM_HISTOGRAM_TYPE__SW = 0,</div><div class='add'>+	/**</div><div class='add'>+	 * ACE curve as defined by the SW to HW translation interface layer.</div><div class='add'>+	 */</div><div class='add'>+	ABM_HISTOGRAM_TYPE__SW_IF = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * Definition of a DMUB_CMD__ABM_GET_ACE_CURVE command.</div><div class='ctx'>  */</div><div class='ctx'> struct dmub_rb_cmd_abm_get_ace_curve {</div><div class='hunk'>@@ -4989,6 +5084,41 @@ struct dmub_rb_cmd_abm_get_ace_curve {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * Definition of a DMUB_CMD__ABM_GET_HISTOGRAM command.</div><div class='add'>+ */</div><div class='add'>+struct dmub_rb_cmd_abm_get_histogram {</div><div class='add'>+	/**</div><div class='add'>+	 * Command header.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_cmd_header header;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Address where Histogram should be copied.</div><div class='add'>+	 */</div><div class='add'>+	union dmub_addr dest;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Type of Histogram being queried.</div><div class='add'>+	 */</div><div class='add'>+	enum dmub_abm_histogram_type histogram_type;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Indirect buffer length.</div><div class='add'>+	 */</div><div class='add'>+	uint16_t bytes;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * eDP panel instance.</div><div class='add'>+	 */</div><div class='add'>+	uint8_t panel_inst;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Explicit padding to 4 byte boundary.</div><div class='add'>+	 */</div><div class='add'>+	uint8_t pad;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * Definition of a DMUB_CMD__ABM_SAVE_RESTORE command.</div><div class='ctx'>  */</div><div class='ctx'> struct dmub_rb_cmd_abm_save_restore {</div><div class='hunk'>@@ -5389,7 +5519,8 @@ struct dmub_cmd_fused_request {</div><div class='ctx'> 		struct dmub_cmd_fused_request_location_i2c {</div><div class='ctx'> 			uint8_t is_aux : 1;  // False</div><div class='ctx'> 			uint8_t ddc_line : 3;</div><div class='del'>-			uint8_t _reserved0 : 4;</div><div class='add'>+			uint8_t over_aux : 1;</div><div class='add'>+			uint8_t _reserved0 : 3;</div><div class='ctx'> 			uint8_t address;</div><div class='ctx'> 			uint8_t offset;</div><div class='ctx'> 			uint8_t length;</div><div class='hunk'>@@ -5687,6 +5818,11 @@ union dmub_rb_cmd {</div><div class='ctx'> 	struct dmub_rb_cmd_abm_get_ace_curve abm_get_ace_curve;</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='add'>+	 * Definition of a DMUB_CMD__ABM_GET_HISTOGRAM command.</div><div class='add'>+	 */</div><div class='add'>+	struct dmub_rb_cmd_abm_get_histogram abm_get_histogram;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='ctx'> 	 * Definition of a DMUB_CMD__ABM_SET_EVENT command.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct dmub_rb_cmd_abm_set_event abm_set_event;</div><div class='hunk'>@@ -5817,8 +5953,11 @@ union dmub_rb_cmd {</div><div class='ctx'> 	 * Definition of a DMUB_CMD__PSP_ASSR_ENABLE command.</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct dmub_rb_cmd_assr_enable assr_enable;</div><div class='add'>+</div><div class='ctx'> 	struct dmub_rb_cmd_fams2 fams2_config;</div><div class='ctx'> </div><div class='add'>+	struct dmub_rb_cmd_ib ib_fams2_config;</div><div class='add'>+</div><div class='ctx'> 	struct dmub_rb_cmd_fams2_drr_update fams2_drr_update;</div><div class='ctx'> </div><div class='ctx'> 	struct dmub_rb_cmd_fams2_flip fams2_flip;</div><div class='hunk'>@@ -5934,6 +6073,9 @@ static inline uint32_t dmub_rb_num_free(struct dmub_rb *rb)</div><div class='ctx'> 	else</div><div class='ctx'> 		data_count = rb-&gt;capacity - (rb-&gt;rptr - rb-&gt;wrpt);</div><div class='ctx'> </div><div class='add'>+	/* +1 because 1 entry is always unusable */</div><div class='add'>+	data_count += DMUB_RB_CMD_SIZE;</div><div class='add'>+</div><div class='ctx'> 	return (rb-&gt;capacity - data_count) / DMUB_RB_CMD_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5953,6 +6095,7 @@ static inline bool dmub_rb_full(struct dmub_rb *rb)</div><div class='ctx'> 	else</div><div class='ctx'> 		data_count = rb-&gt;capacity - (rb-&gt;rptr - rb-&gt;wrpt);</div><div class='ctx'> </div><div class='add'>+	/* -1 because 1 entry is always unusable */</div><div class='ctx'> 	return (data_count == (rb-&gt;capacity - DMUB_RB_CMD_SIZE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c<br/>index e67f7c4784eb..2575dbc448f7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.c</a></div><div class='hunk'>@@ -66,24 +66,20 @@ void dmub_dcn401_reset(struct dmub_srv *dmub)</div><div class='ctx'> 	const uint32_t timeout_us = 1 * 1000 * 1000; //1s</div><div class='ctx'> 	const uint32_t poll_delay_us = 1; //1us</div><div class='ctx'> 	uint32_t i = 0;</div><div class='del'>-	uint32_t in_reset, scratch, pwait_mode;</div><div class='add'>+	uint32_t enabled, in_reset, scratch, pwait_mode;</div><div class='ctx'> </div><div class='del'>-	REG_GET(DMCUB_CNTL2, DMCUB_SOFT_RESET, &amp;in_reset);</div><div class='add'>+	REG_GET(DMCUB_CNTL,</div><div class='add'>+			DMCUB_ENABLE, &amp;enabled);</div><div class='add'>+	REG_GET(DMCUB_CNTL2,</div><div class='add'>+			DMCUB_SOFT_RESET, &amp;in_reset);</div><div class='ctx'> </div><div class='del'>-	if (in_reset == 0) {</div><div class='add'>+	if (enabled &amp;&amp; in_reset == 0) {</div><div class='ctx'> 		cmd.bits.status = 1;</div><div class='ctx'> 		cmd.bits.command_code = DMUB_GPINT__STOP_FW;</div><div class='ctx'> 		cmd.bits.param = 0;</div><div class='ctx'> </div><div class='ctx'> 		dmub-&gt;hw_funcs.set_gpint(dmub, cmd);</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; timeout_us; i++) {</div><div class='del'>-			if (dmub-&gt;hw_funcs.is_gpint_acked(dmub, cmd))</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			udelay(poll_delay_us);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		for (; i &lt; timeout_us; i++) {</div><div class='ctx'> 			scratch = dmub-&gt;hw_funcs.get_gpint_response(dmub);</div><div class='ctx'> 			if (scratch == DMUB_GPINT__STOP_FW_RESPONSE)</div><div class='hunk'>@@ -517,28 +513,69 @@ void dmub_dcn401_send_reg_inbox0_cmd_msg(struct dmub_srv *dmub,</div><div class='ctx'> 		union dmub_rb_cmd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t *dwords = (uint32_t *)cmd;</div><div class='del'>-</div><div class='add'>+	int32_t payload_size_bytes = cmd-&gt;cmd_common.header.payload_bytes;</div><div class='add'>+	uint32_t msg_index;</div><div class='ctx'> 	static_assert(sizeof(*cmd) == 64, "DMUB command size mismatch");</div><div class='ctx'> </div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG0, dwords[0]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG1, dwords[1]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG2, dwords[2]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG3, dwords[3]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG4, dwords[4]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG5, dwords[5]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG6, dwords[6]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG7, dwords[7]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG8, dwords[8]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG9, dwords[9]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG10, dwords[10]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG11, dwords[11]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG12, dwords[12]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG13, dwords[13]);</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_MSG14, dwords[14]);</div><div class='add'>+	/* read remaining data based on payload size */</div><div class='add'>+	for (msg_index = 0; msg_index &lt; 15; msg_index++) {</div><div class='add'>+		if (payload_size_bytes &lt;= msg_index * 4) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (msg_index) {</div><div class='add'>+		case 0:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG0, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 1:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG1, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG2, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG3, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG4, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 5:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG5, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 6:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG6, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 7:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG7, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 8:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG8, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 9:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG9, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 10:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG10, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 11:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG11, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 12:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG12, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 13:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG13, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		case 14:</div><div class='add'>+			REG_WRITE(DMCUB_REG_INBOX0_MSG14, dwords[msg_index + 1]);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* writing to INBOX RDY register will trigger DMUB REG INBOX0 RDY</div><div class='ctx'> 	 * interrupt.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(DMCUB_REG_INBOX0_RDY, dwords[15]);</div><div class='add'>+	REG_WRITE(DMCUB_REG_INBOX0_RDY, dwords[0]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> uint32_t dmub_dcn401_read_reg_inbox0_rsp_int_status(struct dmub_srv *dmub)</div><div class='hunk'>@@ -556,30 +593,39 @@ void dmub_dcn401_read_reg_inbox0_cmd_rsp(struct dmub_srv *dmub,</div><div class='ctx'> </div><div class='ctx'> 	static_assert(sizeof(*cmd) == 64, "DMUB command size mismatch");</div><div class='ctx'> </div><div class='del'>-	dwords[0] = REG_READ(DMCUB_REG_INBOX0_MSG0);</div><div class='del'>-	dwords[1] = REG_READ(DMCUB_REG_INBOX0_MSG1);</div><div class='del'>-	dwords[2] = REG_READ(DMCUB_REG_INBOX0_MSG2);</div><div class='del'>-	dwords[3] = REG_READ(DMCUB_REG_INBOX0_MSG3);</div><div class='del'>-	dwords[4] = REG_READ(DMCUB_REG_INBOX0_MSG4);</div><div class='del'>-	dwords[5] = REG_READ(DMCUB_REG_INBOX0_MSG5);</div><div class='del'>-	dwords[6] = REG_READ(DMCUB_REG_INBOX0_MSG6);</div><div class='del'>-	dwords[7] = REG_READ(DMCUB_REG_INBOX0_MSG7);</div><div class='del'>-	dwords[8] = REG_READ(DMCUB_REG_INBOX0_MSG8);</div><div class='del'>-	dwords[9] = REG_READ(DMCUB_REG_INBOX0_MSG9);</div><div class='del'>-	dwords[10] = REG_READ(DMCUB_REG_INBOX0_MSG10);</div><div class='del'>-	dwords[11] = REG_READ(DMCUB_REG_INBOX0_MSG11);</div><div class='del'>-	dwords[12] = REG_READ(DMCUB_REG_INBOX0_MSG12);</div><div class='del'>-	dwords[13] = REG_READ(DMCUB_REG_INBOX0_MSG13);</div><div class='del'>-	dwords[14] = REG_READ(DMCUB_REG_INBOX0_MSG14);</div><div class='del'>-	dwords[15] = REG_READ(DMCUB_REG_INBOX0_RSP);</div><div class='add'>+	dwords[0] = REG_READ(DMCUB_REG_INBOX0_RSP);</div><div class='add'>+	dwords[1] = REG_READ(DMCUB_REG_INBOX0_MSG0);</div><div class='add'>+	dwords[2] = REG_READ(DMCUB_REG_INBOX0_MSG1);</div><div class='add'>+	dwords[3] = REG_READ(DMCUB_REG_INBOX0_MSG2);</div><div class='add'>+	dwords[4] = REG_READ(DMCUB_REG_INBOX0_MSG3);</div><div class='add'>+	dwords[5] = REG_READ(DMCUB_REG_INBOX0_MSG4);</div><div class='add'>+	dwords[6] = REG_READ(DMCUB_REG_INBOX0_MSG5);</div><div class='add'>+	dwords[7] = REG_READ(DMCUB_REG_INBOX0_MSG6);</div><div class='add'>+	dwords[8] = REG_READ(DMCUB_REG_INBOX0_MSG7);</div><div class='add'>+	dwords[9] = REG_READ(DMCUB_REG_INBOX0_MSG8);</div><div class='add'>+	dwords[10] = REG_READ(DMCUB_REG_INBOX0_MSG9);</div><div class='add'>+	dwords[11] = REG_READ(DMCUB_REG_INBOX0_MSG10);</div><div class='add'>+	dwords[12] = REG_READ(DMCUB_REG_INBOX0_MSG11);</div><div class='add'>+	dwords[13] = REG_READ(DMCUB_REG_INBOX0_MSG12);</div><div class='add'>+	dwords[14] = REG_READ(DMCUB_REG_INBOX0_MSG13);</div><div class='add'>+	dwords[15] = REG_READ(DMCUB_REG_INBOX0_MSG14);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void dmub_dcn401_write_reg_inbox0_rsp_int_ack(struct dmub_srv *dmub)</div><div class='ctx'> {</div><div class='ctx'> 	REG_UPDATE(HOST_INTERRUPT_CSR, HOST_REG_INBOX0_RSP_INT_ACK, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dmub_dcn401_clear_reg_inbox0_rsp_int_ack(struct dmub_srv *dmub)</div><div class='add'>+{</div><div class='ctx'> 	REG_UPDATE(HOST_INTERRUPT_CSR, HOST_REG_INBOX0_RSP_INT_ACK, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dmub_dcn401_enable_reg_inbox0_rsp_int(struct dmub_srv *dmub, bool enable)</div><div class='add'>+{</div><div class='add'>+	REG_UPDATE(HOST_INTERRUPT_CSR, HOST_REG_INBOX0_RSP_INT_EN, enable ? 1:0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void dmub_dcn401_write_reg_outbox0_rdy_int_ack(struct dmub_srv *dmub)</div><div class='ctx'> {</div><div class='ctx'> 	REG_UPDATE(HOST_INTERRUPT_CSR, HOST_REG_OUTBOX0_RDY_INT_ACK, 1);</div><div class='hunk'>@@ -604,11 +650,6 @@ uint32_t dmub_dcn401_read_reg_outbox0_rsp_int_status(struct dmub_srv *dmub)</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dmub_dcn401_enable_reg_inbox0_rsp_int(struct dmub_srv *dmub, bool enable)</div><div class='del'>-{</div><div class='del'>-	REG_UPDATE(HOST_INTERRUPT_CSR, HOST_REG_INBOX0_RSP_INT_EN, enable ? 1:0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void dmub_dcn401_enable_reg_outbox0_rdy_int(struct dmub_srv *dmub, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	REG_UPDATE(HOST_INTERRUPT_CSR, HOST_REG_OUTBOX0_RDY_INT_EN, enable ? 1:0);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h<br/>index c35be52676f6..88c3a44d67d9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dmub/src/dmub_dcn401.h</a></div><div class='hunk'>@@ -277,11 +277,13 @@ uint32_t dmub_dcn401_read_reg_inbox0_rsp_int_status(struct dmub_srv *dmub);</div><div class='ctx'> void dmub_dcn401_read_reg_inbox0_cmd_rsp(struct dmub_srv *dmub,</div><div class='ctx'> 		union dmub_rb_cmd *cmd);</div><div class='ctx'> void dmub_dcn401_write_reg_inbox0_rsp_int_ack(struct dmub_srv *dmub);</div><div class='add'>+void dmub_dcn401_clear_reg_inbox0_rsp_int_ack(struct dmub_srv *dmub);</div><div class='add'>+void dmub_dcn401_enable_reg_inbox0_rsp_int(struct dmub_srv *dmub, bool enable);</div><div class='add'>+</div><div class='ctx'> void dmub_dcn401_write_reg_outbox0_rdy_int_ack(struct dmub_srv *dmub);</div><div class='ctx'> void dmub_dcn401_read_reg_outbox0_msg(struct dmub_srv *dmub, uint32_t *msg);</div><div class='ctx'> void dmub_dcn401_write_reg_outbox0_rsp(struct dmub_srv *dmub, uint32_t *msg);</div><div class='ctx'> uint32_t dmub_dcn401_read_reg_outbox0_rsp_int_status(struct dmub_srv *dmub);</div><div class='del'>-void dmub_dcn401_enable_reg_inbox0_rsp_int(struct dmub_srv *dmub, bool enable);</div><div class='ctx'> void dmub_dcn401_enable_reg_outbox0_rdy_int(struct dmub_srv *dmub, bool enable);</div><div class='ctx'> uint32_t dmub_dcn401_read_reg_outbox0_rdy_int_status(struct dmub_srv *dmub);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c<br/>index ae8133816b43..acca7943a8c8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c</a></div><div class='hunk'>@@ -157,6 +157,9 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmub_srv_hw_funcs *funcs = &amp;dmub-&gt;hw_funcs;</div><div class='ctx'> </div><div class='add'>+	/* default to specifying now inbox type */</div><div class='add'>+	enum dmub_inbox_cmd_interface_type default_inbox_type = DMUB_CMD_INTERFACE_DEFAULT;</div><div class='add'>+</div><div class='ctx'> 	switch (asic) {</div><div class='ctx'> 	case DMUB_ASIC_DCN20:</div><div class='ctx'> 	case DMUB_ASIC_DCN21:</div><div class='hunk'>@@ -395,10 +398,15 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)</div><div class='ctx'> </div><div class='ctx'> 		funcs-&gt;get_current_time = dmub_dcn401_get_current_time;</div><div class='ctx'> 		funcs-&gt;get_diagnostic_data = dmub_dcn401_get_diagnostic_data;</div><div class='add'>+</div><div class='ctx'> 		funcs-&gt;send_reg_inbox0_cmd_msg = dmub_dcn401_send_reg_inbox0_cmd_msg;</div><div class='ctx'> 		funcs-&gt;read_reg_inbox0_rsp_int_status = dmub_dcn401_read_reg_inbox0_rsp_int_status;</div><div class='ctx'> 		funcs-&gt;read_reg_inbox0_cmd_rsp = dmub_dcn401_read_reg_inbox0_cmd_rsp;</div><div class='ctx'> 		funcs-&gt;write_reg_inbox0_rsp_int_ack = dmub_dcn401_write_reg_inbox0_rsp_int_ack;</div><div class='add'>+		funcs-&gt;clear_reg_inbox0_rsp_int_ack = dmub_dcn401_clear_reg_inbox0_rsp_int_ack;</div><div class='add'>+		funcs-&gt;enable_reg_inbox0_rsp_int = dmub_dcn401_enable_reg_inbox0_rsp_int;</div><div class='add'>+		default_inbox_type = DMUB_CMD_INTERFACE_FB; // still default to FB for now</div><div class='add'>+</div><div class='ctx'> 		funcs-&gt;write_reg_outbox0_rdy_int_ack = dmub_dcn401_write_reg_outbox0_rdy_int_ack;</div><div class='ctx'> 		funcs-&gt;read_reg_outbox0_msg = dmub_dcn401_read_reg_outbox0_msg;</div><div class='ctx'> 		funcs-&gt;write_reg_outbox0_rsp = dmub_dcn401_write_reg_outbox0_rsp;</div><div class='hunk'>@@ -411,6 +419,20 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* set default inbox type if not overriden */</div><div class='add'>+	if (dmub-&gt;inbox_type == DMUB_CMD_INTERFACE_DEFAULT) {</div><div class='add'>+		if (default_inbox_type != DMUB_CMD_INTERFACE_DEFAULT) {</div><div class='add'>+			/* use default inbox type as specified by DCN rev */</div><div class='add'>+			dmub-&gt;inbox_type = default_inbox_type;</div><div class='add'>+		} else if (funcs-&gt;send_reg_inbox0_cmd_msg) {</div><div class='add'>+			/* prefer reg as default inbox type if present */</div><div class='add'>+			dmub-&gt;inbox_type = DMUB_CMD_INTERFACE_REG;</div><div class='add'>+		} else {</div><div class='add'>+			/* use fb as fallback */</div><div class='add'>+			dmub-&gt;inbox_type = DMUB_CMD_INTERFACE_FB;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -426,6 +448,7 @@ enum dmub_status dmub_srv_create(struct dmub_srv *dmub,</div><div class='ctx'> 	dmub-&gt;asic = params-&gt;asic;</div><div class='ctx'> 	dmub-&gt;fw_version = params-&gt;fw_version;</div><div class='ctx'> 	dmub-&gt;is_virtual = params-&gt;is_virtual;</div><div class='add'>+	dmub-&gt;inbox_type = params-&gt;inbox_type;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup asic dependent hardware funcs. */</div><div class='ctx'> 	if (!dmub_srv_hw_setup(dmub, params-&gt;asic)) {</div><div class='hunk'>@@ -695,7 +718,7 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,</div><div class='ctx'> 	inbox1.base = cw4.region.base;</div><div class='ctx'> 	inbox1.top = cw4.region.base + DMUB_RB_SIZE;</div><div class='ctx'> 	outbox1.base = inbox1.top;</div><div class='del'>-	outbox1.top = cw4.region.top;</div><div class='add'>+	outbox1.top = inbox1.top + DMUB_RB_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	cw5.offset.quad_part = tracebuff_fb-&gt;gpu_addr;</div><div class='ctx'> 	cw5.region.base = DMUB_CW5_BASE;</div><div class='hunk'>@@ -737,7 +760,7 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,</div><div class='ctx'> 	rb_params.ctx = dmub;</div><div class='ctx'> 	rb_params.base_address = mail_fb-&gt;cpu_addr;</div><div class='ctx'> 	rb_params.capacity = DMUB_RB_SIZE;</div><div class='del'>-	dmub_rb_init(&amp;dmub-&gt;inbox1_rb, &amp;rb_params);</div><div class='add'>+	dmub_rb_init(&amp;dmub-&gt;inbox1.rb, &amp;rb_params);</div><div class='ctx'> </div><div class='ctx'> 	// Initialize outbox1 ring buffer</div><div class='ctx'> 	rb_params.ctx = dmub;</div><div class='hunk'>@@ -768,27 +791,6 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,</div><div class='ctx'> 	return DMUB_STATUS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub)</div><div class='del'>-{</div><div class='del'>-	if (!dmub-&gt;sw_init)</div><div class='del'>-		return DMUB_STATUS_INVALID;</div><div class='del'>-</div><div class='del'>-	if (dmub-&gt;hw_funcs.get_inbox1_rptr &amp;&amp; dmub-&gt;hw_funcs.get_inbox1_wptr) {</div><div class='del'>-		uint32_t rptr = dmub-&gt;hw_funcs.get_inbox1_rptr(dmub);</div><div class='del'>-		uint32_t wptr = dmub-&gt;hw_funcs.get_inbox1_wptr(dmub);</div><div class='del'>-</div><div class='del'>-		if (rptr &gt; dmub-&gt;inbox1_rb.capacity || wptr &gt; dmub-&gt;inbox1_rb.capacity) {</div><div class='del'>-			return DMUB_STATUS_HW_FAILURE;</div><div class='del'>-		} else {</div><div class='del'>-			dmub-&gt;inbox1_rb.rptr = rptr;</div><div class='del'>-			dmub-&gt;inbox1_rb.wrpt = wptr;</div><div class='del'>-			dmub-&gt;inbox1_last_wptr = dmub-&gt;inbox1_rb.wrpt;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return DMUB_STATUS_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub)</div><div class='ctx'> {</div><div class='ctx'> 	if (!dmub-&gt;sw_init)</div><div class='hunk'>@@ -799,8 +801,13 @@ enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub)</div><div class='ctx'> </div><div class='ctx'> 	/* mailboxes have been reset in hw, so reset the sw state as well */</div><div class='ctx'> 	dmub-&gt;inbox1_last_wptr = 0;</div><div class='del'>-	dmub-&gt;inbox1_rb.wrpt = 0;</div><div class='del'>-	dmub-&gt;inbox1_rb.rptr = 0;</div><div class='add'>+	dmub-&gt;inbox1.rb.wrpt = 0;</div><div class='add'>+	dmub-&gt;inbox1.rb.rptr = 0;</div><div class='add'>+	dmub-&gt;inbox1.num_reported = 0;</div><div class='add'>+	dmub-&gt;inbox1.num_submitted = 0;</div><div class='add'>+	dmub-&gt;reg_inbox0.num_reported = 0;</div><div class='add'>+	dmub-&gt;reg_inbox0.num_submitted = 0;</div><div class='add'>+	dmub-&gt;reg_inbox0.is_pending = 0;</div><div class='ctx'> 	dmub-&gt;outbox0_rb.wrpt = 0;</div><div class='ctx'> 	dmub-&gt;outbox0_rb.rptr = 0;</div><div class='ctx'> 	dmub-&gt;outbox1_rb.wrpt = 0;</div><div class='hunk'>@@ -811,7 +818,7 @@ enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub)</div><div class='ctx'> 	return DMUB_STATUS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,</div><div class='add'>+enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub,</div><div class='ctx'> 				    const union dmub_rb_cmd *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	if (!dmub-&gt;hw_init)</div><div class='hunk'>@@ -820,18 +827,20 @@ enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub,</div><div class='ctx'> 	if (dmub-&gt;power_state != DMUB_POWER_STATE_D0)</div><div class='ctx'> 		return DMUB_STATUS_POWER_STATE_D3;</div><div class='ctx'> </div><div class='del'>-	if (dmub-&gt;inbox1_rb.rptr &gt; dmub-&gt;inbox1_rb.capacity ||</div><div class='del'>-	    dmub-&gt;inbox1_rb.wrpt &gt; dmub-&gt;inbox1_rb.capacity) {</div><div class='add'>+	if (dmub-&gt;inbox1.rb.rptr &gt; dmub-&gt;inbox1.rb.capacity ||</div><div class='add'>+	    dmub-&gt;inbox1.rb.wrpt &gt; dmub-&gt;inbox1.rb.capacity) {</div><div class='ctx'> 		return DMUB_STATUS_HW_FAILURE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dmub_rb_push_front(&amp;dmub-&gt;inbox1_rb, cmd))</div><div class='add'>+	if (dmub_rb_push_front(&amp;dmub-&gt;inbox1.rb, cmd)) {</div><div class='add'>+		dmub-&gt;inbox1.num_submitted++;</div><div class='ctx'> 		return DMUB_STATUS_OK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return DMUB_STATUS_QUEUE_FULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub)</div><div class='add'>+enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub)</div><div class='ctx'> {</div><div class='ctx'> 	struct dmub_rb flush_rb;</div><div class='ctx'> </div><div class='hunk'>@@ -846,13 +855,13 @@ enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub)</div><div class='ctx'> 	 * been flushed to framebuffer memory. Otherwise DMCUB might</div><div class='ctx'> 	 * read back stale, fully invalid or partially invalid data.</div><div class='ctx'> 	 */</div><div class='del'>-	flush_rb = dmub-&gt;inbox1_rb;</div><div class='add'>+	flush_rb = dmub-&gt;inbox1.rb;</div><div class='ctx'> 	flush_rb.rptr = dmub-&gt;inbox1_last_wptr;</div><div class='ctx'> 	dmub_rb_flush_pending(&amp;flush_rb);</div><div class='ctx'> </div><div class='del'>-		dmub-&gt;hw_funcs.set_inbox1_wptr(dmub, dmub-&gt;inbox1_rb.wrpt);</div><div class='add'>+		dmub-&gt;hw_funcs.set_inbox1_wptr(dmub, dmub-&gt;inbox1.rb.wrpt);</div><div class='ctx'> </div><div class='del'>-	dmub-&gt;inbox1_last_wptr = dmub-&gt;inbox1_rb.wrpt;</div><div class='add'>+	dmub-&gt;inbox1_last_wptr = dmub-&gt;inbox1.rb.wrpt;</div><div class='ctx'> </div><div class='ctx'> 	return DMUB_STATUS_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -910,26 +919,84 @@ enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,</div><div class='ctx'> 	return DMUB_STATUS_TIMEOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dmub_srv_update_reg_inbox0_status(struct dmub_srv *dmub)</div><div class='add'>+{</div><div class='add'>+	if (dmub-&gt;reg_inbox0.is_pending) {</div><div class='add'>+		dmub-&gt;reg_inbox0.is_pending = dmub-&gt;hw_funcs.read_reg_inbox0_rsp_int_status &amp;&amp;</div><div class='add'>+				!dmub-&gt;hw_funcs.read_reg_inbox0_rsp_int_status(dmub);</div><div class='add'>+</div><div class='add'>+		if (!dmub-&gt;reg_inbox0.is_pending) {</div><div class='add'>+			/* ack the rsp interrupt */</div><div class='add'>+			if (dmub-&gt;hw_funcs.write_reg_inbox0_rsp_int_ack)</div><div class='add'>+				dmub-&gt;hw_funcs.write_reg_inbox0_rsp_int_ack(dmub);</div><div class='add'>+</div><div class='add'>+			/* only update the reported count if commands aren't being batched */</div><div class='add'>+			if (!dmub-&gt;reg_inbox0.is_pending &amp;&amp; !dmub-&gt;reg_inbox0.is_multi_pending) {</div><div class='add'>+				dmub-&gt;reg_inbox0.num_reported = dmub-&gt;reg_inbox0.num_submitted;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub,</div><div class='add'>+					uint32_t timeout_us)</div><div class='add'>+{</div><div class='add'>+	uint32_t i;</div><div class='add'>+	const uint32_t polling_interval_us = 1;</div><div class='add'>+	struct dmub_srv_inbox scratch_reg_inbox0 = dmub-&gt;reg_inbox0;</div><div class='add'>+	struct dmub_srv_inbox scratch_inbox1 = dmub-&gt;inbox1;</div><div class='add'>+	const volatile struct dmub_srv_inbox *reg_inbox0 = &amp;dmub-&gt;reg_inbox0;</div><div class='add'>+	const volatile struct dmub_srv_inbox *inbox1 = &amp;dmub-&gt;inbox1;</div><div class='add'>+</div><div class='add'>+	if (!dmub-&gt;hw_init ||</div><div class='add'>+			!dmub-&gt;hw_funcs.get_inbox1_wptr)</div><div class='add'>+		return DMUB_STATUS_INVALID;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= timeout_us; i += polling_interval_us) {</div><div class='add'>+			scratch_inbox1.rb.wrpt = dmub-&gt;hw_funcs.get_inbox1_wptr(dmub);</div><div class='add'>+			scratch_inbox1.rb.rptr = dmub-&gt;hw_funcs.get_inbox1_rptr(dmub);</div><div class='add'>+</div><div class='add'>+		scratch_reg_inbox0.is_pending = scratch_reg_inbox0.is_pending &amp;&amp;</div><div class='add'>+				dmub-&gt;hw_funcs.read_reg_inbox0_rsp_int_status &amp;&amp;</div><div class='add'>+				!dmub-&gt;hw_funcs.read_reg_inbox0_rsp_int_status(dmub);</div><div class='add'>+</div><div class='add'>+		if (scratch_inbox1.rb.rptr &gt; dmub-&gt;inbox1.rb.capacity)</div><div class='add'>+			return DMUB_STATUS_HW_FAILURE;</div><div class='add'>+</div><div class='add'>+		/* check current HW state first, but use command submission vs reported as a fallback */</div><div class='add'>+		if ((dmub_rb_empty(&amp;scratch_inbox1.rb) ||</div><div class='add'>+				inbox1-&gt;num_reported &gt;= scratch_inbox1.num_submitted) &amp;&amp;</div><div class='add'>+				(!scratch_reg_inbox0.is_pending ||</div><div class='add'>+				reg_inbox0-&gt;num_reported &gt;= scratch_reg_inbox0.num_submitted))</div><div class='add'>+			return DMUB_STATUS_OK;</div><div class='add'>+</div><div class='add'>+		udelay(polling_interval_us);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return DMUB_STATUS_TIMEOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,</div><div class='ctx'> 					uint32_t timeout_us)</div><div class='ctx'> {</div><div class='del'>-	uint32_t i, rptr;</div><div class='add'>+	enum dmub_status status;</div><div class='add'>+	uint32_t i;</div><div class='add'>+	const uint32_t polling_interval_us = 1;</div><div class='ctx'> </div><div class='ctx'> 	if (!dmub-&gt;hw_init)</div><div class='ctx'> 		return DMUB_STATUS_INVALID;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt;= timeout_us; ++i) {</div><div class='del'>-			rptr = dmub-&gt;hw_funcs.get_inbox1_rptr(dmub);</div><div class='add'>+	for (i = 0; i &lt; timeout_us; i += polling_interval_us) {</div><div class='add'>+		status = dmub_srv_update_inbox_status(dmub);</div><div class='ctx'> </div><div class='del'>-		if (rptr &gt; dmub-&gt;inbox1_rb.capacity)</div><div class='del'>-			return DMUB_STATUS_HW_FAILURE;</div><div class='add'>+		if (status != DMUB_STATUS_OK)</div><div class='add'>+			return status;</div><div class='ctx'> </div><div class='del'>-		dmub-&gt;inbox1_rb.rptr = rptr;</div><div class='del'>-</div><div class='del'>-		if (dmub_rb_empty(&amp;dmub-&gt;inbox1_rb))</div><div class='add'>+		/* check for idle */</div><div class='add'>+		if (dmub_rb_empty(&amp;dmub-&gt;inbox1.rb) &amp;&amp; !dmub-&gt;reg_inbox0.is_pending)</div><div class='ctx'> 			return DMUB_STATUS_OK;</div><div class='ctx'> </div><div class='del'>-		udelay(1);</div><div class='add'>+		udelay(polling_interval_us);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return DMUB_STATUS_TIMEOUT;</div><div class='hunk'>@@ -1040,35 +1107,6 @@ enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,</div><div class='ctx'> 	return DMUB_STATUS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum dmub_status dmub_srv_cmd_with_reply_data(struct dmub_srv *dmub,</div><div class='del'>-					      union dmub_rb_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	enum dmub_status status = DMUB_STATUS_OK;</div><div class='del'>-</div><div class='del'>-	// Queue command</div><div class='del'>-	status = dmub_srv_cmd_queue(dmub, cmd);</div><div class='del'>-</div><div class='del'>-	if (status != DMUB_STATUS_OK)</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	// Execute command</div><div class='del'>-	status = dmub_srv_cmd_execute(dmub);</div><div class='del'>-</div><div class='del'>-	if (status != DMUB_STATUS_OK)</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	// Wait for DMUB to process command</div><div class='del'>-	status = dmub_srv_wait_for_idle(dmub, 100000);</div><div class='del'>-</div><div class='del'>-	if (status != DMUB_STATUS_OK)</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	// Copy data back from ring buffer into command</div><div class='del'>-	dmub_rb_get_return_data(&amp;dmub-&gt;inbox1_rb, cmd);</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline bool dmub_rb_out_trace_buffer_front(struct dmub_rb *rb,</div><div class='ctx'> 				 void *entry)</div><div class='ctx'> {</div><div class='hunk'>@@ -1160,47 +1198,162 @@ void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state)</div><div class='add'>+{</div><div class='add'>+	if (!dmub || !dmub-&gt;hw_init)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dmub-&gt;power_state = dmub_srv_power_state;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-enum dmub_status dmub_srv_send_reg_inbox0_cmd(</div><div class='del'>-		struct dmub_srv *dmub,</div><div class='del'>-		union dmub_rb_cmd *cmd,</div><div class='del'>-		bool with_reply, uint32_t timeout_us)</div><div class='add'>+enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd)</div><div class='ctx'> {</div><div class='del'>-	uint32_t rsp_ready = 0;</div><div class='del'>-	uint32_t i;</div><div class='add'>+	uint32_t num_pending = 0;</div><div class='add'>+</div><div class='add'>+	if (!dmub-&gt;hw_init)</div><div class='add'>+		return DMUB_STATUS_INVALID;</div><div class='ctx'> </div><div class='add'>+	if (dmub-&gt;power_state != DMUB_POWER_STATE_D0)</div><div class='add'>+		return DMUB_STATUS_POWER_STATE_D3;</div><div class='add'>+</div><div class='add'>+	if (!dmub-&gt;hw_funcs.send_reg_inbox0_cmd_msg ||</div><div class='add'>+			!dmub-&gt;hw_funcs.clear_reg_inbox0_rsp_int_ack)</div><div class='add'>+		return DMUB_STATUS_INVALID;</div><div class='add'>+</div><div class='add'>+	if (dmub-&gt;reg_inbox0.num_submitted &gt;= dmub-&gt;reg_inbox0.num_reported)</div><div class='add'>+		num_pending = dmub-&gt;reg_inbox0.num_submitted - dmub-&gt;reg_inbox0.num_reported;</div><div class='add'>+	else</div><div class='add'>+		/* num_submitted wrapped */</div><div class='add'>+		num_pending = DMUB_REG_INBOX0_RB_MAX_ENTRY -</div><div class='add'>+				(dmub-&gt;reg_inbox0.num_reported - dmub-&gt;reg_inbox0.num_submitted);</div><div class='add'>+</div><div class='add'>+	if (num_pending &gt;= DMUB_REG_INBOX0_RB_MAX_ENTRY)</div><div class='add'>+		return DMUB_STATUS_QUEUE_FULL;</div><div class='add'>+</div><div class='add'>+	/* clear last rsp ack and send message */</div><div class='add'>+	dmub-&gt;hw_funcs.clear_reg_inbox0_rsp_int_ack(dmub);</div><div class='ctx'> 	dmub-&gt;hw_funcs.send_reg_inbox0_cmd_msg(dmub, cmd);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; timeout_us; i++) {</div><div class='del'>-		rsp_ready = dmub-&gt;hw_funcs.read_reg_inbox0_rsp_int_status(dmub);</div><div class='del'>-		if (rsp_ready)</div><div class='del'>-			break;</div><div class='del'>-		udelay(1);</div><div class='add'>+	dmub-&gt;reg_inbox0.num_submitted++;</div><div class='add'>+	dmub-&gt;reg_inbox0.is_pending = true;</div><div class='add'>+	dmub-&gt;reg_inbox0.is_multi_pending = cmd-&gt;cmd_common.header.multi_cmd_pending;</div><div class='add'>+</div><div class='add'>+	return DMUB_STATUS_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dmub_srv_cmd_get_response(struct dmub_srv *dmub,</div><div class='add'>+		union dmub_rb_cmd *cmd_rsp)</div><div class='add'>+{</div><div class='add'>+	if (dmub) {</div><div class='add'>+		if (dmub-&gt;inbox_type == DMUB_CMD_INTERFACE_REG &amp;&amp;</div><div class='add'>+				dmub-&gt;hw_funcs.read_reg_inbox0_cmd_rsp) {</div><div class='add'>+			dmub-&gt;hw_funcs.read_reg_inbox0_cmd_rsp(dmub, cmd_rsp);</div><div class='add'>+		} else {</div><div class='add'>+			dmub_rb_get_return_data(&amp;dmub-&gt;inbox1.rb, cmd_rsp);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	if (rsp_ready == 0)</div><div class='del'>-		return DMUB_STATUS_TIMEOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dmub_status dmub_srv_sync_reg_inbox0(struct dmub_srv *dmub)</div><div class='add'>+{</div><div class='add'>+	if (!dmub || !dmub-&gt;sw_init)</div><div class='add'>+		return DMUB_STATUS_INVALID;</div><div class='ctx'> </div><div class='del'>-	if (with_reply)</div><div class='del'>-		dmub-&gt;hw_funcs.read_reg_inbox0_cmd_rsp(dmub, cmd);</div><div class='add'>+	dmub-&gt;reg_inbox0.is_pending = 0;</div><div class='add'>+	dmub-&gt;reg_inbox0.is_multi_pending = 0;</div><div class='ctx'> </div><div class='del'>-	dmub-&gt;hw_funcs.write_reg_inbox0_rsp_int_ack(dmub);</div><div class='add'>+	return DMUB_STATUS_OK;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* wait for rsp int status is cleared to initial state before exit */</div><div class='del'>-	for (; i &lt;= timeout_us; i++) {</div><div class='del'>-		rsp_ready = dmub-&gt;hw_funcs.read_reg_inbox0_rsp_int_status(dmub);</div><div class='del'>-		if (rsp_ready == 0)</div><div class='del'>-			break;</div><div class='del'>-		udelay(1);</div><div class='add'>+static enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub)</div><div class='add'>+{</div><div class='add'>+	if (!dmub-&gt;sw_init)</div><div class='add'>+		return DMUB_STATUS_INVALID;</div><div class='add'>+</div><div class='add'>+	if (dmub-&gt;hw_funcs.get_inbox1_rptr &amp;&amp; dmub-&gt;hw_funcs.get_inbox1_wptr) {</div><div class='add'>+		uint32_t rptr = dmub-&gt;hw_funcs.get_inbox1_rptr(dmub);</div><div class='add'>+		uint32_t wptr = dmub-&gt;hw_funcs.get_inbox1_wptr(dmub);</div><div class='add'>+</div><div class='add'>+		if (rptr &gt; dmub-&gt;inbox1.rb.capacity || wptr &gt; dmub-&gt;inbox1.rb.capacity) {</div><div class='add'>+			return DMUB_STATUS_HW_FAILURE;</div><div class='add'>+		} else {</div><div class='add'>+			dmub-&gt;inbox1.rb.rptr = rptr;</div><div class='add'>+			dmub-&gt;inbox1.rb.wrpt = wptr;</div><div class='add'>+			dmub-&gt;inbox1_last_wptr = dmub-&gt;inbox1.rb.wrpt;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	ASSERT(rsp_ready == 0);</div><div class='ctx'> </div><div class='ctx'> 	return DMUB_STATUS_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state)</div><div class='add'>+enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub)</div><div class='ctx'> {</div><div class='del'>-	if (!dmub || !dmub-&gt;hw_init)</div><div class='del'>-		return;</div><div class='add'>+	enum dmub_status status;</div><div class='ctx'> </div><div class='del'>-	dmub-&gt;power_state = dmub_srv_power_state;</div><div class='add'>+	status = dmub_srv_sync_reg_inbox0(dmub);</div><div class='add'>+	if (status != DMUB_STATUS_OK)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	status = dmub_srv_sync_inbox1(dmub);</div><div class='add'>+	if (status != DMUB_STATUS_OK)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	return DMUB_STATUS_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub,</div><div class='add'>+		uint32_t timeout_us,</div><div class='add'>+		uint32_t num_free_required)</div><div class='add'>+{</div><div class='add'>+	enum dmub_status status;</div><div class='add'>+	uint32_t i;</div><div class='add'>+	const uint32_t polling_interval_us = 1;</div><div class='add'>+</div><div class='add'>+	if (!dmub-&gt;hw_init)</div><div class='add'>+		return DMUB_STATUS_INVALID;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; timeout_us; i += polling_interval_us) {</div><div class='add'>+		status = dmub_srv_update_inbox_status(dmub);</div><div class='add'>+</div><div class='add'>+		if (status != DMUB_STATUS_OK)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		/* check for space in inbox1 */</div><div class='add'>+		if (dmub_rb_num_free(&amp;dmub-&gt;inbox1.rb) &gt;= num_free_required)</div><div class='add'>+			return DMUB_STATUS_OK;</div><div class='add'>+</div><div class='add'>+		udelay(polling_interval_us);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return DMUB_STATUS_TIMEOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub)</div><div class='add'>+{</div><div class='add'>+	uint32_t rptr;</div><div class='add'>+</div><div class='add'>+	if (!dmub-&gt;hw_init)</div><div class='add'>+		return DMUB_STATUS_INVALID;</div><div class='add'>+</div><div class='add'>+	if (dmub-&gt;power_state != DMUB_POWER_STATE_D0)</div><div class='add'>+		return DMUB_STATUS_POWER_STATE_D3;</div><div class='add'>+</div><div class='add'>+	/* update inbox1 state */</div><div class='add'>+	rptr = dmub-&gt;hw_funcs.get_inbox1_rptr(dmub);</div><div class='add'>+</div><div class='add'>+	if (rptr &gt; dmub-&gt;inbox1.rb.capacity)</div><div class='add'>+		return DMUB_STATUS_HW_FAILURE;</div><div class='add'>+</div><div class='add'>+	if (dmub-&gt;inbox1.rb.rptr &gt; rptr) {</div><div class='add'>+		/* rb wrapped */</div><div class='add'>+		dmub-&gt;inbox1.num_reported += (rptr + dmub-&gt;inbox1.rb.capacity - dmub-&gt;inbox1.rb.rptr) / DMUB_RB_CMD_SIZE;</div><div class='add'>+	} else {</div><div class='add'>+		dmub-&gt;inbox1.num_reported += (rptr - dmub-&gt;inbox1.rb.rptr) / DMUB_RB_CMD_SIZE;</div><div class='add'>+	}</div><div class='add'>+	dmub-&gt;inbox1.rb.rptr = rptr;</div><div class='add'>+</div><div class='add'>+	/* update reg_inbox0 */</div><div class='add'>+	dmub_srv_update_reg_inbox0_status(dmub);</div><div class='add'>+</div><div class='add'>+	return DMUB_STATUS_OK;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c<br/>index cce887cefc01..567c5b1aeb7a 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c</a></div><div class='hunk'>@@ -95,23 +95,6 @@ enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub,</div><div class='ctx'> 	case DMUB_OUT_CMD__DPIA_NOTIFICATION:</div><div class='ctx'> 		notify-&gt;type = DMUB_NOTIFICATION_DPIA_NOTIFICATION;</div><div class='ctx'> 		notify-&gt;link_index = cmd.dpia_notification.payload.header.instance;</div><div class='del'>-</div><div class='del'>-		if (cmd.dpia_notification.payload.header.type == DPIA_NOTIFY__BW_ALLOCATION) {</div><div class='del'>-</div><div class='del'>-			notify-&gt;dpia_notification.payload.data.dpia_bw_alloc.estimated_bw =</div><div class='del'>-					cmd.dpia_notification.payload.data.dpia_bw_alloc.estimated_bw;</div><div class='del'>-			notify-&gt;dpia_notification.payload.data.dpia_bw_alloc.allocated_bw =</div><div class='del'>-					cmd.dpia_notification.payload.data.dpia_bw_alloc.allocated_bw;</div><div class='del'>-</div><div class='del'>-			if (cmd.dpia_notification.payload.data.dpia_bw_alloc.bits.bw_request_failed)</div><div class='del'>-				notify-&gt;result = DPIA_BW_REQ_FAILED;</div><div class='del'>-			else if (cmd.dpia_notification.payload.data.dpia_bw_alloc.bits.bw_request_succeeded)</div><div class='del'>-				notify-&gt;result = DPIA_BW_REQ_SUCCESS;</div><div class='del'>-			else if (cmd.dpia_notification.payload.data.dpia_bw_alloc.bits.est_bw_changed)</div><div class='del'>-				notify-&gt;result = DPIA_EST_BW_CHANGED;</div><div class='del'>-			else if (cmd.dpia_notification.payload.data.dpia_bw_alloc.bits.bw_alloc_cap_changed)</div><div class='del'>-				notify-&gt;result = DPIA_BW_ALLOC_CAPS_CHANGED;</div><div class='del'>-		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DMUB_OUT_CMD__HPD_SENSE_NOTIFY:</div><div class='ctx'> 		notify-&gt;type = DMUB_NOTIFICATION_HPD_SENSE_NOTIFY;</div><div class='hunk'>@@ -119,6 +102,10 @@ enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub,</div><div class='ctx'> 			    &amp;cmd.hpd_sense_notify.data,</div><div class='ctx'> 			    sizeof(cmd.hpd_sense_notify.data));</div><div class='ctx'> 		break;</div><div class='add'>+	case DMUB_OUT_CMD__FUSED_IO:</div><div class='add'>+		notify-&gt;type = DMUB_NOTIFICATION_FUSED_IO;</div><div class='add'>+		dmub_memcpy(&amp;notify-&gt;fused_request, &amp;cmd.fused_io.request, sizeof(cmd.fused_io.request));</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		notify-&gt;type = DMUB_NOTIFICATION_NO_DATA;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/include/gpio_service_interface.h b/drivers/gpu/drm/amd/display/include/gpio_service_interface.h<br/>index 7e3240e73c1f..63813009a3a6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/gpio_service_interface.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/include/gpio_service_interface.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/gpio_service_interface.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/include/gpio_service_interface.h</a></div><div class='hunk'>@@ -86,6 +86,9 @@ enum dc_irq_source dal_irq_get_source(</div><div class='ctx'> enum dc_irq_source dal_irq_get_rx_source(</div><div class='ctx'> 	const struct gpio *irq);</div><div class='ctx'> </div><div class='add'>+enum dc_irq_source dal_irq_get_read_request(</div><div class='add'>+	const struct gpio *irq);</div><div class='add'>+</div><div class='ctx'> enum gpio_result dal_irq_setup_hpd_filter(</div><div class='ctx'> 	struct gpio *irq,</div><div class='ctx'> 	struct gpio_hpd_config *config);</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/include/link_service_types.h b/drivers/gpu/drm/amd/display/include/link_service_types.h<br/>index 1867aac57cf2..da74ed66c8f9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/link_service_types.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/include/link_service_types.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/include/link_service_types.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/include/link_service_types.h</a></div><div class='hunk'>@@ -89,6 +89,8 @@ struct link_training_settings {</div><div class='ctx'> 	bool enhanced_framing;</div><div class='ctx'> 	enum lttpr_mode lttpr_mode;</div><div class='ctx'> </div><div class='add'>+	bool lttpr_early_tps2;</div><div class='add'>+</div><div class='ctx'> 	/* disallow different lanes to have different lane settings */</div><div class='ctx'> 	bool disallow_per_lane_settings;</div><div class='ctx'> 	/* dpcd lane settings will always use the same hw lane settings</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h<br/>index 55c7d873175f..a37634942b07 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h</a></div><div class='hunk'>@@ -386,6 +386,7 @@ enum mod_hdcp_status mod_hdcp_write_repeater_auth_ack(struct mod_hdcp *hdcp);</div><div class='ctx'> enum mod_hdcp_status mod_hdcp_write_stream_manage(struct mod_hdcp *hdcp);</div><div class='ctx'> enum mod_hdcp_status mod_hdcp_write_content_type(struct mod_hdcp *hdcp);</div><div class='ctx'> enum mod_hdcp_status mod_hdcp_clear_cp_irq_status(struct mod_hdcp *hdcp);</div><div class='add'>+enum mod_hdcp_status mod_hdcp_write_poll_read_lc_fw(struct mod_hdcp *hdcp);</div><div class='ctx'> </div><div class='ctx'> /* hdcp version helpers */</div><div class='ctx'> static inline uint8_t is_dp_hdcp(struct mod_hdcp *hdcp)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c<br/>index 1d41dd58f6bc..bb8ae80b37f8 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c</a></div><div class='hunk'>@@ -452,21 +452,12 @@ out:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum mod_hdcp_status locality_check(struct mod_hdcp *hdcp,</div><div class='add'>+static enum mod_hdcp_status locality_check_sw(struct mod_hdcp *hdcp,</div><div class='ctx'> 		struct mod_hdcp_event_context *event_ctx,</div><div class='ctx'> 		struct mod_hdcp_transition_input_hdcp2 *input)</div><div class='ctx'> {</div><div class='ctx'> 	enum mod_hdcp_status status = MOD_HDCP_STATUS_SUCCESS;</div><div class='ctx'> </div><div class='del'>-	if (event_ctx-&gt;event != MOD_HDCP_EVENT_CALLBACK) {</div><div class='del'>-		event_ctx-&gt;unexpected_event = 1;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!mod_hdcp_execute_and_set(mod_hdcp_hdcp2_prepare_lc_init,</div><div class='del'>-			&amp;input-&gt;lc_init_prepare, &amp;status,</div><div class='del'>-			hdcp, "lc_init_prepare"))</div><div class='del'>-		goto out;</div><div class='ctx'> 	if (!mod_hdcp_execute_and_set(mod_hdcp_write_lc_init,</div><div class='ctx'> 			&amp;input-&gt;lc_init_write, &amp;status,</div><div class='ctx'> 			 hdcp, "lc_init_write"))</div><div class='hunk'>@@ -482,6 +473,48 @@ static enum mod_hdcp_status locality_check(struct mod_hdcp *hdcp,</div><div class='ctx'> 			&amp;input-&gt;l_prime_read, &amp;status,</div><div class='ctx'> 			hdcp, "l_prime_read"))</div><div class='ctx'> 		goto out;</div><div class='add'>+out:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum mod_hdcp_status locality_check_fw(struct mod_hdcp *hdcp,</div><div class='add'>+		struct mod_hdcp_event_context *event_ctx,</div><div class='add'>+		struct mod_hdcp_transition_input_hdcp2 *input)</div><div class='add'>+{</div><div class='add'>+	enum mod_hdcp_status status = MOD_HDCP_STATUS_SUCCESS;</div><div class='add'>+</div><div class='add'>+	if (!mod_hdcp_execute_and_set(mod_hdcp_write_poll_read_lc_fw,</div><div class='add'>+			&amp;input-&gt;l_prime_read, &amp;status,</div><div class='add'>+			hdcp, "l_prime_read"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum mod_hdcp_status locality_check(struct mod_hdcp *hdcp,</div><div class='add'>+		struct mod_hdcp_event_context *event_ctx,</div><div class='add'>+		struct mod_hdcp_transition_input_hdcp2 *input)</div><div class='add'>+{</div><div class='add'>+	enum mod_hdcp_status status = MOD_HDCP_STATUS_SUCCESS;</div><div class='add'>+	const bool use_fw = hdcp-&gt;config.ddc.funcs.atomic_write_poll_read_i2c</div><div class='add'>+			&amp;&amp; hdcp-&gt;config.ddc.funcs.atomic_write_poll_read_aux</div><div class='add'>+			&amp;&amp; !hdcp-&gt;connection.link.adjust.hdcp2.force_sw_locality_check;</div><div class='add'>+</div><div class='add'>+	if (event_ctx-&gt;event != MOD_HDCP_EVENT_CALLBACK) {</div><div class='add'>+		event_ctx-&gt;unexpected_event = 1;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mod_hdcp_execute_and_set(mod_hdcp_hdcp2_prepare_lc_init,</div><div class='add'>+			&amp;input-&gt;lc_init_prepare, &amp;status,</div><div class='add'>+			hdcp, "lc_init_prepare"))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	status = (use_fw ? locality_check_fw : locality_check_sw)(hdcp, event_ctx, input);</div><div class='add'>+	if (status != MOD_HDCP_STATUS_SUCCESS)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	if (!mod_hdcp_execute_and_set(mod_hdcp_hdcp2_validate_l_prime,</div><div class='ctx'> 			&amp;input-&gt;l_prime_validation, &amp;status,</div><div class='ctx'> 			hdcp, "l_prime_validation"))</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c<br/>index c5f6c11de7e5..89ffb89e1932 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_transition.c</a></div><div class='hunk'>@@ -184,17 +184,28 @@ enum mod_hdcp_status mod_hdcp_hdcp2_transition(struct mod_hdcp *hdcp,</div><div class='ctx'> 		callback_in_ms(0, output);</div><div class='ctx'> 		set_state_id(hdcp, output, H2_A2_LOCALITY_CHECK);</div><div class='ctx'> 		break;</div><div class='del'>-	case H2_A2_LOCALITY_CHECK:</div><div class='add'>+	case H2_A2_LOCALITY_CHECK: {</div><div class='add'>+		const bool use_fw = hdcp-&gt;config.ddc.funcs.atomic_write_poll_read_i2c</div><div class='add'>+				&amp;&amp; !adjust-&gt;hdcp2.force_sw_locality_check;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * 1A-05: consider disconnection after LC init a failure</div><div class='add'>+		 * 1A-13-1: consider invalid l' a failure</div><div class='add'>+		 * 1A-13-2: consider l' timeout a failure</div><div class='add'>+		 */</div><div class='ctx'> 		if (hdcp-&gt;state.stay_count &gt; 10 ||</div><div class='ctx'> 				input-&gt;lc_init_prepare != PASS ||</div><div class='del'>-				input-&gt;lc_init_write != PASS ||</div><div class='del'>-				input-&gt;l_prime_available_poll != PASS ||</div><div class='del'>-				input-&gt;l_prime_read != PASS) {</div><div class='del'>-			/*</div><div class='del'>-			 * 1A-05: consider disconnection after LC init a failure</div><div class='del'>-			 * 1A-13-1: consider invalid l' a failure</div><div class='del'>-			 * 1A-13-2: consider l' timeout a failure</div><div class='del'>-			 */</div><div class='add'>+				(!use_fw &amp;&amp; input-&gt;lc_init_write != PASS) ||</div><div class='add'>+				(!use_fw &amp;&amp; input-&gt;l_prime_available_poll != PASS)) {</div><div class='add'>+			fail_and_restart_in_ms(0, &amp;status, output);</div><div class='add'>+			break;</div><div class='add'>+		} else if (input-&gt;l_prime_read != PASS) {</div><div class='add'>+			if (use_fw &amp;&amp; hdcp-&gt;config.debug.lc_enable_sw_fallback) {</div><div class='add'>+				adjust-&gt;hdcp2.force_sw_locality_check = true;</div><div class='add'>+				callback_in_ms(0, output);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			fail_and_restart_in_ms(0, &amp;status, output);</div><div class='ctx'> 			break;</div><div class='ctx'> 		} else if (input-&gt;l_prime_validation != PASS) {</div><div class='hunk'>@@ -205,6 +216,7 @@ enum mod_hdcp_status mod_hdcp_hdcp2_transition(struct mod_hdcp *hdcp,</div><div class='ctx'> 		callback_in_ms(0, output);</div><div class='ctx'> 		set_state_id(hdcp, output, H2_A3_EXCHANGE_KS_AND_TEST_FOR_REPEATER);</div><div class='ctx'> 		break;</div><div class='add'>+	}</div><div class='ctx'> 	case H2_A3_EXCHANGE_KS_AND_TEST_FOR_REPEATER:</div><div class='ctx'> 		if (input-&gt;eks_prepare != PASS ||</div><div class='ctx'> 				input-&gt;eks_write != PASS) {</div><div class='hunk'>@@ -498,14 +510,25 @@ enum mod_hdcp_status mod_hdcp_hdcp2_dp_transition(struct mod_hdcp *hdcp,</div><div class='ctx'> 		callback_in_ms(0, output);</div><div class='ctx'> 		set_state_id(hdcp, output, D2_A2_LOCALITY_CHECK);</div><div class='ctx'> 		break;</div><div class='del'>-	case D2_A2_LOCALITY_CHECK:</div><div class='add'>+	case D2_A2_LOCALITY_CHECK: {</div><div class='add'>+		const bool use_fw = hdcp-&gt;config.ddc.funcs.atomic_write_poll_read_aux</div><div class='add'>+				&amp;&amp; !adjust-&gt;hdcp2.force_sw_locality_check;</div><div class='add'>+</div><div class='ctx'> 		if (hdcp-&gt;state.stay_count &gt; 10 ||</div><div class='ctx'> 				input-&gt;lc_init_prepare != PASS ||</div><div class='del'>-				input-&gt;lc_init_write != PASS ||</div><div class='del'>-				input-&gt;l_prime_read != PASS) {</div><div class='add'>+				(!use_fw &amp;&amp; input-&gt;lc_init_write != PASS)) {</div><div class='ctx'> 			/* 1A-12: consider invalid l' a failure */</div><div class='ctx'> 			fail_and_restart_in_ms(0, &amp;status, output);</div><div class='ctx'> 			break;</div><div class='add'>+		} else if (input-&gt;l_prime_read != PASS) {</div><div class='add'>+			if (use_fw &amp;&amp; hdcp-&gt;config.debug.lc_enable_sw_fallback) {</div><div class='add'>+				adjust-&gt;hdcp2.force_sw_locality_check = true;</div><div class='add'>+				callback_in_ms(0, output);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			fail_and_restart_in_ms(0, &amp;status, output);</div><div class='add'>+			break;</div><div class='ctx'> 		} else if (input-&gt;l_prime_validation != PASS) {</div><div class='ctx'> 			callback_in_ms(0, output);</div><div class='ctx'> 			increment_stay_counter(hdcp);</div><div class='hunk'>@@ -514,6 +537,7 @@ enum mod_hdcp_status mod_hdcp_hdcp2_dp_transition(struct mod_hdcp *hdcp,</div><div class='ctx'> 		callback_in_ms(0, output);</div><div class='ctx'> 		set_state_id(hdcp, output, D2_A34_EXCHANGE_KS_AND_TEST_FOR_REPEATER);</div><div class='ctx'> 		break;</div><div class='add'>+	}</div><div class='ctx'> 	case D2_A34_EXCHANGE_KS_AND_TEST_FOR_REPEATER:</div><div class='ctx'> 		if (input-&gt;eks_prepare != PASS ||</div><div class='ctx'> 				input-&gt;eks_write != PASS) {</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c<br/>index 6e064e6ae949..2e6408579194 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c</a></div><div class='hunk'>@@ -688,3 +688,76 @@ enum mod_hdcp_status mod_hdcp_clear_cp_irq_status(struct mod_hdcp *hdcp)</div><div class='ctx'> </div><div class='ctx'> 	return MOD_HDCP_STATUS_INVALID_OPERATION;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static bool write_stall_read_lc_fw_aux(struct mod_hdcp *hdcp)</div><div class='add'>+{</div><div class='add'>+	struct mod_hdcp_message_hdcp2 *hdcp2 = &amp;hdcp-&gt;auth.msg.hdcp2;</div><div class='add'>+</div><div class='add'>+	struct mod_hdcp_atomic_op_aux write = {</div><div class='add'>+		hdcp_dpcd_addrs[MOD_HDCP_MESSAGE_ID_WRITE_LC_INIT],</div><div class='add'>+		hdcp2-&gt;lc_init + 1,</div><div class='add'>+		sizeof(hdcp2-&gt;lc_init) - 1,</div><div class='add'>+	};</div><div class='add'>+	struct mod_hdcp_atomic_op_aux stall = { 0, NULL, 0, };</div><div class='add'>+	struct mod_hdcp_atomic_op_aux read = {</div><div class='add'>+		hdcp_dpcd_addrs[MOD_HDCP_MESSAGE_ID_READ_LC_SEND_L_PRIME],</div><div class='add'>+		hdcp2-&gt;lc_l_prime + 1,</div><div class='add'>+		sizeof(hdcp2-&gt;lc_l_prime) - 1,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	hdcp2-&gt;lc_l_prime[0] = HDCP_2_2_LC_SEND_LPRIME;</div><div class='add'>+</div><div class='add'>+	return hdcp-&gt;config.ddc.funcs.atomic_write_poll_read_aux(</div><div class='add'>+			hdcp-&gt;config.ddc.handle,</div><div class='add'>+			&amp;write,</div><div class='add'>+			&amp;stall,</div><div class='add'>+			&amp;read,</div><div class='add'>+			16 * 1000,</div><div class='add'>+			0</div><div class='add'>+	);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool write_poll_read_lc_fw_i2c(struct mod_hdcp *hdcp)</div><div class='add'>+{</div><div class='add'>+	struct mod_hdcp_message_hdcp2 *hdcp2 = &amp;hdcp-&gt;auth.msg.hdcp2;</div><div class='add'>+	uint8_t expected_rxstatus[2] = { sizeof(hdcp2-&gt;lc_l_prime) };</div><div class='add'>+</div><div class='add'>+	hdcp-&gt;buf[0] = hdcp_i2c_offsets[MOD_HDCP_MESSAGE_ID_WRITE_LC_INIT];</div><div class='add'>+	memmove(&amp;hdcp-&gt;buf[1], hdcp2-&gt;lc_init, sizeof(hdcp2-&gt;lc_init));</div><div class='add'>+</div><div class='add'>+	struct mod_hdcp_atomic_op_i2c write = {</div><div class='add'>+		HDCP_I2C_ADDR,</div><div class='add'>+		0,</div><div class='add'>+		hdcp-&gt;buf,</div><div class='add'>+		sizeof(hdcp2-&gt;lc_init) + 1,</div><div class='add'>+	};</div><div class='add'>+	struct mod_hdcp_atomic_op_i2c poll = {</div><div class='add'>+		HDCP_I2C_ADDR,</div><div class='add'>+		hdcp_i2c_offsets[MOD_HDCP_MESSAGE_ID_READ_RXSTATUS],</div><div class='add'>+		expected_rxstatus,</div><div class='add'>+		sizeof(expected_rxstatus),</div><div class='add'>+	};</div><div class='add'>+	struct mod_hdcp_atomic_op_i2c read = {</div><div class='add'>+		HDCP_I2C_ADDR,</div><div class='add'>+		hdcp_i2c_offsets[MOD_HDCP_MESSAGE_ID_READ_LC_SEND_L_PRIME],</div><div class='add'>+		hdcp2-&gt;lc_l_prime,</div><div class='add'>+		sizeof(hdcp2-&gt;lc_l_prime),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return hdcp-&gt;config.ddc.funcs.atomic_write_poll_read_i2c(</div><div class='add'>+			hdcp-&gt;config.ddc.handle,</div><div class='add'>+			&amp;write,</div><div class='add'>+			&amp;poll,</div><div class='add'>+			&amp;read,</div><div class='add'>+			20 * 1000,</div><div class='add'>+			6</div><div class='add'>+	);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum mod_hdcp_status mod_hdcp_write_poll_read_lc_fw(struct mod_hdcp *hdcp)</div><div class='add'>+{</div><div class='add'>+	const bool success = (is_dp_hdcp(hdcp) ? write_stall_read_lc_fw_aux : write_poll_read_lc_fw_i2c)(hdcp);</div><div class='add'>+</div><div class='add'>+	return success ? MOD_HDCP_STATUS_SUCCESS : MOD_HDCP_STATUS_DDC_FAILURE;</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h b/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h<br/>index a4d344a4db9e..c42468bb70ac 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h</a></div><div class='hunk'>@@ -133,9 +133,22 @@ enum mod_hdcp_display_disable_option {</div><div class='ctx'> 	MOD_HDCP_DISPLAY_DISABLE_ENCRYPTION,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mod_hdcp_atomic_op_i2c {</div><div class='add'>+	uint8_t address;</div><div class='add'>+	uint8_t offset;</div><div class='add'>+	uint8_t *data;</div><div class='add'>+	uint32_t size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mod_hdcp_atomic_op_aux {</div><div class='add'>+	uint32_t address;</div><div class='add'>+	uint8_t *data;</div><div class='add'>+	uint32_t size;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mod_hdcp_ddc {</div><div class='ctx'> 	void *handle;</div><div class='del'>-	struct {</div><div class='add'>+	struct mod_hdcp_ddc_funcs {</div><div class='ctx'> 		bool (*read_i2c)(void *handle,</div><div class='ctx'> 				uint32_t address,</div><div class='ctx'> 				uint8_t offset,</div><div class='hunk'>@@ -153,6 +166,22 @@ struct mod_hdcp_ddc {</div><div class='ctx'> 				uint32_t address,</div><div class='ctx'> 				const uint8_t *data,</div><div class='ctx'> 				uint32_t size);</div><div class='add'>+		bool (*atomic_write_poll_read_i2c)(</div><div class='add'>+				void *handle,</div><div class='add'>+				const struct mod_hdcp_atomic_op_i2c *write,</div><div class='add'>+				const struct mod_hdcp_atomic_op_i2c *poll,</div><div class='add'>+				struct mod_hdcp_atomic_op_i2c *read,</div><div class='add'>+				uint32_t poll_timeout_us,</div><div class='add'>+				uint8_t poll_mask_msb</div><div class='add'>+		);</div><div class='add'>+		bool (*atomic_write_poll_read_aux)(</div><div class='add'>+				void *handle,</div><div class='add'>+				const struct mod_hdcp_atomic_op_aux *write,</div><div class='add'>+				const struct mod_hdcp_atomic_op_aux *poll,</div><div class='add'>+				struct mod_hdcp_atomic_op_aux *read,</div><div class='add'>+				uint32_t poll_timeout_us,</div><div class='add'>+				uint8_t poll_mask_msb</div><div class='add'>+		);</div><div class='ctx'> 	} funcs;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -185,7 +214,8 @@ struct mod_hdcp_link_adjustment_hdcp2 {</div><div class='ctx'> 	uint8_t force_type		: 2;</div><div class='ctx'> 	uint8_t force_no_stored_km	: 1;</div><div class='ctx'> 	uint8_t increase_h_prime_timeout: 1;</div><div class='del'>-	uint8_t reserved		: 3;</div><div class='add'>+	uint8_t force_sw_locality_check : 1;</div><div class='add'>+	uint8_t reserved		: 2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mod_hdcp_link_adjustment {</div><div class='hunk'>@@ -272,6 +302,10 @@ struct mod_hdcp_display_query {</div><div class='ctx'> struct mod_hdcp_config {</div><div class='ctx'> 	struct mod_hdcp_psp psp;</div><div class='ctx'> 	struct mod_hdcp_ddc ddc;</div><div class='add'>+	struct {</div><div class='add'>+		uint8_t lc_enable_sw_fallback : 1;</div><div class='add'>+		uint8_t reserved : 7;</div><div class='add'>+	} debug;</div><div class='ctx'> 	uint8_t index;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h<br/>index 4c95b885d1d0..c8eccee9b023 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/amd_shared.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/amd_shared.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/amd_shared.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/amd_shared.h</a></div><div class='hunk'>@@ -366,7 +366,7 @@ enum DC_DEBUG_MASK {</div><div class='ctx'> 	DC_HDCP_LC_FORCE_FW_ENABLE = 0x80000,</div><div class='ctx'> </div><div class='ctx'> 	/**</div><div class='del'>-	 * @DC_HDCP_LC_ENABLE_SW_FALLBACK If set, upon HDCP Locality Check FW</div><div class='add'>+	 * @DC_HDCP_LC_ENABLE_SW_FALLBACK: If set, upon HDCP Locality Check FW</div><div class='ctx'> 	 * path failure, retry using legacy SW path.</div><div class='ctx'> 	 */</div><div class='ctx'> 	DC_HDCP_LC_ENABLE_SW_FALLBACK = 0x100000,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h<br/>index bd8085ec54ed..2d6a598a6c25 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h</a></div><div class='hunk'>@@ -5242,6 +5242,8 @@</div><div class='ctx'> #define DEGAMMA_CONTROL__CURSOR_DEGAMMA_MODE__SHIFT 0x0000000c</div><div class='ctx'> #define DEGAMMA_CONTROL__GRPH_DEGAMMA_MODE_MASK 0x00000003L</div><div class='ctx'> #define DEGAMMA_CONTROL__GRPH_DEGAMMA_MODE__SHIFT 0x00000000</div><div class='add'>+#define DEGAMMA_CONTROL__ICON_DEGAMMA_MODE_MASK 0x00000300L</div><div class='add'>+#define DEGAMMA_CONTROL__ICON_DEGAMMA_MODE__SHIFT 0x00000008</div><div class='ctx'> #define DEGAMMA_CONTROL__OVL_DEGAMMA_MODE_MASK 0x00000030L</div><div class='ctx'> #define DEGAMMA_CONTROL__OVL_DEGAMMA_MODE__SHIFT 0x00000004</div><div class='ctx'> #define DENORM_CONTROL__DENORM_MODE_MASK 0x00000007L</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h<br/>index c75aee25619e..6f44345277af 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h</a></div><div class='hunk'>@@ -1779,6 +1779,8 @@</div><div class='ctx'> #define mmRLC_TTOP_D                                    0x3105</div><div class='ctx'> #define mmRLC_CLEAR_STATE_RESTORE_BASE                  0x30C8</div><div class='ctx'> #define mmRLC_PG_AO_CU_MASK                             0x310B</div><div class='add'>+#define mmSPI_STATIC_THREAD_MGMT_1			0x2438</div><div class='add'>+#define mmSPI_STATIC_THREAD_MGMT_2			0x2439</div><div class='ctx'> #define mmSPI_STATIC_THREAD_MGMT_3                      0x243A</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h<br/>index edc8a793a95d..4dd386b98748 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h</a></div><div class='hunk'>@@ -234,6 +234,26 @@</div><div class='ctx'> #define mmIH_RB_WPTR_ADDR_HI 0x0F84</div><div class='ctx'> #define mmIH_RB_WPTR_ADDR_LO 0x0F85</div><div class='ctx'> #define mmIH_STATUS 0x0F88</div><div class='add'>+</div><div class='add'>+#define mmDMA_GFX_RB_CNTL                                       0x3400</div><div class='add'>+#define mmDMA_GFX_RB_BASE                                       0x3401</div><div class='add'>+#define mmDMA_GFX_RB_RPTR                                       0x3402</div><div class='add'>+#define mmDMA_GFX_RB_WPTR                                       0x3403</div><div class='add'>+#define mmDMA_GFX_RB_RPTR_ADDR_HI                               0x3407</div><div class='add'>+#define mmDMA_GFX_RB_RPTR_ADDR_LO                               0x3408</div><div class='add'>+#define mmDMA_GFX_IB_CNTL                                       0x3409</div><div class='add'>+#define mmDMA_GFX_IB_RPTR                                       0x340a</div><div class='add'>+#define mmDMA_CNTL                                          0x340b</div><div class='add'>+#define mmDMA_STATUS_REG                                    0x340D</div><div class='add'>+#define mmDMA_TILING_CONFIG  				  0x342E</div><div class='add'>+#define mmDMA_SEM_INCOMPLETE_TIMER_CNTL                     0x3411</div><div class='add'>+#define mmDMA_SEM_WAIT_FAIL_TIMER_CNTL                      0x3412</div><div class='add'>+#define mmDMA_POWER_CNTL					0x342F</div><div class='add'>+#define mmDMA_CLK_CTRL					0x3430</div><div class='add'>+#define mmDMA_PG						0x3435</div><div class='add'>+#define mmDMA_PGFSM_CONFIG				0x3436</div><div class='add'>+#define mmDMA_PGFSM_WRITE					0x3437</div><div class='add'>+</div><div class='ctx'> #define mmSEM_MAILBOX 0x0F9B</div><div class='ctx'> #define mmSEM_MAILBOX_CLIENTCONFIG 0x0F9A</div><div class='ctx'> #define mmSEM_MAILBOX_CONTROL 0x0F9C</div><div class='hunk'>@@ -269,7 +289,4 @@</div><div class='ctx'> #define mmVCE_CONFIG 0x0F94</div><div class='ctx'> #define mmXDMA_MSTR_MEM_OVERFLOW_CNTL 0x03F8</div><div class='ctx'> </div><div class='del'>-/* from the old sid.h */</div><div class='del'>-#define mmDMA_TILING_CONFIG 0x342E</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h<br/>index 1c540fe136cb..9f7fc2428b69 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h</a></div><div class='hunk'>@@ -823,6 +823,43 @@</div><div class='ctx'> #define LX3__RESERVED__SHIFT 0x00000000</div><div class='ctx'> #define RINGOSC_MASK__MASK_MASK 0x0000ffffL</div><div class='ctx'> #define RINGOSC_MASK__MASK__SHIFT 0x00000000</div><div class='add'>+</div><div class='add'>+#define DMA_CNTL__TRAP_ENABLE_MASK 0x00000001L</div><div class='add'>+#define DMA_CNTL__TRAP_ENABLE__SHIFT 0x00000000</div><div class='add'>+#define DMA_CNTL__SEM_INCOMPLETE_INT_ENABLE_MASK 0x00000002L</div><div class='add'>+#define DMA_CNTL__SEM_INCOMPLETE_INT_ENABLE__SHIFT 0x00000001</div><div class='add'>+#define DMA_CNTL__SEM_WAIT_INT_ENABLE_MASK 0x00000004L</div><div class='add'>+#define DMA_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x00000002</div><div class='add'>+#define DMA_CNTL__DATA_SWAP_ENABLE_MASK 0x00000008L</div><div class='add'>+#define DMA_CNTL__DATA_SWAP_ENABLE__SHIFT 0x00000003</div><div class='add'>+#define DMA_CNTL__FENCE_SWAP_ENABLE_MASK 0x00000010L</div><div class='add'>+#define DMA_CNTL__FENCE_SWAP_ENABLE__SHIFT 0x00000004</div><div class='add'>+#define DMA_CNTL__CTXEMPTY_INT_ENABLE_MASK 0x10000000L</div><div class='add'>+#define DMA_CNTL__CTXEMPTY_INT_ENABLE__SHIFT 0x0000001C</div><div class='add'>+#define DMA_GFX_RB_CNTL__RB_ENABLE_MASK 0x00000001L</div><div class='add'>+#define DMA_GFX_RB_CNTL__RB_ENABLE__SHIFT 0x00000000</div><div class='add'>+#define DMA_GFX_RB_CNTL__RB_SIZE__SHIFT 0x00000001</div><div class='add'>+#define DMA_GFX_RB_CNTL__RB_SWAP_ENABLE_MASK 0x00000200L</div><div class='add'>+#define DMA_GFX_RB_CNTL__RB_SWAP_ENABLE__SHIFT 0x00000009</div><div class='add'>+#define DMA_GFX_RB_CNTL__RPTR_WRITEBACK_ENABLE_MASK 0x00001000L</div><div class='add'>+#define DMA_GFX_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT 0x0000000C</div><div class='add'>+#define DMA_GFX_RB_CNTL__RPTR_WRITEBACK_SWAP_ENABLE_MASK 0x00002000L</div><div class='add'>+#define DMA_GFX_RB_CNTL__RPTR_WRITEBACK_SWAP_ENABLE__SHIFT 0x0000000D</div><div class='add'>+#define DMA_GFX_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x00000010</div><div class='add'>+#define DMA_GFX_IB_CNTL__IB_ENABLE_MASK 0x00000001L</div><div class='add'>+#define DMA_GFX_IB_CNTL__IB_ENABLE__SHIFT 0x00000000</div><div class='add'>+#define DMA_GFX_IB_CNTL__IB_SWAP_ENABLE_MASK 0x00000010L</div><div class='add'>+#define DMA_GFX_IB_CNTL__IB_SWAP_ENABLE__SHIFT 0x00000004</div><div class='add'>+#define DMA_GFX_IB_CNTL__CMD_VMID_FORCE_MASK 0x80000000L</div><div class='add'>+#define DMA_GFX_IB_CNTL__CMD_VMID_FORCE__SHIFT 0x0000001F</div><div class='add'>+</div><div class='add'>+#define DMA_STATUS_REG__IDLE_MASK 0x00000001L</div><div class='add'>+#define DMA_STATUS_REG__IDLE__SHIFT 0x00000000</div><div class='add'>+#define DMA_POWER_CNTL__MEM_POWER_OVERRIDE_MASK 0x00000100L</div><div class='add'>+#define DMA_POWER_CNTL__MEM_POWER_OVERRIDE__SHIFT 0x00000008</div><div class='add'>+#define DMA_PG__PG_CNTL_ENABLE_MASK 0x00000001L</div><div class='add'>+#define DMA_PG__PG_CNTL_ENABLE__SHIFT 0x00000000</div><div class='add'>+</div><div class='ctx'> #define SEM_MAILBOX_CLIENTCONFIG__CP_CLIENT0_MASK 0x00000007L</div><div class='ctx'> #define SEM_MAILBOX_CLIENTCONFIG__CP_CLIENT0__SHIFT 0x00000000</div><div class='ctx'> #define SEM_MAILBOX_CLIENTCONFIG__CP_CLIENT1_MASK 0x00000038L</div><div class='hunk'>@@ -1015,6 +1052,10 @@</div><div class='ctx'> #define SRBM_STATUS2__VCE_BUSY__SHIFT 0x00000007</div><div class='ctx'> #define SRBM_STATUS2__VCE_RQ_PENDING_MASK 0x00000008L</div><div class='ctx'> #define SRBM_STATUS2__VCE_RQ_PENDING__SHIFT 0x00000003</div><div class='add'>+#define SRBM_STATUS2__DMA_BUSY_MASK 0x00000020L</div><div class='add'>+#define SRBM_STATUS2__DMA_BUSY__SHIFT 0x00000005</div><div class='add'>+#define SRBM_STATUS2__DMA1_BUSY_MASK 0x00000040L</div><div class='add'>+#define SRBM_STATUS2__DMA1_BUSY__SHIFT 0x00000006</div><div class='ctx'> #define SRBM_STATUS2__XDMA_BUSY_MASK 0x00000100L</div><div class='ctx'> #define SRBM_STATUS2__XDMA_BUSY__SHIFT 0x00000008</div><div class='ctx'> #define SRBM_STATUS2__XSP_BUSY_MASK 0x00000010L</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h<br/>index 6b10be61efc3..bdef1f743df7 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h</a></div><div class='hunk'>@@ -41,7 +41,49 @@</div><div class='ctx'> #define ixLCAC_MC5_CNTL 0x012B</div><div class='ctx'> #define ixLCAC_MC5_OVR_SEL 0x012C</div><div class='ctx'> #define ixLCAC_MC5_OVR_VAL 0x012D</div><div class='add'>+</div><div class='add'>+#define mmCG_SPLL_FUNC_CNTL				0x0180</div><div class='add'>+#define mmCG_SPLL_FUNC_CNTL_2				0x0181</div><div class='add'>+#define mmCG_SPLL_FUNC_CNTL_3				0x0182</div><div class='add'>+#define mmCG_SPLL_FUNC_CNTL_4				0x0183</div><div class='add'>+#define mmCG_SPLL_STATUS					0x0185</div><div class='add'>+#define mmSPLL_CNTL_MODE					0x0186</div><div class='add'>+#define mmCG_SPLL_SPREAD_SPECTRUM				0x0188</div><div class='add'>+#define mmCG_SPLL_SPREAD_SPECTRUM_2			0x0189</div><div class='add'>+#define mmCG_SPLL_AUTOSCALE_CNTL				0x018B</div><div class='add'>+#define mmMPLL_BYPASSCLK_SEL				0x0197</div><div class='add'>+#define mmCG_CLKPIN_CNTL                                    0x0198</div><div class='add'>+#define mmCG_CLKPIN_CNTL_2                                  0x0199</div><div class='add'>+#define mmTHM_CLK_CNTL					0x019B</div><div class='add'>+#define mmMISC_CLK_CNTL					0x019C</div><div class='add'>+#define mmCG_THERMAL_CTRL					0x01C0</div><div class='add'>+#define mmCG_THERMAL_STATUS				0x01C1</div><div class='add'>+#define mmCG_THERMAL_INT					0x01C2</div><div class='add'>+#define mmCG_MULT_THERMAL_CTRL					0x01C4</div><div class='add'>+#define mmCG_MULT_THERMAL_STATUS					0x01C5</div><div class='add'>+#define mmCG_FDO_CTRL0					0x01D5</div><div class='add'>+#define mmCG_FDO_CTRL1					0x01D6</div><div class='add'>+#define mmCG_FDO_CTRL2					0x01D7</div><div class='add'>+#define mmCG_TACH_CTRL                                    0x01DC</div><div class='add'>+#define mmCG_TACH_STATUS                                  0x01DD</div><div class='add'>+#define mmGENERAL_PWRMGT                                  0x1E0</div><div class='add'>+#define mmCG_TPC                                            0x1E1</div><div class='add'>+#define mmSCLK_PWRMGT_CNTL                                  0x1E2</div><div class='add'>+#define mmTARGET_AND_CURRENT_PROFILE_INDEX                  0x01E6</div><div class='add'>+#define mmCG_FTV                                            0x01EF</div><div class='add'>+#define mmCG_FFCT_0                                         0x01F0</div><div class='add'>+#define mmCG_BSP                                          0x01FF</div><div class='add'>+#define mmCG_AT                                           0x0200</div><div class='add'>+#define mmCG_GIT                                          0x0201</div><div class='add'>+#define mmCG_SSP                                            0x0203</div><div class='add'>+#define mmCG_DISPLAY_GAP_CNTL                               0x020A</div><div class='add'>+#define mmCG_ULV_CONTROL					0x021E</div><div class='add'>+#define mmCG_ULV_PARAMETER				0x021F</div><div class='add'>+#define mmSMC_SCRATCH0					0x0221</div><div class='add'>+#define mmCG_CAC_CTRL					0x022E</div><div class='add'>+</div><div class='ctx'> #define ixSMC_PC_C 0x80000370</div><div class='add'>+</div><div class='ctx'> #define ixTHM_TMON0_DEBUG 0x03F0</div><div class='ctx'> #define ixTHM_TMON0_INT_DATA 0x0380</div><div class='ctx'> #define ixTHM_TMON0_RDIL0_DATA 0x0300</div><div class='hunk'>@@ -110,6 +152,7 @@</div><div class='ctx'> #define ixTHM_TMON1_RDIR7_DATA 0x0337</div><div class='ctx'> #define ixTHM_TMON1_RDIR8_DATA 0x0338</div><div class='ctx'> #define ixTHM_TMON1_RDIR9_DATA 0x0339</div><div class='add'>+</div><div class='ctx'> #define mmGPIOPAD_A 0x05E7</div><div class='ctx'> #define mmGPIOPAD_EN 0x05E8</div><div class='ctx'> #define mmGPIOPAD_EXTERN_TRIG_CNTL 0x05F1</div><div class='hunk'>@@ -127,6 +170,7 @@</div><div class='ctx'> #define mmGPIOPAD_STRENGTH 0x05E5</div><div class='ctx'> #define mmGPIOPAD_SW_INT_STAT 0x05E4</div><div class='ctx'> #define mmGPIOPAD_Y 0x05E9</div><div class='add'>+</div><div class='ctx'> #define mmSMC_IND_ACCESS_CNTL 0x008A</div><div class='ctx'> #define mmSMC_IND_DATA_0 0x0081</div><div class='ctx'> #define mmSMC_IND_DATA 0x0081</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h<br/>index 7d3925b7266e..67d3c7e13a48 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h</a></div><div class='hunk'>@@ -23,10 +23,142 @@</div><div class='ctx'> #ifndef SMU_6_0_SH_MASK_H</div><div class='ctx'> #define SMU_6_0_SH_MASK_H</div><div class='ctx'> </div><div class='del'>-#define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x03ffffffL</div><div class='del'>-#define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV__SHIFT 0x00000000</div><div class='del'>-#define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x000003f0L</div><div class='add'>+#define CG_AT__CG_R_MASK 0x0000FFFFL</div><div class='add'>+#define CG_AT__CG_R__SHIFT 0x00000000</div><div class='add'>+#define CG_AT__CG_L_MASK 0xFFFF0000L</div><div class='add'>+#define CG_AT__CG_L__SHIFT 0x00000010</div><div class='add'>+</div><div class='add'>+#define CG_BSP__BSP_MASK 0x0000FFFFL</div><div class='add'>+#define CG_BSP__BSP__SHIFT 0x00000000</div><div class='add'>+#define CG_BSP__BSU_MASK 0x000F0000L</div><div class='add'>+#define CG_BSP__BSU__SHIFT 0x00000010</div><div class='add'>+</div><div class='add'>+#define CG_CAC_CTRL__CAC_WINDOW_MASK 0x00FFFFFFL</div><div class='add'>+#define CG_CAC_CTRL__CAC_WINDOW__SHIFT 0x00000000</div><div class='add'>+</div><div class='add'>+#define CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK 0x00000002L</div><div class='add'>+#define CG_CLKPIN_CNTL__XTALIN_DIVIDE__SHIFT 0x00000001</div><div class='add'>+#define CG_CLKPIN_CNTL__BCLK_AS_XCLK_MASK 0x00000004L</div><div class='add'>+#define CG_CLKPIN_CNTL__BCLK_AS_XCLK__SHIFT 0x00000002</div><div class='add'>+#define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN_MASK 0x00000008L</div><div class='add'>+#define CG_CLKPIN_CNTL_2__FORCE_BIF_REFCLK_EN__SHIFT 0x00000003</div><div class='add'>+#define CG_CLKPIN_CNTL_2__MUX_TCLK_TO_XCLK_MASK 0x00000100L</div><div class='add'>+#define CG_CLKPIN_CNTL_2__MUX_TCLK_TO_XCLK__SHIFT 0x00000008</div><div class='add'>+</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP1_GAP_MASK 0x00000003L</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP1_GAP__SHIFT 0x00000000</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP2_GAP_MASK 0x0000000CL</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP2_GAP__SHIFT 0x00000002</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT_MASK 0x0003FFF0L</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__VBI_TIMER_COUNT__SHIFT 0x00000004</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__VBI_TIMER_UNIT_MASK 0x00700000</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__VBI_TIMER_UNIT__SHIFT 0x00000014</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP1_GAP_MCHG_MASK 0x03000000L</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP1_GAP_MCHG__SHIFT 0x00000018</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP2_GAP_MCHG_MASK 0x0C000000L</div><div class='add'>+#define CG_DISPLAY_GAP_CNTL__DISP2_GAP_MCHG__SHIFT 0x0000001A</div><div class='add'>+</div><div class='add'>+#define CG_FFCT_0__UTC_0_MASK 0x000003FFL</div><div class='add'>+#define CG_FFCT_0__UTC_0__SHIFT 0x00000000</div><div class='add'>+#define CG_FFCT_0__DTC_0_MASK 0x000FFC00L</div><div class='add'>+#define CG_FFCT_0__DTC_0__SHIFT 0x0000000A</div><div class='add'>+</div><div class='add'>+#define CG_GIT__CG_GICST_MASK 0x0000FFFFL</div><div class='add'>+#define CG_GIT__CG_GICST__SHIFT 0x00000000</div><div class='add'>+#define CG_GIT__CG_GIPOT_MASK 0xFFFF0000L</div><div class='add'>+#define CG_GIT__CG_GIPOT__SHIFT 0x00000010</div><div class='add'>+</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_RESET_MASK 0x00000001L</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_RESET__SHIFT 0x00000000</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_SLEEP_MASK 0x00000002L</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_SLEEP__SHIFT 0x00000001</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN_MASK 0x00000008L</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_BYPASS_EN__SHIFT 0x00000003</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV_MASK 0x000003F0L</div><div class='ctx'> #define CG_SPLL_FUNC_CNTL__SPLL_REF_DIV__SHIFT 0x00000004</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_PDIV_A_MASK 0x007F00000</div><div class='add'>+#define CG_SPLL_FUNC_CNTL__SPLL_PDIV_A__SHIFT 0x00000014</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_2__SCLK_MUX_SEL_MASK 0x0000001FF</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_2__SCLK_MUX_SEL__SHIFT 0x00000000</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG_MASK 0x00800000</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_2__SPLL_CTLREQ_CHG__SHIFT 0x00000017</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_2__SCLK_MUX_UPDATE_MASK 0x04000000</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_2__SCLK_MUX_UPDATE__SHIFT 0x0000001A</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV_MASK 0x03FFFFFFL</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_3__SPLL_FB_DIV__SHIFT 0x00000000</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_3__SPLL_DITHEN_MASK 0x10000000L</div><div class='add'>+#define CG_SPLL_FUNC_CNTL_3__SPLL_DITHEN__SHIFT 0x0000001C</div><div class='add'>+#define CG_SPLL_STATUS__SPLL_CHG_STATUS_MASK 0x00000002L</div><div class='add'>+#define CG_SPLL_STATUS__SPLL_CHG_STATUS__SHIFT 0x00000001</div><div class='add'>+#define CG_SPLL_SPREAD_SPECTRUM__SSEN_MASK 0x00000001L</div><div class='add'>+#define CG_SPLL_SPREAD_SPECTRUM__SSEN__SHIFT 0x00000000</div><div class='add'>+#define CG_SPLL_SPREAD_SPECTRUM__CLK_S_MASK 0x0000FFF0L</div><div class='add'>+#define CG_SPLL_SPREAD_SPECTRUM__CLK_S__SHIFT 0x00000004</div><div class='add'>+#define CG_SPLL_SPREAD_SPECTRUM_2__CLK_V_MASK 0x00000200L</div><div class='add'>+#define CG_SPLL_SPREAD_SPECTRUM_2__CLK_V__SHIFT 0x00000000</div><div class='add'>+#define CG_SPLL_AUTOSCALE_CNTL__AUTOSCALE_ON_SS_CLEAR_MASK 0x03FFFFFFL</div><div class='add'>+#define CG_SPLL_AUTOSCALE_CNTL__AUTOSCALE_ON_SS_CLEAR__SHIFT 0x00000009</div><div class='add'>+</div><div class='add'>+#define CG_SSP__SST_MASK 0x0000FFFFL</div><div class='add'>+#define CG_SSP__SST__SHIFT 0x00000000</div><div class='add'>+#define CG_SSP__SSTU_MASK 0x000F0000L</div><div class='add'>+#define CG_SSP__SSTU__SHIFT 0x00000010</div><div class='add'>+</div><div class='add'>+#define CG_THERMAL_CTRL__DPM_EVENT_SRC_MASK 0x00000007L</div><div class='add'>+#define CG_THERMAL_CTRL__DPM_EVENT_SRC__SHIFT 0x00000000</div><div class='add'>+#define CG_THERMAL_CTRL__DIG_THERM_DPM_MASK 0x003FC000</div><div class='add'>+#define CG_THERMAL_CTRL__DIG_THERM_DPM__SHIFT 0x0000000E</div><div class='add'>+#define CG_THERMAL_STATUS__FDO_PWM_DUTY_MASK 0x0001FE00L</div><div class='add'>+#define CG_THERMAL_STATUS__FDO_PWM_DUTY__SHIFT 0x00000009</div><div class='add'>+#define CG_THERMAL_INT__DIG_THERM_INTH_MASK 0x0000FF00L</div><div class='add'>+#define CG_THERMAL_INT__DIG_THERM_INTH__SHIFT 0x00000008</div><div class='add'>+#define CG_THERMAL_INT__DIG_THERM_INTL_MASK 0x00FF0000L</div><div class='add'>+#define CG_THERMAL_INT__DIG_THERM_INTL__SHIFT 0x00000010</div><div class='add'>+#define CG_THERMAL_INT__THERM_INT_MASK_HIGH_MASK 0x01000000L</div><div class='add'>+#define CG_THERMAL_INT__THERM_INT_MASK_HIGH__SHIFT 0x00000018</div><div class='add'>+#define CG_THERMAL_INT__THERM_INT_MASK_LOW_MASK	0x02000000</div><div class='add'>+#define CG_THERMAL_INT__THERM_INT_MASK_LOW__SHIFT 0x00000019</div><div class='add'>+</div><div class='add'>+#define CG_MULT_THERMAL_CTRL__TEMP_SEL_MASK	0x0FF00000L</div><div class='add'>+#define CG_MULT_THERMAL_CTRL__TEMP_SEL__SHIFT 0x00000014</div><div class='add'>+#define CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP_MASK	0x000001FFL</div><div class='add'>+#define CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP__SHIFT 0x00000000</div><div class='add'>+#define CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK	0x0003fe00L</div><div class='add'>+#define CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT 0x00000009</div><div class='add'>+</div><div class='add'>+#define CG_FDO_CTRL0__FDO_STATIC_DUTY_MASK	0x000000FFL</div><div class='add'>+#define CG_FDO_CTRL0__FDO_STATIC_DUTY__SHIFT 0x00000000</div><div class='add'>+#define CG_FDO_CTRL1__FMAX_DUTY100_MASK	0x000000FFL</div><div class='add'>+#define CG_FDO_CTRL1__FMAX_DUTY100__SHIFT 0x00000000</div><div class='add'>+#define CG_FDO_CTRL2__TMIN_MASK	0x000000FFL</div><div class='add'>+#define CG_FDO_CTRL2__TMIN__SHIFT 0x00000000</div><div class='add'>+#define CG_FDO_CTRL2__FDO_PWM_MODE_MASK	0x00003800L</div><div class='add'>+#define CG_FDO_CTRL2__FDO_PWM_MODE__SHIFT 0x0000000B</div><div class='add'>+#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE_MASK	0xFE000000L</div><div class='add'>+#define CG_FDO_CTRL2__TACH_PWM_RESP_RATE__SHIFT 0x00000019</div><div class='add'>+</div><div class='add'>+#define CG_TACH_CTRL__EDGE_PER_REV_MASK	0x00000007L</div><div class='add'>+#define CG_TACH_CTRL__EDGE_PER_REV__SHIFT 0x00000000</div><div class='add'>+#define CG_TACH_CTRL__TARGET_PERIOD_MASK	0xFFFFFFF8L</div><div class='add'>+#define CG_TACH_CTRL__TARGET_PERIOD__SHIFT 0x00000003</div><div class='add'>+#define CG_TACH_STATUS__TACH_PERIOD_MASK	0xFFFFFFFFL</div><div class='add'>+#define CG_TACH_STATUS__TACH_PERIOD__SHIFT 0x00000000</div><div class='add'>+</div><div class='add'>+#define GENERAL_PWRMGT__GLOBAL_PWRMGT_EN_MASK	0x00000001L</div><div class='add'>+#define GENERAL_PWRMGT__GLOBAL_PWRMGT_EN__SHIFT 0x00000000</div><div class='add'>+#define GENERAL_PWRMGT__STATIC_PM_EN_MASK	0x00000002L</div><div class='add'>+#define GENERAL_PWRMGT__STATIC_PM_EN__SHIFT 0x00000001</div><div class='add'>+#define GENERAL_PWRMGT__THERMAL_PROTECTION_DIS_MASK	0x00000004L</div><div class='add'>+#define GENERAL_PWRMGT__THERMAL_PROTECTION_DIS__SHIFT 0x00000002</div><div class='add'>+#define GENERAL_PWRMGT__THERMAL_PROTECTION_TYPE_MASK	0x00000008L</div><div class='add'>+#define GENERAL_PWRMGT__THERMAL_PROTECTION_TYPE__SHIFT 0x00000003</div><div class='add'>+#define GENERAL_PWRMGT__SW_SMIO_INDEX_MASK	0x00000040L</div><div class='add'>+#define GENERAL_PWRMGT__SW_SMIO_INDEX__SHIFT 0x00000006</div><div class='add'>+#define GENERAL_PWRMGT__VOLT_PWRMGT_EN_MASK	0x00000400L</div><div class='add'>+#define GENERAL_PWRMGT__VOLT_PWRMGT_EN__SHIFT 0x0000000A</div><div class='add'>+#define GENERAL_PWRMGT__DYN_SPREAD_SPECTRUM_EN_MASK	0x00800000L</div><div class='add'>+#define GENERAL_PWRMGT__DYN_SPREAD_SPECTRUM_EN__SHIFT 0x00000017</div><div class='add'>+</div><div class='ctx'> #define GPIOPAD_A__GPIO_A_MASK 0x7fffffffL</div><div class='ctx'> #define GPIOPAD_A__GPIO_A__SHIFT 0x00000000</div><div class='ctx'> #define GPIOPAD_EN__GPIO_EN_MASK 0x7fffffffL</div><div class='hunk'>@@ -195,6 +327,7 @@</div><div class='ctx'> #define GPIOPAD_SW_INT_STAT__SW_INT_STAT__SHIFT 0x00000000</div><div class='ctx'> #define GPIOPAD_Y__GPIO_Y_MASK 0x7fffffffL</div><div class='ctx'> #define GPIOPAD_Y__GPIO_Y__SHIFT 0x00000000</div><div class='add'>+</div><div class='ctx'> #define LCAC_MC0_CNTL__MC0_ENABLE_MASK 0x00000001L</div><div class='ctx'> #define LCAC_MC0_CNTL__MC0_ENABLE__SHIFT 0x00000000</div><div class='ctx'> #define LCAC_MC0_CNTL__MC0_THRESHOLD_MASK 0x0001fffeL</div><div class='hunk'>@@ -243,6 +376,37 @@</div><div class='ctx'> #define LCAC_MC5_OVR_SEL__MC5_OVR_SEL__SHIFT 0x00000000</div><div class='ctx'> #define LCAC_MC5_OVR_VAL__MC5_OVR_VAL_MASK 0xffffffffL</div><div class='ctx'> #define LCAC_MC5_OVR_VAL__MC5_OVR_VAL__SHIFT 0x00000000</div><div class='add'>+</div><div class='add'>+#define MPLL_BYPASSCLK_SEL__MPLL_CLKOUT_SEL_MASK 0x0000FF00L</div><div class='add'>+#define MPLL_BYPASSCLK_SEL__MPLL_CLKOUT_SEL__SHIFT 0x00000008</div><div class='add'>+</div><div class='add'>+#define SCLK_PWRMGT_CNTL__SCLK_PWRMGT_OFF_MASK	0x00000001L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__SCLK_PWRMGT_OFF__SHIFT 0x00000000</div><div class='add'>+#define SCLK_PWRMGT_CNTL__SCLK_LOW_D1_MASK	0x00000002L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__SCLK_LOW_D1__SHIFT 0x00000001</div><div class='add'>+#define SCLK_PWRMGT_CNTL__FIR_RESET_MASK	0x00000010L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__FIR_RESET__SHIFT 0x00000004</div><div class='add'>+#define SCLK_PWRMGT_CNTL__FIR_FORCE_TREND_SEL_MASK	0x00000020L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__FIR_FORCE_TREND_SEL__SHIFT 0x00000005</div><div class='add'>+#define SCLK_PWRMGT_CNTL__FIR_TREND_MODE_MASK	0x00000040L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__FIR_TREND_MODE__SHIFT 0x00000006</div><div class='add'>+#define SCLK_PWRMGT_CNTL__DYN_GFX_CLK_OFF_EN_MASK	0x00000080L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__DYN_GFX_CLK_OFF_EN__SHIFT 0x00000007</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_FORCE_ON_MASK	0x00000100L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_FORCE_ON__SHIFT 0x00000008</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_REQUEST_OFF_MASK	0x00000200L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_REQUEST_OFF__SHIFT 0x00000009</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_FORCE_OFF_MASK	0x00000400L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_FORCE_OFF__SHIFT 0x0000000A</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_OFF_ACPI_D1_MASK	0x00000800L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_OFF_ACPI_D1__SHIFT 0x0000000B</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_OFF_ACPI_D2_MASK	0x00001000L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_OFF_ACPI_D2__SHIFT 0x0000000C</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_OFF_ACPI_D3_MASK	0x00002000L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__GFX_CLK_OFF_ACPI_D3__SHIFT 0x0000000D</div><div class='add'>+#define SCLK_PWRMGT_CNTL__DYN_LIGHT_SLEEP_EN_MASK	0x00004000L</div><div class='add'>+#define SCLK_PWRMGT_CNTL__DYN_LIGHT_SLEEP_EN__SHIFT 0x0000000E</div><div class='add'>+</div><div class='ctx'> #define SMC_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_0_MASK 0x00000001L</div><div class='ctx'> #define SMC_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_0__SHIFT 0x00000000</div><div class='ctx'> #define SMC_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_1_MASK 0x00000100L</div><div class='hunk'>@@ -285,6 +449,7 @@</div><div class='ctx'> #define SMC_RESP_1__SMC_RESP__SHIFT 0x00000000</div><div class='ctx'> #define SMC_RESP_2__SMC_RESP_MASK 0xffffffffL</div><div class='ctx'> #define SMC_RESP_2__SMC_RESP__SHIFT 0x00000000</div><div class='add'>+</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_CTLREQ_DLY_CNT_MASK 0x000ff000L</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_CTLREQ_DLY_CNT__SHIFT 0x0000000c</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_ENSAT_MASK 0x00000010L</div><div class='hunk'>@@ -293,6 +458,8 @@</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_FASTEN__SHIFT 0x00000003</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_LEGACY_PDIV_MASK 0x00000002L</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_LEGACY_PDIV__SHIFT 0x00000001</div><div class='add'>+#define SPLL_CNTL_MODE__SPLL_REFCLK_SEL_MASK 0x0C000000L</div><div class='add'>+#define SPLL_CNTL_MODE__SPLL_REFCLK_SEL__SHIFT 0x0000001A</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_RESET_EN_MASK 0x10000000L</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_RESET_EN__SHIFT 0x0000001c</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_SW_DIR_CONTROL_MASK 0x00000001L</div><div class='hunk'>@@ -303,10 +470,25 @@</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_TEST__SHIFT 0x00000002</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_VCO_MODE_MASK 0x60000000L</div><div class='ctx'> #define SPLL_CNTL_MODE__SPLL_VCO_MODE__SHIFT 0x0000001d</div><div class='add'>+</div><div class='ctx'> #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0x0f000000L</div><div class='ctx'> #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX__SHIFT 0x00000018</div><div class='ctx'> #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_PCIE_INDEX_MASK 0xf0000000L</div><div class='ctx'> #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_PCIE_INDEX__SHIFT 0x0000001c</div><div class='add'>+</div><div class='add'>+#define TARGET_AND_CURRENT_PROFILE_INDEX__CURRENT_STATE_INDEX_MASK 0x000000F0L</div><div class='add'>+#define TARGET_AND_CURRENT_PROFILE_INDEX__CURRENT_STATE_INDEX__SHIFT 0x00000004</div><div class='add'>+</div><div class='add'>+#define THM_CLK_CNTL__CMON_CLK_SEL_MASK 0x000000FFL</div><div class='add'>+#define THM_CLK_CNTL__CMON_CLK_SEL__SHIFT 0x00000000</div><div class='add'>+#define THM_CLK_CNTL__TMON_CLK_SEL_MASK 0x0000FF00L</div><div class='add'>+#define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x00000008</div><div class='add'>+</div><div class='add'>+#define MISC_CLK_CNTL__DEEP_SLEEP_CLK_SEL_MASK 0x000000FFL</div><div class='add'>+#define MISC_CLK_CNTL__DEEP_SLEEP_CLK_SEL__SHIFT 0x00000000</div><div class='add'>+#define MISC_CLK_CNTL__ZCLK_SEL_MASK 0x0000FF00L</div><div class='add'>+#define MISC_CLK_CNTL__ZCLK_SEL__SHIFT 0x00000008</div><div class='add'>+</div><div class='ctx'> #define THM_TMON0_DEBUG__DEBUG_RDI_MASK 0x0000001fL</div><div class='ctx'> #define THM_TMON0_DEBUG__DEBUG_RDI__SHIFT 0x00000000</div><div class='ctx'> #define THM_TMON0_DEBUG__DEBUG_Z_MASK 0x0000ffe0L</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h<br/>index 14574112c469..c4aaa86a95e2 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h</a></div><div class='hunk'>@@ -1147,6 +1147,22 @@</div><div class='ctx'> #define regUVD_DPG_LMA_CTL2_BASE_IDX                                                                    1</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+// addressBlock: uvd_mmsch_dec</div><div class='add'>+// base address: 0x20d2c</div><div class='add'>+#define regMMSCH_VF_VMID                                                                                0x054b</div><div class='add'>+#define regMMSCH_VF_VMID_BASE_IDX                                                                       1</div><div class='add'>+#define regMMSCH_VF_CTX_ADDR_LO                                                                         0x054c</div><div class='add'>+#define regMMSCH_VF_CTX_ADDR_LO_BASE_IDX                                                                1</div><div class='add'>+#define regMMSCH_VF_CTX_ADDR_HI                                                                         0x054d</div><div class='add'>+#define regMMSCH_VF_CTX_ADDR_HI_BASE_IDX                                                                1</div><div class='add'>+#define regMMSCH_VF_CTX_SIZE                                                                            0x054e</div><div class='add'>+#define regMMSCH_VF_CTX_SIZE_BASE_IDX                                                                   1</div><div class='add'>+#define regMMSCH_VF_MAILBOX_HOST                                                                        0x0552</div><div class='add'>+#define regMMSCH_VF_MAILBOX_HOST_BASE_IDX                                                               1</div><div class='add'>+#define regMMSCH_VF_MAILBOX_RESP                                                                        0x0553</div><div class='add'>+#define regMMSCH_VF_MAILBOX_RESP_BASE_IDX                                                               1</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> // addressBlock: uvd_vcn_umsch_dec</div><div class='ctx'> // base address: 0x21500</div><div class='ctx'> #define regVCN_UMSCH_MES_CNTL                                                                           0x0740</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h<br/>index 5c119a6b87fb..bd7242e4e9c6 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_sh_mask.h</a></div><div class='hunk'>@@ -5929,6 +5929,29 @@</div><div class='ctx'> #define UVD_DPG_LMA_CTL2__JPEG_WRITE_PTR_MASK                                                                 0x0000FE00L</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+// addressBlock: uvd_mmsch_dec</div><div class='add'>+//MMSCH_VF_VMID</div><div class='add'>+#define MMSCH_VF_VMID__VF_CTX_VMID__SHIFT                                                                     0x0</div><div class='add'>+#define MMSCH_VF_VMID__VF_GPCOM_VMID__SHIFT                                                                   0x5</div><div class='add'>+#define MMSCH_VF_VMID__VF_CTX_VMID_MASK                                                                       0x0000001FL</div><div class='add'>+#define MMSCH_VF_VMID__VF_GPCOM_VMID_MASK                                                                     0x000003E0L</div><div class='add'>+//MMSCH_VF_CTX_ADDR_LO</div><div class='add'>+#define MMSCH_VF_CTX_ADDR_LO__VF_CTX_ADDR_LO__SHIFT                                                           0x6</div><div class='add'>+#define MMSCH_VF_CTX_ADDR_LO__VF_CTX_ADDR_LO_MASK                                                             0xFFFFFFC0L</div><div class='add'>+//MMSCH_VF_CTX_ADDR_HI</div><div class='add'>+#define MMSCH_VF_CTX_ADDR_HI__VF_CTX_ADDR_HI__SHIFT                                                           0x0</div><div class='add'>+#define MMSCH_VF_CTX_ADDR_HI__VF_CTX_ADDR_HI_MASK                                                             0xFFFFFFFFL</div><div class='add'>+//MMSCH_VF_CTX_SIZE</div><div class='add'>+#define MMSCH_VF_CTX_SIZE__VF_CTX_SIZE__SHIFT                                                                 0x0</div><div class='add'>+#define MMSCH_VF_CTX_SIZE__VF_CTX_SIZE_MASK                                                                   0xFFFFFFFFL</div><div class='add'>+//MMSCH_VF_MAILBOX_HOST</div><div class='add'>+#define MMSCH_VF_MAILBOX_HOST__DATA__SHIFT                                                                    0x0</div><div class='add'>+#define MMSCH_VF_MAILBOX_HOST__DATA_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+//MMSCH_VF_MAILBOX_RESP</div><div class='add'>+#define MMSCH_VF_MAILBOX_RESP__RESP__SHIFT                                                                    0x0</div><div class='add'>+#define MMSCH_VF_MAILBOX_RESP__RESP_MASK                                                                      0xFFFFFFFFL</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> // addressBlock: uvd_vcn_umsch_dec</div><div class='ctx'> //VCN_UMSCH_MES_CNTL</div><div class='ctx'> #define VCN_UMSCH_MES_CNTL__PIPE_ID__SHIFT                                                                    0x0</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/atombios.h b/drivers/gpu/drm/amd/include/atombios.h<br/>index b78360a71bc9..52bac19fb404 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/atombios.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/atombios.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/atombios.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/atombios.h</a></div><div class='hunk'>@@ -4308,7 +4308,7 @@ typedef struct _ATOM_DPCD_INFO</div><div class='ctx'> // note2: From RV770, the memory is more than 32bit addressable, so we will change</div><div class='ctx'> //        ucTableFormatRevision=1,ucTableContentRevision=4, the strcuture remains</div><div class='ctx'> //        exactly same as 1.1 and 1.2 (1.3 is never in use), but ulStartAddrUsedByFirmware</div><div class='del'>-//        (in offset to start of memory address) is KB aligned instead of byte aligend.</div><div class='add'>+//        (in offset to start of memory address) is KB aligned instead of byte aligned.</div><div class='ctx'> // Note3:</div><div class='ctx'> /* If we change usReserved to "usFBUsedbyDrvInKB", then to VBIOS this usFBUsedbyDrvInKB is a predefined, unchanged</div><div class='ctx'> constant across VGA or non VGA adapter,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h<br/>index 0160d65f3f5e..2d1135bdc4b9 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/atomfirmware.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/atomfirmware.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/atomfirmware.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/atomfirmware.h</a></div><div class='hunk'>@@ -183,6 +183,7 @@ enum atom_dgpu_vram_type {</div><div class='ctx'>   ATOM_DGPU_VRAM_TYPE_HBM2E = 0x61,</div><div class='ctx'>   ATOM_DGPU_VRAM_TYPE_GDDR6 = 0x70,</div><div class='ctx'>   ATOM_DGPU_VRAM_TYPE_HBM3 = 0x80,</div><div class='add'>+	ATOM_DGPU_VRAM_TYPE_HBM3E = 0x81,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum atom_dp_vs_preemph_def{</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h<br/>index 2a9606118d89..0f7542d7074b 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/kgd_pp_interface.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/kgd_pp_interface.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/kgd_pp_interface.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/kgd_pp_interface.h</a></div><div class='hunk'>@@ -128,6 +128,7 @@ enum amd_pp_sensors {</div><div class='ctx'> 	AMDGPU_PP_SENSOR_CPU_CLK,</div><div class='ctx'> 	AMDGPU_PP_SENSOR_VDDNB,</div><div class='ctx'> 	AMDGPU_PP_SENSOR_VDDGFX,</div><div class='add'>+	AMDGPU_PP_SENSOR_VDDBOARD,</div><div class='ctx'> 	AMDGPU_PP_SENSOR_UVD_VCLK,</div><div class='ctx'> 	AMDGPU_PP_SENSOR_UVD_DCLK,</div><div class='ctx'> 	AMDGPU_PP_SENSOR_VCE_ECCLK,</div><div class='hunk'>@@ -429,6 +430,7 @@ struct amd_pm_funcs {</div><div class='ctx'> 	int (*set_pp_table)(void *handle, const char *buf, size_t size);</div><div class='ctx'> 	void (*debugfs_print_current_performance_level)(void *handle, struct seq_file *m);</div><div class='ctx'> 	int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en);</div><div class='add'>+	int (*pause_power_profile)(void *handle, bool pause);</div><div class='ctx'> /* export to amdgpu */</div><div class='ctx'> 	struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);</div><div class='ctx'> 	int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/v11_structs.h b/drivers/gpu/drm/amd/include/v11_structs.h<br/>index f8008270f813..3728389fc3be 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/v11_structs.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/v11_structs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/v11_structs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/v11_structs.h</a></div><div class='hunk'>@@ -535,8 +535,8 @@ struct v11_gfx_mqd {</div><div class='ctx'> 	uint32_t reserved_507; // offset: 507  (0x1FB)</div><div class='ctx'> 	uint32_t reserved_508; // offset: 508  (0x1FC)</div><div class='ctx'> 	uint32_t reserved_509; // offset: 509  (0x1FD)</div><div class='del'>-	uint32_t reserved_510; // offset: 510  (0x1FE)</div><div class='del'>-	uint32_t reserved_511; // offset: 511  (0x1FF)</div><div class='add'>+	uint32_t fence_address_lo; // offset: 510  (0x1FE)</div><div class='add'>+	uint32_t fence_address_hi; // offset: 511  (0x1FF)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct v11_sdma_mqd {</div><div class='hunk'>@@ -1118,8 +1118,8 @@ struct v11_compute_mqd {</div><div class='ctx'> 	uint32_t reserved_443; // offset: 443  (0x1BB)</div><div class='ctx'> 	uint32_t reserved_444; // offset: 444  (0x1BC)</div><div class='ctx'> 	uint32_t reserved_445; // offset: 445  (0x1BD)</div><div class='del'>-	uint32_t reserved_446; // offset: 446  (0x1BE)</div><div class='del'>-	uint32_t reserved_447; // offset: 447  (0x1BF)</div><div class='add'>+	uint32_t fence_address_lo; // offset: 446  (0x1BE)</div><div class='add'>+	uint32_t fence_address_hi; // offset: 447  (0x1BF)</div><div class='ctx'> 	uint32_t gws_0_val; // offset: 448  (0x1C0)</div><div class='ctx'> 	uint32_t gws_1_val; // offset: 449  (0x1C1)</div><div class='ctx'> 	uint32_t gws_2_val; // offset: 450  (0x1C2)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/include/v12_structs.h b/drivers/gpu/drm/amd/include/v12_structs.h<br/>index 5eabab611b02..03a35f8a65b0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/v12_structs.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/include/v12_structs.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/include/v12_structs.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/include/v12_structs.h</a></div><div class='hunk'>@@ -535,8 +535,8 @@ struct v12_gfx_mqd {</div><div class='ctx'>     uint32_t reserved_507; // offset: 507  (0x1FB)</div><div class='ctx'>     uint32_t reserved_508; // offset: 508  (0x1FC)</div><div class='ctx'>     uint32_t reserved_509; // offset: 509  (0x1FD)</div><div class='del'>-    uint32_t reserved_510; // offset: 510  (0x1FE)</div><div class='del'>-    uint32_t reserved_511; // offset: 511  (0x1FF)</div><div class='add'>+    uint32_t fence_address_lo; // offset: 510  (0x1FE)</div><div class='add'>+    uint32_t fence_address_hi; // offset: 511  (0x1FF)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct v12_sdma_mqd {</div><div class='hunk'>@@ -1118,8 +1118,8 @@ struct v12_compute_mqd {</div><div class='ctx'>     uint32_t reserved_443; // offset: 443  (0x1BB)</div><div class='ctx'>     uint32_t reserved_444; // offset: 444  (0x1BC)</div><div class='ctx'>     uint32_t reserved_445; // offset: 445  (0x1BD)</div><div class='del'>-    uint32_t reserved_446; // offset: 446  (0x1BE)</div><div class='del'>-    uint32_t reserved_447; // offset: 447  (0x1BF)</div><div class='add'>+    uint32_t fence_address_lo; // offset: 446  (0x1BE)</div><div class='add'>+    uint32_t fence_address_hi; // offset: 447  (0x1BF)</div><div class='ctx'>     uint32_t gws_0_val; // offset: 448  (0x1C0)</div><div class='ctx'>     uint32_t gws_1_val; // offset: 449  (0x1C1)</div><div class='ctx'>     uint32_t gws_2_val; // offset: 450  (0x1C2)</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c<br/>index 81e9b443ca0a..2148c8db5a59 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_dpm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/amdgpu_dpm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_dpm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/pm/amdgpu_dpm.c</a></div><div class='hunk'>@@ -329,6 +329,34 @@ int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool amdgpu_dpm_is_link_reset_supported(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct smu_context *smu = adev-&gt;powerplay.pp_handle;</div><div class='add'>+	bool support_link_reset = false;</div><div class='add'>+</div><div class='add'>+	if (is_support_sw_smu(adev)) {</div><div class='add'>+		mutex_lock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+		support_link_reset = smu_link_reset_is_support(smu);</div><div class='add'>+		mutex_unlock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return support_link_reset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int amdgpu_dpm_link_reset(struct amdgpu_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct smu_context *smu = adev-&gt;powerplay.pp_handle;</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (is_support_sw_smu(adev)) {</div><div class='add'>+		mutex_lock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+		ret = smu_link_reset(smu);</div><div class='add'>+		mutex_unlock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,</div><div class='ctx'> 				    enum PP_SMC_POWER_PROFILE type,</div><div class='ctx'> 				    bool en)</div><div class='hunk'>@@ -349,6 +377,25 @@ int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,</div><div class='add'>+				   bool pause)</div><div class='add'>+{</div><div class='add'>+	const struct amd_pm_funcs *pp_funcs = adev-&gt;powerplay.pp_funcs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (amdgpu_sriov_vf(adev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (pp_funcs &amp;&amp; pp_funcs-&gt;pause_power_profile) {</div><div class='add'>+		mutex_lock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+		ret = pp_funcs-&gt;pause_power_profile(</div><div class='add'>+			adev-&gt;powerplay.pp_handle, pause);</div><div class='add'>+		mutex_unlock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,</div><div class='ctx'> 			       uint32_t pstate)</div><div class='ctx'> {</div><div class='hunk'>@@ -761,6 +808,21 @@ int amdgpu_dpm_reset_sdma(struct amdgpu_device *adev, uint32_t inst_mask)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int amdgpu_dpm_reset_vcn(struct amdgpu_device *adev, uint32_t inst_mask)</div><div class='add'>+{</div><div class='add'>+	struct smu_context *smu = adev-&gt;powerplay.pp_handle;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!is_support_sw_smu(adev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+	ret = smu_reset_vcn(smu, inst_mask);</div><div class='add'>+	mutex_unlock(&amp;adev-&gt;pm.mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int amdgpu_dpm_get_dpm_freq_range(struct amdgpu_device *adev,</div><div class='ctx'> 				  enum pp_clock_type type,</div><div class='ctx'> 				  uint32_t *min,</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c<br/>index 922def51685b..edd9895b46c0 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_pm.c?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/amdgpu_pm.c</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/amdgpu_pm.c?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/pm/amdgpu_pm.c</a></div><div class='hunk'>@@ -1606,7 +1606,6 @@ static ssize_t amdgpu_set_thermal_throttling_logging(struct device *dev,</div><div class='ctx'> 	struct drm_device *ddev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct amdgpu_device *adev = drm_to_adev(ddev);</div><div class='ctx'> 	long throttling_logging_interval;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = kstrtol(buf, 0, &amp;throttling_logging_interval);</div><div class='hunk'>@@ -1617,18 +1616,12 @@ static ssize_t amdgpu_set_thermal_throttling_logging(struct device *dev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (throttling_logging_interval &gt; 0) {</div><div class='del'>-		raw_spin_lock_irqsave(&amp;adev-&gt;throttling_logging_rs.lock, flags);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Reset the ratelimit timer internals.</div><div class='ctx'> 		 * This can effectively restart the timer.</div><div class='ctx'> 		 */</div><div class='del'>-		adev-&gt;throttling_logging_rs.interval =</div><div class='del'>-			(throttling_logging_interval - 1) * HZ;</div><div class='del'>-		adev-&gt;throttling_logging_rs.begin = 0;</div><div class='del'>-		adev-&gt;throttling_logging_rs.printed = 0;</div><div class='del'>-		adev-&gt;throttling_logging_rs.missed = 0;</div><div class='del'>-		raw_spin_unlock_irqrestore(&amp;adev-&gt;throttling_logging_rs.lock, flags);</div><div class='del'>-</div><div class='add'>+		ratelimit_state_reset_interval(&amp;adev-&gt;throttling_logging_rs,</div><div class='add'>+					       (throttling_logging_interval - 1) * HZ);</div><div class='ctx'> 		atomic_set(&amp;adev-&gt;throttling_logging_enabled, 1);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		atomic_set(&amp;adev-&gt;throttling_logging_enabled, 0);</div><div class='hunk'>@@ -2944,6 +2937,23 @@ static ssize_t amdgpu_hwmon_show_vddgfx(struct device *dev,</div><div class='ctx'> 	return sysfs_emit(buf, "%d\n", vddgfx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t amdgpu_hwmon_show_vddboard(struct device *dev,</div><div class='add'>+					  struct device_attribute *attr,</div><div class='add'>+					  char *buf)</div><div class='add'>+{</div><div class='add'>+	struct amdgpu_device *adev = dev_get_drvdata(dev);</div><div class='add'>+	u32 vddboard;</div><div class='add'>+	int r;</div><div class='add'>+</div><div class='add'>+	/* get the voltage */</div><div class='add'>+	r = amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_VDDBOARD,</div><div class='add'>+					    (void *)&amp;vddboard);</div><div class='add'>+	if (r)</div><div class='add'>+		return r;</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", vddboard);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t amdgpu_hwmon_show_vddgfx_label(struct device *dev,</div><div class='ctx'> 					      struct device_attribute *attr,</div><div class='ctx'> 					      char *buf)</div><div class='hunk'>@@ -2951,6 +2961,12 @@ static ssize_t amdgpu_hwmon_show_vddgfx_label(struct device *dev,</div><div class='ctx'> 	return sysfs_emit(buf, "vddgfx\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t amdgpu_hwmon_show_vddboard_label(struct device *dev,</div><div class='add'>+						struct device_attribute *attr,</div><div class='add'>+						char *buf)</div><div class='add'>+{</div><div class='add'>+	return sysfs_emit(buf, "vddboard\n");</div><div class='add'>+}</div><div class='ctx'> static ssize_t amdgpu_hwmon_show_vddnb(struct device *dev,</div><div class='ctx'> 				       struct device_attribute *attr,</div><div class='ctx'> 				       char *buf)</div><div class='hunk'>@@ -3294,6 +3310,8 @@ static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, amdgpu_hwmon_show_vddgfx, NULL, 0)</div><div class='ctx'> static SENSOR_DEVICE_ATTR(in0_label, S_IRUGO, amdgpu_hwmon_show_vddgfx_label, NULL, 0);</div><div class='ctx'> static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, amdgpu_hwmon_show_vddnb, NULL, 0);</div><div class='ctx'> static SENSOR_DEVICE_ATTR(in1_label, S_IRUGO, amdgpu_hwmon_show_vddnb_label, NULL, 0);</div><div class='add'>+static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, amdgpu_hwmon_show_vddboard, NULL, 0);</div><div class='add'>+static SENSOR_DEVICE_ATTR(in2_label, S_IRUGO, amdgpu_hwmon_show_vddboard_label, NULL, 0);</div><div class='ctx'> static SENSOR_DEVICE_ATTR(power1_average, S_IRUGO, amdgpu_hwmon_show_power_avg, NULL, 0);</div><div class='ctx'> static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO, amdgpu_hwmon_show_power_input, NULL, 0);</div><div class='ctx'> static SENSOR_DEVICE_ATTR(power1_cap_max, S_IRUGO, amdgpu_hwmon_show_power_cap_max, NULL, 0);</div><div class='hunk'>@@ -3341,6 +3359,8 @@ static struct attribute *hwmon_attributes[] = {</div><div class='ctx'> 	&amp;sensor_dev_attr_in0_label.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in1_input.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_in1_label.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in2_input.dev_attr.attr,</div><div class='add'>+	&amp;sensor_dev_attr_in2_label.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_power1_average.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_power1_input.dev_attr.attr,</div><div class='ctx'> 	&amp;sensor_dev_attr_power1_cap_max.dev_attr.attr,</div><div class='hunk'>@@ -3492,6 +3512,13 @@ static umode_t hwmon_attributes_visible(struct kobject *kobj,</div><div class='ctx'> 	     attr == &amp;sensor_dev_attr_in1_label.dev_attr.attr))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/* only few boards support vddboard */</div><div class='add'>+	if ((attr == &amp;sensor_dev_attr_in2_input.dev_attr.attr ||</div><div class='add'>+	     attr == &amp;sensor_dev_attr_in2_label.dev_attr.attr) &amp;&amp;</div><div class='add'>+	     amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_VDDBOARD,</div><div class='add'>+					     (void *)&amp;tmp) == -EOPNOTSUPP)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/* no mclk on APUs other than gc 9,4,3*/</div><div class='ctx'> 	if (((adev-&gt;flags &amp; AMD_IS_APU) &amp;&amp; (gc_ver != IP_VERSION(9, 4, 3))) &amp;&amp;</div><div class='ctx'> 	    (attr == &amp;sensor_dev_attr_freq2_input.dev_attr.attr ||</div><div class='head'>diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h<br/>index f93d287dbf13..2c3c97587dd5 100644<br/>--- a/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h?id=63bfd78aae9a90210b0d369bb2836cca90402a95'>drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h</a><br/>+++ b/<a href='/cgit/linux.git/tree/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h?id=9f32a03e3e0d372c520d829dd4da6022fe88832a'>drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h</a></div><div class='hunk'>@@ -410,15 +410,19 @@ int amdgpu_dpm_set_xgmi_pstate(struct amdgpu_device *adev,</div><div class='ctx'> int amdgpu_dpm_switch_power_profile(struct amdgpu_device *adev,</div><div class='ctx'> 				    enum PP_SMC_POWER_PROFILE type,</div><div class='ctx'> 				    bool en);</div><div class='add'>+int amdgpu_dpm_pause_power_profile(struct amdgpu_device *adev,</div><div class='add'>+				   bool pause);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_dpm_baco_reset(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev);</div><div class='add'>+int amdgpu_dpm_link_reset(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_dpm_enable_gfx_features(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='ctx'> bool amdgpu_dpm_is_mode1_reset_supported(struct amdgpu_device *adev);</div><div class='add'>+bool amdgpu_dpm_is_link_reset_supported(struct amdgpu_device *adev);</div><div class='ctx'> int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev);</div><div class='ctx'> </div><div class='ctx'> int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev,</div><div class='hunk'>@@ -605,5 +609,6 @@ ssize_t amdgpu_dpm_get_pm_policy_info(struct amdgpu_device *adev,</div><div class='ctx'> 				      enum pp_pm_policy p_type, char *buf);</div><div class='ctx'> int amdgpu_dpm_reset_sdma(struct amdgpu_device *adev, uint32_t inst_mask);</div><div class='ctx'> bool amdgpu_dpm_reset_sdma_is_supported(struct amdgpu_device *adev);</div><div class='add'>+int amdgpu_dpm_reset_vcn(struct amdgpu_device *adev, uint32_t inst_mask);</div><div class='ctx'> </div><div class='ctx'>